content stringlengths 4 1.04M | lang stringclasses 358 values | score int64 0 5 | repo_name stringlengths 5 114 | repo_path stringlengths 4 229 | repo_licenses listlengths 1 8 |
|---|---|---|---|---|---|
<template>
<div class="a-child">Real child component</div>
</template>
<script>
export default {
data () {
return {}
}
}
</script>
| Vue | 4 | bkucera2/cypress | npm/vue/cypress/component/advanced/mocking-components/Child.vue | [
"MIT"
] |
Extension { #name : #ZnClient }
{ #category : #'*GToolkit-Extensions' }
ZnClient >> gtCurlFor: aView [
<gtView>
self request ifNil: [ ^ aView empty ].
self request requestLine ifNil: [ ^ aView empty ].
self request method ifNil: [ ^ aView empty ].
self request uri ifNil: [ ^ aView empty ].
^ aView textEditor
title: 'CURL';
priority: 40;
aptitude: [ BrGlamorousCodeEditorAptitude ];
text: [ [ self curl ] on: Error do: [ :anException |
'Client is not initialized yet: ', anException displayString ] ]
]
| Smalltalk | 4 | feenkcom/gtoolk | src/GToolkit-Extensions/ZnClient.extension.st | [
"MIT"
] |
string div(float a, float b) {
if (a == 0.0 || b == 0.0) {
return sprintf("% 8s", "-");
}
return sprintf("% 8.1f ", (1-a/b)*100);
}
float average(array(float|int) a) {
return `+(@a)/(float)sizeof(a);
}
array combine(mixed ... a) {
function f = a[-1];
a = a[..<1];
array ret = allocate(sizeof(a[0]));
for (int i = 0; i < sizeof(a[0]); i++) {
ret[i] = f(@(a[*][i]));
}
return ret;
}
float standard_deviation(array(float|int) a) {
float av = average(a);
a = map(a, `-, av);
#ifdef COMBINE
return sqrt(`+(@combine(a, a, `*)));
#else
return sqrt(`+(@map(a, pow, 2))/(float)sizeof(a));
#endif
}
class Value(float|int v, void|float deviation) {
int samples;
float mean_deviation() {
if (floatp(deviation) && deviation != 0.0) {
return (samples > 1) ? deviation / sqrt(samples) : deviation;
}
return 0.0;
}
int|float round_err(float err) {
int power = -(int)ceil(Math.log10(err))+1;
err = ceil(err * pow(10.0, power))*pow(10.0, -power);
return (err > 1.0) ? (int)err : err;
}
string _sprintf(int type) {
float mdev = mean_deviation();
if (type == 'f') {
return sprintf("%f\t%f", (float)v, floatp(mdev) ? mdev : 0.0);
}
if (floatp(deviation) && deviation != 0.0) {
// this = 456.3455 +/- 0.456 -> 456.3(0.5)
// this = 2345678.324 +/- 345.4 -> 2345700(400)
// mdev = 0.004345
// err = 5 = ceil(4.345)
// power = 4
int power = -(int)ceil(Math.log10(mdev))+1;
#if 1
return sprintf("%."+(string)max(0, power)+"f(%O) +/- %O", (float)v, round_err(mdev), round_err(deviation));
#else
return sprintf("(%.4f ~ %f)", (float)v, mdev);
#endif
}
return (string)v;
}
mixed cast(string type) {
switch (type) {
case "int":
return (int)v;
case "float":
return (float)v;
default:
error("cannot cast %O to %O\n", this, type);
}
}
#define SCALE_OP(_) this_program ` ## _(mixed o) { \
this_program x = this_program(v _ o, deviation _ o); \
x->samples = samples; \
return x; \
} \
SCALE_OP(/)
SCALE_OP(*)
#define ADD_OP(_) this_program ` ## _(mixed o) { \
this_program n; \
if (floatp(o) || intp(o)) { \
n = this_program(v _ o, deviation); \
} else if (objectp(o) && Program.inherits(object_program(o), this_program)) { \
n = this_program(v _ o->v, deviation + o->deviation); \
} \
n->samples = n->deviation > 0.0 \
? (int)pow(n->deviation / (mean_deviation() + o->mean_deviation()), 2) \
: 0; \
return n; \
}
ADD_OP(+)
ADD_OP(-)
}
class Result {
Value mem, time;
string e;
void create(int|Value mem, float|Value time, void|string e, void|string name) {
this_program::mem = objectp(mem) ? mem : Value(mem);
this_program::time = objectp(time) ? time : Value(time);
if (!objectp(mem)) this_program::mem->samples = -3;
if (!objectp(time)) this_program::time->samples = -3;
this_program::e = e;
this_program::name = name;
}
string name;
string _sprintf(int type) {
return sprintf("%-30s%-23s%-27s", name, (mem/1024)->_sprintf('O')+" kb", (time*1000)->_sprintf('O') + " ms");
}
#define PROXY_OP(_) this_program ` ##_(mixed o) { \
if (objectp(o) && Program.inherits(object_program(o), this_program)) { \
return this_program(mem _ o->mem, time _ o->time, e, name); \
} \
return this_program(mem _ o, time _ o, e, name); \
}
PROXY_OP(-)
}
Value combine_values(array(Value) a) {
Value n;
if (sizeof(a) == 0) error("foo\n");
float deviation = standard_deviation(a->v);
float av = average(a->v);
// calculate average and average standard deviation
n = Value(av, deviation);
n->samples = sizeof(a);
return n;
}
mapping(int:array(Value)) parse_raw(string s) {
mapping(int:mixed) m = ([]), mb = ([]);
array(string) a = s/"\n";
if (a[-1] == "") a = a[..sizeof(a)-2];
for (int i = 0; i < sizeof(a); i++) {
array(string) tmp = a[i]/"\t";
int n = (int)tmp[0];
float t = (float)tmp[1];
int bytes = (int)tmp[2];
if (!m[n]) {
m[n] = ({ });
mb[n] = ({ });
}
m[n] += ({ Value(t) });
mb[n] += ({ Value(bytes) });
}
foreach (m; int n; array t) {
m[n] = ({ combine_values(t), combine_values(mb[n]) });
}
return m;
}
int main(int argc, array(string) argv) {
mapping(int:array(Value)) m;
m = parse_raw(Stdio.read_file(argv[1]));
foreach (sort(indices(m));; int n) {
array a = m[n];
write("%d\t%f\t%f\n", n, a[0], a[1]);
}
return 0;
}
| Pike | 5 | arneg/GJAlloc | perf/compare.pike | [
"BSD-3-Clause"
] |
SOURCES += \
$$PWD/dummyversioncontroller.cpp \
$$PWD/versioncontrollerserver.cpp \
$$PWD/dummyversioncontrollerfactory.cpp
HEADERS += \
$$PWD/iversioncontroller.h \
$$PWD/dummyversioncontroller.h \
$$PWD/versioncontrollerserver.h \
$$PWD/iversioncontrollerfactory.h \
$$PWD/dummyversioncontrollerfactory.h
| QMake | 2 | lizhyumzi/vnote | src/core/versioncontroller/versioncontroller.pri | [
"MIT"
] |
"""wsgiref -- a WSGI (PEP 3333) Reference Library
Current Contents:
* util -- Miscellaneous useful functions and wrappers
* headers -- Manage response headers
* handlers -- base classes for server/gateway implementations
* simple_server -- a simple BaseHTTPServer that supports WSGI
* validate -- validation wrapper that sits between an app and a server
to detect errors in either
To-Do:
* cgi_gateway -- Run WSGI apps under CGI (pending a deployment standard)
* cgi_wrapper -- Run CGI apps under WSGI
* router -- a simple middleware component that handles URL traversal
"""
| Python | 3 | shawwn/cpython | Lib/wsgiref/__init__.py | [
"0BSD"
] |
<a href='#items/{{id}}'>Open Item Details</a>
<p>
<span>Item:</span>
<span>{{name}}</span>
</p>
| mupad | 2 | royriojas/buildfirst | ch07/05_backbone-routing/app/views/templates/item.mu | [
"MIT"
] |
package com.baeldung.mbassador;
public class Message {
}
| Java | 1 | zeesh49/tutorials | libraries/src/main/java/com/baeldung/mbassador/Message.java | [
"MIT"
] |
{% for service in services %}
/** Returns the {{ service.simpleName | capitalize }} instance. **/
val {{ imported("android.content.Context") }}.{{ service.simpleName }}: {{ imported(service.fqName) }}
get() = getSystemService(Context.{{ service.constantName }}) as {{ imported(service.fqName) }}
{% endfor %} | Twig | 4 | tobiasdubois/anko | anko/props/templates/services.twig | [
"Apache-2.0"
] |
FROM parrotsec/core
RUN DEBIAN_FRONTEND=noninteractive DEBCONF_NONINTERACTIVE_SEEN=true apt-get update && \
DEBIAN_FRONTEND=noninteractive DEBCONF_NONINTERACTIVE_SEEN=true apt-get dist-upgrade -y && \
DEBIAN_FRONTEND=noninteractive DEBCONF_NONINTERACTIVE_SEEN=true apt-get install --no-install-recommends aircrack-ng asleap freeradius-wpe hostapd-wpe iw kismet mdk3 mdk4 pixiewps reaver wifi-honey wifite tshark wireshark termshark vim mlocate man pciutils hashcat wpasupplicant less bash-completion ssh supervisor novnc xvfb x11vnc parrot-xfce dbus-x11 dialog tmux -y && \
apt-get clean && \
rm -rf /var/lib/apt/lists/* && \
rm -f /etc/ssh/ssh_host_* && \
cd /etc/freeradius-wpe/3.0/certs && \
make clean && \
cd /etc/hostapd-wpe/certs && \
make clean
EXPOSE 22/tcp
EXPOSE 8080/tcp
ENV DISPLAY=:0
WORKDIR /root/
COPY files/cyberpunk.words /root/cyberpunk.words
COPY files/supervisord-debianish.conf /etc/supervisord/supervisord.conf
CMD ["/usr/bin/supervisord", "-c", "/etc/supervisord/supervisord.conf", "--pidfile", "/run/supervisord.pid"]
ENTRYPOINT []
| Parrot | 3 | trevorbryant/rfctf-container | contestant_containers/Dockerfile.parrot | [
"BSD-2-Clause"
] |
/**
* This file is part of the Phalcon Framework.
*
* (c) Phalcon Team <team@phalcon.io>
*
* For the full copyright and license information, please view the LICENSE.txt
* file that was distributed with this source code.
*/
namespace Phalcon\Db;
/**
* Interface for Phalcon\Db\Index
*/
interface IndexInterface
{
/**
* Gets the columns that corresponds the index
*/
public function getColumns() -> array;
/**
* Gets the index name
*/
public function getName() -> string;
/**
* Gets the index type
*/
public function getType() -> string;
}
| Zephir | 4 | tidytrax/cphalcon | phalcon/Db/IndexInterface.zep | [
"BSD-3-Clause"
] |
nios_vga_test2.elf: file format elf32-littlenios2
nios_vga_test2.elf
architecture: nios2, flags 0x00000112:
EXEC_P, HAS_SYMS, D_PAGED
start address 0x080001b4
Program Header:
LOAD off 0x00001000 vaddr 0x08000000 paddr 0x08000000 align 2**12
filesz 0x00000020 memsz 0x00000020 flags r-x
LOAD off 0x00001020 vaddr 0x08000020 paddr 0x08000020 align 2**12
filesz 0x0000e21c memsz 0x0000e21c flags r-x
LOAD off 0x0000f23c vaddr 0x0800e23c paddr 0x0800fd60 align 2**12
filesz 0x00001b24 memsz 0x00001b24 flags rw-
LOAD off 0x00011884 vaddr 0x08011884 paddr 0x08011884 align 2**12
filesz 0x00000000 memsz 0x000002f4 flags rw-
Sections:
Idx Name Size VMA LMA File off Algn
0 .entry 00000020 08000000 08000000 00001000 2**5
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .exceptions 00000194 08000020 08000020 00001020 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .text 0000da6c 080001b4 080001b4 000011b4 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
3 .rodata 0000061c 0800dc20 0800dc20 0000ec20 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
4 .rwdata 00001b24 0800e23c 0800fd60 0000f23c 2**2
CONTENTS, ALLOC, LOAD, DATA, SMALL_DATA
5 .bss 000002f4 08011884 08011884 00011884 2**2
ALLOC, SMALL_DATA
6 .comment 00000023 00000000 00000000 00010d60 2**0
CONTENTS, READONLY
7 .debug_aranges 00000bf8 00000000 00000000 00010d88 2**3
CONTENTS, READONLY, DEBUGGING
8 .debug_pubnames 000014fc 00000000 00000000 00011980 2**0
CONTENTS, READONLY, DEBUGGING
9 .debug_info 00022538 00000000 00000000 00012e7c 2**0
CONTENTS, READONLY, DEBUGGING
10 .debug_abbrev 0000757c 00000000 00000000 000353b4 2**0
CONTENTS, READONLY, DEBUGGING
11 .debug_line 0001321a 00000000 00000000 0003c930 2**0
CONTENTS, READONLY, DEBUGGING
12 .debug_frame 0000189c 00000000 00000000 0004fb4c 2**2
CONTENTS, READONLY, DEBUGGING
13 .debug_str 0000235b 00000000 00000000 000513e8 2**0
CONTENTS, READONLY, DEBUGGING
14 .debug_loc 0000be2a 00000000 00000000 00053743 2**0
CONTENTS, READONLY, DEBUGGING
15 .debug_alt_sim_info 00000010 00000000 00000000 0005f570 2**2
CONTENTS, READONLY, DEBUGGING
16 .debug_ranges 000009e0 00000000 00000000 0005f580 2**3
CONTENTS, READONLY, DEBUGGING
17 .thread_model 00000003 00000000 00000000 00063076 2**0
CONTENTS, READONLY
18 .cpu 00000003 00000000 00000000 00063079 2**0
CONTENTS, READONLY
19 .qsys 00000001 00000000 00000000 0006307c 2**0
CONTENTS, READONLY
20 .simulation_enabled 00000001 00000000 00000000 0006307d 2**0
CONTENTS, READONLY
21 .sysid_hash 00000004 00000000 00000000 0006307e 2**0
CONTENTS, READONLY
22 .sysid_base 00000004 00000000 00000000 00063082 2**0
CONTENTS, READONLY
23 .sysid_time 00000004 00000000 00000000 00063086 2**0
CONTENTS, READONLY
24 .stderr_dev 0000000b 00000000 00000000 0006308a 2**0
CONTENTS, READONLY
25 .stdin_dev 0000000b 00000000 00000000 00063095 2**0
CONTENTS, READONLY
26 .stdout_dev 0000000b 00000000 00000000 000630a0 2**0
CONTENTS, READONLY
27 .sopc_system_name 0000000b 00000000 00000000 000630ab 2**0
CONTENTS, READONLY
28 .quartus_project_dir 00000030 00000000 00000000 000630b6 2**0
CONTENTS, READONLY
29 .jdi 00004901 00000000 00000000 000630e6 2**0
CONTENTS, READONLY
30 .sopcinfo 0005520c 00000000 00000000 000679e7 2**0
CONTENTS, READONLY
SYMBOL TABLE:
08000000 l d .entry 00000000 .entry
08000020 l d .exceptions 00000000 .exceptions
080001b4 l d .text 00000000 .text
0800dc20 l d .rodata 00000000 .rodata
0800e23c l d .rwdata 00000000 .rwdata
08011884 l d .bss 00000000 .bss
00000000 l d .comment 00000000 .comment
00000000 l d .debug_aranges 00000000 .debug_aranges
00000000 l d .debug_pubnames 00000000 .debug_pubnames
00000000 l d .debug_info 00000000 .debug_info
00000000 l d .debug_abbrev 00000000 .debug_abbrev
00000000 l d .debug_line 00000000 .debug_line
00000000 l d .debug_frame 00000000 .debug_frame
00000000 l d .debug_str 00000000 .debug_str
00000000 l d .debug_loc 00000000 .debug_loc
00000000 l d .debug_alt_sim_info 00000000 .debug_alt_sim_info
00000000 l d .debug_ranges 00000000 .debug_ranges
080001ec l .text 00000000 alt_after_alt_main
00000000 l df *ABS* 00000000 alt_irq_handler.c
00000000 l df *ABS* 00000000 main.c
00000000 l df *ABS* 00000000 printf.c
00000000 l df *ABS* 00000000 vfprintf.c
08000494 l F .text 00000058 __sprint_r
0800deee l O .rodata 00000010 blanks.3452
0800dede l O .rodata 00000010 zeroes.3453
00000000 l df *ABS* 00000000 wsetup.c
00000000 l df *ABS* 00000000 dtoa.c
08002510 l F .text 00000244 quorem
00000000 l df *ABS* 00000000 fflush.c
00000000 l df *ABS* 00000000 findfp.c
08003f38 l F .text 00000058 std
08004044 l F .text 00000008 __fp_lock
0800404c l F .text 00000008 __fp_unlock
00000000 l df *ABS* 00000000 mallocr.c
00000000 l df *ABS* 00000000 fvwrite.c
00000000 l df *ABS* 00000000 fwalk.c
00000000 l df *ABS* 00000000 impure.c
0800e23c l O .rwdata 00000400 impure_data
00000000 l df *ABS* 00000000 locale.c
0800fd2c l O .rwdata 00000004 charset
0800df24 l O .rodata 00000030 lconv
00000000 l df *ABS* 00000000 makebuf.c
00000000 l df *ABS* 00000000 mallocr.c
00000000 l df *ABS* 00000000 memchr.c
00000000 l df *ABS* 00000000 memcpy.c
00000000 l df *ABS* 00000000 memmove.c
00000000 l df *ABS* 00000000 memset.c
00000000 l df *ABS* 00000000 mprec.c
0800e06c l O .rodata 0000000c p05.2458
00000000 l df *ABS* 00000000 mallocr.c
00000000 l df *ABS* 00000000 s_isinfd.c
00000000 l df *ABS* 00000000 s_isnand.c
00000000 l df *ABS* 00000000 sbrkr.c
00000000 l df *ABS* 00000000 stdio.c
00000000 l df *ABS* 00000000 strcmp.c
00000000 l df *ABS* 00000000 strlen.c
00000000 l df *ABS* 00000000 writer.c
00000000 l df *ABS* 00000000 mallocr.c
00000000 l df *ABS* 00000000 closer.c
00000000 l df *ABS* 00000000 fclose.c
00000000 l df *ABS* 00000000 fstatr.c
00000000 l df *ABS* 00000000 int_errno.c
00000000 l df *ABS* 00000000 isattyr.c
00000000 l df *ABS* 00000000 lseekr.c
00000000 l df *ABS* 00000000 readr.c
00000000 l df *ABS* 00000000 libgcc2.c
00000000 l df *ABS* 00000000 libgcc2.c
00000000 l df *ABS* 00000000 dp-bit.c
0800846c l F .text 00000410 _fpadd_parts
00000000 l df *ABS* 00000000 dp-bit.c
00000000 l df *ABS* 00000000 dp-bit.c
00000000 l df *ABS* 00000000 dp-bit.c
00000000 l df *ABS* 00000000 dp-bit.c
00000000 l df *ABS* 00000000 dp-bit.c
00000000 l df *ABS* 00000000 dp-bit.c
00000000 l df *ABS* 00000000 dp-bit.c
00000000 l df *ABS* 00000000 dp-bit.c
00000000 l df *ABS* 00000000 dp-bit.c
00000000 l df *ABS* 00000000 dp-bit.c
00000000 l df *ABS* 00000000 dp-bit.c
00000000 l df *ABS* 00000000 lib2-divmod.c
08009598 l F .text 0000007c udivmodsi4
00000000 l df *ABS* 00000000 lib2-mul.c
00000000 l df *ABS* 00000000 libgcc2.c
00000000 l df *ABS* 00000000 libgcc2.c
00000000 l df *ABS* 00000000 libgcc2.c
00000000 l df *ABS* 00000000 dp-bit.c
00000000 l df *ABS* 00000000 dp-bit.c
00000000 l df *ABS* 00000000 dp-bit.c
00000000 l df *ABS* 00000000 alt_close.c
08009ed4 l F .text 00000060 alt_get_errno
00000000 l df *ABS* 00000000 alt_dev.c
08009f34 l F .text 0000002c alt_dev_null_write
00000000 l df *ABS* 00000000 alt_errno.c
00000000 l df *ABS* 00000000 alt_fstat.c
0800a038 l F .text 00000060 alt_get_errno
00000000 l df *ABS* 00000000 alt_isatty.c
0800a15c l F .text 00000060 alt_get_errno
00000000 l df *ABS* 00000000 alt_load.c
0800a23c l F .text 0000006c alt_load_section
00000000 l df *ABS* 00000000 alt_lseek.c
0800a39c l F .text 00000060 alt_get_errno
00000000 l df *ABS* 00000000 alt_main.c
00000000 l df *ABS* 00000000 alt_malloc_lock.c
00000000 l df *ABS* 00000000 alt_read.c
0800a5b0 l F .text 00000060 alt_get_errno
00000000 l df *ABS* 00000000 alt_release_fd.c
00000000 l df *ABS* 00000000 alt_sbrk.c
0800fd50 l O .rwdata 00000004 heap_end
00000000 l df *ABS* 00000000 alt_write.c
0800a868 l F .text 00000060 alt_get_errno
00000000 l df *ABS* 00000000 alt_sys_init.c
0800ebf8 l O .rwdata 00001060 jtag_uart
0800fc58 l O .rwdata 00000048 Char_Buffer_with_DMA
0800fca0 l O .rwdata 00000054 Pixel_Buffer_DMA
0800fcf4 l O .rwdata 0000002c Altera_UP_SD_Card_Avalon_Interface_0
0800ac00 l F .text 00000038 alt_dev_reg
00000000 l df *ABS* 00000000 altera_avalon_jtag_uart_fd.c
00000000 l df *ABS* 00000000 altera_avalon_jtag_uart_init.c
0800ae40 l F .text 00000228 altera_avalon_jtag_uart_irq
0800b068 l F .text 000000b0 altera_avalon_jtag_uart_timeout
00000000 l df *ABS* 00000000 altera_avalon_jtag_uart_ioctl.c
00000000 l df *ABS* 00000000 altera_avalon_jtag_uart_read.c
00000000 l df *ABS* 00000000 altera_avalon_jtag_uart_write.c
00000000 l df *ABS* 00000000 altera_up_avalon_video_character_buffer_with_dma.c
00000000 l df *ABS* 00000000 altera_up_avalon_video_pixel_buffer_dma.c
00000000 l df *ABS* 00000000 alt_alarm_start.c
00000000 l df *ABS* 00000000 alt_dcache_flush_all.c
00000000 l df *ABS* 00000000 alt_dev_llist_insert.c
0800d1ac l F .text 00000060 alt_get_errno
00000000 l df *ABS* 00000000 alt_do_ctors.c
00000000 l df *ABS* 00000000 alt_do_dtors.c
00000000 l df *ABS* 00000000 alt_find_dev.c
00000000 l df *ABS* 00000000 alt_icache_flush_all.c
00000000 l df *ABS* 00000000 alt_iic.c
00000000 l df *ABS* 00000000 alt_iic_isr_register.c
00000000 l df *ABS* 00000000 alt_irq_vars.c
00000000 l df *ABS* 00000000 alt_tick.c
00000000 l df *ABS* 00000000 altera_nios2_qsys_irq.c
00000000 l df *ABS* 00000000 atexit.c
00000000 l df *ABS* 00000000 exit.c
00000000 l df *ABS* 00000000 memcmp.c
00000000 l df *ABS* 00000000 __atexit.c
00000000 l df *ABS* 00000000 __call_atexit.c
0800da08 l F .text 00000004 register_fini
00000000 l df *ABS* 00000000 alt_exit.c
0800dbbc l F .text 00000040 alt_sim_halt
08005d28 g F .text 00000094 _mprec_log10
08005e14 g F .text 00000088 __any_on
08007640 g F .text 00000070 _isatty_r
0800e044 g O .rodata 00000028 __mprec_tinytens
0800a3fc g F .text 00000050 alt_main
0800c678 g F .text 000003d8 alt_up_pixel_buffer_dma_draw_vline
080118e8 g O .bss 00000100 alt_irq
080076b0 g F .text 00000078 _lseek_r
0800fd60 g *ABS* 00000000 __flash_rwdata_start
08008f8c g F .text 00000088 __eqdf2
08011b78 g *ABS* 00000000 __alt_heap_start
0800041c g F .text 00000044 printf
08007084 g F .text 00000068 __sseek
08003fa0 g F .text 000000a4 __sinit
0800b878 g F .text 00000114 alt_up_char_buffer_string
08004cac g F .text 00000084 _setlocale_r
080040a0 g F .text 0000009c __sfmoreglue
0800a46c g F .text 00000020 __malloc_unlock
0800b7a8 g F .text 000000d0 alt_up_char_buffer_draw
080057a4 g F .text 000000e0 memmove
08004090 g F .text 00000010 _cleanup
08005e9c g F .text 000000bc _Balloc
0800ba28 g F .text 000001ac alt_up_pixel_buffer_dma_draw
0800909c g F .text 00000088 __gtdf2
00000000 w *UND* 00000000 __errno
0800b9e8 g F .text 00000040 alt_up_pixel_buffer_dma_open_dev
08000000 g F .entry 0000000c __reset
08000020 g *ABS* 00000000 __flash_exceptions_start
080075cc g F .text 00000074 _fstat_r
080118a4 g O .bss 00000004 errno
08011884 g O .bss 00000004 char_buffer
080118ac g O .bss 00000004 alt_argv
08017d20 g *ABS* 00000000 _gp
0800bbd4 g F .text 00000058 alt_up_pixel_buffer_dma_change_back_buffer_address
0800ea78 g O .rwdata 00000180 alt_fd_list
0800d2d4 g F .text 00000094 alt_find_dev
08005704 g F .text 000000a0 memcpy
0800b98c g F .text 0000005c alt_up_char_buffer_clear
08004084 g F .text 0000000c _cleanup_r
08009234 g F .text 000000f8 __floatsidf
080091ac g F .text 00000088 __ltdf2
0800dc20 g *ABS* 00000000 __DTOR_END__
08005c78 g F .text 000000b0 __ratio
0800bc84 g F .text 00000034 alt_up_pixel_buffer_dma_check_swap_buffers_status
0800b280 g F .text 00000224 altera_avalon_jtag_uart_read
00000000 w *UND* 00000000 malloc
08000460 g F .text 00000034 _printf_r
080096d4 g F .text 00000008 __udivsi3
0800a098 g F .text 000000c4 isatty
0800df54 g O .rodata 000000c8 __mprec_tens
0800c320 g F .text 00000358 alt_up_pixel_buffer_dma_draw_hline
08004c88 g F .text 00000008 __locale_charset
08011898 g O .bss 00000004 __malloc_top_pad
0800fd28 g O .rwdata 00000004 __mb_cur_max
08004c90 g F .text 0000000c _localeconv_r
08006600 g F .text 0000003c __i2b
0800466c g F .text 0000049c __sfvwrite_r
0800700c g F .text 00000070 _sbrk_r
0800cb14 g F .text 000000d8 helper_plot_pixel
08007728 g F .text 00000078 _read_r
0800e63c g O .rwdata 0000000c __lc_ctype
0800fd48 g O .rwdata 00000004 alt_max_fd
08009bd4 g F .text 00000138 __unpack_d
080074a8 g F .text 00000110 _fclose_r
08003f04 g F .text 00000034 fflush
0801189c g O .bss 00000004 __malloc_max_sbrked_mem
080088fc g F .text 00000074 __adddf3
08005b58 g F .text 00000120 __b2d
0800bcb8 g F .text 0000016c alt_up_pixel_buffer_dma_clear_screen
08007e0c g F .text 00000660 __umoddi3
0800a2a8 g F .text 000000f4 lseek
0800fd24 g O .rwdata 00000004 _global_impure_ptr
080069a8 g F .text 000005f4 _realloc_r
08011b78 g *ABS* 00000000 __bss_end
0800d558 g F .text 000000f8 alt_iic_isr_register
0800be24 g F .text 000004fc alt_up_pixel_buffer_dma_draw_box
0800d6e8 g F .text 0000010c alt_tick
080077a0 g F .text 0000066c __udivdi3
0800e01c g O .rodata 00000028 __mprec_bigtens
08006888 g F .text 00000120 __s2b
08009404 g F .text 00000194 __floatunsidf
08005a78 g F .text 00000060 __mcmp
0800406c g F .text 00000018 __fp_lock_all
0800d510 g F .text 00000048 alt_ic_irq_enabled
0800d650 g F .text 00000098 alt_alarm_stop
080118b4 g O .bss 00000004 alt_irq_active
080000ec g F .exceptions 000000c8 alt_irq_handler
0800ea50 g O .rwdata 00000028 alt_dev_null
0800d0dc g F .text 0000001c alt_dcache_flush_all
08005944 g F .text 00000070 __hi0bits
0800ca50 g F .text 000000c4 alt_up_pixel_buffer_dma_draw_rectangle
0800932c g F .text 000000d8 __fixdfsi
0800fd60 g *ABS* 00000000 __ram_rwdata_end
0800fd40 g O .rwdata 00000008 alt_dev_list
0800a744 g F .text 00000124 write
0800cbec g F .text 0000039c alt_up_pixel_buffer_dma_draw_line
0800e23c g *ABS* 00000000 __ram_rodata_end
08009f60 g F .text 000000d8 fstat
08006768 g F .text 00000120 __pow5mult
0801188c g O .bss 00000004 __nlocale_changed
080096dc g F .text 00000008 __umodsi3
08011b78 g *ABS* 00000000 end
0800b6e4 g F .text 00000084 alt_up_char_buffer_init
0800ad80 g F .text 000000c0 altera_avalon_jtag_uart_init
0800dc1c g *ABS* 00000000 __CTOR_LIST__
10000000 g *ABS* 00000000 __alt_stack_pointer
08009840 g F .text 00000080 __clzsi2
0800b4a4 g F .text 00000240 altera_avalon_jtag_uart_write
08003f90 g F .text 00000004 __sfp_lock_acquire
08005620 g F .text 000000e4 memchr
080004ec g F .text 00001ec4 ___vfprintf_internal_r
08004358 g F .text 00000314 _free_r
0800da0c g F .text 000001b0 __call_exitprocs
08011890 g O .bss 00000004 __mlocale_changed
0800fd34 g O .rwdata 00000004 __malloc_sbrk_base
080001b4 g F .text 0000003c _start
080118b8 g O .bss 00000004 _alt_tick_rate
08006260 g F .text 0000014c __lshift
080118bc g O .bss 00000004 _alt_nticks
0800a48c g F .text 00000124 read
0800a8fc g F .text 00000304 alt_sys_init
0800d8d4 g F .text 00000134 __register_exitproc
080063ac g F .text 00000254 __multiply
0800b118 g F .text 00000074 altera_avalon_jtag_uart_close
080096e4 g F .text 00000038 __mulsi3
0800e23c g *ABS* 00000000 __ram_rwdata_start
0800dc20 g *ABS* 00000000 __ram_rodata_start
080118c0 g O .bss 00000028 __malloc_current_mallinfo
08005f58 g F .text 0000017c __d2b
0800ac38 g F .text 00000058 altera_avalon_jtag_uart_read_fd
08009d0c g F .text 000000c8 __fpcmp_parts_d
08007438 g F .text 00000070 _close_r
0800d860 g F .text 00000074 memcmp
0800ace8 g F .text 00000048 altera_avalon_jtag_uart_close_fd
08011b78 g *ABS* 00000000 __alt_stack_base
0800ad30 g F .text 00000050 altera_avalon_jtag_uart_ioctl_fd
080023d4 g F .text 0000013c __swsetup_r
08008d34 g F .text 00000258 __divdf3
0800413c g F .text 000000f0 __sfp
08005dbc g F .text 00000058 __copybits
0800e648 g O .rwdata 00000408 __malloc_av_
08003f9c g F .text 00000004 __sinit_lock_release
08008970 g F .text 000003c4 __muldf3
08007168 g F .text 00000060 __sread
0800d0f8 g F .text 000000b4 alt_dev_llist_insert
0800a44c g F .text 00000020 __malloc_lock
0800a688 g F .text 000000bc sbrk
08003d08 g F .text 000001fc _fflush_r
08007370 g F .text 000000c8 _calloc_r
08011884 g *ABS* 00000000 __bss_start
08005884 g F .text 00000098 memset
080001f0 g F .text 0000022c main
080118b0 g O .bss 00000004 alt_envp
080118a0 g O .bss 00000004 __malloc_max_total_mem
0800bc2c g F .text 00000058 alt_up_pixel_buffer_dma_swap_buffers
0800b768 g F .text 00000040 alt_up_char_buffer_open_dev
0800ac90 g F .text 00000058 altera_avalon_jtag_uart_write_fd
0800707c g F .text 00000008 __sclose
10000000 g *ABS* 00000000 __alt_heap_limit
080075b8 g F .text 00000014 fclose
080119e8 g O .bss 00000190 _atexit0
08002754 g F .text 000015b4 _dtoa_r
08004ee0 g F .text 00000740 _malloc_r
0800fd4c g O .rwdata 00000004 alt_errno
08004bd0 g F .text 000000b8 _fwalk
08009614 g F .text 00000060 __divsi3
0800e078 g O .rodata 00000014 __thenan_df
0800422c g F .text 0000012c _malloc_trim_r
0800dc20 g *ABS* 00000000 __CTOR_END__
080071c8 g F .text 000000bc strcmp
0800dc20 g *ABS* 00000000 __flash_rodata_start
0800dc20 g *ABS* 00000000 __DTOR_LIST__
08009014 g F .text 00000088 __nedf2
0800a8c8 g F .text 00000034 alt_irq_init
0800a610 g F .text 00000078 alt_release_fd
0800e08c g O .rodata 00000100 __clz_tab
08011894 g O .bss 00000004 _PathLocale
0800d814 g F .text 00000014 atexit
080072f8 g F .text 00000078 _write_r
08004d30 g F .text 0000001c setlocale
0800fd20 g O .rwdata 00000004 _impure_ptr
080118a8 g O .bss 00000004 alt_argc
0800d270 g F .text 00000064 _do_dtors
08000000 g *ABS* 00000000 __alt_mem_sdram_0
08000020 g .exceptions 00000000 alt_irq_entry
08005ad8 g F .text 00000080 __ulp
08006f9c g F .text 00000040 __isinfd
08004054 g F .text 00000018 __fp_unlock_all
0800fd38 g O .rwdata 00000008 alt_fs_list
08000020 g *ABS* 00000000 __ram_exceptions_start
08004c9c g F .text 00000010 localeconv
08011888 g O .bss 00000004 pix_buffer
0800d384 g F .text 00000050 alt_ic_isr_register
0800fd60 g *ABS* 00000000 _edata
08011b78 g *ABS* 00000000 _end
080001b4 g *ABS* 00000000 __ram_exceptions_end
0800b18c g F .text 000000f4 altera_avalon_jtag_uart_ioctl
0800d470 g F .text 000000a0 alt_ic_irq_disable
080070ec g F .text 0000007c __swrite
0800fd30 g O .rwdata 00000004 __malloc_trim_threshold
0800d7f4 g F .text 00000020 altera_nios2_qsys_irq_init
0800d828 g F .text 00000038 exit
08004b08 g F .text 000000c8 _fwalk_reent
080060d4 g F .text 0000018c __mdiff
08009674 g F .text 00000060 __modsi3
10000000 g *ABS* 00000000 __alt_data_end
08000020 g F .exceptions 00000000 alt_exception
08003f94 g F .text 00000004 __sfp_lock_release
0800dbfc g F .text 00000020 _exit
08006fdc g F .text 00000030 __isnand
0800cf88 g F .text 00000154 alt_alarm_start
0800971c g F .text 00000124 __muldi3
08004d4c g F .text 00000194 __smakebuf_r
08007284 g F .text 00000074 strlen
08009124 g F .text 00000088 __gedf2
0800d368 g F .text 0000001c alt_icache_flush_all
0800fd54 g O .rwdata 00000004 alt_priority_mask
0800d3d4 g F .text 0000009c alt_ic_irq_enable
080023b0 g F .text 00000024 __vfprintf_internal
0800887c g F .text 00000080 __subdf3
080059b4 g F .text 000000c4 __lo0bits
0800fd58 g O .rwdata 00000008 alt_alarm_list
0800d20c g F .text 00000064 _do_ctors
08009dd4 g F .text 00000100 close
0800a1bc g F .text 00000080 alt_load
080098c0 g F .text 00000314 __pack_d
00000000 w *UND* 00000000 free
08003f98 g F .text 00000004 __sinit_lock_acquire
0800663c g F .text 0000012c __multadd
0800591c g F .text 00000028 _Bfree
Disassembly of section .entry:
08000000 <__reset>:
* Jump to the _start entry point in the .text section if reset code
* is allowed or if optimizing for RTL simulation.
*/
#if defined(ALT_ALLOW_CODE_AT_RESET) || defined(ALT_SIM_OPTIMIZE)
/* Jump to the _start entry point in the .text section. */
movhi r1, %hi(_start)
8000000: 00420034 movhi at,2048
ori r1, r1, %lo(_start)
8000004: 08406d14 ori at,at,436
jmp r1
8000008: 0800683a jmp at
...
Disassembly of section .exceptions:
08000020 <alt_exception>:
* Process an exception. For all exceptions we must preserve all
* caller saved registers on the stack (See the Nios2 ABI
* documentation for details).
*/
addi sp, sp, -76
8000020: deffed04 addi sp,sp,-76
#endif
#endif
stw ra, 0(sp)
8000024: dfc00015 stw ra,0(sp)
/*
* Leave a gap in the stack frame at 4(sp) for the muldiv handler to
* store zero into.
*/
stw r1, 8(sp)
8000028: d8400215 stw at,8(sp)
stw r2, 12(sp)
800002c: d8800315 stw r2,12(sp)
stw r3, 16(sp)
8000030: d8c00415 stw r3,16(sp)
stw r4, 20(sp)
8000034: d9000515 stw r4,20(sp)
stw r5, 24(sp)
8000038: d9400615 stw r5,24(sp)
stw r6, 28(sp)
800003c: d9800715 stw r6,28(sp)
stw r7, 32(sp)
8000040: d9c00815 stw r7,32(sp)
rdctl r5, estatus
8000044: 000b307a rdctl r5,estatus
stw r8, 36(sp)
8000048: da000915 stw r8,36(sp)
stw r9, 40(sp)
800004c: da400a15 stw r9,40(sp)
stw r10, 44(sp)
8000050: da800b15 stw r10,44(sp)
stw r11, 48(sp)
8000054: dac00c15 stw r11,48(sp)
stw r12, 52(sp)
8000058: db000d15 stw r12,52(sp)
stw r13, 56(sp)
800005c: db400e15 stw r13,56(sp)
stw r14, 60(sp)
8000060: db800f15 stw r14,60(sp)
stw r15, 64(sp)
8000064: dbc01015 stw r15,64(sp)
/*
* ea-4 contains the address of the instruction being executed
* when the exception occured. For interrupt exceptions, we will
* will be re-issue the isntruction. Store it in 72(sp)
*/
stw r5, 68(sp) /* estatus */
8000068: d9401115 stw r5,68(sp)
addi r15, ea, -4 /* instruction that caused exception */
800006c: ebffff04 addi r15,ea,-4
stw r15, 72(sp)
8000070: dbc01215 stw r15,72(sp)
#else
/*
* Test to see if the exception was a software exception or caused
* by an external interrupt, and vector accordingly.
*/
rdctl r4, ipending
8000074: 0009313a rdctl r4,ipending
andi r2, r5, 1
8000078: 2880004c andi r2,r5,1
beq r2, zero, .Lnot_irq
800007c: 10000326 beq r2,zero,800008c <alt_exception+0x6c>
beq r4, zero, .Lnot_irq
8000080: 20000226 beq r4,zero,800008c <alt_exception+0x6c>
/*
* Now that all necessary registers have been preserved, call
* alt_irq_handler() to process the interrupts.
*/
call alt_irq_handler
8000084: 80000ec0 call 80000ec <alt_irq_handler>
.section .exceptions.irqreturn, "xa"
br .Lexception_exit
8000088: 00000306 br 8000098 <alt_exception+0x78>
* upon completion, so we write ea (address of instruction *after*
* the one where the exception occured) into 72(sp). The actual
* instruction that caused the exception is written in r2, which these
* handlers will utilize.
*/
stw ea, 72(sp) /* Don't re-issue */
800008c: df401215 stw ea,72(sp)
ldw r2, -4(ea) /* Instruction that caused exception */
8000090: e8bfff17 ldw r2,-4(ea)
#ifdef NIOS2_HAS_DEBUG_STUB
/*
* Either tell the user now (if there is a debugger attached) or go into
* the debug monitor which will loop until a debugger is attached.
*/
break
8000094: 003da03a break 0
/*
* Restore the saved registers, so that all general purpose registers
* have been restored to their state at the time the interrupt occured.
*/
ldw r5, 68(sp)
8000098: d9401117 ldw r5,68(sp)
ldw ea, 72(sp) /* This becomes the PC once eret is executed */
800009c: df401217 ldw ea,72(sp)
ldw ra, 0(sp)
80000a0: dfc00017 ldw ra,0(sp)
wrctl estatus, r5
80000a4: 2801707a wrctl estatus,r5
ldw r1, 8(sp)
80000a8: d8400217 ldw at,8(sp)
ldw r2, 12(sp)
80000ac: d8800317 ldw r2,12(sp)
ldw r3, 16(sp)
80000b0: d8c00417 ldw r3,16(sp)
ldw r4, 20(sp)
80000b4: d9000517 ldw r4,20(sp)
ldw r5, 24(sp)
80000b8: d9400617 ldw r5,24(sp)
ldw r6, 28(sp)
80000bc: d9800717 ldw r6,28(sp)
ldw r7, 32(sp)
80000c0: d9c00817 ldw r7,32(sp)
#ifdef ALT_STACK_CHECK
ldw et, %gprel(alt_exception_old_stack_limit)(gp)
#endif
#endif
ldw r8, 36(sp)
80000c4: da000917 ldw r8,36(sp)
ldw r9, 40(sp)
80000c8: da400a17 ldw r9,40(sp)
ldw r10, 44(sp)
80000cc: da800b17 ldw r10,44(sp)
ldw r11, 48(sp)
80000d0: dac00c17 ldw r11,48(sp)
ldw r12, 52(sp)
80000d4: db000d17 ldw r12,52(sp)
ldw r13, 56(sp)
80000d8: db400e17 ldw r13,56(sp)
ldw r14, 60(sp)
80000dc: db800f17 ldw r14,60(sp)
ldw r15, 64(sp)
80000e0: dbc01017 ldw r15,64(sp)
#endif
ldw sp, 76(sp)
#else
addi sp, sp, 76
80000e4: dec01304 addi sp,sp,76
/*
* Return to the interrupted instruction.
*/
eret
80000e8: ef80083a eret
080000ec <alt_irq_handler>:
* instruction is present if the macro ALT_CI_INTERRUPT_VECTOR defined.
*/
void alt_irq_handler (void) __attribute__ ((section (".exceptions")));
void alt_irq_handler (void)
{
80000ec: defff904 addi sp,sp,-28
80000f0: dfc00615 stw ra,24(sp)
80000f4: df000515 stw fp,20(sp)
80000f8: df000504 addi fp,sp,20
#ifndef NIOS2_EIC_PRESENT
static ALT_INLINE alt_u32 ALT_ALWAYS_INLINE alt_irq_pending (void)
{
alt_u32 active;
NIOS2_READ_IPENDING (active);
80000fc: 0005313a rdctl r2,ipending
8000100: e0bffc15 stw r2,-16(fp)
return active;
8000104: e0bffc17 ldw r2,-16(fp)
* Consider the case where the high priority interupt is asserted during
* the interrupt entry sequence for a lower priority interrupt to see why
* this is the case.
*/
active = alt_irq_pending ();
8000108: e0bfff15 stw r2,-4(fp)
do
{
i = 0;
800010c: e03ffd15 stw zero,-12(fp)
mask = 1;
8000110: 00800044 movi r2,1
8000114: e0bffe15 stw r2,-8(fp)
* called to clear the interrupt condition.
*/
do
{
if (active & mask)
8000118: e0ffff17 ldw r3,-4(fp)
800011c: e0bffe17 ldw r2,-8(fp)
8000120: 1884703a and r2,r3,r2
8000124: 1005003a cmpeq r2,r2,zero
8000128: 1000161e bne r2,zero,8000184 <alt_irq_handler+0x98>
{
#ifdef ALT_ENHANCED_INTERRUPT_API_PRESENT
alt_irq[i].handler(alt_irq[i].context);
800012c: e0bffd17 ldw r2,-12(fp)
8000130: 00c20074 movhi r3,2049
8000134: 18c63a04 addi r3,r3,6376
8000138: 100490fa slli r2,r2,3
800013c: 10c5883a add r2,r2,r3
8000140: 11400017 ldw r5,0(r2)
8000144: e0bffd17 ldw r2,-12(fp)
8000148: 00c20074 movhi r3,2049
800014c: 18c63a04 addi r3,r3,6376
8000150: 100490fa slli r2,r2,3
8000154: 10c5883a add r2,r2,r3
8000158: 10800104 addi r2,r2,4
800015c: 11000017 ldw r4,0(r2)
8000160: 283ee83a callr r5
#ifndef NIOS2_EIC_PRESENT
static ALT_INLINE alt_u32 ALT_ALWAYS_INLINE alt_irq_pending (void)
{
alt_u32 active;
NIOS2_READ_IPENDING (active);
8000164: 0005313a rdctl r2,ipending
8000168: e0bffb15 stw r2,-20(fp)
return active;
800016c: e0bffb17 ldw r2,-20(fp)
mask <<= 1;
i++;
} while (1);
active = alt_irq_pending ();
8000170: e0bfff15 stw r2,-4(fp)
} while (active);
8000174: e0bfff17 ldw r2,-4(fp)
8000178: 1004c03a cmpne r2,r2,zero
800017c: 103fe31e bne r2,zero,800010c <alt_irq_handler+0x20>
8000180: 00000706 br 80001a0 <alt_irq_handler+0xb4>
#else
alt_irq[i].handler(alt_irq[i].context, i);
#endif
break;
}
mask <<= 1;
8000184: e0bffe17 ldw r2,-8(fp)
8000188: 1085883a add r2,r2,r2
800018c: e0bffe15 stw r2,-8(fp)
i++;
8000190: e0bffd17 ldw r2,-12(fp)
8000194: 10800044 addi r2,r2,1
8000198: e0bffd15 stw r2,-12(fp)
} while (1);
800019c: 003fde06 br 8000118 <alt_irq_handler+0x2c>
/*
* Notify the operating system that interrupt processing is complete.
*/
ALT_OS_INT_EXIT();
}
80001a0: e037883a mov sp,fp
80001a4: dfc00117 ldw ra,4(sp)
80001a8: df000017 ldw fp,0(sp)
80001ac: dec00204 addi sp,sp,8
80001b0: f800283a ret
Disassembly of section .text:
080001b4 <_start>:
#if (NIOS2_NUM_OF_SHADOW_REG_SETS == 0)
/*
* Now that the caches are initialized, set up the stack pointer.
* The value provided by the linker is assumed to be correctly aligned.
*/
movhi sp, %hi(__alt_stack_pointer)
80001b4: 06c40034 movhi sp,4096
ori sp, sp, %lo(__alt_stack_pointer)
80001b8: dec00014 ori sp,sp,0
/* Set up the global pointer. */
movhi gp, %hi(_gp)
80001bc: 06820074 movhi gp,2049
ori gp, gp, %lo(_gp)
80001c0: d69f4814 ori gp,gp,32032
*/
#ifndef ALT_SIM_OPTIMIZE
/* Log that the BSS is about to be cleared. */
ALT_LOG_PUTS(alt_log_msg_bss)
movhi r2, %hi(__bss_start)
80001c4: 00820074 movhi r2,2049
ori r2, r2, %lo(__bss_start)
80001c8: 10862114 ori r2,r2,6276
movhi r3, %hi(__bss_end)
80001cc: 00c20074 movhi r3,2049
ori r3, r3, %lo(__bss_end)
80001d0: 18c6de14 ori r3,r3,7032
beq r2, r3, 1f
80001d4: 10c00326 beq r2,r3,80001e4 <_start+0x30>
0:
stw zero, (r2)
80001d8: 10000015 stw zero,0(r2)
addi r2, r2, 4
80001dc: 10800104 addi r2,r2,4
bltu r2, r3, 0b
80001e0: 10fffd36 bltu r2,r3,80001d8 <_start+0x24>
* section aren't defined until alt_load() has been called).
*/
mov et, zero
#endif
call alt_load
80001e4: 800a1bc0 call 800a1bc <alt_load>
/* Log that alt_main is about to be called. */
ALT_LOG_PUTS(alt_log_msg_alt_main)
/* Call the C entry point. It should never return. */
call alt_main
80001e8: 800a3fc0 call 800a3fc <alt_main>
080001ec <alt_after_alt_main>:
/* Wait in infinite loop in case alt_main does return. */
alt_after_alt_main:
br alt_after_alt_main
80001ec: 003fff06 br 80001ec <alt_after_alt_main>
080001f0 <main>:
alt_up_char_buffer_dev* char_buffer; // Character Buffer for Altera
alt_up_pixel_buffer_dma_dev* pix_buffer; // Color/pixel Buffer for Altera
int main()
{
80001f0: defffa04 addi sp,sp,-24
80001f4: dfc00515 stw ra,20(sp)
80001f8: df000415 stw fp,16(sp)
80001fc: df000404 addi fp,sp,16
alt_up_char_buffer_init(char_buffer); // Initialize buffer
8000200: d126d917 ldw r4,-25756(gp)
8000204: 800b6e40 call 800b6e4 <alt_up_char_buffer_init>
//alt_up_char_buffer_init(pix_buffer); // Initialize buffer
char_buffer = alt_up_char_buffer_open_dev("/dev/Char_Buffer_with_DMA"); // Name must be "/dev/" followed by instance name
8000208: 01020074 movhi r4,2049
800020c: 21370804 addi r4,r4,-9184
8000210: 800b7680 call 800b768 <alt_up_char_buffer_open_dev>
8000214: d0a6d915 stw r2,-25756(gp)
pix_buffer = alt_up_pixel_buffer_dma_open_dev("/dev/Pixel_Buffer_DMA"); // Same with Pixel Buffer
8000218: 01020074 movhi r4,2049
800021c: 21370f04 addi r4,r4,-9156
8000220: 800b9e80 call 800b9e8 <alt_up_pixel_buffer_dma_open_dev>
8000224: d0a6da15 stw r2,-25752(gp)
if(!char_buffer || !pix_buffer) // Buffer fails to load if its NULL
8000228: d0a6d917 ldw r2,-25756(gp)
800022c: 1005003a cmpeq r2,r2,zero
8000230: 1000031e bne r2,zero,8000240 <main+0x50>
8000234: d0a6da17 ldw r2,-25752(gp)
8000238: 1004c03a cmpne r2,r2,zero
800023c: 1000041e bne r2,zero,8000250 <main+0x60>
printf("Failed to load buffer(s)!");
8000240: 01020074 movhi r4,2049
8000244: 21371504 addi r4,r4,-9132
8000248: 800041c0 call 800041c <printf>
alt_up_char_buffer_init(char_buffer); // Initialize buffer
//alt_up_char_buffer_init(pix_buffer); // Initialize buffer
char_buffer = alt_up_char_buffer_open_dev("/dev/Char_Buffer_with_DMA"); // Name must be "/dev/" followed by instance name
pix_buffer = alt_up_pixel_buffer_dma_open_dev("/dev/Pixel_Buffer_DMA"); // Same with Pixel Buffer
if(!char_buffer || !pix_buffer) // Buffer fails to load if its NULL
800024c: 00000306 br 800025c <main+0x6c>
printf("Failed to load buffer(s)!");
else
printf("Successfully loaded buffer(s)!");
8000250: 01020074 movhi r4,2049
8000254: 21371c04 addi r4,r4,-9104
8000258: 800041c0 call 800041c <printf>
alt_up_char_buffer_clear(char_buffer); // Clear the screen
800025c: d126d917 ldw r4,-25756(gp)
8000260: 800b98c0 call 800b98c <alt_up_char_buffer_clear>
alt_up_char_buffer_string(char_buffer, "UCR CS179J - NES FPGA Emulator!", 0,0);
8000264: d126d917 ldw r4,-25756(gp)
8000268: 01420074 movhi r5,2049
800026c: 29772404 addi r5,r5,-9072
8000270: 000d883a mov r6,zero
8000274: 000f883a mov r7,zero
8000278: 800b8780 call 800b878 <alt_up_char_buffer_string>
alt_up_char_buffer_string(char_buffer, "Select Game:", 20,20);
800027c: d126d917 ldw r4,-25756(gp)
8000280: 01420074 movhi r5,2049
8000284: 29772c04 addi r5,r5,-9040
8000288: 01800504 movi r6,20
800028c: 01c00504 movi r7,20
8000290: 800b8780 call 800b878 <alt_up_char_buffer_string>
alt_up_char_buffer_string(char_buffer, "1. Mario Bros.", 20,21);
8000294: d126d917 ldw r4,-25756(gp)
8000298: 01420074 movhi r5,2049
800029c: 29773004 addi r5,r5,-9024
80002a0: 01800504 movi r6,20
80002a4: 01c00544 movi r7,21
80002a8: 800b8780 call 800b878 <alt_up_char_buffer_string>
alt_up_char_buffer_string(char_buffer, "2. Donkey Kong", 20,22);
80002ac: d126d917 ldw r4,-25756(gp)
80002b0: 01420074 movhi r5,2049
80002b4: 29773404 addi r5,r5,-9008
80002b8: 01800504 movi r6,20
80002bc: 01c00584 movi r7,22
80002c0: 800b8780 call 800b878 <alt_up_char_buffer_string>
alt_up_char_buffer_string(char_buffer, "// ----------------------------------------------------------", 0,1);
80002c4: d126d917 ldw r4,-25756(gp)
80002c8: 01420074 movhi r5,2049
80002cc: 29773804 addi r5,r5,-8992
80002d0: 000d883a mov r6,zero
80002d4: 01c00044 movi r7,1
80002d8: 800b8780 call 800b878 <alt_up_char_buffer_string>
alt_up_char_buffer_string(char_buffer, "// _ __ _____ ______ _______ ", 0,2);
80002dc: d126d917 ldw r4,-25756(gp)
80002e0: 01420074 movhi r5,2049
80002e4: 29774804 addi r5,r5,-8928
80002e8: 000d883a mov r6,zero
80002ec: 01c00084 movi r7,2
80002f0: 800b8780 call 800b878 <alt_up_char_buffer_string>
alt_up_char_buffer_string(char_buffer, "// / \\ / / / ___/ / ____/ | ____| ",0,3);
80002f4: d126d917 ldw r4,-25756(gp)
80002f8: 01420074 movhi r5,2049
80002fc: 29775704 addi r5,r5,-8868
8000300: 000d883a mov r6,zero
8000304: 01c000c4 movi r7,3
8000308: 800b8780 call 800b878 <alt_up_char_buffer_string>
alt_up_char_buffer_string(char_buffer, "// / \\ / / / /__ \\ \\ ___ | |___ ",0,4);
800030c: d126d917 ldw r4,-25756(gp)
8000310: 01420074 movhi r5,2049
8000314: 29776604 addi r5,r5,-8808
8000318: 000d883a mov r6,zero
800031c: 01c00104 movi r7,4
8000320: 800b8780 call 800b878 <alt_up_char_buffer_string>
alt_up_char_buffer_string(char_buffer, "// / / \\ \\ / / / ___/ \\ \\ |___| | ___| :)",0,5);
8000324: d126d917 ldw r4,-25756(gp)
8000328: 01420074 movhi r5,2049
800032c: 29777404 addi r5,r5,-8752
8000330: 000d883a mov r6,zero
8000334: 01c00144 movi r7,5
8000338: 800b8780 call 800b878 <alt_up_char_buffer_string>
alt_up_char_buffer_string(char_buffer, "// / / \\ \\/ / / /___ ____\\ \\ | | ",0,6);
800033c: d126d917 ldw r4,-25756(gp)
8000340: 01420074 movhi r5,2049
8000344: 29778404 addi r5,r5,-8688
8000348: 000d883a mov r6,zero
800034c: 01c00184 movi r7,6
8000350: 800b8780 call 800b878 <alt_up_char_buffer_string>
alt_up_char_buffer_string(char_buffer, "// /_/ \\__/ /_____/ /_______/ |__| ",0,7);
8000354: d126d917 ldw r4,-25756(gp)
8000358: 01420074 movhi r5,2049
800035c: 29779204 addi r5,r5,-8632
8000360: 000d883a mov r6,zero
8000364: 01c001c4 movi r7,7
8000368: 800b8780 call 800b878 <alt_up_char_buffer_string>
alt_up_char_buffer_string(char_buffer, "// ----------------------------------------------------------",0,8);
800036c: d126d917 ldw r4,-25756(gp)
8000370: 01420074 movhi r5,2049
8000374: 29773804 addi r5,r5,-8992
8000378: 000d883a mov r6,zero
800037c: 01c00204 movi r7,8
8000380: 800b8780 call 800b878 <alt_up_char_buffer_string>
alt_up_pixel_buffer_dma_clear_screen( pix_buffer, 0 );
8000384: d126da17 ldw r4,-25752(gp)
8000388: 000b883a mov r5,zero
800038c: 800bcb80 call 800bcb8 <alt_up_pixel_buffer_dma_clear_screen>
alt_up_pixel_buffer_dma_draw( pix_buffer, 0xFFFFF, 11, 11);
8000390: d126da17 ldw r4,-25752(gp)
8000394: 01400434 movhi r5,16
8000398: 297fffc4 addi r5,r5,-1
800039c: 018002c4 movi r6,11
80003a0: 01c002c4 movi r7,11
80003a4: 800ba280 call 800ba28 <alt_up_pixel_buffer_dma_draw>
alt_up_pixel_buffer_dma_draw_box ( pix_buffer, 0, 0, 640, 480, 0xFF5FF, 0);
80003a8: d126da17 ldw r4,-25752(gp)
80003ac: 00807804 movi r2,480
80003b0: d8800015 stw r2,0(sp)
80003b4: 00800434 movhi r2,16
80003b8: 10bd7fc4 addi r2,r2,-2561
80003bc: d8800115 stw r2,4(sp)
80003c0: d8000215 stw zero,8(sp)
80003c4: 000b883a mov r5,zero
80003c8: 000d883a mov r6,zero
80003cc: 01c0a004 movi r7,640
80003d0: 800be240 call 800be24 <alt_up_pixel_buffer_dma_draw_box>
char switchp = 0;
80003d4: e03fff05 stb zero,-4(fp)
while(1)
{
if(switchp)
80003d8: e0bfff07 ldb r2,-4(fp)
80003dc: 1005003a cmpeq r2,r2,zero
80003e0: 10000a1e bne r2,zero,800040c <main+0x21c>
alt_up_pixel_buffer_dma_draw_box( pix_buffer, 50, 50, 320, 240, 0x05FF, 0);
80003e4: d126da17 ldw r4,-25752(gp)
80003e8: 00803c04 movi r2,240
80003ec: d8800015 stw r2,0(sp)
80003f0: 00817fc4 movi r2,1535
80003f4: d8800115 stw r2,4(sp)
80003f8: d8000215 stw zero,8(sp)
80003fc: 01400c84 movi r5,50
8000400: 01800c84 movi r6,50
8000404: 01c05004 movi r7,320
8000408: 800be240 call 800be24 <alt_up_pixel_buffer_dma_draw_box>
switchp = !switchp;
800040c: e0bfff07 ldb r2,-4(fp)
8000410: 1005003a cmpeq r2,r2,zero
8000414: e0bfff05 stb r2,-4(fp)
}
8000418: 003fef06 br 80003d8 <main+0x1e8>
0800041c <printf>:
800041c: defffb04 addi sp,sp,-20
8000420: dfc00115 stw ra,4(sp)
8000424: d9400215 stw r5,8(sp)
8000428: d9800315 stw r6,12(sp)
800042c: d9c00415 stw r7,16(sp)
8000430: 00820074 movhi r2,2049
8000434: 10bf4804 addi r2,r2,-736
8000438: 10c00017 ldw r3,0(r2)
800043c: 200b883a mov r5,r4
8000440: d8800204 addi r2,sp,8
8000444: 19000217 ldw r4,8(r3)
8000448: 100d883a mov r6,r2
800044c: d8800015 stw r2,0(sp)
8000450: 80023b00 call 80023b0 <__vfprintf_internal>
8000454: dfc00117 ldw ra,4(sp)
8000458: dec00504 addi sp,sp,20
800045c: f800283a ret
08000460 <_printf_r>:
8000460: defffc04 addi sp,sp,-16
8000464: dfc00115 stw ra,4(sp)
8000468: d9800215 stw r6,8(sp)
800046c: d9c00315 stw r7,12(sp)
8000470: 280d883a mov r6,r5
8000474: 21400217 ldw r5,8(r4)
8000478: d8c00204 addi r3,sp,8
800047c: 180f883a mov r7,r3
8000480: d8c00015 stw r3,0(sp)
8000484: 80004ec0 call 80004ec <___vfprintf_internal_r>
8000488: dfc00117 ldw ra,4(sp)
800048c: dec00404 addi sp,sp,16
8000490: f800283a ret
08000494 <__sprint_r>:
8000494: 30800217 ldw r2,8(r6)
8000498: defffe04 addi sp,sp,-8
800049c: dc000015 stw r16,0(sp)
80004a0: dfc00115 stw ra,4(sp)
80004a4: 3021883a mov r16,r6
80004a8: 0007883a mov r3,zero
80004ac: 1000061e bne r2,zero,80004c8 <__sprint_r+0x34>
80004b0: 1805883a mov r2,r3
80004b4: 30000115 stw zero,4(r6)
80004b8: dfc00117 ldw ra,4(sp)
80004bc: dc000017 ldw r16,0(sp)
80004c0: dec00204 addi sp,sp,8
80004c4: f800283a ret
80004c8: 800466c0 call 800466c <__sfvwrite_r>
80004cc: 1007883a mov r3,r2
80004d0: 1805883a mov r2,r3
80004d4: 80000115 stw zero,4(r16)
80004d8: 80000215 stw zero,8(r16)
80004dc: dfc00117 ldw ra,4(sp)
80004e0: dc000017 ldw r16,0(sp)
80004e4: dec00204 addi sp,sp,8
80004e8: f800283a ret
080004ec <___vfprintf_internal_r>:
80004ec: defea404 addi sp,sp,-1392
80004f0: dd815815 stw r22,1376(sp)
80004f4: dc015215 stw r16,1352(sp)
80004f8: d9c15115 stw r7,1348(sp)
80004fc: dfc15b15 stw ra,1388(sp)
8000500: df015a15 stw fp,1384(sp)
8000504: ddc15915 stw r23,1380(sp)
8000508: dd415715 stw r21,1372(sp)
800050c: dd015615 stw r20,1368(sp)
8000510: dcc15515 stw r19,1364(sp)
8000514: dc815415 stw r18,1360(sp)
8000518: dc415315 stw r17,1356(sp)
800051c: 282d883a mov r22,r5
8000520: 3021883a mov r16,r6
8000524: d9014f15 stw r4,1340(sp)
8000528: 8004c900 call 8004c90 <_localeconv_r>
800052c: 10800017 ldw r2,0(r2)
8000530: d9c15117 ldw r7,1348(sp)
8000534: d8814915 stw r2,1316(sp)
8000538: d8814f17 ldw r2,1340(sp)
800053c: 10000226 beq r2,zero,8000548 <___vfprintf_internal_r+0x5c>
8000540: 10800e17 ldw r2,56(r2)
8000544: 10020d26 beq r2,zero,8000d7c <___vfprintf_internal_r+0x890>
8000548: b080030b ldhu r2,12(r22)
800054c: 1080020c andi r2,r2,8
8000550: 10020e26 beq r2,zero,8000d8c <___vfprintf_internal_r+0x8a0>
8000554: b0800417 ldw r2,16(r22)
8000558: 10020c26 beq r2,zero,8000d8c <___vfprintf_internal_r+0x8a0>
800055c: b200030b ldhu r8,12(r22)
8000560: 00800284 movi r2,10
8000564: 40c0068c andi r3,r8,26
8000568: 18802f1e bne r3,r2,8000628 <___vfprintf_internal_r+0x13c>
800056c: b080038f ldh r2,14(r22)
8000570: 10002d16 blt r2,zero,8000628 <___vfprintf_internal_r+0x13c>
8000574: b240038b ldhu r9,14(r22)
8000578: b2800717 ldw r10,28(r22)
800057c: b2c00917 ldw r11,36(r22)
8000580: d9014f17 ldw r4,1340(sp)
8000584: dc402904 addi r17,sp,164
8000588: d8804004 addi r2,sp,256
800058c: 00c10004 movi r3,1024
8000590: 423fff4c andi r8,r8,65533
8000594: 800d883a mov r6,r16
8000598: 880b883a mov r5,r17
800059c: da002c0d sth r8,176(sp)
80005a0: da402c8d sth r9,178(sp)
80005a4: da803015 stw r10,192(sp)
80005a8: dac03215 stw r11,200(sp)
80005ac: d8802d15 stw r2,180(sp)
80005b0: d8c02e15 stw r3,184(sp)
80005b4: d8802915 stw r2,164(sp)
80005b8: d8c02b15 stw r3,172(sp)
80005bc: d8002f15 stw zero,188(sp)
80005c0: 80004ec0 call 80004ec <___vfprintf_internal_r>
80005c4: d8814b15 stw r2,1324(sp)
80005c8: 10000416 blt r2,zero,80005dc <___vfprintf_internal_r+0xf0>
80005cc: d9014f17 ldw r4,1340(sp)
80005d0: 880b883a mov r5,r17
80005d4: 8003d080 call 8003d08 <_fflush_r>
80005d8: 1002321e bne r2,zero,8000ea4 <___vfprintf_internal_r+0x9b8>
80005dc: d8802c0b ldhu r2,176(sp)
80005e0: 1080100c andi r2,r2,64
80005e4: 10000326 beq r2,zero,80005f4 <___vfprintf_internal_r+0x108>
80005e8: b080030b ldhu r2,12(r22)
80005ec: 10801014 ori r2,r2,64
80005f0: b080030d sth r2,12(r22)
80005f4: d8814b17 ldw r2,1324(sp)
80005f8: dfc15b17 ldw ra,1388(sp)
80005fc: df015a17 ldw fp,1384(sp)
8000600: ddc15917 ldw r23,1380(sp)
8000604: dd815817 ldw r22,1376(sp)
8000608: dd415717 ldw r21,1372(sp)
800060c: dd015617 ldw r20,1368(sp)
8000610: dcc15517 ldw r19,1364(sp)
8000614: dc815417 ldw r18,1360(sp)
8000618: dc415317 ldw r17,1356(sp)
800061c: dc015217 ldw r16,1352(sp)
8000620: dec15c04 addi sp,sp,1392
8000624: f800283a ret
8000628: 0005883a mov r2,zero
800062c: 0007883a mov r3,zero
8000630: dd401904 addi r21,sp,100
8000634: d8814215 stw r2,1288(sp)
8000638: 802f883a mov r23,r16
800063c: d8c14315 stw r3,1292(sp)
8000640: d8014b15 stw zero,1324(sp)
8000644: d8014815 stw zero,1312(sp)
8000648: d8014415 stw zero,1296(sp)
800064c: d8014715 stw zero,1308(sp)
8000650: dd400c15 stw r21,48(sp)
8000654: d8000e15 stw zero,56(sp)
8000658: d8000d15 stw zero,52(sp)
800065c: b8800007 ldb r2,0(r23)
8000660: 10001926 beq r2,zero,80006c8 <___vfprintf_internal_r+0x1dc>
8000664: 00c00944 movi r3,37
8000668: 10c01726 beq r2,r3,80006c8 <___vfprintf_internal_r+0x1dc>
800066c: b821883a mov r16,r23
8000670: 00000106 br 8000678 <___vfprintf_internal_r+0x18c>
8000674: 10c00326 beq r2,r3,8000684 <___vfprintf_internal_r+0x198>
8000678: 84000044 addi r16,r16,1
800067c: 80800007 ldb r2,0(r16)
8000680: 103ffc1e bne r2,zero,8000674 <___vfprintf_internal_r+0x188>
8000684: 85e7c83a sub r19,r16,r23
8000688: 98000e26 beq r19,zero,80006c4 <___vfprintf_internal_r+0x1d8>
800068c: dc800e17 ldw r18,56(sp)
8000690: dc400d17 ldw r17,52(sp)
8000694: 008001c4 movi r2,7
8000698: 94e5883a add r18,r18,r19
800069c: 8c400044 addi r17,r17,1
80006a0: adc00015 stw r23,0(r21)
80006a4: dc800e15 stw r18,56(sp)
80006a8: acc00115 stw r19,4(r21)
80006ac: dc400d15 stw r17,52(sp)
80006b0: 14428b16 blt r2,r17,80010e0 <___vfprintf_internal_r+0xbf4>
80006b4: ad400204 addi r21,r21,8
80006b8: d9014b17 ldw r4,1324(sp)
80006bc: 24c9883a add r4,r4,r19
80006c0: d9014b15 stw r4,1324(sp)
80006c4: 802f883a mov r23,r16
80006c8: b8800007 ldb r2,0(r23)
80006cc: 10013c26 beq r2,zero,8000bc0 <___vfprintf_internal_r+0x6d4>
80006d0: bdc00044 addi r23,r23,1
80006d4: d8000405 stb zero,16(sp)
80006d8: b8c00007 ldb r3,0(r23)
80006dc: 04ffffc4 movi r19,-1
80006e0: d8014c15 stw zero,1328(sp)
80006e4: d8014a15 stw zero,1320(sp)
80006e8: d8c14d15 stw r3,1332(sp)
80006ec: bdc00044 addi r23,r23,1
80006f0: d9414d17 ldw r5,1332(sp)
80006f4: 00801604 movi r2,88
80006f8: 28fff804 addi r3,r5,-32
80006fc: 10c06036 bltu r2,r3,8000880 <___vfprintf_internal_r+0x394>
8000700: 18c5883a add r2,r3,r3
8000704: 1085883a add r2,r2,r2
8000708: 00c20034 movhi r3,2048
800070c: 18c1c704 addi r3,r3,1820
8000710: 10c5883a add r2,r2,r3
8000714: 11000017 ldw r4,0(r2)
8000718: 2000683a jmp r4
800071c: 08001690 cmplti zero,at,90
8000720: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
8000724: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
8000728: 0800167c xorhi zero,at,89
800072c: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
8000730: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
8000734: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
8000738: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
800073c: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
8000740: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
8000744: 0800145c xori zero,at,81
8000748: 0800166c andhi zero,at,89
800074c: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
8000750: 08001474 orhi zero,at,81
8000754: 08001714 ori zero,at,92
8000758: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
800075c: 08001700 call 800170 <__alt_mem_sdram_0-0x77ffe90>
8000760: 080016bc xorhi zero,at,90
8000764: 080016bc xorhi zero,at,90
8000768: 080016bc xorhi zero,at,90
800076c: 080016bc xorhi zero,at,90
8000770: 080016bc xorhi zero,at,90
8000774: 080016bc xorhi zero,at,90
8000778: 080016bc xorhi zero,at,90
800077c: 080016bc xorhi zero,at,90
8000780: 080016bc xorhi zero,at,90
8000784: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
8000788: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
800078c: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
8000790: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
8000794: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
8000798: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
800079c: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
80007a0: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
80007a4: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
80007a8: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
80007ac: 08000ed8 cmpnei zero,at,59
80007b0: 08001544 addi zero,at,85
80007b4: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
80007b8: 08001544 addi zero,at,85
80007bc: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
80007c0: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
80007c4: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
80007c8: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
80007cc: 080016a8 cmpgeui zero,at,90
80007d0: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
80007d4: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
80007d8: 08000f8c andi zero,at,62
80007dc: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
80007e0: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
80007e4: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
80007e8: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
80007ec: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
80007f0: 08000fd8 cmpnei zero,at,63
80007f4: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
80007f8: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
80007fc: 080015f8 rdprs zero,at,87
8000800: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
8000804: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
8000808: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
800080c: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
8000810: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
8000814: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
8000818: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
800081c: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
8000820: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
8000824: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
8000828: 080015cc andi zero,at,87
800082c: 08000ee4 muli zero,at,59
8000830: 08001544 addi zero,at,85
8000834: 08001544 addi zero,at,85
8000838: 08001544 addi zero,at,85
800083c: 08001530 cmpltui zero,at,84
8000840: 08000ee4 muli zero,at,59
8000844: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
8000848: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
800084c: 080014b8 rdprs zero,at,82
8000850: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
8000854: 08001488 cmpgei zero,at,82
8000858: 08000f98 cmpnei zero,at,62
800085c: 080014e8 cmpgeui zero,at,83
8000860: 080014d4 ori zero,at,83
8000864: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
8000868: 0800177c xorhi zero,at,93
800086c: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
8000870: 08000fe4 muli zero,at,63
8000874: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
8000878: 08000880 call 800088 <__alt_mem_sdram_0-0x77fff78>
800087c: 0800165c xori zero,at,89
8000880: d9014d17 ldw r4,1332(sp)
8000884: 2000ce26 beq r4,zero,8000bc0 <___vfprintf_internal_r+0x6d4>
8000888: 01400044 movi r5,1
800088c: d9800f04 addi r6,sp,60
8000890: d9c14015 stw r7,1280(sp)
8000894: d9414515 stw r5,1300(sp)
8000898: d9814115 stw r6,1284(sp)
800089c: 280f883a mov r7,r5
80008a0: d9000f05 stb r4,60(sp)
80008a4: d8000405 stb zero,16(sp)
80008a8: d8014615 stw zero,1304(sp)
80008ac: d8c14c17 ldw r3,1328(sp)
80008b0: 1880008c andi r2,r3,2
80008b4: 1005003a cmpeq r2,r2,zero
80008b8: d8815015 stw r2,1344(sp)
80008bc: 1000031e bne r2,zero,80008cc <___vfprintf_internal_r+0x3e0>
80008c0: d9014517 ldw r4,1300(sp)
80008c4: 21000084 addi r4,r4,2
80008c8: d9014515 stw r4,1300(sp)
80008cc: d9414c17 ldw r5,1328(sp)
80008d0: 2940210c andi r5,r5,132
80008d4: d9414e15 stw r5,1336(sp)
80008d8: 28002d1e bne r5,zero,8000990 <___vfprintf_internal_r+0x4a4>
80008dc: d9814a17 ldw r6,1320(sp)
80008e0: d8814517 ldw r2,1300(sp)
80008e4: 30a1c83a sub r16,r6,r2
80008e8: 0400290e bge zero,r16,8000990 <___vfprintf_internal_r+0x4a4>
80008ec: 00800404 movi r2,16
80008f0: 14045e0e bge r2,r16,8001a6c <___vfprintf_internal_r+0x1580>
80008f4: dc800e17 ldw r18,56(sp)
80008f8: dc400d17 ldw r17,52(sp)
80008fc: 1027883a mov r19,r2
8000900: 07020074 movhi fp,2049
8000904: e737bb84 addi fp,fp,-8466
8000908: 050001c4 movi r20,7
800090c: 00000306 br 800091c <___vfprintf_internal_r+0x430>
8000910: 843ffc04 addi r16,r16,-16
8000914: ad400204 addi r21,r21,8
8000918: 9c00130e bge r19,r16,8000968 <___vfprintf_internal_r+0x47c>
800091c: 94800404 addi r18,r18,16
8000920: 8c400044 addi r17,r17,1
8000924: af000015 stw fp,0(r21)
8000928: acc00115 stw r19,4(r21)
800092c: dc800e15 stw r18,56(sp)
8000930: dc400d15 stw r17,52(sp)
8000934: a47ff60e bge r20,r17,8000910 <___vfprintf_internal_r+0x424>
8000938: d9014f17 ldw r4,1340(sp)
800093c: b00b883a mov r5,r22
8000940: d9800c04 addi r6,sp,48
8000944: d9c15115 stw r7,1348(sp)
8000948: 80004940 call 8000494 <__sprint_r>
800094c: d9c15117 ldw r7,1348(sp)
8000950: 10009e1e bne r2,zero,8000bcc <___vfprintf_internal_r+0x6e0>
8000954: 843ffc04 addi r16,r16,-16
8000958: dc800e17 ldw r18,56(sp)
800095c: dc400d17 ldw r17,52(sp)
8000960: dd401904 addi r21,sp,100
8000964: 9c3fed16 blt r19,r16,800091c <___vfprintf_internal_r+0x430>
8000968: 9425883a add r18,r18,r16
800096c: 8c400044 addi r17,r17,1
8000970: 008001c4 movi r2,7
8000974: af000015 stw fp,0(r21)
8000978: ac000115 stw r16,4(r21)
800097c: dc800e15 stw r18,56(sp)
8000980: dc400d15 stw r17,52(sp)
8000984: 1441f516 blt r2,r17,800115c <___vfprintf_internal_r+0xc70>
8000988: ad400204 addi r21,r21,8
800098c: 00000206 br 8000998 <___vfprintf_internal_r+0x4ac>
8000990: dc800e17 ldw r18,56(sp)
8000994: dc400d17 ldw r17,52(sp)
8000998: d8800407 ldb r2,16(sp)
800099c: 10000b26 beq r2,zero,80009cc <___vfprintf_internal_r+0x4e0>
80009a0: 00800044 movi r2,1
80009a4: 94800044 addi r18,r18,1
80009a8: 8c400044 addi r17,r17,1
80009ac: a8800115 stw r2,4(r21)
80009b0: d8c00404 addi r3,sp,16
80009b4: 008001c4 movi r2,7
80009b8: a8c00015 stw r3,0(r21)
80009bc: dc800e15 stw r18,56(sp)
80009c0: dc400d15 stw r17,52(sp)
80009c4: 1441da16 blt r2,r17,8001130 <___vfprintf_internal_r+0xc44>
80009c8: ad400204 addi r21,r21,8
80009cc: d9015017 ldw r4,1344(sp)
80009d0: 20000b1e bne r4,zero,8000a00 <___vfprintf_internal_r+0x514>
80009d4: d8800444 addi r2,sp,17
80009d8: 94800084 addi r18,r18,2
80009dc: 8c400044 addi r17,r17,1
80009e0: a8800015 stw r2,0(r21)
80009e4: 00c00084 movi r3,2
80009e8: 008001c4 movi r2,7
80009ec: a8c00115 stw r3,4(r21)
80009f0: dc800e15 stw r18,56(sp)
80009f4: dc400d15 stw r17,52(sp)
80009f8: 1441c216 blt r2,r17,8001104 <___vfprintf_internal_r+0xc18>
80009fc: ad400204 addi r21,r21,8
8000a00: d9414e17 ldw r5,1336(sp)
8000a04: 00802004 movi r2,128
8000a08: 2880b126 beq r5,r2,8000cd0 <___vfprintf_internal_r+0x7e4>
8000a0c: d8c14617 ldw r3,1304(sp)
8000a10: 19e1c83a sub r16,r3,r7
8000a14: 0400260e bge zero,r16,8000ab0 <___vfprintf_internal_r+0x5c4>
8000a18: 00800404 movi r2,16
8000a1c: 1403cf0e bge r2,r16,800195c <___vfprintf_internal_r+0x1470>
8000a20: 1027883a mov r19,r2
8000a24: 07020074 movhi fp,2049
8000a28: e737b784 addi fp,fp,-8482
8000a2c: 050001c4 movi r20,7
8000a30: 00000306 br 8000a40 <___vfprintf_internal_r+0x554>
8000a34: 843ffc04 addi r16,r16,-16
8000a38: ad400204 addi r21,r21,8
8000a3c: 9c00130e bge r19,r16,8000a8c <___vfprintf_internal_r+0x5a0>
8000a40: 94800404 addi r18,r18,16
8000a44: 8c400044 addi r17,r17,1
8000a48: af000015 stw fp,0(r21)
8000a4c: acc00115 stw r19,4(r21)
8000a50: dc800e15 stw r18,56(sp)
8000a54: dc400d15 stw r17,52(sp)
8000a58: a47ff60e bge r20,r17,8000a34 <___vfprintf_internal_r+0x548>
8000a5c: d9014f17 ldw r4,1340(sp)
8000a60: b00b883a mov r5,r22
8000a64: d9800c04 addi r6,sp,48
8000a68: d9c15115 stw r7,1348(sp)
8000a6c: 80004940 call 8000494 <__sprint_r>
8000a70: d9c15117 ldw r7,1348(sp)
8000a74: 1000551e bne r2,zero,8000bcc <___vfprintf_internal_r+0x6e0>
8000a78: 843ffc04 addi r16,r16,-16
8000a7c: dc800e17 ldw r18,56(sp)
8000a80: dc400d17 ldw r17,52(sp)
8000a84: dd401904 addi r21,sp,100
8000a88: 9c3fed16 blt r19,r16,8000a40 <___vfprintf_internal_r+0x554>
8000a8c: 9425883a add r18,r18,r16
8000a90: 8c400044 addi r17,r17,1
8000a94: 008001c4 movi r2,7
8000a98: af000015 stw fp,0(r21)
8000a9c: ac000115 stw r16,4(r21)
8000aa0: dc800e15 stw r18,56(sp)
8000aa4: dc400d15 stw r17,52(sp)
8000aa8: 14418216 blt r2,r17,80010b4 <___vfprintf_internal_r+0xbc8>
8000aac: ad400204 addi r21,r21,8
8000ab0: d9014c17 ldw r4,1328(sp)
8000ab4: 2080400c andi r2,r4,256
8000ab8: 10004a1e bne r2,zero,8000be4 <___vfprintf_internal_r+0x6f8>
8000abc: d9414117 ldw r5,1284(sp)
8000ac0: 91e5883a add r18,r18,r7
8000ac4: 8c400044 addi r17,r17,1
8000ac8: 008001c4 movi r2,7
8000acc: a9400015 stw r5,0(r21)
8000ad0: a9c00115 stw r7,4(r21)
8000ad4: dc800e15 stw r18,56(sp)
8000ad8: dc400d15 stw r17,52(sp)
8000adc: 14416716 blt r2,r17,800107c <___vfprintf_internal_r+0xb90>
8000ae0: a8c00204 addi r3,r21,8
8000ae4: d9814c17 ldw r6,1328(sp)
8000ae8: 3080010c andi r2,r6,4
8000aec: 10002826 beq r2,zero,8000b90 <___vfprintf_internal_r+0x6a4>
8000af0: d8814a17 ldw r2,1320(sp)
8000af4: d9014517 ldw r4,1300(sp)
8000af8: 1121c83a sub r16,r2,r4
8000afc: 0400240e bge zero,r16,8000b90 <___vfprintf_internal_r+0x6a4>
8000b00: 00800404 movi r2,16
8000b04: 1404550e bge r2,r16,8001c5c <___vfprintf_internal_r+0x1770>
8000b08: dc400d17 ldw r17,52(sp)
8000b0c: 1027883a mov r19,r2
8000b10: 07020074 movhi fp,2049
8000b14: e737bb84 addi fp,fp,-8466
8000b18: 050001c4 movi r20,7
8000b1c: 00000306 br 8000b2c <___vfprintf_internal_r+0x640>
8000b20: 843ffc04 addi r16,r16,-16
8000b24: 18c00204 addi r3,r3,8
8000b28: 9c00110e bge r19,r16,8000b70 <___vfprintf_internal_r+0x684>
8000b2c: 94800404 addi r18,r18,16
8000b30: 8c400044 addi r17,r17,1
8000b34: 1f000015 stw fp,0(r3)
8000b38: 1cc00115 stw r19,4(r3)
8000b3c: dc800e15 stw r18,56(sp)
8000b40: dc400d15 stw r17,52(sp)
8000b44: a47ff60e bge r20,r17,8000b20 <___vfprintf_internal_r+0x634>
8000b48: d9014f17 ldw r4,1340(sp)
8000b4c: b00b883a mov r5,r22
8000b50: d9800c04 addi r6,sp,48
8000b54: 80004940 call 8000494 <__sprint_r>
8000b58: 10001c1e bne r2,zero,8000bcc <___vfprintf_internal_r+0x6e0>
8000b5c: 843ffc04 addi r16,r16,-16
8000b60: dc800e17 ldw r18,56(sp)
8000b64: dc400d17 ldw r17,52(sp)
8000b68: d8c01904 addi r3,sp,100
8000b6c: 9c3fef16 blt r19,r16,8000b2c <___vfprintf_internal_r+0x640>
8000b70: 9425883a add r18,r18,r16
8000b74: 8c400044 addi r17,r17,1
8000b78: 008001c4 movi r2,7
8000b7c: 1f000015 stw fp,0(r3)
8000b80: 1c000115 stw r16,4(r3)
8000b84: dc800e15 stw r18,56(sp)
8000b88: dc400d15 stw r17,52(sp)
8000b8c: 1440cb16 blt r2,r17,8000ebc <___vfprintf_internal_r+0x9d0>
8000b90: d8814a17 ldw r2,1320(sp)
8000b94: d9414517 ldw r5,1300(sp)
8000b98: 1140010e bge r2,r5,8000ba0 <___vfprintf_internal_r+0x6b4>
8000b9c: 2805883a mov r2,r5
8000ba0: d9814b17 ldw r6,1324(sp)
8000ba4: 308d883a add r6,r6,r2
8000ba8: d9814b15 stw r6,1324(sp)
8000bac: 90013b1e bne r18,zero,800109c <___vfprintf_internal_r+0xbb0>
8000bb0: d9c14017 ldw r7,1280(sp)
8000bb4: dd401904 addi r21,sp,100
8000bb8: d8000d15 stw zero,52(sp)
8000bbc: 003ea706 br 800065c <___vfprintf_internal_r+0x170>
8000bc0: d8800e17 ldw r2,56(sp)
8000bc4: 1005451e bne r2,zero,80020dc <___vfprintf_internal_r+0x1bf0>
8000bc8: d8000d15 stw zero,52(sp)
8000bcc: b080030b ldhu r2,12(r22)
8000bd0: 1080100c andi r2,r2,64
8000bd4: 103e8726 beq r2,zero,80005f4 <___vfprintf_internal_r+0x108>
8000bd8: 00bfffc4 movi r2,-1
8000bdc: d8814b15 stw r2,1324(sp)
8000be0: 003e8406 br 80005f4 <___vfprintf_internal_r+0x108>
8000be4: d9814d17 ldw r6,1332(sp)
8000be8: 00801944 movi r2,101
8000bec: 11806e16 blt r2,r6,8000da8 <___vfprintf_internal_r+0x8bc>
8000bf0: d9414717 ldw r5,1308(sp)
8000bf4: 00c00044 movi r3,1
8000bf8: 1943490e bge r3,r5,8001920 <___vfprintf_internal_r+0x1434>
8000bfc: d8814117 ldw r2,1284(sp)
8000c00: 94800044 addi r18,r18,1
8000c04: 8c400044 addi r17,r17,1
8000c08: a8800015 stw r2,0(r21)
8000c0c: 008001c4 movi r2,7
8000c10: a8c00115 stw r3,4(r21)
8000c14: dc800e15 stw r18,56(sp)
8000c18: dc400d15 stw r17,52(sp)
8000c1c: 1441ca16 blt r2,r17,8001348 <___vfprintf_internal_r+0xe5c>
8000c20: a8c00204 addi r3,r21,8
8000c24: d9014917 ldw r4,1316(sp)
8000c28: 00800044 movi r2,1
8000c2c: 94800044 addi r18,r18,1
8000c30: 8c400044 addi r17,r17,1
8000c34: 18800115 stw r2,4(r3)
8000c38: 008001c4 movi r2,7
8000c3c: 19000015 stw r4,0(r3)
8000c40: dc800e15 stw r18,56(sp)
8000c44: dc400d15 stw r17,52(sp)
8000c48: 1441b616 blt r2,r17,8001324 <___vfprintf_internal_r+0xe38>
8000c4c: 1cc00204 addi r19,r3,8
8000c50: d9014217 ldw r4,1288(sp)
8000c54: d9414317 ldw r5,1292(sp)
8000c58: 000d883a mov r6,zero
8000c5c: 000f883a mov r7,zero
8000c60: 80090140 call 8009014 <__nedf2>
8000c64: 10017426 beq r2,zero,8001238 <___vfprintf_internal_r+0xd4c>
8000c68: d9414717 ldw r5,1308(sp)
8000c6c: d9814117 ldw r6,1284(sp)
8000c70: 8c400044 addi r17,r17,1
8000c74: 2c85883a add r2,r5,r18
8000c78: 14bfffc4 addi r18,r2,-1
8000c7c: 28bfffc4 addi r2,r5,-1
8000c80: 30c00044 addi r3,r6,1
8000c84: 98800115 stw r2,4(r19)
8000c88: 008001c4 movi r2,7
8000c8c: 98c00015 stw r3,0(r19)
8000c90: dc800e15 stw r18,56(sp)
8000c94: dc400d15 stw r17,52(sp)
8000c98: 14418e16 blt r2,r17,80012d4 <___vfprintf_internal_r+0xde8>
8000c9c: 9cc00204 addi r19,r19,8
8000ca0: d9414817 ldw r5,1312(sp)
8000ca4: d8800804 addi r2,sp,32
8000ca8: 8c400044 addi r17,r17,1
8000cac: 9165883a add r18,r18,r5
8000cb0: 98800015 stw r2,0(r19)
8000cb4: 008001c4 movi r2,7
8000cb8: 99400115 stw r5,4(r19)
8000cbc: dc800e15 stw r18,56(sp)
8000cc0: dc400d15 stw r17,52(sp)
8000cc4: 1440ed16 blt r2,r17,800107c <___vfprintf_internal_r+0xb90>
8000cc8: 98c00204 addi r3,r19,8
8000ccc: 003f8506 br 8000ae4 <___vfprintf_internal_r+0x5f8>
8000cd0: d9814a17 ldw r6,1320(sp)
8000cd4: d8814517 ldw r2,1300(sp)
8000cd8: 30a1c83a sub r16,r6,r2
8000cdc: 043f4b0e bge zero,r16,8000a0c <___vfprintf_internal_r+0x520>
8000ce0: 00800404 movi r2,16
8000ce4: 14043a0e bge r2,r16,8001dd0 <___vfprintf_internal_r+0x18e4>
8000ce8: 1027883a mov r19,r2
8000cec: 07020074 movhi fp,2049
8000cf0: e737b784 addi fp,fp,-8482
8000cf4: 050001c4 movi r20,7
8000cf8: 00000306 br 8000d08 <___vfprintf_internal_r+0x81c>
8000cfc: 843ffc04 addi r16,r16,-16
8000d00: ad400204 addi r21,r21,8
8000d04: 9c00130e bge r19,r16,8000d54 <___vfprintf_internal_r+0x868>
8000d08: 94800404 addi r18,r18,16
8000d0c: 8c400044 addi r17,r17,1
8000d10: af000015 stw fp,0(r21)
8000d14: acc00115 stw r19,4(r21)
8000d18: dc800e15 stw r18,56(sp)
8000d1c: dc400d15 stw r17,52(sp)
8000d20: a47ff60e bge r20,r17,8000cfc <___vfprintf_internal_r+0x810>
8000d24: d9014f17 ldw r4,1340(sp)
8000d28: b00b883a mov r5,r22
8000d2c: d9800c04 addi r6,sp,48
8000d30: d9c15115 stw r7,1348(sp)
8000d34: 80004940 call 8000494 <__sprint_r>
8000d38: d9c15117 ldw r7,1348(sp)
8000d3c: 103fa31e bne r2,zero,8000bcc <___vfprintf_internal_r+0x6e0>
8000d40: 843ffc04 addi r16,r16,-16
8000d44: dc800e17 ldw r18,56(sp)
8000d48: dc400d17 ldw r17,52(sp)
8000d4c: dd401904 addi r21,sp,100
8000d50: 9c3fed16 blt r19,r16,8000d08 <___vfprintf_internal_r+0x81c>
8000d54: 9425883a add r18,r18,r16
8000d58: 8c400044 addi r17,r17,1
8000d5c: 008001c4 movi r2,7
8000d60: af000015 stw fp,0(r21)
8000d64: ac000115 stw r16,4(r21)
8000d68: dc800e15 stw r18,56(sp)
8000d6c: dc400d15 stw r17,52(sp)
8000d70: 14416116 blt r2,r17,80012f8 <___vfprintf_internal_r+0xe0c>
8000d74: ad400204 addi r21,r21,8
8000d78: 003f2406 br 8000a0c <___vfprintf_internal_r+0x520>
8000d7c: d9014f17 ldw r4,1340(sp)
8000d80: 8003fa00 call 8003fa0 <__sinit>
8000d84: d9c15117 ldw r7,1348(sp)
8000d88: 003def06 br 8000548 <___vfprintf_internal_r+0x5c>
8000d8c: d9014f17 ldw r4,1340(sp)
8000d90: b00b883a mov r5,r22
8000d94: d9c15115 stw r7,1348(sp)
8000d98: 80023d40 call 80023d4 <__swsetup_r>
8000d9c: d9c15117 ldw r7,1348(sp)
8000da0: 103dee26 beq r2,zero,800055c <___vfprintf_internal_r+0x70>
8000da4: 003f8c06 br 8000bd8 <___vfprintf_internal_r+0x6ec>
8000da8: d9014217 ldw r4,1288(sp)
8000dac: d9414317 ldw r5,1292(sp)
8000db0: 000d883a mov r6,zero
8000db4: 000f883a mov r7,zero
8000db8: 8008f8c0 call 8008f8c <__eqdf2>
8000dbc: 1000f21e bne r2,zero,8001188 <___vfprintf_internal_r+0xc9c>
8000dc0: 00820074 movhi r2,2049
8000dc4: 10b7b704 addi r2,r2,-8484
8000dc8: 94800044 addi r18,r18,1
8000dcc: 8c400044 addi r17,r17,1
8000dd0: a8800015 stw r2,0(r21)
8000dd4: 00c00044 movi r3,1
8000dd8: 008001c4 movi r2,7
8000ddc: a8c00115 stw r3,4(r21)
8000de0: dc800e15 stw r18,56(sp)
8000de4: dc400d15 stw r17,52(sp)
8000de8: 14430016 blt r2,r17,80019ec <___vfprintf_internal_r+0x1500>
8000dec: a8c00204 addi r3,r21,8
8000df0: d8800517 ldw r2,20(sp)
8000df4: d9014717 ldw r4,1308(sp)
8000df8: 11015c0e bge r2,r4,800136c <___vfprintf_internal_r+0xe80>
8000dfc: dc400d17 ldw r17,52(sp)
8000e00: d9814917 ldw r6,1316(sp)
8000e04: 00800044 movi r2,1
8000e08: 94800044 addi r18,r18,1
8000e0c: 8c400044 addi r17,r17,1
8000e10: 18800115 stw r2,4(r3)
8000e14: 008001c4 movi r2,7
8000e18: 19800015 stw r6,0(r3)
8000e1c: dc800e15 stw r18,56(sp)
8000e20: dc400d15 stw r17,52(sp)
8000e24: 14431616 blt r2,r17,8001a80 <___vfprintf_internal_r+0x1594>
8000e28: 18c00204 addi r3,r3,8
8000e2c: d8814717 ldw r2,1308(sp)
8000e30: 143fffc4 addi r16,r2,-1
8000e34: 043f2b0e bge zero,r16,8000ae4 <___vfprintf_internal_r+0x5f8>
8000e38: 00800404 movi r2,16
8000e3c: 1402a80e bge r2,r16,80018e0 <___vfprintf_internal_r+0x13f4>
8000e40: dc400d17 ldw r17,52(sp)
8000e44: 1027883a mov r19,r2
8000e48: 07020074 movhi fp,2049
8000e4c: e737b784 addi fp,fp,-8482
8000e50: 050001c4 movi r20,7
8000e54: 00000306 br 8000e64 <___vfprintf_internal_r+0x978>
8000e58: 18c00204 addi r3,r3,8
8000e5c: 843ffc04 addi r16,r16,-16
8000e60: 9c02a20e bge r19,r16,80018ec <___vfprintf_internal_r+0x1400>
8000e64: 94800404 addi r18,r18,16
8000e68: 8c400044 addi r17,r17,1
8000e6c: 1f000015 stw fp,0(r3)
8000e70: 1cc00115 stw r19,4(r3)
8000e74: dc800e15 stw r18,56(sp)
8000e78: dc400d15 stw r17,52(sp)
8000e7c: a47ff60e bge r20,r17,8000e58 <___vfprintf_internal_r+0x96c>
8000e80: d9014f17 ldw r4,1340(sp)
8000e84: b00b883a mov r5,r22
8000e88: d9800c04 addi r6,sp,48
8000e8c: 80004940 call 8000494 <__sprint_r>
8000e90: 103f4e1e bne r2,zero,8000bcc <___vfprintf_internal_r+0x6e0>
8000e94: dc800e17 ldw r18,56(sp)
8000e98: dc400d17 ldw r17,52(sp)
8000e9c: d8c01904 addi r3,sp,100
8000ea0: 003fee06 br 8000e5c <___vfprintf_internal_r+0x970>
8000ea4: d8802c0b ldhu r2,176(sp)
8000ea8: 00ffffc4 movi r3,-1
8000eac: d8c14b15 stw r3,1324(sp)
8000eb0: 1080100c andi r2,r2,64
8000eb4: 103dcc1e bne r2,zero,80005e8 <___vfprintf_internal_r+0xfc>
8000eb8: 003dce06 br 80005f4 <___vfprintf_internal_r+0x108>
8000ebc: d9014f17 ldw r4,1340(sp)
8000ec0: b00b883a mov r5,r22
8000ec4: d9800c04 addi r6,sp,48
8000ec8: 80004940 call 8000494 <__sprint_r>
8000ecc: 103f3f1e bne r2,zero,8000bcc <___vfprintf_internal_r+0x6e0>
8000ed0: dc800e17 ldw r18,56(sp)
8000ed4: 003f2e06 br 8000b90 <___vfprintf_internal_r+0x6a4>
8000ed8: d9414c17 ldw r5,1328(sp)
8000edc: 29400414 ori r5,r5,16
8000ee0: d9414c15 stw r5,1328(sp)
8000ee4: d9814c17 ldw r6,1328(sp)
8000ee8: 3080080c andi r2,r6,32
8000eec: 10014f1e bne r2,zero,800142c <___vfprintf_internal_r+0xf40>
8000ef0: d8c14c17 ldw r3,1328(sp)
8000ef4: 1880040c andi r2,r3,16
8000ef8: 1002f01e bne r2,zero,8001abc <___vfprintf_internal_r+0x15d0>
8000efc: d9014c17 ldw r4,1328(sp)
8000f00: 2080100c andi r2,r4,64
8000f04: 1002ed26 beq r2,zero,8001abc <___vfprintf_internal_r+0x15d0>
8000f08: 3880000f ldh r2,0(r7)
8000f0c: 39c00104 addi r7,r7,4
8000f10: d9c14015 stw r7,1280(sp)
8000f14: 1023d7fa srai r17,r2,31
8000f18: 1021883a mov r16,r2
8000f1c: 88037816 blt r17,zero,8001d00 <___vfprintf_internal_r+0x1814>
8000f20: 01000044 movi r4,1
8000f24: 98000416 blt r19,zero,8000f38 <___vfprintf_internal_r+0xa4c>
8000f28: d8c14c17 ldw r3,1328(sp)
8000f2c: 00bfdfc4 movi r2,-129
8000f30: 1886703a and r3,r3,r2
8000f34: d8c14c15 stw r3,1328(sp)
8000f38: 8444b03a or r2,r16,r17
8000f3c: 10022c1e bne r2,zero,80017f0 <___vfprintf_internal_r+0x1304>
8000f40: 98022b1e bne r19,zero,80017f0 <___vfprintf_internal_r+0x1304>
8000f44: 20803fcc andi r2,r4,255
8000f48: 1002a126 beq r2,zero,80019d0 <___vfprintf_internal_r+0x14e4>
8000f4c: d8c01904 addi r3,sp,100
8000f50: dd000f04 addi r20,sp,60
8000f54: d8c14115 stw r3,1284(sp)
8000f58: d8c14117 ldw r3,1284(sp)
8000f5c: dcc14515 stw r19,1300(sp)
8000f60: a0c5c83a sub r2,r20,r3
8000f64: 11c00a04 addi r7,r2,40
8000f68: 99c0010e bge r19,r7,8000f70 <___vfprintf_internal_r+0xa84>
8000f6c: d9c14515 stw r7,1300(sp)
8000f70: dcc14615 stw r19,1304(sp)
8000f74: d8800407 ldb r2,16(sp)
8000f78: 103e4c26 beq r2,zero,80008ac <___vfprintf_internal_r+0x3c0>
8000f7c: d8814517 ldw r2,1300(sp)
8000f80: 10800044 addi r2,r2,1
8000f84: d8814515 stw r2,1300(sp)
8000f88: 003e4806 br 80008ac <___vfprintf_internal_r+0x3c0>
8000f8c: d9814c17 ldw r6,1328(sp)
8000f90: 31800414 ori r6,r6,16
8000f94: d9814c15 stw r6,1328(sp)
8000f98: d8c14c17 ldw r3,1328(sp)
8000f9c: 1880080c andi r2,r3,32
8000fa0: 1001271e bne r2,zero,8001440 <___vfprintf_internal_r+0xf54>
8000fa4: d9414c17 ldw r5,1328(sp)
8000fa8: 2880040c andi r2,r5,16
8000fac: 1002bc1e bne r2,zero,8001aa0 <___vfprintf_internal_r+0x15b4>
8000fb0: d9814c17 ldw r6,1328(sp)
8000fb4: 3080100c andi r2,r6,64
8000fb8: 1002b926 beq r2,zero,8001aa0 <___vfprintf_internal_r+0x15b4>
8000fbc: 3c00000b ldhu r16,0(r7)
8000fc0: 0009883a mov r4,zero
8000fc4: 39c00104 addi r7,r7,4
8000fc8: 0023883a mov r17,zero
8000fcc: d9c14015 stw r7,1280(sp)
8000fd0: d8000405 stb zero,16(sp)
8000fd4: 003fd306 br 8000f24 <___vfprintf_internal_r+0xa38>
8000fd8: d9014c17 ldw r4,1328(sp)
8000fdc: 21000414 ori r4,r4,16
8000fe0: d9014c15 stw r4,1328(sp)
8000fe4: d9414c17 ldw r5,1328(sp)
8000fe8: 2880080c andi r2,r5,32
8000fec: 1001081e bne r2,zero,8001410 <___vfprintf_internal_r+0xf24>
8000ff0: d8c14c17 ldw r3,1328(sp)
8000ff4: 1880040c andi r2,r3,16
8000ff8: 1002b61e bne r2,zero,8001ad4 <___vfprintf_internal_r+0x15e8>
8000ffc: d9014c17 ldw r4,1328(sp)
8001000: 2080100c andi r2,r4,64
8001004: 1002b326 beq r2,zero,8001ad4 <___vfprintf_internal_r+0x15e8>
8001008: 3c00000b ldhu r16,0(r7)
800100c: 01000044 movi r4,1
8001010: 39c00104 addi r7,r7,4
8001014: 0023883a mov r17,zero
8001018: d9c14015 stw r7,1280(sp)
800101c: d8000405 stb zero,16(sp)
8001020: 003fc006 br 8000f24 <___vfprintf_internal_r+0xa38>
8001024: d9014f17 ldw r4,1340(sp)
8001028: b00b883a mov r5,r22
800102c: d9800c04 addi r6,sp,48
8001030: 80004940 call 8000494 <__sprint_r>
8001034: 103ee51e bne r2,zero,8000bcc <___vfprintf_internal_r+0x6e0>
8001038: dc800e17 ldw r18,56(sp)
800103c: d8c01904 addi r3,sp,100
8001040: d9814c17 ldw r6,1328(sp)
8001044: 3080004c andi r2,r6,1
8001048: 1005003a cmpeq r2,r2,zero
800104c: 103ea51e bne r2,zero,8000ae4 <___vfprintf_internal_r+0x5f8>
8001050: 00800044 movi r2,1
8001054: dc400d17 ldw r17,52(sp)
8001058: 18800115 stw r2,4(r3)
800105c: d8814917 ldw r2,1316(sp)
8001060: 94800044 addi r18,r18,1
8001064: 8c400044 addi r17,r17,1
8001068: 18800015 stw r2,0(r3)
800106c: 008001c4 movi r2,7
8001070: dc800e15 stw r18,56(sp)
8001074: dc400d15 stw r17,52(sp)
8001078: 1442240e bge r2,r17,800190c <___vfprintf_internal_r+0x1420>
800107c: d9014f17 ldw r4,1340(sp)
8001080: b00b883a mov r5,r22
8001084: d9800c04 addi r6,sp,48
8001088: 80004940 call 8000494 <__sprint_r>
800108c: 103ecf1e bne r2,zero,8000bcc <___vfprintf_internal_r+0x6e0>
8001090: dc800e17 ldw r18,56(sp)
8001094: d8c01904 addi r3,sp,100
8001098: 003e9206 br 8000ae4 <___vfprintf_internal_r+0x5f8>
800109c: d9014f17 ldw r4,1340(sp)
80010a0: b00b883a mov r5,r22
80010a4: d9800c04 addi r6,sp,48
80010a8: 80004940 call 8000494 <__sprint_r>
80010ac: 103ec026 beq r2,zero,8000bb0 <___vfprintf_internal_r+0x6c4>
80010b0: 003ec606 br 8000bcc <___vfprintf_internal_r+0x6e0>
80010b4: d9014f17 ldw r4,1340(sp)
80010b8: b00b883a mov r5,r22
80010bc: d9800c04 addi r6,sp,48
80010c0: d9c15115 stw r7,1348(sp)
80010c4: 80004940 call 8000494 <__sprint_r>
80010c8: d9c15117 ldw r7,1348(sp)
80010cc: 103ebf1e bne r2,zero,8000bcc <___vfprintf_internal_r+0x6e0>
80010d0: dc800e17 ldw r18,56(sp)
80010d4: dc400d17 ldw r17,52(sp)
80010d8: dd401904 addi r21,sp,100
80010dc: 003e7406 br 8000ab0 <___vfprintf_internal_r+0x5c4>
80010e0: d9014f17 ldw r4,1340(sp)
80010e4: b00b883a mov r5,r22
80010e8: d9800c04 addi r6,sp,48
80010ec: d9c15115 stw r7,1348(sp)
80010f0: 80004940 call 8000494 <__sprint_r>
80010f4: d9c15117 ldw r7,1348(sp)
80010f8: 103eb41e bne r2,zero,8000bcc <___vfprintf_internal_r+0x6e0>
80010fc: dd401904 addi r21,sp,100
8001100: 003d6d06 br 80006b8 <___vfprintf_internal_r+0x1cc>
8001104: d9014f17 ldw r4,1340(sp)
8001108: b00b883a mov r5,r22
800110c: d9800c04 addi r6,sp,48
8001110: d9c15115 stw r7,1348(sp)
8001114: 80004940 call 8000494 <__sprint_r>
8001118: d9c15117 ldw r7,1348(sp)
800111c: 103eab1e bne r2,zero,8000bcc <___vfprintf_internal_r+0x6e0>
8001120: dc800e17 ldw r18,56(sp)
8001124: dc400d17 ldw r17,52(sp)
8001128: dd401904 addi r21,sp,100
800112c: 003e3406 br 8000a00 <___vfprintf_internal_r+0x514>
8001130: d9014f17 ldw r4,1340(sp)
8001134: b00b883a mov r5,r22
8001138: d9800c04 addi r6,sp,48
800113c: d9c15115 stw r7,1348(sp)
8001140: 80004940 call 8000494 <__sprint_r>
8001144: d9c15117 ldw r7,1348(sp)
8001148: 103ea01e bne r2,zero,8000bcc <___vfprintf_internal_r+0x6e0>
800114c: dc800e17 ldw r18,56(sp)
8001150: dc400d17 ldw r17,52(sp)
8001154: dd401904 addi r21,sp,100
8001158: 003e1c06 br 80009cc <___vfprintf_internal_r+0x4e0>
800115c: d9014f17 ldw r4,1340(sp)
8001160: b00b883a mov r5,r22
8001164: d9800c04 addi r6,sp,48
8001168: d9c15115 stw r7,1348(sp)
800116c: 80004940 call 8000494 <__sprint_r>
8001170: d9c15117 ldw r7,1348(sp)
8001174: 103e951e bne r2,zero,8000bcc <___vfprintf_internal_r+0x6e0>
8001178: dc800e17 ldw r18,56(sp)
800117c: dc400d17 ldw r17,52(sp)
8001180: dd401904 addi r21,sp,100
8001184: 003e0406 br 8000998 <___vfprintf_internal_r+0x4ac>
8001188: d9000517 ldw r4,20(sp)
800118c: 0102580e bge zero,r4,8001af0 <___vfprintf_internal_r+0x1604>
8001190: d9814717 ldw r6,1308(sp)
8001194: 21807a16 blt r4,r6,8001380 <___vfprintf_internal_r+0xe94>
8001198: d8814117 ldw r2,1284(sp)
800119c: 91a5883a add r18,r18,r6
80011a0: 8c400044 addi r17,r17,1
80011a4: a8800015 stw r2,0(r21)
80011a8: 008001c4 movi r2,7
80011ac: a9800115 stw r6,4(r21)
80011b0: dc800e15 stw r18,56(sp)
80011b4: dc400d15 stw r17,52(sp)
80011b8: 1442fc16 blt r2,r17,8001dac <___vfprintf_internal_r+0x18c0>
80011bc: a8c00204 addi r3,r21,8
80011c0: d9414717 ldw r5,1308(sp)
80011c4: 2161c83a sub r16,r4,r5
80011c8: 043f9d0e bge zero,r16,8001040 <___vfprintf_internal_r+0xb54>
80011cc: 00800404 movi r2,16
80011d0: 1402190e bge r2,r16,8001a38 <___vfprintf_internal_r+0x154c>
80011d4: dc400d17 ldw r17,52(sp)
80011d8: 1027883a mov r19,r2
80011dc: 07020074 movhi fp,2049
80011e0: e737b784 addi fp,fp,-8482
80011e4: 050001c4 movi r20,7
80011e8: 00000306 br 80011f8 <___vfprintf_internal_r+0xd0c>
80011ec: 18c00204 addi r3,r3,8
80011f0: 843ffc04 addi r16,r16,-16
80011f4: 9c02130e bge r19,r16,8001a44 <___vfprintf_internal_r+0x1558>
80011f8: 94800404 addi r18,r18,16
80011fc: 8c400044 addi r17,r17,1
8001200: 1f000015 stw fp,0(r3)
8001204: 1cc00115 stw r19,4(r3)
8001208: dc800e15 stw r18,56(sp)
800120c: dc400d15 stw r17,52(sp)
8001210: a47ff60e bge r20,r17,80011ec <___vfprintf_internal_r+0xd00>
8001214: d9014f17 ldw r4,1340(sp)
8001218: b00b883a mov r5,r22
800121c: d9800c04 addi r6,sp,48
8001220: 80004940 call 8000494 <__sprint_r>
8001224: 103e691e bne r2,zero,8000bcc <___vfprintf_internal_r+0x6e0>
8001228: dc800e17 ldw r18,56(sp)
800122c: dc400d17 ldw r17,52(sp)
8001230: d8c01904 addi r3,sp,100
8001234: 003fee06 br 80011f0 <___vfprintf_internal_r+0xd04>
8001238: d8814717 ldw r2,1308(sp)
800123c: 143fffc4 addi r16,r2,-1
8001240: 043e970e bge zero,r16,8000ca0 <___vfprintf_internal_r+0x7b4>
8001244: 00800404 movi r2,16
8001248: 1400180e bge r2,r16,80012ac <___vfprintf_internal_r+0xdc0>
800124c: 1029883a mov r20,r2
8001250: 07020074 movhi fp,2049
8001254: e737b784 addi fp,fp,-8482
8001258: 054001c4 movi r21,7
800125c: 00000306 br 800126c <___vfprintf_internal_r+0xd80>
8001260: 9cc00204 addi r19,r19,8
8001264: 843ffc04 addi r16,r16,-16
8001268: a400120e bge r20,r16,80012b4 <___vfprintf_internal_r+0xdc8>
800126c: 94800404 addi r18,r18,16
8001270: 8c400044 addi r17,r17,1
8001274: 9f000015 stw fp,0(r19)
8001278: 9d000115 stw r20,4(r19)
800127c: dc800e15 stw r18,56(sp)
8001280: dc400d15 stw r17,52(sp)
8001284: ac7ff60e bge r21,r17,8001260 <___vfprintf_internal_r+0xd74>
8001288: d9014f17 ldw r4,1340(sp)
800128c: b00b883a mov r5,r22
8001290: d9800c04 addi r6,sp,48
8001294: 80004940 call 8000494 <__sprint_r>
8001298: 103e4c1e bne r2,zero,8000bcc <___vfprintf_internal_r+0x6e0>
800129c: dc800e17 ldw r18,56(sp)
80012a0: dc400d17 ldw r17,52(sp)
80012a4: dcc01904 addi r19,sp,100
80012a8: 003fee06 br 8001264 <___vfprintf_internal_r+0xd78>
80012ac: 07020074 movhi fp,2049
80012b0: e737b784 addi fp,fp,-8482
80012b4: 9425883a add r18,r18,r16
80012b8: 8c400044 addi r17,r17,1
80012bc: 008001c4 movi r2,7
80012c0: 9f000015 stw fp,0(r19)
80012c4: 9c000115 stw r16,4(r19)
80012c8: dc800e15 stw r18,56(sp)
80012cc: dc400d15 stw r17,52(sp)
80012d0: 147e720e bge r2,r17,8000c9c <___vfprintf_internal_r+0x7b0>
80012d4: d9014f17 ldw r4,1340(sp)
80012d8: b00b883a mov r5,r22
80012dc: d9800c04 addi r6,sp,48
80012e0: 80004940 call 8000494 <__sprint_r>
80012e4: 103e391e bne r2,zero,8000bcc <___vfprintf_internal_r+0x6e0>
80012e8: dc800e17 ldw r18,56(sp)
80012ec: dc400d17 ldw r17,52(sp)
80012f0: dcc01904 addi r19,sp,100
80012f4: 003e6a06 br 8000ca0 <___vfprintf_internal_r+0x7b4>
80012f8: d9014f17 ldw r4,1340(sp)
80012fc: b00b883a mov r5,r22
8001300: d9800c04 addi r6,sp,48
8001304: d9c15115 stw r7,1348(sp)
8001308: 80004940 call 8000494 <__sprint_r>
800130c: d9c15117 ldw r7,1348(sp)
8001310: 103e2e1e bne r2,zero,8000bcc <___vfprintf_internal_r+0x6e0>
8001314: dc800e17 ldw r18,56(sp)
8001318: dc400d17 ldw r17,52(sp)
800131c: dd401904 addi r21,sp,100
8001320: 003dba06 br 8000a0c <___vfprintf_internal_r+0x520>
8001324: d9014f17 ldw r4,1340(sp)
8001328: b00b883a mov r5,r22
800132c: d9800c04 addi r6,sp,48
8001330: 80004940 call 8000494 <__sprint_r>
8001334: 103e251e bne r2,zero,8000bcc <___vfprintf_internal_r+0x6e0>
8001338: dc800e17 ldw r18,56(sp)
800133c: dc400d17 ldw r17,52(sp)
8001340: dcc01904 addi r19,sp,100
8001344: 003e4206 br 8000c50 <___vfprintf_internal_r+0x764>
8001348: d9014f17 ldw r4,1340(sp)
800134c: b00b883a mov r5,r22
8001350: d9800c04 addi r6,sp,48
8001354: 80004940 call 8000494 <__sprint_r>
8001358: 103e1c1e bne r2,zero,8000bcc <___vfprintf_internal_r+0x6e0>
800135c: dc800e17 ldw r18,56(sp)
8001360: dc400d17 ldw r17,52(sp)
8001364: d8c01904 addi r3,sp,100
8001368: 003e2e06 br 8000c24 <___vfprintf_internal_r+0x738>
800136c: d9414c17 ldw r5,1328(sp)
8001370: 2880004c andi r2,r5,1
8001374: 1005003a cmpeq r2,r2,zero
8001378: 103dda1e bne r2,zero,8000ae4 <___vfprintf_internal_r+0x5f8>
800137c: 003e9f06 br 8000dfc <___vfprintf_internal_r+0x910>
8001380: d8c14117 ldw r3,1284(sp)
8001384: 9125883a add r18,r18,r4
8001388: 8c400044 addi r17,r17,1
800138c: 008001c4 movi r2,7
8001390: a8c00015 stw r3,0(r21)
8001394: a9000115 stw r4,4(r21)
8001398: dc800e15 stw r18,56(sp)
800139c: dc400d15 stw r17,52(sp)
80013a0: 14426c16 blt r2,r17,8001d54 <___vfprintf_internal_r+0x1868>
80013a4: a8c00204 addi r3,r21,8
80013a8: d9414917 ldw r5,1316(sp)
80013ac: 00800044 movi r2,1
80013b0: 94800044 addi r18,r18,1
80013b4: 8c400044 addi r17,r17,1
80013b8: 18800115 stw r2,4(r3)
80013bc: 008001c4 movi r2,7
80013c0: 19400015 stw r5,0(r3)
80013c4: dc800e15 stw r18,56(sp)
80013c8: dc400d15 stw r17,52(sp)
80013cc: 2021883a mov r16,r4
80013d0: 14425616 blt r2,r17,8001d2c <___vfprintf_internal_r+0x1840>
80013d4: 19400204 addi r5,r3,8
80013d8: d9814717 ldw r6,1308(sp)
80013dc: 8c400044 addi r17,r17,1
80013e0: dc400d15 stw r17,52(sp)
80013e4: 3107c83a sub r3,r6,r4
80013e8: d9014117 ldw r4,1284(sp)
80013ec: 90e5883a add r18,r18,r3
80013f0: 28c00115 stw r3,4(r5)
80013f4: 8105883a add r2,r16,r4
80013f8: 28800015 stw r2,0(r5)
80013fc: 008001c4 movi r2,7
8001400: dc800e15 stw r18,56(sp)
8001404: 147f1d16 blt r2,r17,800107c <___vfprintf_internal_r+0xb90>
8001408: 28c00204 addi r3,r5,8
800140c: 003db506 br 8000ae4 <___vfprintf_internal_r+0x5f8>
8001410: 3c000017 ldw r16,0(r7)
8001414: 3c400117 ldw r17,4(r7)
8001418: 39800204 addi r6,r7,8
800141c: 01000044 movi r4,1
8001420: d9814015 stw r6,1280(sp)
8001424: d8000405 stb zero,16(sp)
8001428: 003ebe06 br 8000f24 <___vfprintf_internal_r+0xa38>
800142c: 3c000017 ldw r16,0(r7)
8001430: 3c400117 ldw r17,4(r7)
8001434: 38800204 addi r2,r7,8
8001438: d8814015 stw r2,1280(sp)
800143c: 003eb706 br 8000f1c <___vfprintf_internal_r+0xa30>
8001440: 3c000017 ldw r16,0(r7)
8001444: 3c400117 ldw r17,4(r7)
8001448: 39000204 addi r4,r7,8
800144c: d9014015 stw r4,1280(sp)
8001450: 0009883a mov r4,zero
8001454: d8000405 stb zero,16(sp)
8001458: 003eb206 br 8000f24 <___vfprintf_internal_r+0xa38>
800145c: 38c00017 ldw r3,0(r7)
8001460: 39c00104 addi r7,r7,4
8001464: d8c14a15 stw r3,1320(sp)
8001468: 1800d70e bge r3,zero,80017c8 <___vfprintf_internal_r+0x12dc>
800146c: 00c7c83a sub r3,zero,r3
8001470: d8c14a15 stw r3,1320(sp)
8001474: d9014c17 ldw r4,1328(sp)
8001478: b8c00007 ldb r3,0(r23)
800147c: 21000114 ori r4,r4,4
8001480: d9014c15 stw r4,1328(sp)
8001484: 003c9806 br 80006e8 <___vfprintf_internal_r+0x1fc>
8001488: d9814c17 ldw r6,1328(sp)
800148c: 3080080c andi r2,r6,32
8001490: 1001f626 beq r2,zero,8001c6c <___vfprintf_internal_r+0x1780>
8001494: d9014b17 ldw r4,1324(sp)
8001498: 38800017 ldw r2,0(r7)
800149c: 39c00104 addi r7,r7,4
80014a0: d9c14015 stw r7,1280(sp)
80014a4: 2007d7fa srai r3,r4,31
80014a8: d9c14017 ldw r7,1280(sp)
80014ac: 11000015 stw r4,0(r2)
80014b0: 10c00115 stw r3,4(r2)
80014b4: 003c6906 br 800065c <___vfprintf_internal_r+0x170>
80014b8: b8c00007 ldb r3,0(r23)
80014bc: 00801b04 movi r2,108
80014c0: 18825526 beq r3,r2,8001e18 <___vfprintf_internal_r+0x192c>
80014c4: d9414c17 ldw r5,1328(sp)
80014c8: 29400414 ori r5,r5,16
80014cc: d9414c15 stw r5,1328(sp)
80014d0: 003c8506 br 80006e8 <___vfprintf_internal_r+0x1fc>
80014d4: d9814c17 ldw r6,1328(sp)
80014d8: b8c00007 ldb r3,0(r23)
80014dc: 31800814 ori r6,r6,32
80014e0: d9814c15 stw r6,1328(sp)
80014e4: 003c8006 br 80006e8 <___vfprintf_internal_r+0x1fc>
80014e8: d8814c17 ldw r2,1328(sp)
80014ec: 3c000017 ldw r16,0(r7)
80014f0: 00c01e04 movi r3,120
80014f4: 10800094 ori r2,r2,2
80014f8: d8814c15 stw r2,1328(sp)
80014fc: 39c00104 addi r7,r7,4
8001500: 01420074 movhi r5,2049
8001504: 2977a004 addi r5,r5,-8576
8001508: 00800c04 movi r2,48
800150c: 0023883a mov r17,zero
8001510: 01000084 movi r4,2
8001514: d9c14015 stw r7,1280(sp)
8001518: d8c14d15 stw r3,1332(sp)
800151c: d9414415 stw r5,1296(sp)
8001520: d8800445 stb r2,17(sp)
8001524: d8c00485 stb r3,18(sp)
8001528: d8000405 stb zero,16(sp)
800152c: 003e7d06 br 8000f24 <___vfprintf_internal_r+0xa38>
8001530: d8814c17 ldw r2,1328(sp)
8001534: b8c00007 ldb r3,0(r23)
8001538: 10801014 ori r2,r2,64
800153c: d8814c15 stw r2,1328(sp)
8001540: 003c6906 br 80006e8 <___vfprintf_internal_r+0x1fc>
8001544: d9414c17 ldw r5,1328(sp)
8001548: 2880020c andi r2,r5,8
800154c: 1001e526 beq r2,zero,8001ce4 <___vfprintf_internal_r+0x17f8>
8001550: 39800017 ldw r6,0(r7)
8001554: 38800204 addi r2,r7,8
8001558: d8814015 stw r2,1280(sp)
800155c: d9814215 stw r6,1288(sp)
8001560: 39c00117 ldw r7,4(r7)
8001564: d9c14315 stw r7,1292(sp)
8001568: d9014217 ldw r4,1288(sp)
800156c: d9414317 ldw r5,1292(sp)
8001570: 8006f9c0 call 8006f9c <__isinfd>
8001574: 10021d26 beq r2,zero,8001dec <___vfprintf_internal_r+0x1900>
8001578: d9014217 ldw r4,1288(sp)
800157c: d9414317 ldw r5,1292(sp)
8001580: 000d883a mov r6,zero
8001584: 000f883a mov r7,zero
8001588: 80091ac0 call 80091ac <__ltdf2>
800158c: 1002d016 blt r2,zero,80020d0 <___vfprintf_internal_r+0x1be4>
8001590: d9414d17 ldw r5,1332(sp)
8001594: 008011c4 movi r2,71
8001598: 11421016 blt r2,r5,8001ddc <___vfprintf_internal_r+0x18f0>
800159c: 01820074 movhi r6,2049
80015a0: 31b7a504 addi r6,r6,-8556
80015a4: d9814115 stw r6,1284(sp)
80015a8: d9014c17 ldw r4,1328(sp)
80015ac: 00c000c4 movi r3,3
80015b0: 00bfdfc4 movi r2,-129
80015b4: 2088703a and r4,r4,r2
80015b8: 180f883a mov r7,r3
80015bc: d8c14515 stw r3,1300(sp)
80015c0: d9014c15 stw r4,1328(sp)
80015c4: d8014615 stw zero,1304(sp)
80015c8: 003e6a06 br 8000f74 <___vfprintf_internal_r+0xa88>
80015cc: 38800017 ldw r2,0(r7)
80015d0: 00c00044 movi r3,1
80015d4: 39c00104 addi r7,r7,4
80015d8: d9c14015 stw r7,1280(sp)
80015dc: d9000f04 addi r4,sp,60
80015e0: 180f883a mov r7,r3
80015e4: d8c14515 stw r3,1300(sp)
80015e8: d9014115 stw r4,1284(sp)
80015ec: d8800f05 stb r2,60(sp)
80015f0: d8000405 stb zero,16(sp)
80015f4: 003cac06 br 80008a8 <___vfprintf_internal_r+0x3bc>
80015f8: 01420074 movhi r5,2049
80015fc: 2977ab04 addi r5,r5,-8532
8001600: d9414415 stw r5,1296(sp)
8001604: d9814c17 ldw r6,1328(sp)
8001608: 3080080c andi r2,r6,32
800160c: 1000ff26 beq r2,zero,8001a0c <___vfprintf_internal_r+0x1520>
8001610: 3c000017 ldw r16,0(r7)
8001614: 3c400117 ldw r17,4(r7)
8001618: 38800204 addi r2,r7,8
800161c: d8814015 stw r2,1280(sp)
8001620: d9414c17 ldw r5,1328(sp)
8001624: 2880004c andi r2,r5,1
8001628: 1005003a cmpeq r2,r2,zero
800162c: 1000b91e bne r2,zero,8001914 <___vfprintf_internal_r+0x1428>
8001630: 8444b03a or r2,r16,r17
8001634: 1000b726 beq r2,zero,8001914 <___vfprintf_internal_r+0x1428>
8001638: d9814d17 ldw r6,1332(sp)
800163c: 29400094 ori r5,r5,2
8001640: 00800c04 movi r2,48
8001644: 01000084 movi r4,2
8001648: d9414c15 stw r5,1328(sp)
800164c: d8800445 stb r2,17(sp)
8001650: d9800485 stb r6,18(sp)
8001654: d8000405 stb zero,16(sp)
8001658: 003e3206 br 8000f24 <___vfprintf_internal_r+0xa38>
800165c: 01820074 movhi r6,2049
8001660: 31b7a004 addi r6,r6,-8576
8001664: d9814415 stw r6,1296(sp)
8001668: 003fe606 br 8001604 <___vfprintf_internal_r+0x1118>
800166c: 00800ac4 movi r2,43
8001670: d8800405 stb r2,16(sp)
8001674: b8c00007 ldb r3,0(r23)
8001678: 003c1b06 br 80006e8 <___vfprintf_internal_r+0x1fc>
800167c: d8814c17 ldw r2,1328(sp)
8001680: b8c00007 ldb r3,0(r23)
8001684: 10800054 ori r2,r2,1
8001688: d8814c15 stw r2,1328(sp)
800168c: 003c1606 br 80006e8 <___vfprintf_internal_r+0x1fc>
8001690: d8800407 ldb r2,16(sp)
8001694: 10004c1e bne r2,zero,80017c8 <___vfprintf_internal_r+0x12dc>
8001698: 00800804 movi r2,32
800169c: d8800405 stb r2,16(sp)
80016a0: b8c00007 ldb r3,0(r23)
80016a4: 003c1006 br 80006e8 <___vfprintf_internal_r+0x1fc>
80016a8: d9814c17 ldw r6,1328(sp)
80016ac: b8c00007 ldb r3,0(r23)
80016b0: 31800214 ori r6,r6,8
80016b4: d9814c15 stw r6,1328(sp)
80016b8: 003c0b06 br 80006e8 <___vfprintf_internal_r+0x1fc>
80016bc: 0009883a mov r4,zero
80016c0: 04000244 movi r16,9
80016c4: 01400284 movi r5,10
80016c8: d9c15115 stw r7,1348(sp)
80016cc: 80096e40 call 80096e4 <__mulsi3>
80016d0: b9000007 ldb r4,0(r23)
80016d4: d8c14d17 ldw r3,1332(sp)
80016d8: bdc00044 addi r23,r23,1
80016dc: d9014d15 stw r4,1332(sp)
80016e0: d9414d17 ldw r5,1332(sp)
80016e4: 1885883a add r2,r3,r2
80016e8: 113ff404 addi r4,r2,-48
80016ec: 28bff404 addi r2,r5,-48
80016f0: d9c15117 ldw r7,1348(sp)
80016f4: 80bff32e bgeu r16,r2,80016c4 <___vfprintf_internal_r+0x11d8>
80016f8: d9014a15 stw r4,1320(sp)
80016fc: 003bfc06 br 80006f0 <___vfprintf_internal_r+0x204>
8001700: d8814c17 ldw r2,1328(sp)
8001704: b8c00007 ldb r3,0(r23)
8001708: 10802014 ori r2,r2,128
800170c: d8814c15 stw r2,1328(sp)
8001710: 003bf506 br 80006e8 <___vfprintf_internal_r+0x1fc>
8001714: b8c00007 ldb r3,0(r23)
8001718: 00800a84 movi r2,42
800171c: bdc00044 addi r23,r23,1
8001720: 18831826 beq r3,r2,8002384 <___vfprintf_internal_r+0x1e98>
8001724: d8c14d15 stw r3,1332(sp)
8001728: 18bff404 addi r2,r3,-48
800172c: 00c00244 movi r3,9
8001730: 18827b36 bltu r3,r2,8002120 <___vfprintf_internal_r+0x1c34>
8001734: 1821883a mov r16,r3
8001738: 0009883a mov r4,zero
800173c: 01400284 movi r5,10
8001740: d9c15115 stw r7,1348(sp)
8001744: 80096e40 call 80096e4 <__mulsi3>
8001748: d9414d17 ldw r5,1332(sp)
800174c: b9800007 ldb r6,0(r23)
8001750: d9c15117 ldw r7,1348(sp)
8001754: 1145883a add r2,r2,r5
8001758: 113ff404 addi r4,r2,-48
800175c: 30bff404 addi r2,r6,-48
8001760: d9814d15 stw r6,1332(sp)
8001764: bdc00044 addi r23,r23,1
8001768: 80bff42e bgeu r16,r2,800173c <___vfprintf_internal_r+0x1250>
800176c: 2027883a mov r19,r4
8001770: 203bdf0e bge r4,zero,80006f0 <___vfprintf_internal_r+0x204>
8001774: 04ffffc4 movi r19,-1
8001778: 003bdd06 br 80006f0 <___vfprintf_internal_r+0x204>
800177c: d8000405 stb zero,16(sp)
8001780: 39800017 ldw r6,0(r7)
8001784: 39c00104 addi r7,r7,4
8001788: d9c14015 stw r7,1280(sp)
800178c: d9814115 stw r6,1284(sp)
8001790: 3001c926 beq r6,zero,8001eb8 <___vfprintf_internal_r+0x19cc>
8001794: 98000e16 blt r19,zero,80017d0 <___vfprintf_internal_r+0x12e4>
8001798: d9014117 ldw r4,1284(sp)
800179c: 000b883a mov r5,zero
80017a0: 980d883a mov r6,r19
80017a4: 80056200 call 8005620 <memchr>
80017a8: 10025926 beq r2,zero,8002110 <___vfprintf_internal_r+0x1c24>
80017ac: d8c14117 ldw r3,1284(sp)
80017b0: 10cfc83a sub r7,r2,r3
80017b4: 99c19e16 blt r19,r7,8001e30 <___vfprintf_internal_r+0x1944>
80017b8: d9c14515 stw r7,1300(sp)
80017bc: 38000916 blt r7,zero,80017e4 <___vfprintf_internal_r+0x12f8>
80017c0: d8014615 stw zero,1304(sp)
80017c4: 003deb06 br 8000f74 <___vfprintf_internal_r+0xa88>
80017c8: b8c00007 ldb r3,0(r23)
80017cc: 003bc606 br 80006e8 <___vfprintf_internal_r+0x1fc>
80017d0: d9014117 ldw r4,1284(sp)
80017d4: 80072840 call 8007284 <strlen>
80017d8: d8814515 stw r2,1300(sp)
80017dc: 100f883a mov r7,r2
80017e0: 103ff70e bge r2,zero,80017c0 <___vfprintf_internal_r+0x12d4>
80017e4: d8014515 stw zero,1300(sp)
80017e8: d8014615 stw zero,1304(sp)
80017ec: 003de106 br 8000f74 <___vfprintf_internal_r+0xa88>
80017f0: 20c03fcc andi r3,r4,255
80017f4: 00800044 movi r2,1
80017f8: 18802d26 beq r3,r2,80018b0 <___vfprintf_internal_r+0x13c4>
80017fc: 18800e36 bltu r3,r2,8001838 <___vfprintf_internal_r+0x134c>
8001800: 00800084 movi r2,2
8001804: 1880fa26 beq r3,r2,8001bf0 <___vfprintf_internal_r+0x1704>
8001808: 01020074 movhi r4,2049
800180c: 2137b004 addi r4,r4,-8512
8001810: 80072840 call 8007284 <strlen>
8001814: 100f883a mov r7,r2
8001818: dcc14515 stw r19,1300(sp)
800181c: 9880010e bge r19,r2,8001824 <___vfprintf_internal_r+0x1338>
8001820: d8814515 stw r2,1300(sp)
8001824: 00820074 movhi r2,2049
8001828: 10b7b004 addi r2,r2,-8512
800182c: dcc14615 stw r19,1304(sp)
8001830: d8814115 stw r2,1284(sp)
8001834: 003dcf06 br 8000f74 <___vfprintf_internal_r+0xa88>
8001838: d9401904 addi r5,sp,100
800183c: dd000f04 addi r20,sp,60
8001840: d9414115 stw r5,1284(sp)
8001844: 880a977a slli r5,r17,29
8001848: d9814117 ldw r6,1284(sp)
800184c: 8004d0fa srli r2,r16,3
8001850: 8806d0fa srli r3,r17,3
8001854: 810001cc andi r4,r16,7
8001858: 2884b03a or r2,r5,r2
800185c: 31bfffc4 addi r6,r6,-1
8001860: 21000c04 addi r4,r4,48
8001864: d9814115 stw r6,1284(sp)
8001868: 10cab03a or r5,r2,r3
800186c: 31000005 stb r4,0(r6)
8001870: 1021883a mov r16,r2
8001874: 1823883a mov r17,r3
8001878: 283ff21e bne r5,zero,8001844 <___vfprintf_internal_r+0x1358>
800187c: d8c14c17 ldw r3,1328(sp)
8001880: 1880004c andi r2,r3,1
8001884: 1005003a cmpeq r2,r2,zero
8001888: 103db31e bne r2,zero,8000f58 <___vfprintf_internal_r+0xa6c>
800188c: 20803fcc andi r2,r4,255
8001890: 1080201c xori r2,r2,128
8001894: 10bfe004 addi r2,r2,-128
8001898: 00c00c04 movi r3,48
800189c: 10fdae26 beq r2,r3,8000f58 <___vfprintf_internal_r+0xa6c>
80018a0: 31bfffc4 addi r6,r6,-1
80018a4: d9814115 stw r6,1284(sp)
80018a8: 30c00005 stb r3,0(r6)
80018ac: 003daa06 br 8000f58 <___vfprintf_internal_r+0xa6c>
80018b0: 88800068 cmpgeui r2,r17,1
80018b4: 10002c1e bne r2,zero,8001968 <___vfprintf_internal_r+0x147c>
80018b8: 8800021e bne r17,zero,80018c4 <___vfprintf_internal_r+0x13d8>
80018bc: 00800244 movi r2,9
80018c0: 14002936 bltu r2,r16,8001968 <___vfprintf_internal_r+0x147c>
80018c4: d90018c4 addi r4,sp,99
80018c8: dd000f04 addi r20,sp,60
80018cc: d9014115 stw r4,1284(sp)
80018d0: d9014117 ldw r4,1284(sp)
80018d4: 80800c04 addi r2,r16,48
80018d8: 20800005 stb r2,0(r4)
80018dc: 003d9e06 br 8000f58 <___vfprintf_internal_r+0xa6c>
80018e0: dc400d17 ldw r17,52(sp)
80018e4: 07020074 movhi fp,2049
80018e8: e737b784 addi fp,fp,-8482
80018ec: 9425883a add r18,r18,r16
80018f0: 8c400044 addi r17,r17,1
80018f4: 008001c4 movi r2,7
80018f8: 1f000015 stw fp,0(r3)
80018fc: 1c000115 stw r16,4(r3)
8001900: dc800e15 stw r18,56(sp)
8001904: dc400d15 stw r17,52(sp)
8001908: 147ddc16 blt r2,r17,800107c <___vfprintf_internal_r+0xb90>
800190c: 18c00204 addi r3,r3,8
8001910: 003c7406 br 8000ae4 <___vfprintf_internal_r+0x5f8>
8001914: 01000084 movi r4,2
8001918: d8000405 stb zero,16(sp)
800191c: 003d8106 br 8000f24 <___vfprintf_internal_r+0xa38>
8001920: d9814c17 ldw r6,1328(sp)
8001924: 30c4703a and r2,r6,r3
8001928: 1005003a cmpeq r2,r2,zero
800192c: 103cb326 beq r2,zero,8000bfc <___vfprintf_internal_r+0x710>
8001930: d9014117 ldw r4,1284(sp)
8001934: 94800044 addi r18,r18,1
8001938: 8c400044 addi r17,r17,1
800193c: 008001c4 movi r2,7
8001940: a9000015 stw r4,0(r21)
8001944: a8c00115 stw r3,4(r21)
8001948: dc800e15 stw r18,56(sp)
800194c: dc400d15 stw r17,52(sp)
8001950: 147e6016 blt r2,r17,80012d4 <___vfprintf_internal_r+0xde8>
8001954: acc00204 addi r19,r21,8
8001958: 003cd106 br 8000ca0 <___vfprintf_internal_r+0x7b4>
800195c: 07020074 movhi fp,2049
8001960: e737b784 addi fp,fp,-8482
8001964: 003c4906 br 8000a8c <___vfprintf_internal_r+0x5a0>
8001968: dd000f04 addi r20,sp,60
800196c: dc801904 addi r18,sp,100
8001970: 8009883a mov r4,r16
8001974: 880b883a mov r5,r17
8001978: 01800284 movi r6,10
800197c: 000f883a mov r7,zero
8001980: 8007e0c0 call 8007e0c <__umoddi3>
8001984: 12000c04 addi r8,r2,48
8001988: 94bfffc4 addi r18,r18,-1
800198c: 8009883a mov r4,r16
8001990: 880b883a mov r5,r17
8001994: 01800284 movi r6,10
8001998: 000f883a mov r7,zero
800199c: 92000005 stb r8,0(r18)
80019a0: 80077a00 call 80077a0 <__udivdi3>
80019a4: 1009883a mov r4,r2
80019a8: 1021883a mov r16,r2
80019ac: 18800068 cmpgeui r2,r3,1
80019b0: 1823883a mov r17,r3
80019b4: 103fee1e bne r2,zero,8001970 <___vfprintf_internal_r+0x1484>
80019b8: 1800021e bne r3,zero,80019c4 <___vfprintf_internal_r+0x14d8>
80019bc: 00800244 movi r2,9
80019c0: 113feb36 bltu r2,r4,8001970 <___vfprintf_internal_r+0x1484>
80019c4: 94bfffc4 addi r18,r18,-1
80019c8: dc814115 stw r18,1284(sp)
80019cc: 003fc006 br 80018d0 <___vfprintf_internal_r+0x13e4>
80019d0: d9014c17 ldw r4,1328(sp)
80019d4: 2080004c andi r2,r4,1
80019d8: 10009a1e bne r2,zero,8001c44 <___vfprintf_internal_r+0x1758>
80019dc: d9401904 addi r5,sp,100
80019e0: dd000f04 addi r20,sp,60
80019e4: d9414115 stw r5,1284(sp)
80019e8: 003d5b06 br 8000f58 <___vfprintf_internal_r+0xa6c>
80019ec: d9014f17 ldw r4,1340(sp)
80019f0: b00b883a mov r5,r22
80019f4: d9800c04 addi r6,sp,48
80019f8: 80004940 call 8000494 <__sprint_r>
80019fc: 103c731e bne r2,zero,8000bcc <___vfprintf_internal_r+0x6e0>
8001a00: dc800e17 ldw r18,56(sp)
8001a04: d8c01904 addi r3,sp,100
8001a08: 003cf906 br 8000df0 <___vfprintf_internal_r+0x904>
8001a0c: d8c14c17 ldw r3,1328(sp)
8001a10: 1880040c andi r2,r3,16
8001a14: 1000711e bne r2,zero,8001bdc <___vfprintf_internal_r+0x16f0>
8001a18: d9014c17 ldw r4,1328(sp)
8001a1c: 2080100c andi r2,r4,64
8001a20: 10006e26 beq r2,zero,8001bdc <___vfprintf_internal_r+0x16f0>
8001a24: 3c00000b ldhu r16,0(r7)
8001a28: 0023883a mov r17,zero
8001a2c: 39c00104 addi r7,r7,4
8001a30: d9c14015 stw r7,1280(sp)
8001a34: 003efa06 br 8001620 <___vfprintf_internal_r+0x1134>
8001a38: dc400d17 ldw r17,52(sp)
8001a3c: 07020074 movhi fp,2049
8001a40: e737b784 addi fp,fp,-8482
8001a44: 9425883a add r18,r18,r16
8001a48: 8c400044 addi r17,r17,1
8001a4c: 008001c4 movi r2,7
8001a50: 1f000015 stw fp,0(r3)
8001a54: 1c000115 stw r16,4(r3)
8001a58: dc800e15 stw r18,56(sp)
8001a5c: dc400d15 stw r17,52(sp)
8001a60: 147d7016 blt r2,r17,8001024 <___vfprintf_internal_r+0xb38>
8001a64: 18c00204 addi r3,r3,8
8001a68: 003d7506 br 8001040 <___vfprintf_internal_r+0xb54>
8001a6c: dc800e17 ldw r18,56(sp)
8001a70: dc400d17 ldw r17,52(sp)
8001a74: 07020074 movhi fp,2049
8001a78: e737bb84 addi fp,fp,-8466
8001a7c: 003bba06 br 8000968 <___vfprintf_internal_r+0x47c>
8001a80: d9014f17 ldw r4,1340(sp)
8001a84: b00b883a mov r5,r22
8001a88: d9800c04 addi r6,sp,48
8001a8c: 80004940 call 8000494 <__sprint_r>
8001a90: 103c4e1e bne r2,zero,8000bcc <___vfprintf_internal_r+0x6e0>
8001a94: dc800e17 ldw r18,56(sp)
8001a98: d8c01904 addi r3,sp,100
8001a9c: 003ce306 br 8000e2c <___vfprintf_internal_r+0x940>
8001aa0: 3c000017 ldw r16,0(r7)
8001aa4: 0009883a mov r4,zero
8001aa8: 39c00104 addi r7,r7,4
8001aac: 0023883a mov r17,zero
8001ab0: d9c14015 stw r7,1280(sp)
8001ab4: d8000405 stb zero,16(sp)
8001ab8: 003d1a06 br 8000f24 <___vfprintf_internal_r+0xa38>
8001abc: 38800017 ldw r2,0(r7)
8001ac0: 39c00104 addi r7,r7,4
8001ac4: d9c14015 stw r7,1280(sp)
8001ac8: 1023d7fa srai r17,r2,31
8001acc: 1021883a mov r16,r2
8001ad0: 003d1206 br 8000f1c <___vfprintf_internal_r+0xa30>
8001ad4: 3c000017 ldw r16,0(r7)
8001ad8: 01000044 movi r4,1
8001adc: 39c00104 addi r7,r7,4
8001ae0: 0023883a mov r17,zero
8001ae4: d9c14015 stw r7,1280(sp)
8001ae8: d8000405 stb zero,16(sp)
8001aec: 003d0d06 br 8000f24 <___vfprintf_internal_r+0xa38>
8001af0: 00820074 movhi r2,2049
8001af4: 10b7b704 addi r2,r2,-8484
8001af8: 94800044 addi r18,r18,1
8001afc: 8c400044 addi r17,r17,1
8001b00: a8800015 stw r2,0(r21)
8001b04: 00c00044 movi r3,1
8001b08: 008001c4 movi r2,7
8001b0c: a8c00115 stw r3,4(r21)
8001b10: dc800e15 stw r18,56(sp)
8001b14: dc400d15 stw r17,52(sp)
8001b18: 1440ca16 blt r2,r17,8001e44 <___vfprintf_internal_r+0x1958>
8001b1c: a8c00204 addi r3,r21,8
8001b20: 2000061e bne r4,zero,8001b3c <___vfprintf_internal_r+0x1650>
8001b24: d9414717 ldw r5,1308(sp)
8001b28: 2800041e bne r5,zero,8001b3c <___vfprintf_internal_r+0x1650>
8001b2c: d9814c17 ldw r6,1328(sp)
8001b30: 3080004c andi r2,r6,1
8001b34: 1005003a cmpeq r2,r2,zero
8001b38: 103bea1e bne r2,zero,8000ae4 <___vfprintf_internal_r+0x5f8>
8001b3c: 00800044 movi r2,1
8001b40: dc400d17 ldw r17,52(sp)
8001b44: 18800115 stw r2,4(r3)
8001b48: d8814917 ldw r2,1316(sp)
8001b4c: 94800044 addi r18,r18,1
8001b50: 8c400044 addi r17,r17,1
8001b54: 18800015 stw r2,0(r3)
8001b58: 008001c4 movi r2,7
8001b5c: dc800e15 stw r18,56(sp)
8001b60: dc400d15 stw r17,52(sp)
8001b64: 1440ca16 blt r2,r17,8001e90 <___vfprintf_internal_r+0x19a4>
8001b68: 18c00204 addi r3,r3,8
8001b6c: 0121c83a sub r16,zero,r4
8001b70: 0400500e bge zero,r16,8001cb4 <___vfprintf_internal_r+0x17c8>
8001b74: 00800404 movi r2,16
8001b78: 1400800e bge r2,r16,8001d7c <___vfprintf_internal_r+0x1890>
8001b7c: 1027883a mov r19,r2
8001b80: 07020074 movhi fp,2049
8001b84: e737b784 addi fp,fp,-8482
8001b88: 050001c4 movi r20,7
8001b8c: 00000306 br 8001b9c <___vfprintf_internal_r+0x16b0>
8001b90: 18c00204 addi r3,r3,8
8001b94: 843ffc04 addi r16,r16,-16
8001b98: 9c007a0e bge r19,r16,8001d84 <___vfprintf_internal_r+0x1898>
8001b9c: 94800404 addi r18,r18,16
8001ba0: 8c400044 addi r17,r17,1
8001ba4: 1f000015 stw fp,0(r3)
8001ba8: 1cc00115 stw r19,4(r3)
8001bac: dc800e15 stw r18,56(sp)
8001bb0: dc400d15 stw r17,52(sp)
8001bb4: a47ff60e bge r20,r17,8001b90 <___vfprintf_internal_r+0x16a4>
8001bb8: d9014f17 ldw r4,1340(sp)
8001bbc: b00b883a mov r5,r22
8001bc0: d9800c04 addi r6,sp,48
8001bc4: 80004940 call 8000494 <__sprint_r>
8001bc8: 103c001e bne r2,zero,8000bcc <___vfprintf_internal_r+0x6e0>
8001bcc: dc800e17 ldw r18,56(sp)
8001bd0: dc400d17 ldw r17,52(sp)
8001bd4: d8c01904 addi r3,sp,100
8001bd8: 003fee06 br 8001b94 <___vfprintf_internal_r+0x16a8>
8001bdc: 3c000017 ldw r16,0(r7)
8001be0: 0023883a mov r17,zero
8001be4: 39c00104 addi r7,r7,4
8001be8: d9c14015 stw r7,1280(sp)
8001bec: 003e8c06 br 8001620 <___vfprintf_internal_r+0x1134>
8001bf0: d9401904 addi r5,sp,100
8001bf4: dd000f04 addi r20,sp,60
8001bf8: d9414115 stw r5,1284(sp)
8001bfc: d9814417 ldw r6,1296(sp)
8001c00: 880a973a slli r5,r17,28
8001c04: 8004d13a srli r2,r16,4
8001c08: 810003cc andi r4,r16,15
8001c0c: 3109883a add r4,r6,r4
8001c10: 2884b03a or r2,r5,r2
8001c14: 21400003 ldbu r5,0(r4)
8001c18: d9014117 ldw r4,1284(sp)
8001c1c: 8806d13a srli r3,r17,4
8001c20: 1021883a mov r16,r2
8001c24: 213fffc4 addi r4,r4,-1
8001c28: d9014115 stw r4,1284(sp)
8001c2c: d9814117 ldw r6,1284(sp)
8001c30: 10c8b03a or r4,r2,r3
8001c34: 1823883a mov r17,r3
8001c38: 31400005 stb r5,0(r6)
8001c3c: 203fef1e bne r4,zero,8001bfc <___vfprintf_internal_r+0x1710>
8001c40: 003cc506 br 8000f58 <___vfprintf_internal_r+0xa6c>
8001c44: 00800c04 movi r2,48
8001c48: d98018c4 addi r6,sp,99
8001c4c: dd000f04 addi r20,sp,60
8001c50: d88018c5 stb r2,99(sp)
8001c54: d9814115 stw r6,1284(sp)
8001c58: 003cbf06 br 8000f58 <___vfprintf_internal_r+0xa6c>
8001c5c: dc400d17 ldw r17,52(sp)
8001c60: 07020074 movhi fp,2049
8001c64: e737bb84 addi fp,fp,-8466
8001c68: 003bc106 br 8000b70 <___vfprintf_internal_r+0x684>
8001c6c: d9414c17 ldw r5,1328(sp)
8001c70: 2880040c andi r2,r5,16
8001c74: 10007c26 beq r2,zero,8001e68 <___vfprintf_internal_r+0x197c>
8001c78: 38800017 ldw r2,0(r7)
8001c7c: 39c00104 addi r7,r7,4
8001c80: d9c14015 stw r7,1280(sp)
8001c84: d9814b17 ldw r6,1324(sp)
8001c88: d9c14017 ldw r7,1280(sp)
8001c8c: 11800015 stw r6,0(r2)
8001c90: 003a7206 br 800065c <___vfprintf_internal_r+0x170>
8001c94: d9014f17 ldw r4,1340(sp)
8001c98: b00b883a mov r5,r22
8001c9c: d9800c04 addi r6,sp,48
8001ca0: 80004940 call 8000494 <__sprint_r>
8001ca4: 103bc91e bne r2,zero,8000bcc <___vfprintf_internal_r+0x6e0>
8001ca8: dc800e17 ldw r18,56(sp)
8001cac: dc400d17 ldw r17,52(sp)
8001cb0: d8c01904 addi r3,sp,100
8001cb4: d9014717 ldw r4,1308(sp)
8001cb8: d9414117 ldw r5,1284(sp)
8001cbc: 8c400044 addi r17,r17,1
8001cc0: 9125883a add r18,r18,r4
8001cc4: 008001c4 movi r2,7
8001cc8: 19400015 stw r5,0(r3)
8001ccc: 19000115 stw r4,4(r3)
8001cd0: dc800e15 stw r18,56(sp)
8001cd4: dc400d15 stw r17,52(sp)
8001cd8: 147ce816 blt r2,r17,800107c <___vfprintf_internal_r+0xb90>
8001cdc: 18c00204 addi r3,r3,8
8001ce0: 003b8006 br 8000ae4 <___vfprintf_internal_r+0x5f8>
8001ce4: 38c00017 ldw r3,0(r7)
8001ce8: 39000204 addi r4,r7,8
8001cec: d9014015 stw r4,1280(sp)
8001cf0: d8c14215 stw r3,1288(sp)
8001cf4: 39c00117 ldw r7,4(r7)
8001cf8: d9c14315 stw r7,1292(sp)
8001cfc: 003e1a06 br 8001568 <___vfprintf_internal_r+0x107c>
8001d00: 0005883a mov r2,zero
8001d04: 1409c83a sub r4,r2,r16
8001d08: 1105803a cmpltu r2,r2,r4
8001d0c: 044bc83a sub r5,zero,r17
8001d10: 2885c83a sub r2,r5,r2
8001d14: 2021883a mov r16,r4
8001d18: 1023883a mov r17,r2
8001d1c: 01000044 movi r4,1
8001d20: 00800b44 movi r2,45
8001d24: d8800405 stb r2,16(sp)
8001d28: 003c7e06 br 8000f24 <___vfprintf_internal_r+0xa38>
8001d2c: d9014f17 ldw r4,1340(sp)
8001d30: b00b883a mov r5,r22
8001d34: d9800c04 addi r6,sp,48
8001d38: 80004940 call 8000494 <__sprint_r>
8001d3c: 103ba31e bne r2,zero,8000bcc <___vfprintf_internal_r+0x6e0>
8001d40: dc800e17 ldw r18,56(sp)
8001d44: dc400d17 ldw r17,52(sp)
8001d48: d9000517 ldw r4,20(sp)
8001d4c: d9401904 addi r5,sp,100
8001d50: 003da106 br 80013d8 <___vfprintf_internal_r+0xeec>
8001d54: d9014f17 ldw r4,1340(sp)
8001d58: b00b883a mov r5,r22
8001d5c: d9800c04 addi r6,sp,48
8001d60: 80004940 call 8000494 <__sprint_r>
8001d64: 103b991e bne r2,zero,8000bcc <___vfprintf_internal_r+0x6e0>
8001d68: dc800e17 ldw r18,56(sp)
8001d6c: dc400d17 ldw r17,52(sp)
8001d70: d9000517 ldw r4,20(sp)
8001d74: d8c01904 addi r3,sp,100
8001d78: 003d8b06 br 80013a8 <___vfprintf_internal_r+0xebc>
8001d7c: 07020074 movhi fp,2049
8001d80: e737b784 addi fp,fp,-8482
8001d84: 9425883a add r18,r18,r16
8001d88: 8c400044 addi r17,r17,1
8001d8c: 008001c4 movi r2,7
8001d90: 1f000015 stw fp,0(r3)
8001d94: 1c000115 stw r16,4(r3)
8001d98: dc800e15 stw r18,56(sp)
8001d9c: dc400d15 stw r17,52(sp)
8001da0: 147fbc16 blt r2,r17,8001c94 <___vfprintf_internal_r+0x17a8>
8001da4: 18c00204 addi r3,r3,8
8001da8: 003fc206 br 8001cb4 <___vfprintf_internal_r+0x17c8>
8001dac: d9014f17 ldw r4,1340(sp)
8001db0: b00b883a mov r5,r22
8001db4: d9800c04 addi r6,sp,48
8001db8: 80004940 call 8000494 <__sprint_r>
8001dbc: 103b831e bne r2,zero,8000bcc <___vfprintf_internal_r+0x6e0>
8001dc0: dc800e17 ldw r18,56(sp)
8001dc4: d9000517 ldw r4,20(sp)
8001dc8: d8c01904 addi r3,sp,100
8001dcc: 003cfc06 br 80011c0 <___vfprintf_internal_r+0xcd4>
8001dd0: 07020074 movhi fp,2049
8001dd4: e737b784 addi fp,fp,-8482
8001dd8: 003bde06 br 8000d54 <___vfprintf_internal_r+0x868>
8001ddc: 00820074 movhi r2,2049
8001de0: 10b7a604 addi r2,r2,-8552
8001de4: d8814115 stw r2,1284(sp)
8001de8: 003def06 br 80015a8 <___vfprintf_internal_r+0x10bc>
8001dec: d9014217 ldw r4,1288(sp)
8001df0: d9414317 ldw r5,1292(sp)
8001df4: 8006fdc0 call 8006fdc <__isnand>
8001df8: 10003926 beq r2,zero,8001ee0 <___vfprintf_internal_r+0x19f4>
8001dfc: d9414d17 ldw r5,1332(sp)
8001e00: 008011c4 movi r2,71
8001e04: 1140ce16 blt r2,r5,8002140 <___vfprintf_internal_r+0x1c54>
8001e08: 01820074 movhi r6,2049
8001e0c: 31b7a704 addi r6,r6,-8548
8001e10: d9814115 stw r6,1284(sp)
8001e14: 003de406 br 80015a8 <___vfprintf_internal_r+0x10bc>
8001e18: d9014c17 ldw r4,1328(sp)
8001e1c: bdc00044 addi r23,r23,1
8001e20: b8c00007 ldb r3,0(r23)
8001e24: 21000814 ori r4,r4,32
8001e28: d9014c15 stw r4,1328(sp)
8001e2c: 003a2e06 br 80006e8 <___vfprintf_internal_r+0x1fc>
8001e30: dcc14515 stw r19,1300(sp)
8001e34: 98011016 blt r19,zero,8002278 <___vfprintf_internal_r+0x1d8c>
8001e38: 980f883a mov r7,r19
8001e3c: d8014615 stw zero,1304(sp)
8001e40: 003c4c06 br 8000f74 <___vfprintf_internal_r+0xa88>
8001e44: d9014f17 ldw r4,1340(sp)
8001e48: b00b883a mov r5,r22
8001e4c: d9800c04 addi r6,sp,48
8001e50: 80004940 call 8000494 <__sprint_r>
8001e54: 103b5d1e bne r2,zero,8000bcc <___vfprintf_internal_r+0x6e0>
8001e58: dc800e17 ldw r18,56(sp)
8001e5c: d9000517 ldw r4,20(sp)
8001e60: d8c01904 addi r3,sp,100
8001e64: 003f2e06 br 8001b20 <___vfprintf_internal_r+0x1634>
8001e68: d8c14c17 ldw r3,1328(sp)
8001e6c: 1880100c andi r2,r3,64
8001e70: 1000a026 beq r2,zero,80020f4 <___vfprintf_internal_r+0x1c08>
8001e74: 38800017 ldw r2,0(r7)
8001e78: 39c00104 addi r7,r7,4
8001e7c: d9c14015 stw r7,1280(sp)
8001e80: d9014b17 ldw r4,1324(sp)
8001e84: d9c14017 ldw r7,1280(sp)
8001e88: 1100000d sth r4,0(r2)
8001e8c: 0039f306 br 800065c <___vfprintf_internal_r+0x170>
8001e90: d9014f17 ldw r4,1340(sp)
8001e94: b00b883a mov r5,r22
8001e98: d9800c04 addi r6,sp,48
8001e9c: 80004940 call 8000494 <__sprint_r>
8001ea0: 103b4a1e bne r2,zero,8000bcc <___vfprintf_internal_r+0x6e0>
8001ea4: dc800e17 ldw r18,56(sp)
8001ea8: dc400d17 ldw r17,52(sp)
8001eac: d9000517 ldw r4,20(sp)
8001eb0: d8c01904 addi r3,sp,100
8001eb4: 003f2d06 br 8001b6c <___vfprintf_internal_r+0x1680>
8001eb8: 00800184 movi r2,6
8001ebc: 14c09a36 bltu r2,r19,8002128 <___vfprintf_internal_r+0x1c3c>
8001ec0: dcc14515 stw r19,1300(sp)
8001ec4: 9800010e bge r19,zero,8001ecc <___vfprintf_internal_r+0x19e0>
8001ec8: d8014515 stw zero,1300(sp)
8001ecc: 00820074 movhi r2,2049
8001ed0: 10b7a904 addi r2,r2,-8540
8001ed4: 980f883a mov r7,r19
8001ed8: d8814115 stw r2,1284(sp)
8001edc: 003a7206 br 80008a8 <___vfprintf_internal_r+0x3bc>
8001ee0: 00bfffc4 movi r2,-1
8001ee4: 9880e226 beq r19,r2,8002270 <___vfprintf_internal_r+0x1d84>
8001ee8: d9414d17 ldw r5,1332(sp)
8001eec: 008019c4 movi r2,103
8001ef0: 2880dc26 beq r5,r2,8002264 <___vfprintf_internal_r+0x1d78>
8001ef4: 008011c4 movi r2,71
8001ef8: 2880da26 beq r5,r2,8002264 <___vfprintf_internal_r+0x1d78>
8001efc: d9414c17 ldw r5,1328(sp)
8001f00: d9014317 ldw r4,1292(sp)
8001f04: d9814217 ldw r6,1288(sp)
8001f08: 29404014 ori r5,r5,256
8001f0c: d9414c15 stw r5,1328(sp)
8001f10: 2000cc16 blt r4,zero,8002244 <___vfprintf_internal_r+0x1d58>
8001f14: 3021883a mov r16,r6
8001f18: 2023883a mov r17,r4
8001f1c: 0039883a mov fp,zero
8001f20: d9414d17 ldw r5,1332(sp)
8001f24: 00801984 movi r2,102
8001f28: 2880b726 beq r5,r2,8002208 <___vfprintf_internal_r+0x1d1c>
8001f2c: 00801184 movi r2,70
8001f30: 2880b526 beq r5,r2,8002208 <___vfprintf_internal_r+0x1d1c>
8001f34: 00801944 movi r2,101
8001f38: 2880c826 beq r5,r2,800225c <___vfprintf_internal_r+0x1d70>
8001f3c: 00801144 movi r2,69
8001f40: 2880c626 beq r5,r2,800225c <___vfprintf_internal_r+0x1d70>
8001f44: 9829883a mov r20,r19
8001f48: d9014f17 ldw r4,1340(sp)
8001f4c: d8800504 addi r2,sp,20
8001f50: 880d883a mov r6,r17
8001f54: d8800115 stw r2,4(sp)
8001f58: d8c00604 addi r3,sp,24
8001f5c: d8800704 addi r2,sp,28
8001f60: 800b883a mov r5,r16
8001f64: 01c00084 movi r7,2
8001f68: d8c00215 stw r3,8(sp)
8001f6c: d8800315 stw r2,12(sp)
8001f70: dd000015 stw r20,0(sp)
8001f74: 80027540 call 8002754 <_dtoa_r>
8001f78: d9814d17 ldw r6,1332(sp)
8001f7c: d8814115 stw r2,1284(sp)
8001f80: 008019c4 movi r2,103
8001f84: 30809526 beq r6,r2,80021dc <___vfprintf_internal_r+0x1cf0>
8001f88: d8c14d17 ldw r3,1332(sp)
8001f8c: 008011c4 movi r2,71
8001f90: 18809226 beq r3,r2,80021dc <___vfprintf_internal_r+0x1cf0>
8001f94: d9414117 ldw r5,1284(sp)
8001f98: d9814d17 ldw r6,1332(sp)
8001f9c: 00801984 movi r2,102
8001fa0: 2d25883a add r18,r5,r20
8001fa4: 30808626 beq r6,r2,80021c0 <___vfprintf_internal_r+0x1cd4>
8001fa8: 00801184 movi r2,70
8001fac: 30808426 beq r6,r2,80021c0 <___vfprintf_internal_r+0x1cd4>
8001fb0: 000d883a mov r6,zero
8001fb4: 000f883a mov r7,zero
8001fb8: 880b883a mov r5,r17
8001fbc: 8009883a mov r4,r16
8001fc0: 8008f8c0 call 8008f8c <__eqdf2>
8001fc4: 1000751e bne r2,zero,800219c <___vfprintf_internal_r+0x1cb0>
8001fc8: 9005883a mov r2,r18
8001fcc: dc800715 stw r18,28(sp)
8001fd0: d9014117 ldw r4,1284(sp)
8001fd4: d9414d17 ldw r5,1332(sp)
8001fd8: 00c019c4 movi r3,103
8001fdc: 1125c83a sub r18,r2,r4
8001fe0: 28c06826 beq r5,r3,8002184 <___vfprintf_internal_r+0x1c98>
8001fe4: 008011c4 movi r2,71
8001fe8: 28806626 beq r5,r2,8002184 <___vfprintf_internal_r+0x1c98>
8001fec: d9000517 ldw r4,20(sp)
8001ff0: d8c14d17 ldw r3,1332(sp)
8001ff4: 00801944 movi r2,101
8001ff8: 10c05516 blt r2,r3,8002150 <___vfprintf_internal_r+0x1c64>
8001ffc: 213fffc4 addi r4,r4,-1
8002000: d9000515 stw r4,20(sp)
8002004: d8c00805 stb r3,32(sp)
8002008: 2021883a mov r16,r4
800200c: 2000c116 blt r4,zero,8002314 <___vfprintf_internal_r+0x1e28>
8002010: 00800ac4 movi r2,43
8002014: d8800845 stb r2,33(sp)
8002018: 00800244 movi r2,9
800201c: 1400af0e bge r2,r16,80022dc <___vfprintf_internal_r+0x1df0>
8002020: 1027883a mov r19,r2
8002024: dc400b84 addi r17,sp,46
8002028: 8009883a mov r4,r16
800202c: 01400284 movi r5,10
8002030: 80096740 call 8009674 <__modsi3>
8002034: 10800c04 addi r2,r2,48
8002038: 8c7fffc4 addi r17,r17,-1
800203c: 8009883a mov r4,r16
8002040: 01400284 movi r5,10
8002044: 88800005 stb r2,0(r17)
8002048: 80096140 call 8009614 <__divsi3>
800204c: 1021883a mov r16,r2
8002050: 98bff516 blt r19,r2,8002028 <___vfprintf_internal_r+0x1b3c>
8002054: 10c00c04 addi r3,r2,48
8002058: d88009c4 addi r2,sp,39
800205c: 108001c4 addi r2,r2,7
8002060: 897fffc4 addi r5,r17,-1
8002064: 88ffffc5 stb r3,-1(r17)
8002068: 2880a72e bgeu r5,r2,8002308 <___vfprintf_internal_r+0x1e1c>
800206c: 1009883a mov r4,r2
8002070: d9800804 addi r6,sp,32
8002074: d8c00884 addi r3,sp,34
8002078: 28800003 ldbu r2,0(r5)
800207c: 29400044 addi r5,r5,1
8002080: 18800005 stb r2,0(r3)
8002084: 18c00044 addi r3,r3,1
8002088: 293ffb36 bltu r5,r4,8002078 <___vfprintf_internal_r+0x1b8c>
800208c: 1987c83a sub r3,r3,r6
8002090: 00800044 movi r2,1
8002094: d8c14815 stw r3,1312(sp)
8002098: 90cf883a add r7,r18,r3
800209c: 1480960e bge r2,r18,80022f8 <___vfprintf_internal_r+0x1e0c>
80020a0: 39c00044 addi r7,r7,1
80020a4: d9c14515 stw r7,1300(sp)
80020a8: 38003416 blt r7,zero,800217c <___vfprintf_internal_r+0x1c90>
80020ac: e0803fcc andi r2,fp,255
80020b0: 1080201c xori r2,r2,128
80020b4: 10bfe004 addi r2,r2,-128
80020b8: 10004e26 beq r2,zero,80021f4 <___vfprintf_internal_r+0x1d08>
80020bc: 00800b44 movi r2,45
80020c0: dc814715 stw r18,1308(sp)
80020c4: d8014615 stw zero,1304(sp)
80020c8: d8800405 stb r2,16(sp)
80020cc: 003bab06 br 8000f7c <___vfprintf_internal_r+0xa90>
80020d0: 00800b44 movi r2,45
80020d4: d8800405 stb r2,16(sp)
80020d8: 003d2d06 br 8001590 <___vfprintf_internal_r+0x10a4>
80020dc: d9014f17 ldw r4,1340(sp)
80020e0: b00b883a mov r5,r22
80020e4: d9800c04 addi r6,sp,48
80020e8: 80004940 call 8000494 <__sprint_r>
80020ec: 103ab71e bne r2,zero,8000bcc <___vfprintf_internal_r+0x6e0>
80020f0: 003ab506 br 8000bc8 <___vfprintf_internal_r+0x6dc>
80020f4: 38800017 ldw r2,0(r7)
80020f8: 39c00104 addi r7,r7,4
80020fc: d9c14015 stw r7,1280(sp)
8002100: d9414b17 ldw r5,1324(sp)
8002104: d9c14017 ldw r7,1280(sp)
8002108: 11400015 stw r5,0(r2)
800210c: 00395306 br 800065c <___vfprintf_internal_r+0x170>
8002110: 980f883a mov r7,r19
8002114: dcc14515 stw r19,1300(sp)
8002118: d8014615 stw zero,1304(sp)
800211c: 003b9506 br 8000f74 <___vfprintf_internal_r+0xa88>
8002120: 0027883a mov r19,zero
8002124: 00397206 br 80006f0 <___vfprintf_internal_r+0x204>
8002128: 00c20074 movhi r3,2049
800212c: 18f7a904 addi r3,r3,-8540
8002130: 100f883a mov r7,r2
8002134: d8814515 stw r2,1300(sp)
8002138: d8c14115 stw r3,1284(sp)
800213c: 0039da06 br 80008a8 <___vfprintf_internal_r+0x3bc>
8002140: 00820074 movhi r2,2049
8002144: 10b7a804 addi r2,r2,-8544
8002148: d8814115 stw r2,1284(sp)
800214c: 003d1606 br 80015a8 <___vfprintf_internal_r+0x10bc>
8002150: d9414d17 ldw r5,1332(sp)
8002154: 00801984 movi r2,102
8002158: 28804926 beq r5,r2,8002280 <___vfprintf_internal_r+0x1d94>
800215c: 200f883a mov r7,r4
8002160: 24805716 blt r4,r18,80022c0 <___vfprintf_internal_r+0x1dd4>
8002164: d9414c17 ldw r5,1328(sp)
8002168: 2880004c andi r2,r5,1
800216c: 10000126 beq r2,zero,8002174 <___vfprintf_internal_r+0x1c88>
8002170: 21c00044 addi r7,r4,1
8002174: d9c14515 stw r7,1300(sp)
8002178: 383fcc0e bge r7,zero,80020ac <___vfprintf_internal_r+0x1bc0>
800217c: d8014515 stw zero,1300(sp)
8002180: 003fca06 br 80020ac <___vfprintf_internal_r+0x1bc0>
8002184: d9000517 ldw r4,20(sp)
8002188: 00bfff04 movi r2,-4
800218c: 1100480e bge r2,r4,80022b0 <___vfprintf_internal_r+0x1dc4>
8002190: 99004716 blt r19,r4,80022b0 <___vfprintf_internal_r+0x1dc4>
8002194: d8c14d15 stw r3,1332(sp)
8002198: 003ff006 br 800215c <___vfprintf_internal_r+0x1c70>
800219c: d8800717 ldw r2,28(sp)
80021a0: 14bf8b2e bgeu r2,r18,8001fd0 <___vfprintf_internal_r+0x1ae4>
80021a4: 9007883a mov r3,r18
80021a8: 01000c04 movi r4,48
80021ac: 11000005 stb r4,0(r2)
80021b0: 10800044 addi r2,r2,1
80021b4: d8800715 stw r2,28(sp)
80021b8: 18bffc1e bne r3,r2,80021ac <___vfprintf_internal_r+0x1cc0>
80021bc: 003f8406 br 8001fd0 <___vfprintf_internal_r+0x1ae4>
80021c0: d8814117 ldw r2,1284(sp)
80021c4: 10c00007 ldb r3,0(r2)
80021c8: 00800c04 movi r2,48
80021cc: 18805b26 beq r3,r2,800233c <___vfprintf_internal_r+0x1e50>
80021d0: d9000517 ldw r4,20(sp)
80021d4: 9125883a add r18,r18,r4
80021d8: 003f7506 br 8001fb0 <___vfprintf_internal_r+0x1ac4>
80021dc: d9014c17 ldw r4,1328(sp)
80021e0: 2080004c andi r2,r4,1
80021e4: 1005003a cmpeq r2,r2,zero
80021e8: 103f6a26 beq r2,zero,8001f94 <___vfprintf_internal_r+0x1aa8>
80021ec: d8800717 ldw r2,28(sp)
80021f0: 003f7706 br 8001fd0 <___vfprintf_internal_r+0x1ae4>
80021f4: d9c14515 stw r7,1300(sp)
80021f8: 38004d16 blt r7,zero,8002330 <___vfprintf_internal_r+0x1e44>
80021fc: dc814715 stw r18,1308(sp)
8002200: d8014615 stw zero,1304(sp)
8002204: 003b5b06 br 8000f74 <___vfprintf_internal_r+0xa88>
8002208: d9014f17 ldw r4,1340(sp)
800220c: d8800504 addi r2,sp,20
8002210: d8800115 stw r2,4(sp)
8002214: d8c00604 addi r3,sp,24
8002218: d8800704 addi r2,sp,28
800221c: 800b883a mov r5,r16
8002220: 880d883a mov r6,r17
8002224: 01c000c4 movi r7,3
8002228: d8c00215 stw r3,8(sp)
800222c: d8800315 stw r2,12(sp)
8002230: dcc00015 stw r19,0(sp)
8002234: 9829883a mov r20,r19
8002238: 80027540 call 8002754 <_dtoa_r>
800223c: d8814115 stw r2,1284(sp)
8002240: 003f5106 br 8001f88 <___vfprintf_internal_r+0x1a9c>
8002244: d8c14217 ldw r3,1288(sp)
8002248: d9014317 ldw r4,1292(sp)
800224c: 07000b44 movi fp,45
8002250: 1821883a mov r16,r3
8002254: 2460003c xorhi r17,r4,32768
8002258: 003f3106 br 8001f20 <___vfprintf_internal_r+0x1a34>
800225c: 9d000044 addi r20,r19,1
8002260: 003f3906 br 8001f48 <___vfprintf_internal_r+0x1a5c>
8002264: 983f251e bne r19,zero,8001efc <___vfprintf_internal_r+0x1a10>
8002268: 04c00044 movi r19,1
800226c: 003f2306 br 8001efc <___vfprintf_internal_r+0x1a10>
8002270: 04c00184 movi r19,6
8002274: 003f2106 br 8001efc <___vfprintf_internal_r+0x1a10>
8002278: d8014515 stw zero,1300(sp)
800227c: 003eee06 br 8001e38 <___vfprintf_internal_r+0x194c>
8002280: 200f883a mov r7,r4
8002284: 0100370e bge zero,r4,8002364 <___vfprintf_internal_r+0x1e78>
8002288: 9800031e bne r19,zero,8002298 <___vfprintf_internal_r+0x1dac>
800228c: d9814c17 ldw r6,1328(sp)
8002290: 3080004c andi r2,r6,1
8002294: 103fb726 beq r2,zero,8002174 <___vfprintf_internal_r+0x1c88>
8002298: 20800044 addi r2,r4,1
800229c: 98a7883a add r19,r19,r2
80022a0: dcc14515 stw r19,1300(sp)
80022a4: 980f883a mov r7,r19
80022a8: 983f800e bge r19,zero,80020ac <___vfprintf_internal_r+0x1bc0>
80022ac: 003fb306 br 800217c <___vfprintf_internal_r+0x1c90>
80022b0: d9814d17 ldw r6,1332(sp)
80022b4: 31bfff84 addi r6,r6,-2
80022b8: d9814d15 stw r6,1332(sp)
80022bc: 003f4c06 br 8001ff0 <___vfprintf_internal_r+0x1b04>
80022c0: 0100180e bge zero,r4,8002324 <___vfprintf_internal_r+0x1e38>
80022c4: 00800044 movi r2,1
80022c8: 1485883a add r2,r2,r18
80022cc: d8814515 stw r2,1300(sp)
80022d0: 100f883a mov r7,r2
80022d4: 103f750e bge r2,zero,80020ac <___vfprintf_internal_r+0x1bc0>
80022d8: 003fa806 br 800217c <___vfprintf_internal_r+0x1c90>
80022dc: 80c00c04 addi r3,r16,48
80022e0: 00800c04 movi r2,48
80022e4: d8c008c5 stb r3,35(sp)
80022e8: d9800804 addi r6,sp,32
80022ec: d8c00904 addi r3,sp,36
80022f0: d8800885 stb r2,34(sp)
80022f4: 003f6506 br 800208c <___vfprintf_internal_r+0x1ba0>
80022f8: d9014c17 ldw r4,1328(sp)
80022fc: 2084703a and r2,r4,r2
8002300: 103f9c26 beq r2,zero,8002174 <___vfprintf_internal_r+0x1c88>
8002304: 003f6606 br 80020a0 <___vfprintf_internal_r+0x1bb4>
8002308: d9800804 addi r6,sp,32
800230c: d8c00884 addi r3,sp,34
8002310: 003f5e06 br 800208c <___vfprintf_internal_r+0x1ba0>
8002314: 00800b44 movi r2,45
8002318: 0121c83a sub r16,zero,r4
800231c: d8800845 stb r2,33(sp)
8002320: 003f3d06 br 8002018 <___vfprintf_internal_r+0x1b2c>
8002324: 00800084 movi r2,2
8002328: 1105c83a sub r2,r2,r4
800232c: 003fe606 br 80022c8 <___vfprintf_internal_r+0x1ddc>
8002330: d8014515 stw zero,1300(sp)
8002334: dc814715 stw r18,1308(sp)
8002338: 003fb106 br 8002200 <___vfprintf_internal_r+0x1d14>
800233c: 000d883a mov r6,zero
8002340: 000f883a mov r7,zero
8002344: 8009883a mov r4,r16
8002348: 880b883a mov r5,r17
800234c: 80090140 call 8009014 <__nedf2>
8002350: 103f9f26 beq r2,zero,80021d0 <___vfprintf_internal_r+0x1ce4>
8002354: 00800044 movi r2,1
8002358: 1509c83a sub r4,r2,r20
800235c: d9000515 stw r4,20(sp)
8002360: 003f9b06 br 80021d0 <___vfprintf_internal_r+0x1ce4>
8002364: 98000d1e bne r19,zero,800239c <___vfprintf_internal_r+0x1eb0>
8002368: d8c14c17 ldw r3,1328(sp)
800236c: 1880004c andi r2,r3,1
8002370: 10000a1e bne r2,zero,800239c <___vfprintf_internal_r+0x1eb0>
8002374: 01000044 movi r4,1
8002378: 200f883a mov r7,r4
800237c: d9014515 stw r4,1300(sp)
8002380: 003f4a06 br 80020ac <___vfprintf_internal_r+0x1bc0>
8002384: 3cc00017 ldw r19,0(r7)
8002388: 39c00104 addi r7,r7,4
800238c: 983d0e0e bge r19,zero,80017c8 <___vfprintf_internal_r+0x12dc>
8002390: b8c00007 ldb r3,0(r23)
8002394: 04ffffc4 movi r19,-1
8002398: 0038d306 br 80006e8 <___vfprintf_internal_r+0x1fc>
800239c: 9cc00084 addi r19,r19,2
80023a0: dcc14515 stw r19,1300(sp)
80023a4: 980f883a mov r7,r19
80023a8: 983f400e bge r19,zero,80020ac <___vfprintf_internal_r+0x1bc0>
80023ac: 003f7306 br 800217c <___vfprintf_internal_r+0x1c90>
080023b0 <__vfprintf_internal>:
80023b0: 00820074 movhi r2,2049
80023b4: 10bf4804 addi r2,r2,-736
80023b8: 2013883a mov r9,r4
80023bc: 11000017 ldw r4,0(r2)
80023c0: 2805883a mov r2,r5
80023c4: 300f883a mov r7,r6
80023c8: 480b883a mov r5,r9
80023cc: 100d883a mov r6,r2
80023d0: 80004ec1 jmpi 80004ec <___vfprintf_internal_r>
080023d4 <__swsetup_r>:
80023d4: 00820074 movhi r2,2049
80023d8: 10bf4804 addi r2,r2,-736
80023dc: 10c00017 ldw r3,0(r2)
80023e0: defffd04 addi sp,sp,-12
80023e4: dc400115 stw r17,4(sp)
80023e8: dc000015 stw r16,0(sp)
80023ec: dfc00215 stw ra,8(sp)
80023f0: 2023883a mov r17,r4
80023f4: 2821883a mov r16,r5
80023f8: 18000226 beq r3,zero,8002404 <__swsetup_r+0x30>
80023fc: 18800e17 ldw r2,56(r3)
8002400: 10001f26 beq r2,zero,8002480 <__swsetup_r+0xac>
8002404: 8100030b ldhu r4,12(r16)
8002408: 2080020c andi r2,r4,8
800240c: 10002826 beq r2,zero,80024b0 <__swsetup_r+0xdc>
8002410: 81400417 ldw r5,16(r16)
8002414: 28001d26 beq r5,zero,800248c <__swsetup_r+0xb8>
8002418: 2080004c andi r2,r4,1
800241c: 1005003a cmpeq r2,r2,zero
8002420: 10000b26 beq r2,zero,8002450 <__swsetup_r+0x7c>
8002424: 2080008c andi r2,r4,2
8002428: 10001226 beq r2,zero,8002474 <__swsetup_r+0xa0>
800242c: 0005883a mov r2,zero
8002430: 80800215 stw r2,8(r16)
8002434: 28000b26 beq r5,zero,8002464 <__swsetup_r+0x90>
8002438: 0005883a mov r2,zero
800243c: dfc00217 ldw ra,8(sp)
8002440: dc400117 ldw r17,4(sp)
8002444: dc000017 ldw r16,0(sp)
8002448: dec00304 addi sp,sp,12
800244c: f800283a ret
8002450: 80800517 ldw r2,20(r16)
8002454: 80000215 stw zero,8(r16)
8002458: 0085c83a sub r2,zero,r2
800245c: 80800615 stw r2,24(r16)
8002460: 283ff51e bne r5,zero,8002438 <__swsetup_r+0x64>
8002464: 2080200c andi r2,r4,128
8002468: 103ff326 beq r2,zero,8002438 <__swsetup_r+0x64>
800246c: 00bfffc4 movi r2,-1
8002470: 003ff206 br 800243c <__swsetup_r+0x68>
8002474: 80800517 ldw r2,20(r16)
8002478: 80800215 stw r2,8(r16)
800247c: 003fed06 br 8002434 <__swsetup_r+0x60>
8002480: 1809883a mov r4,r3
8002484: 8003fa00 call 8003fa0 <__sinit>
8002488: 003fde06 br 8002404 <__swsetup_r+0x30>
800248c: 20c0a00c andi r3,r4,640
8002490: 00808004 movi r2,512
8002494: 18bfe026 beq r3,r2,8002418 <__swsetup_r+0x44>
8002498: 8809883a mov r4,r17
800249c: 800b883a mov r5,r16
80024a0: 8004d4c0 call 8004d4c <__smakebuf_r>
80024a4: 8100030b ldhu r4,12(r16)
80024a8: 81400417 ldw r5,16(r16)
80024ac: 003fda06 br 8002418 <__swsetup_r+0x44>
80024b0: 2080040c andi r2,r4,16
80024b4: 103fed26 beq r2,zero,800246c <__swsetup_r+0x98>
80024b8: 2080010c andi r2,r4,4
80024bc: 10001226 beq r2,zero,8002508 <__swsetup_r+0x134>
80024c0: 81400c17 ldw r5,48(r16)
80024c4: 28000526 beq r5,zero,80024dc <__swsetup_r+0x108>
80024c8: 80801004 addi r2,r16,64
80024cc: 28800226 beq r5,r2,80024d8 <__swsetup_r+0x104>
80024d0: 8809883a mov r4,r17
80024d4: 80043580 call 8004358 <_free_r>
80024d8: 80000c15 stw zero,48(r16)
80024dc: 8080030b ldhu r2,12(r16)
80024e0: 81400417 ldw r5,16(r16)
80024e4: 80000115 stw zero,4(r16)
80024e8: 10bff6cc andi r2,r2,65499
80024ec: 8080030d sth r2,12(r16)
80024f0: 81400015 stw r5,0(r16)
80024f4: 8080030b ldhu r2,12(r16)
80024f8: 10800214 ori r2,r2,8
80024fc: 113fffcc andi r4,r2,65535
8002500: 8080030d sth r2,12(r16)
8002504: 003fc306 br 8002414 <__swsetup_r+0x40>
8002508: 81400417 ldw r5,16(r16)
800250c: 003ff906 br 80024f4 <__swsetup_r+0x120>
08002510 <quorem>:
8002510: 28c00417 ldw r3,16(r5)
8002514: 20800417 ldw r2,16(r4)
8002518: defff104 addi sp,sp,-60
800251c: dfc00e15 stw ra,56(sp)
8002520: df000d15 stw fp,52(sp)
8002524: ddc00c15 stw r23,48(sp)
8002528: dd800b15 stw r22,44(sp)
800252c: dd400a15 stw r21,40(sp)
8002530: dd000915 stw r20,36(sp)
8002534: dcc00815 stw r19,32(sp)
8002538: dc800715 stw r18,28(sp)
800253c: dc400615 stw r17,24(sp)
8002540: dc000515 stw r16,20(sp)
8002544: d9000315 stw r4,12(sp)
8002548: d9400415 stw r5,16(sp)
800254c: 10c07f16 blt r2,r3,800274c <quorem+0x23c>
8002550: 1d3fffc4 addi r20,r3,-1
8002554: d8c00417 ldw r3,16(sp)
8002558: d9000317 ldw r4,12(sp)
800255c: a505883a add r2,r20,r20
8002560: 1085883a add r2,r2,r2
8002564: 1cc00504 addi r19,r3,20
8002568: 25c00504 addi r23,r4,20
800256c: 98ad883a add r22,r19,r2
8002570: 15c7883a add r3,r2,r23
8002574: b1400017 ldw r5,0(r22)
8002578: 19000017 ldw r4,0(r3)
800257c: d8c00015 stw r3,0(sp)
8002580: 29400044 addi r5,r5,1
8002584: d9000215 stw r4,8(sp)
8002588: 80096d40 call 80096d4 <__udivsi3>
800258c: 1039883a mov fp,r2
8002590: 10003d1e bne r2,zero,8002688 <quorem+0x178>
8002594: d9400417 ldw r5,16(sp)
8002598: d9000317 ldw r4,12(sp)
800259c: 8005a780 call 8005a78 <__mcmp>
80025a0: 10002c16 blt r2,zero,8002654 <quorem+0x144>
80025a4: e7000044 addi fp,fp,1
80025a8: b80f883a mov r7,r23
80025ac: 0011883a mov r8,zero
80025b0: 0009883a mov r4,zero
80025b4: 99400017 ldw r5,0(r19)
80025b8: 38c00017 ldw r3,0(r7)
80025bc: 9cc00104 addi r19,r19,4
80025c0: 28bfffcc andi r2,r5,65535
80025c4: 2085883a add r2,r4,r2
80025c8: 11bfffcc andi r6,r2,65535
80025cc: 193fffcc andi r4,r3,65535
80025d0: 1004d43a srli r2,r2,16
80025d4: 280ad43a srli r5,r5,16
80025d8: 2189c83a sub r4,r4,r6
80025dc: 2209883a add r4,r4,r8
80025e0: 1806d43a srli r3,r3,16
80025e4: 288b883a add r5,r5,r2
80025e8: 200dd43a srai r6,r4,16
80025ec: 28bfffcc andi r2,r5,65535
80025f0: 1887c83a sub r3,r3,r2
80025f4: 1987883a add r3,r3,r6
80025f8: 3900000d sth r4,0(r7)
80025fc: 38c0008d sth r3,2(r7)
8002600: 2808d43a srli r4,r5,16
8002604: 39c00104 addi r7,r7,4
8002608: 1811d43a srai r8,r3,16
800260c: b4ffe92e bgeu r22,r19,80025b4 <quorem+0xa4>
8002610: a505883a add r2,r20,r20
8002614: 1085883a add r2,r2,r2
8002618: b885883a add r2,r23,r2
800261c: 10c00017 ldw r3,0(r2)
8002620: 18000c1e bne r3,zero,8002654 <quorem+0x144>
8002624: 113fff04 addi r4,r2,-4
8002628: b900082e bgeu r23,r4,800264c <quorem+0x13c>
800262c: 10bfff17 ldw r2,-4(r2)
8002630: 10000326 beq r2,zero,8002640 <quorem+0x130>
8002634: 00000506 br 800264c <quorem+0x13c>
8002638: 20800017 ldw r2,0(r4)
800263c: 1000031e bne r2,zero,800264c <quorem+0x13c>
8002640: 213fff04 addi r4,r4,-4
8002644: a53fffc4 addi r20,r20,-1
8002648: b93ffb36 bltu r23,r4,8002638 <quorem+0x128>
800264c: d9000317 ldw r4,12(sp)
8002650: 25000415 stw r20,16(r4)
8002654: e005883a mov r2,fp
8002658: dfc00e17 ldw ra,56(sp)
800265c: df000d17 ldw fp,52(sp)
8002660: ddc00c17 ldw r23,48(sp)
8002664: dd800b17 ldw r22,44(sp)
8002668: dd400a17 ldw r21,40(sp)
800266c: dd000917 ldw r20,36(sp)
8002670: dcc00817 ldw r19,32(sp)
8002674: dc800717 ldw r18,28(sp)
8002678: dc400617 ldw r17,24(sp)
800267c: dc000517 ldw r16,20(sp)
8002680: dec00f04 addi sp,sp,60
8002684: f800283a ret
8002688: b823883a mov r17,r23
800268c: 9825883a mov r18,r19
8002690: d8000115 stw zero,4(sp)
8002694: 002b883a mov r21,zero
8002698: 94000017 ldw r16,0(r18)
800269c: e009883a mov r4,fp
80026a0: 94800104 addi r18,r18,4
80026a4: 817fffcc andi r5,r16,65535
80026a8: 80096e40 call 80096e4 <__mulsi3>
80026ac: 800ad43a srli r5,r16,16
80026b0: e009883a mov r4,fp
80026b4: a8a1883a add r16,r21,r2
80026b8: 80096e40 call 80096e4 <__mulsi3>
80026bc: 89000017 ldw r4,0(r17)
80026c0: 80ffffcc andi r3,r16,65535
80026c4: 8020d43a srli r16,r16,16
80026c8: 217fffcc andi r5,r4,65535
80026cc: 28cbc83a sub r5,r5,r3
80026d0: d8c00117 ldw r3,4(sp)
80026d4: 2008d43a srli r4,r4,16
80026d8: 1405883a add r2,r2,r16
80026dc: 28cb883a add r5,r5,r3
80026e0: 280dd43a srai r6,r5,16
80026e4: 10ffffcc andi r3,r2,65535
80026e8: 20c9c83a sub r4,r4,r3
80026ec: 2189883a add r4,r4,r6
80026f0: 8900008d sth r4,2(r17)
80026f4: 2009d43a srai r4,r4,16
80026f8: 8940000d sth r5,0(r17)
80026fc: 102ad43a srli r21,r2,16
8002700: 8c400104 addi r17,r17,4
8002704: d9000115 stw r4,4(sp)
8002708: b4bfe32e bgeu r22,r18,8002698 <quorem+0x188>
800270c: d9000217 ldw r4,8(sp)
8002710: 203fa01e bne r4,zero,8002594 <quorem+0x84>
8002714: d8800017 ldw r2,0(sp)
8002718: 10ffff04 addi r3,r2,-4
800271c: b8c0082e bgeu r23,r3,8002740 <quorem+0x230>
8002720: 10bfff17 ldw r2,-4(r2)
8002724: 10000326 beq r2,zero,8002734 <quorem+0x224>
8002728: 00000506 br 8002740 <quorem+0x230>
800272c: 18800017 ldw r2,0(r3)
8002730: 1000031e bne r2,zero,8002740 <quorem+0x230>
8002734: 18ffff04 addi r3,r3,-4
8002738: a53fffc4 addi r20,r20,-1
800273c: b8fffb36 bltu r23,r3,800272c <quorem+0x21c>
8002740: d8c00317 ldw r3,12(sp)
8002744: 1d000415 stw r20,16(r3)
8002748: 003f9206 br 8002594 <quorem+0x84>
800274c: 0005883a mov r2,zero
8002750: 003fc106 br 8002658 <quorem+0x148>
08002754 <_dtoa_r>:
8002754: 22001017 ldw r8,64(r4)
8002758: deffda04 addi sp,sp,-152
800275c: dd402115 stw r21,132(sp)
8002760: dd002015 stw r20,128(sp)
8002764: dc801e15 stw r18,120(sp)
8002768: dc401d15 stw r17,116(sp)
800276c: dfc02515 stw ra,148(sp)
8002770: df002415 stw fp,144(sp)
8002774: ddc02315 stw r23,140(sp)
8002778: dd802215 stw r22,136(sp)
800277c: dcc01f15 stw r19,124(sp)
8002780: dc001c15 stw r16,112(sp)
8002784: d9001615 stw r4,88(sp)
8002788: 3023883a mov r17,r6
800278c: 2829883a mov r20,r5
8002790: d9c01715 stw r7,92(sp)
8002794: dc802817 ldw r18,160(sp)
8002798: 302b883a mov r21,r6
800279c: 40000a26 beq r8,zero,80027c8 <_dtoa_r+0x74>
80027a0: 20801117 ldw r2,68(r4)
80027a4: 400b883a mov r5,r8
80027a8: 40800115 stw r2,4(r8)
80027ac: 20c01117 ldw r3,68(r4)
80027b0: 00800044 movi r2,1
80027b4: 10c4983a sll r2,r2,r3
80027b8: 40800215 stw r2,8(r8)
80027bc: 800591c0 call 800591c <_Bfree>
80027c0: d8c01617 ldw r3,88(sp)
80027c4: 18001015 stw zero,64(r3)
80027c8: 8800a316 blt r17,zero,8002a58 <_dtoa_r+0x304>
80027cc: 90000015 stw zero,0(r18)
80027d0: a8dffc2c andhi r3,r21,32752
80027d4: 009ffc34 movhi r2,32752
80027d8: 18809126 beq r3,r2,8002a20 <_dtoa_r+0x2cc>
80027dc: 000d883a mov r6,zero
80027e0: 000f883a mov r7,zero
80027e4: a009883a mov r4,r20
80027e8: a80b883a mov r5,r21
80027ec: dd001215 stw r20,72(sp)
80027f0: dd401315 stw r21,76(sp)
80027f4: 80090140 call 8009014 <__nedf2>
80027f8: 1000171e bne r2,zero,8002858 <_dtoa_r+0x104>
80027fc: d9802717 ldw r6,156(sp)
8002800: 00800044 movi r2,1
8002804: 30800015 stw r2,0(r6)
8002808: d8802917 ldw r2,164(sp)
800280c: 10029b26 beq r2,zero,800327c <_dtoa_r+0xb28>
8002810: d9002917 ldw r4,164(sp)
8002814: 00820074 movhi r2,2049
8002818: 10b7b744 addi r2,r2,-8483
800281c: 10ffffc4 addi r3,r2,-1
8002820: 20800015 stw r2,0(r4)
8002824: 1805883a mov r2,r3
8002828: dfc02517 ldw ra,148(sp)
800282c: df002417 ldw fp,144(sp)
8002830: ddc02317 ldw r23,140(sp)
8002834: dd802217 ldw r22,136(sp)
8002838: dd402117 ldw r21,132(sp)
800283c: dd002017 ldw r20,128(sp)
8002840: dcc01f17 ldw r19,124(sp)
8002844: dc801e17 ldw r18,120(sp)
8002848: dc401d17 ldw r17,116(sp)
800284c: dc001c17 ldw r16,112(sp)
8002850: dec02604 addi sp,sp,152
8002854: f800283a ret
8002858: d9001617 ldw r4,88(sp)
800285c: d9401217 ldw r5,72(sp)
8002860: d8800104 addi r2,sp,4
8002864: a80d883a mov r6,r21
8002868: d9c00204 addi r7,sp,8
800286c: d8800015 stw r2,0(sp)
8002870: 8005f580 call 8005f58 <__d2b>
8002874: d8800715 stw r2,28(sp)
8002878: a804d53a srli r2,r21,20
800287c: 1101ffcc andi r4,r2,2047
8002880: 20008626 beq r4,zero,8002a9c <_dtoa_r+0x348>
8002884: d8c01217 ldw r3,72(sp)
8002888: 00800434 movhi r2,16
800288c: 10bfffc4 addi r2,r2,-1
8002890: ddc00117 ldw r23,4(sp)
8002894: a884703a and r2,r21,r2
8002898: 1811883a mov r8,r3
800289c: 124ffc34 orhi r9,r2,16368
80028a0: 25bf0044 addi r22,r4,-1023
80028a4: d8000815 stw zero,32(sp)
80028a8: 0005883a mov r2,zero
80028ac: 00cffe34 movhi r3,16376
80028b0: 480b883a mov r5,r9
80028b4: 4009883a mov r4,r8
80028b8: 180f883a mov r7,r3
80028bc: 100d883a mov r6,r2
80028c0: 800887c0 call 800887c <__subdf3>
80028c4: 0218dbf4 movhi r8,25455
80028c8: 4210d844 addi r8,r8,17249
80028cc: 024ff4f4 movhi r9,16339
80028d0: 4a61e9c4 addi r9,r9,-30809
80028d4: 480f883a mov r7,r9
80028d8: 400d883a mov r6,r8
80028dc: 180b883a mov r5,r3
80028e0: 1009883a mov r4,r2
80028e4: 80089700 call 8008970 <__muldf3>
80028e8: 0222d874 movhi r8,35681
80028ec: 42322cc4 addi r8,r8,-14157
80028f0: 024ff1f4 movhi r9,16327
80028f4: 4a628a04 addi r9,r9,-30168
80028f8: 480f883a mov r7,r9
80028fc: 400d883a mov r6,r8
8002900: 180b883a mov r5,r3
8002904: 1009883a mov r4,r2
8002908: 80088fc0 call 80088fc <__adddf3>
800290c: b009883a mov r4,r22
8002910: 1021883a mov r16,r2
8002914: 1823883a mov r17,r3
8002918: 80092340 call 8009234 <__floatsidf>
800291c: 021427f4 movhi r8,20639
8002920: 421e7ec4 addi r8,r8,31227
8002924: 024ff4f4 movhi r9,16339
8002928: 4a5104c4 addi r9,r9,17427
800292c: 480f883a mov r7,r9
8002930: 400d883a mov r6,r8
8002934: 180b883a mov r5,r3
8002938: 1009883a mov r4,r2
800293c: 80089700 call 8008970 <__muldf3>
8002940: 180f883a mov r7,r3
8002944: 880b883a mov r5,r17
8002948: 100d883a mov r6,r2
800294c: 8009883a mov r4,r16
8002950: 80088fc0 call 80088fc <__adddf3>
8002954: 1009883a mov r4,r2
8002958: 180b883a mov r5,r3
800295c: 1021883a mov r16,r2
8002960: 1823883a mov r17,r3
8002964: 800932c0 call 800932c <__fixdfsi>
8002968: 000d883a mov r6,zero
800296c: 000f883a mov r7,zero
8002970: 8009883a mov r4,r16
8002974: 880b883a mov r5,r17
8002978: d8800d15 stw r2,52(sp)
800297c: 80091ac0 call 80091ac <__ltdf2>
8002980: 10031716 blt r2,zero,80035e0 <_dtoa_r+0xe8c>
8002984: d8c00d17 ldw r3,52(sp)
8002988: 00800584 movi r2,22
800298c: 10c1482e bgeu r2,r3,8002eb0 <_dtoa_r+0x75c>
8002990: 01000044 movi r4,1
8002994: d9000c15 stw r4,48(sp)
8002998: bd85c83a sub r2,r23,r22
800299c: 11bfffc4 addi r6,r2,-1
80029a0: 30030b16 blt r6,zero,80035d0 <_dtoa_r+0xe7c>
80029a4: d9800a15 stw r6,40(sp)
80029a8: d8001115 stw zero,68(sp)
80029ac: d8c00d17 ldw r3,52(sp)
80029b0: 1802ff16 blt r3,zero,80035b0 <_dtoa_r+0xe5c>
80029b4: d9000a17 ldw r4,40(sp)
80029b8: d8c00915 stw r3,36(sp)
80029bc: d8001015 stw zero,64(sp)
80029c0: 20c9883a add r4,r4,r3
80029c4: d9000a15 stw r4,40(sp)
80029c8: d9001717 ldw r4,92(sp)
80029cc: 00800244 movi r2,9
80029d0: 11004636 bltu r2,r4,8002aec <_dtoa_r+0x398>
80029d4: 00800144 movi r2,5
80029d8: 11020416 blt r2,r4,80031ec <_dtoa_r+0xa98>
80029dc: 04400044 movi r17,1
80029e0: d8c01717 ldw r3,92(sp)
80029e4: 00800144 movi r2,5
80029e8: 10c1ed36 bltu r2,r3,80031a0 <_dtoa_r+0xa4c>
80029ec: 18c5883a add r2,r3,r3
80029f0: 1085883a add r2,r2,r2
80029f4: 00c20034 movhi r3,2048
80029f8: 18ca8204 addi r3,r3,10760
80029fc: 10c5883a add r2,r2,r3
8002a00: 11000017 ldw r4,0(r2)
8002a04: 2000683a jmp r4
8002a08: 08002af4 orhi zero,at,171
8002a0c: 08002af4 orhi zero,at,171
8002a10: 080034f4 orhi zero,at,211
8002a14: 080034cc andi zero,at,211
8002a18: 08003510 cmplti zero,at,212
8002a1c: 0800351c xori zero,at,212
8002a20: d9002717 ldw r4,156(sp)
8002a24: 0089c3c4 movi r2,9999
8002a28: 20800015 stw r2,0(r4)
8002a2c: a0001026 beq r20,zero,8002a70 <_dtoa_r+0x31c>
8002a30: 00c20074 movhi r3,2049
8002a34: 18f7c304 addi r3,r3,-8436
8002a38: d9802917 ldw r6,164(sp)
8002a3c: 303f7926 beq r6,zero,8002824 <_dtoa_r+0xd0>
8002a40: 188000c7 ldb r2,3(r3)
8002a44: 190000c4 addi r4,r3,3
8002a48: 1000101e bne r2,zero,8002a8c <_dtoa_r+0x338>
8002a4c: d8802917 ldw r2,164(sp)
8002a50: 11000015 stw r4,0(r2)
8002a54: 003f7306 br 8002824 <_dtoa_r+0xd0>
8002a58: 00a00034 movhi r2,32768
8002a5c: 10bfffc4 addi r2,r2,-1
8002a60: 00c00044 movi r3,1
8002a64: 88aa703a and r21,r17,r2
8002a68: 90c00015 stw r3,0(r18)
8002a6c: 003f5806 br 80027d0 <_dtoa_r+0x7c>
8002a70: 00800434 movhi r2,16
8002a74: 10bfffc4 addi r2,r2,-1
8002a78: a884703a and r2,r21,r2
8002a7c: 103fec1e bne r2,zero,8002a30 <_dtoa_r+0x2dc>
8002a80: 00c20074 movhi r3,2049
8002a84: 18f7c004 addi r3,r3,-8448
8002a88: 003feb06 br 8002a38 <_dtoa_r+0x2e4>
8002a8c: d8802917 ldw r2,164(sp)
8002a90: 19000204 addi r4,r3,8
8002a94: 11000015 stw r4,0(r2)
8002a98: 003f6206 br 8002824 <_dtoa_r+0xd0>
8002a9c: ddc00117 ldw r23,4(sp)
8002aa0: d8800217 ldw r2,8(sp)
8002aa4: 01000804 movi r4,32
8002aa8: b8c10c84 addi r3,r23,1074
8002aac: 18a3883a add r17,r3,r2
8002ab0: 2441b80e bge r4,r17,8003194 <_dtoa_r+0xa40>
8002ab4: 00c01004 movi r3,64
8002ab8: 1c47c83a sub r3,r3,r17
8002abc: 88bff804 addi r2,r17,-32
8002ac0: a8c6983a sll r3,r21,r3
8002ac4: a084d83a srl r2,r20,r2
8002ac8: 1888b03a or r4,r3,r2
8002acc: 80094040 call 8009404 <__floatunsidf>
8002ad0: 1011883a mov r8,r2
8002ad4: 00bf8434 movhi r2,65040
8002ad8: 01000044 movi r4,1
8002adc: 10d3883a add r9,r2,r3
8002ae0: 8dbef344 addi r22,r17,-1075
8002ae4: d9000815 stw r4,32(sp)
8002ae8: 003f6f06 br 80028a8 <_dtoa_r+0x154>
8002aec: d8001715 stw zero,92(sp)
8002af0: 04400044 movi r17,1
8002af4: 00bfffc4 movi r2,-1
8002af8: 00c00044 movi r3,1
8002afc: d8800e15 stw r2,56(sp)
8002b00: d8002615 stw zero,152(sp)
8002b04: d8800f15 stw r2,60(sp)
8002b08: d8c00b15 stw r3,44(sp)
8002b0c: 1021883a mov r16,r2
8002b10: d8801617 ldw r2,88(sp)
8002b14: 10001115 stw zero,68(r2)
8002b18: d8801617 ldw r2,88(sp)
8002b1c: 11401117 ldw r5,68(r2)
8002b20: 1009883a mov r4,r2
8002b24: 8005e9c0 call 8005e9c <_Balloc>
8002b28: d8c01617 ldw r3,88(sp)
8002b2c: d8800515 stw r2,20(sp)
8002b30: 18801015 stw r2,64(r3)
8002b34: 00800384 movi r2,14
8002b38: 14006836 bltu r2,r16,8002cdc <_dtoa_r+0x588>
8002b3c: 8805003a cmpeq r2,r17,zero
8002b40: 1000661e bne r2,zero,8002cdc <_dtoa_r+0x588>
8002b44: d9000d17 ldw r4,52(sp)
8002b48: 0102300e bge zero,r4,800340c <_dtoa_r+0xcb8>
8002b4c: 208003cc andi r2,r4,15
8002b50: 100490fa slli r2,r2,3
8002b54: 2025d13a srai r18,r4,4
8002b58: 00c20074 movhi r3,2049
8002b5c: 18f7d504 addi r3,r3,-8364
8002b60: 10c5883a add r2,r2,r3
8002b64: 90c0040c andi r3,r18,16
8002b68: 14000017 ldw r16,0(r2)
8002b6c: 14400117 ldw r17,4(r2)
8002b70: 18036a1e bne r3,zero,800391c <_dtoa_r+0x11c8>
8002b74: 05800084 movi r22,2
8002b78: 90001026 beq r18,zero,8002bbc <_dtoa_r+0x468>
8002b7c: 04c20074 movhi r19,2049
8002b80: 9cf80704 addi r19,r19,-8164
8002b84: 9080004c andi r2,r18,1
8002b88: 1005003a cmpeq r2,r2,zero
8002b8c: 1000081e bne r2,zero,8002bb0 <_dtoa_r+0x45c>
8002b90: 99800017 ldw r6,0(r19)
8002b94: 99c00117 ldw r7,4(r19)
8002b98: 880b883a mov r5,r17
8002b9c: 8009883a mov r4,r16
8002ba0: 80089700 call 8008970 <__muldf3>
8002ba4: 1021883a mov r16,r2
8002ba8: b5800044 addi r22,r22,1
8002bac: 1823883a mov r17,r3
8002bb0: 9025d07a srai r18,r18,1
8002bb4: 9cc00204 addi r19,r19,8
8002bb8: 903ff21e bne r18,zero,8002b84 <_dtoa_r+0x430>
8002bbc: a80b883a mov r5,r21
8002bc0: a009883a mov r4,r20
8002bc4: 880f883a mov r7,r17
8002bc8: 800d883a mov r6,r16
8002bcc: 8008d340 call 8008d34 <__divdf3>
8002bd0: 1029883a mov r20,r2
8002bd4: 182b883a mov r21,r3
8002bd8: d8c00c17 ldw r3,48(sp)
8002bdc: 1805003a cmpeq r2,r3,zero
8002be0: 1000081e bne r2,zero,8002c04 <_dtoa_r+0x4b0>
8002be4: 0005883a mov r2,zero
8002be8: 00cffc34 movhi r3,16368
8002bec: 180f883a mov r7,r3
8002bf0: a009883a mov r4,r20
8002bf4: a80b883a mov r5,r21
8002bf8: 100d883a mov r6,r2
8002bfc: 80091ac0 call 80091ac <__ltdf2>
8002c00: 1003fe16 blt r2,zero,8003bfc <_dtoa_r+0x14a8>
8002c04: b009883a mov r4,r22
8002c08: 80092340 call 8009234 <__floatsidf>
8002c0c: 180b883a mov r5,r3
8002c10: 1009883a mov r4,r2
8002c14: a00d883a mov r6,r20
8002c18: a80f883a mov r7,r21
8002c1c: 80089700 call 8008970 <__muldf3>
8002c20: 0011883a mov r8,zero
8002c24: 02500734 movhi r9,16412
8002c28: 1009883a mov r4,r2
8002c2c: 180b883a mov r5,r3
8002c30: 480f883a mov r7,r9
8002c34: 400d883a mov r6,r8
8002c38: 80088fc0 call 80088fc <__adddf3>
8002c3c: d9000f17 ldw r4,60(sp)
8002c40: 102d883a mov r22,r2
8002c44: 00bf3034 movhi r2,64704
8002c48: 18b9883a add fp,r3,r2
8002c4c: e02f883a mov r23,fp
8002c50: 20028f1e bne r4,zero,8003690 <_dtoa_r+0xf3c>
8002c54: 0005883a mov r2,zero
8002c58: 00d00534 movhi r3,16404
8002c5c: a009883a mov r4,r20
8002c60: a80b883a mov r5,r21
8002c64: 180f883a mov r7,r3
8002c68: 100d883a mov r6,r2
8002c6c: 800887c0 call 800887c <__subdf3>
8002c70: 1009883a mov r4,r2
8002c74: e00f883a mov r7,fp
8002c78: 180b883a mov r5,r3
8002c7c: b00d883a mov r6,r22
8002c80: 1025883a mov r18,r2
8002c84: 1827883a mov r19,r3
8002c88: 800909c0 call 800909c <__gtdf2>
8002c8c: 00834f16 blt zero,r2,80039cc <_dtoa_r+0x1278>
8002c90: e0e0003c xorhi r3,fp,32768
8002c94: 9009883a mov r4,r18
8002c98: 980b883a mov r5,r19
8002c9c: 180f883a mov r7,r3
8002ca0: b00d883a mov r6,r22
8002ca4: 80091ac0 call 80091ac <__ltdf2>
8002ca8: 1000080e bge r2,zero,8002ccc <_dtoa_r+0x578>
8002cac: 0027883a mov r19,zero
8002cb0: 0025883a mov r18,zero
8002cb4: d8802617 ldw r2,152(sp)
8002cb8: df000517 ldw fp,20(sp)
8002cbc: d8000615 stw zero,24(sp)
8002cc0: 0084303a nor r2,zero,r2
8002cc4: d8800d15 stw r2,52(sp)
8002cc8: 00019b06 br 8003338 <_dtoa_r+0xbe4>
8002ccc: d9801217 ldw r6,72(sp)
8002cd0: d8801317 ldw r2,76(sp)
8002cd4: 3029883a mov r20,r6
8002cd8: 102b883a mov r21,r2
8002cdc: d8c00217 ldw r3,8(sp)
8002ce0: 18008516 blt r3,zero,8002ef8 <_dtoa_r+0x7a4>
8002ce4: d9000d17 ldw r4,52(sp)
8002ce8: 00800384 movi r2,14
8002cec: 11008216 blt r2,r4,8002ef8 <_dtoa_r+0x7a4>
8002cf0: 200490fa slli r2,r4,3
8002cf4: d9802617 ldw r6,152(sp)
8002cf8: 00c20074 movhi r3,2049
8002cfc: 18f7d504 addi r3,r3,-8364
8002d00: 10c5883a add r2,r2,r3
8002d04: 14800017 ldw r18,0(r2)
8002d08: 14c00117 ldw r19,4(r2)
8002d0c: 30031e16 blt r6,zero,8003988 <_dtoa_r+0x1234>
8002d10: d9000517 ldw r4,20(sp)
8002d14: d8c00f17 ldw r3,60(sp)
8002d18: a823883a mov r17,r21
8002d1c: a021883a mov r16,r20
8002d20: 192b883a add r21,r3,r4
8002d24: 2039883a mov fp,r4
8002d28: 00000f06 br 8002d68 <_dtoa_r+0x614>
8002d2c: 0005883a mov r2,zero
8002d30: 00d00934 movhi r3,16420
8002d34: 5009883a mov r4,r10
8002d38: 580b883a mov r5,r11
8002d3c: 180f883a mov r7,r3
8002d40: 100d883a mov r6,r2
8002d44: 80089700 call 8008970 <__muldf3>
8002d48: 180b883a mov r5,r3
8002d4c: 000d883a mov r6,zero
8002d50: 000f883a mov r7,zero
8002d54: 1009883a mov r4,r2
8002d58: 1021883a mov r16,r2
8002d5c: 1823883a mov r17,r3
8002d60: 80090140 call 8009014 <__nedf2>
8002d64: 10004526 beq r2,zero,8002e7c <_dtoa_r+0x728>
8002d68: 900d883a mov r6,r18
8002d6c: 980f883a mov r7,r19
8002d70: 8009883a mov r4,r16
8002d74: 880b883a mov r5,r17
8002d78: 8008d340 call 8008d34 <__divdf3>
8002d7c: 180b883a mov r5,r3
8002d80: 1009883a mov r4,r2
8002d84: 800932c0 call 800932c <__fixdfsi>
8002d88: 1009883a mov r4,r2
8002d8c: 1029883a mov r20,r2
8002d90: 80092340 call 8009234 <__floatsidf>
8002d94: 180f883a mov r7,r3
8002d98: 9009883a mov r4,r18
8002d9c: 980b883a mov r5,r19
8002da0: 100d883a mov r6,r2
8002da4: 80089700 call 8008970 <__muldf3>
8002da8: 180f883a mov r7,r3
8002dac: 880b883a mov r5,r17
8002db0: 8009883a mov r4,r16
8002db4: 100d883a mov r6,r2
8002db8: 800887c0 call 800887c <__subdf3>
8002dbc: 1015883a mov r10,r2
8002dc0: a0800c04 addi r2,r20,48
8002dc4: e0800005 stb r2,0(fp)
8002dc8: e7000044 addi fp,fp,1
8002dcc: 1817883a mov r11,r3
8002dd0: e57fd61e bne fp,r21,8002d2c <_dtoa_r+0x5d8>
8002dd4: 500d883a mov r6,r10
8002dd8: 180f883a mov r7,r3
8002ddc: 5009883a mov r4,r10
8002de0: 180b883a mov r5,r3
8002de4: 80088fc0 call 80088fc <__adddf3>
8002de8: 100d883a mov r6,r2
8002dec: 9009883a mov r4,r18
8002df0: 980b883a mov r5,r19
8002df4: 180f883a mov r7,r3
8002df8: 1021883a mov r16,r2
8002dfc: 1823883a mov r17,r3
8002e00: 80091ac0 call 80091ac <__ltdf2>
8002e04: 10000816 blt r2,zero,8002e28 <_dtoa_r+0x6d4>
8002e08: 980b883a mov r5,r19
8002e0c: 800d883a mov r6,r16
8002e10: 880f883a mov r7,r17
8002e14: 9009883a mov r4,r18
8002e18: 8008f8c0 call 8008f8c <__eqdf2>
8002e1c: 1000171e bne r2,zero,8002e7c <_dtoa_r+0x728>
8002e20: a080004c andi r2,r20,1
8002e24: 10001526 beq r2,zero,8002e7c <_dtoa_r+0x728>
8002e28: d8800d17 ldw r2,52(sp)
8002e2c: d8800415 stw r2,16(sp)
8002e30: e009883a mov r4,fp
8002e34: 213fffc4 addi r4,r4,-1
8002e38: 20c00007 ldb r3,0(r4)
8002e3c: 00800e44 movi r2,57
8002e40: 1880081e bne r3,r2,8002e64 <_dtoa_r+0x710>
8002e44: d8800517 ldw r2,20(sp)
8002e48: 113ffa1e bne r2,r4,8002e34 <_dtoa_r+0x6e0>
8002e4c: d8c00417 ldw r3,16(sp)
8002e50: d9800517 ldw r6,20(sp)
8002e54: 00800c04 movi r2,48
8002e58: 18c00044 addi r3,r3,1
8002e5c: d8c00415 stw r3,16(sp)
8002e60: 30800005 stb r2,0(r6)
8002e64: 20800003 ldbu r2,0(r4)
8002e68: d8c00417 ldw r3,16(sp)
8002e6c: 27000044 addi fp,r4,1
8002e70: 10800044 addi r2,r2,1
8002e74: d8c00d15 stw r3,52(sp)
8002e78: 20800005 stb r2,0(r4)
8002e7c: d9001617 ldw r4,88(sp)
8002e80: d9400717 ldw r5,28(sp)
8002e84: 800591c0 call 800591c <_Bfree>
8002e88: e0000005 stb zero,0(fp)
8002e8c: d9800d17 ldw r6,52(sp)
8002e90: d8c02717 ldw r3,156(sp)
8002e94: d9002917 ldw r4,164(sp)
8002e98: 30800044 addi r2,r6,1
8002e9c: 18800015 stw r2,0(r3)
8002ea0: 20029c26 beq r4,zero,8003914 <_dtoa_r+0x11c0>
8002ea4: d8c00517 ldw r3,20(sp)
8002ea8: 27000015 stw fp,0(r4)
8002eac: 003e5d06 br 8002824 <_dtoa_r+0xd0>
8002eb0: d9800d17 ldw r6,52(sp)
8002eb4: 00c20074 movhi r3,2049
8002eb8: 18f7d504 addi r3,r3,-8364
8002ebc: d9001217 ldw r4,72(sp)
8002ec0: 300490fa slli r2,r6,3
8002ec4: d9401317 ldw r5,76(sp)
8002ec8: 10c5883a add r2,r2,r3
8002ecc: 12000017 ldw r8,0(r2)
8002ed0: 12400117 ldw r9,4(r2)
8002ed4: 400d883a mov r6,r8
8002ed8: 480f883a mov r7,r9
8002edc: 80091ac0 call 80091ac <__ltdf2>
8002ee0: 1000030e bge r2,zero,8002ef0 <_dtoa_r+0x79c>
8002ee4: d8800d17 ldw r2,52(sp)
8002ee8: 10bfffc4 addi r2,r2,-1
8002eec: d8800d15 stw r2,52(sp)
8002ef0: d8000c15 stw zero,48(sp)
8002ef4: 003ea806 br 8002998 <_dtoa_r+0x244>
8002ef8: d9000b17 ldw r4,44(sp)
8002efc: 202cc03a cmpne r22,r4,zero
8002f00: b000c71e bne r22,zero,8003220 <_dtoa_r+0xacc>
8002f04: dc001117 ldw r16,68(sp)
8002f08: dc801017 ldw r18,64(sp)
8002f0c: 0027883a mov r19,zero
8002f10: 04000b0e bge zero,r16,8002f40 <_dtoa_r+0x7ec>
8002f14: d8c00a17 ldw r3,40(sp)
8002f18: 00c0090e bge zero,r3,8002f40 <_dtoa_r+0x7ec>
8002f1c: 8005883a mov r2,r16
8002f20: 1c011316 blt r3,r16,8003370 <_dtoa_r+0xc1c>
8002f24: d9000a17 ldw r4,40(sp)
8002f28: d9801117 ldw r6,68(sp)
8002f2c: 80a1c83a sub r16,r16,r2
8002f30: 2089c83a sub r4,r4,r2
8002f34: 308dc83a sub r6,r6,r2
8002f38: d9000a15 stw r4,40(sp)
8002f3c: d9801115 stw r6,68(sp)
8002f40: d8801017 ldw r2,64(sp)
8002f44: 0080150e bge zero,r2,8002f9c <_dtoa_r+0x848>
8002f48: d8c00b17 ldw r3,44(sp)
8002f4c: 1805003a cmpeq r2,r3,zero
8002f50: 1001c91e bne r2,zero,8003678 <_dtoa_r+0xf24>
8002f54: 04800e0e bge zero,r18,8002f90 <_dtoa_r+0x83c>
8002f58: d9001617 ldw r4,88(sp)
8002f5c: 980b883a mov r5,r19
8002f60: 900d883a mov r6,r18
8002f64: 80067680 call 8006768 <__pow5mult>
8002f68: d9001617 ldw r4,88(sp)
8002f6c: d9800717 ldw r6,28(sp)
8002f70: 100b883a mov r5,r2
8002f74: 1027883a mov r19,r2
8002f78: 80063ac0 call 80063ac <__multiply>
8002f7c: d9001617 ldw r4,88(sp)
8002f80: d9400717 ldw r5,28(sp)
8002f84: 1023883a mov r17,r2
8002f88: 800591c0 call 800591c <_Bfree>
8002f8c: dc400715 stw r17,28(sp)
8002f90: d9001017 ldw r4,64(sp)
8002f94: 248dc83a sub r6,r4,r18
8002f98: 30010e1e bne r6,zero,80033d4 <_dtoa_r+0xc80>
8002f9c: d9001617 ldw r4,88(sp)
8002fa0: 04400044 movi r17,1
8002fa4: 880b883a mov r5,r17
8002fa8: 80066000 call 8006600 <__i2b>
8002fac: d9800917 ldw r6,36(sp)
8002fb0: 1025883a mov r18,r2
8002fb4: 0180040e bge zero,r6,8002fc8 <_dtoa_r+0x874>
8002fb8: d9001617 ldw r4,88(sp)
8002fbc: 100b883a mov r5,r2
8002fc0: 80067680 call 8006768 <__pow5mult>
8002fc4: 1025883a mov r18,r2
8002fc8: d8801717 ldw r2,92(sp)
8002fcc: 8880f30e bge r17,r2,800339c <_dtoa_r+0xc48>
8002fd0: 0023883a mov r17,zero
8002fd4: d9800917 ldw r6,36(sp)
8002fd8: 30019e1e bne r6,zero,8003654 <_dtoa_r+0xf00>
8002fdc: 00c00044 movi r3,1
8002fe0: d9000a17 ldw r4,40(sp)
8002fe4: 20c5883a add r2,r4,r3
8002fe8: 10c007cc andi r3,r2,31
8002fec: 1800841e bne r3,zero,8003200 <_dtoa_r+0xaac>
8002ff0: 00800704 movi r2,28
8002ff4: d9000a17 ldw r4,40(sp)
8002ff8: d9801117 ldw r6,68(sp)
8002ffc: 80a1883a add r16,r16,r2
8003000: 2089883a add r4,r4,r2
8003004: 308d883a add r6,r6,r2
8003008: d9000a15 stw r4,40(sp)
800300c: d9801115 stw r6,68(sp)
8003010: d8801117 ldw r2,68(sp)
8003014: 0080050e bge zero,r2,800302c <_dtoa_r+0x8d8>
8003018: d9400717 ldw r5,28(sp)
800301c: d9001617 ldw r4,88(sp)
8003020: 100d883a mov r6,r2
8003024: 80062600 call 8006260 <__lshift>
8003028: d8800715 stw r2,28(sp)
800302c: d8c00a17 ldw r3,40(sp)
8003030: 00c0050e bge zero,r3,8003048 <_dtoa_r+0x8f4>
8003034: d9001617 ldw r4,88(sp)
8003038: 900b883a mov r5,r18
800303c: 180d883a mov r6,r3
8003040: 80062600 call 8006260 <__lshift>
8003044: 1025883a mov r18,r2
8003048: d9000c17 ldw r4,48(sp)
800304c: 2005003a cmpeq r2,r4,zero
8003050: 10016f26 beq r2,zero,8003610 <_dtoa_r+0xebc>
8003054: d9000f17 ldw r4,60(sp)
8003058: 0102170e bge zero,r4,80038b8 <_dtoa_r+0x1164>
800305c: d9800b17 ldw r6,44(sp)
8003060: 3005003a cmpeq r2,r6,zero
8003064: 1000881e bne r2,zero,8003288 <_dtoa_r+0xb34>
8003068: 0400050e bge zero,r16,8003080 <_dtoa_r+0x92c>
800306c: d9001617 ldw r4,88(sp)
8003070: 980b883a mov r5,r19
8003074: 800d883a mov r6,r16
8003078: 80062600 call 8006260 <__lshift>
800307c: 1027883a mov r19,r2
8003080: 8804c03a cmpne r2,r17,zero
8003084: 1002541e bne r2,zero,80039d8 <_dtoa_r+0x1284>
8003088: 980b883a mov r5,r19
800308c: dd800517 ldw r22,20(sp)
8003090: dcc00615 stw r19,24(sp)
8003094: a700004c andi fp,r20,1
8003098: 2827883a mov r19,r5
800309c: d9000717 ldw r4,28(sp)
80030a0: 900b883a mov r5,r18
80030a4: 80025100 call 8002510 <quorem>
80030a8: d9000717 ldw r4,28(sp)
80030ac: d9400617 ldw r5,24(sp)
80030b0: 1023883a mov r17,r2
80030b4: 8dc00c04 addi r23,r17,48
80030b8: 8005a780 call 8005a78 <__mcmp>
80030bc: d9001617 ldw r4,88(sp)
80030c0: 900b883a mov r5,r18
80030c4: 980d883a mov r6,r19
80030c8: 1029883a mov r20,r2
80030cc: 80060d40 call 80060d4 <__mdiff>
80030d0: 102b883a mov r21,r2
80030d4: 10800317 ldw r2,12(r2)
80030d8: 1001281e bne r2,zero,800357c <_dtoa_r+0xe28>
80030dc: d9000717 ldw r4,28(sp)
80030e0: a80b883a mov r5,r21
80030e4: 8005a780 call 8005a78 <__mcmp>
80030e8: d9001617 ldw r4,88(sp)
80030ec: 1021883a mov r16,r2
80030f0: a80b883a mov r5,r21
80030f4: 800591c0 call 800591c <_Bfree>
80030f8: 8000041e bne r16,zero,800310c <_dtoa_r+0x9b8>
80030fc: d8801717 ldw r2,92(sp)
8003100: 1000021e bne r2,zero,800310c <_dtoa_r+0x9b8>
8003104: e004c03a cmpne r2,fp,zero
8003108: 10011726 beq r2,zero,8003568 <_dtoa_r+0xe14>
800310c: a0010616 blt r20,zero,8003528 <_dtoa_r+0xdd4>
8003110: a000041e bne r20,zero,8003124 <_dtoa_r+0x9d0>
8003114: d8c01717 ldw r3,92(sp)
8003118: 1800021e bne r3,zero,8003124 <_dtoa_r+0x9d0>
800311c: e004c03a cmpne r2,fp,zero
8003120: 10010126 beq r2,zero,8003528 <_dtoa_r+0xdd4>
8003124: 04023d16 blt zero,r16,8003a1c <_dtoa_r+0x12c8>
8003128: b5c00005 stb r23,0(r22)
800312c: d9800517 ldw r6,20(sp)
8003130: d9000f17 ldw r4,60(sp)
8003134: b5800044 addi r22,r22,1
8003138: 3105883a add r2,r6,r4
800313c: b0806526 beq r22,r2,80032d4 <_dtoa_r+0xb80>
8003140: d9400717 ldw r5,28(sp)
8003144: d9001617 ldw r4,88(sp)
8003148: 01800284 movi r6,10
800314c: 000f883a mov r7,zero
8003150: 800663c0 call 800663c <__multadd>
8003154: d8800715 stw r2,28(sp)
8003158: d8800617 ldw r2,24(sp)
800315c: 14c10c26 beq r2,r19,8003590 <_dtoa_r+0xe3c>
8003160: d9400617 ldw r5,24(sp)
8003164: d9001617 ldw r4,88(sp)
8003168: 01800284 movi r6,10
800316c: 000f883a mov r7,zero
8003170: 800663c0 call 800663c <__multadd>
8003174: d9001617 ldw r4,88(sp)
8003178: 980b883a mov r5,r19
800317c: 01800284 movi r6,10
8003180: 000f883a mov r7,zero
8003184: d8800615 stw r2,24(sp)
8003188: 800663c0 call 800663c <__multadd>
800318c: 1027883a mov r19,r2
8003190: 003fc206 br 800309c <_dtoa_r+0x948>
8003194: 2445c83a sub r2,r4,r17
8003198: a088983a sll r4,r20,r2
800319c: 003e4b06 br 8002acc <_dtoa_r+0x378>
80031a0: 01bfffc4 movi r6,-1
80031a4: 00800044 movi r2,1
80031a8: d9800e15 stw r6,56(sp)
80031ac: d9800f15 stw r6,60(sp)
80031b0: d8800b15 stw r2,44(sp)
80031b4: d8c01617 ldw r3,88(sp)
80031b8: 008005c4 movi r2,23
80031bc: 18001115 stw zero,68(r3)
80031c0: 1580082e bgeu r2,r22,80031e4 <_dtoa_r+0xa90>
80031c4: 00c00104 movi r3,4
80031c8: 0009883a mov r4,zero
80031cc: 18c7883a add r3,r3,r3
80031d0: 18800504 addi r2,r3,20
80031d4: 21000044 addi r4,r4,1
80031d8: b0bffc2e bgeu r22,r2,80031cc <_dtoa_r+0xa78>
80031dc: d9801617 ldw r6,88(sp)
80031e0: 31001115 stw r4,68(r6)
80031e4: dc000f17 ldw r16,60(sp)
80031e8: 003e4b06 br 8002b18 <_dtoa_r+0x3c4>
80031ec: d9801717 ldw r6,92(sp)
80031f0: 0023883a mov r17,zero
80031f4: 31bfff04 addi r6,r6,-4
80031f8: d9801715 stw r6,92(sp)
80031fc: 003df806 br 80029e0 <_dtoa_r+0x28c>
8003200: 00800804 movi r2,32
8003204: 10c9c83a sub r4,r2,r3
8003208: 00c00104 movi r3,4
800320c: 19005a16 blt r3,r4,8003378 <_dtoa_r+0xc24>
8003210: 008000c4 movi r2,3
8003214: 113f7e16 blt r2,r4,8003010 <_dtoa_r+0x8bc>
8003218: 20800704 addi r2,r4,28
800321c: 003f7506 br 8002ff4 <_dtoa_r+0x8a0>
8003220: d9801717 ldw r6,92(sp)
8003224: 00800044 movi r2,1
8003228: 1180a10e bge r2,r6,80034b0 <_dtoa_r+0xd5c>
800322c: d9800f17 ldw r6,60(sp)
8003230: d8c01017 ldw r3,64(sp)
8003234: 30bfffc4 addi r2,r6,-1
8003238: 1881c616 blt r3,r2,8003954 <_dtoa_r+0x1200>
800323c: 18a5c83a sub r18,r3,r2
8003240: d8800f17 ldw r2,60(sp)
8003244: 10026216 blt r2,zero,8003bd0 <_dtoa_r+0x147c>
8003248: dc001117 ldw r16,68(sp)
800324c: 1007883a mov r3,r2
8003250: d9800a17 ldw r6,40(sp)
8003254: d8801117 ldw r2,68(sp)
8003258: d9001617 ldw r4,88(sp)
800325c: 30cd883a add r6,r6,r3
8003260: 10c5883a add r2,r2,r3
8003264: 01400044 movi r5,1
8003268: d9800a15 stw r6,40(sp)
800326c: d8801115 stw r2,68(sp)
8003270: 80066000 call 8006600 <__i2b>
8003274: 1027883a mov r19,r2
8003278: 003f2506 br 8002f10 <_dtoa_r+0x7bc>
800327c: 00c20074 movhi r3,2049
8003280: 18f7b704 addi r3,r3,-8484
8003284: 003d6706 br 8002824 <_dtoa_r+0xd0>
8003288: dd800517 ldw r22,20(sp)
800328c: 04000044 movi r16,1
8003290: 00000706 br 80032b0 <_dtoa_r+0xb5c>
8003294: d9400717 ldw r5,28(sp)
8003298: d9001617 ldw r4,88(sp)
800329c: 01800284 movi r6,10
80032a0: 000f883a mov r7,zero
80032a4: 800663c0 call 800663c <__multadd>
80032a8: d8800715 stw r2,28(sp)
80032ac: 84000044 addi r16,r16,1
80032b0: d9000717 ldw r4,28(sp)
80032b4: 900b883a mov r5,r18
80032b8: 80025100 call 8002510 <quorem>
80032bc: 15c00c04 addi r23,r2,48
80032c0: b5c00005 stb r23,0(r22)
80032c4: d8c00f17 ldw r3,60(sp)
80032c8: b5800044 addi r22,r22,1
80032cc: 80fff116 blt r16,r3,8003294 <_dtoa_r+0xb40>
80032d0: d8000615 stw zero,24(sp)
80032d4: d9400717 ldw r5,28(sp)
80032d8: d9001617 ldw r4,88(sp)
80032dc: 01800044 movi r6,1
80032e0: 80062600 call 8006260 <__lshift>
80032e4: 1009883a mov r4,r2
80032e8: 900b883a mov r5,r18
80032ec: d8800715 stw r2,28(sp)
80032f0: 8005a780 call 8005a78 <__mcmp>
80032f4: 00803c0e bge zero,r2,80033e8 <_dtoa_r+0xc94>
80032f8: b009883a mov r4,r22
80032fc: 213fffc4 addi r4,r4,-1
8003300: 21400003 ldbu r5,0(r4)
8003304: 00800e44 movi r2,57
8003308: 28c03fcc andi r3,r5,255
800330c: 18c0201c xori r3,r3,128
8003310: 18ffe004 addi r3,r3,-128
8003314: 1881981e bne r3,r2,8003978 <_dtoa_r+0x1224>
8003318: d9800517 ldw r6,20(sp)
800331c: 21bff71e bne r4,r6,80032fc <_dtoa_r+0xba8>
8003320: d8800d17 ldw r2,52(sp)
8003324: 37000044 addi fp,r6,1
8003328: 10800044 addi r2,r2,1
800332c: d8800d15 stw r2,52(sp)
8003330: 00800c44 movi r2,49
8003334: 30800005 stb r2,0(r6)
8003338: d9001617 ldw r4,88(sp)
800333c: 900b883a mov r5,r18
8003340: 800591c0 call 800591c <_Bfree>
8003344: 983ecd26 beq r19,zero,8002e7c <_dtoa_r+0x728>
8003348: d8c00617 ldw r3,24(sp)
800334c: 18000426 beq r3,zero,8003360 <_dtoa_r+0xc0c>
8003350: 1cc00326 beq r3,r19,8003360 <_dtoa_r+0xc0c>
8003354: d9001617 ldw r4,88(sp)
8003358: 180b883a mov r5,r3
800335c: 800591c0 call 800591c <_Bfree>
8003360: d9001617 ldw r4,88(sp)
8003364: 980b883a mov r5,r19
8003368: 800591c0 call 800591c <_Bfree>
800336c: 003ec306 br 8002e7c <_dtoa_r+0x728>
8003370: 1805883a mov r2,r3
8003374: 003eeb06 br 8002f24 <_dtoa_r+0x7d0>
8003378: d9800a17 ldw r6,40(sp)
800337c: d8c01117 ldw r3,68(sp)
8003380: 20bfff04 addi r2,r4,-4
8003384: 308d883a add r6,r6,r2
8003388: 1887883a add r3,r3,r2
800338c: 80a1883a add r16,r16,r2
8003390: d9800a15 stw r6,40(sp)
8003394: d8c01115 stw r3,68(sp)
8003398: 003f1d06 br 8003010 <_dtoa_r+0x8bc>
800339c: a03f0c1e bne r20,zero,8002fd0 <_dtoa_r+0x87c>
80033a0: 00800434 movhi r2,16
80033a4: 10bfffc4 addi r2,r2,-1
80033a8: a884703a and r2,r21,r2
80033ac: 103f081e bne r2,zero,8002fd0 <_dtoa_r+0x87c>
80033b0: a89ffc2c andhi r2,r21,32752
80033b4: 103f0626 beq r2,zero,8002fd0 <_dtoa_r+0x87c>
80033b8: d8c01117 ldw r3,68(sp)
80033bc: d9000a17 ldw r4,40(sp)
80033c0: 18c00044 addi r3,r3,1
80033c4: 21000044 addi r4,r4,1
80033c8: d8c01115 stw r3,68(sp)
80033cc: d9000a15 stw r4,40(sp)
80033d0: 003f0006 br 8002fd4 <_dtoa_r+0x880>
80033d4: d9400717 ldw r5,28(sp)
80033d8: d9001617 ldw r4,88(sp)
80033dc: 80067680 call 8006768 <__pow5mult>
80033e0: d8800715 stw r2,28(sp)
80033e4: 003eed06 br 8002f9c <_dtoa_r+0x848>
80033e8: 1000021e bne r2,zero,80033f4 <_dtoa_r+0xca0>
80033ec: b880004c andi r2,r23,1
80033f0: 103fc11e bne r2,zero,80032f8 <_dtoa_r+0xba4>
80033f4: b5bfffc4 addi r22,r22,-1
80033f8: b0c00007 ldb r3,0(r22)
80033fc: 00800c04 movi r2,48
8003400: 18bffc26 beq r3,r2,80033f4 <_dtoa_r+0xca0>
8003404: b7000044 addi fp,r22,1
8003408: 003fcb06 br 8003338 <_dtoa_r+0xbe4>
800340c: d9800d17 ldw r6,52(sp)
8003410: 018fc83a sub r7,zero,r6
8003414: 3801f726 beq r7,zero,8003bf4 <_dtoa_r+0x14a0>
8003418: 398003cc andi r6,r7,15
800341c: 300c90fa slli r6,r6,3
8003420: 01420074 movhi r5,2049
8003424: 2977d504 addi r5,r5,-8364
8003428: d9001217 ldw r4,72(sp)
800342c: 314d883a add r6,r6,r5
8003430: 30c00117 ldw r3,4(r6)
8003434: 30800017 ldw r2,0(r6)
8003438: d9401317 ldw r5,76(sp)
800343c: 3821d13a srai r16,r7,4
8003440: 100d883a mov r6,r2
8003444: 180f883a mov r7,r3
8003448: 80089700 call 8008970 <__muldf3>
800344c: 1011883a mov r8,r2
8003450: 1813883a mov r9,r3
8003454: 1029883a mov r20,r2
8003458: 182b883a mov r21,r3
800345c: 8001e526 beq r16,zero,8003bf4 <_dtoa_r+0x14a0>
8003460: 05800084 movi r22,2
8003464: 04420074 movhi r17,2049
8003468: 8c780704 addi r17,r17,-8164
800346c: 8080004c andi r2,r16,1
8003470: 1005003a cmpeq r2,r2,zero
8003474: 1000081e bne r2,zero,8003498 <_dtoa_r+0xd44>
8003478: 89800017 ldw r6,0(r17)
800347c: 89c00117 ldw r7,4(r17)
8003480: 480b883a mov r5,r9
8003484: 4009883a mov r4,r8
8003488: 80089700 call 8008970 <__muldf3>
800348c: 1011883a mov r8,r2
8003490: b5800044 addi r22,r22,1
8003494: 1813883a mov r9,r3
8003498: 8021d07a srai r16,r16,1
800349c: 8c400204 addi r17,r17,8
80034a0: 803ff21e bne r16,zero,800346c <_dtoa_r+0xd18>
80034a4: 4029883a mov r20,r8
80034a8: 482b883a mov r21,r9
80034ac: 003dca06 br 8002bd8 <_dtoa_r+0x484>
80034b0: d9000817 ldw r4,32(sp)
80034b4: 2005003a cmpeq r2,r4,zero
80034b8: 1001f61e bne r2,zero,8003c94 <_dtoa_r+0x1540>
80034bc: dc001117 ldw r16,68(sp)
80034c0: dc801017 ldw r18,64(sp)
80034c4: 18c10cc4 addi r3,r3,1075
80034c8: 003f6106 br 8003250 <_dtoa_r+0xafc>
80034cc: d8000b15 stw zero,44(sp)
80034d0: d9802617 ldw r6,152(sp)
80034d4: d8c00d17 ldw r3,52(sp)
80034d8: 30800044 addi r2,r6,1
80034dc: 18ad883a add r22,r3,r2
80034e0: b13fffc4 addi r4,r22,-1
80034e4: d9000e15 stw r4,56(sp)
80034e8: 0581f60e bge zero,r22,8003cc4 <_dtoa_r+0x1570>
80034ec: dd800f15 stw r22,60(sp)
80034f0: 003f3006 br 80031b4 <_dtoa_r+0xa60>
80034f4: d8000b15 stw zero,44(sp)
80034f8: d9002617 ldw r4,152(sp)
80034fc: 0101eb0e bge zero,r4,8003cac <_dtoa_r+0x1558>
8003500: 202d883a mov r22,r4
8003504: d9000e15 stw r4,56(sp)
8003508: d9000f15 stw r4,60(sp)
800350c: 003f2906 br 80031b4 <_dtoa_r+0xa60>
8003510: 01800044 movi r6,1
8003514: d9800b15 stw r6,44(sp)
8003518: 003ff706 br 80034f8 <_dtoa_r+0xda4>
800351c: 01000044 movi r4,1
8003520: d9000b15 stw r4,44(sp)
8003524: 003fea06 br 80034d0 <_dtoa_r+0xd7c>
8003528: 04000c0e bge zero,r16,800355c <_dtoa_r+0xe08>
800352c: d9400717 ldw r5,28(sp)
8003530: d9001617 ldw r4,88(sp)
8003534: 01800044 movi r6,1
8003538: 80062600 call 8006260 <__lshift>
800353c: 1009883a mov r4,r2
8003540: 900b883a mov r5,r18
8003544: d8800715 stw r2,28(sp)
8003548: 8005a780 call 8005a78 <__mcmp>
800354c: 0081e00e bge zero,r2,8003cd0 <_dtoa_r+0x157c>
8003550: bdc00044 addi r23,r23,1
8003554: 00800e84 movi r2,58
8003558: b881a226 beq r23,r2,8003be4 <_dtoa_r+0x1490>
800355c: b7000044 addi fp,r22,1
8003560: b5c00005 stb r23,0(r22)
8003564: 003f7406 br 8003338 <_dtoa_r+0xbe4>
8003568: 00800e44 movi r2,57
800356c: b8819d26 beq r23,r2,8003be4 <_dtoa_r+0x1490>
8003570: 053ffa0e bge zero,r20,800355c <_dtoa_r+0xe08>
8003574: 8dc00c44 addi r23,r17,49
8003578: 003ff806 br 800355c <_dtoa_r+0xe08>
800357c: d9001617 ldw r4,88(sp)
8003580: a80b883a mov r5,r21
8003584: 04000044 movi r16,1
8003588: 800591c0 call 800591c <_Bfree>
800358c: 003edf06 br 800310c <_dtoa_r+0x9b8>
8003590: d9001617 ldw r4,88(sp)
8003594: 980b883a mov r5,r19
8003598: 01800284 movi r6,10
800359c: 000f883a mov r7,zero
80035a0: 800663c0 call 800663c <__multadd>
80035a4: 1027883a mov r19,r2
80035a8: d8800615 stw r2,24(sp)
80035ac: 003ebb06 br 800309c <_dtoa_r+0x948>
80035b0: d9801117 ldw r6,68(sp)
80035b4: d8800d17 ldw r2,52(sp)
80035b8: d8000915 stw zero,36(sp)
80035bc: 308dc83a sub r6,r6,r2
80035c0: 0087c83a sub r3,zero,r2
80035c4: d9801115 stw r6,68(sp)
80035c8: d8c01015 stw r3,64(sp)
80035cc: 003cfe06 br 80029c8 <_dtoa_r+0x274>
80035d0: 018dc83a sub r6,zero,r6
80035d4: d9801115 stw r6,68(sp)
80035d8: d8000a15 stw zero,40(sp)
80035dc: 003cf306 br 80029ac <_dtoa_r+0x258>
80035e0: d9000d17 ldw r4,52(sp)
80035e4: 80092340 call 8009234 <__floatsidf>
80035e8: 880b883a mov r5,r17
80035ec: 8009883a mov r4,r16
80035f0: 180f883a mov r7,r3
80035f4: 100d883a mov r6,r2
80035f8: 80090140 call 8009014 <__nedf2>
80035fc: 103ce126 beq r2,zero,8002984 <_dtoa_r+0x230>
8003600: d9800d17 ldw r6,52(sp)
8003604: 31bfffc4 addi r6,r6,-1
8003608: d9800d15 stw r6,52(sp)
800360c: 003cdd06 br 8002984 <_dtoa_r+0x230>
8003610: d9000717 ldw r4,28(sp)
8003614: 900b883a mov r5,r18
8003618: 8005a780 call 8005a78 <__mcmp>
800361c: 103e8d0e bge r2,zero,8003054 <_dtoa_r+0x900>
8003620: d9400717 ldw r5,28(sp)
8003624: d9001617 ldw r4,88(sp)
8003628: 01800284 movi r6,10
800362c: 000f883a mov r7,zero
8003630: 800663c0 call 800663c <__multadd>
8003634: d9800d17 ldw r6,52(sp)
8003638: d8800715 stw r2,28(sp)
800363c: 31bfffc4 addi r6,r6,-1
8003640: d9800d15 stw r6,52(sp)
8003644: b001a71e bne r22,zero,8003ce4 <_dtoa_r+0x1590>
8003648: d8800e17 ldw r2,56(sp)
800364c: d8800f15 stw r2,60(sp)
8003650: 003e8006 br 8003054 <_dtoa_r+0x900>
8003654: 90800417 ldw r2,16(r18)
8003658: 1085883a add r2,r2,r2
800365c: 1085883a add r2,r2,r2
8003660: 1485883a add r2,r2,r18
8003664: 11000417 ldw r4,16(r2)
8003668: 80059440 call 8005944 <__hi0bits>
800366c: 00c00804 movi r3,32
8003670: 1887c83a sub r3,r3,r2
8003674: 003e5a06 br 8002fe0 <_dtoa_r+0x88c>
8003678: d9400717 ldw r5,28(sp)
800367c: d9801017 ldw r6,64(sp)
8003680: d9001617 ldw r4,88(sp)
8003684: 80067680 call 8006768 <__pow5mult>
8003688: d8800715 stw r2,28(sp)
800368c: 003e4306 br 8002f9c <_dtoa_r+0x848>
8003690: d9800f17 ldw r6,60(sp)
8003694: d8800d17 ldw r2,52(sp)
8003698: d9800315 stw r6,12(sp)
800369c: d8800415 stw r2,16(sp)
80036a0: d8c00b17 ldw r3,44(sp)
80036a4: 1805003a cmpeq r2,r3,zero
80036a8: 1000e21e bne r2,zero,8003a34 <_dtoa_r+0x12e0>
80036ac: d9000317 ldw r4,12(sp)
80036b0: 0005883a mov r2,zero
80036b4: 00cff834 movhi r3,16352
80036b8: 200c90fa slli r6,r4,3
80036bc: 01020074 movhi r4,2049
80036c0: 2137d504 addi r4,r4,-8364
80036c4: 180b883a mov r5,r3
80036c8: 310d883a add r6,r6,r4
80036cc: 327fff17 ldw r9,-4(r6)
80036d0: 323ffe17 ldw r8,-8(r6)
80036d4: 1009883a mov r4,r2
80036d8: 480f883a mov r7,r9
80036dc: 400d883a mov r6,r8
80036e0: 8008d340 call 8008d34 <__divdf3>
80036e4: 180b883a mov r5,r3
80036e8: b00d883a mov r6,r22
80036ec: b80f883a mov r7,r23
80036f0: 1009883a mov r4,r2
80036f4: 800887c0 call 800887c <__subdf3>
80036f8: a80b883a mov r5,r21
80036fc: a009883a mov r4,r20
8003700: d8c01915 stw r3,100(sp)
8003704: d8801815 stw r2,96(sp)
8003708: 800932c0 call 800932c <__fixdfsi>
800370c: 1009883a mov r4,r2
8003710: 1027883a mov r19,r2
8003714: 80092340 call 8009234 <__floatsidf>
8003718: a80b883a mov r5,r21
800371c: a009883a mov r4,r20
8003720: 180f883a mov r7,r3
8003724: 100d883a mov r6,r2
8003728: 800887c0 call 800887c <__subdf3>
800372c: d9801817 ldw r6,96(sp)
8003730: 1823883a mov r17,r3
8003734: d8801415 stw r2,80(sp)
8003738: 302d883a mov r22,r6
800373c: d9800517 ldw r6,20(sp)
8003740: 9cc00c04 addi r19,r19,48
8003744: dc401515 stw r17,84(sp)
8003748: d8c01917 ldw r3,100(sp)
800374c: 34c00005 stb r19,0(r6)
8003750: d8800517 ldw r2,20(sp)
8003754: d9401917 ldw r5,100(sp)
8003758: d9801417 ldw r6,80(sp)
800375c: b009883a mov r4,r22
8003760: 880f883a mov r7,r17
8003764: 182f883a mov r23,r3
8003768: 17000044 addi fp,r2,1
800376c: 800909c0 call 800909c <__gtdf2>
8003770: 00804e16 blt zero,r2,80038ac <_dtoa_r+0x1158>
8003774: d9801417 ldw r6,80(sp)
8003778: 0005883a mov r2,zero
800377c: 00cffc34 movhi r3,16368
8003780: 180b883a mov r5,r3
8003784: 880f883a mov r7,r17
8003788: 1009883a mov r4,r2
800378c: 800887c0 call 800887c <__subdf3>
8003790: d9401917 ldw r5,100(sp)
8003794: 180f883a mov r7,r3
8003798: b009883a mov r4,r22
800379c: 100d883a mov r6,r2
80037a0: 800909c0 call 800909c <__gtdf2>
80037a4: 00bda216 blt zero,r2,8002e30 <_dtoa_r+0x6dc>
80037a8: d8c00317 ldw r3,12(sp)
80037ac: 00800044 movi r2,1
80037b0: 10c01216 blt r2,r3,80037fc <_dtoa_r+0x10a8>
80037b4: 003d4506 br 8002ccc <_dtoa_r+0x578>
80037b8: d9801417 ldw r6,80(sp)
80037bc: 0005883a mov r2,zero
80037c0: 00cffc34 movhi r3,16368
80037c4: 180b883a mov r5,r3
80037c8: 880f883a mov r7,r17
80037cc: 1009883a mov r4,r2
80037d0: 800887c0 call 800887c <__subdf3>
80037d4: d9c01b17 ldw r7,108(sp)
80037d8: 180b883a mov r5,r3
80037dc: 1009883a mov r4,r2
80037e0: b00d883a mov r6,r22
80037e4: 80091ac0 call 80091ac <__ltdf2>
80037e8: 103d9116 blt r2,zero,8002e30 <_dtoa_r+0x6dc>
80037ec: d9800517 ldw r6,20(sp)
80037f0: d9000317 ldw r4,12(sp)
80037f4: 3105883a add r2,r6,r4
80037f8: e0bd3426 beq fp,r2,8002ccc <_dtoa_r+0x578>
80037fc: 04500934 movhi r17,16420
8003800: 0021883a mov r16,zero
8003804: b80b883a mov r5,r23
8003808: b009883a mov r4,r22
800380c: 800d883a mov r6,r16
8003810: 880f883a mov r7,r17
8003814: 80089700 call 8008970 <__muldf3>
8003818: d9401517 ldw r5,84(sp)
800381c: d9001417 ldw r4,80(sp)
8003820: 880f883a mov r7,r17
8003824: 000d883a mov r6,zero
8003828: d8801a15 stw r2,104(sp)
800382c: d8c01b15 stw r3,108(sp)
8003830: 80089700 call 8008970 <__muldf3>
8003834: 180b883a mov r5,r3
8003838: 1009883a mov r4,r2
800383c: 1823883a mov r17,r3
8003840: 1021883a mov r16,r2
8003844: 800932c0 call 800932c <__fixdfsi>
8003848: 1009883a mov r4,r2
800384c: 102b883a mov r21,r2
8003850: 80092340 call 8009234 <__floatsidf>
8003854: 880b883a mov r5,r17
8003858: 8009883a mov r4,r16
800385c: 180f883a mov r7,r3
8003860: 100d883a mov r6,r2
8003864: 800887c0 call 800887c <__subdf3>
8003868: 1021883a mov r16,r2
800386c: d9001b17 ldw r4,108(sp)
8003870: 1823883a mov r17,r3
8003874: dc001415 stw r16,80(sp)
8003878: ad400c04 addi r21,r21,48
800387c: dc401515 stw r17,84(sp)
8003880: d8801a17 ldw r2,104(sp)
8003884: e5400005 stb r21,0(fp)
8003888: 202f883a mov r23,r4
800388c: d9c01b17 ldw r7,108(sp)
8003890: d9001417 ldw r4,80(sp)
8003894: 880b883a mov r5,r17
8003898: 100d883a mov r6,r2
800389c: 102d883a mov r22,r2
80038a0: e7000044 addi fp,fp,1
80038a4: 80091ac0 call 80091ac <__ltdf2>
80038a8: 103fc30e bge r2,zero,80037b8 <_dtoa_r+0x1064>
80038ac: d9000417 ldw r4,16(sp)
80038b0: d9000d15 stw r4,52(sp)
80038b4: 003d7106 br 8002e7c <_dtoa_r+0x728>
80038b8: d9801717 ldw r6,92(sp)
80038bc: 00800084 movi r2,2
80038c0: 11bde60e bge r2,r6,800305c <_dtoa_r+0x908>
80038c4: 203cfb1e bne r4,zero,8002cb4 <_dtoa_r+0x560>
80038c8: d9001617 ldw r4,88(sp)
80038cc: 900b883a mov r5,r18
80038d0: 01800144 movi r6,5
80038d4: 000f883a mov r7,zero
80038d8: 800663c0 call 800663c <__multadd>
80038dc: d9000717 ldw r4,28(sp)
80038e0: 100b883a mov r5,r2
80038e4: 1025883a mov r18,r2
80038e8: 8005a780 call 8005a78 <__mcmp>
80038ec: 00bcf10e bge zero,r2,8002cb4 <_dtoa_r+0x560>
80038f0: d8c00d17 ldw r3,52(sp)
80038f4: d9000517 ldw r4,20(sp)
80038f8: d8000615 stw zero,24(sp)
80038fc: 18c00044 addi r3,r3,1
8003900: d8c00d15 stw r3,52(sp)
8003904: 00800c44 movi r2,49
8003908: 27000044 addi fp,r4,1
800390c: 20800005 stb r2,0(r4)
8003910: 003e8906 br 8003338 <_dtoa_r+0xbe4>
8003914: d8c00517 ldw r3,20(sp)
8003918: 003bc206 br 8002824 <_dtoa_r+0xd0>
800391c: 01820074 movhi r6,2049
8003920: 31b80704 addi r6,r6,-8164
8003924: 30c00917 ldw r3,36(r6)
8003928: 30800817 ldw r2,32(r6)
800392c: d9001217 ldw r4,72(sp)
8003930: d9401317 ldw r5,76(sp)
8003934: 180f883a mov r7,r3
8003938: 100d883a mov r6,r2
800393c: 8008d340 call 8008d34 <__divdf3>
8003940: 948003cc andi r18,r18,15
8003944: 058000c4 movi r22,3
8003948: 1029883a mov r20,r2
800394c: 182b883a mov r21,r3
8003950: 003c8906 br 8002b78 <_dtoa_r+0x424>
8003954: d9001017 ldw r4,64(sp)
8003958: d9800917 ldw r6,36(sp)
800395c: 0025883a mov r18,zero
8003960: 1105c83a sub r2,r2,r4
8003964: 2089883a add r4,r4,r2
8003968: 308d883a add r6,r6,r2
800396c: d9001015 stw r4,64(sp)
8003970: d9800915 stw r6,36(sp)
8003974: 003e3206 br 8003240 <_dtoa_r+0xaec>
8003978: 28800044 addi r2,r5,1
800397c: 27000044 addi fp,r4,1
8003980: 20800005 stb r2,0(r4)
8003984: 003e6c06 br 8003338 <_dtoa_r+0xbe4>
8003988: d8800f17 ldw r2,60(sp)
800398c: 00bce016 blt zero,r2,8002d10 <_dtoa_r+0x5bc>
8003990: d9800f17 ldw r6,60(sp)
8003994: 303cc51e bne r6,zero,8002cac <_dtoa_r+0x558>
8003998: 0005883a mov r2,zero
800399c: 00d00534 movhi r3,16404
80039a0: 980b883a mov r5,r19
80039a4: 180f883a mov r7,r3
80039a8: 9009883a mov r4,r18
80039ac: 100d883a mov r6,r2
80039b0: 80089700 call 8008970 <__muldf3>
80039b4: 180b883a mov r5,r3
80039b8: a80f883a mov r7,r21
80039bc: 1009883a mov r4,r2
80039c0: a00d883a mov r6,r20
80039c4: 80091240 call 8009124 <__gedf2>
80039c8: 103cb80e bge r2,zero,8002cac <_dtoa_r+0x558>
80039cc: 0027883a mov r19,zero
80039d0: 0025883a mov r18,zero
80039d4: 003fc606 br 80038f0 <_dtoa_r+0x119c>
80039d8: 99400117 ldw r5,4(r19)
80039dc: d9001617 ldw r4,88(sp)
80039e0: 8005e9c0 call 8005e9c <_Balloc>
80039e4: 99800417 ldw r6,16(r19)
80039e8: 11000304 addi r4,r2,12
80039ec: 99400304 addi r5,r19,12
80039f0: 318d883a add r6,r6,r6
80039f4: 318d883a add r6,r6,r6
80039f8: 31800204 addi r6,r6,8
80039fc: 1023883a mov r17,r2
8003a00: 80057040 call 8005704 <memcpy>
8003a04: d9001617 ldw r4,88(sp)
8003a08: 880b883a mov r5,r17
8003a0c: 01800044 movi r6,1
8003a10: 80062600 call 8006260 <__lshift>
8003a14: 100b883a mov r5,r2
8003a18: 003d9c06 br 800308c <_dtoa_r+0x938>
8003a1c: 00800e44 movi r2,57
8003a20: b8807026 beq r23,r2,8003be4 <_dtoa_r+0x1490>
8003a24: b8800044 addi r2,r23,1
8003a28: b7000044 addi fp,r22,1
8003a2c: b0800005 stb r2,0(r22)
8003a30: 003e4106 br 8003338 <_dtoa_r+0xbe4>
8003a34: d8800317 ldw r2,12(sp)
8003a38: 01820074 movhi r6,2049
8003a3c: 31b7d504 addi r6,r6,-8364
8003a40: b009883a mov r4,r22
8003a44: 100e90fa slli r7,r2,3
8003a48: b80b883a mov r5,r23
8003a4c: 398f883a add r7,r7,r6
8003a50: 38bffe17 ldw r2,-8(r7)
8003a54: d9800517 ldw r6,20(sp)
8003a58: 38ffff17 ldw r3,-4(r7)
8003a5c: 37000044 addi fp,r6,1
8003a60: 180f883a mov r7,r3
8003a64: 100d883a mov r6,r2
8003a68: 80089700 call 8008970 <__muldf3>
8003a6c: a80b883a mov r5,r21
8003a70: a009883a mov r4,r20
8003a74: 182f883a mov r23,r3
8003a78: 102d883a mov r22,r2
8003a7c: 800932c0 call 800932c <__fixdfsi>
8003a80: 1009883a mov r4,r2
8003a84: 1027883a mov r19,r2
8003a88: 80092340 call 8009234 <__floatsidf>
8003a8c: a80b883a mov r5,r21
8003a90: a009883a mov r4,r20
8003a94: 180f883a mov r7,r3
8003a98: 100d883a mov r6,r2
8003a9c: 800887c0 call 800887c <__subdf3>
8003aa0: 180b883a mov r5,r3
8003aa4: d8c00517 ldw r3,20(sp)
8003aa8: 9cc00c04 addi r19,r19,48
8003aac: 1009883a mov r4,r2
8003ab0: 1cc00005 stb r19,0(r3)
8003ab4: 2021883a mov r16,r4
8003ab8: d9000317 ldw r4,12(sp)
8003abc: 00800044 movi r2,1
8003ac0: 2823883a mov r17,r5
8003ac4: 20802226 beq r4,r2,8003b50 <_dtoa_r+0x13fc>
8003ac8: 1029883a mov r20,r2
8003acc: 0005883a mov r2,zero
8003ad0: 00d00934 movhi r3,16420
8003ad4: 180f883a mov r7,r3
8003ad8: 100d883a mov r6,r2
8003adc: 880b883a mov r5,r17
8003ae0: 8009883a mov r4,r16
8003ae4: 80089700 call 8008970 <__muldf3>
8003ae8: 180b883a mov r5,r3
8003aec: 1009883a mov r4,r2
8003af0: 1823883a mov r17,r3
8003af4: 1021883a mov r16,r2
8003af8: 800932c0 call 800932c <__fixdfsi>
8003afc: 1009883a mov r4,r2
8003b00: 102b883a mov r21,r2
8003b04: 80092340 call 8009234 <__floatsidf>
8003b08: 880b883a mov r5,r17
8003b0c: 8009883a mov r4,r16
8003b10: 180f883a mov r7,r3
8003b14: 100d883a mov r6,r2
8003b18: 800887c0 call 800887c <__subdf3>
8003b1c: 180b883a mov r5,r3
8003b20: d8c00517 ldw r3,20(sp)
8003b24: 1009883a mov r4,r2
8003b28: ad400c04 addi r21,r21,48
8003b2c: 1d05883a add r2,r3,r20
8003b30: 15400005 stb r21,0(r2)
8003b34: 2021883a mov r16,r4
8003b38: d9000317 ldw r4,12(sp)
8003b3c: a5000044 addi r20,r20,1
8003b40: 2823883a mov r17,r5
8003b44: a13fe11e bne r20,r4,8003acc <_dtoa_r+0x1378>
8003b48: e505883a add r2,fp,r20
8003b4c: 173fffc4 addi fp,r2,-1
8003b50: 0025883a mov r18,zero
8003b54: 04cff834 movhi r19,16352
8003b58: b009883a mov r4,r22
8003b5c: b80b883a mov r5,r23
8003b60: 900d883a mov r6,r18
8003b64: 980f883a mov r7,r19
8003b68: 80088fc0 call 80088fc <__adddf3>
8003b6c: 180b883a mov r5,r3
8003b70: 1009883a mov r4,r2
8003b74: 800d883a mov r6,r16
8003b78: 880f883a mov r7,r17
8003b7c: 80091ac0 call 80091ac <__ltdf2>
8003b80: 103cab16 blt r2,zero,8002e30 <_dtoa_r+0x6dc>
8003b84: 0009883a mov r4,zero
8003b88: 980b883a mov r5,r19
8003b8c: b80f883a mov r7,r23
8003b90: b00d883a mov r6,r22
8003b94: 800887c0 call 800887c <__subdf3>
8003b98: 180b883a mov r5,r3
8003b9c: 880f883a mov r7,r17
8003ba0: 1009883a mov r4,r2
8003ba4: 800d883a mov r6,r16
8003ba8: 800909c0 call 800909c <__gtdf2>
8003bac: 00bc470e bge zero,r2,8002ccc <_dtoa_r+0x578>
8003bb0: 00c00c04 movi r3,48
8003bb4: e73fffc4 addi fp,fp,-1
8003bb8: e0800007 ldb r2,0(fp)
8003bbc: 10fffd26 beq r2,r3,8003bb4 <_dtoa_r+0x1460>
8003bc0: d9800417 ldw r6,16(sp)
8003bc4: e7000044 addi fp,fp,1
8003bc8: d9800d15 stw r6,52(sp)
8003bcc: 003cab06 br 8002e7c <_dtoa_r+0x728>
8003bd0: d8c00f17 ldw r3,60(sp)
8003bd4: d9001117 ldw r4,68(sp)
8003bd8: 20e1c83a sub r16,r4,r3
8003bdc: 0007883a mov r3,zero
8003be0: 003d9b06 br 8003250 <_dtoa_r+0xafc>
8003be4: 00800e44 movi r2,57
8003be8: b0800005 stb r2,0(r22)
8003bec: b5800044 addi r22,r22,1
8003bf0: 003dc106 br 80032f8 <_dtoa_r+0xba4>
8003bf4: 05800084 movi r22,2
8003bf8: 003bf706 br 8002bd8 <_dtoa_r+0x484>
8003bfc: d9000f17 ldw r4,60(sp)
8003c00: 013c000e bge zero,r4,8002c04 <_dtoa_r+0x4b0>
8003c04: d9800e17 ldw r6,56(sp)
8003c08: 01bc300e bge zero,r6,8002ccc <_dtoa_r+0x578>
8003c0c: 0005883a mov r2,zero
8003c10: 00d00934 movhi r3,16420
8003c14: a80b883a mov r5,r21
8003c18: 180f883a mov r7,r3
8003c1c: a009883a mov r4,r20
8003c20: 100d883a mov r6,r2
8003c24: 80089700 call 8008970 <__muldf3>
8003c28: b1000044 addi r4,r22,1
8003c2c: 1021883a mov r16,r2
8003c30: 1823883a mov r17,r3
8003c34: 80092340 call 8009234 <__floatsidf>
8003c38: 880b883a mov r5,r17
8003c3c: 8009883a mov r4,r16
8003c40: 180f883a mov r7,r3
8003c44: 100d883a mov r6,r2
8003c48: 80089700 call 8008970 <__muldf3>
8003c4c: 0011883a mov r8,zero
8003c50: 02500734 movhi r9,16412
8003c54: 180b883a mov r5,r3
8003c58: 480f883a mov r7,r9
8003c5c: 1009883a mov r4,r2
8003c60: 400d883a mov r6,r8
8003c64: 80088fc0 call 80088fc <__adddf3>
8003c68: 102d883a mov r22,r2
8003c6c: 00bf3034 movhi r2,64704
8003c70: 10ef883a add r23,r2,r3
8003c74: d8800d17 ldw r2,52(sp)
8003c78: d8c00e17 ldw r3,56(sp)
8003c7c: 8029883a mov r20,r16
8003c80: 10bfffc4 addi r2,r2,-1
8003c84: 882b883a mov r21,r17
8003c88: d8800415 stw r2,16(sp)
8003c8c: d8c00315 stw r3,12(sp)
8003c90: 003e8306 br 80036a0 <_dtoa_r+0xf4c>
8003c94: d8800117 ldw r2,4(sp)
8003c98: dc001117 ldw r16,68(sp)
8003c9c: dc801017 ldw r18,64(sp)
8003ca0: 00c00d84 movi r3,54
8003ca4: 1887c83a sub r3,r3,r2
8003ca8: 003d6906 br 8003250 <_dtoa_r+0xafc>
8003cac: 01800044 movi r6,1
8003cb0: 3021883a mov r16,r6
8003cb4: d9800f15 stw r6,60(sp)
8003cb8: d9802615 stw r6,152(sp)
8003cbc: d9800e15 stw r6,56(sp)
8003cc0: 003b9306 br 8002b10 <_dtoa_r+0x3bc>
8003cc4: b021883a mov r16,r22
8003cc8: dd800f15 stw r22,60(sp)
8003ccc: 003b9006 br 8002b10 <_dtoa_r+0x3bc>
8003cd0: 103e221e bne r2,zero,800355c <_dtoa_r+0xe08>
8003cd4: b880004c andi r2,r23,1
8003cd8: 1005003a cmpeq r2,r2,zero
8003cdc: 103e1f1e bne r2,zero,800355c <_dtoa_r+0xe08>
8003ce0: 003e1b06 br 8003550 <_dtoa_r+0xdfc>
8003ce4: d9001617 ldw r4,88(sp)
8003ce8: 980b883a mov r5,r19
8003cec: 01800284 movi r6,10
8003cf0: 000f883a mov r7,zero
8003cf4: 800663c0 call 800663c <__multadd>
8003cf8: d8c00e17 ldw r3,56(sp)
8003cfc: 1027883a mov r19,r2
8003d00: d8c00f15 stw r3,60(sp)
8003d04: 003cd306 br 8003054 <_dtoa_r+0x900>
08003d08 <_fflush_r>:
8003d08: defffb04 addi sp,sp,-20
8003d0c: dcc00315 stw r19,12(sp)
8003d10: dc800215 stw r18,8(sp)
8003d14: dfc00415 stw ra,16(sp)
8003d18: dc400115 stw r17,4(sp)
8003d1c: dc000015 stw r16,0(sp)
8003d20: 2027883a mov r19,r4
8003d24: 2825883a mov r18,r5
8003d28: 20000226 beq r4,zero,8003d34 <_fflush_r+0x2c>
8003d2c: 20800e17 ldw r2,56(r4)
8003d30: 10005626 beq r2,zero,8003e8c <_fflush_r+0x184>
8003d34: 9100030b ldhu r4,12(r18)
8003d38: 20ffffcc andi r3,r4,65535
8003d3c: 18e0001c xori r3,r3,32768
8003d40: 18e00004 addi r3,r3,-32768
8003d44: 1880020c andi r2,r3,8
8003d48: 1000261e bne r2,zero,8003de4 <_fflush_r+0xdc>
8003d4c: 90c00117 ldw r3,4(r18)
8003d50: 20820014 ori r2,r4,2048
8003d54: 9080030d sth r2,12(r18)
8003d58: 1009883a mov r4,r2
8003d5c: 00c0400e bge zero,r3,8003e60 <_fflush_r+0x158>
8003d60: 92000a17 ldw r8,40(r18)
8003d64: 40004026 beq r8,zero,8003e68 <_fflush_r+0x160>
8003d68: 2084000c andi r2,r4,4096
8003d6c: 10005326 beq r2,zero,8003ebc <_fflush_r+0x1b4>
8003d70: 94001417 ldw r16,80(r18)
8003d74: 9080030b ldhu r2,12(r18)
8003d78: 1080010c andi r2,r2,4
8003d7c: 1000481e bne r2,zero,8003ea0 <_fflush_r+0x198>
8003d80: 91400717 ldw r5,28(r18)
8003d84: 9809883a mov r4,r19
8003d88: 800d883a mov r6,r16
8003d8c: 000f883a mov r7,zero
8003d90: 403ee83a callr r8
8003d94: 8080261e bne r16,r2,8003e30 <_fflush_r+0x128>
8003d98: 9080030b ldhu r2,12(r18)
8003d9c: 91000417 ldw r4,16(r18)
8003da0: 90000115 stw zero,4(r18)
8003da4: 10bdffcc andi r2,r2,63487
8003da8: 10ffffcc andi r3,r2,65535
8003dac: 18c4000c andi r3,r3,4096
8003db0: 9080030d sth r2,12(r18)
8003db4: 91000015 stw r4,0(r18)
8003db8: 18002b26 beq r3,zero,8003e68 <_fflush_r+0x160>
8003dbc: 0007883a mov r3,zero
8003dc0: 1805883a mov r2,r3
8003dc4: 94001415 stw r16,80(r18)
8003dc8: dfc00417 ldw ra,16(sp)
8003dcc: dcc00317 ldw r19,12(sp)
8003dd0: dc800217 ldw r18,8(sp)
8003dd4: dc400117 ldw r17,4(sp)
8003dd8: dc000017 ldw r16,0(sp)
8003ddc: dec00504 addi sp,sp,20
8003de0: f800283a ret
8003de4: 94400417 ldw r17,16(r18)
8003de8: 88001f26 beq r17,zero,8003e68 <_fflush_r+0x160>
8003dec: 90800017 ldw r2,0(r18)
8003df0: 18c000cc andi r3,r3,3
8003df4: 94400015 stw r17,0(r18)
8003df8: 1461c83a sub r16,r2,r17
8003dfc: 18002526 beq r3,zero,8003e94 <_fflush_r+0x18c>
8003e00: 0005883a mov r2,zero
8003e04: 90800215 stw r2,8(r18)
8003e08: 0400170e bge zero,r16,8003e68 <_fflush_r+0x160>
8003e0c: 90c00917 ldw r3,36(r18)
8003e10: 91400717 ldw r5,28(r18)
8003e14: 880d883a mov r6,r17
8003e18: 800f883a mov r7,r16
8003e1c: 9809883a mov r4,r19
8003e20: 183ee83a callr r3
8003e24: 88a3883a add r17,r17,r2
8003e28: 80a1c83a sub r16,r16,r2
8003e2c: 00bff616 blt zero,r2,8003e08 <_fflush_r+0x100>
8003e30: 9080030b ldhu r2,12(r18)
8003e34: 00ffffc4 movi r3,-1
8003e38: 10801014 ori r2,r2,64
8003e3c: 9080030d sth r2,12(r18)
8003e40: 1805883a mov r2,r3
8003e44: dfc00417 ldw ra,16(sp)
8003e48: dcc00317 ldw r19,12(sp)
8003e4c: dc800217 ldw r18,8(sp)
8003e50: dc400117 ldw r17,4(sp)
8003e54: dc000017 ldw r16,0(sp)
8003e58: dec00504 addi sp,sp,20
8003e5c: f800283a ret
8003e60: 90800f17 ldw r2,60(r18)
8003e64: 00bfbe16 blt zero,r2,8003d60 <_fflush_r+0x58>
8003e68: 0007883a mov r3,zero
8003e6c: 1805883a mov r2,r3
8003e70: dfc00417 ldw ra,16(sp)
8003e74: dcc00317 ldw r19,12(sp)
8003e78: dc800217 ldw r18,8(sp)
8003e7c: dc400117 ldw r17,4(sp)
8003e80: dc000017 ldw r16,0(sp)
8003e84: dec00504 addi sp,sp,20
8003e88: f800283a ret
8003e8c: 8003fa00 call 8003fa0 <__sinit>
8003e90: 003fa806 br 8003d34 <_fflush_r+0x2c>
8003e94: 90800517 ldw r2,20(r18)
8003e98: 90800215 stw r2,8(r18)
8003e9c: 003fda06 br 8003e08 <_fflush_r+0x100>
8003ea0: 90800117 ldw r2,4(r18)
8003ea4: 90c00c17 ldw r3,48(r18)
8003ea8: 80a1c83a sub r16,r16,r2
8003eac: 183fb426 beq r3,zero,8003d80 <_fflush_r+0x78>
8003eb0: 90800f17 ldw r2,60(r18)
8003eb4: 80a1c83a sub r16,r16,r2
8003eb8: 003fb106 br 8003d80 <_fflush_r+0x78>
8003ebc: 91400717 ldw r5,28(r18)
8003ec0: 9809883a mov r4,r19
8003ec4: 000d883a mov r6,zero
8003ec8: 01c00044 movi r7,1
8003ecc: 403ee83a callr r8
8003ed0: 1021883a mov r16,r2
8003ed4: 00bfffc4 movi r2,-1
8003ed8: 80800226 beq r16,r2,8003ee4 <_fflush_r+0x1dc>
8003edc: 92000a17 ldw r8,40(r18)
8003ee0: 003fa406 br 8003d74 <_fflush_r+0x6c>
8003ee4: 98c00017 ldw r3,0(r19)
8003ee8: 00800744 movi r2,29
8003eec: 18bfde26 beq r3,r2,8003e68 <_fflush_r+0x160>
8003ef0: 9080030b ldhu r2,12(r18)
8003ef4: 8007883a mov r3,r16
8003ef8: 10801014 ori r2,r2,64
8003efc: 9080030d sth r2,12(r18)
8003f00: 003fcf06 br 8003e40 <_fflush_r+0x138>
08003f04 <fflush>:
8003f04: 01420034 movhi r5,2048
8003f08: 294f4204 addi r5,r5,15624
8003f0c: 2007883a mov r3,r4
8003f10: 20000526 beq r4,zero,8003f28 <fflush+0x24>
8003f14: 00820074 movhi r2,2049
8003f18: 10bf4804 addi r2,r2,-736
8003f1c: 11000017 ldw r4,0(r2)
8003f20: 180b883a mov r5,r3
8003f24: 8003d081 jmpi 8003d08 <_fflush_r>
8003f28: 00820074 movhi r2,2049
8003f2c: 10bf4904 addi r2,r2,-732
8003f30: 11000017 ldw r4,0(r2)
8003f34: 8004b081 jmpi 8004b08 <_fwalk_reent>
08003f38 <std>:
8003f38: 00820034 movhi r2,2048
8003f3c: 109c1f04 addi r2,r2,28796
8003f40: 20800b15 stw r2,44(r4)
8003f44: 00820034 movhi r2,2048
8003f48: 109c5a04 addi r2,r2,29032
8003f4c: 20800815 stw r2,32(r4)
8003f50: 00c20034 movhi r3,2048
8003f54: 18dc3b04 addi r3,r3,28908
8003f58: 00820034 movhi r2,2048
8003f5c: 109c2104 addi r2,r2,28804
8003f60: 2140030d sth r5,12(r4)
8003f64: 2180038d sth r6,14(r4)
8003f68: 20c00915 stw r3,36(r4)
8003f6c: 20800a15 stw r2,40(r4)
8003f70: 20000015 stw zero,0(r4)
8003f74: 20000115 stw zero,4(r4)
8003f78: 20000215 stw zero,8(r4)
8003f7c: 20000415 stw zero,16(r4)
8003f80: 20000515 stw zero,20(r4)
8003f84: 20000615 stw zero,24(r4)
8003f88: 21000715 stw r4,28(r4)
8003f8c: f800283a ret
08003f90 <__sfp_lock_acquire>:
8003f90: f800283a ret
08003f94 <__sfp_lock_release>:
8003f94: f800283a ret
08003f98 <__sinit_lock_acquire>:
8003f98: f800283a ret
08003f9c <__sinit_lock_release>:
8003f9c: f800283a ret
08003fa0 <__sinit>:
8003fa0: 20800e17 ldw r2,56(r4)
8003fa4: defffd04 addi sp,sp,-12
8003fa8: dc400115 stw r17,4(sp)
8003fac: dc000015 stw r16,0(sp)
8003fb0: dfc00215 stw ra,8(sp)
8003fb4: 04400044 movi r17,1
8003fb8: 01400104 movi r5,4
8003fbc: 000d883a mov r6,zero
8003fc0: 2021883a mov r16,r4
8003fc4: 2200bb04 addi r8,r4,748
8003fc8: 200f883a mov r7,r4
8003fcc: 10000526 beq r2,zero,8003fe4 <__sinit+0x44>
8003fd0: dfc00217 ldw ra,8(sp)
8003fd4: dc400117 ldw r17,4(sp)
8003fd8: dc000017 ldw r16,0(sp)
8003fdc: dec00304 addi sp,sp,12
8003fe0: f800283a ret
8003fe4: 21000117 ldw r4,4(r4)
8003fe8: 00820034 movhi r2,2048
8003fec: 10902104 addi r2,r2,16516
8003ff0: 00c000c4 movi r3,3
8003ff4: 80800f15 stw r2,60(r16)
8003ff8: 80c0b915 stw r3,740(r16)
8003ffc: 8200ba15 stw r8,744(r16)
8004000: 84400e15 stw r17,56(r16)
8004004: 8000b815 stw zero,736(r16)
8004008: 8003f380 call 8003f38 <std>
800400c: 81000217 ldw r4,8(r16)
8004010: 880d883a mov r6,r17
8004014: 800f883a mov r7,r16
8004018: 01400284 movi r5,10
800401c: 8003f380 call 8003f38 <std>
8004020: 81000317 ldw r4,12(r16)
8004024: 800f883a mov r7,r16
8004028: 01400484 movi r5,18
800402c: 01800084 movi r6,2
8004030: dfc00217 ldw ra,8(sp)
8004034: dc400117 ldw r17,4(sp)
8004038: dc000017 ldw r16,0(sp)
800403c: dec00304 addi sp,sp,12
8004040: 8003f381 jmpi 8003f38 <std>
08004044 <__fp_lock>:
8004044: 0005883a mov r2,zero
8004048: f800283a ret
0800404c <__fp_unlock>:
800404c: 0005883a mov r2,zero
8004050: f800283a ret
08004054 <__fp_unlock_all>:
8004054: 00820074 movhi r2,2049
8004058: 10bf4804 addi r2,r2,-736
800405c: 11000017 ldw r4,0(r2)
8004060: 01420034 movhi r5,2048
8004064: 29501304 addi r5,r5,16460
8004068: 8004bd01 jmpi 8004bd0 <_fwalk>
0800406c <__fp_lock_all>:
800406c: 00820074 movhi r2,2049
8004070: 10bf4804 addi r2,r2,-736
8004074: 11000017 ldw r4,0(r2)
8004078: 01420034 movhi r5,2048
800407c: 29501104 addi r5,r5,16452
8004080: 8004bd01 jmpi 8004bd0 <_fwalk>
08004084 <_cleanup_r>:
8004084: 01420034 movhi r5,2048
8004088: 295d6e04 addi r5,r5,30136
800408c: 8004bd01 jmpi 8004bd0 <_fwalk>
08004090 <_cleanup>:
8004090: 00820074 movhi r2,2049
8004094: 10bf4904 addi r2,r2,-732
8004098: 11000017 ldw r4,0(r2)
800409c: 80040841 jmpi 8004084 <_cleanup_r>
080040a0 <__sfmoreglue>:
80040a0: defffc04 addi sp,sp,-16
80040a4: dc000015 stw r16,0(sp)
80040a8: 2821883a mov r16,r5
80040ac: dc400115 stw r17,4(sp)
80040b0: 01401704 movi r5,92
80040b4: 2023883a mov r17,r4
80040b8: 8009883a mov r4,r16
80040bc: dfc00315 stw ra,12(sp)
80040c0: dcc00215 stw r19,8(sp)
80040c4: 80096e40 call 80096e4 <__mulsi3>
80040c8: 11400304 addi r5,r2,12
80040cc: 8809883a mov r4,r17
80040d0: 1027883a mov r19,r2
80040d4: 8004ee00 call 8004ee0 <_malloc_r>
80040d8: 10c00304 addi r3,r2,12
80040dc: 1023883a mov r17,r2
80040e0: 1809883a mov r4,r3
80040e4: 980d883a mov r6,r19
80040e8: 000b883a mov r5,zero
80040ec: 10000b26 beq r2,zero,800411c <__sfmoreglue+0x7c>
80040f0: 14000115 stw r16,4(r2)
80040f4: 10c00215 stw r3,8(r2)
80040f8: 10000015 stw zero,0(r2)
80040fc: 80058840 call 8005884 <memset>
8004100: 8805883a mov r2,r17
8004104: dfc00317 ldw ra,12(sp)
8004108: dcc00217 ldw r19,8(sp)
800410c: dc400117 ldw r17,4(sp)
8004110: dc000017 ldw r16,0(sp)
8004114: dec00404 addi sp,sp,16
8004118: f800283a ret
800411c: 0023883a mov r17,zero
8004120: 8805883a mov r2,r17
8004124: dfc00317 ldw ra,12(sp)
8004128: dcc00217 ldw r19,8(sp)
800412c: dc400117 ldw r17,4(sp)
8004130: dc000017 ldw r16,0(sp)
8004134: dec00404 addi sp,sp,16
8004138: f800283a ret
0800413c <__sfp>:
800413c: defffd04 addi sp,sp,-12
8004140: 00820074 movhi r2,2049
8004144: 10bf4904 addi r2,r2,-732
8004148: dc000015 stw r16,0(sp)
800414c: 14000017 ldw r16,0(r2)
8004150: dc400115 stw r17,4(sp)
8004154: dfc00215 stw ra,8(sp)
8004158: 80800e17 ldw r2,56(r16)
800415c: 2023883a mov r17,r4
8004160: 10002626 beq r2,zero,80041fc <__sfp+0xc0>
8004164: 8400b804 addi r16,r16,736
8004168: 80800117 ldw r2,4(r16)
800416c: 81000217 ldw r4,8(r16)
8004170: 10ffffc4 addi r3,r2,-1
8004174: 18000916 blt r3,zero,800419c <__sfp+0x60>
8004178: 2080030f ldh r2,12(r4)
800417c: 10000b26 beq r2,zero,80041ac <__sfp+0x70>
8004180: 017fffc4 movi r5,-1
8004184: 00000206 br 8004190 <__sfp+0x54>
8004188: 2080030f ldh r2,12(r4)
800418c: 10000726 beq r2,zero,80041ac <__sfp+0x70>
8004190: 18ffffc4 addi r3,r3,-1
8004194: 21001704 addi r4,r4,92
8004198: 197ffb1e bne r3,r5,8004188 <__sfp+0x4c>
800419c: 80800017 ldw r2,0(r16)
80041a0: 10001926 beq r2,zero,8004208 <__sfp+0xcc>
80041a4: 1021883a mov r16,r2
80041a8: 003fef06 br 8004168 <__sfp+0x2c>
80041ac: 00bfffc4 movi r2,-1
80041b0: 00c00044 movi r3,1
80041b4: 2080038d sth r2,14(r4)
80041b8: 20c0030d sth r3,12(r4)
80041bc: 20000015 stw zero,0(r4)
80041c0: 20000215 stw zero,8(r4)
80041c4: 20000115 stw zero,4(r4)
80041c8: 20000415 stw zero,16(r4)
80041cc: 20000515 stw zero,20(r4)
80041d0: 20000615 stw zero,24(r4)
80041d4: 20000c15 stw zero,48(r4)
80041d8: 20000d15 stw zero,52(r4)
80041dc: 20001115 stw zero,68(r4)
80041e0: 20001215 stw zero,72(r4)
80041e4: 2005883a mov r2,r4
80041e8: dfc00217 ldw ra,8(sp)
80041ec: dc400117 ldw r17,4(sp)
80041f0: dc000017 ldw r16,0(sp)
80041f4: dec00304 addi sp,sp,12
80041f8: f800283a ret
80041fc: 8009883a mov r4,r16
8004200: 8003fa00 call 8003fa0 <__sinit>
8004204: 003fd706 br 8004164 <__sfp+0x28>
8004208: 8809883a mov r4,r17
800420c: 01400104 movi r5,4
8004210: 80040a00 call 80040a0 <__sfmoreglue>
8004214: 80800015 stw r2,0(r16)
8004218: 103fe21e bne r2,zero,80041a4 <__sfp+0x68>
800421c: 00800304 movi r2,12
8004220: 0009883a mov r4,zero
8004224: 88800015 stw r2,0(r17)
8004228: 003fee06 br 80041e4 <__sfp+0xa8>
0800422c <_malloc_trim_r>:
800422c: defffb04 addi sp,sp,-20
8004230: dcc00315 stw r19,12(sp)
8004234: 04c20074 movhi r19,2049
8004238: 9cf99204 addi r19,r19,-6584
800423c: dc800215 stw r18,8(sp)
8004240: dc400115 stw r17,4(sp)
8004244: dc000015 stw r16,0(sp)
8004248: 2823883a mov r17,r5
800424c: 2025883a mov r18,r4
8004250: dfc00415 stw ra,16(sp)
8004254: 800a44c0 call 800a44c <__malloc_lock>
8004258: 98800217 ldw r2,8(r19)
800425c: 9009883a mov r4,r18
8004260: 000b883a mov r5,zero
8004264: 10c00117 ldw r3,4(r2)
8004268: 00bfff04 movi r2,-4
800426c: 18a0703a and r16,r3,r2
8004270: 8463c83a sub r17,r16,r17
8004274: 8c43fbc4 addi r17,r17,4079
8004278: 8822d33a srli r17,r17,12
800427c: 0083ffc4 movi r2,4095
8004280: 8c7fffc4 addi r17,r17,-1
8004284: 8822933a slli r17,r17,12
8004288: 1440060e bge r2,r17,80042a4 <_malloc_trim_r+0x78>
800428c: 800700c0 call 800700c <_sbrk_r>
8004290: 98c00217 ldw r3,8(r19)
8004294: 9009883a mov r4,r18
8004298: 044bc83a sub r5,zero,r17
800429c: 80c7883a add r3,r16,r3
80042a0: 10c00926 beq r2,r3,80042c8 <_malloc_trim_r+0x9c>
80042a4: 800a46c0 call 800a46c <__malloc_unlock>
80042a8: 0005883a mov r2,zero
80042ac: dfc00417 ldw ra,16(sp)
80042b0: dcc00317 ldw r19,12(sp)
80042b4: dc800217 ldw r18,8(sp)
80042b8: dc400117 ldw r17,4(sp)
80042bc: dc000017 ldw r16,0(sp)
80042c0: dec00504 addi sp,sp,20
80042c4: f800283a ret
80042c8: 9009883a mov r4,r18
80042cc: 800700c0 call 800700c <_sbrk_r>
80042d0: 844dc83a sub r6,r16,r17
80042d4: 00ffffc4 movi r3,-1
80042d8: 9009883a mov r4,r18
80042dc: 000b883a mov r5,zero
80042e0: 01c20074 movhi r7,2049
80042e4: 39c63004 addi r7,r7,6336
80042e8: 31800054 ori r6,r6,1
80042ec: 10c00926 beq r2,r3,8004314 <_malloc_trim_r+0xe8>
80042f0: 38800017 ldw r2,0(r7)
80042f4: 98c00217 ldw r3,8(r19)
80042f8: 9009883a mov r4,r18
80042fc: 1445c83a sub r2,r2,r17
8004300: 38800015 stw r2,0(r7)
8004304: 19800115 stw r6,4(r3)
8004308: 800a46c0 call 800a46c <__malloc_unlock>
800430c: 00800044 movi r2,1
8004310: 003fe606 br 80042ac <_malloc_trim_r+0x80>
8004314: 800700c0 call 800700c <_sbrk_r>
8004318: 99800217 ldw r6,8(r19)
800431c: 100f883a mov r7,r2
8004320: 9009883a mov r4,r18
8004324: 1187c83a sub r3,r2,r6
8004328: 008003c4 movi r2,15
800432c: 19400054 ori r5,r3,1
8004330: 10ffdc0e bge r2,r3,80042a4 <_malloc_trim_r+0x78>
8004334: 00820074 movhi r2,2049
8004338: 10bf4d04 addi r2,r2,-716
800433c: 10c00017 ldw r3,0(r2)
8004340: 00820074 movhi r2,2049
8004344: 10863004 addi r2,r2,6336
8004348: 31400115 stw r5,4(r6)
800434c: 38c7c83a sub r3,r7,r3
8004350: 10c00015 stw r3,0(r2)
8004354: 003fd306 br 80042a4 <_malloc_trim_r+0x78>
08004358 <_free_r>:
8004358: defffd04 addi sp,sp,-12
800435c: dc400115 stw r17,4(sp)
8004360: dc000015 stw r16,0(sp)
8004364: dfc00215 stw ra,8(sp)
8004368: 2821883a mov r16,r5
800436c: 2023883a mov r17,r4
8004370: 28005a26 beq r5,zero,80044dc <_free_r+0x184>
8004374: 800a44c0 call 800a44c <__malloc_lock>
8004378: 823ffe04 addi r8,r16,-8
800437c: 41400117 ldw r5,4(r8)
8004380: 00bfff84 movi r2,-2
8004384: 02820074 movhi r10,2049
8004388: 52b99204 addi r10,r10,-6584
800438c: 288e703a and r7,r5,r2
8004390: 41cd883a add r6,r8,r7
8004394: 30c00117 ldw r3,4(r6)
8004398: 51000217 ldw r4,8(r10)
800439c: 00bfff04 movi r2,-4
80043a0: 1892703a and r9,r3,r2
80043a4: 5017883a mov r11,r10
80043a8: 31006726 beq r6,r4,8004548 <_free_r+0x1f0>
80043ac: 2880004c andi r2,r5,1
80043b0: 1005003a cmpeq r2,r2,zero
80043b4: 32400115 stw r9,4(r6)
80043b8: 10001a1e bne r2,zero,8004424 <_free_r+0xcc>
80043bc: 000b883a mov r5,zero
80043c0: 3247883a add r3,r6,r9
80043c4: 18800117 ldw r2,4(r3)
80043c8: 1080004c andi r2,r2,1
80043cc: 1000231e bne r2,zero,800445c <_free_r+0x104>
80043d0: 280ac03a cmpne r5,r5,zero
80043d4: 3a4f883a add r7,r7,r9
80043d8: 2800451e bne r5,zero,80044f0 <_free_r+0x198>
80043dc: 31000217 ldw r4,8(r6)
80043e0: 00820074 movhi r2,2049
80043e4: 10b99404 addi r2,r2,-6576
80043e8: 20807b26 beq r4,r2,80045d8 <_free_r+0x280>
80043ec: 30800317 ldw r2,12(r6)
80043f0: 3a07883a add r3,r7,r8
80043f4: 19c00015 stw r7,0(r3)
80043f8: 11000215 stw r4,8(r2)
80043fc: 20800315 stw r2,12(r4)
8004400: 38800054 ori r2,r7,1
8004404: 40800115 stw r2,4(r8)
8004408: 28001a26 beq r5,zero,8004474 <_free_r+0x11c>
800440c: 8809883a mov r4,r17
8004410: dfc00217 ldw ra,8(sp)
8004414: dc400117 ldw r17,4(sp)
8004418: dc000017 ldw r16,0(sp)
800441c: dec00304 addi sp,sp,12
8004420: 800a46c1 jmpi 800a46c <__malloc_unlock>
8004424: 80bffe17 ldw r2,-8(r16)
8004428: 50c00204 addi r3,r10,8
800442c: 4091c83a sub r8,r8,r2
8004430: 41000217 ldw r4,8(r8)
8004434: 388f883a add r7,r7,r2
8004438: 20c06126 beq r4,r3,80045c0 <_free_r+0x268>
800443c: 40800317 ldw r2,12(r8)
8004440: 3247883a add r3,r6,r9
8004444: 000b883a mov r5,zero
8004448: 11000215 stw r4,8(r2)
800444c: 20800315 stw r2,12(r4)
8004450: 18800117 ldw r2,4(r3)
8004454: 1080004c andi r2,r2,1
8004458: 103fdd26 beq r2,zero,80043d0 <_free_r+0x78>
800445c: 38800054 ori r2,r7,1
8004460: 3a07883a add r3,r7,r8
8004464: 280ac03a cmpne r5,r5,zero
8004468: 40800115 stw r2,4(r8)
800446c: 19c00015 stw r7,0(r3)
8004470: 283fe61e bne r5,zero,800440c <_free_r+0xb4>
8004474: 00807fc4 movi r2,511
8004478: 11c01f2e bgeu r2,r7,80044f8 <_free_r+0x1a0>
800447c: 3806d27a srli r3,r7,9
8004480: 1800481e bne r3,zero,80045a4 <_free_r+0x24c>
8004484: 3804d0fa srli r2,r7,3
8004488: 100690fa slli r3,r2,3
800448c: 1acd883a add r6,r3,r11
8004490: 31400217 ldw r5,8(r6)
8004494: 31405926 beq r6,r5,80045fc <_free_r+0x2a4>
8004498: 28800117 ldw r2,4(r5)
800449c: 00ffff04 movi r3,-4
80044a0: 10c4703a and r2,r2,r3
80044a4: 3880022e bgeu r7,r2,80044b0 <_free_r+0x158>
80044a8: 29400217 ldw r5,8(r5)
80044ac: 317ffa1e bne r6,r5,8004498 <_free_r+0x140>
80044b0: 29800317 ldw r6,12(r5)
80044b4: 41800315 stw r6,12(r8)
80044b8: 41400215 stw r5,8(r8)
80044bc: 8809883a mov r4,r17
80044c0: 2a000315 stw r8,12(r5)
80044c4: 32000215 stw r8,8(r6)
80044c8: dfc00217 ldw ra,8(sp)
80044cc: dc400117 ldw r17,4(sp)
80044d0: dc000017 ldw r16,0(sp)
80044d4: dec00304 addi sp,sp,12
80044d8: 800a46c1 jmpi 800a46c <__malloc_unlock>
80044dc: dfc00217 ldw ra,8(sp)
80044e0: dc400117 ldw r17,4(sp)
80044e4: dc000017 ldw r16,0(sp)
80044e8: dec00304 addi sp,sp,12
80044ec: f800283a ret
80044f0: 31000217 ldw r4,8(r6)
80044f4: 003fbd06 br 80043ec <_free_r+0x94>
80044f8: 3806d0fa srli r3,r7,3
80044fc: 00800044 movi r2,1
8004500: 51400117 ldw r5,4(r10)
8004504: 180890fa slli r4,r3,3
8004508: 1807d0ba srai r3,r3,2
800450c: 22c9883a add r4,r4,r11
8004510: 21800217 ldw r6,8(r4)
8004514: 10c4983a sll r2,r2,r3
8004518: 41000315 stw r4,12(r8)
800451c: 41800215 stw r6,8(r8)
8004520: 288ab03a or r5,r5,r2
8004524: 22000215 stw r8,8(r4)
8004528: 8809883a mov r4,r17
800452c: 51400115 stw r5,4(r10)
8004530: 32000315 stw r8,12(r6)
8004534: dfc00217 ldw ra,8(sp)
8004538: dc400117 ldw r17,4(sp)
800453c: dc000017 ldw r16,0(sp)
8004540: dec00304 addi sp,sp,12
8004544: 800a46c1 jmpi 800a46c <__malloc_unlock>
8004548: 2880004c andi r2,r5,1
800454c: 3a4d883a add r6,r7,r9
8004550: 1000071e bne r2,zero,8004570 <_free_r+0x218>
8004554: 80bffe17 ldw r2,-8(r16)
8004558: 4091c83a sub r8,r8,r2
800455c: 41000317 ldw r4,12(r8)
8004560: 40c00217 ldw r3,8(r8)
8004564: 308d883a add r6,r6,r2
8004568: 20c00215 stw r3,8(r4)
800456c: 19000315 stw r4,12(r3)
8004570: 00820074 movhi r2,2049
8004574: 10bf4c04 addi r2,r2,-720
8004578: 11000017 ldw r4,0(r2)
800457c: 30c00054 ori r3,r6,1
8004580: 52000215 stw r8,8(r10)
8004584: 40c00115 stw r3,4(r8)
8004588: 313fa036 bltu r6,r4,800440c <_free_r+0xb4>
800458c: 00820074 movhi r2,2049
8004590: 10862604 addi r2,r2,6296
8004594: 11400017 ldw r5,0(r2)
8004598: 8809883a mov r4,r17
800459c: 800422c0 call 800422c <_malloc_trim_r>
80045a0: 003f9a06 br 800440c <_free_r+0xb4>
80045a4: 00800104 movi r2,4
80045a8: 10c0072e bgeu r2,r3,80045c8 <_free_r+0x270>
80045ac: 00800504 movi r2,20
80045b0: 10c01936 bltu r2,r3,8004618 <_free_r+0x2c0>
80045b4: 188016c4 addi r2,r3,91
80045b8: 100690fa slli r3,r2,3
80045bc: 003fb306 br 800448c <_free_r+0x134>
80045c0: 01400044 movi r5,1
80045c4: 003f7e06 br 80043c0 <_free_r+0x68>
80045c8: 3804d1ba srli r2,r7,6
80045cc: 10800e04 addi r2,r2,56
80045d0: 100690fa slli r3,r2,3
80045d4: 003fad06 br 800448c <_free_r+0x134>
80045d8: 22000315 stw r8,12(r4)
80045dc: 22000215 stw r8,8(r4)
80045e0: 3a05883a add r2,r7,r8
80045e4: 38c00054 ori r3,r7,1
80045e8: 11c00015 stw r7,0(r2)
80045ec: 41000215 stw r4,8(r8)
80045f0: 40c00115 stw r3,4(r8)
80045f4: 41000315 stw r4,12(r8)
80045f8: 003f8406 br 800440c <_free_r+0xb4>
80045fc: 1005d0ba srai r2,r2,2
8004600: 00c00044 movi r3,1
8004604: 51000117 ldw r4,4(r10)
8004608: 1886983a sll r3,r3,r2
800460c: 20c8b03a or r4,r4,r3
8004610: 51000115 stw r4,4(r10)
8004614: 003fa706 br 80044b4 <_free_r+0x15c>
8004618: 00801504 movi r2,84
800461c: 10c00436 bltu r2,r3,8004630 <_free_r+0x2d8>
8004620: 3804d33a srli r2,r7,12
8004624: 10801b84 addi r2,r2,110
8004628: 100690fa slli r3,r2,3
800462c: 003f9706 br 800448c <_free_r+0x134>
8004630: 00805504 movi r2,340
8004634: 10c00436 bltu r2,r3,8004648 <_free_r+0x2f0>
8004638: 3804d3fa srli r2,r7,15
800463c: 10801dc4 addi r2,r2,119
8004640: 100690fa slli r3,r2,3
8004644: 003f9106 br 800448c <_free_r+0x134>
8004648: 00815504 movi r2,1364
800464c: 10c0032e bgeu r2,r3,800465c <_free_r+0x304>
8004650: 00801f84 movi r2,126
8004654: 00c0fc04 movi r3,1008
8004658: 003f8c06 br 800448c <_free_r+0x134>
800465c: 3804d4ba srli r2,r7,18
8004660: 10801f04 addi r2,r2,124
8004664: 100690fa slli r3,r2,3
8004668: 003f8806 br 800448c <_free_r+0x134>
0800466c <__sfvwrite_r>:
800466c: 30800217 ldw r2,8(r6)
8004670: defff504 addi sp,sp,-44
8004674: df000915 stw fp,36(sp)
8004678: dd800715 stw r22,28(sp)
800467c: dc800315 stw r18,12(sp)
8004680: dfc00a15 stw ra,40(sp)
8004684: ddc00815 stw r23,32(sp)
8004688: dd400615 stw r21,24(sp)
800468c: dd000515 stw r20,20(sp)
8004690: dcc00415 stw r19,16(sp)
8004694: dc400215 stw r17,8(sp)
8004698: dc000115 stw r16,4(sp)
800469c: 302d883a mov r22,r6
80046a0: 2039883a mov fp,r4
80046a4: 2825883a mov r18,r5
80046a8: 10001c26 beq r2,zero,800471c <__sfvwrite_r+0xb0>
80046ac: 29c0030b ldhu r7,12(r5)
80046b0: 3880020c andi r2,r7,8
80046b4: 10002726 beq r2,zero,8004754 <__sfvwrite_r+0xe8>
80046b8: 28800417 ldw r2,16(r5)
80046bc: 10002526 beq r2,zero,8004754 <__sfvwrite_r+0xe8>
80046c0: 3880008c andi r2,r7,2
80046c4: b5400017 ldw r21,0(r22)
80046c8: 10002826 beq r2,zero,800476c <__sfvwrite_r+0x100>
80046cc: 0021883a mov r16,zero
80046d0: 0023883a mov r17,zero
80046d4: 880d883a mov r6,r17
80046d8: e009883a mov r4,fp
80046dc: 00810004 movi r2,1024
80046e0: 80006e26 beq r16,zero,800489c <__sfvwrite_r+0x230>
80046e4: 800f883a mov r7,r16
80046e8: 91400717 ldw r5,28(r18)
80046ec: 1400012e bgeu r2,r16,80046f4 <__sfvwrite_r+0x88>
80046f0: 100f883a mov r7,r2
80046f4: 90c00917 ldw r3,36(r18)
80046f8: 183ee83a callr r3
80046fc: 1007883a mov r3,r2
8004700: 80a1c83a sub r16,r16,r2
8004704: 88a3883a add r17,r17,r2
8004708: 00806d0e bge zero,r2,80048c0 <__sfvwrite_r+0x254>
800470c: b0800217 ldw r2,8(r22)
8004710: 10c5c83a sub r2,r2,r3
8004714: b0800215 stw r2,8(r22)
8004718: 103fee1e bne r2,zero,80046d4 <__sfvwrite_r+0x68>
800471c: 0009883a mov r4,zero
8004720: 2005883a mov r2,r4
8004724: dfc00a17 ldw ra,40(sp)
8004728: df000917 ldw fp,36(sp)
800472c: ddc00817 ldw r23,32(sp)
8004730: dd800717 ldw r22,28(sp)
8004734: dd400617 ldw r21,24(sp)
8004738: dd000517 ldw r20,20(sp)
800473c: dcc00417 ldw r19,16(sp)
8004740: dc800317 ldw r18,12(sp)
8004744: dc400217 ldw r17,8(sp)
8004748: dc000117 ldw r16,4(sp)
800474c: dec00b04 addi sp,sp,44
8004750: f800283a ret
8004754: 80023d40 call 80023d4 <__swsetup_r>
8004758: 1000e41e bne r2,zero,8004aec <__sfvwrite_r+0x480>
800475c: 91c0030b ldhu r7,12(r18)
8004760: b5400017 ldw r21,0(r22)
8004764: 3880008c andi r2,r7,2
8004768: 103fd81e bne r2,zero,80046cc <__sfvwrite_r+0x60>
800476c: 3880004c andi r2,r7,1
8004770: 1005003a cmpeq r2,r2,zero
8004774: 10005726 beq r2,zero,80048d4 <__sfvwrite_r+0x268>
8004778: 0029883a mov r20,zero
800477c: 002f883a mov r23,zero
8004780: a0004226 beq r20,zero,800488c <__sfvwrite_r+0x220>
8004784: 3880800c andi r2,r7,512
8004788: 94000217 ldw r16,8(r18)
800478c: 10008b26 beq r2,zero,80049bc <__sfvwrite_r+0x350>
8004790: 800d883a mov r6,r16
8004794: a400a536 bltu r20,r16,8004a2c <__sfvwrite_r+0x3c0>
8004798: 3881200c andi r2,r7,1152
800479c: 10002726 beq r2,zero,800483c <__sfvwrite_r+0x1d0>
80047a0: 90800517 ldw r2,20(r18)
80047a4: 92000417 ldw r8,16(r18)
80047a8: 91400017 ldw r5,0(r18)
80047ac: 1087883a add r3,r2,r2
80047b0: 1887883a add r3,r3,r2
80047b4: 1808d7fa srli r4,r3,31
80047b8: 2a21c83a sub r16,r5,r8
80047bc: 80800044 addi r2,r16,1
80047c0: 20c9883a add r4,r4,r3
80047c4: 2027d07a srai r19,r4,1
80047c8: a085883a add r2,r20,r2
80047cc: 980d883a mov r6,r19
80047d0: 9880022e bgeu r19,r2,80047dc <__sfvwrite_r+0x170>
80047d4: 1027883a mov r19,r2
80047d8: 100d883a mov r6,r2
80047dc: 3881000c andi r2,r7,1024
80047e0: 1000b826 beq r2,zero,8004ac4 <__sfvwrite_r+0x458>
80047e4: 300b883a mov r5,r6
80047e8: e009883a mov r4,fp
80047ec: 8004ee00 call 8004ee0 <_malloc_r>
80047f0: 10003126 beq r2,zero,80048b8 <__sfvwrite_r+0x24c>
80047f4: 91400417 ldw r5,16(r18)
80047f8: 1009883a mov r4,r2
80047fc: 800d883a mov r6,r16
8004800: 1023883a mov r17,r2
8004804: 80057040 call 8005704 <memcpy>
8004808: 90c0030b ldhu r3,12(r18)
800480c: 00beffc4 movi r2,-1025
8004810: 1886703a and r3,r3,r2
8004814: 18c02014 ori r3,r3,128
8004818: 90c0030d sth r3,12(r18)
800481c: 9c07c83a sub r3,r19,r16
8004820: 8c05883a add r2,r17,r16
8004824: a00d883a mov r6,r20
8004828: a021883a mov r16,r20
800482c: 90800015 stw r2,0(r18)
8004830: 90c00215 stw r3,8(r18)
8004834: 94400415 stw r17,16(r18)
8004838: 94c00515 stw r19,20(r18)
800483c: 91000017 ldw r4,0(r18)
8004840: b80b883a mov r5,r23
8004844: a023883a mov r17,r20
8004848: 80057a40 call 80057a4 <memmove>
800484c: 90c00217 ldw r3,8(r18)
8004850: 90800017 ldw r2,0(r18)
8004854: a027883a mov r19,r20
8004858: 1c07c83a sub r3,r3,r16
800485c: 1405883a add r2,r2,r16
8004860: 90c00215 stw r3,8(r18)
8004864: a021883a mov r16,r20
8004868: 90800015 stw r2,0(r18)
800486c: b0800217 ldw r2,8(r22)
8004870: 1405c83a sub r2,r2,r16
8004874: b0800215 stw r2,8(r22)
8004878: 103fa826 beq r2,zero,800471c <__sfvwrite_r+0xb0>
800487c: a469c83a sub r20,r20,r17
8004880: 91c0030b ldhu r7,12(r18)
8004884: bcef883a add r23,r23,r19
8004888: a03fbe1e bne r20,zero,8004784 <__sfvwrite_r+0x118>
800488c: adc00017 ldw r23,0(r21)
8004890: ad000117 ldw r20,4(r21)
8004894: ad400204 addi r21,r21,8
8004898: 003fb906 br 8004780 <__sfvwrite_r+0x114>
800489c: ac400017 ldw r17,0(r21)
80048a0: ac000117 ldw r16,4(r21)
80048a4: ad400204 addi r21,r21,8
80048a8: 003f8a06 br 80046d4 <__sfvwrite_r+0x68>
80048ac: 91400417 ldw r5,16(r18)
80048b0: e009883a mov r4,fp
80048b4: 80043580 call 8004358 <_free_r>
80048b8: 00800304 movi r2,12
80048bc: e0800015 stw r2,0(fp)
80048c0: 9080030b ldhu r2,12(r18)
80048c4: 013fffc4 movi r4,-1
80048c8: 10801014 ori r2,r2,64
80048cc: 9080030d sth r2,12(r18)
80048d0: 003f9306 br 8004720 <__sfvwrite_r+0xb4>
80048d4: 0027883a mov r19,zero
80048d8: 002f883a mov r23,zero
80048dc: d8000015 stw zero,0(sp)
80048e0: 0029883a mov r20,zero
80048e4: 98001e26 beq r19,zero,8004960 <__sfvwrite_r+0x2f4>
80048e8: d8c00017 ldw r3,0(sp)
80048ec: 1804c03a cmpne r2,r3,zero
80048f0: 10005e26 beq r2,zero,8004a6c <__sfvwrite_r+0x400>
80048f4: 9821883a mov r16,r19
80048f8: a4c0012e bgeu r20,r19,8004900 <__sfvwrite_r+0x294>
80048fc: a021883a mov r16,r20
8004900: 91000017 ldw r4,0(r18)
8004904: 90800417 ldw r2,16(r18)
8004908: 91800217 ldw r6,8(r18)
800490c: 91c00517 ldw r7,20(r18)
8004910: 1100022e bgeu r2,r4,800491c <__sfvwrite_r+0x2b0>
8004914: 31e3883a add r17,r6,r7
8004918: 8c001616 blt r17,r16,8004974 <__sfvwrite_r+0x308>
800491c: 81c03816 blt r16,r7,8004a00 <__sfvwrite_r+0x394>
8004920: 90c00917 ldw r3,36(r18)
8004924: 91400717 ldw r5,28(r18)
8004928: e009883a mov r4,fp
800492c: b80d883a mov r6,r23
8004930: 183ee83a callr r3
8004934: 1023883a mov r17,r2
8004938: 00bfe10e bge zero,r2,80048c0 <__sfvwrite_r+0x254>
800493c: a469c83a sub r20,r20,r17
8004940: a0001826 beq r20,zero,80049a4 <__sfvwrite_r+0x338>
8004944: b0800217 ldw r2,8(r22)
8004948: 1445c83a sub r2,r2,r17
800494c: b0800215 stw r2,8(r22)
8004950: 103f7226 beq r2,zero,800471c <__sfvwrite_r+0xb0>
8004954: 9c67c83a sub r19,r19,r17
8004958: bc6f883a add r23,r23,r17
800495c: 983fe21e bne r19,zero,80048e8 <__sfvwrite_r+0x27c>
8004960: adc00017 ldw r23,0(r21)
8004964: acc00117 ldw r19,4(r21)
8004968: ad400204 addi r21,r21,8
800496c: d8000015 stw zero,0(sp)
8004970: 003fdc06 br 80048e4 <__sfvwrite_r+0x278>
8004974: b80b883a mov r5,r23
8004978: 880d883a mov r6,r17
800497c: 80057a40 call 80057a4 <memmove>
8004980: 90c00017 ldw r3,0(r18)
8004984: e009883a mov r4,fp
8004988: 900b883a mov r5,r18
800498c: 1c47883a add r3,r3,r17
8004990: 90c00015 stw r3,0(r18)
8004994: 8003d080 call 8003d08 <_fflush_r>
8004998: 103fc91e bne r2,zero,80048c0 <__sfvwrite_r+0x254>
800499c: a469c83a sub r20,r20,r17
80049a0: a03fe81e bne r20,zero,8004944 <__sfvwrite_r+0x2d8>
80049a4: e009883a mov r4,fp
80049a8: 900b883a mov r5,r18
80049ac: 8003d080 call 8003d08 <_fflush_r>
80049b0: 103fc31e bne r2,zero,80048c0 <__sfvwrite_r+0x254>
80049b4: d8000015 stw zero,0(sp)
80049b8: 003fe206 br 8004944 <__sfvwrite_r+0x2d8>
80049bc: 91000017 ldw r4,0(r18)
80049c0: 90800417 ldw r2,16(r18)
80049c4: 1100022e bgeu r2,r4,80049d0 <__sfvwrite_r+0x364>
80049c8: 8023883a mov r17,r16
80049cc: 85003136 bltu r16,r20,8004a94 <__sfvwrite_r+0x428>
80049d0: 91c00517 ldw r7,20(r18)
80049d4: a1c01836 bltu r20,r7,8004a38 <__sfvwrite_r+0x3cc>
80049d8: 90c00917 ldw r3,36(r18)
80049dc: 91400717 ldw r5,28(r18)
80049e0: e009883a mov r4,fp
80049e4: b80d883a mov r6,r23
80049e8: 183ee83a callr r3
80049ec: 1021883a mov r16,r2
80049f0: 00bfb30e bge zero,r2,80048c0 <__sfvwrite_r+0x254>
80049f4: 1023883a mov r17,r2
80049f8: 1027883a mov r19,r2
80049fc: 003f9b06 br 800486c <__sfvwrite_r+0x200>
8004a00: b80b883a mov r5,r23
8004a04: 800d883a mov r6,r16
8004a08: 80057a40 call 80057a4 <memmove>
8004a0c: 90c00217 ldw r3,8(r18)
8004a10: 90800017 ldw r2,0(r18)
8004a14: 8023883a mov r17,r16
8004a18: 1c07c83a sub r3,r3,r16
8004a1c: 1405883a add r2,r2,r16
8004a20: 90c00215 stw r3,8(r18)
8004a24: 90800015 stw r2,0(r18)
8004a28: 003fc406 br 800493c <__sfvwrite_r+0x2d0>
8004a2c: a00d883a mov r6,r20
8004a30: a021883a mov r16,r20
8004a34: 003f8106 br 800483c <__sfvwrite_r+0x1d0>
8004a38: b80b883a mov r5,r23
8004a3c: a00d883a mov r6,r20
8004a40: 80057a40 call 80057a4 <memmove>
8004a44: 90c00217 ldw r3,8(r18)
8004a48: 90800017 ldw r2,0(r18)
8004a4c: a021883a mov r16,r20
8004a50: 1d07c83a sub r3,r3,r20
8004a54: 1505883a add r2,r2,r20
8004a58: a023883a mov r17,r20
8004a5c: a027883a mov r19,r20
8004a60: 90c00215 stw r3,8(r18)
8004a64: 90800015 stw r2,0(r18)
8004a68: 003f8006 br 800486c <__sfvwrite_r+0x200>
8004a6c: b809883a mov r4,r23
8004a70: 01400284 movi r5,10
8004a74: 980d883a mov r6,r19
8004a78: 80056200 call 8005620 <memchr>
8004a7c: 10001726 beq r2,zero,8004adc <__sfvwrite_r+0x470>
8004a80: 15c5c83a sub r2,r2,r23
8004a84: 15000044 addi r20,r2,1
8004a88: 00800044 movi r2,1
8004a8c: d8800015 stw r2,0(sp)
8004a90: 003f9806 br 80048f4 <__sfvwrite_r+0x288>
8004a94: b80b883a mov r5,r23
8004a98: 800d883a mov r6,r16
8004a9c: 80057a40 call 80057a4 <memmove>
8004aa0: 90c00017 ldw r3,0(r18)
8004aa4: e009883a mov r4,fp
8004aa8: 900b883a mov r5,r18
8004aac: 1c07883a add r3,r3,r16
8004ab0: 90c00015 stw r3,0(r18)
8004ab4: 8027883a mov r19,r16
8004ab8: 8003d080 call 8003d08 <_fflush_r>
8004abc: 103f6b26 beq r2,zero,800486c <__sfvwrite_r+0x200>
8004ac0: 003f7f06 br 80048c0 <__sfvwrite_r+0x254>
8004ac4: 400b883a mov r5,r8
8004ac8: e009883a mov r4,fp
8004acc: 80069a80 call 80069a8 <_realloc_r>
8004ad0: 103f7626 beq r2,zero,80048ac <__sfvwrite_r+0x240>
8004ad4: 1023883a mov r17,r2
8004ad8: 003f5006 br 800481c <__sfvwrite_r+0x1b0>
8004adc: 00c00044 movi r3,1
8004ae0: 9d000044 addi r20,r19,1
8004ae4: d8c00015 stw r3,0(sp)
8004ae8: 003f8206 br 80048f4 <__sfvwrite_r+0x288>
8004aec: 9080030b ldhu r2,12(r18)
8004af0: 00c00244 movi r3,9
8004af4: 013fffc4 movi r4,-1
8004af8: 10801014 ori r2,r2,64
8004afc: 9080030d sth r2,12(r18)
8004b00: e0c00015 stw r3,0(fp)
8004b04: 003f0606 br 8004720 <__sfvwrite_r+0xb4>
08004b08 <_fwalk_reent>:
8004b08: defff704 addi sp,sp,-36
8004b0c: dcc00315 stw r19,12(sp)
8004b10: 24c0b804 addi r19,r4,736
8004b14: dd800615 stw r22,24(sp)
8004b18: dd400515 stw r21,20(sp)
8004b1c: dfc00815 stw ra,32(sp)
8004b20: ddc00715 stw r23,28(sp)
8004b24: dd000415 stw r20,16(sp)
8004b28: dc800215 stw r18,8(sp)
8004b2c: dc400115 stw r17,4(sp)
8004b30: dc000015 stw r16,0(sp)
8004b34: 202b883a mov r21,r4
8004b38: 282d883a mov r22,r5
8004b3c: 8003f900 call 8003f90 <__sfp_lock_acquire>
8004b40: 98002126 beq r19,zero,8004bc8 <_fwalk_reent+0xc0>
8004b44: 002f883a mov r23,zero
8004b48: 9c800117 ldw r18,4(r19)
8004b4c: 9c000217 ldw r16,8(r19)
8004b50: 90bfffc4 addi r2,r18,-1
8004b54: 10000d16 blt r2,zero,8004b8c <_fwalk_reent+0x84>
8004b58: 0023883a mov r17,zero
8004b5c: 053fffc4 movi r20,-1
8004b60: 8080030f ldh r2,12(r16)
8004b64: 8c400044 addi r17,r17,1
8004b68: 10000626 beq r2,zero,8004b84 <_fwalk_reent+0x7c>
8004b6c: 8080038f ldh r2,14(r16)
8004b70: 800b883a mov r5,r16
8004b74: a809883a mov r4,r21
8004b78: 15000226 beq r2,r20,8004b84 <_fwalk_reent+0x7c>
8004b7c: b03ee83a callr r22
8004b80: b8aeb03a or r23,r23,r2
8004b84: 84001704 addi r16,r16,92
8004b88: 947ff51e bne r18,r17,8004b60 <_fwalk_reent+0x58>
8004b8c: 9cc00017 ldw r19,0(r19)
8004b90: 983fed1e bne r19,zero,8004b48 <_fwalk_reent+0x40>
8004b94: 8003f940 call 8003f94 <__sfp_lock_release>
8004b98: b805883a mov r2,r23
8004b9c: dfc00817 ldw ra,32(sp)
8004ba0: ddc00717 ldw r23,28(sp)
8004ba4: dd800617 ldw r22,24(sp)
8004ba8: dd400517 ldw r21,20(sp)
8004bac: dd000417 ldw r20,16(sp)
8004bb0: dcc00317 ldw r19,12(sp)
8004bb4: dc800217 ldw r18,8(sp)
8004bb8: dc400117 ldw r17,4(sp)
8004bbc: dc000017 ldw r16,0(sp)
8004bc0: dec00904 addi sp,sp,36
8004bc4: f800283a ret
8004bc8: 002f883a mov r23,zero
8004bcc: 003ff106 br 8004b94 <_fwalk_reent+0x8c>
08004bd0 <_fwalk>:
8004bd0: defff804 addi sp,sp,-32
8004bd4: dcc00315 stw r19,12(sp)
8004bd8: 24c0b804 addi r19,r4,736
8004bdc: dd400515 stw r21,20(sp)
8004be0: dfc00715 stw ra,28(sp)
8004be4: dd800615 stw r22,24(sp)
8004be8: dd000415 stw r20,16(sp)
8004bec: dc800215 stw r18,8(sp)
8004bf0: dc400115 stw r17,4(sp)
8004bf4: dc000015 stw r16,0(sp)
8004bf8: 282b883a mov r21,r5
8004bfc: 8003f900 call 8003f90 <__sfp_lock_acquire>
8004c00: 98001f26 beq r19,zero,8004c80 <_fwalk+0xb0>
8004c04: 002d883a mov r22,zero
8004c08: 9c800117 ldw r18,4(r19)
8004c0c: 9c000217 ldw r16,8(r19)
8004c10: 90bfffc4 addi r2,r18,-1
8004c14: 10000c16 blt r2,zero,8004c48 <_fwalk+0x78>
8004c18: 0023883a mov r17,zero
8004c1c: 053fffc4 movi r20,-1
8004c20: 8080030f ldh r2,12(r16)
8004c24: 8c400044 addi r17,r17,1
8004c28: 10000526 beq r2,zero,8004c40 <_fwalk+0x70>
8004c2c: 8080038f ldh r2,14(r16)
8004c30: 8009883a mov r4,r16
8004c34: 15000226 beq r2,r20,8004c40 <_fwalk+0x70>
8004c38: a83ee83a callr r21
8004c3c: b0acb03a or r22,r22,r2
8004c40: 84001704 addi r16,r16,92
8004c44: 947ff61e bne r18,r17,8004c20 <_fwalk+0x50>
8004c48: 9cc00017 ldw r19,0(r19)
8004c4c: 983fee1e bne r19,zero,8004c08 <_fwalk+0x38>
8004c50: 8003f940 call 8003f94 <__sfp_lock_release>
8004c54: b005883a mov r2,r22
8004c58: dfc00717 ldw ra,28(sp)
8004c5c: dd800617 ldw r22,24(sp)
8004c60: dd400517 ldw r21,20(sp)
8004c64: dd000417 ldw r20,16(sp)
8004c68: dcc00317 ldw r19,12(sp)
8004c6c: dc800217 ldw r18,8(sp)
8004c70: dc400117 ldw r17,4(sp)
8004c74: dc000017 ldw r16,0(sp)
8004c78: dec00804 addi sp,sp,32
8004c7c: f800283a ret
8004c80: 002d883a mov r22,zero
8004c84: 003ff206 br 8004c50 <_fwalk+0x80>
08004c88 <__locale_charset>:
8004c88: d0a00317 ldw r2,-32756(gp)
8004c8c: f800283a ret
08004c90 <_localeconv_r>:
8004c90: 00820074 movhi r2,2049
8004c94: 10b7c904 addi r2,r2,-8412
8004c98: f800283a ret
08004c9c <localeconv>:
8004c9c: 00820074 movhi r2,2049
8004ca0: 10bf4804 addi r2,r2,-736
8004ca4: 11000017 ldw r4,0(r2)
8004ca8: 8004c901 jmpi 8004c90 <_localeconv_r>
08004cac <_setlocale_r>:
8004cac: defffc04 addi sp,sp,-16
8004cb0: 00c20074 movhi r3,2049
8004cb4: 18f7c404 addi r3,r3,-8432
8004cb8: dc800215 stw r18,8(sp)
8004cbc: dc400115 stw r17,4(sp)
8004cc0: dc000015 stw r16,0(sp)
8004cc4: 2023883a mov r17,r4
8004cc8: 2825883a mov r18,r5
8004ccc: dfc00315 stw ra,12(sp)
8004cd0: 3021883a mov r16,r6
8004cd4: 3009883a mov r4,r6
8004cd8: 180b883a mov r5,r3
8004cdc: 30000926 beq r6,zero,8004d04 <_setlocale_r+0x58>
8004ce0: 80071c80 call 80071c8 <strcmp>
8004ce4: 8009883a mov r4,r16
8004ce8: 01420074 movhi r5,2049
8004cec: 2977af04 addi r5,r5,-8516
8004cf0: 10000b1e bne r2,zero,8004d20 <_setlocale_r+0x74>
8004cf4: 8c000d15 stw r16,52(r17)
8004cf8: 8c800c15 stw r18,48(r17)
8004cfc: 00c20074 movhi r3,2049
8004d00: 18f7c404 addi r3,r3,-8432
8004d04: 1805883a mov r2,r3
8004d08: dfc00317 ldw ra,12(sp)
8004d0c: dc800217 ldw r18,8(sp)
8004d10: dc400117 ldw r17,4(sp)
8004d14: dc000017 ldw r16,0(sp)
8004d18: dec00404 addi sp,sp,16
8004d1c: f800283a ret
8004d20: 80071c80 call 80071c8 <strcmp>
8004d24: 0007883a mov r3,zero
8004d28: 103ff226 beq r2,zero,8004cf4 <_setlocale_r+0x48>
8004d2c: 003ff506 br 8004d04 <_setlocale_r+0x58>
08004d30 <setlocale>:
8004d30: 01820074 movhi r6,2049
8004d34: 31bf4804 addi r6,r6,-736
8004d38: 2007883a mov r3,r4
8004d3c: 31000017 ldw r4,0(r6)
8004d40: 280d883a mov r6,r5
8004d44: 180b883a mov r5,r3
8004d48: 8004cac1 jmpi 8004cac <_setlocale_r>
08004d4c <__smakebuf_r>:
8004d4c: 2880030b ldhu r2,12(r5)
8004d50: deffed04 addi sp,sp,-76
8004d54: dc401015 stw r17,64(sp)
8004d58: 1080008c andi r2,r2,2
8004d5c: dc000f15 stw r16,60(sp)
8004d60: dfc01215 stw ra,72(sp)
8004d64: dc801115 stw r18,68(sp)
8004d68: 2821883a mov r16,r5
8004d6c: 2023883a mov r17,r4
8004d70: 10000b26 beq r2,zero,8004da0 <__smakebuf_r+0x54>
8004d74: 28c010c4 addi r3,r5,67
8004d78: 00800044 movi r2,1
8004d7c: 28800515 stw r2,20(r5)
8004d80: 28c00415 stw r3,16(r5)
8004d84: 28c00015 stw r3,0(r5)
8004d88: dfc01217 ldw ra,72(sp)
8004d8c: dc801117 ldw r18,68(sp)
8004d90: dc401017 ldw r17,64(sp)
8004d94: dc000f17 ldw r16,60(sp)
8004d98: dec01304 addi sp,sp,76
8004d9c: f800283a ret
8004da0: 2940038f ldh r5,14(r5)
8004da4: 28002116 blt r5,zero,8004e2c <__smakebuf_r+0xe0>
8004da8: d80d883a mov r6,sp
8004dac: 80075cc0 call 80075cc <_fstat_r>
8004db0: 10001e16 blt r2,zero,8004e2c <__smakebuf_r+0xe0>
8004db4: d8800117 ldw r2,4(sp)
8004db8: 00e00014 movui r3,32768
8004dbc: 113c000c andi r4,r2,61440
8004dc0: 20c03126 beq r4,r3,8004e88 <__smakebuf_r+0x13c>
8004dc4: 8080030b ldhu r2,12(r16)
8004dc8: 00c80004 movi r3,8192
8004dcc: 10820014 ori r2,r2,2048
8004dd0: 8080030d sth r2,12(r16)
8004dd4: 20c01e26 beq r4,r3,8004e50 <__smakebuf_r+0x104>
8004dd8: 04810004 movi r18,1024
8004ddc: 8809883a mov r4,r17
8004de0: 900b883a mov r5,r18
8004de4: 8004ee00 call 8004ee0 <_malloc_r>
8004de8: 1009883a mov r4,r2
8004dec: 10003126 beq r2,zero,8004eb4 <__smakebuf_r+0x168>
8004df0: 80c0030b ldhu r3,12(r16)
8004df4: 00820034 movhi r2,2048
8004df8: 10902104 addi r2,r2,16516
8004dfc: 88800f15 stw r2,60(r17)
8004e00: 18c02014 ori r3,r3,128
8004e04: 84800515 stw r18,20(r16)
8004e08: 80c0030d sth r3,12(r16)
8004e0c: 81000415 stw r4,16(r16)
8004e10: 81000015 stw r4,0(r16)
8004e14: dfc01217 ldw ra,72(sp)
8004e18: dc801117 ldw r18,68(sp)
8004e1c: dc401017 ldw r17,64(sp)
8004e20: dc000f17 ldw r16,60(sp)
8004e24: dec01304 addi sp,sp,76
8004e28: f800283a ret
8004e2c: 80c0030b ldhu r3,12(r16)
8004e30: 1880200c andi r2,r3,128
8004e34: 10000426 beq r2,zero,8004e48 <__smakebuf_r+0xfc>
8004e38: 04801004 movi r18,64
8004e3c: 18820014 ori r2,r3,2048
8004e40: 8080030d sth r2,12(r16)
8004e44: 003fe506 br 8004ddc <__smakebuf_r+0x90>
8004e48: 04810004 movi r18,1024
8004e4c: 003ffb06 br 8004e3c <__smakebuf_r+0xf0>
8004e50: 8140038f ldh r5,14(r16)
8004e54: 8809883a mov r4,r17
8004e58: 80076400 call 8007640 <_isatty_r>
8004e5c: 103fde26 beq r2,zero,8004dd8 <__smakebuf_r+0x8c>
8004e60: 8080030b ldhu r2,12(r16)
8004e64: 80c010c4 addi r3,r16,67
8004e68: 04810004 movi r18,1024
8004e6c: 10800054 ori r2,r2,1
8004e70: 8080030d sth r2,12(r16)
8004e74: 00800044 movi r2,1
8004e78: 80c00415 stw r3,16(r16)
8004e7c: 80800515 stw r2,20(r16)
8004e80: 80c00015 stw r3,0(r16)
8004e84: 003fd506 br 8004ddc <__smakebuf_r+0x90>
8004e88: 80c00a17 ldw r3,40(r16)
8004e8c: 00820034 movhi r2,2048
8004e90: 109c2104 addi r2,r2,28804
8004e94: 18bfcb1e bne r3,r2,8004dc4 <__smakebuf_r+0x78>
8004e98: 8080030b ldhu r2,12(r16)
8004e9c: 00c10004 movi r3,1024
8004ea0: 1825883a mov r18,r3
8004ea4: 10c4b03a or r2,r2,r3
8004ea8: 8080030d sth r2,12(r16)
8004eac: 80c01315 stw r3,76(r16)
8004eb0: 003fca06 br 8004ddc <__smakebuf_r+0x90>
8004eb4: 8100030b ldhu r4,12(r16)
8004eb8: 2080800c andi r2,r4,512
8004ebc: 103fb21e bne r2,zero,8004d88 <__smakebuf_r+0x3c>
8004ec0: 80c010c4 addi r3,r16,67
8004ec4: 21000094 ori r4,r4,2
8004ec8: 00800044 movi r2,1
8004ecc: 80800515 stw r2,20(r16)
8004ed0: 8100030d sth r4,12(r16)
8004ed4: 80c00415 stw r3,16(r16)
8004ed8: 80c00015 stw r3,0(r16)
8004edc: 003faa06 br 8004d88 <__smakebuf_r+0x3c>
08004ee0 <_malloc_r>:
8004ee0: defff604 addi sp,sp,-40
8004ee4: 28c002c4 addi r3,r5,11
8004ee8: 00800584 movi r2,22
8004eec: dc800215 stw r18,8(sp)
8004ef0: dfc00915 stw ra,36(sp)
8004ef4: df000815 stw fp,32(sp)
8004ef8: ddc00715 stw r23,28(sp)
8004efc: dd800615 stw r22,24(sp)
8004f00: dd400515 stw r21,20(sp)
8004f04: dd000415 stw r20,16(sp)
8004f08: dcc00315 stw r19,12(sp)
8004f0c: dc400115 stw r17,4(sp)
8004f10: dc000015 stw r16,0(sp)
8004f14: 2025883a mov r18,r4
8004f18: 10c01236 bltu r2,r3,8004f64 <_malloc_r+0x84>
8004f1c: 04400404 movi r17,16
8004f20: 8940142e bgeu r17,r5,8004f74 <_malloc_r+0x94>
8004f24: 00800304 movi r2,12
8004f28: 0007883a mov r3,zero
8004f2c: 90800015 stw r2,0(r18)
8004f30: 1805883a mov r2,r3
8004f34: dfc00917 ldw ra,36(sp)
8004f38: df000817 ldw fp,32(sp)
8004f3c: ddc00717 ldw r23,28(sp)
8004f40: dd800617 ldw r22,24(sp)
8004f44: dd400517 ldw r21,20(sp)
8004f48: dd000417 ldw r20,16(sp)
8004f4c: dcc00317 ldw r19,12(sp)
8004f50: dc800217 ldw r18,8(sp)
8004f54: dc400117 ldw r17,4(sp)
8004f58: dc000017 ldw r16,0(sp)
8004f5c: dec00a04 addi sp,sp,40
8004f60: f800283a ret
8004f64: 00bffe04 movi r2,-8
8004f68: 18a2703a and r17,r3,r2
8004f6c: 883fed16 blt r17,zero,8004f24 <_malloc_r+0x44>
8004f70: 897fec36 bltu r17,r5,8004f24 <_malloc_r+0x44>
8004f74: 9009883a mov r4,r18
8004f78: 800a44c0 call 800a44c <__malloc_lock>
8004f7c: 00807dc4 movi r2,503
8004f80: 14402b2e bgeu r2,r17,8005030 <_malloc_r+0x150>
8004f84: 8806d27a srli r3,r17,9
8004f88: 18003f1e bne r3,zero,8005088 <_malloc_r+0x1a8>
8004f8c: 880cd0fa srli r6,r17,3
8004f90: 300490fa slli r2,r6,3
8004f94: 02c20074 movhi r11,2049
8004f98: 5af99204 addi r11,r11,-6584
8004f9c: 12cb883a add r5,r2,r11
8004fa0: 2c000317 ldw r16,12(r5)
8004fa4: 580f883a mov r7,r11
8004fa8: 2c00041e bne r5,r16,8004fbc <_malloc_r+0xdc>
8004fac: 00000a06 br 8004fd8 <_malloc_r+0xf8>
8004fb0: 1800860e bge r3,zero,80051cc <_malloc_r+0x2ec>
8004fb4: 84000317 ldw r16,12(r16)
8004fb8: 2c000726 beq r5,r16,8004fd8 <_malloc_r+0xf8>
8004fbc: 80800117 ldw r2,4(r16)
8004fc0: 00ffff04 movi r3,-4
8004fc4: 10c8703a and r4,r2,r3
8004fc8: 2447c83a sub r3,r4,r17
8004fcc: 008003c4 movi r2,15
8004fd0: 10fff70e bge r2,r3,8004fb0 <_malloc_r+0xd0>
8004fd4: 31bfffc4 addi r6,r6,-1
8004fd8: 32400044 addi r9,r6,1
8004fdc: 02820074 movhi r10,2049
8004fe0: 52b99404 addi r10,r10,-6576
8004fe4: 54000217 ldw r16,8(r10)
8004fe8: 8280a026 beq r16,r10,800526c <_malloc_r+0x38c>
8004fec: 80800117 ldw r2,4(r16)
8004ff0: 00ffff04 movi r3,-4
8004ff4: 10ca703a and r5,r2,r3
8004ff8: 2c4dc83a sub r6,r5,r17
8004ffc: 008003c4 movi r2,15
8005000: 11808316 blt r2,r6,8005210 <_malloc_r+0x330>
8005004: 52800315 stw r10,12(r10)
8005008: 52800215 stw r10,8(r10)
800500c: 30002916 blt r6,zero,80050b4 <_malloc_r+0x1d4>
8005010: 8147883a add r3,r16,r5
8005014: 18800117 ldw r2,4(r3)
8005018: 9009883a mov r4,r18
800501c: 10800054 ori r2,r2,1
8005020: 18800115 stw r2,4(r3)
8005024: 800a46c0 call 800a46c <__malloc_unlock>
8005028: 80c00204 addi r3,r16,8
800502c: 003fc006 br 8004f30 <_malloc_r+0x50>
8005030: 02c20074 movhi r11,2049
8005034: 5af99204 addi r11,r11,-6584
8005038: 8ac5883a add r2,r17,r11
800503c: 14000317 ldw r16,12(r2)
8005040: 580f883a mov r7,r11
8005044: 8806d0fa srli r3,r17,3
8005048: 14006c26 beq r2,r16,80051fc <_malloc_r+0x31c>
800504c: 80c00117 ldw r3,4(r16)
8005050: 00bfff04 movi r2,-4
8005054: 81800317 ldw r6,12(r16)
8005058: 1886703a and r3,r3,r2
800505c: 80c7883a add r3,r16,r3
8005060: 18800117 ldw r2,4(r3)
8005064: 81400217 ldw r5,8(r16)
8005068: 9009883a mov r4,r18
800506c: 10800054 ori r2,r2,1
8005070: 18800115 stw r2,4(r3)
8005074: 31400215 stw r5,8(r6)
8005078: 29800315 stw r6,12(r5)
800507c: 800a46c0 call 800a46c <__malloc_unlock>
8005080: 80c00204 addi r3,r16,8
8005084: 003faa06 br 8004f30 <_malloc_r+0x50>
8005088: 00800104 movi r2,4
800508c: 10c0052e bgeu r2,r3,80050a4 <_malloc_r+0x1c4>
8005090: 00800504 movi r2,20
8005094: 10c07836 bltu r2,r3,8005278 <_malloc_r+0x398>
8005098: 198016c4 addi r6,r3,91
800509c: 300490fa slli r2,r6,3
80050a0: 003fbc06 br 8004f94 <_malloc_r+0xb4>
80050a4: 8804d1ba srli r2,r17,6
80050a8: 11800e04 addi r6,r2,56
80050ac: 300490fa slli r2,r6,3
80050b0: 003fb806 br 8004f94 <_malloc_r+0xb4>
80050b4: 00807fc4 movi r2,511
80050b8: 1140bb36 bltu r2,r5,80053a8 <_malloc_r+0x4c8>
80050bc: 2806d0fa srli r3,r5,3
80050c0: 573ffe04 addi fp,r10,-8
80050c4: 00800044 movi r2,1
80050c8: 180890fa slli r4,r3,3
80050cc: 1807d0ba srai r3,r3,2
80050d0: e1c00117 ldw r7,4(fp)
80050d4: 5909883a add r4,r11,r4
80050d8: 21400217 ldw r5,8(r4)
80050dc: 10c4983a sll r2,r2,r3
80050e0: 81000315 stw r4,12(r16)
80050e4: 81400215 stw r5,8(r16)
80050e8: 388eb03a or r7,r7,r2
80050ec: 2c000315 stw r16,12(r5)
80050f0: 24000215 stw r16,8(r4)
80050f4: e1c00115 stw r7,4(fp)
80050f8: 4807883a mov r3,r9
80050fc: 4800cd16 blt r9,zero,8005434 <_malloc_r+0x554>
8005100: 1807d0ba srai r3,r3,2
8005104: 00800044 movi r2,1
8005108: 10c8983a sll r4,r2,r3
800510c: 39004436 bltu r7,r4,8005220 <_malloc_r+0x340>
8005110: 21c4703a and r2,r4,r7
8005114: 10000a1e bne r2,zero,8005140 <_malloc_r+0x260>
8005118: 2109883a add r4,r4,r4
800511c: 00bfff04 movi r2,-4
8005120: 4884703a and r2,r9,r2
8005124: 3906703a and r3,r7,r4
8005128: 12400104 addi r9,r2,4
800512c: 1800041e bne r3,zero,8005140 <_malloc_r+0x260>
8005130: 2109883a add r4,r4,r4
8005134: 3904703a and r2,r7,r4
8005138: 4a400104 addi r9,r9,4
800513c: 103ffc26 beq r2,zero,8005130 <_malloc_r+0x250>
8005140: 480490fa slli r2,r9,3
8005144: 4819883a mov r12,r9
8005148: 023fff04 movi r8,-4
800514c: 589b883a add r13,r11,r2
8005150: 6807883a mov r3,r13
8005154: 014003c4 movi r5,15
8005158: 1c000317 ldw r16,12(r3)
800515c: 1c00041e bne r3,r16,8005170 <_malloc_r+0x290>
8005160: 0000a706 br 8005400 <_malloc_r+0x520>
8005164: 3000ab0e bge r6,zero,8005414 <_malloc_r+0x534>
8005168: 84000317 ldw r16,12(r16)
800516c: 1c00a426 beq r3,r16,8005400 <_malloc_r+0x520>
8005170: 80800117 ldw r2,4(r16)
8005174: 1204703a and r2,r2,r8
8005178: 144dc83a sub r6,r2,r17
800517c: 29bff90e bge r5,r6,8005164 <_malloc_r+0x284>
8005180: 81000317 ldw r4,12(r16)
8005184: 80c00217 ldw r3,8(r16)
8005188: 89400054 ori r5,r17,1
800518c: 8445883a add r2,r16,r17
8005190: 20c00215 stw r3,8(r4)
8005194: 19000315 stw r4,12(r3)
8005198: 81400115 stw r5,4(r16)
800519c: 1187883a add r3,r2,r6
80051a0: 31000054 ori r4,r6,1
80051a4: 50800315 stw r2,12(r10)
80051a8: 50800215 stw r2,8(r10)
80051ac: 19800015 stw r6,0(r3)
80051b0: 11000115 stw r4,4(r2)
80051b4: 12800215 stw r10,8(r2)
80051b8: 12800315 stw r10,12(r2)
80051bc: 9009883a mov r4,r18
80051c0: 800a46c0 call 800a46c <__malloc_unlock>
80051c4: 80c00204 addi r3,r16,8
80051c8: 003f5906 br 8004f30 <_malloc_r+0x50>
80051cc: 8109883a add r4,r16,r4
80051d0: 20800117 ldw r2,4(r4)
80051d4: 80c00217 ldw r3,8(r16)
80051d8: 81400317 ldw r5,12(r16)
80051dc: 10800054 ori r2,r2,1
80051e0: 20800115 stw r2,4(r4)
80051e4: 28c00215 stw r3,8(r5)
80051e8: 19400315 stw r5,12(r3)
80051ec: 9009883a mov r4,r18
80051f0: 800a46c0 call 800a46c <__malloc_unlock>
80051f4: 80c00204 addi r3,r16,8
80051f8: 003f4d06 br 8004f30 <_malloc_r+0x50>
80051fc: 80800204 addi r2,r16,8
8005200: 14000317 ldw r16,12(r2)
8005204: 143f911e bne r2,r16,800504c <_malloc_r+0x16c>
8005208: 1a400084 addi r9,r3,2
800520c: 003f7306 br 8004fdc <_malloc_r+0xfc>
8005210: 88c00054 ori r3,r17,1
8005214: 8445883a add r2,r16,r17
8005218: 80c00115 stw r3,4(r16)
800521c: 003fdf06 br 800519c <_malloc_r+0x2bc>
8005220: e4000217 ldw r16,8(fp)
8005224: 00bfff04 movi r2,-4
8005228: 80c00117 ldw r3,4(r16)
800522c: 802d883a mov r22,r16
8005230: 18aa703a and r21,r3,r2
8005234: ac401636 bltu r21,r17,8005290 <_malloc_r+0x3b0>
8005238: ac49c83a sub r4,r21,r17
800523c: 008003c4 movi r2,15
8005240: 1100130e bge r2,r4,8005290 <_malloc_r+0x3b0>
8005244: 88800054 ori r2,r17,1
8005248: 8447883a add r3,r16,r17
800524c: 80800115 stw r2,4(r16)
8005250: 20800054 ori r2,r4,1
8005254: 18800115 stw r2,4(r3)
8005258: e0c00215 stw r3,8(fp)
800525c: 9009883a mov r4,r18
8005260: 800a46c0 call 800a46c <__malloc_unlock>
8005264: 80c00204 addi r3,r16,8
8005268: 003f3106 br 8004f30 <_malloc_r+0x50>
800526c: 39c00117 ldw r7,4(r7)
8005270: 573ffe04 addi fp,r10,-8
8005274: 003fa006 br 80050f8 <_malloc_r+0x218>
8005278: 00801504 movi r2,84
800527c: 10c06736 bltu r2,r3,800541c <_malloc_r+0x53c>
8005280: 8804d33a srli r2,r17,12
8005284: 11801b84 addi r6,r2,110
8005288: 300490fa slli r2,r6,3
800528c: 003f4106 br 8004f94 <_malloc_r+0xb4>
8005290: d0a6de17 ldw r2,-25736(gp)
8005294: d0e00517 ldw r3,-32748(gp)
8005298: 053fffc4 movi r20,-1
800529c: 10800404 addi r2,r2,16
80052a0: 88a7883a add r19,r17,r2
80052a4: 1d000326 beq r3,r20,80052b4 <_malloc_r+0x3d4>
80052a8: 98c3ffc4 addi r3,r19,4095
80052ac: 00bc0004 movi r2,-4096
80052b0: 18a6703a and r19,r3,r2
80052b4: 9009883a mov r4,r18
80052b8: 980b883a mov r5,r19
80052bc: 800700c0 call 800700c <_sbrk_r>
80052c0: 1009883a mov r4,r2
80052c4: 15000426 beq r2,r20,80052d8 <_malloc_r+0x3f8>
80052c8: 854b883a add r5,r16,r21
80052cc: 1029883a mov r20,r2
80052d0: 11405a2e bgeu r2,r5,800543c <_malloc_r+0x55c>
80052d4: 87000c26 beq r16,fp,8005308 <_malloc_r+0x428>
80052d8: e4000217 ldw r16,8(fp)
80052dc: 80c00117 ldw r3,4(r16)
80052e0: 00bfff04 movi r2,-4
80052e4: 1884703a and r2,r3,r2
80052e8: 14400336 bltu r2,r17,80052f8 <_malloc_r+0x418>
80052ec: 1449c83a sub r4,r2,r17
80052f0: 008003c4 movi r2,15
80052f4: 113fd316 blt r2,r4,8005244 <_malloc_r+0x364>
80052f8: 9009883a mov r4,r18
80052fc: 800a46c0 call 800a46c <__malloc_unlock>
8005300: 0007883a mov r3,zero
8005304: 003f0a06 br 8004f30 <_malloc_r+0x50>
8005308: 05c20074 movhi r23,2049
800530c: bdc63004 addi r23,r23,6336
8005310: b8800017 ldw r2,0(r23)
8005314: 988d883a add r6,r19,r2
8005318: b9800015 stw r6,0(r23)
800531c: d0e00517 ldw r3,-32748(gp)
8005320: 00bfffc4 movi r2,-1
8005324: 18808e26 beq r3,r2,8005560 <_malloc_r+0x680>
8005328: 2145c83a sub r2,r4,r5
800532c: 3085883a add r2,r6,r2
8005330: b8800015 stw r2,0(r23)
8005334: 20c001cc andi r3,r4,7
8005338: 18005f1e bne r3,zero,80054b8 <_malloc_r+0x5d8>
800533c: 000b883a mov r5,zero
8005340: a4c5883a add r2,r20,r19
8005344: 1083ffcc andi r2,r2,4095
8005348: 00c40004 movi r3,4096
800534c: 1887c83a sub r3,r3,r2
8005350: 28e7883a add r19,r5,r3
8005354: 9009883a mov r4,r18
8005358: 980b883a mov r5,r19
800535c: 800700c0 call 800700c <_sbrk_r>
8005360: 1007883a mov r3,r2
8005364: 00bfffc4 movi r2,-1
8005368: 18807a26 beq r3,r2,8005554 <_malloc_r+0x674>
800536c: 1d05c83a sub r2,r3,r20
8005370: 9885883a add r2,r19,r2
8005374: 10c00054 ori r3,r2,1
8005378: b8800017 ldw r2,0(r23)
800537c: a021883a mov r16,r20
8005380: a0c00115 stw r3,4(r20)
8005384: 9885883a add r2,r19,r2
8005388: b8800015 stw r2,0(r23)
800538c: e5000215 stw r20,8(fp)
8005390: b7003626 beq r22,fp,800546c <_malloc_r+0x58c>
8005394: 018003c4 movi r6,15
8005398: 35404b36 bltu r6,r21,80054c8 <_malloc_r+0x5e8>
800539c: 00800044 movi r2,1
80053a0: a0800115 stw r2,4(r20)
80053a4: 003fcd06 br 80052dc <_malloc_r+0x3fc>
80053a8: 2808d27a srli r4,r5,9
80053ac: 2000371e bne r4,zero,800548c <_malloc_r+0x5ac>
80053b0: 2808d0fa srli r4,r5,3
80053b4: 200690fa slli r3,r4,3
80053b8: 1ad1883a add r8,r3,r11
80053bc: 41800217 ldw r6,8(r8)
80053c0: 41805b26 beq r8,r6,8005530 <_malloc_r+0x650>
80053c4: 30800117 ldw r2,4(r6)
80053c8: 00ffff04 movi r3,-4
80053cc: 10c4703a and r2,r2,r3
80053d0: 2880022e bgeu r5,r2,80053dc <_malloc_r+0x4fc>
80053d4: 31800217 ldw r6,8(r6)
80053d8: 41bffa1e bne r8,r6,80053c4 <_malloc_r+0x4e4>
80053dc: 32000317 ldw r8,12(r6)
80053e0: 39c00117 ldw r7,4(r7)
80053e4: 82000315 stw r8,12(r16)
80053e8: 81800215 stw r6,8(r16)
80053ec: 07020074 movhi fp,2049
80053f0: e7399204 addi fp,fp,-6584
80053f4: 34000315 stw r16,12(r6)
80053f8: 44000215 stw r16,8(r8)
80053fc: 003f3e06 br 80050f8 <_malloc_r+0x218>
8005400: 63000044 addi r12,r12,1
8005404: 608000cc andi r2,r12,3
8005408: 10005d26 beq r2,zero,8005580 <_malloc_r+0x6a0>
800540c: 18c00204 addi r3,r3,8
8005410: 003f5106 br 8005158 <_malloc_r+0x278>
8005414: 8089883a add r4,r16,r2
8005418: 003f6d06 br 80051d0 <_malloc_r+0x2f0>
800541c: 00805504 movi r2,340
8005420: 10c02036 bltu r2,r3,80054a4 <_malloc_r+0x5c4>
8005424: 8804d3fa srli r2,r17,15
8005428: 11801dc4 addi r6,r2,119
800542c: 300490fa slli r2,r6,3
8005430: 003ed806 br 8004f94 <_malloc_r+0xb4>
8005434: 48c000c4 addi r3,r9,3
8005438: 003f3106 br 8005100 <_malloc_r+0x220>
800543c: 05c20074 movhi r23,2049
8005440: bdc63004 addi r23,r23,6336
8005444: b8800017 ldw r2,0(r23)
8005448: 988d883a add r6,r19,r2
800544c: b9800015 stw r6,0(r23)
8005450: 293fb21e bne r5,r4,800531c <_malloc_r+0x43c>
8005454: 2083ffcc andi r2,r4,4095
8005458: 103fb01e bne r2,zero,800531c <_malloc_r+0x43c>
800545c: e4000217 ldw r16,8(fp)
8005460: 9d45883a add r2,r19,r21
8005464: 10800054 ori r2,r2,1
8005468: 80800115 stw r2,4(r16)
800546c: b8c00017 ldw r3,0(r23)
8005470: d0a6df17 ldw r2,-25732(gp)
8005474: 10c0012e bgeu r2,r3,800547c <_malloc_r+0x59c>
8005478: d0e6df15 stw r3,-25732(gp)
800547c: d0a6e017 ldw r2,-25728(gp)
8005480: 10ff962e bgeu r2,r3,80052dc <_malloc_r+0x3fc>
8005484: d0e6e015 stw r3,-25728(gp)
8005488: 003f9406 br 80052dc <_malloc_r+0x3fc>
800548c: 00800104 movi r2,4
8005490: 11001e36 bltu r2,r4,800550c <_malloc_r+0x62c>
8005494: 2804d1ba srli r2,r5,6
8005498: 11000e04 addi r4,r2,56
800549c: 200690fa slli r3,r4,3
80054a0: 003fc506 br 80053b8 <_malloc_r+0x4d8>
80054a4: 00815504 movi r2,1364
80054a8: 10c01d2e bgeu r2,r3,8005520 <_malloc_r+0x640>
80054ac: 01801f84 movi r6,126
80054b0: 0080fc04 movi r2,1008
80054b4: 003eb706 br 8004f94 <_malloc_r+0xb4>
80054b8: 00800204 movi r2,8
80054bc: 10cbc83a sub r5,r2,r3
80054c0: 2169883a add r20,r4,r5
80054c4: 003f9e06 br 8005340 <_malloc_r+0x460>
80054c8: 00bffe04 movi r2,-8
80054cc: a93ffd04 addi r4,r21,-12
80054d0: 2088703a and r4,r4,r2
80054d4: b10b883a add r5,r22,r4
80054d8: 00c00144 movi r3,5
80054dc: 28c00215 stw r3,8(r5)
80054e0: 28c00115 stw r3,4(r5)
80054e4: b0800117 ldw r2,4(r22)
80054e8: 1080004c andi r2,r2,1
80054ec: 2084b03a or r2,r4,r2
80054f0: b0800115 stw r2,4(r22)
80054f4: 313fdd2e bgeu r6,r4,800546c <_malloc_r+0x58c>
80054f8: b1400204 addi r5,r22,8
80054fc: 9009883a mov r4,r18
8005500: 80043580 call 8004358 <_free_r>
8005504: e4000217 ldw r16,8(fp)
8005508: 003fd806 br 800546c <_malloc_r+0x58c>
800550c: 00800504 movi r2,20
8005510: 11001536 bltu r2,r4,8005568 <_malloc_r+0x688>
8005514: 210016c4 addi r4,r4,91
8005518: 200690fa slli r3,r4,3
800551c: 003fa606 br 80053b8 <_malloc_r+0x4d8>
8005520: 8804d4ba srli r2,r17,18
8005524: 11801f04 addi r6,r2,124
8005528: 300490fa slli r2,r6,3
800552c: 003e9906 br 8004f94 <_malloc_r+0xb4>
8005530: 2009d0ba srai r4,r4,2
8005534: 01420074 movhi r5,2049
8005538: 29799204 addi r5,r5,-6584
800553c: 00c00044 movi r3,1
8005540: 28800117 ldw r2,4(r5)
8005544: 1906983a sll r3,r3,r4
8005548: 10c4b03a or r2,r2,r3
800554c: 28800115 stw r2,4(r5)
8005550: 003fa306 br 80053e0 <_malloc_r+0x500>
8005554: 0027883a mov r19,zero
8005558: 00c00044 movi r3,1
800555c: 003f8606 br 8005378 <_malloc_r+0x498>
8005560: d1200515 stw r4,-32748(gp)
8005564: 003f7306 br 8005334 <_malloc_r+0x454>
8005568: 00801504 movi r2,84
800556c: 11001936 bltu r2,r4,80055d4 <_malloc_r+0x6f4>
8005570: 2804d33a srli r2,r5,12
8005574: 11001b84 addi r4,r2,110
8005578: 200690fa slli r3,r4,3
800557c: 003f8e06 br 80053b8 <_malloc_r+0x4d8>
8005580: 480b883a mov r5,r9
8005584: 6807883a mov r3,r13
8005588: 288000cc andi r2,r5,3
800558c: 18fffe04 addi r3,r3,-8
8005590: 297fffc4 addi r5,r5,-1
8005594: 10001526 beq r2,zero,80055ec <_malloc_r+0x70c>
8005598: 18800217 ldw r2,8(r3)
800559c: 10fffa26 beq r2,r3,8005588 <_malloc_r+0x6a8>
80055a0: 2109883a add r4,r4,r4
80055a4: 393f1e36 bltu r7,r4,8005220 <_malloc_r+0x340>
80055a8: 203f1d26 beq r4,zero,8005220 <_malloc_r+0x340>
80055ac: 21c4703a and r2,r4,r7
80055b0: 10000226 beq r2,zero,80055bc <_malloc_r+0x6dc>
80055b4: 6013883a mov r9,r12
80055b8: 003ee106 br 8005140 <_malloc_r+0x260>
80055bc: 2109883a add r4,r4,r4
80055c0: 3904703a and r2,r7,r4
80055c4: 63000104 addi r12,r12,4
80055c8: 103ffc26 beq r2,zero,80055bc <_malloc_r+0x6dc>
80055cc: 6013883a mov r9,r12
80055d0: 003edb06 br 8005140 <_malloc_r+0x260>
80055d4: 00805504 movi r2,340
80055d8: 11000836 bltu r2,r4,80055fc <_malloc_r+0x71c>
80055dc: 2804d3fa srli r2,r5,15
80055e0: 11001dc4 addi r4,r2,119
80055e4: 200690fa slli r3,r4,3
80055e8: 003f7306 br 80053b8 <_malloc_r+0x4d8>
80055ec: 0104303a nor r2,zero,r4
80055f0: 388e703a and r7,r7,r2
80055f4: e1c00115 stw r7,4(fp)
80055f8: 003fe906 br 80055a0 <_malloc_r+0x6c0>
80055fc: 00815504 movi r2,1364
8005600: 1100032e bgeu r2,r4,8005610 <_malloc_r+0x730>
8005604: 01001f84 movi r4,126
8005608: 00c0fc04 movi r3,1008
800560c: 003f6a06 br 80053b8 <_malloc_r+0x4d8>
8005610: 2804d4ba srli r2,r5,18
8005614: 11001f04 addi r4,r2,124
8005618: 200690fa slli r3,r4,3
800561c: 003f6606 br 80053b8 <_malloc_r+0x4d8>
08005620 <memchr>:
8005620: 008000c4 movi r2,3
8005624: 29403fcc andi r5,r5,255
8005628: 2007883a mov r3,r4
800562c: 1180022e bgeu r2,r6,8005638 <memchr+0x18>
8005630: 2084703a and r2,r4,r2
8005634: 10000b26 beq r2,zero,8005664 <memchr+0x44>
8005638: 313fffc4 addi r4,r6,-1
800563c: 3000051e bne r6,zero,8005654 <memchr+0x34>
8005640: 00002c06 br 80056f4 <memchr+0xd4>
8005644: 213fffc4 addi r4,r4,-1
8005648: 00bfffc4 movi r2,-1
800564c: 18c00044 addi r3,r3,1
8005650: 20802826 beq r4,r2,80056f4 <memchr+0xd4>
8005654: 18800003 ldbu r2,0(r3)
8005658: 28bffa1e bne r5,r2,8005644 <memchr+0x24>
800565c: 1805883a mov r2,r3
8005660: f800283a ret
8005664: 0011883a mov r8,zero
8005668: 0007883a mov r3,zero
800566c: 01c00104 movi r7,4
8005670: 4004923a slli r2,r8,8
8005674: 18c00044 addi r3,r3,1
8005678: 1151883a add r8,r2,r5
800567c: 19fffc1e bne r3,r7,8005670 <memchr+0x50>
8005680: 02bfbff4 movhi r10,65279
8005684: 52bfbfc4 addi r10,r10,-257
8005688: 02602074 movhi r9,32897
800568c: 4a602004 addi r9,r9,-32640
8005690: 02c000c4 movi r11,3
8005694: 20800017 ldw r2,0(r4)
8005698: 31bfff04 addi r6,r6,-4
800569c: 200f883a mov r7,r4
80056a0: 1204f03a xor r2,r2,r8
80056a4: 1287883a add r3,r2,r10
80056a8: 1a46703a and r3,r3,r9
80056ac: 0084303a nor r2,zero,r2
80056b0: 10c4703a and r2,r2,r3
80056b4: 10000b26 beq r2,zero,80056e4 <memchr+0xc4>
80056b8: 20800003 ldbu r2,0(r4)
80056bc: 28800f26 beq r5,r2,80056fc <memchr+0xdc>
80056c0: 20800043 ldbu r2,1(r4)
80056c4: 21c00044 addi r7,r4,1
80056c8: 28800c26 beq r5,r2,80056fc <memchr+0xdc>
80056cc: 20800083 ldbu r2,2(r4)
80056d0: 21c00084 addi r7,r4,2
80056d4: 28800926 beq r5,r2,80056fc <memchr+0xdc>
80056d8: 208000c3 ldbu r2,3(r4)
80056dc: 21c000c4 addi r7,r4,3
80056e0: 28800626 beq r5,r2,80056fc <memchr+0xdc>
80056e4: 21000104 addi r4,r4,4
80056e8: 59bfea36 bltu r11,r6,8005694 <memchr+0x74>
80056ec: 2007883a mov r3,r4
80056f0: 003fd106 br 8005638 <memchr+0x18>
80056f4: 0005883a mov r2,zero
80056f8: f800283a ret
80056fc: 3805883a mov r2,r7
8005700: f800283a ret
08005704 <memcpy>:
8005704: 01c003c4 movi r7,15
8005708: 2007883a mov r3,r4
800570c: 3980032e bgeu r7,r6,800571c <memcpy+0x18>
8005710: 2904b03a or r2,r5,r4
8005714: 108000cc andi r2,r2,3
8005718: 10000926 beq r2,zero,8005740 <memcpy+0x3c>
800571c: 30000626 beq r6,zero,8005738 <memcpy+0x34>
8005720: 30cd883a add r6,r6,r3
8005724: 28800003 ldbu r2,0(r5)
8005728: 29400044 addi r5,r5,1
800572c: 18800005 stb r2,0(r3)
8005730: 18c00044 addi r3,r3,1
8005734: 30fffb1e bne r6,r3,8005724 <memcpy+0x20>
8005738: 2005883a mov r2,r4
800573c: f800283a ret
8005740: 3811883a mov r8,r7
8005744: 200f883a mov r7,r4
8005748: 28c00017 ldw r3,0(r5)
800574c: 31bffc04 addi r6,r6,-16
8005750: 38c00015 stw r3,0(r7)
8005754: 28800117 ldw r2,4(r5)
8005758: 38800115 stw r2,4(r7)
800575c: 28c00217 ldw r3,8(r5)
8005760: 38c00215 stw r3,8(r7)
8005764: 28800317 ldw r2,12(r5)
8005768: 29400404 addi r5,r5,16
800576c: 38800315 stw r2,12(r7)
8005770: 39c00404 addi r7,r7,16
8005774: 41bff436 bltu r8,r6,8005748 <memcpy+0x44>
8005778: 008000c4 movi r2,3
800577c: 1180072e bgeu r2,r6,800579c <memcpy+0x98>
8005780: 1007883a mov r3,r2
8005784: 28800017 ldw r2,0(r5)
8005788: 31bfff04 addi r6,r6,-4
800578c: 29400104 addi r5,r5,4
8005790: 38800015 stw r2,0(r7)
8005794: 39c00104 addi r7,r7,4
8005798: 19bffa36 bltu r3,r6,8005784 <memcpy+0x80>
800579c: 3807883a mov r3,r7
80057a0: 003fde06 br 800571c <memcpy+0x18>
080057a4 <memmove>:
80057a4: 2807883a mov r3,r5
80057a8: 2011883a mov r8,r4
80057ac: 29000c2e bgeu r5,r4,80057e0 <memmove+0x3c>
80057b0: 298f883a add r7,r5,r6
80057b4: 21c00a2e bgeu r4,r7,80057e0 <memmove+0x3c>
80057b8: 30000726 beq r6,zero,80057d8 <memmove+0x34>
80057bc: 2187883a add r3,r4,r6
80057c0: 198dc83a sub r6,r3,r6
80057c4: 39ffffc4 addi r7,r7,-1
80057c8: 38800003 ldbu r2,0(r7)
80057cc: 18ffffc4 addi r3,r3,-1
80057d0: 18800005 stb r2,0(r3)
80057d4: 19bffb1e bne r3,r6,80057c4 <memmove+0x20>
80057d8: 2005883a mov r2,r4
80057dc: f800283a ret
80057e0: 01c003c4 movi r7,15
80057e4: 39800a36 bltu r7,r6,8005810 <memmove+0x6c>
80057e8: 303ffb26 beq r6,zero,80057d8 <memmove+0x34>
80057ec: 400f883a mov r7,r8
80057f0: 320d883a add r6,r6,r8
80057f4: 28800003 ldbu r2,0(r5)
80057f8: 29400044 addi r5,r5,1
80057fc: 38800005 stb r2,0(r7)
8005800: 39c00044 addi r7,r7,1
8005804: 39bffb1e bne r7,r6,80057f4 <memmove+0x50>
8005808: 2005883a mov r2,r4
800580c: f800283a ret
8005810: 1904b03a or r2,r3,r4
8005814: 108000cc andi r2,r2,3
8005818: 103ff31e bne r2,zero,80057e8 <memmove+0x44>
800581c: 3811883a mov r8,r7
8005820: 180b883a mov r5,r3
8005824: 200f883a mov r7,r4
8005828: 28c00017 ldw r3,0(r5)
800582c: 31bffc04 addi r6,r6,-16
8005830: 38c00015 stw r3,0(r7)
8005834: 28800117 ldw r2,4(r5)
8005838: 38800115 stw r2,4(r7)
800583c: 28c00217 ldw r3,8(r5)
8005840: 38c00215 stw r3,8(r7)
8005844: 28800317 ldw r2,12(r5)
8005848: 29400404 addi r5,r5,16
800584c: 38800315 stw r2,12(r7)
8005850: 39c00404 addi r7,r7,16
8005854: 41bff436 bltu r8,r6,8005828 <memmove+0x84>
8005858: 008000c4 movi r2,3
800585c: 1180072e bgeu r2,r6,800587c <memmove+0xd8>
8005860: 1007883a mov r3,r2
8005864: 28800017 ldw r2,0(r5)
8005868: 31bfff04 addi r6,r6,-4
800586c: 29400104 addi r5,r5,4
8005870: 38800015 stw r2,0(r7)
8005874: 39c00104 addi r7,r7,4
8005878: 19bffa36 bltu r3,r6,8005864 <memmove+0xc0>
800587c: 3811883a mov r8,r7
8005880: 003fd906 br 80057e8 <memmove+0x44>
08005884 <memset>:
8005884: 008000c4 movi r2,3
8005888: 29403fcc andi r5,r5,255
800588c: 2007883a mov r3,r4
8005890: 1180022e bgeu r2,r6,800589c <memset+0x18>
8005894: 2084703a and r2,r4,r2
8005898: 10000826 beq r2,zero,80058bc <memset+0x38>
800589c: 30000526 beq r6,zero,80058b4 <memset+0x30>
80058a0: 2805883a mov r2,r5
80058a4: 30cd883a add r6,r6,r3
80058a8: 18800005 stb r2,0(r3)
80058ac: 18c00044 addi r3,r3,1
80058b0: 19bffd1e bne r3,r6,80058a8 <memset+0x24>
80058b4: 2005883a mov r2,r4
80058b8: f800283a ret
80058bc: 2804923a slli r2,r5,8
80058c0: 020003c4 movi r8,15
80058c4: 200f883a mov r7,r4
80058c8: 2884b03a or r2,r5,r2
80058cc: 1006943a slli r3,r2,16
80058d0: 10c6b03a or r3,r2,r3
80058d4: 41800a2e bgeu r8,r6,8005900 <memset+0x7c>
80058d8: 4005883a mov r2,r8
80058dc: 31bffc04 addi r6,r6,-16
80058e0: 38c00015 stw r3,0(r7)
80058e4: 38c00115 stw r3,4(r7)
80058e8: 38c00215 stw r3,8(r7)
80058ec: 38c00315 stw r3,12(r7)
80058f0: 39c00404 addi r7,r7,16
80058f4: 11bff936 bltu r2,r6,80058dc <memset+0x58>
80058f8: 008000c4 movi r2,3
80058fc: 1180052e bgeu r2,r6,8005914 <memset+0x90>
8005900: 31bfff04 addi r6,r6,-4
8005904: 008000c4 movi r2,3
8005908: 38c00015 stw r3,0(r7)
800590c: 39c00104 addi r7,r7,4
8005910: 11bffb36 bltu r2,r6,8005900 <memset+0x7c>
8005914: 3807883a mov r3,r7
8005918: 003fe006 br 800589c <memset+0x18>
0800591c <_Bfree>:
800591c: 28000826 beq r5,zero,8005940 <_Bfree+0x24>
8005920: 28800117 ldw r2,4(r5)
8005924: 21001317 ldw r4,76(r4)
8005928: 1085883a add r2,r2,r2
800592c: 1085883a add r2,r2,r2
8005930: 1105883a add r2,r2,r4
8005934: 10c00017 ldw r3,0(r2)
8005938: 28c00015 stw r3,0(r5)
800593c: 11400015 stw r5,0(r2)
8005940: f800283a ret
08005944 <__hi0bits>:
8005944: 20bfffec andhi r2,r4,65535
8005948: 10001426 beq r2,zero,800599c <__hi0bits+0x58>
800594c: 0007883a mov r3,zero
8005950: 20bfc02c andhi r2,r4,65280
8005954: 1000021e bne r2,zero,8005960 <__hi0bits+0x1c>
8005958: 2008923a slli r4,r4,8
800595c: 18c00204 addi r3,r3,8
8005960: 20bc002c andhi r2,r4,61440
8005964: 1000021e bne r2,zero,8005970 <__hi0bits+0x2c>
8005968: 2008913a slli r4,r4,4
800596c: 18c00104 addi r3,r3,4
8005970: 20b0002c andhi r2,r4,49152
8005974: 1000031e bne r2,zero,8005984 <__hi0bits+0x40>
8005978: 2105883a add r2,r4,r4
800597c: 18c00084 addi r3,r3,2
8005980: 1089883a add r4,r2,r2
8005984: 20000316 blt r4,zero,8005994 <__hi0bits+0x50>
8005988: 2090002c andhi r2,r4,16384
800598c: 10000626 beq r2,zero,80059a8 <__hi0bits+0x64>
8005990: 18c00044 addi r3,r3,1
8005994: 1805883a mov r2,r3
8005998: f800283a ret
800599c: 2008943a slli r4,r4,16
80059a0: 00c00404 movi r3,16
80059a4: 003fea06 br 8005950 <__hi0bits+0xc>
80059a8: 00c00804 movi r3,32
80059ac: 1805883a mov r2,r3
80059b0: f800283a ret
080059b4 <__lo0bits>:
80059b4: 20c00017 ldw r3,0(r4)
80059b8: 188001cc andi r2,r3,7
80059bc: 10000a26 beq r2,zero,80059e8 <__lo0bits+0x34>
80059c0: 1880004c andi r2,r3,1
80059c4: 1005003a cmpeq r2,r2,zero
80059c8: 10002126 beq r2,zero,8005a50 <__lo0bits+0x9c>
80059cc: 1880008c andi r2,r3,2
80059d0: 1000251e bne r2,zero,8005a68 <__lo0bits+0xb4>
80059d4: 1804d0ba srli r2,r3,2
80059d8: 01400084 movi r5,2
80059dc: 20800015 stw r2,0(r4)
80059e0: 2805883a mov r2,r5
80059e4: f800283a ret
80059e8: 18bfffcc andi r2,r3,65535
80059ec: 10001526 beq r2,zero,8005a44 <__lo0bits+0x90>
80059f0: 000b883a mov r5,zero
80059f4: 18803fcc andi r2,r3,255
80059f8: 1000021e bne r2,zero,8005a04 <__lo0bits+0x50>
80059fc: 1806d23a srli r3,r3,8
8005a00: 29400204 addi r5,r5,8
8005a04: 188003cc andi r2,r3,15
8005a08: 1000021e bne r2,zero,8005a14 <__lo0bits+0x60>
8005a0c: 1806d13a srli r3,r3,4
8005a10: 29400104 addi r5,r5,4
8005a14: 188000cc andi r2,r3,3
8005a18: 1000021e bne r2,zero,8005a24 <__lo0bits+0x70>
8005a1c: 1806d0ba srli r3,r3,2
8005a20: 29400084 addi r5,r5,2
8005a24: 1880004c andi r2,r3,1
8005a28: 1000031e bne r2,zero,8005a38 <__lo0bits+0x84>
8005a2c: 1806d07a srli r3,r3,1
8005a30: 18000a26 beq r3,zero,8005a5c <__lo0bits+0xa8>
8005a34: 29400044 addi r5,r5,1
8005a38: 2805883a mov r2,r5
8005a3c: 20c00015 stw r3,0(r4)
8005a40: f800283a ret
8005a44: 1806d43a srli r3,r3,16
8005a48: 01400404 movi r5,16
8005a4c: 003fe906 br 80059f4 <__lo0bits+0x40>
8005a50: 000b883a mov r5,zero
8005a54: 2805883a mov r2,r5
8005a58: f800283a ret
8005a5c: 01400804 movi r5,32
8005a60: 2805883a mov r2,r5
8005a64: f800283a ret
8005a68: 1804d07a srli r2,r3,1
8005a6c: 01400044 movi r5,1
8005a70: 20800015 stw r2,0(r4)
8005a74: 003fda06 br 80059e0 <__lo0bits+0x2c>
08005a78 <__mcmp>:
8005a78: 20800417 ldw r2,16(r4)
8005a7c: 28c00417 ldw r3,16(r5)
8005a80: 10cfc83a sub r7,r2,r3
8005a84: 38000c1e bne r7,zero,8005ab8 <__mcmp+0x40>
8005a88: 18c5883a add r2,r3,r3
8005a8c: 1085883a add r2,r2,r2
8005a90: 10c00504 addi r3,r2,20
8005a94: 21000504 addi r4,r4,20
8005a98: 28cb883a add r5,r5,r3
8005a9c: 2085883a add r2,r4,r2
8005aa0: 10bfff04 addi r2,r2,-4
8005aa4: 297fff04 addi r5,r5,-4
8005aa8: 11800017 ldw r6,0(r2)
8005aac: 28c00017 ldw r3,0(r5)
8005ab0: 30c0031e bne r6,r3,8005ac0 <__mcmp+0x48>
8005ab4: 20bffa36 bltu r4,r2,8005aa0 <__mcmp+0x28>
8005ab8: 3805883a mov r2,r7
8005abc: f800283a ret
8005ac0: 30c00336 bltu r6,r3,8005ad0 <__mcmp+0x58>
8005ac4: 01c00044 movi r7,1
8005ac8: 3805883a mov r2,r7
8005acc: f800283a ret
8005ad0: 01ffffc4 movi r7,-1
8005ad4: 003ff806 br 8005ab8 <__mcmp+0x40>
08005ad8 <__ulp>:
8005ad8: 295ffc2c andhi r5,r5,32752
8005adc: 013f3034 movhi r4,64704
8005ae0: 290b883a add r5,r5,r4
8005ae4: 0145c83a sub r2,zero,r5
8005ae8: 1007d53a srai r3,r2,20
8005aec: 000d883a mov r6,zero
8005af0: 0140040e bge zero,r5,8005b04 <__ulp+0x2c>
8005af4: 280f883a mov r7,r5
8005af8: 3807883a mov r3,r7
8005afc: 3005883a mov r2,r6
8005b00: f800283a ret
8005b04: 008004c4 movi r2,19
8005b08: 193ffb04 addi r4,r3,-20
8005b0c: 10c00c0e bge r2,r3,8005b40 <__ulp+0x68>
8005b10: 008007c4 movi r2,31
8005b14: 1107c83a sub r3,r2,r4
8005b18: 00800784 movi r2,30
8005b1c: 01400044 movi r5,1
8005b20: 11000216 blt r2,r4,8005b2c <__ulp+0x54>
8005b24: 00800044 movi r2,1
8005b28: 10ca983a sll r5,r2,r3
8005b2c: 000f883a mov r7,zero
8005b30: 280d883a mov r6,r5
8005b34: 3807883a mov r3,r7
8005b38: 3005883a mov r2,r6
8005b3c: f800283a ret
8005b40: 00800234 movhi r2,8
8005b44: 10cfd83a sra r7,r2,r3
8005b48: 000d883a mov r6,zero
8005b4c: 3005883a mov r2,r6
8005b50: 3807883a mov r3,r7
8005b54: f800283a ret
08005b58 <__b2d>:
8005b58: 20800417 ldw r2,16(r4)
8005b5c: defff904 addi sp,sp,-28
8005b60: dd000415 stw r20,16(sp)
8005b64: 1085883a add r2,r2,r2
8005b68: 25000504 addi r20,r4,20
8005b6c: 1085883a add r2,r2,r2
8005b70: dc000015 stw r16,0(sp)
8005b74: a0a1883a add r16,r20,r2
8005b78: dd400515 stw r21,20(sp)
8005b7c: 857fff17 ldw r21,-4(r16)
8005b80: dc400115 stw r17,4(sp)
8005b84: dfc00615 stw ra,24(sp)
8005b88: a809883a mov r4,r21
8005b8c: 2823883a mov r17,r5
8005b90: dcc00315 stw r19,12(sp)
8005b94: dc800215 stw r18,8(sp)
8005b98: 80059440 call 8005944 <__hi0bits>
8005b9c: 100b883a mov r5,r2
8005ba0: 00800804 movi r2,32
8005ba4: 1145c83a sub r2,r2,r5
8005ba8: 88800015 stw r2,0(r17)
8005bac: 00800284 movi r2,10
8005bb0: 80ffff04 addi r3,r16,-4
8005bb4: 11401416 blt r2,r5,8005c08 <__b2d+0xb0>
8005bb8: 008002c4 movi r2,11
8005bbc: 1149c83a sub r4,r2,r5
8005bc0: a0c02736 bltu r20,r3,8005c60 <__b2d+0x108>
8005bc4: 000d883a mov r6,zero
8005bc8: 28800544 addi r2,r5,21
8005bcc: a906d83a srl r3,r21,r4
8005bd0: a884983a sll r2,r21,r2
8005bd4: 1ccffc34 orhi r19,r3,16368
8005bd8: 11a4b03a or r18,r2,r6
8005bdc: 9005883a mov r2,r18
8005be0: 9807883a mov r3,r19
8005be4: dfc00617 ldw ra,24(sp)
8005be8: dd400517 ldw r21,20(sp)
8005bec: dd000417 ldw r20,16(sp)
8005bf0: dcc00317 ldw r19,12(sp)
8005bf4: dc800217 ldw r18,8(sp)
8005bf8: dc400117 ldw r17,4(sp)
8005bfc: dc000017 ldw r16,0(sp)
8005c00: dec00704 addi sp,sp,28
8005c04: f800283a ret
8005c08: a0c00e36 bltu r20,r3,8005c44 <__b2d+0xec>
8005c0c: 293ffd44 addi r4,r5,-11
8005c10: 000d883a mov r6,zero
8005c14: 20000f26 beq r4,zero,8005c54 <__b2d+0xfc>
8005c18: 00800804 movi r2,32
8005c1c: 110bc83a sub r5,r2,r4
8005c20: a0c01236 bltu r20,r3,8005c6c <__b2d+0x114>
8005c24: 000f883a mov r7,zero
8005c28: a904983a sll r2,r21,r4
8005c2c: 3146d83a srl r3,r6,r5
8005c30: 3108983a sll r4,r6,r4
8005c34: 108ffc34 orhi r2,r2,16368
8005c38: 18a6b03a or r19,r3,r2
8005c3c: 3924b03a or r18,r7,r4
8005c40: 003fe606 br 8005bdc <__b2d+0x84>
8005c44: 293ffd44 addi r4,r5,-11
8005c48: 81bffe17 ldw r6,-8(r16)
8005c4c: 80fffe04 addi r3,r16,-8
8005c50: 203ff11e bne r4,zero,8005c18 <__b2d+0xc0>
8005c54: accffc34 orhi r19,r21,16368
8005c58: 3025883a mov r18,r6
8005c5c: 003fdf06 br 8005bdc <__b2d+0x84>
8005c60: 18bfff17 ldw r2,-4(r3)
8005c64: 110cd83a srl r6,r2,r4
8005c68: 003fd706 br 8005bc8 <__b2d+0x70>
8005c6c: 18bfff17 ldw r2,-4(r3)
8005c70: 114ed83a srl r7,r2,r5
8005c74: 003fec06 br 8005c28 <__b2d+0xd0>
08005c78 <__ratio>:
8005c78: defff904 addi sp,sp,-28
8005c7c: dc400215 stw r17,8(sp)
8005c80: 2823883a mov r17,r5
8005c84: d80b883a mov r5,sp
8005c88: dfc00615 stw ra,24(sp)
8005c8c: dd000515 stw r20,20(sp)
8005c90: dcc00415 stw r19,16(sp)
8005c94: dc800315 stw r18,12(sp)
8005c98: 2025883a mov r18,r4
8005c9c: 8005b580 call 8005b58 <__b2d>
8005ca0: 8809883a mov r4,r17
8005ca4: d9400104 addi r5,sp,4
8005ca8: 1027883a mov r19,r2
8005cac: 1829883a mov r20,r3
8005cb0: 8005b580 call 8005b58 <__b2d>
8005cb4: 89000417 ldw r4,16(r17)
8005cb8: 91c00417 ldw r7,16(r18)
8005cbc: d9800117 ldw r6,4(sp)
8005cc0: 180b883a mov r5,r3
8005cc4: 390fc83a sub r7,r7,r4
8005cc8: 1009883a mov r4,r2
8005ccc: d8800017 ldw r2,0(sp)
8005cd0: 380e917a slli r7,r7,5
8005cd4: 2011883a mov r8,r4
8005cd8: 1185c83a sub r2,r2,r6
8005cdc: 11c5883a add r2,r2,r7
8005ce0: 1006953a slli r3,r2,20
8005ce4: 2813883a mov r9,r5
8005ce8: 00800d0e bge zero,r2,8005d20 <__ratio+0xa8>
8005cec: 1d29883a add r20,r3,r20
8005cf0: a00b883a mov r5,r20
8005cf4: 480f883a mov r7,r9
8005cf8: 9809883a mov r4,r19
8005cfc: 400d883a mov r6,r8
8005d00: 8008d340 call 8008d34 <__divdf3>
8005d04: dfc00617 ldw ra,24(sp)
8005d08: dd000517 ldw r20,20(sp)
8005d0c: dcc00417 ldw r19,16(sp)
8005d10: dc800317 ldw r18,12(sp)
8005d14: dc400217 ldw r17,8(sp)
8005d18: dec00704 addi sp,sp,28
8005d1c: f800283a ret
8005d20: 28d3c83a sub r9,r5,r3
8005d24: 003ff206 br 8005cf0 <__ratio+0x78>
08005d28 <_mprec_log10>:
8005d28: defffe04 addi sp,sp,-8
8005d2c: 008005c4 movi r2,23
8005d30: dc000015 stw r16,0(sp)
8005d34: dfc00115 stw ra,4(sp)
8005d38: 2021883a mov r16,r4
8005d3c: 11000c16 blt r2,r4,8005d70 <_mprec_log10+0x48>
8005d40: 200490fa slli r2,r4,3
8005d44: 00c20074 movhi r3,2049
8005d48: 18f7d504 addi r3,r3,-8364
8005d4c: 10c5883a add r2,r2,r3
8005d50: 12400117 ldw r9,4(r2)
8005d54: 12000017 ldw r8,0(r2)
8005d58: 4807883a mov r3,r9
8005d5c: 4005883a mov r2,r8
8005d60: dfc00117 ldw ra,4(sp)
8005d64: dc000017 ldw r16,0(sp)
8005d68: dec00204 addi sp,sp,8
8005d6c: f800283a ret
8005d70: 0011883a mov r8,zero
8005d74: 024ffc34 movhi r9,16368
8005d78: 0005883a mov r2,zero
8005d7c: 00d00934 movhi r3,16420
8005d80: 480b883a mov r5,r9
8005d84: 4009883a mov r4,r8
8005d88: 180f883a mov r7,r3
8005d8c: 100d883a mov r6,r2
8005d90: 80089700 call 8008970 <__muldf3>
8005d94: 843fffc4 addi r16,r16,-1
8005d98: 1011883a mov r8,r2
8005d9c: 1813883a mov r9,r3
8005da0: 803ff51e bne r16,zero,8005d78 <_mprec_log10+0x50>
8005da4: 4005883a mov r2,r8
8005da8: 4807883a mov r3,r9
8005dac: dfc00117 ldw ra,4(sp)
8005db0: dc000017 ldw r16,0(sp)
8005db4: dec00204 addi sp,sp,8
8005db8: f800283a ret
08005dbc <__copybits>:
8005dbc: 297fffc4 addi r5,r5,-1
8005dc0: 30800417 ldw r2,16(r6)
8005dc4: 280bd17a srai r5,r5,5
8005dc8: 31800504 addi r6,r6,20
8005dcc: 1085883a add r2,r2,r2
8005dd0: 294b883a add r5,r5,r5
8005dd4: 294b883a add r5,r5,r5
8005dd8: 1085883a add r2,r2,r2
8005ddc: 290b883a add r5,r5,r4
8005de0: 3087883a add r3,r6,r2
8005de4: 29400104 addi r5,r5,4
8005de8: 30c0052e bgeu r6,r3,8005e00 <__copybits+0x44>
8005dec: 30800017 ldw r2,0(r6)
8005df0: 31800104 addi r6,r6,4
8005df4: 20800015 stw r2,0(r4)
8005df8: 21000104 addi r4,r4,4
8005dfc: 30fffb36 bltu r6,r3,8005dec <__copybits+0x30>
8005e00: 2140032e bgeu r4,r5,8005e10 <__copybits+0x54>
8005e04: 20000015 stw zero,0(r4)
8005e08: 21000104 addi r4,r4,4
8005e0c: 217ffd36 bltu r4,r5,8005e04 <__copybits+0x48>
8005e10: f800283a ret
08005e14 <__any_on>:
8005e14: 20800417 ldw r2,16(r4)
8005e18: 2807d17a srai r3,r5,5
8005e1c: 21000504 addi r4,r4,20
8005e20: 10c00d0e bge r2,r3,8005e58 <__any_on+0x44>
8005e24: 1085883a add r2,r2,r2
8005e28: 1085883a add r2,r2,r2
8005e2c: 208d883a add r6,r4,r2
8005e30: 2180182e bgeu r4,r6,8005e94 <__any_on+0x80>
8005e34: 30bfff17 ldw r2,-4(r6)
8005e38: 30ffff04 addi r3,r6,-4
8005e3c: 1000041e bne r2,zero,8005e50 <__any_on+0x3c>
8005e40: 20c0142e bgeu r4,r3,8005e94 <__any_on+0x80>
8005e44: 18ffff04 addi r3,r3,-4
8005e48: 18800017 ldw r2,0(r3)
8005e4c: 103ffc26 beq r2,zero,8005e40 <__any_on+0x2c>
8005e50: 00800044 movi r2,1
8005e54: f800283a ret
8005e58: 18800a0e bge r3,r2,8005e84 <__any_on+0x70>
8005e5c: 294007cc andi r5,r5,31
8005e60: 28000826 beq r5,zero,8005e84 <__any_on+0x70>
8005e64: 18c5883a add r2,r3,r3
8005e68: 1085883a add r2,r2,r2
8005e6c: 208d883a add r6,r4,r2
8005e70: 30c00017 ldw r3,0(r6)
8005e74: 1944d83a srl r2,r3,r5
8005e78: 1144983a sll r2,r2,r5
8005e7c: 18bff41e bne r3,r2,8005e50 <__any_on+0x3c>
8005e80: 003feb06 br 8005e30 <__any_on+0x1c>
8005e84: 18c5883a add r2,r3,r3
8005e88: 1085883a add r2,r2,r2
8005e8c: 208d883a add r6,r4,r2
8005e90: 003fe706 br 8005e30 <__any_on+0x1c>
8005e94: 0005883a mov r2,zero
8005e98: f800283a ret
08005e9c <_Balloc>:
8005e9c: 20c01317 ldw r3,76(r4)
8005ea0: defffb04 addi sp,sp,-20
8005ea4: dcc00315 stw r19,12(sp)
8005ea8: dc800215 stw r18,8(sp)
8005eac: dfc00415 stw ra,16(sp)
8005eb0: 2825883a mov r18,r5
8005eb4: dc400115 stw r17,4(sp)
8005eb8: dc000015 stw r16,0(sp)
8005ebc: 2027883a mov r19,r4
8005ec0: 01800404 movi r6,16
8005ec4: 01400104 movi r5,4
8005ec8: 18001726 beq r3,zero,8005f28 <_Balloc+0x8c>
8005ecc: 01400044 movi r5,1
8005ed0: 9485883a add r2,r18,r18
8005ed4: 2ca2983a sll r17,r5,r18
8005ed8: 1085883a add r2,r2,r2
8005edc: 10c7883a add r3,r2,r3
8005ee0: 1c000017 ldw r16,0(r3)
8005ee4: 8c4d883a add r6,r17,r17
8005ee8: 318d883a add r6,r6,r6
8005eec: 9809883a mov r4,r19
8005ef0: 31800504 addi r6,r6,20
8005ef4: 80001226 beq r16,zero,8005f40 <_Balloc+0xa4>
8005ef8: 80800017 ldw r2,0(r16)
8005efc: 18800015 stw r2,0(r3)
8005f00: 80000415 stw zero,16(r16)
8005f04: 80000315 stw zero,12(r16)
8005f08: 8005883a mov r2,r16
8005f0c: dfc00417 ldw ra,16(sp)
8005f10: dcc00317 ldw r19,12(sp)
8005f14: dc800217 ldw r18,8(sp)
8005f18: dc400117 ldw r17,4(sp)
8005f1c: dc000017 ldw r16,0(sp)
8005f20: dec00504 addi sp,sp,20
8005f24: f800283a ret
8005f28: 80073700 call 8007370 <_calloc_r>
8005f2c: 1007883a mov r3,r2
8005f30: 0021883a mov r16,zero
8005f34: 98801315 stw r2,76(r19)
8005f38: 103fe41e bne r2,zero,8005ecc <_Balloc+0x30>
8005f3c: 003ff206 br 8005f08 <_Balloc+0x6c>
8005f40: 80073700 call 8007370 <_calloc_r>
8005f44: 103ff026 beq r2,zero,8005f08 <_Balloc+0x6c>
8005f48: 1021883a mov r16,r2
8005f4c: 14800115 stw r18,4(r2)
8005f50: 14400215 stw r17,8(r2)
8005f54: 003fea06 br 8005f00 <_Balloc+0x64>
08005f58 <__d2b>:
8005f58: defff504 addi sp,sp,-44
8005f5c: dcc00515 stw r19,20(sp)
8005f60: 04c00044 movi r19,1
8005f64: dc000215 stw r16,8(sp)
8005f68: 2821883a mov r16,r5
8005f6c: 980b883a mov r5,r19
8005f70: ddc00915 stw r23,36(sp)
8005f74: dd800815 stw r22,32(sp)
8005f78: dd400715 stw r21,28(sp)
8005f7c: dd000615 stw r20,24(sp)
8005f80: dc800415 stw r18,16(sp)
8005f84: dc400315 stw r17,12(sp)
8005f88: dfc00a15 stw ra,40(sp)
8005f8c: 3023883a mov r17,r6
8005f90: 382d883a mov r22,r7
8005f94: ddc00b17 ldw r23,44(sp)
8005f98: 8005e9c0 call 8005e9c <_Balloc>
8005f9c: 1025883a mov r18,r2
8005fa0: 00a00034 movhi r2,32768
8005fa4: 10bfffc4 addi r2,r2,-1
8005fa8: 8888703a and r4,r17,r2
8005fac: 202ad53a srli r21,r4,20
8005fb0: 00800434 movhi r2,16
8005fb4: 10bfffc4 addi r2,r2,-1
8005fb8: 8886703a and r3,r17,r2
8005fbc: a829003a cmpeq r20,r21,zero
8005fc0: 800b883a mov r5,r16
8005fc4: d8c00115 stw r3,4(sp)
8005fc8: 94000504 addi r16,r18,20
8005fcc: a000021e bne r20,zero,8005fd8 <__d2b+0x80>
8005fd0: 18c00434 orhi r3,r3,16
8005fd4: d8c00115 stw r3,4(sp)
8005fd8: 28002726 beq r5,zero,8006078 <__d2b+0x120>
8005fdc: d809883a mov r4,sp
8005fe0: d9400015 stw r5,0(sp)
8005fe4: 80059b40 call 80059b4 <__lo0bits>
8005fe8: 100d883a mov r6,r2
8005fec: 10003526 beq r2,zero,80060c4 <__d2b+0x16c>
8005ff0: d8c00117 ldw r3,4(sp)
8005ff4: 00800804 movi r2,32
8005ff8: 1185c83a sub r2,r2,r6
8005ffc: d9000017 ldw r4,0(sp)
8006000: 1886983a sll r3,r3,r2
8006004: 1906b03a or r3,r3,r4
8006008: 90c00515 stw r3,20(r18)
800600c: d8c00117 ldw r3,4(sp)
8006010: 1986d83a srl r3,r3,r6
8006014: d8c00115 stw r3,4(sp)
8006018: 180b003a cmpeq r5,r3,zero
800601c: 00800084 movi r2,2
8006020: 114bc83a sub r5,r2,r5
8006024: 80c00115 stw r3,4(r16)
8006028: 91400415 stw r5,16(r18)
800602c: a0001a1e bne r20,zero,8006098 <__d2b+0x140>
8006030: 3545883a add r2,r6,r21
8006034: 10bef344 addi r2,r2,-1075
8006038: 00c00d44 movi r3,53
800603c: b0800015 stw r2,0(r22)
8006040: 1987c83a sub r3,r3,r6
8006044: b8c00015 stw r3,0(r23)
8006048: 9005883a mov r2,r18
800604c: dfc00a17 ldw ra,40(sp)
8006050: ddc00917 ldw r23,36(sp)
8006054: dd800817 ldw r22,32(sp)
8006058: dd400717 ldw r21,28(sp)
800605c: dd000617 ldw r20,24(sp)
8006060: dcc00517 ldw r19,20(sp)
8006064: dc800417 ldw r18,16(sp)
8006068: dc400317 ldw r17,12(sp)
800606c: dc000217 ldw r16,8(sp)
8006070: dec00b04 addi sp,sp,44
8006074: f800283a ret
8006078: d9000104 addi r4,sp,4
800607c: 80059b40 call 80059b4 <__lo0bits>
8006080: 11800804 addi r6,r2,32
8006084: d8800117 ldw r2,4(sp)
8006088: 94c00415 stw r19,16(r18)
800608c: 980b883a mov r5,r19
8006090: 90800515 stw r2,20(r18)
8006094: a03fe626 beq r20,zero,8006030 <__d2b+0xd8>
8006098: 2945883a add r2,r5,r5
800609c: 1085883a add r2,r2,r2
80060a0: 1405883a add r2,r2,r16
80060a4: 113fff17 ldw r4,-4(r2)
80060a8: 30fef384 addi r3,r6,-1074
80060ac: 2820917a slli r16,r5,5
80060b0: b0c00015 stw r3,0(r22)
80060b4: 80059440 call 8005944 <__hi0bits>
80060b8: 80a1c83a sub r16,r16,r2
80060bc: bc000015 stw r16,0(r23)
80060c0: 003fe106 br 8006048 <__d2b+0xf0>
80060c4: d8800017 ldw r2,0(sp)
80060c8: 90800515 stw r2,20(r18)
80060cc: d8c00117 ldw r3,4(sp)
80060d0: 003fd106 br 8006018 <__d2b+0xc0>
080060d4 <__mdiff>:
80060d4: defffb04 addi sp,sp,-20
80060d8: dc000015 stw r16,0(sp)
80060dc: 2821883a mov r16,r5
80060e0: dc800215 stw r18,8(sp)
80060e4: 300b883a mov r5,r6
80060e8: 2025883a mov r18,r4
80060ec: 8009883a mov r4,r16
80060f0: dc400115 stw r17,4(sp)
80060f4: dfc00415 stw ra,16(sp)
80060f8: dcc00315 stw r19,12(sp)
80060fc: 3023883a mov r17,r6
8006100: 8005a780 call 8005a78 <__mcmp>
8006104: 10004226 beq r2,zero,8006210 <__mdiff+0x13c>
8006108: 10005016 blt r2,zero,800624c <__mdiff+0x178>
800610c: 0027883a mov r19,zero
8006110: 81400117 ldw r5,4(r16)
8006114: 9009883a mov r4,r18
8006118: 8005e9c0 call 8005e9c <_Balloc>
800611c: 1019883a mov r12,r2
8006120: 82800417 ldw r10,16(r16)
8006124: 88800417 ldw r2,16(r17)
8006128: 81800504 addi r6,r16,20
800612c: 5287883a add r3,r10,r10
8006130: 1085883a add r2,r2,r2
8006134: 18c7883a add r3,r3,r3
8006138: 1085883a add r2,r2,r2
800613c: 8a000504 addi r8,r17,20
8006140: 64c00315 stw r19,12(r12)
8006144: 30db883a add r13,r6,r3
8006148: 4097883a add r11,r8,r2
800614c: 61c00504 addi r7,r12,20
8006150: 0013883a mov r9,zero
8006154: 31000017 ldw r4,0(r6)
8006158: 41400017 ldw r5,0(r8)
800615c: 42000104 addi r8,r8,4
8006160: 20bfffcc andi r2,r4,65535
8006164: 28ffffcc andi r3,r5,65535
8006168: 10c5c83a sub r2,r2,r3
800616c: 1245883a add r2,r2,r9
8006170: 2008d43a srli r4,r4,16
8006174: 280ad43a srli r5,r5,16
8006178: 1007d43a srai r3,r2,16
800617c: 3880000d sth r2,0(r7)
8006180: 2149c83a sub r4,r4,r5
8006184: 20c9883a add r4,r4,r3
8006188: 3900008d sth r4,2(r7)
800618c: 31800104 addi r6,r6,4
8006190: 39c00104 addi r7,r7,4
8006194: 2013d43a srai r9,r4,16
8006198: 42ffee36 bltu r8,r11,8006154 <__mdiff+0x80>
800619c: 33400c2e bgeu r6,r13,80061d0 <__mdiff+0xfc>
80061a0: 30800017 ldw r2,0(r6)
80061a4: 31800104 addi r6,r6,4
80061a8: 10ffffcc andi r3,r2,65535
80061ac: 1a47883a add r3,r3,r9
80061b0: 1004d43a srli r2,r2,16
80061b4: 1809d43a srai r4,r3,16
80061b8: 38c0000d sth r3,0(r7)
80061bc: 1105883a add r2,r2,r4
80061c0: 3880008d sth r2,2(r7)
80061c4: 1013d43a srai r9,r2,16
80061c8: 39c00104 addi r7,r7,4
80061cc: 337ff436 bltu r6,r13,80061a0 <__mdiff+0xcc>
80061d0: 38bfff17 ldw r2,-4(r7)
80061d4: 38ffff04 addi r3,r7,-4
80061d8: 1000041e bne r2,zero,80061ec <__mdiff+0x118>
80061dc: 18ffff04 addi r3,r3,-4
80061e0: 18800017 ldw r2,0(r3)
80061e4: 52bfffc4 addi r10,r10,-1
80061e8: 103ffc26 beq r2,zero,80061dc <__mdiff+0x108>
80061ec: 6005883a mov r2,r12
80061f0: 62800415 stw r10,16(r12)
80061f4: dfc00417 ldw ra,16(sp)
80061f8: dcc00317 ldw r19,12(sp)
80061fc: dc800217 ldw r18,8(sp)
8006200: dc400117 ldw r17,4(sp)
8006204: dc000017 ldw r16,0(sp)
8006208: dec00504 addi sp,sp,20
800620c: f800283a ret
8006210: 9009883a mov r4,r18
8006214: 000b883a mov r5,zero
8006218: 8005e9c0 call 8005e9c <_Balloc>
800621c: 1019883a mov r12,r2
8006220: 00800044 movi r2,1
8006224: 60800415 stw r2,16(r12)
8006228: 6005883a mov r2,r12
800622c: 60000515 stw zero,20(r12)
8006230: dfc00417 ldw ra,16(sp)
8006234: dcc00317 ldw r19,12(sp)
8006238: dc800217 ldw r18,8(sp)
800623c: dc400117 ldw r17,4(sp)
8006240: dc000017 ldw r16,0(sp)
8006244: dec00504 addi sp,sp,20
8006248: f800283a ret
800624c: 880d883a mov r6,r17
8006250: 04c00044 movi r19,1
8006254: 8023883a mov r17,r16
8006258: 3021883a mov r16,r6
800625c: 003fac06 br 8006110 <__mdiff+0x3c>
08006260 <__lshift>:
8006260: defff904 addi sp,sp,-28
8006264: 28800417 ldw r2,16(r5)
8006268: dc000015 stw r16,0(sp)
800626c: 3021d17a srai r16,r6,5
8006270: 28c00217 ldw r3,8(r5)
8006274: 10800044 addi r2,r2,1
8006278: dc400115 stw r17,4(sp)
800627c: 80a3883a add r17,r16,r2
8006280: dd400515 stw r21,20(sp)
8006284: dd000415 stw r20,16(sp)
8006288: dc800215 stw r18,8(sp)
800628c: dfc00615 stw ra,24(sp)
8006290: 2825883a mov r18,r5
8006294: dcc00315 stw r19,12(sp)
8006298: 3029883a mov r20,r6
800629c: 202b883a mov r21,r4
80062a0: 29400117 ldw r5,4(r5)
80062a4: 1c40030e bge r3,r17,80062b4 <__lshift+0x54>
80062a8: 18c7883a add r3,r3,r3
80062ac: 29400044 addi r5,r5,1
80062b0: 1c7ffd16 blt r3,r17,80062a8 <__lshift+0x48>
80062b4: a809883a mov r4,r21
80062b8: 8005e9c0 call 8005e9c <_Balloc>
80062bc: 1027883a mov r19,r2
80062c0: 11400504 addi r5,r2,20
80062c4: 0400090e bge zero,r16,80062ec <__lshift+0x8c>
80062c8: 2805883a mov r2,r5
80062cc: 0007883a mov r3,zero
80062d0: 18c00044 addi r3,r3,1
80062d4: 10000015 stw zero,0(r2)
80062d8: 10800104 addi r2,r2,4
80062dc: 80fffc1e bne r16,r3,80062d0 <__lshift+0x70>
80062e0: 8405883a add r2,r16,r16
80062e4: 1085883a add r2,r2,r2
80062e8: 288b883a add r5,r5,r2
80062ec: 90800417 ldw r2,16(r18)
80062f0: 91000504 addi r4,r18,20
80062f4: a18007cc andi r6,r20,31
80062f8: 1085883a add r2,r2,r2
80062fc: 1085883a add r2,r2,r2
8006300: 208f883a add r7,r4,r2
8006304: 30001e26 beq r6,zero,8006380 <__lshift+0x120>
8006308: 00800804 movi r2,32
800630c: 1191c83a sub r8,r2,r6
8006310: 0007883a mov r3,zero
8006314: 20800017 ldw r2,0(r4)
8006318: 1184983a sll r2,r2,r6
800631c: 1884b03a or r2,r3,r2
8006320: 28800015 stw r2,0(r5)
8006324: 20c00017 ldw r3,0(r4)
8006328: 21000104 addi r4,r4,4
800632c: 29400104 addi r5,r5,4
8006330: 1a06d83a srl r3,r3,r8
8006334: 21fff736 bltu r4,r7,8006314 <__lshift+0xb4>
8006338: 28c00015 stw r3,0(r5)
800633c: 18000126 beq r3,zero,8006344 <__lshift+0xe4>
8006340: 8c400044 addi r17,r17,1
8006344: 88bfffc4 addi r2,r17,-1
8006348: 98800415 stw r2,16(r19)
800634c: a809883a mov r4,r21
8006350: 900b883a mov r5,r18
8006354: 800591c0 call 800591c <_Bfree>
8006358: 9805883a mov r2,r19
800635c: dfc00617 ldw ra,24(sp)
8006360: dd400517 ldw r21,20(sp)
8006364: dd000417 ldw r20,16(sp)
8006368: dcc00317 ldw r19,12(sp)
800636c: dc800217 ldw r18,8(sp)
8006370: dc400117 ldw r17,4(sp)
8006374: dc000017 ldw r16,0(sp)
8006378: dec00704 addi sp,sp,28
800637c: f800283a ret
8006380: 20800017 ldw r2,0(r4)
8006384: 21000104 addi r4,r4,4
8006388: 28800015 stw r2,0(r5)
800638c: 29400104 addi r5,r5,4
8006390: 21ffec2e bgeu r4,r7,8006344 <__lshift+0xe4>
8006394: 20800017 ldw r2,0(r4)
8006398: 21000104 addi r4,r4,4
800639c: 28800015 stw r2,0(r5)
80063a0: 29400104 addi r5,r5,4
80063a4: 21fff636 bltu r4,r7,8006380 <__lshift+0x120>
80063a8: 003fe606 br 8006344 <__lshift+0xe4>
080063ac <__multiply>:
80063ac: defff004 addi sp,sp,-64
80063b0: dc800815 stw r18,32(sp)
80063b4: dc400715 stw r17,28(sp)
80063b8: 2c800417 ldw r18,16(r5)
80063bc: 34400417 ldw r17,16(r6)
80063c0: dcc00915 stw r19,36(sp)
80063c4: dc000615 stw r16,24(sp)
80063c8: dfc00f15 stw ra,60(sp)
80063cc: df000e15 stw fp,56(sp)
80063d0: ddc00d15 stw r23,52(sp)
80063d4: dd800c15 stw r22,48(sp)
80063d8: dd400b15 stw r21,44(sp)
80063dc: dd000a15 stw r20,40(sp)
80063e0: 2821883a mov r16,r5
80063e4: 3027883a mov r19,r6
80063e8: 9440040e bge r18,r17,80063fc <__multiply+0x50>
80063ec: 8825883a mov r18,r17
80063f0: 2c400417 ldw r17,16(r5)
80063f4: 2827883a mov r19,r5
80063f8: 3021883a mov r16,r6
80063fc: 80800217 ldw r2,8(r16)
8006400: 9447883a add r3,r18,r17
8006404: d8c00415 stw r3,16(sp)
8006408: 81400117 ldw r5,4(r16)
800640c: 10c0010e bge r2,r3,8006414 <__multiply+0x68>
8006410: 29400044 addi r5,r5,1
8006414: 8005e9c0 call 8005e9c <_Balloc>
8006418: d8800515 stw r2,20(sp)
800641c: d9000417 ldw r4,16(sp)
8006420: d8c00517 ldw r3,20(sp)
8006424: 2105883a add r2,r4,r4
8006428: 1085883a add r2,r2,r2
800642c: 19000504 addi r4,r3,20
8006430: 2085883a add r2,r4,r2
8006434: d8800315 stw r2,12(sp)
8006438: 2080052e bgeu r4,r2,8006450 <__multiply+0xa4>
800643c: 2005883a mov r2,r4
8006440: d8c00317 ldw r3,12(sp)
8006444: 10000015 stw zero,0(r2)
8006448: 10800104 addi r2,r2,4
800644c: 10fffc36 bltu r2,r3,8006440 <__multiply+0x94>
8006450: 8c45883a add r2,r17,r17
8006454: 9487883a add r3,r18,r18
8006458: 9dc00504 addi r23,r19,20
800645c: 1085883a add r2,r2,r2
8006460: 84000504 addi r16,r16,20
8006464: 18c7883a add r3,r3,r3
8006468: b885883a add r2,r23,r2
800646c: dc000015 stw r16,0(sp)
8006470: d8800215 stw r2,8(sp)
8006474: 80f9883a add fp,r16,r3
8006478: b880432e bgeu r23,r2,8006588 <__multiply+0x1dc>
800647c: d9000115 stw r4,4(sp)
8006480: b9000017 ldw r4,0(r23)
8006484: 253fffcc andi r20,r4,65535
8006488: a0001a26 beq r20,zero,80064f4 <__multiply+0x148>
800648c: dcc00017 ldw r19,0(sp)
8006490: dc800117 ldw r18,4(sp)
8006494: 002b883a mov r21,zero
8006498: 9c400017 ldw r17,0(r19)
800649c: 94000017 ldw r16,0(r18)
80064a0: a009883a mov r4,r20
80064a4: 897fffcc andi r5,r17,65535
80064a8: 80096e40 call 80096e4 <__mulsi3>
80064ac: 880ad43a srli r5,r17,16
80064b0: 80ffffcc andi r3,r16,65535
80064b4: a8c7883a add r3,r21,r3
80064b8: a009883a mov r4,r20
80064bc: 10e3883a add r17,r2,r3
80064c0: 8020d43a srli r16,r16,16
80064c4: 80096e40 call 80096e4 <__mulsi3>
80064c8: 8806d43a srli r3,r17,16
80064cc: 1405883a add r2,r2,r16
80064d0: 9cc00104 addi r19,r19,4
80064d4: 1887883a add r3,r3,r2
80064d8: 90c0008d sth r3,2(r18)
80064dc: 9440000d sth r17,0(r18)
80064e0: 182ad43a srli r21,r3,16
80064e4: 94800104 addi r18,r18,4
80064e8: 9f3feb36 bltu r19,fp,8006498 <__multiply+0xec>
80064ec: 95400015 stw r21,0(r18)
80064f0: b9000017 ldw r4,0(r23)
80064f4: 202ad43a srli r21,r4,16
80064f8: a8001c26 beq r21,zero,800656c <__multiply+0x1c0>
80064fc: d9000117 ldw r4,4(sp)
8006500: dd000017 ldw r20,0(sp)
8006504: 002d883a mov r22,zero
8006508: 24c00017 ldw r19,0(r4)
800650c: 2025883a mov r18,r4
8006510: 9823883a mov r17,r19
8006514: a4000017 ldw r16,0(r20)
8006518: a809883a mov r4,r21
800651c: a5000104 addi r20,r20,4
8006520: 817fffcc andi r5,r16,65535
8006524: 80096e40 call 80096e4 <__mulsi3>
8006528: 8806d43a srli r3,r17,16
800652c: 800ad43a srli r5,r16,16
8006530: 94c0000d sth r19,0(r18)
8006534: b0c7883a add r3,r22,r3
8006538: 10e1883a add r16,r2,r3
800653c: 9400008d sth r16,2(r18)
8006540: a809883a mov r4,r21
8006544: 94800104 addi r18,r18,4
8006548: 80096e40 call 80096e4 <__mulsi3>
800654c: 94400017 ldw r17,0(r18)
8006550: 8020d43a srli r16,r16,16
8006554: 88ffffcc andi r3,r17,65535
8006558: 10c5883a add r2,r2,r3
800655c: 80a7883a add r19,r16,r2
8006560: 982cd43a srli r22,r19,16
8006564: a73feb36 bltu r20,fp,8006514 <__multiply+0x168>
8006568: 94c00015 stw r19,0(r18)
800656c: d8800217 ldw r2,8(sp)
8006570: bdc00104 addi r23,r23,4
8006574: b880042e bgeu r23,r2,8006588 <__multiply+0x1dc>
8006578: d8c00117 ldw r3,4(sp)
800657c: 18c00104 addi r3,r3,4
8006580: d8c00115 stw r3,4(sp)
8006584: 003fbe06 br 8006480 <__multiply+0xd4>
8006588: d9000417 ldw r4,16(sp)
800658c: 01000c0e bge zero,r4,80065c0 <__multiply+0x214>
8006590: d8c00317 ldw r3,12(sp)
8006594: 18bfff17 ldw r2,-4(r3)
8006598: 18ffff04 addi r3,r3,-4
800659c: 10000326 beq r2,zero,80065ac <__multiply+0x200>
80065a0: 00000706 br 80065c0 <__multiply+0x214>
80065a4: 18800017 ldw r2,0(r3)
80065a8: 1000051e bne r2,zero,80065c0 <__multiply+0x214>
80065ac: d9000417 ldw r4,16(sp)
80065b0: 18ffff04 addi r3,r3,-4
80065b4: 213fffc4 addi r4,r4,-1
80065b8: d9000415 stw r4,16(sp)
80065bc: 203ff91e bne r4,zero,80065a4 <__multiply+0x1f8>
80065c0: d8800417 ldw r2,16(sp)
80065c4: d8c00517 ldw r3,20(sp)
80065c8: 18800415 stw r2,16(r3)
80065cc: 1805883a mov r2,r3
80065d0: dfc00f17 ldw ra,60(sp)
80065d4: df000e17 ldw fp,56(sp)
80065d8: ddc00d17 ldw r23,52(sp)
80065dc: dd800c17 ldw r22,48(sp)
80065e0: dd400b17 ldw r21,44(sp)
80065e4: dd000a17 ldw r20,40(sp)
80065e8: dcc00917 ldw r19,36(sp)
80065ec: dc800817 ldw r18,32(sp)
80065f0: dc400717 ldw r17,28(sp)
80065f4: dc000617 ldw r16,24(sp)
80065f8: dec01004 addi sp,sp,64
80065fc: f800283a ret
08006600 <__i2b>:
8006600: defffd04 addi sp,sp,-12
8006604: dc000015 stw r16,0(sp)
8006608: 04000044 movi r16,1
800660c: dc800115 stw r18,4(sp)
8006610: 2825883a mov r18,r5
8006614: 800b883a mov r5,r16
8006618: dfc00215 stw ra,8(sp)
800661c: 8005e9c0 call 8005e9c <_Balloc>
8006620: 14000415 stw r16,16(r2)
8006624: 14800515 stw r18,20(r2)
8006628: dfc00217 ldw ra,8(sp)
800662c: dc800117 ldw r18,4(sp)
8006630: dc000017 ldw r16,0(sp)
8006634: dec00304 addi sp,sp,12
8006638: f800283a ret
0800663c <__multadd>:
800663c: defff604 addi sp,sp,-40
8006640: dd800615 stw r22,24(sp)
8006644: 2d800417 ldw r22,16(r5)
8006648: df000815 stw fp,32(sp)
800664c: ddc00715 stw r23,28(sp)
8006650: dd400515 stw r21,20(sp)
8006654: dd000415 stw r20,16(sp)
8006658: dcc00315 stw r19,12(sp)
800665c: dc800215 stw r18,8(sp)
8006660: dfc00915 stw ra,36(sp)
8006664: dc400115 stw r17,4(sp)
8006668: dc000015 stw r16,0(sp)
800666c: 282f883a mov r23,r5
8006670: 2039883a mov fp,r4
8006674: 302b883a mov r21,r6
8006678: 3829883a mov r20,r7
800667c: 2c800504 addi r18,r5,20
8006680: 0027883a mov r19,zero
8006684: 94400017 ldw r17,0(r18)
8006688: a80b883a mov r5,r21
800668c: 9cc00044 addi r19,r19,1
8006690: 893fffcc andi r4,r17,65535
8006694: 80096e40 call 80096e4 <__mulsi3>
8006698: 8808d43a srli r4,r17,16
800669c: 1521883a add r16,r2,r20
80066a0: a80b883a mov r5,r21
80066a4: 80096e40 call 80096e4 <__mulsi3>
80066a8: 8008d43a srli r4,r16,16
80066ac: 843fffcc andi r16,r16,65535
80066b0: 1105883a add r2,r2,r4
80066b4: 1006943a slli r3,r2,16
80066b8: 1028d43a srli r20,r2,16
80066bc: 1c07883a add r3,r3,r16
80066c0: 90c00015 stw r3,0(r18)
80066c4: 94800104 addi r18,r18,4
80066c8: 9dbfee16 blt r19,r22,8006684 <__multadd+0x48>
80066cc: a0000826 beq r20,zero,80066f0 <__multadd+0xb4>
80066d0: b8800217 ldw r2,8(r23)
80066d4: b080130e bge r22,r2,8006724 <__multadd+0xe8>
80066d8: b585883a add r2,r22,r22
80066dc: 1085883a add r2,r2,r2
80066e0: 15c5883a add r2,r2,r23
80066e4: b0c00044 addi r3,r22,1
80066e8: 15000515 stw r20,20(r2)
80066ec: b8c00415 stw r3,16(r23)
80066f0: b805883a mov r2,r23
80066f4: dfc00917 ldw ra,36(sp)
80066f8: df000817 ldw fp,32(sp)
80066fc: ddc00717 ldw r23,28(sp)
8006700: dd800617 ldw r22,24(sp)
8006704: dd400517 ldw r21,20(sp)
8006708: dd000417 ldw r20,16(sp)
800670c: dcc00317 ldw r19,12(sp)
8006710: dc800217 ldw r18,8(sp)
8006714: dc400117 ldw r17,4(sp)
8006718: dc000017 ldw r16,0(sp)
800671c: dec00a04 addi sp,sp,40
8006720: f800283a ret
8006724: b9400117 ldw r5,4(r23)
8006728: e009883a mov r4,fp
800672c: 29400044 addi r5,r5,1
8006730: 8005e9c0 call 8005e9c <_Balloc>
8006734: b9800417 ldw r6,16(r23)
8006738: b9400304 addi r5,r23,12
800673c: 11000304 addi r4,r2,12
8006740: 318d883a add r6,r6,r6
8006744: 318d883a add r6,r6,r6
8006748: 31800204 addi r6,r6,8
800674c: 1023883a mov r17,r2
8006750: 80057040 call 8005704 <memcpy>
8006754: b80b883a mov r5,r23
8006758: e009883a mov r4,fp
800675c: 800591c0 call 800591c <_Bfree>
8006760: 882f883a mov r23,r17
8006764: 003fdc06 br 80066d8 <__multadd+0x9c>
08006768 <__pow5mult>:
8006768: defffa04 addi sp,sp,-24
800676c: 308000cc andi r2,r6,3
8006770: dd000415 stw r20,16(sp)
8006774: dcc00315 stw r19,12(sp)
8006778: dc000015 stw r16,0(sp)
800677c: dfc00515 stw ra,20(sp)
8006780: dc800215 stw r18,8(sp)
8006784: dc400115 stw r17,4(sp)
8006788: 3021883a mov r16,r6
800678c: 2027883a mov r19,r4
8006790: 2829883a mov r20,r5
8006794: 10002b1e bne r2,zero,8006844 <__pow5mult+0xdc>
8006798: 8025d0ba srai r18,r16,2
800679c: 90001b26 beq r18,zero,800680c <__pow5mult+0xa4>
80067a0: 9c001217 ldw r16,72(r19)
80067a4: 8000081e bne r16,zero,80067c8 <__pow5mult+0x60>
80067a8: 00003006 br 800686c <__pow5mult+0x104>
80067ac: 800b883a mov r5,r16
80067b0: 800d883a mov r6,r16
80067b4: 9809883a mov r4,r19
80067b8: 90001426 beq r18,zero,800680c <__pow5mult+0xa4>
80067bc: 80800017 ldw r2,0(r16)
80067c0: 10001b26 beq r2,zero,8006830 <__pow5mult+0xc8>
80067c4: 1021883a mov r16,r2
80067c8: 9080004c andi r2,r18,1
80067cc: 1005003a cmpeq r2,r2,zero
80067d0: 9025d07a srai r18,r18,1
80067d4: 800d883a mov r6,r16
80067d8: 9809883a mov r4,r19
80067dc: a00b883a mov r5,r20
80067e0: 103ff21e bne r2,zero,80067ac <__pow5mult+0x44>
80067e4: 80063ac0 call 80063ac <__multiply>
80067e8: a00b883a mov r5,r20
80067ec: 9809883a mov r4,r19
80067f0: 1023883a mov r17,r2
80067f4: 800591c0 call 800591c <_Bfree>
80067f8: 8829883a mov r20,r17
80067fc: 800b883a mov r5,r16
8006800: 800d883a mov r6,r16
8006804: 9809883a mov r4,r19
8006808: 903fec1e bne r18,zero,80067bc <__pow5mult+0x54>
800680c: a005883a mov r2,r20
8006810: dfc00517 ldw ra,20(sp)
8006814: dd000417 ldw r20,16(sp)
8006818: dcc00317 ldw r19,12(sp)
800681c: dc800217 ldw r18,8(sp)
8006820: dc400117 ldw r17,4(sp)
8006824: dc000017 ldw r16,0(sp)
8006828: dec00604 addi sp,sp,24
800682c: f800283a ret
8006830: 80063ac0 call 80063ac <__multiply>
8006834: 80800015 stw r2,0(r16)
8006838: 1021883a mov r16,r2
800683c: 10000015 stw zero,0(r2)
8006840: 003fe106 br 80067c8 <__pow5mult+0x60>
8006844: 1085883a add r2,r2,r2
8006848: 00c20074 movhi r3,2049
800684c: 18f81b04 addi r3,r3,-8084
8006850: 1085883a add r2,r2,r2
8006854: 10c5883a add r2,r2,r3
8006858: 11bfff17 ldw r6,-4(r2)
800685c: 000f883a mov r7,zero
8006860: 800663c0 call 800663c <__multadd>
8006864: 1029883a mov r20,r2
8006868: 003fcb06 br 8006798 <__pow5mult+0x30>
800686c: 9809883a mov r4,r19
8006870: 01409c44 movi r5,625
8006874: 80066000 call 8006600 <__i2b>
8006878: 98801215 stw r2,72(r19)
800687c: 1021883a mov r16,r2
8006880: 10000015 stw zero,0(r2)
8006884: 003fd006 br 80067c8 <__pow5mult+0x60>
08006888 <__s2b>:
8006888: defff904 addi sp,sp,-28
800688c: dcc00315 stw r19,12(sp)
8006890: dc800215 stw r18,8(sp)
8006894: 2827883a mov r19,r5
8006898: 2025883a mov r18,r4
800689c: 01400244 movi r5,9
80068a0: 39000204 addi r4,r7,8
80068a4: dd000415 stw r20,16(sp)
80068a8: dc400115 stw r17,4(sp)
80068ac: dfc00615 stw ra,24(sp)
80068b0: dd400515 stw r21,20(sp)
80068b4: dc000015 stw r16,0(sp)
80068b8: 3829883a mov r20,r7
80068bc: 3023883a mov r17,r6
80068c0: 80096140 call 8009614 <__divsi3>
80068c4: 00c00044 movi r3,1
80068c8: 1880350e bge r3,r2,80069a0 <__s2b+0x118>
80068cc: 000b883a mov r5,zero
80068d0: 18c7883a add r3,r3,r3
80068d4: 29400044 addi r5,r5,1
80068d8: 18bffd16 blt r3,r2,80068d0 <__s2b+0x48>
80068dc: 9009883a mov r4,r18
80068e0: 8005e9c0 call 8005e9c <_Balloc>
80068e4: 1011883a mov r8,r2
80068e8: d8800717 ldw r2,28(sp)
80068ec: 00c00044 movi r3,1
80068f0: 01800244 movi r6,9
80068f4: 40800515 stw r2,20(r8)
80068f8: 40c00415 stw r3,16(r8)
80068fc: 3440260e bge r6,r17,8006998 <__s2b+0x110>
8006900: 3021883a mov r16,r6
8006904: 99ab883a add r21,r19,r6
8006908: 9c05883a add r2,r19,r16
800690c: 11c00007 ldb r7,0(r2)
8006910: 400b883a mov r5,r8
8006914: 9009883a mov r4,r18
8006918: 39fff404 addi r7,r7,-48
800691c: 01800284 movi r6,10
8006920: 800663c0 call 800663c <__multadd>
8006924: 84000044 addi r16,r16,1
8006928: 1011883a mov r8,r2
800692c: 8c3ff61e bne r17,r16,8006908 <__s2b+0x80>
8006930: ac45883a add r2,r21,r17
8006934: 117ffe04 addi r5,r2,-8
8006938: 880d883a mov r6,r17
800693c: 35000c0e bge r6,r20,8006970 <__s2b+0xe8>
8006940: a185c83a sub r2,r20,r6
8006944: 2821883a mov r16,r5
8006948: 28a3883a add r17,r5,r2
800694c: 81c00007 ldb r7,0(r16)
8006950: 400b883a mov r5,r8
8006954: 9009883a mov r4,r18
8006958: 39fff404 addi r7,r7,-48
800695c: 01800284 movi r6,10
8006960: 800663c0 call 800663c <__multadd>
8006964: 84000044 addi r16,r16,1
8006968: 1011883a mov r8,r2
800696c: 847ff71e bne r16,r17,800694c <__s2b+0xc4>
8006970: 4005883a mov r2,r8
8006974: dfc00617 ldw ra,24(sp)
8006978: dd400517 ldw r21,20(sp)
800697c: dd000417 ldw r20,16(sp)
8006980: dcc00317 ldw r19,12(sp)
8006984: dc800217 ldw r18,8(sp)
8006988: dc400117 ldw r17,4(sp)
800698c: dc000017 ldw r16,0(sp)
8006990: dec00704 addi sp,sp,28
8006994: f800283a ret
8006998: 99400284 addi r5,r19,10
800699c: 003fe706 br 800693c <__s2b+0xb4>
80069a0: 000b883a mov r5,zero
80069a4: 003fcd06 br 80068dc <__s2b+0x54>
080069a8 <_realloc_r>:
80069a8: defff404 addi sp,sp,-48
80069ac: dd800815 stw r22,32(sp)
80069b0: dc800415 stw r18,16(sp)
80069b4: dc400315 stw r17,12(sp)
80069b8: dfc00b15 stw ra,44(sp)
80069bc: df000a15 stw fp,40(sp)
80069c0: ddc00915 stw r23,36(sp)
80069c4: dd400715 stw r21,28(sp)
80069c8: dd000615 stw r20,24(sp)
80069cc: dcc00515 stw r19,20(sp)
80069d0: dc000215 stw r16,8(sp)
80069d4: 2825883a mov r18,r5
80069d8: 3023883a mov r17,r6
80069dc: 202d883a mov r22,r4
80069e0: 2800c926 beq r5,zero,8006d08 <_realloc_r+0x360>
80069e4: 800a44c0 call 800a44c <__malloc_lock>
80069e8: 943ffe04 addi r16,r18,-8
80069ec: 88c002c4 addi r3,r17,11
80069f0: 00800584 movi r2,22
80069f4: 82000117 ldw r8,4(r16)
80069f8: 10c01b2e bgeu r2,r3,8006a68 <_realloc_r+0xc0>
80069fc: 00bffe04 movi r2,-8
8006a00: 188e703a and r7,r3,r2
8006a04: 3839883a mov fp,r7
8006a08: 38001a16 blt r7,zero,8006a74 <_realloc_r+0xcc>
8006a0c: e4401936 bltu fp,r17,8006a74 <_realloc_r+0xcc>
8006a10: 013fff04 movi r4,-4
8006a14: 4126703a and r19,r8,r4
8006a18: 99c02616 blt r19,r7,8006ab4 <_realloc_r+0x10c>
8006a1c: 802b883a mov r21,r16
8006a20: 9829883a mov r20,r19
8006a24: 84000204 addi r16,r16,8
8006a28: a80f883a mov r7,r21
8006a2c: a70dc83a sub r6,r20,fp
8006a30: 008003c4 movi r2,15
8006a34: 1180c136 bltu r2,r6,8006d3c <_realloc_r+0x394>
8006a38: 38800117 ldw r2,4(r7)
8006a3c: a549883a add r4,r20,r21
8006a40: 1080004c andi r2,r2,1
8006a44: a084b03a or r2,r20,r2
8006a48: 38800115 stw r2,4(r7)
8006a4c: 20c00117 ldw r3,4(r4)
8006a50: 18c00054 ori r3,r3,1
8006a54: 20c00115 stw r3,4(r4)
8006a58: b009883a mov r4,r22
8006a5c: 800a46c0 call 800a46c <__malloc_unlock>
8006a60: 8023883a mov r17,r16
8006a64: 00000606 br 8006a80 <_realloc_r+0xd8>
8006a68: 01c00404 movi r7,16
8006a6c: 3839883a mov fp,r7
8006a70: e47fe72e bgeu fp,r17,8006a10 <_realloc_r+0x68>
8006a74: 00800304 movi r2,12
8006a78: 0023883a mov r17,zero
8006a7c: b0800015 stw r2,0(r22)
8006a80: 8805883a mov r2,r17
8006a84: dfc00b17 ldw ra,44(sp)
8006a88: df000a17 ldw fp,40(sp)
8006a8c: ddc00917 ldw r23,36(sp)
8006a90: dd800817 ldw r22,32(sp)
8006a94: dd400717 ldw r21,28(sp)
8006a98: dd000617 ldw r20,24(sp)
8006a9c: dcc00517 ldw r19,20(sp)
8006aa0: dc800417 ldw r18,16(sp)
8006aa4: dc400317 ldw r17,12(sp)
8006aa8: dc000217 ldw r16,8(sp)
8006aac: dec00c04 addi sp,sp,48
8006ab0: f800283a ret
8006ab4: 00820074 movhi r2,2049
8006ab8: 10b99204 addi r2,r2,-6584
8006abc: 12400217 ldw r9,8(r2)
8006ac0: 84cd883a add r6,r16,r19
8006ac4: 802b883a mov r21,r16
8006ac8: 3240b926 beq r6,r9,8006db0 <_realloc_r+0x408>
8006acc: 31400117 ldw r5,4(r6)
8006ad0: 00bfff84 movi r2,-2
8006ad4: 2884703a and r2,r5,r2
8006ad8: 1185883a add r2,r2,r6
8006adc: 10c00117 ldw r3,4(r2)
8006ae0: 18c0004c andi r3,r3,1
8006ae4: 1807003a cmpeq r3,r3,zero
8006ae8: 1800a326 beq r3,zero,8006d78 <_realloc_r+0x3d0>
8006aec: 2908703a and r4,r5,r4
8006af0: 9929883a add r20,r19,r4
8006af4: a1c0a30e bge r20,r7,8006d84 <_realloc_r+0x3dc>
8006af8: 4080004c andi r2,r8,1
8006afc: 1000551e bne r2,zero,8006c54 <_realloc_r+0x2ac>
8006b00: 80800017 ldw r2,0(r16)
8006b04: 80afc83a sub r23,r16,r2
8006b08: b8c00117 ldw r3,4(r23)
8006b0c: 00bfff04 movi r2,-4
8006b10: 1884703a and r2,r3,r2
8006b14: 30002e26 beq r6,zero,8006bd0 <_realloc_r+0x228>
8006b18: 3240b926 beq r6,r9,8006e00 <_realloc_r+0x458>
8006b1c: 98a9883a add r20,r19,r2
8006b20: 2509883a add r4,r4,r20
8006b24: d9000015 stw r4,0(sp)
8006b28: 21c02a16 blt r4,r7,8006bd4 <_realloc_r+0x22c>
8006b2c: 30800317 ldw r2,12(r6)
8006b30: 30c00217 ldw r3,8(r6)
8006b34: 01400904 movi r5,36
8006b38: 99bfff04 addi r6,r19,-4
8006b3c: 18800315 stw r2,12(r3)
8006b40: 10c00215 stw r3,8(r2)
8006b44: b9000317 ldw r4,12(r23)
8006b48: b8800217 ldw r2,8(r23)
8006b4c: b82b883a mov r21,r23
8006b50: bc000204 addi r16,r23,8
8006b54: 20800215 stw r2,8(r4)
8006b58: 11000315 stw r4,12(r2)
8006b5c: 2980e436 bltu r5,r6,8006ef0 <_realloc_r+0x548>
8006b60: 008004c4 movi r2,19
8006b64: 9009883a mov r4,r18
8006b68: 8011883a mov r8,r16
8006b6c: 11800f2e bgeu r2,r6,8006bac <_realloc_r+0x204>
8006b70: 90800017 ldw r2,0(r18)
8006b74: ba000404 addi r8,r23,16
8006b78: 91000204 addi r4,r18,8
8006b7c: b8800215 stw r2,8(r23)
8006b80: 90c00117 ldw r3,4(r18)
8006b84: 008006c4 movi r2,27
8006b88: b8c00315 stw r3,12(r23)
8006b8c: 1180072e bgeu r2,r6,8006bac <_realloc_r+0x204>
8006b90: 90c00217 ldw r3,8(r18)
8006b94: ba000604 addi r8,r23,24
8006b98: 91000404 addi r4,r18,16
8006b9c: b8c00415 stw r3,16(r23)
8006ba0: 90800317 ldw r2,12(r18)
8006ba4: b8800515 stw r2,20(r23)
8006ba8: 3140e726 beq r6,r5,8006f48 <_realloc_r+0x5a0>
8006bac: 20800017 ldw r2,0(r4)
8006bb0: dd000017 ldw r20,0(sp)
8006bb4: b80f883a mov r7,r23
8006bb8: 40800015 stw r2,0(r8)
8006bbc: 20c00117 ldw r3,4(r4)
8006bc0: 40c00115 stw r3,4(r8)
8006bc4: 20800217 ldw r2,8(r4)
8006bc8: 40800215 stw r2,8(r8)
8006bcc: 003f9706 br 8006a2c <_realloc_r+0x84>
8006bd0: 98a9883a add r20,r19,r2
8006bd4: a1c01f16 blt r20,r7,8006c54 <_realloc_r+0x2ac>
8006bd8: b8c00317 ldw r3,12(r23)
8006bdc: b8800217 ldw r2,8(r23)
8006be0: 99bfff04 addi r6,r19,-4
8006be4: 01400904 movi r5,36
8006be8: b82b883a mov r21,r23
8006bec: 18800215 stw r2,8(r3)
8006bf0: 10c00315 stw r3,12(r2)
8006bf4: bc000204 addi r16,r23,8
8006bf8: 2980c336 bltu r5,r6,8006f08 <_realloc_r+0x560>
8006bfc: 008004c4 movi r2,19
8006c00: 9009883a mov r4,r18
8006c04: 8011883a mov r8,r16
8006c08: 11800f2e bgeu r2,r6,8006c48 <_realloc_r+0x2a0>
8006c0c: 90800017 ldw r2,0(r18)
8006c10: ba000404 addi r8,r23,16
8006c14: 91000204 addi r4,r18,8
8006c18: b8800215 stw r2,8(r23)
8006c1c: 90c00117 ldw r3,4(r18)
8006c20: 008006c4 movi r2,27
8006c24: b8c00315 stw r3,12(r23)
8006c28: 1180072e bgeu r2,r6,8006c48 <_realloc_r+0x2a0>
8006c2c: 90c00217 ldw r3,8(r18)
8006c30: ba000604 addi r8,r23,24
8006c34: 91000404 addi r4,r18,16
8006c38: b8c00415 stw r3,16(r23)
8006c3c: 90800317 ldw r2,12(r18)
8006c40: b8800515 stw r2,20(r23)
8006c44: 3140c726 beq r6,r5,8006f64 <_realloc_r+0x5bc>
8006c48: 20800017 ldw r2,0(r4)
8006c4c: b80f883a mov r7,r23
8006c50: 003fd906 br 8006bb8 <_realloc_r+0x210>
8006c54: 880b883a mov r5,r17
8006c58: b009883a mov r4,r22
8006c5c: 8004ee00 call 8004ee0 <_malloc_r>
8006c60: 1023883a mov r17,r2
8006c64: 10002526 beq r2,zero,8006cfc <_realloc_r+0x354>
8006c68: 80800117 ldw r2,4(r16)
8006c6c: 00ffff84 movi r3,-2
8006c70: 893ffe04 addi r4,r17,-8
8006c74: 10c4703a and r2,r2,r3
8006c78: 8085883a add r2,r16,r2
8006c7c: 20809526 beq r4,r2,8006ed4 <_realloc_r+0x52c>
8006c80: 99bfff04 addi r6,r19,-4
8006c84: 01c00904 movi r7,36
8006c88: 39804536 bltu r7,r6,8006da0 <_realloc_r+0x3f8>
8006c8c: 008004c4 movi r2,19
8006c90: 9009883a mov r4,r18
8006c94: 880b883a mov r5,r17
8006c98: 11800f2e bgeu r2,r6,8006cd8 <_realloc_r+0x330>
8006c9c: 90800017 ldw r2,0(r18)
8006ca0: 89400204 addi r5,r17,8
8006ca4: 91000204 addi r4,r18,8
8006ca8: 88800015 stw r2,0(r17)
8006cac: 90c00117 ldw r3,4(r18)
8006cb0: 008006c4 movi r2,27
8006cb4: 88c00115 stw r3,4(r17)
8006cb8: 1180072e bgeu r2,r6,8006cd8 <_realloc_r+0x330>
8006cbc: 90c00217 ldw r3,8(r18)
8006cc0: 89400404 addi r5,r17,16
8006cc4: 91000404 addi r4,r18,16
8006cc8: 88c00215 stw r3,8(r17)
8006ccc: 90800317 ldw r2,12(r18)
8006cd0: 88800315 stw r2,12(r17)
8006cd4: 31c09126 beq r6,r7,8006f1c <_realloc_r+0x574>
8006cd8: 20800017 ldw r2,0(r4)
8006cdc: 28800015 stw r2,0(r5)
8006ce0: 20c00117 ldw r3,4(r4)
8006ce4: 28c00115 stw r3,4(r5)
8006ce8: 20800217 ldw r2,8(r4)
8006cec: 28800215 stw r2,8(r5)
8006cf0: 900b883a mov r5,r18
8006cf4: b009883a mov r4,r22
8006cf8: 80043580 call 8004358 <_free_r>
8006cfc: b009883a mov r4,r22
8006d00: 800a46c0 call 800a46c <__malloc_unlock>
8006d04: 003f5e06 br 8006a80 <_realloc_r+0xd8>
8006d08: 300b883a mov r5,r6
8006d0c: dfc00b17 ldw ra,44(sp)
8006d10: df000a17 ldw fp,40(sp)
8006d14: ddc00917 ldw r23,36(sp)
8006d18: dd800817 ldw r22,32(sp)
8006d1c: dd400717 ldw r21,28(sp)
8006d20: dd000617 ldw r20,24(sp)
8006d24: dcc00517 ldw r19,20(sp)
8006d28: dc800417 ldw r18,16(sp)
8006d2c: dc400317 ldw r17,12(sp)
8006d30: dc000217 ldw r16,8(sp)
8006d34: dec00c04 addi sp,sp,48
8006d38: 8004ee01 jmpi 8004ee0 <_malloc_r>
8006d3c: 38800117 ldw r2,4(r7)
8006d40: e54b883a add r5,fp,r21
8006d44: 31000054 ori r4,r6,1
8006d48: 1080004c andi r2,r2,1
8006d4c: 1704b03a or r2,r2,fp
8006d50: 38800115 stw r2,4(r7)
8006d54: 29000115 stw r4,4(r5)
8006d58: 2987883a add r3,r5,r6
8006d5c: 18800117 ldw r2,4(r3)
8006d60: 29400204 addi r5,r5,8
8006d64: b009883a mov r4,r22
8006d68: 10800054 ori r2,r2,1
8006d6c: 18800115 stw r2,4(r3)
8006d70: 80043580 call 8004358 <_free_r>
8006d74: 003f3806 br 8006a58 <_realloc_r+0xb0>
8006d78: 000d883a mov r6,zero
8006d7c: 0009883a mov r4,zero
8006d80: 003f5d06 br 8006af8 <_realloc_r+0x150>
8006d84: 30c00217 ldw r3,8(r6)
8006d88: 30800317 ldw r2,12(r6)
8006d8c: 800f883a mov r7,r16
8006d90: 84000204 addi r16,r16,8
8006d94: 10c00215 stw r3,8(r2)
8006d98: 18800315 stw r2,12(r3)
8006d9c: 003f2306 br 8006a2c <_realloc_r+0x84>
8006da0: 8809883a mov r4,r17
8006da4: 900b883a mov r5,r18
8006da8: 80057a40 call 80057a4 <memmove>
8006dac: 003fd006 br 8006cf0 <_realloc_r+0x348>
8006db0: 30800117 ldw r2,4(r6)
8006db4: e0c00404 addi r3,fp,16
8006db8: 1108703a and r4,r2,r4
8006dbc: 9905883a add r2,r19,r4
8006dc0: 10ff4d16 blt r2,r3,8006af8 <_realloc_r+0x150>
8006dc4: 1705c83a sub r2,r2,fp
8006dc8: 870b883a add r5,r16,fp
8006dcc: 10800054 ori r2,r2,1
8006dd0: 28800115 stw r2,4(r5)
8006dd4: 80c00117 ldw r3,4(r16)
8006dd8: 00820074 movhi r2,2049
8006ddc: 10b99204 addi r2,r2,-6584
8006de0: b009883a mov r4,r22
8006de4: 18c0004c andi r3,r3,1
8006de8: e0c6b03a or r3,fp,r3
8006dec: 11400215 stw r5,8(r2)
8006df0: 80c00115 stw r3,4(r16)
8006df4: 800a46c0 call 800a46c <__malloc_unlock>
8006df8: 84400204 addi r17,r16,8
8006dfc: 003f2006 br 8006a80 <_realloc_r+0xd8>
8006e00: 98a9883a add r20,r19,r2
8006e04: 2509883a add r4,r4,r20
8006e08: e0800404 addi r2,fp,16
8006e0c: d9000115 stw r4,4(sp)
8006e10: 20bf7016 blt r4,r2,8006bd4 <_realloc_r+0x22c>
8006e14: b8c00317 ldw r3,12(r23)
8006e18: b8800217 ldw r2,8(r23)
8006e1c: 99bfff04 addi r6,r19,-4
8006e20: 01400904 movi r5,36
8006e24: 18800215 stw r2,8(r3)
8006e28: 10c00315 stw r3,12(r2)
8006e2c: bc400204 addi r17,r23,8
8006e30: 29804136 bltu r5,r6,8006f38 <_realloc_r+0x590>
8006e34: 008004c4 movi r2,19
8006e38: 9009883a mov r4,r18
8006e3c: 880f883a mov r7,r17
8006e40: 11800f2e bgeu r2,r6,8006e80 <_realloc_r+0x4d8>
8006e44: 90800017 ldw r2,0(r18)
8006e48: b9c00404 addi r7,r23,16
8006e4c: 91000204 addi r4,r18,8
8006e50: b8800215 stw r2,8(r23)
8006e54: 90c00117 ldw r3,4(r18)
8006e58: 008006c4 movi r2,27
8006e5c: b8c00315 stw r3,12(r23)
8006e60: 1180072e bgeu r2,r6,8006e80 <_realloc_r+0x4d8>
8006e64: 90c00217 ldw r3,8(r18)
8006e68: b9c00604 addi r7,r23,24
8006e6c: 91000404 addi r4,r18,16
8006e70: b8c00415 stw r3,16(r23)
8006e74: 90800317 ldw r2,12(r18)
8006e78: b8800515 stw r2,20(r23)
8006e7c: 31404026 beq r6,r5,8006f80 <_realloc_r+0x5d8>
8006e80: 20800017 ldw r2,0(r4)
8006e84: 38800015 stw r2,0(r7)
8006e88: 20c00117 ldw r3,4(r4)
8006e8c: 38c00115 stw r3,4(r7)
8006e90: 20800217 ldw r2,8(r4)
8006e94: 38800215 stw r2,8(r7)
8006e98: d8c00117 ldw r3,4(sp)
8006e9c: bf0b883a add r5,r23,fp
8006ea0: b009883a mov r4,r22
8006ea4: 1f05c83a sub r2,r3,fp
8006ea8: 10800054 ori r2,r2,1
8006eac: 28800115 stw r2,4(r5)
8006eb0: b8c00117 ldw r3,4(r23)
8006eb4: 00820074 movhi r2,2049
8006eb8: 10b99204 addi r2,r2,-6584
8006ebc: 11400215 stw r5,8(r2)
8006ec0: 18c0004c andi r3,r3,1
8006ec4: e0c6b03a or r3,fp,r3
8006ec8: b8c00115 stw r3,4(r23)
8006ecc: 800a46c0 call 800a46c <__malloc_unlock>
8006ed0: 003eeb06 br 8006a80 <_realloc_r+0xd8>
8006ed4: 20800117 ldw r2,4(r4)
8006ed8: 00ffff04 movi r3,-4
8006edc: 800f883a mov r7,r16
8006ee0: 10c4703a and r2,r2,r3
8006ee4: 98a9883a add r20,r19,r2
8006ee8: 84000204 addi r16,r16,8
8006eec: 003ecf06 br 8006a2c <_realloc_r+0x84>
8006ef0: 900b883a mov r5,r18
8006ef4: 8009883a mov r4,r16
8006ef8: 80057a40 call 80057a4 <memmove>
8006efc: dd000017 ldw r20,0(sp)
8006f00: b80f883a mov r7,r23
8006f04: 003ec906 br 8006a2c <_realloc_r+0x84>
8006f08: 900b883a mov r5,r18
8006f0c: 8009883a mov r4,r16
8006f10: 80057a40 call 80057a4 <memmove>
8006f14: b80f883a mov r7,r23
8006f18: 003ec406 br 8006a2c <_realloc_r+0x84>
8006f1c: 90c00417 ldw r3,16(r18)
8006f20: 89400604 addi r5,r17,24
8006f24: 91000604 addi r4,r18,24
8006f28: 88c00415 stw r3,16(r17)
8006f2c: 90800517 ldw r2,20(r18)
8006f30: 88800515 stw r2,20(r17)
8006f34: 003f6806 br 8006cd8 <_realloc_r+0x330>
8006f38: 900b883a mov r5,r18
8006f3c: 8809883a mov r4,r17
8006f40: 80057a40 call 80057a4 <memmove>
8006f44: 003fd406 br 8006e98 <_realloc_r+0x4f0>
8006f48: 90c00417 ldw r3,16(r18)
8006f4c: 91000604 addi r4,r18,24
8006f50: ba000804 addi r8,r23,32
8006f54: b8c00615 stw r3,24(r23)
8006f58: 90800517 ldw r2,20(r18)
8006f5c: b8800715 stw r2,28(r23)
8006f60: 003f1206 br 8006bac <_realloc_r+0x204>
8006f64: 90c00417 ldw r3,16(r18)
8006f68: 91000604 addi r4,r18,24
8006f6c: ba000804 addi r8,r23,32
8006f70: b8c00615 stw r3,24(r23)
8006f74: 90800517 ldw r2,20(r18)
8006f78: b8800715 stw r2,28(r23)
8006f7c: 003f3206 br 8006c48 <_realloc_r+0x2a0>
8006f80: 90c00417 ldw r3,16(r18)
8006f84: 91000604 addi r4,r18,24
8006f88: b9c00804 addi r7,r23,32
8006f8c: b8c00615 stw r3,24(r23)
8006f90: 90800517 ldw r2,20(r18)
8006f94: b8800715 stw r2,28(r23)
8006f98: 003fb906 br 8006e80 <_realloc_r+0x4d8>
08006f9c <__isinfd>:
8006f9c: 200d883a mov r6,r4
8006fa0: 0109c83a sub r4,zero,r4
8006fa4: 2188b03a or r4,r4,r6
8006fa8: 2008d7fa srli r4,r4,31
8006fac: 00a00034 movhi r2,32768
8006fb0: 10bfffc4 addi r2,r2,-1
8006fb4: 1144703a and r2,r2,r5
8006fb8: 2088b03a or r4,r4,r2
8006fbc: 009ffc34 movhi r2,32752
8006fc0: 1105c83a sub r2,r2,r4
8006fc4: 0087c83a sub r3,zero,r2
8006fc8: 10c4b03a or r2,r2,r3
8006fcc: 1004d7fa srli r2,r2,31
8006fd0: 00c00044 movi r3,1
8006fd4: 1885c83a sub r2,r3,r2
8006fd8: f800283a ret
08006fdc <__isnand>:
8006fdc: 200d883a mov r6,r4
8006fe0: 0109c83a sub r4,zero,r4
8006fe4: 2188b03a or r4,r4,r6
8006fe8: 2008d7fa srli r4,r4,31
8006fec: 00a00034 movhi r2,32768
8006ff0: 10bfffc4 addi r2,r2,-1
8006ff4: 1144703a and r2,r2,r5
8006ff8: 2088b03a or r4,r4,r2
8006ffc: 009ffc34 movhi r2,32752
8007000: 1105c83a sub r2,r2,r4
8007004: 1004d7fa srli r2,r2,31
8007008: f800283a ret
0800700c <_sbrk_r>:
800700c: defffd04 addi sp,sp,-12
8007010: dc000015 stw r16,0(sp)
8007014: 04020074 movhi r16,2049
8007018: 84062904 addi r16,r16,6308
800701c: dc400115 stw r17,4(sp)
8007020: 80000015 stw zero,0(r16)
8007024: 2023883a mov r17,r4
8007028: 2809883a mov r4,r5
800702c: dfc00215 stw ra,8(sp)
8007030: 800a6880 call 800a688 <sbrk>
8007034: 1007883a mov r3,r2
8007038: 00bfffc4 movi r2,-1
800703c: 18800626 beq r3,r2,8007058 <_sbrk_r+0x4c>
8007040: 1805883a mov r2,r3
8007044: dfc00217 ldw ra,8(sp)
8007048: dc400117 ldw r17,4(sp)
800704c: dc000017 ldw r16,0(sp)
8007050: dec00304 addi sp,sp,12
8007054: f800283a ret
8007058: 80800017 ldw r2,0(r16)
800705c: 103ff826 beq r2,zero,8007040 <_sbrk_r+0x34>
8007060: 88800015 stw r2,0(r17)
8007064: 1805883a mov r2,r3
8007068: dfc00217 ldw ra,8(sp)
800706c: dc400117 ldw r17,4(sp)
8007070: dc000017 ldw r16,0(sp)
8007074: dec00304 addi sp,sp,12
8007078: f800283a ret
0800707c <__sclose>:
800707c: 2940038f ldh r5,14(r5)
8007080: 80074381 jmpi 8007438 <_close_r>
08007084 <__sseek>:
8007084: defffe04 addi sp,sp,-8
8007088: dc000015 stw r16,0(sp)
800708c: 2821883a mov r16,r5
8007090: 2940038f ldh r5,14(r5)
8007094: dfc00115 stw ra,4(sp)
8007098: 80076b00 call 80076b0 <_lseek_r>
800709c: 1007883a mov r3,r2
80070a0: 00bfffc4 movi r2,-1
80070a4: 18800926 beq r3,r2,80070cc <__sseek+0x48>
80070a8: 8080030b ldhu r2,12(r16)
80070ac: 80c01415 stw r3,80(r16)
80070b0: 10840014 ori r2,r2,4096
80070b4: 8080030d sth r2,12(r16)
80070b8: 1805883a mov r2,r3
80070bc: dfc00117 ldw ra,4(sp)
80070c0: dc000017 ldw r16,0(sp)
80070c4: dec00204 addi sp,sp,8
80070c8: f800283a ret
80070cc: 8080030b ldhu r2,12(r16)
80070d0: 10bbffcc andi r2,r2,61439
80070d4: 8080030d sth r2,12(r16)
80070d8: 1805883a mov r2,r3
80070dc: dfc00117 ldw ra,4(sp)
80070e0: dc000017 ldw r16,0(sp)
80070e4: dec00204 addi sp,sp,8
80070e8: f800283a ret
080070ec <__swrite>:
80070ec: 2880030b ldhu r2,12(r5)
80070f0: defffb04 addi sp,sp,-20
80070f4: dcc00315 stw r19,12(sp)
80070f8: 1080400c andi r2,r2,256
80070fc: dc800215 stw r18,8(sp)
8007100: dc400115 stw r17,4(sp)
8007104: dc000015 stw r16,0(sp)
8007108: 3027883a mov r19,r6
800710c: 3825883a mov r18,r7
8007110: dfc00415 stw ra,16(sp)
8007114: 2821883a mov r16,r5
8007118: 000d883a mov r6,zero
800711c: 01c00084 movi r7,2
8007120: 2023883a mov r17,r4
8007124: 10000226 beq r2,zero,8007130 <__swrite+0x44>
8007128: 2940038f ldh r5,14(r5)
800712c: 80076b00 call 80076b0 <_lseek_r>
8007130: 8080030b ldhu r2,12(r16)
8007134: 8140038f ldh r5,14(r16)
8007138: 8809883a mov r4,r17
800713c: 10bbffcc andi r2,r2,61439
8007140: 980d883a mov r6,r19
8007144: 900f883a mov r7,r18
8007148: 8080030d sth r2,12(r16)
800714c: dfc00417 ldw ra,16(sp)
8007150: dcc00317 ldw r19,12(sp)
8007154: dc800217 ldw r18,8(sp)
8007158: dc400117 ldw r17,4(sp)
800715c: dc000017 ldw r16,0(sp)
8007160: dec00504 addi sp,sp,20
8007164: 80072f81 jmpi 80072f8 <_write_r>
08007168 <__sread>:
8007168: defffe04 addi sp,sp,-8
800716c: dc000015 stw r16,0(sp)
8007170: 2821883a mov r16,r5
8007174: 2940038f ldh r5,14(r5)
8007178: dfc00115 stw ra,4(sp)
800717c: 80077280 call 8007728 <_read_r>
8007180: 1007883a mov r3,r2
8007184: 10000816 blt r2,zero,80071a8 <__sread+0x40>
8007188: 80801417 ldw r2,80(r16)
800718c: 10c5883a add r2,r2,r3
8007190: 80801415 stw r2,80(r16)
8007194: 1805883a mov r2,r3
8007198: dfc00117 ldw ra,4(sp)
800719c: dc000017 ldw r16,0(sp)
80071a0: dec00204 addi sp,sp,8
80071a4: f800283a ret
80071a8: 8080030b ldhu r2,12(r16)
80071ac: 10bbffcc andi r2,r2,61439
80071b0: 8080030d sth r2,12(r16)
80071b4: 1805883a mov r2,r3
80071b8: dfc00117 ldw ra,4(sp)
80071bc: dc000017 ldw r16,0(sp)
80071c0: dec00204 addi sp,sp,8
80071c4: f800283a ret
080071c8 <strcmp>:
80071c8: 2144b03a or r2,r4,r5
80071cc: 108000cc andi r2,r2,3
80071d0: 10001d1e bne r2,zero,8007248 <strcmp+0x80>
80071d4: 200f883a mov r7,r4
80071d8: 28800017 ldw r2,0(r5)
80071dc: 21000017 ldw r4,0(r4)
80071e0: 280d883a mov r6,r5
80071e4: 2080161e bne r4,r2,8007240 <strcmp+0x78>
80071e8: 023fbff4 movhi r8,65279
80071ec: 423fbfc4 addi r8,r8,-257
80071f0: 2207883a add r3,r4,r8
80071f4: 01602074 movhi r5,32897
80071f8: 29602004 addi r5,r5,-32640
80071fc: 1946703a and r3,r3,r5
8007200: 0104303a nor r2,zero,r4
8007204: 10c4703a and r2,r2,r3
8007208: 10001c1e bne r2,zero,800727c <strcmp+0xb4>
800720c: 4013883a mov r9,r8
8007210: 2811883a mov r8,r5
8007214: 00000106 br 800721c <strcmp+0x54>
8007218: 1800181e bne r3,zero,800727c <strcmp+0xb4>
800721c: 39c00104 addi r7,r7,4
8007220: 39000017 ldw r4,0(r7)
8007224: 31800104 addi r6,r6,4
8007228: 31400017 ldw r5,0(r6)
800722c: 2245883a add r2,r4,r9
8007230: 1204703a and r2,r2,r8
8007234: 0106303a nor r3,zero,r4
8007238: 1886703a and r3,r3,r2
800723c: 217ff626 beq r4,r5,8007218 <strcmp+0x50>
8007240: 3809883a mov r4,r7
8007244: 300b883a mov r5,r6
8007248: 20c00007 ldb r3,0(r4)
800724c: 1800051e bne r3,zero,8007264 <strcmp+0x9c>
8007250: 00000606 br 800726c <strcmp+0xa4>
8007254: 21000044 addi r4,r4,1
8007258: 20c00007 ldb r3,0(r4)
800725c: 29400044 addi r5,r5,1
8007260: 18000226 beq r3,zero,800726c <strcmp+0xa4>
8007264: 28800007 ldb r2,0(r5)
8007268: 18bffa26 beq r3,r2,8007254 <strcmp+0x8c>
800726c: 20c00003 ldbu r3,0(r4)
8007270: 28800003 ldbu r2,0(r5)
8007274: 1885c83a sub r2,r3,r2
8007278: f800283a ret
800727c: 0005883a mov r2,zero
8007280: f800283a ret
08007284 <strlen>:
8007284: 208000cc andi r2,r4,3
8007288: 2011883a mov r8,r4
800728c: 1000161e bne r2,zero,80072e8 <strlen+0x64>
8007290: 20c00017 ldw r3,0(r4)
8007294: 017fbff4 movhi r5,65279
8007298: 297fbfc4 addi r5,r5,-257
800729c: 01e02074 movhi r7,32897
80072a0: 39e02004 addi r7,r7,-32640
80072a4: 1945883a add r2,r3,r5
80072a8: 11c4703a and r2,r2,r7
80072ac: 00c6303a nor r3,zero,r3
80072b0: 1886703a and r3,r3,r2
80072b4: 18000c1e bne r3,zero,80072e8 <strlen+0x64>
80072b8: 280d883a mov r6,r5
80072bc: 380b883a mov r5,r7
80072c0: 21000104 addi r4,r4,4
80072c4: 20800017 ldw r2,0(r4)
80072c8: 1187883a add r3,r2,r6
80072cc: 1946703a and r3,r3,r5
80072d0: 0084303a nor r2,zero,r2
80072d4: 10c4703a and r2,r2,r3
80072d8: 103ff926 beq r2,zero,80072c0 <strlen+0x3c>
80072dc: 20800007 ldb r2,0(r4)
80072e0: 10000326 beq r2,zero,80072f0 <strlen+0x6c>
80072e4: 21000044 addi r4,r4,1
80072e8: 20800007 ldb r2,0(r4)
80072ec: 103ffd1e bne r2,zero,80072e4 <strlen+0x60>
80072f0: 2205c83a sub r2,r4,r8
80072f4: f800283a ret
080072f8 <_write_r>:
80072f8: defffd04 addi sp,sp,-12
80072fc: dc000015 stw r16,0(sp)
8007300: 04020074 movhi r16,2049
8007304: 84062904 addi r16,r16,6308
8007308: dc400115 stw r17,4(sp)
800730c: 80000015 stw zero,0(r16)
8007310: 2023883a mov r17,r4
8007314: 2809883a mov r4,r5
8007318: 300b883a mov r5,r6
800731c: 380d883a mov r6,r7
8007320: dfc00215 stw ra,8(sp)
8007324: 800a7440 call 800a744 <write>
8007328: 1007883a mov r3,r2
800732c: 00bfffc4 movi r2,-1
8007330: 18800626 beq r3,r2,800734c <_write_r+0x54>
8007334: 1805883a mov r2,r3
8007338: dfc00217 ldw ra,8(sp)
800733c: dc400117 ldw r17,4(sp)
8007340: dc000017 ldw r16,0(sp)
8007344: dec00304 addi sp,sp,12
8007348: f800283a ret
800734c: 80800017 ldw r2,0(r16)
8007350: 103ff826 beq r2,zero,8007334 <_write_r+0x3c>
8007354: 88800015 stw r2,0(r17)
8007358: 1805883a mov r2,r3
800735c: dfc00217 ldw ra,8(sp)
8007360: dc400117 ldw r17,4(sp)
8007364: dc000017 ldw r16,0(sp)
8007368: dec00304 addi sp,sp,12
800736c: f800283a ret
08007370 <_calloc_r>:
8007370: defffe04 addi sp,sp,-8
8007374: dc400015 stw r17,0(sp)
8007378: 2023883a mov r17,r4
800737c: 2809883a mov r4,r5
8007380: 300b883a mov r5,r6
8007384: dfc00115 stw ra,4(sp)
8007388: 80096e40 call 80096e4 <__mulsi3>
800738c: 100b883a mov r5,r2
8007390: 8809883a mov r4,r17
8007394: 8004ee00 call 8004ee0 <_malloc_r>
8007398: 1023883a mov r17,r2
800739c: 01c00904 movi r7,36
80073a0: 10000d26 beq r2,zero,80073d8 <_calloc_r+0x68>
80073a4: 10ffff17 ldw r3,-4(r2)
80073a8: 1009883a mov r4,r2
80073ac: 00bfff04 movi r2,-4
80073b0: 1886703a and r3,r3,r2
80073b4: 1887883a add r3,r3,r2
80073b8: 180d883a mov r6,r3
80073bc: 000b883a mov r5,zero
80073c0: 38c01736 bltu r7,r3,8007420 <_calloc_r+0xb0>
80073c4: 008004c4 movi r2,19
80073c8: 10c00836 bltu r2,r3,80073ec <_calloc_r+0x7c>
80073cc: 20000215 stw zero,8(r4)
80073d0: 20000015 stw zero,0(r4)
80073d4: 20000115 stw zero,4(r4)
80073d8: 8805883a mov r2,r17
80073dc: dfc00117 ldw ra,4(sp)
80073e0: dc400017 ldw r17,0(sp)
80073e4: dec00204 addi sp,sp,8
80073e8: f800283a ret
80073ec: 008006c4 movi r2,27
80073f0: 88000015 stw zero,0(r17)
80073f4: 88000115 stw zero,4(r17)
80073f8: 89000204 addi r4,r17,8
80073fc: 10fff32e bgeu r2,r3,80073cc <_calloc_r+0x5c>
8007400: 88000215 stw zero,8(r17)
8007404: 88000315 stw zero,12(r17)
8007408: 89000404 addi r4,r17,16
800740c: 19ffef1e bne r3,r7,80073cc <_calloc_r+0x5c>
8007410: 89000604 addi r4,r17,24
8007414: 88000415 stw zero,16(r17)
8007418: 88000515 stw zero,20(r17)
800741c: 003feb06 br 80073cc <_calloc_r+0x5c>
8007420: 80058840 call 8005884 <memset>
8007424: 8805883a mov r2,r17
8007428: dfc00117 ldw ra,4(sp)
800742c: dc400017 ldw r17,0(sp)
8007430: dec00204 addi sp,sp,8
8007434: f800283a ret
08007438 <_close_r>:
8007438: defffd04 addi sp,sp,-12
800743c: dc000015 stw r16,0(sp)
8007440: 04020074 movhi r16,2049
8007444: 84062904 addi r16,r16,6308
8007448: dc400115 stw r17,4(sp)
800744c: 80000015 stw zero,0(r16)
8007450: 2023883a mov r17,r4
8007454: 2809883a mov r4,r5
8007458: dfc00215 stw ra,8(sp)
800745c: 8009dd40 call 8009dd4 <close>
8007460: 1007883a mov r3,r2
8007464: 00bfffc4 movi r2,-1
8007468: 18800626 beq r3,r2,8007484 <_close_r+0x4c>
800746c: 1805883a mov r2,r3
8007470: dfc00217 ldw ra,8(sp)
8007474: dc400117 ldw r17,4(sp)
8007478: dc000017 ldw r16,0(sp)
800747c: dec00304 addi sp,sp,12
8007480: f800283a ret
8007484: 80800017 ldw r2,0(r16)
8007488: 103ff826 beq r2,zero,800746c <_close_r+0x34>
800748c: 88800015 stw r2,0(r17)
8007490: 1805883a mov r2,r3
8007494: dfc00217 ldw ra,8(sp)
8007498: dc400117 ldw r17,4(sp)
800749c: dc000017 ldw r16,0(sp)
80074a0: dec00304 addi sp,sp,12
80074a4: f800283a ret
080074a8 <_fclose_r>:
80074a8: defffc04 addi sp,sp,-16
80074ac: dc400115 stw r17,4(sp)
80074b0: dc000015 stw r16,0(sp)
80074b4: dfc00315 stw ra,12(sp)
80074b8: dc800215 stw r18,8(sp)
80074bc: 2821883a mov r16,r5
80074c0: 2023883a mov r17,r4
80074c4: 28002926 beq r5,zero,800756c <_fclose_r+0xc4>
80074c8: 8003f900 call 8003f90 <__sfp_lock_acquire>
80074cc: 88000226 beq r17,zero,80074d8 <_fclose_r+0x30>
80074d0: 88800e17 ldw r2,56(r17)
80074d4: 10002d26 beq r2,zero,800758c <_fclose_r+0xe4>
80074d8: 8080030f ldh r2,12(r16)
80074dc: 10002226 beq r2,zero,8007568 <_fclose_r+0xc0>
80074e0: 8809883a mov r4,r17
80074e4: 800b883a mov r5,r16
80074e8: 8003d080 call 8003d08 <_fflush_r>
80074ec: 1025883a mov r18,r2
80074f0: 80800b17 ldw r2,44(r16)
80074f4: 10000426 beq r2,zero,8007508 <_fclose_r+0x60>
80074f8: 81400717 ldw r5,28(r16)
80074fc: 8809883a mov r4,r17
8007500: 103ee83a callr r2
8007504: 10002a16 blt r2,zero,80075b0 <_fclose_r+0x108>
8007508: 8080030b ldhu r2,12(r16)
800750c: 1080200c andi r2,r2,128
8007510: 1000231e bne r2,zero,80075a0 <_fclose_r+0xf8>
8007514: 81400c17 ldw r5,48(r16)
8007518: 28000526 beq r5,zero,8007530 <_fclose_r+0x88>
800751c: 80801004 addi r2,r16,64
8007520: 28800226 beq r5,r2,800752c <_fclose_r+0x84>
8007524: 8809883a mov r4,r17
8007528: 80043580 call 8004358 <_free_r>
800752c: 80000c15 stw zero,48(r16)
8007530: 81401117 ldw r5,68(r16)
8007534: 28000326 beq r5,zero,8007544 <_fclose_r+0x9c>
8007538: 8809883a mov r4,r17
800753c: 80043580 call 8004358 <_free_r>
8007540: 80001115 stw zero,68(r16)
8007544: 8000030d sth zero,12(r16)
8007548: 8003f940 call 8003f94 <__sfp_lock_release>
800754c: 9005883a mov r2,r18
8007550: dfc00317 ldw ra,12(sp)
8007554: dc800217 ldw r18,8(sp)
8007558: dc400117 ldw r17,4(sp)
800755c: dc000017 ldw r16,0(sp)
8007560: dec00404 addi sp,sp,16
8007564: f800283a ret
8007568: 8003f940 call 8003f94 <__sfp_lock_release>
800756c: 0025883a mov r18,zero
8007570: 9005883a mov r2,r18
8007574: dfc00317 ldw ra,12(sp)
8007578: dc800217 ldw r18,8(sp)
800757c: dc400117 ldw r17,4(sp)
8007580: dc000017 ldw r16,0(sp)
8007584: dec00404 addi sp,sp,16
8007588: f800283a ret
800758c: 8809883a mov r4,r17
8007590: 8003fa00 call 8003fa0 <__sinit>
8007594: 8080030f ldh r2,12(r16)
8007598: 103fd11e bne r2,zero,80074e0 <_fclose_r+0x38>
800759c: 003ff206 br 8007568 <_fclose_r+0xc0>
80075a0: 81400417 ldw r5,16(r16)
80075a4: 8809883a mov r4,r17
80075a8: 80043580 call 8004358 <_free_r>
80075ac: 003fd906 br 8007514 <_fclose_r+0x6c>
80075b0: 04bfffc4 movi r18,-1
80075b4: 003fd406 br 8007508 <_fclose_r+0x60>
080075b8 <fclose>:
80075b8: 00820074 movhi r2,2049
80075bc: 10bf4804 addi r2,r2,-736
80075c0: 200b883a mov r5,r4
80075c4: 11000017 ldw r4,0(r2)
80075c8: 80074a81 jmpi 80074a8 <_fclose_r>
080075cc <_fstat_r>:
80075cc: defffd04 addi sp,sp,-12
80075d0: dc000015 stw r16,0(sp)
80075d4: 04020074 movhi r16,2049
80075d8: 84062904 addi r16,r16,6308
80075dc: dc400115 stw r17,4(sp)
80075e0: 80000015 stw zero,0(r16)
80075e4: 2023883a mov r17,r4
80075e8: 2809883a mov r4,r5
80075ec: 300b883a mov r5,r6
80075f0: dfc00215 stw ra,8(sp)
80075f4: 8009f600 call 8009f60 <fstat>
80075f8: 1007883a mov r3,r2
80075fc: 00bfffc4 movi r2,-1
8007600: 18800626 beq r3,r2,800761c <_fstat_r+0x50>
8007604: 1805883a mov r2,r3
8007608: dfc00217 ldw ra,8(sp)
800760c: dc400117 ldw r17,4(sp)
8007610: dc000017 ldw r16,0(sp)
8007614: dec00304 addi sp,sp,12
8007618: f800283a ret
800761c: 80800017 ldw r2,0(r16)
8007620: 103ff826 beq r2,zero,8007604 <_fstat_r+0x38>
8007624: 88800015 stw r2,0(r17)
8007628: 1805883a mov r2,r3
800762c: dfc00217 ldw ra,8(sp)
8007630: dc400117 ldw r17,4(sp)
8007634: dc000017 ldw r16,0(sp)
8007638: dec00304 addi sp,sp,12
800763c: f800283a ret
08007640 <_isatty_r>:
8007640: defffd04 addi sp,sp,-12
8007644: dc000015 stw r16,0(sp)
8007648: 04020074 movhi r16,2049
800764c: 84062904 addi r16,r16,6308
8007650: dc400115 stw r17,4(sp)
8007654: 80000015 stw zero,0(r16)
8007658: 2023883a mov r17,r4
800765c: 2809883a mov r4,r5
8007660: dfc00215 stw ra,8(sp)
8007664: 800a0980 call 800a098 <isatty>
8007668: 1007883a mov r3,r2
800766c: 00bfffc4 movi r2,-1
8007670: 18800626 beq r3,r2,800768c <_isatty_r+0x4c>
8007674: 1805883a mov r2,r3
8007678: dfc00217 ldw ra,8(sp)
800767c: dc400117 ldw r17,4(sp)
8007680: dc000017 ldw r16,0(sp)
8007684: dec00304 addi sp,sp,12
8007688: f800283a ret
800768c: 80800017 ldw r2,0(r16)
8007690: 103ff826 beq r2,zero,8007674 <_isatty_r+0x34>
8007694: 88800015 stw r2,0(r17)
8007698: 1805883a mov r2,r3
800769c: dfc00217 ldw ra,8(sp)
80076a0: dc400117 ldw r17,4(sp)
80076a4: dc000017 ldw r16,0(sp)
80076a8: dec00304 addi sp,sp,12
80076ac: f800283a ret
080076b0 <_lseek_r>:
80076b0: defffd04 addi sp,sp,-12
80076b4: dc000015 stw r16,0(sp)
80076b8: 04020074 movhi r16,2049
80076bc: 84062904 addi r16,r16,6308
80076c0: dc400115 stw r17,4(sp)
80076c4: 80000015 stw zero,0(r16)
80076c8: 2023883a mov r17,r4
80076cc: 2809883a mov r4,r5
80076d0: 300b883a mov r5,r6
80076d4: 380d883a mov r6,r7
80076d8: dfc00215 stw ra,8(sp)
80076dc: 800a2a80 call 800a2a8 <lseek>
80076e0: 1007883a mov r3,r2
80076e4: 00bfffc4 movi r2,-1
80076e8: 18800626 beq r3,r2,8007704 <_lseek_r+0x54>
80076ec: 1805883a mov r2,r3
80076f0: dfc00217 ldw ra,8(sp)
80076f4: dc400117 ldw r17,4(sp)
80076f8: dc000017 ldw r16,0(sp)
80076fc: dec00304 addi sp,sp,12
8007700: f800283a ret
8007704: 80800017 ldw r2,0(r16)
8007708: 103ff826 beq r2,zero,80076ec <_lseek_r+0x3c>
800770c: 88800015 stw r2,0(r17)
8007710: 1805883a mov r2,r3
8007714: dfc00217 ldw ra,8(sp)
8007718: dc400117 ldw r17,4(sp)
800771c: dc000017 ldw r16,0(sp)
8007720: dec00304 addi sp,sp,12
8007724: f800283a ret
08007728 <_read_r>:
8007728: defffd04 addi sp,sp,-12
800772c: dc000015 stw r16,0(sp)
8007730: 04020074 movhi r16,2049
8007734: 84062904 addi r16,r16,6308
8007738: dc400115 stw r17,4(sp)
800773c: 80000015 stw zero,0(r16)
8007740: 2023883a mov r17,r4
8007744: 2809883a mov r4,r5
8007748: 300b883a mov r5,r6
800774c: 380d883a mov r6,r7
8007750: dfc00215 stw ra,8(sp)
8007754: 800a48c0 call 800a48c <read>
8007758: 1007883a mov r3,r2
800775c: 00bfffc4 movi r2,-1
8007760: 18800626 beq r3,r2,800777c <_read_r+0x54>
8007764: 1805883a mov r2,r3
8007768: dfc00217 ldw ra,8(sp)
800776c: dc400117 ldw r17,4(sp)
8007770: dc000017 ldw r16,0(sp)
8007774: dec00304 addi sp,sp,12
8007778: f800283a ret
800777c: 80800017 ldw r2,0(r16)
8007780: 103ff826 beq r2,zero,8007764 <_read_r+0x3c>
8007784: 88800015 stw r2,0(r17)
8007788: 1805883a mov r2,r3
800778c: dfc00217 ldw ra,8(sp)
8007790: dc400117 ldw r17,4(sp)
8007794: dc000017 ldw r16,0(sp)
8007798: dec00304 addi sp,sp,12
800779c: f800283a ret
080077a0 <__udivdi3>:
80077a0: defff104 addi sp,sp,-60
80077a4: 0015883a mov r10,zero
80077a8: 2005883a mov r2,r4
80077ac: 3011883a mov r8,r6
80077b0: df000d15 stw fp,52(sp)
80077b4: dd400a15 stw r21,40(sp)
80077b8: dcc00815 stw r19,32(sp)
80077bc: dfc00e15 stw ra,56(sp)
80077c0: ddc00c15 stw r23,48(sp)
80077c4: dd800b15 stw r22,44(sp)
80077c8: dd000915 stw r20,36(sp)
80077cc: dc800715 stw r18,28(sp)
80077d0: dc400615 stw r17,24(sp)
80077d4: dc000515 stw r16,20(sp)
80077d8: da800315 stw r10,12(sp)
80077dc: 4027883a mov r19,r8
80077e0: 1039883a mov fp,r2
80077e4: 282b883a mov r21,r5
80077e8: da800415 stw r10,16(sp)
80077ec: 3800401e bne r7,zero,80078f0 <__udivdi3+0x150>
80077f0: 2a006536 bltu r5,r8,8007988 <__udivdi3+0x1e8>
80077f4: 4000b526 beq r8,zero,8007acc <__udivdi3+0x32c>
80077f8: 00bfffd4 movui r2,65535
80077fc: 14c0ad36 bltu r2,r19,8007ab4 <__udivdi3+0x314>
8007800: 00803fc4 movi r2,255
8007804: 14c15e36 bltu r2,r19,8007d80 <__udivdi3+0x5e0>
8007808: 000b883a mov r5,zero
800780c: 0005883a mov r2,zero
8007810: 9884d83a srl r2,r19,r2
8007814: 01020074 movhi r4,2049
8007818: 21382304 addi r4,r4,-8052
800781c: 01800804 movi r6,32
8007820: 1105883a add r2,r2,r4
8007824: 10c00003 ldbu r3,0(r2)
8007828: 28c7883a add r3,r5,r3
800782c: 30e9c83a sub r20,r6,r3
8007830: a0010a1e bne r20,zero,8007c5c <__udivdi3+0x4bc>
8007834: 982ed43a srli r23,r19,16
8007838: acebc83a sub r21,r21,r19
800783c: 9dbfffcc andi r22,r19,65535
8007840: 05000044 movi r20,1
8007844: a809883a mov r4,r21
8007848: b80b883a mov r5,r23
800784c: 80096d40 call 80096d4 <__udivsi3>
8007850: 100b883a mov r5,r2
8007854: b009883a mov r4,r22
8007858: 1021883a mov r16,r2
800785c: 80096e40 call 80096e4 <__mulsi3>
8007860: a809883a mov r4,r21
8007864: b80b883a mov r5,r23
8007868: 1023883a mov r17,r2
800786c: 80096dc0 call 80096dc <__umodsi3>
8007870: 1004943a slli r2,r2,16
8007874: e006d43a srli r3,fp,16
8007878: 10c4b03a or r2,r2,r3
800787c: 1440042e bgeu r2,r17,8007890 <__udivdi3+0xf0>
8007880: 14c5883a add r2,r2,r19
8007884: 843fffc4 addi r16,r16,-1
8007888: 14c00136 bltu r2,r19,8007890 <__udivdi3+0xf0>
800788c: 14415c36 bltu r2,r17,8007e00 <__udivdi3+0x660>
8007890: 1463c83a sub r17,r2,r17
8007894: 8809883a mov r4,r17
8007898: b80b883a mov r5,r23
800789c: 80096d40 call 80096d4 <__udivsi3>
80078a0: 100b883a mov r5,r2
80078a4: b009883a mov r4,r22
80078a8: 102b883a mov r21,r2
80078ac: 80096e40 call 80096e4 <__mulsi3>
80078b0: 8809883a mov r4,r17
80078b4: b80b883a mov r5,r23
80078b8: 1025883a mov r18,r2
80078bc: 80096dc0 call 80096dc <__umodsi3>
80078c0: 1004943a slli r2,r2,16
80078c4: e0ffffcc andi r3,fp,65535
80078c8: 10c4b03a or r2,r2,r3
80078cc: 1480042e bgeu r2,r18,80078e0 <__udivdi3+0x140>
80078d0: 9885883a add r2,r19,r2
80078d4: ad7fffc4 addi r21,r21,-1
80078d8: 14c00136 bltu r2,r19,80078e0 <__udivdi3+0x140>
80078dc: 14813c36 bltu r2,r18,8007dd0 <__udivdi3+0x630>
80078e0: 8004943a slli r2,r16,16
80078e4: a009883a mov r4,r20
80078e8: a884b03a or r2,r21,r2
80078ec: 00001506 br 8007944 <__udivdi3+0x1a4>
80078f0: 380d883a mov r6,r7
80078f4: 29c06c36 bltu r5,r7,8007aa8 <__udivdi3+0x308>
80078f8: 00bfffd4 movui r2,65535
80078fc: 11c06436 bltu r2,r7,8007a90 <__udivdi3+0x2f0>
8007900: 00803fc4 movi r2,255
8007904: 11c11836 bltu r2,r7,8007d68 <__udivdi3+0x5c8>
8007908: 000b883a mov r5,zero
800790c: 0005883a mov r2,zero
8007910: 3084d83a srl r2,r6,r2
8007914: 01020074 movhi r4,2049
8007918: 21382304 addi r4,r4,-8052
800791c: 01c00804 movi r7,32
8007920: 1105883a add r2,r2,r4
8007924: 10c00003 ldbu r3,0(r2)
8007928: 28c7883a add r3,r5,r3
800792c: 38edc83a sub r22,r7,r3
8007930: b000731e bne r22,zero,8007b00 <__udivdi3+0x360>
8007934: 35400136 bltu r6,r21,800793c <__udivdi3+0x19c>
8007938: e4c05b36 bltu fp,r19,8007aa8 <__udivdi3+0x308>
800793c: 00800044 movi r2,1
8007940: 0009883a mov r4,zero
8007944: d8800315 stw r2,12(sp)
8007948: d9400317 ldw r5,12(sp)
800794c: 2007883a mov r3,r4
8007950: d9000415 stw r4,16(sp)
8007954: 2805883a mov r2,r5
8007958: dfc00e17 ldw ra,56(sp)
800795c: df000d17 ldw fp,52(sp)
8007960: ddc00c17 ldw r23,48(sp)
8007964: dd800b17 ldw r22,44(sp)
8007968: dd400a17 ldw r21,40(sp)
800796c: dd000917 ldw r20,36(sp)
8007970: dcc00817 ldw r19,32(sp)
8007974: dc800717 ldw r18,28(sp)
8007978: dc400617 ldw r17,24(sp)
800797c: dc000517 ldw r16,20(sp)
8007980: dec00f04 addi sp,sp,60
8007984: f800283a ret
8007988: 00bfffd4 movui r2,65535
800798c: 12005636 bltu r2,r8,8007ae8 <__udivdi3+0x348>
8007990: 00803fc4 movi r2,255
8007994: 12010036 bltu r2,r8,8007d98 <__udivdi3+0x5f8>
8007998: 000b883a mov r5,zero
800799c: 0005883a mov r2,zero
80079a0: 9884d83a srl r2,r19,r2
80079a4: 01020074 movhi r4,2049
80079a8: 21382304 addi r4,r4,-8052
80079ac: 01800804 movi r6,32
80079b0: 1105883a add r2,r2,r4
80079b4: 10c00003 ldbu r3,0(r2)
80079b8: 28c7883a add r3,r5,r3
80079bc: 30cbc83a sub r5,r6,r3
80079c0: 28000626 beq r5,zero,80079dc <__udivdi3+0x23c>
80079c4: 3145c83a sub r2,r6,r5
80079c8: e084d83a srl r2,fp,r2
80079cc: a946983a sll r3,r21,r5
80079d0: e178983a sll fp,fp,r5
80079d4: 9966983a sll r19,r19,r5
80079d8: 18aab03a or r21,r3,r2
80079dc: 982ed43a srli r23,r19,16
80079e0: a809883a mov r4,r21
80079e4: 9cbfffcc andi r18,r19,65535
80079e8: b80b883a mov r5,r23
80079ec: 80096d40 call 80096d4 <__udivsi3>
80079f0: 100b883a mov r5,r2
80079f4: 9009883a mov r4,r18
80079f8: 1021883a mov r16,r2
80079fc: 80096e40 call 80096e4 <__mulsi3>
8007a00: a809883a mov r4,r21
8007a04: b80b883a mov r5,r23
8007a08: 1023883a mov r17,r2
8007a0c: 80096dc0 call 80096dc <__umodsi3>
8007a10: 1004943a slli r2,r2,16
8007a14: e006d43a srli r3,fp,16
8007a18: 10c4b03a or r2,r2,r3
8007a1c: 1440042e bgeu r2,r17,8007a30 <__udivdi3+0x290>
8007a20: 14c5883a add r2,r2,r19
8007a24: 843fffc4 addi r16,r16,-1
8007a28: 14c00136 bltu r2,r19,8007a30 <__udivdi3+0x290>
8007a2c: 1440ea36 bltu r2,r17,8007dd8 <__udivdi3+0x638>
8007a30: 1463c83a sub r17,r2,r17
8007a34: 8809883a mov r4,r17
8007a38: b80b883a mov r5,r23
8007a3c: 80096d40 call 80096d4 <__udivsi3>
8007a40: 100b883a mov r5,r2
8007a44: 9009883a mov r4,r18
8007a48: 102b883a mov r21,r2
8007a4c: 80096e40 call 80096e4 <__mulsi3>
8007a50: 8809883a mov r4,r17
8007a54: b80b883a mov r5,r23
8007a58: 1025883a mov r18,r2
8007a5c: 80096dc0 call 80096dc <__umodsi3>
8007a60: 1004943a slli r2,r2,16
8007a64: e0ffffcc andi r3,fp,65535
8007a68: 10c4b03a or r2,r2,r3
8007a6c: 1480042e bgeu r2,r18,8007a80 <__udivdi3+0x2e0>
8007a70: 9885883a add r2,r19,r2
8007a74: ad7fffc4 addi r21,r21,-1
8007a78: 14c00136 bltu r2,r19,8007a80 <__udivdi3+0x2e0>
8007a7c: 1480d936 bltu r2,r18,8007de4 <__udivdi3+0x644>
8007a80: 8004943a slli r2,r16,16
8007a84: 0009883a mov r4,zero
8007a88: a884b03a or r2,r21,r2
8007a8c: 003fad06 br 8007944 <__udivdi3+0x1a4>
8007a90: 00804034 movhi r2,256
8007a94: 10bfffc4 addi r2,r2,-1
8007a98: 11c0b636 bltu r2,r7,8007d74 <__udivdi3+0x5d4>
8007a9c: 01400404 movi r5,16
8007aa0: 2805883a mov r2,r5
8007aa4: 003f9a06 br 8007910 <__udivdi3+0x170>
8007aa8: 0005883a mov r2,zero
8007aac: 0009883a mov r4,zero
8007ab0: 003fa406 br 8007944 <__udivdi3+0x1a4>
8007ab4: 00804034 movhi r2,256
8007ab8: 10bfffc4 addi r2,r2,-1
8007abc: 14c0b336 bltu r2,r19,8007d8c <__udivdi3+0x5ec>
8007ac0: 01400404 movi r5,16
8007ac4: 2805883a mov r2,r5
8007ac8: 003f5106 br 8007810 <__udivdi3+0x70>
8007acc: 01000044 movi r4,1
8007ad0: 000b883a mov r5,zero
8007ad4: 80096d40 call 80096d4 <__udivsi3>
8007ad8: 1027883a mov r19,r2
8007adc: 00bfffd4 movui r2,65535
8007ae0: 14fff436 bltu r2,r19,8007ab4 <__udivdi3+0x314>
8007ae4: 003f4606 br 8007800 <__udivdi3+0x60>
8007ae8: 00804034 movhi r2,256
8007aec: 10bfffc4 addi r2,r2,-1
8007af0: 1200ac36 bltu r2,r8,8007da4 <__udivdi3+0x604>
8007af4: 01400404 movi r5,16
8007af8: 2805883a mov r2,r5
8007afc: 003fa806 br 80079a0 <__udivdi3+0x200>
8007b00: 3d85c83a sub r2,r7,r22
8007b04: 3588983a sll r4,r6,r22
8007b08: 9886d83a srl r3,r19,r2
8007b0c: a8a2d83a srl r17,r21,r2
8007b10: e084d83a srl r2,fp,r2
8007b14: 20eeb03a or r23,r4,r3
8007b18: b824d43a srli r18,r23,16
8007b1c: ad86983a sll r3,r21,r22
8007b20: 8809883a mov r4,r17
8007b24: 900b883a mov r5,r18
8007b28: 1886b03a or r3,r3,r2
8007b2c: d8c00115 stw r3,4(sp)
8007b30: bc3fffcc andi r16,r23,65535
8007b34: 80096d40 call 80096d4 <__udivsi3>
8007b38: 100b883a mov r5,r2
8007b3c: 8009883a mov r4,r16
8007b40: 1029883a mov r20,r2
8007b44: 80096e40 call 80096e4 <__mulsi3>
8007b48: 900b883a mov r5,r18
8007b4c: 8809883a mov r4,r17
8007b50: 102b883a mov r21,r2
8007b54: 80096dc0 call 80096dc <__umodsi3>
8007b58: d9400117 ldw r5,4(sp)
8007b5c: 1004943a slli r2,r2,16
8007b60: 9da6983a sll r19,r19,r22
8007b64: 2806d43a srli r3,r5,16
8007b68: 10c4b03a or r2,r2,r3
8007b6c: 1540032e bgeu r2,r21,8007b7c <__udivdi3+0x3dc>
8007b70: 15c5883a add r2,r2,r23
8007b74: a53fffc4 addi r20,r20,-1
8007b78: 15c0912e bgeu r2,r23,8007dc0 <__udivdi3+0x620>
8007b7c: 1563c83a sub r17,r2,r21
8007b80: 8809883a mov r4,r17
8007b84: 900b883a mov r5,r18
8007b88: 80096d40 call 80096d4 <__udivsi3>
8007b8c: 100b883a mov r5,r2
8007b90: 8009883a mov r4,r16
8007b94: 102b883a mov r21,r2
8007b98: 80096e40 call 80096e4 <__mulsi3>
8007b9c: 8809883a mov r4,r17
8007ba0: 900b883a mov r5,r18
8007ba4: 1021883a mov r16,r2
8007ba8: 80096dc0 call 80096dc <__umodsi3>
8007bac: da800117 ldw r10,4(sp)
8007bb0: 1004943a slli r2,r2,16
8007bb4: 50ffffcc andi r3,r10,65535
8007bb8: 10c6b03a or r3,r2,r3
8007bbc: 1c00032e bgeu r3,r16,8007bcc <__udivdi3+0x42c>
8007bc0: 1dc7883a add r3,r3,r23
8007bc4: ad7fffc4 addi r21,r21,-1
8007bc8: 1dc0792e bgeu r3,r23,8007db0 <__udivdi3+0x610>
8007bcc: a004943a slli r2,r20,16
8007bd0: 982ed43a srli r23,r19,16
8007bd4: 9cffffcc andi r19,r19,65535
8007bd8: a8a4b03a or r18,r21,r2
8007bdc: 947fffcc andi r17,r18,65535
8007be0: 902ad43a srli r21,r18,16
8007be4: 8809883a mov r4,r17
8007be8: 980b883a mov r5,r19
8007bec: 1c21c83a sub r16,r3,r16
8007bf0: 80096e40 call 80096e4 <__mulsi3>
8007bf4: 8809883a mov r4,r17
8007bf8: b80b883a mov r5,r23
8007bfc: 1029883a mov r20,r2
8007c00: 80096e40 call 80096e4 <__mulsi3>
8007c04: 980b883a mov r5,r19
8007c08: a809883a mov r4,r21
8007c0c: 1023883a mov r17,r2
8007c10: 80096e40 call 80096e4 <__mulsi3>
8007c14: a809883a mov r4,r21
8007c18: b80b883a mov r5,r23
8007c1c: 1027883a mov r19,r2
8007c20: 80096e40 call 80096e4 <__mulsi3>
8007c24: 1009883a mov r4,r2
8007c28: a004d43a srli r2,r20,16
8007c2c: 8ce3883a add r17,r17,r19
8007c30: 1447883a add r3,r2,r17
8007c34: 1cc0022e bgeu r3,r19,8007c40 <__udivdi3+0x4a0>
8007c38: 00800074 movhi r2,1
8007c3c: 2089883a add r4,r4,r2
8007c40: 1804d43a srli r2,r3,16
8007c44: 2085883a add r2,r4,r2
8007c48: 80804436 bltu r16,r2,8007d5c <__udivdi3+0x5bc>
8007c4c: 80803e26 beq r16,r2,8007d48 <__udivdi3+0x5a8>
8007c50: 9005883a mov r2,r18
8007c54: 0009883a mov r4,zero
8007c58: 003f3a06 br 8007944 <__udivdi3+0x1a4>
8007c5c: 9d26983a sll r19,r19,r20
8007c60: 3505c83a sub r2,r6,r20
8007c64: a8a2d83a srl r17,r21,r2
8007c68: 982ed43a srli r23,r19,16
8007c6c: e084d83a srl r2,fp,r2
8007c70: ad06983a sll r3,r21,r20
8007c74: 8809883a mov r4,r17
8007c78: b80b883a mov r5,r23
8007c7c: 1886b03a or r3,r3,r2
8007c80: d8c00015 stw r3,0(sp)
8007c84: 9dbfffcc andi r22,r19,65535
8007c88: 80096d40 call 80096d4 <__udivsi3>
8007c8c: 100b883a mov r5,r2
8007c90: b009883a mov r4,r22
8007c94: d8800215 stw r2,8(sp)
8007c98: 80096e40 call 80096e4 <__mulsi3>
8007c9c: 8809883a mov r4,r17
8007ca0: b80b883a mov r5,r23
8007ca4: 102b883a mov r21,r2
8007ca8: 80096dc0 call 80096dc <__umodsi3>
8007cac: d9000017 ldw r4,0(sp)
8007cb0: 1004943a slli r2,r2,16
8007cb4: 2006d43a srli r3,r4,16
8007cb8: 10c4b03a or r2,r2,r3
8007cbc: 1540052e bgeu r2,r21,8007cd4 <__udivdi3+0x534>
8007cc0: d9400217 ldw r5,8(sp)
8007cc4: 14c5883a add r2,r2,r19
8007cc8: 297fffc4 addi r5,r5,-1
8007ccc: d9400215 stw r5,8(sp)
8007cd0: 14c0462e bgeu r2,r19,8007dec <__udivdi3+0x64c>
8007cd4: 1563c83a sub r17,r2,r21
8007cd8: 8809883a mov r4,r17
8007cdc: b80b883a mov r5,r23
8007ce0: 80096d40 call 80096d4 <__udivsi3>
8007ce4: 100b883a mov r5,r2
8007ce8: b009883a mov r4,r22
8007cec: 1025883a mov r18,r2
8007cf0: 80096e40 call 80096e4 <__mulsi3>
8007cf4: 8809883a mov r4,r17
8007cf8: b80b883a mov r5,r23
8007cfc: 1021883a mov r16,r2
8007d00: 80096dc0 call 80096dc <__umodsi3>
8007d04: da800017 ldw r10,0(sp)
8007d08: 1004943a slli r2,r2,16
8007d0c: 50ffffcc andi r3,r10,65535
8007d10: 10c6b03a or r3,r2,r3
8007d14: 1c00062e bgeu r3,r16,8007d30 <__udivdi3+0x590>
8007d18: 1cc7883a add r3,r3,r19
8007d1c: 94bfffc4 addi r18,r18,-1
8007d20: 1cc00336 bltu r3,r19,8007d30 <__udivdi3+0x590>
8007d24: 1c00022e bgeu r3,r16,8007d30 <__udivdi3+0x590>
8007d28: 94bfffc4 addi r18,r18,-1
8007d2c: 1cc7883a add r3,r3,r19
8007d30: d9000217 ldw r4,8(sp)
8007d34: e538983a sll fp,fp,r20
8007d38: 1c2bc83a sub r21,r3,r16
8007d3c: 2004943a slli r2,r4,16
8007d40: 90a8b03a or r20,r18,r2
8007d44: 003ebf06 br 8007844 <__udivdi3+0xa4>
8007d48: 1804943a slli r2,r3,16
8007d4c: e588983a sll r4,fp,r22
8007d50: a0ffffcc andi r3,r20,65535
8007d54: 10c5883a add r2,r2,r3
8007d58: 20bfbd2e bgeu r4,r2,8007c50 <__udivdi3+0x4b0>
8007d5c: 90bfffc4 addi r2,r18,-1
8007d60: 0009883a mov r4,zero
8007d64: 003ef706 br 8007944 <__udivdi3+0x1a4>
8007d68: 01400204 movi r5,8
8007d6c: 2805883a mov r2,r5
8007d70: 003ee706 br 8007910 <__udivdi3+0x170>
8007d74: 01400604 movi r5,24
8007d78: 2805883a mov r2,r5
8007d7c: 003ee406 br 8007910 <__udivdi3+0x170>
8007d80: 01400204 movi r5,8
8007d84: 2805883a mov r2,r5
8007d88: 003ea106 br 8007810 <__udivdi3+0x70>
8007d8c: 01400604 movi r5,24
8007d90: 2805883a mov r2,r5
8007d94: 003e9e06 br 8007810 <__udivdi3+0x70>
8007d98: 01400204 movi r5,8
8007d9c: 2805883a mov r2,r5
8007da0: 003eff06 br 80079a0 <__udivdi3+0x200>
8007da4: 01400604 movi r5,24
8007da8: 2805883a mov r2,r5
8007dac: 003efc06 br 80079a0 <__udivdi3+0x200>
8007db0: 1c3f862e bgeu r3,r16,8007bcc <__udivdi3+0x42c>
8007db4: 1dc7883a add r3,r3,r23
8007db8: ad7fffc4 addi r21,r21,-1
8007dbc: 003f8306 br 8007bcc <__udivdi3+0x42c>
8007dc0: 157f6e2e bgeu r2,r21,8007b7c <__udivdi3+0x3dc>
8007dc4: a53fffc4 addi r20,r20,-1
8007dc8: 15c5883a add r2,r2,r23
8007dcc: 003f6b06 br 8007b7c <__udivdi3+0x3dc>
8007dd0: ad7fffc4 addi r21,r21,-1
8007dd4: 003ec206 br 80078e0 <__udivdi3+0x140>
8007dd8: 843fffc4 addi r16,r16,-1
8007ddc: 14c5883a add r2,r2,r19
8007de0: 003f1306 br 8007a30 <__udivdi3+0x290>
8007de4: ad7fffc4 addi r21,r21,-1
8007de8: 003f2506 br 8007a80 <__udivdi3+0x2e0>
8007dec: 157fb92e bgeu r2,r21,8007cd4 <__udivdi3+0x534>
8007df0: 297fffc4 addi r5,r5,-1
8007df4: 14c5883a add r2,r2,r19
8007df8: d9400215 stw r5,8(sp)
8007dfc: 003fb506 br 8007cd4 <__udivdi3+0x534>
8007e00: 843fffc4 addi r16,r16,-1
8007e04: 14c5883a add r2,r2,r19
8007e08: 003ea106 br 8007890 <__udivdi3+0xf0>
08007e0c <__umoddi3>:
8007e0c: defff004 addi sp,sp,-64
8007e10: 3011883a mov r8,r6
8007e14: 000d883a mov r6,zero
8007e18: dd400b15 stw r21,44(sp)
8007e1c: dcc00915 stw r19,36(sp)
8007e20: dc000615 stw r16,24(sp)
8007e24: dfc00f15 stw ra,60(sp)
8007e28: df000e15 stw fp,56(sp)
8007e2c: ddc00d15 stw r23,52(sp)
8007e30: dd800c15 stw r22,48(sp)
8007e34: dd000a15 stw r20,40(sp)
8007e38: dc800815 stw r18,32(sp)
8007e3c: dc400715 stw r17,28(sp)
8007e40: 2817883a mov r11,r5
8007e44: d9800415 stw r6,16(sp)
8007e48: 4027883a mov r19,r8
8007e4c: d9800515 stw r6,20(sp)
8007e50: 2021883a mov r16,r4
8007e54: 282b883a mov r21,r5
8007e58: 38002c1e bne r7,zero,8007f0c <__umoddi3+0x100>
8007e5c: 2a005636 bltu r5,r8,8007fb8 <__umoddi3+0x1ac>
8007e60: 40009a26 beq r8,zero,80080cc <__umoddi3+0x2c0>
8007e64: 00bfffd4 movui r2,65535
8007e68: 14c09236 bltu r2,r19,80080b4 <__umoddi3+0x2a8>
8007e6c: 00803fc4 movi r2,255
8007e70: 14c15c36 bltu r2,r19,80083e4 <__umoddi3+0x5d8>
8007e74: 000b883a mov r5,zero
8007e78: 0005883a mov r2,zero
8007e7c: 9884d83a srl r2,r19,r2
8007e80: 01020074 movhi r4,2049
8007e84: 21382304 addi r4,r4,-8052
8007e88: 01800804 movi r6,32
8007e8c: 1105883a add r2,r2,r4
8007e90: 10c00003 ldbu r3,0(r2)
8007e94: 28c7883a add r3,r5,r3
8007e98: 30e5c83a sub r18,r6,r3
8007e9c: 9000a41e bne r18,zero,8008130 <__umoddi3+0x324>
8007ea0: 982ed43a srli r23,r19,16
8007ea4: acebc83a sub r21,r21,r19
8007ea8: 9d3fffcc andi r20,r19,65535
8007eac: 002d883a mov r22,zero
8007eb0: a809883a mov r4,r21
8007eb4: b80b883a mov r5,r23
8007eb8: 80096d40 call 80096d4 <__udivsi3>
8007ebc: 100b883a mov r5,r2
8007ec0: a009883a mov r4,r20
8007ec4: 80096e40 call 80096e4 <__mulsi3>
8007ec8: a809883a mov r4,r21
8007ecc: b80b883a mov r5,r23
8007ed0: 1023883a mov r17,r2
8007ed4: 80096dc0 call 80096dc <__umodsi3>
8007ed8: 1004943a slli r2,r2,16
8007edc: 8006d43a srli r3,r16,16
8007ee0: 10c4b03a or r2,r2,r3
8007ee4: 1440032e bgeu r2,r17,8007ef4 <__umoddi3+0xe8>
8007ee8: 14c5883a add r2,r2,r19
8007eec: 14c00136 bltu r2,r19,8007ef4 <__umoddi3+0xe8>
8007ef0: 14415836 bltu r2,r17,8008454 <__umoddi3+0x648>
8007ef4: 1463c83a sub r17,r2,r17
8007ef8: 8809883a mov r4,r17
8007efc: b80b883a mov r5,r23
8007f00: 80096d40 call 80096d4 <__udivsi3>
8007f04: a009883a mov r4,r20
8007f08: 00005306 br 8008058 <__umoddi3+0x24c>
8007f0c: 380d883a mov r6,r7
8007f10: 29c0132e bgeu r5,r7,8007f60 <__umoddi3+0x154>
8007f14: d9000415 stw r4,16(sp)
8007f18: d9400515 stw r5,20(sp)
8007f1c: d9400417 ldw r5,16(sp)
8007f20: 5813883a mov r9,r11
8007f24: 2811883a mov r8,r5
8007f28: 4005883a mov r2,r8
8007f2c: 4807883a mov r3,r9
8007f30: dfc00f17 ldw ra,60(sp)
8007f34: df000e17 ldw fp,56(sp)
8007f38: ddc00d17 ldw r23,52(sp)
8007f3c: dd800c17 ldw r22,48(sp)
8007f40: dd400b17 ldw r21,44(sp)
8007f44: dd000a17 ldw r20,40(sp)
8007f48: dcc00917 ldw r19,36(sp)
8007f4c: dc800817 ldw r18,32(sp)
8007f50: dc400717 ldw r17,28(sp)
8007f54: dc000617 ldw r16,24(sp)
8007f58: dec01004 addi sp,sp,64
8007f5c: f800283a ret
8007f60: 00bfffd4 movui r2,65535
8007f64: 11c06636 bltu r2,r7,8008100 <__umoddi3+0x2f4>
8007f68: 00803fc4 movi r2,255
8007f6c: 11c12036 bltu r2,r7,80083f0 <__umoddi3+0x5e4>
8007f70: 000b883a mov r5,zero
8007f74: 0005883a mov r2,zero
8007f78: 3084d83a srl r2,r6,r2
8007f7c: 01020074 movhi r4,2049
8007f80: 21382304 addi r4,r4,-8052
8007f84: 01c00804 movi r7,32
8007f88: 1105883a add r2,r2,r4
8007f8c: 10c00003 ldbu r3,0(r2)
8007f90: 28c7883a add r3,r5,r3
8007f94: 38e5c83a sub r18,r7,r3
8007f98: 9000941e bne r18,zero,80081ec <__umoddi3+0x3e0>
8007f9c: 35405e36 bltu r6,r21,8008118 <__umoddi3+0x30c>
8007fa0: 84c05d2e bgeu r16,r19,8008118 <__umoddi3+0x30c>
8007fa4: 8011883a mov r8,r16
8007fa8: a813883a mov r9,r21
8007fac: dc000415 stw r16,16(sp)
8007fb0: dd400515 stw r21,20(sp)
8007fb4: 003fdc06 br 8007f28 <__umoddi3+0x11c>
8007fb8: 00bfffd4 movui r2,65535
8007fbc: 12004a36 bltu r2,r8,80080e8 <__umoddi3+0x2dc>
8007fc0: 00803fc4 movi r2,255
8007fc4: 12010d36 bltu r2,r8,80083fc <__umoddi3+0x5f0>
8007fc8: 000b883a mov r5,zero
8007fcc: 0005883a mov r2,zero
8007fd0: 9884d83a srl r2,r19,r2
8007fd4: 01020074 movhi r4,2049
8007fd8: 21382304 addi r4,r4,-8052
8007fdc: 01800804 movi r6,32
8007fe0: 1105883a add r2,r2,r4
8007fe4: 10c00003 ldbu r3,0(r2)
8007fe8: 28c7883a add r3,r5,r3
8007fec: 30c7c83a sub r3,r6,r3
8007ff0: 1800dc1e bne r3,zero,8008364 <__umoddi3+0x558>
8007ff4: 002d883a mov r22,zero
8007ff8: 982ed43a srli r23,r19,16
8007ffc: a809883a mov r4,r21
8008000: 9cbfffcc andi r18,r19,65535
8008004: b80b883a mov r5,r23
8008008: 80096d40 call 80096d4 <__udivsi3>
800800c: 100b883a mov r5,r2
8008010: 9009883a mov r4,r18
8008014: 80096e40 call 80096e4 <__mulsi3>
8008018: a809883a mov r4,r21
800801c: b80b883a mov r5,r23
8008020: 1023883a mov r17,r2
8008024: 80096dc0 call 80096dc <__umodsi3>
8008028: 1004943a slli r2,r2,16
800802c: 8006d43a srli r3,r16,16
8008030: 10c4b03a or r2,r2,r3
8008034: 1440032e bgeu r2,r17,8008044 <__umoddi3+0x238>
8008038: 14c5883a add r2,r2,r19
800803c: 14c00136 bltu r2,r19,8008044 <__umoddi3+0x238>
8008040: 14410236 bltu r2,r17,800844c <__umoddi3+0x640>
8008044: 1463c83a sub r17,r2,r17
8008048: 8809883a mov r4,r17
800804c: b80b883a mov r5,r23
8008050: 80096d40 call 80096d4 <__udivsi3>
8008054: 9009883a mov r4,r18
8008058: 100b883a mov r5,r2
800805c: 80096e40 call 80096e4 <__mulsi3>
8008060: 8809883a mov r4,r17
8008064: b80b883a mov r5,r23
8008068: 102b883a mov r21,r2
800806c: 80096dc0 call 80096dc <__umodsi3>
8008070: 1004943a slli r2,r2,16
8008074: 80ffffcc andi r3,r16,65535
8008078: 10c4b03a or r2,r2,r3
800807c: 1540042e bgeu r2,r21,8008090 <__umoddi3+0x284>
8008080: 14c5883a add r2,r2,r19
8008084: 14c00236 bltu r2,r19,8008090 <__umoddi3+0x284>
8008088: 1540012e bgeu r2,r21,8008090 <__umoddi3+0x284>
800808c: 14c5883a add r2,r2,r19
8008090: 1545c83a sub r2,r2,r21
8008094: 1584d83a srl r2,r2,r22
8008098: 0013883a mov r9,zero
800809c: d8800415 stw r2,16(sp)
80080a0: d8c00417 ldw r3,16(sp)
80080a4: 0005883a mov r2,zero
80080a8: d8800515 stw r2,20(sp)
80080ac: 1811883a mov r8,r3
80080b0: 003f9d06 br 8007f28 <__umoddi3+0x11c>
80080b4: 00804034 movhi r2,256
80080b8: 10bfffc4 addi r2,r2,-1
80080bc: 14c0c636 bltu r2,r19,80083d8 <__umoddi3+0x5cc>
80080c0: 01400404 movi r5,16
80080c4: 2805883a mov r2,r5
80080c8: 003f6c06 br 8007e7c <__umoddi3+0x70>
80080cc: 01000044 movi r4,1
80080d0: 000b883a mov r5,zero
80080d4: 80096d40 call 80096d4 <__udivsi3>
80080d8: 1027883a mov r19,r2
80080dc: 00bfffd4 movui r2,65535
80080e0: 14fff436 bltu r2,r19,80080b4 <__umoddi3+0x2a8>
80080e4: 003f6106 br 8007e6c <__umoddi3+0x60>
80080e8: 00804034 movhi r2,256
80080ec: 10bfffc4 addi r2,r2,-1
80080f0: 1200c536 bltu r2,r8,8008408 <__umoddi3+0x5fc>
80080f4: 01400404 movi r5,16
80080f8: 2805883a mov r2,r5
80080fc: 003fb406 br 8007fd0 <__umoddi3+0x1c4>
8008100: 00804034 movhi r2,256
8008104: 10bfffc4 addi r2,r2,-1
8008108: 11c0c236 bltu r2,r7,8008414 <__umoddi3+0x608>
800810c: 01400404 movi r5,16
8008110: 2805883a mov r2,r5
8008114: 003f9806 br 8007f78 <__umoddi3+0x16c>
8008118: 84c9c83a sub r4,r16,r19
800811c: 8105803a cmpltu r2,r16,r4
8008120: a987c83a sub r3,r21,r6
8008124: 18abc83a sub r21,r3,r2
8008128: 2021883a mov r16,r4
800812c: 003f9d06 br 8007fa4 <__umoddi3+0x198>
8008130: 9ca6983a sll r19,r19,r18
8008134: 3485c83a sub r2,r6,r18
8008138: a8a2d83a srl r17,r21,r2
800813c: 982ed43a srli r23,r19,16
8008140: ac86983a sll r3,r21,r18
8008144: 8084d83a srl r2,r16,r2
8008148: 8809883a mov r4,r17
800814c: b80b883a mov r5,r23
8008150: 18b8b03a or fp,r3,r2
8008154: 9d3fffcc andi r20,r19,65535
8008158: 80096d40 call 80096d4 <__udivsi3>
800815c: 100b883a mov r5,r2
8008160: a009883a mov r4,r20
8008164: 80096e40 call 80096e4 <__mulsi3>
8008168: 8809883a mov r4,r17
800816c: b80b883a mov r5,r23
8008170: 102b883a mov r21,r2
8008174: 80096dc0 call 80096dc <__umodsi3>
8008178: 1004943a slli r2,r2,16
800817c: e006d43a srli r3,fp,16
8008180: 902d883a mov r22,r18
8008184: 10c4b03a or r2,r2,r3
8008188: 1540022e bgeu r2,r21,8008194 <__umoddi3+0x388>
800818c: 14c5883a add r2,r2,r19
8008190: 14c0ab2e bgeu r2,r19,8008440 <__umoddi3+0x634>
8008194: 1563c83a sub r17,r2,r21
8008198: 8809883a mov r4,r17
800819c: b80b883a mov r5,r23
80081a0: 80096d40 call 80096d4 <__udivsi3>
80081a4: 100b883a mov r5,r2
80081a8: a009883a mov r4,r20
80081ac: 80096e40 call 80096e4 <__mulsi3>
80081b0: 8809883a mov r4,r17
80081b4: b80b883a mov r5,r23
80081b8: 102b883a mov r21,r2
80081bc: 80096dc0 call 80096dc <__umodsi3>
80081c0: 1004943a slli r2,r2,16
80081c4: e0ffffcc andi r3,fp,65535
80081c8: 10c4b03a or r2,r2,r3
80081cc: 1540042e bgeu r2,r21,80081e0 <__umoddi3+0x3d4>
80081d0: 14c5883a add r2,r2,r19
80081d4: 14c00236 bltu r2,r19,80081e0 <__umoddi3+0x3d4>
80081d8: 1540012e bgeu r2,r21,80081e0 <__umoddi3+0x3d4>
80081dc: 14c5883a add r2,r2,r19
80081e0: 84a0983a sll r16,r16,r18
80081e4: 156bc83a sub r21,r2,r21
80081e8: 003f3106 br 8007eb0 <__umoddi3+0xa4>
80081ec: 3c8fc83a sub r7,r7,r18
80081f0: 3486983a sll r3,r6,r18
80081f4: 99c4d83a srl r2,r19,r7
80081f8: a9e2d83a srl r17,r21,r7
80081fc: ac8c983a sll r6,r21,r18
8008200: 18acb03a or r22,r3,r2
8008204: b02ed43a srli r23,r22,16
8008208: 81c4d83a srl r2,r16,r7
800820c: 8809883a mov r4,r17
8008210: b80b883a mov r5,r23
8008214: 308cb03a or r6,r6,r2
8008218: d9c00315 stw r7,12(sp)
800821c: d9800215 stw r6,8(sp)
8008220: b53fffcc andi r20,r22,65535
8008224: 80096d40 call 80096d4 <__udivsi3>
8008228: 100b883a mov r5,r2
800822c: a009883a mov r4,r20
8008230: 1039883a mov fp,r2
8008234: 80096e40 call 80096e4 <__mulsi3>
8008238: 8809883a mov r4,r17
800823c: b80b883a mov r5,r23
8008240: 102b883a mov r21,r2
8008244: 80096dc0 call 80096dc <__umodsi3>
8008248: d9000217 ldw r4,8(sp)
800824c: 1004943a slli r2,r2,16
8008250: 9ca6983a sll r19,r19,r18
8008254: 2006d43a srli r3,r4,16
8008258: 84a0983a sll r16,r16,r18
800825c: dcc00015 stw r19,0(sp)
8008260: 10c4b03a or r2,r2,r3
8008264: dc000115 stw r16,4(sp)
8008268: 1540032e bgeu r2,r21,8008278 <__umoddi3+0x46c>
800826c: 1585883a add r2,r2,r22
8008270: e73fffc4 addi fp,fp,-1
8008274: 15806e2e bgeu r2,r22,8008430 <__umoddi3+0x624>
8008278: 1563c83a sub r17,r2,r21
800827c: 8809883a mov r4,r17
8008280: b80b883a mov r5,r23
8008284: 80096d40 call 80096d4 <__udivsi3>
8008288: 100b883a mov r5,r2
800828c: a009883a mov r4,r20
8008290: 1021883a mov r16,r2
8008294: 80096e40 call 80096e4 <__mulsi3>
8008298: b80b883a mov r5,r23
800829c: 8809883a mov r4,r17
80082a0: 1029883a mov r20,r2
80082a4: 80096dc0 call 80096dc <__umodsi3>
80082a8: d9400217 ldw r5,8(sp)
80082ac: 1004943a slli r2,r2,16
80082b0: 28ffffcc andi r3,r5,65535
80082b4: 10c4b03a or r2,r2,r3
80082b8: 1500032e bgeu r2,r20,80082c8 <__umoddi3+0x4bc>
80082bc: 1585883a add r2,r2,r22
80082c0: 843fffc4 addi r16,r16,-1
80082c4: 1580562e bgeu r2,r22,8008420 <__umoddi3+0x614>
80082c8: d9800017 ldw r6,0(sp)
80082cc: e022943a slli r17,fp,16
80082d0: 302ed43a srli r23,r6,16
80082d4: 8462b03a or r17,r16,r17
80082d8: 34ffffcc andi r19,r6,65535
80082dc: 882ad43a srli r21,r17,16
80082e0: 8c7fffcc andi r17,r17,65535
80082e4: 8809883a mov r4,r17
80082e8: 980b883a mov r5,r19
80082ec: 1521c83a sub r16,r2,r20
80082f0: 80096e40 call 80096e4 <__mulsi3>
80082f4: 8809883a mov r4,r17
80082f8: b80b883a mov r5,r23
80082fc: 1029883a mov r20,r2
8008300: 80096e40 call 80096e4 <__mulsi3>
8008304: 980b883a mov r5,r19
8008308: a809883a mov r4,r21
800830c: 1023883a mov r17,r2
8008310: 80096e40 call 80096e4 <__mulsi3>
8008314: a809883a mov r4,r21
8008318: b80b883a mov r5,r23
800831c: 1027883a mov r19,r2
8008320: 80096e40 call 80096e4 <__mulsi3>
8008324: 100b883a mov r5,r2
8008328: a004d43a srli r2,r20,16
800832c: 8ce3883a add r17,r17,r19
8008330: 1449883a add r4,r2,r17
8008334: 24c0022e bgeu r4,r19,8008340 <__umoddi3+0x534>
8008338: 00800074 movhi r2,1
800833c: 288b883a add r5,r5,r2
8008340: 2004d43a srli r2,r4,16
8008344: 2008943a slli r4,r4,16
8008348: a0ffffcc andi r3,r20,65535
800834c: 288d883a add r6,r5,r2
8008350: 20c9883a add r4,r4,r3
8008354: 81800b36 bltu r16,r6,8008384 <__umoddi3+0x578>
8008358: 81804026 beq r16,r6,800845c <__umoddi3+0x650>
800835c: 818dc83a sub r6,r16,r6
8008360: 00000f06 br 80083a0 <__umoddi3+0x594>
8008364: 30c5c83a sub r2,r6,r3
8008368: 182d883a mov r22,r3
800836c: 8084d83a srl r2,r16,r2
8008370: a8c6983a sll r3,r21,r3
8008374: 9da6983a sll r19,r19,r22
8008378: 85a0983a sll r16,r16,r22
800837c: 18aab03a or r21,r3,r2
8008380: 003f1d06 br 8007ff8 <__umoddi3+0x1ec>
8008384: d8c00017 ldw r3,0(sp)
8008388: 20c5c83a sub r2,r4,r3
800838c: 2089803a cmpltu r4,r4,r2
8008390: 3587c83a sub r3,r6,r22
8008394: 1907c83a sub r3,r3,r4
8008398: 80cdc83a sub r6,r16,r3
800839c: 1009883a mov r4,r2
80083a0: d9400117 ldw r5,4(sp)
80083a4: 2905c83a sub r2,r5,r4
80083a8: 2887803a cmpltu r3,r5,r2
80083ac: 30c7c83a sub r3,r6,r3
80083b0: d9800317 ldw r6,12(sp)
80083b4: 1484d83a srl r2,r2,r18
80083b8: 1988983a sll r4,r3,r6
80083bc: 1c86d83a srl r3,r3,r18
80083c0: 2088b03a or r4,r4,r2
80083c4: 2011883a mov r8,r4
80083c8: 1813883a mov r9,r3
80083cc: d9000415 stw r4,16(sp)
80083d0: d8c00515 stw r3,20(sp)
80083d4: 003ed406 br 8007f28 <__umoddi3+0x11c>
80083d8: 01400604 movi r5,24
80083dc: 2805883a mov r2,r5
80083e0: 003ea606 br 8007e7c <__umoddi3+0x70>
80083e4: 01400204 movi r5,8
80083e8: 2805883a mov r2,r5
80083ec: 003ea306 br 8007e7c <__umoddi3+0x70>
80083f0: 01400204 movi r5,8
80083f4: 2805883a mov r2,r5
80083f8: 003edf06 br 8007f78 <__umoddi3+0x16c>
80083fc: 01400204 movi r5,8
8008400: 2805883a mov r2,r5
8008404: 003ef206 br 8007fd0 <__umoddi3+0x1c4>
8008408: 01400604 movi r5,24
800840c: 2805883a mov r2,r5
8008410: 003eef06 br 8007fd0 <__umoddi3+0x1c4>
8008414: 01400604 movi r5,24
8008418: 2805883a mov r2,r5
800841c: 003ed606 br 8007f78 <__umoddi3+0x16c>
8008420: 153fa92e bgeu r2,r20,80082c8 <__umoddi3+0x4bc>
8008424: 843fffc4 addi r16,r16,-1
8008428: 1585883a add r2,r2,r22
800842c: 003fa606 br 80082c8 <__umoddi3+0x4bc>
8008430: 157f912e bgeu r2,r21,8008278 <__umoddi3+0x46c>
8008434: e73fffc4 addi fp,fp,-1
8008438: 1585883a add r2,r2,r22
800843c: 003f8e06 br 8008278 <__umoddi3+0x46c>
8008440: 157f542e bgeu r2,r21,8008194 <__umoddi3+0x388>
8008444: 14c5883a add r2,r2,r19
8008448: 003f5206 br 8008194 <__umoddi3+0x388>
800844c: 14c5883a add r2,r2,r19
8008450: 003efc06 br 8008044 <__umoddi3+0x238>
8008454: 14c5883a add r2,r2,r19
8008458: 003ea606 br 8007ef4 <__umoddi3+0xe8>
800845c: d8800117 ldw r2,4(sp)
8008460: 113fc836 bltu r2,r4,8008384 <__umoddi3+0x578>
8008464: 000d883a mov r6,zero
8008468: 003fcd06 br 80083a0 <__umoddi3+0x594>
0800846c <_fpadd_parts>:
800846c: defff804 addi sp,sp,-32
8008470: dcc00315 stw r19,12(sp)
8008474: 2027883a mov r19,r4
8008478: 21000017 ldw r4,0(r4)
800847c: 00c00044 movi r3,1
8008480: dd400515 stw r21,20(sp)
8008484: dd000415 stw r20,16(sp)
8008488: ddc00715 stw r23,28(sp)
800848c: dd800615 stw r22,24(sp)
8008490: dc800215 stw r18,8(sp)
8008494: dc400115 stw r17,4(sp)
8008498: dc000015 stw r16,0(sp)
800849c: 282b883a mov r21,r5
80084a0: 3029883a mov r20,r6
80084a4: 1900632e bgeu r3,r4,8008634 <_fpadd_parts+0x1c8>
80084a8: 28800017 ldw r2,0(r5)
80084ac: 1880812e bgeu r3,r2,80086b4 <_fpadd_parts+0x248>
80084b0: 00c00104 movi r3,4
80084b4: 20c0dc26 beq r4,r3,8008828 <_fpadd_parts+0x3bc>
80084b8: 10c07e26 beq r2,r3,80086b4 <_fpadd_parts+0x248>
80084bc: 00c00084 movi r3,2
80084c0: 10c06726 beq r2,r3,8008660 <_fpadd_parts+0x1f4>
80084c4: 20c07b26 beq r4,r3,80086b4 <_fpadd_parts+0x248>
80084c8: 9dc00217 ldw r23,8(r19)
80084cc: 28c00217 ldw r3,8(r5)
80084d0: 9c400317 ldw r17,12(r19)
80084d4: 2bc00317 ldw r15,12(r5)
80084d8: b8cdc83a sub r6,r23,r3
80084dc: 9c800417 ldw r18,16(r19)
80084e0: 2c000417 ldw r16,16(r5)
80084e4: 3009883a mov r4,r6
80084e8: 30009716 blt r6,zero,8008748 <_fpadd_parts+0x2dc>
80084ec: 00800fc4 movi r2,63
80084f0: 11806b16 blt r2,r6,80086a0 <_fpadd_parts+0x234>
80084f4: 0100a40e bge zero,r4,8008788 <_fpadd_parts+0x31c>
80084f8: 35bff804 addi r22,r6,-32
80084fc: b000bc16 blt r22,zero,80087f0 <_fpadd_parts+0x384>
8008500: 8596d83a srl r11,r16,r22
8008504: 0019883a mov r12,zero
8008508: 0013883a mov r9,zero
800850c: 01000044 movi r4,1
8008510: 0015883a mov r10,zero
8008514: b000be16 blt r22,zero,8008810 <_fpadd_parts+0x3a4>
8008518: 2590983a sll r8,r4,r22
800851c: 000f883a mov r7,zero
8008520: 00bfffc4 movi r2,-1
8008524: 3889883a add r4,r7,r2
8008528: 408b883a add r5,r8,r2
800852c: 21cd803a cmpltu r6,r4,r7
8008530: 314b883a add r5,r6,r5
8008534: 7904703a and r2,r15,r4
8008538: 8146703a and r3,r16,r5
800853c: 10c4b03a or r2,r2,r3
8008540: 10000226 beq r2,zero,800854c <_fpadd_parts+0xe0>
8008544: 02400044 movi r9,1
8008548: 0015883a mov r10,zero
800854c: 5a5eb03a or r15,r11,r9
8008550: 62a0b03a or r16,r12,r10
8008554: 99400117 ldw r5,4(r19)
8008558: a8800117 ldw r2,4(r21)
800855c: 28806e26 beq r5,r2,8008718 <_fpadd_parts+0x2ac>
8008560: 28006626 beq r5,zero,80086fc <_fpadd_parts+0x290>
8008564: 7c45c83a sub r2,r15,r17
8008568: 7889803a cmpltu r4,r15,r2
800856c: 8487c83a sub r3,r16,r18
8008570: 1909c83a sub r4,r3,r4
8008574: 100d883a mov r6,r2
8008578: 200f883a mov r7,r4
800857c: 38007716 blt r7,zero,800875c <_fpadd_parts+0x2f0>
8008580: a5c00215 stw r23,8(r20)
8008584: a1c00415 stw r7,16(r20)
8008588: a0000115 stw zero,4(r20)
800858c: a1800315 stw r6,12(r20)
8008590: a2000317 ldw r8,12(r20)
8008594: a2400417 ldw r9,16(r20)
8008598: 00bfffc4 movi r2,-1
800859c: 408b883a add r5,r8,r2
80085a0: 2a09803a cmpltu r4,r5,r8
80085a4: 488d883a add r6,r9,r2
80085a8: 01c40034 movhi r7,4096
80085ac: 39ffffc4 addi r7,r7,-1
80085b0: 218d883a add r6,r4,r6
80085b4: 39801736 bltu r7,r6,8008614 <_fpadd_parts+0x1a8>
80085b8: 31c06526 beq r6,r7,8008750 <_fpadd_parts+0x2e4>
80085bc: a3000217 ldw r12,8(r20)
80085c0: 4209883a add r4,r8,r8
80085c4: 00bfffc4 movi r2,-1
80085c8: 220f803a cmpltu r7,r4,r8
80085cc: 4a4b883a add r5,r9,r9
80085d0: 394f883a add r7,r7,r5
80085d4: 2095883a add r10,r4,r2
80085d8: 3897883a add r11,r7,r2
80085dc: 510d803a cmpltu r6,r10,r4
80085e0: 6099883a add r12,r12,r2
80085e4: 32d7883a add r11,r6,r11
80085e8: 00840034 movhi r2,4096
80085ec: 10bfffc4 addi r2,r2,-1
80085f0: 2011883a mov r8,r4
80085f4: 3813883a mov r9,r7
80085f8: a1000315 stw r4,12(r20)
80085fc: a1c00415 stw r7,16(r20)
8008600: a3000215 stw r12,8(r20)
8008604: 12c00336 bltu r2,r11,8008614 <_fpadd_parts+0x1a8>
8008608: 58bfed1e bne r11,r2,80085c0 <_fpadd_parts+0x154>
800860c: 00bfff84 movi r2,-2
8008610: 12bfeb2e bgeu r2,r10,80085c0 <_fpadd_parts+0x154>
8008614: a2800417 ldw r10,16(r20)
8008618: 008000c4 movi r2,3
800861c: 00c80034 movhi r3,8192
8008620: 18ffffc4 addi r3,r3,-1
8008624: a2400317 ldw r9,12(r20)
8008628: a0800015 stw r2,0(r20)
800862c: 1a802336 bltu r3,r10,80086bc <_fpadd_parts+0x250>
8008630: a027883a mov r19,r20
8008634: 9805883a mov r2,r19
8008638: ddc00717 ldw r23,28(sp)
800863c: dd800617 ldw r22,24(sp)
8008640: dd400517 ldw r21,20(sp)
8008644: dd000417 ldw r20,16(sp)
8008648: dcc00317 ldw r19,12(sp)
800864c: dc800217 ldw r18,8(sp)
8008650: dc400117 ldw r17,4(sp)
8008654: dc000017 ldw r16,0(sp)
8008658: dec00804 addi sp,sp,32
800865c: f800283a ret
8008660: 20fff41e bne r4,r3,8008634 <_fpadd_parts+0x1c8>
8008664: 31000015 stw r4,0(r6)
8008668: 98800117 ldw r2,4(r19)
800866c: 30800115 stw r2,4(r6)
8008670: 98c00217 ldw r3,8(r19)
8008674: 30c00215 stw r3,8(r6)
8008678: 98800317 ldw r2,12(r19)
800867c: 30800315 stw r2,12(r6)
8008680: 98c00417 ldw r3,16(r19)
8008684: 30c00415 stw r3,16(r6)
8008688: 98800117 ldw r2,4(r19)
800868c: 28c00117 ldw r3,4(r5)
8008690: 3027883a mov r19,r6
8008694: 10c4703a and r2,r2,r3
8008698: 30800115 stw r2,4(r6)
800869c: 003fe506 br 8008634 <_fpadd_parts+0x1c8>
80086a0: 1dc02616 blt r3,r23,800873c <_fpadd_parts+0x2d0>
80086a4: 0023883a mov r17,zero
80086a8: 182f883a mov r23,r3
80086ac: 0025883a mov r18,zero
80086b0: 003fa806 br 8008554 <_fpadd_parts+0xe8>
80086b4: a827883a mov r19,r21
80086b8: 003fde06 br 8008634 <_fpadd_parts+0x1c8>
80086bc: 01800044 movi r6,1
80086c0: 500497fa slli r2,r10,31
80086c4: 4808d07a srli r4,r9,1
80086c8: 518ad83a srl r5,r10,r6
80086cc: a2000217 ldw r8,8(r20)
80086d0: 1108b03a or r4,r2,r4
80086d4: 0007883a mov r3,zero
80086d8: 4984703a and r2,r9,r6
80086dc: 208cb03a or r6,r4,r2
80086e0: 28ceb03a or r7,r5,r3
80086e4: 42000044 addi r8,r8,1
80086e8: a027883a mov r19,r20
80086ec: a1c00415 stw r7,16(r20)
80086f0: a2000215 stw r8,8(r20)
80086f4: a1800315 stw r6,12(r20)
80086f8: 003fce06 br 8008634 <_fpadd_parts+0x1c8>
80086fc: 8bc5c83a sub r2,r17,r15
8008700: 8889803a cmpltu r4,r17,r2
8008704: 9407c83a sub r3,r18,r16
8008708: 1909c83a sub r4,r3,r4
800870c: 100d883a mov r6,r2
8008710: 200f883a mov r7,r4
8008714: 003f9906 br 800857c <_fpadd_parts+0x110>
8008718: 7c45883a add r2,r15,r17
800871c: 13c9803a cmpltu r4,r2,r15
8008720: 8487883a add r3,r16,r18
8008724: 20c9883a add r4,r4,r3
8008728: a1400115 stw r5,4(r20)
800872c: a5c00215 stw r23,8(r20)
8008730: a0800315 stw r2,12(r20)
8008734: a1000415 stw r4,16(r20)
8008738: 003fb606 br 8008614 <_fpadd_parts+0x1a8>
800873c: 001f883a mov r15,zero
8008740: 0021883a mov r16,zero
8008744: 003f8306 br 8008554 <_fpadd_parts+0xe8>
8008748: 018dc83a sub r6,zero,r6
800874c: 003f6706 br 80084ec <_fpadd_parts+0x80>
8008750: 00bfff84 movi r2,-2
8008754: 117faf36 bltu r2,r5,8008614 <_fpadd_parts+0x1a8>
8008758: 003f9806 br 80085bc <_fpadd_parts+0x150>
800875c: 0005883a mov r2,zero
8008760: 1189c83a sub r4,r2,r6
8008764: 1105803a cmpltu r2,r2,r4
8008768: 01cbc83a sub r5,zero,r7
800876c: 2885c83a sub r2,r5,r2
8008770: 01800044 movi r6,1
8008774: a1800115 stw r6,4(r20)
8008778: a5c00215 stw r23,8(r20)
800877c: a1000315 stw r4,12(r20)
8008780: a0800415 stw r2,16(r20)
8008784: 003f8206 br 8008590 <_fpadd_parts+0x124>
8008788: 203f7226 beq r4,zero,8008554 <_fpadd_parts+0xe8>
800878c: 35bff804 addi r22,r6,-32
8008790: b9af883a add r23,r23,r6
8008794: b0003116 blt r22,zero,800885c <_fpadd_parts+0x3f0>
8008798: 959ad83a srl r13,r18,r22
800879c: 001d883a mov r14,zero
80087a0: 000f883a mov r7,zero
80087a4: 01000044 movi r4,1
80087a8: 0011883a mov r8,zero
80087ac: b0002516 blt r22,zero,8008844 <_fpadd_parts+0x3d8>
80087b0: 2594983a sll r10,r4,r22
80087b4: 0013883a mov r9,zero
80087b8: 00bfffc4 movi r2,-1
80087bc: 4889883a add r4,r9,r2
80087c0: 508b883a add r5,r10,r2
80087c4: 224d803a cmpltu r6,r4,r9
80087c8: 314b883a add r5,r6,r5
80087cc: 8904703a and r2,r17,r4
80087d0: 9146703a and r3,r18,r5
80087d4: 10c4b03a or r2,r2,r3
80087d8: 10000226 beq r2,zero,80087e4 <_fpadd_parts+0x378>
80087dc: 01c00044 movi r7,1
80087e0: 0011883a mov r8,zero
80087e4: 69e2b03a or r17,r13,r7
80087e8: 7224b03a or r18,r14,r8
80087ec: 003f5906 br 8008554 <_fpadd_parts+0xe8>
80087f0: 8407883a add r3,r16,r16
80087f4: 008007c4 movi r2,31
80087f8: 1185c83a sub r2,r2,r6
80087fc: 1886983a sll r3,r3,r2
8008800: 7996d83a srl r11,r15,r6
8008804: 8198d83a srl r12,r16,r6
8008808: 1ad6b03a or r11,r3,r11
800880c: 003f3e06 br 8008508 <_fpadd_parts+0x9c>
8008810: 2006d07a srli r3,r4,1
8008814: 008007c4 movi r2,31
8008818: 1185c83a sub r2,r2,r6
800881c: 1890d83a srl r8,r3,r2
8008820: 218e983a sll r7,r4,r6
8008824: 003f3e06 br 8008520 <_fpadd_parts+0xb4>
8008828: 113f821e bne r2,r4,8008634 <_fpadd_parts+0x1c8>
800882c: 28c00117 ldw r3,4(r5)
8008830: 98800117 ldw r2,4(r19)
8008834: 10ff7f26 beq r2,r3,8008634 <_fpadd_parts+0x1c8>
8008838: 04c20074 movhi r19,2049
800883c: 9cf81e04 addi r19,r19,-8072
8008840: 003f7c06 br 8008634 <_fpadd_parts+0x1c8>
8008844: 2006d07a srli r3,r4,1
8008848: 008007c4 movi r2,31
800884c: 1185c83a sub r2,r2,r6
8008850: 1894d83a srl r10,r3,r2
8008854: 2192983a sll r9,r4,r6
8008858: 003fd706 br 80087b8 <_fpadd_parts+0x34c>
800885c: 9487883a add r3,r18,r18
8008860: 008007c4 movi r2,31
8008864: 1185c83a sub r2,r2,r6
8008868: 1886983a sll r3,r3,r2
800886c: 899ad83a srl r13,r17,r6
8008870: 919cd83a srl r14,r18,r6
8008874: 1b5ab03a or r13,r3,r13
8008878: 003fc906 br 80087a0 <_fpadd_parts+0x334>
0800887c <__subdf3>:
800887c: deffea04 addi sp,sp,-88
8008880: dcc01415 stw r19,80(sp)
8008884: dcc00404 addi r19,sp,16
8008888: 2011883a mov r8,r4
800888c: 2813883a mov r9,r5
8008890: dc401315 stw r17,76(sp)
8008894: d809883a mov r4,sp
8008898: 980b883a mov r5,r19
800889c: dc400904 addi r17,sp,36
80088a0: dfc01515 stw ra,84(sp)
80088a4: da400115 stw r9,4(sp)
80088a8: d9c00315 stw r7,12(sp)
80088ac: da000015 stw r8,0(sp)
80088b0: d9800215 stw r6,8(sp)
80088b4: 8009bd40 call 8009bd4 <__unpack_d>
80088b8: d9000204 addi r4,sp,8
80088bc: 880b883a mov r5,r17
80088c0: 8009bd40 call 8009bd4 <__unpack_d>
80088c4: d8800a17 ldw r2,40(sp)
80088c8: 880b883a mov r5,r17
80088cc: 9809883a mov r4,r19
80088d0: d9800e04 addi r6,sp,56
80088d4: 1080005c xori r2,r2,1
80088d8: d8800a15 stw r2,40(sp)
80088dc: 800846c0 call 800846c <_fpadd_parts>
80088e0: 1009883a mov r4,r2
80088e4: 80098c00 call 80098c0 <__pack_d>
80088e8: dfc01517 ldw ra,84(sp)
80088ec: dcc01417 ldw r19,80(sp)
80088f0: dc401317 ldw r17,76(sp)
80088f4: dec01604 addi sp,sp,88
80088f8: f800283a ret
080088fc <__adddf3>:
80088fc: deffea04 addi sp,sp,-88
8008900: dcc01415 stw r19,80(sp)
8008904: dcc00404 addi r19,sp,16
8008908: 2011883a mov r8,r4
800890c: 2813883a mov r9,r5
8008910: dc401315 stw r17,76(sp)
8008914: d809883a mov r4,sp
8008918: 980b883a mov r5,r19
800891c: dc400904 addi r17,sp,36
8008920: dfc01515 stw ra,84(sp)
8008924: da400115 stw r9,4(sp)
8008928: d9c00315 stw r7,12(sp)
800892c: da000015 stw r8,0(sp)
8008930: d9800215 stw r6,8(sp)
8008934: 8009bd40 call 8009bd4 <__unpack_d>
8008938: d9000204 addi r4,sp,8
800893c: 880b883a mov r5,r17
8008940: 8009bd40 call 8009bd4 <__unpack_d>
8008944: d9800e04 addi r6,sp,56
8008948: 9809883a mov r4,r19
800894c: 880b883a mov r5,r17
8008950: 800846c0 call 800846c <_fpadd_parts>
8008954: 1009883a mov r4,r2
8008958: 80098c00 call 80098c0 <__pack_d>
800895c: dfc01517 ldw ra,84(sp)
8008960: dcc01417 ldw r19,80(sp)
8008964: dc401317 ldw r17,76(sp)
8008968: dec01604 addi sp,sp,88
800896c: f800283a ret
08008970 <__muldf3>:
8008970: deffe004 addi sp,sp,-128
8008974: dc401815 stw r17,96(sp)
8008978: dc400404 addi r17,sp,16
800897c: 2011883a mov r8,r4
8008980: 2813883a mov r9,r5
8008984: dc001715 stw r16,92(sp)
8008988: d809883a mov r4,sp
800898c: 880b883a mov r5,r17
8008990: dc000904 addi r16,sp,36
8008994: dfc01f15 stw ra,124(sp)
8008998: da400115 stw r9,4(sp)
800899c: d9c00315 stw r7,12(sp)
80089a0: da000015 stw r8,0(sp)
80089a4: d9800215 stw r6,8(sp)
80089a8: ddc01e15 stw r23,120(sp)
80089ac: dd801d15 stw r22,116(sp)
80089b0: dd401c15 stw r21,112(sp)
80089b4: dd001b15 stw r20,108(sp)
80089b8: dcc01a15 stw r19,104(sp)
80089bc: dc801915 stw r18,100(sp)
80089c0: 8009bd40 call 8009bd4 <__unpack_d>
80089c4: d9000204 addi r4,sp,8
80089c8: 800b883a mov r5,r16
80089cc: 8009bd40 call 8009bd4 <__unpack_d>
80089d0: d9000417 ldw r4,16(sp)
80089d4: 00800044 movi r2,1
80089d8: 1100102e bgeu r2,r4,8008a1c <__muldf3+0xac>
80089dc: d8c00917 ldw r3,36(sp)
80089e0: 10c0062e bgeu r2,r3,80089fc <__muldf3+0x8c>
80089e4: 00800104 movi r2,4
80089e8: 20800a26 beq r4,r2,8008a14 <__muldf3+0xa4>
80089ec: 1880cc26 beq r3,r2,8008d20 <__muldf3+0x3b0>
80089f0: 00800084 movi r2,2
80089f4: 20800926 beq r4,r2,8008a1c <__muldf3+0xac>
80089f8: 1880191e bne r3,r2,8008a60 <__muldf3+0xf0>
80089fc: d8c00a17 ldw r3,40(sp)
8008a00: d8800517 ldw r2,20(sp)
8008a04: 8009883a mov r4,r16
8008a08: 10c4c03a cmpne r2,r2,r3
8008a0c: d8800a15 stw r2,40(sp)
8008a10: 00000706 br 8008a30 <__muldf3+0xc0>
8008a14: 00800084 movi r2,2
8008a18: 1880c326 beq r3,r2,8008d28 <__muldf3+0x3b8>
8008a1c: d8800517 ldw r2,20(sp)
8008a20: d8c00a17 ldw r3,40(sp)
8008a24: 8809883a mov r4,r17
8008a28: 10c4c03a cmpne r2,r2,r3
8008a2c: d8800515 stw r2,20(sp)
8008a30: 80098c00 call 80098c0 <__pack_d>
8008a34: dfc01f17 ldw ra,124(sp)
8008a38: ddc01e17 ldw r23,120(sp)
8008a3c: dd801d17 ldw r22,116(sp)
8008a40: dd401c17 ldw r21,112(sp)
8008a44: dd001b17 ldw r20,108(sp)
8008a48: dcc01a17 ldw r19,104(sp)
8008a4c: dc801917 ldw r18,100(sp)
8008a50: dc401817 ldw r17,96(sp)
8008a54: dc001717 ldw r16,92(sp)
8008a58: dec02004 addi sp,sp,128
8008a5c: f800283a ret
8008a60: dd800717 ldw r22,28(sp)
8008a64: dc800c17 ldw r18,48(sp)
8008a68: 002b883a mov r21,zero
8008a6c: 0023883a mov r17,zero
8008a70: a80b883a mov r5,r21
8008a74: b00d883a mov r6,r22
8008a78: 880f883a mov r7,r17
8008a7c: ddc00817 ldw r23,32(sp)
8008a80: dcc00d17 ldw r19,52(sp)
8008a84: 9009883a mov r4,r18
8008a88: 800971c0 call 800971c <__muldi3>
8008a8c: 001b883a mov r13,zero
8008a90: 680f883a mov r7,r13
8008a94: b009883a mov r4,r22
8008a98: 000b883a mov r5,zero
8008a9c: 980d883a mov r6,r19
8008aa0: b82d883a mov r22,r23
8008aa4: 002f883a mov r23,zero
8008aa8: db401615 stw r13,88(sp)
8008aac: d8801315 stw r2,76(sp)
8008ab0: d8c01415 stw r3,80(sp)
8008ab4: dcc01515 stw r19,84(sp)
8008ab8: 800971c0 call 800971c <__muldi3>
8008abc: b00d883a mov r6,r22
8008ac0: 000b883a mov r5,zero
8008ac4: 9009883a mov r4,r18
8008ac8: b80f883a mov r7,r23
8008acc: 1021883a mov r16,r2
8008ad0: 1823883a mov r17,r3
8008ad4: 800971c0 call 800971c <__muldi3>
8008ad8: 8085883a add r2,r16,r2
8008adc: 140d803a cmpltu r6,r2,r16
8008ae0: 88c7883a add r3,r17,r3
8008ae4: 30cd883a add r6,r6,r3
8008ae8: 1029883a mov r20,r2
8008aec: 302b883a mov r21,r6
8008af0: da801317 ldw r10,76(sp)
8008af4: dac01417 ldw r11,80(sp)
8008af8: db001517 ldw r12,84(sp)
8008afc: db401617 ldw r13,88(sp)
8008b00: 3440612e bgeu r6,r17,8008c88 <__muldf3+0x318>
8008b04: 0009883a mov r4,zero
8008b08: 5105883a add r2,r10,r4
8008b0c: 128d803a cmpltu r6,r2,r10
8008b10: 5d07883a add r3,r11,r20
8008b14: 30cd883a add r6,r6,r3
8008b18: 0021883a mov r16,zero
8008b1c: 04400044 movi r17,1
8008b20: 1025883a mov r18,r2
8008b24: 3027883a mov r19,r6
8008b28: 32c06236 bltu r6,r11,8008cb4 <__muldf3+0x344>
8008b2c: 59807a26 beq r11,r6,8008d18 <__muldf3+0x3a8>
8008b30: 680b883a mov r5,r13
8008b34: b80f883a mov r7,r23
8008b38: 6009883a mov r4,r12
8008b3c: b00d883a mov r6,r22
8008b40: 800971c0 call 800971c <__muldi3>
8008b44: 1009883a mov r4,r2
8008b48: 000f883a mov r7,zero
8008b4c: 1545883a add r2,r2,r21
8008b50: 1111803a cmpltu r8,r2,r4
8008b54: 19c7883a add r3,r3,r7
8008b58: 40c7883a add r3,r8,r3
8008b5c: 88cb883a add r5,r17,r3
8008b60: d8c00617 ldw r3,24(sp)
8008b64: 8089883a add r4,r16,r2
8008b68: d8800b17 ldw r2,44(sp)
8008b6c: 18c00104 addi r3,r3,4
8008b70: 240d803a cmpltu r6,r4,r16
8008b74: 10c7883a add r3,r2,r3
8008b78: 2013883a mov r9,r4
8008b7c: d8800a17 ldw r2,40(sp)
8008b80: d9000517 ldw r4,20(sp)
8008b84: 314d883a add r6,r6,r5
8008b88: 3015883a mov r10,r6
8008b8c: 2088c03a cmpne r4,r4,r2
8008b90: 00880034 movhi r2,8192
8008b94: 10bfffc4 addi r2,r2,-1
8008b98: d9000f15 stw r4,60(sp)
8008b9c: d8c01015 stw r3,64(sp)
8008ba0: 1180162e bgeu r2,r6,8008bfc <__muldf3+0x28c>
8008ba4: 1811883a mov r8,r3
8008ba8: 101f883a mov r15,r2
8008bac: 980497fa slli r2,r19,31
8008bb0: 9016d07a srli r11,r18,1
8008bb4: 500697fa slli r3,r10,31
8008bb8: 480cd07a srli r6,r9,1
8008bbc: 500ed07a srli r7,r10,1
8008bc0: 12d6b03a or r11,r2,r11
8008bc4: 00800044 movi r2,1
8008bc8: 198cb03a or r6,r3,r6
8008bcc: 4888703a and r4,r9,r2
8008bd0: 9818d07a srli r12,r19,1
8008bd4: 001b883a mov r13,zero
8008bd8: 03a00034 movhi r14,32768
8008bdc: 3013883a mov r9,r6
8008be0: 3815883a mov r10,r7
8008be4: 4091883a add r8,r8,r2
8008be8: 20000226 beq r4,zero,8008bf4 <__muldf3+0x284>
8008bec: 5b64b03a or r18,r11,r13
8008bf0: 63a6b03a or r19,r12,r14
8008bf4: 7abfed36 bltu r15,r10,8008bac <__muldf3+0x23c>
8008bf8: da001015 stw r8,64(sp)
8008bfc: 00840034 movhi r2,4096
8008c00: 10bfffc4 addi r2,r2,-1
8008c04: 12801436 bltu r2,r10,8008c58 <__muldf3+0x2e8>
8008c08: da001017 ldw r8,64(sp)
8008c0c: 101f883a mov r15,r2
8008c10: 4a45883a add r2,r9,r9
8008c14: 124d803a cmpltu r6,r2,r9
8008c18: 5287883a add r3,r10,r10
8008c1c: 9497883a add r11,r18,r18
8008c20: 5c8f803a cmpltu r7,r11,r18
8008c24: 9cd9883a add r12,r19,r19
8008c28: 01000044 movi r4,1
8008c2c: 30cd883a add r6,r6,r3
8008c30: 3b0f883a add r7,r7,r12
8008c34: 423fffc4 addi r8,r8,-1
8008c38: 1013883a mov r9,r2
8008c3c: 3015883a mov r10,r6
8008c40: 111ab03a or r13,r2,r4
8008c44: 98003016 blt r19,zero,8008d08 <__muldf3+0x398>
8008c48: 5825883a mov r18,r11
8008c4c: 3827883a mov r19,r7
8008c50: 7abfef2e bgeu r15,r10,8008c10 <__muldf3+0x2a0>
8008c54: da001015 stw r8,64(sp)
8008c58: 00803fc4 movi r2,255
8008c5c: 488e703a and r7,r9,r2
8008c60: 00802004 movi r2,128
8008c64: 0007883a mov r3,zero
8008c68: 0011883a mov r8,zero
8008c6c: 38801826 beq r7,r2,8008cd0 <__muldf3+0x360>
8008c70: 008000c4 movi r2,3
8008c74: d9000e04 addi r4,sp,56
8008c78: da801215 stw r10,72(sp)
8008c7c: d8800e15 stw r2,56(sp)
8008c80: da401115 stw r9,68(sp)
8008c84: 003f6a06 br 8008a30 <__muldf3+0xc0>
8008c88: 89802126 beq r17,r6,8008d10 <__muldf3+0x3a0>
8008c8c: 0009883a mov r4,zero
8008c90: 5105883a add r2,r10,r4
8008c94: 128d803a cmpltu r6,r2,r10
8008c98: 5d07883a add r3,r11,r20
8008c9c: 30cd883a add r6,r6,r3
8008ca0: 0021883a mov r16,zero
8008ca4: 0023883a mov r17,zero
8008ca8: 1025883a mov r18,r2
8008cac: 3027883a mov r19,r6
8008cb0: 32ff9e2e bgeu r6,r11,8008b2c <__muldf3+0x1bc>
8008cb4: 00800044 movi r2,1
8008cb8: 8089883a add r4,r16,r2
8008cbc: 240d803a cmpltu r6,r4,r16
8008cc0: 344d883a add r6,r6,r17
8008cc4: 2021883a mov r16,r4
8008cc8: 3023883a mov r17,r6
8008ccc: 003f9806 br 8008b30 <__muldf3+0x1c0>
8008cd0: 403fe71e bne r8,zero,8008c70 <__muldf3+0x300>
8008cd4: 01004004 movi r4,256
8008cd8: 4904703a and r2,r9,r4
8008cdc: 10c4b03a or r2,r2,r3
8008ce0: 103fe31e bne r2,zero,8008c70 <__muldf3+0x300>
8008ce4: 94c4b03a or r2,r18,r19
8008ce8: 103fe126 beq r2,zero,8008c70 <__muldf3+0x300>
8008cec: 49c5883a add r2,r9,r7
8008cf0: 1251803a cmpltu r8,r2,r9
8008cf4: 4291883a add r8,r8,r10
8008cf8: 013fc004 movi r4,-256
8008cfc: 1112703a and r9,r2,r4
8008d00: 4015883a mov r10,r8
8008d04: 003fda06 br 8008c70 <__muldf3+0x300>
8008d08: 6813883a mov r9,r13
8008d0c: 003fce06 br 8008c48 <__muldf3+0x2d8>
8008d10: 143f7c36 bltu r2,r16,8008b04 <__muldf3+0x194>
8008d14: 003fdd06 br 8008c8c <__muldf3+0x31c>
8008d18: 12bf852e bgeu r2,r10,8008b30 <__muldf3+0x1c0>
8008d1c: 003fe506 br 8008cb4 <__muldf3+0x344>
8008d20: 00800084 movi r2,2
8008d24: 20bf351e bne r4,r2,80089fc <__muldf3+0x8c>
8008d28: 01020074 movhi r4,2049
8008d2c: 21381e04 addi r4,r4,-8072
8008d30: 003f3f06 br 8008a30 <__muldf3+0xc0>
08008d34 <__divdf3>:
8008d34: deffed04 addi sp,sp,-76
8008d38: dcc01115 stw r19,68(sp)
8008d3c: dcc00404 addi r19,sp,16
8008d40: 2011883a mov r8,r4
8008d44: 2813883a mov r9,r5
8008d48: dc000e15 stw r16,56(sp)
8008d4c: d809883a mov r4,sp
8008d50: 980b883a mov r5,r19
8008d54: dc000904 addi r16,sp,36
8008d58: dfc01215 stw ra,72(sp)
8008d5c: da400115 stw r9,4(sp)
8008d60: d9c00315 stw r7,12(sp)
8008d64: da000015 stw r8,0(sp)
8008d68: d9800215 stw r6,8(sp)
8008d6c: dc801015 stw r18,64(sp)
8008d70: dc400f15 stw r17,60(sp)
8008d74: 8009bd40 call 8009bd4 <__unpack_d>
8008d78: d9000204 addi r4,sp,8
8008d7c: 800b883a mov r5,r16
8008d80: 8009bd40 call 8009bd4 <__unpack_d>
8008d84: d9000417 ldw r4,16(sp)
8008d88: 00800044 movi r2,1
8008d8c: 11000b2e bgeu r2,r4,8008dbc <__divdf3+0x88>
8008d90: d9400917 ldw r5,36(sp)
8008d94: 1140762e bgeu r2,r5,8008f70 <__divdf3+0x23c>
8008d98: d8800517 ldw r2,20(sp)
8008d9c: d8c00a17 ldw r3,40(sp)
8008da0: 01800104 movi r6,4
8008da4: 10c4f03a xor r2,r2,r3
8008da8: d8800515 stw r2,20(sp)
8008dac: 21800226 beq r4,r6,8008db8 <__divdf3+0x84>
8008db0: 00800084 movi r2,2
8008db4: 2080141e bne r4,r2,8008e08 <__divdf3+0xd4>
8008db8: 29000926 beq r5,r4,8008de0 <__divdf3+0xac>
8008dbc: 9809883a mov r4,r19
8008dc0: 80098c00 call 80098c0 <__pack_d>
8008dc4: dfc01217 ldw ra,72(sp)
8008dc8: dcc01117 ldw r19,68(sp)
8008dcc: dc801017 ldw r18,64(sp)
8008dd0: dc400f17 ldw r17,60(sp)
8008dd4: dc000e17 ldw r16,56(sp)
8008dd8: dec01304 addi sp,sp,76
8008ddc: f800283a ret
8008de0: 01020074 movhi r4,2049
8008de4: 21381e04 addi r4,r4,-8072
8008de8: 80098c00 call 80098c0 <__pack_d>
8008dec: dfc01217 ldw ra,72(sp)
8008df0: dcc01117 ldw r19,68(sp)
8008df4: dc801017 ldw r18,64(sp)
8008df8: dc400f17 ldw r17,60(sp)
8008dfc: dc000e17 ldw r16,56(sp)
8008e00: dec01304 addi sp,sp,76
8008e04: f800283a ret
8008e08: 29805b26 beq r5,r6,8008f78 <__divdf3+0x244>
8008e0c: 28802d26 beq r5,r2,8008ec4 <__divdf3+0x190>
8008e10: d8c00617 ldw r3,24(sp)
8008e14: d8800b17 ldw r2,44(sp)
8008e18: d9c00817 ldw r7,32(sp)
8008e1c: dc400d17 ldw r17,52(sp)
8008e20: 188bc83a sub r5,r3,r2
8008e24: d9800717 ldw r6,28(sp)
8008e28: dc000c17 ldw r16,48(sp)
8008e2c: d9400615 stw r5,24(sp)
8008e30: 3c403836 bltu r7,r17,8008f14 <__divdf3+0x1e0>
8008e34: 89c03626 beq r17,r7,8008f10 <__divdf3+0x1dc>
8008e38: 0015883a mov r10,zero
8008e3c: 001d883a mov r14,zero
8008e40: 02c40034 movhi r11,4096
8008e44: 001f883a mov r15,zero
8008e48: 003f883a mov ra,zero
8008e4c: 04800f44 movi r18,61
8008e50: 00000f06 br 8008e90 <__divdf3+0x15c>
8008e54: 601d883a mov r14,r12
8008e58: 681f883a mov r15,r13
8008e5c: 400d883a mov r6,r8
8008e60: 100f883a mov r7,r2
8008e64: 3191883a add r8,r6,r6
8008e68: 5808d07a srli r4,r11,1
8008e6c: 4185803a cmpltu r2,r8,r6
8008e70: 39d3883a add r9,r7,r7
8008e74: 28c6b03a or r3,r5,r3
8008e78: 1245883a add r2,r2,r9
8008e7c: 1815883a mov r10,r3
8008e80: 2017883a mov r11,r4
8008e84: 400d883a mov r6,r8
8008e88: 100f883a mov r7,r2
8008e8c: fc801726 beq ra,r18,8008eec <__divdf3+0x1b8>
8008e90: 580a97fa slli r5,r11,31
8008e94: 5006d07a srli r3,r10,1
8008e98: ffc00044 addi ra,ra,1
8008e9c: 3c7ff136 bltu r7,r17,8008e64 <__divdf3+0x130>
8008ea0: 3411c83a sub r8,r6,r16
8008ea4: 3205803a cmpltu r2,r6,r8
8008ea8: 3c53c83a sub r9,r7,r17
8008eac: 7298b03a or r12,r14,r10
8008eb0: 7adab03a or r13,r15,r11
8008eb4: 4885c83a sub r2,r9,r2
8008eb8: 89ffe61e bne r17,r7,8008e54 <__divdf3+0x120>
8008ebc: 343fe936 bltu r6,r16,8008e64 <__divdf3+0x130>
8008ec0: 003fe406 br 8008e54 <__divdf3+0x120>
8008ec4: 9809883a mov r4,r19
8008ec8: d9800415 stw r6,16(sp)
8008ecc: 80098c00 call 80098c0 <__pack_d>
8008ed0: dfc01217 ldw ra,72(sp)
8008ed4: dcc01117 ldw r19,68(sp)
8008ed8: dc801017 ldw r18,64(sp)
8008edc: dc400f17 ldw r17,60(sp)
8008ee0: dc000e17 ldw r16,56(sp)
8008ee4: dec01304 addi sp,sp,76
8008ee8: f800283a ret
8008eec: 00803fc4 movi r2,255
8008ef0: 7090703a and r8,r14,r2
8008ef4: 00802004 movi r2,128
8008ef8: 0007883a mov r3,zero
8008efc: 0013883a mov r9,zero
8008f00: 40800d26 beq r8,r2,8008f38 <__divdf3+0x204>
8008f04: dbc00815 stw r15,32(sp)
8008f08: db800715 stw r14,28(sp)
8008f0c: 003fab06 br 8008dbc <__divdf3+0x88>
8008f10: 343fc92e bgeu r6,r16,8008e38 <__divdf3+0x104>
8008f14: 3185883a add r2,r6,r6
8008f18: 1189803a cmpltu r4,r2,r6
8008f1c: 39c7883a add r3,r7,r7
8008f20: 20c9883a add r4,r4,r3
8008f24: 297fffc4 addi r5,r5,-1
8008f28: 100d883a mov r6,r2
8008f2c: 200f883a mov r7,r4
8008f30: d9400615 stw r5,24(sp)
8008f34: 003fc006 br 8008e38 <__divdf3+0x104>
8008f38: 483ff21e bne r9,zero,8008f04 <__divdf3+0x1d0>
8008f3c: 01004004 movi r4,256
8008f40: 7104703a and r2,r14,r4
8008f44: 10c4b03a or r2,r2,r3
8008f48: 103fee1e bne r2,zero,8008f04 <__divdf3+0x1d0>
8008f4c: 31c4b03a or r2,r6,r7
8008f50: 103fec26 beq r2,zero,8008f04 <__divdf3+0x1d0>
8008f54: 7205883a add r2,r14,r8
8008f58: 1391803a cmpltu r8,r2,r14
8008f5c: 43d1883a add r8,r8,r15
8008f60: 013fc004 movi r4,-256
8008f64: 111c703a and r14,r2,r4
8008f68: 401f883a mov r15,r8
8008f6c: 003fe506 br 8008f04 <__divdf3+0x1d0>
8008f70: 8009883a mov r4,r16
8008f74: 003f9206 br 8008dc0 <__divdf3+0x8c>
8008f78: 9809883a mov r4,r19
8008f7c: d8000715 stw zero,28(sp)
8008f80: d8000815 stw zero,32(sp)
8008f84: d8000615 stw zero,24(sp)
8008f88: 003f8d06 br 8008dc0 <__divdf3+0x8c>
08008f8c <__eqdf2>:
8008f8c: deffef04 addi sp,sp,-68
8008f90: dc400f15 stw r17,60(sp)
8008f94: dc400404 addi r17,sp,16
8008f98: 2005883a mov r2,r4
8008f9c: 2807883a mov r3,r5
8008fa0: dc000e15 stw r16,56(sp)
8008fa4: d809883a mov r4,sp
8008fa8: 880b883a mov r5,r17
8008fac: dc000904 addi r16,sp,36
8008fb0: d8c00115 stw r3,4(sp)
8008fb4: d8800015 stw r2,0(sp)
8008fb8: d9800215 stw r6,8(sp)
8008fbc: dfc01015 stw ra,64(sp)
8008fc0: d9c00315 stw r7,12(sp)
8008fc4: 8009bd40 call 8009bd4 <__unpack_d>
8008fc8: d9000204 addi r4,sp,8
8008fcc: 800b883a mov r5,r16
8008fd0: 8009bd40 call 8009bd4 <__unpack_d>
8008fd4: d8800417 ldw r2,16(sp)
8008fd8: 00c00044 movi r3,1
8008fdc: 180d883a mov r6,r3
8008fe0: 1880062e bgeu r3,r2,8008ffc <__eqdf2+0x70>
8008fe4: d8800917 ldw r2,36(sp)
8008fe8: 8809883a mov r4,r17
8008fec: 800b883a mov r5,r16
8008ff0: 1880022e bgeu r3,r2,8008ffc <__eqdf2+0x70>
8008ff4: 8009d0c0 call 8009d0c <__fpcmp_parts_d>
8008ff8: 100d883a mov r6,r2
8008ffc: 3005883a mov r2,r6
8009000: dfc01017 ldw ra,64(sp)
8009004: dc400f17 ldw r17,60(sp)
8009008: dc000e17 ldw r16,56(sp)
800900c: dec01104 addi sp,sp,68
8009010: f800283a ret
08009014 <__nedf2>:
8009014: deffef04 addi sp,sp,-68
8009018: dc400f15 stw r17,60(sp)
800901c: dc400404 addi r17,sp,16
8009020: 2005883a mov r2,r4
8009024: 2807883a mov r3,r5
8009028: dc000e15 stw r16,56(sp)
800902c: d809883a mov r4,sp
8009030: 880b883a mov r5,r17
8009034: dc000904 addi r16,sp,36
8009038: d8c00115 stw r3,4(sp)
800903c: d8800015 stw r2,0(sp)
8009040: d9800215 stw r6,8(sp)
8009044: dfc01015 stw ra,64(sp)
8009048: d9c00315 stw r7,12(sp)
800904c: 8009bd40 call 8009bd4 <__unpack_d>
8009050: d9000204 addi r4,sp,8
8009054: 800b883a mov r5,r16
8009058: 8009bd40 call 8009bd4 <__unpack_d>
800905c: d8800417 ldw r2,16(sp)
8009060: 00c00044 movi r3,1
8009064: 180d883a mov r6,r3
8009068: 1880062e bgeu r3,r2,8009084 <__nedf2+0x70>
800906c: d8800917 ldw r2,36(sp)
8009070: 8809883a mov r4,r17
8009074: 800b883a mov r5,r16
8009078: 1880022e bgeu r3,r2,8009084 <__nedf2+0x70>
800907c: 8009d0c0 call 8009d0c <__fpcmp_parts_d>
8009080: 100d883a mov r6,r2
8009084: 3005883a mov r2,r6
8009088: dfc01017 ldw ra,64(sp)
800908c: dc400f17 ldw r17,60(sp)
8009090: dc000e17 ldw r16,56(sp)
8009094: dec01104 addi sp,sp,68
8009098: f800283a ret
0800909c <__gtdf2>:
800909c: deffef04 addi sp,sp,-68
80090a0: dc400f15 stw r17,60(sp)
80090a4: dc400404 addi r17,sp,16
80090a8: 2005883a mov r2,r4
80090ac: 2807883a mov r3,r5
80090b0: dc000e15 stw r16,56(sp)
80090b4: d809883a mov r4,sp
80090b8: 880b883a mov r5,r17
80090bc: dc000904 addi r16,sp,36
80090c0: d8c00115 stw r3,4(sp)
80090c4: d8800015 stw r2,0(sp)
80090c8: d9800215 stw r6,8(sp)
80090cc: dfc01015 stw ra,64(sp)
80090d0: d9c00315 stw r7,12(sp)
80090d4: 8009bd40 call 8009bd4 <__unpack_d>
80090d8: d9000204 addi r4,sp,8
80090dc: 800b883a mov r5,r16
80090e0: 8009bd40 call 8009bd4 <__unpack_d>
80090e4: d8800417 ldw r2,16(sp)
80090e8: 00c00044 movi r3,1
80090ec: 01bfffc4 movi r6,-1
80090f0: 1880062e bgeu r3,r2,800910c <__gtdf2+0x70>
80090f4: d8800917 ldw r2,36(sp)
80090f8: 8809883a mov r4,r17
80090fc: 800b883a mov r5,r16
8009100: 1880022e bgeu r3,r2,800910c <__gtdf2+0x70>
8009104: 8009d0c0 call 8009d0c <__fpcmp_parts_d>
8009108: 100d883a mov r6,r2
800910c: 3005883a mov r2,r6
8009110: dfc01017 ldw ra,64(sp)
8009114: dc400f17 ldw r17,60(sp)
8009118: dc000e17 ldw r16,56(sp)
800911c: dec01104 addi sp,sp,68
8009120: f800283a ret
08009124 <__gedf2>:
8009124: deffef04 addi sp,sp,-68
8009128: dc400f15 stw r17,60(sp)
800912c: dc400404 addi r17,sp,16
8009130: 2005883a mov r2,r4
8009134: 2807883a mov r3,r5
8009138: dc000e15 stw r16,56(sp)
800913c: d809883a mov r4,sp
8009140: 880b883a mov r5,r17
8009144: dc000904 addi r16,sp,36
8009148: d8c00115 stw r3,4(sp)
800914c: d8800015 stw r2,0(sp)
8009150: d9800215 stw r6,8(sp)
8009154: dfc01015 stw ra,64(sp)
8009158: d9c00315 stw r7,12(sp)
800915c: 8009bd40 call 8009bd4 <__unpack_d>
8009160: d9000204 addi r4,sp,8
8009164: 800b883a mov r5,r16
8009168: 8009bd40 call 8009bd4 <__unpack_d>
800916c: d8800417 ldw r2,16(sp)
8009170: 00c00044 movi r3,1
8009174: 01bfffc4 movi r6,-1
8009178: 1880062e bgeu r3,r2,8009194 <__gedf2+0x70>
800917c: d8800917 ldw r2,36(sp)
8009180: 8809883a mov r4,r17
8009184: 800b883a mov r5,r16
8009188: 1880022e bgeu r3,r2,8009194 <__gedf2+0x70>
800918c: 8009d0c0 call 8009d0c <__fpcmp_parts_d>
8009190: 100d883a mov r6,r2
8009194: 3005883a mov r2,r6
8009198: dfc01017 ldw ra,64(sp)
800919c: dc400f17 ldw r17,60(sp)
80091a0: dc000e17 ldw r16,56(sp)
80091a4: dec01104 addi sp,sp,68
80091a8: f800283a ret
080091ac <__ltdf2>:
80091ac: deffef04 addi sp,sp,-68
80091b0: dc400f15 stw r17,60(sp)
80091b4: dc400404 addi r17,sp,16
80091b8: 2005883a mov r2,r4
80091bc: 2807883a mov r3,r5
80091c0: dc000e15 stw r16,56(sp)
80091c4: d809883a mov r4,sp
80091c8: 880b883a mov r5,r17
80091cc: dc000904 addi r16,sp,36
80091d0: d8c00115 stw r3,4(sp)
80091d4: d8800015 stw r2,0(sp)
80091d8: d9800215 stw r6,8(sp)
80091dc: dfc01015 stw ra,64(sp)
80091e0: d9c00315 stw r7,12(sp)
80091e4: 8009bd40 call 8009bd4 <__unpack_d>
80091e8: d9000204 addi r4,sp,8
80091ec: 800b883a mov r5,r16
80091f0: 8009bd40 call 8009bd4 <__unpack_d>
80091f4: d8800417 ldw r2,16(sp)
80091f8: 00c00044 movi r3,1
80091fc: 180d883a mov r6,r3
8009200: 1880062e bgeu r3,r2,800921c <__ltdf2+0x70>
8009204: d8800917 ldw r2,36(sp)
8009208: 8809883a mov r4,r17
800920c: 800b883a mov r5,r16
8009210: 1880022e bgeu r3,r2,800921c <__ltdf2+0x70>
8009214: 8009d0c0 call 8009d0c <__fpcmp_parts_d>
8009218: 100d883a mov r6,r2
800921c: 3005883a mov r2,r6
8009220: dfc01017 ldw ra,64(sp)
8009224: dc400f17 ldw r17,60(sp)
8009228: dc000e17 ldw r16,56(sp)
800922c: dec01104 addi sp,sp,68
8009230: f800283a ret
08009234 <__floatsidf>:
8009234: 2006d7fa srli r3,r4,31
8009238: defff604 addi sp,sp,-40
800923c: 008000c4 movi r2,3
8009240: dfc00915 stw ra,36(sp)
8009244: dcc00815 stw r19,32(sp)
8009248: dc800715 stw r18,28(sp)
800924c: dc400615 stw r17,24(sp)
8009250: dc000515 stw r16,20(sp)
8009254: d8800015 stw r2,0(sp)
8009258: d8c00115 stw r3,4(sp)
800925c: 20000f1e bne r4,zero,800929c <__floatsidf+0x68>
8009260: 00800084 movi r2,2
8009264: d8800015 stw r2,0(sp)
8009268: d809883a mov r4,sp
800926c: 80098c00 call 80098c0 <__pack_d>
8009270: 1009883a mov r4,r2
8009274: 180b883a mov r5,r3
8009278: 2005883a mov r2,r4
800927c: 2807883a mov r3,r5
8009280: dfc00917 ldw ra,36(sp)
8009284: dcc00817 ldw r19,32(sp)
8009288: dc800717 ldw r18,28(sp)
800928c: dc400617 ldw r17,24(sp)
8009290: dc000517 ldw r16,20(sp)
8009294: dec00a04 addi sp,sp,40
8009298: f800283a ret
800929c: 00800f04 movi r2,60
80092a0: 1807003a cmpeq r3,r3,zero
80092a4: d8800215 stw r2,8(sp)
80092a8: 18001126 beq r3,zero,80092f0 <__floatsidf+0xbc>
80092ac: 0027883a mov r19,zero
80092b0: 2025883a mov r18,r4
80092b4: d9000315 stw r4,12(sp)
80092b8: dcc00415 stw r19,16(sp)
80092bc: 80098400 call 8009840 <__clzsi2>
80092c0: 11000744 addi r4,r2,29
80092c4: 013fe80e bge zero,r4,8009268 <__floatsidf+0x34>
80092c8: 10bfff44 addi r2,r2,-3
80092cc: 10000c16 blt r2,zero,8009300 <__floatsidf+0xcc>
80092d0: 90a2983a sll r17,r18,r2
80092d4: 0021883a mov r16,zero
80092d8: d8800217 ldw r2,8(sp)
80092dc: dc400415 stw r17,16(sp)
80092e0: dc000315 stw r16,12(sp)
80092e4: 1105c83a sub r2,r2,r4
80092e8: d8800215 stw r2,8(sp)
80092ec: 003fde06 br 8009268 <__floatsidf+0x34>
80092f0: 00a00034 movhi r2,32768
80092f4: 20800a26 beq r4,r2,8009320 <__floatsidf+0xec>
80092f8: 0109c83a sub r4,zero,r4
80092fc: 003feb06 br 80092ac <__floatsidf+0x78>
8009300: 9006d07a srli r3,r18,1
8009304: 008007c4 movi r2,31
8009308: 1105c83a sub r2,r2,r4
800930c: 1886d83a srl r3,r3,r2
8009310: 9922983a sll r17,r19,r4
8009314: 9120983a sll r16,r18,r4
8009318: 1c62b03a or r17,r3,r17
800931c: 003fee06 br 80092d8 <__floatsidf+0xa4>
8009320: 0009883a mov r4,zero
8009324: 01707834 movhi r5,49632
8009328: 003fd306 br 8009278 <__floatsidf+0x44>
0800932c <__fixdfsi>:
800932c: defff804 addi sp,sp,-32
8009330: 2005883a mov r2,r4
8009334: 2807883a mov r3,r5
8009338: d809883a mov r4,sp
800933c: d9400204 addi r5,sp,8
8009340: d8c00115 stw r3,4(sp)
8009344: d8800015 stw r2,0(sp)
8009348: dfc00715 stw ra,28(sp)
800934c: 8009bd40 call 8009bd4 <__unpack_d>
8009350: d8c00217 ldw r3,8(sp)
8009354: 00800084 movi r2,2
8009358: 1880051e bne r3,r2,8009370 <__fixdfsi+0x44>
800935c: 0007883a mov r3,zero
8009360: 1805883a mov r2,r3
8009364: dfc00717 ldw ra,28(sp)
8009368: dec00804 addi sp,sp,32
800936c: f800283a ret
8009370: 00800044 movi r2,1
8009374: 10fff92e bgeu r2,r3,800935c <__fixdfsi+0x30>
8009378: 00800104 movi r2,4
800937c: 18800426 beq r3,r2,8009390 <__fixdfsi+0x64>
8009380: d8c00417 ldw r3,16(sp)
8009384: 183ff516 blt r3,zero,800935c <__fixdfsi+0x30>
8009388: 00800784 movi r2,30
800938c: 10c0080e bge r2,r3,80093b0 <__fixdfsi+0x84>
8009390: d8800317 ldw r2,12(sp)
8009394: 1000121e bne r2,zero,80093e0 <__fixdfsi+0xb4>
8009398: 00e00034 movhi r3,32768
800939c: 18ffffc4 addi r3,r3,-1
80093a0: 1805883a mov r2,r3
80093a4: dfc00717 ldw ra,28(sp)
80093a8: dec00804 addi sp,sp,32
80093ac: f800283a ret
80093b0: 00800f04 movi r2,60
80093b4: 10d1c83a sub r8,r2,r3
80093b8: 40bff804 addi r2,r8,-32
80093bc: d9800517 ldw r6,20(sp)
80093c0: d9c00617 ldw r7,24(sp)
80093c4: 10000816 blt r2,zero,80093e8 <__fixdfsi+0xbc>
80093c8: 3888d83a srl r4,r7,r2
80093cc: d8800317 ldw r2,12(sp)
80093d0: 2007883a mov r3,r4
80093d4: 103fe226 beq r2,zero,8009360 <__fixdfsi+0x34>
80093d8: 0107c83a sub r3,zero,r4
80093dc: 003fe006 br 8009360 <__fixdfsi+0x34>
80093e0: 00e00034 movhi r3,32768
80093e4: 003fde06 br 8009360 <__fixdfsi+0x34>
80093e8: 39c7883a add r3,r7,r7
80093ec: 008007c4 movi r2,31
80093f0: 1205c83a sub r2,r2,r8
80093f4: 1886983a sll r3,r3,r2
80093f8: 3208d83a srl r4,r6,r8
80093fc: 1908b03a or r4,r3,r4
8009400: 003ff206 br 80093cc <__fixdfsi+0xa0>
08009404 <__floatunsidf>:
8009404: defff204 addi sp,sp,-56
8009408: dfc00d15 stw ra,52(sp)
800940c: ddc00c15 stw r23,48(sp)
8009410: dd800b15 stw r22,44(sp)
8009414: dd400a15 stw r21,40(sp)
8009418: dd000915 stw r20,36(sp)
800941c: dcc00815 stw r19,32(sp)
8009420: dc800715 stw r18,28(sp)
8009424: dc400615 stw r17,24(sp)
8009428: dc000515 stw r16,20(sp)
800942c: d8000115 stw zero,4(sp)
8009430: 20000f1e bne r4,zero,8009470 <__floatunsidf+0x6c>
8009434: 00800084 movi r2,2
8009438: d8800015 stw r2,0(sp)
800943c: d809883a mov r4,sp
8009440: 80098c00 call 80098c0 <__pack_d>
8009444: dfc00d17 ldw ra,52(sp)
8009448: ddc00c17 ldw r23,48(sp)
800944c: dd800b17 ldw r22,44(sp)
8009450: dd400a17 ldw r21,40(sp)
8009454: dd000917 ldw r20,36(sp)
8009458: dcc00817 ldw r19,32(sp)
800945c: dc800717 ldw r18,28(sp)
8009460: dc400617 ldw r17,24(sp)
8009464: dc000517 ldw r16,20(sp)
8009468: dec00e04 addi sp,sp,56
800946c: f800283a ret
8009470: 008000c4 movi r2,3
8009474: 00c00f04 movi r3,60
8009478: 002f883a mov r23,zero
800947c: 202d883a mov r22,r4
8009480: d8800015 stw r2,0(sp)
8009484: d8c00215 stw r3,8(sp)
8009488: d9000315 stw r4,12(sp)
800948c: ddc00415 stw r23,16(sp)
8009490: 80098400 call 8009840 <__clzsi2>
8009494: 12400744 addi r9,r2,29
8009498: 48000b16 blt r9,zero,80094c8 <__floatunsidf+0xc4>
800949c: 483fe726 beq r9,zero,800943c <__floatunsidf+0x38>
80094a0: 10bfff44 addi r2,r2,-3
80094a4: 10002e16 blt r2,zero,8009560 <__floatunsidf+0x15c>
80094a8: b0a2983a sll r17,r22,r2
80094ac: 0021883a mov r16,zero
80094b0: d8800217 ldw r2,8(sp)
80094b4: dc400415 stw r17,16(sp)
80094b8: dc000315 stw r16,12(sp)
80094bc: 1245c83a sub r2,r2,r9
80094c0: d8800215 stw r2,8(sp)
80094c4: 003fdd06 br 800943c <__floatunsidf+0x38>
80094c8: 0255c83a sub r10,zero,r9
80094cc: 51bff804 addi r6,r10,-32
80094d0: 30001b16 blt r6,zero,8009540 <__floatunsidf+0x13c>
80094d4: b9a8d83a srl r20,r23,r6
80094d8: 002b883a mov r21,zero
80094dc: 000f883a mov r7,zero
80094e0: 01000044 movi r4,1
80094e4: 0011883a mov r8,zero
80094e8: 30002516 blt r6,zero,8009580 <__floatunsidf+0x17c>
80094ec: 21a6983a sll r19,r4,r6
80094f0: 0025883a mov r18,zero
80094f4: 00bfffc4 movi r2,-1
80094f8: 9089883a add r4,r18,r2
80094fc: 988b883a add r5,r19,r2
8009500: 248d803a cmpltu r6,r4,r18
8009504: 314b883a add r5,r6,r5
8009508: b104703a and r2,r22,r4
800950c: b946703a and r3,r23,r5
8009510: 10c4b03a or r2,r2,r3
8009514: 10000226 beq r2,zero,8009520 <__floatunsidf+0x11c>
8009518: 01c00044 movi r7,1
800951c: 0011883a mov r8,zero
8009520: d9000217 ldw r4,8(sp)
8009524: a1c4b03a or r2,r20,r7
8009528: aa06b03a or r3,r21,r8
800952c: 2249c83a sub r4,r4,r9
8009530: d8c00415 stw r3,16(sp)
8009534: d9000215 stw r4,8(sp)
8009538: d8800315 stw r2,12(sp)
800953c: 003fbf06 br 800943c <__floatunsidf+0x38>
8009540: bdc7883a add r3,r23,r23
8009544: 008007c4 movi r2,31
8009548: 1285c83a sub r2,r2,r10
800954c: 1886983a sll r3,r3,r2
8009550: b2a8d83a srl r20,r22,r10
8009554: baaad83a srl r21,r23,r10
8009558: 1d28b03a or r20,r3,r20
800955c: 003fdf06 br 80094dc <__floatunsidf+0xd8>
8009560: b006d07a srli r3,r22,1
8009564: 008007c4 movi r2,31
8009568: 1245c83a sub r2,r2,r9
800956c: 1886d83a srl r3,r3,r2
8009570: ba62983a sll r17,r23,r9
8009574: b260983a sll r16,r22,r9
8009578: 1c62b03a or r17,r3,r17
800957c: 003fcc06 br 80094b0 <__floatunsidf+0xac>
8009580: 2006d07a srli r3,r4,1
8009584: 008007c4 movi r2,31
8009588: 1285c83a sub r2,r2,r10
800958c: 18a6d83a srl r19,r3,r2
8009590: 22a4983a sll r18,r4,r10
8009594: 003fd706 br 80094f4 <__floatunsidf+0xf0>
08009598 <udivmodsi4>:
8009598: 29001b2e bgeu r5,r4,8009608 <udivmodsi4+0x70>
800959c: 28001a16 blt r5,zero,8009608 <udivmodsi4+0x70>
80095a0: 00800044 movi r2,1
80095a4: 0007883a mov r3,zero
80095a8: 01c007c4 movi r7,31
80095ac: 00000306 br 80095bc <udivmodsi4+0x24>
80095b0: 19c01326 beq r3,r7,8009600 <udivmodsi4+0x68>
80095b4: 18c00044 addi r3,r3,1
80095b8: 28000416 blt r5,zero,80095cc <udivmodsi4+0x34>
80095bc: 294b883a add r5,r5,r5
80095c0: 1085883a add r2,r2,r2
80095c4: 293ffa36 bltu r5,r4,80095b0 <udivmodsi4+0x18>
80095c8: 10000d26 beq r2,zero,8009600 <udivmodsi4+0x68>
80095cc: 0007883a mov r3,zero
80095d0: 21400236 bltu r4,r5,80095dc <udivmodsi4+0x44>
80095d4: 2149c83a sub r4,r4,r5
80095d8: 1886b03a or r3,r3,r2
80095dc: 1004d07a srli r2,r2,1
80095e0: 280ad07a srli r5,r5,1
80095e4: 103ffa1e bne r2,zero,80095d0 <udivmodsi4+0x38>
80095e8: 30000226 beq r6,zero,80095f4 <udivmodsi4+0x5c>
80095ec: 2005883a mov r2,r4
80095f0: f800283a ret
80095f4: 1809883a mov r4,r3
80095f8: 2005883a mov r2,r4
80095fc: f800283a ret
8009600: 0007883a mov r3,zero
8009604: 003ff806 br 80095e8 <udivmodsi4+0x50>
8009608: 00800044 movi r2,1
800960c: 0007883a mov r3,zero
8009610: 003fef06 br 80095d0 <udivmodsi4+0x38>
08009614 <__divsi3>:
8009614: defffe04 addi sp,sp,-8
8009618: dc000015 stw r16,0(sp)
800961c: dfc00115 stw ra,4(sp)
8009620: 0021883a mov r16,zero
8009624: 20000c16 blt r4,zero,8009658 <__divsi3+0x44>
8009628: 000d883a mov r6,zero
800962c: 28000e16 blt r5,zero,8009668 <__divsi3+0x54>
8009630: 80095980 call 8009598 <udivmodsi4>
8009634: 1007883a mov r3,r2
8009638: 8005003a cmpeq r2,r16,zero
800963c: 1000011e bne r2,zero,8009644 <__divsi3+0x30>
8009640: 00c7c83a sub r3,zero,r3
8009644: 1805883a mov r2,r3
8009648: dfc00117 ldw ra,4(sp)
800964c: dc000017 ldw r16,0(sp)
8009650: dec00204 addi sp,sp,8
8009654: f800283a ret
8009658: 0109c83a sub r4,zero,r4
800965c: 04000044 movi r16,1
8009660: 000d883a mov r6,zero
8009664: 283ff20e bge r5,zero,8009630 <__divsi3+0x1c>
8009668: 014bc83a sub r5,zero,r5
800966c: 8021003a cmpeq r16,r16,zero
8009670: 003fef06 br 8009630 <__divsi3+0x1c>
08009674 <__modsi3>:
8009674: deffff04 addi sp,sp,-4
8009678: dfc00015 stw ra,0(sp)
800967c: 01800044 movi r6,1
8009680: 2807883a mov r3,r5
8009684: 20000416 blt r4,zero,8009698 <__modsi3+0x24>
8009688: 28000c16 blt r5,zero,80096bc <__modsi3+0x48>
800968c: dfc00017 ldw ra,0(sp)
8009690: dec00104 addi sp,sp,4
8009694: 80095981 jmpi 8009598 <udivmodsi4>
8009698: 0109c83a sub r4,zero,r4
800969c: 28000b16 blt r5,zero,80096cc <__modsi3+0x58>
80096a0: 180b883a mov r5,r3
80096a4: 01800044 movi r6,1
80096a8: 80095980 call 8009598 <udivmodsi4>
80096ac: 0085c83a sub r2,zero,r2
80096b0: dfc00017 ldw ra,0(sp)
80096b4: dec00104 addi sp,sp,4
80096b8: f800283a ret
80096bc: 014bc83a sub r5,zero,r5
80096c0: dfc00017 ldw ra,0(sp)
80096c4: dec00104 addi sp,sp,4
80096c8: 80095981 jmpi 8009598 <udivmodsi4>
80096cc: 0147c83a sub r3,zero,r5
80096d0: 003ff306 br 80096a0 <__modsi3+0x2c>
080096d4 <__udivsi3>:
80096d4: 000d883a mov r6,zero
80096d8: 80095981 jmpi 8009598 <udivmodsi4>
080096dc <__umodsi3>:
80096dc: 01800044 movi r6,1
80096e0: 80095981 jmpi 8009598 <udivmodsi4>
080096e4 <__mulsi3>:
80096e4: 20000a26 beq r4,zero,8009710 <__mulsi3+0x2c>
80096e8: 0007883a mov r3,zero
80096ec: 2080004c andi r2,r4,1
80096f0: 1005003a cmpeq r2,r2,zero
80096f4: 2008d07a srli r4,r4,1
80096f8: 1000011e bne r2,zero,8009700 <__mulsi3+0x1c>
80096fc: 1947883a add r3,r3,r5
8009700: 294b883a add r5,r5,r5
8009704: 203ff91e bne r4,zero,80096ec <__mulsi3+0x8>
8009708: 1805883a mov r2,r3
800970c: f800283a ret
8009710: 0007883a mov r3,zero
8009714: 1805883a mov r2,r3
8009718: f800283a ret
0800971c <__muldi3>:
800971c: defff204 addi sp,sp,-56
8009720: df000c15 stw fp,48(sp)
8009724: 3038d43a srli fp,r6,16
8009728: dd000815 stw r20,32(sp)
800972c: dc400515 stw r17,20(sp)
8009730: 2028d43a srli r20,r4,16
8009734: 247fffcc andi r17,r4,65535
8009738: dc000415 stw r16,16(sp)
800973c: 343fffcc andi r16,r6,65535
8009740: dcc00715 stw r19,28(sp)
8009744: d9000015 stw r4,0(sp)
8009748: 2827883a mov r19,r5
800974c: 8809883a mov r4,r17
8009750: d9400115 stw r5,4(sp)
8009754: 800b883a mov r5,r16
8009758: d9800215 stw r6,8(sp)
800975c: dfc00d15 stw ra,52(sp)
8009760: d9c00315 stw r7,12(sp)
8009764: dd800a15 stw r22,40(sp)
8009768: dd400915 stw r21,36(sp)
800976c: 302d883a mov r22,r6
8009770: ddc00b15 stw r23,44(sp)
8009774: dc800615 stw r18,24(sp)
8009778: 80096e40 call 80096e4 <__mulsi3>
800977c: 8809883a mov r4,r17
8009780: e00b883a mov r5,fp
8009784: 102b883a mov r21,r2
8009788: 80096e40 call 80096e4 <__mulsi3>
800978c: 800b883a mov r5,r16
8009790: a009883a mov r4,r20
8009794: 1023883a mov r17,r2
8009798: 80096e40 call 80096e4 <__mulsi3>
800979c: a009883a mov r4,r20
80097a0: e00b883a mov r5,fp
80097a4: 1021883a mov r16,r2
80097a8: 80096e40 call 80096e4 <__mulsi3>
80097ac: a8ffffcc andi r3,r21,65535
80097b0: a82ad43a srli r21,r21,16
80097b4: 8c23883a add r17,r17,r16
80097b8: 1011883a mov r8,r2
80097bc: ac6b883a add r21,r21,r17
80097c0: a804943a slli r2,r21,16
80097c4: b009883a mov r4,r22
80097c8: 980b883a mov r5,r19
80097cc: 10c7883a add r3,r2,r3
80097d0: a812d43a srli r9,r21,16
80097d4: 180d883a mov r6,r3
80097d8: ac00022e bgeu r21,r16,80097e4 <__muldi3+0xc8>
80097dc: 00800074 movhi r2,1
80097e0: 4091883a add r8,r8,r2
80097e4: 4267883a add r19,r8,r9
80097e8: 302d883a mov r22,r6
80097ec: 80096e40 call 80096e4 <__mulsi3>
80097f0: d9400317 ldw r5,12(sp)
80097f4: d9000017 ldw r4,0(sp)
80097f8: 1023883a mov r17,r2
80097fc: 80096e40 call 80096e4 <__mulsi3>
8009800: 14cb883a add r5,r2,r19
8009804: 894b883a add r5,r17,r5
8009808: b005883a mov r2,r22
800980c: 2807883a mov r3,r5
8009810: dfc00d17 ldw ra,52(sp)
8009814: df000c17 ldw fp,48(sp)
8009818: ddc00b17 ldw r23,44(sp)
800981c: dd800a17 ldw r22,40(sp)
8009820: dd400917 ldw r21,36(sp)
8009824: dd000817 ldw r20,32(sp)
8009828: dcc00717 ldw r19,28(sp)
800982c: dc800617 ldw r18,24(sp)
8009830: dc400517 ldw r17,20(sp)
8009834: dc000417 ldw r16,16(sp)
8009838: dec00e04 addi sp,sp,56
800983c: f800283a ret
08009840 <__clzsi2>:
8009840: 00bfffd4 movui r2,65535
8009844: 11000e36 bltu r2,r4,8009880 <__clzsi2+0x40>
8009848: 00803fc4 movi r2,255
800984c: 01400204 movi r5,8
8009850: 0007883a mov r3,zero
8009854: 11001036 bltu r2,r4,8009898 <__clzsi2+0x58>
8009858: 000b883a mov r5,zero
800985c: 20c6d83a srl r3,r4,r3
8009860: 00820074 movhi r2,2049
8009864: 10b82304 addi r2,r2,-8052
8009868: 1887883a add r3,r3,r2
800986c: 18800003 ldbu r2,0(r3)
8009870: 00c00804 movi r3,32
8009874: 2885883a add r2,r5,r2
8009878: 1885c83a sub r2,r3,r2
800987c: f800283a ret
8009880: 01400404 movi r5,16
8009884: 00804034 movhi r2,256
8009888: 10bfffc4 addi r2,r2,-1
800988c: 2807883a mov r3,r5
8009890: 113ff22e bgeu r2,r4,800985c <__clzsi2+0x1c>
8009894: 01400604 movi r5,24
8009898: 2807883a mov r3,r5
800989c: 20c6d83a srl r3,r4,r3
80098a0: 00820074 movhi r2,2049
80098a4: 10b82304 addi r2,r2,-8052
80098a8: 1887883a add r3,r3,r2
80098ac: 18800003 ldbu r2,0(r3)
80098b0: 00c00804 movi r3,32
80098b4: 2885883a add r2,r5,r2
80098b8: 1885c83a sub r2,r3,r2
80098bc: f800283a ret
080098c0 <__pack_d>:
80098c0: 20c00017 ldw r3,0(r4)
80098c4: defffd04 addi sp,sp,-12
80098c8: dc000015 stw r16,0(sp)
80098cc: dc800215 stw r18,8(sp)
80098d0: dc400115 stw r17,4(sp)
80098d4: 00800044 movi r2,1
80098d8: 22000317 ldw r8,12(r4)
80098dc: 001f883a mov r15,zero
80098e0: 22400417 ldw r9,16(r4)
80098e4: 24000117 ldw r16,4(r4)
80098e8: 10c0552e bgeu r2,r3,8009a40 <__pack_d+0x180>
80098ec: 00800104 movi r2,4
80098f0: 18804f26 beq r3,r2,8009a30 <__pack_d+0x170>
80098f4: 00800084 movi r2,2
80098f8: 18800226 beq r3,r2,8009904 <__pack_d+0x44>
80098fc: 4244b03a or r2,r8,r9
8009900: 10001a1e bne r2,zero,800996c <__pack_d+0xac>
8009904: 000d883a mov r6,zero
8009908: 000f883a mov r7,zero
800990c: 0011883a mov r8,zero
8009910: 00800434 movhi r2,16
8009914: 10bfffc4 addi r2,r2,-1
8009918: 301d883a mov r14,r6
800991c: 3884703a and r2,r7,r2
8009920: 400a953a slli r5,r8,20
8009924: 79bffc2c andhi r6,r15,65520
8009928: 308cb03a or r6,r6,r2
800992c: 00e00434 movhi r3,32784
8009930: 18ffffc4 addi r3,r3,-1
8009934: 800497fa slli r2,r16,31
8009938: 30c6703a and r3,r6,r3
800993c: 1946b03a or r3,r3,r5
8009940: 01600034 movhi r5,32768
8009944: 297fffc4 addi r5,r5,-1
8009948: 194a703a and r5,r3,r5
800994c: 288ab03a or r5,r5,r2
8009950: 2807883a mov r3,r5
8009954: 7005883a mov r2,r14
8009958: dc800217 ldw r18,8(sp)
800995c: dc400117 ldw r17,4(sp)
8009960: dc000017 ldw r16,0(sp)
8009964: dec00304 addi sp,sp,12
8009968: f800283a ret
800996c: 21000217 ldw r4,8(r4)
8009970: 00bf0084 movi r2,-1022
8009974: 20803f16 blt r4,r2,8009a74 <__pack_d+0x1b4>
8009978: 0080ffc4 movi r2,1023
800997c: 11002c16 blt r2,r4,8009a30 <__pack_d+0x170>
8009980: 00803fc4 movi r2,255
8009984: 408c703a and r6,r8,r2
8009988: 00802004 movi r2,128
800998c: 0007883a mov r3,zero
8009990: 000f883a mov r7,zero
8009994: 2280ffc4 addi r10,r4,1023
8009998: 30801e26 beq r6,r2,8009a14 <__pack_d+0x154>
800999c: 00801fc4 movi r2,127
80099a0: 4089883a add r4,r8,r2
80099a4: 220d803a cmpltu r6,r4,r8
80099a8: 324d883a add r6,r6,r9
80099ac: 2011883a mov r8,r4
80099b0: 3013883a mov r9,r6
80099b4: 00880034 movhi r2,8192
80099b8: 10bfffc4 addi r2,r2,-1
80099bc: 12400d36 bltu r2,r9,80099f4 <__pack_d+0x134>
80099c0: 4804963a slli r2,r9,24
80099c4: 400cd23a srli r6,r8,8
80099c8: 480ed23a srli r7,r9,8
80099cc: 013fffc4 movi r4,-1
80099d0: 118cb03a or r6,r2,r6
80099d4: 01400434 movhi r5,16
80099d8: 297fffc4 addi r5,r5,-1
80099dc: 3104703a and r2,r6,r4
80099e0: 3946703a and r3,r7,r5
80099e4: 5201ffcc andi r8,r10,2047
80099e8: 100d883a mov r6,r2
80099ec: 180f883a mov r7,r3
80099f0: 003fc706 br 8009910 <__pack_d+0x50>
80099f4: 480897fa slli r4,r9,31
80099f8: 4004d07a srli r2,r8,1
80099fc: 4806d07a srli r3,r9,1
8009a00: 52800044 addi r10,r10,1
8009a04: 2084b03a or r2,r4,r2
8009a08: 1011883a mov r8,r2
8009a0c: 1813883a mov r9,r3
8009a10: 003feb06 br 80099c0 <__pack_d+0x100>
8009a14: 383fe11e bne r7,zero,800999c <__pack_d+0xdc>
8009a18: 01004004 movi r4,256
8009a1c: 4104703a and r2,r8,r4
8009a20: 10c4b03a or r2,r2,r3
8009a24: 103fe326 beq r2,zero,80099b4 <__pack_d+0xf4>
8009a28: 3005883a mov r2,r6
8009a2c: 003fdc06 br 80099a0 <__pack_d+0xe0>
8009a30: 000d883a mov r6,zero
8009a34: 000f883a mov r7,zero
8009a38: 0201ffc4 movi r8,2047
8009a3c: 003fb406 br 8009910 <__pack_d+0x50>
8009a40: 0005883a mov r2,zero
8009a44: 00c00234 movhi r3,8
8009a48: 408cb03a or r6,r8,r2
8009a4c: 48ceb03a or r7,r9,r3
8009a50: 013fffc4 movi r4,-1
8009a54: 01400434 movhi r5,16
8009a58: 297fffc4 addi r5,r5,-1
8009a5c: 3104703a and r2,r6,r4
8009a60: 3946703a and r3,r7,r5
8009a64: 100d883a mov r6,r2
8009a68: 180f883a mov r7,r3
8009a6c: 0201ffc4 movi r8,2047
8009a70: 003fa706 br 8009910 <__pack_d+0x50>
8009a74: 1109c83a sub r4,r2,r4
8009a78: 00800e04 movi r2,56
8009a7c: 11004316 blt r2,r4,8009b8c <__pack_d+0x2cc>
8009a80: 21fff804 addi r7,r4,-32
8009a84: 38004516 blt r7,zero,8009b9c <__pack_d+0x2dc>
8009a88: 49d8d83a srl r12,r9,r7
8009a8c: 001b883a mov r13,zero
8009a90: 0023883a mov r17,zero
8009a94: 01400044 movi r5,1
8009a98: 0025883a mov r18,zero
8009a9c: 38004716 blt r7,zero,8009bbc <__pack_d+0x2fc>
8009aa0: 29d6983a sll r11,r5,r7
8009aa4: 0015883a mov r10,zero
8009aa8: 00bfffc4 movi r2,-1
8009aac: 5089883a add r4,r10,r2
8009ab0: 588b883a add r5,r11,r2
8009ab4: 228d803a cmpltu r6,r4,r10
8009ab8: 314b883a add r5,r6,r5
8009abc: 4104703a and r2,r8,r4
8009ac0: 4946703a and r3,r9,r5
8009ac4: 10c4b03a or r2,r2,r3
8009ac8: 10000226 beq r2,zero,8009ad4 <__pack_d+0x214>
8009acc: 04400044 movi r17,1
8009ad0: 0025883a mov r18,zero
8009ad4: 00803fc4 movi r2,255
8009ad8: 644eb03a or r7,r12,r17
8009adc: 3892703a and r9,r7,r2
8009ae0: 00802004 movi r2,128
8009ae4: 6c90b03a or r8,r13,r18
8009ae8: 0015883a mov r10,zero
8009aec: 48801626 beq r9,r2,8009b48 <__pack_d+0x288>
8009af0: 01001fc4 movi r4,127
8009af4: 3905883a add r2,r7,r4
8009af8: 11cd803a cmpltu r6,r2,r7
8009afc: 320d883a add r6,r6,r8
8009b00: 100f883a mov r7,r2
8009b04: 00840034 movhi r2,4096
8009b08: 10bfffc4 addi r2,r2,-1
8009b0c: 3011883a mov r8,r6
8009b10: 0007883a mov r3,zero
8009b14: 11801b36 bltu r2,r6,8009b84 <__pack_d+0x2c4>
8009b18: 4004963a slli r2,r8,24
8009b1c: 3808d23a srli r4,r7,8
8009b20: 400ad23a srli r5,r8,8
8009b24: 1813883a mov r9,r3
8009b28: 1108b03a or r4,r2,r4
8009b2c: 00bfffc4 movi r2,-1
8009b30: 00c00434 movhi r3,16
8009b34: 18ffffc4 addi r3,r3,-1
8009b38: 208c703a and r6,r4,r2
8009b3c: 28ce703a and r7,r5,r3
8009b40: 4a01ffcc andi r8,r9,2047
8009b44: 003f7206 br 8009910 <__pack_d+0x50>
8009b48: 503fe91e bne r10,zero,8009af0 <__pack_d+0x230>
8009b4c: 01004004 movi r4,256
8009b50: 3904703a and r2,r7,r4
8009b54: 0007883a mov r3,zero
8009b58: 10c4b03a or r2,r2,r3
8009b5c: 10000626 beq r2,zero,8009b78 <__pack_d+0x2b8>
8009b60: 3a45883a add r2,r7,r9
8009b64: 11cd803a cmpltu r6,r2,r7
8009b68: 320d883a add r6,r6,r8
8009b6c: 100f883a mov r7,r2
8009b70: 3011883a mov r8,r6
8009b74: 0007883a mov r3,zero
8009b78: 00840034 movhi r2,4096
8009b7c: 10bfffc4 addi r2,r2,-1
8009b80: 123fe52e bgeu r2,r8,8009b18 <__pack_d+0x258>
8009b84: 00c00044 movi r3,1
8009b88: 003fe306 br 8009b18 <__pack_d+0x258>
8009b8c: 0009883a mov r4,zero
8009b90: 0013883a mov r9,zero
8009b94: 000b883a mov r5,zero
8009b98: 003fe406 br 8009b2c <__pack_d+0x26c>
8009b9c: 4a47883a add r3,r9,r9
8009ba0: 008007c4 movi r2,31
8009ba4: 1105c83a sub r2,r2,r4
8009ba8: 1886983a sll r3,r3,r2
8009bac: 4118d83a srl r12,r8,r4
8009bb0: 491ad83a srl r13,r9,r4
8009bb4: 1b18b03a or r12,r3,r12
8009bb8: 003fb506 br 8009a90 <__pack_d+0x1d0>
8009bbc: 2806d07a srli r3,r5,1
8009bc0: 008007c4 movi r2,31
8009bc4: 1105c83a sub r2,r2,r4
8009bc8: 1896d83a srl r11,r3,r2
8009bcc: 2914983a sll r10,r5,r4
8009bd0: 003fb506 br 8009aa8 <__pack_d+0x1e8>
08009bd4 <__unpack_d>:
8009bd4: 20c00117 ldw r3,4(r4)
8009bd8: 22400017 ldw r9,0(r4)
8009bdc: 00800434 movhi r2,16
8009be0: 10bfffc4 addi r2,r2,-1
8009be4: 1808d53a srli r4,r3,20
8009be8: 180cd7fa srli r6,r3,31
8009bec: 1894703a and r10,r3,r2
8009bf0: 2201ffcc andi r8,r4,2047
8009bf4: 281b883a mov r13,r5
8009bf8: 4817883a mov r11,r9
8009bfc: 29800115 stw r6,4(r5)
8009c00: 5019883a mov r12,r10
8009c04: 40001e1e bne r8,zero,8009c80 <__unpack_d+0xac>
8009c08: 4a84b03a or r2,r9,r10
8009c0c: 10001926 beq r2,zero,8009c74 <__unpack_d+0xa0>
8009c10: 4804d63a srli r2,r9,24
8009c14: 500c923a slli r6,r10,8
8009c18: 013f0084 movi r4,-1022
8009c1c: 00c40034 movhi r3,4096
8009c20: 18ffffc4 addi r3,r3,-1
8009c24: 118cb03a or r6,r2,r6
8009c28: 008000c4 movi r2,3
8009c2c: 480a923a slli r5,r9,8
8009c30: 68800015 stw r2,0(r13)
8009c34: 69000215 stw r4,8(r13)
8009c38: 19800b36 bltu r3,r6,8009c68 <__unpack_d+0x94>
8009c3c: 200f883a mov r7,r4
8009c40: 1811883a mov r8,r3
8009c44: 2945883a add r2,r5,r5
8009c48: 1149803a cmpltu r4,r2,r5
8009c4c: 3187883a add r3,r6,r6
8009c50: 20c9883a add r4,r4,r3
8009c54: 100b883a mov r5,r2
8009c58: 200d883a mov r6,r4
8009c5c: 39ffffc4 addi r7,r7,-1
8009c60: 413ff82e bgeu r8,r4,8009c44 <__unpack_d+0x70>
8009c64: 69c00215 stw r7,8(r13)
8009c68: 69800415 stw r6,16(r13)
8009c6c: 69400315 stw r5,12(r13)
8009c70: f800283a ret
8009c74: 00800084 movi r2,2
8009c78: 28800015 stw r2,0(r5)
8009c7c: f800283a ret
8009c80: 0081ffc4 movi r2,2047
8009c84: 40800f26 beq r8,r2,8009cc4 <__unpack_d+0xf0>
8009c88: 480cd63a srli r6,r9,24
8009c8c: 5006923a slli r3,r10,8
8009c90: 4804923a slli r2,r9,8
8009c94: 0009883a mov r4,zero
8009c98: 30c6b03a or r3,r6,r3
8009c9c: 01440034 movhi r5,4096
8009ca0: 110cb03a or r6,r2,r4
8009ca4: 423f0044 addi r8,r8,-1023
8009ca8: 194eb03a or r7,r3,r5
8009cac: 008000c4 movi r2,3
8009cb0: 69c00415 stw r7,16(r13)
8009cb4: 6a000215 stw r8,8(r13)
8009cb8: 68800015 stw r2,0(r13)
8009cbc: 69800315 stw r6,12(r13)
8009cc0: f800283a ret
8009cc4: 4a84b03a or r2,r9,r10
8009cc8: 1000031e bne r2,zero,8009cd8 <__unpack_d+0x104>
8009ccc: 00800104 movi r2,4
8009cd0: 28800015 stw r2,0(r5)
8009cd4: f800283a ret
8009cd8: 0009883a mov r4,zero
8009cdc: 01400234 movhi r5,8
8009ce0: 4904703a and r2,r9,r4
8009ce4: 5146703a and r3,r10,r5
8009ce8: 10c4b03a or r2,r2,r3
8009cec: 10000526 beq r2,zero,8009d04 <__unpack_d+0x130>
8009cf0: 00800044 movi r2,1
8009cf4: 68800015 stw r2,0(r13)
8009cf8: 6b000415 stw r12,16(r13)
8009cfc: 6ac00315 stw r11,12(r13)
8009d00: f800283a ret
8009d04: 68000015 stw zero,0(r13)
8009d08: 003ffb06 br 8009cf8 <__unpack_d+0x124>
08009d0c <__fpcmp_parts_d>:
8009d0c: 21800017 ldw r6,0(r4)
8009d10: 00c00044 movi r3,1
8009d14: 19800a2e bgeu r3,r6,8009d40 <__fpcmp_parts_d+0x34>
8009d18: 28800017 ldw r2,0(r5)
8009d1c: 1880082e bgeu r3,r2,8009d40 <__fpcmp_parts_d+0x34>
8009d20: 00c00104 movi r3,4
8009d24: 30c02626 beq r6,r3,8009dc0 <__fpcmp_parts_d+0xb4>
8009d28: 10c02226 beq r2,r3,8009db4 <__fpcmp_parts_d+0xa8>
8009d2c: 00c00084 movi r3,2
8009d30: 30c00526 beq r6,r3,8009d48 <__fpcmp_parts_d+0x3c>
8009d34: 10c0071e bne r2,r3,8009d54 <__fpcmp_parts_d+0x48>
8009d38: 20800117 ldw r2,4(r4)
8009d3c: 1000091e bne r2,zero,8009d64 <__fpcmp_parts_d+0x58>
8009d40: 00800044 movi r2,1
8009d44: f800283a ret
8009d48: 10c01a1e bne r2,r3,8009db4 <__fpcmp_parts_d+0xa8>
8009d4c: 0005883a mov r2,zero
8009d50: f800283a ret
8009d54: 22000117 ldw r8,4(r4)
8009d58: 28800117 ldw r2,4(r5)
8009d5c: 40800326 beq r8,r2,8009d6c <__fpcmp_parts_d+0x60>
8009d60: 403ff726 beq r8,zero,8009d40 <__fpcmp_parts_d+0x34>
8009d64: 00bfffc4 movi r2,-1
8009d68: f800283a ret
8009d6c: 20c00217 ldw r3,8(r4)
8009d70: 28800217 ldw r2,8(r5)
8009d74: 10fffa16 blt r2,r3,8009d60 <__fpcmp_parts_d+0x54>
8009d78: 18800916 blt r3,r2,8009da0 <__fpcmp_parts_d+0x94>
8009d7c: 21c00417 ldw r7,16(r4)
8009d80: 28c00417 ldw r3,16(r5)
8009d84: 21800317 ldw r6,12(r4)
8009d88: 28800317 ldw r2,12(r5)
8009d8c: 19fff436 bltu r3,r7,8009d60 <__fpcmp_parts_d+0x54>
8009d90: 38c00526 beq r7,r3,8009da8 <__fpcmp_parts_d+0x9c>
8009d94: 38c00236 bltu r7,r3,8009da0 <__fpcmp_parts_d+0x94>
8009d98: 19ffec1e bne r3,r7,8009d4c <__fpcmp_parts_d+0x40>
8009d9c: 30bfeb2e bgeu r6,r2,8009d4c <__fpcmp_parts_d+0x40>
8009da0: 403fe71e bne r8,zero,8009d40 <__fpcmp_parts_d+0x34>
8009da4: 003fef06 br 8009d64 <__fpcmp_parts_d+0x58>
8009da8: 11bffa2e bgeu r2,r6,8009d94 <__fpcmp_parts_d+0x88>
8009dac: 403fe426 beq r8,zero,8009d40 <__fpcmp_parts_d+0x34>
8009db0: 003fec06 br 8009d64 <__fpcmp_parts_d+0x58>
8009db4: 28800117 ldw r2,4(r5)
8009db8: 103fe11e bne r2,zero,8009d40 <__fpcmp_parts_d+0x34>
8009dbc: 003fe906 br 8009d64 <__fpcmp_parts_d+0x58>
8009dc0: 11bfdd1e bne r2,r6,8009d38 <__fpcmp_parts_d+0x2c>
8009dc4: 28c00117 ldw r3,4(r5)
8009dc8: 20800117 ldw r2,4(r4)
8009dcc: 1885c83a sub r2,r3,r2
8009dd0: f800283a ret
08009dd4 <close>:
*
* ALT_CLOSE is mapped onto the close() system call in alt_syscall.h
*/
int ALT_CLOSE (int fildes)
{
8009dd4: defff804 addi sp,sp,-32
8009dd8: dfc00715 stw ra,28(sp)
8009ddc: df000615 stw fp,24(sp)
8009de0: df000604 addi fp,sp,24
8009de4: e13ffc15 stw r4,-16(fp)
* A common error case is that when the file descriptor was created, the call
* to open() failed resulting in a negative file descriptor. This is trapped
* below so that we don't try and process an invalid file descriptor.
*/
fd = (fildes < 0) ? NULL : &alt_fd_list[fildes];
8009de8: e0bffc17 ldw r2,-16(fp)
8009dec: 1004803a cmplt r2,r2,zero
8009df0: 1000091e bne r2,zero,8009e18 <close+0x44>
8009df4: e13ffc17 ldw r4,-16(fp)
8009df8: 01400304 movi r5,12
8009dfc: 80096e40 call 80096e4 <__mulsi3>
8009e00: 1007883a mov r3,r2
8009e04: 00820074 movhi r2,2049
8009e08: 10ba9e04 addi r2,r2,-5512
8009e0c: 1887883a add r3,r3,r2
8009e10: e0ffff15 stw r3,-4(fp)
8009e14: 00000106 br 8009e1c <close+0x48>
8009e18: e03fff15 stw zero,-4(fp)
8009e1c: e0bfff17 ldw r2,-4(fp)
8009e20: e0bffb15 stw r2,-20(fp)
if (fd)
8009e24: e0bffb17 ldw r2,-20(fp)
8009e28: 1005003a cmpeq r2,r2,zero
8009e2c: 10001d1e bne r2,zero,8009ea4 <close+0xd0>
/*
* If the associated file system/device has a close function, call it so
* that any necessary cleanup code can run.
*/
rval = (fd->dev->close) ? fd->dev->close(fd) : 0;
8009e30: e0bffb17 ldw r2,-20(fp)
8009e34: 10800017 ldw r2,0(r2)
8009e38: 10800417 ldw r2,16(r2)
8009e3c: 1005003a cmpeq r2,r2,zero
8009e40: 1000071e bne r2,zero,8009e60 <close+0x8c>
8009e44: e0bffb17 ldw r2,-20(fp)
8009e48: 10800017 ldw r2,0(r2)
8009e4c: 10800417 ldw r2,16(r2)
8009e50: e13ffb17 ldw r4,-20(fp)
8009e54: 103ee83a callr r2
8009e58: e0bffe15 stw r2,-8(fp)
8009e5c: 00000106 br 8009e64 <close+0x90>
8009e60: e03ffe15 stw zero,-8(fp)
8009e64: e0bffe17 ldw r2,-8(fp)
8009e68: e0bffa15 stw r2,-24(fp)
/* Free the file descriptor structure and return. */
alt_release_fd (fildes);
8009e6c: e13ffc17 ldw r4,-16(fp)
8009e70: 800a6100 call 800a610 <alt_release_fd>
if (rval < 0)
8009e74: e0bffa17 ldw r2,-24(fp)
8009e78: 1004403a cmpge r2,r2,zero
8009e7c: 1000071e bne r2,zero,8009e9c <close+0xc8>
{
ALT_ERRNO = -rval;
8009e80: 8009ed40 call 8009ed4 <alt_get_errno>
8009e84: e0fffa17 ldw r3,-24(fp)
8009e88: 00c7c83a sub r3,zero,r3
8009e8c: 10c00015 stw r3,0(r2)
return -1;
8009e90: 00bfffc4 movi r2,-1
8009e94: e0bffd15 stw r2,-12(fp)
8009e98: 00000806 br 8009ebc <close+0xe8>
}
return 0;
8009e9c: e03ffd15 stw zero,-12(fp)
8009ea0: 00000606 br 8009ebc <close+0xe8>
}
else
{
ALT_ERRNO = EBADFD;
8009ea4: 8009ed40 call 8009ed4 <alt_get_errno>
8009ea8: 1007883a mov r3,r2
8009eac: 00801444 movi r2,81
8009eb0: 18800015 stw r2,0(r3)
return -1;
8009eb4: 00bfffc4 movi r2,-1
8009eb8: e0bffd15 stw r2,-12(fp)
8009ebc: e0bffd17 ldw r2,-12(fp)
}
}
8009ec0: e037883a mov sp,fp
8009ec4: dfc00117 ldw ra,4(sp)
8009ec8: df000017 ldw fp,0(sp)
8009ecc: dec00204 addi sp,sp,8
8009ed0: f800283a ret
08009ed4 <alt_get_errno>:
#undef errno
extern int errno;
static ALT_INLINE int* alt_get_errno(void)
{
8009ed4: defffd04 addi sp,sp,-12
8009ed8: dfc00215 stw ra,8(sp)
8009edc: df000115 stw fp,4(sp)
8009ee0: df000104 addi fp,sp,4
return ((alt_errno) ? alt_errno() : &errno);
8009ee4: 00820074 movhi r2,2049
8009ee8: 10bf5304 addi r2,r2,-692
8009eec: 10800017 ldw r2,0(r2)
8009ef0: 1005003a cmpeq r2,r2,zero
8009ef4: 1000061e bne r2,zero,8009f10 <alt_get_errno+0x3c>
8009ef8: 00820074 movhi r2,2049
8009efc: 10bf5304 addi r2,r2,-692
8009f00: 10800017 ldw r2,0(r2)
8009f04: 103ee83a callr r2
8009f08: e0bfff15 stw r2,-4(fp)
8009f0c: 00000306 br 8009f1c <alt_get_errno+0x48>
8009f10: 00820074 movhi r2,2049
8009f14: 10862904 addi r2,r2,6308
8009f18: e0bfff15 stw r2,-4(fp)
8009f1c: e0bfff17 ldw r2,-4(fp)
}
8009f20: e037883a mov sp,fp
8009f24: dfc00117 ldw ra,4(sp)
8009f28: df000017 ldw fp,0(sp)
8009f2c: dec00204 addi sp,sp,8
8009f30: f800283a ret
08009f34 <alt_dev_null_write>:
* by the alt_dev_null device. It simple discards all data passed to it, and
* indicates that the data has been successfully transmitted.
*/
static int alt_dev_null_write (alt_fd* fd, const char* ptr, int len)
{
8009f34: defffc04 addi sp,sp,-16
8009f38: df000315 stw fp,12(sp)
8009f3c: df000304 addi fp,sp,12
8009f40: e13ffd15 stw r4,-12(fp)
8009f44: e17ffe15 stw r5,-8(fp)
8009f48: e1bfff15 stw r6,-4(fp)
return len;
8009f4c: e0bfff17 ldw r2,-4(fp)
}
8009f50: e037883a mov sp,fp
8009f54: df000017 ldw fp,0(sp)
8009f58: dec00104 addi sp,sp,4
8009f5c: f800283a ret
08009f60 <fstat>:
}
#else /* !ALT_USE_DIRECT_DRIVERS */
int ALT_FSTAT (int file, struct stat *st)
{
8009f60: defff904 addi sp,sp,-28
8009f64: dfc00615 stw ra,24(sp)
8009f68: df000515 stw fp,20(sp)
8009f6c: df000504 addi fp,sp,20
8009f70: e13ffc15 stw r4,-16(fp)
8009f74: e17ffd15 stw r5,-12(fp)
* A common error case is that when the file descriptor was created, the call
* to open() failed resulting in a negative file descriptor. This is trapped
* below so that we don't try and process an invalid file descriptor.
*/
fd = (file < 0) ? NULL : &alt_fd_list[file];
8009f78: e0bffc17 ldw r2,-16(fp)
8009f7c: 1004803a cmplt r2,r2,zero
8009f80: 1000091e bne r2,zero,8009fa8 <fstat+0x48>
8009f84: e13ffc17 ldw r4,-16(fp)
8009f88: 01400304 movi r5,12
8009f8c: 80096e40 call 80096e4 <__mulsi3>
8009f90: 1007883a mov r3,r2
8009f94: 00820074 movhi r2,2049
8009f98: 10ba9e04 addi r2,r2,-5512
8009f9c: 1887883a add r3,r3,r2
8009fa0: e0ffff15 stw r3,-4(fp)
8009fa4: 00000106 br 8009fac <fstat+0x4c>
8009fa8: e03fff15 stw zero,-4(fp)
8009fac: e0bfff17 ldw r2,-4(fp)
8009fb0: e0bffb15 stw r2,-20(fp)
if (fd)
8009fb4: e0bffb17 ldw r2,-20(fp)
8009fb8: 1005003a cmpeq r2,r2,zero
8009fbc: 1000121e bne r2,zero,800a008 <fstat+0xa8>
{
/* Call the drivers fstat() function to fill out the "st" structure. */
if (fd->dev->fstat)
8009fc0: e0bffb17 ldw r2,-20(fp)
8009fc4: 10800017 ldw r2,0(r2)
8009fc8: 10800817 ldw r2,32(r2)
8009fcc: 1005003a cmpeq r2,r2,zero
8009fd0: 1000081e bne r2,zero,8009ff4 <fstat+0x94>
{
return fd->dev->fstat(fd, st);
8009fd4: e0bffb17 ldw r2,-20(fp)
8009fd8: 10800017 ldw r2,0(r2)
8009fdc: 10800817 ldw r2,32(r2)
8009fe0: e13ffb17 ldw r4,-20(fp)
8009fe4: e17ffd17 ldw r5,-12(fp)
8009fe8: 103ee83a callr r2
8009fec: e0bffe15 stw r2,-8(fp)
8009ff0: 00000b06 br 800a020 <fstat+0xc0>
* device.
*/
else
{
st->st_mode = _IFCHR;
8009ff4: e0fffd17 ldw r3,-12(fp)
8009ff8: 00880004 movi r2,8192
8009ffc: 18800115 stw r2,4(r3)
return 0;
800a000: e03ffe15 stw zero,-8(fp)
800a004: 00000606 br 800a020 <fstat+0xc0>
}
}
else
{
ALT_ERRNO = EBADFD;
800a008: 800a0380 call 800a038 <alt_get_errno>
800a00c: 1007883a mov r3,r2
800a010: 00801444 movi r2,81
800a014: 18800015 stw r2,0(r3)
return -1;
800a018: 00bfffc4 movi r2,-1
800a01c: e0bffe15 stw r2,-8(fp)
800a020: e0bffe17 ldw r2,-8(fp)
}
}
800a024: e037883a mov sp,fp
800a028: dfc00117 ldw ra,4(sp)
800a02c: df000017 ldw fp,0(sp)
800a030: dec00204 addi sp,sp,8
800a034: f800283a ret
0800a038 <alt_get_errno>:
#undef errno
extern int errno;
static ALT_INLINE int* alt_get_errno(void)
{
800a038: defffd04 addi sp,sp,-12
800a03c: dfc00215 stw ra,8(sp)
800a040: df000115 stw fp,4(sp)
800a044: df000104 addi fp,sp,4
return ((alt_errno) ? alt_errno() : &errno);
800a048: 00820074 movhi r2,2049
800a04c: 10bf5304 addi r2,r2,-692
800a050: 10800017 ldw r2,0(r2)
800a054: 1005003a cmpeq r2,r2,zero
800a058: 1000061e bne r2,zero,800a074 <alt_get_errno+0x3c>
800a05c: 00820074 movhi r2,2049
800a060: 10bf5304 addi r2,r2,-692
800a064: 10800017 ldw r2,0(r2)
800a068: 103ee83a callr r2
800a06c: e0bfff15 stw r2,-4(fp)
800a070: 00000306 br 800a080 <alt_get_errno+0x48>
800a074: 00820074 movhi r2,2049
800a078: 10862904 addi r2,r2,6308
800a07c: e0bfff15 stw r2,-4(fp)
800a080: e0bfff17 ldw r2,-4(fp)
}
800a084: e037883a mov sp,fp
800a088: dfc00117 ldw ra,4(sp)
800a08c: df000017 ldw fp,0(sp)
800a090: dec00204 addi sp,sp,8
800a094: f800283a ret
0800a098 <isatty>:
*
* ALT_ISATTY is mapped onto the isatty() system call in alt_syscall.h
*/
int ALT_ISATTY (int file)
{
800a098: deffeb04 addi sp,sp,-84
800a09c: dfc01415 stw ra,80(sp)
800a0a0: df001315 stw fp,76(sp)
800a0a4: df001304 addi fp,sp,76
800a0a8: e13ffd15 stw r4,-12(fp)
* A common error case is that when the file descriptor was created, the call
* to open() failed resulting in a negative file descriptor. This is trapped
* below so that we don't try and process an invalid file descriptor.
*/
fd = (file < 0) ? NULL : &alt_fd_list[file];
800a0ac: e0bffd17 ldw r2,-12(fp)
800a0b0: 1004803a cmplt r2,r2,zero
800a0b4: 1000091e bne r2,zero,800a0dc <isatty+0x44>
800a0b8: e13ffd17 ldw r4,-12(fp)
800a0bc: 01400304 movi r5,12
800a0c0: 80096e40 call 80096e4 <__mulsi3>
800a0c4: 1007883a mov r3,r2
800a0c8: 00820074 movhi r2,2049
800a0cc: 10ba9e04 addi r2,r2,-5512
800a0d0: 1887883a add r3,r3,r2
800a0d4: e0ffff15 stw r3,-4(fp)
800a0d8: 00000106 br 800a0e0 <isatty+0x48>
800a0dc: e03fff15 stw zero,-4(fp)
800a0e0: e0bfff17 ldw r2,-4(fp)
800a0e4: e0bfed15 stw r2,-76(fp)
if (fd)
800a0e8: e0bfed17 ldw r2,-76(fp)
800a0ec: 1005003a cmpeq r2,r2,zero
800a0f0: 10000f1e bne r2,zero,800a130 <isatty+0x98>
/*
* If a device driver does not provide an fstat() function, then it is
* treated as a terminal device by default.
*/
if (!fd->dev->fstat)
800a0f4: e0bfed17 ldw r2,-76(fp)
800a0f8: 10800017 ldw r2,0(r2)
800a0fc: 10800817 ldw r2,32(r2)
800a100: 1004c03a cmpne r2,r2,zero
800a104: 1000031e bne r2,zero,800a114 <isatty+0x7c>
{
return 1;
800a108: 00800044 movi r2,1
800a10c: e0bffe15 stw r2,-8(fp)
800a110: 00000c06 br 800a144 <isatty+0xac>
* this is called so that the device can identify itself.
*/
else
{
fstat (file, &stat);
800a114: e17fee04 addi r5,fp,-72
800a118: e13ffd17 ldw r4,-12(fp)
800a11c: 8009f600 call 8009f60 <fstat>
return (stat.st_mode == _IFCHR) ? 1 : 0;
800a120: e0bfef17 ldw r2,-68(fp)
800a124: 10880020 cmpeqi r2,r2,8192
800a128: e0bffe15 stw r2,-8(fp)
800a12c: 00000506 br 800a144 <isatty+0xac>
}
}
else
{
ALT_ERRNO = EBADFD;
800a130: 800a15c0 call 800a15c <alt_get_errno>
800a134: 1007883a mov r3,r2
800a138: 00801444 movi r2,81
800a13c: 18800015 stw r2,0(r3)
return 0;
800a140: e03ffe15 stw zero,-8(fp)
800a144: e0bffe17 ldw r2,-8(fp)
}
}
800a148: e037883a mov sp,fp
800a14c: dfc00117 ldw ra,4(sp)
800a150: df000017 ldw fp,0(sp)
800a154: dec00204 addi sp,sp,8
800a158: f800283a ret
0800a15c <alt_get_errno>:
#undef errno
extern int errno;
static ALT_INLINE int* alt_get_errno(void)
{
800a15c: defffd04 addi sp,sp,-12
800a160: dfc00215 stw ra,8(sp)
800a164: df000115 stw fp,4(sp)
800a168: df000104 addi fp,sp,4
return ((alt_errno) ? alt_errno() : &errno);
800a16c: 00820074 movhi r2,2049
800a170: 10bf5304 addi r2,r2,-692
800a174: 10800017 ldw r2,0(r2)
800a178: 1005003a cmpeq r2,r2,zero
800a17c: 1000061e bne r2,zero,800a198 <alt_get_errno+0x3c>
800a180: 00820074 movhi r2,2049
800a184: 10bf5304 addi r2,r2,-692
800a188: 10800017 ldw r2,0(r2)
800a18c: 103ee83a callr r2
800a190: e0bfff15 stw r2,-4(fp)
800a194: 00000306 br 800a1a4 <alt_get_errno+0x48>
800a198: 00820074 movhi r2,2049
800a19c: 10862904 addi r2,r2,6308
800a1a0: e0bfff15 stw r2,-4(fp)
800a1a4: e0bfff17 ldw r2,-4(fp)
}
800a1a8: e037883a mov sp,fp
800a1ac: dfc00117 ldw ra,4(sp)
800a1b0: df000017 ldw fp,0(sp)
800a1b4: dec00204 addi sp,sp,8
800a1b8: f800283a ret
0800a1bc <alt_load>:
* there is no bootloader, so this application is responsible for loading to
* RAM any sections that are required.
*/
void alt_load (void)
{
800a1bc: defffe04 addi sp,sp,-8
800a1c0: dfc00115 stw ra,4(sp)
800a1c4: df000015 stw fp,0(sp)
800a1c8: d839883a mov fp,sp
/*
* Copy the .rwdata section.
*/
alt_load_section (&__flash_rwdata_start,
800a1cc: 01020074 movhi r4,2049
800a1d0: 213f5804 addi r4,r4,-672
800a1d4: 01420074 movhi r5,2049
800a1d8: 29788f04 addi r5,r5,-7620
800a1dc: 01820074 movhi r6,2049
800a1e0: 31bf5804 addi r6,r6,-672
800a1e4: 800a23c0 call 800a23c <alt_load_section>
/*
* Copy the exception handler.
*/
alt_load_section (&__flash_exceptions_start,
800a1e8: 01020034 movhi r4,2048
800a1ec: 21000804 addi r4,r4,32
800a1f0: 01420034 movhi r5,2048
800a1f4: 29400804 addi r5,r5,32
800a1f8: 01820034 movhi r6,2048
800a1fc: 31806d04 addi r6,r6,436
800a200: 800a23c0 call 800a23c <alt_load_section>
/*
* Copy the .rodata section.
*/
alt_load_section (&__flash_rodata_start,
800a204: 01020074 movhi r4,2049
800a208: 21370804 addi r4,r4,-9184
800a20c: 01420074 movhi r5,2049
800a210: 29770804 addi r5,r5,-9184
800a214: 01820074 movhi r6,2049
800a218: 31b88f04 addi r6,r6,-7620
800a21c: 800a23c0 call 800a23c <alt_load_section>
/*
* Now ensure that the caches are in synch.
*/
alt_dcache_flush_all();
800a220: 800d0dc0 call 800d0dc <alt_dcache_flush_all>
alt_icache_flush_all();
800a224: 800d3680 call 800d368 <alt_icache_flush_all>
}
800a228: e037883a mov sp,fp
800a22c: dfc00117 ldw ra,4(sp)
800a230: df000017 ldw fp,0(sp)
800a234: dec00204 addi sp,sp,8
800a238: f800283a ret
0800a23c <alt_load_section>:
*/
static void ALT_INLINE alt_load_section (alt_u32* from,
alt_u32* to,
alt_u32* end)
{
800a23c: defffc04 addi sp,sp,-16
800a240: df000315 stw fp,12(sp)
800a244: df000304 addi fp,sp,12
800a248: e13ffd15 stw r4,-12(fp)
800a24c: e17ffe15 stw r5,-8(fp)
800a250: e1bfff15 stw r6,-4(fp)
if (to != from)
800a254: e0fffe17 ldw r3,-8(fp)
800a258: e0bffd17 ldw r2,-12(fp)
800a25c: 18800e26 beq r3,r2,800a298 <alt_load_section+0x5c>
{
while( to != end )
800a260: 00000a06 br 800a28c <alt_load_section+0x50>
{
*to++ = *from++;
800a264: e0bffd17 ldw r2,-12(fp)
800a268: 10c00017 ldw r3,0(r2)
800a26c: e0bffe17 ldw r2,-8(fp)
800a270: 10c00015 stw r3,0(r2)
800a274: e0bffe17 ldw r2,-8(fp)
800a278: 10800104 addi r2,r2,4
800a27c: e0bffe15 stw r2,-8(fp)
800a280: e0bffd17 ldw r2,-12(fp)
800a284: 10800104 addi r2,r2,4
800a288: e0bffd15 stw r2,-12(fp)
alt_u32* to,
alt_u32* end)
{
if (to != from)
{
while( to != end )
800a28c: e0fffe17 ldw r3,-8(fp)
800a290: e0bfff17 ldw r2,-4(fp)
800a294: 18bff31e bne r3,r2,800a264 <alt_load_section+0x28>
{
*to++ = *from++;
}
}
}
800a298: e037883a mov sp,fp
800a29c: df000017 ldw fp,0(sp)
800a2a0: dec00104 addi sp,sp,4
800a2a4: f800283a ret
0800a2a8 <lseek>:
* ALT_LSEEK is mapped onto the lseek() system call in alt_syscall.h
*
*/
off_t ALT_LSEEK (int file, off_t ptr, int dir)
{
800a2a8: defff804 addi sp,sp,-32
800a2ac: dfc00715 stw ra,28(sp)
800a2b0: df000615 stw fp,24(sp)
800a2b4: df000604 addi fp,sp,24
800a2b8: e13ffc15 stw r4,-16(fp)
800a2bc: e17ffd15 stw r5,-12(fp)
800a2c0: e1bffe15 stw r6,-8(fp)
alt_fd* fd;
off_t rc = 0;
800a2c4: e03ffa15 stw zero,-24(fp)
* A common error case is that when the file descriptor was created, the call
* to open() failed resulting in a negative file descriptor. This is trapped
* below so that we don't try and process an invalid file descriptor.
*/
fd = (file < 0) ? NULL : &alt_fd_list[file];
800a2c8: e0bffc17 ldw r2,-16(fp)
800a2cc: 1004803a cmplt r2,r2,zero
800a2d0: 1000091e bne r2,zero,800a2f8 <lseek+0x50>
800a2d4: e13ffc17 ldw r4,-16(fp)
800a2d8: 01400304 movi r5,12
800a2dc: 80096e40 call 80096e4 <__mulsi3>
800a2e0: 1007883a mov r3,r2
800a2e4: 00820074 movhi r2,2049
800a2e8: 10ba9e04 addi r2,r2,-5512
800a2ec: 1887883a add r3,r3,r2
800a2f0: e0ffff15 stw r3,-4(fp)
800a2f4: 00000106 br 800a2fc <lseek+0x54>
800a2f8: e03fff15 stw zero,-4(fp)
800a2fc: e0bfff17 ldw r2,-4(fp)
800a300: e0bffb15 stw r2,-20(fp)
if (fd)
800a304: e0bffb17 ldw r2,-20(fp)
800a308: 1005003a cmpeq r2,r2,zero
800a30c: 1000111e bne r2,zero,800a354 <lseek+0xac>
/*
* If the device driver provides an implementation of the lseek() function,
* then call that to process the request.
*/
if (fd->dev->lseek)
800a310: e0bffb17 ldw r2,-20(fp)
800a314: 10800017 ldw r2,0(r2)
800a318: 10800717 ldw r2,28(r2)
800a31c: 1005003a cmpeq r2,r2,zero
800a320: 1000091e bne r2,zero,800a348 <lseek+0xa0>
{
rc = fd->dev->lseek(fd, ptr, dir);
800a324: e0bffb17 ldw r2,-20(fp)
800a328: 10800017 ldw r2,0(r2)
800a32c: 10800717 ldw r2,28(r2)
800a330: e13ffb17 ldw r4,-20(fp)
800a334: e17ffd17 ldw r5,-12(fp)
800a338: e1bffe17 ldw r6,-8(fp)
800a33c: 103ee83a callr r2
800a340: e0bffa15 stw r2,-24(fp)
800a344: 00000506 br 800a35c <lseek+0xb4>
* Otherwise return an error.
*/
else
{
rc = -ENOTSUP;
800a348: 00bfde84 movi r2,-134
800a34c: e0bffa15 stw r2,-24(fp)
800a350: 00000206 br 800a35c <lseek+0xb4>
}
}
else
{
rc = -EBADFD;
800a354: 00bfebc4 movi r2,-81
800a358: e0bffa15 stw r2,-24(fp)
}
if (rc < 0)
800a35c: e0bffa17 ldw r2,-24(fp)
800a360: 1004403a cmpge r2,r2,zero
800a364: 1000071e bne r2,zero,800a384 <lseek+0xdc>
{
ALT_ERRNO = -rc;
800a368: 800a39c0 call 800a39c <alt_get_errno>
800a36c: 1007883a mov r3,r2
800a370: e0bffa17 ldw r2,-24(fp)
800a374: 0085c83a sub r2,zero,r2
800a378: 18800015 stw r2,0(r3)
rc = -1;
800a37c: 00bfffc4 movi r2,-1
800a380: e0bffa15 stw r2,-24(fp)
}
return rc;
800a384: e0bffa17 ldw r2,-24(fp)
}
800a388: e037883a mov sp,fp
800a38c: dfc00117 ldw ra,4(sp)
800a390: df000017 ldw fp,0(sp)
800a394: dec00204 addi sp,sp,8
800a398: f800283a ret
0800a39c <alt_get_errno>:
#undef errno
extern int errno;
static ALT_INLINE int* alt_get_errno(void)
{
800a39c: defffd04 addi sp,sp,-12
800a3a0: dfc00215 stw ra,8(sp)
800a3a4: df000115 stw fp,4(sp)
800a3a8: df000104 addi fp,sp,4
return ((alt_errno) ? alt_errno() : &errno);
800a3ac: 00820074 movhi r2,2049
800a3b0: 10bf5304 addi r2,r2,-692
800a3b4: 10800017 ldw r2,0(r2)
800a3b8: 1005003a cmpeq r2,r2,zero
800a3bc: 1000061e bne r2,zero,800a3d8 <alt_get_errno+0x3c>
800a3c0: 00820074 movhi r2,2049
800a3c4: 10bf5304 addi r2,r2,-692
800a3c8: 10800017 ldw r2,0(r2)
800a3cc: 103ee83a callr r2
800a3d0: e0bfff15 stw r2,-4(fp)
800a3d4: 00000306 br 800a3e4 <alt_get_errno+0x48>
800a3d8: 00820074 movhi r2,2049
800a3dc: 10862904 addi r2,r2,6308
800a3e0: e0bfff15 stw r2,-4(fp)
800a3e4: e0bfff17 ldw r2,-4(fp)
}
800a3e8: e037883a mov sp,fp
800a3ec: dfc00117 ldw ra,4(sp)
800a3f0: df000017 ldw fp,0(sp)
800a3f4: dec00204 addi sp,sp,8
800a3f8: f800283a ret
0800a3fc <alt_main>:
* devices/filesystems/components in the system; and call the entry point for
* the users application, i.e. main().
*/
void alt_main (void)
{
800a3fc: defffd04 addi sp,sp,-12
800a400: dfc00215 stw ra,8(sp)
800a404: df000115 stw fp,4(sp)
800a408: df000104 addi fp,sp,4
#endif
/* ALT LOG - please see HAL/sys/alt_log_printf.h for details */
ALT_LOG_PRINT_BOOT("[alt_main.c] Entering alt_main, calling alt_irq_init.\r\n");
/* Initialize the interrupt controller. */
alt_irq_init (NULL);
800a40c: 0009883a mov r4,zero
800a410: 800a8c80 call 800a8c8 <alt_irq_init>
ALT_LOG_PRINT_BOOT("[alt_main.c] Done OS Init, calling alt_sem_create.\r\n");
ALT_SEM_CREATE (&alt_fd_list_lock, 1);
/* Initialize the device drivers/software components. */
ALT_LOG_PRINT_BOOT("[alt_main.c] Calling alt_sys_init.\r\n");
alt_sys_init();
800a414: 800a8fc0 call 800a8fc <alt_sys_init>
/*
* Call the C++ constructors
*/
ALT_LOG_PRINT_BOOT("[alt_main.c] Calling C++ constructors.\r\n");
_do_ctors ();
800a418: 800d20c0 call 800d20c <_do_ctors>
* redefined as _exit()). This is in the interest of reducing code footprint,
* in that the atexit() overhead is removed when it's not needed.
*/
ALT_LOG_PRINT_BOOT("[alt_main.c] Calling atexit.\r\n");
atexit (_do_dtors);
800a41c: 01020074 movhi r4,2049
800a420: 21349c04 addi r4,r4,-11664
800a424: 800d8140 call 800d814 <atexit>
ALT_LOG_PRINT_BOOT("[alt_main.c] Calling main.\r\n");
#ifdef ALT_NO_EXIT
main (alt_argc, alt_argv, alt_envp);
#else
result = main (alt_argc, alt_argv, alt_envp);
800a428: d126e217 ldw r4,-25720(gp)
800a42c: d166e317 ldw r5,-25716(gp)
800a430: d1a6e417 ldw r6,-25712(gp)
800a434: 80001f00 call 80001f0 <main>
800a438: e0bfff15 stw r2,-4(fp)
close(STDOUT_FILENO);
800a43c: 01000044 movi r4,1
800a440: 8009dd40 call 8009dd4 <close>
exit (result);
800a444: e13fff17 ldw r4,-4(fp)
800a448: 800d8280 call 800d828 <exit>
0800a44c <__malloc_lock>:
* configuration is single threaded, so there is nothing to do here. Note that
* this requires that malloc is never called by an interrupt service routine.
*/
void __malloc_lock ( struct _reent *_r )
{
800a44c: defffe04 addi sp,sp,-8
800a450: df000115 stw fp,4(sp)
800a454: df000104 addi fp,sp,4
800a458: e13fff15 stw r4,-4(fp)
}
800a45c: e037883a mov sp,fp
800a460: df000017 ldw fp,0(sp)
800a464: dec00104 addi sp,sp,4
800a468: f800283a ret
0800a46c <__malloc_unlock>:
/*
*
*/
void __malloc_unlock ( struct _reent *_r )
{
800a46c: defffe04 addi sp,sp,-8
800a470: df000115 stw fp,4(sp)
800a474: df000104 addi fp,sp,4
800a478: e13fff15 stw r4,-4(fp)
}
800a47c: e037883a mov sp,fp
800a480: df000017 ldw fp,0(sp)
800a484: dec00104 addi sp,sp,4
800a488: f800283a ret
0800a48c <read>:
}
#else /* !ALT_USE_DIRECT_DRIVERS */
int ALT_READ (int file, void *ptr, size_t len)
{
800a48c: defff704 addi sp,sp,-36
800a490: dfc00815 stw ra,32(sp)
800a494: df000715 stw fp,28(sp)
800a498: df000704 addi fp,sp,28
800a49c: e13ffb15 stw r4,-20(fp)
800a4a0: e17ffc15 stw r5,-16(fp)
800a4a4: e1bffd15 stw r6,-12(fp)
* A common error case is that when the file descriptor was created, the call
* to open() failed resulting in a negative file descriptor. This is trapped
* below so that we don't try and process an invalid file descriptor.
*/
fd = (file < 0) ? NULL : &alt_fd_list[file];
800a4a8: e0bffb17 ldw r2,-20(fp)
800a4ac: 1004803a cmplt r2,r2,zero
800a4b0: 1000091e bne r2,zero,800a4d8 <read+0x4c>
800a4b4: e13ffb17 ldw r4,-20(fp)
800a4b8: 01400304 movi r5,12
800a4bc: 80096e40 call 80096e4 <__mulsi3>
800a4c0: 1007883a mov r3,r2
800a4c4: 00820074 movhi r2,2049
800a4c8: 10ba9e04 addi r2,r2,-5512
800a4cc: 1887883a add r3,r3,r2
800a4d0: e0ffff15 stw r3,-4(fp)
800a4d4: 00000106 br 800a4dc <read+0x50>
800a4d8: e03fff15 stw zero,-4(fp)
800a4dc: e0bfff17 ldw r2,-4(fp)
800a4e0: e0bffa15 stw r2,-24(fp)
if (fd)
800a4e4: e0bffa17 ldw r2,-24(fp)
800a4e8: 1005003a cmpeq r2,r2,zero
800a4ec: 1000241e bne r2,zero,800a580 <read+0xf4>
* If the file has not been opened with read access, or if the driver does
* not provide an implementation of read(), generate an error. Otherwise
* call the drivers read() function to process the request.
*/
if (((fd->fd_flags & O_ACCMODE) != O_WRONLY) &&
800a4f0: e0bffa17 ldw r2,-24(fp)
800a4f4: 10800217 ldw r2,8(r2)
800a4f8: 108000cc andi r2,r2,3
800a4fc: 10800060 cmpeqi r2,r2,1
800a500: 10001a1e bne r2,zero,800a56c <read+0xe0>
800a504: e0bffa17 ldw r2,-24(fp)
800a508: 10800017 ldw r2,0(r2)
800a50c: 10800517 ldw r2,20(r2)
800a510: 1005003a cmpeq r2,r2,zero
800a514: 1000151e bne r2,zero,800a56c <read+0xe0>
(fd->dev->read))
{
if ((rval = fd->dev->read(fd, ptr, len)) < 0)
800a518: e0bffa17 ldw r2,-24(fp)
800a51c: 10800017 ldw r2,0(r2)
800a520: 10800517 ldw r2,20(r2)
800a524: e17ffc17 ldw r5,-16(fp)
800a528: e1bffd17 ldw r6,-12(fp)
800a52c: e13ffa17 ldw r4,-24(fp)
800a530: 103ee83a callr r2
800a534: e0bff915 stw r2,-28(fp)
800a538: e0bff917 ldw r2,-28(fp)
800a53c: 1004403a cmpge r2,r2,zero
800a540: 1000071e bne r2,zero,800a560 <read+0xd4>
{
ALT_ERRNO = -rval;
800a544: 800a5b00 call 800a5b0 <alt_get_errno>
800a548: e0fff917 ldw r3,-28(fp)
800a54c: 00c7c83a sub r3,zero,r3
800a550: 10c00015 stw r3,0(r2)
return -1;
800a554: 00bfffc4 movi r2,-1
800a558: e0bffe15 stw r2,-8(fp)
800a55c: 00000e06 br 800a598 <read+0x10c>
}
return rval;
800a560: e0bff917 ldw r2,-28(fp)
800a564: e0bffe15 stw r2,-8(fp)
800a568: 00000b06 br 800a598 <read+0x10c>
}
else
{
ALT_ERRNO = EACCES;
800a56c: 800a5b00 call 800a5b0 <alt_get_errno>
800a570: 1007883a mov r3,r2
800a574: 00800344 movi r2,13
800a578: 18800015 stw r2,0(r3)
800a57c: 00000406 br 800a590 <read+0x104>
}
}
else
{
ALT_ERRNO = EBADFD;
800a580: 800a5b00 call 800a5b0 <alt_get_errno>
800a584: 1007883a mov r3,r2
800a588: 00801444 movi r2,81
800a58c: 18800015 stw r2,0(r3)
}
return -1;
800a590: 00bfffc4 movi r2,-1
800a594: e0bffe15 stw r2,-8(fp)
800a598: e0bffe17 ldw r2,-8(fp)
}
800a59c: e037883a mov sp,fp
800a5a0: dfc00117 ldw ra,4(sp)
800a5a4: df000017 ldw fp,0(sp)
800a5a8: dec00204 addi sp,sp,8
800a5ac: f800283a ret
0800a5b0 <alt_get_errno>:
#undef errno
extern int errno;
static ALT_INLINE int* alt_get_errno(void)
{
800a5b0: defffd04 addi sp,sp,-12
800a5b4: dfc00215 stw ra,8(sp)
800a5b8: df000115 stw fp,4(sp)
800a5bc: df000104 addi fp,sp,4
return ((alt_errno) ? alt_errno() : &errno);
800a5c0: 00820074 movhi r2,2049
800a5c4: 10bf5304 addi r2,r2,-692
800a5c8: 10800017 ldw r2,0(r2)
800a5cc: 1005003a cmpeq r2,r2,zero
800a5d0: 1000061e bne r2,zero,800a5ec <alt_get_errno+0x3c>
800a5d4: 00820074 movhi r2,2049
800a5d8: 10bf5304 addi r2,r2,-692
800a5dc: 10800017 ldw r2,0(r2)
800a5e0: 103ee83a callr r2
800a5e4: e0bfff15 stw r2,-4(fp)
800a5e8: 00000306 br 800a5f8 <alt_get_errno+0x48>
800a5ec: 00820074 movhi r2,2049
800a5f0: 10862904 addi r2,r2,6308
800a5f4: e0bfff15 stw r2,-4(fp)
800a5f8: e0bfff17 ldw r2,-4(fp)
}
800a5fc: e037883a mov sp,fp
800a600: dfc00117 ldw ra,4(sp)
800a604: df000017 ldw fp,0(sp)
800a608: dec00204 addi sp,sp,8
800a60c: f800283a ret
0800a610 <alt_release_fd>:
* File descriptors correcponding to standard in, standard out and standard
* error cannont be released backed to the pool. They are always reserved.
*/
void alt_release_fd (int fd)
{
800a610: defffc04 addi sp,sp,-16
800a614: dfc00315 stw ra,12(sp)
800a618: df000215 stw fp,8(sp)
800a61c: dc000115 stw r16,4(sp)
800a620: df000104 addi fp,sp,4
800a624: e13fff15 stw r4,-4(fp)
if (fd > 2)
800a628: e0bfff17 ldw r2,-4(fp)
800a62c: 108000d0 cmplti r2,r2,3
800a630: 10000f1e bne r2,zero,800a670 <alt_release_fd+0x60>
{
alt_fd_list[fd].fd_flags = 0;
800a634: e13fff17 ldw r4,-4(fp)
800a638: 04020074 movhi r16,2049
800a63c: 843a9e04 addi r16,r16,-5512
800a640: 01400304 movi r5,12
800a644: 80096e40 call 80096e4 <__mulsi3>
800a648: 1405883a add r2,r2,r16
800a64c: 10800204 addi r2,r2,8
800a650: 10000015 stw zero,0(r2)
alt_fd_list[fd].dev = 0;
800a654: e13fff17 ldw r4,-4(fp)
800a658: 04020074 movhi r16,2049
800a65c: 843a9e04 addi r16,r16,-5512
800a660: 01400304 movi r5,12
800a664: 80096e40 call 80096e4 <__mulsi3>
800a668: 1405883a add r2,r2,r16
800a66c: 10000015 stw zero,0(r2)
}
}
800a670: e037883a mov sp,fp
800a674: dfc00217 ldw ra,8(sp)
800a678: df000117 ldw fp,4(sp)
800a67c: dc000017 ldw r16,0(sp)
800a680: dec00304 addi sp,sp,12
800a684: f800283a ret
0800a688 <sbrk>:
#endif
caddr_t ALT_SBRK (int incr) __attribute__ ((no_instrument_function ));
caddr_t ALT_SBRK (int incr)
{
800a688: defff804 addi sp,sp,-32
800a68c: df000715 stw fp,28(sp)
800a690: df000704 addi fp,sp,28
800a694: e13ffe15 stw r4,-8(fp)
static ALT_INLINE alt_irq_context ALT_ALWAYS_INLINE
alt_irq_disable_all (void)
{
alt_irq_context context;
NIOS2_READ_STATUS (context);
800a698: 0005303a rdctl r2,status
800a69c: e0bffb15 stw r2,-20(fp)
NIOS2_WRITE_STATUS (context & ~NIOS2_STATUS_PIE_MSK);
800a6a0: e0fffb17 ldw r3,-20(fp)
800a6a4: 00bfff84 movi r2,-2
800a6a8: 1884703a and r2,r3,r2
800a6ac: 1001703a wrctl status,r2
return context;
800a6b0: e0bffb17 ldw r2,-20(fp)
alt_irq_context context;
char *prev_heap_end;
context = alt_irq_disable_all();
800a6b4: e0bffd15 stw r2,-12(fp)
/* Always return data aligned on a word boundary */
heap_end = (char *)(((unsigned int)heap_end + 3) & ~3);
800a6b8: d0a00c17 ldw r2,-32720(gp)
800a6bc: 10c000c4 addi r3,r2,3
800a6c0: 00bfff04 movi r2,-4
800a6c4: 1884703a and r2,r3,r2
800a6c8: d0a00c15 stw r2,-32720(gp)
if (((heap_end + incr) - __alt_heap_start) > ALT_MAX_HEAP_BYTES) {
alt_irq_enable_all(context);
return (caddr_t)-1;
}
#else
if ((heap_end + incr) > __alt_heap_limit) {
800a6cc: d0e00c17 ldw r3,-32720(gp)
800a6d0: e0bffe17 ldw r2,-8(fp)
800a6d4: 1887883a add r3,r3,r2
800a6d8: 00840034 movhi r2,4096
800a6dc: 10800004 addi r2,r2,0
800a6e0: 10c0072e bgeu r2,r3,800a700 <sbrk+0x78>
800a6e4: e0bffd17 ldw r2,-12(fp)
800a6e8: e0bffa15 stw r2,-24(fp)
status &= ~NIOS2_STATUS_PIE_MSK;
status |= (context & NIOS2_STATUS_PIE_MSK);
NIOS2_WRITE_STATUS (status);
#else
NIOS2_WRITE_STATUS (context);
800a6ec: e0bffa17 ldw r2,-24(fp)
800a6f0: 1001703a wrctl status,r2
alt_irq_enable_all(context);
return (caddr_t)-1;
800a6f4: 00bfffc4 movi r2,-1
800a6f8: e0bfff15 stw r2,-4(fp)
800a6fc: 00000c06 br 800a730 <sbrk+0xa8>
}
#endif
prev_heap_end = heap_end;
800a700: d0a00c17 ldw r2,-32720(gp)
800a704: e0bffc15 stw r2,-16(fp)
heap_end += incr;
800a708: d0e00c17 ldw r3,-32720(gp)
800a70c: e0bffe17 ldw r2,-8(fp)
800a710: 1885883a add r2,r3,r2
800a714: d0a00c15 stw r2,-32720(gp)
800a718: e0bffd17 ldw r2,-12(fp)
800a71c: e0bff915 stw r2,-28(fp)
800a720: e0bff917 ldw r2,-28(fp)
800a724: 1001703a wrctl status,r2
#endif
alt_irq_enable_all(context);
return (caddr_t) prev_heap_end;
800a728: e0bffc17 ldw r2,-16(fp)
800a72c: e0bfff15 stw r2,-4(fp)
800a730: e0bfff17 ldw r2,-4(fp)
}
800a734: e037883a mov sp,fp
800a738: df000017 ldw fp,0(sp)
800a73c: dec00104 addi sp,sp,4
800a740: f800283a ret
0800a744 <write>:
}
#else /* !ALT_USE_DIRECT_DRIVERS */
int ALT_WRITE (int file, const void *ptr, size_t len)
{
800a744: defff704 addi sp,sp,-36
800a748: dfc00815 stw ra,32(sp)
800a74c: df000715 stw fp,28(sp)
800a750: df000704 addi fp,sp,28
800a754: e13ffb15 stw r4,-20(fp)
800a758: e17ffc15 stw r5,-16(fp)
800a75c: e1bffd15 stw r6,-12(fp)
* A common error case is that when the file descriptor was created, the call
* to open() failed resulting in a negative file descriptor. This is trapped
* below so that we don't try and process an invalid file descriptor.
*/
fd = (file < 0) ? NULL : &alt_fd_list[file];
800a760: e0bffb17 ldw r2,-20(fp)
800a764: 1004803a cmplt r2,r2,zero
800a768: 1000091e bne r2,zero,800a790 <write+0x4c>
800a76c: e13ffb17 ldw r4,-20(fp)
800a770: 01400304 movi r5,12
800a774: 80096e40 call 80096e4 <__mulsi3>
800a778: 1007883a mov r3,r2
800a77c: 00820074 movhi r2,2049
800a780: 10ba9e04 addi r2,r2,-5512
800a784: 1887883a add r3,r3,r2
800a788: e0ffff15 stw r3,-4(fp)
800a78c: 00000106 br 800a794 <write+0x50>
800a790: e03fff15 stw zero,-4(fp)
800a794: e0bfff17 ldw r2,-4(fp)
800a798: e0bffa15 stw r2,-24(fp)
if (fd)
800a79c: e0bffa17 ldw r2,-24(fp)
800a7a0: 1005003a cmpeq r2,r2,zero
800a7a4: 1000241e bne r2,zero,800a838 <write+0xf4>
* If the file has not been opened with write access, or if the driver does
* not provide an implementation of write(), generate an error. Otherwise
* call the drivers write() function to process the request.
*/
if (((fd->fd_flags & O_ACCMODE) != O_RDONLY) && fd->dev->write)
800a7a8: e0bffa17 ldw r2,-24(fp)
800a7ac: 10800217 ldw r2,8(r2)
800a7b0: 108000cc andi r2,r2,3
800a7b4: 1005003a cmpeq r2,r2,zero
800a7b8: 10001a1e bne r2,zero,800a824 <write+0xe0>
800a7bc: e0bffa17 ldw r2,-24(fp)
800a7c0: 10800017 ldw r2,0(r2)
800a7c4: 10800617 ldw r2,24(r2)
800a7c8: 1005003a cmpeq r2,r2,zero
800a7cc: 1000151e bne r2,zero,800a824 <write+0xe0>
{
/* ALT_LOG - see altera_hal/HAL/inc/sys/alt_log_printf.h */
ALT_LOG_WRITE_FUNCTION(ptr,len);
if ((rval = fd->dev->write(fd, ptr, len)) < 0)
800a7d0: e0bffa17 ldw r2,-24(fp)
800a7d4: 10800017 ldw r2,0(r2)
800a7d8: 10800617 ldw r2,24(r2)
800a7dc: e17ffc17 ldw r5,-16(fp)
800a7e0: e1bffd17 ldw r6,-12(fp)
800a7e4: e13ffa17 ldw r4,-24(fp)
800a7e8: 103ee83a callr r2
800a7ec: e0bff915 stw r2,-28(fp)
800a7f0: e0bff917 ldw r2,-28(fp)
800a7f4: 1004403a cmpge r2,r2,zero
800a7f8: 1000071e bne r2,zero,800a818 <write+0xd4>
{
ALT_ERRNO = -rval;
800a7fc: 800a8680 call 800a868 <alt_get_errno>
800a800: e0fff917 ldw r3,-28(fp)
800a804: 00c7c83a sub r3,zero,r3
800a808: 10c00015 stw r3,0(r2)
return -1;
800a80c: 00bfffc4 movi r2,-1
800a810: e0bffe15 stw r2,-8(fp)
800a814: 00000e06 br 800a850 <write+0x10c>
}
return rval;
800a818: e0bff917 ldw r2,-28(fp)
800a81c: e0bffe15 stw r2,-8(fp)
800a820: 00000b06 br 800a850 <write+0x10c>
}
else
{
ALT_ERRNO = EACCES;
800a824: 800a8680 call 800a868 <alt_get_errno>
800a828: 1007883a mov r3,r2
800a82c: 00800344 movi r2,13
800a830: 18800015 stw r2,0(r3)
800a834: 00000406 br 800a848 <write+0x104>
}
}
else
{
ALT_ERRNO = EBADFD;
800a838: 800a8680 call 800a868 <alt_get_errno>
800a83c: 1007883a mov r3,r2
800a840: 00801444 movi r2,81
800a844: 18800015 stw r2,0(r3)
}
return -1;
800a848: 00bfffc4 movi r2,-1
800a84c: e0bffe15 stw r2,-8(fp)
800a850: e0bffe17 ldw r2,-8(fp)
}
800a854: e037883a mov sp,fp
800a858: dfc00117 ldw ra,4(sp)
800a85c: df000017 ldw fp,0(sp)
800a860: dec00204 addi sp,sp,8
800a864: f800283a ret
0800a868 <alt_get_errno>:
#undef errno
extern int errno;
static ALT_INLINE int* alt_get_errno(void)
{
800a868: defffd04 addi sp,sp,-12
800a86c: dfc00215 stw ra,8(sp)
800a870: df000115 stw fp,4(sp)
800a874: df000104 addi fp,sp,4
return ((alt_errno) ? alt_errno() : &errno);
800a878: 00820074 movhi r2,2049
800a87c: 10bf5304 addi r2,r2,-692
800a880: 10800017 ldw r2,0(r2)
800a884: 1005003a cmpeq r2,r2,zero
800a888: 1000061e bne r2,zero,800a8a4 <alt_get_errno+0x3c>
800a88c: 00820074 movhi r2,2049
800a890: 10bf5304 addi r2,r2,-692
800a894: 10800017 ldw r2,0(r2)
800a898: 103ee83a callr r2
800a89c: e0bfff15 stw r2,-4(fp)
800a8a0: 00000306 br 800a8b0 <alt_get_errno+0x48>
800a8a4: 00820074 movhi r2,2049
800a8a8: 10862904 addi r2,r2,6308
800a8ac: e0bfff15 stw r2,-4(fp)
800a8b0: e0bfff17 ldw r2,-4(fp)
}
800a8b4: e037883a mov sp,fp
800a8b8: dfc00117 ldw ra,4(sp)
800a8bc: df000017 ldw fp,0(sp)
800a8c0: dec00204 addi sp,sp,8
800a8c4: f800283a ret
0800a8c8 <alt_irq_init>:
* The "base" parameter is ignored and only
* present for backwards-compatibility.
*/
void alt_irq_init ( const void* base )
{
800a8c8: defffd04 addi sp,sp,-12
800a8cc: dfc00215 stw ra,8(sp)
800a8d0: df000115 stw fp,4(sp)
800a8d4: df000104 addi fp,sp,4
800a8d8: e13fff15 stw r4,-4(fp)
ALTERA_NIOS2_QSYS_IRQ_INIT ( CPU, CPU);
800a8dc: 800d7f40 call 800d7f4 <altera_nios2_qsys_irq_init>
* alt_irq_cpu_enable_interrupts() enables the CPU to start taking interrupts.
*/
static ALT_INLINE void ALT_ALWAYS_INLINE
alt_irq_cpu_enable_interrupts ()
{
NIOS2_WRITE_STATUS(NIOS2_STATUS_PIE_MSK
800a8e0: 00800044 movi r2,1
800a8e4: 1001703a wrctl status,r2
alt_irq_cpu_enable_interrupts();
}
800a8e8: e037883a mov sp,fp
800a8ec: dfc00117 ldw ra,4(sp)
800a8f0: df000017 ldw fp,0(sp)
800a8f4: dec00204 addi sp,sp,8
800a8f8: f800283a ret
0800a8fc <alt_sys_init>:
* Initialize the non-interrupt controller devices.
* Called after alt_irq_init().
*/
void alt_sys_init( void )
{
800a8fc: defffd04 addi sp,sp,-12
800a900: dfc00215 stw ra,8(sp)
800a904: df000115 stw fp,4(sp)
800a908: df000104 addi fp,sp,4
ALTERA_AVALON_JTAG_UART_INIT ( JTAG_UART, jtag_uart);
800a90c: 01020074 movhi r4,2049
800a910: 213b0804 addi r4,r4,-5088
800a914: 000b883a mov r5,zero
800a918: 000d883a mov r6,zero
800a91c: 800ad800 call 800ad80 <altera_avalon_jtag_uart_init>
800a920: 01020074 movhi r4,2049
800a924: 213afe04 addi r4,r4,-5128
800a928: 800ac000 call 800ac00 <alt_dev_reg>
ALTERA_AVALON_SYSID_QSYS_INIT ( SYSID, sysid);
ALTERA_UP_AVALON_VIDEO_CHARACTER_BUFFER_WITH_DMA_INIT ( CHAR_BUFFER_WITH_DMA, Char_Buffer_with_DMA);
800a92c: 00820074 movhi r2,2049
800a930: 10bf1604 addi r2,r2,-936
800a934: 10800a17 ldw r2,40(r2)
800a938: 10800104 addi r2,r2,4
800a93c: 10800017 ldw r2,0(r2)
800a940: 10ffffcc andi r3,r2,65535
800a944: 00820074 movhi r2,2049
800a948: 10bf1604 addi r2,r2,-936
800a94c: 10c00c15 stw r3,48(r2)
800a950: 00820074 movhi r2,2049
800a954: 10bf1604 addi r2,r2,-936
800a958: 10800a17 ldw r2,40(r2)
800a95c: 10800104 addi r2,r2,4
800a960: 10800017 ldw r2,0(r2)
800a964: 1005d43a srai r2,r2,16
800a968: 10ffffcc andi r3,r2,65535
800a96c: 00820074 movhi r2,2049
800a970: 10bf1604 addi r2,r2,-936
800a974: 10c00d15 stw r3,52(r2)
800a978: 00820074 movhi r2,2049
800a97c: 10bf1604 addi r2,r2,-936
800a980: 10800c17 ldw r2,48(r2)
800a984: 10801068 cmpgeui r2,r2,65
800a988: 1000081e bne r2,zero,800a9ac <alt_sys_init+0xb0>
800a98c: 00c20074 movhi r3,2049
800a990: 18ff1604 addi r3,r3,-936
800a994: 00800fc4 movi r2,63
800a998: 18800f15 stw r2,60(r3)
800a99c: 00c20074 movhi r3,2049
800a9a0: 18ff1604 addi r3,r3,-936
800a9a4: 00800184 movi r2,6
800a9a8: 18801015 stw r2,64(r3)
800a9ac: 00820074 movhi r2,2049
800a9b0: 10bf1604 addi r2,r2,-936
800a9b4: 10800d17 ldw r2,52(r2)
800a9b8: 10800868 cmpgeui r2,r2,33
800a9bc: 1000041e bne r2,zero,800a9d0 <alt_sys_init+0xd4>
800a9c0: 00c20074 movhi r3,2049
800a9c4: 18ff1604 addi r3,r3,-936
800a9c8: 008007c4 movi r2,31
800a9cc: 18801115 stw r2,68(r3)
800a9d0: 01020074 movhi r4,2049
800a9d4: 213f1604 addi r4,r4,-936
800a9d8: 800b6e40 call 800b6e4 <alt_up_char_buffer_init>
800a9dc: 01020074 movhi r4,2049
800a9e0: 213f1604 addi r4,r4,-936
800a9e4: 800ac000 call 800ac00 <alt_dev_reg>
ALTERA_UP_AVALON_VIDEO_PIXEL_BUFFER_DMA_INIT ( PIXEL_BUFFER_DMA, Pixel_Buffer_DMA);
800a9e8: 00820074 movhi r2,2049
800a9ec: 10bf2804 addi r2,r2,-864
800a9f0: 10800a17 ldw r2,40(r2)
800a9f4: 10800017 ldw r2,0(r2)
800a9f8: 1007883a mov r3,r2
800a9fc: 00820074 movhi r2,2049
800aa00: 10bf2804 addi r2,r2,-864
800aa04: 10c00b15 stw r3,44(r2)
800aa08: 00820074 movhi r2,2049
800aa0c: 10bf2804 addi r2,r2,-864
800aa10: 10800a17 ldw r2,40(r2)
800aa14: 10800104 addi r2,r2,4
800aa18: 10800017 ldw r2,0(r2)
800aa1c: 1007883a mov r3,r2
800aa20: 00820074 movhi r2,2049
800aa24: 10bf2804 addi r2,r2,-864
800aa28: 10c00c15 stw r3,48(r2)
800aa2c: 00820074 movhi r2,2049
800aa30: 10bf2804 addi r2,r2,-864
800aa34: 10800a17 ldw r2,40(r2)
800aa38: 10800204 addi r2,r2,8
800aa3c: 10800017 ldw r2,0(r2)
800aa40: 10ffffcc andi r3,r2,65535
800aa44: 00820074 movhi r2,2049
800aa48: 10bf2804 addi r2,r2,-864
800aa4c: 10c00f15 stw r3,60(r2)
800aa50: 00820074 movhi r2,2049
800aa54: 10bf2804 addi r2,r2,-864
800aa58: 10800a17 ldw r2,40(r2)
800aa5c: 10800204 addi r2,r2,8
800aa60: 10800017 ldw r2,0(r2)
800aa64: 1005d43a srai r2,r2,16
800aa68: 10ffffcc andi r3,r2,65535
800aa6c: 00820074 movhi r2,2049
800aa70: 10bf2804 addi r2,r2,-864
800aa74: 10c01015 stw r3,64(r2)
800aa78: 00820074 movhi r2,2049
800aa7c: 10bf2804 addi r2,r2,-864
800aa80: 10800a17 ldw r2,40(r2)
800aa84: 10800304 addi r2,r2,12
800aa88: 10800017 ldw r2,0(r2)
800aa8c: 1005d07a srai r2,r2,1
800aa90: 10c0004c andi r3,r2,1
800aa94: 00820074 movhi r2,2049
800aa98: 10bf2804 addi r2,r2,-864
800aa9c: 10c00d15 stw r3,52(r2)
800aaa0: 00820074 movhi r2,2049
800aaa4: 10bf2804 addi r2,r2,-864
800aaa8: 10800a17 ldw r2,40(r2)
800aaac: 10800304 addi r2,r2,12
800aab0: 10800017 ldw r2,0(r2)
800aab4: 1005d13a srai r2,r2,4
800aab8: 10c003cc andi r3,r2,15
800aabc: 00820074 movhi r2,2049
800aac0: 10bf2804 addi r2,r2,-864
800aac4: 10c00e15 stw r3,56(r2)
800aac8: 00820074 movhi r2,2049
800aacc: 10bf2804 addi r2,r2,-864
800aad0: 10800a17 ldw r2,40(r2)
800aad4: 10800304 addi r2,r2,12
800aad8: 10800017 ldw r2,0(r2)
800aadc: 1005d43a srai r2,r2,16
800aae0: 1007883a mov r3,r2
800aae4: 00bfffc4 movi r2,-1
800aae8: 1884703a and r2,r3,r2
800aaec: e0bfff45 stb r2,-3(fp)
800aaf0: 00820074 movhi r2,2049
800aaf4: 10bf2804 addi r2,r2,-864
800aaf8: 10800a17 ldw r2,40(r2)
800aafc: 10800304 addi r2,r2,12
800ab00: 10800017 ldw r2,0(r2)
800ab04: 1005d63a srai r2,r2,24
800ab08: 1007883a mov r3,r2
800ab0c: 00bfffc4 movi r2,-1
800ab10: 1884703a and r2,r3,r2
800ab14: e0bfff05 stb r2,-4(fp)
800ab18: 00820074 movhi r2,2049
800ab1c: 10bf2804 addi r2,r2,-864
800ab20: 10800e17 ldw r2,56(r2)
800ab24: 10800058 cmpnei r2,r2,1
800ab28: 1000041e bne r2,zero,800ab3c <alt_sys_init+0x240>
800ab2c: 00820074 movhi r2,2049
800ab30: 10bf2804 addi r2,r2,-864
800ab34: 10001115 stw zero,68(r2)
800ab38: 00000e06 br 800ab74 <alt_sys_init+0x278>
800ab3c: 00820074 movhi r2,2049
800ab40: 10bf2804 addi r2,r2,-864
800ab44: 10800e17 ldw r2,56(r2)
800ab48: 10800098 cmpnei r2,r2,2
800ab4c: 1000051e bne r2,zero,800ab64 <alt_sys_init+0x268>
800ab50: 00c20074 movhi r3,2049
800ab54: 18ff2804 addi r3,r3,-864
800ab58: 00800044 movi r2,1
800ab5c: 18801115 stw r2,68(r3)
800ab60: 00000406 br 800ab74 <alt_sys_init+0x278>
800ab64: 00c20074 movhi r3,2049
800ab68: 18ff2804 addi r3,r3,-864
800ab6c: 00800084 movi r2,2
800ab70: 18801115 stw r2,68(r3)
800ab74: e0ffff43 ldbu r3,-3(fp)
800ab78: 00800804 movi r2,32
800ab7c: 10c7c83a sub r3,r2,r3
800ab80: 00bfffc4 movi r2,-1
800ab84: 10c6d83a srl r3,r2,r3
800ab88: 00820074 movhi r2,2049
800ab8c: 10bf2804 addi r2,r2,-864
800ab90: 10c01215 stw r3,72(r2)
800ab94: e0ffff43 ldbu r3,-3(fp)
800ab98: 00820074 movhi r2,2049
800ab9c: 10bf2804 addi r2,r2,-864
800aba0: 10801117 ldw r2,68(r2)
800aba4: 1887883a add r3,r3,r2
800aba8: 00820074 movhi r2,2049
800abac: 10bf2804 addi r2,r2,-864
800abb0: 10c01315 stw r3,76(r2)
800abb4: e0ffff03 ldbu r3,-4(fp)
800abb8: 00800804 movi r2,32
800abbc: 10c7c83a sub r3,r2,r3
800abc0: 00bfffc4 movi r2,-1
800abc4: 10c6d83a srl r3,r2,r3
800abc8: 00820074 movhi r2,2049
800abcc: 10bf2804 addi r2,r2,-864
800abd0: 10c01415 stw r3,80(r2)
800abd4: 01020074 movhi r4,2049
800abd8: 213f2804 addi r4,r4,-864
800abdc: 800ac000 call 800ac00 <alt_dev_reg>
ALTERA_UP_SD_CARD_AVALON_INTERFACE_INIT ( ALTERA_UP_SD_CARD_AVALON_INTERFACE_0, Altera_UP_SD_Card_Avalon_Interface_0);
800abe0: 01020074 movhi r4,2049
800abe4: 213f3d04 addi r4,r4,-780
800abe8: 800ac000 call 800ac00 <alt_dev_reg>
}
800abec: e037883a mov sp,fp
800abf0: dfc00117 ldw ra,4(sp)
800abf4: df000017 ldw fp,0(sp)
800abf8: dec00204 addi sp,sp,8
800abfc: f800283a ret
0800ac00 <alt_dev_reg>:
*/
extern int alt_fs_reg (alt_dev* dev);
static ALT_INLINE int alt_dev_reg (alt_dev* dev)
{
800ac00: defffd04 addi sp,sp,-12
800ac04: dfc00215 stw ra,8(sp)
800ac08: df000115 stw fp,4(sp)
800ac0c: df000104 addi fp,sp,4
800ac10: e13fff15 stw r4,-4(fp)
extern alt_llist alt_dev_list;
return alt_dev_llist_insert ((alt_dev_llist*) dev, &alt_dev_list);
800ac14: e13fff17 ldw r4,-4(fp)
800ac18: 01420074 movhi r5,2049
800ac1c: 297f5004 addi r5,r5,-704
800ac20: 800d0f80 call 800d0f8 <alt_dev_llist_insert>
}
800ac24: e037883a mov sp,fp
800ac28: dfc00117 ldw ra,4(sp)
800ac2c: df000017 ldw fp,0(sp)
800ac30: dec00204 addi sp,sp,8
800ac34: f800283a ret
0800ac38 <altera_avalon_jtag_uart_read_fd>:
*
*/
int
altera_avalon_jtag_uart_read_fd(alt_fd* fd, char* buffer, int space)
{
800ac38: defffa04 addi sp,sp,-24
800ac3c: dfc00515 stw ra,20(sp)
800ac40: df000415 stw fp,16(sp)
800ac44: df000404 addi fp,sp,16
800ac48: e13ffd15 stw r4,-12(fp)
800ac4c: e17ffe15 stw r5,-8(fp)
800ac50: e1bfff15 stw r6,-4(fp)
altera_avalon_jtag_uart_dev* dev = (altera_avalon_jtag_uart_dev*) fd->dev;
800ac54: e0bffd17 ldw r2,-12(fp)
800ac58: 10800017 ldw r2,0(r2)
800ac5c: e0bffc15 stw r2,-16(fp)
return altera_avalon_jtag_uart_read(&dev->state, buffer, space,
800ac60: e0bffc17 ldw r2,-16(fp)
800ac64: 11000a04 addi r4,r2,40
800ac68: e0bffd17 ldw r2,-12(fp)
800ac6c: 11c00217 ldw r7,8(r2)
800ac70: e17ffe17 ldw r5,-8(fp)
800ac74: e1bfff17 ldw r6,-4(fp)
800ac78: 800b2800 call 800b280 <altera_avalon_jtag_uart_read>
fd->fd_flags);
}
800ac7c: e037883a mov sp,fp
800ac80: dfc00117 ldw ra,4(sp)
800ac84: df000017 ldw fp,0(sp)
800ac88: dec00204 addi sp,sp,8
800ac8c: f800283a ret
0800ac90 <altera_avalon_jtag_uart_write_fd>:
int
altera_avalon_jtag_uart_write_fd(alt_fd* fd, const char* buffer, int space)
{
800ac90: defffa04 addi sp,sp,-24
800ac94: dfc00515 stw ra,20(sp)
800ac98: df000415 stw fp,16(sp)
800ac9c: df000404 addi fp,sp,16
800aca0: e13ffd15 stw r4,-12(fp)
800aca4: e17ffe15 stw r5,-8(fp)
800aca8: e1bfff15 stw r6,-4(fp)
altera_avalon_jtag_uart_dev* dev = (altera_avalon_jtag_uart_dev*) fd->dev;
800acac: e0bffd17 ldw r2,-12(fp)
800acb0: 10800017 ldw r2,0(r2)
800acb4: e0bffc15 stw r2,-16(fp)
return altera_avalon_jtag_uart_write(&dev->state, buffer, space,
800acb8: e0bffc17 ldw r2,-16(fp)
800acbc: 11000a04 addi r4,r2,40
800acc0: e0bffd17 ldw r2,-12(fp)
800acc4: 11c00217 ldw r7,8(r2)
800acc8: e17ffe17 ldw r5,-8(fp)
800accc: e1bfff17 ldw r6,-4(fp)
800acd0: 800b4a40 call 800b4a4 <altera_avalon_jtag_uart_write>
fd->fd_flags);
}
800acd4: e037883a mov sp,fp
800acd8: dfc00117 ldw ra,4(sp)
800acdc: df000017 ldw fp,0(sp)
800ace0: dec00204 addi sp,sp,8
800ace4: f800283a ret
0800ace8 <altera_avalon_jtag_uart_close_fd>:
#ifndef ALTERA_AVALON_JTAG_UART_SMALL
int
altera_avalon_jtag_uart_close_fd(alt_fd* fd)
{
800ace8: defffc04 addi sp,sp,-16
800acec: dfc00315 stw ra,12(sp)
800acf0: df000215 stw fp,8(sp)
800acf4: df000204 addi fp,sp,8
800acf8: e13fff15 stw r4,-4(fp)
altera_avalon_jtag_uart_dev* dev = (altera_avalon_jtag_uart_dev*) fd->dev;
800acfc: e0bfff17 ldw r2,-4(fp)
800ad00: 10800017 ldw r2,0(r2)
800ad04: e0bffe15 stw r2,-8(fp)
return altera_avalon_jtag_uart_close(&dev->state, fd->fd_flags);
800ad08: e0bffe17 ldw r2,-8(fp)
800ad0c: 11000a04 addi r4,r2,40
800ad10: e0bfff17 ldw r2,-4(fp)
800ad14: 11400217 ldw r5,8(r2)
800ad18: 800b1180 call 800b118 <altera_avalon_jtag_uart_close>
}
800ad1c: e037883a mov sp,fp
800ad20: dfc00117 ldw ra,4(sp)
800ad24: df000017 ldw fp,0(sp)
800ad28: dec00204 addi sp,sp,8
800ad2c: f800283a ret
0800ad30 <altera_avalon_jtag_uart_ioctl_fd>:
int
altera_avalon_jtag_uart_ioctl_fd(alt_fd* fd, int req, void* arg)
{
800ad30: defffa04 addi sp,sp,-24
800ad34: dfc00515 stw ra,20(sp)
800ad38: df000415 stw fp,16(sp)
800ad3c: df000404 addi fp,sp,16
800ad40: e13ffd15 stw r4,-12(fp)
800ad44: e17ffe15 stw r5,-8(fp)
800ad48: e1bfff15 stw r6,-4(fp)
altera_avalon_jtag_uart_dev* dev = (altera_avalon_jtag_uart_dev*) fd->dev;
800ad4c: e0bffd17 ldw r2,-12(fp)
800ad50: 10800017 ldw r2,0(r2)
800ad54: e0bffc15 stw r2,-16(fp)
return altera_avalon_jtag_uart_ioctl(&dev->state, req, arg);
800ad58: e0bffc17 ldw r2,-16(fp)
800ad5c: 11000a04 addi r4,r2,40
800ad60: e17ffe17 ldw r5,-8(fp)
800ad64: e1bfff17 ldw r6,-4(fp)
800ad68: 800b18c0 call 800b18c <altera_avalon_jtag_uart_ioctl>
}
800ad6c: e037883a mov sp,fp
800ad70: dfc00117 ldw ra,4(sp)
800ad74: df000017 ldw fp,0(sp)
800ad78: dec00204 addi sp,sp,8
800ad7c: f800283a ret
0800ad80 <altera_avalon_jtag_uart_init>:
* Return 1 on sucessful IRQ register and 0 on failure.
*/
void altera_avalon_jtag_uart_init(altera_avalon_jtag_uart_state* sp,
int irq_controller_id, int irq)
{
800ad80: defffa04 addi sp,sp,-24
800ad84: dfc00515 stw ra,20(sp)
800ad88: df000415 stw fp,16(sp)
800ad8c: df000404 addi fp,sp,16
800ad90: e13ffd15 stw r4,-12(fp)
800ad94: e17ffe15 stw r5,-8(fp)
800ad98: e1bfff15 stw r6,-4(fp)
ALT_FLAG_CREATE(&sp->events, 0);
ALT_SEM_CREATE(&sp->read_lock, 1);
ALT_SEM_CREATE(&sp->write_lock, 1);
/* enable read interrupts at the device */
sp->irq_enable = ALTERA_AVALON_JTAG_UART_CONTROL_RE_MSK;
800ad9c: e0fffd17 ldw r3,-12(fp)
800ada0: 00800044 movi r2,1
800ada4: 18800815 stw r2,32(r3)
IOWR_ALTERA_AVALON_JTAG_UART_CONTROL(sp->base, sp->irq_enable);
800ada8: e0bffd17 ldw r2,-12(fp)
800adac: 10800017 ldw r2,0(r2)
800adb0: 11000104 addi r4,r2,4
800adb4: e0bffd17 ldw r2,-12(fp)
800adb8: 10800817 ldw r2,32(r2)
800adbc: 1007883a mov r3,r2
800adc0: 2005883a mov r2,r4
800adc4: 10c00035 stwio r3,0(r2)
/* register the interrupt handler */
#ifdef ALT_ENHANCED_INTERRUPT_API_PRESENT
alt_ic_isr_register(irq_controller_id, irq, altera_avalon_jtag_uart_irq,
800adc8: e13ffe17 ldw r4,-8(fp)
800adcc: e17fff17 ldw r5,-4(fp)
800add0: d8000015 stw zero,0(sp)
800add4: 01820074 movhi r6,2049
800add8: 31ab9004 addi r6,r6,-20928
800addc: e1fffd17 ldw r7,-12(fp)
800ade0: 800d3840 call 800d384 <alt_ic_isr_register>
#else
alt_irq_register(irq, sp, altera_avalon_jtag_uart_irq);
#endif
/* Register an alarm to go off every second to check for presence of host */
sp->host_inactive = 0;
800ade4: e0bffd17 ldw r2,-12(fp)
800ade8: 10000915 stw zero,36(r2)
if (alt_alarm_start(&sp->alarm, alt_ticks_per_second(),
800adec: e0bffd17 ldw r2,-12(fp)
800adf0: 11000204 addi r4,r2,8
* Obtain the system clock rate in ticks/s.
*/
static ALT_INLINE alt_u32 ALT_ALWAYS_INLINE alt_ticks_per_second (void)
{
return _alt_tick_rate;
800adf4: 00820074 movhi r2,2049
800adf8: 10862e04 addi r2,r2,6328
800adfc: 10800017 ldw r2,0(r2)
800ae00: 100b883a mov r5,r2
800ae04: 01820074 movhi r6,2049
800ae08: 31ac1a04 addi r6,r6,-20376
800ae0c: e1fffd17 ldw r7,-12(fp)
800ae10: 800cf880 call 800cf88 <alt_alarm_start>
800ae14: 1004403a cmpge r2,r2,zero
800ae18: 1000041e bne r2,zero,800ae2c <altera_avalon_jtag_uart_init+0xac>
&altera_avalon_jtag_uart_timeout, sp) < 0)
{
/* If we can't set the alarm then record "don't know if host present"
* and behave as though the host is present.
*/
sp->timeout = INT_MAX;
800ae1c: e0fffd17 ldw r3,-12(fp)
800ae20: 00a00034 movhi r2,32768
800ae24: 10bfffc4 addi r2,r2,-1
800ae28: 18800115 stw r2,4(r3)
}
/* ALT_LOG - see altera_hal/HAL/inc/sys/alt_log_printf.h */
ALT_LOG_JTAG_UART_ALARM_REGISTER(sp, sp->base);
}
800ae2c: e037883a mov sp,fp
800ae30: dfc00117 ldw ra,4(sp)
800ae34: df000017 ldw fp,0(sp)
800ae38: dec00204 addi sp,sp,8
800ae3c: f800283a ret
0800ae40 <altera_avalon_jtag_uart_irq>:
#ifdef ALT_ENHANCED_INTERRUPT_API_PRESENT
static void altera_avalon_jtag_uart_irq(void* context)
#else
static void altera_avalon_jtag_uart_irq(void* context, alt_u32 id)
#endif
{
800ae40: defff804 addi sp,sp,-32
800ae44: df000715 stw fp,28(sp)
800ae48: df000704 addi fp,sp,28
800ae4c: e13fff15 stw r4,-4(fp)
altera_avalon_jtag_uart_state* sp = (altera_avalon_jtag_uart_state*) context;
800ae50: e0bfff17 ldw r2,-4(fp)
800ae54: e0bffe15 stw r2,-8(fp)
unsigned int base = sp->base;
800ae58: e0bffe17 ldw r2,-8(fp)
800ae5c: 10800017 ldw r2,0(r2)
800ae60: e0bffd15 stw r2,-12(fp)
800ae64: 00000006 br 800ae68 <altera_avalon_jtag_uart_irq+0x28>
/* ALT_LOG - see altera_hal/HAL/inc/sys/alt_log_printf.h */
ALT_LOG_JTAG_UART_ISR_FUNCTION(base, sp);
for ( ; ; )
{
unsigned int control = IORD_ALTERA_AVALON_JTAG_UART_CONTROL(base);
800ae68: e0bffd17 ldw r2,-12(fp)
800ae6c: 10800104 addi r2,r2,4
800ae70: 10800037 ldwio r2,0(r2)
800ae74: e0bffc15 stw r2,-16(fp)
/* Return once nothing more to do */
if ((control & (ALTERA_AVALON_JTAG_UART_CONTROL_RI_MSK | ALTERA_AVALON_JTAG_UART_CONTROL_WI_MSK)) == 0)
800ae78: e0bffc17 ldw r2,-16(fp)
800ae7c: 1080c00c andi r2,r2,768
800ae80: 1005003a cmpeq r2,r2,zero
800ae84: 1000741e bne r2,zero,800b058 <altera_avalon_jtag_uart_irq+0x218>
break;
if (control & ALTERA_AVALON_JTAG_UART_CONTROL_RI_MSK)
800ae88: e0bffc17 ldw r2,-16(fp)
800ae8c: 1080400c andi r2,r2,256
800ae90: 1005003a cmpeq r2,r2,zero
800ae94: 1000351e bne r2,zero,800af6c <altera_avalon_jtag_uart_irq+0x12c>
{
/* process a read irq. Start by assuming that there is data in the
* receive FIFO (otherwise why would we have been interrupted?)
*/
unsigned int data = 1 << ALTERA_AVALON_JTAG_UART_DATA_RAVAIL_OFST;
800ae98: 00800074 movhi r2,1
800ae9c: e0bffb15 stw r2,-20(fp)
for ( ; ; )
{
/* Check whether there is space in the buffer. If not then we must not
* read any characters from the buffer as they will be lost.
*/
unsigned int next = (sp->rx_in + 1) % ALTERA_AVALON_JTAG_UART_BUF_LEN;
800aea0: e0bffe17 ldw r2,-8(fp)
800aea4: 10800a17 ldw r2,40(r2)
800aea8: 10800044 addi r2,r2,1
800aeac: 1081ffcc andi r2,r2,2047
800aeb0: e0bffa15 stw r2,-24(fp)
if (next == sp->rx_out)
800aeb4: e0bffe17 ldw r2,-8(fp)
800aeb8: 10c00b17 ldw r3,44(r2)
800aebc: e0bffa17 ldw r2,-24(fp)
800aec0: 18801626 beq r3,r2,800af1c <altera_avalon_jtag_uart_irq+0xdc>
break;
/* Try to remove a character from the FIFO and find out whether there
* are any more characters remaining.
*/
data = IORD_ALTERA_AVALON_JTAG_UART_DATA(base);
800aec4: e0bffd17 ldw r2,-12(fp)
800aec8: 10800037 ldwio r2,0(r2)
800aecc: e0bffb15 stw r2,-20(fp)
if ((data & ALTERA_AVALON_JTAG_UART_DATA_RVALID_MSK) == 0)
800aed0: e0bffb17 ldw r2,-20(fp)
800aed4: 10a0000c andi r2,r2,32768
800aed8: 1005003a cmpeq r2,r2,zero
800aedc: 10000f1e bne r2,zero,800af1c <altera_avalon_jtag_uart_irq+0xdc>
break;
sp->rx_buf[sp->rx_in] = (data & ALTERA_AVALON_JTAG_UART_DATA_DATA_MSK) >> ALTERA_AVALON_JTAG_UART_DATA_DATA_OFST;
800aee0: e0bffe17 ldw r2,-8(fp)
800aee4: 10c00a17 ldw r3,40(r2)
800aee8: e0bffb17 ldw r2,-20(fp)
800aeec: 1009883a mov r4,r2
800aef0: e0bffe17 ldw r2,-8(fp)
800aef4: 1885883a add r2,r3,r2
800aef8: 10800e04 addi r2,r2,56
800aefc: 11000005 stb r4,0(r2)
sp->rx_in = (sp->rx_in + 1) % ALTERA_AVALON_JTAG_UART_BUF_LEN;
800af00: e0bffe17 ldw r2,-8(fp)
800af04: 10800a17 ldw r2,40(r2)
800af08: 10800044 addi r2,r2,1
800af0c: 10c1ffcc andi r3,r2,2047
800af10: e0bffe17 ldw r2,-8(fp)
800af14: 10c00a15 stw r3,40(r2)
/* Post an event to notify jtag_uart_read that a character has been read */
ALT_FLAG_POST (sp->events, ALT_JTAG_UART_READ_RDY, OS_FLAG_SET);
}
800af18: 003fe106 br 800aea0 <altera_avalon_jtag_uart_irq+0x60>
if (data & ALTERA_AVALON_JTAG_UART_DATA_RAVAIL_MSK)
800af1c: e0bffb17 ldw r2,-20(fp)
800af20: 10bfffec andhi r2,r2,65535
800af24: 1005003a cmpeq r2,r2,zero
800af28: 1000101e bne r2,zero,800af6c <altera_avalon_jtag_uart_irq+0x12c>
{
/* If there is still data available here then the buffer is full
* so turn off receive interrupts until some space becomes available.
*/
sp->irq_enable &= ~ALTERA_AVALON_JTAG_UART_CONTROL_RE_MSK;
800af2c: e0bffe17 ldw r2,-8(fp)
800af30: 10c00817 ldw r3,32(r2)
800af34: 00bfff84 movi r2,-2
800af38: 1886703a and r3,r3,r2
800af3c: e0bffe17 ldw r2,-8(fp)
800af40: 10c00815 stw r3,32(r2)
IOWR_ALTERA_AVALON_JTAG_UART_CONTROL(base, sp->irq_enable);
800af44: e0bffd17 ldw r2,-12(fp)
800af48: 11000104 addi r4,r2,4
800af4c: e0bffe17 ldw r2,-8(fp)
800af50: 10800817 ldw r2,32(r2)
800af54: 1007883a mov r3,r2
800af58: 2005883a mov r2,r4
800af5c: 10c00035 stwio r3,0(r2)
/* Dummy read to ensure IRQ is cleared prior to ISR completion */
IORD_ALTERA_AVALON_JTAG_UART_CONTROL(base);
800af60: e0bffd17 ldw r2,-12(fp)
800af64: 10800104 addi r2,r2,4
800af68: 10800037 ldwio r2,0(r2)
}
}
if (control & ALTERA_AVALON_JTAG_UART_CONTROL_WI_MSK)
800af6c: e0bffc17 ldw r2,-16(fp)
800af70: 1080800c andi r2,r2,512
800af74: 1005003a cmpeq r2,r2,zero
800af78: 103fbb1e bne r2,zero,800ae68 <altera_avalon_jtag_uart_irq+0x28>
{
/* process a write irq */
unsigned int space = (control & ALTERA_AVALON_JTAG_UART_CONTROL_WSPACE_MSK) >> ALTERA_AVALON_JTAG_UART_CONTROL_WSPACE_OFST;
800af7c: e0bffc17 ldw r2,-16(fp)
800af80: 10bfffec andhi r2,r2,65535
800af84: 1004d43a srli r2,r2,16
800af88: e0bff915 stw r2,-28(fp)
while (space > 0 && sp->tx_out != sp->tx_in)
800af8c: 00001506 br 800afe4 <altera_avalon_jtag_uart_irq+0x1a4>
{
IOWR_ALTERA_AVALON_JTAG_UART_DATA(base, sp->tx_buf[sp->tx_out]);
800af90: e13ffd17 ldw r4,-12(fp)
800af94: e0bffe17 ldw r2,-8(fp)
800af98: 10c00d17 ldw r3,52(r2)
800af9c: e0bffe17 ldw r2,-8(fp)
800afa0: 1885883a add r2,r3,r2
800afa4: 10820e04 addi r2,r2,2104
800afa8: 10800003 ldbu r2,0(r2)
800afac: 10c03fcc andi r3,r2,255
800afb0: 18c0201c xori r3,r3,128
800afb4: 18ffe004 addi r3,r3,-128
800afb8: 2005883a mov r2,r4
800afbc: 10c00035 stwio r3,0(r2)
sp->tx_out = (sp->tx_out + 1) % ALTERA_AVALON_JTAG_UART_BUF_LEN;
800afc0: e0bffe17 ldw r2,-8(fp)
800afc4: 10800d17 ldw r2,52(r2)
800afc8: 10800044 addi r2,r2,1
800afcc: 10c1ffcc andi r3,r2,2047
800afd0: e0bffe17 ldw r2,-8(fp)
800afd4: 10c00d15 stw r3,52(r2)
/* Post an event to notify jtag_uart_write that a character has been written */
ALT_FLAG_POST (sp->events, ALT_JTAG_UART_WRITE_RDY, OS_FLAG_SET);
space--;
800afd8: e0bff917 ldw r2,-28(fp)
800afdc: 10bfffc4 addi r2,r2,-1
800afe0: e0bff915 stw r2,-28(fp)
if (control & ALTERA_AVALON_JTAG_UART_CONTROL_WI_MSK)
{
/* process a write irq */
unsigned int space = (control & ALTERA_AVALON_JTAG_UART_CONTROL_WSPACE_MSK) >> ALTERA_AVALON_JTAG_UART_CONTROL_WSPACE_OFST;
while (space > 0 && sp->tx_out != sp->tx_in)
800afe4: e0bff917 ldw r2,-28(fp)
800afe8: 1005003a cmpeq r2,r2,zero
800afec: 1000051e bne r2,zero,800b004 <altera_avalon_jtag_uart_irq+0x1c4>
800aff0: e0bffe17 ldw r2,-8(fp)
800aff4: 10c00d17 ldw r3,52(r2)
800aff8: e0bffe17 ldw r2,-8(fp)
800affc: 10800c17 ldw r2,48(r2)
800b000: 18bfe31e bne r3,r2,800af90 <altera_avalon_jtag_uart_irq+0x150>
ALT_FLAG_POST (sp->events, ALT_JTAG_UART_WRITE_RDY, OS_FLAG_SET);
space--;
}
if (space > 0)
800b004: e0bff917 ldw r2,-28(fp)
800b008: 1005003a cmpeq r2,r2,zero
800b00c: 103f961e bne r2,zero,800ae68 <altera_avalon_jtag_uart_irq+0x28>
{
/* If we don't have any more data available then turn off the TX interrupt */
sp->irq_enable &= ~ALTERA_AVALON_JTAG_UART_CONTROL_WE_MSK;
800b010: e0bffe17 ldw r2,-8(fp)
800b014: 10c00817 ldw r3,32(r2)
800b018: 00bfff44 movi r2,-3
800b01c: 1886703a and r3,r3,r2
800b020: e0bffe17 ldw r2,-8(fp)
800b024: 10c00815 stw r3,32(r2)
IOWR_ALTERA_AVALON_JTAG_UART_CONTROL(sp->base, sp->irq_enable);
800b028: e0bffe17 ldw r2,-8(fp)
800b02c: 10800017 ldw r2,0(r2)
800b030: 11000104 addi r4,r2,4
800b034: e0bffe17 ldw r2,-8(fp)
800b038: 10800817 ldw r2,32(r2)
800b03c: 1007883a mov r3,r2
800b040: 2005883a mov r2,r4
800b044: 10c00035 stwio r3,0(r2)
/* Dummy read to ensure IRQ is cleared prior to ISR completion */
IORD_ALTERA_AVALON_JTAG_UART_CONTROL(base);
800b048: e0bffd17 ldw r2,-12(fp)
800b04c: 10800104 addi r2,r2,4
800b050: 10800037 ldwio r2,0(r2)
}
}
}
800b054: 003f8406 br 800ae68 <altera_avalon_jtag_uart_irq+0x28>
}
800b058: e037883a mov sp,fp
800b05c: df000017 ldw fp,0(sp)
800b060: dec00104 addi sp,sp,4
800b064: f800283a ret
0800b068 <altera_avalon_jtag_uart_timeout>:
* Timeout routine is called every second
*/
static alt_u32
altera_avalon_jtag_uart_timeout(void* context)
{
800b068: defffc04 addi sp,sp,-16
800b06c: df000315 stw fp,12(sp)
800b070: df000304 addi fp,sp,12
800b074: e13fff15 stw r4,-4(fp)
altera_avalon_jtag_uart_state* sp = (altera_avalon_jtag_uart_state *) context;
800b078: e0bfff17 ldw r2,-4(fp)
800b07c: e0bffe15 stw r2,-8(fp)
unsigned int control = IORD_ALTERA_AVALON_JTAG_UART_CONTROL(sp->base);
800b080: e0bffe17 ldw r2,-8(fp)
800b084: 10800017 ldw r2,0(r2)
800b088: 10800104 addi r2,r2,4
800b08c: 10800037 ldwio r2,0(r2)
800b090: e0bffd15 stw r2,-12(fp)
if (control & ALTERA_AVALON_JTAG_UART_CONTROL_AC_MSK)
800b094: e0bffd17 ldw r2,-12(fp)
800b098: 1081000c andi r2,r2,1024
800b09c: 1005003a cmpeq r2,r2,zero
800b0a0: 10000c1e bne r2,zero,800b0d4 <altera_avalon_jtag_uart_timeout+0x6c>
{
IOWR_ALTERA_AVALON_JTAG_UART_CONTROL(sp->base, sp->irq_enable | ALTERA_AVALON_JTAG_UART_CONTROL_AC_MSK);
800b0a4: e0bffe17 ldw r2,-8(fp)
800b0a8: 10800017 ldw r2,0(r2)
800b0ac: 11000104 addi r4,r2,4
800b0b0: e0bffe17 ldw r2,-8(fp)
800b0b4: 10800817 ldw r2,32(r2)
800b0b8: 10810014 ori r2,r2,1024
800b0bc: 1007883a mov r3,r2
800b0c0: 2005883a mov r2,r4
800b0c4: 10c00035 stwio r3,0(r2)
sp->host_inactive = 0;
800b0c8: e0bffe17 ldw r2,-8(fp)
800b0cc: 10000915 stw zero,36(r2)
800b0d0: 00000a06 br 800b0fc <altera_avalon_jtag_uart_timeout+0x94>
}
else if (sp->host_inactive < INT_MAX - 2) {
800b0d4: e0bffe17 ldw r2,-8(fp)
800b0d8: 10c00917 ldw r3,36(r2)
800b0dc: 00a00034 movhi r2,32768
800b0e0: 10bfff04 addi r2,r2,-4
800b0e4: 10c00536 bltu r2,r3,800b0fc <altera_avalon_jtag_uart_timeout+0x94>
sp->host_inactive++;
800b0e8: e0bffe17 ldw r2,-8(fp)
800b0ec: 10800917 ldw r2,36(r2)
800b0f0: 10c00044 addi r3,r2,1
800b0f4: e0bffe17 ldw r2,-8(fp)
800b0f8: 10c00915 stw r3,36(r2)
800b0fc: 00820074 movhi r2,2049
800b100: 10862e04 addi r2,r2,6328
800b104: 10800017 ldw r2,0(r2)
ALT_FLAG_POST (sp->events, ALT_JTAG_UART_TIMEOUT, OS_FLAG_SET);
}
}
return alt_ticks_per_second();
}
800b108: e037883a mov sp,fp
800b10c: df000017 ldw fp,0(sp)
800b110: dec00104 addi sp,sp,4
800b114: f800283a ret
0800b118 <altera_avalon_jtag_uart_close>:
* The close routine is not implemented for the small driver; instead it will
* map to null. This is because the small driver simply waits while characters
* are transmitted; there is no interrupt-serviced buffer to empty
*/
int altera_avalon_jtag_uart_close(altera_avalon_jtag_uart_state* sp, int flags)
{
800b118: defffc04 addi sp,sp,-16
800b11c: df000315 stw fp,12(sp)
800b120: df000304 addi fp,sp,12
800b124: e13ffd15 stw r4,-12(fp)
800b128: e17ffe15 stw r5,-8(fp)
/*
* Wait for all transmit data to be emptied by the JTAG UART ISR, or
* for a host-inactivity timeout, in which case transmit data will be lost
*/
while ( (sp->tx_out != sp->tx_in) && (sp->host_inactive < sp->timeout) ) {
800b12c: 00000706 br 800b14c <altera_avalon_jtag_uart_close+0x34>
if (flags & O_NONBLOCK) {
800b130: e0bffe17 ldw r2,-8(fp)
800b134: 1090000c andi r2,r2,16384
800b138: 1005003a cmpeq r2,r2,zero
800b13c: 1000031e bne r2,zero,800b14c <altera_avalon_jtag_uart_close+0x34>
return -EWOULDBLOCK;
800b140: 00bffd44 movi r2,-11
800b144: e0bfff15 stw r2,-4(fp)
800b148: 00000b06 br 800b178 <altera_avalon_jtag_uart_close+0x60>
{
/*
* Wait for all transmit data to be emptied by the JTAG UART ISR, or
* for a host-inactivity timeout, in which case transmit data will be lost
*/
while ( (sp->tx_out != sp->tx_in) && (sp->host_inactive < sp->timeout) ) {
800b14c: e0bffd17 ldw r2,-12(fp)
800b150: 10c00d17 ldw r3,52(r2)
800b154: e0bffd17 ldw r2,-12(fp)
800b158: 10800c17 ldw r2,48(r2)
800b15c: 18800526 beq r3,r2,800b174 <altera_avalon_jtag_uart_close+0x5c>
800b160: e0bffd17 ldw r2,-12(fp)
800b164: 10c00917 ldw r3,36(r2)
800b168: e0bffd17 ldw r2,-12(fp)
800b16c: 10800117 ldw r2,4(r2)
800b170: 18bfef36 bltu r3,r2,800b130 <altera_avalon_jtag_uart_close+0x18>
if (flags & O_NONBLOCK) {
return -EWOULDBLOCK;
}
}
return 0;
800b174: e03fff15 stw zero,-4(fp)
800b178: e0bfff17 ldw r2,-4(fp)
}
800b17c: e037883a mov sp,fp
800b180: df000017 ldw fp,0(sp)
800b184: dec00104 addi sp,sp,4
800b188: f800283a ret
0800b18c <altera_avalon_jtag_uart_ioctl>:
/* ----------------------------------------------------------- */
int
altera_avalon_jtag_uart_ioctl(altera_avalon_jtag_uart_state* sp, int req,
void* arg)
{
800b18c: defff804 addi sp,sp,-32
800b190: df000715 stw fp,28(sp)
800b194: df000704 addi fp,sp,28
800b198: e13ffb15 stw r4,-20(fp)
800b19c: e17ffc15 stw r5,-16(fp)
800b1a0: e1bffd15 stw r6,-12(fp)
int rc = -ENOTTY;
800b1a4: 00bff9c4 movi r2,-25
800b1a8: e0bffa15 stw r2,-24(fp)
switch (req)
800b1ac: e0bffc17 ldw r2,-16(fp)
800b1b0: e0bfff15 stw r2,-4(fp)
800b1b4: e0ffff17 ldw r3,-4(fp)
800b1b8: 189a8060 cmpeqi r2,r3,27137
800b1bc: 1000041e bne r2,zero,800b1d0 <altera_avalon_jtag_uart_ioctl+0x44>
800b1c0: e0ffff17 ldw r3,-4(fp)
800b1c4: 189a80a0 cmpeqi r2,r3,27138
800b1c8: 10001b1e bne r2,zero,800b238 <altera_avalon_jtag_uart_ioctl+0xac>
800b1cc: 00002706 br 800b26c <altera_avalon_jtag_uart_ioctl+0xe0>
{
case TIOCSTIMEOUT:
/* Set the time to wait until assuming host is not connected */
if (sp->timeout != INT_MAX)
800b1d0: e0bffb17 ldw r2,-20(fp)
800b1d4: 10c00117 ldw r3,4(r2)
800b1d8: 00a00034 movhi r2,32768
800b1dc: 10bfffc4 addi r2,r2,-1
800b1e0: 18802226 beq r3,r2,800b26c <altera_avalon_jtag_uart_ioctl+0xe0>
{
int timeout = *((int *)arg);
800b1e4: e0bffd17 ldw r2,-12(fp)
800b1e8: 10800017 ldw r2,0(r2)
800b1ec: e0bff915 stw r2,-28(fp)
sp->timeout = (timeout >= 2 && timeout < INT_MAX) ? timeout : INT_MAX - 1;
800b1f0: e0bff917 ldw r2,-28(fp)
800b1f4: 10800090 cmplti r2,r2,2
800b1f8: 1000071e bne r2,zero,800b218 <altera_avalon_jtag_uart_ioctl+0x8c>
800b1fc: e0fff917 ldw r3,-28(fp)
800b200: 00a00034 movhi r2,32768
800b204: 10bfffc4 addi r2,r2,-1
800b208: 18800326 beq r3,r2,800b218 <altera_avalon_jtag_uart_ioctl+0x8c>
800b20c: e0bff917 ldw r2,-28(fp)
800b210: e0bffe15 stw r2,-8(fp)
800b214: 00000306 br 800b224 <altera_avalon_jtag_uart_ioctl+0x98>
800b218: 00e00034 movhi r3,32768
800b21c: 18ffff84 addi r3,r3,-2
800b220: e0fffe15 stw r3,-8(fp)
800b224: e0bffb17 ldw r2,-20(fp)
800b228: e0fffe17 ldw r3,-8(fp)
800b22c: 10c00115 stw r3,4(r2)
rc = 0;
800b230: e03ffa15 stw zero,-24(fp)
}
break;
800b234: 00000d06 br 800b26c <altera_avalon_jtag_uart_ioctl+0xe0>
case TIOCGCONNECTED:
/* Find out whether host is connected */
if (sp->timeout != INT_MAX)
800b238: e0bffb17 ldw r2,-20(fp)
800b23c: 10c00117 ldw r3,4(r2)
800b240: 00a00034 movhi r2,32768
800b244: 10bfffc4 addi r2,r2,-1
800b248: 18800826 beq r3,r2,800b26c <altera_avalon_jtag_uart_ioctl+0xe0>
{
*((int *)arg) = (sp->host_inactive < sp->timeout) ? 1 : 0;
800b24c: e13ffd17 ldw r4,-12(fp)
800b250: e0bffb17 ldw r2,-20(fp)
800b254: 10c00917 ldw r3,36(r2)
800b258: e0bffb17 ldw r2,-20(fp)
800b25c: 10800117 ldw r2,4(r2)
800b260: 1885803a cmpltu r2,r3,r2
800b264: 20800015 stw r2,0(r4)
rc = 0;
800b268: e03ffa15 stw zero,-24(fp)
default:
break;
}
return rc;
800b26c: e0bffa17 ldw r2,-24(fp)
}
800b270: e037883a mov sp,fp
800b274: df000017 ldw fp,0(sp)
800b278: dec00104 addi sp,sp,4
800b27c: f800283a ret
0800b280 <altera_avalon_jtag_uart_read>:
/* ----------------------------------------------------------- */
int
altera_avalon_jtag_uart_read(altera_avalon_jtag_uart_state* sp,
char * buffer, int space, int flags)
{
800b280: defff204 addi sp,sp,-56
800b284: dfc00d15 stw ra,52(sp)
800b288: df000c15 stw fp,48(sp)
800b28c: df000c04 addi fp,sp,48
800b290: e13ffb15 stw r4,-20(fp)
800b294: e17ffc15 stw r5,-16(fp)
800b298: e1bffd15 stw r6,-12(fp)
800b29c: e1fffe15 stw r7,-8(fp)
char * ptr = buffer;
800b2a0: e0bffc17 ldw r2,-16(fp)
800b2a4: e0bffa15 stw r2,-24(fp)
* When running in a multi threaded environment, obtain the "read_lock"
* semaphore. This ensures that reading from the device is thread-safe.
*/
ALT_SEM_PEND (sp->read_lock, 0);
while (space > 0)
800b2a8: 00004806 br 800b3cc <altera_avalon_jtag_uart_read+0x14c>
unsigned int in, out;
/* Read as much data as possible */
do
{
in = sp->rx_in;
800b2ac: e0bffb17 ldw r2,-20(fp)
800b2b0: 10800a17 ldw r2,40(r2)
800b2b4: e0bff715 stw r2,-36(fp)
out = sp->rx_out;
800b2b8: e0bffb17 ldw r2,-20(fp)
800b2bc: 10800b17 ldw r2,44(r2)
800b2c0: e0bff615 stw r2,-40(fp)
if (in >= out)
800b2c4: e0fff717 ldw r3,-36(fp)
800b2c8: e0bff617 ldw r2,-40(fp)
800b2cc: 18800536 bltu r3,r2,800b2e4 <altera_avalon_jtag_uart_read+0x64>
n = in - out;
800b2d0: e0bff717 ldw r2,-36(fp)
800b2d4: e0fff617 ldw r3,-40(fp)
800b2d8: 10c5c83a sub r2,r2,r3
800b2dc: e0bff815 stw r2,-32(fp)
800b2e0: 00000406 br 800b2f4 <altera_avalon_jtag_uart_read+0x74>
else
n = ALTERA_AVALON_JTAG_UART_BUF_LEN - out;
800b2e4: 00820004 movi r2,2048
800b2e8: e0fff617 ldw r3,-40(fp)
800b2ec: 10c5c83a sub r2,r2,r3
800b2f0: e0bff815 stw r2,-32(fp)
if (n == 0)
800b2f4: e0bff817 ldw r2,-32(fp)
800b2f8: 1005003a cmpeq r2,r2,zero
800b2fc: 10001f1e bne r2,zero,800b37c <altera_avalon_jtag_uart_read+0xfc>
break; /* No more data available */
if (n > space)
800b300: e0fffd17 ldw r3,-12(fp)
800b304: e0bff817 ldw r2,-32(fp)
800b308: 1880022e bgeu r3,r2,800b314 <altera_avalon_jtag_uart_read+0x94>
n = space;
800b30c: e0bffd17 ldw r2,-12(fp)
800b310: e0bff815 stw r2,-32(fp)
memcpy(ptr, sp->rx_buf + out, n);
800b314: e0bffb17 ldw r2,-20(fp)
800b318: 10c00e04 addi r3,r2,56
800b31c: e0bff617 ldw r2,-40(fp)
800b320: 1887883a add r3,r3,r2
800b324: e0bffa17 ldw r2,-24(fp)
800b328: 1009883a mov r4,r2
800b32c: 180b883a mov r5,r3
800b330: e1bff817 ldw r6,-32(fp)
800b334: 80057040 call 8005704 <memcpy>
ptr += n;
800b338: e0fff817 ldw r3,-32(fp)
800b33c: e0bffa17 ldw r2,-24(fp)
800b340: 10c5883a add r2,r2,r3
800b344: e0bffa15 stw r2,-24(fp)
space -= n;
800b348: e0fffd17 ldw r3,-12(fp)
800b34c: e0bff817 ldw r2,-32(fp)
800b350: 1885c83a sub r2,r3,r2
800b354: e0bffd15 stw r2,-12(fp)
sp->rx_out = (out + n) % ALTERA_AVALON_JTAG_UART_BUF_LEN;
800b358: e0fff617 ldw r3,-40(fp)
800b35c: e0bff817 ldw r2,-32(fp)
800b360: 1885883a add r2,r3,r2
800b364: 10c1ffcc andi r3,r2,2047
800b368: e0bffb17 ldw r2,-20(fp)
800b36c: 10c00b15 stw r3,44(r2)
}
while (space > 0);
800b370: e0bffd17 ldw r2,-12(fp)
800b374: 10800048 cmpgei r2,r2,1
800b378: 103fcc1e bne r2,zero,800b2ac <altera_avalon_jtag_uart_read+0x2c>
/* If we read any data then return it */
if (ptr != buffer)
800b37c: e0fffa17 ldw r3,-24(fp)
800b380: e0bffc17 ldw r2,-16(fp)
800b384: 1880141e bne r3,r2,800b3d8 <altera_avalon_jtag_uart_read+0x158>
break;
/* If in non-blocking mode then return error */
if (flags & O_NONBLOCK)
800b388: e0bffe17 ldw r2,-8(fp)
800b38c: 1090000c andi r2,r2,16384
800b390: 1004c03a cmpne r2,r2,zero
800b394: 1000101e bne r2,zero,800b3d8 <altera_avalon_jtag_uart_read+0x158>
while (in == sp->rx_in && sp->host_inactive < sp->timeout)
;
}
#else
/* No OS: Always spin */
while (in == sp->rx_in && sp->host_inactive < sp->timeout)
800b398: e0bffb17 ldw r2,-20(fp)
800b39c: 10c00a17 ldw r3,40(r2)
800b3a0: e0bff717 ldw r2,-36(fp)
800b3a4: 1880051e bne r3,r2,800b3bc <altera_avalon_jtag_uart_read+0x13c>
800b3a8: e0bffb17 ldw r2,-20(fp)
800b3ac: 10c00917 ldw r3,36(r2)
800b3b0: e0bffb17 ldw r2,-20(fp)
800b3b4: 10800117 ldw r2,4(r2)
800b3b8: 18bff736 bltu r3,r2,800b398 <altera_avalon_jtag_uart_read+0x118>
;
#endif /* __ucosii__ */
if (in == sp->rx_in)
800b3bc: e0bffb17 ldw r2,-20(fp)
800b3c0: 10c00a17 ldw r3,40(r2)
800b3c4: e0bff717 ldw r2,-36(fp)
800b3c8: 18800326 beq r3,r2,800b3d8 <altera_avalon_jtag_uart_read+0x158>
* When running in a multi threaded environment, obtain the "read_lock"
* semaphore. This ensures that reading from the device is thread-safe.
*/
ALT_SEM_PEND (sp->read_lock, 0);
while (space > 0)
800b3cc: e0bffd17 ldw r2,-12(fp)
800b3d0: 10800048 cmpgei r2,r2,1
800b3d4: 103fb51e bne r2,zero,800b2ac <altera_avalon_jtag_uart_read+0x2c>
* semaphore so that other threads can access the buffer.
*/
ALT_SEM_POST (sp->read_lock);
if (ptr != buffer)
800b3d8: e0fffa17 ldw r3,-24(fp)
800b3dc: e0bffc17 ldw r2,-16(fp)
800b3e0: 18801926 beq r3,r2,800b448 <altera_avalon_jtag_uart_read+0x1c8>
static ALT_INLINE alt_irq_context ALT_ALWAYS_INLINE
alt_irq_disable_all (void)
{
alt_irq_context context;
NIOS2_READ_STATUS (context);
800b3e4: 0005303a rdctl r2,status
800b3e8: e0bff515 stw r2,-44(fp)
NIOS2_WRITE_STATUS (context & ~NIOS2_STATUS_PIE_MSK);
800b3ec: e0fff517 ldw r3,-44(fp)
800b3f0: 00bfff84 movi r2,-2
800b3f4: 1884703a and r2,r3,r2
800b3f8: 1001703a wrctl status,r2
return context;
800b3fc: e0bff517 ldw r2,-44(fp)
{
/* If we read any data then there is space in the buffer so enable interrupts */
context = alt_irq_disable_all();
800b400: e0bff915 stw r2,-28(fp)
sp->irq_enable |= ALTERA_AVALON_JTAG_UART_CONTROL_RE_MSK;
800b404: e0bffb17 ldw r2,-20(fp)
800b408: 10800817 ldw r2,32(r2)
800b40c: 10c00054 ori r3,r2,1
800b410: e0bffb17 ldw r2,-20(fp)
800b414: 10c00815 stw r3,32(r2)
IOWR_ALTERA_AVALON_JTAG_UART_CONTROL(sp->base, sp->irq_enable);
800b418: e0bffb17 ldw r2,-20(fp)
800b41c: 10800017 ldw r2,0(r2)
800b420: 11000104 addi r4,r2,4
800b424: e0bffb17 ldw r2,-20(fp)
800b428: 10800817 ldw r2,32(r2)
800b42c: 1007883a mov r3,r2
800b430: 2005883a mov r2,r4
800b434: 10c00035 stwio r3,0(r2)
800b438: e0bff917 ldw r2,-28(fp)
800b43c: e0bff415 stw r2,-48(fp)
status &= ~NIOS2_STATUS_PIE_MSK;
status |= (context & NIOS2_STATUS_PIE_MSK);
NIOS2_WRITE_STATUS (status);
#else
NIOS2_WRITE_STATUS (context);
800b440: e0bff417 ldw r2,-48(fp)
800b444: 1001703a wrctl status,r2
alt_irq_enable_all(context);
}
if (ptr != buffer)
800b448: e0fffa17 ldw r3,-24(fp)
800b44c: e0bffc17 ldw r2,-16(fp)
800b450: 18800526 beq r3,r2,800b468 <altera_avalon_jtag_uart_read+0x1e8>
return ptr - buffer;
800b454: e0fffa17 ldw r3,-24(fp)
800b458: e0bffc17 ldw r2,-16(fp)
800b45c: 1887c83a sub r3,r3,r2
800b460: e0ffff15 stw r3,-4(fp)
800b464: 00000906 br 800b48c <altera_avalon_jtag_uart_read+0x20c>
else if (flags & O_NONBLOCK)
800b468: e0bffe17 ldw r2,-8(fp)
800b46c: 1090000c andi r2,r2,16384
800b470: 1005003a cmpeq r2,r2,zero
800b474: 1000031e bne r2,zero,800b484 <altera_avalon_jtag_uart_read+0x204>
return -EWOULDBLOCK;
800b478: 00bffd44 movi r2,-11
800b47c: e0bfff15 stw r2,-4(fp)
800b480: 00000206 br 800b48c <altera_avalon_jtag_uart_read+0x20c>
else
return -EIO;
800b484: 00bffec4 movi r2,-5
800b488: e0bfff15 stw r2,-4(fp)
800b48c: e0bfff17 ldw r2,-4(fp)
}
800b490: e037883a mov sp,fp
800b494: dfc00117 ldw ra,4(sp)
800b498: df000017 ldw fp,0(sp)
800b49c: dec00204 addi sp,sp,8
800b4a0: f800283a ret
0800b4a4 <altera_avalon_jtag_uart_write>:
/* ----------------------------------------------------------- */
int
altera_avalon_jtag_uart_write(altera_avalon_jtag_uart_state* sp,
const char * ptr, int count, int flags)
{
800b4a4: defff204 addi sp,sp,-56
800b4a8: dfc00d15 stw ra,52(sp)
800b4ac: df000c15 stw fp,48(sp)
800b4b0: df000c04 addi fp,sp,48
800b4b4: e13ffb15 stw r4,-20(fp)
800b4b8: e17ffc15 stw r5,-16(fp)
800b4bc: e1bffd15 stw r6,-12(fp)
800b4c0: e1fffe15 stw r7,-8(fp)
/* Remove warning at optimisation level 03 by seting out to 0 */
unsigned int in, out=0;
800b4c4: e03ff915 stw zero,-28(fp)
unsigned int n;
alt_irq_context context;
const char * start = ptr;
800b4c8: e0bffc17 ldw r2,-16(fp)
800b4cc: e0bff615 stw r2,-40(fp)
ALT_SEM_PEND (sp->write_lock, 0);
do
{
/* Copy as much as we can into the transmit buffer */
while (count > 0)
800b4d0: 00003a06 br 800b5bc <altera_avalon_jtag_uart_write+0x118>
{
/* We need a stable value of the out pointer to calculate the space available */
in = sp->tx_in;
800b4d4: e0bffb17 ldw r2,-20(fp)
800b4d8: 10800c17 ldw r2,48(r2)
800b4dc: e0bffa15 stw r2,-24(fp)
out = sp->tx_out;
800b4e0: e0bffb17 ldw r2,-20(fp)
800b4e4: 10800d17 ldw r2,52(r2)
800b4e8: e0bff915 stw r2,-28(fp)
if (in < out)
800b4ec: e0fffa17 ldw r3,-24(fp)
800b4f0: e0bff917 ldw r2,-28(fp)
800b4f4: 1880062e bgeu r3,r2,800b510 <altera_avalon_jtag_uart_write+0x6c>
n = out - 1 - in;
800b4f8: e0fff917 ldw r3,-28(fp)
800b4fc: e0bffa17 ldw r2,-24(fp)
800b500: 1885c83a sub r2,r3,r2
800b504: 10bfffc4 addi r2,r2,-1
800b508: e0bff815 stw r2,-32(fp)
800b50c: 00000c06 br 800b540 <altera_avalon_jtag_uart_write+0x9c>
else if (out > 0)
800b510: e0bff917 ldw r2,-28(fp)
800b514: 1005003a cmpeq r2,r2,zero
800b518: 1000051e bne r2,zero,800b530 <altera_avalon_jtag_uart_write+0x8c>
n = ALTERA_AVALON_JTAG_UART_BUF_LEN - in;
800b51c: 00820004 movi r2,2048
800b520: e0fffa17 ldw r3,-24(fp)
800b524: 10c5c83a sub r2,r2,r3
800b528: e0bff815 stw r2,-32(fp)
800b52c: 00000406 br 800b540 <altera_avalon_jtag_uart_write+0x9c>
else
n = ALTERA_AVALON_JTAG_UART_BUF_LEN - 1 - in;
800b530: 0081ffc4 movi r2,2047
800b534: e0fffa17 ldw r3,-24(fp)
800b538: 10c5c83a sub r2,r2,r3
800b53c: e0bff815 stw r2,-32(fp)
if (n == 0)
800b540: e0bff817 ldw r2,-32(fp)
800b544: 1005003a cmpeq r2,r2,zero
800b548: 10001f1e bne r2,zero,800b5c8 <altera_avalon_jtag_uart_write+0x124>
break;
if (n > count)
800b54c: e0fffd17 ldw r3,-12(fp)
800b550: e0bff817 ldw r2,-32(fp)
800b554: 1880022e bgeu r3,r2,800b560 <altera_avalon_jtag_uart_write+0xbc>
n = count;
800b558: e0bffd17 ldw r2,-12(fp)
800b55c: e0bff815 stw r2,-32(fp)
memcpy(sp->tx_buf + in, ptr, n);
800b560: e0bffb17 ldw r2,-20(fp)
800b564: 10c20e04 addi r3,r2,2104
800b568: e0bffa17 ldw r2,-24(fp)
800b56c: 1885883a add r2,r3,r2
800b570: e0fffc17 ldw r3,-16(fp)
800b574: 1009883a mov r4,r2
800b578: 180b883a mov r5,r3
800b57c: e1bff817 ldw r6,-32(fp)
800b580: 80057040 call 8005704 <memcpy>
ptr += n;
800b584: e0fff817 ldw r3,-32(fp)
800b588: e0bffc17 ldw r2,-16(fp)
800b58c: 10c5883a add r2,r2,r3
800b590: e0bffc15 stw r2,-16(fp)
count -= n;
800b594: e0fffd17 ldw r3,-12(fp)
800b598: e0bff817 ldw r2,-32(fp)
800b59c: 1885c83a sub r2,r3,r2
800b5a0: e0bffd15 stw r2,-12(fp)
sp->tx_in = (in + n) % ALTERA_AVALON_JTAG_UART_BUF_LEN;
800b5a4: e0fffa17 ldw r3,-24(fp)
800b5a8: e0bff817 ldw r2,-32(fp)
800b5ac: 1885883a add r2,r3,r2
800b5b0: 10c1ffcc andi r3,r2,2047
800b5b4: e0bffb17 ldw r2,-20(fp)
800b5b8: 10c00c15 stw r3,48(r2)
ALT_SEM_PEND (sp->write_lock, 0);
do
{
/* Copy as much as we can into the transmit buffer */
while (count > 0)
800b5bc: e0bffd17 ldw r2,-12(fp)
800b5c0: 10800048 cmpgei r2,r2,1
800b5c4: 103fc31e bne r2,zero,800b4d4 <altera_avalon_jtag_uart_write+0x30>
static ALT_INLINE alt_irq_context ALT_ALWAYS_INLINE
alt_irq_disable_all (void)
{
alt_irq_context context;
NIOS2_READ_STATUS (context);
800b5c8: 0005303a rdctl r2,status
800b5cc: e0bff515 stw r2,-44(fp)
NIOS2_WRITE_STATUS (context & ~NIOS2_STATUS_PIE_MSK);
800b5d0: e0fff517 ldw r3,-44(fp)
800b5d4: 00bfff84 movi r2,-2
800b5d8: 1884703a and r2,r3,r2
800b5dc: 1001703a wrctl status,r2
return context;
800b5e0: e0bff517 ldw r2,-44(fp)
* to enable interrupts if there is no space left in the FIFO
*
* For now kick the interrupt routine every time to make it transmit
* the data
*/
context = alt_irq_disable_all();
800b5e4: e0bff715 stw r2,-36(fp)
sp->irq_enable |= ALTERA_AVALON_JTAG_UART_CONTROL_WE_MSK;
800b5e8: e0bffb17 ldw r2,-20(fp)
800b5ec: 10800817 ldw r2,32(r2)
800b5f0: 10c00094 ori r3,r2,2
800b5f4: e0bffb17 ldw r2,-20(fp)
800b5f8: 10c00815 stw r3,32(r2)
IOWR_ALTERA_AVALON_JTAG_UART_CONTROL(sp->base, sp->irq_enable);
800b5fc: e0bffb17 ldw r2,-20(fp)
800b600: 10800017 ldw r2,0(r2)
800b604: 11000104 addi r4,r2,4
800b608: e0bffb17 ldw r2,-20(fp)
800b60c: 10800817 ldw r2,32(r2)
800b610: 1007883a mov r3,r2
800b614: 2005883a mov r2,r4
800b618: 10c00035 stwio r3,0(r2)
800b61c: e0bff717 ldw r2,-36(fp)
800b620: e0bff415 stw r2,-48(fp)
status &= ~NIOS2_STATUS_PIE_MSK;
status |= (context & NIOS2_STATUS_PIE_MSK);
NIOS2_WRITE_STATUS (status);
#else
NIOS2_WRITE_STATUS (context);
800b624: e0bff417 ldw r2,-48(fp)
800b628: 1001703a wrctl status,r2
/*
* If there is any data left then either return now or block until
* some has been sent
*/
/* consider: test whether there is anything there while doing this and delay for at most 2s. */
if (count > 0)
800b62c: e0bffd17 ldw r2,-12(fp)
800b630: 10800050 cmplti r2,r2,1
800b634: 1000111e bne r2,zero,800b67c <altera_avalon_jtag_uart_write+0x1d8>
{
if (flags & O_NONBLOCK)
800b638: e0bffe17 ldw r2,-8(fp)
800b63c: 1090000c andi r2,r2,16384
800b640: 1004c03a cmpne r2,r2,zero
800b644: 1000101e bne r2,zero,800b688 <altera_avalon_jtag_uart_write+0x1e4>
/*
* No OS present: Always wait for data to be removed from buffer. Once
* the interrupt routine has removed some data then we will be able to
* insert some more.
*/
while (out == sp->tx_out && sp->host_inactive < sp->timeout)
800b648: e0bffb17 ldw r2,-20(fp)
800b64c: 10c00d17 ldw r3,52(r2)
800b650: e0bff917 ldw r2,-28(fp)
800b654: 1880051e bne r3,r2,800b66c <altera_avalon_jtag_uart_write+0x1c8>
800b658: e0bffb17 ldw r2,-20(fp)
800b65c: 10c00917 ldw r3,36(r2)
800b660: e0bffb17 ldw r2,-20(fp)
800b664: 10800117 ldw r2,4(r2)
800b668: 18bff736 bltu r3,r2,800b648 <altera_avalon_jtag_uart_write+0x1a4>
;
#endif /* __ucosii__ */
if (out == sp->tx_out)
800b66c: e0bffb17 ldw r2,-20(fp)
800b670: 10c00d17 ldw r3,52(r2)
800b674: e0bff917 ldw r2,-28(fp)
800b678: 18800326 beq r3,r2,800b688 <altera_avalon_jtag_uart_write+0x1e4>
break;
}
}
while (count > 0);
800b67c: e0bffd17 ldw r2,-12(fp)
800b680: 10800048 cmpgei r2,r2,1
800b684: 103fcd1e bne r2,zero,800b5bc <altera_avalon_jtag_uart_write+0x118>
* Now that access to the circular buffer is complete, release the write
* semaphore so that other threads can access the buffer.
*/
ALT_SEM_POST (sp->write_lock);
if (ptr != start)
800b688: e0fffc17 ldw r3,-16(fp)
800b68c: e0bff617 ldw r2,-40(fp)
800b690: 18800526 beq r3,r2,800b6a8 <altera_avalon_jtag_uart_write+0x204>
return ptr - start;
800b694: e0fffc17 ldw r3,-16(fp)
800b698: e0bff617 ldw r2,-40(fp)
800b69c: 1887c83a sub r3,r3,r2
800b6a0: e0ffff15 stw r3,-4(fp)
800b6a4: 00000906 br 800b6cc <altera_avalon_jtag_uart_write+0x228>
else if (flags & O_NONBLOCK)
800b6a8: e0bffe17 ldw r2,-8(fp)
800b6ac: 1090000c andi r2,r2,16384
800b6b0: 1005003a cmpeq r2,r2,zero
800b6b4: 1000031e bne r2,zero,800b6c4 <altera_avalon_jtag_uart_write+0x220>
return -EWOULDBLOCK;
800b6b8: 00bffd44 movi r2,-11
800b6bc: e0bfff15 stw r2,-4(fp)
800b6c0: 00000206 br 800b6cc <altera_avalon_jtag_uart_write+0x228>
else
return -EIO; /* Host not connected */
800b6c4: 00bffec4 movi r2,-5
800b6c8: e0bfff15 stw r2,-4(fp)
800b6cc: e0bfff17 ldw r2,-4(fp)
}
800b6d0: e037883a mov sp,fp
800b6d4: dfc00117 ldw ra,4(sp)
800b6d8: df000017 ldw fp,0(sp)
800b6dc: dec00204 addi sp,sp,8
800b6e0: f800283a ret
0800b6e4 <alt_up_char_buffer_init>:
#include <priv/alt_file.h>
#include "altera_up_avalon_video_character_buffer_with_dma.h"
#include "altera_up_avalon_video_character_buffer_with_dma_regs.h"
void alt_up_char_buffer_init(alt_up_char_buffer_dev *char_buffer) {
800b6e4: defffc04 addi sp,sp,-16
800b6e8: dfc00315 stw ra,12(sp)
800b6ec: df000215 stw fp,8(sp)
800b6f0: df000204 addi fp,sp,8
800b6f4: e13fff15 stw r4,-4(fp)
char * name;
name = (char *) char_buffer->dev.name;
800b6f8: e0bfff17 ldw r2,-4(fp)
800b6fc: 10800217 ldw r2,8(r2)
800b700: e0bffe15 stw r2,-8(fp)
for ( ; (*name) != '\0'; name++) {
800b704: 00000c06 br 800b738 <alt_up_char_buffer_init+0x54>
if (strcmp(name, "_avalon_char_buffer_slave") == 0) {
800b708: e13ffe17 ldw r4,-8(fp)
800b70c: 01420074 movhi r5,2049
800b710: 29788804 addi r5,r5,-7648
800b714: 80071c80 call 80071c8 <strcmp>
800b718: 1004c03a cmpne r2,r2,zero
800b71c: 1000031e bne r2,zero,800b72c <alt_up_char_buffer_init+0x48>
(*name) = '\0';
800b720: e0bffe17 ldw r2,-8(fp)
800b724: 10000005 stb zero,0(r2)
break;
800b728: 00000a06 br 800b754 <alt_up_char_buffer_init+0x70>
void alt_up_char_buffer_init(alt_up_char_buffer_dev *char_buffer) {
char * name;
name = (char *) char_buffer->dev.name;
for ( ; (*name) != '\0'; name++) {
800b72c: e0bffe17 ldw r2,-8(fp)
800b730: 10800044 addi r2,r2,1
800b734: e0bffe15 stw r2,-8(fp)
800b738: e0bffe17 ldw r2,-8(fp)
800b73c: 10800003 ldbu r2,0(r2)
800b740: 10803fcc andi r2,r2,255
800b744: 1080201c xori r2,r2,128
800b748: 10bfe004 addi r2,r2,-128
800b74c: 1004c03a cmpne r2,r2,zero
800b750: 103fed1e bne r2,zero,800b708 <alt_up_char_buffer_init+0x24>
break;
}
}
return;
}
800b754: e037883a mov sp,fp
800b758: dfc00117 ldw ra,4(sp)
800b75c: df000017 ldw fp,0(sp)
800b760: dec00204 addi sp,sp,8
800b764: f800283a ret
0800b768 <alt_up_char_buffer_open_dev>:
alt_up_char_buffer_dev* alt_up_char_buffer_open_dev(const char* name) {
800b768: defffc04 addi sp,sp,-16
800b76c: dfc00315 stw ra,12(sp)
800b770: df000215 stw fp,8(sp)
800b774: df000204 addi fp,sp,8
800b778: e13fff15 stw r4,-4(fp)
// find the device from the device list
// (see altera_hal/HAL/inc/priv/alt_file.h
// and altera_hal/HAL/src/alt_find_dev.c
// for details)
alt_up_char_buffer_dev *dev = (alt_up_char_buffer_dev *)alt_find_dev(name, &alt_dev_list);
800b77c: e13fff17 ldw r4,-4(fp)
800b780: 01420074 movhi r5,2049
800b784: 297f5004 addi r5,r5,-704
800b788: 800d2d40 call 800d2d4 <alt_find_dev>
800b78c: e0bffe15 stw r2,-8(fp)
return dev;
800b790: e0bffe17 ldw r2,-8(fp)
}
800b794: e037883a mov sp,fp
800b798: dfc00117 ldw ra,4(sp)
800b79c: df000017 ldw fp,0(sp)
800b7a0: dec00204 addi sp,sp,8
800b7a4: f800283a ret
0800b7a8 <alt_up_char_buffer_draw>:
int alt_up_char_buffer_draw(alt_up_char_buffer_dev *char_buffer, unsigned char ch,
unsigned int x, unsigned int y) {
800b7a8: defff904 addi sp,sp,-28
800b7ac: df000615 stw fp,24(sp)
800b7b0: df000604 addi fp,sp,24
800b7b4: e13ffb15 stw r4,-20(fp)
800b7b8: e1bffd15 stw r6,-12(fp)
800b7bc: e1fffe15 stw r7,-8(fp)
800b7c0: e17ffc05 stb r5,-16(fp)
// boundary check
if (x >= char_buffer->x_resolution || y >= char_buffer->y_resolution )
800b7c4: e0bffb17 ldw r2,-20(fp)
800b7c8: 10c00c17 ldw r3,48(r2)
800b7cc: e0bffd17 ldw r2,-12(fp)
800b7d0: 10c0042e bgeu r2,r3,800b7e4 <alt_up_char_buffer_draw+0x3c>
800b7d4: e0bffb17 ldw r2,-20(fp)
800b7d8: 10c00d17 ldw r3,52(r2)
800b7dc: e0bffe17 ldw r2,-8(fp)
800b7e0: 10c00336 bltu r2,r3,800b7f0 <alt_up_char_buffer_draw+0x48>
return -1;
800b7e4: 00bfffc4 movi r2,-1
800b7e8: e0bfff15 stw r2,-4(fp)
800b7ec: 00001d06 br 800b864 <alt_up_char_buffer_draw+0xbc>
unsigned int addr = 0;
800b7f0: e03ffa15 stw zero,-24(fp)
addr |= ((x & char_buffer->x_coord_mask) << char_buffer->x_coord_offset);
800b7f4: e0bffb17 ldw r2,-20(fp)
800b7f8: 10c00f17 ldw r3,60(r2)
800b7fc: e0bffd17 ldw r2,-12(fp)
800b800: 1886703a and r3,r3,r2
800b804: e0bffb17 ldw r2,-20(fp)
800b808: 10800e17 ldw r2,56(r2)
800b80c: 1886983a sll r3,r3,r2
800b810: e0bffa17 ldw r2,-24(fp)
800b814: 10c4b03a or r2,r2,r3
800b818: e0bffa15 stw r2,-24(fp)
addr |= ((y & char_buffer->y_coord_mask) << char_buffer->y_coord_offset);
800b81c: e0bffb17 ldw r2,-20(fp)
800b820: 10c01117 ldw r3,68(r2)
800b824: e0bffe17 ldw r2,-8(fp)
800b828: 1886703a and r3,r3,r2
800b82c: e0bffb17 ldw r2,-20(fp)
800b830: 10801017 ldw r2,64(r2)
800b834: 1886983a sll r3,r3,r2
800b838: e0bffa17 ldw r2,-24(fp)
800b83c: 10c4b03a or r2,r2,r3
800b840: e0bffa15 stw r2,-24(fp)
IOWR_8DIRECT(char_buffer->buffer_base, addr, ch);
800b844: e0bffb17 ldw r2,-20(fp)
800b848: 10800b17 ldw r2,44(r2)
800b84c: 1007883a mov r3,r2
800b850: e0bffa17 ldw r2,-24(fp)
800b854: 1885883a add r2,r3,r2
800b858: e0fffc03 ldbu r3,-16(fp)
800b85c: 10c00025 stbio r3,0(r2)
return 0;
800b860: e03fff15 stw zero,-4(fp)
800b864: e0bfff17 ldw r2,-4(fp)
}
800b868: e037883a mov sp,fp
800b86c: df000017 ldw fp,0(sp)
800b870: dec00104 addi sp,sp,4
800b874: f800283a ret
0800b878 <alt_up_char_buffer_string>:
int alt_up_char_buffer_string(alt_up_char_buffer_dev *char_buffer, const char *ptr,
unsigned int x, unsigned int y) {
800b878: defff904 addi sp,sp,-28
800b87c: df000615 stw fp,24(sp)
800b880: df000604 addi fp,sp,24
800b884: e13ffb15 stw r4,-20(fp)
800b888: e17ffc15 stw r5,-16(fp)
800b88c: e1bffd15 stw r6,-12(fp)
800b890: e1fffe15 stw r7,-8(fp)
// boundary check
if (x >= char_buffer->x_resolution || y >= char_buffer->y_resolution )
800b894: e0bffb17 ldw r2,-20(fp)
800b898: 10c00c17 ldw r3,48(r2)
800b89c: e0bffd17 ldw r2,-12(fp)
800b8a0: 10c0042e bgeu r2,r3,800b8b4 <alt_up_char_buffer_string+0x3c>
800b8a4: e0bffb17 ldw r2,-20(fp)
800b8a8: 10c00d17 ldw r3,52(r2)
800b8ac: e0bffe17 ldw r2,-8(fp)
800b8b0: 10c00336 bltu r2,r3,800b8c0 <alt_up_char_buffer_string+0x48>
return -1;
800b8b4: 00bfffc4 movi r2,-1
800b8b8: e0bfff15 stw r2,-4(fp)
800b8bc: 00002e06 br 800b978 <alt_up_char_buffer_string+0x100>
unsigned int offset = 0;
800b8c0: e03ffa15 stw zero,-24(fp)
offset = (y << char_buffer->y_coord_offset) + x;
800b8c4: e0bffb17 ldw r2,-20(fp)
800b8c8: 10801017 ldw r2,64(r2)
800b8cc: 1007883a mov r3,r2
800b8d0: e0bffe17 ldw r2,-8(fp)
800b8d4: 10c6983a sll r3,r2,r3
800b8d8: e0bffd17 ldw r2,-12(fp)
800b8dc: 1885883a add r2,r3,r2
800b8e0: e0bffa15 stw r2,-24(fp)
while ( *ptr )
800b8e4: 00001c06 br 800b958 <alt_up_char_buffer_string+0xe0>
{
IOWR_8DIRECT(char_buffer->buffer_base, offset, *ptr);
800b8e8: e0bffb17 ldw r2,-20(fp)
800b8ec: 10800b17 ldw r2,44(r2)
800b8f0: 1007883a mov r3,r2
800b8f4: e0bffa17 ldw r2,-24(fp)
800b8f8: 1889883a add r4,r3,r2
800b8fc: e0bffc17 ldw r2,-16(fp)
800b900: 10800003 ldbu r2,0(r2)
800b904: 10c03fcc andi r3,r2,255
800b908: 18c0201c xori r3,r3,128
800b90c: 18ffe004 addi r3,r3,-128
800b910: 2005883a mov r2,r4
800b914: 10c00025 stbio r3,0(r2)
++ptr;
800b918: e0bffc17 ldw r2,-16(fp)
800b91c: 10800044 addi r2,r2,1
800b920: e0bffc15 stw r2,-16(fp)
if (++x >= char_buffer->x_resolution)
800b924: e0bffd17 ldw r2,-12(fp)
800b928: 10800044 addi r2,r2,1
800b92c: e0bffd15 stw r2,-12(fp)
800b930: e0bffb17 ldw r2,-20(fp)
800b934: 10c00c17 ldw r3,48(r2)
800b938: e0bffd17 ldw r2,-12(fp)
800b93c: 10c00336 bltu r2,r3,800b94c <alt_up_char_buffer_string+0xd4>
return -1;
800b940: 00bfffc4 movi r2,-1
800b944: e0bfff15 stw r2,-4(fp)
800b948: 00000b06 br 800b978 <alt_up_char_buffer_string+0x100>
++offset;
800b94c: e0bffa17 ldw r2,-24(fp)
800b950: 10800044 addi r2,r2,1
800b954: e0bffa15 stw r2,-24(fp)
return -1;
unsigned int offset = 0;
offset = (y << char_buffer->y_coord_offset) + x;
while ( *ptr )
800b958: e0bffc17 ldw r2,-16(fp)
800b95c: 10800003 ldbu r2,0(r2)
800b960: 10803fcc andi r2,r2,255
800b964: 1080201c xori r2,r2,128
800b968: 10bfe004 addi r2,r2,-128
800b96c: 1004c03a cmpne r2,r2,zero
800b970: 103fdd1e bne r2,zero,800b8e8 <alt_up_char_buffer_string+0x70>
++ptr;
if (++x >= char_buffer->x_resolution)
return -1;
++offset;
}
return 0;
800b974: e03fff15 stw zero,-4(fp)
800b978: e0bfff17 ldw r2,-4(fp)
}
800b97c: e037883a mov sp,fp
800b980: df000017 ldw fp,0(sp)
800b984: dec00104 addi sp,sp,4
800b988: f800283a ret
0800b98c <alt_up_char_buffer_clear>:
int alt_up_char_buffer_clear(alt_up_char_buffer_dev *char_buffer) {
800b98c: defffe04 addi sp,sp,-8
800b990: df000115 stw fp,4(sp)
800b994: df000104 addi fp,sp,4
800b998: e13fff15 stw r4,-4(fp)
IOWR_ALT_UP_CHAR_BUFFER_CLR_SCRN(char_buffer->ctrl_reg_base, 1);
800b99c: e0bfff17 ldw r2,-4(fp)
800b9a0: 10800a17 ldw r2,40(r2)
800b9a4: 10800084 addi r2,r2,2
800b9a8: 1007883a mov r3,r2
800b9ac: 00800044 movi r2,1
800b9b0: 18800025 stbio r2,0(r3)
while ((IORD_ALT_UP_CHAR_BUFFER_CLR_SCRN(char_buffer->ctrl_reg_base) & ALT_UP_CHAR_BUFFER_CLR_SCRN_MSK) >> ALT_UP_CHAR_BUFFER_CLR_SCRN_OFST);
800b9b4: e0bfff17 ldw r2,-4(fp)
800b9b8: 10800a17 ldw r2,40(r2)
800b9bc: 10800084 addi r2,r2,2
800b9c0: 10800023 ldbuio r2,0(r2)
800b9c4: 1080004c andi r2,r2,1
800b9c8: 10803fcc andi r2,r2,255
800b9cc: 1004c03a cmpne r2,r2,zero
800b9d0: 103ff81e bne r2,zero,800b9b4 <alt_up_char_buffer_clear+0x28>
return 0;
800b9d4: 0005883a mov r2,zero
}
800b9d8: e037883a mov sp,fp
800b9dc: df000017 ldw fp,0(sp)
800b9e0: dec00104 addi sp,sp,4
800b9e4: f800283a ret
0800b9e8 <alt_up_pixel_buffer_dma_open_dev>:
#include "altera_up_avalon_video_pixel_buffer_dma.h"
#define ABS(x) ((x >= 0) ? (x) : (-(x)))
alt_up_pixel_buffer_dma_dev* alt_up_pixel_buffer_dma_open_dev(const char* name) {
800b9e8: defffc04 addi sp,sp,-16
800b9ec: dfc00315 stw ra,12(sp)
800b9f0: df000215 stw fp,8(sp)
800b9f4: df000204 addi fp,sp,8
800b9f8: e13fff15 stw r4,-4(fp)
// find the device from the device list
// (see altera_hal/HAL/inc/priv/alt_file.h
// and altera_hal/HAL/src/alt_find_dev.c
// for details)
alt_up_pixel_buffer_dma_dev *dev = (alt_up_pixel_buffer_dma_dev*)alt_find_dev(name, &alt_dev_list);
800b9fc: e13fff17 ldw r4,-4(fp)
800ba00: 01420074 movhi r5,2049
800ba04: 297f5004 addi r5,r5,-704
800ba08: 800d2d40 call 800d2d4 <alt_find_dev>
800ba0c: e0bffe15 stw r2,-8(fp)
return dev;
800ba10: e0bffe17 ldw r2,-8(fp)
}
800ba14: e037883a mov sp,fp
800ba18: dfc00117 ldw ra,4(sp)
800ba1c: df000017 ldw fp,0(sp)
800ba20: dec00204 addi sp,sp,8
800ba24: f800283a ret
0800ba28 <alt_up_pixel_buffer_dma_draw>:
int alt_up_pixel_buffer_dma_draw(alt_up_pixel_buffer_dma_dev *pixel_buffer, unsigned int color, unsigned int x, unsigned int y)
/* This function draws a pixel to the back buffer.
*/
{
800ba28: defff804 addi sp,sp,-32
800ba2c: dfc00715 stw ra,28(sp)
800ba30: df000615 stw fp,24(sp)
800ba34: df000604 addi fp,sp,24
800ba38: e13ffb15 stw r4,-20(fp)
800ba3c: e17ffc15 stw r5,-16(fp)
800ba40: e1bffd15 stw r6,-12(fp)
800ba44: e1fffe15 stw r7,-8(fp)
// boundary check
if (x >= pixel_buffer->x_resolution || y >= pixel_buffer->y_resolution )
800ba48: e0bffb17 ldw r2,-20(fp)
800ba4c: 10c00f17 ldw r3,60(r2)
800ba50: e0bffd17 ldw r2,-12(fp)
800ba54: 10c0042e bgeu r2,r3,800ba68 <alt_up_pixel_buffer_dma_draw+0x40>
800ba58: e0bffb17 ldw r2,-20(fp)
800ba5c: 10c01017 ldw r3,64(r2)
800ba60: e0bffe17 ldw r2,-8(fp)
800ba64: 10c00336 bltu r2,r3,800ba74 <alt_up_pixel_buffer_dma_draw+0x4c>
return -1;
800ba68: 00bfffc4 movi r2,-1
800ba6c: e0bfff15 stw r2,-4(fp)
800ba70: 00005206 br 800bbbc <alt_up_pixel_buffer_dma_draw+0x194>
unsigned int addr = 0;
800ba74: e03ffa15 stw zero,-24(fp)
/* Check the mode VGA Pixel Buffer is using. */
if (pixel_buffer->addressing_mode == ALT_UP_PIXEL_BUFFER_XY_ADDRESS_MODE) {
800ba78: e0bffb17 ldw r2,-20(fp)
800ba7c: 10800d17 ldw r2,52(r2)
800ba80: 1004c03a cmpne r2,r2,zero
800ba84: 1000151e bne r2,zero,800badc <alt_up_pixel_buffer_dma_draw+0xb4>
/* For X-Y addressing mode, the address format is | unused | Y | X |. So shift bits for coordinates X and Y into their respective locations. */
addr |= ((x & pixel_buffer->x_coord_mask) << pixel_buffer->x_coord_offset);
800ba88: e0bffb17 ldw r2,-20(fp)
800ba8c: 10c01217 ldw r3,72(r2)
800ba90: e0bffd17 ldw r2,-12(fp)
800ba94: 1886703a and r3,r3,r2
800ba98: e0bffb17 ldw r2,-20(fp)
800ba9c: 10801117 ldw r2,68(r2)
800baa0: 1886983a sll r3,r3,r2
800baa4: e0bffa17 ldw r2,-24(fp)
800baa8: 10c4b03a or r2,r2,r3
800baac: e0bffa15 stw r2,-24(fp)
addr |= ((y & pixel_buffer->y_coord_mask) << pixel_buffer->y_coord_offset);
800bab0: e0bffb17 ldw r2,-20(fp)
800bab4: 10c01417 ldw r3,80(r2)
800bab8: e0bffe17 ldw r2,-8(fp)
800babc: 1886703a and r3,r3,r2
800bac0: e0bffb17 ldw r2,-20(fp)
800bac4: 10801317 ldw r2,76(r2)
800bac8: 1886983a sll r3,r3,r2
800bacc: e0bffa17 ldw r2,-24(fp)
800bad0: 10c4b03a or r2,r2,r3
800bad4: e0bffa15 stw r2,-24(fp)
800bad8: 00001806 br 800bb3c <alt_up_pixel_buffer_dma_draw+0x114>
} else {
/* In a consecutive addressing mode, the pixels are stored in consecutive memory locations. So the address of a pixel at (x,y) can be computed as
* (y*x_resolution + x).*/
addr += ((x & pixel_buffer->x_coord_mask) << pixel_buffer->x_coord_offset);
800badc: e0bffb17 ldw r2,-20(fp)
800bae0: 10c01217 ldw r3,72(r2)
800bae4: e0bffd17 ldw r2,-12(fp)
800bae8: 1886703a and r3,r3,r2
800baec: e0bffb17 ldw r2,-20(fp)
800baf0: 10801117 ldw r2,68(r2)
800baf4: 1886983a sll r3,r3,r2
800baf8: e0bffa17 ldw r2,-24(fp)
800bafc: 10c5883a add r2,r2,r3
800bb00: e0bffa15 stw r2,-24(fp)
addr += (((y & pixel_buffer->y_coord_mask) * pixel_buffer->x_resolution) << pixel_buffer->x_coord_offset);
800bb04: e0bffb17 ldw r2,-20(fp)
800bb08: 10c01417 ldw r3,80(r2)
800bb0c: e0bffe17 ldw r2,-8(fp)
800bb10: 1888703a and r4,r3,r2
800bb14: e0bffb17 ldw r2,-20(fp)
800bb18: 11400f17 ldw r5,60(r2)
800bb1c: 80096e40 call 80096e4 <__mulsi3>
800bb20: 1007883a mov r3,r2
800bb24: e0bffb17 ldw r2,-20(fp)
800bb28: 10801117 ldw r2,68(r2)
800bb2c: 1886983a sll r3,r3,r2
800bb30: e0bffa17 ldw r2,-24(fp)
800bb34: 10c5883a add r2,r2,r3
800bb38: e0bffa15 stw r2,-24(fp)
}
/* Now, depending on the color depth, write the pixel color to the specified memory location. */
if (pixel_buffer->color_mode == ALT_UP_8BIT_COLOR_MODE) {
800bb3c: e0bffb17 ldw r2,-20(fp)
800bb40: 10800e17 ldw r2,56(r2)
800bb44: 10800058 cmpnei r2,r2,1
800bb48: 1000081e bne r2,zero,800bb6c <alt_up_pixel_buffer_dma_draw+0x144>
IOWR_8DIRECT(pixel_buffer->back_buffer_start_address, addr, color);
800bb4c: e0bffb17 ldw r2,-20(fp)
800bb50: 10800c17 ldw r2,48(r2)
800bb54: 1007883a mov r3,r2
800bb58: e0bffa17 ldw r2,-24(fp)
800bb5c: 1885883a add r2,r3,r2
800bb60: e0fffc17 ldw r3,-16(fp)
800bb64: 10c00025 stbio r3,0(r2)
800bb68: 00001306 br 800bbb8 <alt_up_pixel_buffer_dma_draw+0x190>
} else if (pixel_buffer->color_mode == ALT_UP_16BIT_COLOR_MODE) {
800bb6c: e0bffb17 ldw r2,-20(fp)
800bb70: 10800e17 ldw r2,56(r2)
800bb74: 10800098 cmpnei r2,r2,2
800bb78: 1000081e bne r2,zero,800bb9c <alt_up_pixel_buffer_dma_draw+0x174>
IOWR_16DIRECT(pixel_buffer->back_buffer_start_address, addr, color);
800bb7c: e0bffb17 ldw r2,-20(fp)
800bb80: 10800c17 ldw r2,48(r2)
800bb84: 1007883a mov r3,r2
800bb88: e0bffa17 ldw r2,-24(fp)
800bb8c: 1885883a add r2,r3,r2
800bb90: e0fffc17 ldw r3,-16(fp)
800bb94: 10c0002d sthio r3,0(r2)
800bb98: 00000706 br 800bbb8 <alt_up_pixel_buffer_dma_draw+0x190>
} else {
IOWR_32DIRECT(pixel_buffer->back_buffer_start_address, addr, color);
800bb9c: e0bffb17 ldw r2,-20(fp)
800bba0: 10800c17 ldw r2,48(r2)
800bba4: 1007883a mov r3,r2
800bba8: e0bffa17 ldw r2,-24(fp)
800bbac: 1885883a add r2,r3,r2
800bbb0: e0fffc17 ldw r3,-16(fp)
800bbb4: 10c00035 stwio r3,0(r2)
}
return 0;
800bbb8: e03fff15 stw zero,-4(fp)
800bbbc: e0bfff17 ldw r2,-4(fp)
}
800bbc0: e037883a mov sp,fp
800bbc4: dfc00117 ldw ra,4(sp)
800bbc8: df000017 ldw fp,0(sp)
800bbcc: dec00204 addi sp,sp,8
800bbd0: f800283a ret
0800bbd4 <alt_up_pixel_buffer_dma_change_back_buffer_address>:
int alt_up_pixel_buffer_dma_change_back_buffer_address(alt_up_pixel_buffer_dma_dev *pixel_buffer, unsigned int new_address)
/* This function changes the memory address for the back buffer. */
{
800bbd4: defffd04 addi sp,sp,-12
800bbd8: df000215 stw fp,8(sp)
800bbdc: df000204 addi fp,sp,8
800bbe0: e13ffe15 stw r4,-8(fp)
800bbe4: e17fff15 stw r5,-4(fp)
IOWR_32DIRECT(pixel_buffer->base, 4, new_address);
800bbe8: e0bffe17 ldw r2,-8(fp)
800bbec: 10800a17 ldw r2,40(r2)
800bbf0: 10800104 addi r2,r2,4
800bbf4: e0ffff17 ldw r3,-4(fp)
800bbf8: 10c00035 stwio r3,0(r2)
pixel_buffer->back_buffer_start_address = IORD_32DIRECT(pixel_buffer->base, 4);
800bbfc: e0bffe17 ldw r2,-8(fp)
800bc00: 10800a17 ldw r2,40(r2)
800bc04: 10800104 addi r2,r2,4
800bc08: 10800037 ldwio r2,0(r2)
800bc0c: 1007883a mov r3,r2
800bc10: e0bffe17 ldw r2,-8(fp)
800bc14: 10c00c15 stw r3,48(r2)
return 0;
800bc18: 0005883a mov r2,zero
}
800bc1c: e037883a mov sp,fp
800bc20: df000017 ldw fp,0(sp)
800bc24: dec00104 addi sp,sp,4
800bc28: f800283a ret
0800bc2c <alt_up_pixel_buffer_dma_swap_buffers>:
int alt_up_pixel_buffer_dma_swap_buffers(alt_up_pixel_buffer_dma_dev *pixel_buffer)
/* This function swaps the front and back buffers. At the next refresh cycle the back buffer will be drawn on the screen
* and will become the front buffer. */
{
800bc2c: defffe04 addi sp,sp,-8
800bc30: df000115 stw fp,4(sp)
800bc34: df000104 addi fp,sp,4
800bc38: e13fff15 stw r4,-4(fp)
register unsigned int temp = pixel_buffer->back_buffer_start_address;
800bc3c: e0bfff17 ldw r2,-4(fp)
800bc40: 11000c17 ldw r4,48(r2)
IOWR_32DIRECT(pixel_buffer->base, 0, 1);
800bc44: e0bfff17 ldw r2,-4(fp)
800bc48: 10800a17 ldw r2,40(r2)
800bc4c: 1007883a mov r3,r2
800bc50: 00800044 movi r2,1
800bc54: 18800035 stwio r2,0(r3)
pixel_buffer->back_buffer_start_address = pixel_buffer->buffer_start_address;
800bc58: e0bfff17 ldw r2,-4(fp)
800bc5c: 10c00b17 ldw r3,44(r2)
800bc60: e0bfff17 ldw r2,-4(fp)
800bc64: 10c00c15 stw r3,48(r2)
pixel_buffer->buffer_start_address = temp;
800bc68: e0bfff17 ldw r2,-4(fp)
800bc6c: 11000b15 stw r4,44(r2)
return 0;
800bc70: 0005883a mov r2,zero
}
800bc74: e037883a mov sp,fp
800bc78: df000017 ldw fp,0(sp)
800bc7c: dec00104 addi sp,sp,4
800bc80: f800283a ret
0800bc84 <alt_up_pixel_buffer_dma_check_swap_buffers_status>:
int alt_up_pixel_buffer_dma_check_swap_buffers_status(alt_up_pixel_buffer_dma_dev *pixel_buffer)
/* This function checks if the buffer swap has occured. Since the buffer swap only happens after an entire screen is drawn,
* it is important to wait for this function to return 0 before proceeding to draw on either buffer. When both front and the back buffers
* have the same address calling the alt_up_pixel_buffer_dma_swap_buffers(...) function and then waiting for this function to return 0, causes your program to
* wait for the screen to refresh. */
{
800bc84: defffe04 addi sp,sp,-8
800bc88: df000115 stw fp,4(sp)
800bc8c: df000104 addi fp,sp,4
800bc90: e13fff15 stw r4,-4(fp)
return (IORD_32DIRECT(pixel_buffer->base, 12) & 0x1);
800bc94: e0bfff17 ldw r2,-4(fp)
800bc98: 10800a17 ldw r2,40(r2)
800bc9c: 10800304 addi r2,r2,12
800bca0: 10800037 ldwio r2,0(r2)
800bca4: 1080004c andi r2,r2,1
}
800bca8: e037883a mov sp,fp
800bcac: df000017 ldw fp,0(sp)
800bcb0: dec00104 addi sp,sp,4
800bcb4: f800283a ret
0800bcb8 <alt_up_pixel_buffer_dma_clear_screen>:
void alt_up_pixel_buffer_dma_clear_screen(alt_up_pixel_buffer_dma_dev *pixel_buffer, int backbuffer)
/* This function clears the screen by setting each pixel to a black color. */
{
800bcb8: defff504 addi sp,sp,-44
800bcbc: dfc00a15 stw ra,40(sp)
800bcc0: df000915 stw fp,36(sp)
800bcc4: df000904 addi fp,sp,36
800bcc8: e13ff715 stw r4,-36(fp)
800bccc: e17ff815 stw r5,-32(fp)
register unsigned int addr;
register unsigned int limit_x, limit_y;
/* Set up the address to start clearing from and the screen boundaries. */
if (backbuffer == 1)
800bcd0: e0bff817 ldw r2,-32(fp)
800bcd4: 10800058 cmpnei r2,r2,1
800bcd8: 1000041e bne r2,zero,800bcec <alt_up_pixel_buffer_dma_clear_screen+0x34>
addr = pixel_buffer->back_buffer_start_address;
800bcdc: e0bff717 ldw r2,-36(fp)
800bce0: 10800c17 ldw r2,48(r2)
800bce4: e0bfff15 stw r2,-4(fp)
800bce8: 00000306 br 800bcf8 <alt_up_pixel_buffer_dma_clear_screen+0x40>
else
addr = pixel_buffer->buffer_start_address;
800bcec: e0bff717 ldw r2,-36(fp)
800bcf0: 10800b17 ldw r2,44(r2)
800bcf4: e0bfff15 stw r2,-4(fp)
limit_x = pixel_buffer->x_resolution;
800bcf8: e0bff717 ldw r2,-36(fp)
800bcfc: 10800f17 ldw r2,60(r2)
800bd00: e0bffe15 stw r2,-8(fp)
/* In 16 and 32-bit color modes we use twice or four times more memory for the display buffer.*/
if (pixel_buffer->color_mode == ALT_UP_16BIT_COLOR_MODE) {
800bd04: e0bff717 ldw r2,-36(fp)
800bd08: 10800e17 ldw r2,56(r2)
800bd0c: 10800098 cmpnei r2,r2,2
800bd10: 1000051e bne r2,zero,800bd28 <alt_up_pixel_buffer_dma_clear_screen+0x70>
limit_x = limit_x << 1;
800bd14: e0fffe17 ldw r3,-8(fp)
800bd18: e0fffe17 ldw r3,-8(fp)
800bd1c: 18c5883a add r2,r3,r3
800bd20: e0bffe15 stw r2,-8(fp)
800bd24: 00000506 br 800bd3c <alt_up_pixel_buffer_dma_clear_screen+0x84>
} else {
limit_x = limit_x << 2;
800bd28: e13ffe17 ldw r4,-8(fp)
800bd2c: e13ffe17 ldw r4,-8(fp)
800bd30: 2105883a add r2,r4,r4
800bd34: 1085883a add r2,r2,r2
800bd38: e0bffe15 stw r2,-8(fp)
}
limit_y = pixel_buffer->y_resolution;
800bd3c: e0bff717 ldw r2,-36(fp)
800bd40: 10801017 ldw r2,64(r2)
800bd44: e0bffd15 stw r2,-12(fp)
if (pixel_buffer->addressing_mode == ALT_UP_PIXEL_BUFFER_XY_ADDRESS_MODE) {
800bd48: e0bff717 ldw r2,-36(fp)
800bd4c: 10800d17 ldw r2,52(r2)
800bd50: 1004c03a cmpne r2,r2,zero
800bd54: 10001e1e bne r2,zero,800bdd0 <alt_up_pixel_buffer_dma_clear_screen+0x118>
/* Clear the screen when the VGA is set up in an XY addressing mode. */
register unsigned int x,y;
register unsigned int offset_y;
offset_y = pixel_buffer->y_coord_offset;
800bd58: e0bff717 ldw r2,-36(fp)
800bd5c: 10801317 ldw r2,76(r2)
800bd60: e0bffa15 stw r2,-24(fp)
for (y = 0; y < limit_y; y++)
800bd64: e03ffb15 stw zero,-20(fp)
800bd68: 00001506 br 800bdc0 <alt_up_pixel_buffer_dma_clear_screen+0x108>
{
for (x = 0; x < limit_x; x = x + 4)
800bd6c: e03ffc15 stw zero,-16(fp)
800bd70: 00000706 br 800bd90 <alt_up_pixel_buffer_dma_clear_screen+0xd8>
{
IOWR_32DIRECT(addr, x, 0);
800bd74: e0ffff17 ldw r3,-4(fp)
800bd78: e0bffc17 ldw r2,-16(fp)
800bd7c: 1885883a add r2,r3,r2
800bd80: 10000035 stwio zero,0(r2)
register unsigned int offset_y;
offset_y = pixel_buffer->y_coord_offset;
for (y = 0; y < limit_y; y++)
{
for (x = 0; x < limit_x; x = x + 4)
800bd84: e0bffc17 ldw r2,-16(fp)
800bd88: 10800104 addi r2,r2,4
800bd8c: e0bffc15 stw r2,-16(fp)
800bd90: e0fffc17 ldw r3,-16(fp)
800bd94: e13ffe17 ldw r4,-8(fp)
800bd98: 193ff636 bltu r3,r4,800bd74 <alt_up_pixel_buffer_dma_clear_screen+0xbc>
{
IOWR_32DIRECT(addr, x, 0);
}
addr = addr + (1 << offset_y);
800bd9c: e0fffa17 ldw r3,-24(fp)
800bda0: 00800044 movi r2,1
800bda4: 10c4983a sll r2,r2,r3
800bda8: e0ffff17 ldw r3,-4(fp)
800bdac: 1887883a add r3,r3,r2
800bdb0: e0ffff15 stw r3,-4(fp)
/* Clear the screen when the VGA is set up in an XY addressing mode. */
register unsigned int x,y;
register unsigned int offset_y;
offset_y = pixel_buffer->y_coord_offset;
for (y = 0; y < limit_y; y++)
800bdb4: e13ffb17 ldw r4,-20(fp)
800bdb8: 21000044 addi r4,r4,1
800bdbc: e13ffb15 stw r4,-20(fp)
800bdc0: e0bffb17 ldw r2,-20(fp)
800bdc4: e0fffd17 ldw r3,-12(fp)
800bdc8: 10ffe836 bltu r2,r3,800bd6c <alt_up_pixel_buffer_dma_clear_screen+0xb4>
800bdcc: 00001006 br 800be10 <alt_up_pixel_buffer_dma_clear_screen+0x158>
addr = addr + (1 << offset_y);
}
} else {
/* Clear the screen when the VGA is set up in a linear addressing mode. */
register int x;
limit_y = limit_x*limit_y;
800bdd0: e13ffd17 ldw r4,-12(fp)
800bdd4: e17ffe17 ldw r5,-8(fp)
800bdd8: 80096e40 call 80096e4 <__mulsi3>
800bddc: e0bffd15 stw r2,-12(fp)
for (x = 0; x < limit_y; x = x + 4)
800bde0: e03ff915 stw zero,-28(fp)
800bde4: 00000706 br 800be04 <alt_up_pixel_buffer_dma_clear_screen+0x14c>
{
IOWR_32DIRECT(addr, x, 0);
800bde8: e0ffff17 ldw r3,-4(fp)
800bdec: e0bff917 ldw r2,-28(fp)
800bdf0: 1885883a add r2,r3,r2
800bdf4: 10000035 stwio zero,0(r2)
} else {
/* Clear the screen when the VGA is set up in a linear addressing mode. */
register int x;
limit_y = limit_x*limit_y;
for (x = 0; x < limit_y; x = x + 4)
800bdf8: e13ff917 ldw r4,-28(fp)
800bdfc: 21000104 addi r4,r4,4
800be00: e13ff915 stw r4,-28(fp)
800be04: e0bff917 ldw r2,-28(fp)
800be08: e0fffd17 ldw r3,-12(fp)
800be0c: 10fff636 bltu r2,r3,800bde8 <alt_up_pixel_buffer_dma_clear_screen+0x130>
{
IOWR_32DIRECT(addr, x, 0);
}
}
}
800be10: e037883a mov sp,fp
800be14: dfc00117 ldw ra,4(sp)
800be18: df000017 ldw fp,0(sp)
800be1c: dec00204 addi sp,sp,8
800be20: f800283a ret
0800be24 <alt_up_pixel_buffer_dma_draw_box>:
void alt_up_pixel_buffer_dma_draw_box(alt_up_pixel_buffer_dma_dev *pixel_buffer, int x0, int y0, int x1, int y1, int color, int backbuffer)
/* This function draws a filled box. */
{
800be24: deffec04 addi sp,sp,-80
800be28: dfc01315 stw ra,76(sp)
800be2c: df001215 stw fp,72(sp)
800be30: df001204 addi fp,sp,72
800be34: e13fee15 stw r4,-72(fp)
800be38: e17fef15 stw r5,-68(fp)
800be3c: e1bff015 stw r6,-64(fp)
800be40: e1fff115 stw r7,-60(fp)
register unsigned int addr;
register unsigned int limit_x = pixel_buffer->x_resolution;
800be44: e0bfee17 ldw r2,-72(fp)
800be48: 10800f17 ldw r2,60(r2)
800be4c: e0bffe15 stw r2,-8(fp)
register unsigned int limit_y = pixel_buffer->y_resolution;
800be50: e0bfee17 ldw r2,-72(fp)
800be54: 10801017 ldw r2,64(r2)
800be58: e0bffd15 stw r2,-12(fp)
register unsigned int temp;
register unsigned int l_x = x0;
800be5c: e0bfef17 ldw r2,-68(fp)
800be60: e0bffb15 stw r2,-20(fp)
register unsigned int r_x = x1;
800be64: e0fff117 ldw r3,-60(fp)
800be68: e0fffa15 stw r3,-24(fp)
register unsigned int t_y = y0;
800be6c: e13ff017 ldw r4,-64(fp)
800be70: e13ff915 stw r4,-28(fp)
register unsigned int b_y = y1;
800be74: e0800217 ldw r2,8(fp)
800be78: e0bff815 stw r2,-32(fp)
register unsigned int local_color = color;
800be7c: e0c00317 ldw r3,12(fp)
800be80: e0fff715 stw r3,-36(fp)
/* Check coordinates */
if (l_x > r_x)
800be84: e13ffa17 ldw r4,-24(fp)
800be88: e0bffb17 ldw r2,-20(fp)
800be8c: 2080062e bgeu r4,r2,800bea8 <alt_up_pixel_buffer_dma_draw_box+0x84>
{
temp = l_x;
800be90: e0fffb17 ldw r3,-20(fp)
800be94: e0fffc15 stw r3,-16(fp)
l_x = r_x;
800be98: e13ffa17 ldw r4,-24(fp)
800be9c: e13ffb15 stw r4,-20(fp)
r_x = temp;
800bea0: e0bffc17 ldw r2,-16(fp)
800bea4: e0bffa15 stw r2,-24(fp)
}
if (t_y > b_y)
800bea8: e0fff817 ldw r3,-32(fp)
800beac: e13ff917 ldw r4,-28(fp)
800beb0: 1900062e bgeu r3,r4,800becc <alt_up_pixel_buffer_dma_draw_box+0xa8>
{
temp = t_y;
800beb4: e0bff917 ldw r2,-28(fp)
800beb8: e0bffc15 stw r2,-16(fp)
t_y = b_y;
800bebc: e0fff817 ldw r3,-32(fp)
800bec0: e0fff915 stw r3,-28(fp)
b_y = temp;
800bec4: e13ffc17 ldw r4,-16(fp)
800bec8: e13ff815 stw r4,-32(fp)
}
if ((l_x >= limit_x) || (t_y >= limit_y) || (r_x < 0) || (b_y < 0))
800becc: e0bffb17 ldw r2,-20(fp)
800bed0: e0fffe17 ldw r3,-8(fp)
800bed4: 10c10d2e bgeu r2,r3,800c30c <alt_up_pixel_buffer_dma_draw_box+0x4e8>
800bed8: e13ff917 ldw r4,-28(fp)
800bedc: e0bffd17 ldw r2,-12(fp)
800bee0: 20800136 bltu r4,r2,800bee8 <alt_up_pixel_buffer_dma_draw_box+0xc4>
{
/* Drawing outside of the window, so don't bother. */
return;
800bee4: 00010906 br 800c30c <alt_up_pixel_buffer_dma_draw_box+0x4e8>
/* Clip the box and draw only within the confines of the screen. */
if (l_x < 0)
{
l_x = 0;
}
if (r_x >= limit_x)
800bee8: e0fffa17 ldw r3,-24(fp)
800beec: e13ffe17 ldw r4,-8(fp)
800bef0: 19000336 bltu r3,r4,800bf00 <alt_up_pixel_buffer_dma_draw_box+0xdc>
{
r_x = limit_x - 1;
800bef4: e0bffe17 ldw r2,-8(fp)
800bef8: 10bfffc4 addi r2,r2,-1
800befc: e0bffa15 stw r2,-24(fp)
}
if (t_y < 0)
{
t_y = 0;
}
if (b_y >= limit_y)
800bf00: e0fff817 ldw r3,-32(fp)
800bf04: e13ffd17 ldw r4,-12(fp)
800bf08: 19000336 bltu r3,r4,800bf18 <alt_up_pixel_buffer_dma_draw_box+0xf4>
{
b_y = limit_y - 1;
800bf0c: e0bffd17 ldw r2,-12(fp)
800bf10: 10bfffc4 addi r2,r2,-1
800bf14: e0bff815 stw r2,-32(fp)
}
/* Set up the address to start clearing from and the screen boundaries. */
if (backbuffer == 1)
800bf18: e0800417 ldw r2,16(fp)
800bf1c: 10800058 cmpnei r2,r2,1
800bf20: 1000041e bne r2,zero,800bf34 <alt_up_pixel_buffer_dma_draw_box+0x110>
addr = pixel_buffer->back_buffer_start_address;
800bf24: e0bfee17 ldw r2,-72(fp)
800bf28: 10800c17 ldw r2,48(r2)
800bf2c: e0bfff15 stw r2,-4(fp)
800bf30: 00000306 br 800bf40 <alt_up_pixel_buffer_dma_draw_box+0x11c>
else
addr = pixel_buffer->buffer_start_address;
800bf34: e0bfee17 ldw r2,-72(fp)
800bf38: 10800b17 ldw r2,44(r2)
800bf3c: e0bfff15 stw r2,-4(fp)
/* Draw the box using one of the addressing modes. */
if (pixel_buffer->addressing_mode == ALT_UP_PIXEL_BUFFER_XY_ADDRESS_MODE) {
800bf40: e0bfee17 ldw r2,-72(fp)
800bf44: 10800d17 ldw r2,52(r2)
800bf48: 1004c03a cmpne r2,r2,zero
800bf4c: 1000721e bne r2,zero,800c118 <alt_up_pixel_buffer_dma_draw_box+0x2f4>
/* Draw a box of a given color on the screen using the XY addressing mode. */
register unsigned int x,y;
register unsigned int offset_y;
offset_y = pixel_buffer->y_coord_offset;
800bf50: e0bfee17 ldw r2,-72(fp)
800bf54: 10801317 ldw r2,76(r2)
800bf58: e0bff415 stw r2,-48(fp)
addr = addr + (t_y << offset_y);
800bf5c: e0bff417 ldw r2,-48(fp)
800bf60: e0fff917 ldw r3,-28(fp)
800bf64: 1884983a sll r2,r3,r2
800bf68: e13fff17 ldw r4,-4(fp)
800bf6c: 2089883a add r4,r4,r2
800bf70: e13fff15 stw r4,-4(fp)
/* This portion of the code is purposefully replicated. This is because having a text for
* the mode would unnecessarily slow down the drawing of a box. */
if (pixel_buffer->color_mode == ALT_UP_8BIT_COLOR_MODE) {
800bf74: e0bfee17 ldw r2,-72(fp)
800bf78: 10800e17 ldw r2,56(r2)
800bf7c: 10800058 cmpnei r2,r2,1
800bf80: 10001e1e bne r2,zero,800bffc <alt_up_pixel_buffer_dma_draw_box+0x1d8>
for (y = t_y; y <= b_y; y++)
800bf84: e0bff917 ldw r2,-28(fp)
800bf88: e0bff515 stw r2,-44(fp)
800bf8c: 00001706 br 800bfec <alt_up_pixel_buffer_dma_draw_box+0x1c8>
{
for (x = l_x; x <= r_x; x++)
800bf90: e0fffb17 ldw r3,-20(fp)
800bf94: e0fff615 stw r3,-40(fp)
800bf98: 00000806 br 800bfbc <alt_up_pixel_buffer_dma_draw_box+0x198>
{
IOWR_8DIRECT(addr, x, local_color);
800bf9c: e0ffff17 ldw r3,-4(fp)
800bfa0: e0bff617 ldw r2,-40(fp)
800bfa4: 1885883a add r2,r3,r2
800bfa8: e0fff717 ldw r3,-36(fp)
800bfac: 10c00025 stbio r3,0(r2)
/* This portion of the code is purposefully replicated. This is because having a text for
* the mode would unnecessarily slow down the drawing of a box. */
if (pixel_buffer->color_mode == ALT_UP_8BIT_COLOR_MODE) {
for (y = t_y; y <= b_y; y++)
{
for (x = l_x; x <= r_x; x++)
800bfb0: e13ff617 ldw r4,-40(fp)
800bfb4: 21000044 addi r4,r4,1
800bfb8: e13ff615 stw r4,-40(fp)
800bfbc: e0bffa17 ldw r2,-24(fp)
800bfc0: e0fff617 ldw r3,-40(fp)
800bfc4: 10fff52e bgeu r2,r3,800bf9c <alt_up_pixel_buffer_dma_draw_box+0x178>
{
IOWR_8DIRECT(addr, x, local_color);
}
addr = addr + (1 << offset_y);
800bfc8: e0fff417 ldw r3,-48(fp)
800bfcc: 00800044 movi r2,1
800bfd0: 10c4983a sll r2,r2,r3
800bfd4: e13fff17 ldw r4,-4(fp)
800bfd8: 2089883a add r4,r4,r2
800bfdc: e13fff15 stw r4,-4(fp)
addr = addr + (t_y << offset_y);
/* This portion of the code is purposefully replicated. This is because having a text for
* the mode would unnecessarily slow down the drawing of a box. */
if (pixel_buffer->color_mode == ALT_UP_8BIT_COLOR_MODE) {
for (y = t_y; y <= b_y; y++)
800bfe0: e0bff517 ldw r2,-44(fp)
800bfe4: 10800044 addi r2,r2,1
800bfe8: e0bff515 stw r2,-44(fp)
800bfec: e0fff817 ldw r3,-32(fp)
800bff0: e13ff517 ldw r4,-44(fp)
800bff4: 193fe62e bgeu r3,r4,800bf90 <alt_up_pixel_buffer_dma_draw_box+0x16c>
800bff8: 0000c406 br 800c30c <alt_up_pixel_buffer_dma_draw_box+0x4e8>
{
IOWR_8DIRECT(addr, x, local_color);
}
addr = addr + (1 << offset_y);
}
} else if (pixel_buffer->color_mode == ALT_UP_16BIT_COLOR_MODE) {
800bffc: e0bfee17 ldw r2,-72(fp)
800c000: 10800e17 ldw r2,56(r2)
800c004: 10800098 cmpnei r2,r2,2
800c008: 1000211e bne r2,zero,800c090 <alt_up_pixel_buffer_dma_draw_box+0x26c>
for (y = t_y; y <= b_y; y++)
800c00c: e0bff917 ldw r2,-28(fp)
800c010: e0bff515 stw r2,-44(fp)
800c014: 00001a06 br 800c080 <alt_up_pixel_buffer_dma_draw_box+0x25c>
{
for (x = l_x; x <= r_x; x++)
800c018: e0fffb17 ldw r3,-20(fp)
800c01c: e0fff615 stw r3,-40(fp)
800c020: 00000b06 br 800c050 <alt_up_pixel_buffer_dma_draw_box+0x22c>
{
IOWR_16DIRECT(addr, x << 1, local_color);
800c024: e13ff617 ldw r4,-40(fp)
800c028: e13ff617 ldw r4,-40(fp)
800c02c: 2105883a add r2,r4,r4
800c030: 1007883a mov r3,r2
800c034: e0bfff17 ldw r2,-4(fp)
800c038: 1885883a add r2,r3,r2
800c03c: e0fff717 ldw r3,-36(fp)
800c040: 10c0002d sthio r3,0(r2)
addr = addr + (1 << offset_y);
}
} else if (pixel_buffer->color_mode == ALT_UP_16BIT_COLOR_MODE) {
for (y = t_y; y <= b_y; y++)
{
for (x = l_x; x <= r_x; x++)
800c044: e0bff617 ldw r2,-40(fp)
800c048: 10800044 addi r2,r2,1
800c04c: e0bff615 stw r2,-40(fp)
800c050: e0fffa17 ldw r3,-24(fp)
800c054: e13ff617 ldw r4,-40(fp)
800c058: 193ff22e bgeu r3,r4,800c024 <alt_up_pixel_buffer_dma_draw_box+0x200>
{
IOWR_16DIRECT(addr, x << 1, local_color);
}
addr = addr + (1 << offset_y);
800c05c: e0fff417 ldw r3,-48(fp)
800c060: 00800044 movi r2,1
800c064: 10c4983a sll r2,r2,r3
800c068: e0ffff17 ldw r3,-4(fp)
800c06c: 1887883a add r3,r3,r2
800c070: e0ffff15 stw r3,-4(fp)
IOWR_8DIRECT(addr, x, local_color);
}
addr = addr + (1 << offset_y);
}
} else if (pixel_buffer->color_mode == ALT_UP_16BIT_COLOR_MODE) {
for (y = t_y; y <= b_y; y++)
800c074: e13ff517 ldw r4,-44(fp)
800c078: 21000044 addi r4,r4,1
800c07c: e13ff515 stw r4,-44(fp)
800c080: e0bff817 ldw r2,-32(fp)
800c084: e0fff517 ldw r3,-44(fp)
800c088: 10ffe32e bgeu r2,r3,800c018 <alt_up_pixel_buffer_dma_draw_box+0x1f4>
800c08c: 00009f06 br 800c30c <alt_up_pixel_buffer_dma_draw_box+0x4e8>
addr = addr + (1 << offset_y);
}
}
else
{
for (y = t_y; y <= b_y; y++)
800c090: e13ff917 ldw r4,-28(fp)
800c094: e13ff515 stw r4,-44(fp)
800c098: 00001b06 br 800c108 <alt_up_pixel_buffer_dma_draw_box+0x2e4>
{
for (x = l_x; x <= r_x; x++)
800c09c: e0bffb17 ldw r2,-20(fp)
800c0a0: e0bff615 stw r2,-40(fp)
800c0a4: 00000c06 br 800c0d8 <alt_up_pixel_buffer_dma_draw_box+0x2b4>
{
IOWR_32DIRECT(addr, x << 2, local_color);
800c0a8: e0fff617 ldw r3,-40(fp)
800c0ac: e0fff617 ldw r3,-40(fp)
800c0b0: 18c5883a add r2,r3,r3
800c0b4: 1085883a add r2,r2,r2
800c0b8: 1007883a mov r3,r2
800c0bc: e0bfff17 ldw r2,-4(fp)
800c0c0: 1885883a add r2,r3,r2
800c0c4: e0fff717 ldw r3,-36(fp)
800c0c8: 10c00035 stwio r3,0(r2)
}
else
{
for (y = t_y; y <= b_y; y++)
{
for (x = l_x; x <= r_x; x++)
800c0cc: e13ff617 ldw r4,-40(fp)
800c0d0: 21000044 addi r4,r4,1
800c0d4: e13ff615 stw r4,-40(fp)
800c0d8: e0bffa17 ldw r2,-24(fp)
800c0dc: e0fff617 ldw r3,-40(fp)
800c0e0: 10fff12e bgeu r2,r3,800c0a8 <alt_up_pixel_buffer_dma_draw_box+0x284>
{
IOWR_32DIRECT(addr, x << 2, local_color);
}
addr = addr + (1 << offset_y);
800c0e4: e0fff417 ldw r3,-48(fp)
800c0e8: 00800044 movi r2,1
800c0ec: 10c4983a sll r2,r2,r3
800c0f0: e13fff17 ldw r4,-4(fp)
800c0f4: 2089883a add r4,r4,r2
800c0f8: e13fff15 stw r4,-4(fp)
addr = addr + (1 << offset_y);
}
}
else
{
for (y = t_y; y <= b_y; y++)
800c0fc: e0bff517 ldw r2,-44(fp)
800c100: 10800044 addi r2,r2,1
800c104: e0bff515 stw r2,-44(fp)
800c108: e0fff817 ldw r3,-32(fp)
800c10c: e13ff517 ldw r4,-44(fp)
800c110: 193fe22e bgeu r3,r4,800c09c <alt_up_pixel_buffer_dma_draw_box+0x278>
800c114: 00007d06 br 800c30c <alt_up_pixel_buffer_dma_draw_box+0x4e8>
} else {
/* Draw a box of a given color on the screen using the linear addressing mode. */
register unsigned int x,y;
/* This portion of the code is purposefully replicated. This is because having a text for
* the mode would unnecessarily slow down the drawing of a box. */
if (pixel_buffer->color_mode == ALT_UP_8BIT_COLOR_MODE) {
800c118: e0bfee17 ldw r2,-72(fp)
800c11c: 10800e17 ldw r2,56(r2)
800c120: 10800058 cmpnei r2,r2,1
800c124: 1000221e bne r2,zero,800c1b0 <alt_up_pixel_buffer_dma_draw_box+0x38c>
addr = addr + t_y * limit_x;
800c128: e13ff917 ldw r4,-28(fp)
800c12c: e17ffe17 ldw r5,-8(fp)
800c130: 80096e40 call 80096e4 <__mulsi3>
800c134: e0ffff17 ldw r3,-4(fp)
800c138: 1887883a add r3,r3,r2
800c13c: e0ffff15 stw r3,-4(fp)
for (y = t_y; y <= b_y; y++)
800c140: e13ff917 ldw r4,-28(fp)
800c144: e13ff215 stw r4,-56(fp)
800c148: 00001506 br 800c1a0 <alt_up_pixel_buffer_dma_draw_box+0x37c>
{
for (x = l_x; x <= r_x; x++)
800c14c: e0bffb17 ldw r2,-20(fp)
800c150: e0bff315 stw r2,-52(fp)
800c154: 00000806 br 800c178 <alt_up_pixel_buffer_dma_draw_box+0x354>
{
IOWR_8DIRECT(addr, x, local_color);
800c158: e0ffff17 ldw r3,-4(fp)
800c15c: e0bff317 ldw r2,-52(fp)
800c160: 1885883a add r2,r3,r2
800c164: e0fff717 ldw r3,-36(fp)
800c168: 10c00025 stbio r3,0(r2)
* the mode would unnecessarily slow down the drawing of a box. */
if (pixel_buffer->color_mode == ALT_UP_8BIT_COLOR_MODE) {
addr = addr + t_y * limit_x;
for (y = t_y; y <= b_y; y++)
{
for (x = l_x; x <= r_x; x++)
800c16c: e0fff317 ldw r3,-52(fp)
800c170: 18c00044 addi r3,r3,1
800c174: e0fff315 stw r3,-52(fp)
800c178: e13ffa17 ldw r4,-24(fp)
800c17c: e0bff317 ldw r2,-52(fp)
800c180: 20bff52e bgeu r4,r2,800c158 <alt_up_pixel_buffer_dma_draw_box+0x334>
{
IOWR_8DIRECT(addr, x, local_color);
}
addr = addr + limit_x;
800c184: e0ffff17 ldw r3,-4(fp)
800c188: e13ffe17 ldw r4,-8(fp)
800c18c: 1907883a add r3,r3,r4
800c190: e0ffff15 stw r3,-4(fp)
register unsigned int x,y;
/* This portion of the code is purposefully replicated. This is because having a text for
* the mode would unnecessarily slow down the drawing of a box. */
if (pixel_buffer->color_mode == ALT_UP_8BIT_COLOR_MODE) {
addr = addr + t_y * limit_x;
for (y = t_y; y <= b_y; y++)
800c194: e0bff217 ldw r2,-56(fp)
800c198: 10800044 addi r2,r2,1
800c19c: e0bff215 stw r2,-56(fp)
800c1a0: e0fff817 ldw r3,-32(fp)
800c1a4: e13ff217 ldw r4,-56(fp)
800c1a8: 193fe82e bgeu r3,r4,800c14c <alt_up_pixel_buffer_dma_draw_box+0x328>
800c1ac: 00005706 br 800c30c <alt_up_pixel_buffer_dma_draw_box+0x4e8>
{
IOWR_8DIRECT(addr, x, local_color);
}
addr = addr + limit_x;
}
} else if (pixel_buffer->color_mode == ALT_UP_16BIT_COLOR_MODE) {
800c1b0: e0bfee17 ldw r2,-72(fp)
800c1b4: 10800e17 ldw r2,56(r2)
800c1b8: 10800098 cmpnei r2,r2,2
800c1bc: 1000291e bne r2,zero,800c264 <alt_up_pixel_buffer_dma_draw_box+0x440>
limit_x = limit_x << 1;
800c1c0: e0fffe17 ldw r3,-8(fp)
800c1c4: e0fffe17 ldw r3,-8(fp)
800c1c8: 18c5883a add r2,r3,r3
800c1cc: e0bffe15 stw r2,-8(fp)
addr = addr + t_y * limit_x;
800c1d0: e13ff917 ldw r4,-28(fp)
800c1d4: e17ffe17 ldw r5,-8(fp)
800c1d8: 80096e40 call 80096e4 <__mulsi3>
800c1dc: e13fff17 ldw r4,-4(fp)
800c1e0: 2089883a add r4,r4,r2
800c1e4: e13fff15 stw r4,-4(fp)
for (y = t_y; y <= b_y; y++)
800c1e8: e0bff917 ldw r2,-28(fp)
800c1ec: e0bff215 stw r2,-56(fp)
800c1f0: 00001806 br 800c254 <alt_up_pixel_buffer_dma_draw_box+0x430>
{
for (x = l_x; x <= r_x; x++)
800c1f4: e0fffb17 ldw r3,-20(fp)
800c1f8: e0fff315 stw r3,-52(fp)
800c1fc: 00000b06 br 800c22c <alt_up_pixel_buffer_dma_draw_box+0x408>
{
IOWR_16DIRECT(addr, x << 1, local_color);
800c200: e13ff317 ldw r4,-52(fp)
800c204: e13ff317 ldw r4,-52(fp)
800c208: 2105883a add r2,r4,r4
800c20c: 1007883a mov r3,r2
800c210: e0bfff17 ldw r2,-4(fp)
800c214: 1885883a add r2,r3,r2
800c218: e0fff717 ldw r3,-36(fp)
800c21c: 10c0002d sthio r3,0(r2)
} else if (pixel_buffer->color_mode == ALT_UP_16BIT_COLOR_MODE) {
limit_x = limit_x << 1;
addr = addr + t_y * limit_x;
for (y = t_y; y <= b_y; y++)
{
for (x = l_x; x <= r_x; x++)
800c220: e0bff317 ldw r2,-52(fp)
800c224: 10800044 addi r2,r2,1
800c228: e0bff315 stw r2,-52(fp)
800c22c: e0fffa17 ldw r3,-24(fp)
800c230: e13ff317 ldw r4,-52(fp)
800c234: 193ff22e bgeu r3,r4,800c200 <alt_up_pixel_buffer_dma_draw_box+0x3dc>
{
IOWR_16DIRECT(addr, x << 1, local_color);
}
addr = addr + limit_x;
800c238: e0bfff17 ldw r2,-4(fp)
800c23c: e0fffe17 ldw r3,-8(fp)
800c240: 10c5883a add r2,r2,r3
800c244: e0bfff15 stw r2,-4(fp)
addr = addr + limit_x;
}
} else if (pixel_buffer->color_mode == ALT_UP_16BIT_COLOR_MODE) {
limit_x = limit_x << 1;
addr = addr + t_y * limit_x;
for (y = t_y; y <= b_y; y++)
800c248: e13ff217 ldw r4,-56(fp)
800c24c: 21000044 addi r4,r4,1
800c250: e13ff215 stw r4,-56(fp)
800c254: e0bff817 ldw r2,-32(fp)
800c258: e0fff217 ldw r3,-56(fp)
800c25c: 10ffe52e bgeu r2,r3,800c1f4 <alt_up_pixel_buffer_dma_draw_box+0x3d0>
800c260: 00002a06 br 800c30c <alt_up_pixel_buffer_dma_draw_box+0x4e8>
addr = addr + limit_x;
}
}
else
{
limit_x = limit_x << 2;
800c264: e13ffe17 ldw r4,-8(fp)
800c268: e13ffe17 ldw r4,-8(fp)
800c26c: 2105883a add r2,r4,r4
800c270: 1085883a add r2,r2,r2
800c274: e0bffe15 stw r2,-8(fp)
addr = addr + t_y * limit_x;
800c278: e13ff917 ldw r4,-28(fp)
800c27c: e17ffe17 ldw r5,-8(fp)
800c280: 80096e40 call 80096e4 <__mulsi3>
800c284: e0ffff17 ldw r3,-4(fp)
800c288: 1887883a add r3,r3,r2
800c28c: e0ffff15 stw r3,-4(fp)
for (y = t_y; y <= b_y; y++)
800c290: e13ff917 ldw r4,-28(fp)
800c294: e13ff215 stw r4,-56(fp)
800c298: 00001906 br 800c300 <alt_up_pixel_buffer_dma_draw_box+0x4dc>
{
for (x = l_x; x <= r_x; x++)
800c29c: e0bffb17 ldw r2,-20(fp)
800c2a0: e0bff315 stw r2,-52(fp)
800c2a4: 00000c06 br 800c2d8 <alt_up_pixel_buffer_dma_draw_box+0x4b4>
{
IOWR_32DIRECT(addr, x << 2, local_color);
800c2a8: e0fff317 ldw r3,-52(fp)
800c2ac: e0fff317 ldw r3,-52(fp)
800c2b0: 18c5883a add r2,r3,r3
800c2b4: 1085883a add r2,r2,r2
800c2b8: 1007883a mov r3,r2
800c2bc: e0bfff17 ldw r2,-4(fp)
800c2c0: 1885883a add r2,r3,r2
800c2c4: e0fff717 ldw r3,-36(fp)
800c2c8: 10c00035 stwio r3,0(r2)
{
limit_x = limit_x << 2;
addr = addr + t_y * limit_x;
for (y = t_y; y <= b_y; y++)
{
for (x = l_x; x <= r_x; x++)
800c2cc: e13ff317 ldw r4,-52(fp)
800c2d0: 21000044 addi r4,r4,1
800c2d4: e13ff315 stw r4,-52(fp)
800c2d8: e0bffa17 ldw r2,-24(fp)
800c2dc: e0fff317 ldw r3,-52(fp)
800c2e0: 10fff12e bgeu r2,r3,800c2a8 <alt_up_pixel_buffer_dma_draw_box+0x484>
{
IOWR_32DIRECT(addr, x << 2, local_color);
}
addr = addr + limit_x;
800c2e4: e13fff17 ldw r4,-4(fp)
800c2e8: e0bffe17 ldw r2,-8(fp)
800c2ec: 2089883a add r4,r4,r2
800c2f0: e13fff15 stw r4,-4(fp)
}
else
{
limit_x = limit_x << 2;
addr = addr + t_y * limit_x;
for (y = t_y; y <= b_y; y++)
800c2f4: e0fff217 ldw r3,-56(fp)
800c2f8: 18c00044 addi r3,r3,1
800c2fc: e0fff215 stw r3,-56(fp)
800c300: e13ff817 ldw r4,-32(fp)
800c304: e0bff217 ldw r2,-56(fp)
800c308: 20bfe42e bgeu r4,r2,800c29c <alt_up_pixel_buffer_dma_draw_box+0x478>
}
addr = addr + limit_x;
}
}
}
}
800c30c: e037883a mov sp,fp
800c310: dfc00117 ldw ra,4(sp)
800c314: df000017 ldw fp,0(sp)
800c318: dec00204 addi sp,sp,8
800c31c: f800283a ret
0800c320 <alt_up_pixel_buffer_dma_draw_hline>:
void alt_up_pixel_buffer_dma_draw_hline(alt_up_pixel_buffer_dma_dev *pixel_buffer, int x0, int x1, int y, int color, int backbuffer)
/* This method draws a horizontal line. This method is faster than using the line method because we know the direction of the line. */
{
800c320: defff104 addi sp,sp,-60
800c324: dfc00e15 stw ra,56(sp)
800c328: df000d15 stw fp,52(sp)
800c32c: df000d04 addi fp,sp,52
800c330: e13ff315 stw r4,-52(fp)
800c334: e17ff415 stw r5,-48(fp)
800c338: e1bff515 stw r6,-44(fp)
800c33c: e1fff615 stw r7,-40(fp)
register unsigned int addr;
register unsigned int limit_x = pixel_buffer->x_resolution;
800c340: e0bff317 ldw r2,-52(fp)
800c344: 10800f17 ldw r2,60(r2)
800c348: e0bffe15 stw r2,-8(fp)
register unsigned int limit_y = pixel_buffer->y_resolution;
800c34c: e0bff317 ldw r2,-52(fp)
800c350: 10801017 ldw r2,64(r2)
800c354: e0bffd15 stw r2,-12(fp)
register unsigned int temp;
register unsigned int l_x = x0;
800c358: e0bff417 ldw r2,-48(fp)
800c35c: e0bffc15 stw r2,-16(fp)
register unsigned int r_x = x1;
800c360: e0fff517 ldw r3,-44(fp)
800c364: e0fffb15 stw r3,-20(fp)
register unsigned int line_y = y;
800c368: e13ff617 ldw r4,-40(fp)
800c36c: e13ffa15 stw r4,-24(fp)
register unsigned int local_color = color;
800c370: e0800217 ldw r2,8(fp)
800c374: e0bff915 stw r2,-28(fp)
/* Check coordinates */
if (l_x > r_x)
800c378: e0fffb17 ldw r3,-20(fp)
800c37c: e13ffc17 ldw r4,-16(fp)
800c380: 1900042e bgeu r3,r4,800c394 <alt_up_pixel_buffer_dma_draw_hline+0x74>
{
temp = l_x;
800c384: e0bffc17 ldw r2,-16(fp)
l_x = r_x;
800c388: e0fffb17 ldw r3,-20(fp)
800c38c: e0fffc15 stw r3,-16(fp)
r_x = temp;
800c390: e0bffb15 stw r2,-20(fp)
}
if ((l_x >= limit_x) || (line_y >= limit_y) || (r_x < 0) || (line_y < 0))
800c394: e13ffc17 ldw r4,-16(fp)
800c398: e0bffe17 ldw r2,-8(fp)
800c39c: 2080b12e bgeu r4,r2,800c664 <alt_up_pixel_buffer_dma_draw_hline+0x344>
800c3a0: e13ffa17 ldw r4,-24(fp)
800c3a4: e0fffd17 ldw r3,-12(fp)
800c3a8: 20c00136 bltu r4,r3,800c3b0 <alt_up_pixel_buffer_dma_draw_hline+0x90>
{
/* Drawing outside of the window, so don't bother. */
return;
800c3ac: 0000ad06 br 800c664 <alt_up_pixel_buffer_dma_draw_hline+0x344>
/* Clip the box and draw only within the confines of the screen. */
if (l_x < 0)
{
l_x = 0;
}
if (r_x >= limit_x)
800c3b0: e0bffb17 ldw r2,-20(fp)
800c3b4: e0fffe17 ldw r3,-8(fp)
800c3b8: 10c00336 bltu r2,r3,800c3c8 <alt_up_pixel_buffer_dma_draw_hline+0xa8>
{
r_x = limit_x - 1;
800c3bc: e13ffe17 ldw r4,-8(fp)
800c3c0: 213fffc4 addi r4,r4,-1
800c3c4: e13ffb15 stw r4,-20(fp)
}
/* Set up the address to start clearing from and the screen boundaries. */
if (backbuffer == 1)
800c3c8: e0800317 ldw r2,12(fp)
800c3cc: 10800058 cmpnei r2,r2,1
800c3d0: 1000041e bne r2,zero,800c3e4 <alt_up_pixel_buffer_dma_draw_hline+0xc4>
addr = pixel_buffer->back_buffer_start_address;
800c3d4: e0bff317 ldw r2,-52(fp)
800c3d8: 10800c17 ldw r2,48(r2)
800c3dc: e0bfff15 stw r2,-4(fp)
800c3e0: 00000306 br 800c3f0 <alt_up_pixel_buffer_dma_draw_hline+0xd0>
else
addr = pixel_buffer->buffer_start_address;
800c3e4: e0bff317 ldw r2,-52(fp)
800c3e8: 10800b17 ldw r2,44(r2)
800c3ec: e0bfff15 stw r2,-4(fp)
/* Draw a horizontal line using one of the addressing modes. */
if (pixel_buffer->addressing_mode == ALT_UP_PIXEL_BUFFER_XY_ADDRESS_MODE) {
800c3f0: e0bff317 ldw r2,-52(fp)
800c3f4: 10800d17 ldw r2,52(r2)
800c3f8: 1004c03a cmpne r2,r2,zero
800c3fc: 1000431e bne r2,zero,800c50c <alt_up_pixel_buffer_dma_draw_hline+0x1ec>
/* Draw a horizontal line of a given color on the screen using the XY addressing mode. */
register unsigned int x;
register unsigned int offset_y;
offset_y = pixel_buffer->y_coord_offset;
800c400: e0bff317 ldw r2,-52(fp)
800c404: 10801317 ldw r2,76(r2)
addr = addr + (line_y << offset_y);
800c408: e0fffa17 ldw r3,-24(fp)
800c40c: 1884983a sll r2,r3,r2
800c410: e13fff17 ldw r4,-4(fp)
800c414: 2089883a add r4,r4,r2
800c418: e13fff15 stw r4,-4(fp)
/* This portion of the code is purposefully replicated. This is because having a text for
* the mode would unnecessarily slow down the drawing of a horizontal line. */
if (pixel_buffer->color_mode == ALT_UP_8BIT_COLOR_MODE) {
800c41c: e0bff317 ldw r2,-52(fp)
800c420: 10800e17 ldw r2,56(r2)
800c424: 10800058 cmpnei r2,r2,1
800c428: 10000f1e bne r2,zero,800c468 <alt_up_pixel_buffer_dma_draw_hline+0x148>
for (x = l_x; x <= r_x; x++)
800c42c: e0bffc17 ldw r2,-16(fp)
800c430: e0bff815 stw r2,-32(fp)
800c434: 00000806 br 800c458 <alt_up_pixel_buffer_dma_draw_hline+0x138>
{
IOWR_8DIRECT(addr, x, local_color);
800c438: e0ffff17 ldw r3,-4(fp)
800c43c: e0bff817 ldw r2,-32(fp)
800c440: 1885883a add r2,r3,r2
800c444: e0fff917 ldw r3,-28(fp)
800c448: 10c00025 stbio r3,0(r2)
addr = addr + (line_y << offset_y);
/* This portion of the code is purposefully replicated. This is because having a text for
* the mode would unnecessarily slow down the drawing of a horizontal line. */
if (pixel_buffer->color_mode == ALT_UP_8BIT_COLOR_MODE) {
for (x = l_x; x <= r_x; x++)
800c44c: e0fff817 ldw r3,-32(fp)
800c450: 18c00044 addi r3,r3,1
800c454: e0fff815 stw r3,-32(fp)
800c458: e13ffb17 ldw r4,-20(fp)
800c45c: e0bff817 ldw r2,-32(fp)
800c460: 20bff52e bgeu r4,r2,800c438 <alt_up_pixel_buffer_dma_draw_hline+0x118>
800c464: 00007f06 br 800c664 <alt_up_pixel_buffer_dma_draw_hline+0x344>
{
IOWR_8DIRECT(addr, x, local_color);
}
} else if (pixel_buffer->color_mode == ALT_UP_16BIT_COLOR_MODE) {
800c468: e0bff317 ldw r2,-52(fp)
800c46c: 10800e17 ldw r2,56(r2)
800c470: 10800098 cmpnei r2,r2,2
800c474: 1000121e bne r2,zero,800c4c0 <alt_up_pixel_buffer_dma_draw_hline+0x1a0>
for (x = l_x; x <= r_x; x++)
800c478: e0fffc17 ldw r3,-16(fp)
800c47c: e0fff815 stw r3,-32(fp)
800c480: 00000b06 br 800c4b0 <alt_up_pixel_buffer_dma_draw_hline+0x190>
{
IOWR_16DIRECT(addr, x << 1, local_color);
800c484: e13ff817 ldw r4,-32(fp)
800c488: e13ff817 ldw r4,-32(fp)
800c48c: 2105883a add r2,r4,r4
800c490: 1007883a mov r3,r2
800c494: e0bfff17 ldw r2,-4(fp)
800c498: 1885883a add r2,r3,r2
800c49c: e0fff917 ldw r3,-28(fp)
800c4a0: 10c0002d sthio r3,0(r2)
for (x = l_x; x <= r_x; x++)
{
IOWR_8DIRECT(addr, x, local_color);
}
} else if (pixel_buffer->color_mode == ALT_UP_16BIT_COLOR_MODE) {
for (x = l_x; x <= r_x; x++)
800c4a4: e0bff817 ldw r2,-32(fp)
800c4a8: 10800044 addi r2,r2,1
800c4ac: e0bff815 stw r2,-32(fp)
800c4b0: e0fffb17 ldw r3,-20(fp)
800c4b4: e13ff817 ldw r4,-32(fp)
800c4b8: 193ff22e bgeu r3,r4,800c484 <alt_up_pixel_buffer_dma_draw_hline+0x164>
800c4bc: 00006906 br 800c664 <alt_up_pixel_buffer_dma_draw_hline+0x344>
IOWR_16DIRECT(addr, x << 1, local_color);
}
}
else
{
for (x = l_x; x <= r_x; x++)
800c4c0: e0bffc17 ldw r2,-16(fp)
800c4c4: e0bff815 stw r2,-32(fp)
800c4c8: 00000c06 br 800c4fc <alt_up_pixel_buffer_dma_draw_hline+0x1dc>
{
IOWR_32DIRECT(addr, x << 2, local_color);
800c4cc: e0fff817 ldw r3,-32(fp)
800c4d0: e0fff817 ldw r3,-32(fp)
800c4d4: 18c5883a add r2,r3,r3
800c4d8: 1085883a add r2,r2,r2
800c4dc: 1007883a mov r3,r2
800c4e0: e0bfff17 ldw r2,-4(fp)
800c4e4: 1885883a add r2,r3,r2
800c4e8: e0fff917 ldw r3,-28(fp)
800c4ec: 10c00035 stwio r3,0(r2)
IOWR_16DIRECT(addr, x << 1, local_color);
}
}
else
{
for (x = l_x; x <= r_x; x++)
800c4f0: e13ff817 ldw r4,-32(fp)
800c4f4: 21000044 addi r4,r4,1
800c4f8: e13ff815 stw r4,-32(fp)
800c4fc: e0bffb17 ldw r2,-20(fp)
800c500: e0fff817 ldw r3,-32(fp)
800c504: 10fff12e bgeu r2,r3,800c4cc <alt_up_pixel_buffer_dma_draw_hline+0x1ac>
800c508: 00005606 br 800c664 <alt_up_pixel_buffer_dma_draw_hline+0x344>
} else {
/* Draw a horizontal line of a given color on the screen using the linear addressing mode. */
register unsigned int x;
/* This portion of the code is purposefully replicated. This is because having a text for
* the mode would unnecessarily slow down the drawing of a box. */
if (pixel_buffer->color_mode == ALT_UP_8BIT_COLOR_MODE) {
800c50c: e0bff317 ldw r2,-52(fp)
800c510: 10800e17 ldw r2,56(r2)
800c514: 10800058 cmpnei r2,r2,1
800c518: 1000151e bne r2,zero,800c570 <alt_up_pixel_buffer_dma_draw_hline+0x250>
addr = addr + line_y * limit_x;
800c51c: e13ffa17 ldw r4,-24(fp)
800c520: e17ffe17 ldw r5,-8(fp)
800c524: 80096e40 call 80096e4 <__mulsi3>
800c528: e13fff17 ldw r4,-4(fp)
800c52c: 2089883a add r4,r4,r2
800c530: e13fff15 stw r4,-4(fp)
for (x = l_x; x <= r_x; x++)
800c534: e0bffc17 ldw r2,-16(fp)
800c538: e0bff715 stw r2,-36(fp)
800c53c: 00000806 br 800c560 <alt_up_pixel_buffer_dma_draw_hline+0x240>
{
IOWR_8DIRECT(addr, x, local_color);
800c540: e0ffff17 ldw r3,-4(fp)
800c544: e0bff717 ldw r2,-36(fp)
800c548: 1885883a add r2,r3,r2
800c54c: e0fff917 ldw r3,-28(fp)
800c550: 10c00025 stbio r3,0(r2)
register unsigned int x;
/* This portion of the code is purposefully replicated. This is because having a text for
* the mode would unnecessarily slow down the drawing of a box. */
if (pixel_buffer->color_mode == ALT_UP_8BIT_COLOR_MODE) {
addr = addr + line_y * limit_x;
for (x = l_x; x <= r_x; x++)
800c554: e0fff717 ldw r3,-36(fp)
800c558: 18c00044 addi r3,r3,1
800c55c: e0fff715 stw r3,-36(fp)
800c560: e13ffb17 ldw r4,-20(fp)
800c564: e0bff717 ldw r2,-36(fp)
800c568: 20bff52e bgeu r4,r2,800c540 <alt_up_pixel_buffer_dma_draw_hline+0x220>
800c56c: 00003d06 br 800c664 <alt_up_pixel_buffer_dma_draw_hline+0x344>
{
IOWR_8DIRECT(addr, x, local_color);
}
} else if (pixel_buffer->color_mode == ALT_UP_16BIT_COLOR_MODE) {
800c570: e0bff317 ldw r2,-52(fp)
800c574: 10800e17 ldw r2,56(r2)
800c578: 10800098 cmpnei r2,r2,2
800c57c: 10001c1e bne r2,zero,800c5f0 <alt_up_pixel_buffer_dma_draw_hline+0x2d0>
limit_x = limit_x << 1;
800c580: e0fffe17 ldw r3,-8(fp)
800c584: e0fffe17 ldw r3,-8(fp)
800c588: 18c5883a add r2,r3,r3
800c58c: e0bffe15 stw r2,-8(fp)
addr = addr + line_y * limit_x;
800c590: e13ffa17 ldw r4,-24(fp)
800c594: e17ffe17 ldw r5,-8(fp)
800c598: 80096e40 call 80096e4 <__mulsi3>
800c59c: e13fff17 ldw r4,-4(fp)
800c5a0: 2089883a add r4,r4,r2
800c5a4: e13fff15 stw r4,-4(fp)
for (x = l_x; x <= r_x; x++)
800c5a8: e0bffc17 ldw r2,-16(fp)
800c5ac: e0bff715 stw r2,-36(fp)
800c5b0: 00000b06 br 800c5e0 <alt_up_pixel_buffer_dma_draw_hline+0x2c0>
{
IOWR_16DIRECT(addr, x << 1, local_color);
800c5b4: e0fff717 ldw r3,-36(fp)
800c5b8: e0fff717 ldw r3,-36(fp)
800c5bc: 18c5883a add r2,r3,r3
800c5c0: 1007883a mov r3,r2
800c5c4: e0bfff17 ldw r2,-4(fp)
800c5c8: 1885883a add r2,r3,r2
800c5cc: e0fff917 ldw r3,-28(fp)
800c5d0: 10c0002d sthio r3,0(r2)
IOWR_8DIRECT(addr, x, local_color);
}
} else if (pixel_buffer->color_mode == ALT_UP_16BIT_COLOR_MODE) {
limit_x = limit_x << 1;
addr = addr + line_y * limit_x;
for (x = l_x; x <= r_x; x++)
800c5d4: e13ff717 ldw r4,-36(fp)
800c5d8: 21000044 addi r4,r4,1
800c5dc: e13ff715 stw r4,-36(fp)
800c5e0: e0bffb17 ldw r2,-20(fp)
800c5e4: e0fff717 ldw r3,-36(fp)
800c5e8: 10fff22e bgeu r2,r3,800c5b4 <alt_up_pixel_buffer_dma_draw_hline+0x294>
800c5ec: 00001d06 br 800c664 <alt_up_pixel_buffer_dma_draw_hline+0x344>
IOWR_16DIRECT(addr, x << 1, local_color);
}
}
else
{
limit_x = limit_x << 2;
800c5f0: e13ffe17 ldw r4,-8(fp)
800c5f4: e13ffe17 ldw r4,-8(fp)
800c5f8: 2105883a add r2,r4,r4
800c5fc: 1085883a add r2,r2,r2
800c600: e0bffe15 stw r2,-8(fp)
addr = addr + line_y * limit_x;
800c604: e13ffa17 ldw r4,-24(fp)
800c608: e17ffe17 ldw r5,-8(fp)
800c60c: 80096e40 call 80096e4 <__mulsi3>
800c610: e0ffff17 ldw r3,-4(fp)
800c614: 1887883a add r3,r3,r2
800c618: e0ffff15 stw r3,-4(fp)
for (x = l_x; x <= r_x; x++)
800c61c: e13ffc17 ldw r4,-16(fp)
800c620: e13ff715 stw r4,-36(fp)
800c624: 00000c06 br 800c658 <alt_up_pixel_buffer_dma_draw_hline+0x338>
{
IOWR_32DIRECT(addr, x << 2, local_color);
800c628: e0fff717 ldw r3,-36(fp)
800c62c: e0fff717 ldw r3,-36(fp)
800c630: 18c5883a add r2,r3,r3
800c634: 1085883a add r2,r2,r2
800c638: 1007883a mov r3,r2
800c63c: e0bfff17 ldw r2,-4(fp)
800c640: 1885883a add r2,r3,r2
800c644: e0fff917 ldw r3,-28(fp)
800c648: 10c00035 stwio r3,0(r2)
}
else
{
limit_x = limit_x << 2;
addr = addr + line_y * limit_x;
for (x = l_x; x <= r_x; x++)
800c64c: e13ff717 ldw r4,-36(fp)
800c650: 21000044 addi r4,r4,1
800c654: e13ff715 stw r4,-36(fp)
800c658: e0bffb17 ldw r2,-20(fp)
800c65c: e0fff717 ldw r3,-36(fp)
800c660: 10fff12e bgeu r2,r3,800c628 <alt_up_pixel_buffer_dma_draw_hline+0x308>
IOWR_32DIRECT(addr, x << 2, local_color);
}
addr = addr + limit_x;
}
}
}
800c664: e037883a mov sp,fp
800c668: dfc00117 ldw ra,4(sp)
800c66c: df000017 ldw fp,0(sp)
800c670: dec00204 addi sp,sp,8
800c674: f800283a ret
0800c678 <alt_up_pixel_buffer_dma_draw_vline>:
void alt_up_pixel_buffer_dma_draw_vline(alt_up_pixel_buffer_dma_dev *pixel_buffer, int x, int y0, int y1, int color, int backbuffer)
/* This method draws a vertical line. This method is faster than using the line method because we know the direction of the line. */
{
800c678: defff004 addi sp,sp,-64
800c67c: dfc00f15 stw ra,60(sp)
800c680: df000e15 stw fp,56(sp)
800c684: df000e04 addi fp,sp,56
800c688: e13ff215 stw r4,-56(fp)
800c68c: e17ff315 stw r5,-52(fp)
800c690: e1bff415 stw r6,-48(fp)
800c694: e1fff515 stw r7,-44(fp)
register unsigned int addr;
register unsigned int limit_x = pixel_buffer->x_resolution;
800c698: e0bff217 ldw r2,-56(fp)
800c69c: 10800f17 ldw r2,60(r2)
800c6a0: e0bffe15 stw r2,-8(fp)
register unsigned int limit_y = pixel_buffer->y_resolution;
800c6a4: e0bff217 ldw r2,-56(fp)
800c6a8: 10801017 ldw r2,64(r2)
800c6ac: e0bffd15 stw r2,-12(fp)
register unsigned int temp;
register unsigned int line_x = x;
800c6b0: e0bff317 ldw r2,-52(fp)
800c6b4: e0bffc15 stw r2,-16(fp)
register unsigned int t_y = y0;
800c6b8: e0fff417 ldw r3,-48(fp)
800c6bc: e0fffb15 stw r3,-20(fp)
register unsigned int b_y = y1;
800c6c0: e13ff517 ldw r4,-44(fp)
800c6c4: e13ffa15 stw r4,-24(fp)
register unsigned int local_color = color;
800c6c8: e0800217 ldw r2,8(fp)
800c6cc: e0bff915 stw r2,-28(fp)
/* Check coordinates */
if (t_y > b_y)
800c6d0: e0fffa17 ldw r3,-24(fp)
800c6d4: e13ffb17 ldw r4,-20(fp)
800c6d8: 1900042e bgeu r3,r4,800c6ec <alt_up_pixel_buffer_dma_draw_vline+0x74>
{
temp = t_y;
800c6dc: e0bffb17 ldw r2,-20(fp)
t_y = b_y;
800c6e0: e0fffa17 ldw r3,-24(fp)
800c6e4: e0fffb15 stw r3,-20(fp)
b_y = temp;
800c6e8: e0bffa15 stw r2,-24(fp)
}
if ((line_x >= limit_x) || (t_y >= limit_y) || (line_x < 0) || (b_y < 0))
800c6ec: e13ffc17 ldw r4,-16(fp)
800c6f0: e0bffe17 ldw r2,-8(fp)
800c6f4: 2080d12e bgeu r4,r2,800ca3c <alt_up_pixel_buffer_dma_draw_vline+0x3c4>
800c6f8: e0fffb17 ldw r3,-20(fp)
800c6fc: e13ffd17 ldw r4,-12(fp)
800c700: 19000136 bltu r3,r4,800c708 <alt_up_pixel_buffer_dma_draw_vline+0x90>
{
/* Drawing outside of the window, so don't bother. */
return;
800c704: 0000cd06 br 800ca3c <alt_up_pixel_buffer_dma_draw_vline+0x3c4>
/* Clip the box and draw only within the confines of the screen. */
if (t_y < 0)
{
t_y = 0;
}
if (b_y >= limit_y)
800c708: e0bffa17 ldw r2,-24(fp)
800c70c: e0fffd17 ldw r3,-12(fp)
800c710: 10c00336 bltu r2,r3,800c720 <alt_up_pixel_buffer_dma_draw_vline+0xa8>
{
b_y = limit_y - 1;
800c714: e13ffd17 ldw r4,-12(fp)
800c718: 213fffc4 addi r4,r4,-1
800c71c: e13ffa15 stw r4,-24(fp)
}
/* Set up the address to start clearing from and the screen boundaries. */
if (backbuffer == 1)
800c720: e0800317 ldw r2,12(fp)
800c724: 10800058 cmpnei r2,r2,1
800c728: 1000041e bne r2,zero,800c73c <alt_up_pixel_buffer_dma_draw_vline+0xc4>
addr = pixel_buffer->back_buffer_start_address;
800c72c: e0bff217 ldw r2,-56(fp)
800c730: 10800c17 ldw r2,48(r2)
800c734: e0bfff15 stw r2,-4(fp)
800c738: 00000306 br 800c748 <alt_up_pixel_buffer_dma_draw_vline+0xd0>
else
addr = pixel_buffer->buffer_start_address;
800c73c: e0bff217 ldw r2,-56(fp)
800c740: 10800b17 ldw r2,44(r2)
800c744: e0bfff15 stw r2,-4(fp)
/* Draw the vertical line using one of the addressing modes. */
if (pixel_buffer->addressing_mode == ALT_UP_PIXEL_BUFFER_XY_ADDRESS_MODE) {
800c748: e0bff217 ldw r2,-56(fp)
800c74c: 10800d17 ldw r2,52(r2)
800c750: 1004c03a cmpne r2,r2,zero
800c754: 1000571e bne r2,zero,800c8b4 <alt_up_pixel_buffer_dma_draw_vline+0x23c>
/* Draw a vertical line of a given color on the screen using the XY addressing mode. */
register unsigned int y;
register unsigned int offset_y;
offset_y = pixel_buffer->y_coord_offset;
800c758: e0bff217 ldw r2,-56(fp)
800c75c: 10801317 ldw r2,76(r2)
800c760: e0bff715 stw r2,-36(fp)
addr = addr + (t_y << offset_y);
800c764: e0bff717 ldw r2,-36(fp)
800c768: e0fffb17 ldw r3,-20(fp)
800c76c: 1884983a sll r2,r3,r2
800c770: e13fff17 ldw r4,-4(fp)
800c774: 2089883a add r4,r4,r2
800c778: e13fff15 stw r4,-4(fp)
/* This portion of the code is purposefully replicated. This is because having a text for
* the mode would unnecessarily slow down the drawing of a box. */
if (pixel_buffer->color_mode == ALT_UP_8BIT_COLOR_MODE) {
800c77c: e0bff217 ldw r2,-56(fp)
800c780: 10800e17 ldw r2,56(r2)
800c784: 10800058 cmpnei r2,r2,1
800c788: 1000151e bne r2,zero,800c7e0 <alt_up_pixel_buffer_dma_draw_vline+0x168>
for (y = t_y; y <= b_y; y++)
800c78c: e0bffb17 ldw r2,-20(fp)
800c790: e0bff815 stw r2,-32(fp)
800c794: 00000e06 br 800c7d0 <alt_up_pixel_buffer_dma_draw_vline+0x158>
{
IOWR_8DIRECT(addr, line_x, local_color);
800c798: e0ffff17 ldw r3,-4(fp)
800c79c: e0bffc17 ldw r2,-16(fp)
800c7a0: 1885883a add r2,r3,r2
800c7a4: e0fff917 ldw r3,-28(fp)
800c7a8: 10c00025 stbio r3,0(r2)
addr = addr + (1 << offset_y);
800c7ac: e0fff717 ldw r3,-36(fp)
800c7b0: 00800044 movi r2,1
800c7b4: 10c4983a sll r2,r2,r3
800c7b8: e0ffff17 ldw r3,-4(fp)
800c7bc: 1887883a add r3,r3,r2
800c7c0: e0ffff15 stw r3,-4(fp)
addr = addr + (t_y << offset_y);
/* This portion of the code is purposefully replicated. This is because having a text for
* the mode would unnecessarily slow down the drawing of a box. */
if (pixel_buffer->color_mode == ALT_UP_8BIT_COLOR_MODE) {
for (y = t_y; y <= b_y; y++)
800c7c4: e13ff817 ldw r4,-32(fp)
800c7c8: 21000044 addi r4,r4,1
800c7cc: e13ff815 stw r4,-32(fp)
800c7d0: e0bffa17 ldw r2,-24(fp)
800c7d4: e0fff817 ldw r3,-32(fp)
800c7d8: 10ffef2e bgeu r2,r3,800c798 <alt_up_pixel_buffer_dma_draw_vline+0x120>
800c7dc: 00009706 br 800ca3c <alt_up_pixel_buffer_dma_draw_vline+0x3c4>
{
IOWR_8DIRECT(addr, line_x, local_color);
addr = addr + (1 << offset_y);
}
} else if (pixel_buffer->color_mode == ALT_UP_16BIT_COLOR_MODE) {
800c7e0: e0bff217 ldw r2,-56(fp)
800c7e4: 10800e17 ldw r2,56(r2)
800c7e8: 10800098 cmpnei r2,r2,2
800c7ec: 1000181e bne r2,zero,800c850 <alt_up_pixel_buffer_dma_draw_vline+0x1d8>
for (y = t_y; y <= b_y; y++)
800c7f0: e13ffb17 ldw r4,-20(fp)
800c7f4: e13ff815 stw r4,-32(fp)
800c7f8: 00001106 br 800c840 <alt_up_pixel_buffer_dma_draw_vline+0x1c8>
{
IOWR_16DIRECT(addr, line_x << 1, local_color);
800c7fc: e0fffc17 ldw r3,-16(fp)
800c800: e0fffc17 ldw r3,-16(fp)
800c804: 18c5883a add r2,r3,r3
800c808: 1007883a mov r3,r2
800c80c: e0bfff17 ldw r2,-4(fp)
800c810: 1885883a add r2,r3,r2
800c814: e0fff917 ldw r3,-28(fp)
800c818: 10c0002d sthio r3,0(r2)
addr = addr + (1 << offset_y);
800c81c: e0fff717 ldw r3,-36(fp)
800c820: 00800044 movi r2,1
800c824: 10c4983a sll r2,r2,r3
800c828: e13fff17 ldw r4,-4(fp)
800c82c: 2089883a add r4,r4,r2
800c830: e13fff15 stw r4,-4(fp)
{
IOWR_8DIRECT(addr, line_x, local_color);
addr = addr + (1 << offset_y);
}
} else if (pixel_buffer->color_mode == ALT_UP_16BIT_COLOR_MODE) {
for (y = t_y; y <= b_y; y++)
800c834: e0bff817 ldw r2,-32(fp)
800c838: 10800044 addi r2,r2,1
800c83c: e0bff815 stw r2,-32(fp)
800c840: e0fffa17 ldw r3,-24(fp)
800c844: e13ff817 ldw r4,-32(fp)
800c848: 193fec2e bgeu r3,r4,800c7fc <alt_up_pixel_buffer_dma_draw_vline+0x184>
800c84c: 00007b06 br 800ca3c <alt_up_pixel_buffer_dma_draw_vline+0x3c4>
addr = addr + (1 << offset_y);
}
}
else
{
for (y = t_y; y <= b_y; y++)
800c850: e0bffb17 ldw r2,-20(fp)
800c854: e0bff815 stw r2,-32(fp)
800c858: 00001206 br 800c8a4 <alt_up_pixel_buffer_dma_draw_vline+0x22c>
{
IOWR_32DIRECT(addr, line_x << 2, local_color);
800c85c: e0fffc17 ldw r3,-16(fp)
800c860: e0fffc17 ldw r3,-16(fp)
800c864: 18c5883a add r2,r3,r3
800c868: 1085883a add r2,r2,r2
800c86c: 1007883a mov r3,r2
800c870: e0bfff17 ldw r2,-4(fp)
800c874: 1885883a add r2,r3,r2
800c878: e0fff917 ldw r3,-28(fp)
800c87c: 10c00035 stwio r3,0(r2)
addr = addr + (1 << offset_y);
800c880: e0fff717 ldw r3,-36(fp)
800c884: 00800044 movi r2,1
800c888: 10c4983a sll r2,r2,r3
800c88c: e13fff17 ldw r4,-4(fp)
800c890: 2089883a add r4,r4,r2
800c894: e13fff15 stw r4,-4(fp)
addr = addr + (1 << offset_y);
}
}
else
{
for (y = t_y; y <= b_y; y++)
800c898: e0bff817 ldw r2,-32(fp)
800c89c: 10800044 addi r2,r2,1
800c8a0: e0bff815 stw r2,-32(fp)
800c8a4: e0fffa17 ldw r3,-24(fp)
800c8a8: e13ff817 ldw r4,-32(fp)
800c8ac: 193feb2e bgeu r3,r4,800c85c <alt_up_pixel_buffer_dma_draw_vline+0x1e4>
800c8b0: 00006206 br 800ca3c <alt_up_pixel_buffer_dma_draw_vline+0x3c4>
} else {
/* Draw a vertical line of a given color on the screen using the linear addressing mode. */
register unsigned int y;
/* This portion of the code is purposefully replicated. This is because having a text for
* the mode would unnecessarily slow down the drawing of a box. */
if (pixel_buffer->color_mode == ALT_UP_8BIT_COLOR_MODE) {
800c8b4: e0bff217 ldw r2,-56(fp)
800c8b8: 10800e17 ldw r2,56(r2)
800c8bc: 10800058 cmpnei r2,r2,1
800c8c0: 1000191e bne r2,zero,800c928 <alt_up_pixel_buffer_dma_draw_vline+0x2b0>
addr = addr + t_y * limit_x;
800c8c4: e13ffb17 ldw r4,-20(fp)
800c8c8: e17ffe17 ldw r5,-8(fp)
800c8cc: 80096e40 call 80096e4 <__mulsi3>
800c8d0: e0ffff17 ldw r3,-4(fp)
800c8d4: 1887883a add r3,r3,r2
800c8d8: e0ffff15 stw r3,-4(fp)
for (y = t_y; y <= b_y; y++)
800c8dc: e13ffb17 ldw r4,-20(fp)
800c8e0: e13ff615 stw r4,-40(fp)
800c8e4: 00000c06 br 800c918 <alt_up_pixel_buffer_dma_draw_vline+0x2a0>
{
IOWR_8DIRECT(addr, line_x, local_color);
800c8e8: e0ffff17 ldw r3,-4(fp)
800c8ec: e0bffc17 ldw r2,-16(fp)
800c8f0: 1885883a add r2,r3,r2
800c8f4: e0fff917 ldw r3,-28(fp)
800c8f8: 10c00025 stbio r3,0(r2)
addr = addr + limit_x;
800c8fc: e0bfff17 ldw r2,-4(fp)
800c900: e0fffe17 ldw r3,-8(fp)
800c904: 10c5883a add r2,r2,r3
800c908: e0bfff15 stw r2,-4(fp)
register unsigned int y;
/* This portion of the code is purposefully replicated. This is because having a text for
* the mode would unnecessarily slow down the drawing of a box. */
if (pixel_buffer->color_mode == ALT_UP_8BIT_COLOR_MODE) {
addr = addr + t_y * limit_x;
for (y = t_y; y <= b_y; y++)
800c90c: e13ff617 ldw r4,-40(fp)
800c910: 21000044 addi r4,r4,1
800c914: e13ff615 stw r4,-40(fp)
800c918: e0bffa17 ldw r2,-24(fp)
800c91c: e0fff617 ldw r3,-40(fp)
800c920: 10fff12e bgeu r2,r3,800c8e8 <alt_up_pixel_buffer_dma_draw_vline+0x270>
800c924: 00004506 br 800ca3c <alt_up_pixel_buffer_dma_draw_vline+0x3c4>
{
IOWR_8DIRECT(addr, line_x, local_color);
addr = addr + limit_x;
}
} else if (pixel_buffer->color_mode == ALT_UP_16BIT_COLOR_MODE) {
800c928: e0bff217 ldw r2,-56(fp)
800c92c: 10800e17 ldw r2,56(r2)
800c930: 10800098 cmpnei r2,r2,2
800c934: 1000201e bne r2,zero,800c9b8 <alt_up_pixel_buffer_dma_draw_vline+0x340>
limit_x = limit_x << 1;
800c938: e13ffe17 ldw r4,-8(fp)
800c93c: e13ffe17 ldw r4,-8(fp)
800c940: 2105883a add r2,r4,r4
800c944: e0bffe15 stw r2,-8(fp)
addr = addr + t_y * limit_x;
800c948: e13ffb17 ldw r4,-20(fp)
800c94c: e17ffe17 ldw r5,-8(fp)
800c950: 80096e40 call 80096e4 <__mulsi3>
800c954: e0ffff17 ldw r3,-4(fp)
800c958: 1887883a add r3,r3,r2
800c95c: e0ffff15 stw r3,-4(fp)
for (y = t_y; y <= b_y; y++)
800c960: e13ffb17 ldw r4,-20(fp)
800c964: e13ff615 stw r4,-40(fp)
800c968: 00000f06 br 800c9a8 <alt_up_pixel_buffer_dma_draw_vline+0x330>
{
IOWR_16DIRECT(addr, line_x << 1, local_color);
800c96c: e0fffc17 ldw r3,-16(fp)
800c970: e0fffc17 ldw r3,-16(fp)
800c974: 18c5883a add r2,r3,r3
800c978: 1007883a mov r3,r2
800c97c: e0bfff17 ldw r2,-4(fp)
800c980: 1885883a add r2,r3,r2
800c984: e0fff917 ldw r3,-28(fp)
800c988: 10c0002d sthio r3,0(r2)
addr = addr + limit_x;
800c98c: e13fff17 ldw r4,-4(fp)
800c990: e0bffe17 ldw r2,-8(fp)
800c994: 2089883a add r4,r4,r2
800c998: e13fff15 stw r4,-4(fp)
addr = addr + limit_x;
}
} else if (pixel_buffer->color_mode == ALT_UP_16BIT_COLOR_MODE) {
limit_x = limit_x << 1;
addr = addr + t_y * limit_x;
for (y = t_y; y <= b_y; y++)
800c99c: e0fff617 ldw r3,-40(fp)
800c9a0: 18c00044 addi r3,r3,1
800c9a4: e0fff615 stw r3,-40(fp)
800c9a8: e13ffa17 ldw r4,-24(fp)
800c9ac: e0bff617 ldw r2,-40(fp)
800c9b0: 20bfee2e bgeu r4,r2,800c96c <alt_up_pixel_buffer_dma_draw_vline+0x2f4>
800c9b4: 00002106 br 800ca3c <alt_up_pixel_buffer_dma_draw_vline+0x3c4>
addr = addr + limit_x;
}
}
else
{
limit_x = limit_x << 2;
800c9b8: e0fffe17 ldw r3,-8(fp)
800c9bc: e0fffe17 ldw r3,-8(fp)
800c9c0: 18c5883a add r2,r3,r3
800c9c4: 1085883a add r2,r2,r2
800c9c8: e0bffe15 stw r2,-8(fp)
addr = addr + t_y * limit_x;
800c9cc: e13ffb17 ldw r4,-20(fp)
800c9d0: e17ffe17 ldw r5,-8(fp)
800c9d4: 80096e40 call 80096e4 <__mulsi3>
800c9d8: e13fff17 ldw r4,-4(fp)
800c9dc: 2089883a add r4,r4,r2
800c9e0: e13fff15 stw r4,-4(fp)
for (y = t_y; y <= b_y; y++)
800c9e4: e0bffb17 ldw r2,-20(fp)
800c9e8: e0bff615 stw r2,-40(fp)
800c9ec: 00001006 br 800ca30 <alt_up_pixel_buffer_dma_draw_vline+0x3b8>
{
IOWR_32DIRECT(addr, line_x << 2, local_color);
800c9f0: e0fffc17 ldw r3,-16(fp)
800c9f4: e0fffc17 ldw r3,-16(fp)
800c9f8: 18c5883a add r2,r3,r3
800c9fc: 1085883a add r2,r2,r2
800ca00: 1007883a mov r3,r2
800ca04: e0bfff17 ldw r2,-4(fp)
800ca08: 1885883a add r2,r3,r2
800ca0c: e0fff917 ldw r3,-28(fp)
800ca10: 10c00035 stwio r3,0(r2)
addr = addr + limit_x;
800ca14: e13fff17 ldw r4,-4(fp)
800ca18: e0bffe17 ldw r2,-8(fp)
800ca1c: 2089883a add r4,r4,r2
800ca20: e13fff15 stw r4,-4(fp)
}
else
{
limit_x = limit_x << 2;
addr = addr + t_y * limit_x;
for (y = t_y; y <= b_y; y++)
800ca24: e0fff617 ldw r3,-40(fp)
800ca28: 18c00044 addi r3,r3,1
800ca2c: e0fff615 stw r3,-40(fp)
800ca30: e13ffa17 ldw r4,-24(fp)
800ca34: e0bff617 ldw r2,-40(fp)
800ca38: 20bfed2e bgeu r4,r2,800c9f0 <alt_up_pixel_buffer_dma_draw_vline+0x378>
IOWR_32DIRECT(addr, line_x << 2, local_color);
addr = addr + limit_x;
}
}
}
}
800ca3c: e037883a mov sp,fp
800ca40: dfc00117 ldw ra,4(sp)
800ca44: df000017 ldw fp,0(sp)
800ca48: dec00204 addi sp,sp,8
800ca4c: f800283a ret
0800ca50 <alt_up_pixel_buffer_dma_draw_rectangle>:
void alt_up_pixel_buffer_dma_draw_rectangle(alt_up_pixel_buffer_dma_dev *pixel_buffer, int x0, int y0, int x1, int y1, int color, int backbuffer)
{
800ca50: defff804 addi sp,sp,-32
800ca54: dfc00715 stw ra,28(sp)
800ca58: df000615 stw fp,24(sp)
800ca5c: df000604 addi fp,sp,24
800ca60: e13ffc15 stw r4,-16(fp)
800ca64: e17ffd15 stw r5,-12(fp)
800ca68: e1bffe15 stw r6,-8(fp)
800ca6c: e1ffff15 stw r7,-4(fp)
alt_up_pixel_buffer_dma_draw_hline(pixel_buffer, x0, x1, y0, color, backbuffer);
800ca70: e0800317 ldw r2,12(fp)
800ca74: d8800015 stw r2,0(sp)
800ca78: e0800417 ldw r2,16(fp)
800ca7c: d8800115 stw r2,4(sp)
800ca80: e13ffc17 ldw r4,-16(fp)
800ca84: e17ffd17 ldw r5,-12(fp)
800ca88: e1bfff17 ldw r6,-4(fp)
800ca8c: e1fffe17 ldw r7,-8(fp)
800ca90: 800c3200 call 800c320 <alt_up_pixel_buffer_dma_draw_hline>
alt_up_pixel_buffer_dma_draw_hline(pixel_buffer, x0, x1, y1, color, backbuffer);
800ca94: e0800317 ldw r2,12(fp)
800ca98: d8800015 stw r2,0(sp)
800ca9c: e0800417 ldw r2,16(fp)
800caa0: d8800115 stw r2,4(sp)
800caa4: e13ffc17 ldw r4,-16(fp)
800caa8: e17ffd17 ldw r5,-12(fp)
800caac: e1bfff17 ldw r6,-4(fp)
800cab0: e1c00217 ldw r7,8(fp)
800cab4: 800c3200 call 800c320 <alt_up_pixel_buffer_dma_draw_hline>
alt_up_pixel_buffer_dma_draw_vline(pixel_buffer, x0, y0, y1, color, backbuffer);
800cab8: e0800317 ldw r2,12(fp)
800cabc: d8800015 stw r2,0(sp)
800cac0: e0800417 ldw r2,16(fp)
800cac4: d8800115 stw r2,4(sp)
800cac8: e13ffc17 ldw r4,-16(fp)
800cacc: e17ffd17 ldw r5,-12(fp)
800cad0: e1bffe17 ldw r6,-8(fp)
800cad4: e1c00217 ldw r7,8(fp)
800cad8: 800c6780 call 800c678 <alt_up_pixel_buffer_dma_draw_vline>
alt_up_pixel_buffer_dma_draw_vline(pixel_buffer, x1, y0, y1, color, backbuffer);
800cadc: e0800317 ldw r2,12(fp)
800cae0: d8800015 stw r2,0(sp)
800cae4: e0800417 ldw r2,16(fp)
800cae8: d8800115 stw r2,4(sp)
800caec: e13ffc17 ldw r4,-16(fp)
800caf0: e17fff17 ldw r5,-4(fp)
800caf4: e1bffe17 ldw r6,-8(fp)
800caf8: e1c00217 ldw r7,8(fp)
800cafc: 800c6780 call 800c678 <alt_up_pixel_buffer_dma_draw_vline>
}
800cb00: e037883a mov sp,fp
800cb04: dfc00117 ldw ra,4(sp)
800cb08: df000017 ldw fp,0(sp)
800cb0c: dec00204 addi sp,sp,8
800cb10: f800283a ret
0800cb14 <helper_plot_pixel>:
void helper_plot_pixel(register unsigned int buffer_start, register int line_size, register int x, register int y, register int color, register int mode)
/* This is a helper function that draws a pixel at a given location. Note that no boundary checks are made,
* so drawing off-screen may cause unpredictable side effects. */
{
800cb14: defffa04 addi sp,sp,-24
800cb18: dfc00515 stw ra,20(sp)
800cb1c: df000415 stw fp,16(sp)
800cb20: df000404 addi fp,sp,16
800cb24: e13ffc15 stw r4,-16(fp)
800cb28: e17ffd15 stw r5,-12(fp)
800cb2c: e1bffe15 stw r6,-8(fp)
800cb30: e1ffff15 stw r7,-4(fp)
if (mode == 0)
800cb34: e0c00317 ldw r3,12(fp)
800cb38: 1804c03a cmpne r2,r3,zero
800cb3c: 10000b1e bne r2,zero,800cb6c <helper_plot_pixel+0x58>
IOWR_8DIRECT(buffer_start, line_size*y+x, color);
800cb40: e13ffd17 ldw r4,-12(fp)
800cb44: e17fff17 ldw r5,-4(fp)
800cb48: 80096e40 call 80096e4 <__mulsi3>
800cb4c: e0fffe17 ldw r3,-8(fp)
800cb50: 10c5883a add r2,r2,r3
800cb54: 1007883a mov r3,r2
800cb58: e0bffc17 ldw r2,-16(fp)
800cb5c: 1885883a add r2,r3,r2
800cb60: e0c00217 ldw r3,8(fp)
800cb64: 10c00025 stbio r3,0(r2)
800cb68: 00001b06 br 800cbd8 <helper_plot_pixel+0xc4>
else if (mode == 1)
800cb6c: e0c00317 ldw r3,12(fp)
800cb70: 18800058 cmpnei r2,r3,1
800cb74: 10000c1e bne r2,zero,800cba8 <helper_plot_pixel+0x94>
IOWR_16DIRECT(buffer_start, (line_size*y+x) << 1, color);
800cb78: e13ffd17 ldw r4,-12(fp)
800cb7c: e17fff17 ldw r5,-4(fp)
800cb80: 80096e40 call 80096e4 <__mulsi3>
800cb84: e0fffe17 ldw r3,-8(fp)
800cb88: 10c5883a add r2,r2,r3
800cb8c: 1085883a add r2,r2,r2
800cb90: 1007883a mov r3,r2
800cb94: e0bffc17 ldw r2,-16(fp)
800cb98: 1885883a add r2,r3,r2
800cb9c: e0c00217 ldw r3,8(fp)
800cba0: 10c0002d sthio r3,0(r2)
800cba4: 00000c06 br 800cbd8 <helper_plot_pixel+0xc4>
else
IOWR_32DIRECT(buffer_start, (line_size*y+x) << 2, color);
800cba8: e13ffd17 ldw r4,-12(fp)
800cbac: e17fff17 ldw r5,-4(fp)
800cbb0: 80096e40 call 80096e4 <__mulsi3>
800cbb4: e0fffe17 ldw r3,-8(fp)
800cbb8: 10c5883a add r2,r2,r3
800cbbc: 1085883a add r2,r2,r2
800cbc0: 1085883a add r2,r2,r2
800cbc4: 1007883a mov r3,r2
800cbc8: e0bffc17 ldw r2,-16(fp)
800cbcc: 1885883a add r2,r3,r2
800cbd0: e0c00217 ldw r3,8(fp)
800cbd4: 10c00035 stwio r3,0(r2)
}
800cbd8: e037883a mov sp,fp
800cbdc: dfc00117 ldw ra,4(sp)
800cbe0: df000017 ldw fp,0(sp)
800cbe4: dec00204 addi sp,sp,8
800cbe8: f800283a ret
0800cbec <alt_up_pixel_buffer_dma_draw_line>:
void alt_up_pixel_buffer_dma_draw_line(alt_up_pixel_buffer_dma_dev *pixel_buffer, int x0, int y0, int x1, int y1, int color, int backbuffer)
/* This function draws a line between points (x0, y0) and (x1, y1). The function does not check if it draws a pixel within screen boundaries.
* users should ensure that the line is drawn within the screen boundaries. */
{
800cbec: deffe404 addi sp,sp,-112
800cbf0: dfc01b15 stw ra,108(sp)
800cbf4: df001a15 stw fp,104(sp)
800cbf8: df001a04 addi fp,sp,104
800cbfc: e13fe815 stw r4,-96(fp)
800cc00: e17fe915 stw r5,-92(fp)
800cc04: e1bfea15 stw r6,-88(fp)
800cc08: e1ffeb15 stw r7,-84(fp)
register int x_0 = x0;
800cc0c: e0bfe917 ldw r2,-92(fp)
800cc10: e0bffa15 stw r2,-24(fp)
register int y_0 = y0;
800cc14: e0ffea17 ldw r3,-88(fp)
800cc18: e0fff915 stw r3,-28(fp)
register int x_1 = x1;
800cc1c: e13feb17 ldw r4,-84(fp)
800cc20: e13ff815 stw r4,-32(fp)
register int y_1 = y1;
800cc24: e0800217 ldw r2,8(fp)
800cc28: e0bff715 stw r2,-36(fp)
register char steep = (ABS(y_1 - y_0) > ABS(x_1 - x_0)) ? 1 : 0;
800cc2c: e0fff717 ldw r3,-36(fp)
800cc30: e13ff917 ldw r4,-28(fp)
800cc34: 1905c83a sub r2,r3,r4
800cc38: e0bfff15 stw r2,-4(fp)
800cc3c: e0ffff17 ldw r3,-4(fp)
800cc40: 1804403a cmpge r2,r3,zero
800cc44: 1000031e bne r2,zero,800cc54 <alt_up_pixel_buffer_dma_draw_line+0x68>
800cc48: e13fff17 ldw r4,-4(fp)
800cc4c: 0109c83a sub r4,zero,r4
800cc50: e13fff15 stw r4,-4(fp)
800cc54: e0fff817 ldw r3,-32(fp)
800cc58: e13ffa17 ldw r4,-24(fp)
800cc5c: 1905c83a sub r2,r3,r4
800cc60: e0bffe15 stw r2,-8(fp)
800cc64: e0fffe17 ldw r3,-8(fp)
800cc68: 1804403a cmpge r2,r3,zero
800cc6c: 1000031e bne r2,zero,800cc7c <alt_up_pixel_buffer_dma_draw_line+0x90>
800cc70: e13ffe17 ldw r4,-8(fp)
800cc74: 0109c83a sub r4,zero,r4
800cc78: e13ffe15 stw r4,-8(fp)
800cc7c: e0fffe17 ldw r3,-8(fp)
800cc80: e13fff17 ldw r4,-4(fp)
800cc84: 1904803a cmplt r2,r3,r4
800cc88: e0bff605 stb r2,-40(fp)
register int deltax, deltay, error, ystep, x, y;
register int color_mode = (pixel_buffer->color_mode == ALT_UP_8BIT_COLOR_MODE) ? 0 :
(pixel_buffer->color_mode == ALT_UP_16BIT_COLOR_MODE) ? 1 : 2;
800cc8c: e0bfe817 ldw r2,-96(fp)
800cc90: 10800e17 ldw r2,56(r2)
800cc94: 10800060 cmpeqi r2,r2,1
800cc98: 10000c1e bne r2,zero,800cccc <alt_up_pixel_buffer_dma_draw_line+0xe0>
800cc9c: e0bfe817 ldw r2,-96(fp)
800cca0: 10800e17 ldw r2,56(r2)
800cca4: 10800098 cmpnei r2,r2,2
800cca8: 1000031e bne r2,zero,800ccb8 <alt_up_pixel_buffer_dma_draw_line+0xcc>
800ccac: 00800044 movi r2,1
800ccb0: e0bffc15 stw r2,-16(fp)
800ccb4: 00000206 br 800ccc0 <alt_up_pixel_buffer_dma_draw_line+0xd4>
800ccb8: 00c00084 movi r3,2
800ccbc: e0fffc15 stw r3,-16(fp)
800ccc0: e13ffc17 ldw r4,-16(fp)
800ccc4: e13ffd15 stw r4,-12(fp)
800ccc8: 00000106 br 800ccd0 <alt_up_pixel_buffer_dma_draw_line+0xe4>
800cccc: e03ffd15 stw zero,-12(fp)
800ccd0: e0bffd17 ldw r2,-12(fp)
800ccd4: e0bfef15 stw r2,-68(fp)
register int line_color = color;
800ccd8: e0c00317 ldw r3,12(fp)
800ccdc: e0ffee15 stw r3,-72(fp)
register unsigned int buffer_start;
register int line_size = (pixel_buffer->addressing_mode == ALT_UP_PIXEL_BUFFER_XY_ADDRESS_MODE) ? (1 << (pixel_buffer->y_coord_offset-color_mode)) : pixel_buffer->x_resolution;
800cce0: e0bfe817 ldw r2,-96(fp)
800cce4: 10800d17 ldw r2,52(r2)
800cce8: 1004c03a cmpne r2,r2,zero
800ccec: 1000091e bne r2,zero,800cd14 <alt_up_pixel_buffer_dma_draw_line+0x128>
800ccf0: e0bfe817 ldw r2,-96(fp)
800ccf4: 10c01317 ldw r3,76(r2)
800ccf8: e0bfef17 ldw r2,-68(fp)
800ccfc: 1885c83a sub r2,r3,r2
800cd00: 1007883a mov r3,r2
800cd04: 00800044 movi r2,1
800cd08: 10c4983a sll r2,r2,r3
800cd0c: e0bffb15 stw r2,-20(fp)
800cd10: 00000306 br 800cd20 <alt_up_pixel_buffer_dma_draw_line+0x134>
800cd14: e0bfe817 ldw r2,-96(fp)
800cd18: 10800f17 ldw r2,60(r2)
800cd1c: e0bffb15 stw r2,-20(fp)
800cd20: e13ffb17 ldw r4,-20(fp)
800cd24: e13fec15 stw r4,-80(fp)
if (backbuffer == 1)
800cd28: e0800417 ldw r2,16(fp)
800cd2c: 10800058 cmpnei r2,r2,1
800cd30: 1000041e bne r2,zero,800cd44 <alt_up_pixel_buffer_dma_draw_line+0x158>
buffer_start = pixel_buffer->back_buffer_start_address;
800cd34: e0bfe817 ldw r2,-96(fp)
800cd38: 10800c17 ldw r2,48(r2)
800cd3c: e0bfed15 stw r2,-76(fp)
800cd40: 00000306 br 800cd50 <alt_up_pixel_buffer_dma_draw_line+0x164>
else
buffer_start = pixel_buffer->buffer_start_address;
800cd44: e0bfe817 ldw r2,-96(fp)
800cd48: 10800b17 ldw r2,44(r2)
800cd4c: e0bfed15 stw r2,-76(fp)
/* Preprocessing inputs */
if (steep > 0) {
800cd50: e0fff603 ldbu r3,-40(fp)
800cd54: 18803fcc andi r2,r3,255
800cd58: 1080201c xori r2,r2,128
800cd5c: 10bfe004 addi r2,r2,-128
800cd60: 10800050 cmplti r2,r2,1
800cd64: 10000c1e bne r2,zero,800cd98 <alt_up_pixel_buffer_dma_draw_line+0x1ac>
// Swap x_0 and y_0
error = x_0;
800cd68: e13ffa17 ldw r4,-24(fp)
800cd6c: e13ff315 stw r4,-52(fp)
x_0 = y_0;
800cd70: e0bff917 ldw r2,-28(fp)
800cd74: e0bffa15 stw r2,-24(fp)
y_0 = error;
800cd78: e0fff317 ldw r3,-52(fp)
800cd7c: e0fff915 stw r3,-28(fp)
// Swap x_1 and y_1
error = x_1;
800cd80: e13ff817 ldw r4,-32(fp)
800cd84: e13ff315 stw r4,-52(fp)
x_1 = y_1;
800cd88: e0bff717 ldw r2,-36(fp)
800cd8c: e0bff815 stw r2,-32(fp)
y_1 = error;
800cd90: e0fff317 ldw r3,-52(fp)
800cd94: e0fff715 stw r3,-36(fp)
}
if (x_0 > x_1) {
800cd98: e13ff817 ldw r4,-32(fp)
800cd9c: e0bffa17 ldw r2,-24(fp)
800cda0: 20800c0e bge r4,r2,800cdd4 <alt_up_pixel_buffer_dma_draw_line+0x1e8>
// Swap x_0 and x_1
error = x_0;
800cda4: e0fffa17 ldw r3,-24(fp)
800cda8: e0fff315 stw r3,-52(fp)
x_0 = x_1;
800cdac: e13ff817 ldw r4,-32(fp)
800cdb0: e13ffa15 stw r4,-24(fp)
x_1 = error;
800cdb4: e0bff317 ldw r2,-52(fp)
800cdb8: e0bff815 stw r2,-32(fp)
// Swap y_0 and y_1
error = y_0;
800cdbc: e0fff917 ldw r3,-28(fp)
800cdc0: e0fff315 stw r3,-52(fp)
y_0 = y_1;
800cdc4: e13ff717 ldw r4,-36(fp)
800cdc8: e13ff915 stw r4,-28(fp)
y_1 = error;
800cdcc: e0bff317 ldw r2,-52(fp)
800cdd0: e0bff715 stw r2,-36(fp)
}
/* Setup local variables */
deltax = x_1 - x_0;
800cdd4: e0fff817 ldw r3,-32(fp)
800cdd8: e13ffa17 ldw r4,-24(fp)
800cddc: 1907c83a sub r3,r3,r4
800cde0: e0fff515 stw r3,-44(fp)
deltay = ABS(y_1 - y_0);
800cde4: e0fff717 ldw r3,-36(fp)
800cde8: e13ff917 ldw r4,-28(fp)
800cdec: 1905c83a sub r2,r3,r4
800cdf0: e0bff415 stw r2,-48(fp)
800cdf4: e0fff417 ldw r3,-48(fp)
800cdf8: 1804403a cmpge r2,r3,zero
800cdfc: 1000031e bne r2,zero,800ce0c <alt_up_pixel_buffer_dma_draw_line+0x220>
800ce00: e13ff417 ldw r4,-48(fp)
800ce04: 0109c83a sub r4,zero,r4
800ce08: e13ff415 stw r4,-48(fp)
error = -(deltax / 2);
800ce0c: e0fff517 ldw r3,-44(fp)
800ce10: 1804d7fa srli r2,r3,31
800ce14: e13ff517 ldw r4,-44(fp)
800ce18: 1105883a add r2,r2,r4
800ce1c: 1005d07a srai r2,r2,1
800ce20: 0085c83a sub r2,zero,r2
800ce24: e0bff315 stw r2,-52(fp)
y = y_0;
800ce28: e0bff917 ldw r2,-28(fp)
800ce2c: e0bff015 stw r2,-64(fp)
if (y_0 < y_1)
800ce30: e0fff917 ldw r3,-28(fp)
800ce34: e13ff717 ldw r4,-36(fp)
800ce38: 1900030e bge r3,r4,800ce48 <alt_up_pixel_buffer_dma_draw_line+0x25c>
ystep = 1;
800ce3c: 00800044 movi r2,1
800ce40: e0bff215 stw r2,-56(fp)
800ce44: 00000206 br 800ce50 <alt_up_pixel_buffer_dma_draw_line+0x264>
else
ystep = -1;
800ce48: 00ffffc4 movi r3,-1
800ce4c: e0fff215 stw r3,-56(fp)
/* Draw a line - either go along the x axis (steep = 0) or along the y axis (steep = 1). The code is replicated to
* compile well on low optimization levels. */
if (steep == 1)
800ce50: e13ff603 ldbu r4,-40(fp)
800ce54: 20803fcc andi r2,r4,255
800ce58: 1080201c xori r2,r2,128
800ce5c: 10bfe004 addi r2,r2,-128
800ce60: 10800058 cmpnei r2,r2,1
800ce64: 1000221e bne r2,zero,800cef0 <alt_up_pixel_buffer_dma_draw_line+0x304>
{
for (x=x_0; x <= x_1; x++) {
800ce68: e0bffa17 ldw r2,-24(fp)
800ce6c: e0bff115 stw r2,-60(fp)
800ce70: 00001b06 br 800cee0 <alt_up_pixel_buffer_dma_draw_line+0x2f4>
helper_plot_pixel(buffer_start, line_size, y, x, line_color, color_mode);
800ce74: e0ffee17 ldw r3,-72(fp)
800ce78: d8c00015 stw r3,0(sp)
800ce7c: e13fef17 ldw r4,-68(fp)
800ce80: d9000115 stw r4,4(sp)
800ce84: e13fed17 ldw r4,-76(fp)
800ce88: e17fec17 ldw r5,-80(fp)
800ce8c: e1bff017 ldw r6,-64(fp)
800ce90: e1fff117 ldw r7,-60(fp)
800ce94: 800cb140 call 800cb14 <helper_plot_pixel>
error = error + deltay;
800ce98: e0bff317 ldw r2,-52(fp)
800ce9c: e0fff417 ldw r3,-48(fp)
800cea0: 10c5883a add r2,r2,r3
800cea4: e0bff315 stw r2,-52(fp)
if (error > 0) {
800cea8: e13ff317 ldw r4,-52(fp)
800ceac: 20800050 cmplti r2,r4,1
800ceb0: 1000081e bne r2,zero,800ced4 <alt_up_pixel_buffer_dma_draw_line+0x2e8>
y = y + ystep;
800ceb4: e0bff017 ldw r2,-64(fp)
800ceb8: e0fff217 ldw r3,-56(fp)
800cebc: 10c5883a add r2,r2,r3
800cec0: e0bff015 stw r2,-64(fp)
error = error - deltax;
800cec4: e13ff317 ldw r4,-52(fp)
800cec8: e0bff517 ldw r2,-44(fp)
800cecc: 2089c83a sub r4,r4,r2
800ced0: e13ff315 stw r4,-52(fp)
/* Draw a line - either go along the x axis (steep = 0) or along the y axis (steep = 1). The code is replicated to
* compile well on low optimization levels. */
if (steep == 1)
{
for (x=x_0; x <= x_1; x++) {
800ced4: e0fff117 ldw r3,-60(fp)
800ced8: 18c00044 addi r3,r3,1
800cedc: e0fff115 stw r3,-60(fp)
800cee0: e13ff817 ldw r4,-32(fp)
800cee4: e0bff117 ldw r2,-60(fp)
800cee8: 20bfe20e bge r4,r2,800ce74 <alt_up_pixel_buffer_dma_draw_line+0x288>
800ceec: 00002106 br 800cf74 <alt_up_pixel_buffer_dma_draw_line+0x388>
}
}
}
else
{
for (x=x_0; x <= x_1; x++) {
800cef0: e0fffa17 ldw r3,-24(fp)
800cef4: e0fff115 stw r3,-60(fp)
800cef8: 00001b06 br 800cf68 <alt_up_pixel_buffer_dma_draw_line+0x37c>
helper_plot_pixel(buffer_start, line_size, x, y, line_color, color_mode);
800cefc: e13fee17 ldw r4,-72(fp)
800cf00: d9000015 stw r4,0(sp)
800cf04: e0bfef17 ldw r2,-68(fp)
800cf08: d8800115 stw r2,4(sp)
800cf0c: e13fed17 ldw r4,-76(fp)
800cf10: e17fec17 ldw r5,-80(fp)
800cf14: e1bff117 ldw r6,-60(fp)
800cf18: e1fff017 ldw r7,-64(fp)
800cf1c: 800cb140 call 800cb14 <helper_plot_pixel>
error = error + deltay;
800cf20: e0fff317 ldw r3,-52(fp)
800cf24: e13ff417 ldw r4,-48(fp)
800cf28: 1907883a add r3,r3,r4
800cf2c: e0fff315 stw r3,-52(fp)
if (error > 0) {
800cf30: e0fff317 ldw r3,-52(fp)
800cf34: 18800050 cmplti r2,r3,1
800cf38: 1000081e bne r2,zero,800cf5c <alt_up_pixel_buffer_dma_draw_line+0x370>
y = y + ystep;
800cf3c: e13ff017 ldw r4,-64(fp)
800cf40: e0bff217 ldw r2,-56(fp)
800cf44: 2089883a add r4,r4,r2
800cf48: e13ff015 stw r4,-64(fp)
error = error - deltax;
800cf4c: e0fff317 ldw r3,-52(fp)
800cf50: e13ff517 ldw r4,-44(fp)
800cf54: 1907c83a sub r3,r3,r4
800cf58: e0fff315 stw r3,-52(fp)
}
}
}
else
{
for (x=x_0; x <= x_1; x++) {
800cf5c: e0bff117 ldw r2,-60(fp)
800cf60: 10800044 addi r2,r2,1
800cf64: e0bff115 stw r2,-60(fp)
800cf68: e0fff817 ldw r3,-32(fp)
800cf6c: e13ff117 ldw r4,-60(fp)
800cf70: 193fe20e bge r3,r4,800cefc <alt_up_pixel_buffer_dma_draw_line+0x310>
y = y + ystep;
error = error - deltax;
}
}
}
}
800cf74: e037883a mov sp,fp
800cf78: dfc00117 ldw ra,4(sp)
800cf7c: df000017 ldw fp,0(sp)
800cf80: dec00204 addi sp,sp,8
800cf84: f800283a ret
0800cf88 <alt_alarm_start>:
*/
int alt_alarm_start (alt_alarm* alarm, alt_u32 nticks,
alt_u32 (*callback) (void* context),
void* context)
{
800cf88: defff404 addi sp,sp,-48
800cf8c: df000b15 stw fp,44(sp)
800cf90: df000b04 addi fp,sp,44
800cf94: e13ffb15 stw r4,-20(fp)
800cf98: e17ffc15 stw r5,-16(fp)
800cf9c: e1bffd15 stw r6,-12(fp)
800cfa0: e1fffe15 stw r7,-8(fp)
alt_irq_context irq_context;
alt_u32 current_nticks = 0;
800cfa4: e03ff915 stw zero,-28(fp)
800cfa8: 00820074 movhi r2,2049
800cfac: 10862e04 addi r2,r2,6328
800cfb0: 10800017 ldw r2,0(r2)
if (alt_ticks_per_second ())
800cfb4: 1005003a cmpeq r2,r2,zero
800cfb8: 1000411e bne r2,zero,800d0c0 <alt_alarm_start+0x138>
{
if (alarm)
800cfbc: e0bffb17 ldw r2,-20(fp)
800cfc0: 1005003a cmpeq r2,r2,zero
800cfc4: 10003b1e bne r2,zero,800d0b4 <alt_alarm_start+0x12c>
{
alarm->callback = callback;
800cfc8: e0fffb17 ldw r3,-20(fp)
800cfcc: e0bffd17 ldw r2,-12(fp)
800cfd0: 18800315 stw r2,12(r3)
alarm->context = context;
800cfd4: e0fffb17 ldw r3,-20(fp)
800cfd8: e0bffe17 ldw r2,-8(fp)
800cfdc: 18800515 stw r2,20(r3)
static ALT_INLINE alt_irq_context ALT_ALWAYS_INLINE
alt_irq_disable_all (void)
{
alt_irq_context context;
NIOS2_READ_STATUS (context);
800cfe0: 0005303a rdctl r2,status
800cfe4: e0bff815 stw r2,-32(fp)
NIOS2_WRITE_STATUS (context & ~NIOS2_STATUS_PIE_MSK);
800cfe8: e0fff817 ldw r3,-32(fp)
800cfec: 00bfff84 movi r2,-2
800cff0: 1884703a and r2,r3,r2
800cff4: 1001703a wrctl status,r2
return context;
800cff8: e0bff817 ldw r2,-32(fp)
irq_context = alt_irq_disable_all ();
800cffc: e0bffa15 stw r2,-24(fp)
* alt_nticks() returns the elapsed number of system clock ticks since reset.
*/
static ALT_INLINE alt_u32 ALT_ALWAYS_INLINE alt_nticks (void)
{
return _alt_nticks;
800d000: 00820074 movhi r2,2049
800d004: 10862f04 addi r2,r2,6332
800d008: 10800017 ldw r2,0(r2)
current_nticks = alt_nticks();
800d00c: e0bff915 stw r2,-28(fp)
alarm->time = nticks + current_nticks + 1;
800d010: e0fffc17 ldw r3,-16(fp)
800d014: e0bff917 ldw r2,-28(fp)
800d018: 1885883a add r2,r3,r2
800d01c: 10c00044 addi r3,r2,1
800d020: e0bffb17 ldw r2,-20(fp)
800d024: 10c00215 stw r3,8(r2)
/*
* If the desired alarm time causes a roll-over, set the rollover
* flag. This will prevent the subsequent tick event from causing
* an alarm too early.
*/
if(alarm->time < current_nticks)
800d028: e0bffb17 ldw r2,-20(fp)
800d02c: 10c00217 ldw r3,8(r2)
800d030: e0bff917 ldw r2,-28(fp)
800d034: 1880042e bgeu r3,r2,800d048 <alt_alarm_start+0xc0>
{
alarm->rollover = 1;
800d038: e0fffb17 ldw r3,-20(fp)
800d03c: 00800044 movi r2,1
800d040: 18800405 stb r2,16(r3)
800d044: 00000206 br 800d050 <alt_alarm_start+0xc8>
}
else
{
alarm->rollover = 0;
800d048: e0bffb17 ldw r2,-20(fp)
800d04c: 10000405 stb zero,16(r2)
}
alt_llist_insert (&alt_alarm_list, &alarm->llist);
800d050: e0fffb17 ldw r3,-20(fp)
800d054: 00820074 movhi r2,2049
800d058: 10bf5604 addi r2,r2,-680
800d05c: e0bff615 stw r2,-40(fp)
800d060: e0fff715 stw r3,-36(fp)
*/
static ALT_INLINE void ALT_ALWAYS_INLINE alt_llist_insert(alt_llist* list,
alt_llist* entry)
{
entry->previous = list;
800d064: e0fff717 ldw r3,-36(fp)
800d068: e0bff617 ldw r2,-40(fp)
800d06c: 18800115 stw r2,4(r3)
entry->next = list->next;
800d070: e0bff617 ldw r2,-40(fp)
800d074: 10c00017 ldw r3,0(r2)
800d078: e0bff717 ldw r2,-36(fp)
800d07c: 10c00015 stw r3,0(r2)
list->next->previous = entry;
800d080: e0bff617 ldw r2,-40(fp)
800d084: 10c00017 ldw r3,0(r2)
800d088: e0bff717 ldw r2,-36(fp)
800d08c: 18800115 stw r2,4(r3)
list->next = entry;
800d090: e0fff617 ldw r3,-40(fp)
800d094: e0bff717 ldw r2,-36(fp)
800d098: 18800015 stw r2,0(r3)
800d09c: e0bffa17 ldw r2,-24(fp)
800d0a0: e0bff515 stw r2,-44(fp)
status &= ~NIOS2_STATUS_PIE_MSK;
status |= (context & NIOS2_STATUS_PIE_MSK);
NIOS2_WRITE_STATUS (status);
#else
NIOS2_WRITE_STATUS (context);
800d0a4: e0bff517 ldw r2,-44(fp)
800d0a8: 1001703a wrctl status,r2
alt_irq_enable_all (irq_context);
return 0;
800d0ac: e03fff15 stw zero,-4(fp)
800d0b0: 00000506 br 800d0c8 <alt_alarm_start+0x140>
}
else
{
return -EINVAL;
800d0b4: 00bffa84 movi r2,-22
800d0b8: e0bfff15 stw r2,-4(fp)
800d0bc: 00000206 br 800d0c8 <alt_alarm_start+0x140>
}
}
else
{
return -ENOTSUP;
800d0c0: 00bfde84 movi r2,-134
800d0c4: e0bfff15 stw r2,-4(fp)
800d0c8: e0bfff17 ldw r2,-4(fp)
}
}
800d0cc: e037883a mov sp,fp
800d0d0: df000017 ldw fp,0(sp)
800d0d4: dec00104 addi sp,sp,4
800d0d8: f800283a ret
0800d0dc <alt_dcache_flush_all>:
/*
* alt_dcache_flush_all() is called to flush the entire data cache.
*/
void alt_dcache_flush_all (void)
{
800d0dc: deffff04 addi sp,sp,-4
800d0e0: df000015 stw fp,0(sp)
800d0e4: d839883a mov fp,sp
for (i = (char*) 0; i < (char*) NIOS2_DCACHE_SIZE; i+= NIOS2_DCACHE_LINE_SIZE)
{
__asm__ volatile ("flushd (%0)" :: "r" (i));
}
#endif /* NIOS2_DCACHE_SIZE > 0 */
}
800d0e8: e037883a mov sp,fp
800d0ec: df000017 ldw fp,0(sp)
800d0f0: dec00104 addi sp,sp,4
800d0f4: f800283a ret
0800d0f8 <alt_dev_llist_insert>:
/*
*
*/
int alt_dev_llist_insert (alt_dev_llist* dev, alt_llist* list)
{
800d0f8: defff904 addi sp,sp,-28
800d0fc: dfc00615 stw ra,24(sp)
800d100: df000515 stw fp,20(sp)
800d104: df000504 addi fp,sp,20
800d108: e13ffd15 stw r4,-12(fp)
800d10c: e17ffe15 stw r5,-8(fp)
/*
* check that the device exists, and that it has a valid name.
*/
if (!dev || !dev->name)
800d110: e0bffd17 ldw r2,-12(fp)
800d114: 1005003a cmpeq r2,r2,zero
800d118: 1000041e bne r2,zero,800d12c <alt_dev_llist_insert+0x34>
800d11c: e0bffd17 ldw r2,-12(fp)
800d120: 10800217 ldw r2,8(r2)
800d124: 1004c03a cmpne r2,r2,zero
800d128: 1000071e bne r2,zero,800d148 <alt_dev_llist_insert+0x50>
{
ALT_ERRNO = EINVAL;
800d12c: 800d1ac0 call 800d1ac <alt_get_errno>
800d130: 1007883a mov r3,r2
800d134: 00800584 movi r2,22
800d138: 18800015 stw r2,0(r3)
return -EINVAL;
800d13c: 00bffa84 movi r2,-22
800d140: e0bfff15 stw r2,-4(fp)
800d144: 00001306 br 800d194 <alt_dev_llist_insert+0x9c>
/*
* register the device.
*/
alt_llist_insert(list, &dev->llist);
800d148: e0fffd17 ldw r3,-12(fp)
800d14c: e0bffe17 ldw r2,-8(fp)
800d150: e0bffb15 stw r2,-20(fp)
800d154: e0fffc15 stw r3,-16(fp)
*/
static ALT_INLINE void ALT_ALWAYS_INLINE alt_llist_insert(alt_llist* list,
alt_llist* entry)
{
entry->previous = list;
800d158: e0fffc17 ldw r3,-16(fp)
800d15c: e0bffb17 ldw r2,-20(fp)
800d160: 18800115 stw r2,4(r3)
entry->next = list->next;
800d164: e0bffb17 ldw r2,-20(fp)
800d168: 10c00017 ldw r3,0(r2)
800d16c: e0bffc17 ldw r2,-16(fp)
800d170: 10c00015 stw r3,0(r2)
list->next->previous = entry;
800d174: e0bffb17 ldw r2,-20(fp)
800d178: 10c00017 ldw r3,0(r2)
800d17c: e0bffc17 ldw r2,-16(fp)
800d180: 18800115 stw r2,4(r3)
list->next = entry;
800d184: e0fffb17 ldw r3,-20(fp)
800d188: e0bffc17 ldw r2,-16(fp)
800d18c: 18800015 stw r2,0(r3)
return 0;
800d190: e03fff15 stw zero,-4(fp)
800d194: e0bfff17 ldw r2,-4(fp)
}
800d198: e037883a mov sp,fp
800d19c: dfc00117 ldw ra,4(sp)
800d1a0: df000017 ldw fp,0(sp)
800d1a4: dec00204 addi sp,sp,8
800d1a8: f800283a ret
0800d1ac <alt_get_errno>:
#undef errno
extern int errno;
static ALT_INLINE int* alt_get_errno(void)
{
800d1ac: defffd04 addi sp,sp,-12
800d1b0: dfc00215 stw ra,8(sp)
800d1b4: df000115 stw fp,4(sp)
800d1b8: df000104 addi fp,sp,4
return ((alt_errno) ? alt_errno() : &errno);
800d1bc: 00820074 movhi r2,2049
800d1c0: 10bf5304 addi r2,r2,-692
800d1c4: 10800017 ldw r2,0(r2)
800d1c8: 1005003a cmpeq r2,r2,zero
800d1cc: 1000061e bne r2,zero,800d1e8 <alt_get_errno+0x3c>
800d1d0: 00820074 movhi r2,2049
800d1d4: 10bf5304 addi r2,r2,-692
800d1d8: 10800017 ldw r2,0(r2)
800d1dc: 103ee83a callr r2
800d1e0: e0bfff15 stw r2,-4(fp)
800d1e4: 00000306 br 800d1f4 <alt_get_errno+0x48>
800d1e8: 00820074 movhi r2,2049
800d1ec: 10862904 addi r2,r2,6308
800d1f0: e0bfff15 stw r2,-4(fp)
800d1f4: e0bfff17 ldw r2,-4(fp)
}
800d1f8: e037883a mov sp,fp
800d1fc: dfc00117 ldw ra,4(sp)
800d200: df000017 ldw fp,0(sp)
800d204: dec00204 addi sp,sp,8
800d208: f800283a ret
0800d20c <_do_ctors>:
/*
* Run the C++ static constructors.
*/
void _do_ctors(void)
{
800d20c: defffd04 addi sp,sp,-12
800d210: dfc00215 stw ra,8(sp)
800d214: df000115 stw fp,4(sp)
800d218: df000104 addi fp,sp,4
constructor* ctor;
for (ctor = &__CTOR_END__[-1]; ctor >= __CTOR_LIST__; ctor--)
800d21c: 00bfff04 movi r2,-4
800d220: 00c20074 movhi r3,2049
800d224: 18f70804 addi r3,r3,-9184
800d228: 1885883a add r2,r3,r2
800d22c: e0bfff15 stw r2,-4(fp)
800d230: 00000606 br 800d24c <_do_ctors+0x40>
(*ctor) ();
800d234: e0bfff17 ldw r2,-4(fp)
800d238: 10800017 ldw r2,0(r2)
800d23c: 103ee83a callr r2
void _do_ctors(void)
{
constructor* ctor;
for (ctor = &__CTOR_END__[-1]; ctor >= __CTOR_LIST__; ctor--)
800d240: e0bfff17 ldw r2,-4(fp)
800d244: 10bfff04 addi r2,r2,-4
800d248: e0bfff15 stw r2,-4(fp)
800d24c: e0ffff17 ldw r3,-4(fp)
800d250: 00820074 movhi r2,2049
800d254: 10b70704 addi r2,r2,-9188
800d258: 18bff62e bgeu r3,r2,800d234 <_do_ctors+0x28>
(*ctor) ();
}
800d25c: e037883a mov sp,fp
800d260: dfc00117 ldw ra,4(sp)
800d264: df000017 ldw fp,0(sp)
800d268: dec00204 addi sp,sp,8
800d26c: f800283a ret
0800d270 <_do_dtors>:
/*
* Run the C++ static destructors.
*/
void _do_dtors(void)
{
800d270: defffd04 addi sp,sp,-12
800d274: dfc00215 stw ra,8(sp)
800d278: df000115 stw fp,4(sp)
800d27c: df000104 addi fp,sp,4
destructor* dtor;
for (dtor = &__DTOR_END__[-1]; dtor >= __DTOR_LIST__; dtor--)
800d280: 00bfff04 movi r2,-4
800d284: 00c20074 movhi r3,2049
800d288: 18f70804 addi r3,r3,-9184
800d28c: 1885883a add r2,r3,r2
800d290: e0bfff15 stw r2,-4(fp)
800d294: 00000606 br 800d2b0 <_do_dtors+0x40>
(*dtor) ();
800d298: e0bfff17 ldw r2,-4(fp)
800d29c: 10800017 ldw r2,0(r2)
800d2a0: 103ee83a callr r2
void _do_dtors(void)
{
destructor* dtor;
for (dtor = &__DTOR_END__[-1]; dtor >= __DTOR_LIST__; dtor--)
800d2a4: e0bfff17 ldw r2,-4(fp)
800d2a8: 10bfff04 addi r2,r2,-4
800d2ac: e0bfff15 stw r2,-4(fp)
800d2b0: e0ffff17 ldw r3,-4(fp)
800d2b4: 00820074 movhi r2,2049
800d2b8: 10b70804 addi r2,r2,-9184
800d2bc: 18bff62e bgeu r3,r2,800d298 <_do_dtors+0x28>
(*dtor) ();
}
800d2c0: e037883a mov sp,fp
800d2c4: dfc00117 ldw ra,4(sp)
800d2c8: df000017 ldw fp,0(sp)
800d2cc: dec00204 addi sp,sp,8
800d2d0: f800283a ret
0800d2d4 <alt_find_dev>:
* "name" must be an exact match for the devices registered name for a match to
* be found.
*/
alt_dev* alt_find_dev(const char* name, alt_llist* llist)
{
800d2d4: defff904 addi sp,sp,-28
800d2d8: dfc00615 stw ra,24(sp)
800d2dc: df000515 stw fp,20(sp)
800d2e0: df000504 addi fp,sp,20
800d2e4: e13ffd15 stw r4,-12(fp)
800d2e8: e17ffe15 stw r5,-8(fp)
alt_dev* next = (alt_dev*) llist->next;
800d2ec: e0bffe17 ldw r2,-8(fp)
800d2f0: 10800017 ldw r2,0(r2)
800d2f4: e0bffc15 stw r2,-16(fp)
alt_32 len;
len = strlen(name) + 1;
800d2f8: e13ffd17 ldw r4,-12(fp)
800d2fc: 80072840 call 8007284 <strlen>
800d300: 10800044 addi r2,r2,1
800d304: e0bffb15 stw r2,-20(fp)
/*
* Check each list entry in turn, until a match is found, or we reach the
* end of the list (i.e. next winds up pointing back to the list head).
*/
while (next != (alt_dev*) llist)
800d308: 00000d06 br 800d340 <alt_find_dev+0x6c>
/*
* memcmp() is used here rather than strcmp() in order to reduce the size
* of the executable.
*/
if (!memcmp (next->name, name, len))
800d30c: e0bffc17 ldw r2,-16(fp)
800d310: 11000217 ldw r4,8(r2)
800d314: e1bffb17 ldw r6,-20(fp)
800d318: e17ffd17 ldw r5,-12(fp)
800d31c: 800d8600 call 800d860 <memcmp>
800d320: 1004c03a cmpne r2,r2,zero
800d324: 1000031e bne r2,zero,800d334 <alt_find_dev+0x60>
{
/* match found */
return next;
800d328: e0bffc17 ldw r2,-16(fp)
800d32c: e0bfff15 stw r2,-4(fp)
800d330: 00000706 br 800d350 <alt_find_dev+0x7c>
}
next = (alt_dev*) next->llist.next;
800d334: e0bffc17 ldw r2,-16(fp)
800d338: 10800017 ldw r2,0(r2)
800d33c: e0bffc15 stw r2,-16(fp)
/*
* Check each list entry in turn, until a match is found, or we reach the
* end of the list (i.e. next winds up pointing back to the list head).
*/
while (next != (alt_dev*) llist)
800d340: e0fffe17 ldw r3,-8(fp)
800d344: e0bffc17 ldw r2,-16(fp)
800d348: 10fff01e bne r2,r3,800d30c <alt_find_dev+0x38>
next = (alt_dev*) next->llist.next;
}
/* No match found */
return NULL;
800d34c: e03fff15 stw zero,-4(fp)
800d350: e0bfff17 ldw r2,-4(fp)
}
800d354: e037883a mov sp,fp
800d358: dfc00117 ldw ra,4(sp)
800d35c: df000017 ldw fp,0(sp)
800d360: dec00204 addi sp,sp,8
800d364: f800283a ret
0800d368 <alt_icache_flush_all>:
/*
* alt_icache_flush_all() is called to flush the entire instruction cache.
*/
void alt_icache_flush_all (void)
{
800d368: deffff04 addi sp,sp,-4
800d36c: df000015 stw fp,0(sp)
800d370: d839883a mov fp,sp
#if NIOS2_ICACHE_SIZE > 0
alt_icache_flush (0, NIOS2_ICACHE_SIZE);
#endif
}
800d374: e037883a mov sp,fp
800d378: df000017 ldw fp,0(sp)
800d37c: dec00104 addi sp,sp,4
800d380: f800283a ret
0800d384 <alt_ic_isr_register>:
* @param irq IRQ number
* @return 0 if successful, else error (-1)
*/
int alt_ic_isr_register(alt_u32 ic_id, alt_u32 irq, alt_isr_func isr,
void *isr_context, void *flags)
{
800d384: defff904 addi sp,sp,-28
800d388: dfc00615 stw ra,24(sp)
800d38c: df000515 stw fp,20(sp)
800d390: df000504 addi fp,sp,20
800d394: e13ffc15 stw r4,-16(fp)
800d398: e17ffd15 stw r5,-12(fp)
800d39c: e1bffe15 stw r6,-8(fp)
800d3a0: e1ffff15 stw r7,-4(fp)
return alt_iic_isr_register(ic_id, irq, isr, isr_context, flags);
800d3a4: e0800217 ldw r2,8(fp)
800d3a8: d8800015 stw r2,0(sp)
800d3ac: e13ffc17 ldw r4,-16(fp)
800d3b0: e17ffd17 ldw r5,-12(fp)
800d3b4: e1bffe17 ldw r6,-8(fp)
800d3b8: e1ffff17 ldw r7,-4(fp)
800d3bc: 800d5580 call 800d558 <alt_iic_isr_register>
}
800d3c0: e037883a mov sp,fp
800d3c4: dfc00117 ldw ra,4(sp)
800d3c8: df000017 ldw fp,0(sp)
800d3cc: dec00204 addi sp,sp,8
800d3d0: f800283a ret
0800d3d4 <alt_ic_irq_enable>:
* @param ic_id Ignored.
* @param irq IRQ number
* @return 0 if successful, else error (-1)
*/
int alt_ic_irq_enable (alt_u32 ic_id, alt_u32 irq)
{
800d3d4: defff904 addi sp,sp,-28
800d3d8: df000615 stw fp,24(sp)
800d3dc: df000604 addi fp,sp,24
800d3e0: e13ffe15 stw r4,-8(fp)
800d3e4: e17fff15 stw r5,-4(fp)
800d3e8: e0bfff17 ldw r2,-4(fp)
800d3ec: e0bffc15 stw r2,-16(fp)
static ALT_INLINE alt_irq_context ALT_ALWAYS_INLINE
alt_irq_disable_all (void)
{
alt_irq_context context;
NIOS2_READ_STATUS (context);
800d3f0: 0005303a rdctl r2,status
800d3f4: e0bffb15 stw r2,-20(fp)
NIOS2_WRITE_STATUS (context & ~NIOS2_STATUS_PIE_MSK);
800d3f8: e0fffb17 ldw r3,-20(fp)
800d3fc: 00bfff84 movi r2,-2
800d400: 1884703a and r2,r3,r2
800d404: 1001703a wrctl status,r2
return context;
800d408: e0bffb17 ldw r2,-20(fp)
static ALT_INLINE int ALT_ALWAYS_INLINE alt_irq_enable (alt_u32 id)
{
alt_irq_context status;
extern volatile alt_u32 alt_irq_active;
status = alt_irq_disable_all ();
800d40c: e0bffd15 stw r2,-12(fp)
alt_irq_active |= (1 << id);
800d410: e0fffc17 ldw r3,-16(fp)
800d414: 00800044 movi r2,1
800d418: 10c4983a sll r2,r2,r3
800d41c: 1007883a mov r3,r2
800d420: 00820074 movhi r2,2049
800d424: 10862d04 addi r2,r2,6324
800d428: 10800017 ldw r2,0(r2)
800d42c: 1886b03a or r3,r3,r2
800d430: 00820074 movhi r2,2049
800d434: 10862d04 addi r2,r2,6324
800d438: 10c00015 stw r3,0(r2)
NIOS2_WRITE_IENABLE (alt_irq_active);
800d43c: 00820074 movhi r2,2049
800d440: 10862d04 addi r2,r2,6324
800d444: 10800017 ldw r2,0(r2)
800d448: 100170fa wrctl ienable,r2
800d44c: e0bffd17 ldw r2,-12(fp)
800d450: e0bffa15 stw r2,-24(fp)
status &= ~NIOS2_STATUS_PIE_MSK;
status |= (context & NIOS2_STATUS_PIE_MSK);
NIOS2_WRITE_STATUS (status);
#else
NIOS2_WRITE_STATUS (context);
800d454: e0bffa17 ldw r2,-24(fp)
800d458: 1001703a wrctl status,r2
alt_irq_enable_all(status);
return 0;
800d45c: 0005883a mov r2,zero
return alt_irq_enable(irq);
}
800d460: e037883a mov sp,fp
800d464: df000017 ldw fp,0(sp)
800d468: dec00104 addi sp,sp,4
800d46c: f800283a ret
0800d470 <alt_ic_irq_disable>:
* @param ic_id Ignored.
* @param irq IRQ number
* @return 0 if successful, else error (-1)
*/
int alt_ic_irq_disable(alt_u32 ic_id, alt_u32 irq)
{
800d470: defff904 addi sp,sp,-28
800d474: df000615 stw fp,24(sp)
800d478: df000604 addi fp,sp,24
800d47c: e13ffe15 stw r4,-8(fp)
800d480: e17fff15 stw r5,-4(fp)
800d484: e0bfff17 ldw r2,-4(fp)
800d488: e0bffc15 stw r2,-16(fp)
static ALT_INLINE alt_irq_context ALT_ALWAYS_INLINE
alt_irq_disable_all (void)
{
alt_irq_context context;
NIOS2_READ_STATUS (context);
800d48c: 0005303a rdctl r2,status
800d490: e0bffb15 stw r2,-20(fp)
NIOS2_WRITE_STATUS (context & ~NIOS2_STATUS_PIE_MSK);
800d494: e0fffb17 ldw r3,-20(fp)
800d498: 00bfff84 movi r2,-2
800d49c: 1884703a and r2,r3,r2
800d4a0: 1001703a wrctl status,r2
return context;
800d4a4: e0bffb17 ldw r2,-20(fp)
static ALT_INLINE int ALT_ALWAYS_INLINE alt_irq_disable (alt_u32 id)
{
alt_irq_context status;
extern volatile alt_u32 alt_irq_active;
status = alt_irq_disable_all ();
800d4a8: e0bffd15 stw r2,-12(fp)
alt_irq_active &= ~(1 << id);
800d4ac: e0fffc17 ldw r3,-16(fp)
800d4b0: 00800044 movi r2,1
800d4b4: 10c4983a sll r2,r2,r3
800d4b8: 0084303a nor r2,zero,r2
800d4bc: 1007883a mov r3,r2
800d4c0: 00820074 movhi r2,2049
800d4c4: 10862d04 addi r2,r2,6324
800d4c8: 10800017 ldw r2,0(r2)
800d4cc: 1886703a and r3,r3,r2
800d4d0: 00820074 movhi r2,2049
800d4d4: 10862d04 addi r2,r2,6324
800d4d8: 10c00015 stw r3,0(r2)
NIOS2_WRITE_IENABLE (alt_irq_active);
800d4dc: 00820074 movhi r2,2049
800d4e0: 10862d04 addi r2,r2,6324
800d4e4: 10800017 ldw r2,0(r2)
800d4e8: 100170fa wrctl ienable,r2
800d4ec: e0bffd17 ldw r2,-12(fp)
800d4f0: e0bffa15 stw r2,-24(fp)
status &= ~NIOS2_STATUS_PIE_MSK;
status |= (context & NIOS2_STATUS_PIE_MSK);
NIOS2_WRITE_STATUS (status);
#else
NIOS2_WRITE_STATUS (context);
800d4f4: e0bffa17 ldw r2,-24(fp)
800d4f8: 1001703a wrctl status,r2
alt_irq_enable_all(status);
return 0;
800d4fc: 0005883a mov r2,zero
return alt_irq_disable(irq);
}
800d500: e037883a mov sp,fp
800d504: df000017 ldw fp,0(sp)
800d508: dec00104 addi sp,sp,4
800d50c: f800283a ret
0800d510 <alt_ic_irq_enabled>:
* @param irq IRQ number
* @return Zero if corresponding interrupt is disabled and
* non-zero otherwise.
*/
alt_u32 alt_ic_irq_enabled(alt_u32 ic_id, alt_u32 irq)
{
800d510: defffc04 addi sp,sp,-16
800d514: df000315 stw fp,12(sp)
800d518: df000304 addi fp,sp,12
800d51c: e13ffe15 stw r4,-8(fp)
800d520: e17fff15 stw r5,-4(fp)
alt_u32 irq_enabled;
NIOS2_READ_IENABLE(irq_enabled);
800d524: 000530fa rdctl r2,ienable
800d528: e0bffd15 stw r2,-12(fp)
return (irq_enabled & (1 << irq)) ? 1: 0;
800d52c: e0ffff17 ldw r3,-4(fp)
800d530: 00800044 movi r2,1
800d534: 10c4983a sll r2,r2,r3
800d538: 1007883a mov r3,r2
800d53c: e0bffd17 ldw r2,-12(fp)
800d540: 1884703a and r2,r3,r2
800d544: 1004c03a cmpne r2,r2,zero
}
800d548: e037883a mov sp,fp
800d54c: df000017 ldw fp,0(sp)
800d550: dec00104 addi sp,sp,4
800d554: f800283a ret
0800d558 <alt_iic_isr_register>:
* @param flags
* @return 0 if successful, else error (-1)
*/
int alt_iic_isr_register(alt_u32 ic_id, alt_u32 irq, alt_isr_func isr,
void *isr_context, void *flags)
{
800d558: defff404 addi sp,sp,-48
800d55c: dfc00b15 stw ra,44(sp)
800d560: df000a15 stw fp,40(sp)
800d564: df000a04 addi fp,sp,40
800d568: e13ffb15 stw r4,-20(fp)
800d56c: e17ffc15 stw r5,-16(fp)
800d570: e1bffd15 stw r6,-12(fp)
800d574: e1fffe15 stw r7,-8(fp)
int rc = -EINVAL;
800d578: 00bffa84 movi r2,-22
800d57c: e0bffa15 stw r2,-24(fp)
int id = irq; /* IRQ interpreted as the interrupt ID. */
800d580: e0bffc17 ldw r2,-16(fp)
800d584: e0bff915 stw r2,-28(fp)
alt_irq_context status;
if (id < ALT_NIRQ)
800d588: e0bff917 ldw r2,-28(fp)
800d58c: 10800808 cmpgei r2,r2,32
800d590: 1000291e bne r2,zero,800d638 <alt_iic_isr_register+0xe0>
static ALT_INLINE alt_irq_context ALT_ALWAYS_INLINE
alt_irq_disable_all (void)
{
alt_irq_context context;
NIOS2_READ_STATUS (context);
800d594: 0005303a rdctl r2,status
800d598: e0bff715 stw r2,-36(fp)
NIOS2_WRITE_STATUS (context & ~NIOS2_STATUS_PIE_MSK);
800d59c: e0fff717 ldw r3,-36(fp)
800d5a0: 00bfff84 movi r2,-2
800d5a4: 1884703a and r2,r3,r2
800d5a8: 1001703a wrctl status,r2
return context;
800d5ac: e0bff717 ldw r2,-36(fp)
* interrupts are disabled while the handler tables are updated to ensure
* that an interrupt doesn't occur while the tables are in an inconsistant
* state.
*/
status = alt_irq_disable_all();
800d5b0: e0bff815 stw r2,-32(fp)
alt_irq[id].handler = isr;
800d5b4: e0bff917 ldw r2,-28(fp)
800d5b8: 00c20074 movhi r3,2049
800d5bc: 18c63a04 addi r3,r3,6376
800d5c0: 100490fa slli r2,r2,3
800d5c4: 10c7883a add r3,r2,r3
800d5c8: e0bffd17 ldw r2,-12(fp)
800d5cc: 18800015 stw r2,0(r3)
alt_irq[id].context = isr_context;
800d5d0: e0bff917 ldw r2,-28(fp)
800d5d4: 00c20074 movhi r3,2049
800d5d8: 18c63a04 addi r3,r3,6376
800d5dc: 100490fa slli r2,r2,3
800d5e0: 10c5883a add r2,r2,r3
800d5e4: 10c00104 addi r3,r2,4
800d5e8: e0bffe17 ldw r2,-8(fp)
800d5ec: 18800015 stw r2,0(r3)
rc = (isr) ? alt_ic_irq_enable(ic_id, id) : alt_ic_irq_disable(ic_id, id);
800d5f0: e0bffd17 ldw r2,-12(fp)
800d5f4: 1005003a cmpeq r2,r2,zero
800d5f8: 1000051e bne r2,zero,800d610 <alt_iic_isr_register+0xb8>
800d5fc: e17ff917 ldw r5,-28(fp)
800d600: e13ffb17 ldw r4,-20(fp)
800d604: 800d3d40 call 800d3d4 <alt_ic_irq_enable>
800d608: e0bfff15 stw r2,-4(fp)
800d60c: 00000406 br 800d620 <alt_iic_isr_register+0xc8>
800d610: e17ff917 ldw r5,-28(fp)
800d614: e13ffb17 ldw r4,-20(fp)
800d618: 800d4700 call 800d470 <alt_ic_irq_disable>
800d61c: e0bfff15 stw r2,-4(fp)
800d620: e0bfff17 ldw r2,-4(fp)
800d624: e0bffa15 stw r2,-24(fp)
800d628: e0bff817 ldw r2,-32(fp)
800d62c: e0bff615 stw r2,-40(fp)
status &= ~NIOS2_STATUS_PIE_MSK;
status |= (context & NIOS2_STATUS_PIE_MSK);
NIOS2_WRITE_STATUS (status);
#else
NIOS2_WRITE_STATUS (context);
800d630: e0bff617 ldw r2,-40(fp)
800d634: 1001703a wrctl status,r2
alt_irq_enable_all(status);
}
return rc;
800d638: e0bffa17 ldw r2,-24(fp)
}
800d63c: e037883a mov sp,fp
800d640: dfc00117 ldw ra,4(sp)
800d644: df000017 ldw fp,0(sp)
800d648: dec00204 addi sp,sp,8
800d64c: f800283a ret
0800d650 <alt_alarm_stop>:
* alarms. Alternatively an alarm can unregister itself by returning zero when
* the alarm executes.
*/
void alt_alarm_stop (alt_alarm* alarm)
{
800d650: defffa04 addi sp,sp,-24
800d654: df000515 stw fp,20(sp)
800d658: df000504 addi fp,sp,20
800d65c: e13fff15 stw r4,-4(fp)
static ALT_INLINE alt_irq_context ALT_ALWAYS_INLINE
alt_irq_disable_all (void)
{
alt_irq_context context;
NIOS2_READ_STATUS (context);
800d660: 0005303a rdctl r2,status
800d664: e0bffd15 stw r2,-12(fp)
NIOS2_WRITE_STATUS (context & ~NIOS2_STATUS_PIE_MSK);
800d668: e0fffd17 ldw r3,-12(fp)
800d66c: 00bfff84 movi r2,-2
800d670: 1884703a and r2,r3,r2
800d674: 1001703a wrctl status,r2
return context;
800d678: e0bffd17 ldw r2,-12(fp)
alt_irq_context irq_context;
irq_context = alt_irq_disable_all();
800d67c: e0bffe15 stw r2,-8(fp)
alt_llist_remove (&alarm->llist);
800d680: e0bfff17 ldw r2,-4(fp)
800d684: e0bffc15 stw r2,-16(fp)
* input argument is the element to remove.
*/
static ALT_INLINE void ALT_ALWAYS_INLINE alt_llist_remove(alt_llist* entry)
{
entry->next->previous = entry->previous;
800d688: e0bffc17 ldw r2,-16(fp)
800d68c: 10c00017 ldw r3,0(r2)
800d690: e0bffc17 ldw r2,-16(fp)
800d694: 10800117 ldw r2,4(r2)
800d698: 18800115 stw r2,4(r3)
entry->previous->next = entry->next;
800d69c: e0bffc17 ldw r2,-16(fp)
800d6a0: 10c00117 ldw r3,4(r2)
800d6a4: e0bffc17 ldw r2,-16(fp)
800d6a8: 10800017 ldw r2,0(r2)
800d6ac: 18800015 stw r2,0(r3)
/*
* Set the entry to point to itself, so that any further calls to
* alt_llist_remove() are harmless.
*/
entry->previous = entry;
800d6b0: e0fffc17 ldw r3,-16(fp)
800d6b4: e0bffc17 ldw r2,-16(fp)
800d6b8: 18800115 stw r2,4(r3)
entry->next = entry;
800d6bc: e0fffc17 ldw r3,-16(fp)
800d6c0: e0bffc17 ldw r2,-16(fp)
800d6c4: 18800015 stw r2,0(r3)
800d6c8: e0bffe17 ldw r2,-8(fp)
800d6cc: e0bffb15 stw r2,-20(fp)
status &= ~NIOS2_STATUS_PIE_MSK;
status |= (context & NIOS2_STATUS_PIE_MSK);
NIOS2_WRITE_STATUS (status);
#else
NIOS2_WRITE_STATUS (context);
800d6d0: e0bffb17 ldw r2,-20(fp)
800d6d4: 1001703a wrctl status,r2
alt_irq_enable_all (irq_context);
}
800d6d8: e037883a mov sp,fp
800d6dc: df000017 ldw fp,0(sp)
800d6e0: dec00104 addi sp,sp,4
800d6e4: f800283a ret
0800d6e8 <alt_tick>:
*
* alt_tick() is expected to run at interrupt level.
*/
void alt_tick (void)
{
800d6e8: defffb04 addi sp,sp,-20
800d6ec: dfc00415 stw ra,16(sp)
800d6f0: df000315 stw fp,12(sp)
800d6f4: df000304 addi fp,sp,12
alt_alarm* next;
alt_alarm* alarm = (alt_alarm*) alt_alarm_list.next;
800d6f8: d0a00e17 ldw r2,-32712(gp)
800d6fc: e0bffe15 stw r2,-8(fp)
alt_u32 next_callback;
/* update the tick counter */
_alt_nticks++;
800d700: d0a6e717 ldw r2,-25700(gp)
800d704: 10800044 addi r2,r2,1
800d708: d0a6e715 stw r2,-25700(gp)
/* process the registered callbacks */
while (alarm != (alt_alarm*) &alt_alarm_list)
800d70c: 00003106 br 800d7d4 <alt_tick+0xec>
{
next = (alt_alarm*) alarm->llist.next;
800d710: e0bffe17 ldw r2,-8(fp)
800d714: 10800017 ldw r2,0(r2)
800d718: e0bfff15 stw r2,-4(fp)
/*
* Upon the tick-counter rolling over it is safe to clear the
* roll-over flag; once the flag is cleared this (or subsequnt)
* tick events are enabled to generate an alarm event.
*/
if ((alarm->rollover) && (_alt_nticks == 0))
800d71c: e0bffe17 ldw r2,-8(fp)
800d720: 10800403 ldbu r2,16(r2)
800d724: 10803fcc andi r2,r2,255
800d728: 1005003a cmpeq r2,r2,zero
800d72c: 1000051e bne r2,zero,800d744 <alt_tick+0x5c>
800d730: d0a6e717 ldw r2,-25700(gp)
800d734: 1004c03a cmpne r2,r2,zero
800d738: 1000021e bne r2,zero,800d744 <alt_tick+0x5c>
{
alarm->rollover = 0;
800d73c: e0bffe17 ldw r2,-8(fp)
800d740: 10000405 stb zero,16(r2)
}
/* if the alarm period has expired, make the callback */
if ((alarm->time <= _alt_nticks) && (alarm->rollover == 0))
800d744: e0bffe17 ldw r2,-8(fp)
800d748: 10c00217 ldw r3,8(r2)
800d74c: d0a6e717 ldw r2,-25700(gp)
800d750: 10c01e36 bltu r2,r3,800d7cc <alt_tick+0xe4>
800d754: e0bffe17 ldw r2,-8(fp)
800d758: 10800403 ldbu r2,16(r2)
800d75c: 10803fcc andi r2,r2,255
800d760: 1004c03a cmpne r2,r2,zero
800d764: 1000191e bne r2,zero,800d7cc <alt_tick+0xe4>
{
next_callback = alarm->callback (alarm->context);
800d768: e0bffe17 ldw r2,-8(fp)
800d76c: 10c00317 ldw r3,12(r2)
800d770: e0bffe17 ldw r2,-8(fp)
800d774: 11000517 ldw r4,20(r2)
800d778: 183ee83a callr r3
800d77c: e0bffd15 stw r2,-12(fp)
/* deactivate the alarm if the return value is zero */
if (next_callback == 0)
800d780: e0bffd17 ldw r2,-12(fp)
800d784: 1004c03a cmpne r2,r2,zero
800d788: 1000031e bne r2,zero,800d798 <alt_tick+0xb0>
{
alt_alarm_stop (alarm);
800d78c: e13ffe17 ldw r4,-8(fp)
800d790: 800d6500 call 800d650 <alt_alarm_stop>
800d794: 00000d06 br 800d7cc <alt_tick+0xe4>
}
else
{
alarm->time += next_callback;
800d798: e0bffe17 ldw r2,-8(fp)
800d79c: 10c00217 ldw r3,8(r2)
800d7a0: e0bffd17 ldw r2,-12(fp)
800d7a4: 1887883a add r3,r3,r2
800d7a8: e0bffe17 ldw r2,-8(fp)
800d7ac: 10c00215 stw r3,8(r2)
/*
* If the desired alarm time causes a roll-over, set the rollover
* flag. This will prevent the subsequent tick event from causing
* an alarm too early.
*/
if(alarm->time < _alt_nticks)
800d7b0: e0bffe17 ldw r2,-8(fp)
800d7b4: 10c00217 ldw r3,8(r2)
800d7b8: d0a6e717 ldw r2,-25700(gp)
800d7bc: 1880032e bgeu r3,r2,800d7cc <alt_tick+0xe4>
{
alarm->rollover = 1;
800d7c0: e0fffe17 ldw r3,-8(fp)
800d7c4: 00800044 movi r2,1
800d7c8: 18800405 stb r2,16(r3)
}
}
}
alarm = next;
800d7cc: e0bfff17 ldw r2,-4(fp)
800d7d0: e0bffe15 stw r2,-8(fp)
_alt_nticks++;
/* process the registered callbacks */
while (alarm != (alt_alarm*) &alt_alarm_list)
800d7d4: d0e00e04 addi r3,gp,-32712
800d7d8: e0bffe17 ldw r2,-8(fp)
800d7dc: 10ffcc1e bne r2,r3,800d710 <alt_tick+0x28>
/*
* Update the operating system specific timer facilities.
*/
ALT_OS_TIME_TICK();
}
800d7e0: e037883a mov sp,fp
800d7e4: dfc00117 ldw ra,4(sp)
800d7e8: df000017 ldw fp,0(sp)
800d7ec: dec00204 addi sp,sp,8
800d7f0: f800283a ret
0800d7f4 <altera_nios2_qsys_irq_init>:
/*
* To initialize the internal interrupt controller, just clear the IENABLE
* register so that all possible IRQs are disabled.
*/
void altera_nios2_qsys_irq_init(void)
{
800d7f4: deffff04 addi sp,sp,-4
800d7f8: df000015 stw fp,0(sp)
800d7fc: d839883a mov fp,sp
NIOS2_WRITE_IENABLE(0);
800d800: 000170fa wrctl ienable,zero
}
800d804: e037883a mov sp,fp
800d808: df000017 ldw fp,0(sp)
800d80c: dec00104 addi sp,sp,4
800d810: f800283a ret
0800d814 <atexit>:
800d814: 200b883a mov r5,r4
800d818: 000d883a mov r6,zero
800d81c: 0009883a mov r4,zero
800d820: 000f883a mov r7,zero
800d824: 800d8d41 jmpi 800d8d4 <__register_exitproc>
0800d828 <exit>:
800d828: defffe04 addi sp,sp,-8
800d82c: 000b883a mov r5,zero
800d830: dc000015 stw r16,0(sp)
800d834: dfc00115 stw ra,4(sp)
800d838: 2021883a mov r16,r4
800d83c: 800da0c0 call 800da0c <__call_exitprocs>
800d840: 00820074 movhi r2,2049
800d844: 10bf4904 addi r2,r2,-732
800d848: 11000017 ldw r4,0(r2)
800d84c: 20800f17 ldw r2,60(r4)
800d850: 10000126 beq r2,zero,800d858 <exit+0x30>
800d854: 103ee83a callr r2
800d858: 8009883a mov r4,r16
800d85c: 800dbfc0 call 800dbfc <_exit>
0800d860 <memcmp>:
800d860: 00c000c4 movi r3,3
800d864: 1980032e bgeu r3,r6,800d874 <memcmp+0x14>
800d868: 2144b03a or r2,r4,r5
800d86c: 10c4703a and r2,r2,r3
800d870: 10000f26 beq r2,zero,800d8b0 <memcmp+0x50>
800d874: 31ffffc4 addi r7,r6,-1
800d878: 3000061e bne r6,zero,800d894 <memcmp+0x34>
800d87c: 00000a06 br 800d8a8 <memcmp+0x48>
800d880: 39ffffc4 addi r7,r7,-1
800d884: 00bfffc4 movi r2,-1
800d888: 21000044 addi r4,r4,1
800d88c: 29400044 addi r5,r5,1
800d890: 38800526 beq r7,r2,800d8a8 <memcmp+0x48>
800d894: 20c00003 ldbu r3,0(r4)
800d898: 28800003 ldbu r2,0(r5)
800d89c: 18bff826 beq r3,r2,800d880 <memcmp+0x20>
800d8a0: 1885c83a sub r2,r3,r2
800d8a4: f800283a ret
800d8a8: 0005883a mov r2,zero
800d8ac: f800283a ret
800d8b0: 180f883a mov r7,r3
800d8b4: 20c00017 ldw r3,0(r4)
800d8b8: 28800017 ldw r2,0(r5)
800d8bc: 18bfed1e bne r3,r2,800d874 <memcmp+0x14>
800d8c0: 31bfff04 addi r6,r6,-4
800d8c4: 21000104 addi r4,r4,4
800d8c8: 29400104 addi r5,r5,4
800d8cc: 39bff936 bltu r7,r6,800d8b4 <memcmp+0x54>
800d8d0: 003fe806 br 800d874 <memcmp+0x14>
0800d8d4 <__register_exitproc>:
800d8d4: defffa04 addi sp,sp,-24
800d8d8: 00820074 movhi r2,2049
800d8dc: 10bf4904 addi r2,r2,-732
800d8e0: dc000015 stw r16,0(sp)
800d8e4: 14000017 ldw r16,0(r2)
800d8e8: dd000415 stw r20,16(sp)
800d8ec: 2829883a mov r20,r5
800d8f0: 81405217 ldw r5,328(r16)
800d8f4: dcc00315 stw r19,12(sp)
800d8f8: dc800215 stw r18,8(sp)
800d8fc: dc400115 stw r17,4(sp)
800d900: dfc00515 stw ra,20(sp)
800d904: 2023883a mov r17,r4
800d908: 3027883a mov r19,r6
800d90c: 3825883a mov r18,r7
800d910: 28002526 beq r5,zero,800d9a8 <__register_exitproc+0xd4>
800d914: 29000117 ldw r4,4(r5)
800d918: 008007c4 movi r2,31
800d91c: 11002716 blt r2,r4,800d9bc <__register_exitproc+0xe8>
800d920: 8800101e bne r17,zero,800d964 <__register_exitproc+0x90>
800d924: 2105883a add r2,r4,r4
800d928: 1085883a add r2,r2,r2
800d92c: 20c00044 addi r3,r4,1
800d930: 1145883a add r2,r2,r5
800d934: 0009883a mov r4,zero
800d938: 15000215 stw r20,8(r2)
800d93c: 28c00115 stw r3,4(r5)
800d940: 2005883a mov r2,r4
800d944: dfc00517 ldw ra,20(sp)
800d948: dd000417 ldw r20,16(sp)
800d94c: dcc00317 ldw r19,12(sp)
800d950: dc800217 ldw r18,8(sp)
800d954: dc400117 ldw r17,4(sp)
800d958: dc000017 ldw r16,0(sp)
800d95c: dec00604 addi sp,sp,24
800d960: f800283a ret
800d964: 29802204 addi r6,r5,136
800d968: 00800044 movi r2,1
800d96c: 110e983a sll r7,r2,r4
800d970: 30c04017 ldw r3,256(r6)
800d974: 2105883a add r2,r4,r4
800d978: 1085883a add r2,r2,r2
800d97c: 1185883a add r2,r2,r6
800d980: 19c6b03a or r3,r3,r7
800d984: 14802015 stw r18,128(r2)
800d988: 14c00015 stw r19,0(r2)
800d98c: 00800084 movi r2,2
800d990: 30c04015 stw r3,256(r6)
800d994: 88bfe31e bne r17,r2,800d924 <__register_exitproc+0x50>
800d998: 30804117 ldw r2,260(r6)
800d99c: 11c4b03a or r2,r2,r7
800d9a0: 30804115 stw r2,260(r6)
800d9a4: 003fdf06 br 800d924 <__register_exitproc+0x50>
800d9a8: 00820074 movhi r2,2049
800d9ac: 10867a04 addi r2,r2,6632
800d9b0: 100b883a mov r5,r2
800d9b4: 80805215 stw r2,328(r16)
800d9b8: 003fd606 br 800d914 <__register_exitproc+0x40>
800d9bc: 00800034 movhi r2,0
800d9c0: 10800004 addi r2,r2,0
800d9c4: 1000021e bne r2,zero,800d9d0 <__register_exitproc+0xfc>
800d9c8: 013fffc4 movi r4,-1
800d9cc: 003fdc06 br 800d940 <__register_exitproc+0x6c>
800d9d0: 01006404 movi r4,400
800d9d4: 103ee83a callr r2
800d9d8: 1007883a mov r3,r2
800d9dc: 103ffa26 beq r2,zero,800d9c8 <__register_exitproc+0xf4>
800d9e0: 80805217 ldw r2,328(r16)
800d9e4: 180b883a mov r5,r3
800d9e8: 18000115 stw zero,4(r3)
800d9ec: 18800015 stw r2,0(r3)
800d9f0: 80c05215 stw r3,328(r16)
800d9f4: 18006215 stw zero,392(r3)
800d9f8: 18006315 stw zero,396(r3)
800d9fc: 0009883a mov r4,zero
800da00: 883fc826 beq r17,zero,800d924 <__register_exitproc+0x50>
800da04: 003fd706 br 800d964 <__register_exitproc+0x90>
0800da08 <register_fini>:
800da08: f800283a ret
0800da0c <__call_exitprocs>:
800da0c: 00820074 movhi r2,2049
800da10: 10bf4904 addi r2,r2,-732
800da14: 10800017 ldw r2,0(r2)
800da18: defff304 addi sp,sp,-52
800da1c: df000b15 stw fp,44(sp)
800da20: d8800115 stw r2,4(sp)
800da24: 00800034 movhi r2,0
800da28: 10800004 addi r2,r2,0
800da2c: 1005003a cmpeq r2,r2,zero
800da30: d8800215 stw r2,8(sp)
800da34: d8800117 ldw r2,4(sp)
800da38: dd400815 stw r21,32(sp)
800da3c: dd000715 stw r20,28(sp)
800da40: 10805204 addi r2,r2,328
800da44: dfc00c15 stw ra,48(sp)
800da48: ddc00a15 stw r23,40(sp)
800da4c: dd800915 stw r22,36(sp)
800da50: dcc00615 stw r19,24(sp)
800da54: dc800515 stw r18,20(sp)
800da58: dc400415 stw r17,16(sp)
800da5c: dc000315 stw r16,12(sp)
800da60: 282b883a mov r21,r5
800da64: 2039883a mov fp,r4
800da68: d8800015 stw r2,0(sp)
800da6c: 2829003a cmpeq r20,r5,zero
800da70: d8800117 ldw r2,4(sp)
800da74: 14405217 ldw r17,328(r2)
800da78: 88001026 beq r17,zero,800dabc <__call_exitprocs+0xb0>
800da7c: ddc00017 ldw r23,0(sp)
800da80: 88800117 ldw r2,4(r17)
800da84: 8c802204 addi r18,r17,136
800da88: 143fffc4 addi r16,r2,-1
800da8c: 80000916 blt r16,zero,800dab4 <__call_exitprocs+0xa8>
800da90: 05bfffc4 movi r22,-1
800da94: a000151e bne r20,zero,800daec <__call_exitprocs+0xe0>
800da98: 8409883a add r4,r16,r16
800da9c: 2105883a add r2,r4,r4
800daa0: 1485883a add r2,r2,r18
800daa4: 10c02017 ldw r3,128(r2)
800daa8: a8c01126 beq r21,r3,800daf0 <__call_exitprocs+0xe4>
800daac: 843fffc4 addi r16,r16,-1
800dab0: 85bff81e bne r16,r22,800da94 <__call_exitprocs+0x88>
800dab4: d8800217 ldw r2,8(sp)
800dab8: 10003126 beq r2,zero,800db80 <__call_exitprocs+0x174>
800dabc: dfc00c17 ldw ra,48(sp)
800dac0: df000b17 ldw fp,44(sp)
800dac4: ddc00a17 ldw r23,40(sp)
800dac8: dd800917 ldw r22,36(sp)
800dacc: dd400817 ldw r21,32(sp)
800dad0: dd000717 ldw r20,28(sp)
800dad4: dcc00617 ldw r19,24(sp)
800dad8: dc800517 ldw r18,20(sp)
800dadc: dc400417 ldw r17,16(sp)
800dae0: dc000317 ldw r16,12(sp)
800dae4: dec00d04 addi sp,sp,52
800dae8: f800283a ret
800daec: 8409883a add r4,r16,r16
800daf0: 88c00117 ldw r3,4(r17)
800daf4: 2105883a add r2,r4,r4
800daf8: 1445883a add r2,r2,r17
800dafc: 18ffffc4 addi r3,r3,-1
800db00: 11800217 ldw r6,8(r2)
800db04: 1c001526 beq r3,r16,800db5c <__call_exitprocs+0x150>
800db08: 10000215 stw zero,8(r2)
800db0c: 303fe726 beq r6,zero,800daac <__call_exitprocs+0xa0>
800db10: 00c00044 movi r3,1
800db14: 1c06983a sll r3,r3,r16
800db18: 90804017 ldw r2,256(r18)
800db1c: 8cc00117 ldw r19,4(r17)
800db20: 1884703a and r2,r3,r2
800db24: 10001426 beq r2,zero,800db78 <__call_exitprocs+0x16c>
800db28: 90804117 ldw r2,260(r18)
800db2c: 1884703a and r2,r3,r2
800db30: 10000c1e bne r2,zero,800db64 <__call_exitprocs+0x158>
800db34: 2105883a add r2,r4,r4
800db38: 1485883a add r2,r2,r18
800db3c: 11400017 ldw r5,0(r2)
800db40: e009883a mov r4,fp
800db44: 303ee83a callr r6
800db48: 88800117 ldw r2,4(r17)
800db4c: 98bfc81e bne r19,r2,800da70 <__call_exitprocs+0x64>
800db50: b8800017 ldw r2,0(r23)
800db54: 147fd526 beq r2,r17,800daac <__call_exitprocs+0xa0>
800db58: 003fc506 br 800da70 <__call_exitprocs+0x64>
800db5c: 8c000115 stw r16,4(r17)
800db60: 003fea06 br 800db0c <__call_exitprocs+0x100>
800db64: 2105883a add r2,r4,r4
800db68: 1485883a add r2,r2,r18
800db6c: 11000017 ldw r4,0(r2)
800db70: 303ee83a callr r6
800db74: 003ff406 br 800db48 <__call_exitprocs+0x13c>
800db78: 303ee83a callr r6
800db7c: 003ff206 br 800db48 <__call_exitprocs+0x13c>
800db80: 88800117 ldw r2,4(r17)
800db84: 1000081e bne r2,zero,800dba8 <__call_exitprocs+0x19c>
800db88: 89000017 ldw r4,0(r17)
800db8c: 20000726 beq r4,zero,800dbac <__call_exitprocs+0x1a0>
800db90: b9000015 stw r4,0(r23)
800db94: 8809883a mov r4,r17
800db98: 00000000 call 0 <__alt_mem_sdram_0-0x8000000>
800db9c: bc400017 ldw r17,0(r23)
800dba0: 883fb71e bne r17,zero,800da80 <__call_exitprocs+0x74>
800dba4: 003fc506 br 800dabc <__call_exitprocs+0xb0>
800dba8: 89000017 ldw r4,0(r17)
800dbac: 882f883a mov r23,r17
800dbb0: 2023883a mov r17,r4
800dbb4: 883fb21e bne r17,zero,800da80 <__call_exitprocs+0x74>
800dbb8: 003fc006 br 800dabc <__call_exitprocs+0xb0>
0800dbbc <alt_sim_halt>:
/*
* Routine called on exit.
*/
static ALT_ALWAYS_INLINE void alt_sim_halt(int exit_code)
{
800dbbc: defffd04 addi sp,sp,-12
800dbc0: df000215 stw fp,8(sp)
800dbc4: df000204 addi fp,sp,8
800dbc8: e13fff15 stw r4,-4(fp)
int r2 = exit_code;
800dbcc: e0bfff17 ldw r2,-4(fp)
800dbd0: e0bffe15 stw r2,-8(fp)
__asm__ volatile ("\n0:\n\taddi %0,%0, -1\n\tbgt %0,zero,0b" : : "r" (ALT_CPU_FREQ/100) ); /* Delay for >30ms */
__asm__ volatile ("break 2" : : "D02"(r2), "D03"(r3) ALT_GMON_DATA );
#else /* !DEBUG_STUB */
if (r2) {
800dbd4: e0bffe17 ldw r2,-8(fp)
800dbd8: 1005003a cmpeq r2,r2,zero
800dbdc: 1000021e bne r2,zero,800dbe8 <alt_sim_halt+0x2c>
ALT_SIM_FAIL();
800dbe0: 002af070 cmpltui zero,zero,43969
800dbe4: 00000106 br 800dbec <alt_sim_halt+0x30>
} else {
ALT_SIM_PASS();
800dbe8: 002af0b0 cmpltui zero,zero,43970
}
#endif /* DEBUG_STUB */
}
800dbec: e037883a mov sp,fp
800dbf0: df000017 ldw fp,0(sp)
800dbf4: dec00104 addi sp,sp,4
800dbf8: f800283a ret
0800dbfc <_exit>:
*
* ALT_EXIT is mapped onto the _exit() system call in alt_syscall.h
*/
void ALT_EXIT (int exit_code)
{
800dbfc: defffd04 addi sp,sp,-12
800dc00: dfc00215 stw ra,8(sp)
800dc04: df000115 stw fp,4(sp)
800dc08: df000104 addi fp,sp,4
800dc0c: e13fff15 stw r4,-4(fp)
ALT_OS_STOP();
/* Provide notification to the simulator that we've stopped */
ALT_LOG_PRINT_BOOT("[alt_exit.c] Calling ALT_SIM_HALT().\r\n");
ALT_SIM_HALT(exit_code);
800dc10: e13fff17 ldw r4,-4(fp)
800dc14: 800dbbc0 call 800dbbc <alt_sim_halt>
/* spin forever, since there's no where to go back to */
ALT_LOG_PRINT_BOOT("[alt_exit.c] Spinning forever.\r\n");
while (1);
800dc18: 003fff06 br 800dc18 <_exit+0x1c>
800dc1c: 0800da08 cmpgei zero,at,872
| ObjDump | 4 | UCR-CS179-SUMMER2014/NES_FPGA | source/NES_FPGA/software/nios_vga_test2/nios_vga_test2.objdump | [
"MIT"
] |
_dry var
"oneart.wav" diskin 0.5 *
48 mtof 0.5 saw
53 mtof 0.5 saw +
58 mtof 0.5 saw +
60 mtof 0.5 saw +
-5 ampdb *
1.0 talkbox
_dry set
_dry get dup 0.97 10000 revsc + -20 ampdb * dcblk
_dry get 0.5 0.7 delay -6 ampdb * 1000 butlp +
_dry get +
| SourcePawn | 3 | brandenbyers/Sporth | examples/talkbox.sp | [
"MIT"
] |
class Mixin {
def mixin_method {
'mixed_in_found
}
}
class ClassWithMixin {
def normal_method {
'normal_found
}
}
class ClassWithNoMixin {
read_slots: ['foo, 'bar, 'baz]
write_slots: ['hello, 'world]
read_write_slots: ['oh, 'noes]
def normal_method {
'new_normal_found
}
}
class ClassWithPrivate {
def public_method {
"public!"
}
def protected_method {
"protected!"
}
protected: 'protected_method
def private_method {
"private!"
}
private: 'private_method
}
require: "stringio"
FancySpec describe: Class with: {
it: "does NOT find the method when not mixed-in" with: 'responds_to?: when: {
instance = ClassWithMixin new
instance normal_method . is: 'normal_found
instance responds_to?: 'normal_method . is: true
instance responds_to?: 'mixin_method . is: false
}
it: "finds the method when mixed-in" with: 'include: when: {
# => include Mixin into ClassWithMixin
class ClassWithMixin {
include: Mixin
}
instance = ClassWithMixin new
instance responds_to?: 'normal_method . is: true
instance responds_to?: 'mixin_method . is: true
instance normal_method . is: 'normal_found
instance mixin_method . is: 'mixed_in_found
}
it: "rebinds the old class name with ClassWithNoMixin and replace the old normal_method" when: {
instance = ClassWithMixin new
instance normal_method is: 'normal_found
# rebind the class to the other class
ClassWithMixin = ClassWithNoMixin
instance = ClassWithMixin new
instance normal_method is: 'new_normal_found
}
it: "has dynamically generated getter and setter methods" with: 'responds_to?: when: {
instance = ClassWithNoMixin new
instance responds_to?: 'foo . is: true
instance responds_to?: 'bar . is: true
instance responds_to?: 'baz . is: true
instance responds_to?: "hello:" . is: true
instance responds_to?: "world:" . is: true
instance responds_to?: 'oh . is: true
instance responds_to?: ":oh" . is: true
instance responds_to?: 'noes . is: true
instance responds_to?: "noes:" . is: true
}
it: "defines getter methods for single slots" with: 'read_slot: when: {
class Getters {
read_slot: 'foo
read_slot: 'bar
}
g = Getters new
g responds_to?: 'foo . is: true
g responds_to?: 'foo: . is: false
g responds_to?: 'bar . is: true
g responds_to?: 'bar: . is: false
}
it: "defines setter methods for single slots" with: 'write_slot: when: {
class Setters {
write_slot: 'foo
write_slot: 'bar
}
s = Setters new
s responds_to?: 'foo . is: false
s responds_to?: 'foo: . is: true
s responds_to?: 'bar . is: false
s responds_to?: 'bar: . is: true
}
it: "defines getter & setter methods for single slots" with: 'read_write_slot: when: {
class GettersAndSetters {
read_write_slot: 'foo
read_write_slot: 'bar
}
gs = GettersAndSetters new
gs responds_to?: 'foo . is: true
gs responds_to?: 'foo: . is: true
gs responds_to?: 'bar . is: true
gs responds_to?: 'bar: . is: true
}
it: "finds the instance variable correctly" when: {
class AClass {
def initialize: foo {
@foo = foo
}
def foo {
@foo
}
}
str = "instance value"
instance = AClass new: str
instance foo is: str
AClass new foo is: nil
}
it: "finds the class variable correctly" when: {
class AClass {
def foo: foo {
@@foo = foo
}
def foo {
@@foo
}
}
instance1 = AClass new
instance2 = AClass new
str = "class value"
instance1 foo: str
instance1 foo is: str
instance2 foo is: str
instance2 foo is: (instance1 foo)
str2 = "another value"
instance2 foo: str2
instance2 foo is: str2
instance1 foo is: str2
}
it: "has correct method overloading for method names with and without an argument" when: {
class AClass {
def foo {
foo: "None!"
}
def foo: bar {
"In AClass#foo: with bar = " ++ bar
}
}
instance = AClass new
instance foo is: "In AClass#foo: with bar = None!"
instance foo: "Test!" . is: "In AClass#foo: with bar = Test!"
}
it: "calls a superclass method by using super" when: {
class SuperClass {
read_slots: ['name]
def initialize: name {
@name = name
}
}
class SubClass : SuperClass {
read_slots: ['age]
def initialize: age {
super initialize: "SubClass"
@age = age
}
def initialize {
initialize: 0
}
}
sub = SubClass new: 42
sub name is: "SubClass"
sub age is: 42
sub2 = SubClass new
sub2 name is: "SubClass"
sub2 age is: 0
}
it: "returns its superclass" when: {
Fixnum superclass is: Integer
Symbol superclass is: Object
StdError superclass is: Exception
Class superclass is: Module
Object superclass is: BasicObject
BasicObject superclass is: nil
IOError superclass is: StandardError
NoMethodError superclass is: NameError
}
it: "creates a new Class dynamically" when: {
x = Class new
x is_a?: Class . is: true
x new is_a?: x . is: true
x new is_a?: Object . is: true
x new class is: x
# Symbol as superclass
y = Class new: String
y is_a?: Class . is: true
y new is_a?: String . is: true
y new is_a?: Object . is: true
}
it: "only is able to call the public method from outside the Class" when: {
x = ClassWithPrivate new
x public_method is: "public!"
try {
x private_method is: nil # is fail
} catch NoMethodError => e {
e method_name is: 'private_method
}
try {
x protected_method is: nil # is fail
} catch NoMethodError => e {
e method_name is: 'protected_method
}
}
it: "is a subclass of another Class" with: 'subclass?: when: {
class Super
class Sub : Super
Super subclass?: Object . is: true
Sub subclass?: Object . is: true
Sub subclass?: Super . is: true
Super subclass?: Sub . is: nil
}
it: "dynamically creates a subclass of another class" with: 'is_a?: when: {
subclass = String subclass: {
def foo {
"hello, world!"
}
}
subclass is_a?: Class . is: true
subclass subclass?: String . is: true
subclass new is_a?: subclass . is: true
subclass new foo is: "hello, world!"
# now the same with Class##new:body:
subclass2 = Class superclass: String body: {
def foo {
"hello, world, again!"
}
}
subclass2 is_a?: Class . is: true
subclass2 subclass?: String . is: true
subclass2 new is_a?: subclass2 . is: true
subclass2 new foo is: "hello, world, again!"
}
it: "undefines an instance method" with: 'undefine_method: when: {
class Foo {
def instance_method {
"instance method!"
}
}
f = Foo new
f instance_method is: "instance method!"
Foo undefine_method: 'instance_method
try {
f instance_method is: nil # is not get here
} catch NoMethodError => e {
e method_name is: 'instance_method
}
}
it: "undefines a class method" with: 'undefine_class_method: when: {
class Foo {
def self class_method {
"class method!"
}
}
Foo class_method is: "class method!"
try {
Foo undefine_method: 'class_method
true is: nil # is not happen
} catch NameError {
true is: true
}
Foo undefine_class_method: 'class_method
try {
Foo class_method is: nil # is not get here
} catch NoMethodError => e {
e method_name is: 'class_method
}
}
it: "has nested classes" when: {
class Outer {
class Inner {
class InnerMost {
def foobar {
"foobar!"
}
}
}
}
Outer is_a?: Class . is: true
Outer Inner is_a?: Class . is: true
Outer Inner InnerMost is_a?: Class . is: true
obj = Outer Inner InnerMost new
obj foobar is: "foobar!"
# change InnerMost#foobar
class Outer::Inner::InnerMost {
def foobar {
"oh no!"
}
}
obj foobar is: "oh no!"
}
it: "does not override existing classes with the same name in a nested class" when: {
StdArray = Array
class NameSpace {
class Array {
def Array what_am_i {
"not the same as the standard Array class"
}
}
}
NameSpace Array what_am_i is: "not the same as the standard Array class"
NameSpace Array is_not: Array
}
it: "returns all nested classes of a class" with: 'nested_classes when: {
class OuterB {
NotAClass = 'nope
}
OuterB nested_classes is: $ Set[[]]
class OuterB {
class InnerB1 {
}
}
OuterB nested_classes is: $ Set[[OuterB::InnerB1]]
class OuterB {
class InnerB2 {
}
}
OuterB nested_classes is: $ Set[[OuterB InnerB1, OuterB InnerB2]]
}
it: "finds other nested classes in the same parent class" when: {
class MyOuter {
class Inner1 {
def method1 {
'method_1
}
}
class Inner2 {
include: Inner1
def method2 {
'method_2
}
}
}
MyOuter Inner1 new method1 is: 'method_1
MyOuter Inner2 new method1 is: 'method_1
MyOuter Inner2 new method2 is: 'method_2
}
it: "finds itself in it's own methods, even if nested into another class" when: {
class MyOuter {
class MyInner1 {
def method1 {
MyInner1
}
def self class_method1 {
MyInner1
}
}
class MyInner2 {
def method2 {
[MyInner1, MyInner2]
}
def self class_method2 {
[MyInner1, MyInner2]
}
}
}
MyOuter MyInner1 new method1 is: MyOuter MyInner1
MyOuter MyInner2 new method2 is: [MyOuter MyInner1, MyOuter MyInner2]
MyOuter MyInner1 class_method1 is: MyOuter MyInner1
MyOuter MyInner2 class_method2 is: [MyOuter MyInner1, MyOuter MyInner2]
}
it: "has an alias method as defined" with: 'alias_method:for: when: {
class AClass {
def foo {
"in foo!"
}
alias_method: 'bar for: 'foo
}
obj = AClass new
obj foo is: "in foo!"
obj bar is: "in foo!"
}
it: "has an alias method for a ruby method defined" with: 'alias_method:for_ruby: when: {
try {
[] equal?: [1,2] . is: true # is fail
} catch NoMethodError => e {
e message does =~ /equal\?:/
}
class Array {
alias_method: 'equal?: for_ruby: 'equal?
}
[] equal?: [1,2] . is: false
}
it: "has the correct list of ancestors" with: 'ancestors when: {
class A
class B : A
class C : B
A ancestors is: [A, Object, Kernel, BasicObject]
B ancestors is: [B, A, Object, Kernel, BasicObject]
C ancestors is: [C, B, A, Object, Kernel, BasicObject]
}
it: "makes methods private" with: 'private: when: {
class AClassWithPrivateMethods {
def a {
"in a"
}
def b {
"in b"
}
private: ['a, 'b]
}
x = AClassWithPrivateMethods new
{ x a } raises: NoMethodError
{ x b } raises: NoMethodError
AClassWithPrivateMethods instance_method: 'a . private? is: true
AClassWithPrivateMethods instance_method: 'b . private? is: true
class AClassWithPrivateMethods {
private: {
def c {
"private c"
}
def d {
"private d"
}
}
}
AClassWithPrivateMethods instance_method: 'c . private? is: true
AClassWithPrivateMethods instance_method: 'd . private? is: true
}
it: "makes methods protected" with: 'protected: when: {
class AClassWithProtectedMethods {
def a {
"in a"
}
def b {
"in b"
}
protected: ['a, 'b]
}
x = AClassWithProtectedMethods new
{ x a } raises: NoMethodError
{ x b } raises: NoMethodError
AClassWithProtectedMethods instance_method: 'a . private? is: false
AClassWithProtectedMethods instance_method: 'b . private? is: false
AClassWithProtectedMethods instance_method: 'a . protected? is: true
AClassWithProtectedMethods instance_method: 'b . protected? is: true
class AClassWithProtectedMethods {
protected: {
def c {
"in c"
}
def d {
"in d"
}
}
}
{ x a } raises: NoMethodError
{ x b } raises: NoMethodError
AClassWithProtectedMethods instance_method: 'c . private? is: false
AClassWithProtectedMethods instance_method: 'd . private? is: false
AClassWithProtectedMethods instance_method: 'c . protected? is: true
AClassWithProtectedMethods instance_method: 'd . protected? is: true
}
it: "makes methods public" with: 'public: when: {
class AClassWithPublicMethods {
def a {
"in a"
}
def b {
"in b"
}
private: ['a, 'b]
public: ['a, 'b] # making sure Class#public: works.
}
x = AClassWithPublicMethods new
{ x a } does_not raise: NoMethodError
{ x b } does_not raise: NoMethodError
AClassWithPublicMethods instance_method: 'a . private? is: false
AClassWithPublicMethods instance_method: 'b . private? is: false
AClassWithPublicMethods instance_method: 'a . protected? is: false
AClassWithPublicMethods instance_method: 'b . protected? is: false
AClassWithPublicMethods instance_method: 'a . public? is: true
AClassWithPublicMethods instance_method: 'b . public? is: true
class AClassWithPublicMethods {
public: {
def c {
"in c"
}
def d {
"in d"
}
}
}
{ x c } does_not raise: NoMethodError
{ x d } does_not raise: NoMethodError
AClassWithPublicMethods instance_method: 'c . private? is: false
AClassWithPublicMethods instance_method: 'd . private? is: false
AClassWithPublicMethods instance_method: 'c . protected? is: false
AClassWithPublicMethods instance_method: 'd . protected? is: false
AClassWithPublicMethods instance_method: 'c . public? is: true
AClassWithPublicMethods instance_method: 'd . public? is: true
}
it: "defines a class without a body" when: {
class Foo
Foo is_a?: Class . is: true
Foo new is_a?: Foo . is: true
class FooNew : Foo
FooNew is_a?: Class . is: true
FooNew ancestors includes?: Foo . is: true
FooNew new is_a?: Foo . is: true
}
it: "defines a class with empty methods" when: {
class Foo
class Bar : Foo {
def initialize: @bar
def empty_method
def to_s {
@bar + "bar"
}
}
b = Bar new: "foo"
b to_s is: "foobar"
b empty_method is: nil
}
class WithConstants {
Foo = "foo"
Bar = "bar"
class Nested
}
it: "returns its nested constants" with: 'constants when: {
WithConstants constants =? ['Foo, 'Bar, 'Nested] is: true
}
it: "returns a constants value" with: '[] when: {
WithConstants["Foo"] is: "foo"
WithConstants["Foo"] is: WithConstants Foo
WithConstants["Bar"] is: "bar"
WithConstants["Bar"] is: WithConstants Bar
WithConstants["Nested"] is_a?: Class . is: true
WithConstants["Nested"] is: WithConstants Nested
}
it: "sets a constants value" with: '[]: when: {
Kernel["Object"] is: Object
{ Kernel["Something"] } raises: NameError
Kernel["Something"]: Array
{ Kernel["Something"] is: Array } does_not raise: NameError
}
it: "delegates methods correctly" with: 'delegate:to_slot: when: {
class Delegation {
delegate: ('[], '[]:, '<<, 'to_s, 'to_s:, 'inspect, 'each:in_between:) to_slot: 'object
def initialize: @object
}
d = Delegation new: "hello, world!"
d to_s is: "hello, world!"
d inspect is: $ "hello, world!" inspect
d = Delegation new: 2
d to_s is: "2"
d inspect is: "2"
d to_s: 2 . is: "10"
d = Delegation new: [1,2,3]
d << 5
d get_slot: 'object . is: [1,2,3,5]
d << nil
d get_slot: 'object . is: [1,2,3,5, nil]
d[2]: "foo"
d get_slot: 'object . is: [1,2,"foo",5,nil]
d[1] is: 2
}
it: "allows delegating only a single method" with: 'delegate:to_slot: when: {
class Delegation {
delegate: 'to_s to_slot: 'number
read_write_slot: 'number
}
d = Delegation new
d number: 5
d to_s is: $ 5 to_s
}
it: "defines a lazy slot" with: 'lazy_slot:value: when: {
class LazyClass {
read_slot: 'count
lazy_slot: 'foo value: { @count = @count + 1; 42 }
def initialize {
@count = 0
}
}
f = LazyClass new
f count is: 0
f foo is: 42
f count is: 1
f foo is: 42
f count is: 1
10 times: { f foo }
f count is: 1
}
it: "returns a string representation of itself and its superclass, if any" with: 'inspect when: {
class MySuperClass
class MySubClass : MySuperClass
Fixnum inspect is: "Fixnum : Integer"
MySuperClass inspect is: "MySuperClass : Object"
MySubClass inspect is: "MySubClass : MySuperClass"
Object inspect is: "Object : BasicObject"
BasicObject inspect is: "BasicObject"
}
it: "returns the right amount of instance methods" with: 'instance_methods: when: {
class NoMethods
class OneMethod {
def bar
}
NoMethods instance_methods: false . size is: 0
OneMethod instance_methods: false . size is: 1
NoMethods instance_methods is: $ Object instance_methods
Set[OneMethod instance_methods] is: $ Set[Object instance_methods + (OneMethod instance_methods: false)]
}
it: "returns all fancy instance methods" with: 'fancy_instance_methods when: {
eval("class RubyClass < BasicObject\ndef ruby_foo(x)\nputs(x)\nend\nend")
class RubyClass {
def fancy_foo: x {
x println
}
}
RubyClass fancy_instance_methods is: ['fancy_foo:]
}
it: "returns all ruby instance methods" with: 'ruby_instance_methods when: {
eval("class RubyClass < BasicObject\ndef ruby_foo(x)\nputs(x)\nend\nend")
class RubyClass {
def fancy_foo: x {
x println
}
}
RubyClass ruby_instance_methods is: $ \
RubyClass instance_methods - ['fancy_foo:]
}
# it: "defines a before_method handler" with: 'before_method:run: when: {
# class BeforeMethodClass {
# read_slot: 'x
# def initialize: @x
# def before: arr {
# arr << "Before Method: #{@x}"
# }
# def my_method: arr {
# arr << "My Method: #{@x}"
# }
# before_method: 'my_method: run: 'before:
# }
# b1 = BeforeMethodClass new: 1
# b2 = BeforeMethodClass new: 2
# array = []
# b1 my_method: array
# b2 my_method: array
# array is: [
# "Before Method: 1", "My Method: 1",
# "Before Method: 2", "My Method: 2"
# ]
# # we can also pass blocks
# BeforeMethodClass before_method: 'my_method: run: |receiver array| {
# array << "Before Block: #{receiver x}"
# }
# array = []
# b1 my_method: array
# b2 my_method: array
# array is: [
# "Before Block: 1", "Before Method: 1", "My Method: 1",
# "Before Block: 2", "Before Method: 2", "My Method: 2"
# ]
# }
# it: "defines an after_method handler" with: 'after_method:run: when: {
# class AfterMethodClass {
# read_slot: 'x
# def initialize: @x
# def after: arr {
# arr << "After Method: #{@x}"
# }
# def my_method: arr {
# arr << "My Method: #{@x}"
# }
# after_method: 'my_method: run: 'after:
# }
# b1 = AfterMethodClass new: 1
# b2 = AfterMethodClass new: 2
# array = []
# b1 my_method: array
# b2 my_method: array
# array is: [
# "My Method: 1", "After Method: 1",
# "My Method: 2", "After Method: 2"
# ]
# AfterMethodClass after_method: 'my_method: run: |receiver array| {
# "block getting called yo"
# array << "After Block: #{receiver x}"
# }
# array = []
# b1 my_method: array
# b2 my_method: array
# array is: [
# "My Method: 1", "After Method: 1", "After Block: 1",
# "My Method: 2", "After Method: 2", "After Block: 2"
# ]
# }
# it: "defines an around_method handler" with: 'around_method:run: when: {
# class AroundMethodClass {
# read_slot: 'x
# def initialize: @x
# def around: arr {
# arr << "Around Method: #{@x}"
# }
# def my_method: arr {
# arr << "My Method: #{@x}"
# }
# around_method: 'my_method: run: 'around:
# }
# b1 = AroundMethodClass new: 1
# b2 = AroundMethodClass new: 2
# array = []
# b1 my_method: array
# b2 my_method: array
# array is: [
# "Around Method: 1", "My Method: 1", "Around Method: 1",
# "Around Method: 2", "My Method: 2", "Around Method: 2"
# ]
# AroundMethodClass around_method: 'my_method: run: |receiver array| {
# array << "Around Block: #{receiver x}"
# }
# array = []
# b1 my_method: array
# b2 my_method: array
# array is: [
# "Around Block: 1", "Around Method: 1", "My Method: 1", "Around Method: 1", "Around Block: 1",
# "Around Block: 2", "Around Method: 2", "My Method: 2", "Around Method: 2", "Around Block: 2"
# ]
# }
# it: "defines a custom calling chain for a method" with: 'define_calling_chain:for_method: when: {
# class CallingChainClass {
# def foo: arr { arr << "foo" }
# def bar: arr { arr << "bar" }
# def baz: arr { arr << "baz" }
# define_calling_chain: ('foo:, 'bar:, 'baz:) for_method: 'foo:
# }
# arr = []
# CallingChainClass new foo: arr
# arr is: ["foo", "bar", "baz"]
# CallingChainClass define_calling_chain: [|receiver arr|{ receiver baz: arr }, 'bar:] for_method: 'bar:
# arr = []
# CallingChainClass new bar: arr
# arr is: ["baz", "bar"]
# }
it: "exposes a Fancy method as a Ruby method to Ruby" with: 'expose_to_ruby:as: when: {
class ExposeToRuby {
def my_method { "in my_method" }
expose_to_ruby: 'my_method
def == other { true }
expose_to_ruby: '== as: 'ruby_==
}
ExposeToRuby new tap: @{
my_method is: "in my_method"
send('my_method) is: "in my_method"
== 1 is: true
send('ruby_==, 1) is: true
}
}
it: "rebinds an instance method within a block" with: 'rebind_instance_method:with:within: when: {
class RebindInstanceMethod {
def foo: msg ("foo!") {
msg println
}
def bar: msg {
"bar: #{msg}" println
}
}
rim = RebindInstanceMethod new
s = StringIO new
let: '*stdout* be: s in: {
rim foo
rim foo: "hello!"
s string is: "foo!\nhello!\n"
s string: ""
RebindInstanceMethod rebind_instance_method: 'foo: with: |msg| {
msg * 2 println
} within: {
let: '*stdout* be: s in: {
rim foo: "hello!"
}
}
s string is: "hello!hello!\n"
s string: ""
rim foo: "hello!"
s string is: "hello!\n"
s string: ""
RebindInstanceMethod rebind_instance_method: 'foo: with: 'bar: within: {
rim foo: "Test"
}
s string is: "bar: Test\n"
}
}
it: "removes defined slot accessor methods" with: 'remove_slot_accessors_for: when: {
class SlotAccessors {
read_write_slots: ('rw1, 'rw2)
read_slots: ('r1, 'r2)
write_slots: ('w1, 'w2)
}
sa = SlotAccessors new
{
sa rw1 is: nil
sa rw2 is: nil
sa r1 is: nil
sa r2 is: nil
sa rw1: "rw1"
sa rw2: "rw2"
sa w1: "w1"
sa w2: "w2"
sa rw1 is: "rw1"
sa rw2 is: "rw2"
sa r1 is: nil
sa r2 is: nil
} does_not raise: NoMethodError
{ sa w1 } raises: NoMethodError
{ sa w2 } raises: NoMethodError
SlotAccessors remove_slot_accessors_for: ('rw1, 'r1, 'w1)
{ sa rw1 } raises: NoMethodError
{ sa rw1: "foo"} raises: NoMethodError
{
sa rw2
sa rw2: "foo"
} does_not raise: NoMethodError
{ sa r1 } raises: NoMethodError
{ sa r2 } does_not raise: NoMethodError
{ sa w1 } raises: NoMethodError
{ sa w1: "foo" } raises: NoMethodError
{ sa w2 } raises: NoMethodError
{ sa w2: "foo" } does_not raise: NoMethodError
}
}
| Fancy | 5 | bakkdoor/fancy | tests/class.fy | [
"BSD-3-Clause"
] |
//
// MetalConvolution.metal
// MNN
//
// Created by MNN on 2018/08/22.
// Copyright © 2018, Alibaba Group Holding Limited
//
#include <metal_stdlib>
#include "MetalConvolutionActivation.metal"
using namespace metal;
using namespace MNN;
#define CONV_UNROLL (4)
#define CONV_MUL_PACK_W2(x,y) \
x += FLOAT4(in00 * k00);\
y += FLOAT4(in01 * k00);\
x += FLOAT4(in01 * k01);\
y += FLOAT4(in02 * k01);\
x += FLOAT4(in02 * k02);\
y += FLOAT4(in03 * k02);\
\
x += FLOAT4(in10 * k10);\
y += FLOAT4(in11 * k10);\
x += FLOAT4(in11 * k11);\
y += FLOAT4(in12 * k11);\
x += FLOAT4(in12 * k12);\
y += FLOAT4(in13 * k12);\
\
x += FLOAT4(in20 * k20);\
y += FLOAT4(in21 * k20);\
x += FLOAT4(in21 * k21);\
y += FLOAT4(in22 * k21);\
x += FLOAT4(in22 * k22);\
y += FLOAT4(in23 * k22);
#define CONV_NEXT_FLT \
z_wt += ws; \
\
k00 = z_wt[0], k01 = z_wt[1], k02 = z_wt[2];\
k10 = z_wt[3], k11 = z_wt[4], k12 = z_wt[5];\
k20 = z_wt[6], k21 = z_wt[7], k22 = z_wt[8];
#define CONV_MUL_PACK_H2(x,y) \
x += FLOAT4(in10 * k00);\
y += FLOAT4(in11 * k00);\
x += FLOAT4(in11 * k01);\
y += FLOAT4(in12 * k01);\
x += FLOAT4(in12 * k02);\
y += FLOAT4(in13 * k02);\
\
x += FLOAT4(in20 * k10);\
y += FLOAT4(in21 * k10);\
x += FLOAT4(in21 * k11);\
y += FLOAT4(in22 * k11);\
x += FLOAT4(in22 * k12);\
y += FLOAT4(in23 * k12);\
\
x += FLOAT4(in30 * k20);\
y += FLOAT4(in31 * k20);\
x += FLOAT4(in31 * k21);\
y += FLOAT4(in32 * k21);\
x += FLOAT4(in32 * k22);\
y += FLOAT4(in33 * k22);
struct conv_constants {
int input_width;
int input_height;
int input_size;
int input_slice;
int output_width;
int output_height;
int output_size;
int output_slice;
int batch;
int oz_size;
int threadgroup_input_slice;
int kernel_x;
int kernel_y;
int kernel_size;
int stride_x;
int stride_y;
int pad_x;
int pad_y;
int dilation_x;
int dilation_y;
conv_activation_type activation;
};
kernel void conv(const device ftype4 *in [[buffer(0)]],
device ftype4 *out [[buffer(1)]],
constant conv_constants& cst [[buffer(2)]],
const device ftype4x4 *wt [[buffer(3)]],
const device ftype4 *biasTerms [[buffer(4)]],
uint3 gid [[thread_position_in_grid]]) {
if ((int)gid.x >= cst.output_width || (int)gid.y >= cst.output_height || (int)gid.z >= cst.oz_size) return;
int idx_w = gid.x;
int idx_h = gid.y;
int idx_c = gid.z / cst.batch;
int idx_b = gid.z % cst.batch;
int offset_x = (int)idx_w * cst.stride_x - cst.pad_x;
int offset_y = (int)idx_h * cst.stride_y - cst.pad_y;
int sx = max(0, (UP_DIV(-offset_x, cst.dilation_x)));
int ex = min(cst.kernel_x, UP_DIV(cst.input_width - offset_x, cst.dilation_x));
int kw = ex - sx;
int sy = max(0, (UP_DIV(-offset_y, cst.dilation_y)));
int ey = min(cst.kernel_y, UP_DIV(cst.input_height - offset_y, cst.dilation_y));
int kh = ey - sy;
offset_x += sx * cst.dilation_x;
offset_y += sy * cst.dilation_y;
auto z_in = in + idx_b * cst.input_slice * cst.input_size + offset_y * cst.input_width + offset_x;
auto z_wt = wt + idx_c * cst.input_slice * cst.kernel_size + sy * cst.kernel_x + sx;
auto z_out = out + idx_b * cst.output_slice * cst.output_size + (int)idx_c * cst.output_size + (int)gid.y * cst.output_width + (int)gid.x;
int dilation_h = cst.input_width * cst.dilation_y;
FLOAT4 result = FLOAT4(biasTerms[idx_c]);
for (auto z = 0; z < cst.input_slice; z++) {
for (auto y = 0; y < kh; y++) {
for (auto x = 0; x < kw; x++) {
auto wt4 = z_wt[z * cst.kernel_size + y * cst.kernel_x + x];
auto in4 = z_in[z * cst.input_size + y * dilation_h + x * cst.dilation_x];
result += FLOAT4(in4 * wt4);
}
}
}
*z_out = activate(ftype4(result), cst.activation);
}
kernel void convk3s1d1p1_w2z4(const device ftype4 *in [[buffer(0)]],
device ftype4 *out [[buffer(1)]],
constant conv_constants& cst [[buffer(2)]],
const device ftype4x4 *wt [[buffer(3)]],
const device ftype4 *biasTerms [[buffer(4)]],
uint3 gid [[thread_position_in_grid]]) {
if ((int)gid.x * 2 >= cst.output_width || (int)gid.y >= cst.output_height || (int)gid.z * CONV_UNROLL >= cst.oz_size) return;
int idx_w = gid.x << 1;
int idx_h = gid.y;
int idx_c = gid.z / cst.batch;
int idx_b = gid.z % cst.batch;
int4 uz = idx_c * CONV_UNROLL + int4(0, 1, 2, 3);
bool3 valids = uz.yzw < cst.output_slice;
bool valid_x = (int)(gid.x * 2 + 1) < cst.output_width;
int offset_x = (int)gid.x * 2 - cst.pad_x;
int offset_y = (int)gid.y - cst.pad_y;
auto z_in = in + idx_b * cst.input_slice * cst.input_size + offset_y * cst.input_width + offset_x;
auto z_flt = wt + uz[0] * cst.input_slice * cst.kernel_size;
auto z_out = out + idx_b * cst.output_slice * cst.output_size + uz[0] * cst.output_size + idx_h * cst.output_width + idx_w;
int ws = cst.input_slice * cst.kernel_size;
FLOAT4 result0 = 0, result1 = 0, result2 = 0, result3 = 0;
FLOAT4 result4 = 0, result5 = 0, result6 = 0, result7 = 0;
for (auto z = 0; z < cst.input_slice; z++, z_flt += cst.kernel_size, z_in += cst.input_size) {
auto in00 = (offset_x<0 || offset_y<0) ? (ftype4)0.f : *(z_in+0*cst.input_width+0);
auto in01 = (offset_x+1>=cst.input_width || offset_y<0) ? (ftype4)0.f : *(z_in+0*cst.input_width+1);
auto in02 = (offset_x+2>=cst.input_width || offset_y<0) ? (ftype4)0.f : *(z_in+0*cst.input_width+2);
auto in03 = (offset_x+3>=cst.input_width || offset_y<0) ? (ftype4)0.f : *(z_in+0*cst.input_width+3);
auto in10 = (offset_x<0 || offset_y+1>=cst.input_height) ? (ftype4)0.f : *(z_in+1*cst.input_width+0);
auto in11 = (offset_x+1>=cst.input_width || offset_y+1>=cst.input_height) ? (ftype4)0.f : *(z_in+1*cst.input_width+1);
auto in12 = (offset_x+2>=cst.input_width || offset_y+1>=cst.input_height) ? (ftype4)0.f : *(z_in+1*cst.input_width+2);
auto in13 = (offset_x+3>=cst.input_width || offset_y+1>=cst.input_height) ? (ftype4)0.f : *(z_in+1*cst.input_width+3);
auto in20 = (offset_x<0 || offset_y+2>=cst.input_height) ? (ftype4)0.f : *(z_in+2*cst.input_width+0);
auto in21 = (offset_x+1>=cst.input_width || offset_y+2>=cst.input_height) ? (ftype4)0.f : *(z_in+2*cst.input_width+1);
auto in22 = (offset_x+2>=cst.input_width || offset_y+2>=cst.input_height) ? (ftype4)0.f : *(z_in+2*cst.input_width+2);
auto in23 = (offset_x+3>=cst.input_width || offset_y+2>=cst.input_height) ? (ftype4)0.f : *(z_in+2*cst.input_width+3);
auto z_wt = z_flt;
auto k00 = z_wt[0], k01 = z_wt[1], k02 = z_wt[2];
auto k10 = z_wt[3], k11 = z_wt[4], k12 = z_wt[5];
auto k20 = z_wt[6], k21 = z_wt[7], k22 = z_wt[8];
CONV_MUL_PACK_W2(result0,result4);
if (valids[0]) {
CONV_NEXT_FLT;
CONV_MUL_PACK_W2(result1,result5);
}
if (valids[1]) {
CONV_NEXT_FLT;
CONV_MUL_PACK_W2(result2,result6);
}
if (valids[2]) {
CONV_NEXT_FLT;
CONV_MUL_PACK_W2(result3,result7);
}
}
/* true */ *z_out = activate(ftype4(result0 + float4(biasTerms[uz[0]])), cst.activation);
if(valid_x) {
*(z_out+1) = activate(ftype4(result4 + float4(biasTerms[uz[0]])), cst.activation);
}
if (valids[0]) {
z_out += cst.output_size;
*z_out = activate(ftype4(result1 + float4(biasTerms[uz[1]])), cst.activation);
if(valid_x) {
*(z_out+1) = activate(ftype4(result5 + float4(biasTerms[uz[1]])), cst.activation);
}
}
if (valids[1]) {
z_out += cst.output_size;
*z_out = activate(ftype4(result2 + float4(biasTerms[uz[2]])), cst.activation);
if(valid_x) {
*(z_out+1) = activate(ftype4(result6 + float4(biasTerms[uz[2]])), cst.activation);
}
}
if (valids[2]) {
z_out += cst.output_size;
*z_out = activate(ftype4(result3 + float4(biasTerms[uz[3]])), cst.activation);
if(valid_x) {
*(z_out+1) = activate(ftype4(result7 + float4(biasTerms[uz[3]])), cst.activation);
}
}
}
kernel void conv_z4(const device ftype4 *in [[buffer(0)]],
device ftype4 *out [[buffer(1)]],
constant conv_constants& cst [[buffer(2)]],
const device ftype4x4 *wt [[buffer(3)]],
const device ftype4 *biasTerms [[buffer(4)]],
uint3 gid [[thread_position_in_grid]]) {
if ((int)gid.x >= cst.output_width || (int)gid.y >= cst.output_height || (int)gid.z * CONV_UNROLL >= cst.oz_size) return;
int idx_w = gid.x;
int idx_h = gid.y;
int idx_c = gid.z / cst.batch;
int idx_b = gid.z % cst.batch;
int4 uz = idx_c * CONV_UNROLL + int4(0, 1, 2, 3);
bool3 valids = uz.yzw < cst.output_slice;
int offset_x = idx_w * cst.stride_x - cst.pad_x;
int offset_y = idx_h * cst.stride_y - cst.pad_y;
int sx = max(0, (UP_DIV(-offset_x, cst.dilation_x)));
int ex = min(cst.kernel_x, UP_DIV(cst.input_width - offset_x, cst.dilation_x));
int kw = ex - sx;
int sy = max(0, (UP_DIV(-offset_y, cst.dilation_y)));
int ey = min(cst.kernel_y, UP_DIV(cst.input_height - offset_y, cst.dilation_y));
int kh = ey - sy;
offset_x += sx * cst.dilation_x;
offset_y += sy * cst.dilation_y;
auto z_in = in + idx_b * cst.input_slice * cst.input_size + offset_y * cst.input_width + offset_x;
auto z_wt = wt + uz[0] * cst.input_slice * cst.kernel_size + sy * cst.kernel_x + sx;
auto z_out = out + idx_b * cst.output_slice * cst.output_size + uz[0] * cst.output_size + idx_h * cst.output_width + idx_w;
int ws = cst.input_slice * cst.kernel_size;
int dilation_h = cst.input_width * cst.dilation_y;
FLOAT4 result0 = 0, result1 = 0, result2 = 0, result3 = 0;
for (auto z = 0; z < cst.input_slice; z++, z_wt += cst.kernel_size, z_in += cst.input_size) {
for (auto y = 0; y < kh; y++) {
for (auto x = 0; x < kw; x++) {
auto x_wt = z_wt + y * cst.kernel_x + x;
auto in4 = z_in[ y * dilation_h + x * cst.dilation_x];
/* true */ result0 += FLOAT4(in4 * *x_wt);
if (valids[0]) { x_wt += ws; result1 += FLOAT4(in4 * *x_wt); }
if (valids[1]) { x_wt += ws; result2 += FLOAT4(in4 * *x_wt); }
if (valids[2]) { x_wt += ws; result3 += FLOAT4(in4 * *x_wt); }
}
}
}
/* true */ *z_out = activate(ftype4(result0 + FLOAT4(biasTerms[uz[0]])), cst.activation);
if (valids[0]) { z_out += cst.output_size; *z_out = activate(ftype4(result1 + FLOAT4(biasTerms[uz[1]])), cst.activation); }
if (valids[1]) { z_out += cst.output_size; *z_out = activate(ftype4(result2 + FLOAT4(biasTerms[uz[2]])), cst.activation); }
if (valids[2]) { z_out += cst.output_size; *z_out = activate(ftype4(result3 + FLOAT4(biasTerms[uz[3]])), cst.activation); }
}
kernel void conv_local(const device ftype4 *in [[buffer(0)]],
device ftype4 *out [[buffer(1)]],
constant conv_constants& cst [[buffer(2)]],
const device ftype4x4 *wt [[buffer(3)]],
const device ftype4 *biasTerms [[buffer(4)]],
threadgroup ftype4x4 *cols [[threadgroup(0)]],
uint3 gid [[thread_position_in_grid]],
uint3 tid [[thread_position_in_threadgroup]],
uint3 thread_size [[threads_per_threadgroup]]) {
int unroll_x = CONV_UNROLL * gid.x;
int offset_x = unroll_x * cst.stride_x - cst.pad_x;
int offset_y = gid.y * cst.stride_y - cst.pad_y;
int sy = max(0, UP_DIV(-offset_y, cst.dilation_y));
int ey = min(cst.kernel_y, UP_DIV(cst.input_height - offset_y, cst.dilation_y));
auto o_wt = wt + (int)gid.z * cst.input_slice * cst.kernel_size;
FLOAT4x4 result = FLOAT4x4(0);
int steps = UP_DIV(cst.input_slice, cst.threadgroup_input_slice);
for (auto s = 0; s < steps; s++)
{
int sz_stt = s * cst.threadgroup_input_slice;
int sz_end = min(sz_stt + cst.threadgroup_input_slice, cst.input_slice);
int sz_size = sz_end - sz_stt;
// im2col
int z_step = UP_DIV(sz_size, (int)thread_size.z);
int z_stt = tid.z * z_step;
int z_end = min(z_stt + z_step, sz_size);
for (auto z = z_stt; z < z_end; z++) {
for (auto ky = sy; ky < ey; ky++) {
for (auto kx = 0; kx < cst.kernel_x; kx++) {
auto y_in = in
+ (z + sz_stt) * cst.input_size
+ (offset_y + ky * cst.dilation_y) * cst.input_width;
int4 x4 = offset_x + kx * cst.dilation_x + cst.stride_x * int4(0, 1, 2, 3);
bool4 valids = 0 <= x4 && x4 < cst.input_width;
cols[z * cst.kernel_size + ky * cst.kernel_x + kx] = {
valids[0] ? y_in[x4[0]] : 0,
valids[1] ? y_in[x4[1]] : 0,
valids[2] ? y_in[x4[2]] : 0,
valids[3] ? y_in[x4[3]] : 0
};
}
}
}
threadgroup_barrier(mem_flags::mem_threadgroup);
// gemm
if ((int)gid.z < cst.output_slice) {
for (auto z = 0; z < sz_size; z++) {
for (auto ky = sy; ky < ey; ky++) {
for (auto kx = 0; kx < cst.kernel_x; kx++) {
auto in4 = cols[ z * cst.kernel_size + ky * cst.kernel_x + kx];
auto wt4 = o_wt[(z + sz_stt) * cst.kernel_size + ky * cst.kernel_x + kx];
result += {
FLOAT4(in4[0] * wt4),
FLOAT4(in4[1] * wt4),
FLOAT4(in4[2] * wt4),
FLOAT4(in4[3] * wt4)
};
}
}
}
}
if (s == steps - 1) break;
threadgroup_barrier(mem_flags::mem_threadgroup);
} // end step
// save
if ((int)gid.z >= cst.output_slice) return;
FLOAT4 b4 = FLOAT4(biasTerms[(int)gid.z]);
auto off_out = out + (int)gid.z * cst.output_size + (int)gid.y * cst.output_width + unroll_x;
bool3 valids = (unroll_x + int3(1, 2, 3)) < cst.output_width;
/* true */ off_out[0] = activate((ftype4)(result[0] + b4), cst.activation);
if (valids[0]) off_out[1] = activate((ftype4)(result[1] + b4), cst.activation);
if (valids[1]) off_out[2] = activate((ftype4)(result[2] + b4), cst.activation);
if (valids[2]) off_out[3] = activate((ftype4)(result[3] + b4), cst.activation);
}
| Metal | 4 | Napoleon-Jm/MNN | source/backend/metal/MetalConvolution.metal | [
"Apache-2.0"
] |
/*
* Copyright (C) 1995, 1996 Systemics Ltd (http://www.systemics.com/)
* All rights reserved.
*/
#include "EXTERN.h"
#include "perl.h"
#include "XSUB.h"
#include "des.h"
MODULE = Crypt::DES PACKAGE = Crypt::DES PREFIX = des_
PROTOTYPES: DISABLE
char *
des_expand_key(key)
char * key = NO_INIT
STRLEN key_len = NO_INIT
CODE:
{
des_ks ks;
key = (char *) SvPV(ST(0), key_len);
if (key_len != sizeof(des_user_key))
croak("Invalid key");
des_expand_key((u_int8_t *)key, ks);
ST(0) = sv_2mortal(newSVpv((char *)ks, sizeof(ks)));
}
void
des_crypt(input, output, ks, enc_flag)
char * input = NO_INIT
SV * output
char * ks = NO_INIT
int enc_flag
STRLEN input_len = NO_INIT
STRLEN output_len = NO_INIT
STRLEN ks_len = NO_INIT
CODE:
{
input = (char *) SvPV(ST(0), input_len);
if (input_len != 8)
croak("input must be 8 bytes long");
ks = (char *) SvPV(ST(2), ks_len);
if (ks_len != sizeof(des_ks))
croak("Invalid key schedule");
if (output == &sv_undef)
output = sv_newmortal();
output_len = 8;
if (!SvUPGRADE(output, SVt_PV))
croak("cannot use output argument as lvalue");
des_crypt(input, SvGROW(output, output_len), (u_int32_t *)ks, enc_flag);
SvCUR_set(output, output_len);
*SvEND(output) = '\0';
(void) SvPOK_only(output);
SvTAINT(output);
ST(0) = output;
}
| XS | 4 | dendisuhubdy/grokmachine | Encryption/Cryptix-1.16/Crypt-DES/DES.xs | [
"BSD-3-Clause"
] |
/// <reference path="fourslash.ts" />
//// class D { }
//// D();
var funcDecl = 'declare function D();';
goTo.bof();
edit.insert(funcDecl);
goTo.bof();
edit.deleteAtCaret(funcDecl.length);
| TypeScript | 2 | nilamjadhav/TypeScript | tests/cases/fourslash/toggleDuplicateFunctionDeclaration.ts | [
"Apache-2.0"
] |
(set-info :smt-lib-version 2.6)
(set-logic QF_UF)
(set-info :source |
Generated by: Aman Goel (amangoel@umich.edu), Karem A. Sakallah (karem@umich.edu)
Generated on: 2018-04-06
Generated by the tool Averroes 2 (successor of [1]) which implements safety property
verification on hardware systems.
This SMT problem belongs to a set of SMT problems generated by applying Averroes 2
to benchmarks derived from [2-5].
A total of 412 systems (345 from [2], 19 from [3], 26 from [4], 22 from [5]) were
syntactically converted from their original formats (using [6, 7]), and given to
Averroes 2 to perform property checking with abstraction (wide bit-vectors -> terms,
wide operators -> UF) using SMT solvers [8, 9].
[1] Lee S., Sakallah K.A. (2014) Unbounded Scalable Verification Based on Approximate
Property-Directed Reachability and Datapath Abstraction. In: Biere A., Bloem R. (eds)
Computer Aided Verification. CAV 2014. Lecture Notes in Computer Science, vol 8559.
Springer, Cham
[2] http://fmv.jku.at/aiger/index.html#beem
[3] http://www.cs.cmu.edu/~modelcheck/vcegar
[4] http://www.cprover.org/hardware/v2c
[5] http://github.com/aman-goel/verilogbench
[6] http://www.clifford.at/yosys
[7] http://github.com/chengyinwu/V3
[8] http://github.com/Z3Prover/z3
[9] http://github.com/SRI-CSL/yices2
id: bug-1
query-maker: "Yices 2"
query-time: 0.003000 ms
query-class: abstract
query-category: oneshot
query-type: cti
status: unsat
|)
(set-info :license "https://creativecommons.org/licenses/by/4.0/")
(set-info :category "industrial")
;
(set-info :status unsat)
(declare-fun y$16 () Bool)
(declare-fun y$17 () Bool)
(declare-fun y$18 () Bool)
(declare-fun y$19 () Bool)
(declare-fun y$20 () Bool)
(declare-fun y$21 () Bool)
(declare-fun y$22 () Bool)
(declare-fun y$23 () Bool)
(declare-fun y$24 () Bool)
(declare-fun y$6 () Bool)
(declare-fun y$8 () Bool)
(declare-fun y$impl_PC_valid () Bool)
(declare-fun y$impl_PC_valid$next () Bool)
(declare-fun y$impl_PC_valid$next_rhs () Bool)
(declare-fun y$impl_PC_valid$next_rhs_op () Bool)
(declare-fun y$n1s1 () Bool)
(declare-fun y$prop () Bool)
(declare-fun y$prop$next () Bool)
(declare-fun y$reset () Bool)
(assert (= y$8 (= y$impl_PC_valid y$prop)))
(assert (= y$impl_PC_valid$next_rhs_op (or y$impl_PC_valid y$reset)))
(assert (= y$6 (= y$impl_PC_valid$next y$impl_PC_valid$next_rhs_op)))
(assert (= y$18 (= y$impl_PC_valid$next y$prop$next)))
(assert (= y$prop$next (not y$17)))
(assert (= y$21 (and y$prop y$8 y$6 y$18 y$17)))
(assert y$21)
(check-sat)
(exit)
| SMT | 3 | livinlife6751/infer | sledge/test/smt/QF_UF/2018-Goel-hwbench/QF_UF_bug-1_ab_cti_max.smt2 | [
"MIT"
] |
.eventlog {
height: 200px;
flex: 0 0 auto;
display: flex;
flex-direction: column;
> div {
background-color: #F2F2F2;
padding: 0 5px;
flex: 0 0 auto;
border-top: 1px solid #aaa;
cursor: row-resize;
}
> pre {
flex: 1 1 auto;
margin: 0;
border-radius: 0;
overflow-x: auto;
overflow-y: scroll;
background-color: #fcfcfc;
}
.fa-close {
cursor: pointer;
float: right;
color: grey;
padding: 3px 0;
padding-left: 10px;
&:hover {
color: black;
}
}
.btn-toggle {
margin-top: -2px;
margin-left: 3px;
padding: 2px 2px;
font-size: 10px;
line-height: 10px;
border-radius: 2px;
}
.label {
cursor: pointer;
vertical-align: middle;
display: inline-block;
margin-top: -2px;
margin-left: 3px;
}
}
| Less | 3 | 0x7c48/mitmproxy | web/src/css/eventlog.less | [
"MIT"
] |
{
"Version" : 0.2,
"ModuleName" : "extract",
"Options" : {
"Warnings" : "All",
"TargetType" : "Executable",
"TargetFileName" : "extract",
"LibraryDirs" : [
"../../ecere/obj/vanilla.$(PLATFORM)$(COMPILER_SUFFIX)",
"../../deps/zlib-1.2.8/obj/release.$(PLATFORM)$(COMPILER_SUFFIX)"
]
},
"Platforms" : [
{
"Name" : "linux",
"Options" : {
"LibraryDirs" : [
"/usr/X11R6/lib"
]
}
},
{
"Name" : "apple",
"Options" : {
"LibraryDirs" : [
"/usr/X11R6/lib"
]
}
}
],
"Configurations" : [
{
"Name" : "Debug",
"Options" : {
"Debug" : true,
"PreprocessorDefinitions" : [
"ECERE_STATIC"
],
"Libraries" : [
"ecereVanilla",
"z"
],
"FastMath" : false
},
"Platforms" : [
{
"Name" : "Linux",
"Options" : {
"Libraries" : [
"fontconfig",
"Xrender",
"Xext",
"ncurses",
"m",
"dl",
"pthread",
"X11",
"freetype"
]
}
},
{
"Name" : "Win32",
"Options" : {
"Libraries" : [
"mpr",
"winmm",
"imm32",
"gdi32"
]
}
}
]
},
{
"Name" : "MemoryGuard",
"Options" : {
"Debug" : true,
"MemoryGuard" : true,
"Optimization" : "None",
"Libraries" : [
"ecere"
],
"Console" : true,
"FastMath" : false
}
},
{
"Name" : "Release",
"Options" : {
"Warnings" : "None",
"NoLineNumbers" : true,
"Optimization" : "Size",
"PreprocessorDefinitions" : [
"ECERE_STATIC"
],
"Libraries" : [
"ecereVanilla",
"z"
],
"Compress" : true,
"FastMath" : false
},
"Platforms" : [
{
"Name" : "Linux",
"Options" : {
"Libraries" : [
"fontconfig",
"freetype",
"Xrender",
"Xext",
"ncurses",
"m",
"dl",
"pthread",
"X11"
]
}
},
{
"Name" : "Win32",
"Options" : {
"Libraries" : [
"mpr",
"winmm",
"imm32",
"gdi32"
]
}
},
{
"Name" : "apple",
"Options" : {
"Libraries" : [
"fontconfig",
"freetype",
"Xrender",
"Xext",
"ncurses",
"m",
"dl",
"pthread",
"X11"
]
}
}
]
}
],
"Files" : [
"extract.ec"
],
"ResourcesPath" : "",
"Resources" : [
{
"Folder" : "../../ecere/res/vanilla/ecere/ecere",
"Files" : [
{
"Folder" : "actions",
"Files" : [
"folderNew.png",
"goUp.png"
]
},
{
"Folder" : "devices",
"Files" : [
"computer.png",
"driveHardDisk.png",
"driveRemovableMedia.png",
"mediaFloppy.png",
"mediaOptical.png"
]
},
{
"Folder" : "elements",
"Files" : [
"areaClose.png",
"areaMaximize.png",
"areaMinimize.png",
"areaRestore.png",
"arrowDown.png",
"arrowLeft.png",
"arrowRight.png",
"arrowUp.png",
"optionBoxDisabledSelected.png",
"optionBoxDown.png",
"optionBoxSelected.png",
"optionBoxSelectedDown.png",
"optionBoxUp.png"
]
},
{
"Folder" : "places",
"Files" : [
"driveRemote.png",
"folder.png",
"folderRemote.png",
"networkServer.png",
"networkWorkgroup.png"
]
},
{
"Folder" : "status",
"Files" : [
"folderOpen.png"
]
},
{
"Folder" : "locale",
"Files" : [
"../../ecere/locale/es.mo",
"../../ecere/locale/hu.mo",
"../../ecere/locale/mr.mo",
"../../ecere/locale/nl.mo",
"../../ecere/locale/pt_BR.mo",
"../../ecere/locale/ru.mo",
"../../ecere/locale/zh_CN.mo"
]
}
]
},
{
"Folder" : "locale",
"Files" : [
"es.mo",
"he.mo",
"ru.mo",
"zh_CN.mo"
]
}
]
}
| Ecere Projects | 2 | N-eil/ecere-sdk | ear/extract/extract.epj | [
"BSD-3-Clause"
] |
<!--- Remote Concurrency Check --->
<cfoutput>
<cfif eCheck.recordcount>
<div class="alert alert-danger">
<strong>Potential Clash!</strong>
<p>We've identified #eCheck.recordcount# event(s) which may clash with your selected time in that location:</p>
<ul>
<cfloop query="eCheck">
<li>#title# - (#_formatDateRange(start, end, allday)#)</li>
</cfloop>
</ul>
</div>
</cfif>
</cfoutput>
| ColdFusion | 4 | fintecheando/RoomBooking | views/bookings/check.cfm | [
"Apache-1.1"
] |
wire.cmi :
| D | 1 | leithaus/pi4u | Higher category models of the pi-calculus hctm/strid-0.1.0/src/._ncdi/wire.di | [
"CC0-1.0"
] |
<svg xmlns="http://www.w3.org/2000/svg" enable-background="new 0 0 20 20" height="20" viewBox="0 0 20 20" width="20"><g><rect fill="none" height="20" width="20"/></g><g><g><path d="M11.16,6c-0.13,0-0.26,0-0.39,0.02c-1.2,0.09-2.18,0.42-2.99,0.89l2.61,1.07c1.72,0.71,2.17,2.94,0.85,4.25 C10.75,12.73,10.08,13,9.39,13H4.12C4.02,13.61,4,14.03,4,14.1L4,15h7.5c1.24,0,2.4-0.5,3.26-1.4c0.86-0.9,1.3-2.09,1.23-3.34 C15.87,7.91,13.7,6,11.16,6z" opacity=".3"/><path d="M11.16,5C11,5,10.85,5.01,10.69,5.02C3.25,5.6,3,14.07,3,14.07V15c0,0.55,0.45,1,1,1h7.5c3.13,0,5.65-2.62,5.49-5.79 C16.84,7.2,14.14,5,11.16,5z M6.82,7.6L10,8.91c0.51,0.21,0.86,0.64,0.96,1.17c0.11,0.54-0.05,1.07-0.44,1.45 C10.22,11.83,9.82,12,9.39,12H4.32C4.66,10.62,5.37,8.86,6.82,7.6z M14.76,13.6C13.9,14.5,12.74,15,11.5,15H4l0-0.9 c0-0.07,0.02-0.49,0.12-1.1h5.27c0.69,0,1.35-0.27,1.84-0.76c1.32-1.32,0.87-3.55-0.85-4.25L7.77,6.91 c0.81-0.47,1.8-0.8,2.99-0.89C10.9,6.01,11.03,6,11.16,6c2.55,0,4.72,1.91,4.84,4.26C16.06,11.51,15.62,12.7,14.76,13.6z"/></g></g></svg> | SVG | 2 | mobiledesres/material-icons | svg/social/sports_motorsports/materialiconstwotone/20px.svg | [
"Apache-2.0"
] |
PREFIX ex: <http://example.org/ns#>
PREFIX rdf: <http://www.w3.org/1999/02/22-rdf-syntax-ns#>
SELECT ?x
WHERE {
?x rdf:type ex:cType .
}
| SPARQL | 3 | yanaspaula/rdf4j | testsuites/sparql/src/main/resources/testcases-sparql-1.1-w3c/entailment/rdfs07.rq | [
"BSD-3-Clause"
] |
/*
* Copyright (c) 2018-2020, Andreas Kling <kling@serenityos.org>
*
* SPDX-License-Identifier: BSD-2-Clause
*/
#pragma once
#include <LibWeb/DOM/Element.h>
namespace Web::DOM {
NonnullRefPtr<Element> create_element(Document&, const FlyString& tag_name, const FlyString& namespace_);
}
| C | 4 | r00ster91/serenity | Userland/Libraries/LibWeb/DOM/ElementFactory.h | [
"BSD-2-Clause"
] |
=head1 NAME
SDL - Parrot extension for SDL bindings
=head1 SYNOPSIS
None.
You probably shouldn't use this library directly, unless you're writing your
own wrappers around the SDL NCI code or if you're calling the NCI functions
directly.
In that case, I'm perfectly happy saying "Hey buddy, you're on your own!"
=head1 DESCRIPTION
This is the library that contains all of the actual NCI bindings and Parrot
data structure definitions to work with SDL from Parrot. Normal people, run
away to L<SDL::App> right now instead. This is pretty low-level stuff and you
shouldn't have to use it or even know that it's here if you want to work with
SDL from Parrot.
On the other hand, if you want to use these functions directly, write your own
wrappers, or add wrappers that aren't already here, you should know how it
works.
=head2 The SDL Namespace
The C<SDL> namespace holds only a few functions right now, initializers for
various libraries. These load the PASM code that actually creates the SDL NCI
bindings and initialize all of the SDL-specific data structures needed to
access structs passed to and returned from SDL calls. There's no need to load
sound components if you don't have sound installed, for example.
Each struct layout has its own function that creates and stores the appropriate
data structure. The order of calling really matters here, as some structs
contain other structs.
When you load this file with C<load_bytecode>, it initializes the C<SDL_video>
subsystem. You'll have to use the appropriate IMC modules or initialize the
other subsystems manually.
The subsystem initializers include:
=over 4
=cut
.namespace [ 'SDL' ]
.include 'datatypes.pasm'
.loadlib 'io_ops'
.macro store_nci_func( func_name, signature )
c_func_name = 'SDL_' . .func_name
dlfunc c_function, libsdl, c_func_name, .signature
set_hll_global ['SDL'; 'NCI'], .func_name, c_function
.endm
.sub _sdl_init :load
_init_video()
.local pmc layouts
layouts = new 'OrderedHash'
set_hll_global ['SDL'; 'NCI'], 'layouts', layouts
# this order matters; trust me!
_set_Event_layout( layouts )
_set_Rect_layout( layouts )
_set_Rect_Array_layout( layouts )
_set_Color_layout( layouts )
_set_Palette_layout( layouts )
_set_PixelFormat_layout( layouts )
_set_Pixels_layout( layouts )
_set_Surface_layout( layouts )
.end
=item _init_video()
Initialize the video subsystem. You shouldn't ever need to call this directly.
In fact, don't count on it sticking around. It may not. Then again, it might.
=cut
.sub _init_video
.local pmc libsdl
.local pmc sdl_function
.local pmc env
env = new 'Env'
.local string sdlpath
sdlpath = env['SDLLIBPATH']
if sdlpath == '' goto default_locations
loadlib libsdl, sdlpath
if libsdl goto OK
print "SDLLIBPATH="
say sdlpath
goto failed
default_locations:
loadlib libsdl, 'libSDL'
if libsdl goto OK
loadlib libsdl, 'libSDL-1.2'
if libsdl goto OK
loadlib libsdl, 'libSDL-1.2.so.0'
if libsdl goto OK
loadlib libsdl, 'cygSDL-1-2-0'
if libsdl goto OK
failed:
# failed to load libSDL
$P0 = new 'Exception'
$P0 = "sdl shared library 'libSDL' not found!"
throw $P0
branch OK
OK:
.local string c_func_name
.local pmc c_function
.store_nci_func( 'Init', 'ii' )
#dlfunc sdl_function, libsdl, 'SDL_Init', 'ii'
#set_hll_global ['SDL'; 'NCI'], 'Init', sdl_function
dlfunc sdl_function, libsdl, 'SDL_SetVideoMode', 'piiil'
set_hll_global ['SDL'; 'NCI'], 'SetVideoMode', sdl_function
dlfunc sdl_function, libsdl, 'SDL_Quit', 'v'
set_hll_global ['SDL'; 'NCI'], 'Quit', sdl_function
dlfunc sdl_function, libsdl, 'SDL_FillRect', 'ippi'
set_hll_global ['SDL'; 'NCI'], 'FillRect', sdl_function
dlfunc sdl_function, libsdl, 'SDL_UpdateRect', 'vpiiii'
set_hll_global ['SDL'; 'NCI'], 'UpdateRect', sdl_function
dlfunc sdl_function, libsdl, 'SDL_UpdateRects', 'vpip'
set_hll_global ['SDL'; 'NCI'], 'UpdateRects', sdl_function
dlfunc sdl_function, libsdl, 'SDL_Flip', 'ip'
set_hll_global ['SDL'; 'NCI'], 'Flip', sdl_function
dlfunc sdl_function, libsdl, 'SDL_FreeSurface', 'vp'
set_hll_global ['SDL'; 'NCI'], 'FreeSurface', sdl_function
dlfunc sdl_function, libsdl, 'SDL_LoadBMP_RW', 'ppi'
set_hll_global ['SDL'; 'NCI'], 'LoadBMP_RW', sdl_function
dlfunc sdl_function, libsdl, 'SDL_DisplayFormat', 'pp'
set_hll_global ['SDL'; 'NCI'], 'DisplayFormat', sdl_function
dlfunc sdl_function, libsdl, 'SDL_UpperBlit', 'ipppp'
set_hll_global ['SDL'; 'NCI'], 'BlitSurface', sdl_function
dlfunc sdl_function, libsdl, 'SDL_WaitEvent', 'ip'
set_hll_global ['SDL'; 'NCI'], 'WaitEvent', sdl_function
dlfunc sdl_function, libsdl, 'SDL_PollEvent', 'ip'
set_hll_global ['SDL'; 'NCI'], 'PollEvent', sdl_function
dlfunc sdl_function, libsdl, 'SDL_GetKeyName', 'ti'
set_hll_global ['SDL'; 'NCI'], 'GetKeyName', sdl_function
dlfunc sdl_function, libsdl, 'SDL_GetError', 'tv'
set_hll_global ['SDL'; 'NCI'], 'GetError', sdl_function
dlfunc sdl_function, libsdl, 'SDL_SetColorKey', 'ipii'
set_hll_global ['SDL'; 'NCI'], 'SetColorKey', sdl_function
dlfunc sdl_function, libsdl, 'SDL_LockSurface', 'ip'
set_hll_global ['SDL'; 'NCI'], 'LockSurface', sdl_function
dlfunc sdl_function, libsdl, 'SDL_UnlockSurface', 'vp'
set_hll_global ['SDL'; 'NCI'], 'UnlockSurface', sdl_function
dlfunc sdl_function, libsdl, 'SDL_CreateRGBSurface', 'piiiiiiii'
set_hll_global ['SDL'; 'NCI'], 'CreateRGBSurface', sdl_function
.end
=item _init_image()
Initialize the C<SDL_image> subsystem. If you don't have the appropriate
library installed, this won't work very well. You'll probably want to use the
SDL::Image library anyway, which calls this for you.
=cut
.sub _init_image
.local pmc image_lib
.local pmc nci_sub
loadlib image_lib, 'libSDL_image'
if image_lib goto OK
loadlib image_lib, 'libSDL_image-1.2'
if image_lib goto OK
loadlib image_lib, 'libSDL_image-1.2.so.0'
if image_lib goto OK
loadlib image_lib, 'cygSDL_image-1-2-0'
if image_lib goto OK
$P0 = new 'Exception'
$P0 = "libSDL_image not found!"
throw $P0
branch OK
OK:
dlfunc nci_sub, image_lib, 'IMG_Load', 'pt'
set_hll_global ['SDL'; 'NCI'], 'IMG_Load', nci_sub
.end
=item _init_ttf()
Initialize the C<SDL_ttf> subsystem. If you don't have the appropriate
library installed, this won't work very well. You'll probably want to use the
SDL::Font library anyway, which calls this for you.
=back
=cut
.sub _init_ttf
.local pmc ttf_lib
loadlib ttf_lib, 'libSDL_ttf'
if ttf_lib goto initialize
loadlib ttf_lib, 'libSDL_ttf-2.0'
if ttf_lib goto initialize
loadlib ttf_lib, 'libSDL_ttf-2.0.so.0'
if ttf_lib goto initialize
loadlib ttf_lib, 'cygSDL_ttf-2-0-0'
if ttf_lib goto initialize
unless ttf_lib goto error
initialize:
.local pmc nci_sub
dlfunc nci_sub, ttf_lib, 'TTF_Init', 'i'
unless nci_sub goto error
set_hll_global ['SDL'; 'NCI'; 'TTF'], 'Init', nci_sub
# TTF_init() returns 0 if successful, -1 on error
.local int initialized
initialized = nci_sub()
unless initialized goto success
# XXX: wow, this is unspectacular error handling!
error:
.local pmc e
e = new 'Exception'
e['message'] = "SDL_ttf not initialized\n"
throw e
success:
dlfunc nci_sub, ttf_lib, 'TTF_OpenFont', 'pti'
set_hll_global ['SDL'; 'NCI'; 'TTF'], 'OpenFont', nci_sub
#RNH changes: all text routines expect an integer, not a pmc, for color parameter
dlfunc nci_sub, ttf_lib, 'TTF_RenderText_Solid', 'ppti'
set_hll_global ['SDL'; 'NCI'; 'TTF'], 'RenderText_Solid', nci_sub
dlfunc nci_sub, ttf_lib, 'TTF_RenderUTF8_Solid', 'ppti'
set_hll_global ['SDL'; 'NCI'; 'TTF'], 'RenderUTF8_Solid', nci_sub
# this one could be wrong
dlfunc nci_sub, ttf_lib, 'TTF_RenderUNICODE_Solid', 'ppti'
set_hll_global ['SDL'; 'NCI'; 'TTF'], 'RenderUNICODE_Solid', nci_sub
# RNH Additions. Add UTF8_Shaded and FontLine skip
dlfunc nci_sub, ttf_lib, 'TTF_RenderUTF8_Shaded', 'pptii'
set_hll_global ['SDL'; 'NCI'; 'TTF'], 'RenderUTF8_Shaded', nci_sub
dlfunc nci_sub, ttf_lib, 'TTF_FontLineSkip', 'ip'
set_hll_global ['SDL'; 'NCI'; 'TTF'], 'FontLineSkip', nci_sub
#end additions
dlfunc nci_sub, ttf_lib, 'TTF_SizeText', 'ipt33'
set_hll_global ['SDL'; 'NCI'; 'TTF'], 'SizeText', nci_sub
dlfunc nci_sub, ttf_lib, 'TTF_SizeUTF8', 'ipt33'
set_hll_global ['SDL'; 'NCI'; 'TTF'], 'SizeUTF8', nci_sub
dlfunc nci_sub, ttf_lib, 'TTF_SizeUNICODE', 'ipt33'
set_hll_global ['SDL'; 'NCI'; 'TTF'], 'SizeUNICODE', nci_sub
dlfunc nci_sub, ttf_lib, 'TTF_CloseFont', 'vp'
set_hll_global ['SDL'; 'NCI'; 'TTF'], 'CloseFont', nci_sub
dlfunc nci_sub, ttf_lib, 'TTF_Quit', 'vv'
set_hll_global ['SDL'; 'NCI'; 'TTF'], 'Quit', nci_sub
dlfunc nci_sub, ttf_lib, 'TTF_WasInit', 'iv'
set_hll_global ['SDL'; 'NCI'; 'TTF'], 'WasInit', nci_sub
.end
.sub _set_Event_layout
.param pmc layouts
.local pmc layout
layout = new 'OrderedHash'
# this is the only element in common in the SDL_Event union
set layout[ 'type' ], .DATATYPE_UINT8
push layout, 0
push layout, 0
set layout[ 'pad0' ], .DATATYPE_UINT8
push layout, 0
push layout, 0
set layout[ 'pad1' ], .DATATYPE_UINT16
push layout, 0
push layout, 0
set layout[ 'pad2' ], .DATATYPE_UINT32
push layout, 0
push layout, 0
set layout[ 'pad3' ], .DATATYPE_UINT32
push layout, 0
push layout, 0
set layout[ 'pad4' ], .DATATYPE_UINT32
push layout, 0
push layout, 0
set layout[ 'pad5' ], .DATATYPE_UINT32
push layout, 0
push layout, 0
set layouts[ 'Event::Generic' ], layout
# SDL_KeyboardEvent is the largest struct in the SDL_Event union
layout = new 'OrderedHash'
set layout[ 'type' ], .DATATYPE_UINT8
push layout, 0
push layout, 0
set layout[ 'which' ], .DATATYPE_UINT8
push layout, 0
push layout, 0
set layout[ 'state' ], .DATATYPE_UINT8
push layout, 0
push layout, 0
set layout[ 'padding' ], .DATATYPE_UINT8
push layout, 0
push layout, 0
set layout[ 'scancode' ], .DATATYPE_UINT8
push layout, 0
push layout, 0
set layout[ 'padding_a' ], .DATATYPE_UINT8
push layout, 0
push layout, 0
set layout[ 'padding_b' ], .DATATYPE_UINT8
push layout, 0
push layout, 0
set layout[ 'padding_c' ], .DATATYPE_UINT8
push layout, 0
push layout, 0
set layout[ 'sym' ], .DATATYPE_INT
push layout, 0
push layout, 0
set layout[ 'mod' ], .DATATYPE_INT
push layout, 0
push layout, 0
set layout[ 'unicode' ], .DATATYPE_UINT16
push layout, 0
push layout, 0
set layouts[ 'Event::Keyboard' ], layout
# SDL_MouseMotionEvent
layout = new 'OrderedHash'
set layout[ 'type' ], .DATATYPE_UINT8
push layout, 0
push layout, 0
set layout[ 'pad0' ], .DATATYPE_UINT8
push layout, 0
push layout, 0
set layout[ 'state' ], .DATATYPE_UINT8
push layout, 0
push layout, 0
set layout[ 'x' ], .DATATYPE_UINT16
push layout, 0
push layout, 0
set layout[ 'y' ], .DATATYPE_UINT16
push layout, 0
push layout, 0
set layout[ 'xrel' ], .DATATYPE_INT16
push layout, 0
push layout, 0
set layout[ 'yrel' ], .DATATYPE_INT16
push layout, 0
push layout, 0
set layouts[ 'Event::MouseMotion' ], layout
# SDL_MouseButtonEvent
layout = new 'OrderedHash'
set layout[ 'type' ], .DATATYPE_UINT8
push layout, 0
push layout, 0
set layout[ 'button' ], .DATATYPE_UINT8
push layout, 0
push layout, 0
set layout[ 'state' ], .DATATYPE_UINT8
push layout, 0
push layout, 0
set layout[ 'x' ], .DATATYPE_UINT16
push layout, 0
push layout, 0
set layout[ 'y' ], .DATATYPE_UINT16
push layout, 0
push layout, 0
set layouts[ 'Event::MouseButton' ], layout
.end
.sub _set_Rect_layout
.param pmc layouts
.local pmc layout
layout = new 'OrderedHash'
set layout[ 'x' ], .DATATYPE_INT16
push layout, 0
push layout, 0
set layout[ 'y' ], .DATATYPE_INT16
push layout, 0
push layout, 0
set layout[ 'width' ], .DATATYPE_UINT16
push layout, 0
push layout, 0
set layout[ 'height' ], .DATATYPE_UINT16
push layout, 0
push layout, 0
set layouts[ 'Rect' ], layout
.end
.sub _set_Rect_Array_layout
.param pmc layouts
.local pmc fetch_struct
fetch_struct = get_hll_global ['SDL'; 'NCI'], 'fetch_struct'
.local pmc rect
rect = fetch_struct( 'Rect', 0 )
.local pmc layout
layout = new 'OrderedHash'
set layout[ 'RectArray' ], .DATATYPE_STRUCT
set $P1, layout[ -1 ]
setprop $P1, '_struct', rect
# this is wrong; you need to reset it
push layout, 0
push layout, 0
set layouts[ 'Rect_Array' ], layout
.end
.sub _set_Surface_layout
.param pmc layouts
.local pmc fetch_struct
fetch_struct = get_hll_global ['SDL'; 'NCI'], 'fetch_struct'
# SDL_PixelFormat struct pointer
.local pmc pixelformat
pixelformat = fetch_struct( 'PixelFormat', 0 )
# SDL_Rect struct
.local pmc rect
rect = fetch_struct( 'Rect', 0 )
# SDL_Pixels struct (workaround?)
.local pmc pixels
rect = fetch_struct( 'Pixels', 0 )
.local pmc layout
layout = new 'OrderedHash'
set layout[ 'flags' ], .DATATYPE_UINT32
push layout, 0
push layout, 0
set layout[ 'format' ], .DATATYPE_STRUCT_PTR
# SDL_PixelFormat struct pointer
.local pmc format_pointer
set format_pointer, layout[ -1 ]
setprop format_pointer, '_struct', pixelformat
push layout, 0
push layout, 0
set layout[ 'w' ], .DATATYPE_INT
push layout, 0
push layout, 0
set layout[ 'h' ], .DATATYPE_INT
push layout, 0
push layout, 0
set layout[ 'pitch' ], .DATATYPE_UINT16
push layout, 0
push layout, 0
.local pmc pixels_layout
.local pmc pixels_array
pixels_layout = new 'OrderedHash'
set pixels_layout[ 'array' ], .DATATYPE_INT
push pixels_layout, 0
push pixels_layout, 0
pixels_array = new 'UnManagedStruct', pixels_layout
set layout[ 'pixels' ], .DATATYPE_STRUCT_PTR
set format_pointer, layout[ -1 ]
setprop format_pointer, '_struct', pixels_array
push layout, 0
push layout, 0
set layout[ 'offset' ], .DATATYPE_INT
push layout, 0
push layout, 0
# private_hwdata struct pointer
set layout[ 'hwdata' ], .DATATYPE_PTR
push layout, 0
push layout, 0
set layout[ 'clip_rect' ], .DATATYPE_STRUCT
.local pmc rect_pointer
set rect_pointer, layout[ -1 ]
setprop rect_pointer, '_struct', rect
push layout, 0
push layout, 0
set layout[ 'unused1' ], .DATATYPE_UINT32
push layout, 0
push layout, 0
set layout[ 'locked' ], .DATATYPE_UINT32
push layout, 0
push layout, 0
# SDL_BlitMap struct pointer
set layout[ 'map' ], .DATATYPE_PTR
push layout, 0
push layout, 0
set layout[ 'format_version' ], .DATATYPE_UINT
push layout, 0
push layout, 0
set layout[ 'refcount' ], .DATATYPE_INT
push layout, 0
push layout, 0
set layouts[ 'Surface' ], layout
.end
.sub _set_PixelFormat_layout
.param pmc layouts
.local pmc fetch_struct
fetch_struct = get_hll_global ['SDL'; 'NCI'], 'fetch_struct'
.local pmc palette
palette = fetch_struct( 'Palette', 0 )
.local pmc layout
layout = new 'OrderedHash'
set layout[ 'palette' ], .DATATYPE_STRUCT_PTR
.local pmc palette_pointer
set palette_pointer, layout[ -1 ]
setprop palette_pointer, '_struct', palette
push layout, 0
push layout, 0
set layout[ 'BitsPerPixel' ], .DATATYPE_UINT8
push layout, 0
push layout, 0
set layout[ 'BytesPerPixel' ], .DATATYPE_UINT8
push layout, 0
push layout, 0
set layout[ 'Rloss' ], .DATATYPE_UINT8
push layout, 0
push layout, 0
set layout[ 'Gloss' ], .DATATYPE_UINT8
push layout, 0
push layout, 0
set layout[ 'Bloss' ], .DATATYPE_UINT8
push layout, 0
push layout, 0
set layout[ 'Aloss' ], .DATATYPE_UINT8
push layout, 0
push layout, 0
set layout[ 'Rshift' ], .DATATYPE_UINT8
push layout, 0
push layout, 0
set layout[ 'Gshift' ], .DATATYPE_UINT8
push layout, 0
push layout, 0
set layout[ 'Bshift' ], .DATATYPE_UINT8
push layout, 0
push layout, 0
set layout[ 'Ashift' ], .DATATYPE_UINT8
push layout, 0
push layout, 0
set layout[ 'Rmask' ], .DATATYPE_UINT32
push layout, 0
push layout, 0
set layout[ 'Gmask' ], .DATATYPE_UINT32
push layout, 0
push layout, 0
set layout[ 'Bmask' ], .DATATYPE_UINT32
push layout, 0
push layout, 0
set layout[ 'Amask' ], .DATATYPE_UINT32
push layout, 0
push layout, 0
set layout[ 'colorkey' ], .DATATYPE_UINT32
push layout, 0
push layout, 0
set layout[ 'alpha' ], .DATATYPE_UINT8
push layout, 0
push layout, 0
set layouts[ 'PixelFormat' ], layout
.end
.sub _set_Palette_layout
.param pmc layouts
.local pmc fetch_struct
fetch_struct = get_hll_global ['SDL'; 'NCI'], 'fetch_struct'
.local pmc color
color = fetch_struct( 'Color', 0 )
.local pmc layout
layout = new 'OrderedHash'
set layout[ 'ncolors' ], .DATATYPE_INT
push layout, 0
push layout, 0
set layout[ 'colors' ], .DATATYPE_STRUCT_PTR
.local pmc color_pointer
set color_pointer, layout[ -1 ]
setprop color_pointer, '_struct', color
push layout, 0
push layout, 0
set layouts[ 'Palette' ], layout
.end
.sub _set_Color_layout
.param pmc layouts
.local pmc layout
layout = new 'OrderedHash'
set layout[ 'r' ], .DATATYPE_UINT8
push layout, 0
push layout, 0
set layout[ 'g' ], .DATATYPE_UINT8
push layout, 0
push layout, 0
set layout[ 'b' ], .DATATYPE_UINT8
push layout, 0
push layout, 0
set layout[ 'unused' ], .DATATYPE_UINT8
push layout, 0
push layout, 0
layouts[ 'Color' ] = layout
.end
.sub _set_Pixels_layout
.param pmc layouts
.local pmc layout
layout = new 'OrderedHash'
push layout, .DATATYPE_UINT16
push layout, 2
push layout, 0
set layouts[ 'Pixels' ], layout
.end
=head2 The SDL::NCI Namespace
Besides all of the actual NCI subs, there's one additional subroutine in the
SDL::NCI namespace.
C<fetch_layout()> takes one argument, a string containing the name of the SDL_*
data structure layout PMC to return. You can then C<assign> the layout to an
C<UnManagedStruct> or C<ManagedStruct> PMC to assign to and read from various
struct members.
Note that the name of the layout has the leading C<SDL_> prefix removed; to
fetch the layout for an C<SDL_Rect> struct, ask for C<Rect>.
This currently doesn't do much if you request an unknown layout. Suggestions
welcome.
In addition to the various SDL data structures, this makes the following other layouts available:
=over
=item * Rect_Array
An array of SDL_Rect structs. Use this for such things as passing multiple
rects to a surface update function, for example. Note that you'll have to
update the element at index 1 with the proper count of the number of rects in
the array.
If this confuses you, see C<SDL::Surface::update_rects()> and imagine how I<I>
felt when I wrote it!
=back
=cut
.namespace [ 'SDL'; 'NCI' ]
.sub fetch_struct
.param string struct_name
.param int managed
.local pmc initializer
.local pmc struct
# .local pmc fetch_layout
# fetch_layout = get_hll_global ['SDL'; 'NCI'], 'fetch_layout'
initializer = fetch_layout( struct_name )
if managed == 1 goto build_managed
struct = new 'UnManagedStruct', initializer
goto built_struct
build_managed:
struct = new 'ManagedStruct', initializer
built_struct:
.return( struct )
.end
.sub fetch_layout
.param string layout_name
.local pmc layouts
.local pmc layout
layouts = get_hll_global ['SDL'; 'NCI'], 'layouts'
exists $I0, layouts[ layout_name ]
if $I0 goto found
layout = new 'OrderedHash'
print "SDL::fetch_layout warning: layout '"
print layout_name
print "' not found!\n"
goto found_done
found:
layout = layouts[ layout_name ]
found_done:
.return( layout )
.end
=head1 AUTHOR
Please send patches, feedback, and suggestions to the Perl 6 Internals mailing
list.
=head1 COPYRIGHT
Copyright (C) 2004-2015, Parrot Foundation.
=cut
# Local Variables:
# mode: pir
# fill-column: 100
# End:
# vim: expandtab shiftwidth=4 ft=pir:
| Parrot Internal Representation | 5 | winnit-myself/Wifie | runtime/parrot/library/SDL.pir | [
"Artistic-2.0"
] |
(***********************************************************
Remote Procedure Call (Troubleshoot by calling functions)
************************************************************)
/*---------------------------------------------------------------------------
The MIT License (MIT)
Copyright (c) 2014 Alex McLain and Joe McIlvain
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
THE SOFTWARE.
---------------------------------------------------------------------------*/
#if_not_defined PS_RPC
#define PS_RPC 1
(***********************************************************)
(* System Type : NetLinx *)
(***********************************************************)
(* DEVICE NUMBER DEFINITIONS GO BELOW *)
(***********************************************************)
DEFINE_DEVICE
#if_not_defined vdvRPC
// Virtual Debugging Device to receive RPC strings from user on.
// This can also be overridden in the master source code file if necessary.
vdvRPC = 34500:1:0;
#end_if
(***********************************************************)
(* CONSTANT DEFINITIONS GO BELOW *)
(***********************************************************)
DEFINE_CONSTANT
(***********************************************************)
(* INCLUDES GO BELOW *)
(***********************************************************)
(***********************************************************)
(* DATA TYPE DEFINITIONS GO BELOW *)
(***********************************************************)
DEFINE_TYPE
(***********************************************************)
(* VARIABLE DEFINITIONS GO BELOW *)
(***********************************************************)
DEFINE_VARIABLE
(***********************************************************)
(* SUBROUTINE/FUNCTION DEFINITIONS GO BELOW *)
(***********************************************************)
///
// User input string parsing functions
// Parse and return the name of the function from the given input string
define_function char[255] rpc_function_name(char input[])
{
return rpc_get_arg(0, lower_string(input));
}
// Parse and return the nth argument of the function
define_function char[255] rpc_get_arg(integer index, char input[])
{
integer start;
integer end;
integer i;
char output[255];
end = 0;
for (i = 0; i <= index; i++)
{
start = end;
end = find_string(input, ' ', end+1);
}
return mid_string(input, start+1, end-start-1);
}
// Parse and return the nth argument of the function as a string (same as rpc_get_arg)
define_function char[255] rpc_get_arg_s(integer index, char input[])
{
return rpc_get_arg(index, input);
}
// Parse and return the nth argument of the function as an integer
define_function integer rpc_get_arg_i(integer index, char input[])
{
return atoi(rpc_get_arg(index, input));
}
///
// Output logging functions
// Print the string return value of the function call
define_function rpc_log(char output[])
{
print(LOG_LEVEL_INFO, "'RPC function returned string: ', output");
}
// Print the string return value of the function call
define_function rpc_log_s(char output[])
{
print(LOG_LEVEL_INFO, "'RPC function returned string: ', output");
}
// Print the integer return value of the function call
define_function rpc_log_i(integer output)
{
print(LOG_LEVEL_INFO, "'RPC function returned integer: ', itoa(output)");
}
(***********************************************************)
(* STARTUP CODE GOES BELOW *)
(***********************************************************)
DEFINE_START
(***********************************************************)
(* THE EVENTS GO BELOW *)
(***********************************************************)
DEFINE_EVENT
(***********************************************************)
(* THE MAINLINE GOES BELOW *)
(***********************************************************)
DEFINE_PROGRAM
(***********************************************************)
(* END OF PROGRAM *)
(* DO NOT PUT ANY CODE BELOW THIS COMMENT *)
(***********************************************************)
#end_if
| NetLinx | 5 | amclain/amx-lib-redis | integration/include/rpc.axi | [
"MIT"
] |
# flake8: noqa: F401
r"""
This file is in the process of migration to `torch/ao/quantization`, and
is kept here for compatibility while the migration process is ongoing.
If you are adding a new entry/functionality, please, add it to the
`torch/ao/quantization/quantize.py`, while adding an import statement
here.
"""
from torch.ao.quantization.quantize import _convert
from torch.ao.quantization.quantize import _observer_forward_hook
from torch.ao.quantization.quantize import _propagate_qconfig_helper
from torch.ao.quantization.quantize import _remove_activation_post_process
from torch.ao.quantization.quantize import _remove_qconfig
from torch.ao.quantization.quantize import add_observer_
from torch.ao.quantization.quantize import add_quant_dequant
from torch.ao.quantization.quantize import convert
from torch.ao.quantization.quantize import get_observer_dict
from torch.ao.quantization.quantize import get_unique_devices_
from torch.ao.quantization.quantize import is_activation_post_process
from torch.ao.quantization.quantize import prepare
from torch.ao.quantization.quantize import prepare_qat
from torch.ao.quantization.quantize import propagate_qconfig_
from torch.ao.quantization.quantize import quantize
from torch.ao.quantization.quantize import quantize_dynamic
from torch.ao.quantization.quantize import quantize_qat
from torch.ao.quantization.quantize import register_activation_post_process_hook
from torch.ao.quantization.quantize import swap_module
| Python | 1 | xiaohanhuang/pytorch | torch/quantization/quantize.py | [
"Intel"
] |
#%RAML 0.8
title: Handling
baseUri: http://dddsample.marcusoncode.se/handling/{version}
version: v1
/incidents:
post:
description: Register a handling incident.
body:
application/json:
example: |
{
"completion_time": "0001-01-01T00:00:00Z",
"tracking_id": "ABC123",
"voyage": "V100",
"location" "CNHKG",
"event_type": "Unload"
}
| RAML | 3 | joergmis/goddd | handling/docs/api.raml | [
"MIT"
] |
#!/usr/bin/Rscript --vanilla
#
# distrib.r:
# utility to plot distribution/density of a numeric data-set column
#
# Usage:
# distrib.r data_file ["optional chart title string"]
# where data_file contains the numeric vector, a number per line.
#
suppressPackageStartupMessages(library(ggplot2))
ratio = 1.61803398875
W = 4
H = W / ratio
DPI = 200
FONTSIZE = 9
MyGray = 'grey50'
title.theme = element_text(family="FreeSans", face="bold.italic",
size=FONTSIZE-2, hjust=0.5)
x.title.theme = element_text(family="FreeSans", face="bold.italic",
size=FONTSIZE-2, vjust=-0.1)
y.title.theme = element_text(family="FreeSans", face="bold.italic",
size=FONTSIZE-2, angle=90, vjust=0.2)
x.axis.theme = element_text(family="FreeSans", face="bold",
size=FONTSIZE-2, color=MyGray)
y.axis.theme = element_text(family="FreeSans", face="bold",
size=FONTSIZE-2, color=MyGray)
legend.theme = element_text(family="FreeSans", face="bold.italic",
size=FONTSIZE-1, color="black")
eprintf <- function(...) cat(sprintf(...), sep='', file=stderr())
argv <- commandArgs(trailingOnly = TRUE)
csvfile <- argv[1]
title <- ifelse(! is.na(argv[2]),
argv[2],
'vw demo: random expression distribution')
Ys <- read.csv(csvfile, header=F, col.names='Ys')
d <- data.frame(Ys=Ys)
Y_labels <- function(yrange) {
the.min <- as.integer(floor(yrange[1]))
the.max <- as.integer(ceiling(yrange[2] + 1))
seq(from=the.min, to=the.max, by=1)
}
# geom_histogram(binwidth=.5, alpha=.5, position="identity")
# geom_histogram(fill='#3377ff',
# binwidth=.01, alpha=.4, stat='density') +
g <- ggplot(data=d, aes(x=Ys)) +
geom_density(fill='#3377ff', alpha=0.4, lwd=0.2) +
scale_x_continuous(breaks=Y_labels(range(Ys))) +
ggtitle(title) +
xlab(NULL) +
theme(
plot.title=title.theme,
axis.title.y=y.title.theme,
axis.title.x=x.title.theme,
axis.text.x=x.axis.theme,
axis.text.y=y.axis.theme
)
pngfile <- sprintf("%s.density.png", csvfile)
ggsave(g, file=pngfile, width=W, height=H, dpi=DPI)
| R | 4 | HollowMan6/vowpal_wabbit | demo/random-noise/distrib.r | [
"BSD-3-Clause"
] |
#!/bin/sh
objroot=$1
cat <<EOF
#ifndef JEMALLOC_H_
#define JEMALLOC_H_
#ifdef __cplusplus
extern "C" {
#endif
EOF
for hdr in jemalloc_defs.h jemalloc_rename.h jemalloc_macros.h \
jemalloc_protos.h jemalloc_typedefs.h jemalloc_mangle.h ; do
cat "${objroot}include/jemalloc/${hdr}" \
| grep -v 'Generated from .* by configure\.' \
| sed -e 's/ $//g'
echo
done
cat <<EOF
#ifdef __cplusplus
}
#endif
#endif /* JEMALLOC_H_ */
EOF
| Shell | 4 | Mu-L/jemalloc | include/jemalloc/jemalloc.sh | [
"BSD-2-Clause"
] |
Unicode True
!define PRODUCT_NAME "KeeWeb"
!define PRODUCT_VERSION "${version}"
!define PRODUCT_PUBLISHER "KeeWeb"
!define PRODUCT_WEB_SITE "${homepage}"
!define PRODUCT_UNINST_KEY "Software\Microsoft\Windows\CurrentVersion\Uninstall\${PRODUCT_NAME}"
!define PRODUCT_UNINST_ROOT_KEY "HKLM"
!define PRODUCT_EXE "KeeWeb.exe"
!define PRODUCT_UNINST_TEMP_EXE "KeeWebUninst.exe"
!define MUI_ABORTWARNING
!define MUI_ICON "graphics\icon.ico"
!define MUI_FINISHPAGE_RUN "$INSTDIR\${PRODUCT_EXE}"
!define MULTIUSER_EXECUTIONLEVEL Highest
!define MULTIUSER_MUI
!define MULTIUSER_INSTALLMODE_COMMANDLINE
SetCompressor lzma
Name "${PRODUCT_NAME}"
OutFile "${output}"
InstallDir "$PROGRAMFILES\${PRODUCT_NAME}"
ShowInstDetails show
| NSIS | 3 | MetaEngr/keeweb | package/nsis/defines.nsh | [
"Apache-2.0",
"MIT"
] |
111
0 -0.098094038114096
1 0.408027771026713
2 -0.00235400646170757
3 -0.0980999995894446
4 -2.14329491898238e-07
5 -2.14316886322245e-07
6 -0.098238694337703
7 0.0160546377637006
8 -5.21060356536526e-05
9 -0.0981
10 0
11 0
12 7.58440520457719e-06
13 -0.00113798172848282
14 -0.0980980964127637
15 0.000121794189665509
16 0.00546451463492037
17 -0.0978401544205203
18 -0.0981038865299945
19 9.89449977503298e-06
20 -6.27295695034426e-06
21 0.0238568519796015
22 1.92569618017863
23 0.0167046187049469
24 -0.0980999995894446
25 2.14313276253776e-07
26 2.14333101710191e-07
27 -0.5064026728107
28 -0.420753257245139
29 -0.230105989030125
30 -0.0980999995894446
31 2.14311152088573e-07
32 2.14335225649548e-07
33 0.0111161950147431
34 0.508660050866076
35 0.148702313523413
36 -0.0980951980803775
37 0.0455563193191506
38 0.00156886930443435
39 -0.0982821672466542
40 2.96547525754746e-05
41 -0.00234386887870731
42 0.00059089978994232
43 0.0463072371345421
44 0.113123237719922
45 -0.0981573467743497
46 -7.5787650883637e-05
47 -0.000128286201879135
48 -0.0980999995894446
49 2.14316098520517e-07
50 -2.14330279692357e-07
51 -0.0981262572884793
52 -0.00406909433405972
53 -0.0844622331366194
54 0.000425139719167294
55 0.00271073170991897
56 0.0461227048968907
57 -0.0980999995894446
58 0.178365613151934
59 5.37208255733916e-06
60 -0.0981057623287584
61 0.617740407791424
62 -0.0192803718907379
63 0.00652423458679981
64 0.238895862917951
65 0.575088488252943
66 0.0207800570772449
67 1.62962796348715
68 -0.904691421906761
69 0.0194373991660123
70 1.33551491871556
71 -0.124127722882808
72 0.0203858871247279
73 1.74723582398703
74 0.10599811007552
75 0.02373472820213
76 1.62050857117267
77 0.26172901532113
78 -0.0980999995894446
79 2.14317794184151e-07
80 2.14328584105303e-07
81 -0.0981036337336988
82 -2.01616993797407e-05
83 0.000171909861579824
84 -0.0982550093432206
85 0.805218142784794
86 -0.000427680884453903
87 -0.0980999995894446
88 2.14309824029057e-07
89 2.14336553561544e-07
90 0.000156811690847545
91 -0.000203264795242724
92 0.00199550879296217
93 0.0110384130466915
94 0.86793411081349
95 0.00881070853291632
96 0.0126146553650696
97 1.40121887056914
98 -0.78632687491864
99 -0.0981000000126076
100 0.0047797798065727
101 -0.330367960880677
102 0.0188699630032868
103 1.06267944028087
104 0.0447148973739212
105 -0.000242458539880989
106 0.222589531758739
107 0.0465897338945414
108 0.0227804561433054
109 1.40684286472234
110 0.170031460273386
| IDL | 0 | ricortiz/OpenTissue | demos/data/dlm/111/b.dlm | [
"Zlib"
] |
At: "supply-02.hac":12:
parse error: syntax error
parser stacks:
state value
#STATE# (null)
#STATE# list<(root_item)>: (process-definition) ... [4:1--11:7]
#STATE# (id-expr): foo [12:1..3]
#STATE# . [12:4]
#STATE# ! [12:5]
in state #STATE#, possible rules are:
member_expr: id_expr '.' . ID (#RULE#)
acceptable tokens are:
ID (shift)
| Bison | 1 | broken-wheel/hacktist | hackt_docker/hackt/test/parser/connect/supply-02.stderr.bison | [
"MIT"
] |
{% set result = 'Salt Rocks!' | hmac(shared_secret='topsecret', challenge_hmac='nMgLxwHPFyRgGfunkXXAI3Z/ZR4p5lmPTUjk2eGDqks=') %}
{% include 'jinja_filters/common.sls' %}
| SaltStack | 4 | byteskeptical/salt | tests/integration/files/file/base/jinja_filters/hashutils_hmac.sls | [
"Apache-2.0"
] |
#!/usr/bin/env bash
# Prints a nicely-formatted commit history.
# - Commits are grouped below their merge-commit.
# - Issue numbers are moved next to the commit-id.
#
# Parameters:
# $1 "since" commit
# $2 "inverse match" regex pattern
set -e
set -u
set -o pipefail
__SINCE=$1
__INVMATCH=$2
is_merge_commit() {
git rev-parse $1 >/dev/null 2>&1 \
|| { echo "ERROR: invalid commit: $1"; exit 1; }
git log $1^2 >/dev/null 2>&1 && return 0 || return 1
}
# Removes parens from issue/ticket/PR numbers.
#
# Example:
# in: 3340e08becbf foo (#9423)
# out: 3340e08becbf foo #9423
_deparen() {
sed 's/(\(\#[0-9]\{3,\}\))/\1/g'
}
# Cleans up issue/ticket/PR numbers in the commit descriptions.
#
# Example:
# in: 3340e08becbf foo (#9423)
# out: 3340e08becbf #9423 foo
_format_ticketnums() {
nvim -Es +'g/\v(#[0-9]{3,})/norm! ngEldE0ep' +'%p' | _deparen
}
for commit in $(git log --format='%H' --first-parent "$__SINCE"..HEAD); do
if is_merge_commit ${commit} ; then
if [ -z "$__INVMATCH" ] || ! git log --oneline ${commit}^1..${commit}^2 \
| >/dev/null 2>&1 grep -E "$__INVMATCH" ; then
git log -1 --oneline ${commit}
git log --format=' %h %s' ${commit}^1..${commit}^2
fi
else
git log -1 --oneline ${commit}
fi
done | _format_ticketnums
| Shell | 4 | uga-rosa/neovim | scripts/git-log-pretty-since.sh | [
"Vim"
] |
global _start
%include "header.inc"
mov dword [esp], 0
mov dword [esp+4], 0
mov dword [esp+8], 0
mov dword [esp+12], 0
mov dword [esp+16], 0
mov dword [esp+20], 0
mov dword [esp+24], 0
mov dword [esp+28], 0
mov eax, 0
bts word [esp], ax
mov eax, -5
bts word [esp + 4], ax
mov eax, 1
bts word [esp], ax
mov eax, 31
bts word [esp], ax
mov eax, 32
bts word [esp], ax
mov eax, 63
bts word [esp], ax
mov eax, 99
bts word [esp], ax
%include "footer.inc"
| Assembly | 3 | brenden7158/v86 | tests/nasm/bts-reg16.asm | [
"BSD-2-Clause"
] |
import { createMuiTheme, ThemeOptions, adaptV4Theme } from '@material-ui/core';
export const muiTheme = createMuiTheme();
export const muiTheme2 = createMuiTheme(adaptV4Theme({}));
| JavaScript | 3 | dany-freeman/material-ui | packages/mui-codemod/src/v5.0.0/adapter-v4.test/core-import.expected.js | [
"MIT"
] |
----------------------------------------------------------------------------------
-- Engineer: Mike Field <hamster@snap.net.nz>
--
-- Module Name: ethernet_extract_header - Behavioral
--
-- Description: Extract the Ethernet header fields
--
------------------------------------------------------------------------------------
-- FPGA_Webserver from https://github.com/hamsternz/FPGA_Webserver
------------------------------------------------------------------------------------
-- The MIT License (MIT)
--
-- Copyright (c) 2015 Michael Alan Field <hamster@snap.net.nz>
--
-- Permission is hereby granted, free of charge, to any person obtaining a copy
-- of this software and associated documentation files (the "Software"), to deal
-- in the Software without restriction, including without limitation the rights
-- to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
-- copies of the Software, and to permit persons to whom the Software is
-- furnished to do so, subject to the following conditions:
--
-- The above copyright notice and this permission notice shall be included in
-- all copies or substantial portions of the Software.
--
-- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
-- AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
-- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
-- THE SOFTWARE.
--
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
entity ethernet_extract_header is
generic (our_mac : std_logic_vector(47 downto 0) := (others => '0'));
Port ( clk : in STD_LOGIC;
filter_ether_type : in STD_LOGIC_VECTOR (15 downto 0);
data_valid_in : in STD_LOGIC;
data_in : in STD_LOGIC_VECTOR (7 downto 0);
data_valid_out : out STD_LOGIC := '0';
data_out : out STD_LOGIC_VECTOR (7 downto 0) := (others => '0');
ether_dst_mac : out STD_LOGIC_VECTOR (47 downto 0) := (others => '0');
ether_src_mac : out STD_LOGIC_VECTOR (47 downto 0) := (others => '0'));
end ethernet_extract_header;
architecture Behavioral of ethernet_extract_header is
signal count : unsigned(3 downto 0) := (others => '0');
signal ether_type : STD_LOGIC_VECTOR (15 downto 0) := (others => '0');
signal i_ether_dst_mac : STD_LOGIC_VECTOR (47 downto 0) := (others => '0');
signal i_ether_src_mac : STD_LOGIC_VECTOR (47 downto 0) := (others => '0');
signal valid_mac : STD_LOGIC := '1';
begin
ether_dst_mac <= i_ether_dst_mac;
ether_src_mac <= i_ether_src_mac;
process(clk)
begin
if rising_edge(clk) then
data_out <= data_in;
if data_valid_in = '1' then
-- Note, at count of zero,
case count is
when "0000" => i_ether_dst_mac( 7 downto 0) <= data_in;
when "0001" => i_ether_dst_mac(15 downto 8) <= data_in;
when "0010" => i_ether_dst_mac(23 downto 16) <= data_in;
when "0011" => i_ether_dst_mac(31 downto 24) <= data_in;
when "0100" => i_ether_dst_mac(39 downto 32) <= data_in;
when "0101" => i_ether_dst_mac(47 downto 40) <= data_in;
when "0110" => i_ether_src_mac( 7 downto 0) <= data_in;
when "0111" => i_ether_src_mac(15 downto 8) <= data_in;
when "1000" => i_ether_src_mac(23 downto 16) <= data_in;
when "1001" => i_ether_src_mac(31 downto 24) <= data_in;
when "1010" => i_ether_src_mac(39 downto 32) <= data_in;
when "1011" => i_ether_src_mac(47 downto 40) <= data_in;
if i_ether_dst_mac = x"FFFFFFFFFFFF" or i_ether_dst_mac = our_mac then
valid_mac <= '1';
else
valid_mac <= '0';
end if;
when "1100" => ether_type(15 downto 8) <= data_in;
when "1101" => ether_type(7 downto 0) <= data_in;
when others => if valid_mac = '1' and ether_type = filter_ether_type then
data_valid_out <= data_valid_in;
data_out <= data_in;
else
data_valid_out <= '0';
data_out <= (others => '0');
end if;
end case;
if count /= "1111" then
count <= count+1;
end if;
else
data_valid_out <= '0';
data_out <= data_in;
count <= (others => '0');
end if;
end if;
end process;
end Behavioral; | VHDL | 5 | hamsternz/FPGA_Webserver | hdl/ethernet/ethernet_extract_header.vhd | [
"MIT"
] |
image from https://hub.docker.com/r/dweomer/atlassian-bamboo/
| DM | 3 | Praqma/staci | images/bamboo/README.dm | [
"MIT"
] |
(ns fw.test.whilst
(:require
[chai :refer [expect]]
[fw.lib.whilst :refer [whilst]]))
(defn ^:private delay
[lambda]
(set-timeout lambda (* (.random Math) 100)))
(suite :whilst
(fn []
(test :basic
(fn [done]
(let [count 0]
(whilst
(fn [next] (< count 5))
(fn [next]
(set! count (+ count 1))
(delay next))
(fn [err]
(.to.be.equal (expect err) nil)
(.to.be.equal (expect count) 5) (done))))))
(test :multicall
(fn [done]
(let [count 0]
(whilst
(fn [next] (< count 5))
(fn [next]
(set! count (+ count 1))
(delay next))
(fn [err]
(.to.be.equal (expect err) nil)
(.to.be.equal (expect count) 5) (done))))))
(test :error
(fn [done]
(let [count 0]
(whilst
(fn [next] (< count 5))
(fn [next]
(set! count (+ count 1))
(if (identical? count 3)
(delay (next :error))
(delay next)))
(fn [err]
(.to.be.equal (expect err) :error)
(.to.be.equal (expect count) 3) (done))))))))
| wisp | 5 | h2non/fw | test/whilst.wisp | [
"MIT"
] |
package com.baeldung.filterresponse.model;
import com.baeldung.filterresponse.controller.View;
import com.fasterxml.jackson.annotation.JsonView;
public class Item {
@JsonView(View.User.class)
private int id;
@JsonView(View.User.class)
private String name;
@JsonView(View.Admin.class)
private String ownerName;
public Item(int id, String name, String ownerName) {
this.id = id;
this.name = name;
this.ownerName = ownerName;
}
public int getId() {
return id;
}
public String getName() {
return name;
}
public String getOwnerName() {
return ownerName;
}
}
| Java | 4 | DBatOWL/tutorials | spring-security-modules/spring-security-core/src/main/java/com/baeldung/filterresponse/model/Item.java | [
"MIT"
] |
/proc/CreateDefaultInternalOrgans(var/mob/owner)
owner.organs += new /obj/item/organ/paired(owner, _left_side = TRUE, _organ_key = ORGAN_EYE, _limb_key = BP_HEAD, _max_damage = 20, _icon = 'icons/objects/items/organ/eyeball.dmi')
owner.organs += new /obj/item/organ/paired(owner, _left_side = FALSE, _organ_key = ORGAN_EYE, _limb_key = BP_HEAD, _max_damage = 20, _icon = 'icons/objects/items/organ/eyeball.dmi')
owner.organs += new /obj/item/organ/paired(owner, _left_side = TRUE, _organ_key = ORGAN_LUNG, _limb_key = BP_CHEST, _max_damage = 40, _icon = 'icons/objects/items/organ/lung.dmi')
owner.organs += new /obj/item/organ/paired(owner, _left_side = FALSE, _organ_key = ORGAN_LUNG, _limb_key = BP_CHEST, _max_damage = 40, _icon = 'icons/objects/items/organ/lung.dmi')
owner.organs += new /obj/item/organ/paired(owner, _left_side = TRUE, _organ_key = ORGAN_KIDNEY, _limb_key = BP_GROIN, _max_damage = 30, _icon = 'icons/objects/items/organ/kidney.dmi')
owner.organs += new /obj/item/organ/paired(owner, _left_side = FALSE, _organ_key = ORGAN_KIDNEY, _limb_key = BP_GROIN, _max_damage = 30, _icon = 'icons/objects/items/organ/kidney.dmi')
owner.organs += new /obj/item/organ( owner, _vital = TRUE, _organ_key = ORGAN_BRAIN, _limb_key = BP_HEAD, _max_damage = 200, _icon = 'icons/objects/items/organ/brain.dmi')
owner.organs += new /obj/item/organ( owner, _vital = TRUE, _organ_key = ORGAN_HEART, _limb_key = BP_CHEST, _max_damage = 100, _icon = 'icons/objects/items/organ/heart.dmi')
owner.organs += new /obj/item/organ( owner, _organ_key = ORGAN_STOMACH, _limb_key = BP_CHEST, _max_damage = 50, _icon = 'icons/objects/items/organ/stomach.dmi')
owner.organs += new /obj/item/organ( owner, _organ_key = ORGAN_SPLEEN, _limb_key = BP_GROIN, _max_damage = 50, _icon = 'icons/objects/items/organ/spleen.dmi')
owner.organs += new /obj/item/organ( owner, _organ_key = ORGAN_LIVER, _limb_key = BP_GROIN, _max_damage = 50, _icon = 'icons/objects/items/organ/liver.dmi')
/obj/item/organ
name = "organ"
flags = FLAG_SIMULATED | FLAG_IS_EDIBLE | FLAG_THROWN_SPIN
icon = 'icons/objects/items/organ/organ.dmi'
max_damage = 80
var/death_threshold = 100
var/impairment_threshold = 50
var/min_bruised_damage
var/min_broken_damage
var/mob/owner
var/dead
var/vital
var/organ_key
var/limb_key
/obj/item/organ/Destroy()
if(owner)
owner.organs -= src
var/list/organ_list = owner.organs_by_key[organ_key]
if(length(organ_list))
organ_list -= src
if(!length(organ_list))
owner.organs_by_key[organ_key] = null
owner.organs_by_key -= organ_key
owner = null
var/obj/item/limb/limb = loc
if(istype(limb))
limb.organs -= src
. = ..()
/obj/item/organ/proc/IsHealthy()
return !dead && !IsBroken()
/obj/item/organ/proc/IsBruised()
return (damage >= min_bruised_damage)
/obj/item/organ/proc/IsBroken()
return (damage >= min_broken_damage)
/obj/item/organ/TakeDamage(var/dam, var/source, var/dtype = WOUND_BRUISE)
. = ..()
if(!Deleted(src) && damage >= death_threshold && !dead)
Die()
/obj/item/organ/proc/Die()
if(dead) return
name = "dead [name]"
dead = TRUE
if(owner && vital)
owner.Die("vital organ failure")
/obj/item/organ/New(var/newloc, var/material_path = /datum/material/meat, var/_left_side = FALSE, var/_organ_key, var/_vital, var/_limb_key, var/_max_damage, var/_icon = 'icons/objects/items/organ/organ.dmi')
organ_key = _organ_key
limb_key = _limb_key
name = organ_key
vital = _vital
icon = _icon
max_damage = _max_damage
death_threshold = round(max_damage * 0.9)
min_bruised_damage = round(max_damage * 0.35)
min_broken_damage = round(max_damage * 0.7)
..(newloc, material_path)
if(istype(loc, /mob))
owner = loc
if(!owner.organs_by_key[organ_key])
owner.organs_by_key[organ_key] = list()
owner.organs_by_key[organ_key] += src
var/obj/item/limb/limb = owner.GetLimb(limb_key)
if(!limb)
QDel(src, "no parent organ")
return
ForceMove(limb)
limb.organs += src
/obj/item/organ/UpdateStrings()
name = organ_key
/obj/item/organ/Process()
if(!owner)
return FALSE
return TRUE
/obj/item/organ/paired
var/left_side
/obj/item/organ/paired/New(var/newloc, var/material_path = /datum/material/meat, var/_left_side = FALSE, var/_organ_key, var/_vital, var/_limb_key, var/_max_damage, var/_icon = 'icons/objects/items/organ/organ.dmi')
left_side = _left_side
..(newloc, material_path, _left_side, _organ_key, _vital, _limb_key, _max_damage, _icon)
/obj/item/organ/paired/UpdateStrings()
if(left_side)
name = "left [organ_key]"
else
name = "right [organ_key]"
var/matrix/flip = matrix()
flip.Scale(-1,1)
transform = flip
/obj/item/organ/proc/Remove(var/bleed = FALSE)
RandomizePixelOffset()
var/matrix/M = matrix()
M.Turn(pick(0,90,180,270))
transform = M
var/blood_mat
if(owner)
if(bleed)
blood_mat = owner.blood_material
var/obj/item/limb/limb = owner.GetLimb(limb_key)
if(limb)
limb.organs -= src
owner.organs -= src
var/list/organ_list = owner.organs_by_key[organ_key]
organ_list -= src
if(!organ_list.len)
owner.organs_by_key[organ_key] = null
owner.organs_by_key -= organ_key
ForceMove(get_turf(owner))
if(vital)
owner.Die("loss of a vital organ")
owner = null
if(blood_mat)
spawn(1)
Splatter(loc, blood_mat)
/obj/item/organ/paired/Remove()
..()
if(left_side)
var/matrix/M = transform
if(!M) M = matrix()
M.Scale(-1,1)
transform = M
| DM | 4 | BloodyMan/Antimonium | code/mobs/organs/_organ.dm | [
"CC-BY-4.0"
] |
package com.alibaba.json.bvt.issue_2300;
import com.alibaba.fastjson.JSONObject;
import com.alibaba.fastjson.JSONPath;
import junit.framework.TestCase;
public class Issue2306 extends TestCase {
public void test_for_issue() throws Exception {
JSONObject object = new JSONObject();
object.put("help_score_avg.cbm", 123);
assertEquals(123
, JSONPath.extract(
object.toJSONString(), "['help_score_avg.cbm']"));
}
}
| Java | 4 | Czarek93/fastjson | src/test/java/com/alibaba/json/bvt/issue_2300/Issue2306.java | [
"Apache-2.0"
] |
/*
* Copyright (c) Facebook, Inc. and its affiliates.
*
* This source code is licensed under the MIT license found in the
* LICENSE file in the root directory of this source tree.
*/
#include <hermes/inspector/detail/CallbackOStream.h>
#include <memory>
#include <ostream>
#include <type_traits>
#include <vector>
#include <gmock/gmock.h>
namespace {
using namespace ::testing;
using namespace facebook::hermes::inspector::detail;
TEST(CallbackOStreamTests, Chunking) {
std::vector<std::string> recvd;
CallbackOStream cos(/* sz */ 4, [&recvd](std::string s) {
recvd.emplace_back(std::move(s));
return true;
});
cos << "123412341234";
EXPECT_THAT(recvd, ElementsAre("1234", "1234", "1234"));
}
TEST(CallbackOStreamTests, SyncOnDestruction) {
std::vector<std::string> recvd;
{
CallbackOStream cos(/* sz */ 4, [&recvd](std::string s) {
recvd.emplace_back(std::move(s));
return true;
});
cos << "123412341234123";
ASSERT_THAT(recvd, ElementsAre("1234", "1234", "1234"));
}
EXPECT_THAT(recvd, ElementsAre("1234", "1234", "1234", "123"));
}
TEST(CallbackOStreamTests, ExplicitFlush) {
std::vector<std::string> recvd;
CallbackOStream cos(/* sz */ 4, [&recvd](std::string s) {
recvd.emplace_back(std::move(s));
return true;
});
cos << "123412341234123";
EXPECT_THAT(recvd, ElementsAre("1234", "1234", "1234"));
cos << std::flush;
EXPECT_THAT(recvd, ElementsAre("1234", "1234", "1234", "123"));
}
TEST(CallbackOStreamTests, FlushEmpty) {
size_t i = 0;
CallbackOStream cos(/* sz */ 4, [&i](std::string) { return ++i; });
cos << "12341234";
ASSERT_THAT(i, Eq(2));
// If the put area is empty, we will not flush.
cos << std::flush;
EXPECT_THAT(i, Eq(2));
}
TEST(CallbackOStreamTests, FailingCallback) {
size_t i = 0;
std::vector<std::string> recvd;
CallbackOStream cos(/* sz */ 4, [&i, &recvd](std::string s) {
recvd.emplace_back(std::move(s));
return ++i < 2;
});
cos << "123412341234";
EXPECT_THAT(recvd, ElementsAre("1234", "1234"));
EXPECT_THAT(!cos, Eq(true));
}
TEST(CallbackOStreamTests, ThrowingCallback) {
size_t i = 0;
std::vector<std::string> recvd;
CallbackOStream cos(/* sz */ 4, [&i, &recvd](std::string s) {
if (i++ >= 2) {
throw "too big";
}
recvd.emplace_back(std::move(s));
return true;
});
cos << "123412341234";
EXPECT_THAT(recvd, ElementsAre("1234", "1234"));
EXPECT_THAT(!cos, Eq(true));
}
} // namespace
| C++ | 5 | pdlanl/react-native | ReactCommon/hermes/inspector/detail/tests/CallbackOStreamTests.cpp | [
"CC-BY-4.0",
"MIT"
] |
import "ecere"
import "eda"
define ODBC = "ODBC";
| eC | 1 | N-eil/ecere-sdk | eda/drivers/ODBC.ec | [
"BSD-3-Clause"
] |
// A more complicated 3D shape in OpenSCAD
$fn=32;
difference() {
// main shape
union() {
translate( [ 0, 0, 2 ] ) cube( [ 15, 15, 4 ], center=true );
translate( [ 0, 0, 13 ] ) cylinder( h=25, r1=5, r2=3, center=true );
translate( [ 0, 0, 28 ] ) sphere( r=6 );
}
// hole through center
translate( [ 0, 0, 17 ] ) cylinder( h=35, r=2, center=true );
}
| OpenSCAD | 4 | JavascriptID/sourcerer-app | src/test/resources/samples/langs/OpenSCAD/not_simple.scad | [
"MIT"
] |
-- (c) 2009 Rami Shashati under LGPL
concrete FoodsPor of Foods = open Prelude in {
flags coding=utf8;
lincat
Comment = {s : Str} ;
Quality = {s : Gender => Number => Str} ;
Kind = {s : Number => Str ; g : Gender} ;
Item = {s : Str ; n : Number ; g : Gender } ;
lin
Pred item quality =
{s = item.s ++ copula ! item.n ++ quality.s ! item.g ! item.n } ;
This = det Sg (table {Masc => "este" ; Fem => "esta"}) ;
That = det Sg (table {Masc => "esse" ; Fem => "essa"}) ;
These = det Pl (table {Masc => "estes" ; Fem => "estas"}) ;
Those = det Pl (table {Masc => "esses" ; Fem => "essas"}) ;
Mod quality kind = { s = \\n => kind.s ! n ++ quality.s ! kind.g ! n ; g = kind.g } ;
Wine = regNoun "vinho" Masc ;
Cheese = regNoun "queijo" Masc ;
Fish = regNoun "peixe" Masc ;
Pizza = regNoun "pizza" Fem ;
Very a = { s = \\g,n => "muito" ++ a.s ! g ! n } ;
Fresh = mkAdjReg "fresco" ;
Warm = mkAdjReg "quente" ;
Italian = mkAdjReg "Italiano" ;
Expensive = mkAdjReg "caro" ;
Delicious = mkAdjReg "delicioso" ;
Boring = mkAdjReg "chato" ;
param
Number = Sg | Pl ;
Gender = Masc | Fem ;
oper
QualityT : Type = {s : Gender => Number => Str} ;
mkAdj : (_,_,_,_ : Str) -> QualityT = \bonito,bonita,bonitos,bonitas -> {
s = table {
Masc => table { Sg => bonito ; Pl => bonitos } ;
Fem => table { Sg => bonita ; Pl => bonitas }
} ;
} ;
-- regular pattern
adjSozinho : Str -> QualityT = \sozinho ->
let sozinh = Predef.tk 1 sozinho
in mkAdj sozinho (sozinh + "a") (sozinh + "os") (sozinh + "as") ;
-- for gender-independent adjectives
adjUtil : Str -> Str -> QualityT = \util,uteis ->
mkAdj util util uteis uteis ;
-- smart paradigm for adjcetives
mkAdjReg : Str -> QualityT = \a -> case last a of {
"o" => adjSozinho a ;
"e" => adjUtil a (a + "s")
} ;
ItemT : Type = {s : Str ; n : Number ; g : Gender } ;
det : Number -> (Gender => Str) -> KindT -> ItemT =
\num,det,noun -> {s = det ! noun.g ++ noun.s ! num ; n = num ; g = noun.g } ;
KindT : Type = {s : Number => Str ; g : Gender} ;
noun : Str -> Str -> Gender -> KindT =
\animal,animais,gen -> {s = table {Sg => animal ; Pl => animais} ; g = gen } ;
regNoun : Str -> Gender -> KindT =
\carro,gen -> noun carro (carro + "s") gen ;
copula : Number => Str = table {Sg => "é" ; Pl => "são"} ;
}
| Grammatical Framework | 4 | JavascriptID/sourcerer-app | src/test/resources/samples/langs/Grammatical Framework/FoodsPor.gf | [
"MIT"
] |
module namespace d="de/bottlecaps/railroad/xq/disassemble.xq";
declare namespace svg="http://www.w3.org/2000/svg";
declare namespace xhtml="http://www.w3.org/1999/xhtml";
declare namespace xlink="http://www.w3.org/1999/xlink";
declare namespace xsl="http://www.w3.org/1999/XSL/Transform";
declare function d:file($name as xs:string, $content, $type)
{
element file
{
attribute name {$name},
attribute type {$type},
$content
}
};
declare function d:rewrite($nodes, $format, $hotspots as xs:boolean, $referenced-by as xs:boolean)
{
for $node in $nodes
return
typeswitch ($node)
case document-node() return
document{d:rewrite($node/node(), $format, $hotspots, $referenced-by)}
case element(svg:svg) return
if (empty($node/ancestor::xhtml:body)) then
()
else
let $name := $node/preceding::xhtml:p[1]/(.//xhtml:a, following::xhtml:a)[1]/@name
let $name :=
if ($name) then
$name
else if (contains($node/ancestor::xhtml:td[1]/preceding-sibling::xhtml:td[1], "Railroad Diagram Generator")) then
concat("rr-", normalize-space(substring-after(root($node)/xhtml:html/xhtml:head/xhtml:meta[@name = "generator"]/@content, "Railroad Diagram Generator")))
else
string(count($node/preceding::svg:svg) + 1)
let $img-name := concat("diagram/", $name, ".", $format)
return
(
d:file($img-name, $node, "xml"),
let $map-name := concat($name, ".map")
let $links := $node//svg:a
let $map :=
element map
{
attribute name {$map-name},
for $link in $links
let $rect := ($link//svg:rect)[last()]
let $x1 := $rect/@x
let $x2 := $rect/@x + $rect/@width
let $y1 := $rect/@y
let $y2 := $rect/@y + $rect/@height
let $target := data($link//svg:text)
return
element area
{
attribute shape {"rect"},
attribute coords {string-join(($x1, $y1, string($x2), string($y2)), ",")},
attribute href {$link/@xlink:href},
attribute title {$target},
$link/@target
}
}
let $img :=
element img
{
attribute border {0},
attribute src {$img-name},
$node/@height,
$node/@width,
attribute usemap {concat("#", $map-name)}[exists($map/area)]
}
return
(
$img,
$map[exists($img/@usemap)],
if (not($hotspots)) then
()
else
(
let $map-path := concat("hotspots/", $name, ".htm")
let $mapfile :=
<map id="{$name}" name="{$name}">{
for $link in $links
let $rect := ($link//svg:rect)[last()]
let $x1 := $rect/@x
let $x2 := $rect/@x + $rect/@width
let $y1 := $rect/@y
let $y2 := $rect/@y + $rect/@height
let $target := data($link//svg:text)
return
<area>{
attribute shape {"rect"},
attribute coords {string-join(($x1, $y1, string($x2), string($y2)), ",")},
if (matches($rect/following-sibling::svg:text[1], "\i\c+")) then
attribute href
{
if (matches($target, "^[A-Za-z][-+.A-Za-z0-9]*://")) then
$target
else
concat("ref-", $target, ".htm")
}
else
attribute href {"xqr-lexical.htm"},
attribute title {$target},
attribute alt {$target}
}</area>
}</map>
return d:file($map-path, $mapfile, "xhtml")
),
if (not($referenced-by)) then
()
else
(
let $referenced-by-links :=
if ($node/following-sibling::xhtml:p[1]/xhtml:div/@class = "ebnf") then
$node/following-sibling::xhtml:p[2]//xhtml:li/xhtml:a
else
$node/following-sibling::xhtml:p[1]//xhtml:li/xhtml:a
let $referenced-by-path := concat("referenced-by/", $name, ".htm")
let $referenced-by :=
<ul>{
for $a in $referenced-by-links
let $referrer := data($a/@title)
return <li><a href="ref-{$referrer}.htm" title="{$referrer}">{$referrer}</a></li>
}</ul>
return d:file($referenced-by-path, $referenced-by, "xhtml")
)
)
)
case element() return
element {local-name($node)}
{
$node/@*,
d:rewrite($node/node(), $format, $hotspots, $referenced-by)
}
default return
$node
};
declare function d:unnest($nodes as node()*) as node()*
{
for $node in $nodes
return
typeswitch ($node)
case element(file) return
()
case element() return
element {node-name($node)} {$node/@*, d:unnest($node/node())}
default return
$node
};
declare function d:disassemble($input, $format)
{
element files
{
let $directive := $input//processing-instruction()[local-name() = "rr"]/tokenize(., "\s+")[.]
let $hotspots := $directive = "hotspots"
let $referenced-by := $directive = "referenced-by"
let $files := d:file("index.html", d:rewrite($input, $format, $hotspots, $referenced-by), "xml")
for $file in $files/descendant-or-self::file
order by lower-case($file/@name)
return element file {$file/@*, d:unnest($file/node())}
}
};
| XQuery | 4 | bannmann/rr | src/main/resources/de/bottlecaps/railroad/xq/disassemble.xq | [
"Apache-2.0"
] |
spring.security.user.name=user
spring.security.user.password=password
spring.mongodb.embedded.version=3.5.5
| INI | 1 | techAi007/spring-boot | spring-boot-tests/spring-boot-smoke-tests/spring-boot-smoke-test-session-webflux/src/main/resources/application.properties | [
"Apache-2.0"
] |
#!/bin/bash -e
SDK_DIR=$1
echo "OpenCV Android SDK path: ${SDK_DIR}"
ANDROID_HOME=${ANDROID_HOME:-${ANDROID_SDK_ROOT:-${ANDROID_SDK?Required ANDROID_HOME/ANDROID_SDK/ANDROID_SDK_ROOT}}}
ANDROID_NDK=${ANDROID_NDK_HOME-${ANDROID_NDK:-${NDKROOT?Required ANDROID_NDK_HOME/ANDROID_NDK/NDKROOT}}}
echo "Android SDK: ${ANDROID_HOME}"
echo "Android NDK: ${ANDROID_NDK}"
if [ ! -d "${ANDROID_HOME}" ]; then
echo "FATAL: Missing Android SDK directory"
exit 1
fi
if [ ! -d "${ANDROID_NDK}" ]; then
echo "FATAL: Missing Android NDK directory"
exit 1
fi
export ANDROID_HOME=${ANDROID_HOME}
export ANDROID_SDK=${ANDROID_HOME}
export ANDROID_SDK_ROOT=${ANDROID_HOME}
export ANDROID_NDK=${ANDROID_NDK}
export ANDROID_NDK_HOME=${ANDROID_NDK}
echo "Cloning OpenCV Android SDK ..."
rm -rf "test-gradle"
cp -rp "${SDK_DIR}" "test-gradle"
echo "Cloning OpenCV Android SDK ... Done!"
echo "Run gradle ..."
(cd "test-gradle/samples"; ./gradlew -i assemble)
echo "#"
echo "# Done!"
echo "#"
| Shell | 4 | thisisgopalmandal/opencv | platforms/android/build-tests/test_gradle.sh | [
"BSD-3-Clause"
] |
library ieee;
use ieee.std_logic_1164.all;
entity test is
port(
clk : in std_logic;
d : in std_logic;
q : out std_logic);
end test;
architecture rtl of test is
begin
process (clk)
begin
if rising_edge(clk) then
q <= d;
end if;
end;
end rtl;
| VHDL | 4 | jmullercuber/atom-beautify | examples/nested-jsbeautifyrc/vhdl/expected/test.vhd | [
"MIT"
] |
var x = {};
var y = {foo: "bar"};
var a: object;
x = a;
y = a; // expect error
a = x;
a = y;
var n = 123;
var b = true;
var s = "fooo";
a = n; // expect error
a = b; // expect error
a = s; // expect error
n = a; // expect error
b = a; // expect error
s = a; // expect error
var numObj: Number = 123;
var boolObj: Boolean = true;
var strObj: String = "string";
a = numObj; // ok
a = boolObj; // ok
a = strObj; // ok
| TypeScript | 3 | nilamjadhav/TypeScript | tests/cases/conformance/types/nonPrimitive/nonPrimitiveAssignError.ts | [
"Apache-2.0"
] |
note
description: "API tests for USER_API"
date: "$Date$"
revision: "$Revision$"
class USER_API_TEST
inherit
EQA_TEST_SET
feature -- Test routines
test_create_user
-- Create user
--
-- This can only be done by the logged in user.
local
l_body: USER
do
-- TODO: Initialize required params.
-- l_body
-- api.create_user(l_body)
assert ("not_implemented", False)
end
test_create_users_with_array_input
-- Creates list of users with given input array
--
--
local
l_body: LIST [USER]
do
-- TODO: Initialize required params.
-- create {ARRAYED_LIST [USER]} l_body.make (2)
-- api.create_users_with_array_input(l_body)
assert ("not_implemented", False)
end
test_create_users_with_list_input
-- Creates list of users with given input array
--
--
local
l_body: LIST [USER]
do
-- TODO: Initialize required params.
-- create {ARRAYED_LIST [USER]} l_body.make (2)
-- api.create_users_with_list_input(l_body)
assert ("not_implemented", False)
end
test_delete_user
-- Delete user
--
-- This can only be done by the logged in user.
local
l_username: STRING_32
do
-- TODO: Initialize required params.
-- l_username
-- api.delete_user(l_username)
assert ("not_implemented", False)
end
test_login_user
-- Logs user into the system
--
--
local
l_response: STRING_32
l_username: STRING_32
l_password: STRING_32
do
-- TODO: Initialize required params.
-- l_username
-- l_password
-- l_response := api.login_user(l_username, l_password)
assert ("not_implemented", False)
end
test_logout_user
-- Logs out current logged in user session
--
--
local
do
-- TODO: Initialize required params.
-- api.logout_user
assert ("not_implemented", False)
end
test_update_user
-- Updated user
--
-- This can only be done by the logged in user.
local
l_username: STRING_32
l_body: USER
do
-- TODO: Initialize required params.
-- l_username
-- l_body
-- api.update_user(l_username, l_body)
assert ("not_implemented", False)
end
test_user_by_name
-- Get user by user name
--
--
local
l_response: USER
l_username: STRING_32
do
-- TODO: Initialize required params.
-- l_username
-- l_response := api.user_by_name(l_username)
assert ("not_implemented", False)
end
feature {NONE} -- Implementation
api: USER_API
-- Create an object instance of `USER_API'.
once
create { USER_API } Result
end
end
| Eiffel | 4 | MalcolmScoffable/openapi-generator | samples/client/petstore/eiffel/test/apis/user_api_test.e | [
"Apache-2.0"
] |
#!/usr/bin/env bash
set -e
cd $BUILD_STAGINGDIRECTORY
mkdir extraction
cd extraction
git clone --depth 1 https://github.com/microsoft/vscode-extension-telemetry.git
git clone --depth 1 https://github.com/microsoft/vscode-chrome-debug-core.git
git clone --depth 1 https://github.com/microsoft/vscode-node-debug2.git
git clone --depth 1 https://github.com/microsoft/vscode-node-debug.git
git clone --depth 1 https://github.com/microsoft/vscode-html-languageservice.git
git clone --depth 1 https://github.com/microsoft/vscode-json-languageservice.git
node $BUILD_SOURCESDIRECTORY/node_modules/.bin/vscode-telemetry-extractor --sourceDir $BUILD_SOURCESDIRECTORY --excludedDir $BUILD_SOURCESDIRECTORY/extensions --outputDir . --applyEndpoints
node $BUILD_SOURCESDIRECTORY/node_modules/.bin/vscode-telemetry-extractor --config $BUILD_SOURCESDIRECTORY/build/azure-pipelines/common/telemetry-config.json -o .
mkdir -p $BUILD_SOURCESDIRECTORY/.build/telemetry
mv declarations-resolved.json $BUILD_SOURCESDIRECTORY/.build/telemetry/telemetry-core.json
mv config-resolved.json $BUILD_SOURCESDIRECTORY/.build/telemetry/telemetry-extensions.json
cd ..
rm -rf extraction
| Shell | 3 | sbj42/vscode | build/azure-pipelines/common/extract-telemetry.sh | [
"MIT"
] |
/*##############################################################################
HPCC SYSTEMS software Copyright (C) 2012 HPCC Systems®.
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
############################################################################## */
integer8 i := 12345 : stored('i');
integer8 j := 12345 : stored('j');
rec := record
integer x;
ebcdic string s;
end;
ds := dataset('ds', rec, thor);
ds2 := table(ds,
{
ebcdic string s2 := if(x < 10, (ebcdic string)i, (ebcdic string)j);
data s3 := if(x < 10, (data)i, (data)j);
});
output(ds2);
| ECL | 3 | miguelvazq/HPCC-Platform | ecl/regress/ebcdiccast.ecl | [
"Apache-2.0"
] |
package unit.issues;
private class V2 {
public var x:Float;
public var y:Float;
inline public function new(x, y) {
this.x = x;
this.y = y;
}
}
class Issue6711 extends unit.Test {
function test() {
eq("(0,1)(0,1)(0,1)", run());
}
inline static function getPos() : V2 {
return new V2(0, 1);
}
inline static public function iteration(func) {
func();
func();
func();
}
public static function run() {
var r = "";
iteration(function() {
var wpos = getPos();
r += '(${wpos.x},${wpos.y})';
});
return r;
}
} | Haxe | 4 | Alan-love/haxe | tests/unit/src/unit/issues/Issue6711.hx | [
"MIT"
] |
# This file is distributed under the same license as the Django package.
#
# Translators:
# Tom Fifield <tom@tomfifield.net>, 2021
msgid ""
msgstr ""
"Project-Id-Version: django\n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2021-01-15 09:00+0100\n"
"PO-Revision-Date: 2021-04-11 13:16+0000\n"
"Last-Translator: Tom Fifield <tom@tomfifield.net>\n"
"Language-Team: English (Australia) (http://www.transifex.com/django/django/"
"language/en_AU/)\n"
"MIME-Version: 1.0\n"
"Content-Type: text/plain; charset=UTF-8\n"
"Content-Transfer-Encoding: 8bit\n"
"Language: en_AU\n"
"Plural-Forms: nplurals=2; plural=(n != 1);\n"
msgid "Redirects"
msgstr "Redirects"
msgid "site"
msgstr "site"
msgid "redirect from"
msgstr "redirect from"
msgid ""
"This should be an absolute path, excluding the domain name. Example: “/"
"events/search/”."
msgstr ""
"This should be an absolute path, excluding the domain name. Example: “/"
"events/search/”."
msgid "redirect to"
msgstr "redirect to"
msgid ""
"This can be either an absolute path (as above) or a full URL starting with a "
"scheme such as “https://”."
msgstr ""
"This can be either an absolute path (as above) or a full URL starting with a "
"scheme such as “https://”."
msgid "redirect"
msgstr "redirect"
msgid "redirects"
msgstr "redirects"
| Gettext Catalog | 2 | Joshua-Barawa/My-Photos | venv/lib/python3.8/site-packages/django/contrib/redirects/locale/en_AU/LC_MESSAGES/django.po | [
"PostgreSQL",
"Unlicense"
] |
0 code_t "proc*"
1 reg32_t "dword"
2 ptr(struct(0:ptr(struct(0:reg32_t,4:reg32_t,8:ptr(struct(0:reg32_t,4:reg32_t,8:ptr(TOP),12:ptr(TOP),16:reg32_t,20:array(uint32_t,15))),12:ptr(TOP),16:reg32_t,20:array(uint32_t,15))),4:ptr(struct(0:reg32_t,4:reg32_t,8:reg32_t,12:reg32_t,16:reg32_t,20:reg32_t,24:reg32_t,28:struct(0:reg32_t,4:reg32_t,8:reg32_t,12:reg32_t,16:reg32_t,20:reg32_t,24:reg32_t,28:array(reg8_t,80),108:reg32_t),140:reg32_t,144:reg32_t,148:reg32_t,152:reg32_t,156:reg32_t,160:reg32_t,164:reg32_t,168:reg32_t,172:reg32_t,176:reg32_t,180:reg32_t,184:reg32_t,188:reg32_t,192:reg32_t,196:reg32_t,200:reg32_t,204:array(reg8_t,512))))) "_EXCEPTION_POINTERS*"
3 ptr(struct(0:array(reg8_t,60),60:num32_t)) "StructFrag_377*"
4 ptr(struct(0:reg32_t,4:reg32_t,8:reg32_t,12:reg32_t)) "_EH4_SCOPETABLE*"
5 ptr(array(reg8_t,35)) "unknown_280*"
6 ptr(struct(0:array(reg8_t,60),60:reg32_t)) "StructFrag_188*"
7 ptr(TOP) "void*"
0 code_t "(_Inout_ _EXCEPTION_POINTERS* -ms-> LONG)*"
8 uint32_t "UINT"
1 reg32_t "HANDLE"
9 num32_t "LONG"
10 ptr(num32_t) "LPLONG"
11 ptr(array(reg8_t,288)) "unknown_2304*"
12 ptr(array(reg8_t,1040)) "unknown_8320*"
13 ptr(array(reg8_t,260)) "unknown_2080*"
14 ptr(array(reg8_t,520)) "unknown_4160*"
15 ptr(code_t) "proc**"
16 ptr(ptr(num8_t)) "char**"
17 ptr(struct(4:ptr(num8_t),8:ptr(num8_t),12:ptr(num8_t),16:ptr(num8_t))) "Struct_17*"
18 union(code_t,num32_t) "Union_1"
19 ptr(ptr(reg32_t)) "dword**"
9 num32_t "int"
8 uint32_t "unsigned int"
20 ptr(array(reg8_t,10)) "unknown_80*"
21 ptr(reg32_t) "dword*"
22 num64_t "long long"
23 float64_t "double"
0 code_t "(void -> int)*"
24 ptr(uint32_t) "unsigned int*"
25 ptr(uint16_t) "wchar_t*"
26 ptr(struct(0:reg32_t,4:ptr(TOP),8:reg32_t)) "_SECURITY_ATTRIBUTES*"
27 ptr(struct(0:reg32_t,4:reg32_t)) "_FILETIME*"
28 ptr(union(num64_t,struct(0:reg32_t,4:num32_t))) "Union_0*"
29 ptr(num8_t) "char*"
8 uint32_t "size_t"
30 ptr(struct(0:ptr(num8_t),4:num32_t,8:ptr(num8_t),12:num32_t,16:num32_t,20:num32_t,24:num32_t,28:ptr(num8_t))) "FILE*"
31 num8_t "char"
32 ptr(struct(0:array(reg8_t,24980),24980:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))))) "StructFrag_22*"
0 code_t "(void -> void)*"
33 array(reg8_t,12) "unknown_96"
34 array(reg8_t,20) "unknown_160"
35 reg64_t "qword"
29 ptr(num8_t) "char[]"
36 ptr(struct(0:ptr(num8_t),48:ptr(TOP))) "Struct_368*"
37 array(reg8_t,52) "unknown_416"
38 array(reg8_t,32) "unknown_256"
39 union(ptr(struct(0:reg32_t,12:code_t,16:code_t)),ptr(struct(0:array(reg8_t,16),16:code_t))) "Union_2"
40 ptr(struct(64:num32_t,72:ptr(TOP),76:uint32_t,80:reg32_t,84:reg32_t)) "Struct_369*"
41 struct(0:reg32_t,12:code_t,16:code_t) "Struct_6"
42 ptr(ptr(ptr(num8_t))) "char***"
43 ptr(struct(8:reg32_t,12:reg32_t,24:ptr(struct(0:array(reg8_t,12),12:reg32_t)))) "Struct_378*"
44 union(ptr(struct(0:array(reg8_t,24),24:ptr(TOP))),ptr(struct(8:reg32_t,12:reg32_t,24:ptr(struct(0:array(reg8_t,12),12:reg32_t))))) "Union_4"
45 ptr(struct(0:reg64_t,8:num32_t)) "StructFrag_190*"
46 ptr(struct(12:reg32_t,24:ptr(struct(0:array(reg8_t,12),12:reg32_t)))) "Struct_377*"
47 ptr(struct(0:reg32_t,4:ptr(struct(0:array(reg8_t,16),16:code_t)),24:ptr(TOP))) "Struct_381*"
48 ptr(struct(4:ptr(struct(0:array(reg8_t,20),20:ptr(struct(0:reg32_t,4:code_t)))),8:reg32_t,24:ptr(TOP))) "Struct_380*"
49 ptr(struct(0:reg32_t,4:ptr(struct(0:reg32_t,12:code_t,16:code_t)),12:reg32_t,16:reg32_t,20:reg32_t,24:ptr(struct(4:ptr(struct(0:reg32_t,12:code_t,16:code_t)),12:reg32_t)))) "Struct_379*"
50 ptr(struct(0:reg32_t,12:code_t,16:code_t)) "Struct_6*"
51 ptr(struct(0:array(reg8_t,48),48:ptr(reg32_t))) "StructFrag_192*"
52 reg16_t "word"
53 ptr(struct(4:ptr(struct(0:array(reg8_t,52),52:code_t)),8:reg32_t,24:ptr(TOP))) "Struct_383*"
54 ptr(struct(4:ptr(struct(0:array(reg8_t,56),56:code_t)),8:reg32_t,24:ptr(reg32_t))) "Struct_384*"
55 ptr(struct(0:array(reg8_t,24),24:ptr(reg32_t))) "StructFrag_12*"
21 ptr(reg32_t) "dword[]"
56 ptr(struct(4:ptr(struct(0:array(reg8_t,68),68:code_t)),8:reg32_t,24:ptr(TOP))) "Struct_388*"
57 ptr(struct(4:ptr(struct(0:array(reg8_t,64),64:code_t)),8:reg32_t,24:ptr(TOP))) "Struct_389*"
58 ptr(struct(4:ptr(struct(0:array(reg8_t,60),60:code_t)),8:reg32_t,24:ptr(TOP))) "Struct_390*"
10 ptr(num32_t) "int*"
59 union(ptr(num32_t),ptr(reg32_t)) "Union_7"
60 ptr(struct(0:reg32_t,4:reg32_t,8:reg32_t,16:float64_t,24:reg32_t,28:reg32_t,32:reg32_t,36:reg32_t,48:reg32_t,56:reg32_t,64:reg32_t,68:num32_t,84:reg32_t,88:reg32_t,92:reg32_t,96:reg32_t,100:reg32_t,108:reg32_t,112:reg32_t,116:reg32_t,120:reg32_t,124:reg32_t,144:reg32_t,148:reg32_t,152:reg32_t,156:reg32_t,160:reg32_t,164:reg32_t,168:reg32_t,172:reg32_t,176:reg32_t,180:reg32_t)) "Struct_28*"
61 ptr(struct(129296:reg32_t,129320:ptr(TOP))) "Struct_47*"
62 ptr(struct(368:reg32_t,372:reg32_t,376:reg32_t,384:float64_t,392:reg32_t,396:reg32_t,400:reg32_t,404:reg32_t,416:reg32_t,424:reg32_t,432:reg32_t,436:num32_t,452:reg32_t,456:reg32_t,460:reg32_t,464:reg32_t,468:reg32_t,476:reg32_t,480:reg32_t,484:reg32_t,488:reg32_t,492:reg32_t,512:reg32_t,516:reg32_t,520:reg32_t,524:reg32_t,528:reg32_t,532:reg32_t,536:reg32_t,540:reg32_t,544:reg32_t,548:reg32_t)) "Struct_451*"
63 ptr(struct(0:array(reg8_t,111928),111928:reg32_t)) "StructFrag_24*"
64 ptr(struct(0:array(reg8_t,552),552:ptr(struct(0:array(reg8_t,111928),111928:reg32_t)))) "StructFrag_25*"
65 union(ptr(struct(368:reg32_t,384:float64_t,452:reg32_t)),ptr(struct(368:reg32_t,372:reg32_t,376:reg32_t,384:float64_t,392:reg32_t,396:reg32_t,400:reg32_t,404:reg32_t,416:reg32_t,424:reg32_t,432:reg32_t,436:num32_t,452:reg32_t,456:reg32_t,460:reg32_t,464:reg32_t,468:reg32_t,476:reg32_t,480:reg32_t,484:reg32_t,488:reg32_t,492:reg32_t,512:reg32_t,516:reg32_t,520:reg32_t,524:reg32_t,528:reg32_t,532:reg32_t,536:reg32_t,540:reg32_t,544:reg32_t,548:reg32_t))) "Union_10"
66 ptr(struct(0:num32_t,4:num32_t,8:num32_t,16:float64_t,24:num32_t,28:num32_t,32:num32_t,36:num32_t,48:num32_t,56:num32_t,64:num32_t,68:num32_t,84:num32_t,88:num32_t,92:num32_t,96:num32_t,100:num32_t,108:num32_t,112:num32_t,116:num32_t,120:num32_t,124:num32_t,144:num32_t,148:num32_t,152:num32_t,156:num32_t,160:num32_t,164:num32_t,168:num32_t,172:num32_t,176:num32_t,180:num32_t)) "Struct_454*"
67 ptr(struct(4:reg32_t,16:reg32_t,20:reg32_t,24:ptr(struct(368:num32_t,372:num32_t,376:num32_t,384:float64_t,392:num32_t,396:num32_t,400:num32_t,404:num32_t,416:num32_t,424:num32_t,432:num32_t,436:num32_t,452:num32_t,456:num32_t,460:num32_t,464:num32_t,468:num32_t,476:num32_t,480:num32_t,484:num32_t,488:num32_t,492:num32_t,512:num32_t,516:num32_t,520:num32_t,524:num32_t,528:num32_t,532:num32_t,536:num32_t,540:num32_t,544:num32_t,548:num32_t)))) "Struct_455*"
68 ptr(ptr(TOP)) "void**"
69 ptr(struct(0:array(reg8_t,1104),1104:ptr(TOP))) "StructFrag_31*"
70 union(ptr(reg32_t),ptr(struct(0:array(reg8_t,122288),122288:reg32_t)),ptr(struct(0:array(reg8_t,122268),122268:reg32_t)),ptr(struct(0:array(reg8_t,179992),179992:reg32_t))) "Union_5"
10 ptr(num32_t) "int[]"
71 array(reg8_t,104) "unknown_832"
72 union(ptr(reg32_t),ptr(struct(0:array(reg8_t,1328),1328:reg32_t))) "Union_6"
73 ptr(struct(0:array(reg8_t,552),552:reg32_t)) "StructFrag_32*"
19 ptr(ptr(reg32_t)) "dword[]*"
74 ptr(struct(0:array(reg8_t,257744),257744:num8_t)) "StructFrag_37*"
75 ptr(struct(212:reg32_t,216:reg32_t,552:ptr(struct(0:array(reg8_t,257744),257744:num8_t)),568:reg32_t,572:reg32_t,576:reg32_t,580:reg32_t,648:reg32_t,652:reg32_t,656:reg32_t)) "Struct_91*"
76 ptr(struct(0:array(reg8_t,122288),122288:reg32_t)) "StructFrag_39*"
77 ptr(struct(0:array(reg8_t,552),552:ptr(struct(0:array(reg8_t,122288),122288:reg32_t)))) "StructFrag_40*"
78 ptr(struct(0:array(reg8_t,122268),122268:reg32_t)) "StructFrag_41*"
79 ptr(struct(0:array(reg8_t,552),552:ptr(struct(0:array(reg8_t,122268),122268:reg32_t)))) "StructFrag_42*"
80 ptr(struct(0:array(reg8_t,179992),179992:reg32_t)) "StructFrag_43*"
81 ptr(struct(0:array(reg8_t,552),552:ptr(struct(0:array(reg8_t,179992),179992:reg32_t)))) "StructFrag_44*"
82 ptr(struct(57272:num8_t,186384:ptr(TOP),186388:reg32_t,186396:reg32_t,186400:reg32_t,186404:reg32_t,186408:reg32_t)) "Struct_95*"
83 ptr(struct(0:array(reg8_t,552),552:ptr(struct(57272:num8_t,186384:ptr(TOP),186388:reg32_t,186396:reg32_t,186400:reg32_t,186404:reg32_t,186408:reg32_t)))) "StructFrag_390*"
84 ptr(struct(186412:ptr(TOP),186416:reg32_t)) "Struct_96*"
85 ptr(ptr(struct(0:ptr(TOP),4:reg32_t))) "Struct_97**"
86 ptr(struct(0:array(reg8_t,552),552:ptr(struct(186412:ptr(TOP),186416:reg32_t)))) "StructFrag_47*"
87 ptr(struct(552:ptr(reg32_t),644:reg32_t)) "Struct_99*"
88 ptr(struct(0:array(reg8_t,1328),1328:reg32_t)) "StructFrag_196*"
89 ptr(struct(0:array(reg8_t,68),68:ptr(TOP))) "StructFrag_151*"
90 union(ptr(num32_t),ptr(struct(0:reg32_t,8:reg32_t,12:reg32_t,16:reg32_t,20:reg32_t,44:reg32_t,68:ptr(TOP)))) "Union_12"
91 ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))) "StructFrag_17*"
92 ptr(struct(0:array(reg8_t,36),36:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))))) "StructFrag_21*"
93 ptr(struct(0:array(reg8_t,374596),374596:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))))) "StructFrag_304*"
94 ptr(struct(8208:ptr(reg16_t),8212:reg32_t,8216:reg32_t)) "Struct_72*"
95 union(ptr(reg32_t),ptr(struct(129296:reg32_t,129320:ptr(TOP))),ptr(struct(179536:float64_t,179544:float64_t,179552:float64_t,179560:float64_t,179568:float64_t,179576:float64_t,179584:float64_t,179592:float64_t,179600:float64_t,179608:float64_t,179616:float64_t,179624:float64_t,179632:float64_t,179640:float64_t,179648:float64_t,179656:float64_t)),ptr(struct(0:array(reg8_t,122288),122288:reg32_t)),ptr(struct(0:array(reg8_t,122268),122268:reg32_t)),ptr(struct(0:array(reg8_t,179992),179992:reg32_t)),ptr(struct(0:array(reg8_t,198192),198192:num8_t)),ptr(struct(0:ptr(TOP),168:code_t)),ptr(struct(57360:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),99044:ptr(array(reg8_t,1184)),99048:ptr(array(reg8_t,573)),99052:ptr(array(reg8_t,1184)),99056:ptr(array(reg8_t,573)),99060:ptr(array(reg8_t,1184)),99064:ptr(array(reg8_t,688)),99068:ptr(array(reg8_t,144)),99072:ptr(array(reg8_t,144)),111892:reg32_t,111900:reg32_t,128980:reg32_t,128984:reg32_t,128992:float64_t,129000:reg32_t,129012:reg32_t,129024:reg32_t,129032:reg32_t,129056:reg32_t,129060:reg32_t,129064:reg32_t,129088:reg32_t,129104:reg32_t,129120:reg32_t,129128:reg32_t,129132:reg32_t,131336:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),131348:reg32_t,131880:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),148552:reg32_t,148556:reg32_t,148568:float64_t,148576:float64_t,148584:float64_t,148592:float64_t,148656:reg32_t,148660:reg32_t,148752:float64_t,148776:reg32_t,148788:reg32_t,148860:reg32_t,148864:reg32_t,148868:reg32_t,148872:reg32_t,179464:float64_t,179472:float64_t,179480:float64_t,179488:float64_t,179504:float64_t,179512:float64_t,179520:reg32_t,179536:float64_t,179544:float64_t,179552:float64_t,179560:float64_t,179568:float64_t,179576:float64_t,179584:float64_t,179592:float64_t,179600:float64_t,179608:float64_t,179616:float64_t,179624:float64_t,179632:float64_t,179640:float64_t,179648:float64_t,179656:float64_t,179792:num32_t,179800:num32_t,179808:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),179836:reg32_t,179844:reg32_t,182188:reg32_t,186384:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),186396:reg32_t,186400:reg32_t,186404:reg32_t,186408:reg32_t,186412:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),186420:reg32_t,186424:num32_t,186436:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),186444:reg32_t,186452:reg32_t,186456:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),186460:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),186464:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),186468:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),186472:reg32_t,186476:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),186480:ptr(array(reg8_t,422)),186484:ptr(array(reg8_t,220)),186488:ptr(array(reg8_t,222)),186492:reg32_t,186496:ptr(array(reg8_t,817)),186500:ptr(array(reg8_t,1087)),186504:ptr(array(reg8_t,80)),186508:ptr(array(reg8_t,100)),187076:ptr(array(reg8_t,148)),187080:ptr(TOP),187084:ptr(array(reg8_t,29)),187088:ptr(array(reg8_t,26)),187092:reg32_t,187112:ptr(array(reg8_t,80)),187128:ptr(array(reg8_t,112)),187132:ptr(array(reg8_t,100)),187140:ptr(array(reg8_t,20)),187144:ptr(array(reg8_t,160)),187148:ptr(array(reg8_t,34)),187152:ptr(array(reg8_t,510)),187156:ptr(array(reg8_t,192)),187160:ptr(array(reg8_t,138)),187164:ptr(array(reg8_t,817)),187168:ptr(array(reg8_t,441)),187172:ptr(array(reg8_t,618)),187176:ptr(array(reg8_t,322)),187180:ptr(array(reg8_t,156)),187184:ptr(array(reg8_t,1087)),187188:ptr(array(reg8_t,591)),187192:ptr(array(reg8_t,827)),187196:ptr(array(reg8_t,435)),187200:ptr(array(reg8_t,213)),187204:ptr(array(reg8_t,1184)),187208:ptr(array(reg8_t,573)),187212:ptr(array(reg8_t,1184)),187216:ptr(array(reg8_t,573)),187220:ptr(array(reg8_t,688)),187224:ptr(array(reg8_t,110)),187236:ptr(array(reg8_t,33)),187240:ptr(array(reg8_t,32)),187244:ptr(array(reg8_t,726)),187248:ptr(array(reg8_t,144)),187252:ptr(array(reg8_t,144)),187256:ptr(array(reg8_t,220)),187260:ptr(array(reg8_t,222)),4294967292:ptr(TOP)))) "Union_27"
96 ptr(struct(0:num32_t,4:reg32_t,8:num32_t,12:num32_t,24:ptr(TOP),36:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),40:num32_t)) "Struct_32*"
97 ptr(struct(0:num32_t,4:num32_t,8:num32_t,12:num32_t,24:ptr(TOP),36:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),40:num32_t)) "Struct_500*"
98 ptr(struct(131280:num32_t,131284:num32_t,131288:num32_t,131292:num32_t,131304:ptr(TOP),131316:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),131320:num32_t)) "Struct_504*"
99 ptr(struct(128992:float64_t,129000:reg32_t,129032:reg32_t,129092:num32_t,148656:reg32_t,148728:num32_t,148732:num32_t,148736:num32_t,148752:float64_t,148828:num32_t,148832:num32_t,148836:num32_t,148840:num32_t)) "Struct_896*"
100 ptr(ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP)))) "StructFrag_17**"
101 ptr(struct(0:array(reg8_t,68),68:code_t)) "StructFrag_13*"
102 ptr(struct(0:array(reg8_t,374220),374220:code_t)) "StructFrag_141*"
103 array(reg8_t,80) "unknown_640"
104 ptr(struct(0:uint32_t,12:uint32_t,24:ptr(TOP),28:ptr(TOP),32:ptr(TOP))) "Struct_332*"
105 ptr(struct(0:uint32_t,8:uint32_t,12:uint32_t,20:uint32_t,24:ptr(TOP))) "Struct_435*"
106 int32_t "signed int"
107 ptr(struct(0:uint32_t,4:reg32_t,8:uint32_t,12:uint32_t,20:uint32_t,24:ptr(TOP),40:reg32_t)) "Struct_492*"
108 ptr(struct(0:num32_t,111880:reg32_t,111892:reg32_t,111968:reg32_t,122272:reg32_t,129000:reg32_t,129048:reg32_t,129056:reg32_t,129248:reg32_t,131344:reg32_t,131348:reg32_t,148544:int32_t,148560:reg32_t,148576:float64_t,148600:num32_t,148604:num32_t,148616:int32_t,148656:num32_t,148660:num32_t,148728:int32_t,148732:int32_t,148736:int32_t,148748:int32_t,148752:float64_t,148776:reg32_t,148808:reg32_t,148820:reg32_t,148824:reg32_t,148860:reg32_t,148864:reg32_t,148868:reg32_t,148872:reg32_t,148880:reg32_t,148884:reg32_t,179460:reg32_t)) "Struct_489*"
109 ptr(struct(0:reg64_t,8:code_t)) "StructFrag_33*"
110 union(ptr(reg32_t),ptr(struct(0:reg64_t,8:reg32_t))) "Union_13"
111 ptr(struct(5156:ptr(struct(0:array(reg8_t,32),32:num8_t)),5368:num8_t,5379:num8_t,5389:num8_t)) "Struct_311*"
112 ptr(struct(0:array(reg8_t,186364),186364:reg32_t)) "StructFrag_154*"
113 ptr(struct(0:array(reg8_t,48),48:reg32_t)) "StructFrag_48*"
114 ptr(struct(0:array(reg8_t,59568),59568:num8_t)) "StructFrag_36*"
115 ptr(struct(57272:num8_t,57273:num8_t,57274:num8_t,57275:num8_t,111896:num32_t,111900:num32_t,186384:ptr(TOP),186388:reg32_t,186392:reg32_t,186396:reg32_t,186400:reg32_t,186404:reg32_t,186408:reg32_t)) "Struct_914*"
116 ptr(struct(0:reg32_t,87:num8_t,12448:num32_t,12452:num32_t,12456:num32_t,12460:num32_t,12472:reg32_t,12808:reg32_t,12812:reg32_t,12824:reg32_t,12876:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),12884:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),12888:reg32_t,12892:reg32_t,12900:reg32_t,23176:reg32_t,23180:reg32_t,23184:reg32_t,23200:reg32_t,23220:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),23224:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),23228:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),23232:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),26528:reg32_t,26532:reg32_t)) "Struct_482*"
117 ptr(struct(129296:reg32_t,129300:reg32_t,129308:reg32_t,129320:ptr(TOP),129332:ptr(TOP),129336:reg32_t)) "Struct_484*"
59 union(ptr(num32_t),ptr(reg32_t)) "Union_16"
118 union(ptr(reg32_t),ptr(struct(0:reg32_t,4:reg32_t,8:reg32_t,16:float64_t,24:reg32_t,28:reg32_t,32:reg32_t,36:reg32_t,48:reg32_t,56:reg32_t,64:reg32_t,68:num32_t,84:reg32_t,88:reg32_t,92:reg32_t,96:reg32_t,100:reg32_t,108:reg32_t,112:reg32_t,116:reg32_t,120:reg32_t,124:reg32_t,144:reg32_t,148:reg32_t,152:reg32_t,156:reg32_t,160:reg32_t,164:reg32_t,168:reg32_t,172:reg32_t,176:reg32_t,180:reg32_t))) "Union_17"
119 union(ptr(struct(129296:reg32_t,129320:ptr(TOP))),ptr(struct(179536:float64_t,179544:float64_t,179552:float64_t,179560:float64_t,179568:float64_t,179576:float64_t,179584:float64_t,179592:float64_t,179600:float64_t,179608:float64_t,179616:float64_t,179624:float64_t,179632:float64_t,179640:float64_t,179648:float64_t,179656:float64_t)),ptr(struct(0:array(reg8_t,198192),198192:num8_t)),ptr(struct(57360:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),99044:ptr(array(reg8_t,1184)),99048:ptr(array(reg8_t,573)),99052:ptr(array(reg8_t,1184)),99056:ptr(array(reg8_t,573)),99060:ptr(array(reg8_t,1184)),99064:ptr(array(reg8_t,688)),99068:ptr(array(reg8_t,144)),99072:ptr(array(reg8_t,144)),111892:reg32_t,111900:reg32_t,128980:reg32_t,128984:reg32_t,128992:float64_t,129000:reg32_t,129012:reg32_t,129024:reg32_t,129032:reg32_t,129056:reg32_t,129060:reg32_t,129064:reg32_t,129088:reg32_t,129104:reg32_t,129120:reg32_t,129128:reg32_t,129132:reg32_t,131336:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),131348:reg32_t,131880:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),148552:reg32_t,148556:reg32_t,148568:float64_t,148576:float64_t,148584:float64_t,148592:float64_t,148656:reg32_t,148660:reg32_t,148752:float64_t,148776:reg32_t,148788:reg32_t,148860:reg32_t,148864:reg32_t,148868:reg32_t,148872:reg32_t,179464:float64_t,179472:float64_t,179480:float64_t,179488:float64_t,179504:float64_t,179512:float64_t,179520:reg32_t,179536:float64_t,179544:float64_t,179552:float64_t,179560:float64_t,179568:float64_t,179576:float64_t,179584:float64_t,179592:float64_t,179600:float64_t,179608:float64_t,179616:float64_t,179624:float64_t,179632:float64_t,179640:float64_t,179648:float64_t,179656:float64_t,179792:num32_t,179800:num32_t,179808:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),179836:reg32_t,179844:reg32_t,182188:reg32_t,186384:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),186396:reg32_t,186400:reg32_t,186404:reg32_t,186408:reg32_t,186412:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),186420:reg32_t,186424:num32_t,186436:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),186444:reg32_t,186452:reg32_t,186456:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),186460:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),186464:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),186468:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),186472:reg32_t,186476:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),186480:ptr(array(reg8_t,422)),186484:ptr(array(reg8_t,220)),186488:ptr(array(reg8_t,222)),186492:reg32_t,186496:ptr(array(reg8_t,817)),186500:ptr(array(reg8_t,1087)),186504:ptr(array(reg8_t,80)),186508:ptr(array(reg8_t,100)),187076:ptr(array(reg8_t,148)),187080:ptr(TOP),187084:ptr(array(reg8_t,29)),187088:ptr(array(reg8_t,26)),187092:reg32_t,187112:ptr(array(reg8_t,80)),187128:ptr(array(reg8_t,112)),187132:ptr(array(reg8_t,100)),187140:ptr(array(reg8_t,20)),187144:ptr(array(reg8_t,160)),187148:ptr(array(reg8_t,34)),187152:ptr(array(reg8_t,510)),187156:ptr(array(reg8_t,192)),187160:ptr(array(reg8_t,138)),187164:ptr(array(reg8_t,817)),187168:ptr(array(reg8_t,441)),187172:ptr(array(reg8_t,618)),187176:ptr(array(reg8_t,322)),187180:ptr(array(reg8_t,156)),187184:ptr(array(reg8_t,1087)),187188:ptr(array(reg8_t,591)),187192:ptr(array(reg8_t,827)),187196:ptr(array(reg8_t,435)),187200:ptr(array(reg8_t,213)),187204:ptr(array(reg8_t,1184)),187208:ptr(array(reg8_t,573)),187212:ptr(array(reg8_t,1184)),187216:ptr(array(reg8_t,573)),187220:ptr(array(reg8_t,688)),187224:ptr(array(reg8_t,110)),187236:ptr(array(reg8_t,33)),187240:ptr(array(reg8_t,32)),187244:ptr(array(reg8_t,726)),187248:ptr(array(reg8_t,144)),187252:ptr(array(reg8_t,144)),187256:ptr(array(reg8_t,220)),187260:ptr(array(reg8_t,222)),4294967292:ptr(TOP)))) "Union_14"
120 union(ptr(reg32_t),ptr(struct(0:array(reg8_t,16),16:num8_t))) "Union_15"
121 ptr(struct(0:ptr(TOP),4:ptr(TOP))) "Struct_580*"
122 ptr(reg16_t) "word[]"
123 union(ptr(ptr(TOP)),ptr(struct(0:ptr(TOP),4:ptr(TOP)))) "Union_25"
124 ptr(struct(24:ptr(TOP),32:reg32_t)) "Struct_236*"
125 ptr(num16_t) "short[]"
126 ptr(struct(28:ptr(TOP),32:reg32_t,36:reg32_t)) "Struct_584*"
127 ptr(int32_t) "signed int[]"
128 ptr(struct(0:code_t,12:code_t)) "Struct_582*"
129 ptr(struct(0:code_t,8:code_t,12:code_t)) "Struct_586*"
130 ptr(struct(24:ptr(TOP),32:reg32_t,56:reg16_t,58:reg16_t)) "Struct_338*"
131 ptr(struct(0:code_t,4:code_t,12:code_t)) "Struct_589*"
132 union(ptr(reg32_t),ptr(struct(0:array(reg8_t,374144),374144:reg32_t))) "Union_29"
133 ptr(ptr(struct(0:reg32_t,8:ptr(TOP)))) "Struct_217**"
134 ptr(struct(8:ptr(TOP),20:reg32_t)) "Struct_215*"
135 ptr(ptr(struct(8:ptr(TOP),20:reg32_t))) "Struct_215**"
136 ptr(struct(5172:reg32_t,5200:reg32_t,5360:ptr(TOP),5364:ptr(TOP))) "Struct_597*"
137 ptr(struct(5172:reg32_t,5348:ptr(reg32_t),5352:ptr(reg32_t),5356:ptr(reg32_t),5360:ptr(reg32_t),5364:ptr(reg32_t))) "Struct_598*"
138 union(ptr(struct(0:array(reg8_t,12676),12676:ptr(reg16_t))),ptr(struct(6340:reg32_t,6348:reg32_t,8100:ptr(TOP),8116:ptr(TOP))),ptr(struct(0:array(reg8_t,7456),7456:reg16_t))) "Union_31"
139 ptr(struct(0:array(reg8_t,25508),25508:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))))) "StructFrag_305*"
140 ptr(struct(12736:num32_t,12740:num32_t,12744:num32_t,12748:num32_t,12760:ptr(TOP),12772:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),12776:num32_t)) "Struct_601*"
141 union(ptr(reg32_t),ptr(struct(0:reg32_t,87:num8_t,12448:num32_t,12452:num32_t,12456:num32_t,12460:num32_t,12472:reg32_t,12808:reg32_t,12812:reg32_t,12824:reg32_t,12876:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),12884:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),12888:reg32_t,12892:reg32_t,12900:reg32_t,23176:reg32_t,23180:reg32_t,23184:reg32_t,23200:reg32_t,23220:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),23224:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),23228:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),23232:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),26528:reg32_t,26532:reg32_t))) "Union_33"
142 ptr(struct(12464:reg32_t,12468:reg32_t,12820:reg32_t,12824:reg32_t,12828:reg32_t,12832:reg32_t,12836:reg32_t,23192:reg32_t,23196:reg32_t,23204:reg32_t,23208:reg32_t,23212:reg32_t,23216:reg32_t,25374:reg16_t,25376:num8_t,26532:reg32_t,26552:ptr(array(reg8_t,51)),26556:ptr(array(reg8_t,1008)),26560:ptr(array(reg8_t,60)),26564:ptr(array(reg8_t,50)),26568:ptr(array(reg8_t,544)),26572:ptr(array(reg8_t,343)),26576:ptr(array(reg8_t,97)),26580:ptr(array(reg8_t,57)),26584:ptr(array(reg8_t,95)),26588:ptr(array(reg8_t,116)),26592:ptr(array(reg8_t,168)),26596:ptr(array(reg8_t,352)),26600:ptr(array(reg8_t,240)),26608:ptr(array(reg8_t,160)),26612:ptr(array(reg8_t,169)),26616:ptr(array(reg8_t,238)),26620:ptr(array(reg8_t,125)),26624:ptr(array(reg8_t,93)),26628:ptr(array(reg8_t,77)),26632:ptr(array(reg8_t,117)),26640:ptr(array(reg8_t,120)),26644:ptr(array(reg8_t,48)),26648:ptr(array(reg8_t,96)),26660:ptr(array(reg8_t,130)),26664:ptr(array(reg8_t,80)),26668:ptr(array(reg8_t,65)),26672:ptr(array(reg8_t,24)))) "Struct_830*"
143 ptr(struct(0:num32_t,4:num32_t,8:num32_t,12:num32_t,16:int32_t,20:num32_t,24:ptr(TOP),28:ptr(TOP),32:ptr(TOP),36:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),40:num32_t,44:uint32_t)) "Struct_602*"
144 ptr(struct(4:reg32_t,24:ptr(TOP),28:ptr(TOP),32:ptr(TOP))) "Struct_339*"
145 ptr(struct(0:reg32_t,4:ptr(TOP))) "StructFrag_301*"
146 ptr(struct(111892:num32_t,129056:num32_t,129248:reg32_t,131344:num32_t,148544:num32_t,148576:float64_t,148732:num32_t,148788:num32_t,148860:reg32_t,148864:reg32_t,179460:num32_t,179900:reg32_t)) "Struct_897*"
147 ptr(struct(111880:num32_t,111892:reg32_t,111928:num32_t,148548:num32_t,148568:float64_t,148576:float64_t,148584:float64_t,148792:reg32_t)) "Struct_654*"
148 ptr(struct(111880:num32_t,111892:reg32_t,129056:num32_t,129108:num32_t,129112:num32_t,129116:num32_t,148568:float64_t,148576:float64_t,148584:float64_t,148792:reg32_t,148864:num32_t,148872:num32_t)) "Struct_898*"
149 ptr(struct(131344:num32_t,148548:reg32_t,148608:reg32_t,148648:reg32_t,148652:reg32_t,148672:reg32_t,148676:reg32_t,148680:reg32_t,148684:reg32_t,148688:reg32_t,148692:reg32_t,148696:reg32_t,148700:reg32_t,148704:reg32_t,148708:num32_t,148712:num32_t,148716:num32_t,148720:num32_t,148724:num32_t,148728:reg32_t,148740:reg32_t,148752:float64_t)) "Struct_655*"
127 ptr(int32_t) "signed int*"
150 ptr(struct(111892:reg32_t,129056:reg32_t,129248:reg32_t,131344:num32_t,148544:int32_t,148576:float64_t,148728:int32_t,148732:int32_t,148752:float64_t,148776:num32_t,148860:reg32_t,148864:reg32_t,179900:reg32_t)) "Struct_656*"
151 union(ptr(struct(0:array(reg8_t,15848),15848:reg32_t)),ptr(ptr(TOP)),ptr(struct(0:array(reg8_t,14642),14642:reg16_t))) "Union_24"
152 ptr(struct(0:array(reg8_t,28),28:ptr(TOP))) "StructFrag_87*"
153 ptr(struct(0:array(reg8_t,84),84:code_t)) "StructFrag_156*"
154 union(ptr(num8_t),ptr(struct(0:array(reg8_t,16),16:reg32_t))) "Union_55"
155 ptr(struct(8:ptr(struct(0:array(reg8_t,16),16:reg32_t)),36:ptr(TOP),44:reg32_t,52:num32_t)) "Struct_728*"
156 ptr(struct(7948:reg32_t,8236:num32_t,8240:num32_t,49892:code_t)) "Struct_763*"
157 ptr(struct(0:ptr(TOP),164:code_t)) "Struct_135*"
158 ptr(struct(3560:ptr(num8_t),3588:ptr(TOP),3596:reg32_t,3604:num32_t)) "Struct_721*"
159 ptr(struct(6312:ptr(num8_t),6340:ptr(TOP),6348:reg32_t,6356:num32_t)) "Struct_725*"
160 ptr(struct(0:reg32_t,88:code_t)) "Struct_203*"
161 ptr(struct(0:array(reg8_t,6),6:num8_t)) "StructFrag_163*"
162 ptr(struct(2332:ptr(TOP),7876:reg32_t,7884:ptr(struct(0:array(reg8_t,536870911),4294967295:num8_t)),7928:reg32_t)) "Struct_915*"
163 ptr(struct(3588:reg32_t,3596:reg32_t,5184:reg16_t,5348:ptr(TOP),5364:ptr(TOP))) "Struct_552*"
164 array(reg8_t,16) "unknown_128"
165 union(ptr(struct(0:array(reg8_t,15848),15848:reg32_t)),ptr(ptr(TOP))) "Union_22"
166 ptr(struct(0:array(reg8_t,88),88:code_t)) "StructFrag_88*"
122 ptr(reg16_t) "word*"
167 ptr(struct(0:array(reg8_t,112),112:reg16_t)) "StructFrag_240*"
168 ptr(struct(0:array(reg8_t,44),44:code_t)) "StructFrag_126*"
15 ptr(code_t) "proc*[]"
169 array(reg8_t,64) "unknown_512"
170 ptr(struct(0:array(reg8_t,99880),99880:ptr(struct(0:reg32_t,8:ptr(TOP))))) "StructFrag_218*"
170 ptr(struct(0:array(reg8_t,99880),99880:ptr(struct(0:reg32_t,8:ptr(TOP))))) "StructFrag_221*"
171 union(ptr(struct(0:array(reg8_t,99880),99880:reg32_t)),ptr(struct(0:array(reg8_t,99880),99880:ptr(struct(0:reg32_t,8:ptr(TOP)))))) "Union_19"
172 ptr(struct(4:ptr(reg32_t),8:ptr(struct(0:array(reg8_t,99880),99880:reg32_t)))) "Struct_521*"
173 union(ptr(reg32_t),ptr(struct(0:array(reg8_t,15848),15848:reg32_t))) "Union_20"
174 union(ptr(reg32_t),ptr(int32_t)) "Union_35"
175 ptr(array(reg8_t,48)) "unknown_384*"
176 ptr(struct(0:array(reg8_t,198192),198192:num8_t)) "StructFrag_20*"
177 ptr(struct(186448:reg32_t,186456:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),186460:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),186464:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),186468:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),186476:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))))) "Struct_61*"
178 ptr(struct(0:array(reg8_t,12676),12676:ptr(reg16_t))) "StructFrag_64*"
179 union(ptr(struct(0:ptr(TOP),152:code_t)),ptr(struct(0:ptr(TOP),164:code_t))) "Union_50"
180 ptr(struct(8:ptr(struct(0:array(reg8_t,16),16:num32_t)),36:ptr(TOP),44:reg32_t)) "Struct_137*"
181 ptr(struct(0:array(reg8_t,374144),374144:reg32_t)) "StructFrag_67*"
182 ptr(struct(125600:reg32_t,129048:reg32_t,129096:reg32_t,148732:int32_t,148820:reg32_t,179528:reg64_t,179656:float64_t)) "Struct_900*"
183 array(reg8_t,120) "unknown_960"
184 ptr(struct(0:array(reg8_t,179792),179792:reg32_t)) "StructFrag_80*"
185 ptr(struct(0:reg64_t,8:float64_t,16:float64_t,24:reg64_t,32:float64_t,40:array(reg8_t,88))) "Struct_633*"
186 ptr(struct(0:float64_t,8:float64_t,16:float64_t,24:float64_t,32:float64_t,40:float64_t,48:float64_t,56:float64_t,64:float64_t,72:float64_t,80:float64_t,88:float64_t,96:float64_t,104:float64_t,112:float64_t,120:float64_t)) "Struct_152*"
187 ptr(struct(8:float64_t,16:float64_t,24:float64_t,32:float64_t,40:float64_t,48:float64_t,56:float64_t,64:float64_t,72:float64_t,80:float64_t,88:float64_t,96:float64_t,104:float64_t,112:float64_t,120:float64_t)) "Struct_70*"
188 ptr(struct(0:array(reg8_t,179812),179812:ptr(struct(0:ptr(num8_t),4:num32_t,8:ptr(num8_t),12:num32_t,16:num32_t,20:num32_t,24:num32_t,28:ptr(num8_t))))) "StructFrag_159*"
189 ptr(struct(179536:float64_t,179544:float64_t,179552:float64_t,179560:float64_t,179568:float64_t,179576:float64_t,179584:float64_t,179592:float64_t,179600:float64_t,179608:float64_t,179616:float64_t,179624:float64_t,179632:float64_t,179640:float64_t,179648:float64_t,179656:float64_t)) "Struct_69*"
190 ptr(struct(0:array(reg8_t,179800),179800:ptr(reg32_t))) "StructFrag_150*"
191 ptr(struct(0:array(reg8_t,24),24:reg32_t)) "StructFrag_78*"
192 ptr(struct(0:array(reg8_t,187144),187144:code_t)) "StructFrag_160*"
193 ptr(struct(1628:ptr(TOP),7828:reg32_t)) "Struct_346*"
194 ptr(struct(7828:ptr(TOP),8220:reg32_t)) "Struct_634*"
195 ptr(struct(0:uint32_t,8:uint32_t,12:uint32_t,20:uint32_t,24:ptr(num8_t),28:ptr(num8_t),32:ptr(num8_t),36:reg32_t,40:uint32_t)) "Struct_438*"
196 ptr(struct(186488:code_t,186492:reg32_t,186500:reg32_t,187144:reg32_t)) "Struct_635*"
197 union(ptr(reg32_t),ptr(struct(0:array(reg8_t,12676),12676:ptr(reg16_t))),ptr(reg16_t)) "Union_8"
198 union(ptr(reg32_t),ptr(struct(0:ptr(TOP),168:code_t))) "Union_9"
199 num16_t "short"
200 ptr(struct(0:ptr(TOP),168:code_t)) "Struct_148*"
201 ptr(struct(111536:num32_t,125600:reg32_t,129048:reg32_t,129056:num32_t,129084:num32_t,129088:reg32_t,129248:reg32_t,148556:num32_t,148592:float64_t,148612:num32_t,148616:num32_t,148620:num32_t,148624:num32_t,148628:num32_t,148644:num32_t,148660:num32_t,148664:reg32_t,148728:num32_t,148732:num32_t,148736:num32_t,148820:int32_t,179448:reg32_t,179452:int32_t,179528:num32_t,179532:reg32_t,179560:float64_t,179656:float64_t,179792:reg32_t,187048:reg32_t,187056:reg32_t,187060:reg32_t,187064:float64_t)) "Struct_630*"
202 ptr(struct(0:array(reg8_t,24),24:float64_t)) "StructFrag_79*"
203 ptr(struct(125600:reg32_t,129048:reg32_t,129088:reg32_t,148612:int32_t,148620:reg32_t,148644:int32_t,148660:reg32_t,148728:reg32_t,148732:num32_t,148736:reg32_t,179528:int32_t,179532:reg32_t,179560:float64_t,179656:float64_t)) "Struct_899*"
204 array(reg8_t,88) "unknown_704"
205 ptr(struct(8:float64_t,16:float64_t)) "Struct_177*"
206 union(ptr(struct(0:array(reg8_t,258400),258400:ptr(TOP))),ptr(struct(129188:reg32_t,129192:reg32_t,129196:reg32_t,129200:reg32_t,129212:ptr(TOP),129228:reg32_t))) "Union_18"
207 ptr(struct(8:float64_t,16:float64_t,24:float64_t)) "Struct_182*"
208 array(reg8_t,128) "unknown_1024"
209 ptr(struct(0:array(reg8_t,258400),258400:ptr(TOP))) "StructFrag_82*"
210 ptr(float64_t) "double*"
211 ptr(struct(0:reg32_t,24:ptr(num8_t))) "Struct_347*"
212 ptr(struct(8:num32_t,20:reg32_t,24:ptr(TOP),28:ptr(TOP),32:ptr(TOP))) "Struct_636*"
213 ptr(struct(8:num32_t,20:num32_t,24:ptr(TOP),28:ptr(TOP),32:ptr(TOP))) "Struct_638*"
214 union(ptr(reg32_t),ptr(struct(0:uint32_t,8:uint32_t,12:uint32_t,20:uint32_t,24:ptr(num8_t),28:ptr(num8_t),32:ptr(num8_t),36:reg32_t,40:uint32_t))) "Union_36"
215 array(reg8_t,3) "unknown_24"
216 ptr(struct(0:uint32_t,4:reg32_t,8:uint32_t,12:uint32_t,20:uint32_t,24:reg32_t,28:reg32_t,32:reg32_t)) "Struct_640*"
217 ptr(array(reg8_t,32)) "unknown_256*"
218 ptr(array(reg8_t,16)) "unknown_128*"
219 union(ptr(num32_t),ptr(struct(0:reg64_t,8:reg32_t))) "Union_37"
220 ptr(reg64_t) "qword*"
221 ptr(array(reg8_t,20)) "unknown_160*"
222 ptr(struct(0:reg32_t,4:ptr(TOP),12:reg32_t)) "Struct_595*"
223 ptr(struct(0:num32_t,4:num32_t,8:ptr(TOP))) "Struct_680*"
224 ptr(struct(0:uint32_t,4:uint32_t,12:reg32_t,16:int32_t,20:ptr(TOP))) "Struct_711*"
225 ptr(struct(0:num32_t,4:int32_t,8:ptr(TOP))) "Struct_683*"
226 ptr(struct(128944:uint32_t,128948:uint32_t,128956:reg32_t,128960:int32_t,128964:ptr(TOP))) "Struct_713*"
227 ptr(struct(0:array(reg8_t,186476),186476:ptr(TOP))) "StructFrag_148*"
228 ptr(struct(0:array(reg8_t,301956),301956:reg32_t)) "StructFrag_147*"
229 ptr(struct(0:array(reg8_t,336),336:num32_t)) "StructFrag_315*"
230 ptr(array(reg8_t,1056)) "unknown_8448*"
231 ptr(array(reg8_t,56)) "unknown_448*"
232 ptr(struct(0:reg32_t,4:num32_t,8:ptr(TOP))) "Struct_320*"
233 ptr(struct(0:array(reg8_t,256),256:num8_t)) "StructFrag_381*"
234 ptr(struct(0:array(reg8_t,192),192:num8_t)) "StructFrag_380*"
235 union(ptr(reg32_t),ptr(struct(0:array(reg8_t,16),16:num8_t)),ptr(struct(12680:ptr(reg32_t),12888:ptr(struct(0:array(reg8_t,32),32:num8_t)),23152:code_t,23156:reg32_t,23160:reg32_t,23164:reg32_t,26628:code_t,26632:reg32_t,26636:reg32_t,26640:reg32_t,26644:code_t,26648:reg32_t,26652:reg32_t,26656:reg32_t)),ptr(struct(0:reg32_t,12680:ptr(num32_t),12792:reg32_t,12888:ptr(TOP),12896:reg32_t,23152:code_t,23156:code_t,23160:code_t,23164:code_t,23172:reg32_t,23176:reg32_t,26628:code_t,26632:code_t,26636:code_t,26640:code_t,26644:code_t,26648:code_t,26652:code_t,26656:code_t))) "Union_39"
236 ptr(struct(5156:ptr(num32_t),5389:num8_t,5390:num8_t,5391:num8_t,5392:num8_t)) "Struct_696*"
237 ptr(struct(12680:ptr(reg32_t),12888:ptr(struct(0:array(reg8_t,32),32:num8_t)),23152:code_t,23156:reg32_t,23160:reg32_t,23164:reg32_t,26628:code_t,26632:reg32_t,26636:reg32_t,26640:reg32_t,26644:code_t,26648:reg32_t,26652:reg32_t,26656:reg32_t)) "Struct_307*"
238 ptr(struct(0:reg32_t,12680:ptr(num32_t),12792:reg32_t,12888:ptr(TOP),12896:reg32_t,23152:code_t,23156:code_t,23160:code_t,23164:code_t,23172:reg32_t,23176:reg32_t,26628:code_t,26632:code_t,26636:code_t,26640:code_t,26644:code_t,26648:code_t,26652:code_t,26656:code_t)) "Struct_694*"
239 ptr(struct(5156:ptr(struct(0:array(reg8_t,32),32:num8_t)),5368:num8_t,5379:num8_t)) "Struct_689*"
240 ptr(struct(12680:ptr(num32_t),12788:reg32_t,12792:reg32_t,12840:reg32_t,12888:reg32_t,12896:reg32_t,12900:reg32_t,23152:code_t,23156:reg32_t,23160:reg32_t,23164:reg32_t,23168:int32_t,23172:reg32_t,23176:reg32_t,26628:code_t,26632:reg32_t,26636:reg32_t,26640:reg32_t,26644:code_t,26648:reg32_t,26652:reg32_t,26656:reg32_t)) "Struct_690*"
241 ptr(struct(12808:num32_t,12812:num32_t,12876:ptr(num8_t),12880:reg32_t,12888:ptr(struct(0:reg64_t,8:reg32_t)))) "Struct_697*"
242 ptr(struct(0:array(reg8_t,5412),5412:ptr(num8_t))) "StructFrag_138*"
243 union(ptr(num8_t),ptr(reg32_t),ptr(struct(0:array(reg8_t,122288),122288:reg32_t)),ptr(struct(0:array(reg8_t,122268),122268:reg32_t)),ptr(struct(0:array(reg8_t,179992),179992:reg32_t)),ptr(code_t),ptr(struct(51816:ptr(TOP),51832:reg16_t,56916:reg32_t,57108:num8_t))) "Union_41"
244 ptr(struct(2664:ptr(TOP),2668:ptr(TOP),2672:ptr(TOP),2676:ptr(TOP),2680:reg16_t,7764:reg32_t,7956:num8_t)) "Struct_702*"
245 ptr(struct(51816:ptr(TOP),51832:reg16_t,56916:reg32_t,57108:num8_t)) "Struct_701*"
246 ptr(struct(2664:ptr(TOP),2680:reg16_t,7764:reg32_t,7956:num8_t)) "Struct_126*"
247 union(ptr(num8_t),ptr(struct(51816:ptr(TOP),51832:reg16_t,56916:reg32_t,57108:num8_t))) "Union_40"
248 union(ptr(reg32_t),ptr(struct(0:array(reg8_t,12676),12676:ptr(reg16_t))),ptr(reg16_t),ptr(struct(0:array(reg8_t,15848),15848:reg32_t))) "Union_42"
249 union(ptr(struct(0:array(reg8_t,12676),12676:ptr(reg16_t))),ptr(struct(6340:reg32_t,6348:reg32_t,8100:ptr(TOP),8116:ptr(TOP)))) "Union_28"
250 ptr(struct(0:ptr(TOP),152:code_t)) "Struct_132*"
251 ptr(struct(0:array(reg8_t,14642),14642:reg16_t)) "StructFrag_122*"
252 union(ptr(struct(0:array(reg8_t,15848),15848:reg32_t)),ptr(struct(0:array(reg8_t,14642),14642:reg16_t))) "Union_21"
253 ptr(struct(0:array(reg8_t,7456),7456:reg16_t)) "StructFrag_113*"
254 ptr(struct(0:array(reg8_t,15848),15848:reg32_t)) "StructFrag_129*"
255 ptr(struct(0:reg32_t,8:ptr(TOP))) "Struct_217*"
256 ptr(struct(0:array(reg8_t,25276),25276:reg32_t)) "StructFrag_136*"
257 ptr(struct(0:uint32_t,8:reg32_t,12:uint32_t)) "Struct_531*"
258 union(ptr(code_t),ptr(struct(0:reg64_t,8:code_t))) "Union_38"
259 ptr(struct(0:array(reg8_t,56),56:reg32_t)) "StructFrag_35*"
260 ptr(struct(26660:code_t,26668:code_t)) "Struct_669*"
261 ptr(struct(187072:reg32_t,187076:ptr(array(reg8_t,148)),187080:ptr(array(reg8_t,32)),187084:ptr(array(reg8_t,32)),187088:ptr(array(reg8_t,33)),187092:ptr(array(reg8_t,32)),187096:ptr(array(reg8_t,80)),187100:ptr(array(reg8_t,80)),187104:ptr(array(reg8_t,112)),187108:ptr(array(reg8_t,128)),187112:ptr(array(reg8_t,192)),187116:ptr(array(reg8_t,112)),187120:ptr(array(reg8_t,112)),187124:ptr(array(reg8_t,112)),187128:ptr(array(reg8_t,160)),187132:ptr(array(reg8_t,160)),187136:ptr(array(reg8_t,48)),187140:ptr(array(reg8_t,20)),187144:ptr(array(reg8_t,160)),187148:ptr(array(reg8_t,37)),187152:ptr(array(reg8_t,510)),187156:ptr(array(reg8_t,192)),187160:ptr(array(reg8_t,138)),187164:ptr(array(reg8_t,817)),187168:ptr(array(reg8_t,441)),187172:ptr(array(reg8_t,618)),187176:ptr(array(reg8_t,322)),187180:ptr(array(reg8_t,156)),187184:ptr(array(reg8_t,1087)),187188:ptr(array(reg8_t,591)),187192:ptr(array(reg8_t,827)),187196:ptr(array(reg8_t,435)),187200:ptr(array(reg8_t,213)),187204:ptr(array(reg8_t,673)),187208:ptr(array(reg8_t,48)),187212:ptr(array(reg8_t,1184)),187216:ptr(array(reg8_t,573)),187220:ptr(array(reg8_t,688)),187224:ptr(array(reg8_t,110)),187228:ptr(array(reg8_t,48)),187232:ptr(array(reg8_t,32)),187236:ptr(array(reg8_t,48)),187240:ptr(array(reg8_t,32)),187244:ptr(array(reg8_t,726)),187248:ptr(array(reg8_t,144)),187252:ptr(array(reg8_t,128)),187256:ptr(array(reg8_t,222)),187260:ptr(array(reg8_t,222)))) "Struct_65*"
262 union(ptr(num32_t),ptr(reg32_t),ptr(struct(0:uint32_t,4:uint32_t,12:reg32_t,16:int32_t,20:ptr(TOP)))) "Union_43"
263 ptr(array(reg8_t,4608)) "unknown_36864*"
264 ptr(array(reg8_t,40)) "unknown_320*"
265 ptr(array(reg8_t,4000)) "unknown_32000*"
266 ptr(array(reg8_t,64)) "unknown_512*"
267 ptr(struct(26552:ptr(array(reg8_t,96)),26556:ptr(array(reg8_t,1008)),26560:ptr(array(reg8_t,96)),26564:ptr(array(reg8_t,50)),26568:ptr(array(reg8_t,544)),26572:ptr(array(reg8_t,343)),26576:ptr(array(reg8_t,160)),26580:ptr(array(reg8_t,80)),26584:ptr(array(reg8_t,95)),26588:ptr(array(reg8_t,116)),26592:ptr(array(reg8_t,168)),26596:ptr(array(reg8_t,352)),26600:ptr(array(reg8_t,240)),26604:ptr(array(reg8_t,240)),26608:ptr(array(reg8_t,160)),26612:ptr(array(reg8_t,169)),26616:ptr(array(reg8_t,238)),26620:ptr(array(reg8_t,125)),26624:ptr(array(reg8_t,93)),26628:ptr(array(reg8_t,77)),26632:ptr(array(reg8_t,117)),26636:ptr(array(reg8_t,77)),26640:ptr(array(reg8_t,120)),26644:ptr(array(reg8_t,48)),26648:ptr(array(reg8_t,96)),26652:ptr(array(reg8_t,48)),26656:ptr(array(reg8_t,96)),26660:ptr(array(reg8_t,130)),26664:ptr(array(reg8_t,80)),26668:ptr(array(reg8_t,65)),26672:ptr(array(reg8_t,24)))) "Struct_66*"
268 ptr(struct(0:num32_t,4:num32_t,8:uint32_t,12:num32_t,16:num32_t,20:uint32_t,24:ptr(num8_t),28:ptr(num8_t),32:ptr(num8_t),40:uint32_t)) "Struct_760*"
269 ptr(struct(0:num32_t,4:num32_t,8:uint32_t,24:ptr(num8_t),40:uint32_t)) "Struct_761*"
270 ptr(struct(8:reg32_t,24:ptr(TOP),28:ptr(TOP),32:ptr(TOP))) "Struct_350*"
271 ptr(struct(0:uint32_t,8:reg32_t,12:uint32_t,24:ptr(TOP),28:ptr(TOP),32:ptr(TOP))) "Struct_348*"
272 ptr(struct(8:uint32_t,24:ptr(num8_t),40:uint32_t)) "Struct_353*"
273 ptr(struct(0:uint32_t,8:reg32_t,24:ptr(TOP))) "Struct_352*"
274 ptr(struct(0:reg16_t,2:num8_t)) "StructFrag_168*"
275 ptr(struct(0:ptr(reg32_t),4:ptr(reg32_t))) "Struct_681*"
276 array(reg8_t,6) "unknown_48"
277 array(reg8_t,72) "unknown_576"
278 array(reg8_t,48) "unknown_384"
279 ptr(struct(0:reg32_t,4:num8_t)) "StructFrag_186*"
280 ptr(struct(0:array(reg8_t,8192),8192:num32_t)) "StructFrag_336*"
281 ptr(array(reg8_t,21)) "unknown_168*"
282 union(ptr(num8_t),ptr(struct(0:array(reg8_t,16),16:num32_t))) "Union_56"
283 ptr(struct(0:code_t,32:code_t)) "Struct_765*"
284 ptr(struct(7948:reg32_t,49892:code_t,49916:code_t)) "Struct_766*"
285 ptr(struct(7948:reg32_t,49900:code_t,49920:code_t)) "Struct_768*"
286 ptr(struct(0:array(reg8_t,7172),7172:ptr(reg16_t))) "StructFrag_61*"
287 union(ptr(struct(0:array(reg8_t,16),16:code_t)),ptr(struct(0:array(reg8_t,60),60:code_t))) "Union_52"
288 ptr(struct(0:array(reg8_t,20),20:code_t)) "StructFrag_62*"
289 ptr(struct(0:array(reg8_t,9096),9096:ptr(TOP))) "StructFrag_96*"
290 union(ptr(struct(0:array(reg8_t,7748),7748:num8_t)),ptr(struct(0:array(reg8_t,14600),14600:ptr(TOP)))) "Union_54"
291 ptr(struct(0:array(reg8_t,56),56:code_t)) "StructFrag_7*"
292 ptr(struct(0:array(reg8_t,16),16:code_t)) "StructFrag_1*"
293 ptr(struct(0:ptr(TOP),172:code_t)) "Struct_231*"
294 ptr(struct(36:ptr(TOP),40:reg32_t,44:num32_t)) "Struct_774*"
295 ptr(struct(3588:ptr(TOP),3592:reg32_t,3596:num32_t)) "Struct_776*"
296 ptr(struct(0:array(reg8_t,16),16:num32_t)) "StructFrag_65*"
297 ptr(struct(36:ptr(TOP),44:reg32_t)) "Struct_134*"
298 ptr(struct(12:code_t,16:code_t)) "Struct_772*"
299 union(ptr(struct(0:array(reg8_t,12),12:code_t)),ptr(struct(12:code_t,16:code_t))) "Union_58"
300 union(ptr(num8_t),ptr(struct(0:array(reg8_t,7456),7456:reg16_t)),ptr(struct(3588:reg32_t,3596:reg32_t,5184:reg16_t,5348:ptr(TOP),5364:ptr(TOP))),ptr(struct(0:array(reg8_t,7400),7400:reg16_t))) "Union_59"
301 union(ptr(reg32_t),ptr(struct(0:array(reg8_t,122288),122288:reg32_t)),ptr(struct(0:array(reg8_t,122268),122268:reg32_t)),ptr(struct(0:array(reg8_t,179992),179992:reg32_t)),ptr(struct(0:ptr(TOP),168:code_t))) "Union_26"
302 ptr(struct(128992:float64_t,129012:num32_t,179828:num32_t,179832:num32_t,179836:num32_t)) "Struct_909*"
303 ptr(struct(0:array(reg8_t,12616),12616:reg32_t)) "StructFrag_368*"
304 ptr(struct(0:array(reg8_t,6),6:reg16_t)) "StructFrag_172*"
305 ptr(struct(0:array(reg8_t,14536),14536:ptr(reg16_t))) "StructFrag_174*"
306 ptr(struct(0:array(reg8_t,12960),12960:reg16_t)) "StructFrag_125*"
307 union(ptr(struct(8104:ptr(TOP),8108:ptr(TOP),8116:ptr(TOP))),ptr(struct(0:array(reg8_t,15848),15848:reg32_t)),ptr(ptr(TOP)),ptr(struct(0:array(reg8_t,14642),14642:reg16_t)),ptr(struct(8100:ptr(TOP),8112:ptr(TOP),8116:ptr(TOP))),ptr(struct(7948:reg32_t,8236:num32_t,8240:num32_t,49900:code_t))) "Union_61"
308 ptr(struct(8100:ptr(TOP),8112:ptr(TOP),8116:ptr(TOP))) "Struct_228*"
309 ptr(struct(7948:reg32_t,8236:num32_t,8240:num32_t,49900:code_t)) "Struct_767*"
310 ptr(struct(3560:ptr(num8_t),3588:ptr(TOP),3604:num32_t)) "Struct_735*"
311 ptr(struct(8:ptr(num8_t),36:ptr(TOP),52:num32_t)) "Struct_737*"
312 ptr(struct(6312:ptr(num8_t),6340:ptr(TOP),6356:num32_t)) "Struct_739*"
313 ptr(struct(2708:reg32_t,2724:reg32_t,7864:reg32_t,7880:reg32_t,7920:num32_t,7924:num32_t,7948:reg32_t,8100:ptr(TOP),8112:ptr(TOP),8116:ptr(TOP),8236:num32_t,8240:num32_t,12676:ptr(reg16_t),49904:reg32_t,49912:code_t,4294967236:ptr(reg16_t))) "Struct_730*"
314 union(ptr(struct(0:array(reg8_t,12676),12676:ptr(reg16_t))),ptr(struct(2708:reg32_t,2724:reg32_t,7864:reg32_t,7880:reg32_t,7920:num32_t,7924:num32_t,7948:reg32_t,8100:ptr(TOP),8112:ptr(TOP),8116:ptr(TOP),8236:num32_t,8240:num32_t,12676:ptr(reg16_t),49904:reg32_t,49912:code_t,4294967236:ptr(reg16_t)))) "Union_44"
315 ptr(ptr(struct(0:array(reg8_t,12676),12676:ptr(reg16_t)))) "StructFrag_64**"
316 ptr(struct(8104:ptr(TOP),8108:ptr(TOP),8116:ptr(TOP))) "Struct_212*"
317 ptr(struct(0:array(reg8_t,14824),14824:reg16_t)) "StructFrag_120*"
318 ptr(struct(0:array(reg8_t,172),172:code_t)) "StructFrag_117*"
319 ptr(struct(0:array(reg8_t,76),76:code_t)) "StructFrag_103*"
320 ptr(struct(0:array(reg8_t,7748),7748:num8_t)) "StructFrag_98*"
321 ptr(struct(0:array(reg8_t,374228),374228:code_t)) "StructFrag_104*"
322 union(ptr(reg16_t),ptr(num16_t)) "Union_63"
323 union(ptr(reg32_t),ptr(struct(0:array(reg8_t,12676),12676:ptr(reg16_t))),ptr(reg16_t),ptr(struct(0:array(reg8_t,15848),15848:reg32_t)),ptr(ptr(TOP)),ptr(struct(0:array(reg8_t,14642),14642:reg16_t))) "Union_62"
324 ptr(struct(4:reg32_t,8:ptr(reg32_t),24:ptr(TOP),32:reg32_t,56:reg16_t)) "Struct_829*"
325 ptr(struct(1600:reg32_t,1604:ptr(reg16_t))) "Struct_732*"
326 ptr(struct(0:reg32_t,4:reg16_t)) "StructFrag_178*"
327 ptr(struct(0:reg32_t,4:ptr(reg16_t))) "Struct_733*"
328 ptr(struct(0:code_t,4:code_t,16:code_t)) "Struct_734*"
329 union(ptr(TOP),int32_t) "Union_23"
330 ptr(struct(0:array(reg8_t,7400),7400:reg16_t)) "StructFrag_73*"
331 ptr(struct(4:ptr(reg16_t),28:ptr(TOP))) "Struct_562*"
332 ptr(struct(44:code_t,76:code_t)) "Struct_563*"
333 union(ptr(num8_t),ptr(reg32_t),ptr(reg16_t)) "Union_64"
334 ptr(struct(0:ptr(reg16_t),28:ptr(TOP))) "Struct_356*"
335 ptr(struct(0:reg64_t,8:ptr(num8_t))) "StructFrag_175*"
336 ptr(struct(0:array(reg8_t,1024),1024:reg16_t)) "StructFrag_176*"
337 union(ptr(struct(0:array(reg8_t,7748),7748:num8_t)),ptr(struct(0:array(reg8_t,14824),14824:reg16_t)),ptr(struct(0:array(reg8_t,14600),14600:ptr(TOP)))) "Union_65"
338 union(ptr(struct(0:array(reg8_t,12676),12676:ptr(reg16_t))),ptr(struct(0:array(reg8_t,14600),14600:ptr(TOP)))) "Union_48"
339 ptr(struct(4536:ptr(TOP),4544:reg32_t,4568:num8_t,4570:reg16_t)) "Struct_264*"
340 ptr(struct(7288:ptr(TOP),7296:reg32_t,7320:num8_t,7322:reg16_t)) "Struct_854*"
341 union(ptr(num32_t),ptr(struct(0:array(reg8_t,12608),12608:ptr(TOP)))) "Union_66"
342 ptr(struct(0:array(reg8_t,12608),12608:ptr(TOP))) "StructFrag_181*"
343 ptr(ptr(num32_t)) "int[][]"
344 ptr(struct(0:array(reg8_t,152),152:code_t)) "StructFrag_60*"
345 array(reg8_t,60) "unknown_480"
346 array(reg8_t,1378) "unknown_11024"
347 array(reg8_t,1376) "unknown_11008"
145 ptr(struct(0:reg32_t,4:ptr(TOP))) "StructFrag_185*"
348 ptr(struct(7924:reg32_t,8100:ptr(TOP),8104:ptr(TOP),8108:ptr(TOP),8116:ptr(TOP),8236:reg32_t)) "Struct_752*"
349 ptr(struct(0:array(reg8_t,156),156:code_t)) "StructFrag_183*"
350 ptr(struct(6304:ptr(TOP),6352:reg32_t)) "Struct_747*"
351 ptr(struct(152:code_t,156:code_t)) "Struct_744*"
352 ptr(struct(0:array(reg8_t,12656),12656:reg32_t)) "StructFrag_182*"
353 union(ptr(struct(0:array(reg8_t,152),152:code_t)),ptr(struct(152:code_t,156:code_t))) "Union_46"
354 ptr(struct(7924:reg32_t,8100:ptr(TOP),8116:ptr(TOP),8236:reg32_t)) "Struct_757*"
355 union(ptr(struct(0:array(reg8_t,7172),7172:ptr(reg16_t))),ptr(struct(0:array(reg8_t,9096),9096:ptr(TOP)))) "Union_47"
356 ptr(struct(0:array(reg8_t,14600),14600:ptr(TOP))) "StructFrag_363*"
357 union(ptr(struct(0:array(reg8_t,16),16:code_t)),ptr(struct(0:array(reg8_t,56),56:code_t))) "Union_49"
358 ptr(struct(0:array(reg8_t,12904),12904:reg16_t)) "StructFrag_373*"
359 ptr(struct(0:array(reg8_t,9320),9320:reg16_t)) "StructFrag_116*"
360 union(ptr(reg32_t),ptr(struct(0:uint32_t,8:uint32_t,12:uint32_t,20:uint32_t,24:ptr(num8_t),28:ptr(num8_t),32:ptr(num8_t),36:reg32_t,40:uint32_t)),ptr(struct(0:uint32_t,8:reg32_t,12:uint32_t))) "Union_68"
361 array(reg8_t,24) "unknown_192"
362 array(reg8_t,9) "unknown_72"
363 array(reg8_t,15) "unknown_120"
364 array(reg8_t,18) "unknown_144"
365 array(reg8_t,21) "unknown_168"
366 ptr(struct(8:ptr(reg32_t),24:ptr(TOP),28:reg32_t,32:reg32_t,56:reg16_t,58:reg16_t)) "Struct_837*"
367 ptr(struct(5432:code_t,5444:ptr(struct(0:array(reg8_t,24),24:code_t)))) "Struct_838*"
368 ptr(struct(24:ptr(TOP),32:reg32_t,56:num8_t)) "Struct_143*"
369 ptr(struct(5428:code_t,5444:ptr(struct(0:array(reg8_t,28),28:code_t)))) "Struct_839*"
370 ptr(struct(4596:ptr(TOP),4604:reg32_t,4628:reg16_t)) "Struct_859*"
371 ptr(array(reg8_t,1234108)) "unknown_9872864*"
372 ptr(struct(0:reg32_t,28:ptr(TOP),32:reg32_t,36:reg32_t)) "Struct_894*"
373 ptr(struct(0:reg64_t,8:reg32_t)) "StructFrag_4*"
374 ptr(struct(4:ptr(TOP),8:ptr(TOP),12:ptr(TOP),20:ptr(TOP))) "Struct_868*"
375 ptr(struct(0:ptr(TOP),20:ptr(TOP),48:reg32_t)) "Struct_359*"
376 ptr(struct(4:ptr(TOP),16:ptr(TOP),24:reg16_t)) "Struct_360*"
377 ptr(struct(7948:reg32_t,49916:code_t)) "Struct_130*"
378 ptr(struct(7948:reg32_t,49920:code_t)) "Struct_226*"
379 union(ptr(num8_t),ptr(struct(0:array(reg8_t,3),3:num8_t))) "Union_69"
380 ptr(struct(0:reg8_t,1:num8_t)) "StructFrag_179*"
381 union(ptr(num8_t),ptr(struct(0:array(reg8_t,6),6:num8_t))) "Union_70"
382 union(ptr(num8_t),ptr(struct(0:reg16_t,2:num8_t))) "Union_71"
383 ptr(struct(0:array(reg8_t,3),3:num8_t)) "StructFrag_155*"
384 ptr(struct(0:ptr(struct(0:array(reg8_t,3),3:num8_t)),4:ptr(struct(0:array(reg8_t,3),3:num8_t)),8:ptr(struct(0:array(reg8_t,3),3:num8_t)),12:ptr(struct(0:array(reg8_t,3),3:num8_t)))) "Struct_871*"
385 ptr(struct(0:ptr(struct(0:array(reg8_t,6),6:num8_t)),4:ptr(struct(0:array(reg8_t,6),6:num8_t)),8:ptr(struct(0:array(reg8_t,6),6:num8_t)),12:ptr(struct(0:array(reg8_t,6),6:num8_t)))) "Struct_872*"
386 ptr(struct(0:ptr(struct(0:reg16_t,2:num8_t)),4:ptr(struct(0:reg16_t,2:num8_t)),8:ptr(struct(0:reg16_t,2:num8_t)),12:ptr(struct(0:reg16_t,2:num8_t)))) "Struct_873*"
387 ptr(struct(4520:reg32_t,4524:reg32_t,4548:ptr(reg32_t),4552:reg32_t,4556:reg32_t)) "Struct_875*"
388 ptr(struct(0:ptr(TOP),1:num8_t,4:ptr(TOP),8:ptr(TOP),12:ptr(TOP),4294967294:num8_t,4294967295:num8_t)) "Struct_923*"
389 ptr(struct(5112:reg32_t,5128:ptr(num32_t),5172:reg32_t)) "Struct_364*"
390 ptr(struct(5124:reg32_t,5132:ptr(TOP),5136:ptr(num8_t),5176:reg32_t)) "Struct_365*"
391 ptr(struct(3560:reg32_t,3564:reg32_t,3588:ptr(reg32_t),3592:reg32_t,3596:reg32_t)) "Struct_877*"
392 ptr(struct(16:code_t,20:code_t)) "Struct_878*"
393 ptr(struct(0:code_t,4:code_t)) "Struct_889*"
394 ptr(struct(0:reg32_t,4:reg32_t,16:code_t)) "Struct_880*"
395 ptr(struct(0:reg32_t,4:reg32_t,56:code_t)) "Struct_890*"
396 union(ptr(struct(0:array(reg8_t,9096),9096:ptr(TOP))),ptr(struct(0:array(reg8_t,9320),9320:reg16_t))) "Union_73"
397 union(ptr(reg32_t),ptr(struct(0:array(reg8_t,7172),7172:ptr(reg16_t)))) "Union_72"
398 ptr(array(reg8_t,3)) "unknown_24*"
0 code_t "PTOP_LEVEL_EXCEPTION_FILTER"
399 ptr(struct(0:reg32_t,8:reg32_t,12:reg32_t,16:reg32_t,20:reg32_t,44:reg32_t,68:ptr(TOP))) "Struct_1*"
400 ptr(struct(0:num32_t,8:ptr(TOP),12:uint32_t,16:reg32_t,20:reg32_t)) "Struct_370*"
401 union(ptr(reg32_t),ptr(struct(0:num32_t,8:ptr(TOP),12:uint32_t,16:reg32_t,20:reg32_t))) "Union_3"
402 ptr(struct(0:array(reg8_t,20),20:ptr(struct(0:reg32_t,4:code_t)))) "StructFrag_191*"
403 ptr(struct(4:ptr(struct(0:reg32_t,12:code_t,16:code_t)),12:reg32_t)) "Struct_20*"
404 ptr(struct(0:array(reg8_t,52),52:code_t)) "StructFrag_6*"
405 ptr(struct(72:ptr(TOP),76:uint32_t)) "Struct_386*"
406 union(ptr(struct(0:array(reg8_t,12),12:ptr(num8_t))),ptr(struct(368:num32_t,372:num32_t,376:num32_t,384:float64_t,392:num32_t,396:num32_t,400:num32_t,404:num32_t,416:num32_t,424:num32_t,432:num32_t,436:num32_t,452:num32_t,456:num32_t,460:num32_t,464:num32_t,468:num32_t,476:num32_t,480:num32_t,484:num32_t,488:num32_t,492:num32_t,512:num32_t,516:num32_t,520:num32_t,524:num32_t,528:num32_t,532:num32_t,536:num32_t,540:num32_t,544:num32_t,548:num32_t))) "Union_11"
407 ptr(struct(57360:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),99044:ptr(array(reg8_t,1184)),99048:ptr(array(reg8_t,573)),99052:ptr(array(reg8_t,1184)),99056:ptr(array(reg8_t,573)),99060:ptr(array(reg8_t,1184)),99064:ptr(array(reg8_t,688)),99068:ptr(array(reg8_t,144)),99072:ptr(array(reg8_t,144)),111892:reg32_t,111900:reg32_t,128980:reg32_t,128984:reg32_t,128992:float64_t,129000:reg32_t,129012:reg32_t,129024:reg32_t,129032:reg32_t,129056:reg32_t,129060:reg32_t,129064:reg32_t,129088:reg32_t,129104:reg32_t,129120:reg32_t,129128:reg32_t,129132:reg32_t,131336:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),131348:reg32_t,131880:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),148552:reg32_t,148556:reg32_t,148568:float64_t,148576:float64_t,148584:float64_t,148592:float64_t,148656:reg32_t,148660:reg32_t,148752:float64_t,148776:reg32_t,148788:reg32_t,148860:reg32_t,148864:reg32_t,148868:reg32_t,148872:reg32_t,179464:float64_t,179472:float64_t,179480:float64_t,179488:float64_t,179504:float64_t,179512:float64_t,179520:reg32_t,179536:float64_t,179544:float64_t,179552:float64_t,179560:float64_t,179568:float64_t,179576:float64_t,179584:float64_t,179592:float64_t,179600:float64_t,179608:float64_t,179616:float64_t,179624:float64_t,179632:float64_t,179640:float64_t,179648:float64_t,179656:float64_t,179792:num32_t,179800:num32_t,179808:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),179836:reg32_t,179844:reg32_t,182188:reg32_t,186384:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),186396:reg32_t,186400:reg32_t,186404:reg32_t,186408:reg32_t,186412:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),186420:reg32_t,186424:num32_t,186436:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),186444:reg32_t,186452:reg32_t,186456:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),186460:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),186464:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),186468:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),186472:reg32_t,186476:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),186480:ptr(array(reg8_t,422)),186484:ptr(array(reg8_t,220)),186488:ptr(array(reg8_t,222)),186492:reg32_t,186496:ptr(array(reg8_t,817)),186500:ptr(array(reg8_t,1087)),186504:ptr(array(reg8_t,80)),186508:ptr(array(reg8_t,100)),187076:ptr(array(reg8_t,148)),187080:ptr(TOP),187084:ptr(array(reg8_t,29)),187088:ptr(array(reg8_t,26)),187092:reg32_t,187112:ptr(array(reg8_t,80)),187128:ptr(array(reg8_t,112)),187132:ptr(array(reg8_t,100)),187140:ptr(array(reg8_t,20)),187144:ptr(array(reg8_t,160)),187148:ptr(array(reg8_t,34)),187152:ptr(array(reg8_t,510)),187156:ptr(array(reg8_t,192)),187160:ptr(array(reg8_t,138)),187164:ptr(array(reg8_t,817)),187168:ptr(array(reg8_t,441)),187172:ptr(array(reg8_t,618)),187176:ptr(array(reg8_t,322)),187180:ptr(array(reg8_t,156)),187184:ptr(array(reg8_t,1087)),187188:ptr(array(reg8_t,591)),187192:ptr(array(reg8_t,827)),187196:ptr(array(reg8_t,435)),187200:ptr(array(reg8_t,213)),187204:ptr(array(reg8_t,1184)),187208:ptr(array(reg8_t,573)),187212:ptr(array(reg8_t,1184)),187216:ptr(array(reg8_t,573)),187220:ptr(array(reg8_t,688)),187224:ptr(array(reg8_t,110)),187236:ptr(array(reg8_t,33)),187240:ptr(array(reg8_t,32)),187244:ptr(array(reg8_t,726)),187248:ptr(array(reg8_t,144)),187252:ptr(array(reg8_t,144)),187256:ptr(array(reg8_t,220)),187260:ptr(array(reg8_t,222)),4294967292:ptr(TOP))) "Struct_459*"
408 ptr(struct(0:array(reg8_t,16),16:num8_t)) "StructFrag_18*"
409 ptr(struct(0:ptr(TOP),4:reg32_t)) "Struct_97*"
410 ptr(array(reg8_t,422)) "unknown_3376*"
411 ptr(struct(0:uint32_t,8:uint32_t,12:uint32_t,20:uint32_t,24:reg32_t)) "Struct_420*"
412 ptr(array(reg8_t,817)) "unknown_6536*"
413 ptr(array(reg8_t,222)) "unknown_1776*"
414 union(ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),ptr(struct(129296:reg32_t,129320:ptr(TOP))),ptr(struct(179536:float64_t,179544:float64_t,179552:float64_t,179560:float64_t,179568:float64_t,179576:float64_t,179584:float64_t,179592:float64_t,179600:float64_t,179608:float64_t,179616:float64_t,179624:float64_t,179632:float64_t,179640:float64_t,179648:float64_t,179656:float64_t)),ptr(struct(0:array(reg8_t,198192),198192:num8_t)),ptr(struct(57360:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),99044:ptr(array(reg8_t,1184)),99048:ptr(array(reg8_t,573)),99052:ptr(array(reg8_t,1184)),99056:ptr(array(reg8_t,573)),99060:ptr(array(reg8_t,1184)),99064:ptr(array(reg8_t,688)),99068:ptr(array(reg8_t,144)),99072:ptr(array(reg8_t,144)),111892:reg32_t,111900:reg32_t,128980:reg32_t,128984:reg32_t,128992:float64_t,129000:reg32_t,129012:reg32_t,129024:reg32_t,129032:reg32_t,129056:reg32_t,129060:reg32_t,129064:reg32_t,129088:reg32_t,129104:reg32_t,129120:reg32_t,129128:reg32_t,129132:reg32_t,131336:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),131348:reg32_t,131880:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),148552:reg32_t,148556:reg32_t,148568:float64_t,148576:float64_t,148584:float64_t,148592:float64_t,148656:reg32_t,148660:reg32_t,148752:float64_t,148776:reg32_t,148788:reg32_t,148860:reg32_t,148864:reg32_t,148868:reg32_t,148872:reg32_t,179464:float64_t,179472:float64_t,179480:float64_t,179488:float64_t,179504:float64_t,179512:float64_t,179520:reg32_t,179536:float64_t,179544:float64_t,179552:float64_t,179560:float64_t,179568:float64_t,179576:float64_t,179584:float64_t,179592:float64_t,179600:float64_t,179608:float64_t,179616:float64_t,179624:float64_t,179632:float64_t,179640:float64_t,179648:float64_t,179656:float64_t,179792:num32_t,179800:num32_t,179808:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),179836:reg32_t,179844:reg32_t,182188:reg32_t,186384:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),186396:reg32_t,186400:reg32_t,186404:reg32_t,186408:reg32_t,186412:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),186420:reg32_t,186424:num32_t,186436:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),186444:reg32_t,186452:reg32_t,186456:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),186460:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),186464:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),186468:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),186472:reg32_t,186476:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),186480:ptr(array(reg8_t,422)),186484:ptr(array(reg8_t,220)),186488:ptr(array(reg8_t,222)),186492:reg32_t,186496:ptr(array(reg8_t,817)),186500:ptr(array(reg8_t,1087)),186504:ptr(array(reg8_t,80)),186508:ptr(array(reg8_t,100)),187076:ptr(array(reg8_t,148)),187080:ptr(TOP),187084:ptr(array(reg8_t,29)),187088:ptr(array(reg8_t,26)),187092:reg32_t,187112:ptr(array(reg8_t,80)),187128:ptr(array(reg8_t,112)),187132:ptr(array(reg8_t,100)),187140:ptr(array(reg8_t,20)),187144:ptr(array(reg8_t,160)),187148:ptr(array(reg8_t,34)),187152:ptr(array(reg8_t,510)),187156:ptr(array(reg8_t,192)),187160:ptr(array(reg8_t,138)),187164:ptr(array(reg8_t,817)),187168:ptr(array(reg8_t,441)),187172:ptr(array(reg8_t,618)),187176:ptr(array(reg8_t,322)),187180:ptr(array(reg8_t,156)),187184:ptr(array(reg8_t,1087)),187188:ptr(array(reg8_t,591)),187192:ptr(array(reg8_t,827)),187196:ptr(array(reg8_t,435)),187200:ptr(array(reg8_t,213)),187204:ptr(array(reg8_t,1184)),187208:ptr(array(reg8_t,573)),187212:ptr(array(reg8_t,1184)),187216:ptr(array(reg8_t,573)),187220:ptr(array(reg8_t,688)),187224:ptr(array(reg8_t,110)),187236:ptr(array(reg8_t,33)),187240:ptr(array(reg8_t,32)),187244:ptr(array(reg8_t,726)),187248:ptr(array(reg8_t,144)),187252:ptr(array(reg8_t,144)),187256:ptr(array(reg8_t,220)),187260:ptr(array(reg8_t,222)),4294967292:ptr(TOP)))) "Union_34"
415 ptr(struct(0:array(reg8_t,7144),7144:reg32_t)) "StructFrag_307*"
21 ptr(reg32_t) "LPHANDLE"
416 ptr(struct(0:array(reg8_t,536870910),4294967294:num8_t)) "StructFrag_162*"
417 ptr(struct(0:reg64_t,8:reg16_t)) "StructFrag_277*"
418 ptr(struct(0:array(reg8_t,32),32:num8_t)) "StructFrag_139*"
419 ptr(struct(0:ptr(TOP),4:ptr(TOP),8:ptr(TOP),12:reg16_t,4294967292:ptr(reg16_t))) "Struct_706*"
420 ptr(struct(0:ptr(TOP),4:ptr(TOP),8:ptr(TOP),12:reg16_t,4294967292:ptr(TOP))) "Struct_708*"
421 union(ptr(code_t),ptr(struct(0:code_t,32:code_t))) "Union_57"
422 ptr(struct(4:code_t,32:code_t)) "Struct_769*"
423 ptr(struct(0:array(reg8_t,32),32:reg32_t)) "StructFrag_356*"
424 union(ptr(num32_t),ptr(struct(0:reg32_t,4:uint32_t)),ptr(struct(0:reg64_t,8:reg16_t))) "Union_60"
425 ptr(struct(0:reg32_t,4:uint32_t)) "StructFrag_274*"
426 ptr(struct(0:num8_t,1:num8_t,2:num8_t,3:num8_t,4:ptr(struct(0:ptr(TOP),1:num8_t,4:ptr(TOP),8:ptr(TOP),12:ptr(TOP),4294967294:num8_t,4294967295:num8_t)),8:ptr(struct(0:ptr(TOP),1:num8_t,4:ptr(TOP),8:ptr(TOP),12:ptr(TOP),4294967294:num8_t,4294967295:num8_t)),12:ptr(struct(0:ptr(TOP),1:num8_t,4:ptr(TOP),8:ptr(TOP),12:ptr(TOP),4294967294:num8_t,4294967295:num8_t)))) "Struct_922*"
427 ptr(struct(0:reg32_t,4:num32_t)) "StructFrag_288*"
427 ptr(struct(0:reg32_t,4:num32_t)) "StructFrag_189*"
428 ptr(struct(0:array(reg8_t,8388632),8388632:reg16_t)) "StructFrag_388*"
429 ptr(struct(0:array(reg8_t,24),24:reg16_t)) "StructFrag_281*"
430 union(int32_t,uint32_t) "Union_74"
431 ptr(struct(0:reg32_t,4:reg32_t,8:ptr(struct(0:reg32_t,4:reg32_t,8:ptr(TOP),12:ptr(TOP),16:reg32_t,20:array(uint32_t,15))),12:ptr(TOP),16:reg32_t,20:array(uint32_t,15))) "EXCEPTION_RECORD*"
432 ptr(array(reg8_t,256)) "unknown_2048*"
24 ptr(uint32_t) "unsigned int[]"
433 ptr(struct(0:array(reg8_t,36),36:uint32_t)) "StructFrag_413*"
9 num32_t "errno_t"
434 ptr(struct(12:reg32_t,16:reg32_t,20:reg32_t,24:reg32_t,32:reg32_t,44:reg32_t,56:reg32_t,60:ptr(TOP),64:num32_t,112:reg32_t,116:reg32_t)) "Struct_895*"
435 ptr(struct(0:array(reg8_t,16),16:union(num64_t,struct(0:reg32_t,4:num32_t)))) "StructFrag_152*"
436 ptr(struct(0:array(reg8_t,57272),57272:num8_t)) "StructFrag_153*"
437 ptr(struct(0:ptr(TOP),48:reg32_t)) "Struct_596*"
0 code_t "(FILE* -> int)*"
438 ptr(struct(4:reg32_t,16:reg32_t,20:reg32_t,24:union(ptr(struct(0:array(reg8_t,12),12:ptr(num8_t))),ptr(struct(368:num32_t,372:num32_t,376:num32_t,384:float64_t,392:num32_t,396:num32_t,400:num32_t,404:num32_t,416:num32_t,424:num32_t,432:num32_t,436:num32_t,452:num32_t,456:num32_t,460:num32_t,464:num32_t,468:num32_t,476:num32_t,480:num32_t,484:num32_t,488:num32_t,492:num32_t,512:num32_t,516:num32_t,520:num32_t,524:num32_t,528:num32_t,532:num32_t,536:num32_t,540:num32_t,544:num32_t,548:num32_t))))) "Struct_461*"
0 code_t "(_In_ void*,size_t,size_t,FILE* -> size_t)*"
0 code_t "(_Inout_ LARGE_INTEGER* -ms-> BOOL)*"
439 ptr(struct(0:array(reg8_t,536870911),4294967295:num8_t)) "StructFrag_91*"
0 code_t "(HANDLE,DWORD -ms-> DWORD)*"
440 ptr(struct(0:array(reg8_t,536870896),4294967280:reg32_t)) "StructFrag_187*"
441 ptr(struct(4294967272:ptr(TOP),4294967288:code_t,4294967292:code_t)) "Struct_934*"
0 code_t "(_In_ char* -> int)*"
0 code_t "(HANDLE -ms-> BOOL)*"
442 ptr(struct(0:ptr(TOP),4:ptr(TOP),48:reg32_t)) "Struct_819*"
443 ptr(struct(0:array(reg8_t,12),12:ptr(num8_t))) "StructFrag_16*"
444 ptr(struct(129012:reg32_t,148592:float64_t,179844:reg32_t)) "Struct_902*"
445 ptr(struct(0:code_t,4:code_t,8:code_t)) "Struct_904*"
446 ptr(struct(6308:reg32_t,6312:ptr(reg32_t),6328:ptr(TOP),6336:reg32_t,6360:reg16_t)) "Struct_832*"
447 ptr(struct(168:code_t,172:code_t)) "Struct_804*"
448 ptr(struct(4:reg32_t,28:ptr(TOP))) "Struct_10*"
449 ptr(struct(0:array(reg8_t,12),12:reg32_t)) "StructFrag_2*"
450 ptr(struct(0:reg32_t,4:code_t)) "StructFrag_10*"
451 ptr(struct(0:array(reg8_t,60),60:code_t)) "StructFrag_15*"
452 ptr(struct(16:uint32_t,24:uint32_t,28:uint32_t,36:uint32_t,40:reg32_t)) "Struct_422*"
453 ptr(array(reg8_t,80)) "unknown_640*"
454 ptr(array(reg8_t,1087)) "unknown_8696*"
455 ptr(struct(0:ptr(struct(0:num32_t,4:int32_t,8:ptr(TOP))),4:reg32_t)) "Struct_684*"
456 ptr(struct(0:array(reg8_t,6192),6192:num8_t)) "StructFrag_34*"
457 ptr(struct(0:array(reg8_t,536870904),4294967288:reg32_t)) "StructFrag_223*"
369 ptr(struct(5428:code_t,5444:ptr(struct(0:array(reg8_t,28),28:code_t)))) "Struct_840*"
458 ptr(struct(0:array(reg8_t,24),24:code_t)) "StructFrag_383*"
459 ptr(struct(20:code_t,24:code_t)) "Struct_836*"
460 ptr(struct(20:code_t,24:code_t,28:code_t)) "Struct_856*"
461 ptr(struct(24:ptr(TOP),32:reg32_t,56:reg16_t)) "Struct_261*"
462 ptr(struct(0:ptr(reg16_t),60:ptr(reg16_t),120:ptr(reg16_t),4294967236:ptr(reg16_t))) "Struct_886*"
463 ptr(struct(4:num32_t,8:num32_t,28:ptr(TOP))) "Struct_935*"
464 ptr(struct(0:num32_t,4:num32_t,8:num32_t,16:float64_t,24:num32_t,28:num32_t,32:num32_t,36:num32_t,40:reg32_t,44:reg32_t,48:num32_t,52:reg32_t,56:num32_t,60:reg32_t,64:num32_t,68:num32_t,72:uint32_t,76:uint32_t,80:reg32_t,84:num32_t,88:num32_t,92:num32_t,96:num32_t,100:num32_t,104:reg32_t,108:num32_t,112:num32_t,116:num32_t,120:num32_t,124:num32_t,144:num32_t,148:num32_t,152:num32_t,156:num32_t,160:num32_t,164:num32_t,168:num32_t,172:num32_t,176:num32_t,180:num32_t)) "Struct_464*"
465 ptr(struct(1628:ptr(TOP),1632:reg32_t,1636:reg32_t,6328:ptr(reg32_t),6332:reg32_t,6336:num32_t,6360:reg16_t,6362:reg16_t)) "Struct_612*"
466 ptr(struct(129088:reg32_t,179560:float64_t)) "Struct_631*"
467 union(ptr(ptr(TOP)),ptr(struct(0:ptr(TOP),4:ptr(TOP),48:reg32_t))) "Union_67"
468 ptr(struct(24:ptr(TOP),28:reg32_t,32:num32_t,44:num32_t,56:reg16_t,58:reg16_t)) "Struct_865*"
0 code_t "(_In_ char*,_Inout_ char**,int -> int)*"
0 code_t "(_Inout_ void* -> void)*"
469 ptr(struct(8:num32_t,20:num32_t,24:ptr(num8_t),28:ptr(num8_t),32:ptr(num8_t))) "Struct_428*"
470 ptr(struct(8:ptr(num8_t),36:ptr(TOP),44:reg32_t,52:num32_t)) "Struct_727*"
471 ptr(struct(0:num32_t,8:num32_t,24:ptr(TOP),28:ptr(struct(0:reg64_t,8:reg32_t)))) "Struct_642*"
472 ptr(ptr(struct(0:array(reg8_t,6),6:reg16_t))) "StructFrag_172**"
473 ptr(struct(28:ptr(TOP),36:reg32_t,60:reg16_t)) "Struct_862*"
474 ptr(struct(0:array(reg8_t,536870908),4294967292:reg32_t)) "StructFrag_213*"
475 ptr(array(reg8_t,264)) "unknown_2112*"
476 ptr(struct(129012:reg32_t,148592:float64_t,148828:reg32_t,148832:reg32_t,148864:reg32_t,179844:reg32_t,187064:float64_t)) "Struct_901*"
477 ptr(struct(0:int32_t,4:int32_t,8:int32_t,12:num32_t,16:num32_t,20:num32_t,24:ptr(num32_t),28:ptr(num32_t))) "Struct_644*"
478 ptr(struct(0:array(reg8_t,64),64:code_t)) "StructFrag_14*"
479 ptr(array(reg8_t,100)) "unknown_800*"
480 ptr(array(reg8_t,220)) "unknown_1760*"
481 ptr(array(reg8_t,140)) "unknown_1120*"
482 ptr(struct(0:array(reg8_t,28),28:code_t)) "StructFrag_384*"
483 ptr(struct(3556:ptr(reg16_t),3616:ptr(reg16_t),3676:ptr(reg16_t),3736:ptr(reg16_t))) "Struct_888*"
484 ptr(array(reg8_t,44)) "unknown_352*"
485 ptr(array(reg8_t,512)) "unknown_4096*"
486 ptr(array(reg8_t,1024)) "unknown_8192*"
487 ptr(array(reg8_t,19)) "unknown_152*"
488 ptr(struct(0:array(reg8_t,5372),5372:num8_t)) "StructFrag_142*"
489 ptr(struct(0:ptr(reg32_t),4:reg32_t,8:reg32_t,16:num32_t,4294967268:ptr(struct(0:array(reg8_t,16),16:num32_t)),4294967272:reg32_t)) "Struct_773*"
490 ptr(ptr(reg16_t)) "word[]*"
0 code_t "(_In_ char* -> char*)*"
491 ptr(struct(0:ptr(reg32_t),4:reg32_t,8:reg32_t,4294967268:reg32_t,4294967272:reg32_t)) "Struct_874*"
492 ptr(struct(57273:num8_t,111896:reg32_t,186384:ptr(TOP))) "Struct_329*"
493 ptr(struct(187280:num32_t,187284:reg32_t,187288:num32_t,187292:num32_t,187304:ptr(TOP),187316:ptr(struct(0:array(reg8_t,536870908),4294967292:ptr(TOP))),187320:num32_t)) "Struct_487*"
494 ptr(struct(111768:reg32_t,111896:num32_t,111900:num32_t,111956:reg32_t,111964:ptr(TOP),111968:reg32_t,129248:reg32_t,129252:reg32_t,148548:reg32_t,148600:reg32_t,148604:reg32_t,148608:reg32_t,148636:reg32_t,179864:reg32_t)) "Struct_510*"
495 ptr(struct(111768:reg32_t,111896:num32_t,111900:num32_t,111956:reg32_t,111960:reg32_t,111964:ptr(TOP),111968:reg32_t,122272:reg32_t,129248:reg32_t,129252:reg32_t,148548:reg32_t,148600:reg32_t,148604:reg32_t,148608:reg32_t,148636:reg32_t,148660:reg32_t,148748:reg32_t,179864:reg32_t,179944:reg32_t,179948:reg32_t,179952:reg32_t,179956:reg32_t,179960:reg32_t,179964:reg32_t,179968:reg32_t,179972:reg32_t)) "Struct_511*"
496 ptr(struct(0:array(reg8_t,374688),374688:reg32_t)) "StructFrag_49*"
497 array(reg8_t,33) "unknown_264"
498 array(reg8_t,31) "unknown_248"
499 array(reg8_t,55) "unknown_440"
500 array(reg8_t,63) "unknown_504"
501 array(reg8_t,5) "unknown_40"
502 array(reg8_t,28) "unknown_224"
503 array(reg8_t,215) "unknown_1720"
504 array(reg8_t,89) "unknown_712"
505 array(reg8_t,143) "unknown_1144"
506 array(reg8_t,65) "unknown_520"
507 array(reg8_t,44) "unknown_352"
508 array(reg8_t,68) "unknown_544"
509 array(reg8_t,30) "unknown_240"
510 array(reg8_t,47) "unknown_376"
511 array(reg8_t,40) "unknown_320"
512 array(reg8_t,81) "unknown_648"
513 array(reg8_t,99) "unknown_792"
514 array(reg8_t,13) "unknown_104"
515 array(reg8_t,106) "unknown_848"
516 array(reg8_t,46) "unknown_368"
517 array(reg8_t,43) "unknown_344"
518 array(reg8_t,22) "unknown_176"
519 array(reg8_t,29) "unknown_232"
520 array(reg8_t,19) "unknown_152"
521 array(reg8_t,14) "unknown_112"
522 array(reg8_t,274) "unknown_2192"
523 array(reg8_t,11) "unknown_88"
524 array(ptr(TOP),10) "void*[10]"
525 array(reg8_t,39) "unknown_312"
526 array(reg8_t,27) "unknown_216"
527 array(reg8_t,10) "unknown_80"
528 array(reg8_t,23) "unknown_184"
529 array(reg8_t,7) "unknown_56"
530 array(reg8_t,36) "unknown_288"
531 array(reg8_t,76) "unknown_608"
532 array(reg8_t,26) "unknown_208"
533 array(reg8_t,86) "unknown_688"
534 array(reg8_t,34) "unknown_272"
535 array(reg8_t,38) "unknown_304"
536 array(reg8_t,112) "unknown_896"
537 array(reg8_t,42) "unknown_336"
538 array(reg8_t,243) "unknown_1944"
539 array(reg8_t,79) "unknown_632"
540 array(reg8_t,25) "unknown_200"
541 array(reg8_t,56) "unknown_448"
542 array(reg8_t,125) "unknown_1000"
543 array(reg8_t,161) "unknown_1288"
544 array(reg8_t,122) "unknown_976"
545 array(reg8_t,45) "unknown_360"
546 array(reg8_t,113) "unknown_904"
547 array(ptr(TOP),12) "void*[12]"
548 array(reg8_t,107) "unknown_856"
549 array(reg8_t,17) "unknown_136"
550 array(reg8_t,92) "unknown_736"
551 array(reg8_t,96) "unknown_768"
552 array(ptr(TOP),3) "void*[3]"
553 array(ptr(TOP),4) "void*[4]"
554 array(reg8_t,51) "unknown_408"
555 array(reg8_t,61) "unknown_488"
556 array(reg8_t,282) "unknown_2256"
557 array(reg8_t,87) "unknown_696"
558 array(reg8_t,35) "unknown_280"
559 array(reg8_t,77) "unknown_616"
560 array(reg8_t,54) "unknown_432"
561 array(reg8_t,111) "unknown_888"
562 array(reg8_t,93) "unknown_744"
563 array(reg8_t,70) "unknown_560"
564 array(reg8_t,58) "unknown_464"
565 array(reg8_t,49) "unknown_392"
566 array(reg8_t,53) "unknown_424"
567 array(reg8_t,59) "unknown_472"
568 array(reg8_t,94) "unknown_752"
569 array(reg8_t,84) "unknown_672"
570 array(reg8_t,82) "unknown_656"
571 array(reg8_t,37) "unknown_296"
572 array(reg32_t,4) "dword[4]"
573 array(reg8_t,102) "unknown_816"
574 array(reg8_t,67) "unknown_536"
575 array(reg8_t,90) "unknown_720"
576 array(reg8_t,71) "unknown_568"
577 array(reg8_t,41) "unknown_328"
578 array(reg8_t,69) "unknown_552"
579 array(reg8_t,83) "unknown_664"
580 array(reg8_t,194) "unknown_1552"
581 array(reg8_t,50) "unknown_400"
582 array(reg8_t,144) "unknown_1152"
583 array(reg8_t,127) "unknown_1016"
584 array(reg8_t,74) "unknown_592"
585 array(reg8_t,135) "unknown_1080"
586 array(reg8_t,151) "unknown_1208"
587 array(reg32_t,6) "dword[6]"
588 array(reg8_t,152) "unknown_1216"
589 array(reg8_t,232) "unknown_1856"
590 array(reg8_t,57) "unknown_456"
591 array(reg8_t,131) "unknown_1048"
592 array(reg8_t,246) "unknown_1968"
593 array(reg8_t,323) "unknown_2584"
594 array(reg8_t,208) "unknown_1664"
595 array(reg8_t,364) "unknown_2912"
596 array(reg8_t,146) "unknown_1168"
597 array(reg8_t,196) "unknown_1568"
598 array(reg8_t,226) "unknown_1808"
599 array(reg8_t,228) "unknown_1824"
600 array(reg8_t,234) "unknown_1872"
601 array(reg8_t,236) "unknown_1888"
602 array(reg8_t,62) "unknown_496"
603 array(reg8_t,422) "unknown_3376"
604 array(reg8_t,163) "unknown_1304"
605 array(reg8_t,139) "unknown_1112"
606 array(reg8_t,73) "unknown_584"
607 array(reg8_t,150) "unknown_1200"
608 array(reg8_t,78) "unknown_624"
609 array(reg8_t,405) "unknown_3240"
610 array(reg8_t,130) "unknown_1040"
611 array(reg8_t,153) "unknown_1224"
612 array(reg8_t,134) "unknown_1072"
613 array(reg8_t,160) "unknown_1280"
614 array(reg8_t,214) "unknown_1712"
615 array(reg8_t,202) "unknown_1616"
616 array(reg8_t,162) "unknown_1296"
617 array(reg8_t,179) "unknown_1432"
618 array(reg8_t,209) "unknown_1672"
619 array(reg8_t,222) "unknown_1776"
620 array(reg8_t,98) "unknown_784"
621 array(reg8_t,526) "unknown_4208"
622 array(reg8_t,157) "unknown_1256"
623 array(reg8_t,167) "unknown_1336"
624 array(reg8_t,200) "unknown_1600"
625 array(reg8_t,220) "unknown_1760"
626 array(reg8_t,174) "unknown_1392"
627 array(reg8_t,148) "unknown_1184"
628 array(reg8_t,164) "unknown_1312"
629 array(reg8_t,652) "unknown_5216"
630 array(reg8_t,656) "unknown_5248"
631 array(reg8_t,192) "unknown_1536"
632 array(reg8_t,409) "unknown_3272"
633 array(reg8_t,75) "unknown_600"
634 array(reg8_t,85) "unknown_680"
635 array(reg8_t,91) "unknown_728"
636 array(reg8_t,115) "unknown_920"
637 array(reg8_t,165) "unknown_1320"
638 array(reg8_t,410) "unknown_3280"
639 array(reg8_t,186) "unknown_1488"
640 array(reg8_t,188) "unknown_1504"
641 array(reg8_t,193) "unknown_1544"
642 array(reg8_t,183) "unknown_1464"
643 array(reg8_t,231) "unknown_1848"
644 array(reg8_t,303) "unknown_2424"
645 array(reg8_t,419) "unknown_3352"
646 array(reg8_t,173) "unknown_1384"
647 array(reg8_t,435) "unknown_3480"
648 array(reg8_t,121) "unknown_968"
649 array(reg8_t,142) "unknown_1136"
650 array(reg8_t,155) "unknown_1240"
651 array(reg8_t,385) "unknown_3080"
652 array(reg8_t,321) "unknown_2568"
653 array(reg8_t,169) "unknown_1352"
654 array(reg8_t,263) "unknown_2104"
655 array(reg8_t,339) "unknown_2712"
656 array(reg8_t,147) "unknown_1176"
657 array(reg8_t,244) "unknown_1952"
658 array(reg8_t,101) "unknown_808"
659 array(reg8_t,154) "unknown_1232"
660 array(reg8_t,166) "unknown_1328"
661 array(reg8_t,126) "unknown_1008"
662 array(reg8_t,300) "unknown_2400"
663 array(reg8_t,123) "unknown_984"
664 array(reg8_t,108) "unknown_864"
665 array(reg8_t,109) "unknown_872"
666 array(reg8_t,224) "unknown_1792"
667 array(reg8_t,110) "unknown_880"
668 array(reg32_t,7) "dword[7]"
669 array(reg8_t,117) "unknown_936"
670 array(reg8_t,66) "unknown_528"
671 array(reg8_t,287) "unknown_2296"
672 array(reg8_t,100) "unknown_800"
673 array(reg8_t,138) "unknown_1104"
674 array(reg8_t,171) "unknown_1368"
675 array(reg8_t,191) "unknown_1528"
676 array(reg8_t,176) "unknown_1408"
677 array(reg8_t,280) "unknown_2240"
678 array(reg8_t,496) "unknown_3968"
679 array(reg8_t,129) "unknown_1032"
680 array(reg8_t,137) "unknown_1096"
681 array(reg8_t,412) "unknown_3296"
682 array(reg8_t,233) "unknown_1864"
683 array(reg8_t,132) "unknown_1056"
684 array(reg8_t,512) "unknown_4096"
685 array(reg8_t,352) "unknown_2816"
686 array(reg8_t,97) "unknown_776"
687 array(reg8_t,140) "unknown_1120"
688 array(reg8_t,103) "unknown_824"
689 array(reg8_t,116) "unknown_928"
690 array(reg8_t,185) "unknown_1480"
691 array(reg8_t,240) "unknown_1920"
692 array(reg8_t,114) "unknown_912"
693 array(reg8_t,256) "unknown_2048"
694 array(reg8_t,168) "unknown_1344"
695 array(reg8_t,177) "unknown_1416"
696 array(reg8_t,272) "unknown_2176"
697 array(reg8_t,156) "unknown_1248"
698 array(reg8_t,170) "unknown_1360"
699 array(reg8_t,95) "unknown_760"
700 array(reg8_t,195) "unknown_1560"
701 array(reg8_t,136) "unknown_1088"
702 array(reg8_t,184) "unknown_1472"
703 array(reg8_t,105) "unknown_840"
704 array(reg8_t,262) "unknown_2096"
705 array(reg8_t,248) "unknown_1984"
706 array(reg8_t,268) "unknown_2144"
707 array(reg8_t,688) "unknown_5504"
708 array(reg8_t,373) "unknown_2984"
709 array(reg8_t,278) "unknown_2224"
710 array(reg8_t,133) "unknown_1064"
711 array(reg8_t,1184) "unknown_9472"
712 array(reg8_t,218) "unknown_1744"
713 array(reg8_t,260) "unknown_2080"
714 array(reg8_t,1008) "unknown_8064"
715 array(reg8_t,544) "unknown_4352"
716 array(reg8_t,187) "unknown_1496"
717 array(reg8_t,673) "unknown_5384"
718 array(reg8_t,370) "unknown_2960"
719 array(reg8_t,573) "unknown_4584"
720 array(reg8_t,487) "unknown_3896"
721 array(reg8_t,345) "unknown_2760"
722 array(reg8_t,726) "unknown_5808"
723 array(reg8_t,817) "unknown_6536"
724 array(reg8_t,441) "unknown_3528"
725 array(reg8_t,618) "unknown_4944"
726 array(reg8_t,322) "unknown_2576"
727 array(reg8_t,1087) "unknown_8696"
728 array(reg8_t,591) "unknown_4728"
729 array(reg8_t,827) "unknown_6616"
730 array(reg8_t,213) "unknown_1704"
731 array(reg8_t,198) "unknown_1584"
732 array(reg8_t,510) "unknown_4080"
733 array(reg8_t,270) "unknown_2160"
734 array(reg8_t,296) "unknown_2368"
735 array(reg8_t,284) "unknown_2272"
736 array(reg8_t,180) "unknown_1440"
737 array(reg8_t,338) "unknown_2704"
738 array(reg8_t,238) "unknown_1904"
739 array(reg8_t,245) "unknown_1960"
740 array(reg8_t,343) "unknown_2744"
741 array(reg8_t,508) "unknown_4064"
742 array(reg8_t,727) "unknown_5816"
743 array(reg8_t,706) "unknown_5648"
744 array(reg8_t,1019) "unknown_8152"
745 array(reg8_t,258) "unknown_2064"
746 array(reg8_t,434) "unknown_3472"
747 array(reg8_t,650) "unknown_5200"
748 array(reg8_t,1145) "unknown_9160"
749 array(reg8_t,890) "unknown_7120"
750 array(reg8_t,1498) "unknown_11984"
751 array(reg8_t,317) "unknown_2536"
752 array(reg8_t,764) "unknown_6112"
753 array(reg8_t,520) "unknown_4160"
754 array(reg8_t,1040) "unknown_8320"
755 array(reg8_t,288) "unknown_2304"
756 array(num8_t,2) "char[2]"
757 array(num8_t,57) "char[57]"
758 array(num8_t,28) "char[28]"
759 array(num8_t,23) "char[23]"
760 array(num8_t,24) "char[24]"
761 array(num8_t,22) "char[22]"
762 array(num8_t,29) "char[29]"
763 array(num8_t,30) "char[30]"
764 array(num8_t,3) "char[3]"
765 array(num8_t,26) "char[26]"
766 array(num8_t,10) "char[10]"
767 array(num8_t,47) "char[47]"
768 array(num8_t,20) "char[20]"
769 array(num8_t,21) "char[21]"
770 array(num8_t,18) "char[18]"
771 array(num8_t,40) "char[40]"
772 array(num8_t,46) "char[46]"
773 array(num8_t,27) "char[27]"
774 array(num8_t,8) "char[8]"
775 array(reg8_t,432) "unknown_3456"
776 array(num8_t,44) "char[44]"
777 array(num8_t,53) "char[53]"
778 array(num8_t,38) "char[38]"
779 array(num8_t,31) "char[31]"
780 array(num8_t,37) "char[37]"
781 array(num8_t,45) "char[45]"
782 array(num8_t,52) "char[52]"
783 array(num8_t,42) "char[42]"
784 array(num8_t,56) "char[56]"
785 array(num8_t,79) "char[79]"
786 array(num8_t,32) "char[32]"
787 array(num8_t,81) "char[81]"
788 array(num8_t,34) "char[34]"
789 array(num8_t,39) "char[39]"
790 array(num8_t,51) "char[51]"
791 array(num8_t,33) "char[33]"
792 array(num8_t,70) "char[70]"
793 array(num8_t,35) "char[35]"
794 array(num8_t,54) "char[54]"
795 array(num8_t,62) "char[62]"
796 array(num8_t,19) "char[19]"
797 array(num8_t,43) "char[43]"
798 array(num8_t,41) "char[41]"
799 array(reg8_t,424) "unknown_3392"
800 array(reg8_t,408) "unknown_3264"
801 array(reg8_t,1024) "unknown_8192"
802 array(reg8_t,888) "unknown_7104"
803 array(num8_t,36) "char[36]"
804 array(reg8_t,504) "unknown_4032"
805 array(reg8_t,1056) "unknown_8448"
806 array(reg8_t,4608) "unknown_36864"
807 array(num8_t,14) "char[14]"
808 array(reg8_t,4000) "unknown_32000"
809 struct(0:ptr(struct(0:reg32_t,4:reg32_t,8:ptr(struct(0:reg32_t,4:reg32_t,8:ptr(TOP),12:ptr(TOP),16:reg32_t,20:array(uint32_t,15))),12:ptr(TOP),16:reg32_t,20:array(uint32_t,15))),4:ptr(struct(0:reg32_t,4:reg32_t,8:reg32_t,12:reg32_t,16:reg32_t,20:reg32_t,24:reg32_t,28:struct(0:reg32_t,4:reg32_t,8:reg32_t,12:reg32_t,16:reg32_t,20:reg32_t,24:reg32_t,28:array(reg8_t,80),108:reg32_t),140:reg32_t,144:reg32_t,148:reg32_t,152:reg32_t,156:reg32_t,160:reg32_t,164:reg32_t,168:reg32_t,172:reg32_t,176:reg32_t,180:reg32_t,184:reg32_t,188:reg32_t,192:reg32_t,196:reg32_t,200:reg32_t,204:array(reg8_t,512)))) "_EXCEPTION_POINTERS"
810 ptr(struct(0:reg32_t,4:reg32_t,8:reg32_t,12:reg32_t,16:reg32_t,20:reg32_t,24:reg32_t,28:struct(0:reg32_t,4:reg32_t,8:reg32_t,12:reg32_t,16:reg32_t,20:reg32_t,24:reg32_t,28:array(reg8_t,80),108:reg32_t),140:reg32_t,144:reg32_t,148:reg32_t,152:reg32_t,156:reg32_t,160:reg32_t,164:reg32_t,168:reg32_t,172:reg32_t,176:reg32_t,180:reg32_t,184:reg32_t,188:reg32_t,192:reg32_t,196:reg32_t,200:reg32_t,204:array(reg8_t,512))) "CONTEXT*"
811 array(reg8_t,6092) "unknown_48736"
812 array(reg8_t,264) "unknown_2112"
813 struct(0:reg32_t,4:reg32_t,8:reg32_t,12:reg32_t) "_EH4_SCOPETABLE"
814 array(reg8_t,576) "unknown_4608"
815 ptr(array(reg8_t,33)) "unknown_264*"
816 ptr(array(reg8_t,23)) "unknown_184*"
817 ptr(array(reg8_t,38)) "unknown_304*"
818 ptr(array(reg8_t,17)) "unknown_136*"
819 ptr(array(reg8_t,96)) "unknown_768*"
820 array(reg8_t,518) "unknown_4144"
821 ptr(array(reg8_t,82)) "unknown_656*"
822 ptr(array(reg8_t,97)) "unknown_776*"
823 array(reg8_t,655844) "unknown_5246752"
824 array(reg8_t,1234108) "unknown_9872864"
825 array(reg8_t,8200) "unknown_65600"
826 array(reg8_t,27864) "unknown_222912"
827 ptr(array(reg8_t,40960)) "unknown_327680*"
828 ptr(array(reg8_t,27864)) "unknown_222912*"
829 array(reg8_t,40960) "unknown_327680"
830 array(reg8_t,2364) "unknown_18912"
831 array(reg8_t,500) "unknown_4000"
0 code_t "(void -ms-> DWORD)*"
0 code_t "(void -ms-> BOOL)*"
0 code_t "(_Inout_ LPTOP_LEVEL_EXCEPTION_FILTER -ms-> LPTOP_LEVEL_EXCEPTION_FILTER)*"
0 code_t "(void -ms-> HANDLE)*"
0 code_t "(HANDLE,UINT -ms-> BOOL)*"
0 code_t "(_Inout_ LONG*,LONG,LONG -ms-> LONG)*"
0 code_t "(_Inout_ LONG*,LONG -ms-> LONG)*"
0 code_t "(_Inout_ LPSECURITY_ATTRIBUTES,BOOL,BOOL,_In_ WCHAR* -ms-> HANDLE)*"
0 code_t "(DWORD -ms-> void)*"
0 code_t "(_Inout_ LPFILETIME -ms-> void)*"
0 code_t "(_Inout_ void*,_In_ void*,size_t -> void*)*"
0 code_t "(_Inout_ void*,size_t -> void*)*"
0 code_t "(_Inout_ char*,_In_ char* -> int)*"
0 code_t "(int -> void)*"
0 code_t "(_Inout_ char*,size_t,_In_ char*,_Inout_ va_list -> int)*"
0 code_t "(_Inout_ _onexit_t -> _onexit_t)*"
0 code_t "(_Inout_ unsigned int*,unsigned int,unsigned int -> errno_t)*"
0 code_t "(unknown0_2,bool -> void)*"
0 code_t "(_Inout_ void*,int,size_t -> void*)*"
0 code_t "(size_t,size_t -> void*)*"
0 code_t "(size_t -> void*)*"
0 code_t "(_In_ char*,_In_ char* -> FILE*)*"
0 code_t "(void -> FILE*)*"
0 code_t "(FILE*,int,int -> int)*"
0 code_t "(_Inout_ void*,size_t,size_t,FILE* -> size_t)*"
0 code_t "(_In_ char*,_Inout_ va_list -> int)*"
832 array(reg8_t,3156) "unknown_25248"
833 num128_t "int_128"
834 array(reg8_t,768) "unknown_6144"
835 array(reg8_t,2192) "unknown_17536"
836 array(reg8_t,4096) "unknown_32768"
837 array(reg8_t,135168) "unknown_1081344"
0 code_t "_onexit_t"
| BlitzBasic | 0 | matt-noonan/retypd-data | data/simple_encoder.exe.decls | [
"MIT"
] |
.main-content {
display: flex;
flex-direction: column;
}
.rc-audit-empty {
padding: 1.5rem;
text-align: center;
}
.rc-select {
margin: 0.5rem 0;
}
.rc-audit-container {
overflow-y: scroll;
flex: 1 1 auto;
}
.rc-audit {
display: flex;
flex-direction: column;
flex: 1 1 100%;
}
.rc-audit-form {
display: flex;
flex: 0 0 auto;
padding: var(--header-padding);
align-items: center;
flex-wrap: wrap;
justify-content: flex-start;
}
.rc-input__element[type=date]::-webkit-inner-spin-button {
display: none;
-webkit-appearance: none;
}
.rc-audit-date {
flex-grow: 0;
}
.rc-table--audit {
table-layout: fixed;
}
.rc-table--audit .rc-table-td {
overflow: hidden;
padding-right: 0.5rem;
padding-left: 0.5rem;
text-overflow: ellipsis;
}
.rc-audit-filter-td {
width: 200px;
}
.rc-audit-results-td {
width: 70px;
}
.rc-audit-created-td {
width: 200px;
text-align: center;
}
.rc-audit-user-td {
display: flex;
min-width: 180px;
font-size: 16px;
align-items: center;
}
.rc-audit-user__avatar {
flex: 0 0 auto;
width: 48px;
height: 48px;
}
@media (max-width: 501px) {
.rc-audit-results-td,
.rc-audit-user__avatar {
display: none;
}
}
.rc-audit-user__username {
padding: 0 0.5rem;
}
.rc-audit .message .read-receipt,
.rc-audit .message .message-actions,
.rc-audit .message .actionLinks,
.rc-audit .message .rc-button-broadcast,
.rc-audit .message .reactions {
display: none;
}
| CSS | 3 | subramanir2143/Rocket.Chat | ee/app/auditing/client/index.css | [
"MIT"
] |
from fontTools.ttLib.tables import otTables as ot
from .table_builder import TableUnbuilder
def unbuildColrV1(layerV1List, baseGlyphV1List):
unbuilder = LayerV1ListUnbuilder(layerV1List.Paint)
return {
rec.BaseGlyph: unbuilder.unbuildPaint(rec.Paint)
for rec in baseGlyphV1List.BaseGlyphV1Record
}
def _flatten(lst):
for el in lst:
if isinstance(el, list):
yield from _flatten(el)
else:
yield el
class LayerV1ListUnbuilder:
def __init__(self, layers):
self.layers = layers
callbacks = {
(
ot.Paint,
ot.PaintFormat.PaintColrLayers,
): self._unbuildPaintColrLayers,
}
self.tableUnbuilder = TableUnbuilder(callbacks)
def unbuildPaint(self, paint):
assert isinstance(paint, ot.Paint)
return self.tableUnbuilder.unbuild(paint)
def _unbuildPaintColrLayers(self, source):
assert source["Format"] == ot.PaintFormat.PaintColrLayers
layers = list(
_flatten(
[
self.unbuildPaint(childPaint)
for childPaint in self.layers[
source["FirstLayerIndex"] : source["FirstLayerIndex"]
+ source["NumLayers"]
]
]
)
)
if len(layers) == 1:
return layers[0]
return {"Format": source["Format"], "Layers": layers}
if __name__ == "__main__":
from pprint import pprint
import sys
from fontTools.ttLib import TTFont
try:
fontfile = sys.argv[1]
except IndexError:
sys.exit("usage: fonttools colorLib.unbuilder FONTFILE")
font = TTFont(fontfile)
colr = font["COLR"]
if colr.version < 1:
sys.exit(f"error: No COLR table version=1 found in {fontfile}")
colorGlyphs = unbuildColrV1(
colr.table.LayerV1List,
colr.table.BaseGlyphV1List,
ignoreVarIdx=not colr.table.VarStore,
)
pprint(colorGlyphs)
| Python | 4 | gregdavill/fonttools | Lib/fontTools/colorLib/unbuilder.py | [
"Apache-2.0",
"MIT"
] |
import Image from './dist/client/image'
export * from './dist/client/image'
export default Image
| TypeScript | 1 | blomqma/next.js | packages/next/image.d.ts | [
"MIT"
] |
$$ MODE TUSCRIPT
oldnumbers=newnumbers="",range=20
LOOP nr=1,#range
oldnumbers=APPEND(oldnumbers,nr)
ENDLOOP
PRINT "before ",oldnumbers
LOOP r=#range,1,-1
RANDNR=RANDOM_NUMBERS (1,#r,1)
shuffle=SELECT (oldnumbers,#randnr,oldnumbers)
newnumbers=APPEND(newnumbers,shuffle)
ENDLOOP
PRINT "after ",newnumbers
| Turing | 3 | LaudateCorpus1/RosettaCodeData | Task/Knuth-shuffle/TUSCRIPT/knuth-shuffle.tu | [
"Info-ZIP"
] |
# To build, run the following command from the top level project directory:
#
# docker build -f src/main/docker/Dockerfile .
FROM adoptopenjdk:11-jre-hotspot as builder
ARG JAR_FILE=target/*.jar
COPY ${JAR_FILE} application.jar
RUN java -Djarmode=layertools -jar application.jar extract
FROM adoptopenjdk:11-jre-hotspot
COPY --from=builder dependencies/ ./
COPY --from=builder spring-boot-loader/ ./
COPY --from=builder internal-dependencies/ ./
COPY --from=builder snapshot-dependencies/ ./
COPY --from=builder application/ ./
ENTRYPOINT ["java", "org.springframework.boot.loader.JarLauncher"] | Dockerfile | 4 | DBatOWL/tutorials | docker/docker-spring-boot/src/main/docker/Dockerfile | [
"MIT"
] |
[naughty..naughty]
| TOML | 3 | vanillajonathan/julia | stdlib/TOML/test/testfiles/invalid/empty-implicit-table.toml | [
"Zlib"
] |
# See here for image contents: https://github.com/microsoft/vscode-dev-containers/tree/v0.158.0/containers/typescript-node/.devcontainer/base.Dockerfile
# [Choice] Node.js version: 14, 12, 10
ARG VARIANT="14-buster"
FROM mcr.microsoft.com/vscode/devcontainers/typescript-node:0-${VARIANT}
# same package list from github1s/scripts/pre-install.sh
RUN apt-get update && export DEBIAN_FRONTEND=noninteractive \
&& apt-get -y install --no-install-recommends libx11-dev libxkbfile-dev libsecret-1-dev rsync
# copied from https://github.com/microsoft/vscode-oniguruma/blob/main/.devcontainer/Dockerfile
RUN mkdir -p /opt/dev \
&& cd /opt/dev \
&& git clone https://github.com/emscripten-core/emsdk.git \
&& cd /opt/dev/emsdk \
&& ./emsdk install 2.0.6 \
&& ./emsdk activate 2.0.6
ENV PATH="/opt/dev/emsdk:/opt/dev/emsdk/node/12.9.1_64bit/bin:/opt/dev/emsdk/upstream/emscripten:${PATH}"
| Dockerfile | 3 | Yongrui-Su/github1s | .devcontainer/Dockerfile | [
"MIT"
] |
"""Test helpers for Tibber."""
import pytest
from homeassistant.components.tibber.const import DOMAIN
from homeassistant.const import CONF_ACCESS_TOKEN
from tests.common import MockConfigEntry
@pytest.fixture
def config_entry(hass):
"""Tibber config entry."""
config_entry = MockConfigEntry(
domain=DOMAIN,
data={CONF_ACCESS_TOKEN: "token"},
unique_id="tibber",
)
config_entry.add_to_hass(hass)
return config_entry
| Python | 4 | MrDelik/core | tests/components/tibber/conftest.py | [
"Apache-2.0"
] |
/* Copyright 2018 The TensorFlow Authors. All Rights Reserved.
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
==============================================================================*/
#include "tensorflow/core/platform/mutex.h"
#include <time.h>
#include "nsync_cv.h" // NOLINT
#include "nsync_mu.h" // NOLINT
#include "nsync_mu_wait.h" // NOLINT
#include "nsync_time.h" // NOLINT
namespace tensorflow {
// Check that the MuData struct used to reserve space for the mutex
// in tensorflow::mutex is big enough.
static_assert(sizeof(nsync::nsync_mu) <= sizeof(internal::MuData),
"tensorflow::internal::MuData needs to be bigger");
// Cast a pointer to internal::MuData to a pointer to the mutex
// representation. This is done so that the header files for nsync_mu do not
// need to be included in every file that uses tensorflow's mutex.
static inline nsync::nsync_mu *mu_cast(internal::MuData *mu) {
return reinterpret_cast<nsync::nsync_mu *>(mu);
}
mutex::mutex() { nsync::nsync_mu_init(mu_cast(&mu_)); }
mutex::mutex(LinkerInitialized x) {}
void mutex::lock() { nsync::nsync_mu_lock(mu_cast(&mu_)); }
bool mutex::try_lock() { return nsync::nsync_mu_trylock(mu_cast(&mu_)) != 0; };
void mutex::unlock() { nsync::nsync_mu_unlock(mu_cast(&mu_)); }
void mutex::lock_shared() { nsync::nsync_mu_rlock(mu_cast(&mu_)); }
bool mutex::try_lock_shared() {
return nsync::nsync_mu_rtrylock(mu_cast(&mu_)) != 0;
};
void mutex::unlock_shared() { nsync::nsync_mu_runlock(mu_cast(&mu_)); }
// A callback suitable for nsync_mu_wait() that calls Condition::Eval().
static int EvaluateCondition(const void *vcond) {
return static_cast<int>(static_cast<const Condition *>(vcond)->Eval());
}
void mutex::Await(const Condition &cond) {
nsync::nsync_mu_wait(mu_cast(&mu_), &EvaluateCondition, &cond, nullptr);
}
bool mutex::AwaitWithDeadline(const Condition &cond, uint64 abs_deadline_ns) {
time_t seconds = abs_deadline_ns / (1000 * 1000 * 1000);
nsync::nsync_time abs_time = nsync::nsync_time_s_ns(
seconds, abs_deadline_ns - seconds * (1000 * 1000 * 1000));
return nsync::nsync_mu_wait_with_deadline(mu_cast(&mu_), &EvaluateCondition,
&cond, nullptr, abs_time,
nullptr) == 0;
}
// Check that the CVData struct used to reserve space for the
// condition variable in tensorflow::condition_variable is big enough.
static_assert(sizeof(nsync::nsync_cv) <= sizeof(internal::CVData),
"tensorflow::internal::CVData needs to be bigger");
// Cast a pointer to internal::CVData to a pointer to the condition
// variable representation. This is done so that the header files for nsync_cv
// do not need to be included in every file that uses tensorflow's
// condition_variable.
static inline nsync::nsync_cv *cv_cast(internal::CVData *cv) {
return reinterpret_cast<nsync::nsync_cv *>(cv);
}
condition_variable::condition_variable() {
nsync::nsync_cv_init(cv_cast(&cv_));
}
void condition_variable::wait(mutex_lock &lock) {
nsync::nsync_cv_wait(cv_cast(&cv_), mu_cast(&lock.mutex()->mu_));
}
void condition_variable::notify_one() { nsync::nsync_cv_signal(cv_cast(&cv_)); }
void condition_variable::notify_all() {
nsync::nsync_cv_broadcast(cv_cast(&cv_));
}
namespace internal {
std::cv_status wait_until_system_clock(
CVData *cv_data, MuData *mu_data,
const std::chrono::system_clock::time_point timeout_time) {
int r = nsync::nsync_cv_wait_with_deadline(cv_cast(cv_data), mu_cast(mu_data),
timeout_time, nullptr);
return r ? std::cv_status::timeout : std::cv_status::no_timeout;
}
} // namespace internal
} // namespace tensorflow
| C++ | 4 | abhaikollara/tensorflow | tensorflow/core/platform/default/mutex.cc | [
"Apache-2.0"
] |
REBOL [
Title: "Red/System compilation error test"
File: %comp-err-test.r
License: "BSD-3 - https://github.com/dockimbel/Red/blob/master/BSD-3-License.txt"
]
change-dir %../ ;; revert to tests/ dir (from runnable)
~~~start-file~~~ "comp-err"
--test-- "sample compilation error test"
--compile-this {
Red/System []
i := 1;
}
--assert parse qt/comp-output [
thru "*** Compilation Error: undefined symbol"
thru "at line: 3"
thru "near: [" thru "i := 1" thru "]"
to end
]
--clean
--test-- "error line reporting test"
--compile-this {
Red/System []
foo: func [][
if true [
either true [
a
][
123
]
]
]
}
--assert parse qt/comp-output [
thru "*** Compilation Error: undefined symbol: a"
thru "at line: 6"
to end
]
--clean
~~~end-file~~~
| R | 4 | 0xflotus/red | system/tests/source/compiler/comp-err-test.r | [
"BSL-1.0",
"BSD-3-Clause"
] |
{eq, q, StdIn, FileSystem} = require './_helpers'
{strict-equal: equal}:assert = require 'assert'
suite 'lib options' ->
data =
'function square(x) {\n'
' return x * x;\n'
'}\n'
results = [
'1:function square(##x#) {'
'2: return ##x# * x;'
'2: return x * ##x#;'
]
suite 'stdin' ->
test 'basic' ->
eq '#x', results, it, {stdin: StdIn data}
test 'using -' ->
eq '#x -', results, it, {stdin: StdIn data}
test '- and files' ->
results =
'test/data/a.js:1:function ##square#(x) {'
'(standard input):1:function ##square#(x) {'
eq '#square test/data/a.js - test/data/b.js', results, it, {stdin: StdIn data}
test 'error in stdin input' ->
eq '#x', [func-type: 'error', value: /Could not parse JavaScript/], it, {stdin: StdIn '%$@%@%'}
test 'error: stdin not defined' ->
eq '#x', [func-type: 'error', value: /Error: stdin not defined/], it
suite 'exit' ->
f = (done, expected, result) -->
equal result, expected
done!
test 'matches' ->
q '#x test/data/a.js', {exit: f it, 0; error: ->}
test 'no matches' ->
q '#NONEXISTANT test/data/a.js', {exit: f it, 1; error: ->}
test 'no exit' ->
equal void, q '--version', {error: ->}
suite 'file system (fs)' ->
fs = new FileSystem do
'file.js':
type: 'file'
contents: '''
function square(x) {
return x * x;
}
'''
test 'basic' ->
eq 'return file.js', '2: ##return x * x;#', it, {fs}
suite 'text-format' ->
text-format =
green: ->
cyan: ->
magenta: ->
red: ->
bold: -> "!!#it!!"
test 'basic' ->
eq 'return test/data/a.js', '2: !!return x * x;!!', it, {text-format}
suite 'input' ->
input = '''
if (x) {
f(2 + x);
}
'''
test 'basic' ->
eq 'bi', '2: f(##2 + x#);', it, {input}
test 'filename' ->
eq 'bi --filename', '(input):2: f(##2 + x#);', it, {input}
| LiveScript | 4 | GerHobbelt/grasp | test/lib-options.ls | [
"MIT"
] |
# Check the handling of commands which have changed.
# RUN: rm -rf %t.build
# RUN: mkdir -p %t.build
# RUN: cp %s %t.build/build.ninja
# RUN: echo input-1 > %t.build/input-1
# RUN: echo input-2 > %t.build/input-2
# RUN: echo "build output: CAT input-1 input-2" > %t.build/output-rule.ninja
# RUN: %{llbuild} ninja build --jobs 1 --chdir %t.build &> %t.out
# RUN: %{FileCheck} --check-prefix=CHECK-FIRST < %t.out %s
# Change the manifest and rebuild.
#
# RUN: echo "build output: CAT input-1" > %t.build/output-rule.ninja
# RUN: %{llbuild} ninja build --jobs 1 --chdir %t.build &> %t.out
# RUN: %{FileCheck} --check-prefix=CHECK-SECOND < %t.out %s
# CHECK-FIRST: [1/{{.*}}] cat input-1 input-2 > output
# CHECK-SECOND: [1/{{.*}}] cat input-1 > output
rule CAT
command = cat ${in} > ${out}
include output-rule.ninja
default output
| Ninja | 4 | uraimo/swift-llbuild | tests/Ninja/Build/changed-commands.ninja | [
"Apache-2.0"
] |
{%- macro formRow(form, tag, attributes = '', col = 6) -%}
{%- set defaultClass = 'form-control ' -%}
{%- if attributes is iterable -%}
{%- for key, value in attributes -%}
{%- set attr[key] = value -%}
{%-endfor -%}
{%- else -%}
{%- set attr['class'] = defaultClass ~ attributes -%}
{%-endif -%}
<div class="form-group">
<label class="col-sm-2 control-label" for="{{ tag }}">{{ form.getLabel(tag) }}:</label>
<div class="col-sm-{{ col }}">{{ form.render(tag, attr) }}</div>
</div>
{%- endmacro -%}
{{- formRow(formLogin, 'password') -}}
| Volt | 3 | tidytrax/cphalcon | tests/_data/fixtures/views/macro/form_row.volt | [
"BSD-3-Clause"
] |
---
layout: post
title: "LiquidHaskell Caught Telling Lies!"
date: 2013-11-23 16:12
comments: true
external-url:
categories: termination
author: Ranjit Jhala, Niki Vazou
published: true
demo: TellingLies.hs
---
One crucial goal of a type system is to provide the guarantee,
memorably phrased by Milner as *well-typed programs don't go wrong*.
The whole point of LiquidHaskell (and related systems) is to provide
the above guarantee for expanded notions of "going wrong".
All this time, we've claimed (and believed) that LiquidHaskell
provided such a guarantee.
We were wrong.
LiquidHaskell tells lies.
<!-- more -->
\begin{code}
{-@ LIQUID "--no-termination" @-}
module TellingLies where
import Language.Haskell.Liquid.Prelude (liquidError)
divide :: Int -> Int -> Int
foo :: Int -> Int
explode :: Int
\end{code}
To catch LiquidHaskell red-handed, we require
1. a notion of **going wrong**,
2. a **program** that clearly goes wrong, and the smoking gun,
3. a **lie** from LiquidHaskell that the program is safe.
The Going Wrong
---------------
Lets keep things simple with an old fashioned `div`-ision operator.
A division by zero would be, clearly *going wrong*.
To alert LiquidHaskell to this possibility, we encode "not going wrong"
with the precondition that the denominator be non-zero.
\begin{code}
{-@ divide :: n:Int -> d:{v:Int | v /= 0} -> Int @-}
divide n 0 = liquidError "no you didn't!"
divide n d = n `div` d
\end{code}
The Program
-----------
Now, consider the function `foo`.
\begin{code}
{-@ foo :: n:Int -> {v:Nat | v < n} @-}
foo n | n > 0 = n - 1
| otherwise = foo n
\end{code}
Now, `foo` should only be called with strictly positive values.
In which case, the function returns a `Nat` that is strictly
smaller than the input.
The function diverges when called with `0` or negative inputs.
Note that the signature of `foo` is slightly different, but
nevertheless, legitimate, as *when* the function returns an
output, the output is indeed a `Nat` that is *strictly less than*
the input parameter `n`. Hence, LiquidHaskell happily checks
that `foo` does indeed satisfy its given type.
So far, nothing has gone wrong either in the program, or
with LiquidHaskell, but consider this innocent little
function:
\begin{code}
explode = let z = 0
in (\x -> (2013 `divide` z)) (foo z)
\end{code}
Thanks to *lazy evaluation*, the call to `foo` is ignored,
and hence evaluating `explode` leads to a crash! Ugh!
The Lie
-------
However, LiquidHaskell produces a polyannish prognosis and
cheerfully declares the program *safe*.
Huh?
Well, LiquidHaskell deduces that
a. `z == 0` from the binding,
b. `x : Nat` from the output type for `foo`
c. `x < z` from the output type for `foo`
\begin{code} Of course, no such `x` exists! Or, rather, the SMT solver reasons
z == 0 && x >= 0 && x < z => z /= 0
\end{code}
as the hypotheses are inconsistent. In other words, LiquidHaskell
deduces that the call to `divide` happens in an *impossible* environment,
i.e. is dead code, and hence, the program is safe.
In our defence, the above, sunny prognosis is not *totally misguided*.
Indeed, if Haskell was like ML and had *strict evaluation* then
indeed the program would be safe in that we would *not* go wrong
i.e. would not crash with a divide-by-zero.
But of course, thats a pretty lame excuse, since Haskell doesn't have
strict semantics. So looks like LiquidHaskell (and hence, we)
have been caught red-handed.
Well then, is there a way to prevent LiquidHaskell from telling lies?
That is, can we get Milner's *well-typed programs don't go wrong*
guarantee under lazy evaluation?
Thankfully, there is.
| Literate Haskell | 5 | curiousleo/liquidhaskell | docs/blog/2013-11-23-telling_lies.lhs | [
"MIT",
"BSD-3-Clause"
] |
-@ var body: String
-@ var title : String = "Fuse Insight"
-@ var navigationBar : String = ""
-@ var head : String = ""
- response.setContentType("text/html")
-# Only include the console if it's available and the engine is in dev mode.
- val include_console = engine.isDevelopmentMode && engine.resourceLoader.exists("/org/fusesource/scalate/console/console_head.scaml")
!!! Basic
%html(lang="en")
%head
%meta(http-equiv="Content-Type" content="text/html; charset=utf-8")
%meta(name="description" content="description goes here")
%meta(name="keywords" content="keywords,goes,here")
%meta(name="author" content="Your Name")
- if (include_console)
= include("/org/fusesource/scalate/console/console_head.scaml")
%link(href={uri("/css/style.css")} rel="stylesheet" type="text/css")
- if (include_console)
%link(href={uri("/css/scalate/console.css")} rel="stylesheet" type="text/css")
- if (head != "")
!~~ head
%title
= title
%body
#navigation
.wrapper
%ul
-# TODO remove this line when servletPath is in Scalate by default
- val servletPath = request.getServletPath
- if (servletPath.startsWith("/index.") || servletPath == "/")
%li
%span Insight
- else
%li
%a(href={uri("/")} title="Insight Home Page")
Insight
%li
%a(href={uri("/projects")} title="View Projects")
Projects
- if (navigationBar != "")
!~~ navigationBar
%li
%a(href="http://insight.fusesource.org/" title="Insight Documentation")
Documentation
#content
.wrapper
!~~ body
#footer
.wrapper
%br
- if (include_console)
= include("/org/fusesource/scalate/console/console.scaml")
| Scaml | 3 | rjakubco/fuse | sandbox/insight-maven-web/src/main/webapp/WEB-INF/scalate/layouts/default.scaml | [
"Apache-2.0"
] |
# SiEPIC EBeam PDK cross-section, based on ANT NanoSOI process
# https://www.appliednt.com/nanosoi/
# Mustafa Hammood mustafa@siepic.com
# input layers:
si = layer("1/0")
sietch1 = layer("11/0")
sietch2 = layer("12/0")
ml = layer("12/0")
mlopen = layer("13/0")
mh = layer("11/0")
# cross section calculations
# thickness of the stack
height(7.5)
# silicon layer, and etching
x_si = grow(0.22)
etch_si = si.inverted
# waveguide, assume 10 degree sidewall, with mid-point being the desired width; bias = sin(10)*220.
etch_angle = 10
mask(etch_si).etch(0.22, :taper => etch_angle, :bias => 0, :into => x_si)
x_si1 = x_si.dup
# mh metal
x_oxide = grow(2.2, 2.2, :mode => :round )
x_mh = mask(mh).grow(0.2)
# vl and m2 metals
x_ml = mask(ml).grow(0.7,0)
x_oxide = x_oxide.or(grow(0.3, 0.3, :mode => :round ))
#x_mlopen = mask(mlopen).grow(0.3, :into => x_oxide)
mask(mlopen).etch(0.3, :taper => etch_angle, :bias => 0, :into => x_oxide)
# output
layers_file(File.join(File.expand_path(File.dirname(__FILE__)), "EBeam.lyp"))
output("300/0", x_oxide)
output("300/0", bulk)
output("301/0", x_si1)
output("345/0", x_ml)
#output("346/0", x_mlopen)
output("347/0", x_mh)
| XS | 4 | YixuanWUSTL/SiEPIC_EBeam_PDK | klayout_dot_config/tech/EBeam/pymacros/EBeam_ANT.xs | [
"MIT"
] |
#![crate_type = "lib"]
pub struct V<S>(S);
pub trait An {
type U;
}
pub trait F<A> {
}
impl<A: An> F<A> for V<<A as An>::U> {
}
| Rust | 3 | Eric-Arellano/rust | src/test/run-make-fulldeps/issues-41478-43796/a.rs | [
"ECL-2.0",
"Apache-2.0",
"MIT-0",
"MIT"
] |
=pod
=head1 NAME
DSA_dup_DH - create a DH structure out of DSA structure
=head1 SYNOPSIS
#include <openssl/dsa.h>
The following functions have been deprecated since OpenSSL 3.0, and can be
hidden entirely by defining B<OPENSSL_API_COMPAT> with a suitable version value,
see L<openssl_user_macros(7)>:
DH *DSA_dup_DH(const DSA *r);
=head1 DESCRIPTION
The function described on this page is deprecated. There is no direct
replacement, applications should use the EVP_PKEY APIs for Diffie-Hellman
operations.
DSA_dup_DH() duplicates DSA parameters/keys as DH parameters/keys. q
is lost during that conversion, but the resulting DH parameters
contain its length.
=head1 RETURN VALUES
DSA_dup_DH() returns the new B<DH> structure, and NULL on error. The
error codes can be obtained by L<ERR_get_error(3)>.
=head1 NOTE
Be careful to avoid small subgroup attacks when using this.
=head1 SEE ALSO
L<DH_new(3)>, L<DSA_new(3)>, L<ERR_get_error(3)>
=head1 HISTORY
This function was deprecated in OpenSSL 3.0.
=head1 COPYRIGHT
Copyright 2000-2020 The OpenSSL Project Authors. All Rights Reserved.
Licensed under the Apache License 2.0 (the "License"). You may not use
this file except in compliance with the License. You can obtain a copy
in the file LICENSE in the source distribution or at
L<https://www.openssl.org/source/license.html>.
=cut
| Pod | 4 | lbbxsxlz/openssl | doc/man3/DSA_dup_DH.pod | [
"Apache-2.0"
] |
import createSvgIcon from './utils/createSvgIcon';
import { jsx as _jsx } from "react/jsx-runtime";
export default createSvgIcon( /*#__PURE__*/_jsx("path", {
d: "M11.5 9C10.12 9 9 10.12 9 11.5s1.12 2.5 2.5 2.5 2.5-1.12 2.5-2.5S12.88 9 11.5 9zM20 4H4c-1.1 0-2 .9-2 2v12c0 1.1.9 2 2 2h16c1.1 0 2-.9 2-2V6c0-1.1-.9-2-2-2zm-3.92 13.5-2.2-2.2c-.9.58-2.03.84-3.22.62-1.88-.35-3.38-1.93-3.62-3.83-.38-3.01 2.18-5.52 5.21-5.04 1.88.3 3.39 1.84 3.7 3.71.19 1.16-.08 2.23-.64 3.12l2.2 2.19c.39.39.39 1.03 0 1.42-.4.4-1.04.4-1.43.01z"
}), 'PageviewRounded'); | JavaScript | 3 | good-gym/material-ui | packages/material-ui-icons/lib/esm/PageviewRounded.js | [
"MIT"
] |
/* For list of changes made to the original C.g4 see C11Parser.g4.
Copyright (c) 2020 International Business Machines Corporation
Prepared by: Geert Janssen <geert@us.ibm.com>
*/
lexer grammar C11Tokens;
import C11_lexer_common;
//A.1.2 Keywords
Keyword
: AUTO | IF | UNSIGNED
| BREAK | INLINE | VOID
| CASE | INT | VOLATILE
| CHAR | LONG | WHILE
| CONST | REGISTER | ALIGNAS
| CONTINUE | RESTRICT | ALIGNOF
| DEFAULT | RETURN | ATOMIC
| DO | SHORT | BOOL
| DOUBLE | SIGNED | COMPLEX
| ELSE | SIZEOF | GENERIC
| ENUM | STATIC | IMAGINARY
| EXTERN | STRUCT | NORETURN
| FLOAT | SWITCH | STATIC_ASSERT
| FOR | TYPEDEF | THREAD_LOCAL
| GOTO | UNION
;
//A.1.3 Identifiers
//A.1.5 Constants
/*
IntegerConstant
FloatingConstant
CharacterConstant
*/
//A.1.6 StringLiteral
//A.1.7
Punctuator
: LeftBracket | RightBracket | LeftParen | RightParen | LeftBrace
| RightBrace | Dot | Arrow | PlusPlus | MinusMinus | And | Star
| Plus | Minus | Tilde | Not | Div | Mod | LeftShift | RightShift
| Less | Greater | LessEqual | GreaterEqual | Equal | NotEqual | Caret
| Or | AndAnd | OrOr | Question | Colon | Semi | Ellipsis | Assign
| StarAssign | DivAssign | ModAssign | PlusAssign | MinusAssign
| LeftShiftAssign | RightShiftAssign | AndAssign | XorAssign
| OrAssign | Comma | HashMark | HashMarkHashMark | LessColon
| ColonGreater | LessPercent | PrecentGreater | PrecentColon
| PercentColonPercentColon
;
| ANTLR | 3 | yingkitw/Project_CodeNet | tools/spt-generator/src/com/ibm/ai4code/parser/c_multi/C11Tokens.g4 | [
"Apache-2.0"
] |
/*
* This file is part of the X10 project (http://x10-lang.org).
*
* This file is licensed to You under the Eclipse Public License (EPL);
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at
* http://www.opensource.org/licenses/eclipse-1.0.php
*
* (C) Copyright IBM Corporation 2006-2014.
*/
import x10.io.Console;
import x10.io.File;
import x10.io.Marshal;
import x10.io.IOException;
import x10.util.OptionsParser;
import x10.util.Option;
import x10.util.Team;
/**
* An SPMD formulation of KMeans.
*
* For a highly optimized and scalable version of this benchmark see
* KMeans.x10 in the X10 Benchmarks (separate download from x10-lang.org)
*/
public class KMeansSPMD {
public static def printClusters (clusters:Rail[Float], dims:long) {
for (d in 0..(dims-1)) {
for (k in 0..(clusters.size/dims-1)) {
if (k>0)
Console.OUT.print(" ");
Console.OUT.print(clusters(k*dims+d).toString());
}
Console.OUT.println();
}
}
public static def main (args:Rail[String]) {here == Place.FIRST_PLACE } {
val opts = new OptionsParser(args, [
Option("q","quiet","just print time taken"),
Option("v","verbose","print out each iteration"),
Option("h","help","this information")
], [
Option("p","points","location of data file"),
Option("i","iterations","quit after this many iterations"),
Option("c","clusters","number of clusters to find"),
Option("d","dim","number of dimensions"),
Option("s","slices","factor by which to oversubscribe computational resources"),
Option("n","num","quantity of points")
]);
if (opts.filteredArgs().size!=0L) {
Console.ERR.println("Unexpected arguments: "+opts.filteredArgs());
Console.ERR.println("Use -h or --help.");
System.setExitCode(1n);
return;
}
if (opts("-h")) {
Console.OUT.println(opts.usage(""));
return;
}
val fname = opts("-p", "points.dat");
val num_clusters=opts("-c",4);
val num_slices=opts("-s",1);
val num_global_points=opts("-n", 2000);
val iterations=opts("-i",50);
val dim=opts("-d", 4);
val verbose = opts("-v");
val quiet = opts("-q");
if (!quiet)
Console.OUT.println("points: "+num_global_points+" clusters: "+num_clusters+" dim: "+dim);
// file is dimension-major
val file = new File(fname);
val fr = file.openRead();
val init_points = (long) => Float.fromIntBits(Marshal.INT.read(fr).reverseBytes());
val num_file_points = (file.size() / dim / 4) as Int;
val file_points = new Rail[Float](num_file_points*dim, init_points);
val team = Team.WORLD;
val num_slice_points = num_global_points / num_slices / Place.numPlaces();
finish {
for (h in Place.places()) at(h) async {
var compute_time:Long = 0;
var comm_time:Long = 0;
var barrier_time:Long = 0;
val host_clusters = new Rail[Float](num_clusters*dim, (i:long)=>file_points(i));
val host_cluster_counts = new Rail[Int](num_clusters);
for (slice in 0..(num_slices-1)) {
// carve out local portion of points (point-major)
val offset = (slice*Place.numPlaces() + here.id) * num_slice_points;
if (verbose)
Console.OUT.println(h.toString()+" gets "+offset+" len "+num_slice_points);
val init = (i:long) => {
val p=i%num_slice_points;
val d=i/num_slice_points;
return file_points(offset+p+d*num_file_points);
};
// these are pretty big so allocate up front
val host_points = new Rail[Float](num_slice_points*dim, init);
val host_nearest = new Rail[Float](num_slice_points);
val start_time = System.currentTimeMillis();
barrier_time -= System.nanoTime();
team.barrier();
barrier_time += System.nanoTime();
main_loop: for (iter in 0..(iterations-1)) {
//if (offset==0) Console.OUT.println("Iteration: "+iter);
val old_clusters = new Rail[Float](host_clusters.size);
Rail.copy(host_clusters, 0L, old_clusters, 0L, host_clusters.size);
host_clusters.clear();
host_cluster_counts.clear();
compute_time -= System.nanoTime();
for (p in 0..(num_slice_points-1)) {
var closest:Long = -1;
var closest_dist:Float = Float.MAX_VALUE;
for (k in 0..(num_clusters-1)) {
var dist : Float = 0;
for (d in 0..(dim-1)) {
val tmp = host_points(p+d*num_slice_points) - old_clusters(k*dim+d);
dist += tmp * tmp;
}
if (dist < closest_dist) {
closest_dist = dist;
closest = k;
}
}
for (d in 0..(dim-1)) {
host_clusters(closest*dim+d) += host_points(p+d*num_slice_points);
}
host_cluster_counts(closest)++;
}
compute_time += System.nanoTime();
comm_time -= System.nanoTime();
team.allreduce(host_clusters, 0L, host_clusters, 0L, host_clusters.size, Team.ADD);
team.allreduce(host_cluster_counts, 0L, host_cluster_counts, 0L, host_cluster_counts.size, Team.ADD);
comm_time += System.nanoTime();
for (k in 0..(num_clusters-1)) {
for (d in 0..(dim-1)) host_clusters(k*dim+d) /= host_cluster_counts(k);
}
if (offset==0 && verbose) {
Console.OUT.println("Iteration: "+iter);
printClusters(host_clusters,dim);
}
// TEST FOR CONVERGENCE
for (j in 0..(num_clusters*dim-1)) {
if (true/*||Math.abs(clusters_old(j)-host_clusters(j))>0.0001*/) continue main_loop;
}
break;
} // main_loop
} // slice
Console.OUT.printf("%d: computation %.3f s communication %.3f s (barrier %.3f s)\n",
here.id, compute_time/1E9, comm_time/1E9, barrier_time/1E9);
team.barrier();
if (here.id == 0) {
Console.OUT.println("\nFinal results:");
printClusters(host_clusters,dim);
}
} // async
} // finish
}
}
// vim: shiftwidth=4:tabstop=4:expandtab
| X10 | 5 | JavascriptID/sourcerer-app | src/test/resources/samples/langs/X10/KMeansSPMD.x10 | [
"MIT"
] |
/*
* Copyright (c) 2012 Martin Cerveny
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
* - Neither the name of the copyright holders nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**
* The application sends periodically unicast hello packet to all known destinations.
* Packet is send/received with multihop (MHSenderC/MHReceiverC).
* Routing to multihop engine is provided by babel routing protocol (BabelRoutingC).
* All destination is enumerated from routing table of babel routing protocol (BabelRoutingC.RoutingTable).
*
* @author Martin Cerveny
**/
configuration MHHelloAppC {
}
implementation {
components MainC, MHHelloC, LedsC;
components new TimerMilliC() as Timer;
MHHelloC->MainC.Boot;
MHHelloC.Timer->Timer;
MHHelloC.Leds->LedsC;
components SerialPrintfC;
components LocalIeeeEui64C;
MHHelloC.LocalIeeeEui64->LocalIeeeEui64C;
components ActiveMessageAddressC;
MHHelloC.ActiveMessageAddress->ActiveMessageAddressC;
// L4
components new MHSenderC(0x80+1);
MHHelloC.Packet->MHSenderC;
MHHelloC.AMPacket->MHSenderC;
MHHelloC.AMSend->MHSenderC;
components new MHReceiverC(0x80+1);
MHHelloC.Receive -> MHReceiverC;
// routing (need L3 packet access)
components BabelRoutingC;
components MultiHopC;
BabelRoutingC.RouteSelect<-MultiHopC.RouteSelect;
BabelRoutingC.Packet->MultiHopC.Packet;
BabelRoutingC.AMPacket->MultiHopC.AMPacket;
// other
MHHelloC.RoutingTable->BabelRoutingC.RoutingTable;
MHHelloC.MHControl->MultiHopC.SplitControl;
components ActiveMessageC;
MHHelloC.SubAMPacket -> ActiveMessageC.AMPacket;
}
| nesC | 4 | tgtakaoka/tinyos-prod | apps/MHHello/MHHelloAppC.nc | [
"BSD-3-Clause"
] |
%%%
%%% Authors:
%%% Leif Kornstaedt <kornstae@ps.uni-sb.de>
%%% Ralf Scheidhauer <scheidhr@ps.uni-sb.de>
%%%
%%% Copyright:
%%% Leif Kornstaedt, 1997-2001
%%% Ralf Scheidhauer, 1997
%%%
%%% Last change:
%%% $Date$ by $Author$
%%% $Revision$
%%%
%%% This file is part of Mozart, an implementation of Oz 3:
%%% http://www.mozart-oz.org
%%%
%%% See the file "LICENSE" or
%%% http://www.mozart-oz.org/LICENSE.html
%%% for information on usage and redistribution
%%% of this file, and for a DISCLAIMER OF ALL
%%% WARRANTIES.
%%%
%%
%% This file defines the procedure `Assemble' which takes a list of
%% machine instructions, applies peephole optimizations and returns
%% an AssemblerClass object. Its methods provide for the output,
%% feeding and loading of assembled machine code.
%%
%% Notes:
%% -- The code may contain no backward-only references to labels that
%% are not reached during a forward-scan through the code.
%% -- The definition(...) and definitionCopy(...) instructions differ
%% from the format expected by the assembler proper: An additional
%% argument stores the code for the definition's body. This way,
%% less garbage is produced during code generation.
%%
functor
import
\ifdef MOZART_1_ASSEMBLER
System(printName)
CompilerSupport
Builtins(getInfo)
\else
NewAssembler(assemble)
CompilerSupport
\endif
export
InternalAssemble
Assemble
define
\ifdef MOZART_1_ASSEMBLER
InstructionSizes = {CompilerSupport.getInstructionSizes}
local
local
IsUniqueName = CompilerSupport.isUniqueName
IsCopyableName = CompilerSupport.isCopyableName
IsCopyableProcedureRef = CompilerSupport.isCopyableProcedureRef
fun {ListToVirtualString Vs In FPToIntMap}
case Vs of V|Vr then
{ListToVirtualString Vr
In#' '#{MyValueToVirtualString V FPToIntMap} FPToIntMap}
[] nil then In
end
end
fun {TupleSub I N In Value FPToIntMap}
if I =< N then
{TupleSub I + 1 N
In#' '#{MyValueToVirtualString Value.I FPToIntMap}
Value FPToIntMap}
else In
end
end
fun {TupleToVirtualString Value FPToIntMap}
{TupleSub 2 {Width Value}
{Label Value}#'('#{MyValueToVirtualString Value.1 FPToIntMap}
Value FPToIntMap}#')'
end
fun {MyValueToVirtualString Val FPToIntMap}
if {IsName Val} then
case Val of true then 'true'
[] false then 'false'
[] unit then 'unit'
elseif {IsUniqueName Val} then
%--** these only work if the name's print name is friendly
%--** and all names' print names are distinct
'<U: '#{System.printName Val}#'>'
elseif {IsCopyableName Val} then
'<M: '#{System.printName Val}#'>'
else
'<N: '#{System.printName Val}#'>'
end
elseif {IsAtom Val} then
%% the atom must not be mistaken for a token
if {HasFeature InstructionSizes Val} then '\''#Val#'\''
else
case Val of lbl then '\'lbl\''
[] pid then '\'pid\''
[] ht then '\'ht\''
[] onScalar then '\'onScalar\''
[] onRecord then '\'onRecord\''
[] cmi then '\'cmi\''
[] pos then '\'pos\''
else
{Value.toVirtualString Val 0 0}
end
end
elseif {ForeignPointer.is Val} then I in
%% foreign pointers are assigned increasing integers
%% in order of appearance so that diffs are sensible
I = {ForeignPointer.toInt Val}
if {IsCopyableProcedureRef Val} then '<Q: '
else '<P: '
end#
case {Dictionary.condGet FPToIntMap I unit} of unit then N in
N = {Dictionary.get FPToIntMap 0} + 1
{Dictionary.put FPToIntMap 0 N}
{Dictionary.put FPToIntMap I N}
N
elseof V then
V
end#'>'
elsecase Val of V1|Vr then
{ListToVirtualString Vr
'['#{MyValueToVirtualString V1 FPToIntMap}
FPToIntMap}#']'
[] V1#V2 then
{MyValueToVirtualString V1 FPToIntMap}#"#"#
{MyValueToVirtualString V2 FPToIntMap}
elseif {IsTuple Val} then
{TupleToVirtualString Val FPToIntMap}
else
{Value.toVirtualString Val 1000 1000}
end
end
in
fun {InstrToVirtualString Instr FPToIntMap}
if {IsAtom Instr} then
Instr
elsecase Instr of putConstant(C R) then
'putConstant('#{Value.toVirtualString C 1000 1000}#' '#
{MyValueToVirtualString R FPToIntMap}#')'
[] setConstant(C R) then
'setConstant('#{Value.toVirtualString C 1000 1000}#' '#
{MyValueToVirtualString R FPToIntMap}#')'
else
{TupleToVirtualString Instr FPToIntMap}
end
end
end
in
class AssemblerClass
prop final
attr InstrsHd InstrsTl LabelDict Size
feat Profile controlFlowInfo
meth init(ProfileSwitch ControlFlowInfoSwitch)
InstrsHd <- 'skip'|@InstrsTl
LabelDict <- {NewDictionary}
Size <- InstructionSizes.'skip'
%% Code must not start at address 0, since this is interpreted as
%% NOCODE by the emulator - thus the dummy instruction 'skip'.
self.Profile = ProfileSwitch
self.controlFlowInfo = ControlFlowInfoSwitch
end
meth newLabel(?L)
L = {NewName}
{Dictionary.put @LabelDict L _}
end
meth declareLabel(L)
if {Dictionary.member @LabelDict L} then skip
else {Dictionary.put @LabelDict L _}
end
end
meth isLabelUsed(I $)
{Dictionary.member @LabelDict I}
end
meth setLabel(L)
if {Dictionary.member @LabelDict L} then
{Dictionary.get @LabelDict L} = @Size
else
{Dictionary.put @LabelDict L @Size}
end
end
meth checkLabels()
{ForAll {Dictionary.entries @LabelDict}
proc {$ L#V}
if {IsFree V} then
{Exception.raiseError compiler(assembler undeclaredLabel L)}
end
end}
end
meth append(Instr) NewTl in
case Instr
of definition(_ L _ _ _) then AssemblerClass, declareLabel(L)
[] definitionCopy(_ L _ _ _) then AssemblerClass, declareLabel(L)
[] endDefinition(L) then AssemblerClass, declareLabel(L)
[] branch(L) then AssemblerClass, declareLabel(L)
[] exHandler(L) then AssemblerClass, declareLabel(L)
[] testBI(_ _ L) then AssemblerClass, declareLabel(L)
[] testLT(_ _ _ L) then
AssemblerClass, declareLabel(L)
[] testLE(_ _ _ L) then
AssemblerClass, declareLabel(L)
[] testLiteral(_ _ L) then
AssemblerClass, declareLabel(L)
[] testNumber(_ _ L) then
AssemblerClass, declareLabel(L)
[] testBool(_ L1 L2) then
AssemblerClass, declareLabel(L1)
AssemblerClass, declareLabel(L2)
[] testRecord(_ _ _ L) then
AssemblerClass, declareLabel(L)
[] testList(_ L) then
AssemblerClass, declareLabel(L)
[] match(_ HT) then ht(L Cases) = HT in
AssemblerClass, declareLabel(L)
{ForAll Cases
proc {$ Case}
case Case
of onScalar(_ L) then AssemblerClass, declareLabel(L)
[] onRecord(_ _ L) then AssemblerClass, declareLabel(L)
end
end}
[] lockThread(L _) then AssemblerClass, declareLabel(L)
else skip
end
@InstrsTl = Instr|NewTl
InstrsTl <- NewTl
Size <- @Size + InstructionSizes.{Label Instr}
case Instr of definition(_ _ _ _ _) andthen self.Profile then
AssemblerClass, append(profileProc)
[] definitionCopy(_ _ _ _ _) andthen self.Profile then
AssemblerClass, append(profileProc)
else skip
end
end
meth output($) AddrToLabelMap FPToIntMap in
AssemblerClass, MarkEnd()
AddrToLabelMap = {NewDictionary}
FPToIntMap = {NewDictionary}
{Dictionary.put FPToIntMap 0 0}
{ForAll {Dictionary.entries @LabelDict}
proc {$ Label#Addr}
if {IsDet Addr} then
{Dictionary.put AddrToLabelMap Addr Label}
end
end}
'%% Code Size:\n'#@Size#' % words\n'#
AssemblerClass, OutputSub(@InstrsHd AddrToLabelMap FPToIntMap 0 $)
end
meth OutputSub(Instrs AddrToLabelMap FPToIntMap Addr ?VS)
case Instrs of Instr|Ir then LabelVS NewInstr VSRest NewAddr in
LabelVS = if {Dictionary.member AddrToLabelMap Addr} then
'lbl('#Addr#')'#
if Addr < 100 then '\t\t' else '\t' end
else '\t\t'
end
AssemblerClass, TranslateInstrLabels(Instr ?NewInstr)
VS = (LabelVS#{InstrToVirtualString NewInstr FPToIntMap}#'\n'#
VSRest)
NewAddr = Addr + InstructionSizes.{Label Instr}
AssemblerClass, OutputSub(Ir AddrToLabelMap FPToIntMap NewAddr
?VSRest)
[] nil then
VS = ""
end
end
meth load(Globals $)
AssemblerClass, MarkEnd()
{CompilerSupport.storeInstructions
@Size Globals @InstrsHd @LabelDict}
end
meth MarkEnd()
@InstrsTl = nil
end
meth TranslateInstrLabels(Instr $)
case Instr of definition(X1 L X2 X3 X4) then A in
A = {Dictionary.get @LabelDict L}
definition(X1 A X2 X3 X4)
[] definitionCopy(X1 L X2 X3 X4) then A in
A = {Dictionary.get @LabelDict L}
definitionCopy(X1 A X2 X3 X4)
[] endDefinition(L) then A in
A = {Dictionary.get @LabelDict L}
endDefinition(A)
[] branch(L) then A in
A = {Dictionary.get @LabelDict L}
branch(A)
[] exHandler(L) then A in
A = {Dictionary.get @LabelDict L}
exHandler(A)
[] testBI(X1 X2 L) then A in
A = {Dictionary.get @LabelDict L}
testBI(X1 X2 A)
[] testLT(X1 X2 X3 L) then A in
A = {Dictionary.get @LabelDict L}
testLT(X1 X2 X3 A)
[] testLE(X1 X2 X3 L) then A in
A = {Dictionary.get @LabelDict L}
testLE(X1 X2 X3 A)
[] testLiteral(X1 X2 L) then A in
A = {Dictionary.get @LabelDict L}
testLiteral(X1 X2 A)
[] testNumber(X1 X2 L) then A in
A = {Dictionary.get @LabelDict L}
testNumber(X1 X2 A)
[] testRecord(X1 X2 X3 L) then A in
A = {Dictionary.get @LabelDict L}
testRecord(X1 X2 X3 A)
[] testList(X1 L) then A in
A = {Dictionary.get @LabelDict L}
testList(X1 A)
[] testBool(X1 L1 L2) then A1 A2 in
A1 = {Dictionary.get @LabelDict L1}
A2 = {Dictionary.get @LabelDict L2}
testBool(X1 A1 A2)
[] match(X HT) then ht(L Cases) = HT A NewCases in
A = {Dictionary.get @LabelDict L}
NewCases = {Map Cases
fun {$ Case}
case Case of onScalar(X L) then A in
A = {Dictionary.get @LabelDict L}
onScalar(X A)
[] onRecord(X1 X2 L) then A in
A = {Dictionary.get @LabelDict L}
onRecord(X1 X2 A)
end
end}
match(X ht(A NewCases))
[] lockThread(L X) then A in
A = {Dictionary.get @LabelDict L}
lockThread(A X)
else
Instr
end
end
end
end
fun {RecordArityWidth RecordArity}
if {IsInt RecordArity} then RecordArity
else {Length RecordArity}
end
end
proc {GetClears Instrs ?Clears ?Rest}
case Instrs of I1|Ir then
case I1 of clear(_) then Cr in
Clears = I1|Cr
{GetClears Ir ?Cr ?Rest}
else
Clears = nil
Rest = Instrs
end
[] nil then
Clears = nil
Rest = nil
end
end
proc {SetVoids Instrs InI ?OutI ?Rest}
case Instrs of I1|Ir then
case I1 of setVoid(J) then
{SetVoids Ir InI + J ?OutI ?Rest}
else
OutI = InI
Rest = Instrs
end
[] nil then
OutI = InI
Rest = nil
end
end
proc {UnifyVoids Instrs InI ?OutI ?Rest}
case Instrs of I1|Ir then
case I1 of unifyVoid(J) then
{UnifyVoids Ir InI + J ?OutI ?Rest}
else
OutI = InI
Rest = Instrs
end
[] nil then
OutI = InI
Rest = nil
end
end
proc {GetVoids Instrs InI ?OutI ?Rest}
case Instrs of I1|Ir then
case I1 of getVoid(J) then
{GetVoids Ir InI + J ?OutI ?Rest}
else
OutI = InI
Rest = Instrs
end
[] nil then
OutI = InI
Rest = nil
end
end
proc {MakeDeAllocate I Assembler}
case I of 0 then skip
[] 1 then {Assembler append(deAllocateL1)}
[] 2 then {Assembler append(deAllocateL2)}
[] 3 then {Assembler append(deAllocateL3)}
[] 4 then {Assembler append(deAllocateL4)}
[] 5 then {Assembler append(deAllocateL5)}
[] 6 then {Assembler append(deAllocateL6)}
[] 7 then {Assembler append(deAllocateL7)}
[] 8 then {Assembler append(deAllocateL8)}
[] 9 then {Assembler append(deAllocateL9)}
[] 10 then {Assembler append(deAllocateL10)}
else {Assembler append(deAllocateL)}
end
end
fun {SkipDeadCode Instrs Assembler}
case Instrs of I1|Rest then
case I1 of lbl(I) andthen {Assembler isLabelUsed(I $)} then Instrs
[] endDefinition(I) andthen {Assembler isLabelUsed(I $)} then Instrs
[] globalVarname(_) then Instrs
[] localVarname(_) then Instrs
else {SkipDeadCode Rest Assembler}
end
[] nil then nil
end
end
proc {EliminateDeadCode Instrs Assembler}
{Peephole {SkipDeadCode Instrs Assembler} Assembler}
end
fun {HasLabel Instrs L}
case Instrs of lbl(!L)|_ then true
[] lbl(_)|Rest then {HasLabel Rest L}
else false
end
end
proc {Peephole Instrs Assembler}
case Instrs of lbl(I)|Rest then
{Assembler setLabel(I)}
{Peephole Rest Assembler}
[] definition(Register Label PredId ProcedureRef GRegRef Code)|Rest then
{Assembler
append(definition(Register Label PredId ProcedureRef GRegRef))}
{Peephole Code Assembler}
{Peephole Rest Assembler}
[] definitionCopy(Register Label PredId ProcedureRef GRegRef Code)|Rest
then
{Assembler
append(definitionCopy(Register Label PredId ProcedureRef GRegRef))}
{Peephole Code Assembler}
{Peephole Rest Assembler}
[] clear(_)|_ then Clears Rest in
{GetClears Instrs ?Clears ?Rest}
case Rest of deAllocateL(_)|_ then skip
else
{ForAll Clears
proc {$ clear(Y)}
{Assembler append(clear(Y))}
end}
end
{Peephole Rest Assembler}
[] move(X1=x(_) Y1=y(_))|move(X2=x(_) Y2=y(_))|Rest then
{Assembler append(moveMove(X1 Y1 X2 Y2))}
{Peephole Rest Assembler}
[] move(Y1=y(_) X1=x(_))|move(Y2=y(_) X2=x(_))|Rest then
{Assembler append(moveMove(Y1 X1 Y2 X2))}
{Peephole Rest Assembler}
[] move(X1=x(_) Y1=y(_))|move(Y2=y(_) X2=x(_))|Rest then
{Assembler append(moveMove(X1 Y1 Y2 X2))}
{Peephole Rest Assembler}
[] createVariable(R)|move(R X=x(_))|Rest then
{Peephole createVariableMove(R X)|Rest Assembler}
[] createVariable(X=x(_))|move(X R)|Rest then
{Peephole createVariableMove(R X)|Rest Assembler}
[] putRecord('|' 2 R)|Rest then
{Assembler append(putList(R))}
{Peephole Rest Assembler}
[] setVoid(I)|Rest then OutI Rest1 in
{SetVoids Rest I ?OutI ?Rest1}
{Assembler append(setVoid(OutI))}
{Peephole Rest1 Assembler}
[] getRecord('|' 2 X1=x(_))|
unifyValue(X2=x(_))|unifyVariable(X3=x(_))|Rest
then
{Assembler append(getListValVar(X1 X2 X3))}
{Peephole Rest Assembler}
[] getRecord('|' 2 R)|Rest then
{Assembler append(getList(R))}
{Peephole Rest Assembler}
[] unifyValue(R1)|unifyVariable(R2)|Rest then
{Assembler append(unifyValVar(R1 R2))}
{Peephole Rest Assembler}
[] unifyVoid(I)|Rest then OutI Rest1 in
{UnifyVoids Rest I ?OutI ?Rest1}
{Assembler append(unifyVoid(OutI))}
{Peephole Rest1 Assembler}
[] (allocateL(I)=I1)|Rest then
case I of 0 then skip
[] 1 then {Assembler append(allocateL1)}
[] 2 then {Assembler append(allocateL2)}
[] 3 then {Assembler append(allocateL3)}
[] 4 then {Assembler append(allocateL4)}
[] 5 then {Assembler append(allocateL5)}
[] 6 then {Assembler append(allocateL6)}
[] 7 then {Assembler append(allocateL7)}
[] 8 then {Assembler append(allocateL8)}
[] 9 then {Assembler append(allocateL9)}
[] 10 then {Assembler append(allocateL10)}
else {Assembler append(I1)}
end
{Peephole Rest Assembler}
[] deAllocateL(I)|return|(Rest=lbl(_)|deAllocateL(J)|return|_) andthen
I == J then
{Peephole Rest Assembler}
[] deAllocateL(I)|Rest then
{MakeDeAllocate I Assembler}
{Peephole Rest Assembler}
[] 'skip'|Rest then
{Peephole Rest Assembler}
[] branch(L)|Rest then Rest1 in
{Assembler declareLabel(L)}
Rest1 = {SkipDeadCode Rest Assembler}
case Rest1 of lbl(!L)|_ then skip
else {Assembler append(branch(L))}
end
{Peephole Rest1 Assembler}
[] return|Rest then
{Assembler append(return)}
{EliminateDeadCode Rest Assembler}
[] (callBI(Builtinname Args)=I1)|Rest
andthen {Not Assembler.controlFlowInfo}
then BIInfo in
BIInfo = {Builtins.getInfo Builtinname}
if {CondSelect BIInfo doesNotReturn false} then
case Rest of deAllocateL(I)|return|_ then
{MakeDeAllocate I Assembler}
else skip
end
end
case Builtinname of 'Int.\'+1\'' then [X1]#[X2] = Args in
{Assembler append(inlinePlus1(X1 X2))}
[] 'Int.\'-1\'' then [X1]#[X2] = Args in
{Assembler append(inlineMinus1(X1 X2))}
[] 'Number.\'+\'' then [X1 X2]#[X3] = Args in
{Assembler append(inlinePlus(X1 X2 X3))}
[] 'Number.\'-\'' then [X1 X2]#[X3] = Args in
{Assembler append(inlineMinus(X1 X2 X3))}
[] 'Value.\'>\'' then [X1 X2]#Out = Args in
{Assembler append(callBI('Value.\'<\'' [X2 X1]#Out))}
[] 'Value.\'>=\'' then [X1 X2]#Out = Args in
{Assembler append(callBI('Value.\'=<\'' [X2 X1]#Out))}
else
{Assembler append(I1)}
end
%--** this does not work with current liveness analysis
%--** if {CondSelect BIInfo doesNotReturn false} then
%--** {EliminateDeadCode Rest Assembler}
%--** else
{Peephole Rest Assembler}
%--** end
[] callGlobal(G ArityAndIsTail)|deAllocateL(I)|return|Rest
andthen ArityAndIsTail mod 2 == 0
then
{MakeDeAllocate I Assembler}
{Assembler append(callGlobal(G ArityAndIsTail + 1))}
{EliminateDeadCode Rest Assembler}
[] callMethod(CMI 0)|deAllocateL(I)|return|Rest then
{MakeDeAllocate I Assembler}
{Assembler append(callMethod({AdjoinAt CMI 3 true} 0))}
{EliminateDeadCode Rest Assembler}
[] call(R Arity)|deAllocateL(I)|return|Rest then NewR in
case R of y(_) then
{Assembler append(move(R NewR=x(Arity)))}
else
NewR = R
end
{MakeDeAllocate I Assembler}
{Assembler append(tailCall(NewR Arity))}
{EliminateDeadCode Rest Assembler}
[] callProcedureRef(ProcedureRef ArityAndIsTail)|
deAllocateL(I)|return|Rest andthen ArityAndIsTail mod 2 == 0
then
{MakeDeAllocate I Assembler}
{Assembler append(callProcedureRef(ProcedureRef ArityAndIsTail + 1))}
{EliminateDeadCode Rest Assembler}
[] callConstant(Abstraction ArityAndIsTail)|
deAllocateL(I)|return|Rest
andthen {IsDet Abstraction}
andthen {IsProcedure Abstraction}
andthen ArityAndIsTail mod 2 == 0
then
{MakeDeAllocate I Assembler}
{Assembler append(callConstant(Abstraction ArityAndIsTail + 1))}
{EliminateDeadCode Rest Assembler}
[] sendMsg(Literal R RecordArity Cache)|deAllocateL(I)|return|Rest
then NewR in
case R of y(_) then
NewR = x({RecordArityWidth RecordArity})
{Assembler append(move(R NewR))}
else
NewR = R
end
{MakeDeAllocate I Assembler}
{Assembler append(tailSendMsg(Literal NewR RecordArity Cache))}
{EliminateDeadCode Rest Assembler}
[] (testBI(Builtinname Args L1)=I1)|Rest then NewInstrs in
case Rest of branch(L2)|NewRest then BIInfo in
BIInfo = {Builtins.getInfo Builtinname}
case {CondSelect BIInfo negated unit} of unit then skip
elseof NegatedBuiltinname then
NewInstrs = (testBI(NegatedBuiltinname Args L2)|
'skip'|branch(L1)|NewRest)
end
else skip
end
if {IsDet NewInstrs} then
{Peephole NewInstrs Assembler}
else
case Builtinname of 'Value.\'<\'' then [X1 X2]#[X3] = Args in
{Assembler append(testLT(X1 X2 X3 L1))}
[] 'Value.\'=<\'' then [X1 X2]#[X3] = Args in
{Assembler append(testLE(X1 X2 X3 L1))}
[] 'Value.\'>=\''then [X1 X2]#[X3] = Args in
{Assembler append(testLE(X2 X1 X3 L1))}
[] 'Value.\'>\'' then [X1 X2]#[X3] = Args in
{Assembler append(testLT(X2 X1 X3 L1))}
else
{Assembler append(I1)}
end
{Peephole Rest Assembler}
end
[] testRecord(R '|' 2 L)|Rest then
{Assembler append(testList(R L))}
{Peephole Rest Assembler}
[] match(R ht(ElseL [onScalar(true TrueL) onScalar(false FalseL)]))|Rest
andthen {HasLabel Rest TrueL}
then
{Assembler append(testBool(R FalseL ElseL))}
{Peephole Rest Assembler}
[] match(R ht(ElseL [onScalar(false FalseL) onScalar(true TrueL)]))|Rest
andthen {HasLabel Rest TrueL}
then
{Assembler append(testBool(R FalseL ElseL))}
{Peephole Rest Assembler}
[] match(R ht(ElseL [onScalar(X L)]))|Rest andthen {HasLabel Rest L} then
if {IsNumber X} then
{Assembler append(testNumber(R X ElseL))}
else
{Assembler append(testLiteral(R X ElseL))}
end
{Peephole Rest Assembler}
[] match(R ht(ElseL [onRecord(Label RecordArity L)]))|Rest
andthen {HasLabel Rest L}
then
case Label#RecordArity of '|'#2 then
{Assembler append(testList(R ElseL))}
else
{Assembler append(testRecord(R Label RecordArity ElseL))}
end
{Peephole Rest Assembler}
[] (match(_ _)=I1)|Rest then
{Assembler append(I1)}
{EliminateDeadCode Rest Assembler}
[] getVariable(R1)|getVariable(R2)|Rest then
{Assembler append(getVarVar(R1 R2))}
{Peephole Rest Assembler}
[] getVoid(I)|Rest then OutI Rest1 in
{GetVoids Rest I ?OutI ?Rest1}
case Rest1 of getVariable(_)|_ then
{Assembler append(getVoid(OutI))}
else skip
end
{Peephole Rest1 Assembler}
[] deconsCall(R)|deAllocateL(I)|return|Rest then NewR in
case R of y(_) then
{Assembler append(move(R NewR=x(2)))}
else
NewR = R
end
{MakeDeAllocate I Assembler}
{Assembler append(tailDeconsCall(NewR))}
{EliminateDeadCode Rest Assembler}
[] consCall(R Arity)|deAllocateL(I)|return|Rest then NewR in
case R of y(_) then
{Assembler append(move(R NewR=x(Arity)))}
else
NewR = R
end
{MakeDeAllocate I Assembler}
{Assembler append(tailConsCall(NewR Arity))}
{EliminateDeadCode Rest Assembler}
[] I1|Rest then
{Assembler append(I1)}
{Peephole Rest Assembler}
[] nil then skip
end
end
proc {InternalAssemble Code Switches ?Assembler}
ProfileSwitch = {CondSelect Switches profile false}
ControlFlowInfoSwitch = {CondSelect Switches controlflowinfo false}
Verify = {CondSelect Switches verify true}
DoPeephole = {CondSelect Switches peephole true}
in
Assembler = {New AssemblerClass
init(ProfileSwitch ControlFlowInfoSwitch)}
if DoPeephole then
{Peephole Code Assembler}
else
{ForAll Code
proc {$ Instr}
case Instr of lbl(I) then
{Assembler setLabel(I)}
else
{Assembler append(Instr)}
end
end}
end
if Verify then
{Assembler checkLabels()}
end
end
proc {Assemble Code Globals Switches ?P ?VS}
Assembler = {InternalAssemble Code Switches}
in
{Assembler load(Globals ?P)}
VS = {ByNeedFuture fun {$} {Assembler output($)} end}
end
\else
class CompatAssemblerClass
attr
codeAreas
mainCodeArea
meth init()
codeAreas := nil
mainCodeArea := unit
end
meth addCodeArea(CodeArea VS)
codeAreas := (CodeArea#VS) | @codeAreas
end
meth setMainCodeArea(CodeArea)
mainCodeArea := CodeArea
end
meth load(Globals ?P)
P = {CompilerSupport.newAbstraction @mainCodeArea Globals}
end
meth output(?VS)
VS = {FoldL @codeAreas
fun {$ Prev _#VS}
{Wait VS}
Prev#'\n'#VS
end nil}
end
end
% Magical conversion function that turns old code into new code
fun {ComputeXCountInOldCode Code MaxXCount}
case Code
of Head|Tail then
NewMaxXCount = {Record.foldL Head
fun {$ Prev Arg}
case Arg of x(I) then {Max Prev I+1}
else Prev
end
end MaxXCount}
in
{ComputeXCountInOldCode Tail NewMaxXCount}
[] nil then
MaxXCount
end
end
fun {ExtractArityAndIsTail ArityAndIsTail}
(ArityAndIsTail div 2) # (ArityAndIsTail mod 2 \= 0)
end
fun {OldCodeToNewCode ProcArity Code AssembleInner}
UserXCount = {ByNeedFuture
fun {$} {ComputeXCountInOldCode Code ProcArity} end}
fun {MakeInitGRegs SourceRegs Rest}
case SourceRegs
of SrcReg|SrcRegTail then
arrayFill(SrcReg) | {MakeInitGRegs SrcRegTail Rest}
[] nil then
{Loop Rest}
end
end
fun {TransformMatchItem Item}
case Item
of onScalar(Value Lbl) then
Value#Lbl
[] onRecord(Label WidthOrArity Lbl) then
Arity = if {IsInt WidthOrArity} then
{List.number 1 WidthOrArity 1}
else
WidthOrArity
end
ArityAndCaptures = {List.mapInd Arity
fun {$ Index Feature}
Feature #
{CompilerSupport.newPatMatCapture
UserXCount + Index - 1}
end}
in
{List.toRecord Label ArityAndCaptures} # Lbl
end
end
fun {TransformMatch R ht(ElseLbl HashList) Rest}
NewHashList = {Map HashList TransformMatchItem}
NewHashTable = {List.toTuple '#' NewHashList}
in
patternMatch(R k(NewHashTable)) | branch(ElseLbl) | {Loop Rest}
end
fun {TransformPatMatGets Code NextXIndex}
case Code
of getVariable(R) | Rest then
move(x(NextXIndex) R) | {TransformPatMatGets Rest NextXIndex+1}
[] getVarVar(R1 R2) | Rest then
move(x(NextXIndex) R1) | move(x(NextXIndex+1) R2) |
{TransformPatMatGets Rest NextXIndex+2}
[] getVoid(N) | Rest then
{TransformPatMatGets Rest NextXIndex+N}
else
{Loop Code}
end
end
fun {Loop Code}
case Code
% allocateL / deAllocateL become allocateY / nothing
of allocateL(I) | Rest then
allocateY(I) | {Loop Rest}
[] deAllocateL(_) | Rest then
{Loop Rest}
% createVariable and createVariableMove are renamed
[] createVariable(R) | Rest then
createVar(R) | {Loop Rest}
[] createVariableMove(R1 R2) | Rest then
createVarMove(R1 R2) | {Loop Rest}
% exHandler and popEx are renamed
[] exHandler(Lbl) | Rest then
setupExceptionHandler(Lbl) | {Loop Rest}
[] popEx | Rest then
popExceptionHandler | {Loop Rest}
% patch for putConstant followed by setValue/unifyValue (TODO unsafe!)
% IMO it's a bug in the codegen in the first place
[] putConstant(Value R1) | setValue(R2) | Rest andthen R1 == R2 then
{Loop setConstant(Value) | Rest}
[] putConstant(Value R1) | unifyValue(R2) | Rest andthen R1 == R2 then
{Loop unifyConstant(Value) | Rest}
% putConstant(Value Reg) become moveKX / moveKY
[] putConstant(Value R) | Rest then
move(k(Value) R) | {Loop Rest}
% putList and putRecord become createConsStore and Co.
[] putRecord('|' 2 Dest) | Rest then
createConsStore(Dest) | {Loop Rest}
[] putList(Dest) | Rest then
createConsStore(Dest) | {Loop Rest}
[] putRecord(Label WidthOrArity Dest) | Rest then
if {IsInt WidthOrArity} then
% Tuple
Width = WidthOrArity
in
createTupleStore(k(Label) Width Dest) | {Loop Rest}
else
% Record
Arity = {CompilerSupport.makeArity Label WidthOrArity}
Width = {Length WidthOrArity}
in
createRecordStore(k(Arity) Width Dest) | {Loop Rest}
end
% setThings become arrayFillThings
[] setConstant(Value) | Rest then
arrayFill(k(Value)) | {Loop Rest}
[] setValue(R) | Rest then
arrayFill(R) | {Loop Rest}
[] setVariable(R) | Rest then
arrayFillNewVar(R) | {Loop Rest}
[] setVoid(N) | Rest then
arrayFillNewVars(N) | {Loop Rest}
% getNumber(I R) and getLiteral(L R) become unifyRK
[] getNumber(I R) | Rest then
unify(R k(I)) | {Loop Rest}
[] getLiteral(L R) | Rest then
unify(R k(L)) | {Loop Rest}
% getList and getRecord become createConsUnify and Co.
[] getRecord('|' 2 Dest) | Rest then
createConsUnify(Dest) | {Loop Rest}
[] getList(Dest) | Rest then
createConsUnify(Dest) | {Loop Rest}
[] getRecord(Label WidthOrArity Dest) | Rest then
if {IsInt WidthOrArity} then
% Tuple
Width = WidthOrArity
in
createTupleUnify(k(Label) Width Dest) | {Loop Rest}
else
% Record
Arity = {CompilerSupport.makeArity Label WidthOrArity}
Width = {Length WidthOrArity}
in
createRecordUnify(k(Arity) Width Dest) | {Loop Rest}
end
% getListValVar is desugared for now
[] getListValVar(D R1 R2) | Rest then
createConsUnify(D) | arrayFill(R1) | arrayFillNewVar(R2) |
{Loop Rest}
% unifyThings become arrayFillThings
[] unifyConstant(Value) | Rest then
arrayFill(k(Value)) | {Loop Rest}
[] unifyNumber(Value) | Rest then
arrayFill(k(Value)) | {Loop Rest}
[] unifyLiteral(Value) | Rest then
arrayFill(k(Value)) | {Loop Rest}
[] unifyValue(R) | Rest then
arrayFill(R) | {Loop Rest}
[] unifyVariable(R) | Rest then
arrayFillNewVar(R) | {Loop Rest}
[] unifyValVar(R1 R2) | Rest then
arrayFill(R1) | arrayFillNewVar(R2) | {Loop Rest}
[] unifyVoid(N) | Rest then
arrayFillNewVars(N) | {Loop Rest}
% callBI and inlineDot become callBuiltin
[] callBI(Builtin InArgs#OutArgs) | Rest then
callBuiltin(k(Builtin) {Append InArgs OutArgs}) | {Loop Rest}
[] inlineDot(R1=x(_) I R2=x(_) cache) | Rest then
move(k(I) x(UserXCount)) |
callBuiltin(k(Value.'.') [R1 x(UserXCount) R2]) |
{Loop Rest}
% callConstant becomes callK
[] callConstant(P ArityAndIsTail) | Rest then
Arity # IsTail = {ExtractArityAndIsTail ArityAndIsTail}
in
if IsTail then
tailCall(k(P) Arity)
else
call(k(P) Arity)
end | {Loop Rest}
% callGlobal becomes call
[] callGlobal(R=g(_) ArityAndIsTail) | Rest then
Arity # IsTail = {ExtractArityAndIsTail ArityAndIsTail}
in
if IsTail then
tailCall(R Arity)
else
call(R Arity)
end | {Loop Rest}
% sendMsg and tailSendMsg change format
[] sendMsg(Label ObjR ArityOrWidth _) | Rest then
if {IsInt ArityOrWidth} then
sendMsg(ObjR k(Label) ArityOrWidth)
else
sendMsg(ObjR
k({CompilerSupport.makeArity Label ArityOrWidth})
{Length ArityOrWidth})
end | {Loop Rest}
[] tailSendMsg(Label ObjR ArityOrWidth _) | Rest then
if {IsInt ArityOrWidth} then
tailSendMsg(ObjR k(Label) ArityOrWidth)
else
tailSendMsg(ObjR
k({CompilerSupport.makeArity Label ArityOrWidth})
{Length ArityOrWidth})
end | {Loop Rest}
% testBool(R L1 L2) becomes condBranch(R L1 L2) | lbl(L3)
[] testBool(R=x(_) L1 L2) | Rest then
condBranch(R L1 L2) | {Loop Rest}
[] testBool(R L1 L2) | Rest then
{Loop move(R x(UserXCount)) | testBool(x(UserXCount) L1 L2) | Rest}
% match and other testX become a deep pattern matching
[] match(R HashTable) | Rest then
{TransformMatch R HashTable Rest}
% Following pattern matching statements, getVariable fetches a capture
[] getVariable(_) | _ then {TransformPatMatGets Code UserXCount}
[] getVarVar(_ _) | _ then {TransformPatMatGets Code UserXCount}
[] getVoid(_) | _ then {TransformPatMatGets Code UserXCount}
% definition + endDefinition become createAbstraction
[] definition(Dest _ pid(Name Arity Pos _ _)
unit GRegRef InnerCode) |
endDefinition(_) | Rest then
DebugData = case Pos
of pos(F L C) then d(file:F line:L column:C)
else unit
end
InnerCodeArea = {AssembleInner Arity InnerCode Name DebugData}
GCount = {Length GRegRef}
in
createAbstractionStore(k(InnerCodeArea) GCount Dest) |
{MakeInitGRegs GRegRef Rest}
% other things are kept as is
[] H|Rest then
H|{Loop Rest}
[] nil then
nil
end
end
in
{Loop Code}
end
proc {InternalAssemble Code Switches ?Assembler}
!Assembler = {New CompatAssemblerClass init()}
proc {AssembleInner Arity Code PrintName DebugData ?CodeArea}
NewCode = {OldCodeToNewCode Arity Code AssembleInner}
VS
in
{NewAssembler.assemble Arity NewCode PrintName DebugData Switches
?CodeArea ?VS}
{Assembler addCodeArea(CodeArea VS)}
end
CodeArea = {AssembleInner 0 Code '' unit}
in
{Assembler setMainCodeArea(CodeArea)}
end
proc {Assemble Code Globals Switches ?P ?VS}
Assembler = {InternalAssemble Code Switches}
in
{Assembler load(Globals ?P)}
VS = {ByNeedFuture fun {$} {Assembler output($)} end}
end
\endif
end
| Oz | 5 | Ahzed11/mozart2 | lib/compiler/Assembler.oz | [
"BSD-2-Clause"
] |
{
"tag_name": "v1.6.0",
"name": "The Zenobius release",
"draft": true,
"prerelease": false,
"body": $changelog
} | JSONiq | 1 | zwergziege/tlaplus | general/docs/changelogs/gh-1_6_0.jq | [
"MIT"
] |
/*---------------------------------------------------------------------------------------------
* Copyright (c) Microsoft Corporation. All rights reserved.
* Licensed under the MIT License. See License.txt in the project root for license information.
*--------------------------------------------------------------------------------------------*/
import { localize } from 'vs/nls';
import { IWorkingCopyHistoryService } from 'vs/workbench/services/workingCopy/common/workingCopyHistory';
import { ServicesAccessor } from 'vs/editor/browser/editorExtensions';
import { registerAction2, Action2, MenuId } from 'vs/platform/actions/common/actions';
import { LOCAL_HISTORY_MENU_CONTEXT_KEY } from 'vs/workbench/contrib/localHistory/browser/localHistory';
import { findLocalHistoryEntry, ITimelineCommandArgument } from 'vs/workbench/contrib/localHistory/browser/localHistoryCommands';
import { isMacintosh, isWindows } from 'vs/base/common/platform';
import { INativeHostService } from 'vs/platform/native/electron-sandbox/native';
import { ContextKeyExpr } from 'vs/platform/contextkey/common/contextkey';
import { Schemas } from 'vs/base/common/network';
import { ResourceContextKey } from 'vs/workbench/common/contextkeys';
//#region Delete
registerAction2(class extends Action2 {
constructor() {
super({
id: 'workbench.action.localHistory.revealInOS',
title: {
value: isWindows ? localize('revealInWindows', "Reveal in File Explorer") : isMacintosh ? localize('revealInMac', "Reveal in Finder") : localize('openContainer', "Open Containing Folder"),
original: isWindows ? 'Reveal in File Explorer' : isMacintosh ? 'Reveal in Finder' : 'Open Containing Folder'
},
menu: {
id: MenuId.TimelineItemContext,
group: '4_reveal',
order: 1,
when: ContextKeyExpr.and(LOCAL_HISTORY_MENU_CONTEXT_KEY, ResourceContextKey.Scheme.isEqualTo(Schemas.file))
}
});
}
async run(accessor: ServicesAccessor, item: ITimelineCommandArgument): Promise<void> {
const workingCopyHistoryService = accessor.get(IWorkingCopyHistoryService);
const nativeHostService = accessor.get(INativeHostService);
const { entry } = await findLocalHistoryEntry(workingCopyHistoryService, item);
if (entry) {
await nativeHostService.showItemInFolder(entry.location.fsPath);
}
}
});
//#endregion
| TypeScript | 4 | KevinAo22/vscode | src/vs/workbench/contrib/localHistory/electron-sandbox/localHistoryCommands.ts | [
"MIT"
] |
@0x9ef128e10a8010b7;
struct Message
{
value @0 : UInt64;
list1 @1 : List(UInt64);
list2 @2 : List(List(List(UInt64)));
}
| Cap'n Proto | 3 | pdv-ru/ClickHouse | tests/queries/0_stateless/format_schemas/02030_capnp_lists.capnp | [
"Apache-2.0"
] |
using System;
namespace Ryujinx.Memory
{
public interface IWritableBlock
{
void Write(ulong va, ReadOnlySpan<byte> data);
void WriteUntracked(ulong va, ReadOnlySpan<byte> data) => Write(va, data);
}
}
| C# | 4 | BSoDGamingYT/Ryujinx | Ryujinx.Memory/IWritableBlock.cs | [
"MIT"
] |
module org-openroadm-physical-types {
namespace "http://org/openroadm/physical/types";
prefix org-openroadm-physical-types;
import org-openroadm-common-types {
prefix org-openroadm-common-types;
}
import ietf-yang-types {
prefix yang;
}
organization "Open ROADM MSA";
contact
"OpenROADM.org";
description
"YANG definitions of physical types.
Copyright of the Members of the Open ROADM MSA Agreement dated (c) 2016,
AT&T Intellectual Property. All other rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation and/or
other materials provided with the distribution.
* Neither the Members of the Open ROADM MSA Agreement nor the names of its
contributors may be used to endorse or promote products derived from this software
without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE MEMBERS OF THE OPEN ROADM MSA AGREEMENT ''AS IS''
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
IN NO EVENT THE MEMBERS OF THE OPEN ROADM MSA AGREEMENT BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.";
revision 2016-10-14 {
description
"Version 1.2";
}
grouping node-info {
description
"Physical inventory data used by the node";
leaf vendor {
description
"Vendor of the equipment";
type string;
config false;
mandatory true;
}
leaf model {
type string;
description
"Physical resource model information.";
config false;
mandatory true;
}
leaf serial-id {
description
"Product Code for this physical resource";
type string;
config false;
mandatory true;
}
}
grouping common-info {
description
"Physical inventory data used by all other entities";
uses node-info;
leaf type {
description
"The specific type of this physical resource - ie the type of
shelf, type of circuit-pack, etc.";
type string;
config false;
}
leaf product-code {
description
"Product Code for this physical resource";
type string;
config false;
}
leaf manufacture-date {
description
"Manufactor date of physical resource";
type yang:date-and-time;
config false;
}
leaf clei {
description
"CLEI for this physical resource";
type string;
config false;
}
leaf hardware-version {
description
"The version of the hardware.";
type string;
config false;
}
leaf operational-state {
description
"Operational state of the physical resource";
type org-openroadm-common-types:state;
config false;
}
}
}
| YANG | 4 | meodaiduoi/onos | models/openroadm/src/main/yang/org-openroadm-physical-types@2016-10-14.yang | [
"Apache-2.0"
] |
/******************************************************************************
* Copyright 2019 The Apollo Authors. All Rights Reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*****************************************************************************/
#include "modules/canbus/vehicle/ch/protocol/brake_status__511.h"
#include "gtest/gtest.h"
namespace apollo {
namespace canbus {
namespace ch {
class Brakestatus511Test : public ::testing::Test {
public:
virtual void SetUp() {}
};
TEST_F(Brakestatus511Test, General) {
uint8_t data[8] = {0x01, 0x02, 0x01, 0x00, 0x01, 0x01, 0x00, 0x01};
int32_t length = 8;
ChassisDetail cd;
Brakestatus511 brake;
brake.Parse(data, length, &cd);
EXPECT_EQ(data[0], 0b00000001);
EXPECT_EQ(data[1], 0b00000010);
EXPECT_EQ(data[2], 0b00000001);
EXPECT_EQ(data[3], 0b00000000);
EXPECT_EQ(data[4], 0b00000001);
EXPECT_EQ(data[5], 0b00000001);
EXPECT_EQ(data[6], 0b00000000);
EXPECT_EQ(data[7], 0b00000001);
EXPECT_EQ(cd.ch().brake_status__511().brake_pedal_en_sts(), 1);
EXPECT_EQ(cd.ch().brake_status__511().brake_pedal_sts(), 2);
EXPECT_EQ(cd.ch().brake_status__511().brake_err(), 1);
EXPECT_EQ(cd.ch().brake_status__511().emergency_btn_env(), 0);
EXPECT_EQ(cd.ch().brake_status__511().front_bump_env(), 1);
EXPECT_EQ(cd.ch().brake_status__511().back_bump_env(), 1);
EXPECT_EQ(cd.ch().brake_status__511().overspd_env(), 0);
}
} // namespace ch
} // namespace canbus
} // namespace apollo
| C++ | 4 | seeclong/apollo | modules/canbus/vehicle/ch/protocol/brake_status__511_test.cc | [
"Apache-2.0"
] |
# a function returning (i + j) * -998
func $foo (
# var %i xxx,
var %i i32,
var %j i32) i32 {
return (
mul i32 (
add i32 ( dread i32 %i, dread i32 %j),
constval i32 -998))}
# EXEC: %irbuild Main.mpl
# EXEC: %irbuild Main.irb.mpl
# EXEC: %cmp Main.irb.mpl Main.irb.irb.mpl
| Maple | 3 | harmonyos-mirror/OpenArkCompiler-test | test/testsuite/irbuild_test/I0032-mapleall-irbuild-edge-first/Main.mpl | [
"MulanPSL-1.0"
] |
%%
%unicode 11.0
%public
%class UnicodeWordBreak_11_0
%type int
%standalone
%include ../../resources/common-unicode-all-enumerated-property-java
%%
<<EOF>> { printOutput(); return 1; }
\p{WordBreak:ALetter} { setCurCharPropertyValue("WordBreak:ALetter"); }
\p{WordBreak:CR} { setCurCharPropertyValue("WordBreak:CR"); }
\p{WordBreak:Double_Quote} { setCurCharPropertyValue("WordBreak:Double_Quote"); }
\p{WordBreak:Extend} { setCurCharPropertyValue("WordBreak:Extend"); }
\p{WordBreak:ExtendNumLet} { setCurCharPropertyValue("WordBreak:ExtendNumLet"); }
\p{WordBreak:Format} { setCurCharPropertyValue("WordBreak:Format"); }
\p{WordBreak:Hebrew_Letter} { setCurCharPropertyValue("WordBreak:Hebrew_Letter"); }
\p{WordBreak:Katakana} { setCurCharPropertyValue("WordBreak:Katakana"); }
\p{WordBreak:LF} { setCurCharPropertyValue("WordBreak:LF"); }
\p{WordBreak:MidLetter} { setCurCharPropertyValue("WordBreak:MidLetter"); }
\p{WordBreak:MidNum} { setCurCharPropertyValue("WordBreak:MidNum"); }
\p{WordBreak:MidNumLet} { setCurCharPropertyValue("WordBreak:MidNumLet"); }
\p{WordBreak:Newline} { setCurCharPropertyValue("WordBreak:Newline"); }
\p{WordBreak:Numeric} { setCurCharPropertyValue("WordBreak:Numeric"); }
\p{WordBreak:Other} { setCurCharPropertyValue("WordBreak:Other"); }
\p{WordBreak:Regional_Indicator} { setCurCharPropertyValue("WordBreak:Regional_Indicator"); }
\p{WordBreak:Single_Quote} { setCurCharPropertyValue("WordBreak:Single_Quote"); }
\p{WordBreak:WSegSpace} { setCurCharPropertyValue("WordBreak:WSegSpace"); }
\p{WordBreak:ZWJ} { setCurCharPropertyValue("WordBreak:ZWJ"); }
| JFlex | 3 | Mivik/jflex | testsuite/testcases/src/test/cases/unicode-word-break/UnicodeWordBreak_11_0.flex | [
"BSD-3-Clause"
] |
ISpec do(
Condition = Ground Condition mimic
ExpectationNotMet = Condition mimic
ExamplePending = Condition mimic
UnhandledErrorCondition = Condition mimic
ExampleStarted = Condition mimic
ExamplePassed = Condition mimic
ExampleFailed = Condition mimic
)
| Ioke | 1 | olabini/ioke | lib/ioke/ispec/conditions.ik | [
"ICU",
"MIT"
] |
/*---------------------------------------------------------------------------------------------
* Copyright (c) Microsoft Corporation. All rights reserved.
* Licensed under the MIT License. See License.txt in the project root for license information.
*--------------------------------------------------------------------------------------------*/
import * as assert from 'assert';
import { DisposableStore } from 'vs/base/common/lifecycle';
import { Event } from 'vs/base/common/event';
import { URI } from 'vs/base/common/uri';
import { DefaultConfiguration, PolicyConfiguration } from 'vs/platform/configuration/common/configurations';
import { IFileService } from 'vs/platform/files/common/files';
import { FileService } from 'vs/platform/files/common/fileService';
import { InMemoryFileSystemProvider } from 'vs/platform/files/common/inMemoryFilesystemProvider';
import { NullLogService } from 'vs/platform/log/common/log';
import { Extensions, IConfigurationNode, IConfigurationRegistry } from 'vs/platform/configuration/common/configurationRegistry';
import { Registry } from 'vs/platform/registry/common/platform';
import { VSBuffer } from 'vs/base/common/buffer';
import { deepClone } from 'vs/base/common/objects';
import { IPolicyService } from 'vs/platform/policy/common/policy';
import { FilePolicyService } from 'vs/platform/policy/common/filePolicyService';
import { runWithFakedTimers } from 'vs/base/test/common/timeTravelScheduler';
suite('PolicyConfiguration', () => {
let testObject: PolicyConfiguration;
let fileService: IFileService;
let policyService: IPolicyService;
const policyFile = URI.file('policyFile').with({ scheme: 'vscode-tests' });
const disposables = new DisposableStore();
const policyConfigurationNode: IConfigurationNode = {
'id': 'policyConfiguration',
'order': 1,
'title': 'a',
'type': 'object',
'properties': {
'policy.settingA': {
'type': 'string',
'default': 'defaultValueA',
policy: {
name: 'PolicySettingA',
minimumVersion: '1.0.0',
}
},
'policy.settingB': {
'type': 'string',
'default': 'defaultValueB',
policy: {
name: 'PolicySettingB',
minimumVersion: '1.0.0',
}
},
'nonPolicy.setting': {
'type': 'boolean',
'default': true
}
}
};
suiteSetup(() => Registry.as<IConfigurationRegistry>(Extensions.Configuration).registerConfiguration(policyConfigurationNode));
suiteTeardown(() => Registry.as<IConfigurationRegistry>(Extensions.Configuration).deregisterConfigurations([policyConfigurationNode]));
setup(async () => {
const defaultConfiguration = disposables.add(new DefaultConfiguration());
await defaultConfiguration.initialize();
fileService = disposables.add(new FileService(new NullLogService()));
const diskFileSystemProvider = disposables.add(new InMemoryFileSystemProvider());
fileService.registerProvider(policyFile.scheme, diskFileSystemProvider);
policyService = new FilePolicyService(policyFile, fileService, new NullLogService());
testObject = disposables.add(new PolicyConfiguration(defaultConfiguration, policyService, new NullLogService()));
});
teardown(() => disposables.clear());
test('initialize: with policies', async () => {
await fileService.writeFile(policyFile, VSBuffer.fromString(JSON.stringify({ 'PolicySettingA': 'policyValueA' })));
await testObject.initialize();
const acutal = testObject.configurationModel;
assert.strictEqual(acutal.getValue('policy.settingA'), 'policyValueA');
assert.strictEqual(acutal.getValue('policy.settingB'), undefined);
assert.strictEqual(acutal.getValue('nonPolicy.setting'), undefined);
assert.deepStrictEqual(acutal.keys, ['policy.settingA']);
assert.deepStrictEqual(acutal.overrides, []);
});
test('initialize: no policies', async () => {
await testObject.initialize();
const acutal = testObject.configurationModel;
assert.deepStrictEqual(acutal.keys, []);
assert.deepStrictEqual(acutal.overrides, []);
assert.strictEqual(acutal.getValue('policy.settingA'), undefined);
assert.strictEqual(acutal.getValue('policy.settingB'), undefined);
assert.strictEqual(acutal.getValue('nonPolicy.setting'), undefined);
});
test('initialize: with policies but not registered', async () => {
await fileService.writeFile(policyFile, VSBuffer.fromString(JSON.stringify({ 'PolicySettingA': 'policyValueA', 'PolicySettingB': 'policyValueB', 'PolicySettingC': 'policyValueC' })));
await testObject.initialize();
const acutal = testObject.configurationModel;
assert.strictEqual(acutal.getValue('policy.settingA'), 'policyValueA');
assert.strictEqual(acutal.getValue('policy.settingB'), 'policyValueB');
assert.strictEqual(acutal.getValue('nonPolicy.setting'), undefined);
assert.deepStrictEqual(acutal.keys, ['policy.settingA', 'policy.settingB']);
assert.deepStrictEqual(acutal.overrides, []);
});
test('change: when policy is added', async () => {
await fileService.writeFile(policyFile, VSBuffer.fromString(JSON.stringify({ 'PolicySettingA': 'policyValueA' })));
await testObject.initialize();
await runWithFakedTimers({ useFakeTimers: true }, async () => {
const promise = Event.toPromise(testObject.onDidChangeConfiguration);
await fileService.writeFile(policyFile, VSBuffer.fromString(JSON.stringify({ 'PolicySettingA': 'policyValueA', 'PolicySettingB': 'policyValueB', 'PolicySettingC': 'policyValueC' })));
await promise;
});
const acutal = testObject.configurationModel;
assert.strictEqual(acutal.getValue('policy.settingA'), 'policyValueA');
assert.strictEqual(acutal.getValue('policy.settingB'), 'policyValueB');
assert.strictEqual(acutal.getValue('nonPolicy.setting'), undefined);
assert.deepStrictEqual(acutal.keys, ['policy.settingA', 'policy.settingB']);
assert.deepStrictEqual(acutal.overrides, []);
});
test('change: when policy is updated', async () => {
await fileService.writeFile(policyFile, VSBuffer.fromString(JSON.stringify({ 'PolicySettingA': 'policyValueA' })));
await testObject.initialize();
await runWithFakedTimers({ useFakeTimers: true }, async () => {
const promise = Event.toPromise(testObject.onDidChangeConfiguration);
await fileService.writeFile(policyFile, VSBuffer.fromString(JSON.stringify({ 'PolicySettingA': 'policyValueAChanged' })));
await promise;
});
const acutal = testObject.configurationModel;
assert.strictEqual(acutal.getValue('policy.settingA'), 'policyValueAChanged');
assert.strictEqual(acutal.getValue('policy.settingB'), undefined);
assert.strictEqual(acutal.getValue('nonPolicy.setting'), undefined);
assert.deepStrictEqual(acutal.keys, ['policy.settingA']);
assert.deepStrictEqual(acutal.overrides, []);
});
test('change: when policy is removed', async () => {
await fileService.writeFile(policyFile, VSBuffer.fromString(JSON.stringify({ 'PolicySettingA': 'policyValueA' })));
await testObject.initialize();
await runWithFakedTimers({ useFakeTimers: true }, async () => {
const promise = Event.toPromise(testObject.onDidChangeConfiguration);
await fileService.writeFile(policyFile, VSBuffer.fromString(JSON.stringify({})));
await promise;
});
const acutal = testObject.configurationModel;
assert.strictEqual(acutal.getValue('policy.settingA'), undefined);
assert.strictEqual(acutal.getValue('policy.settingB'), undefined);
assert.strictEqual(acutal.getValue('nonPolicy.setting'), undefined);
assert.deepStrictEqual(acutal.keys, []);
assert.deepStrictEqual(acutal.overrides, []);
});
test('change: when policy setting is registered', async () => {
await fileService.writeFile(policyFile, VSBuffer.fromString(JSON.stringify({ 'PolicySettingC': 'policyValueC' })));
await testObject.initialize();
const promise = Event.toPromise(testObject.onDidChangeConfiguration);
policyConfigurationNode.properties!['policy.settingC'] = {
'type': 'string',
'default': 'defaultValueC',
policy: {
name: 'PolicySettingC',
minimumVersion: '1.0.0',
}
};
Registry.as<IConfigurationRegistry>(Extensions.Configuration).registerConfiguration(deepClone(policyConfigurationNode));
await promise;
const acutal = testObject.configurationModel;
assert.strictEqual(acutal.getValue('policy.settingC'), 'policyValueC');
assert.strictEqual(acutal.getValue('policy.settingA'), undefined);
assert.strictEqual(acutal.getValue('policy.settingB'), undefined);
assert.strictEqual(acutal.getValue('nonPolicy.setting'), undefined);
assert.deepStrictEqual(acutal.keys, ['policy.settingC']);
assert.deepStrictEqual(acutal.overrides, []);
});
test('change: when policy setting is deregistered', async () => {
await fileService.writeFile(policyFile, VSBuffer.fromString(JSON.stringify({ 'PolicySettingA': 'policyValueA' })));
await testObject.initialize();
const promise = Event.toPromise(testObject.onDidChangeConfiguration);
Registry.as<IConfigurationRegistry>(Extensions.Configuration).deregisterConfigurations([policyConfigurationNode]);
await promise;
const acutal = testObject.configurationModel;
assert.strictEqual(acutal.getValue('policy.settingA'), undefined);
assert.strictEqual(acutal.getValue('policy.settingB'), undefined);
assert.strictEqual(acutal.getValue('nonPolicy.setting'), undefined);
assert.deepStrictEqual(acutal.keys, []);
assert.deepStrictEqual(acutal.overrides, []);
});
});
| TypeScript | 4 | trixiedev/vscode | src/vs/platform/configuration/test/common/policyConfiguration.test.ts | [
"MIT"
] |
union return {}
| Thrift | 0 | Jimexist/thrift | compiler/cpp/test/keyword-samples/union1_return.thrift | [
"Apache-2.0"
] |
(module
(type $0 (func (param i32) (result i32)))
(type $1 (func))
(type $2 (func (result i32)))
(import "env" "memory" (memory $0 0))
(data (global.get $gimport$2) "Hello, world\00\00\00\00\00\00\00\00\00\00\00\00")
(import "env" "__stack_pointer" (global $sp (mut i32)))
(import "env" "__indirect_function_table" (table $timport$1 0 funcref))
(import "env" "__memory_base" (global $gimport$2 i32))
(import "env" "__table_base" (global $gimport$3 i32))
(import "GOT.mem" "external_var" (global $gimport$5 (mut i32)))
(import "GOT.func" "puts" (global $gimport$6 (mut i32)))
(import "GOT.func" "_Z13print_messagev" (global $gimport$7 (mut i32)))
(import "env" "puts" (func $puts (param i32) (result i32)))
(global $global$0 i32 (i32.const 16))
(global $global$1 i32 (i32.const 20))
(global $global i32 (i32.const 42))
(export "__wasm_call_ctors" (func $__wasm_call_ctors))
(export "_Z13print_messagev" (func $print_message\28\29))
(export "ptr_puts" (global $global$0))
(export "ptr_local_func" (global $global$1))
(export "__data_end" (global $global))
(func $__wasm_call_ctors (; 1 ;) (type $1)
(call $__wasm_apply_relocs)
)
(func $__wasm_apply_relocs (; 2 ;) (type $1)
(i32.store
(i32.add
(global.get $gimport$2)
(i32.const 16)
)
(global.get $gimport$6)
)
(i32.store
(i32.add
(global.get $gimport$2)
(i32.const 20)
)
(global.get $gimport$7)
)
)
(func $print_message\28\29 (; 3 ;) (type $2) (result i32)
(drop
(call $puts
(i32.add
(global.get $gimport$2)
(i32.const 0)
)
)
)
(i32.load
(global.get $gimport$5)
)
)
;; custom section "dylink", size 5
;; custom section "producers", size 112
)
| WebAssembly | 3 | phated/binaryen | test/lld/main_module.wat | [
"Apache-2.0"
] |
#tag Class
Protected Class TurnBasedMatchHelper
Inherits NSObject
#tag Method, Flags = &h1
Protected Sub Constructor()
dim selfRef as Ptr = Initialize(Allocate(TargetClass))
Super.Constructor(selfRef)
if dispatch = nil then dispatch = new xojo.Core.Dictionary
dispatch.Value(selfRef) = xojo.Core.WeakRef.Create(self)
End Sub
#tag EndMethod
#tag Method, Flags = &h0
Sub FindMatch(minPlayers as integer, maxPlayers as Integer, inView as iOSView)
if not AuthenticationHelper.GetInstance.GameCenterEnabled then Return //game center must be enabled to use its features
dim request as new GameKit.GKMatchRequest
request.minPlayers = minPlayers
request.maxPlayers = maxPlayers
dim mmvc as new GameKit.GKTurnBasedMatchmakerViewController(request)
mmvc.turnBasedMatchmakerDelegate = self
mmvc.showExistingMatches = True
inView.PresentViewController(mmvc, True, nil)
End Sub
#tag EndMethod
#tag Method, Flags = &h0
Shared Function GetInstance() As TurnBasedMatchHelper
static helper as new TurnBasedMatchHelper
Return helper
End Function
#tag EndMethod
#tag Method, Flags = &h21
Private Sub HandleturnBasedMatchmakerViewControllerdidFailWithError(viewController as GKTurnBasedMatchmakerViewController, error as NSError)
if observer <> nil then
observer.ViewControllerDidFailWithError(viewController, error)
end if
declare sub dismissViewControllerAnimated_ lib UIKitLib selector "dismissViewControllerAnimated:completion:" (obj_id as ptr, flag as Boolean, completion as ptr)
dismissViewControllerAnimated_(viewController, True, nil)
System.DebugLog error.localizedDescription
End Sub
#tag EndMethod
#tag Method, Flags = &h21
Private Sub HandleturnBasedMatchmakerViewControllerdidFindMatch(viewController as GKTurnBasedMatchmakerViewController, match as GKTurnBasedMatch)
if observer <> nil then
observer.ViewControllerDidFindMatch(viewController, match)
end if
declare sub dismissViewControllerAnimated_ lib UIKitLib selector "dismissViewControllerAnimated:completion:" (obj_id as ptr, flag as Boolean, completion as ptr)
dismissViewControllerAnimated_(viewController, True, nil)
mmatch = match
End Sub
#tag EndMethod
#tag Method, Flags = &h21
Private Sub HandleturnBasedMatchmakerViewControllerplayerQuitForMatch(viewController as GKTurnBasedMatchmakerViewController, match as GKTurnBasedMatch)
if observer <> nil then
observer.ViewControllerPlayerQuitForMatch(viewController, match)
end if
End Sub
#tag EndMethod
#tag Method, Flags = &h21
Private Sub HandleturnBasedMatchmakerViewControllerWasCancelled(viewController as GKTurnBasedMatchmakerViewController)
if observer <> nil then
observer.ViewControllerWasCancelled(viewController)
end if
declare sub dismissViewControllerAnimated_ lib UIKitLib selector "dismissViewControllerAnimated:completion:" (obj_id as ptr, flag as Boolean, completion as ptr)
dismissViewControllerAnimated_(viewController, True, nil)
End Sub
#tag EndMethod
#tag Method, Flags = &h0
Function HasMatch() As Boolean
Return (CurrentMatch <> nil)
End Function
#tag EndMethod
#tag Method, Flags = &h21
Private Shared Sub impl_turnBasedMatchmakerViewControllerdidFailWithError(pid as ptr, sel as ptr, viewController as ptr, error as ptr)
dim w as xojo.Core.WeakRef = xojo.core.WeakRef(dispatch.Value(pid))
if not(w.Value = nil) then
TurnBasedMatchHelper(w.value).HandleturnBasedMatchmakerViewControllerdidFailWithError(new GKTurnBasedMatchmakerViewController(viewController), new NSError(error))
end if
#Pragma Unused sel
End Sub
#tag EndMethod
#tag Method, Flags = &h21
Private Shared Sub impl_turnBasedMatchmakerViewControllerdidFindMatch(pid as ptr, sel as ptr, viewController as ptr, match as ptr)
dim w as xojo.Core.WeakRef = xojo.core.WeakRef(dispatch.Value(pid))
if not(w.Value = nil) then
TurnBasedMatchHelper(w.value).HandleturnBasedMatchmakerViewControllerdidFindMatch(new GKTurnBasedMatchmakerViewController(viewController), new GKTurnBasedMatch(match))
end if
#Pragma Unused sel
End Sub
#tag EndMethod
#tag Method, Flags = &h21
Private Shared Sub impl_turnBasedMatchmakerViewControllerplayerQuitForMatch(pid as ptr, sel as ptr, viewController as ptr, match as ptr)
dim w as xojo.Core.WeakRef = xojo.core.WeakRef(dispatch.Value(pid))
if not(w.Value = nil) then
TurnBasedMatchHelper(w.value).HandleturnBasedMatchmakerViewControllerplayerQuitForMatch(new GKTurnBasedMatchmakerViewController(viewController), new GKTurnBasedMatch(match))
end if
#Pragma Unused sel
End Sub
#tag EndMethod
#tag Method, Flags = &h21
Private Shared Sub impl_turnBasedMatchmakerViewControllerWasCancelled(pid as ptr, sel as ptr, viewController as ptr)
dim w as xojo.Core.WeakRef = xojo.core.WeakRef(dispatch.Value(pid))
if not(w.Value = nil) then
TurnBasedMatchHelper(w.value).HandleturnBasedMatchmakerViewControllerWasCancelled(new GKTurnBasedMatchmakerViewController(viewController))
end if
#Pragma Unused sel
End Sub
#tag EndMethod
#tag Method, Flags = &h0
Sub SetObserver(observe as TurnBasedMatchHelperObserver)
observer = observe
End Sub
#tag EndMethod
#tag Method, Flags = &h21
Private Shared Function TargetClass() As Ptr
static targetID as ptr
if targetID = Nil then
using UIKit
dim methods() as TargetClassMethodHelper
//TurnBasedMatchmakerViewController
methods.Append new TargetClassMethodHelper("turnBasedMatchmakerViewController:didFindMatch:", AddressOf impl_turnBasedMatchmakerViewControllerdidFindMatch, "v:@@")
methods.Append new TargetClassMethodHelper("turnBasedMatchmakerViewController:playerQuitForMatch:", AddressOf impl_turnBasedMatchmakerViewControllerplayerQuitForMatch, "v:@@")
methods.Append new TargetClassMethodHelper("turnBasedMatchmakerViewController:didFailWithError:", AddressOf impl_turnBasedMatchmakerViewControllerdidFailWithError, "v:@@")
methods.Append new TargetClassMethodHelper("turnBasedMatchmakerViewControllerWasCancelled:", AddressOf impl_turnBasedMatchmakerViewControllerWasCancelled, "v:@")
targetID = BuildTargetClass("NSObject","MyGKTurnBasedMatchmakerViewControllerDelegate",methods)
end if
Return targetID
End Function
#tag EndMethod
#tag ComputedProperty, Flags = &h0
#tag Getter
Get
return mmatch
End Get
#tag EndGetter
CurrentMatch As GKTurnBasedMatch
#tag EndComputedProperty
#tag Property, Flags = &h21
Private Shared dispatch As xojo.Core.Dictionary
#tag EndProperty
#tag Property, Flags = &h21
Private mmatch As GKTurnBasedMatch
#tag EndProperty
#tag Property, Flags = &h21
Private observer As TurnBasedMatchHelperObserver
#tag EndProperty
#tag Using, Name = GameKit
#tag EndUsing
#tag ViewBehavior
#tag ViewProperty
Name="Index"
Visible=true
Group="ID"
InitialValue="-2147483648"
Type="Integer"
EditorType=""
#tag EndViewProperty
#tag ViewProperty
Name="Left"
Visible=true
Group="Position"
InitialValue="0"
Type="Integer"
EditorType=""
#tag EndViewProperty
#tag ViewProperty
Name="Name"
Visible=true
Group="ID"
InitialValue=""
Type="String"
EditorType=""
#tag EndViewProperty
#tag ViewProperty
Name="Super"
Visible=true
Group="ID"
InitialValue=""
Type="String"
EditorType=""
#tag EndViewProperty
#tag ViewProperty
Name="Top"
Visible=true
Group="Position"
InitialValue="0"
Type="Integer"
EditorType=""
#tag EndViewProperty
#tag EndViewBehavior
End Class
#tag EndClass
| Xojo | 3 | kingj5/iOSKit | Modules/GameKitFolder/TurnBasedMatchHelper.xojo_code | [
"MIT"
] |
<mat-form-field appearance="fill">
<mat-label>Favorite food</mat-label>
<mat-select>
<mat-option *ngFor="let food of foods" [value]="food.value">
{{food.viewValue}}
</mat-option>
</mat-select>
</mat-form-field>
| HTML | 3 | tungyingwaltz/components | src/components-examples/material/select/select-harness/select-harness-example.html | [
"MIT"
] |
@font-face
font-family: "Test"
src: url("./fonts/test.woff2") format("woff2")
.index
background: url("http://google.com")
| Stylus | 1 | johanberonius/parcel | packages/core/integration-tests/test/integration/stylus-url/index.styl | [
"MIT"
] |
module peg
import StdEnv
import Control.Applicative
import Control.Monad
import Data.Func
import Data.Functor
import Data.Maybe
import Data.Monoid
:: Position :== Char
Inv :== ' '
Emp :== '.'
Peg :== 'o'
:: Direction :== Int
N :== 0
E :== 1
S :== 2
W :== 3
:: Coord = {x :: !Int , y :: !Int}
:: Move = {c :: !Coord, d :: !Direction}
:: PegBoard :== {#{#Position}}
english :: PegBoard
english =
{{Inv, Inv, Peg, Peg, Peg, Inv, Inv}
,{Inv, Inv, Peg, Peg, Peg, Inv, Inv}
,{Peg, Peg, Peg, Peg, Peg, Peg, Peg}
,{Peg, Peg, Peg, Emp, Peg, Peg, Peg}
,{Peg, Peg, Peg, Peg, Peg, Peg, Peg}
,{Inv, Inv, Peg, Peg, Peg, Inv, Inv}
,{Inv, Inv, Peg, Peg, Peg, Inv, Inv}
}
french :: PegBoard
french =
{{Inv, Inv, Peg, Peg, Peg, Inv, Inv}
,{Inv, Peg, Peg, Peg, Peg, Peg, Inv}
,{Peg, Peg, Peg, Emp, Peg, Peg, Peg}
,{Peg, Peg, Peg, Peg, Peg, Peg, Peg}
,{Peg, Peg, Peg, Peg, Peg, Peg, Peg}
,{Inv, Peg, Peg, Peg, Peg, Peg, Inv}
,{Inv, Inv, Peg, Peg, Peg, Inv, Inv}
}
german :: PegBoard
german =
{{Inv, Inv, Inv, Peg, Peg, Peg, Inv, Inv, Inv}
,{Inv, Inv, Inv, Peg, Peg, Peg, Inv, Inv, Inv}
,{Inv, Inv, Inv, Peg, Peg, Peg, Inv, Inv, Inv}
,{Peg, Peg, Peg, Peg, Peg, Peg, Peg, Peg, Peg}
,{Peg, Peg, Peg, Peg, Emp, Peg, Peg, Peg, Peg}
,{Peg, Peg, Peg, Peg, Peg, Peg, Peg, Peg, Peg}
,{Inv, Inv, Inv, Peg, Peg, Peg, Inv, Inv, Inv}
,{Inv, Inv, Inv, Peg, Peg, Peg, Inv, Inv, Inv}
,{Inv, Inv, Inv, Peg, Peg, Peg, Inv, Inv, Inv}
}
bell :: PegBoard
bell =
{{Inv, Inv, Peg, Peg, Peg, Inv, Inv, Inv}
,{Inv, Inv, Peg, Peg, Peg, Inv, Inv, Inv}
,{Inv, Inv, Peg, Peg, Peg, Inv, Inv, Inv}
,{Peg, Peg, Peg, Peg, Peg, Peg, Peg, Peg}
,{Peg, Peg, Peg, Emp, Peg, Peg, Peg, Peg}
,{Peg, Peg, Peg, Peg, Peg, Peg, Peg, Peg}
,{Inv, Inv, Peg, Peg, Peg, Inv, Inv, Inv}
,{Inv, Inv, Peg, Peg, Peg, Inv, Inv, Inv}
}
diamond :: PegBoard
diamond =
{{Inv, Inv, Inv, Inv, Peg, Inv, Inv, Inv, Inv}
,{Inv, Inv, Inv, Peg, Peg, Peg, Inv, Inv, Inv}
,{Inv, Inv, Peg, Peg, Peg, Peg, Peg, Inv, Inv}
,{Inv, Peg, Peg, Peg, Peg, Peg, Peg, Peg, Inv}
,{Peg, Peg, Peg, Peg, Emp, Peg, Peg, Peg, Peg}
,{Inv, Peg, Peg, Peg, Peg, Peg, Peg, Peg, Inv}
,{Inv, Inv, Peg, Peg, Peg, Peg, Peg, Inv, Inv}
,{Inv, Inv, Inv, Peg, Peg, Peg, Inv, Inv, Inv}
,{Inv, Inv, Inv, Inv, Peg, Inv, Inv, Inv, Inv}
}
solve :: !PegBoard -> Maybe [PegBoard]
solve b
| 1 == length (getCoords Peg) = pure [b]
= (\xs->[b:xs]) <$> foldr (<|>) empty [move b m >>= solve\\m<-moves]
where
moves :: [Move]
moves = [{c=c,d=d}\\c<-getCoords Emp, d<-[N,E,S,W]]
getCoords :: Char -> [Coord]
getCoords f = [{x=x,y=y}\\r<-:b & y<-[0..] , c<-:r & x<-[0..] | f == c]
move :: !PegBoard !Move -> Maybe PegBoard
move b {c=cc=:{x=tx,y=ty}, d}
# sc=:{x=sx,y=sy} = transform cc d
# fc=:{x=fx,y=fy} = transform sc d
= getPos fc >>= \pa->if` (pa<>Peg) empty
$ getPos sc >>= \pb->if` (pb<>Peg) empty
$ getPos cc >>= \pc->if` (pc<>Emp) empty
$ Just {{{c\\c<-:r}\\r<-:b} & [fy,fx]=Emp, [sy,sx]=Emp, [ty,tx]=Peg}
where
getPos :: !Coord -> Maybe Position
getPos {x,y}
| y < 0 || x < 0 || y >= size b || x >= size b.[y] || b.[y,x] == Inv
= Nothing
= Just (b.[y,x])
transform :: !Coord !Direction -> Coord
transform c=:{x,y} d = case d of
N = {c & y=y+1}
S = {c & y=y-1}
W = {c & x=x+1}
E = {c & x=x-1}
Start = [map printPegBoard <$> solve b\\b<-[english,german,french,bell,diamond]]
where
printPegBoard :: !PegBoard -> String
printPegBoard b = foldr (+++) "\n" [r+++"\n"\\r<-:b]
| Clean | 4 | ajnavarro/language-dataset | data/github.com/dopefishh/cleanpeg/5d548d628cace01760cbd6ca2aacb1f6d65afdde/peg.icl | [
"MIT"
] |
package org.springframework.test.context.web
beans { foo String, 'Groovy Foo' } | Groovy | 1 | nicchagil/spring-framework | spring-test/src/test/resources/org/springframework/test/context/web/BasicGroovyWacTestsContext.groovy | [
"Apache-2.0"
] |
(ns wisp.test.runtime
(:require [wisp.test.util :refer [is thrown?]]
[wisp.src.runtime :refer [dictionary? vector? iterable? set?
subs str and or = == not= > >= < <=
+ - / * quot mod rem rem* nan?]]
[wisp.src.sequence :refer [list cons concat vec lazy-seq seq set
take range infinite-range lazy-concat]]
[wisp.src.ast :refer [symbol]]))
(is (not (dictionary? 2)) "2 is not dictionary")
(is (not (dictionary? [])) "[] is not dictionary")
(is (not (dictionary? '())) "() is not dictionary")
(is (dictionary? {}) "{} is dictionary")
(is (not (vector? 2)) "2 is not vector")
(is (not (vector? {})) "{} is not vector")
(is (not (vector? '())) "() is not vector")
(is (vector? []) "[] is vector")
(is (not (iterable? nil)) "nil is not iterable")
(is (not (iterable? {})) "{} is not iterable")
(is (iterable? '()) "() is iterable")
(is (iterable? (lazy-seq)) "(lazy-seq) is iterable")
(is (iterable? []) "[] is iterable")
(is (iterable? (Set.)) "Set{} is iterable")
(is (iterable? (.keys (Set.))) "(.keys Set{}) is iterable")
(is (set? (Set.)) "Set{} is a set")
(is (not (set? (Map.))) "Map{} is not a set")
(is (= (Set. [1 2]) (Set. [2 1])))
(is (= `(1 ~@'(2 3) 4 ~@'(5))
'(1 2 3 4 5)))
(is (= (subs "Clojure" 1) "lojure"))
(is (= (subs "Clojure" 1 3) "lo"))
(is (apply = [1]))
(is (apply = [1 1]))
(is (not (apply = [1 2])))
(is (apply = [1 1 1]))
(is (not (apply = [1 2 3])))
(is (apply = [1 1 1 1 1 1]))
(is (not (apply = [1 1 1 1 2 1])))
(is (apply == [1]))
(is (apply == [1 1]))
(is (not (apply == [1 2])))
(is (apply == [1 1 1]))
(is (not (apply == [1 2 3])))
(is (apply == [1 1 1 1 1 1]))
(is (not (apply == [1 1 1 1 2 1])))
(is (apply > [1]))
(is (apply > [2 1]))
(is (not (apply > [1 2])))
(is (not (apply > [1 1])))
(is (apply > [3 2 1]))
(is (not (apply > [3 2 4])))
(is (not (apply > [3 2 2])))
(is (apply > [5 4 3 2 1 0]))
(is (not (apply > [5 4 3 2 2 1])))
(is (not (apply > [5 4 3 2 3 1])))
(is (apply >= [1]))
(is (apply >= [2 1]))
(is (apply >= [2 2]))
(is (not (apply >= [1 2])))
(is (apply >= [3 2 1]))
(is (apply >= [3 2 2]))
(is (not (apply >= [3 2 4])))
(is (apply >= [5 4 3 2 2 1 0]))
(is (not (apply >= [5 4 3 2 0 1])))
(is (apply < [1]))
(is (apply < [1 2]))
(is (not (apply < [2 1])))
(is (not (apply < [2 2])))
(is (apply < [1 2 3]))
(is (not (apply < [3 2 4])))
(is (not (apply < [3 4 4])))
(is (apply < [0 1 2 3 4 5]))
(is (not (apply < [0 1 2 3 4 4])))
(is (not (apply < [0 1 2 1 4 5])))
(is (apply <= [1]))
(is (apply <= [1 2]))
(is (apply <= [2 2]))
(is (not (apply <= [2 1])))
(is (apply <= [1 2 3]))
(is (apply <= [1 2 2]))
(is (not (apply <= [4 5 3])))
(is (apply <= [0 1 2 3 4 5]))
(is (apply <= [0 1 2 3 4 4]))
(is (not (apply <= [0 1 2 1 4 5])))
(is (= (apply + []) 0))
(is (= (apply + [1]) 1))
(is (= (apply + [1 2]) 3))
(is (= (apply + [1 2 3]) 6))
(is (= (apply + [1 2 3 4 5 6]) 21))
(is (= (apply - [1]) -1))
(is (= (apply - [5 2]) 3))
(is (= (apply - [10 2 3]) 5))
(is (= (apply - [30 1 2 3 4 5 6]) 9))
(is (= (apply * []) 1))
(is (= (apply * [5]) 5))
(is (= (apply * [2 2]) 4))
(is (= (apply * [1 2 3]) 6))
(is (= (apply * [1 2 3 4 5 6]) 720))
(is (= (apply / [1]) 1))
(is (= (apply / [2]) 1/2))
(is (= (apply / [5 2]) 5/2))
(is (= (apply / [6 2]) 3))
(is (= (apply / [10 2 3]) 5/3))
(is (= (apply / [30 1 2 3 4 5 6]) 1/24))
(is (= (apply quot [ 10 3]) 3))
(is (= (apply quot [-10 3]) -4)) ; difference from Clojure: int rounds down, not towards zero
(is (= (apply quot [ 10 -3]) -4))
(is (= (apply quot [-10 -3]) 3))
(is (= (apply quot [ 1024.8402 5.12]) 200))
(is (= (apply quot [-1024.8402 5.12]) -201))
(defn- approx= [x delta & xs]
(.every xs #(> delta (Math.abs (- x %)))))
(is (= (apply mod [ 10 3]) 1))
(is (= (apply mod [-10 3]) 2))
(is (= (apply mod [ 10 -3]) -2))
(is (= (apply mod [-10 -3]) -1))
(is (approx= (apply mod [ 1024.8402 5.12]) 1e-5 0.8402))
(is (approx= (apply mod [-1024.8402 5.12]) 1e-5 4.2798))
(is (= (apply rem [ 10 3]) 1))
(is (= (apply rem [-10 3]) -1))
(is (= (apply rem [ 10 -3]) 1))
(is (= (apply rem [-10 -3]) -1))
(is (= (apply rem* [ 10 3]) 1))
(is (= (apply rem* [-10 3]) -1))
(is (= (apply rem* [ 10 -3]) 1))
(is (= (apply rem* [-10 -3]) -1))
(is (approx= (apply rem [ 1024.8402 5.12]) 1e-5 0.8402))
(is (approx= (apply rem [-1024.8402 5.12]) 1e-5 -0.8402))
(is (approx= (apply rem* [ 1024.8402 5.12]) 1e-5 0.8402))
(is (approx= (apply rem* [-1024.8402 5.12]) 1e-5 -0.8402))
(is (= (apply and []) true))
(is (= (apply and [1]) 1))
(is (= (apply and [1 2]) 2))
(is (= (apply and [5 2]) 2))
(is (= (apply and [6 false 2]) false))
(is (= (apply and [6 4 nil 2]) nil))
(is (= (apply and [10 2 3]) 3))
(is (= (apply and [30 1 2 3 4 5 6]) 6))
(is (= (apply and [30 1 2 false 3 4 5 6]) false))
(is (= (apply and [30 1 2 3 4 5 6 30 1 2 3 4 5 6 17]) 17))
(is (= (apply or []) nil))
(is (= (apply or [nil 1]) 1))
(is (= (apply or [1 nil 2]) 1))
(is (= (apply or [5 2]) 5))
(is (= (apply or [nil false 2]) 2))
(is (= (apply or [nil nil nil nil nil nil nil nil nil false]) false))
(is (= (apply or [nil nil nil nil nil nil nil nil nil nil nil nil nil 17 18]) 17))
(is (apply = []))
(is (apply = [1 1]))
(is (not (apply = [1 2])))
(is (not (apply = [1 "1"])))
(is (not (apply = [1 :1])))
(is (not (apply = ["b" 'b])))
(is (apply = [[] []]))
(is (apply = [[1] [1]]))
(is (apply = [[1 2] [1 2]]))
(is (not (apply = [[1 2] [2 1]])))
(is (not (apply = [[1 2] [1 2 3]])))
(is (apply = [[1 2 [3 [4 5]]] [1 2 [3 [4 5]]]]))
(is (apply = [[1 2 [3 [4 5]]] [1 2 [3 [4 5]]] [1 2 [3 [4 5]]]]))
(is (not (apply = [[1 2 [3 [4 5]]] [1 2 [3 [4 5]]] [1 2 [3 [4 4]]]])))
(is (apply = [#"foo" #"foo"]))
(is (not (apply = [#"(?i)foo" #"foo"])))
(is (not (apply = [#"(?i)foo" #"(?m)foo"])))
(is (apply = [#"(?i)foo" #"(?i)foo"]))
(is (apply = [#"(?mi)foo" #"(?im)foo"]))
(is (not (apply = [#"(?mi)foo" #"(?im)foo" "?(i)foo"])))
(is (not (apply = [#"foo" "foo"])))
(is (not (apply = [#"foo" 1])))
(is (not (apply = ["foo" 1])))
(is (not (apply = ["foo" ["foo"]])))
(is (not (apply = ["foo" ["f" "o" "o"]])))
(is (apply = ['() '()]))
(is (apply = ['(foo bar) '(foo bar)]))
(is (not (apply = ['(foo bar) '(bar foo)])))
(is (not (apply = ['(foo bar) '(foo bar baz)])))
(is (not (apply = ['(foo bar) '(foo :bar)])))
(is (not (apply = ['(foo bar) '(foo "bar")])))
(is (apply = [{} {}]))
(is (apply = [{:x 1} {:x 1}]))
(is (not (apply = [{:x 1} {:x 2}])))
(is (not (apply = [{:x 1} {:x 1 :y 2}])))
(is (not (apply = [{:x 2 :y 1} {:x 1 :y 2}])))
(is (apply = [{:x 1 :y 1} {:y 1 :x 1}]))
(is (not (apply = [{:x 1 :y 2} {:y 1 :x 2}])))
(is (apply = [{:x 1 :y [2 [3 {:z 4}]]} {:x 1 :y [2 [3 {:z 4}]]}]))
(is (not (apply = [{:x 1 :y [2 [3 {:z 4}]]} {:x 1 :y [2 [3 {:z 4}]]} {}])))
(is (apply = [{:x 1 :y [2 [3 {:z 4}]]}
{:x 1 :y [2 [3 {:z 4}]]}
{:x 1 :y [2 [3 {:z 4}]]}
{:x 1 :y [2 [3 {:z 4}]]}]))
(is (= '(1 2 3) (cons 1 [2 3])))
(is (= '(1 2 3) [1 2 3]))
(is (= (range 10) (take 10 (infinite-range))))
(is (= (range 10) (seq (Set. (range 10)))))
(is (not= (range 10) (infinite-range)))
(is (not= (infinite-range 1) (infinite-range 1 2)))
(is (= (lazy-concat (range 10) \+ (range 2))
(lazy-concat (range 10) \+ #{0 1})))
(is (not= (lazy-concat (range 10) \+ (infinite-range 1))
(lazy-concat (range 10) \+ (infinite-range 1 2))))
(is (not (apply not= [])))
(is (not (apply not= [1 1])))
(is (apply not= [1 2]))
(is (apply not= [1 "1"]))
(is (apply not= [1 :1]))
(is (apply not= ["b" 'b]))
(is (= (apply nan? []) true))
(is (= (apply nan? [nil]) true))
(is (= (apply nan? ["hi"]) true))
(is (= (apply nan? [false]) false))
(is (= (apply nan? [true]) false))
(is (= (apply nan? [1]) false))
(is (= (apply nan? ["2"]) false))
| wisp | 5 | rcarmo/wisp | test/runtime.wisp | [
"BSD-3-Clause"
] |
' Licensed to the .NET Foundation under one or more agreements.
' The .NET Foundation licenses this file to you under the MIT license.
' See the LICENSE file in the project root for more information.
Imports System.ComponentModel.Composition
Imports System.Threading
Imports Microsoft.CodeAnalysis.Editor.Implementation.AutomaticCompletion
Imports Microsoft.CodeAnalysis.Host.Mef
Imports Microsoft.CodeAnalysis.Text
Imports Microsoft.VisualStudio.Commanding
Imports Microsoft.VisualStudio.Language.Intellisense.AsyncCompletion
Imports Microsoft.VisualStudio.Text.Editor.Commanding.Commands
Imports Microsoft.VisualStudio.Text.Operations
Imports Microsoft.VisualStudio.Utilities
Namespace Microsoft.CodeAnalysis.Editor.VisualBasic.AutomaticCompletion
' <summary>
' visual basic automatic line ender command handler
' </summary>
<Export(GetType(ICommandHandler))>
<ContentType(ContentTypeNames.VisualBasicContentType)>
<Name(PredefinedCommandHandlerNames.AutomaticLineEnder)>
<Order(Before:=PredefinedCompletionNames.CompletionCommandHandler)>
Friend Class AutomaticLineEnderCommandHandler
Inherits AbstractAutomaticLineEnderCommandHandler
<ImportingConstructor>
<Obsolete(MefConstruction.ImportingConstructorMessage, True)>
Public Sub New(undoRegistry As ITextUndoHistoryRegistry,
editorOperations As IEditorOperationsFactoryService)
MyBase.New(undoRegistry, editorOperations)
End Sub
Protected Overrides Sub NextAction(editorOperation As IEditorOperations, nextAction As Action)
' let the next action run
nextAction()
End Sub
Protected Overrides Function TreatAsReturn(document As Document, caretPosition As Integer, cancellationToken As CancellationToken) As Boolean
' No special handling in VB.
Return False
End Function
Protected Overrides Sub ModifySelectedNode(args as AutomaticLineEnderCommandArgs, document As Document, selectedNode As SyntaxNode, addBrace As Boolean, caretPosition As Integer, cancellationToken As CancellationToken)
End Sub
Protected Overrides Function GetValidNodeToModifyBraces(document As Document, caretPosition As Integer, cancellationToken As CancellationToken) As (SyntaxNode, Boolean)?
Return Nothing
End Function
Protected Overrides Function FormatAndApplyBasedOnEndToken(document As Document, position As Integer, cancellationToken As CancellationToken) As Document
' vb does automatic line commit
' no need to do explicit formatting
Return document
End Function
Protected Overrides Function GetEndingString(document As Document, position As Integer, cancellationToken As CancellationToken) As String
' prepare expansive information from document
Dim root = document.GetSyntaxRootSynchronously(cancellationToken)
Dim text = root.SyntaxTree.GetText(cancellationToken)
' get line where the caret is on
Dim line = text.Lines.GetLineFromPosition(position)
' find line break token if there is one
Dim lastToken = CType(root.FindTokenOnLeftOfPosition(line.End, includeSkipped:=False), SyntaxToken)
lastToken = If(lastToken.Kind = SyntaxKind.EndOfFileToken, lastToken.GetPreviousToken(includeZeroWidth:=True), lastToken)
' find last token of the line
If lastToken.Kind = SyntaxKind.None OrElse line.End < lastToken.Span.End Then
Return Nothing
End If
' properly ended
If Not lastToken.IsMissing AndAlso lastToken.IsLastTokenOfStatementWithEndOfLine() Then
Return Nothing
End If
' so far so good. check whether we need to add explicit line continuation here
Dim nonMissingToken = If(lastToken.IsMissing, lastToken.GetPreviousToken(), lastToken)
' now we have the last token, check whether it is at a valid location
If (line.Span.Contains(nonMissingToken.Span.End)) Then
' make sure that there is no trailing text after last token on the line if it is not at the end of the line
Dim endingString = text.ToString(TextSpan.FromBounds(nonMissingToken.Span.End, line.End))
If Not String.IsNullOrWhiteSpace(endingString) Then
Return Nothing
End If
End If
' check whether implicit line continuation is allowed
If SyntaxFacts.AllowsTrailingImplicitLineContinuation(CType(nonMissingToken, SyntaxToken)) Then
Return Nothing
End If
Dim nextToken = nonMissingToken.GetNextToken(includeZeroWidth:=True)
' if there is skipped token between previous and next token, don't do anything
If nonMissingToken.TrailingTrivia.Concat(nextToken.LeadingTrivia).Any(AddressOf HasSkippedText) Then
Return Nothing
End If
If nextToken.IsLastTokenOfStatementWithEndOfLine() Then
Return " _"
End If
Dim nextNonMissingToken = nextToken.GetNextNonZeroWidthTokenOrEndOfFile()
If nextNonMissingToken.Kind = SyntaxKind.EndOfFileToken Then
Return Nothing
End If
Return If(SyntaxFacts.AllowsLeadingImplicitLineContinuation(CType(nextToken, SyntaxToken)), Nothing, " _")
End Function
Private Shared Function HasSkippedText(trivia As SyntaxTrivia) As Boolean
Return trivia.Kind = SyntaxKind.SkippedTokensTrivia
End Function
End Class
End Namespace
| Visual Basic | 5 | frandesc/roslyn | src/EditorFeatures/VisualBasic/AutomaticCompletion/AutomaticLineEnderCommandHandler.vb | [
"MIT"
] |
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