repo_id
stringlengths 5
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5.01M
| file_path
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5.01M
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|---|---|---|---|
4ms/metamodule-plugin-sdk
| 10,403
|
plugin-libc/newlib/libc/machine/arm/aeabi_memcpy-armv7a.S
|
/*
* Copyright (c) 2014 ARM Ltd
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the company may not be used to endorse or promote
* products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "../../../../include/arm-acle-compat.h"
/* NOTE: This ifdef MUST match the one in aeabi_memcpy.c. */
#if defined (__ARM_ARCH_7A__) && defined (__ARM_FEATURE_UNALIGNED) && \
(defined (__ARM_NEON__) || !defined (__SOFTFP__))
.syntax unified
.global __aeabi_memcpy
.type __aeabi_memcpy, %function
__aeabi_memcpy:
/* Assumes that n >= 0, and dst, src are valid pointers.
If there is at least 8 bytes to copy, use LDRD/STRD.
If src and dst are misaligned with different offsets,
first copy byte by byte until dst is aligned,
and then copy using LDRD/STRD and shift if needed.
When less than 8 left, copy a word and then byte by byte. */
/* Save registers (r0 holds the return value):
optimized push {r0, r4, r5, lr}.
To try and improve performance, stack layout changed,
i.e., not keeping the stack looking like users expect
(highest numbered register at highest address). */
push {r0, lr}
strd r4, r5, [sp, #-8]!
/* Get copying of tiny blocks out of the way first. */
/* Is there at least 4 bytes to copy? */
subs r2, r2, #4
blt copy_less_than_4 /* If n < 4. */
/* Check word alignment. */
ands ip, r0, #3 /* ip = last 2 bits of dst. */
bne dst_not_word_aligned /* If dst is not word-aligned. */
/* Get here if dst is word-aligned. */
ands ip, r1, #3 /* ip = last 2 bits of src. */
bne src_not_word_aligned /* If src is not word-aligned. */
word_aligned:
/* Get here if source and dst both are word-aligned.
The number of bytes remaining to copy is r2+4. */
/* Is there is at least 64 bytes to copy? */
subs r2, r2, #60
blt copy_less_than_64 /* If r2 + 4 < 64. */
/* First, align the destination buffer to 8-bytes,
to make sure double loads and stores don't cross cache line boundary,
as they are then more expensive even if the data is in the cache
(require two load/store issue cycles instead of one).
If only one of the buffers is not 8-bytes aligned,
then it's more important to align dst than src,
because there is more penalty for stores
than loads that cross cacheline boundary.
This check and realignment are only worth doing
if there is a lot to copy. */
/* Get here if dst is word aligned,
i.e., the 2 least significant bits are 0.
If dst is not 2w aligned (i.e., the 3rd bit is not set in dst),
then copy 1 word (4 bytes). */
ands r3, r0, #4
beq two_word_aligned /* If dst already two-word aligned. */
ldr r3, [r1], #4
str r3, [r0], #4
subs r2, r2, #4
blt copy_less_than_64
two_word_aligned:
/* TODO: Align to cacheline (useful for PLD optimization). */
/* Every loop iteration copies 64 bytes. */
1:
.irp offset, #0, #8, #16, #24, #32, #40, #48, #56
ldrd r4, r5, [r1, \offset]
strd r4, r5, [r0, \offset]
.endr
add r0, r0, #64
add r1, r1, #64
subs r2, r2, #64
bge 1b /* If there is more to copy. */
copy_less_than_64:
/* Get here if less than 64 bytes to copy, -64 <= r2 < 0.
Restore the count if there is more than 7 bytes to copy. */
adds r2, r2, #56
blt copy_less_than_8
/* Copy 8 bytes at a time. */
2:
ldrd r4, r5, [r1], #8
strd r4, r5, [r0], #8
subs r2, r2, #8
bge 2b /* If there is more to copy. */
copy_less_than_8:
/* Get here if less than 8 bytes to copy, -8 <= r2 < 0.
Check if there is more to copy. */
cmn r2, #8
beq return /* If r2 + 8 == 0. */
/* Restore the count if there is more than 3 bytes to copy. */
adds r2, r2, #4
blt copy_less_than_4
/* Copy 4 bytes. */
ldr r3, [r1], #4
str r3, [r0], #4
copy_less_than_4:
/* Get here if less than 4 bytes to copy, -4 <= r2 < 0. */
/* Restore the count, check if there is more to copy. */
adds r2, r2, #4
beq return /* If r2 == 0. */
/* Get here with r2 is in {1,2,3}={01,10,11}. */
/* Logical shift left r2, insert 0s, update flags. */
lsls r2, r2, #31
/* Copy byte by byte.
Condition ne means the last bit of r2 is 0.
Condition cs means the second to last bit of r2 is set,
i.e., r2 is 1 or 3. */
itt ne
ldrbne r3, [r1], #1
strbne r3, [r0], #1
itttt cs
ldrbcs r4, [r1], #1
ldrbcs r5, [r1]
strbcs r4, [r0], #1
strbcs r5, [r0]
return:
/* Restore registers: optimized pop {r0, r4, r5, pc} */
ldrd r4, r5, [sp], #8
pop {r0, pc} /* This is the only return point of memcpy. */
dst_not_word_aligned:
/* Get here when dst is not aligned and ip has the last 2 bits of dst,
i.e., ip is the offset of dst from word.
The number of bytes that remains to copy is r2 + 4,
i.e., there are at least 4 bytes to copy.
Write a partial word (0 to 3 bytes), such that dst becomes
word-aligned. */
/* If dst is at ip bytes offset from a word (with 0 < ip < 4),
then there are (4 - ip) bytes to fill up to align dst to the next
word. */
rsb ip, ip, #4 /* ip = #4 - ip. */
cmp ip, #2
/* Copy byte by byte with conditionals. */
itt gt
ldrbgt r3, [r1], #1
strbgt r3, [r0], #1
itt ge
ldrbge r4, [r1], #1
strbge r4, [r0], #1
ldrb lr, [r1], #1
strb lr, [r0], #1
/* Update the count.
ip holds the number of bytes we have just copied. */
subs r2, r2, ip /* r2 = r2 - ip. */
blt copy_less_than_4 /* If r2 < ip. */
/* Get here if there are more than 4 bytes to copy.
Check if src is aligned. If beforehand src and dst were not word
aligned but congruent (same offset), then now they are both
word-aligned, and we can copy the rest efficiently (without
shifting). */
ands ip, r1, #3 /* ip = last 2 bits of src. */
beq word_aligned /* If r1 is word-aligned. */
src_not_word_aligned:
/* Get here when src is not word-aligned, but dst is word-aligned.
The number of bytes that remains to copy is r2+4. */
/* Copy word by word using LDR when alignment can be done in hardware,
i.e., SCTLR.A is set, supporting unaligned access in LDR and STR. */
subs r2, r2, #60
blt 8f
7:
/* Copy 64 bytes in every loop iteration. */
.irp offset, #0, #4, #8, #12, #16, #20, #24, #28, #32, #36, #40, #44, #48, #52, #56, #60
ldr r3, [r1, \offset]
str r3, [r0, \offset]
.endr
add r0, r0, #64
add r1, r1, #64
subs r2, r2, #64
bge 7b
8:
/* Get here if less than 64 bytes to copy, -64 <= r2 < 0.
Check if there is more than 3 bytes to copy. */
adds r2, r2, #60
blt copy_less_than_4
9:
/* Get here if there is less than 64 but at least 4 bytes to copy,
where the number of bytes to copy is r2+4. */
ldr r3, [r1], #4
str r3, [r0], #4
subs r2, r2, #4
bge 9b
b copy_less_than_4
.syntax unified
.global __aeabi_memcpy4
.type __aeabi_memcpy4, %function
__aeabi_memcpy4:
/* Assumes that both of its arguments are 4-byte aligned. */
push {r0, lr}
strd r4, r5, [sp, #-8]!
/* Is there at least 4 bytes to copy? */
subs r2, r2, #4
blt copy_less_than_4 /* If n < 4. */
bl word_aligned
.syntax unified
.global __aeabi_memcpy8
.type __aeabi_memcpy8, %function
__aeabi_memcpy8:
/* Assumes that both of its arguments are 8-byte aligned. */
push {r0, lr}
strd r4, r5, [sp, #-8]!
/* Is there at least 4 bytes to copy? */
subs r2, r2, #4
blt copy_less_than_4 /* If n < 4. */
/* Is there at least 8 bytes to copy? */
subs r2, r2, #4
blt copy_less_than_8 /* If n < 8. */
/* Is there at least 64 bytes to copy? */
subs r2, r2, #56
blt copy_less_than_64 /* if n + 8 < 64. */
bl two_word_aligned
#endif
|
4ms/metamodule-plugin-sdk
| 2,695
|
plugin-libc/newlib/libc/machine/arm/aeabi_memset-thumb2.S
|
/*
* Copyright (c) 2015 ARM Ltd
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the company may not be used to endorse or promote
* products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "arm_asm.h"
.thumb
.syntax unified
.global __aeabi_memset
.type __aeabi_memset, %function
.fnstart
.cfi_startproc
ASM_ALIAS __aeabi_memset4 __aeabi_memset
ASM_ALIAS __aeabi_memset8 __aeabi_memset
__aeabi_memset:
prologue 4 6
lsls r4, r0, #30
beq 10f
subs r4, r1, #1
cmp r1, #0
beq 9f
uxtb r5, r2
mov r3, r0
b 2f
1:
subs r1, r4, #1
cbz r4, 9f
mov r4, r1
2:
strb r5, [r3], #1
lsls r1, r3, #30
bne 1b
3:
cmp r4, #3
bls 7f
uxtb r5, r2
orr r5, r5, r5, lsl #8
cmp r4, #15
orr r5, r5, r5, lsl #16
bls 5f
mov r6, r4
add r1, r3, #16
4:
subs r6, r6, #16
cmp r6, #15
str r5, [r1, #-16]
str r5, [r1, #-12]
str r5, [r1, #-8]
str r5, [r1, #-4]
add r1, r1, #16
bhi 4b
sub r1, r4, #16
bic r1, r1, #15
and r4, r4, #15
adds r1, r1, #16
cmp r4, #3
add r3, r3, r1
bls 7f
5:
mov r6, r3
mov r1, r4
6:
subs r1, r1, #4
cmp r1, #3
str r5, [r6], #4
bhi 6b
subs r1, r4, #4
bic r1, r1, #3
adds r1, r1, #4
add r3, r3, r1
and r4, r4, #3
7:
cbz r4, 9f
uxtb r2, r2
add r4, r4, r3
8:
strb r2, [r3], #1
cmp r3, r4
bne 8b
9:
.cfi_remember_state
epilogue 4 6
10:
.cfi_restore_state
mov r4, r1
mov r3, r0
b 3b
.cfi_endproc
.cantunwind
.fnend
.size __aeabi_memset, . - __aeabi_memset
|
4ms/metamodule-plugin-sdk
| 2,828
|
plugin-libc/newlib/libc/machine/arm/aeabi_memset-thumb.S
|
/*
* Copyright (c) 2015 ARM Ltd
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the company may not be used to endorse or promote
* products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "arm-acle-compat.h"
.thumb
.syntax unified
.global __aeabi_memset
.type __aeabi_memset, %function
ASM_ALIAS __aeabi_memset4 __aeabi_memset
ASM_ALIAS __aeabi_memset8 __aeabi_memset
__aeabi_memset:
push {r4, r5, r6, lr}
lsls r3, r0, #30
beq 10f
subs r4, r1, #1
cmp r1, #0
beq 9f
lsls r5, r2, #24
lsrs r5, r5, #24
movs r3, r0
movs r6, #3
b 2f
1:
subs r1, r4, #1
cmp r4, #0
beq 9f
movs r4, r1
2:
adds r3, r3, #1
subs r1, r3, #1
strb r5, [r1]
tst r3, r6
bne 1b
3:
cmp r4, #3
bls 7f
movs r5, #255
ands r5, r2
lsls r1, r5, #8
orrs r5, r1
lsls r1, r5, #16
orrs r5, r1
cmp r4, #15
bls 5f
movs r6, r4
subs r6, r6, #16
lsrs r6, r6, #4
adds r6, r6, #1
lsls r6, r6, #4
movs r1, r3
adds r3, r3, r6
4:
str r5, [r1]
str r5, [r1, #4]
str r5, [r1, #8]
str r5, [r1, #12]
adds r1, r1, #16
cmp r3, r1
bne 4b
movs r1, #15
ands r4, r1
cmp r4, #3
bls 7f
5:
subs r6, r4, #4
lsrs r6, r6, #2
adds r6, r6, #1
lsls r6, r6, #2
movs r1, r3
adds r3, r3, r6
6:
stmia r1!, {r5}
cmp r3, r1
bne 6b
movs r1, #3
ands r4, r1
7:
cmp r4, #0
beq 9f
lsls r2, r2, #24
lsrs r2, r2, #24
adds r4, r3, r4
8:
strb r2, [r3]
adds r3, r3, #1
cmp r4, r3
bne 8b
9:
#if __ARM_ARCH >= 5
pop {r4, r5, r6, pc}
#else
pop {r4, r5, r6}
pop {r1}
bx r1
#endif
10:
movs r3, r0
movs r4, r1
b 3b
.size __aeabi_memset, . - __aeabi_memset
|
4ms/metamodule-plugin-sdk
| 2,028
|
plugin-libc/newlib/libc/machine/arm/strcmp-armv4t.S
|
/*
* Copyright (c) 2012-2014 ARM Ltd
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the company may not be used to endorse or promote
* products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/* This version is only used when we want a very basic Thumb1
implementation or for size, otherwise we use the base ARMv4
version. This is also suitable for ARMv6-M. */
.thumb
.syntax unified
.arch armv4t
.eabi_attribute Tag_also_compatible_with, "\006\013" /* ARMv6-M. */
.eabi_attribute Tag_ARM_ISA_use, 0
def_fn strcmp
.cfi_sections .debug_frame
.cfi_startproc
1:
ldrb r2, [r0]
ldrb r3, [r1]
cmp r2, #0
beq 2f
adds r0, r0, #1
adds r1, r1, #1
cmp r2, r3
beq 1b
2:
subs r0, r2, r3
bx lr
.cfi_endproc
.size strcmp, . - strcmp
|
4ms/metamodule-plugin-sdk
| 2,117
|
plugin-libc/newlib/libc/machine/arm/aeabi_memmove-thumb.S
|
/*
* Copyright (c) 2015 ARM Ltd
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the company may not be used to endorse or promote
* products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "arm-acle-compat.h"
.thumb
.syntax unified
.global __aeabi_memmove
.type __aeabi_memmove, %function
ASM_ALIAS __aeabi_memmove4 __aeabi_memmove
ASM_ALIAS __aeabi_memmove8 __aeabi_memmove
__aeabi_memmove:
push {r4, lr}
cmp r0, r1
bls 3f
adds r4, r1, r2
cmp r0, r4
bcs 3f
subs r3, r2, #1
cmp r2, #0
beq 2f
subs r2, r4, r2
1:
ldrb r1, [r2, r3]
strb r1, [r0, r3]
subs r3, r3, #1
bcs 1b
2:
#if __ARM_ARCH >= 5
pop {r4, pc}
#else
pop {r4}
pop {r1}
bx r1
#endif
3:
movs r3, #0
cmp r2, #0
beq 2b
4:
ldrb r4, [r1, r3]
strb r4, [r0, r3]
adds r3, r3, #1
cmp r2, r3
bne 4b
b 2b
.size __aeabi_memmove, . - __aeabi_memmove
|
4ms/metamodule-plugin-sdk
| 1,869
|
plugin-libc/newlib/libc/machine/arm/strcmp-arm-tiny.S
|
/*
* Copyright (c) 2012-2014 ARM Ltd
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the company may not be used to endorse or promote
* products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/* Tiny version of strcmp in ARM state. Used only when optimizing
for size. Also supports Thumb-2. */
#include "arm_asm.h"
.syntax unified
def_fn strcmp
.fnstart
.cfi_sections .debug_frame
.cfi_startproc
prologue
1:
ldrb r2, [r0], #1
ldrb r3, [r1], #1
cmp r2, #1
it cs
cmpcs r2, r3
beq 1b
2:
subs r0, r2, r3
epilogue
.cfi_endproc
.cantunwind
.fnend
.size strcmp, . - strcmp
|
4ms/metamodule-plugin-sdk
| 1,881
|
plugin-libc/newlib/libc/machine/arm/aeabi_memmove-soft.S
|
/*
* Copyright (c) 2015 ARM Ltd
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the company may not be used to endorse or promote
* products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
.macro ASM_ALIAS new old
.global \new
.type \new, %function
#if defined (__thumb__)
.thumb_set \new, \old
#else
.set \new, \old
#endif
.endm
/* NOTE: This ifdef MUST match the one in aeabi_memmove.c. */
#if !defined (__SOFTFP__)
# if defined (__thumb2__)
# include "aeabi_memmove-thumb2.S"
# elif defined (__thumb__)
# include "aeabi_memmove-thumb.S"
# else
# include "aeabi_memmove-arm.S"
# endif
#endif
|
4ms/metamodule-plugin-sdk
| 12,444
|
plugin-libc/newlib/libc/machine/arm/strcmp-armv7.S
|
/*
* Copyright (c) 2012-2014 ARM Ltd
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the company may not be used to endorse or promote
* products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/* Implementation of strcmp for ARMv7 when DSP instructions are
available. Use ldrd to support wider loads, provided the data
is sufficiently aligned. Use saturating arithmetic to optimize
the compares. */
/* Build Options:
STRCMP_NO_PRECHECK: Don't run a quick pre-check of the first
byte in the string. If comparing completely random strings
the pre-check will save time, since there is a very high
probability of a mismatch in the first character: we save
significant overhead if this is the common case. However,
if strings are likely to be identical (eg because we're
verifying a hit in a hash table), then this check is largely
redundant. */
/* This version uses Thumb-2 code. */
.thumb
.syntax unified
#include "arm_asm.h"
/* Parameters and result. */
#define src1 r0
#define src2 r1
#define result r0 /* Overlaps src1. */
/* Internal variables. */
#define tmp1 r4
#define tmp2 r5
#define const_m1 r12
/* Additional internal variables for 64-bit aligned data. */
#define data1a r2
#define data1b r3
#define data2a r6
#define data2b r7
#define syndrome_a tmp1
#define syndrome_b tmp2
/* Additional internal variables for 32-bit aligned data. */
#define data1 r2
#define data2 r3
#define syndrome tmp2
/* Macro to compute and return the result value for word-aligned
cases. */
.macro strcmp_epilogue_aligned synd d1 d2 restore_r6
#ifdef __ARM_BIG_ENDIAN
/* If data1 contains a zero byte, then syndrome will contain a 1 in
bit 7 of that byte. Otherwise, the highest set bit in the
syndrome will highlight the first different bit. It is therefore
sufficient to extract the eight bits starting with the syndrome
bit. */
clz tmp1, \synd
lsl r1, \d2, tmp1
.if \restore_r6
ldrd r6, r7, [sp, #8]
.endif
.cfi_restore 6
.cfi_restore 7
lsl \d1, \d1, tmp1
.cfi_remember_state
lsr result, \d1, #24
ldrd r4, r5, [sp], #16
.cfi_restore 4
.cfi_restore 5
.cfi_adjust_cfa_offset -16
sub result, result, r1, lsr #24
epilogue push_ip=HAVE_PAC_LEAF
#else
/* To use the big-endian trick we'd have to reverse all three words.
that's slower than this approach. */
rev \synd, \synd
clz tmp1, \synd
bic tmp1, tmp1, #7
lsr r1, \d2, tmp1
.cfi_remember_state
.if \restore_r6
ldrd r6, r7, [sp, #8]
.endif
.cfi_restore 6
.cfi_restore 7
lsr \d1, \d1, tmp1
and result, \d1, #255
and r1, r1, #255
ldrd r4, r5, [sp], #16
.cfi_restore 4
.cfi_restore 5
.cfi_adjust_cfa_offset -16
sub result, result, r1
epilogue push_ip=HAVE_PAC_LEAF
#endif
.endm
.text
.p2align 5
def_fn strcmp
.fnstart
.cfi_sections .debug_frame
.cfi_startproc
prologue push_ip=HAVE_PAC_LEAF
#ifndef STRCMP_NO_PRECHECK
ldrb r2, [src1]
ldrb r3, [src2]
cmp r2, #1
it cs
cmpcs r2, r3
bne .Lfastpath_exit
#endif
strd r4, r5, [sp, #-16]!
.cfi_adjust_cfa_offset 16
.cfi_rel_offset 4, 0
.cfi_rel_offset 5, 4
orr tmp1, src1, src2
strd r6, r7, [sp, #8]
.cfi_rel_offset 6, 8
.cfi_rel_offset 7, 12
mvn const_m1, #0
lsl r2, tmp1, #29
cbz r2, .Lloop_aligned8
.Lnot_aligned:
eor tmp1, src1, src2
tst tmp1, #7
bne .Lmisaligned8
/* Deal with mutual misalignment by aligning downwards and then
masking off the unwanted loaded data to prevent a difference. */
and tmp1, src1, #7
bic src1, src1, #7
and tmp2, tmp1, #3
bic src2, src2, #7
lsl tmp2, tmp2, #3 /* Bytes -> bits. */
ldrd data1a, data1b, [src1], #16
tst tmp1, #4
ldrd data2a, data2b, [src2], #16
/* In thumb code we can't use MVN with a register shift, but
we do have ORN. */
S2HI tmp1, const_m1, tmp2
orn data1a, data1a, tmp1
orn data2a, data2a, tmp1
beq .Lstart_realigned8
orn data1b, data1b, tmp1
mov data1a, const_m1
orn data2b, data2b, tmp1
mov data2a, const_m1
b .Lstart_realigned8
/* Unwind the inner loop by a factor of 2, giving 16 bytes per
pass. */
.p2align 5,,12 /* Don't start in the tail bytes of a cache line. */
.p2align 2 /* Always word aligned. */
.Lloop_aligned8:
ldrd data1a, data1b, [src1], #16
ldrd data2a, data2b, [src2], #16
.Lstart_realigned8:
uadd8 syndrome_b, data1a, const_m1 /* Only want GE bits, */
eor syndrome_a, data1a, data2a
sel syndrome_a, syndrome_a, const_m1
cbnz syndrome_a, .Ldiff_in_a
uadd8 syndrome_b, data1b, const_m1 /* Only want GE bits. */
eor syndrome_b, data1b, data2b
sel syndrome_b, syndrome_b, const_m1
cbnz syndrome_b, .Ldiff_in_b
ldrd data1a, data1b, [src1, #-8]
ldrd data2a, data2b, [src2, #-8]
uadd8 syndrome_b, data1a, const_m1 /* Only want GE bits, */
eor syndrome_a, data1a, data2a
sel syndrome_a, syndrome_a, const_m1
uadd8 syndrome_b, data1b, const_m1 /* Only want GE bits. */
eor syndrome_b, data1b, data2b
sel syndrome_b, syndrome_b, const_m1
/* Can't use CBZ for backwards branch. */
orrs syndrome_b, syndrome_b, syndrome_a /* Only need if s_a == 0 */
beq .Lloop_aligned8
.Ldiff_found:
cbnz syndrome_a, .Ldiff_in_a
.Ldiff_in_b:
strcmp_epilogue_aligned syndrome_b, data1b, data2b 1
.Ldiff_in_a:
.cfi_restore_state
strcmp_epilogue_aligned syndrome_a, data1a, data2a 1
.cfi_restore_state
.Lmisaligned8:
tst tmp1, #3
bne .Lmisaligned4
ands tmp1, src1, #3
bne .Lmutual_align4
/* Unrolled by a factor of 2, to reduce the number of post-increment
operations. */
.Lloop_aligned4:
ldr data1, [src1], #8
ldr data2, [src2], #8
.Lstart_realigned4:
uadd8 syndrome, data1, const_m1 /* Only need GE bits. */
eor syndrome, data1, data2
sel syndrome, syndrome, const_m1
cbnz syndrome, .Laligned4_done
ldr data1, [src1, #-4]
ldr data2, [src2, #-4]
uadd8 syndrome, data1, const_m1
eor syndrome, data1, data2
sel syndrome, syndrome, const_m1
cmp syndrome, #0
beq .Lloop_aligned4
.Laligned4_done:
strcmp_epilogue_aligned syndrome, data1, data2, 0
.Lmutual_align4:
.cfi_restore_state
/* Deal with mutual misalignment by aligning downwards and then
masking off the unwanted loaded data to prevent a difference. */
lsl tmp1, tmp1, #3 /* Bytes -> bits. */
bic src1, src1, #3
ldr data1, [src1], #8
bic src2, src2, #3
ldr data2, [src2], #8
/* In thumb code we can't use MVN with a register shift, but
we do have ORN. */
S2HI tmp1, const_m1, tmp1
orn data1, data1, tmp1
orn data2, data2, tmp1
b .Lstart_realigned4
.Lmisaligned4:
ands tmp1, src1, #3
beq .Lsrc1_aligned
sub src2, src2, tmp1
bic src1, src1, #3
lsls tmp1, tmp1, #31
ldr data1, [src1], #4
beq .Laligned_m2
bcs .Laligned_m1
#ifdef STRCMP_NO_PRECHECK
ldrb data2, [src2, #1]
uxtb tmp1, data1, ror #BYTE1_OFFSET
subs tmp1, tmp1, data2
bne .Lmisaligned_exit
cbz data2, .Lmisaligned_exit
.Laligned_m2:
ldrb data2, [src2, #2]
uxtb tmp1, data1, ror #BYTE2_OFFSET
subs tmp1, tmp1, data2
bne .Lmisaligned_exit
cbz data2, .Lmisaligned_exit
.Laligned_m1:
ldrb data2, [src2, #3]
uxtb tmp1, data1, ror #BYTE3_OFFSET
subs tmp1, tmp1, data2
bne .Lmisaligned_exit
add src2, src2, #4
cbnz data2, .Lsrc1_aligned
#else /* STRCMP_NO_PRECHECK */
/* If we've done the pre-check, then we don't need to check the
first byte again here. */
ldrb data2, [src2, #2]
uxtb tmp1, data1, ror #BYTE2_OFFSET
subs tmp1, tmp1, data2
bne .Lmisaligned_exit
cbz data2, .Lmisaligned_exit
.Laligned_m2:
ldrb data2, [src2, #3]
uxtb tmp1, data1, ror #BYTE3_OFFSET
subs tmp1, tmp1, data2
bne .Lmisaligned_exit
cbnz data2, .Laligned_m1
#endif
.Lmisaligned_exit:
.cfi_remember_state
mov result, tmp1
ldr r4, [sp], #16
.cfi_restore 4
.cfi_adjust_cfa_offset -16
epilogue push_ip=HAVE_PAC_LEAF
#ifndef STRCMP_NO_PRECHECK
.Lfastpath_exit:
.cfi_restore_state
.cfi_remember_state
sub r0, r2, r3
epilogue push_ip=HAVE_PAC_LEAF
.Laligned_m1:
.cfi_restore_state
.cfi_remember_state
add src2, src2, #4
#endif
.Lsrc1_aligned:
.cfi_restore_state
/* src1 is word aligned, but src2 has no common alignment
with it. */
ldr data1, [src1], #4
lsls tmp1, src2, #31 /* C=src2[1], Z=src2[0]. */
bic src2, src2, #3
ldr data2, [src2], #4
bhi .Loverlap1 /* C=1, Z=0 => src2[1:0] = 0b11. */
bcs .Loverlap2 /* C=1, Z=1 => src2[1:0] = 0b10. */
/* (overlap3) C=0, Z=0 => src2[1:0] = 0b01. */
.Loverlap3:
bic tmp1, data1, #MSB
uadd8 syndrome, data1, const_m1
eors syndrome, tmp1, data2, S2LO #8
sel syndrome, syndrome, const_m1
bne 4f
cbnz syndrome, 5f
ldr data2, [src2], #4
eor tmp1, tmp1, data1
cmp tmp1, data2, S2HI #24
bne 6f
ldr data1, [src1], #4
b .Loverlap3
4:
S2LO data2, data2, #8
b .Lstrcmp_tail
5:
bics syndrome, syndrome, #MSB
bne .Lstrcmp_done_equal
/* We can only get here if the MSB of data1 contains 0, so
fast-path the exit. */
ldrb result, [src2]
.cfi_remember_state
ldrd r4, r5, [sp], #16
.cfi_restore 4
.cfi_restore 5
/* R6/7 Not used in this sequence. */
.cfi_restore 6
.cfi_restore 7
.cfi_adjust_cfa_offset -16
neg result, result
epilogue push_ip=HAVE_PAC_LEAF
6:
.cfi_restore_state
S2LO data1, data1, #24
and data2, data2, #LSB
b .Lstrcmp_tail
.p2align 5,,12 /* Ensure at least 3 instructions in cache line. */
.Loverlap2:
and tmp1, data1, const_m1, S2LO #16
uadd8 syndrome, data1, const_m1
eors syndrome, tmp1, data2, S2LO #16
sel syndrome, syndrome, const_m1
bne 4f
cbnz syndrome, 5f
ldr data2, [src2], #4
eor tmp1, tmp1, data1
cmp tmp1, data2, S2HI #16
bne 6f
ldr data1, [src1], #4
b .Loverlap2
4:
S2LO data2, data2, #16
b .Lstrcmp_tail
5:
ands syndrome, syndrome, const_m1, S2LO #16
bne .Lstrcmp_done_equal
ldrh data2, [src2]
S2LO data1, data1, #16
#ifdef __ARM_BIG_ENDIAN
lsl data2, data2, #16
#endif
b .Lstrcmp_tail
6:
S2LO data1, data1, #16
and data2, data2, const_m1, S2LO #16
b .Lstrcmp_tail
.p2align 5,,12 /* Ensure at least 3 instructions in cache line. */
.Loverlap1:
and tmp1, data1, #LSB
uadd8 syndrome, data1, const_m1
eors syndrome, tmp1, data2, S2LO #24
sel syndrome, syndrome, const_m1
bne 4f
cbnz syndrome, 5f
ldr data2, [src2], #4
eor tmp1, tmp1, data1
cmp tmp1, data2, S2HI #8
bne 6f
ldr data1, [src1], #4
b .Loverlap1
4:
S2LO data2, data2, #24
b .Lstrcmp_tail
5:
tst syndrome, #LSB
bne .Lstrcmp_done_equal
ldr data2, [src2]
6:
S2LO data1, data1, #8
bic data2, data2, #MSB
b .Lstrcmp_tail
.Lstrcmp_done_equal:
mov result, #0
.cfi_remember_state
ldrd r4, r5, [sp], #16
.cfi_restore 4
.cfi_restore 5
/* R6/7 not used in this sequence. */
.cfi_restore 6
.cfi_restore 7
.cfi_adjust_cfa_offset -16
epilogue push_ip=HAVE_PAC_LEAF
.Lstrcmp_tail:
.cfi_restore_state
#ifndef __ARM_BIG_ENDIAN
rev data1, data1
rev data2, data2
/* Now everything looks big-endian... */
#endif
uadd8 tmp1, data1, const_m1
eor tmp1, data1, data2
sel syndrome, tmp1, const_m1
clz tmp1, syndrome
lsl data1, data1, tmp1
lsl data2, data2, tmp1
lsr result, data1, #24
ldrd r4, r5, [sp], #16
.cfi_restore 4
.cfi_restore 5
/* R6/7 not used in this sequence. */
.cfi_restore 6
.cfi_restore 7
.cfi_adjust_cfa_offset -16
sub result, result, data2, lsr #24
epilogue push_ip=HAVE_PAC_LEAF
.cfi_endproc
.cantunwind
.fnend
.size strcmp, . - strcmp
|
4ms/metamodule-plugin-sdk
| 8,375
|
plugin-libc/newlib/libc/machine/arm/memcpy-armv7m.S
|
/*
* Copyright (c) 2013 ARM Ltd
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the company may not be used to endorse or promote
* products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/* This memcpy routine is optimised for Cortex-M3/M4 cores with/without
unaligned access.
If compiled with GCC, this file should be enclosed within following
pre-processing check:
if defined (__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
Prototype: void *memcpy (void *dst, const void *src, size_t count);
The job will be done in 5 steps.
Step 1: Align src/dest pointers, copy mis-aligned if fail to align both
Step 2: Repeatedly copy big block size of __OPT_BIG_BLOCK_SIZE
Step 3: Repeatedly copy big block size of __OPT_MID_BLOCK_SIZE
Step 4: Copy word by word
Step 5: Copy byte-to-byte
Tunable options:
__OPT_BIG_BLOCK_SIZE: Size of big block in words. Default to 64.
__OPT_MID_BLOCK_SIZE: Size of big block in words. Default to 16.
*/
#include "arm_asm.h"
#ifndef __OPT_BIG_BLOCK_SIZE
#define __OPT_BIG_BLOCK_SIZE (4 * 16)
#endif
#ifndef __OPT_MID_BLOCK_SIZE
#define __OPT_MID_BLOCK_SIZE (4 * 4)
#endif
#if __OPT_BIG_BLOCK_SIZE == 16
#define BEGIN_UNROLL_BIG_BLOCK \
.irp offset, 0,4,8,12
#elif __OPT_BIG_BLOCK_SIZE == 32
#define BEGIN_UNROLL_BIG_BLOCK \
.irp offset, 0,4,8,12,16,20,24,28
#elif __OPT_BIG_BLOCK_SIZE == 64
#define BEGIN_UNROLL_BIG_BLOCK \
.irp offset, 0,4,8,12,16,20,24,28,32,36,40,44,48,52,56,60
#else
#error "Illegal __OPT_BIG_BLOCK_SIZE"
#endif
#if __OPT_MID_BLOCK_SIZE == 8
#define BEGIN_UNROLL_MID_BLOCK \
.irp offset, 0,4
#elif __OPT_MID_BLOCK_SIZE == 16
#define BEGIN_UNROLL_MID_BLOCK \
.irp offset, 0,4,8,12
#else
#error "Illegal __OPT_MID_BLOCK_SIZE"
#endif
#define END_UNROLL .endr
.syntax unified
.text
.align 2
.global memcpy
.thumb
.thumb_func
.fnstart
.cfi_startproc
.type memcpy, %function
memcpy:
@ r0: dst
@ r1: src
@ r2: len
#ifdef __ARM_FEATURE_UNALIGNED
/* In case of UNALIGNED access supported, ip is not used in
function body. */
prologue push_ip=HAVE_PAC_LEAF
mov ip, r0
#else
prologue 0 push_ip=HAVE_PAC_LEAF
#endif /* __ARM_FEATURE_UNALIGNED */
orr r3, r1, r0
ands r3, r3, #3
bne .Lmisaligned_copy
.Lbig_block:
subs r2, __OPT_BIG_BLOCK_SIZE
blo .Lmid_block
/* Kernel loop for big block copy */
.align 2
.Lbig_block_loop:
BEGIN_UNROLL_BIG_BLOCK
#ifdef __ARM_ARCH_7EM__
ldr r3, [r1], #4
str r3, [r0], #4
END_UNROLL
#else /* __ARM_ARCH_7M__ */
ldr r3, [r1, \offset]
str r3, [r0, \offset]
END_UNROLL
adds r0, __OPT_BIG_BLOCK_SIZE
adds r1, __OPT_BIG_BLOCK_SIZE
#endif
subs r2, __OPT_BIG_BLOCK_SIZE
bhs .Lbig_block_loop
.Lmid_block:
adds r2, __OPT_BIG_BLOCK_SIZE - __OPT_MID_BLOCK_SIZE
blo .Lcopy_word_by_word
/* Kernel loop for mid-block copy */
.align 2
.Lmid_block_loop:
BEGIN_UNROLL_MID_BLOCK
#ifdef __ARM_ARCH_7EM__
ldr r3, [r1], #4
str r3, [r0], #4
END_UNROLL
#else /* __ARM_ARCH_7M__ */
ldr r3, [r1, \offset]
str r3, [r0, \offset]
END_UNROLL
adds r0, __OPT_MID_BLOCK_SIZE
adds r1, __OPT_MID_BLOCK_SIZE
#endif
subs r2, __OPT_MID_BLOCK_SIZE
bhs .Lmid_block_loop
.Lcopy_word_by_word:
adds r2, __OPT_MID_BLOCK_SIZE - 4
blo .Lcopy_less_than_4
/* Kernel loop for small block copy */
.align 2
.Lcopy_word_by_word_loop:
ldr r3, [r1], #4
str r3, [r0], #4
subs r2, #4
bhs .Lcopy_word_by_word_loop
.Lcopy_less_than_4:
adds r2, #4
beq .Ldone
lsls r2, r2, #31
itt ne
ldrbne r3, [r1], #1
strbne r3, [r0], #1
bcc .Ldone
#ifdef __ARM_FEATURE_UNALIGNED
ldrh r3, [r1]
strh r3, [r0]
#else
ldrb r3, [r1]
strb r3, [r0]
ldrb r3, [r1, #1]
strb r3, [r0, #1]
#endif /* __ARM_FEATURE_UNALIGNED */
.Ldone:
.cfi_remember_state
#ifdef __ARM_FEATURE_UNALIGNED
mov r0, ip
epilogue push_ip=HAVE_PAC_LEAF
#else
epilogue 0 push_ip=HAVE_PAC_LEAF
#endif /* __ARM_FEATURE_UNALIGNED */
.align 2
.Lmisaligned_copy:
.cfi_restore_state
#ifdef __ARM_FEATURE_UNALIGNED
/* Define label DST_ALIGNED to BIG_BLOCK. It will go to aligned copy
once destination is adjusted to aligned. */
#define Ldst_aligned Lbig_block
/* Copy word by word using LDR when alignment can be done in hardware,
i.e., SCTLR.A is set, supporting unaligned access in LDR and STR. */
cmp r2, #8
blo .Lbyte_copy
/* if src is aligned, just go to the big block loop. */
lsls r3, r1, #30
beq .Ldst_aligned
#else
/* if len < 12, misalignment adjustment has more overhead than
just byte-to-byte copy. Also, len must >=8 to guarantee code
afterward work correctly. */
cmp r2, #12
blo .Lbyte_copy
#endif /* __ARM_FEATURE_UNALIGNED */
/* Align dst only, not trying to align src. That is the because
handling of aligned src and misaligned dst need more overhead than
otherwise. By doing this the worst case is when initial src is aligned,
additional up to 4 byte additional copy will executed, which is
acceptable. */
ands r3, r0, #3
beq .Ldst_aligned
rsb r3, #4
subs r2, r3
lsls r3, r3, #31
itt ne
ldrbne r3, [r1], #1
strbne r3, [r0], #1
bcc .Ldst_aligned
#ifdef __ARM_FEATURE_UNALIGNED
ldrh r3, [r1], #2
strh r3, [r0], #2
b .Ldst_aligned
#else
ldrb r3, [r1], #1
strb r3, [r0], #1
ldrb r3, [r1], #1
strb r3, [r0], #1
/* Now that dst is aligned */
.Ldst_aligned:
/* if r1 is aligned now, it means r0/r1 has the same misalignment,
and they are both aligned now. Go aligned copy. */
ands r3, r1, #3
beq .Lbig_block
/* dst is aligned, but src isn't. Misaligned copy. */
push {r4, r5}
.cfi_adjust_cfa_offset 8
.cfi_rel_offset 4, 0
.cfi_rel_offset 5, 4
subs r2, #4
/* Backward r1 by misaligned bytes, to make r1 aligned.
Since we need to restore r1 to unaligned address after the loop,
we need keep the offset bytes to ip and sub it from r1 afterward. */
subs r1, r3
rsb ip, r3, #4
/* Pre-load on word */
ldr r4, [r1], #4
cmp r3, #2
beq .Lmisaligned_copy_2_2
cmp r3, #3
beq .Lmisaligned_copy_3_1
.macro mis_src_copy shift
1:
#ifdef __ARM_BIG_ENDIAN
lsls r4, r4, \shift
#else
lsrs r4, r4, \shift
#endif
ldr r3, [r1], #4
#ifdef __ARM_BIG_ENDIAN
lsrs r5, r3, 32-\shift
#else
lsls r5, r3, 32-\shift
#endif
orr r4, r4, r5
str r4, [r0], #4
mov r4, r3
subs r2, #4
bhs 1b
.endm
.Lmisaligned_copy_1_3:
mis_src_copy shift=8
b .Lsrc_misaligned_tail
.Lmisaligned_copy_3_1:
mis_src_copy shift=24
b .Lsrc_misaligned_tail
.Lmisaligned_copy_2_2:
/* For 2_2 misalignment, ldr is still faster than 2 x ldrh. */
mis_src_copy shift=16
.Lsrc_misaligned_tail:
adds r2, #4
subs r1, ip
pop {r4, r5}
.cfi_restore 4
.cfi_restore 5
.cfi_adjust_cfa_offset -8
#endif /* __ARM_FEATURE_UNALIGNED */
.Lbyte_copy:
subs r2, #4
blo .Lcopy_less_than_4
.Lbyte_copy_loop:
subs r2, #1
ldrb r3, [r1], #1
strb r3, [r0], #1
bhs .Lbyte_copy_loop
ldrb r3, [r1]
strb r3, [r0]
ldrb r3, [r1, #1]
strb r3, [r0, #1]
ldrb r3, [r1, #2]
strb r3, [r0, #2]
#ifdef __ARM_FEATURE_UNALIGNED
mov r0, ip
epilogue push_ip=HAVE_PAC_LEAF
#else
epilogue 0 push_ip=HAVE_PAC_LEAF
#endif /* __ARM_FEATURE_UNALIGNED */
.cfi_endproc
.cantunwind
.fnend
.size memcpy, .-memcpy
|
4ms/metamodule-plugin-sdk
| 2,172
|
plugin-libc/newlib/libc/machine/arm/strlen-thumb2-Os.S
|
/* Copyright (c) 2015 ARM Ltd.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of the Linaro nor the
names of its contributors may be used to endorse or promote products
derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
#include "arm-acle-compat.h"
#include "arm_asm.h"
.macro def_fn f p2align=0
.text
.p2align \p2align
.global \f
.type \f, %function
\f:
.endm
#if __ARM_ARCH_PROFILE == 'M' && __ARM_ARCH >= 8
/* keep config inherited from -march=. */
#elif __ARM_ARCH_ISA_THUMB >= 2 && __ARM_ARCH >= 7
.arch armv7
#else
.arch armv6t2
#endif
.eabi_attribute Tag_ARM_ISA_use, 0
.thumb
.syntax unified
def_fn strlen p2align=1
.fnstart
.cfi_startproc
prologue
mov r3, r0
1: ldrb.w r2, [r3], #1
cmp r2, #0
bne 1b
subs r0, r3, r0
subs r0, #1
epilogue
.cfi_endproc
.cantunwind
.fnend
.size strlen, . - strlen
|
4ms/metamodule-plugin-sdk
| 2,015
|
plugin-libc/newlib/libc/machine/arm/aeabi_memmove-arm.S
|
/*
* Copyright (c) 2015 ARM Ltd
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the company may not be used to endorse or promote
* products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
.arm
.syntax unified
.global __aeabi_memmove
.type __aeabi_memmove, %function
ASM_ALIAS __aeabi_memmove4 __aeabi_memmove
ASM_ALIAS __aeabi_memmove8 __aeabi_memmove
__aeabi_memmove:
cmp r0, r1
bls 2f
add r3, r1, r2
cmp r0, r3
bcs 2f
cmp r2, #0
add r1, r0, r2
bxeq lr
rsb r2, r2, r3
1:
ldrb ip, [r3, #-1]!
cmp r2, r3
strb ip, [r1, #-1]!
bne 1b
bx lr
2:
cmp r2, #0
addne r2, r1, r2
subne r3, r0, #1
beq 4f
3:
ldrb ip, [r1], #1
cmp r2, r1
strb ip, [r3, #1]!
bne 3b
bx lr
4:
bx lr
.size __aeabi_memmove, . - __aeabi_memmove
|
4ms/metamodule-plugin-sdk
| 12,693
|
plugin-libc/newlib/libc/machine/arm/memchr.S
|
/* Copyright (c) 2010-2011, Linaro Limited
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of Linaro Limited nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Written by Dave Gilbert <david.gilbert@linaro.org>
This memchr routine is optimised on a Cortex-A9 and should work on
all ARMv7 processors. It has a fast path for short sizes, and has
an optimised path for large data sets; the worst case is finding the
match early in a large data set. */
/* Copyright (c) 2015 ARM Ltd.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of the Linaro nor the
names of its contributors may be used to endorse or promote products
derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
@ 2011-02-07 david.gilbert@linaro.org
@ Extracted from local git a5b438d861
@ 2011-07-14 david.gilbert@linaro.org
@ Import endianness fix from local git ea786f1b
@ 2011-10-11 david.gilbert@linaro.org
@ Import from cortex-strings bzr rev 63
@ Flip to ldrd (as suggested by Greta Yorsh)
@ Make conditional on CPU type
@ tidy
@ This code requires armv6t2 or later. Uses Thumb2.
.syntax unified
#include "../../../../include/arm-acle-compat.h"
#include "arm_asm.h"
@ NOTE: This ifdef MUST match the one in memchr-stub.c
#if defined (__ARM_NEON__) || defined (__ARM_NEON)
#if __ARM_ARCH >= 8 && __ARM_ARCH_PROFILE == 'R'
.arch armv8-r
#else
.arch armv7-a
#endif
.fpu neon
/* Arguments */
#define srcin r0
#define chrin r1
#define cntin r2
/* Retval */
#define result r0 /* Live range does not overlap with srcin */
/* Working registers */
#define src r1 /* Live range does not overlap with chrin */
#define tmp r3
#define synd r0 /* No overlap with srcin or result */
#define soff r12
/* Working NEON registers */
#define vrepchr q0
#define vdata0 q1
#define vdata0_0 d2 /* Lower half of vdata0 */
#define vdata0_1 d3 /* Upper half of vdata0 */
#define vdata1 q2
#define vdata1_0 d4 /* Lower half of vhas_chr0 */
#define vdata1_1 d5 /* Upper half of vhas_chr0 */
#define vrepmask q3
#define vrepmask0 d6
#define vrepmask1 d7
#define vend q4
#define vend0 d8
#define vend1 d9
/*
* Core algorithm:
*
* For each 32-byte chunk we calculate a 32-bit syndrome value, with one bit per
* byte. Each bit is set if the relevant byte matched the requested character
* and cleared otherwise. Since the bits in the syndrome reflect exactly the
* order in which things occur in the original string, counting trailing zeros
* allows to identify exactly which byte has matched.
*/
.text
.thumb_func
.align 4
.p2align 4,,15
.global memchr
.type memchr,%function
memchr:
.cfi_sections .debug_frame
.cfi_startproc
/* Use a simple loop if there are less than 8 bytes to search. */
cmp cntin, #7
bhi .Llargestr
and chrin, chrin, #0xff
.Lsmallstr:
subs cntin, cntin, #1
blo .Lnotfound /* Return not found if reached end. */
ldrb tmp, [srcin], #1
cmp tmp, chrin
bne .Lsmallstr /* Loop again if not found. */
/* Otherwise fixup address and return. */
sub result, result, #1
bx lr
.Llargestr:
vdup.8 vrepchr, chrin /* Duplicate char across all lanes. */
/*
* Magic constant 0x8040201008040201 allows us to identify which lane
* matches the requested byte.
*/
movw tmp, #0x0201
movt tmp, #0x0804
lsl soff, tmp, #4
vmov vrepmask0, tmp, soff
vmov vrepmask1, tmp, soff
/* Work with aligned 32-byte chunks */
bic src, srcin, #31
ands soff, srcin, #31
beq .Lloopintro /* Go straight to main loop if it's aligned. */
/*
* Input string is not 32-byte aligned. We calculate the syndrome
* value for the aligned 32 bytes block containing the first bytes
* and mask the irrelevant part.
*/
vld1.8 {vdata0, vdata1}, [src:256]!
sub tmp, soff, #32
adds cntin, cntin, tmp
vceq.i8 vdata0, vdata0, vrepchr
vceq.i8 vdata1, vdata1, vrepchr
vand vdata0, vdata0, vrepmask
vand vdata1, vdata1, vrepmask
vpadd.i8 vdata0_0, vdata0_0, vdata0_1
vpadd.i8 vdata1_0, vdata1_0, vdata1_1
vpadd.i8 vdata0_0, vdata0_0, vdata1_0
vpadd.i8 vdata0_0, vdata0_0, vdata0_0
vmov synd, vdata0_0[0]
/* Clear the soff lower bits */
lsr synd, synd, soff
lsl synd, synd, soff
/* The first block can also be the last */
bls .Lmasklast
/* Have we found something already? */
cbnz synd, .Ltail
.Lloopintro:
vpush {vend}
/* 264/265 correspond to d8/d9 for q4 */
.cfi_adjust_cfa_offset 16
.cfi_rel_offset 264, 0
.cfi_rel_offset 265, 8
.p2align 3,,7
.Lloop:
vld1.8 {vdata0, vdata1}, [src:256]!
subs cntin, cntin, #32
vceq.i8 vdata0, vdata0, vrepchr
vceq.i8 vdata1, vdata1, vrepchr
/* If we're out of data we finish regardless of the result. */
bls .Lend
/* Use a fast check for the termination condition. */
vorr vend, vdata0, vdata1
vorr vend0, vend0, vend1
vmov synd, tmp, vend0
orrs synd, synd, tmp
/* We're not out of data, loop if we haven't found the character. */
beq .Lloop
.Lend:
vpop {vend}
.cfi_adjust_cfa_offset -16
.cfi_restore 264
.cfi_restore 265
/* Termination condition found, let's calculate the syndrome value. */
vand vdata0, vdata0, vrepmask
vand vdata1, vdata1, vrepmask
vpadd.i8 vdata0_0, vdata0_0, vdata0_1
vpadd.i8 vdata1_0, vdata1_0, vdata1_1
vpadd.i8 vdata0_0, vdata0_0, vdata1_0
vpadd.i8 vdata0_0, vdata0_0, vdata0_0
vmov synd, vdata0_0[0]
cbz synd, .Lnotfound
bhi .Ltail
.Lmasklast:
/* Clear the (-cntin) upper bits to avoid out-of-bounds matches. */
neg cntin, cntin
lsl synd, synd, cntin
lsrs synd, synd, cntin
it eq
moveq src, #0 /* If no match, set src to 0 so the retval is 0. */
.Ltail:
/* Count the trailing zeros using bit reversing */
rbit synd, synd
/* Compensate the last post-increment */
sub src, src, #32
/* Count the leading zeros */
clz synd, synd
/* Compute the potential result and return */
add result, src, synd
bx lr
.Lnotfound:
/* Set result to NULL if not found and return */
mov result, #0
bx lr
.cfi_endproc
.size memchr, . - memchr
#elif __ARM_ARCH_ISA_THUMB >= 2 && defined (__ARM_FEATURE_DSP)
#if __ARM_ARCH_PROFILE == 'M'
#if __ARM_ARCH >= 8
/* keep config inherited from -march=. */
#else
.arch armv7e-m
#endif /* __ARM_ARCH >= 8 */
#else
.arch armv6t2
#endif /* __ARM_ARCH_PROFILE == 'M' */
@ this lets us check a flag in a 00/ff byte easily in either endianness
#ifdef __ARMEB__
#define CHARTSTMASK(c) 1<<(31-(c*8))
#else
#define CHARTSTMASK(c) 1<<(c*8)
#endif
.text
.thumb
@ ---------------------------------------------------------------------------
.thumb_func
.align 2
.p2align 4,,15
.global memchr
.type memchr,%function
.fnstart
.cfi_startproc
memchr:
@ r0 = start of memory to scan
@ r1 = character to look for
@ r2 = length
@ returns r0 = pointer to character or NULL if not found
prologue
and r1,r1,#0xff @ Don't trust the caller to pass a char
cmp r2,#16 @ If short don't bother with anything clever
blt 20f
tst r0, #7 @ If it's already aligned skip the next bit
beq 10f
@ Work up to an aligned point
5:
ldrb r3, [r0],#1
subs r2, r2, #1
cmp r3, r1
beq 50f @ If it matches exit found
tst r0, #7
cbz r2, 40f @ If we run off the end, exit not found
bne 5b @ If not aligned yet then do next byte
10:
@ We are aligned, we know we have at least 8 bytes to work with
push {r4,r5,r6,r7}
.cfi_adjust_cfa_offset 16
.cfi_rel_offset 4, 0
.cfi_rel_offset 5, 4
.cfi_rel_offset 6, 8
.cfi_rel_offset 7, 12
orr r1, r1, r1, lsl #8 @ expand the match word across all bytes
orr r1, r1, r1, lsl #16
bic r4, r2, #7 @ Number of double words to work with * 8
mvns r7, #0 @ all F's
movs r3, #0
15:
ldrd r5,r6,[r0],#8
subs r4, r4, #8
eor r5,r5, r1 @ r5,r6 have 00's where bytes match the target
eor r6,r6, r1
uadd8 r5, r5, r7 @ Par add 0xff - sets GE bits for bytes!=0
sel r5, r3, r7 @ bytes are 00 for none-00 bytes,
@ or ff for 00 bytes - NOTE INVERSION
uadd8 r6, r6, r7 @ Par add 0xff - sets GE bits for bytes!=0
sel r6, r5, r7 @ chained....bytes are 00 for none-00 bytes
@ or ff for 00 bytes - NOTE INVERSION
cbnz r6, 60f
bne 15b @ (Flags from the subs above)
pop {r4,r5,r6,r7}
.cfi_restore 7
.cfi_restore 6
.cfi_restore 5
.cfi_restore 4
.cfi_adjust_cfa_offset -16
and r1,r1,#0xff @ r1 back to a single character
and r2,r2,#7 @ Leave the count remaining as the number
@ after the double words have been done
20:
cbz r2, 40f @ 0 length or hit the end already then not found
21: @ Post aligned section, or just a short call
ldrb r3,[r0],#1
subs r2,r2,#1
eor r3,r3,r1 @ r3 = 0 if match - doesn't break flags from sub
cbz r3, 50f
bne 21b @ on r2 flags
40:
.cfi_remember_state
movs r0,#0 @ not found
epilogue
50:
.cfi_restore_state
.cfi_remember_state
subs r0,r0,#1 @ found
epilogue
60: @ We're here because the fast path found a hit
@ now we have to track down exactly which word it was
@ r0 points to the start of the double word after the one tested
@ r5 has the 00/ff pattern for the first word, r6 has the chained value
@ This point is reached from cbnz midway through label 15 prior to
@ popping r4-r7 off the stack. .cfi_restore_state alone disregards
@ this, so we manually correct this.
.cfi_restore_state @ Standard post-prologue state
.cfi_adjust_cfa_offset 16
.cfi_rel_offset 4, 0
.cfi_rel_offset 5, 4
.cfi_rel_offset 6, 8
.cfi_rel_offset 7, 12
cmp r5, #0
itte eq
moveq r5, r6 @ the end is in the 2nd word
subeq r0,r0,#3 @ Points to 2nd byte of 2nd word
subne r0,r0,#7 @ or 2nd byte of 1st word
@ r0 currently points to the 2nd byte of the word containing the hit
tst r5, # CHARTSTMASK(0) @ 1st character
bne 61f
adds r0,r0,#1
tst r5, # CHARTSTMASK(1) @ 2nd character
ittt eq
addeq r0,r0,#1
tsteq r5, # (3<<15) @ 2nd & 3rd character
@ If not the 3rd must be the last one
addeq r0,r0,#1
61:
pop {r4,r5,r6,r7}
.cfi_restore 7
.cfi_restore 6
.cfi_restore 5
.cfi_restore 4
.cfi_adjust_cfa_offset -16
subs r0,r0,#1
epilogue
.cfi_endproc
.cantunwind
.fnend
#else
/* Defined in memchr-stub.c. */
#endif
|
4ms/metamodule-plugin-sdk
| 1,877
|
plugin-libc/newlib/libc/machine/arm/aeabi_memset-soft.S
|
/*
* Copyright (c) 2015 ARM Ltd
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the company may not be used to endorse or promote
* products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
.macro ASM_ALIAS new old
.global \new
.type \new, %function
#if defined (__thumb__)
.thumb_set \new, \old
#else
.set \new, \old
#endif
.endm
/* NOTE: This ifdef MUST match the one in aeabi_memset.c. */
#if !defined (__SOFTFP__)
# if defined (__thumb2__)
# include "aeabi_memset-thumb2.S"
# elif defined (__thumb__)
# include "aeabi_memset-thumb.S"
# else
# include "aeabi_memset-arm.S"
# endif
#endif
|
4ms/metamodule-plugin-sdk
| 2,146
|
plugin-libc/newlib/libc/machine/arm/strlen.S
|
/* Copyright (c) 2015 ARM Ltd.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of the Linaro nor the
names of its contributors may be used to endorse or promote products
derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
#include "../../../../include/arm-acle-compat.h"
#if defined __OPTIMIZE_SIZE__ || defined PREFER_SIZE_OVER_SPEED
#if __ARM_ARCH_ISA_THUMB == 2
#include "strlen-thumb2-Os.S"
#elif defined (__ARM_ARCH_ISA_THUMB)
#include "strlen-thumb1-Os.S"
#else
/* Implemented in strlen-stub.c. */
#endif
#else /* defined __OPTIMIZE_SIZE__ || defined PREFER_SIZE_OVER_SPEED */
#if defined __thumb__ && ! defined __thumb2__
/* Implemented in strlen-stub.c. */
#elif __ARM_ARCH_ISA_THUMB >= 2 && defined __ARM_FEATURE_DSP
#include "strlen-armv7.S"
#else
/* Implemented in strlen-stub.c. */
#endif
#endif
|
4ms/metamodule-plugin-sdk
| 11,787
|
plugin-libc/newlib/libc/machine/arm/strcmp-armv6.S
|
/*
* Copyright (c) 2012-2014 ARM Ltd
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the company may not be used to endorse or promote
* products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/* Implementation of strcmp for ARMv6. Use ldrd to support wider
loads, provided the data is sufficiently aligned. Use
saturating arithmetic to optimize the compares. */
/* Build Options:
STRCMP_NO_PRECHECK: Don't run a quick pre-check of the first
byte in the string. If comparing completely random strings
the pre-check will save time, since there is a very high
probability of a mismatch in the first character: we save
significant overhead if this is the common case. However,
if strings are likely to be identical (eg because we're
verifying a hit in a hash table), then this check is largely
redundant. */
.arm
/* Parameters and result. */
#define src1 r0
#define src2 r1
#define result r0 /* Overlaps src1. */
/* Internal variables. */
#define tmp1 r4
#define tmp2 r5
#define const_m1 r12
/* Additional internal variables for 64-bit aligned data. */
#define data1a r2
#define data1b r3
#define data2a r6
#define data2b r7
#define syndrome_a tmp1
#define syndrome_b tmp2
/* Additional internal variables for 32-bit aligned data. */
#define data1 r2
#define data2 r3
#define syndrome tmp2
/* Macro to compute and return the result value for word-aligned
cases. */
.macro strcmp_epilogue_aligned synd d1 d2 restore_r6
#ifdef __ARM_BIG_ENDIAN
/* If data1 contains a zero byte, then syndrome will contain a 1 in
bit 7 of that byte. Otherwise, the highest set bit in the
syndrome will highlight the first different bit. It is therefore
sufficient to extract the eight bits starting with the syndrome
bit. */
clz tmp1, \synd
lsl r1, \d2, tmp1
.if \restore_r6
ldrd r6, r7, [sp, #8]
.endif
.cfi_restore 6
.cfi_restore 7
lsl \d1, \d1, tmp1
.cfi_remember_state
lsr result, \d1, #24
ldrd r4, r5, [sp], #16
.cfi_restore 4
.cfi_restore 5
sub result, result, r1, lsr #24
bx lr
#else
/* To use the big-endian trick we'd have to reverse all three words.
that's slower than this approach. */
rev \synd, \synd
clz tmp1, \synd
bic tmp1, tmp1, #7
lsr r1, \d2, tmp1
.cfi_remember_state
.if \restore_r6
ldrd r6, r7, [sp, #8]
.endif
.cfi_restore 6
.cfi_restore 7
lsr \d1, \d1, tmp1
and result, \d1, #255
and r1, r1, #255
ldrd r4, r5, [sp], #16
.cfi_restore 4
.cfi_restore 5
sub result, result, r1
bx lr
#endif
.endm
.text
.p2align 5
.Lstrcmp_start_addr:
#ifndef STRCMP_NO_PRECHECK
.Lfastpath_exit:
sub r0, r2, r3
bx lr
#endif
def_fn strcmp
#ifndef STRCMP_NO_PRECHECK
ldrb r2, [src1]
ldrb r3, [src2]
cmp r2, #1
cmpcs r2, r3
bne .Lfastpath_exit
#endif
.cfi_sections .debug_frame
.cfi_startproc
strd r4, r5, [sp, #-16]!
.cfi_def_cfa_offset 16
.cfi_offset 4, -16
.cfi_offset 5, -12
orr tmp1, src1, src2
strd r6, r7, [sp, #8]
.cfi_offset 6, -8
.cfi_offset 7, -4
mvn const_m1, #0
tst tmp1, #7
beq .Lloop_aligned8
.Lnot_aligned:
eor tmp1, src1, src2
tst tmp1, #7
bne .Lmisaligned8
/* Deal with mutual misalignment by aligning downwards and then
masking off the unwanted loaded data to prevent a difference. */
and tmp1, src1, #7
bic src1, src1, #7
and tmp2, tmp1, #3
bic src2, src2, #7
lsl tmp2, tmp2, #3 /* Bytes -> bits. */
ldrd data1a, data1b, [src1], #16
tst tmp1, #4
ldrd data2a, data2b, [src2], #16
/* In ARM code we can't use ORN, but with do have MVN with a
register shift. */
mvn tmp1, const_m1, S2HI tmp2
orr data1a, data1a, tmp1
orr data2a, data2a, tmp1
beq .Lstart_realigned8
orr data1b, data1b, tmp1
mov data1a, const_m1
orr data2b, data2b, tmp1
mov data2a, const_m1
b .Lstart_realigned8
/* Unwind the inner loop by a factor of 2, giving 16 bytes per
pass. */
.p2align 5,,12 /* Don't start in the tail bytes of a cache line. */
.p2align 2 /* Always word aligned. */
.Lloop_aligned8:
ldrd data1a, data1b, [src1], #16
ldrd data2a, data2b, [src2], #16
.Lstart_realigned8:
uadd8 syndrome_b, data1a, const_m1 /* Only want GE bits, */
eor syndrome_a, data1a, data2a
sel syndrome_a, syndrome_a, const_m1
uadd8 syndrome_b, data1b, const_m1 /* Only want GE bits. */
eor syndrome_b, data1b, data2b
sel syndrome_b, syndrome_b, const_m1
orrs syndrome_b, syndrome_b, syndrome_a /* Only need if s_a == 0 */
bne .Ldiff_found
ldrd data1a, data1b, [src1, #-8]
ldrd data2a, data2b, [src2, #-8]
uadd8 syndrome_b, data1a, const_m1 /* Only want GE bits, */
eor syndrome_a, data1a, data2a
sel syndrome_a, syndrome_a, const_m1
uadd8 syndrome_b, data1b, const_m1 /* Only want GE bits. */
eor syndrome_b, data1b, data2b
sel syndrome_b, syndrome_b, const_m1
orrs syndrome_b, syndrome_b, syndrome_a /* Only need if s_a == 0 */
beq .Lloop_aligned8
.Ldiff_found:
cmp syndrome_a, #0
bne .Ldiff_in_a
.Ldiff_in_b:
strcmp_epilogue_aligned syndrome_b, data1b, data2b 1
.Ldiff_in_a:
.cfi_restore_state
strcmp_epilogue_aligned syndrome_a, data1a, data2a 1
.cfi_restore_state
.Lmisaligned8:
tst tmp1, #3
bne .Lmisaligned4
ands tmp1, src1, #3
bne .Lmutual_align4
/* Unrolled by a factor of 2, to reduce the number of post-increment
operations. */
.Lloop_aligned4:
ldr data1, [src1], #8
ldr data2, [src2], #8
.Lstart_realigned4:
uadd8 syndrome, data1, const_m1 /* Only need GE bits. */
eor syndrome, data1, data2
sel syndrome, syndrome, const_m1
cmp syndrome, #0
bne .Laligned4_done
ldr data1, [src1, #-4]
ldr data2, [src2, #-4]
uadd8 syndrome, data1, const_m1
eor syndrome, data1, data2
sel syndrome, syndrome, const_m1
cmp syndrome, #0
beq .Lloop_aligned4
.Laligned4_done:
strcmp_epilogue_aligned syndrome, data1, data2, 0
.Lmutual_align4:
.cfi_restore_state
/* Deal with mutual misalignment by aligning downwards and then
masking off the unwanted loaded data to prevent a difference. */
lsl tmp1, tmp1, #3 /* Bytes -> bits. */
bic src1, src1, #3
ldr data1, [src1], #8
bic src2, src2, #3
ldr data2, [src2], #8
/* In ARM code we can't use ORN, but with do have MVN with a
register shift. */
mvn tmp1, const_m1, S2HI tmp1
orr data1, data1, tmp1
orr data2, data2, tmp1
b .Lstart_realigned4
.Lmisaligned4:
ands tmp1, src1, #3
beq .Lsrc1_aligned
sub src2, src2, tmp1
bic src1, src1, #3
lsls tmp1, tmp1, #31
ldr data1, [src1], #4
beq .Laligned_m2
bcs .Laligned_m1
#ifdef STRCMP_NO_PRECHECK
ldrb data2, [src2, #1]
uxtb tmp1, data1, ror #BYTE1_OFFSET
cmp tmp1, #1
cmpcs tmp1, data2
bne .Lmisaligned_exit
.Laligned_m2:
ldrb data2, [src2, #2]
uxtb tmp1, data1, ror #BYTE2_OFFSET
cmp tmp1, #1
cmpcs tmp1, data2
bne .Lmisaligned_exit
.Laligned_m1:
ldrb data2, [src2, #3]
uxtb tmp1, data1, ror #BYTE3_OFFSET
cmp tmp1, #1
cmpcs tmp1, data2
beq .Lsrc1_aligned
#else /* STRCMP_NO_PRECHECK */
/* If we've done the pre-check, then we don't need to check the
first byte again here. */
ldrb data2, [src2, #2]
uxtb tmp1, data1, ror #BYTE2_OFFSET
cmp tmp1, #1
cmpcs tmp1, data2
bne .Lmisaligned_exit
.Laligned_m2:
ldrb data2, [src2, #3]
uxtb tmp1, data1, ror #BYTE3_OFFSET
cmp tmp1, #1
cmpcs tmp1, data2
beq .Laligned_m1
#endif
.Lmisaligned_exit:
.cfi_remember_state
sub result, tmp1, data2
ldr r4, [sp], #16
.cfi_restore 4
bx lr
#ifndef STRCMP_NO_PRECHECK
.Laligned_m1:
add src2, src2, #4
#endif
.Lsrc1_aligned:
.cfi_restore_state
/* src1 is word aligned, but src2 has no common alignment
with it. */
ldr data1, [src1], #4
lsls tmp1, src2, #31 /* C=src2[1], Z=src2[0]. */
bic src2, src2, #3
ldr data2, [src2], #4
bhi .Loverlap1 /* C=1, Z=0 => src2[1:0] = 0b11. */
bcs .Loverlap2 /* C=1, Z=1 => src2[1:0] = 0b10. */
/* (overlap3) C=0, Z=0 => src2[1:0] = 0b01. */
.Loverlap3:
bic tmp1, data1, #MSB
uadd8 syndrome, data1, const_m1
eors syndrome, tmp1, data2, S2LO #8
sel syndrome, syndrome, const_m1
bne 4f
cmp syndrome, #0
ldreq data2, [src2], #4
bne 5f
eor tmp1, tmp1, data1
cmp tmp1, data2, S2HI #24
bne 6f
ldr data1, [src1], #4
b .Loverlap3
4:
S2LO data2, data2, #8
b .Lstrcmp_tail
5:
bics syndrome, syndrome, #MSB
bne .Lstrcmp_done_equal
/* We can only get here if the MSB of data1 contains 0, so
fast-path the exit. */
ldrb result, [src2]
.cfi_remember_state
ldrd r4, r5, [sp], #16
.cfi_restore 4
.cfi_restore 5
/* R6/7 Not used in this sequence. */
.cfi_restore 6
.cfi_restore 7
neg result, result
bx lr
6:
.cfi_restore_state
S2LO data1, data1, #24
and data2, data2, #LSB
b .Lstrcmp_tail
.p2align 5,,12 /* Ensure at least 3 instructions in cache line. */
.Loverlap2:
and tmp1, data1, const_m1, S2LO #16
uadd8 syndrome, data1, const_m1
eors syndrome, tmp1, data2, S2LO #16
sel syndrome, syndrome, const_m1
bne 4f
cmp syndrome, #0
ldreq data2, [src2], #4
bne 5f
eor tmp1, tmp1, data1
cmp tmp1, data2, S2HI #16
bne 6f
ldr data1, [src1], #4
b .Loverlap2
4:
S2LO data2, data2, #16
b .Lstrcmp_tail
5:
ands syndrome, syndrome, const_m1, S2LO #16
bne .Lstrcmp_done_equal
ldrh data2, [src2]
S2LO data1, data1, #16
#ifdef __ARM_BIG_ENDIAN
lsl data2, data2, #16
#endif
b .Lstrcmp_tail
6:
S2LO data1, data1, #16
and data2, data2, const_m1, S2LO #16
b .Lstrcmp_tail
.p2align 5,,12 /* Ensure at least 3 instructions in cache line. */
.Loverlap1:
and tmp1, data1, #LSB
uadd8 syndrome, data1, const_m1
eors syndrome, tmp1, data2, S2LO #24
sel syndrome, syndrome, const_m1
bne 4f
cmp syndrome, #0
ldreq data2, [src2], #4
bne 5f
eor tmp1, tmp1, data1
cmp tmp1, data2, S2HI #8
bne 6f
ldr data1, [src1], #4
b .Loverlap1
4:
S2LO data2, data2, #24
b .Lstrcmp_tail
5:
tst syndrome, #LSB
bne .Lstrcmp_done_equal
ldr data2, [src2]
6:
S2LO data1, data1, #8
bic data2, data2, #MSB
b .Lstrcmp_tail
.Lstrcmp_done_equal:
mov result, #0
.cfi_remember_state
ldrd r4, r5, [sp], #16
.cfi_restore 4
.cfi_restore 5
/* R6/7 not used in this sequence. */
.cfi_restore 6
.cfi_restore 7
bx lr
.Lstrcmp_tail:
.cfi_restore_state
#ifndef __ARM_BIG_ENDIAN
rev data1, data1
rev data2, data2
/* Now everything looks big-endian... */
#endif
uadd8 tmp1, data1, const_m1
eor tmp1, data1, data2
sel syndrome, tmp1, const_m1
clz tmp1, syndrome
lsl data1, data1, tmp1
lsl data2, data2, tmp1
lsr result, data1, #24
ldrd r4, r5, [sp], #16
.cfi_restore 4
.cfi_restore 5
/* R6/7 not used in this sequence. */
.cfi_restore 6
.cfi_restore 7
sub result, result, data2, lsr #24
bx lr
.cfi_endproc
.size strcmp, . - .Lstrcmp_start_addr
|
4ms/metamodule-plugin-sdk
| 2,582
|
plugin-libc/newlib/libc/machine/arm/aeabi_memset-arm.S
|
/*
* Copyright (c) 2015 ARM Ltd
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the company may not be used to endorse or promote
* products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
.arm
.syntax unified
.global __aeabi_memset
.type __aeabi_memset, %function
ASM_ALIAS __aeabi_memset4 __aeabi_memset
ASM_ALIAS __aeabi_memset8 __aeabi_memset
__aeabi_memset:
tst r0, #3
stmfd sp!, {r4, lr}
beq 10f
cmp r1, #0
sub r1, r1, #1
beq 9f
and ip, r2, #255
mov r3, r0
b 2f
1:
cmp r1, #0
sub r1, r1, #1
beq 9f
2:
strb ip, [r3], #1
tst r3, #3
bne 1b
3:
cmp r1, #3
bls 7f
and lr, r2, #255
orr lr, lr, lr, asl #8
cmp r1, #15
orr lr, lr, lr, asl #16
bls 5f
mov r4, r1
add ip, r3, #16
4:
sub r4, r4, #16
cmp r4, #15
str lr, [ip, #-16]
str lr, [ip, #-12]
str lr, [ip, #-8]
str lr, [ip, #-4]
add ip, ip, #16
bhi 4b
sub ip, r1, #16
bic ip, ip, #15
and r1, r1, #15
add ip, ip, #16
cmp r1, #3
add r3, r3, ip
bls 7f
5:
mov r4, r3
mov ip, r1
6:
sub ip, ip, #4
cmp ip, #3
str lr, [r4], #4
bhi 6b
sub ip, r1, #4
bic ip, ip, #3
add ip, ip, #4
add r3, r3, ip
and r1, r1, #3
7:
cmp r1, #0
andne r2, r2, #255
addne r1, r3, r1
beq 9f
8:
strb r2, [r3], #1
cmp r3, r1
bne 8b
9:
ldmfd sp!, {r4, lr}
bx lr
10:
mov r3, r0
b 3b
.size __aeabi_memset, . - __aeabi_memset
|
4ms/metamodule-plugin-sdk
| 2,915
|
plugin-libc/newlib/libc/machine/arm/strcmp.S
|
/*
* Copyright (c) 2012-2014 ARM Ltd
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the company may not be used to endorse or promote
* products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/* Wrapper for the various implementations of strcmp. */
#include "../../../../include/arm-acle-compat.h"
#ifdef __ARM_BIG_ENDIAN
#define S2LO lsl
#define S2LOEQ lsleq
#define S2HI lsr
#define MSB 0x000000ff
#define LSB 0xff000000
#define BYTE0_OFFSET 24
#define BYTE1_OFFSET 16
#define BYTE2_OFFSET 8
#define BYTE3_OFFSET 0
#else /* not __ARM_BIG_ENDIAN */
#define S2LO lsr
#define S2LOEQ lsreq
#define S2HI lsl
#define BYTE0_OFFSET 0
#define BYTE1_OFFSET 8
#define BYTE2_OFFSET 16
#define BYTE3_OFFSET 24
#define MSB 0xff000000
#define LSB 0x000000ff
#endif /* not __ARM_BIG_ENDIAN */
.macro def_fn f p2align=0
.text
.p2align \p2align
.global \f
.type \f, %function
\f:
.endm
#if defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED) \
|| (__ARM_ARCH_ISA_THUMB == 1 && !__ARM_ARCH_ISA_ARM)
# if defined (__thumb__) && !defined (__thumb2__)
/* Thumb1 only variant. If size is preferred, use strcmp-armv4t.S.
If speed is preferred, the strcmp function in strcmp-armv6m.S
will be used. */
# if defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)
# include "strcmp-armv4t.S"
# else
# include "strcmp-armv6m.S"
# endif
# else
# include "strcmp-arm-tiny.S"
# endif
#elif __ARM_ARCH_ISA_THUMB == 2
# ifdef __ARM_FEATURE_SIMD32
# include "strcmp-armv7.S"
# else
# include "strcmp-armv7m.S"
# endif
#elif __ARM_ARCH >= 6
# include "strcmp-armv6.S"
#else
# include "strcmp-armv4.S"
#endif
|
4ms/metamodule-plugin-sdk
| 1,761
|
plugin-libc/newlib/libc/machine/pru/setjmp.s
|
/* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
*
* Copyright (c) 2018-2019 Dimitar Dimitrov <dimitar@dinux.eu>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
.section .text
.align 3
.globl setjmp
.type setjmp,@function
.globl longjmp
.type longjmp,@function
setjmp:
sbbo r2, r14, 0, 4*12 /* SP, RA, FP, r5-r13 */
ldi r14, 0
ret
longjmp:
lbbo r2, r14, 0, 4*12 /* SP, RA, FP, r5-r13 */
mov r14, r15 /* copy second arg to return location */
qbne 1f, r14, 0 /* per stdC, we cannot return 0 */
ldi r14, 1
1:
ret
|
4ms/metamodule-plugin-sdk
| 2,142
|
plugin-libc/newlib/libc/machine/m68hc11/setjmp.S
|
/* setjmp/longjmp routines for M68HC11 & M68HC12.
* Copyright (C) 1999, 2000, 2001, 2002 Stephane Carrez (stcarrez@nerim.fr)
*
* The authors hereby grant permission to use, copy, modify, distribute,
* and license this software and its documentation for any purpose, provided
* that existing copyright notices are retained in all copies and that this
* notice is included verbatim in any distributions. No written agreement,
* license, or royalty fee is required for any of the authorized uses.
* Modifications to this software may be copyrighted by their authors
* and need not follow the licensing terms described here, provided that
* the new terms are clearly indicated on the first page of each file where
* they apply.
*/
#if __INT__ == 32
# define val 4
# define INT32(X) X
#else
# define val 2
# define INT32(X)
#endif
#ifdef mc6811
# define REG(X) *X
#else
# define REG(X) X
#endif
.sect .text
.global setjmp
.global longjmp
#ifdef mc6811
setjmp:
xgdx
tsy
ldd 0,y
std 0,x
sty 2,x
ldd REG(_.frame)
std 4,x
ldd REG(_.d1)
std 6,x
ldd REG(_.d2)
std 8,x
ldd REG(_.d3)
std 10,x
ldd REG(_.d4)
std 12,x
ldd REG(_.d5)
std 14,x
ldd REG(_.d6)
std 16,x
ldd REG(_.d7)
std 18,x
ldd REG(_.d8)
std 20,x
INT32( ldx #0)
clra
clrb
rts
#else
setjmp:
xgdx
movw 0,sp,2,x+
sts 2,x+
movw _.frame,2,x+
movw _.d1,2,x+
movw _.d2,2,x+
movw _.d3,2,x+
movw _.d4,2,x+
movw _.d5,2,x+
movw _.d6,2,x+
movw _.d7,2,x+
movw _.d8,2,x+
INT32( ldx #0)
clra
clrb
rts
#endif
#ifdef mc6811
longjmp:
xgdx
tsy
ldd val,y
bne do_jump
ldd #1
do_jump:
xgdy
ldd 4,x
std REG(_.frame)
ldd 6,x
std REG(_.d1)
ldd 8,x
std REG(_.d2)
ldd 10,x
std REG(_.d3)
ldd 12,x
std REG(_.d4)
ldd 14,x
std REG(_.d5)
ldd 16,x
std REG(_.d6)
ldd 18,x
std REG(_.d7)
ldd 20,x
std REG(_.d8)
ldd 0,x
ldx 2,x
txs
std 0,x
INT32( ldx #0)
xgdy
rts
#else
longjmp:
xgdx
ldy val,sp
bne do_jump
ldy #1
do_jump:
ldd 4,x+
movw 2,x+,_.frame
movw 0,x,_.d1
movw 2,x,_.d2
movw 4,x,_.d3
movw 6,x,_.d4
movw 8,x,_.d5
movw 10,x,_.d6
movw 12,x,_.d7
movw 14,x,_.d8
ldx -4,x
txs
std 0,x
INT32( ldx #0)
xgdy
rts
#endif
|
4ms/metamodule-plugin-sdk
| 3,119
|
plugin-libc/newlib/libc/machine/cr16/setjmp.S
|
##############################################################################
# setjmp.S -- CR16 setjmp routine #
# #
# Copyright (c) 2004 National Semiconductor Corporation #
# #
# The authors hereby grant permission to use, copy, modify, distribute, #
# and license this software and its documentation for any purpose, provided #
# that existing copyright notices are retained in all copies and that this #
# notice is included verbatim in any distributions. No written agreement, #
# license, or royalty fee is required for any of the authorized uses. #
# Modifications to this software may be copyrighted by their authors #
# and need not follow the licensing terms described here, provided that #
# the new terms are clearly indicated on the first page of each file where #
# they apply. #
# #
# C library -- setjmp, longjmp #
# longjmp(a,v) #
# will generate a "return(v)" #
# from the last call to #
# setjmp(a) #
# by restoring r7-ra, sp, #
# and pc from 'a' #
# and doing a return. (Makes sure that longjmp never returns 0). #
##############################################################################
.text
.file "setjmp.s"
.align 4
.globl _setjmp
.align 4
_setjmp:
#r3, r2: .blkw
storw r7, 0(r3,r2)
addd $2, (r3,r2)
storw r8, 0(r3,r2)
addd $2, (r3,r2)
storw r9, 0(r3,r2)
addd $2, (r3,r2)
storw r10, 0(r3,r2)
addd $2, (r3,r2)
storw r11, 0(r3,r2)
addd $2, (r3,r2)
stord (r12), 0(r3,r2)
addd $4, (r3,r2)
stord (r13), 0(r3,r2)
addd $4, (r3,r2)
stord (ra), 0(r3,r2)
addd $4, (r3,r2)
stord (sp), 0(r3,r2)
movd $0,(r1,r0)
jump (ra)
.globl _longjmp
_longjmp:
#r3, r2: .blkw # pointer save area
#r5, r4: .blkw # ret vlaue
loadw 0(r3,r2), r7
addd $2, (r3,r2)
loadw 0(r3,r2), r8
addd $2, (r3,r2)
loadw 0(r3,r2), r9
addd $2, (r3,r2)
loadw 0(r3,r2), r10
addd $2, (r3,r2)
loadw 0(r3,r2), r11
addd $2, (r3,r2)
loadd 0(r3,r2), (r12)
addd $4, (r3,r2)
loadd 0(r3,r2), (r13)
addd $4, (r3,r2)
loadd 0(r3,r2), (ra)
addd $4, (r3,r2)
loadd 0(r3,r2), (sp)
#ifdef __INT32__
movd (r5,r4), (r1,r0)
cmpd $0, (r5,r4)
bne end1
movd $1, (r1,r0)
#else
movw r4, r0
cmpw $0, r4
bne end1
movw $1, r0
#endif
end1:
jump (ra)
.align 4
|
4ms/metamodule-plugin-sdk
| 1,786
|
plugin-libc/newlib/libc/machine/csky/setjmp.S
|
/* Copyright (c) 2020 C-SKY Microsystems All rights reserved.
This copyrighted material is made available to anyone wishing to use,
modify, copy, or redistribute it subject to the terms and conditions
of the FreeBSD License. This program is distributed in the hope that
it will be useful, but WITHOUT ANY WARRANTY expressed or implied,
including the implied warranties of MERCHANTABILITY or FITNESS FOR
A PARTICULAR PURPOSE. A copy of this license is available at
http://www.opensource.org/licenses.
*/
.section .text
.align 3
.globl setjmp
.type setjmp,@function
.globl longjmp
.type longjmp,@function
setjmp:
#if defined(__CK801__)
stw r4, (r0, 0)
stw r5, (r0, 4)
stw r6, (r0, 8)
stw r7, (r0, 12)
stw r8, (r0, 16)
stw r15, (r0, 20)
stw sp, (r0, 24)
#elif defined(__CK802__)
stm r4-r11, (r0)
stw r15, (r0, 32)
stw sp, (r0, 36)
#else
stm r4-r11, (r0)
stw r15, (r0, 32)
stw r16, (r0, 36)
stw r17, (r0, 40)
stw r26, (r0, 44)
stw r27, (r0, 48)
stw r28, (r0, 52)
stw r29, (r0, 56)
stw r30, (r0, 60)
stw r31, (r0, 64)
stw sp, (r0, 68)
#endif
movi r0, 0
rts
longjmp:
#if defined(__CK801__)
ldw r4, (r0, 0)
ldw r5, (r0, 4)
ldw r6, (r0, 8)
ldw r7, (r0, 12)
ldw r8, (r0, 16)
ldw r15, (r0, 20)
ldw sp, (r0, 24)
#elif defined(__CK802__)
ldm r4-r11, (r0)
ldw r15, (r0, 32)
ldw sp, (r0, 36)
#else
ldm r4-r11, (r0)
ldw r15, (r0, 32)
ldw r16, (r0, 36)
ldw r17, (r0, 40)
ldw r26, (r0, 44)
ldw r27, (r0, 48)
ldw r28, (r0, 52)
ldw r29, (r0, 56)
ldw r30, (r0, 60)
ldw r31, (r0, 64)
ldw sp, (r0, 68)
#endif
mov r0, r1
cmpnei r1, 0
bt 1f
movi r0, 1
1: rts
|
4ms/metamodule-plugin-sdk
| 2,255
|
plugin-libc/newlib/libc/machine/x86_64/memcpy.S
|
/*
* ====================================================
* Copyright (C) 2007 by Ellips BV. All rights reserved.
*
* Permission to use, copy, modify, and distribute this
* software is freely granted, provided that this notice
* is preserved.
* ====================================================
*/
#include "x86_64mach.h"
.global SYM (memcpy)
SOTYPE_FUNCTION(memcpy)
SYM (memcpy):
movq rdi, rax /* Store destination in return value */
cmpq $16, rdx
jb byte_copy
movq rdi, r8 /* Align destination on quad word boundary */
andq $7, r8
jz quadword_aligned
movq $8, rcx
subq r8, rcx
subq rcx, rdx
rep movsb
quadword_aligned:
cmpq $256, rdx
jb quadword_copy
pushq rax
pushq r12
pushq r13
pushq r14
movq rdx, rcx /* Copy 128 bytes at a time with minimum cache polution */
shrq $7, rcx
.p2align 4
loop:
prefetchnta 768 (rsi)
prefetchnta 832 (rsi)
movq (rsi), rax
movq 8 (rsi), r8
movq 16 (rsi), r9
movq 24 (rsi), r10
movq 32 (rsi), r11
movq 40 (rsi), r12
movq 48 (rsi), r13
movq 56 (rsi), r14
movntiq rax, (rdi)
movntiq r8 , 8 (rdi)
movntiq r9 , 16 (rdi)
movntiq r10, 24 (rdi)
movntiq r11, 32 (rdi)
movntiq r12, 40 (rdi)
movntiq r13, 48 (rdi)
movntiq r14, 56 (rdi)
movq 64 (rsi), rax
movq 72 (rsi), r8
movq 80 (rsi), r9
movq 88 (rsi), r10
movq 96 (rsi), r11
movq 104 (rsi), r12
movq 112 (rsi), r13
movq 120 (rsi), r14
movntiq rax, 64 (rdi)
movntiq r8 , 72 (rdi)
movntiq r9 , 80 (rdi)
movntiq r10, 88 (rdi)
movntiq r11, 96 (rdi)
movntiq r12, 104 (rdi)
movntiq r13, 112 (rdi)
movntiq r14, 120 (rdi)
leaq 128 (rsi), rsi
leaq 128 (rdi), rdi
dec rcx
jnz loop
sfence
movq rdx, rcx
andq $127, rcx
rep movsb
popq r14
popq r13
popq r12
popq rax
ret
byte_copy:
movq rdx, rcx
rep movsb
ret
quadword_copy:
movq rdx, rcx
shrq $3, rcx
.p2align 4
rep movsq
movq rdx, rcx
andq $7, rcx
rep movsb /* Copy the remaining bytes */
ret
|
4ms/metamodule-plugin-sdk
| 1,083
|
plugin-libc/newlib/libc/machine/x86_64/setjmp.S
|
/*
* ====================================================
* Copyright (C) 2007 by Ellips BV. All rights reserved.
*
* Permission to use, copy, modify, and distribute this
* software is freely granted, provided that this notice
* is preserved.
* ====================================================
*/
/*
** jmp_buf:
** rbx rbp r12 r13 r14 r15 rsp rip
** 0 8 16 24 32 40 48 56
*/
#include "x86_64mach.h"
.global SYM (setjmp)
.global SYM (longjmp)
SOTYPE_FUNCTION(setjmp)
SOTYPE_FUNCTION(longjmp)
SYM (setjmp):
movq rbx, 0 (rdi)
movq rbp, 8 (rdi)
movq r12, 16 (rdi)
movq r13, 24 (rdi)
movq r14, 32 (rdi)
movq r15, 40 (rdi)
leaq 8 (rsp), rax
movq rax, 48 (rdi)
movq (rsp), rax
movq rax, 56 (rdi)
movq $0, rax
ret
SYM (longjmp):
movq rsi, rax /* Return value */
movq 8 (rdi), rbp
__CLI
movq 48 (rdi), rsp
pushq 56 (rdi)
movq 0 (rdi), rbx
movq 16 (rdi), r12
movq 24 (rdi), r13
movq 32 (rdi), r14
movq 40 (rdi), r15
__STI
ret
|
4ms/metamodule-plugin-sdk
| 1,774
|
plugin-libc/newlib/libc/machine/x86_64/memset.S
|
/*
* ====================================================
* Copyright (C) 2007 by Ellips BV. All rights reserved.
*
* Permission to use, copy, modify, and distribute this
* software is freely granted, provided that this notice
* is preserved.
* ====================================================
*/
#include "x86_64mach.h"
.global SYM (memset)
SOTYPE_FUNCTION(memset)
SYM (memset):
movq rdi, r9 /* Save return value */
movq rsi, rax
movq rdx, rcx
cmpq $16, rdx
jb byte_set
movq rdi, r8 /* Align on quad word boundary */
andq $7, r8
jz quadword_aligned
movq $8, rcx
subq r8, rcx
subq rcx, rdx
rep stosb
movq rdx, rcx
quadword_aligned:
movabs $0x0101010101010101, r8
movzbl sil, eax
imul r8, rax
cmpq $256, rdx
jb quadword_set
shrq $7, rcx /* Store 128 bytes at a time with minimum cache polution */
.p2align 4
loop:
movntiq rax, (rdi)
movntiq rax, 8 (rdi)
movntiq rax, 16 (rdi)
movntiq rax, 24 (rdi)
movntiq rax, 32 (rdi)
movntiq rax, 40 (rdi)
movntiq rax, 48 (rdi)
movntiq rax, 56 (rdi)
movntiq rax, 64 (rdi)
movntiq rax, 72 (rdi)
movntiq rax, 80 (rdi)
movntiq rax, 88 (rdi)
movntiq rax, 96 (rdi)
movntiq rax, 104 (rdi)
movntiq rax, 112 (rdi)
movntiq rax, 120 (rdi)
leaq 128 (rdi), rdi
dec rcx
jnz loop
sfence
movq rdx, rcx
andq $127, rcx
rep stosb
movq r9, rax
ret
byte_set:
rep stosb
movq r9, rax
ret
quadword_set:
shrq $3, rcx
.p2align 4
rep stosq
movq rdx, rcx
andq $7, rcx
rep stosb /* Store the remaining bytes */
movq r9, rax
ret
|
4ms/metamodule-plugin-sdk
| 2,346
|
plugin-libc/newlib/libc/machine/visium/setjmp.S
|
/* setjmp/longjmp for the Visium processor.
Copyright (c) 2015 Rolls-Royce Controls and Data Services Limited.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of Rolls-Royce Controls and Data Services Limited nor
the names of its contributors may be used to endorse or promote products
derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
THE POSSIBILITY OF SUCH DAMAGE. */
.text
.globl setjmp
.type setjmp, @function
setjmp:
write.l 0(r1),r11
write.l 1(r1),r12
write.l 2(r1),r13
write.l 3(r1),r14
write.l 4(r1),r15
write.l 5(r1),r16
write.l 6(r1),r17
write.l 7(r1),r18
write.l 8(r1),r19
write.l 9(r1),r21
write.l 10(r1),r22
write.l 11(r1),r23
bra tr,r21,r0
moviq r1,0
.size setjmp, .-setjmp
.globl longjmp
.type longjmp, @function
longjmp:
read.l r11,0(r1)
read.l r12,1(r1)
read.l r13,2(r1)
read.l r14,3(r1)
read.l r15,4(r1)
read.l r16,5(r1)
read.l r17,6(r1)
read.l r18,7(r1)
read.l r19,8(r1)
read.l r21,9(r1)
read.l r22,10(r1)
read.l r23,11(r1)
bra tr,r21,r0
move.l r1,r2
.size longjmp, .-longjmp
|
4ms/metamodule-plugin-sdk
| 2,078
|
plugin-libc/newlib/libc/machine/mep/setjmp.S
|
#
# Setjmp/longjmp for MeP
#
# DJ Delorie, Red Hat Inc.
#
# 19 32-bit words in the jmpbuf:
# $0
# $1
# ...
# $15
# $pc
# $hi
# $lo
#
# Note that $0 is saved but not restored. It can't be restored
# as it's the return value of setjmp, but we save it in case
# some application wants to see it in the jmp_buf. Ideally,
# we should not need to save anything that is call-clobbered,
# but you never know what the user is going to tell gcc with -f
# options.
.noregerr
.text
.globl setjmp
.type setjmp,@function
setjmp:
# $1 is the address of the buffer. We return 0 in $0.
sw $0, ($1)
sw $1, 4($1)
sw $2, 8($1)
sw $3, 12($1)
sw $4, 16($1)
sw $5, 20($1)
sw $6, 24($1)
sw $7, 28($1)
sw $8, 32($1)
sw $9, 36($1)
sw $10, 40($1)
sw $11, 44($1)
sw $12, 48($1)
sw $13, 52($1)
sw $14, 56($1)
sw $15, 60($1)
ldc $0, $lp
sw $0, 64($1)
ldc $0, $opt
sra $0, 24
and3 $0, $0, 3
beqz $0, sj_skip_hilo
ldc $0, $hi
sw $0, 68($1)
ldc $0, $lo
sw $0, 72($1)
sj_skip_hilo:
mov $0, 0
ret
.globl longjmp
.type longjmp,@function
longjmp:
# $1 is the address of the buffer. $2 is the value setjmp
# returns. We do not faithfully restore $0 or $lp, because
# the act of calling setjmp clobbered those anyway.
bnez $2, rv_not_zero
mov $2, 1
rv_not_zero:
# We restore $sp first so we can save the return value there,
# otherwise we'd need to have another unrestored register.
lw $15, 60($1)
add3 $sp, $sp, -4
sw $2, ($sp)
# Now restore the general registers.
lw $2, 8($1)
lw $3, 12($1)
lw $4, 16($1)
lw $5, 20($1)
lw $6, 24($1)
lw $7, 28($1)
lw $8, 32($1)
lw $9, 36($1)
lw $10, 40($1)
lw $11, 44($1)
lw $12, 48($1)
lw $13, 52($1)
lw $14, 56($1)
# We restore $pc's value to $lp so that we can just ret later.
lw $0, 64($1)
stc $0, $lp
ldc $0, $opt
sra $0, 24
and3 $0, $0, 3
beqz $0, lj_skip_hilo
lw $0, 68($1)
stc $0, $hi
lw $0, 72($1)
stc $0, $lo
lj_skip_hilo:
# Restore $1
lw $1, 8($1)
# Get the return value off the stack, and restore the stack.
lw $0, ($sp)
add3 $sp, $sp, 4
ret
|
4ms/metamodule-plugin-sdk
| 2,140
|
plugin-libc/newlib/libc/machine/bfin/setjmp.S
|
/*
* setjmp for the Blackfin processor
*
* Copyright (C) 2006 Analog Devices, Inc.
*
* The authors hereby grant permission to use, copy, modify, distribute,
* and license this software and its documentation for any purpose, provided
* that existing copyright notices are retained in all copies and that this
* notice is included verbatim in any distributions. No written agreement,
* license, or royalty fee is required for any of the authorized uses.
* Modifications to this software may be copyrighted by their authors
* and need not follow the licensing terms described here, provided that
* the new terms are clearly indicated on the first page of each file where
* they apply.
*/
#define _ASM
#define _SETJMP_H
.text;
.align 4;
.globl _setjmp;
.type _setjmp, STT_FUNC;
_setjmp:
[--SP] = P0; /* Save P0 */
P0 = R0;
R0 = [SP++];
[P0 + 0x00] = R0; /* Save saved P0 */
[P0 + 0x04] = P1;
[P0 + 0x08] = P2;
[P0 + 0x0C] = P3;
[P0 + 0x10] = P4;
[P0 + 0x14] = P5;
[P0 + 0x18] = FP; /* Frame Pointer */
[P0 + 0x1C] = SP; /* Stack Pointer */
[P0 + 0x20] = P0; /* Data Registers */
[P0 + 0x24] = R1;
[P0 + 0x28] = R2;
[P0 + 0x2C] = R3;
[P0 + 0x30] = R4;
[P0 + 0x34] = R5;
[P0 + 0x38] = R6;
[P0 + 0x3C] = R7;
R0 = ASTAT;
[P0 + 0x40] = R0;
R0 = LC0; /* Loop Counters */
[P0 + 0x44] = R0;
R0 = LC1;
[P0 + 0x48] = R0;
R0 = A0.W; /* Accumulators */
[P0 + 0x4C] = R0;
R0 = A0.X;
[P0 + 0x50] = R0;
R0 = A1.W;
[P0 + 0x54] = R0;
R0 = A1.X;
[P0 + 0x58] = R0;
R0 = I0; /* Index Registers */
[P0 + 0x5C] = R0;
R0 = I1;
[P0 + 0x60] = R0;
R0 = I2;
[P0 + 0x64] = R0;
R0 = I3;
[P0 + 0x68] = R0;
R0 = M0; /* Modifier Registers */
[P0 + 0x6C] = R0;
R0 = M1;
[P0 + 0x70] = R0;
R0 = M2;
[P0 + 0x74] = R0;
R0 = M3;
[P0 + 0x78] = R0;
R0 = L0; /* Length Registers */
[P0 + 0x7c] = R0;
R0 = L1;
[P0 + 0x80] = R0;
R0 = L2;
[P0 + 0x84] = R0;
R0 = L3;
[P0 + 0x88] = R0;
R0 = B0; /* Base Registers */
[P0 + 0x8C] = R0;
R0 = B1;
[P0 + 0x90] = R0;
R0 = B2;
[P0 + 0x94] = R0;
R0 = B3;
[P0 + 0x98] = R0;
R0 = RETS;
[P0 + 0x9C] = R0;
R0 = 0;
RTS;
.size _setjmp, .-_setjmp;
|
4ms/metamodule-plugin-sdk
| 2,327
|
plugin-libc/newlib/libc/machine/bfin/longjmp.S
|
/*
* longjmp for the Blackfin processor
*
* Copyright (C) 2006 Analog Devices, Inc.
*
* The authors hereby grant permission to use, copy, modify, distribute,
* and license this software and its documentation for any purpose, provided
* that existing copyright notices are retained in all copies and that this
* notice is included verbatim in any distributions. No written agreement,
* license, or royalty fee is required for any of the authorized uses.
* Modifications to this software may be copyrighted by their authors
* and need not follow the licensing terms described here, provided that
* the new terms are clearly indicated on the first page of each file where
* they apply.
*/
#define _ASM
#define _SETJMP_H
.text;
.align 4;
.globl _longjmp;
.type _longjmp, STT_FUNC;
_longjmp:
P0 = R0;
R0 = [P0 + 0x00];
[--SP] = R0; /* Put P0 on the stack */
P1 = [P0 + 0x04];
P2 = [P0 + 0x08];
P3 = [P0 + 0x0C];
P4 = [P0 + 0x10];
P5 = [P0 + 0x14];
FP = [P0 + 0x18];
R0 = [SP++]; /* Grab P0 from old stack */
SP = [P0 + 0x1C]; /* Update Stack Pointer */
[--SP] = R0; /* Put P0 on new stack */
[--SP] = R1; /* Put VAL arg on new stack */
R0 = [P0 + 0x20]; /* Data Registers */
R1 = [P0 + 0x24];
R2 = [P0 + 0x28];
R3 = [P0 + 0x2C];
R4 = [P0 + 0x30];
R5 = [P0 + 0x34];
R6 = [P0 + 0x38];
R7 = [P0 + 0x3C];
R0 = [P0 + 0x40];
ASTAT = R0;
R0 = [P0 + 0x44]; /* Loop Counters */
LC0 = R0;
R0 = [P0 + 0x48];
LC1 = R0;
R0 = [P0 + 0x4C]; /* Accumulators */
A0.W = R0;
R0 = [P0 + 0x50];
A0.X = R0;
R0 = [P0 + 0x54];
A1.W = R0;
R0 = [P0 + 0x58];
A1.X = R0;
R0 = [P0 + 0x5C]; /* Index Registers */
I0 = R0;
R0 = [P0 + 0x60];
I1 = R0;
R0 = [P0 + 0x64];
I2 = R0;
R0 = [P0 + 0x68];
I3 = R0;
R0 = [P0 + 0x6C]; /* Modifier Registers */
M0 = R0;
R0 = [P0 + 0x70];
M1 = R0;
R0 = [P0 + 0x74];
M2 = R0;
R0 = [P0 + 0x78];
M3 = R0;
R0 = [P0 + 0x7C]; /* Length Registers */
L0 = R0;
R0 = [P0 + 0x80];
L1 = R0;
R0 = [P0 + 0x84];
L2 = R0;
R0 = [P0 + 0x88];
L3 = R0;
R0 = [P0 + 0x8C]; /* Base Registers */
B0 = R0;
R0 = [P0 + 0x90];
B1 = R0;
R0 = [P0 + 0x94];
B2 = R0;
R0 = [P0 + 0x98];
B3 = R0;
R0 = [P0 + 0x9C]; /* Return Address (PC) */
RETS = R0;
R0 = [SP++];
P0 = [SP++];
CC = R0 == 0;
IF !CC JUMP 1f;
R0 = 1;
1:
RTS;
.size _longjmp, .-_longjmp;
|
4ms/metamodule-plugin-sdk
| 3,956
|
plugin-libc/newlib/libc/machine/tic6x/setjmp.S
|
;******************************************************************************
;* SETJMP v7.2.0I10181 *
;* *
;* Copyright (c) 1996-2010 Texas Instruments Incorporated *
;* http://www.ti.com/ *
;* *
;* Redistribution and use in source and binary forms, with or without *
;* modification, are permitted provided that the following conditions *
;* are met: *
;* *
;* Redistributions of source code must retain the above copyright *
;* notice, this list of conditions and the following disclaimer. *
;* *
;* Redistributions in binary form must reproduce the above copyright *
;* notice, this list of conditions and the following disclaimer in *
;* the documentation and/or other materials provided with the *
;* distribution. *
;* *
;* Neither the name of Texas Instruments Incorporated nor the names *
;* of its contributors may be used to endorse or promote products *
;* derived from this software without specific prior written *
;* permission. *
;* *
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS *
;* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT *
;* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR *
;* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT *
;* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
;* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT *
;* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, *
;* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY *
;* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
;* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE *
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
;* *
;******************************************************************************
.text
.globl setjmp
.type setjmp,%function
setjmp:
MV .L2X A4, B4
|| STW .D1T2 B3, *+A4(48)
STW .D1T1 A10, *+A4(0)
|| STW .D2T2 B10, *+B4(4)
|| RET .S2 B3
STW .D1T1 A11, *+A4(8)
|| STW .D2T2 B11, *+B4(12)
STW .D1T1 A12, *+A4(16)
|| STW .D2T2 B12, *+B4(20)
STW .D1T1 A13, *+A4(24)
|| STW .D2T2 B13, *+B4(28)
STW .D1T1 A14, *+A4(32)
|| STW .D2T2 B14, *+B4(36)
STW .D1T1 A15, *+A4(40)
|| STW .D2T2 B15, *+B4(44)
|| ZERO .S1 A4
.size setjmp, . - setjmp
.globl longjmp
.type longjmp,%function
longjmp:
LDW .D1T1 *+A4(48), A3
MV .L2X A4, B6
|| MV .S1 A4, A6
|| MV .D2 B4, B2
LDW .D1T1 *+A6(0), A10
|| LDW .D2T2 *+B6(4), B10
|| [B2] MV .L1X B4, A4
|| [!B2] MVK .S1 1, A4
LDW .D1T1 *+A6(8), A11
|| LDW .D2T2 *+B6(12), B11
LDW .D1T1 *+A6(16), A12
|| LDW .D2T2 *+B6(20), B12
LDW .D1T1 *+A6(24), A13
|| LDW .D2T2 *+B6(28), B13
LDW .D1T1 *+A6(32), A14
|| LDW .D2T2 *+B6(36), B14
LDW .D1T1 *+A6(40), A15
|| LDW .D2T2 *+B6(44), B15
|| RET .S2X A3
NOP 5
.size longjmp, . - longjmp
|
4ms/metamodule-plugin-sdk
| 1,074
|
plugin-libc/newlib/libc/machine/ft32/memcpy.S
|
/* A memcpy.c for FT32
Copyright (C) 2014 FTDI (support@ftdichip.com)
The authors hereby grant permission to use, copy, modify, distribute,
and license this software and its documentation for any purpose, provided
that existing copyright notices are retained in all copies and that this
notice is included verbatim in any distributions. No written agreement,
license, or royalty fee is required for any of the authorized uses.
Modifications to this software may be copyrighted by their authors
and need not follow the licensing terms described here, provided that
the new terms are clearly indicated on the first page of each file where
they apply. */
.text
.global memcpy
.type memcpy,@function
memcpy:
ldk $r3,32764
1:
cmp $r2,$r3
jmpc lte,2f
memcpy.b $r0,$r1,$r3
add $r0,$r0,$r3
add $r1,$r1,$r3
sub $r2,$r2,$r3
jmp 1b
2:
memcpy.b $r0,$r1,$r2
return
.Lend2:
.size memcpy,.Lend2-memcpy
|
4ms/metamodule-plugin-sdk
| 2,761
|
plugin-libc/newlib/libc/machine/ft32/setjmp.S
|
/* A setjmp.c for FT32
Copyright (C) 2014 FTDI (support@ftdichip.com)
The authors hereby grant permission to use, copy, modify, distribute,
and license this software and its documentation for any purpose, provided
that existing copyright notices are retained in all copies and that this
notice is included verbatim in any distributions. No written agreement,
license, or royalty fee is required for any of the authorized uses.
Modifications to this software may be copyrighted by their authors
and need not follow the licensing terms described here, provided that
the new terms are clearly indicated on the first page of each file where
they apply. */
# setjmp/longjmp for FT32.
# Total jumpbuf size is 108 bytes, or 27 words.
#
.text
.global setjmp
.type setjmp,@function
setjmp:
pop.l $r5 # return address in $r5
sti.l $r0,0,$r5
sti.l $r0,4,$r6
sti.l $r0,8,$r7
sti.l $r0,12,$r8
sti.l $r0,16,$r9
sti.l $r0,20,$r10
sti.l $r0,24,$r11
sti.l $r0,28,$r12
sti.l $r0,32,$r13
sti.l $r0,36,$r14
sti.l $r0,40,$r15
sti.l $r0,44,$r16
sti.l $r0,48,$r17
sti.l $r0,52,$r18
sti.l $r0,56,$r19
sti.l $r0,60,$r20
sti.l $r0,64,$r21
sti.l $r0,68,$r22
sti.l $r0,72,$r23
sti.l $r0,76,$r24
sti.l $r0,80,$r25
sti.l $r0,84,$r26
sti.l $r0,88,$r27
sti.l $r0,92,$r28
sti.l $r0,96,$r29
sti.l $r0,100,$r30
sti.l $r0,104,$r31
ldk.l $r0,0
jmpi $r5
.Lend1:
.size setjmp,.Lend1-setjmp
.global longjmp
.type longjmp,@function
longjmp:
cmp.l $r1,0
jmpc nz,.nonz
ldk.l $r1,1
.nonz:
ldi.l $r5,$r0,0
ldi.l $r6,$r0,4
ldi.l $r7,$r0,8
ldi.l $r8,$r0,12
ldi.l $r9,$r0,16
ldi.l $r10,$r0,20
ldi.l $r11,$r0,24
ldi.l $r12,$r0,28
ldi.l $r13,$r0,32
ldi.l $r14,$r0,36
ldi.l $r15,$r0,40
ldi.l $r16,$r0,44
ldi.l $r17,$r0,48
ldi.l $r18,$r0,52
ldi.l $r19,$r0,56
ldi.l $r20,$r0,60
ldi.l $r21,$r0,64
ldi.l $r22,$r0,68
ldi.l $r23,$r0,72
ldi.l $r24,$r0,76
ldi.l $r25,$r0,80
ldi.l $r26,$r0,84
ldi.l $r27,$r0,88
ldi.l $r28,$r0,92
ldi.l $r29,$r0,96
ldi.l $r30,$r0,100
ldi.l $r31,$r0,104
move.l $r0,$r1
jmpi $r5
.Lend2:
.size longjmp,.Lend2-longjmp
|
4ms/metamodule-plugin-sdk
| 1,046
|
plugin-libc/newlib/libc/machine/ft32/memset.S
|
/* A memset.c for FT32
Copyright (C) 2014 FTDI (support@ftdichip.com)
The authors hereby grant permission to use, copy, modify, distribute,
and license this software and its documentation for any purpose, provided
that existing copyright notices are retained in all copies and that this
notice is included verbatim in any distributions. No written agreement,
license, or royalty fee is required for any of the authorized uses.
Modifications to this software may be copyrighted by their authors
and need not follow the licensing terms described here, provided that
the new terms are clearly indicated on the first page of each file where
they apply. */
.text
.global memset
.type memset,@function
memset:
ldk $r3,32764
1:
cmp $r2,$r3
jmpc lte,2f
memset.b $r0,$r1,$r3
add $r0,$r0,$r3
sub $r2,$r2,$r3
jmp 1b
2:
memset.b $r0,$r1,$r2
return
.Lend2:
.size memset,.Lend2-memset
|
4ms/metamodule-plugin-sdk
| 25,998
|
plugin-libc/newlib/libc/machine/mips/memcpy.S
|
/*
* Copyright (c) 2012-2015
* MIPS Technologies, Inc., California.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the MIPS Technologies, Inc., nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE MIPS TECHNOLOGIES, INC. ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE MIPS TECHNOLOGIES, INC. BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#ifdef ANDROID_CHANGES
# include "machine/asm.h"
# include "machine/regdef.h"
# define USE_MEMMOVE_FOR_OVERLAP
# define PREFETCH_LOAD_HINT PREFETCH_HINT_LOAD_STREAMED
# define PREFETCH_STORE_HINT PREFETCH_HINT_PREPAREFORSTORE
#elif _LIBC
# include "machine/asm.h"
# include "machine/regdef.h"
# define PREFETCH_LOAD_HINT PREFETCH_HINT_LOAD_STREAMED
# define PREFETCH_STORE_HINT PREFETCH_HINT_PREPAREFORSTORE
#else
# include <regdef.h>
# include <sys/asm.h>
#endif
/* Check to see if the MIPS architecture we are compiling for supports
* prefetching.
*/
#if (__mips == 4) || (__mips == 5) || (__mips == 32) || (__mips == 64)
# ifndef DISABLE_PREFETCH
# define USE_PREFETCH
# endif
#endif
#if defined(_MIPS_SIM) && ((_MIPS_SIM == _ABI64) || (_MIPS_SIM == _ABIN32))
# ifndef DISABLE_DOUBLE
# define USE_DOUBLE
# endif
#endif
#if __mips_isa_rev > 5
# if (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE)
# undef PREFETCH_STORE_HINT
# define PREFETCH_STORE_HINT PREFETCH_HINT_STORE_STREAMED
# endif
# define R6_CODE
#endif
/* Some asm.h files do not have the L macro definition. */
#ifndef L
# if _MIPS_SIM == _ABIO32
# define L(label) $L ## label
# else
# define L(label) .L ## label
# endif
#endif
/* Some asm.h files do not have the PTR_ADDIU macro definition. */
#ifndef PTR_ADDIU
# ifdef USE_DOUBLE
# define PTR_ADDIU daddiu
# else
# define PTR_ADDIU addiu
# endif
#endif
/* Some asm.h files do not have the PTR_SRA macro definition. */
#ifndef PTR_SRA
# ifdef USE_DOUBLE
# define PTR_SRA dsra
# else
# define PTR_SRA sra
# endif
#endif
/* New R6 instructions that may not be in asm.h. */
#ifndef PTR_LSA
# if _MIPS_SIM == _ABI64
# define PTR_LSA dlsa
# else
# define PTR_LSA lsa
# endif
#endif
/*
* Using PREFETCH_HINT_LOAD_STREAMED instead of PREFETCH_LOAD on load
* prefetches appears to offer a slight preformance advantage.
*
* Using PREFETCH_HINT_PREPAREFORSTORE instead of PREFETCH_STORE
* or PREFETCH_STORE_STREAMED offers a large performance advantage
* but PREPAREFORSTORE has some special restrictions to consider.
*
* Prefetch with the 'prepare for store' hint does not copy a memory
* location into the cache, it just allocates a cache line and zeros
* it out. This means that if you do not write to the entire cache
* line before writing it out to memory some data will get zero'ed out
* when the cache line is written back to memory and data will be lost.
*
* Also if you are using this memcpy to copy overlapping buffers it may
* not behave correctly when using the 'prepare for store' hint. If you
* use the 'prepare for store' prefetch on a memory area that is in the
* memcpy source (as well as the memcpy destination), then you will get
* some data zero'ed out before you have a chance to read it and data will
* be lost.
*
* If you are going to use this memcpy routine with the 'prepare for store'
* prefetch you may want to set USE_MEMMOVE_FOR_OVERLAP in order to avoid
* the problem of running memcpy on overlapping buffers.
*
* There are ifdef'ed sections of this memcpy to make sure that it does not
* do prefetches on cache lines that are not going to be completely written.
* This code is only needed and only used when PREFETCH_STORE_HINT is set to
* PREFETCH_HINT_PREPAREFORSTORE. This code assumes that cache lines are
* 32 bytes and if the cache line is larger it will not work correctly.
*/
#ifdef USE_PREFETCH
# define PREFETCH_HINT_LOAD 0
# define PREFETCH_HINT_STORE 1
# define PREFETCH_HINT_LOAD_STREAMED 4
# define PREFETCH_HINT_STORE_STREAMED 5
# define PREFETCH_HINT_LOAD_RETAINED 6
# define PREFETCH_HINT_STORE_RETAINED 7
# define PREFETCH_HINT_WRITEBACK_INVAL 25
# define PREFETCH_HINT_PREPAREFORSTORE 30
/*
* If we have not picked out what hints to use at this point use the
* standard load and store prefetch hints.
*/
# ifndef PREFETCH_STORE_HINT
# define PREFETCH_STORE_HINT PREFETCH_HINT_STORE
# endif
# ifndef PREFETCH_LOAD_HINT
# define PREFETCH_LOAD_HINT PREFETCH_HINT_LOAD
# endif
/*
* We double everything when USE_DOUBLE is true so we do 2 prefetches to
* get 64 bytes in that case. The assumption is that each individual
* prefetch brings in 32 bytes.
*/
# ifdef USE_DOUBLE
# define PREFETCH_CHUNK 64
# define PREFETCH_FOR_LOAD(chunk, reg) \
pref PREFETCH_LOAD_HINT, (chunk)*64(reg); \
pref PREFETCH_LOAD_HINT, ((chunk)*64)+32(reg)
# define PREFETCH_FOR_STORE(chunk, reg) \
pref PREFETCH_STORE_HINT, (chunk)*64(reg); \
pref PREFETCH_STORE_HINT, ((chunk)*64)+32(reg)
# else
# define PREFETCH_CHUNK 32
# define PREFETCH_FOR_LOAD(chunk, reg) \
pref PREFETCH_LOAD_HINT, (chunk)*32(reg)
# define PREFETCH_FOR_STORE(chunk, reg) \
pref PREFETCH_STORE_HINT, (chunk)*32(reg)
# endif
/* MAX_PREFETCH_SIZE is the maximum size of a prefetch, it must not be less
* than PREFETCH_CHUNK, the assumed size of each prefetch. If the real size
* of a prefetch is greater than MAX_PREFETCH_SIZE and the PREPAREFORSTORE
* hint is used, the code will not work correctly. If PREPAREFORSTORE is not
* used then MAX_PREFETCH_SIZE does not matter. */
# define MAX_PREFETCH_SIZE 128
/* PREFETCH_LIMIT is set based on the fact that we never use an offset greater
* than 5 on a STORE prefetch and that a single prefetch can never be larger
* than MAX_PREFETCH_SIZE. We add the extra 32 when USE_DOUBLE is set because
* we actually do two prefetches in that case, one 32 bytes after the other. */
# ifdef USE_DOUBLE
# define PREFETCH_LIMIT (5 * PREFETCH_CHUNK) + 32 + MAX_PREFETCH_SIZE
# else
# define PREFETCH_LIMIT (5 * PREFETCH_CHUNK) + MAX_PREFETCH_SIZE
# endif
# if (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE) \
&& ((PREFETCH_CHUNK * 4) < MAX_PREFETCH_SIZE)
/* We cannot handle this because the initial prefetches may fetch bytes that
* are before the buffer being copied. We start copies with an offset
* of 4 so avoid this situation when using PREPAREFORSTORE. */
#error "PREFETCH_CHUNK is too large and/or MAX_PREFETCH_SIZE is too small."
# endif
#else /* USE_PREFETCH not defined */
# define PREFETCH_FOR_LOAD(offset, reg)
# define PREFETCH_FOR_STORE(offset, reg)
#endif
/* Allow the routine to be named something else if desired. */
#ifndef MEMCPY_NAME
# define MEMCPY_NAME memcpy
#endif
/* We use these 32/64 bit registers as temporaries to do the copying. */
#define REG0 t0
#define REG1 t1
#define REG2 t2
#define REG3 t3
#if defined(_MIPS_SIM) && (_MIPS_SIM == _ABIO32 || _MIPS_SIM == _ABIO64)
# define REG4 t4
# define REG5 t5
# define REG6 t6
# define REG7 t7
#else
# define REG4 ta0
# define REG5 ta1
# define REG6 ta2
# define REG7 ta3
#endif
/* We load/store 64 bits at a time when USE_DOUBLE is true.
* The C_ prefix stands for CHUNK and is used to avoid macro name
* conflicts with system header files. */
#ifdef USE_DOUBLE
# define C_ST sd
# define C_LD ld
# if __MIPSEB
# define C_LDHI ldl /* high part is left in big-endian */
# define C_STHI sdl /* high part is left in big-endian */
# define C_LDLO ldr /* low part is right in big-endian */
# define C_STLO sdr /* low part is right in big-endian */
# else
# define C_LDHI ldr /* high part is right in little-endian */
# define C_STHI sdr /* high part is right in little-endian */
# define C_LDLO ldl /* low part is left in little-endian */
# define C_STLO sdl /* low part is left in little-endian */
# endif
# define C_ALIGN dalign /* r6 align instruction */
#else
# define C_ST sw
# define C_LD lw
# if __MIPSEB
# define C_LDHI lwl /* high part is left in big-endian */
# define C_STHI swl /* high part is left in big-endian */
# define C_LDLO lwr /* low part is right in big-endian */
# define C_STLO swr /* low part is right in big-endian */
# else
# define C_LDHI lwr /* high part is right in little-endian */
# define C_STHI swr /* high part is right in little-endian */
# define C_LDLO lwl /* low part is left in little-endian */
# define C_STLO swl /* low part is left in little-endian */
# endif
# define C_ALIGN align /* r6 align instruction */
#endif
/* Bookkeeping values for 32 vs. 64 bit mode. */
#ifdef USE_DOUBLE
# define NSIZE 8
# define NSIZEMASK 0x3f
# define NSIZEDMASK 0x7f
#else
# define NSIZE 4
# define NSIZEMASK 0x1f
# define NSIZEDMASK 0x3f
#endif
#define UNIT(unit) ((unit)*NSIZE)
#define UNITM1(unit) (((unit)*NSIZE)-1)
#ifdef ANDROID_CHANGES
LEAF(MEMCPY_NAME, 0)
#else
LEAF(MEMCPY_NAME)
#endif
.set nomips16
.set noreorder
/*
* Below we handle the case where memcpy is called with overlapping src and dst.
* Although memcpy is not required to handle this case, some parts of Android
* like Skia rely on such usage. We call memmove to handle such cases.
*/
#ifdef USE_MEMMOVE_FOR_OVERLAP
PTR_SUBU t0,a0,a1
PTR_SRA t2,t0,31
xor t1,t0,t2
PTR_SUBU t0,t1,t2
sltu t2,t0,a2
beq t2,zero,L(memcpy)
la t9,memmove
jr t9
nop
L(memcpy):
#endif
/*
* If the size is less than 2*NSIZE (8 or 16), go to L(lastb). Regardless of
* size, copy dst pointer to v0 for the return value.
*/
slti t2,a2,(2 * NSIZE)
bne t2,zero,L(lasts)
#if defined(RETURN_FIRST_PREFETCH) || defined(RETURN_LAST_PREFETCH)
move v0,zero
#else
move v0,a0
#endif
#ifndef R6_CODE
/*
* If src and dst have different alignments, go to L(unaligned), if they
* have the same alignment (but are not actually aligned) do a partial
* load/store to make them aligned. If they are both already aligned
* we can start copying at L(aligned).
*/
xor t8,a1,a0
andi t8,t8,(NSIZE-1) /* t8 is a0/a1 word-displacement */
bne t8,zero,L(unaligned)
PTR_SUBU a3, zero, a0
andi a3,a3,(NSIZE-1) /* copy a3 bytes to align a0/a1 */
beq a3,zero,L(aligned) /* if a3=0, it is already aligned */
PTR_SUBU a2,a2,a3 /* a2 is the remining bytes count */
C_LDHI t8,0(a1)
PTR_ADDU a1,a1,a3
C_STHI t8,0(a0)
PTR_ADDU a0,a0,a3
#else /* R6_CODE */
/*
* Align the destination and hope that the source gets aligned too. If it
* doesn't we jump to L(r6_unaligned*) to do unaligned copies using the r6
* align instruction.
*/
andi t8,a0,7
lapc t9,L(atable)
PTR_LSA t9,t8,t9,2
jrc t9
L(atable):
bc L(lb0)
bc L(lb7)
bc L(lb6)
bc L(lb5)
bc L(lb4)
bc L(lb3)
bc L(lb2)
bc L(lb1)
L(lb7):
lb a3, 6(a1)
sb a3, 6(a0)
L(lb6):
lb a3, 5(a1)
sb a3, 5(a0)
L(lb5):
lb a3, 4(a1)
sb a3, 4(a0)
L(lb4):
lb a3, 3(a1)
sb a3, 3(a0)
L(lb3):
lb a3, 2(a1)
sb a3, 2(a0)
L(lb2):
lb a3, 1(a1)
sb a3, 1(a0)
L(lb1):
lb a3, 0(a1)
sb a3, 0(a0)
li t9,8
subu t8,t9,t8
PTR_SUBU a2,a2,t8
PTR_ADDU a0,a0,t8
PTR_ADDU a1,a1,t8
L(lb0):
andi t8,a1,(NSIZE-1)
lapc t9,L(jtable)
PTR_LSA t9,t8,t9,2
jrc t9
L(jtable):
bc L(aligned)
bc L(r6_unaligned1)
bc L(r6_unaligned2)
bc L(r6_unaligned3)
# ifdef USE_DOUBLE
bc L(r6_unaligned4)
bc L(r6_unaligned5)
bc L(r6_unaligned6)
bc L(r6_unaligned7)
# endif
#endif /* R6_CODE */
L(aligned):
/*
* Now dst/src are both aligned to (word or double word) aligned addresses
* Set a2 to count how many bytes we have to copy after all the 64/128 byte
* chunks are copied and a3 to the dst pointer after all the 64/128 byte
* chunks have been copied. We will loop, incrementing a0 and a1 until a0
* equals a3.
*/
andi t8,a2,NSIZEDMASK /* any whole 64-byte/128-byte chunks? */
beq a2,t8,L(chkw) /* if a2==t8, no 64-byte/128-byte chunks */
PTR_SUBU a3,a2,t8 /* subtract from a2 the reminder */
PTR_ADDU a3,a0,a3 /* Now a3 is the final dst after loop */
/* When in the loop we may prefetch with the 'prepare to store' hint,
* in this case the a0+x should not be past the "t0-32" address. This
* means: for x=128 the last "safe" a0 address is "t0-160". Alternatively,
* for x=64 the last "safe" a0 address is "t0-96" In the current version we
* will use "prefetch hint,128(a0)", so "t0-160" is the limit.
*/
#if defined(USE_PREFETCH) && (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE)
PTR_ADDU t0,a0,a2 /* t0 is the "past the end" address */
PTR_SUBU t9,t0,PREFETCH_LIMIT /* t9 is the "last safe pref" address */
#endif
PREFETCH_FOR_LOAD (0, a1)
PREFETCH_FOR_LOAD (1, a1)
PREFETCH_FOR_LOAD (2, a1)
PREFETCH_FOR_LOAD (3, a1)
#if defined(USE_PREFETCH) && (PREFETCH_STORE_HINT != PREFETCH_HINT_PREPAREFORSTORE)
PREFETCH_FOR_STORE (1, a0)
PREFETCH_FOR_STORE (2, a0)
PREFETCH_FOR_STORE (3, a0)
#endif
#if defined(RETURN_FIRST_PREFETCH) && defined(USE_PREFETCH)
# if PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE
sltu v1,t9,a0
bgtz v1,L(skip_set)
nop
PTR_ADDIU v0,a0,(PREFETCH_CHUNK*4)
L(skip_set):
# else
PTR_ADDIU v0,a0,(PREFETCH_CHUNK*1)
# endif
#endif
#if defined(RETURN_LAST_PREFETCH) && defined(USE_PREFETCH) \
&& (PREFETCH_STORE_HINT != PREFETCH_HINT_PREPAREFORSTORE)
PTR_ADDIU v0,a0,(PREFETCH_CHUNK*3)
# ifdef USE_DOUBLE
PTR_ADDIU v0,v0,32
# endif
#endif
L(loop16w):
C_LD t0,UNIT(0)(a1)
#if defined(USE_PREFETCH) && (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE)
sltu v1,t9,a0 /* If a0 > t9 don't use next prefetch */
bgtz v1,L(skip_pref)
#endif
C_LD t1,UNIT(1)(a1)
#ifndef R6_CODE
PREFETCH_FOR_STORE (4, a0)
PREFETCH_FOR_STORE (5, a0)
#else
PREFETCH_FOR_STORE (2, a0)
#endif
#if defined(RETURN_LAST_PREFETCH) && defined(USE_PREFETCH)
PTR_ADDIU v0,a0,(PREFETCH_CHUNK*5)
# ifdef USE_DOUBLE
PTR_ADDIU v0,v0,32
# endif
#endif
L(skip_pref):
C_LD REG2,UNIT(2)(a1)
C_LD REG3,UNIT(3)(a1)
C_LD REG4,UNIT(4)(a1)
C_LD REG5,UNIT(5)(a1)
C_LD REG6,UNIT(6)(a1)
C_LD REG7,UNIT(7)(a1)
#ifndef R6_CODE
PREFETCH_FOR_LOAD (4, a1)
#else
PREFETCH_FOR_LOAD (3, a1)
#endif
C_ST t0,UNIT(0)(a0)
C_ST t1,UNIT(1)(a0)
C_ST REG2,UNIT(2)(a0)
C_ST REG3,UNIT(3)(a0)
C_ST REG4,UNIT(4)(a0)
C_ST REG5,UNIT(5)(a0)
C_ST REG6,UNIT(6)(a0)
C_ST REG7,UNIT(7)(a0)
C_LD t0,UNIT(8)(a1)
C_LD t1,UNIT(9)(a1)
C_LD REG2,UNIT(10)(a1)
C_LD REG3,UNIT(11)(a1)
C_LD REG4,UNIT(12)(a1)
C_LD REG5,UNIT(13)(a1)
C_LD REG6,UNIT(14)(a1)
C_LD REG7,UNIT(15)(a1)
#ifndef R6_CODE
PREFETCH_FOR_LOAD (5, a1)
#endif
C_ST t0,UNIT(8)(a0)
C_ST t1,UNIT(9)(a0)
C_ST REG2,UNIT(10)(a0)
C_ST REG3,UNIT(11)(a0)
C_ST REG4,UNIT(12)(a0)
C_ST REG5,UNIT(13)(a0)
C_ST REG6,UNIT(14)(a0)
C_ST REG7,UNIT(15)(a0)
PTR_ADDIU a0,a0,UNIT(16) /* adding 64/128 to dest */
bne a0,a3,L(loop16w)
PTR_ADDIU a1,a1,UNIT(16) /* adding 64/128 to src */
move a2,t8
/* Here we have src and dest word-aligned but less than 64-bytes or
* 128 bytes to go. Check for a 32(64) byte chunk and copy if if there
* is one. Otherwise jump down to L(chk1w) to handle the tail end of
* the copy.
*/
L(chkw):
PREFETCH_FOR_LOAD (0, a1)
andi t8,a2,NSIZEMASK /* Is there a 32-byte/64-byte chunk. */
/* The t8 is the reminder count past 32-bytes */
beq a2,t8,L(chk1w) /* When a2=t8, no 32-byte chunk */
nop
C_LD t0,UNIT(0)(a1)
C_LD t1,UNIT(1)(a1)
C_LD REG2,UNIT(2)(a1)
C_LD REG3,UNIT(3)(a1)
C_LD REG4,UNIT(4)(a1)
C_LD REG5,UNIT(5)(a1)
C_LD REG6,UNIT(6)(a1)
C_LD REG7,UNIT(7)(a1)
PTR_ADDIU a1,a1,UNIT(8)
C_ST t0,UNIT(0)(a0)
C_ST t1,UNIT(1)(a0)
C_ST REG2,UNIT(2)(a0)
C_ST REG3,UNIT(3)(a0)
C_ST REG4,UNIT(4)(a0)
C_ST REG5,UNIT(5)(a0)
C_ST REG6,UNIT(6)(a0)
C_ST REG7,UNIT(7)(a0)
PTR_ADDIU a0,a0,UNIT(8)
/*
* Here we have less than 32(64) bytes to copy. Set up for a loop to
* copy one word (or double word) at a time. Set a2 to count how many
* bytes we have to copy after all the word (or double word) chunks are
* copied and a3 to the dst pointer after all the (d)word chunks have
* been copied. We will loop, incrementing a0 and a1 until a0 equals a3.
*/
L(chk1w):
andi a2,t8,(NSIZE-1) /* a2 is the reminder past one (d)word chunks */
beq a2,t8,L(lastw)
PTR_SUBU a3,t8,a2 /* a3 is count of bytes in one (d)word chunks */
PTR_ADDU a3,a0,a3 /* a3 is the dst address after loop */
/* copying in words (4-byte or 8-byte chunks) */
L(wordCopy_loop):
C_LD REG3,UNIT(0)(a1)
PTR_ADDIU a0,a0,UNIT(1)
PTR_ADDIU a1,a1,UNIT(1)
bne a0,a3,L(wordCopy_loop)
C_ST REG3,UNIT(-1)(a0)
/* If we have been copying double words, see if we can copy a single word
before doing byte copies. We can have, at most, one word to copy. */
L(lastw):
#ifdef USE_DOUBLE
andi t8,a2,3 /* a2 is the remainder past 4 byte chunks. */
beq t8,a2,L(lastb)
move a2,t8
lw REG3,0(a1)
sw REG3,0(a0)
PTR_ADDIU a0,a0,4
PTR_ADDIU a1,a1,4
#endif
/* Copy the last 8 (or 16) bytes */
L(lastb):
blez a2,L(leave)
PTR_ADDU a3,a0,a2 /* a3 is the last dst address */
L(lastbloop):
lb v1,0(a1)
PTR_ADDIU a0,a0,1
PTR_ADDIU a1,a1,1
bne a0,a3,L(lastbloop)
sb v1,-1(a0)
L(leave):
j ra
nop
/* We jump here with a memcpy of less than 8 or 16 bytes, depending on
whether or not USE_DOUBLE is defined. Instead of just doing byte
copies, check the alignment and size and use lw/sw if possible.
Otherwise, do byte copies. */
L(lasts):
andi t8,a2,3
beq t8,a2,L(lastb)
andi t9,a0,3
bne t9,zero,L(lastb)
andi t9,a1,3
bne t9,zero,L(lastb)
PTR_SUBU a3,a2,t8
PTR_ADDU a3,a0,a3
L(wcopy_loop):
lw REG3,0(a1)
PTR_ADDIU a0,a0,4
PTR_ADDIU a1,a1,4
bne a0,a3,L(wcopy_loop)
sw REG3,-4(a0)
b L(lastb)
move a2,t8
#ifndef R6_CODE
/*
* UNALIGNED case, got here with a3 = "negu a0"
* This code is nearly identical to the aligned code above
* but only the destination (not the source) gets aligned
* so we need to do partial loads of the source followed
* by normal stores to the destination (once we have aligned
* the destination).
*/
L(unaligned):
andi a3,a3,(NSIZE-1) /* copy a3 bytes to align a0/a1 */
beqz a3,L(ua_chk16w) /* if a3=0, it is already aligned */
PTR_SUBU a2,a2,a3 /* a2 is the remining bytes count */
C_LDHI v1,UNIT(0)(a1)
C_LDLO v1,UNITM1(1)(a1)
PTR_ADDU a1,a1,a3
C_STHI v1,UNIT(0)(a0)
PTR_ADDU a0,a0,a3
/*
* Now the destination (but not the source) is aligned
* Set a2 to count how many bytes we have to copy after all the 64/128 byte
* chunks are copied and a3 to the dst pointer after all the 64/128 byte
* chunks have been copied. We will loop, incrementing a0 and a1 until a0
* equals a3.
*/
L(ua_chk16w):
andi t8,a2,NSIZEDMASK /* any whole 64-byte/128-byte chunks? */
beq a2,t8,L(ua_chkw) /* if a2==t8, no 64-byte/128-byte chunks */
PTR_SUBU a3,a2,t8 /* subtract from a2 the reminder */
PTR_ADDU a3,a0,a3 /* Now a3 is the final dst after loop */
# if defined(USE_PREFETCH) && (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE)
PTR_ADDU t0,a0,a2 /* t0 is the "past the end" address */
PTR_SUBU t9,t0,PREFETCH_LIMIT /* t9 is the "last safe pref" address */
# endif
PREFETCH_FOR_LOAD (0, a1)
PREFETCH_FOR_LOAD (1, a1)
PREFETCH_FOR_LOAD (2, a1)
# if defined(USE_PREFETCH) && (PREFETCH_STORE_HINT != PREFETCH_HINT_PREPAREFORSTORE)
PREFETCH_FOR_STORE (1, a0)
PREFETCH_FOR_STORE (2, a0)
PREFETCH_FOR_STORE (3, a0)
# endif
# if defined(RETURN_FIRST_PREFETCH) && defined(USE_PREFETCH)
# if (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE)
sltu v1,t9,a0
bgtz v1,L(ua_skip_set)
nop
PTR_ADDIU v0,a0,(PREFETCH_CHUNK*4)
L(ua_skip_set):
# else
PTR_ADDIU v0,a0,(PREFETCH_CHUNK*1)
# endif
# endif
L(ua_loop16w):
PREFETCH_FOR_LOAD (3, a1)
C_LDHI t0,UNIT(0)(a1)
C_LDHI t1,UNIT(1)(a1)
C_LDHI REG2,UNIT(2)(a1)
# if defined(USE_PREFETCH) && (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE)
sltu v1,t9,a0
bgtz v1,L(ua_skip_pref)
# endif
C_LDHI REG3,UNIT(3)(a1)
PREFETCH_FOR_STORE (4, a0)
PREFETCH_FOR_STORE (5, a0)
L(ua_skip_pref):
C_LDHI REG4,UNIT(4)(a1)
C_LDHI REG5,UNIT(5)(a1)
C_LDHI REG6,UNIT(6)(a1)
C_LDHI REG7,UNIT(7)(a1)
C_LDLO t0,UNITM1(1)(a1)
C_LDLO t1,UNITM1(2)(a1)
C_LDLO REG2,UNITM1(3)(a1)
C_LDLO REG3,UNITM1(4)(a1)
C_LDLO REG4,UNITM1(5)(a1)
C_LDLO REG5,UNITM1(6)(a1)
C_LDLO REG6,UNITM1(7)(a1)
C_LDLO REG7,UNITM1(8)(a1)
PREFETCH_FOR_LOAD (4, a1)
C_ST t0,UNIT(0)(a0)
C_ST t1,UNIT(1)(a0)
C_ST REG2,UNIT(2)(a0)
C_ST REG3,UNIT(3)(a0)
C_ST REG4,UNIT(4)(a0)
C_ST REG5,UNIT(5)(a0)
C_ST REG6,UNIT(6)(a0)
C_ST REG7,UNIT(7)(a0)
C_LDHI t0,UNIT(8)(a1)
C_LDHI t1,UNIT(9)(a1)
C_LDHI REG2,UNIT(10)(a1)
C_LDHI REG3,UNIT(11)(a1)
C_LDHI REG4,UNIT(12)(a1)
C_LDHI REG5,UNIT(13)(a1)
C_LDHI REG6,UNIT(14)(a1)
C_LDHI REG7,UNIT(15)(a1)
C_LDLO t0,UNITM1(9)(a1)
C_LDLO t1,UNITM1(10)(a1)
C_LDLO REG2,UNITM1(11)(a1)
C_LDLO REG3,UNITM1(12)(a1)
C_LDLO REG4,UNITM1(13)(a1)
C_LDLO REG5,UNITM1(14)(a1)
C_LDLO REG6,UNITM1(15)(a1)
C_LDLO REG7,UNITM1(16)(a1)
PREFETCH_FOR_LOAD (5, a1)
C_ST t0,UNIT(8)(a0)
C_ST t1,UNIT(9)(a0)
C_ST REG2,UNIT(10)(a0)
C_ST REG3,UNIT(11)(a0)
C_ST REG4,UNIT(12)(a0)
C_ST REG5,UNIT(13)(a0)
C_ST REG6,UNIT(14)(a0)
C_ST REG7,UNIT(15)(a0)
PTR_ADDIU a0,a0,UNIT(16) /* adding 64/128 to dest */
bne a0,a3,L(ua_loop16w)
PTR_ADDIU a1,a1,UNIT(16) /* adding 64/128 to src */
move a2,t8
/* Here we have src and dest word-aligned but less than 64-bytes or
* 128 bytes to go. Check for a 32(64) byte chunk and copy if if there
* is one. Otherwise jump down to L(ua_chk1w) to handle the tail end of
* the copy. */
L(ua_chkw):
PREFETCH_FOR_LOAD (0, a1)
andi t8,a2,NSIZEMASK /* Is there a 32-byte/64-byte chunk. */
/* t8 is the reminder count past 32-bytes */
beq a2,t8,L(ua_chk1w) /* When a2=t8, no 32-byte chunk */
nop
C_LDHI t0,UNIT(0)(a1)
C_LDHI t1,UNIT(1)(a1)
C_LDHI REG2,UNIT(2)(a1)
C_LDHI REG3,UNIT(3)(a1)
C_LDHI REG4,UNIT(4)(a1)
C_LDHI REG5,UNIT(5)(a1)
C_LDHI REG6,UNIT(6)(a1)
C_LDHI REG7,UNIT(7)(a1)
C_LDLO t0,UNITM1(1)(a1)
C_LDLO t1,UNITM1(2)(a1)
C_LDLO REG2,UNITM1(3)(a1)
C_LDLO REG3,UNITM1(4)(a1)
C_LDLO REG4,UNITM1(5)(a1)
C_LDLO REG5,UNITM1(6)(a1)
C_LDLO REG6,UNITM1(7)(a1)
C_LDLO REG7,UNITM1(8)(a1)
PTR_ADDIU a1,a1,UNIT(8)
C_ST t0,UNIT(0)(a0)
C_ST t1,UNIT(1)(a0)
C_ST REG2,UNIT(2)(a0)
C_ST REG3,UNIT(3)(a0)
C_ST REG4,UNIT(4)(a0)
C_ST REG5,UNIT(5)(a0)
C_ST REG6,UNIT(6)(a0)
C_ST REG7,UNIT(7)(a0)
PTR_ADDIU a0,a0,UNIT(8)
/*
* Here we have less than 32(64) bytes to copy. Set up for a loop to
* copy one word (or double word) at a time.
*/
L(ua_chk1w):
andi a2,t8,(NSIZE-1) /* a2 is the reminder past one (d)word chunks */
beq a2,t8,L(ua_smallCopy)
PTR_SUBU a3,t8,a2 /* a3 is count of bytes in one (d)word chunks */
PTR_ADDU a3,a0,a3 /* a3 is the dst address after loop */
/* copying in words (4-byte or 8-byte chunks) */
L(ua_wordCopy_loop):
C_LDHI v1,UNIT(0)(a1)
C_LDLO v1,UNITM1(1)(a1)
PTR_ADDIU a0,a0,UNIT(1)
PTR_ADDIU a1,a1,UNIT(1)
bne a0,a3,L(ua_wordCopy_loop)
C_ST v1,UNIT(-1)(a0)
/* Copy the last 8 (or 16) bytes */
L(ua_smallCopy):
beqz a2,L(leave)
PTR_ADDU a3,a0,a2 /* a3 is the last dst address */
L(ua_smallCopy_loop):
lb v1,0(a1)
PTR_ADDIU a0,a0,1
PTR_ADDIU a1,a1,1
bne a0,a3,L(ua_smallCopy_loop)
sb v1,-1(a0)
j ra
nop
#else /* R6_CODE */
# if __MIPSEB
# define SWAP_REGS(X,Y) X, Y
# define ALIGN_OFFSET(N) (N)
# else
# define SWAP_REGS(X,Y) Y, X
# define ALIGN_OFFSET(N) (NSIZE-N)
# endif
# define R6_UNALIGNED_WORD_COPY(BYTEOFFSET) \
andi REG7, a2, (NSIZE-1);/* REG7 is # of bytes to by bytes. */ \
beq REG7, a2, L(lastb); /* Check for bytes to copy by word */ \
PTR_SUBU a3, a2, REG7; /* a3 is number of bytes to be copied in */ \
/* (d)word chunks. */ \
move a2, REG7; /* a2 is # of bytes to copy byte by byte */ \
/* after word loop is finished. */ \
PTR_ADDU REG6, a0, a3; /* REG6 is the dst address after loop. */ \
PTR_SUBU REG2, a1, t8; /* REG2 is the aligned src address. */ \
PTR_ADDU a1, a1, a3; /* a1 is addr of source after word loop. */ \
C_LD t0, UNIT(0)(REG2); /* Load first part of source. */ \
L(r6_ua_wordcopy##BYTEOFFSET): \
C_LD t1, UNIT(1)(REG2); /* Load second part of source. */ \
C_ALIGN REG3, SWAP_REGS(t1,t0), ALIGN_OFFSET(BYTEOFFSET); \
PTR_ADDIU a0, a0, UNIT(1); /* Increment destination pointer. */ \
PTR_ADDIU REG2, REG2, UNIT(1); /* Increment aligned source pointer.*/ \
move t0, t1; /* Move second part of source to first. */ \
bne a0, REG6,L(r6_ua_wordcopy##BYTEOFFSET); \
C_ST REG3, UNIT(-1)(a0); \
j L(lastb); \
nop
/* We are generating R6 code, the destination is 4 byte aligned and
the source is not 4 byte aligned. t8 is 1, 2, or 3 depending on the
alignment of the source. */
L(r6_unaligned1):
R6_UNALIGNED_WORD_COPY(1)
L(r6_unaligned2):
R6_UNALIGNED_WORD_COPY(2)
L(r6_unaligned3):
R6_UNALIGNED_WORD_COPY(3)
# ifdef USE_DOUBLE
L(r6_unaligned4):
R6_UNALIGNED_WORD_COPY(4)
L(r6_unaligned5):
R6_UNALIGNED_WORD_COPY(5)
L(r6_unaligned6):
R6_UNALIGNED_WORD_COPY(6)
L(r6_unaligned7):
R6_UNALIGNED_WORD_COPY(7)
# endif
#endif /* R6_CODE */
.set at
.set reorder
END(MEMCPY_NAME)
|
4ms/metamodule-plugin-sdk
| 3,986
|
plugin-libc/newlib/libc/machine/mips/setjmp.S
|
/* This is a simple version of setjmp and longjmp for MIPS 32 and 64.
Ian Lance Taylor, Cygnus Support, 13 May 1993. */
#ifdef __mips16
/* This file contains 32 bit assembly code. */
.set nomips16
#endif
#define GPR_LAYOUT \
GPR_OFFSET ($16, 0); \
GPR_OFFSET ($17, 1); \
GPR_OFFSET ($18, 2); \
GPR_OFFSET ($19, 3); \
GPR_OFFSET ($20, 4); \
GPR_OFFSET ($21, 5); \
GPR_OFFSET ($22, 6); \
GPR_OFFSET ($23, 7); \
GPR_OFFSET ($29, 8); \
GPR_OFFSET ($30, 9); \
GPR_OFFSET ($31, 10)
#define NUM_GPRS_SAVED 11
#ifdef __mips_hard_float
#if _MIPS_SIM == _ABIN32
#define FPR_LAYOUT \
FPR_OFFSET ($f20, 0); \
FPR_OFFSET ($f22, 1); \
FPR_OFFSET ($f24, 2); \
FPR_OFFSET ($f26, 3); \
FPR_OFFSET ($f28, 4); \
FPR_OFFSET ($f30, 5);
#elif _MIPS_SIM == _ABI64
#define FPR_LAYOUT \
FPR_OFFSET ($f24, 0); \
FPR_OFFSET ($f25, 1); \
FPR_OFFSET ($f26, 2); \
FPR_OFFSET ($f27, 3); \
FPR_OFFSET ($f28, 4); \
FPR_OFFSET ($f29, 5); \
FPR_OFFSET ($f30, 6); \
FPR_OFFSET ($f31, 7);
#elif __mips_fpr == 0 || __mips_fpr == 64
/* This deals with the o32 FPXX and FP64 cases. Here we must use
SDC1 and LDC1 to access the FPRs. These instructions require
8-byte aligned addresses.
Unfortunately, the MIPS jmp_buf only guarantees 4-byte alignment
and this cannot be increased without breaking compatibility with
pre-existing objects built against newlib. There are 11 GPRS
saved in the jmp_buf so a buffer that happens to be 8-byte aligned
ends up leaving the FPR slots 4-byte aligned and an (only) 4-byte
aligned buffer leads to the FPR slots being 8-byte aligned!
To resolve this, we move the location of $31 to the last slot
in the jmp_buf when the overall buffer is 8-byte aligned. $31
is simply loaded/stored twice to avoid adding complexity to the
GPR_LAYOUT macro above as well as FPR_LAYOUT.
The location of the last slot is index 22 which is calculated
from there being 11 GPRs saved and then 12 FPRs saved so the
index of the last FPR is 11+11.
The base of the jmp_buf is modified in $4 to allow the
FPR_OFFSET macros to just use the usual constant slot numbers
regardless of whether the realignment happened or not. */
#define FPR_LAYOUT \
and $8, $4, 4; \
beq $8, $0, 1f; \
GPR_OFFSET ($31, 22); \
addiu $4, $4, -4; \
1: \
FPR_OFFSET ($f20, 0); \
FPR_OFFSET ($f22, 2); \
FPR_OFFSET ($f24, 4); \
FPR_OFFSET ($f26, 6); \
FPR_OFFSET ($f28, 8); \
FPR_OFFSET ($f30, 10);
#else /* Assuming _MIPS_SIM == _ABIO32 */
#define FPR_LAYOUT \
FPR_OFFSET ($f20, 0); \
FPR_OFFSET ($f21, 1); \
FPR_OFFSET ($f22, 2); \
FPR_OFFSET ($f23, 3); \
FPR_OFFSET ($f24, 4); \
FPR_OFFSET ($f25, 5); \
FPR_OFFSET ($f26, 6); \
FPR_OFFSET ($f27, 7); \
FPR_OFFSET ($f28, 8); \
FPR_OFFSET ($f29, 9); \
FPR_OFFSET ($f30, 10); \
FPR_OFFSET ($f31, 11);
#endif
#else
#define FPR_LAYOUT
#endif
#ifdef __mips64
#define BYTES_PER_WORD 8
#define LOAD_GPR ld
#define LOAD_FPR ldc1
#define STORE_GPR sd
#define STORE_FPR sdc1
#else
#define LOAD_GPR lw
#define STORE_GPR sw
#define BYTES_PER_WORD 4
#if __mips_fpr == 0 || __mips_fpr == 64
#define LOAD_FPR ldc1
#define STORE_FPR sdc1
#else
#define LOAD_FPR lwc1
#define STORE_FPR swc1
#endif
#endif
#define GPOFF(INDEX) (INDEX * BYTES_PER_WORD)
#define FPOFF(INDEX) ((INDEX + NUM_GPRS_SAVED) * BYTES_PER_WORD)
/* int setjmp (jmp_buf); */
.globl setjmp
.ent setjmp
setjmp:
.frame $sp,0,$31
#define GPR_OFFSET(REG, INDEX) STORE_GPR REG,GPOFF(INDEX)($4)
#define FPR_OFFSET(REG, INDEX) STORE_FPR REG,FPOFF(INDEX)($4)
GPR_LAYOUT
FPR_LAYOUT
#undef GPR_OFFSET
#undef FPR_OFFSET
move $2,$0
j $31
.end setjmp
/* volatile void longjmp (jmp_buf, int); */
.globl longjmp
.ent longjmp
longjmp:
.frame $sp,0,$31
#define GPR_OFFSET(REG, INDEX) LOAD_GPR REG,GPOFF(INDEX)($4)
#define FPR_OFFSET(REG, INDEX) LOAD_FPR REG,FPOFF(INDEX)($4)
GPR_LAYOUT
FPR_LAYOUT
#undef GPR_OFFSET
#undef FPR_OFFSET
bne $5,$0,1f
li $5,1
1:
move $2,$5
j $31
.end longjmp
|
4ms/metamodule-plugin-sdk
| 13,411
|
plugin-libc/newlib/libc/machine/mips/memset.S
|
/*
* Copyright (c) 2013
* MIPS Technologies, Inc., California.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the MIPS Technologies, Inc., nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE MIPS TECHNOLOGIES, INC. ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE MIPS TECHNOLOGIES, INC. BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#ifdef ANDROID_CHANGES
# include "machine/asm.h"
# include "machine/regdef.h"
# define PREFETCH_STORE_HINT PREFETCH_HINT_PREPAREFORSTORE
#elif _LIBC
# include "machine/asm.h"
# include "machine/regdef.h"
# define PREFETCH_STORE_HINT PREFETCH_HINT_PREPAREFORSTORE
#else
# include <regdef.h>
# include <sys/asm.h>
#endif
/* Check to see if the MIPS architecture we are compiling for supports
prefetching. */
#if (__mips == 4) || (__mips == 5) || (__mips == 32) || (__mips == 64)
# ifndef DISABLE_PREFETCH
# define USE_PREFETCH
# endif
#endif
#if defined(_MIPS_SIM) && ((_MIPS_SIM == _ABI64) || (_MIPS_SIM == _ABIN32))
# ifndef DISABLE_DOUBLE
# define USE_DOUBLE
# endif
#endif
#ifndef USE_DOUBLE
# ifndef DISABLE_DOUBLE_ALIGN
# define DOUBLE_ALIGN
# endif
#endif
/* Some asm.h files do not have the L macro definition. */
#ifndef L
# if _MIPS_SIM == _ABIO32
# define L(label) $L ## label
# else
# define L(label) .L ## label
# endif
#endif
/* Some asm.h files do not have the PTR_ADDIU macro definition. */
#ifndef PTR_ADDIU
# ifdef USE_DOUBLE
# define PTR_ADDIU daddiu
# else
# define PTR_ADDIU addiu
# endif
#endif
/* New R6 instructions that may not be in asm.h. */
#ifndef PTR_LSA
# if _MIPS_SIM == _ABI64
# define PTR_LSA dlsa
# else
# define PTR_LSA lsa
# endif
#endif
/* Using PREFETCH_HINT_PREPAREFORSTORE instead of PREFETCH_STORE
or PREFETCH_STORE_STREAMED offers a large performance advantage
but PREPAREFORSTORE has some special restrictions to consider.
Prefetch with the 'prepare for store' hint does not copy a memory
location into the cache, it just allocates a cache line and zeros
it out. This means that if you do not write to the entire cache
line before writing it out to memory some data will get zero'ed out
when the cache line is written back to memory and data will be lost.
There are ifdef'ed sections of this memcpy to make sure that it does not
do prefetches on cache lines that are not going to be completely written.
This code is only needed and only used when PREFETCH_STORE_HINT is set to
PREFETCH_HINT_PREPAREFORSTORE. This code assumes that cache lines are
less than MAX_PREFETCH_SIZE bytes and if the cache line is larger it will
not work correctly. */
#ifdef USE_PREFETCH
# define PREFETCH_HINT_STORE 1
# define PREFETCH_HINT_STORE_STREAMED 5
# define PREFETCH_HINT_STORE_RETAINED 7
# define PREFETCH_HINT_PREPAREFORSTORE 30
/* If we have not picked out what hints to use at this point use the
standard load and store prefetch hints. */
# ifndef PREFETCH_STORE_HINT
# define PREFETCH_STORE_HINT PREFETCH_HINT_STORE
# endif
/* We double everything when USE_DOUBLE is true so we do 2 prefetches to
get 64 bytes in that case. The assumption is that each individual
prefetch brings in 32 bytes. */
# ifdef USE_DOUBLE
# define PREFETCH_CHUNK 64
# define PREFETCH_FOR_STORE(chunk, reg) \
pref PREFETCH_STORE_HINT, (chunk)*64(reg); \
pref PREFETCH_STORE_HINT, ((chunk)*64)+32(reg)
# else
# define PREFETCH_CHUNK 32
# define PREFETCH_FOR_STORE(chunk, reg) \
pref PREFETCH_STORE_HINT, (chunk)*32(reg)
# endif
/* MAX_PREFETCH_SIZE is the maximum size of a prefetch, it must not be less
than PREFETCH_CHUNK, the assumed size of each prefetch. If the real size
of a prefetch is greater than MAX_PREFETCH_SIZE and the PREPAREFORSTORE
hint is used, the code will not work correctly. If PREPAREFORSTORE is not
used than MAX_PREFETCH_SIZE does not matter. */
# define MAX_PREFETCH_SIZE 128
/* PREFETCH_LIMIT is set based on the fact that we never use an offset greater
than 5 on a STORE prefetch and that a single prefetch can never be larger
than MAX_PREFETCH_SIZE. We add the extra 32 when USE_DOUBLE is set because
we actually do two prefetches in that case, one 32 bytes after the other. */
# ifdef USE_DOUBLE
# define PREFETCH_LIMIT (5 * PREFETCH_CHUNK) + 32 + MAX_PREFETCH_SIZE
# else
# define PREFETCH_LIMIT (5 * PREFETCH_CHUNK) + MAX_PREFETCH_SIZE
# endif
# if (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE) \
&& ((PREFETCH_CHUNK * 4) < MAX_PREFETCH_SIZE)
/* We cannot handle this because the initial prefetches may fetch bytes that
are before the buffer being copied. We start copies with an offset
of 4 so avoid this situation when using PREPAREFORSTORE. */
# error "PREFETCH_CHUNK is too large and/or MAX_PREFETCH_SIZE is too small."
# endif
#else /* USE_PREFETCH not defined */
# define PREFETCH_FOR_STORE(offset, reg)
#endif
#if __mips_isa_rev > 5
# if (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE)
# undef PREFETCH_STORE_HINT
# define PREFETCH_STORE_HINT PREFETCH_HINT_STORE_STREAMED
# endif
# define R6_CODE
#endif
/* Allow the routine to be named something else if desired. */
#ifndef MEMSET_NAME
# define MEMSET_NAME memset
#endif
/* We load/store 64 bits at a time when USE_DOUBLE is true.
The C_ prefix stands for CHUNK and is used to avoid macro name
conflicts with system header files. */
#ifdef USE_DOUBLE
# define C_ST sd
# if __MIPSEB
# define C_STHI sdl /* high part is left in big-endian */
# else
# define C_STHI sdr /* high part is right in little-endian */
# endif
#else
# define C_ST sw
# if __MIPSEB
# define C_STHI swl /* high part is left in big-endian */
# else
# define C_STHI swr /* high part is right in little-endian */
# endif
#endif
/* Bookkeeping values for 32 vs. 64 bit mode. */
#ifdef USE_DOUBLE
# define NSIZE 8
# define NSIZEMASK 0x3f
# define NSIZEDMASK 0x7f
#else
# define NSIZE 4
# define NSIZEMASK 0x1f
# define NSIZEDMASK 0x3f
#endif
#define UNIT(unit) ((unit)*NSIZE)
#define UNITM1(unit) (((unit)*NSIZE)-1)
#ifdef ANDROID_CHANGES
LEAF(MEMSET_NAME,0)
#else
LEAF(MEMSET_NAME)
#endif
.set nomips16
.set noreorder
/* If the size is less than 2*NSIZE (8 or 16), go to L(lastb). Regardless of
size, copy dst pointer to v0 for the return value. */
slti t2,a2,(2 * NSIZE)
bne t2,zero,L(lastb)
move v0,a0
/* If memset value is not zero, we copy it to all the bytes in a 32 or 64
bit word. */
beq a1,zero,L(set0) /* If memset value is zero no smear */
PTR_SUBU a3,zero,a0
nop
/* smear byte into 32 or 64 bit word */
#if ((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2)
# ifdef USE_DOUBLE
dins a1, a1, 8, 8 /* Replicate fill byte into half-word. */
dins a1, a1, 16, 16 /* Replicate fill byte into word. */
dins a1, a1, 32, 32 /* Replicate fill byte into dbl word. */
# else
ins a1, a1, 8, 8 /* Replicate fill byte into half-word. */
ins a1, a1, 16, 16 /* Replicate fill byte into word. */
# endif
#else
# ifdef USE_DOUBLE
and a1,0xff
dsll t2,a1,8
or a1,t2
dsll t2,a1,16
or a1,t2
dsll t2,a1,32
or a1,t2
# else
and a1,0xff
sll t2,a1,8
or a1,t2
sll t2,a1,16
or a1,t2
# endif
#endif
/* If the destination address is not aligned do a partial store to get it
aligned. If it is already aligned just jump to L(aligned). */
L(set0):
#ifndef R6_CODE
andi t2,a3,(NSIZE-1) /* word-unaligned address? */
beq t2,zero,L(aligned) /* t2 is the unalignment count */
PTR_SUBU a2,a2,t2
C_STHI a1,0(a0)
PTR_ADDU a0,a0,t2
#else /* R6_CODE */
andi t2,a0,(NSIZE-1)
lapc t9,L(atable)
PTR_LSA t9,t2,t9,2
jrc t9
L(atable):
bc L(aligned)
# ifdef USE_DOUBLE
bc L(lb7)
bc L(lb6)
bc L(lb5)
bc L(lb4)
# endif
bc L(lb3)
bc L(lb2)
bc L(lb1)
L(lb7):
sb a1,6(a0)
L(lb6):
sb a1,5(a0)
L(lb5):
sb a1,4(a0)
L(lb4):
sb a1,3(a0)
L(lb3):
sb a1,2(a0)
L(lb2):
sb a1,1(a0)
L(lb1):
sb a1,0(a0)
li t9,NSIZE
subu t2,t9,t2
PTR_SUBU a2,a2,t2
PTR_ADDU a0,a0,t2
#endif /* R6_CODE */
L(aligned):
/* If USE_DOUBLE is not set we may still want to align the data on a 16
byte boundry instead of an 8 byte boundry to maximize the opportunity
of proAptiv chips to do memory bonding (combining two sequential 4
byte stores into one 8 byte store). We know there are at least 4 bytes
left to store or we would have jumped to L(lastb) earlier in the code. */
#ifdef DOUBLE_ALIGN
andi t2,a3,4
beq t2,zero,L(double_aligned)
PTR_SUBU a2,a2,t2
sw a1,0(a0)
PTR_ADDU a0,a0,t2
L(double_aligned):
#endif
/* Now the destination is aligned to (word or double word) aligned address
Set a2 to count how many bytes we have to copy after all the 64/128 byte
chunks are copied and a3 to the dest pointer after all the 64/128 byte
chunks have been copied. We will loop, incrementing a0 until it equals
a3. */
andi t8,a2,NSIZEDMASK /* any whole 64-byte/128-byte chunks? */
beq a2,t8,L(chkw) /* if a2==t8, no 64-byte/128-byte chunks */
PTR_SUBU a3,a2,t8 /* subtract from a2 the reminder */
PTR_ADDU a3,a0,a3 /* Now a3 is the final dst after loop */
/* When in the loop we may prefetch with the 'prepare to store' hint,
in this case the a0+x should not be past the "t0-32" address. This
means: for x=128 the last "safe" a0 address is "t0-160". Alternatively,
for x=64 the last "safe" a0 address is "t0-96" In the current version we
will use "prefetch hint,128(a0)", so "t0-160" is the limit. */
#if defined(USE_PREFETCH) \
&& (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE)
PTR_ADDU t0,a0,a2 /* t0 is the "past the end" address */
PTR_SUBU t9,t0,PREFETCH_LIMIT /* t9 is the "last safe pref" address */
#endif
#if defined(USE_PREFETCH) \
&& (PREFETCH_STORE_HINT != PREFETCH_HINT_PREPAREFORSTORE)
PREFETCH_FOR_STORE (1, a0)
PREFETCH_FOR_STORE (2, a0)
PREFETCH_FOR_STORE (3, a0)
#endif
L(loop16w):
#if defined(USE_PREFETCH) \
&& (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE)
sltu v1,t9,a0 /* If a0 > t9 don't use next prefetch */
bgtz v1,L(skip_pref)
nop
#endif
#ifndef R6_CODE
PREFETCH_FOR_STORE (4, a0)
PREFETCH_FOR_STORE (5, a0)
#else
PREFETCH_FOR_STORE (2, a0)
#endif
L(skip_pref):
C_ST a1,UNIT(0)(a0)
C_ST a1,UNIT(1)(a0)
C_ST a1,UNIT(2)(a0)
C_ST a1,UNIT(3)(a0)
C_ST a1,UNIT(4)(a0)
C_ST a1,UNIT(5)(a0)
C_ST a1,UNIT(6)(a0)
C_ST a1,UNIT(7)(a0)
C_ST a1,UNIT(8)(a0)
C_ST a1,UNIT(9)(a0)
C_ST a1,UNIT(10)(a0)
C_ST a1,UNIT(11)(a0)
C_ST a1,UNIT(12)(a0)
C_ST a1,UNIT(13)(a0)
C_ST a1,UNIT(14)(a0)
C_ST a1,UNIT(15)(a0)
PTR_ADDIU a0,a0,UNIT(16) /* adding 64/128 to dest */
bne a0,a3,L(loop16w)
nop
move a2,t8
/* Here we have dest word-aligned but less than 64-bytes or 128 bytes to go.
Check for a 32(64) byte chunk and copy if if there is one. Otherwise
jump down to L(chk1w) to handle the tail end of the copy. */
L(chkw):
andi t8,a2,NSIZEMASK /* is there a 32-byte/64-byte chunk. */
/* the t8 is the reminder count past 32-bytes */
beq a2,t8,L(chk1w)/* when a2==t8, no 32-byte chunk */
nop
C_ST a1,UNIT(0)(a0)
C_ST a1,UNIT(1)(a0)
C_ST a1,UNIT(2)(a0)
C_ST a1,UNIT(3)(a0)
C_ST a1,UNIT(4)(a0)
C_ST a1,UNIT(5)(a0)
C_ST a1,UNIT(6)(a0)
C_ST a1,UNIT(7)(a0)
PTR_ADDIU a0,a0,UNIT(8)
/* Here we have less than 32(64) bytes to set. Set up for a loop to
copy one word (or double word) at a time. Set a2 to count how many
bytes we have to copy after all the word (or double word) chunks are
copied and a3 to the dest pointer after all the (d)word chunks have
been copied. We will loop, incrementing a0 until a0 equals a3. */
L(chk1w):
andi a2,t8,(NSIZE-1) /* a2 is the reminder past one (d)word chunks */
beq a2,t8,L(lastb)
PTR_SUBU a3,t8,a2 /* a3 is count of bytes in one (d)word chunks */
PTR_ADDU a3,a0,a3 /* a3 is the dst address after loop */
/* copying in words (4-byte or 8 byte chunks) */
L(wordCopy_loop):
PTR_ADDIU a0,a0,UNIT(1)
bne a0,a3,L(wordCopy_loop)
C_ST a1,UNIT(-1)(a0)
/* Copy the last 8 (or 16) bytes */
L(lastb):
blez a2,L(leave)
PTR_ADDU a3,a0,a2 /* a3 is the last dst address */
L(lastbloop):
PTR_ADDIU a0,a0,1
bne a0,a3,L(lastbloop)
sb a1,-1(a0)
L(leave):
j ra
nop
.set at
.set reorder
END(MEMSET_NAME)
|
4ms/metamodule-plugin-sdk
| 5,889
|
plugin-libc/newlib/libc/machine/mips/strcmp.S
|
/*
* Copyright (c) 2014
* Imagination Technologies Limited.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the MIPS Technologies, Inc., nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY IMAGINATION TECHNOLOGIES LIMITED ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL IMAGINATION TECHNOLOGIES LIMITED BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#ifdef ANDROID_CHANGES
# include "machine/asm.h"
# include "machine/regdef.h"
#elif _LIBC
# include "machine/asm.h"
# include "machine/regdef.h"
#else
# include <regdef.h>
# include <sys/asm.h>
#endif
/* Technically strcmp should not read past the end of the strings being
compared. We will read a full word that may contain excess bits beyond
the NULL string terminator but unless ENABLE_READAHEAD is set, we will not
read the next word after the end of string. Setting ENABLE_READAHEAD will
improve performance but is technically illegal based on the definition of
strcmp. */
#ifdef ENABLE_READAHEAD
# define DELAY_READ
#else
# define DELAY_READ nop
#endif
/* Testing on a little endian machine showed using CLZ was a
performance loss, so we are not turning it on by default. */
#if defined(ENABLE_CLZ) && (__mips_isa_rev > 1)
# define USE_CLZ
#endif
/* Some asm.h files do not have the L macro definition. */
#ifndef L
# if _MIPS_SIM == _ABIO32
# define L(label) $L ## label
# else
# define L(label) .L ## label
# endif
#endif
/* Some asm.h files do not have the PTR_ADDIU macro definition. */
#ifndef PTR_ADDIU
# ifdef USE_DOUBLE
# define PTR_ADDIU daddiu
# else
# define PTR_ADDIU addiu
# endif
#endif
/* Allow the routine to be named something else if desired. */
#ifndef STRCMP_NAME
# define STRCMP_NAME strcmp
#endif
#ifdef ANDROID_CHANGES
LEAF(STRCMP_NAME, 0)
#else
LEAF(STRCMP_NAME)
#endif
.set nomips16
.set noreorder
or t0, a0, a1
andi t0,0x3
bne t0, zero, L(byteloop)
/* Both strings are 4 byte aligned at this point. */
lui t8, 0x0101
ori t8, t8, 0x0101
lui t9, 0x7f7f
ori t9, 0x7f7f
#define STRCMP32(OFFSET) \
lw v0, OFFSET(a0); \
lw v1, OFFSET(a1); \
subu t0, v0, t8; \
bne v0, v1, L(worddiff); \
nor t1, v0, t9; \
and t0, t0, t1; \
bne t0, zero, L(returnzero)
L(wordloop):
STRCMP32(0)
DELAY_READ
STRCMP32(4)
DELAY_READ
STRCMP32(8)
DELAY_READ
STRCMP32(12)
DELAY_READ
STRCMP32(16)
DELAY_READ
STRCMP32(20)
DELAY_READ
STRCMP32(24)
DELAY_READ
STRCMP32(28)
PTR_ADDIU a0, a0, 32
b L(wordloop)
PTR_ADDIU a1, a1, 32
L(returnzero):
j ra
move v0, zero
L(worddiff):
#ifdef USE_CLZ
subu t0, v0, t8
nor t1, v0, t9
and t1, t0, t1
xor t0, v0, v1
or t0, t0, t1
# if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
wsbh t0, t0
rotr t0, t0, 16
# endif
clz t1, t0
and t1, 0xf8
# if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
neg t1
addu t1, 24
# endif
rotrv v0, v0, t1
rotrv v1, v1, t1
and v0, v0, 0xff
and v1, v1, 0xff
j ra
subu v0, v0, v1
#else /* USE_CLZ */
# if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
andi t0, v0, 0xff
beq t0, zero, L(wexit01)
andi t1, v1, 0xff
bne t0, t1, L(wexit01)
srl t8, v0, 8
srl t9, v1, 8
andi t8, t8, 0xff
beq t8, zero, L(wexit89)
andi t9, t9, 0xff
bne t8, t9, L(wexit89)
srl t0, v0, 16
srl t1, v1, 16
andi t0, t0, 0xff
beq t0, zero, L(wexit01)
andi t1, t1, 0xff
bne t0, t1, L(wexit01)
srl t8, v0, 24
srl t9, v1, 24
# else /* __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ */
srl t0, v0, 24
beq t0, zero, L(wexit01)
srl t1, v1, 24
bne t0, t1, L(wexit01)
srl t8, v0, 16
srl t9, v1, 16
andi t8, t8, 0xff
beq t8, zero, L(wexit89)
andi t9, t9, 0xff
bne t8, t9, L(wexit89)
srl t0, v0, 8
srl t1, v1, 8
andi t0, t0, 0xff
beq t0, zero, L(wexit01)
andi t1, t1, 0xff
bne t0, t1, L(wexit01)
andi t8, v0, 0xff
andi t9, v1, 0xff
# endif /* __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ */
L(wexit89):
j ra
subu v0, t8, t9
L(wexit01):
j ra
subu v0, t0, t1
#endif /* USE_CLZ */
/* It might seem better to do the 'beq' instruction between the two 'lbu'
instructions so that the nop is not needed but testing showed that this
code is actually faster (based on glibc strcmp test). */
#define BYTECMP01(OFFSET) \
lbu v0, OFFSET(a0); \
lbu v1, OFFSET(a1); \
beq v0, zero, L(bexit01); \
nop; \
bne v0, v1, L(bexit01)
#define BYTECMP89(OFFSET) \
lbu t8, OFFSET(a0); \
lbu t9, OFFSET(a1); \
beq t8, zero, L(bexit89); \
nop; \
bne t8, t9, L(bexit89)
L(byteloop):
BYTECMP01(0)
BYTECMP89(1)
BYTECMP01(2)
BYTECMP89(3)
BYTECMP01(4)
BYTECMP89(5)
BYTECMP01(6)
BYTECMP89(7)
PTR_ADDIU a0, a0, 8
b L(byteloop)
PTR_ADDIU a1, a1, 8
L(bexit01):
j ra
subu v0, v0, v1
L(bexit89):
j ra
subu v0, t8, t9
.set at
.set reorder
END(STRCMP_NAME)
|
4ms/metamodule-plugin-sdk
| 2,619
|
plugin-libc/newlib/libc/machine/h8500/psi.S
|
/* convert psi to si inplace
Note that `fp' below isn't a segment register.
It's r6, the frame pointer. */
#if __CODE__==32
#define RET prts
#else
#define RET rts
#endif
#define EXTPSISI_SN(r_msw,r_lsw,sp) ; \
.global __extpsisi##r_msw ; \
__extpsisi##r_msw: ; \
mov r_msw,r_lsw ; \
stc sp,r_msw ; \
RET
EXTPSISI_SN(r2,r3,dp)
EXTPSISI_SN(r4,r5,ep)
#define ADDPSI_AR_RN(sr,an,r_msw,r_lsw) \
.global __addpsi##an##r_msw ; \
__addpsi##an##r_msw: ; \
stc sr,@-sp ; \
add an,r_lsw ; \
addx @sp+,r_msw ; \
RET
ADDPSI_AR_RN(dp,r2,r0,r1)
ADDPSI_AR_RN(dp,r2,r3,r4)
ADDPSI_AR_RN(ep,r4,r0,r1)
ADDPSI_AR_RN(ep,r4,r1,r2)
ADDPSI_AR_RN(ep,r4,r3,r4)
ADDPSI_AR_RN(ep,r4,r5,fp)
ADDPSI_AR_RN(tp,fp,r0,r1)
#define ADDPSI_RN_AR(r_msw,r_lsw,sr,an,t_msw,t_lsw) \
.global __addpsi##r_msw##an ; \
__addpsi##r_msw##an: ; \
mov.w t_msw,@-sp ; \
mov.w t_lsw,@-sp ; \
stc sr,t_msw ; \
mov an,t_lsw ; \
add r_lsw,t_lsw ; \
addx r_msw,t_msw ; \
ldc t_msw,sr ; \
mov.w t_lsw,an ; \
mov.w @sp+,t_lsw ; \
mov.w @sp+,t_msw ; \
RET
ADDPSI_RN_AR(r0,r1,dp,r2,r4,r5)
ADDPSI_RN_AR(r0,r1,ep,r4,r2,r3)
#define EXTPSIHI_RN_RN(rm,r_msw,r_lsw) ; \
.global __extpsihi##rm##r_msw ; \
__extpsihi##rm##r_msw: ; \
mov rm,r_lsw ; \
clr.w r_msw ; \
RET
EXTPSIHI_RN_RN(r3,r0,r1)
EXTPSIHI_RN_RN(r4,r0,r1)
EXTPSIHI_RN_RN(r5,r0,r1)
EXTPSIHI_RN_RN(r2,r0,r1)
/* ifdefed out, because gcc doesn't like the # character in the above
macro. The macro expands into an assembly languange comment anyways,
so it serves no useful purpose. */
#if 0
#define EXTPSIHI_RN_SN(rm,r_msw,r_lsw) ; \
.global __extpsihi##rm##r_lsw ; \
__extpsihi##rm##r_lsw: ; \
mov rm,r_lsw ; \
ldc \#0,r_msw ; \
RET
EXTPSIHI_RN_SN(r0,dp,r2)
EXTPSIHI_RN_SN(r0,ep,r4)
EXTPSIHI_RN_SN(r1,dp,r2)
EXTPSIHI_RN_SN(r1,ep,r4)
EXTPSIHI_RN_SN(r3,dp,r2)
EXTPSIHI_RN_SN(r3,ep,r4)
EXTPSIHI_RN_SN(r5,dp,r2)
EXTPSIHI_RN_SN(r5,ep,r4)
EXTPSIHI_RN_SN(r2,ep,r4)
#endif
#define EXTPSISI_RN(r_msw,r_lsw) ; \
.global __extpsisi##r_msw ; \
__extpsisi##r_msw: ; \
RET
EXTPSISI_RN(r0,r1)
#define ADDPSI_SA_SB(sa,ra,sb,rb) ; \
.global __addpsi##ra##rb ; \
__addpsi##ra##rb: ; \
mov.w r0,@-sp ; \
mov.w r1,@-sp ; \
stc sa,r0 ; \
stc sb,r1 ; \
add.w ra,rb ; \
addx r0,r1 ; \
ldc r1,sb ; \
mov.w @sp+,r1 ; \
mov.w @sp+,r0 ; \
RET
ADDPSI_SA_SB(dp,r2,ep,r4)
ADDPSI_SA_SB(ep,r4,dp,r2)
ADDPSI_SA_SB(tp,fp,dp,r2)
ADDPSI_SA_SB(tp,fp,ep,r4)
ADDPSI_SA_SB(dp,r2,dp,r2)
.global __addpsir0r0
__addpsir0r0:
add.w r1,r1
addx r0,r0
RET
|
4ms/metamodule-plugin-sdk
| 2,981
|
plugin-libc/newlib/libc/machine/or1k/setjmp.S
|
/*
Copyright (c) 2014, Hesham ALMatary
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation and/or
other materials provided with the distribution.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
.align 4
.global setjmp
.type setjmp,@function
setjmp:
l.sw 0(r3), r1
l.sw 4(r3), r2
/* Skip r3-r8 as they are not preserved across function calls */
l.sw 8(r3), r9
/* Skip r10 as it's preserved to be used by TLS */
/* Skip r11, setjmp always set it to 0 */
/* The following set if registers are preserved across function calls */
l.sw 12(r3), r14
l.sw 16(r3), r16
l.sw 20(r3), r18
l.sw 24(r3), r20
l.sw 28(r3), r22
l.sw 32(r3), r24
l.sw 36(r3), r26
l.sw 40(r3), r28
l.sw 44(r3), r30
/* Save Status Register */
l.mfspr r13, r0, 17
l.sw 48(r3), r13
/* Set result register to 0 and jump */
// Different cases for optional delay slot
#if defined(__OR1K_NODELAY__)
l.addi r11, r0, 0
l.jr r9
#elif defined(__OR1K_DELAY__)
l.jr r9
l.addi r11, r0, 0
#else
l.addi r11, r0, 0
l.jr r9
l.nop
#endif
.align 4
.global longjmp
.type longjmp,@function
longjmp:
/* If the second argument to longjmp is zero, set return address to 1,
otherwise set it to the value of the second argument */
l.addi r11, r0, 1
l.sfeq r4, r0
l.bf 1f
l.nop
l.addi r11, r4, 0
/* Load status register */
1:
l.lwz r15, 48(r3)
l.mtspr r0, r15, 17
l.lwz r1, 0(r3)
l.lwz r2, 4(r3)
/* Skip r3-r8 as they are not preserved across function calls */
l.lwz r9, 8(r3)
/* Skip r11 as it's always set by longjmp */
l.lwz r14, 12(r3)
l.lwz r16, 16(r3)
l.lwz r18, 20(r3)
l.lwz r20, 24(r3)
l.lwz r22, 28(r3)
l.lwz r24, 32(r3)
l.lwz r26, 36(r3)
l.lwz r28, 40(r3)
// Different cases for optional delay slot
#if defined(__OR1K_NODELAY__)
l.lwz r30, 44(r3)
l.jr r9
#elif defined(__OR1K_DELAY__)
l.jr r9
l.lwz r30, 44(r3)
#else
l.lwz r30, 44(r3)
l.jr r9
l.nop
#endif
|
4ms/metamodule-plugin-sdk
| 10,465
|
plugin-libc/newlib/libc/machine/powerpc/setjmp.S
|
/* This is a simple version of setjmp and longjmp for the PowerPC.
Ian Lance Taylor, Cygnus Support, 9 Feb 1994.
Modified by Jeff Johnston, Red Hat Inc. 2 Oct 2001.
Modified by Sebastian Huber, embedded brains GmbH. 22 Sep 2022. */
#include "ppc-asm.h"
FUNC_START(setjmp)
#ifdef __ALTIVEC__
addi 3,3,15 # align Altivec to 16 byte boundary
#if __powerpc64__
clrrdi 3,3,4
#else
rlwinm 3,3,0,0,27
#endif
#else
addi 3,3,7 # align to 8 byte boundary
#if __powerpc64__
clrrdi 3,3,3
#else
rlwinm 3,3,0,0,28
#endif
#endif
#if __SPE__
/* If we are E500, then save 64-bit registers. */
evstdd 1,0(3) # offset 0
evstdd 2,8(3) # offset 8
evstdd 13,16(3) # offset 16
evstdd 14,24(3) # offset 24
evstdd 15,32(3) # offset 32
evstdd 16,40(3) # offset 40
evstdd 17,48(3) # offset 48
evstdd 18,56(3) # offset 56
evstdd 19,64(3) # offset 64
evstdd 20,72(3) # offset 72
evstdd 21,80(3) # offset 80
evstdd 22,88(3) # offset 88
evstdd 23,96(3) # offset 96
evstdd 24,104(3) # offset 104
evstdd 25,112(3) # offset 112
evstdd 26,120(3) # offset 120
evstdd 27,128(3) # offset 128
evstdd 28,136(3) # offset 136
evstdd 29,144(3) # offset 144
evstdd 30,152(3) # offset 152
evstdd 31,160(3) # offset 160
/* Add 164 to r3 to account for the amount of data we just
stored. Note that we are not adding 168 because the next
store instruction uses an offset of 4. */
addi 3,3,164
#elif __powerpc64__
/* In the first store, add 8 to r3 so that the subsequent floating
point stores are aligned on an 8 byte boundary and the Altivec
stores are aligned on a 16 byte boundary. */
stdu 1,8(3) # offset 8
stdu 2,8(3) # offset 16
stdu 13,8(3) # offset 24
stdu 14,8(3) # offset 32
stdu 15,8(3) # offset 40
stdu 16,8(3) # offset 48
stdu 17,8(3) # offset 56
stdu 18,8(3) # offset 64
stdu 19,8(3) # offset 72
stdu 20,8(3) # offset 80
stdu 21,8(3) # offset 88
stdu 22,8(3) # offset 96
stdu 23,8(3) # offset 104
stdu 24,8(3) # offset 112
stdu 25,8(3) # offset 120
stdu 26,8(3) # offset 128
stdu 27,8(3) # offset 136
stdu 28,8(3) # offset 144
stdu 29,8(3) # offset 152
stdu 30,8(3) # offset 160
stdu 31,8(3) # offset 168
mflr 4
stdu 4,8(3) # offset 176
mfcr 4
stwu 4,8(3) # offset 184
#else
stw 1,0(3) # offset 0
stwu 2,4(3) # offset 4
stwu 13,4(3) # offset 8
stwu 14,4(3) # offset 12
stwu 15,4(3) # offset 16
stwu 16,4(3) # offset 20
stwu 17,4(3) # offset 24
stwu 18,4(3) # offset 28
stwu 19,4(3) # offset 32
stwu 20,4(3) # offset 36
stwu 21,4(3) # offset 40
stwu 22,4(3) # offset 44
stwu 23,4(3) # offset 48
stwu 24,4(3) # offset 52
stwu 25,4(3) # offset 56
stwu 26,4(3) # offset 60
stwu 27,4(3) # offset 64
stwu 28,4(3) # offset 68
stwu 29,4(3) # offset 72
stwu 30,4(3) # offset 76
stwu 31,4(3) # offset 80
#endif
#if !__powerpc64__
/* If __SPE__, then add 84 to the offset shown from this point on until
the end of this function. This difference comes from the fact that
we save 21 64-bit registers instead of 21 32-bit registers above. */
mflr 4
stwu 4,4(3) # offset 84
mfcr 4
stwu 4,4(3) # offset 88
# one word pad to get floating point aligned on 8 byte boundary
#endif
/* Check whether we need to save FPRs. Checking __NO_FPRS__
on its own would be enough for GCC 4.1 and above, but older
compilers only define _SOFT_FLOAT, so check both. */
#if !defined (__NO_FPRS__) && !defined (_SOFT_FLOAT)
#if defined (__rtems__) && !defined (__PPC_CPU_E6500__)
/* For some RTEMS multilibs, the FPU and Altivec units are disabled
during interrupt handling. Do not save and restore the
corresponding registers in this case. */
mfmsr 5
andi. 5,5,0x2000
beq 1f
#endif
/* If __powerpc64__, then add 96 to the offset shown from this point on until
the end of this function. This difference comes from the fact that
we save 23 64-bit registers instead of 23 32-bit registers above and
we take alignement requirements of floating point and Altivec stores
into account. */
stfdu 14,8(3) # offset 96
stfdu 15,8(3) # offset 104
stfdu 16,8(3) # offset 112
stfdu 17,8(3) # offset 120
stfdu 18,8(3) # offset 128
stfdu 19,8(3) # offset 136
stfdu 20,8(3) # offset 144
stfdu 21,8(3) # offset 152
stfdu 22,8(3) # offset 160
stfdu 23,8(3) # offset 168
stfdu 24,8(3) # offset 176
stfdu 25,8(3) # offset 184
stfdu 26,8(3) # offset 192
stfdu 27,8(3) # offset 200
stfdu 28,8(3) # offset 208
stfdu 29,8(3) # offset 216
stfdu 30,8(3) # offset 224
stfdu 31,8(3) # offset 232
1:
#endif
/* This requires a total of 21 * 4 + 18 * 8 + 4 + 4 + 4
bytes == 60 * 4 bytes == 240 bytes. */
#ifdef __ALTIVEC__
#if defined (__rtems__) && !defined (__PPC_CPU_E6500__)
mfmsr 5
andis. 5,5,0x200
beq 1f
#endif
/* save Altivec vrsave and vr20-vr31 registers */
mfspr 4,256 # vrsave register
stwu 4,16(3) # offset 248
addi 3,3,8
stvx 20,0,3 # offset 256
addi 3,3,16
stvx 21,0,3 # offset 272
addi 3,3,16
stvx 22,0,3 # offset 288
addi 3,3,16
stvx 23,0,3 # offset 304
addi 3,3,16
stvx 24,0,3 # offset 320
addi 3,3,16
stvx 25,0,3 # offset 336
addi 3,3,16
stvx 26,0,3 # offset 352
addi 3,3,16
stvx 27,0,3 # offset 368
addi 3,3,16
stvx 28,0,3 # offset 384
addi 3,3,16
stvx 29,0,3 # offset 400
addi 3,3,16
stvx 30,0,3 # offset 416
addi 3,3,16
stvx 31,0,3 # offset 432
1:
/* This requires a total of 240 + 8 + 8 + 12 * 16 == 448 bytes. */
#endif
li 3,0
blr
FUNC_END(setjmp)
FUNC_START(longjmp)
#ifdef __ALTIVEC__
addi 3,3,15 # align Altivec to 16 byte boundary
#if __powerpc64__
clrrdi 3,3,4
#else
rlwinm 3,3,0,0,27
#endif
#else
addi 3,3,7 # align to 8 byte boundary
#if __powerpc64__
clrrdi 3,3,3
#else
rlwinm 3,3,0,0,28
#endif
#endif
#if __SPE__
/* If we are E500, then restore 64-bit registers. */
evldd 1,0(3) # offset 0
evldd 2,8(3) # offset 8
evldd 13,16(3) # offset 16
evldd 14,24(3) # offset 24
evldd 15,32(3) # offset 32
evldd 16,40(3) # offset 40
evldd 17,48(3) # offset 48
evldd 18,56(3) # offset 56
evldd 19,64(3) # offset 64
evldd 20,72(3) # offset 72
evldd 21,80(3) # offset 80
evldd 22,88(3) # offset 88
evldd 23,96(3) # offset 96
evldd 24,104(3) # offset 104
evldd 25,112(3) # offset 112
evldd 26,120(3) # offset 120
evldd 27,128(3) # offset 128
evldd 28,136(3) # offset 136
evldd 29,144(3) # offset 144
evldd 30,152(3) # offset 152
evldd 31,160(3) # offset 160
/* Add 164 to r3 to account for the amount of data we just
loaded. Note that we are not adding 168 because the next
load instruction uses an offset of 4. */
addi 3,3,164
#elif __powerpc64__
/* In the first load, add 8 to r3 so that the subsequent floating
point loades are aligned on an 8 byte boundary and the Altivec
loads are aligned on a 16 byte boundary. */
ldu 1,8(3) # offset 8
ldu 2,8(3) # offset 16
ldu 13,8(3) # offset 24
ldu 14,8(3) # offset 32
ldu 15,8(3) # offset 40
ldu 16,8(3) # offset 48
ldu 17,8(3) # offset 56
ldu 18,8(3) # offset 64
ldu 19,8(3) # offset 72
ldu 20,8(3) # offset 80
ldu 21,8(3) # offset 88
ldu 22,8(3) # offset 96
ldu 23,8(3) # offset 104
ldu 24,8(3) # offset 112
ldu 25,8(3) # offset 120
ldu 26,8(3) # offset 128
ldu 27,8(3) # offset 136
ldu 28,8(3) # offset 144
ldu 29,8(3) # offset 152
ldu 30,8(3) # offset 160
ldu 31,8(3) # offset 168
ldu 5,8(3) # offset 176
mtlr 5
lwzu 5,8(3) # offset 184
mtcrf 255,5
#else
lwz 1,0(3) # offset 0
lwzu 2,4(3) # offset 4
lwzu 13,4(3) # offset 8
lwzu 14,4(3) # offset 12
lwzu 15,4(3) # offset 16
lwzu 16,4(3) # offset 20
lwzu 17,4(3) # offset 24
lwzu 18,4(3) # offset 28
lwzu 19,4(3) # offset 32
lwzu 20,4(3) # offset 36
lwzu 21,4(3) # offset 40
lwzu 22,4(3) # offset 44
lwzu 23,4(3) # offset 48
lwzu 24,4(3) # offset 52
lwzu 25,4(3) # offset 56
lwzu 26,4(3) # offset 60
lwzu 27,4(3) # offset 64
lwzu 28,4(3) # offset 68
lwzu 29,4(3) # offset 72
lwzu 30,4(3) # offset 76
lwzu 31,4(3) # offset 80
#endif
/* If __SPE__, then add 84 to the offset shown from this point on until
the end of this function. This difference comes from the fact that
we restore 22 64-bit registers instead of 22 32-bit registers above. */
#if !__powerpc64__
lwzu 5,4(3) # offset 84
mtlr 5
lwzu 5,4(3) # offset 88
mtcrf 255,5
# one word pad to get floating point aligned on 8 byte boundary
#endif
/* Check whether we need to restore FPRs. Checking
__NO_FPRS__ on its own would be enough for GCC 4.1 and
above, but older compilers only define _SOFT_FLOAT, so
check both. */
#if !defined (__NO_FPRS__) && !defined (_SOFT_FLOAT)
#if defined (__rtems__) && !defined (__PPC_CPU_E6500__)
mfmsr 5
andi. 5,5,0x2000
beq 1f
#endif
/* If __powerpc64__, then add 96 to the offset shown from this point on until
the end of this function. This difference comes from the fact that
we restore 23 64-bit registers instead of 23 32-bit registers above and
we take alignement requirements of floating point and Altivec loads
into account. */
lfdu 14,8(3) # offset 96
lfdu 15,8(3) # offset 104
lfdu 16,8(3) # offset 112
lfdu 17,8(3) # offset 120
lfdu 18,8(3) # offset 128
lfdu 19,8(3) # offset 136
lfdu 20,8(3) # offset 144
lfdu 21,8(3) # offset 152
lfdu 22,8(3) # offset 160
lfdu 23,8(3) # offset 168
lfdu 24,8(3) # offset 176
lfdu 25,8(3) # offset 184
lfdu 26,8(3) # offset 192
lfdu 27,8(3) # offset 200
lfdu 28,8(3) # offset 208
lfdu 29,8(3) # offset 216
lfdu 30,8(3) # offset 224
lfdu 31,8(3) # offset 232
1:
#endif
#ifdef __ALTIVEC__
#if defined (__rtems__) && !defined (__PPC_CPU_E6500__)
mfmsr 5
andis. 5,5,0x200
beq 1f
#endif
/* restore Altivec vrsave and v20-v31 registers */
lwzu 5,16(3) # offset 248
mtspr 256,5 # vrsave
addi 3,3,8
lvx 20,0,3 # offset 256
addi 3,3,16
lvx 21,0,3 # offset 272
addi 3,3,16
lvx 22,0,3 # offset 288
addi 3,3,16
lvx 23,0,3 # offset 304
addi 3,3,16
lvx 24,0,3 # offset 320
addi 3,3,16
lvx 25,0,3 # offset 336
addi 3,3,16
lvx 26,0,3 # offset 352
addi 3,3,16
lvx 27,0,3 # offset 368
addi 3,3,16
lvx 28,0,3 # offset 384
addi 3,3,16
lvx 29,0,3 # offset 400
addi 3,3,16
lvx 30,0,3 # offset 416
addi 3,3,16
lvx 31,0,3 # offset 432
1:
#endif
mr. 3,4
bclr+ 4,2
li 3,1
blr
FUNC_END(longjmp)
|
4ms/stm32mp1-baremetal
| 4,916
|
third-party/u-boot/u-boot-stm32mp1-baremetal/board/armltd/integrator/lowlevel_init.S
|
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Board specific setup info
*
* (C) Copyright 2004, ARM Ltd.
* Philippe Robin, <philippe.robin@arm.com>
*/
#include <config.h>
/* Reset using CM control register */
.global reset_cpu
reset_cpu:
mov r0, #CM_BASE
ldr r1,[r0,#OS_CTRL]
orr r1,r1,#CMMASK_RESET
str r1,[r0,#OS_CTRL]
reset_failed:
b reset_failed
/* Set up the platform, once the cpu has been initialized */
.globl lowlevel_init
lowlevel_init:
/* If U-Boot has been run after the ARM boot monitor
* then all the necessary actions have been done
* otherwise we are running from user flash mapped to 0x00000000
* --- DO NOT REMAP BEFORE THE CODE HAS BEEN RELOCATED --
* Changes to the (possibly soft) reset defaults of the processor
* itself should be performed in cpu/arm<>/start.S
* This function affects only the core module or board settings
*/
#ifdef CONFIG_CM_INIT
/* CM has an initialization register
* - bits in it are wired into test-chip pins to force
* reset defaults
* - may need to change its contents for U-Boot
*/
/* set the desired CM specific value */
mov r2,#CMMASK_LOWVEC /* Vectors at 0x00000000 for all */
#if defined (CONFIG_CM10200E) || defined (CONFIG_CM10220E)
orr r2,r2,#CMMASK_INIT_102
#else
#if !defined (CONFIG_CM920T) && !defined (CONFIG_CM920T_ETM) && \
!defined (CONFIG_CM940T)
#ifdef CONFIG_CM_MULTIPLE_SSRAM
/* set simple mapping */
and r2,r2,#CMMASK_MAP_SIMPLE
#endif /* #ifdef CONFIG_CM_MULTIPLE_SSRAM */
#ifdef CONFIG_CM_TCRAM
/* disable TCRAM */
and r2,r2,#CMMASK_TCRAM_DISABLE
#endif /* #ifdef CONFIG_CM_TCRAM */
#if defined (CONFIG_CM926EJ_S) || defined (CONFIG_CM1026EJ_S) || \
defined (CONFIG_CM1136JF_S)
and r2,r2,#CMMASK_LE
#endif /* cpu with little endian initialization */
orr r2,r2,#CMMASK_CMxx6_COMMON
#endif /* CMxx6 code */
#endif /* ARM102xxE value */
/* read CM_INIT */
mov r0, #CM_BASE
ldr r1, [r0, #OS_INIT]
/* check against desired bit setting */
and r3,r1,r2
cmp r3,r2
beq init_reg_OK
/* lock for change */
mov r3, #CMVAL_LOCK1
add r3,r3,#CMVAL_LOCK2
str r3, [r0, #OS_LOCK]
/* set desired value */
orr r1,r1,r2
/* write & relock CM_INIT */
str r1, [r0, #OS_INIT]
mov r1, #CMVAL_UNLOCK
str r1, [r0, #OS_LOCK]
/* soft reset so new values used */
b reset_cpu
init_reg_OK:
#endif /* CONFIG_CM_INIT */
mov pc, lr
#ifdef CONFIG_CM_SPD_DETECT
/* Fast memory is available for the DRAM data
* - ensure it has been transferred, then summarize the data
* into a CM register
*/
.globl dram_query
dram_query:
stmfd r13!,{r4-r6,lr}
/* set up SDRAM info */
/* - based on example code from the CM User Guide */
mov r0, #CM_BASE
readspdbit:
ldr r1, [r0, #OS_SDRAM] /* read the SDRAM register */
and r1, r1, #0x20 /* mask SPD bit (5) */
cmp r1, #0x20 /* test if set */
bne readspdbit
setupsdram:
add r0, r0, #OS_SPD /* address the copy of the SDP data */
ldrb r1, [r0, #3] /* number of row address lines */
ldrb r2, [r0, #4] /* number of column address lines */
ldrb r3, [r0, #5] /* number of banks */
ldrb r4, [r0, #31] /* module bank density */
mul r5, r4, r3 /* size of SDRAM (MB divided by 4) */
mov r5, r5, ASL#2 /* size in MB */
mov r0, #CM_BASE /* reload for later code */
cmp r5, #0x10 /* is it 16MB? */
bne not16
mov r6, #0x2 /* store size and CAS latency of 2 */
b writesize
not16:
cmp r5, #0x20 /* is it 32MB? */
bne not32
mov r6, #0x6
b writesize
not32:
cmp r5, #0x40 /* is it 64MB? */
bne not64
mov r6, #0xa
b writesize
not64:
cmp r5, #0x80 /* is it 128MB? */
bne not128
mov r6, #0xe
b writesize
not128:
/* if it is none of these sizes then it is either 256MB, or
* there is no SDRAM fitted so default to 256MB
*/
mov r6, #0x12
writesize:
mov r1, r1, ASL#8 /* row addr lines from SDRAM reg */
orr r2, r1, r2, ASL#12 /* OR in column address lines */
orr r3, r2, r3, ASL#16 /* OR in number of banks */
orr r6, r6, r3 /* OR in size and CAS latency */
str r6, [r0, #OS_SDRAM] /* store SDRAM parameters */
#endif /* #ifdef CONFIG_CM_SPD_DETECT */
ldmfd r13!,{r4-r6,pc} /* back to caller */
#ifdef CONFIG_CM_REMAP
/* CM remap bit is operational
* - use it to map writeable memory at 0x00000000, in place of flash
*/
.globl cm_remap
cm_remap:
stmfd r13!,{r4-r10,lr}
mov r0, #CM_BASE
ldr r1, [r0, #OS_CTRL]
orr r1, r1, #CMMASK_REMAP /* set remap and led bits */
str r1, [r0, #OS_CTRL]
/* Now 0x00000000 is writeable, replace the vectors */
ldr r0, =_start /* r0 <- start of vectors */
add r2, r0, #64 /* r2 <- past vectors */
sub r1,r1,r1 /* destination 0x00000000 */
copy_vec:
ldmia r0!, {r3-r10} /* copy from source address [r0] */
stmia r1!, {r3-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end address [r2] */
ble copy_vec
ldmfd r13!,{r4-r10,pc} /* back to caller */
#endif /* #ifdef CONFIG_CM_REMAP */
|
4ms/stm32mp1-baremetal
| 6,395
|
third-party/u-boot/u-boot-stm32mp1-baremetal/board/imgtec/malta/lowlevel_init.S
|
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
*/
#include <config.h>
#include <gt64120.h>
#include <msc01.h>
#include <pci.h>
#include <asm/addrspace.h>
#include <asm/asm.h>
#include <asm/regdef.h>
#include <asm/malta.h>
#include <asm/mipsregs.h>
#ifdef CONFIG_SYS_BIG_ENDIAN
#define CPU_TO_GT32(_x) ((_x))
#else
#define CPU_TO_GT32(_x) ( \
(((_x) & 0xff) << 24) | (((_x) & 0xff00) << 8) | \
(((_x) & 0xff0000) >> 8) | (((_x) & 0xff000000) >> 24))
#endif
.text
.set noreorder
.globl lowlevel_init
lowlevel_init:
/* detect the core card */
PTR_LI t0, CKSEG1ADDR(MALTA_REVISION)
lw t0, 0(t0)
srl t0, t0, MALTA_REVISION_CORID_SHF
andi t0, t0, (MALTA_REVISION_CORID_MSK >> \
MALTA_REVISION_CORID_SHF)
/* core cards using the gt64120 system controller */
li t1, MALTA_REVISION_CORID_CORE_LV
beq t0, t1, _gt64120
/* core cards using the MSC01 system controller */
li t1, MALTA_REVISION_CORID_CORE_FPGA6
beq t0, t1, _msc01
nop
/* unknown system controller */
b .
nop
/*
* Load BAR registers of GT64120 as done by YAMON
*
* based on a patch sent by Antony Pavlov <antonynpavlov@gmail.com>
* to the barebox mailing list.
* The subject of the original patch:
* 'MIPS: qemu-malta: add YAMON-style GT64120 memory map'
* URL:
* http://www.mail-archive.com/barebox@lists.infradead.org/msg06128.html
*
* based on write_bootloader() in qemu.git/hw/mips_malta.c
* see GT64120 manual and qemu.git/hw/gt64xxx.c for details
*/
_gt64120:
/* move GT64120 registers from 0x14000000 to 0x1be00000 */
PTR_LI t1, CKSEG1ADDR(GT_DEF_BASE)
li t0, CPU_TO_GT32(0xdf000000)
sw t0, GT_ISD_OFS(t1)
/* setup MEM-to-PCI0 mapping */
PTR_LI t1, CKSEG1ADDR(MALTA_GT_BASE)
/* setup PCI0 io window to 0x18000000-0x181fffff */
li t0, CPU_TO_GT32(0xc0000000)
sw t0, GT_PCI0IOLD_OFS(t1)
li t0, CPU_TO_GT32(0x40000000)
sw t0, GT_PCI0IOHD_OFS(t1)
/* setup PCI0 mem windows */
li t0, CPU_TO_GT32(0x80000000)
sw t0, GT_PCI0M0LD_OFS(t1)
li t0, CPU_TO_GT32(0x3f000000)
sw t0, GT_PCI0M0HD_OFS(t1)
li t0, CPU_TO_GT32(0xc1000000)
sw t0, GT_PCI0M1LD_OFS(t1)
li t0, CPU_TO_GT32(0x5e000000)
sw t0, GT_PCI0M1HD_OFS(t1)
jr ra
nop
/*
*
*/
_msc01:
/* setup peripheral bus controller clock divide */
PTR_LI t0, CKSEG1ADDR(MALTA_MSC01_PBC_BASE)
li t1, 0x1 << MSC01_PBC_CLKCFG_SHF
sw t1, MSC01_PBC_CLKCFG_OFS(t0)
/* tweak peripheral bus controller timings */
li t1, (0x1 << MSC01_PBC_CS0TIM_CDT_SHF) | \
(0x1 << MSC01_PBC_CS0TIM_CAT_SHF)
sw t1, MSC01_PBC_CS0TIM_OFS(t0)
li t1, (0x0 << MSC01_PBC_CS0RW_RDT_SHF) | \
(0x2 << MSC01_PBC_CS0RW_RAT_SHF) | \
(0x0 << MSC01_PBC_CS0RW_WDT_SHF) | \
(0x2 << MSC01_PBC_CS0RW_WAT_SHF)
sw t1, MSC01_PBC_CS0RW_OFS(t0)
lw t1, MSC01_PBC_CS0CFG_OFS(t0)
li t2, MSC01_PBC_CS0CFG_DTYP_MSK
and t1, t2
ori t1, (0x0 << MSC01_PBC_CS0CFG_ADM_SHF) | \
(0x3 << MSC01_PBC_CS0CFG_WSIDLE_SHF) | \
(0x10 << MSC01_PBC_CS0CFG_WS_SHF)
sw t1, MSC01_PBC_CS0CFG_OFS(t0)
/* setup basic address decode */
PTR_LI t0, CKSEG1ADDR(MALTA_MSC01_BIU_BASE)
li t1, 0x0
li t2, -CONFIG_SYS_MEM_SIZE
sw t1, MSC01_BIU_MCBAS1L_OFS(t0)
sw t2, MSC01_BIU_MCMSK1L_OFS(t0)
sw t1, MSC01_BIU_MCBAS2L_OFS(t0)
sw t2, MSC01_BIU_MCMSK2L_OFS(t0)
/* initialise IP1 - unused */
li t1, MALTA_MSC01_IP1_BASE
li t2, -MALTA_MSC01_IP1_SIZE
sw t1, MSC01_BIU_IP1BAS1L_OFS(t0)
sw t2, MSC01_BIU_IP1MSK1L_OFS(t0)
sw t1, MSC01_BIU_IP1BAS2L_OFS(t0)
sw t2, MSC01_BIU_IP1MSK2L_OFS(t0)
/* initialise IP2 - PCI */
li t1, MALTA_MSC01_IP2_BASE1
li t2, -MALTA_MSC01_IP2_SIZE1
sw t1, MSC01_BIU_IP2BAS1L_OFS(t0)
sw t2, MSC01_BIU_IP2MSK1L_OFS(t0)
li t1, MALTA_MSC01_IP2_BASE2
li t2, -MALTA_MSC01_IP2_SIZE2
sw t1, MSC01_BIU_IP2BAS2L_OFS(t0)
sw t2, MSC01_BIU_IP2MSK2L_OFS(t0)
/* initialise IP3 - peripheral bus controller */
li t1, MALTA_MSC01_IP3_BASE
li t2, -MALTA_MSC01_IP3_SIZE
sw t1, MSC01_BIU_IP3BAS1L_OFS(t0)
sw t2, MSC01_BIU_IP3MSK1L_OFS(t0)
sw t1, MSC01_BIU_IP3BAS2L_OFS(t0)
sw t2, MSC01_BIU_IP3MSK2L_OFS(t0)
/* setup PCI memory */
PTR_LI t0, CKSEG1ADDR(MALTA_MSC01_PCI_BASE)
li t1, MALTA_MSC01_PCIMEM_BASE
li t2, (-MALTA_MSC01_PCIMEM_SIZE) & MSC01_PCI_SC2PMMSKL_MSK_MSK
li t3, MALTA_MSC01_PCIMEM_MAP
sw t1, MSC01_PCI_SC2PMBASL_OFS(t0)
sw t2, MSC01_PCI_SC2PMMSKL_OFS(t0)
sw t3, MSC01_PCI_SC2PMMAPL_OFS(t0)
/* setup PCI I/O */
li t1, MALTA_MSC01_PCIIO_BASE
li t2, (-MALTA_MSC01_PCIIO_SIZE) & MSC01_PCI_SC2PIOMSKL_MSK_MSK
li t3, MALTA_MSC01_PCIIO_MAP
sw t1, MSC01_PCI_SC2PIOBASL_OFS(t0)
sw t2, MSC01_PCI_SC2PIOMSKL_OFS(t0)
sw t3, MSC01_PCI_SC2PIOMAPL_OFS(t0)
/* setup PCI_BAR0 memory window */
li t1, -CONFIG_SYS_MEM_SIZE
sw t1, MSC01_PCI_BAR0_OFS(t0)
/* setup PCI to SysCon/CPU translation */
sw t1, MSC01_PCI_P2SCMSKL_OFS(t0)
sw zero, MSC01_PCI_P2SCMAPL_OFS(t0)
/* setup PCI vendor & device IDs */
li t1, (PCI_VENDOR_ID_MIPS << MSC01_PCI_HEAD0_VENDORID_SHF) | \
(PCI_DEVICE_ID_MIPS_MSC01 << MSC01_PCI_HEAD0_DEVICEID_SHF)
sw t1, MSC01_PCI_HEAD0_OFS(t0)
/* setup PCI subsystem vendor & device IDs */
sw t1, MSC01_PCI_HEAD11_OFS(t0)
/* setup PCI class, revision */
li t1, (PCI_CLASS_BRIDGE_HOST << MSC01_PCI_HEAD2_CLASS_SHF) | \
(0x1 << MSC01_PCI_HEAD2_REV_SHF)
sw t1, MSC01_PCI_HEAD2_OFS(t0)
/* ensure a sane setup */
sw zero, MSC01_PCI_HEAD3_OFS(t0)
sw zero, MSC01_PCI_HEAD4_OFS(t0)
sw zero, MSC01_PCI_HEAD5_OFS(t0)
sw zero, MSC01_PCI_HEAD6_OFS(t0)
sw zero, MSC01_PCI_HEAD7_OFS(t0)
sw zero, MSC01_PCI_HEAD8_OFS(t0)
sw zero, MSC01_PCI_HEAD9_OFS(t0)
sw zero, MSC01_PCI_HEAD10_OFS(t0)
sw zero, MSC01_PCI_HEAD12_OFS(t0)
sw zero, MSC01_PCI_HEAD13_OFS(t0)
sw zero, MSC01_PCI_HEAD14_OFS(t0)
sw zero, MSC01_PCI_HEAD15_OFS(t0)
/* setup PCI command register */
li t1, (PCI_COMMAND_FAST_BACK | \
PCI_COMMAND_SERR | \
PCI_COMMAND_PARITY | \
PCI_COMMAND_MASTER | \
PCI_COMMAND_MEMORY)
sw t1, MSC01_PCI_HEAD1_OFS(t0)
/* setup PCI byte swapping */
#ifdef CONFIG_SYS_BIG_ENDIAN
li t1, (0x1 << MSC01_PCI_SWAP_BAR0_BSWAP_SHF) | \
(0x1 << MSC01_PCI_SWAP_IO_BSWAP_SHF)
sw t1, MSC01_PCI_SWAP_OFS(t0)
#else
sw zero, MSC01_PCI_SWAP_OFS(t0)
#endif
/* enable PCI host configuration cycles */
lw t1, MSC01_PCI_CFG_OFS(t0)
li t2, MSC01_PCI_CFG_RA_MSK | \
MSC01_PCI_CFG_G_MSK | \
MSC01_PCI_CFG_EN_MSK
or t1, t1, t2
sw t1, MSC01_PCI_CFG_OFS(t0)
jr ra
nop
|
4ms/metamodule-plugin-sdk
| 6,544
|
plugin-libc/newlib/libc/sys/d10v/trap.S
|
#include "sys/syscall.h"
#define SYSCALL(name) \
.global name ; \
name: ; \
ldi r4, SYS ## name ; \
bra __trap0
.text
.stabs "trap.S",100,0,0,__trap0
.stabs "int:t(0,1)=r(0,1);-65536;65535;",128,0,0,0
.stabs "long int:t(0,2)=r(0,1);0020000000000;0017777777777;",128,0,0,0
.stabs "_trap0:F(0,1)",36,0,1,__trap0
.stabs "arg1:P(0,1)",64,0,1,0
.stabs "arg2:P(0,1)",64,0,1,1
.stabs "arg3:P(0,1)",64,0,1,2
.stabs "arg4:P(0,1)",64,0,1,3
.stabs "number:P(0,1)",64,0,1,4
.global __trap0
.type __trap0,@function
__trap0:
trap 15 /* trap 15 returns result in r0, error code in r4 */
cmpeqi r4,0 /* is error code zero? */
brf0t ret /* yes, skip setting errno */
#if __INT__==32
st r4,@(errno+2,r14) /* no, set errno */
srai r4,15 /* sign extend high word */
st r4,@(errno,r14)
#else
st r4,@(errno,r14) /* no, set errno */
#endif
ret:
jmp r13 /* return to caller */
.Ltrap0:
.size __trap0,.Ltrap0-__trap0
.stabs "",36,0,0,.Ltrap0-__trap0
#define CONCAT(a,b) a ## b
#define STRING(a) #a
#define XSTRING(a) STRING(a)
#define XSTRING2(a,b) XSTRING(CONCAT(a,b))
#if __INT__==32
#define _read _read16
#define _lseek _lseek16
#define _write _write16
#define _close _close16
#define _open _open16
#define _creat _creat16
#define _exit _exit16
#define _stat _stat16
#define _chmod _chmod16
#define _chown _chown16
#define _fork _fork16
#define _wait _wait16
#define _execve _execve16
#define _execv _execv16
#define _pipe _pipe16
#define _kill _kill16
#define _getpid _getpid16
#endif
/* Until the assembler allows semicolon as a statement separator, */
/* we cannot use the SYSCALL macro. So expand it manually for now. */
/* #SYSCALL(_read) */
/* #SYSCALL(_lseek) */
/* #SYSCALL(_write) */
/* #SYSCALL(_close) */
/* #SYSCALL(_open) */
/* #SYSCALL(_creat) */
/* #SYSCALL(_exit) */
/* #SYSCALL(_stat) */
/* #SYSCALL(_chmod) */
/* #SYSCALL(_chown) */
/* #SYSCALL(_fork) */
/* #SYSCALL(_wait) */
/* #SYSCALL(_execve) */
/* #SYSCALL(_execv) */
/* #SYSCALL(_pipe) */
/* #SYSCALL(_getpid) */
/* #SYSCALL(_kill) */
.global _read
.type _read,@function
.stabs XSTRING2(_read,:F(0,1)),36,0,2,_read
.stabs "fd:P(0,1)",64,0,1,0
.stabs "ptr:P(0,1)",64,0,1,1
.stabs "len:P(0,1)",64,0,1,2
_read:
ldi r4, SYS_read
bra __trap0
.Lread:
.size _read,.-_read
.stabs "",36,0,0,.Lread-_read
.global _lseek
.type _lseek,@function
.stabs XSTRING2(_lseek,:F(0,1)),36,0,3,_lseek
.stabs "fd:P(0,1)",64,0,1,0
.stabs "offset:P(0,1)",64,0,1,2
.stabs "whence:p(0,1)",160,0,1,0
_lseek:
ldi r4, SYS_lseek
bra __trap0
.Llseek:
.size _lseek,.Llseek-_lseek
.stabs "",36,0,0,.Llseek-_lseek
.global _write
.type _write,@function
.stabs XSTRING2(_write,:F(0,1)),36,0,4,_write
.stabs "fd:P(0,1)",64,0,1,0
.stabs "ptr:P(0,1)",64,0,1,1
.stabs "len:P(0,1)",64,0,1,2
_write:
ldi r4, SYS_write
bra __trap0
.Lwrite:
.size _write,.Lwrite-_write
.stabs "",36,0,0,.Lwrite-_write
.global _close
.type _close,@function
.stabs XSTRING2(_close,:F(0,1)),36,0,5,_close
.stabs "fd:P(0,1)",64,0,1,0
_close:
ldi r4, SYS_close
bra __trap0
.Lclose:
.size _close,.Lclose-_close
.stabs "",36,0,0,.Lclose-_close
.global _open
.type _open,@function
.stabs XSTRING2(_open,:F(0,1)),36,0,6,_open
.stabs "name:P(0,1)",64,0,1,0
.stabs "flags:P(0,1)",64,0,1,1
.stabs "mode:P(0,1)",64,0,1,2
_open:
ldi r4, SYS_open
bra __trap0
.Lopen:
.size _open,.Lopen-_open
.stabs "",36,0,0,.Lopen-_open
.global _creat
.type _creat,@function
.stabs XSTRING2(_creat,:F(0,1)),36,0,7,_creat
.stabs "name:P(0,1)",64,0,1,0
.stabs "mode:P(0,1)",64,0,1,1
_creat:
ldi r4, SYS_creat
bra __trap0
.Lcreat:
.size _creat,.Lcreat-_creat
.stabs "",36,0,0,.Lcreat-_creat
.global _exit
.type _exit,@function
.stabs XSTRING2(_exit,:F(0,1)),36,0,8,_exit
.stabs "status:P(0,1)",64,0,1,0
_exit:
ldi r4, SYS_exit
bra __trap0
.Lexit:
.size _exit,.Lexit-_exit
.stabs "",36,0,0,.Lexit-_exit
.global _stat
.type _stat,@function
.stabs XSTRING2(_stat,:F(0,1)),36,0,9,_stat
.stabs "name:P(0,1)",64,0,1,0
.stabs "packet:P(0,1)",64,0,1,1
_stat:
ldi r4, SYS_stat
bra __trap0
.Lstat:
.size _stat,.Lstat-_stat
.stabs "",36,0,0,.Lstat-_stat
.global _chmod
.type _chmod,@function
.stabs XSTRING2(_chmod,:F(0,1)),36,0,10,_chmod
.stabs "name:P(0,1)",64,0,1,0
.stabs "mode:P(0,1)",64,0,1,1
_chmod:
ldi r4, SYS_chmod
bra __trap0
.Lchmod:
.size _chmod,.Lchmod-_chmod
.stabs "",36,0,0,.Lchmod-_chmod
.global _chown
.type _chown,@function
.stabs XSTRING2(_chown,:F(0,1)),36,0,11,_chown
.stabs "name:P(0,1)",64,0,1,0
.stabs "uid:P(0,1)",64,0,1,1
.stabs "gid:P(0,1)",64,0,1,2
_chown:
ldi r4, SYS_chown
bra __trap0
.Lchown:
.size _chown,.Lchown-_chown
.stabs "",36,0,0,.Lchown-_chown
.global _fork
.type _fork,@function
.stabs XSTRING2(_fork,:F(0,1)),36,0,12,_fork
_fork:
ldi r4, SYS_fork
bra __trap0
.Lfork:
.size _fork,.Lfork-_fork
.stabs "",36,0,0,.Lfork-_fork
.global _wait
.type _wait,@function
.stabs "status:P(0,1)",64,0,1,0
.stabs XSTRING2(_wait,:F(0,1)),36,0,13,_wait
_wait:
ldi r4, SYS_wait
bra __trap0
.Lwait:
.size _wait,.Lwait-_wait
.stabs "",36,0,0,.Lwait-_wait
.global _execve
.type _execve,@function
.stabs "name:P(0,1)",64,0,1,0
.stabs "argv:P(0,1)",64,0,1,1
.stabs "envp:P(0,1)",64,0,1,2
.stabs XSTRING2(_execve,:F(0,1)),36,0,14,_execve
_execve:
ldi r4, SYS_execve
bra __trap0
.Lexecve:
.size _execve,.Lexecve-_execve
.stabs "",36,0,0,.Lexecve-_execve
.global _execv
.type _execv,@function
.stabs XSTRING2(_execv,:F(0,1)),36,0,15,_execv
.stabs "name:P(0,1)",64,0,1,0
.stabs "argv:P(0,1)",64,0,1,1
_execv:
ldi r4, SYS_execv
bra __trap0
.Lexecv:
.size _execv,.Lexecv-_execv
.stabs "",36,0,0,.Lexecv-_execv
.global _pipe
.type _pipe,@function
.stabs XSTRING2(_pipe,:F(0,1)),36,0,16,_pipe
.stabs "fds:P(0,1)",64,0,1,0
_pipe:
ldi r4, SYS_pipe
bra __trap0
.Lpipe:
.size _pipe,.Lpipe-_pipe
.stabs "",36,0,0,.Lpipe-_pipe
.global time
.type time,@function
.stabs XSTRING2(time,:F(0,1)),36,0,17,time
.stabs "ptr:P(0,1)",64,0,1,0
time:
ldi r4, SYS_time
bra __trap0
.Ltime:
.size time,.Ltime-time
.stabs "",36,0,0,.Ltime-time
.global _kill
.type _kill,@function
.stabs XSTRING2(_kill,:F(0,1)),36,0,18,_kill
.stabs "pid:P(0,1)",64,0,1,0
.stabs "sig:P(0,1)",64,0,1,1
_kill:
ldi r4, SYS_kill
bra __trap0
.Lkill:
.size _kill,.Lkill-_kill
.stabs "",36,0,0,.Lkill-_kill
.global _getpid
.type _getpid,@function
.stabs XSTRING2(_getpid,:F(0,1)),36,0,19,_getpid
_getpid:
ldi r4, SYS_getpid
bra __trap0
.Lgetpid:
.size _getpid,.Lgetpid-_getpid
.stabs "",36,0,0,.Lgetpid-_getpid
|
4ms/metamodule-plugin-sdk
| 1,486
|
plugin-libc/newlib/libc/sys/d10v/crt0.S
|
.text
.global _start
.type _start,@function
.stabs "crt0.S",100,0,0,_start
.stabs "int:t(0,1)=r(0,1);-32768;32767;",128,0,0,0
.stabs "_start:F(0,1)",36,0,1,_start
_start:
; R14 always contains memory base address (0)
ldi r14,0
; Set the USER and SYSTEM stack pointers.
ldi r0, 0 ; zero arguments
ldi r1, 0
mvtc r0, psw ; select SPI and set it
ldi sp, _stack
ldi r10, 0x8000 ; select SPU/FP and set it
mvtc r10, psw || ldi r11, 0; clear stack frame
ldi sp, _stack - 0x200
ldi r13, 0
; Clear the BSS. Do it in two parts for efficiency: longwords first
; for most of it, then the remaining 0 to 3 bytes.
ldi r2, __bss_start ; R2 = start of BSS
ldi r3, _end ; R3 = end of BSS + 1
sub r3, r2 ; R3 = BSS size in bytes
mv r4, r3
srli r4, 2 ; R4 = BSS size in longwords (rounded down)
loop1:
cmpeqi r4, 0 ; more longords to zero out?
brf0t.s endloop1 ; nope
st2w r0, @r2+ ; yep, zero out another longword
subi r4, 1 ; decrement count
bra.l loop1 ; go do some more
endloop1:
and3 r4, r3, 3 ; get no. of remaining BSS bytes to clear
loop2:
cmpeqi r4, 0 ; more bytes to zero out?
brf0t.s endloop2 ; nope
stb r0, @r2 ; yep, zero out another byte
addi r2, 1 ; bump address
subi r4, 1 ; decrement count
bra.s loop2 ; go do some more
endloop2:
; Call main, then stop simulator
st r11, @-sp
st r13, @-sp
mv r11, sp
bl main
bl exit
stop
.Lstart:
.size _start,.Lstart-_start
.stabs "",36,0,0,.Lstart-_start
.section .stack
_stack: .long 1
|
4ms/metamodule-plugin-sdk
| 133,709
|
plugin-libc/newlib/libc/sys/rdos/rdos.S
|
/*#######################################################################
# RDOS operating system
# Copyright (C) 1988-2006, Leif Ekblad
#
# This library is free software; you can redistribute it and/or modify
# it under the terms of the GNU Lesser General Public License as published
# by the Free Software Foundation; either version 2.1 of the License, or
# (at your option) any later version.
#
# This library is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU Lesser General Public License for more details.
#
# You should have received a copy of the GNU Lesser General Public
# License along with this library; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
#
# The author of this program may be contacted at leif@rdos.net
#
# rdos.S
# GCC based interface to RDOS kernel
#
##########################################################################*/
#include "user.def"
.macro UserGate nr
.byte 0x9A
.long \nr
.word 2
.endm
/*##########################################################################
#
# Name : RdosSwapShort
#
# Purpose....: Byte reverse a short int
#
# Returns....: Result
#
##########################################################################*/
.global RdosSwapShort
RdosSwapShort:
pushl %ebp
movl %esp,%ebp
movw 8(%ebp),%ax
xchgb %ah,%al
leave
ret
/*##########################################################################
#
# Name : RdosSwapLong
#
# Purpose....: Byte reverse a long int
#
# Returns....: Result
#
##########################################################################*/
.global RdosSwapLong
RdosSwapLong:
pushl %ebp
movl %esp,%ebp
movl 8(%ebp),%eax
xchgb %ah,%al
roll $16,%eax
xchgb %ah,%al
leave
ret
/*##########################################################################
#
# Name : LocalToNetworkLong
#
# Purpose....: Convert a local long to network format
#
# Returns....: Network format
#
##########################################################################*/
.global LocalToNetworkLong
LocalToNetworkLong:
pushl %ebp
movl %esp,%ebp
movl 8(%ebp),%eax
xchgb %ah,%al
roll $16,%eax
xchgb %ah,%al
leave
ret
/*##########################################################################
#
# Name : NetworkToLocalLong
#
# Purpose....: Convert a network long to local format
#
# Returns....: Local format
#
##########################################################################*/
.global NetworkToLocalLong
NetworkToLocalLong:
pushl %ebp
movl %esp,%ebp
movl 8(%ebp),%eax
xchgb %ah,%al
roll $16,%eax
xchgb %ah,%al
leave
ret
/*##########################################################################
#
# Name : RdosGetThreadHandle
#
# Purpose....: Get current thread handle
#
# Returns....: Thread ID
#
##########################################################################*/
.global RdosGetThreadHandle
RdosGetThreadHandle:
pushl %ebp
movl %esp,%ebp
UserGate get_thread_nr
movzx %ax,%eax
leave
ret
/*##########################################################################
#
# Name : RdosGetThreadState
#
# Purpose....: Get thread state
#
# Parameters.: Thread #
# State buffer
#
##########################################################################*/
.global RdosGetThreadState
RdosGetThreadState:
pushl %ebp
movl %esp,%ebp
push %edi
movl 8(%ebp),%eax
movl 12(%ebp),%edx
UserGate get_thread_state_nr
jc rgtsFail
movl $1,%eax
jmp rgtsDone
rgtsFail:
xorl %eax,%eax
rgtsDone:
popl %edi
leave
ret
/*##########################################################################
#
# Name : RdosSuspendThread
#
# Purpose....: Suspend thread
#
# Parameters.: Thread #
#
##########################################################################*/
.global RdosSuspendThread
RdosSuspendThread:
pushl %ebp
movl %esp,%ebp
movl 8(%ebp),%eax
UserGate suspend_thread_nr
jc rsfFail
movl $1,%eax
jmp rsfDone
rsfFail:
xorl %eax,%eax
rsfDone:
leave
ret
/*##########################################################################
#
# Name : RdosExec
#
# Purpose....: Execute a program
#
# Parameters.: Program
# Commandline
#
##########################################################################*/
.global RdosExec
RdosExec:
pushl %ebp
movl %esp,%ebp
pushl %esi
pushl %edi
movl 8(%ebp),%esi
movl 12(%ebp),%edi
UserGate load_exe_nr
UserGate get_exit_code_nr
popl %edi
popl %esi
leave
ret
/*##########################################################################
#
# Name : RdosSpawn
#
# Purpose....: Create new process and run a program
#
# Parameters.: Program
# Commandline
# StartDir
#
##########################################################################*/
.global RdosSpawn
RdosSpawn:
pushl %ebp
movl %esp,%ebp
pushl %fs
pushl %ebx
pushl %edx
pushl %esi
pushl %edi
movw %ds,%dx
movw %dx,%fs
xorl %edx,%edx
movl 8(%ebp),%esi
movl 12(%ebp),%edi
movl 16(%ebp),%ebx
UserGate spawn_exe_nr
jc rsFail
movzx %dx,%eax
jmp rsDone
rsFail:
xorl %eax,%eax
rsDone:
popl %edi
popl %esi
popl %edx
popl %ebx
popw %fs
leave
ret
/*##########################################################################
#
# Name : RdosCpuReset
#
# Purpose....: Cpu reset
#
##########################################################################*/
.global RdosCpuReset
RdosCpuReset:
pushl %ebp
movl %esp,%ebp
UserGate cpu_reset_nr
leave
ret
/*##########################################################################
#
# Name : RdosGetVersion
#
# Purpose....: Get RDOS version
#
# Parameters.: &major
# &minor
# &release
#
##########################################################################*/
.global RdosGetVersion
RdosGetVersion:
pushl %ebp
movl %esp,%ebp
pushl %eax
pushl %ecx
pushl %edx
pushl %edi
UserGate get_version_nr
movzx %dx,%edx
movl 8(%ebp),%edi
movl %edx,(%edi)
movzx %ax,%eax
movl 12(%ebp),%edi
movl %eax,(%edi)
movzx %cx,%eax
movl 16(%ebp),%edi
movl %eax,(%edi)
popl %edi
popl %edx
popl %ecx
popl %eax
leave
ret
/*##########################################################################
#
# Name : RdosAllocateMem
#
# Purpose....: Allocate memory
#
# Parameters.: Bytes to allocate
#
# Returns....: Memory pointer
#
##########################################################################*/
.global RdosAllocateMem
RdosAllocateMem:
pushl %ebp
movl %esp,%ebp
pushl %edx
movl 8(%ebp),%eax
UserGate allocate_app_mem_nr
movl %edx,%eax
popl %edx
leave
ret
/*##########################################################################
#
# Name : RdosFreeMem
#
# Purpose....: Free memory
#
# Parameters.: Memory pointer
#
##########################################################################*/
.global RdosFreeMem
RdosFreeMem:
pushl %ebp
movl %esp,%ebp
pushl %edx
movl 8(%ebp),%edx
UserGate free_app_mem_nr
popl %edx
leave
ret
/*##########################################################################
#
# Name : RdosAppDebug
#
# Purpose....: App debug
#
##########################################################################*/
.global RdosAppDebug
RdosAppDebug:
pushl %ebp
movl %esp,%ebp
UserGate app_debug_nr
leave
ret
/*##########################################################################
#
# Name : RdosWaitMilli
#
# Purpose....: Wait a number of milliseconds
#
# Parameters.: Milliseconds to wait
#
##########################################################################*/
.global RdosWaitMilli
RdosWaitMilli:
pushl %ebp
movl %esp,%ebp
pushl %eax
movl 8(%ebp),%eax
UserGate wait_milli_nr
popl %eax
leave
ret
/*##########################################################################
#
# Name : RdosCreateSection
#
# Purpose....: Create section
#
# Returns....: Section handle
#
##########################################################################*/
.global RdosCreateSection
RdosCreateSection:
pushl %ebp
movl %esp,%ebp
pushl %ebx
UserGate create_user_section_nr
movzx %bx,%eax
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosDeleteSection
#
# Purpose....: Delete section
#
# Parameters.: Section handle
#
##########################################################################*/
.global RdosDeleteSection
RdosDeleteSection:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate delete_user_section_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosEnterSection
#
# Purpose....: Enter section
#
# Parameters.: Section handle
#
##########################################################################*/
.global RdosEnterSection
RdosEnterSection:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate enter_user_section_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosLeaveSection
#
# Purpose....: Leave section
#
# Parameters.: Section handle
#
##########################################################################*/
.global RdosLeaveSection
RdosLeaveSection:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate leave_user_section_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosCreateWait
#
# Purpose....: Create wait object
#
# Returns....: Wait handle
#
##########################################################################*/
.global RdosCreateWait
RdosCreateWait:
pushl %ebp
movl %esp,%ebp
pushl %ebx
UserGate create_wait_nr
movzx %bx,%eax
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosCloseWait
#
# Purpose....: Close wait
#
# Parameters.: Wait handle
#
##########################################################################*/
.global RdosCloseWait
RdosCloseWait:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate close_wait_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosCheckWait
#
# Purpose....: Check wait state
#
# Parameters.: Wait handle
#
# Returns....: Signalled ID or 0
#
##########################################################################*/
.global RdosCheckWait
RdosCheckWait:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
movw 8(%ebp),%bx
UserGate is_wait_idle_nr
movl %ecx,%eax
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosWaitForever
#
# Purpose....: Wait forever
#
# Parameters.: Wait handle
#
# Returns....: Signalled ID or 0
#
##########################################################################*/
.global RdosWaitForever
RdosWaitForever:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
movw 8(%ebp),%bx
UserGate wait_no_timeout_nr
jc rwfFail
movl %ecx,%eax
jmp rwfDone
rwfFail:
xorl %eax,%eax
rwfDone:
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosWaitTimeout
#
# Purpose....: Wait with timeout
#
# Parameters.: Wait handle
# Timeout in ms
#
# Returns....: Signalled ID or 0
#
##########################################################################*/
.global RdosWaitTimeout
RdosWaitTimeout:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
pushl %edx
movl 12(%ebp),%eax
movl $1193,%edx
mull %edx
pushl %edx
pushl %eax
UserGate get_system_time_nr
popl %ebx
addl %ebx,%eax
popl %ebx
adcl %ebx,%edx
movw 8(%ebp),%bx
UserGate wait_timeout_nr
jc rwtFail
movl %ecx,%eax
jmp rwtDone
rwtFail:
xorl %eax,%eax
rwtDone:
popl %edx
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosStopWait
#
# Purpose....: Stop wait
#
# Parameters.: Wait handle
#
##########################################################################*/
.global RdosStopWait
RdosStopWait:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate stop_wait_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosRemoveWait
#
# Purpose....: Remove wait object from wait handle
#
# Parameters.: Wait handle
# ID
#
##########################################################################*/
.global RdosRemoveWait
RdosRemoveWait:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
movw 8(%ebp),%bx
movl 12(%ebp),%ecx
UserGate remove_wait_nr
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosCreateSignal
#
# Purpose....: Create signal object
#
# Returns....: Signal handle
#
##########################################################################*/
.global RdosCreateSignal
RdosCreateSignal:
pushl %ebp
movl %esp,%ebp
pushl %ebx
UserGate create_signal_nr
movzx %bx,%eax
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosResetSignal
#
# Purpose....: Reset signal
#
# Parameters.: Signal handle
#
##########################################################################*/
.global RdosResetSignal
RdosResetSignal:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate reset_signal_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosIsSignalled
#
# Purpose....: Check if signalled
#
# Parameters.: Signal handle
#
# Returns....: TRUE if signalled
#
##########################################################################*/
.global RdosIsSignalled
RdosIsSignalled:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate is_signalled_nr
jc risdFree
movl $1,%eax
jmp risdDone
risdFree:
xorl %eax,%eax
risdDone:
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosSetSignal
#
# Purpose....: Set signal
#
# Parameters.: Signal handle
#
##########################################################################*/
.global RdosSetSignal
RdosSetSignal:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate set_signal_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosFreeSignal
#
# Purpose....: Free signal handle
#
# Parameters.: Signal handle
#
##########################################################################*/
.global RdosFreeSignal
RdosFreeSignal:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate free_signal_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosAddWaitForSignal
#
# Purpose....: Add signal object to wait handle
#
# Parameters.: Wait handle
# Signal handle
# ID
#
##########################################################################*/
.global RdosAddWaitForSignal
RdosAddWaitForSignal:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
movw 8(%ebp),%bx
movw 12(%ebp),%ax
movl 16(%ebp),%ecx
UserGate add_wait_for_signal_nr
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosAddWaitForKeyboard
#
# Purpose....: Add keyboard to wait handle
#
# Parameters.: Wait handle
# ID
#
##########################################################################*/
.global RdosAddWaitForKeyboard
RdosAddWaitForKeyboard:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
movw 8(%ebp),%bx
movl 12(%ebp),%ecx
UserGate add_wait_for_keyboard_nr
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosAddWaitForMouse
#
# Purpose....: Add mouse to wait handle
#
# Parameters.: Wait handle
# ID
#
##########################################################################*/
.global RdosAddWaitForMouse
RdosAddWaitForMouse:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
movw 8(%ebp),%bx
movl 12(%ebp),%ecx
UserGate add_wait_for_mouse_nr
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosAddWaitForCom
#
# Purpose....: Add com object to wait handle
#
# Parameters.: Wait handle
# Com handle
# ID
#
##########################################################################*/
.global RdosAddWaitForCom
RdosAddWaitForCom:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
movw 8(%ebp),%bx
movw 12(%ebp),%ax
movl 16(%ebp),%ecx
UserGate add_wait_for_com_nr
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosAddWaitForAdc
#
# Purpose....: Add ADC object to wait handle
#
# Parameters.: Wait handle
# Adc handle
# ID
#
##########################################################################*/
.global RdosAddWaitForAdc
RdosAddWaitForAdc:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
movw 8(%ebp),%bx
movw 12(%ebp),%ax
movl 16(%ebp),%ecx
UserGate add_wait_for_adc_nr
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosSetTextMode
#
# Purpose....: Set text mode
#
##########################################################################*/
.global RdosSetTextMode
RdosSetTextMode:
pushl %ebp
movl %esp,%ebp
movw $3,%ax
UserGate set_video_mode_nr
leave
ret
/*##########################################################################
#
# Name : RdosSetVideoMode
#
# Purpose....: Set video mode
#
# Parameters.: &xres
# &yres
# &linesize
# &LFB
#
# Returns....: Bitmap handle
#
##########################################################################*/
.global RdosSetVideoMode
RdosSetVideoMode:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
pushl %edx
pushl %esi
pushl %edi
movl 8(%ebp),%edi
movw (%edi),%ax
movl 12(%ebp),%edi
movw (%edi),%cx
movl 16(%ebp),%edi
movw (%edi),%dx
UserGate get_video_mode_nr
jc set_video_fail
UserGate set_video_mode_nr
jc set_video_fail
pushl %edi
movl 8(%ebp),%edi
movzx %ax,%eax
movl %eax,(%edi)
movl 12(%ebp),%edi
movzx %cx,%ecx
movl %ecx,(%edi)
movl 16(%ebp),%edi
movzx %dx,%edx
movl %edx,(%edi)
movl 20(%ebp),%edi
movzx %si,%esi
movl %esi,(%edi)
popl %edi
movl 24(%ebp),%eax
movl %edi,(%eax)
movzx %bx,%eax
jmp set_video_done
set_video_fail:
xorl %eax,%eax
movl 8(%ebp),%edi
movl %eax,(%edi)
movl 12(%ebp),%edi
movl %eax,(%edi)
movl 16(%ebp),%edi
movl %eax,(%edi)
movl 20(%ebp),%edi
movl %eax,(%edi)
movl 24(%ebp),%edi
movl %eax,(%edi)
set_video_done:
popl %edi
popl %esi
popl %edx
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosSetClipRect
#
# Purpose....: Set clip rectangle
#
# Parameters.: Bitmap handle
# xmin, xmax, ymin, ymax
#
##########################################################################*/
.global RdosSetClipRect
RdosSetClipRect:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
pushl %edx
pushl %esi
pushl %edi
movw 8(%ebp),%bx
movw 12(%ebp),%cx
movw 16(%ebp),%dx
movw 20(%ebp),%si
movw 24(%ebp),%di
UserGate set_clip_rect_nr
popl %edi
popl %esi
popl %edx
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosClearClipRect
#
# Purpose....: Clear clip rectangle
#
# Parameters.: Bitmap handle
#
##########################################################################*/
.global RdosClearClipRect
RdosClearClipRect:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate clear_clip_rect_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosSetDrawColor
#
# Purpose....: Set draw color
#
# Parameters.: Bitmap handle
# Color
#
##########################################################################*/
.global RdosSetDrawColor
RdosSetDrawColor:
pushl %ebp
movl %esp,%ebp
pushl %eax
pushl %ebx
movw 8(%ebp),%bx
movl 12(%ebp),%eax
UserGate set_drawcolor_nr
popl %ebx
popl %eax
leave
ret
/*##########################################################################
#
# Name : RdosSetLGOP
#
# Purpose....: Set draw color
#
# Parameters.: Bitmap handle
# LGOP
#
##########################################################################*/
.global RdosSetLGOP
RdosSetLGOP:
pushl %ebp
movl %esp,%ebp
pushl %eax
pushl %ebx
movw 8(%ebp),%bx
movw 12(%ebp),%ax
UserGate set_lgop_nr
popl %ebx
popl %eax
leave
ret
/*##########################################################################
#
# Name : RdosSetHollowStyle
#
# Purpose....: Set hollow fill style
#
# Parameters.: Bitmap handle
#
##########################################################################*/
.global RdosSetHollowStyle
RdosSetHollowStyle:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate set_hollow_style_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosSetFilledStyle
#
# Purpose....: Set filled fill style
#
# Parameters.: Bitmap handle
#
##########################################################################*/
.global RdosSetFilledStyle
RdosSetFilledStyle:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate set_filled_style_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosOpenFont
#
# Purpose....: Open a font
#
# Parameters.: height
#
# Returns....: Font handle
#
##########################################################################*/
.global RdosOpenFont
RdosOpenFont:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%ax
UserGate open_font_nr
movzx %bx,%eax
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosCloseFont
#
# Purpose....: Close font handle
#
# Parameters.: Font handle
#
##########################################################################*/
.global RdosCloseFont
RdosCloseFont:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate close_font_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosGetStringMetrics
#
# Purpose....: Get string metrics for text using font
#
# Parameters.: Font handle
# String
# &width
# &height
#
##########################################################################*/
.global RdosGetStringMetrics
RdosGetStringMetrics:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
pushl %edx
pushl %edi
movw 8(%ebp),%bx
movl 12(%ebp),%edi
UserGate get_string_metrics_nr
movl 16(%ebp),%edi
movzx %cx,%ecx
movl %ecx,(%edi)
movl 20(%ebp),%edi
movzx %dx,%edx
movl %edx,(%edi)
popl %edi
popl %edx
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosSetFont
#
# Purpose....: Set font
#
# Parameters.: Bitmap handle
# Font handle
#
##########################################################################*/
.global RdosSetFont
RdosSetFont:
pushl %ebp
movl %esp,%ebp
pushl %eax
pushl %ebx
movw 8(%ebp),%bx
movw 12(%ebp),%ax
UserGate set_font_nr
popl %ebx
popl %eax
leave
ret
/*##########################################################################
#
# Name : RdosGetPixel
#
# Purpose....: Get pixel
#
# Parameters.: Bitmap handle
# x, y
#
##########################################################################*/
.global RdosGetPixel
RdosGetPixel:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
pushl %edx
movw 8(%ebp),%bx
movw 12(%ebp),%cx
movw 16(%ebp),%dx
UserGate get_pixel_nr
popl %edx
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosSetPixel
#
# Purpose....: Set pixel
#
# Parameters.: Bitmap handle
# x, y
#
##########################################################################*/
.global RdosSetPixel
RdosSetPixel:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
pushl %edx
movw 8(%ebp),%bx
movw 12(%ebp),%cx
movw 16(%ebp),%dx
UserGate set_pixel_nr
popl %edx
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosBlit
#
# Purpose....: Blit
#
# Parameters.: SrcHandle
# DestHandle
# width, height
# SrcX, SrcY
# DestX, DestY
#
##########################################################################*/
.global RdosBlit
RdosBlit:
pushl %ebp
movl %esp,%ebp
pushl %eax
pushl %ebx
pushl %ecx
pushl %edx
pushl %esi
pushl %edi
;
movw 8(%ebp),%ax
movw 12(%ebp),%bx
movw 16(%ebp),%cx
movw 20(%ebp),%dx
movw 28(%ebp),%si
shll $16,%esi
movw 24(%ebp),%si
movw 36(%ebp),%di
shll $16,%edi
movw 32(%ebp),%di
UserGate blit_nr
popl %edi
popl %esi
popl %edx
popl %ecx
popl %ebx
popl %eax
leave
ret
/*##########################################################################
#
# Name : RdosDrawMask
#
# Purpose....: Draw mask
#
# Parameters.: Bitmap handle
# mask
# RowSize
# width, height
# SrcX, SrcY
# DestX, DestY
#
##########################################################################*/
.global RdosDrawMask
RdosDrawMask:
pushl %ebp
movl %esp,%ebp
pushl %eax
pushl %ebx
pushl %ecx
pushl %edx
pushl %esi
pushl %edi
;
movw 8(%ebp),%bx
movl 12(%ebp),%edi
movw 16(%ebp),%ax
movw 24(%ebp),%si
shll $16,%esi
movw 20(%ebp),%si
movw 32(%ebp),%cx
shll $16,%ecx
movw 28(%ebp),%cx
movw 40(%ebp),%dx
shll $16,%edx
movw 36(%ebp),%dx
UserGate draw_mask_nr
popl %edi
popl %esi
popl %edx
popl %ecx
popl %ebx
popl %eax
leave
ret
/*##########################################################################
#
# Name : RdosDrawLine
#
# Purpose....: Draw a line
#
# Parameters.: Bitmap handle
# x1, y1
# x2, y2
#
##########################################################################*/
.global RdosDrawLine
RdosDrawLine:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
pushl %edx
pushl %esi
pushl %edi
;
movw 8(%ebp),%bx
movw 12(%ebp),%cx
movw 16(%ebp),%dx
movw 20(%ebp),%si
movw 24(%ebp),%di
UserGate draw_line_nr
popl %edi
popl %esi
popl %edx
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosDrawString
#
# Purpose....: Draw a string
#
# Parameters.: Bitmap handle
# x, y
# string
#
##########################################################################*/
.global RdosDrawString
RdosDrawString:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
pushl %edx
pushl %edi
;
movw 8(%ebp),%bx
movw 12(%ebp),%cx
movw 16(%ebp),%dx
movl 20(%ebp),%edi
UserGate draw_string_nr
popl %edi
popl %edx
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosDrawRect
#
# Purpose....: Draw a rect
#
# Parameters.: Bitmap handle
# x, y
# width, height
#
##########################################################################*/
.global RdosDrawRect
RdosDrawRect:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
pushl %edx
pushl %esi
pushl %edi
movw 8(%ebp),%bx
movw 12(%ebp),%cx
movw 16(%ebp),%dx
movw 20(%ebp),%si
movw 24(%ebp),%di
UserGate draw_rect_nr
popl %edi
popl %esi
popl %edx
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosDrawEllipse
#
# Purpose....: Draw an ellipse
#
# Parameters.: Bitmap handle
# x, y
# width, height
#
##########################################################################*/
.global RdosDrawEllipse
RdosDrawEllipse:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
pushl %edx
pushl %esi
pushl %edi
movw 8(%ebp),%bx
movw 12(%ebp),%cx
movw 16(%ebp),%dx
movw 20(%ebp),%si
movw 24(%ebp),%di
UserGate draw_ellipse_nr
popl %edi
popl %esi
popl %edx
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosCreateBitmap
#
# Purpose....: Create a bitmap
#
# Parameters.: BitsPerPixel
# width, height
#
# Returns....: Bitmap handle
#
##########################################################################*/
.global RdosCreateBitmap
RdosCreateBitmap:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
pushl %edx
movw 8(%ebp),%ax
movw 12(%ebp),%cx
movw 16(%ebp),%dx
UserGate create_bitmap_nr
movzx %bx,%eax
;
popl %edx
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosDuplicateBitmapHandle
#
# Purpose....: Duplicate bitmap handle for use in another thread / object
#
# Parameters.: Bitmap handle
#
# Returns....: Bitmap handle
#
##########################################################################*/
.global RdosDuplicateBitmapHandle
RdosDuplicateBitmapHandle:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate dup_bitmap_handle_nr
movzx %bx,%eax
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosCloseBitmap
#
# Purpose....: Close bitmap handle
#
# Parameters.: Bitmap handle
#
##########################################################################*/
.global RdosCloseBitmap
RdosCloseBitmap:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate close_bitmap_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosCreateStringBitmap
#
# Purpose....: Create bitmap from string & font
#
# Parameters.: Font
# string
#
# Returns....: Bitmap handle
#
##########################################################################*/
.global RdosCreateStringBitmap
RdosCreateStringBitmap:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %edi
movw 8(%ebp),%bx
movl 12(%ebp),%edi
UserGate create_string_bitmap_nr
movzx %bx,%eax
;
popl %edi
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosGetBitmapInfo
#
# Purpose....: Get info about bitmap
#
# Parameters.: Bitmap handle
# &BitsPerPixel
# &width, &height
# &linesize
# &LFB
#
##########################################################################*/
.global RdosGetBitmapInfo
RdosGetBitmapInfo:
pushl %ebp
movl %esp,%ebp
pushl %eax
pushl %ebx
pushl %ecx
pushl %edx
pushl %esi
pushl %edi
movw 8(%ebp),%bx
UserGate get_bitmap_info_nr
jc gbiFail
pushl %edi
movl 12(%ebp),%edi
movzx %al,%eax
movl %eax,(%edi)
movl 16(%ebp),%edi
movzx %cx,%ecx
movl %ecx,(%edi)
movl 20(%ebp),%edi
movzx %dx,%edx
movl %edx,(%edi)
movl 24(%ebp),%edi
movzx %si,%esi
movl %esi,(%edi)
popl %edi
movl 28(%ebp),%eax
movl %edi,(%eax)
jmp gbiDone
gbiFail:
xorl %eax,%eax
movl 12(%ebp),%edi
movl %eax,(%edi)
movl 16(%ebp),%edi
movl %eax,(%edi)
movl 20(%ebp),%edi
movl %eax,(%edi)
movl 24(%ebp),%edi
movl %eax,(%edi)
movl 28(%ebp),%edi
movl %eax,(%edi)
gbiDone:
popl %edi
popl %esi
popl %edx
popl %ecx
popl %ebx
popl %eax
leave
ret
/*##########################################################################
#
# Name : RdosCreateSprite
#
# Purpose....: Create a sprite
#
# Parameters.: dest
# bitmap
# mask
# LGOP
#
# Returns....: Sprite handle
#
##########################################################################*/
.global RdosCreateSprite
RdosCreateSprite:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
pushl %edx
movw 8(%ebp),%bx
movw 12(%ebp),%cx
movw 16(%ebp),%dx
movw 20(%ebp),%ax
UserGate create_sprite_nr
movzx %bx,%eax
popl %edx
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosCloseSprite
#
# Purpose....: Close sprite handle
#
# Parameters.: Sprite handle
#
##########################################################################*/
.global RdosCloseSprite
RdosCloseSprite:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate close_sprite_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosShowSprite
#
# Purpose....: Show sprite
#
# Parameters.: Sprite handle
#
##########################################################################*/
.global RdosShowSprite
RdosShowSprite:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate show_sprite_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosHideSprite
#
# Purpose....: Hide sprite
#
# Parameters.: Sprite handle
#
##########################################################################*/
.global RdosHideSprite
RdosHideSprite:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate hide_sprite_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosMoveSprite
#
# Purpose....: Move sprite
#
# Parameters.: Sprite handle
# x, y
#
##########################################################################*/
.global RdosMoveSprite
RdosMoveSprite:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
pushl %edx
movw 8(%ebp),%bx
movw 12(%ebp),%cx
movw 16(%ebp),%dx
UserGate move_sprite_nr
popl %edx
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosSetForeColor
#
# Purpose....: Set text-mode fore color
#
# Parameters.: palette index
#
##########################################################################*/
.global RdosSetForeColor
RdosSetForeColor:
pushl %ebp
movl %esp,%ebp
pushl %eax
movb 8(%ebp),%al
UserGate set_forecolor_nr
popl %eax
leave
ret
/*##########################################################################
#
# Name : RdosSetBackColor
#
# Purpose....: Set text-mode back color
#
# Parameters.: palette index
#
##########################################################################*/
.global RdosSetBackColor
RdosSetBackColor:
pushl %ebp
movl %esp,%ebp
pushl %eax
movb 8(%ebp),%al
UserGate set_backcolor_nr
popl %eax
leave
ret
/*##########################################################################
#
# Name : RdosGetSysTime
#
# Purpose....: Get system time
#
# Parameters.: &year, &month, &day
# &hour, &min, &sec, &ms
#
##########################################################################*/
.global RdosGetSysTime
RdosGetSysTime:
pushl %ebp
movl %esp,%ebp
pushal
UserGate get_system_time_nr
pushl %eax
UserGate binary_to_time_nr
pushl %edx
movl 8(%ebp),%esi
movzx %dx,%edx
movl %edx,(%esi)
movl 12(%ebp),%esi
movzx %ch,%edx
movl %edx,(%esi)
movl 16(%ebp),%esi
movzx %cl,%edx
movl %edx,(%esi)
movl 20(%ebp),%esi
movzx %bh,%edx
movl %edx,(%esi)
movl 24(%ebp),%esi
movzx %bl,%edx
movl %edx,(%esi)
movl 28(%ebp),%esi
movzx %ah,%edx
movl %edx,(%esi)
popl %edx
UserGate time_to_binary_nr
movl %eax,%ebx
popl %eax
subl %ebx,%eax
xorl %edx,%edx
movl $1192,%ebx
divl %ebx
movl 32(%ebp),%esi
movzx %ax,%eax
movl %eax,(%esi)
popal
leave
ret
/*##########################################################################
#
# Name : RdosGetTime
#
# Purpose....: Get time
#
# Parameters.: &year, &month, &day
# &hour, &min, &sec, &ms
#
##########################################################################*/
.global RdosGetTime
RdosGetTime:
pushl %ebp
movl %esp,%ebp
pushal
UserGate get_time_nr
pushl %eax
UserGate binary_to_time_nr
pushl %edx
movl 8(%ebp),%esi
movzx %dx,%edx
movl %edx,(%esi)
movl 12(%ebp),%esi
movzx %ch,%edx
movl %edx,(%esi)
movl 16(%ebp),%esi
movzx %cl,%edx
movl %edx,(%esi)
movl 20(%ebp),%esi
movzx %bh,%edx
movl %edx,(%esi)
movl 24(%ebp),%esi
movzx %bl,%edx
movl %edx,(%esi)
movl 28(%ebp),%esi
movzx %ah,%edx
movl %edx,(%esi)
popl %edx
UserGate time_to_binary_nr
movl %eax,%ebx
popl %eax
subl %ebx,%eax
xorl %edx,%edx
movl $1192,%ebx
divl %ebx
movl 32(%ebp),%esi
movzx %ax,%eax
movl %eax,(%esi)
popal
leave
ret
/*##########################################################################
#
# Name : RdosSetTime
#
# Purpose....: Set time
#
# Parameters.: year, month, day
# hour, min, sec, ms
#
##########################################################################*/
.global RdosSetTime
RdosSetTime:
pushl %ebp
movl %esp,%ebp
pushal
movw 8(%ebp),%dx
movb 12(%ebp),%ch
movb 16(%ebp),%cl
movb 20(%ebp),%bh
movb 24(%ebp),%bl
movb 28(%ebp),%ah
UserGate time_to_binary_nr
movl %edx,%edi
movl %eax,%esi
movl 32(%ebp),%eax
movl $1192,%edx
mull %edx
addl %eax,%esi
adcl $0,%edi
UserGate get_system_time_nr
subl %eax,%esi
sbbl %edx,%edi
movl %esi,%eax
movl %edi,%edx
UserGate update_time_nr
popal
leave
ret
/*##########################################################################
#
# Name : RdosTicsToRecord
#
# Purpose....: Convert tics to record format
#
# Parameters.: MSB, LSB
# &year, &month, &day
# &hour, &min, &sec, &ms
#
##########################################################################*/
.global RdosTicsToRecord
RdosTicsToRecord:
pushl %ebp
movl %esp,%ebp
pushal
movl 8(%ebp),%edx
movl 12(%ebp),%eax
addl $596,%eax
adcl $0,%edx
UserGate binary_to_time_nr
pushl %edx
movl 16(%ebp),%esi
movzx %dx,%edx
movl %edx,(%esi)
movl 20(%ebp),%esi
movzx %ch,%edx
movl %edx,(%esi)
movl 24(%ebp),%esi
movzx %cl,%edx
movl %edx,(%esi)
movl 28(%ebp),%esi
movzx %bh,%edx
movl %edx,(%esi)
movl 32(%ebp),%esi
movzx %bl,%edx
movl %edx,(%esi)
movl 36(%ebp),%esi
movzx %ah,%edx
movl %edx,(%esi)
popl %edx
UserGate time_to_binary_nr
movl %eax,%ebx
movl 12(%ebp),%eax
subl %edx,%eax
xorl %edx,%edx
movl $1192,%ebx
divl %ebx
movl 40(%ebp),%esi
cmpw %ax,1000
jne rttrSaveMs
decw %ax
rttrSaveMs:
movzx %ax,%eax
movl %eax,(%esi)
popal
leave
ret
/*##########################################################################
#
# Name : RdosRecordToTics
#
# Purpose....: Convert from record format to tics
#
# Parameters.: &MSB, &LSB
# year, month, day
# hour, min, sec, ms
#
##########################################################################*/
.global RdosRecordToTics
RdosRecordToTics:
pushl %ebp
movl %esp,%ebp
pushal
movl 40(%ebp),%eax
movl $1192,%edx
mull %edx
pushl %eax
movw 16(%ebp),%dx
movb 20(%ebp),%ch
movb 24(%ebp),%cl
movb 28(%ebp),%bh
movb 32(%ebp),%bl
movb 36(%ebp),%ah
UserGate time_to_binary_nr
popl %ebx
addl %ebx,%eax
adcl $0,%edx
movl 8(%ebp),%esi
movl %edx,(%esi)
movl 12(%ebp),%esi
movl %eax,(%esi)
popal
leave
ret
/*##########################################################################
#
# Name : RdosDecodeMsbTics
#
# Purpose....: Decode MSB tics
#
# Parameters.: MSB
# &day, &hour
#
##########################################################################*/
.global RdosDecodeMsbTics
RdosDecodeMsbTics:
pushl %ebp
movl %esp,%ebp
pushal
movl 8(%ebp),%eax
xorl %edx,%edx
movl $24,%ecx
divl %ecx
movl 12(%ebp),%ebx
movl %eax,(%ebx)
movl 16(%ebp),%ebx
movl %edx,(%ebx)
popal
leave
ret
/*##########################################################################
#
# Name : RdosDecodeLsbTics
#
# Purpose....: Decode LSB tics
#
# Parameters.: LSB
# &min, &sec, &ms, &us
#
##########################################################################*/
.global RdosDecodeLsbTics
RdosDecodeLsbTics:
pushl %ebp
movl %esp,%ebp
pushal
movl 8(%ebp),%eax
movl $60,%edx
mull %edx
movl 12(%ebp),%ebx
movl %edx,(%ebx)
movl $60,%edx
mull %edx
movl 16(%ebp),%ebx
movl %edx,(%ebx)
movl $1000,%edx
mull %edx
movl 20(%ebp),%ebx
movl %edx,(%ebx)
movl $1000,%edx
mull %edx
movl 24(%ebp),%ebx
movl %edx,(%ebx)
popal
leave
ret
/*##########################################################################
#
# Name : RdosDayOfWeek
#
# Purpose....: Get day of week
#
# Parameters.: year, month, day
#
# Returns....: day of week
#
##########################################################################*/
.global RdosDayOfWeek
RdosDayOfWeek:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
pushl %edx
movl 8(%ebp),%edx
movb 12(%ebp),%ch
movb 16(%ebp),%cl
xorw %bx,%bx
xorb %ah,%ah
UserGate adjust_time_nr
pushw %dx
movl $365,%eax
imulw %dx
pushw %dx
pushw %ax
popl %ebx
popw %dx
UserGate passed_days_nr
decw %dx
shrw $2,%dx
incw %dx
addw %dx,%ax
addl %ebx,%eax
xorl %edx,%edx
addl $5,%eax
movl $7,%ebx
divl %ebx
movzx %dl,%eax
popl %edx
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosGetTics
#
# Purpose....: Get system tics
#
# Parameters.: &MSB, &LSB
#
##########################################################################*/
.global RdosGetTics
RdosGetTics:
pushl %ebp
movl %esp,%ebp
pushl %edx
pushl %esi
UserGate get_time_nr
movl 8(%ebp),%esi
movl %edx,(%esi)
movl 12(%ebp),%esi
movl %eax,(%esi)
popl %esi
popl %edx
leave
ret
/*##########################################################################
#
# Name : RdosAddTics
#
# Purpose....: Add tics to binary time
#
# Parameters.: &MSB, &LSB
# tics
#
##########################################################################*/
.global RdosAddTics
RdosAddTics:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movl 16(%ebp),%eax
movl 12(%ebp),%ebx
addl %eax,(%ebx)
movl 8(%ebp),%ebx
adcl $0,(%ebx)
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosAddMilli
#
# Purpose....: Add milliseconds to binary time
#
# Parameters.: &MSB, &LSB
# milli
#
##########################################################################*/
.global RdosAddMilli
RdosAddMilli:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movl 16(%ebp),%eax
movl $1193,%edx
mull %edx
movl 12(%ebp),%ebx
addl %eax,(%ebx)
movl 8(%ebp),%ebx
adcl %edx,(%ebx)
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosAddSec
#
# Purpose....: Add milliseconds to binary time
#
# Parameters.: &MSB, &LSB
# sec
#
##########################################################################*/
.global RdosAddSec
RdosAddSec:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movl 16(%ebp),%eax
movl $1193000,%edx
mull %edx
movl 12(%ebp),%ebx
addl %eax,(%ebx)
movl 8(%ebp),%ebx
adcl %edx,(%ebx)
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosAddMin
#
# Purpose....: Add minutes to binary time
#
# Parameters.: &MSB, &LSB
# min
#
##########################################################################*/
.global RdosAddMin
RdosAddMin:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movl 16(%ebp),%eax
movl $71582760,%edx
mull %edx
movl 12(%ebp),%ebx
addl %eax,(%ebx)
movl 8(%ebp),%ebx
adcl %edx,(%ebx)
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosAddHour
#
# Purpose....: Add hour to binary time
#
# Parameters.: &MSB, &LSB
# hour
#
##########################################################################*/
.global RdosAddHour
RdosAddHour:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movl 16(%ebp),%eax
movl 8(%ebp),%ebx
adc %eax,(%ebx)
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosAddDay
#
# Purpose....: Add days to binary time
#
# Parameters.: &MSB, &LSB
# days
#
##########################################################################*/
.global RdosAddDay
RdosAddDay:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movl 16(%ebp),%eax
movl $24,%edx
mull %edx
movl 8(%ebp),%ebx
adc %eax,(%ebx)
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosSyncTime
#
# Purpose....: Synchronize time with NTP
#
# Parameters.: IP
#
##########################################################################*/
.global RdosSyncTime
RdosSyncTime:
pushl %ebp
movl %esp,%ebp
pushal
movl 8(%ebp),%edx
UserGate sync_time_nr
jc RdosSyncTimeFail
movl $1,%eax
jmp RdosSyncTimeDone
RdosSyncTimeFail:
xorl %eax,%eax
RdosSyncTimeDone:
popal
leave
ret
/*##########################################################################
#
# Name : RdosOpenCom
#
# Purpose....: Open com-port
#
# Parameters.: ID
# baudrate
# parity
# data bits
# stop bits
# SendBufferSize
# RecBufferSize
#
# Returns...: Com handle
#
##########################################################################*/
.global RdosOpenCom
RdosOpenCom:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
pushl %edx
pushl %esi
pushl %edi
movb 8(%ebp),%al
movb 20(%ebp),%ah
movb 24(%ebp),%bl
movb 16(%ebp),%bh
movl 12(%ebp),%ecx
movw 28(%ebp),%si
movw 32(%ebp),%di
UserGate open_com_nr
movzx %bx,%eax
popl %edi
popl %esi
popl %edx
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosCloseCom
#
# Purpose....: Close com-port
#
# Parameters.: Com handle
#
##########################################################################*/
.global RdosCloseCom
RdosCloseCom:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate close_com_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosFlushCom
#
# Purpose....: Flush com-port
#
# Parameters.: Com handle
#
##########################################################################*/
.global RdosFlushCom
RdosFlushCom:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate flush_com_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosReadCom
#
# Purpose....: Read com-port
#
# Parameters.: Com handle
#
# Returns....: Character
#
##########################################################################*/
.global RdosReadCom
RdosReadCom:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate read_com_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosWriteCom
#
# Purpose....: Write com-port
#
# Parameters.: Com handle
# char
#
# Returns....: 0 for success
#
##########################################################################*/
.global RdosWriteCom
RdosWriteCom:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
movb 12(%ebp),%al
UserGate write_com_nr
movzx %al,%eax
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosWaitForSendCompletedCom
#
# Purpose....: Wait until send buffer is empty
#
# Parameters.: Com handle
#
##########################################################################*/
.global RdosWaitForSendCompletedCom
RdosWaitForSendCompletedCom:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate wait_for_send_completed_com_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosEnableCts
#
# Purpose....: Enable CTS signal
#
# Parameters.: Com handle
#
##########################################################################*/
.global RdosEnableCts
RdosEnableCts:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate enable_cts_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosDisableCts
#
# Purpose....: Disable CTS signal
#
# Parameters.: Com handle
#
##########################################################################*/
.global RdosDisableCts
RdosDisableCts:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate disable_cts_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosEnableAutoRts
#
# Purpose....: Enable auto RTS signal generation for RS485
#
# Parameters.: Com handle
#
##########################################################################*/
.global RdosEnableAutoRts
RdosEnableAutoRts:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate enable_auto_rts_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosDisableAutoRts
#
# Purpose....: Disable auto RTS signal generation for RS485
#
# Parameters.: Com handle
#
##########################################################################*/
.global RdosDisableAutoRts
RdosDisableAutoRts:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate disable_auto_rts_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosSetDtr
#
# Purpose....: Set DTR active
#
# Parameters.: Com handle
#
##########################################################################*/
.global RdosSetDtr
RdosSetDtr:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate set_dtr_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosResetDtr
#
# Purpose....: Set DTR inactive
#
# Parameters.: Com handle
#
##########################################################################*/
.global RdosResetDtr
RdosResetDtr:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate reset_dtr_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosSetRts
#
# Purpose....: Set RTS active
#
# Parameters.: Com handle
#
##########################################################################*/
.global RdosSetRts
RdosSetRts:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate set_rts_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosResetRts
#
# Purpose....: Set RTS inactive
#
# Parameters.: Com handle
#
##########################################################################*/
.global RdosResetRts
RdosResetRts:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate reset_rts_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosGetReceiveBufferSpace
#
# Purpose....: Get receive buffer free space
#
# Parameters.: Com handle
#
# Returns....: Free bytes
#
##########################################################################*/
.global RdosGetReceiveBufferSpace
RdosGetReceiveBufferSpace:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate get_com_receive_space_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosGetSendBufferSpace
#
# Purpose....: Get send buffer free space
#
# Parameters.: Com handle
#
# Returns....: Free bytes
#
##########################################################################*/
.global RdosGetSendBufferSpace
RdosGetSendBufferSpace:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate get_com_send_space_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosOpenFile
#
# Purpose....: Open file
#
# Parameters.: Filename
# Access
#
# Returns...: File handle
#
##########################################################################*/
.global RdosOpenFile
RdosOpenFile:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
pushl %edi
movl 8(%ebp),%edi
movb 12(%ebp),%cl
UserGate open_file_nr
jc OpenFileFailed
movzx %bx,%eax
jmp OpenFileDone
OpenFileFailed:
xorl %eax,%eax
OpenFileDone:
popl %edi
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosCreateFile
#
# Purpose....: Create file
#
# Parameters.: Filename
# Attribute
#
# Returns...: File handle
#
##########################################################################*/
.global RdosCreateFile
RdosCreateFile:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
pushl %edi
movl 8(%ebp),%edi
movw 12(%ebp),%cx
UserGate create_file_nr
jc CreateFileFailed
movzx %bx,%eax
jmp CreateFileDone
CreateFileFailed:
xorl %eax,%eax
CreateFileDone:
popl %edi
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosCloseFile
#
# Purpose....: Close file
#
# Parameters.: File handle
#
##########################################################################*/
.global RdosCloseFile
RdosCloseFile:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate close_file_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosIsDevice
#
# Purpose....: Check if file is device
#
# Parameters.: TRUE if device
#
##########################################################################*/
.global RdosIsDevice
RdosIsDevice:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate get_ioctl_data_nr
testw $0x8000,%dx
jz ridFail
movl $1,%eax
jmp ridDone
ridFail:
xorl %eax,%eax
ridDone:
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosDuplFile
#
# Purpose....: Duplicate file handle
#
# Parameters.: File handle
#
# Returns....: File handle
#
##########################################################################*/
.global RdosDuplFile
RdosDuplFile:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate dupl_file_nr
jc DuplFileFailed
movzx %bx,%eax
jmp DuplFileDone
DuplFileFailed:
xorl %eax,%eax
DuplFileDone:
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosGetFileSize
#
# Purpose....: Get file size
#
# Parameters.: File handle
#
# Returns....: Size
#
##########################################################################*/
.global RdosGetFileSize
RdosGetFileSize:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate get_file_size_nr
jnc GetFileSizeDone
GetFileSizeFail:
xorl %eax,%eax
GetFileSizeDone:
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosSetFileSize
#
# Purpose....: Set file size
#
# Parameters.: File handle
# Size
#
##########################################################################*/
.global RdosSetFileSize
RdosSetFileSize:
pushl %ebp
movl %esp,%ebp
pushl %eax
pushl %ebx
movw 8(%ebp),%bx
movl 12(%ebp),%eax
UserGate set_file_size_nr
popl %ebx
popl %eax
leave
ret
/*##########################################################################
#
# Name : RdosGetFilePos
#
# Purpose....: Get file position
#
# Parameters.: File handle
#
# Returns....: Position
#
##########################################################################*/
.global RdosGetFilePos
RdosGetFilePos:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate get_file_pos_nr
jnc GetFilePosDone
GetFilePosFail:
xorl %eax,%eax
GetFilePosDone:
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosSetFilePos
#
# Purpose....: Set file position
#
# Parameters.: File handle
# Position
#
##########################################################################*/
.global RdosSetFilePos
RdosSetFilePos:
pushl %ebp
movl %esp,%ebp
pushl %eax
pushl %ebx
movw 8(%ebp),%bx
movl 12(%ebp),%eax
UserGate set_file_pos_nr
popl %ebx
popl %eax
leave
ret
/*##########################################################################
#
# Name : RdosGetFileTime
#
# Purpose....: Get file time & date
#
# Parameters.: File handle
# &MSB, &LSB
#
##########################################################################*/
.global RdosGetFileTime
RdosGetFileTime:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %edi
movw 8(%ebp),%bx
UserGate get_file_time_nr
jc GetFileTimeDone
movl 12(%ebp),%edi
movl %edx,(%edi)
movl 16(%ebp),%edi
movl %eax,(%edi)
GetFileTimeDone:
popl %edi
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosSetFileTime
#
# Purpose....: Set file time & date
#
# Parameters.: File handle
# MSB, LSB
#
##########################################################################*/
.global RdosSetFileTime
RdosSetFileTime:
pushl %ebp
movl %esp,%ebp
pushl %eax
pushl %ebx
pushl %edx
movw 8(%ebp),%bx
movl 12(%ebp),%edx
movl 16(%ebp),%eax
UserGate set_file_time_nr
popl %edx
popl %ebx
popl %eax
leave
ret
/*##########################################################################
#
# Name : RdosReadFile
#
# Purpose....: Read from file
#
# Parameters.: File handle
# buffer
# count
#
# Returns....: Read count
#
##########################################################################*/
.global RdosReadFile
RdosReadFile:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
pushl %edi
movw 8(%ebp),%bx
movl 12(%ebp),%edi
movl 16(%ebp),%ecx
UserGate read_file_nr
popl %edi
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosWriteFile
#
# Purpose....: Write to file
#
# Parameters.: File handle
# buffer
# count
#
# Returns....: Written count
#
##########################################################################*/
.global RdosWriteFile
RdosWriteFile:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
pushl %edi
movw 8(%ebp),%bx
movl 12(%ebp),%edi
movl 16(%ebp),%ecx
UserGate write_file_nr
popl %edi
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosCreateMapping
#
# Purpose....: Create file mapping
#
# Parameters.: Size
#
# Returns...: Filemap handle
#
##########################################################################*/
.global RdosCreateMapping
RdosCreateMapping:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movl 8(%ebp),%eax
UserGate create_mapping_nr
movzx %bx,%eax
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosCreateNamedMapping
#
# Purpose....: Create named file mapping
#
# Parameters.: Name
# Size
#
# Returns...: Filemap handle
#
##########################################################################*/
.global RdosCreateNamedMapping
RdosCreateNamedMapping:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %edi
movl 8(%ebp),%edi
movl 12(%ebp),%eax
UserGate create_named_mapping_nr
movzx %bx,%eax
popl %edi
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosCreateNamedFileMapping
#
# Purpose....: Create file named file mapping
#
# Parameters.: Name
# Size
# File handle
#
# Returns...: Filemap handle
#
##########################################################################*/
.global RdosCreateNamedFileMapping
RdosCreateNamedFileMapping:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %edi
movl 8(%ebp),%edi
movl 12(%ebp),%eax
movw 16(%ebp),%bx
UserGate create_named_file_mapping_nr
movzx %bx,%eax
popl %edi
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosOpenNamedMapping
#
# Purpose....: Open named file mapping
#
# Parameters.: Name
#
# Returns...: Filemap handle
#
##########################################################################*/
.global RdosOpenNamedMapping
RdosOpenNamedMapping:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %edi
movl 8(%ebp),%edi
UserGate open_named_mapping_nr
movzx %bx,%eax
popl %edi
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosSyncMapping
#
# Purpose....: Sync file mapping
#
# Parameters.: Filemap handle
#
##########################################################################*/
.global RdosSyncMapping
RdosSyncMapping:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate sync_mapping_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosCloseMapping
#
# Purpose....: Close file mapping
#
# Parameters.: Filemap handle
#
##########################################################################*/
.global RdosCloseMapping
RdosCloseMapping:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate close_mapping_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosMapView
#
# Purpose....: Map view of file into memory
#
# Parameters.: Filemap handle
# Offset
# Address
# Size
#
##########################################################################*/
.global RdosMapView
RdosMapView:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
pushl %edi
movw 8(%ebp),%bx
movl 12(%ebp),%eax
movl 16(%ebp),%edi
movl 20(%ebp),%ecx
UserGate map_view_nr
popl %edi
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosUnmapView
#
# Purpose....: Unmap view of file
#
# Parameters.: Filemap handle
#
##########################################################################*/
.global RdosUnmapView
RdosUnmapView:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate unmap_view_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosSetCurDrive
#
# Purpose....: Set current drive
#
# Parameters.: Drive
#
##########################################################################*/
.global RdosSetCurDrive
RdosSetCurDrive:
pushl %ebp
movl %esp,%ebp
movb 8(%ebp),%al
UserGate set_cur_drive_nr
jc rscdrFail
movl $1,%eax
jmp rscdrDone
rscdrFail:
xorl %eax,%eax
rscdrDone:
leave
ret
/*##########################################################################
#
# Name : RdosGetCurDrive
#
# Purpose....: Get current drive
#
# Returns....: Drive
#
##########################################################################*/
.global RdosGetCurDrive
RdosGetCurDrive:
pushl %ebp
movl %esp,%ebp
xorl %eax,%eax
UserGate get_cur_drive_nr
movzx %al,%eax
leave
ret
/*##########################################################################
#
# Name : RdosSetCurDir
#
# Purpose....: Set current directory
#
# Parameters.: Pathname
#
##########################################################################*/
.global RdosSetCurDir
RdosSetCurDir:
pushl %ebp
movl %esp,%ebp
pushl %edi
movl 8(%ebp),%edi
UserGate set_cur_dir_nr
jc rscdFail
movl $1,%eax
jmp rscdDone
rscdFail:
xorl %eax,%eax
rscdDone:
popl %edi
leave
ret
/*##########################################################################
#
# Name : RdosGetCurDir
#
# Purpose....: Get current directory
#
# Parameters.: Drive
# Pathname
#
##########################################################################*/
.global RdosGetCurDir
RdosGetCurDir:
pushl %ebp
movl %esp,%ebp
pushl %edi
movb 8(%ebp),%al
movl 12(%ebp),%edi
UserGate get_cur_dir_nr
jc rgcdFail
movl $1,%eax
jmp rgcdDone
rgcdFail:
xorl %eax,%eax
rgcdDone:
popl %edi
leave
ret
/*##########################################################################
#
# Name : RdosMakeDir
#
# Purpose....: Create directory
#
# Parameters.: Pathname
#
##########################################################################*/
.global RdosMakeDir
RdosMakeDir:
pushl %ebp
movl %esp,%ebp
pushl %edi
movl 8(%ebp),%edi
UserGate make_dir_nr
jc mdFail
movl $1,%eax
jmp mdDone
mdFail:
xorl %eax,%eax
mdDone:
popl %edi
leave
ret
/*##########################################################################
#
# Name : RdosRemoveDir
#
# Purpose....: Remove directory
#
# Parameters.: Pathname
#
##########################################################################*/
.global RdosRemoveDir
RdosRemoveDir:
pushl %ebp
movl %esp,%ebp
pushl %edi
movl 8(%ebp),%edi
UserGate remove_dir_nr
jc rdFail
movl $1,%eax
jmp rdDone
rdFail:
xorl %eax,%eax
rdDone:
popl %edi
leave
ret
/*##########################################################################
#
# Name : RdosRenameFile
#
# Purpose....: Rename file
#
# Parameters.: ToName
# FromName
#
##########################################################################*/
.global RdosRenameFile
RdosRenameFile:
pushl %ebp
movl %esp,%ebp
pushl %esi
pushl %edi
movl 8(%ebp),%edi
movl 12(%ebp),%esi
UserGate rename_file_nr
jc rfFail
mov $1,%eax
jmp rfDone
rfFail:
xorl %eax,%eax
rfDone:
popl %edi
popl %esi
leave
ret
/*##########################################################################
#
# Name : RdosDeleteFile
#
# Purpose....: Delete file
#
# Parameters.: Pathname
#
##########################################################################*/
.global RdosDeleteFile
RdosDeleteFile:
pushl %ebp
movl %esp,%ebp
pushl %edi
movl 8(%ebp),%edi
UserGate delete_file_nr
jc dfFail
mov $1,%eax
jmp dfDone
dfFail:
xorl %eax,%eax
dfDone:
popl %edi
leave
ret
/*##########################################################################
#
# Name : RdosGetFileAttribute
#
# Purpose....: Get file attribute
#
# Parameters.: Pathname
# &Attrib
#
##########################################################################*/
.global RdosGetFileAttribute
RdosGetFileAttribute:
pushl %ebp
movl %esp,%ebp
pushl %ecx
pushl %edi
movl 8(%ebp),%edi
UserGate get_file_attribute_nr
jc gfaFail
movl 12(%ebp),%edi
movzx %cx,%ecx
movl %ecx,(%edi)
movl $1,%eax
jmp gfaDone
gfaFail:
xorl %eax,%eax
gfaDone:
popl %edi
popl %ecx
leave
ret
/*##########################################################################
#
# Name : RdosSetFileAttribute
#
# Purpose....: Set file attribute
#
# Parameters.: Pathname
# Attrib
#
##########################################################################*/
.global RdosSetFileAttribute
RdosSetFileAttribute:
pushl %ebp
movl %esp,%ebp
pushl %ecx
pushl %edi
movl 8(%ebp),%edi
movw 12(%ebp),%cx
UserGate set_file_attribute_nr
jc sfaFail
movl $1,%eax
jmp sfaDone
sfaFail:
xorl %eax,%eax
sfaDone:
popl %edi
popl %ecx
leave
ret
/*##########################################################################
#
# Name : RdosOpenDir
#
# Purpose....: Open directory
#
# Parameters.: Pathname
#
# Returns....: Dir handle
#
##########################################################################*/
.global RdosOpenDir
RdosOpenDir:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %edi
movl 8(%ebp),%edi
UserGate open_dir_nr
jc odFail
movzx %bx,%eax
jmp odDone
odFail:
xorl %eax,%eax
odDone:
popl %edi
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosCloseDir
#
# Purpose....: Close directory
#
# Parameters.: Dir handle
#
##########################################################################*/
.global RdosCloseDir
RdosCloseDir:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate close_dir_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosReadDir
#
# Purpose....: Read directory entry
#
# Parameters.: Dir handle
# Entry #
# MaxNameSize
# Name buffer
# &FileSize
# &Attribute
# &Msb time
# &Lsb time
#
##########################################################################*/
.global RdosReadDir
RdosReadDir:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
pushl %edi
movw 8(%ebp),%bx
movw 12(%ebp),%dx
movw 16(%ebp),%cx
movl 20(%ebp),%edi
UserGate read_dir_nr
jc rdiFail
movl 24(%ebp),%edi
movl %ecx,(%edi)
movl 28(%ebp),%edi
movzx %bx,%ebx
movl %ebx,(%edi)
movl 32(%ebp),%edi
movl %edx,(%edi)
movl 36(%ebp),%edi
movl %eax,(%edi)
movl $1,%eax
jmp rdiDone
rdiFail:
xorl %eax,%eax
rdiDone:
popl %edi
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosSetFocus
#
# Purpose....: Set input focus
#
# Parameters.: Focus handle
#
##########################################################################*/
.global RdosSetFocus
RdosSetFocus:
pushl %ebp
movl %esp,%ebp
movl 8(%ebp),%eax
UserGate set_focus_nr
leave
ret
/*##########################################################################
#
# Name : RdosGetFocus
#
# Purpose....: Get input focus
#
# Returns....: Focus handle
#
##########################################################################*/
.global RdosGetFocus
RdosGetFocus:
pushl %ebp
movl %esp,%ebp
UserGate get_focus_nr
leave
ret
/*##########################################################################
#
# Name : RdosClearKeyboard
#
# Purpose....: Clear keyboard buffer
#
##########################################################################*/
.global RdosClearKeyboard
RdosClearKeyboard:
pushl %ebp
movl %esp,%ebp
UserGate flush_keyboard_nr
leave
ret
/*##########################################################################
#
# Name : RdosPollKeyboard
#
# Purpose....: Poll keyboard buffer
#
# Returns....: TRUE if non-empty
#
##########################################################################*/
.global RdosPollKeyboard
RdosPollKeyboard:
pushl %ebp
movl %esp,%ebp
UserGate poll_keyboard_nr
jc rpkEmpty
mov $1,%eax
jmp rpkDone
rpkEmpty:
xorl %eax,%eax
rpkDone:
leave
ret
/*##########################################################################
#
# Name : RdosReadKeyboard
#
# Purpose....: Read keyboard buffer
#
# Returns....: Scan code
#
##########################################################################*/
.global RdosReadKeyboard
RdosReadKeyboard:
pushl %ebp
movl %esp,%ebp
UserGate read_keyboard_nr
movzx %ax,%eax
leave
ret
/*##########################################################################
#
# Name : RdosGetKeyboardState
#
# Purpose....: Get keyboard buffer
#
# Returns....: Keyboard state
#
##########################################################################*/
.global RdosGetKeyboardState
RdosGetKeyboardState:
pushl %ebp
movl %esp,%ebp
UserGate get_keyboard_state_nr
movzx %ax,%eax
leave
ret
/*##########################################################################
#
# Name : RdosPutKeyboard
#
# Purpose....: Put scancode in keyboard buffer
#
##########################################################################*/
.global RdosPutKeyboard
RdosPutKeyboard:
pushl %ebp
movl %esp,%ebp
pushl %edx
movw 8(%ebp),%ax
movb 12(%ebp),%dl
movb 16(%ebp),%dh
UserGate put_keyboard_code_nr
popl %edx
leave
ret
/*##########################################################################
#
# Name : RdosPeekKeyEvent
#
# Purpose....: Peek keyboard event
#
##########################################################################*/
.global RdosPeekKeyEvent
RdosPeekKeyEvent:
pushl %ebp
movl %esp,%ebp
pushl %ecx
pushl %edx
pushl %edi
UserGate peek_key_event_nr
jc rpeFail
movl 8(%ebp),%edi
movzx %ax,%eax
movl %eax,(%edi)
movl 12(%ebp),%edi
movzx %cx,%eax
movl %eax,(%edi)
movl 16(%ebp),%edi
movzx %dl,%eax
movl %eax,(%edi)
movl 20(%ebp),%edi
movzx %dh,%eax
movl %eax,(%edi)
movl $1,%eax
jmp rpeDone
rpeFail:
xorl %eax,%eax
rpeDone:
popl %edi
popl %edx
popl %ecx
leave
ret
/*##########################################################################
#
# Name : RdosReadKeyEvent
#
# Purpose....: Read keyboard event
#
##########################################################################*/
.global RdosReadKeyEvent
RdosReadKeyEvent:
pushl %ebp
movl %esp,%ebp
pushl %ecx
pushl %edx
pushl %edi
UserGate read_key_event_nr
jc rkeFail
movl 8(%ebp),%edi
movzx %ax,%eax
movl %eax,(%edi)
movl 12(%ebp),%edi
movzx %cx,%eax
movl %eax,(%edi)
movl 16(%ebp),%edi
movzx %dl,%eax
movl %eax,(%edi)
movl 20(%ebp),%edi
movzx %dh,%eax
movl %eax,(%edi)
movl $1,%eax
jmp rkeDone
rkeFail:
xorl %eax,%eax
rkeDone:
popl %edi
popl %edx
popl %ecx
leave
ret
/*##########################################################################
#
# Name : RdosHideMouse
#
# Purpose....: Hide mouse cursor
#
##########################################################################*/
.global RdosHideMouse
RdosHideMouse:
pushl %ebp
movl %esp,%ebp
UserGate hide_mouse_nr
leave
ret
/*##########################################################################
#
# Name : RdosShowMouse
#
# Purpose....: Show mouse cursor
#
##########################################################################*/
.global RdosShowMouse
RdosShowMouse:
pushl %ebp
movl %esp,%ebp
UserGate show_mouse_nr
leave
ret
/*##########################################################################
#
# Name : RdosGetMousePosition
#
# Purpose....: Get mouse position
#
# Parameters.: &x, &y
#
##########################################################################*/
.global RdosGetMousePosition
RdosGetMousePosition:
pushl %ebp
movl %esp,%ebp
pushl %ecx
pushl %edx
UserGate get_mouse_position_nr
movl 8(%ebp),%eax
movzx %cx,%ecx
movl %ecx,(%eax)
movl 12(%ebp),%eax
movzx %dx,%edx
movl %edx,(%eax)
popl %edx
popl %ecx
leave
ret
/*##########################################################################
#
# Name : RdosSetMousePosition
#
# Purpose....: Set mouse position
#
# Parameters.: x, y
#
##########################################################################*/
.global RdosSetMousePosition
RdosSetMousePosition:
pushl %ebp
movl %esp,%ebp
pushl %ecx
pushl %edx
movw 8(%ebp),%cx
movw 12(%ebp),%dx
UserGate set_mouse_position_nr
popl %edx
popl %ecx
leave
ret
/*##########################################################################
#
# Name : RdosSetMouseWindow
#
# Purpose....: Set mouse window
#
# Parameters.: start x, start y
# end x, end y
#
##########################################################################*/
.global RdosSetMouseWindow
RdosSetMouseWindow:
pushl %ebp
movl %esp,%ebp
pushl %eax
pushl %ebx
pushl %ecx
pushl %edx
movw 8(%ebp),%ax
movw 12(%ebp),%bx
movw 16(%ebp),%cx
movw 20(%ebp),%dx
UserGate set_mouse_window_nr
popl %edx
popl %ecx
popl %ebx
popl %eax
leave
ret
/*##########################################################################
#
# Name : RdosSetMouseMickey
#
# Purpose....: Set mouse mickey
#
# Parameters.: x, y
#
##########################################################################*/
.global RdosSetMouseMickey
RdosSetMouseMickey:
pushl %ebp
movl %esp,%ebp
pushl %ecx
pushl %edx
movw 8(%ebp),%cx
movw 12(%ebp),%dx
UserGate set_mouse_mickey_nr
popl %edx
popl %ecx
leave
ret
/*##########################################################################
#
# Name : RdosGetCursorPosition
#
# Purpose....: Get cursor position
#
# Parameters.: &x, &y
#
##########################################################################*/
.global RdosGetCursorPosition
RdosGetCursorPosition:
pushl %ebp
movl %esp,%ebp
pushl %ecx
pushl %edx
UserGate get_cursor_position_nr
movl 8(%ebp),%eax
movzx %cx,%ecx
movl %ecx,(%eax)
movl 12(%ebp),%eax
movzx %dx,%edx
movl %edx,(%eax)
popl %edx
popl %ecx
leave
ret
/*##########################################################################
#
# Name : RdosSetCursorPosition
#
# Purpose....: Set cursor position
#
# Parameters.: x, y
#
##########################################################################*/
.global RdosSetCursorPosition
RdosSetCursorPosition:
pushl %ebp
movl %esp,%ebp
pushl %ecx
pushl %edx
movw 8(%ebp),%cx
movw 12(%ebp),%dx
UserGate set_cursor_position_nr
popl %edx
popl %ecx
leave
ret
/*##########################################################################
#
# Name : RdosGetLeftButton
#
# Purpose....: Check if left button is pressed
#
# Returns....: TRUE if pressed
#
##########################################################################*/
.global RdosGetLeftButton
RdosGetLeftButton:
pushl %ebp
movl %esp,%ebp
UserGate get_left_button_nr
jc get_left_rel
mov $1,%eax
jmp get_left_done
get_left_rel:
xorl %eax,%eax
get_left_done:
leave
ret
/*##########################################################################
#
# Name : RdosGetRightButton
#
# Purpose....: Check if right button is pressed
#
# Returns....: TRUE if pressed
#
##########################################################################*/
.global RdosGetRightButton
RdosGetRightButton:
pushl %ebp
movl %esp,%ebp
UserGate get_right_button_nr
jc get_right_rel
mov $1,%eax
jmp get_right_done
get_right_rel:
xorl %eax,%eax
get_right_done:
leave
ret
/*##########################################################################
#
# Name : RdosGetLeftButtonPressPosition
#
# Purpose....: Get left button press position
#
# Parameters.: &x, &y
#
##########################################################################*/
.global RdosGetLeftButtonPressPosition
RdosGetLeftButtonPressPosition:
pushl %ebp
movl %esp,%ebp
pushl %ecx
pushl %edx
UserGate get_left_button_press_position_nr
movl 8(%ebp),%eax
movzx %cx,%ecx
movl %ecx,(%eax)
movl 12(%ebp),%eax
movzx %dx,%edx
movl %edx,(%eax)
popl %edx
popl %ecx
leave
ret
/*##########################################################################
#
# Name : RdosGetRightButtonPressPosition
#
# Purpose....: Get right button press position
#
# Parameters.: &x, &y
#
##########################################################################*/
.global RdosGetRightButtonPressPosition
RdosGetRightButtonPressPosition:
pushl %ebp
movl %esp,%ebp
pushl %ecx
pushl %edx
UserGate get_right_button_press_position_nr
movl 8(%ebp),%eax
movzx %cx,%ecx
movl %ecx,(%eax)
movl 12(%ebp),%eax
movzx %dx,%edx
movl %edx,(%eax)
popl %edx
popl %ecx
leave
ret
/*##########################################################################
#
# Name : RdosGetLeftButtonReleasePosition
#
# Purpose....: Get left button release position
#
# Parameters.: &x, &y
#
##########################################################################*/
.global RdosGetLeftButtonReleasePosition
RdosGetLeftButtonReleasePosition:
pushl %ebp
movl %esp,%ebp
pushl %ecx
pushl %edx
UserGate get_left_button_release_position_nr
movl 8(%ebp),%eax
movzx %cx,%ecx
movl %ecx,(%eax)
movl 12(%ebp),%eax
movzx %dx,%edx
movl %edx,(%eax)
popl %edx
popl %ecx
leave
ret
/*##########################################################################
#
# Name : RdosGetRightButtonReleasePosition
#
# Purpose....: Get right button release position
#
# Parameters.: &x, &y
#
##########################################################################*/
.global RdosGetRightButtonReleasePosition
RdosGetRightButtonReleasePosition:
pushl %ebp
movl %esp,%ebp
pushl %ecx
pushl %edx
UserGate get_right_button_release_position_nr
movl 8(%ebp),%eax
movzx %cx,%ecx
movl %ecx,(%eax)
movl 12(%ebp),%eax
movzx %dx,%edx
movl %edx,(%eax)
popl %edx
popl %ecx
leave
ret
/*##########################################################################
#
# Name : RdosReadLine
#
# Purpose....: Read a line from keyboard
#
# Parameters.: Buffer
# Size
#
# Returns....: Read count
#
##########################################################################*/
.global RdosReadLine
RdosReadLine:
pushl %ebp
movl %esp,%ebp
pushl %ecx
pushl %edi
movl 8(%ebp),%edi
movl 12(%ebp),%ecx
UserGate read_con_nr
popl %edi
popl %ecx
leave
ret
/*##########################################################################
#
# Name : RdosWriteChar
#
# Purpose....: Write a character to screen
#
# Parameters.: Char
#
##########################################################################*/
.global RdosWriteChar
RdosWriteChar:
pushl %ebp
movl %esp,%ebp
movb 8(%ebp),%al
UserGate write_char_nr
leave
ret
/*##########################################################################
#
# Name : RdosWriteSizeString
#
# Purpose....: Write a fixed number of characters to screen
#
# Parameters.: String
# Count
#
##########################################################################*/
.global RdosWriteSizeString
RdosWriteSizeString:
pushl %ebp
movl %esp,%ebp
pushl %ecx
pushl %edi
movl 8(%ebp),%edi
movl 12(%ebp),%ecx
UserGate write_size_string_nr
popl %edi
popl %ecx
leave
ret
/*##########################################################################
#
# Name : RdosWriteString
#
# Purpose....: Write a string to screen
#
# Parameters.: String
#
##########################################################################*/
.global RdosWriteString
RdosWriteString:
pushl %ebp
movl %esp,%ebp
pushl %edi
movl 8(%ebp),%edi
UserGate write_asciiz_nr
popl %edi
leave
ret
/*##########################################################################
#
# Name : RdosNameToIp
#
# Purpose....: Convert host name to IP address
#
# Parameters.: Name
#
# Returns....: IP
#
##########################################################################*/
.global RdosNameToIp
RdosNameToIp:
pushl %ebp
movl %esp,%ebp
pushl %edi
movl 8(%ebp),%edi
UserGate name_to_ip_nr
jc rntiFail
movl %edx,%eax
jmp rntiDone
rntiFail:
xorl %eax,%eax
rntiDone:
popl %edi
leave
ret
/*##########################################################################
#
# Name : RdosGetIp
#
# Purpose....: Get my IP
#
# Returns....: IP
#
##########################################################################*/
.global RdosGetIp
RdosGetIp:
pushl %ebp
movl %esp,%ebp
UserGate get_ip_address_nr
movl %edx,%eax
leave
ret
/*##########################################################################
#
# Name : RdosIpToName
#
# Purpose....: Convert IP address to host name
#
# Parameters.: IP
# Name
# Size
#
##########################################################################*/
.global RdosIpToName
RdosIpToName:
pushl %ebp
movl %esp,%ebp
pushl %ecx
pushl %edx
pushl %edi
;
movl 8(%ebp),%edx
movl 12(%ebp),%edi
movl 16(%ebp),%ecx
UserGate ip_to_name_nr
jnc ritnDone
ritnFail:
xorl %eax,%eax
ritnDone:
popl %edi
popl %edx
popl %ecx
leave
ret
/*##########################################################################
#
# Name : RdosPing
#
# Purpose....: Ping node
#
# Parameters.: IP
# Timeout
#
##########################################################################*/
.global RdosPing
RdosPing:
pushl %ebp
movl %esp,%ebp
pushl %edx
;
movl 8(%ebp),%edx
movl 12(%ebp),%eax
UserGate ping_nr
jc ping_failed
movl $1,%eax
jmp ping_done
ping_failed:
xorl %eax,%eax
ping_done:
popl %edx
leave
ret
/*##########################################################################
#
# Name : RdosOpenTcpConnection
#
# Purpose....: Open an active connection over TCP
#
# Parameters.: RemoteIp
# LocalPort
# RemotePort
# Timeout in ms
# BufferSize
#
# Returns....: Conn handle
#
##########################################################################*/
.global RdosOpenTcpConnection
RdosOpenTcpConnection:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %esi
pushl %edi
movl 8(%ebp),%edx
movw 12(%ebp),%si
movw 16(%ebp),%di
movl 20(%ebp),%eax
movl 24(%ebp),%ecx
UserGate open_tcp_connection_nr
mov $0,%eax
jc rotcDone
movl %ebx,%eax
rotcDone:
popl %edi
popl %esi
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosCreateTcpListen
#
# Purpose....: Create listen handle
#
# Parameters.: Port
# MaxConnections
# BufferSize
#
# Returns....: Listen handle
#
##########################################################################*/
.global RdosCreateTcpListen
RdosCreateTcpListen:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %esi
movw 8(%ebp),%si
movw 12(%ebp),%ax
movl 16(%ebp),%ecx
UserGate create_tcp_listen_nr
movzx %bx,%eax
jnc ctlDone
xorl %eax,%eax
ctlDone:
popl %esi
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosGetTcpListen
#
# Purpose....: Get connection from listen
#
# Parameters.: Listen handle
#
# Returns....: Conn handle
#
##########################################################################*/
.global RdosGetTcpListen
RdosGetTcpListen:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate get_tcp_listen_nr
movzx %ax,%eax
jnc gtlDone
xorl %eax,%eax
gtlDone:
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosCloseTcpListen
#
# Purpose....: Close TCP listen
#
# Parameters.: Listen handle
#
##########################################################################*/
.global RdosCloseTcpListen
RdosCloseTcpListen:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate close_tcp_listen_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosAddWaitForTcpListen
#
# Purpose....: Add wait object to tcp listen
#
# Parameters.: Wait handle
# Listen handle
# ID
#
##########################################################################*/
.global RdosAddWaitForTcpListen
RdosAddWaitForTcpListen:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
movw 8(%ebp),%bx
movw 12(%ebp),%ax
movl 16(%ebp),%ecx
UserGate add_wait_for_tcp_listen_nr
movl $1,%eax
jnc awftlDone
xorl %eax,%eax
awftlDone:
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosWaitForTcpConnection
#
# Purpose....: Wait for Tcp connection to be established
#
# Parameters.: Conn handle
# Timeout ms
#
##########################################################################*/
.global RdosWaitForTcpConnection
RdosWaitForTcpConnection:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
movl 12(%ebp),%eax
UserGate wait_for_tcp_connection_nr
movl $1,%eax
jnc wftcDone
xorl %eax,%eax
wftcDone:
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosAddWaitForTcpConnection
#
# Purpose....: Add wait object to tcp connection
#
# Parameters.: Wait handle
# Conn handle
# ID
#
##########################################################################*/
.global RdosAddWaitForTcpConnection
RdosAddWaitForTcpConnection:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
movw 8(%ebp),%bx
movw 12(%ebp),%ax
movl 16(%ebp),%ecx
UserGate add_wait_for_tcp_connection_nr
movl $1,%eax
jnc awftcDone
xorl %eax,%eax
awftcDone:
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosCloseTcpConnection
#
# Purpose....: Close Tcp connection
#
# Parameters.: Conn handle
#
##########################################################################*/
.global RdosCloseTcpConnection
RdosCloseTcpConnection:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate close_tcp_connection_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosDeleteTcpConnection
#
# Purpose....: Delete Tcp connection
#
# Parameters.: Conn handle
#
##########################################################################*/
.global RdosDeleteTcpConnection
RdosDeleteTcpConnection:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate delete_tcp_connection_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosAbortTcpConnection
#
# Purpose....: Abort Tcp connection
#
# Parameters.: Conn handle
#
##########################################################################*/
.global RdosAbortTcpConnection
RdosAbortTcpConnection:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate abort_tcp_connection_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosPushTcpConnection
#
# Purpose....: Push Tcp connection
#
# Parameters.: Conn handle
#
##########################################################################*/
.global RdosPushTcpConnection
RdosPushTcpConnection:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate push_tcp_connection_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosPollTcpConnection
#
# Purpose....: Poll Tcp connection
#
# Parameters.: Conn handle
#
# Returns....: Available bytes in receive buffer
#
##########################################################################*/
.global RdosPollTcpConnection
RdosPollTcpConnection:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate poll_tcp_connection_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosIsTcpConnectionClosed
#
# Purpose....: Check if connection is closed
#
# Parameters.: Conn handle
#
# Returns....: TRUE if closed
#
##########################################################################*/
.global RdosIsTcpConnectionClosed
RdosIsTcpConnectionClosed:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate is_tcp_connection_closed_nr
jc rptcClosed
xorl %eax,%eax
jmp rptcDone
rptcClosed:
movl $1,%eax
rptcDone:
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosGetRemoteTcpConnectionIp
#
# Purpose....: Get remote IP
#
# Parameters.: Conn handle
#
# Returns....: IP
#
##########################################################################*/
.global RdosGetRemoteTcpConnectionIp
RdosGetRemoteTcpConnectionIp:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate get_remote_tcp_connection_ip_nr
jnc grtciDone
movl $0xFFFFFFFF,%eax
grtciDone:
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosGetRemoteTcpConnectionPort
#
# Purpose....: Get remote port
#
# Parameters.: Conn handle
#
# Returns....: Port
#
##########################################################################*/
.global RdosGetRemoteTcpConnectionPort
RdosGetRemoteTcpConnectionPort:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate get_remote_tcp_connection_port_nr
jnc grtcpDone
movl $0,%eax
grtcpDone:
movzx %ax,%eax
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosGetLocalTcpConnectionPort
#
# Purpose....: Get local port
#
# Parameters.: Conn handle
#
# Returns....: Port
#
##########################################################################*/
.global RdosGetLocalTcpConnectionPort
RdosGetLocalTcpConnectionPort:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movw 8(%ebp),%bx
UserGate get_local_tcp_connection_port_nr
jnc gltcpDone
movl $0,%eax
gltcpDone:
movzx %ax,%eax
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosReadTcpConnection
#
# Purpose....: Read data from connection
#
# Parameters.: Conn handle
# Buffer
# Size
#
# Returns....: Read bytes
#
##########################################################################*/
.global RdosReadTcpConnection
RdosReadTcpConnection:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
pushl %edi
movw 8(%ebp),%bx
movl 12(%ebp),%edi
movl 16(%ebp),%ecx
UserGate read_tcp_connection_nr
popl %edi
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosWriteTcpConnection
#
# Purpose....: Write data fto connection
#
# Parameters.: Conn handle
# Buffer
# Size
#
# Returns....: Written bytes
#
##########################################################################*/
.global RdosWriteTcpConnection
RdosWriteTcpConnection:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
pushl %edi
movw 8(%ebp),%bx
movl 12(%ebp),%edi
movl 16(%ebp),%ecx
UserGate write_tcp_connection_nr
popl %edi
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosGetLocalMailslot
#
# Purpose....: Get local mailslot from name
#
# Parameters.: Name
#
# Returns....: Mailslot handle
#
##########################################################################*/
.global RdosGetLocalMailslot
RdosGetLocalMailslot:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %edi
movl 8(%ebp),%edi
UserGate get_local_mailslot_nr
jc rglmFail
movzx %bx,%eax
jmp rglmDone
rglmFail:
xorl %eax,%eax
rglmDone:
popl %edi
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosGetRemoteMailslot
#
# Purpose....: Get remote mailslot from name
#
# Parameters.: IP
# Name
#
# Returns....: Mailslot handle
#
##########################################################################*/
.global RdosGetRemoteMailslot
RdosGetRemoteMailslot:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %edx
pushl %edi
movl 8(%ebp),%edx
movl 12(%ebp),%edi
UserGate get_remote_mailslot_nr
jc rgrmFail
movzx %bx,%eax
jmp rgrmDone
rgrmFail:
xorl %eax,%eax
rgrmDone:
popl %edi
popl %edx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosFreeMailslot
#
# Purpose....: Free mailslot
#
# Parameters.: Mailslot handle
#
##########################################################################*/
.global RdosFreeMailslot
RdosFreeMailslot:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movl 8(%ebp),%ebx
UserGate free_mailslot_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosSendMailslot
#
# Purpose....: Send mailslot
#
# Parameters.: Mailslot handle
# Msg
# Size
# ReplyBuf
# MaxReplySize
#
# Returns....: Size of reply
#
##########################################################################*/
.global RdosSendMailslot
RdosSendMailslot:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %esi
pushl %edi
movw 8(%ebp),%bx
movl 12(%ebp),%esi
movl 16(%ebp),%ecx
movl 20(%ebp),%edi
movl 24(%ebp),%eax
UserGate send_mailslot_nr
jc smFail
movl %ecx,%eax
jmp smDone
smFail:
movl $0xFFFFFFFF,%eax
smDone:
popl %edi
popl %esi
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosDefineMailslot
#
# Purpose....: Define mailslot
#
# Parameters.: Name
# Max msg size
#
##########################################################################*/
.global RdosDefineMailslot
RdosDefineMailslot:
pushl %ebp
movl %esp,%ebp
pushl %ecx
pushl %edi
movl 8(%ebp),%edi
movl 12(%ebp),%ecx
UserGate define_mailslot_nr
popl %edi
popl %ecx
leave
ret
/*##########################################################################
#
# Name : RdosReceiveMailslot
#
# Purpose....: Receive from mailslot
#
# Parameters.: Msg buffer
#
# Returns....: Msg size
#
##########################################################################*/
.global RdosReceiveMailslot
RdosReceiveMailslot:
pushl %ebp
movl %esp,%ebp
pushl %ecx
pushl %edi
movl 8(%ebp),%edi
UserGate receive_mailslot_nr
movl %ecx,%eax
popl %edi
popl %ecx
leave
ret
/*##########################################################################
#
# Name : RdosReplyMailslot
#
# Purpose....: Reply to mailslot
#
# Parameters.: Msg buffer
# Msg size
#
##########################################################################*/
.global RdosReplyMailslot
RdosReplyMailslot:
pushl %ebp
movl %esp,%ebp
pushl %ecx
pushl %edi
movl 8(%ebp),%edi
movl 12(%ebp),%ecx
UserGate reply_mailslot_nr
popl %edi
popl %ecx
leave
ret
/*##########################################################################
#
# Name : RdosGetIdeDisc
#
# Purpose....: Get IDE disc
#
# Parameters.: Unit #
#
# Returns....: Disc #
#
##########################################################################*/
.global RdosGetIdeDisc
RdosGetIdeDisc:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movb 8(%ebp),%bl
UserGate get_ide_disc_nr
jc get_ide_disc_fail
movzx %al,%eax
jmp get_ide_disc_done
get_ide_disc_fail:
movl $0xFFFFFFFF,%eax
get_ide_disc_done:
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosGetFloppyDisc
#
# Purpose....: Get floppy disc
#
# Parameters.: Unit #
#
# Returns....: Disc #
#
##########################################################################*/
.global RdosGetFloppyDisc
RdosGetFloppyDisc:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movb 8(%ebp),%bl
UserGate get_floppy_disc_nr
jc get_floppy_disc_fail
movzx %al,%eax
jmp get_floppy_disc_done
get_floppy_disc_fail:
movl $0xFFFFFFFF,%eax
get_floppy_disc_done:
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosGetDiscInfo
#
# Purpose....: Get disc info
#
# Parameters.: Disc #
# Bytes / sector
# Total sectors
# BIOS sectors / cyl
# BIOS heads
#
# Returns....: TRUE if ok
#
##########################################################################*/
.global RdosGetDiscInfo
RdosGetDiscInfo:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
pushl %edx
pushl %esi
pushl %edi
movb 8(%ebp),%al
UserGate get_disc_info_nr
jc get_disc_info_fail
movl 12(%ebp),%ebx
movzx %cx,%ecx
movl %ecx,(%ebx)
movl 16(%ebp),%ebx
movl %edx,(%ebx)
movl 20(%ebp),%ebx
movzx %si,%esi
movl %esi,(%ebx)
movl 24(%ebp),%ebx
movzx %di,%edi
movl %edi,(%ebx)
movl $1,%eax
jmp get_disc_info_done
get_disc_info_fail:
xorl %eax,%eax
get_disc_info_done:
popl %edi
popl %esi
popl %edx
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosSetDiscInfo
#
# Purpose....: Set disc info
#
# Parameters.: Disc #
# Bytes / sector
# Total sectors
# BIOS sectors / cyl
# BIOS heads
#
# Returns....: TRUE if ok
#
##########################################################################*/
.global RdosSetDiscInfo
RdosSetDiscInfo:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
pushl %edx
pushl %esi
pushl %edi
movb 8(%ebp),%al
movl 12(%ebp),%ecx
movl 16(%ebp),%edx
movl 20(%ebp),%esi
movl 24(%ebp),%edi
UserGate set_disc_info_nr
jc set_disc_info_fail
movl $1,%eax
jmp set_disc_info_done
set_disc_info_fail:
xorl %eax,%eax
set_disc_info_done:
popl %edi
popl %esi
popl %edx
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosReadDisc
#
# Purpose....: Read from disc
#
# Parameters.: Disc #
# Sector #
# Buffer
# Size
#
# Returns....: TRUE if ok
#
##########################################################################*/
.global RdosReadDisc
RdosReadDisc:
pushl %ebp
movl %esp,%ebp
pushl %ecx
pushl %edx
pushl %edi
movb 8(%ebp),%al
movl 12(%ebp),%edx
movl 16(%ebp),%edi
movl 20(%ebp),%ecx
UserGate read_disc_nr
jc read_disc_fail
movl $1,%eax
jmp read_disc_done
read_disc_fail:
xorl %eax,%eax
read_disc_done:
popl %edi
popl %edx
popl %ecx
leave
ret
/*##########################################################################
#
# Name : RdosWriteDisc
#
# Purpose....: Write to disc
#
# Parameters.: Disc #
# Sector #
# Buffer
# Size
#
# Returns....: TRUE if ok
#
##########################################################################*/
.global RdosWriteDisc
RdosWriteDisc:
pushl %ebp
movl %esp,%ebp
pushl %ecx
pushl %edx
pushl %edi
movb 8(%ebp),%al
movl 12(%ebp),%edx
movl 16(%ebp),%edi
movl 20(%ebp),%ecx
UserGate write_disc_nr
jc write_disc_fail
movl $1,%eax
jmp write_disc_done
write_disc_fail:
xorl %eax,%eax
write_disc_done:
popl %edi
popl %edx
popl %ecx
leave
ret
/*##########################################################################
#
# Name : RdosAllocateFixedDrive
#
# Purpose....: Allocate fixed drive
#
# Parameters.: Drive #
#
# Returns....: TRUE if ok
#
##########################################################################*/
.global RdosAllocateFixedDrive
RdosAllocateFixedDrive:
pushl %ebp
movl %esp,%ebp
movb 8(%ebp),%al
UserGate allocate_fixed_drive_nr
jc allocate_fixed_drive_fail
movl $1,%eax
jmp allocate_fixed_drive_done
allocate_fixed_drive_fail:
xorl %eax,%eax
allocate_fixed_drive_done:
leave
ret
/*##########################################################################
#
# Name : RdosAllocateStaticDrive
#
# Purpose....: Allocate static drive
#
# Returns....: Drive #
#
##########################################################################*/
.global RdosAllocateStaticDrive
RdosAllocateStaticDrive:
pushl %ebp
movl %esp,%ebp
UserGate allocate_static_drive_nr
jc allocate_static_drive_fail
movzx %al,%eax
jmp allocate_static_drive_done
allocate_static_drive_fail:
xorl %eax,%eax
allocate_static_drive_done:
leave
ret
/*##########################################################################
#
# Name : RdosAllocateDynamicDrive
#
# Purpose....: Allocate dynamic drive
#
# Returns....: Drive #
#
##########################################################################*/
.global RdosAllocateDynamicDrive
RdosAllocateDynamicDrive:
pushl %ebp
movl %esp,%ebp
UserGate allocate_dynamic_drive_nr
jc allocate_dynamic_drive_fail
movzx %al,%eax
jmp allocate_dynamic_drive_done
allocate_dynamic_drive_fail:
xorl %eax,%eax
allocate_dynamic_drive_done:
leave
ret
/*##########################################################################
#
# Name : RdosGetRdfsInfo
#
# Purpose....: Get rdfs info
#
# Parameters.: Crypt tab
# Key tab
# Extent size tab
#
##########################################################################*/
.global RdosGetRdfsInfo
RdosGetRdfsInfo:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %esi
pushl %edi
movl 8(%ebp),%esi
movl 12(%ebp),%edi
movl 16(%ebp),%ebx
UserGate get_rdfs_info_nr
popl %edi
popl %esi
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosGetDriveInfo
#
# Purpose....: Get drive info
#
# Parameters.: Drive #
# Free units
# Bytes per unit
# Total units
#
# Returns....: TRUE if ok
#
##########################################################################*/
.global RdosGetDriveInfo
RdosGetDriveInfo:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
pushl %edx
movb 8(%ebp),%al
UserGate get_drive_info_nr
jc get_drive_info_fail
movl 12(%ebp),%ebx
movl %eax,(%ebx)
movl 16(%ebp),%ebx
movzx %cx,%ecx
movl %ecx,(%ebx)
movl 20(%ebp),%ebx
movl %edx,(%ebx)
movl $1,%eax
jmp get_drive_info_done
get_drive_info_fail:
xorl %eax,%eax
get_drive_info_done:
popl %edx
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosDemandLoadDrive
#
# Purpose....: Demand load drive
#
# Parameters.: Drive #
#
##########################################################################*/
.global RdosDemandLoadDrive
RdosDemandLoadDrive:
pushl %ebp
movl %esp,%ebp
movb 8(%ebp),%al
UserGate demand_load_drive_nr
leave
ret
/*##########################################################################
#
# Name : RdosGetDriveDiscParam
#
# Purpose....: Get drive disc parameters
#
# Parameters.: Drive #
# Disc #
# Start sector
# Total sectors
#
# Returns....: TRUE if ok
#
##########################################################################*/
.global RdosGetDriveDiscParam
RdosGetDriveDiscParam:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
pushl %edx
movb 8(%ebp),%al
UserGate get_drive_disc_param_nr
jc get_drive_disc_param_fail
movl 12(%ebp),%ebx
movzx %al,%eax
movl %eax,(%ebx)
movl 16(%ebp),%ebx
movl %edx,(%ebx)
movl 20(%ebp),%ebx
movl %ecx,(%ebx)
movl $1,%eax
jmp get_drive_disc_param_done
get_drive_disc_param_fail:
xorl %eax,%eax
get_drive_disc_param_done:
popl %edx
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosFormatDrive
#
# Purpose....: Format drive
#
# Parameters.: Disc #
# Start sector
# Sectors
# FS name
#
# Returns....: Drive #
#
##########################################################################*/
.global RdosFormatDrive
RdosFormatDrive:
pushl %ebp
movl %esp,%ebp
pushl %ecx
pushl %edx
pushl %edi
movb 8(%ebp),%al
movl 12(%ebp),%edx
movl 16(%ebp),%ecx
movl 20(%ebp),%edi
UserGate format_drive_nr
jc rfdFail
movzx %al,%eax
jmp rfdDone
rfdFail:
xorl %eax,%eax
rfdDone:
popl %edi
popl %edx
popl %ecx
leave
ret
/*##########################################################################
#
# Name : RdosGetExeName
#
# Purpose....: Get name of executable file
#
# Returns....: Exe pathname
#
##########################################################################*/
.global RdosGetExeName
RdosGetExeName:
pushl %ebp
movl %esp,%ebp
pushl %edi
UserGate get_exe_name_nr
jc rgenFail
movl %edi,%eax
jmp rgenDone
rgenFail:
xorl %eax,%eax
rgenDone:
popl %edi
leave
ret
/*##########################################################################
#
# Name : RdosOpenAdc
#
# Purpose....: Open handle to ADC channel
#
# Parameters.: Channel #
#
# Returns....: Adc handle
#
##########################################################################*/
.global RdosOpenAdc
RdosOpenAdc:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movl 8(%ebp),%eax
UserGate open_adc_nr
movw %bx,%ax
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosCloseAdc
#
# Purpose....: Close ADC handle
#
# Parameters.: Adc handle
#
##########################################################################*/
.global RdosCloseAdc
RdosCloseAdc:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movl 8(%ebp),%ebx
UserGate close_adc_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosDefineAdcTime
#
# Purpose....: Define time of next conversion
#
# Parameters.: Adc handle
# MSB time
# LSB time
#
##########################################################################*/
.global RdosDefineAdcTime
RdosDefineAdcTime:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %edx
movl 8(%ebp),%ebx
movl 12(%ebp),%edx
movl 16(%ebp),%eax
UserGate define_adc_time_nr
popl %edx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosReadAdc
#
# Purpose....: Read ADC
#
# Parameters.: Adc handle
#
# Returns....: Value
#
##########################################################################*/
.global RdosReadAdc
RdosReadAdc:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movl 8(%ebp),%ebx
UserGate read_adc_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosReadSerialLines
#
# Purpose....: Read serial lines
#
# Parameters.: Device
# &Value
#
# Returns....: TRUE if ok
#
##########################################################################*/
.global RdosReadSerialLines
RdosReadSerialLines:
pushl %ebp
movl %esp,%ebp
pushl %edx
pushl %esi
movb 8(%ebp),%dh
UserGate read_serial_lines_nr
jc rdsFail
movzx %al,%eax
movl 12(%ebp),%esi
movl %eax,(%esi)
movl $1,%eax
jmp rdsDone
rdsFail:
xorl %eax,%eax
rdsDone:
popl %esi
popl %edx
leave
ret
/*##########################################################################
#
# Name : RdosToggleSerialLine
#
# Purpose....: Toggle serial line
#
# Parameters.: Device
# Line
#
# Returns....: TRUE if ok
#
##########################################################################*/
.global RdosToggleSerialLine
RdosToggleSerialLine:
pushl %ebp
movl %esp,%ebp
pushl %edx
movb 8(%ebp),%dh
movb 12(%ebp),%dl
UserGate toggle_serial_line_nr
jc rtsFail
movl $1,%eax
jmp rtsDone
rtsFail:
xorl %eax,%eax
rtsDone:
popl %edx
leave
ret
/*##########################################################################
#
# Name : RdosReadSerialVal
#
# Purpose....: Read serial value
#
# Parameters.: Device
# Line
# &Val
#
# Returns....: TRUE if ok
#
##########################################################################*/
.global RdosReadSerialVal
RdosReadSerialVal:
pushl %ebp
movl %esp,%ebp
pushl %edx
pushl %esi
movb 8(%ebp),%dh
movb 12(%ebp),%dl
UserGate read_serial_val_nr
pushfw
shll $8,%eax
movl 16(%ebp),%esi
movl %eax,(%esi)
popfw
jc rdvFail
movl $1,%eax
jmp rdvDone
rdvFail:
xorl %eax,%eax
rdvDone:
popl %esi
popl %edx
leave
ret
/*##########################################################################
#
# Name : RdosWriteSerialVal
#
# Purpose....: Write serial value
#
# Parameters.: Device
# Line
# Val
#
# Returns....: TRUE if ok
#
##########################################################################*/
.global RdosWriteSerialVal
RdosWriteSerialVal:
pushl %ebp
movl %esp,%ebp
pushl %edx
movb 8(%ebp),%dh
movb 12(%ebp),%dl
movl 16(%ebp),%eax
sarl $8,%eax
UserGate write_serial_val_nr
jc rwvFail
movl $1,%eax
jmp rwvDone
rwvFail:
xorl %eax,%eax
rwvDone:
popl %edx
leave
ret
/*##########################################################################
#
# Name : RdosReadSerialRaw
#
# Purpose....: Read serial raw value
#
# Parameters.: Device
# Line
# &Val
#
# Returns....: TRUE if ok
#
##########################################################################*/
.global RdosReadSerialRaw
RdosReadSerialRaw:
pushl %ebp
movl %esp,%ebp
pushl %edx
pushl %esi
movb 8(%ebp),%dh
movb 12(%ebp),%dl
UserGate read_serial_val_nr
pushfw
movl 16(%ebp),%esi
movl %eax,(%esi)
popfw
jc rdrFail
movl $1,%eax
jmp rdrDone
rdrFail:
xorl %eax,%eax
rdrDone:
popl %esi
popl %edx
leave
ret
/*##########################################################################
#
# Name : RdosWriteSerialRaw
#
# Purpose....: Write serial raw value
#
# Parameters.: Device
# Line
# Val
#
# Returns....: TRUE if ok
#
##########################################################################*/
.global RdosWriteSerialRaw
RdosWriteSerialRaw:
pushl %ebp
movl %esp,%ebp
pushl %edx
movb 8(%ebp),%dh
movb 12(%ebp),%dl
movl 16(%ebp),%eax
UserGate write_serial_val_nr
jc rwrFail
movl $1,%eax
jmp rwrDone
rwrFail:
xorl %eax,%eax
rwrDone:
popl %edx
leave
ret
/*##########################################################################
#
# Name : RdosOpenSysEnv
#
# Purpose....: Open system environment
#
# Returns....: Env handle
#
##########################################################################*/
.global RdosOpenSysEnv
RdosOpenSysEnv:
pushl %ebp
movl %esp,%ebp
pushl %ebx
UserGate open_sys_env_nr
jc oseFail
movzx %bx,%eax
jmp oseDone
oseFail:
xorl %eax,%eax
oseDone:
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosOpenProcessEnv
#
# Purpose....: Open process environment
#
# Returns....: Env handle
#
##########################################################################*/
.global RdosOpenProcessEnv
RdosOpenProcessEnv:
pushl %ebp
movl %esp,%ebp
pushl %ebx
UserGate open_proc_env_nr
jc opeFail
movzx %bx,%eax
jmp opeDone
opeFail:
xorl %eax,%eax
opeDone:
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosCloseEnv
#
# Purpose....: Close environment
#
# Parameters.: Env handle
#
##########################################################################*/
.global RdosCloseEnv
RdosCloseEnv:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movl 8(%ebp),%ebx
UserGate close_env_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosAddEnvVar
#
# Purpose....: Add environment variable
#
# Parameters.: Env handle
# var
# data
#
##########################################################################*/
.global RdosAddEnvVar
RdosAddEnvVar:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %esi
pushl %edi
movl 8(%ebp),%ebx
movl 12(%ebp),%esi
movl 16(%ebp),%edi
UserGate add_env_var_nr
popl %edi
popl %esi
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosDeleteEnvVar
#
# Purpose....: Delete environment variable
#
# Parameters.: Env handle
# var
#
##########################################################################*/
.global RdosDeleteEnvVar
RdosDeleteEnvVar:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %esi
movl 8(%ebp),%ebx
movl 12(%ebp),%esi
UserGate delete_env_var_nr
popl %esi
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosFindEnvVar
#
# Purpose....: Find environment variable
#
# Parameters.: Env handle
# var
# data
#
##########################################################################*/
.global RdosFindEnvVar
RdosFindEnvVar:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %esi
pushl %edi
movl 8(%ebp),%ebx
movl 12(%ebp),%esi
movl 16(%ebp),%edi
UserGate find_env_var_nr
jc fevFail
movl $1,%eax
jmp fevDone
fevFail:
xorl %eax,%eax
fevDone:
popl %edi
popl %esi
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosGetEnvData
#
# Purpose....: Get raw environment data
#
# Parameters.: Env handle
# data
#
##########################################################################*/
.global RdosGetEnvData
RdosGetEnvData:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %edi
movl 8(%ebp),%ebx
movl 12(%ebp),%edi
UserGate get_env_data_nr
jnc gedDone
xorw %ax,%ax
stosw
gedDone:
popl %edi
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosSetEnvData
#
# Purpose....: Set raw environment data
#
# Parameters.: Env handle
# data
#
##########################################################################*/
.global RdosSetEnvData
RdosSetEnvData:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %edi
movl 8(%ebp),%ebx
movl 12(%ebp),%edi
UserGate set_env_data_nr
popl %edi
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosOpenSysIni
#
# Purpose....: Open system ini-file
#
# Returns....: Ini handle
#
##########################################################################*/
.global RdosOpenSysIni
RdosOpenSysIni:
pushl %ebp
movl %esp,%ebp
pushl %ebx
UserGate open_sys_ini_nr
jc osiFail
movzx %bx,%eax
jmp osiDone
osiFail:
xorl %eax,%eax
osiDone:
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosCloseIni
#
# Purpose....: Close ini-file
#
# Parameters.: Ini handle
#
##########################################################################*/
.global RdosCloseIni
RdosCloseIni:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movl 8(%ebp),%ebx
UserGate close_ini_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosGotoIniSection
#
# Purpose....: Goto ini section
#
# Parameters.: Ini handle
# SectionName
#
##########################################################################*/
.global RdosGotoIniSection
RdosGotoIniSection:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %edi
movl 8(%ebp),%ebx
movl 12(%ebp),%edi
UserGate goto_ini_section_nr
jc gisFail
movl $1,%eax
jmp gisDone
gisFail:
xorl %eax,%eax
gisDone:
popl %edi
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosRemoveIniSection
#
# Purpose....: Remove current ini section
#
# Parameters.: Ini handle
#
##########################################################################*/
.global RdosRemoveIniSection
RdosRemoveIniSection:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movl 8(%ebp),%ebx
UserGate remove_ini_section_nr
jc risFail
movl $1,%eax
jmp risDone
risFail:
xorl %eax,%eax
risDone:
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosReadIni
#
# Purpose....: Read ini var in current section
#
# Parameters.: Ini handle
# VarName
# Data
# MaxSize
#
##########################################################################*/
.global RdosReadIni
RdosReadIni:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
pushl %esi
pushl %edi
movl 8(%ebp),%ebx
movl 12(%ebp),%esi
movl 16(%ebp),%edi
movl 20(%ebp),%ecx
UserGate read_ini_nr
jc riFail
movl $1,%eax
jmp riDone
riFail:
xorl %eax,%eax
riDone:
popl %edi
popl %esi
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosWriteIni
#
# Purpose....: Write ini var in current section
#
# Parameters.: Ini handle
# VarName
# Data
#
##########################################################################*/
.global RdosWriteIni
RdosWriteIni:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %esi
pushl %edi
movl 8(%ebp),%ebx
movl 12(%ebp),%esi
movl 16(%ebp),%edi
UserGate write_ini_nr
jc wiFail
movl $1,%eax
jmp wiDone
wiFail:
xorl %eax,%eax
wiDone:
popl %edi
popl %esi
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosDeleteIni
#
# Purpose....: Delete ini var in current section
#
# Parameters.: Ini handle
# VarName
#
##########################################################################*/
.global RdosDeleteIni
RdosDeleteIni:
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %esi
movl 8(%ebp),%ebx
movl 12(%ebp),%esi
UserGate delete_ini_nr
jc diFail
movl $1,%eax
jmp diDone
diFail:
xorl %eax,%eax
diDone:
popl %esi
popl %ebx
leave
ret
/*##########################################################################
#
# Name : RdosCreateFileDrive
#
# Purpose....: Create a new file-drive
#
# Parameters.: Drive
# Size
# FS name
# Filename
#
##########################################################################*/
.global RdosCreateFileDrive
RdosCreateFileDrive:
pushl %ebp
movl %esp,%ebp
pushl %ecx
pushl %esi
pushl %edi
movb 8(%ebp),%al
movl 12(%ebp),%ecx
movl 16(%ebp),%esi
movl 20(%ebp),%edi
UserGate create_file_drive_nr
jnc cfdOk
xorl %eax,%eax
jmp cfdDone
cfdOk:
movl $1,%eax
cfdDone:
popl %edi
popl %esi
popl %ecx
leave
ret
/*##########################################################################
#
# Name : RdosOpenFileDrive
#
# Purpose....: Open a new file-drive
#
# Parameters.: Drive
# Filename
#
##########################################################################*/
.global RdosOpenFileDrive
RdosOpenFileDrive:
pushl %ebp
movl %esp,%ebp
pushl %edi
movb 8(%ebp),%al
movl 12(%ebp),%edi
UserGate open_file_drive_nr
jnc ofdOk
xorl %eax,%eax
jmp ofdDone
ofdOk:
movl $1,%eax
ofdDone:
popl %edi
leave
ret
/*##########################################################################
#
# Name : RdosEnableStatusLed
#
# Purpose....: Enable status LED
#
##########################################################################*/
.global RdosEnableStatusLed
RdosEnableStatusLed:
pushl %ebp
movl %esp,%ebp
UserGate enable_status_led_nr
leave
ret
/*##########################################################################
#
# Name : RdosDisableStatusLed
#
# Purpose....: Disable status LED
#
##########################################################################*/
.global RdosDisableStatusLed
RdosDisableStatusLed:
pushl %ebp
movl %esp,%ebp
UserGate disable_status_led_nr
leave
ret
/*##########################################################################
#
# Name : RdosStartWatchdog
#
# Purpose....: Start watchdog
#
# Parameters.: Timeout, ms
#
##########################################################################*/
.global RdosStartWatchdog
RdosStartWatchdog:
pushl %ebp
movl %esp,%ebp
;
movl 8(%ebp),%eax
UserGate start_watchdog_nr
;
leave
ret
/*##########################################################################
#
# Name : RdosKickWatchdog
#
# Purpose....: Kick watchdog
#
##########################################################################*/
.global RdosKickWatchdog
RdosKickWatchdog:
pushl %ebp
movl %esp,%ebp
UserGate kick_watchdog_nr
leave
ret
|
4ms/metamodule-plugin-sdk
| 7,258
|
plugin-libc/newlib/libc/sys/rdos/crt0.S
|
/*#######################################################################
# RDOS operating system
# Copyright (C) 1988-2006, Leif Ekblad
#
# This library is free software; you can redistribute it and/or modify
# it under the terms of the GNU Lesser General Public License as published
# by the Free Software Foundation; either version 2.1 of the License, or
# (at your option) any later version.
#
# This library is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU Lesser General Public License for more details.
#
# You should have received a copy of the GNU Lesser General Public
# License along with this library; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
#
# The author of this program may be contacted at leif@rdos.net
#
# crt0.S
# GCC startupcode for RDOS
#
##########################################################################*/
#include "user.def"
KEY_ENTRIES = 256
.macro UserGate nr
.byte 0x9A
.long \nr
.word 2
.endm
.data
.align 8
_key_section:
.word 0
_key_ref_arr:
.long 0
_key_dtor_arr:
.long 0
.text
.align 4
/*##########################################################################
#
# Name : _start
#
# Purpose....: GCC startup-code
#
##########################################################################*/
.global _start
_start:
call get_impure_data_size
movl %eax,%ecx
UserGate allocate_app_mem_nr
xorl %eax,%eax
.byte 0x64
movl %edx,(%eax)
movl %edx,%edi
rep
stosb
pushl %edx
movl $(4 * KEY_ENTRIES),%eax
movl %eax,%ecx
UserGate allocate_app_mem_nr
movl $4,%eax
.byte 0x64
movl %edx,(%eax)
movl %edx,%edi
xorl %eax,%eax
rep
stosb
movl $(4 * KEY_ENTRIES),%eax
movl %eax,%ecx
UserGate allocate_app_mem_nr
movl %edx,_key_ref_arr
movl %edx,%edi
xorl %eax,%eax
rep
stosb
movl $(4 * KEY_ENTRIES),%eax
movl %eax,%ecx
UserGate allocate_app_mem_nr
movl %edx,_key_dtor_arr
movl %edx,%edi
xorl %eax,%eax
rep
stosb
UserGate create_user_section_nr
movw %bx,_key_section
call __init_rdos
add $4, %esp
movl $0x1000,%eax
UserGate allocate_app_mem_nr
pushl %edx
UserGate get_cmd_line_nr
xorl %ecx,%ecx
xorb %ah,%ah
arg_loop:
movl %edi,(%edx)
addl $4,%edx
movb (%edi),%al
orb %al,%al
je arg_done
arg_scan:
movb (%edi),%al
orb %al,%al
je next_arg
cmpb $0x22,%al
jne arg_no_quote
xorb $1,%ah
jmp arg_scan_next
arg_no_quote:
orb %ah,%ah
jnz arg_scan_next
cmpb $0x20,%al
je next_arg
cmpb $0x8,%al
je next_arg
arg_scan_next:
incl %edi
jmp arg_scan
next_arg:
incl %ecx
to_next_arg:
orb %al,%al
je arg_done
xorb %al,%al
movb %al,(%edi)
incl %edi
movb (%edi),%al
cmpb $0x20,%al
je to_next_arg
cmpb $0x8,%al
je to_next_arg
jmp arg_loop
arg_done:
int $3
pushl %ecx
call main
add $8, %esp
pushl %eax
call exit
/*##########################################################################
#
# Name : _exit
#
# Purpose....: GCC exit-code
#
##########################################################################*/
.global _exit
_exit:
pushl %ebp
movl %esp,%ebp
movl 8(%ebp),%eax
UserGate unload_exe_nr
/*##########################################################################
#
# Name : __getreent
#
# Purpose....: ?
#
##########################################################################*/
.global __getreent
__getreent:
xorl %eax,%eax
.byte 0x64
movl (%eax),%eax
ret
/*##########################################################################
#
# Name : __rdos_thread_key_create
#
# Purpose....: Emulate GCC pthread_key_create
#
# Parameters.: dtor
#
# Returns....: Key index
#
##########################################################################*/
.global __rdos_thread_key_create
__rdos_thread_key_create:
int $3
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
mov _key_section,%bx
UserGate enter_user_section_nr
movl _key_ref_arr,%ebx
movl KEY_ENTRIES,%ecx
rtkc_scan_loop:
movl (%ebx), %eax
orl %eax, %eax
jz rtkc_entry_found
add $4, %ebx
loop rtkc_scan_loop
movl $-1, %eax
jmp rtkc_leave
rtkc_entry_found:
movb $255,3(%ebx)
subl _key_ref_arr,%ebx
addl _key_dtor_arr,%ebx
movl 8(%ebp),%eax
movl %eax,(%ebx)
subl _key_dtor_arr,%ebx
movl %ebx,%eax
rtkc_leave:
mov _key_section, %bx
UserGate leave_user_section_nr
popl %ecx
popl %ebx
leave
ret
/*##########################################################################
#
# Name : __rdos_thread_key_delete
#
# Purpose....: Emulate GCC pthread_key_delete
#
# Parameters.: index
#
# Returns....: result
#
##########################################################################*/
.global __rdos_thread_key_delete
__rdos_thread_key_delete:
int $3
pushl %ebp
movl %esp,%ebp
pushl %ebx
mov _key_section,%bx
UserGate enter_user_section_nr
movl 8(%ebp),%ebx
testb $3,%bl
jnz rtkd_fail
cmpl $(4 * KEY_ENTRIES),%ebx
jae rtkd_fail
addl _key_ref_arr,%ebx
movb $0,3(%ebx)
mov (%ebx),%eax
orl %eax,%eax
jz rtkd_ok
subl _key_ref_arr,%ebx
movl $0,(%ebx)
jmp rtkd_ok
rtkd_fail:
movl $1,%eax
jmp rtkd_leave
rtkd_ok:
xorl %eax,%eax
rtkd_leave:
mov _key_section, %bx
UserGate leave_user_section_nr
popl %ebx
leave
ret
/*##########################################################################
#
# Name : __rdos_thread_getspecific
#
# Purpose....: Emulate GCC pthread_getspecific
#
# Parameters.: index
#
# Returns....: value
#
##########################################################################*/
.global __rdos_thread_getspecific
__rdos_thread_getspecific:
int $3
pushl %ebp
movl %esp,%ebp
pushl %ebx
movl 8(%ebp),%ebx
testb $3,%bl
jnz rtg_fail
cmpl $(4 * KEY_ENTRIES),%ebx
jae rtg_fail
movl $4,%eax
.byte 0x64
movl (%eax),%eax
addl %eax,%ebx
movl (%ebx),%eax
jmp rtg_done
rtg_fail:
xorl %eax,%eax
rtg_done:
popl %ebx
leave
ret
/*##########################################################################
#
# Name : __rdos_thread_setspecific
#
# Purpose....: Emulate GCC pthread_setspecific
#
# Parameters.: index
# value
#
##########################################################################*/
.global __rdos_thread_setspecific
__rdos_thread_setspecific:
int $3
pushl %ebp
movl %esp,%ebp
pushl %ebx
pushl %ecx
movl 8(%ebp),%ebx
testb $3,%bl
jnz rts_fail
cmpl $(4 * KEY_ENTRIES),%ebx
jae rts_fail
movl $4,%eax
.byte 0x64
movl (%eax),%eax
addl %eax,%ebx
movl 12(%ebp),%eax
movl %eax,(%ebx)
xorl %eax,%eax
jmp rts_done
rts_fail:
movl $1,%eax
rts_done:
popl %ebx
leave
ret
|
4ms/metamodule-plugin-sdk
| 1,590
|
plugin-libc/newlib/libc/sys/sysnecv850/crt0.S
|
# NEC V850 startup code
.section .text
.global _start
_start:
#if defined(__v850e__) || defined(__v850e2__) || defined(__v850e2v3__) || defined(__v850e3v5__)
movea 255, r0, r20
mov 65535, r21
mov hilo(_stack), sp
mov hilo(__ep), ep
mov hilo(__gp), gp
mov hilo(__ctbp), r6
ldsr r6, ctbp
#if defined(__v850e2v3__) || defined(__v850e3v5__)
// FPU enable
stsr psw, r6
movhi 1, r0, r7
or r7, r6
ldsr r6, psw
// Initialize the FPSR
movhi 2, r0, r6
ldsr r6, fpsr
#endif
mov hilo(_edata), r6
mov hilo(_end), r7
.L0:
st.w r0, 0[r6]
addi 4, r6, r6
cmp r7, r6
bl .L0
.L1:
jarl ___main, r31
addi -16, sp, sp
mov 0, r6
mov 0, r7
mov 0, r8
jarl _main, r31
mov r10, r6
jarl _exit, r31
# else
movea 255, r0, r20
mov r0, r21
ori 65535, r0, r21
movhi hi(_stack), r0, sp
movea lo(_stack), sp, sp
movhi hi(__ep), r0, ep
movea lo(__ep), ep, ep
movhi hi(__gp), r0, gp
movea lo(__gp), gp, gp
movhi hi(_edata), r0, r6
movea lo(_edata), r6, r6
movhi hi(_end), r0, r7
movea lo(_end), r7, r7
.L0:
st.b r0, 0[r6]
addi 1, r6, r6
cmp r7, r6
bl .L0
.L1:
jarl ___main, r31
addi -16, sp, sp
mov 0, r6
mov 0, r7
mov 0, r8
jarl _main, r31
mov r10, r6
jarl _exit, r31
# endif
.section .stack
_stack: .long 1
.section .data
.global ___dso_handle
.weak ___dso_handle
___dso_handle:
.long 0
|
4ms/metamodule-plugin-sdk
| 1,119
|
plugin-libc/newlib/libc/sys/sysmec/crt0.S
|
#ifdef __mn10300__
.section .text
.global _start
_start:
mov _stack-8,a0 # Load up the stack pointer
mov a0,sp
mov _edata,a0 # Get the start/end of bss
mov _end,a1
cmp a0,a1 # If no bss, then do nothing
beq .L0
clr d0 # clear d0
.L1:
movbu d0,(a0) # Clear a byte and bump pointer
inc a0
cmp a0,a1
bne .L1
.L0:
call ___main,[],0 # Call __main to run ctors/dtors
clr d0
clr d1
mov d0,(4,sp)
call _main,[],0 # Call main program
call _exit,[],0 # All done, no need to return or
# deallocate our stack.
.section ._stack
_stack: .long 1
#else
.section .text
.global _start
_start:
mov _stack-4,a3 # Load up the stack pointer and allocate
# our current frame.
mov _edata,a0 # Get the start/end of bss
mov _end,a1
cmp a0,a1 # If no bss, then do nothing
beqx .L0
sub d0,d0 # clear d0
.L1:
movb d0,(a0) # Clear a byte and bump pointer
add 1,a0
cmp a0,a1
bnex .L1
.L0:
jsr ___main
sub d0,d0
mov d0,d1
mov d0,(a3)
jsr _main # Call main program
jmp _exit # All done, no need to return or
# deallocate our stack.
.section ._stack
_stack: .long 1
#endif
|
4ms/metamodule-plugin-sdk
| 2,202
|
plugin-libc/newlib/libc/sys/sh/crt0.S
|
#ifdef __SH5__
.section .data,"aw"
.global ___data
___data:
.section .rodata,"a"
.global ___rodata
___rodata:
#if __SH5__ == 64
.section .text,"ax"
#define LOAD_ADDR(sym, reg) \
movi (sym >> 48) & 65535, reg; \
shori (sym >> 32) & 65535, reg; \
shori (sym >> 16) & 65535, reg; \
shori sym & 65535, reg
#else
.mode SHmedia
.section .text..SHmedia32,"ax"
#define LOAD_ADDR(sym, reg) \
movi (sym >> 16) & 65535, reg; \
shori sym & 65535, reg
#endif
.global start
start:
LOAD_ADDR (_stack, r15)
pt/l zero_bss_loop, tr0
pt/l _atexit, tr1
pt/l _init, tr5
pt/l _main, tr6
pt/l _exit, tr7
! zero out bss
LOAD_ADDR (_edata, r0)
LOAD_ADDR (_end, r1)
zero_bss_loop:
stx.q r0, r63, r63
addi r0, 8, r0
bgt/l r1, r0, tr0
LOAD_ADDR (___data, r26)
LOAD_ADDR (___rodata, r27)
#if ! __SH4_NOFPU__
getcon cr0, r0
movi 1, r1
shlli r1, 15, r1
or r1, r0, r0
putcon r0, cr0
#endif
! arrange for exit to call fini
LOAD_ADDR (_fini, r2)
blink tr1, r18
! call init
blink tr5, r18
! call the mainline
blink tr6, r18
! call exit
blink tr7, r18
#else
.section .text
.global start
start:
mov.l stack_k,r15
! zero out bss
mov.l edata_k,r0
mov.l end_k,r1
mov #0,r2
start_l:
mov.l r2,@r0
add #4,r0
cmp/ge r0,r1
bt start_l
#ifndef __SH2A_NOFPU__
#if defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY) || defined(__SH2A__)
mov.l set_fpscr_k, r1
jsr @r1
mov #0,r4
lds r3,fpscr
#endif /* defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__) || defined(__SH2A__) */
#endif /* !__SH2A_NOFPU__ */
! call the mainline
mov.l main_k,r0
jsr @r0
or r0,r0
! call exit
mov r0,r4
mov.l exit_k,r0
jsr @r0
or r0,r0
.align 2
#ifndef __SH2A_NOFPU__
#if defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__) || defined(__SH2A__)
set_fpscr_k:
.long ___set_fpscr
#endif /* defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(SH4_SINGLE_ONLY) || defined(__SH2A__) */
#endif /* !__SH2A_NOFPU__ */
stack_k:
.long _stack
edata_k:
.long _edata
end_k:
.long _end
main_k:
.long _main
exit_k:
.long _exit
#endif
|
4ms/metamodule-plugin-sdk
| 5,011
|
plugin-libc/newlib/libc/sys/arm/trap.S
|
/* Run-time exception support */
#ifndef __ARM_EABI__
#include "swi.h"
/* .text is used instead of .section .text so it works with arm-aout too. */
.text
.align 0
.global __rt_stkovf_split_big
.global __rt_stkovf_split_small
/* The following functions are provided for software stack checking.
If hardware stack-checking is being used then the code can be
compiled without the PCS entry checks, and simply rely on VM
management to extend the stack for a thread.
The stack extension event occurs when the PCS function entry code
would result in a stack-pointer beneath the stack-limit register
value. The system relies on the following map:
+-----------------------------------+ <-- end of stack block
| ... |
| ... |
| active stack |
| ... | <-- sp (stack-pointer) somewhere in here
| ... |
+-----------------------------------+ <-- sl (stack-limit)
| stack-extension handler workspace |
+-----------------------------------+ <-- base of stack block
The "stack-extension handler workspace" is an amount of memory in
which the stack overflow support code must execute. It must be
large enough to deal with the worst case path through the extension
code. At the moment the compiler expects this to be AT LEAST
256bytes. It uses this fact to code functions with small local
data usage within the overflow space.
In a true target environment We may need to increase the space
between sl and the true limit to allow for the stack extension
code, SWI handlers and for undefined instruction handlers of the
target environment. */
__rt_stkovf_split_small:
mov ip,sp @ Ensure we can calculate the stack required
@ and fall through to...
__rt_stkovf_split_big:
@ in: sp = current stack-pointer (beneath stack-limit)
@ sl = current stack-limit
@ ip = low stack point we require for the current function
@ lr = return address into the current function
@ fp = frame-pointer
@ original sp --> +----------------------------------+
@ | pc (12 ahead of PCS entry store) |
@ current fp ---> +----------------------------------+
@ | lr (on entry) pc (on exit) |
@ +----------------------------------+
@ | sp ("original sp" on entry) |
@ +----------------------------------+
@ | fp (on entry to function) |
@ +----------------------------------+
@ | |
@ | ..argument and work registers.. |
@ | |
@ current sp ---> +----------------------------------+
@
@ The "current sl" is somewhere between "original sp" and "current sp"
@ but above "true sl". The "current sl" should be at least 256bytes
@ above the "true sl". The 256byte stack guard should be large enough
@ to deal with the worst case function entry stacking (160bytes) plus
@ the stack overflow handler stacking requirements, plus the stack
@ required for the memory allocation routines.
@
@ Normal PCS entry (before stack overflow check) can stack 16
@ standard registers (64bytes) and 8 floating point registers
@ (96bytes). This gives a minimum stack guard of 160bytes (excluding
@ the stack required for the code). (Actually only a maximum of
@ 14standard registers are ever stacked on entry to a function).
@
@ NOTE: Structure returns are performed by the caller allocating a
@ dummy space on the stack and passing in a "phantom" arg1 into
@ the function. This means that we do not need to worry about
@ preserving the stack under "sp" even on function return.
@
@ Code should never poke values beneath sp. The sp register
@ should always be "dropped" first to cover the data. This
@ protects the data against any events that may try and use
@ the stack.
SUB ip, sp, ip @ extra stack required for function
@ Add stack extension code here. If desired a new stack chunk
@ can be allocated, and the register state updated suitably.
@ We now know how much extra stack the function requires.
@ Terminate the program for the moment:
swi SWI_Exit
#endif
|
4ms/metamodule-plugin-sdk
| 16,800
|
plugin-libc/newlib/libc/sys/arm/crt0.S
|
#include "newlib.h"
#include "arm.h"
#include "swi.h"
/* ANSI concatenation macros. */
#define CONCAT(a, b) CONCAT2(a, b)
#define CONCAT2(a, b) a ## b
#ifdef __USER_LABEL_PREFIX__
#define FUNCTION( name ) CONCAT (__USER_LABEL_PREFIX__, name)
#else
#error __USER_LABEL_PREFIX is not defined
#endif
#ifdef _HAVE_INITFINI_ARRAY
#define _init __libc_init_array
#define _fini __libc_fini_array
#endif
#if defined(__ARM_EABI__) && defined(__thumb__) && !defined(__thumb2__)
/* For Thumb1 we need to force the architecture to be sure that we get the
correct attributes on the object file; otherwise the assembler will get
confused and mark the object as being v6T2. */
#if defined(__ARM_ARCH_4T__)
.arch armv4t
#elif defined(__ARM_ARCH_5T__) || defined(__ARM_ARCH_5TE__)
/* Nothing in this object requires higher than v5. */
.arch armv5t
#elif defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) \
|| defined(__ARM_ARCH_6K__) || defined(__ARM_ARCH_6Z__) \
|| defined(__ARM_ARCH_6ZK__)
/* Nothing in this object requires higher than v6. */
.arch armv6
#elif defined(__ARM_ARCH_6M__)
#ifdef ARM_RDP_MONITOR
/* Object file uses SVC, so mark as v6s-m. */
.arch armv6s-m
#else
.arch armv6-m
#endif
#endif
#endif
/* .text is used instead of .section .text so it works with arm-aout too. */
.text
.syntax unified
#ifdef PREFER_THUMB
.thumb
.macro FUNC_START name
.global \name
.thumb_func
\name:
.endm
#else
.code 32
.macro FUNC_START name
.global \name
\name:
.endm
#endif
/* Annotation for EABI unwinding tables. */
.macro FN_EH_START
#if defined(__ELF__) && !defined(__USING_SJLJ_EXCEPTIONS__)
.fnstart
#endif
.endm
.macro FN_EH_END
#if defined(__ELF__) && !defined(__USING_SJLJ_EXCEPTIONS__)
/* Protect against unhandled exceptions. */
.cantunwind
.fnend
#endif
.endm
.macro indirect_call reg
#ifdef HAVE_CALL_INDIRECT
blx \reg
#else
mov lr, pc
mov pc, \reg
#endif
.endm
/* For armv4t and newer, toolchains will transparently convert
'bx lr' to 'mov pc, lr' if needed. GCC has deprecated support
for anything older than armv4t, but this should handle that
corner case in case anyone needs it anyway. */
.macro FN_RETURN
#if __ARM_ARCH <= 4 && __ARM_ARCH_ISA_THUMB == 0
mov pc, lr
#else
bx lr
#endif
.endm
/******************************************************************************
* User mode only: This routine makes default target specific Stack
* +-----+ <- SL_sys, Pointer initialization for different processor modes:
* | | SL_usr FIQ, Abort, IRQ, Undefined, Supervisor, System (User)
* | SYS | and setups a default Stack Limit in-case the code has
* | USR | -=0x10000 been compiled with "-mapcs-stack-check" for FIQ and
* | | System (User) modes.
* | |
* +-----+ <- initial SP,
* becomes SP_sys Hard-wiring SL value is not ideal, since there is
* and SL_usr currently no support for checking that the heap and
* stack have not collided, or that this default 64k is
* All modes: is enough for the program being executed. However,
* +-----+ <- SL_sys, it ensures that this simple crt0 world will not
* | | SL_usr immediately cause an overflow event.
* | SYS |
* | USR | -=0x10000 We go through all execution modes and set up SP
* | | for each of them.
* +-----+ <- SP_sys,
* | | SP_usr Notes:
* | SVC | -= 0x8000 - This code will not work as intended if the system
* | | starts in secure mode. In particular the methods
* +-----+ <- SP_svc of getting in and out of secure state are not as
* | | simple as writing to the CPSR mode bits.
* | IRQ | -= 0x2000 - Mode switch via CPSR is not allowed once in
* | | non-privileged mode or in hypervisor mode, so we
* ^ +-----+ <- SP_und take care not to enter "User" or "Hypervisor" mode
* s | | to set up its SP, and also skip most operations if
* t | UND | -= 0x1000 already in these modes.
* a | | Input parameters:
* c +-----+ <- SP_und - sp - Initialized SP
* k | | - r2 - May contain SL value from semihosting
* | ABT | -= 0x1000 SYS_HEAPINFO call
* g | | Scratch registers:
* r +-----+ <- SP_abt, - r1 - new value of CPSR
* o | | SL_fiq - r2 - intermediate value (in standalone mode)
* w | FIQ | -= 0x1000 - r3 - new SP value
* t | | - r4 - save/restore CPSR on entry/exit
* h +-----+ <- initial SP,
* becomes SP_fiq Declared as "weak" so that user can write and use
* his own implementation if current doesn't fit.
*
******************************************************************************/
.align 0
FUNC_START _stack_init
.weak FUNCTION (_stack_init)
FN_EH_START
/* M profile doesn't have CPSR register. */
#if (__ARM_ARCH_PROFILE != 'M')
/* Following code is compatible for both ARM and Thumb ISA. */
mrs r4, CPSR
mov r3, sp /* Save input SP value. */
ands r1, r4, #(CPSR_M_MASK)
beq .Lskip_cpu_modes
cmp r1, #(CPSR_M_HYP)
beq .Lskip_cpu_modes
/* FIQ mode, interrupts disabled. */
mov r1, #(CPSR_M_FIQ|CPSR_M_32BIT|CPSR_I_MASK|CPSR_F_MASK)
msr CPSR_c, r1
mov sp, r3
sub sl, sp, #0x1000 /* FIQ mode has its own SL. */
/* Abort mode, interrupts disabled. */
mov r3, sl
mov r1, #(CPSR_M_ABT|CPSR_M_32BIT|CPSR_I_MASK|CPSR_F_MASK)
msr CPSR_c, r1
mov sp, r3
sub r3, r3, #0x1000
/* Undefined mode, interrupts disabled. */
mov r1, #(CPSR_M_UND|CPSR_M_32BIT|CPSR_I_MASK|CPSR_F_MASK)
msr CPSR_c, r1
mov sp, r3
sub r3, r3, #0x1000
/* IRQ mode, interrupts disabled. */
mov r1, #(CPSR_M_IRQ|CPSR_M_32BIT|CPSR_I_MASK|CPSR_F_MASK)
msr CPSR_c, r1
mov sp, r3
sub r3, r3, #0x2000
/* Supervisory mode, interrupts disabled. */
mov r1, #(CPSR_M_SVR|CPSR_M_32BIT|CPSR_I_MASK|CPSR_F_MASK)
msr CPSR_c, r1
mov sp, r3
sub r3, r3, #0x8000 /* Min size 32k. */
bic r3, r3, #0x00FF /* Align with current 64k block. */
bic r3, r3, #0xFF00
# if __ARM_ARCH >= 4
/* System (shares regs with User) mode, interrupts disabled. */
mov r1, #(CPSR_M_SYS|CPSR_M_32BIT|CPSR_I_MASK|CPSR_F_MASK)
msr CPSR_c, r1
mov sp, r3
# else
/* Keep this for ARMv3, but GCC actually dropped it. */
/* Move value into user mode SP without changing modes, */
/* via '^' form of ldm. */
str r3, [r3, #-4]
ldmdb r3, {sp}^
# endif
/* Back to original mode, presumably SVC, with diabled FIQ/IRQ. */
orr r4, r4, #(CPSR_I_MASK|CPSR_F_MASK)
msr CPSR_c, r4
.Lskip_cpu_modes:
#endif
/* Set SL register. */
#if defined (ARM_RDI_MONITOR) /* semihosting */
cmp r2, #0
beq .Lsl_forced_zero
/* Allow slop for stack overflow handling and small frames. */
# ifdef THUMB1_ONLY
adds r2, #128
adds r2, #128
mov sl, r2
# else
add sl, r2, #256
# endif
.Lsl_forced_zero:
#else /* standalone */
/* r3 contains SP for System/User mode. Set SL = SP - 0x10000. */
#ifdef THUMB1_ONLY
movs r2, #64
lsls r2, r2, #10
subs r2, r3, r2
mov sl, r2
#else
/* Still assumes 256bytes below SL. */
sub sl, r3, #64 << 10
#endif
#endif
FN_RETURN
FN_EH_END
/*******************************************************************************
* Main library startup code.
*******************************************************************************/
.align 0
FUNC_START _mainCRTStartup
FUNC_START _start
FN_EH_START
/* Start by setting up a stack. */
#ifdef ARM_RDP_MONITOR
/* Issue Demon SWI to read stack info. */
swi SWI_GetEnv /* Returns command line in r0. */
mov sp,r1 /* and the highest memory address in r1. */
/* Stack limit is at end of data. */
/* Allow slop for stack overflow handling and small frames. */
#ifdef THUMB1_ONLY
ldr r0, .LC2
adds r0, #128
adds r0, #128
mov sl, r0
#else
ldr sl, .LC2
add sl, sl, #256
#endif
#else
#ifdef ARM_RDI_MONITOR
/* Issue Angel SWI to read stack info. */
movs r0, #AngelSWI_Reason_HeapInfo
adr r1, .LC0 /* Point at ptr to 4 words to receive data. */
#ifdef THUMB_VXM
bkpt AngelSWI
#elif defined(__thumb2__)
/* We are in thumb mode for startup on armv7 architectures. */
AngelSWIAsm AngelSWI
#else
/* We are always in ARM mode for startup on pre armv7 archs. */
AngelSWIAsm AngelSWI_ARM
#endif
ldr r0, .LC0 /* Point at values read. */
/* Set __heap_limit. */
ldr r1, [r0, #4]
cmp r1, #0
beq .LC33
ldr r2, =__heap_limit
str r1, [r2]
.LC33:
ldr r1, [r0, #0]
cmp r1, #0
bne .LC32
/* If the heap base value [r0, #0] is 0 then the heap base is actually
at the end of program data (i.e. __end__). See:
http://infocenter.arm.com/help/topic/com.arm.doc.dui0471-/Bacbefaa.html
for more information. */
ldr r1, .LC31
str r1, [r0, #0]
.LC32:
ldr r1, [r0, #8]
ldr r2, [r0, #12]
/* We skip setting SP/SL if 0 returned from semihosting.
- According to semihosting docs, if 0 returned from semihosting,
the system was unable to calculate the real value, so it's ok
to skip setting SP/SL to 0 here.
- Considering M-profile processors, We might want to initialize
SP by the first entry of vector table and return 0 to SYS_HEAPINFO
semihosting call, which will be skipped here.
- Considering R-profile processors there is no automatic SP init by hardware
so we need to initialize it by default value. */
ldr r3, .Lstack
cmp r1, #0
beq .LC26
mov r3, r1
.LC26:
mov sp, r3
/* r2 (SL value) will be used in _stack_init. */
bl FUNCTION (_stack_init)
#else /* standalone */
/* Set up the stack pointer to a fixed value. */
/* Changes by toralf:
- Allow linker script to provide stack via __stack symbol - see
defintion of .Lstack
- Provide "hooks" that may be used by the application to add
custom init code - see .Lhwinit and .Lswinit. */
ldr r3, .Lstack
cmp r3, #0
#ifdef __thumb2__
it eq
#endif
#ifdef THUMB1_ONLY
bne .LC28
ldr r3, .LC0
.LC28:
#else
ldreq r3, .LC0
#endif
/* Note: This 'mov' is essential when starting in User, and ensures we
always get *some* SP value for the initial mode, even if we
have somehow missed it below (in which case it gets the same
value as FIQ - not ideal, but better than nothing). */
mov sp, r3
/* We don't care of r2 value in standalone. */
bl FUNCTION (_stack_init)
#endif
#endif
/* Zero the memory in the .bss section. */
movs a2, #0 /* Second arg: fill value. */
mov fp, a2 /* Null frame pointer. */
mov r7, a2 /* Null frame pointer for Thumb. */
ldr a1, .LC1 /* First arg: start of memory block. */
ldr a3, .LC2
subs a3, a3, a1 /* Third arg: length of block. */
#if __thumb__ && !defined(PREFER_THUMB)
/* Enter Thumb mode... */
add a4, pc, #1 /* Get the address of the Thumb block. */
bx a4 /* Go there and start Thumb decoding. */
.code 16
.global __change_mode
.thumb_func
__change_mode:
#endif
bl FUNCTION (memset)
#if !defined (ARM_RDP_MONITOR) && !defined (ARM_RDI_MONITOR)
/* Changes by toralf: Taken from libgloss/m68k/crt0.S
initialize target specific stuff. Only execute these
functions it they exist. */
ldr r3, .Lhwinit
cmp r3, #0
beq .LC24
indirect_call r3
.LC24:
ldr r3, .Lswinit
cmp r3, #0
beq .LC25
indirect_call r3
.LC25:
movs r0, #0 /* No arguments. */
movs r1, #0 /* No argv either. */
#else
/* Need to set up standard file handles. */
bl FUNCTION (initialise_monitor_handles)
#ifdef ARM_RDP_MONITOR
swi SWI_GetEnv /* Sets r0 to point to the command line. */
movs r1, r0
#else
movs r0, #AngelSWI_Reason_GetCmdLine
ldr r1, .LC30 /* Space for command line. */
#ifdef THUMB_VXM
bkpt AngelSWI
#else
AngelSWIAsm AngelSWI
#endif
ldr r1, .LC30
ldr r1, [r1]
#endif
/* Parse string at r1. */
movs r0, #0 /* Count of arguments so far. */
/* Push a NULL argument onto the end of the list. */
#ifdef __thumb__
push {r0}
#else
stmfd sp!, {r0}
#endif
.LC10:
/* Skip leading blanks. */
#ifdef __thumb__
ldrb r3, [r1]
adds r1, #1
#else
ldrb r3, [r1], #1
#endif
cmp r3, #0
beq .LC12
cmp r3, #' '
beq .LC10
/* See whether we are scanning a string. */
cmp r3, #'\"'
#ifdef __thumb__
beq .LC20
cmp r3, #'\''
bne .LC21
.LC20:
movs r2, r3
b .LC22
.LC21:
movs r2, #' ' /* Terminator type. */
subs r1, r1, #1 /* Adjust back to point at start char. */
.LC22:
#else
cmpne r3, #'\''
moveq r2, r3
movne r2, #' ' /* Terminator type. */
subne r1, r1, #1 /* Adjust back to point at start char. */
#endif
/* Stack a pointer to the current argument. */
#ifdef __thumb__
push {r1}
#else
stmfd sp!, {r1}
#endif
adds r0, r0, #1
.LC11:
#ifdef __thumb__
ldrb r3, [r1]
adds r1, #1
#else
ldrb r3, [r1], #1
#endif
cmp r3, #0
beq .LC12
cmp r2, r3 /* Reached terminator ? */
bne .LC11
movs r2, #0
subs r3, r1, #1
strb r2, [r3] /* Terminate the arg string. */
b .LC10
.LC12:
mov r1, sp /* Point at stacked arg pointers. */
/* We've now got the stacked args in order, reverse them. */
#ifdef __thumb__
movs r2, r0
lsls r2, #2
add r2, sp
mov r3, sp
.LC15: cmp r2, r3
bls .LC14
subs r2, #4
ldr r4, [r2]
ldr r5, [r3]
str r5, [r2]
str r4, [r3]
adds r3, #4
b .LC15
.LC14:
/* Ensure doubleword stack alignment. */
mov r4, sp
movs r5, #7
bics r4, r5
mov sp, r4
#else
add r2, sp, r0, LSL #2 /* End of args. */
mov r3, sp /* Start of args. */
.LC13: cmp r2, r3
ldrhi r4,[r2, #-4] /* Reverse ends of list. */
ldrhi r5, [r3]
strhi r5, [r2, #-4]!
strhi r4, [r3], #4
bhi .LC13
/* Ensure doubleword stack alignment. */
bic sp, sp, #7
#endif
#endif
#ifdef __USES_INITFINI__
/* Some arm/elf targets use the .init and .fini sections
to create constructors and destructors, and for these
targets we need to call the _init function and arrange
for _fini to be called at program exit. */
movs r4, r0
movs r5, r1
#ifdef _LITE_EXIT
/* Make reference to atexit weak to avoid unconditionally pulling in
support code. Refer to comments in __atexit.c for more details. */
.weak FUNCTION(atexit)
ldr r0, .Latexit
cmp r0, #0
beq .Lweak_atexit
#endif
ldr r0, .Lfini
bl FUNCTION (atexit)
.Lweak_atexit:
bl FUNCTION (_init)
movs r0, r4
movs r1, r5
#endif
bl FUNCTION (main)
bl FUNCTION (exit) /* Should not return. */
#if __thumb__ && !defined(PREFER_THUMB)
/* Come out of Thumb mode. This code should be redundant. */
mov a4, pc
bx a4
.code 32
.global change_back
change_back:
/* Halt the execution. This code should never be executed. */
/* With no debug monitor, this probably aborts (eventually).
With a Demon debug monitor, this halts cleanly.
With an Angel debug monitor, this will report 'Unknown SWI'. */
swi SWI_Exit
#endif
FN_EH_END
/* For Thumb, constants must be after the code since only
positive offsets are supported for PC relative addresses. */
.align 0
.LC0:
#ifdef ARM_RDI_MONITOR
.word HeapBase
#else
#ifndef ARM_RDP_MONITOR
/* Changes by toralf: Provide alternative "stack" variable whose value
may be defined externally; .Lstack will be used instead of .LC0 if
it points to a non-0 value. Also set up references to "hooks" that
may be used by the application to provide additional init code. */
#ifdef __pe__
.word 0x800000
#else
.word 0x80000 /* Top of RAM on the PIE board. */
#endif
.Lhwinit:
.word FUNCTION (hardware_init_hook)
.Lswinit:
.word FUNCTION (software_init_hook)
/* Set up defaults for the above variables in the form of weak symbols
- so that application will link correctly, and get value 0 in
runtime (meaning "ignore setting") for the variables, when the user
does not provide the symbols. (The linker uses a weak symbol if,
and only if, a normal version of the same symbol isn't provided
e.g. by a linker script or another object file.) */
.weak FUNCTION (hardware_init_hook)
.weak FUNCTION (software_init_hook)
#endif
#endif
.Lstack:
.word __stack
.weak __stack
.LC1:
.word __bss_start__
.LC2:
.word __bss_end__
#ifdef __USES_INITFINI__
#ifdef _LITE_EXIT
.Latexit:
.word FUNCTION(atexit)
/* Weak reference _fini in case of lite exit. */
.weak FUNCTION(_fini)
#endif
.Lfini:
.word FUNCTION(_fini)
#endif
#ifdef ARM_RDI_MONITOR
.LC30:
.word AngelSWIArgs
.LC31:
.word __end__
/* Workspace for Angel calls. */
.data
/* Data returned by monitor SWI. */
.global __stack_base__
HeapBase: .word 0
HeapLimit: .word 0
__stack_base__: .word 0
StackLimit: .word 0
CommandLine: .space 256,0 /* Maximum length of 255 chars handled. */
AngelSWIArgs:
.word CommandLine
.word 255
#endif
#ifdef __pe__
.section .idata$3
.long 0,0,0,0,0,0,0,0
#endif
|
4ms/metamodule-plugin-sdk
| 1,507
|
plugin-libc/newlib/libc/sys/a29khif/_ioctl.S
|
; @(#)_ioctl.s 1.2 90/10/14 21:57:25, AMD
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright 1990 Advanced Micro Devices, Inc.
;
; This software is the property of Advanced Micro Devices, Inc (AMD) which
; specifically grants the user the right to modify, use and distribute this
; software provided this notice is not removed or altered. All other rights
; are reserved by AMD.
;
; AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS
; SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL
; DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR
; USE OF THIS SOFTWARE.
;
; So that all may benefit from your experience, please report any problems
; or suggestions about this software to the 29K Technical Support Center at
; 800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or
; 0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118.
;
; Advanced Micro Devices, Inc.
; 29K Support Products
; Mail Stop 573
; 5900 E. Ben White Blvd.
; Austin, TX 78741
; 800-292-9263
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; _ioctl.s
; _ioctl( int fd );
;
.file "_ioctl.s"
.include "sys/sysmac.h"
.text
.word 0x00030000 ; Debugger tag word
.global __ioctl
__ioctl:
const tav,HIF_ioctl @ asneq V_SYSCALL,gr1,gr1 @ jmpti tav,lr0 @ const tpc,_errno @ consth tpc,_errno @ store 0,0,tav,tpc @ jmpi lr0 @ constn v0,-1
.end
|
4ms/metamodule-plugin-sdk
| 1,982
|
plugin-libc/newlib/libc/sys/a29khif/alloc.S
|
;
;(#)_alloc.s 1.4 90/10/14 21:57:19, AMD
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright 1989, 1990 Advanced Micro Devices, Inc.
;
; This software is the property of Advanced Micro Devices, Inc (AMD) which
; specifically grants the user the right to modify, use and distribute this
; software provided this notice is not removed or altered. All other rights
; are reserved by AMD.
;
; AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS
; SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL
; DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR
; USE OF THIS SOFTWARE.
;
; So that all may benefit from your experience, please report any problems
; or suggestions about this software to the 29K Technical Support Center at
; 800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or
; 0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118.
;
; Advanced Micro Devices, Inc.
; 29K Support Products
; Mail Stop 573
; 5900 E. Ben White Blvd.
; Austin, TX 78741
; 800-292-9263
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;
; 07/06/89 (JS) Replaced call to const tav,HIF_macro
; and deleted call to reterr macro as a NULL needs to be
; returned on failure.
; _alloc.s
; void *vp = _sysalloc( int size );
;
.file "_alloc.s"
.include "sys/sysmac.h"
.text
.word 0x00030000 ; Debugger tag word
.global __sysalloc
__sysalloc:
const tav,HIF_alloc
asneq V_SYSCALL,gr1,gr1
jmpti tav, lr0
const tpc, _errno
consth tpc, _errno
store 0, 0, tav, tpc
jmpi lr0
const v0, 0 ; return NULL on error.
;
; int errret = _sysfree( void *addr, int size );
;
.global __sysfree
__sysfree:
const tav,HIF_free
asneq V_SYSCALL,gr1,gr1
jmpti tav,lr0
const tpc,_errno
consth tpc,_errno
store 0,0,tav,tpc
jmpi lr0
constn v0,-1
.end
|
4ms/metamodule-plugin-sdk
| 1,721
|
plugin-libc/newlib/libc/sys/a29khif/getenv.S
|
; @(#)getenv.s 1.4 90/10/14 21:57:45, AMD
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright 1990 Advanced Micro Devices, Inc.
;
; This software is the property of Advanced Micro Devices, Inc (AMD) which
; specifically grants the user the right to modify, use and distribute this
; software provided this notice is not removed or altered. All other rights
; are reserved by AMD.
;
; AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS
; SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL
; DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR
; USE OF THIS SOFTWARE.
;
; So that all may benefit from your experience, please report any problems
; or suggestions about this software to the 29K Technical Support Center at
; 800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or
; 0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118.
;
; Advanced Micro Devices, Inc.
; 29K Support Products
; Mail Stop 573
; 5900 E. Ben White Blvd.
; Austin, TX 78741
; 800-292-9263
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; getenv.s
; char *value = getenv( const char *name );
;
.file "getenv.s"
.include "sys/sysmac.h"
.text
.word 0x00030000 ; Debugger tag word
.global _getenv
.global __getenv
_getenv:
__getenv:
const tav,HIF_getenv @ asneq V_SYSCALL,gr1,gr1 ; HIF service trap
jmpti tav, lr0 ; If tav is true, were finished, return.
const tpc, _errno
consth tpc, _errno ; Otherwise,
store 0, 0, tav, tpc ; store error code in _errno,
jmpi lr0 ; then return
const v0, 0 ; with a value of 0 (NULL pointer).
.end
|
4ms/metamodule-plugin-sdk
| 1,557
|
plugin-libc/newlib/libc/sys/a29khif/_setvec.S
|
; @(#)_setvec.s 1.2 90/10/14 21:57:35, AMD
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright 1990 Advanced Micro Devices, Inc.
;
; This software is the property of Advanced Micro Devices, Inc (AMD) which
; specifically grants the user the right to modify, use and distribute this
; software provided this notice is not removed or altered. All other rights
; are reserved by AMD.
;
; AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS
; SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL
; DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR
; USE OF THIS SOFTWARE.
;
; So that all may benefit from your experience, please report any problems
; or suggestions about this software to the 29K Technical Support Center at
; 800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or
; 0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118.
;
; Advanced Micro Devices, Inc.
; 29K Support Products
; Mail Stop 573
; 5900 E. Ben White Blvd.
; Austin, TX 78741
; 800-292-9263
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; _setvec.s
; int success = _setvec( int trap_no, void (*handler)( void ) );
;
.file "_setvec.s"
.include "sys/sysmac.h"
.text
.word 0x00040000 ; Debugger tag word
.global __setvec
__setvec:
const tav,HIF_setvec @ asneq V_SYSCALL,gr1,gr1 @ jmpti tav,lr0 @ const tpc,_errno @ consth tpc,_errno @ store 0,0,tav,tpc @ jmpi lr0 @ constn v0,-1
.end
|
4ms/metamodule-plugin-sdk
| 2,125
|
plugin-libc/newlib/libc/sys/a29khif/_alloc.S
|
; @(#)_alloc.s 1.4 90/10/14 21:57:19, AMD
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright 1989, 1990 Advanced Micro Devices, Inc.
;
; This software is the property of Advanced Micro Devices, Inc (AMD) which
; specifically grants the user the right to modify, use and distribute this
; software provided this notice is not removed or altered. All other rights
; are reserved by AMD.
;
; AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS
; SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL
; DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR
; USE OF THIS SOFTWARE.
;
; So that all may benefit from your experience, please report any problems
; or suggestions about this software to the 29K Technical Support Center at
; 800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or
; 0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118.
;
; Advanced Micro Devices, Inc.
; 29K Support Products
; Mail Stop 573
; 5900 E. Ben White Blvd.
; Austin, TX 78741
; 800-292-9263
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;
; 07/06/89 (JS) Replaced call to const tav,HIF_macro @ asneq V_SYSCALL,gr1,gr1 @ jmpti tav,lr0 @ const tpc,_errno @ consth tpc,_errno @ store 0,0,tav,tpc @ jmpi lr0 @ constn v0,-1 to syscall macro,
; and deleted call to reterr macro as a NULL needs to be
; returned on failure.
; _alloc.s
; void *vp = _sysalloc( int size );
;
.file "_alloc.s"
.include "sys/sysmac.h"
.text
.word 0x00030000 ; Debugger tag word
.global __sysalloc
__sysalloc:
const tav,HIF_alloc @ asneq V_SYSCALL,gr1,gr1
jmpti tav, lr0
const tpc, _errno
consth tpc, _errno
store 0, 0, tav, tpc
jmpi lr0
const v0, 0 ; return NULL on error.
;
; int errret = _sysfree( void *addr, int size );
;
.global __sysfree
__sysfree:
const tav,HIF_free @ asneq V_SYSCALL,gr1,gr1 @ jmpti tav,lr0 @ const tpc,_errno @ consth tpc,_errno @ store 0,0,tav,tpc @ jmpi lr0 @ constn v0,-1
.end
|
4ms/metamodule-plugin-sdk
| 1,514
|
plugin-libc/newlib/libc/sys/a29khif/_iowait.S
|
; @(#)_iowait.s 1.3 90/10/14 21:57:27, AMD
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright 1990 Advanced Micro Devices, Inc.
;
; This software is the property of Advanced Micro Devices, Inc (AMD) which
; specifically grants the user the right to modify, use and distribute this
; software provided this notice is not removed or altered. All other rights
; are reserved by AMD.
;
; AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS
; SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL
; DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR
; USE OF THIS SOFTWARE.
;
; So that all may benefit from your experience, please report any problems
; or suggestions about this software to the 29K Technical Support Center at
; 800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or
; 0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118.
;
; Advanced Micro Devices, Inc.
; 29K Support Products
; Mail Stop 573
; 5900 E. Ben White Blvd.
; Austin, TX 78741
; 800-292-9263
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; _iowait.s
; _iowait( int fd );
;
.file "_iowait.s"
.include "sys/sysmac.h"
.text
.word 0x00030000 ; Debugger tag word
.global __iowait
__iowait:
const tav,HIF_iowait @ asneq V_SYSCALL,gr1,gr1 @ jmpti tav,lr0 @ const tpc,_errno @ consth tpc,_errno @ store 0,0,tav,tpc @ jmpi lr0 @ constn v0,-1
.end
|
4ms/metamodule-plugin-sdk
| 1,533
|
plugin-libc/newlib/libc/sys/a29khif/_read.S
|
; @(#)_read.s 1.4 90/10/14 21:57:32, AMD
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright 1990 Advanced Micro Devices, Inc.
;
; This software is the property of Advanced Micro Devices, Inc (AMD) which
; specifically grants the user the right to modify, use and distribute this
; software provided this notice is not removed or altered. All other rights
; are reserved by AMD.
;
; AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS
; SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL
; DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR
; USE OF THIS SOFTWARE.
;
; So that all may benefit from your experience, please report any problems
; or suggestions about this software to the 29K Technical Support Center at
; 800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or
; 0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118.
;
; Advanced Micro Devices, Inc.
; 29K Support Products
; Mail Stop 573
; 5900 E. Ben White Blvd.
; Austin, TX 78741
; 800-292-9263
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; _read.s
; int nread = _read( int fd, char *buf, int count );
;
.file "_read.s"
.include "sys/sysmac.h"
.text
.word 0x00050000 ; Debugger tag word
.global __read
__read:
const tav,HIF_read @ asneq V_SYSCALL,gr1,gr1 @ jmpti tav,lr0 @ const tpc,_errno @ consth tpc,_errno @ store 0,0,tav,tpc @ jmpi lr0 @ constn v0,-1
.end
|
4ms/metamodule-plugin-sdk
| 1,655
|
plugin-libc/newlib/libc/sys/a29khif/_tmpnam.S
|
; @(#)_tmpnam.s 1.2 90/10/14 21:57:36, AMD
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright 1990 Advanced Micro Devices, Inc.
;
; This software is the property of Advanced Micro Devices, Inc (AMD) which
; specifically grants the user the right to modify, use and distribute this
; software provided this notice is not removed or altered. All other rights
; are reserved by AMD.
;
; AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS
; SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL
; DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR
; USE OF THIS SOFTWARE.
;
; So that all may benefit from your experience, please report any problems
; or suggestions about this software to the 29K Technical Support Center at
; 800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or
; 0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118.
;
; Advanced Micro Devices, Inc.
; 29K Support Products
; Mail Stop 573
; 5900 E. Ben White Blvd.
; Austin, TX 78741
; 800-292-9263
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; _tmpnam.s
; char *cp = _khif_tmpnam( char *bufr );
; /* same as ANSI tmpnam(), but NULL arg is not allowed */
; NOTE - Will not work on BSD (no tmpnam sys call)
;
.file "_tmpnam.s"
.include "sys/sysmac.h"
.text
.word 0x00030000 ; Debugger tag word
.global __khif_tmpnam
__khif_tmpnam:
const tav,HIF_tmpnam @ asneq V_SYSCALL,gr1,gr1 @ jmpti tav,lr0 @ const tpc,_errno @ consth tpc,_errno @ store 0,0,tav,tpc @ jmpi lr0 @ constn v0,-1
.end
|
4ms/metamodule-plugin-sdk
| 2,124
|
plugin-libc/newlib/libc/sys/a29khif/stubs.S
|
;
;
; File of stubs so that unix applications can link into a HIF monitor
;
; sac@cygnus.com
.text
.global _sysalloc
_sysalloc:
const gr121,__sysalloc
consth gr121,__sysalloc
jmpi gr121
.global _sysfree
_sysfree:
const gr121,__sysfree
consth gr121,__sysfree
jmpi gr121
.global _cycles
_cycles:
const gr121,__cycles
consth gr121,__cycles
jmpi gr121
; .global _exit
;_exit:
; const gr121,__exit
; consth gr121,__exit
; jmpi gr121
.global _getpsiz
_getpsiz:
const gr121,__getpsiz
consth gr121,__getpsiz
jmpi gr121
.global _gettz
_gettz:
const gr121,__gettz
consth gr121,__gettz
jmpi gr121
.global _ioctl
_ioctl:
const gr121,__ioctl
consth gr121,__ioctl
jmpi gr121
.global _iowait
_iowait:
const gr121,__iowait
consth gr121,__iowait
jmpi gr121
;; syscalls used now -- .global _open
;; syscalls used now -- _open:
;; syscalls used now -- const gr121,__open
;; syscalls used now -- consth gr121,__open
;; syscalls used now -- jmpi gr121
.global _query
_query:
const gr121,__query
consth gr121,__query
jmpi gr121
.global _setim
_setim:
const gr121,__setim
consth gr121,__setim
jmpi gr121
.global _settrap
_settrap:
const gr121,__settrap
consth gr121,__settrap
jmpi gr121
.global _setvec
_setvec:
const gr121,__setvec
consth gr121,__setvec
jmpi gr121
.global _getargs
_getargs:
const gr121,__getargs
consth gr121,__getargs
jmpi gr121
;; syscalls used now -- .global _unlink
;; syscalls used now -- _unlink:
;; syscalls used now -- const gr121,__unlink
;; syscalls used now -- consth gr121,__unlink
;; syscalls used now -- jmpi gr121
.global _sigret
_sigret:
const gr121,__sigret
consth gr121,__sigret
jmpi gr121
.global _sigdfl
_sigdfl:
const gr121,__sigdfl
consth gr121,__sigdfl
jmpi gr121
.global _sigrep
_sigrep:
const gr121,__sigrep
consth gr121,__sigrep
jmpi gr121
.global _sigskp
_sigskp:
const gr121,__sigskp
consth gr121,__sigskp
jmpi gr121
.global _sendsig
_sendsig:
const gr121,__sendsig
consth gr121,__sendsig
jmpi gr121
; fill this jmpi delay slot
; the others are not done since they do not matter
constn lr0,-1
|
4ms/metamodule-plugin-sdk
| 1,560
|
plugin-libc/newlib/libc/sys/a29khif/_cycles.S
|
; @(#)_cycles.s 1.2 90/10/14 21:57:21, AMD
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright 1990 Advanced Micro Devices, Inc.
;
; This software is the property of Advanced Micro Devices, Inc (AMD) which
; specifically grants the user the right to modify, use and distribute this
; software provided this notice is not removed or altered. All other rights
; are reserved by AMD.
;
; AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS
; SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL
; DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR
; USE OF THIS SOFTWARE.
;
; So that all may benefit from your experience, please report any problems
; or suggestions about this software to the 29K Technical Support Center at
; 800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or
; 0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118.
;
; Advanced Micro Devices, Inc.
; 29K Support Products
; Mail Stop 573
; 5900 E. Ben White Blvd.
; Austin, TX 78741
; 800-292-9263
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; _cycles.s
; struct { unsigned long low_ticks, long hi_ticks } = _cycles( );
;
.file "_cycles.s"
.include "sys/sysmac.h"
.text
.word 0x00020000 ; Debugger tag word
.global __cycles
__cycles:
const tav,HIF_cycles @ asneq V_SYSCALL,gr1,gr1 @ jmpti tav,lr0 @ const tpc,_errno @ consth tpc,_errno @ store 0,0,tav,tpc @ jmpi lr0 @ constn v0,-1
.end
|
4ms/metamodule-plugin-sdk
| 1,528
|
plugin-libc/newlib/libc/sys/a29khif/_getpsiz.S
|
; @(#)_getpsiz.s 1.2 90/10/14 21:57:23, AMD
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright 1990 Advanced Micro Devices, Inc.
;
; This software is the property of Advanced Micro Devices, Inc (AMD) which
; specifically grants the user the right to modify, use and distribute this
; software provided this notice is not removed or altered. All other rights
; are reserved by AMD.
;
; AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS
; SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL
; DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR
; USE OF THIS SOFTWARE.
;
; So that all may benefit from your experience, please report any problems
; or suggestions about this software to the 29K Technical Support Center at
; 800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or
; 0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118.
;
; Advanced Micro Devices, Inc.
; 29K Support Products
; Mail Stop 573
; 5900 E. Ben White Blvd.
; Austin, TX 78741
; 800-292-9263
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; _getpsiz.s
; int size = _getpsiz( );
;
.file "_getpsiz.s"
.include "sys/sysmac.h"
.text
.word 0x00020000 ; Debugger tag word
.global __getpsiz
__getpsiz:
const tav,HIF_getpagesize @ asneq V_SYSCALL,gr1,gr1 @ jmpti tav,lr0 @ const tpc,_errno @ consth tpc,_errno @ store 0,0,tav,tpc @ jmpi lr0 @ constn v0,-1
.end
|
4ms/metamodule-plugin-sdk
| 1,334
|
plugin-libc/newlib/libc/sys/a29khif/vec.S
|
; @(#)vec.s 1.2 90/10/14 21:58:01, AMD
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright 1990 Advanced Micro Devices, Inc.
;
; This software is the property of Advanced Micro Devices, Inc (AMD) which
; specifically grants the user the right to modify, use and distribute this
; software provided this notice is not removed or altered. All other rights
; are reserved by AMD.
;
; AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS
; SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL
; DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR
; USE OF THIS SOFTWARE.
;
; So that all may benefit from your experience, please report any problems
; or suggestions about this software to the 29K Technical Support Center at
; 800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or
; 0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118.
;
; Advanced Micro Devices, Inc.
; 29K Support Products
; Mail Stop 573
; 5900 E. Ben White Blvd.
; Austin, TX 78741
; 800-292-9263
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
.global V_SPILL, V_FILL
.global V_EPI_OS, V_BSD_OS
.equ V_SPILL, 64
.equ V_FILL, 65
.equ V_BSD_OS, 66
.equ V_EPI_OS, 69
.end
|
4ms/metamodule-plugin-sdk
| 1,579
|
plugin-libc/newlib/libc/sys/a29khif/_iostat.S
|
;----------------------------------------------------------------------------
;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright 1990 Advanced Micro Devices, Inc.
;
; This software is the property of Advanced Micro Devices, Inc (AMD) which
; specifically grants the user the right to modify, use and distribute this
; software provided this notice is not removed or altered. All other rights
; are reserved by AMD.
;
; AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS
; SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL
; DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR
; USE OF THIS SOFTWARE.
;
; So that all may benefit from your experience, please report any problems
; or suggestions about this software to the 29K Technical Support Center at
; 800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or
; 0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118.
;
; Advanced Micro Devices, Inc.
; 29K Support Products
; Mail Stop 573
; 5900 E. Ben White Blvd.
; Austin, TX 78741
; 800-292-9263
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; _iostat.s
; _iostat( int fd );
;
.file "_iostat.s"
.include "sys/sysmac.h"
.text
.word 0x00030000 ; Debugger tag word
.global __iostat
.global _iostat
__iostat:
_iostat:
const tav,HIF_iostat @ asneq V_SYSCALL,gr1,gr1 @ jmpti tav,lr0 @ const tpc,_errno @ consth tpc,_errno @ store 0,0,tav,tpc @ jmpi lr0 @ constn v0,-1
.end
|
4ms/metamodule-plugin-sdk
| 1,558
|
plugin-libc/newlib/libc/sys/a29khif/_settrap.S
|
; @(#)_settrap.s 2.2 90/10/14 21:57:34, AMD
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright 1990 Advanced Micro Devices, Inc.
;
; This software is the property of Advanced Micro Devices, Inc (AMD) which
; specifically grants the user the right to modify, use and distribute this
; software provided this notice is not removed or altered. All other rights
; are reserved by AMD.
;
; AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS
; SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL
; DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR
; USE OF THIS SOFTWARE.
;
; So that all may benefit from your experience, please report any problems
; or suggestions about this software to the 29K Technical Support Center at
; 800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or
; 0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118.
;
; Advanced Micro Devices, Inc.
; 29K Support Products
; Mail Stop 573
; 5900 E. Ben White Blvd.
; Austin, TX 78741
; 800-292-9263
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; _settrap.s
; void *prevaddr = _settrap( int trapno, void *trapaddr );
;
.file "_settrap.s"
.include "sys/sysmac.h"
.text
.word 0x00040000 ; Debugger tag word
.global __settrap
__settrap:
const tav,HIF_settrap @ asneq V_SYSCALL,gr1,gr1 @ jmpti tav,lr0 @ const tpc,_errno @ consth tpc,_errno @ store 0,0,tav,tpc @ jmpi lr0 @ constn v0,-1
.end
|
4ms/metamodule-plugin-sdk
| 1,511
|
plugin-libc/newlib/libc/sys/a29khif/_query.S
|
; @(#)_query.s 2.2 90/10/14 21:57:31, AMD
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright 1990 Advanced Micro Devices, Inc.
;
; This software is the property of Advanced Micro Devices, Inc (AMD) which
; specifically grants the user the right to modify, use and distribute this
; software provided this notice is not removed or altered. All other rights
; are reserved by AMD.
;
; AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS
; SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL
; DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR
; USE OF THIS SOFTWARE.
;
; So that all may benefit from your experience, please report any problems
; or suggestions about this software to the 29K Technical Support Center at
; 800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or
; 0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118.
;
; Advanced Micro Devices, Inc.
; 29K Support Products
; Mail Stop 573
; 5900 E. Ben White Blvd.
; Austin, TX 78741
; 800-292-9263
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; _query.s
; _query( query_code );
;
.file "_query.s"
.include "sys/sysmac.h"
.text
.word 0x00030000 ; Debugger tag word
.global __query
__query:
const tav,HIF_query @ asneq V_SYSCALL,gr1,gr1 @ jmpti tav,lr0 @ const tpc,_errno @ consth tpc,_errno @ store 0,0,tav,tpc @ jmpi lr0 @ constn v0,-1
.end
|
4ms/metamodule-plugin-sdk
| 1,543
|
plugin-libc/newlib/libc/sys/a29khif/systime.S
|
; @(#)systime.s 1.2 90/10/14 21:57:59, AMD
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright 1990 Advanced Micro Devices, Inc.
;
; This software is the property of Advanced Micro Devices, Inc (AMD) which
; specifically grants the user the right to modify, use and distribute this
; software provided this notice is not removed or altered. All other rights
; are reserved by AMD.
;
; AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS
; SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL
; DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR
; USE OF THIS SOFTWARE.
;
; So that all may benefit from your experience, please report any problems
; or suggestions about this software to the 29K Technical Support Center at
; 800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or
; 0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118.
;
; Advanced Micro Devices, Inc.
; 29K Support Products
; Mail Stop 573
; 5900 E. Ben White Blvd.
; Austin, TX 78741
; 800-292-9263
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; _time.s
; time_t secs = time( time_t *secs );
;
; NOTE - Will not work on BSD (no time sys call)
;
.file "systime.s"
.include "sys/sysmac.h"
.text
.word 0x00030000 ; Debugger tag word
.global _time
_time:
const tav,HIF_time @ asneq V_SYSCALL,gr1,gr1
cpeq gr97, lr2, 0
jmpti gr97, lr0
nop
jmpi lr0
store 0, 0, gr96, lr2
.end
|
4ms/metamodule-plugin-sdk
| 1,538
|
plugin-libc/newlib/libc/sys/a29khif/_open.S
|
; @(#)_open.s 1.4 90/10/14 21:57:30, AMD
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright 1990 Advanced Micro Devices, Inc.
;
; This software is the property of Advanced Micro Devices, Inc (AMD) which
; specifically grants the user the right to modify, use and distribute this
; software provided this notice is not removed or altered. All other rights
; are reserved by AMD.
;
; AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS
; SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL
; DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR
; USE OF THIS SOFTWARE.
;
; So that all may benefit from your experience, please report any problems
; or suggestions about this software to the 29K Technical Support Center at
; 800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or
; 0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118.
;
; Advanced Micro Devices, Inc.
; 29K Support Products
; Mail Stop 573
; 5900 E. Ben White Blvd.
; Austin, TX 78741
; 800-292-9263
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; _open.s
; int fd = _open( char *path, int oflag [, int mode ] );
;
.file "_open.s"
.include "sys/sysmac.h"
.text
.word 0x00050000 ; Debugger tag word
.global __open
__open:
const tav,HIF_open @ asneq V_SYSCALL,gr1,gr1 @ jmpti tav,lr0 @ const tpc,_errno @ consth tpc,_errno @ store 0,0,tav,tpc @ jmpi lr0 @ constn v0,-1
.end
|
4ms/metamodule-plugin-sdk
| 2,081
|
plugin-libc/newlib/libc/sys/a29khif/read.S
|
; @(#)_read.s 1.4 90/10/14 21:57:32, AMD
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright 1990 Advanced Micro Devices, Inc.
;
; This software is the property of Advanced Micro Devices, Inc (AMD) which
; specifically grants the user the right to modify, use and distribute this
; software provided this notice is not removed or altered. All other rights
; are reserved by AMD.
;
; AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS
; SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL
; DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR
; USE OF THIS SOFTWARE.
;
; So that all may benefit from your experience, please report any problems
; or suggestions about this software to the 29K Technical Support Center at
; 800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or
; 0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118.
;
; Advanced Micro Devices, Inc.
; 29K Support Products
; Mail Stop 573
; 5900 E. Ben White Blvd.
; Austin, TX 78741
; 800-292-9263
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; _read.s
; int nread = _read( int fd, char *buf, int count );
;
.file "_read.s"
.include "sys/sysmac.h"
.text
.word 0x00050000 ; Debugger tag word
.global __read
;; syscalls used now -- .global _read
__read:
;; syscalls used now -- _read:
.ifdef _BSD_OS
; BSD version - uses readv const tav,HIF_call @ asneq V_SYSCALL,gr1,gr1 @ jmpti tav,lr0 @ const tpc,_errno @ consth tpc,_errno @ store 0,0,tav,tpc @ jmpi lr0 @ constn v0,-1
sub msp, msp, 8
store 0, 0, lr3, msp
add tav, msp, 4
add lr3, msp, 0
store 0, 0, lr4, tav
const lr4, 1
const tav,HIF_readv @ asneq V_SYSCALL,gr1,gr1
jmpti tav, lr0
add msp, msp, 8
const tpc,_errno @ consth tpc,_errno @ store 0,0,tav,tpc @ jmpi lr0 @ constn v0,-1
.else
const tav,HIF_read @ asneq V_SYSCALL,gr1,gr1 @ jmpti tav,lr0 @ const tpc,_errno @ consth tpc,_errno @ store 0,0,tav,tpc @ jmpi lr0 @ constn v0,-1
.endif
.end
|
4ms/metamodule-plugin-sdk
| 1,500
|
plugin-libc/newlib/libc/sys/a29khif/_exit.S
|
; @(#)_exit.s 1.2 90/10/14 21:57:22, AMD
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright 1990 Advanced Micro Devices, Inc.
;
; This software is the property of Advanced Micro Devices, Inc (AMD) which
; specifically grants the user the right to modify, use and distribute this
; software provided this notice is not removed or altered. All other rights
; are reserved by AMD.
;
; AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS
; SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL
; DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR
; USE OF THIS SOFTWARE.
;
; So that all may benefit from your experience, please report any problems
; or suggestions about this software to the 29K Technical Support Center at
; 800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or
; 0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118.
;
; Advanced Micro Devices, Inc.
; 29K Support Products
; Mail Stop 573
; 5900 E. Ben White Blvd.
; Austin, TX 78741
; 800-292-9263
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; _exit.s
; _exit( int rc );
;
.file "_exit.s"
.include "sys/sysmac.h"
.text
.word 0x00030000 ; Debugger tag word
.global __exit
__exit:
const tav,HIF_exit @ asneq V_SYSCALL,gr1,gr1 @ jmpti tav,lr0 @ const tpc,_errno @ consth tpc,_errno @ store 0,0,tav,tpc @ jmpi lr0 @ constn v0,-1
.end
|
4ms/metamodule-plugin-sdk
| 1,577
|
plugin-libc/newlib/libc/sys/a29khif/remove.S
|
; @(#)remove.s 1.3 90/10/14 21:57:53, AMD
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright 1990 Advanced Micro Devices, Inc.
;
; This software is the property of Advanced Micro Devices, Inc (AMD) which
; specifically grants the user the right to modify, use and distribute this
; software provided this notice is not removed or altered. All other rights
; are reserved by AMD.
;
; AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS
; SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL
; DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR
; USE OF THIS SOFTWARE.
;
; So that all may benefit from your experience, please report any problems
; or suggestions about this software to the 29K Technical Support Center at
; 800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or
; 0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118.
;
; Advanced Micro Devices, Inc.
; 29K Support Products
; Mail Stop 573
; 5900 E. Ben White Blvd.
; Austin, TX 78741
; 800-292-9263
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; remove.s
; int cc = remove( char *path );
;
.file "remove.s"
.include "sys/sysmac.h"
.text
.word 0x00030000 ; Debugger tag word
.global _remove
.global __remove
.global __unlink
_remove:
__remove:
__unlink:
const tav,HIF_remove @ asneq V_SYSCALL,gr1,gr1 @ jmpti tav,lr0 @ const tpc,_errno @ consth tpc,_errno @ store 0,0,tav,tpc @ jmpi lr0 @ constn v0,-1
.end
|
4ms/metamodule-plugin-sdk
| 1,614
|
plugin-libc/newlib/libc/sys/a29khif/_lseek.S
|
; @(#)_lseek.s 1.4 90/10/14 21:57:28, AMD
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright 1990 Advanced Micro Devices, Inc.
;
; This software is the property of Advanced Micro Devices, Inc (AMD) which
; specifically grants the user the right to modify, use and distribute this
; software provided this notice is not removed or altered. All other rights
; are reserved by AMD.
;
; AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS
; SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL
; DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR
; USE OF THIS SOFTWARE.
;
; So that all may benefit from your experience, please report any problems
; or suggestions about this software to the 29K Technical Support Center at
; 800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or
; 0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118.
;
; Advanced Micro Devices, Inc.
; 29K Support Products
; Mail Stop 573
; 5900 E. Ben White Blvd.
; Austin, TX 78741
; 800-292-9263
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; _lseek.s
; int cc = _lseek( int fd, long offset, int whence );
;
.file "_lseek.s"
.include "sys/sysmac.h"
.text
.word 0x00050000 ; Debugger tag word
.global __lseek
;; syscalls used now -- .global _lseek
__lseek:
;; syscalls used now -- _lseek:
const tav,HIF_lseek @ asneq V_SYSCALL,gr1,gr1 @ jmpti tav,lr0 @ const tpc,_errno @ consth tpc,_errno @ store 0,0,tav,tpc @ jmpi lr0 @ constn v0,-1
.end
|
4ms/metamodule-plugin-sdk
| 1,559
|
plugin-libc/newlib/libc/sys/a29khif/rename.S
|
; @(#)rename.s 1.3 90/10/14 21:57:54, AMD
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright 1990 Advanced Micro Devices, Inc.
;
; This software is the property of Advanced Micro Devices, Inc (AMD) which
; specifically grants the user the right to modify, use and distribute this
; software provided this notice is not removed or altered. All other rights
; are reserved by AMD.
;
; AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS
; SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL
; DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR
; USE OF THIS SOFTWARE.
;
; So that all may benefit from your experience, please report any problems
; or suggestions about this software to the 29K Technical Support Center at
; 800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or
; 0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118.
;
; Advanced Micro Devices, Inc.
; 29K Support Products
; Mail Stop 573
; 5900 E. Ben White Blvd.
; Austin, TX 78741
; 800-292-9263
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; rename.s
; int cc = rename( char *from, char *to );
;
.file "rename.s"
.include "sys/sysmac.h"
.text
.word 0x00040000 ; Debugger tag word
.global _rename
.global __rename
_rename:
__rename:
const tav,HIF_rename @ asneq V_SYSCALL,gr1,gr1 @ jmpti tav,lr0 @ const tpc,_errno @ consth tpc,_errno @ store 0,0,tav,tpc @ jmpi lr0 @ constn v0,-1
.end
|
4ms/stm32mp1-baremetal
| 1,785
|
third-party/u-boot/u-boot-stm32mp1-baremetal/board/freescale/m54455evb/sbf_dram_init.S
|
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Board-specific sbf ddr/sdram init.
*
* (C) Copyright 2017 Angelo Dureghello <angelo@sysam.it>
*/
#include <config.h>
.global sbf_dram_init
.text
sbf_dram_init:
/* Dram Initialization a1, a2, and d0 */
/* mscr sdram */
move.l #0xFC0A4074, %a1
move.b #(CONFIG_SYS_SDRAM_DRV_STRENGTH), (%a1)
nop
/* SDRAM Chip 0 and 1 */
move.l #0xFC0B8110, %a1
move.l #0xFC0B8114, %a2
/* calculate the size */
move.l #0x13, %d1
move.l #(CONFIG_SYS_SDRAM_SIZE), %d2
#ifdef CONFIG_SYS_SDRAM_BASE1
lsr.l #1, %d2
#endif
dramsz_loop:
lsr.l #1, %d2
add.l #1, %d1
cmp.l #1, %d2
bne dramsz_loop
#ifdef CONFIG_SYS_NAND_BOOT
beq asm_nand_chk_status
#endif
/* SDRAM Chip 0 and 1 */
move.l #(CONFIG_SYS_SDRAM_BASE), (%a1)
or.l %d1, (%a1)
#ifdef CONFIG_SYS_SDRAM_BASE1
move.l #(CONFIG_SYS_SDRAM_BASE1), (%a2)
or.l %d1, (%a2)
#endif
nop
/* dram cfg1 and cfg2 */
move.l #0xFC0B8008, %a1
move.l #(CONFIG_SYS_SDRAM_CFG1), (%a1)
nop
move.l #0xFC0B800C, %a2
move.l #(CONFIG_SYS_SDRAM_CFG2), (%a2)
nop
move.l #0xFC0B8000, %a1 /* Mode */
move.l #0xFC0B8004, %a2 /* Ctrl */
/* Issue PALL */
move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
nop
/* Issue LEMR */
move.l #(CONFIG_SYS_SDRAM_EMOD + 0x408), (%a1)
nop
move.l #(CONFIG_SYS_SDRAM_MODE + 0x300), (%a1)
nop
move.l #1000, %d1
bsr asm_delay
/* Issue PALL */
move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
nop
/* Perform two refresh cycles */
move.l #(CONFIG_SYS_SDRAM_CTRL + 4), %d0
nop
move.l %d0, (%a2)
move.l %d0, (%a2)
nop
move.l #(CONFIG_SYS_SDRAM_MODE + 0x200), (%a1)
nop
move.l #500, %d1
bsr asm_delay
move.l #(CONFIG_SYS_SDRAM_CTRL), %d1
and.l #0x7FFFFFFF, %d1
or.l #0x10000C00, %d1
move.l %d1, (%a2)
nop
move.l #2000, %d1
bsr asm_delay
rts
|
4ms/metamodule-plugin-sdk
| 7,204
|
plugin-libc/newlib/libc/sys/a29khif/crt0.S
|
; @(#)crt0.s 2.7 90/10/15 13:17:57, AMD
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright 1988, 1989, 1990 Advanced Micro Devices, Inc.
;
; This software is the property of Advanced Micro Devices, Inc (AMD) which
; specifically grants the user the right to modify, use and distribute this
; software provided this notice is not removed or altered. All other rights
; are reserved by AMD.
;
; AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS
; SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL
; DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR
; USE OF THIS SOFTWARE.
;
; So that all may benefit from your experience, please report any problems
; or suggestions about this software to the 29K Technical Support Center at
; 800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or
; 0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118.
;
; Advanced Micro Devices, Inc.
; 29K Support Products
; Mail Stop 573
; 5900 E. Ben White Blvd.
; Austin, TX 78741
; 800-292-9263
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
.file "crt0.s"
; crt0.s version 2.1-7
;
; This module gets control from the OS.
; It saves away the Am29027 Mode register settings and
; then sets up the pointers to the resident spill and fill
; trap handlers. It then establishes argv and argc for passing
; to main. It then calls _main. If main returns, it calls _exit.
;
; void = start( );
; NOTE - not C callable (no lead underscore)
;
.include "sys/sysmac.h"
;
;
.extern V_SPILL, V_FILL
.comm __29027Mode, 8 ; A shadow of the mode register
.comm __LibInit, 4
.comm __environ, 4 ; Environment variables, currently none.
.text
.extern _main, _exit
.extern _memset
.word 0 ; Terminating tag word
.global start
start:
sub gr1, gr1, 6 * 4
asgeu V_SPILL, gr1, rab ; better not ever happen
add lr1, gr1, 6 * 4
;
; Initialize the .bss section to zero by using the memset library function.
; The .bss initialization section below has been commented out as it breaks
; XRAY29K that has been released. The operators sizeof and startof create
; new sections that are not recognized by XRAY29k, but will be implemented
; in the next release (2.0).
;
; const lr4, $sizeof(.bss) ; get size of .bss section to zero out
; consth lr4, $sizeof(.bss)
; const lr2, $startof(.bss) ; Get start address of .bss section
; consth lr2, $startof(.bss)
; const lr0, _memset ; address of memset function
; consth lr0, _memset
; calli lr0, lr0 ; call memset function
; const lr3, 0
; Save the initial value of the Am29027's Mode register
; If your const tav,HIF_does @ asneq V_SYSCALL,gr1,gr1 @ jmpti tav,lr0 @ const tpc,_errno @ consth tpc,_errno @ store 0,0,tav,tpc @ jmpi lr0 @ constn v0,-1 not enter crt0 with value for Am29027's Mode register
; in gr96 and gr97, and also if the coprocessor is active uncomment the
; next 4 lines.
; const gr96, 0xfc00820
; consth gr96, 0xfc00820
; const gr97, 0x1375
; store 1, 3, gr96, gr97
;
const gr98, __29027Mode
consth gr98, __29027Mode
store 0, 0, gr96, gr98
add gr98, gr98, 4
store 0, 0, gr97, gr98
;
; Now call the const tav,HIF_to @ asneq V_SYSCALL,gr1,gr1 @ jmpti tav,lr0 @ const tpc,_errno @ consth tpc,_errno @ store 0,0,tav,tpc @ jmpi lr0 @ constn v0,-1 setup the spill and fill trap handlers
;
const lr3, spill
consth lr3, spill
const lr2, V_SPILL
const tav,HIF_setvec @ asneq V_SYSCALL,gr1,gr1
const lr3, fill
consth lr3, fill
const lr2, V_FILL
const tav,HIF_setvec @ asneq V_SYSCALL,gr1,gr1
;
; Set up dividu handler, since native one don't work?!
; Set it up by hand (FIXME) since HIF_settrap doesn't work either!
;
; const lr3,Edividu
; consth lr3,Edividu
;
; const lr2,35
; const tav,HIF_settrap @ asneq V_SYSCALL,gr1,gr1
; asge 0x50,gr121,0 ; check whether it failed
; const lr2,0x8000008c ; abs addr of dividu trap handler on EB
; consth lr2,0x8000008c
; store 0,0,lr3,lr2 ; Clobber vector FIXME
;
; Get the argv base address and calculate argc.
;
const tav,HIF_getargs @ asneq V_SYSCALL,gr1,gr1
add lr3, v0, 0 ; argv
add lr4, v0, 0
constn lr2, -1
argcloop: ; scan for NULL terminator
load 0, 0, gr97, lr4
add lr4, lr4, 4
cpeq gr97, gr97, 0
jmpf gr97, argcloop
add lr2, lr2, 1
;
; Now call LibInit, if there is one. To aid runtime libraries
; that need to do some startup initialization, we have created
; a bss variable called LibInit. If the library doesn't need
; any run-time initialization, the variable is still 0. If the
; library does need run-time initialization, the library will
; contain a definition like
; void (*_LibInit)(void) = LibInitFunction;
; The linker will match up our bss LibInit with this data LibInit
; and the variable will not be 0.
;
const lr0, __LibInit
consth lr0, __LibInit
load 0, 0, lr0, lr0
cpeq gr96, lr0, 0
jmpt gr96, NoLibInit
nop
calli lr0, lr0
nop
NoLibInit:
;
; call main, passing it 2 arguments. main( argc, argv )
;
const lr0, _main
consth lr0, _main
calli lr0, lr0
nop
;
; call exit
;
const lr0, _exit
consth lr0, _exit
calli lr0, lr0
add lr2, gr96, 0
;
; Should never get here, but just in case
;
loop:
const tav,HIF_exit @ asneq V_SYSCALL,gr1,gr1
jmp loop
nop
.sbttl "Spill and Fill trap handlers"
.eject
;
; SPILL, FILL trap handlers
;
; Note that these Spill and Fill trap handlers allow the OS to
; assume that the only registers of use are between gr1 and rfb.
; Therefore, if the OS desires to, it may simply preserve from
; lr0 for (rfb-gr1)/4 registers when doing a context save.
;
;
; Here is the spill handler
;
; spill registers from [*gr1..*rab)
; and move rab downto where gr1 points
;
; rab must change before rfb for signals to work
;
; On entry: rfb - rab = windowsize, gr1 < rab
; Near the end: rfb - rab > windowsize, gr1 == rab
; On exit: rfb - rab = windowsize, gr1 == rab
;
.global spill
spill:
sub tav, rab, gr1 ; tav = number of bytes to spill
srl tav, tav, 2 ; change byte count to word count
sub tav, tav, 1 ; make count zero based
mtsr cr, tav ; set Count Remaining register
sub tav, rab, gr1
sub tav, rfb, tav ; pull down free bound and save it in rab
add rab, gr1, 0 ; first pull down allocate bound
storem 0, 0, lr0, tav ; store lr0..lr(tav) into rfb
jmpi tpc ; return...
add rfb, tav, 0
;
; Here is the fill handler
;
; fill registers from [*rfb..*lr1)
; and move rfb upto where lr1 points.
;
; rab must change before rfb for signals to work
;
; On entry: rfb - rab = windowsize, lr1 > rfb
; Near the end: rfb - rab < windowsize, lr1 == rab + windowsize
; On exit: rfb - rab = windowsize, lr1 == rfb
;
.global fill
fill:
const tav, 0x80 << 2
or tav, tav, rfb ; tav = ((rfb>>2) | 0x80)<<2 == [rfb]<<2
mtsr ipa, tav ; ipa = [rfb]<<2 == 1st reg to fill
; gr0 is now the first reg to spill
sub tav, lr1, rfb ; tav = number of bytes to spill
add rab, rab, tav ; push up allocate bound
srl tav, tav, 2 ; change byte count to word count
sub tav, tav, 1 ; make count zero based
mtsr cr, tav ; set Count Remaining register
loadm 0, 0, gr0, rfb ; load registers
jmpi tpc ; return...
add rfb, lr1, 0 ; ... first pushing up free bound
.end
|
4ms/metamodule-plugin-sdk
| 1,306
|
plugin-libc/newlib/libc/sys/a29khif/_fstat.S
|
.file "_fstat.c"
.sect .lit,lit
gcc2_compiled.:
.text
.align 4
.global __fstat
;; syscalls used now -- .global _fstat
.word 0x40000
__fstat:
;; syscalls used now -- _fstat:
sub gr1,gr1,32
asgeu V_SPILL,gr1,gr126
add lr1,gr1,48
sll lr5,lr10,0
const gr116,__iostat
consth gr116,__iostat
calli lr0,gr116
sll lr2,lr5,0
sll lr10,gr96,0
jmpt lr10,L8
sll gr116,lr10,30
jmpf gr116,L3
add gr116,lr11,12
add gr117,lr11,12
const gr116,4096
store 0,0,gr116,gr117
add gr117,lr11,4
const gr116,1
jmp L4
store 0,0,gr116,gr117
L3:
const gr117,8192
store 0,0,gr117,gr116
add gr116,lr11,4
store 0,0,gr117,gr116
L4:
add gr117,lr11,20
const gr116,0
store 0,0,gr116,gr117
store 0,0,gr116,lr11
const gr116,_time
consth gr116,_time
calli lr0,gr116
const lr2,0
add gr116,lr11,16
store 0,0,gr96,gr116
sll lr2,lr5,0
const lr3,0
const lr7,__lseek
consth lr7,__lseek
calli lr0,lr7
const lr4,1
sll lr10,gr96,0
constn lr6,65535
cpneq gr116,lr10,lr6
jmpf gr116,L7
sll lr2,lr5,0
const lr3,0
calli lr0,lr7
const lr4,2
add gr116,lr11,8
store 0,0,gr96,gr116
cpneq gr96,gr96,lr6
jmpf gr96,L7
sll lr2,lr5,0
sll lr3,lr10,0
calli lr0,lr7
const lr4,0
cpneq gr96,gr96,lr6
jmpt gr96,L8
const gr96,0
L7:
constn gr96,65535
L8:
add gr1,gr1,32
nop
jmpi lr0
asleu V_FILL,lr1,gr127
|
4ms/metamodule-plugin-sdk
| 1,533
|
plugin-libc/newlib/libc/sys/a29khif/clock.S
|
; @(#)clock.s 1.3 90/10/14 21:57:43, AMD
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright 1990 Advanced Micro Devices, Inc.
;
; This software is the property of Advanced Micro Devices, Inc (AMD) which
; specifically grants the user the right to modify, use and distribute this
; software provided this notice is not removed or altered. All other rights
; are reserved by AMD.
;
; AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS
; SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL
; DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR
; USE OF THIS SOFTWARE.
;
; So that all may benefit from your experience, please report any problems
; or suggestions about this software to the 29K Technical Support Center at
; 800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or
; 0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118.
;
; Advanced Micro Devices, Inc.
; 29K Support Products
; Mail Stop 573
; 5900 E. Ben White Blvd.
; Austin, TX 78741
; 800-292-9263
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; clock.s
; long ticks = clock( );
;
.file "clock.s"
.include "sys/sysmac.h"
.text
.word 0x00020000 ; Debugger tag word
.global _clock
.global __clock
_clock:
__clock:
const tav,HIF_clock @ asneq V_SYSCALL,gr1,gr1 @ jmpti tav,lr0 @ const tpc,_errno @ consth tpc,_errno @ store 0,0,tav,tpc @ jmpi lr0 @ constn v0,-1
.end
|
4ms/metamodule-plugin-sdk
| 1,587
|
plugin-libc/newlib/libc/sys/a29khif/_close.S
|
; @(#)_close.s 1.4 90/10/14 21:57:20, AMD
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright 1990 Advanced Micro Devices, Inc.
;
; This software is the property of Advanced Micro Devices, Inc (AMD) which
; specifically grants the user the right to modify, use and distribute this
; software provided this notice is not removed or altered. All other rights
; are reserved by AMD.
;
; AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS
; SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL
; DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR
; USE OF THIS SOFTWARE.
;
; So that all may benefit from your experience, please report any problems
; or suggestions about this software to the 29K Technical Support Center at
; 800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or
; 0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118.
;
; Advanced Micro Devices, Inc.; 29K Support Products
; Mail Stop 573
; 5900 E. Ben White Blvd.
; Austin, TX 78741
; 800-292-9263
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; _close.s
; int cc = _close( int fd );
;
.file "_close.s"
.include "sys/sysmac.h"
.text
.word 0x00030000 ; Debugger tag word
.global __close
;; syscalls used now -- .global _close
__close:
;; syscalls used now -- _close:
const tav,HIF_close @ asneq V_SYSCALL,gr1,gr1 @ jmpti tav,lr0 @ const tpc,_errno @ consth tpc,_errno @ store 0,0,tav,tpc @ jmpi lr0 @ constn v0,-1
.end
|
4ms/metamodule-plugin-sdk
| 1,614
|
plugin-libc/newlib/libc/sys/a29khif/_write.S
|
; @(#)_write.s 1.4 90/10/14 21:57:37, AMD
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright 1990 Advanced Micro Devices, Inc.
;
; This software is the property of Advanced Micro Devices, Inc (AMD) which
; specifically grants the user the right to modify, use and distribute this
; software provided this notice is not removed or altered. All other rights
; are reserved by AMD.
;
; AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS
; SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL
; DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR
; USE OF THIS SOFTWARE.
;
; So that all may benefit from your experience, please report any problems
; or suggestions about this software to the 29K Technical Support Center at
; 800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or
; 0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118.
;
; Advanced Micro Devices, Inc.
; 29K Support Products
; Mail Stop 573
; 5900 E. Ben White Blvd.
; Austin, TX 78741
; 800-292-9263
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; _write.s
; int written = _write( int fd, char *buf, int count );
;
.file "_write.s"
.include "sys/sysmac.h"
.text
.word 0x00050000 ; Debugger tag word
.global __write
;; syscalls used now -- .global _write
__write:
;; syscalls used now -- _write:
const tav,HIF_write @ asneq V_SYSCALL,gr1,gr1 @ jmpti tav,lr0 @ const tpc,_errno @ consth tpc,_errno @ store 0,0,tav,tpc @ jmpi lr0 @ constn v0,-1
.end
|
4ms/stm32mp1-baremetal
| 2,541
|
third-party/u-boot/u-boot-stm32mp1-baremetal/board/freescale/mx31pdk/lowlevel_init.S
|
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* (C) Copyright 2009 Magnus Lilja <lilja.magnus@gmail.com>
*/
#include <config.h>
#include <asm/arch/imx-regs.h>
#include <asm/macro.h>
.globl lowlevel_init
lowlevel_init:
/* Also setup the Peripheral Port Remap register inside the core */
ldr r0, =ARM_PPMRR /* start from AIPS 2GB region */
mcr p15, 0, r0, c15, c2, 4
write32 IPU_CONF, IPU_CONF_DI_EN
write32 CCM_CCMR, CCM_CCMR_SETUP
wait_timer 0x40000
write32 CCM_CCMR, CCM_CCMR_SETUP | CCMR_MPE
write32 CCM_CCMR, (CCM_CCMR_SETUP | CCMR_MPE) & ~CCMR_MDS
/* Set up clock to 532MHz */
write32 CCM_PDR0, CCM_PDR0_SETUP_532MHZ
write32 CCM_MPCTL, CCM_MPCTL_SETUP_532MHZ
write32 CCM_SPCTL, PLL_PD(1) | PLL_MFD(4) | PLL_MFI(12) | PLL_MFN(1)
/* Set up MX31 DDR pins */
write32 IOMUXC_SW_PAD_CTL_SDCKE1_SDCLK_SDCLK_B, 0
write32 IOMUXC_SW_PAD_CTL_CAS_SDWE_SDCKE0, 0
write32 IOMUXC_SW_PAD_CTL_BCLK_RW_RAS, 0
write32 IOMUXC_SW_PAD_CTL_CS2_CS3_CS4, 0x1000
write32 IOMUXC_SW_PAD_CTL_DQM3_EB0_EB1, 0
write32 IOMUXC_SW_PAD_CTL_DQM0_DQM1_DQM2, 0
write32 IOMUXC_SW_PAD_CTL_SD29_SD30_SD31, 0
write32 IOMUXC_SW_PAD_CTL_SD26_SD27_SD28, 0
write32 IOMUXC_SW_PAD_CTL_SD23_SD24_SD25, 0
write32 IOMUXC_SW_PAD_CTL_SD20_SD21_SD22, 0
write32 IOMUXC_SW_PAD_CTL_SD17_SD18_SD19, 0
write32 IOMUXC_SW_PAD_CTL_SD14_SD15_SD16, 0
write32 IOMUXC_SW_PAD_CTL_SD11_SD12_SD13, 0
write32 IOMUXC_SW_PAD_CTL_SD8_SD9_SD10, 0
write32 IOMUXC_SW_PAD_CTL_SD5_SD6_SD7, 0
write32 IOMUXC_SW_PAD_CTL_SD2_SD3_SD4, 0
write32 IOMUXC_SW_PAD_CTL_SDBA0_SD0_SD1, 0
write32 IOMUXC_SW_PAD_CTL_A24_A25_SDBA1, 0
write32 IOMUXC_SW_PAD_CTL_A21_A22_A23, 0
write32 IOMUXC_SW_PAD_CTL_A18_A19_A20, 0
write32 IOMUXC_SW_PAD_CTL_A15_A16_A17, 0
write32 IOMUXC_SW_PAD_CTL_A12_A13_A14, 0
write32 IOMUXC_SW_PAD_CTL_A10_MA10_A11, 0
write32 IOMUXC_SW_PAD_CTL_A7_A8_A9, 0
write32 IOMUXC_SW_PAD_CTL_A4_A5_A6, 0
write32 IOMUXC_SW_PAD_CTL_A1_A2_A3, 0
write32 IOMUXC_SW_PAD_CTL_VPG0_VPG1_A0, 0
/* Set up MX31 DDR Memory Controller */
write32 WEIM_ESDMISC, ESDMISC_MDDR_SETUP
write32 WEIM_ESDCFG0, ESDCFG0_MDDR_SETUP
/* Perform DDR init sequence */
write32 WEIM_ESDCTL0, ESDCTL_PRECHARGE
write32 CSD0_BASE | 0x0f00, 0x12344321
write32 WEIM_ESDCTL0, ESDCTL_AUTOREFRESH
write32 CSD0_BASE, 0x12344321
write32 CSD0_BASE, 0x12344321
write32 WEIM_ESDCTL0, ESDCTL_LOADMODEREG
write8 CSD0_BASE | 0x00000033, 0xda
write8 CSD0_BASE | 0x01000000, 0xff
write32 WEIM_ESDCTL0, ESDCTL_RW
write32 CSD0_BASE, 0xDEADBEEF
write32 WEIM_ESDMISC, ESDMISC_MDDR_RESET_DL
mov pc, lr
|
4ms/metamodule-plugin-sdk
| 12,702
|
plugin-libc/newlib/libc/sys/a29khif/signal.S
|
;@(#)signal.s 2.15 90/10/14 21:57:55, AMD
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright 1990 Advanced Micro Devices, Inc.
;
; This software is the property of Advanced Micro Devices, Inc (AMD) which
; specifically grants the user the right to modify, use and distribute this
; software provided this notice is not removed or altered. All other rights
; are reserved by AMD.
;
; AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS
; SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL
; DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR
; USE OF THIS SOFTWARE.
;
; So that all may benefit from your experience, please report any problems
; or suggestions about this software to the 29K Technical Support Center at
; 800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or
; 0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118.
;
; Advanced Micro Devices, Inc.
; 29K Support Products
; Mail Stop 573
; 5900 E. Ben White Blvd.
; Austin, TX 78741
; 800-292-9263
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
.file "signal.s"
; SigEntry is the address of an array of C-level user code signal handlers.
; They must return to the top-level before doing a sigret() return function.
; Nested signals are supported.
.extern V_SPILL, V_FILL
.extern fill ; In crt0.s
.align 4
.comm WindowSize, 4
.data
SigEntry:
.word 0 ; reserved
.word 0 ; adds. of #2 SIGINT handler
.word 0 ; reserved
.word 0 ; reserved
.word 0 ; reserved
.word 0 ; reserved
.word 0 ; reserved
.word 0 ; adds. of #8 SIGFPE handler
.text
.reg v0, gr96
.reg v1, gr97
.reg v2, gr98
.reg v3, gr99
.reg tav, gr121
.reg tpc, gr122
.reg lrp, gr123
.reg slp, gr124
.reg msp, gr125
.reg rab, gr126
.reg rfb, gr127
;=================================================================== setjmp()
; int
; setjmp(label_t jmpbuf)
; {
; *jmpbuf = {gr1, msp, lr0, lr1};
; return 0;
; }
;
.global _setjmp
_setjmp:
store 0, 0, gr1, lr2
add lr2, lr2, 4
store 0, 0, msp, lr2
add lr2, lr2, 4
store 0, 0, lr0, lr2
add lr2, lr2, 4
store 0, 0, lr1, lr2
jmpi lr0
const v0, 0
;
;==================================================================== longjmp()
; int
; longjmp(label_t jmpbuf, int value)
; {
; /* BUG: check for this
; if (msp > jmpbuf->msp || gr1 > jmpbuf->gr1)
; longjmperror();
; */
;
; gr1 = jmpbuf->gr1;
; lr2addr = jmpbuf->gr1 + 8;
; msp = jmpbuf->msp;
;
; /* saved lr1 is invalid if saved lr2addr > rfb */
; if (lr2addr > rfb) {
; /*
; * None of the registers are useful.
; * Set rfb to lr2addr - 512 & rab to rfb - 512.
; * the FILL assert will take care of filling
; */
; lr1 = jmpbuf->lr1;
; rab = lr2addr - windowsize;
; rfb = lr2addr;
; }
;
; lr0 = jmpbuf->lr0;
; if (rfb < lr1)
; raise V_FILL;
; return value;
; }
;
.global _longjmp
_longjmp:
load 0, 0, tav, lr2 ; copy in gr1
add v1, lr2, 4 ; v1 points to msp
; make sure we return a non-zero value
cpeq v0, lr3, 0
srl v0, v0, 31
or v0, lr3, v0
add gr1, tav, 0 ; now update gr1
add tav, tav, 8 ; calculate lr2addr
load 0, 0, msp, v1 ; update msp from jmpbuf
cpleu v3, tav, rfb ; if (lr2addr > rfb)
jmpt v3, $1 ; {
add v1, v1, 4 ; v1 points to lr0
add v2, v1, 4 ; v2 points to lr1
load 0, 0, lr1, v2 ; lr1 = value from jmpbuf
sub v3, rfb, rab ;
sub rab, tav, v3 ; rab = lr2addr - windowsize
add rfb, tav, 0 ; rfb = lr2addr
$1: ; }
load 0, 0, lr0, v1
jmpi lr0
asgeu V_FILL, rfb, lr1 ; may fill from rfb to lr1
;
;================================================================== sigcode
; About to deliver a signal to a user mode signal handler.
; msp+(15*4) = signal_number
; msp+(14*4) = gr1
; msp+(13*4) = rab
; msp+(12*4) = PC0
; msp+(11*4) = PC1
; msp+(10*4) = PC2
; msp+( 9*4) = CHA
; msp+( 8*4) = CHD
; msp+( 7*4) = CHC
; msp+( 6*4) = ALU
; msp+( 5*4) = OPS
; msp+( 4*4) = gr121
; msp+( 3*4) = gr99
; msp+( 2*4) = gr98
; msp+( 1*4) = gr97
; msp = gr96
; The state of all the registers (except for msp, chc and rab)
; is the same as when the process was interrupted.
;
; We must make the stack and window consistent before calling the handler
; The orignal rab value is on the stack. The interrupt handler placed
; rfb-Windowsize in rab. This is required to support nested interrupts.
;
; Note that the window becomes incosistent only during certain
; critical sections in spill, fill, longjmp and sigcode.
; rfb - rab > windowsize => we are in spill
; rfb - rab < windowsize => we are in fill
; gr1 + 8 > rfb => we are in long-longjmp case
; In case of spill, fill and lonjmp; rab is modified first,
; so if we are in one of these critical sections,
; we set rab to rfb - WINDOWSIZE.
;
.equ SIGCTX_SIZE, (16)*4
.equ SIGCTX_SIGNUMB, (15)*4
.equ SIGCTX_GR1_OFFSET, (14)*4
.equ SIGCTX_RAB_OFFSET, (13)*4
.equ SIGCTX_PC0_OFFSET, (12)*4
.equ SIGCTX_PC1_OFFSET, (11)*4
.equ SIGCTX_PC2_OFFSET, (10)*4
.equ SIGCTX_CHC_OFFSET, (7)*4
.equ SIGCTX_OPS_OFFSET, (5)*4
.equ SIGCTX_TAV_OFFSET, (4)*4
.global sigcode
sigcode:
; -------------------------------------------------------- R-Stack fixup
const v0, WindowSize ; get register cache size
consth v0, WindowSize
load 0, 0, v0, v0
add v2, msp, SIGCTX_RAB_OFFSET
load 0, 0, v2, v2 ; get interrupted rab value
sub v1, rfb, v2 ; determine if rfb-rab <= WINDOW_SIZE
cpgeu v1, v1, v0 ;
jmpt v1, nfill ; jmp if spill or 'normal' interrupt
add v1, gr1, 8
cpgt v1, v1, rfb ; interrupted longjmp can look like fill
jmpf v1, nfill ; test for long-longjmp interruption
nop ; jmp if gr1+8 <= rfb
; Fixup signal stack to re-start interrupted fill
; backup pc1 -- this is needed for the partial fill case.
; Clear chc so an interrupted load/store does not restart.
; Reset rab to a window distance below rfb, rab shall be
; decremented again on re-starting the interrupted fill.
; The interrupt handler set rab=rfb-WindowSize.
;
add v0, msp, SIGCTX_RAB_OFFSET
store 0, 0, rab, v0 ; re-store (rfb-WindowSize) for rab
const v2, fill
consth v2, fill
add v0, msp, SIGCTX_PC1_OFFSET
store 0, 0, v2, v0
sub v2, v2, 4 ; determine pc0
add v0, msp, SIGCTX_PC0_OFFSET
store 0, 0, v2, v0
const v2, 0 ; clear chc
add v0, msp, SIGCTX_CHC_OFFSET
store 0, 0, v2, v0
nfill:
cpgt v0, gr1, rfb ; if gr1 > rfb then gr1 = rfb
jmpt v0, lower
cplt v0, gr1, rab ; if gr1 < rab then gr1 = rab
jmpt v0, raise
nop
; -------------------------------------------------------- save_regs
sig1: sub msp, msp, (4+2+25)*4 ; reserve space for regs
mfsr gr96, ipc
mfsr gr97, ipa
mfsr gr98, ipb
mfsr gr99, q
mtsrim cr, 4-1
storem 0, 0, gr96, msp
; "push" registers stack support
add gr96, lr1, 0
add gr97, rfb, 0
mtsrim cr, 2-1
add gr99, msp, 2*4
storem 0, 0, gr96, gr99
; "push" remaining global registers
mtsrim cr, 25-1 ; gr100-gr124
add gr96, msp, (4+2)*4
storem 0, 0, gr100, gr96
;
; -------------------------------------------------------- Dummy Call
.equ RALLOC, 4*4 ; make space for function calls
add v0, rfb, 0 ; store original rfb
sub gr1, gr1, RALLOC
asgeu V_SPILL, gr1, rab
add lr1, v0, 0 ; set lr1 = original rfb
add v1, msp, (4+2+25)*4 + SIGCTX_SIGNUMB
load 0, 0, lr2, v1 ; restore signal number
sub v1, lr2, 1 ; get handler index
sll v1, v1, 2 ; point to addresses
;
; -------------------------------------------------------- call C-level
; Handler must not use HIF services other than the _sigret() type.
const v0, SigEntry
consth v0, SigEntry
add v0, v0, v1
load 0, 0, v0, v0 ; determine if handler registered
cpeq v1, v0, 0
jmpt v1, NoHandler
nop
calli lr0, v0 ; call C-level signal handler
nop
;
; -------------------------------------------------------- default return
NoHandler:
jmp __sigdfl
nop
; -------------------------------------------------------- support bits
lower: sll gr1, rfb, 0
jmp sig1
nop
raise: sll gr1, rab, 0
jmp sig1
nop
/*
; -------------------------------------------------------- repair_regs
mtsrim cr, 4-1
loadm 0, 0, gr96, msp
mtsr ipc, gr96
mtsr ipa, gr97
mtsr ipb, gr98
mtsr Q, gr99
; "pop" registers stack support
mtsrim cr, 2-1
add gr99, msp, 2*4
loadm 0, 0, gr96, gr99
add lr1, gr96, 0
add rfb, gr97, 0
; "pop" remaining global registers
mtsrim cr, 25-1 ; gr100-gr124
add gr96, msp, (4+2)*4
loadm 0, 0, gr100, gr96
add msp, msp, (4+2+25)*4 ; repair msp to save_regs entry value
; -------------------------------------------------------- end repair
*/
; ======================================================== _sigret()
.global __sigret
__sigret:
; repair_regs
; -------------------------------------------------------- repair_regs
mtsrim cr, 4-1
loadm 0, 0, gr96, msp
mtsr ipc, gr96
mtsr ipa, gr97
mtsr ipb, gr98
mtsr q, gr99
; "pop" registers stack support
mtsrim cr, 2-1
add gr99, msp, 2*4
loadm 0, 0, gr96, gr99
add lr1, gr96, 0
add rfb, gr97, 0
; "pop" remaining global registers
mtsrim cr, 25-1 ; gr100-gr124
add gr96, msp, (4+2)*4
loadm 0, 0, gr100, gr96
add msp, msp, (4+2+25)*4 ; repair msp to save_regs entry value
; -------------------------------------------------------- end repair
const tav, 323 ; HIF _sigret
asneq 69, gr1,gr1
halt ; commit suicide if returns
; ======================================================== _sigdfl()
.global __sigdfl
__sigdfl:
; repair_regs
; -------------------------------------------------------- repair_regs
mtsrim cr, 4-1
loadm 0, 0, gr96, msp
mtsr ipc, gr96
mtsr ipa, gr97
mtsr ipb, gr98
mtsr q, gr99
; "pop" registers stack support
mtsrim cr, 2-1
add gr99, msp, 2*4
loadm 0, 0, gr96, gr99
add lr1, gr96, 0
add rfb, gr97, 0
; "pop" remaining global registers
mtsrim cr, 25-1 ; gr100-gr124
add gr96, msp, (4+2)*4
loadm 0, 0, gr100, gr96
add msp, msp, (4+2+25)*4 ; repair msp to save_regs entry value
; -------------------------------------------------------- end repair
const tav, 322 ; HIF _sigdfl
asneq 69, gr1,gr1
halt ; commit suicide if returns
; ======================================================== _sigrep()
__sigrep:
.global __sigrep
; repair_regs
; -------------------------------------------------------- repair_regs
mtsrim cr, 4-1
loadm 0, 0, gr96, msp
mtsr ipc, gr96
mtsr ipa, gr97
mtsr ipb, gr98
mtsr q, gr99
; "pop" registers stack support
mtsrim cr, 2-1
add gr99, msp, 2*4
loadm 0, 0, gr96, gr99
add lr1, gr96, 0
add rfb, gr97, 0
; "pop" remaining global registers
mtsrim cr, 25-1 ; gr100-gr124
add gr96, msp, (4+2)*4
loadm 0, 0, gr100, gr96
add msp, msp, (4+2+25)*4 ; repair msp to save_regs entry value
; -------------------------------------------------------- end repair
const tav, 324 ; HIF _sigrep
asneq 69, gr1,gr1
halt ; commit suicide if returns
; ======================================================== _sigskp()
.global __sigskp
__sigskp:
; repair_regs
; -------------------------------------------------------- repair_regs
mtsrim cr, 4-1
loadm 0, 0, gr96, msp
mtsr ipc, gr96
mtsr ipa, gr97
mtsr ipb, gr98
mtsr q, gr99
; "pop" registers stack support
mtsrim cr, 2-1
add gr99, msp, 2*4
loadm 0, 0, gr96, gr99
add lr1, gr96, 0
add rfb, gr97, 0
; "pop" remaining global registers
mtsrim cr, 25-1 ; gr100-gr124
add gr96, msp, (4+2)*4
loadm 0, 0, gr100, gr96
add msp, msp, (4+2+25)*4 ; repair msp to save_regs entry value
; -------------------------------------------------------- end repair
const tav, 325 ; HIF _sigskp
asneq 69, gr1,gr1
halt ; commit suicide if returns
; ======================================================== _sendsig()
; lr2 = signal number
.global _raise
.global __sendsig
_raise:
__sendsig:
const tav, 326 ; HIF sendsig
asneq 69, gr1,gr1
jmpi lr0
nop
;
; ======================================================== signal()
; lr2 = signal number
; lr3 = handler address
.global _signal
_signal:
; the memory variable WindowSize must be initalised at the
; start when rfb and rab are a window size apart.
const v0, WindowSize ; get register cache size
consth v0, WindowSize
load 0, 0, v1, v0
cpeq v1, v1, 0
jmpf v1, WindowSizeOK
sub v1, rfb, rab ; rfb-rab = WINDOW_SIZE
store 0, 0, v1, v0
WindowSizeOK:
const v1, SigEntry
consth v1, SigEntry
sub v3, lr2, 1 ; get handler index
sll v3, v3, 2 ; pointer to addresses
add v1, v1, v3
store 0,0, lr3, v1 ; save new handler
const lr2, sigcode
consth lr2, sigcode
;Fall through to __signal
; ======================================================== _signal()
.global __signal
__signal:
const tav, 321 ; HIF signal
asneq 69, gr1,gr1
jmpi lr0
nop
|
4ms/metamodule-plugin-sdk
| 1,507
|
plugin-libc/newlib/libc/sys/a29khif/_setim.S
|
; @(#)_setim.s 2.2 90/10/14 21:57:33, AMD
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright 1990 Advanced Micro Devices, Inc.
;
; This software is the property of Advanced Micro Devices, Inc (AMD) which
; specifically grants the user the right to modify, use and distribute this
; software provided this notice is not removed or altered. All other rights
; are reserved by AMD.
;
; AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS
; SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL
; DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR
; USE OF THIS SOFTWARE.
;
; So that all may benefit from your experience, please report any problems
; or suggestions about this software to the 29K Technical Support Center at
; 800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or
; 0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118.
;
; Advanced Micro Devices, Inc.
; 29K Support Products
; Mail Stop 573
; 5900 E. Ben White Blvd.
; Austin, TX 78741
; 800-292-9263
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; _setim.s
; _setim( im, di );
;
.file "_setim.s"
.include "sys/sysmac.h"
.text
.word 0x00040000 ; Debugger tag word
.global __setim
__setim:
const tav,HIF_setim @ asneq V_SYSCALL,gr1,gr1 @ jmpti tav,lr0 @ const tpc,_errno @ consth tpc,_errno @ store 0,0,tav,tpc @ jmpi lr0 @ constn v0,-1
.end
|
4ms/metamodule-plugin-sdk
| 1,505
|
plugin-libc/newlib/libc/sys/a29khif/_gettz.S
|
; @(#)_gettz.s 2.2 90/10/14 21:57:24, AMD
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright 1990 Advanced Micro Devices, Inc.
;
; This software is the property of Advanced Micro Devices, Inc (AMD) which
; specifically grants the user the right to modify, use and distribute this
; software provided this notice is not removed or altered. All other rights
; are reserved by AMD.
;
; AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS
; SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL
; DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR
; USE OF THIS SOFTWARE.
;
; So that all may benefit from your experience, please report any problems
; or suggestions about this software to the 29K Technical Support Center at
; 800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or
; 0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118.
;
; Advanced Micro Devices, Inc.
; 29K Support Products
; Mail Stop 573
; 5900 E. Ben White Blvd.
; Austin, TX 78741
; 800-292-9263
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; _gettz.s
; _gettz( void );
;
.file "_gettz.s"
.include "sys/sysmac.h"
.text
.word 0x00020000 ; Debugger tag word
.global __gettz
__gettz:
const tav,HIF_gettz @ asneq V_SYSCALL,gr1,gr1 @ jmpti tav,lr0 @ const tpc,_errno @ consth tpc,_errno @ store 0,0,tav,tpc @ jmpi lr0 @ constn v0,-1
.end
|
4ms/metamodule-plugin-sdk
| 1,522
|
plugin-libc/newlib/libc/sys/a29khif/getargs.S
|
; @(#)getargs.s 1.2 90/10/14 21:57:44, AMD
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright 1990 Advanced Micro Devices, Inc.
;
; This software is the property of Advanced Micro Devices, Inc (AMD) which
; specifically grants the user the right to modify, use and distribute this
; software provided this notice is not removed or altered. All other rights
; are reserved by AMD.
;
; AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS
; SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL
; DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR
; USE OF THIS SOFTWARE.
;
; So that all may benefit from your experience, please report any problems
; or suggestions about this software to the 29K Technical Support Center at
; 800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or
; 0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118.
;
; Advanced Micro Devices, Inc.
; 29K Support Products
; Mail Stop 573
; 5900 E. Ben White Blvd.
; Austin, TX 78741
; 800-292-9263
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; _getargs.s
; void _getargs( void );
;
.file "_getargs.s"
.include "sys/sysmac.h"
.text
.word 0x00020000 ; Debugger tag word
.global __getargs
__getargs:
const tav,HIF_getargs @ asneq V_SYSCALL,gr1,gr1 @ jmpti tav,lr0 @ const tpc,_errno @ consth tpc,_errno @ store 0,0,tav,tpc @ jmpi lr0 @ constn v0,-1
.end
|
4ms/metamodule-plugin-sdk
| 2,372
|
plugin-libc/newlib/libc/sys/mmixware/setjmp.S
|
/* Setjmp and longjmp for mmix.
Copyright (C) 2001 Hans-Peter Nilsson
Permission to use, copy, modify, and distribute this software is
freely granted, provided that the above copyright notice, this notice
and the following disclaimer are preserved with no changes.
THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
PURPOSE.
jmp_buf[5]:
0: fp
1: rJ (return-address)
2: sp
3: rO *before* the setjmp call.
4: temporary storage. Reserved between setjmp and longjmp. */
#ifdef __MMIX_ABI_GNU__
#define arg1 $231
#define arg2 $232
#define outret $231
#define popval 0
#else
#define arg1 $0
#define arg2 $1
#define outret $0
#define popval 1
#endif
.section .text.setjmp,"ax",@progbits
.global setjmp
setjmp:
% Store fp, sp and return address. Recycle the static-chain and
% structure-return registers as temporary register, since we need to keep
% the jmp_buf (parameter 1) and the return address across a "POP".
SET $251,arg1
STOU $253,$251,0
GET $252,rJ
STOU $252,$251,8
STOU $254,$251,16
SETL outret,0
% Jump through hoops to get the value of rO *before* the setjmp call.
GETA $255,0f
PUT rJ,$255
POP popval,0
0:
GET $255,rO
STOU $255,$251,24
GO $255,$252,0
.size setjmp,.-setjmp
.section .text.longjmp,"ax",@progbits
.global longjmp
longjmp:
% Reset arg2 to 1 if it is 0 (see longjmp(2)) and store it in jmp_buf.
% Save arg1 in a global register, since it will be destroyed by the POPs
% (in the mmixware ABI).
CSZ arg2,arg2,1
STOU arg2,arg1,32
SET $251,arg1
% Loop and "POP 0,0" until rO is the expected value, like
% the expansion of nonlocal_goto_receiver, except that we put the return
% value in the right register and make sure that the POP causes it to
% enter the right return-value register as seen by the caller. For the
% GNU ABI, it is unnecessary to do this in the loop and perhaps the memory
% access can be hoisted outside the loop, but this is safe and simple and
% I see no need to optimize longjmps.
GETA $255,0f
PUT rJ,$255
LDOU $255,$251,24
0:
GET $252,rO
CMPU $252,$252,$255
BNP $252,1f
LDOU outret,$251,32
POP popval,0
1:
LDOU $253,$251,0
LDOU $255,$251,8
LDOU $254,$251,16
GO $255,$255,0
.size longjmp,.-longjmp
|
4ms/metamodule-plugin-sdk
| 1,596
|
plugin-libc/newlib/libc/sys/h8300hms/crt0.S
|
; h8/300 and h8/300h start up file.
#include "setarch.h"
#ifdef __H8300__
.section .text
.global _start
_start:
mov.w #_stack,sp
mov.w #_edata,r0
mov.w #_end,r1
sub.w r2,r2
.Loop: mov.w r2,@r0
adds #2,r0
cmp r1,r0
blo .Loop
#ifdef __ELF__
mov.l #__fini,r0
jsr @_atexit
#ifdef __SIMULATOR__
jsr @0xcc
#endif
jsr @__init
#else
#ifdef __SIMULATOR__
jsr @0xcc
#endif
jsr @___main
#endif
jsr @_main
jsr @_exit
.section .stack
_stack: .word 1
#endif
#ifdef __H8300H__
.section .text
.global _start
_start:
mov.l #_stack,sp
mov.l #_edata,er0
mov.l #_end,er1
sub.w r2,r2 ; not sure about alignment requirements
.Loop: mov.w r2,@er0 ; playing it safe for now
adds #2,er0
cmp.l er1,er0
blo .Loop
#ifdef __ELF__
mov.l #__fini,er0
jsr @_atexit
#ifdef __SIMULATOR__
jsr @0xcc
#endif
jsr @__init
#else
#ifdef __SIMULATOR__
jsr @0xcc
#endif
jsr @___main
#endif
jsr @_main
jsr @_exit
.section .stack
_stack: .long 1
#endif
#if defined (__H8300S__) || defined (__H8300SX__)
.section .text
.global _start
_start:
mov.l #_stack,sp
mov.l #_edata,er0
mov.l #_end,er1
sub.w r2,r2 ; not sure about alignment requirements
.Loop: mov.w r2,@er0 ; playing it safe for now
adds #2,er0
cmp.l er1,er0
blo .Loop
#ifdef __ELF__
mov.l #__fini,er0
jsr @_atexit
#ifdef __SIMULATOR__
jsr @0xcc
#endif
jsr @__init
#else
#ifdef __SIMULATOR__
jsr @0xcc
#endif
jsr @___main
#endif
jsr @_main
jsr @_exit
.section .stack
_stack: .long 1
#endif
|
4ms/stm32mp1-baremetal
| 3,007
|
third-party/u-boot/u-boot-stm32mp1-baremetal/board/freescale/mx6sllevk/plugin.S
|
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2016 Freescale Semiconductor, Inc.
*/
#include <config.h>
/* DDR script */
.macro imx6sll_evk_ddr_setting
ldr r0, =IOMUXC_BASE_ADDR
ldr r1, =0x00080000
str r1, [r0, #0x550]
ldr r1, =0x00000000
str r1, [r0, #0x534]
ldr r1, =0x00000030
str r1, [r0, #0x2AC]
str r1, [r0, #0x548]
str r1, [r0, #0x52C]
ldr r1, =0x00020000
str r1, [r0, #0x530]
ldr r1, =0x00003030
str r1, [r0, #0x2B0]
str r1, [r0, #0x2B4]
str r1, [r0, #0x2B8]
str r1, [r0, #0x2BC]
ldr r1, =0x00020000
str r1, [r0, #0x540]
ldr r1, =0x00000030
str r1, [r0, #0x544]
str r1, [r0, #0x54C]
str r1, [r0, #0x554]
str r1, [r0, #0x558]
str r1, [r0, #0x294]
str r1, [r0, #0x298]
str r1, [r0, #0x29C]
str r1, [r0, #0x2A0]
ldr r1, =0x00082030
str r1, [r0, #0x2C0]
ldr r0, =MMDC_P0_BASE_ADDR
ldr r1, =0x00008000
str r1, [r0, #0x1C]
ldr r1, =0xA1390003
str r1, [r0, #0x800]
ldr r1, =0x084700C7
str r1, [r0, #0x85C]
ldr r1, =0x00400000
str r1, [r0, #0x890]
ldr r1, =0x3F393B3C
str r1, [r0, #0x848]
ldr r1, =0x262C3826
str r1, [r0, #0x850]
ldr r1, =0x33333333
str r1, [r0, #0x81C]
str r1, [r0, #0x820]
str r1, [r0, #0x824]
str r1, [r0, #0x828]
ldr r1, =0xf3333333
str r1, [r0, #0x82C]
str r1, [r0, #0x830]
str r1, [r0, #0x834]
str r1, [r0, #0x838]
ldr r1, =0x24922492
str r1, [r0, #0x8C0]
ldr r1, =0x00000800
str r1, [r0, #0x8B8]
ldr r1, =0x00020052
str r1, [r0, #0x004]
ldr r1, =0x53574333
str r1, [r0, #0x00C]
ldr r1, =0x00100B22
str r1, [r0, #0x010]
ldr r1, =0x00170778
str r1, [r0, #0x038]
ldr r1, =0x00C700DB
str r1, [r0, #0x014]
ldr r1, =0x00201718
str r1, [r0, #0x018]
ldr r1, =0x0F9F26D2
str r1, [r0, #0x02C]
ldr r1, =0x009F0E10
str r1, [r0, #0x030]
ldr r1, =0x0000005F
str r1, [r0, #0x040]
ldr r1, =0xC4190000
str r1, [r0, #0x000]
ldr r1, =0x20000000
str r1, [r0, #0x83C]
ldr r1, =0x00008050
str r1, [r0, #0x01C]
ldr r1, =0x00008058
str r1, [r0, #0x01C]
ldr r1, =0x003F8030
str r1, [r0, #0x01C]
ldr r1, =0x003F8038
str r1, [r0, #0x01C]
ldr r1, =0xFF0A8030
str r1, [r0, #0x01C]
ldr r1, =0xFF0A8038
str r1, [r0, #0x01C]
ldr r1, =0x04028030
str r1, [r0, #0x01C]
ldr r1, =0x04028038
str r1, [r0, #0x01C]
ldr r1, =0x83018030
str r1, [r0, #0x01C]
ldr r1, =0x83018038
str r1, [r0, #0x01C]
ldr r1, =0x01038030
str r1, [r0, #0x01C]
ldr r1, =0x01038038
str r1, [r0, #0x01C]
ldr r1, =0x00001800
str r1, [r0, #0x020]
ldr r1, =0xA1390003
str r1, [r0, #0x800]
ldr r1, =0x00020052
str r1, [r0, #0x004]
ldr r1, =0x00011006
str r1, [r0, #0x404]
ldr r1, =0x00000000
str r1, [r0, #0x01C]
.endm
.macro imx6_clock_gating
ldr r0, =CCM_BASE_ADDR
ldr r1, =0xffffffff
str r1, [r0, #0x068]
str r1, [r0, #0x06c]
str r1, [r0, #0x070]
str r1, [r0, #0x074]
str r1, [r0, #0x078]
str r1, [r0, #0x07c]
str r1, [r0, #0x080]
.endm
.macro imx6_qos_setting
.endm
.macro imx6_ddr_setting
imx6sll_evk_ddr_setting
.endm
/* include the common plugin code here */
#include <asm/arch/mx6_plugin.S>
|
4ms/stm32mp1-baremetal
| 4,370
|
third-party/u-boot/u-boot-stm32mp1-baremetal/board/freescale/mx35pdk/lowlevel_init.S
|
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
*
* (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
*/
#include <config.h>
#include <asm/arch/imx-regs.h>
#include <generated/asm-offsets.h>
#include "mx35pdk.h"
#include <asm/arch/lowlevel_macro.S>
/*
* return soc version
* 0x10: TO1
* 0x20: TO2
* 0x30: TO3
*/
.macro check_soc_version ret, tmp
ldr \tmp, =IIM_BASE_ADDR
ldr \ret, [\tmp, #IIM_SREV]
cmp \ret, #0x00
moveq \tmp, #ROMPATCH_REV
ldreq \ret, [\tmp]
moveq \ret, \ret, lsl #4
addne \ret, \ret, #0x10
.endm
/* CPLD on CS5 setup */
.macro init_debug_board
ldr r0, =DBG_BASE_ADDR
ldr r1, =DBG_CSCR_U_CONFIG
str r1, [r0, #0x00]
ldr r1, =DBG_CSCR_L_CONFIG
str r1, [r0, #0x04]
ldr r1, =DBG_CSCR_A_CONFIG
str r1, [r0, #0x08]
.endm
/* clock setup */
.macro init_clock
ldr r0, =CCM_BASE_ADDR
/* default CLKO to 1/32 of the ARM core*/
ldr r1, [r0, #CLKCTL_COSR]
bic r1, r1, #0x00000FF00
bic r1, r1, #0x0000000FF
mov r2, #0x00006C00
add r2, r2, #0x67
orr r1, r1, r2
str r1, [r0, #CLKCTL_COSR]
ldr r2, =CCM_CCMR_CONFIG
str r2, [r0, #CLKCTL_CCMR]
check_soc_version r1, r2
cmp r1, #CHIP_REV_2_0
ldrhs r3, =CCM_MPLL_532_HZ
bhs 1f
ldr r2, [r0, #CLKCTL_PDR0]
tst r2, #CLKMODE_CONSUMER
ldrne r3, =CCM_MPLL_532_HZ /* consumer path*/
ldreq r3, =CCM_MPLL_399_HZ /* auto path*/
1:
str r3, [r0, #CLKCTL_MPCTL]
ldr r1, =CCM_PPLL_300_HZ
str r1, [r0, #CLKCTL_PPCTL]
ldr r1, =CCM_PDR0_CONFIG
bic r1, r1, #0x800000
str r1, [r0, #CLKCTL_PDR0]
ldr r1, [r0, #CLKCTL_CGR0]
orr r1, r1, #0x0C300000
str r1, [r0, #CLKCTL_CGR0]
ldr r1, [r0, #CLKCTL_CGR1]
orr r1, r1, #0x00000C00
orr r1, r1, #0x00000003
str r1, [r0, #CLKCTL_CGR1]
ldr r1, [r0, #CLKCTL_CGR2]
orr r1, r1, #0x00C00000
str r1, [r0, #CLKCTL_CGR2]
.endm
.macro setup_sdram
ldr r0, =ESDCTL_BASE_ADDR
mov r3, #0x2000
str r3, [r0, #0x0]
str r3, [r0, #0x8]
/*ip(r12) has used to save lr register in upper calling*/
mov fp, lr
mov r5, #0x00
mov r2, #0x00
mov r1, #CSD0_BASE_ADDR
bl setup_sdram_bank
mov r5, #0x00
mov r2, #0x00
mov r1, #CSD1_BASE_ADDR
bl setup_sdram_bank
mov lr, fp
1:
ldr r3, =ESDCTL_DELAY_LINE5
str r3, [r0, #0x30]
.endm
.globl lowlevel_init
lowlevel_init:
mov r10, lr
core_init
init_aips
init_max
init_m3if
init_clock
init_debug_board
cmp pc, #PHYS_SDRAM_1
blo init_sdram_start
cmp pc, #(PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE)
blo skip_sdram_setup
init_sdram_start:
/*init_sdram*/
setup_sdram
skip_sdram_setup:
mov lr, r10
mov pc, lr
/*
* r0: ESDCTL control base, r1: sdram slot base
* r2: DDR type(0:DDR2, 1:MDDR) r3, r4:working base
*/
setup_sdram_bank:
mov r3, #0xE
tst r2, #0x1
orreq r3, r3, #0x300 /*DDR2*/
str r3, [r0, #0x10]
bic r3, r3, #0x00A
str r3, [r0, #0x10]
beq 2f
mov r3, #0x20000
1: subs r3, r3, #1
bne 1b
2: tst r2, #0x1
ldreq r3, =ESDCTL_DDR2_CONFIG
ldrne r3, =ESDCTL_MDDR_CONFIG
cmp r1, #CSD1_BASE_ADDR
strlo r3, [r0, #0x4]
strhs r3, [r0, #0xC]
ldr r3, =ESDCTL_0x92220000
strlo r3, [r0, #0x0]
strhs r3, [r0, #0x8]
mov r3, #0xDA
ldr r4, =ESDCTL_PRECHARGE
strb r3, [r1, r4]
tst r2, #0x1
bne skip_set_mode
cmp r1, #CSD1_BASE_ADDR
ldr r3, =ESDCTL_0xB2220000
strlo r3, [r0, #0x0]
strhs r3, [r0, #0x8]
mov r3, #0xDA
ldr r4, =ESDCTL_DDR2_EMR2
strb r3, [r1, r4]
ldr r4, =ESDCTL_DDR2_EMR3
strb r3, [r1, r4]
ldr r4, =ESDCTL_DDR2_EN_DLL
strb r3, [r1, r4]
ldr r4, =ESDCTL_DDR2_RESET_DLL
strb r3, [r1, r4]
ldr r3, =ESDCTL_0x92220000
strlo r3, [r0, #0x0]
strhs r3, [r0, #0x8]
mov r3, #0xDA
ldr r4, =ESDCTL_PRECHARGE
strb r3, [r1, r4]
skip_set_mode:
cmp r1, #CSD1_BASE_ADDR
ldr r3, =ESDCTL_0xA2220000
strlo r3, [r0, #0x0]
strhs r3, [r0, #0x8]
mov r3, #0xDA
strb r3, [r1]
strb r3, [r1]
ldr r3, =ESDCTL_0xB2220000
strlo r3, [r0, #0x0]
strhs r3, [r0, #0x8]
tst r2, #0x1
ldreq r4, =ESDCTL_DDR2_MR
ldrne r4, =ESDCTL_MDDR_MR
mov r3, #0xDA
strb r3, [r1, r4]
ldreq r4, =ESDCTL_DDR2_OCD_DEFAULT
streqb r3, [r1, r4]
ldreq r4, =ESDCTL_DDR2_EN_DLL
ldrne r4, =ESDCTL_MDDR_EMR
strb r3, [r1, r4]
cmp r1, #CSD1_BASE_ADDR
ldr r3, =ESDCTL_0x82228080
strlo r3, [r0, #0x0]
strhs r3, [r0, #0x8]
tst r2, #0x1
moveq r4, #0x20000
movne r4, #0x200
1: subs r4, r4, #1
bne 1b
str r3, [r1, #0x100]
ldr r4, [r1, #0x100]
cmp r3, r4
movne r3, #1
moveq r3, #0
mov pc, lr
|
4ms/stm32mp1-baremetal
| 2,439
|
third-party/u-boot/u-boot-stm32mp1-baremetal/board/freescale/m54418twr/sbf_dram_init.S
|
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Board-specific sbf ddr/sdram init.
*
* (C) Copyright 2017 Angelo Dureghello <angelo@sysam.it>
*/
.global sbf_dram_init
.text
sbf_dram_init:
move.l #0xFC04002D, %a1
move.b #46, (%a1) /* DDR */
/* slew settings */
move.l #0xEC094060, %a1
move.b #0, (%a1)
/* use vco instead of cpu*2 clock for ddr clock */
move.l #0xEC09001A, %a1
move.w #0xE01D, (%a1)
/* DDR settings */
move.l #0xFC0B8180, %a1
move.l #0x00000000, (%a1)
move.l #0x40000000, (%a1)
move.l #0xFC0B81AC, %a1
move.l #0x01030203, (%a1)
move.l #0xFC0B8000, %a1
move.l #0x01010101, (%a1)+ /* 0x00 */
move.l #0x00000101, (%a1)+ /* 0x04 */
move.l #0x01010100, (%a1)+ /* 0x08 */
move.l #0x01010000, (%a1)+ /* 0x0C */
move.l #0x00010101, (%a1)+ /* 0x10 */
move.l #0xFC0B8018, %a1
move.l #0x00010100, (%a1)+ /* 0x18 */
move.l #0x00000001, (%a1)+ /* 0x1C */
move.l #0x01000001, (%a1)+ /* 0x20 */
move.l #0x00000100, (%a1)+ /* 0x24 */
move.l #0x00010001, (%a1)+ /* 0x28 */
move.l #0x00000200, (%a1)+ /* 0x2C */
move.l #0x01000002, (%a1)+ /* 0x30 */
move.l #0x00000000, (%a1)+ /* 0x34 */
move.l #0x00000100, (%a1)+ /* 0x38 */
move.l #0x02000100, (%a1)+ /* 0x3C */
move.l #0x02000407, (%a1)+ /* 0x40 */
move.l #0x02030007, (%a1)+ /* 0x44 */
move.l #0x02000100, (%a1)+ /* 0x48 */
move.l #0x0A030203, (%a1)+ /* 0x4C */
move.l #0x00020708, (%a1)+ /* 0x50 */
move.l #0x00050008, (%a1)+ /* 0x54 */
move.l #0x04030002, (%a1)+ /* 0x58 */
move.l #0x00000004, (%a1)+ /* 0x5C */
move.l #0x020A0000, (%a1)+ /* 0x60 */
move.l #0x0C00000E, (%a1)+ /* 0x64 */
move.l #0x00002004, (%a1)+ /* 0x68 */
move.l #0x00000000, (%a1)+ /* 0x6C */
move.l #0x00100010, (%a1)+ /* 0x70 */
move.l #0x00100010, (%a1)+ /* 0x74 */
move.l #0x00000000, (%a1)+ /* 0x78 */
move.l #0x07990000, (%a1)+ /* 0x7C */
move.l #0xFC0B80A0, %a1
move.l #0x00000000, (%a1)+ /* 0xA0 */
move.l #0x00C80064, (%a1)+ /* 0xA4 */
move.l #0x44520002, (%a1)+ /* 0xA8 */
move.l #0x00C80023, (%a1)+ /* 0xAC */
move.l #0xFC0B80B4, %a1
move.l #0x0000C350, (%a1) /* 0xB4 */
move.l #0xFC0B80E0, %a1
move.l #0x04000000, (%a1)+ /* 0xE0 */
move.l #0x03000304, (%a1)+ /* 0xE4 */
move.l #0x40040000, (%a1)+ /* 0xE8 */
move.l #0xC0004004, (%a1)+ /* 0xEC */
move.l #0x0642C000, (%a1)+ /* 0xF0 */
move.l #0x00000642, (%a1)+ /* 0xF4 */
move.l #0xFC0B8024, %a1
tpf
move.l #0x01000100, (%a1) /* 0x24 */
move.l #0x2000, %d1
bsr asm_delay
rts
|
4ms/stm32mp1-baremetal
| 3,952
|
third-party/u-boot/u-boot-stm32mp1-baremetal/board/freescale/mx7ulp_evk/plugin.S
|
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2016 Freescale Semiconductor, Inc.
* Copyright 2019 NXP
*/
#include <config.h>
.macro imx7ulp_ddr_freq_decrease
ldr r2, =0x403f0000
ldr r3, =0x00000000
str r3, [r2, #0xdc]
ldr r2, =0x403e0000
ldr r3, =0x01000020
str r3, [r2, #0x40]
ldr r3, =0x01000000
str r3, [r2, #0x500]
ldr r3, =0x80808080
str r3, [r2, #0x50c]
ldr r3, =0x00160002
str r3, [r2, #0x508]
ldr r3, =0x00000001
str r3, [r2, #0x510]
ldr r3, =0x00000014
str r3, [r2, #0x514]
ldr r3, =0x00000001
str r3, [r2, #0x500]
ldr r3, =0x01000000
wait1:
ldr r4, [r2, #0x500]
and r4, r3
cmp r4, r3
bne wait1
ldr r3, =0x8080801B
str r3, [r2, #0x50c]
ldr r3, =0x00000040
wait2:
ldr r4, [r2, #0x50c]
and r4, r3
cmp r4, r3
bne wait2
ldr r3, =0x00000001
str r3, [r2, #0x30]
ldr r3, =0x11000020
str r3, [r2, #0x40]
ldr r2, =0x403f0000
ldr r3, =0x42000000
str r3, [r2, #0xdc]
.endm
.macro imx7ulp_evk_ddr_setting
imx7ulp_ddr_freq_decrease
/* Enable MMDC PCC clock */
ldr r2, =0x40b30000
ldr r3, =0x40000000
str r3, [r2, #0xac]
/* Configure DDR pad */
ldr r0, =0x40ad0000
ldr r1, =0x00040000
str r1, [r0, #0x128]
ldr r1, =0x0
str r1, [r0, #0xf8]
ldr r1, =0x00000180
str r1, [r0, #0xd8]
ldr r1, =0x00000180
str r1, [r0, #0x108]
ldr r1, =0x00000180
str r1, [r0, #0x104]
ldr r1, =0x00010000
str r1, [r0, #0x124]
ldr r1, =0x0000018C
str r1, [r0, #0x80]
ldr r1, =0x0000018C
str r1, [r0, #0x84]
ldr r1, =0x0000018C
str r1, [r0, #0x88]
ldr r1, =0x0000018C
str r1, [r0, #0x8c]
ldr r1, =0x00010000
str r1, [r0, #0x120]
ldr r1, =0x00000180
str r1, [r0, #0x10c]
ldr r1, =0x00000180
str r1, [r0, #0x110]
ldr r1, =0x00000180
str r1, [r0, #0x114]
ldr r1, =0x00000180
str r1, [r0, #0x118]
ldr r1, =0x00000180
str r1, [r0, #0x90]
ldr r1, =0x00000180
str r1, [r0, #0x94]
ldr r1, =0x00000180
str r1, [r0, #0x98]
ldr r1, =0x00000180
str r1, [r0, #0x9c]
ldr r1, =0x00040000
str r1, [r0, #0xe0]
ldr r1, =0x00040000
str r1, [r0, #0xe4]
ldr r0, =0x40ab0000
ldr r1, =0x00008000
str r1, [r0, #0x1c]
ldr r1, =0xA1390003
str r1, [r0, #0x800]
ldr r1, =0x0D3900A0
str r1, [r0, #0x85c]
ldr r1, =0x00400000
str r1, [r0, #0x890]
ldr r1, =0x40404040
str r1, [r0, #0x848]
ldr r1, =0x40404040
str r1, [r0, #0x850]
ldr r1, =0x33333333
str r1, [r0, #0x81c]
ldr r1, =0x33333333
str r1, [r0, #0x820]
ldr r1, =0x33333333
str r1, [r0, #0x824]
ldr r1, =0x33333333
str r1, [r0, #0x828]
ldr r1, =0x24922492
str r1, [r0, #0x8c0]
ldr r1, =0x00000800
str r1, [r0, #0x8b8]
ldr r1, =0x00020052
str r1, [r0, #0x4]
ldr r1, =0x292C42F3
str r1, [r0, #0xc]
ldr r1, =0x00100A22
str r1, [r0, #0x10]
ldr r1, =0x00120556
str r1, [r0, #0x38]
ldr r1, =0x00C700DB
str r1, [r0, #0x14]
ldr r1, =0x00211718
str r1, [r0, #0x18]
ldr r1, =0x0F9F26D2
str r1, [r0, #0x2c]
ldr r1, =0x009F0E10
str r1, [r0, #0x30]
ldr r1, =0x0000003F
str r1, [r0, #0x40]
ldr r1, =0xC3190000
str r1, [r0, #0x0]
ldr r1, =0x00008010
str r1, [r0, #0x1c]
ldr r1, =0x00008018
str r1, [r0, #0x1c]
ldr r1, =0x003F8030
str r1, [r0, #0x1c]
ldr r1, =0x003F8038
str r1, [r0, #0x1c]
ldr r1, =0xFF0A8030
str r1, [r0, #0x1c]
ldr r1, =0xFF0A8038
str r1, [r0, #0x1c]
ldr r1, =0x04028030
str r1, [r0, #0x1c]
ldr r1, =0x04028038
str r1, [r0, #0x1c]
ldr r1, =0x83018030
str r1, [r0, #0x1c]
ldr r1, =0x83018038
str r1, [r0, #0x1c]
ldr r1, =0x01038030
str r1, [r0, #0x1c]
ldr r1, =0x01038038
str r1, [r0, #0x1c]
ldr r1, =0x20000000
str r1, [r0, #0x83c]
ldr r1, =0x00001800
str r1, [r0, #0x20]
ldr r1, =0xA1310000
str r1, [r0, #0x800]
ldr r1, =0x00020052
str r1, [r0, #0x4]
ldr r1, =0x00011006
str r1, [r0, #0x404]
ldr r1, =0x00000000
str r1, [r0, #0x1c]
.endm
.macro imx7ulp_clock_gating
.endm
.macro imx7ulp_qos_setting
.endm
.macro imx7ulp_ddr_setting
imx7ulp_evk_ddr_setting
.endm
/* include the common plugin code here */
#include <asm/arch/mx7ulp_plugin.S>
|
4ms/stm32mp1-baremetal
| 1,710
|
third-party/u-boot/u-boot-stm32mp1-baremetal/board/freescale/m54451evb/sbf_dram_init.S
|
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Board-specific sbf ddr/sdram init.
*
* (C) Copyright 2017 Angelo Dureghello <angelo@sysam.it>
*/
#include <config.h>
.global sbf_dram_init
.text
sbf_dram_init:
/* Dram Initialization a1, a2, and d0 */
/* mscr sdram */
move.l #0xFC0A4074, %a1
move.b #(CONFIG_SYS_SDRAM_DRV_STRENGTH), (%a1)
nop
/* SDRAM Chip 0 and 1 */
move.l #0xFC0B8110, %a1
move.l #0xFC0B8114, %a2
/* calculate the size */
move.l #0x13, %d1
move.l #(CONFIG_SYS_SDRAM_SIZE), %d2
#ifdef CONFIG_SYS_SDRAM_BASE1
lsr.l #1, %d2
#endif
dramsz_loop:
lsr.l #1, %d2
add.l #1, %d1
cmp.l #1, %d2
bne dramsz_loop
#ifdef CONFIG_SYS_NAND_BOOT
beq asm_nand_chk_status
#endif
/* SDRAM Chip 0 and 1 */
move.l #(CONFIG_SYS_SDRAM_BASE), (%a1)
or.l %d1, (%a1)
#ifdef CONFIG_SYS_SDRAM_BASE1
move.l #(CONFIG_SYS_SDRAM_BASE1), (%a2)
or.l %d1, (%a2)
#endif
nop
/* dram cfg1 and cfg2 */
move.l #0xFC0B8008, %a1
move.l #(CONFIG_SYS_SDRAM_CFG1), (%a1)
nop
move.l #0xFC0B800C, %a2
move.l #(CONFIG_SYS_SDRAM_CFG2), (%a2)
nop
move.l #0xFC0B8000, %a1 /* Mode */
move.l #0xFC0B8004, %a2 /* Ctrl */
/* Issue PALL */
move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
nop
move.l #1000, %d1
bsr asm_delay
/* Issue PALL */
move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
nop
/* Perform two refresh cycles */
move.l #(CONFIG_SYS_SDRAM_CTRL + 4), %d0
nop
move.l %d0, (%a2)
move.l %d0, (%a2)
nop
/* Issue LEMR */
move.l #(CONFIG_SYS_SDRAM_MODE), (%a1)
nop
move.l #(CONFIG_SYS_SDRAM_EMOD), (%a1)
move.l #500, %d1
bsr asm_delay
move.l #(CONFIG_SYS_SDRAM_CTRL), %d1
and.l #0x7FFFFFFF, %d1
or.l #0x10000C00, %d1
move.l %d1, (%a2)
nop
move.l #2000, %d1
bsr asm_delay
rts
|
4ms/stm32mp1-baremetal
| 2,715
|
third-party/u-boot/u-boot-stm32mp1-baremetal/board/freescale/mx6ullevk/plugin.S
|
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2016 Freescale Semiconductor, Inc.
*/
#include <config.h>
/* DDR script */
.macro imx6ull_ddr3_evk_setting
ldr r0, =IOMUXC_BASE_ADDR
ldr r1, =0x000C0000
str r1, [r0, #0x4B4]
ldr r1, =0x00000000
str r1, [r0, #0x4AC]
ldr r1, =0x00000030
str r1, [r0, #0x27C]
ldr r1, =0x00000030
str r1, [r0, #0x250]
str r1, [r0, #0x24C]
str r1, [r0, #0x490]
ldr r1, =0x000C0030
str r1, [r0, #0x288]
ldr r1, =0x00000000
str r1, [r0, #0x270]
ldr r1, =0x00000030
str r1, [r0, #0x260]
str r1, [r0, #0x264]
str r1, [r0, #0x4A0]
ldr r1, =0x00020000
str r1, [r0, #0x494]
ldr r1, =0x00000030
str r1, [r0, #0x280]
ldr r1, =0x00000030
str r1, [r0, #0x284]
ldr r1, =0x00020000
str r1, [r0, #0x4B0]
ldr r1, =0x00000030
str r1, [r0, #0x498]
str r1, [r0, #0x4A4]
str r1, [r0, #0x244]
str r1, [r0, #0x248]
ldr r0, =MMDC_P0_BASE_ADDR
ldr r1, =0x00008000
str r1, [r0, #0x1C]
ldr r1, =0xA1390003
str r1, [r0, #0x800]
ldr r1, =0x00000004
str r1, [r0, #0x80C]
ldr r1, =0x41640158
str r1, [r0, #0x83C]
ldr r1, =0x40403237
str r1, [r0, #0x848]
ldr r1, =0x40403C33
str r1, [r0, #0x850]
ldr r1, =0x33333333
str r1, [r0, #0x81C]
str r1, [r0, #0x820]
ldr r1, =0xF3333333
str r1, [r0, #0x82C]
str r1, [r0, #0x830]
ldr r1, =0x00944009
str r1, [r0, #0x8C0]
ldr r1, =0x00000800
str r1, [r0, #0x8B8]
ldr r1, =0x0002002D
str r1, [r0, #0x004]
ldr r1, =0x1B333030
str r1, [r0, #0x008]
ldr r1, =0x676B52F3
str r1, [r0, #0x00C]
ldr r1, =0xB66D0B63
str r1, [r0, #0x010]
ldr r1, =0x01FF00DB
str r1, [r0, #0x014]
ldr r1, =0x00201740
str r1, [r0, #0x018]
ldr r1, =0x00008000
str r1, [r0, #0x01C]
ldr r1, =0x000026D2
str r1, [r0, #0x02C]
ldr r1, =0x006B1023
str r1, [r0, #0x030]
ldr r1, =0x0000004F
str r1, [r0, #0x040]
ldr r1, =0x84180000
str r1, [r0, #0x000]
ldr r1, =0x00400000
str r1, [r0, #0x890]
ldr r1, =0x02008032
str r1, [r0, #0x01C]
ldr r1, =0x00008033
str r1, [r0, #0x01C]
ldr r1, =0x00048031
str r1, [r0, #0x01C]
ldr r1, =0x15208030
str r1, [r0, #0x01C]
ldr r1, =0x04008040
str r1, [r0, #0x01C]
ldr r1, =0x00000800
str r1, [r0, #0x020]
ldr r1, =0x00000227
str r1, [r0, #0x818]
ldr r1, =0x0002552D
str r1, [r0, #0x004]
ldr r1, =0x00011006
str r1, [r0, #0x404]
ldr r1, =0x00000000
str r1, [r0, #0x01C]
.endm
.macro imx6_clock_gating
ldr r0, =CCM_BASE_ADDR
ldr r1, =0xFFFFFFFF
str r1, [r0, #0x68]
str r1, [r0, #0x6C]
str r1, [r0, #0x70]
str r1, [r0, #0x74]
str r1, [r0, #0x78]
str r1, [r0, #0x7C]
str r1, [r0, #0x80]
.endm
.macro imx6_qos_setting
.endm
.macro imx6_ddr_setting
imx6ull_ddr3_evk_setting
.endm
/* include the common plugin code here */
#include <asm/arch/mx6_plugin.S>
|
4ms/stm32mp1-baremetal
| 2,612
|
third-party/u-boot/u-boot-stm32mp1-baremetal/board/renesas/r2dplus/lowlevel_init.S
|
/*
* modified from SH-IPL+g (init-r0p751rlc0011rl.S)
* Initial Register Data for R0P751RLC0011RL (SH7751R 240MHz/120MHz/60MHz)
* Coyright (c) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
*/
#include <config.h>
#include <asm/processor.h>
#include <asm/macro.h>
.global lowlevel_init
.text
.align 2
lowlevel_init:
write32 CCR_A, CCR_D_D
write32 MMUCR_A, MMUCR_D
write32 BCR1_A, BCR1_D
write16 BCR2_A, BCR2_D
write16 BCR3_A, BCR3_D
write32 BCR4_A, BCR4_D
write32 WCR1_A, WCR1_D
write32 WCR2_A, WCR2_D
write32 WCR3_A, WCR3_D
write16 PCR_A, PCR_D
write16 LED_A, LED_D
write32 MCR_A, MCR_D1
write16 RTCNT_A, RTCNT_D
write16 RTCOR_A, RTCOR_D
write16 RFCR_A, RFCR_D
write16 RTCSR_A, RTCSR_D
write8 SDMR3_A, SDMR3_D0
/* Wait DRAM refresh 30 times */
mov.l RFCR_A, r1
mov #30, r3
1:
mov.w @r1, r0
extu.w r0, r2
cmp/hi r3, r2
bf 1b
write32 MCR_A, MCR_D2
write8 SDMR3_A, SDMR3_D1
write32 IRLMASK_A, IRLMASK_D
write32 CCR_A, CCR_D_E
rts
nop
.align 2
CCR_A: .long CCR /* Cache Control Register */
CCR_D_D: .long 0x0808 /* Flush the cache, disable */
CCR_D_E: .long 0x8000090B
FRQCR_A: .long FRQCR /* FRQCR Address */
FRQCR_D: .long 0x00000e0a /* 03/07/15 modify */
BCR1_A: .long BCR1 /* BCR1 Address */
BCR1_D: .long 0x00180008
BCR2_A: .long BCR2 /* BCR2 Address */
BCR2_D: .long 0xabe8
BCR3_A: .long BCR3 /* BCR3 Address */
BCR3_D: .long 0x0000
BCR4_A: .long BCR4 /* BCR4 Address */
BCR4_D: .long 0x00000010
WCR1_A: .long WCR1 /* WCR1 Address */
WCR1_D: .long 0x33343333
WCR2_A: .long WCR2 /* WCR2 Address */
WCR2_D: .long 0xcff86fbf
WCR3_A: .long WCR3 /* WCR3 Address */
WCR3_D: .long 0x07777707
LED_A: .long 0x04000036 /* LED Address */
LED_D: .long 0xFF /* LED Data */
RTCNT_A: .long RTCNT /* RTCNT Address */
RTCNT_D: .word 0xA500 /* RTCNT Write Code A5h Data 00h */
.align 2
RTCOR_A: .long RTCOR /* RTCOR Address */
RTCOR_D: .word 0xA534 /* RTCOR Write Code */
.align 2
RTCSR_A: .long RTCSR /* RTCSR Address */
RTCSR_D: .word 0xA510 /* RTCSR Write Code */
.align 2
SDMR3_A: .long 0xFF9400CC /* SDMR3 Address */
SDMR3_D0: .long 0x55
SDMR3_D1: .long 0x00
MCR_A: .long MCR /* MCR Address */
MCR_D1: .long 0x081901F4 /* MRSET:'0' */
MCR_D2: .long 0x481901F4 /* MRSET:'1' */
RFCR_A: .long RFCR /* RFCR Address */
RFCR_D: .long 0xA400 /* RFCR Write Code A4h Data 00h */
PCR_A: .long PCR /* PCR Address */
PCR_D: .long 0x0000
MMUCR_A: .long MMUCR /* MMUCCR Address */
MMUCR_D: .long 0x00000000 /* MMUCCR Data */
IRLMASK_A: .long 0xA4000000 /* IRLMASK Address */
IRLMASK_D: .long 0x00000000 /* IRLMASK Data */
|
4ms/stm32mp1-baremetal
| 4,022
|
third-party/u-boot/u-boot-stm32mp1-baremetal/board/renesas/MigoR/lowlevel_init.S
|
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2007-2008
* Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
*
* Copyright (C) 2007
* Kenati Technologies, Inc.
*
* board/MigoR/lowlevel_init.S
*/
#include <config.h>
#include <asm/processor.h>
#include <asm/macro.h>
/*
* Board specific low level init code, called _very_ early in the
* startup sequence. Relocation to SDRAM has not happened yet, no
* stack is available, bss section has not been initialised, etc.
*
* (Note: As no stack is available, no subroutines can be called...).
*/
.global lowlevel_init
.text
.align 2
lowlevel_init:
write32 CCR_A, CCR_D ! Address of Cache Control Register
! Instruction Cache Invalidate
write32 MMUCR_A, MMUCR_D ! Address of MMU Control Register
! TI == TLB Invalidate bit
write32 MSTPCR0_A, MSTPCR0_D ! Address of Power Control Register 0
write32 MSTPCR2_A, MSTPCR2_D ! Address of Power Control Register 2
write16 PFC_PULCR_A, PFC_PULCR_D
write16 PFC_DRVCR_A, PFC_DRVCR_D
write16 SBSCR_A, SBSCR_D
write16 PSCR_A, PSCR_D
write16 RWTCSR_A, RWTCSR_D_1 ! 0xA4520004 (Watchdog Control / Status Register)
! 0xA507 -> timer_STOP / WDT_CLK = max
write16 RWTCNT_A, RWTCNT_D ! 0xA4520000 (Watchdog Count Register)
! 0x5A00 -> Clear
write16 RWTCSR_A, RWTCSR_D_2 ! 0xA4520004 (Watchdog Control / Status Register)
! 0xA504 -> timer_STOP / CLK = 500ms
write32 DLLFRQ_A, DLLFRQ_D ! 20080115
! 20080115
write32 FRQCR_A, FRQCR_D ! 0xA4150000 Frequency control register
! 20080115
write32 CCR_A, CCR_D_2 ! Address of Cache Control Register
! ??
bsc_init:
write32 CMNCR_A, CMNCR_D
write32 CS0BCR_A, CS0BCR_D
write32 CS4BCR_A, CS4BCR_D
write32 CS5ABCR_A, CS5ABCR_D
write32 CS5BBCR_A, CS5BBCR_D
write32 CS6ABCR_A, CS6ABCR_D
write32 CS0WCR_A, CS0WCR_D
write32 CS4WCR_A, CS4WCR_D
write32 CS5AWCR_A, CS5AWCR_D
write32 CS5BWCR_A, CS5BWCR_D
write32 CS6AWCR_A, CS6AWCR_D
! SDRAM initialization
write32 SDCR_A, SDCR_D
write32 SDWCR_A, SDWCR_D
write32 SDPCR_A, SDPCR_D
write32 RTCOR_A, RTCOR_D
write32 RTCNT_A, RTCNT_D
write32 RTCSR_A, RTCSR_D
write32 RFCR_A, RFCR_D
write8 SDMR3_A, SDMR3_D
! BL bit off (init = ON) (?!?)
stc sr, r0 ! BL bit off(init=ON)
mov.l SR_MASK_D, r1
and r1, r0
ldc r0, sr
rts
mov #0, r0
.align 4
CCR_A: .long CCR
MMUCR_A: .long MMUCR
MSTPCR0_A: .long MSTPCR0
MSTPCR2_A: .long MSTPCR2
PFC_PULCR_A: .long PULCR
PFC_DRVCR_A: .long DRVCR
SBSCR_A: .long SBSCR
PSCR_A: .long PSCR
RWTCSR_A: .long RWTCSR
RWTCNT_A: .long RWTCNT
FRQCR_A: .long FRQCR
PLLCR_A: .long PLLCR
DLLFRQ_A: .long DLLFRQ
CCR_D: .long 0x00000800
CCR_D_2: .long 0x00000103
MMUCR_D: .long 0x00000004
MSTPCR0_D: .long 0x00001001
MSTPCR2_D: .long 0xffffffff
PFC_PULCR_D: .long 0x6000
PFC_DRVCR_D: .long 0x0464
FRQCR_D: .long 0x07033639
PLLCR_D: .long 0x00005000
DLLFRQ_D: .long 0x000004F6
CMNCR_A: .long CMNCR
CMNCR_D: .long 0x0000001B
CS0BCR_A: .long CS0BCR
CS0BCR_D: .long 0x24920400
CS4BCR_A: .long CS4BCR
CS4BCR_D: .long 0x00003400
CS5ABCR_A: .long CS5ABCR
CS5ABCR_D: .long 0x24920400
CS5BBCR_A: .long CS5BBCR
CS5BBCR_D: .long 0x24920400
CS6ABCR_A: .long CS6ABCR
CS6ABCR_D: .long 0x24920400
CS0WCR_A: .long CS0WCR
CS0WCR_D: .long 0x00000380
CS4WCR_A: .long CS4WCR
CS4WCR_D: .long 0x00110080
CS5AWCR_A: .long CS5AWCR
CS5AWCR_D: .long 0x00000300
CS5BWCR_A: .long CS5BWCR
CS5BWCR_D: .long 0x00000300
CS6AWCR_A: .long CS6AWCR
CS6AWCR_D: .long 0x00000300
SDCR_A: .long SBSC_SDCR
SDCR_D: .long 0x80160809
SDWCR_A: .long SBSC_SDWCR
SDWCR_D: .long 0x0014450C
SDPCR_A: .long SBSC_SDPCR
SDPCR_D: .long 0x00000087
RTCOR_A: .long SBSC_RTCOR
RTCNT_A: .long SBSC_RTCNT
RTCNT_D: .long 0xA55A0012
RTCOR_D: .long 0xA55A001C
RTCSR_A: .long SBSC_RTCSR
RFCR_A: .long SBSC_RFCR
RFCR_D: .long 0xA55A0221
RTCSR_D: .long 0xA55A009a
SDMR3_A: .long 0xFE581180
SDMR3_D: .long 0x0
SR_MASK_D: .long 0xEFFFFF0F
.align 2
SBSCR_D: .word 0x0044
PSCR_D: .word 0x0000
RWTCSR_D_1: .word 0xA507
RWTCSR_D_2: .word 0xA504
RWTCNT_D: .word 0x5A00
|
4ms/stm32mp1-baremetal
| 2,867
|
third-party/u-boot/u-boot-stm32mp1-baremetal/board/renesas/grpeach/lowlevel_init.S
|
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2017 Renesas Electronics
* Copyright (C) 2017 Chris Brandt
*/
#include <config.h>
#include <version.h>
#include <asm/macro.h>
/* Watchdog Registers */
#define RZA1_WDT_BASE 0xFCFE0000
#define WTCSR (RZA1_WDT_BASE + 0x00) /* Watchdog Timer Control Register */
#define WTCNT (RZA1_WDT_BASE + 0x02) /* Watchdog Timer Counter Register */
#define WRCSR (RZA1_WDT_BASE + 0x04) /* Watchdog Reset Control Register */
/* Standby controller registers (chapter 55) */
#define RZA1_STBCR_BASE 0xFCFE0020
#define STBCR1 (RZA1_STBCR_BASE + 0x00)
#define STBCR2 (RZA1_STBCR_BASE + 0x04)
#define STBCR3 (RZA1_STBCR_BASE + 0x400)
#define STBCR4 (RZA1_STBCR_BASE + 0x404)
#define STBCR5 (RZA1_STBCR_BASE + 0x408)
#define STBCR6 (RZA1_STBCR_BASE + 0x40c)
#define STBCR7 (RZA1_STBCR_BASE + 0x410)
#define STBCR8 (RZA1_STBCR_BASE + 0x414)
#define STBCR9 (RZA1_STBCR_BASE + 0x418)
#define STBCR10 (RZA1_STBCR_BASE + 0x41c)
#define STBCR11 (RZA1_STBCR_BASE + 0x420)
#define STBCR12 (RZA1_STBCR_BASE + 0x424)
#define STBCR13 (RZA1_STBCR_BASE + 0x450)
/* Clock Registers */
#define RZA1_FRQCR_BASE 0xFCFE0010
#define FRQCR (RZA1_FRQCR_BASE + 0x00)
#define FRQCR2 (RZA1_FRQCR_BASE + 0x04)
#define SYSCR1 0xFCFE0400 /* System control register 1 */
#define SYSCR2 0xFCFE0404 /* System control register 2 */
#define SYSCR3 0xFCFE0408 /* System control register 3 */
/* Disable WDT */
#define WTCSR_D 0xA518
#define WTCNT_D 0x5A00
/* Enable all peripheral clocks */
#define STBCR3_D 0x00000000
#define STBCR4_D 0x00000000
#define STBCR5_D 0x00000000
#define STBCR6_D 0x00000000
#define STBCR7_D 0x00000024
#define STBCR8_D 0x00000005
#define STBCR9_D 0x00000000
#define STBCR10_D 0x00000000
#define STBCR11_D 0x000000c0
#define STBCR12_D 0x000000f0
/*
* Set all system clocks to full speed.
* On reset, the CPU will be running at 1/2 speed.
* In the Hardware Manual, see Table 6.3 Settable Frequency Ranges
*/
#define FRQCR_D 0x0035
#define FRQCR2_D 0x0001
.global lowlevel_init
.text
.align 2
lowlevel_init:
/* PL310 init */
write32 0x3fffff80, 0x00000001
/* Disable WDT */
write16 WTCSR, WTCSR_D
write16 WTCNT, WTCNT_D
/* Set clocks */
write16 FRQCR, FRQCR_D
write16 FRQCR2, FRQCR2_D
/* Enable all peripherals(Standby Control) */
write8 STBCR3, STBCR3_D
write8 STBCR4, STBCR4_D
write8 STBCR5, STBCR5_D
write8 STBCR6, STBCR6_D
write8 STBCR7, STBCR7_D
write8 STBCR8, STBCR8_D
write8 STBCR9, STBCR9_D
write8 STBCR10, STBCR10_D
write8 STBCR11, STBCR11_D
write8 STBCR12, STBCR12_D
/* For serial booting, enable read ahead caching to speed things up */
#define DRCR_0 0x3FEFA00C
write32 DRCR_0, 0x00010100 /* Read Burst ON, Length=2 */
/* Enable all internal RAM */
write8 SYSCR1, 0xFF
write8 SYSCR2, 0xFF
write8 SYSCR3, 0xFF
nop
/* back to arch calling code */
mov pc, lr
.align 4
|
4ms/stm32mp1-baremetal
| 9,529
|
third-party/u-boot/u-boot-stm32mp1-baremetal/board/renesas/sh7753evb/lowlevel_init.S
|
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013 Renesas Solutions Corp.
*/
#include <config.h>
#include <asm/processor.h>
#include <asm/macro.h>
.macro or32, addr, data
mov.l \addr, r1
mov.l \data, r0
mov.l @r1, r2
or r2, r0
mov.l r0, @r1
.endm
.macro wait_DBCMD
mov.l DBWAIT_A, r0
mov.l @r0, r1
.endm
.global lowlevel_init
.section .spiboot1.text
.align 2
lowlevel_init:
mov #0, r14
mova 2f, r0
mov.l PC_MASK, r1
tst r0, r1
bf 2f
bra exit_pmb
nop
.align 2
/* If CPU runs on SDRAM (PC=0x5???????) or not. */
PC_MASK: .long 0x20000000
2:
mov #1, r14
mov.l EXPEVT_A, r0
mov.l @r0, r0
mov.l EXPEVT_POWER_ON_RESET, r1
cmp/eq r0, r1
bt 1f
/*
* If EXPEVT value is manual reset or tlb multipul-hit,
* initialization of DBSC3 is not necessary.
*/
bra exit_ddr
nop
1:
/*------- Reset -------*/
write32 MRSTCR0_A, MRSTCR0_D
write32 MRSTCR1_A, MRSTCR1_D
/* For Core Reset */
mov.l DBACEN_A, r0
mov.l @r0, r0
cmp/eq #0, r0
bt 3f
/*
* If DBACEN == 1(DBSC was already enabled), we have to avoid the
* initialization of DDR3-SDRAM.
*/
bra exit_ddr
nop
3:
/*------- DBSC3 -------*/
/* oscillation stabilization time */
wait_timer WAIT_OSC_TIME
/* step 3 */
write32 DBKIND_A, DBKIND_D
/* step 4 */
write32 DBCONF_A, DBCONF_D
write32 DBTR0_A, DBTR0_D
write32 DBTR1_A, DBTR1_D
write32 DBTR2_A, DBTR2_D
write32 DBTR3_A, DBTR3_D
write32 DBTR4_A, DBTR4_D
write32 DBTR5_A, DBTR5_D
write32 DBTR6_A, DBTR6_D
write32 DBTR7_A, DBTR7_D
write32 DBTR8_A, DBTR8_D
write32 DBTR9_A, DBTR9_D
write32 DBTR10_A, DBTR10_D
write32 DBTR11_A, DBTR11_D
write32 DBTR12_A, DBTR12_D
write32 DBTR13_A, DBTR13_D
write32 DBTR14_A, DBTR14_D
write32 DBTR15_A, DBTR15_D
write32 DBTR16_A, DBTR16_D
write32 DBTR17_A, DBTR17_D
write32 DBTR18_A, DBTR18_D
write32 DBTR19_A, DBTR19_D
write32 DBRNK0_A, DBRNK0_D
write32 DBADJ0_A, DBADJ0_D
write32 DBADJ2_A, DBADJ2_D
/* step 5 */
write32 DBCMD_A, DBCMD_RSTL_VAL
wait_timer WAIT_30US
/* step 6 */
write32 DBCMD_A, DBCMD_PDEN_VAL
/* step 7 */
write32 DBPDCNT3_A, DBPDCNT3_D
/* step 8 */
write32 DBPDCNT1_A, DBPDCNT1_D
write32 DBPDCNT2_A, DBPDCNT2_D
write32 DBPDLCK_A, DBPDLCK_D
write32 DBPDRGA_A, DBPDRGA_D
write32 DBPDRGD_A, DBPDRGD_D
/* step 9 */
wait_timer WAIT_30US
/* step 10 */
write32 DBPDCNT0_A, DBPDCNT0_D
/* step 11 */
wait_timer WAIT_30US
wait_timer WAIT_30US
/* step 12 */
write32 DBCMD_A, DBCMD_WAIT_VAL
wait_DBCMD
/* step 13 */
write32 DBCMD_A, DBCMD_RSTH_VAL
wait_DBCMD
/* step 14 */
write32 DBCMD_A, DBCMD_WAIT_VAL
write32 DBCMD_A, DBCMD_WAIT_VAL
write32 DBCMD_A, DBCMD_WAIT_VAL
write32 DBCMD_A, DBCMD_WAIT_VAL
/* step 15 */
write32 DBCMD_A, DBCMD_PDXT_VAL
/* step 16 */
write32 DBCMD_A, DBCMD_MRS2_VAL
/* step 17 */
write32 DBCMD_A, DBCMD_MRS3_VAL
/* step 18 */
write32 DBCMD_A, DBCMD_MRS1_VAL
/* step 19 */
write32 DBCMD_A, DBCMD_MRS0_VAL
write32 DBPDNCNF_A, DBPDNCNF_D
/* step 20 */
write32 DBCMD_A, DBCMD_ZQCL_VAL
write32 DBCMD_A, DBCMD_REF_VAL
write32 DBCMD_A, DBCMD_REF_VAL
wait_DBCMD
/* step 21 */
write32 DBCALTR_A, DBCALTR_D
/* step 22 */
write32 DBRFCNF0_A, DBRFCNF0_D
write32 DBRFCNF1_A, DBRFCNF1_D
write32 DBRFCNF2_A, DBRFCNF2_D
/* step 23 */
write32 DBCALCNF_A, DBCALCNF_D
/* step 24 */
write32 DBRFEN_A, DBRFEN_D
write32 DBCMD_A, DBCMD_SRXT_VAL
/* step 25 */
write32 DBACEN_A, DBACEN_D
/* step 26 */
wait_DBCMD
bra exit_ddr
nop
.align 2
EXPEVT_A: .long 0xff000024
EXPEVT_POWER_ON_RESET: .long 0x00000000
/*------- Reset -------*/
MRSTCR0_A: .long 0xffd50030
MRSTCR0_D: .long 0xfe1ffe7f
MRSTCR1_A: .long 0xffd50034
MRSTCR1_D: .long 0xfff3ffff
/*------- DBSC3 -------*/
DBCMD_A: .long 0xfe800018
DBKIND_A: .long 0xfe800020
DBCONF_A: .long 0xfe800024
DBTR0_A: .long 0xfe800040
DBTR1_A: .long 0xfe800044
DBTR2_A: .long 0xfe800048
DBTR3_A: .long 0xfe800050
DBTR4_A: .long 0xfe800054
DBTR5_A: .long 0xfe800058
DBTR6_A: .long 0xfe80005c
DBTR7_A: .long 0xfe800060
DBTR8_A: .long 0xfe800064
DBTR9_A: .long 0xfe800068
DBTR10_A: .long 0xfe80006c
DBTR11_A: .long 0xfe800070
DBTR12_A: .long 0xfe800074
DBTR13_A: .long 0xfe800078
DBTR14_A: .long 0xfe80007c
DBTR15_A: .long 0xfe800080
DBTR16_A: .long 0xfe800084
DBTR17_A: .long 0xfe800088
DBTR18_A: .long 0xfe80008c
DBTR19_A: .long 0xfe800090
DBRNK0_A: .long 0xfe800100
DBPDCNT0_A: .long 0xfe800200
DBPDCNT1_A: .long 0xfe800204
DBPDCNT2_A: .long 0xfe800208
DBPDCNT3_A: .long 0xfe80020c
DBPDLCK_A: .long 0xfe800280
DBPDRGA_A: .long 0xfe800290
DBPDRGD_A: .long 0xfe8002a0
DBADJ0_A: .long 0xfe8000c0
DBADJ2_A: .long 0xfe8000c8
DBRFCNF0_A: .long 0xfe8000e0
DBRFCNF1_A: .long 0xfe8000e4
DBRFCNF2_A: .long 0xfe8000e8
DBCALCNF_A: .long 0xfe8000f4
DBRFEN_A: .long 0xfe800014
DBACEN_A: .long 0xfe800010
DBWAIT_A: .long 0xfe80001c
DBCALTR_A: .long 0xfe8000f8
DBPDNCNF_A: .long 0xfe800180
WAIT_OSC_TIME: .long 6000
WAIT_30US: .long 13333
DBCMD_RSTL_VAL: .long 0x20000000
DBCMD_PDEN_VAL: .long 0x1000d73c
DBCMD_WAIT_VAL: .long 0x0000d73c
DBCMD_RSTH_VAL: .long 0x2100d73c
DBCMD_PDXT_VAL: .long 0x110000c8
DBCMD_MRS0_VAL: .long 0x28000930
DBCMD_MRS1_VAL: .long 0x29000004
DBCMD_MRS2_VAL: .long 0x2a000008
DBCMD_MRS3_VAL: .long 0x2b000000
DBCMD_ZQCL_VAL: .long 0x03000200
DBCMD_REF_VAL: .long 0x0c000000
DBCMD_SRXT_VAL: .long 0x19000000
DBKIND_D: .long 0x00000007
DBCONF_D: .long 0x0f030a01
DBTR0_D: .long 0x00000007
DBTR1_D: .long 0x00000006
DBTR2_D: .long 0x00000000
DBTR3_D: .long 0x00000007
DBTR4_D: .long 0x00070007
DBTR5_D: .long 0x0000001b
DBTR6_D: .long 0x00000014
DBTR7_D: .long 0x00000004
DBTR8_D: .long 0x00000014
DBTR9_D: .long 0x00000004
DBTR10_D: .long 0x00000008
DBTR11_D: .long 0x00000007
DBTR12_D: .long 0x0000000e
DBTR13_D: .long 0x000000a0
DBTR14_D: .long 0x00060006
DBTR15_D: .long 0x00000003
DBTR16_D: .long 0x00160002
DBTR17_D: .long 0x000c0000
DBTR18_D: .long 0x00000200
DBTR19_D: .long 0x00000040
DBRNK0_D: .long 0x00000001
DBPDCNT0_D: .long 0x00000001
DBPDCNT1_D: .long 0x00000001
DBPDCNT2_D: .long 0x00000000
DBPDCNT3_D: .long 0x00004010
DBPDLCK_D: .long 0x0000a55a
DBPDRGA_D: .long 0x00000028
DBPDRGD_D: .long 0x00017100
DBADJ0_D: .long 0x00010000
DBADJ2_D: .long 0x18061806
DBRFCNF0_D: .long 0x000001ff
DBRFCNF1_D: .long 0x00081040
DBRFCNF2_D: .long 0x00000000
DBCALCNF_D: .long 0x0000ffff
DBRFEN_D: .long 0x00000001
DBACEN_D: .long 0x00000001
DBCALTR_D: .long 0x08200820
DBPDNCNF_D: .long 0x00000001
.align 2
exit_ddr:
#if defined(CONFIG_SH_32BIT)
/*------- set PMB -------*/
write32 PASCR_A, PASCR_29BIT_D
write32 MMUCR_A, MMUCR_D
/*****************************************************************
* ent virt phys v sz c wt
* 0 0xa0000000 0x00000000 1 128M 0 1
* 1 0xa8000000 0x48000000 1 128M 0 1
* 5 0x88000000 0x48000000 1 128M 1 1
*/
write32 PMB_ADDR_SPIBOOT_A, PMB_ADDR_SPIBOOT_D
write32 PMB_DATA_SPIBOOT_A, PMB_DATA_SPIBOOT_D
write32 PMB_ADDR_DDR_C1_A, PMB_ADDR_DDR_C1_D
write32 PMB_DATA_DDR_C1_A, PMB_DATA_DDR_C1_D
write32 PMB_ADDR_DDR_N1_A, PMB_ADDR_DDR_N1_D
write32 PMB_DATA_DDR_N1_A, PMB_DATA_DDR_N1_D
write32 PMB_ADDR_ENTRY2, PMB_ADDR_NOT_USE_D
write32 PMB_ADDR_ENTRY3, PMB_ADDR_NOT_USE_D
write32 PMB_ADDR_ENTRY4, PMB_ADDR_NOT_USE_D
write32 PMB_ADDR_ENTRY6, PMB_ADDR_NOT_USE_D
write32 PMB_ADDR_ENTRY7, PMB_ADDR_NOT_USE_D
write32 PMB_ADDR_ENTRY8, PMB_ADDR_NOT_USE_D
write32 PMB_ADDR_ENTRY9, PMB_ADDR_NOT_USE_D
write32 PMB_ADDR_ENTRY10, PMB_ADDR_NOT_USE_D
write32 PMB_ADDR_ENTRY11, PMB_ADDR_NOT_USE_D
write32 PMB_ADDR_ENTRY12, PMB_ADDR_NOT_USE_D
write32 PMB_ADDR_ENTRY13, PMB_ADDR_NOT_USE_D
write32 PMB_ADDR_ENTRY14, PMB_ADDR_NOT_USE_D
write32 PMB_ADDR_ENTRY15, PMB_ADDR_NOT_USE_D
write32 PASCR_A, PASCR_INIT
mov.l DUMMY_ADDR, r0
icbi @r0
#endif /* if defined(CONFIG_SH_32BIT) */
exit_pmb:
/* CPU is running on ILRAM? */
mov r14, r0
tst #1, r0
bt 1f
mov.l _stack_ilram, r15
mov.l _spiboot_main, r0
100: bsrf r0
nop
.align 2
_spiboot_main: .long (spiboot_main - (100b + 4))
_stack_ilram: .long 0xe5204000
1:
write32 CCR_A, CCR_D
rts
nop
.align 2
#if defined(CONFIG_SH_32BIT)
/*------- set PMB -------*/
PMB_ADDR_SPIBOOT_A: .long PMB_ADDR_BASE(0)
PMB_ADDR_DDR_N1_A: .long PMB_ADDR_BASE(1)
PMB_ADDR_DDR_C1_A: .long PMB_ADDR_BASE(5)
PMB_ADDR_ENTRY2: .long PMB_ADDR_BASE(2)
PMB_ADDR_ENTRY3: .long PMB_ADDR_BASE(3)
PMB_ADDR_ENTRY4: .long PMB_ADDR_BASE(4)
PMB_ADDR_ENTRY6: .long PMB_ADDR_BASE(6)
PMB_ADDR_ENTRY7: .long PMB_ADDR_BASE(7)
PMB_ADDR_ENTRY8: .long PMB_ADDR_BASE(8)
PMB_ADDR_ENTRY9: .long PMB_ADDR_BASE(9)
PMB_ADDR_ENTRY10: .long PMB_ADDR_BASE(10)
PMB_ADDR_ENTRY11: .long PMB_ADDR_BASE(11)
PMB_ADDR_ENTRY12: .long PMB_ADDR_BASE(12)
PMB_ADDR_ENTRY13: .long PMB_ADDR_BASE(13)
PMB_ADDR_ENTRY14: .long PMB_ADDR_BASE(14)
PMB_ADDR_ENTRY15: .long PMB_ADDR_BASE(15)
PMB_ADDR_SPIBOOT_D: .long mk_pmb_addr_val(0xa0)
PMB_ADDR_DDR_C1_D: .long mk_pmb_addr_val(0x88)
PMB_ADDR_DDR_N1_D: .long mk_pmb_addr_val(0xa8)
PMB_ADDR_NOT_USE_D: .long 0x00000000
PMB_DATA_SPIBOOT_A: .long PMB_DATA_BASE(0)
PMB_DATA_DDR_N1_A: .long PMB_DATA_BASE(1)
PMB_DATA_DDR_C1_A: .long PMB_DATA_BASE(5)
/* ppn ub v s1 s0 c wt */
PMB_DATA_SPIBOOT_D: .long mk_pmb_data_val(0x00, 0, 1, 1, 0, 0, 1)
PMB_DATA_DDR_C1_D: .long mk_pmb_data_val(0x48, 0, 1, 1, 0, 1, 1)
PMB_DATA_DDR_N1_D: .long mk_pmb_data_val(0x48, 1, 1, 1, 0, 0, 1)
PASCR_A: .long 0xff000070
DUMMY_ADDR: .long 0xa0000000
PASCR_29BIT_D: .long 0x00000000
PASCR_INIT: .long 0x80000080
MMUCR_A: .long 0xff000010
MMUCR_D: .long 0x00000004 /* clear ITLB */
#endif /* CONFIG_SH_32BIT */
CCR_A: .long CCR
CCR_D: .long CCR_CACHE_INIT
|
4ms/stm32mp1-baremetal
| 10,138
|
third-party/u-boot/u-boot-stm32mp1-baremetal/board/renesas/sh7752evb/lowlevel_init.S
|
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2012 Renesas Solutions Corp.
*/
#include <config.h>
#include <asm/processor.h>
#include <asm/macro.h>
.macro or32, addr, data
mov.l \addr, r1
mov.l \data, r0
mov.l @r1, r2
or r2, r0
mov.l r0, @r1
.endm
.macro wait_DBCMD
mov.l DBWAIT_A, r0
mov.l @r0, r1
.endm
.global lowlevel_init
.section .spiboot1.text
.align 2
lowlevel_init:
/*------- GPIO -------*/
write16 PDCR_A, PDCR_D ! SPI0
write16 PGCR_A, PGCR_D ! SPI0, GETHER MDIO gate(PTG1)
write16 PJCR_A, PJCR_D ! SCIF4
write16 PTCR_A, PTCR_D ! STATUS
write16 PSEL1_A, PSEL1_D ! SPI0
write16 PSEL2_A, PSEL2_D ! SPI0
write16 PSEL5_A, PSEL5_D ! STATUS
bra exit_gpio
nop
.align 2
/*------- GPIO -------*/
PDCR_A: .long 0xffec0006
PGCR_A: .long 0xffec000c
PJCR_A: .long 0xffec0012
PTCR_A: .long 0xffec0026
PSEL1_A: .long 0xffec0072
PSEL2_A: .long 0xffec0074
PSEL5_A: .long 0xffec007a
PDCR_D: .long 0x0000
PGCR_D: .long 0x0004
PJCR_D: .long 0x0000
PTCR_D: .long 0x0000
PSEL1_D: .long 0x0000
PSEL2_D: .long 0x3000
PSEL5_D: .long 0x0ffc
.align 2
exit_gpio:
mov #0, r14
mova 2f, r0
mov.l PC_MASK, r1
tst r0, r1
bf 2f
bra exit_pmb
nop
.align 2
/* If CPU runs on SDRAM (PC=0x5???????) or not. */
PC_MASK: .long 0x20000000
2:
mov #1, r14
mov.l EXPEVT_A, r0
mov.l @r0, r0
mov.l EXPEVT_POWER_ON_RESET, r1
cmp/eq r0, r1
bt 1f
/*
* If EXPEVT value is manual reset or tlb multipul-hit,
* initialization of DDR3IF is not necessary.
*/
bra exit_ddr
nop
1:
/*------- Reset -------*/
write32 MRSTCR0_A, MRSTCR0_D
write32 MRSTCR1_A, MRSTCR1_D
/* For Core Reset */
mov.l DBACEN_A, r0
mov.l @r0, r0
cmp/eq #0, r0
bt 3f
/*
* If DBACEN == 1(DBSC was already enabled), we have to avoid the
* initialization of DDR3-SDRAM.
*/
bra exit_ddr
nop
3:
/*------- DDR3IF -------*/
/* oscillation stabilization time */
wait_timer WAIT_OSC_TIME
/* step 3 */
write32 DBCMD_A, DBCMD_RSTL_VAL
wait_timer WAIT_30US
/* step 4 */
write32 DBCMD_A, DBCMD_PDEN_VAL
/* step 5 */
write32 DBKIND_A, DBKIND_D
/* step 6 */
write32 DBCONF_A, DBCONF_D
write32 DBTR0_A, DBTR0_D
write32 DBTR1_A, DBTR1_D
write32 DBTR2_A, DBTR2_D
write32 DBTR3_A, DBTR3_D
write32 DBTR4_A, DBTR4_D
write32 DBTR5_A, DBTR5_D
write32 DBTR6_A, DBTR6_D
write32 DBTR7_A, DBTR7_D
write32 DBTR8_A, DBTR8_D
write32 DBTR9_A, DBTR9_D
write32 DBTR10_A, DBTR10_D
write32 DBTR11_A, DBTR11_D
write32 DBTR12_A, DBTR12_D
write32 DBTR13_A, DBTR13_D
write32 DBTR14_A, DBTR14_D
write32 DBTR15_A, DBTR15_D
write32 DBTR16_A, DBTR16_D
write32 DBTR17_A, DBTR17_D
write32 DBTR18_A, DBTR18_D
write32 DBTR19_A, DBTR19_D
write32 DBRNK0_A, DBRNK0_D
/* step 7 */
write32 DBPDCNT3_A, DBPDCNT3_D
/* step 8 */
write32 DBPDCNT1_A, DBPDCNT1_D
write32 DBPDCNT2_A, DBPDCNT2_D
write32 DBPDLCK_A, DBPDLCK_D
write32 DBPDRGA_A, DBPDRGA_D
write32 DBPDRGD_A, DBPDRGD_D
/* step 9 */
wait_timer WAIT_30US
/* step 10 */
write32 DBPDCNT0_A, DBPDCNT0_D
/* step 11 */
wait_timer WAIT_30US
wait_timer WAIT_30US
/* step 12 */
write32 DBCMD_A, DBCMD_WAIT_VAL
wait_DBCMD
/* step 13 */
write32 DBCMD_A, DBCMD_RSTH_VAL
wait_DBCMD
/* step 14 */
write32 DBCMD_A, DBCMD_WAIT_VAL
write32 DBCMD_A, DBCMD_WAIT_VAL
write32 DBCMD_A, DBCMD_WAIT_VAL
write32 DBCMD_A, DBCMD_WAIT_VAL
/* step 15 */
write32 DBCMD_A, DBCMD_PDXT_VAL
/* step 16 */
write32 DBCMD_A, DBCMD_MRS2_VAL
/* step 17 */
write32 DBCMD_A, DBCMD_MRS3_VAL
/* step 18 */
write32 DBCMD_A, DBCMD_MRS1_VAL
/* step 19 */
write32 DBCMD_A, DBCMD_MRS0_VAL
/* step 20 */
write32 DBCMD_A, DBCMD_ZQCL_VAL
write32 DBCMD_A, DBCMD_REF_VAL
write32 DBCMD_A, DBCMD_REF_VAL
wait_DBCMD
/* step 21 */
write32 DBADJ0_A, DBADJ0_D
write32 DBADJ1_A, DBADJ1_D
write32 DBADJ2_A, DBADJ2_D
/* step 22 */
write32 DBRFCNF0_A, DBRFCNF0_D
write32 DBRFCNF1_A, DBRFCNF1_D
write32 DBRFCNF2_A, DBRFCNF2_D
/* step 23 */
write32 DBCALCNF_A, DBCALCNF_D
/* step 24 */
write32 DBRFEN_A, DBRFEN_D
write32 DBCMD_A, DBCMD_SRXT_VAL
/* step 25 */
write32 DBACEN_A, DBACEN_D
/* step 26 */
wait_DBCMD
bra exit_ddr
nop
.align 2
EXPEVT_A: .long 0xff000024
EXPEVT_POWER_ON_RESET: .long 0x00000000
/*------- Reset -------*/
MRSTCR0_A: .long 0xffd50030
MRSTCR0_D: .long 0xfe1ffe7f
MRSTCR1_A: .long 0xffd50034
MRSTCR1_D: .long 0xfff3ffff
/*------- DDR3IF -------*/
DBCMD_A: .long 0xfe800018
DBKIND_A: .long 0xfe800020
DBCONF_A: .long 0xfe800024
DBTR0_A: .long 0xfe800040
DBTR1_A: .long 0xfe800044
DBTR2_A: .long 0xfe800048
DBTR3_A: .long 0xfe800050
DBTR4_A: .long 0xfe800054
DBTR5_A: .long 0xfe800058
DBTR6_A: .long 0xfe80005c
DBTR7_A: .long 0xfe800060
DBTR8_A: .long 0xfe800064
DBTR9_A: .long 0xfe800068
DBTR10_A: .long 0xfe80006c
DBTR11_A: .long 0xfe800070
DBTR12_A: .long 0xfe800074
DBTR13_A: .long 0xfe800078
DBTR14_A: .long 0xfe80007c
DBTR15_A: .long 0xfe800080
DBTR16_A: .long 0xfe800084
DBTR17_A: .long 0xfe800088
DBTR18_A: .long 0xfe80008c
DBTR19_A: .long 0xfe800090
DBRNK0_A: .long 0xfe800100
DBPDCNT0_A: .long 0xfe800200
DBPDCNT1_A: .long 0xfe800204
DBPDCNT2_A: .long 0xfe800208
DBPDCNT3_A: .long 0xfe80020c
DBPDLCK_A: .long 0xfe800280
DBPDRGA_A: .long 0xfe800290
DBPDRGD_A: .long 0xfe8002a0
DBADJ0_A: .long 0xfe8000c0
DBADJ1_A: .long 0xfe8000c4
DBADJ2_A: .long 0xfe8000c8
DBRFCNF0_A: .long 0xfe8000e0
DBRFCNF1_A: .long 0xfe8000e4
DBRFCNF2_A: .long 0xfe8000e8
DBCALCNF_A: .long 0xfe8000f4
DBRFEN_A: .long 0xfe800014
DBACEN_A: .long 0xfe800010
DBWAIT_A: .long 0xfe80001c
WAIT_OSC_TIME: .long 6000
WAIT_30US: .long 13333
DBCMD_RSTL_VAL: .long 0x20000000
DBCMD_PDEN_VAL: .long 0x1000d73c
DBCMD_WAIT_VAL: .long 0x0000d73c
DBCMD_RSTH_VAL: .long 0x2100d73c
DBCMD_PDXT_VAL: .long 0x110000c8
DBCMD_MRS0_VAL: .long 0x28000930
DBCMD_MRS1_VAL: .long 0x29000004
DBCMD_MRS2_VAL: .long 0x2a000008
DBCMD_MRS3_VAL: .long 0x2b000000
DBCMD_ZQCL_VAL: .long 0x03000200
DBCMD_REF_VAL: .long 0x0c000000
DBCMD_SRXT_VAL: .long 0x19000000
DBKIND_D: .long 0x00000007
DBCONF_D: .long 0x0f030a01
DBTR0_D: .long 0x00000007
DBTR1_D: .long 0x00000006
DBTR2_D: .long 0x00000000
DBTR3_D: .long 0x00000007
DBTR4_D: .long 0x00070007
DBTR5_D: .long 0x0000001b
DBTR6_D: .long 0x00000014
DBTR7_D: .long 0x00000005
DBTR8_D: .long 0x00000015
DBTR9_D: .long 0x00000006
DBTR10_D: .long 0x00000008
DBTR11_D: .long 0x00000007
DBTR12_D: .long 0x0000000e
DBTR13_D: .long 0x00000056
DBTR14_D: .long 0x00000006
DBTR15_D: .long 0x00000004
DBTR16_D: .long 0x00150002
DBTR17_D: .long 0x000c0017
DBTR18_D: .long 0x00000200
DBTR19_D: .long 0x00000040
DBRNK0_D: .long 0x00000001
DBPDCNT0_D: .long 0x00000001
DBPDCNT1_D: .long 0x00000001
DBPDCNT2_D: .long 0x00000000
DBPDCNT3_D: .long 0x00004010
DBPDLCK_D: .long 0x0000a55a
DBPDRGA_D: .long 0x00000028
DBPDRGD_D: .long 0x00017100
DBADJ0_D: .long 0x00000000
DBADJ1_D: .long 0x00000000
DBADJ2_D: .long 0x18061806
DBRFCNF0_D: .long 0x000001ff
DBRFCNF1_D: .long 0x08001000
DBRFCNF2_D: .long 0x00000000
DBCALCNF_D: .long 0x0000ffff
DBRFEN_D: .long 0x00000001
DBACEN_D: .long 0x00000001
.align 2
exit_ddr:
#if defined(CONFIG_SH_32BIT)
/*------- set PMB -------*/
write32 PASCR_A, PASCR_29BIT_D
write32 MMUCR_A, MMUCR_D
/*****************************************************************
* ent virt phys v sz c wt
* 0 0xa0000000 0x00000000 1 128M 0 1
* 1 0xa8000000 0x48000000 1 128M 0 1
* 5 0x88000000 0x48000000 1 128M 1 1
*/
write32 PMB_ADDR_SPIBOOT_A, PMB_ADDR_SPIBOOT_D
write32 PMB_DATA_SPIBOOT_A, PMB_DATA_SPIBOOT_D
write32 PMB_ADDR_DDR_C1_A, PMB_ADDR_DDR_C1_D
write32 PMB_DATA_DDR_C1_A, PMB_DATA_DDR_C1_D
write32 PMB_ADDR_DDR_N1_A, PMB_ADDR_DDR_N1_D
write32 PMB_DATA_DDR_N1_A, PMB_DATA_DDR_N1_D
write32 PMB_ADDR_ENTRY2, PMB_ADDR_NOT_USE_D
write32 PMB_ADDR_ENTRY3, PMB_ADDR_NOT_USE_D
write32 PMB_ADDR_ENTRY4, PMB_ADDR_NOT_USE_D
write32 PMB_ADDR_ENTRY6, PMB_ADDR_NOT_USE_D
write32 PMB_ADDR_ENTRY7, PMB_ADDR_NOT_USE_D
write32 PMB_ADDR_ENTRY8, PMB_ADDR_NOT_USE_D
write32 PMB_ADDR_ENTRY9, PMB_ADDR_NOT_USE_D
write32 PMB_ADDR_ENTRY10, PMB_ADDR_NOT_USE_D
write32 PMB_ADDR_ENTRY11, PMB_ADDR_NOT_USE_D
write32 PMB_ADDR_ENTRY12, PMB_ADDR_NOT_USE_D
write32 PMB_ADDR_ENTRY13, PMB_ADDR_NOT_USE_D
write32 PMB_ADDR_ENTRY14, PMB_ADDR_NOT_USE_D
write32 PMB_ADDR_ENTRY15, PMB_ADDR_NOT_USE_D
write32 PASCR_A, PASCR_INIT
mov.l DUMMY_ADDR, r0
icbi @r0
#endif /* if defined(CONFIG_SH_32BIT) */
exit_pmb:
/* CPU is running on ILRAM? */
mov r14, r0
tst #1, r0
bt 1f
mov.l _stack_ilram, r15
mov.l _spiboot_main, r0
100: bsrf r0
nop
.align 2
_spiboot_main: .long (spiboot_main - (100b + 4))
_stack_ilram: .long 0xe5204000
1:
write32 CCR_A, CCR_D
rts
nop
.align 2
#if defined(CONFIG_SH_32BIT)
/*------- set PMB -------*/
PMB_ADDR_SPIBOOT_A: .long PMB_ADDR_BASE(0)
PMB_ADDR_DDR_N1_A: .long PMB_ADDR_BASE(1)
PMB_ADDR_DDR_C1_A: .long PMB_ADDR_BASE(5)
PMB_ADDR_ENTRY2: .long PMB_ADDR_BASE(2)
PMB_ADDR_ENTRY3: .long PMB_ADDR_BASE(3)
PMB_ADDR_ENTRY4: .long PMB_ADDR_BASE(4)
PMB_ADDR_ENTRY6: .long PMB_ADDR_BASE(6)
PMB_ADDR_ENTRY7: .long PMB_ADDR_BASE(7)
PMB_ADDR_ENTRY8: .long PMB_ADDR_BASE(8)
PMB_ADDR_ENTRY9: .long PMB_ADDR_BASE(9)
PMB_ADDR_ENTRY10: .long PMB_ADDR_BASE(10)
PMB_ADDR_ENTRY11: .long PMB_ADDR_BASE(11)
PMB_ADDR_ENTRY12: .long PMB_ADDR_BASE(12)
PMB_ADDR_ENTRY13: .long PMB_ADDR_BASE(13)
PMB_ADDR_ENTRY14: .long PMB_ADDR_BASE(14)
PMB_ADDR_ENTRY15: .long PMB_ADDR_BASE(15)
PMB_ADDR_SPIBOOT_D: .long mk_pmb_addr_val(0xa0)
PMB_ADDR_DDR_C1_D: .long mk_pmb_addr_val(0x88)
PMB_ADDR_DDR_N1_D: .long mk_pmb_addr_val(0xa8)
PMB_ADDR_NOT_USE_D: .long 0x00000000
PMB_DATA_SPIBOOT_A: .long PMB_DATA_BASE(0)
PMB_DATA_DDR_N1_A: .long PMB_DATA_BASE(1)
PMB_DATA_DDR_C1_A: .long PMB_DATA_BASE(5)
/* ppn ub v s1 s0 c wt */
PMB_DATA_SPIBOOT_D: .long mk_pmb_data_val(0x00, 0, 1, 1, 0, 0, 1)
PMB_DATA_DDR_C1_D: .long mk_pmb_data_val(0x48, 0, 1, 1, 0, 1, 1)
PMB_DATA_DDR_N1_D: .long mk_pmb_data_val(0x48, 1, 1, 1, 0, 0, 1)
PASCR_A: .long 0xff000070
DUMMY_ADDR: .long 0xa0000000
PASCR_29BIT_D: .long 0x00000000
PASCR_INIT: .long 0x80000080
MMUCR_A: .long 0xff000010
MMUCR_D: .long 0x00000004 /* clear ITLB */
#endif /* CONFIG_SH_32BIT */
CCR_A: .long CCR
CCR_D: .long CCR_CACHE_INIT
|
4ms/stm32mp1-baremetal
| 4,839
|
third-party/u-boot/u-boot-stm32mp1-baremetal/board/renesas/sh7763rdp/lowlevel_init.S
|
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2008 Renesas Solutions Corp.
* Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
* Copyright (C) 2007 Kenati Technologies, Inc.
*
* board/sh7763rdp/lowlevel_init.S
*/
#include <config.h>
#include <asm/processor.h>
#include <asm/macro.h>
.global lowlevel_init
.text
.align 2
lowlevel_init:
write32 WDTCSR_A, WDTCSR_D /* Watchdog Control / Status Register */
write32 WDTST_A, WDTST_D /* Watchdog Stop Time Register */
write32 WDTBST_A, WDTBST_D /*
* 0xFFCC0008
* Watchdog Base Stop Time Register
*/
write32 CCR_A, CCR_CACHE_ICI_D /* Address of Cache Control Register */
/* Instruction Cache Invalidate */
write32 MMUCR_A, MMU_CONTROL_TI_D /* MMU Control Register */
/* TI == TLB Invalidate bit */
write32 MSTPCR0_A, MSTPCR0_D /* Address of Power Control Register 0 */
write32 MSTPCR1_A, MSTPCR1_D /* Address of Power Control Register 1 */
write32 RAMCR_A, RAMCR_D
mov.l MMSELR_A, r1
mov.l MMSELR_D, r0
synco
mov.l r0, @r1
mov.l @r1, r2 /* execute two reads after setting MMSELR */
mov.l @r1, r2
synco
/* issue memory read */
mov.l DDRSD_START_A, r1 /* memory address to read*/
mov.l @r1, r0
synco
write32 MIM8_A, MIM8_D
write32 MIMC_A, MIMC_D1
write32 STRC_A, STRC_D
write32 SDR4_A, SDR4_D
write32 MIMC_A, MIMC_D2
nop
nop
nop
write32 SCR4_A, SCR4_D3
write32 SCR4_A, SCR4_D2
write32 SDMR02000_A, SDMR02000_D
write32 SDMR00B08_A, SDMR00B08_D
write32 SCR4_A, SCR4_D2
write32 SCR4_A, SCR4_D4
nop
nop
nop
nop
write32 SCR4_A, SCR4_D4
nop
nop
nop
nop
write32 SDMR00308_A, SDMR00308_D
write32 MIMC_A, MIMC_D3
mov.l SCR4_A, r1
mov.l SCR4_D1, r0
mov.l DELAY60_D, r3
delay_loop_60:
mov.l r0, @r1
dt r3
bf delay_loop_60
nop
write32 CCR_A, CCR_CACHE_D_2 /* Address of Cache Control Register */
bsc_init:
write32 BCR_A, BCR_D
write32 CS0BCR_A, CS0BCR_D
write32 CS1BCR_A, CS1BCR_D
write32 CS2BCR_A, CS2BCR_D
write32 CS4BCR_A, CS4BCR_D
write32 CS5BCR_A, CS5BCR_D
write32 CS6BCR_A, CS6BCR_D
write32 CS0WCR_A, CS0WCR_D
write32 CS1WCR_A, CS1WCR_D
write32 CS2WCR_A, CS2WCR_D
write32 CS4WCR_A, CS4WCR_D
write32 CS5WCR_A, CS5WCR_D
write32 CS6WCR_A, CS6WCR_D
write32 CS5PCR_A, CS5PCR_D
write32 CS6PCR_A, CS6PCR_D
mov.l DELAY200_D, r3
delay_loop_200:
dt r3
bf delay_loop_200
nop
write16 PSEL0_A, PSEL0_D
write16 PSEL1_A, PSEL1_D
write32 ICR0_A, ICR0_D
stc sr, r0 /* BL bit off(init=ON) */
mov.l SR_MASK_D, r1
and r1, r0
ldc r0, sr
rts
nop
.align 2
DELAY60_D: .long 60
DELAY200_D: .long 17800
CCR_A: .long 0xFF00001C
MMUCR_A: .long 0xFF000010
RAMCR_A: .long 0xFF000074
/* Low power mode control */
MSTPCR0_A: .long 0xFFC80030
MSTPCR1_A: .long 0xFFC80038
/* RWBT */
WDTST_A: .long 0xFFCC0000
WDTCSR_A: .long 0xFFCC0004
WDTBST_A: .long 0xFFCC0008
/* BSC */
MMSELR_A: .long 0xFE600020
BCR_A: .long 0xFF801000
CS0BCR_A: .long 0xFF802000
CS1BCR_A: .long 0xFF802010
CS2BCR_A: .long 0xFF802020
CS4BCR_A: .long 0xFF802040
CS5BCR_A: .long 0xFF802050
CS6BCR_A: .long 0xFF802060
CS0WCR_A: .long 0xFF802008
CS1WCR_A: .long 0xFF802018
CS2WCR_A: .long 0xFF802028
CS4WCR_A: .long 0xFF802048
CS5WCR_A: .long 0xFF802058
CS6WCR_A: .long 0xFF802068
CS5PCR_A: .long 0xFF802070
CS6PCR_A: .long 0xFF802080
DDRSD_START_A: .long 0xAC000000
/* INTC */
ICR0_A: .long 0xFFD00000
/* DDR I/F */
MIM8_A: .long 0xFE800008
MIMC_A: .long 0xFE80000C
SCR4_A: .long 0xFE800014
STRC_A: .long 0xFE80001C
SDR4_A: .long 0xFE800034
SDMR00308_A: .long 0xFE900308
SDMR00B08_A: .long 0xFE900B08
SDMR02000_A: .long 0xFE902000
/* GPIO */
PSEL0_A: .long 0xFFEF0070
PSEL1_A: .long 0xFFEF0072
CCR_CACHE_ICI_D:.long 0x00000800
CCR_CACHE_D_2: .long 0x00000103
MMU_CONTROL_TI_D:.long 0x00000004
RAMCR_D: .long 0x00000200
MSTPCR0_D: .long 0x00000000
MSTPCR1_D: .long 0x00000000
MMSELR_D: .long 0xa5a50000
BCR_D: .long 0x00000000
CS0BCR_D: .long 0x77777770
CS1BCR_D: .long 0x77777670
CS2BCR_D: .long 0x77777670
CS4BCR_D: .long 0x77777670
CS5BCR_D: .long 0x77777670
CS6BCR_D: .long 0x77777670
CS0WCR_D: .long 0x7777770F
CS1WCR_D: .long 0x22000002
CS2WCR_D: .long 0x7777770F
CS4WCR_D: .long 0x7777770F
CS5WCR_D: .long 0x7777770F
CS6WCR_D: .long 0x7777770F
CS5PCR_D: .long 0x77000000
CS6PCR_D: .long 0x77000000
ICR0_D: .long 0x00E00000
MIM8_D: .long 0x00000000
MIMC_D1: .long 0x01d10008
MIMC_D2: .long 0x01d10009
MIMC_D3: .long 0x01d10209
SCR4_D1: .long 0x00000001
SCR4_D2: .long 0x00000002
SCR4_D3: .long 0x00000003
SCR4_D4: .long 0x00000004
STRC_D: .long 0x000f3980
SDR4_D: .long 0x00000300
SDMR00308_D: .long 0x00000000
SDMR00B08_D: .long 0x00000000
SDMR02000_D: .long 0x00000000
PSEL0_D: .word 0x00000001
PSEL1_D: .word 0x00000244
SR_MASK_D: .long 0xEFFFFF0F
WDTST_D: .long 0x5A000FFF
WDTCSR_D: .long 0xA5000000
WDTBST_D: .long 0x55000000
|
4ms/stm32mp1-baremetal
| 12,427
|
third-party/u-boot/u-boot-stm32mp1-baremetal/board/renesas/sh7757lcr/lowlevel_init.S
|
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2011 Renesas Solutions Corp.
*/
#include <config.h>
#include <asm/processor.h>
#include <asm/macro.h>
.macro or32, addr, data
mov.l \addr, r1
mov.l \data, r0
mov.l @r1, r2
or r2, r0
mov.l r0, @r1
.endm
.macro wait_DBCMD
mov.l DBWAIT_A, r0
mov.l @r0, r1
.endm
.global lowlevel_init
.section .spiboot1.text
.align 2
lowlevel_init:
/*------- GPIO -------*/
write8 PGDR_A, PGDR_D /* eMMC power off */
write16 PACR_A, PACR_D
write16 PBCR_A, PBCR_D
write16 PCCR_A, PCCR_D
write16 PDCR_A, PDCR_D
write16 PECR_A, PECR_D
write16 PFCR_A, PFCR_D
write16 PGCR_A, PGCR_D
write16 PHCR_A, PHCR_D
write16 PICR_A, PICR_D
write16 PJCR_A, PJCR_D
write16 PKCR_A, PKCR_D
write16 PLCR_A, PLCR_D
write16 PMCR_A, PMCR_D
write16 PNCR_A, PNCR_D
write16 POCR_A, POCR_D
write16 PQCR_A, PQCR_D
write16 PRCR_A, PRCR_D
write16 PSCR_A, PSCR_D
write16 PTCR_A, PTCR_D
write16 PUCR_A, PUCR_D
write16 PVCR_A, PVCR_D
write16 PWCR_A, PWCR_D
write16 PXCR_A, PXCR_D
write16 PYCR_A, PYCR_D
write16 PZCR_A, PZCR_D
write16 PSEL0_A, PSEL0_D
write16 PSEL1_A, PSEL1_D
write16 PSEL2_A, PSEL2_D
write16 PSEL3_A, PSEL3_D
write16 PSEL4_A, PSEL4_D
write16 PSEL5_A, PSEL5_D
write16 PSEL6_A, PSEL6_D
write16 PSEL7_A, PSEL7_D
write16 PSEL8_A, PSEL8_D
bra exit_gpio
nop
.align 4
/*------- GPIO -------*/
PGDR_A: .long 0xffec0040
PACR_A: .long 0xffec0000
PBCR_A: .long 0xffec0002
PCCR_A: .long 0xffec0004
PDCR_A: .long 0xffec0006
PECR_A: .long 0xffec0008
PFCR_A: .long 0xffec000a
PGCR_A: .long 0xffec000c
PHCR_A: .long 0xffec000e
PICR_A: .long 0xffec0010
PJCR_A: .long 0xffec0012
PKCR_A: .long 0xffec0014
PLCR_A: .long 0xffec0016
PMCR_A: .long 0xffec0018
PNCR_A: .long 0xffec001a
POCR_A: .long 0xffec001c
PQCR_A: .long 0xffec0020
PRCR_A: .long 0xffec0022
PSCR_A: .long 0xffec0024
PTCR_A: .long 0xffec0026
PUCR_A: .long 0xffec0028
PVCR_A: .long 0xffec002a
PWCR_A: .long 0xffec002c
PXCR_A: .long 0xffec002e
PYCR_A: .long 0xffec0030
PZCR_A: .long 0xffec0032
PSEL0_A: .long 0xffec0070
PSEL1_A: .long 0xffec0072
PSEL2_A: .long 0xffec0074
PSEL3_A: .long 0xffec0076
PSEL4_A: .long 0xffec0078
PSEL5_A: .long 0xffec007a
PSEL6_A: .long 0xffec007c
PSEL7_A: .long 0xffec0082
PSEL8_A: .long 0xffec0084
PGDR_D: .long 0x80
PACR_D: .long 0x0000
PBCR_D: .long 0x0001
PCCR_D: .long 0x0000
PDCR_D: .long 0x0000
PECR_D: .long 0x0000
PFCR_D: .long 0x0000
PGCR_D: .long 0x0000
PHCR_D: .long 0x0000
PICR_D: .long 0x0000
PJCR_D: .long 0x0000
PKCR_D: .long 0x0003
PLCR_D: .long 0x0000
PMCR_D: .long 0x0000
PNCR_D: .long 0x0000
POCR_D: .long 0x0000
PQCR_D: .long 0xc000
PRCR_D: .long 0x0000
PSCR_D: .long 0x0000
PTCR_D: .long 0x0000
#if defined(CONFIG_SH7757_OFFSET_SPI)
PUCR_D: .long 0x0055
#else
PUCR_D: .long 0x0000
#endif
PVCR_D: .long 0x0000
PWCR_D: .long 0x0000
PXCR_D: .long 0x0000
PYCR_D: .long 0x0000
PZCR_D: .long 0x0000
PSEL0_D: .long 0xfe00
PSEL1_D: .long 0x0000
PSEL2_D: .long 0x3000
PSEL3_D: .long 0xff00
PSEL4_D: .long 0x771f
PSEL5_D: .long 0x0ffc
PSEL6_D: .long 0x00ff
PSEL7_D: .long 0xfc00
PSEL8_D: .long 0x0000
.align 2
exit_gpio:
mov #0, r14
mova 2f, r0
mov.l PC_MASK, r1
tst r0, r1
bf 2f
bra exit_pmb
nop
.align 2
/* If CPU runs on SDRAM, PC is 0x8???????. */
PC_MASK: .long 0x20000000
2:
mov #1, r14
mov.l EXPEVT_A, r0
mov.l @r0, r0
mov.l EXPEVT_POWER_ON_RESET, r1
cmp/eq r0, r1
bt 1f
/*
* If EXPEVT value is manual reset or tlb multipul-hit,
* initialization of DDR3IF is not necessary.
*/
bra exit_ddr
nop
1:
/* For Core Reset */
mov.l DBACEN_A, r0
mov.l @r0, r0
cmp/eq #0, r0
bt 3f
/*
* If DBACEN == 1(DBSC was already enabled), we have to avoid the
* initialization of DDR3-SDRAM.
*/
bra exit_ddr
nop
3:
/*------- DDR3IF -------*/
/* oscillation stabilization time */
wait_timer WAIT_OSC_TIME
/* step 3 */
write32 DBCMD_A, DBCMD_RSTL_VAL
wait_timer WAIT_30US
/* step 4 */
write32 DBCMD_A, DBCMD_PDEN_VAL
/* step 5 */
write32 DBKIND_A, DBKIND_D
/* step 6 */
write32 DBCONF_A, DBCONF_D
write32 DBTR0_A, DBTR0_D
write32 DBTR1_A, DBTR1_D
write32 DBTR2_A, DBTR2_D
write32 DBTR3_A, DBTR3_D
write32 DBTR4_A, DBTR4_D
write32 DBTR5_A, DBTR5_D
write32 DBTR6_A, DBTR6_D
write32 DBTR7_A, DBTR7_D
write32 DBTR8_A, DBTR8_D
write32 DBTR9_A, DBTR9_D
write32 DBTR10_A, DBTR10_D
write32 DBTR11_A, DBTR11_D
write32 DBTR12_A, DBTR12_D
write32 DBTR13_A, DBTR13_D
write32 DBTR14_A, DBTR14_D
write32 DBTR15_A, DBTR15_D
write32 DBTR16_A, DBTR16_D
write32 DBTR17_A, DBTR17_D
write32 DBTR18_A, DBTR18_D
write32 DBTR19_A, DBTR19_D
write32 DBRNK0_A, DBRNK0_D
/* step 7 */
write32 DBPDCNT3_A, DBPDCNT3_D
/* step 8 */
write32 DBPDCNT1_A, DBPDCNT1_D
write32 DBPDCNT2_A, DBPDCNT2_D
write32 DBPDLCK_A, DBPDLCK_D
write32 DBPDRGA_A, DBPDRGA_D
write32 DBPDRGD_A, DBPDRGD_D
/* step 9 */
wait_timer WAIT_30US
/* step 10 */
write32 DBPDCNT0_A, DBPDCNT0_D
/* step 11 */
wait_timer WAIT_30US
wait_timer WAIT_30US
/* step 12 */
write32 DBCMD_A, DBCMD_WAIT_VAL
wait_DBCMD
/* step 13 */
write32 DBCMD_A, DBCMD_RSTH_VAL
wait_DBCMD
/* step 14 */
write32 DBCMD_A, DBCMD_WAIT_VAL
write32 DBCMD_A, DBCMD_WAIT_VAL
write32 DBCMD_A, DBCMD_WAIT_VAL
write32 DBCMD_A, DBCMD_WAIT_VAL
/* step 15 */
write32 DBCMD_A, DBCMD_PDXT_VAL
/* step 16 */
write32 DBCMD_A, DBCMD_MRS2_VAL
/* step 17 */
write32 DBCMD_A, DBCMD_MRS3_VAL
/* step 18 */
write32 DBCMD_A, DBCMD_MRS1_VAL
/* step 19 */
write32 DBCMD_A, DBCMD_MRS0_VAL
/* step 20 */
write32 DBCMD_A, DBCMD_ZQCL_VAL
write32 DBCMD_A, DBCMD_REF_VAL
write32 DBCMD_A, DBCMD_REF_VAL
wait_DBCMD
/* step 21 */
write32 DBADJ0_A, DBADJ0_D
write32 DBADJ1_A, DBADJ1_D
write32 DBADJ2_A, DBADJ2_D
/* step 22 */
write32 DBRFCNF0_A, DBRFCNF0_D
write32 DBRFCNF1_A, DBRFCNF1_D
write32 DBRFCNF2_A, DBRFCNF2_D
/* step 23 */
write32 DBCALCNF_A, DBCALCNF_D
/* step 24 */
write32 DBRFEN_A, DBRFEN_D
write32 DBCMD_A, DBCMD_SRXT_VAL
/* step 25 */
write32 DBACEN_A, DBACEN_D
/* step 26 */
wait_DBCMD
#if defined(CONFIG_SH7757LCR_DDR_ECC)
/* enable DDR-ECC */
write32 ECD_ECDEN_A, ECD_ECDEN_D
write32 ECD_INTSR_A, ECD_INTSR_D
write32 ECD_SPACER_A, ECD_SPACER_D
write32 ECD_MCR_A, ECD_MCR_D
#endif
bra exit_ddr
nop
.align 4
EXPEVT_A: .long 0xff000024
EXPEVT_POWER_ON_RESET: .long 0x00000000
/*------- DDR3IF -------*/
DBCMD_A: .long 0xfe800018
DBKIND_A: .long 0xfe800020
DBCONF_A: .long 0xfe800024
DBTR0_A: .long 0xfe800040
DBTR1_A: .long 0xfe800044
DBTR2_A: .long 0xfe800048
DBTR3_A: .long 0xfe800050
DBTR4_A: .long 0xfe800054
DBTR5_A: .long 0xfe800058
DBTR6_A: .long 0xfe80005c
DBTR7_A: .long 0xfe800060
DBTR8_A: .long 0xfe800064
DBTR9_A: .long 0xfe800068
DBTR10_A: .long 0xfe80006c
DBTR11_A: .long 0xfe800070
DBTR12_A: .long 0xfe800074
DBTR13_A: .long 0xfe800078
DBTR14_A: .long 0xfe80007c
DBTR15_A: .long 0xfe800080
DBTR16_A: .long 0xfe800084
DBTR17_A: .long 0xfe800088
DBTR18_A: .long 0xfe80008c
DBTR19_A: .long 0xfe800090
DBRNK0_A: .long 0xfe800100
DBPDCNT0_A: .long 0xfe800200
DBPDCNT1_A: .long 0xfe800204
DBPDCNT2_A: .long 0xfe800208
DBPDCNT3_A: .long 0xfe80020c
DBPDLCK_A: .long 0xfe800280
DBPDRGA_A: .long 0xfe800290
DBPDRGD_A: .long 0xfe8002a0
DBADJ0_A: .long 0xfe8000c0
DBADJ1_A: .long 0xfe8000c4
DBADJ2_A: .long 0xfe8000c8
DBRFCNF0_A: .long 0xfe8000e0
DBRFCNF1_A: .long 0xfe8000e4
DBRFCNF2_A: .long 0xfe8000e8
DBCALCNF_A: .long 0xfe8000f4
DBRFEN_A: .long 0xfe800014
DBACEN_A: .long 0xfe800010
DBWAIT_A: .long 0xfe80001c
WAIT_OSC_TIME: .long 6000
WAIT_30US: .long 13333
DBCMD_RSTL_VAL: .long 0x20000000
DBCMD_PDEN_VAL: .long 0x1000d73c
DBCMD_WAIT_VAL: .long 0x0000d73c
DBCMD_RSTH_VAL: .long 0x2100d73c
DBCMD_PDXT_VAL: .long 0x110000c8
DBCMD_MRS0_VAL: .long 0x28000930
DBCMD_MRS1_VAL: .long 0x29000004
DBCMD_MRS2_VAL: .long 0x2a000008
DBCMD_MRS3_VAL: .long 0x2b000000
DBCMD_ZQCL_VAL: .long 0x03000200
DBCMD_REF_VAL: .long 0x0c000000
DBCMD_SRXT_VAL: .long 0x19000000
DBKIND_D: .long 0x00000007
DBCONF_D: .long 0x0f030a01
DBTR0_D: .long 0x00000007
DBTR1_D: .long 0x00000006
DBTR2_D: .long 0x00000000
DBTR3_D: .long 0x00000007
DBTR4_D: .long 0x00070007
DBTR5_D: .long 0x0000001b
DBTR6_D: .long 0x00000014
DBTR7_D: .long 0x00000005
DBTR8_D: .long 0x00000015
DBTR9_D: .long 0x00000006
DBTR10_D: .long 0x00000008
DBTR11_D: .long 0x00000007
DBTR12_D: .long 0x0000000e
DBTR13_D: .long 0x00000056
DBTR14_D: .long 0x00000006
DBTR15_D: .long 0x00000004
DBTR16_D: .long 0x00150002
DBTR17_D: .long 0x000c0017
DBTR18_D: .long 0x00000200
DBTR19_D: .long 0x00000040
DBRNK0_D: .long 0x00000001
DBPDCNT0_D: .long 0x00000001
DBPDCNT1_D: .long 0x00000001
DBPDCNT2_D: .long 0x00000000
DBPDCNT3_D: .long 0x00004010
DBPDLCK_D: .long 0x0000a55a
DBPDRGA_D: .long 0x00000028
DBPDRGD_D: .long 0x00017100
DBADJ0_D: .long 0x00000000
DBADJ1_D: .long 0x00000000
DBADJ2_D: .long 0x18061806
DBRFCNF0_D: .long 0x000001ff
DBRFCNF1_D: .long 0x08001000
DBRFCNF2_D: .long 0x00000000
DBCALCNF_D: .long 0x0000ffff
DBRFEN_D: .long 0x00000001
DBACEN_D: .long 0x00000001
/*------- DDR-ECC -------*/
ECD_ECDEN_A: .long 0xffc1012c
ECD_ECDEN_D: .long 0x00000001
ECD_INTSR_A: .long 0xfe900024
ECD_INTSR_D: .long 0xffffffff
ECD_SPACER_A: .long 0xfe900018
ECD_SPACER_D: .long SH7757LCR_SDRAM_ECC_SETTING
ECD_MCR_A: .long 0xfe900010
ECD_MCR_D: .long 0x00000001
.align 2
exit_ddr:
#if defined(CONFIG_SH_32BIT)
/*------- set PMB -------*/
write32 PASCR_A, PASCR_29BIT_D
write32 MMUCR_A, MMUCR_D
/*****************************************************************
* ent virt phys v sz c wt
* 0 0xa0000000 0x00000000 1 128M 0 1
* 1 0xa8000000 0x48000000 1 128M 0 1
* 5 0x88000000 0x48000000 1 128M 1 1
*/
write32 PMB_ADDR_SPIBOOT_A, PMB_ADDR_SPIBOOT_D
write32 PMB_DATA_SPIBOOT_A, PMB_DATA_SPIBOOT_D
write32 PMB_ADDR_DDR_C1_A, PMB_ADDR_DDR_C1_D
write32 PMB_DATA_DDR_C1_A, PMB_DATA_DDR_C1_D
write32 PMB_ADDR_DDR_N1_A, PMB_ADDR_DDR_N1_D
write32 PMB_DATA_DDR_N1_A, PMB_DATA_DDR_N1_D
write32 PMB_ADDR_ENTRY2, PMB_ADDR_NOT_USE_D
write32 PMB_ADDR_ENTRY3, PMB_ADDR_NOT_USE_D
write32 PMB_ADDR_ENTRY4, PMB_ADDR_NOT_USE_D
write32 PMB_ADDR_ENTRY6, PMB_ADDR_NOT_USE_D
write32 PMB_ADDR_ENTRY7, PMB_ADDR_NOT_USE_D
write32 PMB_ADDR_ENTRY8, PMB_ADDR_NOT_USE_D
write32 PMB_ADDR_ENTRY9, PMB_ADDR_NOT_USE_D
write32 PMB_ADDR_ENTRY10, PMB_ADDR_NOT_USE_D
write32 PMB_ADDR_ENTRY11, PMB_ADDR_NOT_USE_D
write32 PMB_ADDR_ENTRY12, PMB_ADDR_NOT_USE_D
write32 PMB_ADDR_ENTRY13, PMB_ADDR_NOT_USE_D
write32 PMB_ADDR_ENTRY14, PMB_ADDR_NOT_USE_D
write32 PMB_ADDR_ENTRY15, PMB_ADDR_NOT_USE_D
write32 PASCR_A, PASCR_INIT
mov.l DUMMY_ADDR, r0
icbi @r0
#endif /* if defined(CONFIG_SH_32BIT) */
exit_pmb:
/* CPU is running on ILRAM? */
mov r14, r0
tst #1, r0
bt 1f
mov.l _bss_start, r15
mov.l _spiboot_main, r0
100: bsrf r0
nop
.align 2
_spiboot_main: .long (spiboot_main - (100b + 4))
_bss_start: .long bss_start
1:
write32 CCR_A, CCR_D
rts
nop
.align 4
#if defined(CONFIG_SH_32BIT)
/*------- set PMB -------*/
PMB_ADDR_SPIBOOT_A: .long PMB_ADDR_BASE(0)
PMB_ADDR_DDR_N1_A: .long PMB_ADDR_BASE(1)
PMB_ADDR_DDR_C1_A: .long PMB_ADDR_BASE(5)
PMB_ADDR_ENTRY2: .long PMB_ADDR_BASE(2)
PMB_ADDR_ENTRY3: .long PMB_ADDR_BASE(3)
PMB_ADDR_ENTRY4: .long PMB_ADDR_BASE(4)
PMB_ADDR_ENTRY6: .long PMB_ADDR_BASE(6)
PMB_ADDR_ENTRY7: .long PMB_ADDR_BASE(7)
PMB_ADDR_ENTRY8: .long PMB_ADDR_BASE(8)
PMB_ADDR_ENTRY9: .long PMB_ADDR_BASE(9)
PMB_ADDR_ENTRY10: .long PMB_ADDR_BASE(10)
PMB_ADDR_ENTRY11: .long PMB_ADDR_BASE(11)
PMB_ADDR_ENTRY12: .long PMB_ADDR_BASE(12)
PMB_ADDR_ENTRY13: .long PMB_ADDR_BASE(13)
PMB_ADDR_ENTRY14: .long PMB_ADDR_BASE(14)
PMB_ADDR_ENTRY15: .long PMB_ADDR_BASE(15)
PMB_ADDR_SPIBOOT_D: .long mk_pmb_addr_val(0xa0)
PMB_ADDR_DDR_C1_D: .long mk_pmb_addr_val(0x88)
PMB_ADDR_DDR_N1_D: .long mk_pmb_addr_val(0xa8)
PMB_ADDR_NOT_USE_D: .long 0x00000000
PMB_DATA_SPIBOOT_A: .long PMB_DATA_BASE(0)
PMB_DATA_DDR_N1_A: .long PMB_DATA_BASE(1)
PMB_DATA_DDR_C1_A: .long PMB_DATA_BASE(5)
/* ppn ub v s1 s0 c wt */
PMB_DATA_SPIBOOT_D: .long mk_pmb_data_val(0x00, 0, 1, 1, 0, 0, 1)
PMB_DATA_DDR_C1_D: .long mk_pmb_data_val(0x48, 0, 1, 1, 0, 1, 1)
PMB_DATA_DDR_N1_D: .long mk_pmb_data_val(0x48, 1, 1, 1, 0, 0, 1)
PASCR_A: .long 0xff000070
DUMMY_ADDR: .long 0xa0000000
PASCR_29BIT_D: .long 0x00000000
PASCR_INIT: .long 0x80000080
MMUCR_A: .long 0xff000010
MMUCR_D: .long 0x00000004 /* clear ITLB */
#endif /* CONFIG_SH_32BIT */
CCR_A: .long CCR
CCR_D: .long CCR_CACHE_INIT
|
4ms/stm32mp1-baremetal
| 5,613
|
third-party/u-boot/u-boot-stm32mp1-baremetal/board/renesas/r7780mp/lowlevel_init.S
|
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2007,2008 Nobuhiro Iwamatsu
*
* u-boot/board/r7780mp/lowlevel_init.S
*/
#include <config.h>
#include <asm/processor.h>
#include <asm/macro.h>
/*
* Board specific low level init code, called _very_ early in the
* startup sequence. Relocation to SDRAM has not happened yet, no
* stack is available, bss section has not been initialised, etc.
*
* (Note: As no stack is available, no subroutines can be called...).
*/
.global lowlevel_init
.text
.align 2
lowlevel_init:
write32 CCR_A, CCR_D /* Address of Cache Control Register */
/* Instruction Cache Invalidate */
write32 FRQCR_A, FRQCR_D /* Frequency control register */
/* pin_multi_setting */
write32 BBG_PMMR_A, BBG_PMMR_D_PMSR1
write32 BBG_PMSR1_A, BBG_PMSR1_D
write32 BBG_PMMR_A, BBG_PMMR_D_PMSR2
write32 BBG_PMSR2_A, BBG_PMSR2_D
write32 BBG_PMMR_A, BBG_PMMR_D_PMSR3
write32 BBG_PMSR3_A, BBG_PMSR3_D
write32 BBG_PMMR_A, BBG_PMMR_D_PMSR4
write32 BBG_PMSR4_A, BBG_PMSR4_D
write32 BBG_PMMR_A, BBG_PMMR_D_PMSRG
write32 BBG_PMSRG_A, BBG_PMSRG_D
/* cpg_setting */
write32 FRQCR_A, FRQCR_D
write32 DLLCSR_A, DLLCSR_D
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
/* wait 200us */
mov.l REPEAT0_R3, r3
mov #0, r2
repeat0:
add #1, r2
cmp/hs r3, r2
bf repeat0
nop
/* bsc_setting */
write32 MMSELR_A, MMSELR_D
write32 BCR_A, BCR_D
write32 CS0BCR_A, CS0BCR_D
write32 CS1BCR_A, CS1BCR_D
write32 CS2BCR_A, CS2BCR_D
write32 CS4BCR_A, CS4BCR_D
write32 CS5BCR_A, CS5BCR_D
write32 CS6BCR_A, CS6BCR_D
write32 CS0WCR_A, CS0WCR_D
write32 CS1WCR_A, CS1WCR_D
write32 CS2WCR_A, CS2WCR_D
write32 CS4WCR_A, CS4WCR_D
write32 CS5WCR_A, CS5WCR_D
write32 CS6WCR_A, CS6WCR_D
write32 CS5PCR_A, CS5PCR_D
write32 CS6PCR_A, CS6PCR_D
/* ddr_setting */
/* wait 200us */
mov.l REPEAT0_R3, r3
mov #0, r2
repeat1:
add #1, r2
cmp/hs r3, r2
bf repeat1
nop
mov.l MIM_U_A, r0
mov.l MIM_U_D, r1
synco
mov.l r1, @r0
synco
mov.l MIM_L_A, r0
mov.l MIM_L_D0, r1
synco
mov.l r1, @r0
synco
mov.l STR_L_A, r0
mov.l STR_L_D, r1
synco
mov.l r1, @r0
synco
mov.l SDR_L_A, r0
mov.l SDR_L_D, r1
synco
mov.l r1, @r0
synco
nop
nop
nop
nop
mov.l SCR_L_A, r0
mov.l SCR_L_D0, r1
synco
mov.l r1, @r0
synco
mov.l SCR_L_A, r0
mov.l SCR_L_D1, r1
synco
mov.l r1, @r0
synco
nop
nop
nop
mov.l EMRS_A, r0
mov.l EMRS_D, r1
synco
mov.l r1, @r0
synco
nop
nop
nop
mov.l MRS1_A, r0
mov.l MRS1_D, r1
synco
mov.l r1, @r0
synco
nop
nop
nop
mov.l SCR_L_A, r0
mov.l SCR_L_D2, r1
synco
mov.l r1, @r0
synco
nop
nop
nop
mov.l SCR_L_A, r0
mov.l SCR_L_D3, r1
synco
mov.l r1, @r0
synco
nop
nop
nop
mov.l SCR_L_A, r0
mov.l SCR_L_D4, r1
synco
mov.l r1, @r0
synco
nop
nop
nop
mov.l MRS2_A, r0
mov.l MRS2_D, r1
synco
mov.l r1, @r0
synco
nop
nop
nop
mov.l SCR_L_A, r0
mov.l SCR_L_D5, r1
synco
mov.l r1, @r0
synco
/* wait 200us */
mov.l REPEAT0_R1, r3
mov #0, r2
repeat2:
add #1, r2
cmp/hs r3, r2
bf repeat2
synco
mov.l MIM_L_A, r0
mov.l MIM_L_D1, r1
synco
mov.l r1, @r0
synco
rts
nop
.align 4
RWTCSR_D_1: .word 0xA507
RWTCSR_D_2: .word 0xA507
RWTCNT_D: .word 0x5A00
.align 2
BBG_PMMR_A: .long 0xFF800010
BBG_PMSR1_A: .long 0xFF800014
BBG_PMSR2_A: .long 0xFF800018
BBG_PMSR3_A: .long 0xFF80001C
BBG_PMSR4_A: .long 0xFF800020
BBG_PMSRG_A: .long 0xFF800024
BBG_PMMR_D_PMSR1: .long 0xffffbffd
BBG_PMSR1_D: .long 0x00004002
BBG_PMMR_D_PMSR2: .long 0xfc21a7ff
BBG_PMSR2_D: .long 0x03de5800
BBG_PMMR_D_PMSR3: .long 0xfffffff8
BBG_PMSR3_D: .long 0x00000007
BBG_PMMR_D_PMSR4: .long 0xdffdfff9
BBG_PMSR4_D: .long 0x20020006
BBG_PMMR_D_PMSRG: .long 0xffffffff
BBG_PMSRG_D: .long 0x00000000
FRQCR_A: .long FRQCR
DLLCSR_A: .long 0xffc40010
FRQCR_D: .long 0x40233035
DLLCSR_D: .long 0x00000000
/* for DDR-SDRAM */
MIM_U_A: .long MIM_1
MIM_L_A: .long MIM_2
SCR_U_A: .long SCR_1
SCR_L_A: .long SCR_2
STR_U_A: .long STR_1
STR_L_A: .long STR_2
SDR_U_A: .long SDR_1
SDR_L_A: .long SDR_2
EMRS_A: .long 0xFEC02000
MRS1_A: .long 0xFEC00B08
MRS2_A: .long 0xFEC00308
MIM_U_D: .long 0x00004000
MIM_L_D0: .long 0x03e80009
MIM_L_D1: .long 0x03e80209
SCR_L_D0: .long 0x3
SCR_L_D1: .long 0x2
SCR_L_D2: .long 0x2
SCR_L_D3: .long 0x4
SCR_L_D4: .long 0x4
SCR_L_D5: .long 0x0
STR_L_D: .long 0x000f0000
SDR_L_D: .long 0x00000400
EMRS_D: .long 0x0
MRS1_D: .long 0x0
MRS2_D: .long 0x0
/* Cache Controller */
CCR_A: .long CCR
MMUCR_A: .long MMUCR
RWTCNT_A: .long WTCNT
CCR_D: .long 0x0000090b
CCR_D_2: .long 0x00000103
MMUCR_D: .long 0x00000004
MSTPCR0_D: .long 0x00001001
MSTPCR2_D: .long 0xffffffff
/* local Bus State Controller */
MMSELR_A: .long MMSELR
BCR_A: .long BCR
CS0BCR_A: .long CS0BCR
CS1BCR_A: .long CS1BCR
CS2BCR_A: .long CS2BCR
CS4BCR_A: .long CS4BCR
CS5BCR_A: .long CS5BCR
CS6BCR_A: .long CS6BCR
CS0WCR_A: .long CS0WCR
CS1WCR_A: .long CS1WCR
CS2WCR_A: .long CS2WCR
CS4WCR_A: .long CS4WCR
CS5WCR_A: .long CS5WCR
CS6WCR_A: .long CS6WCR
CS5PCR_A: .long CS5PCR
CS6PCR_A: .long CS6PCR
MMSELR_D: .long 0xA5A50003
BCR_D: .long 0x00000000
CS0BCR_D: .long 0x77777770
CS1BCR_D: .long 0x77777670
CS2BCR_D: .long 0x77777770
CS4BCR_D: .long 0x77777770
CS5BCR_D: .long 0x77777670
CS6BCR_D: .long 0x77777770
CS0WCR_D: .long 0x00020006
CS1WCR_D: .long 0x00232304
CS2WCR_D: .long 0x7777770F
CS4WCR_D: .long 0x7777770F
CS5WCR_D: .long 0x00101006
CS6WCR_D: .long 0x77777703
CS5PCR_D: .long 0x77000000
CS6PCR_D: .long 0x77000000
REPEAT0_R3: .long 0x00002000
REPEAT0_R1: .long 0x0000200
|
4ms/stm32mp1-baremetal
| 3,296
|
third-party/u-boot/u-boot-stm32mp1-baremetal/board/sysam/stmark2/sbf_dram_init.S
|
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Board-specific early ddr/sdram init.
*
* (C) Copyright 2017 Angelo Dureghello <angelo@sysam.it>
*/
.equ PPMCR0, 0xfc04002d
.equ MSCR_SDRAMC, 0xec094060
.equ MISCCR2, 0xec09001a
.equ DDR_RCR, 0xfc0b8180
.equ DDR_PADCR, 0xfc0b81ac
.equ DDR_CR00, 0xfc0b8000
.equ DDR_CR06, 0xfc0b8018
.equ DDR_CR09, 0xfc0b8024
.equ DDR_CR40, 0xfc0b80a0
.equ DDR_CR45, 0xfc0b80b4
.equ DDR_CR56, 0xfc0b80e0
.global sbf_dram_init
.text
sbf_dram_init:
/* CD46 = DDR on */
move.l #PPMCR0, %a1
move.b #46, (%a1)
/* stmark 2, max drive strength */
move.l #MSCR_SDRAMC, %a1
move.b #1, (%a1)
/*
* use cpu clock, seems more realiable
*
* DDR2 clock is serviced from DDR controller as input clock / 2
* so, if clock comes from
* vco, i.e. 480(vco) / 2, so ddr clock is 240 Mhz (measured)
* cpu, i.e. 250(cpu) / 2, so ddr clock is 125 Mhz (measured)
*
* .
* / \ DDR2 can't be clocked lower than 125Mhz
* / ! \ DDR2 init must pass further i/dcache enable test
* /_____\
* WARNING
*/
/* cpu / 2 = 125 Mhz for 480 Mhz pll */
move.l #MISCCR2, %a1
move.w #0xa01d, (%a1)
/* DDR force sw reset settings */
move.l #DDR_RCR, %a1
move.l #0x00000000, (%a1)
move.l #0x40000000, (%a1)
/*
* PAD_ODT_CS: for us seems both 1(75 ohm) and 2(150ohm) are good,
* 500/700 mV are ok
*/
move.l #DDR_PADCR, %a1
move.l #0x01030203, (%a1) /* as freescale tower */
move.l #DDR_CR00, %a1
move.l #0x01010101, (%a1)+ /* 0x00 */
move.l #0x00000101, (%a1)+ /* 0x04 */
move.l #0x01010100, (%a1)+ /* 0x08 */
move.l #0x01010000, (%a1)+ /* 0x0C */
move.l #0x00010101, (%a1)+ /* 0x10 */
move.l #DDR_CR06, %a1
move.l #0x00010100, (%a1)+ /* 0x18 */
move.l #0x00000001, (%a1)+ /* 0x1C */
move.l #0x01000001, (%a1)+ /* 0x20 */
move.l #0x00000100, (%a1)+ /* 0x24 */
move.l #0x00010001, (%a1)+ /* 0x28 */
move.l #0x00000200, (%a1)+ /* 0x2C */
move.l #0x01000002, (%a1)+ /* 0x30 */
move.l #0x00000000, (%a1)+ /* 0x34 */
move.l #0x00000100, (%a1)+ /* 0x38 */
move.l #0x02000100, (%a1)+ /* 0x3C */
move.l #0x02000407, (%a1)+ /* 0x40 */
move.l #0x02030007, (%a1)+ /* 0x44 */
move.l #0x02000100, (%a1)+ /* 0x48 */
move.l #0x0A030203, (%a1)+ /* 0x4C */
move.l #0x00020708, (%a1)+ /* 0x50 */
move.l #0x00050008, (%a1)+ /* 0x54 */
move.l #0x04030002, (%a1)+ /* 0x58 */
move.l #0x00000004, (%a1)+ /* 0x5C */
move.l #0x020A0000, (%a1)+ /* 0x60 */
move.l #0x0C00000E, (%a1)+ /* 0x64 */
move.l #0x00002004, (%a1)+ /* 0x68 */
move.l #0x00000000, (%a1)+ /* 0x6C */
move.l #0x00100010, (%a1)+ /* 0x70 */
move.l #0x00100010, (%a1)+ /* 0x74 */
move.l #0x00000000, (%a1)+ /* 0x78 */
move.l #0x07990000, (%a1)+ /* 0x7C */
move.l #DDR_CR40, %a1
move.l #0x00000000, (%a1)+ /* 0xA0 */
move.l #0x00C80064, (%a1)+ /* 0xA4 */
move.l #0x44520002, (%a1)+ /* 0xA8 */
move.l #0x00C80023, (%a1)+ /* 0xAC */
move.l #DDR_CR45, %a1
move.l #0x0000C350, (%a1) /* 0xB4 */
move.l #DDR_CR56, %a1
move.l #0x04000000, (%a1)+ /* 0xE0 */
move.l #0x03000304, (%a1)+ /* 0xE4 */
move.l #0x40040000, (%a1)+ /* 0xE8 */
move.l #0xC0004004, (%a1)+ /* 0xEC */
move.l #0x0642C000, (%a1)+ /* 0xF0 */
move.l #0x00000642, (%a1)+ /* 0xF4 */
move.l #DDR_CR09, %a1
tpf
move.l #0x01000100, (%a1) /* 0x24 */
move.l #0x2000, %d1
bsr asm_delay
rts
|
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