repo_id stringlengths 5 115 | size int64 590 5.01M | file_path stringlengths 4 212 | content stringlengths 590 5.01M |
|---|---|---|---|
wlsfx/bnbb | 91,466 | .local/share/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/aws-lc-sys-0.32.0/aws-lc/generated-src/linux-x86_64/crypto/cipher_extra/aesni-sha256-x86_64.S | // This file is generated from a similarly-named Perl script in the BoringSSL
// source tree. Do not edit by hand.
#include <openssl/asm_base.h>
#if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86_64) && defined(__ELF__)
.text
.extern OPENSSL_ia32cap_P
.hidden OPENSSL_ia32cap_P
.globl aesni_cbc_sha256_enc
.hidden a... |
wlsfx/bnbb | 67,967 | .local/share/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/aws-lc-sys-0.32.0/aws-lc/generated-src/linux-x86_64/crypto/cipher_extra/aes128gcmsiv-x86_64.S | // This file is generated from a similarly-named Perl script in the BoringSSL
// source tree. Do not edit by hand.
#include <openssl/asm_base.h>
#if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86_64) && defined(__ELF__)
.section .rodata
.align 16
one:
.quad 1,0
two:
.quad 2,0
three:
.quad 3,0
four:
.quad 4,0
five:
... |
wlsfx/bnbb | 58,628 | .local/share/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/aws-lc-sys-0.32.0/aws-lc/generated-src/linux-x86_64/crypto/cipher_extra/aesni-sha1-x86_64.S | // This file is generated from a similarly-named Perl script in the BoringSSL
// source tree. Do not edit by hand.
#include <openssl/asm_base.h>
#if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86_64) && defined(__ELF__)
.text
.extern OPENSSL_ia32cap_P
.hidden OPENSSL_ia32cap_P
.globl aesni_cbc_sha1_enc
.hidden aes... |
wlsfx/bnbb | 3,671 | .local/share/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/aws-lc-sys-0.32.0/aws-lc/generated-src/mac-x86/crypto/test/trampoline-x86.S | // This file is generated from a similarly-named Perl script in the BoringSSL
// source tree. Do not edit by hand.
#include <openssl/asm_base.h>
#if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86) && defined(__APPLE__)
.text
.globl _abi_test_trampoline
.private_extern _abi_test_trampoline
.align 4
_abi_test_trampoli... |
wlsfx/bnbb | 98,564 | .local/share/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/aws-lc-sys-0.32.0/aws-lc/generated-src/mac-x86/crypto/fipsmodule/sha256-586.S | // This file is generated from a similarly-named Perl script in the BoringSSL
// source tree. Do not edit by hand.
#include <openssl/asm_base.h>
#if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86) && defined(__APPLE__)
.text
.globl _sha256_block_data_order_nohw
.private_extern _sha256_block_data_order_nohw
.align 4
... |
wlsfx/bnbb | 68,212 | .local/share/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/aws-lc-sys-0.32.0/aws-lc/generated-src/mac-x86/crypto/fipsmodule/sha1-586.S | // This file is generated from a similarly-named Perl script in the BoringSSL
// source tree. Do not edit by hand.
#include <openssl/asm_base.h>
#if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86) && defined(__APPLE__)
.text
.globl _sha1_block_data_order_nohw
.private_extern _sha1_block_data_order_nohw
.align 4
_sha... |
wlsfx/bnbb | 15,187 | .local/share/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/aws-lc-sys-0.32.0/aws-lc/generated-src/mac-x86/crypto/fipsmodule/vpaes-x86.S | // This file is generated from a similarly-named Perl script in the BoringSSL
// source tree. Do not edit by hand.
#include <openssl/asm_base.h>
#if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86) && defined(__APPLE__)
.text
#ifdef BORINGSSL_DISPATCH_TEST
#endif
.align 6,0x90
L_vpaes_consts:
.long 218628480,23521025... |
wlsfx/bnbb | 21,551 | .local/share/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/aws-lc-sys-0.32.0/aws-lc/generated-src/mac-x86/crypto/fipsmodule/co-586.S | // This file is generated from a similarly-named Perl script in the BoringSSL
// source tree. Do not edit by hand.
#include <openssl/asm_base.h>
#if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86) && defined(__APPLE__)
.text
.globl _bn_mul_comba8
.private_extern _bn_mul_comba8
.align 4
_bn_mul_comba8:
L_bn_mul_comba... |
wlsfx/bnbb | 12,051 | .local/share/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/aws-lc-sys-0.32.0/aws-lc/generated-src/mac-x86/crypto/fipsmodule/md5-586.S | // This file is generated from a similarly-named Perl script in the BoringSSL
// source tree. Do not edit by hand.
#include <openssl/asm_base.h>
#if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86) && defined(__APPLE__)
.text
.globl _md5_block_asm_data_order
.private_extern _md5_block_asm_data_order
.align 4
_md5_blo... |
wlsfx/bnbb | 49,856 | .local/share/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/aws-lc-sys-0.32.0/aws-lc/generated-src/mac-x86/crypto/fipsmodule/aesni-x86.S | // This file is generated from a similarly-named Perl script in the BoringSSL
// source tree. Do not edit by hand.
#include <openssl/asm_base.h>
#if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86) && defined(__APPLE__)
.text
#ifdef BORINGSSL_DISPATCH_TEST
#endif
.globl _aes_hw_encrypt
.private_extern _aes_hw_encrypt... |
wlsfx/bnbb | 5,508 | .local/share/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/aws-lc-sys-0.32.0/aws-lc/generated-src/mac-x86/crypto/fipsmodule/ghash-ssse3-x86.S | // This file is generated from a similarly-named Perl script in the BoringSSL
// source tree. Do not edit by hand.
#include <openssl/asm_base.h>
#if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86) && defined(__APPLE__)
.text
.globl _gcm_gmult_ssse3
.private_extern _gcm_gmult_ssse3
.align 4
_gcm_gmult_ssse3:
L_gcm_gm... |
wlsfx/bnbb | 16,233 | .local/share/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/aws-lc-sys-0.32.0/aws-lc/generated-src/mac-x86/crypto/fipsmodule/bn-586.S | // This file is generated from a similarly-named Perl script in the BoringSSL
// source tree. Do not edit by hand.
#include <openssl/asm_base.h>
#if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86) && defined(__APPLE__)
.text
.globl _bn_mul_add_words
.private_extern _bn_mul_add_words
.align 4
_bn_mul_add_words:
L_bn_... |
wlsfx/bnbb | 9,078 | .local/share/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/aws-lc-sys-0.32.0/aws-lc/generated-src/mac-x86/crypto/fipsmodule/x86-mont.S | // This file is generated from a similarly-named Perl script in the BoringSSL
// source tree. Do not edit by hand.
#include <openssl/asm_base.h>
#if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86) && defined(__APPLE__)
.text
.globl _bn_mul_mont
.private_extern _bn_mul_mont
.align 4
_bn_mul_mont:
L_bn_mul_mont_begin:... |
wlsfx/bnbb | 49,913 | .local/share/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/aws-lc-sys-0.32.0/aws-lc/generated-src/mac-x86/crypto/fipsmodule/sha512-586.S | // This file is generated from a similarly-named Perl script in the BoringSSL
// source tree. Do not edit by hand.
#include <openssl/asm_base.h>
#if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86) && defined(__APPLE__)
.text
.globl _sha512_block_data_order
.private_extern _sha512_block_data_order
.align 4
_sha512_bl... |
wlsfx/bnbb | 6,387 | .local/share/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/aws-lc-sys-0.32.0/aws-lc/generated-src/mac-x86/crypto/fipsmodule/ghash-x86.S | // This file is generated from a similarly-named Perl script in the BoringSSL
// source tree. Do not edit by hand.
#include <openssl/asm_base.h>
#if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86) && defined(__APPLE__)
.text
.globl _gcm_init_clmul
.private_extern _gcm_init_clmul
.align 4
_gcm_init_clmul:
L_gcm_init_... |
wlsfx/bnbb | 19,084 | .local/share/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/aws-lc-sys-0.32.0/aws-lc/generated-src/mac-x86/crypto/chacha/chacha-x86.S | // This file is generated from a similarly-named Perl script in the BoringSSL
// source tree. Do not edit by hand.
#include <openssl/asm_base.h>
#if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86) && defined(__APPLE__)
.text
.globl _ChaCha20_ctr32_nohw
.private_extern _ChaCha20_ctr32_nohw
.align 4
_ChaCha20_ctr32_no... |
wlsfx/bnbb | 6,847 | .local/share/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/aws-lc-sys-0.32.0/aws-lc/generated-src/ios-arm/crypto/test/trampoline-armv4.S | // This file is generated from a similarly-named Perl script in the BoringSSL
// source tree. Do not edit by hand.
#include <openssl/asm_base.h>
#if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_ARM) && defined(__APPLE__)
.syntax unified
.text
@ abi_test_trampoline loads callee-saved registers from |state|, calls ... |
wlsfx/bnbb | 19,155 | .local/share/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/aws-lc-sys-0.32.0/aws-lc/generated-src/ios-arm/crypto/fipsmodule/aesv8-armx.S | // This file is generated from a similarly-named Perl script in the BoringSSL
// source tree. Do not edit by hand.
#include <openssl/asm_base.h>
#if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_ARM) && defined(__APPLE__)
#include <openssl/arm_arch.h>
#if __ARM_MAX_ARCH__>=7
.text
.code 32
#undef __thumb2__
.align 5... |
wlsfx/bnbb | 32,164 | .local/share/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/aws-lc-sys-0.32.0/aws-lc/generated-src/ios-arm/crypto/fipsmodule/bsaes-armv7.S | // This file is generated from a similarly-named Perl script in the BoringSSL
// source tree. Do not edit by hand.
#include <openssl/asm_base.h>
#if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_ARM) && defined(__APPLE__)
@ Copyright 2012-2016 The OpenSSL Project Authors. All Rights Reserved.
@
@ Licensed under the Ope... |
wlsfx/bnbb | 40,095 | .local/share/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/aws-lc-sys-0.32.0/aws-lc/generated-src/ios-arm/crypto/fipsmodule/vpaes-armv7.S | // This file is generated from a similarly-named Perl script in the BoringSSL
// source tree. Do not edit by hand.
#include <openssl/asm_base.h>
#if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_ARM) && defined(__APPLE__)
.syntax unified
#if defined(__thumb2__)
.thumb
#else
.code 32
#endif
.text
.align 7 @ total... |
wlsfx/bnbb | 21,755 | .local/share/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/aws-lc-sys-0.32.0/aws-lc/generated-src/ios-arm/crypto/fipsmodule/armv4-mont.S | // This file is generated from a similarly-named Perl script in the BoringSSL
// source tree. Do not edit by hand.
#include <openssl/asm_base.h>
#if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_ARM) && defined(__APPLE__)
#include <openssl/arm_arch.h>
@ Silence ARMv8 deprecated IT instruction warnings. This file is us... |
wlsfx/bnbb | 64,769 | .local/share/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/aws-lc-sys-0.32.0/aws-lc/generated-src/ios-arm/crypto/fipsmodule/sha256-armv4.S | // This file is generated from a similarly-named Perl script in the BoringSSL
// source tree. Do not edit by hand.
#include <openssl/asm_base.h>
#if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_ARM) && defined(__APPLE__)
@ Copyright 2007-2016 The OpenSSL Project Authors. All Rights Reserved.
@
@ Licensed under the Ope... |
wlsfx/bnbb | 42,677 | .local/share/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/aws-lc-sys-0.32.0/aws-lc/generated-src/ios-arm/crypto/fipsmodule/sha512-armv4.S | // This file is generated from a similarly-named Perl script in the BoringSSL
// source tree. Do not edit by hand.
#include <openssl/asm_base.h>
#if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_ARM) && defined(__APPLE__)
@ Copyright 2007-2016 The OpenSSL Project Authors. All Rights Reserved.
@
@ Licensed under the Ope... |
wlsfx/bnbb | 6,942 | .local/share/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/aws-lc-sys-0.32.0/aws-lc/generated-src/ios-arm/crypto/fipsmodule/ghashv8-armx.S | // This file is generated from a similarly-named Perl script in the BoringSSL
// source tree. Do not edit by hand.
#include <openssl/asm_base.h>
#if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_ARM) && defined(__APPLE__)
#include <openssl/arm_arch.h>
#if __ARM_MAX_ARCH__>=7
.text
.code 32
#undef __thumb2__
.globl _g... |
wlsfx/bnbb | 6,253 | .local/share/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/aws-lc-sys-0.32.0/aws-lc/generated-src/ios-arm/crypto/fipsmodule/ghash-armv4.S | // This file is generated from a similarly-named Perl script in the BoringSSL
// source tree. Do not edit by hand.
#include <openssl/asm_base.h>
#if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_ARM) && defined(__APPLE__)
#include <openssl/arm_arch.h>
@ Silence ARMv8 deprecated IT instruction warnings. This file is us... |
wlsfx/bnbb | 31,590 | .local/share/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/aws-lc-sys-0.32.0/aws-lc/generated-src/ios-arm/crypto/fipsmodule/sha1-armv4-large.S | // This file is generated from a similarly-named Perl script in the BoringSSL
// source tree. Do not edit by hand.
#include <openssl/asm_base.h>
#if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_ARM) && defined(__APPLE__)
#include <openssl/arm_arch.h>
.text
#if defined(__thumb2__)
.syntax unified
.thumb
#else
.code 32... |
wlsfx/bnbb | 28,701 | .local/share/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/aws-lc-sys-0.32.0/aws-lc/generated-src/ios-arm/crypto/chacha/chacha-armv4.S | // This file is generated from a similarly-named Perl script in the BoringSSL
// source tree. Do not edit by hand.
#include <openssl/asm_base.h>
#if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_ARM) && defined(__APPLE__)
#include <openssl/arm_arch.h>
@ Silence ARMv8 deprecated IT instruction warnings. This file is us... |
WSFcloud/rCore-OS | 2,218 | os/src/trap/trap.S | .altmacro
.macro SAVE_GP n
sd x\n, \n*8(sp)
.endm
.macro LOAD_GP n
ld x\n, \n*8(sp)
.endm
.section .text.trampoline
.globl __alltraps
.globl __restore
.globl __alltraps_k
.globl __restore_k
.align 2
__alltraps:
csrrw sp, sscratch, sp
# now sp->*TrapContext in user space, sscratch... |
wust-2025oscomp-NovaOS/NovaOS | 2,218 | os/src/trap/trap.S | .altmacro
.macro SAVE_GP n
sd x\n, \n*8(sp)
.endm
.macro LOAD_GP n
ld x\n, \n*8(sp)
.endm
.section .text.trampoline
.globl __alltraps
.globl __restore
.globl __alltraps_k
.globl __restore_k
.align 2
__alltraps:
csrrw sp, sscratch, sp
# now sp->*TrapContext in user space, sscratch... |
XajilX/my_rcore | 1,543 | os/src/trap/trap.S | .altmacro
.macro SAVE_GP n
sd x\n, \n*8(sp)
.endm
.macro LOAD_GP n
ld x\n, \n*8(sp)
.endm
.section .text.trampoline
.globl __trap_entry
.globl __restore
.globl __trap_entry_k
.globl __restore_k
.align 2
__trap_entry:
csrrw sp, sscratch, sp
sd x1, 8(sp)
sd x3, 24(sp)
.set... |
xavierrouth/rustc-cs256 | 11,809 | library/std/src/sys/pal/sgx/abi/entry.S | /* This symbol is used at runtime to figure out the virtual address that the */
/* enclave is loaded at. */
.section absolute
.global IMAGE_BASE
IMAGE_BASE:
.section ".note.x86_64-fortanix-unknown-sgx", "", @note
.align 4
.long 1f - 0f /* name length (not including padding) */
.long 3f - 2f ... |
xiaomo-xty/xux-core | 4,416 | os/src/trap/trap.S |
.altmacro
# sp[n] = reg.x<n>
.macro SAVE_GP n
sd x\n, \n*8(sp)
.endm
# reg.x<n> = sp[n]
.macro LOAD_GP n
ld x\n, \n*8(sp)
.endm
# trampoline code symbol
.section .text.trampoline
.globl __alltraps
.globl __restore
.globl __alltraps_kernel
.globl __restore_kernel
.align 2
__al... |
xiaomo-xty/xux-core | 2,602 | os/src/task/switch.S | .altmacro
# (n+2)*8(a0): ctx.s[n+1]
# SAVE_SN n : ctx.s[n+1] = reg.s<n>
.macro SAVE_SN n
sd s\n, (\n+2)*8(a0)
.endm
# (n+2)*8(a1): ctx.s[n+1]
# LOAD_SN n : reg.s<n> = ctx.s[n+1]
.macro LOAD_SN n
ld s\n, (\n+2)*8(a1)
.endm
.section .text
.globl __switch
# TaskContext Layout in Memory:
#
... |
Xiaozxiaobai/lab-lazyalloc | 2,420 | src/asm/kernelvec.S | # from xv6-riscv:
# interrupts and exceptions while in supervisor
# mode come here.
#
# push all registers, call kerneltrap(), restore, return.
#
.section .text
.globl kernelvec
.align 4
kernelvec:
// make room to save registers.
addi sp, sp, -256
// save the registers.
sd ra, 0(sp)
sd sp, 8(sp)
... |
Xiaozxiaobai/lab-lazyalloc | 3,489 | src/asm/trampoline.S | # from xv6-riscv:
# code used to switch context between user and kernel space
#
# this code is mapped at the same virtual address
# (TRAMPOLINE) in user and kernel space so that
# it continues to work when it switches page tables.
#
# note: code size here should not be larger than a page,
# and kernel.ld will ali... |
Xiaozxiaobai/lab-pagetable | 2,420 | src/asm/kernelvec.S | # from xv6-riscv:
# interrupts and exceptions while in supervisor
# mode come here.
#
# push all registers, call kerneltrap(), restore, return.
#
.section .text
.globl kernelvec
.align 4
kernelvec:
// make room to save registers.
addi sp, sp, -256
// save the registers.
sd ra, 0(sp)
sd sp, 8(sp)
... |
Xiaozxiaobai/lab-pagetable | 3,489 | src/asm/trampoline.S | # from xv6-riscv:
# code used to switch context between user and kernel space
#
# this code is mapped at the same virtual address
# (TRAMPOLINE) in user and kernel space so that
# it continues to work when it switches page tables.
#
# note: code size here should not be larger than a page,
# and kernel.ld will ali... |
Xiaozxiaobai/lab-schedule | 2,420 | src/asm/kernelvec.S | # from xv6-riscv:
# interrupts and exceptions while in supervisor
# mode come here.
#
# push all registers, call kerneltrap(), restore, return.
#
.section .text
.globl kernelvec
.align 4
kernelvec:
// make room to save registers.
addi sp, sp, -256
// save the registers.
sd ra, 0(sp)
sd sp, 8(sp)
... |
Xiaozxiaobai/lab-schedule | 3,489 | src/asm/trampoline.S | # from xv6-riscv:
# code used to switch context between user and kernel space
#
# this code is mapped at the same virtual address
# (TRAMPOLINE) in user and kernel space so that
# it continues to work when it switches page tables.
#
# note: code size here should not be larger than a page,
# and kernel.ld will ali... |
Xiaozxiaobai/lab-syscall | 2,420 | src/asm/kernelvec.S | # from xv6-riscv:
# interrupts and exceptions while in supervisor
# mode come here.
#
# push all registers, call kerneltrap(), restore, return.
#
.section .text
.globl kernelvec
.align 4
kernelvec:
// make room to save registers.
addi sp, sp, -256
// save the registers.
sd ra, 0(sp)
sd sp, 8(sp)
... |
Xiaozxiaobai/lab-syscall | 3,489 | src/asm/trampoline.S | # from xv6-riscv:
# code used to switch context between user and kernel space
#
# this code is mapped at the same virtual address
# (TRAMPOLINE) in user and kernel space so that
# it continues to work when it switches page tables.
#
# note: code size here should not be larger than a page,
# and kernel.ld will ali... |
Xiaozxiaobai/lab-test | 2,420 | src/asm/kernelvec.S | # from xv6-riscv:
# interrupts and exceptions while in supervisor
# mode come here.
#
# push all registers, call kerneltrap(), restore, return.
#
.section .text
.globl kernelvec
.align 4
kernelvec:
// make room to save registers.
addi sp, sp, -256
// save the registers.
sd ra, 0(sp)
sd sp, 8(sp)
... |
Xiaozxiaobai/lab-test | 3,489 | src/asm/trampoline.S | # from xv6-riscv:
# code used to switch context between user and kernel space
#
# this code is mapped at the same virtual address
# (TRAMPOLINE) in user and kernel space so that
# it continues to work when it switches page tables.
#
# note: code size here should not be larger than a page,
# and kernel.ld will ali... |
Xiaozxiaobai/lab-util | 2,420 | kernel/src/asm/kernelvec.S | # from xv6-riscv:
# interrupts and exceptions while in supervisor
# mode come here.
#
# push all registers, call kerneltrap(), restore, return.
#
.section .text
.globl kernelvec
.align 4
kernelvec:
// make room to save registers.
addi sp, sp, -256
// save the registers.
sd ra, 0(sp)
sd sp, 8(sp)
... |
Xiaozxiaobai/lab-util | 3,489 | kernel/src/asm/trampoline.S | # from xv6-riscv:
# code used to switch context between user and kernel space
#
# this code is mapped at the same virtual address
# (TRAMPOLINE) in user and kernel space so that
# it continues to work when it switches page tables.
#
# note: code size here should not be larger than a page,
# and kernel.ld will ali... |
Xiaozxiaobai/os-lesson | 2,420 | src/asm/kernelvec.S | # from xv6-riscv:
# interrupts and exceptions while in supervisor
# mode come here.
#
# push all registers, call kerneltrap(), restore, return.
#
.section .text
.globl kernelvec
.align 4
kernelvec:
// make room to save registers.
addi sp, sp, -256
// save the registers.
sd ra, 0(sp)
sd sp, 8(sp)
... |
Xiaozxiaobai/os-lesson | 3,489 | src/asm/trampoline.S | # from xv6-riscv:
# code used to switch context between user and kernel space
#
# this code is mapped at the same virtual address
# (TRAMPOLINE) in user and kernel space so that
# it continues to work when it switches page tables.
#
# note: code size here should not be larger than a page,
# and kernel.ld will ali... |
Xiaozxiaobai/lab-trap | 2,420 | src/asm/kernelvec.S | # from xv6-riscv:
# interrupts and exceptions while in supervisor
# mode come here.
#
# push all registers, call kerneltrap(), restore, return.
#
.section .text
.globl kernelvec
.align 4
kernelvec:
// make room to save registers.
addi sp, sp, -256
// save the registers.
sd ra, 0(sp)
sd sp, 8(sp)
... |
Xiaozxiaobai/lab-trap | 3,489 | src/asm/trampoline.S | # from xv6-riscv:
# code used to switch context between user and kernel space
#
# this code is mapped at the same virtual address
# (TRAMPOLINE) in user and kernel space so that
# it continues to work when it switches page tables.
#
# note: code size here should not be larger than a page,
# and kernel.ld will ali... |
xingmin1/OSKernel2024-46 | 2,038 | arceos/modules/axhal/linker.lds.S | OUTPUT_ARCH(%ARCH%)
BASE_ADDRESS = %KERNEL_BASE%;
ENTRY(_start)
SECTIONS
{
. = BASE_ADDRESS;
_skernel = .;
.text : ALIGN(4K) {
_stext = .;
*(.text.boot)
*(.text .text.*)
. = ALIGN(4K);
_etext = .;
}
.rodata : ALIGN(4K) {
_srodata = .;
*(.ro... |
xingmin1/OSKernel2024-46 | 4,307 | arceos/modules/axhal/src/platform/x86_pc/multiboot.S | # Bootstrapping from 32-bit with the Multiboot specification.
# See https://www.gnu.org/software/grub/manual/multiboot/multiboot.html
.section .text.boot
.code32
.global _start
_start:
mov edi, eax # arg1: magic: 0x2BADB002
mov esi, ebx # arg2: multiboot info
jmp bsp_entry32
.bal... |
xingmin1/OSKernel2024-46 | 1,965 | arceos/modules/axhal/src/platform/x86_pc/ap_start.S | # Boot application processors into the protected mode.
# Each non-boot CPU ("AP") is started up in response to a STARTUP
# IPI from the boot CPU. Section B.4.2 of the Multi-Processor
# Specification says that the AP will start in real mode with CS:IP
# set to XY00:0000, where XY is an 8-bit value sent with the
# STAR... |
xingmin1/OSKernel2024-46 | 1,839 | arceos/modules/axhal/src/arch/riscv/trap.S | .macro SAVE_REGS, from_user
addi sp, sp, -{trapframe_size}
PUSH_GENERAL_REGS
csrr t0, sepc
csrr t1, sstatus
csrrw t2, sscratch, zero // save sscratch (sp) and zero it
STR t0, sp, 31 // tf.sepc
STR t1, sp, 32 // tf.sstatus
STR... |
xingmin1/OSKernel2024-46 | 1,339 | arceos/modules/axhal/src/arch/x86_64/syscall.S | .section .text
.code64
syscall_entry:
swapgs // switch to kernel gs
mov gs:[offset __PERCPU_USER_RSP_OFFSET], rsp // save user rsp
mov rsp, gs:[offset __PERCPU_TSS + {tss_rsp0_offset}] // switch to kernel stack
sub rsp, 8 ... |
xingmin1/OSKernel2024-46 | 1,505 | arceos/modules/axhal/src/arch/x86_64/trap.S | .equ NUM_INT, 256
.altmacro
.macro DEF_HANDLER, i
.Ltrap_handler_\i:
.if \i == 8 || (\i >= 10 && \i <= 14) || \i == 17
# error code pushed by CPU
push \i # interrupt vector
jmp .Ltrap_common
.else
push 0 # fill in error code in TrapFrame
push \i # interrupt ... |
xingmin1/OSKernel2024-46 | 2,616 | arceos/modules/axhal/src/arch/aarch64/trap.S | .macro SAVE_REGS
sub sp, sp, 34 * 8
stp x0, x1, [sp]
stp x2, x3, [sp, 2 * 8]
stp x4, x5, [sp, 4 * 8]
stp x6, x7, [sp, 6 * 8]
stp x8, x9, [sp, 8 * 8]
stp x10, x11, [sp, 10 * 8]
stp x12, x13, [sp, 12 * 8]
stp x14, x15, [sp, 14 * 8]
stp x16, x... |
xingmin1/OSKernel2024-46 | 2,544 | arceos/tools/raspi4/chainloader/src/_arch/aarch64/cpu/boot.s | // SPDX-License-Identifier: MIT OR Apache-2.0
//
// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
//--------------------------------------------------------------------------------------------------
// Definitions
//-----------------------------------------------------------------------------------... |
xrlexpert/hitsz-computer-architecture-2024 | 1,044 | lab2/src/lab2/gemm_kernel_opt_loop.S | .text;
.p2align 2;
.global gemm_kernel_opt_loop;
.type gemm_kernel_opt_loop, %function;
#define MAT_C %rdi
#define MAT_A %rsi
#define MAT_B %r14
#define DIM_M %rcx
#define DIM_N %r8
#define DIM_K %r9
#define ... |
xrlexpert/hitsz-computer-architecture-2024 | 2,148 | lab2/src/lab2/gemm_kernel_baseline.S | .text;
.p2align 2;
.global gemm_kernel_baseline;
.type gemm_kernel_baseline, %function;
#define MAT_C %rdi
#define MAT_A %rsi
#define MAT_B %r14
#define DIM_M %rcx
#define DIM_N %r8
#define DIM_K %r9
#define ... |
xrlexpert/hitsz-computer-architecture-2024 | 2,298 | lab2/src/lab2/gemm_kernel_opt_prefetch.S | .text;
.p2align 2;
.global gemm_kernel_opt_prefetch;
.type gemm_kernel_opt_prefetch, %function;
#define MAT_C %rdi
#define MAT_A %rsi
#define MAT_B %r14
#define DIM_M %rcx
#define DIM_N %r8
#define DIM_K %r9
#de... |
xrlexpert/hitsz-computer-architecture-2024 | 2,839 | lab1/src/lab1/gemm_kernel.S | .text;
.p2align 2;
.global gemm_kernel;
.type gemm_kernel, %function;
// 以下是宏定义，方便按逻辑梳理
#define MAT_C %rdi
#define MAT_A %rsi
#define MAT_B %r14
#define DIM_M %rcx
#define DIM_N %r8
#define DIM_K %r9
#define ... |
xrlexpert/hitsz-computer-architecture-2024 | 1,573 | lab1/src/lab1/print_integer.S | /**
* 向标准输出打印1个64位整数
* */
.section .bss
// .lcomm num, 8 // 存储64位整数
.lcomm buffer, 21 // 20个数字 + 1个空字符 作为输出的缓冲区
.section .data
newline: .byte 0xA // 换行符
.section .text
.globl _start
_start:
// 初始化要打印的数字
mov $1234567890123456789, %rax
// mov %rax, num(%rip)
// 将整数转换为字符串... |
xrlexpert/hitsz-computer-architecture-2024 | 6,154 | lab3/src/lab3/gemm_kernel_opt_avx.S | .text;
.p2align 2;
.global gemm_kernel_opt_avx;
.type gemm_kernel_opt_avx, %function;
#define AVX_REG_BYTE_WIDTH 32
#define MAT_C %rdi
#define MAT_A %rsi
#define MAT_B %r13
#define DIM_M %rcx
#define DIM_N %r8
#define ... |
xrlexpert/hitsz-computer-architecture-2024 | 2,753 | lab3/src/lab3/gemm_kernel_opt_loop_unrolling.S | .text;
.p2align 2;
.global gemm_kernel_opt_loop_unrolling;
.type gemm_kernel_opt_loop_unrolling, %function;
#define MAT_C %rdi
#define MAT_A %rsi
#define MAT_B %r14
#define DIM_M %rcx
#define DIM_N %r8
#define DIM_K ... |
xrlexpert/hitsz-computer-architecture-2024 | 2,148 | lab3/src/lab3/gemm_kernel_baseline.S | .text;
.p2align 2;
.global gemm_kernel_baseline;
.type gemm_kernel_baseline, %function;
#define MAT_C %rdi
#define MAT_A %rsi
#define MAT_B %r14
#define DIM_M %rcx
#define DIM_N %r8
#define DIM_K %r9
#define ... |
xrvdg/modmulzoo | 2,441 | crates/experiments-lowlevel/asm/smul notes.s | ; smult notes
.global _main
.align 2
// Data section
.data
hello_str:
.ascii "Hello, World!\n"
hello_len = . - hello_str
#define henk mov x29, sp
.text
_main:
// Setup stack frame
stp x29, x30, [sp, #-16]!
; mov x29, sp
henk
// write(1, hello_str, hello_len)
mov x0, #1 ... |
xrvdg/modmulzoo | 5,870 | crates/modmul-asm/asm/single_step.s | //in("x0") a[0], in("x1") a[1], in("x2") a[2], in("x3") a[3],
//in("x4") b[0], in("x5") b[1], in("x6") b[2], in("x7") b[3],
//lateout("x0") out[0], lateout("x1") out[1], lateout("x2") out[2], lateout("x3") out[3],
//lateout("x4") _, lateout("x5") _, lateout("x6") _, lateout("x7") _, lateout("x8") _, lateout("x9") _, la... |
xrvdg/modmulzoo | 5,836 | crates/modmul-asm/asm/single_step_split.s | //in("x0") a[0], in("x1") a[1], in("x2") a[2], in("x3") a[3],
//in("x4") b[0], in("x5") b[1], in("x6") b[2], in("x7") b[3],
//lateout("x0") out[0], lateout("x1") out[1], lateout("x2") out[2], lateout("x3") out[3],
//lateout("x4") _, lateout("x5") _, lateout("x6") _, lateout("x7") _, lateout("x8") _, lateout("x9") _, la... |
xrvdg/modmulzoo | 5,946 | crates/modmul-asm/asm/single_step_load.s | //in("x0") a,
//in("x1") b,
//lateout("x0") a,
//lateout("x1") _, lateout("x2") _, lateout("x3") _, lateout("x4") _, lateout("x5") _, lateout("x6") _, lateout("x7") _, lateout("x8") _, lateout("x9") _, lateout("x10") _, lateout("x11") _, lateout("x12") _, lateout("x13") _, lateout("x14") _, lateout("x15") _,
//lateout(... |
xrvdg/modmulzoo | 12,824 | crates/modmul-asm/asm/single_step_simd.s | //in("v0") av[0], in("v1") av[1], in("v2") av[2], in("v3") av[3],
//in("v4") bv[0], in("v5") bv[1], in("v6") bv[2], in("v7") bv[3],
//lateout("v0") outv[0], lateout("v1") outv[1], lateout("v2") outv[2], lateout("v3") outv[3],
//lateout("x0") _, lateout("x1") _, lateout("x2") _, lateout("x3") _, lateout("v4") _, lateout... |
xrvdg/modmulzoo | 1,525 | crates/modmul-asm/asm/reduce_ct_simd.s | //in("v0") red[0], in("v1") red[1], in("v2") red[2], in("v3") red[3], in("v4") red[4], in("v5") red[5],
//lateout("v0") out[0], lateout("v1") out[1], lateout("v2") out[2], lateout("v3") out[3], lateout("v4") out[4],
//lateout("x0") _, lateout("v5") _, lateout("v6") _, lateout("v7") _, lateout("v8") _, lateout("v9") _, ... |
xrvdg/modmulzoo | 2,070 | crates/modmul-asm/asm/school_method.s | //in("x0") a[0], in("x1") a[1], in("x2") a[2], in("x3") a[3],
//in("x4") b[0], in("x5") b[1], in("x6") b[2], in("x7") b[3],
//lateout("x8") out[0], lateout("x9") out[1], lateout("x10") out[2], lateout("x11") out[3], lateout("x4") out[4], lateout("x5") out[5], lateout("x6") out[6], lateout("x7") out[7],
//lateout("x0") ... |
xrvdg/modmulzoo | 18,678 | crates/modmul-asm/asm/single_step_interleaved.s | //in("x0") a[0], in("x1") a[1], in("x2") a[2], in("x3") a[3],
//in("x4") b[0], in("x5") b[1], in("x6") b[2], in("x7") b[3],
//in("v0") av[0], in("v1") av[1], in("v2") av[2], in("v3") av[3],
//in("v4") bv[0], in("v5") bv[1], in("v6") bv[2], in("v7") bv[3],
//lateout("x0") out[0], lateout("x1") out[1], lateout("x2") out[... |
xrvdg/modmulzoo | 4,538 | crates/modmul-asm/asm/vmultadd_noinit_simd.s | //in("v0") t[0], in("v1") t[1], in("v2") t[2], in("v3") t[3], in("v4") t[4], in("v5") t[5], in("v6") t[6], in("v7") t[7], in("v8") t[8], in("v9") t[9],
//in("v10") a[0], in("v11") a[1], in("v12") a[2], in("v13") a[3], in("v14") a[4],
//in("v15") b[0], in("v16") b[1], in("v17") b[2], in("v18") b[3], in("v19") b[4],
//la... |
xrvdg/modmulzoo | 30,745 | crates/modmul-asm/asm/single_step_interleaved_triple_scalar.s | //in("x0") a,
//in("x1") b,
//in("x2") a1,
//in("x3") b1,
//in("x4") a2,
//in("x5") b2,
//in("v0") av[0], in("v1") av[1], in("v2") av[2], in("v3") av[3],
//in("v4") bv[0], in("v5") bv[1], in("v6") bv[2], in("v7") bv[3],
//lateout("x0") a,
//lateout("x2") a1,
//lateout("x4") a2,
//lateout("v0") outv[0], lateout("v1") ou... |
xrvdg/modmulzoo | 24,774 | crates/modmul-asm/asm/single_step_interleaved_seq_scalar.s | //in("x0") a[0], in("x1") a[1], in("x2") a[2], in("x3") a[3],
//in("x4") b[0], in("x5") b[1], in("x6") b[2], in("x7") b[3],
//in("x8") a1[0], in("x9") a1[1], in("x10") a1[2], in("x11") a1[3],
//in("x12") b1[0], in("x13") b1[1], in("x14") b1[2], in("x15") b1[3],
//in("v0") av[0], in("v1") av[1], in("v2") av[2], in("v3")... |
XsystemH/aCore | 3,982 | os/src/link_app.S |
.align 3
.section .data
.global _num_app
_num_app:
.quad 17
.quad app_0_start
.quad app_1_start
.quad app_2_start
.quad app_3_start
.quad app_4_start
.quad app_5_start
.quad app_6_start
.quad app_7_start
.quad app_8_start
.quad app_9_start
.quad app_10_start
... |
XsystemH/aCore | 1,639 | os/src/trap/trap.S | .altmacro
.macro SAVE_GP n
sd x\n, \n*8(sp)
.endm
.macro LOAD_GP n
ld x\n, \n*8(sp)
.endm
.section .text.trampoline
.globl __alltraps
.globl __restore
.align 2
__alltraps:
csrrw sp, sscratch, sp
# now sp->*TrapContext in user space, sscratch->user stack
# save other general purpose r... |
xuehaonan27/LuminOS | 1,993 | kernel/src/trap/trap.S | .attribute arch, "rv64gc" # Make LLVM happy
.set REGISTER_SIZE, 8 # On 64-bit machine, should be 4 one 32-bit machine
.set F_REGISTER_SIZE, 8 # On D Extension RISCV machine
.altmacro
.macro SAVE_GP n
sd x\n, \n*REGISTER_SIZE(sp)
.endm
.macro LOAD_GP n
ld x\n, \n*REGISTER_SIZE(sp)
.endm
.section .text.tra... |
xuehaonan27/LuminOS | 2,380 | kernel/src/trap/trap_d_ext.S | .attribute arch, "rv64gc" # Make LLVM happy
.set REGISTER_SIZE, 8 # On 64-bit machine, should be 4 one 32-bit machine
.set F_REGISTER_SIZE, 8 # On D Extension RISCV machine
.altmacro
.macro SAVE_GP n
sd x\n, \n*REGISTER_SIZE(sp)
.endm
.macro LOAD_GP n
ld x\n, \n*REGISTER_SIZE(sp)
.endm
.macro SAVE_FP n
f... |
xuehaonan27/LuminOS | 1,581 | kernel/src/task/switch_d_ext.S | .attribute arch, "rv64gc" # Make LLVM happy
.set REGISTER_SIZE, 8 # On 64-bit machine
.set F_REGISTER_SIZE, 8 # On D Extension RISCV machine
.altmacro
.macro SAVE_SN n
sd s\n, (\n+2)*REGISTER_SIZE(a0)
.endm
.macro LOAD_SN n
ld s\n, (\n+2)*REGISTER_SIZE(a1)
.endm
.macro SAVE_FSN n
fsd fs\n, (14*REGISTER_S... |
xuehaonan27/LuminOS | 1,125 | kernel/src/task/switch.S | .attribute arch, "rv64gc" # Make LLVM happy
.set REGISTER_SIZE, 8 # On 64-bit machine
.altmacro
.macro SAVE_SN n
sd s\n, (\n+2)*REGISTER_SIZE(a0)
.endm
.macro LOAD_SN n
ld s\n, (\n+2)*REGISTER_SIZE(a1)
.endm
# Only ra, sp, sx registers need to be saved by assembly code.
# Other registers' saving and restorin... |
xukec/xk-rCore | 2,538 | os/src/trap/trap.S | .altmacro #加上才能正常使用.rept命令
#保存循环体
.macro SACE_GP n
sd x\n, \n*8(sp) #\n替换n参数
.endm
.macro LOAD_GP n
ld x\n, \n*8(sp)
.endm
.section .text
.globl __alltraps
.globl __restore
.align 2 #.align integer 2的integer次方个字节对齐 这里是将 __alltraps 的地址4字节对齐。（RISC-V 特权级规范的要求）
__alltraps:
#csrrw rd, csr... |
xukec/xk-rCore | 859 | os/src/task/switch.S | .altmacro # 加上才能正常使用.rept命令
# 保存循环体
.macro SAVE_SN n
sd s\n, (\n+2)*8(a0) #\n替换n参数
.endm
.macro LOAD_SN n
ld s\n, (\n+2)*8(a1)
.endm
.section .text
.globl __switch
__switch:
# 阶段1
# __switch(
# current_task_cx_ptr: *mut TaskContext,
# next_task_cx_ptr: *const TaskContext
... |
xunxue01/rcore-ch | 1,488 | os/src/trap/trap.S | .altmacro
.macro SAVE_GP n
sd x\n, \n*8(sp)
.endm
.macro LOAD_GP n
ld x\n, \n*8(sp)
.endm
.section .text
.globl __alltraps
.globl __restore
.align 2
__alltraps:
csrrw sp, sscratch, sp
# now sp->kernel stack, sscratch->user stack
# allocate a TrapContext on kernel stack
addi sp, s... |
XxChang/arceos | 2,001 | modules/axhal/linker.lds.S | OUTPUT_ARCH(%ARCH%)
BASE_ADDRESS = %KERNEL_BASE%;
ENTRY(_start)
SECTIONS
{
. = BASE_ADDRESS;
_skernel = .;
.text : ALIGN(4K) {
_stext = .;
*(.text.boot)
*(.text .text.*)
. = ALIGN(4K);
_etext = .;
}
_srodata = .;
.rodata : ALIGN(4K) {
*(.rodata... |
XxChang/arceos | 4,325 | modules/axhal/src/platform/x86_pc/multiboot.S | # Bootstrapping from 32-bit with the Multiboot specification.
# See https://www.gnu.org/software/grub/manual/multiboot/multiboot.html
.section .text.boot
.code32
.global _start
_start:
mov edi, eax # arg1: magic: 0x2BADB002
mov esi, ebx # arg2: multiboot info
jmp bsp_entry32
.bal... |
XxChang/arceos | 1,965 | modules/axhal/src/platform/x86_pc/ap_start.S | # Boot application processors into the protected mode.
# Each non-boot CPU ("AP") is started up in response to a STARTUP
# IPI from the boot CPU. Section B.4.2 of the Multi-Processor
# Specification says that the AP will start in real mode with CS:IP
# set to XY00:0000, where XY is an 8-bit value sent with the
# STAR... |
XxChang/arceos | 2,544 | tools/raspi4/chainloader/src/_arch/aarch64/cpu/boot.s | // SPDX-License-Identifier: MIT OR Apache-2.0
//
// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
//--------------------------------------------------------------------------------------------------
// Definitions
//-----------------------------------------------------------------------------------... |
Ya0rk/YooOs | 3,421 | os/src/trap/trap.s | .altmacro
.macro SAVE_GP n
sd x\n, \n*8(sp)
.endm
.macro SAVE_GP_RANGE start, end
.set n, start
.rept end - start + 1
SAVE_GP %n
.set n, n + 1
.endr
.endm
.macro LOAD_GP n
ld x\n, \n*8(sp)
.endm
.macro LOAD_GP_RANGE start, end
.set n, start
.rept end - start + 1
L... |
yampiii/asde | 7,962 | tests/syntax-tests/highlighted/ARM Assembly/test.S | [38;2;248;248;242m.[0m[38;2;248;248;242mdata[0m
[38;2;249;38;114m.balign[0m[38;2;190;132;255m 4[0m
[38;2;248;248;242mred[0m[38;2;248;248;242m: [0m[38;2;249;38;114m.word[0m[38;2;190;132;255m 0[0m
[38;2;248;248;242mgreen[0m[38;2;248;248;242m: [0m[38;2;249;38;114m.word[0m[38;2;190;132;255m 0[0m
[... |
Ya0rk/YooOs | 3,421 | os/src/trap/trap.s | .altmacro
.macro SAVE_GP n
sd x\n, \n*8(sp)
.endm
.macro SAVE_GP_RANGE start, end
.set n, start
.rept end - start + 1
SAVE_GP %n
.set n, n + 1
.endr
.endm
.macro LOAD_GP n
ld x\n, \n*8(sp)
.endm
.macro LOAD_GP_RANGE start, end
.set n, start
.rept end - start + 1
L... |
yampiii/asde | 7,962 | tests/syntax-tests/highlighted/ARM Assembly/test.S | [38;2;248;248;242m.[0m[38;2;248;248;242mdata[0m
[38;2;249;38;114m.balign[0m[38;2;190;132;255m 4[0m
[38;2;248;248;242mred[0m[38;2;248;248;242m: [0m[38;2;249;38;114m.word[0m[38;2;190;132;255m 0[0m
[38;2;248;248;242mgreen[0m[38;2;248;248;242m: [0m[38;2;249;38;114m.word[0m[38;2;190;132;255m 0[0m
[... |
yashodipmore/RISC-V-CPU-Simulator-Assembler | 1,256 | examples/fibonacci.s | # Fibonacci Sequence Calculator in RISC-V Assembly
# Calculates the first 10 numbers in the Fibonacci sequence
.text
main:
# Initialize registers
addi x1, x0, 0 # x1 = 0 (first Fibonacci number)
addi x2, x0, 1 # x2 = 1 (second Fibonacci number)
addi x3, x0, 10 # x3 = 10 (counter)
addi... |
yashodipmore/RISC-V-CPU-Simulator-Assembler | 1,863 | examples/sorting.s | # Bubble Sort Implementation in RISC-V Assembly
# Sorts an array of integers using bubble sort algorithm
.text
main:
# Initialize array parameters
addi x1, x0, 8 # Array length
addi x2, x0, 0x1000 # Array base address
# Initialize test data in memory
addi x3, x0, 64 # First element
... |
yashodipmore/RISC-V-CPU-Simulator-Assembler | 1,143 | examples/fibonacci_simple.s | # Simple Fibonacci Sequence Calculator in RISC-V Assembly
# Calculates the first 5 numbers in the Fibonacci sequence
main:
# Initialize registers
addi x1, x0, 0 # x1 = 0 (first Fibonacci number)
addi x2, x0, 1 # x2 = 1 (second Fibonacci number)
addi x3, x0, 5 # x3 = 5 (counter)
add... |
yavuztackin/Zybo_Z20_Vitis_LEDBlink-HelloWorldUART-Examples | 5,201 | helloworldminizedproject/zynq_fsbl/fsbl_handoff.S | /******************************************************************************
*
* Copyright (c) 2012 - 2021 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/***************************************************************... |
yavuztackin/Zybo_Z20_Vitis_LEDBlink-HelloWorldUART-Examples | 8,023 | helloworldminizedproject/ps7_cortexa9_0/standalone_domain/bsp/ps7_cortexa9_0/libsrc/standalone_v8_0/src/translation_table.S | /******************************************************************************
* Copyright (c) 2009 - 2021 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
yavuztackin/Zybo_Z20_Vitis_LEDBlink-HelloWorldUART-Examples | 3,153 | helloworldminizedproject/ps7_cortexa9_0/standalone_domain/bsp/ps7_cortexa9_0/libsrc/standalone_v8_0/src/xil-crt0.S | /******************************************************************************
* Copyright (c) 2009 - 2020 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
yavuztackin/Zybo_Z20_Vitis_LEDBlink-HelloWorldUART-Examples | 4,892 | helloworldminizedproject/ps7_cortexa9_0/standalone_domain/bsp/ps7_cortexa9_0/libsrc/standalone_v8_0/src/asm_vectors.S | /******************************************************************************
* Copyright (c) 2009 - 2021 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
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