repo_id
stringlengths 5
115
| size
int64 590
5.01M
| file_path
stringlengths 4
212
| content
stringlengths 590
5.01M
|
|---|---|---|---|
suryaveeryadav/Python-3.4.0
| 14,529
|
Modules/_ctypes/libffi/src/mips/n32.S
|
/* -----------------------------------------------------------------------
n32.S - Copyright (c) 1996, 1998, 2005, 2007, 2009, 2010 Red Hat, Inc.
MIPS Foreign Function Interface
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
DEALINGS IN THE SOFTWARE.
----------------------------------------------------------------------- */
#define LIBFFI_ASM
#include <fficonfig.h>
#include <ffi.h>
/* Only build this code if we are compiling for n32 */
#if defined(FFI_MIPS_N32)
#define callback a0
#define bytes a2
#define flags a3
#define raddr a4
#define fn a5
#define SIZEOF_FRAME ( 8 * FFI_SIZEOF_ARG )
#ifdef __GNUC__
.abicalls
#endif
.set mips4
.text
.align 2
.globl ffi_call_N32
.ent ffi_call_N32
ffi_call_N32:
.LFB3:
.frame $fp, SIZEOF_FRAME, ra
.mask 0xc0000000,-FFI_SIZEOF_ARG
.fmask 0x00000000,0
# Prologue
SUBU $sp, SIZEOF_FRAME # Frame size
.LCFI0:
REG_S $fp, SIZEOF_FRAME - 2*FFI_SIZEOF_ARG($sp) # Save frame pointer
REG_S ra, SIZEOF_FRAME - 1*FFI_SIZEOF_ARG($sp) # Save return address
.LCFI1:
move $fp, $sp
.LCFI3:
move t9, callback # callback function pointer
REG_S bytes, 2*FFI_SIZEOF_ARG($fp) # bytes
REG_S flags, 3*FFI_SIZEOF_ARG($fp) # flags
REG_S raddr, 4*FFI_SIZEOF_ARG($fp) # raddr
REG_S fn, 5*FFI_SIZEOF_ARG($fp) # fn
# Allocate at least 4 words in the argstack
move v0, bytes
bge bytes, 4 * FFI_SIZEOF_ARG, bigger
LI v0, 4 * FFI_SIZEOF_ARG
b sixteen
bigger:
ADDU t4, v0, 2 * FFI_SIZEOF_ARG -1 # make sure it is aligned
and v0, t4, -2 * FFI_SIZEOF_ARG # to a proper boundry.
sixteen:
SUBU $sp, $sp, v0 # move the stack pointer to reflect the
# arg space
move a0, $sp # 4 * FFI_SIZEOF_ARG
ADDU a3, $fp, 3 * FFI_SIZEOF_ARG
# Call ffi_prep_args
jal t9
# Copy the stack pointer to t9
move t9, $sp
# Fix the stack if there are more than 8 64bit slots worth
# of arguments.
# Load the number of bytes
REG_L t6, 2*FFI_SIZEOF_ARG($fp)
# Is it bigger than 8 * FFI_SIZEOF_ARG?
daddiu t8, t6, -(8 * FFI_SIZEOF_ARG)
bltz t8, loadregs
ADDU t9, t9, t8
loadregs:
REG_L t6, 3*FFI_SIZEOF_ARG($fp) # load the flags word into t6.
and t4, t6, ((1<<FFI_FLAG_BITS)-1)
bnez t4, arg1_floatp
REG_L a0, 0*FFI_SIZEOF_ARG(t9)
b arg1_next
arg1_floatp:
bne t4, FFI_TYPE_FLOAT, arg1_doublep
l.s $f12, 0*FFI_SIZEOF_ARG(t9)
b arg1_next
arg1_doublep:
l.d $f12, 0*FFI_SIZEOF_ARG(t9)
arg1_next:
SRL t4, t6, 1*FFI_FLAG_BITS
and t4, ((1<<FFI_FLAG_BITS)-1)
bnez t4, arg2_floatp
REG_L a1, 1*FFI_SIZEOF_ARG(t9)
b arg2_next
arg2_floatp:
bne t4, FFI_TYPE_FLOAT, arg2_doublep
l.s $f13, 1*FFI_SIZEOF_ARG(t9)
b arg2_next
arg2_doublep:
l.d $f13, 1*FFI_SIZEOF_ARG(t9)
arg2_next:
SRL t4, t6, 2*FFI_FLAG_BITS
and t4, ((1<<FFI_FLAG_BITS)-1)
bnez t4, arg3_floatp
REG_L a2, 2*FFI_SIZEOF_ARG(t9)
b arg3_next
arg3_floatp:
bne t4, FFI_TYPE_FLOAT, arg3_doublep
l.s $f14, 2*FFI_SIZEOF_ARG(t9)
b arg3_next
arg3_doublep:
l.d $f14, 2*FFI_SIZEOF_ARG(t9)
arg3_next:
SRL t4, t6, 3*FFI_FLAG_BITS
and t4, ((1<<FFI_FLAG_BITS)-1)
bnez t4, arg4_floatp
REG_L a3, 3*FFI_SIZEOF_ARG(t9)
b arg4_next
arg4_floatp:
bne t4, FFI_TYPE_FLOAT, arg4_doublep
l.s $f15, 3*FFI_SIZEOF_ARG(t9)
b arg4_next
arg4_doublep:
l.d $f15, 3*FFI_SIZEOF_ARG(t9)
arg4_next:
SRL t4, t6, 4*FFI_FLAG_BITS
and t4, ((1<<FFI_FLAG_BITS)-1)
bnez t4, arg5_floatp
REG_L a4, 4*FFI_SIZEOF_ARG(t9)
b arg5_next
arg5_floatp:
bne t4, FFI_TYPE_FLOAT, arg5_doublep
l.s $f16, 4*FFI_SIZEOF_ARG(t9)
b arg5_next
arg5_doublep:
l.d $f16, 4*FFI_SIZEOF_ARG(t9)
arg5_next:
SRL t4, t6, 5*FFI_FLAG_BITS
and t4, ((1<<FFI_FLAG_BITS)-1)
bnez t4, arg6_floatp
REG_L a5, 5*FFI_SIZEOF_ARG(t9)
b arg6_next
arg6_floatp:
bne t4, FFI_TYPE_FLOAT, arg6_doublep
l.s $f17, 5*FFI_SIZEOF_ARG(t9)
b arg6_next
arg6_doublep:
l.d $f17, 5*FFI_SIZEOF_ARG(t9)
arg6_next:
SRL t4, t6, 6*FFI_FLAG_BITS
and t4, ((1<<FFI_FLAG_BITS)-1)
bnez t4, arg7_floatp
REG_L a6, 6*FFI_SIZEOF_ARG(t9)
b arg7_next
arg7_floatp:
bne t4, FFI_TYPE_FLOAT, arg7_doublep
l.s $f18, 6*FFI_SIZEOF_ARG(t9)
b arg7_next
arg7_doublep:
l.d $f18, 6*FFI_SIZEOF_ARG(t9)
arg7_next:
SRL t4, t6, 7*FFI_FLAG_BITS
and t4, ((1<<FFI_FLAG_BITS)-1)
bnez t4, arg8_floatp
REG_L a7, 7*FFI_SIZEOF_ARG(t9)
b arg8_next
arg8_floatp:
bne t4, FFI_TYPE_FLOAT, arg8_doublep
l.s $f19, 7*FFI_SIZEOF_ARG(t9)
b arg8_next
arg8_doublep:
l.d $f19, 7*FFI_SIZEOF_ARG(t9)
arg8_next:
callit:
# Load the function pointer
REG_L t9, 5*FFI_SIZEOF_ARG($fp)
# If the return value pointer is NULL, assume no return value.
REG_L t5, 4*FFI_SIZEOF_ARG($fp)
beqz t5, noretval
# Shift the return type flag over
SRL t6, 8*FFI_FLAG_BITS
beq t6, FFI_TYPE_SINT32, retint
bne t6, FFI_TYPE_INT, retfloat
retint:
jal t9
REG_L t4, 4*FFI_SIZEOF_ARG($fp)
REG_S v0, 0(t4)
b epilogue
retfloat:
bne t6, FFI_TYPE_FLOAT, retdouble
jal t9
REG_L t4, 4*FFI_SIZEOF_ARG($fp)
s.s $f0, 0(t4)
b epilogue
retdouble:
bne t6, FFI_TYPE_DOUBLE, retstruct_d
jal t9
REG_L t4, 4*FFI_SIZEOF_ARG($fp)
s.d $f0, 0(t4)
b epilogue
retstruct_d:
bne t6, FFI_TYPE_STRUCT_D, retstruct_f
jal t9
REG_L t4, 4*FFI_SIZEOF_ARG($fp)
s.d $f0, 0(t4)
b epilogue
retstruct_f:
bne t6, FFI_TYPE_STRUCT_F, retstruct_d_d
jal t9
REG_L t4, 4*FFI_SIZEOF_ARG($fp)
s.s $f0, 0(t4)
b epilogue
retstruct_d_d:
bne t6, FFI_TYPE_STRUCT_DD, retstruct_f_f
jal t9
REG_L t4, 4*FFI_SIZEOF_ARG($fp)
s.d $f0, 0(t4)
s.d $f2, 8(t4)
b epilogue
retstruct_f_f:
bne t6, FFI_TYPE_STRUCT_FF, retstruct_d_f
jal t9
REG_L t4, 4*FFI_SIZEOF_ARG($fp)
s.s $f0, 0(t4)
s.s $f2, 4(t4)
b epilogue
retstruct_d_f:
bne t6, FFI_TYPE_STRUCT_DF, retstruct_f_d
jal t9
REG_L t4, 4*FFI_SIZEOF_ARG($fp)
s.d $f0, 0(t4)
s.s $f2, 8(t4)
b epilogue
retstruct_f_d:
bne t6, FFI_TYPE_STRUCT_FD, retstruct_d_soft
jal t9
REG_L t4, 4*FFI_SIZEOF_ARG($fp)
s.s $f0, 0(t4)
s.d $f2, 8(t4)
b epilogue
retstruct_d_soft:
bne t6, FFI_TYPE_STRUCT_D_SOFT, retstruct_f_soft
jal t9
REG_L t4, 4*FFI_SIZEOF_ARG($fp)
sd v0, 0(t4)
b epilogue
retstruct_f_soft:
bne t6, FFI_TYPE_STRUCT_F_SOFT, retstruct_d_d_soft
jal t9
REG_L t4, 4*FFI_SIZEOF_ARG($fp)
sw v0, 0(t4)
b epilogue
retstruct_d_d_soft:
bne t6, FFI_TYPE_STRUCT_DD_SOFT, retstruct_f_f_soft
jal t9
REG_L t4, 4*FFI_SIZEOF_ARG($fp)
sd v0, 0(t4)
sd v1, 8(t4)
b epilogue
retstruct_f_f_soft:
bne t6, FFI_TYPE_STRUCT_FF_SOFT, retstruct_d_f_soft
jal t9
REG_L t4, 4*FFI_SIZEOF_ARG($fp)
sw v0, 0(t4)
sw v1, 4(t4)
b epilogue
retstruct_d_f_soft:
bne t6, FFI_TYPE_STRUCT_DF_SOFT, retstruct_f_d_soft
jal t9
REG_L t4, 4*FFI_SIZEOF_ARG($fp)
sd v0, 0(t4)
sw v1, 8(t4)
b epilogue
retstruct_f_d_soft:
bne t6, FFI_TYPE_STRUCT_FD_SOFT, retstruct_small
jal t9
REG_L t4, 4*FFI_SIZEOF_ARG($fp)
sw v0, 0(t4)
sd v1, 8(t4)
b epilogue
retstruct_small:
bne t6, FFI_TYPE_STRUCT_SMALL, retstruct_small2
jal t9
REG_L t4, 4*FFI_SIZEOF_ARG($fp)
REG_S v0, 0(t4)
b epilogue
retstruct_small2:
bne t6, FFI_TYPE_STRUCT_SMALL2, retstruct
jal t9
REG_L t4, 4*FFI_SIZEOF_ARG($fp)
REG_S v0, 0(t4)
REG_S v1, 8(t4)
b epilogue
retstruct:
noretval:
jal t9
# Epilogue
epilogue:
move $sp, $fp
REG_L $fp, SIZEOF_FRAME - 2*FFI_SIZEOF_ARG($sp) # Restore frame pointer
REG_L ra, SIZEOF_FRAME - 1*FFI_SIZEOF_ARG($sp) # Restore return address
ADDU $sp, SIZEOF_FRAME # Fix stack pointer
j ra
.LFE3:
.end ffi_call_N32
/* ffi_closure_N32. Expects address of the passed-in ffi_closure in t0
($12). Stores any arguments passed in registers onto the stack,
then calls ffi_closure_mips_inner_N32, which then decodes
them.
Stack layout:
20 - Start of parameters, original sp
19 - Called function a7 save
18 - Called function a6 save
17 - Called function a5 save
16 - Called function a4 save
15 - Called function a3 save
14 - Called function a2 save
13 - Called function a1 save
12 - Called function a0 save
11 - Called function f19
10 - Called function f18
9 - Called function f17
8 - Called function f16
7 - Called function f15
6 - Called function f14
5 - Called function f13
4 - Called function f12
3 - return value high (v1 or $f2)
2 - return value low (v0 or $f0)
1 - ra save
0 - gp save our sp points here
*/
#define SIZEOF_FRAME2 (20 * FFI_SIZEOF_ARG)
#define A7_OFF2 (19 * FFI_SIZEOF_ARG)
#define A6_OFF2 (18 * FFI_SIZEOF_ARG)
#define A5_OFF2 (17 * FFI_SIZEOF_ARG)
#define A4_OFF2 (16 * FFI_SIZEOF_ARG)
#define A3_OFF2 (15 * FFI_SIZEOF_ARG)
#define A2_OFF2 (14 * FFI_SIZEOF_ARG)
#define A1_OFF2 (13 * FFI_SIZEOF_ARG)
#define A0_OFF2 (12 * FFI_SIZEOF_ARG)
#define F19_OFF2 (11 * FFI_SIZEOF_ARG)
#define F18_OFF2 (10 * FFI_SIZEOF_ARG)
#define F17_OFF2 (9 * FFI_SIZEOF_ARG)
#define F16_OFF2 (8 * FFI_SIZEOF_ARG)
#define F15_OFF2 (7 * FFI_SIZEOF_ARG)
#define F14_OFF2 (6 * FFI_SIZEOF_ARG)
#define F13_OFF2 (5 * FFI_SIZEOF_ARG)
#define F12_OFF2 (4 * FFI_SIZEOF_ARG)
#define V1_OFF2 (3 * FFI_SIZEOF_ARG)
#define V0_OFF2 (2 * FFI_SIZEOF_ARG)
#define RA_OFF2 (1 * FFI_SIZEOF_ARG)
#define GP_OFF2 (0 * FFI_SIZEOF_ARG)
.align 2
.globl ffi_closure_N32
.ent ffi_closure_N32
ffi_closure_N32:
.LFB2:
.frame $sp, SIZEOF_FRAME2, ra
.mask 0x90000000,-(SIZEOF_FRAME2 - RA_OFF2)
.fmask 0x00000000,0
SUBU $sp, SIZEOF_FRAME2
.LCFI5:
.cpsetup t9, GP_OFF2, ffi_closure_N32
REG_S ra, RA_OFF2($sp) # Save return address
.LCFI6:
# Store all possible argument registers. If there are more than
# fit in registers, then they were stored on the stack.
REG_S a0, A0_OFF2($sp)
REG_S a1, A1_OFF2($sp)
REG_S a2, A2_OFF2($sp)
REG_S a3, A3_OFF2($sp)
REG_S a4, A4_OFF2($sp)
REG_S a5, A5_OFF2($sp)
REG_S a6, A6_OFF2($sp)
REG_S a7, A7_OFF2($sp)
# Store all possible float/double registers.
s.d $f12, F12_OFF2($sp)
s.d $f13, F13_OFF2($sp)
s.d $f14, F14_OFF2($sp)
s.d $f15, F15_OFF2($sp)
s.d $f16, F16_OFF2($sp)
s.d $f17, F17_OFF2($sp)
s.d $f18, F18_OFF2($sp)
s.d $f19, F19_OFF2($sp)
# Call ffi_closure_mips_inner_N32 to do the real work.
LA t9, ffi_closure_mips_inner_N32
move a0, $12 # Pointer to the ffi_closure
ADDU a1, $sp, V0_OFF2
ADDU a2, $sp, A0_OFF2
ADDU a3, $sp, F12_OFF2
jalr t9
# Return flags are in v0
bne v0, FFI_TYPE_SINT32, cls_retint
lw v0, V0_OFF2($sp)
b cls_epilogue
cls_retint:
bne v0, FFI_TYPE_INT, cls_retfloat
REG_L v0, V0_OFF2($sp)
b cls_epilogue
cls_retfloat:
bne v0, FFI_TYPE_FLOAT, cls_retdouble
l.s $f0, V0_OFF2($sp)
b cls_epilogue
cls_retdouble:
bne v0, FFI_TYPE_DOUBLE, cls_retstruct_d
l.d $f0, V0_OFF2($sp)
b cls_epilogue
cls_retstruct_d:
bne v0, FFI_TYPE_STRUCT_D, cls_retstruct_f
l.d $f0, V0_OFF2($sp)
b cls_epilogue
cls_retstruct_f:
bne v0, FFI_TYPE_STRUCT_F, cls_retstruct_d_d
l.s $f0, V0_OFF2($sp)
b cls_epilogue
cls_retstruct_d_d:
bne v0, FFI_TYPE_STRUCT_DD, cls_retstruct_f_f
l.d $f0, V0_OFF2($sp)
l.d $f2, V1_OFF2($sp)
b cls_epilogue
cls_retstruct_f_f:
bne v0, FFI_TYPE_STRUCT_FF, cls_retstruct_d_f
l.s $f0, V0_OFF2($sp)
l.s $f2, V1_OFF2($sp)
b cls_epilogue
cls_retstruct_d_f:
bne v0, FFI_TYPE_STRUCT_DF, cls_retstruct_f_d
l.d $f0, V0_OFF2($sp)
l.s $f2, V1_OFF2($sp)
b cls_epilogue
cls_retstruct_f_d:
bne v0, FFI_TYPE_STRUCT_FD, cls_retstruct_small2
l.s $f0, V0_OFF2($sp)
l.d $f2, V1_OFF2($sp)
b cls_epilogue
cls_retstruct_small2:
REG_L v0, V0_OFF2($sp)
REG_L v1, V1_OFF2($sp)
# Epilogue
cls_epilogue:
REG_L ra, RA_OFF2($sp) # Restore return address
.cpreturn
ADDU $sp, SIZEOF_FRAME2
j ra
.LFE2:
.end ffi_closure_N32
#ifdef __GNUC__
.section .eh_frame,"aw",@progbits
.Lframe1:
.4byte .LECIE1-.LSCIE1 # length
.LSCIE1:
.4byte 0x0 # CIE
.byte 0x1 # Version 1
.ascii "\000" # Augmentation
.uleb128 0x1 # Code alignment 1
.sleb128 -4 # Data alignment -4
.byte 0x1f # Return Address $31
.byte 0xc # DW_CFA_def_cfa
.uleb128 0x1d # in $sp
.uleb128 0x0 # offset 0
.align EH_FRAME_ALIGN
.LECIE1:
.LSFDE1:
.4byte .LEFDE1-.LASFDE1 # length.
.LASFDE1:
.4byte .LASFDE1-.Lframe1 # CIE_pointer.
FDE_ADDR_BYTES .LFB3 # initial_location.
FDE_ADDR_BYTES .LFE3-.LFB3 # address_range.
.byte 0x4 # DW_CFA_advance_loc4
.4byte .LCFI0-.LFB3 # to .LCFI0
.byte 0xe # DW_CFA_def_cfa_offset
.uleb128 SIZEOF_FRAME # adjust stack.by SIZEOF_FRAME
.byte 0x4 # DW_CFA_advance_loc4
.4byte .LCFI1-.LCFI0 # to .LCFI1
.byte 0x9e # DW_CFA_offset of $fp
.uleb128 2*FFI_SIZEOF_ARG/4 #
.byte 0x9f # DW_CFA_offset of ra
.uleb128 1*FFI_SIZEOF_ARG/4 #
.byte 0x4 # DW_CFA_advance_loc4
.4byte .LCFI3-.LCFI1 # to .LCFI3
.byte 0xd # DW_CFA_def_cfa_register
.uleb128 0x1e # in $fp
.align EH_FRAME_ALIGN
.LEFDE1:
.LSFDE3:
.4byte .LEFDE3-.LASFDE3 # length
.LASFDE3:
.4byte .LASFDE3-.Lframe1 # CIE_pointer.
FDE_ADDR_BYTES .LFB2 # initial_location.
FDE_ADDR_BYTES .LFE2-.LFB2 # address_range.
.byte 0x4 # DW_CFA_advance_loc4
.4byte .LCFI5-.LFB2 # to .LCFI5
.byte 0xe # DW_CFA_def_cfa_offset
.uleb128 SIZEOF_FRAME2 # adjust stack.by SIZEOF_FRAME
.byte 0x4 # DW_CFA_advance_loc4
.4byte .LCFI6-.LCFI5 # to .LCFI6
.byte 0x9c # DW_CFA_offset of $gp ($28)
.uleb128 (SIZEOF_FRAME2 - GP_OFF2)/4
.byte 0x9f # DW_CFA_offset of ra ($31)
.uleb128 (SIZEOF_FRAME2 - RA_OFF2)/4
.align EH_FRAME_ALIGN
.LEFDE3:
#endif /* __GNUC__ */
#endif
|
suryaveeryadav/Python-3.4.0
| 10,794
|
Modules/_ctypes/libffi/src/arm/sysv.S
|
/* -----------------------------------------------------------------------
sysv.S - Copyright (c) 1998, 2008, 2011 Red Hat, Inc.
Copyright (c) 2011 Plausible Labs Cooperative, Inc.
ARM Foreign Function Interface
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
DEALINGS IN THE SOFTWARE.
----------------------------------------------------------------------- */
#define LIBFFI_ASM
#include <fficonfig.h>
#include <ffi.h>
#ifdef HAVE_MACHINE_ASM_H
#include <machine/asm.h>
#else
#ifdef __USER_LABEL_PREFIX__
#define CONCAT1(a, b) CONCAT2(a, b)
#define CONCAT2(a, b) a ## b
/* Use the right prefix for global labels. */
#define CNAME(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
#else
#define CNAME(x) x
#endif
#ifdef __APPLE__
#define ENTRY(x) .globl _##x; _##x:
#else
#define ENTRY(x) .globl CNAME(x); .type CNAME(x),%function; CNAME(x):
#endif /* __APPLE__ */
#endif
#ifdef __ELF__
#define LSYM(x) .x
#else
#define LSYM(x) x
#endif
/* Use the SOFTFP return value ABI on Mac OS X, as per the iOS ABI
Function Call Guide */
#ifdef __APPLE__
#define __SOFTFP__
#endif
/* We need a better way of testing for this, but for now, this is all
we can do. */
@ This selects the minimum architecture level required.
#define __ARM_ARCH__ 3
#if defined(__ARM_ARCH_4__) || defined(__ARM_ARCH_4T__)
# undef __ARM_ARCH__
# define __ARM_ARCH__ 4
#endif
#if defined(__ARM_ARCH_5__) || defined(__ARM_ARCH_5T__) \
|| defined(__ARM_ARCH_5E__) || defined(__ARM_ARCH_5TE__) \
|| defined(__ARM_ARCH_5TEJ__)
# undef __ARM_ARCH__
# define __ARM_ARCH__ 5
#endif
#if defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) \
|| defined(__ARM_ARCH_6K__) || defined(__ARM_ARCH_6Z__) \
|| defined(__ARM_ARCH_6ZK__) || defined(__ARM_ARCH_6T2__) \
|| defined(__ARM_ARCH_6M__)
# undef __ARM_ARCH__
# define __ARM_ARCH__ 6
#endif
#if defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__) \
|| defined(__ARM_ARCH_7R__) || defined(__ARM_ARCH_7M__) \
|| defined(__ARM_ARCH_7EM__)
# undef __ARM_ARCH__
# define __ARM_ARCH__ 7
#endif
#if __ARM_ARCH__ >= 5
# define call_reg(x) blx x
#elif defined (__ARM_ARCH_4T__)
# define call_reg(x) mov lr, pc ; bx x
# if defined(__thumb__) || defined(__THUMB_INTERWORK__)
# define __INTERWORKING__
# endif
#else
# define call_reg(x) mov lr, pc ; mov pc, x
#endif
/* Conditionally compile unwinder directives. */
#ifdef __ARM_EABI__
#define UNWIND
#else
#define UNWIND @
#endif
#if defined(__thumb__) && !defined(__THUMB_INTERWORK__)
.macro ARM_FUNC_START name
.text
.align 0
.thumb
.thumb_func
#ifdef __APPLE__
ENTRY($0)
#else
ENTRY(\name)
#endif
bx pc
nop
.arm
UNWIND .fnstart
/* A hook to tell gdb that we've switched to ARM mode. Also used to call
directly from other local arm routines. */
#ifdef __APPLE__
_L__$0:
#else
_L__\name:
#endif
.endm
#else
.macro ARM_FUNC_START name
.text
.align 0
.arm
#ifdef __APPLE__
ENTRY($0)
#else
ENTRY(\name)
#endif
UNWIND .fnstart
.endm
#endif
.macro RETLDM regs=, cond=, dirn=ia
#if defined (__INTERWORKING__)
.ifc "\regs",""
ldr\cond lr, [sp], #4
.else
ldm\cond\dirn sp!, {\regs, lr}
.endif
bx\cond lr
#else
.ifc "\regs",""
ldr\cond pc, [sp], #4
.else
ldm\cond\dirn sp!, {\regs, pc}
.endif
#endif
.endm
@ r0: ffi_prep_args
@ r1: &ecif
@ r2: cif->bytes
@ r3: fig->flags
@ sp+0: ecif.rvalue
@ This assumes we are using gas.
ARM_FUNC_START ffi_call_SYSV
@ Save registers
stmfd sp!, {r0-r3, fp, lr}
UNWIND .save {r0-r3, fp, lr}
mov fp, sp
UNWIND .setfp fp, sp
@ Make room for all of the new args.
sub sp, fp, r2
@ Place all of the ffi_prep_args in position
mov r0, sp
@ r1 already set
@ Call ffi_prep_args(stack, &ecif)
bl CNAME(ffi_prep_args)
@ move first 4 parameters in registers
ldmia sp, {r0-r3}
@ and adjust stack
sub lr, fp, sp @ cif->bytes == fp - sp
ldr ip, [fp] @ load fn() in advance
cmp lr, #16
movhs lr, #16
add sp, sp, lr
@ call (fn) (...)
call_reg(ip)
@ Remove the space we pushed for the args
mov sp, fp
@ Load r2 with the pointer to storage for the return value
ldr r2, [sp, #24]
@ Load r3 with the return type code
ldr r3, [sp, #12]
@ If the return value pointer is NULL, assume no return value.
cmp r2, #0
beq LSYM(Lepilogue)
@ return INT
cmp r3, #FFI_TYPE_INT
#if defined(__SOFTFP__) || defined(__ARM_EABI__)
cmpne r3, #FFI_TYPE_FLOAT
#endif
streq r0, [r2]
beq LSYM(Lepilogue)
@ return INT64
cmp r3, #FFI_TYPE_SINT64
#if defined(__SOFTFP__) || defined(__ARM_EABI__)
cmpne r3, #FFI_TYPE_DOUBLE
#endif
stmeqia r2, {r0, r1}
#if !defined(__SOFTFP__) && !defined(__ARM_EABI__)
beq LSYM(Lepilogue)
@ return FLOAT
cmp r3, #FFI_TYPE_FLOAT
stfeqs f0, [r2]
beq LSYM(Lepilogue)
@ return DOUBLE or LONGDOUBLE
cmp r3, #FFI_TYPE_DOUBLE
stfeqd f0, [r2]
#endif
LSYM(Lepilogue):
#if defined (__INTERWORKING__)
ldmia sp!, {r0-r3,fp, lr}
bx lr
#else
ldmia sp!, {r0-r3,fp, pc}
#endif
.ffi_call_SYSV_end:
UNWIND .fnend
#ifdef __ELF__
.size CNAME(ffi_call_SYSV),.ffi_call_SYSV_end-CNAME(ffi_call_SYSV)
#endif
/*
unsigned int FFI_HIDDEN
ffi_closure_SYSV_inner (closure, respp, args)
ffi_closure *closure;
void **respp;
void *args;
*/
ARM_FUNC_START ffi_closure_SYSV
UNWIND .pad #16
add ip, sp, #16
stmfd sp!, {ip, lr}
UNWIND .save {r0, lr}
add r2, sp, #8
UNWIND .pad #16
sub sp, sp, #16
str sp, [sp, #8]
add r1, sp, #8
bl CNAME(ffi_closure_SYSV_inner)
cmp r0, #FFI_TYPE_INT
beq .Lretint
cmp r0, #FFI_TYPE_FLOAT
#if defined(__SOFTFP__) || defined(__ARM_EABI__)
beq .Lretint
#else
beq .Lretfloat
#endif
cmp r0, #FFI_TYPE_DOUBLE
#if defined(__SOFTFP__) || defined(__ARM_EABI__)
beq .Lretlonglong
#else
beq .Lretdouble
#endif
cmp r0, #FFI_TYPE_LONGDOUBLE
#if defined(__SOFTFP__) || defined(__ARM_EABI__)
beq .Lretlonglong
#else
beq .Lretlongdouble
#endif
cmp r0, #FFI_TYPE_SINT64
beq .Lretlonglong
.Lclosure_epilogue:
add sp, sp, #16
ldmfd sp, {sp, pc}
.Lretint:
ldr r0, [sp]
b .Lclosure_epilogue
.Lretlonglong:
ldr r0, [sp]
ldr r1, [sp, #4]
b .Lclosure_epilogue
#if !defined(__SOFTFP__) && !defined(__ARM_EABI__)
.Lretfloat:
ldfs f0, [sp]
b .Lclosure_epilogue
.Lretdouble:
ldfd f0, [sp]
b .Lclosure_epilogue
.Lretlongdouble:
ldfd f0, [sp]
b .Lclosure_epilogue
#endif
.ffi_closure_SYSV_end:
UNWIND .fnend
#ifdef __ELF__
.size CNAME(ffi_closure_SYSV),.ffi_closure_SYSV_end-CNAME(ffi_closure_SYSV)
#endif
/* Below are VFP hard-float ABI call and closure implementations.
Add VFP FPU directive here. This is only compiled into the library
under EABI. */
#ifdef __ARM_EABI__
.fpu vfp
@ r0: fn
@ r1: &ecif
@ r2: cif->bytes
@ r3: fig->flags
@ sp+0: ecif.rvalue
ARM_FUNC_START ffi_call_VFP
@ Save registers
stmfd sp!, {r0-r3, fp, lr}
UNWIND .save {r0-r3, fp, lr}
mov fp, sp
UNWIND .setfp fp, sp
@ Make room for all of the new args.
sub sp, sp, r2
@ Make room for loading VFP args
sub sp, sp, #64
@ Place all of the ffi_prep_args in position
mov r0, sp
@ r1 already set
sub r2, fp, #64 @ VFP scratch space
@ Call ffi_prep_args(stack, &ecif, vfp_space)
bl CNAME(ffi_prep_args)
@ Load VFP register args if needed
cmp r0, #0
beq LSYM(Lbase_args)
@ Load only d0 if possible
cmp r0, #3
sub ip, fp, #64
flddle d0, [ip]
fldmiadgt ip, {d0-d7}
LSYM(Lbase_args):
@ move first 4 parameters in registers
ldmia sp, {r0-r3}
@ and adjust stack
sub lr, ip, sp @ cif->bytes == (fp - 64) - sp
ldr ip, [fp] @ load fn() in advance
cmp lr, #16
movhs lr, #16
add sp, sp, lr
@ call (fn) (...)
call_reg(ip)
@ Remove the space we pushed for the args
mov sp, fp
@ Load r2 with the pointer to storage for
@ the return value
ldr r2, [sp, #24]
@ Load r3 with the return type code
ldr r3, [sp, #12]
@ If the return value pointer is NULL,
@ assume no return value.
cmp r2, #0
beq LSYM(Lepilogue_vfp)
cmp r3, #FFI_TYPE_INT
streq r0, [r2]
beq LSYM(Lepilogue_vfp)
cmp r3, #FFI_TYPE_SINT64
stmeqia r2, {r0, r1}
beq LSYM(Lepilogue_vfp)
cmp r3, #FFI_TYPE_FLOAT
fstseq s0, [r2]
beq LSYM(Lepilogue_vfp)
cmp r3, #FFI_TYPE_DOUBLE
fstdeq d0, [r2]
beq LSYM(Lepilogue_vfp)
cmp r3, #FFI_TYPE_STRUCT_VFP_FLOAT
cmpne r3, #FFI_TYPE_STRUCT_VFP_DOUBLE
fstmiadeq r2, {d0-d3}
LSYM(Lepilogue_vfp):
RETLDM "r0-r3,fp"
.ffi_call_VFP_end:
UNWIND .fnend
.size CNAME(ffi_call_VFP),.ffi_call_VFP_end-CNAME(ffi_call_VFP)
ARM_FUNC_START ffi_closure_VFP
fstmfdd sp!, {d0-d7}
@ r0-r3, then d0-d7
UNWIND .pad #80
add ip, sp, #80
stmfd sp!, {ip, lr}
UNWIND .save {r0, lr}
add r2, sp, #72
add r3, sp, #8
UNWIND .pad #72
sub sp, sp, #72
str sp, [sp, #64]
add r1, sp, #64
bl CNAME(ffi_closure_SYSV_inner)
cmp r0, #FFI_TYPE_INT
beq .Lretint_vfp
cmp r0, #FFI_TYPE_FLOAT
beq .Lretfloat_vfp
cmp r0, #FFI_TYPE_DOUBLE
cmpne r0, #FFI_TYPE_LONGDOUBLE
beq .Lretdouble_vfp
cmp r0, #FFI_TYPE_SINT64
beq .Lretlonglong_vfp
cmp r0, #FFI_TYPE_STRUCT_VFP_FLOAT
beq .Lretfloat_struct_vfp
cmp r0, #FFI_TYPE_STRUCT_VFP_DOUBLE
beq .Lretdouble_struct_vfp
.Lclosure_epilogue_vfp:
add sp, sp, #72
ldmfd sp, {sp, pc}
.Lretfloat_vfp:
flds s0, [sp]
b .Lclosure_epilogue_vfp
.Lretdouble_vfp:
fldd d0, [sp]
b .Lclosure_epilogue_vfp
.Lretint_vfp:
ldr r0, [sp]
b .Lclosure_epilogue_vfp
.Lretlonglong_vfp:
ldmia sp, {r0, r1}
b .Lclosure_epilogue_vfp
.Lretfloat_struct_vfp:
fldmiad sp, {d0-d1}
b .Lclosure_epilogue_vfp
.Lretdouble_struct_vfp:
fldmiad sp, {d0-d3}
b .Lclosure_epilogue_vfp
.ffi_closure_VFP_end:
UNWIND .fnend
.size CNAME(ffi_closure_VFP),.ffi_closure_VFP_end-CNAME(ffi_closure_VFP)
#endif
ENTRY(ffi_arm_trampoline)
stmfd sp!, {r0-r3}
ldr r0, [pc]
ldr pc, [pc]
#if defined __ELF__ && defined __linux__
.section .note.GNU-stack,"",%progbits
#endif
|
suryaveeryadav/Python-3.4.0
| 142,148
|
Modules/_ctypes/libffi/src/arm/trampoline.S
|
# GENERATED CODE - DO NOT EDIT
# This file was generated by src/arm/gentramp.sh
# Copyright (c) 2010, Plausible Labs Cooperative, Inc.
#
# Permission is hereby granted, free of charge, to any person obtaining
# a copy of this software and associated documentation files (the
# Software''), to deal in the Software without restriction, including
# without limitation the rights to use, copy, modify, merge, publish,
# distribute, sublicense, and/or sell copies of the Software, and to
# permit persons to whom the Software is furnished to do so, subject to
# the following conditions:
#
# The above copyright notice and this permission notice shall be included
# in all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED AS IS'', WITHOUT WARRANTY OF ANY KIND,
# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
# NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
# HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
# DEALINGS IN THE SOFTWARE.
# -----------------------------------------------------------------------
.text
.align 12
.globl _ffi_closure_trampoline_table_page
_ffi_closure_trampoline_table_page:
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
// trampoline
// Save to stack
stmfd sp!, {r0-r3}
// Load the context argument from the config page.
// This places the first usable config value at _ffi_closure_trampoline_table-4080
// This accounts for the above 4-byte stmfd instruction, plus 8 bytes constant when loading from pc.
ldr r0, [pc, #-4092]
// Load the jump address from the config page.
ldr pc, [pc, #-4092]
|
suryaveeryadav/Python-3.4.0
| 9,120
|
Modules/_ctypes/libffi/src/powerpc/aix_closure.S
|
/* -----------------------------------------------------------------------
aix_closure.S - Copyright (c) 2002, 2003, 2009 Free Software Foundation, Inc.
based on darwin_closure.S
PowerPC Assembly glue.
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND, EXPRESS
OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR
OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
OTHER DEALINGS IN THE SOFTWARE.
----------------------------------------------------------------------- */
.set r0,0
.set r1,1
.set r2,2
.set r3,3
.set r4,4
.set r5,5
.set r6,6
.set r7,7
.set r8,8
.set r9,9
.set r10,10
.set r11,11
.set r12,12
.set r13,13
.set r14,14
.set r15,15
.set r16,16
.set r17,17
.set r18,18
.set r19,19
.set r20,20
.set r21,21
.set r22,22
.set r23,23
.set r24,24
.set r25,25
.set r26,26
.set r27,27
.set r28,28
.set r29,29
.set r30,30
.set r31,31
.set f0,0
.set f1,1
.set f2,2
.set f3,3
.set f4,4
.set f5,5
.set f6,6
.set f7,7
.set f8,8
.set f9,9
.set f10,10
.set f11,11
.set f12,12
.set f13,13
.set f14,14
.set f15,15
.set f16,16
.set f17,17
.set f18,18
.set f19,19
.set f20,20
.set f21,21
.extern .ffi_closure_helper_DARWIN
#define LIBFFI_ASM
#define JUMPTARGET(name) name
#define L(x) x
.file "aix_closure.S"
.toc
LC..60:
.tc L..60[TC],L..60
.csect .text[PR]
.align 2
.csect .text[PR]
.align 2
.globl ffi_closure_ASM
.globl .ffi_closure_ASM
.csect ffi_closure_ASM[DS]
ffi_closure_ASM:
#ifdef __64BIT__
.llong .ffi_closure_ASM, TOC[tc0], 0
.csect .text[PR]
.ffi_closure_ASM:
/* we want to build up an area for the parameters passed */
/* in registers (both floating point and integer) */
/* we store gpr 3 to gpr 10 (aligned to 4)
in the parents outgoing area */
std r3, 48+(0*8)(r1)
std r4, 48+(1*8)(r1)
std r5, 48+(2*8)(r1)
std r6, 48+(3*8)(r1)
mflr r0
std r7, 48+(4*8)(r1)
std r8, 48+(5*8)(r1)
std r9, 48+(6*8)(r1)
std r10, 48+(7*8)(r1)
std r0, 16(r1) /* save the return address */
/* 48 Bytes (Linkage Area) */
/* 64 Bytes (params) */
/* 16 Bytes (result) */
/* 104 Bytes (13*8 from FPR) */
/* 8 Bytes (alignment) */
/* 240 Bytes */
stdu r1, -240(r1) /* skip over caller save area
keep stack aligned to 16 */
/* next save fpr 1 to fpr 13 (aligned to 8) */
stfd f1, 128+(0*8)(r1)
stfd f2, 128+(1*8)(r1)
stfd f3, 128+(2*8)(r1)
stfd f4, 128+(3*8)(r1)
stfd f5, 128+(4*8)(r1)
stfd f6, 128+(5*8)(r1)
stfd f7, 128+(6*8)(r1)
stfd f8, 128+(7*8)(r1)
stfd f9, 128+(8*8)(r1)
stfd f10, 128+(9*8)(r1)
stfd f11, 128+(10*8)(r1)
stfd f12, 128+(11*8)(r1)
stfd f13, 128+(12*8)(r1)
/* set up registers for the routine that actually does the work */
/* get the context pointer from the trampoline */
mr r3, r11
/* now load up the pointer to the result storage */
addi r4, r1, 112
/* now load up the pointer to the saved gpr registers */
addi r5, r1, 288
/* now load up the pointer to the saved fpr registers */
addi r6, r1, 128
/* make the call */
bl .ffi_closure_helper_DARWIN
nop
/* now r3 contains the return type */
/* so use it to look up in a table */
/* so we know how to deal with each type */
/* look up the proper starting point in table */
/* by using return type as offset */
lhz r3, 10(r3) /* load type from return type */
ld r4, LC..60(2) /* get address of jump table */
sldi r3, r3, 4 /* now multiply return type by 16 */
ld r0, 240+16(r1) /* load return address */
add r3, r3, r4 /* add contents of table to table address */
mtctr r3
bctr /* jump to it */
/* Each fragment must be exactly 16 bytes long (4 instructions).
Align to 16 byte boundary for cache and dispatch efficiency. */
.align 4
L..60:
/* case FFI_TYPE_VOID */
mtlr r0
addi r1, r1, 240
blr
nop
/* case FFI_TYPE_INT */
lwa r3, 112+4(r1)
mtlr r0
addi r1, r1, 240
blr
/* case FFI_TYPE_FLOAT */
lfs f1, 112+0(r1)
mtlr r0
addi r1, r1, 240
blr
/* case FFI_TYPE_DOUBLE */
lfd f1, 112+0(r1)
mtlr r0
addi r1, r1, 240
blr
/* case FFI_TYPE_LONGDOUBLE */
lfd f1, 112+0(r1)
mtlr r0
lfd f2, 112+8(r1)
b L..finish
/* case FFI_TYPE_UINT8 */
lbz r3, 112+7(r1)
mtlr r0
addi r1, r1, 240
blr
/* case FFI_TYPE_SINT8 */
lbz r3, 112+7(r1)
mtlr r0
extsb r3, r3
b L..finish
/* case FFI_TYPE_UINT16 */
lhz r3, 112+6(r1)
mtlr r0
L..finish:
addi r1, r1, 240
blr
/* case FFI_TYPE_SINT16 */
lha r3, 112+6(r1)
mtlr r0
addi r1, r1, 240
blr
/* case FFI_TYPE_UINT32 */
lwz r3, 112+4(r1)
mtlr r0
addi r1, r1, 240
blr
/* case FFI_TYPE_SINT32 */
lwa r3, 112+4(r1)
mtlr r0
addi r1, r1, 240
blr
/* case FFI_TYPE_UINT64 */
ld r3, 112+0(r1)
mtlr r0
addi r1, r1, 240
blr
/* case FFI_TYPE_SINT64 */
ld r3, 112+0(r1)
mtlr r0
addi r1, r1, 240
blr
/* case FFI_TYPE_STRUCT */
mtlr r0
addi r1, r1, 240
blr
nop
/* case FFI_TYPE_POINTER */
ld r3, 112+0(r1)
mtlr r0
addi r1, r1, 240
blr
#else /* ! __64BIT__ */
.long .ffi_closure_ASM, TOC[tc0], 0
.csect .text[PR]
.ffi_closure_ASM:
/* we want to build up an area for the parameters passed */
/* in registers (both floating point and integer) */
/* we store gpr 3 to gpr 10 (aligned to 4)
in the parents outgoing area */
stw r3, 24+(0*4)(r1)
stw r4, 24+(1*4)(r1)
stw r5, 24+(2*4)(r1)
stw r6, 24+(3*4)(r1)
mflr r0
stw r7, 24+(4*4)(r1)
stw r8, 24+(5*4)(r1)
stw r9, 24+(6*4)(r1)
stw r10, 24+(7*4)(r1)
stw r0, 8(r1)
/* 24 Bytes (Linkage Area) */
/* 32 Bytes (params) */
/* 16 Bytes (result) */
/* 104 Bytes (13*8 from FPR) */
/* 176 Bytes */
stwu r1, -176(r1) /* skip over caller save area
keep stack aligned to 16 */
/* next save fpr 1 to fpr 13 (aligned to 8) */
stfd f1, 72+(0*8)(r1)
stfd f2, 72+(1*8)(r1)
stfd f3, 72+(2*8)(r1)
stfd f4, 72+(3*8)(r1)
stfd f5, 72+(4*8)(r1)
stfd f6, 72+(5*8)(r1)
stfd f7, 72+(6*8)(r1)
stfd f8, 72+(7*8)(r1)
stfd f9, 72+(8*8)(r1)
stfd f10, 72+(9*8)(r1)
stfd f11, 72+(10*8)(r1)
stfd f12, 72+(11*8)(r1)
stfd f13, 72+(12*8)(r1)
/* set up registers for the routine that actually does the work */
/* get the context pointer from the trampoline */
mr r3, r11
/* now load up the pointer to the result storage */
addi r4, r1, 56
/* now load up the pointer to the saved gpr registers */
addi r5, r1, 200
/* now load up the pointer to the saved fpr registers */
addi r6, r1, 72
/* make the call */
bl .ffi_closure_helper_DARWIN
nop
/* now r3 contains the return type */
/* so use it to look up in a table */
/* so we know how to deal with each type */
/* look up the proper starting point in table */
/* by using return type as offset */
lhz r3, 6(r3) /* load type from return type */
lwz r4, LC..60(2) /* get address of jump table */
slwi r3, r3, 4 /* now multiply return type by 16 */
lwz r0, 176+8(r1) /* load return address */
add r3, r3, r4 /* add contents of table to table address */
mtctr r3
bctr /* jump to it */
/* Each fragment must be exactly 16 bytes long (4 instructions).
Align to 16 byte boundary for cache and dispatch efficiency. */
.align 4
L..60:
/* case FFI_TYPE_VOID */
mtlr r0
addi r1, r1, 176
blr
nop
/* case FFI_TYPE_INT */
lwz r3, 56+0(r1)
mtlr r0
addi r1, r1, 176
blr
/* case FFI_TYPE_FLOAT */
lfs f1, 56+0(r1)
mtlr r0
addi r1, r1, 176
blr
/* case FFI_TYPE_DOUBLE */
lfd f1, 56+0(r1)
mtlr r0
addi r1, r1, 176
blr
/* case FFI_TYPE_LONGDOUBLE */
lfd f1, 56+0(r1)
mtlr r0
lfd f2, 56+8(r1)
b L..finish
/* case FFI_TYPE_UINT8 */
lbz r3, 56+3(r1)
mtlr r0
addi r1, r1, 176
blr
/* case FFI_TYPE_SINT8 */
lbz r3, 56+3(r1)
mtlr r0
extsb r3, r3
b L..finish
/* case FFI_TYPE_UINT16 */
lhz r3, 56+2(r1)
mtlr r0
addi r1, r1, 176
blr
/* case FFI_TYPE_SINT16 */
lha r3, 56+2(r1)
mtlr r0
addi r1, r1, 176
blr
/* case FFI_TYPE_UINT32 */
lwz r3, 56+0(r1)
mtlr r0
addi r1, r1, 176
blr
/* case FFI_TYPE_SINT32 */
lwz r3, 56+0(r1)
mtlr r0
addi r1, r1, 176
blr
/* case FFI_TYPE_UINT64 */
lwz r3, 56+0(r1)
mtlr r0
lwz r4, 56+4(r1)
b L..finish
/* case FFI_TYPE_SINT64 */
lwz r3, 56+0(r1)
mtlr r0
lwz r4, 56+4(r1)
b L..finish
/* case FFI_TYPE_STRUCT */
mtlr r0
addi r1, r1, 176
blr
nop
/* case FFI_TYPE_POINTER */
lwz r3, 56+0(r1)
mtlr r0
L..finish:
addi r1, r1, 176
blr
#endif
/* END(ffi_closure_ASM) */
|
suryaveeryadav/Python-3.4.0
| 6,653
|
Modules/_ctypes/libffi/src/powerpc/sysv.S
|
/* -----------------------------------------------------------------------
sysv.S - Copyright (c) 1998 Geoffrey Keating
Copyright (C) 2007 Free Software Foundation, Inc
PowerPC Assembly glue.
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
DEALINGS IN THE SOFTWARE.
----------------------------------------------------------------------- */
#define LIBFFI_ASM
#include <fficonfig.h>
#include <ffi.h>
#include <powerpc/asm.h>
#ifndef __powerpc64__
.globl ffi_prep_args_SYSV
ENTRY(ffi_call_SYSV)
.LFB1:
/* Save the old stack pointer as AP. */
mr %r8,%r1
.LCFI0:
/* Allocate the stack space we need. */
stwux %r1,%r1,%r4
/* Save registers we use. */
mflr %r9
stw %r28,-16(%r8)
.LCFI1:
stw %r29,-12(%r8)
.LCFI2:
stw %r30, -8(%r8)
.LCFI3:
stw %r31, -4(%r8)
.LCFI4:
stw %r9, 4(%r8)
.LCFI5:
/* Save arguments over call... */
mr %r31,%r5 /* flags, */
mr %r30,%r6 /* rvalue, */
mr %r29,%r7 /* function address, */
mr %r28,%r8 /* our AP. */
.LCFI6:
/* Call ffi_prep_args_SYSV. */
mr %r4,%r1
bl ffi_prep_args_SYSV@local
/* Now do the call. */
/* Set up cr1 with bits 4-7 of the flags. */
mtcrf 0x40,%r31
/* Get the address to call into CTR. */
mtctr %r29
/* Load all those argument registers. */
lwz %r3,-16-(8*4)(%r28)
lwz %r4,-16-(7*4)(%r28)
lwz %r5,-16-(6*4)(%r28)
lwz %r6,-16-(5*4)(%r28)
bf- 5,1f
nop
lwz %r7,-16-(4*4)(%r28)
lwz %r8,-16-(3*4)(%r28)
lwz %r9,-16-(2*4)(%r28)
lwz %r10,-16-(1*4)(%r28)
nop
1:
#ifndef __NO_FPRS__
/* Load all the FP registers. */
bf- 6,2f
lfd %f1,-16-(8*4)-(8*8)(%r28)
lfd %f2,-16-(8*4)-(7*8)(%r28)
lfd %f3,-16-(8*4)-(6*8)(%r28)
lfd %f4,-16-(8*4)-(5*8)(%r28)
nop
lfd %f5,-16-(8*4)-(4*8)(%r28)
lfd %f6,-16-(8*4)-(3*8)(%r28)
lfd %f7,-16-(8*4)-(2*8)(%r28)
lfd %f8,-16-(8*4)-(1*8)(%r28)
#endif
2:
/* Make the call. */
bctrl
/* Now, deal with the return value. */
mtcrf 0x01,%r31 /* cr7 */
bt- 31,L(small_struct_return_value)
bt- 30,L(done_return_value)
#ifndef __NO_FPRS__
bt- 29,L(fp_return_value)
#endif
stw %r3,0(%r30)
bf+ 28,L(done_return_value)
stw %r4,4(%r30)
mtcrf 0x02,%r31 /* cr6 */
bf 27,L(done_return_value)
stw %r5,8(%r30)
stw %r6,12(%r30)
/* Fall through... */
L(done_return_value):
/* Restore the registers we used and return. */
lwz %r9, 4(%r28)
lwz %r31, -4(%r28)
mtlr %r9
lwz %r30, -8(%r28)
lwz %r29,-12(%r28)
lwz %r28,-16(%r28)
lwz %r1,0(%r1)
blr
#ifndef __NO_FPRS__
L(fp_return_value):
bf 28,L(float_return_value)
stfd %f1,0(%r30)
mtcrf 0x02,%r31 /* cr6 */
bf 27,L(done_return_value)
stfd %f2,8(%r30)
b L(done_return_value)
L(float_return_value):
stfs %f1,0(%r30)
b L(done_return_value)
#endif
L(small_struct_return_value):
extrwi %r6,%r31,2,19 /* number of bytes padding = shift/8 */
mtcrf 0x02,%r31 /* copy flags to cr[24:27] (cr6) */
extrwi %r5,%r31,5,19 /* r5 <- number of bits of padding */
subfic %r6,%r6,4 /* r6 <- number of useful bytes in r3 */
bf- 25,L(done_return_value) /* struct in r3 ? if not, done. */
/* smst_one_register: */
slw %r3,%r3,%r5 /* Left-justify value in r3 */
mtxer %r6 /* move byte count to XER ... */
stswx %r3,0,%r30 /* ... and store that many bytes */
bf+ 26,L(done_return_value) /* struct in r3:r4 ? */
add %r6,%r6,%r30 /* adjust pointer */
stswi %r4,%r6,4 /* store last four bytes */
b L(done_return_value)
.LFE1:
END(ffi_call_SYSV)
.section ".eh_frame",EH_FRAME_FLAGS,@progbits
.Lframe1:
.4byte .LECIE1-.LSCIE1 /* Length of Common Information Entry */
.LSCIE1:
.4byte 0x0 /* CIE Identifier Tag */
.byte 0x1 /* CIE Version */
#if defined _RELOCATABLE || defined __PIC__
.ascii "zR\0" /* CIE Augmentation */
#else
.ascii "\0" /* CIE Augmentation */
#endif
.uleb128 0x1 /* CIE Code Alignment Factor */
.sleb128 -4 /* CIE Data Alignment Factor */
.byte 0x41 /* CIE RA Column */
#if defined _RELOCATABLE || defined __PIC__
.uleb128 0x1 /* Augmentation size */
.byte 0x1b /* FDE Encoding (pcrel sdata4) */
#endif
.byte 0xc /* DW_CFA_def_cfa */
.uleb128 0x1
.uleb128 0x0
.align 2
.LECIE1:
.LSFDE1:
.4byte .LEFDE1-.LASFDE1 /* FDE Length */
.LASFDE1:
.4byte .LASFDE1-.Lframe1 /* FDE CIE offset */
#if defined _RELOCATABLE || defined __PIC__
.4byte .LFB1-. /* FDE initial location */
#else
.4byte .LFB1 /* FDE initial location */
#endif
.4byte .LFE1-.LFB1 /* FDE address range */
#if defined _RELOCATABLE || defined __PIC__
.uleb128 0x0 /* Augmentation size */
#endif
.byte 0x4 /* DW_CFA_advance_loc4 */
.4byte .LCFI0-.LFB1
.byte 0xd /* DW_CFA_def_cfa_register */
.uleb128 0x08
.byte 0x4 /* DW_CFA_advance_loc4 */
.4byte .LCFI5-.LCFI0
.byte 0x11 /* DW_CFA_offset_extended_sf */
.uleb128 0x41
.sleb128 -1
.byte 0x9f /* DW_CFA_offset, column 0x1f */
.uleb128 0x1
.byte 0x9e /* DW_CFA_offset, column 0x1e */
.uleb128 0x2
.byte 0x9d /* DW_CFA_offset, column 0x1d */
.uleb128 0x3
.byte 0x9c /* DW_CFA_offset, column 0x1c */
.uleb128 0x4
.byte 0x4 /* DW_CFA_advance_loc4 */
.4byte .LCFI6-.LCFI5
.byte 0xd /* DW_CFA_def_cfa_register */
.uleb128 0x1c
.align 2
.LEFDE1:
#endif
#if defined __ELF__ && defined __linux__
.section .note.GNU-stack,"",@progbits
#endif
|
suryaveeryadav/Python-3.4.0
| 6,691
|
Modules/_ctypes/libffi/src/powerpc/aix.S
|
/* -----------------------------------------------------------------------
aix.S - Copyright (c) 2002, 2009 Free Software Foundation, Inc.
based on darwin.S by John Hornkvist
PowerPC Assembly glue.
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND, EXPRESS
OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR
OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
OTHER DEALINGS IN THE SOFTWARE.
----------------------------------------------------------------------- */
.set r0,0
.set r1,1
.set r2,2
.set r3,3
.set r4,4
.set r5,5
.set r6,6
.set r7,7
.set r8,8
.set r9,9
.set r10,10
.set r11,11
.set r12,12
.set r13,13
.set r14,14
.set r15,15
.set r16,16
.set r17,17
.set r18,18
.set r19,19
.set r20,20
.set r21,21
.set r22,22
.set r23,23
.set r24,24
.set r25,25
.set r26,26
.set r27,27
.set r28,28
.set r29,29
.set r30,30
.set r31,31
.set f0,0
.set f1,1
.set f2,2
.set f3,3
.set f4,4
.set f5,5
.set f6,6
.set f7,7
.set f8,8
.set f9,9
.set f10,10
.set f11,11
.set f12,12
.set f13,13
.set f14,14
.set f15,15
.set f16,16
.set f17,17
.set f18,18
.set f19,19
.set f20,20
.set f21,21
.extern .ffi_prep_args
#define LIBFFI_ASM
#include <fficonfig.h>
#include <ffi.h>
#define JUMPTARGET(name) name
#define L(x) x
.file "aix.S"
.toc
/* void ffi_call_AIX(extended_cif *ecif, unsigned long bytes,
* unsigned int flags, unsigned int *rvalue,
* void (*fn)(),
* void (*prep_args)(extended_cif*, unsigned *const));
* r3=ecif, r4=bytes, r5=flags, r6=rvalue, r7=fn, r8=prep_args
*/
.csect .text[PR]
.align 2
.globl ffi_call_AIX
.globl .ffi_call_AIX
.csect ffi_call_AIX[DS]
ffi_call_AIX:
#ifdef __64BIT__
.llong .ffi_call_AIX, TOC[tc0], 0
.csect .text[PR]
.ffi_call_AIX:
/* Save registers we use. */
mflr r0
std r28,-32(r1)
std r29,-24(r1)
std r30,-16(r1)
std r31, -8(r1)
std r0, 16(r1)
mr r28, r1 /* our AP. */
stdux r1, r1, r4
/* Save arguments over call... */
mr r31, r5 /* flags, */
mr r30, r6 /* rvalue, */
mr r29, r7 /* function address. */
std r2, 40(r1)
/* Call ffi_prep_args. */
mr r4, r1
bl .ffi_prep_args
nop
/* Now do the call. */
ld r0, 0(r29)
ld r2, 8(r29)
ld r11, 16(r29)
/* Set up cr1 with bits 4-7 of the flags. */
mtcrf 0x40, r31
mtctr r0
/* Load all those argument registers. */
/* We have set up a nice stack frame, just load it into registers. */
ld r3, 40+(1*8)(r1)
ld r4, 40+(2*8)(r1)
ld r5, 40+(3*8)(r1)
ld r6, 40+(4*8)(r1)
nop
ld r7, 40+(5*8)(r1)
ld r8, 40+(6*8)(r1)
ld r9, 40+(7*8)(r1)
ld r10,40+(8*8)(r1)
L1:
/* Load all the FP registers. */
bf 6,L2 /* 2f + 0x18 */
lfd f1,-32-(13*8)(r28)
lfd f2,-32-(12*8)(r28)
lfd f3,-32-(11*8)(r28)
lfd f4,-32-(10*8)(r28)
nop
lfd f5,-32-(9*8)(r28)
lfd f6,-32-(8*8)(r28)
lfd f7,-32-(7*8)(r28)
lfd f8,-32-(6*8)(r28)
nop
lfd f9,-32-(5*8)(r28)
lfd f10,-32-(4*8)(r28)
lfd f11,-32-(3*8)(r28)
lfd f12,-32-(2*8)(r28)
nop
lfd f13,-32-(1*8)(r28)
L2:
/* Make the call. */
bctrl
ld r2, 40(r1)
/* Now, deal with the return value. */
mtcrf 0x01, r31
bt 30, L(done_return_value)
bt 29, L(fp_return_value)
std r3, 0(r30)
/* Fall through... */
L(done_return_value):
/* Restore the registers we used and return. */
mr r1, r28
ld r0, 16(r28)
ld r28, -32(r1)
mtlr r0
ld r29, -24(r1)
ld r30, -16(r1)
ld r31, -8(r1)
blr
L(fp_return_value):
bf 28, L(float_return_value)
stfd f1, 0(r30)
bf 31, L(done_return_value)
stfd f2, 8(r30)
b L(done_return_value)
L(float_return_value):
stfs f1, 0(r30)
b L(done_return_value)
#else /* ! __64BIT__ */
.long .ffi_call_AIX, TOC[tc0], 0
.csect .text[PR]
.ffi_call_AIX:
/* Save registers we use. */
mflr r0
stw r28,-16(r1)
stw r29,-12(r1)
stw r30, -8(r1)
stw r31, -4(r1)
stw r0, 8(r1)
mr r28, r1 /* out AP. */
stwux r1, r1, r4
/* Save arguments over call... */
mr r31, r5 /* flags, */
mr r30, r6 /* rvalue, */
mr r29, r7 /* function address, */
stw r2, 20(r1)
/* Call ffi_prep_args. */
mr r4, r1
bl .ffi_prep_args
nop
/* Now do the call. */
lwz r0, 0(r29)
lwz r2, 4(r29)
lwz r11, 8(r29)
/* Set up cr1 with bits 4-7 of the flags. */
mtcrf 0x40, r31
mtctr r0
/* Load all those argument registers. */
/* We have set up a nice stack frame, just load it into registers. */
lwz r3, 20+(1*4)(r1)
lwz r4, 20+(2*4)(r1)
lwz r5, 20+(3*4)(r1)
lwz r6, 20+(4*4)(r1)
nop
lwz r7, 20+(5*4)(r1)
lwz r8, 20+(6*4)(r1)
lwz r9, 20+(7*4)(r1)
lwz r10,20+(8*4)(r1)
L1:
/* Load all the FP registers. */
bf 6,L2 /* 2f + 0x18 */
lfd f1,-16-(13*8)(r28)
lfd f2,-16-(12*8)(r28)
lfd f3,-16-(11*8)(r28)
lfd f4,-16-(10*8)(r28)
nop
lfd f5,-16-(9*8)(r28)
lfd f6,-16-(8*8)(r28)
lfd f7,-16-(7*8)(r28)
lfd f8,-16-(6*8)(r28)
nop
lfd f9,-16-(5*8)(r28)
lfd f10,-16-(4*8)(r28)
lfd f11,-16-(3*8)(r28)
lfd f12,-16-(2*8)(r28)
nop
lfd f13,-16-(1*8)(r28)
L2:
/* Make the call. */
bctrl
lwz r2, 20(r1)
/* Now, deal with the return value. */
mtcrf 0x01, r31
bt 30, L(done_return_value)
bt 29, L(fp_return_value)
stw r3, 0(r30)
bf 28, L(done_return_value)
stw r4, 4(r30)
/* Fall through... */
L(done_return_value):
/* Restore the registers we used and return. */
mr r1, r28
lwz r0, 8(r28)
lwz r28,-16(r1)
mtlr r0
lwz r29,-12(r1)
lwz r30, -8(r1)
lwz r31, -4(r1)
blr
L(fp_return_value):
bf 28, L(float_return_value)
stfd f1, 0(r30)
b L(done_return_value)
L(float_return_value):
stfs f1, 0(r30)
b L(done_return_value)
#endif
.long 0
.byte 0,0,0,1,128,4,0,0
/* END(ffi_call_AIX) */
.csect .text[PR]
.align 2
.globl ffi_call_DARWIN
.globl .ffi_call_DARWIN
.csect ffi_call_DARWIN[DS]
ffi_call_DARWIN:
#ifdef __64BIT__
.llong .ffi_call_DARWIN, TOC[tc0], 0
#else
.long .ffi_call_DARWIN, TOC[tc0], 0
#endif
.csect .text[PR]
.ffi_call_DARWIN:
blr
.long 0
.byte 0,0,0,0,0,0,0,0
/* END(ffi_call_DARWIN) */
|
suryaveeryadav/Python-3.4.0
| 7,279
|
Modules/_ctypes/libffi/src/powerpc/ppc_closure.S
|
/* -----------------------------------------------------------------------
sysv.h - Copyright (c) 2003 Jakub Jelinek <jakub@redhat.com>
Copyright (c) 2008 Red Hat, Inc.
PowerPC Assembly glue.
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
DEALINGS IN THE SOFTWARE.
----------------------------------------------------------------------- */
#define LIBFFI_ASM
#include <fficonfig.h>
#include <ffi.h>
#include <powerpc/asm.h>
.file "ppc_closure.S"
#ifndef __powerpc64__
ENTRY(ffi_closure_SYSV)
.LFB1:
stwu %r1,-144(%r1)
.LCFI0:
mflr %r0
.LCFI1:
stw %r0,148(%r1)
# we want to build up an areas for the parameters passed
# in registers (both floating point and integer)
# so first save gpr 3 to gpr 10 (aligned to 4)
stw %r3, 16(%r1)
stw %r4, 20(%r1)
stw %r5, 24(%r1)
stw %r6, 28(%r1)
stw %r7, 32(%r1)
stw %r8, 36(%r1)
stw %r9, 40(%r1)
stw %r10,44(%r1)
#ifndef __NO_FPRS__
# next save fpr 1 to fpr 8 (aligned to 8)
stfd %f1, 48(%r1)
stfd %f2, 56(%r1)
stfd %f3, 64(%r1)
stfd %f4, 72(%r1)
stfd %f5, 80(%r1)
stfd %f6, 88(%r1)
stfd %f7, 96(%r1)
stfd %f8, 104(%r1)
#endif
# set up registers for the routine that actually does the work
# get the context pointer from the trampoline
mr %r3,%r11
# now load up the pointer to the result storage
addi %r4,%r1,112
# now load up the pointer to the saved gpr registers
addi %r5,%r1,16
# now load up the pointer to the saved fpr registers */
addi %r6,%r1,48
# now load up the pointer to the outgoing parameter
# stack in the previous frame
# i.e. the previous frame pointer + 8
addi %r7,%r1,152
# make the call
bl ffi_closure_helper_SYSV@local
.Lret:
# now r3 contains the return type
# so use it to look up in a table
# so we know how to deal with each type
# look up the proper starting point in table
# by using return type as offset
mflr %r4 # move address of .Lret to r4
slwi %r3,%r3,4 # now multiply return type by 16
addi %r4, %r4, .Lret_type0 - .Lret
lwz %r0,148(%r1)
add %r3,%r3,%r4 # add contents of table to table address
mtctr %r3
bctr # jump to it
.LFE1:
# Each of the ret_typeX code fragments has to be exactly 16 bytes long
# (4 instructions). For cache effectiveness we align to a 16 byte boundary
# first.
.align 4
# case FFI_TYPE_VOID
.Lret_type0:
mtlr %r0
addi %r1,%r1,144
blr
nop
# case FFI_TYPE_INT
lwz %r3,112+0(%r1)
mtlr %r0
.Lfinish:
addi %r1,%r1,144
blr
# case FFI_TYPE_FLOAT
#ifndef __NO_FPRS__
lfs %f1,112+0(%r1)
mtlr %r0
addi %r1,%r1,144
#else
nop
nop
nop
#endif
blr
# case FFI_TYPE_DOUBLE
#ifndef __NO_FPRS__
lfd %f1,112+0(%r1)
mtlr %r0
addi %r1,%r1,144
#else
nop
nop
nop
#endif
blr
# case FFI_TYPE_LONGDOUBLE
#ifndef __NO_FPRS__
lfd %f1,112+0(%r1)
lfd %f2,112+8(%r1)
mtlr %r0
b .Lfinish
#else
nop
nop
nop
blr
#endif
# case FFI_TYPE_UINT8
lbz %r3,112+3(%r1)
mtlr %r0
addi %r1,%r1,144
blr
# case FFI_TYPE_SINT8
lbz %r3,112+3(%r1)
extsb %r3,%r3
mtlr %r0
b .Lfinish
# case FFI_TYPE_UINT16
lhz %r3,112+2(%r1)
mtlr %r0
addi %r1,%r1,144
blr
# case FFI_TYPE_SINT16
lha %r3,112+2(%r1)
mtlr %r0
addi %r1,%r1,144
blr
# case FFI_TYPE_UINT32
lwz %r3,112+0(%r1)
mtlr %r0
addi %r1,%r1,144
blr
# case FFI_TYPE_SINT32
lwz %r3,112+0(%r1)
mtlr %r0
addi %r1,%r1,144
blr
# case FFI_TYPE_UINT64
lwz %r3,112+0(%r1)
lwz %r4,112+4(%r1)
mtlr %r0
b .Lfinish
# case FFI_TYPE_SINT64
lwz %r3,112+0(%r1)
lwz %r4,112+4(%r1)
mtlr %r0
b .Lfinish
# case FFI_TYPE_STRUCT
mtlr %r0
addi %r1,%r1,144
blr
nop
# case FFI_TYPE_POINTER
lwz %r3,112+0(%r1)
mtlr %r0
addi %r1,%r1,144
blr
# case FFI_TYPE_UINT128
lwz %r3,112+0(%r1)
lwz %r4,112+4(%r1)
lwz %r5,112+8(%r1)
bl .Luint128
# The return types below are only used when the ABI type is FFI_SYSV.
# case FFI_SYSV_TYPE_SMALL_STRUCT + 1. One byte struct.
lbz %r3,112+0(%r1)
mtlr %r0
addi %r1,%r1,144
blr
# case FFI_SYSV_TYPE_SMALL_STRUCT + 2. Two byte struct.
lhz %r3,112+0(%r1)
mtlr %r0
addi %r1,%r1,144
blr
# case FFI_SYSV_TYPE_SMALL_STRUCT + 3. Three byte struct.
lwz %r3,112+0(%r1)
srwi %r3,%r3,8
mtlr %r0
b .Lfinish
# case FFI_SYSV_TYPE_SMALL_STRUCT + 4. Four byte struct.
lwz %r3,112+0(%r1)
mtlr %r0
addi %r1,%r1,144
blr
# case FFI_SYSV_TYPE_SMALL_STRUCT + 5. Five byte struct.
lwz %r3,112+0(%r1)
lwz %r4,112+4(%r1)
li %r5,24
b .Lstruct567
# case FFI_SYSV_TYPE_SMALL_STRUCT + 6. Six byte struct.
lwz %r3,112+0(%r1)
lwz %r4,112+4(%r1)
li %r5,16
b .Lstruct567
# case FFI_SYSV_TYPE_SMALL_STRUCT + 7. Seven byte struct.
lwz %r3,112+0(%r1)
lwz %r4,112+4(%r1)
li %r5,8
b .Lstruct567
# case FFI_SYSV_TYPE_SMALL_STRUCT + 8. Eight byte struct.
lwz %r3,112+0(%r1)
lwz %r4,112+4(%r1)
mtlr %r0
b .Lfinish
.Lstruct567:
subfic %r6,%r5,32
srw %r4,%r4,%r5
slw %r6,%r3,%r6
srw %r3,%r3,%r5
or %r4,%r6,%r4
mtlr %r0
addi %r1,%r1,144
blr
.Luint128:
lwz %r6,112+12(%r1)
mtlr %r0
addi %r1,%r1,144
blr
END(ffi_closure_SYSV)
.section ".eh_frame",EH_FRAME_FLAGS,@progbits
.Lframe1:
.4byte .LECIE1-.LSCIE1 # Length of Common Information Entry
.LSCIE1:
.4byte 0x0 # CIE Identifier Tag
.byte 0x1 # CIE Version
#if defined _RELOCATABLE || defined __PIC__
.ascii "zR\0" # CIE Augmentation
#else
.ascii "\0" # CIE Augmentation
#endif
.uleb128 0x1 # CIE Code Alignment Factor
.sleb128 -4 # CIE Data Alignment Factor
.byte 0x41 # CIE RA Column
#if defined _RELOCATABLE || defined __PIC__
.uleb128 0x1 # Augmentation size
.byte 0x1b # FDE Encoding (pcrel sdata4)
#endif
.byte 0xc # DW_CFA_def_cfa
.uleb128 0x1
.uleb128 0x0
.align 2
.LECIE1:
.LSFDE1:
.4byte .LEFDE1-.LASFDE1 # FDE Length
.LASFDE1:
.4byte .LASFDE1-.Lframe1 # FDE CIE offset
#if defined _RELOCATABLE || defined __PIC__
.4byte .LFB1-. # FDE initial location
#else
.4byte .LFB1 # FDE initial location
#endif
.4byte .LFE1-.LFB1 # FDE address range
#if defined _RELOCATABLE || defined __PIC__
.uleb128 0x0 # Augmentation size
#endif
.byte 0x4 # DW_CFA_advance_loc4
.4byte .LCFI0-.LFB1
.byte 0xe # DW_CFA_def_cfa_offset
.uleb128 144
.byte 0x4 # DW_CFA_advance_loc4
.4byte .LCFI1-.LCFI0
.byte 0x11 # DW_CFA_offset_extended_sf
.uleb128 0x41
.sleb128 -1
.align 2
.LEFDE1:
#endif
#if defined __ELF__ && defined __linux__
.section .note.GNU-stack,"",@progbits
#endif
|
suryaveeryadav/Python-3.4.0
| 6,196
|
Modules/_ctypes/libffi/src/powerpc/linux64_closure.S
|
/* -----------------------------------------------------------------------
sysv.h - Copyright (c) 2003 Jakub Jelinek <jakub@redhat.com>
Copyright (c) 2008 Red Hat, Inc.
PowerPC64 Assembly glue.
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
DEALINGS IN THE SOFTWARE.
----------------------------------------------------------------------- */
#define LIBFFI_ASM
#include <fficonfig.h>
#include <ffi.h>
.file "linux64_closure.S"
#ifdef __powerpc64__
FFI_HIDDEN (ffi_closure_LINUX64)
.globl ffi_closure_LINUX64
.section ".opd","aw"
.align 3
ffi_closure_LINUX64:
#ifdef _CALL_LINUX
.quad .L.ffi_closure_LINUX64,.TOC.@tocbase,0
.type ffi_closure_LINUX64,@function
.text
.L.ffi_closure_LINUX64:
#else
FFI_HIDDEN (.ffi_closure_LINUX64)
.globl .ffi_closure_LINUX64
.quad .ffi_closure_LINUX64,.TOC.@tocbase,0
.size ffi_closure_LINUX64,24
.type .ffi_closure_LINUX64,@function
.text
.ffi_closure_LINUX64:
#endif
.LFB1:
# save general regs into parm save area
std %r3, 48(%r1)
std %r4, 56(%r1)
std %r5, 64(%r1)
std %r6, 72(%r1)
mflr %r0
std %r7, 80(%r1)
std %r8, 88(%r1)
std %r9, 96(%r1)
std %r10, 104(%r1)
std %r0, 16(%r1)
# mandatory 48 bytes special reg save area + 64 bytes parm save area
# + 16 bytes retval area + 13*8 bytes fpr save area + round to 16
stdu %r1, -240(%r1)
.LCFI0:
# next save fpr 1 to fpr 13
stfd %f1, 128+(0*8)(%r1)
stfd %f2, 128+(1*8)(%r1)
stfd %f3, 128+(2*8)(%r1)
stfd %f4, 128+(3*8)(%r1)
stfd %f5, 128+(4*8)(%r1)
stfd %f6, 128+(5*8)(%r1)
stfd %f7, 128+(6*8)(%r1)
stfd %f8, 128+(7*8)(%r1)
stfd %f9, 128+(8*8)(%r1)
stfd %f10, 128+(9*8)(%r1)
stfd %f11, 128+(10*8)(%r1)
stfd %f12, 128+(11*8)(%r1)
stfd %f13, 128+(12*8)(%r1)
# set up registers for the routine that actually does the work
# get the context pointer from the trampoline
mr %r3, %r11
# now load up the pointer to the result storage
addi %r4, %r1, 112
# now load up the pointer to the parameter save area
# in the previous frame
addi %r5, %r1, 240 + 48
# now load up the pointer to the saved fpr registers */
addi %r6, %r1, 128
# make the call
#ifdef _CALL_LINUX
bl ffi_closure_helper_LINUX64
#else
bl .ffi_closure_helper_LINUX64
#endif
.Lret:
# now r3 contains the return type
# so use it to look up in a table
# so we know how to deal with each type
# look up the proper starting point in table
# by using return type as offset
mflr %r4 # move address of .Lret to r4
sldi %r3, %r3, 4 # now multiply return type by 16
addi %r4, %r4, .Lret_type0 - .Lret
ld %r0, 240+16(%r1)
add %r3, %r3, %r4 # add contents of table to table address
mtctr %r3
bctr # jump to it
# Each of the ret_typeX code fragments has to be exactly 16 bytes long
# (4 instructions). For cache effectiveness we align to a 16 byte boundary
# first.
.align 4
.Lret_type0:
# case FFI_TYPE_VOID
mtlr %r0
addi %r1, %r1, 240
blr
nop
# case FFI_TYPE_INT
lwa %r3, 112+4(%r1)
mtlr %r0
addi %r1, %r1, 240
blr
# case FFI_TYPE_FLOAT
lfs %f1, 112+0(%r1)
mtlr %r0
addi %r1, %r1, 240
blr
# case FFI_TYPE_DOUBLE
lfd %f1, 112+0(%r1)
mtlr %r0
addi %r1, %r1, 240
blr
# case FFI_TYPE_LONGDOUBLE
lfd %f1, 112+0(%r1)
mtlr %r0
lfd %f2, 112+8(%r1)
b .Lfinish
# case FFI_TYPE_UINT8
lbz %r3, 112+7(%r1)
mtlr %r0
addi %r1, %r1, 240
blr
# case FFI_TYPE_SINT8
lbz %r3, 112+7(%r1)
extsb %r3,%r3
mtlr %r0
b .Lfinish
# case FFI_TYPE_UINT16
lhz %r3, 112+6(%r1)
mtlr %r0
.Lfinish:
addi %r1, %r1, 240
blr
# case FFI_TYPE_SINT16
lha %r3, 112+6(%r1)
mtlr %r0
addi %r1, %r1, 240
blr
# case FFI_TYPE_UINT32
lwz %r3, 112+4(%r1)
mtlr %r0
addi %r1, %r1, 240
blr
# case FFI_TYPE_SINT32
lwa %r3, 112+4(%r1)
mtlr %r0
addi %r1, %r1, 240
blr
# case FFI_TYPE_UINT64
ld %r3, 112+0(%r1)
mtlr %r0
addi %r1, %r1, 240
blr
# case FFI_TYPE_SINT64
ld %r3, 112+0(%r1)
mtlr %r0
addi %r1, %r1, 240
blr
# case FFI_TYPE_STRUCT
mtlr %r0
addi %r1, %r1, 240
blr
nop
# case FFI_TYPE_POINTER
ld %r3, 112+0(%r1)
mtlr %r0
addi %r1, %r1, 240
blr
# esac
.LFE1:
.long 0
.byte 0,12,0,1,128,0,0,0
#ifdef _CALL_LINUX
.size ffi_closure_LINUX64,.-.L.ffi_closure_LINUX64
#else
.size .ffi_closure_LINUX64,.-.ffi_closure_LINUX64
#endif
.section .eh_frame,EH_FRAME_FLAGS,@progbits
.Lframe1:
.4byte .LECIE1-.LSCIE1 # Length of Common Information Entry
.LSCIE1:
.4byte 0x0 # CIE Identifier Tag
.byte 0x1 # CIE Version
.ascii "zR\0" # CIE Augmentation
.uleb128 0x1 # CIE Code Alignment Factor
.sleb128 -8 # CIE Data Alignment Factor
.byte 0x41 # CIE RA Column
.uleb128 0x1 # Augmentation size
.byte 0x14 # FDE Encoding (pcrel udata8)
.byte 0xc # DW_CFA_def_cfa
.uleb128 0x1
.uleb128 0x0
.align 3
.LECIE1:
.LSFDE1:
.4byte .LEFDE1-.LASFDE1 # FDE Length
.LASFDE1:
.4byte .LASFDE1-.Lframe1 # FDE CIE offset
.8byte .LFB1-. # FDE initial location
.8byte .LFE1-.LFB1 # FDE address range
.uleb128 0x0 # Augmentation size
.byte 0x2 # DW_CFA_advance_loc1
.byte .LCFI0-.LFB1
.byte 0xe # DW_CFA_def_cfa_offset
.uleb128 240
.byte 0x11 # DW_CFA_offset_extended_sf
.uleb128 0x41
.sleb128 -2
.align 3
.LEFDE1:
#endif
#if defined __ELF__ && defined __linux__
.section .note.GNU-stack,"",@progbits
#endif
|
suryaveeryadav/Python-3.4.0
| 11,262
|
Modules/_ctypes/libffi/src/powerpc/darwin.S
|
/* -----------------------------------------------------------------------
darwin.S - Copyright (c) 2000 John Hornkvist
Copyright (c) 2004, 2010 Free Software Foundation, Inc.
PowerPC Assembly glue.
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND, EXPRESS
OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR
OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
OTHER DEALINGS IN THE SOFTWARE.
----------------------------------------------------------------------- */
#define LIBFFI_ASM
#if defined(__ppc64__)
#define MODE_CHOICE(x, y) y
#else
#define MODE_CHOICE(x, y) x
#endif
#define machine_choice MODE_CHOICE(ppc7400,ppc64)
; Define some pseudo-opcodes for size-independent load & store of GPRs ...
#define lgu MODE_CHOICE(lwzu, ldu)
#define lg MODE_CHOICE(lwz,ld)
#define sg MODE_CHOICE(stw,std)
#define sgu MODE_CHOICE(stwu,stdu)
#define sgux MODE_CHOICE(stwux,stdux)
; ... and the size of GPRs and their storage indicator.
#define GPR_BYTES MODE_CHOICE(4,8)
#define LOG2_GPR_BYTES MODE_CHOICE(2,3) /* log2(GPR_BYTES) */
#define g_long MODE_CHOICE(long, quad) /* usage is ".g_long" */
; From the ABI doc: "Mac OS X ABI Function Call Guide" Version 2009-02-04.
#define LINKAGE_SIZE MODE_CHOICE(24,48)
#define PARAM_AREA MODE_CHOICE(32,64)
#define SAVED_LR_OFFSET MODE_CHOICE(8,16) /* save position for lr */
/* If there is any FP stuff we make space for all of the regs. */
#define SAVED_FPR_COUNT 13
#define FPR_SIZE 8
#define RESULT_BYTES 16
/* This should be kept in step with the same value in ffi_darwin.c. */
#define ASM_NEEDS_REGISTERS 4
#define SAVE_REGS_SIZE (ASM_NEEDS_REGISTERS * GPR_BYTES)
#include <fficonfig.h>
#include <ffi.h>
#define JUMPTARGET(name) name
#define L(x) x
.text
.align 2
.globl _ffi_prep_args
.align 2
.globl _ffi_call_DARWIN
/* We arrive here with:
r3 = ptr to extended cif.
r4 = -bytes.
r5 = cif flags.
r6 = ptr to return value.
r7 = fn pointer (user func).
r8 = fn pointer (ffi_prep_args).
r9 = ffi_type* for the ret val. */
_ffi_call_DARWIN:
Lstartcode:
mr r12,r8 /* We only need r12 until the call,
so it does not have to be saved. */
LFB1:
/* Save the old stack pointer as AP. */
mr r8,r1
LCFI0:
/* Save the retval type in parents frame. */
sg r9,(LINKAGE_SIZE+6*GPR_BYTES)(r8)
/* Allocate the stack space we need. */
sgux r1,r1,r4
/* Save registers we use. */
mflr r9
sg r9,SAVED_LR_OFFSET(r8)
sg r28,-(4 * GPR_BYTES)(r8)
sg r29,-(3 * GPR_BYTES)(r8)
sg r30,-(2 * GPR_BYTES)(r8)
sg r31,-( GPR_BYTES)(r8)
#if !defined(POWERPC_DARWIN)
/* The TOC slot is reserved in the Darwin ABI and r2 is volatile. */
sg r2,(5 * GPR_BYTES)(r1)
#endif
LCFI1:
/* Save arguments over call. */
mr r31,r5 /* flags, */
mr r30,r6 /* rvalue, */
mr r29,r7 /* function address, */
mr r28,r8 /* our AP. */
LCFI2:
/* Call ffi_prep_args. r3 = extended cif, r4 = stack ptr copy. */
mr r4,r1
li r9,0
mtctr r12 /* r12 holds address of _ffi_prep_args. */
bctrl
#if !defined(POWERPC_DARWIN)
/* The TOC slot is reserved in the Darwin ABI and r2 is volatile. */
lg r2,(5 * GPR_BYTES)(r1)
#endif
/* Now do the call.
Set up cr1 with bits 4-7 of the flags. */
mtcrf 0x40,r31
/* Get the address to call into CTR. */
mtctr r29
/* Load all those argument registers.
We have set up a nice stack frame, just load it into registers. */
lg r3, (LINKAGE_SIZE )(r1)
lg r4, (LINKAGE_SIZE + GPR_BYTES)(r1)
lg r5, (LINKAGE_SIZE + 2 * GPR_BYTES)(r1)
lg r6, (LINKAGE_SIZE + 3 * GPR_BYTES)(r1)
nop
lg r7, (LINKAGE_SIZE + 4 * GPR_BYTES)(r1)
lg r8, (LINKAGE_SIZE + 5 * GPR_BYTES)(r1)
lg r9, (LINKAGE_SIZE + 6 * GPR_BYTES)(r1)
lg r10,(LINKAGE_SIZE + 7 * GPR_BYTES)(r1)
L1:
/* ... Load all the FP registers. */
bf 6,L2 /* No floats to load. */
lfd f1, -SAVE_REGS_SIZE-(13*FPR_SIZE)(r28)
lfd f2, -SAVE_REGS_SIZE-(12*FPR_SIZE)(r28)
lfd f3, -SAVE_REGS_SIZE-(11*FPR_SIZE)(r28)
lfd f4, -SAVE_REGS_SIZE-(10*FPR_SIZE)(r28)
nop
lfd f5, -SAVE_REGS_SIZE-( 9*FPR_SIZE)(r28)
lfd f6, -SAVE_REGS_SIZE-( 8*FPR_SIZE)(r28)
lfd f7, -SAVE_REGS_SIZE-( 7*FPR_SIZE)(r28)
lfd f8, -SAVE_REGS_SIZE-( 6*FPR_SIZE)(r28)
nop
lfd f9, -SAVE_REGS_SIZE-( 5*FPR_SIZE)(r28)
lfd f10,-SAVE_REGS_SIZE-( 4*FPR_SIZE)(r28)
lfd f11,-SAVE_REGS_SIZE-( 3*FPR_SIZE)(r28)
lfd f12,-SAVE_REGS_SIZE-( 2*FPR_SIZE)(r28)
nop
lfd f13,-SAVE_REGS_SIZE-( 1*FPR_SIZE)(r28)
L2:
mr r12,r29 /* Put the target address in r12 as specified. */
mtctr r12
nop
nop
/* Make the call. */
bctrl
/* Now, deal with the return value. */
/* m64 structure returns can occupy the same set of registers as
would be used to pass such a structure as arg0 - so take care
not to step on any possibly hot regs. */
/* Get the flags.. */
mtcrf 0x03,r31 ; we need c6 & cr7 now.
; FLAG_RETURNS_NOTHING also covers struct ret-by-ref.
bt 30,L(done_return_value) ; FLAG_RETURNS_NOTHING
bf 27,L(scalar_return_value) ; not FLAG_RETURNS_STRUCT
/* OK, so we have a struct. */
#if defined(__ppc64__)
bt 31,L(maybe_return_128) ; FLAG_RETURNS_128BITS, special case
/* OK, we have to map the return back to a mem struct.
We are about to trample the parents param area, so recover the
return type. r29 is free, since the call is done. */
lg r29,(LINKAGE_SIZE + 6 * GPR_BYTES)(r28)
sg r3, (LINKAGE_SIZE )(r28)
sg r4, (LINKAGE_SIZE + GPR_BYTES)(r28)
sg r5, (LINKAGE_SIZE + 2 * GPR_BYTES)(r28)
sg r6, (LINKAGE_SIZE + 3 * GPR_BYTES)(r28)
nop
sg r7, (LINKAGE_SIZE + 4 * GPR_BYTES)(r28)
sg r8, (LINKAGE_SIZE + 5 * GPR_BYTES)(r28)
sg r9, (LINKAGE_SIZE + 6 * GPR_BYTES)(r28)
sg r10,(LINKAGE_SIZE + 7 * GPR_BYTES)(r28)
/* OK, so do the block move - we trust that memcpy will not trample
the fprs... */
mr r3,r30 ; dest
addi r4,r28,LINKAGE_SIZE ; source
/* The size is a size_t, should be long. */
lg r5,0(r29)
/* Figure out small structs */
cmpi 0,r5,4
bgt L3 ; 1, 2 and 4 bytes have special rules.
cmpi 0,r5,3
beq L3 ; not 3
addi r4,r4,8
subf r4,r5,r4
L3:
bl _memcpy
/* ... do we need the FP registers? - recover the flags.. */
mtcrf 0x03,r31 ; we need c6 & cr7 now.
bf 29,L(done_return_value) /* No floats in the struct. */
stfd f1, -SAVE_REGS_SIZE-(13*FPR_SIZE)(r28)
stfd f2, -SAVE_REGS_SIZE-(12*FPR_SIZE)(r28)
stfd f3, -SAVE_REGS_SIZE-(11*FPR_SIZE)(r28)
stfd f4, -SAVE_REGS_SIZE-(10*FPR_SIZE)(r28)
nop
stfd f5, -SAVE_REGS_SIZE-( 9*FPR_SIZE)(r28)
stfd f6, -SAVE_REGS_SIZE-( 8*FPR_SIZE)(r28)
stfd f7, -SAVE_REGS_SIZE-( 7*FPR_SIZE)(r28)
stfd f8, -SAVE_REGS_SIZE-( 6*FPR_SIZE)(r28)
nop
stfd f9, -SAVE_REGS_SIZE-( 5*FPR_SIZE)(r28)
stfd f10,-SAVE_REGS_SIZE-( 4*FPR_SIZE)(r28)
stfd f11,-SAVE_REGS_SIZE-( 3*FPR_SIZE)(r28)
stfd f12,-SAVE_REGS_SIZE-( 2*FPR_SIZE)(r28)
nop
stfd f13,-SAVE_REGS_SIZE-( 1*FPR_SIZE)(r28)
mr r3,r29 ; ffi_type *
mr r4,r30 ; dest
addi r5,r28,-SAVE_REGS_SIZE-(13*FPR_SIZE) ; fprs
xor r6,r6,r6
sg r6,(LINKAGE_SIZE + 7 * GPR_BYTES)(r28)
addi r6,r28,(LINKAGE_SIZE + 7 * GPR_BYTES) ; point to a zeroed counter.
bl _darwin64_struct_floats_to_mem
b L(done_return_value)
#else
stw r3,0(r30) ; m32 the only struct return in reg is 4 bytes.
#endif
b L(done_return_value)
L(fp_return_value):
/* Do we have long double to store? */
bf 31,L(fd_return_value) ; FLAG_RETURNS_128BITS
stfd f1,0(r30)
stfd f2,FPR_SIZE(r30)
b L(done_return_value)
L(fd_return_value):
/* Do we have double to store? */
bf 28,L(float_return_value)
stfd f1,0(r30)
b L(done_return_value)
L(float_return_value):
/* We only have a float to store. */
stfs f1,0(r30)
b L(done_return_value)
L(scalar_return_value):
bt 29,L(fp_return_value) ; FLAG_RETURNS_FP
; ffi_arg is defined as unsigned long.
sg r3,0(r30) ; Save the reg.
bf 28,L(done_return_value) ; not FLAG_RETURNS_64BITS
#if defined(__ppc64__)
L(maybe_return_128):
std r3,0(r30)
bf 31,L(done_return_value) ; not FLAG_RETURNS_128BITS
std r4,8(r30)
#else
stw r4,4(r30)
#endif
/* Fall through. */
/* We want this at the end to simplify eh epilog computation. */
L(done_return_value):
/* Restore the registers we used and return. */
lg r29,SAVED_LR_OFFSET(r28)
; epilog
lg r31,-(1 * GPR_BYTES)(r28)
mtlr r29
lg r30,-(2 * GPR_BYTES)(r28)
lg r29,-(3 * GPR_BYTES)(r28)
lg r28,-(4 * GPR_BYTES)(r28)
lg r1,0(r1)
blr
LFE1:
.align 1
/* END(_ffi_call_DARWIN) */
/* Provide a null definition of _ffi_call_AIX. */
.text
.globl _ffi_call_AIX
.align 2
_ffi_call_AIX:
blr
/* END(_ffi_call_AIX) */
/* EH stuff. */
#define EH_DATA_ALIGN_FACT MODE_CHOICE(0x7c,0x78)
.static_data
.align LOG2_GPR_BYTES
LLFB0$non_lazy_ptr:
.g_long Lstartcode
.section __TEXT,__eh_frame,coalesced,no_toc+strip_static_syms+live_support
EH_frame1:
.set L$set$0,LECIE1-LSCIE1
.long L$set$0 ; Length of Common Information Entry
LSCIE1:
.long 0x0 ; CIE Identifier Tag
.byte 0x1 ; CIE Version
.ascii "zR\0" ; CIE Augmentation
.byte 0x1 ; uleb128 0x1; CIE Code Alignment Factor
.byte EH_DATA_ALIGN_FACT ; sleb128 -4; CIE Data Alignment Factor
.byte 0x41 ; CIE RA Column
.byte 0x1 ; uleb128 0x1; Augmentation size
.byte 0x10 ; FDE Encoding (indirect pcrel)
.byte 0xc ; DW_CFA_def_cfa
.byte 0x1 ; uleb128 0x1
.byte 0x0 ; uleb128 0x0
.align LOG2_GPR_BYTES
LECIE1:
.globl _ffi_call_DARWIN.eh
_ffi_call_DARWIN.eh:
LSFDE1:
.set L$set$1,LEFDE1-LASFDE1
.long L$set$1 ; FDE Length
LASFDE1:
.long LASFDE1-EH_frame1 ; FDE CIE offset
.g_long LLFB0$non_lazy_ptr-. ; FDE initial location
.set L$set$3,LFE1-Lstartcode
.g_long L$set$3 ; FDE address range
.byte 0x0 ; uleb128 0x0; Augmentation size
.byte 0x4 ; DW_CFA_advance_loc4
.set L$set$4,LCFI0-Lstartcode
.long L$set$4
.byte 0xd ; DW_CFA_def_cfa_register
.byte 0x08 ; uleb128 0x08
.byte 0x4 ; DW_CFA_advance_loc4
.set L$set$5,LCFI1-LCFI0
.long L$set$5
.byte 0x11 ; DW_CFA_offset_extended_sf
.byte 0x41 ; uleb128 0x41
.byte 0x7e ; sleb128 -2
.byte 0x9f ; DW_CFA_offset, column 0x1f
.byte 0x1 ; uleb128 0x1
.byte 0x9e ; DW_CFA_offset, column 0x1e
.byte 0x2 ; uleb128 0x2
.byte 0x9d ; DW_CFA_offset, column 0x1d
.byte 0x3 ; uleb128 0x3
.byte 0x9c ; DW_CFA_offset, column 0x1c
.byte 0x4 ; uleb128 0x4
.byte 0x4 ; DW_CFA_advance_loc4
.set L$set$6,LCFI2-LCFI1
.long L$set$6
.byte 0xd ; DW_CFA_def_cfa_register
.byte 0x1c ; uleb128 0x1c
.align LOG2_GPR_BYTES
LEFDE1:
.align 1
|
suryaveeryadav/Python-3.4.0
| 5,263
|
Modules/_ctypes/libffi/src/powerpc/linux64.S
|
/* -----------------------------------------------------------------------
sysv.h - Copyright (c) 2003 Jakub Jelinek <jakub@redhat.com>
Copyright (c) 2008 Red Hat, Inc.
PowerPC64 Assembly glue.
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
DEALINGS IN THE SOFTWARE.
----------------------------------------------------------------------- */
#define LIBFFI_ASM
#include <fficonfig.h>
#include <ffi.h>
#ifdef __powerpc64__
.hidden ffi_call_LINUX64
.globl ffi_call_LINUX64
.section ".opd","aw"
.align 3
ffi_call_LINUX64:
#ifdef _CALL_LINUX
.quad .L.ffi_call_LINUX64,.TOC.@tocbase,0
.type ffi_call_LINUX64,@function
.text
.L.ffi_call_LINUX64:
#else
.hidden .ffi_call_LINUX64
.globl .ffi_call_LINUX64
.quad .ffi_call_LINUX64,.TOC.@tocbase,0
.size ffi_call_LINUX64,24
.type .ffi_call_LINUX64,@function
.text
.ffi_call_LINUX64:
#endif
.LFB1:
mflr %r0
std %r28, -32(%r1)
std %r29, -24(%r1)
std %r30, -16(%r1)
std %r31, -8(%r1)
std %r0, 16(%r1)
mr %r28, %r1 /* our AP. */
.LCFI0:
stdux %r1, %r1, %r4
mr %r31, %r5 /* flags, */
mr %r30, %r6 /* rvalue, */
mr %r29, %r7 /* function address. */
std %r2, 40(%r1)
/* Call ffi_prep_args64. */
mr %r4, %r1
#ifdef _CALL_LINUX
bl ffi_prep_args64
#else
bl .ffi_prep_args64
#endif
ld %r0, 0(%r29)
ld %r2, 8(%r29)
ld %r11, 16(%r29)
/* Now do the call. */
/* Set up cr1 with bits 4-7 of the flags. */
mtcrf 0x40, %r31
/* Get the address to call into CTR. */
mtctr %r0
/* Load all those argument registers. */
ld %r3, -32-(8*8)(%r28)
ld %r4, -32-(7*8)(%r28)
ld %r5, -32-(6*8)(%r28)
ld %r6, -32-(5*8)(%r28)
bf- 5, 1f
ld %r7, -32-(4*8)(%r28)
ld %r8, -32-(3*8)(%r28)
ld %r9, -32-(2*8)(%r28)
ld %r10, -32-(1*8)(%r28)
1:
/* Load all the FP registers. */
bf- 6, 2f
lfd %f1, -32-(21*8)(%r28)
lfd %f2, -32-(20*8)(%r28)
lfd %f3, -32-(19*8)(%r28)
lfd %f4, -32-(18*8)(%r28)
lfd %f5, -32-(17*8)(%r28)
lfd %f6, -32-(16*8)(%r28)
lfd %f7, -32-(15*8)(%r28)
lfd %f8, -32-(14*8)(%r28)
lfd %f9, -32-(13*8)(%r28)
lfd %f10, -32-(12*8)(%r28)
lfd %f11, -32-(11*8)(%r28)
lfd %f12, -32-(10*8)(%r28)
lfd %f13, -32-(9*8)(%r28)
2:
/* Make the call. */
bctrl
/* This must follow the call immediately, the unwinder
uses this to find out if r2 has been saved or not. */
ld %r2, 40(%r1)
/* Now, deal with the return value. */
mtcrf 0x01, %r31
bt- 30, .Ldone_return_value
bt- 29, .Lfp_return_value
std %r3, 0(%r30)
/* Fall through... */
.Ldone_return_value:
/* Restore the registers we used and return. */
mr %r1, %r28
ld %r0, 16(%r28)
ld %r28, -32(%r1)
mtlr %r0
ld %r29, -24(%r1)
ld %r30, -16(%r1)
ld %r31, -8(%r1)
blr
.Lfp_return_value:
bf 28, .Lfloat_return_value
stfd %f1, 0(%r30)
mtcrf 0x02, %r31 /* cr6 */
bf 27, .Ldone_return_value
stfd %f2, 8(%r30)
b .Ldone_return_value
.Lfloat_return_value:
stfs %f1, 0(%r30)
b .Ldone_return_value
.LFE1:
.long 0
.byte 0,12,0,1,128,4,0,0
#ifdef _CALL_LINUX
.size ffi_call_LINUX64,.-.L.ffi_call_LINUX64
#else
.size .ffi_call_LINUX64,.-.ffi_call_LINUX64
#endif
.section .eh_frame,EH_FRAME_FLAGS,@progbits
.Lframe1:
.4byte .LECIE1-.LSCIE1 # Length of Common Information Entry
.LSCIE1:
.4byte 0x0 # CIE Identifier Tag
.byte 0x1 # CIE Version
.ascii "zR\0" # CIE Augmentation
.uleb128 0x1 # CIE Code Alignment Factor
.sleb128 -8 # CIE Data Alignment Factor
.byte 0x41 # CIE RA Column
.uleb128 0x1 # Augmentation size
.byte 0x14 # FDE Encoding (pcrel udata8)
.byte 0xc # DW_CFA_def_cfa
.uleb128 0x1
.uleb128 0x0
.align 3
.LECIE1:
.LSFDE1:
.4byte .LEFDE1-.LASFDE1 # FDE Length
.LASFDE1:
.4byte .LASFDE1-.Lframe1 # FDE CIE offset
.8byte .LFB1-. # FDE initial location
.8byte .LFE1-.LFB1 # FDE address range
.uleb128 0x0 # Augmentation size
.byte 0x2 # DW_CFA_advance_loc1
.byte .LCFI0-.LFB1
.byte 0xd # DW_CFA_def_cfa_register
.uleb128 0x1c
.byte 0x11 # DW_CFA_offset_extended_sf
.uleb128 0x41
.sleb128 -2
.byte 0x9f # DW_CFA_offset, column 0x1f
.uleb128 0x1
.byte 0x9e # DW_CFA_offset, column 0x1e
.uleb128 0x2
.byte 0x9d # DW_CFA_offset, column 0x1d
.uleb128 0x3
.byte 0x9c # DW_CFA_offset, column 0x1c
.uleb128 0x4
.align 3
.LEFDE1:
#endif
#if defined __ELF__ && defined __linux__
.section .note.GNU-stack,"",@progbits
#endif
|
suryaveeryadav/Python-3.4.0
| 16,330
|
Modules/_ctypes/libffi/src/powerpc/darwin_closure.S
|
/* -----------------------------------------------------------------------
darwin_closure.S - Copyright (c) 2002, 2003, 2004, 2010,
Free Software Foundation, Inc.
based on ppc_closure.S
PowerPC Assembly glue.
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND, EXPRESS
OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR
OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
OTHER DEALINGS IN THE SOFTWARE.
----------------------------------------------------------------------- */
#define LIBFFI_ASM
#define L(x) x
#if defined(__ppc64__)
#define MODE_CHOICE(x, y) y
#else
#define MODE_CHOICE(x, y) x
#endif
#define machine_choice MODE_CHOICE(ppc7400,ppc64)
; Define some pseudo-opcodes for size-independent load & store of GPRs ...
#define lgu MODE_CHOICE(lwzu, ldu)
#define lg MODE_CHOICE(lwz,ld)
#define sg MODE_CHOICE(stw,std)
#define sgu MODE_CHOICE(stwu,stdu)
; ... and the size of GPRs and their storage indicator.
#define GPR_BYTES MODE_CHOICE(4,8)
#define LOG2_GPR_BYTES MODE_CHOICE(2,3) /* log2(GPR_BYTES) */
#define g_long MODE_CHOICE(long, quad) /* usage is ".g_long" */
; From the ABI doc: "Mac OS X ABI Function Call Guide" Version 2009-02-04.
#define LINKAGE_SIZE MODE_CHOICE(24,48)
#define PARAM_AREA MODE_CHOICE(32,64)
#define SAVED_CR_OFFSET MODE_CHOICE(4,8) /* save position for CR */
#define SAVED_LR_OFFSET MODE_CHOICE(8,16) /* save position for lr */
/* WARNING: if ffi_type is changed... here be monsters.
Offsets of items within the result type. */
#define FFI_TYPE_TYPE MODE_CHOICE(6,10)
#define FFI_TYPE_ELEM MODE_CHOICE(8,16)
#define SAVED_FPR_COUNT 13
#define FPR_SIZE 8
/* biggest m64 struct ret is 8GPRS + 13FPRS = 168 bytes - rounded to 16bytes = 176. */
#define RESULT_BYTES MODE_CHOICE(16,176)
; The whole stack frame **MUST** be 16byte-aligned.
#define SAVE_SIZE (((LINKAGE_SIZE+PARAM_AREA+SAVED_FPR_COUNT*FPR_SIZE+RESULT_BYTES)+15) & -16LL)
#define PAD_SIZE (SAVE_SIZE-(LINKAGE_SIZE+PARAM_AREA+SAVED_FPR_COUNT*FPR_SIZE+RESULT_BYTES))
#define PARENT_PARM_BASE (SAVE_SIZE+LINKAGE_SIZE)
#define FP_SAVE_BASE (LINKAGE_SIZE+PARAM_AREA)
#if defined(__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__) && __ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__ >= 1050
; We no longer need the pic symbol stub for Darwin >= 9.
#define BLCLS_HELP _ffi_closure_helper_DARWIN
#define STRUCT_RETVALUE_P _darwin64_struct_ret_by_value_p
#define PASS_STR_FLOATS _darwin64_pass_struct_floats
#undef WANT_STUB
#else
#define BLCLS_HELP L_ffi_closure_helper_DARWIN$stub
#define STRUCT_RETVALUE_P L_darwin64_struct_ret_by_value_p$stub
#define PASS_STR_FLOATS L_darwin64_pass_struct_floats$stub
#define WANT_STUB
#endif
/* m32/m64
The stack layout looks like this:
| Additional params... | | Higher address
~ ~ ~
| Parameters (at least 8*4/8=32/64) | | NUM_GPR_ARG_REGISTERS
|--------------------------------------------| |
| TOC=R2 (AIX) Reserved (Darwin) 4/8 | |
|--------------------------------------------| |
| Reserved 2*4/8 | |
|--------------------------------------------| |
| Space for callee`s LR 4/8 | |
|--------------------------------------------| |
| Saved CR [low word for m64] 4/8 | |
|--------------------------------------------| |
| Current backchain pointer 4/8 |-/ Parent`s frame.
|--------------------------------------------| <+ <<< on entry to
| Result Bytes 16/176 | |
|--------------------------------------------| |
~ padding to 16-byte alignment ~ ~
|--------------------------------------------| |
| NUM_FPR_ARG_REGISTERS slots | |
| here fp13 .. fp1 13*8 | |
|--------------------------------------------| |
| R3..R10 8*4/8=32/64 | | NUM_GPR_ARG_REGISTERS
|--------------------------------------------| |
| TOC=R2 (AIX) Reserved (Darwin) 4/8 | |
|--------------------------------------------| | stack |
| Reserved [compiler,binder] 2*4/8 | | grows |
|--------------------------------------------| | down V
| Space for callees LR 4/8 | |
|--------------------------------------------| | lower addresses
| Saved CR [low word for m64] 4/8 | |
|--------------------------------------------| | stack pointer here
| Current backchain pointer 4/8 |-/ during
|--------------------------------------------| <<< call.
*/
.file "darwin_closure.S"
.machine machine_choice
.text
.globl _ffi_closure_ASM
.align LOG2_GPR_BYTES
_ffi_closure_ASM:
LFB1:
Lstartcode:
mflr r0 /* extract return address */
sg r0,SAVED_LR_OFFSET(r1) /* save the return address */
LCFI0:
sgu r1,-SAVE_SIZE(r1) /* skip over caller save area
keep stack aligned to 16. */
LCFI1:
/* We want to build up an area for the parameters passed
in registers. (both floating point and integer) */
/* Put gpr 3 to gpr 10 in the parents outgoing area...
... the remainder of any params that overflowed the regs will
follow here. */
sg r3, (PARENT_PARM_BASE )(r1)
sg r4, (PARENT_PARM_BASE + GPR_BYTES )(r1)
sg r5, (PARENT_PARM_BASE + GPR_BYTES * 2)(r1)
sg r6, (PARENT_PARM_BASE + GPR_BYTES * 3)(r1)
sg r7, (PARENT_PARM_BASE + GPR_BYTES * 4)(r1)
sg r8, (PARENT_PARM_BASE + GPR_BYTES * 5)(r1)
sg r9, (PARENT_PARM_BASE + GPR_BYTES * 6)(r1)
sg r10,(PARENT_PARM_BASE + GPR_BYTES * 7)(r1)
/* We save fpr 1 to fpr 14 in our own save frame. */
stfd f1, (FP_SAVE_BASE )(r1)
stfd f2, (FP_SAVE_BASE + FPR_SIZE )(r1)
stfd f3, (FP_SAVE_BASE + FPR_SIZE * 2 )(r1)
stfd f4, (FP_SAVE_BASE + FPR_SIZE * 3 )(r1)
stfd f5, (FP_SAVE_BASE + FPR_SIZE * 4 )(r1)
stfd f6, (FP_SAVE_BASE + FPR_SIZE * 5 )(r1)
stfd f7, (FP_SAVE_BASE + FPR_SIZE * 6 )(r1)
stfd f8, (FP_SAVE_BASE + FPR_SIZE * 7 )(r1)
stfd f9, (FP_SAVE_BASE + FPR_SIZE * 8 )(r1)
stfd f10,(FP_SAVE_BASE + FPR_SIZE * 9 )(r1)
stfd f11,(FP_SAVE_BASE + FPR_SIZE * 10)(r1)
stfd f12,(FP_SAVE_BASE + FPR_SIZE * 11)(r1)
stfd f13,(FP_SAVE_BASE + FPR_SIZE * 12)(r1)
/* Set up registers for the routine that actually does the work
get the context pointer from the trampoline. */
mr r3,r11
/* Now load up the pointer to the result storage. */
addi r4,r1,(SAVE_SIZE-RESULT_BYTES)
/* Now load up the pointer to the saved gpr registers. */
addi r5,r1,PARENT_PARM_BASE
/* Now load up the pointer to the saved fpr registers. */
addi r6,r1,FP_SAVE_BASE
/* Make the call. */
bl BLCLS_HELP
/* r3 contains the rtype pointer... save it since we will need
it later. */
sg r3,LINKAGE_SIZE(r1) ; ffi_type * result_type
lg r0,0(r3) ; size => r0
lhz r3,FFI_TYPE_TYPE(r3) ; type => r3
/* The helper will have intercepted struture returns and inserted
the caller`s destination address for structs returned by ref. */
/* r3 contains the return type so use it to look up in a table
so we know how to deal with each type. */
addi r5,r1,(SAVE_SIZE-RESULT_BYTES) /* Otherwise, our return is here. */
bl Lget_ret_type0_addr /* Get pointer to Lret_type0 into LR. */
mflr r4 /* Move to r4. */
slwi r3,r3,4 /* Now multiply return type by 16. */
add r3,r3,r4 /* Add contents of table to table address. */
mtctr r3
bctr /* Jump to it. */
LFE1:
/* Each of the ret_typeX code fragments has to be exactly 16 bytes long
(4 instructions). For cache effectiveness we align to a 16 byte boundary
first. */
.align 4
nop
nop
nop
Lget_ret_type0_addr:
blrl
/* case FFI_TYPE_VOID */
Lret_type0:
b Lfinish
nop
nop
nop
/* case FFI_TYPE_INT */
Lret_type1:
lg r3,0(r5)
b Lfinish
nop
nop
/* case FFI_TYPE_FLOAT */
Lret_type2:
lfs f1,0(r5)
b Lfinish
nop
nop
/* case FFI_TYPE_DOUBLE */
Lret_type3:
lfd f1,0(r5)
b Lfinish
nop
nop
/* case FFI_TYPE_LONGDOUBLE */
Lret_type4:
lfd f1,0(r5)
lfd f2,8(r5)
b Lfinish
nop
/* case FFI_TYPE_UINT8 */
Lret_type5:
#if defined(__ppc64__)
lbz r3,7(r5)
#else
lbz r3,3(r5)
#endif
b Lfinish
nop
nop
/* case FFI_TYPE_SINT8 */
Lret_type6:
#if defined(__ppc64__)
lbz r3,7(r5)
#else
lbz r3,3(r5)
#endif
extsb r3,r3
b Lfinish
nop
/* case FFI_TYPE_UINT16 */
Lret_type7:
#if defined(__ppc64__)
lhz r3,6(r5)
#else
lhz r3,2(r5)
#endif
b Lfinish
nop
nop
/* case FFI_TYPE_SINT16 */
Lret_type8:
#if defined(__ppc64__)
lha r3,6(r5)
#else
lha r3,2(r5)
#endif
b Lfinish
nop
nop
/* case FFI_TYPE_UINT32 */
Lret_type9:
#if defined(__ppc64__)
lwz r3,4(r5)
#else
lwz r3,0(r5)
#endif
b Lfinish
nop
nop
/* case FFI_TYPE_SINT32 */
Lret_type10:
#if defined(__ppc64__)
lwz r3,4(r5)
#else
lwz r3,0(r5)
#endif
b Lfinish
nop
nop
/* case FFI_TYPE_UINT64 */
Lret_type11:
#if defined(__ppc64__)
lg r3,0(r5)
b Lfinish
nop
#else
lwz r3,0(r5)
lwz r4,4(r5)
b Lfinish
#endif
nop
/* case FFI_TYPE_SINT64 */
Lret_type12:
#if defined(__ppc64__)
lg r3,0(r5)
b Lfinish
nop
#else
lwz r3,0(r5)
lwz r4,4(r5)
b Lfinish
#endif
nop
/* case FFI_TYPE_STRUCT */
Lret_type13:
#if defined(__ppc64__)
lg r3,0(r5) ; we need at least this...
cmpi 0,r0,4
bgt Lstructend ; not a special small case
b Lsmallstruct ; see if we need more.
#else
cmpi 0,r0,4
bgt Lfinish ; not by value
lg r3,0(r5)
b Lfinish
#endif
/* case FFI_TYPE_POINTER */
Lret_type14:
lg r3,0(r5)
b Lfinish
nop
nop
#if defined(__ppc64__)
Lsmallstruct:
beq Lfour ; continuation of Lret13.
cmpi 0,r0,3
beq Lfinish ; don`t adjust this - can`t be any floats here...
srdi r3,r3,48
cmpi 0,r0,2
beq Lfinish ; .. or here ..
srdi r3,r3,8
b Lfinish ; .. or here.
Lfour:
lg r6,LINKAGE_SIZE(r1) ; get the result type
lg r6,FFI_TYPE_ELEM(r6) ; elements array pointer
lg r6,0(r6) ; first element
lhz r0,FFI_TYPE_TYPE(r6) ; OK go the type
cmpi 0,r0,2 ; FFI_TYPE_FLOAT
bne Lfourint
lfs f1,0(r5) ; just one float in the struct.
b Lfinish
Lfourint:
srdi r3,r3,32 ; four bytes.
b Lfinish
Lstructend:
lg r3,LINKAGE_SIZE(r1) ; get the result type
bl STRUCT_RETVALUE_P
cmpi 0,r3,0
beq Lfinish ; nope.
/* Recover a pointer to the results. */
addi r11,r1,(SAVE_SIZE-RESULT_BYTES)
lg r3,0(r11) ; we need at least this...
lg r4,8(r11)
cmpi 0,r0,16
beq Lfinish ; special case 16 bytes we don't consider floats.
/* OK, frustratingly, the process of saving the struct to mem might have
messed with the FPRs, so we have to re-load them :(.
We`ll use our FPRs space again - calling:
void darwin64_pass_struct_floats (ffi_type *s, char *src,
unsigned *nfpr, double **fprs)
We`ll temporarily pinch the first two slots of the param area for local
vars used by the routine. */
xor r6,r6,r6
addi r5,r1,PARENT_PARM_BASE ; some space
sg r6,0(r5) ; *nfpr zeroed.
addi r6,r5,8 ; **fprs
addi r3,r1,FP_SAVE_BASE ; pointer to FPRs space
sg r3,0(r6)
mr r4,r11 ; the struct is here...
lg r3,LINKAGE_SIZE(r1) ; ffi_type * result_type.
bl PASS_STR_FLOATS ; get struct floats into FPR save space.
/* See if we used any floats */
lwz r0,(SAVE_SIZE-RESULT_BYTES)(r1)
cmpi 0,r0,0
beq Lstructints ; nope.
/* OK load `em up... */
lfd f1, (FP_SAVE_BASE )(r1)
lfd f2, (FP_SAVE_BASE + FPR_SIZE )(r1)
lfd f3, (FP_SAVE_BASE + FPR_SIZE * 2 )(r1)
lfd f4, (FP_SAVE_BASE + FPR_SIZE * 3 )(r1)
lfd f5, (FP_SAVE_BASE + FPR_SIZE * 4 )(r1)
lfd f6, (FP_SAVE_BASE + FPR_SIZE * 5 )(r1)
lfd f7, (FP_SAVE_BASE + FPR_SIZE * 6 )(r1)
lfd f8, (FP_SAVE_BASE + FPR_SIZE * 7 )(r1)
lfd f9, (FP_SAVE_BASE + FPR_SIZE * 8 )(r1)
lfd f10,(FP_SAVE_BASE + FPR_SIZE * 9 )(r1)
lfd f11,(FP_SAVE_BASE + FPR_SIZE * 10)(r1)
lfd f12,(FP_SAVE_BASE + FPR_SIZE * 11)(r1)
lfd f13,(FP_SAVE_BASE + FPR_SIZE * 12)(r1)
/* point back at our saved struct. */
Lstructints:
addi r11,r1,(SAVE_SIZE-RESULT_BYTES)
lg r3,0(r11) ; we end up picking the
lg r4,8(r11) ; first two again.
lg r5,16(r11)
lg r6,24(r11)
lg r7,32(r11)
lg r8,40(r11)
lg r9,48(r11)
lg r10,56(r11)
#endif
/* case done */
Lfinish:
addi r1,r1,SAVE_SIZE /* Restore stack pointer. */
lg r0,SAVED_LR_OFFSET(r1) /* Get return address. */
mtlr r0 /* Reset link register. */
blr
Lendcode:
.align 1
/* END(ffi_closure_ASM) */
/* EH frame stuff. */
#define EH_DATA_ALIGN_FACT MODE_CHOICE(0x7c,0x78)
/* 176, 400 */
#define EH_FRAME_OFFSETA MODE_CHOICE(176,0x90)
#define EH_FRAME_OFFSETB MODE_CHOICE(1,3)
.static_data
.align LOG2_GPR_BYTES
LLFB1$non_lazy_ptr:
.g_long Lstartcode
.section __TEXT,__eh_frame,coalesced,no_toc+strip_static_syms+live_support
EH_frame1:
.set L$set$0,LECIE1-LSCIE1
.long L$set$0 ; Length of Common Information Entry
LSCIE1:
.long 0x0 ; CIE Identifier Tag
.byte 0x1 ; CIE Version
.ascii "zR\0" ; CIE Augmentation
.byte 0x1 ; uleb128 0x1; CIE Code Alignment Factor
.byte EH_DATA_ALIGN_FACT ; sleb128 -4; CIE Data Alignment Factor
.byte 0x41 ; CIE RA Column
.byte 0x1 ; uleb128 0x1; Augmentation size
.byte 0x10 ; FDE Encoding (indirect pcrel)
.byte 0xc ; DW_CFA_def_cfa
.byte 0x1 ; uleb128 0x1
.byte 0x0 ; uleb128 0x0
.align LOG2_GPR_BYTES
LECIE1:
.globl _ffi_closure_ASM.eh
_ffi_closure_ASM.eh:
LSFDE1:
.set L$set$1,LEFDE1-LASFDE1
.long L$set$1 ; FDE Length
LASFDE1:
.long LASFDE1-EH_frame1 ; FDE CIE offset
.g_long LLFB1$non_lazy_ptr-. ; FDE initial location
.set L$set$3,LFE1-Lstartcode
.g_long L$set$3 ; FDE address range
.byte 0x0 ; uleb128 0x0; Augmentation size
.byte 0x4 ; DW_CFA_advance_loc4
.set L$set$3,LCFI1-LCFI0
.long L$set$3
.byte 0xe ; DW_CFA_def_cfa_offset
.byte EH_FRAME_OFFSETA,EH_FRAME_OFFSETB ; uleb128 176,1/190,3
.byte 0x4 ; DW_CFA_advance_loc4
.set L$set$4,LCFI0-Lstartcode
.long L$set$4
.byte 0x11 ; DW_CFA_offset_extended_sf
.byte 0x41 ; uleb128 0x41
.byte 0x7e ; sleb128 -2
.align LOG2_GPR_BYTES
LEFDE1:
.align 1
#ifdef WANT_STUB
.section __TEXT,__picsymbolstub1,symbol_stubs,pure_instructions,32
.align 5
L_ffi_closure_helper_DARWIN$stub:
.indirect_symbol _ffi_closure_helper_DARWIN
mflr r0
bcl 20,31,"L00000000001$spb"
"L00000000001$spb":
mflr r11
addis r11,r11,ha16(L_ffi_closure_helper_DARWIN$lazy_ptr-"L00000000001$spb")
mtlr r0
lwzu r12,lo16(L_ffi_closure_helper_DARWIN$lazy_ptr-"L00000000001$spb")(r11)
mtctr r12
bctr
.lazy_symbol_pointer
L_ffi_closure_helper_DARWIN$lazy_ptr:
.indirect_symbol _ffi_closure_helper_DARWIN
.g_long dyld_stub_binding_helper
#if defined(__ppc64__)
.section __TEXT,__picsymbolstub1,symbol_stubs,pure_instructions,32
.align 5
L_darwin64_struct_ret_by_value_p$stub:
.indirect_symbol _darwin64_struct_ret_by_value_p
mflr r0
bcl 20,31,"L00000000002$spb"
"L00000000002$spb":
mflr r11
addis r11,r11,ha16(L_darwin64_struct_ret_by_value_p$lazy_ptr-"L00000000002$spb")
mtlr r0
lwzu r12,lo16(L_darwin64_struct_ret_by_value_p$lazy_ptr-"L00000000002$spb")(r11)
mtctr r12
bctr
.lazy_symbol_pointer
L_darwin64_struct_ret_by_value_p$lazy_ptr:
.indirect_symbol _darwin64_struct_ret_by_value_p
.g_long dyld_stub_binding_helper
.section __TEXT,__picsymbolstub1,symbol_stubs,pure_instructions,32
.align 5
L_darwin64_pass_struct_floats$stub:
.indirect_symbol _darwin64_pass_struct_floats
mflr r0
bcl 20,31,"L00000000003$spb"
"L00000000003$spb":
mflr r11
addis r11,r11,ha16(L_darwin64_pass_struct_floats$lazy_ptr-"L00000000003$spb")
mtlr r0
lwzu r12,lo16(L_darwin64_pass_struct_floats$lazy_ptr-"L00000000003$spb")(r11)
mtctr r12
bctr
.lazy_symbol_pointer
L_darwin64_pass_struct_floats$lazy_ptr:
.indirect_symbol _darwin64_pass_struct_floats
.g_long dyld_stub_binding_helper
# endif
#endif
|
suryaveeryadav/Python-3.4.0
| 9,335
|
Modules/_ctypes/libffi/src/x86/win64.S
|
#define LIBFFI_ASM
#include <fficonfig.h>
#include <ffi.h>
/* Constants for ffi_call_win64 */
#define STACK 0
#define PREP_ARGS_FN 32
#define ECIF 40
#define CIF_BYTES 48
#define CIF_FLAGS 56
#define RVALUE 64
#define FN 72
/* ffi_call_win64 (void (*prep_args_fn)(char *, extended_cif *),
extended_cif *ecif, unsigned bytes, unsigned flags,
unsigned *rvalue, void (*fn)());
*/
#ifdef _MSC_VER
PUBLIC ffi_call_win64
EXTRN __chkstk:NEAR
EXTRN ffi_closure_win64_inner:NEAR
_TEXT SEGMENT
;;; ffi_closure_win64 will be called with these registers set:
;;; rax points to 'closure'
;;; r11 contains a bit mask that specifies which of the
;;; first four parameters are float or double
;;;
;;; It must move the parameters passed in registers to their stack location,
;;; call ffi_closure_win64_inner for the actual work, then return the result.
;;;
ffi_closure_win64 PROC FRAME
;; copy register arguments onto stack
test r11, 1
jne first_is_float
mov QWORD PTR [rsp+8], rcx
jmp second
first_is_float:
movlpd QWORD PTR [rsp+8], xmm0
second:
test r11, 2
jne second_is_float
mov QWORD PTR [rsp+16], rdx
jmp third
second_is_float:
movlpd QWORD PTR [rsp+16], xmm1
third:
test r11, 4
jne third_is_float
mov QWORD PTR [rsp+24], r8
jmp fourth
third_is_float:
movlpd QWORD PTR [rsp+24], xmm2
fourth:
test r11, 8
jne fourth_is_float
mov QWORD PTR [rsp+32], r9
jmp done
fourth_is_float:
movlpd QWORD PTR [rsp+32], xmm3
done:
.ALLOCSTACK 40
sub rsp, 40
.ENDPROLOG
mov rcx, rax ; context is first parameter
mov rdx, rsp ; stack is second parameter
add rdx, 48 ; point to start of arguments
mov rax, ffi_closure_win64_inner
call rax ; call the real closure function
add rsp, 40
movd xmm0, rax ; If the closure returned a float,
; ffi_closure_win64_inner wrote it to rax
ret 0
ffi_closure_win64 ENDP
ffi_call_win64 PROC FRAME
;; copy registers onto stack
mov QWORD PTR [rsp+32], r9
mov QWORD PTR [rsp+24], r8
mov QWORD PTR [rsp+16], rdx
mov QWORD PTR [rsp+8], rcx
.PUSHREG rbp
push rbp
.ALLOCSTACK 48
sub rsp, 48 ; 00000030H
.SETFRAME rbp, 32
lea rbp, QWORD PTR [rsp+32]
.ENDPROLOG
mov eax, DWORD PTR CIF_BYTES[rbp]
add rax, 15
and rax, -16
call __chkstk
sub rsp, rax
lea rax, QWORD PTR [rsp+32]
mov QWORD PTR STACK[rbp], rax
mov rdx, QWORD PTR ECIF[rbp]
mov rcx, QWORD PTR STACK[rbp]
call QWORD PTR PREP_ARGS_FN[rbp]
mov rsp, QWORD PTR STACK[rbp]
movlpd xmm3, QWORD PTR [rsp+24]
movd r9, xmm3
movlpd xmm2, QWORD PTR [rsp+16]
movd r8, xmm2
movlpd xmm1, QWORD PTR [rsp+8]
movd rdx, xmm1
movlpd xmm0, QWORD PTR [rsp]
movd rcx, xmm0
call QWORD PTR FN[rbp]
ret_struct4b$:
cmp DWORD PTR CIF_FLAGS[rbp], FFI_TYPE_SMALL_STRUCT_4B
jne ret_struct2b$
mov rcx, QWORD PTR RVALUE[rbp]
mov DWORD PTR [rcx], eax
jmp ret_void$
ret_struct2b$:
cmp DWORD PTR CIF_FLAGS[rbp], FFI_TYPE_SMALL_STRUCT_2B
jne ret_struct1b$
mov rcx, QWORD PTR RVALUE[rbp]
mov WORD PTR [rcx], ax
jmp ret_void$
ret_struct1b$:
cmp DWORD PTR CIF_FLAGS[rbp], FFI_TYPE_SMALL_STRUCT_1B
jne ret_uint8$
mov rcx, QWORD PTR RVALUE[rbp]
mov BYTE PTR [rcx], al
jmp ret_void$
ret_uint8$:
cmp DWORD PTR CIF_FLAGS[rbp], FFI_TYPE_UINT8
jne ret_sint8$
mov rcx, QWORD PTR RVALUE[rbp]
movzx rax, al
mov QWORD PTR [rcx], rax
jmp ret_void$
ret_sint8$:
cmp DWORD PTR CIF_FLAGS[rbp], FFI_TYPE_SINT8
jne ret_uint16$
mov rcx, QWORD PTR RVALUE[rbp]
movsx rax, al
mov QWORD PTR [rcx], rax
jmp ret_void$
ret_uint16$:
cmp DWORD PTR CIF_FLAGS[rbp], FFI_TYPE_UINT16
jne ret_sint16$
mov rcx, QWORD PTR RVALUE[rbp]
movzx rax, ax
mov QWORD PTR [rcx], rax
jmp SHORT ret_void$
ret_sint16$:
cmp DWORD PTR CIF_FLAGS[rbp], FFI_TYPE_SINT16
jne ret_uint32$
mov rcx, QWORD PTR RVALUE[rbp]
movsx rax, ax
mov QWORD PTR [rcx], rax
jmp SHORT ret_void$
ret_uint32$:
cmp DWORD PTR CIF_FLAGS[rbp], FFI_TYPE_UINT32
jne ret_sint32$
mov rcx, QWORD PTR RVALUE[rbp]
mov eax, eax
mov QWORD PTR [rcx], rax
jmp SHORT ret_void$
ret_sint32$:
cmp DWORD PTR CIF_FLAGS[rbp], FFI_TYPE_SINT32
jne ret_float$
mov rcx, QWORD PTR RVALUE[rbp]
cdqe
mov QWORD PTR [rcx], rax
jmp SHORT ret_void$
ret_float$:
cmp DWORD PTR CIF_FLAGS[rbp], FFI_TYPE_FLOAT
jne SHORT ret_double$
mov rax, QWORD PTR RVALUE[rbp]
movss DWORD PTR [rax], xmm0
jmp SHORT ret_void$
ret_double$:
cmp DWORD PTR CIF_FLAGS[rbp], FFI_TYPE_DOUBLE
jne SHORT ret_sint64$
mov rax, QWORD PTR RVALUE[rbp]
movlpd QWORD PTR [rax], xmm0
jmp SHORT ret_void$
ret_sint64$:
cmp DWORD PTR CIF_FLAGS[rbp], FFI_TYPE_SINT64
jne ret_void$
mov rcx, QWORD PTR RVALUE[rbp]
mov QWORD PTR [rcx], rax
jmp SHORT ret_void$
ret_void$:
xor rax, rax
lea rsp, QWORD PTR [rbp+16]
pop rbp
ret 0
ffi_call_win64 ENDP
_TEXT ENDS
END
#else
#ifdef SYMBOL_UNDERSCORE
#define SYMBOL_NAME(name) _##name
#else
#define SYMBOL_NAME(name) name
#endif
.text
.extern SYMBOL_NAME(ffi_closure_win64_inner)
# ffi_closure_win64 will be called with these registers set:
# rax points to 'closure'
# r11 contains a bit mask that specifies which of the
# first four parameters are float or double
#
# It must move the parameters passed in registers to their stack location,
# call ffi_closure_win64_inner for the actual work, then return the result.
#
.balign 16
.globl SYMBOL_NAME(ffi_closure_win64)
SYMBOL_NAME(ffi_closure_win64):
# copy register arguments onto stack
test $1,%r11
jne .Lfirst_is_float
mov %rcx, 8(%rsp)
jmp .Lsecond
.Lfirst_is_float:
movlpd %xmm0, 8(%rsp)
.Lsecond:
test $2, %r11
jne .Lsecond_is_float
mov %rdx, 16(%rsp)
jmp .Lthird
.Lsecond_is_float:
movlpd %xmm1, 16(%rsp)
.Lthird:
test $4, %r11
jne .Lthird_is_float
mov %r8,24(%rsp)
jmp .Lfourth
.Lthird_is_float:
movlpd %xmm2, 24(%rsp)
.Lfourth:
test $8, %r11
jne .Lfourth_is_float
mov %r9, 32(%rsp)
jmp .Ldone
.Lfourth_is_float:
movlpd %xmm3, 32(%rsp)
.Ldone:
#.ALLOCSTACK 40
sub $40, %rsp
#.ENDPROLOG
mov %rax, %rcx # context is first parameter
mov %rsp, %rdx # stack is second parameter
add $48, %rdx # point to start of arguments
mov $SYMBOL_NAME(ffi_closure_win64_inner), %rax
callq *%rax # call the real closure function
add $40, %rsp
movq %rax, %xmm0 # If the closure returned a float,
# ffi_closure_win64_inner wrote it to rax
retq
.ffi_closure_win64_end:
.balign 16
.globl SYMBOL_NAME(ffi_call_win64)
SYMBOL_NAME(ffi_call_win64):
# copy registers onto stack
mov %r9,32(%rsp)
mov %r8,24(%rsp)
mov %rdx,16(%rsp)
mov %rcx,8(%rsp)
#.PUSHREG rbp
push %rbp
#.ALLOCSTACK 48
sub $48,%rsp
#.SETFRAME rbp, 32
lea 32(%rsp),%rbp
#.ENDPROLOG
mov CIF_BYTES(%rbp),%eax
add $15, %rax
and $-16, %rax
cmpq $0x1000, %rax
jb Lch_done
Lch_probe:
subq $0x1000,%rsp
orl $0x0, (%rsp)
subq $0x1000,%rax
cmpq $0x1000,%rax
ja Lch_probe
Lch_done:
subq %rax, %rsp
orl $0x0, (%rsp)
lea 32(%rsp), %rax
mov %rax, STACK(%rbp)
mov ECIF(%rbp), %rdx
mov STACK(%rbp), %rcx
callq *PREP_ARGS_FN(%rbp)
mov STACK(%rbp), %rsp
movlpd 24(%rsp), %xmm3
movd %xmm3, %r9
movlpd 16(%rsp), %xmm2
movd %xmm2, %r8
movlpd 8(%rsp), %xmm1
movd %xmm1, %rdx
movlpd (%rsp), %xmm0
movd %xmm0, %rcx
callq *FN(%rbp)
.Lret_struct4b:
cmpl $FFI_TYPE_SMALL_STRUCT_4B, CIF_FLAGS(%rbp)
jne .Lret_struct2b
mov RVALUE(%rbp), %rcx
mov %eax, (%rcx)
jmp .Lret_void
.Lret_struct2b:
cmpl $FFI_TYPE_SMALL_STRUCT_2B, CIF_FLAGS(%rbp)
jne .Lret_struct1b
mov RVALUE(%rbp), %rcx
mov %ax, (%rcx)
jmp .Lret_void
.Lret_struct1b:
cmpl $FFI_TYPE_SMALL_STRUCT_1B, CIF_FLAGS(%rbp)
jne .Lret_uint8
mov RVALUE(%rbp), %rcx
mov %al, (%rcx)
jmp .Lret_void
.Lret_uint8:
cmpl $FFI_TYPE_UINT8, CIF_FLAGS(%rbp)
jne .Lret_sint8
mov RVALUE(%rbp), %rcx
movzbq %al, %rax
movq %rax, (%rcx)
jmp .Lret_void
.Lret_sint8:
cmpl $FFI_TYPE_SINT8, CIF_FLAGS(%rbp)
jne .Lret_uint16
mov RVALUE(%rbp), %rcx
movsbq %al, %rax
movq %rax, (%rcx)
jmp .Lret_void
.Lret_uint16:
cmpl $FFI_TYPE_UINT16, CIF_FLAGS(%rbp)
jne .Lret_sint16
mov RVALUE(%rbp), %rcx
movzwq %ax, %rax
movq %rax, (%rcx)
jmp .Lret_void
.Lret_sint16:
cmpl $FFI_TYPE_SINT16, CIF_FLAGS(%rbp)
jne .Lret_uint32
mov RVALUE(%rbp), %rcx
movswq %ax, %rax
movq %rax, (%rcx)
jmp .Lret_void
.Lret_uint32:
cmpl $FFI_TYPE_UINT32, CIF_FLAGS(%rbp)
jne .Lret_sint32
mov RVALUE(%rbp), %rcx
movl %eax, %eax
movq %rax, (%rcx)
jmp .Lret_void
.Lret_sint32:
cmpl $FFI_TYPE_SINT32, CIF_FLAGS(%rbp)
jne .Lret_float
mov RVALUE(%rbp), %rcx
cltq
movq %rax, (%rcx)
jmp .Lret_void
.Lret_float:
cmpl $FFI_TYPE_FLOAT, CIF_FLAGS(%rbp)
jne .Lret_double
mov RVALUE(%rbp), %rax
movss %xmm0, (%rax)
jmp .Lret_void
.Lret_double:
cmpl $FFI_TYPE_DOUBLE, CIF_FLAGS(%rbp)
jne .Lret_sint64
mov RVALUE(%rbp), %rax
movlpd %xmm0, (%rax)
jmp .Lret_void
.Lret_sint64:
cmpl $FFI_TYPE_SINT64, CIF_FLAGS(%rbp)
jne .Lret_void
mov RVALUE(%rbp), %rcx
mov %rax, (%rcx)
jmp .Lret_void
.Lret_void:
xor %rax, %rax
lea 16(%rbp), %rsp
pop %rbp
retq
.ffi_call_win64_end:
#endif /* !_MSC_VER */
|
suryaveeryadav/Python-3.4.0
| 11,483
|
Modules/_ctypes/libffi/src/x86/freebsd.S
|
/* -----------------------------------------------------------------------
freebsd.S - Copyright (c) 1996, 1998, 2001, 2002, 2003, 2005 Red Hat, Inc.
Copyright (c) 2008 Björn König
X86 Foreign Function Interface for FreeBSD
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
DEALINGS IN THE SOFTWARE.
----------------------------------------------------------------------- */
#ifndef __x86_64__
#define LIBFFI_ASM
#include <fficonfig.h>
#include <ffi.h>
.text
.globl ffi_prep_args
.align 4
.globl ffi_call_SYSV
.type ffi_call_SYSV,@function
ffi_call_SYSV:
.LFB1:
pushl %ebp
.LCFI0:
movl %esp,%ebp
.LCFI1:
/* Make room for all of the new args. */
movl 16(%ebp),%ecx
subl %ecx,%esp
movl %esp,%eax
/* Place all of the ffi_prep_args in position */
pushl 12(%ebp)
pushl %eax
call *8(%ebp)
/* Return stack to previous state and call the function */
addl $8,%esp
call *28(%ebp)
/* Load %ecx with the return type code */
movl 20(%ebp),%ecx
/* Protect %esi. We're going to pop it in the epilogue. */
pushl %esi
/* If the return value pointer is NULL, assume no return value. */
cmpl $0,24(%ebp)
jne 0f
/* Even if there is no space for the return value, we are
obliged to handle floating-point values. */
cmpl $FFI_TYPE_FLOAT,%ecx
jne noretval
fstp %st(0)
jmp epilogue
0:
call 1f
.Lstore_table:
.long noretval-.Lstore_table /* FFI_TYPE_VOID */
.long retint-.Lstore_table /* FFI_TYPE_INT */
.long retfloat-.Lstore_table /* FFI_TYPE_FLOAT */
.long retdouble-.Lstore_table /* FFI_TYPE_DOUBLE */
.long retlongdouble-.Lstore_table /* FFI_TYPE_LONGDOUBLE */
.long retuint8-.Lstore_table /* FFI_TYPE_UINT8 */
.long retsint8-.Lstore_table /* FFI_TYPE_SINT8 */
.long retuint16-.Lstore_table /* FFI_TYPE_UINT16 */
.long retsint16-.Lstore_table /* FFI_TYPE_SINT16 */
.long retint-.Lstore_table /* FFI_TYPE_UINT32 */
.long retint-.Lstore_table /* FFI_TYPE_SINT32 */
.long retint64-.Lstore_table /* FFI_TYPE_UINT64 */
.long retint64-.Lstore_table /* FFI_TYPE_SINT64 */
.long retstruct-.Lstore_table /* FFI_TYPE_STRUCT */
.long retint-.Lstore_table /* FFI_TYPE_POINTER */
.long retstruct1b-.Lstore_table /* FFI_TYPE_SMALL_STRUCT_1B */
.long retstruct2b-.Lstore_table /* FFI_TYPE_SMALL_STRUCT_2B */
1:
pop %esi
add (%esi, %ecx, 4), %esi
jmp *%esi
/* Sign/zero extend as appropriate. */
retsint8:
movsbl %al, %eax
jmp retint
retsint16:
movswl %ax, %eax
jmp retint
retuint8:
movzbl %al, %eax
jmp retint
retuint16:
movzwl %ax, %eax
jmp retint
retfloat:
/* Load %ecx with the pointer to storage for the return value */
movl 24(%ebp),%ecx
fstps (%ecx)
jmp epilogue
retdouble:
/* Load %ecx with the pointer to storage for the return value */
movl 24(%ebp),%ecx
fstpl (%ecx)
jmp epilogue
retlongdouble:
/* Load %ecx with the pointer to storage for the return value */
movl 24(%ebp),%ecx
fstpt (%ecx)
jmp epilogue
retint64:
/* Load %ecx with the pointer to storage for the return value */
movl 24(%ebp),%ecx
movl %eax,0(%ecx)
movl %edx,4(%ecx)
jmp epilogue
retstruct1b:
/* Load %ecx with the pointer to storage for the return value */
movl 24(%ebp),%ecx
movb %al,0(%ecx)
jmp epilogue
retstruct2b:
/* Load %ecx with the pointer to storage for the return value */
movl 24(%ebp),%ecx
movw %ax,0(%ecx)
jmp epilogue
retint:
/* Load %ecx with the pointer to storage for the return value */
movl 24(%ebp),%ecx
movl %eax,0(%ecx)
retstruct:
/* Nothing to do! */
noretval:
epilogue:
popl %esi
movl %ebp,%esp
popl %ebp
ret
.LFE1:
.ffi_call_SYSV_end:
.size ffi_call_SYSV,.ffi_call_SYSV_end-ffi_call_SYSV
.align 4
FFI_HIDDEN (ffi_closure_SYSV)
.globl ffi_closure_SYSV
.type ffi_closure_SYSV, @function
ffi_closure_SYSV:
.LFB2:
pushl %ebp
.LCFI2:
movl %esp, %ebp
.LCFI3:
subl $40, %esp
leal -24(%ebp), %edx
movl %edx, -12(%ebp) /* resp */
leal 8(%ebp), %edx
movl %edx, 4(%esp) /* args = __builtin_dwarf_cfa () */
leal -12(%ebp), %edx
movl %edx, (%esp) /* &resp */
#if defined HAVE_HIDDEN_VISIBILITY_ATTRIBUTE || !defined __PIC__
call ffi_closure_SYSV_inner
#else
movl %ebx, 8(%esp)
.LCFI7:
call 1f
1: popl %ebx
addl $_GLOBAL_OFFSET_TABLE_+[.-1b], %ebx
call ffi_closure_SYSV_inner@PLT
movl 8(%esp), %ebx
#endif
movl -12(%ebp), %ecx
cmpl $FFI_TYPE_INT, %eax
je .Lcls_retint
/* Handle FFI_TYPE_UINT8, FFI_TYPE_SINT8, FFI_TYPE_UINT16,
FFI_TYPE_SINT16, FFI_TYPE_UINT32, FFI_TYPE_SINT32. */
cmpl $FFI_TYPE_UINT64, %eax
jge 0f
cmpl $FFI_TYPE_UINT8, %eax
jge .Lcls_retint
0: cmpl $FFI_TYPE_FLOAT, %eax
je .Lcls_retfloat
cmpl $FFI_TYPE_DOUBLE, %eax
je .Lcls_retdouble
cmpl $FFI_TYPE_LONGDOUBLE, %eax
je .Lcls_retldouble
cmpl $FFI_TYPE_SINT64, %eax
je .Lcls_retllong
cmpl $FFI_TYPE_SMALL_STRUCT_1B, %eax
je .Lcls_retstruct1b
cmpl $FFI_TYPE_SMALL_STRUCT_2B, %eax
je .Lcls_retstruct2b
cmpl $FFI_TYPE_STRUCT, %eax
je .Lcls_retstruct
.Lcls_epilogue:
movl %ebp, %esp
popl %ebp
ret
.Lcls_retint:
movl (%ecx), %eax
jmp .Lcls_epilogue
.Lcls_retfloat:
flds (%ecx)
jmp .Lcls_epilogue
.Lcls_retdouble:
fldl (%ecx)
jmp .Lcls_epilogue
.Lcls_retldouble:
fldt (%ecx)
jmp .Lcls_epilogue
.Lcls_retllong:
movl (%ecx), %eax
movl 4(%ecx), %edx
jmp .Lcls_epilogue
.Lcls_retstruct1b:
movsbl (%ecx), %eax
jmp .Lcls_epilogue
.Lcls_retstruct2b:
movswl (%ecx), %eax
jmp .Lcls_epilogue
.Lcls_retstruct:
movl %ebp, %esp
popl %ebp
ret $4
.LFE2:
.size ffi_closure_SYSV, .-ffi_closure_SYSV
#if !FFI_NO_RAW_API
#define RAW_CLOSURE_CIF_OFFSET ((FFI_TRAMPOLINE_SIZE + 3) & ~3)
#define RAW_CLOSURE_FUN_OFFSET (RAW_CLOSURE_CIF_OFFSET + 4)
#define RAW_CLOSURE_USER_DATA_OFFSET (RAW_CLOSURE_FUN_OFFSET + 4)
#define CIF_FLAGS_OFFSET 20
.align 4
FFI_HIDDEN (ffi_closure_raw_SYSV)
.globl ffi_closure_raw_SYSV
.type ffi_closure_raw_SYSV, @function
ffi_closure_raw_SYSV:
.LFB3:
pushl %ebp
.LCFI4:
movl %esp, %ebp
.LCFI5:
pushl %esi
.LCFI6:
subl $36, %esp
movl RAW_CLOSURE_CIF_OFFSET(%eax), %esi /* closure->cif */
movl RAW_CLOSURE_USER_DATA_OFFSET(%eax), %edx /* closure->user_data */
movl %edx, 12(%esp) /* user_data */
leal 8(%ebp), %edx /* __builtin_dwarf_cfa () */
movl %edx, 8(%esp) /* raw_args */
leal -24(%ebp), %edx
movl %edx, 4(%esp) /* &res */
movl %esi, (%esp) /* cif */
call *RAW_CLOSURE_FUN_OFFSET(%eax) /* closure->fun */
movl CIF_FLAGS_OFFSET(%esi), %eax /* rtype */
cmpl $FFI_TYPE_INT, %eax
je .Lrcls_retint
/* Handle FFI_TYPE_UINT8, FFI_TYPE_SINT8, FFI_TYPE_UINT16,
FFI_TYPE_SINT16, FFI_TYPE_UINT32, FFI_TYPE_SINT32. */
cmpl $FFI_TYPE_UINT64, %eax
jge 0f
cmpl $FFI_TYPE_UINT8, %eax
jge .Lrcls_retint
0:
cmpl $FFI_TYPE_FLOAT, %eax
je .Lrcls_retfloat
cmpl $FFI_TYPE_DOUBLE, %eax
je .Lrcls_retdouble
cmpl $FFI_TYPE_LONGDOUBLE, %eax
je .Lrcls_retldouble
cmpl $FFI_TYPE_SINT64, %eax
je .Lrcls_retllong
.Lrcls_epilogue:
addl $36, %esp
popl %esi
popl %ebp
ret
.Lrcls_retint:
movl -24(%ebp), %eax
jmp .Lrcls_epilogue
.Lrcls_retfloat:
flds -24(%ebp)
jmp .Lrcls_epilogue
.Lrcls_retdouble:
fldl -24(%ebp)
jmp .Lrcls_epilogue
.Lrcls_retldouble:
fldt -24(%ebp)
jmp .Lrcls_epilogue
.Lrcls_retllong:
movl -24(%ebp), %eax
movl -20(%ebp), %edx
jmp .Lrcls_epilogue
.LFE3:
.size ffi_closure_raw_SYSV, .-ffi_closure_raw_SYSV
#endif
.section .eh_frame,EH_FRAME_FLAGS,@progbits
.Lframe1:
.long .LECIE1-.LSCIE1 /* Length of Common Information Entry */
.LSCIE1:
.long 0x0 /* CIE Identifier Tag */
.byte 0x1 /* CIE Version */
#ifdef __PIC__
.ascii "zR\0" /* CIE Augmentation */
#else
.ascii "\0" /* CIE Augmentation */
#endif
.byte 0x1 /* .uleb128 0x1; CIE Code Alignment Factor */
.byte 0x7c /* .sleb128 -4; CIE Data Alignment Factor */
.byte 0x8 /* CIE RA Column */
#ifdef __PIC__
.byte 0x1 /* .uleb128 0x1; Augmentation size */
.byte 0x1b /* FDE Encoding (pcrel sdata4) */
#endif
.byte 0xc /* DW_CFA_def_cfa */
.byte 0x4 /* .uleb128 0x4 */
.byte 0x4 /* .uleb128 0x4 */
.byte 0x88 /* DW_CFA_offset, column 0x8 */
.byte 0x1 /* .uleb128 0x1 */
.align 4
.LECIE1:
.LSFDE1:
.long .LEFDE1-.LASFDE1 /* FDE Length */
.LASFDE1:
.long .LASFDE1-.Lframe1 /* FDE CIE offset */
#ifdef __PIC__
.long .LFB1-. /* FDE initial location */
#else
.long .LFB1 /* FDE initial location */
#endif
.long .LFE1-.LFB1 /* FDE address range */
#ifdef __PIC__
.byte 0x0 /* .uleb128 0x0; Augmentation size */
#endif
.byte 0x4 /* DW_CFA_advance_loc4 */
.long .LCFI0-.LFB1
.byte 0xe /* DW_CFA_def_cfa_offset */
.byte 0x8 /* .uleb128 0x8 */
.byte 0x85 /* DW_CFA_offset, column 0x5 */
.byte 0x2 /* .uleb128 0x2 */
.byte 0x4 /* DW_CFA_advance_loc4 */
.long .LCFI1-.LCFI0
.byte 0xd /* DW_CFA_def_cfa_register */
.byte 0x5 /* .uleb128 0x5 */
.align 4
.LEFDE1:
.LSFDE2:
.long .LEFDE2-.LASFDE2 /* FDE Length */
.LASFDE2:
.long .LASFDE2-.Lframe1 /* FDE CIE offset */
#ifdef __PIC__
.long .LFB2-. /* FDE initial location */
#else
.long .LFB2
#endif
.long .LFE2-.LFB2 /* FDE address range */
#ifdef __PIC__
.byte 0x0 /* .uleb128 0x0; Augmentation size */
#endif
.byte 0x4 /* DW_CFA_advance_loc4 */
.long .LCFI2-.LFB2
.byte 0xe /* DW_CFA_def_cfa_offset */
.byte 0x8 /* .uleb128 0x8 */
.byte 0x85 /* DW_CFA_offset, column 0x5 */
.byte 0x2 /* .uleb128 0x2 */
.byte 0x4 /* DW_CFA_advance_loc4 */
.long .LCFI3-.LCFI2
.byte 0xd /* DW_CFA_def_cfa_register */
.byte 0x5 /* .uleb128 0x5 */
#if !defined HAVE_HIDDEN_VISIBILITY_ATTRIBUTE && defined __PIC__
.byte 0x4 /* DW_CFA_advance_loc4 */
.long .LCFI7-.LCFI3
.byte 0x83 /* DW_CFA_offset, column 0x3 */
.byte 0xa /* .uleb128 0xa */
#endif
.align 4
.LEFDE2:
#if !FFI_NO_RAW_API
.LSFDE3:
.long .LEFDE3-.LASFDE3 /* FDE Length */
.LASFDE3:
.long .LASFDE3-.Lframe1 /* FDE CIE offset */
#ifdef __PIC__
.long .LFB3-. /* FDE initial location */
#else
.long .LFB3
#endif
.long .LFE3-.LFB3 /* FDE address range */
#ifdef __PIC__
.byte 0x0 /* .uleb128 0x0; Augmentation size */
#endif
.byte 0x4 /* DW_CFA_advance_loc4 */
.long .LCFI4-.LFB3
.byte 0xe /* DW_CFA_def_cfa_offset */
.byte 0x8 /* .uleb128 0x8 */
.byte 0x85 /* DW_CFA_offset, column 0x5 */
.byte 0x2 /* .uleb128 0x2 */
.byte 0x4 /* DW_CFA_advance_loc4 */
.long .LCFI5-.LCFI4
.byte 0xd /* DW_CFA_def_cfa_register */
.byte 0x5 /* .uleb128 0x5 */
.byte 0x4 /* DW_CFA_advance_loc4 */
.long .LCFI6-.LCFI5
.byte 0x86 /* DW_CFA_offset, column 0x6 */
.byte 0x3 /* .uleb128 0x3 */
.align 4
.LEFDE3:
#endif
#endif /* ifndef __x86_64__ */
|
suryaveeryadav/Python-3.4.0
| 12,418
|
Modules/_ctypes/libffi/src/x86/sysv.S
|
/* -----------------------------------------------------------------------
sysv.S - Copyright (c) 2013 The Written Word, Inc.
- Copyright (c) 1996,1998,2001-2003,2005,2008,2010 Red Hat, Inc.
X86 Foreign Function Interface
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
DEALINGS IN THE SOFTWARE.
----------------------------------------------------------------------- */
#ifndef __x86_64__
#define LIBFFI_ASM
#include <fficonfig.h>
#include <ffi.h>
.text
.globl ffi_prep_args
.align 4
.globl ffi_call_SYSV
.type ffi_call_SYSV,@function
ffi_call_SYSV:
.LFB1:
pushl %ebp
.LCFI0:
movl %esp,%ebp
.LCFI1:
/* Make room for all of the new args. */
movl 16(%ebp),%ecx
subl %ecx,%esp
/* Align the stack pointer to 16-bytes */
andl $0xfffffff0, %esp
movl %esp,%eax
/* Place all of the ffi_prep_args in position */
pushl 12(%ebp)
pushl %eax
call *8(%ebp)
/* Return stack to previous state and call the function */
addl $8,%esp
call *28(%ebp)
/* Load %ecx with the return type code */
movl 20(%ebp),%ecx
/* Protect %esi. We're going to pop it in the epilogue. */
pushl %esi
/* If the return value pointer is NULL, assume no return value. */
cmpl $0,24(%ebp)
jne 0f
/* Even if there is no space for the return value, we are
obliged to handle floating-point values. */
cmpl $FFI_TYPE_FLOAT,%ecx
jne noretval
fstp %st(0)
jmp epilogue
0:
call 1f
.Lstore_table:
.long noretval-.Lstore_table /* FFI_TYPE_VOID */
.long retint-.Lstore_table /* FFI_TYPE_INT */
.long retfloat-.Lstore_table /* FFI_TYPE_FLOAT */
.long retdouble-.Lstore_table /* FFI_TYPE_DOUBLE */
.long retlongdouble-.Lstore_table /* FFI_TYPE_LONGDOUBLE */
.long retuint8-.Lstore_table /* FFI_TYPE_UINT8 */
.long retsint8-.Lstore_table /* FFI_TYPE_SINT8 */
.long retuint16-.Lstore_table /* FFI_TYPE_UINT16 */
.long retsint16-.Lstore_table /* FFI_TYPE_SINT16 */
.long retint-.Lstore_table /* FFI_TYPE_UINT32 */
.long retint-.Lstore_table /* FFI_TYPE_SINT32 */
.long retint64-.Lstore_table /* FFI_TYPE_UINT64 */
.long retint64-.Lstore_table /* FFI_TYPE_SINT64 */
.long retstruct-.Lstore_table /* FFI_TYPE_STRUCT */
.long retint-.Lstore_table /* FFI_TYPE_POINTER */
1:
pop %esi
add (%esi, %ecx, 4), %esi
jmp *%esi
/* Sign/zero extend as appropriate. */
retsint8:
movsbl %al, %eax
jmp retint
retsint16:
movswl %ax, %eax
jmp retint
retuint8:
movzbl %al, %eax
jmp retint
retuint16:
movzwl %ax, %eax
jmp retint
retfloat:
/* Load %ecx with the pointer to storage for the return value */
movl 24(%ebp),%ecx
fstps (%ecx)
jmp epilogue
retdouble:
/* Load %ecx with the pointer to storage for the return value */
movl 24(%ebp),%ecx
fstpl (%ecx)
jmp epilogue
retlongdouble:
/* Load %ecx with the pointer to storage for the return value */
movl 24(%ebp),%ecx
fstpt (%ecx)
jmp epilogue
retint64:
/* Load %ecx with the pointer to storage for the return value */
movl 24(%ebp),%ecx
movl %eax,0(%ecx)
movl %edx,4(%ecx)
jmp epilogue
retint:
/* Load %ecx with the pointer to storage for the return value */
movl 24(%ebp),%ecx
movl %eax,0(%ecx)
retstruct:
/* Nothing to do! */
noretval:
epilogue:
popl %esi
movl %ebp,%esp
popl %ebp
ret
.LFE1:
.ffi_call_SYSV_end:
.size ffi_call_SYSV,.ffi_call_SYSV_end-ffi_call_SYSV
.align 4
FFI_HIDDEN (ffi_closure_SYSV)
.globl ffi_closure_SYSV
.type ffi_closure_SYSV, @function
ffi_closure_SYSV:
.LFB2:
pushl %ebp
.LCFI2:
movl %esp, %ebp
.LCFI3:
subl $40, %esp
leal -24(%ebp), %edx
movl %edx, -12(%ebp) /* resp */
leal 8(%ebp), %edx
#ifdef __SUNPRO_C
/* The SUNPRO compiler doesn't support GCC's regparm function
attribute, so we have to pass all three arguments to
ffi_closure_SYSV_inner on the stack. */
movl %edx, 8(%esp) /* args = __builtin_dwarf_cfa () */
leal -12(%ebp), %edx
movl %edx, 4(%esp) /* &resp */
movl %eax, (%esp) /* closure */
#else
movl %edx, 4(%esp) /* args = __builtin_dwarf_cfa () */
leal -12(%ebp), %edx
movl %edx, (%esp) /* &resp */
#endif
#if defined HAVE_HIDDEN_VISIBILITY_ATTRIBUTE || !defined __PIC__
call ffi_closure_SYSV_inner
#else
movl %ebx, 8(%esp)
.LCFI7:
call 1f
1: popl %ebx
addl $_GLOBAL_OFFSET_TABLE_+[.-1b], %ebx
call ffi_closure_SYSV_inner@PLT
movl 8(%esp), %ebx
#endif
movl -12(%ebp), %ecx
cmpl $FFI_TYPE_INT, %eax
je .Lcls_retint
/* Handle FFI_TYPE_UINT8, FFI_TYPE_SINT8, FFI_TYPE_UINT16,
FFI_TYPE_SINT16, FFI_TYPE_UINT32, FFI_TYPE_SINT32. */
cmpl $FFI_TYPE_UINT64, %eax
jge 0f
cmpl $FFI_TYPE_UINT8, %eax
jge .Lcls_retint
0: cmpl $FFI_TYPE_FLOAT, %eax
je .Lcls_retfloat
cmpl $FFI_TYPE_DOUBLE, %eax
je .Lcls_retdouble
cmpl $FFI_TYPE_LONGDOUBLE, %eax
je .Lcls_retldouble
cmpl $FFI_TYPE_SINT64, %eax
je .Lcls_retllong
cmpl $FFI_TYPE_STRUCT, %eax
je .Lcls_retstruct
.Lcls_epilogue:
movl %ebp, %esp
popl %ebp
ret
.Lcls_retint:
movl (%ecx), %eax
jmp .Lcls_epilogue
.Lcls_retfloat:
flds (%ecx)
jmp .Lcls_epilogue
.Lcls_retdouble:
fldl (%ecx)
jmp .Lcls_epilogue
.Lcls_retldouble:
fldt (%ecx)
jmp .Lcls_epilogue
.Lcls_retllong:
movl (%ecx), %eax
movl 4(%ecx), %edx
jmp .Lcls_epilogue
.Lcls_retstruct:
movl %ebp, %esp
popl %ebp
ret $4
.LFE2:
.size ffi_closure_SYSV, .-ffi_closure_SYSV
#if !FFI_NO_RAW_API
/* Precalculate for e.g. the Solaris 10/x86 assembler. */
#if FFI_TRAMPOLINE_SIZE == 10
#define RAW_CLOSURE_CIF_OFFSET 12
#define RAW_CLOSURE_FUN_OFFSET 16
#define RAW_CLOSURE_USER_DATA_OFFSET 20
#elif FFI_TRAMPOLINE_SIZE == 24
#define RAW_CLOSURE_CIF_OFFSET 24
#define RAW_CLOSURE_FUN_OFFSET 28
#define RAW_CLOSURE_USER_DATA_OFFSET 32
#else
#define RAW_CLOSURE_CIF_OFFSET ((FFI_TRAMPOLINE_SIZE + 3) & ~3)
#define RAW_CLOSURE_FUN_OFFSET (RAW_CLOSURE_CIF_OFFSET + 4)
#define RAW_CLOSURE_USER_DATA_OFFSET (RAW_CLOSURE_FUN_OFFSET + 4)
#endif
#define CIF_FLAGS_OFFSET 20
.align 4
FFI_HIDDEN (ffi_closure_raw_SYSV)
.globl ffi_closure_raw_SYSV
.type ffi_closure_raw_SYSV, @function
ffi_closure_raw_SYSV:
.LFB3:
pushl %ebp
.LCFI4:
movl %esp, %ebp
.LCFI5:
pushl %esi
.LCFI6:
subl $36, %esp
movl RAW_CLOSURE_CIF_OFFSET(%eax), %esi /* closure->cif */
movl RAW_CLOSURE_USER_DATA_OFFSET(%eax), %edx /* closure->user_data */
movl %edx, 12(%esp) /* user_data */
leal 8(%ebp), %edx /* __builtin_dwarf_cfa () */
movl %edx, 8(%esp) /* raw_args */
leal -24(%ebp), %edx
movl %edx, 4(%esp) /* &res */
movl %esi, (%esp) /* cif */
call *RAW_CLOSURE_FUN_OFFSET(%eax) /* closure->fun */
movl CIF_FLAGS_OFFSET(%esi), %eax /* rtype */
cmpl $FFI_TYPE_INT, %eax
je .Lrcls_retint
/* Handle FFI_TYPE_UINT8, FFI_TYPE_SINT8, FFI_TYPE_UINT16,
FFI_TYPE_SINT16, FFI_TYPE_UINT32, FFI_TYPE_SINT32. */
cmpl $FFI_TYPE_UINT64, %eax
jge 0f
cmpl $FFI_TYPE_UINT8, %eax
jge .Lrcls_retint
0:
cmpl $FFI_TYPE_FLOAT, %eax
je .Lrcls_retfloat
cmpl $FFI_TYPE_DOUBLE, %eax
je .Lrcls_retdouble
cmpl $FFI_TYPE_LONGDOUBLE, %eax
je .Lrcls_retldouble
cmpl $FFI_TYPE_SINT64, %eax
je .Lrcls_retllong
.Lrcls_epilogue:
addl $36, %esp
popl %esi
popl %ebp
ret
.Lrcls_retint:
movl -24(%ebp), %eax
jmp .Lrcls_epilogue
.Lrcls_retfloat:
flds -24(%ebp)
jmp .Lrcls_epilogue
.Lrcls_retdouble:
fldl -24(%ebp)
jmp .Lrcls_epilogue
.Lrcls_retldouble:
fldt -24(%ebp)
jmp .Lrcls_epilogue
.Lrcls_retllong:
movl -24(%ebp), %eax
movl -20(%ebp), %edx
jmp .Lrcls_epilogue
.LFE3:
.size ffi_closure_raw_SYSV, .-ffi_closure_raw_SYSV
#endif
#if defined __GNUC__
/* Only emit dwarf unwind info when building with GNU toolchain. */
#if defined __PIC__
# if defined __sun__ && defined __svr4__
/* 32-bit Solaris 2/x86 uses datarel encoding for PIC. GNU ld before 2.22
doesn't correctly sort .eh_frame_hdr with mixed encodings, so match this. */
# define FDE_ENCODING 0x30 /* datarel */
# define FDE_ENCODE(X) X@GOTOFF
# else
# define FDE_ENCODING 0x1b /* pcrel sdata4 */
# if defined HAVE_AS_X86_PCREL
# define FDE_ENCODE(X) X-.
# else
# define FDE_ENCODE(X) X@rel
# endif
# endif
#else
# define FDE_ENCODING 0 /* absolute */
# define FDE_ENCODE(X) X
#endif
.section .eh_frame,EH_FRAME_FLAGS,@progbits
.Lframe1:
.long .LECIE1-.LSCIE1 /* Length of Common Information Entry */
.LSCIE1:
.long 0x0 /* CIE Identifier Tag */
.byte 0x1 /* CIE Version */
#ifdef HAVE_AS_ASCII_PSEUDO_OP
#ifdef __PIC__
.ascii "zR\0" /* CIE Augmentation */
#else
.ascii "\0" /* CIE Augmentation */
#endif
#elif defined HAVE_AS_STRING_PSEUDO_OP
#ifdef __PIC__
.string "zR" /* CIE Augmentation */
#else
.string "" /* CIE Augmentation */
#endif
#else
#error missing .ascii/.string
#endif
.byte 0x1 /* .uleb128 0x1; CIE Code Alignment Factor */
.byte 0x7c /* .sleb128 -4; CIE Data Alignment Factor */
.byte 0x8 /* CIE RA Column */
#ifdef __PIC__
.byte 0x1 /* .uleb128 0x1; Augmentation size */
.byte FDE_ENCODING
#endif
.byte 0xc /* DW_CFA_def_cfa */
.byte 0x4 /* .uleb128 0x4 */
.byte 0x4 /* .uleb128 0x4 */
.byte 0x88 /* DW_CFA_offset, column 0x8 */
.byte 0x1 /* .uleb128 0x1 */
.align 4
.LECIE1:
.LSFDE1:
.long .LEFDE1-.LASFDE1 /* FDE Length */
.LASFDE1:
.long .LASFDE1-.Lframe1 /* FDE CIE offset */
.long FDE_ENCODE(.LFB1) /* FDE initial location */
.long .LFE1-.LFB1 /* FDE address range */
#ifdef __PIC__
.byte 0x0 /* .uleb128 0x0; Augmentation size */
#endif
.byte 0x4 /* DW_CFA_advance_loc4 */
.long .LCFI0-.LFB1
.byte 0xe /* DW_CFA_def_cfa_offset */
.byte 0x8 /* .uleb128 0x8 */
.byte 0x85 /* DW_CFA_offset, column 0x5 */
.byte 0x2 /* .uleb128 0x2 */
.byte 0x4 /* DW_CFA_advance_loc4 */
.long .LCFI1-.LCFI0
.byte 0xd /* DW_CFA_def_cfa_register */
.byte 0x5 /* .uleb128 0x5 */
.align 4
.LEFDE1:
.LSFDE2:
.long .LEFDE2-.LASFDE2 /* FDE Length */
.LASFDE2:
.long .LASFDE2-.Lframe1 /* FDE CIE offset */
.long FDE_ENCODE(.LFB2) /* FDE initial location */
.long .LFE2-.LFB2 /* FDE address range */
#ifdef __PIC__
.byte 0x0 /* .uleb128 0x0; Augmentation size */
#endif
.byte 0x4 /* DW_CFA_advance_loc4 */
.long .LCFI2-.LFB2
.byte 0xe /* DW_CFA_def_cfa_offset */
.byte 0x8 /* .uleb128 0x8 */
.byte 0x85 /* DW_CFA_offset, column 0x5 */
.byte 0x2 /* .uleb128 0x2 */
.byte 0x4 /* DW_CFA_advance_loc4 */
.long .LCFI3-.LCFI2
.byte 0xd /* DW_CFA_def_cfa_register */
.byte 0x5 /* .uleb128 0x5 */
#if !defined HAVE_HIDDEN_VISIBILITY_ATTRIBUTE && defined __PIC__
.byte 0x4 /* DW_CFA_advance_loc4 */
.long .LCFI7-.LCFI3
.byte 0x83 /* DW_CFA_offset, column 0x3 */
.byte 0xa /* .uleb128 0xa */
#endif
.align 4
.LEFDE2:
#if !FFI_NO_RAW_API
.LSFDE3:
.long .LEFDE3-.LASFDE3 /* FDE Length */
.LASFDE3:
.long .LASFDE3-.Lframe1 /* FDE CIE offset */
.long FDE_ENCODE(.LFB3) /* FDE initial location */
.long .LFE3-.LFB3 /* FDE address range */
#ifdef __PIC__
.byte 0x0 /* .uleb128 0x0; Augmentation size */
#endif
.byte 0x4 /* DW_CFA_advance_loc4 */
.long .LCFI4-.LFB3
.byte 0xe /* DW_CFA_def_cfa_offset */
.byte 0x8 /* .uleb128 0x8 */
.byte 0x85 /* DW_CFA_offset, column 0x5 */
.byte 0x2 /* .uleb128 0x2 */
.byte 0x4 /* DW_CFA_advance_loc4 */
.long .LCFI5-.LCFI4
.byte 0xd /* DW_CFA_def_cfa_register */
.byte 0x5 /* .uleb128 0x5 */
.byte 0x4 /* DW_CFA_advance_loc4 */
.long .LCFI6-.LCFI5
.byte 0x86 /* DW_CFA_offset, column 0x6 */
.byte 0x3 /* .uleb128 0x3 */
.align 4
.LEFDE3:
#endif
#endif
#endif /* ifndef __x86_64__ */
#if defined __ELF__ && defined __linux__
.section .note.GNU-stack,"",@progbits
#endif
|
suryaveeryadav/Python-3.4.0
| 11,363
|
Modules/_ctypes/libffi/src/x86/darwin64.S
|
/* -----------------------------------------------------------------------
darwin64.S - Copyright (c) 2006 Free Software Foundation, Inc.
Copyright (c) 2008 Red Hat, Inc.
derived from unix64.S
x86-64 Foreign Function Interface for Darwin.
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND, EXPRESS
OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR
OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
OTHER DEALINGS IN THE SOFTWARE.
----------------------------------------------------------------------- */
#ifdef __x86_64__
#define LIBFFI_ASM
#include <fficonfig.h>
#include <ffi.h>
.file "darwin64.S"
.text
/* ffi_call_unix64 (void *args, unsigned long bytes, unsigned flags,
void *raddr, void (*fnaddr)(void));
Bit o trickiness here -- ARGS+BYTES is the base of the stack frame
for this function. This has been allocated by ffi_call. We also
deallocate some of the stack that has been alloca'd. */
.align 3
.globl _ffi_call_unix64
_ffi_call_unix64:
LUW0:
movq (%rsp), %r10 /* Load return address. */
leaq (%rdi, %rsi), %rax /* Find local stack base. */
movq %rdx, (%rax) /* Save flags. */
movq %rcx, 8(%rax) /* Save raddr. */
movq %rbp, 16(%rax) /* Save old frame pointer. */
movq %r10, 24(%rax) /* Relocate return address. */
movq %rax, %rbp /* Finalize local stack frame. */
LUW1:
movq %rdi, %r10 /* Save a copy of the register area. */
movq %r8, %r11 /* Save a copy of the target fn. */
movl %r9d, %eax /* Set number of SSE registers. */
/* Load up all argument registers. */
movq (%r10), %rdi
movq 8(%r10), %rsi
movq 16(%r10), %rdx
movq 24(%r10), %rcx
movq 32(%r10), %r8
movq 40(%r10), %r9
testl %eax, %eax
jnz Lload_sse
Lret_from_load_sse:
/* Deallocate the reg arg area. */
leaq 176(%r10), %rsp
/* Call the user function. */
call *%r11
/* Deallocate stack arg area; local stack frame in redzone. */
leaq 24(%rbp), %rsp
movq 0(%rbp), %rcx /* Reload flags. */
movq 8(%rbp), %rdi /* Reload raddr. */
movq 16(%rbp), %rbp /* Reload old frame pointer. */
LUW2:
/* The first byte of the flags contains the FFI_TYPE. */
movzbl %cl, %r10d
leaq Lstore_table(%rip), %r11
movslq (%r11, %r10, 4), %r10
addq %r11, %r10
jmp *%r10
Lstore_table:
.long Lst_void-Lstore_table /* FFI_TYPE_VOID */
.long Lst_sint32-Lstore_table /* FFI_TYPE_INT */
.long Lst_float-Lstore_table /* FFI_TYPE_FLOAT */
.long Lst_double-Lstore_table /* FFI_TYPE_DOUBLE */
.long Lst_ldouble-Lstore_table /* FFI_TYPE_LONGDOUBLE */
.long Lst_uint8-Lstore_table /* FFI_TYPE_UINT8 */
.long Lst_sint8-Lstore_table /* FFI_TYPE_SINT8 */
.long Lst_uint16-Lstore_table /* FFI_TYPE_UINT16 */
.long Lst_sint16-Lstore_table /* FFI_TYPE_SINT16 */
.long Lst_uint32-Lstore_table /* FFI_TYPE_UINT32 */
.long Lst_sint32-Lstore_table /* FFI_TYPE_SINT32 */
.long Lst_int64-Lstore_table /* FFI_TYPE_UINT64 */
.long Lst_int64-Lstore_table /* FFI_TYPE_SINT64 */
.long Lst_struct-Lstore_table /* FFI_TYPE_STRUCT */
.long Lst_int64-Lstore_table /* FFI_TYPE_POINTER */
.text
.align 3
Lst_void:
ret
.align 3
Lst_uint8:
movzbq %al, %rax
movq %rax, (%rdi)
ret
.align 3
Lst_sint8:
movsbq %al, %rax
movq %rax, (%rdi)
ret
.align 3
Lst_uint16:
movzwq %ax, %rax
movq %rax, (%rdi)
.align 3
Lst_sint16:
movswq %ax, %rax
movq %rax, (%rdi)
ret
.align 3
Lst_uint32:
movl %eax, %eax
movq %rax, (%rdi)
.align 3
Lst_sint32:
cltq
movq %rax, (%rdi)
ret
.align 3
Lst_int64:
movq %rax, (%rdi)
ret
.align 3
Lst_float:
movss %xmm0, (%rdi)
ret
.align 3
Lst_double:
movsd %xmm0, (%rdi)
ret
Lst_ldouble:
fstpt (%rdi)
ret
.align 3
Lst_struct:
leaq -20(%rsp), %rsi /* Scratch area in redzone. */
/* We have to locate the values now, and since we don't want to
write too much data into the user's return value, we spill the
value to a 16 byte scratch area first. Bits 8, 9, and 10
control where the values are located. Only one of the three
bits will be set; see ffi_prep_cif_machdep for the pattern. */
movd %xmm0, %r10
movd %xmm1, %r11
testl $0x100, %ecx
cmovnz %rax, %rdx
cmovnz %r10, %rax
testl $0x200, %ecx
cmovnz %r10, %rdx
testl $0x400, %ecx
cmovnz %r10, %rax
cmovnz %r11, %rdx
movq %rax, (%rsi)
movq %rdx, 8(%rsi)
/* Bits 12-31 contain the true size of the structure. Copy from
the scratch area to the true destination. */
shrl $12, %ecx
rep movsb
ret
/* Many times we can avoid loading any SSE registers at all.
It's not worth an indirect jump to load the exact set of
SSE registers needed; zero or all is a good compromise. */
.align 3
LUW3:
Lload_sse:
movdqa 48(%r10), %xmm0
movdqa 64(%r10), %xmm1
movdqa 80(%r10), %xmm2
movdqa 96(%r10), %xmm3
movdqa 112(%r10), %xmm4
movdqa 128(%r10), %xmm5
movdqa 144(%r10), %xmm6
movdqa 160(%r10), %xmm7
jmp Lret_from_load_sse
LUW4:
.align 3
.globl _ffi_closure_unix64
_ffi_closure_unix64:
LUW5:
/* The carry flag is set by the trampoline iff SSE registers
are used. Don't clobber it before the branch instruction. */
leaq -200(%rsp), %rsp
LUW6:
movq %rdi, (%rsp)
movq %rsi, 8(%rsp)
movq %rdx, 16(%rsp)
movq %rcx, 24(%rsp)
movq %r8, 32(%rsp)
movq %r9, 40(%rsp)
jc Lsave_sse
Lret_from_save_sse:
movq %r10, %rdi
leaq 176(%rsp), %rsi
movq %rsp, %rdx
leaq 208(%rsp), %rcx
call _ffi_closure_unix64_inner
/* Deallocate stack frame early; return value is now in redzone. */
addq $200, %rsp
LUW7:
/* The first byte of the return value contains the FFI_TYPE. */
movzbl %al, %r10d
leaq Lload_table(%rip), %r11
movslq (%r11, %r10, 4), %r10
addq %r11, %r10
jmp *%r10
Lload_table:
.long Lld_void-Lload_table /* FFI_TYPE_VOID */
.long Lld_int32-Lload_table /* FFI_TYPE_INT */
.long Lld_float-Lload_table /* FFI_TYPE_FLOAT */
.long Lld_double-Lload_table /* FFI_TYPE_DOUBLE */
.long Lld_ldouble-Lload_table /* FFI_TYPE_LONGDOUBLE */
.long Lld_int8-Lload_table /* FFI_TYPE_UINT8 */
.long Lld_int8-Lload_table /* FFI_TYPE_SINT8 */
.long Lld_int16-Lload_table /* FFI_TYPE_UINT16 */
.long Lld_int16-Lload_table /* FFI_TYPE_SINT16 */
.long Lld_int32-Lload_table /* FFI_TYPE_UINT32 */
.long Lld_int32-Lload_table /* FFI_TYPE_SINT32 */
.long Lld_int64-Lload_table /* FFI_TYPE_UINT64 */
.long Lld_int64-Lload_table /* FFI_TYPE_SINT64 */
.long Lld_struct-Lload_table /* FFI_TYPE_STRUCT */
.long Lld_int64-Lload_table /* FFI_TYPE_POINTER */
.text
.align 3
Lld_void:
ret
.align 3
Lld_int8:
movzbl -24(%rsp), %eax
ret
.align 3
Lld_int16:
movzwl -24(%rsp), %eax
ret
.align 3
Lld_int32:
movl -24(%rsp), %eax
ret
.align 3
Lld_int64:
movq -24(%rsp), %rax
ret
.align 3
Lld_float:
movss -24(%rsp), %xmm0
ret
.align 3
Lld_double:
movsd -24(%rsp), %xmm0
ret
.align 3
Lld_ldouble:
fldt -24(%rsp)
ret
.align 3
Lld_struct:
/* There are four possibilities here, %rax/%rdx, %xmm0/%rax,
%rax/%xmm0, %xmm0/%xmm1. We collapse two by always loading
both rdx and xmm1 with the second word. For the remaining,
bit 8 set means xmm0 gets the second word, and bit 9 means
that rax gets the second word. */
movq -24(%rsp), %rcx
movq -16(%rsp), %rdx
movq -16(%rsp), %xmm1
testl $0x100, %eax
cmovnz %rdx, %rcx
movd %rcx, %xmm0
testl $0x200, %eax
movq -24(%rsp), %rax
cmovnz %rdx, %rax
ret
/* See the comment above Lload_sse; the same logic applies here. */
.align 3
LUW8:
Lsave_sse:
movdqa %xmm0, 48(%rsp)
movdqa %xmm1, 64(%rsp)
movdqa %xmm2, 80(%rsp)
movdqa %xmm3, 96(%rsp)
movdqa %xmm4, 112(%rsp)
movdqa %xmm5, 128(%rsp)
movdqa %xmm6, 144(%rsp)
movdqa %xmm7, 160(%rsp)
jmp Lret_from_save_sse
LUW9:
.section __TEXT,__eh_frame,coalesced,no_toc+strip_static_syms+live_support
EH_frame1:
.set L$set$0,LECIE1-LSCIE1 /* CIE Length */
.long L$set$0
LSCIE1:
.long 0x0 /* CIE Identifier Tag */
.byte 0x1 /* CIE Version */
.ascii "zR\0" /* CIE Augmentation */
.byte 0x1 /* uleb128 0x1; CIE Code Alignment Factor */
.byte 0x78 /* sleb128 -8; CIE Data Alignment Factor */
.byte 0x10 /* CIE RA Column */
.byte 0x1 /* uleb128 0x1; Augmentation size */
.byte 0x10 /* FDE Encoding (pcrel sdata4) */
.byte 0xc /* DW_CFA_def_cfa, %rsp offset 8 */
.byte 0x7 /* uleb128 0x7 */
.byte 0x8 /* uleb128 0x8 */
.byte 0x90 /* DW_CFA_offset, column 0x10 */
.byte 0x1
.align 3
LECIE1:
.globl _ffi_call_unix64.eh
_ffi_call_unix64.eh:
LSFDE1:
.set L$set$1,LEFDE1-LASFDE1 /* FDE Length */
.long L$set$1
LASFDE1:
.long LASFDE1-EH_frame1 /* FDE CIE offset */
.quad LUW0-. /* FDE initial location */
.set L$set$2,LUW4-LUW0 /* FDE address range */
.quad L$set$2
.byte 0x0 /* Augmentation size */
.byte 0x4 /* DW_CFA_advance_loc4 */
.set L$set$3,LUW1-LUW0
.long L$set$3
/* New stack frame based off rbp. This is a itty bit of unwind
trickery in that the CFA *has* changed. There is no easy way
to describe it correctly on entry to the function. Fortunately,
it doesn't matter too much since at all points we can correctly
unwind back to ffi_call. Note that the location to which we
moved the return address is (the new) CFA-8, so from the
perspective of the unwind info, it hasn't moved. */
.byte 0xc /* DW_CFA_def_cfa, %rbp offset 32 */
.byte 0x6
.byte 0x20
.byte 0x80+6 /* DW_CFA_offset, %rbp offset 2*-8 */
.byte 0x2
.byte 0xa /* DW_CFA_remember_state */
.byte 0x4 /* DW_CFA_advance_loc4 */
.set L$set$4,LUW2-LUW1
.long L$set$4
.byte 0xc /* DW_CFA_def_cfa, %rsp offset 8 */
.byte 0x7
.byte 0x8
.byte 0xc0+6 /* DW_CFA_restore, %rbp */
.byte 0x4 /* DW_CFA_advance_loc4 */
.set L$set$5,LUW3-LUW2
.long L$set$5
.byte 0xb /* DW_CFA_restore_state */
.align 3
LEFDE1:
.globl _ffi_closure_unix64.eh
_ffi_closure_unix64.eh:
LSFDE3:
.set L$set$6,LEFDE3-LASFDE3 /* FDE Length */
.long L$set$6
LASFDE3:
.long LASFDE3-EH_frame1 /* FDE CIE offset */
.quad LUW5-. /* FDE initial location */
.set L$set$7,LUW9-LUW5 /* FDE address range */
.quad L$set$7
.byte 0x0 /* Augmentation size */
.byte 0x4 /* DW_CFA_advance_loc4 */
.set L$set$8,LUW6-LUW5
.long L$set$8
.byte 0xe /* DW_CFA_def_cfa_offset */
.byte 208,1 /* uleb128 208 */
.byte 0xa /* DW_CFA_remember_state */
.byte 0x4 /* DW_CFA_advance_loc4 */
.set L$set$9,LUW7-LUW6
.long L$set$9
.byte 0xe /* DW_CFA_def_cfa_offset */
.byte 0x8
.byte 0x4 /* DW_CFA_advance_loc4 */
.set L$set$10,LUW8-LUW7
.long L$set$10
.byte 0xb /* DW_CFA_restore_state */
.align 3
LEFDE3:
.subsections_via_symbols
#endif /* __x86_64__ */
|
suryaveeryadav/Python-3.4.0
| 11,571
|
Modules/_ctypes/libffi/src/x86/unix64.S
|
/* -----------------------------------------------------------------------
unix64.S - Copyright (c) 2013 The Written Word, Inc.
- Copyright (c) 2008 Red Hat, Inc
- Copyright (c) 2002 Bo Thorsen <bo@suse.de>
x86-64 Foreign Function Interface
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
DEALINGS IN THE SOFTWARE.
----------------------------------------------------------------------- */
#ifdef __x86_64__
#define LIBFFI_ASM
#include <fficonfig.h>
#include <ffi.h>
.text
/* ffi_call_unix64 (void *args, unsigned long bytes, unsigned flags,
void *raddr, void (*fnaddr)(void));
Bit o trickiness here -- ARGS+BYTES is the base of the stack frame
for this function. This has been allocated by ffi_call. We also
deallocate some of the stack that has been alloca'd. */
.align 2
.globl ffi_call_unix64
.type ffi_call_unix64,@function
ffi_call_unix64:
.LUW0:
movq (%rsp), %r10 /* Load return address. */
leaq (%rdi, %rsi), %rax /* Find local stack base. */
movq %rdx, (%rax) /* Save flags. */
movq %rcx, 8(%rax) /* Save raddr. */
movq %rbp, 16(%rax) /* Save old frame pointer. */
movq %r10, 24(%rax) /* Relocate return address. */
movq %rax, %rbp /* Finalize local stack frame. */
.LUW1:
movq %rdi, %r10 /* Save a copy of the register area. */
movq %r8, %r11 /* Save a copy of the target fn. */
movl %r9d, %eax /* Set number of SSE registers. */
/* Load up all argument registers. */
movq (%r10), %rdi
movq 8(%r10), %rsi
movq 16(%r10), %rdx
movq 24(%r10), %rcx
movq 32(%r10), %r8
movq 40(%r10), %r9
testl %eax, %eax
jnz .Lload_sse
.Lret_from_load_sse:
/* Deallocate the reg arg area. */
leaq 176(%r10), %rsp
/* Call the user function. */
call *%r11
/* Deallocate stack arg area; local stack frame in redzone. */
leaq 24(%rbp), %rsp
movq 0(%rbp), %rcx /* Reload flags. */
movq 8(%rbp), %rdi /* Reload raddr. */
movq 16(%rbp), %rbp /* Reload old frame pointer. */
.LUW2:
/* The first byte of the flags contains the FFI_TYPE. */
movzbl %cl, %r10d
leaq .Lstore_table(%rip), %r11
movslq (%r11, %r10, 4), %r10
addq %r11, %r10
jmp *%r10
.Lstore_table:
.long .Lst_void-.Lstore_table /* FFI_TYPE_VOID */
.long .Lst_sint32-.Lstore_table /* FFI_TYPE_INT */
.long .Lst_float-.Lstore_table /* FFI_TYPE_FLOAT */
.long .Lst_double-.Lstore_table /* FFI_TYPE_DOUBLE */
.long .Lst_ldouble-.Lstore_table /* FFI_TYPE_LONGDOUBLE */
.long .Lst_uint8-.Lstore_table /* FFI_TYPE_UINT8 */
.long .Lst_sint8-.Lstore_table /* FFI_TYPE_SINT8 */
.long .Lst_uint16-.Lstore_table /* FFI_TYPE_UINT16 */
.long .Lst_sint16-.Lstore_table /* FFI_TYPE_SINT16 */
.long .Lst_uint32-.Lstore_table /* FFI_TYPE_UINT32 */
.long .Lst_sint32-.Lstore_table /* FFI_TYPE_SINT32 */
.long .Lst_int64-.Lstore_table /* FFI_TYPE_UINT64 */
.long .Lst_int64-.Lstore_table /* FFI_TYPE_SINT64 */
.long .Lst_struct-.Lstore_table /* FFI_TYPE_STRUCT */
.long .Lst_int64-.Lstore_table /* FFI_TYPE_POINTER */
.align 2
.Lst_void:
ret
.align 2
.Lst_uint8:
movzbq %al, %rax
movq %rax, (%rdi)
ret
.align 2
.Lst_sint8:
movsbq %al, %rax
movq %rax, (%rdi)
ret
.align 2
.Lst_uint16:
movzwq %ax, %rax
movq %rax, (%rdi)
.align 2
.Lst_sint16:
movswq %ax, %rax
movq %rax, (%rdi)
ret
.align 2
.Lst_uint32:
movl %eax, %eax
movq %rax, (%rdi)
.align 2
.Lst_sint32:
cltq
movq %rax, (%rdi)
ret
.align 2
.Lst_int64:
movq %rax, (%rdi)
ret
.align 2
.Lst_float:
movss %xmm0, (%rdi)
ret
.align 2
.Lst_double:
movsd %xmm0, (%rdi)
ret
.Lst_ldouble:
fstpt (%rdi)
ret
.align 2
.Lst_struct:
leaq -20(%rsp), %rsi /* Scratch area in redzone. */
/* We have to locate the values now, and since we don't want to
write too much data into the user's return value, we spill the
value to a 16 byte scratch area first. Bits 8, 9, and 10
control where the values are located. Only one of the three
bits will be set; see ffi_prep_cif_machdep for the pattern. */
movd %xmm0, %r10
movd %xmm1, %r11
testl $0x100, %ecx
cmovnz %rax, %rdx
cmovnz %r10, %rax
testl $0x200, %ecx
cmovnz %r10, %rdx
testl $0x400, %ecx
cmovnz %r10, %rax
cmovnz %r11, %rdx
movq %rax, (%rsi)
movq %rdx, 8(%rsi)
/* Bits 12-31 contain the true size of the structure. Copy from
the scratch area to the true destination. */
shrl $12, %ecx
rep movsb
ret
/* Many times we can avoid loading any SSE registers at all.
It's not worth an indirect jump to load the exact set of
SSE registers needed; zero or all is a good compromise. */
.align 2
.LUW3:
.Lload_sse:
movdqa 48(%r10), %xmm0
movdqa 64(%r10), %xmm1
movdqa 80(%r10), %xmm2
movdqa 96(%r10), %xmm3
movdqa 112(%r10), %xmm4
movdqa 128(%r10), %xmm5
movdqa 144(%r10), %xmm6
movdqa 160(%r10), %xmm7
jmp .Lret_from_load_sse
.LUW4:
.size ffi_call_unix64,.-ffi_call_unix64
.align 2
.globl ffi_closure_unix64
.type ffi_closure_unix64,@function
ffi_closure_unix64:
.LUW5:
/* The carry flag is set by the trampoline iff SSE registers
are used. Don't clobber it before the branch instruction. */
leaq -200(%rsp), %rsp
.LUW6:
movq %rdi, (%rsp)
movq %rsi, 8(%rsp)
movq %rdx, 16(%rsp)
movq %rcx, 24(%rsp)
movq %r8, 32(%rsp)
movq %r9, 40(%rsp)
jc .Lsave_sse
.Lret_from_save_sse:
movq %r10, %rdi
leaq 176(%rsp), %rsi
movq %rsp, %rdx
leaq 208(%rsp), %rcx
call ffi_closure_unix64_inner@PLT
/* Deallocate stack frame early; return value is now in redzone. */
addq $200, %rsp
.LUW7:
/* The first byte of the return value contains the FFI_TYPE. */
movzbl %al, %r10d
leaq .Lload_table(%rip), %r11
movslq (%r11, %r10, 4), %r10
addq %r11, %r10
jmp *%r10
.Lload_table:
.long .Lld_void-.Lload_table /* FFI_TYPE_VOID */
.long .Lld_int32-.Lload_table /* FFI_TYPE_INT */
.long .Lld_float-.Lload_table /* FFI_TYPE_FLOAT */
.long .Lld_double-.Lload_table /* FFI_TYPE_DOUBLE */
.long .Lld_ldouble-.Lload_table /* FFI_TYPE_LONGDOUBLE */
.long .Lld_int8-.Lload_table /* FFI_TYPE_UINT8 */
.long .Lld_int8-.Lload_table /* FFI_TYPE_SINT8 */
.long .Lld_int16-.Lload_table /* FFI_TYPE_UINT16 */
.long .Lld_int16-.Lload_table /* FFI_TYPE_SINT16 */
.long .Lld_int32-.Lload_table /* FFI_TYPE_UINT32 */
.long .Lld_int32-.Lload_table /* FFI_TYPE_SINT32 */
.long .Lld_int64-.Lload_table /* FFI_TYPE_UINT64 */
.long .Lld_int64-.Lload_table /* FFI_TYPE_SINT64 */
.long .Lld_struct-.Lload_table /* FFI_TYPE_STRUCT */
.long .Lld_int64-.Lload_table /* FFI_TYPE_POINTER */
.align 2
.Lld_void:
ret
.align 2
.Lld_int8:
movzbl -24(%rsp), %eax
ret
.align 2
.Lld_int16:
movzwl -24(%rsp), %eax
ret
.align 2
.Lld_int32:
movl -24(%rsp), %eax
ret
.align 2
.Lld_int64:
movq -24(%rsp), %rax
ret
.align 2
.Lld_float:
movss -24(%rsp), %xmm0
ret
.align 2
.Lld_double:
movsd -24(%rsp), %xmm0
ret
.align 2
.Lld_ldouble:
fldt -24(%rsp)
ret
.align 2
.Lld_struct:
/* There are four possibilities here, %rax/%rdx, %xmm0/%rax,
%rax/%xmm0, %xmm0/%xmm1. We collapse two by always loading
both rdx and xmm1 with the second word. For the remaining,
bit 8 set means xmm0 gets the second word, and bit 9 means
that rax gets the second word. */
movq -24(%rsp), %rcx
movq -16(%rsp), %rdx
movq -16(%rsp), %xmm1
testl $0x100, %eax
cmovnz %rdx, %rcx
movd %rcx, %xmm0
testl $0x200, %eax
movq -24(%rsp), %rax
cmovnz %rdx, %rax
ret
/* See the comment above .Lload_sse; the same logic applies here. */
.align 2
.LUW8:
.Lsave_sse:
movdqa %xmm0, 48(%rsp)
movdqa %xmm1, 64(%rsp)
movdqa %xmm2, 80(%rsp)
movdqa %xmm3, 96(%rsp)
movdqa %xmm4, 112(%rsp)
movdqa %xmm5, 128(%rsp)
movdqa %xmm6, 144(%rsp)
movdqa %xmm7, 160(%rsp)
jmp .Lret_from_save_sse
.LUW9:
.size ffi_closure_unix64,.-ffi_closure_unix64
#ifdef __GNUC__
/* Only emit DWARF unwind info when building with the GNU toolchain. */
#ifdef HAVE_AS_X86_64_UNWIND_SECTION_TYPE
.section .eh_frame,"a",@unwind
#else
.section .eh_frame,"a",@progbits
#endif
.Lframe1:
.long .LECIE1-.LSCIE1 /* CIE Length */
.LSCIE1:
.long 0 /* CIE Identifier Tag */
.byte 1 /* CIE Version */
.ascii "zR\0" /* CIE Augmentation */
.uleb128 1 /* CIE Code Alignment Factor */
.sleb128 -8 /* CIE Data Alignment Factor */
.byte 0x10 /* CIE RA Column */
.uleb128 1 /* Augmentation size */
.byte 0x1b /* FDE Encoding (pcrel sdata4) */
.byte 0xc /* DW_CFA_def_cfa, %rsp offset 8 */
.uleb128 7
.uleb128 8
.byte 0x80+16 /* DW_CFA_offset, %rip offset 1*-8 */
.uleb128 1
.align 8
.LECIE1:
.LSFDE1:
.long .LEFDE1-.LASFDE1 /* FDE Length */
.LASFDE1:
.long .LASFDE1-.Lframe1 /* FDE CIE offset */
#if HAVE_AS_X86_PCREL
.long .LUW0-. /* FDE initial location */
#else
.long .LUW0@rel
#endif
.long .LUW4-.LUW0 /* FDE address range */
.uleb128 0x0 /* Augmentation size */
.byte 0x4 /* DW_CFA_advance_loc4 */
.long .LUW1-.LUW0
/* New stack frame based off rbp. This is a itty bit of unwind
trickery in that the CFA *has* changed. There is no easy way
to describe it correctly on entry to the function. Fortunately,
it doesn't matter too much since at all points we can correctly
unwind back to ffi_call. Note that the location to which we
moved the return address is (the new) CFA-8, so from the
perspective of the unwind info, it hasn't moved. */
.byte 0xc /* DW_CFA_def_cfa, %rbp offset 32 */
.uleb128 6
.uleb128 32
.byte 0x80+6 /* DW_CFA_offset, %rbp offset 2*-8 */
.uleb128 2
.byte 0xa /* DW_CFA_remember_state */
.byte 0x4 /* DW_CFA_advance_loc4 */
.long .LUW2-.LUW1
.byte 0xc /* DW_CFA_def_cfa, %rsp offset 8 */
.uleb128 7
.uleb128 8
.byte 0xc0+6 /* DW_CFA_restore, %rbp */
.byte 0x4 /* DW_CFA_advance_loc4 */
.long .LUW3-.LUW2
.byte 0xb /* DW_CFA_restore_state */
.align 8
.LEFDE1:
.LSFDE3:
.long .LEFDE3-.LASFDE3 /* FDE Length */
.LASFDE3:
.long .LASFDE3-.Lframe1 /* FDE CIE offset */
#if HAVE_AS_X86_PCREL
.long .LUW5-. /* FDE initial location */
#else
.long .LUW5@rel
#endif
.long .LUW9-.LUW5 /* FDE address range */
.uleb128 0x0 /* Augmentation size */
.byte 0x4 /* DW_CFA_advance_loc4 */
.long .LUW6-.LUW5
.byte 0xe /* DW_CFA_def_cfa_offset */
.uleb128 208
.byte 0xa /* DW_CFA_remember_state */
.byte 0x4 /* DW_CFA_advance_loc4 */
.long .LUW7-.LUW6
.byte 0xe /* DW_CFA_def_cfa_offset */
.uleb128 8
.byte 0x4 /* DW_CFA_advance_loc4 */
.long .LUW8-.LUW7
.byte 0xb /* DW_CFA_restore_state */
.align 8
.LEFDE3:
#endif /* __GNUC__ */
#endif /* __x86_64__ */
#if defined __ELF__ && defined __linux__
.section .note.GNU-stack,"",@progbits
#endif
|
suryaveeryadav/Python-3.4.0
| 32,228
|
Modules/_ctypes/libffi/src/x86/win32.S
|
/* -----------------------------------------------------------------------
win32.S - Copyright (c) 1996, 1998, 2001, 2002, 2009 Red Hat, Inc.
Copyright (c) 2001 John Beniton
Copyright (c) 2002 Ranjit Mathew
Copyright (c) 2009 Daniel Witte
X86 Foreign Function Interface
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
DEALINGS IN THE SOFTWARE.
-----------------------------------------------------------------------
*/
#define LIBFFI_ASM
#include <fficonfig.h>
#include <ffi.h>
#ifdef _MSC_VER
.386
.MODEL FLAT, C
EXTRN ffi_closure_SYSV_inner:NEAR
_TEXT SEGMENT
ffi_call_win32 PROC NEAR,
ffi_prep_args : NEAR PTR DWORD,
ecif : NEAR PTR DWORD,
cif_abi : DWORD,
cif_bytes : DWORD,
cif_flags : DWORD,
rvalue : NEAR PTR DWORD,
fn : NEAR PTR DWORD
;; Make room for all of the new args.
mov ecx, cif_bytes
sub esp, ecx
mov eax, esp
;; Place all of the ffi_prep_args in position
push ecif
push eax
call ffi_prep_args
;; Return stack to previous state and call the function
add esp, 8
;; Handle thiscall and fastcall
cmp cif_abi, 3 ;; FFI_THISCALL
jz do_thiscall
cmp cif_abi, 4 ;; FFI_FASTCALL
jnz do_stdcall
mov ecx, DWORD PTR [esp]
mov edx, DWORD PTR [esp+4]
add esp, 8
jmp do_stdcall
do_thiscall:
mov ecx, DWORD PTR [esp]
add esp, 4
do_stdcall:
call fn
;; cdecl: we restore esp in the epilogue, so there's no need to
;; remove the space we pushed for the args.
;; stdcall: the callee has already cleaned the stack.
;; Load ecx with the return type code
mov ecx, cif_flags
;; If the return value pointer is NULL, assume no return value.
cmp rvalue, 0
jne ca_jumptable
;; Even if there is no space for the return value, we are
;; obliged to handle floating-point values.
cmp ecx, FFI_TYPE_FLOAT
jne ca_epilogue
fstp st(0)
jmp ca_epilogue
ca_jumptable:
jmp [ca_jumpdata + 4 * ecx]
ca_jumpdata:
;; Do not insert anything here between label and jump table.
dd offset ca_epilogue ;; FFI_TYPE_VOID
dd offset ca_retint ;; FFI_TYPE_INT
dd offset ca_retfloat ;; FFI_TYPE_FLOAT
dd offset ca_retdouble ;; FFI_TYPE_DOUBLE
dd offset ca_retlongdouble ;; FFI_TYPE_LONGDOUBLE
dd offset ca_retuint8 ;; FFI_TYPE_UINT8
dd offset ca_retsint8 ;; FFI_TYPE_SINT8
dd offset ca_retuint16 ;; FFI_TYPE_UINT16
dd offset ca_retsint16 ;; FFI_TYPE_SINT16
dd offset ca_retint ;; FFI_TYPE_UINT32
dd offset ca_retint ;; FFI_TYPE_SINT32
dd offset ca_retint64 ;; FFI_TYPE_UINT64
dd offset ca_retint64 ;; FFI_TYPE_SINT64
dd offset ca_epilogue ;; FFI_TYPE_STRUCT
dd offset ca_retint ;; FFI_TYPE_POINTER
dd offset ca_retstruct1b ;; FFI_TYPE_SMALL_STRUCT_1B
dd offset ca_retstruct2b ;; FFI_TYPE_SMALL_STRUCT_2B
dd offset ca_retint ;; FFI_TYPE_SMALL_STRUCT_4B
dd offset ca_epilogue ;; FFI_TYPE_MS_STRUCT
/* Sign/zero extend as appropriate. */
ca_retuint8:
movzx eax, al
jmp ca_retint
ca_retsint8:
movsx eax, al
jmp ca_retint
ca_retuint16:
movzx eax, ax
jmp ca_retint
ca_retsint16:
movsx eax, ax
jmp ca_retint
ca_retint:
;; Load %ecx with the pointer to storage for the return value
mov ecx, rvalue
mov [ecx + 0], eax
jmp ca_epilogue
ca_retint64:
;; Load %ecx with the pointer to storage for the return value
mov ecx, rvalue
mov [ecx + 0], eax
mov [ecx + 4], edx
jmp ca_epilogue
ca_retfloat:
;; Load %ecx with the pointer to storage for the return value
mov ecx, rvalue
fstp DWORD PTR [ecx]
jmp ca_epilogue
ca_retdouble:
;; Load %ecx with the pointer to storage for the return value
mov ecx, rvalue
fstp QWORD PTR [ecx]
jmp ca_epilogue
ca_retlongdouble:
;; Load %ecx with the pointer to storage for the return value
mov ecx, rvalue
fstp TBYTE PTR [ecx]
jmp ca_epilogue
ca_retstruct1b:
;; Load %ecx with the pointer to storage for the return value
mov ecx, rvalue
mov [ecx + 0], al
jmp ca_epilogue
ca_retstruct2b:
;; Load %ecx with the pointer to storage for the return value
mov ecx, rvalue
mov [ecx + 0], ax
jmp ca_epilogue
ca_epilogue:
;; Epilogue code is autogenerated.
ret
ffi_call_win32 ENDP
ffi_closure_THISCALL PROC NEAR FORCEFRAME
sub esp, 40
lea edx, [ebp -24]
mov [ebp - 12], edx /* resp */
lea edx, [ebp + 12] /* account for stub return address on stack */
jmp stub
ffi_closure_THISCALL ENDP
ffi_closure_SYSV PROC NEAR FORCEFRAME
;; the ffi_closure ctx is passed in eax by the trampoline.
sub esp, 40
lea edx, [ebp - 24]
mov [ebp - 12], edx ;; resp
lea edx, [ebp + 8]
stub::
mov [esp + 8], edx ;; args
lea edx, [ebp - 12]
mov [esp + 4], edx ;; &resp
mov [esp], eax ;; closure
call ffi_closure_SYSV_inner
mov ecx, [ebp - 12]
cs_jumptable:
jmp [cs_jumpdata + 4 * eax]
cs_jumpdata:
;; Do not insert anything here between the label and jump table.
dd offset cs_epilogue ;; FFI_TYPE_VOID
dd offset cs_retint ;; FFI_TYPE_INT
dd offset cs_retfloat ;; FFI_TYPE_FLOAT
dd offset cs_retdouble ;; FFI_TYPE_DOUBLE
dd offset cs_retlongdouble ;; FFI_TYPE_LONGDOUBLE
dd offset cs_retuint8 ;; FFI_TYPE_UINT8
dd offset cs_retsint8 ;; FFI_TYPE_SINT8
dd offset cs_retuint16 ;; FFI_TYPE_UINT16
dd offset cs_retsint16 ;; FFI_TYPE_SINT16
dd offset cs_retint ;; FFI_TYPE_UINT32
dd offset cs_retint ;; FFI_TYPE_SINT32
dd offset cs_retint64 ;; FFI_TYPE_UINT64
dd offset cs_retint64 ;; FFI_TYPE_SINT64
dd offset cs_retstruct ;; FFI_TYPE_STRUCT
dd offset cs_retint ;; FFI_TYPE_POINTER
dd offset cs_retsint8 ;; FFI_TYPE_SMALL_STRUCT_1B
dd offset cs_retsint16 ;; FFI_TYPE_SMALL_STRUCT_2B
dd offset cs_retint ;; FFI_TYPE_SMALL_STRUCT_4B
dd offset cs_retmsstruct ;; FFI_TYPE_MS_STRUCT
cs_retuint8:
movzx eax, BYTE PTR [ecx]
jmp cs_epilogue
cs_retsint8:
movsx eax, BYTE PTR [ecx]
jmp cs_epilogue
cs_retuint16:
movzx eax, WORD PTR [ecx]
jmp cs_epilogue
cs_retsint16:
movsx eax, WORD PTR [ecx]
jmp cs_epilogue
cs_retint:
mov eax, [ecx]
jmp cs_epilogue
cs_retint64:
mov eax, [ecx + 0]
mov edx, [ecx + 4]
jmp cs_epilogue
cs_retfloat:
fld DWORD PTR [ecx]
jmp cs_epilogue
cs_retdouble:
fld QWORD PTR [ecx]
jmp cs_epilogue
cs_retlongdouble:
fld TBYTE PTR [ecx]
jmp cs_epilogue
cs_retstruct:
;; Caller expects us to pop struct return value pointer hidden arg.
;; Epilogue code is autogenerated.
ret 4
cs_retmsstruct:
;; Caller expects us to return a pointer to the real return value.
mov eax, ecx
;; Caller doesn't expects us to pop struct return value pointer hidden arg.
jmp cs_epilogue
cs_epilogue:
;; Epilogue code is autogenerated.
ret
ffi_closure_SYSV ENDP
#if !FFI_NO_RAW_API
#define RAW_CLOSURE_CIF_OFFSET ((FFI_TRAMPOLINE_SIZE + 3) AND NOT 3)
#define RAW_CLOSURE_FUN_OFFSET (RAW_CLOSURE_CIF_OFFSET + 4)
#define RAW_CLOSURE_USER_DATA_OFFSET (RAW_CLOSURE_FUN_OFFSET + 4)
#define CIF_FLAGS_OFFSET 20
ffi_closure_raw_THISCALL PROC NEAR USES esi FORCEFRAME
sub esp, 36
mov esi, [eax + RAW_CLOSURE_CIF_OFFSET] ;; closure->cif
mov edx, [eax + RAW_CLOSURE_USER_DATA_OFFSET] ;; closure->user_data
mov [esp + 12], edx
lea edx, [ebp + 12]
jmp stubraw
ffi_closure_raw_THISCALL ENDP
ffi_closure_raw_SYSV PROC NEAR USES esi FORCEFRAME
;; the ffi_closure ctx is passed in eax by the trampoline.
sub esp, 40
mov esi, [eax + RAW_CLOSURE_CIF_OFFSET] ;; closure->cif
mov edx, [eax + RAW_CLOSURE_USER_DATA_OFFSET] ;; closure->user_data
mov [esp + 12], edx ;; user_data
lea edx, [ebp + 8]
stubraw::
mov [esp + 8], edx ;; raw_args
lea edx, [ebp - 24]
mov [esp + 4], edx ;; &res
mov [esp], esi ;; cif
call DWORD PTR [eax + RAW_CLOSURE_FUN_OFFSET] ;; closure->fun
mov eax, [esi + CIF_FLAGS_OFFSET] ;; cif->flags
lea ecx, [ebp - 24]
cr_jumptable:
jmp [cr_jumpdata + 4 * eax]
cr_jumpdata:
;; Do not insert anything here between the label and jump table.
dd offset cr_epilogue ;; FFI_TYPE_VOID
dd offset cr_retint ;; FFI_TYPE_INT
dd offset cr_retfloat ;; FFI_TYPE_FLOAT
dd offset cr_retdouble ;; FFI_TYPE_DOUBLE
dd offset cr_retlongdouble ;; FFI_TYPE_LONGDOUBLE
dd offset cr_retuint8 ;; FFI_TYPE_UINT8
dd offset cr_retsint8 ;; FFI_TYPE_SINT8
dd offset cr_retuint16 ;; FFI_TYPE_UINT16
dd offset cr_retsint16 ;; FFI_TYPE_SINT16
dd offset cr_retint ;; FFI_TYPE_UINT32
dd offset cr_retint ;; FFI_TYPE_SINT32
dd offset cr_retint64 ;; FFI_TYPE_UINT64
dd offset cr_retint64 ;; FFI_TYPE_SINT64
dd offset cr_epilogue ;; FFI_TYPE_STRUCT
dd offset cr_retint ;; FFI_TYPE_POINTER
dd offset cr_retsint8 ;; FFI_TYPE_SMALL_STRUCT_1B
dd offset cr_retsint16 ;; FFI_TYPE_SMALL_STRUCT_2B
dd offset cr_retint ;; FFI_TYPE_SMALL_STRUCT_4B
dd offset cr_epilogue ;; FFI_TYPE_MS_STRUCT
cr_retuint8:
movzx eax, BYTE PTR [ecx]
jmp cr_epilogue
cr_retsint8:
movsx eax, BYTE PTR [ecx]
jmp cr_epilogue
cr_retuint16:
movzx eax, WORD PTR [ecx]
jmp cr_epilogue
cr_retsint16:
movsx eax, WORD PTR [ecx]
jmp cr_epilogue
cr_retint:
mov eax, [ecx]
jmp cr_epilogue
cr_retint64:
mov eax, [ecx + 0]
mov edx, [ecx + 4]
jmp cr_epilogue
cr_retfloat:
fld DWORD PTR [ecx]
jmp cr_epilogue
cr_retdouble:
fld QWORD PTR [ecx]
jmp cr_epilogue
cr_retlongdouble:
fld TBYTE PTR [ecx]
jmp cr_epilogue
cr_epilogue:
;; Epilogue code is autogenerated.
ret
ffi_closure_raw_SYSV ENDP
#endif /* !FFI_NO_RAW_API */
ffi_closure_STDCALL PROC NEAR FORCEFRAME
;; the ffi_closure ctx is passed in eax by the trampoline.
sub esp, 40
lea edx, [ebp - 24]
mov [ebp - 12], edx ;; resp
lea edx, [ebp + 12] ;; account for stub return address on stack
mov [esp + 8], edx ;; args
lea edx, [ebp - 12]
mov [esp + 4], edx ;; &resp
mov [esp], eax ;; closure
call ffi_closure_SYSV_inner
mov ecx, [ebp - 12]
cd_jumptable:
jmp [cd_jumpdata + 4 * eax]
cd_jumpdata:
;; Do not insert anything here between the label and jump table.
dd offset cd_epilogue ;; FFI_TYPE_VOID
dd offset cd_retint ;; FFI_TYPE_INT
dd offset cd_retfloat ;; FFI_TYPE_FLOAT
dd offset cd_retdouble ;; FFI_TYPE_DOUBLE
dd offset cd_retlongdouble ;; FFI_TYPE_LONGDOUBLE
dd offset cd_retuint8 ;; FFI_TYPE_UINT8
dd offset cd_retsint8 ;; FFI_TYPE_SINT8
dd offset cd_retuint16 ;; FFI_TYPE_UINT16
dd offset cd_retsint16 ;; FFI_TYPE_SINT16
dd offset cd_retint ;; FFI_TYPE_UINT32
dd offset cd_retint ;; FFI_TYPE_SINT32
dd offset cd_retint64 ;; FFI_TYPE_UINT64
dd offset cd_retint64 ;; FFI_TYPE_SINT64
dd offset cd_epilogue ;; FFI_TYPE_STRUCT
dd offset cd_retint ;; FFI_TYPE_POINTER
dd offset cd_retsint8 ;; FFI_TYPE_SMALL_STRUCT_1B
dd offset cd_retsint16 ;; FFI_TYPE_SMALL_STRUCT_2B
dd offset cd_retint ;; FFI_TYPE_SMALL_STRUCT_4B
cd_retuint8:
movzx eax, BYTE PTR [ecx]
jmp cd_epilogue
cd_retsint8:
movsx eax, BYTE PTR [ecx]
jmp cd_epilogue
cd_retuint16:
movzx eax, WORD PTR [ecx]
jmp cd_epilogue
cd_retsint16:
movsx eax, WORD PTR [ecx]
jmp cd_epilogue
cd_retint:
mov eax, [ecx]
jmp cd_epilogue
cd_retint64:
mov eax, [ecx + 0]
mov edx, [ecx + 4]
jmp cd_epilogue
cd_retfloat:
fld DWORD PTR [ecx]
jmp cd_epilogue
cd_retdouble:
fld QWORD PTR [ecx]
jmp cd_epilogue
cd_retlongdouble:
fld TBYTE PTR [ecx]
jmp cd_epilogue
cd_epilogue:
;; Epilogue code is autogenerated.
ret
ffi_closure_STDCALL ENDP
_TEXT ENDS
END
#else
.text
# This assumes we are using gas.
.balign 16
.globl _ffi_call_win32
#ifndef __OS2__
.def _ffi_call_win32; .scl 2; .type 32; .endef
#endif
_ffi_call_win32:
.LFB1:
pushl %ebp
.LCFI0:
movl %esp,%ebp
.LCFI1:
# Make room for all of the new args.
movl 20(%ebp),%ecx
subl %ecx,%esp
movl %esp,%eax
# Place all of the ffi_prep_args in position
pushl 12(%ebp)
pushl %eax
call *8(%ebp)
# Return stack to previous state and call the function
addl $8,%esp
# Handle fastcall and thiscall
cmpl $3, 16(%ebp) # FFI_THISCALL
jz .do_thiscall
cmpl $4, 16(%ebp) # FFI_FASTCALL
jnz .do_fncall
movl (%esp), %ecx
movl 4(%esp), %edx
addl $8, %esp
jmp .do_fncall
.do_thiscall:
movl (%esp), %ecx
addl $4, %esp
.do_fncall:
# FIXME: Align the stack to a 128-bit boundary to avoid
# potential performance hits.
call *32(%ebp)
# stdcall functions pop arguments off the stack themselves
# Load %ecx with the return type code
movl 24(%ebp),%ecx
# If the return value pointer is NULL, assume no return value.
cmpl $0,28(%ebp)
jne 0f
# Even if there is no space for the return value, we are
# obliged to handle floating-point values.
cmpl $FFI_TYPE_FLOAT,%ecx
jne .Lnoretval
fstp %st(0)
jmp .Lepilogue
0:
call 1f
# Do not insert anything here between the call and the jump table.
.Lstore_table:
.long .Lnoretval /* FFI_TYPE_VOID */
.long .Lretint /* FFI_TYPE_INT */
.long .Lretfloat /* FFI_TYPE_FLOAT */
.long .Lretdouble /* FFI_TYPE_DOUBLE */
.long .Lretlongdouble /* FFI_TYPE_LONGDOUBLE */
.long .Lretuint8 /* FFI_TYPE_UINT8 */
.long .Lretsint8 /* FFI_TYPE_SINT8 */
.long .Lretuint16 /* FFI_TYPE_UINT16 */
.long .Lretsint16 /* FFI_TYPE_SINT16 */
.long .Lretint /* FFI_TYPE_UINT32 */
.long .Lretint /* FFI_TYPE_SINT32 */
.long .Lretint64 /* FFI_TYPE_UINT64 */
.long .Lretint64 /* FFI_TYPE_SINT64 */
.long .Lretstruct /* FFI_TYPE_STRUCT */
.long .Lretint /* FFI_TYPE_POINTER */
.long .Lretstruct1b /* FFI_TYPE_SMALL_STRUCT_1B */
.long .Lretstruct2b /* FFI_TYPE_SMALL_STRUCT_2B */
.long .Lretstruct4b /* FFI_TYPE_SMALL_STRUCT_4B */
.long .Lretstruct /* FFI_TYPE_MS_STRUCT */
1:
add %ecx, %ecx
add %ecx, %ecx
add (%esp),%ecx
add $4, %esp
jmp *(%ecx)
/* Sign/zero extend as appropriate. */
.Lretsint8:
movsbl %al, %eax
jmp .Lretint
.Lretsint16:
movswl %ax, %eax
jmp .Lretint
.Lretuint8:
movzbl %al, %eax
jmp .Lretint
.Lretuint16:
movzwl %ax, %eax
jmp .Lretint
.Lretint:
# Load %ecx with the pointer to storage for the return value
movl 28(%ebp),%ecx
movl %eax,0(%ecx)
jmp .Lepilogue
.Lretfloat:
# Load %ecx with the pointer to storage for the return value
movl 28(%ebp),%ecx
fstps (%ecx)
jmp .Lepilogue
.Lretdouble:
# Load %ecx with the pointer to storage for the return value
movl 28(%ebp),%ecx
fstpl (%ecx)
jmp .Lepilogue
.Lretlongdouble:
# Load %ecx with the pointer to storage for the return value
movl 28(%ebp),%ecx
fstpt (%ecx)
jmp .Lepilogue
.Lretint64:
# Load %ecx with the pointer to storage for the return value
movl 28(%ebp),%ecx
movl %eax,0(%ecx)
movl %edx,4(%ecx)
jmp .Lepilogue
.Lretstruct1b:
# Load %ecx with the pointer to storage for the return value
movl 28(%ebp),%ecx
movb %al,0(%ecx)
jmp .Lepilogue
.Lretstruct2b:
# Load %ecx with the pointer to storage for the return value
movl 28(%ebp),%ecx
movw %ax,0(%ecx)
jmp .Lepilogue
.Lretstruct4b:
# Load %ecx with the pointer to storage for the return value
movl 28(%ebp),%ecx
movl %eax,0(%ecx)
jmp .Lepilogue
.Lretstruct:
# Nothing to do!
.Lnoretval:
.Lepilogue:
movl %ebp,%esp
popl %ebp
ret
.ffi_call_win32_end:
.balign 16
.globl _ffi_closure_THISCALL
#ifndef __OS2__
.def _ffi_closure_THISCALL; .scl 2; .type 32; .endef
#endif
_ffi_closure_THISCALL:
pushl %ebp
movl %esp, %ebp
subl $40, %esp
leal -24(%ebp), %edx
movl %edx, -12(%ebp) /* resp */
leal 12(%ebp), %edx /* account for stub return address on stack */
jmp .stub
.LFE1:
# This assumes we are using gas.
.balign 16
.globl _ffi_closure_SYSV
#ifndef __OS2__
.def _ffi_closure_SYSV; .scl 2; .type 32; .endef
#endif
_ffi_closure_SYSV:
.LFB3:
pushl %ebp
.LCFI4:
movl %esp, %ebp
.LCFI5:
subl $40, %esp
leal -24(%ebp), %edx
movl %edx, -12(%ebp) /* resp */
leal 8(%ebp), %edx
.stub:
movl %edx, 4(%esp) /* args = __builtin_dwarf_cfa () */
leal -12(%ebp), %edx
movl %edx, (%esp) /* &resp */
call _ffi_closure_SYSV_inner
movl -12(%ebp), %ecx
0:
call 1f
# Do not insert anything here between the call and the jump table.
.Lcls_store_table:
.long .Lcls_noretval /* FFI_TYPE_VOID */
.long .Lcls_retint /* FFI_TYPE_INT */
.long .Lcls_retfloat /* FFI_TYPE_FLOAT */
.long .Lcls_retdouble /* FFI_TYPE_DOUBLE */
.long .Lcls_retldouble /* FFI_TYPE_LONGDOUBLE */
.long .Lcls_retuint8 /* FFI_TYPE_UINT8 */
.long .Lcls_retsint8 /* FFI_TYPE_SINT8 */
.long .Lcls_retuint16 /* FFI_TYPE_UINT16 */
.long .Lcls_retsint16 /* FFI_TYPE_SINT16 */
.long .Lcls_retint /* FFI_TYPE_UINT32 */
.long .Lcls_retint /* FFI_TYPE_SINT32 */
.long .Lcls_retllong /* FFI_TYPE_UINT64 */
.long .Lcls_retllong /* FFI_TYPE_SINT64 */
.long .Lcls_retstruct /* FFI_TYPE_STRUCT */
.long .Lcls_retint /* FFI_TYPE_POINTER */
.long .Lcls_retstruct1 /* FFI_TYPE_SMALL_STRUCT_1B */
.long .Lcls_retstruct2 /* FFI_TYPE_SMALL_STRUCT_2B */
.long .Lcls_retstruct4 /* FFI_TYPE_SMALL_STRUCT_4B */
.long .Lcls_retmsstruct /* FFI_TYPE_MS_STRUCT */
1:
add %eax, %eax
add %eax, %eax
add (%esp),%eax
add $4, %esp
jmp *(%eax)
/* Sign/zero extend as appropriate. */
.Lcls_retsint8:
movsbl (%ecx), %eax
jmp .Lcls_epilogue
.Lcls_retsint16:
movswl (%ecx), %eax
jmp .Lcls_epilogue
.Lcls_retuint8:
movzbl (%ecx), %eax
jmp .Lcls_epilogue
.Lcls_retuint16:
movzwl (%ecx), %eax
jmp .Lcls_epilogue
.Lcls_retint:
movl (%ecx), %eax
jmp .Lcls_epilogue
.Lcls_retfloat:
flds (%ecx)
jmp .Lcls_epilogue
.Lcls_retdouble:
fldl (%ecx)
jmp .Lcls_epilogue
.Lcls_retldouble:
fldt (%ecx)
jmp .Lcls_epilogue
.Lcls_retllong:
movl (%ecx), %eax
movl 4(%ecx), %edx
jmp .Lcls_epilogue
.Lcls_retstruct1:
movsbl (%ecx), %eax
jmp .Lcls_epilogue
.Lcls_retstruct2:
movswl (%ecx), %eax
jmp .Lcls_epilogue
.Lcls_retstruct4:
movl (%ecx), %eax
jmp .Lcls_epilogue
.Lcls_retstruct:
# Caller expects us to pop struct return value pointer hidden arg.
movl %ebp, %esp
popl %ebp
ret $0x4
.Lcls_retmsstruct:
# Caller expects us to return a pointer to the real return value.
mov %ecx, %eax
# Caller doesn't expects us to pop struct return value pointer hidden arg.
jmp .Lcls_epilogue
.Lcls_noretval:
.Lcls_epilogue:
movl %ebp, %esp
popl %ebp
ret
.ffi_closure_SYSV_end:
.LFE3:
#if !FFI_NO_RAW_API
#define RAW_CLOSURE_CIF_OFFSET ((FFI_TRAMPOLINE_SIZE + 3) & ~3)
#define RAW_CLOSURE_FUN_OFFSET (RAW_CLOSURE_CIF_OFFSET + 4)
#define RAW_CLOSURE_USER_DATA_OFFSET (RAW_CLOSURE_FUN_OFFSET + 4)
#define CIF_FLAGS_OFFSET 20
.balign 16
.globl _ffi_closure_raw_THISCALL
#ifndef __OS2__
.def _ffi_closure_raw_THISCALL; .scl 2; .type 32; .endef
#endif
_ffi_closure_raw_THISCALL:
pushl %ebp
movl %esp, %ebp
pushl %esi
subl $36, %esp
movl RAW_CLOSURE_CIF_OFFSET(%eax), %esi /* closure->cif */
movl RAW_CLOSURE_USER_DATA_OFFSET(%eax), %edx /* closure->user_data */
movl %edx, 12(%esp) /* user_data */
leal 12(%ebp), %edx /* __builtin_dwarf_cfa () */
jmp .stubraw
# This assumes we are using gas.
.balign 16
.globl _ffi_closure_raw_SYSV
#ifndef __OS2__
.def _ffi_closure_raw_SYSV; .scl 2; .type 32; .endef
#endif
_ffi_closure_raw_SYSV:
.LFB4:
pushl %ebp
.LCFI6:
movl %esp, %ebp
.LCFI7:
pushl %esi
.LCFI8:
subl $36, %esp
movl RAW_CLOSURE_CIF_OFFSET(%eax), %esi /* closure->cif */
movl RAW_CLOSURE_USER_DATA_OFFSET(%eax), %edx /* closure->user_data */
movl %edx, 12(%esp) /* user_data */
leal 8(%ebp), %edx /* __builtin_dwarf_cfa () */
.stubraw:
movl %edx, 8(%esp) /* raw_args */
leal -24(%ebp), %edx
movl %edx, 4(%esp) /* &res */
movl %esi, (%esp) /* cif */
call *RAW_CLOSURE_FUN_OFFSET(%eax) /* closure->fun */
movl CIF_FLAGS_OFFSET(%esi), %eax /* rtype */
0:
call 1f
# Do not insert anything here between the call and the jump table.
.Lrcls_store_table:
.long .Lrcls_noretval /* FFI_TYPE_VOID */
.long .Lrcls_retint /* FFI_TYPE_INT */
.long .Lrcls_retfloat /* FFI_TYPE_FLOAT */
.long .Lrcls_retdouble /* FFI_TYPE_DOUBLE */
.long .Lrcls_retldouble /* FFI_TYPE_LONGDOUBLE */
.long .Lrcls_retuint8 /* FFI_TYPE_UINT8 */
.long .Lrcls_retsint8 /* FFI_TYPE_SINT8 */
.long .Lrcls_retuint16 /* FFI_TYPE_UINT16 */
.long .Lrcls_retsint16 /* FFI_TYPE_SINT16 */
.long .Lrcls_retint /* FFI_TYPE_UINT32 */
.long .Lrcls_retint /* FFI_TYPE_SINT32 */
.long .Lrcls_retllong /* FFI_TYPE_UINT64 */
.long .Lrcls_retllong /* FFI_TYPE_SINT64 */
.long .Lrcls_retstruct /* FFI_TYPE_STRUCT */
.long .Lrcls_retint /* FFI_TYPE_POINTER */
.long .Lrcls_retstruct1 /* FFI_TYPE_SMALL_STRUCT_1B */
.long .Lrcls_retstruct2 /* FFI_TYPE_SMALL_STRUCT_2B */
.long .Lrcls_retstruct4 /* FFI_TYPE_SMALL_STRUCT_4B */
.long .Lrcls_retstruct /* FFI_TYPE_MS_STRUCT */
1:
add %eax, %eax
add %eax, %eax
add (%esp),%eax
add $4, %esp
jmp *(%eax)
/* Sign/zero extend as appropriate. */
.Lrcls_retsint8:
movsbl -24(%ebp), %eax
jmp .Lrcls_epilogue
.Lrcls_retsint16:
movswl -24(%ebp), %eax
jmp .Lrcls_epilogue
.Lrcls_retuint8:
movzbl -24(%ebp), %eax
jmp .Lrcls_epilogue
.Lrcls_retuint16:
movzwl -24(%ebp), %eax
jmp .Lrcls_epilogue
.Lrcls_retint:
movl -24(%ebp), %eax
jmp .Lrcls_epilogue
.Lrcls_retfloat:
flds -24(%ebp)
jmp .Lrcls_epilogue
.Lrcls_retdouble:
fldl -24(%ebp)
jmp .Lrcls_epilogue
.Lrcls_retldouble:
fldt -24(%ebp)
jmp .Lrcls_epilogue
.Lrcls_retllong:
movl -24(%ebp), %eax
movl -20(%ebp), %edx
jmp .Lrcls_epilogue
.Lrcls_retstruct1:
movsbl -24(%ebp), %eax
jmp .Lrcls_epilogue
.Lrcls_retstruct2:
movswl -24(%ebp), %eax
jmp .Lrcls_epilogue
.Lrcls_retstruct4:
movl -24(%ebp), %eax
jmp .Lrcls_epilogue
.Lrcls_retstruct:
# Nothing to do!
.Lrcls_noretval:
.Lrcls_epilogue:
addl $36, %esp
popl %esi
popl %ebp
ret
.ffi_closure_raw_SYSV_end:
.LFE4:
#endif /* !FFI_NO_RAW_API */
# This assumes we are using gas.
.balign 16
.globl _ffi_closure_STDCALL
#ifndef __OS2__
.def _ffi_closure_STDCALL; .scl 2; .type 32; .endef
#endif
_ffi_closure_STDCALL:
.LFB5:
pushl %ebp
.LCFI9:
movl %esp, %ebp
.LCFI10:
subl $40, %esp
leal -24(%ebp), %edx
movl %edx, -12(%ebp) /* resp */
leal 12(%ebp), %edx /* account for stub return address on stack */
movl %edx, 4(%esp) /* args */
leal -12(%ebp), %edx
movl %edx, (%esp) /* &resp */
call _ffi_closure_SYSV_inner
movl -12(%ebp), %ecx
0:
call 1f
# Do not insert anything here between the call and the jump table.
.Lscls_store_table:
.long .Lscls_noretval /* FFI_TYPE_VOID */
.long .Lscls_retint /* FFI_TYPE_INT */
.long .Lscls_retfloat /* FFI_TYPE_FLOAT */
.long .Lscls_retdouble /* FFI_TYPE_DOUBLE */
.long .Lscls_retldouble /* FFI_TYPE_LONGDOUBLE */
.long .Lscls_retuint8 /* FFI_TYPE_UINT8 */
.long .Lscls_retsint8 /* FFI_TYPE_SINT8 */
.long .Lscls_retuint16 /* FFI_TYPE_UINT16 */
.long .Lscls_retsint16 /* FFI_TYPE_SINT16 */
.long .Lscls_retint /* FFI_TYPE_UINT32 */
.long .Lscls_retint /* FFI_TYPE_SINT32 */
.long .Lscls_retllong /* FFI_TYPE_UINT64 */
.long .Lscls_retllong /* FFI_TYPE_SINT64 */
.long .Lscls_retstruct /* FFI_TYPE_STRUCT */
.long .Lscls_retint /* FFI_TYPE_POINTER */
.long .Lscls_retstruct1 /* FFI_TYPE_SMALL_STRUCT_1B */
.long .Lscls_retstruct2 /* FFI_TYPE_SMALL_STRUCT_2B */
.long .Lscls_retstruct4 /* FFI_TYPE_SMALL_STRUCT_4B */
1:
add %eax, %eax
add %eax, %eax
add (%esp),%eax
add $4, %esp
jmp *(%eax)
/* Sign/zero extend as appropriate. */
.Lscls_retsint8:
movsbl (%ecx), %eax
jmp .Lscls_epilogue
.Lscls_retsint16:
movswl (%ecx), %eax
jmp .Lscls_epilogue
.Lscls_retuint8:
movzbl (%ecx), %eax
jmp .Lscls_epilogue
.Lscls_retuint16:
movzwl (%ecx), %eax
jmp .Lscls_epilogue
.Lscls_retint:
movl (%ecx), %eax
jmp .Lscls_epilogue
.Lscls_retfloat:
flds (%ecx)
jmp .Lscls_epilogue
.Lscls_retdouble:
fldl (%ecx)
jmp .Lscls_epilogue
.Lscls_retldouble:
fldt (%ecx)
jmp .Lscls_epilogue
.Lscls_retllong:
movl (%ecx), %eax
movl 4(%ecx), %edx
jmp .Lscls_epilogue
.Lscls_retstruct1:
movsbl (%ecx), %eax
jmp .Lscls_epilogue
.Lscls_retstruct2:
movswl (%ecx), %eax
jmp .Lscls_epilogue
.Lscls_retstruct4:
movl (%ecx), %eax
jmp .Lscls_epilogue
.Lscls_retstruct:
# Nothing to do!
.Lscls_noretval:
.Lscls_epilogue:
movl %ebp, %esp
popl %ebp
ret
.ffi_closure_STDCALL_end:
.LFE5:
#ifndef __OS2__
.section .eh_frame,"w"
#endif
.Lframe1:
.LSCIE1:
.long .LECIE1-.LASCIE1 /* Length of Common Information Entry */
.LASCIE1:
.long 0x0 /* CIE Identifier Tag */
.byte 0x1 /* CIE Version */
#ifdef __PIC__
.ascii "zR\0" /* CIE Augmentation */
#else
.ascii "\0" /* CIE Augmentation */
#endif
.byte 0x1 /* .uleb128 0x1; CIE Code Alignment Factor */
.byte 0x7c /* .sleb128 -4; CIE Data Alignment Factor */
.byte 0x8 /* CIE RA Column */
#ifdef __PIC__
.byte 0x1 /* .uleb128 0x1; Augmentation size */
.byte 0x1b /* FDE Encoding (pcrel sdata4) */
#endif
.byte 0xc /* DW_CFA_def_cfa CFA = r4 + 4 = 4(%esp) */
.byte 0x4 /* .uleb128 0x4 */
.byte 0x4 /* .uleb128 0x4 */
.byte 0x88 /* DW_CFA_offset, column 0x8 %eip at CFA + 1 * -4 */
.byte 0x1 /* .uleb128 0x1 */
.align 4
.LECIE1:
.LSFDE1:
.long .LEFDE1-.LASFDE1 /* FDE Length */
.LASFDE1:
.long .LASFDE1-.Lframe1 /* FDE CIE offset */
#if defined __PIC__ && defined HAVE_AS_X86_PCREL
.long .LFB1-. /* FDE initial location */
#else
.long .LFB1
#endif
.long .LFE1-.LFB1 /* FDE address range */
#ifdef __PIC__
.byte 0x0 /* .uleb128 0x0; Augmentation size */
#endif
/* DW_CFA_xxx CFI instructions go here. */
.byte 0x4 /* DW_CFA_advance_loc4 */
.long .LCFI0-.LFB1
.byte 0xe /* DW_CFA_def_cfa_offset CFA = r4 + 8 = 8(%esp) */
.byte 0x8 /* .uleb128 0x8 */
.byte 0x85 /* DW_CFA_offset, column 0x5 %ebp at CFA + 2 * -4 */
.byte 0x2 /* .uleb128 0x2 */
.byte 0x4 /* DW_CFA_advance_loc4 */
.long .LCFI1-.LCFI0
.byte 0xd /* DW_CFA_def_cfa_register CFA = r5 = %ebp */
.byte 0x5 /* .uleb128 0x5 */
/* End of DW_CFA_xxx CFI instructions. */
.align 4
.LEFDE1:
.LSFDE3:
.long .LEFDE3-.LASFDE3 /* FDE Length */
.LASFDE3:
.long .LASFDE3-.Lframe1 /* FDE CIE offset */
#if defined __PIC__ && defined HAVE_AS_X86_PCREL
.long .LFB3-. /* FDE initial location */
#else
.long .LFB3
#endif
.long .LFE3-.LFB3 /* FDE address range */
#ifdef __PIC__
.byte 0x0 /* .uleb128 0x0; Augmentation size */
#endif
/* DW_CFA_xxx CFI instructions go here. */
.byte 0x4 /* DW_CFA_advance_loc4 */
.long .LCFI4-.LFB3
.byte 0xe /* DW_CFA_def_cfa_offset CFA = r4 + 8 = 8(%esp) */
.byte 0x8 /* .uleb128 0x8 */
.byte 0x85 /* DW_CFA_offset, column 0x5 %ebp at CFA + 2 * -4 */
.byte 0x2 /* .uleb128 0x2 */
.byte 0x4 /* DW_CFA_advance_loc4 */
.long .LCFI5-.LCFI4
.byte 0xd /* DW_CFA_def_cfa_register CFA = r5 = %ebp */
.byte 0x5 /* .uleb128 0x5 */
/* End of DW_CFA_xxx CFI instructions. */
.align 4
.LEFDE3:
#if !FFI_NO_RAW_API
.LSFDE4:
.long .LEFDE4-.LASFDE4 /* FDE Length */
.LASFDE4:
.long .LASFDE4-.Lframe1 /* FDE CIE offset */
#if defined __PIC__ && defined HAVE_AS_X86_PCREL
.long .LFB4-. /* FDE initial location */
#else
.long .LFB4
#endif
.long .LFE4-.LFB4 /* FDE address range */
#ifdef __PIC__
.byte 0x0 /* .uleb128 0x0; Augmentation size */
#endif
/* DW_CFA_xxx CFI instructions go here. */
.byte 0x4 /* DW_CFA_advance_loc4 */
.long .LCFI6-.LFB4
.byte 0xe /* DW_CFA_def_cfa_offset CFA = r4 + 8 = 8(%esp) */
.byte 0x8 /* .uleb128 0x8 */
.byte 0x85 /* DW_CFA_offset, column 0x5 %ebp at CFA + 2 * -4 */
.byte 0x2 /* .uleb128 0x2 */
.byte 0x4 /* DW_CFA_advance_loc4 */
.long .LCFI7-.LCFI6
.byte 0xd /* DW_CFA_def_cfa_register CFA = r5 = %ebp */
.byte 0x5 /* .uleb128 0x5 */
.byte 0x4 /* DW_CFA_advance_loc4 */
.long .LCFI8-.LCFI7
.byte 0x86 /* DW_CFA_offset, column 0x6 %esi at CFA + 3 * -4 */
.byte 0x3 /* .uleb128 0x3 */
/* End of DW_CFA_xxx CFI instructions. */
.align 4
.LEFDE4:
#endif /* !FFI_NO_RAW_API */
.LSFDE5:
.long .LEFDE5-.LASFDE5 /* FDE Length */
.LASFDE5:
.long .LASFDE5-.Lframe1 /* FDE CIE offset */
#if defined __PIC__ && defined HAVE_AS_X86_PCREL
.long .LFB5-. /* FDE initial location */
#else
.long .LFB5
#endif
.long .LFE5-.LFB5 /* FDE address range */
#ifdef __PIC__
.byte 0x0 /* .uleb128 0x0; Augmentation size */
#endif
/* DW_CFA_xxx CFI instructions go here. */
.byte 0x4 /* DW_CFA_advance_loc4 */
.long .LCFI9-.LFB5
.byte 0xe /* DW_CFA_def_cfa_offset CFA = r4 + 8 = 8(%esp) */
.byte 0x8 /* .uleb128 0x8 */
.byte 0x85 /* DW_CFA_offset, column 0x5 %ebp at CFA + 2 * -4 */
.byte 0x2 /* .uleb128 0x2 */
.byte 0x4 /* DW_CFA_advance_loc4 */
.long .LCFI10-.LCFI9
.byte 0xd /* DW_CFA_def_cfa_register CFA = r5 = %ebp */
.byte 0x5 /* .uleb128 0x5 */
/* End of DW_CFA_xxx CFI instructions. */
.align 4
.LEFDE5:
#endif /* !_MSC_VER */
|
suryaveeryadav/Python-3.4.0
| 9,827
|
Modules/_ctypes/libffi/src/x86/darwin.S
|
/* -----------------------------------------------------------------------
darwin.S - Copyright (c) 1996, 1998, 2001, 2002, 2003, 2005 Red Hat, Inc.
Copyright (C) 2008 Free Software Foundation, Inc.
X86 Foreign Function Interface
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
DEALINGS IN THE SOFTWARE.
-----------------------------------------------------------------------
*/
#ifndef __x86_64__
#define LIBFFI_ASM
#include <fficonfig.h>
#include <ffi.h>
.text
.globl _ffi_prep_args
.align 4
.globl _ffi_call_SYSV
_ffi_call_SYSV:
.LFB1:
pushl %ebp
.LCFI0:
movl %esp,%ebp
.LCFI1:
subl $8,%esp
/* Make room for all of the new args. */
movl 16(%ebp),%ecx
subl %ecx,%esp
movl %esp,%eax
/* Place all of the ffi_prep_args in position */
subl $8,%esp
pushl 12(%ebp)
pushl %eax
call *8(%ebp)
/* Return stack to previous state and call the function */
addl $16,%esp
call *28(%ebp)
/* Load %ecx with the return type code */
movl 20(%ebp),%ecx
/* Protect %esi. We're going to pop it in the epilogue. */
pushl %esi
/* If the return value pointer is NULL, assume no return value. */
cmpl $0,24(%ebp)
jne 0f
/* Even if there is no space for the return value, we are
obliged to handle floating-point values. */
cmpl $FFI_TYPE_FLOAT,%ecx
jne noretval
fstp %st(0)
jmp epilogue
0:
.align 4
call 1f
.Lstore_table:
.long noretval-.Lstore_table /* FFI_TYPE_VOID */
.long retint-.Lstore_table /* FFI_TYPE_INT */
.long retfloat-.Lstore_table /* FFI_TYPE_FLOAT */
.long retdouble-.Lstore_table /* FFI_TYPE_DOUBLE */
.long retlongdouble-.Lstore_table /* FFI_TYPE_LONGDOUBLE */
.long retuint8-.Lstore_table /* FFI_TYPE_UINT8 */
.long retsint8-.Lstore_table /* FFI_TYPE_SINT8 */
.long retuint16-.Lstore_table /* FFI_TYPE_UINT16 */
.long retsint16-.Lstore_table /* FFI_TYPE_SINT16 */
.long retint-.Lstore_table /* FFI_TYPE_UINT32 */
.long retint-.Lstore_table /* FFI_TYPE_SINT32 */
.long retint64-.Lstore_table /* FFI_TYPE_UINT64 */
.long retint64-.Lstore_table /* FFI_TYPE_SINT64 */
.long retstruct-.Lstore_table /* FFI_TYPE_STRUCT */
.long retint-.Lstore_table /* FFI_TYPE_POINTER */
.long retstruct1b-.Lstore_table /* FFI_TYPE_SMALL_STRUCT_1B */
.long retstruct2b-.Lstore_table /* FFI_TYPE_SMALL_STRUCT_2B */
1:
pop %esi
add (%esi, %ecx, 4), %esi
jmp *%esi
/* Sign/zero extend as appropriate. */
retsint8:
movsbl %al, %eax
jmp retint
retsint16:
movswl %ax, %eax
jmp retint
retuint8:
movzbl %al, %eax
jmp retint
retuint16:
movzwl %ax, %eax
jmp retint
retfloat:
/* Load %ecx with the pointer to storage for the return value */
movl 24(%ebp),%ecx
fstps (%ecx)
jmp epilogue
retdouble:
/* Load %ecx with the pointer to storage for the return value */
movl 24(%ebp),%ecx
fstpl (%ecx)
jmp epilogue
retlongdouble:
/* Load %ecx with the pointer to storage for the return value */
movl 24(%ebp),%ecx
fstpt (%ecx)
jmp epilogue
retint64:
/* Load %ecx with the pointer to storage for the return value */
movl 24(%ebp),%ecx
movl %eax,0(%ecx)
movl %edx,4(%ecx)
jmp epilogue
retstruct1b:
/* Load %ecx with the pointer to storage for the return value */
movl 24(%ebp),%ecx
movb %al,0(%ecx)
jmp epilogue
retstruct2b:
/* Load %ecx with the pointer to storage for the return value */
movl 24(%ebp),%ecx
movw %ax,0(%ecx)
jmp epilogue
retint:
/* Load %ecx with the pointer to storage for the return value */
movl 24(%ebp),%ecx
movl %eax,0(%ecx)
retstruct:
/* Nothing to do! */
noretval:
epilogue:
popl %esi
movl %ebp,%esp
popl %ebp
ret
.LFE1:
.ffi_call_SYSV_end:
.align 4
FFI_HIDDEN (ffi_closure_SYSV)
.globl _ffi_closure_SYSV
_ffi_closure_SYSV:
.LFB2:
pushl %ebp
.LCFI2:
movl %esp, %ebp
.LCFI3:
subl $40, %esp
leal -24(%ebp), %edx
movl %edx, -12(%ebp) /* resp */
leal 8(%ebp), %edx
movl %edx, 4(%esp) /* args = __builtin_dwarf_cfa () */
leal -12(%ebp), %edx
movl %edx, (%esp) /* &resp */
movl %ebx, 8(%esp)
.LCFI7:
call L_ffi_closure_SYSV_inner$stub
movl 8(%esp), %ebx
movl -12(%ebp), %ecx
cmpl $FFI_TYPE_INT, %eax
je .Lcls_retint
/* Handle FFI_TYPE_UINT8, FFI_TYPE_SINT8, FFI_TYPE_UINT16,
FFI_TYPE_SINT16, FFI_TYPE_UINT32, FFI_TYPE_SINT32. */
cmpl $FFI_TYPE_UINT64, %eax
jge 0f
cmpl $FFI_TYPE_UINT8, %eax
jge .Lcls_retint
0: cmpl $FFI_TYPE_FLOAT, %eax
je .Lcls_retfloat
cmpl $FFI_TYPE_DOUBLE, %eax
je .Lcls_retdouble
cmpl $FFI_TYPE_LONGDOUBLE, %eax
je .Lcls_retldouble
cmpl $FFI_TYPE_SINT64, %eax
je .Lcls_retllong
cmpl $FFI_TYPE_SMALL_STRUCT_1B, %eax
je .Lcls_retstruct1b
cmpl $FFI_TYPE_SMALL_STRUCT_2B, %eax
je .Lcls_retstruct2b
cmpl $FFI_TYPE_STRUCT, %eax
je .Lcls_retstruct
.Lcls_epilogue:
movl %ebp, %esp
popl %ebp
ret
.Lcls_retint:
movl (%ecx), %eax
jmp .Lcls_epilogue
.Lcls_retfloat:
flds (%ecx)
jmp .Lcls_epilogue
.Lcls_retdouble:
fldl (%ecx)
jmp .Lcls_epilogue
.Lcls_retldouble:
fldt (%ecx)
jmp .Lcls_epilogue
.Lcls_retllong:
movl (%ecx), %eax
movl 4(%ecx), %edx
jmp .Lcls_epilogue
.Lcls_retstruct1b:
movsbl (%ecx), %eax
jmp .Lcls_epilogue
.Lcls_retstruct2b:
movswl (%ecx), %eax
jmp .Lcls_epilogue
.Lcls_retstruct:
lea -8(%ebp),%esp
movl %ebp, %esp
popl %ebp
ret $4
.LFE2:
#if !FFI_NO_RAW_API
#define RAW_CLOSURE_CIF_OFFSET ((FFI_TRAMPOLINE_SIZE + 3) & ~3)
#define RAW_CLOSURE_FUN_OFFSET (RAW_CLOSURE_CIF_OFFSET + 4)
#define RAW_CLOSURE_USER_DATA_OFFSET (RAW_CLOSURE_FUN_OFFSET + 4)
#define CIF_FLAGS_OFFSET 20
.align 4
FFI_HIDDEN (ffi_closure_raw_SYSV)
.globl _ffi_closure_raw_SYSV
_ffi_closure_raw_SYSV:
.LFB3:
pushl %ebp
.LCFI4:
movl %esp, %ebp
.LCFI5:
pushl %esi
.LCFI6:
subl $36, %esp
movl RAW_CLOSURE_CIF_OFFSET(%eax), %esi /* closure->cif */
movl RAW_CLOSURE_USER_DATA_OFFSET(%eax), %edx /* closure->user_data */
movl %edx, 12(%esp) /* user_data */
leal 8(%ebp), %edx /* __builtin_dwarf_cfa () */
movl %edx, 8(%esp) /* raw_args */
leal -24(%ebp), %edx
movl %edx, 4(%esp) /* &res */
movl %esi, (%esp) /* cif */
call *RAW_CLOSURE_FUN_OFFSET(%eax) /* closure->fun */
movl CIF_FLAGS_OFFSET(%esi), %eax /* rtype */
cmpl $FFI_TYPE_INT, %eax
je .Lrcls_retint
/* Handle FFI_TYPE_UINT8, FFI_TYPE_SINT8, FFI_TYPE_UINT16,
FFI_TYPE_SINT16, FFI_TYPE_UINT32, FFI_TYPE_SINT32. */
cmpl $FFI_TYPE_UINT64, %eax
jge 0f
cmpl $FFI_TYPE_UINT8, %eax
jge .Lrcls_retint
0:
cmpl $FFI_TYPE_FLOAT, %eax
je .Lrcls_retfloat
cmpl $FFI_TYPE_DOUBLE, %eax
je .Lrcls_retdouble
cmpl $FFI_TYPE_LONGDOUBLE, %eax
je .Lrcls_retldouble
cmpl $FFI_TYPE_SINT64, %eax
je .Lrcls_retllong
.Lrcls_epilogue:
addl $36, %esp
popl %esi
popl %ebp
ret
.Lrcls_retint:
movl -24(%ebp), %eax
jmp .Lrcls_epilogue
.Lrcls_retfloat:
flds -24(%ebp)
jmp .Lrcls_epilogue
.Lrcls_retdouble:
fldl -24(%ebp)
jmp .Lrcls_epilogue
.Lrcls_retldouble:
fldt -24(%ebp)
jmp .Lrcls_epilogue
.Lrcls_retllong:
movl -24(%ebp), %eax
movl -20(%ebp), %edx
jmp .Lrcls_epilogue
.LFE3:
#endif
.section __IMPORT,__jump_table,symbol_stubs,self_modifying_code+pure_instructions,5
L_ffi_closure_SYSV_inner$stub:
.indirect_symbol _ffi_closure_SYSV_inner
hlt ; hlt ; hlt ; hlt ; hlt
.section __TEXT,__eh_frame,coalesced,no_toc+strip_static_syms+live_support
EH_frame1:
.set L$set$0,LECIE1-LSCIE1
.long L$set$0
LSCIE1:
.long 0x0
.byte 0x1
.ascii "zR\0"
.byte 0x1
.byte 0x7c
.byte 0x8
.byte 0x1
.byte 0x10
.byte 0xc
.byte 0x5
.byte 0x4
.byte 0x88
.byte 0x1
.align 2
LECIE1:
.globl _ffi_call_SYSV.eh
_ffi_call_SYSV.eh:
LSFDE1:
.set L$set$1,LEFDE1-LASFDE1
.long L$set$1
LASFDE1:
.long LASFDE1-EH_frame1
.long .LFB1-.
.set L$set$2,.LFE1-.LFB1
.long L$set$2
.byte 0x0
.byte 0x4
.set L$set$3,.LCFI0-.LFB1
.long L$set$3
.byte 0xe
.byte 0x8
.byte 0x84
.byte 0x2
.byte 0x4
.set L$set$4,.LCFI1-.LCFI0
.long L$set$4
.byte 0xd
.byte 0x4
.align 2
LEFDE1:
.globl _ffi_closure_SYSV.eh
_ffi_closure_SYSV.eh:
LSFDE2:
.set L$set$5,LEFDE2-LASFDE2
.long L$set$5
LASFDE2:
.long LASFDE2-EH_frame1
.long .LFB2-.
.set L$set$6,.LFE2-.LFB2
.long L$set$6
.byte 0x0
.byte 0x4
.set L$set$7,.LCFI2-.LFB2
.long L$set$7
.byte 0xe
.byte 0x8
.byte 0x84
.byte 0x2
.byte 0x4
.set L$set$8,.LCFI3-.LCFI2
.long L$set$8
.byte 0xd
.byte 0x4
.align 2
LEFDE2:
#if !FFI_NO_RAW_API
.globl _ffi_closure_raw_SYSV.eh
_ffi_closure_raw_SYSV.eh:
LSFDE3:
.set L$set$10,LEFDE3-LASFDE3
.long L$set$10
LASFDE3:
.long LASFDE3-EH_frame1
.long .LFB3-.
.set L$set$11,.LFE3-.LFB3
.long L$set$11
.byte 0x0
.byte 0x4
.set L$set$12,.LCFI4-.LFB3
.long L$set$12
.byte 0xe
.byte 0x8
.byte 0x84
.byte 0x2
.byte 0x4
.set L$set$13,.LCFI5-.LCFI4
.long L$set$13
.byte 0xd
.byte 0x4
.byte 0x4
.set L$set$14,.LCFI6-.LCFI5
.long L$set$14
.byte 0x85
.byte 0x3
.align 2
LEFDE3:
#endif
#endif /* ifndef __x86_64__ */
|
suryaveeryadav/Python-3.4.0
| 11,649
|
Modules/_ctypes/libffi/src/ia64/unix.S
|
/* -----------------------------------------------------------------------
unix.S - Copyright (c) 1998, 2008 Red Hat, Inc.
Copyright (c) 2000 Hewlett Packard Company
IA64/unix Foreign Function Interface
Primary author: Hans Boehm, HP Labs
Loosely modeled on Cygnus code for other platforms.
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
DEALINGS IN THE SOFTWARE.
----------------------------------------------------------------------- */
#define LIBFFI_ASM
#include <fficonfig.h>
#include <ffi.h>
#include "ia64_flags.h"
.pred.safe_across_calls p1-p5,p16-p63
.text
/* int ffi_call_unix (struct ia64_args *stack, PTR64 rvalue,
void (*fn)(void), int flags);
*/
.align 16
.global ffi_call_unix
.proc ffi_call_unix
ffi_call_unix:
.prologue
/* Bit o trickiness. We actually share a stack frame with ffi_call.
Rely on the fact that ffi_call uses a vframe and don't bother
tracking one here at all. */
.fframe 0
.save ar.pfs, r36 // loc0
alloc loc0 = ar.pfs, 4, 3, 8, 0
.save rp, loc1
mov loc1 = b0
.body
add r16 = 16, in0
mov loc2 = gp
mov r8 = in1
;;
/* Load up all of the argument registers. */
ldf.fill f8 = [in0], 32
ldf.fill f9 = [r16], 32
;;
ldf.fill f10 = [in0], 32
ldf.fill f11 = [r16], 32
;;
ldf.fill f12 = [in0], 32
ldf.fill f13 = [r16], 32
;;
ldf.fill f14 = [in0], 32
ldf.fill f15 = [r16], 24
;;
ld8 out0 = [in0], 16
ld8 out1 = [r16], 16
;;
ld8 out2 = [in0], 16
ld8 out3 = [r16], 16
;;
ld8 out4 = [in0], 16
ld8 out5 = [r16], 16
;;
ld8 out6 = [in0]
ld8 out7 = [r16]
;;
/* Deallocate the register save area from the stack frame. */
mov sp = in0
/* Call the target function. */
ld8 r16 = [in2], 8
;;
ld8 gp = [in2]
mov b6 = r16
br.call.sptk.many b0 = b6
;;
/* Dispatch to handle return value. */
mov gp = loc2
zxt1 r16 = in3
;;
mov ar.pfs = loc0
addl r18 = @ltoffx(.Lst_table), gp
;;
ld8.mov r18 = [r18], .Lst_table
mov b0 = loc1
;;
shladd r18 = r16, 3, r18
;;
ld8 r17 = [r18]
shr in3 = in3, 8
;;
add r17 = r17, r18
;;
mov b6 = r17
br b6
;;
.Lst_void:
br.ret.sptk.many b0
;;
.Lst_uint8:
zxt1 r8 = r8
;;
st8 [in1] = r8
br.ret.sptk.many b0
;;
.Lst_sint8:
sxt1 r8 = r8
;;
st8 [in1] = r8
br.ret.sptk.many b0
;;
.Lst_uint16:
zxt2 r8 = r8
;;
st8 [in1] = r8
br.ret.sptk.many b0
;;
.Lst_sint16:
sxt2 r8 = r8
;;
st8 [in1] = r8
br.ret.sptk.many b0
;;
.Lst_uint32:
zxt4 r8 = r8
;;
st8 [in1] = r8
br.ret.sptk.many b0
;;
.Lst_sint32:
sxt4 r8 = r8
;;
st8 [in1] = r8
br.ret.sptk.many b0
;;
.Lst_int64:
st8 [in1] = r8
br.ret.sptk.many b0
;;
.Lst_float:
stfs [in1] = f8
br.ret.sptk.many b0
;;
.Lst_double:
stfd [in1] = f8
br.ret.sptk.many b0
;;
.Lst_ldouble:
stfe [in1] = f8
br.ret.sptk.many b0
;;
.Lst_small_struct:
add sp = -16, sp
cmp.lt p6, p0 = 8, in3
cmp.lt p7, p0 = 16, in3
cmp.lt p8, p0 = 24, in3
;;
add r16 = 8, sp
add r17 = 16, sp
add r18 = 24, sp
;;
st8 [sp] = r8
(p6) st8 [r16] = r9
mov out0 = in1
(p7) st8 [r17] = r10
(p8) st8 [r18] = r11
mov out1 = sp
mov out2 = in3
br.call.sptk.many b0 = memcpy#
;;
mov ar.pfs = loc0
mov b0 = loc1
mov gp = loc2
br.ret.sptk.many b0
.Lst_hfa_float:
add r16 = 4, in1
cmp.lt p6, p0 = 4, in3
;;
stfs [in1] = f8, 8
(p6) stfs [r16] = f9, 8
cmp.lt p7, p0 = 8, in3
cmp.lt p8, p0 = 12, in3
;;
(p7) stfs [in1] = f10, 8
(p8) stfs [r16] = f11, 8
cmp.lt p9, p0 = 16, in3
cmp.lt p10, p0 = 20, in3
;;
(p9) stfs [in1] = f12, 8
(p10) stfs [r16] = f13, 8
cmp.lt p6, p0 = 24, in3
cmp.lt p7, p0 = 28, in3
;;
(p6) stfs [in1] = f14
(p7) stfs [r16] = f15
br.ret.sptk.many b0
;;
.Lst_hfa_double:
add r16 = 8, in1
cmp.lt p6, p0 = 8, in3
;;
stfd [in1] = f8, 16
(p6) stfd [r16] = f9, 16
cmp.lt p7, p0 = 16, in3
cmp.lt p8, p0 = 24, in3
;;
(p7) stfd [in1] = f10, 16
(p8) stfd [r16] = f11, 16
cmp.lt p9, p0 = 32, in3
cmp.lt p10, p0 = 40, in3
;;
(p9) stfd [in1] = f12, 16
(p10) stfd [r16] = f13, 16
cmp.lt p6, p0 = 48, in3
cmp.lt p7, p0 = 56, in3
;;
(p6) stfd [in1] = f14
(p7) stfd [r16] = f15
br.ret.sptk.many b0
;;
.Lst_hfa_ldouble:
add r16 = 16, in1
cmp.lt p6, p0 = 16, in3
;;
stfe [in1] = f8, 32
(p6) stfe [r16] = f9, 32
cmp.lt p7, p0 = 32, in3
cmp.lt p8, p0 = 48, in3
;;
(p7) stfe [in1] = f10, 32
(p8) stfe [r16] = f11, 32
cmp.lt p9, p0 = 64, in3
cmp.lt p10, p0 = 80, in3
;;
(p9) stfe [in1] = f12, 32
(p10) stfe [r16] = f13, 32
cmp.lt p6, p0 = 96, in3
cmp.lt p7, p0 = 112, in3
;;
(p6) stfe [in1] = f14
(p7) stfe [r16] = f15
br.ret.sptk.many b0
;;
.endp ffi_call_unix
.align 16
.global ffi_closure_unix
.proc ffi_closure_unix
#define FRAME_SIZE (8*16 + 8*8 + 8*16)
ffi_closure_unix:
.prologue
.save ar.pfs, r40 // loc0
alloc loc0 = ar.pfs, 8, 4, 4, 0
.fframe FRAME_SIZE
add r12 = -FRAME_SIZE, r12
.save rp, loc1
mov loc1 = b0
.save ar.unat, loc2
mov loc2 = ar.unat
.body
/* Retrieve closure pointer and real gp. */
#ifdef _ILP32
addp4 out0 = 0, gp
addp4 gp = 16, gp
#else
mov out0 = gp
add gp = 16, gp
#endif
;;
ld8 gp = [gp]
/* Spill all of the possible argument registers. */
add r16 = 16 + 8*16, sp
add r17 = 16 + 8*16 + 16, sp
;;
stf.spill [r16] = f8, 32
stf.spill [r17] = f9, 32
mov loc3 = gp
;;
stf.spill [r16] = f10, 32
stf.spill [r17] = f11, 32
;;
stf.spill [r16] = f12, 32
stf.spill [r17] = f13, 32
;;
stf.spill [r16] = f14, 32
stf.spill [r17] = f15, 24
;;
.mem.offset 0, 0
st8.spill [r16] = in0, 16
.mem.offset 8, 0
st8.spill [r17] = in1, 16
add out1 = 16 + 8*16, sp
;;
.mem.offset 0, 0
st8.spill [r16] = in2, 16
.mem.offset 8, 0
st8.spill [r17] = in3, 16
add out2 = 16, sp
;;
.mem.offset 0, 0
st8.spill [r16] = in4, 16
.mem.offset 8, 0
st8.spill [r17] = in5, 16
mov out3 = r8
;;
.mem.offset 0, 0
st8.spill [r16] = in6
.mem.offset 8, 0
st8.spill [r17] = in7
/* Invoke ffi_closure_unix_inner for the hard work. */
br.call.sptk.many b0 = ffi_closure_unix_inner
;;
/* Dispatch to handle return value. */
mov gp = loc3
zxt1 r16 = r8
;;
addl r18 = @ltoffx(.Lld_table), gp
mov ar.pfs = loc0
;;
ld8.mov r18 = [r18], .Lld_table
mov b0 = loc1
;;
shladd r18 = r16, 3, r18
mov ar.unat = loc2
;;
ld8 r17 = [r18]
shr r8 = r8, 8
;;
add r17 = r17, r18
add r16 = 16, sp
;;
mov b6 = r17
br b6
;;
.label_state 1
.Lld_void:
.restore sp
add sp = FRAME_SIZE, sp
br.ret.sptk.many b0
;;
.Lld_int:
.body
.copy_state 1
ld8 r8 = [r16]
.restore sp
add sp = FRAME_SIZE, sp
br.ret.sptk.many b0
;;
.Lld_float:
.body
.copy_state 1
ldfs f8 = [r16]
.restore sp
add sp = FRAME_SIZE, sp
br.ret.sptk.many b0
;;
.Lld_double:
.body
.copy_state 1
ldfd f8 = [r16]
.restore sp
add sp = FRAME_SIZE, sp
br.ret.sptk.many b0
;;
.Lld_ldouble:
.body
.copy_state 1
ldfe f8 = [r16]
.restore sp
add sp = FRAME_SIZE, sp
br.ret.sptk.many b0
;;
.Lld_small_struct:
.body
.copy_state 1
add r17 = 8, r16
cmp.lt p6, p0 = 8, r8
cmp.lt p7, p0 = 16, r8
cmp.lt p8, p0 = 24, r8
;;
ld8 r8 = [r16], 16
(p6) ld8 r9 = [r17], 16
;;
(p7) ld8 r10 = [r16]
(p8) ld8 r11 = [r17]
.restore sp
add sp = FRAME_SIZE, sp
br.ret.sptk.many b0
;;
.Lld_hfa_float:
.body
.copy_state 1
add r17 = 4, r16
cmp.lt p6, p0 = 4, r8
;;
ldfs f8 = [r16], 8
(p6) ldfs f9 = [r17], 8
cmp.lt p7, p0 = 8, r8
cmp.lt p8, p0 = 12, r8
;;
(p7) ldfs f10 = [r16], 8
(p8) ldfs f11 = [r17], 8
cmp.lt p9, p0 = 16, r8
cmp.lt p10, p0 = 20, r8
;;
(p9) ldfs f12 = [r16], 8
(p10) ldfs f13 = [r17], 8
cmp.lt p6, p0 = 24, r8
cmp.lt p7, p0 = 28, r8
;;
(p6) ldfs f14 = [r16]
(p7) ldfs f15 = [r17]
.restore sp
add sp = FRAME_SIZE, sp
br.ret.sptk.many b0
;;
.Lld_hfa_double:
.body
.copy_state 1
add r17 = 8, r16
cmp.lt p6, p0 = 8, r8
;;
ldfd f8 = [r16], 16
(p6) ldfd f9 = [r17], 16
cmp.lt p7, p0 = 16, r8
cmp.lt p8, p0 = 24, r8
;;
(p7) ldfd f10 = [r16], 16
(p8) ldfd f11 = [r17], 16
cmp.lt p9, p0 = 32, r8
cmp.lt p10, p0 = 40, r8
;;
(p9) ldfd f12 = [r16], 16
(p10) ldfd f13 = [r17], 16
cmp.lt p6, p0 = 48, r8
cmp.lt p7, p0 = 56, r8
;;
(p6) ldfd f14 = [r16]
(p7) ldfd f15 = [r17]
.restore sp
add sp = FRAME_SIZE, sp
br.ret.sptk.many b0
;;
.Lld_hfa_ldouble:
.body
.copy_state 1
add r17 = 16, r16
cmp.lt p6, p0 = 16, r8
;;
ldfe f8 = [r16], 32
(p6) ldfe f9 = [r17], 32
cmp.lt p7, p0 = 32, r8
cmp.lt p8, p0 = 48, r8
;;
(p7) ldfe f10 = [r16], 32
(p8) ldfe f11 = [r17], 32
cmp.lt p9, p0 = 64, r8
cmp.lt p10, p0 = 80, r8
;;
(p9) ldfe f12 = [r16], 32
(p10) ldfe f13 = [r17], 32
cmp.lt p6, p0 = 96, r8
cmp.lt p7, p0 = 112, r8
;;
(p6) ldfe f14 = [r16]
(p7) ldfe f15 = [r17]
.restore sp
add sp = FRAME_SIZE, sp
br.ret.sptk.many b0
;;
.endp ffi_closure_unix
.section .rodata
.align 8
.Lst_table:
data8 @pcrel(.Lst_void) // FFI_TYPE_VOID
data8 @pcrel(.Lst_sint32) // FFI_TYPE_INT
data8 @pcrel(.Lst_float) // FFI_TYPE_FLOAT
data8 @pcrel(.Lst_double) // FFI_TYPE_DOUBLE
data8 @pcrel(.Lst_ldouble) // FFI_TYPE_LONGDOUBLE
data8 @pcrel(.Lst_uint8) // FFI_TYPE_UINT8
data8 @pcrel(.Lst_sint8) // FFI_TYPE_SINT8
data8 @pcrel(.Lst_uint16) // FFI_TYPE_UINT16
data8 @pcrel(.Lst_sint16) // FFI_TYPE_SINT16
data8 @pcrel(.Lst_uint32) // FFI_TYPE_UINT32
data8 @pcrel(.Lst_sint32) // FFI_TYPE_SINT32
data8 @pcrel(.Lst_int64) // FFI_TYPE_UINT64
data8 @pcrel(.Lst_int64) // FFI_TYPE_SINT64
data8 @pcrel(.Lst_void) // FFI_TYPE_STRUCT
data8 @pcrel(.Lst_int64) // FFI_TYPE_POINTER
data8 @pcrel(.Lst_small_struct) // FFI_IA64_TYPE_SMALL_STRUCT
data8 @pcrel(.Lst_hfa_float) // FFI_IA64_TYPE_HFA_FLOAT
data8 @pcrel(.Lst_hfa_double) // FFI_IA64_TYPE_HFA_DOUBLE
data8 @pcrel(.Lst_hfa_ldouble) // FFI_IA64_TYPE_HFA_LDOUBLE
.Lld_table:
data8 @pcrel(.Lld_void) // FFI_TYPE_VOID
data8 @pcrel(.Lld_int) // FFI_TYPE_INT
data8 @pcrel(.Lld_float) // FFI_TYPE_FLOAT
data8 @pcrel(.Lld_double) // FFI_TYPE_DOUBLE
data8 @pcrel(.Lld_ldouble) // FFI_TYPE_LONGDOUBLE
data8 @pcrel(.Lld_int) // FFI_TYPE_UINT8
data8 @pcrel(.Lld_int) // FFI_TYPE_SINT8
data8 @pcrel(.Lld_int) // FFI_TYPE_UINT16
data8 @pcrel(.Lld_int) // FFI_TYPE_SINT16
data8 @pcrel(.Lld_int) // FFI_TYPE_UINT32
data8 @pcrel(.Lld_int) // FFI_TYPE_SINT32
data8 @pcrel(.Lld_int) // FFI_TYPE_UINT64
data8 @pcrel(.Lld_int) // FFI_TYPE_SINT64
data8 @pcrel(.Lld_void) // FFI_TYPE_STRUCT
data8 @pcrel(.Lld_int) // FFI_TYPE_POINTER
data8 @pcrel(.Lld_small_struct) // FFI_IA64_TYPE_SMALL_STRUCT
data8 @pcrel(.Lld_hfa_float) // FFI_IA64_TYPE_HFA_FLOAT
data8 @pcrel(.Lld_hfa_double) // FFI_IA64_TYPE_HFA_DOUBLE
data8 @pcrel(.Lld_hfa_ldouble) // FFI_IA64_TYPE_HFA_LDOUBLE
#if defined __ELF__ && defined __linux__
.section .note.GNU-stack,"",@progbits
#endif
|
suryaveeryadav/Python-3.4.0
| 2,676
|
Modules/_ctypes/libffi/src/moxie/eabi.S
|
/* -----------------------------------------------------------------------
eabi.S - Copyright (c) 2012, 2013 Anthony Green
Moxie Assembly glue.
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND, EXPRESS
OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR
OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
OTHER DEALINGS IN THE SOFTWARE.
----------------------------------------------------------------------- */
#define LIBFFI_ASM
#include <fficonfig.h>
#include <ffi.h>
.globl ffi_prep_args_EABI
.text
.p2align 4
.globl ffi_call_EABI
.type ffi_call_EABI, @function
# $r0 : ffi_prep_args
# $r1 : &ecif
# $r2 : cif->bytes
# $r3 : fig->flags
# $r4 : ecif.rvalue
# $r5 : fn
ffi_call_EABI:
push $sp, $r6
push $sp, $r7
push $sp, $r8
dec $sp, 24
/* Store incoming args on stack. */
sto.l 0($sp), $r0 /* ffi_prep_args */
sto.l 4($sp), $r1 /* ecif */
sto.l 8($sp), $r2 /* bytes */
sto.l 12($sp), $r3 /* flags */
sto.l 16($sp), $r4 /* &rvalue */
sto.l 20($sp), $r5 /* fn */
/* Call ffi_prep_args. */
mov $r6, $r4 /* Save result buffer */
mov $r7, $r5 /* Save the target fn */
mov $r8, $r3 /* Save the flags */
sub.l $sp, $r2 /* Allocate stack space */
mov $r0, $sp /* We can stomp over $r0 */
/* $r1 is already set up */
jsra ffi_prep_args
/* Load register arguments. */
ldo.l $r0, 0($sp)
ldo.l $r1, 4($sp)
ldo.l $r2, 8($sp)
ldo.l $r3, 12($sp)
ldo.l $r4, 16($sp)
ldo.l $r5, 20($sp)
/* Call the target function. */
jsr $r7
ldi.l $r7, 0xffffffff
cmp $r8, $r7
beq retstruct
ldi.l $r7, 4
cmp $r8, $r7
bgt ret2reg
st.l ($r6), $r0
jmpa retdone
ret2reg:
st.l ($r6), $r0
sto.l 4($r6), $r1
retstruct:
retdone:
/* Return. */
ldo.l $r6, -4($fp)
ldo.l $r7, -8($fp)
ldo.l $r8, -12($fp)
ret
.size ffi_call_EABI, .-ffi_call_EABI
|
suryaveeryadav/Python-3.4.0
| 4,840
|
Modules/_ctypes/libffi/src/avr32/sysv.S
|
/* -----------------------------------------------------------------------
sysv.S - Copyright (c) 2009 Bradley Smith <brad@brad-smith.co.uk>
AVR32 Foreign Function Interface
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
--------------------------------------------------------------------- */
#define LIBFFI_ASM
#include <fficonfig.h>
#include <ffi.h>
/* r12: ffi_prep_args
* r11: &ecif
* r10: size
* r9: cif->flags
* r8: ecif.rvalue
* sp+0: cif->rstruct_flag
* sp+4: fn */
.text
.align 1
.globl ffi_call_SYSV
.type ffi_call_SYSV, @function
ffi_call_SYSV:
stm --sp, r0,r1,lr
stm --sp, r8-r12
mov r0, sp
/* Make room for all of the new args. */
sub sp, r10
/* Pad to make way for potential skipped registers */
sub sp, 20
/* Call ffi_prep_args(stack, &ecif). */
/* r11 already set */
mov r1, r12
mov r12, sp
icall r1
/* Save new argument size */
mov r1, r12
/* Move first 5 parameters in registers. */
ldm sp++, r8-r12
/* call (fn) (...). */
ld.w r1, r0[36]
icall r1
/* Remove the space we pushed for the args. */
mov sp, r0
/* Load r1 with the rstruct flag. */
ld.w r1, sp[32]
/* Load r9 with the return type code. */
ld.w r9, sp[12]
/* Load r8 with the return value pointer. */
ld.w r8, sp[16]
/* If the return value pointer is NULL, assume no return value. */
cp.w r8, 0
breq .Lend
/* Check if return type is actually a struct */
cp.w r1, 0
breq 1f
/* Return 8bit */
cp.w r9, FFI_TYPE_UINT8
breq .Lstore8
/* Return 16bit */
cp.w r9, FFI_TYPE_UINT16
breq .Lstore16
1:
/* Return 32bit */
cp.w r9, FFI_TYPE_UINT32
breq .Lstore32
cp.w r9, FFI_TYPE_UINT16
breq .Lstore32
cp.w r9, FFI_TYPE_UINT8
breq .Lstore32
/* Return 64bit */
cp.w r9, FFI_TYPE_UINT64
breq .Lstore64
/* Didn't match anything */
bral .Lend
.Lstore64:
st.w r8[0], r11
st.w r8[4], r10
bral .Lend
.Lstore32:
st.w r8[0], r12
bral .Lend
.Lstore16:
st.h r8[0], r12
bral .Lend
.Lstore8:
st.b r8[0], r12
bral .Lend
.Lend:
sub sp, -20
ldm sp++, r0,r1,pc
.size ffi_call_SYSV, . - ffi_call_SYSV
/* r12: __ctx
* r11: __rstruct_flag
* r10: __inner */
.align 1
.globl ffi_closure_SYSV
.type ffi_closure_SYSV, @function
ffi_closure_SYSV:
stm --sp, r0,lr
mov r0, r11
mov r8, r10
sub r10, sp, -8
sub sp, 12
st.w sp[8], sp
sub r11, sp, -8
icall r8
/* Check if return type is actually a struct */
cp.w r0, 0
breq 1f
/* Return 8bit */
cp.w r12, FFI_TYPE_UINT8
breq .Lget8
/* Return 16bit */
cp.w r12, FFI_TYPE_UINT16
breq .Lget16
1:
/* Return 32bit */
cp.w r12, FFI_TYPE_UINT32
breq .Lget32
cp.w r12, FFI_TYPE_UINT16
breq .Lget32
cp.w r12, FFI_TYPE_UINT8
breq .Lget32
/* Return 64bit */
cp.w r12, FFI_TYPE_UINT64
breq .Lget64
/* Didn't match anything */
bral .Lclend
.Lget64:
ld.w r11, sp[0]
ld.w r10, sp[4]
bral .Lclend
.Lget32:
ld.w r12, sp[0]
bral .Lclend
.Lget16:
ld.uh r12, sp[0]
bral .Lclend
.Lget8:
ld.ub r12, sp[0]
bral .Lclend
.Lclend:
sub sp, -12
ldm sp++, r0,lr
sub sp, -20
mov pc, lr
.size ffi_closure_SYSV, . - ffi_closure_SYSV
#if defined __ELF__ && defined __linux__
.section .note.GNU-stack,"",@progbits
#endif
|
suryaveeryadav/Python-3.4.0
| 9,317
|
Modules/_ctypes/libffi/src/aarch64/sysv.S
|
/* Copyright (c) 2009, 2010, 2011, 2012 ARM Ltd.
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be
included in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
#define LIBFFI_ASM
#include <fficonfig.h>
#include <ffi.h>
#define cfi_adjust_cfa_offset(off) .cfi_adjust_cfa_offset off
#define cfi_rel_offset(reg, off) .cfi_rel_offset reg, off
#define cfi_restore(reg) .cfi_restore reg
#define cfi_def_cfa_register(reg) .cfi_def_cfa_register reg
.text
.globl ffi_call_SYSV
.type ffi_call_SYSV, #function
/* ffi_call_SYSV()
Create a stack frame, setup an argument context, call the callee
and extract the result.
The maximum required argument stack size is provided,
ffi_call_SYSV() allocates that stack space then calls the
prepare_fn to populate register context and stack. The
argument passing registers are loaded from the register
context and the callee called, on return the register passing
register are saved back to the context. Our caller will
extract the return value from the final state of the saved
register context.
Prototype:
extern unsigned
ffi_call_SYSV (void (*)(struct call_context *context, unsigned char *,
extended_cif *),
struct call_context *context,
extended_cif *,
unsigned required_stack_size,
void (*fn)(void));
Therefore on entry we have:
x0 prepare_fn
x1 &context
x2 &ecif
x3 bytes
x4 fn
This function uses the following stack frame layout:
==
saved x30(lr)
x29(fp)-> saved x29(fp)
saved x24
saved x23
saved x22
sp' -> saved x21
...
sp -> (constructed callee stack arguments)
==
Voila! */
#define ffi_call_SYSV_FS (8 * 4)
.cfi_startproc
ffi_call_SYSV:
stp x29, x30, [sp, #-16]!
cfi_adjust_cfa_offset (16)
cfi_rel_offset (x29, 0)
cfi_rel_offset (x30, 8)
mov x29, sp
cfi_def_cfa_register (x29)
sub sp, sp, #ffi_call_SYSV_FS
stp x21, x22, [sp, 0]
cfi_rel_offset (x21, 0 - ffi_call_SYSV_FS)
cfi_rel_offset (x22, 8 - ffi_call_SYSV_FS)
stp x23, x24, [sp, 16]
cfi_rel_offset (x23, 16 - ffi_call_SYSV_FS)
cfi_rel_offset (x24, 24 - ffi_call_SYSV_FS)
mov x21, x1
mov x22, x2
mov x24, x4
/* Allocate the stack space for the actual arguments, many
arguments will be passed in registers, but we assume
worst case and allocate sufficient stack for ALL of
the arguments. */
sub sp, sp, x3
/* unsigned (*prepare_fn) (struct call_context *context,
unsigned char *stack, extended_cif *ecif);
*/
mov x23, x0
mov x0, x1
mov x1, sp
/* x2 already in place */
blr x23
/* Preserve the flags returned. */
mov x23, x0
/* Figure out if we should touch the vector registers. */
tbz x23, #AARCH64_FFI_WITH_V_BIT, 1f
/* Load the vector argument passing registers. */
ldp q0, q1, [x21, #8*32 + 0]
ldp q2, q3, [x21, #8*32 + 32]
ldp q4, q5, [x21, #8*32 + 64]
ldp q6, q7, [x21, #8*32 + 96]
1:
/* Load the core argument passing registers. */
ldp x0, x1, [x21, #0]
ldp x2, x3, [x21, #16]
ldp x4, x5, [x21, #32]
ldp x6, x7, [x21, #48]
/* Don't forget x8 which may be holding the address of a return buffer.
*/
ldr x8, [x21, #8*8]
blr x24
/* Save the core argument passing registers. */
stp x0, x1, [x21, #0]
stp x2, x3, [x21, #16]
stp x4, x5, [x21, #32]
stp x6, x7, [x21, #48]
/* Note nothing useful ever comes back in x8! */
/* Figure out if we should touch the vector registers. */
tbz x23, #AARCH64_FFI_WITH_V_BIT, 1f
/* Save the vector argument passing registers. */
stp q0, q1, [x21, #8*32 + 0]
stp q2, q3, [x21, #8*32 + 32]
stp q4, q5, [x21, #8*32 + 64]
stp q6, q7, [x21, #8*32 + 96]
1:
/* All done, unwind our stack frame. */
ldp x21, x22, [x29, # - ffi_call_SYSV_FS]
cfi_restore (x21)
cfi_restore (x22)
ldp x23, x24, [x29, # - ffi_call_SYSV_FS + 16]
cfi_restore (x23)
cfi_restore (x24)
mov sp, x29
cfi_def_cfa_register (sp)
ldp x29, x30, [sp], #16
cfi_adjust_cfa_offset (-16)
cfi_restore (x29)
cfi_restore (x30)
ret
.cfi_endproc
.size ffi_call_SYSV, .-ffi_call_SYSV
#define ffi_closure_SYSV_FS (8 * 2 + AARCH64_CALL_CONTEXT_SIZE)
/* ffi_closure_SYSV
Closure invocation glue. This is the low level code invoked directly by
the closure trampoline to setup and call a closure.
On entry x17 points to a struct trampoline_data, x16 has been clobbered
all other registers are preserved.
We allocate a call context and save the argument passing registers,
then invoked the generic C ffi_closure_SYSV_inner() function to do all
the real work, on return we load the result passing registers back from
the call context.
On entry
extern void
ffi_closure_SYSV (struct trampoline_data *);
struct trampoline_data
{
UINT64 *ffi_closure;
UINT64 flags;
};
This function uses the following stack frame layout:
==
saved x30(lr)
x29(fp)-> saved x29(fp)
saved x22
saved x21
...
sp -> call_context
==
Voila! */
.text
.globl ffi_closure_SYSV
.cfi_startproc
ffi_closure_SYSV:
stp x29, x30, [sp, #-16]!
cfi_adjust_cfa_offset (16)
cfi_rel_offset (x29, 0)
cfi_rel_offset (x30, 8)
mov x29, sp
sub sp, sp, #ffi_closure_SYSV_FS
cfi_adjust_cfa_offset (ffi_closure_SYSV_FS)
stp x21, x22, [x29, #-16]
cfi_rel_offset (x21, 0)
cfi_rel_offset (x22, 8)
/* Load x21 with &call_context. */
mov x21, sp
/* Preserve our struct trampoline_data * */
mov x22, x17
/* Save the rest of the argument passing registers. */
stp x0, x1, [x21, #0]
stp x2, x3, [x21, #16]
stp x4, x5, [x21, #32]
stp x6, x7, [x21, #48]
/* Don't forget we may have been given a result scratch pad address.
*/
str x8, [x21, #64]
/* Figure out if we should touch the vector registers. */
ldr x0, [x22, #8]
tbz x0, #AARCH64_FFI_WITH_V_BIT, 1f
/* Save the argument passing vector registers. */
stp q0, q1, [x21, #8*32 + 0]
stp q2, q3, [x21, #8*32 + 32]
stp q4, q5, [x21, #8*32 + 64]
stp q6, q7, [x21, #8*32 + 96]
1:
/* Load &ffi_closure.. */
ldr x0, [x22, #0]
mov x1, x21
/* Compute the location of the stack at the point that the
trampoline was called. */
add x2, x29, #16
bl ffi_closure_SYSV_inner
/* Figure out if we should touch the vector registers. */
ldr x0, [x22, #8]
tbz x0, #AARCH64_FFI_WITH_V_BIT, 1f
/* Load the result passing vector registers. */
ldp q0, q1, [x21, #8*32 + 0]
ldp q2, q3, [x21, #8*32 + 32]
ldp q4, q5, [x21, #8*32 + 64]
ldp q6, q7, [x21, #8*32 + 96]
1:
/* Load the result passing core registers. */
ldp x0, x1, [x21, #0]
ldp x2, x3, [x21, #16]
ldp x4, x5, [x21, #32]
ldp x6, x7, [x21, #48]
/* Note nothing usefull is returned in x8. */
/* We are done, unwind our frame. */
ldp x21, x22, [x29, #-16]
cfi_restore (x21)
cfi_restore (x22)
mov sp, x29
cfi_adjust_cfa_offset (-ffi_closure_SYSV_FS)
ldp x29, x30, [sp], #16
cfi_adjust_cfa_offset (-16)
cfi_restore (x29)
cfi_restore (x30)
ret
.cfi_endproc
.size ffi_closure_SYSV, .-ffi_closure_SYSV
|
suryaveeryadav/Python-3.4.0
| 10,785
|
Modules/_ctypes/libffi/src/s390/sysv.S
|
/* -----------------------------------------------------------------------
sysv.S - Copyright (c) 2000 Software AG
Copyright (c) 2008 Red Hat, Inc.
S390 Foreign Function Interface
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
DEALINGS IN THE SOFTWARE.
----------------------------------------------------------------------- */
#define LIBFFI_ASM
#include <fficonfig.h>
#include <ffi.h>
#ifndef __s390x__
.text
# r2: cif->bytes
# r3: &ecif
# r4: ffi_prep_args
# r5: ret_type
# r6: ecif.rvalue
# ov: fn
# This assumes we are using gas.
.globl ffi_call_SYSV
.type ffi_call_SYSV,%function
ffi_call_SYSV:
.LFB1:
stm %r6,%r15,24(%r15) # Save registers
.LCFI0:
basr %r13,0 # Set up base register
.Lbase:
lr %r11,%r15 # Set up frame pointer
.LCFI1:
sr %r15,%r2
ahi %r15,-96-48 # Allocate stack
lr %r8,%r6 # Save ecif.rvalue
sr %r9,%r9
ic %r9,.Ltable-.Lbase(%r13,%r5) # Load epilog address
l %r7,96(%r11) # Load function address
st %r11,0(%r15) # Set up back chain
ahi %r11,-48 # Register save area
.LCFI2:
la %r2,96(%r15) # Save area
# r3 already holds &ecif
basr %r14,%r4 # Call ffi_prep_args
lm %r2,%r6,0(%r11) # Load arguments
ld %f0,32(%r11)
ld %f2,40(%r11)
la %r14,0(%r13,%r9) # Set return address
br %r7 # ... and call function
.LretNone: # Return void
l %r4,48+56(%r11)
lm %r6,%r15,48+24(%r11)
br %r4
.LretFloat:
l %r4,48+56(%r11)
ste %f0,0(%r8) # Return float
lm %r6,%r15,48+24(%r11)
br %r4
.LretDouble:
l %r4,48+56(%r11)
std %f0,0(%r8) # Return double
lm %r6,%r15,48+24(%r11)
br %r4
.LretInt32:
l %r4,48+56(%r11)
st %r2,0(%r8) # Return int
lm %r6,%r15,48+24(%r11)
br %r4
.LretInt64:
l %r4,48+56(%r11)
stm %r2,%r3,0(%r8) # Return long long
lm %r6,%r15,48+24(%r11)
br %r4
.Ltable:
.byte .LretNone-.Lbase # FFI390_RET_VOID
.byte .LretNone-.Lbase # FFI390_RET_STRUCT
.byte .LretFloat-.Lbase # FFI390_RET_FLOAT
.byte .LretDouble-.Lbase # FFI390_RET_DOUBLE
.byte .LretInt32-.Lbase # FFI390_RET_INT32
.byte .LretInt64-.Lbase # FFI390_RET_INT64
.LFE1:
.ffi_call_SYSV_end:
.size ffi_call_SYSV,.ffi_call_SYSV_end-ffi_call_SYSV
.globl ffi_closure_SYSV
.type ffi_closure_SYSV,%function
ffi_closure_SYSV:
.LFB2:
stm %r12,%r15,48(%r15) # Save registers
.LCFI10:
basr %r13,0 # Set up base register
.Lcbase:
stm %r2,%r6,8(%r15) # Save arguments
std %f0,64(%r15)
std %f2,72(%r15)
lr %r1,%r15 # Set up stack frame
ahi %r15,-96
.LCFI11:
l %r12,.Lchelper-.Lcbase(%r13) # Get helper function
lr %r2,%r0 # Closure
la %r3,8(%r1) # GPRs
la %r4,64(%r1) # FPRs
la %r5,96(%r1) # Overflow
st %r1,0(%r15) # Set up back chain
bas %r14,0(%r12,%r13) # Call helper
l %r4,96+56(%r15)
ld %f0,96+64(%r15) # Load return registers
lm %r2,%r3,96+8(%r15)
lm %r12,%r15,96+48(%r15)
br %r4
.align 4
.Lchelper:
.long ffi_closure_helper_SYSV-.Lcbase
.LFE2:
.ffi_closure_SYSV_end:
.size ffi_closure_SYSV,.ffi_closure_SYSV_end-ffi_closure_SYSV
.section .eh_frame,EH_FRAME_FLAGS,@progbits
.Lframe1:
.4byte .LECIE1-.LSCIE1 # Length of Common Information Entry
.LSCIE1:
.4byte 0x0 # CIE Identifier Tag
.byte 0x1 # CIE Version
.ascii "zR\0" # CIE Augmentation
.uleb128 0x1 # CIE Code Alignment Factor
.sleb128 -4 # CIE Data Alignment Factor
.byte 0xe # CIE RA Column
.uleb128 0x1 # Augmentation size
.byte 0x1b # FDE Encoding (pcrel sdata4)
.byte 0xc # DW_CFA_def_cfa
.uleb128 0xf
.uleb128 0x60
.align 4
.LECIE1:
.LSFDE1:
.4byte .LEFDE1-.LASFDE1 # FDE Length
.LASFDE1:
.4byte .LASFDE1-.Lframe1 # FDE CIE offset
.4byte .LFB1-. # FDE initial location
.4byte .LFE1-.LFB1 # FDE address range
.uleb128 0x0 # Augmentation size
.byte 0x4 # DW_CFA_advance_loc4
.4byte .LCFI0-.LFB1
.byte 0x8f # DW_CFA_offset, column 0xf
.uleb128 0x9
.byte 0x8e # DW_CFA_offset, column 0xe
.uleb128 0xa
.byte 0x8d # DW_CFA_offset, column 0xd
.uleb128 0xb
.byte 0x8c # DW_CFA_offset, column 0xc
.uleb128 0xc
.byte 0x8b # DW_CFA_offset, column 0xb
.uleb128 0xd
.byte 0x8a # DW_CFA_offset, column 0xa
.uleb128 0xe
.byte 0x89 # DW_CFA_offset, column 0x9
.uleb128 0xf
.byte 0x88 # DW_CFA_offset, column 0x8
.uleb128 0x10
.byte 0x87 # DW_CFA_offset, column 0x7
.uleb128 0x11
.byte 0x86 # DW_CFA_offset, column 0x6
.uleb128 0x12
.byte 0x4 # DW_CFA_advance_loc4
.4byte .LCFI1-.LCFI0
.byte 0xd # DW_CFA_def_cfa_register
.uleb128 0xb
.byte 0x4 # DW_CFA_advance_loc4
.4byte .LCFI2-.LCFI1
.byte 0xe # DW_CFA_def_cfa_offset
.uleb128 0x90
.align 4
.LEFDE1:
.LSFDE2:
.4byte .LEFDE2-.LASFDE2 # FDE Length
.LASFDE2:
.4byte .LASFDE2-.Lframe1 # FDE CIE offset
.4byte .LFB2-. # FDE initial location
.4byte .LFE2-.LFB2 # FDE address range
.uleb128 0x0 # Augmentation size
.byte 0x4 # DW_CFA_advance_loc4
.4byte .LCFI10-.LFB2
.byte 0x8f # DW_CFA_offset, column 0xf
.uleb128 0x9
.byte 0x8e # DW_CFA_offset, column 0xe
.uleb128 0xa
.byte 0x8d # DW_CFA_offset, column 0xd
.uleb128 0xb
.byte 0x8c # DW_CFA_offset, column 0xc
.uleb128 0xc
.byte 0x4 # DW_CFA_advance_loc4
.4byte .LCFI11-.LCFI10
.byte 0xe # DW_CFA_def_cfa_offset
.uleb128 0xc0
.align 4
.LEFDE2:
#else
.text
# r2: cif->bytes
# r3: &ecif
# r4: ffi_prep_args
# r5: ret_type
# r6: ecif.rvalue
# ov: fn
# This assumes we are using gas.
.globl ffi_call_SYSV
.type ffi_call_SYSV,%function
ffi_call_SYSV:
.LFB1:
stmg %r6,%r15,48(%r15) # Save registers
.LCFI0:
larl %r13,.Lbase # Set up base register
lgr %r11,%r15 # Set up frame pointer
.LCFI1:
sgr %r15,%r2
aghi %r15,-160-80 # Allocate stack
lgr %r8,%r6 # Save ecif.rvalue
llgc %r9,.Ltable-.Lbase(%r13,%r5) # Load epilog address
lg %r7,160(%r11) # Load function address
stg %r11,0(%r15) # Set up back chain
aghi %r11,-80 # Register save area
.LCFI2:
la %r2,160(%r15) # Save area
# r3 already holds &ecif
basr %r14,%r4 # Call ffi_prep_args
lmg %r2,%r6,0(%r11) # Load arguments
ld %f0,48(%r11)
ld %f2,56(%r11)
ld %f4,64(%r11)
ld %f6,72(%r11)
la %r14,0(%r13,%r9) # Set return address
br %r7 # ... and call function
.Lbase:
.LretNone: # Return void
lg %r4,80+112(%r11)
lmg %r6,%r15,80+48(%r11)
br %r4
.LretFloat:
lg %r4,80+112(%r11)
ste %f0,0(%r8) # Return float
lmg %r6,%r15,80+48(%r11)
br %r4
.LretDouble:
lg %r4,80+112(%r11)
std %f0,0(%r8) # Return double
lmg %r6,%r15,80+48(%r11)
br %r4
.LretInt32:
lg %r4,80+112(%r11)
st %r2,0(%r8) # Return int
lmg %r6,%r15,80+48(%r11)
br %r4
.LretInt64:
lg %r4,80+112(%r11)
stg %r2,0(%r8) # Return long
lmg %r6,%r15,80+48(%r11)
br %r4
.Ltable:
.byte .LretNone-.Lbase # FFI390_RET_VOID
.byte .LretNone-.Lbase # FFI390_RET_STRUCT
.byte .LretFloat-.Lbase # FFI390_RET_FLOAT
.byte .LretDouble-.Lbase # FFI390_RET_DOUBLE
.byte .LretInt32-.Lbase # FFI390_RET_INT32
.byte .LretInt64-.Lbase # FFI390_RET_INT64
.LFE1:
.ffi_call_SYSV_end:
.size ffi_call_SYSV,.ffi_call_SYSV_end-ffi_call_SYSV
.globl ffi_closure_SYSV
.type ffi_closure_SYSV,%function
ffi_closure_SYSV:
.LFB2:
stmg %r14,%r15,112(%r15) # Save registers
.LCFI10:
stmg %r2,%r6,16(%r15) # Save arguments
std %f0,128(%r15)
std %f2,136(%r15)
std %f4,144(%r15)
std %f6,152(%r15)
lgr %r1,%r15 # Set up stack frame
aghi %r15,-160
.LCFI11:
lgr %r2,%r0 # Closure
la %r3,16(%r1) # GPRs
la %r4,128(%r1) # FPRs
la %r5,160(%r1) # Overflow
stg %r1,0(%r15) # Set up back chain
brasl %r14,ffi_closure_helper_SYSV # Call helper
lg %r14,160+112(%r15)
ld %f0,160+128(%r15) # Load return registers
lg %r2,160+16(%r15)
la %r15,160(%r15)
br %r14
.LFE2:
.ffi_closure_SYSV_end:
.size ffi_closure_SYSV,.ffi_closure_SYSV_end-ffi_closure_SYSV
.section .eh_frame,EH_FRAME_FLAGS,@progbits
.Lframe1:
.4byte .LECIE1-.LSCIE1 # Length of Common Information Entry
.LSCIE1:
.4byte 0x0 # CIE Identifier Tag
.byte 0x1 # CIE Version
.ascii "zR\0" # CIE Augmentation
.uleb128 0x1 # CIE Code Alignment Factor
.sleb128 -8 # CIE Data Alignment Factor
.byte 0xe # CIE RA Column
.uleb128 0x1 # Augmentation size
.byte 0x1b # FDE Encoding (pcrel sdata4)
.byte 0xc # DW_CFA_def_cfa
.uleb128 0xf
.uleb128 0xa0
.align 8
.LECIE1:
.LSFDE1:
.4byte .LEFDE1-.LASFDE1 # FDE Length
.LASFDE1:
.4byte .LASFDE1-.Lframe1 # FDE CIE offset
.4byte .LFB1-. # FDE initial location
.4byte .LFE1-.LFB1 # FDE address range
.uleb128 0x0 # Augmentation size
.byte 0x4 # DW_CFA_advance_loc4
.4byte .LCFI0-.LFB1
.byte 0x8f # DW_CFA_offset, column 0xf
.uleb128 0x5
.byte 0x8e # DW_CFA_offset, column 0xe
.uleb128 0x6
.byte 0x8d # DW_CFA_offset, column 0xd
.uleb128 0x7
.byte 0x8c # DW_CFA_offset, column 0xc
.uleb128 0x8
.byte 0x8b # DW_CFA_offset, column 0xb
.uleb128 0x9
.byte 0x8a # DW_CFA_offset, column 0xa
.uleb128 0xa
.byte 0x89 # DW_CFA_offset, column 0x9
.uleb128 0xb
.byte 0x88 # DW_CFA_offset, column 0x8
.uleb128 0xc
.byte 0x87 # DW_CFA_offset, column 0x7
.uleb128 0xd
.byte 0x86 # DW_CFA_offset, column 0x6
.uleb128 0xe
.byte 0x4 # DW_CFA_advance_loc4
.4byte .LCFI1-.LCFI0
.byte 0xd # DW_CFA_def_cfa_register
.uleb128 0xb
.byte 0x4 # DW_CFA_advance_loc4
.4byte .LCFI2-.LCFI1
.byte 0xe # DW_CFA_def_cfa_offset
.uleb128 0xf0
.align 8
.LEFDE1:
.LSFDE2:
.4byte .LEFDE2-.LASFDE2 # FDE Length
.LASFDE2:
.4byte .LASFDE2-.Lframe1 # FDE CIE offset
.4byte .LFB2-. # FDE initial location
.4byte .LFE2-.LFB2 # FDE address range
.uleb128 0x0 # Augmentation size
.byte 0x4 # DW_CFA_advance_loc4
.4byte .LCFI10-.LFB2
.byte 0x8f # DW_CFA_offset, column 0xf
.uleb128 0x5
.byte 0x8e # DW_CFA_offset, column 0xe
.uleb128 0x6
.byte 0x4 # DW_CFA_advance_loc4
.4byte .LCFI11-.LCFI10
.byte 0xe # DW_CFA_def_cfa_offset
.uleb128 0x140
.align 8
.LEFDE2:
#endif
#if defined __ELF__ && defined __linux__
.section .note.GNU-stack,"",@progbits
#endif
|
suryaveeryadav/Python-3.4.0
| 11,693
|
Modules/_ctypes/libffi/src/sh64/sysv.S
|
/* -----------------------------------------------------------------------
sysv.S - Copyright (c) 2003, 2004, 2006, 2008 Kaz Kojima
SuperH SHmedia Foreign Function Interface
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
DEALINGS IN THE SOFTWARE.
----------------------------------------------------------------------- */
#define LIBFFI_ASM
#include <fficonfig.h>
#include <ffi.h>
#ifdef HAVE_MACHINE_ASM_H
#include <machine/asm.h>
#else
/* XXX these lose for some platforms, I'm sure. */
#define CNAME(x) x
#define ENTRY(x) .globl CNAME(x); .type CNAME(x),%function; CNAME(x):
#endif
#ifdef __LITTLE_ENDIAN__
#define OFS_FLT 0
#else
#define OFS_FLT 4
#endif
.section .text..SHmedia32,"ax"
# r2: ffi_prep_args
# r3: &ecif
# r4: bytes
# r5: flags
# r6: flags2
# r7: rvalue
# r8: fn
# This assumes we are using gas.
.align 5
ENTRY(ffi_call_SYSV)
# Save registers
.LFB1:
addi.l r15, -48, r15
.LCFI0:
st.q r15, 40, r32
st.q r15, 32, r31
st.q r15, 24, r30
st.q r15, 16, r29
st.q r15, 8, r28
st.l r15, 4, r18
st.l r15, 0, r14
.LCFI1:
add.l r15, r63, r14
.LCFI2:
# add r4, r63, r28
add r5, r63, r29
add r6, r63, r30
add r7, r63, r31
add r8, r63, r32
addi r4, (64 + 7), r4
andi r4, ~7, r4
sub.l r15, r4, r15
ptabs/l r2, tr0
add r15, r63, r2
blink tr0, r18
addi r15, 64, r22
movi 0, r0
movi 0, r1
movi -1, r23
pt/l 1f, tr1
bnei/l r29, FFI_TYPE_STRUCT, tr1
ld.l r15, 0, r19
addi r15, 8, r15
addi r0, 1, r0
1:
.L_pass:
andi r30, 3, r20
shlri r30, 2, r30
pt/l .L_call_it, tr0
pt/l .L_pass_i, tr1
pt/l .L_pass_f, tr2
beqi/l r20, FFI_TYPE_VOID, tr0
beqi/l r20, FFI_TYPE_INT, tr1
beqi/l r20, FFI_TYPE_FLOAT, tr2
.L_pass_d:
addi r0, 1, r0
pt/l 3f, tr0
movi 12, r20
bge/l r1, r20, tr0
pt/l .L_pop_d, tr1
pt/l 2f, tr0
blink tr1, r63
2:
addi.l r15, 8, r15
3:
pt/l .L_pass, tr0
addi r1, 2, r1
blink tr0, r63
.L_pop_d:
pt/l .L_pop_d_tbl, tr1
gettr tr1, r20
shlli r1, 2, r21
add r20, r21, r20
ptabs/l r20, tr1
blink tr1, r63
.L_pop_d_tbl:
fld.d r15, 0, dr0
blink tr0, r63
fld.d r15, 0, dr2
blink tr0, r63
fld.d r15, 0, dr4
blink tr0, r63
fld.d r15, 0, dr6
blink tr0, r63
fld.d r15, 0, dr8
blink tr0, r63
fld.d r15, 0, dr10
blink tr0, r63
.L_pass_f:
addi r0, 1, r0
pt/l 3f, tr0
movi 12, r20
bge/l r1, r20, tr0
pt/l .L_pop_f, tr1
pt/l 2f, tr0
blink tr1, r63
2:
addi.l r15, 8, r15
3:
pt/l .L_pass, tr0
blink tr0, r63
.L_pop_f:
pt/l .L_pop_f_tbl, tr1
pt/l 5f, tr2
gettr tr1, r20
bge/l r23, r63, tr2
add r1, r63, r23
shlli r1, 3, r21
addi r1, 2, r1
add r20, r21, r20
ptabs/l r20, tr1
blink tr1, r63
5:
addi r23, 1, r21
movi -1, r23
shlli r21, 3, r21
add r20, r21, r20
ptabs/l r20, tr1
blink tr1, r63
.L_pop_f_tbl:
fld.s r15, OFS_FLT, fr0
blink tr0, r63
fld.s r15, OFS_FLT, fr1
blink tr0, r63
fld.s r15, OFS_FLT, fr2
blink tr0, r63
fld.s r15, OFS_FLT, fr3
blink tr0, r63
fld.s r15, OFS_FLT, fr4
blink tr0, r63
fld.s r15, OFS_FLT, fr5
blink tr0, r63
fld.s r15, OFS_FLT, fr6
blink tr0, r63
fld.s r15, OFS_FLT, fr7
blink tr0, r63
fld.s r15, OFS_FLT, fr8
blink tr0, r63
fld.s r15, OFS_FLT, fr9
blink tr0, r63
fld.s r15, OFS_FLT, fr10
blink tr0, r63
fld.s r15, OFS_FLT, fr11
blink tr0, r63
.L_pass_i:
pt/l 3f, tr0
movi 8, r20
bge/l r0, r20, tr0
pt/l .L_pop_i, tr1
pt/l 2f, tr0
blink tr1, r63
2:
addi.l r15, 8, r15
3:
pt/l .L_pass, tr0
addi r0, 1, r0
blink tr0, r63
.L_pop_i:
pt/l .L_pop_i_tbl, tr1
gettr tr1, r20
shlli r0, 3, r21
add r20, r21, r20
ptabs/l r20, tr1
blink tr1, r63
.L_pop_i_tbl:
ld.q r15, 0, r2
blink tr0, r63
ld.q r15, 0, r3
blink tr0, r63
ld.q r15, 0, r4
blink tr0, r63
ld.q r15, 0, r5
blink tr0, r63
ld.q r15, 0, r6
blink tr0, r63
ld.q r15, 0, r7
blink tr0, r63
ld.q r15, 0, r8
blink tr0, r63
ld.q r15, 0, r9
blink tr0, r63
.L_call_it:
# call function
pt/l 1f, tr1
bnei/l r29, FFI_TYPE_STRUCT, tr1
add r19, r63, r2
1:
add r22, r63, r15
ptabs/l r32, tr0
blink tr0, r18
pt/l .L_ret_i, tr0
pt/l .L_ret_ll, tr1
pt/l .L_ret_d, tr2
pt/l .L_ret_f, tr3
pt/l .L_epilogue, tr4
beqi/l r29, FFI_TYPE_INT, tr0
beqi/l r29, FFI_TYPE_UINT32, tr0
beqi/l r29, FFI_TYPE_SINT64, tr1
beqi/l r29, FFI_TYPE_UINT64, tr1
beqi/l r29, FFI_TYPE_DOUBLE, tr2
beqi/l r29, FFI_TYPE_FLOAT, tr3
pt/l .L_ret_q, tr0
pt/l .L_ret_h, tr1
beqi/l r29, FFI_TYPE_UINT8, tr0
beqi/l r29, FFI_TYPE_UINT16, tr1
blink tr4, r63
.L_ret_d:
fst.d r31, 0, dr0
blink tr4, r63
.L_ret_ll:
st.q r31, 0, r2
blink tr4, r63
.L_ret_f:
fst.s r31, OFS_FLT, fr0
blink tr4, r63
.L_ret_q:
st.b r31, 0, r2
blink tr4, r63
.L_ret_h:
st.w r31, 0, r2
blink tr4, r63
.L_ret_i:
st.l r31, 0, r2
# Fall
.L_epilogue:
# Remove the space we pushed for the args
add r14, r63, r15
ld.l r15, 0, r14
ld.l r15, 4, r18
ld.q r15, 8, r28
ld.q r15, 16, r29
ld.q r15, 24, r30
ld.q r15, 32, r31
ld.q r15, 40, r32
addi.l r15, 48, r15
ptabs r18, tr0
blink tr0, r63
.LFE1:
.ffi_call_SYSV_end:
.size CNAME(ffi_call_SYSV),.ffi_call_SYSV_end-CNAME(ffi_call_SYSV)
.align 5
ENTRY(ffi_closure_SYSV)
.LFB2:
addi.l r15, -136, r15
.LCFI3:
st.l r15, 12, r18
st.l r15, 8, r14
st.l r15, 4, r12
.LCFI4:
add r15, r63, r14
.LCFI5:
/* Stack layout:
...
64 bytes (register parameters)
48 bytes (floating register parameters)
8 bytes (result)
4 bytes (r18)
4 bytes (r14)
4 bytes (r12)
4 bytes (for align)
<- new stack pointer
*/
fst.d r14, 24, dr0
fst.d r14, 32, dr2
fst.d r14, 40, dr4
fst.d r14, 48, dr6
fst.d r14, 56, dr8
fst.d r14, 64, dr10
st.q r14, 72, r2
st.q r14, 80, r3
st.q r14, 88, r4
st.q r14, 96, r5
st.q r14, 104, r6
st.q r14, 112, r7
st.q r14, 120, r8
st.q r14, 128, r9
add r1, r63, r2
addi r14, 16, r3
addi r14, 72, r4
addi r14, 24, r5
addi r14, 136, r6
#ifdef PIC
movi (((datalabel _GLOBAL_OFFSET_TABLE_-(.LPCS0-.)) >> 16) & 65535), r12
shori ((datalabel _GLOBAL_OFFSET_TABLE_-(.LPCS0-.)) & 65535), r12
.LPCS0: ptrel/u r12, tr0
movi ((ffi_closure_helper_SYSV@GOTPLT) & 65535), r1
gettr tr0, r12
ldx.l r1, r12, r1
ptabs r1, tr0
#else
pt/l ffi_closure_helper_SYSV, tr0
#endif
blink tr0, r18
shlli r2, 1, r1
movi (((datalabel .L_table) >> 16) & 65535), r2
shori ((datalabel .L_table) & 65535), r2
ldx.w r2, r1, r1
add r1, r2, r1
pt/l .L_case_v, tr1
ptabs r1, tr0
blink tr0, r63
.align 2
.L_table:
.word .L_case_v - datalabel .L_table /* FFI_TYPE_VOID */
.word .L_case_i - datalabel .L_table /* FFI_TYPE_INT */
.word .L_case_f - datalabel .L_table /* FFI_TYPE_FLOAT */
.word .L_case_d - datalabel .L_table /* FFI_TYPE_DOUBLE */
.word .L_case_d - datalabel .L_table /* FFI_TYPE_LONGDOUBLE */
.word .L_case_uq - datalabel .L_table /* FFI_TYPE_UINT8 */
.word .L_case_q - datalabel .L_table /* FFI_TYPE_SINT8 */
.word .L_case_uh - datalabel .L_table /* FFI_TYPE_UINT16 */
.word .L_case_h - datalabel .L_table /* FFI_TYPE_SINT16 */
.word .L_case_i - datalabel .L_table /* FFI_TYPE_UINT32 */
.word .L_case_i - datalabel .L_table /* FFI_TYPE_SINT32 */
.word .L_case_ll - datalabel .L_table /* FFI_TYPE_UINT64 */
.word .L_case_ll - datalabel .L_table /* FFI_TYPE_SINT64 */
.word .L_case_v - datalabel .L_table /* FFI_TYPE_STRUCT */
.word .L_case_i - datalabel .L_table /* FFI_TYPE_POINTER */
.align 2
.L_case_d:
fld.d r14, 16, dr0
blink tr1, r63
.L_case_f:
fld.s r14, 16, fr0
blink tr1, r63
.L_case_ll:
ld.q r14, 16, r2
blink tr1, r63
.L_case_i:
ld.l r14, 16, r2
blink tr1, r63
.L_case_q:
ld.b r14, 16, r2
blink tr1, r63
.L_case_uq:
ld.ub r14, 16, r2
blink tr1, r63
.L_case_h:
ld.w r14, 16, r2
blink tr1, r63
.L_case_uh:
ld.uw r14, 16, r2
blink tr1, r63
.L_case_v:
add.l r14, r63, r15
ld.l r15, 4, r12
ld.l r15, 8, r14
ld.l r15, 12, r18
addi.l r15, 136, r15
ptabs r18, tr0
blink tr0, r63
.LFE2:
.ffi_closure_SYSV_end:
.size CNAME(ffi_closure_SYSV),.ffi_closure_SYSV_end-CNAME(ffi_closure_SYSV)
#if defined __ELF__ && defined __linux__
.section .note.GNU-stack,"",@progbits
#endif
.section ".eh_frame","aw",@progbits
__FRAME_BEGIN__:
.4byte .LECIE1-.LSCIE1 /* Length of Common Information Entry */
.LSCIE1:
.4byte 0x0 /* CIE Identifier Tag */
.byte 0x1 /* CIE Version */
#ifdef PIC
.ascii "zR\0" /* CIE Augmentation */
#else
.byte 0x0 /* CIE Augmentation */
#endif
.uleb128 0x1 /* CIE Code Alignment Factor */
.sleb128 -4 /* CIE Data Alignment Factor */
.byte 0x12 /* CIE RA Column */
#ifdef PIC
.uleb128 0x1 /* Augmentation size */
.byte 0x10 /* FDE Encoding (pcrel) */
#endif
.byte 0xc /* DW_CFA_def_cfa */
.uleb128 0xf
.uleb128 0x0
.align 2
.LECIE1:
.LSFDE1:
.4byte datalabel .LEFDE1-datalabel .LASFDE1 /* FDE Length */
.LASFDE1:
.4byte datalabel .LASFDE1-datalabel __FRAME_BEGIN__
#ifdef PIC
.4byte .LFB1-. /* FDE initial location */
#else
.4byte .LFB1 /* FDE initial location */
#endif
.4byte datalabel .LFE1-datalabel .LFB1 /* FDE address range */
#ifdef PIC
.uleb128 0x0 /* Augmentation size */
#endif
.byte 0x4 /* DW_CFA_advance_loc4 */
.4byte datalabel .LCFI0-datalabel .LFB1
.byte 0xe /* DW_CFA_def_cfa_offset */
.uleb128 0x30
.byte 0x4 /* DW_CFA_advance_loc4 */
.4byte datalabel .LCFI1-datalabel .LCFI0
.byte 0x8e /* DW_CFA_offset, column 0xe */
.uleb128 0xc
.byte 0x92 /* DW_CFA_offset, column 0x12 */
.uleb128 0xb
.byte 0x9c /* DW_CFA_offset, column 0x1c */
.uleb128 0xa
.byte 0x9d /* DW_CFA_offset, column 0x1d */
.uleb128 0x8
.byte 0x9e /* DW_CFA_offset, column 0x1e */
.uleb128 0x6
.byte 0x9f /* DW_CFA_offset, column 0x1f */
.uleb128 0x4
.byte 0xa0 /* DW_CFA_offset, column 0x20 */
.uleb128 0x2
.byte 0x4 /* DW_CFA_advance_loc4 */
.4byte datalabel .LCFI2-datalabel .LCFI1
.byte 0xd /* DW_CFA_def_cfa_register */
.uleb128 0xe
.align 2
.LEFDE1:
.LSFDE3:
.4byte datalabel .LEFDE3-datalabel .LASFDE3 /* FDE Length */
.LASFDE3:
.4byte datalabel .LASFDE3-datalabel __FRAME_BEGIN__
#ifdef PIC
.4byte .LFB2-. /* FDE initial location */
#else
.4byte .LFB2 /* FDE initial location */
#endif
.4byte datalabel .LFE2-datalabel .LFB2 /* FDE address range */
#ifdef PIC
.uleb128 0x0 /* Augmentation size */
#endif
.byte 0x4 /* DW_CFA_advance_loc4 */
.4byte datalabel .LCFI3-datalabel .LFB2
.byte 0xe /* DW_CFA_def_cfa_offset */
.uleb128 0x88
.byte 0x4 /* DW_CFA_advance_loc4 */
.4byte datalabel .LCFI4-datalabel .LCFI3
.byte 0x8c /* DW_CFA_offset, column 0xc */
.uleb128 0x21
.byte 0x8e /* DW_CFA_offset, column 0xe */
.uleb128 0x20
.byte 0x92 /* DW_CFA_offset, column 0x12 */
.uleb128 0x1f
.byte 0x4 /* DW_CFA_advance_loc4 */
.4byte datalabel .LCFI5-datalabel .LCFI4
.byte 0xd /* DW_CFA_def_cfa_register */
.uleb128 0xe
.align 2
.LEFDE3:
|
suryaveeryadav/Python-3.4.0
| 3,050
|
Modules/_ctypes/libffi/src/m32r/sysv.S
|
/* -----------------------------------------------------------------------
sysv.S - Copyright (c) 2004 Renesas Technology
M32R Foreign Function Interface
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND, EXPRESS
OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL RENESAS TECHNOLOGY BE LIABLE FOR ANY CLAIM, DAMAGES OR
OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
OTHER DEALINGS IN THE SOFTWARE.
----------------------------------------------------------------------- */
#define LIBFFI_ASM
#include <fficonfig.h>
#include <ffi.h>
#ifdef HAVE_MACHINE_ASM_H
#include <machine/asm.h>
#else
/* XXX these lose for some platforms, I'm sure. */
#define CNAME(x) x
#define ENTRY(x) .globl CNAME(x)! .type CNAME(x),%function! CNAME(x):
#endif
.text
/* R0: ffi_prep_args */
/* R1: &ecif */
/* R2: cif->bytes */
/* R3: fig->flags */
/* sp+0: ecif.rvalue */
/* sp+4: fn */
/* This assumes we are using gas. */
ENTRY(ffi_call_SYSV)
/* Save registers. */
push fp
push lr
push r3
push r2
push r1
push r0
mv fp, sp
/* Make room for all of the new args. */
sub sp, r2
/* Place all of the ffi_prep_args in position. */
mv lr, r0
mv r0, sp
/* R1 already set. */
/* And call. */
jl lr
/* Move first 4 parameters in registers... */
ld r0, @(0,sp)
ld r1, @(4,sp)
ld r2, @(8,sp)
ld r3, @(12,sp)
/* ...and adjust the stack. */
ld lr, @(8,fp)
cmpi lr, #16
bc adjust_stack
ldi lr, #16
adjust_stack:
add sp, lr
/* Call the function. */
ld lr, @(28,fp)
jl lr
/* Remove the space we pushed for the args. */
mv sp, fp
/* Load R2 with the pointer to storage for the return value. */
ld r2, @(24,sp)
/* Load R3 with the return type code. */
ld r3, @(12,sp)
/* If the return value pointer is NULL, assume no return value. */
beqz r2, epilogue
/* Return INT. */
ldi r4, #FFI_TYPE_INT
bne r3, r4, return_double
st r0, @r2
bra epilogue
return_double:
/* Return DOUBLE or LONGDOUBLE. */
ldi r4, #FFI_TYPE_DOUBLE
bne r3, r4, epilogue
st r0, @r2
st r1, @(4,r2)
epilogue:
pop r0
pop r1
pop r2
pop r3
pop lr
pop fp
jmp lr
.ffi_call_SYSV_end:
.size CNAME(ffi_call_SYSV),.ffi_call_SYSV_end-CNAME(ffi_call_SYSV)
|
suryaveeryadav/Python-3.4.0
| 5,479
|
Modules/_ctypes/libffi/src/cris/sysv.S
|
/* -----------------------------------------------------------------------
sysv.S - Copyright (c) 2004 Simon Posnjak
Copyright (c) 2005 Axis Communications AB
CRIS Foreign Function Interface
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND, EXPRESS
OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL SIMON POSNJAK BE LIABLE FOR ANY CLAIM, DAMAGES OR
OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
OTHER DEALINGS IN THE SOFTWARE.
----------------------------------------------------------------------- */
#define LIBFFI_ASM
#include <ffi.h>
#define CONCAT(x,y) x ## y
#define XCONCAT(x,y) CONCAT (x, y)
#define L(x) XCONCAT (__USER_LABEL_PREFIX__, x)
.text
;; OK, when we get called we should have this (according to
;; AXIS ETRAX 100LX Programmer's Manual chapter 6.3).
;;
;; R10: ffi_prep_args (func. pointer)
;; R11: &ecif
;; R12: cif->bytes
;; R13: fig->flags
;; sp+0: ecif.rvalue
;; sp+4: fn (function pointer to the function that we need to call)
.globl L(ffi_call_SYSV)
.type L(ffi_call_SYSV),@function
.hidden L(ffi_call_SYSV)
L(ffi_call_SYSV):
;; Save the regs to the stack.
push $srp
;; Used for stack pointer saving.
push $r6
;; Used for function address pointer.
push $r7
;; Used for stack pointer saving.
push $r8
;; We save fig->flags to stack we will need them after we
;; call The Function.
push $r13
;; Saving current stack pointer.
move.d $sp,$r8
move.d $sp,$r6
;; Move address of ffi_prep_args to r13.
move.d $r10,$r13
;; Make room on the stack for the args of fn.
sub.d $r12,$sp
;; Function void ffi_prep_args(char *stack, extended_cif *ecif) parameters are:
;; r10 <-- stack pointer
;; r11 <-- &ecif (already there)
move.d $sp,$r10
;; Call the function.
jsr $r13
;; Save the size of the structures which are passed on stack.
move.d $r10,$r7
;; Move first four args in to r10..r13.
move.d [$sp+0],$r10
move.d [$sp+4],$r11
move.d [$sp+8],$r12
move.d [$sp+12],$r13
;; Adjust the stack and check if any parameters are given on stack.
addq 16,$sp
sub.d $r7,$r6
cmp.d $sp,$r6
bpl go_on
nop
go_on_no_params_on_stack:
move.d $r6,$sp
go_on:
;; Discover if we need to put rval address in to r9.
move.d [$r8+0],$r7
cmpq FFI_TYPE_STRUCT,$r7
bne call_now
nop
;; Move rval address to $r9.
move.d [$r8+20],$r9
call_now:
;; Move address of The Function in to r7.
move.d [$r8+24],$r7
;; Call The Function.
jsr $r7
;; Reset stack.
move.d $r8,$sp
;; Load rval type (fig->flags) in to r13.
pop $r13
;; Detect rval type.
cmpq FFI_TYPE_VOID,$r13
beq epilogue
cmpq FFI_TYPE_STRUCT,$r13
beq epilogue
cmpq FFI_TYPE_DOUBLE,$r13
beq return_double_or_longlong
cmpq FFI_TYPE_UINT64,$r13
beq return_double_or_longlong
cmpq FFI_TYPE_SINT64,$r13
beq return_double_or_longlong
nop
;; Just return the 32 bit value.
ba return
nop
return_double_or_longlong:
;; Load half of the rval to r10 and the other half to r11.
move.d [$sp+16],$r13
move.d $r10,[$r13]
addq 4,$r13
move.d $r11,[$r13]
ba epilogue
nop
return:
;; Load the rval to r10.
move.d [$sp+16],$r13
move.d $r10,[$r13]
epilogue:
pop $r8
pop $r7
pop $r6
Jump [$sp+]
.size ffi_call_SYSV,.-ffi_call_SYSV
/* Save R10..R13 into an array, somewhat like varargs. Copy the next
argument too, to simplify handling of any straddling parameter.
Save R9 and SP after those. Jump to function handling the rest.
Since this is a template, copied and the main function filled in by
the user. */
.globl L(ffi_cris_trampoline_template)
.type L(ffi_cris_trampoline_template),@function
.hidden L(ffi_cris_trampoline_template)
L(ffi_cris_trampoline_template):
0:
/* The value we get for "PC" is right after the prefix instruction,
two bytes from the beginning, i.e. 0b+2. */
move.d $r10,[$pc+2f-(0b+2)]
move.d $pc,$r10
1:
addq 2f-1b+4,$r10
move.d $r11,[$r10+]
move.d $r12,[$r10+]
move.d $r13,[$r10+]
move.d [$sp],$r11
move.d $r11,[$r10+]
move.d $r9,[$r10+]
move.d $sp,[$r10+]
subq FFI_CRIS_TRAMPOLINE_DATA_PART_SIZE,$r10
move.d 0,$r11
3:
jump 0
2:
.size ffi_cris_trampoline_template,.-0b
/* This macro create a constant usable as "extern const int \name" in
C from within libffi, when \name has no prefix decoration. */
.macro const name,value
.globl \name
.type \name,@object
.hidden \name
\name:
.dword \value
.size \name,4
.endm
/* Constants for offsets within the trampoline. We could do this with
just symbols, avoiding memory contents and memory accesses, but the
C usage code would look a bit stranger. */
const L(ffi_cris_trampoline_fn_offset),2b-4-0b
const L(ffi_cris_trampoline_closure_offset),3b-4-0b
|
suryaveeryadav/Python-3.4.0
| 3,414
|
Modules/_ctypes/libffi/src/frv/eabi.S
|
/* -----------------------------------------------------------------------
eabi.S - Copyright (c) 2004 Anthony Green
FR-V Assembly glue.
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND, EXPRESS
OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR
OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
OTHER DEALINGS IN THE SOFTWARE.
----------------------------------------------------------------------- */
#define LIBFFI_ASM
#include <fficonfig.h>
#include <ffi.h>
.globl ffi_prep_args_EABI
.text
.p2align 4
.globl ffi_call_EABI
.type ffi_call_EABI, @function
# gr8 : ffi_prep_args
# gr9 : &ecif
# gr10: cif->bytes
# gr11: fig->flags
# gr12: ecif.rvalue
# gr13: fn
ffi_call_EABI:
addi sp, #-80, sp
sti fp, @(sp, #24)
addi sp, #24, fp
movsg lr, gr5
/* Make room for the new arguments. */
/* subi sp, fp, gr10 */
/* Store return address and incoming args on stack. */
sti gr5, @(fp, #8)
sti gr8, @(fp, #-4)
sti gr9, @(fp, #-8)
sti gr10, @(fp, #-12)
sti gr11, @(fp, #-16)
sti gr12, @(fp, #-20)
sti gr13, @(fp, #-24)
sub sp, gr10, sp
/* Call ffi_prep_args. */
ldi @(fp, #-4), gr4
addi sp, #0, gr8
ldi @(fp, #-8), gr9
#ifdef __FRV_FDPIC__
ldd @(gr4, gr0), gr14
calll @(gr14, gr0)
#else
calll @(gr4, gr0)
#endif
/* ffi_prep_args returns the new stack pointer. */
mov gr8, gr4
ldi @(sp, #0), gr8
ldi @(sp, #4), gr9
ldi @(sp, #8), gr10
ldi @(sp, #12), gr11
ldi @(sp, #16), gr12
ldi @(sp, #20), gr13
/* Always copy the return value pointer into the hidden
parameter register. This is only strictly necessary
when we're returning an aggregate type, but it doesn't
hurt to do this all the time, and it saves a branch. */
ldi @(fp, #-20), gr3
/* Use the ffi_prep_args return value for the new sp. */
mov gr4, sp
/* Call the target function. */
ldi @(fp, -24), gr4
#ifdef __FRV_FDPIC__
ldd @(gr4, gr0), gr14
calll @(gr14, gr0)
#else
calll @(gr4, gr0)
#endif
/* Store the result. */
ldi @(fp, #-16), gr10 /* fig->flags */
ldi @(fp, #-20), gr4 /* ecif.rvalue */
/* Is the return value stored in two registers? */
cmpi gr10, #8, icc0
bne icc0, 0, .L2
/* Yes, save them. */
sti gr8, @(gr4, #0)
sti gr9, @(gr4, #4)
bra .L3
.L2:
/* Is the return value a structure? */
cmpi gr10, #-1, icc0
beq icc0, 0, .L3
/* No, save a 4 byte return value. */
sti gr8, @(gr4, #0)
.L3:
/* Restore the stack, and return. */
ldi @(fp, 8), gr5
ld @(fp, gr0), fp
addi sp,#80,sp
jmpl @(gr5,gr0)
.size ffi_call_EABI, .-ffi_call_EABI
|
suryaveeryadav/Python-3.4.0
| 5,610
|
Modules/_ctypes/libffi/src/xtensa/sysv.S
|
/* -----------------------------------------------------------------------
sysv.S - Copyright (c) 2013 Tensilica, Inc.
XTENSA Foreign Function Interface
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
DEALINGS IN THE SOFTWARE.
----------------------------------------------------------------------- */
#define LIBFFI_ASM
#include <fficonfig.h>
#include <ffi.h>
#define ENTRY(name) .text; .globl name; .type name,@function; .align 4; name:
#define END(name) .size name , . - name
/* Assert that the table below is in sync with ffi.h. */
#if FFI_TYPE_UINT8 != 5 \
|| FFI_TYPE_SINT8 != 6 \
|| FFI_TYPE_UINT16 != 7 \
|| FFI_TYPE_SINT16 != 8 \
|| FFI_TYPE_UINT32 != 9 \
|| FFI_TYPE_SINT32 != 10 \
|| FFI_TYPE_UINT64 != 11
#error "xtensa/sysv.S out of sync with ffi.h"
#endif
/* ffi_call_SYSV (rvalue, rbytes, flags, (*fnaddr)(), bytes, ecif)
void *rvalue; a2
unsigned long rbytes; a3
unsigned flags; a4
void (*fnaddr)(); a5
unsigned long bytes; a6
extended_cif* ecif) a7
*/
ENTRY(ffi_call_SYSV)
entry a1, 32 # 32 byte frame for using call8 below
mov a10, a7 # a10(->arg0): ecif
sub a11, a1, a6 # a11(->arg1): stack pointer
mov a7, a1 # fp
movsp a1, a11 # set new sp = old_sp - bytes
movi a8, ffi_prep_args
callx8 a8 # ffi_prep_args(ecif, stack)
# prepare to move stack pointer back up to 6 arguments
# note that 'bytes' is already aligned
movi a10, 6*4
sub a11, a6, a10
movgez a6, a10, a11
add a6, a1, a6
# we can pass up to 6 arguments in registers
# for simplicity, just load 6 arguments
# (the stack size is at least 32 bytes, so no risk to cross boundaries)
l32i a10, a1, 0
l32i a11, a1, 4
l32i a12, a1, 8
l32i a13, a1, 12
l32i a14, a1, 16
l32i a15, a1, 20
# move stack pointer
movsp a1, a6
callx8 a5 # (*fn)(args...)
# Handle return value(s)
beqz a2, .Lexit
movi a5, FFI_TYPE_STRUCT
bne a4, a5, .Lstore
movi a5, 16
blt a5, a3, .Lexit
s32i a10, a2, 0
blti a3, 5, .Lexit
addi a3, a3, -1
s32i a11, a2, 4
blti a3, 8, .Lexit
s32i a12, a2, 8
blti a3, 12, .Lexit
s32i a13, a2, 12
.Lexit: retw
.Lstore:
addi a4, a4, -FFI_TYPE_UINT8
bgei a4, 7, .Lexit # should never happen
movi a6, store_calls
add a4, a4, a4
addx4 a6, a4, a6 # store_table + idx * 8
jx a6
.align 8
store_calls:
# UINT8
s8i a10, a2, 0
retw
# SINT8
.align 8
s8i a10, a2, 0
retw
# UINT16
.align 8
s16i a10, a2, 0
retw
# SINT16
.align 8
s16i a10, a2, 0
retw
# UINT32
.align 8
s32i a10, a2, 0
retw
# SINT32
.align 8
s32i a10, a2, 0
retw
# UINT64
.align 8
s32i a10, a2, 0
s32i a11, a2, 4
retw
END(ffi_call_SYSV)
/*
* void ffi_cacheflush (unsigned long start, unsigned long end)
*/
#define EXTRA_ARGS_SIZE 24
ENTRY(ffi_cacheflush)
entry a1, 16
1: dhwbi a2, 0
ihi a2, 0
addi a2, a2, 4
blt a2, a3, 1b
retw
END(ffi_cacheflush)
/* ffi_trampoline is copied to the stack */
ENTRY(ffi_trampoline)
entry a1, 16 + (FFI_REGISTER_NARGS * 4) + (4 * 4) # [ 0]
j 2f # [ 3]
.align 4 # [ 6]
1: .long 0 # [ 8]
2: l32r a15, 1b # [12]
_mov a14, a0 # [15]
callx0 a15 # [18]
# [21]
END(ffi_trampoline)
/*
* ffi_closure()
*
* a0: closure + 21
* a14: return address (a0)
*/
ENTRY(ffi_closure_SYSV)
/* intentionally omitting entry here */
# restore return address (a0) and move pointer to closure to a10
addi a10, a0, -21
mov a0, a14
# allow up to 4 arguments as return values
addi a11, a1, 4 * 4
# save up to 6 arguments to stack (allocated by entry below)
s32i a2, a11, 0
s32i a3, a11, 4
s32i a4, a11, 8
s32i a5, a11, 12
s32i a6, a11, 16
s32i a7, a11, 20
movi a8, ffi_closure_SYSV_inner
mov a12, a1
callx8 a8 # .._inner(*closure, **avalue, *rvalue)
# load up to four return arguments
l32i a2, a1, 0
l32i a3, a1, 4
l32i a4, a1, 8
l32i a5, a1, 12
# (sign-)extend return value
movi a11, FFI_TYPE_UINT8
bne a10, a11, 1f
extui a2, a2, 0, 8
retw
1: movi a11, FFI_TYPE_SINT8
bne a10, a11, 1f
sext a2, a2, 7
retw
1: movi a11, FFI_TYPE_UINT16
bne a10, a11, 1f
extui a2, a2, 0, 16
retw
1: movi a11, FFI_TYPE_SINT16
bne a10, a11, 1f
sext a2, a2, 15
1: retw
END(ffi_closure_SYSV)
|
suryaveeryadav/Python-3.4.0
| 7,517
|
Modules/_ctypes/libffi/src/metag/sysv.S
|
/* -----------------------------------------------------------------------
sysv.S - Copyright (c) 2013 Imagination Technologies Ltd.
Meta Foreign Function Interface
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
DEALINGS IN THE SOFTWARE.
----------------------------------------------------------------------- */
#define LIBFFI_ASM
#include <fficonfig.h>
#include <ffi.h>
#ifdef HAVE_MACHINE_ASM_H
#include <machine/asm.h>
#else
#ifdef __USER_LABEL_PREFIX__
#define CONCAT1(a, b) CONCAT2(a, b)
#define CONCAT2(a, b) a ## b
/* Use the right prefix for global labels. */
#define CNAME(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
#else
#define CNAME(x) x
#endif
#define ENTRY(x) .globl CNAME(x); .type CNAME(x), %function; CNAME(x):
#endif
#ifdef __ELF__
#define LSYM(x) .x
#else
#define LSYM(x) x
#endif
.macro call_reg x=
.text
.balign 4
mov D1RtP, \x
swap D1RtP, PC
.endm
! Save register arguments
.macro SAVE_ARGS
.text
.balign 4
setl [A0StP++], D0Ar6, D1Ar5
setl [A0StP++], D0Ar4, D1Ar3
setl [A0StP++], D0Ar2, D1Ar1
.endm
! Save retrun, frame pointer and other regs
.macro SAVE_REGS regs=
.text
.balign 4
setl [A0StP++], D0FrT, D1RtP
! Needs to be a pair of regs
.ifnc "\regs",""
setl [A0StP++], \regs
.endif
.endm
! Declare a global function
.macro METAG_FUNC_START name
.text
.balign 4
ENTRY(\name)
.endm
! Return registers from the stack. Reverse SAVE_REGS operation
.macro RET_REGS regs=, cond=
.ifnc "\regs", ""
getl \regs, [--A0StP]
.endif
getl D0FrT, D1RtP, [--A0StP]
.endm
! Return arguments
.macro RET_ARGS
getl D0Ar2, D1Ar1, [--A0StP]
getl D0Ar4, D1Ar3, [--A0StP]
getl D0Ar6, D1Ar5, [--A0StP]
.endm
! D1Ar1: fn
! D0Ar2: &ecif
! D1Ar3: cif->bytes
! D0Ar4: fig->flags
! D1Ar5: ecif.rvalue
! This assumes we are using GNU as
METAG_FUNC_START ffi_call_SYSV
! Save argument registers
SAVE_ARGS
! new frame
mov D0FrT, A0FrP
add A0FrP, A0StP, #0
! Preserve the old frame pointer
SAVE_REGS "D1.5, D0.5"
! Make room for new args. cifs->bytes is the total space for input
! and return arguments
add A0StP, A0StP, D1Ar3
! Preserve cifs->bytes & fn
mov D0.5, D1Ar3
mov D1.5, D1Ar1
! Place all of the ffi_prep_args in position
mov D1Ar1, A0StP
! Call ffi_prep_args(stack, &ecif)
#ifdef __PIC__
callr D1RtP, CNAME(ffi_prep_args@PLT)
#else
callr D1RtP, CNAME(ffi_prep_args)
#endif
! Restore fn pointer
! The foreign stack should look like this
! XXXXX XXXXXX <--- stack pointer
! FnArgN rvalue
! FnArgN+2 FnArgN+1
! FnArgN+4 FnArgN+3
! ....
!
! A0StP now points to the first (or return) argument + 4
! Preserve cif->bytes
getl D0Ar2, D1Ar1, [--A0StP]
getl D0Ar4, D1Ar3, [--A0StP]
getl D0Ar6, D1Ar5, [--A0StP]
! Place A0StP to the first argument again
add A0StP, A0StP, #24 ! That's because we loaded 6 regs x 4 byte each
! A0FrP points to the initial stack without the reserved space for the
! cifs->bytes, whilst A0StP points to the stack after the space allocation
! fn was the first argument of ffi_call_SYSV.
! The stack at this point looks like this:
!
! A0StP(on entry to _SYSV) -> Arg6 Arg5 | low
! Arg4 Arg3 |
! Arg2 Arg1 |
! A0FrP ----> D0FrtP D1RtP |
! D1.5 D0.5 |
! A0StP(bf prep_args) -> FnArgn FnArgn-1 |
! FnArgn-2FnArgn-3 |
! ................ | <= cifs->bytes
! FnArg4 FnArg3 |
! A0StP (prv_A0StP+cifs->bytes) FnArg2 FnArg1 | high
!
! fn was in Arg1 so it's located in in A0FrP+#-0xC
!
! D0Re0 contains the size of arguments stored in registers
sub A0StP, A0StP, D0Re0
! Arg1 is the function pointer for the foreign call. This has been
! preserved in D1.5
! Time to call (fn). Arguments should be like this:
! Arg1-Arg6 are loaded to regs
! The rest of the arguments are stored in stack pointed by A0StP
call_reg D1.5
! Reset stack.
mov A0StP, A0FrP
! Load Arg1 with the pointer to storage for the return type
! This was stored in Arg5
getd D1Ar1, [A0FrP+#-20]
! Load D0Ar2 with the return type code. This was stored in Arg4 (flags)
getd D0Ar2, [A0FrP+#-16]
! We are ready to start processing the return value
! D0Re0 (and D1Re0) hold the return value
! If the return value is NULL, assume no return value
cmp D1Ar1, #0
beq LSYM(Lepilogue)
! return INT
cmp D0Ar2, #FFI_TYPE_INT
! Sadly, there is no setd{cc} instruction so we need to workaround that
bne .INT64
setd [D1Ar1], D0Re0
b LSYM(Lepilogue)
! return INT64
.INT64:
cmp D0Ar2, #FFI_TYPE_SINT64
setleq [D1Ar1], D0Re0, D1Re0
! return DOUBLE
cmp D0Ar2, #FFI_TYPE_DOUBLE
setl [D1AR1++], D0Re0, D1Re0
LSYM(Lepilogue):
! At this point, the stack pointer points right after the argument
! saved area. We need to restore 4 regs, therefore we need to move
! 16 bytes ahead.
add A0StP, A0StP, #16
RET_REGS "D1.5, D0.5"
RET_ARGS
getd D0Re0, [A0StP]
mov A0FrP, D0FrT
swap D1RtP, PC
.ffi_call_SYSV_end:
.size CNAME(ffi_call_SYSV),.ffi_call_SYSV_end-CNAME(ffi_call_SYSV)
/*
(called by ffi_metag_trampoline)
void ffi_closure_SYSV (ffi_closure*)
(called by ffi_closure_SYSV)
unsigned int FFI_HIDDEN
ffi_closure_SYSV_inner (closure,respp, args)
ffi_closure *closure;
void **respp;
void *args;
*/
METAG_FUNC_START ffi_closure_SYSV
! We assume that D1Ar1 holds the address of the
! ffi_closure struct. We will use that to fetch the
! arguments. The stack pointer points to an empty space
! and it is ready to store more data.
! D1Ar1 is ready
! Allocate stack space for return value
add A0StP, A0StP, #8
! Store it to D0Ar2
sub D0Ar2, A0StP, #8
sub D1Ar3, A0FrP, #4
! D1Ar3 contains the address of the original D1Ar1 argument
! We need to subtract #4 later on
! Preverve D0Ar2
mov D0.5, D0Ar2
#ifdef __PIC__
callr D1RtP, CNAME(ffi_closure_SYSV_inner@PLT)
#else
callr D1RtP, CNAME(ffi_closure_SYSV_inner)
#endif
! Check the return value and store it to D0.5
cmp D0Re0, #FFI_TYPE_INT
beq .Lretint
cmp D0Re0, #FFI_TYPE_DOUBLE
beq .Lretdouble
.Lclosure_epilogue:
sub A0StP, A0StP, #8
RET_REGS "D1.5, D0.5"
RET_ARGS
swap D1RtP, PC
.Lretint:
setd [D0.5], D0Re0
b .Lclosure_epilogue
.Lretdouble:
setl [D0.5++], D0Re0, D1Re0
b .Lclosure_epilogue
.ffi_closure_SYSV_end:
.size CNAME(ffi_closure_SYSV),.ffi_closure_SYSV_end-CNAME(ffi_closure_SYSV)
ENTRY(ffi_metag_trampoline)
SAVE_ARGS
! New frame
mov A0FrP, A0StP
SAVE_REGS "D1.5, D0.5"
mov D0.5, PC
! Load D1Ar1 the value of ffi_metag_trampoline
getd D1Ar1, [D0.5 + #8]
! Jump to ffi_closure_SYSV
getd PC, [D0.5 + #12]
|
suryaveeryadav/Python-3.4.0
| 9,226
|
Modules/_ctypes/libffi/src/pa/hpux32.S
|
/* -----------------------------------------------------------------------
hpux32.S - Copyright (c) 2006 Free Software Foundation, Inc.
(c) 2008 Red Hat, Inc.
based on src/pa/linux.S
HP-UX PA Foreign Function Interface
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND, EXPRESS
OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR
OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
OTHER DEALINGS IN THE SOFTWARE.
----------------------------------------------------------------------- */
#define LIBFFI_ASM
#include <fficonfig.h>
#include <ffi.h>
.LEVEL 1.1
.SPACE $PRIVATE$
.IMPORT $global$,DATA
.IMPORT $$dyncall,MILLICODE
.SUBSPA $DATA$
.align 4
/* void ffi_call_pa32(void (*)(char *, extended_cif *),
extended_cif *ecif,
unsigned bytes,
unsigned flags,
unsigned *rvalue,
void (*fn)(void));
*/
.export ffi_call_pa32,ENTRY,PRIV_LEV=3
.import ffi_prep_args_pa32,CODE
.SPACE $TEXT$
.SUBSPA $CODE$
.align 4
L$FB1
ffi_call_pa32
.proc
.callinfo FRAME=64,CALLS,SAVE_RP,SAVE_SP,ENTRY_GR=4
.entry
stw %rp, -20(%sp)
copy %r3, %r1
L$CFI11
copy %sp, %r3
L$CFI12
/* Setup the stack for calling prep_args...
We want the stack to look like this:
[ Previous stack ] <- %r3
[ 64-bytes register save area ] <- %r4
[ Stack space for actual call, passed as ] <- %arg0
[ arg0 to ffi_prep_args_pa32 ]
[ Stack for calling prep_args ] <- %sp
*/
stwm %r1, 64(%sp)
stw %r4, 12(%r3)
L$CFI13
copy %sp, %r4
addl %arg2, %r4, %arg0 ; arg stack
stw %arg3, -48(%r3) ; save flags we need it later
/* Call prep_args:
%arg0(stack) -- set up above
%arg1(ecif) -- same as incoming param
%arg2(bytes) -- same as incoming param */
bl ffi_prep_args_pa32,%r2
ldo 64(%arg0), %sp
ldo -64(%sp), %sp
/* now %sp should point where %arg0 was pointing. */
/* Load the arguments that should be passed in registers
The fp args are loaded by the prep_args function. */
ldw -36(%sp), %arg0
ldw -40(%sp), %arg1
ldw -44(%sp), %arg2
ldw -48(%sp), %arg3
/* in case the function is going to return a structure
we need to give it a place to put the result. */
ldw -52(%r3), %ret0 ; %ret0 <- rvalue
ldw -56(%r3), %r22 ; %r22 <- function to call
bl $$dyncall, %r31 ; Call the user function
copy %r31, %rp
/* Prepare to store the result; we need to recover flags and rvalue. */
ldw -48(%r3), %r21 ; r21 <- flags
ldw -52(%r3), %r20 ; r20 <- rvalue
/* Store the result according to the return type. The most
likely types should come first. */
L$checkint
comib,<>,n FFI_TYPE_INT, %r21, L$checkint8
b L$done
stw %ret0, 0(%r20)
L$checkint8
comib,<>,n FFI_TYPE_UINT8, %r21, L$checkint16
b L$done
stb %ret0, 0(%r20)
L$checkint16
comib,<>,n FFI_TYPE_UINT16, %r21, L$checkdbl
b L$done
sth %ret0, 0(%r20)
L$checkdbl
comib,<>,n FFI_TYPE_DOUBLE, %r21, L$checkfloat
b L$done
fstd %fr4,0(%r20)
L$checkfloat
comib,<>,n FFI_TYPE_FLOAT, %r21, L$checkll
b L$done
fstw %fr4L,0(%r20)
L$checkll
comib,<>,n FFI_TYPE_UINT64, %r21, L$checksmst2
stw %ret0, 0(%r20)
b L$done
stw %ret1, 4(%r20)
L$checksmst2
comib,<>,n FFI_TYPE_SMALL_STRUCT2, %r21, L$checksmst3
/* 2-byte structs are returned in ret0 as ????xxyy. */
extru %ret0, 23, 8, %r22
stbs,ma %r22, 1(%r20)
b L$done
stb %ret0, 0(%r20)
L$checksmst3
comib,<>,n FFI_TYPE_SMALL_STRUCT3, %r21, L$checksmst4
/* 3-byte structs are returned in ret0 as ??xxyyzz. */
extru %ret0, 15, 8, %r22
stbs,ma %r22, 1(%r20)
extru %ret0, 23, 8, %r22
stbs,ma %r22, 1(%r20)
b L$done
stb %ret0, 0(%r20)
L$checksmst4
comib,<>,n FFI_TYPE_SMALL_STRUCT4, %r21, L$checksmst5
/* 4-byte structs are returned in ret0 as wwxxyyzz. */
extru %ret0, 7, 8, %r22
stbs,ma %r22, 1(%r20)
extru %ret0, 15, 8, %r22
stbs,ma %r22, 1(%r20)
extru %ret0, 23, 8, %r22
stbs,ma %r22, 1(%r20)
b L$done
stb %ret0, 0(%r20)
L$checksmst5
comib,<>,n FFI_TYPE_SMALL_STRUCT5, %r21, L$checksmst6
/* 5 byte values are returned right justified:
ret0 ret1
5: ??????aa bbccddee */
stbs,ma %ret0, 1(%r20)
extru %ret1, 7, 8, %r22
stbs,ma %r22, 1(%r20)
extru %ret1, 15, 8, %r22
stbs,ma %r22, 1(%r20)
extru %ret1, 23, 8, %r22
stbs,ma %r22, 1(%r20)
b L$done
stb %ret1, 0(%r20)
L$checksmst6
comib,<>,n FFI_TYPE_SMALL_STRUCT6, %r21, L$checksmst7
/* 6 byte values are returned right justified:
ret0 ret1
6: ????aabb ccddeeff */
extru %ret0, 23, 8, %r22
stbs,ma %r22, 1(%r20)
stbs,ma %ret0, 1(%r20)
extru %ret1, 7, 8, %r22
stbs,ma %r22, 1(%r20)
extru %ret1, 15, 8, %r22
stbs,ma %r22, 1(%r20)
extru %ret1, 23, 8, %r22
stbs,ma %r22, 1(%r20)
b L$done
stb %ret1, 0(%r20)
L$checksmst7
comib,<>,n FFI_TYPE_SMALL_STRUCT7, %r21, L$checksmst8
/* 7 byte values are returned right justified:
ret0 ret1
7: ??aabbcc ddeeffgg */
extru %ret0, 15, 8, %r22
stbs,ma %r22, 1(%r20)
extru %ret0, 23, 8, %r22
stbs,ma %r22, 1(%r20)
stbs,ma %ret0, 1(%r20)
extru %ret1, 7, 8, %r22
stbs,ma %r22, 1(%r20)
extru %ret1, 15, 8, %r22
stbs,ma %r22, 1(%r20)
extru %ret1, 23, 8, %r22
stbs,ma %r22, 1(%r20)
b L$done
stb %ret1, 0(%r20)
L$checksmst8
comib,<>,n FFI_TYPE_SMALL_STRUCT8, %r21, L$done
/* 8 byte values are returned right justified:
ret0 ret1
8: aabbccdd eeffgghh */
extru %ret0, 7, 8, %r22
stbs,ma %r22, 1(%r20)
extru %ret0, 15, 8, %r22
stbs,ma %r22, 1(%r20)
extru %ret0, 23, 8, %r22
stbs,ma %r22, 1(%r20)
stbs,ma %ret0, 1(%r20)
extru %ret1, 7, 8, %r22
stbs,ma %r22, 1(%r20)
extru %ret1, 15, 8, %r22
stbs,ma %r22, 1(%r20)
extru %ret1, 23, 8, %r22
stbs,ma %r22, 1(%r20)
stb %ret1, 0(%r20)
L$done
/* all done, return */
copy %r4, %sp ; pop arg stack
ldw 12(%r3), %r4
ldwm -64(%sp), %r3 ; .. and pop stack
ldw -20(%sp), %rp
bv %r0(%rp)
nop
.exit
.procend
L$FE1
/* void ffi_closure_pa32(void);
Called with closure argument in %r21 */
.SPACE $TEXT$
.SUBSPA $CODE$
.export ffi_closure_pa32,ENTRY,PRIV_LEV=3,RTNVAL=GR
.import ffi_closure_inner_pa32,CODE
.align 4
L$FB2
ffi_closure_pa32
.proc
.callinfo FRAME=64,CALLS,SAVE_RP,SAVE_SP,ENTRY_GR=3
.entry
stw %rp, -20(%sp)
copy %r3, %r1
L$CFI21
copy %sp, %r3
L$CFI22
stwm %r1, 64(%sp)
/* Put arguments onto the stack and call ffi_closure_inner. */
stw %arg0, -36(%r3)
stw %arg1, -40(%r3)
stw %arg2, -44(%r3)
stw %arg3, -48(%r3)
copy %r21, %arg0
bl ffi_closure_inner_pa32, %r2
copy %r3, %arg1
ldwm -64(%sp), %r3
ldw -20(%sp), %rp
ldw -36(%sp), %ret0
bv %r0(%rp)
ldw -40(%sp), %ret1
.exit
.procend
L$FE2:
.SPACE $PRIVATE$
.SUBSPA $DATA$
.align 4
.EXPORT _GLOBAL__F_ffi_call_pa32,DATA
_GLOBAL__F_ffi_call_pa32
L$frame1:
.word L$ECIE1-L$SCIE1 ;# Length of Common Information Entry
L$SCIE1:
.word 0x0 ;# CIE Identifier Tag
.byte 0x1 ;# CIE Version
.ascii "\0" ;# CIE Augmentation
.uleb128 0x1 ;# CIE Code Alignment Factor
.sleb128 4 ;# CIE Data Alignment Factor
.byte 0x2 ;# CIE RA Column
.byte 0xc ;# DW_CFA_def_cfa
.uleb128 0x1e
.uleb128 0x0
.align 4
L$ECIE1:
L$SFDE1:
.word L$EFDE1-L$ASFDE1 ;# FDE Length
L$ASFDE1:
.word L$ASFDE1-L$frame1 ;# FDE CIE offset
.word L$FB1 ;# FDE initial location
.word L$FE1-L$FB1 ;# FDE address range
.byte 0x4 ;# DW_CFA_advance_loc4
.word L$CFI11-L$FB1
.byte 0x83 ;# DW_CFA_offset, column 0x3
.uleb128 0x0
.byte 0x11 ;# DW_CFA_offset_extended_sf; save r2 at [r30-20]
.uleb128 0x2
.sleb128 -5
.byte 0x4 ;# DW_CFA_advance_loc4
.word L$CFI12-L$CFI11
.byte 0xd ;# DW_CFA_def_cfa_register = r3
.uleb128 0x3
.byte 0x4 ;# DW_CFA_advance_loc4
.word L$CFI13-L$CFI12
.byte 0x84 ;# DW_CFA_offset, column 0x4
.uleb128 0x3
.align 4
L$EFDE1:
L$SFDE2:
.word L$EFDE2-L$ASFDE2 ;# FDE Length
L$ASFDE2:
.word L$ASFDE2-L$frame1 ;# FDE CIE offset
.word L$FB2 ;# FDE initial location
.word L$FE2-L$FB2 ;# FDE address range
.byte 0x4 ;# DW_CFA_advance_loc4
.word L$CFI21-L$FB2
.byte 0x83 ;# DW_CFA_offset, column 0x3
.uleb128 0x0
.byte 0x11 ;# DW_CFA_offset_extended_sf
.uleb128 0x2
.sleb128 -5
.byte 0x4 ;# DW_CFA_advance_loc4
.word L$CFI22-L$CFI21
.byte 0xd ;# DW_CFA_def_cfa_register = r3
.uleb128 0x3
.align 4
L$EFDE2:
|
suryaveeryadav/Python-3.4.0
| 9,187
|
Modules/_ctypes/libffi/src/pa/linux.S
|
/* -----------------------------------------------------------------------
linux.S - (c) 2003-2004 Randolph Chung <tausq@debian.org>
(c) 2008 Red Hat, Inc.
HPPA Foreign Function Interface
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND, EXPRESS
OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL RENESAS TECHNOLOGY BE LIABLE FOR ANY CLAIM, DAMAGES OR
OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
OTHER DEALINGS IN THE SOFTWARE.
----------------------------------------------------------------------- */
#define LIBFFI_ASM
#include <fficonfig.h>
#include <ffi.h>
.text
.level 1.1
.align 4
/* void ffi_call_pa32(void (*)(char *, extended_cif *),
extended_cif *ecif,
unsigned bytes,
unsigned flags,
unsigned *rvalue,
void (*fn)(void));
*/
.export ffi_call_pa32,code
.import ffi_prep_args_pa32,code
.type ffi_call_pa32, @function
.LFB1:
ffi_call_pa32:
.proc
.callinfo FRAME=64,CALLS,SAVE_RP,SAVE_SP,ENTRY_GR=4
.entry
stw %rp, -20(%sp)
copy %r3, %r1
.LCFI11:
copy %sp, %r3
.LCFI12:
/* Setup the stack for calling prep_args...
We want the stack to look like this:
[ Previous stack ] <- %r3
[ 64-bytes register save area ] <- %r4
[ Stack space for actual call, passed as ] <- %arg0
[ arg0 to ffi_prep_args_pa32 ]
[ Stack for calling prep_args ] <- %sp
*/
stwm %r1, 64(%sp)
stw %r4, 12(%r3)
.LCFI13:
copy %sp, %r4
addl %arg2, %r4, %arg0 /* arg stack */
stw %arg3, -48(%r3) /* save flags; we need it later */
/* Call prep_args:
%arg0(stack) -- set up above
%arg1(ecif) -- same as incoming param
%arg2(bytes) -- same as incoming param */
bl ffi_prep_args_pa32,%r2
ldo 64(%arg0), %sp
ldo -64(%sp), %sp
/* now %sp should point where %arg0 was pointing. */
/* Load the arguments that should be passed in registers
The fp args were loaded by the prep_args function. */
ldw -36(%sp), %arg0
ldw -40(%sp), %arg1
ldw -44(%sp), %arg2
ldw -48(%sp), %arg3
/* in case the function is going to return a structure
we need to give it a place to put the result. */
ldw -52(%r3), %ret0 /* %ret0 <- rvalue */
ldw -56(%r3), %r22 /* %r22 <- function to call */
bl $$dyncall, %r31 /* Call the user function */
copy %r31, %rp
/* Prepare to store the result; we need to recover flags and rvalue. */
ldw -48(%r3), %r21 /* r21 <- flags */
ldw -52(%r3), %r20 /* r20 <- rvalue */
/* Store the result according to the return type. */
.Lcheckint:
comib,<>,n FFI_TYPE_INT, %r21, .Lcheckint8
b .Ldone
stw %ret0, 0(%r20)
.Lcheckint8:
comib,<>,n FFI_TYPE_UINT8, %r21, .Lcheckint16
b .Ldone
stb %ret0, 0(%r20)
.Lcheckint16:
comib,<>,n FFI_TYPE_UINT16, %r21, .Lcheckdbl
b .Ldone
sth %ret0, 0(%r20)
.Lcheckdbl:
comib,<>,n FFI_TYPE_DOUBLE, %r21, .Lcheckfloat
b .Ldone
fstd %fr4,0(%r20)
.Lcheckfloat:
comib,<>,n FFI_TYPE_FLOAT, %r21, .Lcheckll
b .Ldone
fstw %fr4L,0(%r20)
.Lcheckll:
comib,<>,n FFI_TYPE_UINT64, %r21, .Lchecksmst2
stw %ret0, 0(%r20)
b .Ldone
stw %ret1, 4(%r20)
.Lchecksmst2:
comib,<>,n FFI_TYPE_SMALL_STRUCT2, %r21, .Lchecksmst3
/* 2-byte structs are returned in ret0 as ????xxyy. */
extru %ret0, 23, 8, %r22
stbs,ma %r22, 1(%r20)
b .Ldone
stb %ret0, 0(%r20)
.Lchecksmst3:
comib,<>,n FFI_TYPE_SMALL_STRUCT3, %r21, .Lchecksmst4
/* 3-byte structs are returned in ret0 as ??xxyyzz. */
extru %ret0, 15, 8, %r22
stbs,ma %r22, 1(%r20)
extru %ret0, 23, 8, %r22
stbs,ma %r22, 1(%r20)
b .Ldone
stb %ret0, 0(%r20)
.Lchecksmst4:
comib,<>,n FFI_TYPE_SMALL_STRUCT4, %r21, .Lchecksmst5
/* 4-byte structs are returned in ret0 as wwxxyyzz. */
extru %ret0, 7, 8, %r22
stbs,ma %r22, 1(%r20)
extru %ret0, 15, 8, %r22
stbs,ma %r22, 1(%r20)
extru %ret0, 23, 8, %r22
stbs,ma %r22, 1(%r20)
b .Ldone
stb %ret0, 0(%r20)
.Lchecksmst5:
comib,<>,n FFI_TYPE_SMALL_STRUCT5, %r21, .Lchecksmst6
/* 5 byte values are returned right justified:
ret0 ret1
5: ??????aa bbccddee */
stbs,ma %ret0, 1(%r20)
extru %ret1, 7, 8, %r22
stbs,ma %r22, 1(%r20)
extru %ret1, 15, 8, %r22
stbs,ma %r22, 1(%r20)
extru %ret1, 23, 8, %r22
stbs,ma %r22, 1(%r20)
b .Ldone
stb %ret1, 0(%r20)
.Lchecksmst6:
comib,<>,n FFI_TYPE_SMALL_STRUCT6, %r21, .Lchecksmst7
/* 6 byte values are returned right justified:
ret0 ret1
6: ????aabb ccddeeff */
extru %ret0, 23, 8, %r22
stbs,ma %r22, 1(%r20)
stbs,ma %ret0, 1(%r20)
extru %ret1, 7, 8, %r22
stbs,ma %r22, 1(%r20)
extru %ret1, 15, 8, %r22
stbs,ma %r22, 1(%r20)
extru %ret1, 23, 8, %r22
stbs,ma %r22, 1(%r20)
b .Ldone
stb %ret1, 0(%r20)
.Lchecksmst7:
comib,<>,n FFI_TYPE_SMALL_STRUCT7, %r21, .Lchecksmst8
/* 7 byte values are returned right justified:
ret0 ret1
7: ??aabbcc ddeeffgg */
extru %ret0, 15, 8, %r22
stbs,ma %r22, 1(%r20)
extru %ret0, 23, 8, %r22
stbs,ma %r22, 1(%r20)
stbs,ma %ret0, 1(%r20)
extru %ret1, 7, 8, %r22
stbs,ma %r22, 1(%r20)
extru %ret1, 15, 8, %r22
stbs,ma %r22, 1(%r20)
extru %ret1, 23, 8, %r22
stbs,ma %r22, 1(%r20)
b .Ldone
stb %ret1, 0(%r20)
.Lchecksmst8:
comib,<>,n FFI_TYPE_SMALL_STRUCT8, %r21, .Ldone
/* 8 byte values are returned right justified:
ret0 ret1
8: aabbccdd eeffgghh */
extru %ret0, 7, 8, %r22
stbs,ma %r22, 1(%r20)
extru %ret0, 15, 8, %r22
stbs,ma %r22, 1(%r20)
extru %ret0, 23, 8, %r22
stbs,ma %r22, 1(%r20)
stbs,ma %ret0, 1(%r20)
extru %ret1, 7, 8, %r22
stbs,ma %r22, 1(%r20)
extru %ret1, 15, 8, %r22
stbs,ma %r22, 1(%r20)
extru %ret1, 23, 8, %r22
stbs,ma %r22, 1(%r20)
stb %ret1, 0(%r20)
.Ldone:
/* all done, return */
copy %r4, %sp /* pop arg stack */
ldw 12(%r3), %r4
ldwm -64(%sp), %r3 /* .. and pop stack */
ldw -20(%sp), %rp
bv %r0(%rp)
nop
.exit
.procend
.LFE1:
/* void ffi_closure_pa32(void);
Called with closure argument in %r21 */
.export ffi_closure_pa32,code
.import ffi_closure_inner_pa32,code
.type ffi_closure_pa32, @function
.LFB2:
ffi_closure_pa32:
.proc
.callinfo FRAME=64,CALLS,SAVE_RP,SAVE_SP,ENTRY_GR=3
.entry
stw %rp, -20(%sp)
.LCFI20:
copy %r3, %r1
.LCFI21:
copy %sp, %r3
.LCFI22:
stwm %r1, 64(%sp)
/* Put arguments onto the stack and call ffi_closure_inner. */
stw %arg0, -36(%r3)
stw %arg1, -40(%r3)
stw %arg2, -44(%r3)
stw %arg3, -48(%r3)
copy %r21, %arg0
bl ffi_closure_inner_pa32, %r2
copy %r3, %arg1
ldwm -64(%sp), %r3
ldw -20(%sp), %rp
ldw -36(%sp), %ret0
bv %r0(%r2)
ldw -40(%sp), %ret1
.exit
.procend
.LFE2:
.section ".eh_frame",EH_FRAME_FLAGS,@progbits
.Lframe1:
.word .LECIE1-.LSCIE1 ;# Length of Common Information Entry
.LSCIE1:
.word 0x0 ;# CIE Identifier Tag
.byte 0x1 ;# CIE Version
.ascii "\0" ;# CIE Augmentation
.uleb128 0x1 ;# CIE Code Alignment Factor
.sleb128 4 ;# CIE Data Alignment Factor
.byte 0x2 ;# CIE RA Column
.byte 0xc ;# DW_CFA_def_cfa
.uleb128 0x1e
.uleb128 0x0
.align 4
.LECIE1:
.LSFDE1:
.word .LEFDE1-.LASFDE1 ;# FDE Length
.LASFDE1:
.word .LASFDE1-.Lframe1 ;# FDE CIE offset
.word .LFB1 ;# FDE initial location
.word .LFE1-.LFB1 ;# FDE address range
.byte 0x4 ;# DW_CFA_advance_loc4
.word .LCFI11-.LFB1
.byte 0x83 ;# DW_CFA_offset, column 0x3
.uleb128 0x0
.byte 0x11 ;# DW_CFA_offset_extended_sf; save r2 at [r30-20]
.uleb128 0x2
.sleb128 -5
.byte 0x4 ;# DW_CFA_advance_loc4
.word .LCFI12-.LCFI11
.byte 0xd ;# DW_CFA_def_cfa_register = r3
.uleb128 0x3
.byte 0x4 ;# DW_CFA_advance_loc4
.word .LCFI13-.LCFI12
.byte 0x84 ;# DW_CFA_offset, column 0x4
.uleb128 0x3
.align 4
.LEFDE1:
.LSFDE2:
.word .LEFDE2-.LASFDE2 ;# FDE Length
.LASFDE2:
.word .LASFDE2-.Lframe1 ;# FDE CIE offset
.word .LFB2 ;# FDE initial location
.word .LFE2-.LFB2 ;# FDE address range
.byte 0x4 ;# DW_CFA_advance_loc4
.word .LCFI21-.LFB2
.byte 0x83 ;# DW_CFA_offset, column 0x3
.uleb128 0x0
.byte 0x11 ;# DW_CFA_offset_extended_sf
.uleb128 0x2
.sleb128 -5
.byte 0x4 ;# DW_CFA_advance_loc4
.word .LCFI22-.LCFI21
.byte 0xd ;# DW_CFA_def_cfa_register = r3
.uleb128 0x3
.align 4
.LEFDE2:
|
suryaveeryadav/Python-3.4.0
| 11,939
|
Modules/_ctypes/libffi/src/tile/tile.S
|
/* -----------------------------------------------------------------------
tile.S - Copyright (c) 2011 Tilera Corp.
Tilera TILEPro and TILE-Gx Foreign Function Interface
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
DEALINGS IN THE SOFTWARE.
----------------------------------------------------------------------- */
#define LIBFFI_ASM
#include <fficonfig.h>
#include <ffi.h>
/* Number of bytes in a register. */
#define REG_SIZE FFI_SIZEOF_ARG
/* Number of bytes in stack linkage area for backtracing.
A note about the ABI: on entry to a procedure, sp points to a stack
slot where it must spill the return address if it's not a leaf.
REG_SIZE bytes beyond that is a slot owned by the caller which
contains the sp value that the caller had when it was originally
entered (i.e. the caller's frame pointer). */
#define LINKAGE_SIZE (2 * REG_SIZE)
/* The first 10 registers are used to pass arguments and return values. */
#define NUM_ARG_REGS 10
#ifdef __tilegx__
#define SW st
#define LW ld
#define BGZT bgtzt
#else
#define SW sw
#define LW lw
#define BGZT bgzt
#endif
/* void ffi_call_tile (int_reg_t reg_args[NUM_ARG_REGS],
const int_reg_t *stack_args,
unsigned long stack_args_bytes,
void (*fnaddr)(void));
On entry, REG_ARGS contain the outgoing register values,
and STACK_ARGS containts STACK_ARG_BYTES of additional values
to be passed on the stack. If STACK_ARG_BYTES is zero, then
STACK_ARGS is ignored.
When the invoked function returns, the values of r0-r9 are
blindly stored back into REG_ARGS for the caller to examine. */
.section .text.ffi_call_tile, "ax", @progbits
.align 8
.globl ffi_call_tile
FFI_HIDDEN(ffi_call_tile)
ffi_call_tile:
/* Incoming arguments. */
#define REG_ARGS r0
#define INCOMING_STACK_ARGS r1
#define STACK_ARG_BYTES r2
#define ORIG_FNADDR r3
/* Temporary values. */
#define FRAME_SIZE r10
#define TMP r11
#define TMP2 r12
#define OUTGOING_STACK_ARGS r13
#define REG_ADDR_PTR r14
#define RETURN_REG_ADDR r15
#define FNADDR r16
.cfi_startproc
{
/* Save return address. */
SW sp, lr
.cfi_offset lr, 0
/* Prepare to spill incoming r52. */
addi TMP, sp, -REG_SIZE
/* Increase frame size to have room to spill r52 and REG_ARGS.
The +7 is to round up mod 8. */
addi FRAME_SIZE, STACK_ARG_BYTES, \
REG_SIZE + REG_SIZE + LINKAGE_SIZE + 7
}
{
/* Round stack frame size to a multiple of 8 to satisfy ABI. */
andi FRAME_SIZE, FRAME_SIZE, -8
/* Compute where to spill REG_ARGS value. */
addi TMP2, sp, -(REG_SIZE * 2)
}
{
/* Spill incoming r52. */
SW TMP, r52
.cfi_offset r52, -REG_SIZE
/* Set up our frame pointer. */
move r52, sp
.cfi_def_cfa_register r52
/* Push stack frame. */
sub sp, sp, FRAME_SIZE
}
{
/* Prepare to set up stack linkage. */
addi TMP, sp, REG_SIZE
/* Prepare to memcpy stack args. */
addi OUTGOING_STACK_ARGS, sp, LINKAGE_SIZE
/* Save REG_ARGS which we will need after we call the subroutine. */
SW TMP2, REG_ARGS
}
{
/* Set up linkage info to hold incoming stack pointer. */
SW TMP, r52
}
{
/* Skip stack args memcpy if we don't have any stack args (common). */
blezt STACK_ARG_BYTES, .Ldone_stack_args_memcpy
}
.Lmemcpy_stack_args:
{
/* Load incoming argument from stack_args. */
LW TMP, INCOMING_STACK_ARGS
addi INCOMING_STACK_ARGS, INCOMING_STACK_ARGS, REG_SIZE
}
{
/* Store stack argument into outgoing stack argument area. */
SW OUTGOING_STACK_ARGS, TMP
addi OUTGOING_STACK_ARGS, OUTGOING_STACK_ARGS, REG_SIZE
addi STACK_ARG_BYTES, STACK_ARG_BYTES, -REG_SIZE
}
{
BGZT STACK_ARG_BYTES, .Lmemcpy_stack_args
}
.Ldone_stack_args_memcpy:
{
/* Copy aside ORIG_FNADDR so we can overwrite its register. */
move FNADDR, ORIG_FNADDR
/* Prepare to load argument registers. */
addi REG_ADDR_PTR, r0, REG_SIZE
/* Load outgoing r0. */
LW r0, r0
}
/* Load up argument registers from the REG_ARGS array. */
#define LOAD_REG(REG, PTR) \
{ \
LW REG, PTR ; \
addi PTR, PTR, REG_SIZE \
}
LOAD_REG(r1, REG_ADDR_PTR)
LOAD_REG(r2, REG_ADDR_PTR)
LOAD_REG(r3, REG_ADDR_PTR)
LOAD_REG(r4, REG_ADDR_PTR)
LOAD_REG(r5, REG_ADDR_PTR)
LOAD_REG(r6, REG_ADDR_PTR)
LOAD_REG(r7, REG_ADDR_PTR)
LOAD_REG(r8, REG_ADDR_PTR)
LOAD_REG(r9, REG_ADDR_PTR)
{
/* Call the subroutine. */
jalr FNADDR
}
{
/* Restore original lr. */
LW lr, r52
/* Prepare to recover ARGS, which we spilled earlier. */
addi TMP, r52, -(2 * REG_SIZE)
}
{
/* Restore ARGS, so we can fill it in with the return regs r0-r9. */
LW RETURN_REG_ADDR, TMP
/* Prepare to restore original r52. */
addi TMP, r52, -REG_SIZE
}
{
/* Pop stack frame. */
move sp, r52
/* Restore original r52. */
LW r52, TMP
}
#define STORE_REG(REG, PTR) \
{ \
SW PTR, REG ; \
addi PTR, PTR, REG_SIZE \
}
/* Return all register values by reference. */
STORE_REG(r0, RETURN_REG_ADDR)
STORE_REG(r1, RETURN_REG_ADDR)
STORE_REG(r2, RETURN_REG_ADDR)
STORE_REG(r3, RETURN_REG_ADDR)
STORE_REG(r4, RETURN_REG_ADDR)
STORE_REG(r5, RETURN_REG_ADDR)
STORE_REG(r6, RETURN_REG_ADDR)
STORE_REG(r7, RETURN_REG_ADDR)
STORE_REG(r8, RETURN_REG_ADDR)
STORE_REG(r9, RETURN_REG_ADDR)
{
jrp lr
}
.cfi_endproc
.size ffi_call_tile, .-ffi_call_tile
/* ffi_closure_tile(...)
On entry, lr points to the closure plus 8 bytes, and r10
contains the actual return address.
This function simply dumps all register parameters into a stack array
and passes the closure, the registers array, and the stack arguments
to C code that does all of the actual closure processing. */
.section .text.ffi_closure_tile, "ax", @progbits
.align 8
.globl ffi_closure_tile
FFI_HIDDEN(ffi_closure_tile)
.cfi_startproc
/* Room to spill all NUM_ARG_REGS incoming registers, plus frame linkage. */
#define CLOSURE_FRAME_SIZE (((NUM_ARG_REGS * REG_SIZE * 2 + LINKAGE_SIZE) + 7) & -8)
ffi_closure_tile:
{
#ifdef __tilegx__
st sp, lr
.cfi_offset lr, 0
#else
/* Save return address (in r10 due to closure stub wrapper). */
SW sp, r10
.cfi_return_column r10
.cfi_offset r10, 0
#endif
/* Compute address for stack frame linkage. */
addli r10, sp, -(CLOSURE_FRAME_SIZE - REG_SIZE)
}
{
/* Save incoming stack pointer in linkage area. */
SW r10, sp
.cfi_offset sp, -(CLOSURE_FRAME_SIZE - REG_SIZE)
/* Push a new stack frame. */
addli sp, sp, -CLOSURE_FRAME_SIZE
.cfi_adjust_cfa_offset CLOSURE_FRAME_SIZE
}
{
/* Create pointer to where to start spilling registers. */
addi r10, sp, LINKAGE_SIZE
}
/* Spill all the incoming registers. */
STORE_REG(r0, r10)
STORE_REG(r1, r10)
STORE_REG(r2, r10)
STORE_REG(r3, r10)
STORE_REG(r4, r10)
STORE_REG(r5, r10)
STORE_REG(r6, r10)
STORE_REG(r7, r10)
STORE_REG(r8, r10)
{
/* Save r9. */
SW r10, r9
#ifdef __tilegx__
/* Pointer to closure is passed in r11. */
move r0, r11
#else
/* Compute pointer to the closure object. Because the closure
starts with a "jal ffi_closure_tile", we can just take the
value of lr (a phony return address pointing into the closure)
and subtract 8. */
addi r0, lr, -8
#endif
/* Compute a pointer to the register arguments we just spilled. */
addi r1, sp, LINKAGE_SIZE
}
{
/* Compute a pointer to the extra stack arguments (if any). */
addli r2, sp, CLOSURE_FRAME_SIZE + LINKAGE_SIZE
/* Call C code to deal with all of the grotty details. */
jal ffi_closure_tile_inner
}
{
addli r10, sp, CLOSURE_FRAME_SIZE
}
{
/* Restore the return address. */
LW lr, r10
/* Compute pointer to registers array. */
addli r10, sp, LINKAGE_SIZE + (NUM_ARG_REGS * REG_SIZE)
}
/* Return all the register values, which C code may have set. */
LOAD_REG(r0, r10)
LOAD_REG(r1, r10)
LOAD_REG(r2, r10)
LOAD_REG(r3, r10)
LOAD_REG(r4, r10)
LOAD_REG(r5, r10)
LOAD_REG(r6, r10)
LOAD_REG(r7, r10)
LOAD_REG(r8, r10)
LOAD_REG(r9, r10)
{
/* Pop the frame. */
addli sp, sp, CLOSURE_FRAME_SIZE
jrp lr
}
.cfi_endproc
.size ffi_closure_tile, . - ffi_closure_tile
/* What follows are code template instructions that get copied to the
closure trampoline by ffi_prep_closure_loc. The zeroed operands
get replaced by their proper values at runtime. */
.section .text.ffi_template_tramp_tile, "ax", @progbits
.align 8
.globl ffi_template_tramp_tile
FFI_HIDDEN(ffi_template_tramp_tile)
ffi_template_tramp_tile:
#ifdef __tilegx__
{
moveli r11, 0 /* backpatched to address of containing closure. */
moveli r10, 0 /* backpatched to ffi_closure_tile. */
}
/* Note: the following bundle gets generated multiple times
depending on the pointer value (esp. useful for -m32 mode). */
{ shl16insli r11, r11, 0 ; shl16insli r10, r10, 0 }
{ info 2+8 /* for backtracer: -> pc in lr, frame size 0 */ ; jr r10 }
#else
/* 'jal .' yields a PC-relative offset of zero so we can OR in the
right offset at runtime. */
{ move r10, lr ; jal . /* ffi_closure_tile */ }
#endif
.size ffi_template_tramp_tile, . - ffi_template_tramp_tile
|
suryaveeryadav/Python-3.4.0
| 7,026
|
Modules/_ctypes/libffi/src/m68k/sysv.S
|
/* -----------------------------------------------------------------------
sysv.S - Copyright (c) 2012 Alan Hourihane
Copyright (c) 1998, 2012 Andreas Schwab
Copyright (c) 2008 Red Hat, Inc.
Copyright (c) 2012 Thorsten Glaser
m68k Foreign Function Interface
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
DEALINGS IN THE SOFTWARE.
----------------------------------------------------------------------- */
#define LIBFFI_ASM
#include <fficonfig.h>
#include <ffi.h>
#ifdef HAVE_AS_CFI_PSEUDO_OP
#define CFI_STARTPROC() .cfi_startproc
#define CFI_OFFSET(reg,off) .cfi_offset reg,off
#define CFI_DEF_CFA(reg,off) .cfi_def_cfa reg,off
#define CFI_ENDPROC() .cfi_endproc
#else
#define CFI_STARTPROC()
#define CFI_OFFSET(reg,off)
#define CFI_DEF_CFA(reg,off)
#define CFI_ENDPROC()
#endif
#ifdef __MINT__
#define CALLFUNC(funcname) _ ## funcname
#else
#define CALLFUNC(funcname) funcname
#endif
.text
.globl CALLFUNC(ffi_call_SYSV)
.type CALLFUNC(ffi_call_SYSV),@function
.align 4
CALLFUNC(ffi_call_SYSV):
CFI_STARTPROC()
link %fp,#0
CFI_OFFSET(14,-8)
CFI_DEF_CFA(14,8)
move.l %d2,-(%sp)
CFI_OFFSET(2,-12)
| Make room for all of the new args.
sub.l 12(%fp),%sp
| Call ffi_prep_args
move.l 8(%fp),-(%sp)
pea 4(%sp)
#if !defined __PIC__
jsr CALLFUNC(ffi_prep_args)
#else
bsr.l CALLFUNC(ffi_prep_args@PLTPC)
#endif
addq.l #8,%sp
| Pass pointer to struct value, if any
#ifdef __MINT__
move.l %d0,%a1
#else
move.l %a0,%a1
#endif
| Call the function
move.l 24(%fp),%a0
jsr (%a0)
| Remove the space we pushed for the args
add.l 12(%fp),%sp
| Load the pointer to storage for the return value
move.l 20(%fp),%a1
| Load the return type code
move.l 16(%fp),%d2
| If the return value pointer is NULL, assume no return value.
| NOTE: On the mc68000, tst on an address register is not supported.
#if !defined(__mc68020__) && !defined(__mc68030__) && !defined(__mc68040__) && !defined(__mc68060__) && !defined(__mcoldfire__)
cmp.w #0, %a1
#else
tst.l %a1
#endif
jbeq noretval
btst #0,%d2
jbeq retlongint
move.l %d0,(%a1)
jbra epilogue
retlongint:
btst #1,%d2
jbeq retfloat
move.l %d0,(%a1)
move.l %d1,4(%a1)
jbra epilogue
retfloat:
btst #2,%d2
jbeq retdouble
#if defined(__MC68881__) || defined(__HAVE_68881__)
fmove.s %fp0,(%a1)
#else
move.l %d0,(%a1)
#endif
jbra epilogue
retdouble:
btst #3,%d2
jbeq retlongdouble
#if defined(__MC68881__) || defined(__HAVE_68881__)
fmove.d %fp0,(%a1)
#else
move.l %d0,(%a1)+
move.l %d1,(%a1)
#endif
jbra epilogue
retlongdouble:
btst #4,%d2
jbeq retpointer
#if defined(__MC68881__) || defined(__HAVE_68881__)
fmove.x %fp0,(%a1)
#else
move.l %d0,(%a1)+
move.l %d1,(%a1)+
move.l %d2,(%a1)
#endif
jbra epilogue
retpointer:
btst #5,%d2
jbeq retstruct1
#ifdef __MINT__
move.l %d0,(%a1)
#else
move.l %a0,(%a1)
#endif
jbra epilogue
retstruct1:
btst #6,%d2
jbeq retstruct2
move.b %d0,(%a1)
jbra epilogue
retstruct2:
btst #7,%d2
jbeq retsint8
move.w %d0,(%a1)
jbra epilogue
retsint8:
btst #8,%d2
jbeq retsint16
| NOTE: On the mc68000, extb is not supported. 8->16, then 16->32.
#if !defined(__mc68020__) && !defined(__mc68030__) && !defined(__mc68040__) && !defined(__mc68060__) && !defined(__mcoldfire__)
ext.w %d0
ext.l %d0
#else
extb.l %d0
#endif
move.l %d0,(%a1)
jbra epilogue
retsint16:
btst #9,%d2
jbeq noretval
ext.l %d0
move.l %d0,(%a1)
noretval:
epilogue:
move.l (%sp)+,%d2
unlk %fp
rts
CFI_ENDPROC()
.size CALLFUNC(ffi_call_SYSV),.-CALLFUNC(ffi_call_SYSV)
.globl CALLFUNC(ffi_closure_SYSV)
.type CALLFUNC(ffi_closure_SYSV), @function
.align 4
CALLFUNC(ffi_closure_SYSV):
CFI_STARTPROC()
link %fp,#-12
CFI_OFFSET(14,-8)
CFI_DEF_CFA(14,8)
move.l %sp,-12(%fp)
pea 8(%fp)
pea -12(%fp)
move.l %a0,-(%sp)
#if !defined __PIC__
jsr CALLFUNC(ffi_closure_SYSV_inner)
#else
bsr.l CALLFUNC(ffi_closure_SYSV_inner@PLTPC)
#endif
lsr.l #1,%d0
jne 1f
jcc .Lcls_epilogue
| CIF_FLAGS_INT
move.l -12(%fp),%d0
.Lcls_epilogue:
| no CIF_FLAGS_*
unlk %fp
rts
1:
lea -12(%fp),%a0
lsr.l #2,%d0
jne 1f
jcs .Lcls_ret_float
| CIF_FLAGS_DINT
move.l (%a0)+,%d0
move.l (%a0),%d1
jra .Lcls_epilogue
.Lcls_ret_float:
#if defined(__MC68881__) || defined(__HAVE_68881__)
fmove.s (%a0),%fp0
#else
move.l (%a0),%d0
#endif
jra .Lcls_epilogue
1:
lsr.l #2,%d0
jne 1f
jcs .Lcls_ret_ldouble
| CIF_FLAGS_DOUBLE
#if defined(__MC68881__) || defined(__HAVE_68881__)
fmove.d (%a0),%fp0
#else
move.l (%a0)+,%d0
move.l (%a0),%d1
#endif
jra .Lcls_epilogue
.Lcls_ret_ldouble:
#if defined(__MC68881__) || defined(__HAVE_68881__)
fmove.x (%a0),%fp0
#else
move.l (%a0)+,%d0
move.l (%a0)+,%d1
move.l (%a0),%d2
#endif
jra .Lcls_epilogue
1:
lsr.l #2,%d0
jne 1f
jcs .Lcls_ret_struct1
| CIF_FLAGS_POINTER
move.l (%a0),%a0
move.l %a0,%d0
jra .Lcls_epilogue
.Lcls_ret_struct1:
move.b (%a0),%d0
jra .Lcls_epilogue
1:
lsr.l #2,%d0
jne 1f
jcs .Lcls_ret_sint8
| CIF_FLAGS_STRUCT2
move.w (%a0),%d0
jra .Lcls_epilogue
.Lcls_ret_sint8:
move.l (%a0),%d0
| NOTE: On the mc68000, extb is not supported. 8->16, then 16->32.
#if !defined(__mc68020__) && !defined(__mc68030__) && !defined(__mc68040__) && !defined(__mc68060__) && !defined(__mcoldfire__)
ext.w %d0
ext.l %d0
#else
extb.l %d0
#endif
jra .Lcls_epilogue
1:
| CIF_FLAGS_SINT16
move.l (%a0),%d0
ext.l %d0
jra .Lcls_epilogue
CFI_ENDPROC()
.size CALLFUNC(ffi_closure_SYSV),.-CALLFUNC(ffi_closure_SYSV)
.globl CALLFUNC(ffi_closure_struct_SYSV)
.type CALLFUNC(ffi_closure_struct_SYSV), @function
.align 4
CALLFUNC(ffi_closure_struct_SYSV):
CFI_STARTPROC()
link %fp,#0
CFI_OFFSET(14,-8)
CFI_DEF_CFA(14,8)
move.l %sp,-12(%fp)
pea 8(%fp)
move.l %a1,-(%sp)
move.l %a0,-(%sp)
#if !defined __PIC__
jsr CALLFUNC(ffi_closure_SYSV_inner)
#else
bsr.l CALLFUNC(ffi_closure_SYSV_inner@PLTPC)
#endif
unlk %fp
rts
CFI_ENDPROC()
.size CALLFUNC(ffi_closure_struct_SYSV),.-CALLFUNC(ffi_closure_struct_SYSV)
#if defined __ELF__ && defined __linux__
.section .note.GNU-stack,"",@progbits
#endif
|
suryaveeryadav/Python-3.4.0
| 8,770
|
Modules/_ctypes/libffi/src/microblaze/sysv.S
|
/* -----------------------------------------------------------------------
sysv.S - Copyright (c) 2012, 2013 Xilinx, Inc
MicroBlaze Foreign Function Interface
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
DEALINGS IN THE SOFTWARE.
----------------------------------------------------------------------- */
#define LIBFFI_ASM
#include <fficonfig.h>
#include <ffi.h>
/*
* arg[0] (r5) = ffi_prep_args,
* arg[1] (r6) = &ecif,
* arg[2] (r7) = cif->bytes,
* arg[3] (r8) = cif->flags,
* arg[4] (r9) = ecif.rvalue,
* arg[5] (r10) = fn
* arg[6] (sp[0]) = cif->rtype->type
* arg[7] (sp[4]) = cif->rtype->size
*/
.text
.globl ffi_call_SYSV
.type ffi_call_SYSV, @function
ffi_call_SYSV:
/* push callee saves */
addik r1, r1, -20
swi r19, r1, 0 /* Frame Pointer */
swi r20, r1, 4 /* PIC register */
swi r21, r1, 8 /* PIC register */
swi r22, r1, 12 /* save for locals */
swi r23, r1, 16 /* save for locals */
/* save the r5-r10 registers in the stack */
addik r1, r1, -24 /* increment sp to store 6x 32-bit words */
swi r5, r1, 0
swi r6, r1, 4
swi r7, r1, 8
swi r8, r1, 12
swi r9, r1, 16
swi r10, r1, 20
/* save function pointer */
addik r3, r5, 0 /* copy ffi_prep_args into r3 */
addik r22, r1, 0 /* save sp for unallocated args into r22 (callee-saved) */
addik r23, r10, 0 /* save function address into r23 (callee-saved) */
/* prepare stack with allocation for n (bytes = r7) args */
rsub r1, r7, r1 /* subtract bytes from sp */
/* prep args for ffi_prep_args call */
addik r5, r1, 0 /* store stack pointer into arg[0] */
/* r6 still holds ecif for arg[1] */
/* Call ffi_prep_args(stack, &ecif). */
addik r1, r1, -4
swi r15, r1, 0 /* store the link register in the frame */
brald r15, r3
nop /* branch has delay slot */
lwi r15, r1, 0
addik r1, r1, 4 /* restore the link register from the frame */
/* returns calling stack pointer location */
/* prepare args for fn call, prep_args populates them onto the stack */
lwi r5, r1, 0 /* arg[0] */
lwi r6, r1, 4 /* arg[1] */
lwi r7, r1, 8 /* arg[2] */
lwi r8, r1, 12 /* arg[3] */
lwi r9, r1, 16 /* arg[4] */
lwi r10, r1, 20 /* arg[5] */
/* call (fn) (...). */
addik r1, r1, -4
swi r15, r1, 0 /* store the link register in the frame */
brald r15, r23
nop /* branch has delay slot */
lwi r15, r1, 0
addik r1, r1, 4 /* restore the link register from the frame */
/* Remove the space we pushed for the args. */
addik r1, r22, 0 /* restore old SP */
/* restore this functions parameters */
lwi r5, r1, 0 /* arg[0] */
lwi r6, r1, 4 /* arg[1] */
lwi r7, r1, 8 /* arg[2] */
lwi r8, r1, 12 /* arg[3] */
lwi r9, r1, 16 /* arg[4] */
lwi r10, r1, 20 /* arg[5] */
addik r1, r1, 24 /* decrement sp to de-allocate 6x 32-bit words */
/* If the return value pointer is NULL, assume no return value. */
beqi r9, ffi_call_SYSV_end
lwi r22, r1, 48 /* get return type (20 for locals + 28 for arg[6]) */
lwi r23, r1, 52 /* get return size (20 for locals + 32 for arg[7]) */
/* Check if return type is actually a struct, do nothing */
rsubi r11, r22, FFI_TYPE_STRUCT
beqi r11, ffi_call_SYSV_end
/* Return 8bit */
rsubi r11, r23, 1
beqi r11, ffi_call_SYSV_store8
/* Return 16bit */
rsubi r11, r23, 2
beqi r11, ffi_call_SYSV_store16
/* Return 32bit */
rsubi r11, r23, 4
beqi r11, ffi_call_SYSV_store32
/* Return 64bit */
rsubi r11, r23, 8
beqi r11, ffi_call_SYSV_store64
/* Didnt match anything */
bri ffi_call_SYSV_end
ffi_call_SYSV_store64:
swi r3, r9, 0 /* store word r3 into return value */
swi r4, r9, 4 /* store word r4 into return value */
bri ffi_call_SYSV_end
ffi_call_SYSV_store32:
swi r3, r9, 0 /* store word r3 into return value */
bri ffi_call_SYSV_end
ffi_call_SYSV_store16:
#ifdef __BIG_ENDIAN__
shi r3, r9, 2 /* store half-word r3 into return value */
#else
shi r3, r9, 0 /* store half-word r3 into return value */
#endif
bri ffi_call_SYSV_end
ffi_call_SYSV_store8:
#ifdef __BIG_ENDIAN__
sbi r3, r9, 3 /* store byte r3 into return value */
#else
sbi r3, r9, 0 /* store byte r3 into return value */
#endif
bri ffi_call_SYSV_end
ffi_call_SYSV_end:
/* callee restores */
lwi r19, r1, 0 /* frame pointer */
lwi r20, r1, 4 /* PIC register */
lwi r21, r1, 8 /* PIC register */
lwi r22, r1, 12
lwi r23, r1, 16
addik r1, r1, 20
/* return from sub-routine (with delay slot) */
rtsd r15, 8
nop
.size ffi_call_SYSV, . - ffi_call_SYSV
/* ------------------------------------------------------------------------- */
/*
* args passed into this function, are passed down to the callee.
* this function is the target of the closure trampoline, as such r12 is
* a pointer to the closure object.
*/
.text
.globl ffi_closure_SYSV
.type ffi_closure_SYSV, @function
ffi_closure_SYSV:
/* push callee saves */
addik r11, r1, 28 /* save stack args start location (excluding regs/link) */
addik r1, r1, -12
swi r19, r1, 0 /* Frame Pointer */
swi r20, r1, 4 /* PIC register */
swi r21, r1, 8 /* PIC register */
/* store register args on stack */
addik r1, r1, -24
swi r5, r1, 0
swi r6, r1, 4
swi r7, r1, 8
swi r8, r1, 12
swi r9, r1, 16
swi r10, r1, 20
/* setup args */
addik r5, r1, 0 /* register_args */
addik r6, r11, 0 /* stack_args */
addik r7, r12, 0 /* closure object */
addik r1, r1, -8 /* allocate return value */
addik r8, r1, 0 /* void* rvalue */
addik r1, r1, -8 /* allocate for reutrn type/size values */
addik r9, r1, 0 /* void* rtype */
addik r10, r1, 4 /* void* rsize */
/* call the wrap_call function */
addik r1, r1, -28 /* allocate args + link reg */
swi r15, r1, 0 /* store the link register in the frame */
brald r15, r3
nop /* branch has delay slot */
lwi r15, r1, 0
addik r1, r1, 28 /* restore the link register from the frame */
ffi_closure_SYSV_prepare_return:
lwi r9, r1, 0 /* rtype */
lwi r10, r1, 4 /* rsize */
addik r1, r1, 8 /* de-allocate return info values */
/* Check if return type is actually a struct, store 4 bytes */
rsubi r11, r9, FFI_TYPE_STRUCT
beqi r11, ffi_closure_SYSV_store32
/* Return 8bit */
rsubi r11, r10, 1
beqi r11, ffi_closure_SYSV_store8
/* Return 16bit */
rsubi r11, r10, 2
beqi r11, ffi_closure_SYSV_store16
/* Return 32bit */
rsubi r11, r10, 4
beqi r11, ffi_closure_SYSV_store32
/* Return 64bit */
rsubi r11, r10, 8
beqi r11, ffi_closure_SYSV_store64
/* Didnt match anything */
bri ffi_closure_SYSV_end
ffi_closure_SYSV_store64:
lwi r3, r1, 0 /* store word r3 into return value */
lwi r4, r1, 4 /* store word r4 into return value */
/* 64 bits == 2 words, no sign extend occurs */
bri ffi_closure_SYSV_end
ffi_closure_SYSV_store32:
lwi r3, r1, 0 /* store word r3 into return value */
/* 32 bits == 1 word, no sign extend occurs */
bri ffi_closure_SYSV_end
ffi_closure_SYSV_store16:
#ifdef __BIG_ENDIAN__
lhui r3, r1, 2 /* store half-word r3 into return value */
#else
lhui r3, r1, 0 /* store half-word r3 into return value */
#endif
rsubi r11, r9, FFI_TYPE_SINT16
bnei r11, ffi_closure_SYSV_end
sext16 r3, r3 /* fix sign extend of sint8 */
bri ffi_closure_SYSV_end
ffi_closure_SYSV_store8:
#ifdef __BIG_ENDIAN__
lbui r3, r1, 3 /* store byte r3 into return value */
#else
lbui r3, r1, 0 /* store byte r3 into return value */
#endif
rsubi r11, r9, FFI_TYPE_SINT8
bnei r11, ffi_closure_SYSV_end
sext8 r3, r3 /* fix sign extend of sint8 */
bri ffi_closure_SYSV_end
ffi_closure_SYSV_end:
addik r1, r1, 8 /* de-allocate return value */
/* de-allocate stored args */
addik r1, r1, 24
/* callee restores */
lwi r19, r1, 0 /* frame pointer */
lwi r20, r1, 4 /* PIC register */
lwi r21, r1, 8 /* PIC register */
addik r1, r1, 12
/* return from sub-routine (with delay slot) */
rtsd r15, 8
nop
.size ffi_closure_SYSV, . - ffi_closure_SYSV
|
suryaveeryadav/Python-3.4.0
| 7,414
|
Modules/_ctypes/libffi/src/sparc/v9.S
|
/* -----------------------------------------------------------------------
v9.S - Copyright (c) 2000, 2003, 2004, 2008 Red Hat, Inc.
SPARC 64-bit Foreign Function Interface
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
DEALINGS IN THE SOFTWARE.
----------------------------------------------------------------------- */
#define LIBFFI_ASM
#include <fficonfig.h>
#include <ffi.h>
#ifdef SPARC64
/* Only compile this in for 64bit builds, because otherwise the object file
will have inproper architecture due to used instructions. */
#define STACKFRAME 176 /* Minimum stack framesize for SPARC 64-bit */
#define STACK_BIAS 2047
#define ARGS (128) /* Offset of register area in frame */
.text
.align 8
.globl ffi_call_v9
.globl _ffi_call_v9
ffi_call_v9:
_ffi_call_v9:
.LLFB1:
save %sp, -STACKFRAME, %sp
.LLCFI0:
sub %sp, %i2, %sp ! alloca() space in stack for frame to set up
add %sp, STACKFRAME+STACK_BIAS, %l0 ! %l0 has start of
! frame to set up
mov %l0, %o0 ! call routine to set up frame
call %i0
mov %i1, %o1 ! (delay)
brz,pt %o0, 1f
ldx [%l0+ARGS], %o0 ! call foreign function
ldd [%l0+ARGS], %f0
ldd [%l0+ARGS+8], %f2
ldd [%l0+ARGS+16], %f4
ldd [%l0+ARGS+24], %f6
ldd [%l0+ARGS+32], %f8
ldd [%l0+ARGS+40], %f10
ldd [%l0+ARGS+48], %f12
ldd [%l0+ARGS+56], %f14
ldd [%l0+ARGS+64], %f16
ldd [%l0+ARGS+72], %f18
ldd [%l0+ARGS+80], %f20
ldd [%l0+ARGS+88], %f22
ldd [%l0+ARGS+96], %f24
ldd [%l0+ARGS+104], %f26
ldd [%l0+ARGS+112], %f28
ldd [%l0+ARGS+120], %f30
1: ldx [%l0+ARGS+8], %o1
ldx [%l0+ARGS+16], %o2
ldx [%l0+ARGS+24], %o3
ldx [%l0+ARGS+32], %o4
ldx [%l0+ARGS+40], %o5
call %i5
sub %l0, STACK_BIAS, %sp ! (delay) switch to frame
! If the return value pointer is NULL, assume no return value.
brz,pn %i4, done
nop
cmp %i3, FFI_TYPE_INT
be,a,pt %icc, done
stx %o0, [%i4+0] ! (delay)
cmp %i3, FFI_TYPE_FLOAT
be,a,pn %icc, done
st %f0, [%i4+0] ! (delay)
cmp %i3, FFI_TYPE_DOUBLE
be,a,pn %icc, done
std %f0, [%i4+0] ! (delay)
cmp %i3, FFI_TYPE_STRUCT
be,pn %icc, dostruct
cmp %i3, FFI_TYPE_LONGDOUBLE
bne,pt %icc, done
nop
std %f0, [%i4+0]
std %f2, [%i4+8]
done: ret
restore
dostruct:
/* This will not work correctly for unions. */
stx %o0, [%i4+0]
stx %o1, [%i4+8]
stx %o2, [%i4+16]
stx %o3, [%i4+24]
std %f0, [%i4+32]
std %f2, [%i4+40]
std %f4, [%i4+48]
std %f6, [%i4+56]
ret
restore
.LLFE1:
.ffi_call_v9_end:
.size ffi_call_v9,.ffi_call_v9_end-ffi_call_v9
#undef STACKFRAME
#define STACKFRAME 336 /* 16*8 register window +
6*8 args backing store +
20*8 locals */
#define FP %fp+STACK_BIAS
/* ffi_closure_v9(...)
Receives the closure argument in %g1. */
.text
.align 8
.globl ffi_closure_v9
ffi_closure_v9:
.LLFB2:
save %sp, -STACKFRAME, %sp
.LLCFI1:
! Store all of the potential argument registers in va_list format.
stx %i0, [FP+128+0]
stx %i1, [FP+128+8]
stx %i2, [FP+128+16]
stx %i3, [FP+128+24]
stx %i4, [FP+128+32]
stx %i5, [FP+128+40]
! Store possible floating point argument registers too.
std %f0, [FP-128]
std %f2, [FP-120]
std %f4, [FP-112]
std %f6, [FP-104]
std %f8, [FP-96]
std %f10, [FP-88]
std %f12, [FP-80]
std %f14, [FP-72]
std %f16, [FP-64]
std %f18, [FP-56]
std %f20, [FP-48]
std %f22, [FP-40]
std %f24, [FP-32]
std %f26, [FP-24]
std %f28, [FP-16]
std %f30, [FP-8]
! Call ffi_closure_sparc_inner to do the bulk of the work.
mov %g1, %o0
add %fp, STACK_BIAS-160, %o1
add %fp, STACK_BIAS+128, %o2
call ffi_closure_sparc_inner_v9
add %fp, STACK_BIAS-128, %o3
! Load up the return value in the proper type.
! See ffi_prep_cif_machdep for the list of cases.
cmp %o0, FFI_TYPE_VOID
be,pn %icc, done1
cmp %o0, FFI_TYPE_INT
be,pn %icc, integer
cmp %o0, FFI_TYPE_FLOAT
be,a,pn %icc, done1
ld [FP-160], %f0
cmp %o0, FFI_TYPE_DOUBLE
be,a,pn %icc, done1
ldd [FP-160], %f0
#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE
cmp %o0, FFI_TYPE_LONGDOUBLE
be,a,pn %icc, longdouble1
ldd [FP-160], %f0
#endif
! FFI_TYPE_STRUCT
ldx [FP-152], %i1
ldx [FP-144], %i2
ldx [FP-136], %i3
ldd [FP-160], %f0
ldd [FP-152], %f2
ldd [FP-144], %f4
ldd [FP-136], %f6
integer:
ldx [FP-160], %i0
done1:
ret
restore
#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE
longdouble1:
ldd [FP-152], %f2
ret
restore
#endif
.LLFE2:
.ffi_closure_v9_end:
.size ffi_closure_v9,.ffi_closure_v9_end-ffi_closure_v9
#ifdef HAVE_RO_EH_FRAME
.section ".eh_frame",#alloc
#else
.section ".eh_frame",#alloc,#write
#endif
.LLframe1:
.uaword .LLECIE1-.LLSCIE1 ! Length of Common Information Entry
.LLSCIE1:
.uaword 0x0 ! CIE Identifier Tag
.byte 0x1 ! CIE Version
.ascii "zR\0" ! CIE Augmentation
.byte 0x1 ! uleb128 0x1; CIE Code Alignment Factor
.byte 0x78 ! sleb128 -8; CIE Data Alignment Factor
.byte 0xf ! CIE RA Column
.byte 0x1 ! uleb128 0x1; Augmentation size
#ifdef HAVE_AS_SPARC_UA_PCREL
.byte 0x1b ! FDE Encoding (pcrel sdata4)
#else
.byte 0x50 ! FDE Encoding (aligned absolute)
#endif
.byte 0xc ! DW_CFA_def_cfa
.byte 0xe ! uleb128 0xe
.byte 0xff,0xf ! uleb128 0x7ff
.align 8
.LLECIE1:
.LLSFDE1:
.uaword .LLEFDE1-.LLASFDE1 ! FDE Length
.LLASFDE1:
.uaword .LLASFDE1-.LLframe1 ! FDE CIE offset
#ifdef HAVE_AS_SPARC_UA_PCREL
.uaword %r_disp32(.LLFB1)
.uaword .LLFE1-.LLFB1 ! FDE address range
#else
.align 8
.xword .LLFB1
.uaxword .LLFE1-.LLFB1 ! FDE address range
#endif
.byte 0x0 ! uleb128 0x0; Augmentation size
.byte 0x4 ! DW_CFA_advance_loc4
.uaword .LLCFI0-.LLFB1
.byte 0xd ! DW_CFA_def_cfa_register
.byte 0x1e ! uleb128 0x1e
.byte 0x2d ! DW_CFA_GNU_window_save
.byte 0x9 ! DW_CFA_register
.byte 0xf ! uleb128 0xf
.byte 0x1f ! uleb128 0x1f
.align 8
.LLEFDE1:
.LLSFDE2:
.uaword .LLEFDE2-.LLASFDE2 ! FDE Length
.LLASFDE2:
.uaword .LLASFDE2-.LLframe1 ! FDE CIE offset
#ifdef HAVE_AS_SPARC_UA_PCREL
.uaword %r_disp32(.LLFB2)
.uaword .LLFE2-.LLFB2 ! FDE address range
#else
.align 8
.xword .LLFB2
.uaxword .LLFE2-.LLFB2 ! FDE address range
#endif
.byte 0x0 ! uleb128 0x0; Augmentation size
.byte 0x4 ! DW_CFA_advance_loc4
.uaword .LLCFI1-.LLFB2
.byte 0xd ! DW_CFA_def_cfa_register
.byte 0x1e ! uleb128 0x1e
.byte 0x2d ! DW_CFA_GNU_window_save
.byte 0x9 ! DW_CFA_register
.byte 0xf ! uleb128 0xf
.byte 0x1f ! uleb128 0x1f
.align 8
.LLEFDE2:
#endif
#ifdef __linux__
.section .note.GNU-stack,"",@progbits
#endif
|
suryaveeryadav/Python-3.4.0
| 7,406
|
Modules/_ctypes/libffi/src/sparc/v8.S
|
/* -----------------------------------------------------------------------
v8.S - Copyright (c) 2013 The Written Word, Inc.
Copyright (c) 1996, 1997, 2003, 2004, 2008 Red Hat, Inc.
SPARC Foreign Function Interface
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
DEALINGS IN THE SOFTWARE.
----------------------------------------------------------------------- */
#define LIBFFI_ASM
#include <fficonfig.h>
#include <ffi.h>
#define STACKFRAME 96 /* Minimum stack framesize for SPARC */
#define ARGS (64+4) /* Offset of register area in frame */
#ifndef __GNUC__
.text
.align 8
.globl ffi_flush_icache
.globl _ffi_flush_icache
ffi_flush_icache:
_ffi_flush_icache:
add %o0, %o1, %o2
#ifdef SPARC64
1: flush %o0
#else
1: iflush %o0
#endif
add %o0, 8, %o0
cmp %o0, %o2
blt 1b
nop
nop
nop
nop
nop
retl
nop
.ffi_flush_icache_end:
.size ffi_flush_icache,.ffi_flush_icache_end-ffi_flush_icache
#endif
.text
.align 8
.globl ffi_call_v8
.globl _ffi_call_v8
ffi_call_v8:
_ffi_call_v8:
.LLFB1:
save %sp, -STACKFRAME, %sp
.LLCFI0:
sub %sp, %i2, %sp ! alloca() space in stack for frame to set up
add %sp, STACKFRAME, %l0 ! %l0 has start of
! frame to set up
mov %l0, %o0 ! call routine to set up frame
call %i0
mov %i1, %o1 ! (delay)
ld [%l0+ARGS], %o0 ! call foreign function
ld [%l0+ARGS+4], %o1
ld [%l0+ARGS+8], %o2
ld [%l0+ARGS+12], %o3
ld [%l0+ARGS+16], %o4
ld [%l0+ARGS+20], %o5
call %i5
mov %l0, %sp ! (delay) switch to frame
nop ! STRUCT returning functions skip 12 instead of 8 bytes
! If the return value pointer is NULL, assume no return value.
tst %i4
bz done
nop
cmp %i3, FFI_TYPE_INT
be,a done
st %o0, [%i4] ! (delay)
cmp %i3, FFI_TYPE_FLOAT
be,a done
st %f0, [%i4+0] ! (delay)
cmp %i3, FFI_TYPE_DOUBLE
be,a double
st %f0, [%i4+0] ! (delay)
cmp %i3, FFI_TYPE_SINT8
be,a sint8
sll %o0, 24, %o0 ! (delay)
cmp %i3, FFI_TYPE_UINT8
be,a uint8
sll %o0, 24, %o0 ! (delay)
cmp %i3, FFI_TYPE_SINT16
be,a sint16
sll %o0, 16, %o0 ! (delay)
cmp %i3, FFI_TYPE_UINT16
be,a uint16
sll %o0, 16, %o0 ! (delay)
cmp %i3, FFI_TYPE_SINT64
be,a longlong
st %o0, [%i4+0] ! (delay)
done:
ret
restore
double:
st %f1, [%i4+4]
ret
restore
sint8:
sra %o0, 24, %o0
st %o0, [%i4+0]
ret
restore
uint8:
srl %o0, 24, %o0
st %o0, [%i4+0]
ret
restore
sint16:
sra %o0, 16, %o0
st %o0, [%i4+0]
ret
restore
uint16:
srl %o0, 16, %o0
st %o0, [%i4+0]
ret
restore
longlong:
st %o1, [%i4+4]
ret
restore
.LLFE1:
.ffi_call_v8_end:
.size ffi_call_v8,.ffi_call_v8_end-ffi_call_v8
#undef STACKFRAME
#define STACKFRAME 104 /* 16*4 register window +
1*4 struct return +
6*4 args backing store +
3*4 locals */
/* ffi_closure_v8(...)
Receives the closure argument in %g2. */
.text
.align 8
.globl ffi_closure_v8
ffi_closure_v8:
#ifdef HAVE_AS_REGISTER_PSEUDO_OP
.register %g2, #scratch
#endif
.LLFB2:
! Reserve frame space for all arguments in case
! we need to align them on a 8-byte boundary.
ld [%g2+FFI_TRAMPOLINE_SIZE], %g1
ld [%g1+4], %g1
sll %g1, 3, %g1
add %g1, STACKFRAME, %g1
! %g1 == STACKFRAME + 8*nargs
neg %g1
save %sp, %g1, %sp
.LLCFI1:
! Store all of the potential argument registers in va_list format.
st %i0, [%fp+68+0]
st %i1, [%fp+68+4]
st %i2, [%fp+68+8]
st %i3, [%fp+68+12]
st %i4, [%fp+68+16]
st %i5, [%fp+68+20]
! Call ffi_closure_sparc_inner to do the bulk of the work.
mov %g2, %o0
add %fp, -8, %o1
add %fp, 64, %o2
call ffi_closure_sparc_inner_v8
add %fp, -16, %o3
! Load up the return value in the proper type.
! See ffi_prep_cif_machdep for the list of cases.
cmp %o0, FFI_TYPE_VOID
be done1
cmp %o0, FFI_TYPE_INT
be done1
ld [%fp-8], %i0
cmp %o0, FFI_TYPE_FLOAT
be,a done1
ld [%fp-8], %f0
cmp %o0, FFI_TYPE_DOUBLE
be,a done1
ldd [%fp-8], %f0
#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE
cmp %o0, FFI_TYPE_LONGDOUBLE
be done2
#endif
cmp %o0, FFI_TYPE_STRUCT
be done2
cmp %o0, FFI_TYPE_SINT64
be,a done1
ldd [%fp-8], %i0
cmp %o0, FFI_TYPE_UINT64
be,a done1
ldd [%fp-8], %i0
ld [%fp-8], %i0
done1:
jmp %i7+8
restore
done2:
! Skip 'unimp'.
jmp %i7+12
restore
.LLFE2:
.ffi_closure_v8_end:
.size ffi_closure_v8,.ffi_closure_v8_end-ffi_closure_v8
#ifdef SPARC64
#define WS 8
#define nword xword
#define uanword uaxword
#else
#define WS 4
#define nword long
#define uanword uaword
#endif
#ifdef HAVE_RO_EH_FRAME
.section ".eh_frame",#alloc
#else
.section ".eh_frame",#alloc,#write
#endif
.LLframe1:
.uaword .LLECIE1-.LLSCIE1 ! Length of Common Information Entry
.LLSCIE1:
.uaword 0x0 ! CIE Identifier Tag
.byte 0x1 ! CIE Version
.ascii "zR\0" ! CIE Augmentation
.byte 0x1 ! uleb128 0x1; CIE Code Alignment Factor
.byte 0x80-WS ! sleb128 -WS; CIE Data Alignment Factor
.byte 0xf ! CIE RA Column
.byte 0x1 ! uleb128 0x1; Augmentation size
#ifdef HAVE_AS_SPARC_UA_PCREL
.byte 0x1b ! FDE Encoding (pcrel sdata4)
#else
.byte 0x50 ! FDE Encoding (aligned absolute)
#endif
.byte 0xc ! DW_CFA_def_cfa
.byte 0xe ! uleb128 0xe
.byte 0x0 ! uleb128 0x0
.align WS
.LLECIE1:
.LLSFDE1:
.uaword .LLEFDE1-.LLASFDE1 ! FDE Length
.LLASFDE1:
.uaword .LLASFDE1-.LLframe1 ! FDE CIE offset
#ifdef HAVE_AS_SPARC_UA_PCREL
.uaword %r_disp32(.LLFB1)
.uaword .LLFE1-.LLFB1 ! FDE address range
#else
.align WS
.nword .LLFB1
.uanword .LLFE1-.LLFB1 ! FDE address range
#endif
.byte 0x0 ! uleb128 0x0; Augmentation size
.byte 0x4 ! DW_CFA_advance_loc4
.uaword .LLCFI0-.LLFB1
.byte 0xd ! DW_CFA_def_cfa_register
.byte 0x1e ! uleb128 0x1e
.byte 0x2d ! DW_CFA_GNU_window_save
.byte 0x9 ! DW_CFA_register
.byte 0xf ! uleb128 0xf
.byte 0x1f ! uleb128 0x1f
.align WS
.LLEFDE1:
.LLSFDE2:
.uaword .LLEFDE2-.LLASFDE2 ! FDE Length
.LLASFDE2:
.uaword .LLASFDE2-.LLframe1 ! FDE CIE offset
#ifdef HAVE_AS_SPARC_UA_PCREL
.uaword %r_disp32(.LLFB2)
.uaword .LLFE2-.LLFB2 ! FDE address range
#else
.align WS
.nword .LLFB2
.uanword .LLFE2-.LLFB2 ! FDE address range
#endif
.byte 0x0 ! uleb128 0x0; Augmentation size
.byte 0x4 ! DW_CFA_advance_loc4
.uaword .LLCFI1-.LLFB2
.byte 0xd ! DW_CFA_def_cfa_register
.byte 0x1e ! uleb128 0x1e
.byte 0x2d ! DW_CFA_GNU_window_save
.byte 0x9 ! DW_CFA_register
.byte 0xf ! uleb128 0xf
.byte 0x1f ! uleb128 0x1f
.align WS
.LLEFDE2:
#if defined __ELF__ && defined __linux__
.section .note.GNU-stack,"",@progbits
#endif
|
suse-207/Learn-Ros
| 1,895
|
04_safe_globals/src/_arch/aarch64/cpu/boot.s
|
// SPDX-License-Identifier: MIT OR Apache-2.0
//
// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
//--------------------------------------------------------------------------------------------------
// Definitions
//--------------------------------------------------------------------------------------------------
// Load the address of a symbol into a register, PC-relative.
//
// The symbol must lie within +/- 4 GiB of the Program Counter.
//
// # Resources
//
// - https://sourceware.org/binutils/docs-2.36/as/AArch64_002dRelocations.html
.macro ADR_REL register, symbol
adrp \register, \symbol
add \register, \register, #:lo12:\symbol
.endm
//--------------------------------------------------------------------------------------------------
// Public Code
//--------------------------------------------------------------------------------------------------
.section .text._start
//------------------------------------------------------------------------------
// fn _start()
//------------------------------------------------------------------------------
_start:
// only proceed on the boot core, Park it otherwise
mrs x0, MPIDR_EL1
and x0, x0, {CONST_CORE_ID_MASK}
ldr x1, BOOT_CORE_ID // provided by bsp/_board_name_/cpu.rs
cmp x0, x1
b.ne .L_parking_loop
// If execution reaches here, it is the boot core
// Initialize DRAM.
ADR_REL x0, __bss_start
ADR_REL x1, __bss_end_exclusive
.L_bss_init_loop:
cmp x0,x1
b.eq .L_prepare_rust
stp xzr, xzr, [x0], #16
b .L_bss_init_loop
// prepare the jump Rust Code
.L_prepare_rust:
// set the stack pointer
ADR_REL x0, __boot_core_stack_end_exclusive
mov sp, x0
// jump to rust Code
b _start_rust
// Infinitely wait for events (aka "park the core")
.L_parking_loop:
wfe
b .L_parking_loop
.size _start, . - _start
.type _start, function
.global _start
|
suse-207/Learn-Ros
| 1,895
|
02_runtime_init/src/_arch/aarch64/cpu/boot.s
|
// SPDX-License-Identifier: MIT OR Apache-2.0
//
// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
//--------------------------------------------------------------------------------------------------
// Definitions
//--------------------------------------------------------------------------------------------------
// Load the address of a symbol into a register, PC-relative.
//
// The symbol must lie within +/- 4 GiB of the Program Counter.
//
// # Resources
//
// - https://sourceware.org/binutils/docs-2.36/as/AArch64_002dRelocations.html
.macro ADR_REL register, symbol
adrp \register, \symbol
add \register, \register, #:lo12:\symbol
.endm
//--------------------------------------------------------------------------------------------------
// Public Code
//--------------------------------------------------------------------------------------------------
.section .text._start
//------------------------------------------------------------------------------
// fn _start()
//------------------------------------------------------------------------------
_start:
// only proceed on the boot core, Park it otherwise
mrs x0, MPIDR_EL1
and x0, x0, {CONST_CORE_ID_MASK}
ldr x1, BOOT_CORE_ID // provided by bsp/_board_name_/cpu.rs
cmp x0, x1
b.ne .L_parking_loop
// If execution reaches here, it is the boot core
// Initialize DRAM.
ADR_REL x0, __bss_start
ADR_REL x1, __bss_end_exclusive
.L_bss_init_loop:
cmp x0,x1
b.eq .L_prepare_rust
stp xzr, xzr, [x0], #16
b .L_bss_init_loop
// prepare the jump Rust Code
.L_prepare_rust:
// set the stack pointer
ADR_REL x0, __boot_core_stack_end_exclusive
mov sp, x0
// jump to rust Code
b _start_rust
// Infinitely wait for events (aka "park the core")
.L_parking_loop:
wfe
b .L_parking_loop
.size _start, . - _start
.type _start, function
.global _start
|
suse-207/Learn-Ros
| 1,895
|
03_hacky_hello_world/src/_arch/aarch64/cpu/boot.s
|
// SPDX-License-Identifier: MIT OR Apache-2.0
//
// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
//--------------------------------------------------------------------------------------------------
// Definitions
//--------------------------------------------------------------------------------------------------
// Load the address of a symbol into a register, PC-relative.
//
// The symbol must lie within +/- 4 GiB of the Program Counter.
//
// # Resources
//
// - https://sourceware.org/binutils/docs-2.36/as/AArch64_002dRelocations.html
.macro ADR_REL register, symbol
adrp \register, \symbol
add \register, \register, #:lo12:\symbol
.endm
//--------------------------------------------------------------------------------------------------
// Public Code
//--------------------------------------------------------------------------------------------------
.section .text._start
//------------------------------------------------------------------------------
// fn _start()
//------------------------------------------------------------------------------
_start:
// only proceed on the boot core, Park it otherwise
mrs x0, MPIDR_EL1
and x0, x0, {CONST_CORE_ID_MASK}
ldr x1, BOOT_CORE_ID // provided by bsp/_board_name_/cpu.rs
cmp x0, x1
b.ne .L_parking_loop
// If execution reaches here, it is the boot core
// Initialize DRAM.
ADR_REL x0, __bss_start
ADR_REL x1, __bss_end_exclusive
.L_bss_init_loop:
cmp x0,x1
b.eq .L_prepare_rust
stp xzr, xzr, [x0], #16
b .L_bss_init_loop
// prepare the jump Rust Code
.L_prepare_rust:
// set the stack pointer
ADR_REL x0, __boot_core_stack_end_exclusive
mov sp, x0
// jump to rust Code
b _start_rust
// Infinitely wait for events (aka "park the core")
.L_parking_loop:
wfe
b .L_parking_loop
.size _start, . - _start
.type _start, function
.global _start
|
SYQ1037/Smart-Tea-Garden-Robot-System
| 29,171
|
keil2/(remote)/single(remote)/CORE/startup_stm32f40_41xxx.s
|
;******************** (C) COPYRIGHT 2014 STMicroelectronics ********************
;* File Name : startup_stm32f40_41xxx.s
;* Author : MCD Application Team
;* @version : V1.4.0
;* @date : 04-August-2014
;* Description : STM32F40xxx/41xxx devices vector table for MDK-ARM toolchain.
;* This module performs:
;* - Set the initial SP
;* - Set the initial PC == Reset_Handler
;* - Set the vector table entries with the exceptions ISR address
;* - Configure the system clock and the external SRAM mounted on
;* STM324xG-EVAL board to be used as data memory (optional,
;* to be enabled by user)
;* - Branches to __main in the C library (which eventually
;* calls main()).
;* After Reset the CortexM4 processor is in Thread mode,
;* priority is Privileged, and the Stack is set to Main.
;* <<< Use Configuration Wizard in Context Menu >>>
;*******************************************************************************
;
; Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
; You may not use this file except in compliance with the License.
; You may obtain a copy of the License at:
;
; http://www.st.com/software_license_agreement_liberty_v2
;
; Unless required by applicable law or agreed to in writing, software
; distributed under the License is distributed on an "AS IS" BASIS,
; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
; See the License for the specific language governing permissions and
; limitations under the License.
;
;*******************************************************************************
; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000200
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD WWDG_IRQHandler ; Window WatchDog
DCD PVD_IRQHandler ; PVD through EXTI Line detection
DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
DCD FLASH_IRQHandler ; FLASH
DCD RCC_IRQHandler ; RCC
DCD EXTI0_IRQHandler ; EXTI Line0
DCD EXTI1_IRQHandler ; EXTI Line1
DCD EXTI2_IRQHandler ; EXTI Line2
DCD EXTI3_IRQHandler ; EXTI Line3
DCD EXTI4_IRQHandler ; EXTI Line4
DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0
DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1
DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2
DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3
DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4
DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5
DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6
DCD ADC_IRQHandler ; ADC1, ADC2 and ADC3s
DCD CAN1_TX_IRQHandler ; CAN1 TX
DCD CAN1_RX0_IRQHandler ; CAN1 RX0
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
DCD EXTI9_5_IRQHandler ; External Line[9:5]s
DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9
DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10
DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
DCD TIM2_IRQHandler ; TIM2
DCD TIM3_IRQHandler ; TIM3
DCD TIM4_IRQHandler ; TIM4
DCD I2C1_EV_IRQHandler ; I2C1 Event
DCD I2C1_ER_IRQHandler ; I2C1 Error
DCD I2C2_EV_IRQHandler ; I2C2 Event
DCD I2C2_ER_IRQHandler ; I2C2 Error
DCD SPI1_IRQHandler ; SPI1
DCD SPI2_IRQHandler ; SPI2
DCD USART1_IRQHandler ; USART1
DCD USART2_IRQHandler ; USART2
DCD USART3_IRQHandler ; USART3
DCD EXTI15_10_IRQHandler ; External Line[15:10]s
DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line
DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break and TIM12
DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update and TIM13
DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation and TIM14
DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare
DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7
DCD FSMC_IRQHandler ; FSMC
DCD SDIO_IRQHandler ; SDIO
DCD TIM5_IRQHandler ; TIM5
DCD SPI3_IRQHandler ; SPI3
DCD UART4_IRQHandler ; UART4
DCD UART5_IRQHandler ; UART5
DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
DCD TIM7_IRQHandler ; TIM7
DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0
DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1
DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2
DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3
DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4
DCD ETH_IRQHandler ; Ethernet
DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line
DCD CAN2_TX_IRQHandler ; CAN2 TX
DCD CAN2_RX0_IRQHandler ; CAN2 RX0
DCD CAN2_RX1_IRQHandler ; CAN2 RX1
DCD CAN2_SCE_IRQHandler ; CAN2 SCE
DCD OTG_FS_IRQHandler ; USB OTG FS
DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5
DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6
DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7
DCD USART6_IRQHandler ; USART6
DCD I2C3_EV_IRQHandler ; I2C3 event
DCD I2C3_ER_IRQHandler ; I2C3 error
DCD OTG_HS_EP1_OUT_IRQHandler ; USB OTG HS End Point 1 Out
DCD OTG_HS_EP1_IN_IRQHandler ; USB OTG HS End Point 1 In
DCD OTG_HS_WKUP_IRQHandler ; USB OTG HS Wakeup through EXTI
DCD OTG_HS_IRQHandler ; USB OTG HS
DCD DCMI_IRQHandler ; DCMI
DCD CRYP_IRQHandler ; CRYP crypto
DCD HASH_RNG_IRQHandler ; Hash and Rng
DCD FPU_IRQHandler ; FPU
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT __main
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDG_IRQHandler [WEAK]
EXPORT PVD_IRQHandler [WEAK]
EXPORT TAMP_STAMP_IRQHandler [WEAK]
EXPORT RTC_WKUP_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT RCC_IRQHandler [WEAK]
EXPORT EXTI0_IRQHandler [WEAK]
EXPORT EXTI1_IRQHandler [WEAK]
EXPORT EXTI2_IRQHandler [WEAK]
EXPORT EXTI3_IRQHandler [WEAK]
EXPORT EXTI4_IRQHandler [WEAK]
EXPORT DMA1_Stream0_IRQHandler [WEAK]
EXPORT DMA1_Stream1_IRQHandler [WEAK]
EXPORT DMA1_Stream2_IRQHandler [WEAK]
EXPORT DMA1_Stream3_IRQHandler [WEAK]
EXPORT DMA1_Stream4_IRQHandler [WEAK]
EXPORT DMA1_Stream5_IRQHandler [WEAK]
EXPORT DMA1_Stream6_IRQHandler [WEAK]
EXPORT ADC_IRQHandler [WEAK]
EXPORT CAN1_TX_IRQHandler [WEAK]
EXPORT CAN1_RX0_IRQHandler [WEAK]
EXPORT CAN1_RX1_IRQHandler [WEAK]
EXPORT CAN1_SCE_IRQHandler [WEAK]
EXPORT EXTI9_5_IRQHandler [WEAK]
EXPORT TIM1_BRK_TIM9_IRQHandler [WEAK]
EXPORT TIM1_UP_TIM10_IRQHandler [WEAK]
EXPORT TIM1_TRG_COM_TIM11_IRQHandler [WEAK]
EXPORT TIM1_CC_IRQHandler [WEAK]
EXPORT TIM2_IRQHandler [WEAK]
EXPORT TIM3_IRQHandler [WEAK]
EXPORT TIM4_IRQHandler [WEAK]
EXPORT I2C1_EV_IRQHandler [WEAK]
EXPORT I2C1_ER_IRQHandler [WEAK]
EXPORT I2C2_EV_IRQHandler [WEAK]
EXPORT I2C2_ER_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
EXPORT USART3_IRQHandler [WEAK]
EXPORT EXTI15_10_IRQHandler [WEAK]
EXPORT RTC_Alarm_IRQHandler [WEAK]
EXPORT OTG_FS_WKUP_IRQHandler [WEAK]
EXPORT TIM8_BRK_TIM12_IRQHandler [WEAK]
EXPORT TIM8_UP_TIM13_IRQHandler [WEAK]
EXPORT TIM8_TRG_COM_TIM14_IRQHandler [WEAK]
EXPORT TIM8_CC_IRQHandler [WEAK]
EXPORT DMA1_Stream7_IRQHandler [WEAK]
EXPORT FSMC_IRQHandler [WEAK]
EXPORT SDIO_IRQHandler [WEAK]
EXPORT TIM5_IRQHandler [WEAK]
EXPORT SPI3_IRQHandler [WEAK]
EXPORT UART4_IRQHandler [WEAK]
EXPORT UART5_IRQHandler [WEAK]
EXPORT TIM6_DAC_IRQHandler [WEAK]
EXPORT TIM7_IRQHandler [WEAK]
EXPORT DMA2_Stream0_IRQHandler [WEAK]
EXPORT DMA2_Stream1_IRQHandler [WEAK]
EXPORT DMA2_Stream2_IRQHandler [WEAK]
EXPORT DMA2_Stream3_IRQHandler [WEAK]
EXPORT DMA2_Stream4_IRQHandler [WEAK]
EXPORT ETH_IRQHandler [WEAK]
EXPORT ETH_WKUP_IRQHandler [WEAK]
EXPORT CAN2_TX_IRQHandler [WEAK]
EXPORT CAN2_RX0_IRQHandler [WEAK]
EXPORT CAN2_RX1_IRQHandler [WEAK]
EXPORT CAN2_SCE_IRQHandler [WEAK]
EXPORT OTG_FS_IRQHandler [WEAK]
EXPORT DMA2_Stream5_IRQHandler [WEAK]
EXPORT DMA2_Stream6_IRQHandler [WEAK]
EXPORT DMA2_Stream7_IRQHandler [WEAK]
EXPORT USART6_IRQHandler [WEAK]
EXPORT I2C3_EV_IRQHandler [WEAK]
EXPORT I2C3_ER_IRQHandler [WEAK]
EXPORT OTG_HS_EP1_OUT_IRQHandler [WEAK]
EXPORT OTG_HS_EP1_IN_IRQHandler [WEAK]
EXPORT OTG_HS_WKUP_IRQHandler [WEAK]
EXPORT OTG_HS_IRQHandler [WEAK]
EXPORT DCMI_IRQHandler [WEAK]
EXPORT CRYP_IRQHandler [WEAK]
EXPORT HASH_RNG_IRQHandler [WEAK]
EXPORT FPU_IRQHandler [WEAK]
WWDG_IRQHandler
PVD_IRQHandler
TAMP_STAMP_IRQHandler
RTC_WKUP_IRQHandler
FLASH_IRQHandler
RCC_IRQHandler
EXTI0_IRQHandler
EXTI1_IRQHandler
EXTI2_IRQHandler
EXTI3_IRQHandler
EXTI4_IRQHandler
DMA1_Stream0_IRQHandler
DMA1_Stream1_IRQHandler
DMA1_Stream2_IRQHandler
DMA1_Stream3_IRQHandler
DMA1_Stream4_IRQHandler
DMA1_Stream5_IRQHandler
DMA1_Stream6_IRQHandler
ADC_IRQHandler
CAN1_TX_IRQHandler
CAN1_RX0_IRQHandler
CAN1_RX1_IRQHandler
CAN1_SCE_IRQHandler
EXTI9_5_IRQHandler
TIM1_BRK_TIM9_IRQHandler
TIM1_UP_TIM10_IRQHandler
TIM1_TRG_COM_TIM11_IRQHandler
TIM1_CC_IRQHandler
TIM2_IRQHandler
TIM3_IRQHandler
TIM4_IRQHandler
I2C1_EV_IRQHandler
I2C1_ER_IRQHandler
I2C2_EV_IRQHandler
I2C2_ER_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
USART3_IRQHandler
EXTI15_10_IRQHandler
RTC_Alarm_IRQHandler
OTG_FS_WKUP_IRQHandler
TIM8_BRK_TIM12_IRQHandler
TIM8_UP_TIM13_IRQHandler
TIM8_TRG_COM_TIM14_IRQHandler
TIM8_CC_IRQHandler
DMA1_Stream7_IRQHandler
FSMC_IRQHandler
SDIO_IRQHandler
TIM5_IRQHandler
SPI3_IRQHandler
UART4_IRQHandler
UART5_IRQHandler
TIM6_DAC_IRQHandler
TIM7_IRQHandler
DMA2_Stream0_IRQHandler
DMA2_Stream1_IRQHandler
DMA2_Stream2_IRQHandler
DMA2_Stream3_IRQHandler
DMA2_Stream4_IRQHandler
ETH_IRQHandler
ETH_WKUP_IRQHandler
CAN2_TX_IRQHandler
CAN2_RX0_IRQHandler
CAN2_RX1_IRQHandler
CAN2_SCE_IRQHandler
OTG_FS_IRQHandler
DMA2_Stream5_IRQHandler
DMA2_Stream6_IRQHandler
DMA2_Stream7_IRQHandler
USART6_IRQHandler
I2C3_EV_IRQHandler
I2C3_ER_IRQHandler
OTG_HS_EP1_OUT_IRQHandler
OTG_HS_EP1_IN_IRQHandler
OTG_HS_WKUP_IRQHandler
OTG_HS_IRQHandler
DCMI_IRQHandler
CRYP_IRQHandler
HASH_RNG_IRQHandler
FPU_IRQHandler
B .
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
t-88/fun
| 10,603
|
ctfs/pwnycup/rev/arm/main.s
|
.arch armv8-a
.file "main.c"
.text
.align 2
.global Transform
.type Transform, %function
Transform:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -160]!
.cfi_def_cfa_offset 160
.cfi_offset 29, -160
.cfi_offset 30, -152
mov x29, sp
str x0, [sp, 40]
str w1, [sp, 36]
str x2, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0]
ldr x1, [x0]
str x1, [sp, 152]
mov x1, 0
mov w0, 65
strb w0, [sp, 80]
mov w0, 66
strb w0, [sp, 81]
mov w0, 67
strb w0, [sp, 82]
mov w0, 68
strb w0, [sp, 83]
mov w0, 69
strb w0, [sp, 84]
mov w0, 70
strb w0, [sp, 85]
mov w0, 71
strb w0, [sp, 86]
mov w0, 72
strb w0, [sp, 87]
mov w0, 73
strb w0, [sp, 88]
mov w0, 74
strb w0, [sp, 89]
mov w0, 75
strb w0, [sp, 90]
mov w0, 76
strb w0, [sp, 91]
mov w0, 77
strb w0, [sp, 92]
mov w0, 78
strb w0, [sp, 93]
mov w0, 79
strb w0, [sp, 94]
mov w0, 80
strb w0, [sp, 95]
mov w0, 81
strb w0, [sp, 96]
mov w0, 82
strb w0, [sp, 97]
mov w0, 83
strb w0, [sp, 98]
mov w0, 84
strb w0, [sp, 99]
mov w0, 85
strb w0, [sp, 100]
mov w0, 86
strb w0, [sp, 101]
mov w0, 87
strb w0, [sp, 102]
mov w0, 88
strb w0, [sp, 103]
mov w0, 89
strb w0, [sp, 104]
mov w0, 90
strb w0, [sp, 105]
mov w0, 97
strb w0, [sp, 106]
mov w0, 98
strb w0, [sp, 107]
mov w0, 99
strb w0, [sp, 108]
mov w0, 100
strb w0, [sp, 109]
mov w0, 101
strb w0, [sp, 110]
mov w0, 102
strb w0, [sp, 111]
mov w0, 103
strb w0, [sp, 112]
mov w0, 104
strb w0, [sp, 113]
mov w0, 105
strb w0, [sp, 114]
mov w0, 106
strb w0, [sp, 115]
mov w0, 107
strb w0, [sp, 116]
mov w0, 108
strb w0, [sp, 117]
mov w0, 109
strb w0, [sp, 118]
mov w0, 110
strb w0, [sp, 119]
mov w0, 111
strb w0, [sp, 120]
mov w0, 112
strb w0, [sp, 121]
mov w0, 113
strb w0, [sp, 122]
mov w0, 114
strb w0, [sp, 123]
mov w0, 115
strb w0, [sp, 124]
mov w0, 116
strb w0, [sp, 125]
mov w0, 117
strb w0, [sp, 126]
mov w0, 118
strb w0, [sp, 127]
mov w0, 119
strb w0, [sp, 128]
mov w0, 120
strb w0, [sp, 129]
mov w0, 121
strb w0, [sp, 130]
mov w0, 122
strb w0, [sp, 131]
mov w0, 48
strb w0, [sp, 132]
mov w0, 49
strb w0, [sp, 133]
mov w0, 50
strb w0, [sp, 134]
mov w0, 51
strb w0, [sp, 135]
mov w0, 52
strb w0, [sp, 136]
mov w0, 53
strb w0, [sp, 137]
mov w0, 54
strb w0, [sp, 138]
mov w0, 55
strb w0, [sp, 139]
mov w0, 56
strb w0, [sp, 140]
mov w0, 57
strb w0, [sp, 141]
mov w0, 43
strb w0, [sp, 142]
mov w0, 47
strb w0, [sp, 143]
str wzr, [sp, 60]
str wzr, [sp, 56]
b .L2
.L13:
ldr w1, [sp, 56]
ldr w0, [sp, 36]
cmp w1, w0
bge .L3
ldrsw x0, [sp, 56]
ldr x1, [sp, 40]
add x0, x1, x0
ldrb w0, [x0]
b .L4
.L3:
mov w0, 0
.L4:
str w0, [sp, 64]
ldr w0, [sp, 56]
add w0, w0, 1
ldr w1, [sp, 36]
cmp w1, w0
ble .L5
ldrsw x0, [sp, 56]
add x0, x0, 1
ldr x1, [sp, 40]
add x0, x1, x0
ldrb w0, [x0]
b .L6
.L5:
mov w0, 0
.L6:
str w0, [sp, 68]
ldr w0, [sp, 56]
add w0, w0, 2
ldr w1, [sp, 36]
cmp w1, w0
ble .L7
ldrsw x0, [sp, 56]
add x0, x0, 2
ldr x1, [sp, 40]
add x0, x1, x0
ldrb w0, [x0]
b .L8
.L7:
mov w0, 0
.L8:
str w0, [sp, 72]
ldr w0, [sp, 64]
lsl w1, w0, 16
ldr w0, [sp, 68]
lsl w0, w0, 8
add w0, w1, w0
ldr w1, [sp, 72]
add w0, w1, w0
str w0, [sp, 76]
ldr w0, [sp, 76]
asr w0, w0, 18
and w2, w0, 63
ldr w0, [sp, 60]
add w1, w0, 1
str w1, [sp, 60]
sxtw x0, w0
ldr x1, [sp, 24]
add x0, x1, x0
sxtw x1, w2
add x2, sp, 80
ldrb w1, [x2, x1]
strb w1, [x0]
ldr w0, [sp, 76]
asr w0, w0, 12
and w2, w0, 63
ldr w0, [sp, 60]
add w1, w0, 1
str w1, [sp, 60]
sxtw x0, w0
ldr x1, [sp, 24]
add x0, x1, x0
sxtw x1, w2
add x2, sp, 80
ldrb w1, [x2, x1]
strb w1, [x0]
ldr w0, [sp, 56]
add w0, w0, 1
ldr w1, [sp, 36]
cmp w1, w0
ble .L9
ldr w0, [sp, 76]
asr w0, w0, 6
and w0, w0, 63
sxtw x0, w0
add x1, sp, 80
ldrb w0, [x1, x0]
b .L10
.L9:
mov w0, 61
.L10:
ldr w1, [sp, 60]
add w2, w1, 1
str w2, [sp, 60]
sxtw x1, w1
ldr x2, [sp, 24]
add x1, x2, x1
strb w0, [x1]
ldr w0, [sp, 56]
add w0, w0, 2
ldr w1, [sp, 36]
cmp w1, w0
ble .L11
ldr w0, [sp, 76]
and w0, w0, 63
sxtw x0, w0
add x1, sp, 80
ldrb w0, [x1, x0]
b .L12
.L11:
mov w0, 61
.L12:
ldr w1, [sp, 60]
add w2, w1, 1
str w2, [sp, 60]
sxtw x1, w1
ldr x2, [sp, 24]
add x1, x2, x1
strb w0, [x1]
ldr w0, [sp, 56]
add w0, w0, 3
str w0, [sp, 56]
.L2:
ldr w1, [sp, 56]
ldr w0, [sp, 36]
cmp w1, w0
blt .L13
ldrsw x0, [sp, 60]
ldr x1, [sp, 24]
add x0, x1, x0
strb wzr, [x0]
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0]
ldr x2, [sp, 152]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L14
bl __stack_chk_fail
.L14:
ldp x29, x30, [sp], 160
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size Transform, .-Transform
.align 2
.global encrypt
.type encrypt, %function
encrypt:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -448]!
.cfi_def_cfa_offset 448
.cfi_offset 29, -448
.cfi_offset 30, -440
mov x29, sp
.cfi_def_cfa_register 29
stp x19, x20, [sp, 16]
stp x21, x22, [sp, 32]
stp x23, x24, [sp, 48]
stp x25, x26, [sp, 64]
str x27, [sp, 80]
sub sp, sp, #16
.cfi_offset 19, -432
.cfi_offset 20, -424
.cfi_offset 21, -416
.cfi_offset 22, -408
.cfi_offset 23, -400
.cfi_offset 24, -392
.cfi_offset 25, -384
.cfi_offset 26, -376
.cfi_offset 27, -368
str x0, [x29, 104]
str x1, [x29, 96]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0]
ldr x1, [x0]
str x1, [x29, 440]
mov x1, 0
mov x0, sp
mov x19, x0
mov w0, 73
strb w0, [x29, 168]
mov w0, 109
strb w0, [x29, 169]
mov w0, 83
strb w0, [x29, 170]
mov w0, 104
strb w0, [x29, 171]
mov w0, 101
strb w0, [x29, 172]
mov w0, 108
strb w0, [x29, 173]
mov w0, 108
strb w0, [x29, 174]
mov w0, 109
strb w0, [x29, 175]
mov w0, 52
strb w0, [x29, 176]
mov w0, 97
strb w0, [x29, 177]
mov w0, 116
strb w0, [x29, 178]
mov w0, 101
strb w0, [x29, 179]
mov w0, 77
strb w0, [x29, 180]
mov w0, 51
strb w0, [x29, 181]
mov w0, 109
strb w0, [x29, 182]
mov w0, 98
strb w0, [x29, 183]
mov w0, 16
str w0, [x29, 144]
ldr x0, [x29, 104]
bl strlen
str w0, [x29, 148]
str wzr, [x29, 120]
b .L16
.L17:
ldr w0, [x29, 120]
and w2, w0, 255
ldrsw x0, [x29, 120]
add x1, x29, 184
strb w2, [x1, x0]
ldr w0, [x29, 120]
add w0, w0, 1
str w0, [x29, 120]
.L16:
ldr w0, [x29, 120]
cmp w0, 255
ble .L17
str wzr, [x29, 124]
str wzr, [x29, 128]
b .L18
.L19:
ldrsw x0, [x29, 128]
add x1, x29, 184
ldrb w0, [x1, x0]
mov w1, w0
ldr w0, [x29, 124]
add w1, w1, w0
ldr w0, [x29, 128]
ldr w2, [x29, 144]
sdiv w3, w0, w2
ldr w2, [x29, 144]
mul w2, w3, w2
sub w0, w0, w2
sxtw x0, w0
add x2, x29, 168
ldrb w0, [x2, x0]
add w0, w1, w0
negs w1, w0
and w0, w0, 255
and w1, w1, 255
csneg w0, w0, w1, mi
str w0, [x29, 124]
ldrsw x0, [x29, 128]
add x1, x29, 184
ldrb w0, [x1, x0]
strb w0, [x29, 119]
ldrsw x0, [x29, 124]
add x1, x29, 184
ldrb w2, [x1, x0]
ldrsw x0, [x29, 128]
add x1, x29, 184
strb w2, [x1, x0]
ldrsw x0, [x29, 124]
add x1, x29, 184
ldrb w2, [x29, 119]
strb w2, [x1, x0]
ldr w0, [x29, 128]
add w0, w0, 1
str w0, [x29, 128]
.L18:
ldr w0, [x29, 128]
cmp w0, 255
ble .L19
ldr w0, [x29, 148]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 152]
sxtw x1, w0
mov x26, x1
mov x27, 0
lsr x1, x26, 61
lsl x23, x27, 3
orr x23, x1, x23
lsl x22, x26, 3
sxtw x1, w0
mov x24, x1
mov x25, 0
lsr x1, x24, 61
lsl x21, x25, 3
orr x21, x1, x21
lsl x20, x24, 3
sxtw x0, w0
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L20:
cmp sp, x1
beq .L21
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L20
.L21:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L22
str xzr, [sp, 1024]
.L22:
add x0, sp, 16
add x0, x0, 0
str x0, [x29, 160]
str wzr, [x29, 132]
str wzr, [x29, 136]
str wzr, [x29, 140]
b .L23
.L24:
ldr w0, [x29, 132]
add w0, w0, 1
negs w1, w0
and w0, w0, 255
and w1, w1, 255
csneg w0, w0, w1, mi
str w0, [x29, 132]
ldrsw x0, [x29, 132]
add x1, x29, 184
ldrb w0, [x1, x0]
mov w1, w0
ldr w0, [x29, 136]
add w0, w1, w0
negs w1, w0
and w0, w0, 255
and w1, w1, 255
csneg w0, w0, w1, mi
str w0, [x29, 136]
ldrsw x0, [x29, 132]
add x1, x29, 184
ldrb w0, [x1, x0]
strb w0, [x29, 117]
ldrsw x0, [x29, 136]
add x1, x29, 184
ldrb w2, [x1, x0]
ldrsw x0, [x29, 132]
add x1, x29, 184
strb w2, [x1, x0]
ldrsw x0, [x29, 136]
add x1, x29, 184
ldrb w2, [x29, 117]
strb w2, [x1, x0]
ldrsw x0, [x29, 132]
add x1, x29, 184
ldrb w1, [x1, x0]
ldrsw x0, [x29, 136]
add x2, x29, 184
ldrb w0, [x2, x0]
add w0, w1, w0
and w0, w0, 255
sxtw x0, w0
add x1, x29, 184
ldrb w0, [x1, x0]
strb w0, [x29, 118]
ldrsw x0, [x29, 140]
ldr x1, [x29, 104]
add x0, x1, x0
ldrb w1, [x0]
ldrb w0, [x29, 118]
eor w0, w1, w0
and w2, w0, 255
ldr x1, [x29, 160]
ldrsw x0, [x29, 140]
strb w2, [x1, x0]
ldr w0, [x29, 140]
add w0, w0, 1
str w0, [x29, 140]
.L23:
ldr w1, [x29, 140]
ldr w0, [x29, 148]
cmp w1, w0
blt .L24
ldr x2, [x29, 96]
ldr w1, [x29, 148]
ldr x0, [x29, 160]
bl Transform
mov sp, x19
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0]
ldr x2, [x29, 440]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L25
bl __stack_chk_fail
.L25:
mov sp, x29
ldp x19, x20, [sp, 16]
ldp x21, x22, [sp, 32]
ldp x23, x24, [sp, 48]
ldp x25, x26, [sp, 64]
ldr x27, [sp, 80]
ldp x29, x30, [sp], 448
.cfi_restore 30
.cfi_restore 29
.cfi_restore 27
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE7:
.size encrypt, .-encrypt
.section .rodata
.align 3
.LC0:
.string "Ciphertext : %s\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -304]!
.cfi_def_cfa_offset 304
.cfi_offset 29, -304
.cfi_offset 30, -296
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0]
ldr x1, [x0]
str x1, [sp, 296]
mov x1, 0
ldr w0, [sp, 28]
cmp w0, 1
bgt .L27
mov w0, 1
b .L29
.L27:
ldr x0, [sp, 16]
ldr x0, [x0, 8]
str x0, [sp, 32]
add x0, sp, 40
mov x1, x0
ldr x0, [sp, 32]
bl encrypt
add x0, sp, 40
mov x1, x0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
mov w0, 0
.L29:
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0]
ldr x3, [sp, 296]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L30
bl __stack_chk_fail
.L30:
mov w0, w1
ldp x29, x30, [sp], 304
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size main, .-main
.ident "GCC: (Ubuntu 11.4.0-1ubuntu1~22.04) 11.4.0"
.section .note.GNU-stack,"",@progbits
|
taidamai/Highmance
| 1,854
|
examples/a.s
|
.file "a.c"
.text
.globl amazing_func
.def amazing_func; .scl 2; .type 32; .endef
.seh_proc amazing_func
amazing_func:
pushq %rbp
.seh_pushreg %rbp
movq %rsp, %rbp
.seh_setframe %rbp, 0
subq $16, %rsp
.seh_stackalloc 16
.seh_endprologue
movl %ecx, 16(%rbp)
movl 16(%rbp), %eax
movl %eax, -4(%rbp)
movl -4(%rbp), %edx
movl %edx, %eax
sall $2, %eax
addl %edx, %eax
sall $2, %eax
movl %eax, -4(%rbp)
movl -4(%rbp), %ecx
movl $1717986919, %edx
movl %ecx, %eax
imull %edx
sarl $3, %edx
movl %ecx, %eax
sarl $31, %eax
subl %eax, %edx
movl %edx, %eax
movl %eax, -4(%rbp)
movl $1, %eax
subl -4(%rbp), %eax
movl %eax, -4(%rbp)
movl $1, %eax
subl -4(%rbp), %eax
movl %eax, -4(%rbp)
movl -4(%rbp), %eax
addq $16, %rsp
popq %rbp
ret
.seh_endproc
.globl fib
.def fib; .scl 2; .type 32; .endef
.seh_proc fib
fib:
pushq %rbp
.seh_pushreg %rbp
pushq %rbx
.seh_pushreg %rbx
subq $40, %rsp
.seh_stackalloc 40
leaq 128(%rsp), %rbp
.seh_setframe %rbp, 128
.seh_endprologue
movl %ecx, -64(%rbp)
movl -64(%rbp), %ecx
call amazing_func
movl %eax, -64(%rbp)
cmpl $1, -64(%rbp)
jg .L4
movl -64(%rbp), %eax
jmp .L5
.L4:
movl -64(%rbp), %eax
subl $1, %eax
movl %eax, %ecx
call fib
movl %eax, %ebx
movl -64(%rbp), %eax
subl $2, %eax
movl %eax, %ecx
call fib
addl %ebx, %eax
.L5:
addq $40, %rsp
popq %rbx
popq %rbp
ret
.seh_endproc
.def __main; .scl 2; .type 32; .endef
.globl main
.def main; .scl 2; .type 32; .endef
.seh_proc main
main:
pushq %rbp
.seh_pushreg %rbp
movq %rsp, %rbp
.seh_setframe %rbp, 0
subq $64, %rsp
.seh_stackalloc 64
.seh_endprologue
call __main
movl $10, -12(%rbp)
movl -12(%rbp), %eax
movl %eax, %ecx
call fib
movl %eax, -4(%rbp)
movl $0, %eax
addq $64, %rsp
popq %rbp
ret
.seh_endproc
.ident "GCC: (x86_64-posix-seh-rev0, Built by MinGW-W64 project) 8.1.0"
|
tatetian/atc25-artifact-evaluation
| 2,603
|
test/apps/fork/fork.S
|
# SPDX-License-Identifier: MPL-2.0
# FIXME: WNOHANG option currently does not work properly without preemption, so we have temporarily
# removed it. Once preemption is supported, the following macro can be uncommented to add the WNOHANG
# option back.
# #define PREEMPTION_ENABLE
.global _start
.section .text
_start:
call print_hello_world
mov $57, %rax # syscall number of fork
syscall
cmp $0, %rax
je _child # child process
jmp _parent # parent process
_parent:
call wait_child
call get_pid
call print_parent_message
call exit
_child:
call get_pid
call print_child_message
call exit
wait_child:
mov %rax, %rdi # child process id
#ifdef PREEMPTION_ENABLE
_loop:
mov $61, %rax # syscall number of wait4
mov $0, %rsi # exit status address
mov $1, %rdx # wait option: WNOHANG
syscall
cmp %rdi, %rax # The return value is the pid of child
jne _loop
ret
#else
mov $61, %rax # syscall number of wait4
mov $0, %rsi # exit status address
mov $0, %rdx # wait option
syscall
ret
#endif
exit:
mov $60, %rax # syscall number of exit
mov $0, %rdi # exit code
syscall
get_pid:
mov $39, %rax
syscall
ret
print_hello_world:
mov $message, %rsi # address of message
mov $message_end, %rdx
sub %rsi, %rdx # calculate message len
jmp _print_message
print_parent_message:
mov $message_parent, %rsi # address of message
mov $message_parent_end, %rdx
sub %rsi, %rdx # calculate message len
jmp _print_message
print_child_message:
mov $message_child, %rsi # address of message
mov $message_child_end, %rdx
sub %rsi, %rdx # calculate message len
jmp _print_message
# never directly call _print_message
_print_message:
mov $1, %rax # syscall number of write
mov $1, %rdi # stdout
syscall
ret
.section .rodata
message:
.ascii "Hello, world in fork\n"
message_end:
message_parent:
.ascii "Hello world from parent\n"
message_parent_end:
message_child:
.ascii "Hello world from child\n"
message_child_end:
|
tatetian/atc25-artifact-evaluation
| 2,554
|
ostd/libs/linux-bzimage/setup/src/x86/header.S
|
/* SPDX-License-Identifier: MPL-2.0 */
// The compatibility file for the Linux x86 Boot Protocol.
// See https://www.kernel.org/doc/html/v5.6/x86/boot.html for
// more information on the Linux x86 Boot Protocol.
// The bootloader may fill some fields at runtime, which can
// be read by the kernel (via `boot_params.hdr`).
.section ".header", "a"
CODE32_START = 0x100000
# Real-mode setup sectors. We don't use them. Their size is set to one page.
SETUP_SECTS = 7
SETUP_SECTS_SIZE = 0x200 * (SETUP_SECTS + 1)
.org 0x01f1
hdr_start:
setup_sects: .byte SETUP_SECTS
root_flags: .word 1
syssize: .long 0
ram_size: .word 0
vid_mode: .word 0xfffd
root_dev: .word 0
boot_flag: .word 0xAA55
jump: .byte 0xeb
jump_addr: .byte hdr_end - jump_addr
magic: .ascii "HdrS"
.word 0x020f
realmode_swtch: .word 0, 0
start_sys_seg: .word 0
.word 0
type_of_loader: .byte 0
loadflags: .byte (1 << 0) # LOADED_HIGH
setup_move_size: .word 0
code32_start: .long CODE32_START
ramdisk_image: .long 0
ramdisk_size: .long 0
bootsect_kludge: .long 0
heap_end_ptr: .word 65535
ext_loader_ver: .byte 0
ext_loader_type: .byte 0
cmd_line_ptr: .long 0
initrd_addr_max: .long 0x7fffffff
kernel_alignment: .long 0x1000000
relocatable_kernel: .byte 0
min_alignment: .byte 0x10
.if {CFG_TARGET_ARCH_X86_64}
# Note that we don't actually support the legacy 64-bit entry point
# (XLF_KERNEL_64). But we have to specify it, otherwise the boot loader
# will think this kernel does not have 64-bit support.
xloadflags: .word 0b01011 # Bit 0: XLF_KERNEL_64
# Bit 1: XLF_CAN_BE_LOADED_ABOVE_4G
# Bit 3: XLF_EFI_HANDOVER_64
.else
xloadflags: .word 0
.endif
cmdline_size: .long 4096 - 1
hardware_subarch: .long 0
hardware_subarch_data: .quad 0
payload_offset: .long 0 # Not used.
payload_length: .long 0 # Not used.
setup_data: .quad 0
pref_address: .quad CODE32_START
init_size: .long __executable_size
.if {CFG_TARGET_ARCH_X86_64}
handover_offset: .long (entry_efi_handover32 - entry_legacy32)
.else
handover_offset: .long 0
.endif
kernel_info_offset: .long 0
hdr_end:
|
tatetian/atc25-artifact-evaluation
| 3,171
|
ostd/libs/linux-bzimage/setup/src/x86/amd64_efi/setup.S
|
/* SPDX-License-Identifier: MPL-2.0 */
// The load address of the setup section is CODE32_START (0x100000).
// See the linker script.
.section ".setup", "ax"
CODE32_START = 0x100000
.code32
.global entry_legacy32
entry_legacy32:
// This is the 32-bit Linux legacy entry point.
// Not supported. However, there doesn't seem to be a way to disable this
// entry point in the header, so provide a dummy implementation here.
hlt
jmp entry_legacy32
.global entry_efi_handover32
entry_efi_handover32:
// This is the 32-bit EFI handover entry point.
// Not supported. This entry point is not enabled in the header, so it
// should not be reachable. We declare the entry point anyway, because
// its offset is needed in the header. We provide a dummy implementation
// just in case.
jmp entry_legacy32
// The 64-bit Linux legacy entry point must be 0x200 bytes after the 32-bit
// one. This is required by the x86 Linux boot protocol.
.skip 0x200 - (. - entry_legacy32)
.code64
entry_legacy64:
// This is the 64-bit Linux legacy entry point.
// Not supported. We need to enable this entry point in the header,
// otherwise the boot loader will think the kernel does not support
// 64-bit.
jmp halt
// The 64-bit EFI handover entry point must be 0x200 bytes after the 32-bit
// one. This is required by the x86 Linux boot protocol.
.skip 0x200 - (. - entry_efi_handover32)
entry_efi_handover64:
// This is the 64-bit EFI handover entry point.
//
// Arguments:
// RDI: void *handle
// RSI: efi_system_table_t *table
// RDX: struct boot_params *bp
jmp efi_common64
.global entry_efi_pe64
entry_efi_pe64:
// This is the 64-bit EFI PE/COFF entry point.
//
// Arguments:
// RCX: void *handle
// RDX: efi_system_table_t *table
mov rdi, rcx
mov rsi, rdx
xor rdx, rdx
jmp efi_common64
efi_common64:
// We can reuse the stack provided by the UEFI firmware until a short time
// after exiting the UEFI boot services. So we don't build our own stack.
//
// But the stack must be 16-byte aligned! So we drop the return address.
add rsp, 8
// Compute the load offset.
lea rcx, [rip + entry_legacy32]
sub rcx, CODE32_START
// Do relocations.
lea rax, [rip + __rela_start]
lea rbx, [rip + __rela_end]
cmp rax, rbx
jae reloc_done
reloc_iter:
// We check the type in the builder, so we should not see an unexpected
// type at runtime. Otherwise, we just stop here.
mov r8d, [rax + 8] // Elf64_Rela::r_type
cmp r8d, 8 // R_X86_64_RELATIVE
jne halt
mov r9, [rax + 16] // Elf64_Rela::r_addend
add r9, rcx
mov r8, [rax] // Elf64_Rela::r_offset
mov [r8 + rcx], r9 // *(r_offset + load_offset) = r_addend + load_offset
add rax, 24 // sizeof(Elf64_Rela)
cmp rax, rbx
jb reloc_iter
reloc_done:
// Call the Rust main routine.
call main_efi_common64
// The main routine should not return. If it does, there is nothing we can
// do but stop the machine.
jmp halt
halt:
hlt
jmp halt
|
tatetian/atc25-artifact-evaluation
| 1,684
|
ostd/libs/linux-bzimage/setup/src/x86/legacy_i386/setup.S
|
/* SPDX-License-Identifier: MPL-2.0 */
// The load address of the setup section is CODE32_START (0x100000).
// See the linker script.
.section ".setup", "ax"
.code32
.global entry_legacy32
entry_legacy32:
// This is the 32-bit Linux legacy entry point.
//
// Arguments:
// RSI: struct boot_params *bp
// We don't do reloactions, so let's make sure we're at the right address.
// Otherwise, we'd better stop here.
lea esp, [esi + 0x1e8] // scratch: u32 (offset 0x1e4)
call load_address
load_address:
pop eax
cmp eax, offset load_address
jne halt
// Set up the stack.
mov esp, offset __stack_top
// Load the GDT.
push 8 // 32-bit code
mov eax, offset gdt_loaded
push eax
lgdt [gdtr]
retf
gdt_loaded:
mov ax, 16 // 32-bit data
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
// Call the Rust main routine.
push esi
call main_legacy32
// The main routine should not return. If it does, there is nothing we can
// do but stop the machine.
jmp halt
// All other types of entry points are not enabled in the header.
// So we don't care about them.
halt:
hlt
jmp halt
// GDT. We define GDT ourselves to ensure that the GDT page will not be
// accidentally overwritten by the allocated memory.
.rodata
.align 16
gdtr:
.word gdt_end - gdt - 1
.long gdt
.align 16
gdt:
.quad 0x0000000000000000 // 0: null descriptor
.quad 0x00cf9a000000ffff // 8: 32-bit code segment
.quad 0x00cf92000000ffff // 16: 32-bit data segment
gdt_end:
// A small stack for the setup code.
.bss
.align 8
__stack_bottom:
.space 0x1000
__stack_top:
|
tatetian/atc25-artifact-evaluation
| 5,411
|
ostd/src/arch/x86/boot/ap_boot.S
|
/* SPDX-License-Identifier: MPL-2.0 */
// The boot routine executed by the application processor.
.global ap_boot_from_real_mode
.global ap_boot_from_long_mode
.section ".ap_boot", "awx"
.align 4096
IA32_APIC_BASE_MSR = 0x1B
IA32_X2APIC_APICID_MSR = 0x802
IA32_EFER_MSR = 0xC0000080
XAPIC_APICID_MMIO_ADDR = 0xFEE00020
.macro setup_64bit_gdt_and_page_table eax
// Use the 64-bit GDT.
.extern boot_gdtr
lgdt [boot_gdtr]
// Set the NX bit support in the EFER MSR.
mov ecx, IA32_EFER_MSR
rdmsr
or eax, 1 << 11 // support no-execute PTE flag
wrmsr
// Enable PAE and PGE.
mov \eax, cr4
or \eax, 0xa0
mov cr4, \eax
// Set the page table. The application processors use
// the same page table as the bootstrap processor's
// boot phase page table.
xor \eax, \eax // clear the upper 32 bits if \eax is 64-bit
mov eax, __boot_page_table_pointer // 32-bit load
mov cr3, \eax
.endm
.code16
ap_boot_from_real_mode:
cli // disable interrupts
cld
jmp ap_real_mode
.code64
ap_boot_from_long_mode:
cli // disable interrupts
cld
// The firmware stores the local APIC ID in R8D, see:
// <https://github.com/tianocore/edk2/blob/14b730cde8bfd56bba10cf78b24338b6a59b989f/OvmfPkg/TdxDxe/X64/ApRunLoop.nasm#L67-L73>.
// FIXME: This is an implementation detail of the specific firmware. We
// should NOT rely on it. We should NOT even try to rely on the local APIC
// ID, because the APIC IDs on real hardware may NOT be contiguous (i.e.,
// there may be holes where the holes do not represent logical processors).
// We should compute the CPU ID ourselves using atomic operations.
mov edi, r8d
setup_64bit_gdt_and_page_table rax
// Some firmware seems to provide per-AP stacks that we can use. However,
// the ACPI specification does not promise that the stack is usable. It is
// better not to rely on such implementation details.
lea rsp, [rip + retf_stack_bottom]
retf // 32-bit far return
.align 8
retf_stack_bottom:
.long ap_long_mode_in_low_address
.long 0x8
retf_stack_top:
.code16
ap_real_mode:
xor ax, ax // clear ax
mov ds, ax // clear ds
lgdt [ap_gdtr] // load gdt
mov eax, cr0
or eax, 1
mov cr0, eax // enable protected mode
ljmp 0x8, offset ap_protect_entry
// 32-bit AP GDT.
.align 16
ap_gdt:
.quad 0x0000000000000000
ap_gdt_code:
.quad 0x00cf9a000000ffff
ap_gdt_data:
.quad 0x00cf92000000ffff
ap_gdt_end:
.align 16
ap_gdtr:
.word ap_gdt_end - ap_gdt - 1
.quad ap_gdt
.align 4
.code32
ap_protect_entry:
mov ax, 0x10
mov ds, ax
mov ss, ax
// Get the local APIC ID from xAPIC or x2APIC.
// It is better to get this information in protected mode.
// After entering long mode, we need to set additional page
// table mapping for xAPIC mode mmio region.
// Tell if it is xAPIC or x2APIC.
// IA32_APIC_BASE register:
// - bit 8: BSP—Processor is BSP
// - bit 10: EXTD—Enable x2APIC mode
// - bit 11: EN—xAPIC global enable/disable
// - bit 12-35: APIC Base—Base physical address
mov ecx, IA32_APIC_BASE_MSR
rdmsr
and eax, 0x400 // check EXTD bit
cmp eax, 0x400
je x2apic_mode
xapic_mode:
// In xAPIC mode, the local APIC ID is stored in
// the MMIO region.
mov eax, [XAPIC_APICID_MMIO_ADDR]
shr eax, 24
jmp ap_protect
x2apic_mode:
// In x2APIC mode, the local APIC ID is stored in
// IA32_X2APIC_APICID MSR.
mov ecx, IA32_X2APIC_APICID_MSR
rdmsr
jmp ap_protect
// This is a pointer to the page table used by the APs.
// The BSP will fill this pointer before kicking the APs.
.global __boot_page_table_pointer
.align 4
__boot_page_table_pointer:
.skip 4
ap_protect:
// Save the local APIC ID in an unused register.
// We will calculate the stack pointer of this core
// by taking the local apic id as the offset.
mov edi, eax
// Now we try getting into long mode.
setup_64bit_gdt_and_page_table eax
// Enable long mode.
mov ecx, IA32_EFER_MSR
rdmsr
or eax, 1 << 8
wrmsr
// Enable paging.
mov eax, cr0
or eax, 1 << 31
mov cr0, eax
ljmp 0x8, offset ap_long_mode_in_low_address
.code64
ap_long_mode_in_low_address:
mov ax, 0
mov ds, ax
mov ss, ax
mov es, ax
mov fs, ax
mov gs, ax
// Update RIP to use the virtual address.
mov rax, offset ap_long_mode
jmp rax
.data
// This is a pointer to be filled by the BSP when boot information
// of all APs are allocated and initialized.
.global __ap_boot_info_array_pointer
.align 8
__ap_boot_info_array_pointer:
.skip 8
.text
.code64
ap_long_mode:
// The local APIC ID is in the RDI.
mov rax, rdi
shl rax, 4 // 16-byte `PerApRawInfo`
mov rbx, [rip + __ap_boot_info_array_pointer]
// Setup the stack.
mov rsp, [rbx + rax - 16] // raw_info[cpu_id - 1].stack_top
// Setup the GS base (the CPU-local address).
mov rax, [rbx + rax - 8] // raw_info[cpu_id - 1].cpu_local
mov rdx, rax
shr rdx, 32 // EDX:EAX = raw_info.cpu_local
mov ecx, 0xC0000101 // ECX = GS.base
wrmsr
// Go to Rust code.
.extern ap_early_entry
xor rbp, rbp
mov rax, offset ap_early_entry
call rax
.extern halt # bsp_boot.S
jmp halt
|
tatetian/atc25-artifact-evaluation
| 9,694
|
ostd/src/arch/x86/boot/bsp_boot.S
|
/* SPDX-License-Identifier: MPL-2.0 */
// The boot routine executed by the bootstrap processor.
// The boot header, initial boot setup code, temporary GDT and page tables are
// in the boot section. The boot section is mapped writable since kernel may
// modify the initial page table.
.section ".bsp_boot", "awx"
.code32
// With every entry types we could go through common paging or machine
// state setup routines. Thus we make a mark of protocol used in each entrypoint
// on the stack.
ENTRYTYPE_MULTIBOOT = 1
ENTRYTYPE_MULTIBOOT2 = 2
ENTRYTYPE_LINUX_32 = 3
ENTRYTYPE_LINUX_64 = 4
MULTIBOOT_ENTRY_MAGIC = 0x2BADB002
MULTIBOOT2_ENTRY_MAGIC = 0x36D76289
KERNEL_VMA = 0xffffffff80000000
// The Linux 32-bit Boot Protocol entry point.
// Must be located at 0x8001000, ABI immutable!
.code32
.org 0x000
.global __linux32_boot
__linux32_boot:
cli
cld
// Set the kernel call stack.
mov esp, offset boot_stack_top
push 0 // upper 32-bits
push esi // boot_params ptr
push 0 // upper 32-bits
push ENTRYTYPE_LINUX_32
jmp initial_boot_setup
// The Linux 64-bit Boot Protocol entry point.
// Must be located at 0x8001200, ABI immutable!
.code64
.org 0x200
.global __linux64_boot
__linux64_boot:
cli
cld
// Set the kernel call stack.
lea rsp, [rip + boot_stack_top]
push rsi // boot_params ptr from the loader
push ENTRYTYPE_LINUX_64
// Set up the page table and load it.
call page_table_setup_64
lea rdx, [rip + boot_l4pt]
mov cr3, rdx
// Prepare far return. The default operation size of
// far returns is 32 bits even in long mode.
lea edx, [rip + long_mode_in_low_address]
mov rax, (8 << 32)
or rdx, rax
push rdx
// Switch to our own temporary GDT.
lgdt [boot_gdtr]
retf
// The multiboot & multiboot2 entry point.
.code32
.global __multiboot_boot
__multiboot_boot:
cli
cld
// Set the kernel call stack.
mov esp, offset boot_stack_top
push 0 // Upper 32-bits.
push eax // multiboot magic ptr
push 0 // Upper 32-bits.
push ebx // multiboot info ptr
// Tell the entry type from eax
cmp eax, MULTIBOOT_ENTRY_MAGIC
je magic_is_mb
cmp eax, MULTIBOOT2_ENTRY_MAGIC
je magic_is_mb2
jmp halt // Should not be reachable!
magic_is_mb:
push 0 // Upper 32-bits.
push ENTRYTYPE_MULTIBOOT
jmp initial_boot_setup
magic_is_mb2:
push 0 // Upper 32-bits.
push ENTRYTYPE_MULTIBOOT2
jmp initial_boot_setup
initial_boot_setup:
// Prepare for far return. We use a far return as a fence after setting GDT.
push 24
lea edx, [protected_mode]
push edx
// Switch to our own temporary GDT.
lgdt [boot_gdtr]
retf
protected_mode:
mov ax, 16
mov ds, ax
mov ss, ax
mov es, ax
mov fs, ax
mov gs, ax
// Set up the page table.
call page_table_setup_32
// Enable PAE and PGE.
mov eax, cr4
or eax, 0xa0
mov cr4, eax
// Set the page table address.
lea eax, [boot_l4pt]
mov cr3, eax
// Enable long mode.
mov ecx, 0xc0000080
rdmsr
or eax, 0x0100
wrmsr
// Prepare for far return.
push 8
lea edx, [long_mode_in_low_address]
push edx
// Enable paging.
mov eax, cr0
or eax, 0x80000000
mov cr0, eax
retf
.macro define_page_table_setup bits
.code\bits
page_table_setup_\bits:
// Zero out the page table.
mov al, 0x00
lea edi, [boot_page_table_start]
lea ecx, [boot_page_table_end]
sub ecx, edi
rep stosb
// PTE flags used in this file.
PTE_PRESENT = (1)
PTE_WRITE = (1 << 1)
PTE_HUGE = (1 << 7)
PTE_GLOBAL = (1 << 8)
// L4PT: 0x00000000_00000000 ~ 0x00000000_3fffffff
// 0x00000000_40000000 ~ 0x00000000_7fffffff
// 0x00000000_80000000 ~ 0x00000000_bfffffff
// 0x00000000_c0000000 ~ 0x00000000_ffffffff
lea edi, [boot_l4pt]
lea eax, [boot_l3pt_linear_id + (PTE_PRESENT | PTE_WRITE)]
mov dword ptr [edi], eax
mov dword ptr [edi + 4], 0
// L4PT: 0xffff8000_00000000 ~ 0xffff8000_3fffffff
// 0xffff8000_40000000 ~ 0xffff8000_7fffffff
// 0xffff8000_80000000 ~ 0xffff8000_bfffffff
// 0xffff8000_c0000000 ~ 0xffff8000_ffffffff
lea edi, [boot_l4pt + 0x100 * 8]
lea eax, [boot_l3pt_linear_id + (PTE_PRESENT | PTE_WRITE)]
mov dword ptr [edi], eax
mov dword ptr [edi + 4], 0
// L4PT: 0xffffffff_80000000 ~ 0xffffffff_bfffffff
// 0xffffffff_c0000000 ~ 0xffffffff_ffffffff
lea edi, [boot_l4pt + 0x1ff * 8]
lea eax, [boot_l3pt_kernel + (PTE_PRESENT | PTE_WRITE)]
mov dword ptr [edi], eax
mov dword ptr [edi + 4], 0
// L3PT: 0x00000000_00000000 ~ 0x00000000_3fffffff
lea edi, [boot_l3pt_linear_id]
lea eax, [boot_l2pt_0g_1g + (PTE_PRESENT | PTE_WRITE | PTE_GLOBAL)]
mov dword ptr [edi], eax
mov dword ptr [edi + 4], 0
// L3PT: 0x00000000_40000000 ~ 0x00000000_7fffffff
lea edi, [boot_l3pt_linear_id + 0x1 * 8]
lea eax, [boot_l2pt_1g_2g + (PTE_PRESENT | PTE_WRITE | PTE_GLOBAL)]
mov dword ptr [edi], eax
mov dword ptr [edi + 4], 0
// L3PT: 0x00000000_80000000 ~ 0x00000000_bfffffff
lea edi, [boot_l3pt_linear_id + 0x2 * 8]
lea eax, [boot_l2pt_2g_3g + (PTE_PRESENT | PTE_WRITE | PTE_GLOBAL)]
mov dword ptr [edi], eax
mov dword ptr [edi + 4], 0
// L3PT: 0x00000000_c0000000 ~ 0x00000000_ffffffff
lea edi, [boot_l3pt_linear_id + 0x3 * 8]
lea eax, [boot_l2pt_3g_4g + (PTE_PRESENT | PTE_WRITE | PTE_GLOBAL)]
mov dword ptr [edi], eax
mov dword ptr [edi + 4], 0
// L3PT: 0xffffffff_80000000 ~ 0xffffffff_bfffffff
lea edi, [boot_l3pt_kernel + 0x1fe * 8]
lea eax, [boot_l2pt_0g_1g + (PTE_PRESENT | PTE_WRITE | PTE_GLOBAL)]
mov dword ptr [edi], eax
mov dword ptr [edi + 4], 0
// L3PT: 0xffffffff_c0000000 ~ 0xffffffff_ffffffff
lea edi, [boot_l3pt_kernel + 0x1ff * 8]
lea eax, [boot_l2pt_1g_2g + (PTE_PRESENT | PTE_WRITE | PTE_GLOBAL)]
mov dword ptr [edi], eax
mov dword ptr [edi + 4], 0
// L2PT: map to low 1 GiB * 4 space
lea edi, [boot_l2pt]
mov eax, PTE_PRESENT | PTE_WRITE | PTE_GLOBAL | PTE_HUGE
mov ecx, 512 * 4 // (of entries in PD) * (number of PD)
write_l2pt_entry_\bits:
mov dword ptr [edi], eax
mov dword ptr [edi + 4], 0
add eax, 0x200000 // +2MiB
add edi, 8
loop write_l2pt_entry_\bits
ret
.endm
define_page_table_setup 32
define_page_table_setup 64
// Temporary GDTR/GDT entries. This must be located in the .boot section as its
// address (gdt) must be physical to load.
.align 16
.global boot_gdtr
boot_gdtr:
.word gdt_end - gdt - 1
.quad gdt
.align 16
gdt:
.quad 0 // 0: null descriptor
.quad {KCODE64} // 8: code segment (kernel, 64-bit)
.quad {KDATA} // 16: data segment (kernel)
.quad {KCODE32} // 24: code segment (kernel, 32-bit)
gdt_end:
// The page tables and the stack
.align 4096
.global boot_page_table_start
boot_page_table_start:
boot_l4pt:
.skip 4096
// This L3PT is used for both identity mapping and linear mapping. Four lower
// entries point to `boot_l2pt`s so that it maps to low 4G physical memory.
boot_l3pt_linear_id:
.skip 4096
// This L3PT is used for kernel mapping, which is at highest 2G space. Two
// higher entries point to `boot_l2pt`s so it maps to low 2G physical memory.
boot_l3pt_kernel:
.skip 4096
// These L2PTs are used for identity mapping, linear mapping and kernel mapping.
// They map to low 4G physical memory in 2MB huge pages.
boot_l2pt:
boot_l2pt_0g_1g:
.skip 4096
boot_l2pt_1g_2g:
.skip 4096
boot_l2pt_2g_3g:
.skip 4096
boot_l2pt_3g_4g:
.skip 4096
boot_page_table_end:
.global boot_stack_top
boot_stack_bottom:
.skip 0x40000
boot_stack_top:
.code64
long_mode_in_low_address:
mov ax, 0
mov ds, ax
mov ss, ax
mov es, ax
mov fs, ax
mov gs, ax
// Update RSP/RIP to use the virtual address.
mov rbx, KERNEL_VMA
or rsp, rbx
mov rax, offset long_mode
jmp rax
// From here, we're in the .text section: we no longer use physical address.
.text
.code64
long_mode:
// Clear .bss section.
mov al, 0x00
lea rdi, [rip + __bss]
lea rcx, [rip + __bss_end]
sub rcx, rdi
rep stosb
// Clear RBP to stop the backtrace.
xor rbp, rbp
// Initialize the GS base to the CPU-local start address.
.extern __cpu_local_start
lea rax, [rip + __cpu_local_start]
mov rdx, rax
shr rdx, 32 // EDX:EAX = __cpu_local_start
mov ecx, 0xC0000101 // ECX = GS.base
wrmsr
// Call the corresponding Rust entrypoint according to the boot entrypoint.
pop rax
cmp rax, ENTRYTYPE_MULTIBOOT
je entry_type_multiboot
cmp rax, ENTRYTYPE_MULTIBOOT2
je entry_type_multiboot2
cmp rax, ENTRYTYPE_LINUX_32
je entry_type_linux
cmp rax, ENTRYTYPE_LINUX_64
je entry_type_linux
// Unreachable!
jmp halt
.extern __linux_boot
.extern __multiboot_entry
.extern __multiboot2_entry
entry_type_linux:
pop rdi // boot_params ptr
lea rax, [rip + __linux_boot] // jump into Rust code
call rax
jmp halt
entry_type_multiboot:
pop rsi // the address of multiboot info
pop rdi // multiboot magic
lea rax, [rip + __multiboot_entry] // jump into Rust code
call rax
jmp halt
entry_type_multiboot2:
pop rsi // the address of multiboot info
pop rdi // multiboot magic
lea rax, [rip + __multiboot2_entry] // jump into Rust code
call rax
jmp halt
halt:
cli
hlt
jmp halt
|
tatetian/atc25-artifact-evaluation
| 3,012
|
ostd/src/arch/x86/trap/trap.S
|
/* SPDX-License-Identifier: MPL-2.0 OR MIT
*
* The original source code is from [trapframe-rs](https://github.com/rcore-os/trapframe-rs),
* which is released under the following license:
*
* SPDX-License-Identifier: MIT
*
* Copyright (c) 2020 - 2024 Runji Wang
*
* We make the following new changes:
* * Add the `trap_handler_table`.
*
* These changes are released under the following license:
*
* SPDX-License-Identifier: MPL-2.0
*/
.code64
.equ NUM_INT, 256
.altmacro
.macro DEF_HANDLER, i
.Ltrap_handler_\i:
.if \i == 8 || (\i >= 10 && \i <= 14) || \i == 17
# error code pushed by CPU
push \i # interrupt vector
jmp trap_common
.else
push 0 # fill in error code in TrapFrame
push \i # interrupt vector
jmp trap_common
.endif
.endm
.section .text
_trap_handlers:
.set i, 0
.rept NUM_INT
DEF_HANDLER %i
.set i, i + 1
.endr
.macro DEF_TABLE_ENTRY, i
.quad .Ltrap_handler_\i
.endm
.section .rodata
.global trap_handler_table
trap_handler_table:
.set i, 0
.rept NUM_INT
DEF_TABLE_ENTRY %i
.set i, i + 1
.endr
.section .text
.global trap_common
trap_common:
cld # clear DF before calling/returning to any C function to conform to x86-64 calling convention
push rax
mov ax, [rsp + 4*8] # load cs
and ax, 0x3 # test
jz __from_kernel # continue trap
__from_user:
/*
kernel stack:
- ptr to UserContext
- ss
- rsp
- rflags
- cs
- rip
- error code
- trap num
- rax
*/
swapgs # swap in kernel gs
mov rax, [rsp + 6*8] # rax = user rsp
mov gs:12, rax # store user rsp -> scratch at TSS.sp1
mov rsp, [rsp + 8*8] # load rsp <- UserContext
add rsp, 22*8 # rsp -> top of UserContext
mov rax, gs:4 # rax = kernel stack
# push trap_num, error_code
push [rax - 6*8] # push error_code
push [rax - 7*8] # push trap_num
sub rsp, 16 # skip fsbase, gsbase
# push general registers
push [rax - 3*8] # push rflags
push [rax - 5*8] # push rip
mov rax, [rax - 8*8] # pop rax
jmp trap_syscall_entry
__from_kernel:
/*
kernel stack:
- rflags
- cs
- rip
- error code
- trap num
- rax
*/
pop rax
push 0
push r15
push r14
push r13
push r12
push r11
push r10
push r9
push r8
lea r8, [rsp + 13*8]
push r8 # push rsp
push rbp
push rdi
push rsi
push rdx
push rcx
push rbx
push rax
mov rdi, rsp
call trap_handler
.global trap_return
trap_return:
pop rax
pop rbx
pop rcx
pop rdx
pop rsi
pop rdi
pop rbp
pop r8 # skip rsp
pop r8
pop r9
pop r10
pop r11
pop r12
pop r13
pop r14
pop r15
# skip padding, trap_num, error_code
add rsp, 24
iretq
|
tatetian/atc25-artifact-evaluation
| 2,967
|
ostd/src/arch/x86/trap/syscall.S
|
/* SPDX-License-Identifier: MPL-2.0 OR MIT
*
* The original source code is from [trapframe-rs](https://github.com/rcore-os/trapframe-rs),
* which is released under the following license:
*
* SPDX-License-Identifier: MIT
*
* Copyright (c) 2020 - 2024 Runji Wang
*
* We make the following new changes:
* * Skip saving/restoring the fsgsbase registers.
*
* These changes are released under the following license:
*
* SPDX-License-Identifier: MPL-2.0
*/
.code64
.text
# extern "sysv64" fn syscall_return(&mut UserContext)
.global syscall_return
syscall_return:
# disable interrupt
cli
# save callee-saved registers
push r15
push r14
push r13
push r12
push rbp
push rbx
push rdi # keep rsp 16 bytes align
mov gs:4, rsp # store kernel rsp -> TSS.sp0
mov rsp, rdi # set rsp -> UserContext
# restore user gsbase
swapgs
pop rax
pop rbx
pop rcx
pop rdx
pop rsi
pop rdi
pop rbp
pop r8 # skip rsp
pop r8
pop r9
pop r10
pop r11
pop r12
pop r13
pop r14
pop r15
# rip
# rflags
# fsbase
# gsbase
# trap_num
# error_code
# determain sysret or iret
cmp dword ptr [rsp + 4*8], 0x100 # syscall?
je sysret
iret:
# construct trap frame
push {USER_SS} # push ss
push [rsp - 8*8] # push rsp
push [rsp + 3*8] # push rflags
push {USER_CS} # push cs
push [rsp + 4*8] # push rip
iretq
sysret:
pop rcx # rcx = rip
pop r11 # r11 = rflags
mov rsp, [rsp - 11*8] # load rsp
sysretq
# sysretq instruction do:
# - load cs, ss
# - load rflags <- r11
# - load rip <- rcx
.global syscall_entry
syscall_entry:
# syscall instruction do:
# - load cs
# - store rflags -> r11
# - mask rflags
# - store rip -> rcx
# - load rip
swapgs # swap in kernel gs
mov gs:12, rsp # store user rsp -> scratch at TSS.sp1
mov rsp, gs:4 # load kernel rsp <- TSS.sp0
pop rsp # load rsp <- UserContext
add rsp, 21*8 # rsp -> error code of UserContext
push 0x100 # push trap_num
sub rsp, 16 # skip fsbase, gsbase
# push general registers
push r11 # push rflags
push rcx # push rip
.global trap_syscall_entry
trap_syscall_entry:
push r15
push r14
push r13
push r12
push r11
push r10
push r9
push r8
push gs:12 # push rsp
push rbp
push rdi
push rsi
push rdx
push rcx
push rbx
push rax
# restore callee-saved registers
mov rsp, gs:4 # load kernel rsp <- TSS.sp0
pop rbx
pop rbx
pop rbp
pop r12
pop r13
pop r14
pop r15
# go back to Rust
ret
|
tatetian/atc25-artifact-evaluation
| 1,253
|
ostd/src/arch/x86/boot/multiboot2/header.S
|
/* SPDX-License-Identifier: MPL-2.0 */
// This is the GNU Multiboot 2 header.
// Reference: https://www.gnu.org/software/grub/manual/multiboot2/html_node/Index.html//Index
.section ".multiboot2_header", "a"
.code32
// Macros for cleaner code in the header fields.
MB2_MAGIC = 0xE85250D6
MB2_ARCHITECTURE = 0 // 32-bit (protected) mode of i386
MB2_HEADERLEN = header_end - header_start
MB2_CHECKSUM = -(MB2_MAGIC + MB2_ARCHITECTURE + MB2_HEADERLEN)
header_start:
.align 8
.long MB2_MAGIC
.long MB2_ARCHITECTURE
.long MB2_HEADERLEN
.long MB2_CHECKSUM
// Tag: entry address
entry_address_tag_start:
.short 3
.short 1 // Optional
.long entry_address_tag_end - entry_address_tag_start
.extern __multiboot_boot
.long __multiboot_boot // entry_addr
entry_address_tag_end:
// Tag: information request
.align 8
info_request:
.short 1
.short 0 // Required
.long info_request_end - info_request
.long 6 // Memory map request
.long 15 // ACPI (new) request
info_request_end:
// Tag: header end
.align 8
.short 0 // type: tags end
.short 0 // flags
.long 8 // size
header_end:
|
tatetian/atc25-artifact-evaluation
| 1,388
|
ostd/src/arch/riscv/boot/boot.S
|
/* SPDX-License-Identifier: MPL-2.0 */
.section .text.entry
.globl _start
_start:
# Arguments passed from SBI:
# a0 = hart id
# a1 = device tree paddr (not touched)
# 1. enable paging
# setting up 1st pagetable
# entry = (PPN(boot_pagetable_2nd) << 10) | 0x01 # V
la t1, boot_pagetable
li t0, 8 * 511
add t1, t1, t0
la t0, boot_pagetable_2nd
srli t0, t0, 2
ori t0, t0, 0x01
sd t0, 0(t1)
la t0, boot_pagetable
li t1, 9 << 60
srli t0, t0, 12
or t0, t0, t1
csrw satp, t0
sfence.vma
# 2. set sp (BSP only)
lga sp, boot_stack_top
# 3. set gp (CPU-local address)
.extern __cpu_local_start
lga gp, __cpu_local_start
# 4. jump to rust riscv_boot
lga t0, riscv_boot
jr t0
.section .bss.stack
.globl boot_stack_bottom
boot_stack_bottom:
.space 0x40000 # 64 KiB
.globl boot_stack_top
boot_stack_top:
.section .data
.align 12
boot_pagetable:
.quad (0x00000 << 10) | 0xcf # VRWXAD
.zero 8 * 255
.quad (0x00000 << 10) | 0xcf # VRWXAD
.zero 8 * 254
.quad 0 # To-Be-Assign
boot_pagetable_2nd:
# 0x0000_00ff_8000_0000 -> 0x0000_0000_8000_0000
.zero 8 * 508
.quad (0x00000 << 10) | 0xcf # VRWXAD
.quad (0x40000 << 10) | 0xcf # VRWXAD
.quad (0x80000 << 10) | 0xcf # VRWXAD
.quad 0
|
tatetian/atc25-artifact-evaluation
| 4,069
|
ostd/src/arch/riscv/trap/trap.S
|
/* SPDX-License-Identifier: MPL-2.0 OR MIT
*
* The original source code is from [trapframe-rs](https://github.com/rcore-os/trapframe-rs),
* which is released under the following license:
*
* SPDX-License-Identifier: MIT
*
* Copyright (c) 2020 - 2024 Runji Wang
*
* We make the following new changes:
* * Add the `trap_handler_table`.
*
* These changes are released under the following license:
*
* SPDX-License-Identifier: MPL-2.0
*/
# Constants / Macros defined in Rust code:
# XLENB
# LOAD
# STORE
.section .text
.global trap_entry
.balign 4
trap_entry:
# If coming from userspace, preserve the user stack pointer and load
# the kernel stack pointer. If we came from the kernel, sscratch
# will contain 0, and we should continue on the current stack.
csrrw sp, sscratch, sp
bnez sp, trap_from_user
trap_from_kernel:
csrr sp, sscratch
addi sp, sp, -34 * XLENB
# sscratch = previous-sp, sp = kernel-sp
trap_from_user:
# save general registers except sp(x2)
STORE_SP x1, 1
STORE_SP x3, 3
STORE_SP x4, 4
STORE_SP x5, 5
STORE_SP x6, 6
STORE_SP x7, 7
STORE_SP x8, 8
STORE_SP x9, 9
STORE_SP x10, 10
STORE_SP x11, 11
STORE_SP x12, 12
STORE_SP x13, 13
STORE_SP x14, 14
STORE_SP x15, 15
STORE_SP x16, 16
STORE_SP x17, 17
STORE_SP x18, 18
STORE_SP x19, 19
STORE_SP x20, 20
STORE_SP x21, 21
STORE_SP x22, 22
STORE_SP x23, 23
STORE_SP x24, 24
STORE_SP x25, 25
STORE_SP x26, 26
STORE_SP x27, 27
STORE_SP x28, 28
STORE_SP x29, 29
STORE_SP x30, 30
STORE_SP x31, 31
# save sp, sstatus, sepc
csrrw t0, sscratch, x0 # sscratch = 0 (kernel)
csrr t1, sstatus
csrr t2, sepc
STORE_SP t0, 2 # save sp
STORE_SP t1, 32 # save sstatus
STORE_SP t2, 33 # save sepc
li t0, 3 << 13
or t1, t1, t0 # sstatus.FS = Dirty (3)
csrw sstatus, t1
andi t1, t1, 1 << 8 # sstatus.SPP == 1
beqz t1, end_trap_from_user
end_trap_from_kernel:
mv a0, sp # first arg is TrapFrame
la ra, trap_return # set return address
j trap_handler
end_trap_from_user:
# load callee-saved registers
LOAD_SP sp, 0
LOAD_SP s0, 0
LOAD_SP s1, 1
LOAD_SP s2, 2
LOAD_SP s3, 3
LOAD_SP s4, 4
LOAD_SP s5, 5
LOAD_SP s6, 6
LOAD_SP s7, 7
LOAD_SP s8, 8
LOAD_SP s9, 9
LOAD_SP s10, 10
LOAD_SP s11, 11
LOAD_SP ra, 12
# not callee-saved, but is used to store mhartid
LOAD_SP gp, 13
addi sp, sp, 14 * XLENB
ret
.global run_user
run_user:
# save callee-saved registers
addi sp, sp, -14 * XLENB
STORE_SP s0, 0
STORE_SP s1, 1
STORE_SP s2, 2
STORE_SP s3, 3
STORE_SP s4, 4
STORE_SP s5, 5
STORE_SP s6, 6
STORE_SP s7, 7
STORE_SP s8, 8
STORE_SP s9, 9
STORE_SP s10, 10
STORE_SP s11, 11
STORE_SP ra, 12
# not callee-saved, but is used to store mhartid
STORE_SP gp, 13
mv t0, sp
mv sp, a0
STORE_SP t0, 0 # save kernel-sp
csrw sscratch, sp # sscratch = bottom of trap frame
trap_return:
LOAD_SP t0, 32 # t0 = sstatus
LOAD_SP t1, 33 # t1 = sepc
csrw sstatus, t0 # load sstatus
csrw sepc, t1 # load sepc
# restore general registers except sp(x2)
LOAD_SP x1, 1
LOAD_SP x3, 3
LOAD_SP x4, 4
LOAD_SP x5, 5
LOAD_SP x6, 6
LOAD_SP x7, 7
LOAD_SP x8, 8
LOAD_SP x9, 9
LOAD_SP x10, 10
LOAD_SP x11, 11
LOAD_SP x12, 12
LOAD_SP x13, 13
LOAD_SP x14, 14
LOAD_SP x15, 15
LOAD_SP x16, 16
LOAD_SP x17, 17
LOAD_SP x18, 18
LOAD_SP x19, 19
LOAD_SP x20, 20
LOAD_SP x21, 21
LOAD_SP x22, 22
LOAD_SP x23, 23
LOAD_SP x24, 24
LOAD_SP x25, 25
LOAD_SP x26, 26
LOAD_SP x27, 27
LOAD_SP x28, 28
LOAD_SP x29, 29
LOAD_SP x30, 30
LOAD_SP x31, 31
# restore sp last
LOAD_SP x2, 2
# return from supervisor call
sret
|
Teademia/2024oskernel
| 1,640
|
os/src/trap/trap.S
|
.altmacro
.macro SAVE_GP n
sd x\n, \n*8(sp)
.endm
.macro LOAD_GP n
ld x\n, \n*8(sp)
.endm
.section .text.trampoline
.globl __alltraps
.globl __restore
.align 2
__alltraps:
csrrw sp, sscratch, sp
# now sp->*TrapContext in user space, sscratch->user stack
# save other general purpose registers
sd x1, 1*8(sp)
# skip sp(x2), we will save it later
sd x3, 3*8(sp)
# skip tp(x4), application does not use it
# save x5~x31
.set n, 5
.rept 27
SAVE_GP %n
.set n, n+1
.endr
# we can use t0/t1/t2 freely, because they have been saved in TrapContext
csrr t0, sstatus
csrr t1, sepc
sd t0, 32*8(sp)
sd t1, 33*8(sp)
# read user stack from sscratch and save it in TrapContext
csrr t2, sscratch
sd t2, 2*8(sp)
# load kernel_satp into t0
ld t0, 34*8(sp)
# load trap_handler into t1
ld t1, 36*8(sp)
# move to kernel_sp
ld sp, 35*8(sp)
# switch to kernel space
csrw satp, t0
sfence.vma
# jump to trap_handler
jr t1
__restore:
# a0: *TrapContext in user space(Constant); a1: user space token
# switch to user space
csrw satp, a1
sfence.vma
csrw sscratch, a0
mv sp, a0
# now sp points to TrapContext in user space, start restoring based on it
# restore sstatus/sepc
ld t0, 32*8(sp)
ld t1, 33*8(sp)
csrw sstatus, t0
csrw sepc, t1
# restore general purpose registers except x0/sp/tp
ld x1, 1*8(sp)
ld x3, 3*8(sp)
.set n, 5
.rept 27
LOAD_GP %n
.set n, n+1
.endr
# back to user stack
ld sp, 2*8(sp)
sret
|
telecran-telecrit/cpython
| 7,234
|
Modules/_ctypes/libffi_osx/powerpc/ppc-darwin_closure.S
|
#if defined(__ppc__)
/* -----------------------------------------------------------------------
ppc-darwin_closure.S - Copyright (c) 2002, 2003, 2004, Free Software Foundation,
Inc. based on ppc_closure.S
PowerPC Assembly glue.
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND, EXPRESS
OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR
OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
OTHER DEALINGS IN THE SOFTWARE.
----------------------------------------------------------------------- */
#define LIBFFI_ASM
#include <ffi.h>
#include <ppc-ffitarget.h> // for FFI_TRAMPOLINE_SIZE
#include <ppc-darwin.h>
#include <architecture/ppc/mode_independent_asm.h>
.file "ppc-darwin_closure.S"
.text
.align LOG2_GPR_BYTES
.globl _ffi_closure_ASM
.text
.align LOG2_GPR_BYTES
_ffi_closure_ASM:
LFB1:
mflr r0 // Save return address
stg r0,SF_RETURN(r1)
LCFI0:
/* 24/48 bytes (Linkage Area)
32/64 bytes (outgoing parameter area, always reserved)
104 bytes (13*8 from FPR)
16/32 bytes (result)
176/232 total bytes */
/* skip over caller save area and keep stack aligned to 16/32. */
stgu r1,-SF_ROUND(176)(r1)
LCFI1:
/* We want to build up an area for the parameters passed
in registers. (both floating point and integer) */
/* 176/256 bytes (callee stack frame aligned to 16/32)
24/48 bytes (caller linkage area)
200/304 (start of caller parameter area aligned to 4/8)
*/
/* Save GPRs 3 - 10 (aligned to 4/8)
in the parents outgoing area. */
stg r3,200(r1)
stg r4,204(r1)
stg r5,208(r1)
stg r6,212(r1)
stg r7,216(r1)
stg r8,220(r1)
stg r9,224(r1)
stg r10,228(r1)
/* Save FPRs 1 - 13. (aligned to 8) */
stfd f1,56(r1)
stfd f2,64(r1)
stfd f3,72(r1)
stfd f4,80(r1)
stfd f5,88(r1)
stfd f6,96(r1)
stfd f7,104(r1)
stfd f8,112(r1)
stfd f9,120(r1)
stfd f10,128(r1)
stfd f11,136(r1)
stfd f12,144(r1)
stfd f13,152(r1)
// Set up registers for the routine that actually does the work.
mr r3,r11 // context pointer from the trampoline
addi r4,r1,160 // result storage
addi r5,r1,200 // saved GPRs
addi r6,r1,56 // saved FPRs
bl Lffi_closure_helper_DARWIN$stub
/* Now r3 contains the return type. Use it to look up in a table
so we know how to deal with each type. */
addi r5,r1,160 // Copy result storage pointer.
bl Lget_ret_type0_addr // Get pointer to Lret_type0 into LR.
mflr r4 // Move to r4.
slwi r3,r3,4 // Multiply return type by 16.
add r3,r3,r4 // Add contents of table to table address.
mtctr r3
bctr
LFE1:
/* Each of the ret_typeX code fragments has to be exactly 16 bytes long
(4 instructions). For cache effectiveness we align to a 16 byte boundary
first. */
.align 4
nop
nop
nop
Lget_ret_type0_addr:
blrl
/* case FFI_TYPE_VOID */
Lret_type0:
b Lfinish
nop
nop
nop
/* case FFI_TYPE_INT */
Lret_type1:
lwz r3,0(r5)
b Lfinish
nop
nop
/* case FFI_TYPE_FLOAT */
Lret_type2:
lfs f1,0(r5)
b Lfinish
nop
nop
/* case FFI_TYPE_DOUBLE */
Lret_type3:
lfd f1,0(r5)
b Lfinish
nop
nop
/* case FFI_TYPE_LONGDOUBLE */
Lret_type4:
lfd f1,0(r5)
lfd f2,8(r5)
b Lfinish
nop
/* case FFI_TYPE_UINT8 */
Lret_type5:
lbz r3,3(r5)
b Lfinish
nop
nop
/* case FFI_TYPE_SINT8 */
Lret_type6:
lbz r3,3(r5)
extsb r3,r3
b Lfinish
nop
/* case FFI_TYPE_UINT16 */
Lret_type7:
lhz r3,2(r5)
b Lfinish
nop
nop
/* case FFI_TYPE_SINT16 */
Lret_type8:
lha r3,2(r5)
b Lfinish
nop
nop
/* case FFI_TYPE_UINT32 */
Lret_type9: // same as Lret_type1
lwz r3,0(r5)
b Lfinish
nop
nop
/* case FFI_TYPE_SINT32 */
Lret_type10: // same as Lret_type1
lwz r3,0(r5)
b Lfinish
nop
nop
/* case FFI_TYPE_UINT64 */
Lret_type11:
lwz r3,0(r5)
lwz r4,4(r5)
b Lfinish
nop
/* case FFI_TYPE_SINT64 */
Lret_type12: // same as Lret_type11
lwz r3,0(r5)
lwz r4,4(r5)
b Lfinish
nop
/* case FFI_TYPE_STRUCT */
Lret_type13:
b Lfinish
nop
nop
nop
/* End 16-byte aligned cases */
/* case FFI_TYPE_POINTER */
// This case assumes that FFI_TYPE_POINTER == FFI_TYPE_LAST. If more types
// are added in future, the following code will need to be updated and
// padded to 16 bytes.
Lret_type14:
lg r3,0(r5)
// fall through
/* case done */
Lfinish:
addi r1,r1,SF_ROUND(176) // Restore stack pointer.
lg r0,SF_RETURN(r1) // Restore return address.
mtlr r0 // Restore link register.
blr
/* END(ffi_closure_ASM) */
.section __TEXT,__eh_frame,coalesced,no_toc+strip_static_syms+live_support
EH_frame1:
.set L$set$0,LECIE1-LSCIE1
.long L$set$0 ; Length of Common Information Entry
LSCIE1:
.long 0x0 ; CIE Identifier Tag
.byte 0x1 ; CIE Version
.ascii "zR\0" ; CIE Augmentation
.byte 0x1 ; uleb128 0x1; CIE Code Alignment Factor
.byte 0x7c ; sleb128 -4; CIE Data Alignment Factor
.byte 0x41 ; CIE RA Column
.byte 0x1 ; uleb128 0x1; Augmentation size
.byte 0x10 ; FDE Encoding (pcrel)
.byte 0xc ; DW_CFA_def_cfa
.byte 0x1 ; uleb128 0x1
.byte 0x0 ; uleb128 0x0
.align LOG2_GPR_BYTES
LECIE1:
.globl _ffi_closure_ASM.eh
_ffi_closure_ASM.eh:
LSFDE1:
.set L$set$1,LEFDE1-LASFDE1
.long L$set$1 ; FDE Length
LASFDE1:
.long LASFDE1-EH_frame1 ; FDE CIE offset
.g_long LFB1-. ; FDE initial location
.set L$set$3,LFE1-LFB1
.g_long L$set$3 ; FDE address range
.byte 0x0 ; uleb128 0x0; Augmentation size
.byte 0x4 ; DW_CFA_advance_loc4
.set L$set$3,LCFI1-LCFI0
.long L$set$3
.byte 0xe ; DW_CFA_def_cfa_offset
.byte 176,1 ; uleb128 176
.byte 0x4 ; DW_CFA_advance_loc4
.set L$set$4,LCFI0-LFB1
.long L$set$4
.byte 0x11 ; DW_CFA_offset_extended_sf
.byte 0x41 ; uleb128 0x41
.byte 0x7e ; sleb128 -2
.align LOG2_GPR_BYTES
LEFDE1:
.data
.align LOG2_GPR_BYTES
LDFCM0:
.section __TEXT,__picsymbolstub1,symbol_stubs,pure_instructions,32
.align LOG2_GPR_BYTES
Lffi_closure_helper_DARWIN$stub:
.indirect_symbol _ffi_closure_helper_DARWIN
mflr r0
bcl 20,31,LO$ffi_closure_helper_DARWIN
LO$ffi_closure_helper_DARWIN:
mflr r11
addis r11,r11,ha16(L_ffi_closure_helper_DARWIN$lazy_ptr - LO$ffi_closure_helper_DARWIN)
mtlr r0
lgu r12,lo16(L_ffi_closure_helper_DARWIN$lazy_ptr - LO$ffi_closure_helper_DARWIN)(r11)
mtctr r12
bctr
.lazy_symbol_pointer
L_ffi_closure_helper_DARWIN$lazy_ptr:
.indirect_symbol _ffi_closure_helper_DARWIN
.g_long dyld_stub_binding_helper
#endif // __ppc__
|
telecran-telecrit/cpython
| 9,719
|
Modules/_ctypes/libffi_osx/powerpc/ppc-darwin.S
|
#if defined(__ppc__) || defined(__ppc64__)
/* -----------------------------------------------------------------------
ppc-darwin.S - Copyright (c) 2000 John Hornkvist
Copyright (c) 2004 Free Software Foundation, Inc.
PowerPC Assembly glue.
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND, EXPRESS
OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR
OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
OTHER DEALINGS IN THE SOFTWARE.
----------------------------------------------------------------------- */
#define LIBFFI_ASM
#include <fficonfig.h>
#include <ffi.h>
#include <ppc-darwin.h>
#include <architecture/ppc/mode_independent_asm.h>
.text
.align 2
.globl _ffi_prep_args
.text
.align 2
.globl _ffi_call_DARWIN
.text
.align 2
_ffi_call_DARWIN:
LFB0:
mr r12,r8 /* We only need r12 until the call,
so it doesn't have to be saved. */
LFB1:
/* Save the old stack pointer as AP. */
mr r8,r1
LCFI0:
#if defined(__ppc64__)
/* Allocate the stack space we need.
r4 (size of input data)
48 bytes (linkage area)
40 bytes (saved registers)
8 bytes (extra FPR)
r4 + 96 bytes total
*/
addi r4,r4,-96 // Add our overhead.
li r0,-32 // Align to 32 bytes.
and r4,r4,r0
#endif
stgux r1,r1,r4 // Grow the stack.
mflr r9
/* Save registers we use. */
#if defined(__ppc64__)
std r27,-40(r8)
#endif
stg r28,MODE_CHOICE(-16,-32)(r8)
stg r29,MODE_CHOICE(-12,-24)(r8)
stg r30,MODE_CHOICE(-8,-16)(r8)
stg r31,MODE_CHOICE(-4,-8)(r8)
stg r9,SF_RETURN(r8) /* return address */
#if !defined(POWERPC_DARWIN) /* TOC unused in OS X */
stg r2,MODE_CHOICE(20,40)(r1)
#endif
LCFI1:
#if defined(__ppc64__)
mr r27,r3 // our extended_cif
#endif
/* Save arguments over call. */
mr r31,r5 /* flags, */
mr r30,r6 /* rvalue, */
mr r29,r7 /* function address, */
mr r28,r8 /* our AP. */
LCFI2:
/* Call ffi_prep_args. */
mr r4,r1
li r9,0
mtctr r12 /* r12 holds address of _ffi_prep_args. */
bctrl
#if !defined(POWERPC_DARWIN) /* TOC unused in OS X */
lg r2,MODE_CHOICE(20,40)(r1)
#endif
/* Now do the call.
Set up cr1 with bits 4-7 of the flags. */
mtcrf 0x40,r31
/* Load all those argument registers.
We have set up a nice stack frame, just load it into registers. */
lg r3,SF_ARG1(r1)
lg r4,SF_ARG2(r1)
lg r5,SF_ARG3(r1)
lg r6,SF_ARG4(r1)
nop
lg r7,SF_ARG5(r1)
lg r8,SF_ARG6(r1)
lg r9,SF_ARG7(r1)
lg r10,SF_ARG8(r1)
/* Load all the FP registers. */
bf 6,L2 /* No floats to load. */
#if defined(__ppc64__)
lfd f1,MODE_CHOICE(-16,-40)-(14*8)(r28)
lfd f2,MODE_CHOICE(-16,-40)-(13*8)(r28)
lfd f3,MODE_CHOICE(-16,-40)-(12*8)(r28)
lfd f4,MODE_CHOICE(-16,-40)-(11*8)(r28)
nop
lfd f5,MODE_CHOICE(-16,-40)-(10*8)(r28)
lfd f6,MODE_CHOICE(-16,-40)-(9*8)(r28)
lfd f7,MODE_CHOICE(-16,-40)-(8*8)(r28)
lfd f8,MODE_CHOICE(-16,-40)-(7*8)(r28)
nop
lfd f9,MODE_CHOICE(-16,-40)-(6*8)(r28)
lfd f10,MODE_CHOICE(-16,-40)-(5*8)(r28)
lfd f11,MODE_CHOICE(-16,-40)-(4*8)(r28)
lfd f12,MODE_CHOICE(-16,-40)-(3*8)(r28)
nop
lfd f13,MODE_CHOICE(-16,-40)-(2*8)(r28)
lfd f14,MODE_CHOICE(-16,-40)-(1*8)(r28)
#elif defined(__ppc__)
lfd f1,MODE_CHOICE(-16,-40)-(13*8)(r28)
lfd f2,MODE_CHOICE(-16,-40)-(12*8)(r28)
lfd f3,MODE_CHOICE(-16,-40)-(11*8)(r28)
lfd f4,MODE_CHOICE(-16,-40)-(10*8)(r28)
nop
lfd f5,MODE_CHOICE(-16,-40)-(9*8)(r28)
lfd f6,MODE_CHOICE(-16,-40)-(8*8)(r28)
lfd f7,MODE_CHOICE(-16,-40)-(7*8)(r28)
lfd f8,MODE_CHOICE(-16,-40)-(6*8)(r28)
nop
lfd f9,MODE_CHOICE(-16,-40)-(5*8)(r28)
lfd f10,MODE_CHOICE(-16,-40)-(4*8)(r28)
lfd f11,MODE_CHOICE(-16,-40)-(3*8)(r28)
lfd f12,MODE_CHOICE(-16,-40)-(2*8)(r28)
nop
lfd f13,MODE_CHOICE(-16,-40)-(1*8)(r28)
#else
#error undefined architecture
#endif
L2:
mr r12,r29 // Put the target address in r12 as specified.
mtctr r12 // Get the address to call into CTR.
nop
nop
bctrl // Make the call.
// Deal with the return value.
#if defined(__ppc64__)
mtcrf 0x3,r31 // flags in cr6 and cr7
bt 27,L(st_return_value)
#elif defined(__ppc__)
mtcrf 0x1,r31 // flags in cr7
#else
#error undefined architecture
#endif
bt 30,L(done_return_value)
bt 29,L(fp_return_value)
stg r3,0(r30)
#if defined(__ppc__)
bf 28,L(done_return_value) // Store the second long if necessary.
stg r4,4(r30)
#endif
// Fall through
L(done_return_value):
lg r1,0(r1) // Restore stack pointer.
// Restore the registers we used.
lg r9,SF_RETURN(r1) // return address
lg r31,MODE_CHOICE(-4,-8)(r1)
mtlr r9
lg r30,MODE_CHOICE(-8,-16)(r1)
lg r29,MODE_CHOICE(-12,-24)(r1)
lg r28,MODE_CHOICE(-16,-32)(r1)
#if defined(__ppc64__)
ld r27,-40(r1)
#endif
blr
#if defined(__ppc64__)
L(st_return_value):
// Grow the stack enough to fit the registers. Leave room for 8 args
// to trample the 1st 8 slots in param area.
stgu r1,-SF_ROUND(280)(r1) // 64 + 104 + 48 + 64
// Store GPRs
std r3,SF_ARG9(r1)
std r4,SF_ARG10(r1)
std r5,SF_ARG11(r1)
std r6,SF_ARG12(r1)
nop
std r7,SF_ARG13(r1)
std r8,SF_ARG14(r1)
std r9,SF_ARG15(r1)
std r10,SF_ARG16(r1)
// Store FPRs
nop
bf 26,L(call_struct_to_ram_form)
stfd f1,SF_ARG17(r1)
stfd f2,SF_ARG18(r1)
stfd f3,SF_ARG19(r1)
stfd f4,SF_ARG20(r1)
nop
stfd f5,SF_ARG21(r1)
stfd f6,SF_ARG22(r1)
stfd f7,SF_ARG23(r1)
stfd f8,SF_ARG24(r1)
nop
stfd f9,SF_ARG25(r1)
stfd f10,SF_ARG26(r1)
stfd f11,SF_ARG27(r1)
stfd f12,SF_ARG28(r1)
nop
stfd f13,SF_ARG29(r1)
L(call_struct_to_ram_form):
ld r3,0(r27) // extended_cif->cif*
ld r3,16(r3) // ffi_cif->rtype*
addi r4,r1,SF_ARG9 // stored GPRs
addi r6,r1,SF_ARG17 // stored FPRs
li r5,0 // GPR size ptr (NULL)
li r7,0 // FPR size ptr (NULL)
li r8,0 // FPR count ptr (NULL)
li r10,0 // struct offset (NULL)
mr r9,r30 // return area
bl Lffi64_struct_to_ram_form$stub
lg r1,0(r1) // Restore stack pointer.
b L(done_return_value)
#endif
L(fp_return_value):
/* Do we have long double to store? */
bf 31,L(fd_return_value)
stfd f1,0(r30)
stfd f2,8(r30)
b L(done_return_value)
L(fd_return_value):
/* Do we have double to store? */
bf 28,L(float_return_value)
stfd f1,0(r30)
b L(done_return_value)
L(float_return_value):
/* We only have a float to store. */
stfs f1,0(r30)
b L(done_return_value)
LFE1:
/* END(_ffi_call_DARWIN) */
/* Provide a null definition of _ffi_call_AIX. */
.text
.align 2
.globl _ffi_call_AIX
.text
.align 2
_ffi_call_AIX:
blr
/* END(_ffi_call_AIX) */
.section __TEXT,__eh_frame,coalesced,no_toc+strip_static_syms
EH_frame1:
.set L$set$0,LECIE1-LSCIE1
.long L$set$0 ; Length of Common Information Entry
LSCIE1:
.long 0x0 ; CIE Identifier Tag
.byte 0x1 ; CIE Version
.ascii "zR\0" ; CIE Augmentation
.byte 0x1 ; uleb128 0x1; CIE Code Alignment Factor
.byte 0x7c ; sleb128 -4; CIE Data Alignment Factor
.byte 0x41 ; CIE RA Column
.byte 0x1 ; uleb128 0x1; Augmentation size
.byte 0x10 ; FDE Encoding (pcrel)
.byte 0xc ; DW_CFA_def_cfa
.byte 0x1 ; uleb128 0x1
.byte 0x0 ; uleb128 0x0
.align LOG2_GPR_BYTES
LECIE1:
.globl _ffi_call_DARWIN.eh
_ffi_call_DARWIN.eh:
LSFDE1:
.set L$set$1,LEFDE1-LASFDE1
.long L$set$1 ; FDE Length
LASFDE1:
.long LASFDE1-EH_frame1 ; FDE CIE offset
.g_long LFB0-. ; FDE initial location
.set L$set$3,LFE1-LFB0
.g_long L$set$3 ; FDE address range
.byte 0x0 ; uleb128 0x0; Augmentation size
.byte 0x4 ; DW_CFA_advance_loc4
.set L$set$4,LCFI0-LFB1
.long L$set$4
.byte 0xd ; DW_CFA_def_cfa_register
.byte 0x08 ; uleb128 0x08
.byte 0x4 ; DW_CFA_advance_loc4
.set L$set$5,LCFI1-LCFI0
.long L$set$5
.byte 0x11 ; DW_CFA_offset_extended_sf
.byte 0x41 ; uleb128 0x41
.byte 0x7e ; sleb128 -2
.byte 0x9f ; DW_CFA_offset, column 0x1f
.byte 0x1 ; uleb128 0x1
.byte 0x9e ; DW_CFA_offset, column 0x1e
.byte 0x2 ; uleb128 0x2
.byte 0x9d ; DW_CFA_offset, column 0x1d
.byte 0x3 ; uleb128 0x3
.byte 0x9c ; DW_CFA_offset, column 0x1c
.byte 0x4 ; uleb128 0x4
.byte 0x4 ; DW_CFA_advance_loc4
.set L$set$6,LCFI2-LCFI1
.long L$set$6
.byte 0xd ; DW_CFA_def_cfa_register
.byte 0x1c ; uleb128 0x1c
.align LOG2_GPR_BYTES
LEFDE1:
#if defined(__ppc64__)
.section __TEXT,__picsymbolstub1,symbol_stubs,pure_instructions,32
.align LOG2_GPR_BYTES
Lffi64_struct_to_ram_form$stub:
.indirect_symbol _ffi64_struct_to_ram_form
mflr r0
bcl 20,31,LO$ffi64_struct_to_ram_form
LO$ffi64_struct_to_ram_form:
mflr r11
addis r11,r11,ha16(L_ffi64_struct_to_ram_form$lazy_ptr - LO$ffi64_struct_to_ram_form)
mtlr r0
lgu r12,lo16(L_ffi64_struct_to_ram_form$lazy_ptr - LO$ffi64_struct_to_ram_form)(r11)
mtctr r12
bctr
.lazy_symbol_pointer
L_ffi64_struct_to_ram_form$lazy_ptr:
.indirect_symbol _ffi64_struct_to_ram_form
.g_long dyld_stub_binding_helper
#endif // __ppc64__
#endif // __ppc__ || __ppc64__
|
telecran-telecrit/cpython
| 9,914
|
Modules/_ctypes/libffi_osx/powerpc/ppc64-darwin_closure.S
|
#if defined(__ppc64__)
/* -----------------------------------------------------------------------
ppc64-darwin_closure.S - Copyright (c) 2002, 2003, 2004, Free Software Foundation,
Inc. based on ppc_closure.S
PowerPC Assembly glue.
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND, EXPRESS
OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR
OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
OTHER DEALINGS IN THE SOFTWARE.
----------------------------------------------------------------------- */
#define LIBFFI_ASM
#include <ffi.h>
#include <ppc-ffitarget.h> // for FFI_TRAMPOLINE_SIZE
#include <ppc-darwin.h>
#include <architecture/ppc/mode_independent_asm.h>
.file "ppc64-darwin_closure.S"
.text
.align LOG2_GPR_BYTES
.globl _ffi_closure_ASM
.text
.align LOG2_GPR_BYTES
_ffi_closure_ASM:
LFB1:
mflr r0
stg r0,SF_RETURN(r1) // save return address
// Save GPRs 3 - 10 (aligned to 8) in the parents outgoing area.
stg r3,SF_ARG1(r1)
stg r4,SF_ARG2(r1)
stg r5,SF_ARG3(r1)
stg r6,SF_ARG4(r1)
stg r7,SF_ARG5(r1)
stg r8,SF_ARG6(r1)
stg r9,SF_ARG7(r1)
stg r10,SF_ARG8(r1)
LCFI0:
/* 48 bytes (Linkage Area)
64 bytes (outgoing parameter area, always reserved)
112 bytes (14*8 for incoming FPR)
? bytes (result)
112 bytes (14*8 for outgoing FPR)
16 bytes (2 saved registers)
352 + ? total bytes
*/
std r31,-8(r1) // Save registers we use.
std r30,-16(r1)
mr r30,r1 // Save the old SP.
mr r31,r11 // Save the ffi_closure around ffi64_data_size.
// Calculate the space we need.
stdu r1,-SF_MINSIZE(r1)
ld r3,FFI_TRAMPOLINE_SIZE(r31) // ffi_closure->cif*
ld r3,16(r3) // ffi_cif->rtype*
bl Lffi64_data_size$stub
ld r1,0(r1)
addi r3,r3,352 // Add our overhead.
neg r3,r3
li r0,-32 // Align to 32 bytes.
and r3,r3,r0
stdux r1,r1,r3 // Grow the stack.
mr r11,r31 // Copy the ffi_closure back.
LCFI1:
// We want to build up an area for the parameters passed
// in registers. (both floating point and integer)
/* 320 bytes (callee stack frame aligned to 32)
48 bytes (caller linkage area)
368 (start of caller parameter area aligned to 8)
*/
// Save FPRs 1 - 14. (aligned to 8)
stfd f1,112(r1)
stfd f2,120(r1)
stfd f3,128(r1)
stfd f4,136(r1)
stfd f5,144(r1)
stfd f6,152(r1)
stfd f7,160(r1)
stfd f8,168(r1)
stfd f9,176(r1)
stfd f10,184(r1)
stfd f11,192(r1)
stfd f12,200(r1)
stfd f13,208(r1)
stfd f14,216(r1)
// Set up registers for the routine that actually does the work.
mr r3,r11 // context pointer from the trampoline
addi r4,r1,224 // result storage
addi r5,r30,SF_ARG1 // saved GPRs
addi r6,r1,112 // saved FPRs
bl Lffi_closure_helper_DARWIN$stub
// Look the proper starting point in table
// by using return type as an offset.
addi r5,r1,224 // Get pointer to results area.
bl Lget_ret_type0_addr // Get pointer to Lret_type0 into LR.
mflr r4 // Move to r4.
slwi r3,r3,4 // Now multiply return type by 16.
add r3,r3,r4 // Add contents of table to table address.
mtctr r3
bctr
LFE1:
// Each of the ret_typeX code fragments has to be exactly 16 bytes long
// (4 instructions). For cache effectiveness we align to a 16 byte
// boundary first.
.align 4
nop
nop
nop
Lget_ret_type0_addr:
blrl
// case FFI_TYPE_VOID
Lret_type0:
b Lfinish
nop
nop
nop
// case FFI_TYPE_INT
Lret_type1:
lwz r3,4(r5)
b Lfinish
nop
nop
// case FFI_TYPE_FLOAT
Lret_type2:
lfs f1,0(r5)
b Lfinish
nop
nop
// case FFI_TYPE_DOUBLE
Lret_type3:
lfd f1,0(r5)
b Lfinish
nop
nop
// case FFI_TYPE_LONGDOUBLE
Lret_type4:
lfd f1,0(r5)
lfd f2,8(r5)
b Lfinish
nop
// case FFI_TYPE_UINT8
Lret_type5:
lbz r3,7(r5)
b Lfinish
nop
nop
// case FFI_TYPE_SINT8
Lret_type6:
lbz r3,7(r5)
extsb r3,r3
b Lfinish
nop
// case FFI_TYPE_UINT16
Lret_type7:
lhz r3,6(r5)
b Lfinish
nop
nop
// case FFI_TYPE_SINT16
Lret_type8:
lha r3,6(r5)
b Lfinish
nop
nop
// case FFI_TYPE_UINT32
Lret_type9: // same as Lret_type1
lwz r3,4(r5)
b Lfinish
nop
nop
// case FFI_TYPE_SINT32
Lret_type10: // same as Lret_type1
lwz r3,4(r5)
b Lfinish
nop
nop
// case FFI_TYPE_UINT64
Lret_type11:
ld r3,0(r5)
b Lfinish
nop
nop
// case FFI_TYPE_SINT64
Lret_type12: // same as Lret_type11
ld r3,0(r5)
b Lfinish
nop
nop
// case FFI_TYPE_STRUCT
Lret_type13:
b Lret_struct
nop
nop
nop
// ** End 16-byte aligned cases **
// case FFI_TYPE_POINTER
// This case assumes that FFI_TYPE_POINTER == FFI_TYPE_LAST. If more types
// are added in future, the following code will need to be updated and
// padded to 16 bytes.
Lret_type14:
lg r3,0(r5)
b Lfinish
// copy struct into registers
Lret_struct:
ld r31,FFI_TRAMPOLINE_SIZE(r31) // ffi_closure->cif*
ld r3,16(r31) // ffi_cif->rtype*
ld r31,24(r31) // ffi_cif->flags
mr r4,r5 // copy struct* to 2nd arg
addi r7,r1,SF_ARG9 // GPR return area
addi r9,r30,-16-(14*8) // FPR return area
li r5,0 // struct offset ptr (NULL)
li r6,0 // FPR used count ptr (NULL)
li r8,0 // GPR return area size ptr (NULL)
li r10,0 // FPR return area size ptr (NULL)
bl Lffi64_struct_to_reg_form$stub
// Load GPRs
ld r3,SF_ARG9(r1)
ld r4,SF_ARG10(r1)
ld r5,SF_ARG11(r1)
ld r6,SF_ARG12(r1)
nop
ld r7,SF_ARG13(r1)
ld r8,SF_ARG14(r1)
ld r9,SF_ARG15(r1)
ld r10,SF_ARG16(r1)
nop
// Load FPRs
mtcrf 0x2,r31
bf 26,Lfinish
lfd f1,-16-(14*8)(r30)
lfd f2,-16-(13*8)(r30)
lfd f3,-16-(12*8)(r30)
lfd f4,-16-(11*8)(r30)
nop
lfd f5,-16-(10*8)(r30)
lfd f6,-16-(9*8)(r30)
lfd f7,-16-(8*8)(r30)
lfd f8,-16-(7*8)(r30)
nop
lfd f9,-16-(6*8)(r30)
lfd f10,-16-(5*8)(r30)
lfd f11,-16-(4*8)(r30)
lfd f12,-16-(3*8)(r30)
nop
lfd f13,-16-(2*8)(r30)
lfd f14,-16-(1*8)(r30)
// Fall through
// case done
Lfinish:
lg r1,0(r1) // Restore stack pointer.
ld r31,-8(r1) // Restore registers we used.
ld r30,-16(r1)
lg r0,SF_RETURN(r1) // Get return address.
mtlr r0 // Reset link register.
blr
// END(ffi_closure_ASM)
.section __TEXT,__eh_frame,coalesced,no_toc+strip_static_syms+live_support
EH_frame1:
.set L$set$0,LECIE1-LSCIE1
.long L$set$0 ; Length of Common Information Entry
LSCIE1:
.long 0x0 ; CIE Identifier Tag
.byte 0x1 ; CIE Version
.ascii "zR\0" ; CIE Augmentation
.byte 0x1 ; uleb128 0x1; CIE Code Alignment Factor
.byte 0x7c ; sleb128 -4; CIE Data Alignment Factor
.byte 0x41 ; CIE RA Column
.byte 0x1 ; uleb128 0x1; Augmentation size
.byte 0x10 ; FDE Encoding (pcrel)
.byte 0xc ; DW_CFA_def_cfa
.byte 0x1 ; uleb128 0x1
.byte 0x0 ; uleb128 0x0
.align LOG2_GPR_BYTES
LECIE1:
.globl _ffi_closure_ASM.eh
_ffi_closure_ASM.eh:
LSFDE1:
.set L$set$1,LEFDE1-LASFDE1
.long L$set$1 ; FDE Length
LASFDE1:
.long LASFDE1-EH_frame1 ; FDE CIE offset
.g_long LFB1-. ; FDE initial location
.set L$set$3,LFE1-LFB1
.g_long L$set$3 ; FDE address range
.byte 0x0 ; uleb128 0x0; Augmentation size
.byte 0x4 ; DW_CFA_advance_loc4
.set L$set$3,LCFI1-LCFI0
.long L$set$3
.byte 0xe ; DW_CFA_def_cfa_offset
.byte 176,1 ; uleb128 176
.byte 0x4 ; DW_CFA_advance_loc4
.set L$set$4,LCFI0-LFB1
.long L$set$4
.byte 0x11 ; DW_CFA_offset_extended_sf
.byte 0x41 ; uleb128 0x41
.byte 0x7e ; sleb128 -2
.align LOG2_GPR_BYTES
LEFDE1:
.data
.align LOG2_GPR_BYTES
LDFCM0:
.section __TEXT,__picsymbolstub1,symbol_stubs,pure_instructions,32
.align LOG2_GPR_BYTES
Lffi_closure_helper_DARWIN$stub:
.indirect_symbol _ffi_closure_helper_DARWIN
mflr r0
bcl 20,31,LO$ffi_closure_helper_DARWIN
LO$ffi_closure_helper_DARWIN:
mflr r11
addis r11,r11,ha16(L_ffi_closure_helper_DARWIN$lazy_ptr - LO$ffi_closure_helper_DARWIN)
mtlr r0
lgu r12,lo16(L_ffi_closure_helper_DARWIN$lazy_ptr - LO$ffi_closure_helper_DARWIN)(r11)
mtctr r12
bctr
.lazy_symbol_pointer
L_ffi_closure_helper_DARWIN$lazy_ptr:
.indirect_symbol _ffi_closure_helper_DARWIN
.g_long dyld_stub_binding_helper
.section __TEXT,__picsymbolstub1,symbol_stubs,pure_instructions,32
.align LOG2_GPR_BYTES
Lffi64_struct_to_reg_form$stub:
.indirect_symbol _ffi64_struct_to_reg_form
mflr r0
bcl 20,31,LO$ffi64_struct_to_reg_form
LO$ffi64_struct_to_reg_form:
mflr r11
addis r11,r11,ha16(L_ffi64_struct_to_reg_form$lazy_ptr - LO$ffi64_struct_to_reg_form)
mtlr r0
lgu r12,lo16(L_ffi64_struct_to_reg_form$lazy_ptr - LO$ffi64_struct_to_reg_form)(r11)
mtctr r12
bctr
.section __TEXT,__picsymbolstub1,symbol_stubs,pure_instructions,32
.align LOG2_GPR_BYTES
Lffi64_data_size$stub:
.indirect_symbol _ffi64_data_size
mflr r0
bcl 20,31,LO$ffi64_data_size
LO$ffi64_data_size:
mflr r11
addis r11,r11,ha16(L_ffi64_data_size$lazy_ptr - LO$ffi64_data_size)
mtlr r0
lgu r12,lo16(L_ffi64_data_size$lazy_ptr - LO$ffi64_data_size)(r11)
mtctr r12
bctr
.lazy_symbol_pointer
L_ffi64_struct_to_reg_form$lazy_ptr:
.indirect_symbol _ffi64_struct_to_reg_form
.g_long dyld_stub_binding_helper
L_ffi64_data_size$lazy_ptr:
.indirect_symbol _ffi64_data_size
.g_long dyld_stub_binding_helper
#endif // __ppc64__
|
telecran-telecrit/cpython
| 8,955
|
Modules/_ctypes/libffi_osx/x86/x86-darwin.S
|
#ifdef __i386__
/* -----------------------------------------------------------------------
darwin.S - Copyright (c) 1996, 1998, 2001, 2002, 2003 Red Hat, Inc.
X86 Foreign Function Interface
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND, EXPRESS
OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL CYGNUS SOLUTIONS BE LIABLE FOR ANY CLAIM, DAMAGES OR
OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
OTHER DEALINGS IN THE SOFTWARE.
----------------------------------------------------------------------- */
/*
* This file is based on sysv.S and then hacked up by Ronald who hasn't done
* assembly programming in 8 years.
*/
#ifndef __x86_64__
#define LIBFFI_ASM
#include <fficonfig.h>
#include <ffi.h>
#ifdef PyObjC_STRICT_DEBUGGING
/* XXX: Debugging of stack alignment, to be removed */
#define ASSERT_STACK_ALIGNED movdqa -16(%esp), %xmm0
#else
#define ASSERT_STACK_ALIGNED
#endif
.text
.globl _ffi_prep_args
.align 4
.globl _ffi_call_SYSV
_ffi_call_SYSV:
LFB1:
pushl %ebp
LCFI0:
movl %esp,%ebp
LCFI1:
subl $8,%esp
/* Make room for all of the new args. */
movl 16(%ebp),%ecx
subl %ecx,%esp
movl %esp,%eax
/* Place all of the ffi_prep_args in position */
subl $8,%esp
pushl 12(%ebp)
pushl %eax
call *8(%ebp)
/* Return stack to previous state and call the function */
addl $16,%esp
call *28(%ebp)
/* Remove the space we pushed for the args */
movl 16(%ebp),%ecx
addl %ecx,%esp
/* Load %ecx with the return type code */
movl 20(%ebp),%ecx
/* If the return value pointer is NULL, assume no return value. */
cmpl $0,24(%ebp)
jne Lretint
/* Even if there is no space for the return value, we are
obliged to handle floating-point values. */
cmpl $FFI_TYPE_FLOAT,%ecx
jne Lnoretval
fstp %st(0)
jmp Lepilogue
Lretint:
cmpl $FFI_TYPE_INT,%ecx
jne Lretfloat
/* Load %ecx with the pointer to storage for the return value */
movl 24(%ebp),%ecx
movl %eax,0(%ecx)
jmp Lepilogue
Lretfloat:
cmpl $FFI_TYPE_FLOAT,%ecx
jne Lretdouble
/* Load %ecx with the pointer to storage for the return value */
movl 24(%ebp),%ecx
fstps (%ecx)
jmp Lepilogue
Lretdouble:
cmpl $FFI_TYPE_DOUBLE,%ecx
jne Lretlongdouble
/* Load %ecx with the pointer to storage for the return value */
movl 24(%ebp),%ecx
fstpl (%ecx)
jmp Lepilogue
Lretlongdouble:
cmpl $FFI_TYPE_LONGDOUBLE,%ecx
jne Lretint64
/* Load %ecx with the pointer to storage for the return value */
movl 24(%ebp),%ecx
fstpt (%ecx)
jmp Lepilogue
Lretint64:
cmpl $FFI_TYPE_SINT64,%ecx
jne Lretstruct1b
/* Load %ecx with the pointer to storage for the return value */
movl 24(%ebp),%ecx
movl %eax,0(%ecx)
movl %edx,4(%ecx)
jmp Lepilogue
Lretstruct1b:
cmpl $FFI_TYPE_SINT8,%ecx
jne Lretstruct2b
/* Load %ecx with the pointer to storage for the return value */
movl 24(%ebp),%ecx
movb %al,0(%ecx)
jmp Lepilogue
Lretstruct2b:
cmpl $FFI_TYPE_SINT16,%ecx
jne Lretstruct
/* Load %ecx with the pointer to storage for the return value */
movl 24(%ebp),%ecx
movw %ax,0(%ecx)
jmp Lepilogue
Lretstruct:
cmpl $FFI_TYPE_STRUCT,%ecx
jne Lnoretval
/* Nothing to do! */
addl $4,%esp
popl %ebp
ret
Lnoretval:
Lepilogue:
addl $8,%esp
movl %ebp,%esp
popl %ebp
ret
LFE1:
.ffi_call_SYSV_end:
.align 4
FFI_HIDDEN (ffi_closure_SYSV)
.globl _ffi_closure_SYSV
_ffi_closure_SYSV:
LFB2:
pushl %ebp
LCFI2:
movl %esp, %ebp
LCFI3:
subl $56, %esp
leal -40(%ebp), %edx
movl %edx, -12(%ebp) /* resp */
leal 8(%ebp), %edx
movl %edx, 4(%esp) /* args = __builtin_dwarf_cfa () */
leal -12(%ebp), %edx
movl %edx, (%esp) /* &resp */
movl %ebx, 8(%esp)
LCFI7:
call L_ffi_closure_SYSV_inner$stub
movl 8(%esp), %ebx
movl -12(%ebp), %ecx
cmpl $FFI_TYPE_INT, %eax
je Lcls_retint
cmpl $FFI_TYPE_FLOAT, %eax
je Lcls_retfloat
cmpl $FFI_TYPE_DOUBLE, %eax
je Lcls_retdouble
cmpl $FFI_TYPE_LONGDOUBLE, %eax
je Lcls_retldouble
cmpl $FFI_TYPE_SINT64, %eax
je Lcls_retllong
cmpl $FFI_TYPE_UINT8, %eax
je Lcls_retstruct1
cmpl $FFI_TYPE_SINT8, %eax
je Lcls_retstruct1
cmpl $FFI_TYPE_UINT16, %eax
je Lcls_retstruct2
cmpl $FFI_TYPE_SINT16, %eax
je Lcls_retstruct2
cmpl $FFI_TYPE_STRUCT, %eax
je Lcls_retstruct
Lcls_epilogue:
movl %ebp, %esp
popl %ebp
ret
Lcls_retint:
movl (%ecx), %eax
jmp Lcls_epilogue
Lcls_retfloat:
flds (%ecx)
jmp Lcls_epilogue
Lcls_retdouble:
fldl (%ecx)
jmp Lcls_epilogue
Lcls_retldouble:
fldt (%ecx)
jmp Lcls_epilogue
Lcls_retllong:
movl (%ecx), %eax
movl 4(%ecx), %edx
jmp Lcls_epilogue
Lcls_retstruct1:
movsbl (%ecx), %eax
jmp Lcls_epilogue
Lcls_retstruct2:
movswl (%ecx), %eax
jmp Lcls_epilogue
Lcls_retstruct:
lea -8(%ebp),%esp
movl %ebp, %esp
popl %ebp
ret $4
LFE2:
#if !FFI_NO_RAW_API
#define RAW_CLOSURE_CIF_OFFSET ((FFI_TRAMPOLINE_SIZE + 3) & ~3)
#define RAW_CLOSURE_FUN_OFFSET (RAW_CLOSURE_CIF_OFFSET + 4)
#define RAW_CLOSURE_USER_DATA_OFFSET (RAW_CLOSURE_FUN_OFFSET + 4)
#define CIF_FLAGS_OFFSET 20
.align 4
FFI_HIDDEN (ffi_closure_raw_SYSV)
.globl _ffi_closure_raw_SYSV
_ffi_closure_raw_SYSV:
LFB3:
pushl %ebp
LCFI4:
movl %esp, %ebp
LCFI5:
pushl %esi
LCFI6:
subl $36, %esp
movl RAW_CLOSURE_CIF_OFFSET(%eax), %esi /* closure->cif */
movl RAW_CLOSURE_USER_DATA_OFFSET(%eax), %edx /* closure->user_data */
movl %edx, 12(%esp) /* user_data */
leal 8(%ebp), %edx /* __builtin_dwarf_cfa () */
movl %edx, 8(%esp) /* raw_args */
leal -24(%ebp), %edx
movl %edx, 4(%esp) /* &res */
movl %esi, (%esp) /* cif */
call *RAW_CLOSURE_FUN_OFFSET(%eax) /* closure->fun */
movl CIF_FLAGS_OFFSET(%esi), %eax /* rtype */
cmpl $FFI_TYPE_INT, %eax
je Lrcls_retint
cmpl $FFI_TYPE_FLOAT, %eax
je Lrcls_retfloat
cmpl $FFI_TYPE_DOUBLE, %eax
je Lrcls_retdouble
cmpl $FFI_TYPE_LONGDOUBLE, %eax
je Lrcls_retldouble
cmpl $FFI_TYPE_SINT64, %eax
je Lrcls_retllong
Lrcls_epilogue:
addl $36, %esp
popl %esi
popl %ebp
ret
Lrcls_retint:
movl -24(%ebp), %eax
jmp Lrcls_epilogue
Lrcls_retfloat:
flds -24(%ebp)
jmp Lrcls_epilogue
Lrcls_retdouble:
fldl -24(%ebp)
jmp Lrcls_epilogue
Lrcls_retldouble:
fldt -24(%ebp)
jmp Lrcls_epilogue
Lrcls_retllong:
movl -24(%ebp), %eax
movl -20(%ebp), %edx
jmp Lrcls_epilogue
LFE3:
#endif
.section __IMPORT,__jump_table,symbol_stubs,self_modifying_code+pure_instructions,5
L_ffi_closure_SYSV_inner$stub:
.indirect_symbol _ffi_closure_SYSV_inner
hlt ; hlt ; hlt ; hlt ; hlt
.section __TEXT,__eh_frame,coalesced,no_toc+strip_static_syms+live_support
EH_frame1:
.set L$set$0,LECIE1-LSCIE1
.long L$set$0
LSCIE1:
.long 0x0
.byte 0x1
.ascii "zR\0"
.byte 0x1
.byte 0x7c
.byte 0x8
.byte 0x1
.byte 0x10
.byte 0xc
.byte 0x5
.byte 0x4
.byte 0x88
.byte 0x1
.align 2
LECIE1:
.globl _ffi_call_SYSV.eh
_ffi_call_SYSV.eh:
LSFDE1:
.set L$set$1,LEFDE1-LASFDE1
.long L$set$1
LASFDE1:
.long LASFDE1-EH_frame1
.long LFB1-.
.set L$set$2,LFE1-LFB1
.long L$set$2
.byte 0x0
.byte 0x4
.set L$set$3,LCFI0-LFB1
.long L$set$3
.byte 0xe
.byte 0x8
.byte 0x84
.byte 0x2
.byte 0x4
.set L$set$4,LCFI1-LCFI0
.long L$set$4
.byte 0xd
.byte 0x4
.align 2
LEFDE1:
.globl _ffi_closure_SYSV.eh
_ffi_closure_SYSV.eh:
LSFDE2:
.set L$set$5,LEFDE2-LASFDE2
.long L$set$5
LASFDE2:
.long LASFDE2-EH_frame1
.long LFB2-.
.set L$set$6,LFE2-LFB2
.long L$set$6
.byte 0x0
.byte 0x4
.set L$set$7,LCFI2-LFB2
.long L$set$7
.byte 0xe
.byte 0x8
.byte 0x84
.byte 0x2
.byte 0x4
.set L$set$8,LCFI3-LCFI2
.long L$set$8
.byte 0xd
.byte 0x4
.align 2
LEFDE2:
#if !FFI_NO_RAW_API
.globl _ffi_closure_raw_SYSV.eh
_ffi_closure_raw_SYSV.eh:
LSFDE3:
.set L$set$10,LEFDE3-LASFDE3
.long L$set$10
LASFDE3:
.long LASFDE3-EH_frame1
.long LFB3-.
.set L$set$11,LFE3-LFB3
.long L$set$11
.byte 0x0
.byte 0x4
.set L$set$12,LCFI4-LFB3
.long L$set$12
.byte 0xe
.byte 0x8
.byte 0x84
.byte 0x2
.byte 0x4
.set L$set$13,LCFI5-LCFI4
.long L$set$13
.byte 0xd
.byte 0x4
.byte 0x4
.set L$set$14,LCFI6-LCFI5
.long L$set$14
.byte 0x85
.byte 0x3
.align 2
LEFDE3:
#endif
#endif /* ifndef __x86_64__ */
#endif /* defined __i386__ */
|
telecran-telecrit/cpython
| 11,660
|
Modules/_ctypes/libffi_osx/x86/darwin64.S
|
/* -----------------------------------------------------------------------
darwin64.S - Copyright (c) 2006 Free Software Foundation, Inc.
derived from unix64.S
x86-64 Foreign Function Interface for Darwin.
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
``Software''), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND, EXPRESS
OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR
OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
OTHER DEALINGS IN THE SOFTWARE.
----------------------------------------------------------------------- */
#ifdef __x86_64__
#define LIBFFI_ASM
#include <fficonfig.h>
#include <ffi.h>
.file "darwin64.S"
.text
/* ffi_call_unix64 (void *args, unsigned long bytes, unsigned flags,
void *raddr, void (*fnaddr)());
Bit o trickiness here -- ARGS+BYTES is the base of the stack frame
for this function. This has been allocated by ffi_call. We also
deallocate some of the stack that has been alloca'd. */
.align 3
.globl _ffi_call_unix64
_ffi_call_unix64:
LUW0:
movq (%rsp), %r10 /* Load return address. */
movq %rdi, %r12 /* Save a copy of the register area. */
leaq (%rdi, %rsi), %rax /* Find local stack base. */
movq %rdx, (%rax) /* Save flags. */
movq %rcx, 8(%rax) /* Save raddr. */
movq %rbp, 16(%rax) /* Save old frame pointer. */
movq %r10, 24(%rax) /* Relocate return address. */
movq %rax, %rbp /* Finalize local stack frame. */
LUW1:
/* movq %rdi, %r10 // Save a copy of the register area. */
movq %r12, %r10
movq %r8, %r11 /* Save a copy of the target fn. */
movl %r9d, %eax /* Set number of SSE registers. */
/* Load up all argument registers. */
movq (%r10), %rdi
movq 8(%r10), %rsi
movq 16(%r10), %rdx
movq 24(%r10), %rcx
movq 32(%r10), %r8
movq 40(%r10), %r9
testl %eax, %eax
jnz Lload_sse
Lret_from_load_sse:
/* Deallocate the reg arg area. */
leaq 176(%r10), %rsp
/* Call the user function. */
call *%r11
/* Deallocate stack arg area; local stack frame in redzone. */
leaq 24(%rbp), %rsp
movq 0(%rbp), %rcx /* Reload flags. */
movq 8(%rbp), %rdi /* Reload raddr. */
movq 16(%rbp), %rbp /* Reload old frame pointer. */
LUW2:
/* The first byte of the flags contains the FFI_TYPE. */
movzbl %cl, %r10d
leaq Lstore_table(%rip), %r11
movslq (%r11, %r10, 4), %r10
addq %r11, %r10
jmp *%r10
Lstore_table:
.long Lst_void-Lstore_table /* FFI_TYPE_VOID */
.long Lst_sint32-Lstore_table /* FFI_TYPE_INT */
.long Lst_float-Lstore_table /* FFI_TYPE_FLOAT */
.long Lst_double-Lstore_table /* FFI_TYPE_DOUBLE */
.long Lst_ldouble-Lstore_table /* FFI_TYPE_LONGDOUBLE */
.long Lst_uint8-Lstore_table /* FFI_TYPE_UINT8 */
.long Lst_sint8-Lstore_table /* FFI_TYPE_SINT8 */
.long Lst_uint16-Lstore_table /* FFI_TYPE_UINT16 */
.long Lst_sint16-Lstore_table /* FFI_TYPE_SINT16 */
.long Lst_uint32-Lstore_table /* FFI_TYPE_UINT32 */
.long Lst_sint32-Lstore_table /* FFI_TYPE_SINT32 */
.long Lst_int64-Lstore_table /* FFI_TYPE_UINT64 */
.long Lst_int64-Lstore_table /* FFI_TYPE_SINT64 */
.long Lst_struct-Lstore_table /* FFI_TYPE_STRUCT */
.long Lst_int64-Lstore_table /* FFI_TYPE_POINTER */
.text
.align 3
Lst_void:
ret
.align 3
Lst_uint8:
movzbq %al, %rax
movq %rax, (%rdi)
ret
.align 3
Lst_sint8:
movsbq %al, %rax
movq %rax, (%rdi)
ret
.align 3
Lst_uint16:
movzwq %ax, %rax
movq %rax, (%rdi)
.align 3
Lst_sint16:
movswq %ax, %rax
movq %rax, (%rdi)
ret
.align 3
Lst_uint32:
movl %eax, %eax
movq %rax, (%rdi)
.align 3
Lst_sint32:
cltq
movq %rax, (%rdi)
ret
.align 3
Lst_int64:
movq %rax, (%rdi)
ret
.align 3
Lst_float:
movss %xmm0, (%rdi)
ret
.align 3
Lst_double:
movsd %xmm0, (%rdi)
ret
Lst_ldouble:
fstpt (%rdi)
ret
.align 3
Lst_struct:
leaq -20(%rsp), %rsi /* Scratch area in redzone. */
/* We have to locate the values now, and since we don't want to
write too much data into the user's return value, we spill the
value to a 16 byte scratch area first. Bits 8, 9, and 10
control where the values are located. Only one of the three
bits will be set; see ffi_prep_cif_machdep for the pattern. */
movd %xmm0, %r10
movd %xmm1, %r11
testl $0x100, %ecx
cmovnz %rax, %rdx
cmovnz %r10, %rax
testl $0x200, %ecx
cmovnz %r10, %rdx
testl $0x400, %ecx
cmovnz %r10, %rax
cmovnz %r11, %rdx
movq %rax, (%rsi)
movq %rdx, 8(%rsi)
/* Bits 12-31 contain the true size of the structure. Copy from
the scratch area to the true destination. */
shrl $12, %ecx
rep movsb
ret
/* Many times we can avoid loading any SSE registers at all.
It's not worth an indirect jump to load the exact set of
SSE registers needed; zero or all is a good compromise. */
.align 3
LUW3:
Lload_sse:
movdqa 48(%r10), %xmm0
movdqa 64(%r10), %xmm1
movdqa 80(%r10), %xmm2
movdqa 96(%r10), %xmm3
movdqa 112(%r10), %xmm4
movdqa 128(%r10), %xmm5
movdqa 144(%r10), %xmm6
movdqa 160(%r10), %xmm7
jmp Lret_from_load_sse
LUW4:
.align 3
.globl _ffi_closure_unix64
_ffi_closure_unix64:
LUW5:
/* The carry flag is set by the trampoline iff SSE registers
are used. Don't clobber it before the branch instruction. */
leaq -200(%rsp), %rsp
LUW6:
movq %rdi, (%rsp)
movq %rsi, 8(%rsp)
movq %rdx, 16(%rsp)
movq %rcx, 24(%rsp)
movq %r8, 32(%rsp)
movq %r9, 40(%rsp)
jc Lsave_sse
Lret_from_save_sse:
movq %r10, %rdi
leaq 176(%rsp), %rsi
movq %rsp, %rdx
leaq 208(%rsp), %rcx
call _ffi_closure_unix64_inner
/* Deallocate stack frame early; return value is now in redzone. */
addq $200, %rsp
LUW7:
/* The first byte of the return value contains the FFI_TYPE. */
movzbl %al, %r10d
leaq Lload_table(%rip), %r11
movslq (%r11, %r10, 4), %r10
addq %r11, %r10
jmp *%r10
Lload_table:
.long Lld_void-Lload_table /* FFI_TYPE_VOID */
.long Lld_int32-Lload_table /* FFI_TYPE_INT */
.long Lld_float-Lload_table /* FFI_TYPE_FLOAT */
.long Lld_double-Lload_table /* FFI_TYPE_DOUBLE */
.long Lld_ldouble-Lload_table /* FFI_TYPE_LONGDOUBLE */
.long Lld_int8-Lload_table /* FFI_TYPE_UINT8 */
.long Lld_int8-Lload_table /* FFI_TYPE_SINT8 */
.long Lld_int16-Lload_table /* FFI_TYPE_UINT16 */
.long Lld_int16-Lload_table /* FFI_TYPE_SINT16 */
.long Lld_int32-Lload_table /* FFI_TYPE_UINT32 */
.long Lld_int32-Lload_table /* FFI_TYPE_SINT32 */
.long Lld_int64-Lload_table /* FFI_TYPE_UINT64 */
.long Lld_int64-Lload_table /* FFI_TYPE_SINT64 */
.long Lld_struct-Lload_table /* FFI_TYPE_STRUCT */
.long Lld_int64-Lload_table /* FFI_TYPE_POINTER */
.text
.align 3
Lld_void:
ret
.align 3
Lld_int8:
movzbl -24(%rsp), %eax
ret
.align 3
Lld_int16:
movzwl -24(%rsp), %eax
ret
.align 3
Lld_int32:
movl -24(%rsp), %eax
ret
.align 3
Lld_int64:
movq -24(%rsp), %rax
ret
.align 3
Lld_float:
movss -24(%rsp), %xmm0
ret
.align 3
Lld_double:
movsd -24(%rsp), %xmm0
ret
.align 3
Lld_ldouble:
fldt -24(%rsp)
ret
.align 3
Lld_struct:
/* There are four possibilities here, %rax/%rdx, %xmm0/%rax,
%rax/%xmm0, %xmm0/%xmm1. We collapse two by always loading
both rdx and xmm1 with the second word. For the remaining,
bit 8 set means xmm0 gets the second word, and bit 9 means
that rax gets the second word. */
movq -24(%rsp), %rcx
movq -16(%rsp), %rdx
movq -16(%rsp), %xmm1
testl $0x100, %eax
cmovnz %rdx, %rcx
movd %rcx, %xmm0
testl $0x200, %eax
movq -24(%rsp), %rax
cmovnz %rdx, %rax
ret
/* See the comment above Lload_sse; the same logic applies here. */
.align 3
LUW8:
Lsave_sse:
movdqa %xmm0, 48(%rsp)
movdqa %xmm1, 64(%rsp)
movdqa %xmm2, 80(%rsp)
movdqa %xmm3, 96(%rsp)
movdqa %xmm4, 112(%rsp)
movdqa %xmm5, 128(%rsp)
movdqa %xmm6, 144(%rsp)
movdqa %xmm7, 160(%rsp)
jmp Lret_from_save_sse
LUW9:
.section __TEXT,__eh_frame,coalesced,no_toc+strip_static_syms+live_support
EH_frame1:
.set L$set$0,LECIE1-LSCIE1 /* CIE Length */
.long L$set$0
LSCIE1:
.long 0x0 /* CIE Identifier Tag */
.byte 0x1 /* CIE Version */
.ascii "zR\0" /* CIE Augmentation */
.byte 0x1 /* uleb128 0x1; CIE Code Alignment Factor */
.byte 0x78 /* sleb128 -8; CIE Data Alignment Factor */
.byte 0x10 /* CIE RA Column */
.byte 0x1 /* uleb128 0x1; Augmentation size */
.byte 0x10 /* FDE Encoding (pcrel sdata4) */
.byte 0xc /* DW_CFA_def_cfa, %rsp offset 8 */
.byte 0x7 /* uleb128 0x7 */
.byte 0x8 /* uleb128 0x8 */
.byte 0x90 /* DW_CFA_offset, column 0x10 */
.byte 0x1
.align 3
LECIE1:
.globl _ffi_call_unix64.eh
_ffi_call_unix64.eh:
LSFDE1:
.set L$set$1,LEFDE1-LASFDE1 /* FDE Length */
.long L$set$1
LASFDE1:
.long LASFDE1-EH_frame1 /* FDE CIE offset */
.quad LUW0-. /* FDE initial location */
.set L$set$2,LUW4-LUW0 /* FDE address range */
.quad L$set$2
.byte 0x0 /* Augmentation size */
.byte 0x4 /* DW_CFA_advance_loc4 */
.set L$set$3,LUW1-LUW0
.long L$set$3
/* New stack frame based off rbp. This is an itty bit of unwind
trickery in that the CFA *has* changed. There is no easy way
to describe it correctly on entry to the function. Fortunately,
it doesn't matter too much since at all points we can correctly
unwind back to ffi_call. Note that the location to which we
moved the return address is (the new) CFA-8, so from the
perspective of the unwind info, it hasn't moved. */
.byte 0xc /* DW_CFA_def_cfa, %rbp offset 32 */
.byte 0x6
.byte 0x20
.byte 0x80+6 /* DW_CFA_offset, %rbp offset 2*-8 */
.byte 0x2
.byte 0xa /* DW_CFA_remember_state */
.byte 0x4 /* DW_CFA_advance_loc4 */
.set L$set$4,LUW2-LUW1
.long L$set$4
.byte 0xc /* DW_CFA_def_cfa, %rsp offset 8 */
.byte 0x7
.byte 0x8
.byte 0xc0+6 /* DW_CFA_restore, %rbp */
.byte 0x4 /* DW_CFA_advance_loc4 */
.set L$set$5,LUW3-LUW2
.long L$set$5
.byte 0xb /* DW_CFA_restore_state */
.align 3
LEFDE1:
.globl _ffi_closure_unix64.eh
_ffi_closure_unix64.eh:
LSFDE3:
.set L$set$6,LEFDE3-LASFDE3 /* FDE Length */
.long L$set$6
LASFDE3:
.long LASFDE3-EH_frame1 /* FDE CIE offset */
.quad LUW5-. /* FDE initial location */
.set L$set$7,LUW9-LUW5 /* FDE address range */
.quad L$set$7
.byte 0x0 /* Augmentation size */
.byte 0x4 /* DW_CFA_advance_loc4 */
.set L$set$8,LUW6-LUW5
.long L$set$8
.byte 0xe /* DW_CFA_def_cfa_offset */
.byte 208,1 /* uleb128 208 */
.byte 0xa /* DW_CFA_remember_state */
.byte 0x4 /* DW_CFA_advance_loc4 */
.set L$set$9,LUW7-LUW6
.long L$set$9
.byte 0xe /* DW_CFA_def_cfa_offset */
.byte 0x8
.byte 0x4 /* DW_CFA_advance_loc4 */
.set L$set$10,LUW8-LUW7
.long L$set$10
.byte 0xb /* DW_CFA_restore_state */
.align 3
LEFDE3:
.subsections_via_symbols
#endif /* __x86_64__ */
|
T-Eric/rustos
| 4,450
|
os/src/link_app.S
|
.align 3
.section .data
.global _num_app
_num_app:
.quad 19
.quad app_0_start
.quad app_1_start
.quad app_2_start
.quad app_3_start
.quad app_4_start
.quad app_5_start
.quad app_6_start
.quad app_7_start
.quad app_8_start
.quad app_9_start
.quad app_10_start
.quad app_11_start
.quad app_12_start
.quad app_13_start
.quad app_14_start
.quad app_15_start
.quad app_16_start
.quad app_17_start
.quad app_18_start
.quad app_18_end
.global _app_names
_app_names:
.string "cat_filea"
.string "exit"
.string "fantastic_text"
.string "filetest_simple"
.string "forktest"
.string "forktest2"
.string "forktest_simple"
.string "forktree"
.string "hello_world"
.string "huge_write"
.string "initproc"
.string "matrix"
.string "sleep"
.string "sleep_simple"
.string "stack_overflow"
.string "user_shell"
.string "usertests"
.string "usertests_simple"
.string "yield"
.section .data
.global app_0_start
.global app_0_end
.align 3
app_0_start:
.incbin "../user/target/riscv64gc-unknown-none-elf/release/cat_filea"
app_0_end:
.section .data
.global app_1_start
.global app_1_end
.align 3
app_1_start:
.incbin "../user/target/riscv64gc-unknown-none-elf/release/exit"
app_1_end:
.section .data
.global app_2_start
.global app_2_end
.align 3
app_2_start:
.incbin "../user/target/riscv64gc-unknown-none-elf/release/fantastic_text"
app_2_end:
.section .data
.global app_3_start
.global app_3_end
.align 3
app_3_start:
.incbin "../user/target/riscv64gc-unknown-none-elf/release/filetest_simple"
app_3_end:
.section .data
.global app_4_start
.global app_4_end
.align 3
app_4_start:
.incbin "../user/target/riscv64gc-unknown-none-elf/release/forktest"
app_4_end:
.section .data
.global app_5_start
.global app_5_end
.align 3
app_5_start:
.incbin "../user/target/riscv64gc-unknown-none-elf/release/forktest2"
app_5_end:
.section .data
.global app_6_start
.global app_6_end
.align 3
app_6_start:
.incbin "../user/target/riscv64gc-unknown-none-elf/release/forktest_simple"
app_6_end:
.section .data
.global app_7_start
.global app_7_end
.align 3
app_7_start:
.incbin "../user/target/riscv64gc-unknown-none-elf/release/forktree"
app_7_end:
.section .data
.global app_8_start
.global app_8_end
.align 3
app_8_start:
.incbin "../user/target/riscv64gc-unknown-none-elf/release/hello_world"
app_8_end:
.section .data
.global app_9_start
.global app_9_end
.align 3
app_9_start:
.incbin "../user/target/riscv64gc-unknown-none-elf/release/huge_write"
app_9_end:
.section .data
.global app_10_start
.global app_10_end
.align 3
app_10_start:
.incbin "../user/target/riscv64gc-unknown-none-elf/release/initproc"
app_10_end:
.section .data
.global app_11_start
.global app_11_end
.align 3
app_11_start:
.incbin "../user/target/riscv64gc-unknown-none-elf/release/matrix"
app_11_end:
.section .data
.global app_12_start
.global app_12_end
.align 3
app_12_start:
.incbin "../user/target/riscv64gc-unknown-none-elf/release/sleep"
app_12_end:
.section .data
.global app_13_start
.global app_13_end
.align 3
app_13_start:
.incbin "../user/target/riscv64gc-unknown-none-elf/release/sleep_simple"
app_13_end:
.section .data
.global app_14_start
.global app_14_end
.align 3
app_14_start:
.incbin "../user/target/riscv64gc-unknown-none-elf/release/stack_overflow"
app_14_end:
.section .data
.global app_15_start
.global app_15_end
.align 3
app_15_start:
.incbin "../user/target/riscv64gc-unknown-none-elf/release/user_shell"
app_15_end:
.section .data
.global app_16_start
.global app_16_end
.align 3
app_16_start:
.incbin "../user/target/riscv64gc-unknown-none-elf/release/usertests"
app_16_end:
.section .data
.global app_17_start
.global app_17_end
.align 3
app_17_start:
.incbin "../user/target/riscv64gc-unknown-none-elf/release/usertests_simple"
app_17_end:
.section .data
.global app_18_start
.global app_18_end
.align 3
app_18_start:
.incbin "../user/target/riscv64gc-unknown-none-elf/release/yield"
app_18_end:
|
teskje/teaos
| 1,779
|
teaos/teaos/src/exception/vector.S
|
.macro vector name
.balign 128
.vector\@:
stp x18, x30, [sp, #-16]!
stp x16, x17, [sp, #-16]!
stp x14, x15, [sp, #-16]!
stp x12, x13, [sp, #-16]!
stp x10, x11, [sp, #-16]!
stp x8, x9, [sp, #-16]!
stp x6, x7, [sp, #-16]!
stp x4, x5, [sp, #-16]!
stp x2, x3, [sp, #-16]!
stp x0, x1, [sp, #-16]!
mrs x10, spsr_el1
mrs x11, elr_el1
stp x10, x11, [sp, #-16]!
mov x0, sp
bl handle_\name
ldp x10, x11, [sp], #16
msr elr_el1, x11
msr spsr_el1, x10
ldp x0, x1, [sp], #16
ldp x2, x3, [sp], #16
ldp x4, x5, [sp], #16
ldp x6, x7, [sp], #16
ldp x8, x9, [sp], #16
ldp x10, x11, [sp], #16
ldp x12, x13, [sp], #16
ldp x14, x15, [sp], #16
ldp x16, x17, [sp], #16
ldp x18, x30, [sp], #16
eret
// protect against vector overflow
.org .vector\@ + 128
.endm
.section .text.exception, "ax"
.balign 2048
.global exception_vectors
exception_vectors:
vector unhandled // Synchronous EL1 with SP_EL0
vector unhandled // IRQ EL1 with SP_EL0
vector unhandled // FIQ EL1 with SP_EL0
vector unhandled // SError EL1 with SP_EL0
vector exception_el1 // Synchronous EL1 with SP_ELx
vector unhandled // IRQ EL1 with SP_ELx
vector unhandled // FIQ EL1 with SP_ELx
vector unhandled // SError EL1 with SP_ELx
vector unhandled // Synchronous 64-bit EL0
vector unhandled // IRQ 64-bit EL0
vector unhandled // FIQ 64-bit EL0
vector unhandled // SError 64-bit EL0
vector unhandled // Synchronous 32-bit EL0
vector unhandled // IRQ 32-bit EL0
vector unhandled // FIQ 32-bit EL0
vector unhandled // SError 32-bit EL0
|
testaquatic/concurrent_programming
| 1,068
|
ch06/green_thread/asm/context.S
|
#define SET_CONTEXT set_context
#define SWITCH_CONTEXT switch_context
.global SET_CONTEXT
.global SWITCH_CONTEXT
.text
.align 4
SET_CONTEXT:
pop %rbp
xor %eax, %eax /* Direct invocation returns 0 */
movq %rbx, (%rdi)
movq %rbp, 8(%rdi)
movq %r12, 16(%rdi)
movq %r13, 24(%rdi)
movq %r14, 32(%rdi)
movq %r15, 40(%rdi)
lea 8(%rsp), %rdx
movq %rdx, 48(%rdi)
push %rbp
movq (%rsp), %rdx
movq %rdx, 56(%rdi)
ret
.text
.align 4
SWITCH_CONTEXT:
xor %eax, %eax
inc %eax /* Return 1 instead */
pop %rsi
movq (%rdi), %rbx
movq 8(%rdi), %rbp
movq 16(%rdi), %r12
movq 24(%rdi), %r13
movq 32(%rdi), %r14
movq 40(%rdi), %r15
movq 48(%rdi), %rdx
movq %rdx, %rsp
addq $0x8, %rsp
push %rbp
push %rsi
movq 56(%rdi), %rdx
jmpq *%rdx
|
TexasInstruments/mcupsdk-rm-pm-hal
| 3,327
|
lpm/cache.S
|
/*
* Cache support for low power functionality
*
*
* Copyright (C) 2024, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
.text
/* FUNCTION DEF: void cache_wb_data()
*
* Write back all of L1 data cache
*/
.global cache_wb_data
.type cache_wb_data,%function
.section ".text","ax",%progbits
.arm
.align 2
cache_wb_data:
stmfd sp!, {r0-r7, r9-r11, lr}
dmb // Ensure all previous memory accesses complete
mov r10, #0 // start clean at cache level 0 (L1)
mrs r6, cpsr
cpsid i // disable interrupts
mrc p15, #1, r1, c0, c0, #0 // read the csidr
msr cpsr_c, r6 // restore interrupts
and r2, r1, #7 // extract the length of the cache lines
add r2, r2, #4 // add 4 (line length offset)
mov r4, #0x3ff
ands r4, r4, r1, lsr #3 // find maximum number on the way size
clz r5, r4 // find bit position of way size inc.
mov r7, #0x7fff
ands r7, r7, r1, lsr #13 // extract max number of the index size
loop_way:
mov r9, r4 // create working copy of max way size
loop_set:
orr r11, r10, r9, lsl r5 // factor way and cache number into r11
orr r11, r11, r7, lsl r2 // factor index number into r11
mcr p15, #0, r11, c7, c10, #2 // clean line by set/way
subs r9, r9, #1 // decrement the way
bge loop_set
subs r7, r7, #1 // decrement the index
bge loop_way
dsb
ldmfd sp!, {r0-r7, r9-r11, lr}
bx lr
.end
|
TexasInstruments/mcupsdk-rm-pm-hal
| 4,985
|
pm/arch/arm/lib/umull16.S
|
;*****************************************************************************
;* umull16.asm - 16 bit code 32x32 -> 64 multiply. v15.12.3 *
;* *
;* Copyright (c) 2012-2016 Texas Instruments Incorporated *
;* http://www.ti.com/ *
;* *
;* Redistribution and use in source and binary forms, with or without *
;* modification, are permitted provided that the following conditions *
;* are met: *
;* *
;* Redistributions of source code must retain the above copyright *
;* notice, this list of conditions and the following disclaimer. *
;* *
;* Redistributions in binary form must reproduce the above copyright *
;* notice, this list of conditions and the following disclaimer in *
;* the documentation and/or other materials provided with the *
;* distribution. *
;* *
;* Neither the name of Texas Instruments Incorporated nor the names *
;* of its contributors may be used to endorse or promote products *
;* derived from this software without specific prior written *
;* permission. *
;* *
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS *
;* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT *
;* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR *
;* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT *
;* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
;* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT *
;* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, *
;* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY *
;* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
;* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE *
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
;* *
;*****************************************************************************
;*****************************************************************************
;* This routine does a 32x32->64 multiply by computing
;* four partial products and summing them, like so:
;*
;* AAAABBBB A:B = X
;* x CCCCDDDD C:D = Y
;* ---------------------
;* LLLLLLLL L = B*D
;* MMMM MMMM M = A*D
;* NNNN NNNN N = C*B
;* + HHHHHHHH H = A*C
;* ---------------------
;* RRRRRRRR RRRRRRRR R = X*Y
;*
;* This is useful in lieu of UMULL when only 16bit code is available.
;*
;*****************************************************************************
;* Calling convention:
;* 32 bit arguments X and Y are in r0 and r1
;* 64 bit result hi32:lo32 is left in r0:r1
;* All other registers preserved
;*****************************************************************************
.thumbfunc __TI_umull
.thumb
.global __TI_umull
__TI_umull: .asmfunc stack_usage(24)
PUSH { R2-R7 } ; LR not modified
; Move the hi/lo halves of the arguments into the
; low portion of separate registers:
LSRS R2, R0, #16 ; R2 = A
LSRS R3, R1, #16 ; R3 = C
MOVS R4, #0xFF ; R4 = 0xFFFF (temporary)
LSLS R4, R4, #8
ADDS R4, #0xFF
ANDS R0, R4 ; R0 = B
ANDS R1, R4 ; R1 = D
; Now we compute the four partial products:
MOVS R4, R1
MULS R4, R0 ; R4 = L
MOVS R5, R2
MULS R5, R3 ; R5 = H
MOVS R6, R0
MULS R6, R3 ; R6 = N
MOVS R7, R1
MULS R7, R2 ; R7 = M
; From here, we use R0:R1 to accumulate the sum of
; the partial products.
LSRS R2, R6, #16 ; R2 = Nhi
LSRS R3, R7, #16 ; R3 = Mhi
ADDS R0, R5, R2 ; R0 = H + Mhi
ADDS R0, R0, R3 ; R0 = H + Mhi + Nhi
LSLS R2, R6, #16 ; R2 = Nlo
LSLS R3, R7, #16 ; R3 = Mlo
; For the low half of the result, we have to keep track
; of overflow bits and add them to the high half.
MOVS R5, #0 ; We need a zeroed register
ADDS R1, R4, R2 ; R1 = L + Nlo
ADCS R0, R5 ; H = H + carry
ADDS R1, R1, R3 ; R1 = L + Nlo + Mlo
ADCS R0, R5 ; H = H + carry
; The full 64 bit result is now in R0:R1
POP { R2-R7 }
BX LR
.endasmfunc
|
TexasInstruments/mcupsdk-rm-pm-hal
| 4,124
|
pm/arch/arm/lib/ll_lsl16.S
|
;******************************************************************************
;* LL_LSL16.ASM - 16 BIT STATE - *
;* *
;* Copyright (c) 1996 Texas Instruments Incorporated *
;* http://www.ti.com/ *
;* *
;* Redistribution and use in source and binary forms, with or without *
;* modification, are permitted provided that the following conditions *
;* are met: *
;* *
;* Redistributions of source code must retain the above copyright *
;* notice, this list of conditions and the following disclaimer. *
;* *
;* Redistributions in binary form must reproduce the above copyright *
;* notice, this list of conditions and the following disclaimer in *
;* the documentation and/or other materials provided with the *
;* distribution. *
;* *
;* Neither the name of Texas Instruments Incorporated nor the names *
;* of its contributors may be used to endorse or promote products *
;* derived from this software without specific prior written *
;* permission. *
;* *
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS *
;* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT *
;* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR *
;* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT *
;* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
;* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT *
;* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, *
;* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY *
;* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
;* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE *
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
;* *
;******************************************************************************
;****************************************************************************
;* LL$LSL - LEFT SHIFT A 64 BIT LONG LONG NUMBER BY 1 to 64 bits
;****************************************************************************
;*
;* o INPUT OP1 IS IN r0:r1 (r1:r0 IF LITTLE ENDIAN)
;* o INPUT OP2 IS IN r2
;* o RESULT IS RETURNED IN r0:r1 (r1:r0 IF LITTLE ENDIAN)
;* o INPUT OP2 IN r2 IS NOT DESTROYED
;*
;****************************************************************************
.thumb
hi .set r1
lo .set r0
shft .set r2
.thumbfunc __aeabi_llsl
.global __aeabi_llsl
__aeabi_llsl: .asmfunc stack_usage(12)
PUSH {r3-r4}
MOVS r3, #32 ;
SUBS r3, r3, shft ;
BHI $1 ;
MOVS hi, lo ;
MOVS lo, #0 ;
NEGS r3, r3 ;
LSLS hi, r3 ;
B return ;
$1:
MOVS r4, lo ;
LSLS hi, shft ;
LSRS r4, r3 ;
ORRS hi, r4 ;
LSLS lo, shft ;
return:
POP {r3-r4}
BX lr
.endasmfunc
.end
|
TexasInstruments/mcupsdk-rm-pm-hal
| 4,255
|
pm/arch/arm/lib/ll_mul16.S
|
;******************************************************************************
;* LL_MUL16.ASM - 16 BIT STATE - v15.12.3 *
;* *
;* Copyright (c) 1996-2016 Texas Instruments Incorporated *
;* http://www.ti.com/ *
;* *
;* Redistribution and use in source and binary forms, with or without *
;* modification, are permitted provided that the following conditions *
;* are met: *
;* *
;* Redistributions of source code must retain the above copyright *
;* notice, this list of conditions and the following disclaimer. *
;* *
;* Redistributions in binary form must reproduce the above copyright *
;* notice, this list of conditions and the following disclaimer in *
;* the documentation and/or other materials provided with the *
;* distribution. *
;* *
;* Neither the name of Texas Instruments Incorporated nor the names *
;* of its contributors may be used to endorse or promote products *
;* derived from this software without specific prior written *
;* permission. *
;* *
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS *
;* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT *
;* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR *
;* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT *
;* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
;* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT *
;* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, *
;* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY *
;* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
;* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE *
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
;* *
;******************************************************************************
;****************************************************************************
;* LL$MUL - MULTIPLY TWO 64 BIT SIGNED LONG LONG NUMBERS
;****************************************************************************
;*
;* o INPUT OP1 IS IN r0:r1 (r1:r0 IF LITTLE ENDIAN)
;* o INPUT OP2 IS IN r2:r3 (r3:r2 IF LITTLE ENDIAN)
;* o RESULT IS RETURNED IN r0:r1 (r1:r0 IF LITTLE ENDIAN)
;* o INPUT OP2 IN r2:r3 IS NOT DESTROYED
;*
;* o THE UPPER 64 BITS OF THE 64 X 64 MULTIPLICATION RESULT IS IGNORED.
;*
;****************************************************************************
.thumb
.global __TI_umull
; Not used by TI tools - multiply generated inline
l1_hi .set r1
l1_lo .set r0
l2_hi .set r3
l2_lo .set r2
.thumbfunc __aeabi_lmul
.global __aeabi_lmul
__aeabi_lmul: .asmfunc stack_usage(12)
PUSH {r4-r5, lr}
MOVS r4, l2_lo
MULS r4, l1_hi
MOVS r5, r4
MOVS r4, l2_hi
MULS r4, l1_lo
ADDS r4, r5
; Multiply the low halves
MOVS r5, l1_lo
MOVS r0, l2_lo
MOVS r1, r5
BL __TI_umull
; Accumulate partial products
ADDS r0, r4
; Move the result into the right place
MOVS r4, r0
MOVS r5, r1
MOVS l1_hi, r4
MOVS l1_lo, r5
POP {r4-r5, pc}
.endasmfunc
.end
|
TexasInstruments/mcupsdk-rm-pm-hal
| 4,128
|
pm/arch/arm/lib/ll_lsr16.S
|
;******************************************************************************
;* LL_LSR16.ASM - 16 BIT STATE - v15.12.3 *
;* *
;* Copyright (c) 1996-2016 Texas Instruments Incorporated *
;* http://www.ti.com/ *
;* *
;* Redistribution and use in source and binary forms, with or without *
;* modification, are permitted provided that the following conditions *
;* are met: *
;* *
;* Redistributions of source code must retain the above copyright *
;* notice, this list of conditions and the following disclaimer. *
;* *
;* Redistributions in binary form must reproduce the above copyright *
;* notice, this list of conditions and the following disclaimer in *
;* the documentation and/or other materials provided with the *
;* distribution. *
;* *
;* Neither the name of Texas Instruments Incorporated nor the names *
;* of its contributors may be used to endorse or promote products *
;* derived from this software without specific prior written *
;* permission. *
;* *
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS *
;* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT *
;* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR *
;* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT *
;* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
;* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT *
;* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, *
;* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY *
;* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
;* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE *
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
;* *
;******************************************************************************
;****************************************************************************
;* LL$LSR - RIGHT SHIFT A 64 BIT UNSIGNED LONG LONG NUMBER BY 1 to 64 bits
;****************************************************************************
;*
;* o INPUT OP1 IS IN r0:r1 (r1:r0 IF LITTLE ENDIAN)
;* o INPUT OP2 IS IN r2
;* o RESULT IS RETURNED IN r0:r1 (r1:r0 IF LITTLE ENDIAN)
;* o INPUT OP2 IN r2 IS NOT DESTROYED
;*
;****************************************************************************
.thumb
hi .set r1
lo .set r0
shft .set r2
.thumbfunc __aeabi_llsr
.global __aeabi_llsr
__aeabi_llsr: .asmfunc stack_usage(12)
PUSH {r3-r4}
MOVS r3, #32 ;
SUBS r3, r3, shft ;
BHI $1 ;
MOVS lo, hi ;
MOVS hi, #0 ;
NEGS r3, r3 ;
LSRS lo, r3 ;
B return ;
$1:
MOVS r4, hi ;
LSRS lo, shft ;
LSLS r4, r3 ;
ORRS lo, r4 ;
LSRS hi, shft ;
return:
POP {r3-r4}
BX lr
.endasmfunc
.end
|
TexasInstruments/mcupsdk-rm-pm-hal
| 1,226
|
app/linkercmd/arm_stub.ld.S
|
/*
* DMSC firmware
*
* Cortex-M3 (CM3) firmware for security
*
* Copyright (C) 2017-2019 Texas Instruments Incorporated - http://www.ti.com/
*
* This software is licensed under the standard terms and conditions in the
* Texas Instruments Incorporated Technology and Software Publicly
* Available Software License Agreement, a copy of which is included in
* the software download.
*/
#include <config.h>
--args 0x0
-heap 0x0
-stack 0x800
stack_size = 0x400;
MEMORY
{
NSPS: org = CONFIG_LNK_NSPS_BASE len = CONFIG_LNK_NSPS_LEN
}
-e _stub_start
SECTIONS
{
.text: load = CONFIG_LNK_NSPS_BASE
{
_privileged_code_begin = .;
_text_secure_start = .;
secure.o(.text:entry.o*)
*(.text:*)
*(.const:*)
_text_secure_end = .;
_privileged_code_end = .;
}
.data:
{
_privileged_data_begin = .;
*(.data:*)
_privileged_data_end = .;
} > NSPS
.bss
{
_start_bss = .;
*(.bss:*)
_end_bss = .;
} > NSPS
.stack
{
. = ALIGN(0x8);
_start_stack = .;
. += stack_size;
_end_stack = .;
} > NSPS
}
|
TexasInstruments/mcupsdk-rm-pm-hal
| 7,995
|
app/dmstub/entry.S
|
/*
* Copyright (C) 2021-2024 Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
.global _stub_start
.global _stub_resume
.global undef_handler
.global swi_handler
.global prefetch_abt_handler
.global data_abt_handler
.global reserved_handler
.global irq_handler
.global fiq_handler
.global stub_entry
.global _end_stack
.global __mpu_init
.text
.global _lpm_vectors
.arm
.no_dead_strip
_lpm_vectors:
_reset: ldr pc, _reset_handler
_undef: ldr pc, _undef_handler
_swi: ldr pc, _swi_handler
_prefetch_abt: ldr pc, _prefetch_abt_handler
_data_abt: ldr pc, _data_abt_handler
_reserved: ldr pc, _reserved_handler
_irq: ldr pc, _irq_handler
_fiq: ldr pc, _fiq_handler
_reset_handler:
.word _stub_start
_undef_handler:
.word undef_handler
_swi_handler:
.word swi_handler
_prefetch_abt_handler:
.word prefetch_abt_handler
_data_abt_handler:
.word data_abt_handler
_reserved_handler:
.word reserved_handler
_irq_handler:
.word irq_handler_asm
_fiq_handler:
.word fiq_handler
_end_lpm_vectors:
_reset_vector_address:
.word 0x00000000
_stub_start:
// Check if it is IO DDR exit
ldr r0, =0x43018318
ldr r1, [r0]
ldr r0, =0x555555
subs r1, r1, r0
beq _stub_resume
// save r4-r11 registers
stmdb sp!,{r4-r11}
// Save current stack pointer
adr r1, _sys_stack_pointer
str sp, [r1]
adr r1, _sys_lr_register
str lr, [r1]
// Copy vector table
adr r0, _reset
ldr r1, _reset_vector_address
MOV r2, #0x10
wordcopy:
ldr r3, [r0], #4
str r3, [r1], #4
SUBS r2, r2, #1
BNE wordcopy
// switch to irq mode, set irq stack
mrs r0, cpsr
mvn r1, #0x1f
and r2, r1, r0
orr r2, r2, #0x12
msr cpsr_cf, r2
adr r1, _sys_irq_stack_pointer // save the current irq stack pointer
str sp, [r1]
ldr r13, _irq_stack_addr
mov r14,#0
//switch to fiq mode and save stack pointer
mrs r0, cpsr
bic r0, r0, #0x1f
orr r0, r0, #0x11
msr cpsr_cf, r0
adr r1, _sys_fiq_stack_pointer
str sp, [r1]
//switch to abort mode and save stack pointer
mrs r0, cpsr
bic r0, r0, #0x1f
orr r0, r0, #0x17
msr cpsr_cf, r0
adr r1, _sys_abort_stack_pointer
str sp, [r1]
//switch to undefined mode and save stack pointer
mrs r0, cpsr
bic r0, r0, #0x1f
orr r0, r0, #0x1b
msr cpsr_cf, r0
adr r1, _sys_undefined_stack_pointer
str sp, [r1]
//switch to supervisor mode and save stack pointer
mrs r0, cpsr
bic r0, r0, #0x1f
orr r0, r0, #0x13
msr cpsr_cf, r0
adr r1, _sys_supervisor_stack_pointer
str sp, [r1]
// switch to SYS mode
mrs r0, cpsr
mvn r1, #0x1f
and r2, r1, r0
orr r2, r2, #0x1f
msr cpsr_cf, r2
// initialize the stack
ldr sp, _stack_addr
// Space for the jump
nop
nop
// At this point we should be CPU0
// jump to proper reset handler
bl stub_entry
//save the return value to r3
mov r3, r0
// switching back to DDR
// disable interrupt
cpsid i
// switch to irq mode, set irq stack
mrs r0, cpsr
mvn r1, #0x1f
and r2, r1, r0
orr r2, r2, #0x12
msr cpsr_cf, r2
ldr r13, _sys_irq_stack_pointer
mov r14,#0
//switch to fiq mode and restore stack pointer
mrs r0, cpsr
bic r0, r0, #0x1f
orr r0, r0, #0x11
msr cpsr_cf, r0
ldr r13, _sys_fiq_stack_pointer
//switch to abort mode and restore stack pointer
mrs r0, cpsr
bic r0, r0, #0x1f
orr r0, r0, #0x17
msr cpsr_cf, r0
ldr r13, _sys_abort_stack_pointer
//switch to undefined ort mode and restore stack pointer
mrs r0, cpsr
bic r0, r0, #0x1f
orr r0, r0, #0x1b
msr cpsr_cf, r0
ldr r13, _sys_undefined_stack_pointer
//switch to supervisor mode and restore stack pointer
mrs r0, cpsr
bic r0, r0, #0x1f
orr r0, r0, #0x13
msr cpsr_cf, r0
ldr r13, _sys_supervisor_stack_pointer
// switch to SYS mode
mrs r0, cpsr
mvn r1, #0x1f
and r2, r1, r0
orr r2, r2, #0x1f
msr cpsr_cf, r2
//restore the return value from r3
mov r0, r3
// reload the stack
ldr sp, _sys_stack_pointer
ldmia sp!,{r4-r11}
// Space for the jump
nop
nop
ldr pc, _sys_lr_register
irq_handler_asm:
stmdb sp!,{r0-r3,r12,lr}
bl irq_handler
ldmia sp!,{r0-r3,r12,lr}
subs pc, lr, #4
_stub_resume:
// Disable FIQ and IRQ
mrs r0, cpsr
orr r0, r0, #0xC0
msr cpsr_cf, r0
#ifdef __ARM_FP
// Setup priveleged and user mode access to CP10, CP11
// required to enable NEON/VFP coprocessor access
// ctrl reg BITS [23:22] - CP11, [21:20] - CP10 = b11
mrc p15,#0x0,r0,c1,c0,#2
mov r3,#0xf00000
orr r0,r0,r3
mcr p15,#0x0,r0,c1,c0,#2
// Set the EN bit, FPEXC[30] to enable NEON AND VFP
mov r0,#0x40000000
fmxr fpexc,r0
#endif
// Set to SYSTEM mode
mrs r0, cpsr
bic r0, r0, #0x1F
orr r0, r0, #0x1F
msr cpsr_cf, r0
// Initialize the stack
ldr sp, _stack_addr
// Space for the jump
nop
nop
// Call the __mpu_init hook function.
bl __mpu_init
// At this point we should be CPU0
// jump to proper reset handler
bl stub_resume
//save the return value to r3
mov r3, r0
// switching back to DDR
// disable interrupt
cpsid i
// switch to irq mode, set irq stack
mrs r0, cpsr
mvn r1, #0x1f
and r2, r1, r0
orr r2, r2, #0x12
msr cpsr_cf, r2
ldr r13, _sys_irq_stack_pointer
mov r14,#0
//switch to fiq mode and restore stack pointer
mrs r0, cpsr
bic r0, r0, #0x1f
orr r0, r0, #0x11
msr cpsr_cf, r0
ldr r13, _sys_fiq_stack_pointer
//switch to abort mode and restore stack pointer
mrs r0, cpsr
bic r0, r0, #0x1f
orr r0, r0, #0x17
msr cpsr_cf, r0
ldr r13, _sys_abort_stack_pointer
//switch to undefined ort mode and restore stack pointer
mrs r0, cpsr
bic r0, r0, #0x1f
orr r0, r0, #0x1b
msr cpsr_cf, r0
ldr r13, _sys_undefined_stack_pointer
//switch to supervisor mode and restore stack pointer
mrs r0, cpsr
bic r0, r0, #0x1f
orr r0, r0, #0x13
msr cpsr_cf, r0
ldr r13, _sys_supervisor_stack_pointer
// switch to SYS mode
mrs r0, cpsr
mvn r1, #0x1f
and r2, r1, r0
orr r2, r2, #0x1f
msr cpsr_cf, r2
//restore the return value from r3
mov r0, r3
// reload the stack
ldr sp, _sys_stack_pointer
ldmia sp!,{r4-r11}
// Space for the jump
nop
nop
ldr pc, _sys_lr_register
_stack_addr:
.word _end_stack
_irq_stack_addr:
.word _end_stack - 0x200
_sys_stack_pointer:
.word 0x00000000
_sys_lr_register:
.word 0x00000000
_sys_irq_stack_pointer:
.word 0x00000000
_sys_fiq_stack_pointer:
.word 0x00000000
_sys_abort_stack_pointer:
.word 0x00000000
_sys_undefined_stack_pointer:
.word 0x00000000
_sys_supervisor_stack_pointer:
.word 0x00000000
|
thaliaarchi/unix-1972-tapes
| 6,267
|
s1/block1.s
|
/ Block 1 of s1-bits
/ It was written by /usr/sys/maki.s in s2 and was populated from the contents of
/ buf when that program was run.
/ Documented in V1 and V2 bproc(7).
/ This version appears to be between settings in the V1 and V2 manuals. It has
/ the following settings:
/ * ??? V2 (was 173700 or 73700 in V1)
/ * 0 both
/ * 1 both
/ * 2 V1 only
/ * 10 both
/ * 20 V2 only
/ * 40 V2 only
/ * 57500 V1 (changed to 77500 in V2)
/ This program is loaded at address 054000.
base = 54000
sr = 177570 / #define SR ((int *)0177570) /* Switch register */
/ /* Tape control registers */
tccm = 177342 / #define TCCM ((int *)0177342) /* Command register */
/ /* Disk control registers */
/ #define DCS ((int *)0177460) /* Disk control status register */
/ #define WC ((int *)0177462) /* Word count register */
/ #define CMA ((int *)0177464) /* Current memory address */
/ #define DAR ((int *)0177466) /* Disk address register */
/ #define DAE ((int *)0177470) /* Disk address extension error register */
dbr = 177472 / #define DBR ((int *)0177472) /* Data buffer register */
block1: / block1()
/ {
/ register int *t; /* r1 */
mov pc,sp / pc == 54000
mov $base+tab,r1 / /* Search the table for a key matching SR */
1: / for (t = tab; t != tab + 7; t++) {
cmp *$sr,(r1)+ / if (*SR == t->srval)
beq 2f / return(t->f());
tst (r1)+
cmp r1,$base+L1
bne 1b / }
br L1 / goto L1; /* Warm Unix */
2:
jmp *0(r1) /
/ struct entry {
/ int srval;
/ int (*f)();
/ };
tab: / struct entry tab[] = {
000000; base+L5 / {000000, L5}, /* Load standard Unix binary paper tape and transfer to it */
057500; base+L6 / {057500, L6}, /* Load standard DEC absolute and binary loaders and transfer to it */
000010; base+L8 / {000010, L8}, /* Dump memory onto a drive then halt */
000020; base+L12 / {000020, L12}, /* Read 256 words from disk into memory and transfer to it */
000040; base+L9 / {000040, L9}, /* Dump memory onto a drive then load Warm Unix */
000001; base+L2 / {000001, L2}, /* Cold Unix */
000002; base+L3 / {000002, L3}, /* Read the unassigned 3K program and transfer to it */
/ };
L1: / L1: /* Warm Unix */
/ /* Read 6144 words from disk 0 track 120 word 1024 to address 0.
/ * This is at word 120*2048+1024 from the disk start,
/ * which was copied from words 1280-7424 in the tape. */
jsr r0,diskcmd / diskcmd(
3 / DAE / 03|DISK(0), /* DAE: track address (bits 5-6) and disk */
142000 / DAR / 02000|(030<<11), /* DAR: word address and track address (bits 0-4)
0 / CMA / 0, /* CMA: memory address */
-14000 / WC / -6144, /* WC: transfer 6144 words */
5 / DCS / GO|D_READ, /* DCS: command */
/ );
L2: / L2:
/ /* Read 7680 words from disk 0 track 123 word 1024 to address 0.
/ * This is word 123*2048+1024 from the disk start. */
jsr r0,diskcmd / diskcmd(
3 / DAE / 03|DISK(0), /* DAE: track address (bits 5-6) and disk */
156000 / DAR / 02000|(033<<11), /* DAR: word address and track address (bits 0-4)
0 / CMA / 0, /* CMA: memory address */
-17000 / WC / -7680, /* WC: transfer 7680 words */
5 / DCS / GO|D_READ, /* DCS: command */
/ );
L3: / L3:
/ /* Read 1536 words from disk 0 track 126 word 1024 to address 0.
/ * This is word 126*2048+1024 from the disk start. */
jsr r0,diskcmd / diskcmd(
3 / DAE / 03|DISK(0), /* DAE: track address (bits 5-6) and disk */
172000 / DAR / 02000|(036<<11), /* DAR: word address and track address (bits 0-4)
0 / CMA / 0, /* CMA: memory address */
-3000 / WC / -1536, /* WC: transfer 1536 words */
5 / DCS / GO|D_READ, /* DCS: command */
/ );
/ /* Sends the given command to the disk controller. */
diskcmd: / diskcmd(dae, dar, cma, wc, dcs)
/ {
/ int s;
mov $dbr,r1
mov (r0)+,-(r1) / *DAE = dae;
mov (r0)+,-(r1) / *DAR = dar;
mov (r0)+,-(r1) / *CMA = cma;
mov (r0)+,-(r1) / *WC = wc;
mov (r0)+,-(r1) / *DCS = dcs;
1: / do {
mov (r1),r0 / s = *DCS;
blt block1 / if (s < 0)
/ goto block1;
tstb r0 / /* Until the DCS ready bit is set */
bge 1b / } while((char)s >= 0);
000167; 124206 / jmp 125400 / goto TODO;
/ /* Apparently does not pop sp */
/ }
L5:
jsr r0,L7
base+410
L6:
jsr r0,L7
base+550
L7:
mov (r0),r0
mov $57500,r1
1:
mov (r0)+,(r1)+
cmp r1,$60000
bne 1b
000167; 003250 / jmp 4500
L8:
jsr pc,L10
000000
jmp block1
L9:
jsr pc,L10
jmp L1
L10:
mov $tccm,r5
L11:
mov $7403,(r5)
1:
tstb (r5)
bge 1b
tst (r5)
bge L11
tst 177776(r5)
bge L11
mov $177350,r1
mov $3403,(r5)
1:
tstb (r5)
bge 1b
tst (r5)
blt L11
tst (r1)
bne L11
clr -(r1)
mov $150000,-(r1)
mov $3415,-(r1)
1:
tstb (r5)
bge 1b
tst (r5)
blt L11
mov $7403,(r5)
rts pc
L12:
mov $177414,r1
clr -(r1)
clr -(r1)
mov $177400,-(r1)
mov $5,-(r1)
1:
tstb (r1)
bge 1b
tst (r1)
blt L12
jmp *$0
L13:
mov pc,sp
clr r5
clr r1
L14:
jsr pc,L19
tst r0
beq L14
mov r0,r2
bge L15
1:
clrb (r5)+
inc r2
bne 1b
jsr pc,L17
br L14
L15:
dec r2
bne L16
jsr pc,L17
000167; 120216 / jmp 121700
L16:
jsr pc,L19
movb r0,(r5)+
dec r2
bne L16
jsr pc,L17
br L14
L17:
jsr pc,L19
tstb r1
bne 1f
rts pc
1:
000000 / halt
br L13
L19:
005267; 117324 / inc 121050
L20:
005767; 117320 / tst 121050
blt L19
105767; 117312 / tstb 121050
bge L20
116700; 117306 / movb 121052,r0
add r0,r1
rts pc
mov pc,sp
cmp -(sp),-(sp)
mov pc,r5
add $114,r5
clr r1
L21:
mov *$177570,(sp)
ror (sp)
bcs 1f
clr (sp)
br L22
1:
clc
rol (sp)
bne L22
mov r1,(sp)
L22:
clr r0
jsr pc,(r5)
decb r3
bne L22
jsr pc,(r5)
jsr pc,L25
mov r4,r2
sub $4,r2
cmp $2,r2
beq L26
jsr pc,L25
add (sp),r4
mov r4,r1
L23:
jsr pc,(r5)
bge 1f
tstb r0
beq L22
L24:
000000 / halt
br L22
1:
movb r3,(r1)+
br L23
016703; 000150 / mov 2046,r3
incb (r3)
1:
tstb (r3)
bpl 1b
movb 2(r3),r3
add r3,r0
bic $177400,r3
dec r2
rts pc
L25:
mov (sp)+,L27
jsr pc,(r5)
mov r3,r4
jsr pc,(r5)
swab r3
bis r3,r4
mov L27,pc
L26:
jsr pc,L25
jsr pc,(r5)
tstb r0
bne L24
asr r4
bcc 1f
000000 / halt
br L21
1:
asl r4
jmp (r4)
L27:
000000 / halt
000000 / halt
000000 / halt
|
thaliaarchi/unix-1972-tapes
| 8,018
|
s1/block0.s
|
/ Block 0 of s1-bits
/ It was assembled from /usr/sys/maki.s in s2, starting at label vcboot, and
/ written by the same program. Documented in V1 and V2 bproc(7).
/ This reads data from the tape, writes it to disk, then executes it.
/
/ This program is from bytes 0-290 of the tape. It copies 32768 bytes from the
/ tape at bytes 512-33280 to the disk at bytes 491520-524288. Afterwards, bytes
/ 16896-31232 followed by bytes 512-16896 from the tape are loaded into memory
/ at address 020000. It then executes the code at address 054000, which is from
/ byte offset 512 in the disk.
/
/ It manipulates device registers for the RC11 DECtape controller and RF11
/ DECdisk controller. References:
/ * TC11 DECtape system manual, Chapter 4 Programming Information and Table 3-3,
/ https://bitsavers.org/pdf/dec/dectape/tc11/TC11_Mantenance_Manual.pdf
/ * RF11/RS11 DECdisk system manual, Chapter 3 Programming and Section 1.3.3 Logic Format,
/ https://bitsavers.org/pdf/dec/unibus/DEC-11-HRFB-D__RF11_RS11_DECdisk_System_Manual__Aug71.pdf
/ * https://gunkies.org/wiki/TC11_DECtape_controller
/ * https://gunkies.org/wiki/RF11_disk_controller
/ /* Tape control registers */
/ #define TCST ((int *)0177340) /* Control and status register */
tccm = 177342 / #define TCCM ((int *)0177342) /* Command register */
/ #define TCWC ((int *)0177344) /* Word count register */
/ #define TCBA ((int *)0177346) /* Bus address register */
tcdt = 177350 / #define TCDT ((int *)0177350) /* Data register */
/ /* Disk control registers */
/ #define DCS ((int *)0177460) /* Disk control status register */
/ #define WC ((int *)0177462) /* Word count register */
/ #define CMA ((int *)0177464) /* Current memory address */
/ #define DAR ((int *)0177466) /* Disk address register */
/ #define DAE ((int *)0177470) /* Disk address extension error register */
dbr = 177472 / #define DBR ((int *)0177472) /* Data buffer register */
/ #define MA ((int *)0177474) /* Maintenance register */
/ #define ADS ((int *)0177476) /* Address of disk segment register */
/ /* Common TCCM and DCS bits */
/ #define GO 1 /* Start executing a new function */
/ #define READY (1<<7) /* Ready */
/ #define ERROR (1<<15) /* Error condition */
/ /* TCCM bits */
/ #define T_SAT (0<<1) /* Function: stop all transports */
/ #define T_RNUM (1<<1) /* Function: read block number */
/ #define T_RDATA (2<<1) /* Function: read data */
/ #define T_RALL (3<<1) /* Function: read all */
/ #define T_SST (4<<1) /* Function: stop selected transport */
/ #define T_WRTM (5<<1) /* Function: write timing and mark trace */
/ #define T_WDATA (6<<1) /* Function: write data */
/ #define T_WALL (7<<1) /* Function: write all */
/ #define TAPE(n) (n<<8) /* Select tape unit n (0-7) */
/ #define T_FWD (0<<11) /* Forward direction */
/ #define T_REV (1<<11) /* Reverse direction */
/ /* DCS bits */
/ #define D_NOP (0<<1) /* Function: nop */
/ #define D_WRITE (1<<1) /* Function: write */
/ #define D_READ (2<<1) /* Function: read */
/ #define D_WRTCK (3<<1) /* Function: write check */
/ /* DAE bits */
/ #define DISK(n) (n<<2) /* Select disk n (0-7) */
/ /* Wait until the TCCM ready bit is set, indicating
/ * that the current command has completed execution. */
/ #define tcwait() while (*(char *)TCCM >= 0)
/ /* Test whether the TCCM error bit is set. */
/ #define tcerror() (*TCCM < 0)
/ /* Wait until the DCS ready bit is set, indicating
/ * that the current command has completed execution. */
/ #define dwait() while (*(char *)TCCM >= 0)
/ /* Test whether the DCS error bit is set. */
/ #define derror() (*DCS < 0)
mov $20000,sp / int buf[8192+7168]; /* Buffer at address 020000 */
/ main()
/ {
/ /* Read 8192 words from tape 0 block 1 to buf.
/ * Block 1 is at word 1*256. */
jsr r5,tapecmd / tapecmd(
1 / Block number / 1, /* Block number 1 */
20000 / TCBA / buf, /* TCBA: memory address */
-20000 / TCWC / -8192, /* TCWC: transfer 8192 words */
5 / TCCM / GO|T_RALL|TAPE(0)|T_FWD, /* TCCM: command */
/ );
/ /* Write 8192 words from buf to disk 0 track 120.
/ * Track 120 is at word 120*2048. */
jsr r5,diskcmd / diskcmd(
3 / DAE / 03|DISK(0), /* DAE: track address (bits 5-6) and disk */
140000 / DAR / 030<<11, /* DAR: track address (bits 0-4) */
20000 / CMA / buf, /* CMA: memory address */
-20000 / WC / -8192, /* WC: transfer 8192 words */
3 / DCS / GO|D_WRITE, /* DCS: command */
/ );
/ /* Read 8192 words from tape 0 block 33 to buf.
/ * Block 33 is at word 33*256, or 8192 words after block 1. */
jsr r5,tapecmd / tapecmd(
41 / Block number / 33, /* Block number 33 */
20000 / TCBA / buf, /* TCBA: memory address */
-20000 / TCWC / -8192, /* TCWC: transfer 8192 words */
5 / TCCM / GO|T_RALL|TAPE(0)|T_FWD, /* TCCM: command */
/ );
/ /* Write 8192 words from buf to disk 0 track 124.
/ * Track 124 is at word 124*2048, or 8192 words after track 120. */
jsr r5,diskcmd / diskcmd(
3 / DAE / 03|DISK(0), /* DAE: track address (bits 5-6) and disk */
160000 / DAR / 034<<11, /* DAR: track address (bits 0-4) */
20000 / CMA / buf, /* CMA: memory address */
-20000 / WC / -8192, /* WC: transfer 8192 words */
3 / DCS / GO|D_WRITE, /* DCS: command */
/ );
/ /* Read 8192 words from disk 0 track 120 to address &buf[7168]. */
jsr r5,diskcmd / diskcmd(
3 / DAE / 03|DISK(0), /* DAE: track address (bits 5-6) and disk */
140000 / DAR / 030<<11, /* DAR: track address (bits 0-4) */
54000 / CMA / &buf[7168], /* CMA: memory address */
-2000 / WC / -1024, /* WC: transfer 8192 words */
5 / DCS / GO|D_READ, /* DCS: command */
/ );
jmp *$54000 / ((int (*)()) &buf[7168])();
/ };
/ /* Seeks to the given block in tape 0, then writes
/ * ba, wc, and cm to TCBA, TCWC, and TCCM, respectively.
tapecmd: / tapecmd(block, ba, wc, cm)
/ {
/ int b;
seekfwd: / seekfwd:
mov $tcdt,r0
mov $tccm,r1
/ /* Seek forward in tape 0 to the next block
/ * and read its block number into TCDT */
mov $3,(r1) / *TCCM = GO|T_RNUM|TAPE(0)|T_FWD;
1:
tstb (r1) / tcwait();
bge 1b
tst (r1) / error? / if (tcerror())
blt seekrev / goto seekrev;
/ b = *TCDT;
cmp (r5),(r0) / if (b == block)
beq found / goto found;
bgt seekfwd / if (b < block)
/ goto seekfwd;
seekrev: / seekrev:
/ /* Seek backward in tape 0 to the next block
/ * and read its block number into TCDT */
mov $4003,(r1) / *TCCM = GO|T_RNUM|TAPE(0)|T_REV;
1:
tstb (r1) / tcwait();
bge 1b
tst (r1) / if (tcerror())
blt seekfwd / goto seekfwd;
mov (r0),r2
add $5,r2 / /* Let it over-seek, before switching back to forward */
cmp (r5),r2 / if (*TCDT + 5 < block)
bgt seekfwd / goto seekfwd;
br seekrev / goto seekrev;
found: / found:
tst (r5)+
mov (r5)+,-(r0) / *TCBA = ba;
mov (r5)+,-(r0) / *TCWC = wc;
mov (r5)+,-(r0) / *TCCM = cm;
1:
tstb (r0) / tcwait();
bge 1b
tst (r0) / error? / if (tcerror())
bge 2f
sub $8.,r5
br seekfwd / goto seekfwd;
2:
/ /* Stop tape motion for tape 0 */
mov $1,(r0) / *TCCM = GO|T_SAT|TAPE(0);
rts r5
/ }
/ /* Sends the given command to the disk controller. */
diskcmd: / diskcmd(dae, dar, cma, wc, dcs)
/ {
/ retry:
mov $dbr,r0
mov (r5)+,-(r0) / *DAE = dae;
mov (r5)+,-(r0) / *DAR = dar;
mov (r5)+,-(r0) / *CMA = cma;
mov (r5)+,-(r0) / *WC = wc;
mov (r5)+,-(r0) / *DCS = dcs;
1:
tstb (r0) / dwait();
bge 1b
tst (r0) / if (derror())
bge 2f
sub $10.,r5
br diskcmd / goto retry;
2:
rts r5
/ }
</dev/tap7\0>
</dev/rf0\0>
</etc/init\0>
</etc/getty\0>
</bin/chmod\0>
</bin/date\0>
</bin/login\0>
</bin/mkdir\0>
</bin/sh\0>
</bin/tap\0>
</bin/ls\0>
|
TheCatster/mros
| 10,370
|
asm/x86_64/kernel_entry.S
|
/*
* kernel_entry.S - kernel initialization, multiboot2 (Assignment 1, CSE 597)
* Copyright 2023 Ruslan Nikolaev <rnikola@psu.edu>
*/
.global _start, kernel_stack
.extern kernel_start
.code32
.text
header_start:
.long 0xe85250d6 /* multiboot2 */
.long 0 /* x86 32-bit */
.long header_end - header_start /* header size */
.long -(0xe85250d6 + 0 + (header_end - header_start)) /* checksum */
.align 8
.word 0
.word 0
.long 8 /* end tag */
header_end:
_start:
cli /* disable interrupts */
movb $0xFF, %al /* disable PIC */
outb %al, $0xA1
outb %al, $0x21
lgdt (gdt_ptr)
ljmp $0x08, $_start32 /* %cs = 0x08 */
_start32:
movl $0x18, %eax /* %ds = %ss = %es = 0x18 */
movl %eax, %ds
movl %eax, %ss
movl %eax, %es
xorl %eax, %eax /* %fs = %gs = 0x00 */
movl %eax, %fs
movl %eax, %gs
movl %cr4, %eax
btsl $5, %eax /* enable PAE */
movl %eax, %cr4
movl $temp_pml4, %eax /* place a temporary page table */
movl %eax, %cr3
movl $0xc0000080, %ecx /* enable long mode */
rdmsr
btsl $8, %eax
wrmsr
movl %cr0, %eax /* enable paging */
btsl $31, %eax
movl %eax, %cr0
ljmp $0x10, $_start64 /* %cs = 0x10 */
.code64
_start64:
movl %ebx, %edi /* multiboot2 info */
movq $0x200000, %rsi /* free memory: after 2 MiB */
movq $kernel_stack, %rsp
callq kernel_start
.data
/* Global Descriptor Table (GDT) */
.align 64
gdt:
.quad 0x0000000000000000
.quad 0x00cf9b000000ffff /* 0x08: KERNEL code (32-bit) */
.quad 0x00af9b000000ffff /* 0x10: KERNEL code (64-bit) */
.quad 0x00cf93000000ffff /* 0x18: KERNEL data (64-bit) */
.quad 0x00cff3000000ffff /* 0x20: USER data (64-bit) */
.quad 0x00affb000000ffff /* 0x28: USER code (64-bit) */
gdt_end:
/*
* GDT (80-bit) pointer
*/
.align 64
gdt_ptr:
.word gdt_end-gdt-1 /* this is OK, addresses cancel out */
.quad gdt /* must be initialized to 'gdt' (see above) */
/*
* A temporary 1:1 page table
*/
.align 4096
temp_pml4:
.quad temp_pdp + 0x03
.fill 511, 8, 0
.align 4096
temp_pdp:
.quad temp_pd0 + 0x03
.quad temp_pd1 + 0x03
.quad temp_pd2 + 0x03
.quad temp_pd3 + 0x03
.fill 508, 8, 0
.align 4096
temp_pd0:
.irp idx,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127,128,129,130,131,132,133,134,135,136,137,138,139,140,141,142,143,144,145,146,147,148,149,150,151,152,153,154,155,156,157,158,159,160,161,162,163,164,165,166,167,168,169,170,171,172,173,174,175,176,177,178,179,180,181,182,183,184,185,186,187,188,189,190,191,192,193,194,195,196,197,198,199,200,201,202,203,204,205,206,207,208,209,210,211,212,213,214,215,216,217,218,219,220,221,222,223,224,225,226,227,228,229,230,231,232,233,234,235,236,237,238,239,240,241,242,243,244,245,246,247,248,249,250,251,252,253,254,255,256,257,258,259,260,261,262,263,264,265,266,267,268,269,270,271,272,273,274,275,276,277,278,279,280,281,282,283,284,285,286,287,288,289,290,291,292,293,294,295,296,297,298,299,300,301,302,303,304,305,306,307,308,309,310,311,312,313,314,315,316,317,318,319,320,321,322,323,324,325,326,327,328,329,330,331,332,333,334,335,336,337,338,339,340,341,342,343,344,345,346,347,348,349,350,351,352,353,354,355,356,357,358,359,360,361,362,363,364,365,366,367,368,369,370,371,372,373,374,375,376,377,378,379,380,381,382,383,384,385,386,387,388,389,390,391,392,393,394,395,396,397,398,399,400,401,402,403,404,405,406,407,408,409,410,411,412,413,414,415,416,417,418,419,420,421,422,423,424,425,426,427,428,429,430,431,432,433,434,435,436,437,438,439,440,441,442,443,444,445,446,447,448,449,450,451,452,453,454,455,456,457,458,459,460,461,462,463,464,465,466,467,468,469,470,471,472,473,474,475,476,477,478,479,480,481,482,483,484,485,486,487,488,489,490,491,492,493,494,495,496,497,498,499,500,501,502,503,504,505,506,507,508,509,510,511
.quad (\idx * 0x200000) + 0x83
.endr
temp_pd1:
.irp idx,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127,128,129,130,131,132,133,134,135,136,137,138,139,140,141,142,143,144,145,146,147,148,149,150,151,152,153,154,155,156,157,158,159,160,161,162,163,164,165,166,167,168,169,170,171,172,173,174,175,176,177,178,179,180,181,182,183,184,185,186,187,188,189,190,191,192,193,194,195,196,197,198,199,200,201,202,203,204,205,206,207,208,209,210,211,212,213,214,215,216,217,218,219,220,221,222,223,224,225,226,227,228,229,230,231,232,233,234,235,236,237,238,239,240,241,242,243,244,245,246,247,248,249,250,251,252,253,254,255,256,257,258,259,260,261,262,263,264,265,266,267,268,269,270,271,272,273,274,275,276,277,278,279,280,281,282,283,284,285,286,287,288,289,290,291,292,293,294,295,296,297,298,299,300,301,302,303,304,305,306,307,308,309,310,311,312,313,314,315,316,317,318,319,320,321,322,323,324,325,326,327,328,329,330,331,332,333,334,335,336,337,338,339,340,341,342,343,344,345,346,347,348,349,350,351,352,353,354,355,356,357,358,359,360,361,362,363,364,365,366,367,368,369,370,371,372,373,374,375,376,377,378,379,380,381,382,383,384,385,386,387,388,389,390,391,392,393,394,395,396,397,398,399,400,401,402,403,404,405,406,407,408,409,410,411,412,413,414,415,416,417,418,419,420,421,422,423,424,425,426,427,428,429,430,431,432,433,434,435,436,437,438,439,440,441,442,443,444,445,446,447,448,449,450,451,452,453,454,455,456,457,458,459,460,461,462,463,464,465,466,467,468,469,470,471,472,473,474,475,476,477,478,479,480,481,482,483,484,485,486,487,488,489,490,491,492,493,494,495,496,497,498,499,500,501,502,503,504,505,506,507,508,509,510,511
.quad (\idx * 0x200000) + 0x40000000 + 0x83
.endr
.align 4096
temp_pd2:
.irp idx,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127,128,129,130,131,132,133,134,135,136,137,138,139,140,141,142,143,144,145,146,147,148,149,150,151,152,153,154,155,156,157,158,159,160,161,162,163,164,165,166,167,168,169,170,171,172,173,174,175,176,177,178,179,180,181,182,183,184,185,186,187,188,189,190,191,192,193,194,195,196,197,198,199,200,201,202,203,204,205,206,207,208,209,210,211,212,213,214,215,216,217,218,219,220,221,222,223,224,225,226,227,228,229,230,231,232,233,234,235,236,237,238,239,240,241,242,243,244,245,246,247,248,249,250,251,252,253,254,255,256,257,258,259,260,261,262,263,264,265,266,267,268,269,270,271,272,273,274,275,276,277,278,279,280,281,282,283,284,285,286,287,288,289,290,291,292,293,294,295,296,297,298,299,300,301,302,303,304,305,306,307,308,309,310,311,312,313,314,315,316,317,318,319,320,321,322,323,324,325,326,327,328,329,330,331,332,333,334,335,336,337,338,339,340,341,342,343,344,345,346,347,348,349,350,351,352,353,354,355,356,357,358,359,360,361,362,363,364,365,366,367,368,369,370,371,372,373,374,375,376,377,378,379,380,381,382,383,384,385,386,387,388,389,390,391,392,393,394,395,396,397,398,399,400,401,402,403,404,405,406,407,408,409,410,411,412,413,414,415,416,417,418,419,420,421,422,423,424,425,426,427,428,429,430,431,432,433,434,435,436,437,438,439,440,441,442,443,444,445,446,447,448,449,450,451,452,453,454,455,456,457,458,459,460,461,462,463,464,465,466,467,468,469,470,471,472,473,474,475,476,477,478,479,480,481,482,483,484,485,486,487,488,489,490,491,492,493,494,495,496,497,498,499,500,501,502,503,504,505,506,507,508,509,510,511
.quad (\idx * 0x200000) + 0x80000000 + 0x83
.endr
.align 4096
temp_pd3:
.irp idx,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127,128,129,130,131,132,133,134,135,136,137,138,139,140,141,142,143,144,145,146,147,148,149,150,151,152,153,154,155,156,157,158,159,160,161,162,163,164,165,166,167,168,169,170,171,172,173,174,175,176,177,178,179,180,181,182,183,184,185,186,187,188,189,190,191,192,193,194,195,196,197,198,199,200,201,202,203,204,205,206,207,208,209,210,211,212,213,214,215,216,217,218,219,220,221,222,223,224,225,226,227,228,229,230,231,232,233,234,235,236,237,238,239,240,241,242,243,244,245,246,247,248,249,250,251,252,253,254,255,256,257,258,259,260,261,262,263,264,265,266,267,268,269,270,271,272,273,274,275,276,277,278,279,280,281,282,283,284,285,286,287,288,289,290,291,292,293,294,295,296,297,298,299,300,301,302,303,304,305,306,307,308,309,310,311,312,313,314,315,316,317,318,319,320,321,322,323,324,325,326,327,328,329,330,331,332,333,334,335,336,337,338,339,340,341,342,343,344,345,346,347,348,349,350,351,352,353,354,355,356,357,358,359,360,361,362,363,364,365,366,367,368,369,370,371,372,373,374,375,376,377,378,379,380,381,382,383,384,385,386,387,388,389,390,391,392,393,394,395,396,397,398,399,400,401,402,403,404,405,406,407,408,409,410,411,412,413,414,415,416,417,418,419,420,421,422,423,424,425,426,427,428,429,430,431,432,433,434,435,436,437,438,439,440,441,442,443,444,445,446,447,448,449,450,451,452,453,454,455,456,457,458,459,460,461,462,463,464,465,466,467,468,469,470,471,472,473,474,475,476,477,478,479,480,481,482,483,484,485,486,487,488,489,490,491,492,493,494,495,496,497,498,499,500,501,502,503,504,505,506,507,508,509,510,511
.quad (\idx * 0x200000) + 0xc0000000 + 0x83
.endr
/* The kernel stack (stack grows downwards, point to the end of the page) */
.align 4096
.fill 4096,1,0
kernel_stack:
|
theoparis/rust-os
| 3,187
|
kernel/src/multiboot.s
|
# Bootstrapping from 32-bit with the Multiboot specification.
# See https://www.gnu.org/software/grub/manual/multiboot/multiboot.html
.section .text.entry
.code32
.global _start
_start:
mov ecx, {mb_magic}
cmp ecx, eax
jnz 1f
mov edi, ebx # arg1: multiboot info
jmp entry32
1: hlt
jmp 1b
.balign 4
.type multiboot_header, STT_OBJECT
multiboot_header:
.int {mb_hdr_magic} # magic: 0x1BADB002
.int {mb_hdr_flags} # flags
.int -({mb_hdr_magic} + {mb_hdr_flags}) # checksum
.int multiboot_header - {offset} # header_addr
.int start - {offset} # load_addr
.int edata - {offset} # load_end
.int ebss - {offset} # bss_end_addr
.int _start - {offset} # entry_addr
.code32
entry32:
lgdt [.Ltmp_gdt_desc - {offset}] # load the temporary GDT
# set data segment selectors
mov ax, 0x18
mov ss, ax
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
# set PAE, PGE bit in CR4
mov eax, {cr4}
mov cr4, eax
# load the temporary page table
lea eax, [.Ltmp_pml4 - {offset}]
mov cr3, eax
# set LME, NXE bit in IA32_EFER
mov ecx, {efer_msr}
mov edx, 0
mov eax, {efer}
wrmsr
# set protected mode, write protect, paging bit in CR0
mov eax, {cr0}
mov cr0, eax
ljmp 0x10, offset entry64 - {offset} # 0x10 is code64 segment
.code64
entry64:
# clear segment selectors
xor ax, ax
mov ss, ax
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
# set RSP to boot stack top
movabs rsp, offset boot_stack_top
# call main(magic, mbi)
movabs rax, offset {entry}
call rax
jmp .Lhlt
.Lhlt:
hlt
jmp .Lhlt
.section .rodata
.balign 8
.Ltmp_gdt_desc:
.short .Ltmp_gdt_end - .Ltmp_gdt - 1 # limit
.long .Ltmp_gdt - {offset} # base
.section .data
.balign 16
.Ltmp_gdt:
.quad 0x0000000000000000 # 0x00: null
.quad 0x00cf9b000000ffff # 0x08: code segment (base=0, limit=0xfffff, type=32bit code exec/read, DPL=0, 4k)
.quad 0x00af9b000000ffff # 0x10: code segment (base=0, limit=0xfffff, type=64bit code exec/read, DPL=0, 4k)
.quad 0x00cf93000000ffff # 0x18: data segment (base=0, limit=0xfffff, type=32bit data read/write, DPL=0, 4k)
.Ltmp_gdt_end:
.balign 4096
.Ltmp_pml4:
# 0x0000_0000 ~ 0xffff_ffff
.quad .Ltmp_pdpt_low - {offset} + 0x3 # PRESENT | WRITABLE | paddr(tmp_pdpt)
.zero 8 * 511
.Ltmp_pdpt_low:
.quad 0x0000 | 0x83 # PRESENT | WRITABLE | HUGE_PAGE | paddr(0x0)
.quad 0x40000000 | 0x83 # PRESENT | WRITABLE | HUGE_PAGE | paddr(0x4000_0000)
.quad 0x80000000 | 0x83 # PRESENT | WRITABLE | HUGE_PAGE | paddr(0x8000_0000)
.quad 0xc0000000 | 0x83 # PRESENT | WRITABLE | HUGE_PAGE | paddr(0xc000_0000)
.zero 8 * 508
.section .bss.stack
.balign 4096
.boot_stack:
.space {boot_stack_size}
boot_stack_top:
|
TheRetroMike/astrix-node
| 6,073
|
crypto/hashes/src/keccakf1600_x86-64.s
|
# Source: https://github.com/dot-asm/cryptogams/blob/master/x86_64/keccak1600-x86_64.pl
.text
.type __KeccakF1600,@function
.align 32
__KeccakF1600:
.cfi_startproc
.byte 0xf3,0x0f,0x1e,0xfa
movq 60(%rdi),%rax
movq 68(%rdi),%rbx
movq 76(%rdi),%rcx
movq 84(%rdi),%rdx
movq 92(%rdi),%rbp
jmp .Loop
.align 32
.Loop:
movq -100(%rdi),%r8
movq -52(%rdi),%r9
movq -4(%rdi),%r10
movq 44(%rdi),%r11
xorq -84(%rdi),%rcx
xorq -76(%rdi),%rdx
xorq %r8,%rax
xorq -92(%rdi),%rbx
xorq -44(%rdi),%rcx
xorq -60(%rdi),%rax
movq %rbp,%r12
xorq -68(%rdi),%rbp
xorq %r10,%rcx
xorq -20(%rdi),%rax
xorq -36(%rdi),%rdx
xorq %r9,%rbx
xorq -28(%rdi),%rbp
xorq 36(%rdi),%rcx
xorq 20(%rdi),%rax
xorq 4(%rdi),%rdx
xorq -12(%rdi),%rbx
xorq 12(%rdi),%rbp
movq %rcx,%r13
rolq $1,%rcx
xorq %rax,%rcx
xorq %r11,%rdx
rolq $1,%rax
xorq %rdx,%rax
xorq 28(%rdi),%rbx
rolq $1,%rdx
xorq %rbx,%rdx
xorq 52(%rdi),%rbp
rolq $1,%rbx
xorq %rbp,%rbx
rolq $1,%rbp
xorq %r13,%rbp
xorq %rcx,%r9
xorq %rdx,%r10
rolq $44,%r9
xorq %rbp,%r11
xorq %rax,%r12
rolq $43,%r10
xorq %rbx,%r8
movq %r9,%r13
rolq $21,%r11
orq %r10,%r9
xorq %r8,%r9
rolq $14,%r12
xorq (%r15),%r9
leaq 8(%r15),%r15
movq %r12,%r14
andq %r11,%r12
movq %r9,-100(%rsi)
xorq %r10,%r12
notq %r10
movq %r12,-84(%rsi)
orq %r11,%r10
movq 76(%rdi),%r12
xorq %r13,%r10
movq %r10,-92(%rsi)
andq %r8,%r13
movq -28(%rdi),%r9
xorq %r14,%r13
movq -20(%rdi),%r10
movq %r13,-68(%rsi)
orq %r8,%r14
movq -76(%rdi),%r8
xorq %r11,%r14
movq 28(%rdi),%r11
movq %r14,-76(%rsi)
xorq %rbp,%r8
xorq %rdx,%r12
rolq $28,%r8
xorq %rcx,%r11
xorq %rax,%r9
rolq $61,%r12
rolq $45,%r11
xorq %rbx,%r10
rolq $20,%r9
movq %r8,%r13
orq %r12,%r8
rolq $3,%r10
xorq %r11,%r8
movq %r8,-36(%rsi)
movq %r9,%r14
andq %r13,%r9
movq -92(%rdi),%r8
xorq %r12,%r9
notq %r12
movq %r9,-28(%rsi)
orq %r11,%r12
movq -44(%rdi),%r9
xorq %r10,%r12
movq %r12,-44(%rsi)
andq %r10,%r11
movq 60(%rdi),%r12
xorq %r14,%r11
movq %r11,-52(%rsi)
orq %r10,%r14
movq 4(%rdi),%r10
xorq %r13,%r14
movq 52(%rdi),%r11
movq %r14,-60(%rsi)
xorq %rbp,%r10
xorq %rax,%r11
rolq $25,%r10
xorq %rdx,%r9
rolq $8,%r11
xorq %rbx,%r12
rolq $6,%r9
xorq %rcx,%r8
rolq $18,%r12
movq %r10,%r13
andq %r11,%r10
rolq $1,%r8
notq %r11
xorq %r9,%r10
movq %r10,-12(%rsi)
movq %r12,%r14
andq %r11,%r12
movq -12(%rdi),%r10
xorq %r13,%r12
movq %r12,-4(%rsi)
orq %r9,%r13
movq 84(%rdi),%r12
xorq %r8,%r13
movq %r13,-20(%rsi)
andq %r8,%r9
xorq %r14,%r9
movq %r9,12(%rsi)
orq %r8,%r14
movq -60(%rdi),%r9
xorq %r11,%r14
movq 36(%rdi),%r11
movq %r14,4(%rsi)
movq -68(%rdi),%r8
xorq %rcx,%r10
xorq %rdx,%r11
rolq $10,%r10
xorq %rbx,%r9
rolq $15,%r11
xorq %rbp,%r12
rolq $36,%r9
xorq %rax,%r8
rolq $56,%r12
movq %r10,%r13
orq %r11,%r10
rolq $27,%r8
notq %r11
xorq %r9,%r10
movq %r10,28(%rsi)
movq %r12,%r14
orq %r11,%r12
xorq %r13,%r12
movq %r12,36(%rsi)
andq %r9,%r13
xorq %r8,%r13
movq %r13,20(%rsi)
orq %r8,%r9
xorq %r14,%r9
movq %r9,52(%rsi)
andq %r14,%r8
xorq %r11,%r8
movq %r8,44(%rsi)
xorq -84(%rdi),%rdx
xorq -36(%rdi),%rbp
rolq $62,%rdx
xorq 68(%rdi),%rcx
rolq $55,%rbp
xorq 12(%rdi),%rax
rolq $2,%rcx
xorq 20(%rdi),%rbx
xchgq %rsi,%rdi
rolq $39,%rax
rolq $41,%rbx
movq %rdx,%r13
andq %rbp,%rdx
notq %rbp
xorq %rcx,%rdx
movq %rdx,92(%rdi)
movq %rax,%r14
andq %rbp,%rax
xorq %r13,%rax
movq %rax,60(%rdi)
orq %rcx,%r13
xorq %rbx,%r13
movq %r13,84(%rdi)
andq %rbx,%rcx
xorq %r14,%rcx
movq %rcx,76(%rdi)
orq %r14,%rbx
xorq %rbp,%rbx
movq %rbx,68(%rdi)
movq %rdx,%rbp
movq %r13,%rdx
testq $255,%r15
jnz .Loop
leaq -192(%r15),%r15
.byte 0xf3,0xc3
.cfi_endproc
.size __KeccakF1600,.-__KeccakF1600
.globl KeccakF1600
.type KeccakF1600,@function
.align 32
KeccakF1600:
.cfi_startproc
.byte 0xf3,0x0f,0x1e,0xfa
pushq %rbx
.cfi_adjust_cfa_offset 8
.cfi_offset %rbx,-16
pushq %rbp
.cfi_adjust_cfa_offset 8
.cfi_offset %rbp,-24
pushq %r12
.cfi_adjust_cfa_offset 8
.cfi_offset %r12,-32
pushq %r13
.cfi_adjust_cfa_offset 8
.cfi_offset %r13,-40
pushq %r14
.cfi_adjust_cfa_offset 8
.cfi_offset %r14,-48
pushq %r15
.cfi_adjust_cfa_offset 8
.cfi_offset %r15,-56
leaq 100(%rdi),%rdi
subq $200,%rsp
.cfi_adjust_cfa_offset 200
notq -92(%rdi)
notq -84(%rdi)
notq -36(%rdi)
notq -4(%rdi)
notq 36(%rdi)
notq 60(%rdi)
leaq iotas(%rip),%r15
leaq 100(%rsp),%rsi
call __KeccakF1600
notq -92(%rdi)
notq -84(%rdi)
notq -36(%rdi)
notq -4(%rdi)
notq 36(%rdi)
notq 60(%rdi)
leaq -100(%rdi),%rdi
addq $200,%rsp
.cfi_adjust_cfa_offset -200
popq %r15
.cfi_adjust_cfa_offset -8
.cfi_restore %r15
popq %r14
.cfi_adjust_cfa_offset -8
.cfi_restore %r14
popq %r13
.cfi_adjust_cfa_offset -8
.cfi_restore %r13
popq %r12
.cfi_adjust_cfa_offset -8
.cfi_restore %r12
popq %rbp
.cfi_adjust_cfa_offset -8
.cfi_restore %rbp
popq %rbx
.cfi_adjust_cfa_offset -8
.cfi_restore %rbx
.byte 0xf3,0xc3
.cfi_endproc
.size KeccakF1600,.-KeccakF1600
.align 256
.quad 0,0,0,0,0,0,0,0
.type iotas,@object
iotas:
.quad 0x0000000000000001
.quad 0x0000000000008082
.quad 0x800000000000808a
.quad 0x8000000080008000
.quad 0x000000000000808b
.quad 0x0000000080000001
.quad 0x8000000080008081
.quad 0x8000000000008009
.quad 0x000000000000008a
.quad 0x0000000000000088
.quad 0x0000000080008009
.quad 0x000000008000000a
.quad 0x000000008000808b
.quad 0x800000000000008b
.quad 0x8000000000008089
.quad 0x8000000000008003
.quad 0x8000000000008002
.quad 0x8000000000000080
.quad 0x000000000000800a
.quad 0x800000008000000a
.quad 0x8000000080008081
.quad 0x8000000000008080
.quad 0x0000000080000001
.quad 0x8000000080008008
.size iotas,.-iotas
.byte 75,101,99,99,97,107,45,49,54,48,48,32,97,98,115,111,114,98,32,97,110,100,32,115,113,117,101,101,122,101,32,102,111,114,32,120,56,54,95,54,52,44,32,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0
.section .note.gnu.property,"a",@note
.long 4,2f-1f,5
.byte 0x47,0x4E,0x55,0
1: .long 0xc0000002,4,3
.align 8
2:
|
TheRetroMike/astrix-node
| 5,802
|
crypto/hashes/src/keccakf1600_x86-64-osx.s
|
# Source: https://github.com/dot-asm/cryptogams/blob/master/x86_64/keccak1600-x86_64.pl
.text
.p2align 5
__KeccakF1600:
.cfi_startproc
.byte 0xf3,0x0f,0x1e,0xfa
movq 60(%rdi),%rax
movq 68(%rdi),%rbx
movq 76(%rdi),%rcx
movq 84(%rdi),%rdx
movq 92(%rdi),%rbp
jmp L$oop
.p2align 5
L$oop:
movq -100(%rdi),%r8
movq -52(%rdi),%r9
movq -4(%rdi),%r10
movq 44(%rdi),%r11
xorq -84(%rdi),%rcx
xorq -76(%rdi),%rdx
xorq %r8,%rax
xorq -92(%rdi),%rbx
xorq -44(%rdi),%rcx
xorq -60(%rdi),%rax
movq %rbp,%r12
xorq -68(%rdi),%rbp
xorq %r10,%rcx
xorq -20(%rdi),%rax
xorq -36(%rdi),%rdx
xorq %r9,%rbx
xorq -28(%rdi),%rbp
xorq 36(%rdi),%rcx
xorq 20(%rdi),%rax
xorq 4(%rdi),%rdx
xorq -12(%rdi),%rbx
xorq 12(%rdi),%rbp
movq %rcx,%r13
rolq $1,%rcx
xorq %rax,%rcx
xorq %r11,%rdx
rolq $1,%rax
xorq %rdx,%rax
xorq 28(%rdi),%rbx
rolq $1,%rdx
xorq %rbx,%rdx
xorq 52(%rdi),%rbp
rolq $1,%rbx
xorq %rbp,%rbx
rolq $1,%rbp
xorq %r13,%rbp
xorq %rcx,%r9
xorq %rdx,%r10
rolq $44,%r9
xorq %rbp,%r11
xorq %rax,%r12
rolq $43,%r10
xorq %rbx,%r8
movq %r9,%r13
rolq $21,%r11
orq %r10,%r9
xorq %r8,%r9
rolq $14,%r12
xorq (%r15),%r9
leaq 8(%r15),%r15
movq %r12,%r14
andq %r11,%r12
movq %r9,-100(%rsi)
xorq %r10,%r12
notq %r10
movq %r12,-84(%rsi)
orq %r11,%r10
movq 76(%rdi),%r12
xorq %r13,%r10
movq %r10,-92(%rsi)
andq %r8,%r13
movq -28(%rdi),%r9
xorq %r14,%r13
movq -20(%rdi),%r10
movq %r13,-68(%rsi)
orq %r8,%r14
movq -76(%rdi),%r8
xorq %r11,%r14
movq 28(%rdi),%r11
movq %r14,-76(%rsi)
xorq %rbp,%r8
xorq %rdx,%r12
rolq $28,%r8
xorq %rcx,%r11
xorq %rax,%r9
rolq $61,%r12
rolq $45,%r11
xorq %rbx,%r10
rolq $20,%r9
movq %r8,%r13
orq %r12,%r8
rolq $3,%r10
xorq %r11,%r8
movq %r8,-36(%rsi)
movq %r9,%r14
andq %r13,%r9
movq -92(%rdi),%r8
xorq %r12,%r9
notq %r12
movq %r9,-28(%rsi)
orq %r11,%r12
movq -44(%rdi),%r9
xorq %r10,%r12
movq %r12,-44(%rsi)
andq %r10,%r11
movq 60(%rdi),%r12
xorq %r14,%r11
movq %r11,-52(%rsi)
orq %r10,%r14
movq 4(%rdi),%r10
xorq %r13,%r14
movq 52(%rdi),%r11
movq %r14,-60(%rsi)
xorq %rbp,%r10
xorq %rax,%r11
rolq $25,%r10
xorq %rdx,%r9
rolq $8,%r11
xorq %rbx,%r12
rolq $6,%r9
xorq %rcx,%r8
rolq $18,%r12
movq %r10,%r13
andq %r11,%r10
rolq $1,%r8
notq %r11
xorq %r9,%r10
movq %r10,-12(%rsi)
movq %r12,%r14
andq %r11,%r12
movq -12(%rdi),%r10
xorq %r13,%r12
movq %r12,-4(%rsi)
orq %r9,%r13
movq 84(%rdi),%r12
xorq %r8,%r13
movq %r13,-20(%rsi)
andq %r8,%r9
xorq %r14,%r9
movq %r9,12(%rsi)
orq %r8,%r14
movq -60(%rdi),%r9
xorq %r11,%r14
movq 36(%rdi),%r11
movq %r14,4(%rsi)
movq -68(%rdi),%r8
xorq %rcx,%r10
xorq %rdx,%r11
rolq $10,%r10
xorq %rbx,%r9
rolq $15,%r11
xorq %rbp,%r12
rolq $36,%r9
xorq %rax,%r8
rolq $56,%r12
movq %r10,%r13
orq %r11,%r10
rolq $27,%r8
notq %r11
xorq %r9,%r10
movq %r10,28(%rsi)
movq %r12,%r14
orq %r11,%r12
xorq %r13,%r12
movq %r12,36(%rsi)
andq %r9,%r13
xorq %r8,%r13
movq %r13,20(%rsi)
orq %r8,%r9
xorq %r14,%r9
movq %r9,52(%rsi)
andq %r14,%r8
xorq %r11,%r8
movq %r8,44(%rsi)
xorq -84(%rdi),%rdx
xorq -36(%rdi),%rbp
rolq $62,%rdx
xorq 68(%rdi),%rcx
rolq $55,%rbp
xorq 12(%rdi),%rax
rolq $2,%rcx
xorq 20(%rdi),%rbx
xchgq %rsi,%rdi
rolq $39,%rax
rolq $41,%rbx
movq %rdx,%r13
andq %rbp,%rdx
notq %rbp
xorq %rcx,%rdx
movq %rdx,92(%rdi)
movq %rax,%r14
andq %rbp,%rax
xorq %r13,%rax
movq %rax,60(%rdi)
orq %rcx,%r13
xorq %rbx,%r13
movq %r13,84(%rdi)
andq %rbx,%rcx
xorq %r14,%rcx
movq %rcx,76(%rdi)
orq %r14,%rbx
xorq %rbp,%rbx
movq %rbx,68(%rdi)
movq %rdx,%rbp
movq %r13,%rdx
testq $255,%r15
jnz L$oop
leaq -192(%r15),%r15
.byte 0xf3,0xc3
.cfi_endproc
.globl _KeccakF1600
.p2align 5
_KeccakF1600:
.cfi_startproc
.byte 0xf3,0x0f,0x1e,0xfa
pushq %rbx
.cfi_adjust_cfa_offset 8
.cfi_offset %rbx,-16
pushq %rbp
.cfi_adjust_cfa_offset 8
.cfi_offset %rbp,-24
pushq %r12
.cfi_adjust_cfa_offset 8
.cfi_offset %r12,-32
pushq %r13
.cfi_adjust_cfa_offset 8
.cfi_offset %r13,-40
pushq %r14
.cfi_adjust_cfa_offset 8
.cfi_offset %r14,-48
pushq %r15
.cfi_adjust_cfa_offset 8
.cfi_offset %r15,-56
leaq 100(%rdi),%rdi
subq $200,%rsp
.cfi_adjust_cfa_offset 200
notq -92(%rdi)
notq -84(%rdi)
notq -36(%rdi)
notq -4(%rdi)
notq 36(%rdi)
notq 60(%rdi)
leaq iotas(%rip),%r15
leaq 100(%rsp),%rsi
call __KeccakF1600
notq -92(%rdi)
notq -84(%rdi)
notq -36(%rdi)
notq -4(%rdi)
notq 36(%rdi)
notq 60(%rdi)
leaq -100(%rdi),%rdi
addq $200,%rsp
.cfi_adjust_cfa_offset -200
popq %r15
.cfi_adjust_cfa_offset -8
.cfi_restore %r15
popq %r14
.cfi_adjust_cfa_offset -8
.cfi_restore %r14
popq %r13
.cfi_adjust_cfa_offset -8
.cfi_restore %r13
popq %r12
.cfi_adjust_cfa_offset -8
.cfi_restore %r12
popq %rbp
.cfi_adjust_cfa_offset -8
.cfi_restore %rbp
popq %rbx
.cfi_adjust_cfa_offset -8
.cfi_restore %rbx
.byte 0xf3,0xc3
.cfi_endproc
.p2align 8
.quad 0,0,0,0,0,0,0,0
iotas:
.quad 0x0000000000000001
.quad 0x0000000000008082
.quad 0x800000000000808a
.quad 0x8000000080008000
.quad 0x000000000000808b
.quad 0x0000000080000001
.quad 0x8000000080008081
.quad 0x8000000000008009
.quad 0x000000000000008a
.quad 0x0000000000000088
.quad 0x0000000080008009
.quad 0x000000008000000a
.quad 0x000000008000808b
.quad 0x800000000000008b
.quad 0x8000000000008089
.quad 0x8000000000008003
.quad 0x8000000000008002
.quad 0x8000000000000080
.quad 0x000000000000800a
.quad 0x800000008000000a
.quad 0x8000000080008081
.quad 0x8000000000008080
.quad 0x0000000080000001
.quad 0x8000000080008008
.byte 75,101,99,99,97,107,45,49,54,48,48,32,97,98,115,111,114,98,32,97,110,100,32,115,113,117,101,101,122,101,32,102,111,114,32,120,56,54,95,54,52,44,32,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0
|
Thommimp/cpu_rust
| 1,610
|
tests/task3/loop.s
|
.file "loop.c"
.option nopic
.attribute arch, "rv32i2p0"
.attribute unaligned_access, 0
.attribute stack_align, 16
.text
#APP
li sp, 0x100000
jal main
li a7, 10
ecall
#NO_APP
.align 2
.globl sum
.type sum, @function
sum:
addi sp,sp,-48
sw s0,44(sp)
addi s0,sp,48
sw a0,-36(s0)
sw a1,-40(s0)
sw zero,-20(s0)
sw zero,-24(s0)
j .L2
.L3:
lw a5,-24(s0)
slli a5,a5,2
lw a4,-36(s0)
add a5,a4,a5
lw a5,0(a5)
lw a4,-20(s0)
add a5,a4,a5
sw a5,-20(s0)
lw a5,-24(s0)
addi a5,a5,1
sw a5,-24(s0)
.L2:
lw a4,-24(s0)
lw a5,-40(s0)
blt a4,a5,.L3
lw a5,-20(s0)
mv a0,a5
lw s0,44(sp)
addi sp,sp,48
jr ra
.size sum, .-sum
.align 2
.globl main
.type main, @function
main:
addi sp,sp,-32
sw ra,28(sp)
sw s0,24(sp)
sw s1,20(sp)
addi s0,sp,32
mv t1,sp
mv s1,t1
li t1,100
sw t1,-24(s0)
lw t1,-24(s0)
addi t3,t1,-1
sw t3,-28(s0)
mv t3,t1
mv a6,t3
li a7,0
srli t3,a6,27
slli a3,a7,5
or a3,t3,a3
slli a2,a6,5
mv a3,t1
mv a0,a3
li a1,0
srli a3,a0,27
slli a5,a1,5
or a5,a3,a5
slli a4,a0,5
mv a5,t1
slli a5,a5,2
addi a5,a5,15
srli a5,a5,4
slli a5,a5,4
sub sp,sp,a5
mv a5,sp
addi a5,a5,3
srli a5,a5,2
slli a5,a5,2
sw a5,-32(s0)
sw zero,-20(s0)
j .L6
.L7:
lw a4,-32(s0)
lw a5,-20(s0)
slli a5,a5,2
add a5,a4,a5
lw a4,-20(s0)
sw a4,0(a5)
lw a5,-20(s0)
addi a5,a5,1
sw a5,-20(s0)
.L6:
lw a4,-20(s0)
lw a5,-24(s0)
blt a4,a5,.L7
lw a1,-24(s0)
lw a0,-32(s0)
call sum
mv a5,a0
mv sp,s1
mv a0,a5
addi sp,s0,-32
lw ra,28(sp)
lw s0,24(sp)
lw s1,20(sp)
addi sp,sp,32
jr ra
.size main, .-main
.ident "GCC: (SiFive GCC 10.1.0-2020.08.2) 10.1.0"
|
Thoq-jar/folia
| 1,095
|
demo/example.s
|
.start _start
.data
hello_msg: .string "Hello, World!\n"
prompt_msg: .string "Enter a number: "
result_msg: .string "You entered: "
newline: .string "\n"
.text
_start:
MOV r1, hello_msg ; print hello
CALL print_string
MOV r1, prompt_msg ; prompt user
CALL print_string
INPUT r2 ; get user input
MOV r1, result_msg ; result message
CALL print_string
PRINT r2 ; print number user entered
MOV r1, newline ; newline
CALL print_string
HALT ; stop
print_string:
PUSH r1 ; save r1
PUSH r3 ; save r3 (used for character)
loop:
LOAD r3, [r1] ; load character from memory
CMP r3, #0 ; check for null terminator
JEQ end_print ; if null, exit
PRINTC r3 ; print character
ADD r1, r1, #1 ; move to next character
JMP loop ; repeat
end_print:
POP r3
POP r1
RET
|
Thoq-jar/folia
| 1,342
|
demo/calculator/main.s
|
.start _start
.data
welcome_msg: .string "Simple Calculator\n"
menu_msg: .string "1. Add\n2. Subtract\n3. Multiply\n4. Divide\n5. Exit\nChoice: "
num1_prompt: .string "Enter first number: "
num2_prompt: .string "Enter second number: "
result_msg: .string "Result: "
div_error_msg: .string "Error: Division by zero!\n"
invalid_choice_msg: .string "Invalid choice!\n"
newline: .string "\n"
.text
_start:
mov r1 welcome_msg
call print_string
main_loop:
mov r1 menu_msg
call print_string
mov r0 #0
input r1 r0
cmp r1 #1
jeq do_add
cmp r1 #2
jeq do_subtract
cmp r1 #3
jeq do_multiply
cmp r1 #4
jeq do_divide
cmp r1 #5
jeq exit_program
mov r1 invalid_choice_msg
call print_string
jmp main_loop
get_two_numbers:
mov r1 num1_prompt
call print_string
mov r0 #0
input r2 r0
mov r1 num2_prompt
call print_string
mov r0 #0
input r3 r0
ret
print_result:
push r1
mov r1 result_msg
call print_string
pop r1
print r1
mov r1 newline
call print_string
ret
print_string:
push r1
push r3
print_loop:
load r3 [r1]
cmp r3 #0
jeq end_print
printc r3
add r1 r1 #1
jmp print_loop
end_print:
pop r3
pop r1
ret
exit_program:
halt
|
Tim-C1/occlum-he
| 2,830
|
deps/rust-sgx-sdk/sgx_unwind/libunwind/src/x86_64/setcontext.S
|
/* libunwind - a platform-independent unwind library
Copyright (C) 2007 Google, Inc
Contributed by Arun Sharma <arun.sharma@google.com>
Copyright (C) 2010 Konstantin Belousov <kib@freebsd.org>
This file is part of libunwind.
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
"Software"), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be
included in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
#include "ucontext_i.h"
/* int _Ux86_64_setcontext (const ucontext_t *ucp)
Restores the machine context provided.
Unlike the libc implementation, doesn't clobber %rax
*/
.global _Ux86_64_setcontext
.type _Ux86_64_setcontext, @function
_Ux86_64_setcontext:
#if defined __linux__
/* restore fp state */
mov UC_MCONTEXT_FPREGS_PTR(%rdi),%r8
fldenv (%r8)
ldmxcsr FPREGS_OFFSET_MXCSR(%r8)
#elif defined __FreeBSD__
/* restore fp state */
cmpq $UC_MCONTEXT_FPOWNED_FPU,UC_MCONTEXT_OWNEDFP(%rdi)
jne 1f
cmpq $UC_MCONTEXT_FPFMT_XMM,UC_MCONTEXT_FPFORMAT(%rdi)
jne 1f
fxrstor UC_MCONTEXT_FPSTATE(%rdi)
1:
#else
#error Port me
#endif
/* restore the rest of the state */
mov UC_MCONTEXT_GREGS_R8(%rdi),%r8
mov UC_MCONTEXT_GREGS_R9(%rdi),%r9
mov UC_MCONTEXT_GREGS_RBX(%rdi),%rbx
mov UC_MCONTEXT_GREGS_RBP(%rdi),%rbp
mov UC_MCONTEXT_GREGS_R12(%rdi),%r12
mov UC_MCONTEXT_GREGS_R13(%rdi),%r13
mov UC_MCONTEXT_GREGS_R14(%rdi),%r14
mov UC_MCONTEXT_GREGS_R15(%rdi),%r15
mov UC_MCONTEXT_GREGS_RSI(%rdi),%rsi
mov UC_MCONTEXT_GREGS_RDX(%rdi),%rdx
mov UC_MCONTEXT_GREGS_RAX(%rdi),%rax
mov UC_MCONTEXT_GREGS_RCX(%rdi),%rcx
mov UC_MCONTEXT_GREGS_RSP(%rdi),%rsp
/* push the return address on the stack */
mov UC_MCONTEXT_GREGS_RIP(%rdi),%rcx
push %rcx
mov UC_MCONTEXT_GREGS_RCX(%rdi),%rcx
mov UC_MCONTEXT_GREGS_RDI(%rdi),%rdi
retq
.size _Ux86_64_setcontext, . - _Ux86_64_setcontext
/* We do not need executable stack. */
.section .note.GNU-stack,"",@progbits
|
Tim-C1/occlum-he
| 4,427
|
deps/rust-sgx-sdk/sgx_unwind/libunwind/src/x86_64/getcontext.S
|
/* libunwind - a platform-independent unwind library
Copyright (C) 2008 Google, Inc
Contributed by Paul Pluzhnikov <ppluzhnikov@google.com>
Copyright (C) 2010 Konstantin Belousov <kib@freebsd.org>
This file is part of libunwind.
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
"Software"), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be
included in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
#include "ucontext_i.h"
/* int _Ux86_64_getcontext (ucontext_t *ucp)
Saves the machine context in UCP necessary for libunwind.
Unlike the libc implementation, we don't save the signal mask
and hence avoid the cost of a system call per unwind.
*/
.global _Ux86_64_getcontext
.type _Ux86_64_getcontext, @function
_Ux86_64_getcontext:
.cfi_startproc
/* Callee saved: RBX, RBP, R12-R15 */
movq %r12, UC_MCONTEXT_GREGS_R12(%rdi)
movq %r13, UC_MCONTEXT_GREGS_R13(%rdi)
movq %r14, UC_MCONTEXT_GREGS_R14(%rdi)
movq %r15, UC_MCONTEXT_GREGS_R15(%rdi)
movq %rbp, UC_MCONTEXT_GREGS_RBP(%rdi)
movq %rbx, UC_MCONTEXT_GREGS_RBX(%rdi)
/* Save argument registers (not strictly needed, but setcontext
restores them, so don't restore garbage). */
movq %r8, UC_MCONTEXT_GREGS_R8(%rdi)
movq %r9, UC_MCONTEXT_GREGS_R9(%rdi)
movq %rdi, UC_MCONTEXT_GREGS_RDI(%rdi)
movq %rsi, UC_MCONTEXT_GREGS_RSI(%rdi)
movq %rdx, UC_MCONTEXT_GREGS_RDX(%rdi)
movq %rax, UC_MCONTEXT_GREGS_RAX(%rdi)
movq %rcx, UC_MCONTEXT_GREGS_RCX(%rdi)
#if defined __linux__
/* Save fp state (not needed, except for setcontext not
restoring garbage). */
leaq UC_MCONTEXT_FPREGS_MEM(%rdi),%r8
movq %r8, UC_MCONTEXT_FPREGS_PTR(%rdi)
fnstenv (%r8)
stmxcsr FPREGS_OFFSET_MXCSR(%r8)
#elif defined __FreeBSD__
fxsave UC_MCONTEXT_FPSTATE(%rdi)
movq $UC_MCONTEXT_FPOWNED_FPU,UC_MCONTEXT_OWNEDFP(%rdi)
movq $UC_MCONTEXT_FPFMT_XMM,UC_MCONTEXT_FPFORMAT(%rdi)
/* Save rflags and segment registers, so that sigreturn(2)
does not complain. */
pushfq
.cfi_adjust_cfa_offset 8
popq UC_MCONTEXT_RFLAGS(%rdi)
.cfi_adjust_cfa_offset -8
movl $0, UC_MCONTEXT_FLAGS(%rdi)
movw %cs, UC_MCONTEXT_CS(%rdi)
movw %ss, UC_MCONTEXT_SS(%rdi)
#if 0
/* Setting the flags to 0 above disables restore of segment
registers from the context */
movw %ds, UC_MCONTEXT_DS(%rdi)
movw %es, UC_MCONTEXT_ES(%rdi)
movw %fs, UC_MCONTEXT_FS(%rdi)
movw %gs, UC_MCONTEXT_GS(%rdi)
#endif
movq $UC_MCONTEXT_MC_LEN_VAL, UC_MCONTEXT_MC_LEN(%rdi)
#else
#error Port me
#endif
leaq 8(%rsp), %rax /* exclude this call. */
movq %rax, UC_MCONTEXT_GREGS_RSP(%rdi)
movq 0(%rsp), %rax
movq %rax, UC_MCONTEXT_GREGS_RIP(%rdi)
xorq %rax, %rax
retq
.cfi_endproc
.size _Ux86_64_getcontext, . - _Ux86_64_getcontext
/* int _Ux86_64_getcontext_trace (ucontext_t *ucp)
Saves limited machine context in UCP necessary for libunwind.
Unlike _Ux86_64_getcontext, saves only the parts needed for
fast trace. If fast trace fails, caller will have to get the
full context.
*/
.global _Ux86_64_getcontext_trace
.hidden _Ux86_64_getcontext_trace
.type _Ux86_64_getcontext_trace, @function
_Ux86_64_getcontext_trace:
.cfi_startproc
/* Save only RBP, RBX, RSP, RIP - exclude this call. */
movq %rbp, UC_MCONTEXT_GREGS_RBP(%rdi)
movq %rbx, UC_MCONTEXT_GREGS_RBX(%rdi)
leaq 8(%rsp), %rax
movq %rax, UC_MCONTEXT_GREGS_RSP(%rdi)
movq 0(%rsp), %rax
movq %rax, UC_MCONTEXT_GREGS_RIP(%rdi)
xorq %rax, %rax
retq
.cfi_endproc
.size _Ux86_64_getcontext_trace, . - _Ux86_64_getcontext_trace
/* We do not need executable stack. */
.section .note.GNU-stack,"",@progbits
|
Tim-C1/occlum-he
| 1,520
|
deps/rust-sgx-sdk/sgx_unwind/libunwind/src/x86_64/longjmp.S
|
/* libunwind - a platform-independent unwind library
Copyright (C) 2004-2005 Hewlett-Packard Co
Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
This file is part of libunwind.
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
"Software"), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be
included in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
.globl _UI_longjmp_cont
.type _UI_longjmp_cont, @function
_UI_longjmp_cont:
push %rax /* push target IP as return address */
mov %rdx, %rax /* set up return-value */
retq
.size _UI_longjmp_cont, .-_UI_longjmp_cont
/* We do not need executable stack. */
.section .note.GNU-stack,"",@progbits
|
Tim-C1/occlum-he
| 1,438
|
deps/rust-sgx-sdk/sgx_unwind/libunwind/src/x86_64/siglongjmp.S
|
/* libunwind - a platform-independent unwind library
Copyright (C) 2004 Hewlett-Packard Co
Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
This file is part of libunwind.
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
"Software"), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be
included in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
.globl _UI_siglongjmp_cont
.type _UI_siglongjmp_cont, @function
_UI_siglongjmp_cont:
retq
.size _UI_siglongjmp_cont, . - _UI_siglongjmp_cont
/* We do not need executable stack. */
.section .note.GNU-stack,"",@progbits
|
Tim-C1/occlum-he
| 1,386
|
src/libos/src/util/mpx_util_x86-64.S
|
.file "mpx_util_x86-64.S"
/* For bnd0 */
.global __mpx_bndmk0
.type __mpx_bndmk0, @function
__mpx_bndmk0:
bndmk (%rdi, %rsi, 1), %bnd0
ret
.global __mpx_bndcl0
.type __mpx_bndcl0, @function
__mpx_bndcl0:
bndcl %rdi, %bnd0
ret
.global __mpx_bndcu0
.type __mpx_bndcu0, @function
__mpx_bndcu0:
bndcu %rdi, %bnd0
ret
/* For bnd1 */
.global __mpx_bndmk1
.type __mpx_bndmk1, @function
__mpx_bndmk1:
bndmk (%rdi, %rsi, 1), %bnd1
ret
.global __mpx_bndcl1
.type __mpx_bndcl1, @function
__mpx_bndcl1:
bndcl %rdi, %bnd1
ret
.global __mpx_bndcu1
.type __mpx_bndcu1, @function
__mpx_bndcu1:
bndcu %rdi, %bnd1
ret
/* For bnd2 */
.global __mpx_bndmk2
.type __mpx_bndmk2, @function
__mpx_bndmk2:
bndmk (%rdi, %rsi, 1), %bnd2
ret
.global __mpx_bndcl2
.type __mpx_bndcl2, @function
__mpx_bndcl2:
bndcl %rdi, %bnd2
ret
.global __mpx_bndcu2
.type __mpx_bndcu2, @function
__mpx_bndcu2:
bndcu %rdi, %bnd2
ret
/* For bnd3 */
.global __mpx_bndmk3
.type __mpx_bndmk3, @function
__mpx_bndmk3:
bndmk (%rdi, %rsi, 1), %bnd3
ret
.global __mpx_bndcl3
.type __mpx_bndcl3, @function
__mpx_bndcl3:
bndcl %rdi, %bnd3
ret
.global __mpx_bndcu3
.type __mpx_bndcu3, @function
__mpx_bndcu3:
bndcu %rdi, %bnd3
ret
|
Tim-C1/occlum-he
| 4,730
|
src/libos/src/syscall/syscall_entry_x86-64.S
|
#define __ASSEMBLY__
#include "task.h"
.file "syscall_entry_x86-64.S"
.global __occlum_syscall_linux_pku_abi
.type __occlum_syscall_linux_pku_abi, @function
__occlum_syscall_linux_pku_abi:
// Skip the red zone aera (128 bytes according to x86_64 System V ABI)
// Use `lea` here since it does not modify FLAGS
lea -128(%rsp), %rsp
pushfq
pushq %rcx
pushq %rdx
pushq %rax
xor %ecx, %ecx
xor %edx, %edx
mov $PKRU_LIBOS, %eax
wrpkru
popq %rax
popq %rdx
popq %rcx
popfq
lea 128(%rsp), %rsp
.global __occlum_syscall_linux_abi
.type __occlum_syscall_linux_abi, @function
__occlum_syscall_linux_abi:
// num - %rax
// arg0 - %rdi
// arg1 - %rsi
// arg2 - %rdx
// arg3 - %r10
// arg4 - %r8
// arg5 - *r9
// return address - %rcx
// Save rsp in r11
// r11 is used to store RFLAGS. Since the FLAGS is not changed before pushfq,
// r11 is used to save original rsp.
movq %rsp, %r11
// Get current task
movq %gs:(TD_TASK_OFFSET), %rsp
// Switch to the kernel stack
movq TASK_KERNEL_RSP(%rsp), %rsp
// Save the target CPU state when `call __occlum_syscall` is returned in
// a CpuContext struct. The registers are saved in the reverse order of
// the fields in CpuContext.
pushq $0 // default fpregs is NULL
pushq $0 // default fpregs is allocated on stack
pushfq
push %rcx // save %rip
push %r11 // save %rsp
push %rcx
push %rax
push %rdx
push %rbx
push %rbp
push %rsi
push %rdi
push %r15
push %r14
push %r13
push %r12
push %r11
push %r10
push %r9
push %r8
// Make %rdi points to CpuContext.
mov %rsp, %rdi
// Get current task
movq %gs:(TD_TASK_OFFSET), %r12
// Switch to the kernel TLS by setting fsbase. Different implementation for HW and SIM modes.
#if SGX_MODE_SIM
pushq %rdi
pushq %rsi
movq $ARCH_SET_FS, %rdi
movq TASK_KERNEL_FS(%r12), %rsi
call __arch_prctl
popq %rsi
popq %rdi
#else // SGX_MODE_HW
movq TASK_KERNEL_FS(%r12), %r11
wrfsbase %r11
#endif
// Keep the stack 16 bytes alignment
and $-16, %rsp
// Do syscall
call occlum_syscall
// This should never happen!
ud2
.global __occlum_sysret
.type __occlum_sysret, @function
__occlum_sysret:
// Arguments:
// %rdi - user_context: &mut CpuContext
// Get current task
movq %gs:(TD_TASK_OFFSET), %r12
// Switch to the user TLS. Different implementation for HW and SIM modes.
#if SGX_MODE_SIM
pushq %rdi
movq $ARCH_SET_FS, %rdi
movq TASK_USER_FS(%r12), %rsi
call __arch_prctl
popq %rdi
#else // SGX_MODE_HW
movq TASK_USER_FS(%r12), %r11
wrfsbase %r11
#endif
// Restore flags first
leaq (17*8)(%rdi), %rsp
popfq
// Restore the return address
movq (16*8)(%rdi), %rcx //save the return address in %rcx
movq %rcx, %gs:(TD_SYSCALL_RET_ADDR_OFFSET)
// Make %rsp points to the CPU context
mov %rdi, %rsp
// Restore the CPU context of the user space
pop %r8
pop %r9
pop %r10
pop %r11
pop %r12
pop %r13
pop %r14
pop %r15
pop %rdi
pop %rsi
pop %rbp
pop %rbx
pop %rdx
pop %rax
pop %rcx
pop %rsp
// Skip the red zone aera (128 bytes according to x86_64 System V ABI)
// Use `lea` here since it does not modify FLAGS
lea -128(%rsp), %rsp
// Store RFLAGS since `cmp` operation may overwrite it
pushfq
push %rax
mov pku_enabled(%rip), %rax
cmp $1, %rax
je update_pkru_in_sysret
pop %rax
popfq
lea 128(%rsp), %rsp
jmp *%gs:(TD_SYSCALL_RET_ADDR_OFFSET)
// This should never happen
ud2
update_pkru_in_sysret:
// Prepare temporary stack area for saving the %rdx, %rdx and return address
lea -3*8(%rsp), %rsp
mov %rdx, (%rsp)
mov %rcx, 8(%rsp)
mov %gs:(TD_SYSCALL_RET_ADDR_OFFSET), %rcx
mov %rcx, 2*8(%rsp)
xor %ecx, %ecx
xor %edx, %edx
mov $PKRU_USER, %eax
wrpkru
pop %rdx
pop %rcx
// Skip the return address
lea 8(%rsp), %rsp
pop %rax
popfq
lea 128(%rsp), %rsp // Restore the %rsp
jmp *(-128-3*8)(%rsp)
// This should never happen
ud2
.global __occlum_syscall_c_abi
.type __occlum_syscall_c_abi, @function
__occlum_syscall_c_abi:
movq %rdi,%rax
movq %rsi,%rdi
movq %rdx,%rsi
movq %rcx,%rdx
movq %r8,%r10
movq %r9,%r8
movq 8(%rsp),%r9
lea syscall_return(%rip), %rcx
jmp __occlum_syscall_linux_abi
syscall_return:
ret
|
Tim-C1/occlum-he
| 2,094
|
src/libos/src/process/task/task_x86-64.S
|
#define __ASSEMBLY__
#include "task.h"
.file "task_x86-64.S"
.global __set_current_task
.type __set_current_task, @function
__set_current_task:
movq %rdi, %gs:(TD_TASK_OFFSET)
ret
.global __get_current_task
.type __get_current_task, @function
__get_current_task:
movq %gs:(TD_TASK_OFFSET), %rax
ret
.global __get_stack_guard
.type __get_stack_guard, @function
__get_stack_guard:
movq %gs:(TD_TASK_OFFSET), %rax
ret
.global __set_stack_guard
.type __set_stack_guard, @function
__set_stack_guard:
mov %rdi, %gs:(TD_TASK_OFFSET)
ret
.global __exec_task
.type __exec_task, @function
__exec_task:
// Save kernel fsbase and use user fsbase
//
// SGX HW Mode and SIM Mode require different implementations. In SGX hardware
// mode, we read/write fsbase via RDFSBASE/WRFSBASE instruction directly.
// But in SGX simulation mode, modifying fsbase directly via the instrution will
// break GDB (ptrace can't get right value if WRFSBASE is called which
// will make debugger fail in simulation mode). Thus we read/write FS base via
// arch_prctl system call.
#if SGX_MODE_SIM
pushq %rdi
pushq %rsi
movq %rdi, %r10
movq %rdi, %r12
// Save kernel fsbase
movq $ARCH_GET_FS, %rdi
add $TASK_KERNEL_FS, %r10
movq %r10, %rsi
call __arch_prctl
// Use user fsbase
movq $ARCH_SET_FS, %rdi
movq TASK_USER_FS(%r12), %rsi
call __arch_prctl
popq %rsi
popq %rdi
#else // SGX_MODE_HW
// Save kernel fsbase
rdfsbase %r10
movq %r10, TASK_KERNEL_FS(%rdi)
// Use user fsbase
movq TASK_USER_FS(%rdi), %r10
wrfsbase %r10
#endif
// Use user stack
movq TASK_USER_RSP(%rdi), %rsp
// Get user code address
movq TASK_USER_ENTRY_ADDR(%rdi), %r11
// Whether to switch PKRU value
mov pku_enabled(%rip), %r10
cmp $1, %r10
je update_pkru_in_exec_task
// Run user code
jmp *%r11
update_pkru_in_exec_task:
xor %ecx, %ecx
xor %edx, %edx
mov $PKRU_USER, %eax
wrpkru
jmp *%r11
|
Tinuvile/NimlothOS
| 1,159
|
os/src/trap/trap.S
|
.altmacro
.macro SAVE_GP n
sd x\n, \n*8(sp)
.endm
.macro LOAD_GP n
ld x\n, \n*8(sp)
.endm
.section .text.trampoline
.global __alltraps
.global __restore
.align 2
__alltraps:
# 交换 sscratch and sp(x2) 寄存器内容
csrrw sp, sscratch, sp
# 现在sp->kernel stack，sscratch->user stack
# 保存通用寄存器，跳过x0,tp(x4)
sd x1, 1*8(sp)
sd x3, 3*8(sp)
.set n, 5
.rept 27
SAVE_GP %n
.set n, n+1
.endr
# 读寄存器并保存
csrr t0, sstatus
csrr t1, sepc
sd t0, 32*8(sp)
sd t1, 33*8(sp)
# sscratch 现在指向用户栈
csrr t2, sscratch
sd t2, 2*8(sp)
# 保存kernel_satp到t0
ld t0, 34*8(sp)
# 保存trap_handler到t1
ld t1, 36*8(sp)
# 跳转到kernel_sp
ld sp, 35*8(sp)
# 切换到内核地址空间
csrw satp, t0
sfence.vma
# 跳转到trap_handler
jr t1
__restore:
# 切换到用户地址空间
csrw satp, a1
sfence.vma
csrw sscratch, a0
mv sp, a0
# 恢复CSR和通用寄存器
ld t0, 32*8(sp)
ld t1, 33*8(sp)
csrw sstatus, t0
csrw sepc, t1
ld x1, 1*8(sp)
ld x3, 3*8(sp)
.set n, 5
.rept 27
LOAD_GP %n
.set n, n+1
.endr
# 恢复用户栈指针
ld sp, 2*8(sp)
sret
|
tjcampanella/rorth
| 2,558
|
example-asm/digit.s
|
.global _start
.align 2
.text
print:
adrp x0, num@PAGE
add x0, x0, num@PAGEOFF
// Load value from the stack.
ldr x1, [sp], #16
// Convert number in x1 to its ASCII representation
mov x2, #10 // Base 10
mov x3, #19 // Initialize index
convert_loop:
udiv x4, x1, x2 // Divide by 10, quotient in x4, remainder in x1
mul x5, x4, x2 // Multiply quotient by 10
sub x6, x1, x5 // Calculate remainder
and w6, w6, #0xFF
add x6, x6, #'0' // Convert remainder to ASCII
// Store ASCII character in num
strb w6, [x0, x3]
sub x3, x3, #1 // Decrement index
mov x1, x4 // Update x1 with quotient
cmp x1, #0 // Check if quotient is zero
beq zero_done // If quotient is zero, terminate early
cmp x3, #0 // Check if index is zero
beq zero_done // If index is zero, terminate early
b convert_loop // If not zero, continue loop
zero_done:
// Recompute the address of num
adrp x4, num@PAGE
add x4, x4, num@PAGEOFF
// Find the actual length of the converted number
mov x2, #20 // Length of num
sub x2, x2, x3 // Subtract remaining index from the total length
add x4, x4, x3 // Move the address forward by the remaining index
mov x1, x4 // Load the correct address into x1
mov x0, #1 // 1 = StdOut
mov x16, #4 // Unix write system call
svc #0x80 // Call kernel to output the string
// Print newline character
mov x0, #0
adrp x0, newline@PAGE
add x0, x0, newline@PAGEOFF
mov x1, x0 // Load the correct address into x1
mov x0, #1 // 1 = StdOut
mov x2, #1 // Length of newline
mov x16, #4 // Unix write system call
svc #0x80 // Call kernel to output the newline character
//Zero out number
mov x1, #20
loop:
strb wzr, [x4], #1 ; Store zero (wzr = register containing zero) and increment the address
subs x1, x1, #1 ; Decrement the length
bne loop ; Repeat the loop if length is not zero
ret
_start:
// push
ldr x0, =34
str x0, [sp, #-16]!
// push
ldr x0, =12345678912345678912
str x0, [sp, #-16]!
bl print
bl print
// exit syscall
mov x0, #0
mov x16, #1
svc #0x80
.data
num: .zero 20
newline: .asciz "\n"
|
tjulitianyi1997/AscendProjects
| 29,171
|
robot/ascend_car/Ascend-智能车底盘控制源码及说明/Ascend-底盘控制stm32源码/CORE/startup_stm32f40_41xxx.s
|
;******************** (C) COPYRIGHT 2014 STMicroelectronics ********************
;* File Name : startup_stm32f40_41xxx.s
;* Author : MCD Application Team
;* @version : V1.4.0
;* @date : 04-August-2014
;* Description : STM32F40xxx/41xxx devices vector table for MDK-ARM toolchain.
;* This module performs:
;* - Set the initial SP
;* - Set the initial PC == Reset_Handler
;* - Set the vector table entries with the exceptions ISR address
;* - Configure the system clock and the external SRAM mounted on
;* STM324xG-EVAL board to be used as data memory (optional,
;* to be enabled by user)
;* - Branches to __main in the C library (which eventually
;* calls main()).
;* After Reset the CortexM4 processor is in Thread mode,
;* priority is Privileged, and the Stack is set to Main.
;* <<< Use Configuration Wizard in Context Menu >>>
;*******************************************************************************
;
; Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
; You may not use this file except in compliance with the License.
; You may obtain a copy of the License at:
;
; http://www.st.com/software_license_agreement_liberty_v2
;
; Unless required by applicable law or agreed to in writing, software
; distributed under the License is distributed on an "AS IS" BASIS,
; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
; See the License for the specific language governing permissions and
; limitations under the License.
;
;*******************************************************************************
; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000200
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD WWDG_IRQHandler ; Window WatchDog
DCD PVD_IRQHandler ; PVD through EXTI Line detection
DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
DCD FLASH_IRQHandler ; FLASH
DCD RCC_IRQHandler ; RCC
DCD EXTI0_IRQHandler ; EXTI Line0
DCD EXTI1_IRQHandler ; EXTI Line1
DCD EXTI2_IRQHandler ; EXTI Line2
DCD EXTI3_IRQHandler ; EXTI Line3
DCD EXTI4_IRQHandler ; EXTI Line4
DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0
DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1
DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2
DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3
DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4
DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5
DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6
DCD ADC_IRQHandler ; ADC1, ADC2 and ADC3s
DCD CAN1_TX_IRQHandler ; CAN1 TX
DCD CAN1_RX0_IRQHandler ; CAN1 RX0
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
DCD EXTI9_5_IRQHandler ; External Line[9:5]s
DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9
DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10
DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
DCD TIM2_IRQHandler ; TIM2
DCD TIM3_IRQHandler ; TIM3
DCD TIM4_IRQHandler ; TIM4
DCD I2C1_EV_IRQHandler ; I2C1 Event
DCD I2C1_ER_IRQHandler ; I2C1 Error
DCD I2C2_EV_IRQHandler ; I2C2 Event
DCD I2C2_ER_IRQHandler ; I2C2 Error
DCD SPI1_IRQHandler ; SPI1
DCD SPI2_IRQHandler ; SPI2
DCD USART1_IRQHandler ; USART1
DCD USART2_IRQHandler ; USART2
DCD USART3_IRQHandler ; USART3
DCD EXTI15_10_IRQHandler ; External Line[15:10]s
DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line
DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break and TIM12
DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update and TIM13
DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation and TIM14
DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare
DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7
DCD FSMC_IRQHandler ; FSMC
DCD SDIO_IRQHandler ; SDIO
DCD TIM5_IRQHandler ; TIM5
DCD SPI3_IRQHandler ; SPI3
DCD UART4_IRQHandler ; UART4
DCD UART5_IRQHandler ; UART5
DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
DCD TIM7_IRQHandler ; TIM7
DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0
DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1
DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2
DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3
DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4
DCD ETH_IRQHandler ; Ethernet
DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line
DCD CAN2_TX_IRQHandler ; CAN2 TX
DCD CAN2_RX0_IRQHandler ; CAN2 RX0
DCD CAN2_RX1_IRQHandler ; CAN2 RX1
DCD CAN2_SCE_IRQHandler ; CAN2 SCE
DCD OTG_FS_IRQHandler ; USB OTG FS
DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5
DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6
DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7
DCD USART6_IRQHandler ; USART6
DCD I2C3_EV_IRQHandler ; I2C3 event
DCD I2C3_ER_IRQHandler ; I2C3 error
DCD OTG_HS_EP1_OUT_IRQHandler ; USB OTG HS End Point 1 Out
DCD OTG_HS_EP1_IN_IRQHandler ; USB OTG HS End Point 1 In
DCD OTG_HS_WKUP_IRQHandler ; USB OTG HS Wakeup through EXTI
DCD OTG_HS_IRQHandler ; USB OTG HS
DCD DCMI_IRQHandler ; DCMI
DCD CRYP_IRQHandler ; CRYP crypto
DCD HASH_RNG_IRQHandler ; Hash and Rng
DCD FPU_IRQHandler ; FPU
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT __main
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDG_IRQHandler [WEAK]
EXPORT PVD_IRQHandler [WEAK]
EXPORT TAMP_STAMP_IRQHandler [WEAK]
EXPORT RTC_WKUP_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT RCC_IRQHandler [WEAK]
EXPORT EXTI0_IRQHandler [WEAK]
EXPORT EXTI1_IRQHandler [WEAK]
EXPORT EXTI2_IRQHandler [WEAK]
EXPORT EXTI3_IRQHandler [WEAK]
EXPORT EXTI4_IRQHandler [WEAK]
EXPORT DMA1_Stream0_IRQHandler [WEAK]
EXPORT DMA1_Stream1_IRQHandler [WEAK]
EXPORT DMA1_Stream2_IRQHandler [WEAK]
EXPORT DMA1_Stream3_IRQHandler [WEAK]
EXPORT DMA1_Stream4_IRQHandler [WEAK]
EXPORT DMA1_Stream5_IRQHandler [WEAK]
EXPORT DMA1_Stream6_IRQHandler [WEAK]
EXPORT ADC_IRQHandler [WEAK]
EXPORT CAN1_TX_IRQHandler [WEAK]
EXPORT CAN1_RX0_IRQHandler [WEAK]
EXPORT CAN1_RX1_IRQHandler [WEAK]
EXPORT CAN1_SCE_IRQHandler [WEAK]
EXPORT EXTI9_5_IRQHandler [WEAK]
EXPORT TIM1_BRK_TIM9_IRQHandler [WEAK]
EXPORT TIM1_UP_TIM10_IRQHandler [WEAK]
EXPORT TIM1_TRG_COM_TIM11_IRQHandler [WEAK]
EXPORT TIM1_CC_IRQHandler [WEAK]
EXPORT TIM2_IRQHandler [WEAK]
EXPORT TIM3_IRQHandler [WEAK]
EXPORT TIM4_IRQHandler [WEAK]
EXPORT I2C1_EV_IRQHandler [WEAK]
EXPORT I2C1_ER_IRQHandler [WEAK]
EXPORT I2C2_EV_IRQHandler [WEAK]
EXPORT I2C2_ER_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
EXPORT USART3_IRQHandler [WEAK]
EXPORT EXTI15_10_IRQHandler [WEAK]
EXPORT RTC_Alarm_IRQHandler [WEAK]
EXPORT OTG_FS_WKUP_IRQHandler [WEAK]
EXPORT TIM8_BRK_TIM12_IRQHandler [WEAK]
EXPORT TIM8_UP_TIM13_IRQHandler [WEAK]
EXPORT TIM8_TRG_COM_TIM14_IRQHandler [WEAK]
EXPORT TIM8_CC_IRQHandler [WEAK]
EXPORT DMA1_Stream7_IRQHandler [WEAK]
EXPORT FSMC_IRQHandler [WEAK]
EXPORT SDIO_IRQHandler [WEAK]
EXPORT TIM5_IRQHandler [WEAK]
EXPORT SPI3_IRQHandler [WEAK]
EXPORT UART4_IRQHandler [WEAK]
EXPORT UART5_IRQHandler [WEAK]
EXPORT TIM6_DAC_IRQHandler [WEAK]
EXPORT TIM7_IRQHandler [WEAK]
EXPORT DMA2_Stream0_IRQHandler [WEAK]
EXPORT DMA2_Stream1_IRQHandler [WEAK]
EXPORT DMA2_Stream2_IRQHandler [WEAK]
EXPORT DMA2_Stream3_IRQHandler [WEAK]
EXPORT DMA2_Stream4_IRQHandler [WEAK]
EXPORT ETH_IRQHandler [WEAK]
EXPORT ETH_WKUP_IRQHandler [WEAK]
EXPORT CAN2_TX_IRQHandler [WEAK]
EXPORT CAN2_RX0_IRQHandler [WEAK]
EXPORT CAN2_RX1_IRQHandler [WEAK]
EXPORT CAN2_SCE_IRQHandler [WEAK]
EXPORT OTG_FS_IRQHandler [WEAK]
EXPORT DMA2_Stream5_IRQHandler [WEAK]
EXPORT DMA2_Stream6_IRQHandler [WEAK]
EXPORT DMA2_Stream7_IRQHandler [WEAK]
EXPORT USART6_IRQHandler [WEAK]
EXPORT I2C3_EV_IRQHandler [WEAK]
EXPORT I2C3_ER_IRQHandler [WEAK]
EXPORT OTG_HS_EP1_OUT_IRQHandler [WEAK]
EXPORT OTG_HS_EP1_IN_IRQHandler [WEAK]
EXPORT OTG_HS_WKUP_IRQHandler [WEAK]
EXPORT OTG_HS_IRQHandler [WEAK]
EXPORT DCMI_IRQHandler [WEAK]
EXPORT CRYP_IRQHandler [WEAK]
EXPORT HASH_RNG_IRQHandler [WEAK]
EXPORT FPU_IRQHandler [WEAK]
WWDG_IRQHandler
PVD_IRQHandler
TAMP_STAMP_IRQHandler
RTC_WKUP_IRQHandler
FLASH_IRQHandler
RCC_IRQHandler
EXTI0_IRQHandler
EXTI1_IRQHandler
EXTI2_IRQHandler
EXTI3_IRQHandler
EXTI4_IRQHandler
DMA1_Stream0_IRQHandler
DMA1_Stream1_IRQHandler
DMA1_Stream2_IRQHandler
DMA1_Stream3_IRQHandler
DMA1_Stream4_IRQHandler
DMA1_Stream5_IRQHandler
DMA1_Stream6_IRQHandler
ADC_IRQHandler
CAN1_TX_IRQHandler
CAN1_RX0_IRQHandler
CAN1_RX1_IRQHandler
CAN1_SCE_IRQHandler
EXTI9_5_IRQHandler
TIM1_BRK_TIM9_IRQHandler
TIM1_UP_TIM10_IRQHandler
TIM1_TRG_COM_TIM11_IRQHandler
TIM1_CC_IRQHandler
TIM2_IRQHandler
TIM3_IRQHandler
TIM4_IRQHandler
I2C1_EV_IRQHandler
I2C1_ER_IRQHandler
I2C2_EV_IRQHandler
I2C2_ER_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
USART3_IRQHandler
EXTI15_10_IRQHandler
RTC_Alarm_IRQHandler
OTG_FS_WKUP_IRQHandler
TIM8_BRK_TIM12_IRQHandler
TIM8_UP_TIM13_IRQHandler
TIM8_TRG_COM_TIM14_IRQHandler
TIM8_CC_IRQHandler
DMA1_Stream7_IRQHandler
FSMC_IRQHandler
SDIO_IRQHandler
TIM5_IRQHandler
SPI3_IRQHandler
UART4_IRQHandler
UART5_IRQHandler
TIM6_DAC_IRQHandler
TIM7_IRQHandler
DMA2_Stream0_IRQHandler
DMA2_Stream1_IRQHandler
DMA2_Stream2_IRQHandler
DMA2_Stream3_IRQHandler
DMA2_Stream4_IRQHandler
ETH_IRQHandler
ETH_WKUP_IRQHandler
CAN2_TX_IRQHandler
CAN2_RX0_IRQHandler
CAN2_RX1_IRQHandler
CAN2_SCE_IRQHandler
OTG_FS_IRQHandler
DMA2_Stream5_IRQHandler
DMA2_Stream6_IRQHandler
DMA2_Stream7_IRQHandler
USART6_IRQHandler
I2C3_EV_IRQHandler
I2C3_ER_IRQHandler
OTG_HS_EP1_OUT_IRQHandler
OTG_HS_EP1_IN_IRQHandler
OTG_HS_WKUP_IRQHandler
OTG_HS_IRQHandler
DCMI_IRQHandler
CRYP_IRQHandler
HASH_RNG_IRQHandler
FPU_IRQHandler
B .
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
tjulitianyi1997/AscendProjects
| 6,530
|
robot/ascend_car/Ascend-智能车底盘控制源码及说明/Ascend-底盘控制stm32源码/FreeRTOS/portable/RVDS/ARM_CA9/portASM.s
|
;/*
; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
;
; ***************************************************************************
; * *
; * FreeRTOS tutorial books are available in pdf and paperback. *
; * Complete, revised, and edited pdf reference manuals are also *
; * available. *
; * *
; * Purchasing FreeRTOS documentation will not only help you, by *
; * ensuring you get running as quickly as possible and with an *
; * in-depth knowledge of how to use FreeRTOS, it will also help *
; * the FreeRTOS project to continue with its mission of providing *
; * professional grade, cross platform, de facto standard solutions *
; * for microcontrollers - completely free of charge! *
; * *
; * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
; * *
; * Thank you for using FreeRTOS, and thank you for your support! *
; * *
; ***************************************************************************
;
;
; This file is part of the FreeRTOS distribution.
;
; FreeRTOS is free software; you can redistribute it and/or modify it under
; the terms of the GNU General Public License (version 2) as published by the
; Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
; >>>NOTE<<< The modification to the GPL is included to allow you to
; distribute a combined work that includes FreeRTOS without being obliged to
; provide the source code for proprietary components outside of the FreeRTOS
; kernel. FreeRTOS is distributed in the hope that it will be useful, but
; WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
; more details. You should have received a copy of the GNU General Public
; License and the FreeRTOS license exception along with FreeRTOS; if not it
; can be viewed here: http://www.freertos.org/a00114.html and also obtained
; by writing to Richard Barry, contact details for whom are available on the
; FreeRTOS WEB site.
;
; 1 tab == 4 spaces!
;
; http://www.FreeRTOS.org - Documentation, latest information, license and
; contact details.
;
; http://www.SafeRTOS.com - A version that is certified for use in safety
; critical systems.
;
; http://www.OpenRTOS.com - Commercial support, development, porting,
; licensing and training services.
;*/
INCLUDE portmacro.inc
IMPORT vApplicationIRQHandler
IMPORT vTaskSwitchContext
IMPORT ulPortYieldRequired
IMPORT ulPortInterruptNesting
IMPORT vTaskSwitchContext
IMPORT ulICCIAR
IMPORT ulICCEOIR
EXPORT FreeRTOS_SWI_Handler
EXPORT FreeRTOS_IRQ_Handler
EXPORT vPortRestoreTaskContext
ARM
AREA PORT_ASM, CODE, READONLY
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; SVC handler is used to yield a task.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
FreeRTOS_SWI_Handler
PRESERVE8
; Save the context of the current task and select a new task to run.
portSAVE_CONTEXT
LDR R0, =vTaskSwitchContext
BLX R0
portRESTORE_CONTEXT
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; vPortRestoreTaskContext is used to start the scheduler.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
vPortRestoreTaskContext
; Switch to system mode
CPS #SYS_MODE
portRESTORE_CONTEXT
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; PL390 GIC interrupt handler
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
FreeRTOS_IRQ_Handler
; Return to the interrupted instruction.
SUB lr, lr, #4
; Push the return address and SPSR
PUSH {lr}
MRS lr, SPSR
PUSH {lr}
; Change to supervisor mode to allow reentry.
CPS #SVC_MODE
; Push used registers.
PUSH {r0-r4, r12}
; Increment nesting count. r3 holds the address of ulPortInterruptNesting
; for future use. r1 holds the original ulPortInterruptNesting value for
; future use.
LDR r3, =ulPortInterruptNesting
LDR r1, [r3]
ADD r4, r1, #1
STR r4, [r3]
; Read value from the interrupt acknowledge register, which is stored in r0
; for future parameter and interrupt clearing use.
LDR r2, =ulICCIAR
LDR r0, [r2]
; Ensure bit 2 of the stack pointer is clear. r2 holds the bit 2 value for
; future use.
MOV r2, sp
AND r2, r2, #4
SUB sp, sp, r2
; Call the interrupt handler
PUSH {r0-r3, lr}
LDR r1, =vApplicationIRQHandler
BLX r1
POP {r0-r3, lr}
ADD sp, sp, r2
CPSID i
; Write the value read from ICCIAR to ICCEOIR
LDR r4, =ulICCEOIR
STR r0, [r4]
; Restore the old nesting count
STR r1, [r3]
; A context switch is never performed if the nesting count is not 0
CMP r1, #0
BNE exit_without_switch
; Did the interrupt request a context switch? r1 holds the address of
; ulPortYieldRequired and r0 the value of ulPortYieldRequired for future
; use.
LDR r1, =ulPortYieldRequired
LDR r0, [r1]
CMP r0, #0
BNE switch_before_exit
exit_without_switch
; No context switch. Restore used registers, LR_irq and SPSR before
; returning.
POP {r0-r4, r12}
CPS #IRQ_MODE
POP {LR}
MSR SPSR_cxsf, LR
POP {LR}
MOVS PC, LR
switch_before_exit
; A context swtich is to be performed. Clear the context switch pending
; flag.
MOV r0, #0
STR r0, [r1]
; Restore used registers, LR-irq and SPSR before saving the context
; to the task stack.
POP {r0-r4, r12}
CPS #IRQ_MODE
POP {LR}
MSR SPSR_cxsf, LR
POP {LR}
portSAVE_CONTEXT
; Call the function that selects the new task to execute.
; vTaskSwitchContext() if vTaskSwitchContext() uses LDRD or STRD
; instructions, or 8 byte aligned stack allocated data. LR does not need
; saving as a new LR will be loaded by portRESTORE_CONTEXT anyway.
LDR r0, =vTaskSwitchContext
BLX r0
; Restore the context of, and branch to, the task selected to execute next.
portRESTORE_CONTEXT
END
|
tjulitianyi1997/AscendProjects
| 5,593
|
robot/ascend_car/Ascend-智能车底盘控制源码及说明/Ascend-底盘控制stm32源码/FreeRTOS/portable/RVDS/ARM7_LPC21xx/portASM.s
|
;/*
; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
;
; ***************************************************************************
; * *
; * FreeRTOS tutorial books are available in pdf and paperback. *
; * Complete, revised, and edited pdf reference manuals are also *
; * available. *
; * *
; * Purchasing FreeRTOS documentation will not only help you, by *
; * ensuring you get running as quickly as possible and with an *
; * in-depth knowledge of how to use FreeRTOS, it will also help *
; * the FreeRTOS project to continue with its mission of providing *
; * professional grade, cross platform, de facto standard solutions *
; * for microcontrollers - completely free of charge! *
; * *
; * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
; * *
; * Thank you for using FreeRTOS, and thank you for your support! *
; * *
; ***************************************************************************
;
;
; This file is part of the FreeRTOS distribution.
;
; FreeRTOS is free software; you can redistribute it and/or modify it under
; the terms of the GNU General Public License (version 2) as published by the
; Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
; >>>NOTE<<< The modification to the GPL is included to allow you to
; distribute a combined work that includes FreeRTOS without being obliged to
; provide the source code for proprietary components outside of the FreeRTOS
; kernel. FreeRTOS is distributed in the hope that it will be useful, but
; WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
; more details. You should have received a copy of the GNU General Public
; License and the FreeRTOS license exception along with FreeRTOS; if not it
; can be viewed here: http://www.freertos.org/a00114.html and also obtained
; by writing to Richard Barry, contact details for whom are available on the
; FreeRTOS WEB site.
;
; 1 tab == 4 spaces!
;
; http://www.FreeRTOS.org - Documentation, latest information, license and
; contact details.
;
; http://www.SafeRTOS.com - A version that is certified for use in safety
; critical systems.
;
; http://www.OpenRTOS.com - Commercial support, development, porting,
; licensing and training services.
;*/
INCLUDE portmacro.inc
IMPORT vTaskSwitchContext
IMPORT xTaskIncrementTick
EXPORT vPortYieldProcessor
EXPORT vPortStartFirstTask
EXPORT vPreemptiveTick
EXPORT vPortYield
VICVECTADDR EQU 0xFFFFF030
T0IR EQU 0xE0004000
T0MATCHBIT EQU 0x00000001
ARM
AREA PORT_ASM, CODE, READONLY
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Starting the first task is done by just restoring the context
; setup by pxPortInitialiseStack
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
vPortStartFirstTask
PRESERVE8
portRESTORE_CONTEXT
vPortYield
PRESERVE8
SVC 0
bx lr
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Interrupt service routine for the SWI interrupt. The vector table is
; configured in the startup.s file.
;
; vPortYieldProcessor() is used to manually force a context switch. The
; SWI interrupt is generated by a call to taskYIELD() or portYIELD().
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
vPortYieldProcessor
PRESERVE8
; Within an IRQ ISR the link register has an offset from the true return
; address, but an SWI ISR does not. Add the offset manually so the same
; ISR return code can be used in both cases.
ADD LR, LR, #4
; Perform the context switch.
portSAVE_CONTEXT ; Save current task context
LDR R0, =vTaskSwitchContext ; Get the address of the context switch function
MOV LR, PC ; Store the return address
BX R0 ; Call the contedxt switch function
portRESTORE_CONTEXT ; restore the context of the selected task
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Interrupt service routine for preemptive scheduler tick timer
; Only used if portUSE_PREEMPTION is set to 1 in portmacro.h
;
; Uses timer 0 of LPC21XX Family
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
vPreemptiveTick
PRESERVE8
portSAVE_CONTEXT ; Save the context of the current task.
LDR R0, =xTaskIncrementTick ; Increment the tick count.
MOV LR, PC ; This may make a delayed task ready
BX R0 ; to run.
CMP R0, #0
BEQ SkipContextSwitch
LDR R0, =vTaskSwitchContext ; Find the highest priority task that
MOV LR, PC ; is ready to run.
BX R0
SkipContextSwitch
MOV R0, #T0MATCHBIT ; Clear the timer event
LDR R1, =T0IR
STR R0, [R1]
LDR R0, =VICVECTADDR ; Acknowledge the interrupt
STR R0,[R0]
portRESTORE_CONTEXT ; Restore the context of the highest
; priority task that is ready to run.
END
|
tjulitianyi1997/AscendProjects
| 12,458
|
robot/ascend_car/Ascend-机械臂控制源码及说明/Ascend_project/CORE/startup_stm32f10x_md.s
|
;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
;* File Name : startup_stm32f10x_md.s
;* Author : MCD Application Team
;* Version : V3.5.0
;* Date : 11-March-2011
;* Description : STM32F10x Medium Density Devices vector table for MDK-ARM
;* toolchain.
;* This module performs:
;* - Set the initial SP
;* - Set the initial PC == Reset_Handler
;* - Set the vector table entries with the exceptions ISR address
;* - Configure the clock system
;* - Branches to __main in the C library (which eventually
;* calls main()).
;* After Reset the CortexM3 processor is in Thread mode,
;* priority is Privileged, and the Stack is set to Main.
;* <<< Use Configuration Wizard in Context Menu >>>
;*******************************************************************************
; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
;*******************************************************************************
; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00001000
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00001000
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD WWDG_IRQHandler ; Window Watchdog
DCD PVD_IRQHandler ; PVD through EXTI Line detect
DCD TAMPER_IRQHandler ; Tamper
DCD RTC_IRQHandler ; RTC
DCD FLASH_IRQHandler ; Flash
DCD RCC_IRQHandler ; RCC
DCD EXTI0_IRQHandler ; EXTI Line 0
DCD EXTI1_IRQHandler ; EXTI Line 1
DCD EXTI2_IRQHandler ; EXTI Line 2
DCD EXTI3_IRQHandler ; EXTI Line 3
DCD EXTI4_IRQHandler ; EXTI Line 4
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
DCD ADC1_2_IRQHandler ; ADC1_2
DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX
DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
DCD TIM1_BRK_IRQHandler ; TIM1 Break
DCD TIM1_UP_IRQHandler ; TIM1 Update
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
DCD TIM2_IRQHandler ; TIM2
DCD TIM3_IRQHandler ; TIM3
DCD TIM4_IRQHandler ; TIM4
DCD I2C1_EV_IRQHandler ; I2C1 Event
DCD I2C1_ER_IRQHandler ; I2C1 Error
DCD I2C2_EV_IRQHandler ; I2C2 Event
DCD I2C2_ER_IRQHandler ; I2C2 Error
DCD SPI1_IRQHandler ; SPI1
DCD SPI2_IRQHandler ; SPI2
DCD USART1_IRQHandler ; USART1
DCD USART2_IRQHandler ; USART2
DCD USART3_IRQHandler ; USART3
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line
DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT __main
IMPORT SystemInit
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDG_IRQHandler [WEAK]
EXPORT PVD_IRQHandler [WEAK]
EXPORT TAMPER_IRQHandler [WEAK]
EXPORT RTC_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT RCC_IRQHandler [WEAK]
EXPORT EXTI0_IRQHandler [WEAK]
EXPORT EXTI1_IRQHandler [WEAK]
EXPORT EXTI2_IRQHandler [WEAK]
EXPORT EXTI3_IRQHandler [WEAK]
EXPORT EXTI4_IRQHandler [WEAK]
EXPORT DMA1_Channel1_IRQHandler [WEAK]
EXPORT DMA1_Channel2_IRQHandler [WEAK]
EXPORT DMA1_Channel3_IRQHandler [WEAK]
EXPORT DMA1_Channel4_IRQHandler [WEAK]
EXPORT DMA1_Channel5_IRQHandler [WEAK]
EXPORT DMA1_Channel6_IRQHandler [WEAK]
EXPORT DMA1_Channel7_IRQHandler [WEAK]
EXPORT ADC1_2_IRQHandler [WEAK]
EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK]
EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK]
EXPORT CAN1_RX1_IRQHandler [WEAK]
EXPORT CAN1_SCE_IRQHandler [WEAK]
EXPORT EXTI9_5_IRQHandler [WEAK]
EXPORT TIM1_BRK_IRQHandler [WEAK]
EXPORT TIM1_UP_IRQHandler [WEAK]
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
EXPORT TIM1_CC_IRQHandler [WEAK]
EXPORT TIM2_IRQHandler [WEAK]
EXPORT TIM3_IRQHandler [WEAK]
EXPORT TIM4_IRQHandler [WEAK]
EXPORT I2C1_EV_IRQHandler [WEAK]
EXPORT I2C1_ER_IRQHandler [WEAK]
EXPORT I2C2_EV_IRQHandler [WEAK]
EXPORT I2C2_ER_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
EXPORT USART3_IRQHandler [WEAK]
EXPORT EXTI15_10_IRQHandler [WEAK]
EXPORT RTCAlarm_IRQHandler [WEAK]
EXPORT USBWakeUp_IRQHandler [WEAK]
WWDG_IRQHandler
PVD_IRQHandler
TAMPER_IRQHandler
RTC_IRQHandler
FLASH_IRQHandler
RCC_IRQHandler
EXTI0_IRQHandler
EXTI1_IRQHandler
EXTI2_IRQHandler
EXTI3_IRQHandler
EXTI4_IRQHandler
DMA1_Channel1_IRQHandler
DMA1_Channel2_IRQHandler
DMA1_Channel3_IRQHandler
DMA1_Channel4_IRQHandler
DMA1_Channel5_IRQHandler
DMA1_Channel6_IRQHandler
DMA1_Channel7_IRQHandler
ADC1_2_IRQHandler
USB_HP_CAN1_TX_IRQHandler
USB_LP_CAN1_RX0_IRQHandler
CAN1_RX1_IRQHandler
CAN1_SCE_IRQHandler
EXTI9_5_IRQHandler
TIM1_BRK_IRQHandler
TIM1_UP_IRQHandler
TIM1_TRG_COM_IRQHandler
TIM1_CC_IRQHandler
TIM2_IRQHandler
TIM3_IRQHandler
TIM4_IRQHandler
I2C1_EV_IRQHandler
I2C1_ER_IRQHandler
I2C2_EV_IRQHandler
I2C2_ER_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
USART3_IRQHandler
EXTI15_10_IRQHandler
RTCAlarm_IRQHandler
USBWakeUp_IRQHandler
B .
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END
;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****
|
tjulitianyi1997/AscendProjects
| 15,145
|
robot/ascend_car/Ascend-机械臂控制源码及说明/Ascend_project/CORE/startup_stm32f10x_hd.s
|
;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
;* File Name : startup_stm32f10x_hd.s
;* Author : MCD Application Team
;* Version : V3.5.0
;* Date : 11-March-2011
;* Description : STM32F10x High Density Devices vector table for MDK-ARM
;* toolchain.
;* This module performs:
;* - Set the initial SP
;* - Set the initial PC == Reset_Handler
;* - Set the vector table entries with the exceptions ISR address
;* - Configure the clock system and also configure the external
;* SRAM mounted on STM3210E-EVAL board to be used as data
;* memory (optional, to be enabled by user)
;* - Branches to __main in the C library (which eventually
;* calls main()).
;* After Reset the CortexM3 processor is in Thread mode,
;* priority is Privileged, and the Stack is set to Main.
;* <<< Use Configuration Wizard in Context Menu >>>
;*******************************************************************************
; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
;*******************************************************************************
; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000200
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD WWDG_IRQHandler ; Window Watchdog
DCD PVD_IRQHandler ; PVD through EXTI Line detect
DCD TAMPER_IRQHandler ; Tamper
DCD RTC_IRQHandler ; RTC
DCD FLASH_IRQHandler ; Flash
DCD RCC_IRQHandler ; RCC
DCD EXTI0_IRQHandler ; EXTI Line 0
DCD EXTI1_IRQHandler ; EXTI Line 1
DCD EXTI2_IRQHandler ; EXTI Line 2
DCD EXTI3_IRQHandler ; EXTI Line 3
DCD EXTI4_IRQHandler ; EXTI Line 4
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
DCD ADC1_2_IRQHandler ; ADC1 & ADC2
DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX
DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
DCD TIM1_BRK_IRQHandler ; TIM1 Break
DCD TIM1_UP_IRQHandler ; TIM1 Update
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
DCD TIM2_IRQHandler ; TIM2
DCD TIM3_IRQHandler ; TIM3
DCD TIM4_IRQHandler ; TIM4
DCD I2C1_EV_IRQHandler ; I2C1 Event
DCD I2C1_ER_IRQHandler ; I2C1 Error
DCD I2C2_EV_IRQHandler ; I2C2 Event
DCD I2C2_ER_IRQHandler ; I2C2 Error
DCD SPI1_IRQHandler ; SPI1
DCD SPI2_IRQHandler ; SPI2
DCD USART1_IRQHandler ; USART1
DCD USART2_IRQHandler ; USART2
DCD USART3_IRQHandler ; USART3
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line
DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend
DCD TIM8_BRK_IRQHandler ; TIM8 Break
DCD TIM8_UP_IRQHandler ; TIM8 Update
DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger and Commutation
DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare
DCD ADC3_IRQHandler ; ADC3
DCD FSMC_IRQHandler ; FSMC
DCD SDIO_IRQHandler ; SDIO
DCD TIM5_IRQHandler ; TIM5
DCD SPI3_IRQHandler ; SPI3
DCD UART4_IRQHandler ; UART4
DCD UART5_IRQHandler ; UART5
DCD TIM6_IRQHandler ; TIM6
DCD TIM7_IRQHandler ; TIM7
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3
DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT __main
IMPORT SystemInit
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDG_IRQHandler [WEAK]
EXPORT PVD_IRQHandler [WEAK]
EXPORT TAMPER_IRQHandler [WEAK]
EXPORT RTC_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT RCC_IRQHandler [WEAK]
EXPORT EXTI0_IRQHandler [WEAK]
EXPORT EXTI1_IRQHandler [WEAK]
EXPORT EXTI2_IRQHandler [WEAK]
EXPORT EXTI3_IRQHandler [WEAK]
EXPORT EXTI4_IRQHandler [WEAK]
EXPORT DMA1_Channel1_IRQHandler [WEAK]
EXPORT DMA1_Channel2_IRQHandler [WEAK]
EXPORT DMA1_Channel3_IRQHandler [WEAK]
EXPORT DMA1_Channel4_IRQHandler [WEAK]
EXPORT DMA1_Channel5_IRQHandler [WEAK]
EXPORT DMA1_Channel6_IRQHandler [WEAK]
EXPORT DMA1_Channel7_IRQHandler [WEAK]
EXPORT ADC1_2_IRQHandler [WEAK]
EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK]
EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK]
EXPORT CAN1_RX1_IRQHandler [WEAK]
EXPORT CAN1_SCE_IRQHandler [WEAK]
EXPORT EXTI9_5_IRQHandler [WEAK]
EXPORT TIM1_BRK_IRQHandler [WEAK]
EXPORT TIM1_UP_IRQHandler [WEAK]
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
EXPORT TIM1_CC_IRQHandler [WEAK]
EXPORT TIM2_IRQHandler [WEAK]
EXPORT TIM3_IRQHandler [WEAK]
EXPORT TIM4_IRQHandler [WEAK]
EXPORT I2C1_EV_IRQHandler [WEAK]
EXPORT I2C1_ER_IRQHandler [WEAK]
EXPORT I2C2_EV_IRQHandler [WEAK]
EXPORT I2C2_ER_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
EXPORT USART3_IRQHandler [WEAK]
EXPORT EXTI15_10_IRQHandler [WEAK]
EXPORT RTCAlarm_IRQHandler [WEAK]
EXPORT USBWakeUp_IRQHandler [WEAK]
EXPORT TIM8_BRK_IRQHandler [WEAK]
EXPORT TIM8_UP_IRQHandler [WEAK]
EXPORT TIM8_TRG_COM_IRQHandler [WEAK]
EXPORT TIM8_CC_IRQHandler [WEAK]
EXPORT ADC3_IRQHandler [WEAK]
EXPORT FSMC_IRQHandler [WEAK]
EXPORT SDIO_IRQHandler [WEAK]
EXPORT TIM5_IRQHandler [WEAK]
EXPORT SPI3_IRQHandler [WEAK]
EXPORT UART4_IRQHandler [WEAK]
EXPORT UART5_IRQHandler [WEAK]
EXPORT TIM6_IRQHandler [WEAK]
EXPORT TIM7_IRQHandler [WEAK]
EXPORT DMA2_Channel1_IRQHandler [WEAK]
EXPORT DMA2_Channel2_IRQHandler [WEAK]
EXPORT DMA2_Channel3_IRQHandler [WEAK]
EXPORT DMA2_Channel4_5_IRQHandler [WEAK]
WWDG_IRQHandler
PVD_IRQHandler
TAMPER_IRQHandler
RTC_IRQHandler
FLASH_IRQHandler
RCC_IRQHandler
EXTI0_IRQHandler
EXTI1_IRQHandler
EXTI2_IRQHandler
EXTI3_IRQHandler
EXTI4_IRQHandler
DMA1_Channel1_IRQHandler
DMA1_Channel2_IRQHandler
DMA1_Channel3_IRQHandler
DMA1_Channel4_IRQHandler
DMA1_Channel5_IRQHandler
DMA1_Channel6_IRQHandler
DMA1_Channel7_IRQHandler
ADC1_2_IRQHandler
USB_HP_CAN1_TX_IRQHandler
USB_LP_CAN1_RX0_IRQHandler
CAN1_RX1_IRQHandler
CAN1_SCE_IRQHandler
EXTI9_5_IRQHandler
TIM1_BRK_IRQHandler
TIM1_UP_IRQHandler
TIM1_TRG_COM_IRQHandler
TIM1_CC_IRQHandler
TIM2_IRQHandler
TIM3_IRQHandler
TIM4_IRQHandler
I2C1_EV_IRQHandler
I2C1_ER_IRQHandler
I2C2_EV_IRQHandler
I2C2_ER_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
USART3_IRQHandler
EXTI15_10_IRQHandler
RTCAlarm_IRQHandler
USBWakeUp_IRQHandler
TIM8_BRK_IRQHandler
TIM8_UP_IRQHandler
TIM8_TRG_COM_IRQHandler
TIM8_CC_IRQHandler
ADC3_IRQHandler
FSMC_IRQHandler
SDIO_IRQHandler
TIM5_IRQHandler
SPI3_IRQHandler
UART4_IRQHandler
UART5_IRQHandler
TIM6_IRQHandler
TIM7_IRQHandler
DMA2_Channel1_IRQHandler
DMA2_Channel2_IRQHandler
DMA2_Channel3_IRQHandler
DMA2_Channel4_5_IRQHandler
B .
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END
;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****
|
tpunix/TLINK
| 14,169
|
Main/start.S
|
/* startup for CH32V305 */
#include "riscv.h"
.macro labs reg, symbol
lui \reg, %hi(\symbol)
addi \reg, \reg, %lo(\symbol)
.endm
.section ".text.entry"
.globl _start
_start:
.option push
.option norelax
/* reloc data */
la a0, _data_start_lma
la a0, _data_start_lma
labs a2, _data_start
la a1, _data_end_lma
1:
lw a3, (a0)
sw a3, (a2)
addi a0, a0, 4
addi a2, a2, 4
bltu a0, a1, 1b
# clear bss
labs a0, _bss_start
labs a1, _bss_end
2:
sw zero, (a0)
addi a0, a0, 4
bltu a0, a1, 2b
# intsyscr
li t0, 0x0b
csrw 0x804, t0
# corecfg
li t0, 0x1f
csrw 0xbc0, t0
# set vector
labs t0, _vector_base
ori t0, t0, 3
csrw mtvec, t0
# enable FPU and interrupt
li t0, 0x6088
csrs mstatus, t0
# initialize global pointer
labs gp, __global_pointer$
labs sp, _stack_end
labs ra, main
jr ra
.option pop
.align 4
_vector_base:
.option norvc;
.word _start
.word 0
.word NMI_Handler /* NMI */
.word HardFault_Handler /* Hard Fault */
.word 0
.word Ecall_M_Mode_Handler /* Ecall M Mode */
.word 0
.word 0
.word Ecall_U_Mode_Handler /* Ecall U Mode */
.word Break_Point_Handler /* Break Point */
.word 0
.word 0
.word SysTick_Handler /* SysTick */
.word 0
.word SW_Handler /* SW */
.word 0
/* External Interrupts */
.word WWDG_IRQHandler /* Window Watchdog */
.word PVD_IRQHandler /* PVD through EXTI Line detect */
.word TAMPER_IRQHandler /* TAMPER */
.word RTC_IRQHandler /* RTC */
.word FLASH_IRQHandler /* Flash */
.word RCC_IRQHandler /* RCC */
.word EXTI0_IRQHandler /* EXTI Line 0 */
.word EXTI1_IRQHandler /* EXTI Line 1 */
.word EXTI2_IRQHandler /* EXTI Line 2 */
.word EXTI3_IRQHandler /* EXTI Line 3 */
.word EXTI4_IRQHandler /* EXTI Line 4 */
.word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */
.word DMA1_Channel2_IRQHandler /* DMA1 Channel 2 */
.word DMA1_Channel3_IRQHandler /* DMA1 Channel 3 */
.word DMA1_Channel4_IRQHandler /* DMA1 Channel 4 */
.word DMA1_Channel5_IRQHandler /* DMA1 Channel 5 */
.word DMA1_Channel6_IRQHandler /* DMA1 Channel 6 */
.word DMA1_Channel7_IRQHandler /* DMA1 Channel 7 */
.word ADC1_2_IRQHandler /* ADC1_2 */
.word USB_HP_CAN1_TX_IRQHandler /* USB HP and CAN1 TX */
.word USB_LP_CAN1_RX0_IRQHandler /* USB LP and CAN1RX0 */
.word CAN1_RX1_IRQHandler /* CAN1 RX1 */
.word CAN1_SCE_IRQHandler /* CAN1 SCE */
.word EXTI9_5_IRQHandler /* EXTI Line 9..5 */
.word TIM1_BRK_IRQHandler /* TIM1 Break */
.word TIM1_UP_IRQHandler /* TIM1 Update */
.word TIM1_TRG_COM_IRQHandler /* TIM1 Trigger and Commutation */
.word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
.word TIM2_IRQHandler /* TIM2 */
.word TIM3_IRQHandler /* TIM3 */
.word TIM4_IRQHandler /* TIM4 */
.word I2C1_EV_IRQHandler /* I2C1 Event */
.word I2C1_ER_IRQHandler /* I2C1 Error */
.word I2C2_EV_IRQHandler /* I2C2 Event */
.word I2C2_ER_IRQHandler /* I2C2 Error */
.word SPI1_IRQHandler /* SPI1 */
.word SPI2_IRQHandler /* SPI2 */
.word USART1_IRQHandler /* USART1 */
.word USART2_IRQHandler /* USART2 */
.word USART3_IRQHandler /* USART3 */
.word EXTI15_10_IRQHandler /* EXTI Line 15..10 */
.word RTCAlarm_IRQHandler /* RTC Alarm through EXTI Line */
.word USBWakeUp_IRQHandler /* USB Wakeup from suspend */
.word TIM8_BRK_IRQHandler /* TIM8 Break */
.word TIM8_UP_IRQHandler /* TIM8 Update */
.word TIM8_TRG_COM_IRQHandler /* TIM8 Trigger and Commutation */
.word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
.word RNG_IRQHandler /* RNG */
.word FSMC_IRQHandler /* FSMC */
.word SDIO_IRQHandler /* SDIO */
.word TIM5_IRQHandler /* TIM5 */
.word SPI3_IRQHandler /* SPI3 */
.word UART4_IRQHandler /* UART4 */
.word UART5_IRQHandler /* UART5 */
.word TIM6_IRQHandler /* TIM6 */
.word TIM7_IRQHandler /* TIM7 */
.word DMA2_Channel1_IRQHandler /* DMA2 Channel 1 */
.word DMA2_Channel2_IRQHandler /* DMA2 Channel 2 */
.word DMA2_Channel3_IRQHandler /* DMA2 Channel 3 */
.word DMA2_Channel4_IRQHandler /* DMA2 Channel 4 */
.word DMA2_Channel5_IRQHandler /* DMA2 Channel 5 */
.word ETH_IRQHandler /* ETH */
.word ETH_WKUP_IRQHandler /* ETH WakeUp */
.word CAN2_TX_IRQHandler /* CAN2 TX */
.word CAN2_RX0_IRQHandler /* CAN2 RX0 */
.word CAN2_RX1_IRQHandler /* CAN2 RX1 */
.word CAN2_SCE_IRQHandler /* CAN2 SCE */
.word OTG_FS_IRQHandler /* OTGFS */
.word USBHSWakeup_IRQHandler /* USBHS Wakeup */
.word USBHS_IRQHandler /* USBHS */
.word DVP_IRQHandler /* DVP */
.word UART6_IRQHandler /* UART6 */
.word UART7_IRQHandler /* UART7 */
.word UART8_IRQHandler /* UART8 */
.word TIM9_BRK_IRQHandler /* TIM9 Break */
.word TIM9_UP_IRQHandler /* TIM9 Update */
.word TIM9_TRG_COM_IRQHandler /* TIM9 Trigger and Commutation */
.word TIM9_CC_IRQHandler /* TIM9 Capture Compare */
.word TIM10_BRK_IRQHandler /* TIM10 Break */
.word TIM10_UP_IRQHandler /* TIM10 Update */
.word TIM10_TRG_COM_IRQHandler /* TIM10 Trigger and Commutation */
.word TIM10_CC_IRQHandler /* TIM10 Capture Compare */
.word DMA2_Channel6_IRQHandler /* DMA2 Channel 6 */
.word DMA2_Channel7_IRQHandler /* DMA2 Channel 7 */
.word DMA2_Channel8_IRQHandler /* DMA2 Channel 8 */
.word DMA2_Channel9_IRQHandler /* DMA2 Channel 9 */
.word DMA2_Channel10_IRQHandler /* DMA2 Channel 10 */
.word DMA2_Channel11_IRQHandler /* DMA2 Channel 11 */
.weak NMI_Handler /* NMI */
.weak HardFault_Handler /* Hard Fault */
.weak Ecall_M_Mode_Handler /* Ecall M Mode */
.weak Ecall_U_Mode_Handler /* Ecall U Mode */
.weak Break_Point_Handler /* Break Point */
.weak SysTick_Handler /* SysTick */
.weak SW_Handler /* SW */
.weak WWDG_IRQHandler /* Window Watchdog */
.weak PVD_IRQHandler /* PVD through EXTI Line detect */
.weak TAMPER_IRQHandler /* TAMPER */
.weak RTC_IRQHandler /* RTC */
.weak FLASH_IRQHandler /* Flash */
.weak RCC_IRQHandler /* RCC */
.weak EXTI0_IRQHandler /* EXTI Line 0 */
.weak EXTI1_IRQHandler /* EXTI Line 1 */
.weak EXTI2_IRQHandler /* EXTI Line 2 */
.weak EXTI3_IRQHandler /* EXTI Line 3 */
.weak EXTI4_IRQHandler /* EXTI Line 4 */
.weak DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */
.weak DMA1_Channel2_IRQHandler /* DMA1 Channel 2 */
.weak DMA1_Channel3_IRQHandler /* DMA1 Channel 3 */
.weak DMA1_Channel4_IRQHandler /* DMA1 Channel 4 */
.weak DMA1_Channel5_IRQHandler /* DMA1 Channel 5 */
.weak DMA1_Channel6_IRQHandler /* DMA1 Channel 6 */
.weak DMA1_Channel7_IRQHandler /* DMA1 Channel 7 */
.weak ADC1_2_IRQHandler /* ADC1_2 */
.weak USB_HP_CAN1_TX_IRQHandler /* USB HP and CAN1 TX */
.weak USB_LP_CAN1_RX0_IRQHandler /* USB LP and CAN1RX0 */
.weak CAN1_RX1_IRQHandler /* CAN1 RX1 */
.weak CAN1_SCE_IRQHandler /* CAN1 SCE */
.weak EXTI9_5_IRQHandler /* EXTI Line 9..5 */
.weak TIM1_BRK_IRQHandler /* TIM1 Break */
.weak TIM1_UP_IRQHandler /* TIM1 Update */
.weak TIM1_TRG_COM_IRQHandler /* TIM1 Trigger and Commutation */
.weak TIM1_CC_IRQHandler /* TIM1 Capture Compare */
.weak TIM2_IRQHandler /* TIM2 */
.weak TIM3_IRQHandler /* TIM3 */
.weak TIM4_IRQHandler /* TIM4 */
.weak I2C1_EV_IRQHandler /* I2C1 Event */
.weak I2C1_ER_IRQHandler /* I2C1 Error */
.weak I2C2_EV_IRQHandler /* I2C2 Event */
.weak I2C2_ER_IRQHandler /* I2C2 Error */
.weak SPI1_IRQHandler /* SPI1 */
.weak SPI2_IRQHandler /* SPI2 */
.weak USART1_IRQHandler /* USART1 */
.weak USART2_IRQHandler /* USART2 */
.weak USART3_IRQHandler /* USART3 */
.weak EXTI15_10_IRQHandler /* EXTI Line 15..10 */
.weak RTCAlarm_IRQHandler /* RTC Alarm through EXTI Line */
.weak USBWakeUp_IRQHandler /* USB Wakeup from suspend */
.weak TIM8_BRK_IRQHandler /* TIM8 Break */
.weak TIM8_UP_IRQHandler /* TIM8 Update */
.weak TIM8_TRG_COM_IRQHandler /* TIM8 Trigger and Commutation */
.weak TIM8_CC_IRQHandler /* TIM8 Capture Compare */
.weak RNG_IRQHandler /* RNG */
.weak FSMC_IRQHandler /* FSMC */
.weak SDIO_IRQHandler /* SDIO */
.weak TIM5_IRQHandler /* TIM5 */
.weak SPI3_IRQHandler /* SPI3 */
.weak UART4_IRQHandler /* UART4 */
.weak UART5_IRQHandler /* UART5 */
.weak TIM6_IRQHandler /* TIM6 */
.weak TIM7_IRQHandler /* TIM7 */
.weak DMA2_Channel1_IRQHandler /* DMA2 Channel 1 */
.weak DMA2_Channel2_IRQHandler /* DMA2 Channel 2 */
.weak DMA2_Channel3_IRQHandler /* DMA2 Channel 3 */
.weak DMA2_Channel4_IRQHandler /* DMA2 Channel 4 */
.weak DMA2_Channel5_IRQHandler /* DMA2 Channel 5 */
.weak ETH_IRQHandler /* ETH */
.weak ETH_WKUP_IRQHandler /* ETH WakeUp */
.weak CAN2_TX_IRQHandler /* CAN2 TX */
.weak CAN2_RX0_IRQHandler /* CAN2 RX0 */
.weak CAN2_RX1_IRQHandler /* CAN2 RX1 */
.weak CAN2_SCE_IRQHandler /* CAN2 SCE */
.weak OTG_FS_IRQHandler /* OTGFS */
.weak USBHSWakeup_IRQHandler /* USBHS Wakeup */
.weak USBHS_IRQHandler /* USBHS */
.weak DVP_IRQHandler /* DVP */
.weak UART6_IRQHandler /* UART6 */
.weak UART7_IRQHandler /* UART7 */
.weak UART8_IRQHandler /* UART8 */
.weak TIM9_BRK_IRQHandler /* TIM9 Break */
.weak TIM9_UP_IRQHandler /* TIM9 Update */
.weak TIM9_TRG_COM_IRQHandler /* TIM9 Trigger and Commutation */
.weak TIM9_CC_IRQHandler /* TIM9 Capture Compare */
.weak TIM10_BRK_IRQHandler /* TIM10 Break */
.weak TIM10_UP_IRQHandler /* TIM10 Update */
.weak TIM10_TRG_COM_IRQHandler /* TIM10 Trigger and Commutation */
.weak TIM10_CC_IRQHandler /* TIM10 Capture Compare */
.weak DMA2_Channel6_IRQHandler /* DMA2 Channel 6 */
.weak DMA2_Channel7_IRQHandler /* DMA2 Channel 7 */
.weak DMA2_Channel8_IRQHandler /* DMA2 Channel 8 */
.weak DMA2_Channel9_IRQHandler /* DMA2 Channel 9 */
.weak DMA2_Channel10_IRQHandler /* DMA2 Channel 10 */
.weak DMA2_Channel11_IRQHandler /* DMA2 Channel 11 */
NMI_Handler:
HardFault_Handler:
Ecall_M_Mode_Handler:
Ecall_U_Mode_Handler:
Break_Point_Handler:
SysTick_Handler:
SW_Handler:
WWDG_IRQHandler:
PVD_IRQHandler:
TAMPER_IRQHandler:
RTC_IRQHandler:
FLASH_IRQHandler:
RCC_IRQHandler:
EXTI0_IRQHandler:
EXTI1_IRQHandler:
EXTI2_IRQHandler:
EXTI3_IRQHandler:
EXTI4_IRQHandler:
DMA1_Channel1_IRQHandler:
DMA1_Channel2_IRQHandler:
//DMA1_Channel3_IRQHandler:
DMA1_Channel4_IRQHandler:
//DMA1_Channel5_IRQHandler:
DMA1_Channel6_IRQHandler:
DMA1_Channel7_IRQHandler:
ADC1_2_IRQHandler:
USB_HP_CAN1_TX_IRQHandler:
USB_LP_CAN1_RX0_IRQHandler:
CAN1_RX1_IRQHandler:
CAN1_SCE_IRQHandler:
EXTI9_5_IRQHandler:
TIM1_BRK_IRQHandler:
TIM1_UP_IRQHandler:
TIM1_TRG_COM_IRQHandler:
TIM1_CC_IRQHandler:
TIM2_IRQHandler:
TIM3_IRQHandler:
TIM4_IRQHandler:
I2C1_EV_IRQHandler:
I2C1_ER_IRQHandler:
I2C2_EV_IRQHandler:
I2C2_ER_IRQHandler:
SPI1_IRQHandler:
SPI2_IRQHandler:
//USART1_IRQHandler:
USART2_IRQHandler:
//USART3_IRQHandler:
EXTI15_10_IRQHandler:
RTCAlarm_IRQHandler:
USBWakeUp_IRQHandler:
TIM8_BRK_IRQHandler:
TIM8_UP_IRQHandler:
TIM8_TRG_COM_IRQHandler:
TIM8_CC_IRQHandler:
RNG_IRQHandler:
FSMC_IRQHandler:
SDIO_IRQHandler:
TIM5_IRQHandler:
SPI3_IRQHandler:
UART4_IRQHandler:
UART5_IRQHandler:
TIM6_IRQHandler:
TIM7_IRQHandler:
DMA2_Channel1_IRQHandler:
DMA2_Channel2_IRQHandler:
DMA2_Channel3_IRQHandler:
DMA2_Channel4_IRQHandler:
DMA2_Channel5_IRQHandler:
ETH_IRQHandler:
ETH_WKUP_IRQHandler:
CAN2_TX_IRQHandler:
CAN2_RX0_IRQHandler:
CAN2_RX1_IRQHandler:
CAN2_SCE_IRQHandler:
OTG_FS_IRQHandler:
USBHSWakeup_IRQHandler:
//USBHS_IRQHandler:
DVP_IRQHandler:
UART6_IRQHandler:
UART7_IRQHandler:
UART8_IRQHandler:
TIM9_BRK_IRQHandler:
TIM9_UP_IRQHandler:
TIM9_TRG_COM_IRQHandler:
TIM9_CC_IRQHandler:
TIM10_BRK_IRQHandler:
TIM10_UP_IRQHandler:
TIM10_TRG_COM_IRQHandler:
TIM10_CC_IRQHandler:
DMA2_Channel6_IRQHandler:
DMA2_Channel7_IRQHandler:
DMA2_Channel8_IRQHandler:
DMA2_Channel9_IRQHandler:
DMA2_Channel10_IRQHandler:
DMA2_Channel11_IRQHandler:
1:
j 1b
DMA1_Channel3_IRQHandler:
jal dma1_channel3_irqhandler
mret
DMA1_Channel5_IRQHandler:
jal dma1_channel5_irqhandler
mret
USART1_IRQHandler:
jal usart1_irqhandler
mret
USART3_IRQHandler:
jal usart3_irqhandler
mret
USBHS_IRQHandler:
jal usbhs_irqhandler
mret
|
trevorfar/MachineLearning
| 2,508
|
extra/assembly/rocm/rdna3/prog.s
|
.global _start
_start:
.rodata
.align 0x10
.global code.kd
.type code.kd,STT_OBJECT
# amd_kernel_code_t (must be at 0x440 for kernel_code_entry_byte_offset to be right)
code.kd:
# amd_kernel_..., amd_machine_...
.long 0,0,0,0
# kernel_code_entry_byte_offset, kernel_code_prefetch_byte_offset
.long 0x00000bc0,0x00000000,0x00000000,0x00000000
# kernel_code_prefetch_byte_size, max_scratch_backing_memory_byte_size
.long 0,0,0,0
# compute_pgm_rsrc1, compute_pgm_rsrc2, kernel_code_properties, workitem_private_segment_byte_size
.long 0x60af0000,0x0000009e,0x00000408,0x00000000
# compute_pgm_rsrc1 |= AMD_COMPUTE_PGM_RSRC_ONE_FLOAT_DENORM_MODE_32 | AMD_COMPUTE_PGM_RSRC_ONE_FLOAT_DENORM_MODE_16_64
# compute_pgm_rsrc1 |= AMD_COMPUTE_PGM_RSRC_ONE_ENABLE_DX10_CLAMP | AMD_COMPUTE_PGM_RSRC_ONE_ENABLE_IEEE_MODE
# compute_pgm_rsrc2 |= AMD_COMPUTE_PGM_RSRC_TWO_USER_SGPR_COUNT = 0xF
# compute_pgm_rsrc2 |= AMD_COMPUTE_PGM_RSRC_TWO_ENABLE_SGPR_WORKGROUP_ID_X
# kernel_code_properties |= AMD_KERNEL_CODE_PROPERTIES_ENABLE_SGPR_KERNARG_SEGMENT_PTR = 1
# kernel_code_properties |= AMD_KERNEL_CODE_PROPERTIES_RESERVED1 = 1
.text
.global code
.type code,STT_FUNC
code:
# https://llvm.org/docs/AMDGPUUsage.html#initial-kernel-execution-state
# s[0:1] contains the kernarg_address
# TODO: can we use s[2:3] if this was really a wave since we only alloced 2 SGPRs?
s_load_b64 s[2:3], s[0:1], null
s_mov_b32 s8, 0
loop:
s_addk_i32 s8, 1
s_cmp_eq_u32 s8, 100000
// FLOPS
s_cbranch_scc0 loop
# wait for the s_load_b64
s_waitcnt lgkmcnt(0)
v_dual_mov_b32 v0, 4 :: v_dual_mov_b32 v1, 2.0
global_store_b32 v0, v1, s[2:3]
# Deallocate all VGPRs for this wave. Use only when next instruction is S_ENDPGM.
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
s_code_end
.amdgpu_metadata
amdhsa.kernels:
- .args:
- .address_space: global
.name: a
.offset: 0
.size: 8
.type_name: 'float*'
.value_kind: global_buffer
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 8
.language: OpenCL C
.language_version:
- 1
- 2
.max_flat_workgroup_size: 256
.name: code
.private_segment_fixed_size: 0
.sgpr_count: 2
.sgpr_spill_count: 0
.symbol: code.kd
.uses_dynamic_stack: false
.vgpr_count: 256
.vgpr_spill_count: 0
.wavefront_size: 32
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
.end_amdgpu_metadata
|
Trust04zh/asterinas
| 1,106
|
framework/libs/linux-bzimage/setup/src/x86/amd64_efi/setup.S
|
/* SPDX-License-Identifier: MPL-2.0 */
.section ".setup", "ax"
.code64
// start_of_setup32 should be loaded at CODE32_START, which is our base.
.global start_of_setup32
start_of_setup32:
// `efi_handover_setup_entry64` should be at efi_handover_setup_entry32 + 0x200, but
// we could provide the 32 bit dummy entry point as the 64 bit entry point - 0x200
// since we do not provide 32-bit entry point in the x86_64 specific implementation.
.org 0x210
.global efi_handover_setup_entry
efi_handover_setup_entry:
// The 3 parameters of is stored in rdi, rsi and rdx (sysv64).
// Do not use them.
// Setup the stack.
lea rsp, [rip + setup_stack_top]
lea rax, [rip + halt]
push rax # the return address
mov rbp, rsp
add rbp, -4
push rbp
mov rbp, rsp
.extern efi_handover_entry
lea rax, [rip + efi_handover_entry]
call rax
// Unreachable here.
halt:
hlt
jmp halt
// A small stack for the setup code.
.section .data
.align 0x1000 / 8
.global setup_stack
setup_stack:
.skip 0x1000
.global setup_stack_top
setup_stack_top:
|
Trust04zh/asterinas
| 2,407
|
framework/libs/linux-bzimage/setup/src/x86/amd64_efi/header.S
|
/* SPDX-License-Identifier: MPL-2.0 */
// The compatibility file for the Linux x86 Boot Protocol.
// See https://www.kernel.org/doc/html/v5.6/x86/boot.html for
// more information on the Linux x86 Boot Protocol.
// Some of the fields filled with a 0xab* values should be filled
// by the torjan builder.
// Asterinas will use only a few of these fields, and some of them
// are filled by the loader and will be read by Asterinas.
.section ".header", "a"
CODE32_START = 0x100000
SETUP_SECTS = 7 # so that the legacy setup could occupy a page
SETUP_SECTS_SIZE = 0x200 * (SETUP_SECTS + 1)
.code16
.org 0x01f1
hdr_start:
setup_sects: .byte SETUP_SECTS
root_flags: .word 1
syssize: .long 0
ram_size: .word 0
vid_mode: .word 0xfffd
root_dev: .word 0
boot_flag: .word 0xAA55
jump: .byte 0xeb
jump_addr: .byte hdr_end-jump_addr
magic: .ascii "HdrS"
.word 0x020f
realmode_swtch: .word 0, 0
start_sys_seg: .word 0
.word 0
type_of_loader: .byte 0
loadflags: .byte (1 << 0)
setup_move_size: .word 0
code32_start: .long CODE32_START
ramdisk_image: .long 0
ramdisk_size: .long 0
bootsect_kludge: .long 0
heap_end_ptr: .word 65535
ext_loader_ver: .byte 0
ext_loader_type: .byte 0
cmd_line_ptr: .long 0
initrd_addr_max: .long 0x7fffffff
kernel_alignment: .long 0x1000000
relocatable_kernel: .byte 0
min_alignment: .byte 0x10
xloadflags: .word 0b01111 # all handover protocols except kexec
cmdline_size: .long 4096-1
hardware_subarch: .long 0
hardware_subarch_data: .quad 0
payload_offset: .long 0xabababab # at 0x248/4, to be filled by the builder
payload_length: .long 0xabababab # at 0x24c/4, to be filled by the builder
setup_data: .quad 0
pref_address: .quad CODE32_START - SETUP_SECTS_SIZE
init_size: .long 0xabababab # at 0x260/4, to be filled by the builder
# The handover_offset should be efi_handover_setup_entry - CODE32_START - 0x200
# But we use ABI workaround to avoid the relocation of efi_handover_setup_entry
handover_offset: .long 0x10
kernel_info_offset: .long 0
hdr_end:
|
Trust04zh/asterinas
| 2,165
|
framework/libs/linux-bzimage/setup/src/x86/legacy_i386/header.S
|
/* SPDX-License-Identifier: MPL-2.0 */
// The compatibility file for the Linux x86 Boot Protocol.
// See https://www.kernel.org/doc/html/v5.6/x86/boot.html for
// more information on the Linux x86 Boot Protocol.
// Some of the fields filled with a 0xab* values should be filled
// by the torjan builder.
// Asterinas will use only a few of these fields, and some of them
// are filled by the loader and will be read by Asterinas.
.section ".header", "a"
CODE32_START = 0x100000
SETUP_SECTS = 7 # so that the legacy setup could occupy a page
.code16
.org 0x01f1
hdr_start:
setup_sects: .byte SETUP_SECTS
root_flags: .word 1
syssize: .long 0
ram_size: .word 0
vid_mode: .word 0xfffd
root_dev: .word 0
boot_flag: .word 0xAA55
jump: .byte 0xeb
jump_addr: .byte hdr_end-jump_addr
magic: .ascii "HdrS"
.word 0x020f
realmode_swtch: .word 0, 0
start_sys_seg: .word 0
.word 0
type_of_loader: .byte 0
loadflags: .byte (1 << 0)
setup_move_size: .word 0
code32_start: .long CODE32_START
ramdisk_image: .long 0
ramdisk_size: .long 0
bootsect_kludge: .long 0
heap_end_ptr: .word 65535
ext_loader_ver: .byte 0
ext_loader_type: .byte 0
cmd_line_ptr: .long 0
initrd_addr_max: .long 0x7fffffff
kernel_alignment: .long 0x1000000
relocatable_kernel: .byte 0
min_alignment: .byte 0x10
xloadflags: .word 0
cmdline_size: .long 4096-1
hardware_subarch: .long 0
hardware_subarch_data: .quad 0
payload_offset: .long 0xabababab # at 0x248/4, to be filled by the builder
payload_length: .long 0xabababab # at 0x24c/4, to be filled by the builder
setup_data: .quad 0
pref_address: .quad CODE32_START - 0x200 * (SETUP_SECTS + 1);
init_size: .long 0xabababab # at 0x260/4, to be filled by the builder
handover_offset: .long 0
kernel_info_offset: .long 0
hdr_end:
|
Trust04zh/asterinas
| 1,697
|
framework/aster-frame/src/arch/riscv/fpu.S
|
/* SPDX-License-Identifier: MPL-2.0 */
.text
.global fstate_save
fstate_save: # (buf: *mut FpRegs)
li t2, 0x00006000 # FS in SSCAUSE
csrrs t1, scause, t2
frcsr t0
fsd f0, 0(a0)
fsd f1, 8(a0)
fsd f2, 16(a0)
fsd f3, 24(a0)
fsd f4, 32(a0)
fsd f5, 40(a0)
fsd f6, 48(a0)
fsd f7, 56(a0)
fsd f8, 64(a0)
fsd f9, 72(a0)
fsd f10, 80(a0)
fsd f11, 88(a0)
fsd f12, 96(a0)
fsd f13, 104(a0)
fsd f14, 112(a0)
fsd f15, 120(a0)
fsd f16, 128(a0)
fsd f17, 136(a0)
fsd f18, 144(a0)
fsd f19, 152(a0)
fsd f20, 160(a0)
fsd f21, 168(a0)
fsd f22, 176(a0)
fsd f23, 184(a0)
fsd f24, 192(a0)
fsd f25, 200(a0)
fsd f26, 208(a0)
fsd f27, 216(a0)
fsd f28, 224(a0)
fsd f29, 232(a0)
fsd f30, 240(a0)
fsd f31, 248(a0)
sw t0, 256(a0)
csrw scause, t1
ret
.global fstate_restore
fstate_restore: # (buf: *const FpRegs)
li t2, 0x00006000 # FS in SSCAUSE
csrrs t1, scause, t2
lw t0, 256(a0)
fscsr t0
fld f0, 0(a0)
fld f1, 8(a0)
fld f2, 16(a0)
fld f3, 24(a0)
fld f4, 32(a0)
fld f5, 40(a0)
fld f6, 48(a0)
fld f7, 56(a0)
fld f8, 64(a0)
fld f9, 72(a0)
fld f10, 80(a0)
fld f11, 88(a0)
fld f12, 96(a0)
fld f13, 104(a0)
fld f14, 112(a0)
fld f15, 120(a0)
fld f16, 128(a0)
fld f17, 136(a0)
fld f18, 144(a0)
fld f19, 152(a0)
fld f20, 160(a0)
fld f21, 168(a0)
fld f22, 176(a0)
fld f23, 184(a0)
fld f24, 192(a0)
fld f25, 200(a0)
fld f26, 208(a0)
fld f27, 216(a0)
fld f28, 224(a0)
fld f29, 232(a0)
fld f30, 240(a0)
fld f31, 248(a0)
csrw scause, t1
ret
|
Trust04zh/asterinas
| 8,486
|
framework/aster-frame/src/arch/x86/boot/boot.S
|
/* SPDX-License-Identifier: MPL-2.0 */
// The boot header, initial boot setup code, temporary GDT and page tables are
// in the boot section. The boot section is mapped writable since kernel may
// modify the initial page table.
.section ".boot", "awx"
.code32
// With every entry types we could go through common paging or machine
// state setup routines. Thus we make a mark of protocol used in each entrypoint
// on the stack.
ENTRYTYPE_MULTIBOOT = 1
ENTRYTYPE_MULTIBOOT2 = 2
ENTRYTYPE_LINUX_32 = 3
ENTRYTYPE_LINUX_64 = 4
MULTIBOOT_ENTRY_MAGIC = 0x2BADB002
MULTIBOOT2_ENTRY_MAGIC = 0x36D76289
// The Linux 32-bit Boot Protocol entry point.
// Must be located at 0x8001000, ABI immutable!
.code32
.org 0x000
.global __linux32_boot
__linux32_boot:
cli
cld
// Set the kernel call stack.
mov esp, offset boot_stack_top
push 0 // upper 32-bits
push esi // boot_params ptr
push 0 // upper 32-bits
push ENTRYTYPE_LINUX_32
jmp initial_boot_setup
// The Linux 64-bit Boot Protocol entry point.
// Must be located at 0x8001200, ABI immutable!
.code64
.org 0x200
.global __linux64_boot_tag
__linux64_boot_tag:
// Set the kernel call stack.
lea rsp, [boot_stack_top]
push rsi // boot_params ptr from the loader
push ENTRYTYPE_LINUX_64
// Here RSP/RIP are still using low address.
jmp long_mode_in_low_address
// The multiboot & multiboot2 entry point.
.code32
.global __multiboot_boot
__multiboot_boot:
cli
cld
// Set the kernel call stack.
mov esp, offset boot_stack_top
push 0 // Upper 32-bits.
push eax // multiboot magic ptr
push 0 // Upper 32-bits.
push ebx // multiboot info ptr
// Tell the entry type from eax
cmp eax, MULTIBOOT_ENTRY_MAGIC
je magic_is_mb
cmp eax, MULTIBOOT2_ENTRY_MAGIC
je magic_is_mb2
jmp halt // Should not be reachable!
magic_is_mb:
push 0 // Upper 32-bits.
push ENTRYTYPE_MULTIBOOT
jmp initial_boot_setup
magic_is_mb2:
push 0 // Upper 32-bits.
push ENTRYTYPE_MULTIBOOT2
jmp initial_boot_setup
initial_boot_setup:
// Prepare for far return. We use a far return as a fence after setting GDT.
mov eax, 24
push eax
lea edx, [protected_mode]
push edx
// Switch to our own temporary GDT.
lgdt [boot_gdtr]
retf
protected_mode:
mov ax, 16
mov ds, ax
mov ss, ax
mov es, ax
mov fs, ax
mov gs, ax
page_table_setup:
// Zero out the page table.
mov al, 0x00
lea edi, [boot_page_table_start]
lea ecx, [boot_page_table_end]
sub ecx, edi
cld
rep stosb
// PTE flags used in this file.
PTE_PRESENT = (1)
PTE_WRITE = (1 << 1)
PTE_HUGE = (1 << 7)
PTE_GLOBAL = (1 << 8)
// PML4: 0x00000000_00000000 ~ 0x00000000_3fffffff
// 0x00000000_40000000 ~ 0x00000000_7fffffff
// 0x00000000_80000000 ~ 0x00000000_bfffffff
// 0x00000000_c0000000 ~ 0x00000000_ffffffff
lea edi, [boot_pml4]
lea eax, [boot_pdpt + (PTE_PRESENT | PTE_WRITE | PTE_GLOBAL)]
mov dword ptr [edi], eax
mov dword ptr [edi + 4], 0
// PML4: 0xffff8000_00000000 ~ 0xffff8000_3fffffff
// 0xffff8000_40000000 ~ 0xffff8000_7fffffff
// 0xffff8000_80000000 ~ 0xffff8000_bfffffff
// 0xffff8000_c0000000 ~ 0xffff8000_ffffffff
// 0xffff8008_00000000 ~ 0xffff8008_3fffffff
lea edi, [boot_pml4 + 0x100 * 8]
lea eax, [boot_pdpt + (PTE_PRESENT | PTE_WRITE | PTE_GLOBAL)]
mov dword ptr [edi], eax
mov dword ptr [edi + 4], 0
// PML4: 0xffffffff_80000000 ~ 0xffffffff_bfffffff
// 0xffffffff_c0000000 ~ 0xffffffff_ffffffff
lea edi, [boot_pml4 + 0x1ff * 8]
lea eax, [boot_pdpt + (PTE_PRESENT | PTE_WRITE | PTE_GLOBAL)]
mov dword ptr [edi], eax
mov dword ptr [edi + 4], 0
// PDPT: 0x00000000_00000000 ~ 0x00000000_3fffffff
lea edi, [boot_pdpt]
lea eax, [boot_pd_0g_1g + (PTE_PRESENT | PTE_WRITE | PTE_GLOBAL)]
mov dword ptr [edi], eax
mov dword ptr [edi + 4], 0
// PDPT: 0x00000000_40000000 ~ 0x00000000_7fffffff
lea edi, [boot_pdpt + 0x1 * 8]
lea eax, [boot_pd_1g_2g + (PTE_PRESENT | PTE_WRITE | PTE_GLOBAL)]
mov dword ptr [edi], eax
mov dword ptr [edi + 4], 0
// PDPT: 0x00000000_80000000 ~ 0x00000000_bfffffff
lea edi, [boot_pdpt + 0x2 * 8]
lea eax, [boot_pd_2g_3g + (PTE_PRESENT | PTE_WRITE | PTE_GLOBAL)]
mov dword ptr [edi], eax
mov dword ptr [edi + 4], 0
// PDPT: 0x00000000_c0000000 ~ 0x00000000_ffffffff
lea edi, [boot_pdpt + 0x3 * 8]
lea eax, [boot_pd_3g_4g + (PTE_PRESENT | PTE_WRITE | PTE_GLOBAL)]
mov dword ptr [edi], eax
mov dword ptr [edi + 4], 0
// PDPT: 0xffffffff_80000000 ~ 0xffffffff_bfffffff
lea edi, [boot_pdpt + 0x1fe * 8]
lea eax, [boot_pd_0g_1g + (PTE_PRESENT | PTE_WRITE | PTE_GLOBAL)]
mov dword ptr [edi], eax
mov dword ptr [edi + 4], 0
// PDPT: 0xffffffff_c0000000 ~ 0xffffffff_ffffffff
lea edi, [boot_pdpt + 0x1ff * 8]
lea eax, [boot_pd_1g_2g + (PTE_PRESENT | PTE_WRITE | PTE_GLOBAL)]
mov dword ptr [edi], eax
mov dword ptr [edi + 4], 0
// Page Directory: map to low 1 GiB * 4 space
lea edi, [boot_pd]
mov eax, PTE_PRESENT | PTE_WRITE | PTE_GLOBAL | PTE_HUGE
mov ecx, 512 * 4 // (of entries in PD) * (number of PD)
write_pd_entry:
mov dword ptr [edi], eax
mov dword ptr [edi + 4], 0
add eax, 0x200000 // +2MiB
add edi, 8
loop write_pd_entry
jmp enable_long_mode
enable_long_mode:
// Enable PAE and PGE.
mov eax, cr4
or eax, 0xa0
mov cr4, eax
// Set the page table address.
lea eax, [boot_pml4]
mov cr3, eax
// Enable long mode.
mov ecx, 0xc0000080
rdmsr
or eax, 0x0100
wrmsr
// Prepare for far return.
mov eax, 8
push eax
lea edx, [long_mode_in_low_address]
push edx
// Enable paging.
mov eax, cr0
or eax, 0x80000000
mov cr0, eax
retf
// Temporary GDTR/GDT entries. This must be located in the .boot section as its
// address (gdt) must be physical to load.
.align 16
.global boot_gdtr
boot_gdtr:
.word gdt_end - gdt - 1
.quad gdt
.align 16
gdt:
.quad 0x0000000000000000 // 0: null descriptor
.quad 0x00af9a000000ffff // 8: 64-bit code segment (kernel)
.quad 0x00cf92000000ffff // 16: 64-bit data segment (kernel)
.quad 0x00cf9a000000ffff // 24: 32-bit code segment (kernel)
gdt_end:
// The page tables and the stack
.align 4096
.global boot_page_table_start
boot_page_table_start:
boot_pml4:
.skip 4096
boot_pdpt:
.skip 4096
boot_pd:
boot_pd_0g_1g:
.skip 4096
boot_pd_1g_2g:
.skip 4096
boot_pd_2g_3g:
.skip 4096
boot_pd_3g_4g:
.skip 4096
boot_page_table_end:
.global boot_stack_top
boot_stack_bottom:
.skip 0x40000
boot_stack_top:
.code64
long_mode_in_low_address:
mov ax, 0
mov ds, ax
mov ss, ax
mov es, ax
mov fs, ax
mov gs, ax
// Update RSP/RIP to use the virtual address.
mov rbx, 0xffffffff80000000
or rsp, rbx
lea rax, [long_mode - 0xffffffff80000000]
or rax, rbx
jmp rax
// From here, we're in the .text section: we no longer use physical address.
.code64
.text
long_mode:
// Clear .bss section.
mov al, 0x00
lea rdi, [rip + __bss]
lea rcx, [rip + __bss_end]
sub rcx, rdi
cld
rep stosb
// Call the corresponding Rust entrypoint according to the boot entrypoint
pop rax
cmp rax, ENTRYTYPE_MULTIBOOT
je entry_type_multiboot
cmp rax, ENTRYTYPE_MULTIBOOT2
je entry_type_multiboot2
cmp rax, ENTRYTYPE_LINUX_32
je entry_type_linux
cmp rax, ENTRYTYPE_LINUX_64
je entry_type_linux
// Unreachable!
jmp halt
.extern __linux_boot
.extern __multiboot_entry
.extern __multiboot2_entry
entry_type_linux:
pop rdi // boot_params ptr
xor rbp, rbp
lea rax, [rip + __linux_boot] // jump into Rust code
call rax
jmp halt
entry_type_multiboot:
pop rsi // the address of multiboot info
pop rdi // multiboot magic
xor rbp, rbp
lea rax, [rip + __multiboot_entry] // jump into Rust code
call rax
jmp halt
entry_type_multiboot2:
pop rsi // the address of multiboot info
pop rdi // multiboot magic
xor rbp, rbp
lea rax, [rip + __multiboot2_entry] // jump into Rust code
call rax
jmp halt
halt:
cli
hlt
jmp halt
|
Trust04zh/asterinas
| 1,252
|
framework/aster-frame/src/arch/x86/boot/multiboot2/header.S
|
/* SPDX-License-Identifier: MPL-2.0 */
// This is the GNU Multiboot 2 header.
// Reference: https://www.gnu.org/software/grub/manual/multiboot2/html_node/Index.html//Index
.section ".multiboot2_header", "a"
.code32
// Macros for cleaner code in the header fields.
MB2_MAGIC = 0xE85250D6
MB2_ARCHITECTURE = 0 // 32-bit (protected) mode of i386
MB2_HEADERLEN = header_end - header_start
MB2_CHECKSUM = -(MB2_MAGIC + MB2_ARCHITECTURE + MB2_HEADERLEN)
header_start:
.align 8
.long MB2_MAGIC
.long MB2_ARCHITECTURE
.long MB2_HEADERLEN
.long MB2_CHECKSUM
// Tag: entry address
entry_address_tag_start:
.short 3
.short 1 // Optional
.long entry_address_tag_end - entry_address_tag_start
.extern __multiboot_boot
.long __multiboot_boot // entry_addr
entry_address_tag_end:
// Tag: information request
.align 8
info_request:
.short 1
.short 0 // Required
.long info_request_end - info_request
.long 6 // Memory map request
.long 15 // ACPI (new) request
info_request_end:
// Tag: header end
.align 8
.short 0 // type: tags end
.short 0 // flags
.long 8 // size
header_end:
|
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