label int64 0 1 | func stringlengths 21 96.3k |
|---|---|
0 | void parse_option_size(const char *name, const char *value, uint64_t *ret, Error **errp){ uint64_t size; int err; err = qemu_strtosz(value, NULL, &size); if (err == -ERANGE) { error_setg(errp, "Value '%s' is too large for parameter '%s'", value, name); return; } if (err) { error_setg(errp, QERR_INVALID_PARAMETER_VALUE,... |
0 | static int get_physical_addr_mmu(CPUXtensaState *env, bool update_tlb, uint32_t vaddr, int is_write, int mmu_idx, uint32_t *paddr, uint32_t *page_size, unsigned *access, bool may_lookup_pt){ bool dtlb = is_write != 2; uint32_t wi; uint32_t ei; uint8_t ring; uint32_t vpn; uint32_t pte; const xtensa_tlb_entry *entry = NU... |
0 | e1000e_intrmgr_delay_rx_causes(E1000ECore *core, uint32_t *causes){ uint32_t delayable_causes; uint32_t rdtr = core->mac[RDTR]; uint32_t radv = core->mac[RADV]; uint32_t raid = core->mac[RAID]; if (msix_enabled(core->owner)) { return false; } delayable_causes = E1000_ICR_RXQ0 | E1000_ICR_RXQ1 | E1000_ICR_RXT0; if (!(co... |
0 | static int virtio_ccw_cb(SubchDev *sch, CCW1 ccw){ int ret; VirtioRevInfo revinfo; uint8_t status; VirtioFeatDesc features; void *config; hwaddr indicators; VqConfigBlock vq_config; VirtioCcwDevice *dev = sch->driver_data; VirtIODevice *vdev = virtio_ccw_get_vdev(sch); bool check_len; int len; hwaddr hw_len; VirtioThin... |
0 | AioContext *aio_context_new(Error **errp){ int ret; AioContext *ctx; ctx = (AioContext *) g_source_new(&aio_source_funcs, sizeof(AioContext)); aio_context_setup(ctx); ret = event_notifier_init(&ctx->notifier, false); if (ret < 0) { error_setg_errno(errp, -ret, "Failed to initialize event notifier"); goto fail; } g_sour... |
0 | static TCGArg do_constant_folding_2(int op, TCGArg x, TCGArg y){ switch (op) { CASE_OP_32_64(add): return x + y; CASE_OP_32_64(sub): return x - y; CASE_OP_32_64(mul): return x * y; CASE_OP_32_64(and): return x & y; CASE_OP_32_64(or): return x | y; CASE_OP_32_64(xor): return x ^ y; case INDEX_op_shl_i32: return (uint32_... |
0 | static int mpegts_raw_read_packet(AVFormatContext *s, AVPacket *pkt){ MpegTSContext *ts = s->priv_data; int ret, i; int64_t pcr_h, next_pcr_h, pos; int pcr_l, next_pcr_l; uint8_t pcr_buf[12]; if (av_new_packet(pkt, TS_PACKET_SIZE) < 0) return AVERROR(ENOMEM); pkt->pos= url_ftell(s->pb); ret = read_packet(s->pb, pkt->da... |
0 | static int mp_user_setxattr(FsContext *ctx, const char *path, const char *name, void *value, size_t size, int flags){ char buffer[PATH_MAX]; if (strncmp(name, "user.virtfs.", 12) == 0) { /* * Don't allow fetch of user.virtfs namesapce * in case of mapped security */ errno = EACCES; return -1; } return lsetxattr(rpath(c... |
0 | static int openpic_init(SysBusDevice *dev){ OpenPICState *opp = FROM_SYSBUS(typeof (*opp), dev); int i, j; MemReg list_le[] = { {"glb", &openpic_glb_ops_le, true, OPENPIC_GLB_REG_START, OPENPIC_GLB_REG_SIZE}, {"tmr", &openpic_tmr_ops_le, true, OPENPIC_TMR_REG_START, OPENPIC_TMR_REG_SIZE}, {"msi", &openpic_msi_ops_le, t... |
0 | static void do_info_profile(Monitor *mon){ int64_t total; total = qemu_time; if (total == 0) total = 1; monitor_printf(mon, "async time %" PRId64 " (%0.3f)\n", dev_time, dev_time / (double)ticks_per_sec); monitor_printf(mon, "qemu time %" PRId64 " (%0.3f)\n", qemu_time, qemu_time / (double)ticks_per_sec); monitor_print... |
0 | void qemu_savevm_state_header(QEMUFile *f){ trace_savevm_state_header(); qemu_put_be32(f, QEMU_VM_FILE_MAGIC); qemu_put_be32(f, QEMU_VM_FILE_VERSION); if (migrate_get_current()->send_configuration || enforce_config_section()) { qemu_put_byte(f, QEMU_VM_CONFIGURATION); vmstate_save_state(f, &vmstate_configuration, &save... |
0 | static void rtas_event_log_queue(int log_type, void *data){ sPAPREventLogEntry *entry = g_new(sPAPREventLogEntry, 1); g_assert(data); entry->log_type = log_type; entry->data = data; QTAILQ_INSERT_TAIL(&spapr->pending_events, entry, next);} |
0 | int avio_open2(AVIOContext **s, const char *filename, int flags, const AVIOInterruptCB *int_cb, AVDictionary **options){ URLContext *h; int err; err = ffurl_open(&h, filename, flags, int_cb, options); if (err < 0) return err; err = ffio_fdopen(s, h); if (err < 0) { ffurl_close(h); return err; } return 0;} |
0 | static void sbr_hf_inverse_filter(float (*alpha0)[2], float (*alpha1)[2], const float X_low[32][40][2], int k0){ int k; for (k = 0; k < k0; k++) { float phi[3][2][2], dk; autocorrelate(X_low[k], phi, 0); autocorrelate(X_low[k], phi, 1); autocorrelate(X_low[k], phi, 2); dk = phi[2][1][0] * phi[1][0][0] - (phi[1][1][0] *... |
0 | static void virtio_crypto_initfn(Object *obj){ VirtIOCryptoPCI *dev = VIRTIO_CRYPTO_PCI(obj); virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), TYPE_VIRTIO_CRYPTO); object_property_add_alias(obj, "cryptodev", OBJECT(&dev->vdev), "cryptodev", &error_abort);} |
0 | static void gen_spr_ne_601 (CPUPPCState *env){ /* Exception processing */ spr_register(env, SPR_DSISR, "DSISR", SPR_NOACCESS, SPR_NOACCESS, &spr_read_generic, &spr_write_generic, 0x00000000); spr_register(env, SPR_DAR, "DAR", SPR_NOACCESS, SPR_NOACCESS, &spr_read_generic, &spr_write_generic, 0x00000000); /* Timer */ sp... |
0 | static void grlib_irqmp_write(void *opaque, target_phys_addr_t addr, uint64_t value, unsigned size){ IRQMP *irqmp = opaque; IRQMPState *state; assert(irqmp != NULL); state = irqmp->state; assert(state != NULL); addr &= 0xff; /* global registers */ switch (addr) { case LEVEL_OFFSET: value &= 0xFFFF << 1; /* clean up the... |
0 | static void tss_load_seg(CPUX86State *env, int seg_reg, int selector){ uint32_t e1, e2; int rpl, dpl, cpl; if ((selector & 0xfffc) != 0) { if (load_segment(env, &e1, &e2, selector) != 0) { raise_exception_err(env, EXCP0A_TSS, selector & 0xfffc); } if (!(e2 & DESC_S_MASK)) { raise_exception_err(env, EXCP0A_TSS, selector... |
0 | static AVFilterBufferRef *get_video_buffer(AVFilterLink *link, int perms, int w, int h){ FlipContext *flip = link->dst->priv; int i; AVFilterBufferRef *picref = avfilter_get_video_buffer(link->dst->outputs[0], perms, w, h); for (i = 0; i < 4; i ++) { int vsub = i == 1 || i == 2 ? flip->vsub : 0; if (picref->data[i]) { ... |
0 | static void nvdimm_class_init(ObjectClass *oc, void *data){ DeviceClass *dc = DEVICE_CLASS(oc); PCDIMMDeviceClass *ddc = PC_DIMM_CLASS(oc); NVDIMMClass *nvc = NVDIMM_CLASS(oc); /* nvdimm hotplug has not been supported yet. */ dc->hotpluggable = false; ddc->realize = nvdimm_realize; ddc->get_memory_region = nvdimm_get_m... |
0 | QEMUFile *qemu_fopen_ops(void *opaque, const QEMUFileOps *ops){ QEMUFile *f; f = g_malloc0(sizeof(QEMUFile)); f->opaque = opaque; f->ops = ops; f->is_write = 0; return f;} |
0 | QmpOutputVisitor *qmp_output_visitor_new(void){ QmpOutputVisitor *v; v = g_malloc0(sizeof(*v)); v->visitor.type = VISITOR_OUTPUT; v->visitor.start_struct = qmp_output_start_struct; v->visitor.end_struct = qmp_output_end_struct; v->visitor.start_list = qmp_output_start_list; v->visitor.next_list = qmp_output_next_list; ... |
0 | static void arm_cpu_do_interrupt_aarch32(CPUState *cs){ ARMCPU *cpu = ARM_CPU(cs); CPUARMState *env = &cpu->env; uint32_t addr; uint32_t mask; int new_mode; uint32_t offset; uint32_t moe; /* If this is a debug exception we must update the DBGDSCR.MOE bits */ switch (env->exception.syndrome >> ARM_EL_EC_SHIFT) { case EC... |
0 | static void simple_list(void){ int i; struct { const char *encoded; LiteralQObject decoded; } test_cases[] = { { .encoded = "[43,42]", .decoded = QLIT_QLIST(((LiteralQObject[]){ QLIT_QINT(43), QLIT_QINT(42), { } })), }, { .encoded = "[43]", .decoded = QLIT_QLIST(((LiteralQObject[]){ QLIT_QINT(43), { } })), }, { .encode... |
0 | static uint64_t m5208_timer_read(void *opaque, target_phys_addr_t addr, unsigned size){ m5208_timer_state *s = (m5208_timer_state *)opaque; switch (addr) { case 0: return s->pcsr; case 2: return s->pmr; case 4: return ptimer_get_count(s->timer); default: hw_error("m5208_timer_read: Bad offset 0x%x\n", (int)addr); retur... |
0 | static inline void gen_cmps(DisasContext *s, int ot){ gen_string_movl_A0_ESI(s); gen_op_ld_T0_A0(ot + s->mem_index); gen_string_movl_A0_EDI(s); gen_op_ld_T1_A0(ot + s->mem_index); gen_op_cmpl_T0_T1_cc(); gen_op_movl_T0_Dshift[ot]();#ifdef TARGET_X86_64 if (s->aflag == 2) { gen_op_addq_ESI_T0(); gen_op_addq_EDI_T0(); } ... |
0 | static int set_pix_fmt(AVCodecContext *avctx, vpx_codec_caps_t codec_caps, struct vpx_codec_enc_cfg *enccfg, vpx_codec_flags_t *flags, vpx_img_fmt_t *img_fmt){ VPxContext av_unused *ctx = avctx->priv_data;#ifdef VPX_IMG_FMT_HIGHBITDEPTH enccfg->g_bit_depth = enccfg->g_input_bit_depth = 8;#endif switch (avctx->pix_fmt) ... |
0 | static CURLState *curl_init_state(BlockDriverState *bs, BDRVCURLState *s){ CURLState *state = NULL; int i, j; do { for (i=0; i<CURL_NUM_STATES; i++) { for (j=0; j<CURL_NUM_ACB; j++) if (s->states[i].acb[j]) continue; if (s->states[i].in_use) continue; state = &s->states[i]; state->in_use = 1; break; } if (!state) { aio... |
0 | static bool elf_check_ehdr(struct elfhdr *ehdr){ return (elf_check_arch(ehdr->e_machine) && ehdr->e_ehsize == sizeof(struct elfhdr) && ehdr->e_phentsize == sizeof(struct elf_phdr) && ehdr->e_shentsize == sizeof(struct elf_shdr) && (ehdr->e_type == ET_EXEC || ehdr->e_type == ET_DYN));} |
0 | static void tcg_out_dat_rIN(TCGContext *s, int cond, int opc, int opneg, TCGArg dst, TCGArg lhs, TCGArg rhs, bool rhs_is_const){ /* Emit either the reg,imm or reg,reg form of a data-processing insn. * rhs must satisfy the "rIN" constraint. */ if (rhs_is_const) { int rot = encode_imm(rhs); if (rot < 0) { rhs = -rhs; rot... |
0 | static void add_completion(const char *str){ if (nb_completions < NB_COMPLETIONS_MAX) { completions[nb_completions++] = qemu_strdup(str); }} |
0 | static void raw_lock_medium(BlockDriverState *bs, bool locked){ bdrv_lock_medium(bs->file->bs, locked);} |
0 | static void irq_handler(void *opaque, int irq, int level){ struct xlx_pic *p = opaque; if (!(p->regs[R_MER] & 2)) { qemu_irq_lower(p->parent_irq); return; } /* edge triggered interrupt */ if (p->c_kind_of_intr & (1 << irq) && p->regs[R_MER] & 2) { p->regs[R_ISR] |= (level << irq); } p->irq_pin_state &= ~(1 << irq); p->... |
0 | void net_slirp_smb(const char *exported_dir){ if (slirp_smb_export) { fprintf(stderr, "-smb given twice\n"); exit(1); } slirp_smb_export = exported_dir; if (slirp_inited) { slirp_smb(exported_dir); }} |
0 | static void phys_map_node_reserve(unsigned nodes){ if (next_map.nodes_nb + nodes > next_map.nodes_nb_alloc) { next_map.nodes_nb_alloc = MAX(next_map.nodes_nb_alloc * 2, 16); next_map.nodes_nb_alloc = MAX(next_map.nodes_nb_alloc, next_map.nodes_nb + nodes); next_map.nodes = g_renew(Node, next_map.nodes, next_map.nodes_n... |
0 | static int omap_dma_ch_reg_write(struct omap_dma_s *s, int ch, int reg, uint16_t value) { switch (reg) { case 0x00:/* SYS_DMA_CSDP_CH0 */ s->ch[ch].burst[1] = (value & 0xc000) >> 14; s->ch[ch].pack[1] = (value & 0x2000) >> 13; s->ch[ch].port[1] = (enum omap_dma_port) ((value & 0x1e00) >> 9); s->ch[ch].burst[0] = (value... |
0 | static void add_cpreg_to_hashtable(ARMCPU *cpu, const ARMCPRegInfo *r, void *opaque, int state, int secstate, int crm, int opc1, int opc2){ /* Private utility function for define_one_arm_cp_reg_with_opaque(): * add a single reginfo struct to the hash table. */ uint32_t *key = g_new(uint32_t, 1); ARMCPRegInfo *r2 = g_me... |
0 | static inline void RENAME(rgb24to16)(const uint8_t *src, uint8_t *dst, long src_size){ const uint8_t *s = src; const uint8_t *end;#if COMPILE_TEMPLATE_MMX const uint8_t *mm_end;#endif uint16_t *d = (uint16_t *)dst; end = s + src_size;#if COMPILE_TEMPLATE_MMX __asm__ volatile(PREFETCH" %0"::"m"(*src):"memory"); __asm__ ... |
0 | static void read_event_data(SCLPEventFacility *ef, SCCB *sccb){ unsigned int sclp_active_selection_mask; unsigned int sclp_cp_receive_mask; ReadEventData *red = (ReadEventData *) sccb; if (be16_to_cpu(sccb->h.length) != SCCB_SIZE) { sccb->h.response_code = cpu_to_be16(SCLP_RC_INSUFFICIENT_SCCB_LENGTH); goto out; } sclp... |
0 | static QObject *parse_keyword(JSONParserContext *ctxt){ QObject *token; const char *val; token = parser_context_pop_token(ctxt); assert(token && token_get_type(token) == JSON_KEYWORD); val = token_get_value(token); if (!strcmp(val, "true")) { return QOBJECT(qbool_from_bool(true)); } else if (!strcmp(val, "false")) { re... |
0 | static void virtqueue_map_iovec(VirtIODevice *vdev, struct iovec *sg, hwaddr *addr, unsigned int *num_sg, unsigned int max_size, int is_write){ unsigned int i; hwaddr len; /* Note: this function MUST validate input, some callers * are passing in num_sg values received over the network. */ /* TODO: teach all callers tha... |
0 | void qmp_block_job_complete(const char *device, Error **errp){ BlockJob *job = find_block_job(device); if (!job) { error_set(errp, QERR_BLOCK_JOB_NOT_ACTIVE, device); return; } trace_qmp_block_job_complete(job); block_job_complete(job, errp);} |
0 | static uint32_t omap_l4_io_readb(void *opaque, target_phys_addr_t addr){ unsigned int i = (addr - OMAP2_L4_BASE) >> TARGET_PAGE_BITS; return omap_l4_io_readb_fn[i](omap_l4_io_opaque[i], addr);} |
0 | void qemu_chr_initial_reset(void){ CharDriverState *chr; initial_reset_issued = 1; TAILQ_FOREACH(chr, &chardevs, next) { qemu_chr_reset(chr); }} |
0 | static void par_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value){ if (arm_feature(env, ARM_FEATURE_LPAE)) { env->cp15.par_el1 = value; } else if (arm_feature(env, ARM_FEATURE_V7)) { env->cp15.par_el1 = value & 0xfffff6ff; } else { env->cp15.par_el1 = value & 0xfffff1ff; }} |
0 | void vnc_client_write(void *opaque){ VncState *vs = opaque; vnc_lock_output(vs); if (vs->output.offset#ifdef CONFIG_VNC_WS || vs->ws_output.offset#endif ) { vnc_client_write_locked(opaque); } else if (vs->csock != -1) { qemu_set_fd_handler(vs->csock, vnc_client_read, NULL, vs); } vnc_unlock_output(vs);} |
0 | static inline void RENAME(yuv2packed2)(SwsContext *c, const uint16_t *buf0, const uint16_t *buf1, const uint16_t *uvbuf0, const uint16_t *uvbuf1, const uint16_t *abuf0, const uint16_t *abuf1, uint8_t *dest, int dstW, int yalpha, int uvalpha, int y){ int yalpha1=4095- yalpha; int uvalpha1=4095-uvalpha; int i;#if COMPILE... |
0 | static void default_qemu_fd_register(int fd){} |
0 | int bdrv_is_sg(BlockDriverState *bs){ return bs->sg;} |
0 | void cpu_dump_state (CPUState *env, FILE *f, fprintf_function cpu_fprintf, int flags){#define RGPL 4#define RFPL 4 int i; cpu_fprintf(f, "NIP " TARGET_FMT_lx " LR " TARGET_FMT_lx " CTR " TARGET_FMT_lx " XER " TARGET_FMT_lx "\n", env->nip, env->lr, env->ctr, env->xer); cpu_fprintf(f, "MSR " TARGET_FMT_lx " HID0 " TARGET... |
0 | static int sockaddr_to_str(char *dest, int max_len, struct sockaddr_storage *ss, socklen_t ss_len, struct sockaddr_storage *ps, socklen_t ps_len, bool is_listen, bool is_telnet){ char shost[NI_MAXHOST], sserv[NI_MAXSERV]; char phost[NI_MAXHOST], pserv[NI_MAXSERV]; const char *left = "", *right = ""; switch (ss->ss_fami... |
0 | static inline unsigned int get_seg_limit(uint32_t e1, uint32_t e2){ unsigned int limit; limit = (e1 & 0xffff) | (e2 & 0x000f0000); if (e2 & DESC_G_MASK) limit = (limit << 12) | 0xfff; return limit;} |
0 | void hmp_info_block(Monitor *mon, const QDict *qdict){ BlockInfoList *block_list, *info; ImageInfo *image_info; const char *device = qdict_get_try_str(qdict, "device"); bool verbose = qdict_get_try_bool(qdict, "verbose", 0); block_list = qmp_query_block(NULL); for (info = block_list; info; info = info->next) { if (devi... |
0 | void put_no_rnd_pixels16_xy2_altivec(uint8_t * block, const uint8_t * pixels, int line_size, int h){POWERPC_TBL_DECLARE(altivec_put_no_rnd_pixels16_xy2_num, 1);#ifdef ALTIVEC_USE_REFERENCE_C_CODE int j;POWERPC_TBL_START_COUNT(altivec_put_no_rnd_pixels16_xy2_num, 1); for (j = 0; j < 4; j++) { int i; const uint32_t a = (... |
0 | static inline void rv34_mc(RV34DecContext *r, const int block_type, const int xoff, const int yoff, int mv_off, const int width, const int height, int dir, const int thirdpel, int weighted, qpel_mc_func (*qpel_mc)[16], h264_chroma_mc_func (*chroma_mc)){ MpegEncContext *s = &r->s; uint8_t *Y, *U, *V, *srcY, *srcU, *srcV... |
0 | static int ftp_retrieve(FTPContext *s){ char command[CONTROL_BUFFER_SIZE]; const int retr_codes[] = {150, 550, 0}; /* 550 is incorrect code */ snprintf(command, sizeof(command), "RETR %s\r\n", s->path); if (ftp_send_command(s, command, retr_codes, NULL) != 150) return AVERROR(EIO); s->state = DOWNLOADING; return 0;} |
0 | void dct_unquantize_h263_altivec(MpegEncContext *s, DCTELEM *block, int n, int qscale){POWERPC_TBL_DECLARE(altivec_dct_unquantize_h263_num, 1); int i, level, qmul, qadd; int nCoeffs; assert(s->block_last_index[n]>=0);POWERPC_TBL_START_COUNT(altivec_dct_unquantize_h263_num, 1); qadd = (qscale - 1) | 1; qmul = qscale << ... |
0 | DECL_IMDCT_BLOCKS(sse,sse)DECL_IMDCT_BLOCKS(sse2,sse)DECL_IMDCT_BLOCKS(sse3,sse)DECL_IMDCT_BLOCKS(ssse3,sse)DECL_IMDCT_BLOCKS(avx,avx)#endif /* HAVE_YASM */void ff_mpadsp_init_mmx(MPADSPContext *s){ int mm_flags = av_get_cpu_flags(); int i, j; for (j = 0; j < 4; j++) { for (i = 0; i < 40; i ++) { mdct_win_sse[0][j][4*i... |
0 | static inline int sub_left_prediction(HYuvContext *s, uint8_t *dst, const uint8_t *src, int w, int left){ int i; if (s->bps <= 8) { if (w < 32) { for (i = 0; i < w; i++) { const int temp = src[i]; dst[i] = temp - left; left = temp; } return left; } else { for (i = 0; i < 32; i++) { const int temp = src[i]; dst[i] = tem... |
1 | void kvm_arm_reset_vcpu(ARMCPU *cpu){ /* Re-init VCPU so that all registers are set to * their respective reset values. */ kvm_arm_vcpu_init(CPU(cpu)); write_kvmstate_to_list(cpu);} |
1 | static uint32_t icp_accept(struct icp_server_state *ss){ uint32_t xirr = ss->xirr; qemu_irq_lower(ss->output); ss->xirr = ss->pending_priority << 24; trace_xics_icp_accept(xirr, ss->xirr); return xirr;} |
1 | VIOsPAPRBus *spapr_vio_bus_init(void){ VIOsPAPRBus *bus; BusState *qbus; DeviceState *dev; /* Create bridge device */ dev = qdev_create(NULL, "spapr-vio-bridge"); qdev_init_nofail(dev); /* Create bus on bridge device */ qbus = qbus_create(TYPE_SPAPR_VIO_BUS, dev, "spapr-vio"); bus = DO_UPCAST(VIOsPAPRBus, bus, qbus); b... |
1 | int ffurl_register_protocol(URLProtocol *protocol, int size){ URLProtocol **p; if (size < sizeof(URLProtocol)) { URLProtocol *temp = av_mallocz(sizeof(URLProtocol)); memcpy(temp, protocol, size); protocol = temp; } p = &first_protocol; while (*p != NULL) p = &(*p)->next; *p = protocol; protocol->next = NULL; return 0;} |
1 | static void vmsvga_update_display(void *opaque){ struct vmsvga_state_s *s = opaque; DisplaySurface *surface; bool dirty = false; if (!s->enable) { s->vga.update(&s->vga); return; } vmsvga_check_size(s); surface = qemu_console_surface(s->vga.con); vmsvga_fifo_run(s); vmsvga_update_rect_flush(s); /* * Is it more efficien... |
1 | static void rv34_idct_add_c(uint8_t *dst, int stride, DCTELEM *block){ int temp[16]; uint8_t *cm = ff_cropTbl + MAX_NEG_CROP; int i; rv34_row_transform(temp, block); memset(block, 0, 16*sizeof(DCTELEM)); for(i = 0; i < 4; i++){ const int z0 = 13*(temp[4*0+i] + temp[4*2+i]) + 0x200; const int z1 = 13*(temp[4*0+i] - temp... |
1 | static void vfio_msi_interrupt(void *opaque){ VFIOMSIVector *vector = opaque; VFIODevice *vdev = vector->vdev; int nr = vector - vdev->msi_vectors; if (!event_notifier_test_and_clear(&vector->interrupt)) { return; } DPRINTF("%s(%04x:%02x:%02x.%x) vector %d\n", __func__, vdev->host.domain, vdev->host.bus, vdev->host.slo... |
1 | int av_reallocp(void *ptr, size_t size){ void **ptrptr = ptr; void *ret; ret = av_realloc(*ptrptr, size); if (!ret) { return AVERROR(ENOMEM); *ptrptr = ret; |
1 | static int alac_decode_frame(AVCodecContext *avctx, void *data, int *got_frame_ptr, AVPacket *avpkt){ const uint8_t *inbuffer = avpkt->data; int input_buffer_size = avpkt->size; ALACContext *alac = avctx->priv_data; int channels; unsigned int outputsamples; int hassize; unsigned int readsamplesize; int isnotcompressed;... |
0 | static int avi_probe(AVProbeData *p){ /* check file header */ if (p->buf_size <= 32) return 0; if (p->buf[0] == 'R' && p->buf[1] == 'I' && p->buf[2] == 'F' && p->buf[3] == 'F' && p->buf[8] == 'A' && p->buf[9] == 'V' && p->buf[10] == 'I' && (p->buf[11] == ' ' || p->buf[11] == 0x19)) return AVPROBE_SCORE_MAX; else return... |
0 | static int decode_user_data(MpegEncContext *s, GetBitContext *gb){ char buf[256]; int i; int e; int ver = 0, build = 0, ver2 = 0, ver3 = 0; char last; for(i=0; i<255 && get_bits_count(gb) < gb->size_in_bits; i++){ if(show_bits(gb, 23) == 0) break; buf[i]= get_bits(gb, 8); } buf[i]=0; /* divx detection */ e=sscanf(buf, ... |
0 | static void RENAME(yuv2yuv1_ar)(SwsContext *c, const int16_t *lumSrc, const int16_t *chrUSrc, const int16_t *chrVSrc, const int16_t *alpSrc, uint8_t *dest, uint8_t *uDest, uint8_t *vDest, uint8_t *aDest, int dstW, int chrDstW){ int p= 4; const int16_t *src[4]= { alpSrc + dstW, lumSrc + dstW, chrUSrc + chrDstW, chrVSrc ... |
0 | void ff_put_h264_qpel8_mc02_msa(uint8_t *dst, const uint8_t *src, ptrdiff_t stride){ avc_luma_vt_8w_msa(src - (stride * 2), stride, dst, stride, 8);} |
0 | static int read_pakt_chunk(AVFormatContext *s, int64_t size){ AVIOContext *pb = s->pb; AVStream *st = s->streams[0]; CaffContext *caf = s->priv_data; int64_t pos = 0, ccount; int num_packets, i; ccount = avio_tell(pb); num_packets = avio_rb64(pb); if (num_packets < 0 || INT32_MAX / sizeof(AVIndexEntry) < num_packets) r... |
1 | static void vp8_decode_mb_row_no_filter(AVCodecContext *avctx, void *tdata, int jobnr, int threadnr){ decode_mb_row_no_filter(avctx, tdata, jobnr, threadnr, 0);} |
1 | static av_cold int qdm2_decode_init(AVCodecContext *avctx){ QDM2Context *s = avctx->priv_data; uint8_t *extradata; int extradata_size; int tmp_val, tmp, size; /* extradata parsing Structure: wave { frma (QDM2) QDCA QDCP } 32 size (including this field) 32 tag (=frma) 32 type (=QDM2 or QDMC) 32 size (including this fiel... |
1 | void usb_packet_unmap(USBPacket *p){ int is_write = (p->pid == USB_TOKEN_IN); int i; for (i = 0; i < p->iov.niov; i++) { cpu_physical_memory_unmap(p->iov.iov[i].iov_base, p->iov.iov[i].iov_len, is_write, p->iov.iov[i].iov_len); }} |
0 | static void gen_mfc0 (DisasContext *ctx, int reg, int sel){ const char *rn = "invalid"; switch (reg) { case 0: switch (sel) { case 0: gen_op_mfc0_index(); rn = "Index"; break; case 1:// gen_op_mfc0_mvpcontrol(); /* MT ASE */ rn = "MVPControl";// break; case 2:// gen_op_mfc0_mvpconf0(); /* MT ASE */ rn = "MVPConf0";// b... |
0 | static int roq_decode_end(AVCodecContext *avctx){ RoqContext *s = avctx->priv_data; /* release the last frame */ avctx->release_buffer(avctx, &s->last_frame); return 0;} |
0 | static void tgen_branch(TCGContext *s, int cc, int labelno){ TCGLabel* l = &s->labels[labelno]; if (l->has_value) { tgen_gotoi(s, cc, l->u.value_ptr); } else if (USE_LONG_BRANCHES) { tcg_out16(s, RIL_BRCL | (cc << 4)); tcg_out_reloc(s, s->code_ptr, R_390_PC32DBL, labelno, -2); s->code_ptr += 2; } else { tcg_out16(s, RI... |
0 | static void s390_pci_generate_event(uint8_t cc, uint16_t pec, uint32_t fh, uint32_t fid, uint64_t faddr, uint32_t e){ SeiContainer *sei_cont; S390pciState *s = S390_PCI_HOST_BRIDGE( object_resolve_path(TYPE_S390_PCI_HOST_BRIDGE, NULL)); if (!s) { return; } sei_cont = g_malloc0(sizeof(SeiContainer)); sei_cont->fh = fh; ... |
0 | static void pci_spapr_set_irq(void *opaque, int irq_num, int level){ /* * Here we use the number returned by pci_spapr_map_irq to find a * corresponding qemu_irq. */ sPAPRPHBState *phb = opaque; qemu_set_irq(phb->lsi_table[irq_num].qirq, level);} |
0 | static void test_io_channel(bool async, SocketAddress *listen_addr, SocketAddress *connect_addr, bool passFD){ QIOChannel *src, *dst; QIOChannelTest *test; if (async) { test_io_channel_setup_async(listen_addr, connect_addr, &src, &dst); g_assert(!passFD || qio_channel_has_feature(src, QIO_CHANNEL_FEATURE_FD_PASS)); g_a... |
0 | int floatx80_le(floatx80 a, floatx80 b, float_status *status){ flag aSign, bSign; if ( ( ( extractFloatx80Exp( a ) == 0x7FFF ) && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) || ( ( extractFloatx80Exp( b ) == 0x7FFF ) && (uint64_t) ( extractFloatx80Frac( b )<<1 ) ) ) { float_raise(float_flag_invalid, status); return 0;... |
0 | int coroutine_fn bdrv_co_writev(BlockDriverState *bs, int64_t sector_num, int nb_sectors, QEMUIOVector *qiov){ trace_bdrv_co_writev(bs, sector_num, nb_sectors); return bdrv_co_do_writev(bs, sector_num, nb_sectors, qiov, 0);} |
0 | static int vfw_read_header(AVFormatContext *s, AVFormatParameters *ap){ struct vfw_ctx *ctx = s->priv_data; AVCodecContext *codec; AVStream *st; int devnum; int bisize; BITMAPINFO *bi; CAPTUREPARMS cparms; DWORD biCompression; WORD biBitCount; int width; int height; int ret; if(!ap->time_base.den) { av_log(s, AV_LOG_ER... |
0 | size_t v9fs_pack(struct iovec *in_sg, int in_num, size_t offset, const void *src, size_t size){ return v9fs_packunpack((void *)src, in_sg, in_num, offset, size, 1);} |
0 | void usb_packet_setup(USBPacket *p, int pid, uint8_t addr, uint8_t ep){ assert(!usb_packet_is_inflight(p)); p->state = USB_PACKET_SETUP; p->pid = pid; p->devaddr = addr; p->devep = ep; p->result = 0; qemu_iovec_reset(&p->iov);} |
0 | int nbd_client_init(BlockDriverState *bs, QIOChannelSocket *sioc, const char *export, Error **errp){ NbdClientSession *client = nbd_get_client_session(bs); int ret; /* NBD handshake */ logout("session init %s\n", export); qio_channel_set_blocking(QIO_CHANNEL(sioc), true, NULL); ret = nbd_receive_negotiate(QIO_CHANNEL(s... |
0 | static void cuda_writel (void *opaque, target_phys_addr_t addr, uint32_t value){} |
0 | static void tcg_out_brcond64(TCGContext *s, TCGCond cond, TCGArg arg1, TCGArg arg2, int const_arg2, int label_index, int small){ tcg_out_cmp(s, arg1, arg2, const_arg2, P_REXW); tcg_out_jxx(s, tcg_cond_to_jcc[cond], label_index, small);} |
0 | static void pci_init_wmask(PCIDevice *dev){ int i; int config_size = pci_config_size(dev); dev->wmask[PCI_CACHE_LINE_SIZE] = 0xff; dev->wmask[PCI_INTERRUPT_LINE] = 0xff; pci_set_word(dev->wmask + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); for (i = PCI_CONFIG_HEADER_SIZE; i < config_size; ++... |
0 | static void *vnc_worker_thread(void *arg){ VncJobQueue *queue = arg; qemu_thread_self(&queue->thread); while (!vnc_worker_thread_loop(queue)) ; vnc_queue_clear(queue); return NULL;} |
0 | int qemu_savevm_state(QEMUFile *f){ int saved_vm_running; int ret; saved_vm_running = vm_running; vm_stop(0); ret = qemu_savevm_state_begin(f); if (ret < 0) goto out; do { ret = qemu_savevm_state_iterate(f); if (ret < 0) goto out; } while (ret == 0); ret = qemu_savevm_state_complete(f);out: if (saved_vm_running) vm_sta... |
0 | static int vmdk_create(const char *filename, QEMUOptionParameter *options, Error **errp){ int fd, idx = 0; char desc[BUF_SIZE]; int64_t total_size = 0, filesize; const char *adapter_type = NULL; const char *backing_file = NULL; const char *fmt = NULL; int flags = 0; int ret = 0; bool flat, split, compress; char ext_des... |
0 | static void rtas_ibm_get_config_addr_info2(PowerPCCPU *cpu, sPAPREnvironment *spapr, uint32_t token, uint32_t nargs, target_ulong args, uint32_t nret, target_ulong rets){ sPAPRPHBState *sphb; sPAPRPHBClass *spc; PCIDevice *pdev; uint32_t addr, option; uint64_t buid; if ((nargs != 4) || (nret != 2)) { goto param_error_e... |
0 | __org_qemu_x_Union1 *qmp___org_qemu_x_command(__org_qemu_x_EnumList *a, __org_qemu_x_StructList *b, __org_qemu_x_Union2 *c, __org_qemu_x_Alt *d, Error **errp){ __org_qemu_x_Union1 *ret = g_new0(__org_qemu_x_Union1, 1); ret->kind = ORG_QEMU_X_UNION1_KIND___ORG_QEMU_X_BRANCH; ret->__org_qemu_x_branch = strdup("blah1"); r... |
0 | static CURLState *curl_init_state(BDRVCURLState *s){ CURLState *state = NULL; int i, j; do { for (i=0; i<CURL_NUM_STATES; i++) { for (j=0; j<CURL_NUM_ACB; j++) if (s->states[i].acb[j]) continue; if (s->states[i].in_use) continue; state = &s->states[i]; state->in_use = 1; break; } if (!state) { qemu_aio_wait(); } } whil... |
0 | static inline int check_physical(CPUPPCState *env, mmu_ctx_t *ctx, target_ulong eaddr, int rw){ int in_plb, ret; ctx->raddr = eaddr; ctx->prot = PAGE_READ | PAGE_EXEC; ret = 0; switch (env->mmu_model) { case POWERPC_MMU_32B: case POWERPC_MMU_601: case POWERPC_MMU_SOFT_6xx: case POWERPC_MMU_SOFT_74xx: case POWERPC_MMU_S... |
0 | static void onenand_command(OneNANDState *s){ int b; int sec; void *buf;#define SETADDR(block, page)\ sec = (s->addr[page] & 3) +\ ((((s->addr[page] >> 2) & 0x3f) +\ (((s->addr[block] & 0xfff) |\ (s->addr[block] >> 15 ?\ s->density_mask : 0)) << 6)) << (PAGE_SHIFT - 9));#define SETBUF_M()\ buf = (s->bufaddr & 8) ?\ s->... |
0 | void address_space_destroy(AddressSpace *as){ /* Flush out anything from MemoryListeners listening in on this */ memory_region_transaction_begin(); as->root = NULL; memory_region_transaction_commit(); QTAILQ_REMOVE(&address_spaces, as, address_spaces_link); address_space_destroy_dispatch(as); flatview_destroy(as->curre... |
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