label int64 0 1 | func stringlengths 21 96.3k |
|---|---|
0 | static void sigp_stop_and_store_status(CPUState *cs, run_on_cpu_data arg){ S390CPU *cpu = S390_CPU(cs); SigpInfo *si = arg.host_ptr; struct kvm_s390_irq irq = { .type = KVM_S390_SIGP_STOP, }; /* disabled wait - sleeping in user space */ if (s390_cpu_get_state(cpu) == CPU_STATE_OPERATING && cs->halted) { s390_cpu_set_st... |
0 | static int xen_remove_from_physmap(XenIOState *state, hwaddr start_addr, ram_addr_t size){ unsigned long i = 0; int rc = 0; XenPhysmap *physmap = NULL; hwaddr phys_offset = 0; physmap = get_physmapping(state, start_addr, size); if (physmap == NULL) { return -1; } phys_offset = physmap->phys_offset; size = physmap->size... |
0 | int json_lexer_flush(JSONLexer *lexer){ return lexer->state == IN_START ? 0 : json_lexer_feed_char(lexer, 0);} |
0 | float64 helper_fxtod(CPUSPARCState *env, int64_t src){ float64 ret; clear_float_exceptions(env); ret = int64_to_float64(src, &env->fp_status); check_ieee_exceptions(env); return ret;} |
0 | static void test_visitor_out_list(TestOutputVisitorData *data, const void *unused){ const char *value_str = "list value"; TestStructList *p, *head = NULL; const int max_items = 10; bool value_bool = true; int value_int = 10; Error *err = NULL; QListEntry *entry; QObject *obj; QList *qlist; int i; /* Build the list in r... |
0 | static uint64_t qemu_opt_get_size_helper(QemuOpts *opts, const char *name, uint64_t defval, bool del){ QemuOpt *opt = qemu_opt_find(opts, name); uint64_t ret = defval; if (opt == NULL) { const QemuOptDesc *desc = find_desc_by_name(opts->list->desc, name); if (desc && desc->def_value_str) { parse_option_size(name, desc-... |
0 | static int foreach_device_config(int type, int (*func)(const char *cmdline)){ struct device_config *conf; int rc; TAILQ_FOREACH(conf, &device_configs, next) { if (conf->type != type) continue; rc = func(conf->cmdline); if (0 != rc) return rc; } return 0;} |
0 | static BlockDriverState *bdrv_append_temp_snapshot(BlockDriverState *bs, int flags, QDict *snapshot_options, Error **errp){ /* TODO: extra byte is a hack to ensure MAX_PATH space on Windows. */ char *tmp_filename = g_malloc0(PATH_MAX + 1); int64_t total_size; QemuOpts *opts = NULL; BlockDriverState *bs_snapshot; Error ... |
0 | int qdev_prop_set_drive(DeviceState *dev, const char *name, BlockDriverState *value){ int res; res = bdrv_attach(value, dev); if (res < 0) { error_report("Can't attach drive %s to %s.%s: %s", bdrv_get_device_name(value), dev->id ? dev->id : dev->info->name, name, strerror(-res)); return -1; } qdev_prop_set(dev, name, &... |
1 | static inline int cris_lz(int x){int r;asm ("lz\t%1, %0\n" : "=r" (r) : "r" (x));return r;} |
1 | static void amdvi_class_init(ObjectClass *klass, void* data){ DeviceClass *dc = DEVICE_CLASS(klass); X86IOMMUClass *dc_class = X86_IOMMU_CLASS(klass); dc->reset = amdvi_reset; dc->vmsd = &vmstate_amdvi; dc->hotpluggable = false; dc_class->realize = amdvi_realize;} |
1 | static void pci_ehci_config(void){ /* hands over all ports from companion uhci to ehci */ qpci_io_writew(ehci1.dev, ehci1.base + 0x60, 1);} |
0 | static int v9fs_synth_renameat(FsContext *ctx, V9fsPath *olddir, const char *old_name, V9fsPath *newdir, const char *new_name){ errno = EPERM; return -1;} |
0 | static int vmdk_write_cid(BlockDriverState *bs, uint32_t cid){ char desc[DESC_SIZE], tmp_desc[DESC_SIZE]; char *p_name, *tmp_str; BDRVVmdkState *s = bs->opaque; memset(desc, 0, sizeof(desc)); if (bdrv_pread(bs->file, s->desc_offset, desc, DESC_SIZE) != DESC_SIZE) { return -EIO; } tmp_str = strstr(desc,"parentCID"); pst... |
0 | static void qemu_signal_lock(unsigned int msecs){ qemu_mutex_lock(&qemu_fair_mutex); while (qemu_mutex_trylock(&qemu_global_mutex)) { qemu_thread_signal(tcg_cpu_thread, SIGUSR1); if (!qemu_mutex_timedlock(&qemu_global_mutex, msecs)) break; } qemu_mutex_unlock(&qemu_fair_mutex);} |
0 | static void gen_mttr(CPUMIPSState *env, DisasContext *ctx, int rd, int rt, int u, int sel, int h){ int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); TCGv t0 = tcg_temp_local_new(); gen_load_gpr(t0, rt); if ((env->CP0_VPEConf0 & (1 << CP0VPEC0_MVP)) == 0 && ((env->tcs[other_tc].CP0_TCBind & (0xf << CP0TCBd... |
0 | int net_init_slirp(const NetClientOptions *opts, const char *name, NetClientState *peer, Error **errp){ /* FIXME error_setg(errp, ...) on failure */ struct slirp_config_str *config; char *vnet; int ret; const NetdevUserOptions *user; const char **dnssearch; assert(opts->kind == NET_CLIENT_OPTIONS_KIND_USER); user = opt... |
0 | void bdrv_detach(BlockDriverState *bs, DeviceState *qdev){ assert(bs->peer == qdev); bs->peer = NULL; bs->change_cb = NULL; bs->change_opaque = NULL;} |
0 | static void vmsa_ttbcr_reset(CPUARMState *env, const ARMCPRegInfo *ri){ env->cp15.c2_base_mask = 0xffffc000u; env->cp15.c2_control = 0; env->cp15.c2_mask = 0;} |
0 | static inline void helper_ret_protected(int shift, int is_iret, int addend){ uint32_t sp, new_cs, new_eip, new_eflags, new_esp, new_ss; uint32_t new_es, new_ds, new_fs, new_gs; uint32_t e1, e2, ss_e1, ss_e2; int cpl, dpl, rpl, eflags_mask; uint8_t *ssp; sp = ESP; if (!(env->segs[R_SS].flags & DESC_B_MASK)) sp &= 0xffff... |
0 | static int vnc_refresh_lossy_rect(VncDisplay *vd, int x, int y){ VncState *vs; int sty = y / VNC_STAT_RECT; int stx = x / VNC_STAT_RECT; int has_dirty = 0; y = y / VNC_STAT_RECT * VNC_STAT_RECT; x = x / VNC_STAT_RECT * VNC_STAT_RECT; QTAILQ_FOREACH(vs, &vd->clients, next) { int j; /* kernel send buffers are full -> ref... |
0 | void cpu_exec_step_atomic(CPUState *cpu){ start_exclusive(); /* Since we got here, we know that parallel_cpus must be true. */ parallel_cpus = false; cpu_exec_step(cpu); parallel_cpus = true; end_exclusive();} |
0 | void acpi_build(AcpiBuildTables *tables){ PCMachineState *pcms = PC_MACHINE(qdev_get_machine()); PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); GArray *table_offsets; unsigned facs, dsdt, rsdt, fadt; AcpiCpuInfo cpu; AcpiPmInfo pm; AcpiMiscInfo misc; AcpiMcfgInfo mcfg; PcPciInfo pci; uint8_t *u; size_t aml_len = 0;... |
0 | static void qnull_destroy_obj(QObject *obj){ assert(0);} |
0 | void hmp_info_snapshots(Monitor *mon, const QDict *qdict){ BlockDriverState *bs, *bs1; QEMUSnapshotInfo *sn_tab, *sn, s, *sn_info = &s; int nb_sns, i, ret, available; int total; int *available_snapshots; bs = find_vmstate_bs(); if (!bs) { monitor_printf(mon, "No available block device supports snapshots\n"); return; } ... |
0 | static void set_fifodepth(MSSSpiState *s){ unsigned int size = s->regs[R_SPI_DFSIZE] & FRAMESZ_MASK; if (size <= 8) { s->fifo_depth = 32; } else if (size <= 16) { s->fifo_depth = 16; } else if (size <= 32) { s->fifo_depth = 8; } else { s->fifo_depth = 4; }} |
0 | void qdev_unplug(DeviceState *dev, Error **errp){ DeviceClass *dc = DEVICE_GET_CLASS(dev); if (!dev->parent_bus->allow_hotplug) { error_set(errp, QERR_BUS_NO_HOTPLUG, dev->parent_bus->name); return; } assert(dc->unplug != NULL); qdev_hot_removed = true; if (dc->unplug(dev) < 0) { error_set(errp, QERR_UNDEFINED_ERROR); ... |
0 | int rom_add_file(const char *file, const char *fw_dir, const char *fw_file, target_phys_addr_t addr){ Rom *rom; int rc, fd = -1; rom = qemu_mallocz(sizeof(*rom)); rom->name = qemu_strdup(file); rom->path = qemu_find_file(QEMU_FILE_TYPE_BIOS, rom->name); if (rom->path == NULL) { rom->path = qemu_strdup(file); } fd = ope... |
0 | static void ide_ioport_write(void *opaque, uint32_t addr, uint32_t val){ IDEState *ide_if = opaque; IDEState *s; int unit, n; int lba48 = 0;#ifdef DEBUG_IDE printf("IDE: write addr=0x%x val=0x%02x\n", addr, val);#endif addr &= 7; /* ignore writes to command block while busy with previous command */ if (addr != 7 && (id... |
0 | _syscall3(int,sys_faccessat,int,dirfd,const char *,pathname,int,mode)#endif#if defined(TARGET_NR_fchmodat) && defined(__NR_fchmodat)_syscall3(int,sys_fchmodat,int,dirfd,const char *,pathname, mode_t,mode)#endif#if defined(TARGET_NR_fchownat) && defined(__NR_fchownat) && defined(USE_UID16)_syscall5(int,sys_fchownat,int,... |
0 | static SocketAddress *sd_socket_address(const char *path, const char *host, const char *port){ SocketAddress *addr = g_new0(SocketAddress, 1); if (path) { addr->type = SOCKET_ADDRESS_KIND_UNIX; addr->u.q_unix.data = g_new0(UnixSocketAddress, 1); addr->u.q_unix.data->path = g_strdup(path); } else { addr->type = SOCKET_A... |
0 | static void configure_alarms(char const *opt){ int i; int cur = 0; int count = (sizeof(alarm_timers) / sizeof(*alarm_timers)) - 1; char *arg; char *name; if (!strcmp(opt, "help")) { show_available_alarms(); exit(0); } arg = strdup(opt); /* Reorder the array */ name = strtok(arg, ","); while (name) { struct qemu_alarm_t... |
0 | static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu, sPAPRMachineState *spapr, uint32_t token, uint32_t nargs, target_ulong args, uint32_t nret, target_ulong rets){ target_ulong parameter = rtas_ld(args, 0); target_ulong buffer = rtas_ld(args, 1); target_ulong length = rtas_ld(args, 2); target_ulong ret; switch (... |
0 | static void test_qemu_strtoull_trailing(void){ const char *str = "123xxx"; char f = 'X'; const char *endptr = &f; uint64_t res = 999; int err; err = qemu_strtoull(str, &endptr, 0, &res); g_assert_cmpint(err, ==, 0); g_assert_cmpint(res, ==, 123); g_assert(endptr == str + 3);} |
0 | void bdrv_set_dirty_bitmap(BdrvDirtyBitmap *bitmap, int64_t cur_sector, int64_t nr_sectors){ assert(bdrv_dirty_bitmap_enabled(bitmap)); hbitmap_set(bitmap->bitmap, cur_sector, nr_sectors);} |
0 | int kvm_has_xsave(void){ return kvm_state->xsave;} |
0 | static BlockDriverAIOCB *curl_aio_readv(BlockDriverState *bs, int64_t sector_num, QEMUIOVector *qiov, int nb_sectors, BlockDriverCompletionFunc *cb, void *opaque){ CURLAIOCB *acb; acb = qemu_aio_get(&curl_aiocb_info, bs, cb, opaque); acb->qiov = qiov; acb->sector_num = sector_num; acb->nb_sectors = nb_sectors; acb->bh ... |
0 | static int translate_pages(S390CPU *cpu, vaddr addr, int nr_pages, target_ulong *pages, bool is_write){ bool lowprot = is_write && lowprot_enabled(&cpu->env); uint64_t asc = cpu->env.psw.mask & PSW_MASK_ASC; CPUS390XState *env = &cpu->env; int ret, i, pflags; for (i = 0; i < nr_pages; i++) { /* Low-address protection? ... |
0 | static unsigned int dec_move_sr(DisasContext *dc){DIS(fprintf (logfile, "move $s%u, $r%u\n", dc->op2, dc->op1));cris_cc_mask(dc, 0);tcg_gen_helper_0_2(helper_movl_reg_sreg, tcg_const_tl(dc->op1), tcg_const_tl(dc->op2));return 2;} |
0 | static int xen_pt_msixctrl_reg_init(XenPCIPassthroughState *s, XenPTRegInfo *reg, uint32_t real_offset, uint32_t *data){ PCIDevice *d = &s->dev; uint16_t reg_field = 0; /* use I/O device register's value as initial value */ reg_field = pci_get_word(d->config + real_offset); if (reg_field & PCI_MSIX_FLAGS_ENABLE) { XEN_... |
0 | static ssize_t v9fs_synth_readlink(FsContext *fs_ctx, V9fsPath *path, char *buf, size_t bufsz){ errno = ENOSYS; return -1;} |
0 | static bool cmd_read_dma(IDEState *s, uint8_t cmd){ bool lba48 = (cmd == WIN_READDMA_EXT); if (!s->bs) { ide_abort_command(s); return true; } ide_cmd_lba48_transform(s, lba48); ide_sector_start_dma(s, IDE_DMA_READ); return false;} |
0 | static void timer_start(SpiceTimer *timer, uint32_t ms){ qemu_mod_timer(timer->timer, qemu_get_clock(rt_clock) + ms);} |
0 | static int pci_pbm_init_device(SysBusDevice *dev){ APBState *s; int pci_mem_config, pci_mem_data, apb_config, pci_ioport; s = FROM_SYSBUS(APBState, dev); /* apb_config */ apb_config = cpu_register_io_memory(apb_config_read, apb_config_write, s); sysbus_init_mmio(dev, 0x40ULL, apb_config); /* pci_ioport */ pci_ioport = ... |
0 | void cpu_reset (CPUMIPSState *env){ memset(env, 0, offsetof(CPUMIPSState, breakpoints)); tlb_flush(env, 1); /* Minimal init */#if !defined(CONFIG_USER_ONLY) if (env->hflags & MIPS_HFLAG_BMASK) { /* If the exception was raised from a delay slot, * come back to the jump. */ env->CP0_ErrorEPC = env->PC - 4; env->hflags &=... |
0 | static void gen_neon_unzip_u8(TCGv t0, TCGv t1){ TCGv rd, rm, tmp; rd = new_tmp(); rm = new_tmp(); tmp = new_tmp(); tcg_gen_andi_i32(rd, t0, 0xff); tcg_gen_shri_i32(tmp, t0, 8); tcg_gen_andi_i32(tmp, tmp, 0xff00); tcg_gen_or_i32(rd, rd, tmp); tcg_gen_shli_i32(tmp, t1, 16); tcg_gen_andi_i32(tmp, tmp, 0xff0000); tcg_gen_... |
0 | static int nic_can_receive(NetClientState *nc){ EEPRO100State *s = qemu_get_nic_opaque(nc); TRACE(RXTX, logout("%p\n", s)); return get_ru_state(s) == ru_ready;#if 0 return !eepro100_buffer_full(s);#endif} |
0 | int omap_validate_emiff_addr(struct omap_mpu_state_s *s, target_phys_addr_t addr){ return addr >= OMAP_EMIFF_BASE && addr < OMAP_EMIFF_BASE + s->sdram_size;} |
0 | PCIDevice *pci_nic_init(NICInfo *nd, const char *default_model, const char *default_devaddr){ const char *devaddr = nd->devaddr ? nd->devaddr : default_devaddr; PCIBus *bus; int devfn; PCIDevice *pci_dev; DeviceState *dev; int i; i = qemu_find_nic_model(nd, pci_nic_models, default_model); if (i < 0) return NULL; bus = ... |
0 | static const char *local_mapped_attr_path(FsContext *ctx, const char *path, char *buffer){ char *dir_name; char *tmp_path = g_strdup(path); char *base_name = basename(tmp_path); /* NULL terminate the directory */ dir_name = tmp_path; *(base_name - 1) = '\0'; snprintf(buffer, PATH_MAX, "%s/%s/%s/%s", ctx->fs_root, dir_n... |
0 | RxFilterInfoList *qmp_query_rx_filter(bool has_name, const char *name, Error **errp){ NetClientState *nc; RxFilterInfoList *filter_list = NULL, *last_entry = NULL; QTAILQ_FOREACH(nc, &net_clients, next) { RxFilterInfoList *entry; RxFilterInfo *info; if (has_name && strcmp(nc->name, name) != 0) { continue; } /* only que... |
0 | write_f(int argc, char **argv){struct timeval t1, t2;int Cflag = 0, pflag = 0, qflag = 0, bflag = 0;int c, cnt;char *buf;int64_t offset;int count; /* Some compilers get confused and warn if this is not initialized. */ int total = 0;int pattern = 0xcd;while ((c = getopt(argc, argv, "bCpP:q")) != EOF) {switch (c) {case '... |
0 | void framebuffer_update_display( DisplaySurface *ds, MemoryRegion *address_space, hwaddr base, int cols, /* Width in pixels. */ int rows, /* Height in pixels. */ int src_width, /* Length of source line, in bytes. */ int dest_row_pitch, /* Bytes between adjacent horizontal output pixels. */ int dest_col_pitch, /* Bytes ... |
0 | void tcg_region_reset_all(void){ unsigned int i; qemu_mutex_lock(®ion.lock); region.current = 0; region.agg_size_full = 0; for (i = 0; i < n_tcg_ctxs; i++) { bool err = tcg_region_initial_alloc__locked(tcg_ctxs[i]); g_assert(!err); } qemu_mutex_unlock(®ion.lock);} |
0 | static int parse_args(int argc, char **argv){ const char *r; int optind; struct qemu_argument *arginfo; for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) { if (arginfo->env == NULL) { continue; } r = getenv(arginfo->env); if (r != NULL) { arginfo->handle_opt(r); } } optind = 1; for (;;) { if (optind >= ... |
0 | void cpu_loop(CPUOpenRISCState *env){ CPUState *cs = CPU(openrisc_env_get_cpu(env)); int trapnr, gdbsig; for (;;) { cpu_exec_start(cs); trapnr = cpu_openrisc_exec(cs); cpu_exec_end(cs); gdbsig = 0; switch (trapnr) { case EXCP_RESET: qemu_log("\nReset request, exit, pc is %#x\n", env->pc); exit(EXIT_FAILURE); break; cas... |
0 | void msix_save(PCIDevice *dev, QEMUFile *f){ unsigned n = dev->msix_entries_nr; if (!(dev->cap_present & QEMU_PCI_CAP_MSIX)) { return; } qemu_put_buffer(f, dev->msix_table_page, n * PCI_MSIX_ENTRY_SIZE); qemu_put_buffer(f, dev->msix_table_page + MSIX_PAGE_PENDING, (n + 7) / 8);} |
0 | int qsv_init(AVCodecContext *s){ InputStream *ist = s->opaque; QSVContext *qsv = ist->hwaccel_ctx; AVQSVContext *hwctx_dec; int ret; if (!qsv) { av_log(NULL, AV_LOG_ERROR, "QSV transcoding is not initialized. " "-hwaccel qsv should only be used for one-to-one QSV transcoding " "with no filters.\n"); return AVERROR_BUG;... |
0 | static void default_drive(int enable, int snapshot, int use_scsi, BlockInterfaceType type, int index, const char *optstr){ QemuOpts *opts; if (type == IF_DEFAULT) { type = use_scsi ? IF_SCSI : IF_IDE; } if (!enable || drive_get_by_index(type, index)) { return; } opts = drive_add(type, index, NULL, optstr); if (snapshot... |
0 | void css_generate_css_crws(uint8_t cssid){ if (!channel_subsys.sei_pending) { css_queue_crw(CRW_RSC_CSS, CRW_ERC_EVENT, 0, cssid); } channel_subsys.sei_pending = true;} |
0 | int qemu_add_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque){ WaitObjects *w = &wait_objects; if (w->num >= MAXIMUM_WAIT_OBJECTS) return -1; w->events[w->num] = handle; w->func[w->num] = func; w->opaque[w->num] = opaque; w->num++; return 0;} |
0 | static void scsi_device_unrealize(SCSIDevice *s, Error **errp){ SCSIDeviceClass *sc = SCSI_DEVICE_GET_CLASS(s); if (sc->unrealize) { sc->unrealize(s, errp); }} |
0 | void disas(FILE *out, void *code, unsigned long size){ unsigned long pc; int count; struct disassemble_info disasm_info; int (*print_insn)(bfd_vma pc, disassemble_info *info); INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf); disasm_info.buffer = code; disasm_info.buffer_vma = (unsigned long)code; disasm_info.buffer_le... |
0 | void bdrv_add_key(BlockDriverState *bs, const char *key, Error **errp){ if (key) { if (!bdrv_is_encrypted(bs)) { error_setg(errp, "Node '%s' is not encrypted", bdrv_get_device_or_node_name(bs)); } else if (bdrv_set_key(bs, key) < 0) { error_set(errp, QERR_INVALID_PASSWORD); } } else { if (bdrv_key_required(bs)) { error... |
0 | static void armv7m_nvic_reset(DeviceState *dev){ nvic_state *s = NVIC(dev); NVICClass *nc = NVIC_GET_CLASS(s); nc->parent_reset(dev); /* Common GIC reset resets to disabled; the NVIC doesn't have * per-CPU interfaces so mark our non-existent CPU interface * as enabled by default, and with a priority mask which allows *... |
0 | static void float_to_int16_sse(int16_t *dst, const float *src, long len){ int i; for(i=0; i<len; i+=4) { asm volatile( "cvtps2pi %1, %%mm0 \n\t" "cvtps2pi %2, %%mm1 \n\t" "packssdw %%mm1, %%mm0 \n\t" "movq %%mm0, %0 \n\t" :"=m"(dst[i]) :"m"(src[i]), "m"(src[i+2]) ); } asm volatile("emms");} |
0 | static int migration_rate_limit(void *opaque){ MigrationState *s = opaque; int ret; ret = qemu_file_get_error(s->file); if (ret) { return ret; } if (s->bytes_xfer >= s->xfer_limit) { return 1; } return 0;} |
0 | void cpu_interrupt(CPUState *env, int mask){ int old_mask; old_mask = env->interrupt_request; env->interrupt_request |= mask;#ifndef CONFIG_USER_ONLY /* * If called from iothread context, wake the target cpu in * case its halted. */ if (!qemu_cpu_self(env)) { qemu_cpu_kick(env); return; }#endif if (use_icount) { env->i... |
0 | static inline void tcg_out_tlb_load(TCGContext *s, TCGReg addrlo, TCGReg addrhi, int mem_index, TCGMemOp s_bits, tcg_insn_unit **label_ptr, int which){ const TCGReg r0 = TCG_REG_L0; const TCGReg r1 = TCG_REG_L1; TCGType ttype = TCG_TYPE_I32; TCGType htype = TCG_TYPE_I32; int trexw = 0, hrexw = 0; if (TCG_TARGET_REG_BIT... |
0 | static inline void t_gen_sext(TCGv d, TCGv s, int size){if (size == 1)tcg_gen_ext8s_i32(d, s);else if (size == 2)tcg_gen_ext16s_i32(d, s);else if(GET_TCGV(d) != GET_TCGV(s))tcg_gen_mov_tl(d, s);} |
0 | static int vio_make_devnode(VIOsPAPRDevice *dev, void *fdt){ VIOsPAPRDeviceInfo *info = (VIOsPAPRDeviceInfo *)qdev_get_info(&dev->qdev); int vdevice_off, node_off, ret; char *dt_name; vdevice_off = fdt_path_offset(fdt, "/vdevice"); if (vdevice_off < 0) { return vdevice_off; } dt_name = vio_format_dev_name(dev); if (!dt... |
0 | void mkimg(const char *file, const char *fmt, unsigned size_mb){ gchar *cli; bool ret; int rc; GError *err = NULL; char *qemu_img_path; gchar *out, *out2; char *abs_path; qemu_img_path = getenv("QTEST_QEMU_IMG"); abs_path = realpath(qemu_img_path, NULL); assert(qemu_img_path); cli = g_strdup_printf("%s create -f %s %s ... |
0 | static inline void RENAME(rgb32tobgr15)(const uint8_t *src, uint8_t *dst, long src_size){ const uint8_t *s = src; const uint8_t *end;#if COMPILE_TEMPLATE_MMX const uint8_t *mm_end;#endif uint16_t *d = (uint16_t *)dst; end = s + src_size;#if COMPILE_TEMPLATE_MMX __asm__ volatile(PREFETCH" %0"::"m"(*src):"memory"); __asm... |
0 | static void cris_alu_op_exec(DisasContext *dc, int op, TCGv dst, TCGv a, TCGv b, int size){ /* Emit the ALU insns. */ switch (op) { case CC_OP_ADD: tcg_gen_add_tl(dst, a, b); /* Extended arithmetics. */ t_gen_addx_carry(dc, dst); break; case CC_OP_ADDC: tcg_gen_add_tl(dst, a, b); t_gen_add_flag(dst, 0); /* C_FLAG. */ b... |
0 | static void blockdev_backup_prepare(BlkTransactionState *common, Error **errp){ BlockdevBackupState *state = DO_UPCAST(BlockdevBackupState, common, common); BlockdevBackup *backup; BlockBackend *blk, *target; Error *local_err = NULL; assert(common->action->kind == TRANSACTION_ACTION_KIND_BLOCKDEV_BACKUP); backup = comm... |
0 | static int zipl_magic(uint8_t *ptr){ uint32_t *p = (void*)ptr; uint32_t *z = (void*)ZIPL_MAGIC; if (*p != *z) { debug_print_int("invalid magic", *p); virtio_panic("invalid magic"); } return 1;} |
0 | static void bt_hid_interrupt_sdu(void *opaque, const uint8_t *data, int len){ struct bt_hid_device_s *hid = opaque; if (len > BT_HID_MTU || len < 1) goto bad; if ((data[0] & 3) != BT_DATA_OUTPUT) goto bad; if ((data[0] >> 4) == BT_DATA) { if (hid->intr_state) goto bad; hid->data_type = BT_DATA_OUTPUT; hid->intrdataout.... |
0 | static void decode_opc (CPUState *env, DisasContext *ctx){ int32_t offset; int rs, rt, rd, sa; uint32_t op, op1, op2; int16_t imm; /* make sure instructions are on a word boundary */ if (ctx->pc & 0x3) { env->CP0_BadVAddr = ctx->pc; generate_exception(ctx, EXCP_AdEL); return; } if ((ctx->hflags & MIPS_HFLAG_BMASK) == M... |
0 | static void port92_write(void *opaque, hwaddr addr, uint64_t val, unsigned size){ Port92State *s = opaque; int oldval = s->outport; DPRINTF("port92: write 0x%02" PRIx64 "\n", val); s->outport = val; qemu_set_irq(*s->a20_out, (val >> 1) & 1); if ((val & 1) && !(oldval & 1)) { qemu_system_reset_request(); }} |
0 | static uint64_t coroutine_fn mirror_iteration(MirrorBlockJob *s){ BlockDriverState *source = blk_bs(s->common.blk); int64_t sector_num, first_chunk; uint64_t delay_ns = 0; /* At least the first dirty chunk is mirrored in one iteration. */ int nb_chunks = 1; int64_t end = s->bdev_length / BDRV_SECTOR_SIZE; int sectors_p... |
0 | static void flush_encoders(void){ int i, ret; for (i = 0; i < nb_output_streams; i++) { OutputStream *ost = output_streams[i]; AVCodecContext *enc = ost->enc_ctx; AVFormatContext *os = output_files[ost->file_index]->ctx; int stop_encoding = 0; if (!ost->encoding_needed) continue; if (enc->codec_type == AVMEDIA_TYPE_AUD... |
0 | AVFormatContext *ff_rtp_chain_mux_open(AVFormatContext *s, AVStream *st, URLContext *handle, int packet_size){ AVFormatContext *rtpctx; int ret; AVOutputFormat *rtp_format = av_guess_format("rtp", NULL, NULL); if (!rtp_format) return NULL; /* Allocate an AVFormatContext for each output stream */ rtpctx = avformat_alloc... |
0 | static av_cold int avs_decode_init(AVCodecContext * avctx){ AvsContext *s = avctx->priv_data; s->frame = av_frame_alloc(); if (!s->frame) return AVERROR(ENOMEM); avctx->pix_fmt = AV_PIX_FMT_PAL8; ff_set_dimensions(avctx, 318, 198); return 0;} |
0 | static av_cold int raw_encode_close(AVCodecContext *avctx){ av_frame_free(&avctx->coded_frame); return 0;} |
0 | int avio_close_dyn_buf(AVIOContext *s, uint8_t **pbuffer){ DynBuffer *d; int size; static const char padbuf[AV_INPUT_BUFFER_PADDING_SIZE] = {0}; int padding = 0; if (!s) { *pbuffer = NULL; return 0; } /* don't attempt to pad fixed-size packet buffers */ if (!s->max_packet_size) { avio_write(s, padbuf, sizeof(padbuf)); ... |
0 | void pcie_port_init_reg(PCIDevice *d){ /* Unlike pci bridge, 66MHz and fast back to back don't apply to pci express port. */ pci_set_word(d->config + PCI_STATUS, 0); pci_set_word(d->config + PCI_SEC_STATUS, 0); /* Unlike conventional pci bridge, some bits are hardwired to 0. */#define PCI_BRIDGE_CTL_VGA_16BIT 0x10 /* V... |
0 | static void get_slice_data(ProresContext *ctx, const uint16_t *src, int linesize, int x, int y, int w, int h, DCTELEM *blocks, uint16_t *emu_buf, int mbs_per_slice, int blocks_per_mb, int is_chroma){ const uint16_t *esrc; const int mb_width = 4 * blocks_per_mb; int elinesize; int i, j, k; for (i = 0; i < mbs_per_slice;... |
0 | static always_inline void gen_farith3 (void *helper, int ra, int rb, int rc){ if (unlikely(rc == 31)) return; if (ra != 31) { if (rb != 31) tcg_gen_helper_1_2(helper, cpu_fir[rc], cpu_fir[ra], cpu_fir[rb]); else { TCGv tmp = tcg_const_i64(0); tcg_gen_helper_1_2(helper, cpu_fir[rc], cpu_fir[ra], tmp); tcg_temp_free(tmp)... |
0 | static bool vfio_prereg_listener_skipped_section(MemoryRegionSection *section){ if (memory_region_is_iommu(section->mr)) { hw_error("Cannot possibly preregister IOMMU memory"); } return !memory_region_is_ram(section->mr) || memory_region_is_skip_dump(section->mr);} |
0 | static void gen_mtc0 (DisasContext *ctx, int reg, int sel){ const char *rn = "invalid"; switch (reg) { case 0: switch (sel) { case 0: gen_op_mtc0_index(); rn = "Index"; break; case 1:// gen_op_mtc0_mvpcontrol(); /* MT ASE */ rn = "MVPControl";// break; case 2:// gen_op_mtc0_mvpconf0(); /* MT ASE */ rn = "MVPConf0";// b... |
0 | static void test_native_list_integer_helper(TestInputVisitorData *data, const void *unused, UserDefNativeListUnionKind kind){ UserDefNativeListUnion *cvalue = NULL; Visitor *v; GString *gstr_list = g_string_new(""); GString *gstr_union = g_string_new(""); int i; for (i = 0; i < 32; i++) { g_string_append_printf(gstr_li... |
0 | pvscsi_ring_init_data(PVSCSIRingInfo *m, PVSCSICmdDescSetupRings *ri){ int i; uint32_t txr_len_log2, rxr_len_log2; uint32_t req_ring_size, cmp_ring_size; m->rs_pa = ri->ringsStatePPN << VMW_PAGE_SHIFT; if ((ri->reqRingNumPages > PVSCSI_SETUP_RINGS_MAX_NUM_PAGES) || (ri->cmpRingNumPages > PVSCSI_SETUP_RINGS_MAX_NUM_PAGE... |
0 | static bool check_overlapping_aiocb(BDRVSheepdogState *s, SheepdogAIOCB *aiocb){ SheepdogAIOCB *cb; QLIST_FOREACH(cb, &s->inflight_aiocb_head, aiocb_siblings) { if (AIOCBOverlapping(aiocb, cb)) { return true; } } QLIST_INSERT_HEAD(&s->inflight_aiocb_head, aiocb, aiocb_siblings); return false;} |
0 | static void qio_channel_websock_finalize(Object *obj){ QIOChannelWebsock *ioc = QIO_CHANNEL_WEBSOCK(obj); buffer_free(&ioc->encinput); buffer_free(&ioc->encoutput); buffer_free(&ioc->rawinput); buffer_free(&ioc->rawoutput); object_unref(OBJECT(ioc->master)); if (ioc->io_tag) { g_source_remove(ioc->io_tag); } if (ioc->i... |
0 | static av_cold int vaapi_encode_h265_init_internal(AVCodecContext *avctx){ static const VAConfigAttrib default_config_attributes[] = { { .type = VAConfigAttribRTFormat, .value = VA_RT_FORMAT_YUV420 }, { .type = VAConfigAttribEncPackedHeaders, .value = (VA_ENC_PACKED_HEADER_SEQUENCE | VA_ENC_PACKED_HEADER_SLICE) }, }; V... |
0 | void qmp_migrate_set_downtime(double value, Error **errp){ value *= 1e9; value = MAX(0, MIN(UINT64_MAX, value)); max_downtime = (uint64_t)value;} |
0 | static void qemu_cpu_kick_thread(CPUState *env){#ifndef _WIN32 int err; err = pthread_kill(env->thread->thread, SIG_IPI); if (err) { fprintf(stderr, "qemu:%s: %s", __func__, strerror(err)); exit(1); }#else /* _WIN32 */ if (!qemu_cpu_is_self(env)) { SuspendThread(env->thread->thread); cpu_signal(0); ResumeThread(env->th... |
0 | void helper_evaluate_flags_alu_4(void){uint32_t src;uint32_t dst;uint32_t res;uint32_t flags = 0;src = env->cc_src;dst = env->cc_dest;/* Reconstruct the result. */switch (env->cc_op){case CC_OP_SUB:res = dst - src;break;case CC_OP_ADD:res = dst + src;break;default:res = env->cc_result;break;}if (env->cc_op == CC_OP_SUB... |
0 | static void pmac_ide_atapi_transfer_cb(void *opaque, int ret){ DBDMA_io *io = opaque; MACIOIDEState *m = io->opaque; IDEState *s = idebus_active_if(&m->bus); int unaligned; if (ret < 0) { m->aiocb = NULL; qemu_sglist_destroy(&s->sg); ide_atapi_io_error(s, ret); io->remainder_len = 0; goto done; } if (!m->dma_active) { ... |
0 | static void pit_reset(void *opaque){ PITState *pit = opaque; PITChannelState *s; int i; for(i = 0;i < 3; i++) { s = &pit->channels[i]; s->mode = 3; s->gate = (i != 2); pit_load_count(s, 0); }} |
Subsets and Splits
No community queries yet
The top public SQL queries from the community will appear here once available.