text stringlengths 1 1.05M |
|---|
EXTRN sEnter : BYTE
PUBLIC PR_input
Data SEGMENT PUBLIC
s_end DB 13,10,'<entered>',13,10,'$'
Data ENDS
Code SEGMENT PUBLIC 'CODE'
ASSUME CS:Code
PR_input PROC NEAR
begin:
PUSH BX
PUSH DX
PUSH SI
MOV AX, 0
MOV BX, 0
MOV AH, 9
LEA DX, sEnter
INT 21h
MOV DX, 0
Input_loop:
MOV AH,1
INT 21h ;получаем в AL символ
CMP AL, 13
JE End_loop
CMP AL, 2Dh
JNE Not_neg
MOV SI, 1
JMP Input_loop
Not_neg:
Get_num:
PUSH AX
MOV AX, BX
MOV BX, 10
MUL BX
POP BX
SUB BL, '0'
MOV BH, 0
ADD BX, AX
JMP Input_loop
End_loop:
MOV AX, BX
CMP SI, 1
JNE Exit
NEG AX
Exit:
PUSH AX
LEA DX, s_end
MOV AH, 9
INT 21h
POP AX
POP SI
POP DX
POP BX
RET
PR_input ENDP
Code ENDS
END |
.global s_prepare_buffers
s_prepare_buffers:
push %r13
push %r14
push %rbp
push %rbx
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_WT_ht+0x42d, %rsi
lea addresses_A_ht+0x8b2d, %rdi
clflush (%rsi)
nop
nop
nop
xor $55151, %rbx
mov $118, %rcx
rep movsl
nop
nop
add %r13, %r13
lea addresses_WC_ht+0x198ed, %rbp
nop
nop
nop
nop
and %rdx, %rdx
mov (%rbp), %rcx
cmp $42789, %rbx
lea addresses_normal_ht+0xc42d, %rcx
dec %r13
movw $0x6162, (%rcx)
sub %rbp, %rbp
lea addresses_UC_ht+0x1d2ed, %rdx
nop
nop
dec %rdi
mov $0x6162636465666768, %rbx
movq %rbx, %xmm6
movups %xmm6, (%rdx)
nop
nop
nop
nop
nop
add $34870, %rcx
lea addresses_D_ht+0x19c2d, %rbx
nop
nop
nop
nop
add $38969, %rdi
mov (%rbx), %esi
nop
nop
nop
nop
cmp $64956, %rbp
lea addresses_WC_ht+0x782d, %rsi
lea addresses_WT_ht+0x142d, %rdi
add %rdx, %rdx
mov $45, %rcx
rep movsw
nop
cmp %rdx, %rdx
lea addresses_normal_ht+0xfd2d, %r13
nop
nop
nop
nop
sub $51340, %rdi
movups (%r13), %xmm3
vpextrq $0, %xmm3, %rbx
nop
add %rbx, %rbx
lea addresses_WT_ht+0x872d, %rcx
nop
nop
nop
nop
nop
xor $18465, %rbx
mov (%rcx), %rdi
nop
nop
nop
nop
nop
xor $30374, %rsi
lea addresses_normal_ht+0x148ad, %rsi
lea addresses_A_ht+0x1cad, %rdi
clflush (%rdi)
nop
xor %r14, %r14
mov $26, %rcx
rep movsw
nop
nop
nop
nop
inc %rdx
lea addresses_UC_ht+0x1bad, %rdx
nop
nop
nop
nop
nop
cmp $56144, %rbp
movb (%rdx), %cl
nop
nop
nop
nop
nop
cmp %rbx, %rbx
lea addresses_normal_ht+0x3c3b, %rsi
lea addresses_WT_ht+0x18dad, %rdi
nop
inc %rbx
mov $99, %rcx
rep movsw
nop
nop
nop
nop
nop
xor $34703, %rsi
lea addresses_UC_ht+0x342d, %rsi
inc %rdi
mov $0x6162636465666768, %rbx
movq %rbx, %xmm3
vmovups %ymm3, (%rsi)
nop
nop
nop
sub %r13, %r13
lea addresses_UC_ht+0x1cdad, %rdi
nop
nop
nop
xor $13059, %r13
movb $0x61, (%rdi)
nop
xor %rbp, %rbp
lea addresses_WT_ht+0x1dd0d, %rdx
nop
nop
and $63670, %rbp
mov (%rdx), %r14d
nop
nop
nop
nop
nop
add %rcx, %rcx
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbx
pop %rbp
pop %r14
pop %r13
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r13
push %r14
push %r15
push %r9
push %rdi
push %rsi
// Load
lea addresses_UC+0x194ad, %r9
nop
nop
nop
nop
nop
and $51099, %rdi
mov (%r9), %r15
xor $35417, %rsi
// Store
lea addresses_UC+0xd71b, %r9
nop
nop
nop
nop
nop
xor %r15, %r15
movw $0x5152, (%r9)
nop
nop
nop
nop
add $30768, %r15
// Store
lea addresses_WT+0x2398, %rsi
cmp %r10, %r10
mov $0x5152535455565758, %r15
movq %r15, %xmm2
movups %xmm2, (%rsi)
add $36790, %rdi
// Store
lea addresses_A+0x96d, %r13
nop
nop
nop
nop
nop
and $23235, %rsi
movw $0x5152, (%r13)
nop
nop
xor $25625, %r15
// Store
lea addresses_WT+0xe42d, %r10
nop
nop
sub %r14, %r14
mov $0x5152535455565758, %r9
movq %r9, %xmm0
vmovups %ymm0, (%r10)
nop
nop
cmp %r15, %r15
// Store
lea addresses_RW+0xcaad, %rdi
dec %r10
movw $0x5152, (%rdi)
nop
sub %r13, %r13
// Store
lea addresses_US+0x502d, %r15
nop
nop
nop
nop
inc %r9
movb $0x51, (%r15)
add $41343, %rsi
// Faulty Load
lea addresses_normal+0x682d, %r15
clflush (%r15)
nop
nop
nop
cmp $6045, %r9
mov (%r15), %r10
lea oracles, %r14
and $0xff, %r10
shlq $12, %r10
mov (%r14,%r10,1), %r10
pop %rsi
pop %rdi
pop %r9
pop %r15
pop %r14
pop %r13
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_normal', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 0}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_UC', 'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 7}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_UC', 'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_WT', 'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_A', 'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 6}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_WT', 'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 9}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_RW', 'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 7}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_US', 'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 11}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'same': True, 'type': 'addresses_normal', 'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'REPM', 'src': {'same': False, 'congruent': 8, 'type': 'addresses_WT_ht'}, 'dst': {'same': False, 'congruent': 8, 'type': 'addresses_A_ht'}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_WC_ht', 'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 6}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_normal_ht', 'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 10}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_UC_ht', 'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 2}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_D_ht', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 9}}
{'OP': 'REPM', 'src': {'same': False, 'congruent': 11, 'type': 'addresses_WC_ht'}, 'dst': {'same': False, 'congruent': 10, 'type': 'addresses_WT_ht'}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_normal_ht', 'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 8}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_WT_ht', 'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 7}}
{'OP': 'REPM', 'src': {'same': False, 'congruent': 7, 'type': 'addresses_normal_ht'}, 'dst': {'same': False, 'congruent': 7, 'type': 'addresses_A_ht'}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_UC_ht', 'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 7}}
{'OP': 'REPM', 'src': {'same': False, 'congruent': 0, 'type': 'addresses_normal_ht'}, 'dst': {'same': False, 'congruent': 6, 'type': 'addresses_WT_ht'}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_UC_ht', 'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 10}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_UC_ht', 'NT': True, 'AVXalign': False, 'size': 1, 'congruent': 6}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_WT_ht', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 5}}
{'34': 21829}
34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34
*/
|
/* -----------------------------------------------------------------------------
Copyright (c) 2012 Niels Fröhling niels@paradice-insight.us
Copyright (c) 2019 Christian Spanier github@boxie.eu
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
"Software"), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-------------------------------------------------------------------------- */
#if defined(_MSC_VER) && (_MSC_VER > 1300)
#include <intrin.h>
#elif defined(__GNUC__) && (defined(__x86_64__) || defined(__i386__))
#include <x86intrin.h>
#endif
#include "paletteblock.h"
#define SBSTART 0
#define SBEND 3
#include "inlineables.inl"
namespace squish
{
/* *****************************************************************************
*/
#define S1(x) std::uint16_t(x)
// http://msdn.microsoft.com/en-us/library/hh308953%28v=vs.85%29
const std::uint16_t weights_u16[5][16] = {
{S1(0)}, // 0
{S1(0), S1(64)}, // 1
{S1(0), S1(21), S1(43), S1(64)}, // 2
{S1(0), S1(9), S1(18), S1(27), S1(37), S1(46), S1(55), S1(64)}, // 3
{S1(0), S1(4), S1(9), S1(13), S1(17), S1(21), S1(26), S1(30), S1(34), S1(38),
S1(43), S1(47), S1(51), S1(55), S1(60), S1(64)} // 4
};
#undef S1
#define V4(x) Vec4((1.0f / 64.0f) * x)
// http://msdn.microsoft.com/en-us/library/hh308953%28v=vs.85%29
const Vec4 weights_V4[5][16] = {
{V4(0)}, // 0
{V4(0), V4(64)}, // 1
{V4(0), V4(21), V4(43), V4(64)}, // 2
{V4(0), V4(9), V4(18), V4(27), V4(37), V4(46), V4(55), V4(64)}, // 3
{V4(0), V4(4), V4(9), V4(13), V4(17), V4(21), V4(26), V4(30), V4(34), V4(38),
V4(43), V4(47), V4(51), V4(55), V4(60), V4(64)} // 4
};
#undef V4
#define C4(x) Col4(x)
// http://msdn.microsoft.com/en-us/library/hh308953%28v=vs.85%29
const Col4 weights_C4[5][16] = {
{C4(0)}, // 0
{C4(0), C4(64)}, // 1
{C4(0), C4(21), C4(43), C4(64)}, // 2
{C4(0), C4(9), C4(18), C4(27), C4(37), C4(46), C4(55), C4(64)}, // 3
{C4(0), C4(4), C4(9), C4(13), C4(17), C4(21), C4(26), C4(30), C4(34), C4(38),
C4(43), C4(47), C4(51), C4(55), C4(60), C4(64)} // 4
};
#undef C4
/* *****************************************************************************
*/
#ifdef __GNUC__
__attribute__((__aligned__(16)))
#else
__declspec(align(16))
#endif
extern const unsigned int blockxor[64][/*6*/ 5][4] = {
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0x0000ffff, 0x0000ffff,
0x0000ffff, 0x0000ffff},
{0xffff0000, 0xffff0000, 0xffff0000, 0xffff0000},
{0x0000ffff, 0x0000ffff, 0x000000ff, 0x00000000},
{0xffff0000, 0xffff0000, 0xff000000, 0x00000000},
{0x00000000, 0x00000000, 0x00ffff00, 0xffffffff}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0x00ffffff, 0x00ffffff,
0x00ffffff, 0x00ffffff},
{0xff000000, 0xff000000, 0xff000000, 0xff000000},
{0x00ffffff, 0x0000ffff, 0x00000000, 0x00000000},
{0xff000000, 0xffff0000, 0xffff0000, 0xff000000},
{0x00000000, 0x00000000, 0x0000ffff, 0x00ffffff}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0x000000ff, 0x000000ff,
0x000000ff, 0x000000ff},
{0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00},
{0xffffffff, 0x00ffff00, 0x00000000, 0x00000000},
{0x00000000, 0xff000000, 0xffff0000, 0xffff0000},
{0x00000000, 0x000000ff, 0x0000ffff, 0x0000ffff}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0x00ffffff, 0x0000ffff,
0x0000ffff, 0x000000ff},
{0xff000000, 0xffff0000, 0xffff0000, 0xffffff00},
{0x000000ff, 0x0000ffff, 0x0000ffff, 0x000000ff},
{0x00000000, 0x00000000, 0xffff0000, 0xffffff00},
{0xffffff00, 0xffff0000, 0x00000000, 0x00000000}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0xffffffff, 0x00ffffff,
0x00ffffff, 0x0000ffff},
{0x00000000, 0xff000000, 0xff000000, 0xffff0000},
{0xffffffff, 0xffffffff, 0x00000000, 0x00000000},
{0x00000000, 0x00000000, 0x0000ffff, 0x0000ffff},
{0x00000000, 0x00000000, 0xffff0000, 0xffff0000}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0x0000ffff, 0x000000ff,
0x000000ff, 0x00000000},
{0xffff0000, 0xffffff00, 0xffffff00, 0xffffffff},
{0x0000ffff, 0x0000ffff, 0x0000ffff, 0x0000ffff},
{0xffff0000, 0xffff0000, 0x00000000, 0x00000000},
{0x00000000, 0x00000000, 0xffff0000, 0xffff0000}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0x00ffffff, 0x0000ffff,
0x000000ff, 0x00000000},
{0xff000000, 0xffff0000, 0xffffff00, 0xffffffff},
{0x0000ffff, 0x0000ffff, 0x00000000, 0x00000000},
{0x00000000, 0x00000000, 0xffffffff, 0xffffffff},
{0xffff0000, 0xffff0000, 0x00000000, 0x00000000}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0xffffffff, 0x00ffffff,
0x0000ffff, 0x000000ff},
{0x00000000, 0xff000000, 0xffff0000, 0xffffff00},
{0x0000ffff, 0x0000ffff, 0x00000000, 0x00000000},
{0xffff0000, 0xffff0000, 0xffff0000, 0xffff0000},
{0x00000000, 0x00000000, 0x0000ffff, 0x0000ffff}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0xffffffff, 0xffffffff,
0x00ffffff, 0x0000ffff},
{0x00000000, 0x00000000, 0xff000000, 0xffff0000},
{0xffffffff, 0xffffffff, 0x00000000, 0x00000000},
{0x00000000, 0x00000000, 0xffffffff, 0x00000000},
{0x00000000, 0x00000000, 0x00000000, 0xffffffff}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0x0000ffff, 0x000000ff,
0x00000000, 0x00000000},
{0xffff0000, 0xffffff00, 0xffffffff, 0xffffffff},
{0xffffffff, 0x00000000, 0x00000000, 0x00000000},
{0x00000000, 0xffffffff, 0xffffffff, 0x00000000},
{0x00000000, 0x00000000, 0x00000000, 0xffffffff}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0xffffffff, 0x00ffffff,
0x000000ff, 0x00000000},
{0x00000000, 0xff000000, 0xffffff00, 0xffffffff},
{0xffffffff, 0x00000000, 0x00000000, 0x00000000},
{0x00000000, 0xffffffff, 0x00000000, 0x00000000},
{0x00000000, 0x00000000, 0xffffffff, 0xffffffff}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0xffffffff, 0xffffffff,
0x00ffffff, 0x000000ff},
{0x00000000, 0x00000000, 0xff000000, 0xffffff00},
{0x0000ffff, 0x0000ffff, 0x0000ffff, 0x0000ffff},
{0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000},
{0xff000000, 0xff000000, 0xff000000, 0xff000000}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0x00ffffff, 0x000000ff,
0x00000000, 0x00000000},
{0xff000000, 0xffffff00, 0xffffffff, 0xffffffff},
{0x000000ff, 0x000000ff, 0x000000ff, 0x000000ff},
{0x00ffff00, 0x00ffff00, 0x00ffff00, 0x00ffff00},
{0xff000000, 0xff000000, 0xff000000, 0xff000000}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0xffffffff, 0xffffffff,
0x00000000, 0x00000000},
{0x00000000, 0x00000000, 0xffffffff, 0xffffffff},
{0x000000ff, 0x000000ff, 0x000000ff, 0x000000ff},
{0x0000ff00, 0x0000ff00, 0x0000ff00, 0x0000ff00},
{0xffff0000, 0xffff0000, 0xffff0000, 0xffff0000}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0xffffffff, 0x00000000,
0x00000000, 0x00000000},
{0x00000000, 0xffffffff, 0xffffffff, 0xffffffff},
{0x0000ffff, 0x000000ff, 0x00000000, 0x00000000},
{0xffff0000, 0x00ffff00, 0x0000ffff, 0x000000ff},
{0x00000000, 0xff000000, 0xffff0000, 0xffffff00}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0xffffffff, 0xffffffff,
0xffffffff, 0x00000000},
{0x00000000, 0x00000000, 0x00000000, 0xffffffff},
{0x0000ffff, 0x00ffff00, 0xffff0000, 0xff000000},
{0xffff0000, 0xff000000, 0x00000000, 0x00000000},
{0x00000000, 0x000000ff, 0x0000ffff, 0x00ffffff}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0xffffffff, 0xffffff00,
0xff000000, 0x00000000},
{0x00000000, 0x000000ff, 0x00ffffff, 0xffffffff},
{0x00ffffff, 0x0000ffff, 0x000000ff, 0x00000000},
{0xff000000, 0xffff0000, 0x00ffff00, 0x0000ffff},
{0x00000000, 0x00000000, 0xff000000, 0xffff0000}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0x000000ff, 0x00ffffff,
0xffffffff, 0xffffffff},
{0xffffff00, 0xff000000, 0x00000000, 0x00000000},
{0x000000ff, 0x0000ffff, 0x00ffff00, 0xffff0000},
{0xffffff00, 0xffff0000, 0xff000000, 0x00000000},
{0x00000000, 0x00000000, 0x000000ff, 0x0000ffff}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0xffffffff, 0xffffffff,
0xffffff00, 0xff000000},
{0x00000000, 0x00000000, 0x000000ff, 0x00ffffff},
{0xffffffff, 0x00000000, 0x00000000, 0x00000000},
{0x00000000, 0x0000ffff, 0x0000ffff, 0x0000ffff},
{0x00000000, 0xffff0000, 0xffff0000, 0xffff0000}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0x000000ff, 0x0000ffff,
0x00ffffff, 0xffffffff},
{0xffffff00, 0xffff0000, 0xff000000, 0x00000000},
{0x0000ffff, 0x0000ffff, 0x0000ffff, 0x00000000},
{0x00000000, 0x00000000, 0x00000000, 0xffffffff},
{0xffff0000, 0xffff0000, 0xffff0000, 0x00000000}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0x0000ffff, 0x00ffffff,
0xffffffff, 0xffffffff},
{0xffff0000, 0xff000000, 0x00000000, 0x00000000},
{0x000000ff, 0x000000ff, 0x000000ff, 0x000000ff},
{0xffffff00, 0xffffff00, 0x00000000, 0x00000000},
{0x00000000, 0x00000000, 0xffffff00, 0xffffff00}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0xffffffff, 0xffffff00,
0xffff0000, 0xff000000},
{0x00000000, 0x000000ff, 0x0000ffff, 0x00ffffff},
{0x00ffffff, 0x00ffffff, 0x00000000, 0x00000000},
{0xff000000, 0xff000000, 0xff000000, 0xff000000},
{0x00000000, 0x00000000, 0x00ffffff, 0x00ffffff}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0xffffffff, 0xffffffff,
0xffffff00, 0xffff0000},
{0x00000000, 0x00000000, 0x000000ff, 0x0000ffff},
{0xffffffff, 0x0000ffff, 0x000000ff, 0x000000ff},
{0x00000000, 0xffff0000, 0x0000ff00, 0x0000ff00},
{0x00000000, 0x00000000, 0xffff0000, 0xffff0000}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0x000000ff, 0x0000ffff,
0x0000ffff, 0x00ffffff},
{0xffffff00, 0xffff0000, 0xffff0000, 0xff000000},
{0xffffffff, 0xffff0000, 0xff000000, 0xff000000},
{0x00000000, 0x0000ffff, 0x00ff0000, 0x00ff0000},
{0x00000000, 0x00000000, 0x0000ffff, 0x0000ffff}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0x0000ffff, 0x00ffffff,
0x00ffffff, 0xffffffff},
{0xffff0000, 0xff000000, 0xff000000, 0x00000000},
{0x000000ff, 0x000000ff, 0x0000ffff, 0xffffffff},
{0x0000ff00, 0x0000ff00, 0xffff0000, 0x00000000},
{0xffff0000, 0xffff0000, 0x00000000, 0x00000000}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0xffffffff, 0xffffff00,
0xffffff00, 0xffff0000},
{0x00000000, 0x000000ff, 0x000000ff, 0x0000ffff},
{0x0000ffff, 0x0000ffff, 0x00000000, 0x00000000},
{0x00ff0000, 0x00ff0000, 0x0000ffff, 0x00000000},
{0xff000000, 0xff000000, 0xffff0000, 0xffffffff}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0xff0000ff, 0xff0000ff,
0xff0000ff, 0xff0000ff},
{0x00ffff00, 0x00ffff00, 0x00ffff00, 0x00ffff00},
{0xff0000ff, 0x00000000, 0x00000000, 0xff0000ff},
{0x00ffff00, 0xff0000ff, 0xff0000ff, 0x00ffff00},
{0x00000000, 0x00ffff00, 0x00ffff00, 0x00000000}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0x0000ffff, 0xff0000ff,
0xff0000ff, 0xffff0000},
{0xffff0000, 0x00ffff00, 0x00ffff00, 0x0000ffff},
{0xffffffff, 0xff0000ff, 0x00000000, 0x00000000},
{0x00000000, 0x00ffff00, 0xff0000ff, 0xff0000ff},
{0x00000000, 0x00000000, 0x00ffff00, 0x00ffff00}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0x00ffffff, 0x000000ff,
0xff000000, 0xffffff00},
{0xff000000, 0xffffff00, 0x00ffffff, 0x000000ff},
{0x0000ffff, 0x00ff0000, 0x00ff0000, 0x0000ffff},
{0x00000000, 0x0000ffff, 0x0000ffff, 0x00000000},
{0xffff0000, 0xff000000, 0xff000000, 0xffff0000}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0xffffffff, 0x00000000,
0x00000000, 0xffffffff},
{0x00000000, 0xffffffff, 0xffffffff, 0x00000000},
{0xff0000ff, 0xff0000ff, 0x00ffff00, 0x00000000},
{0x00ffff00, 0x00ffff00, 0x00000000, 0x00000000},
{0x00000000, 0x00000000, 0xff0000ff, 0xffffffff}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0x000000ff, 0x00ffffff,
0xffffff00, 0xff000000},
{0xffffff00, 0xff000000, 0x000000ff, 0x00ffffff},
{0x0000ffff, 0x000000ff, 0x000000ff, 0x0000ffff},
{0xffff0000, 0x0000ff00, 0x0000ff00, 0xffff0000},
{0x00000000, 0xffff0000, 0xffff0000, 0x00000000}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0x0000ffff, 0x00ffff00,
0x00ffff00, 0xffff0000},
{0xffff0000, 0xff0000ff, 0xff0000ff, 0x0000ffff},
{0xffffffff, 0xffffff00, 0x00000000, 0x00000000},
{0x00000000, 0x00000000, 0xffff0000, 0xff000000},
{0x00000000, 0x000000ff, 0x0000ffff, 0x00ffffff}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0x00ff00ff, 0x00ff00ff,
0x00ff00ff, 0x00ff00ff},
{0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00},
{0xffffffff, 0x00ffffff, 0x00000000, 0x00000000},
{0x00000000, 0x00000000, 0x0000ffff, 0x000000ff},
{0x00000000, 0xff000000, 0xffff0000, 0xffffff00}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0xffffffff, 0x00000000,
0xffffffff, 0x00000000},
{0x00000000, 0xffffffff, 0x00000000, 0xffffffff},
{0x000000ff, 0x0000ffff, 0x0000ffff, 0x0000ffff},
{0x00000000, 0x00000000, 0x00ff0000, 0xffff0000},
{0xffffff00, 0xffff0000, 0xff000000, 0x00000000}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0x00ff00ff, 0xff00ff00,
0x00ff00ff, 0xff00ff00},
{0xff00ff00, 0x00ff00ff, 0xff00ff00, 0x00ff00ff},
{0x0000ffff, 0x0000ffff, 0x0000ffff, 0x000000ff},
{0xffff0000, 0x00ff0000, 0x00000000, 0x00000000},
{0x00000000, 0xff000000, 0xffff0000, 0xffffff00}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0x0000ffff, 0x0000ffff,
0xffff0000, 0xffff0000},
{0xffff0000, 0xffff0000, 0x0000ffff, 0x0000ffff},
{0xff0000ff, 0xff0000ff, 0xff0000ff, 0xff0000ff},
{0x0000ff00, 0x0000ff00, 0x0000ff00, 0x0000ff00},
{0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0x0000ffff, 0xffff0000,
0x0000ffff, 0xffff0000},
{0xffff0000, 0x0000ffff, 0xffff0000, 0x0000ffff},
{0xffffffff, 0x00000000, 0x00000000, 0xffffffff},
{0x00000000, 0xffffffff, 0x00000000, 0x00000000},
{0x00000000, 0x00000000, 0xffffffff, 0x00000000}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0x00ff00ff, 0x00ff00ff,
0xff00ff00, 0xff00ff00},
{0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff},
{0xff0000ff, 0x00ff0000, 0x0000ff00, 0xff0000ff},
{0x0000ff00, 0xff0000ff, 0x00ff0000, 0x0000ff00},
{0x00ff0000, 0x0000ff00, 0xff0000ff, 0x00ff0000}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0xff0000ff, 0x00ffff00,
0xff0000ff, 0x00ffff00},
{0x00ffff00, 0xff0000ff, 0x00ffff00, 0xff0000ff},
{0xff0000ff, 0x0000ff00, 0x00ff0000, 0xff0000ff},
{0x0000ff00, 0x00ff0000, 0xff0000ff, 0x0000ff00},
{0x00ff0000, 0xff0000ff, 0x0000ff00, 0x00ff0000}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0x00ff00ff, 0xff00ff00,
0xff00ff00, 0x00ff00ff},
{0xff00ff00, 0x00ff00ff, 0x00ff00ff, 0xff00ff00},
{0x0000ffff, 0xffff0000, 0x00000000, 0x0000ffff},
{0xffff0000, 0x00000000, 0x0000ffff, 0xffff0000},
{0x00000000, 0x0000ffff, 0xffff0000, 0x00000000}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0x000000ff, 0x0000ffff,
0xffff0000, 0xff000000},
{0xffffff00, 0xffff0000, 0x0000ffff, 0x00ffffff},
{0x0000ffff, 0x00000000, 0xffff0000, 0x0000ffff},
{0xffff0000, 0x0000ffff, 0x00000000, 0xffff0000},
{0x00000000, 0xffff0000, 0x0000ffff, 0x00000000}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0x00ffffff, 0x0000ffff,
0xffff0000, 0xffffff00},
{0xff000000, 0xffff0000, 0x0000ffff, 0x000000ff},
{0x00ff00ff, 0x00ff00ff, 0x00000000, 0x00000000},
{0xff00ff00, 0xff00ff00, 0x00000000, 0x00000000},
{0x00000000, 0x00000000, 0xffffffff, 0xffffffff}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0x0000ffff, 0xff00ffff,
0xffff00ff, 0xffff0000},
{0xffff0000, 0x00ff0000, 0x0000ff00, 0x0000ffff},
{0xffffffff, 0xffffffff, 0x00000000, 0x00000000},
{0x00000000, 0x00000000, 0xff00ff00, 0xff00ff00},
{0x00000000, 0x00000000, 0x00ff00ff, 0x00ff00ff}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0x0000ffff, 0x0000ff00,
0x00ff0000, 0xffff0000},
{0xffff0000, 0xffff00ff, 0xff00ffff, 0x0000ffff},
{0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000},
{0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff},
{0xffff0000, 0xffff0000, 0xffff0000, 0xffff0000}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0xff0000ff, 0x00ffff00,
0x00ffff00, 0xff0000ff},
{0x00ffff00, 0xff0000ff, 0xff0000ff, 0x00ffff00},
{0x0000ffff, 0x0000ffff, 0x0000ffff, 0x0000ffff},
{0x00000000, 0xffff0000, 0x00000000, 0xffff0000},
{0xffff0000, 0x00000000, 0xffff0000, 0x00000000}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0x0000ffff, 0xffff0000,
0xffff0000, 0x0000ffff},
{0xffff0000, 0x0000ffff, 0x0000ffff, 0xffff0000},
{0xff0000ff, 0x00000000, 0xff0000ff, 0x00000000},
{0x00000000, 0xff0000ff, 0x00000000, 0xff0000ff},
{0x00ffff00, 0x00ffff00, 0x00ffff00, 0x00ffff00}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0xff0000ff, 0xff0000ff,
0x00ffff00, 0x00ffff00},
{0x00ffff00, 0x00ffff00, 0xff0000ff, 0xff0000ff},
{0x00ff00ff, 0x00000000, 0x00000000, 0x00ff00ff},
{0xff00ff00, 0x00000000, 0x00000000, 0xff00ff00},
{0x00000000, 0xffffffff, 0xffffffff, 0x00000000}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0xffffffff, 0xff0000ff,
0xff0000ff, 0xffffffff},
{0x00000000, 0x00ffff00, 0x00ffff00, 0x00000000},
{0xffffffff, 0x00000000, 0x00000000, 0x00000000},
{0x00000000, 0xff00ff00, 0xff00ff00, 0xff00ff00},
{0x00000000, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0xffff00ff, 0xff000000,
0xffff00ff, 0xffffffff},
{0x0000ff00, 0x00ffffff, 0x0000ff00, 0x00000000},
{0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00000000},
{0xff00ff00, 0xff00ff00, 0xff00ff00, 0x00000000},
{0x00000000, 0x00000000, 0x00000000, 0xffffffff}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0xff00ffff, 0x000000ff,
0xff00ffff, 0xffffffff},
{0x00ff0000, 0xffffff00, 0x00ff0000, 0x00000000},
{0x000000ff, 0x000000ff, 0x000000ff, 0x000000ff},
{0x00000000, 0xffffff00, 0x00000000, 0xffffff00},
{0xffffff00, 0x00000000, 0xffffff00, 0x00000000}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0xffffffff, 0xff00ffff,
0x000000ff, 0xff00ffff},
{0x00000000, 0x00ff0000, 0xffffff00, 0x00ff0000},
{0x00ffffff, 0x00000000, 0x00ffffff, 0x00000000},
{0x00000000, 0x00ffffff, 0x00000000, 0x00ffffff},
{0xff000000, 0xff000000, 0xff000000, 0xff000000}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0xffffffff, 0xffff00ff,
0xff000000, 0xffff00ff},
{0x00000000, 0x0000ff00, 0x00ffffff, 0x0000ff00},
{0xffffffff, 0x00000000, 0x00000000, 0x00000000},
{0x00000000, 0x00ffff00, 0x00ffff00, 0x00ffff00},
{0x00000000, 0xff0000ff, 0xff0000ff, 0xff0000ff}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0xff0000ff, 0xffff0000,
0x00ffff00, 0x0000ffff},
{0x00ffff00, 0x0000ffff, 0xff0000ff, 0xffff0000},
{0x000000ff, 0x000000ff, 0x000000ff, 0x000000ff},
{0x00000000, 0xffffff00, 0xffffff00, 0x00000000},
{0xffffff00, 0x00000000, 0x00000000, 0xffffff00}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0x0000ffff, 0xff0000ff,
0xffff0000, 0x00ffff00},
{0xffff0000, 0x00ffff00, 0x0000ffff, 0xff0000ff},
{0x00ffffff, 0x00000000, 0x00000000, 0x00ffffff},
{0x00000000, 0x00ffffff, 0x00ffffff, 0x00000000},
{0xff000000, 0xff000000, 0xff000000, 0xff000000}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0xff0000ff, 0x0000ffff,
0x00ffff00, 0xffff0000},
{0x00ffff00, 0xffff0000, 0xff0000ff, 0x0000ffff},
{0xff0000ff, 0xff0000ff, 0xff0000ff, 0x00000000},
{0x00ffff00, 0x00ffff00, 0x00ffff00, 0x00000000},
{0x00000000, 0x00000000, 0x00000000, 0xffffffff}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0x0000ffff, 0x00ffff00,
0xffff0000, 0xff0000ff},
{0xffff0000, 0xff0000ff, 0x0000ffff, 0x00ffff00},
{0xffffffff, 0xffffffff, 0x00000000, 0x00000000},
{0x00000000, 0x00000000, 0x00ffff00, 0x00ffff00},
{0x00000000, 0x00000000, 0xff0000ff, 0xff0000ff}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0xff0000ff, 0xffff0000,
0xffff0000, 0x00ffff00},
{0x00ffff00, 0x0000ffff, 0x0000ffff, 0xff0000ff},
{0xff0000ff, 0xff0000ff, 0x00000000, 0x00000000},
{0x00ffff00, 0x00ffff00, 0x00000000, 0x00000000},
{0x00000000, 0x00000000, 0xffffffff, 0xffffffff}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0xff0000ff, 0x0000ffff,
0x0000ffff, 0x00ffff00},
{0x00ffff00, 0xffff0000, 0xffff0000, 0xff0000ff},
{0x0000ffff, 0x0000ffff, 0x0000ffff, 0x0000ffff},
{0x00000000, 0xffff0000, 0xffff0000, 0x00000000},
{0xffff0000, 0x00000000, 0x00000000, 0xffff0000}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0x000000ff, 0xff000000,
0xffffff00, 0x00ffffff},
{0xffffff00, 0x00ffffff, 0x000000ff, 0xff000000},
{0x0000ffff, 0x00000000, 0x00000000, 0x0000ffff},
{0x00000000, 0x0000ffff, 0x0000ffff, 0x00000000},
{0xffff0000, 0xffff0000, 0xffff0000, 0xffff0000}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0x00ffffff, 0xffffff00,
0xff000000, 0x000000ff},
{0xff000000, 0x000000ff, 0x00ffffff, 0xffffff00},
{0xffffffff, 0xffffffff, 0xffffffff, 0x00000000},
{0x00000000, 0x00000000, 0x00000000, 0x00ffff00},
{0x00000000, 0x00000000, 0x00000000, 0xff0000ff}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0xffffffff, 0x00000000,
0x0000ffff, 0x0000ffff},
{0x00000000, 0xffffffff, 0xffff0000, 0xffff0000},
{0x00ffffff, 0x00ffffff, 0x00ffffff, 0x00ffffff},
{0x00000000, 0xff000000, 0x00000000, 0xff000000},
{0xff000000, 0x00000000, 0xff000000, 0x00000000}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0x0000ffff, 0x0000ffff,
0x00000000, 0xffffffff},
{0xffff0000, 0xffff0000, 0xffffffff, 0x00000000},
{0x000000ff, 0x00000000, 0x000000ff, 0x00000000},
{0x00000000, 0x000000ff, 0x00000000, 0x000000ff},
{0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0xff00ffff, 0xff00ffff,
0xff000000, 0xff000000},
{0x00ff0000, 0x00ff0000, 0x00ffffff, 0x00ffffff},
{0x00ff00ff, 0x00000000, 0x00000000, 0x00000000},
{0xff00ff00, 0x00000000, 0x00000000, 0x00000000},
{0x00000000, 0xffffffff, 0xffffffff, 0xffffffff}},
{/*{0xffffffff,0xffffffff,0xffffffff,0xffffffff},*/ {0xffff00ff, 0xffff00ff,
0x000000ff, 0x000000ff},
{0x0000ff00, 0x0000ff00, 0xffffff00, 0xffffff00},
{0x000000ff, 0x0000ff00, 0x00ff0000, 0xff000000},
{0xffffff00, 0xffff0000, 0xff000000, 0x00000000},
{0x00000000, 0x000000ff, 0x0000ffff, 0x00ffffff}}};
extern const int shorterindex[64][/*6*/ 5] = {
// 1 1 | 2 1 | 2 | 3 1 | 2 | 3 (ordered)
{/*0,*/ /*0,*/ 15, /*0,*/ 3, 15, /*0,*/ 3, 15},
{/*0,*/ /*0,*/ 15, /*0,*/ 3, 8, /*0,*/ 3, 8},
{/*0,*/ /*0,*/ 15, /*0,*/ 15, 8, /*0,*/ 8, 15},
{/*0,*/ /*0,*/ 15, /*0,*/ 15, 3, /*0,*/ 3, 15},
{/*0,*/ /*0,*/ 15, /*0,*/ 8, 15, /*0,*/ 8, 15},
{/*0,*/ /*0,*/ 15, /*0,*/ 3, 15, /*0,*/ 3, 15},
{/*0,*/ /*0,*/ 15, /*0,*/ 15, 3, /*0,*/ 3, 15},
{/*0,*/ /*0,*/ 15, /*0,*/ 15, 8, /*0,*/ 8, 15},
{/*0,*/ /*0,*/ 15, /*0,*/ 8, 15, /*0,*/ 8, 15},
{/*0,*/ /*0,*/ 15, /*0,*/ 8, 15, /*0,*/ 8, 15},
{/*0,*/ /*0,*/ 15, /*0,*/ 6, 15, /*0,*/ 6, 15},
{/*0,*/ /*0,*/ 15, /*0,*/ 6, 15, /*0,*/ 6, 15},
{/*0,*/ /*0,*/ 15, /*0,*/ 6, 15, /*0,*/ 6, 15},
{/*0,*/ /*0,*/ 15, /*0,*/ 5, 15, /*0,*/ 5, 15},
{/*0,*/ /*0,*/ 15, /*0,*/ 3, 15, /*0,*/ 3, 15},
{/*0,*/ /*0,*/ 15, /*0,*/ 3, 8, /*0,*/ 3, 8},
{/*0,*/ /*0,*/ 15, /*0,*/ 3, 15, /*0,*/ 3, 15},
{/*0,*/ /*0,*/ 2, /*0,*/ 3, 8, /*0,*/ 3, 8},
{/*0,*/ /*0,*/ 8, /*0,*/ 8, 15, /*0,*/ 8, 15},
{/*0,*/ /*0,*/ 2, /*0,*/ 15, 3, /*0,*/ 3, 15},
{/*0,*/ /*0,*/ 2, /*0,*/ 3, 15, /*0,*/ 3, 15},
{/*0,*/ /*0,*/ 8, /*0,*/ 3, 8, /*0,*/ 3, 8},
{/*0,*/ /*0,*/ 8, /*0,*/ 6, 15, /*0,*/ 6, 15},
{/*0,*/ /*0,*/ 15, /*0,*/ 10, 8, /*0,*/ 8, 10},
{/*0,*/ /*0,*/ 2, /*0,*/ 5, 3, /*0,*/ 3, 5},
{/*0,*/ /*0,*/ 8, /*0,*/ 8, 15, /*0,*/ 8, 15},
{/*0,*/ /*0,*/ 2, /*0,*/ 8, 6, /*0,*/ 6, 8},
{/*0,*/ /*0,*/ 2, /*0,*/ 6, 10, /*0,*/ 6, 10},
{/*0,*/ /*0,*/ 8, /*0,*/ 8, 15, /*0,*/ 8, 15},
{/*0,*/ /*0,*/ 8, /*0,*/ 5, 15, /*0,*/ 5, 15},
{/*0,*/ /*0,*/ 2, /*0,*/ 15, 10, /*0,*/ 10, 15},
{/*0,*/ /*0,*/ 2, /*0,*/ 15, 8, /*0,*/ 8, 15},
{/*0,*/ /*0,*/ 15, /*0,*/ 8, 15, /*0,*/ 8, 15},
{/*0,*/ /*0,*/ 15, /*0,*/ 15, 3, /*0,*/ 3, 15},
{/*0,*/ /*0,*/ 6, /*0,*/ 3, 15, /*0,*/ 3, 15},
{/*0,*/ /*0,*/ 8, /*0,*/ 5, 10, /*0,*/ 5, 10},
{/*0,*/ /*0,*/ 2, /*0,*/ 6, 10, /*0,*/ 6, 10},
{/*0,*/ /*0,*/ 8, /*0,*/ 10, 8, /*0,*/ 8, 10},
{/*0,*/ /*0,*/ 15, /*0,*/ 8, 9, /*0,*/ 8, 9},
{/*0,*/ /*0,*/ 15, /*0,*/ 15, 10, /*0,*/ 10, 15},
{/*0,*/ /*0,*/ 2, /*0,*/ 15, 6, /*0,*/ 6, 15},
{/*0,*/ /*0,*/ 8, /*0,*/ 3, 15, /*0,*/ 3, 15},
{/*0,*/ /*0,*/ 2, /*0,*/ 15, 8, /*0,*/ 8, 15},
{/*0,*/ /*0,*/ 2, /*0,*/ 5, 15, /*0,*/ 5, 15},
{/*0,*/ /*0,*/ 2, /*0,*/ 15, 3, /*0,*/ 3, 15},
{/*0,*/ /*0,*/ 15, /*0,*/ 15, 6, /*0,*/ 6, 15},
{/*0,*/ /*0,*/ 15, /*0,*/ 15, 6, /*0,*/ 6, 15},
{/*0,*/ /*0,*/ 6, /*0,*/ 15, 8, /*0,*/ 8, 15},
{/*0,*/ /*0,*/ 6, /*0,*/ 3, 15, /*0,*/ 3, 15},
{/*0,*/ /*0,*/ 2, /*0,*/ 15, 3, /*0,*/ 3, 15},
{/*0,*/ /*0,*/ 6, /*0,*/ 5, 15, /*0,*/ 5, 15},
{/*0,*/ /*0,*/ 8, /*0,*/ 5, 15, /*0,*/ 5, 15},
{/*0,*/ /*0,*/ 15, /*0,*/ 5, 15, /*0,*/ 5, 15},
{/*0,*/ /*0,*/ 15, /*0,*/ 8, 15, /*0,*/ 8, 15},
{/*0,*/ /*0,*/ 2, /*0,*/ 5, 15, /*0,*/ 5, 15},
{/*0,*/ /*0,*/ 2, /*0,*/ 10, 15, /*0,*/ 10, 15},
{/*0,*/ /*0,*/ 15, /*0,*/ 5, 15, /*0,*/ 5, 15},
{/*0,*/ /*0,*/ 15, /*0,*/ 10, 15, /*0,*/ 10, 15},
{/*0,*/ /*0,*/ 15, /*0,*/ 8, 15, /*0,*/ 8, 15},
{/*0,*/ /*0,*/ 15, /*0,*/ 13, 15, /*0,*/ 13, 15},
{/*0,*/ /*0,*/ 15, /*0,*/ 15, 3, /*0,*/ 3, 15},
{/*0,*/ /*0,*/ 2, /*0,*/ 12, 15, /*0,*/ 12, 15},
{/*0,*/ /*0,*/ 2, /*0,*/ 3, 15, /*0,*/ 3, 15},
{/*0,*/ /*0,*/ 15, /*0,*/ 3, 8, /*0,*/ 3, 8}};
/* -----------------------------------------------------------------------------
*/
template <const int sets, const int ibits, const int begin>
static void WritePaletteBlock(int partition, Col4 (&idx)[1], Col4& blkl,
Col4& blkh)
{
Col4 iidx = idx[0];
Col4 iblk;
/* none of the cases straddles the lo to hi border, all go into hi
*
* WritePaletteBlock<3, 3, 83>(partition, remapped, blkl, blkh);
* WritePaletteBlock<2, 3, 82>(partition, remapped, blkl, blkh);
* WritePaletteBlock<3, 2, 99>(partition, remapped, blkl, blkh);
* WritePaletteBlock<2, 2, 98>(partition, remapped, blkl, blkh);
* WritePaletteBlock<1, 4, 66>(partition, remapped, blkl, blkh);
* WritePaletteBlock<2, 2, 98>(partition, remapped, blkl, blkh);
*/
assume(partition >= 0 && partition <= 64);
// max 16*4 -> 64bits
iblk = CopyBits<ibits, ibits * 0>(iblk, iidx);
iidx = ShiftRight<8>(iidx);
iblk = CopyBits<ibits, ibits * 1>(iblk, iidx);
iidx = ShiftRight<8>(iidx);
iblk = CopyBits<ibits, ibits * 2>(iblk, iidx);
iidx = ShiftRight<8>(iidx);
iblk = CopyBits<ibits, ibits * 3>(iblk, iidx);
iidx = ShiftRight<8>(iidx);
iblk = CopyBits<ibits, ibits * 4>(iblk, iidx);
iidx = ShiftRight<8>(iidx);
iblk = CopyBits<ibits, ibits * 5>(iblk, iidx);
iidx = ShiftRight<8>(iidx);
iblk = CopyBits<ibits, ibits * 6>(iblk, iidx);
iidx = ShiftRight<8>(iidx);
iblk = CopyBits<ibits, ibits * 7>(iblk, iidx);
iidx = ShiftRight<8>(iidx);
iblk = CopyBits<ibits, ibits * 8>(iblk, iidx);
iidx = ShiftRight<8>(iidx);
iblk = CopyBits<ibits, ibits * 9>(iblk, iidx);
iidx = ShiftRight<8>(iidx);
iblk = CopyBits<ibits, ibits * 10>(iblk, iidx);
iidx = ShiftRight<8>(iidx);
iblk = CopyBits<ibits, ibits * 11>(iblk, iidx);
iidx = ShiftRight<8>(iidx);
iblk = CopyBits<ibits, ibits * 12>(iblk, iidx);
iidx = ShiftRight<8>(iidx);
iblk = CopyBits<ibits, ibits * 13>(iblk, iidx);
iidx = ShiftRight<8>(iidx);
iblk = CopyBits<ibits, ibits * 14>(iblk, iidx);
iidx = ShiftRight<8>(iidx);
iblk = CopyBits<ibits, ibits * 15>(iblk, iidx); // dx = ShiftRight<8>(iidx);
// one bit is omited per set, so it's one instruction per set + 1
switch (sets)
{
case 1:
{
// always index 0
blkh = CopyBits<ibits * 1 - 1, begin - 64 + 0>(blkh, iblk);
iblk = ShiftRightHalf<ibits * 1>(iblk);
blkh = CopyBits<ibits * 15 + 0, begin - 64 + ibits - 1>(blkh, iblk);
// iblk = ShiftRightHalf<ibits * 15>(iblk);
}
break;
case 2:
{
// always index 0
blkh = CopyBits<ibits * 1 - 1, begin - 64 + 0>(blkh, iblk);
iblk = ShiftRightHalf<ibits * 1>(iblk);
blkh = CopyBits<ibits * 15 + 0, begin - 64 + ibits - 1>(blkh, iblk);
// iblk = ShiftRightHalf<ibits * 15>(iblk);
// if it's not the last bit which is cut (low probability)
int len, bgn = begin - 64;
if ((len = shorterindex[partition][0]) < 15)
{
len = (len * ibits) + ibits;
bgn = (bgn + len - 2);
// subtract the already conducted shifts
iblk = ShiftRightHalf(iblk, len - ibits);
// remaining length can be anything, length overflow is silent
blkh = CopyBits(blkh, iblk, ibits * 14, bgn);
// iblk = ShiftRightHalf<ibits * 15>(iblk);
}
}
break;
case 3:
{
// always index 0
blkh = CopyBits<ibits * 1 - 1, begin - 64 + 0>(blkh, iblk);
iblk = ShiftRightHalf<ibits * 1>(iblk);
blkh = CopyBits<ibits * 15 + 0, begin - 64 + ibits - 1>(blkh, iblk);
// iblk = ShiftRightHalf<ibits * 15>(iblk);
int bgn = begin - 64;
int fln, fbn;
fln = shorterindex[partition][3];
{
fln = (fln * ibits) + ibits;
fbn = (bgn + fln - 2);
// subtract the already conducted shifts
iblk = ShiftRightHalf(iblk, fln - ibits);
// remaining length can be anything, length overflow is silent
blkh = CopyBits(blkh, iblk, ibits * 14, fbn);
// iblk = ShiftRightHalf(iblk, ibits * 15);
}
// if it's not the last bit which is cut (low probability)
int sln, sbn;
if ((sln = shorterindex[partition][4]) < 15)
{
sln = (sln * ibits) + ibits;
sbn = (bgn + sln - 3);
// subtract the already conducted shifts
iblk = ShiftRightHalf(iblk, sln - fln);
// remaining length can be anything, length overflow is silent
blkh = CopyBits(blkh, iblk, ibits * 14, sbn);
// iblk = ShiftRightHalf(iblk, ibits * 15);
}
}
break;
}
}
template <const int sets, const int ibits, const int abits, const int begin>
static void WritePaletteBlock(int partition, Col4 (&idx)[2], Col4& blkl,
Col4& blkh)
{
#define fbits \
(ibits < abits \
? ibits \
: abits) // index-block of smaller number of index-bits leads (first)
#define sbits \
(ibits > abits \
? ibits \
: abits) // index-block of larger number of index-bits follows (second)
Col4 fblk, sblk;
Col4 iidx = idx[0];
Col4 aidx = idx[1];
Col4 iblk;
Col4 ablk;
/* two of the cases straddle the lo to hi border
*
* WritePaletteBlock<1, 2,3, 50>(0, remapped, blkl, blkh);
* WritePaletteBlock<1, 3,2, 50>(0, remapped, blkl, blkh);
* WritePaletteBlock<1, 2,2, 66>(0, remapped, blkl, blkh);
*
* one set only
*/
assume(partition >= 0 && partition <= 64);
// max 16*3 -> 48bits
iblk = CopyBits<ibits, ibits * 0>(iblk, iidx);
iidx = ShiftRight<8>(iidx);
iblk = CopyBits<ibits, ibits * 1>(iblk, iidx);
iidx = ShiftRight<8>(iidx);
iblk = CopyBits<ibits, ibits * 2>(iblk, iidx);
iidx = ShiftRight<8>(iidx);
iblk = CopyBits<ibits, ibits * 3>(iblk, iidx);
iidx = ShiftRight<8>(iidx);
iblk = CopyBits<ibits, ibits * 4>(iblk, iidx);
iidx = ShiftRight<8>(iidx);
iblk = CopyBits<ibits, ibits * 5>(iblk, iidx);
iidx = ShiftRight<8>(iidx);
iblk = CopyBits<ibits, ibits * 6>(iblk, iidx);
iidx = ShiftRight<8>(iidx);
iblk = CopyBits<ibits, ibits * 7>(iblk, iidx);
iidx = ShiftRight<8>(iidx);
iblk = CopyBits<ibits, ibits * 8>(iblk, iidx);
iidx = ShiftRight<8>(iidx);
iblk = CopyBits<ibits, ibits * 9>(iblk, iidx);
iidx = ShiftRight<8>(iidx);
iblk = CopyBits<ibits, ibits * 10>(iblk, iidx);
iidx = ShiftRight<8>(iidx);
iblk = CopyBits<ibits, ibits * 11>(iblk, iidx);
iidx = ShiftRight<8>(iidx);
iblk = CopyBits<ibits, ibits * 12>(iblk, iidx);
iidx = ShiftRight<8>(iidx);
iblk = CopyBits<ibits, ibits * 13>(iblk, iidx);
iidx = ShiftRight<8>(iidx);
iblk = CopyBits<ibits, ibits * 14>(iblk, iidx);
iidx = ShiftRight<8>(iidx);
iblk = CopyBits<ibits, ibits * 15>(iblk, iidx); // dx = ShiftRight<8>(iidx);
// max 16*3 -> 48bits
ablk = CopyBits<abits, abits * 0>(ablk, aidx);
aidx = ShiftRight<8>(aidx);
ablk = CopyBits<abits, abits * 1>(ablk, aidx);
aidx = ShiftRight<8>(aidx);
ablk = CopyBits<abits, abits * 2>(ablk, aidx);
aidx = ShiftRight<8>(aidx);
ablk = CopyBits<abits, abits * 3>(ablk, aidx);
aidx = ShiftRight<8>(aidx);
ablk = CopyBits<abits, abits * 4>(ablk, aidx);
aidx = ShiftRight<8>(aidx);
ablk = CopyBits<abits, abits * 5>(ablk, aidx);
aidx = ShiftRight<8>(aidx);
ablk = CopyBits<abits, abits * 6>(ablk, aidx);
aidx = ShiftRight<8>(aidx);
ablk = CopyBits<abits, abits * 7>(ablk, aidx);
aidx = ShiftRight<8>(aidx);
ablk = CopyBits<abits, abits * 8>(ablk, aidx);
aidx = ShiftRight<8>(aidx);
ablk = CopyBits<abits, abits * 9>(ablk, aidx);
aidx = ShiftRight<8>(aidx);
ablk = CopyBits<abits, abits * 10>(ablk, aidx);
aidx = ShiftRight<8>(aidx);
ablk = CopyBits<abits, abits * 11>(ablk, aidx);
aidx = ShiftRight<8>(aidx);
ablk = CopyBits<abits, abits * 12>(ablk, aidx);
aidx = ShiftRight<8>(aidx);
ablk = CopyBits<abits, abits * 13>(ablk, aidx);
aidx = ShiftRight<8>(aidx);
ablk = CopyBits<abits, abits * 14>(ablk, aidx);
aidx = ShiftRight<8>(aidx);
ablk = CopyBits<abits, abits * 15>(ablk, aidx); // dx = ShiftRight<8>(aidx);
// index-block of smaller number of index-bits leads (first)
// index-block of larger number of index-bits follows (second)
fblk = (ibits == fbits ? iblk : ablk);
sblk = (abits == sbits ? ablk : iblk);
// one bit is omited per set, so it's one instruction per set + 1
assume(begin == 50 || begin == 66);
switch (begin)
{
case 50:
{
// always index 0
blkl = CopyBits<fbits * 1 - 1, /*begin*/ 50 - 0 + 0>(blkl, fblk);
fblk = ShiftRightHalf<fbits * 1>(fblk);
blkl = CopyBits<fbits * 15 + 0, /*begin*/ 50 - 0 + fbits - 1>(blkl, fblk);
// block-straddle
fblk = ShiftRightHalf<(64 - /*begin*/ 50) + 1 - fbits>(fblk);
// blkh = MaskBits<fbits * 15 - 15, 64 - 64 >( fblk);
blkh = fblk;
}
break;
case 66:
{
// always index 0
blkh = CopyBits<fbits * 1 - 1, /*begin*/ 66 - 64 + 0>(blkh, fblk);
fblk = ShiftRightHalf<fbits * 1>(fblk);
blkh = CopyBits<fbits * 15 + 0, /*begin*/ 66 - 64 + fbits - 1>(blkh, fblk);
// fblk = ShiftRightHalf<fbits * 15>(fblk);
}
break;
}
// one bit is omited per set, so it's one instruction per set + 1
assume(begin == 50 || begin == 66);
switch (begin)
{
case 50:
case 66:
{
// always index 0
blkh = CopyBits<sbits * 1 - 1, 64 - sbits * 16 + 1>(blkh, sblk);
sblk = ShiftRightHalf<sbits * 1>(sblk);
blkh = CopyBits<sbits * 15 + 0, 64 - sbits * 16 + sbits - 0>(blkh, sblk);
// sblk = ShiftRightHalf<sbits * 15>(sblk);
}
break;
}
#undef fbits
#undef sbits
}
/* -----------------------------------------------------------------------------
*/
#define ihibit (1 << (ibits - 1))
#define ihimsk ((1 << ibits) - 1)
#define ihixor \
Col4((ihimsk << 24) + (ihimsk << 16) + (ihimsk << 8) + (ihimsk << 0))
#define ahibit (1 << (abits - 1))
#define ahimsk ((1 << abits) - 1)
#define ahixor \
Col4((ahimsk << 24) + (ahimsk << 16) + (ahimsk << 8) + (ahimsk << 0))
template <const int set>
static void ExchangeBits(int& sharedbits)
{
const int setbit = (1 << set);
int switched =
((sharedbits & setbit) << SBEND) + ((sharedbits >> SBEND) & setbit);
sharedbits =
(sharedbits & (~((setbit << SBEND) + (setbit << SBSTART)))) + switched;
}
template <const int ibits>
static void RemapPaletteBlock(int partition, Vec4 (&start)[3],
Vec4 (&end)[3], int& sharedbits,
Col4 (&idxs)[1],
std::uint8_t const (&indices)[1][16])
{
#if 0
int masks[4], xors[4] = {0,0,0,0};
palette_set::GetMasks(flags, masks);
/* same for all set 1s */
if (indices[0][ 0 ] & ihibit) {
start[0].SwapXYZW(end[0]); xors[0] = ihimsk; }
/* set 2 */
if (indices[0][shorterindex[partition][1]] & ihibit) {
start[1].SwapXYZW(end[1]); xors[1] = ihimsk; }
/* set 3 */
if (indices[0][shorterindex[partition][2]] & ihibit) {
start[2].SwapXYZW(end[2]); xors[2] = ihimsk; }
/* TODO: 16 bytes fit into one SSE2 register */
for (int i = 0; i < 16; ++i) {
int set =
(((masks[1] >> i) & 1) * 1) +
(((masks[2] >> i) & 1) * 2);
indices[0][i] = indices[0][i] ^ xors[set];
}
#else
Col4 xors = Col4(0);
LoadAligned(idxs[0], indices[0]);
/* same for all set 1s */
if (indices[0][0] & ihibit)
{
start[0].SwapXYZW(end[0]);
ExchangeBits<0>(sharedbits);
xors = Col4(blockxor[partition][2]);
}
/* set 2 */
if (indices[0][shorterindex[partition][1]] & ihibit)
{
start[1].SwapXYZW(end[1]);
ExchangeBits<1>(sharedbits);
xors |= Col4(blockxor[partition][3]);
}
/* set 3 */
if (indices[0][shorterindex[partition][2]] & ihibit)
{
start[2].SwapXYZW(end[2]);
ExchangeBits<2>(sharedbits);
xors |= Col4(blockxor[partition][4]);
}
idxs[0] ^= (xors & ihixor);
#endif
}
template <const int ibits>
static void RemapPaletteBlock(int partition, Vec4 (&start)[2],
Vec4 (&end)[2], int& sharedbits,
Col4 (&idxs)[1],
std::uint8_t const (&indices)[1][16])
{
#if 0
int masks[4], xors[4] = {0,0,0,0};
palette_set::GetMasks(flags, masks);
/* same for all set 1s */
if (indices[0][ 0 ] & ihibit) {
start[0].SwapXYZW(end[0]); xors[0] = ihimsk; }
/* set 2 */
if (indices[0][shorterindex[partition][0]] & ihibit) {
start[1].SwapXYZW(end[1]); xors[1] = ihimsk; }
/* TODO: 16 bytes fit into one SSE2 register */
for (int i = 0; i < 16; ++i) {
int set =
(((masks[1] >> i) & 1) * 1);
indices[0][i] = indices[0][i] ^ xors[set];
}
#else
Col4 xors = Col4(0);
LoadAligned(idxs[0], indices[0]);
/* same for all set 1s */
if (indices[0][0] & ihibit)
{
start[0].SwapXYZW(end[0]);
ExchangeBits<0>(sharedbits);
xors = Col4(blockxor[partition][0]);
}
/* set 2 */
if (indices[0][shorterindex[partition][0]] & ihibit)
{
start[1].SwapXYZW(end[1]);
ExchangeBits<1>(sharedbits);
xors |= Col4(blockxor[partition][1]);
}
idxs[0] ^= (xors & ihixor);
#endif
}
template <const int ibits, const int abits>
static void RemapPaletteBlock(int partition, Vec4 (&start)[1],
Vec4 (&end)[1], int& sharedbits,
Col4 (&idxs)[2],
std::uint8_t const (&indices)[2][16])
{
#if 0
int masks[4], xors[4] = {0,0,0,0};
//palette_set::GetMasks(flags, masks);
/* same for all set 1s */
if (indices[0][ 0 ] & ihibit) {
start[0].SwapXYZ(end[0]); xors[0] = ihibit - 1; }
if (indices[1][ 0 ] & ahibit) {
start[0].SwapW (end[0]); xors[1] = ahibit - 1; }
/* TODO: 16 bytes fit into one SSE2 register */
for (int i = 0; i < 16; ++i) {
int iset = 0;
int aset = 1;
remapped[0][i] = indices[0][i] ^ xors[iset];
remapped[1][i] = indices[1][i] ^ xors[aset];
}
#else
Col4 ixors = Col4(0);
Col4 axors = Col4(0);
LoadAligned(idxs[0], indices[0]);
LoadAligned(idxs[1], indices[1]);
/* same for all set 1s */
if (indices[0][0] & ihibit)
{
start[0].SwapXYZ(end[0]);
ExchangeBits<0>(sharedbits);
ixors = Col4(0xFFFFFFFF);
}
/* same for all set 1s */
if (indices[1][0] & ahibit)
{
start[0].SwapW(end[0]);
ExchangeBits<0>(sharedbits);
axors = Col4(0xFFFFFFFF);
}
idxs[0] ^= (ixors & ihixor);
idxs[1] ^= (axors & ahixor);
#endif
}
template <const int ibits>
static void RemapPaletteBlock(int partition, Vec4 (&start)[1],
Vec4 (&end)[1], int& sharedbits,
Col4 (&idxs)[1],
std::uint8_t const (&indices)[1][16])
{
#if 0
int masks[4], xors[4] = {0,0,0,0};
std::uint8_t const ihibit = 1 << ibits;
//palette_set::GetMasks(flags, masks);
/* same for all set 1s */
if (indices[0][ 0 ] & ihibit) {
start[0].SwapXYZW(end[0]); xors[0] = ihimsk; }
/* TODO: 16 bytes fit into one SSE2 register */
for (int i = 0; i < 16; ++i) {
int set = 0;
indices[0][i] = indices[0][i] ^ xors[set];
}
#else
Col4 xors = Col4(0);
LoadAligned(idxs[0], indices[0]);
/* same for all set 1s */
if (indices[0][0] & ihibit)
{
start[0].SwapXYZW(end[0]);
ExchangeBits<0>(sharedbits);
xors = Col4(0xFFFFFFFF);
}
idxs[0] ^= (xors & ihixor);
#endif
}
#undef ihibit
#undef ihimsk
#undef ihixor
#undef ahibit
#undef ahimsk
#undef ahixor
/* -----------------------------------------------------------------------------
* Remarks
*
* Mode 8 (the least significant bit is set to 0x00) is reserved. Do not use it
* in your encoder. If you pass this mode to the hardware, a block initialized
* to all zeroes is returned.
*
* In BC7, you can encode the alpha component in one of the following ways:
*
* - Block types without explicit alpha component encoding. In these blocks,
* the color endpoints have an RGB-only encoding, with the alpha
* component decoded to 1.0 for all texels.
* - Block types with combined color and alpha components. In these blocks,
* the endpoint color values are specified in the RGBA format, and the alpha
* component values are interpolated along with the color values.
* - Block types with separated color and alpha components. In these blocks
* the color and alpha values are specified separately, each with their own set
* of indices. As a result, they have an effective vector and a scalar
* channel separately encoded, where the vector commonly specifies the
* color channels [R, G, B] and the scalar specifies the alpha channel [A]. To
* support this approach, a separate 2-bit field is provided in the
* encoding, which permits the specification of the separate channel encoding as
* a scalar value. As a result, the block can have one of the following four
* different representations of this alpha encoding (as indicated by
* the 2-bit field):
* + RGB|A: alpha channel separate
* + AGB|R: "red" color channel separate
* + RAB|G: "green" color channel separate
* + RGA|B: "blue" color channel separate
* - The decoder reorders the channel order back to RGBA after decoding, so
* the internal block format is invisible to the developer. Blacks with separate
* color and alpha components also have two sets of index data: one
* for the vectored set of channels, and one for the scalar channel. (In the
* case of Mode 4, these indices are of differing widths [2 or 3 bits]. Mode 4
* also contains a 1-bit selector that specifies whether the vector or the
* scalar channel uses the 3-bit indices.)
*
*/
#define C COLORA
#define U UNIQUE
#define S SHARED
void WritePaletteBlock3_m1(int partition, Vec4 const (&start)[3],
Vec4 const (&end)[3], int sharedbits,
std::uint8_t const (&indices)[1][16], void* block)
{
Vec4 s[3] = {start[0], start[1], start[2]};
Vec4 e[3] = {end[0], end[1], end[2]};
Col4 a[3][FIELDN];
Col4 b[3][FIELDN];
Col4 blkl, blkh;
Col4 idxs[1];
// remap the indices
RemapPaletteBlock<3>(partition, s, e, sharedbits, idxs, indices);
// get the packed values
#if defined(FEATURE_SHAREDBITS_TRIALS) && \
(FEATURE_SHAREDBITS_TRIALS >= SHAREDBITS_TRIAL_LOWPRC)
if ((FEATURE_SHAREDBITS_TRIALS == SHAREDBITS_TRIAL_ALL) || (~sharedbits))
{
FloatTo<4, 4, 4, 0, 1, 0>(s, a, sharedbits >> SBSTART);
FloatTo<4, 4, 4, 0, 1, 0>(e, b, sharedbits >> SBEND);
}
else
#endif
{
FloatTo<4, 4, 4, 0, 1, 0>(s, a);
FloatTo<4, 4, 4, 0, 1, 0>(e, b);
FloatTo<4, 4, 4, 0, 1, 0>(a, b); // rounded shared bits
}
// 4 bits set 1/2/3 red/green/blue start/stop
a[0][C] |= (b[0][C] <<= 4);
a[1][C] |= (b[1][C] <<= 4);
a[2][C] |= (b[2][C] <<= 4);
// 8 bits set 1/2/3 red/green/blue start/stop
a[0][C] |= (a[1][C] <<= 8);
a[0][C] |= (a[2][C] <<= 16);
/* ..............................................................................................
* http://msdn.microsoft.com/en-us/library/hh308954%28v=vs.85%29
*
* BC7 Mode 0 has the following characteristics:
*
* Color components only (no alpha)
* 3 subsets per block
* RGBP 4.4.4.1 endpoints with a unique P-bit per endpoint
* 3-bit indices
* 16 partitions
*
* [ 1 ]
* [ 4 bit partition ]
* [ 4 bits R0 ][ 4 bits R1 }[ 4 bits R2 ][ 4 bits R3 ][ 4 bits R4 ][ 4 bits
* R5 ] [ 4 bits G0 ][ 4 bits G1 }[ 4 bits G2 ][ 4 bits G3 ][ 4 bits G4 ][ 4
* bits G5 ] [ 4 bits B0 ][ 4 bits B1 }[ 4 bits B2 ][ 4 bits B3 ][ 4 bits B4
* ][ 4 bits B5 ] [ 1 bit P0 ][ 1 bit P1 ][ 1 bit P2 ][ 1 bit P3 ][ 1 bit P4
* ][ 1 bit P5 ] [ 45 bits index
* ................................................................... ]
*/
blkl =
blkl.SetLong((partition << 1) + (1 << 0)); // 1 mode bit, 4 partition bits
blkl = CopyBits<24, 5 - 0>(blkl, a[0][C]); // 24 bits set 1-3 red start/stop
blkl = CopyBits<24, 29 - 0>(
blkl, ShiftRight<32>(a[0][C])); // 24 bits set 1-3 green start/stop
blkl = CopyBits<11, 53 - 0>(
blkl, ShiftRight<64>(a[0][C])); // 11 bits set 1-3 blue start/stop
blkh = MaskBits<13, 64 - 64>(
ShiftRight<75>(a[0][C])); // 13 bits set 1-3 blue start/stop
blkh = CopyBits<1, 77 - 64>(blkh, a[0][U]); // 1 bits set 1 unique start
blkh = CopyBits<1, 78 - 64>(blkh, b[0][U]); // 1 bits set 1 unique stop
blkh = CopyBits<1, 79 - 64>(blkh, a[1][U]); // 1 bits set 2 unique start
blkh = CopyBits<1, 80 - 64>(blkh, b[1][U]); // 1 bits set 2 unique stop
blkh = CopyBits<1, 81 - 64>(blkh, a[2][U]); // 1 bits set 3 unique start
blkh = CopyBits<1, 82 - 64>(blkh, b[2][U]); // 1 bits set 3 unique stop
// 128 - 83 -> 45 index bits + 3 bit from 3 set start/end order -> 16 * 3bit
WritePaletteBlock<3, 3, 83>(partition, idxs, blkl, blkh);
/* write out */
StoreUnaligned(blkl, blkh, block);
}
void WritePaletteBlock3_m2(int partition, Vec4 const (&start)[2],
Vec4 const (&end)[2], int sharedbits,
std::uint8_t const (&indices)[1][16], void* block)
{
Vec4 s[2] = {start[0], start[1]};
Vec4 e[2] = {end[0], end[1]};
Col4 a[2][FIELDN];
Col4 b[2][FIELDN];
Col4 blkl, blkh;
Col4 idxs[1];
// remap the indices
RemapPaletteBlock<3>(partition, s, e, sharedbits, idxs, indices);
// get the packed values
#if defined(FEATURE_SHAREDBITS_TRIALS) && \
(FEATURE_SHAREDBITS_TRIALS >= SHAREDBITS_TRIAL_LOWPRC)
if ((FEATURE_SHAREDBITS_TRIALS >= SHAREDBITS_TRIAL_ALL) || (~sharedbits))
{
FloatTo<6, 6, 6, 0, 0, 1>(s, a, sharedbits >> SBSTART);
FloatTo<6, 6, 6, 0, 0, 1>(e, b, sharedbits >> SBSTART);
}
else
#endif
{
FloatTo<6, 6, 6, 0, 0, 1>(s, a);
FloatTo<6, 6, 6, 0, 0, 1>(e, b);
FloatTo<6, 6, 6, 0, 0, 1>(a, b); // rounded shared bits
}
// 6 bits set 1/2 red/green/blue start/stop
a[0][C] |= (b[0][C] <<= 6);
a[1][C] |= (b[1][C] <<= 6);
// 12 bits set 1/2 red/green/blue start/stop
a[0][C] |= (a[1][C] <<= 12);
/* ..............................................................................................
* http://msdn.microsoft.com/en-us/library/hh308954%28v=vs.85%29
*
* BC7 Mode 1 has the following characteristics:
*
* Color components only (no alpha)
* 2 subsets per block
* RGBP 6.6.6.1 endpoints with a shared P-bit per subset)
* 3-bit indices
* 64 partitions
*
* [ 01 ]
* [ 6 bit partition ]
* [ 6 bits R0 ][ 6 bits R1 ][ 6 bits R2 ][ 6 bits R3 ]
* [ 6 bits G0 ][ 6 bits G1 ][ 6 bits G2 ][ 6 bits G3 ]
* [ 6 bits B0 ][ 6 bits B1 ][ 6 bits B2 ][ 6 bits B3 ]
* [ 1 bit P0 ][ 1 bit P1 ]
* [ 46 bits index
* ................................................................... ]
*/
blkl =
blkl.SetLong((partition << 2) + (1 << 1)); // 2 mode bit, 6 partition bits
blkl = CopyBits<24, 8 - 0>(blkl, a[0][C]); // 24 bits set 1-2 red start/stop
blkl = CopyBits<24, 32 - 0>(
blkl, ShiftRight<32>(a[0][C])); // 24 bits set 1-2 green start/stop
blkl = CopyBits<8, 56 - 0>(
blkl, ShiftRight<64>(a[0][C])); // 8 bits set 1-2 blue start/stop
blkh = MaskBits<16, 64 - 64>(
ShiftRight<72>(a[0][C])); // 16 bits set 1-2 blue start/stop
blkh = CopyBits<1, 80 - 64>(blkh, a[0][S]); // 1 bits set 1 shared start/stop
blkh = CopyBits<1, 81 - 64>(blkh, a[1][S]); // 1 bits set 2 shared start/stop
// 128 - 82 -> 46 index bits + 2 bit from 2 set start/end order -> 16 * 3bit
WritePaletteBlock<2, 3, 82>(partition, idxs, blkl, blkh);
/* write out */
StoreUnaligned(blkl, blkh, block);
}
void WritePaletteBlock3_m3(int partition, Vec4 const (&start)[3],
Vec4 const (&end)[3], int sharedbits,
std::uint8_t const (&indices)[1][16], void* block)
{
Vec4 s[3] = {start[0], start[1], start[2]};
Vec4 e[3] = {end[0], end[1], end[2]};
Col4 a[3][FIELDN];
Col4 b[3][FIELDN];
Col4 blkl, blkh;
Col4 idxs[1];
// remap the indices
RemapPaletteBlock<2>(partition, s, e, sharedbits, idxs, indices);
// get the packed values
#if defined(FEATURE_SHAREDBITS_TRIALS) && \
(FEATURE_SHAREDBITS_TRIALS >= SHAREDBITS_TRIAL_ALL)
FloatTo<5, 5, 5, 0, 0, 0>(s, a, ~0);
FloatTo<5, 5, 5, 0, 0, 0>(e, b, ~0);
#else
FloatTo<5, 5, 5, 0, 0, 0>(s, a);
FloatTo<5, 5, 5, 0, 0, 0>(e, b);
FloatTo<5, 5, 5, 0, 0, 0>(a, b); // rounded shared bits
#endif
// 5 bits set 1/2/3 red/green/blue start/stop
a[0][C] |= (b[0][C] <<= 5);
a[1][C] |= (b[1][C] <<= 5);
a[2][C] |= (b[2][C] <<= 5);
// 15 bits set 1/2/3 red/green/blue start/stop
a[0][C] |= (a[1][C] <<= 10);
a[0][C] |= (a[2][C] <<= 20);
/* ..............................................................................................
* http://msdn.microsoft.com/en-us/library/hh308954%28v=vs.85%29
*
* BC7 Mode 2 has the following characteristics:
*
* Color components only (no alpha)
* 3 subsets per block
* RGB 5.5.5 endpoints
* 2-bit indices
* 64 partitions
*
* [ 1 ]
* [ 6 bit partition ]
* [ 5 bits R0 ][ 5 bits R1 ][ 5 bits R2 ][ 5 bits R3 ][ 5 bits R4 ][ 5 bits
* R5 ] [ 5 bits G0 ][ 5 bits G1 ][ 5 bits G2 ][ 5 bits G3 ][ 5 bits G4 ][ 5
* bits G5 ] [ 5 bits B0 ][ 5 bits B1 ][ 5 bits B2 ][ 5 bits B3 ][ 5 bits B4
* ][ 5 bits B5 ] [ 29 bits index
* ................................................................... ]
*/
blkl =
blkl.SetLong((partition << 3) + (1 << 2)); // 3 mode bit, 6 partition bits
blkl = CopyBits<30, 9 - 0>(blkl, a[0][C]); // 30 bits set 1-3 red start/stop
blkl = CopyBits<25, 39 - 0>(
blkl, ShiftRight<32>(a[0][C])); // 25 bits set 1-3 green start/stop
blkh = MaskBits<5, 64 - 64>(
ShiftRight<57>(a[0][C])); // 5 bits set 1-3 green start/stop
blkh = CopyBits<30, 69 - 64>(
blkh, ShiftRight<64>(a[0][C])); // 30 bits set 1-3 blue start/stop
// 128 - 99 -> 29 index bits + 3 bit from 3 set start/end order -> 16 * 2bit
WritePaletteBlock<3, 2, 99>(partition, idxs, blkl, blkh);
/* write out */
StoreUnaligned(blkl, blkh, block);
}
void WritePaletteBlock3_m4(int partition, Vec4 const (&start)[2],
Vec4 const (&end)[2], int sharedbits,
std::uint8_t const (&indices)[1][16], void* block)
{
Vec4 s[2] = {start[0], start[1]};
Vec4 e[2] = {end[0], end[1]};
Col4 a[2][FIELDN];
Col4 b[2][FIELDN];
Col4 blkl, blkh;
Col4 idxs[1];
// remap the indices
RemapPaletteBlock<2>(partition, s, e, sharedbits, idxs, indices);
// get the packed values
#if defined(FEATURE_SHAREDBITS_TRIALS) && \
(FEATURE_SHAREDBITS_TRIALS >= SHAREDBITS_TRIAL_ALL)
if ((FEATURE_SHAREDBITS_TRIALS >= SHAREDBITS_TRIAL_ALL) || (~sharedbits))
{
FloatTo<7, 7, 7, 0, 1, 0>(s, a, sharedbits >> SBSTART);
FloatTo<7, 7, 7, 0, 1, 0>(e, b, sharedbits >> SBEND);
}
else
#endif
{
FloatTo<7, 7, 7, 0, 1, 0>(s, a);
FloatTo<7, 7, 7, 0, 1, 0>(e, b);
FloatTo<7, 7, 7, 0, 1, 0>(a, b); // rounded shared bits
}
// 7 bits set 1/2 red/green/blue start/stop
a[0][C] |= (b[0][C] <<= 7);
a[1][C] |= (b[1][C] <<= 7);
// 14 bits set 1/2 red/green/blue start/stop
a[0][C] |= (a[1][C] <<= 14);
/* ..............................................................................................
* http://msdn.microsoft.com/en-us/library/hh308954%28v=vs.85%29
*
* BC7 Mode 3 has the following characteristics:
*
* Color components only (no alpha)
* 2 subsets per block
* RGBP 7.7.7.1 endpoints with a unique P-bit per subset)
* 2-bit indices
* 64 partitions
*
* [ 001 ]
* [ 6 bit partition ]
* [ 7 bits R0 ][ 7 bits R1 ][ 7 bits R2 ][ 7 bits R3 ]
* [ 7 bits G0 ][ 7 bits G1 ][ 7 bits G2 ][ 7 bits G3 ]
* [ 7 bits B0 ][ 7 bits B1 ][ 7 bits B2 ][ 7 bits B3 ]
* [ 1 bit P0 ][ 1 bit P1 ][ 1 bit P2 ][ 1 bit P3 ]
* [ 30 bits index
* ................................................................... ]
*/
blkl =
blkl.SetLong((partition << 4) + (1 << 3)); // 4 mode bit, 6 partition bits
blkl = CopyBits<28, 10 - 0>(blkl, a[0][C]); // 28 bits set 1-2 red start/stop
blkl = CopyBits<26, 38 - 0>(
blkl, ShiftRight<32>(a[0][C])); // 26 bits set 1-2 green start/stop
blkh = MaskBits<2, 64 - 64>(
ShiftRight<58>(a[0][C])); // 2 bits set 1-2 green start/stop
blkh = CopyBits<28, 66 - 64>(
blkh, ShiftRight<64>(a[0][C])); // 28 bits set 1-2 blue start/stop
blkh = CopyBits<1, 94 - 64>(blkh, a[0][U]); // 1 bits set 1 unique start
blkh = CopyBits<1, 95 - 64>(blkh, b[0][U]); // 1 bits set 1 unique stop
blkh = CopyBits<1, 96 - 64>(blkh, a[1][U]); // 1 bits set 2 unique start
blkh = CopyBits<1, 97 - 64>(blkh, b[1][U]); // 1 bits set 2 unique stop
// 128 - 98 -> 30 index bits + 2 bit from 2 set start/end order -> 16 * 2bit
WritePaletteBlock<2, 2, 98>(partition, idxs, blkl, blkh);
/* write out */
StoreUnaligned(blkl, blkh, block);
}
void WritePaletteBlock4_m5(int r, int ix, Vec4 const (&start)[1],
Vec4 const (&end)[1], int sharedbits,
std::uint8_t const (&indices)[2][16], void* block)
{
Vec4 s[1] = {start[0]};
Vec4 e[1] = {end[0]};
Col4 a[1][FIELDN];
Col4 b[1][FIELDN];
Col4 blkl, blkh;
Col4 idxs[2];
// remap the indices
if (!ix)
RemapPaletteBlock<2, 3>(0, s, e, sharedbits, idxs, indices);
else
RemapPaletteBlock<3, 2>(0, s, e, sharedbits, idxs, indices);
// get the packed values
#if defined(FEATURE_SHAREDBITS_TRIALS) && \
(FEATURE_SHAREDBITS_TRIALS >= SHAREDBITS_TRIAL_ALPHAONLY)
FloatTo<5, 5, 5, 6, 0, 0>(s, a, ~0);
FloatTo<5, 5, 5, 6, 0, 0>(e, b, ~0);
#else
FloatTo<5, 5, 5, 6, 0, 0>(s, a);
FloatTo<5, 5, 5, 6, 0, 0>(e, b);
FloatTo<5, 5, 5, 6, 0, 0>(a, b); // rounded shared bits
#endif
// 5 bits set 1 red/green/blue start/stop
// 6 bits set 1 alpha start/stop
a[0][C] |= (b[0][C] = ShiftLeftLo<5, 5, 5, 6>(b[0][C]));
/* ..............................................................................................
* http://msdn.microsoft.com/en-us/library/hh308954%28v=vs.85%29
*
* BC7 Mode 4 has the following characteristics:
*
* Color components with separate alpha component
* 1 subset per block
* RGB 5.5.5 color endpoints
* 6-bit alpha endpoints
* 16 x 2-bit indices
* 16 x 3-bit indices
* 2-bit component rotation
* 1-bit index selector (whether the 2- or 3-bit indices are used)
*
* [ 00001 ]
* [ 2 bit rotation ]
* [ 1 bit idxMode ]
* [ 5 bits R0 ][ 5 bits R1 ]
* [ 5 bits G0 ][ 5 bits G1 ]
* [ 5 bits B0 ][ 5 bits B1 ]
* [ 6 bits A0 ][ 6 bits A1 ]
* [ 31 bits index ....................................................... ]
* [ 47 bits index
* ................................................................... ]
*/
blkl = blkl.SetLong((ix << 7) + (r << 5) +
(1 << 4)); // 5 mode bit, 2 rotation bits, 1 index bit
blkl = CopyBits<10, 8 - 0>(blkl, a[0][C]); // 10 bits set 1 red start/stop
blkl = CopyBits<10, 18 - 0>(
blkl, ShiftRight<32>(a[0][C])); // 10 bits set 1 green start/stop
blkl = CopyBits<10, 28 - 0>(
blkl, ShiftRight<64>(a[0][C])); // 10 bits set 1 blue start/stop
blkl = CopyBits<12, 38 - 0>(
blkl, ShiftRight<96>(a[0][C])); // 12 bits set 1 alpha start/stop
// 128 - 50 -> 78 index bits -> 31 + 47 index bits + 2 bit from 2 set
// start/end order -> 16 * 2bit + 16 * 3bit
if (!ix)
WritePaletteBlock<1, 2, 3, 50>(0, idxs, blkl, blkh);
else
WritePaletteBlock<1, 3, 2, 50>(0, idxs, blkl, blkh);
/* write out */
StoreUnaligned(blkl, blkh, block);
}
void WritePaletteBlock4_m6(int rotation, Vec4 const (&start)[1],
Vec4 const (&end)[1], int sharedbits,
std::uint8_t const (&indices)[2][16], void* block)
{
Vec4 s[1] = {start[0]};
Vec4 e[1] = {end[0]};
Col4 a[1][FIELDN];
Col4 b[1][FIELDN];
Col4 blkl, blkh;
Col4 idxs[2];
// remap the indices
RemapPaletteBlock<2, 2>(0, s, e, sharedbits, idxs, indices);
// get the packed values
#if defined(FEATURE_SHAREDBITS_TRIALS) && \
(FEATURE_SHAREDBITS_TRIALS >= SHAREDBITS_TRIAL_ALPHAONLY)
FloatTo<7, 7, 7, 8, 0, 0>(s, a, ~0);
FloatTo<7, 7, 7, 8, 0, 0>(e, b, ~0);
#else
FloatTo<7, 7, 7, 8, 0, 0>(s, a);
FloatTo<7, 7, 7, 8, 0, 0>(e, b);
FloatTo<7, 7, 7, 8, 0, 0>(a, b); // rounded shared bits
#endif
// 7 bits set 1 red/green/blue start/stop
// 8 bits set 1 alpha start/stop
a[0][C] |= (b[0][C] = ShiftLeftLo<7, 7, 7, 8>(b[0][C]));
/* ..............................................................................................
* http://msdn.microsoft.com/en-us/library/hh308954%28v=vs.85%29
*
* BC7 Mode 5 has the following characteristics:
*
* Color components with separate alpha component
* 1 subset per block
* RGB 7.7.7 color endpoints
* 6-bit alpha endpoints
* 16 x 2-bit color indices
* 16 x 2-bit alpha indices
* 2-bit component rotation
*
* [ 000001 ]
* [ 2 bit rotation ]
* [ 7 bits R0 ][ 7 bits R1 ]
* [ 7 bits G0 ][ 7 bits G1 ]
* [ 7 bits B0 ][ 7 bits B1 ]
* [ 8 bits A0 ][ 8 bits A1 ]
* [ 31 bits index
* ................................................................... ] [ 31
* bits index
* ................................................................... ]
*/
blkl =
blkl.SetLong((rotation << 6) + (1 << 5)); // 6 mode bit, 2 rotation bits
blkl = CopyBits<14, 8 - 0>(blkl, a[0][C]); // 14 bits set 1 red start/stop
blkl = CopyBits<14, 22 - 0>(
blkl, ShiftRight<32>(a[0][C])); // 14 bits set 1 green start/stop
blkl = CopyBits<14, 36 - 0>(
blkl, ShiftRight<64>(a[0][C])); // 14 bits set 1 blue start/stop
blkl = CopyBits<14, 50 - 0>(
blkl, ShiftRight<96>(a[0][C])); // 14 bits set 1 alpha start/stop
blkh = MaskBits<2, 64 - 64>(
ShiftRight<110>(a[0][C])); // 2 bits set 1 alpha start/stop
// 128 - 66 -> 62 index bits -> 31 + 31 index bits + 2 bit from 2 set
// start/end order -> 16 * 2bit + 16 * 3bit
WritePaletteBlock<1, 2, 2, 66>(0, idxs, blkl, blkh);
/* write out */
StoreUnaligned(blkl, blkh, block);
}
void WritePaletteBlock4_m7(int partition, Vec4 const (&start)[1],
Vec4 const (&end)[1], int sharedbits,
std::uint8_t const (&indices)[1][16], void* block)
{
Vec4 s[1] = {start[0]};
Vec4 e[1] = {end[0]};
Col4 a[1][FIELDN];
Col4 b[1][FIELDN];
Col4 blkl, blkh;
Col4 idxs[1];
// remap the indices
RemapPaletteBlock<4>(partition, s, e, sharedbits, idxs, indices);
// get the packed values
#if defined(FEATURE_SHAREDBITS_TRIALS) && \
(FEATURE_SHAREDBITS_TRIALS >= SHAREDBITS_TRIAL_ALPHAONLYOPAQUE)
if ((FEATURE_SHAREDBITS_TRIALS >= SHAREDBITS_TRIAL_ALL) || (~sharedbits))
{
FloatTo<7, 7, 7, 7, 1, 0>(s, a, sharedbits >> SBSTART);
FloatTo<7, 7, 7, 7, 1, 0>(e, b, sharedbits >> SBEND);
}
else
#endif
{
FloatTo<7, 7, 7, 7, 1, 0>(s, a);
FloatTo<7, 7, 7, 7, 1, 0>(e, b);
FloatTo<7, 7, 7, 7, 1, 0>(a, b); // rounded shared bits
}
// 7 bits set 1 red/green/blue/alpha start/stop
a[0][C] |= (b[0][C] <<= 7);
/* ..............................................................................................
* http://msdn.microsoft.com/en-us/library/hh308954%28v=vs.85%29
*
* BC7 Mode 6 has the following characteristics:
*
* Combined color and alpha components
* One subset per block
* RGBAP 7.7.7.7.1 color (and alpha) endpoints (unique P-bit per endpoint)
* 16 x 4-bit indices
*
* [ 0000001 ]
* [ 4 bit partition ]
* [ 7 bits R0 ][ 7 bits R1 ]
* [ 7 bits G0 ][ 7 bits G1 ]
* [ 7 bits B0 ][ 7 bits B1 ]
* [ 7 bits A0 ][ 7 bits A1 ]
* [ 1 bit P0 ][ 1 bit P1 ]
* [ 63 bits index
* ................................................................... ]
*/
// blkl = blkl.SetLong((partition << 7) + (1 << 6)); // 7 mode bit, 0
// partition bits
blkl = Col4(1 << 6, 0, 0, 0); // 7 mode bit, 0 partition bits
blkl = CopyBits<14, 7 - 0>(blkl, a[0][C]); // 14 bits set 1 red start/stop
blkl = CopyBits<14, 21 - 0>(
blkl, ShiftRight<32>(a[0][C])); // 14 bits set 1 green start/stop
blkl = CopyBits<14, 35 - 0>(
blkl, ShiftRight<64>(a[0][C])); // 14 bits set 1 blue start/stop
blkl = CopyBits<14, 49 - 0>(
blkl, ShiftRight<96>(a[0][C])); // 14 bits set 1 alpha start/stop
blkl = CopyBits<1, 63 - 0>(blkl, a[0][U]); // 1 bits set 1 unique start
blkh = MaskBits<1, 64 - 64>(b[0][U]); // 1 bits set 1 unique stop
// 128 - 65 -> 63 index bits + 1 bit from 1 set start/end order -> 16 * 4bit
WritePaletteBlock<1, 4, 65>(partition, idxs, blkl, blkh);
/* write out */
StoreUnaligned(blkl, blkh, block);
}
void WritePaletteBlock4_m8(int partition, Vec4 const (&start)[2],
Vec4 const (&end)[2], int sharedbits,
std::uint8_t const (&indices)[1][16], void* block)
{
Vec4 s[2] = {start[0], start[1]};
Vec4 e[2] = {end[0], end[1]};
Col4 a[2][FIELDN];
Col4 b[2][FIELDN];
Col4 blkl, blkh;
Col4 idxs[1];
// remap the indices
RemapPaletteBlock<2>(partition, s, e, sharedbits, idxs, indices);
// get the packed values
#if defined(FEATURE_SHAREDBITS_TRIALS) && \
(FEATURE_SHAREDBITS_TRIALS >= SHAREDBITS_TRIAL_ALPHAONLYOPAQUE)
if ((FEATURE_SHAREDBITS_TRIALS >= SHAREDBITS_TRIAL_ALL) || (~sharedbits))
{
FloatTo<5, 5, 5, 5, 1, 0>(s, a, sharedbits >> SBSTART);
FloatTo<5, 5, 5, 5, 1, 0>(e, b, sharedbits >> SBEND);
}
else
#endif
{
FloatTo<5, 5, 5, 5, 1, 0>(s, a);
FloatTo<5, 5, 5, 5, 1, 0>(e, b);
FloatTo<5, 5, 5, 5, 1, 0>(a, b); // rounded shared bits
}
// 5 bits set 1/2 red/green/blue/alpha start/stop
a[0][C] |= (b[0][C] <<= 5);
a[1][C] |= (b[1][C] <<= 5);
// 10 bits set 1/2 red/green/blue/alpha start/stop
a[0][C] |= (a[1][C] <<= 10);
/* ..............................................................................................
* http://msdn.microsoft.com/en-us/library/hh308954%28v=vs.85%29
*
* BC7 Mode 7 has the following characteristics:
*
* Combined color and alpha components
* 2 subsets per block
* RGBAP 5.5.5.5.1 color (and alpha) endpoints (unique P-bit per endpoint)
* 2-bit indices
* 64 partitions
*
* [ 00000001 ]
* [ 6 bit partition ]
* [ 5 bits R0 ][ 5 bits R1 ][ 5 bits R2 ][ 5 bits R3 ]
* [ 5 bits G0 ][ 5 bits G1 ][ 5 bits G2 ][ 5 bits G3 ]
* [ 5 bits B0 ][ 5 bits B1 ][ 5 bits B2 ][ 5 bits B3 ]
* [ 5 bits A0 ][ 5 bits A1 ][ 5 bits A2 ][ 5 bits A3 ]
* [ 1 bit P0 ][ 1 bit P1 ][ 1 bit P2 ][ 1 bit P3 ]
* [ 30 bits index
* ................................................................... ]
*/
blkl =
blkl.SetLong((partition << 8) + (1 << 7)); // 8 mode bit, 6 partition bits
blkl = CopyBits<20, 14 - 0>(blkl, a[0][C]); // 20 bits set 1-2 red start/stop
blkl = CopyBits<20, 34 - 0>(
blkl, ShiftRight<32>(a[0][C])); // 20 bits set 1-2 green start/stop
blkl = CopyBits<10, 54 - 0>(
blkl, ShiftRight<64>(a[0][C])); // 10 bits set 1-2 blue start/stop
blkh = MaskBits<10, 64 - 64>(
ShiftRight<74>(a[0][C])); // 10 bits set 1-2 blue start/stop
blkh = CopyBits<20, 74 - 64>(
blkh, ShiftRight<96>(a[0][C])); // 20 bits set 1-2 alpha start/stop
blkh = CopyBits<1, 94 - 64>(blkh, a[0][U]); // 1 bits set 1 unique start
blkh = CopyBits<1, 95 - 64>(blkh, b[0][U]); // 1 bits set 1 unique stop
blkh = CopyBits<1, 96 - 64>(blkh, a[1][U]); // 1 bits set 2 unique start
blkh = CopyBits<1, 97 - 64>(blkh, b[1][U]); // 1 bits set 2 unique stop
// 128 - 98 -> 30 index bits + 2 bit from 2 set start/end order -> 16 * 2bit
WritePaletteBlock<2, 2, 98>(partition, idxs, blkl, blkh);
/* write out */
StoreUnaligned(blkl, blkh, block);
}
/* *****************************************************************************
*/
extern const std::uint8_t whichsetinpartition[64][/*3*/ 2][16] = {
{/*{0},*/ {0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 1, 1},
{0, 0, 1, 1, 0, 0, 1, 1, 0, 2, 2, 1, 2, 2, 2, 2}},
{/*{0},*/ {0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1},
{0, 0, 0, 1, 0, 0, 1, 1, 2, 2, 1, 1, 2, 2, 2, 1}},
{/*{0},*/ {0, 1, 1, 1, 0, 1, 1, 1, 0, 1, 1, 1, 0, 1, 1, 1},
{0, 0, 0, 0, 2, 0, 0, 1, 2, 2, 1, 1, 2, 2, 1, 1}},
{/*{0},*/ {0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 1, 1, 0, 1, 1, 1},
{0, 2, 2, 2, 0, 0, 2, 2, 0, 0, 1, 1, 0, 1, 1, 1}},
{/*{0},*/ {0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1},
{0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 2, 2, 1, 1, 2, 2}},
{/*{0},*/ {0, 0, 1, 1, 0, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1},
{0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 2, 2, 0, 0, 2, 2}},
{/*{0},*/ {0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1},
{0, 0, 2, 2, 0, 0, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1}},
{/*{0},*/ {0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 1, 1},
{0, 0, 1, 1, 0, 0, 1, 1, 2, 2, 1, 1, 2, 2, 1, 1}},
{/*{0},*/ {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1},
{0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 2}},
{/*{0},*/ {0, 0, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1},
{0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2}},
{/*{0},*/ {0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 1},
{0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2}},
{/*{0},*/ {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1},
{0, 0, 1, 2, 0, 0, 1, 2, 0, 0, 1, 2, 0, 0, 1, 2}},
{/*{0},*/ {0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1},
{0, 1, 1, 2, 0, 1, 1, 2, 0, 1, 1, 2, 0, 1, 1, 2}},
{/*{0},*/ {0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1},
{0, 1, 2, 2, 0, 1, 2, 2, 0, 1, 2, 2, 0, 1, 2, 2}},
{/*{0},*/ {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1},
{0, 0, 1, 1, 0, 1, 1, 2, 1, 1, 2, 2, 1, 2, 2, 2}},
{/*{0},*/ {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1},
{0, 0, 1, 1, 2, 0, 0, 1, 2, 2, 0, 0, 2, 2, 2, 0}},
{/*{0},*/ {0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 1, 0, 1, 1, 1, 1},
{0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 1, 2, 1, 1, 2, 2}},
{/*{0},*/ {0, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0},
{0, 1, 1, 1, 0, 0, 1, 1, 2, 0, 0, 1, 2, 2, 0, 0}},
{/*{0},*/ {0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 1, 0},
{0, 0, 0, 0, 1, 1, 2, 2, 1, 1, 2, 2, 1, 1, 2, 2}},
{/*{0},*/ {0, 1, 1, 1, 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0},
{0, 0, 2, 2, 0, 0, 2, 2, 0, 0, 2, 2, 1, 1, 1, 1}},
{/*{0},*/ {0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0},
{0, 1, 1, 1, 0, 1, 1, 1, 0, 2, 2, 2, 0, 2, 2, 2}},
{/*{0},*/ {0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0, 1, 1, 1, 0},
{0, 0, 0, 1, 0, 0, 0, 1, 2, 2, 2, 1, 2, 2, 2, 1}},
{/*{0},*/ {0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0},
{0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 2, 2, 0, 1, 2, 2}},
{/*{0},*/ {0, 1, 1, 1, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 1},
{0, 0, 0, 0, 1, 1, 0, 0, 2, 2, 1, 0, 2, 2, 1, 0}},
{/*{0},*/ {0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0},
{0, 1, 2, 2, 0, 1, 2, 2, 0, 0, 1, 1, 0, 0, 0, 0}},
{/*{0},*/ {0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0},
{0, 0, 1, 2, 0, 0, 1, 2, 1, 1, 2, 2, 2, 2, 2, 2}},
{/*{0},*/ {0, 1, 1, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 1, 1, 0},
{0, 1, 1, 0, 1, 2, 2, 1, 1, 2, 2, 1, 0, 1, 1, 0}},
{/*{0},*/ {0, 0, 1, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 1, 0, 0},
{0, 0, 0, 0, 0, 1, 1, 0, 1, 2, 2, 1, 1, 2, 2, 1}},
{/*{0},*/ {0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0},
{0, 0, 2, 2, 1, 1, 0, 2, 1, 1, 0, 2, 0, 0, 2, 2}},
{/*{0},*/ {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0},
{0, 1, 1, 0, 0, 1, 1, 0, 2, 0, 0, 2, 2, 2, 2, 2}},
{/*{0},*/ {0, 1, 1, 1, 0, 0, 0, 1, 1, 0, 0, 0, 1, 1, 1, 0},
{0, 0, 1, 1, 0, 1, 2, 2, 0, 1, 2, 2, 0, 0, 1, 1}},
{/*{0},*/ {0, 0, 1, 1, 1, 0, 0, 1, 1, 0, 0, 1, 1, 1, 0, 0},
{0, 0, 0, 0, 2, 0, 0, 0, 2, 2, 1, 1, 2, 2, 2, 1}},
{/*{0},*/ {0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1},
{0, 0, 0, 0, 0, 0, 0, 2, 1, 1, 2, 2, 1, 2, 2, 2}},
{/*{0},*/ {0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1},
{0, 2, 2, 2, 0, 0, 2, 2, 0, 0, 1, 2, 0, 0, 1, 1}},
{/*{0},*/ {0, 1, 0, 1, 1, 0, 1, 0, 0, 1, 0, 1, 1, 0, 1, 0},
{0, 0, 1, 1, 0, 0, 1, 2, 0, 0, 2, 2, 0, 2, 2, 2}},
{/*{0},*/ {0, 0, 1, 1, 0, 0, 1, 1, 1, 1, 0, 0, 1, 1, 0, 0},
{0, 1, 2, 0, 0, 1, 2, 0, 0, 1, 2, 0, 0, 1, 2, 0}},
{/*{0},*/ {0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0},
{0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 2, 0, 0, 0, 0}},
{/*{0},*/ {0, 1, 0, 1, 0, 1, 0, 1, 1, 0, 1, 0, 1, 0, 1, 0},
{0, 1, 2, 0, 1, 2, 0, 1, 2, 0, 1, 2, 0, 1, 2, 0}},
{/*{0},*/ {0, 1, 1, 0, 1, 0, 0, 1, 0, 1, 1, 0, 1, 0, 0, 1},
{0, 1, 2, 0, 2, 0, 1, 2, 1, 2, 0, 1, 0, 1, 2, 0}},
{/*{0},*/ {0, 1, 0, 1, 1, 0, 1, 0, 1, 0, 1, 0, 0, 1, 0, 1},
{0, 0, 1, 1, 2, 2, 0, 0, 1, 1, 2, 2, 0, 0, 1, 1}},
{/*{0},*/ {0, 1, 1, 1, 0, 0, 1, 1, 1, 1, 0, 0, 1, 1, 1, 0},
{0, 0, 1, 1, 1, 1, 2, 2, 2, 2, 0, 0, 0, 0, 1, 1}},
{/*{0},*/ {0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 0, 0, 1, 0, 0, 0},
{0, 1, 0, 1, 0, 1, 0, 1, 2, 2, 2, 2, 2, 2, 2, 2}},
{/*{0},*/ {0, 0, 1, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 1, 0, 0},
{0, 0, 0, 0, 0, 0, 0, 0, 2, 1, 2, 1, 2, 1, 2, 1}},
{/*{0},*/ {0, 0, 1, 1, 1, 0, 1, 1, 1, 1, 0, 1, 1, 1, 0, 0},
{0, 0, 2, 2, 1, 1, 2, 2, 0, 0, 2, 2, 1, 1, 2, 2}},
{/*{0},*/ {0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0},
{0, 0, 2, 2, 0, 0, 1, 1, 0, 0, 2, 2, 0, 0, 1, 1}},
{/*{0},*/ {0, 0, 1, 1, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 1, 1},
{0, 2, 2, 0, 1, 2, 2, 1, 0, 2, 2, 0, 1, 2, 2, 1}},
{/*{0},*/ {0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1},
{0, 1, 0, 1, 2, 2, 2, 2, 2, 2, 2, 2, 0, 1, 0, 1}},
{/*{0},*/ {0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0},
{0, 0, 0, 0, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1}},
{/*{0},*/ {0, 1, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0},
{0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 2, 2, 2, 2}},
{/*{0},*/ {0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0},
{0, 2, 2, 2, 0, 1, 1, 1, 0, 2, 2, 2, 0, 1, 1, 1}},
{/*{0},*/ {0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 1, 0},
{0, 0, 0, 2, 1, 1, 1, 2, 0, 0, 0, 2, 1, 1, 1, 2}},
{/*{0},*/ {0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0},
{0, 0, 0, 0, 2, 1, 1, 2, 2, 1, 1, 2, 2, 1, 1, 2}},
{/*{0},*/ {0, 1, 1, 0, 1, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 1},
{0, 2, 2, 2, 0, 1, 1, 1, 0, 1, 1, 1, 0, 2, 2, 2}},
{/*{0},*/ {0, 0, 1, 1, 0, 1, 1, 0, 1, 1, 0, 0, 1, 0, 0, 1},
{0, 0, 0, 2, 1, 1, 1, 2, 1, 1, 1, 2, 0, 0, 0, 2}},
{/*{0},*/ {0, 1, 1, 0, 0, 0, 1, 1, 1, 0, 0, 1, 1, 1, 0, 0},
{0, 1, 1, 0, 0, 1, 1, 0, 0, 1, 1, 0, 2, 2, 2, 2}},
{/*{0},*/ {0, 0, 1, 1, 1, 0, 0, 1, 1, 1, 0, 0, 0, 1, 1, 0},
{0, 0, 0, 0, 0, 0, 0, 0, 2, 1, 1, 2, 2, 1, 1, 2}},
{/*{0},*/ {0, 1, 1, 0, 1, 1, 0, 0, 1, 1, 0, 0, 1, 0, 0, 1},
{0, 1, 1, 0, 0, 1, 1, 0, 2, 2, 2, 2, 2, 2, 2, 2}},
{/*{0},*/ {0, 1, 1, 0, 0, 0, 1, 1, 0, 0, 1, 1, 1, 0, 0, 1},
{0, 0, 2, 2, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 2, 2}},
{/*{0},*/ {0, 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 1},
{0, 0, 2, 2, 1, 1, 2, 2, 1, 1, 2, 2, 0, 0, 2, 2}},
{/*{0},*/ {0, 0, 0, 1, 1, 0, 0, 0, 1, 1, 1, 0, 0, 1, 1, 1},
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, 1, 2}},
{/*{0},*/ {0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 1, 1, 0, 0, 1, 1},
{0, 0, 0, 2, 0, 0, 0, 1, 0, 0, 0, 2, 0, 0, 0, 1}},
{/*{0},*/ {0, 0, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0},
{0, 2, 2, 2, 1, 2, 2, 2, 0, 2, 2, 2, 1, 2, 2, 2}},
{/*{0},*/ {0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 0, 1, 1, 1, 0},
{0, 1, 0, 1, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}},
{/*{0},*/ {0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 1, 1, 0, 1, 1, 1},
{0, 1, 1, 1, 2, 0, 1, 1, 2, 2, 0, 1, 2, 2, 2, 0}}};
/* -----------------------------------------------------------------------------
*/
template <const int sets, const int ibits, const int begin>
void ReadPaletteBlock(int partition, unsigned int* codes, Col4& blkl,
Col4& blkh, int* out)
{
Col4 iblk;
/* none of the cases straddles the lo to hi border, all go into hi
*
* WritePaletteBlock<3, 3, 83>(partition, remapped, blkl, blkh);
* WritePaletteBlock<2, 3, 82>(partition, remapped, blkl, blkh);
* WritePaletteBlock<3, 2, 99>(partition, remapped, blkl, blkh);
* WritePaletteBlock<2, 2, 98>(partition, remapped, blkl, blkh);
* WritePaletteBlock<1, 4, 65>(partition, remapped, blkl, blkh);
* WritePaletteBlock<2, 2, 98>(partition, remapped, blkl, blkh);
*/
// one bit is omited per set, so it's one instruction per set + 1
assume(sets >= 1 && sets <= 3);
switch (sets)
{
case 1:
{
// always index 0
iblk = ShiftLeftHalf<ibits>(
ExtrBits<ibits * 15 - 0, begin - 64 + ibits * 1 - 1>(blkh)) |
ExtrBits<ibits * 1 - 1, begin - 64 + 0>(blkh);
}
break;
case 2:
{
// always index 0
iblk = ShiftLeftHalf<ibits>(
ExtrBits<ibits * 15 - 0, begin - 64 + ibits * 1 - 1>(blkh)) |
ExtrBits<ibits * 1 - 1, begin - 64 + 0>(blkh);
// if it's not the last bit which is cut (low probability)
int len, bgn = begin - 64;
if ((len = shorterindex[partition][0]) < 15)
{
len = (len * ibits) + ibits;
bgn = (bgn + len - 2);
/* no obvious mask-pattern, set of 9 distinct lens
*
* bgn=83-64 len={2,6,8}*3={6,18,24}+b={ 9,21,27}-1={ 8,20,26};
* bgn=82-64 len={2,6,8}*3={6,18,24}+b={ 9,21,27}-1={ 8,20,26};
* bgn=99-64 len={2,6,8}*2={4,12,16}+b={ 6,14,18}-1={ 5,13,17};
* bgn=98-64 len={2,6,8}*2={4,12,16}+b={ 6,14,18}-1={ 5,13,17};
* bgn=65-64 len={2,6,8}*4={8,24,32}+b={12,32,40}-1={11,31,39};
* bgn=98-64 len={2,6,8}*2={4,12,16}+b={ 6,14,18}-1={ 5,13,17};
*/
// remaining length can be anything, length overflow is silent
blkh = ExtrBits(blkh, ibits * 14, bgn);
// do the whole shift
iblk = ShiftLeftHalf(blkh, len) | MaskBits(iblk, len - 1, 0);
}
}
break;
case 3:
{
iblk = ShiftLeftHalf<ibits>(
ExtrBits<ibits * 15 - 0, begin - 64 + ibits * 1 - 1>(blkh)) |
ExtrBits<ibits * 1 - 1, begin - 64 + 0>(blkh);
int bgn = begin - 64;
int fln, fbn;
fln = shorterindex[partition][3];
{
fln = (fln * ibits) + ibits;
fbn = (bgn + fln - 2);
// remaining length can be anything, length overflow is silent
blkh = ExtrBits(blkh, ibits * 14, fbn);
// do the whole shift
iblk = ShiftLeftHalf(blkh, fln) | MaskBits(iblk, fln - 1, 0);
}
// if it's not the last bit which is cut (low probability)
int sln, sbn;
if ((sln = shorterindex[partition][4]) < 15)
{
sln = (sln * ibits) + ibits;
sbn = (bgn + sln - 3);
// subtract the already conducted shifts
// remaining length can be anything, length overflow is silent
blkh = ExtrBits(blkh, ibits * 14, sbn - fbn);
// do the whole shift
iblk = ShiftLeftHalf(blkh, sln) | MaskBits(iblk, sln - 1, 0);
}
}
break;
}
// store out the palettes
std::uint8_t const* ios =
(sets >= 2 ? whichsetinpartition[partition][sets - 2] : nullptr);
// max 16*4 -> 64bits
// no scattered writes on SSE
// movd: 3clk 1/1, extrq: 2clk 1/2
Col4 c0, c1, c2, c3, c4, c5, c6, c7;
// m1:
// c00 = 0 -> [0][0] -> 95 cd e1 ff, c08 = 6 -> [0][6] -> 80 c3 d0 ff
// c01 = 4 -> [0][4] -> 87 c6 d5 ff, c09 = 4 -> [1][4] -> 79 c3 cb ff
// c02 = 7 -> [0][7] -> 7c c1 cd ff, c10 = 2 -> [1][2] -> 80 c3 cb ff
// c03 = 7 -> [0][7] -> 7c c1 cd ff, c11 = 0 -> [1][0] -> 87 c3 cb ff
// c04 = 2 -> [0][2] -> 8e ca db ff, c12 = 3 -> [1][3] -> 7c c3 cb ff
// c05 = 7 -> [0][7] -> 7c c1 cd ff, c13 = 4 -> [1][4] -> 79 c3 cb ff
// c06 = 6 -> [0][6] -> 80 c3 d0 ff, c14 = 3 -> [1][3] -> 7c c3 cb ff
// c07 = 0 -> [1][0] -> 87 c3 cb ff, c15 = 2 -> [1][2] -> 80 c3 cb ff
// m3:
// c00 = 0 -> [0][0] -> 92 c8 dc ff, c08 = 3 -> [1][3] -> 8c c8 dc ff
// c01 = 2 -> [1][2] -> 8b c6 d9 ff, c09 = 3 -> [1][3] -> 8c c8 dc ff
// c02 = 0 -> [1][0] -> 8a c2 d2 ff, c10 = 2 -> [0][2] -> 87 c4 d4 ff
// c03 = 1 -> [1][1] -> 8b c4 d5 ff, c11 = 3 -> [0][3] -> 82 c2 d0 ff
// c04 = 1 -> [0][1] -> 8d c6 d8 ff, c12 = 3 -> [1][3] -> 8c c8 dc ff
// c05 = 1 -> [0][1] -> 8d c6 d8 ff, c13 = 3 -> [1][3] -> 8c c8 dc ff
// c06 = 1 -> [1][1] -> 8b c4 d5 ff, c14 = 3 -> [1][3] -> 8c c8 dc ff
// c07 = 0 -> [1][0] -> 8a c2 d2 ff, c15 = 3 -> [0][3] -> 82 c2 d0 ff
// m7:
// c00 = 6 -> [-][6] -> cb f1 fa ff, c08 = b -> [-][b] -> d4 f4 fb fe
// DirextXTex seems to be buggy, no transparent alpha allowed! c01 = 5 ->
// [-][5] -> c9 f0 fa ff, c09 = 8 -> [-][8] -> ce f2 fb fe DirextXTex seems
// to be buggy, no transparent alpha allowed! c02 = 0 -> [-][0] -> bf ed f9
// ff, c10 = 3 -> [-][3] -> c5 ef fa ff c03 = 1 -> [-][1] -> c1 ee f9 ff, c11
// = 0 -> [-][0] -> bf ed f9 ff c04 = 7 -> [-][7] -> cd f1 fa ff, c12 = e ->
// [-][e] -> da f5 fc fe DirextXTex seems to be buggy, no transparent alpha
// allowed! c05 = 5 -> [-][5] -> c9 f0 fa ff, c13 = b -> [-][b] -> d4 f4 fb
// fe DirextXTex seems to be buggy, no transparent alpha allowed! c06 = 4 ->
// [-][4] -> c7 ef fa ff, c14 = 6 -> [-][6] -> cb f1 fa ff c07 = 2 -> [-][2]
// -> c3 ee f9 ff, c15 = 0 -> [-][0] -> bf ed f9 ff
// m0:
// c00 = 3 -> [0][3] -> 8c d7 e1 ff, c08 = 5 -> [0][5] -> 8c d3 d7 ff
// c01 = 3 -> [0][3] -> 8c d7 e1 ff, c09 = 6 -> [0][6] -> 8c d0 d3 ff
// c02 = 4 -> [1][4] -> 84 c6 d9 ff, c10 = 0 -> [1][0] -> 84 c6 c6 ff
// c03 = 3 -> [2][3] -> 95 c9 d0 ff, c11 = 0 -> [2][0] -> 84 c6 c6 ff
// c04 = 4 -> [0][4] -> 8c d5 dc ff, c12 = 6 -> [0][6] -> 8c d0 d3 ff
// c05 = 4 -> [0][4] -> 8c d5 dc ff, c13 = 7 -> [0][7] -> 8c ce ce ff
// c06 = 2 -> [1][2] -> 84 c6 cf ff, c14 = 0 -> [1][0] -> 84 c6 c6 ff
// c07 = 0 -> [2][0] -> 84 c6 c6 ff, c15 = 1 -> [2][1] -> 8a c7 c9 ff
// m3:
// c00 = 0 -> [0][0] -> 9c b5 94 ff, c08 = 1 -> [0][1] -> a4 b8 91 ff
// c01 = 1 -> [0][1] -> a4 b8 91 ff, c09 = 3 -> [0][3] -> b5 bd 8c ff
// c02 = 3 -> [2][3] -> ad b5 8c ff, c10 = 3 -> [2][3] -> ad b5 8c ff
// c03 = 1 -> [2][1] -> b2 c0 9d ff, c11 = 2 -> [2][2] -> b0 bb 94 ff
// c04 = 0 -> [0][0] -> 9c b5 94 ff, c12 = 2 -> [1][2] -> aa b2 94 ff
// c05 = 1 -> [0][1] -> a4 b8 91 ff, c13 = 2 -> [1][2] -> aa b2 94 ff
// c06 = 2 -> [2][2] -> b0 bb 94 ff, c14 = 0 -> [1][0] -> 94 ad 94 ff
// c07 = 2 -> [2][2] -> b0 bb 94 ff, c15 = 1 -> [1][1] -> 9f b0 94 ff
// m8:
// c00 = 1 -> [0][1] -> c3 3c 10 ee, c08 = 3 -> [0][3] -> 51 00 00 d3
// c01 = 0 -> [0][0] -> fb 59 18 fb, c09 = 2 -> [1][2] -> 7b 28 0d aa
// c02 = 0 -> [0][0] -> fb 59 18 fb, c10 = 1 -> [1][1] -> b5 4d 17 cf
// c03 = 1 -> [0][1] -> c3 3c 10 ee, c11 = 0 -> [1][0] -> eb 71 20 f3
// c04 = 2 -> [0][2] -> 89 1d 08 e0, c12 = 3 -> [1][3] -> 45 04 04 86
// c05 = 1 -> [0][1] -> c3 3c 10 ee, c13 = 3 -> [1][3] -> 45 04 04 86
// c06 = 0 -> [0][0] -> fb 59 18 fb, c14 = 3 -> [1][3] -> 45 04 04 86
// c07 = 0 -> [1][0] -> eb 71 20 f3, c15 = 1 -> [1][1] -> b5 4d 17 cf
c0 = ExtrBits<ibits, ibits * 0>(iblk);
c1 = ExtrBits<ibits, ibits * 1>(iblk);
c2 = ExtrBits<ibits, ibits * 2>(iblk);
c3 = ExtrBits<ibits, ibits * 3>(iblk);
c4 = ExtrBits<ibits, ibits * 4>(iblk);
c5 = ExtrBits<ibits, ibits * 5>(iblk);
c6 = ExtrBits<ibits, ibits * 6>(iblk);
c7 = ExtrBits<ibits, ibits * 7>(iblk);
out[0] = codes[(sets >= 2 ? ios[0] << ibits : 0) + c0.GetLong()];
out[1] = codes[(sets >= 2 ? ios[1] << ibits : 0) + c1.GetLong()];
out[2] = codes[(sets >= 2 ? ios[2] << ibits : 0) + c2.GetLong()];
out[3] = codes[(sets >= 2 ? ios[3] << ibits : 0) + c3.GetLong()];
out[4] = codes[(sets >= 2 ? ios[4] << ibits : 0) + c4.GetLong()];
out[5] = codes[(sets >= 2 ? ios[5] << ibits : 0) + c5.GetLong()];
out[6] = codes[(sets >= 2 ? ios[6] << ibits : 0) + c6.GetLong()];
out[7] = codes[(sets >= 2 ? ios[7] << ibits : 0) + c7.GetLong()];
c0 = ExtrBits<ibits, ibits * 8>(iblk);
c1 = ExtrBits<ibits, ibits * 9>(iblk);
c2 = ExtrBits<ibits, ibits * 10>(iblk);
c3 = ExtrBits<ibits, ibits * 11>(iblk);
c4 = ExtrBits<ibits, ibits * 12>(iblk);
c5 = ExtrBits<ibits, ibits * 13>(iblk);
c6 = ExtrBits<ibits, ibits * 14>(iblk);
c7 = ExtrBits<ibits, ibits * 15>(iblk);
out[8] = codes[(sets >= 2 ? ios[8] << ibits : 0) + c0.GetLong()];
out[9] = codes[(sets >= 2 ? ios[9] << ibits : 0) + c1.GetLong()];
out[10] = codes[(sets >= 2 ? ios[10] << ibits : 0) + c2.GetLong()];
out[11] = codes[(sets >= 2 ? ios[11] << ibits : 0) + c3.GetLong()];
out[12] = codes[(sets >= 2 ? ios[12] << ibits : 0) + c4.GetLong()];
out[13] = codes[(sets >= 2 ? ios[13] << ibits : 0) + c5.GetLong()];
out[14] = codes[(sets >= 2 ? ios[14] << ibits : 0) + c6.GetLong()];
out[15] = codes[(sets >= 2 ? ios[15] << ibits : 0) + c7.GetLong()];
}
template <const int sets, const int ibits, const int abits, const int begin>
void ReadPaletteBlock(int partition, unsigned int* icodes, unsigned int* acodes,
Col4& blkl, Col4& blkh, int* out)
{
#define fbits \
(ibits < abits \
? ibits \
: abits) // index-block of smaller number of index-bits leads (first)
#define sbits \
(ibits > abits \
? ibits \
: abits) // index-block of larger number of index-bits follows (second)
Col4 fblk, sblk;
Col4 iblk, ablk;
/* none of the cases straddles the lo to hi border, all go into hi
*
* WritePaletteBlock<1, 2,3, 50>(0, remapped, blkl, blkh);
* WritePaletteBlock<1, 3,2, 50>(0, remapped, blkl, blkh);
* WritePaletteBlock<1, 2,2, 66>(0, remapped, blkl, blkh);
*
*/
// one bit is omited per set, so it's one instruction per set + 1
switch (begin)
{
case 50:
{
// always index 0
fblk = ShiftLeftHalf<fbits>(
ExtrBits<fbits * 15 - 0, /*begin*/ 50 - 0 + fbits * 1 - 1>(blkl)) |
ExtrBits<fbits * 1 - 1, /*begin*/ 50 - 0 + 0>(blkl);
sblk =
ShiftLeftHalf<sbits>(
ExtrBits<sbits * 15 - 0,
/*begin*/ 50 - 64 + fbits * 16 - 1 + sbits * 1 - 1>(blkh)) |
ExtrBits<sbits * 1 - 1, /*begin*/ 50 - 64 + fbits * 16 - 1 + 0>(blkh);
// i-index block straddles 64bit border
fblk = CopyBits<fbits * 15 - 0, (64 - /*begin*/ 50) + 1>(fblk, blkh);
}
break;
case 66:
{
// always index 0
fblk =
ShiftLeftHalf<fbits>(
ExtrBits<fbits * 15 - 0, /*begin*/ 66 - 64 + fbits * 1 - 1>(blkh)) |
ExtrBits<fbits * 1 - 1, /*begin*/ 66 - 64 + 0>(blkh);
sblk =
ShiftLeftHalf<sbits>(
ExtrBits<sbits * 15 - 0,
/*begin*/ 66 - 64 + fbits * 16 - 1 + sbits * 1 - 1>(blkh)) |
ExtrBits<sbits * 1 - 1, /*begin*/ 66 - 64 + fbits * 16 - 1 + 0>(blkh);
}
break;
}
// index-block of smaller number of index-bits leads (first)
// index-block of larger number of index-bits follows (second)
iblk = (ibits == fbits ? fblk : sblk);
ablk = (abits == sbits ? sblk : fblk);
// max 16*4 -> 64bits
// no scattered writes on SSE
// movd: 3clk 1/1, extrq: 2clk 1/2
Col4 c0, c1, c2, c3, a0, a1, a2, a3;
// m5:
// c00 = 0 -> [-][0] -> , c08 = 1 -> [-][2] ->
// a00 = 0 -> [-][0] -> e7 d6 9c ff, a08 = 1 -> [-][1] -> ee d8 90 ff
// c01 = 1 -> [-][1] -> , c09 = 3 -> [-][2] ->
// a01 = 1 -> [-][0] -> e7 d7 96 ff, a09 = 3 -> [-][1] -> ee d8 90 ff
// c02 = 3 -> [-][3] -> , c10 = 3 -> [-][4] ->
// a02 = 3 -> [-][0] -> e7 d9 8b ff, a10 = 3 -> [-][1] -> ee db 84 ff
// c03 = 1 -> [-][4] -> , c11 = 2 -> [-][4] ->
// a03 = 1 -> [-][1] -> ee db 84 ff, a11 = 2 -> [-][2] -> f4 db 84 ff
// c04 = 0 -> [-][2] -> , c12 = 2 -> [-][3] ->
// a04 = 0 -> [-][0] -> e7 d8 90 ff, a12 = 2 -> [-][1] -> ee d9 8b ff
// c05 = 1 -> [-][3] -> , c13 = 2 -> [-][3] ->
// a05 = 1 -> [-][0] -> e7 d9 8b ff, a13 = 2 -> [-][1] -> ee d9 8b ff
// c06 = 2 -> [-][3] -> , c14 = 0 -> [-][4] ->
// a06 = 2 -> [-][0] -> e7 d9 8b ff, a14 = 0 -> [-][2] -> f4 db 84 ff
// c07 = 2 -> [-][2] -> , c15 = 1 -> [-][4] ->
// a07 = 2 -> [-][2] -> f4 d8 90 ff, a15 = 1 -> [-][3] -> fb db 84 ff
// m6:
// c00 = 0 -> [-][0] -> , c08 = 1 -> [-][0] ->
// a00 = 0 -> [-][0] -> 00 00 00 00, a08 = 1 -> [-][0] -> 00 00 00 00
// c01 = 1 -> [-][0] -> , c09 = 3 -> [-][0] ->
// a01 = 1 -> [-][0] -> 00 00 00 00, a09 = 3 -> [-][0] -> 00 00 00 00
// c02 = 3 -> [-][0] -> , c10 = 3 -> [-][0] ->
// a02 = 3 -> [-][0] -> 00 00 00 00, a10 = 3 -> [-][0] -> 00 00 00 00
// c03 = 1 -> [-][0] -> , c11 = 2 -> [-][0] ->
// a03 = 1 -> [-][0] -> 00 00 00 00, a11 = 2 -> [-][0] -> 00 00 00 00
// c04 = 0 -> [-][0] -> , c12 = 2 -> [-][3] ->
// a04 = 0 -> [-][0] -> 00 00 00 00, a12 = 2 -> [-][3] -> 0b 00 00 0a
// c05 = 1 -> [-][0] -> , c13 = 2 -> [-][1] ->
// a05 = 1 -> [-][0] -> 00 00 00 00, a13 = 2 -> [-][1] -> 04 00 00 03
// c06 = 2 -> [-][0] -> , c14 = 0 -> [-][0] ->
// a06 = 2 -> [-][0] -> 00 00 00 00, a14 = 0 -> [-][0] -> 00 00 00 00
// c07 = 2 -> [-][0] -> , c15 = 1 -> [-][0] ->
// a07 = 2 -> [-][0] -> 00 00 00 00, a15 = 1 -> [-][0] -> 00 00 00 00
c0 = ExtrBits<ibits, ibits * 0>(iblk);
a0 = ExtrBits<abits, abits * 0>(ablk);
c1 = ExtrBits<ibits, ibits * 1>(iblk);
a1 = ExtrBits<abits, abits * 1>(ablk);
c2 = ExtrBits<ibits, ibits * 2>(iblk);
a2 = ExtrBits<abits, abits * 2>(ablk);
c3 = ExtrBits<ibits, ibits * 3>(iblk);
a3 = ExtrBits<abits, abits * 3>(ablk);
out[0] = icodes[0 + c0.GetLong()] + acodes[0 + a0.GetLong()];
out[1] = icodes[0 + c1.GetLong()] + acodes[0 + a1.GetLong()];
out[2] = icodes[0 + c2.GetLong()] + acodes[0 + a2.GetLong()];
out[3] = icodes[0 + c3.GetLong()] + acodes[0 + a3.GetLong()];
c0 = ExtrBits<ibits, ibits * 4>(iblk);
a0 = ExtrBits<abits, abits * 4>(ablk);
c1 = ExtrBits<ibits, ibits * 5>(iblk);
a1 = ExtrBits<abits, abits * 5>(ablk);
c2 = ExtrBits<ibits, ibits * 6>(iblk);
a2 = ExtrBits<abits, abits * 6>(ablk);
c3 = ExtrBits<ibits, ibits * 7>(iblk);
a3 = ExtrBits<abits, abits * 7>(ablk);
out[4] = icodes[0 + c0.GetLong()] + acodes[0 + a0.GetLong()];
out[5] = icodes[0 + c1.GetLong()] + acodes[0 + a1.GetLong()];
out[6] = icodes[0 + c2.GetLong()] + acodes[0 + a2.GetLong()];
out[7] = icodes[0 + c3.GetLong()] + acodes[0 + a3.GetLong()];
c0 = ExtrBits<ibits, ibits * 8>(iblk);
a0 = ExtrBits<abits, abits * 8>(ablk);
c1 = ExtrBits<ibits, ibits * 9>(iblk);
a1 = ExtrBits<abits, abits * 9>(ablk);
c2 = ExtrBits<ibits, ibits * 10>(iblk);
a2 = ExtrBits<abits, abits * 10>(ablk);
c3 = ExtrBits<ibits, ibits * 11>(iblk);
a3 = ExtrBits<abits, abits * 11>(ablk);
out[8] = icodes[0 + c0.GetLong()] + acodes[0 + a0.GetLong()];
out[9] = icodes[0 + c1.GetLong()] + acodes[0 + a1.GetLong()];
out[10] = icodes[0 + c2.GetLong()] + acodes[0 + a2.GetLong()];
out[11] = icodes[0 + c3.GetLong()] + acodes[0 + a3.GetLong()];
c0 = ExtrBits<ibits, ibits * 12>(iblk);
a0 = ExtrBits<abits, abits * 12>(ablk);
c1 = ExtrBits<ibits, ibits * 13>(iblk);
a1 = ExtrBits<abits, abits * 13>(ablk);
c2 = ExtrBits<ibits, ibits * 14>(iblk);
a2 = ExtrBits<abits, abits * 14>(ablk);
c3 = ExtrBits<ibits, ibits * 15>(iblk);
a3 = ExtrBits<abits, abits * 15>(ablk);
out[12] = icodes[0 + c0.GetLong()] + acodes[0 + a0.GetLong()];
out[13] = icodes[0 + c1.GetLong()] + acodes[0 + a1.GetLong()];
out[14] = icodes[0 + c2.GetLong()] + acodes[0 + a2.GetLong()];
out[15] = icodes[0 + c3.GetLong()] + acodes[0 + a3.GetLong()];
#undef fbits
#undef sbits
}
/* -----------------------------------------------------------------------------
*/
void ReadPaletteBlock3_m1(std::uint8_t* rgba, void const* block)
{
// get the packed values
Col4 a[3][FIELDN];
Col4 b[3][FIELDN];
Col4 blkl, blkh;
// remap the indices
unsigned int codes[3][1 << 3];
int partition;
/* read in */
LoadUnaligned(blkl, blkh, block);
// 1 mode bit, 4 partition bits
partition = ExtrBits<4, 1 - 0>(blkl).GetLong();
// b2 -> set 3 stop {0x0000000a, 0x0000000c, 0x0000000d, 0x00000000}
// b1 -> set 2 stop {0x00000008, 0x0000000c, 0x0000000e, 0x00000000}
// b0 -> set 1 stop {0x00000008, 0x0000000c, 0x0000000c, 0x00000000}
// a2 -> set 3 start {0x00000008, 0x0000000c, 0x0000000c, 0x00000000}
// a1 -> set 2 start {0x00000008, 0x0000000c, 0x0000000c, 0x00000000}
// a0 -> set 1 start {0x00000008, 0x0000000d, 0x0000000e, 0x00000000}
//
// u -> set 3 stop {0x00000001, 0x00000001, 0x00000001, 0x00000000}
// u -> set 2 stop {0x00000000, 0x00000000, 0x00000000, 0x00000000}
// u -> set 1 stop {0x00000001, 0x00000001, 0x00000001, 0x00000000}
// u -> set 3 start {0x00000000, 0x00000000, 0x00000000, 0x00000000}
// u -> set 2 start {0x00000000, 0x00000000, 0x00000000, 0x00000000}
// u -> set 1 start {0x00000001, 0x00000001, 0x00000001, 0x00000000}
//
// b3 -> set 4 stop {0x00000015, 0x00000019, 0x0000001b, 0x00000000}
// b1 -> set 2 stop {0x00000010, 0x00000018, 0x0000001c, 0x00000000}
// b0 -> set 1 stop {0x00000011, 0x00000019, 0x00000019, 0x00000000}
// a2 -> set 3 start {0x00000010, 0x00000018, 0x00000018, 0x00000000}
// a1 -> set 2 start {0x00000010, 0x00000018, 0x00000018, 0x00000000}
// a0 -> set 1 start {0x00000011, 0x0000001b, 0x0000001d, 0x00000000}
//
// b2 -> set 3 stop {0x000000ad, 0x000000ce, 0x000000de, 0x000000ff}
// b1 -> set 2 stop {0x00000084, 0x000000c6, 0x000000e7, 0x000000ff}
// b0 -> set 1 stop {0x0000008c, 0x000000ce, 0x000000ce, 0x000000ff}
// a2 -> set 3 start {0x00000084, 0x000000c6, 0x000000c6, 0x000000ff}
// a1 -> set 2 start {0x00000084, 0x000000c6, 0x000000c6, 0x000000ff}
// a0 -> set 1 start {0x0000008c, 0x000000de, 0x000000ef, 0x000000ff}
ExtrBits<4, 73 - 64>(blkh, b[2][C]); // 4 bits set 3 blue stop
ExtrBits<4, 65 - 64>(blkh, b[1][C]); // 4 bits set 2 blue stop
ExtrBits<4, 57 - 0>(blkl, b[0][C]); // 4 bits set 1 blue stop
ExtrBits<4, 69 - 64>(blkh, a[2][C]); // 4 bits set 3 blue start
ExtrBits<3, 61 - 0>(blkl, a[1][C]); // 4 bits set 2 blue start
ExtrBits<4, 53 - 0>(blkl, a[0][C]); // 4 bits set 1 blue start
a[1][C] = CopyBits<1, 64 - 61>(a[1][C], blkh); // 4 bits set 2 blue start
ConcBits<4, 49 - 0>(blkl, b[2][C]); // 4 bits set 3 green stop
ConcBits<4, 41 - 0>(blkl, b[1][C]); // 4 bits set 2 green stop
ConcBits<4, 33 - 0>(blkl, b[0][C]); // 4 bits set 1 green stop
ConcBits<4, 45 - 0>(blkl, a[2][C]); // 4 bits set 3 green start
ConcBits<4, 37 - 0>(blkl, a[1][C]); // 4 bits set 2 green start
ConcBits<4, 29 - 0>(blkl, a[0][C]); // 4 bits set 1 green start
ConcBits<4, 25 - 0>(blkl, b[2][C]); // 4 bits set 3 red stop
ConcBits<4, 17 - 0>(blkl, b[1][C]); // 4 bits set 2 red stop
ConcBits<4, 9 - 0>(blkl, b[0][C]); // 4 bits set 1 red stop
ConcBits<4, 21 - 0>(blkl, a[2][C]); // 4 bits set 3 red start
ConcBits<4, 13 - 0>(blkl, a[1][C]); // 4 bits set 2 red start
ConcBits<4, 5 - 0>(blkl, a[0][C]); // 4 bits set 1 red start
ReplBits<-1, 82 - 64>(blkh, b[2][U]); // 1 bits set 3 unique stop
ReplBits<-1, 80 - 64>(blkh, b[1][U]); // 1 bits set 2 unique stop
ReplBits<-1, 78 - 64>(blkh, b[0][U]); // 1 bits set 1 unique stop
ReplBits<-1, 81 - 64>(blkh, a[2][U]); // 1 bits set 3 unique start
ReplBits<-1, 79 - 64>(blkh, a[1][U]); // 1 bits set 2 unique start
ReplBits<-1, 77 - 64>(blkh, a[0][U]); // 1 bits set 1 unique start
// insert the 1 unique bit & extend 4+1 bits to 8 bits
UnpackFrom<4, 4, 4, 0, 1, 0>(a);
UnpackFrom<4, 4, 4, 0, 1, 0>(b);
// generate the midpoints
CodebookP<3>(codes[2], a[2][C], b[2][C]);
CodebookP<3>(codes[1], a[1][C], b[1][C]);
CodebookP<3>(codes[0], a[0][C], b[0][C]);
// 128 - 83 -> 45 index bits + 3 bit from 3 set start/end order -> 16 * 3bit
ReadPaletteBlock<3, 3, 83>(partition, (unsigned int*)codes, blkl, blkh,
(int*)rgba);
}
void ReadPaletteBlock3_m2(std::uint8_t* rgba, void const* block)
{
// get the packed values
Col4 a[2][FIELDN];
Col4 b[2][FIELDN];
Col4 blkl, blkh;
// remap the indices
unsigned int codes[2][1 << 3];
int partition;
/* read in */
LoadUnaligned(blkl, blkh, block);
// 2 mode bit, 6 partition bits
partition = ExtrBits<6, 2 - 0>(blkl).GetLong();
// b1 -> set 2 stop {0x0000001b, 0x00000030, 0x00000032, 0x00000000}
// b0 -> set 1 stop {0x0000001f, 0x00000030, 0x00000033, 0x00000000}
// a1 -> set 2 start {0x00000021, 0x00000030, 0x00000032, 0x00000000}
// a0 -> set 1 start {0x00000025, 0x00000033, 0x00000038, 0x00000000}
//
// s -> set 12 stop {0x00000001, 0x00000001, 0x00000001, 0x00000000}
// s -> set 12 start {0x00000000, 0x00000000, 0x00000000, 0x00000000}
//
// b1 -> set 2 stop {0x00000037, 0x00000061, 0x00000065, 0x00000000}
// b0 -> set 1 stop {0x0000003e, 0x00000060, 0x00000066, 0x00000000}
// a1 -> set 2 start {0x00000043, 0x00000061, 0x00000065, 0x00000000}
// a0 -> set 1 start {0x0000004a, 0x00000066, 0x00000070, 0x00000000}
//
// b1 -> set 2 stop {0x0000006e, 0x000000c3, 0x000000cb, 0x000000ff}
// b0 -> set 1 stop {0x0000007c, 0x000000c1, 0x000000cd, 0x000000ff}
// a1 -> set 2 start {0x00000087, 0x000000c3, 0x000000cb, 0x000000ff}
// a0 -> set 1 start {0x00000095, 0x000000cd, 0x000000e1, 0x000000ff}
ExtrBits<6, 74 - 64>(blkh, b[1][C]); // 4 bits set 2 blue stop
ExtrBits<2, 62 - 0>(blkl, b[0][C]); // 4 bits set 1 blue stop
b[0][C] = CopyBits<4, 64 - 62>(b[0][C], blkh); // 4 bits set 1 blue stop
ExtrBits<6, 68 - 64>(blkh, a[1][C]); // 4 bits set 2 blue start
ExtrBits<6, 56 - 0>(blkl, a[0][C]); // 4 bits set 1 blue start
ConcBits<6, 50 - 0>(blkl, b[1][C]); // 4 bits set 2 green stop
ConcBits<6, 38 - 0>(blkl, b[0][C]); // 4 bits set 1 green stop
ConcBits<6, 44 - 0>(blkl, a[1][C]); // 4 bits set 2 green start
ConcBits<6, 32 - 0>(blkl, a[0][C]); // 4 bits set 1 green start
ConcBits<6, 26 - 0>(blkl, b[1][C]); // 4 bits set 2 red stop
ConcBits<6, 14 - 0>(blkl, b[0][C]); // 4 bits set 1 red stop
ConcBits<6, 20 - 0>(blkl, a[1][C]); // 4 bits set 2 red start
ConcBits<6, 8 - 0>(blkl, a[0][C]); // 4 bits set 1 red start
ReplBits<-1, 81 - 64>(blkh, a[1][S]); // 1 bits set 2 shared start/stop
ReplBits<-1, 80 - 64>(blkh, a[0][S]); // 1 bits set 1 shared start/stop
b[1][S] = a[1][S];
b[0][S] = a[0][S];
// insert the 1 shared bit & extend 6+1 bits to 8 bits
UnpackFrom<6, 6, 6, 0, 0, 1>(a);
UnpackFrom<6, 6, 6, 0, 0, 1>(b);
// generate the midpoints
CodebookP<3>(codes[1], a[1][C], b[1][C]);
CodebookP<3>(codes[0], a[0][C], b[0][C]);
// 128 - 82 -> 46 index bits + 2 bit from 2 set start/end order -> 16 * 3bit
ReadPaletteBlock<2, 3, 82>(partition, (unsigned int*)codes, blkl, blkh,
(int*)rgba);
}
void ReadPaletteBlock3_m3(std::uint8_t* rgba, void const* block)
{
// get the packed values
Col4 a[3][FIELDN];
Col4 b[3][FIELDN];
Col4 blkl, blkh;
// remap the indices
unsigned int codes[3][1 << 2];
int partition;
/* read in */
LoadUnaligned(blkl, blkh, block);
// 3 mode bit, 6 partition bits
partition = ExtrBits<6, 3 - 0>(blkl).GetLong();
// b2 -> set 3 stop {0x00000015, 0x00000016, 0x00000011, 0x00000000}
// b1 -> set 2 stop {0x00000016, 0x00000016, 0x00000012, 0x00000000}
// b0 -> set 1 stop {0x00000016, 0x00000017, 0x00000011, 0x00000000}
// a2 -> set 3 start {0x00000016, 0x00000018, 0x00000014, 0x00000012}
// a1 -> set 2 start {0x00000012, 0x00000015, 0x00000012, 0x00000000}
// a0 -> set 1 start {0x00000013, 0x00000016, 0x00000012, 0x00000000}
//
// b2 -> set 3 stop {0x000000ad, 0x000000b5, 0x0000008c, 0x000000ff}
// b1 -> set 2 stop {0x000000b5, 0x000000b5, 0x00000094, 0x000000ff}
// b0 -> set 1 stop {0x000000b5, 0x000000bd, 0x0000008c, 0x000000ff}
// a2 -> set 3 start {0x000000b5, 0x000000c6, 0x000000a5, 0x000000ff}
// a1 -> set 2 start {0x00000094, 0x000000ad, 0x00000094, 0x000000ff}
// a0 -> set 1 start {0x0000009c, 0x000000b5, 0x00000094, 0x000000ff}
ExtrBits<5, 94 - 64>(blkh, b[2][C]); // 4 bits set 3 blue stop
ExtrBits<5, 84 - 64>(blkh, b[1][C]); // 4 bits set 2 blue stop
ExtrBits<5, 74 - 64>(blkh, b[0][C]); // 4 bits set 1 blue stop
ExtrBits<5, 89 - 64>(blkh, a[2][C]); // 4 bits set 3 blue start
ExtrBits<5, 79 - 64>(blkh, a[1][C]); // 4 bits set 2 blue start
ExtrBits<5, 69 - 64>(blkh, a[0][C]); // 4 bits set 1 blue start
ConcBits<5, 64 - 64>(blkh, b[2][C]); // 4 bits set 3 green stop
ConcBits<5, 54 - 0>(blkl, b[1][C]); // 4 bits set 2 green stop
ConcBits<5, 44 - 0>(blkl, b[0][C]); // 4 bits set 1 green stop
ConcBits<5, 59 - 0>(blkl, a[2][C]); // 4 bits set 3 green start
ConcBits<5, 49 - 0>(blkl, a[1][C]); // 4 bits set 2 green start
ConcBits<5, 39 - 0>(blkl, a[0][C]); // 4 bits set 1 green start
ConcBits<5, 34 - 0>(blkl, b[2][C]); // 4 bits set 3 red stop
ConcBits<5, 24 - 0>(blkl, b[1][C]); // 4 bits set 2 red stop
ConcBits<5, 14 - 0>(blkl, b[0][C]); // 4 bits set 1 red stop
ConcBits<5, 29 - 0>(blkl, a[2][C]); // 4 bits set 3 red start
ConcBits<5, 19 - 0>(blkl, a[1][C]); // 4 bits set 2 red start
ConcBits<5, 9 - 0>(blkl, a[0][C]); // 4 bits set 1 red start
// extend 5 bits to 8 bits
UnpackFrom<5, 5, 5, 0, 0, 0>(a);
UnpackFrom<5, 5, 5, 0, 0, 0>(b);
// generate the midpoints
CodebookP<2>(codes[2], a[2][C], b[2][C]);
CodebookP<2>(codes[1], a[1][C], b[1][C]);
CodebookP<2>(codes[0], a[0][C], b[0][C]);
// 128 - 99 -> 29 index bits + 3 bit from 3 set start/end order -> 16 * 2bit
ReadPaletteBlock<3, 2, 99>(partition, (unsigned int*)codes, blkl, blkh,
(int*)rgba);
}
void ReadPaletteBlock3_m4(std::uint8_t* rgba, void const* block)
{
// get the packed values
Col4 a[2][FIELDN];
Col4 b[2][FIELDN];
Col4 blkl, blkh;
// remap the indices
unsigned int codes[2][1 << 2];
int partition;
/* read in */
LoadUnaligned(blkl, blkh, block);
// 4 mode bit, 6 partition bits
partition = ExtrBits<6, 4 - 0>(blkl).GetLong();
// b1 -> set 2 stop {0x00000046, 0x00000064, 0x0000006e, 0x00000000}
// b0 -> set 1 stop {0x00000041, 0x00000061, 0x00000068, 0x00000000}
// a1 -> set 2 start {0x00000045, 0x00000061, 0x00000069, 0x00000000}
// a0 -> set 1 start {0x00000049, 0x00000064, 0x0000006e, 0x00000000}
//
// u -> set 2 stop {0x00000000, 0x00000000, 0x00000000, 0x00000000}
// u -> set 1 stop {0x00000000, 0x00000000, 0x00000000, 0x00000000}
// u -> set 2 start {0x00000000, 0x00000000, 0x00000000, 0x00000000}
// u -> set 1 start {0x00000000, 0x00000000, 0x00000000, 0x00000000}
//
// b1 -> set 2 stop {0x00000046, 0x00000064, 0x0000006e, 0x00000000}
// b0 -> set 1 stop {0x00000041, 0x00000061, 0x00000068, 0x00000000}
// a1 -> set 2 start {0x00000045, 0x00000061, 0x00000069, 0x00000000}
// a0 -> set 1 start {0x00000049, 0x00000064, 0x0000006e, 0x00000000}
//
// b1 -> set 2 stop {0x0000008c, 0x000000c8, 0x000000dc, 0x000000ff}
// b0 -> set 1 stop {0x00000082, 0x000000c2, 0x000000d0, 0x000000ff}
// a1 -> set 2 start {0x0000008a, 0x000000c2, 0x000000d2, 0x000000ff}
// a0 -> set 1 start {0x00000092, 0x000000c8, 0x000000dc, 0x000000ff}
ExtrBits<7, 87 - 64>(blkh, b[1][C]); // 4 bits set 2 blue stop
ExtrBits<7, 73 - 64>(blkh, b[0][C]); // 4 bits set 1 blue stop
ExtrBits<7, 80 - 64>(blkh, a[1][C]); // 4 bits set 2 blue start
ExtrBits<7, 66 - 64>(blkh, a[0][C]); // 4 bits set 1 blue start
ConcBits<5, 59 - 0>(blkl, b[1][C]); // 4 bits set 2 green stop
ConcBits<7, 45 - 0>(blkl, b[0][C]); // 4 bits set 1 green stop
b[1][C] = InjtBits<2, 64 - 59>(b[1][C], blkh); // 4 bits set 2 green stop
ConcBits<7, 52 - 0>(blkl, a[1][C]); // 4 bits set 2 green start
ConcBits<7, 38 - 0>(blkl, a[0][C]); // 4 bits set 1 green start
ConcBits<7, 31 - 0>(blkl, b[1][C]); // 4 bits set 2 red stop
ConcBits<7, 17 - 0>(blkl, b[0][C]); // 4 bits set 1 red stop
ConcBits<7, 24 - 0>(blkl, a[1][C]); // 4 bits set 2 red start
ConcBits<7, 10 - 0>(blkl, a[0][C]); // 4 bits set 1 red start
ReplBits<-1, 97 - 64>(blkh, b[1][U]); // 1 bits set 2 unique stop
ReplBits<-1, 95 - 64>(blkh, b[0][U]); // 1 bits set 1 unique stop
ReplBits<-1, 96 - 64>(blkh, a[1][U]); // 1 bits set 2 unique start
ReplBits<-1, 94 - 64>(blkh, a[0][U]); // 1 bits set 1 unique start
// insert the 1 shared bit & extend 7+1 bits to 8 bits
UnpackFrom<7, 7, 7, 0, 1, 0>(a);
UnpackFrom<7, 7, 7, 0, 1, 0>(b);
// generate the midpoints
CodebookP<2>(codes[1], a[1][C], b[1][C]);
CodebookP<2>(codes[0], a[0][C], b[0][C]);
// 128 - 98 -> 30 index bits + 2 bit from 2 set start/end order -> 16 * 2bit
ReadPaletteBlock<2, 2, 98>(partition, (unsigned int*)codes, blkl, blkh,
(int*)rgba);
}
void ReadPaletteBlock4_m5(std::uint8_t* rgba, void const* block)
{
// get the packed values
Col4 a[2][FIELDN];
Col4 b[2][FIELDN];
Col4 blkl, blkh;
// remap the indices
unsigned int codes[2][1 << 3];
int rix;
/* read in */
LoadUnaligned(blkl, blkh, block);
// 5 mode bit, 2 rotation bits, 1 index bit
rix = ExtrBits<3, 5 - 0>(blkl).GetLong();
// b1 -> set 2 stop {0x0000003e, 0x00000000, 0x00000000, 0x00000000}
// b0 -> set 1 stop {0x00000000, 0x0000001b, 0x0000000e, 0x0000001f}
// a1 -> set 2 start {0x00000039, 0x00000000, 0x00000000, 0x00000000}
// a0 -> set 1 start {0x00000000, 0x0000001a, 0x00000013, 0x0000001f}
//
// b1 -> set 2 stop {0x000000fb, 0x00000000, 0x00000000, 0x00000000}
// b0 -> set 1 stop {0x00000000, 0x000000de, 0x00000073, 0x000000ff}
// a1 -> set 2 start {0x000000e7, 0x00000000, 0x00000000, 0x00000000}
// a0 -> set 1 start {0x00000000, 0x000000d6, 0x0000009c, 0x000000ff}
// rotate colors
assume(rix >= 0 && rix <= 7);
switch (rix)
{
case 0:
case 4:
ExtrBits<6, 44 - 0>(blkl, b[1][C]); // 6 bits set 1 alpha stop
ExtrBits<6, 38 - 0>(blkl, a[1][C]); // 6 bits set 1 alpha start
b[1][C] = ShiftLeft<96>(b[1][C]); // 6 bits set 1 alpha stop
a[1][C] = ShiftLeft<96>(a[1][C]); // 6 bits set 1 alpha start
b[0][C] = ShiftLeft<0>(b[0][C]); // 6 bits set 1 alpha stop
a[0][C] = ShiftLeft<0>(a[0][C]); // 6 bits set 1 alpha start
ExtrBits<5, 33 - 0>(blkl, b[0][C]); // 5 bits set 1 blue stop
ExtrBits<5, 28 - 0>(blkl, a[0][C]); // 5 bits set 1 blue start
ConcBits<5, 23 - 0>(blkl, b[0][C]); // 5 bits set 1 green stop
ConcBits<5, 18 - 0>(blkl, a[0][C]); // 5 bits set 1 green start
ConcBits<5, 13 - 0>(blkl, b[0][C]); // 5 bits set 1 red stop
ConcBits<5, 8 - 0>(blkl, a[0][C]); // 5 bits set 1 red start
// extend 5/6 bits to 8 bits
UnpackFrom<5, 5, 5, 6, 0, 0>(a);
UnpackFrom<5, 5, 5, 6, 0, 0>(b);
break;
case 1:
case 5:
ExtrBits<6, 44 - 0>(blkl, b[1][C]); // 6 bits set 1 red stop
ExtrBits<6, 38 - 0>(blkl, a[1][C]); // 6 bits set 1 red start
b[1][C] = ShiftLeft<0>(b[1][C]); // 6 bits set 1 red stop
a[1][C] = ShiftLeft<0>(a[1][C]); // 6 bits set 1 red start
ExtrBits<5, 13 - 0>(blkl, b[0][C]); // 5 bits set 1 alpha stop
ExtrBits<5, 8 - 0>(blkl, a[0][C]); // 5 bits set 1 alpha start
ConcBits<5, 33 - 0>(blkl, b[0][C]); // 5 bits set 1 blue stop
ConcBits<5, 28 - 0>(blkl, a[0][C]); // 5 bits set 1 blue start
ConcBits<5, 23 - 0>(blkl, b[0][C]); // 5 bits set 1 green stop
ConcBits<5, 18 - 0>(blkl, a[0][C]); // 5 bits set 1 green start
b[0][C] = ShiftLeft<32>(b[0][C]); // 6 bits set 1 red stop
a[0][C] = ShiftLeft<32>(a[0][C]); // 6 bits set 1 red start
// extend 5/6 bits to 8 bits
UnpackFrom<6, 5, 5, 5, 0, 0>(a);
UnpackFrom<6, 5, 5, 5, 0, 0>(b);
break;
case 2:
case 6:
ExtrBits<6, 44 - 0>(blkl, b[1][C]); // 6 bits set 1 green stop
ExtrBits<6, 38 - 0>(blkl, a[1][C]); // 6 bits set 1 green start
b[1][C] = ShiftLeft<32>(b[1][C]); // 6 bits set 1 green stop
a[1][C] = ShiftLeft<32>(a[1][C]); // 6 bits set 1 green start
ExtrBits<5, 23 - 0>(blkl, b[0][C]); // 5 bits set 1 alpha stop
ExtrBits<5, 18 - 0>(blkl, a[0][C]); // 5 bits set 1 alpha start
ConcBits<5, 33 - 0>(blkl, b[0][C]); // 5 bits set 1 blue stop
ConcBits<5, 28 - 0>(blkl, a[0][C]); // 5 bits set 1 blue start
b[0][C] = ShiftLeft<32>(b[0][C]); // 6 bits set 1 green stop
a[0][C] = ShiftLeft<32>(a[0][C]); // 6 bits set 1 green start
ConcBits<5, 13 - 0>(blkl, b[0][C]); // 5 bits set 1 red stop
ConcBits<5, 8 - 0>(blkl, a[0][C]); // 5 bits set 1 red start
// extend 5/6 bits to 8 bits
UnpackFrom<5, 6, 5, 5, 0, 0>(a);
UnpackFrom<5, 6, 5, 5, 0, 0>(b);
break;
case 3:
case 7:
ExtrBits<6, 44 - 0>(blkl, b[1][C]); // 6 bits set 1 blue stop
ExtrBits<6, 38 - 0>(blkl, a[1][C]); // 6 bits set 1 blue start
b[1][C] = ShiftLeft<64>(b[1][C]); // 6 bits set 1 blue stop
a[1][C] = ShiftLeft<64>(a[1][C]); // 6 bits set 1 blue start
ExtrBits<5, 33 - 0>(blkl, b[0][C]); // 5 bits set 1 alpha stop
ExtrBits<5, 28 - 0>(blkl, a[0][C]); // 5 bits set 1 alpha start
b[0][C] = ShiftLeft<32>(b[0][C]); // 6 bits set 1 blue stop
a[0][C] = ShiftLeft<32>(a[0][C]); // 6 bits set 1 blue start
ConcBits<5, 23 - 0>(blkl, b[0][C]); // 5 bits set 1 green stop
ConcBits<5, 18 - 0>(blkl, a[0][C]); // 5 bits set 1 green start
ConcBits<5, 13 - 0>(blkl, b[0][C]); // 5 bits set 1 red stop
ConcBits<5, 8 - 0>(blkl, a[0][C]); // 5 bits set 1 red start
// extend 5/6 bits to 8 bits
UnpackFrom<5, 5, 6, 5, 0, 0>(a);
UnpackFrom<5, 5, 6, 5, 0, 0>(b);
break;
}
rix >>= 2;
// generate the midpoints
assume(rix >= 0 && rix <= 1);
if (!rix)
{
CodebookP<2>(codes[0], a[0][C], b[0][C]);
CodebookP<3>(codes[1], a[1][C], b[1][C]);
}
else
{
CodebookP<3>(codes[0], a[0][C], b[0][C]);
CodebookP<2>(codes[1], a[1][C], b[1][C]);
}
// 128 - 50 -> 78 index bits -> 31 + 47 index bits + 2 bit from 2 set
// start/end order -> 16 * 2bit + 16 * 3bit
if (!rix)
ReadPaletteBlock<1, 2, 3, 50>(0, (unsigned int*)codes[0],
(unsigned int*)codes[1], blkl, blkh,
(int*)rgba);
else
ReadPaletteBlock<1, 3, 2, 50>(0, (unsigned int*)codes[0],
(unsigned int*)codes[1], blkl, blkh,
(int*)rgba);
}
void ReadPaletteBlock4_m6(std::uint8_t* rgba, void const* block)
{
// get the packed values
Col4 a[2][FIELDN];
Col4 b[2][FIELDN];
Col4 blkl, blkh;
// remap the indices
unsigned int codes[2][1 << 2];
int rix;
/* read in */
LoadUnaligned(blkl, blkh, block);
// 6 mode bit, 2 rotation bits
rix = ExtrBits<2, 6 - 0>(blkl).GetLong();
// b1 -> set 2 stop {0x0000000b, 0x00000000, 0x00000000, 0x00000000}
// b0 -> set 1 stop {0x00000000, 0x00000000, 0x00000000, 0x00000005}
// a1 -> set 2 start {0x00000000, 0x00000000, 0x00000000, 0x00000000}
// a0 -> set 1 start {0x00000000, 0x00000000, 0x00000000, 0x00000000}
//
// b1 -> set 2 stop {0x0000000b, 0x00000000, 0x00000000, 0x00000000}
// b0 -> set 1 stop {0x00000000, 0x00000000, 0x00000000, 0x0000000a}
// a1 -> set 2 start {0x00000000, 0x00000000, 0x00000000, 0x00000000}
// a0 -> set 1 start {0x00000000, 0x00000000, 0x00000000, 0x00000000}
// rotate colors
assume(rix >= 0 && rix <= 3);
switch (rix)
{
case 0:
ExtrBits<6, 58 - 0>(blkl, b[1][C]); // 8 bits set 1 alpha stop
ExtrBits<8, 50 - 0>(blkl, a[1][C]); // 8 bits set 1 alpha start
b[1][C] = CopyBits<2, 64 - 58>(b[1][C], blkh); // 8 bits set 1 alpha stop
b[1][C] = ShiftLeft<96>(b[1][C]); // 8 bits set 1 alpha stop
a[1][C] = ShiftLeft<96>(a[1][C]); // 8 bits set 1 alpha start
b[0][C] = ShiftLeft<0>(b[0][C]); // 8 bits set 1 alpha stop
a[0][C] = ShiftLeft<0>(a[0][C]); // 8 bits set 1 alpha start
ExtrBits<7, 43 - 0>(blkl, b[0][C]); // 7 bits set 1 blue stop
ExtrBits<7, 36 - 0>(blkl, a[0][C]); // 7 bits set 1 blue start
ConcBits<7, 29 - 0>(blkl, b[0][C]); // 7 bits set 1 green stop
ConcBits<7, 22 - 0>(blkl, a[0][C]); // 7 bits set 1 green start
ConcBits<7, 15 - 0>(blkl, b[0][C]); // 7 bits set 1 red stop
ConcBits<7, 8 - 0>(blkl, a[0][C]); // 7 bits set 1 red start
// extend 7/8 bits to 8 bits
UnpackFrom<7, 7, 7, 8, 0, 0>(a);
UnpackFrom<7, 7, 7, 8, 0, 0>(b);
break;
case 1:
ExtrBits<6, 58 - 0>(blkl, b[1][C]); // 8 bits set 1 red stop
ExtrBits<8, 50 - 0>(blkl, a[1][C]); // 8 bits set 1 red start
b[1][C] = CopyBits<2, 64 - 58>(b[1][C], blkh); // 8 bits set 1 red stop
b[1][C] = ShiftLeft<0>(b[1][C]); // 8 bits set 1 red stop
a[1][C] = ShiftLeft<0>(a[1][C]); // 8 bits set 1 red start
ExtrBits<7, 15 - 0>(blkl, b[0][C]); // 7 bits set 1 alpha stop
ExtrBits<7, 8 - 0>(blkl, a[0][C]); // 7 bits set 1 alpha start
ConcBits<7, 43 - 0>(blkl, b[0][C]); // 7 bits set 1 blue stop
ConcBits<7, 36 - 0>(blkl, a[0][C]); // 7 bits set 1 blue start
ConcBits<7, 29 - 0>(blkl, b[0][C]); // 7 bits set 1 green stop
ConcBits<7, 22 - 0>(blkl, a[0][C]); // 7 bits set 1 green start
b[0][C] = ShiftLeft<32>(b[0][C]); // 7 bits set 1 red stop
a[0][C] = ShiftLeft<32>(a[0][C]); // 7 bits set 1 red start
// extend 7/8 bits to 8 bits
UnpackFrom<8, 7, 7, 7, 0, 0>(a);
UnpackFrom<8, 7, 7, 7, 0, 0>(b);
break;
case 2:
ExtrBits<6, 58 - 0>(blkl, b[1][C]); // 8 bits set 1 green stop
ExtrBits<8, 50 - 0>(blkl, a[1][C]); // 8 bits set 1 green start
b[1][C] = CopyBits<2, 64 - 58>(b[1][C], blkh); // 8 bits set 1 green stop
b[1][C] = ShiftLeft<32>(b[1][C]); // 8 bits set 1 red stop
a[1][C] = ShiftLeft<32>(a[1][C]); // 8 bits set 1 red start
ExtrBits<7, 29 - 0>(blkl, b[0][C]); // 7 bits set 1 alpha stop
ExtrBits<7, 22 - 0>(blkl, a[0][C]); // 7 bits set 1 alpha start
ConcBits<7, 43 - 0>(blkl, b[0][C]); // 7 bits set 1 blue stop
ConcBits<7, 36 - 0>(blkl, a[0][C]); // 7 bits set 1 blue start
b[0][C] = ShiftLeft<32>(b[0][C]); // 7 bits set 1 green stop
a[0][C] = ShiftLeft<32>(a[0][C]); // 7 bits set 1 green start
ConcBits<7, 15 - 0>(blkl, b[0][C]); // 7 bits set 1 red stop
ConcBits<7, 8 - 0>(blkl, a[0][C]); // 7 bits set 1 red start
// extend 7/8 bits to 8 bits
UnpackFrom<7, 8, 7, 7, 0, 0>(a);
UnpackFrom<7, 8, 7, 7, 0, 0>(b);
break;
case 3:
ExtrBits<6, 58 - 0>(blkl, b[1][C]); // 8 bits set 1 blue stop
ExtrBits<8, 50 - 0>(blkl, a[1][C]); // 8 bits set 1 blue start
b[1][C] = CopyBits<2, 64 - 58>(b[1][C], blkh); // 8 bits set 1 blue stop
b[1][C] = ShiftLeft<64>(b[1][C]); // 8 bits set 1 blue stop
a[1][C] = ShiftLeft<64>(a[1][C]); // 8 bits set 1 blue start
ExtrBits<7, 43 - 0>(blkl, b[0][C]); // 7 bits set 1 alpha stop
ExtrBits<7, 36 - 0>(blkl, a[0][C]); // 7 bits set 1 alpha start
b[0][C] = ShiftLeft<32>(b[0][C]); // 7 bits set 1 blue stop
a[0][C] = ShiftLeft<32>(a[0][C]); // 7 bits set 1 blue start
ConcBits<7, 29 - 0>(blkl, b[0][C]); // 7 bits set 1 green stop
ConcBits<7, 22 - 0>(blkl, a[0][C]); // 7 bits set 1 green start
ConcBits<7, 15 - 0>(blkl, b[0][C]); // 7 bits set 1 red stop
ConcBits<7, 8 - 0>(blkl, a[0][C]); // 7 bits set 1 red start
// extend 7/8 bits to 8 bits
UnpackFrom<7, 7, 8, 7, 0, 0>(a);
UnpackFrom<7, 7, 8, 7, 0, 0>(b);
break;
}
// generate the midpoints
CodebookP<2>(codes[0], a[0][C], b[0][C]);
CodebookP<2>(codes[1], a[1][C], b[1][C]);
// 128 - 66 -> 62 index bits -> 31 + 31 index bits + 2 bit from 2 set
// start/end order -> 16 * 2bit + 16 * 3bit
ReadPaletteBlock<1, 2, 2, 66>(0, (unsigned int*)codes[0],
(unsigned int*)codes[1], blkl, blkh,
(int*)rgba);
}
void ReadPaletteBlock4_m7(std::uint8_t* rgba, void const* block)
{
// get the packed values
Col4 a[1][FIELDN];
Col4 b[1][FIELDN];
Col4 blkl, blkh;
// remap the indices
unsigned int codes[1][1 << 4];
int partition;
/* read in */
LoadUnaligned(blkl, blkh, block);
// 7 mode bit, 0 partition bits
partition = 0; // ExtrBits< 0, 7 - 0>(blkl).GetLong();
// b0 -> set 1 stop {0x0000006e, 0x0000007b, 0x0000007e, 0x0000007f}
// a0 -> set 1 start {0x0000005f, 0x00000076, 0x0000007c, 0x0000007f}
//
// u -> set 1 stop {0x00000000, 0x00000000, 0x00000000, 0x00000000}
// u -> set 1 start {0x00000001, 0x00000001, 0x00000001, 0x00000001}
//
// b0 -> set 1 stop {0x000000dc, 0x000000f6, 0x000000fc, 0x000000fe}
// a0 -> set 1 start {0x000000bf, 0x000000ed, 0x000000f9, 0x000000ff}
//
// b0 -> set 1 stop {0x000000dc, 0x000000f6, 0x000000fc, 0x000000fe}
// a0 -> set 1 start {0x000000bf, 0x000000ed, 0x000000f9, 0x000000ff}
ExtrBits<7, 56 - 0>(blkl, b[0][C]); // 7 bits set 1 alpha stop
ExtrBits<7, 49 - 0>(blkl, a[0][C]); // 7 bits set 1 alpha start
ConcBits<7, 42 - 0>(blkl, b[0][C]); // 7 bits set 1 blue stop
ConcBits<7, 35 - 0>(blkl, a[0][C]); // 7 bits set 1 blue start
ConcBits<7, 28 - 0>(blkl, b[0][C]); // 7 bits set 1 green stop
ConcBits<7, 21 - 0>(blkl, a[0][C]); // 7 bits set 1 green start
ConcBits<7, 14 - 0>(blkl, b[0][C]); // 7 bits set 1 red stop
ConcBits<7, 7 - 0>(blkl, a[0][C]); // 7 bits set 1 red start
ReplBits<1, 64 - 64>(blkh, b[0][U]); // 1 bits set 1 unique stop
ReplBits<1, 63 - 0>(blkl, a[0][U]); // 1 bits set 1 unique start
// insert the 1 shared bit & extend 7+1 bits to 8 bits
UnpackFrom<7, 7, 7, 7, 1, 0>(a);
UnpackFrom<7, 7, 7, 7, 1, 0>(b);
// generate the midpoints
CodebookP<4>(codes[0], a[0][C], b[0][C]);
// 128 - 65 -> 63 index bits + 1 bit from 1 set start/end order -> 16 * 4bit
ReadPaletteBlock<1, 4, 65>(partition, (unsigned int*)codes, blkl, blkh,
(int*)rgba);
}
void ReadPaletteBlock4_m8(std::uint8_t* rgba, void const* block)
{
// get the packed values
Col4 a[2][FIELDN];
Col4 b[2][FIELDN];
Col4 blkl, blkh;
// remap the indices
unsigned int codes[2][1 << 2];
int partition;
/* read in */
LoadUnaligned(blkl, blkh, block);
// 8 mode bit, 6 partition bits
partition = ExtrBits<6, 8 - 0>(blkl).GetLong();
// b1 -> set 2 stop {0x00000008, 0x00000000, 0x00000000, 0x00000010}
// b0 -> set 1 stop {0x0000000a, 0x00000000, 0x00000000, 0x0000001a}
// a1 -> set 2 start {0x0000001d, 0x0000000e, 0x00000004, 0x0000001e}
// a0 -> set 1 start {0x0000001f, 0x0000000b, 0x00000003, 0x0000001f}
//
// u -> set 2 stop {0x00000001, 0x00000001, 0x00000001, 0x00000001}
// u -> set 1 stop {0x00000000, 0x00000000, 0x00000000, 0x00000000}
// u -> set 2 start {0x00000000, 0x00000000, 0x00000000, 0x00000000}
// u -> set 1 start {0x00000000, 0x00000000, 0x00000000, 0x00000000}
//
// b1 -> set 2 stop {0x00000011, 0x00000001, 0x00000001, 0x00000021}
// b0 -> set 1 stop {0x00000014, 0x00000000, 0x00000000, 0x00000034}
// a1 -> set 2 start {0x0000003a, 0x0000001c, 0x00000008, 0x0000003c}
// a0 -> set 1 start {0x0000003e, 0x00000016, 0x00000006, 0x0000003e}
//
// b1 -> set 2 stop {0x00000045, 0x00000004, 0x00000004, 0x00000086}
// b0 -> set 1 stop {0x00000051, 0x00000000, 0x00000000, 0x000000d3}
// a1 -> set 2 start {0x000000eb, 0x00000071, 0x00000020, 0x000000f3}
// a0 -> set 1 start {0x000000fb, 0x00000059, 0x00000018, 0x000000fb}
ExtrBits<5, 89 - 64>(blkh, b[1][C]); // 7 bits set 2 alpha stop
ExtrBits<5, 79 - 64>(blkh, b[0][C]); // 7 bits set 1 alpha stop
ExtrBits<5, 84 - 64>(blkh, a[1][C]); // 7 bits set 2 alpha start
ExtrBits<5, 74 - 64>(blkh, a[0][C]); // 7 bits set 1 alpha start
ConcBits<5, 69 - 64>(blkh, b[1][C]); // 7 bits set 2 blue stop
ConcBits<5, 59 - 0>(blkl, b[0][C]); // 7 bits set 1 blue stop
ConcBits<5, 64 - 64>(blkh, a[1][C]); // 7 bits set 2 blue start
ConcBits<5, 54 - 0>(blkl, a[0][C]); // 7 bits set 1 blue start
ConcBits<5, 49 - 0>(blkl, b[1][C]); // 7 bits set 2 green stop
ConcBits<5, 39 - 0>(blkl, b[0][C]); // 7 bits set 1 green stop
ConcBits<5, 44 - 0>(blkl, a[1][C]); // 7 bits set 2 green start
ConcBits<5, 34 - 0>(blkl, a[0][C]); // 7 bits set 1 green start
ConcBits<5, 29 - 0>(blkl, b[1][C]); // 7 bits set 2 red stop
ConcBits<5, 19 - 0>(blkl, b[0][C]); // 7 bits set 1 red stop
ConcBits<5, 24 - 0>(blkl, a[1][C]); // 7 bits set 2 red start
ConcBits<5, 14 - 0>(blkl, a[0][C]); // 7 bits set 1 red start
ReplBits<1, 97 - 64>(blkh, b[1][U]); // 1 bits set 2 unique stop
ReplBits<1, 95 - 64>(blkh, b[0][U]); // 1 bits set 1 unique stop
ReplBits<1, 96 - 64>(blkh, a[1][U]); // 1 bits set 2 unique start
ReplBits<1, 94 - 64>(blkh, a[0][U]); // 1 bits set 1 unique start
// insert the 1 shared bit & extend 7+1 bits to 8 bits
UnpackFrom<5, 5, 5, 5, 1, 0>(a);
UnpackFrom<5, 5, 5, 5, 1, 0>(b);
// generate the midpoints
CodebookP<2>(codes[1], a[1][C], b[1][C]);
CodebookP<2>(codes[0], a[0][C], b[0][C]);
// 128 - 98 -> 30 index bits + 2 bit from 2 set start/end order -> 16 * 2bit
ReadPaletteBlock<2, 2, 98>(partition, (unsigned int*)codes, blkl, blkh,
(int*)rgba);
}
#undef C
#undef U
#undef S
void DecompressColorsBtc7u(std::uint8_t* rgba, void const* block)
{
// get the block bytes
std::uint8_t const* bytes = reinterpret_cast<std::uint8_t const*>(block);
// get the mode
#ifdef __GNUC__
unsigned long mode = __builtin_ctz(*((int*)bytes));
#else
unsigned long mode;
_BitScanForward(&mode, *((int*)bytes));
#endif
assume(mode >= 0 && mode <= 7);
switch (mode)
{
case 0:
ReadPaletteBlock3_m1(rgba, block);
break;
case 1:
ReadPaletteBlock3_m2(rgba, block);
break;
case 2:
ReadPaletteBlock3_m3(rgba, block);
break;
case 3:
ReadPaletteBlock3_m4(rgba, block);
break;
case 4:
ReadPaletteBlock4_m5(rgba, block);
break;
case 5:
ReadPaletteBlock4_m6(rgba, block);
break;
case 6:
ReadPaletteBlock4_m7(rgba, block);
break;
case 7:
ReadPaletteBlock4_m8(rgba, block);
break;
}
}
void DecompressColorsBtc7u(std::uint16_t* rgba, void const* block)
{
std::uint8_t bytes[4 * 16];
DecompressColorsBtc7u(bytes, block);
for (int v = 0; v < (4 * 16); v++)
rgba[v] = bytes[v] * (65535 / 255);
}
void DecompressColorsBtc7u(float* rgba, void const* block)
{
std::uint8_t bytes[4 * 16];
DecompressColorsBtc7u(bytes, block);
for (int v = 0; v < (4 * 16); v++)
rgba[v] = bytes[v] * (1.0f / 255.0f);
}
} // namespace squish
|
; A173512: a(n) = 8*n + 4 + n mod 2.
; 4,13,20,29,36,45,52,61,68,77,84,93,100,109,116,125,132,141,148,157,164,173,180,189,196,205,212,221,228,237,244,253,260,269,276,285,292,301,308,317,324,333,340,349,356,365,372,381,388,397,404,413,420,429,436
mov $1,$0
mul $0,8
mod $1,2
add $0,$1
add $0,4
|
db DITTO ; pokedex id
db 48 ; base hp
db 48 ; base attack
db 48 ; base defense
db 48 ; base speed
db 48 ; base special
db NORMAL ; species type 1
db NORMAL ; species type 2
db 35 ; catch rate
db 61 ; base exp yield
INCBIN "pic/gsmon/ditto.pic",0,1 ; 55, sprite dimensions
dw DittoPicFront
dw DittoPicBack
; attacks known at lvl 0
db TRANSFORM
db 0
db 0
db 0
db 0 ; growth rate
; learnset
tmlearn 0
tmlearn 0
tmlearn 0
tmlearn 0
tmlearn 0
tmlearn 0
tmlearn 0
db BANK(DittoPicFront)
|
Drowning_Header:
smpsHeaderStartSong 2
smpsHeaderVoice Drowning_Voices
smpsHeaderChan $06, $00
smpsHeaderTempo $01, $80
smpsHeaderDAC Drowning_DAC
smpsHeaderFM Drowning_FM1, $0C, $08
smpsHeaderFM Drowning_FM2, $E8, $0E
smpsHeaderFM Drowning_FM3, $F4, $40
smpsHeaderFM Drowning_FM4, $06, $11
smpsHeaderFM Drowning_FM5, $0C, $19
; FM1 Data
Drowning_FM1:
smpsSetvoice $00
smpsNop $01
smpsNoteFill $05
smpsCall Drowning_Call01
smpsSetTempoMod $AB
smpsCall Drowning_Call01
smpsSetTempoMod $C0
smpsCall Drowning_Call01
smpsSetTempoMod $D6
smpsCall Drowning_Call01
smpsSetTempoMod $E7
smpsCall Drowning_Call01
dc.b nC5, $06
smpsNop $01
smpsStop
; FM2 Data
Drowning_FM2:
smpsSetvoice $01
Drowning_Loop03:
smpsAlterVol $FF
smpsCall Drowning_Call00
smpsLoop $00, $0A, Drowning_Loop03
dc.b nC5, $06
smpsStop
; FM3 Data
Drowning_FM3:
smpsSetvoice $02
Drowning_Loop02:
smpsAlterVol $FE
dc.b smpsNoAttack, nC6, $02, smpsNoAttack, nCs6, smpsNoAttack, nC6, smpsNoAttack, nCs6, smpsNoAttack, nC6, smpsNoAttack
dc.b nCs6, smpsNoAttack, nC6, smpsNoAttack, nCs6
smpsLoop $00, $1E, Drowning_Loop02
dc.b nC6, $06
smpsStop
; FM4 Data
Drowning_FM4:
smpsSetvoice $03
smpsNoteFill $05
dc.b nRst, $03
Drowning_Loop01:
smpsPan panRight, $00
dc.b nC4, $06, nC5
smpsPan panCenter, $00
dc.b nC4, nC5
smpsPan panLeft, $00
dc.b nCs4, nCs5
smpsPan panCenter, $00
dc.b nCs4, nCs5
smpsLoop $00, $0A, Drowning_Loop01
smpsStop
; FM5 Data
Drowning_FM5:
smpsSetvoice $00
smpsNoteFill $05
dc.b nRst, $04
Drowning_Loop00:
smpsPan panLeft, $00
dc.b nC4, $06, nC5
smpsPan panLeft, $00
dc.b nC4, nC5
smpsPan panRight, $00
dc.b nCs4, nCs5
smpsPan panRight, $00
dc.b nCs4, nCs5
smpsLoop $00, $0A, Drowning_Loop00
smpsStop
; DAC Data
Drowning_DAC:
dc.b dSnare, $0C, dSnare, dSnare, dSnare
smpsLoop $00, $0A, Drowning_DAC
dc.b dSnare, $06
smpsStop
Drowning_Call01:
dc.b nC4, $06, nC5, nC4, nC5, nCs4, nCs5, nCs4, nCs5
Drowning_Call00:
dc.b nC4, $06, nC5, nC4, nC5, nCs4, nCs5, nCs4, nCs5
smpsReturn
Drowning_Voices:
; Voice $00
; $3C
; $31, $52, $50, $30, $52, $53, $52, $53, $08, $00, $08, $00
; $04, $00, $04, $00, $1F, $0F, $1F, $0F, $1A, $80, $16, $80
smpsVcAlgorithm $04
smpsVcFeedback $07
smpsVcUnusedBits $00
smpsVcDetune $03, $05, $05, $03
smpsVcCoarseFreq $00, $00, $02, $01
smpsVcRateScale $01, $01, $01, $01
smpsVcAttackRate $13, $12, $13, $12
smpsVcAmpMod $00, $00, $00, $00
smpsVcDecayRate1 $00, $08, $00, $08
smpsVcDecayRate2 $00, $04, $00, $04
smpsVcDecayLevel $00, $01, $00, $01
smpsVcReleaseRate $0F, $0F, $0F, $0F
smpsVcTotalLevel $00, $16, $00, $1A
; Voice $01
; $18
; $37, $30, $30, $31, $9E, $DC, $1C, $9C, $0D, $06, $04, $01
; $08, $0A, $03, $05, $BF, $BF, $3F, $2F, $2C, $22, $14, $80
smpsVcAlgorithm $00
smpsVcFeedback $03
smpsVcUnusedBits $00
smpsVcDetune $03, $03, $03, $03
smpsVcCoarseFreq $01, $00, $00, $07
smpsVcRateScale $02, $00, $03, $02
smpsVcAttackRate $1C, $1C, $1C, $1E
smpsVcAmpMod $00, $00, $00, $00
smpsVcDecayRate1 $01, $04, $06, $0D
smpsVcDecayRate2 $05, $03, $0A, $08
smpsVcDecayLevel $02, $03, $0B, $0B
smpsVcReleaseRate $0F, $0F, $0F, $0F
smpsVcTotalLevel $00, $14, $22, $2C
; Voice $02
; $2C
; $52, $58, $34, $34, $1F, $12, $1F, $12, $00, $0A, $00, $0A
; $00, $00, $00, $00, $0F, $1F, $0F, $1F, $15, $82, $14, $82
smpsVcAlgorithm $04
smpsVcFeedback $05
smpsVcUnusedBits $00
smpsVcDetune $03, $03, $05, $05
smpsVcCoarseFreq $04, $04, $08, $02
smpsVcRateScale $00, $00, $00, $00
smpsVcAttackRate $12, $1F, $12, $1F
smpsVcAmpMod $00, $00, $00, $00
smpsVcDecayRate1 $0A, $00, $0A, $00
smpsVcDecayRate2 $00, $00, $00, $00
smpsVcDecayLevel $01, $00, $01, $00
smpsVcReleaseRate $0F, $0F, $0F, $0F
smpsVcTotalLevel $02, $14, $02, $15
; Voice $03
; $07
; $34, $31, $54, $51, $14, $14, $14, $14, $00, $00, $00, $00
; $00, $00, $00, $00, $0F, $0F, $0F, $0F, $91, $91, $91, $91
smpsVcAlgorithm $07
smpsVcFeedback $00
smpsVcUnusedBits $00
smpsVcDetune $05, $05, $03, $03
smpsVcCoarseFreq $01, $04, $01, $04
smpsVcRateScale $00, $00, $00, $00
smpsVcAttackRate $14, $14, $14, $14
smpsVcAmpMod $00, $00, $00, $00
smpsVcDecayRate1 $00, $00, $00, $00
smpsVcDecayRate2 $00, $00, $00, $00
smpsVcDecayLevel $00, $00, $00, $00
smpsVcReleaseRate $0F, $0F, $0F, $0F
smpsVcTotalLevel $11, $11, $11, $11
|
; A061776: Start with a single triangle; at n-th generation add a triangle at each vertex, allowing triangles to overlap; sequence gives number of triangles in n-th generation.
; 1,3,6,12,18,30,42,66,90,138,186,282,378,570,762,1146,1530,2298,3066,4602,6138,9210,12282,18426,24570,36858,49146,73722,98298,147450,196602,294906,393210,589818,786426,1179642,1572858,2359290,3145722,4718586,6291450,9437178,12582906,18874362,25165818,37748730,50331642,75497466,100663290,150994938,201326586,301989882,402653178,603979770,805306362,1207959546,1610612730,2415919098,3221225466,4831838202,6442450938,9663676410,12884901882,19327352826,25769803770,38654705658,51539607546,77309411322,103079215098,154618822650,206158430202,309237645306,412316860410,618475290618,824633720826,1236950581242,1649267441658,2473901162490,3298534883322,4947802324986,6597069766650,9895604649978,13194139533306,19791209299962,26388279066618,39582418599930,52776558133242,79164837199866,105553116266490,158329674399738,211106232532986,316659348799482,422212465065978,633318697598970,844424930131962,1266637395197946,1688849860263930,2533274790395898,3377699720527866,5066549580791802,6755399441055738
mov $2,1
lpb $0
add $1,1
trn $2,$0
sub $0,1
add $2,$1
mov $1,$2
lpe
add $2,$1
add $1,$2
|
; A229581: Number of defective 3-colorings of an n X 3 0..2 array connected horizontally and antidiagonally with exactly one mistake, and colors introduced in row-major 0..2 order.
; Submitted by Jon Maiga
; 2,28,264,2160,16416,119232,839808,5785344,39191040,262020096,1733363712,11367641088,74010599424,478892113920,3082323787776,19747769352192,126009575866368,801195213717504,5077997833420800,32092946307219456,202307433683484672,1272343137141915648,7985050033097539584,50016247460061511680,312733168329226715136,1952213111388506161152,12168163276809912188928,75738287311732724465664,470805569775635854786560,2923088494085252176674816,18128061417100135347781632,112305551218132545813086208
mov $1,$0
add $0,1
mul $0,4
sub $0,1
mov $2,6
pow $2,$1
mul $0,$2
mul $0,5
sub $0,15
div $0,15
mul $0,2
add $0,2
|
//=========================================================================
// Copyright (C) 2012 The Elastos Open Source Project
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
//=========================================================================
#include "Elastos.Droid.View.h"
#include "Elastos.Droid.Widget.h"
#include "elastos/droid/preference/SeekBarDialogPreference.h"
#include "elastos/droid/R.h"
using Elastos::Droid::Widget::IImageView;
using Elastos::Droid::R;
namespace Elastos {
namespace Droid {
namespace Preference {
const String SeekBarDialogPreference::TAG("SeekBarDialogPreference");
CAR_INTERFACE_IMPL(SeekBarDialogPreference, DialogPreference, ISeekBarDialogPreference)
SeekBarDialogPreference::SeekBarDialogPreference()
{
}
ECode SeekBarDialogPreference::constructor(
/* [in] */ IContext* context,
/* [in] */ IAttributeSet* attrs,
/* [in] */ Int32 defStyleAttr,
/* [in] */ Int32 defStyleRes)
{
DialogPreference::constructor(context, attrs, defStyleAttr, defStyleRes);
SetDialogLayoutResource(R::layout::seekbar_dialog);
CreateActionButtons();
// Steal the XML dialogIcon attribute's value
GetDialogIcon((IDrawable**)&mMyIcon);
SetDialogIcon((IDrawable*)NULL);
return NOERROR;
}
ECode SeekBarDialogPreference::constructor(
/* [in] */ IContext* context,
/* [in] */ IAttributeSet* attrs,
/* [in] */ Int32 defStyleAttr)
{
return constructor(context, attrs, defStyleAttr, 0);
}
ECode SeekBarDialogPreference::constructor(
/* [in] */ IContext* context,
/* [in] */ IAttributeSet* attrs)
{
return constructor(context, attrs, R::attr::dialogPreferenceStyle);
}
ECode SeekBarDialogPreference::constructor(
/* [in] */ IContext* context)
{
return constructor(context, NULL);
}
ECode SeekBarDialogPreference::CreateActionButtons()
{
SetPositiveButtonText(R::string::ok);
SetNegativeButtonText(R::string::cancel);
return NOERROR;
}
ECode SeekBarDialogPreference::OnBindDialogView(
/* [in] */ IView* view)
{
DialogPreference::OnBindDialogView(view);
AutoPtr<IView> icon;
view->FindViewById(R::id::icon, (IView**)&icon);
IImageView* iconView = IImageView::Probe(icon);
if (mMyIcon != NULL) {
iconView->SetImageDrawable(mMyIcon);
}
else {
AutoPtr<IView> v = IView::Probe(iconView);
v->SetVisibility(IView::GONE);
}
return NOERROR;
}
ECode SeekBarDialogPreference::GetSeekBar(
/* [in] */ IView* dialogView,
/* [out] */ ISeekBar** bar)
{
VALIDATE_NOT_NULL(bar)
AutoPtr<IView> v;
dialogView->FindViewById(R::id::seekbar, (IView**)&v);
AutoPtr<ISeekBar> seekBar = ISeekBar::Probe(v);
*bar = seekBar;
REFCOUNT_ADD(*bar)
return NOERROR;
}
}
}
}
|
user/_stressfs: file format elf64-littleriscv
Disassembly of section .text:
0000000000000000 <main>:
#include "kernel/fs.h"
#include "kernel/fcntl.h"
int
main(int argc, char *argv[])
{
0: dd010113 addi sp,sp,-560
4: 22113423 sd ra,552(sp)
8: 22813023 sd s0,544(sp)
c: 20913c23 sd s1,536(sp)
10: 21213823 sd s2,528(sp)
14: 1c00 addi s0,sp,560
int fd, i;
char path[] = "stressfs0";
16: 00001797 auipc a5,0x1
1a: 8ca78793 addi a5,a5,-1846 # 8e0 <malloc+0x118>
1e: 6398 ld a4,0(a5)
20: fce43823 sd a4,-48(s0)
24: 0087d783 lhu a5,8(a5)
28: fcf41c23 sh a5,-40(s0)
char data[512];
printf("stressfs starting\n");
2c: 00001517 auipc a0,0x1
30: 88450513 addi a0,a0,-1916 # 8b0 <malloc+0xe8>
34: 00000097 auipc ra,0x0
38: 6d6080e7 jalr 1750(ra) # 70a <printf>
memset(data, 'a', sizeof(data));
3c: 20000613 li a2,512
40: 06100593 li a1,97
44: dd040513 addi a0,s0,-560
48: 00000097 auipc ra,0x0
4c: 136080e7 jalr 310(ra) # 17e <memset>
for(i = 0; i < 4; i++)
50: 4481 li s1,0
52: 4911 li s2,4
if(fork() > 0)
54: 00000097 auipc ra,0x0
58: 31e080e7 jalr 798(ra) # 372 <fork>
5c: 00a04563 bgtz a0,66 <main+0x66>
for(i = 0; i < 4; i++)
60: 2485 addiw s1,s1,1
62: ff2499e3 bne s1,s2,54 <main+0x54>
break;
printf("write %d\n", i);
66: 85a6 mv a1,s1
68: 00001517 auipc a0,0x1
6c: 86050513 addi a0,a0,-1952 # 8c8 <malloc+0x100>
70: 00000097 auipc ra,0x0
74: 69a080e7 jalr 1690(ra) # 70a <printf>
path[8] += i;
78: fd844783 lbu a5,-40(s0)
7c: 9cbd addw s1,s1,a5
7e: fc940c23 sb s1,-40(s0)
fd = open(path, O_CREATE | O_RDWR);
82: 20200593 li a1,514
86: fd040513 addi a0,s0,-48
8a: 00000097 auipc ra,0x0
8e: 330080e7 jalr 816(ra) # 3ba <open>
92: 892a mv s2,a0
94: 44d1 li s1,20
for(i = 0; i < 20; i++)
// printf(fd, "%d\n", i);
write(fd, data, sizeof(data));
96: 20000613 li a2,512
9a: dd040593 addi a1,s0,-560
9e: 854a mv a0,s2
a0: 00000097 auipc ra,0x0
a4: 2fa080e7 jalr 762(ra) # 39a <write>
for(i = 0; i < 20; i++)
a8: 34fd addiw s1,s1,-1
aa: f4f5 bnez s1,96 <main+0x96>
close(fd);
ac: 854a mv a0,s2
ae: 00000097 auipc ra,0x0
b2: 2f4080e7 jalr 756(ra) # 3a2 <close>
printf("read\n");
b6: 00001517 auipc a0,0x1
ba: 82250513 addi a0,a0,-2014 # 8d8 <malloc+0x110>
be: 00000097 auipc ra,0x0
c2: 64c080e7 jalr 1612(ra) # 70a <printf>
fd = open(path, O_RDONLY);
c6: 4581 li a1,0
c8: fd040513 addi a0,s0,-48
cc: 00000097 auipc ra,0x0
d0: 2ee080e7 jalr 750(ra) # 3ba <open>
d4: 892a mv s2,a0
d6: 44d1 li s1,20
for (i = 0; i < 20; i++)
read(fd, data, sizeof(data));
d8: 20000613 li a2,512
dc: dd040593 addi a1,s0,-560
e0: 854a mv a0,s2
e2: 00000097 auipc ra,0x0
e6: 2b0080e7 jalr 688(ra) # 392 <read>
for (i = 0; i < 20; i++)
ea: 34fd addiw s1,s1,-1
ec: f4f5 bnez s1,d8 <main+0xd8>
close(fd);
ee: 854a mv a0,s2
f0: 00000097 auipc ra,0x0
f4: 2b2080e7 jalr 690(ra) # 3a2 <close>
wait(0);
f8: 4501 li a0,0
fa: 00000097 auipc ra,0x0
fe: 288080e7 jalr 648(ra) # 382 <wait>
exit(0);
102: 4501 li a0,0
104: 00000097 auipc ra,0x0
108: 276080e7 jalr 630(ra) # 37a <exit>
000000000000010c <strcpy>:
#include "kernel/fcntl.h"
#include "user/user.h"
char*
strcpy(char *s, const char *t)
{
10c: 1141 addi sp,sp,-16
10e: e422 sd s0,8(sp)
110: 0800 addi s0,sp,16
char *os;
os = s;
while((*s++ = *t++) != 0)
112: 87aa mv a5,a0
114: 0585 addi a1,a1,1
116: 0785 addi a5,a5,1
118: fff5c703 lbu a4,-1(a1)
11c: fee78fa3 sb a4,-1(a5)
120: fb75 bnez a4,114 <strcpy+0x8>
;
return os;
}
122: 6422 ld s0,8(sp)
124: 0141 addi sp,sp,16
126: 8082 ret
0000000000000128 <strcmp>:
int
strcmp(const char *p, const char *q)
{
128: 1141 addi sp,sp,-16
12a: e422 sd s0,8(sp)
12c: 0800 addi s0,sp,16
while(*p && *p == *q)
12e: 00054783 lbu a5,0(a0)
132: cb91 beqz a5,146 <strcmp+0x1e>
134: 0005c703 lbu a4,0(a1)
138: 00f71763 bne a4,a5,146 <strcmp+0x1e>
p++, q++;
13c: 0505 addi a0,a0,1
13e: 0585 addi a1,a1,1
while(*p && *p == *q)
140: 00054783 lbu a5,0(a0)
144: fbe5 bnez a5,134 <strcmp+0xc>
return (uchar)*p - (uchar)*q;
146: 0005c503 lbu a0,0(a1)
}
14a: 40a7853b subw a0,a5,a0
14e: 6422 ld s0,8(sp)
150: 0141 addi sp,sp,16
152: 8082 ret
0000000000000154 <strlen>:
uint
strlen(const char *s)
{
154: 1141 addi sp,sp,-16
156: e422 sd s0,8(sp)
158: 0800 addi s0,sp,16
int n;
for(n = 0; s[n]; n++)
15a: 00054783 lbu a5,0(a0)
15e: cf91 beqz a5,17a <strlen+0x26>
160: 0505 addi a0,a0,1
162: 87aa mv a5,a0
164: 4685 li a3,1
166: 9e89 subw a3,a3,a0
168: 00f6853b addw a0,a3,a5
16c: 0785 addi a5,a5,1
16e: fff7c703 lbu a4,-1(a5)
172: fb7d bnez a4,168 <strlen+0x14>
;
return n;
}
174: 6422 ld s0,8(sp)
176: 0141 addi sp,sp,16
178: 8082 ret
for(n = 0; s[n]; n++)
17a: 4501 li a0,0
17c: bfe5 j 174 <strlen+0x20>
000000000000017e <memset>:
void*
memset(void *dst, int c, uint n)
{
17e: 1141 addi sp,sp,-16
180: e422 sd s0,8(sp)
182: 0800 addi s0,sp,16
char *cdst = (char *) dst;
int i;
for(i = 0; i < n; i++){
184: ca19 beqz a2,19a <memset+0x1c>
186: 87aa mv a5,a0
188: 1602 slli a2,a2,0x20
18a: 9201 srli a2,a2,0x20
18c: 00a60733 add a4,a2,a0
cdst[i] = c;
190: 00b78023 sb a1,0(a5)
for(i = 0; i < n; i++){
194: 0785 addi a5,a5,1
196: fee79de3 bne a5,a4,190 <memset+0x12>
}
return dst;
}
19a: 6422 ld s0,8(sp)
19c: 0141 addi sp,sp,16
19e: 8082 ret
00000000000001a0 <strchr>:
char*
strchr(const char *s, char c)
{
1a0: 1141 addi sp,sp,-16
1a2: e422 sd s0,8(sp)
1a4: 0800 addi s0,sp,16
for(; *s; s++)
1a6: 00054783 lbu a5,0(a0)
1aa: cb99 beqz a5,1c0 <strchr+0x20>
if(*s == c)
1ac: 00f58763 beq a1,a5,1ba <strchr+0x1a>
for(; *s; s++)
1b0: 0505 addi a0,a0,1
1b2: 00054783 lbu a5,0(a0)
1b6: fbfd bnez a5,1ac <strchr+0xc>
return (char*)s;
return 0;
1b8: 4501 li a0,0
}
1ba: 6422 ld s0,8(sp)
1bc: 0141 addi sp,sp,16
1be: 8082 ret
return 0;
1c0: 4501 li a0,0
1c2: bfe5 j 1ba <strchr+0x1a>
00000000000001c4 <gets>:
char*
gets(char *buf, int max)
{
1c4: 711d addi sp,sp,-96
1c6: ec86 sd ra,88(sp)
1c8: e8a2 sd s0,80(sp)
1ca: e4a6 sd s1,72(sp)
1cc: e0ca sd s2,64(sp)
1ce: fc4e sd s3,56(sp)
1d0: f852 sd s4,48(sp)
1d2: f456 sd s5,40(sp)
1d4: f05a sd s6,32(sp)
1d6: ec5e sd s7,24(sp)
1d8: 1080 addi s0,sp,96
1da: 8baa mv s7,a0
1dc: 8a2e mv s4,a1
int i, cc;
char c;
for(i=0; i+1 < max; ){
1de: 892a mv s2,a0
1e0: 4481 li s1,0
cc = read(0, &c, 1);
if(cc < 1)
break;
buf[i++] = c;
if(c == '\n' || c == '\r')
1e2: 4aa9 li s5,10
1e4: 4b35 li s6,13
for(i=0; i+1 < max; ){
1e6: 89a6 mv s3,s1
1e8: 2485 addiw s1,s1,1
1ea: 0344d863 bge s1,s4,21a <gets+0x56>
cc = read(0, &c, 1);
1ee: 4605 li a2,1
1f0: faf40593 addi a1,s0,-81
1f4: 4501 li a0,0
1f6: 00000097 auipc ra,0x0
1fa: 19c080e7 jalr 412(ra) # 392 <read>
if(cc < 1)
1fe: 00a05e63 blez a0,21a <gets+0x56>
buf[i++] = c;
202: faf44783 lbu a5,-81(s0)
206: 00f90023 sb a5,0(s2)
if(c == '\n' || c == '\r')
20a: 01578763 beq a5,s5,218 <gets+0x54>
20e: 0905 addi s2,s2,1
210: fd679be3 bne a5,s6,1e6 <gets+0x22>
for(i=0; i+1 < max; ){
214: 89a6 mv s3,s1
216: a011 j 21a <gets+0x56>
218: 89a6 mv s3,s1
break;
}
buf[i] = '\0';
21a: 99de add s3,s3,s7
21c: 00098023 sb zero,0(s3)
return buf;
}
220: 855e mv a0,s7
222: 60e6 ld ra,88(sp)
224: 6446 ld s0,80(sp)
226: 64a6 ld s1,72(sp)
228: 6906 ld s2,64(sp)
22a: 79e2 ld s3,56(sp)
22c: 7a42 ld s4,48(sp)
22e: 7aa2 ld s5,40(sp)
230: 7b02 ld s6,32(sp)
232: 6be2 ld s7,24(sp)
234: 6125 addi sp,sp,96
236: 8082 ret
0000000000000238 <stat>:
int
stat(const char *n, struct stat *st)
{
238: 1101 addi sp,sp,-32
23a: ec06 sd ra,24(sp)
23c: e822 sd s0,16(sp)
23e: e426 sd s1,8(sp)
240: e04a sd s2,0(sp)
242: 1000 addi s0,sp,32
244: 892e mv s2,a1
int fd;
int r;
fd = open(n, O_RDONLY);
246: 4581 li a1,0
248: 00000097 auipc ra,0x0
24c: 172080e7 jalr 370(ra) # 3ba <open>
if(fd < 0)
250: 02054563 bltz a0,27a <stat+0x42>
254: 84aa mv s1,a0
return -1;
r = fstat(fd, st);
256: 85ca mv a1,s2
258: 00000097 auipc ra,0x0
25c: 17a080e7 jalr 378(ra) # 3d2 <fstat>
260: 892a mv s2,a0
close(fd);
262: 8526 mv a0,s1
264: 00000097 auipc ra,0x0
268: 13e080e7 jalr 318(ra) # 3a2 <close>
return r;
}
26c: 854a mv a0,s2
26e: 60e2 ld ra,24(sp)
270: 6442 ld s0,16(sp)
272: 64a2 ld s1,8(sp)
274: 6902 ld s2,0(sp)
276: 6105 addi sp,sp,32
278: 8082 ret
return -1;
27a: 597d li s2,-1
27c: bfc5 j 26c <stat+0x34>
000000000000027e <atoi>:
int
atoi(const char *s)
{
27e: 1141 addi sp,sp,-16
280: e422 sd s0,8(sp)
282: 0800 addi s0,sp,16
int n;
n = 0;
while('0' <= *s && *s <= '9')
284: 00054603 lbu a2,0(a0)
288: fd06079b addiw a5,a2,-48
28c: 0ff7f793 andi a5,a5,255
290: 4725 li a4,9
292: 02f76963 bltu a4,a5,2c4 <atoi+0x46>
296: 86aa mv a3,a0
n = 0;
298: 4501 li a0,0
while('0' <= *s && *s <= '9')
29a: 45a5 li a1,9
n = n*10 + *s++ - '0';
29c: 0685 addi a3,a3,1
29e: 0025179b slliw a5,a0,0x2
2a2: 9fa9 addw a5,a5,a0
2a4: 0017979b slliw a5,a5,0x1
2a8: 9fb1 addw a5,a5,a2
2aa: fd07851b addiw a0,a5,-48
while('0' <= *s && *s <= '9')
2ae: 0006c603 lbu a2,0(a3)
2b2: fd06071b addiw a4,a2,-48
2b6: 0ff77713 andi a4,a4,255
2ba: fee5f1e3 bgeu a1,a4,29c <atoi+0x1e>
return n;
}
2be: 6422 ld s0,8(sp)
2c0: 0141 addi sp,sp,16
2c2: 8082 ret
n = 0;
2c4: 4501 li a0,0
2c6: bfe5 j 2be <atoi+0x40>
00000000000002c8 <memmove>:
void*
memmove(void *vdst, const void *vsrc, int n)
{
2c8: 1141 addi sp,sp,-16
2ca: e422 sd s0,8(sp)
2cc: 0800 addi s0,sp,16
char *dst;
const char *src;
dst = vdst;
src = vsrc;
if (src > dst) {
2ce: 02b57463 bgeu a0,a1,2f6 <memmove+0x2e>
while(n-- > 0)
2d2: 00c05f63 blez a2,2f0 <memmove+0x28>
2d6: 1602 slli a2,a2,0x20
2d8: 9201 srli a2,a2,0x20
2da: 00c507b3 add a5,a0,a2
dst = vdst;
2de: 872a mv a4,a0
*dst++ = *src++;
2e0: 0585 addi a1,a1,1
2e2: 0705 addi a4,a4,1
2e4: fff5c683 lbu a3,-1(a1)
2e8: fed70fa3 sb a3,-1(a4)
while(n-- > 0)
2ec: fee79ae3 bne a5,a4,2e0 <memmove+0x18>
src += n;
while(n-- > 0)
*--dst = *--src;
}
return vdst;
}
2f0: 6422 ld s0,8(sp)
2f2: 0141 addi sp,sp,16
2f4: 8082 ret
dst += n;
2f6: 00c50733 add a4,a0,a2
src += n;
2fa: 95b2 add a1,a1,a2
while(n-- > 0)
2fc: fec05ae3 blez a2,2f0 <memmove+0x28>
300: fff6079b addiw a5,a2,-1
304: 1782 slli a5,a5,0x20
306: 9381 srli a5,a5,0x20
308: fff7c793 not a5,a5
30c: 97ba add a5,a5,a4
*--dst = *--src;
30e: 15fd addi a1,a1,-1
310: 177d addi a4,a4,-1
312: 0005c683 lbu a3,0(a1)
316: 00d70023 sb a3,0(a4)
while(n-- > 0)
31a: fee79ae3 bne a5,a4,30e <memmove+0x46>
31e: bfc9 j 2f0 <memmove+0x28>
0000000000000320 <memcmp>:
int
memcmp(const void *s1, const void *s2, uint n)
{
320: 1141 addi sp,sp,-16
322: e422 sd s0,8(sp)
324: 0800 addi s0,sp,16
const char *p1 = s1, *p2 = s2;
while (n-- > 0) {
326: ca05 beqz a2,356 <memcmp+0x36>
328: fff6069b addiw a3,a2,-1
32c: 1682 slli a3,a3,0x20
32e: 9281 srli a3,a3,0x20
330: 0685 addi a3,a3,1
332: 96aa add a3,a3,a0
if (*p1 != *p2) {
334: 00054783 lbu a5,0(a0)
338: 0005c703 lbu a4,0(a1)
33c: 00e79863 bne a5,a4,34c <memcmp+0x2c>
return *p1 - *p2;
}
p1++;
340: 0505 addi a0,a0,1
p2++;
342: 0585 addi a1,a1,1
while (n-- > 0) {
344: fed518e3 bne a0,a3,334 <memcmp+0x14>
}
return 0;
348: 4501 li a0,0
34a: a019 j 350 <memcmp+0x30>
return *p1 - *p2;
34c: 40e7853b subw a0,a5,a4
}
350: 6422 ld s0,8(sp)
352: 0141 addi sp,sp,16
354: 8082 ret
return 0;
356: 4501 li a0,0
358: bfe5 j 350 <memcmp+0x30>
000000000000035a <memcpy>:
void *
memcpy(void *dst, const void *src, uint n)
{
35a: 1141 addi sp,sp,-16
35c: e406 sd ra,8(sp)
35e: e022 sd s0,0(sp)
360: 0800 addi s0,sp,16
return memmove(dst, src, n);
362: 00000097 auipc ra,0x0
366: f66080e7 jalr -154(ra) # 2c8 <memmove>
}
36a: 60a2 ld ra,8(sp)
36c: 6402 ld s0,0(sp)
36e: 0141 addi sp,sp,16
370: 8082 ret
0000000000000372 <fork>:
# generated by usys.pl - do not edit
#include "kernel/syscall.h"
.global fork
fork:
li a7, SYS_fork
372: 4885 li a7,1
ecall
374: 00000073 ecall
ret
378: 8082 ret
000000000000037a <exit>:
.global exit
exit:
li a7, SYS_exit
37a: 4889 li a7,2
ecall
37c: 00000073 ecall
ret
380: 8082 ret
0000000000000382 <wait>:
.global wait
wait:
li a7, SYS_wait
382: 488d li a7,3
ecall
384: 00000073 ecall
ret
388: 8082 ret
000000000000038a <pipe>:
.global pipe
pipe:
li a7, SYS_pipe
38a: 4891 li a7,4
ecall
38c: 00000073 ecall
ret
390: 8082 ret
0000000000000392 <read>:
.global read
read:
li a7, SYS_read
392: 4895 li a7,5
ecall
394: 00000073 ecall
ret
398: 8082 ret
000000000000039a <write>:
.global write
write:
li a7, SYS_write
39a: 48c1 li a7,16
ecall
39c: 00000073 ecall
ret
3a0: 8082 ret
00000000000003a2 <close>:
.global close
close:
li a7, SYS_close
3a2: 48d5 li a7,21
ecall
3a4: 00000073 ecall
ret
3a8: 8082 ret
00000000000003aa <kill>:
.global kill
kill:
li a7, SYS_kill
3aa: 4899 li a7,6
ecall
3ac: 00000073 ecall
ret
3b0: 8082 ret
00000000000003b2 <exec>:
.global exec
exec:
li a7, SYS_exec
3b2: 489d li a7,7
ecall
3b4: 00000073 ecall
ret
3b8: 8082 ret
00000000000003ba <open>:
.global open
open:
li a7, SYS_open
3ba: 48bd li a7,15
ecall
3bc: 00000073 ecall
ret
3c0: 8082 ret
00000000000003c2 <mknod>:
.global mknod
mknod:
li a7, SYS_mknod
3c2: 48c5 li a7,17
ecall
3c4: 00000073 ecall
ret
3c8: 8082 ret
00000000000003ca <unlink>:
.global unlink
unlink:
li a7, SYS_unlink
3ca: 48c9 li a7,18
ecall
3cc: 00000073 ecall
ret
3d0: 8082 ret
00000000000003d2 <fstat>:
.global fstat
fstat:
li a7, SYS_fstat
3d2: 48a1 li a7,8
ecall
3d4: 00000073 ecall
ret
3d8: 8082 ret
00000000000003da <link>:
.global link
link:
li a7, SYS_link
3da: 48cd li a7,19
ecall
3dc: 00000073 ecall
ret
3e0: 8082 ret
00000000000003e2 <mkdir>:
.global mkdir
mkdir:
li a7, SYS_mkdir
3e2: 48d1 li a7,20
ecall
3e4: 00000073 ecall
ret
3e8: 8082 ret
00000000000003ea <chdir>:
.global chdir
chdir:
li a7, SYS_chdir
3ea: 48a5 li a7,9
ecall
3ec: 00000073 ecall
ret
3f0: 8082 ret
00000000000003f2 <dup>:
.global dup
dup:
li a7, SYS_dup
3f2: 48a9 li a7,10
ecall
3f4: 00000073 ecall
ret
3f8: 8082 ret
00000000000003fa <getpid>:
.global getpid
getpid:
li a7, SYS_getpid
3fa: 48ad li a7,11
ecall
3fc: 00000073 ecall
ret
400: 8082 ret
0000000000000402 <sbrk>:
.global sbrk
sbrk:
li a7, SYS_sbrk
402: 48b1 li a7,12
ecall
404: 00000073 ecall
ret
408: 8082 ret
000000000000040a <sleep>:
.global sleep
sleep:
li a7, SYS_sleep
40a: 48b5 li a7,13
ecall
40c: 00000073 ecall
ret
410: 8082 ret
0000000000000412 <uptime>:
.global uptime
uptime:
li a7, SYS_uptime
412: 48b9 li a7,14
ecall
414: 00000073 ecall
ret
418: 8082 ret
000000000000041a <trace>:
.global trace
trace:
li a7, SYS_trace
41a: 48d9 li a7,22
ecall
41c: 00000073 ecall
ret
420: 8082 ret
0000000000000422 <wait_stat>:
.global wait_stat
wait_stat:
li a7, SYS_wait_stat
422: 48dd li a7,23
ecall
424: 00000073 ecall
ret
428: 8082 ret
000000000000042a <set_priority>:
.global set_priority
set_priority:
li a7, SYS_set_priority
42a: 48e1 li a7,24
ecall
42c: 00000073 ecall
ret
430: 8082 ret
0000000000000432 <putc>:
static char digits[] = "0123456789ABCDEF";
static void
putc(int fd, char c)
{
432: 1101 addi sp,sp,-32
434: ec06 sd ra,24(sp)
436: e822 sd s0,16(sp)
438: 1000 addi s0,sp,32
43a: feb407a3 sb a1,-17(s0)
write(fd, &c, 1);
43e: 4605 li a2,1
440: fef40593 addi a1,s0,-17
444: 00000097 auipc ra,0x0
448: f56080e7 jalr -170(ra) # 39a <write>
}
44c: 60e2 ld ra,24(sp)
44e: 6442 ld s0,16(sp)
450: 6105 addi sp,sp,32
452: 8082 ret
0000000000000454 <printint>:
static void
printint(int fd, int xx, int base, int sgn)
{
454: 7139 addi sp,sp,-64
456: fc06 sd ra,56(sp)
458: f822 sd s0,48(sp)
45a: f426 sd s1,40(sp)
45c: f04a sd s2,32(sp)
45e: ec4e sd s3,24(sp)
460: 0080 addi s0,sp,64
462: 84aa mv s1,a0
char buf[16];
int i, neg;
uint x;
neg = 0;
if(sgn && xx < 0){
464: c299 beqz a3,46a <printint+0x16>
466: 0805c863 bltz a1,4f6 <printint+0xa2>
neg = 1;
x = -xx;
} else {
x = xx;
46a: 2581 sext.w a1,a1
neg = 0;
46c: 4881 li a7,0
46e: fc040693 addi a3,s0,-64
}
i = 0;
472: 4701 li a4,0
do{
buf[i++] = digits[x % base];
474: 2601 sext.w a2,a2
476: 00000517 auipc a0,0x0
47a: 48250513 addi a0,a0,1154 # 8f8 <digits>
47e: 883a mv a6,a4
480: 2705 addiw a4,a4,1
482: 02c5f7bb remuw a5,a1,a2
486: 1782 slli a5,a5,0x20
488: 9381 srli a5,a5,0x20
48a: 97aa add a5,a5,a0
48c: 0007c783 lbu a5,0(a5)
490: 00f68023 sb a5,0(a3)
}while((x /= base) != 0);
494: 0005879b sext.w a5,a1
498: 02c5d5bb divuw a1,a1,a2
49c: 0685 addi a3,a3,1
49e: fec7f0e3 bgeu a5,a2,47e <printint+0x2a>
if(neg)
4a2: 00088b63 beqz a7,4b8 <printint+0x64>
buf[i++] = '-';
4a6: fd040793 addi a5,s0,-48
4aa: 973e add a4,a4,a5
4ac: 02d00793 li a5,45
4b0: fef70823 sb a5,-16(a4)
4b4: 0028071b addiw a4,a6,2
while(--i >= 0)
4b8: 02e05863 blez a4,4e8 <printint+0x94>
4bc: fc040793 addi a5,s0,-64
4c0: 00e78933 add s2,a5,a4
4c4: fff78993 addi s3,a5,-1
4c8: 99ba add s3,s3,a4
4ca: 377d addiw a4,a4,-1
4cc: 1702 slli a4,a4,0x20
4ce: 9301 srli a4,a4,0x20
4d0: 40e989b3 sub s3,s3,a4
putc(fd, buf[i]);
4d4: fff94583 lbu a1,-1(s2)
4d8: 8526 mv a0,s1
4da: 00000097 auipc ra,0x0
4de: f58080e7 jalr -168(ra) # 432 <putc>
while(--i >= 0)
4e2: 197d addi s2,s2,-1
4e4: ff3918e3 bne s2,s3,4d4 <printint+0x80>
}
4e8: 70e2 ld ra,56(sp)
4ea: 7442 ld s0,48(sp)
4ec: 74a2 ld s1,40(sp)
4ee: 7902 ld s2,32(sp)
4f0: 69e2 ld s3,24(sp)
4f2: 6121 addi sp,sp,64
4f4: 8082 ret
x = -xx;
4f6: 40b005bb negw a1,a1
neg = 1;
4fa: 4885 li a7,1
x = -xx;
4fc: bf8d j 46e <printint+0x1a>
00000000000004fe <vprintf>:
}
// Print to the given fd. Only understands %d, %x, %p, %s.
void
vprintf(int fd, const char *fmt, va_list ap)
{
4fe: 7119 addi sp,sp,-128
500: fc86 sd ra,120(sp)
502: f8a2 sd s0,112(sp)
504: f4a6 sd s1,104(sp)
506: f0ca sd s2,96(sp)
508: ecce sd s3,88(sp)
50a: e8d2 sd s4,80(sp)
50c: e4d6 sd s5,72(sp)
50e: e0da sd s6,64(sp)
510: fc5e sd s7,56(sp)
512: f862 sd s8,48(sp)
514: f466 sd s9,40(sp)
516: f06a sd s10,32(sp)
518: ec6e sd s11,24(sp)
51a: 0100 addi s0,sp,128
char *s;
int c, i, state;
state = 0;
for(i = 0; fmt[i]; i++){
51c: 0005c903 lbu s2,0(a1)
520: 18090f63 beqz s2,6be <vprintf+0x1c0>
524: 8aaa mv s5,a0
526: 8b32 mv s6,a2
528: 00158493 addi s1,a1,1
state = 0;
52c: 4981 li s3,0
if(c == '%'){
state = '%';
} else {
putc(fd, c);
}
} else if(state == '%'){
52e: 02500a13 li s4,37
if(c == 'd'){
532: 06400c13 li s8,100
printint(fd, va_arg(ap, int), 10, 1);
} else if(c == 'l') {
536: 06c00c93 li s9,108
printint(fd, va_arg(ap, uint64), 10, 0);
} else if(c == 'x') {
53a: 07800d13 li s10,120
printint(fd, va_arg(ap, int), 16, 0);
} else if(c == 'p') {
53e: 07000d93 li s11,112
putc(fd, digits[x >> (sizeof(uint64) * 8 - 4)]);
542: 00000b97 auipc s7,0x0
546: 3b6b8b93 addi s7,s7,950 # 8f8 <digits>
54a: a839 j 568 <vprintf+0x6a>
putc(fd, c);
54c: 85ca mv a1,s2
54e: 8556 mv a0,s5
550: 00000097 auipc ra,0x0
554: ee2080e7 jalr -286(ra) # 432 <putc>
558: a019 j 55e <vprintf+0x60>
} else if(state == '%'){
55a: 01498f63 beq s3,s4,578 <vprintf+0x7a>
for(i = 0; fmt[i]; i++){
55e: 0485 addi s1,s1,1
560: fff4c903 lbu s2,-1(s1)
564: 14090d63 beqz s2,6be <vprintf+0x1c0>
c = fmt[i] & 0xff;
568: 0009079b sext.w a5,s2
if(state == 0){
56c: fe0997e3 bnez s3,55a <vprintf+0x5c>
if(c == '%'){
570: fd479ee3 bne a5,s4,54c <vprintf+0x4e>
state = '%';
574: 89be mv s3,a5
576: b7e5 j 55e <vprintf+0x60>
if(c == 'd'){
578: 05878063 beq a5,s8,5b8 <vprintf+0xba>
} else if(c == 'l') {
57c: 05978c63 beq a5,s9,5d4 <vprintf+0xd6>
} else if(c == 'x') {
580: 07a78863 beq a5,s10,5f0 <vprintf+0xf2>
} else if(c == 'p') {
584: 09b78463 beq a5,s11,60c <vprintf+0x10e>
printptr(fd, va_arg(ap, uint64));
} else if(c == 's'){
588: 07300713 li a4,115
58c: 0ce78663 beq a5,a4,658 <vprintf+0x15a>
s = "(null)";
while(*s != 0){
putc(fd, *s);
s++;
}
} else if(c == 'c'){
590: 06300713 li a4,99
594: 0ee78e63 beq a5,a4,690 <vprintf+0x192>
putc(fd, va_arg(ap, uint));
} else if(c == '%'){
598: 11478863 beq a5,s4,6a8 <vprintf+0x1aa>
putc(fd, c);
} else {
// Unknown % sequence. Print it to draw attention.
putc(fd, '%');
59c: 85d2 mv a1,s4
59e: 8556 mv a0,s5
5a0: 00000097 auipc ra,0x0
5a4: e92080e7 jalr -366(ra) # 432 <putc>
putc(fd, c);
5a8: 85ca mv a1,s2
5aa: 8556 mv a0,s5
5ac: 00000097 auipc ra,0x0
5b0: e86080e7 jalr -378(ra) # 432 <putc>
}
state = 0;
5b4: 4981 li s3,0
5b6: b765 j 55e <vprintf+0x60>
printint(fd, va_arg(ap, int), 10, 1);
5b8: 008b0913 addi s2,s6,8
5bc: 4685 li a3,1
5be: 4629 li a2,10
5c0: 000b2583 lw a1,0(s6)
5c4: 8556 mv a0,s5
5c6: 00000097 auipc ra,0x0
5ca: e8e080e7 jalr -370(ra) # 454 <printint>
5ce: 8b4a mv s6,s2
state = 0;
5d0: 4981 li s3,0
5d2: b771 j 55e <vprintf+0x60>
printint(fd, va_arg(ap, uint64), 10, 0);
5d4: 008b0913 addi s2,s6,8
5d8: 4681 li a3,0
5da: 4629 li a2,10
5dc: 000b2583 lw a1,0(s6)
5e0: 8556 mv a0,s5
5e2: 00000097 auipc ra,0x0
5e6: e72080e7 jalr -398(ra) # 454 <printint>
5ea: 8b4a mv s6,s2
state = 0;
5ec: 4981 li s3,0
5ee: bf85 j 55e <vprintf+0x60>
printint(fd, va_arg(ap, int), 16, 0);
5f0: 008b0913 addi s2,s6,8
5f4: 4681 li a3,0
5f6: 4641 li a2,16
5f8: 000b2583 lw a1,0(s6)
5fc: 8556 mv a0,s5
5fe: 00000097 auipc ra,0x0
602: e56080e7 jalr -426(ra) # 454 <printint>
606: 8b4a mv s6,s2
state = 0;
608: 4981 li s3,0
60a: bf91 j 55e <vprintf+0x60>
printptr(fd, va_arg(ap, uint64));
60c: 008b0793 addi a5,s6,8
610: f8f43423 sd a5,-120(s0)
614: 000b3983 ld s3,0(s6)
putc(fd, '0');
618: 03000593 li a1,48
61c: 8556 mv a0,s5
61e: 00000097 auipc ra,0x0
622: e14080e7 jalr -492(ra) # 432 <putc>
putc(fd, 'x');
626: 85ea mv a1,s10
628: 8556 mv a0,s5
62a: 00000097 auipc ra,0x0
62e: e08080e7 jalr -504(ra) # 432 <putc>
632: 4941 li s2,16
putc(fd, digits[x >> (sizeof(uint64) * 8 - 4)]);
634: 03c9d793 srli a5,s3,0x3c
638: 97de add a5,a5,s7
63a: 0007c583 lbu a1,0(a5)
63e: 8556 mv a0,s5
640: 00000097 auipc ra,0x0
644: df2080e7 jalr -526(ra) # 432 <putc>
for (i = 0; i < (sizeof(uint64) * 2); i++, x <<= 4)
648: 0992 slli s3,s3,0x4
64a: 397d addiw s2,s2,-1
64c: fe0914e3 bnez s2,634 <vprintf+0x136>
printptr(fd, va_arg(ap, uint64));
650: f8843b03 ld s6,-120(s0)
state = 0;
654: 4981 li s3,0
656: b721 j 55e <vprintf+0x60>
s = va_arg(ap, char*);
658: 008b0993 addi s3,s6,8
65c: 000b3903 ld s2,0(s6)
if(s == 0)
660: 02090163 beqz s2,682 <vprintf+0x184>
while(*s != 0){
664: 00094583 lbu a1,0(s2)
668: c9a1 beqz a1,6b8 <vprintf+0x1ba>
putc(fd, *s);
66a: 8556 mv a0,s5
66c: 00000097 auipc ra,0x0
670: dc6080e7 jalr -570(ra) # 432 <putc>
s++;
674: 0905 addi s2,s2,1
while(*s != 0){
676: 00094583 lbu a1,0(s2)
67a: f9e5 bnez a1,66a <vprintf+0x16c>
s = va_arg(ap, char*);
67c: 8b4e mv s6,s3
state = 0;
67e: 4981 li s3,0
680: bdf9 j 55e <vprintf+0x60>
s = "(null)";
682: 00000917 auipc s2,0x0
686: 26e90913 addi s2,s2,622 # 8f0 <malloc+0x128>
while(*s != 0){
68a: 02800593 li a1,40
68e: bff1 j 66a <vprintf+0x16c>
putc(fd, va_arg(ap, uint));
690: 008b0913 addi s2,s6,8
694: 000b4583 lbu a1,0(s6)
698: 8556 mv a0,s5
69a: 00000097 auipc ra,0x0
69e: d98080e7 jalr -616(ra) # 432 <putc>
6a2: 8b4a mv s6,s2
state = 0;
6a4: 4981 li s3,0
6a6: bd65 j 55e <vprintf+0x60>
putc(fd, c);
6a8: 85d2 mv a1,s4
6aa: 8556 mv a0,s5
6ac: 00000097 auipc ra,0x0
6b0: d86080e7 jalr -634(ra) # 432 <putc>
state = 0;
6b4: 4981 li s3,0
6b6: b565 j 55e <vprintf+0x60>
s = va_arg(ap, char*);
6b8: 8b4e mv s6,s3
state = 0;
6ba: 4981 li s3,0
6bc: b54d j 55e <vprintf+0x60>
}
}
}
6be: 70e6 ld ra,120(sp)
6c0: 7446 ld s0,112(sp)
6c2: 74a6 ld s1,104(sp)
6c4: 7906 ld s2,96(sp)
6c6: 69e6 ld s3,88(sp)
6c8: 6a46 ld s4,80(sp)
6ca: 6aa6 ld s5,72(sp)
6cc: 6b06 ld s6,64(sp)
6ce: 7be2 ld s7,56(sp)
6d0: 7c42 ld s8,48(sp)
6d2: 7ca2 ld s9,40(sp)
6d4: 7d02 ld s10,32(sp)
6d6: 6de2 ld s11,24(sp)
6d8: 6109 addi sp,sp,128
6da: 8082 ret
00000000000006dc <fprintf>:
void
fprintf(int fd, const char *fmt, ...)
{
6dc: 715d addi sp,sp,-80
6de: ec06 sd ra,24(sp)
6e0: e822 sd s0,16(sp)
6e2: 1000 addi s0,sp,32
6e4: e010 sd a2,0(s0)
6e6: e414 sd a3,8(s0)
6e8: e818 sd a4,16(s0)
6ea: ec1c sd a5,24(s0)
6ec: 03043023 sd a6,32(s0)
6f0: 03143423 sd a7,40(s0)
va_list ap;
va_start(ap, fmt);
6f4: fe843423 sd s0,-24(s0)
vprintf(fd, fmt, ap);
6f8: 8622 mv a2,s0
6fa: 00000097 auipc ra,0x0
6fe: e04080e7 jalr -508(ra) # 4fe <vprintf>
}
702: 60e2 ld ra,24(sp)
704: 6442 ld s0,16(sp)
706: 6161 addi sp,sp,80
708: 8082 ret
000000000000070a <printf>:
void
printf(const char *fmt, ...)
{
70a: 711d addi sp,sp,-96
70c: ec06 sd ra,24(sp)
70e: e822 sd s0,16(sp)
710: 1000 addi s0,sp,32
712: e40c sd a1,8(s0)
714: e810 sd a2,16(s0)
716: ec14 sd a3,24(s0)
718: f018 sd a4,32(s0)
71a: f41c sd a5,40(s0)
71c: 03043823 sd a6,48(s0)
720: 03143c23 sd a7,56(s0)
va_list ap;
va_start(ap, fmt);
724: 00840613 addi a2,s0,8
728: fec43423 sd a2,-24(s0)
vprintf(1, fmt, ap);
72c: 85aa mv a1,a0
72e: 4505 li a0,1
730: 00000097 auipc ra,0x0
734: dce080e7 jalr -562(ra) # 4fe <vprintf>
}
738: 60e2 ld ra,24(sp)
73a: 6442 ld s0,16(sp)
73c: 6125 addi sp,sp,96
73e: 8082 ret
0000000000000740 <free>:
static Header base;
static Header *freep;
void
free(void *ap)
{
740: 1141 addi sp,sp,-16
742: e422 sd s0,8(sp)
744: 0800 addi s0,sp,16
Header *bp, *p;
bp = (Header*)ap - 1;
746: ff050693 addi a3,a0,-16
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
74a: 00000797 auipc a5,0x0
74e: 1c67b783 ld a5,454(a5) # 910 <freep>
752: a805 j 782 <free+0x42>
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
break;
if(bp + bp->s.size == p->s.ptr){
bp->s.size += p->s.ptr->s.size;
754: 4618 lw a4,8(a2)
756: 9db9 addw a1,a1,a4
758: feb52c23 sw a1,-8(a0)
bp->s.ptr = p->s.ptr->s.ptr;
75c: 6398 ld a4,0(a5)
75e: 6318 ld a4,0(a4)
760: fee53823 sd a4,-16(a0)
764: a091 j 7a8 <free+0x68>
} else
bp->s.ptr = p->s.ptr;
if(p + p->s.size == bp){
p->s.size += bp->s.size;
766: ff852703 lw a4,-8(a0)
76a: 9e39 addw a2,a2,a4
76c: c790 sw a2,8(a5)
p->s.ptr = bp->s.ptr;
76e: ff053703 ld a4,-16(a0)
772: e398 sd a4,0(a5)
774: a099 j 7ba <free+0x7a>
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
776: 6398 ld a4,0(a5)
778: 00e7e463 bltu a5,a4,780 <free+0x40>
77c: 00e6ea63 bltu a3,a4,790 <free+0x50>
{
780: 87ba mv a5,a4
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
782: fed7fae3 bgeu a5,a3,776 <free+0x36>
786: 6398 ld a4,0(a5)
788: 00e6e463 bltu a3,a4,790 <free+0x50>
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
78c: fee7eae3 bltu a5,a4,780 <free+0x40>
if(bp + bp->s.size == p->s.ptr){
790: ff852583 lw a1,-8(a0)
794: 6390 ld a2,0(a5)
796: 02059813 slli a6,a1,0x20
79a: 01c85713 srli a4,a6,0x1c
79e: 9736 add a4,a4,a3
7a0: fae60ae3 beq a2,a4,754 <free+0x14>
bp->s.ptr = p->s.ptr;
7a4: fec53823 sd a2,-16(a0)
if(p + p->s.size == bp){
7a8: 4790 lw a2,8(a5)
7aa: 02061593 slli a1,a2,0x20
7ae: 01c5d713 srli a4,a1,0x1c
7b2: 973e add a4,a4,a5
7b4: fae689e3 beq a3,a4,766 <free+0x26>
} else
p->s.ptr = bp;
7b8: e394 sd a3,0(a5)
freep = p;
7ba: 00000717 auipc a4,0x0
7be: 14f73b23 sd a5,342(a4) # 910 <freep>
}
7c2: 6422 ld s0,8(sp)
7c4: 0141 addi sp,sp,16
7c6: 8082 ret
00000000000007c8 <malloc>:
return freep;
}
void*
malloc(uint nbytes)
{
7c8: 7139 addi sp,sp,-64
7ca: fc06 sd ra,56(sp)
7cc: f822 sd s0,48(sp)
7ce: f426 sd s1,40(sp)
7d0: f04a sd s2,32(sp)
7d2: ec4e sd s3,24(sp)
7d4: e852 sd s4,16(sp)
7d6: e456 sd s5,8(sp)
7d8: e05a sd s6,0(sp)
7da: 0080 addi s0,sp,64
Header *p, *prevp;
uint nunits;
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
7dc: 02051493 slli s1,a0,0x20
7e0: 9081 srli s1,s1,0x20
7e2: 04bd addi s1,s1,15
7e4: 8091 srli s1,s1,0x4
7e6: 0014899b addiw s3,s1,1
7ea: 0485 addi s1,s1,1
if((prevp = freep) == 0){
7ec: 00000517 auipc a0,0x0
7f0: 12453503 ld a0,292(a0) # 910 <freep>
7f4: c515 beqz a0,820 <malloc+0x58>
base.s.ptr = freep = prevp = &base;
base.s.size = 0;
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
7f6: 611c ld a5,0(a0)
if(p->s.size >= nunits){
7f8: 4798 lw a4,8(a5)
7fa: 02977f63 bgeu a4,s1,838 <malloc+0x70>
7fe: 8a4e mv s4,s3
800: 0009871b sext.w a4,s3
804: 6685 lui a3,0x1
806: 00d77363 bgeu a4,a3,80c <malloc+0x44>
80a: 6a05 lui s4,0x1
80c: 000a0b1b sext.w s6,s4
p = sbrk(nu * sizeof(Header));
810: 004a1a1b slliw s4,s4,0x4
p->s.size = nunits;
}
freep = prevp;
return (void*)(p + 1);
}
if(p == freep)
814: 00000917 auipc s2,0x0
818: 0fc90913 addi s2,s2,252 # 910 <freep>
if(p == (char*)-1)
81c: 5afd li s5,-1
81e: a895 j 892 <malloc+0xca>
base.s.ptr = freep = prevp = &base;
820: 00000797 auipc a5,0x0
824: 0f878793 addi a5,a5,248 # 918 <base>
828: 00000717 auipc a4,0x0
82c: 0ef73423 sd a5,232(a4) # 910 <freep>
830: e39c sd a5,0(a5)
base.s.size = 0;
832: 0007a423 sw zero,8(a5)
if(p->s.size >= nunits){
836: b7e1 j 7fe <malloc+0x36>
if(p->s.size == nunits)
838: 02e48c63 beq s1,a4,870 <malloc+0xa8>
p->s.size -= nunits;
83c: 4137073b subw a4,a4,s3
840: c798 sw a4,8(a5)
p += p->s.size;
842: 02071693 slli a3,a4,0x20
846: 01c6d713 srli a4,a3,0x1c
84a: 97ba add a5,a5,a4
p->s.size = nunits;
84c: 0137a423 sw s3,8(a5)
freep = prevp;
850: 00000717 auipc a4,0x0
854: 0ca73023 sd a0,192(a4) # 910 <freep>
return (void*)(p + 1);
858: 01078513 addi a0,a5,16
if((p = morecore(nunits)) == 0)
return 0;
}
}
85c: 70e2 ld ra,56(sp)
85e: 7442 ld s0,48(sp)
860: 74a2 ld s1,40(sp)
862: 7902 ld s2,32(sp)
864: 69e2 ld s3,24(sp)
866: 6a42 ld s4,16(sp)
868: 6aa2 ld s5,8(sp)
86a: 6b02 ld s6,0(sp)
86c: 6121 addi sp,sp,64
86e: 8082 ret
prevp->s.ptr = p->s.ptr;
870: 6398 ld a4,0(a5)
872: e118 sd a4,0(a0)
874: bff1 j 850 <malloc+0x88>
hp->s.size = nu;
876: 01652423 sw s6,8(a0)
free((void*)(hp + 1));
87a: 0541 addi a0,a0,16
87c: 00000097 auipc ra,0x0
880: ec4080e7 jalr -316(ra) # 740 <free>
return freep;
884: 00093503 ld a0,0(s2)
if((p = morecore(nunits)) == 0)
888: d971 beqz a0,85c <malloc+0x94>
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
88a: 611c ld a5,0(a0)
if(p->s.size >= nunits){
88c: 4798 lw a4,8(a5)
88e: fa9775e3 bgeu a4,s1,838 <malloc+0x70>
if(p == freep)
892: 00093703 ld a4,0(s2)
896: 853e mv a0,a5
898: fef719e3 bne a4,a5,88a <malloc+0xc2>
p = sbrk(nu * sizeof(Header));
89c: 8552 mv a0,s4
89e: 00000097 auipc ra,0x0
8a2: b64080e7 jalr -1180(ra) # 402 <sbrk>
if(p == (char*)-1)
8a6: fd5518e3 bne a0,s5,876 <malloc+0xae>
return 0;
8aa: 4501 li a0,0
8ac: bf45 j 85c <malloc+0x94>
|
; A209971: a(n) = A000129(n) + n.
; 0,2,4,8,16,34,76,176,416,994,2388,5752,13872,33474,80796,195040,470848,1136706,2744228,6625128,15994448,38613986,93222380,225058704,543339744,1311738146,3166815988,7645370072,18457556080,44560482178,107578520380,259717522880,627013566080,1513744654978,3654502875972,8822750406856,21300003689616,51422757786018,124145519261580,299713796309104,723573111879712,1746860020068450,4217293152016532
mov $2,1
lpb $0
sub $0,1
add $1,1
add $1,$2
add $3,$2
mov $4,$2
add $2,$3
sub $2,$4
add $3,$4
lpe
|
.global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r12
push %r14
push %r15
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_WT_ht+0x68ed, %rsi
lea addresses_WC_ht+0x1dbf1, %rdi
nop
nop
nop
and %r15, %r15
mov $119, %rcx
rep movsq
nop
xor %rbx, %rbx
lea addresses_WC_ht+0x13def, %r14
clflush (%r14)
nop
nop
nop
nop
xor $44529, %r12
movups (%r14), %xmm1
vpextrq $1, %xmm1, %rcx
nop
nop
nop
nop
add $58786, %rdi
lea addresses_A_ht+0x147f1, %rcx
nop
nop
nop
and $32108, %r14
mov $0x6162636465666768, %rsi
movq %rsi, %xmm1
movups %xmm1, (%rcx)
nop
nop
nop
nop
cmp %rcx, %rcx
lea addresses_UC_ht+0x6675, %r14
nop
cmp $53080, %rcx
mov $0x6162636465666768, %rdi
movq %rdi, (%r14)
nop
and $63768, %r14
lea addresses_D_ht+0x15df1, %r15
nop
nop
nop
nop
add %rdi, %rdi
mov (%r15), %rbx
nop
nop
add $57020, %r15
lea addresses_A_ht+0x4f71, %rcx
nop
nop
nop
nop
nop
xor %rsi, %rsi
mov (%rcx), %ebx
nop
nop
cmp %rdi, %rdi
lea addresses_UC_ht+0x1258f, %rsi
lea addresses_WT_ht+0x31f1, %rdi
clflush (%rsi)
clflush (%rdi)
cmp %r11, %r11
mov $92, %rcx
rep movsw
nop
nop
nop
sub %r12, %r12
lea addresses_UC_ht+0x12331, %r11
nop
nop
nop
sub %rcx, %rcx
movw $0x6162, (%r11)
nop
nop
nop
nop
nop
cmp %rcx, %rcx
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %r15
pop %r14
pop %r12
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r14
push %r15
push %r8
push %rax
push %rbx
push %rcx
// Store
lea addresses_UC+0x1dff1, %r14
sub %r11, %r11
movb $0x51, (%r14)
nop
nop
nop
and $39451, %r15
// Store
lea addresses_PSE+0x71f1, %rcx
dec %r8
mov $0x5152535455565758, %rbx
movq %rbx, (%rcx)
nop
nop
nop
nop
add %r14, %r14
// Store
lea addresses_WC+0x1e7f1, %r8
nop
nop
nop
nop
nop
add %rax, %rax
mov $0x5152535455565758, %rcx
movq %rcx, (%r8)
nop
nop
nop
nop
dec %r15
// Load
lea addresses_WT+0x1d271, %rax
nop
nop
cmp %rcx, %rcx
movb (%rax), %r14b
sub $52540, %r11
// Store
lea addresses_D+0x277d, %r15
add %r11, %r11
movw $0x5152, (%r15)
nop
cmp $62043, %r15
// Store
lea addresses_A+0x3ff1, %r15
nop
nop
nop
dec %rax
mov $0x5152535455565758, %r14
movq %r14, (%r15)
nop
nop
sub %r11, %r11
// Store
lea addresses_A+0xb3f1, %r8
nop
xor $30339, %rax
mov $0x5152535455565758, %r11
movq %r11, %xmm7
vmovups %ymm7, (%r8)
nop
nop
nop
nop
nop
cmp $8521, %rbx
// Store
lea addresses_normal+0x1def1, %rcx
nop
nop
inc %r11
mov $0x5152535455565758, %r14
movq %r14, %xmm3
vmovups %ymm3, (%rcx)
and $42779, %r14
// Store
lea addresses_WC+0x10205, %rax
add $44246, %rcx
mov $0x5152535455565758, %r8
movq %r8, %xmm7
movups %xmm7, (%rax)
nop
nop
nop
nop
sub %r14, %r14
// Store
lea addresses_D+0x1bef1, %rbx
nop
nop
nop
nop
cmp $13593, %r8
mov $0x5152535455565758, %r15
movq %r15, (%rbx)
nop
nop
nop
nop
inc %rbx
// Load
lea addresses_D+0x1bff1, %r11
and $59559, %r14
movups (%r11), %xmm3
vpextrq $1, %xmm3, %r15
nop
nop
dec %r15
// Store
lea addresses_normal+0x14171, %rbx
nop
cmp $25447, %rcx
mov $0x5152535455565758, %rax
movq %rax, %xmm7
vmovups %ymm7, (%rbx)
sub $551, %rcx
// Faulty Load
lea addresses_WC+0x1e7f1, %rax
nop
nop
nop
nop
nop
cmp $57411, %r11
vmovups (%rax), %ymm6
vextracti128 $0, %ymm6, %xmm6
vpextrq $1, %xmm6, %r15
lea oracles, %rcx
and $0xff, %r15
shlq $12, %r15
mov (%rcx,%r15,1), %r15
pop %rcx
pop %rbx
pop %rax
pop %r8
pop %r15
pop %r14
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 16, 'type': 'addresses_WC', 'congruent': 0}}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 1, 'type': 'addresses_UC', 'congruent': 5}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 8, 'type': 'addresses_PSE', 'congruent': 9}, 'OP': 'STOR'}
{'dst': {'same': True, 'NT': False, 'AVXalign': False, 'size': 8, 'type': 'addresses_WC', 'congruent': 0}, 'OP': 'STOR'}
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 1, 'type': 'addresses_WT', 'congruent': 7}}
{'dst': {'same': False, 'NT': True, 'AVXalign': True, 'size': 2, 'type': 'addresses_D', 'congruent': 2}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': True, 'size': 8, 'type': 'addresses_A', 'congruent': 11}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 32, 'type': 'addresses_A', 'congruent': 10}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 32, 'type': 'addresses_normal', 'congruent': 8}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 16, 'type': 'addresses_WC', 'congruent': 0}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': True, 'size': 8, 'type': 'addresses_D', 'congruent': 8}, 'OP': 'STOR'}
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 16, 'type': 'addresses_D', 'congruent': 9}}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 32, 'type': 'addresses_normal', 'congruent': 3}, 'OP': 'STOR'}
[Faulty Load]
{'OP': 'LOAD', 'src': {'same': True, 'NT': False, 'AVXalign': False, 'size': 32, 'type': 'addresses_WC', 'congruent': 0}}
<gen_prepare_buffer>
{'dst': {'same': False, 'congruent': 10, 'type': 'addresses_WC_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 2, 'type': 'addresses_WT_ht'}}
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 16, 'type': 'addresses_WC_ht', 'congruent': 0}}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 16, 'type': 'addresses_A_ht', 'congruent': 8}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 8, 'type': 'addresses_UC_ht', 'congruent': 2}, 'OP': 'STOR'}
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 8, 'type': 'addresses_D_ht', 'congruent': 9}}
{'OP': 'LOAD', 'src': {'same': True, 'NT': True, 'AVXalign': False, 'size': 4, 'type': 'addresses_A_ht', 'congruent': 6}}
{'dst': {'same': False, 'congruent': 8, 'type': 'addresses_WT_ht'}, 'OP': 'REPM', 'src': {'same': True, 'congruent': 1, 'type': 'addresses_UC_ht'}}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 2, 'type': 'addresses_UC_ht', 'congruent': 6}, 'OP': 'STOR'}
{'38': 21829}
38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38
*/
|
; A029883: First differences of Thue-Morse sequence A001285.
; 1,0,-1,1,-1,0,1,0,-1,0,1,-1,1,0,-1,1,-1,0,1,-1,1,0,-1,0,1,0,-1,1,-1,0,1,0,-1,0,1,-1,1,0,-1,0,1,0,-1,1,-1,0,1,-1,1,0,-1,1,-1,0,1,0,-1,0,1,-1,1,0,-1,1,-1,0,1,-1,1,0,-1,0,1,0,-1,1,-1,0,1,-1,1,0,-1,1,-1,0,1,0,-1,0,1,-1,1,0,-1,0,1,0,-1,1
seq $0,36577 ; Ternary Thue-Morse sequence: closed under a->abc, b->ac, c->b.
sub $0,1
|
; A129194: a(n) = n^2*(3/4 - (-1)^n/4).
; 0,1,2,9,8,25,18,49,32,81,50,121,72,169,98,225,128,289,162,361,200,441,242,529,288,625,338,729,392,841,450,961,512,1089,578,1225,648,1369,722,1521,800,1681,882,1849,968,2025,1058,2209,1152,2401,1250,2601,1352,2809,1458,3025,1568,3249,1682,3481,1800,3721,1922,3969,2048,4225,2178,4489,2312,4761,2450,5041,2592,5329,2738,5625,2888,5929,3042,6241,3200,6561,3362,6889,3528,7225,3698,7569,3872,7921,4050,8281,4232,8649,4418,9025,4608,9409,4802,9801,5000,10201,5202,10609,5408,11025,5618,11449,5832,11881,6050,12321,6272,12769,6498,13225,6728,13689,6962,14161,7200,14641,7442,15129,7688,15625,7938,16129,8192,16641,8450,17161,8712,17689,8978,18225,9248,18769,9522,19321,9800,19881,10082,20449,10368,21025,10658,21609,10952,22201,11250,22801,11552,23409,11858,24025,12168,24649,12482,25281,12800,25921,13122,26569,13448,27225,13778,27889,14112,28561,14450,29241,14792,29929,15138,30625,15488,31329,15842,32041,16200,32761,16562,33489,16928,34225,17298,34969,17672,35721,18050,36481,18432,37249,18818,38025,19208,38809,19602,39601,20000,40401,20402,41209,20808,42025,21218,42849,21632,43681,22050,44521,22472,45369,22898,46225,23328,47089,23762,47961,24200,48841,24642,49729,25088,50625,25538,51529,25992,52441,26450,53361,26912,54289,27378,55225,27848,56169,28322,57121,28800,58081,29282,59049,29768,60025,30258,61009,30752,62001
mov $1,$0
mul $1,$0
gcd $0,2
div $1,$0
|
#include <boost/config/warning_disable.hpp>
#define BOOST_SPIRIT_USE_PHOENIX_V3
#define BOOST_SPIRIT_UNICODE
#include "text/rigger.h"
#include "utf8.h"
#include <boost/spirit/include/qi.hpp>
#include <boost/spirit/include/support_standard_wide.hpp>
#include <boost/spirit/include/qi_parse.hpp>
#include <boost/phoenix.hpp>
#include <boost/foreach.hpp>
using namespace std;
namespace qi = boost::spirit::qi ;
namespace ascii = boost::spirit::ascii ;
/**
* @brief encoding 的定义,方便切换编码实现.
*/
namespace encoding = boost::spirit::unicode;
namespace px = boost::phoenix ;
namespace fu = boost::fusion ;
typedef std::wstring xstring ;
namespace pylon { namespace rigger {
// struct parser::impl
// {/*{{{*/
// };/*}}}*/
bool parser::xpath_split(const std::wstring& path, conf::path_arr_t& arr)
{
using namespace qi::labels;
typedef std::wstring::const_iterator wstrc_iterator;
wstrc_iterator iter = path.begin();
wstrc_iterator end = path.end();
qi::rule<wstrc_iterator,conf::path_arr_t(),encoding::space_type> xpath ;
qi::rule<wstrc_iterator,std::wstring(),encoding::space_type> obj_key ;
qi::rule<wstrc_iterator,unsigned int(),encoding::space_type> arr_key ;
obj_key = +(qi::unicode::char_ - L'.')[ _val += _1 ] ;
xpath = (obj_key [ px::push_back(_val,_1)] ) % L'.' ;
bool r = qi::phrase_parse(iter,end,xpath,encoding::space,arr);
return r ;
}
}
}
|
;; Prints "Hello, World!"
;;
;; nasm -felf64 hello_world.asm && ld hello_world.o && ./a.out
global _start
section .text
_start:
mov rax, 1 ; syscall code for write into rax/R0
mov rdi, 1 ; file handle 1 - stdout into rdi/R7
mov rsi, message ; output string pointer into rsi/R6
mov rdx, 13 ; number of bytes into rdx/R2
syscall ; performing the write
mov rax, 60 ; syscall code for exit
xor rdi, rdi ; 0 into rdi/R7 - exit code 0
syscall ; perform the exit
section .data
message:
db "Hello, World!", 10
|
.386p
page 58,132
;=============================================================================
title W I N S R C H - searches for EMS and UMB windows
;=============================================================================
;==
;== (C) Copyright MICROSOFT Corp. 1990-1991
;== (C) Copyright COMPAQ Computer Corp. 1990-1991
;==
;== Title: EMM386.EXE - MICROSOFT Expanded Memory Manager 386 Driver
;==
;== Module: WinSrch - searches for EMS and UMB windows
;==
;== Version: 1.00
;==
;== Date: July 9,1990
;==
;== Author: Leo Cohen
;== (some routines extracted from ROM_SRCH.ASM: Daniel J. Mazina,
;== Richard D. Vail,
;== & Patrick Wu)
;==
;=============================================================================
;==
;== Change Log:
;==
;== DATE REVISION Description
;== -------- -------- --------------------------------------------
;== 07/09/90 0.00 Original (* routines from ROM_SRCH.ASM)
;==
;== 01/18/91 M002 use xchg instead of move to write into
;== adapter space for ram determination.
;==
;== 01/30/91 M004 When trying to reclaim shadow ROM in routine
;== CheckForCompaqROM, check to make sure that
;== the offset of the int 10 vector lies within
;== ROM length as specifed in the ROM header.
;==
;=============================================================================
;==
;== Functional Description:
;==
;== This module determines the areas which will be used by CEMM. These
;== areas include: page frame, other EMS windows above base memory, UMB
;== windows, and EMS base memory windows. It analyzes the user parameters
;== and detects ROM and RAM areas to best determine these EMS/UMB windows.
;==
;==
;=============================================================================
;== P U B L I C D E C L A R A T I O N S
;=============================================================================
public Page4K
public UMBtable
public NumOfUMBwindows
public FindWindowLocations
public ROMcheck
public RAMcheck
ifdef ROMCOMP
public ROMstart
endif
public CPQvideoROM
public DefaultROM
public DefaultInclude
public ProcessRange
public ExcludeRange
public RangeOverlap
public SetFlag
public GetPageFrame
public SetPageFrame
public EMSwindows
public UMBwindows
public BaseEMSwindows
public CheckEMSwindow
public CheckPageFrame
public CheckForROMHeader
public CheckForCompaqROM
public UpdatePageArray
public PFB_warning
public IsCompaq
;=============================================================================
;== E X T E R N A L D E C L A R A T I O N S
;=============================================================================
LAST segment
ifdef ROMCOMP
extrn UnProtectROM:near
extrn ProtectROM:near
extrn FixROMptrs:near
endif
extrn Pn:byte
extrn PnSet:word
extrn eXcSet:word
extrn IncSet:word
extrn DfltSet:word
extrn RAMSet:word
extrn ROMSet:word
extrn EMSSet:word
extrn WINset:word
extrn HighSet:word
extrn VGAROM:word
extrn E000ROM:word
extrn ROMparm:byte
extrn pCOMPAQ:dword
extrn szCOMPAQ:byte
extrn UMBset:byte
extrn PS2DATA:byte
extrn Highscan:byte
extrn NoTR:byte
extrn RangeSets:byte
extrn RangeSave:byte
extrn RANGESIZE:abs
extrn HRAMSet:word
extrn BRAMSet:word
extrn ToshSet:word
extrn TOSHbeg:word
extrn TOSHend:word
extrn toshiba_machine:byte
LAST ends
_DATA segment
extrn ROMID:byte
_DATA ends
;=============================================================================
;== L O C A L C O N S T A N T S
;=============================================================================
include vdmseg.inc
include emm386.inc
include romstruc.equ
include emmfunct.inc
include emmdata.inc
include ps2ex.inc
include ps2equ.inc
include eisaex.inc
;=============================================================================
;== For ROM, RAM, and CPQ Video ROM search
;=============================================================================
FIRST_ROM_SEGMENT = 01000H ; Segment address of first option ROM.
LAST_ROM_SEGMENT = 0DF80H ; Segment address of last option ROM.*A
FIRST_RAM_SEGMENT = 01000H ; Seg address of 1st possible RAM addr
;910520 LAST_RAM_SEGMENT= 0DF80H ; Seg addr of last possible RAM addr
LAST_RAM_SEGMENT = 0EF80H ; Seg addr of last possible RAM addr 910520
REMAP_VIDEO_ROM_SEGMENT = 0E000H ; Seg address of optional sys rom
ROM_SIGNATURE = 0AA55h
NEXT_ROM_SEG = 080H ; 2K seg increment to next ROM location
ROUND_BY_2K_SEG = 0FF80h ; rounding factor for 2k seg addresses
SIZE_OF_16K_PAGE = 0400h ; length of a EMS page in paragraphs
;=============================================================================
;== For XMA2EMS mode
;=============================================================================
P0 EQU 1
P1 EQU 1 SHL 1
P2 EQU 1 SHL 2
P3 EQU 1 SHL 3
P254 EQU 1 SHL 4
P255 EQU 1 SHL 5
;=============================================================================
;== C O D E S E G M E N T
;=============================================================================
LAST segment
assume cs:LAST,ds:_DATA,gs:R_CODE
;=============================================================================
;== L O C A L D A T A
;=============================================================================
; Data items between ZeroInitData and ZeroInitSize are set to zero (suprise)
; when FindWindowsLocations is called since it may be called more than once.
ZeroInitData label byte
PFB_warning dw 0
Page4K db 256 dup (0)
NumOfUMBwindows db 0
UMBtable db 128 dup (0)
ZEROINITSIZE equ $-ZeroInitData
LastChanceBuf db 4*1024 dup(0)
SetTable label word
dw offset LAST:DfltSet
dw offset LAST:HRAMSet
dw offset LAST:BRAMSet
dw offset LAST:ToshSet
dw offset LAST:eXcSet
dw offset LAST:RAMSet
dw offset LAST:ROMSet
dw offset LAST:EMSSet
dw offset LAST:WINset
NumberOfSets equ ($-SetTable)/2
Pass db -1
EISAdata db (size GSI_data) dup (?)
ifdef ROMCOMP
ROM64k db 'DEP'
Num64kROMs equ $-ROM64k
ROM40k db 'BHL'
Num40kROMs equ $-ROM40k
ROM32k db 'FG'
Num32kROMs equ $-ROM32k
ROMstart dw 0
endif
ROMChangeCount equ 20
;===============================================================================
;==
;== FindWindowLocations: This routine creates an array of 256 entries. Each
;== entry represents a 4K page in the first megabyte.
;== After searching the option ROM area, it marks any
;== entry which included ROM or RAM appropriately. Then
;== it takes the user defined ranges from the command line
;== and merges this information into this array. This
;== array is then analyzed to create the UMB and EMS
;== windows necessary for operation.
;==
;== Entry
;== cs:PF_windows[] = table of possible page frame addresses.
;== cs:DefltSet[] = array of default unused areas.
;== cs:eXcSet[] = array of user specified areas to exclude.
;== cs:IncSet[] = array of user specified areas to include.
;== cs:RAMSet[] = array of user specified areas to include RAM.
;== cs:EMSet[] = array of user specified areas to include EMS.
;== CS = LAST segment
;== DS = _DATA segment
;== GS = R_CODE segment
;==
;== Exit
;== ds:EMS_window[] = initialized
;== ds:EMS_window_locations[] = initialized
;== ds:EMSsegLoc[] = initialized
;== ds:[number_EMS_windows] = initialized
;== ds:UMBtable[] = initialized
;== ds:[XMA2EMS] = initialized
;== gs:[PF_Base] = initialized
;==
;===============================================================================
FindWindowLocations proc near
pushad
cld
; This routine may be called more than once, so after the first pass
; some data must be reinitialized.
push cs
pop es
inc Pass ; Q: 1st time?
jnz short FWLagain ; N:
mov cx, RANGESIZE ; 1st time, save inital state
mov si, offset LAST:RangeSets ; of the ranges so they can
mov di, offset LAST:RangeSave ; be reused next time.
rep movs byte ptr es:[di], es:[si]
jmp short FWLcont
FWLagain:
xor ax, ax ; 2nd time, zero initialize
mov cx, ZEROINITSIZE ; some data
mov di, offset LAST:ZeroInitData
rep stosb
mov cx, RANGESIZE ; and restore the saved ranges
mov si, offset LAST:RangeSave
mov di, offset LAST:RangeSets
rep movs byte ptr es:[di], es:[si]
FWLcont:
;
; Get first 16K multiple PTE entry after base memory. Used for base EMS windows.
;
int 12h
shr ax,2 ; 4K page
add ax,3 ; round up
and ax,0FFFCh ; multiple of 4K
mov [end_of_base_memory_PTE],ax
;
; Determine default memory areas not to use for EMS/UMB windows.
;
call DefaultROM
; Check for Token Ring card
call CheckToken
; Check Toshiba special exclude areas
call Toshiba_exclude
ifdef E000
; Determine if can 'deshadow' video ROM at E000h
test gs:[GenFlags], fMCA ; Q: MCA
jnz short FWLskipE000 ; Y: E000 is other ROM
call CheckE000
FWLskipE000:
endif
;
; Check if Include ranges are for RAM or EMS: if no RAM switches, then EMS
;
call DefaultInclude
;
; If this is an MCA machine we'll do the detection of adapters using the
; POS bytes.
;
ifdef ROMIDMCA
xor ax, ax ; Assume that POS did not work
cmp [ROMID],ROMIDPS2 ; Q: Is it a PS2
jne short FWLromscan ; N: do rom scan
endif
test gs:[GenFlags], fMCA ; Q: MCA
jz short FWLchkEISA ; N: check if EISA
; Y: do POS detection
call ExcludePS2Options
jmp short FWLromscan
FWLchkEISA:
test gs:[GenFlags], fEISA ; Q: EISA
jz FWLromscan ; N: do rom scan
call ExcludeEISAOptions
;
; Detect Option ROMs
;
FWLromscan:
call ROMcheck
;
; Detect Compaq VIDEO ROM
;
call CPQVideoROM
;
; Check if ROM can be mapped over by RAM
;
ifdef ROMCOMP
call CPQROMcheck
endif
call ROMcompress
;ifndef IBMCOPYRIGHT
; IBM version doesn't do this because their QBASIC uses ROM Basic
call ROMbasic
;endif
;
; Process Default, Exclude, Include, RAM, and EMS range arrays (sets)
;
xor bx,bx
mov cx,NumberOfSets ; number of range arrays
FWLsetLoop:
mov si,cs:[SetTable][bx] ; get array address
call ProcessRange
add bx,2
loop FWLsetLoop
;
; Detect Option RAM
;
call RAMcheck
;
; Mark HighScan regions as available
;
lea si, cs:[HighSet]
call ProcessRange
;
; We now try to scan again using Ralph's algo
;
push edx
mov edx, 0c0h ; start c0h
FWLscanagn:
call LastChanceScan
inc edx
cmp edx, 0f0h ; until efh
jb short FWLscanagn
pop edx
;
; Make sure there are no overlaps in the ranges: Exclude takes precedence.
;
call RangeOverlap
; On a Toshiba system, don't allow the user to put the EMS page frame over
; reserved upper memory.
call ToshInvPFbase
;
; Now the EMS/UMB windows are selected: First get a page frame address
;
call GetPageFrame
;
; Set up the page frame
;
call SetPageFrame
;
; Set up EMS windows in the 640K to 1MB region
;
call EMSwindows
;
; Set up UMB windows in the 640K to 1MB region
;
call UMBwindows
;
; Set up base EMS windows
;
call BaseEMSwindows
popad
ret
FindWindowLocations endp
;===============================================================================
;==
;== ROMcheck: Detect Option ROMs.
;== This section of code searches the auxiliary rom area
;== (from C0000 up to E0000) in 2K increments. A ROM checksum is
;== calculated to insure that the ROMs are valid. Valid ROMs must
;== have the 1st byte = 55H and the next byte = 0AAH. The next
;== byte indicates the size of the ROM in 512-byte blocks. The
;== sum of all bytes in the ROM, modulo 256, must be zero.
;==
;== If a ROM is not found at a location, the next location 2K-bytes
;== down is examined. However, if it is found, the next location
;== after this ROM is tried. The next ROM location is determine
;== according to the size of the previous ROM.
;==
;== Enter:
;== Page4K[BX] = uninitialzed with detected ROM locations.
;==
;== Exit:
;== Page4K[BX] = initialzed with detected ROM locations.
;==
;===============================================================================
ROMcheck proc near
push ax
;
; Memory above 640k is searched for any VIDEO or option ROMs located there.
;
;QLEO mov ax,FIRST_ROM_SEGMENT
mov ax,[end_of_base_memory_PTE]
shl ax,8
RcNextROMlocation:
call CheckForROMHeader
ifndef MSFLAG
jc short RcROMDetected
sub ax,NEXT_ROM_SEG
call CheckPrechargeBus
endif
jnc short RcLast
RcROMDetected:
call UpdatePageArray
RcLast:
cmp ax,LAST_ROM_SEGMENT
jbe short RcNextROMlocation
pop ax
ret
ROMcheck endp
;===============================================================================
;==
;== RAMcheck: Detect RAM mapped in the Option ROM space.
;==
;== Enter:
;== Page4K[BX] = uninitialzed with detected RAM locations.
;==
;== Exit:
;== Page4K[BX] = initialzed with detected RAM locations. (Unusable)
;==
;===============================================================================
RAMcheck proc near
push ax
;
; ROM area is checked to insure no common RAM is mapped in the option space.
;
;QLEO mov ax,FIRST_RAM_SEGMENT
mov ax,[end_of_base_memory_PTE]
shl ax,8
RAcNextRAMlocation:
call CheckForMappedRAM
jnc short RAcLast
call UpdatePageArray
RAcLast:
cmp ax,LAST_RAM_SEGMENT
jbe short RAcNextRAMlocation
pop ax
ret
RAMcheck endp
;===============================================================================
;==
;== CPQVideoROM: Detect Compaq Video ROM.
;==
;== Enter:
;== Page4K[BX] = uninitialized for E000h segment.
;==
;== Exit:
;== Page4K[BX] = E000h segment is either usable or INUSE.
;==
;===============================================================================
CPQVideoROM proc near
push ax
;
; The option ROM area that sometimes Compaq's VIDEO ROM is remapped to is
; checked. If nothing is there then fine.
;
mov ax,REMAP_VIDEO_ROM_SEGMENT
call CheckForROMHeader
jnc short CVRexit
;
; If there is something there then check to see if it is Compaq's VIDEO ROM.
; If it is (CY = clear) then this area can still be used as a EMS window.
; Otherwise it can't.
;
call CheckForCompaqROM
jc short CVR_InUse
; Identified Video ROM @ E000, add it to our high scan set as being available
movzx di, byte ptr cs:[HighSet]
add byte ptr cs:[HighSet], 4
mov word ptr cs:[HighSet][di], 0E000h ; start of video rom
dec ax
mov word ptr cs:[HighSet][di+2], ax ; end of video rom
jmp short CVRexit
CVR_InUse:
call UpdatePageArray
CVRexit:
pop ax
ret
CPQVideoROM endp
ifdef ROMCOMP
;===============================================================================
;==
;== CPQROMcheck: Detect CPQ ROMs which have unused space in the F000 segment.
;==
;== 32K ROMs F000:0 - F000:7FFF = mirror image of
;== F000:8000 - F000:FFFF
;==
;== 386G Deskpr 386/16, 386/20, 386/25
;== 386F Deskpro 386s
;== 386H Deskpro 386/20e (Horizon only)
;==
;== 40K ROMs F000:0 - F000:5FFF junk
;== F000:6000 - F000:FFFF = system ROM
;==
;== 386H Deskpro 386/20e (Gambler only)
;== 386H Deskpro 386/25e
;== 386L Deskpro 386/33
;==
;== 64K ROMs F000:0 - F000:FFFF
;==
;== 386P Portable 386
;== 386E Systempro/Deskpro 486/25
;== 386D Deskpro 386n
;==
;== The pointers which need to be changed in order to
;== reclaim the lower 32K space include:
;==
;== 1BD0 dummy end of interrupt handler
;== 1C1F IRQ 9 entry point
;== 1C28 287 error entry point
;== 20FB diskette parameter table entry point
;== 2E12 fixed disk BIOS entry point
;== 2FA4 old fixed disk hardware entry point
;== 3343 fixed disk hardware entry point
;== 4A97 real-time clock entry point
;==
;== Enter:
;==
;== Exit:
;==
;===============================================================================
pCutTable equ 801Eh ; pointer to cut-off table
CTsig equ 1234h ; signature
tSegBase equ 1 ; segment base
tPOST equ 2 ; POST
tRunTime equ 3 ; Run-Time
tSetup equ 4 ; Setup
tVideo equ 5 ; System video (int 42h)
tProt16 equ 6 ; 16 bit protected mode capable code
tProt32 equ 7 ; 32 bit protected mode capable code
sCutTable struc
sCTsig dw CTsig ; signature
sCTnum db ? ; number of entries
sCTtype db ? ; type of entry
sCTaddr dw ? ; address
sCutTable ends
sCutTableEntry struc
sCTEtype db ? ; type of entry
sCTEaddr dw ? ; address
sCutTableEntry ends
CPQROMcheck proc near
pusha
push ds
push es
push fs
call IsCompaq ;Q: Is it a Compaq 386
jnz CRcExit ; N: can't use ROM space
cmp cs:[ROMparm],TRUE ;Q: Was ROM(Compress) parameter set?
jne CRcExit ; N: don't use ROM space
cmp cs:[UMBset],TRUE ;Q: Was RAM specified?
je short CRcRAM ; Y: RAM was implied
cmp gs:[NoEMSset],TRUE ;Q: Was NoEMS specified?
je short CRcRAM ; Y: RAM was implied
cmp gs:[NoPFset],TRUE ;Q: Was FRAME=NONE specified?
jne CRcExit ; N: RAM not implied
;
; Need to detect ROMs, include RAM, and fix the vectors (end of init)
;
CRcRAM:
mov ax,0F000h
mov fs,ax
mov ax,cs
mov es,ax
assume es:LAST
;
; Access cut-off table
;
mov bx,fs:[pCutTable] ; get pointer to cut-off table
cmp fs:[bx].sCTsig,CTsig ;Q: Is this a valid table?
jne CRcExit ; N: no ROM compression
movzx cx,fs:[bx].sCTnum ; Y: get number of entries
jcxz CRcExit ; no ROM compression if no entries
;
; Get segment base (assume F0000h)
;
push bx
CRcBase:
mov ax,fs:[bx].sCTaddr ; get possible base
cmp fs:[bx].sCTtype,tSegBase;Q: Is this the segment base entry?
je short CRcBaseDone ; Y: get base
add bx,size sCutTableEntry ; N: next entry
loop CRcBase
mov ax,0F000h ; default to F000h
CRcBaseDone:
pop bx
;
; Get size of POST code
;
movzx cx,fs:[bx].sCTnum ; get number of entries again
CRcPOST:
cmp fs:[bx].sCTtype,tPOST ;Q: Is this the POST entry?
je short CRcPOSTdone ; Y: get base
add bx,size sCutTableEntry ; N: next entry
loop CRcPOST
jmp short CRcExit ; no ROM compression if no entries
CRcPOSTdone:
mov bx,fs:[bx].sCTaddr ; get size of POST
inc bx
jmp short CRcAddRAM ; map RAM
ifdef ROMCOMP
mov al,fs:[0FFE4h] ; get ROM type
;
; Check for 64K ROMs
;
lea di,ROM64k
mov cx,Num64kROMs
repne scas ROM64k ;Q: 64K ROM?
je CRcExit ; Y: no ROM compression
;
; Check for 40K ROMs
;
mov bx,6000h ; start of 40K ROMs
lea di,ROM40k
mov cx,Num40kROMs
repne scas ROM40k ;Q: 40K ROM?
je short CRcCompress ; Y: ROM compression
;
; Check for 32K ROMs
;
mov bx,8000h ; start of 32K ROMs
lea di,ROM32k
mov cx,Num32kROMs
repne scas ROM32k ;Q: 32K ROM?
jne CRcExit ; N: no ROM compression
;
; Compress the System ROM
;
CRcCompress:
or gs:[GenFlags],fROMComp ; set ROM compression flag
mov cs:[ROMstart],bx ; save starting of ROM after compression
;
; Map lower image of ROM with RAM
;
mov ax,0F000h ; start of RAM
endif
CRcAddRAM:
shr bx,4
add bx,ax ; end of RAM
dec bx
movzx di,byte ptr cs:[RAMset] ; add to RAM list
add byte ptr cs:[RAMset],4
mov cs:[RAMset][di],ax ; from F000h ...
mov cs:[RAMset][di][2],bx ; ... to either F800h or F600h
CRcExit:
pop fs
pop es
pop ds
popa
ret
assume es:nothing
CPQROMcheck endp
endif ; ROMCOMP
;===============================================================================
;==
;== ROMcompress: Check to see if lower 32k of system ROM can be mapped over by
;== RAM. This code was adapted from Helix.
;==
;== Enter:
;==
;== Exit:
;==
;===============================================================================
public ROMcompress
ROMcompress proc near
cmp cs:[Highscan], TRUE
jne RcQuickExit
pusha
push es
push ds
call chkt2mrg ;check for type 2 merge
assume ds:nothing, es:nothing
jc short domerge ;if found skip type 1 check
mov ax, 0f000h ;first 3000h words (12k)
mov ds, ax ; at f000:0000 & f000:8000
mov es, ax ; must be the same
xor si, si
mov di, 8000h
mov cx, 3000h
cld
repe cmpsw
jne short RcExit
xor si,si
mov ds,si
mov cx,128
chkvecs:lodsw
mov dx,ax
lodsw
cmp ax,0f000h
jne short @f
cmp dx,8000h
jae short @f
cmp si,32h*4 ;cpm jump?
je short @f ;skip it
cmp dx,6000h
jae short RcExit
@@: loop chkvecs
domerge:xor si,si
mov ds,si
mov cx,128
merge: lodsw
mov dx,ax
lodsw
cmp ax,0f000h
jne short @f
cmp dx,8000h
jae short @f
add word ptr [si-4],8000h
@@: loop merge
; Make sure BIOS points to INT 13h entry point on upper 32K image by making an
; INT 2Fh AH=13h (DOS 3.20 and later): changes the INT 13h calls from IBMBIO.
; Note: Does not affect DOS 3.00-3.10, but valid only on DOS 3.20 and later.
mov ah,13h
int 2fh
mov ax,ds
cmp ax,0f000h
jne short @f
or dx,8000h
@@: mov ax,es
cmp ax,0f000h
jne short @f
or bx,8000h
@@: mov ah,13h
int 2fh
; Add 32k ROM area to RAM list
movzx di, byte ptr cs:[HighSet]
add byte ptr cs:[HighSet], 4
mov word ptr cs:[HighSet][di], 0f000h ; from F000h
mov word ptr cs:[HighSet][di+2], 0f7ffh ; to F7FFh
RcExit:
pop ds
pop es
popa
RcQuickExit:
ret
ROMcompress endp
chkt2mrg proc near
xor si,si
mov ds,si
mov cx,128
cld
chkt2a: lodsw
mov bx,ax
lodsw
cmp ax,0f000h
jne short @f
cmp bx,8000h
jae short @f
mov es,ax
cmp si,32h*4 ;cpm jump?
je short @f
cmp byte ptr es:[bx],0e9h ;check for jmp $+8000
jne short chkt2ng
cmp word ptr es:[bx+1],7ffdh ;
jne short chkt2ng
@@: loop chkt2a
mov ah,8
mov dl,0
int 13h
mov ax,es
mov ds,ax
mov si,di
or si,8000h
mov cx,11
repe cmpsb
jne short chkt2ng
mov ah,8
mov dl,1
int 13h
mov ax,es
mov ds,ax
mov si,di
or si,8000h
mov cx,11
repe cmpsb
jne short chkt2ng
mov ah,8
mov dl,80h
int 13h
mov ax,es
mov ds,ax
mov si,di
or si,8000h
mov cx,11
repe cmpsb
jne short chkt2ng
stc
ret
chkt2ng:clc
ret
chkt2mrg endp
assume ds:_DATA
;ifndef IBMCOPYRIGHT
; IBM version doesn't do this because their QBASIC uses ROM Basic
;===============================================================================
;==
;== ROMbasic: Check to see if machine has ROM basic that can be mapped
;== over by RAM. This code was adapted from Helix.
;==
;== Enter:
;==
;== Exit:
;==
;===============================================================================
public ROMbasic
basic_id db 'The IBM Personal Computer Basic'
basic_id_length equ $-basic_id
ROMbasic proc near
push es
cmp cs:[Highscan], TRUE
jne RbNoBasic
test gs:[GenFlags], fMCA ; Q: MCA
jnz short RbChk4Basic ; Y: look for ROM basic
mov ax,3518h ; code from Helix to look for ROM basic
int 21h ; on non-MCA machines
mov ax,es
cmp ax,0f600h
jne short RbNoBasic
cmp bx,0
jne short RbNoBasic
mov di,8000h
mov cx,32
mov al,'I'
cld
repne scasb
jne short RbNoBasic
cmp word ptr es:[di],'MB'
jne short RbNoBasic
; We either have an MCA machine, or a non MCA which looks like it might have
; ROM basic (non MCA PS/2). Do a more detailed ROM Basic search.
RbChk4Basic:
mov ax,0f600h ; more code from Helix
mov es,ax
xor di,di
mov cx,8000h-basic_id_length
mov al, cs:[basic_id]
basic_loop:
repne scasb
jne short RbNoBasic
push cx
push di
mov si,offset LAST:basic_id+1
mov cx,basic_id_length-1
push ds
push cs
pop ds
rep cmpsb
pop ds
pop di
pop cx
jne short basic_loop
; Looks like we found ROM basic, add 32k to our HighScan set
movzx di, byte ptr cs:[HighSet]
add byte ptr cs:[HighSet], 4
mov word ptr cs:[HighSet][di], 0f600h ; from F600h
mov word ptr cs:[HighSet][di+2], 0fdffh ; to FDFFh
RbNoBasic:
pop es
ret
ROMbasic endp
;endif IBMCOPYRIGHT
;===============================================================================
;==
;== DefaultROM: Check to see if C600-C7FF should be excluded due to a bad CPQ
;== Video ROM.
;==
;== Enter:
;==
;== Exit:
;==
;===============================================================================
DefaultROM proc near
push ds
call IsCompaq ;Q: Is it a Compaq 386
jnz short DRcheckMCA ; N: check if E000 should be excluded
;
; Check if CPQ video ROMs are dated between 01/16/90 and 07/30/90
;
push 0C000h
pop ds
cmp word ptr ds:[5FFBh],'09';Q: VGA ROMs from '90?
jne short DRcheckE000 ; N: no problem
cmp byte ptr ds:[5FFAh],'/' ;Q: VGA ROMs have format mm/dd/yy?
jne short DRcheckE000 ; N: no problem
cmp byte ptr ds:[5FF7h],'/' ;Q: VGA ROMs have format mm/dd/yy?
jne short DRcheckE000 ; N: no problem
cmp byte ptr ds:[5FF5h],'0' ;Q: VGA ROMs have format mm/dd/yy?
jne short DRcheckE000 ; N: no problem
cmp byte ptr ds:[5FF6h],'7' ;Q: VGA ROMs after July?
ja short DRcheckE000 ; Y: no problem
cmp byte ptr ds:[5FF6h],'1' ;Q: VGA ROMs after January?
ja short DRexcC7FF ; Y: problem, exclude to C7FF
cmp byte ptr ds:[5FF8h],'1' ;Q: After Jan 20, 1990?
ja short DRexcC7FF ; Y: exclude
jb short DRcheckE000 ; N: no problem
cmp byte ptr ds:[5FF9h],'6' ;Q: Before Jan 16, 1990?
jb short DRcheckE000 ; Y: no problem
DRexcC7FF:
mov cs:[VGAROM],0C7FFh ; exclude to C7FFh area
jmp short DRcheckE000
DRcheckMCA:
test gs:[GenFlags], fMCA ; Q: MCA system
jz short DRexit ; N: finished
mov cs:[VGAROM],0BFFFh ; Y: include C000 ROM area
mov cs:[E000ROM],0E000h ; and exclude E000 ROM area
DRcheckE000:
;
; DO NOT ADD ANY CODE BETWEEN DRcheckE000 & DRexit
;
DRexit:
pop ds
ret
DefaultROM endp
;===============================================================================
;==
;== CheckToken: Checks for Token Ring card. Adapted from code by Helix.
;==
;== Enter:
;==
;== Exit:
;==
;===============================================================================
public CheckToken
CheckToken proc near
push si
push di
push es
cmp cs:[NoTR], TRUE ;Don't do it if disabled
je CT_exit
mov dx,0a20h ;load primary base i/o address
in al,dx ;get BIOS/MMIO address
cmp al,0ffh ;token ring adapter present ?
jne short gottr ;yes
mov dx,0a24h ;load alternate base i/o address
in al,dx ;get BIOS/MMIO address
cmp al,0ffh ;token ring adapter present ?
je short CT_exit ;no
gottr: and al,0fch ;mask off interrupt bits
shr al,1 ;shift to correct position
or al,80h ;mask on high bit
mov ah,al ;load ah with result
mov al,0 ;zero al
mov es,ax ;load es with rom address
mov si,1f00h ;point to adapter id area
mov cx,12 ;load id word length
chkid: lods word ptr es:[si] ;get id byte
and al,0fh ;mask off high nybble
xor al,0fh ;complement value
mov ah,es:[si+16h] ;get complement id byte
and ah,0fh ;mask off high nybble
cmp al,ah ;does complement id byte match ?
jne short CT_exit ;no
loop chkid ;iterate loop
push dx ;save port address
mov bx, es ;mark the 8k ROM space as INUSE
mov dl, INUSE
call SetFlag
inc bh ;2nd 4k page of ROM
call SetFlag
pop dx
test gs:[GenFlags], fMCA ; Q: MCA system
jnz CT_mca ; Y:
mov ah, es:[1E00h] ; N: get shared RAM addr on ISA
jmp short CT_len
CT_mca: ;get shared RAM address on MCA
inc dx ;add 2 to I/O address
inc dx
in al, dx ;get shifted RAM address
and al, 0FEh ;mask off low bit
mov ah, al
CT_len:
xor al, al ;ax = paragraph RAM address
xor ch, ch
mov cl, es:[1E01h] ;get shared RAM size
and cl, 0Ch ;(bits 2&3: 00=8k, 01=16k,
shr cl, 1 ; 10=32k, 11=64k)
shr cl, 1
inc cl
shl cl, 1 ;cx = RAM size in 4k pages
mov bx, ax ;mark the shared RAM space
mov dl, INUSE ; as INUSE
CT_set_ram:
call SetFlag
inc bh
loop CT_set_ram
CT_exit:
pop es
pop di
pop si
ret
CheckToken endp
ifdef E000
;===============================================================================
;==
;== CheckE000: Determines if E000h area is available by default. Adapted
;== from code by Helix.
;==
;== Enter:
;==
;== Exit:
;==
;===============================================================================
public CheckE000
CheckE000 proc near
; DefaultROM will have set E000ROM to 0E000h if this is not a Compaq
; system. This causes E000h-EFFFh to be excluded as ROM by default,
; but we want to be a little smarter than that. If we can identify
; and 'deshadow' a video bios in the E000h area, E000h is made available
; by default.
push ds
push es
assume ds:nothing, es:nothing
cmp cs:[Highscan], TRUE
jne CE_exit
mov ax,0e000h ; from Helix...
mov es,ax
cmp word ptr es:[0],0aa55h
jne short CE_exit
mov ch,es:[2]
mov cl,0
push ds
mov ax,0c000h
mov ds,ax
xor si,si
xor di,di
rep cmpsw
pop ds
jne short CE_exit
call deshadow_command
jc short CE_exit
; 'Deshadowed' the video rom, add first 32k of E000 as RAM. Why 32k?
; That's what Helix does!
movzx di, byte ptr cs:[HighSet]
add byte ptr cs:[HighSet], 4
mov word ptr cs:[HighSet][di], 0E000h ; from E000h
mov word ptr cs:[HighSet][di+2], 0E7FFh ; to E7FFh
CE_exit:
pop es
pop ds
ret
CheckE000 endp
public deshadow_command
deshadow_command proc near
push ax ;save work regs
push bx ;...
push cx ;...
push si ;...
push di ;...
push ds ;...
push es ;...
; scan interrupt vectors for those pointing to E000 area
xor ax,ax ;assume IDT at zero
mov es,ax ;...
xor di,di ;zero offset
deshadow_command_2:
mov ax,word ptr es:[di] ;get offset
shr ax,4 ;...
add ax,word ptr es:[di+2] ;add in segment to get abs. seg
jc short deshadow_command_4 ;overflow= bigger then ff
cmp ah,0e0h ;if not between e0
jb short deshadow_command_4
cmp ah,0e7h ;and e7
ja short deshadow_command_4 ; skip
; vector found pointing to E000 area
mov bx,di ;save offset of vector found
lds si,es:[di] ;point DS:SI at target area
mov ax,ds ;convert to C000 address
sub ax,2000h ;...
mov es,ax ;equivalent area of C000
mov di,si ;same offset
mov cx,100h ;check for 256 bytes the same
repe cmpsb ;compare two areas
jne short deshadow_command_error ;problems
; code in C000 seems to be the same as in the E000 area
xor ax,ax ;restore vector pointer
mov es,ax ;...
mov di,bx ;...
sub byte ptr es:[di+3],20h ;change E000 vector to C000
deshadow_command_4:
add di,4 ;step to next vector
cmp di,320h ;if more to check,
jb short deshadow_command_2 ;look at the next vector
; complete IDT scanned with no problem cases
pop es ;restore entry regs
pop ds ;...
pop di ;...
pop si ;...
pop cx ;...
pop bx ;...
pop ax ;...
clc ;clear carry for ok
ret ;& return
deshadow_command_error:
pop es ;restore entry regs
pop ds ;...
pop di ;...
pop si ;...
pop dx ;...
pop cx ;...
pop bx ;...
pop ax ;...
xor dx,dx
stc ;set carry for error
ret ;& return
deshadow_command endp
assume ds:_DATA
endif
;===============================================================================
;==
;== DefaultInclude: Determines if Include parameter is for RAM or EMS.
;==
;== Enter:
;== cs:IncSet[1] = RAM
;==
;== Exit:
;== cs:IncSet[1] = RAM or EMS
;==
;===============================================================================
DefaultInclude proc near
push ax
push bx
push si
push di
lea bx,cs:[RAMSet] ; assume RAM
xor si,si
cmp cs:[UMBset],TRUE ;Q: Was RAM specified?
je short DItran ; Y: RAM was implied
cmp gs:[NoEMSset],TRUE ;Q: Was NoEMS specified?
je short DItran ; Y: RAM was implied
cmp gs:[NoPFset],TRUE ;Q: Was FRAME=NONE specified?
je short DItran ; Y: RAM was implied
;
; No RAM parameters were specified, thus Include is taken as EMS windows.
;
lea bx,cs:[EMSSet] ; default is EMS
;
; Move Include ranges to either RAM or EMS ranges
;
DItran:
movzx di,byte ptr cs:[bx] ; get pointer into RAM/EMS set
mov ax,cs:[IncSet][2][si] ; get address from INCLUDE set
mov cs:[bx][di],ax ; save in RAM/EMS set
or ax,ax ;Q: Any more addresses?
jz short DIexit ; N: exit
add si,2 ; Y: increment to next address
add byte ptr cs:[bx],2
jmp short DItran ; get next address
DIexit:
pop di
pop si
pop bx
pop ax
ret
DefaultInclude endp
;===============================================================================
;==
;== ProcessRange: Process range array constructed by the parser and transfer
;== information to the [Page4K] array. The parser array has
;== the following structure:
;==
;== 0 [n*4+2|array flag]
;== 2 [ entry # 1 FROM ]
;== 4 [ entry # 1 TO ]
;== 6 [ entry # 2 FROM ]
;== 8 [ entry # 2 TO ]
;== : : : : : : :
;== n*4-2 [ entry # n FROM ]
;== n*4+2 [ entry # n TO ]
;==
;== Enter:
;== SI = address of parser range array to process.
;== Page4K[0..255] = Uninitialized with flag in parser array.
;==
;== Exit:
;== Page4K[0..255] = Initialized with this flag.
;==
;===============================================================================
ProcessRange proc near
push ax
push bx
push dx
push ds
mov ax,seg LAST
mov ds,ax
assume ds:LAST
mov dl,byte ptr [si+1] ; array flag (include,exclude,RAM,EMS,etc...)
add si,2 ; point ro first range
PRnext:
lodsw ; Get FROM
or ax,ax ;Q: Any more ranges?
jz short PRexit ; N: finished processing
mov bx,ax ; Y: BX has lower limit
call SetFlag ; set flag for FROM value
lodsw ; AX has upper limit
PRnextPage:
add bx,100h ; next 4K page
jc PRnext ; if overflow, goto next range
cmp bx,ax ;Q: Has upper limit been reached?
ja PRnext ; Y: Try next range (X=FROM-TO)
call SetFlag ; N: set flag for next 4K page
jmp short PRnextPage
PRexit:
pop ds
pop dx
pop bx
pop ax
ret
assume ds:_DATA
ProcessRange endp
;===============================================================================
;==
;== ExcludeRange: Exclude range in Page4K[] array.
;==
;== Enter:
;== AX = starting paragraph address
;== BX = ending paragraph address
;==
;== Exit:
;== Page4K[AX-BX] = EXCLUDE
;==
;===============================================================================
ExcludeRange proc near
push bx
push dx
mov dl,EXCLUDE
ERloop:
call SetFlag
sub bx,100h
cmp ax,bx ;Q: End of range?
jbe short ERloop ; N: continue excluding
pop dx
pop bx
ret
ExcludeRange endp
;===============================================================================
;==
;== SetFlag: Set proper flag in Page4K[] array.
;==
;== Enter:
;== DL = proper flag.
;== BX = index to Page4K[] array.
;==
;== Exit:
;== Page4K[BX] = DL
;==
;===============================================================================
SetFlag proc near
push bx
shr bx,8 ; paragraph to 4K page
and cs:[Page4K][bx],not INUSE ; no longer INUSE
or cs:[Page4K][bx],dl ; mark with current flag
pop bx
ret
SetFlag endp
;===============================================================================
;==
;== RangeOverlap: Checks Include/eXclude/RAM/EMS ranges for overlap. Exclude
;== has precedence over WIN, RAM or EMS. WIN has precedence
;== over RAM or EMS. RAM has precedence over EMS.
;==
;== Enter:
;== Page4K[] array completely filled out.
;==
;== Exit:
;== [msg_flag] = Overlap_MSG flag set if an overlap is detected.
;==
;===============================================================================
RangeOverlap proc near
push ecx
mov ecx,100h ; loop through 256 entries
ROPage4K:
test cs:[Page4K][ecx-1],EMS+RAM+ROM+WIN ;Q: EMS,RAM,ROM or WIN set?
jz short ROnextPage4K ; N: next 4K page
test cs:[Page4K][ecx-1],EXCLUDE ;Q: Is this page also excluded?
jz short RO4KWINpage ; N: try WIN
and cs:[Page4K][ecx-1],EXCLUDE ; Y: mark 4K page as excluded
jmp short ROmsg ; warn user with msg
RO4KWINpage:
test cs:[Page4K][ecx-1],EMS+RAM+ROM ;Q: EMS,RAM,or ROM set?
jz short ROnextPage4K ; N: next 4K page
test cs:[Page4K][ecx-1],WIN ;Q: Is this page also WIN?
jz short RO4KRAMpage ; N: try RAM
and cs:[Page4K][ecx-1],WIN ; Y: mark 4K page as WIN
;;; jmp short ROmsg ; warn user with msg
jmp short RONextPage4K ; no warning for WIN= overlap
; (MEMMAKER makes WIN= overlaps)
RO4KRAMpage:
test cs:[Page4K][ecx-1],RAM+ROM ;Q: Is RAM or ROM set?
jz short ROnextPage4K ; N: EMS only, next 4K page
btr cs:[Page4K][ecx-1],EMSbit ;Q: Is RAM/ROM and EMS set?
jnc short ROnextPage4K ; N: RAM only, next 4K page
ROmsg:
or gs:[msg_flag],Overlap_MSG ; range overlap message
ROnextPage4K:
loop ROPage4K
pop ecx
ret
RangeOverlap endp
;===============================================================================
;==
;== GetPageFrame: Given the user has not selected a page frame base address,
;== this routine will find an available 64K area.
;==
;== Enter:
;== Page4K[] array completely filled out.
;==
;== Exit:
;== [PF_Base] = page frame base address
;==
;===============================================================================
GetPageFrame proc near
;
; Check to see if the base address of the page frame needs to be selected
;
cmp gs:[NoEMSset],TRUE ;Q: Has NoEMS switch been used?
je short GPFexit ; Y: don't select one.
cmp gs:[NoPFset],TRUE ;Q: Has FRAME=NONE switch been used?
je short GPFexit ; Y: don't select one.
cmp gs:[PF_Base],FREE ;Q: Has page frame been selected?
jne short GPFexit ; Y: don't reselect one.
test cs:[PnSet],P0+P1+P2+P3 ;Q: XMA2EMS mode selected?
jnz short GPFexit ; Y: don't select page frame
;
; Check default page frame address of E000h for a conflict
;
mov ax,0E000h ; default page frame address
call CheckPageFrame ; check for a page frame
or bx,bx ;Q: Conflict?
jz short GPFfound ; N: found page frame
;
; Check area from 8000h to F000h for page frame with no conflict.
;
mov dx,[end_of_base_memory_PTE] ; get lowest PTE candidate
shl dx,8 ; paragraph address
mov ax,0F000h ; highest page frame possible
cmp dx,8000h ;Q: Above 512K?
jae short GPFfind ; Y: continue
mov dx,8000h ; N: lowest possible page frame address
GPFfind:
call CheckPageFrame ; check [AX] for a page frame
or bx,bx ;Q: Conflict?
jz short GPFfound ; N: found page frame
sub ax,400h ; Y: try 16K lower
cmp ax,dx ;Q: Valid page frame address?
jae short GPFfind ; Y: try this address range
mov ax,FREE ; N: no page frame address found
GPFfound:
mov gs:[PF_Base],ax ; save page frame address
GPFexit:
ret
GetPageFrame endp
;===============================================================================
;==
;== SetPageFrame: Given a page frame address, it sets up the EMS_window[],
;== EMS_window_location[], and EMSsegLoc[].
;==
;==
;== Enter:
;== [PF_Base] page frame base address assigned.
;== Page4K[] array completely filled out.
;==
;== Exit:
;== EMS_window_location[]
;== EMSsegLoc[]
;== Page4K[] array completely filled out.
;==
;===============================================================================
SetPageFrame proc near
mov [number_EMS_windows],0 ; save number of EMS windows
;
; Check to see if the base address of the page frame needs to be set
;
cmp gs:[NoEMSset],TRUE ;Q: Has NoEMS switch been used?
je SPFexit ; Y: don't select one.
cmp gs:[NoPFset],TRUE ;Q: Has FRAME=NONE switch been used?
je SPFexit ; Y: don't select one.
cmp gs:[PF_Base],FREE ;Q: Has page frame been selected?
je SPFexit ; N: don't set one.
test cs:[PnSet],P0+P1+P2+P3 ;Q: XMA2EMS mode selected?
jnz short SPFinvParm ; Y: don't select page frame
mov ax,gs:[PF_Base] ; get page frame address
;
; Make sure page frame was not set in base memory
;
mov bx,[end_of_base_memory_PTE] ; get lowest PTE candidate
shl bx,8 ; paragraph address
cmp ax,bx ;Q: Valid page frame address?
jae short SPFcont ; Y: continue
mov gs:[PF_Base],FREE ; N: can not load
jmp short SPFexit
SPFcont:
;
; Exclude range from Page4K[] array and check for conflicts
;
mov bx,ax
shr bx,8 ; paragraph to 4K page
mov cx,16
SPFConflictLoop:
test cs:[Page4K][bx],not (EMS or RAM);Q: Marked for usage other than EMS?
jz short SPFnoConflict ; N: no conflict
or gs:[msg_flag],PF_WARN_MSG ; Y: warn user of conflict
SPFnoConflict:
or cs:[Page4K][bx],EXCLUDE ; exclude from usage
inc bx
loop SPFConflictLoop ; continue excluding
;
; Initialize EMS_window_location[], EMSsegLoc[], and EMS_window[] with information
;
mov bx,ax
add bx,0C00h ; EMS window number 3
shr bx,8
mov ecx,4 ; number of windows in page frame
SPFloop:
mov [EMS_window_location][ecx*2-2],bx ; address of window
;QEMS mov [EMS_window][ecx*2+ecx-3].handle,FREE ; window is free
mov [EMSsegLoc][bx],cl ; window index
dec [EMSsegLoc][bx] ; window index
sub bx,4 ; next window
loop SPFloop
mov [number_EMS_windows],4 ; save number of EMS windows
SPFexit:
ret
SPFinvParm:
or gs:[msg_flag],INV_PARM_MSG
jmp short SPFexit
SetPageFrame endp
;===============================================================================
;==
;== EMSwindows:
;==
;==
;==
;== Enter:
;== Page4K[] array completely filled out.
;==
;== Exit:
;== EMS_window_location[]
;== Page4K[] array completely filled out.
;==
;===============================================================================
EMSwindows proc near
;
; Check to see if EMS windows are needed
;
cmp gs:[NoEMSset],TRUE ;Q: Has NoEMS switch been used?
je EwExit ; Y: don't create EMS windows
cmp gs:[NoPFset],TRUE ;Q: Has FRAME=NONE switch been used?
je EwExit ; Y: don't create EMS windows
test cs:[PnSet],P0+P1+P2+P3+P254+P255 ;Q: XMA2EMS mode selected?
jnz short EwXMA2EMS ; Y: set XMA2EMS mode
;
; Create as many EMS windows as possible in the 640K to 1MB region.
;
mov ax,[end_of_base_memory_PTE] ; get lowest PTE candidate
add ax,3
shr ax,2 ; round to next 16K boundary
mov cx,100h shr 2 ; 1MB index in 16K blocks
sub cx,ax ; number of PTE entries to 1MB
shl ax,10 ; paragraph address
movzx esi,[number_EMS_windows]; get number of EMS windows so far
EwLoop:
mov bx,EMS ; erase EMS flag
call CheckEMSWindow
test bx,not EMS ;Q: Conflict?
jnz short EwNext ; Y: try next 16K window
test bx,EMS ;Q: Is this page specified as EMS?
jnz short Ewfound ; Y: use for EMS
cmp cs:[UMBset],TRUE ;Q: Has RAM switch been used?
je EwNext ; Y: use RAM as default
; N: use EMS as default
EwFound:
mov bx,ax ; N: exclude range
add bx,3FFh
call ExcludeRange
;
; Set up EMS_window_location[] and EMS_Window[]
;
mov bx,ax
shr bx,8
mov [EMS_window_location][esi*2],bx
;QEMS mov [EMS_window][esi*2+esi].handle,FREE
xchg ax,si
mov [EMSsegLoc][bx],al ; window index
xchg ax,si
inc si
EwNext:
add ax,400h ; next window
loop EwLoop
mov [number_EMS_windows],si ; save number of EMS windows
jmp EwExit
;
; Need to place CEMM in XMA2EMS mode.
;
EwXMA2EMS:
mov [XMA2EMS],TRUE ; configure in XMA2EMS mode
cmp gs:[PF_Base],FREE ;Q: Has a page frame been set?
je short EwXPn ; N: just look at Pn set
mov ax,gs:[PF_Base] ; Y: get base address
shr ax,8 ; get PTE index
mov cx,4 ;
xor bx,bx
EwXloop:
mov Pn[bx],al ; save starting address
bts [PnSet],bx ; set Pn value
inc bx ; next Pn value
add al,4 ; next window base address
loop EwXloop
;
; Check conflicts with P0-P3 & P254-P255
;
EwXPn:
xor esi,esi ; index into Pn
xor dx,dx ; number of EMS windows
mov cx,6 ; check P0-3 & P254-255
EwXPnLoop:
bt [PnSet],si ;Q: Is this P set?
jnc short EwXnextPn ; N: skip it
mov al,Pn[si] ; Y: get address
xor bx,bx
shl ax,8 ; change to paragraph
cmp gs:[PF_Base],FREE ;Q: Has a page frame been set?
je short EwXcont1 ; N: check for conflicts
cmp si,3 ;Q: PF has already been tested?
jbe short EwXcont ; Y: don't check
EwXcont1: ; N: check if valid EMS page
call CheckEMSWindow ; check for conflict
;
;QLEO: Need a message if this conflicts with a page marked as RAM
;
test bx,EXCLUDE ;Q: Is this window excluded?
jnz short EwNoWay ; Y: can't do it
test bx,INUSE ;Q: Is there a ROM in the window?
jz short EwXcont ; N: continue
mov cs:[PFB_warning],TRUE ; Y: warn user
EwXcont:
;
; Set up EMS_window_location[] and EMS_Window[]
;
mov bx,ax
shr bx,8
mov [EMS_window_location][esi*2],bx
;QEMS mov [EMS_window][esi*2+esi].handle,FREE
xchg ax,si
mov [EMSsegLoc][bx],al ; window index
xchg ax,si
;
; Exclude window range from available area
;
mov bx,ax
add bx,3FFh
call ExcludeRange
inc dx ;@PIW
EwXnextPn:
inc si
loop EwXPnLoop
mov [number_EMS_windows],dx ; number of EMS windows
;
; Now that all Pn's are set, can a page frame be formed?
;
EwXPF:
mov cx,3
mov esi,3
mov ax,[EMS_window_location][esi*2]
EwXPFset:
dec si
mov bx,[EMS_window_location][esi*2]
sub ax,bx
cmp ax,4 ;Q: Are they next to each other?
jne short EwXnoPF ; N: page frame is not available
mov ax,bx ; Y: get last address
loop EwXPFset
shl ax,8
mov gs:[PF_Base],ax ; save page frame address
jmp short EwExit
EwExit:
ret
EwXnoPF:
or gs:[msg_flag],NO_LIM_PF_MSG ; no page frame warning
jmp short EwExit
EwNoWay:
mov gs:[PF_Base],FREE
jmp short EwExit
EMSwindows endp
;===============================================================================
;==
;== UMBwindows:
;==
;==
;== Enter:
;== Page4K[] array completely filled out.
;==
;== Exit:
;== EMS_window_location[]
;== Page4K[] array completely filled out.
;==
;===============================================================================
UMBwindows proc near
mov bx,[end_of_base_memory_PTE] ; get lowest PTE candidate
mov cx,100h ; 1MB PTE entry
sub cx,bx ; number of PTE entries to 1MB
xor si,si
UMBloop:
test cs:[Page4K][bx],not (RAM+ROM);Q: Is this page used?
jnz short UMBnotFound ; Y: no UMB here
test cs:[Page4K][bx],RAM+ROM ;Q: Is this page specified as RAM or ROM?
jnz short UMBfound ; Y: use as a UMB
cmp gs:[NoEMSset],TRUE ;Q: Has NoEMS switch been used?
je UMBfound ; Y: UMBs implied
cmp gs:[NoPFset],TRUE ;Q: Has FRAME=NONE switch been used?
je UMBfound ; Y: UMBs implied
cmp cs:[UMBset],TRUE ;Q: Has RAM switch been used?
jne UMBnotFound ; N: no RAM by default
UMBfound:
test cs:[Page4K][bx],ROM ;Q: Is this page specified as ROM?
jnz short UMBcont ; Y: don't add to base memory
cmp [end_of_base_memory_PTE],bx;Q: Is this adjacent to base memory?
jne short UMBcont ; N: don't add to base memory
inc [end_of_base_memory_PTE] ; Y: Add to base memory?
UMBcont:
;QLEO or cs:[Page4K][bx],EXCLUDE
mov cs:[UMBtable][si],bl
inc si
UMBnotFound:
inc bx
loop UMBloop
UMBend:
mov bx,si
mov cs:[NumOfUMBwindows],bl
ret
UMBwindows endp
;===============================================================================
;==
;== BaseEMSwindows:
;==
;==
;==
;== Enter:
;== Page4K[] array completely filled out.
;==
;== Exit:
;== EMS_window_location[]
;== Page4K[] array completely filled out.
;==
;===============================================================================
BaseEMSwindows proc near
;
; Check to see if base EMS windows are needed
;
ifdef NoEMS
cmp gs:[NoEMSset],TRUE ;Q: [NoEMS] mode?
je short BEwExit ; Y: no base EMS windows
endif
cmp [XMA2EMS],TRUE ;Q: XMA2EMS mode?
je short BEwExit ; Y: no base EMS windows
movzx esi,[number_EMS_windows]; get number of EMS windows so far
mov cx,[end_of_base_memory_PTE] ; beyond base window
add cx,3
shr cx,2
xor ax,ax
BEwLoop:
xor bx,bx
call CheckEMSWindow
test bx,not (EMS+RAM)
jnz short BEwNext
mov bx,ax
shr bx,8
mov [EMS_window_location][esi*2],bx
;QEMS mov [EMS_window][esi*2+esi].handle,FREE
xchg ax,si
mov [EMSsegLoc][bx],al ; window index
xchg ax,si
mov bx,ax
add bx,3FFh
call ExcludeRange
inc si
BEwNext:
add ax,400h
loop BEwLoop
mov [number_EMS_windows],si
BEwExit:
ret
BaseEMSwindows endp
;===============================================================================
;==
;== CheckEMSWindow: Given a starting paragraph address, this routine will
;== return a composite of all the flags encountered in the
;== 16K range.
;==
;== Enter:
;== AX = Starting paragraph
;== BX = flag to clear from range: EMS, RAM, EXCLUDE, INUSE
;==
;== Exit:
;== AX = same
;== BX = 0 No conflict. No carry.
;== EXCLUDE Conflict with an excluded 4K page
;== RAM Conflict with a RAM 4K page
;== INUSE Conflict with a default excluded area
;==
;===============================================================================
CheckEMSWindow proc near
push ax
push cx
push dx
not bx ; complement flag
mov dx,bx ; flag to clear
mov bx,ax ; starting paragraph address
xor ax,ax ; clear flags
shr bx,8
mov cx,4
CEWloop:
or al,cs:[Page4K][bx]
and cs:[Page4K][bx],dl
inc bx
loop CEWloop
mov bx,ax
and bx,not EMS
pop dx
pop cx
pop ax
ret
CheckEMSWindow endp
;===============================================================================
;==
;== CheckPageFrame: Given a starting paragraph address, this routine will
;== return a composite of all the flags encountered in the
;== 64K range.
;==
;== Enter:
;== AX = Starting paragraph
;==
;== Exit:
;== AX = same
;== BX = 0 No conflict. No carry.
;== EXCLUDE Conflict with an excluded 4K page
;== RAM Conflict with a RAM 4K page
;== INUSE Conflict with a default excluded area
;==
;===============================================================================
CheckPageFrame proc near
push ax
push cx
push dx
xor dx,dx
mov cx,4
CPFloop:
xor bx,bx
call CheckEMSWindow
or dx,bx
add ax,400h
loop CPFloop
mov bx,dx
pop dx
pop cx
pop ax
ret
CheckPageFrame endp
;===============================================================================
;==
;== UpdatePageArray: Updates page array (Page4K[]) with detected ROM/RAM.
;==
;== Enter:
;== AX = Paragraph address of next ROM/RAM position.
;== DX = Length of ROM/RAM in paragraphs
;==
;== Exit:
;== [Page4K] updated
;==
;==
;===============================================================================
UpdatePageArray proc near
push bx
mov bx,ax
sub bx,dx ; start of ROM/RAM
UPAloop:
shr bx,8 ; index into 4K page
or cs:[Page4K][bx],INUSE ; mark it used
inc bx ; next page
shl bx,8 ; paragraph address
cmp bx,ax ;Q: Still in the ROM/RAM area?
jb short UPAloop ; Y: mark this page as used
pop bx
ret
UpdatePageArray endp
ifndef MSFLAG
;===============================================================================
;==
;== CheckPrechargeBus: Detects a ROM which did not include a ROM header.
;== The routine expects a floating bus to be precharged
;== to either 00 or FF. Thus, if any other pattern is read,
;== a non-standard ROM will be reported.
;==
;== Enter:
;== AX = Paragraph address of next ROM/RAM position.
;==
;== Exit:
;== CY = A non-standard ROM was found at this location.
;== NC = Did not find a valid ROM at this location.
;== AX = Paragraph address of next ROM location.
;== DX = Length of this ROM in paragraphs
;==
;==
;===============================================================================
CheckPrechargeBus proc near
push ds
;
; Assume no ROM will be found: Floating Bus
;
mov ds,ax
mov dx,NEXT_ROM_SEG
add ax,dx
;
; Check for precharge of low
;
cmp dword ptr ds:[4],0
jne short CPBcheckFF
cmp dword ptr ds:[8],0
jne short CPBROMdetected
cmp dword ptr ds:[12],0
jne short CPBROMdetected
jmp short CPBFloatingBus
;
; Check for precharge of high
;
CPBcheckFF:
cmp dword ptr ds:[4],-1
jne short CPBROMdetected
cmp dword ptr ds:[8],-1
jne short CPBROMdetected
cmp dword ptr ds:[12],-1
je short CPBFloatingBus
;
; ROM detected
;
CPBROMdetected:
stc
jmp short CPBexit
;
; Floating Bus was detected (no ROM)
;
CPBFloatingBus:
clc
CPBexit:
pop ds
ret
CheckPrechargeBus endp
endif
;******************************************************************************
; CheckForROMHeader
;
; ENTRY
; AX = Segment address of ROM.
; EXIT
; CY = Found a VDU ROM at this location.
; NC = Did not find a valid ROM at this location.
; AX = Segment address of NEXT ROM location.
; DX = Length of this ROM in paragraphs
;
; DESCRIPTION
; This routine looks at the ROM located at the segment address
; specified in AX to see if 0TH and 1ST Bytes = 0AA55H.
; If so, it calculates the checksum over the length of
; ROM. If the checksum is valid it updates AX to point
; to the location of the next ROM.
;
; For option ROMs, the layout of each valid ROM is as follows:
;
; OFFSET +-----------------------+
; 0 | 55h |
; +-----------------------+
; 1 | AAh |
; +-----------------------+
; 2 | ROM size / 512 |
; +-----------------------+
; 3 | Start of init code |
; :
; n-1 | |
; +-----------------------+
; (Sum of all bytes MOD 100h is 00h.)
;
;******************************************************************************
CheckForROMHeader proc near
push ds
; The ROM segment address is loaded into DS and the memory
; is tested to see if the ROM signature is there.
mov ds,ax
xor bx,bx
cmp [bx].ROM_RECOGNITION,ROM_SIGNATURE
jne SHORT CFR_no_ROM_found
; If a ROM signature is there than compute the ROM's checksum.
; The size of the ROM is stored as the number of 512 bytes
; blocks. It is loaded into CX as the number of bytes.
xor esi,esi
xor ecx,ecx
mov ch,[bx].ROM_LEN
shl ecx,1
or ecx,ecx ;Q: 128K ROM?
jnz SHORT CFRcont ; N: continue
mov ecx,20000h ; Y: 128K ROM
CFRcont:
mov edx,ecx
; Each byte is loaded from the ROM area and added to the
; checksum in BL. At the end of the loop the value in BL
; should be zero. If not than this isn't a ROM.
CFR_next_byte:
lodsb
add bl,al
dec ecx
jnz short CFR_next_byte
or bl,bl ;Q: Is this a ROM?
jnz short CFR_no_ROM_found ; N: ROM not found
; If this is reached then the address reflects a ROM. The
; size of the ROM in DX is in bytes and is converted into
; the number of paragraphs.
; The original ROM address in DS is loaded into AX and
; incremented to point to the next possible ROM segment.
shr edx,4
mov ax,ds
add dx,NEXT_ROM_SEG - 1 ;increment to next
and dx,ROUND_BY_2K_SEG ;truncate to 2K boundary
add ax,dx
stc
jmp SHORT CFR_return_code
; If this is not a ROM then the next possible address
; is changed into a paragraph count.
; The original ROM address in DS is loaded into AX and
; incremented to point to the next possible ROM segment.
CFR_no_ROM_found:
mov dx,NEXT_ROM_SEG
mov ax,ds
add ax,dx
clc
CFR_return_code:
pop ds
ret
CheckForROMHeader endp
;******************************************************************************
; CheckForCompaqROM
;
; ENTRY
; none
; EXIT
; CY - If set then the area is not Compaq's VIDEO ROM and can not be used.
; But, it must be removed from the window map
; - AX = next ROM segment
; - DX = ROM length in paragraphs
; DESCRIPTION
;
;******************************************************************************
CheckForCompaqROM proc near
; The entrance registers are saved.
push ds
push es
ifdef E000
; Can't be Compaq's ROM if not a Compaq system
call IsCompaq
jnz short CFCR_not_Compaqs_ROM
endif
; The data in the ROM area is compared to the data at
; the default VIDEO rom area.
; DS:SI is the default location for COMPAQ's VIDEO ROM.
push 0C000h
pop ds
xor esi,esi
; ES:DI is the ROM location to verfify
push REMAP_VIDEO_ROM_SEGMENT
pop es
xor di,di
; The data in the two ROM areas are now checked to see if they
; are the same. DX is the ROM length in paragraphs.
mov cx,dx
shl cx,2
repe cmpsd
jne short CFCR_not_Compaqs_ROM
; If the ROM data matches then now the VIDEO ROM location
; interrupt vector is checked to see if it was remapped.
xor esi,esi
mov ds,si
ASSUME DS:ABS0
cmp [int10+2],REMAP_VIDEO_ROM_SEGMENT
jne short CFCR_not_Compaqs_ROM
; No one has hooked the int 10 vector. Now check to make
; sure the offset of the int 10 vector lies within the ROM
; length specifed in the header. This is an attempt to
; prevent us from reclaiming the shadow on ROMs that do not
; specify their length correctly.
;
mov cx, dx ; dx has length in paras
shl cx, 4 ; cx has length in bytes
cmp cx, [int10] ; Q: is the ROM lentgh <= the offset of int10
jbe short CFCR_not_Compaqs_ROM
; Y: do not recalim shadow
; If this is reached then the ROM appears to be Compaq's
; VIDEO ROM remapped so set the appropriate state.
push R_CODE
pop ds
assume ds:R_CODE
or [Current_State],fState_CEGAinst
mov [CROM_Length],dx
clc
jmp SHORT CFCR_return_code
CFCR_not_Compaqs_ROM:
stc
CFCR_return_code:
pop es
pop ds
ASSUME ds:_DATA
ret
CheckForCompaqROM endp
;******************************************************************************
; CheckForMappedRAM
;
; ENTRY
; AX = Segment address for RAM search.
; EXIT
; CY = Found RAM at this location.
; NC = Did not find RAM at this location.
; AX = Segment address of next RAM location.
; DX = Length of this RAM
;
; DESCRIPTION
; This routine looks at the address range potentially used
; by the Page Frame to determine if any RAM is in the way.
; It updates the map accordingly.
;******************************************************************************
CheckForMappedRAM proc near
push cx
push ds
pushf
cli ;;; clear ints during this test
; search for RAM
;
xor dx,dx ; length = 0
ram_loop:
mov ds,ax
add ax,NEXT_ROM_SEG ; prepare for next chunk
;
; Do not search if the area has been eXcluded/Included/EMS/RAM/ROM by the user
;
mov bx,ds
shr bx,8 ; index into 4K page
cmp cs:[Page4K][bx],0 ;Q: Did user specify this page excluded/EMS/RAM?
jnz short no_more_ram ; Y: don't feel for RAM!
; M002 - Start
;;; mov bx,ds:0A0H ; get current word
;;; push bx ; save it
;;; mov cx,ds:0A2H ; get following word
;;; push cx ; save it
;;; not bx
mov bx, ds:0A2H ; save word at ds:A2H
mov cx, ds:0A0H
;
; Let us ensure that the value we're going to write out to the bus
; is not going to contain FCH as we're going to preset the bus to
; 0FCH before reading it back.
;
cmp cx, 0303h ; Q: is neg cx = FCFCH
jne @f ; N: fine
inc cx ; Y: change cx to some other value
@@:
not cx ; neg word at ds:A0H
push cx ; save it for future comparison
xchg ds:0A0H, cx ; write this negated word to ds:A0
; and save ds:A0h in cx
;;; mov word ptr ds:0A0H,bx ; try to clear word
; M002 - End
mov word ptr ds:0A2H,0FFFFh ; charge up data bus
;
; the instructions following and preceeding the xchg... below
; are carefully chosen to not contain the value in cx as part of the
; instruction.
;
cld ;;; preset the bus to 0FCh
cld ;;; preset the bus to 0FCh
cld ;;; preset the bus to 0FCh
cld ;;; preset the bus to 0FCh
;;; mov cx,DS:0A0H ; M002
xchg ds:0A0H, cx ; M002: restore word at ds:A0H and get
; M002: current value in cx
cld ;;; preset the bus to 0FCh
cld ;;; preset the bus to 0FCh
cld ;;; preset the bus to 0FCh
cld ;;; preset the bus to 0FCh
cld ;;; preset the bus to 0FCh
cld ;;; preset the bus to 0FCh
cld ;;; preset the bus to 0FCh
cld ;;; preset the bus to 0FCh
cld ;;; preset the bus to 0FCh
cld ;;; preset the bus to 0FCh
cld ;;; preset the bus to 0FCh
cld ;;; preset the bus to 0FCh
; M002 - Start
mov ds:0A2H,bx ; restore to it's original value
pop bx ; get value that was written to
; ds:A0h in bx
cmp bx, cx ; Q: was it really written out
jne short no_more_ram ; N: leave
;;; cmp bx,cx ;Q: RAM here ?
;;; pop bx ; restore following word
;;; mov ds:0A2H,bx ; to it's original value
;;; pop bx ; restore test word
;;; mov ds:0A0H,bx ; to it's original value
;;; jne short no_more_ram ; N: leave
; M002 - End
; Y: RAM - keep looking
add dx,NEXT_ROM_SEG ; increment length count
cmp ax,LAST_RAM_SEGMENT ;Q: last RAM location ?
jbe short ram_loop ; N: continue searching
mov ds,ax ; Y: no more searching
no_more_ram:
;
mov ax,ds ; get current segment
or dx,dx ;Q: any RAM found ?
jnz short ram_found ; Y: set RAM found & chk DS seg again
; N:
add ax,NEXT_ROM_SEG ; AX -> next one to check
popf
clc ; set no RAM
jmp short ram_exit ; and leave
;
ram_found:
popf
stc
ram_exit:
pop ds
pop cx
ASSUME ds:_DATA
ret
CheckForMappedRAM endp
;---------------------------------------------------------------------------
;
; ExcludePS2Options - Find PS/2 Option addresses
;
; ExcludePS2Options(EXPS2PDevTab,EXPS2PIFile)
;
; ENTRY:
; Know we are on a PS/2 system
;
; EXIT:
; AX == 0
; ERROR (usually INVALID POSCardTable (bad TabelRev))
;
; AX != 0
;
; USES: EAX,ECX,EDX
;
; NOTE: Ported from win386 3.0 sources.
;
;----------------------------------------------------------------------------
ExcludePS2Options proc near
enter 8,0
EXPS2TotOptions equ dword ptr [ebp-4]
EXPS2Flags equ dword ptr [ebp-8]
EXPS2F_FndOpt equ 00000000000000000000000000000001b
EXPS2F_FndOptBit equ 0
push ds
push esi
push edi
push ebx
mov ax, cs
mov ds, ax
lea esi, PS2DATA ; ds:esi -> PS2DATA
xor eax,eax
mov EXPS2Flags,eax
cld
lodsw ; Get TotalOptions
.erre TotalOptions EQ 0
mov EXPS2TotOptions, eax
lodsw ; Get table revision
.erre TabelRev EQ 2
cmp ax,CUR_PS2_TABLE_REV
jne Bad_Rev
xor eax, eax ; Card number
Card_Loop:
push eax
or al, ADAPTER_ENB
cli
out ADAPTER_POS, al ; Enable Card
jmp $+2
jmp $+2
mov edx, ID_ADDR_LO ; Get Card ID
in al, dx
jmp $+2
jmp $+2
mov ah, al
inc edx
in al, dx
xchg ah, al ; ID now in ax
btr EXPS2Flags,EXPS2F_FndOptBit
mov ecx, EXPS2TotOptions
push esi ; Save ptr to Option Tables
Option_Loop:
cmp ax, [esi.OptID] ; This card?
je short Found_Option
Continue_Scan:
movzx ebx, [esi.LookupCnt] ; # Entries in table to skip
lea esi, [esi.LookupTab] ; Point to table
shl ebx, 1 ; Two bytes per entry
.erre (SIZE MemAddr) EQ 2
add esi, ebx ; Skip the table
loop Option_Loop
IFDEF DEBUG
cmp ax,0FFFFh
je short No_Adap
or ax,ax
jz short No_Adap
bt EXPS2Flags,EXPS2F_FndOptBit
jc short No_Adap
;; trace_out "No entry in WIN386.PS2 for adapter #AX found in slot # ",NO_EOL
pop esi
pop eax
push eax
push esi
inc eax
;; trace_out "#AX"
No_Adap:
ENDIF
End_Option_Loop:
pop esi
mov al, ADAPTER_DSB
out ADAPTER_POS, al ; Disable setup
sti
pop eax ; Card number
inc eax
cmp eax, MAX_CARDS ; Done all cards?
jb short Card_Loop ; On to the next one
jmp OK_exit
Found_Option:
bts EXPS2Flags,EXPS2F_FndOptBit
push eax
push ecx
push esi
add esi, 2 ; Toss ID word
.erre OptID EQ 0
.erre POS2Mask EQ (OptID + 2)
mov edi, 4 ; Number of POS bytes
mov edx, ID_ADDR+2 ; First POS byte
xor ebx, ebx ; Table index
POS_Loop:
xor eax,eax
cld
lodsw ; Get mask and count
.erre POS2Shft EQ (POS2Mask + 1)
.erre POS3Shft EQ (POS3Mask + 1)
.erre POS4Shft EQ (POS4Mask + 1)
.erre POS5Shft EQ (POS5Mask + 1)
mov ecx, eax
xchg ch, cl ; cl gets shift count
or ah, al
jz short Ignore_Byte ; Stuff this one
in al, dx ; Get POS byte
and al, ch ; Mask it
ror al, cl ; Shift it
or bl, al ; Or into index
Ignore_Byte:
inc edx ; Next POS byte
dec edi
jnz short POS_Loop
cld
xor eax,eax
lodsw ; # entries in table
.erre LookUpCnt EQ (POS5Shft + 1)
.erre LookUpTab EQ (LookUpCnt + 2)
cmp ebx, eax ; Index in range?
jae short ContinueJ ; No, ignore
shl ebx, 1 ; Offset in table
.erre (SIZE MemAddr) EQ 2
movzx eax, word ptr [esi+ebx] ; Get entry
.erre PGLen EQ (StartPg + 1)
xor ecx, ecx
mov cl, ah ; Number of 4k pages here
xor ah, ah
;
; EAX is starting 4k page number
; ECX is a count of 4K pages to be marked as excluded starting at EAX
;
; Note that we know start page # is <= 0FFh since its value is stored
; in a byte
;
jecxz ContinueJ ; Nothing to do.......
mov edx,eax
add edx,ecx
dec edx ; Last page of range
if 0
cmp eax,[End_VM_Page]
jae short EPS2O10
debug_out "Exclude start page out of range #eax ExcludePS2Options"
mov eax,[End_VM_Page] ; Move start up
EPS2O10:
endif
cmp edx,100h
jb short EPS2O20
; Exclude count out of range.
mov edx,0FFh ; Move end down
EPS2O20:
sub edx,eax
jc short ContinueJ
inc edx ; Corrected count
mov ecx,edx
lea edi, page4k
SetExLoop:
or byte ptr [edi][eax], INUSE
inc eax
loop SetExLoop
ContinueJ:
pop esi
pop ecx
pop eax
jmp Continue_Scan
Bad_Rev:
xor eax, eax ; Bad PS/2 table rev
jmp short Bye
OK_Exit:
mov eax, 1
Bye:
pop ebx
pop edi
pop esi
pop ds
leave
ret
ExcludePS2Options endp
;**
;
; ExcludeEISAOptions - Find EISA Option addresses
;
; ExcludeEISAOptions
;
; ENTRY:
; Know we are on an EISA system
;
; EXIT:
; page4k is initialized with the memory locations of the EISA expansion
; boards
;
; AX == 0
; ERROR
;
; AX != 0
;
; USES: EAX, ECX
;
;
ExcludeEISAOptions proc near
push ds
push esi
push edi
push ebx
mov ax, cs
mov ds, ax ; DS -> LAST
mov cl, 1 ; start slot #
EISASlotLp:
push cx
mov ax, 0D800h
int 15h ; read slot
pop cx
jc ChkErr
test dl, GSI_HasMemory ; Q: does this slot have a mem entry
jz SkipSlot ; N: skip this slot and try next.
;
; This slot has one or more memory entries. We need to execute the
; 'Read Fucntion Configuration Information' to retrieve the data
; block for each function. Note the number of expansion board
; functions was returned in DH by the previous int 15 AX = D800h.
;
mov ch, dh ; ch = funtion number
NextFunc:
xor esi, esi
mov ax, 0D801h ; Read Fucntion Config. Information
mov si, OFFSET LAST:EISAdata
int 15h
jc SkipFunc ; unexpected error. Try next func.
test [esi.GSI_FuncInfo],GSI_FI_IsMem
; Q: memory info follows?
jz SkipFunc ; N: Try next func.
test [esi.GSI_FuncInfo],GSI_FI_IsCFGFreeFrm
; Q: is slot info Free Form
jnz SkipFunc ; Y: try next func
lea esi,[esi.GSI_Mem_Info]
push ecx
mov ecx, MAX_MEM_ENTS
EISAMemLp:
mov eax,dword ptr [esi.GSI_Mem_Addr256]
and eax,00FFFFFFh
movzx ebx,[esi.GSI_Mem_SizeK]
shl eax,8 ; Byte addr of start
shl ebx,10 ; Size in bytes
add ebx,eax
dec ebx ; Last byte of range
shr eax,12 ; Page # of start
shr ebx,12 ; Page # of last page of range
cmp eax,00000100h ; Start >= page 100?
jae short NextMem ; Yes, not interesting
cmp ebx,0A0h ; End Below lowest page?
jb short NextMem ; Yes, not interesting
;
; Range is at least partly in the page [End_VM_Page]-FF region
;
cmp eax,0A0h
jae short NoStartMov
mov eax,0A0h ; Move start up to A0
NoStartMov:
cmp ebx,000000FFh
jbe short NoEndMov
mov ebx,000000FFh ; Move end down
NoEndMov:
sub ebx,eax
jc short NextMem ; Range underflow
inc ebx
;
; Exclude EBX 4K pages starting at page EAX
;
push ecx
lea edi, page4k
mov ecx,ebx
SetExLoopEISA:
or byte ptr [edi][eax], INUSE
inc eax
loop SetExLoopEISA
pop ecx
NextMem:
test [esi.GSI_Mem_Conf], GSI_Mem_Cnf_More
jz short SkipFuncP
add esi,SIZE GSI_Mem_Ent
dec ecx
jnz EISAMemLp
pop ecx ; Hit MAX_MEM_ENTS without seeing
; Last mem ent slot #CL
jmp short SkipFunc
ChkErr:
mov al, ah
cmp al,EISA_Err_EmptySlot
je short SkipSlot
cmp al,EISA_Err_InvalSlot
je short EISAEX_Exit
;; debug_out "Unexpected get SHORT slot info error #AL on slot #CL ExcludeEISAOptions"
jmp short EISAEX_Fail
SkipFuncP:
pop ecx ; restore slot and function.
SkipFunc:
dec ch ; Next lower function
jnl NextFunc ; valid functions are 0..n
SkipSlot:
inc cl
jmp EISASlotLp
EISAEX_Exit:
mov eax, 1
EISAEX_Done:
pop ebx
pop edi
pop esi
pop ds
ret
EISAEX_Fail:
xor eax,eax
jmp short EISAEX_Done
ExcludeEISAOptions endp
;========================================================================
;
; Procedure : LastChanceScan
;
; Inputs : edx = 4k page to scan
; Output : update page4k array appropriately
;
; Notes:
; This is called with edx ranging from c0 to ef from the
; routine findwindowlocations.
;
;=========================================================================
public LastChanceScan
LastChanceScan proc near
push ds
push es
push bp
sub sp, 256/8
mov bp, sp
call IsHighSetPage ; Included by HighScan code?
jc LCS_Exit ; Yes, don't check it again
cmp cs:[page4K][edx], INUSE ; Already think it's a ROM?
je LCS_Think_Its_A_ROM ; Yes, check for special ROMS
cmp cs:page4k[edx],0 ; Anybody know about this page?
jne LCS_Exit ; Yes, skip
pushad
cld
mov di, ss
mov es, di ; es -> stack
or eax, NOT 0
mov cx, 256/32
mov di, bp
rep stosd ; Zero all bit values
mov di, cs
mov es, di ; es -> LAST
lea di, cs:LastChanceBuf ; Caller knows this is valid
;; mov esi, edx
;; shl esi, 12 ; ESI -> Lin mem of page
shl edx, 8
mov ds, dx ; ds = 4K page seg addr
xor si, si
mov cx, 1000h/4
rep movsd ; Copy from suspect to buffer
sub si, 2 ; Back up source 1 word
sub di, 4 ; Back up dest 1 DWORD
std ; BACKWARDS!
mov cx, 1000h/4 ; Number of dwords to compare
xor edx, edx ; 0 different bytes detected
mov eax, DWORD PTR [si-2] ; Initialize the xor value
LCS_Scan_Backwards:
;
; Prime the bus with the inverse of the previous value to try to detect
; bus noise.
;
xor eax, -1 ; Try to make bus noise
push eax ; Put this value on the bus
pop eax ; Read it back for fun
lodsw ; Get next word in table
shl eax, 16
lodsw ; Get 2 words in 2 fetches
cmp eax, DWORD PTR es:[di] ; Q: Did it match buffer val?
jne LCS_Is_A_Hole ; N: BUS NOISE! It's a hole
; Y: It's consistant
movzx ebx, al
btr [bp], ebx
adc edx, 0
movzx ebx, ah
btr [bp], ebx
adc edx, 0
ror eax, 16
movzx ebx, al
btr [bp], ebx
adc edx, 0
movzx ebx, ah
btr [bp], ebx
adc edx, 0
ror eax, 16
LCS_Try_Next_Dword:
sub di, 4 ; Subtract word from buf ptr
loop LCS_Scan_Backwards ; Scan the entire page
cld ; Get things fwd again!
cmp edx, ROMChangeCount
jb SHORT LCS_Think_Its_A_Hole
;------------------------------------------------------------------------------
;
; We think this is a ROM -- UGLY SPECIAL CASE CODE TIME!
;
;------------------------------------------------------------------------------
popad ; Get all registers back
LCS_Think_Its_A_ROM:
pushad ; And save them again
;
; On Northgate machines, pages E0h-EFh are a duplication of the ROM at
; F000h. If the page at Exxx exactly matches the page at Fxxx then we WON'T
; mark this as a ROM page.
;
cmp edx, 0E0h
jb SHORT LCS_Not_Special_1
cmp edx, 0EFh
ja SHORT LCS_Not_Special_1
;; TestMem <[ebx+(10h*SIZE VM_Page_Struc).V86_Flags]>, V86_ROMPage
;; jz SHORT LCS_Not_Special_1
;; cmp cs:page4k[edx+10h], INUSE ; Is this ROM
;; jne SHORT LCS_Not_Special_1 ; No
; suspect page may or may not have copied above--do it now to make sure
mov di, cs
mov es, di ; es -> LAST
lea di, cs:LastChanceBuf ; Caller knows this is valid
mov si, dx
shl si, 8
mov ds, si ; ds = 4K page seg addr
xor si, si
mov cx, 1000h/4
rep movsd ; Copy from suspect to buffer
lea di, cs:LastChanceBuf ; Caller knows this is valid
lea si, [edx+10h] ; Page # + 10h for F000 range
;; shl esi, 12 ; Convert to lin address
shl si, 8
mov ds, si
xor si, si
mov cx, 1000h/4
cld
repe cmpsd ; See if they are the same
IFDEF DEBUG
jne SHORT LCS_Not_Special_1
Trace_Out "LCS Special case # 1 on page #DL -- NOT excluded"
jmp SHORT LCS_Is_A_Hole
ELSE
je SHORT LCS_Is_A_Hole
ENDIF
LCS_Not_Special_1:
LCS_Not_A_Hole:
popad
;; Trace_Out "Last-chance detection found ROM at page #DL -- TELL RALPHL"
;; SetFlag [ebx.V86_Flags], (V86_ROMPage+V86_LastChance)
or cs:[Page4K][edx],INUSE ; mark it used
LCS_Exit:
add sp, 256/8
pop bp
cld
pop es
pop ds
ret
;------------------------------------------------------------------------------
;
; At this point, we got no bus noise and think it probably is a hole
; because the change count was so low. If the count is actually 0 then
; we are POSITIVE that it is a hole or at least a *VERY* odd ROM so
; we'll skip all special cases
;
; DX at this point is the change count. If it isn't 0 then we'll nuke
; it since we don't really care -- The rest of this code handles special
; cases.
;
;------------------------------------------------------------------------------
LCS_Think_Its_A_Hole:
test dx, dx
jz SHORT LCS_Is_A_Hole
popad
pushad
;
; Special case for ROMs without signatures in the E000-EFFF range that have
; only a TINY amount of useful stuff in the last few pages. Starting with
; ED00-EF00h we will exclude this page if page EC00h was excluded too.
;
; This is a special case for the IBM LX 40 portable
;
cmp edx, 0EDh
jb SHORT LCS_Is_A_Hole
cmp edx, 0EFh
ja SHORT LCS_Is_A_Hole
;; TestMem <VMPagesArr[0ECh*SIZE VM_Page_Struc].V86_Flags>, V86_ROMPage
test cs:[page4K][0ECH], INUSE
IFDEF DEBUG
jz SHORT LCS_Is_A_Hole
Trace_Out "LCS special case include # 1 for page #DL"
jmp LCS_Not_A_Hole
ELSE
jnz SHORT LCS_Not_A_Hole
ENDIF
;
; At this point we are as sure as we are ever going to be that this page is
; really a hole.
;
LCS_Is_A_Hole:
popad
and byte ptr cs:[Page4K][edx], NOT INUSE
jmp LCS_Exit
LastChanceScan endp
;============================================================================
;==
;== IsHighSetPage: Determines if page is covered by HighScan set range.
;==
;== Enter:
;== edx = page number
;==
;== Exit:
;== CY if page covered by HighSet range
;==
;============================================================================
public IsHighSetPage
IsHighSetPage proc near
push ds
push si
push cs
pop ds
lea si, cs:[HighSet+2]
IHSP_next:
lodsw ; range start
or ax, ax ; Q: end of set?
jz short IHSP_nope
shr ax, 8 ; paragraph to 4k page
cmp ax, dx ; Q: below the target page?
ja short IHSP_not_this_one ; N: can't be in this range
lodsw ; end of range
shr ax, 8
cmp ax, dx ; Q: => target page?
jb short IHSP_next ; N: try next range
stc ; Y: set CY flag & exit
jmp short IHSP_exit
IHSP_not_this_one:
lodsw ; skip end of range
jmp short IHSP_next ; and try the next one
IHSP_nope:
clc ; page not in range, clr CY
IHSP_exit:
pop si
pop ds
ret
IsHighSetPage endp
;----------------------------------------------------------------------------
;
; Procedure Name : IsCompaq
;
; Output : Z if COMPAQ
; NZ if not
;
; Check to see if we're on a Compaq 386 machine
;
;----------------------------------------------------------------------------
IsCompaq proc near
push es
push ds
push di
push si
push cx
les di,cs:[pCOMPAQ] ; es:di points to possible COMPAQ signature
push cs
pop ds
mov si,offset szCOMPAQ ; "03COMPAQ"
mov cx,8
cld
rep cmpsb ;Q: COMPAQ 386 machine?
pop cx
pop si
pop di
pop ds
pop es
ret
IsCompaq endp
; Added following procedures to check for EMM page & UMB conflicts
; with Toshiba reserved areas (resume and HardRAM).
; If conflicts found because of user-specified page frame base, set
; invalid page frame base error.
TOSH_MID_SEG equ 0F000H ; Toshiba machine ID byte segment
TOSH_MID_OFF equ 0FFFAH ; Toshiba machine ID byte offset
TOSH_T5100 equ 027H ; Toshiba T5100 machine ID byte
;----------------------------------------------------------------------------
;
; Procedure Name : Toshiba_exclude
;
; Output : DfltSet updated to reflect excluded areas for
; Toshiba resume and HardRAM machines.
;
; Check for resume & HardRAM machines.
;
; Note: this routine should be incorporated into SetToshibaOptions in
; init.asm (or that code should be moved here). It wasn't done initially
; since this code was cut and pasted while building release canidates for
; MS-DOS 6 and it works in it's current form.
;
;----------------------------------------------------------------------------
Toshiba_exclude proc near
cmp toshiba_machine, 0 ; On a Toshiba system?
je te_exit ; no, skip this code
; Check for T5100 machine w/FAST ROM enabled. If found, exclude
; addresses E000-F000 from being used as EMS pages or UMBs.
push es
push ax
push dx
mov ax,TOSH_MID_SEG
mov es,ax ; get segment containing Toshiba machine ID
cmp byte ptr es:[TOSH_MID_OFF],TOSH_T5100 ;Q: Is this a T5100?
jne short Tosh_exc_xit ;N: exit
mov dx,8080h ; I/O Port '8080' = Memory Map Reg
in al,dx ; Read Memory Map Register Fast ROM bits
test al,04h ;Q: Is Fast ROM enabled for E000-F000
jz short Tosh_exc_xit ;Y: Exclude E000-F000, w/remapped AGS BIOS
excl_E000:
; Now specify T5100 machine special exclude areas in
; Toshiba misc. exclude section. Support for T3300SL.
mov cs:[TOSHbeg],0E000H ;Y: E000-F000 must be excluded from EMM use
mov cs:[TOSHend],0EFFFH ;Y: E000-F000 must be excluded from EMM use
Tosh_exc_xit:
pop dx
pop ax
pop es
te_exit:
ret
Toshiba_exclude endp
;----------------------------------------------------------------------------
;
; Procedure Name : ToshInvPFbase
;
; Output : PF_Base set to FREE, and invalid parameter msg
; set if invalid page frame base error.
;
;
; Check for User-specifed page frame base conflict with
; resume & HardRAM machines.
;
;----------------------------------------------------------------------------
ToshInvPFbase proc near
cmp toshiba_machine, 0 ; On a Toshiba system?
je ToshInv_xit ; no, skip this code
cmp gs:[PF_Base],FREE ;Q: Has the page frame base address been set?
je short ToshInv_xit ;N: No need to check for bad page frame base
cmp gs:[PF_Base],0D400h ;Y: Does user specified base cross E000?
jl short ToshInv_xit ;exit if no conflict with E000-F000 area
mov ax,gs:[PF_base]
mov cx,4
PF_Base_loop: ;check each page for potential conflict
xor bx,bx
call CheckEMSWindow
and bx,INUSE
jnz short Inv_PF_base ;if page reserved, flag as invalid parameter
add ax,400h ;bump to next page
loop PF_Base_loop
jmp short ToshInv_xit
Inv_PF_base:
mov gs:[PF_Base],FREE
or gs:[msg_flag],INV_PARM_MSG
ToshInv_xit:
ret
ToshInvPFbase endp
LAST ENDS
END
|
//
// Copyright (c) 2011-2012, ARM Limited. All rights reserved.
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
// which accompanies this distribution. The full text of the license may be found at
// http://opensource.org/licenses/bsd-license.php
//
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
//
//
#include <AsmMacroIoLib.h>
#include <Library/PcdLib.h>
#include <Drivers/PL35xSmc.h>
#include <AutoGen.h>
INCLUDE AsmMacroIoLib.inc
EXPORT PL35xSmcInitialize
EXPORT PL35xSmcSetRefresh
PRESERVE8
AREA ModuleInitializeSMC, CODE, READONLY
// IN r1 Smc Base Address
// IN r2 Smc Configuration Start Address
// IN r3 Smc Configuration End Address
// NOTE: This code is been called before any stack has been setup. It means some registers
// could be overwritten (case of 'r0')
PL35xSmcInitialize
// While (SmcConfigurationStart < SmcConfigurationEnd)
cmp r2, r3
blxge lr
// Write to set_cycle register(holding register for NOR 1 cycle register or NAND cycle register)
ldr r0, [r2, #0x4]
str r0, [r1, #PL350_SMC_SET_CYCLES_OFFSET]
// Write to set_opmode register(holding register for NOR 1 opomode register or NAND opmode register)
ldr r0, [r2, #0x8]
str r0, [r1, #PL350_SMC_SET_OPMODE_OFFSET]
// Write to direct_cmd register so that the NOR 1 registers(set-cycles and opmode) are updated with holding registers
ldr r0, =PL350_SMC_DIRECT_CMD_ADDR_CMD_UPDATE
ldr r4, [r2, #0x0]
orr r0, r0, r4
str r0, [r1, #PL350_SMC_DIRECT_CMD_OFFSET]
add r2, #0xC
b PL35xSmcInitialize
// IN r1 Smc Base Address
// IN r2 Smc Refresh Period 0
// IN r3 Smc Refresh Period 1
PL35xSmcSetRefresh
str r2, [r1, #PL350_SMC_REFRESH_0_OFFSET]
str r3, [r1, #PL350_SMC_REFRESH_1_OFFSET]
blx lr
END
|
;*****************************************************************
;* 15-348 Spring 2016 Assignment Task 5 By Sharjeel Khan *
;* Initial Code was taken from lab1.asm from course webpage *
;* and editted for the assignment
;*****************************************************************
; export symbols
XDEF Entry ; export 'Entry' symbol
ABSENTRY Entry ; for absolute assembly: mark this as application entry point
; include derivative specific macros
INCLUDE 'mc9s12c128.inc'
ROMStart EQU $4000 ; absolute address to place my code/constant data
; variable/data sectio
ifdef _HCS12_SERIALMON
ORG $3FFF - (RAMEnd - RAMStart)
else
ORG RAMStart
endif
; Insert here your data definition.
Value DC.B 1
Buttons DC.B 1
; code section
ORG ROMStart
Entry:
; remap the RAM & EEPROM here. See EB386.pdf
ifdef _HCS12_SERIALMON
; set registers at $0000
CLR $11 ; INITRG= $0
; set ram to end at $3FFF
LDAB #$39
STAB $10 ; INITRM= $39
; set eeprom to end at $0FFF
LDAA #$9
STAA $12 ; INITEE= $9
LDS #$3FFF+1 ; See EB386.pdf, initialize the stack pointer
else
LDS #RAMEnd+1 ; initialize the stack pointer
endif
CLI ; enable interrupts
LDD #0
STD PORTB
CLR DDRA ;configure port A for input
LDAA #$F0
STAA DDRB ;configure port B as output
EndlessLoop:
LDD #0 ; clear reg D
LDAA PORTA ; load PORTA to reg A
LDAB PORTA ; load PORTB to reg B
ANDA #$F0 ; get the 4 highest bits
LSRA ; push 4 highest bits to lowest bits
LSRA
LSRA
LSRA
ANDB #$08 ; get the 3rd bit
EORB #$08 ; switch values
STAA Buttons ; store reg A value to stack
STAB Value ; store reg B value to stack
LDAB #$01 ; make reg B act as a counter
LDAA #$00 ; make reg A act as a total
Loop:
CMPB Buttons ; check if reg B has reached N
BHI ButtonPressed ; if it has, branch to ButtonPressed
ABA ; add B to sum
ADDB #$01 ; Increment B by 1
BRA Loop ; restart this Loop
ButtonPressed:
LDAB Value ; load back the value
CMPB #$08 ; see if button 4 was pressed
BNE ButtonNotPressed ; if not, branch to ButtonNotPressed
ANDA #$F0 ; get the 4 highest bits
STAA PORTB ; show them on the LED
BRA EndlessLoop ; restart main loop
ButtonNotPressed:
ANDA #$0F ; get the 4 lowest bits to LED 4-7
LSLA ; shift 4 times
LSLA
LSLA
LSLA
STAA PORTB ; show the 4 lowest bits to LED 4-7
BRA EndlessLoop ; restart loop
;**************************************************************
;* Interrupt Vectors *
;**************************************************************
ORG $FFFE
DC.W Entry ; Reset Vector
|
XREF MYRAM
XREF CNTVAL
XREF CNTVAL1
XREF COUNTREG
XDEF CAL_CHKSUM
CAL_CHKSUM
LDAA #CNTVAL
STAA COUNTREG
LDX #MYRAM
CLRA
B2 ADDA 1,X+
DEC COUNTREG
BNE B2
NEGA
STAA 0,X
RTS
END
|
; A056182: First differences of A003063.
; 0,2,10,38,130,422,1330,4118,12610,38342,116050,350198,1054690,3172262,9533170,28632278,85962370,258018182,774316690,2323474358,6971471650,20916512102,62753730610,188269580438,564825518530,1694510110022,5083597438930,15250926534518,45753048039010,137259680987942,411780116705650,1235342497600598,3706031787769090
mov $4,1
lpb $0
sub $0,1
add $3,$4
add $2,$3
add $1,$2
trn $2,$1
mul $1,2
mov $4,$3
mul $4,2
lpe
|
; A338130: Positive numbers k such that the ternary representation of k^k ends with that of k.
; 1,4,7,10,19,28,37,46,55,64,73,82,109,136,163,190,217,244,271,298,325,352,379,406,433,460,487,514,541,568,595,622,649,676,703,730,811,892,973,1054,1135,1216,1297,1378,1459,1540,1621,1702,1783,1864,1945,2026,2107,2188,2269,2350,2431,2512,2593,2674,2755,2836,2917,2998,3079,3160,3241,3322,3403,3484,3565,3646,3727,3808,3889,3970,4051,4132,4213,4294,4375,4456,4537,4618,4699,4780,4861,4942,5023,5104,5185,5266,5347,5428,5509,5590,5671,5752,5833,5914,5995,6076,6157,6238,6319,6400,6481,6562,6805,7048,7291,7534,7777,8020,8263,8506,8749,8992,9235,9478,9721,9964,10207,10450,10693,10936,11179,11422,11665,11908,12151,12394,12637,12880,13123,13366,13609,13852,14095,14338,14581,14824,15067,15310,15553,15796,16039,16282,16525,16768,17011,17254,17497,17740,17983,18226,18469,18712,18955,19198,19441,19684,19927,20170,20413,20656,20899,21142,21385,21628,21871,22114,22357,22600,22843,23086,23329,23572,23815,24058,24301,24544,24787,25030,25273,25516,25759,26002,26245,26488,26731,26974,27217,27460,27703,27946,28189,28432,28675,28918,29161,29404,29647,29890,30133,30376,30619,30862,31105,31348,31591,31834,32077,32320,32563,32806,33049,33292,33535,33778,34021,34264,34507,34750,34993,35236,35479,35722,35965,36208,36451,36694,36937,37180,37423,37666,37909,38152,38395,38638,38881,39124,39367,39610,39853,40096,40339,40582,40825,41068
mov $20,$0
mov $22,$0
add $22,1
lpb $22,1
clr $0,20
mov $0,$20
sub $22,1
sub $0,$22
mov $17,$0
mov $19,$0
add $19,1
lpb $19,1
mov $0,$17
sub $19,1
sub $0,$19
mov $13,$0
mov $15,2
lpb $15,1
clr $0,13
mov $0,$13
sub $15,1
add $0,$15
sub $0,1
mul $0,3
add $1,1
mul $1,14
div $1,3
mov $10,$0
lpb $10,1
sub $10,$1
mul $1,3
lpe
mov $16,$15
lpb $16,1
mov $14,$1
sub $16,1
lpe
lpe
lpb $13,1
mov $13,0
sub $14,$1
lpe
mov $1,$14
div $1,4
add $18,$1
lpe
add $21,$18
lpe
mov $1,$21
|
.global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r15
push %r8
push %rbx
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_normal_ht+0x8760, %r15
nop
nop
dec %r8
mov (%r15), %rbx
xor %r10, %r10
lea addresses_normal_ht+0xd528, %rsi
lea addresses_WC_ht+0x1a540, %rdi
sub $17714, %rdx
mov $88, %rcx
rep movsq
nop
add %r8, %r8
lea addresses_A_ht+0x86e0, %rsi
cmp $46309, %rbx
movb $0x61, (%rsi)
nop
nop
nop
nop
xor %rcx, %rcx
lea addresses_A_ht+0xf87c, %rsi
lea addresses_WC_ht+0x16480, %rdi
nop
nop
cmp %r10, %r10
mov $127, %rcx
rep movsw
xor %rbx, %rbx
lea addresses_A_ht+0x1822c, %r8
nop
nop
nop
add $26171, %rdx
mov (%r8), %r10
nop
nop
nop
xor $35880, %rcx
lea addresses_normal_ht+0x1cf70, %rsi
lea addresses_WC_ht+0x1a600, %rdi
clflush (%rdi)
nop
sub %rdx, %rdx
mov $84, %rcx
rep movsl
inc %r10
lea addresses_WT_ht+0x10a80, %rbx
clflush (%rbx)
nop
nop
nop
nop
nop
and $55225, %rcx
movb (%rbx), %r10b
nop
nop
nop
nop
nop
add $4793, %r8
lea addresses_WT_ht+0x15c0, %rsi
lea addresses_UC_ht+0x17300, %rdi
nop
nop
nop
nop
nop
xor %r10, %r10
mov $116, %rcx
rep movsq
nop
nop
nop
xor %rsi, %rsi
lea addresses_UC_ht+0x13080, %rsi
lea addresses_WT_ht+0x11230, %rdi
nop
inc %r8
mov $127, %rcx
rep movsw
sub %rbx, %rbx
lea addresses_normal_ht+0x10b78, %rsi
add $9744, %r15
mov (%rsi), %bx
nop
sub $22341, %rdi
lea addresses_D_ht+0x1413e, %rsi
lea addresses_WT_ht+0x9380, %rdi
nop
nop
dec %r15
mov $77, %rcx
rep movsq
nop
nop
sub %r10, %r10
lea addresses_WT_ht+0xd080, %rsi
nop
nop
nop
nop
cmp %rcx, %rcx
movl $0x61626364, (%rsi)
cmp $30644, %rdi
lea addresses_WT_ht+0x19880, %r15
nop
and $52953, %rcx
movw $0x6162, (%r15)
nop
cmp %rsi, %rsi
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbx
pop %r8
pop %r15
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r13
push %r15
push %r9
push %rax
push %rsi
// Faulty Load
mov $0x880, %rsi
nop
nop
nop
nop
sub %r13, %r13
movups (%rsi), %xmm6
vpextrq $0, %xmm6, %r10
lea oracles, %r9
and $0xff, %r10
shlq $12, %r10
mov (%r9,%r10,1), %r10
pop %rsi
pop %rax
pop %r9
pop %r15
pop %r13
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_P', 'AVXalign': False, 'size': 32, 'NT': False, 'same': True, 'congruent': 0}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'type': 'addresses_P', 'AVXalign': False, 'size': 16, 'NT': False, 'same': True, 'congruent': 0}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 8, 'NT': False, 'same': False, 'congruent': 5}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_normal_ht', 'congruent': 3, 'same': True}, 'OP': 'REPM', 'dst': {'type': 'addresses_WC_ht', 'congruent': 6, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A_ht', 'AVXalign': True, 'size': 1, 'NT': False, 'same': True, 'congruent': 3}}
{'src': {'type': 'addresses_A_ht', 'congruent': 1, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WC_ht', 'congruent': 10, 'same': False}}
{'src': {'type': 'addresses_A_ht', 'AVXalign': False, 'size': 8, 'NT': False, 'same': False, 'congruent': 1}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_normal_ht', 'congruent': 3, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WC_ht', 'congruent': 7, 'same': False}}
{'src': {'type': 'addresses_WT_ht', 'AVXalign': False, 'size': 1, 'NT': False, 'same': False, 'congruent': 9}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WT_ht', 'congruent': 6, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_UC_ht', 'congruent': 7, 'same': False}}
{'src': {'type': 'addresses_UC_ht', 'congruent': 8, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WT_ht', 'congruent': 4, 'same': False}}
{'src': {'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 2, 'NT': True, 'same': False, 'congruent': 2}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_D_ht', 'congruent': 0, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WT_ht', 'congruent': 5, 'same': True}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WT_ht', 'AVXalign': False, 'size': 4, 'NT': False, 'same': False, 'congruent': 11}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WT_ht', 'AVXalign': False, 'size': 2, 'NT': False, 'same': False, 'congruent': 11}}
{'00': 1}
00
*/
|
; A328337: The number whose binary indices are the nontrivial divisors of n (greater than 1 and less than n).
; 0,0,0,2,0,6,0,10,4,18,0,46,0,66,20,138,0,294,0,538,68,1026,0,2222,16,4098,260,8266,0,16950,0,32906,1028,65538,80,133422,0,262146,4100,524954,0,1056870,0,2098186,16660,4194306,0,8423598,64,16777746,65540
add $0,1
mov $2,$0
sub $0,1
lpb $0
mov $3,$2
mov $4,$0
cmp $4,0
add $0,$4
dif $3,$0
sub $0,1
cmp $3,$2
cmp $3,0
add $1,$3
mul $1,2
lpe
div $1,4
mul $1,2
mov $0,$1
|
// Copyright 2014 The Chromium Authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.
#include "chrome/browser/ui/views/apps/app_info_dialog/app_info_panel.h"
#include "ui/base/resource/resource_bundle.h"
#include "ui/views/controls/label.h"
#include "ui/views/layout/box_layout.h"
#include "ui/views/layout/layout_constants.h"
AppInfoPanel::AppInfoPanel(Profile* profile, const extensions::Extension* app)
: profile_(profile), app_(app) {
}
AppInfoPanel::~AppInfoPanel() {
}
views::Label* AppInfoPanel::CreateHeading(const base::string16& text) const {
views::Label* label = new views::Label(text);
label->SetHorizontalAlignment(gfx::ALIGN_LEFT);
label->SetFontList(ui::ResourceBundle::GetSharedInstance().GetFontList(
ui::ResourceBundle::MediumFont));
return label;
}
views::View* AppInfoPanel::CreateVerticalStack() const {
views::View* vertically_stacked_view = new views::View();
vertically_stacked_view->SetLayoutManager(
new views::BoxLayout(views::BoxLayout::kVertical,
0,
0,
views::kRelatedControlVerticalSpacing));
return vertically_stacked_view;
}
|
/*************************************************************
** Program name: setSpacePointers.cpp
** Author: Ben Fridkis
** Date: 5/31/2017
** Description: Member function definition to set each Space
pointer's adjacent Spaces at beginning of each
game.
**************************************************************/
#include "Space.hpp"
/*********************************************************
setSpacePointers
This function sets all the Space pointers for each Space
after the Spaces have been assigned their place within
the game map. (Meadows and Woods are assigned randomly.)
**********************************************************/
void setSpacePointers(Space* theCrashSite, Space* Meadow1,
Space* Meadow2, Space* Woods1,
Space* Woods2, Space* theLake)
{
theCrashSite->setNorthSpacePointer(nullptr);
theCrashSite->setSouthSpacePointer(nullptr);
theCrashSite->setEastSpacePointer(Meadow1);
theCrashSite->setWestSpacePointer(nullptr);
Meadow1->setNorthSpacePointer(Woods1);
Meadow1->setSouthSpacePointer(nullptr);
Meadow1->setEastSpacePointer(Woods2);
Meadow1->setWestSpacePointer(theCrashSite);
Meadow2->setNorthSpacePointer(nullptr);
Meadow2->setSouthSpacePointer(Woods2);
Meadow2->setEastSpacePointer(theLake);
Meadow2->setWestSpacePointer(Woods1);
Woods1->setNorthSpacePointer(nullptr);
Woods1->setSouthSpacePointer(Meadow1);
Woods1->setEastSpacePointer(Meadow2);
Woods1->setWestSpacePointer(nullptr);
Woods2->setNorthSpacePointer(Meadow2);
Woods2->setSouthSpacePointer(nullptr);
Woods2->setEastSpacePointer(nullptr);
Woods2->setWestSpacePointer(Meadow1);
theLake->setNorthSpacePointer(nullptr);
theLake->setSouthSpacePointer(nullptr);
theLake->setEastSpacePointer(nullptr);
theLake->setWestSpacePointer(Meadow2);
} |
; A248217: a(n) = 8^n - 2^n.
; 0,6,60,504,4080,32736,262080,2097024,16776960,134217216,1073740800,8589932544,68719472640,549755805696,4398046494720,35184372056064,281474976645120,2251799813554176,18014398509219840,144115188075331584,1152921504605798400
mov $1,1
mov $2,1
lpb $0
sub $0,1
mul $1,8
mul $2,2
lpe
sub $1,$2
mov $0,$1
|
/* GNU Ocrad - Optical Character Recognition program
Copyright (C) 2003-2015 Antonio Diaz Diaz.
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <algorithm>
#include <cctype>
#include <climits>
#include <cstdio>
#include <cstdlib>
#include <string>
#include <vector>
#include <stdint.h>
#include "ocradlib.h"
#include "common.h"
#include "rational.h"
#include "rectangle.h"
#include "segment.h"
#include "mask.h"
#include "track.h"
#include "page_image.h"
namespace {
// binarization by Otsu's method based on maximization of inter-class variance
//
int otsu_th( const std::vector< std::vector< uint8_t > > & data,
const Rectangle & re, const int maxval )
{
if( maxval == 1 ) return 0;
std::vector< int > hist( maxval + 1, 0 ); // histogram of image data
for( int row = re.top(); row <= re.bottom(); ++row )
for( int col = re.left(); col <= re.right(); ++col )
++hist[data[row][col]];
std::vector< int > chist; // cumulative histogram
chist.reserve( maxval + 1 );
chist.push_back( hist[0] );
std::vector< long long > cmom; // cumulative moment
cmom.reserve( maxval + 1 );
cmom.push_back( 0 ); // 0 times hist[0] equals zero
for( int i = 1; i <= maxval; ++i )
{
chist.push_back( chist[i-1] + hist[i] );
cmom.push_back( cmom[i-1] + ( i * hist[i] ) );
}
const double cmom_max = cmom[maxval];
double bvar_max = 0;
int threshold = 0; // threshold for binarization
for( int i = 0; i < maxval; ++i )
if( chist[i] > 0 && chist[i] < re.size() )
{
double bvar = (double)cmom[i] / chist[i];
bvar -= ( cmom_max - cmom[i] ) / ( re.size() - chist[i] );
bvar *= bvar; bvar *= chist[i]; bvar *= ( re.size() - chist[i] );
if( bvar > bvar_max ) { bvar_max = bvar; threshold = i; }
}
return threshold;
}
int absolute_pos( Rational pos, const int left, const int right )
{
int a;
if( pos >= 0 )
{
if( pos <= 1 ) a = left + ( pos * ( right - left ) ).trunc();
else a = left + pos.round();
}
else
{
pos = -pos;
if( pos <= 1 ) a = right - ( pos * ( right - left ) ).trunc();
else a = right - pos.round();
}
return a;
}
void convol_23( std::vector< std::vector< uint8_t > > & data, const int scale )
{
const int height = data.size();
const int width = data[0].size();
if( height < 3 || width < 3 ) return;
std::vector< std::vector< uint8_t > > new_data( height );
new_data[0] = data[0]; // copy first row
for( int row = 1; row < height - 1; ++row )
new_data[row].reserve( width );
new_data[height-1] = data[height-1]; // copy last row
for( int row = 1; row < height - 1; ++row )
{
const std::vector< uint8_t > & datarow1 = data[row-1];
const std::vector< uint8_t > & datarow2 = data[row];
const std::vector< uint8_t > & datarow3 = data[row+1];
std::vector< uint8_t > & new_datarow = new_data[row];
new_datarow.push_back( datarow2[0] ); // copy first col
if( scale < 3 )
for( int col = 1; col < width - 1; ++col )
{
int sum = datarow1[col-1] + datarow1[col] + datarow1[col+1] +
datarow2[col-1] + 2 * datarow2[col] + datarow2[col+1] +
datarow3[col-1] + datarow3[col] + datarow3[col+1];
new_datarow.push_back( ( sum + 5 ) / 10 );
}
else
for( int col = 1; col < width - 1; ++col )
{
int sum = datarow1[col-1] + datarow1[col] + datarow1[col+1] +
datarow2[col-1] + datarow2[col] + datarow2[col+1] +
datarow3[col-1] + datarow3[col] + datarow3[col+1];
new_datarow.push_back( ( 2 * sum + 9 ) / 18 );
}
new_datarow.push_back( datarow2[width-1] ); // copy last col
}
data.swap( new_data );
}
void convol_n( std::vector< std::vector< uint8_t > > & data, const int scale )
{
const int radius = scale / 2; // this is really radius - 0.5
const int min_size = 2 * radius + 1;
const int area = min_size * min_size;
const int height = data.size();
const int width = data[0].size();
if( radius < 1 || height < min_size || width < min_size ) return;
std::vector< std::vector< uint8_t > > new_data( height );
for( int row = 0; row < radius; ++row )
new_data[row] = data[row]; // copy first rows
for( int row = radius; row < height - radius; ++row )
new_data[row].reserve( width );
for( int row = height - radius; row < height; ++row )
new_data[row] = data[row]; // copy last rows
for( int row = radius; row < height - radius; ++row )
{
const std::vector< uint8_t > & datarow = data[row];
std::vector< uint8_t > & new_datarow = new_data[row];
for( int col = 0; col < radius; ++col )
new_datarow.push_back( datarow[col] ); // copy first cols
for( int col = radius; col < width - radius; ++col )
{
int sum = 0;
for( int r = -radius; r < radius; ++r )
for( int c = -radius; c < radius; ++c )
sum += data[row+r][col+c];
new_datarow.push_back( ( 2 * sum + area ) / ( 2 * area ) );
}
for( int col = width - radius; col < width; ++col )
new_datarow.push_back( datarow[col] ); // copy last cols
}
data.swap( new_data );
}
void enlarge_2b( std::vector< std::vector< uint8_t > > & data )
{
const int height = data.size();
const int width = data[0].size();
std::vector< std::vector< uint8_t > > new_data( 2 * height );
for( unsigned row = 0; row < new_data.size(); ++row )
new_data[row].resize( 2 * width, 1 );
for( int row = 0; row < height; ++row )
{
const std::vector< uint8_t > & datarow = data[row];
std::vector< uint8_t > & new_datarow0 = new_data[2*row];
std::vector< uint8_t > & new_datarow1 = new_data[2*row+1];
for( int col = 0; col < width; ++col )
{
if( datarow[col] == 0 )
{
const bool l = col > 0 && datarow[col-1] == 0;
const bool t = row > 0 && data[row-1][col] == 0;
const bool r = col < width - 1 && datarow[col+1] == 0;
const bool b = row < height - 1 && data[row+1][col] == 0;
const bool lt = row > 0 && col > 0 && data[row-1][col-1] == 0;
const bool rt = row > 0 && col < width - 1 && data[row-1][col+1] == 0;
const bool lb = row < height - 1 && col > 0 && data[row+1][col-1] == 0;
const bool rb = row < height - 1 && col < width - 1 && data[row+1][col+1] == 0;
if( l || t || lt || ( !rt && !lb ) ) new_datarow0[2*col] = 0;
if( r || t || rt || ( !lt && !rb ) ) new_datarow0[2*col+1] = 0;
if( l || b || lb || ( !lt && !rb ) ) new_datarow1[2*col] = 0;
if( r || b || rb || ( !rt && !lb ) ) new_datarow1[2*col+1] = 0;
}
}
}
data.swap( new_data );
}
void enlarge_3b( std::vector< std::vector< uint8_t > > & data )
{
const int height = data.size();
const int width = data[0].size();
std::vector< std::vector< uint8_t > > new_data( 3 * height );
for( unsigned row = 0; row < new_data.size(); ++row )
new_data[row].resize( 3 * width, 1 );
for( int row = 0; row < height; ++row )
{
const int row3 = 3 * row;
const std::vector< uint8_t > & datarow = data[row];
std::vector< uint8_t > & new_datarow0 = new_data[row3];
std::vector< uint8_t > & new_datarow1 = new_data[row3+1];
std::vector< uint8_t > & new_datarow2 = new_data[row3+2];
for( int col = 0; col < width; ++col )
{
const int col3 = 3 * col;
const bool l = col > 0 && datarow[col-1] == 0;
const bool t = row > 0 && data[row-1][col] == 0;
const bool r = col < width - 1 && datarow[col+1] == 0;
const bool b = row < height - 1 && data[row+1][col] == 0;
const bool lt = row > 0 && col > 0 && data[row-1][col-1] == 0;
const bool rt = row > 0 && col < width - 1 && data[row-1][col+1] == 0;
const bool lb = row < height - 1 && col > 0 && data[row+1][col-1] == 0;
const bool rb = row < height - 1 && col < width - 1 && data[row+1][col+1] == 0;
if( datarow[col] == 0 )
{
if( l || t || lt || ( !rt && !lb ) ) new_datarow0[col3] = 0;
new_datarow0[col3+1] = 0;
if( r || t || rt || ( !lt && !rb ) ) new_datarow0[col3+2] = 0;
new_datarow1[col3] = new_datarow1[col3+1] = new_datarow1[col3+2] = 0;
if( l || b || lb || ( !lt && !rb ) ) new_datarow2[col3] = 0;
new_datarow2[col3+1] = 0;
if( r || b || rb || ( !rt && !lb ) ) new_datarow2[col3+2] = 0;
}
else
{
if( l && t && lt && ( !rt || !lb ) ) new_datarow0[col3] = 0;
if( r && t && rt && ( !lt || !rb ) ) new_datarow0[col3+2] = 0;
if( l && b && lb && ( !lt || !rb ) ) new_datarow2[col3] = 0;
if( r && b && rb && ( !rt || !lb ) ) new_datarow2[col3+2] = 0;
}
}
}
data.swap( new_data );
}
void enlarge_n( std::vector< std::vector< uint8_t > > & data, const int n )
{
if( n < 2 ) return;
const int height = data.size();
const int width = data[0].size();
std::vector< std::vector< uint8_t > > new_data;
new_data.reserve( n * height );
for( int row = 0; row < height; ++row )
{
const std::vector< uint8_t > & datarow = data[row];
new_data.push_back( std::vector< uint8_t >() );
for( int col = 0; col < width; ++col )
{
const uint8_t d = datarow[col];
for( int i = 0; i < n; ++i ) new_data.back().push_back( d );
}
for( int i = 1; i < n; ++i ) new_data.push_back( new_data.back() );
}
data.swap( new_data );
}
void mirror_left_right( std::vector< std::vector< uint8_t > > & data )
{
const int height = data.size();
for( int row = 0; row < height; ++row )
std::reverse( data[row].begin(), data[row].end() );
}
void mirror_top_bottom( std::vector< std::vector< uint8_t > > & data )
{
const int height = data.size();
for( int u = 0, d = height - 1; u < d; ++u, --d )
data[u].swap( data[d] );
}
void mirror_diagonal( std::vector< std::vector< uint8_t > > & data,
Rectangle & re )
{
const int size = std::max( re.height(), re.width() );
if( re.height() < size )
{
data.resize( size );
for( int row = re.height(); row < size; ++row )
data[row].resize( size );
}
else if( re.width() < size )
for( int row = 0; row < re.height(); ++row )
data[row].resize( size );
for( int row = 0; row < size; ++row )
{
std::vector< uint8_t > & datarow = data[row];
for( int col = 0; col < row; ++col )
{
uint8_t tmp = datarow[col];
datarow[col] = data[col][row]; data[col][row] = tmp;
}
}
const int h = re.height(), w = re.width();
re.height( w ); re.width( h );
if( re.height() < size ) data.resize( re.height() );
else if( re.width() < size )
for( int row = 0; row < re.height(); ++row )
data[row].resize( re.width() );
}
} // end namespace
// Creates a Page_image from a OCRAD_Pixmap
//
Page_image::Page_image( const OCRAD_Pixmap & image, const bool invert )
: Rectangle( 0, 0, image.width - 1, image.height - 1 )
{
data.resize( height() );
for( unsigned row = 0; row < data.size(); ++row )
data[row].reserve( width() );
const int rows = height(), cols = width();
switch( image.mode )
{
case OCRAD_bitmap: {
maxval_ = 1; threshold_ = 0;
if( !invert )
for( int i = 0, row = 0; row < rows; ++row )
for( int col = 0; col < cols; ++col, ++i )
data[row].push_back( image.data[i] ? 0 : 1 );
else
for( int i = 0, row = 0; row < rows; ++row )
for( int col = 0; col < cols; ++col, ++i )
data[row].push_back( image.data[i] ? 1 : 0 );
} break;
case OCRAD_greymap: {
maxval_ = 255; threshold_ = 127;
if( !invert )
for( int i = 0, row = 0; row < rows; ++row )
for( int col = 0; col < cols; ++col, ++i )
data[row].push_back( image.data[i] );
else
for( int i = 0, row = 0; row < rows; ++row )
for( int col = 0; col < cols; ++col, ++i )
data[row].push_back( maxval_ - image.data[i] );
} break;
case OCRAD_colormap: {
maxval_ = 255; threshold_ = 127;
for( int i = 0, row = 0; row < rows; ++row )
for( int col = 0; col < cols; ++col, i += 3 )
{
const uint8_t r = image.data[i]; // Red value
const uint8_t g = image.data[i+1]; // Green value
const uint8_t b = image.data[i+2]; // Blue value
uint8_t val;
if( !invert ) val = std::min( r, std::min( g, b ) );
else val = maxval_ - std::max( r, std::max( g, b ) );
data[row].push_back( val );
}
} break;
}
}
// Creates a reduced Page_image
//
Page_image::Page_image( const Page_image & source, const int scale )
: Rectangle( source ), maxval_( source.maxval_ ), threshold_( source.threshold_ )
{
if( scale < 2 || scale > source.width() || scale > source.height() )
Ocrad::internal_error( "bad parameter building a reduced Page_image." );
const int scale2 = scale * scale;
Rectangle::height( source.height() / scale );
Rectangle::width( source.width() / scale );
data.resize( height() );
for( int row = 0; row < height(); ++row )
{
const int srow = ( row * scale ) + scale;
data[row].reserve( width() );
std::vector< uint8_t > & datarow = data[row];
for( int col = 0; col < width(); ++col )
{
const int scol = ( col * scale ) + scale;
int sum = 0;
for( int i = srow - scale; i < srow; ++i )
{
const std::vector< uint8_t > & sdatarow = source.data[i];
for( int j = scol - scale; j < scol; ++j )
sum += sdatarow[j];
}
datarow.push_back( sum / scale2 );
}
}
}
void Page_image::threshold( const Rational & th )
{
if( th >= 0 && th <= 1 )
threshold_ = ( th * maxval_ ).trunc();
else
threshold_ = otsu_th( data, *this, maxval_ );
}
void Page_image::threshold( const int th )
{
if( th >= 0 && th <= 255 ) threshold_ = ( th * maxval_ ) / 255;
else threshold_ = otsu_th( data, *this, maxval_ );
}
bool Page_image::cut( const Rational ltwh[4] )
{
Rectangle re = *this;
const int l = absolute_pos( ltwh[0], left(), right() );
if( l > re.left() ) { if( l < re.right() ) re.left( l ); else return false; }
const int t = absolute_pos( ltwh[1], top(), bottom() );
if( t > re.top() ) { if( t < re.bottom() ) re.top( t ); else return false; }
const int r = l + absolute_pos( ltwh[2], left(), right() ) - 1;
if( r < re.right() ) { if( r > re.left() ) re.right( r ); else return false; }
const int b = t + absolute_pos( ltwh[3], top(), bottom() ) - 1;
if( b < re.bottom() ) { if( b > re.top() ) re.bottom( b ); else return false; }
if( re.width() < 3 || re.height() < 3 ) return false;
// cutting is performed here
if( re.bottom() < bottom() ) data.resize( re.bottom() - top() + 1 );
if( re.right() < right() )
{
const int w = re.right() - left() + 1;
for( int row = data.size() - 1; row >= 0 ; --row ) data[row].resize( w );
}
if( re.top() > top() )
data.erase( data.begin(), data.begin() + ( re.top() - top() ) );
if( re.left() > left() )
{
const int d = re.left() - left();
for( int row = data.size() - 1; row >= 0 ; --row )
data[row].erase( data[row].begin(), data[row].begin() + d );
}
Rectangle::left( 0 );
Rectangle::top( 0 );
Rectangle::right( data[0].size() - 1 );
Rectangle::bottom( data.size() - 1 );
return true;
}
void Page_image::draw_mask( const Mask & m )
{
const int t = std::max( top(), m.top() );
const int b = std::min( bottom(), m.bottom() );
if( t == m.top() && m.left( t ) >= 0 && m.right( t ) >= 0 )
for( int col = m.left( t ); col <= m.right( t ); ++col )
set_bit( t, col, true );
if( b == m.bottom() && m.left( b ) >= 0 && m.right( b ) >= 0 )
for( int col = m.left( b ); col <= m.right( b ); ++col )
set_bit( b, col, true );
int lprev = m.left( t );
int rprev = m.right( t );
for( int row = t + 1; row <= b; ++row )
{
int lnew = m.left( row ), rnew = m.right( row );
if( lnew < 0 ) lnew = lprev;
if( rnew < 0 ) rnew = rprev;
if( lprev >= 0 && lnew >= 0 )
{
int c1 = std::max( left(), std::min( lprev, lnew ) );
int c2 = std::min( right(), std::max( lprev, lnew ) );
for( int col = c1; col <= c2; ++col )
set_bit( row, col, true );
}
if( rprev >= 0 && rnew >= 0 )
{
int c1 = std::max( left(), std::min( rprev, rnew ) );
int c2 = std::min( right(), std::max( rprev, rnew ) );
for( int col = c1; col <= c2; ++col )
set_bit( row, col, true );
}
lprev = lnew; rprev = rnew;
}
}
void Page_image::draw_rectangle( const Rectangle & re )
{
const int l = std::max( left(), re.left() );
const int t = std::max( top(), re.top() );
const int r = std::min( right(), re.right() );
const int b = std::min( bottom(), re.bottom() );
if( l == re.left() )
for( int row = t; row <= b; ++row ) set_bit( row, l, true );
if( t == re.top() )
for( int col = l; col <= r; ++col ) set_bit( t, col, true );
if( r == re.right() )
for( int row = t; row <= b; ++row ) set_bit( row, r, true );
if( b == re.bottom() )
for( int col = l; col <= r; ++col ) set_bit( b, col, true );
}
void Page_image::draw_track( const Track & tr )
{
int l = std::max( left(), tr.left() );
int r = std::min( right(), tr.right() );
if( l == tr.left() )
for( int row = tr.top( l ); row <= tr.bottom( l ); ++row )
if( row >= top() && row <= bottom() ) set_bit( row, l, true );
if( r == tr.right() )
for( int row = tr.top( r ); row <= tr.bottom( r ); ++row )
if( row >= top() && row <= bottom() ) set_bit( row, r, true );
for( int col = l; col <= r; ++col )
{
int row = tr.top( col );
if( row >= top() && row <= bottom() ) set_bit( row, col, true );
row = tr.bottom( col );
if( row >= top() && row <= bottom() ) set_bit( row, col, true );
}
}
bool Page_image::change_scale( int n )
{
if( n <= -2 )
{ Page_image reduced( *this, -n ); *this = reduced; return true; }
if( n >= 2 )
{
if( INT_MAX / n < width() * height() )
throw Error( "scale factor too big. 'int' will overflow." );
if( maxval_ == 1 )
{
if( n && ( n % 2 ) == 0 ) { enlarge_2b( data ); n /= 2; }
else if( n && ( n % 3 ) == 0 ) { enlarge_3b( data ); n /= 3; }
}
if( n >= 2 )
{
enlarge_n( data, n );
if( maxval_ > 1 )
{ if( n <= 3 ) convol_23( data, n ); else convol_n( data, n ); }
}
Rectangle::height( data.size() );
Rectangle::width( data[0].size() );
return true;
}
return false;
}
void Page_image::transform( const Transformation & t )
{
switch( t.type() )
{
case Transformation::none:
break;
case Transformation::rotate90:
mirror_diagonal( data, *this ); mirror_top_bottom( data ); break;
case Transformation::rotate180:
mirror_left_right( data ); mirror_top_bottom( data ); break;
case Transformation::rotate270:
mirror_diagonal( data, *this ); mirror_left_right( data ); break;
case Transformation::mirror_lr:
mirror_left_right( data ); break;
case Transformation::mirror_tb:
mirror_top_bottom( data ); break;
case Transformation::mirror_d1:
mirror_diagonal( data, *this ); break;
case Transformation::mirror_d2:
mirror_diagonal( data, *this );
mirror_left_right( data ); mirror_top_bottom( data ); break;
}
}
|
// Copyright 2011 by BBN Technologies Corp.
// All Rights Reserved.
#include "Generic/common/leak_detection.h"
#include "Generic/docRelationsEvents/StructuralRelationFinder.h"
#include "Generic/docRelationsEvents/xx_StructuralRelationFinder.h"
boost::shared_ptr<StructuralRelationFinder::Factory> &StructuralRelationFinder::_factory() {
static boost::shared_ptr<StructuralRelationFinder::Factory> factory(new GenericStructuralRelationFinderFactory());
return factory;
}
|
BITS 32
SEGMENT .text
_s:
mov eax, ecx
mov ebx, 2
mul bh
ret
|
db 1,0,17,0
db 0,0,15,0
db 0,0,13,0
db 0,0,5,0
db 1,0,10,0
db 1,11,17,0
db 0,11,15,0
db 0,11,13,0
db 0,11,5,0
db 1,11,10,0
db 1,33,17,0
db 0,33,15,0
db 0,33,13,0
db 0,33,5,0
db 1,33,10,0
db 1,44,17,0
db 0,44,15,0
db 0,44,13,0
db 0,44,5,0
db 1,44,10,0
db 1,55,17,0
db 0,55,15,0
db 0,55,13,0
db 0,55,5,0
db 1,55,10,0
db 1,66,17,0
db 0,66,15,0
db 0,66,13,0
db 0,66,5,0
db 1,66,10,0
db 1,77,17,0
db 0,77,15,0
db 0,77,13,0
db 0,77,5,0
db 1,77,10,0
db 1,88,17,0
db 0,88,15,0
db 0,88,13,0
db 0,88,5,0
db 1,88,10,0
db 1,99,17,0
db 0,99,15,0
db 0,99,13,0
db 0,99,5,0
db 1,99,10,0
db 2,0,0,200
db 0,0,0,180
db 0,0,0,150
db 2,0,0,120
db 2,0,0,80
db 1,0,17,200
db 0,0,15,180
db 0,0,13,150
db 1,0,5,120
db 1,0,10,80
db 2,0,17,80
db 0,0,15,70
db 0,0,13,60
db 0,0,5,50
db 2,0,10,40
db 1,0,17,200
db 0,0,15,200
db 0,0,13,200
db 0,0,5,200
db 1,0,10,200
db 2,0,9,89
db 0,0,8,89
db 0,0,6,89
db 0,0,6,89
db 2,0,4,89
db 2,0,4,89
db 0,0,6,89
db 0,11,6,89
db 0,22,6,89
db 2,0,5,88
db 2,11,5,88
db 0,22,5,88
db 2,0,5,44
db 2,0,5,22
db 1,0,0,0
db 1,0,0,0
db #ff |
; Test functions for fe10_carry.asm
;
; Author: Daan Sprenkels <hello@dsprenkels.com>
global crypto_scalarmult_curve13318_avx2_fe10x4_carry
global crypto_scalarmult_curve13318_avx2_fe10x4_carry2
%include "fe10x4_carry.mac.asm"
section .text
crypto_scalarmult_curve13318_avx2_fe10x4_carry2:
fe10x4_carry_load rdi
fe10x4_carry_body
fe10x4_carry_store rdi
ret
section .rodata
fe10x4_carry_consts
section .text
crypto_scalarmult_curve13318_avx2_fe10x4_carry:
fe10x4_carry_load rdi
fe10x4_carry_body_store rdi
ret
section .rodata
fe10x4_carry_consts
|
## Program to bitwise OR, AND, and XOR two patterns
.text
.globl main
main:
ori $15, $0,0x0FA5 # put bit pattern register into $15
ori $8,$15,0x368F # OR with second pattern
andi $9,$15,0x368F # AND with second pattern
xori $10,$15,0x368F # XOR with second pattern
## End of file |
; A015195: Sum of Gaussian binomial coefficients for q=9.
; Submitted by Stefano Spezia
; 1,2,12,184,9104,1225248,540023488,652225844096,2584219514040576,28081351726592246272,1001235747932175990213632,97915621602690773814148184064,31420034518763282871588038742544384,27654326463468067495668136467306727743488,79865567376783511810676695891367470783919996928,632642446717601700126816468172757960689214752513294336,16443613347872237421916800682583261845920285318128407391830016,1172299258979567122834509751764608678209631163348629474031794598838272
mov $1,$0
mov $0,0
add $1,1
mov $2,1
lpb $1
sub $1,1
mov $4,$2
mul $2,9
mul $4,$3
add $0,$4
sub $3,$4
add $3,$0
add $3,$2
lpe
mov $0,$3
div $0,81
add $0,1
|
; A016749: a(n) = (2*n)^9.
; 0,512,262144,10077696,134217728,1000000000,5159780352,20661046784,68719476736,198359290368,512000000000,1207269217792,2641807540224,5429503678976,10578455953408,19683000000000,35184372088832,60716992766464,101559956668416,165216101262848,262144000000000,406671383849472,618121839509504,922190162669056,1352605460594688,1953125000000000,2779905883635712,3904305912313344,5416169448144896,7427658739644928,10077696000000000,13537086546263552,18014398509481984,23762680013799936,31087100296429568
pow $0,9
mul $0,512
|
; A056174: Number of non-monotone maps from 1,...,n to 1,...,n.
; 0,0,0,10,190,2878,45738,820118,16764354,387371878,9999815254,285310965190,8916097744112,302875096191666
mov $1,$0
sub $2,$0
sub $1,$2
bin $1,$0
pow $0,$0
add $1,$2
sub $0,$1
|
.global s_prepare_buffers
s_prepare_buffers:
push %r12
push %r14
push %rbp
push %rbx
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_normal_ht+0x1c3f6, %rsi
lea addresses_A_ht+0x4b26, %rdi
nop
nop
cmp $26643, %r12
mov $30, %rcx
rep movsq
nop
nop
nop
nop
add %rbp, %rbp
lea addresses_WC_ht+0x7078, %rdx
nop
sub $51598, %r14
mov $0x6162636465666768, %rdi
movq %rdi, (%rdx)
nop
nop
nop
and %rbp, %rbp
lea addresses_WC_ht+0x1a226, %r14
nop
nop
nop
nop
and %rbp, %rbp
movb (%r14), %cl
nop
nop
nop
and $57098, %rbp
lea addresses_WT_ht+0x7ff6, %rsi
cmp $42493, %r14
movl $0x61626364, (%rsi)
sub %rbp, %rbp
lea addresses_UC_ht+0x1a626, %rsi
lea addresses_A_ht+0x5f12, %rdi
nop
nop
nop
add $7362, %rbx
mov $55, %rcx
rep movsq
nop
nop
nop
cmp $32283, %rbx
lea addresses_D_ht+0x1b326, %r14
nop
nop
nop
cmp %rbp, %rbp
movb $0x61, (%r14)
nop
nop
nop
nop
nop
xor $48200, %rdi
lea addresses_WC_ht+0x78e6, %rcx
inc %rdx
mov $0x6162636465666768, %r12
movq %r12, %xmm3
movups %xmm3, (%rcx)
nop
nop
nop
dec %rdx
lea addresses_A_ht+0x1c00a, %rsi
nop
nop
and $4210, %rcx
movw $0x6162, (%rsi)
nop
nop
nop
nop
add %rdx, %rdx
lea addresses_WC_ht+0x1ba31, %rsi
lea addresses_UC_ht+0xa126, %rdi
nop
xor $62141, %rdx
mov $115, %rcx
rep movsb
nop
and $51319, %rcx
lea addresses_UC_ht+0x445e, %rbp
nop
nop
nop
nop
nop
cmp $43125, %r14
mov (%rbp), %rdx
nop
nop
nop
inc %rbx
lea addresses_WT_ht+0x2d26, %r12
nop
nop
nop
add %rdi, %rdi
mov $0x6162636465666768, %rcx
movq %rcx, (%r12)
nop
cmp $58225, %r12
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbx
pop %rbp
pop %r14
pop %r12
ret
.global s_faulty_load
s_faulty_load:
push %r8
push %r9
push %rax
push %rbp
push %rbx
push %rdx
push %rsi
// Store
mov $0x826, %rbp
nop
nop
nop
nop
nop
add %rax, %rax
movw $0x5152, (%rbp)
nop
nop
nop
nop
nop
and $34124, %rax
// Store
lea addresses_UC+0x19526, %rsi
nop
nop
inc %rdx
mov $0x5152535455565758, %rbx
movq %rbx, %xmm5
vmovups %ymm5, (%rsi)
nop
nop
nop
xor $38065, %rsi
// Store
mov $0xd26, %rdx
and %r9, %r9
movw $0x5152, (%rdx)
cmp %rsi, %rsi
// Load
lea addresses_UC+0x13526, %rax
nop
and %rbp, %rbp
vmovups (%rax), %ymm3
vextracti128 $1, %ymm3, %xmm3
vpextrq $1, %xmm3, %r9
dec %rax
// Store
lea addresses_D+0x6d26, %rbx
nop
nop
cmp %rsi, %rsi
mov $0x5152535455565758, %r8
movq %r8, (%rbx)
nop
nop
nop
nop
nop
and %rbp, %rbp
// Faulty Load
lea addresses_D+0x6d26, %rax
nop
nop
and %rdx, %rdx
mov (%rax), %rbx
lea oracles, %r8
and $0xff, %rbx
shlq $12, %rbx
mov (%r8,%rbx,1), %rbx
pop %rsi
pop %rdx
pop %rbx
pop %rbp
pop %rax
pop %r9
pop %r8
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_D', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_P', 'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 5}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_UC', 'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 10}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_P', 'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 10}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_UC', 'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 10}}
{'OP': 'STOR', 'dst': {'same': True, 'type': 'addresses_D', 'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 0}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'same': True, 'type': 'addresses_D', 'NT': False, 'AVXalign': True, 'size': 8, 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'REPM', 'src': {'same': False, 'congruent': 2, 'type': 'addresses_normal_ht'}, 'dst': {'same': False, 'congruent': 8, 'type': 'addresses_A_ht'}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_WC_ht', 'NT': True, 'AVXalign': True, 'size': 8, 'congruent': 1}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_WC_ht', 'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 4}}
{'OP': 'STOR', 'dst': {'same': True, 'type': 'addresses_WT_ht', 'NT': False, 'AVXalign': True, 'size': 4, 'congruent': 4}}
{'OP': 'REPM', 'src': {'same': False, 'congruent': 7, 'type': 'addresses_UC_ht'}, 'dst': {'same': False, 'congruent': 2, 'type': 'addresses_A_ht'}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_D_ht', 'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 9}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_WC_ht', 'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 5}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_A_ht', 'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 2}}
{'OP': 'REPM', 'src': {'same': False, 'congruent': 0, 'type': 'addresses_WC_ht'}, 'dst': {'same': False, 'congruent': 7, 'type': 'addresses_UC_ht'}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_UC_ht', 'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 3}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_WT_ht', 'NT': True, 'AVXalign': False, 'size': 8, 'congruent': 11}}
{'58': 21829}
58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58
*/
|
#import "64spec/lib/64spec.asm"
#import "../lib/math-global.asm"
sfspec: init_spec()
describe("dec16")
it("of 0 gives 65535"); {
c64lib_dec16(dec16ZeroActual)
assert_equal16 dec16ZeroActual: dec16ZeroExpected
}
it("of 5 gives 4"); {
c64lib_dec16(dec16Actual)
assert_equal16 dec16Actual: dec16Expected
}
it("of 256 gives 255"); {
c64lib_dec16(dec16WordActual)
assert_equal16 dec16WordActual: dec16WordActual
}
finish_spec()
* = * "Data"
dec16Actual: .word 5
dec16Expected: .word 4
dec16WordActual: .word 256
dec16WordExpected: .word 255
dec16ZeroActual: .word 0
dec16ZeroExpected: .word $ffff |
// Created on: 1995-04-05
// Created by: Christophe MARION
// Copyright (c) 1995-1999 Matra Datavision
// Copyright (c) 1999-2014 OPEN CASCADE SAS
//
// This file is part of Open CASCADE Technology software library.
//
// This library is free software; you can redistribute it and/or modify it under
// the terms of the GNU Lesser General Public License version 2.1 as published
// by the Free Software Foundation, with special exception defined in the file
// OCCT_LGPL_EXCEPTION.txt. Consult the file LICENSE_LGPL_21.txt included in OCCT
// distribution for complete text of the license and disclaimer of any warranty.
//
// Alternatively, this file may be used under the terms of Open CASCADE
// commercial license or contractual agreement.
#ifndef _HLRTest_OutLiner_HeaderFile
#define _HLRTest_OutLiner_HeaderFile
#include <Standard.hxx>
#include <Standard_Type.hxx>
#include <Draw_Drawable3D.hxx>
#include <Standard_OStream.hxx>
#include <Draw_Interpretor.hxx>
class HLRTopoBRep_OutLiner;
class TopoDS_Shape;
class Draw_Display;
class Draw_Drawable3D;
class HLRTest_OutLiner;
DEFINE_STANDARD_HANDLE(HLRTest_OutLiner, Draw_Drawable3D)
class HLRTest_OutLiner : public Draw_Drawable3D
{
public:
Standard_EXPORT HLRTest_OutLiner(const TopoDS_Shape& S);
Handle(HLRTopoBRep_OutLiner) OutLiner() const;
//! Does nothhing,
Standard_EXPORT void DrawOn (Draw_Display& dis) const Standard_OVERRIDE;
//! For variable copy.
Standard_EXPORT virtual Handle(Draw_Drawable3D) Copy() const Standard_OVERRIDE;
//! For variable dump.
Standard_EXPORT virtual void Dump (Standard_OStream& S) const Standard_OVERRIDE;
//! For variable whatis command. Set as a result the
//! type of the variable.
Standard_EXPORT virtual void Whatis (Draw_Interpretor& I) const Standard_OVERRIDE;
DEFINE_STANDARD_RTTIEXT(HLRTest_OutLiner,Draw_Drawable3D)
protected:
private:
Handle(HLRTopoBRep_OutLiner) myOutLiner;
};
#include <HLRTest_OutLiner.lxx>
#endif // _HLRTest_OutLiner_HeaderFile
|
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
Copyright (c) Berkeley Softworks 1990 -- All Rights Reserved
PROJECT: PC GEOS
MODULE: Epson LX 9-pin driver
FILE: eplx9jx80Info.asm
AUTHOR: Dave Durran, 28 Mar 1990
REVISION HISTORY:
Name Date Description
---- ---- -----------
Dave 3/28/90 Initial revision
Dave 5/92 Initial 2.0 version
DESCRIPTION:
This file contains the device information for the Epson jx80 printer
Other Printers Supported by this resource:
$Id: eplx9jx80Info.asm,v 1.1 97/04/18 11:54:40 newdeal Exp $
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
;----------------------------------------------------------------------------
; Epson jx80
;----------------------------------------------------------------------------
jx80Info segment resource
; info blocks
PrinterInfo < ; ---- PrinterType -------------
< PT_RASTER,
BMF_4CMYK >,
; ---- PrinterConnections ------
< IC_NO_IEEE488,
CC_NO_CUSTOM,
SC_NO_SCSI,
RC_RS232C,
CC_CENTRONICS,
FC_FILE,
AC_NO_APPLETALK >,
; ---- PrinterSmarts -----------
PS_DUMB_RASTER,
;-------Custom Entry Routine-------
NULL,
;-------Custom Exit Routine-------
NULL,
; ---- Mode Info Offsets -------
offset jx80lowRes,
offset jx80medRes,
offset jx80hiRes,
offset printerFontInfo:fx80draft,
offset printerFontInfo:fx80nlq,
; ---- Font Geometry -----------
offset jx80fontGeometries,
; ---- Symbol Set list -----------
NULL,
; ---- PaperMargins ------------
< PR_MARGIN_LEFT, ; Tractor Margins
PR_MARGIN_TRACTOR,
PR_MARGIN_RIGHT,
PR_MARGIN_TRACTOR >,
< PR_MARGIN_LEFT, ; ASF Margins
PR_MARGIN_TOP,
PR_MARGIN_RIGHT,
PR_MARGIN_BOTTOM >,
; ---- PaperInputOptions -------
< MF_MANUAL1,
TF_TRACTOR1,
ASF_TRAY1 >,
; ---- PaperOutputOptions ------
< OC_NO_COPIES,
PS_REVERSE,
OD_SIMPLEX,
SO_NO_STAPLER,
OS_NO_SORTER,
OB_NO_OUTPUTBIN >,
;
612, ; paper width (points).
NULL, ; Main UI
ASF1BinOptionsDialogBox,; Options UI
PrintEvalASF1Bin ; UI eval Routine
>
;----------------------------------------------------------------------------
; Graphics modes info
;----------------------------------------------------------------------------
jx80lowRes GraphicsProperties < LO_RES_X_RES, ; xres
LO_RES_Y_RES, ; yres
LO_RES_BAND_HEIGHT, ; band height
LO_RES_BUFF_HEIGHT, ; buffer height
LO_RES_INTERLEAVE_FACTOR, ;#interleaves
BMF_4CMYK, ;color format
handle inkCorrection > ; color correction
jx80medRes GraphicsProperties < MED_RES_X_RES, ; xres
MED_RES_Y_RES, ; yres
MED_RES_BAND_HEIGHT, ; band height
MED_RES_BUFF_HEIGHT, ; buffer height
MED_RES_INTERLEAVE_FACTOR, ;#interleaves
BMF_4CMYK, ;color format
handle inkCorrection > ; color correction
jx80hiRes GraphicsProperties < HI_RES_X_RES, ; xres
HI_RES_Y_RES, ; yres
HI_RES_BAND_HEIGHT, ; band height
HI_RES_BUFF_HEIGHT, ; buffer height
HI_RES_INTERLEAVE_FACTOR, ;#interleaves
BMF_4CMYK, ;color format
handle inkCorrection > ; color correction
;----------------------------------------------------------------------------
; Text modes info
;----------------------------------------------------------------------------
;need to add geometries in ascending pointsize, grouped by font
jx80fontGeometries FontGeometry \
< FID_DTC_URW_ROMAN,
12,
offset jx80_12ptpitchTab >,
< FID_DTC_URW_ROMAN,
24,
offset jx80_24ptpitchTab >
word FID_INVALID ;table terminator
jx80_12ptpitchTab label byte
byte TP_20_PITCH
byte TP_17_PITCH
byte TP_12_PITCH
byte TP_10_PITCH
byte TP_6_PITCH
byte TP_5_PITCH
byte TP_PROPORTIONAL ;"table Terminator"
jx80_24ptpitchTab label byte
byte TP_12_PITCH
byte TP_10_PITCH
byte TP_6_PITCH
byte TP_5_PITCH
byte TP_PROPORTIONAL ;"table Terminator"
jx80Info ends
|
.global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r12
push %r13
push %r8
push %rax
push %rcx
push %rdi
push %rsi
lea addresses_WC_ht+0x1612a, %rsi
lea addresses_D_ht+0x1be0a, %rdi
inc %r12
mov $12, %rcx
rep movsb
nop
nop
nop
nop
nop
and %r8, %r8
lea addresses_A_ht+0x13082, %r11
nop
nop
nop
nop
nop
sub $2316, %rdi
mov $0x6162636465666768, %rsi
movq %rsi, %xmm0
vmovups %ymm0, (%r11)
inc %r11
lea addresses_UC_ht+0x1778a, %rcx
nop
xor %rax, %rax
mov $0x6162636465666768, %rdi
movq %rdi, %xmm0
movups %xmm0, (%rcx)
nop
nop
nop
nop
dec %r12
lea addresses_normal_ht+0x9276, %rsi
lea addresses_WT_ht+0x1c5ea, %rdi
clflush (%rsi)
nop
nop
and $10215, %rax
mov $121, %rcx
rep movsb
nop
nop
nop
nop
sub %rsi, %rsi
lea addresses_normal_ht+0x106a, %r11
clflush (%r11)
nop
sub %rcx, %rcx
mov (%r11), %r8w
nop
and $35908, %r8
lea addresses_A_ht+0xa26a, %rcx
nop
nop
nop
nop
nop
add %r11, %r11
mov $0x6162636465666768, %rdi
movq %rdi, %xmm5
vmovups %ymm5, (%rcx)
nop
dec %r12
lea addresses_normal_ht+0x7e8a, %rcx
nop
nop
dec %r11
movl $0x61626364, (%rcx)
nop
nop
nop
nop
xor $47628, %rdi
lea addresses_normal_ht+0x100ca, %rsi
lea addresses_WT_ht+0x1c46a, %rdi
nop
nop
nop
nop
nop
dec %r13
mov $127, %rcx
rep movsq
nop
nop
nop
nop
nop
add %r11, %r11
lea addresses_UC_ht+0x1c6ea, %r8
nop
nop
mfence
mov (%r8), %cx
nop
nop
nop
and %rcx, %rcx
lea addresses_A_ht+0xac6a, %rsi
lea addresses_normal_ht+0x956a, %rdi
nop
nop
nop
xor %r12, %r12
mov $17, %rcx
rep movsw
nop
nop
nop
nop
and %r12, %r12
lea addresses_D_ht+0x1c6a, %rsi
lea addresses_UC_ht+0x9c6a, %rdi
nop
nop
nop
mfence
mov $115, %rcx
rep movsl
nop
xor %r12, %r12
lea addresses_normal_ht+0x56ca, %rdi
nop
nop
nop
nop
nop
cmp %r12, %r12
movb $0x61, (%rdi)
sub $28306, %r11
pop %rsi
pop %rdi
pop %rcx
pop %rax
pop %r8
pop %r13
pop %r12
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r12
push %r14
push %rax
push %rcx
push %rdi
push %rsi
// REPMOV
lea addresses_PSE+0x8e6a, %rsi
lea addresses_normal+0xe86a, %rdi
nop
nop
nop
nop
dec %r10
mov $2, %rcx
rep movsw
nop
and %r10, %r10
// Store
lea addresses_PSE+0x286a, %rsi
nop
nop
nop
nop
cmp $21423, %r12
mov $0x5152535455565758, %r10
movq %r10, (%rsi)
nop
nop
nop
nop
add %rax, %rax
// Faulty Load
mov $0x4806b000000046a, %r10
nop
nop
nop
nop
nop
sub %r12, %r12
vmovups (%r10), %ymm4
vextracti128 $1, %ymm4, %xmm4
vpextrq $0, %xmm4, %rdi
lea oracles, %r14
and $0xff, %rdi
shlq $12, %rdi
mov (%r14,%rdi,1), %rdi
pop %rsi
pop %rdi
pop %rcx
pop %rax
pop %r14
pop %r12
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 2, 'type': 'addresses_NC', 'congruent': 0}}
{'dst': {'same': False, 'congruent': 8, 'type': 'addresses_normal'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 9, 'type': 'addresses_PSE'}}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 8, 'type': 'addresses_PSE', 'congruent': 9}, 'OP': 'STOR'}
[Faulty Load]
{'OP': 'LOAD', 'src': {'same': True, 'NT': False, 'AVXalign': False, 'size': 32, 'type': 'addresses_NC', 'congruent': 0}}
<gen_prepare_buffer>
{'dst': {'same': False, 'congruent': 4, 'type': 'addresses_D_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 4, 'type': 'addresses_WC_ht'}}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 32, 'type': 'addresses_A_ht', 'congruent': 3}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 16, 'type': 'addresses_UC_ht', 'congruent': 5}, 'OP': 'STOR'}
{'dst': {'same': False, 'congruent': 5, 'type': 'addresses_WT_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 2, 'type': 'addresses_normal_ht'}}
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 2, 'type': 'addresses_normal_ht', 'congruent': 10}}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 32, 'type': 'addresses_A_ht', 'congruent': 9}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 4, 'type': 'addresses_normal_ht', 'congruent': 2}, 'OP': 'STOR'}
{'dst': {'same': False, 'congruent': 11, 'type': 'addresses_WT_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 5, 'type': 'addresses_normal_ht'}}
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 2, 'type': 'addresses_UC_ht', 'congruent': 5}}
{'dst': {'same': False, 'congruent': 7, 'type': 'addresses_normal_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 11, 'type': 'addresses_A_ht'}}
{'dst': {'same': False, 'congruent': 10, 'type': 'addresses_UC_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 11, 'type': 'addresses_D_ht'}}
{'dst': {'same': False, 'NT': True, 'AVXalign': False, 'size': 1, 'type': 'addresses_normal_ht', 'congruent': 4}, 'OP': 'STOR'}
{'ba': 1, 'dd': 1, '92': 1, '49': 1, '20': 2, '2f': 1, '89': 1, 'fd': 1, '35': 2, '5b': 1, '09': 1, '3b': 4, 'b6': 2, 'ff': 2, '58': 7, '3e': 1, '39': 1, '9a': 1, '6a': 1, '0a': 2, 'a7': 1, '01': 1, 'a1': 1, '4f': 1, 'd5': 1, '07': 1, 'a9': 1, '00': 12, 'e5': 1, '41': 1, '64': 1, '7b': 1, '59': 31, '7d': 1, '7f': 1, '46': 1316, '63': 1, '32': 1, '29': 1, 'a8': 1, '6e': 2813, '1c': 1, 'c9': 2, '3f': 1, '44': 17599, 'ca': 1, 'cf': 1, '91': 1}
44 44 6e 46 44 44 44 44 44 44 44 44 44 6e 44 46 46 44 44 44 44 44 44 44 44 46 44 44 46 44 44 44 44 44 44 44 44 46 44 44 44 44 44 44 44 46 44 44 44 6e 44 6e 6e 44 6e 44 44 44 44 44 46 44 44 6e 44 44 44 44 6e 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 b6 6e 44 44 6e 44 44 44 44 44 44 44 44 44 46 6e 44 44 6e 46 44 6e 44 44 44 44 44 44 44 44 44 46 44 44 6e 44 44 44 46 44 44 44 44 6e 44 44 44 44 6e 44 44 44 6e 44 44 44 91 46 6e 6e 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 6e 44 44 44 44 44 44 44 44 44 44 44 44 44 6e 44 44 44 44 44 44 44 44 44 44 44 6e 44 6e 44 6e 44 44 44 6e 44 44 6e 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 46 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 6e 44 44 44 44 46 44 44 44 44 44 44 44 46 44 44 46 44 44 44 44 44 44 44 44 46 44 44 44 44 6e 44 44 44 44 44 44 44 44 44 44 44 46 44 44 44 44 44 44 44 44 44 44 46 44 44 44 6e 44 44 6e 44 6e 6e 44 44 44 44 46 44 44 6e 44 44 44 44 44 44 44 6e 44 44 44 44 6e 44 44 44 46 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 46 44 44 44 44 44 44 44 44 44 44 44 fd 6e 6e 44 44 44 44 44 44 46 44 44 44 44 44 44 44 44 44 44 6e 44 44 44 44 44 44 44 44 44 6e 44 44 44 44 44 44 44 46 44 44 44 44 44 44 44 44 6e 44 44 44 44 6e 44 44 44 44 44 44 44 44 44 44 46 44 44 6e 44 44 44 44 44 44 44 44 46 44 44 46 44 44 44 44 46 44 44 44 6e 44 44 44 6e 44 44 44 44 44 6e 44 44 44 46 44 44 44 44 44 44 44 6e 44 6e 44 44 44 46 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 6e 46 44 44 44 44 44 44 44 44 44 44 44 6e 44 44 44 44 44 44 44 44 6e 44 44 44 44 44 44 44 44 44 44 44 6e 6e 44 44 44 6e 44 44 6e 44 44 44 44 46 44 44 44 6e 44 44 44 46 44 44 44 44 44 6e 44 44 44 44 44 44 44 44 44 6e 44 6e 44 46 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 46 44 44 44 44 44 44 44 44 46 44 44 46 46 44 6e 44 44 44 44 44 44 44 46 44 44 44 44 44 44 44 46 46 44 44 44 44 46 44 44 46 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 46 44 44 44 44 46 44 44 44 44 44 44 44 44 44 46 44 44 44 44 44 44 44 46 44 44 44 44 44 44 46 44 44 44 44 44 44 44 44 44 44 44 46 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 46 44 6e 46 44 44 44 46 44 44 44 6e 44 44 44 44 44 44 6e 44 44 46 44 44 44 44 6e 6e 44 46 44 44 6e 44 44 44 44 44 44 44 44 44 44 44 46 44 44 44 44 44 44 44 44 44 44 44 46 44 44 44 44 44 44 44 46 44 44 44 44 44 44 44 46 44 44 6e 44 44 44 44 44 44 44 44 6e 6e 44 6e 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 6e 6e 44 44 44 44 44 6e 44 44 44 44 46 44 44 44 44 44 44 44 44 44 44 44 46 44 44 44 44 44 44 44 44 44 44 44 44 44 46 44 44 44 44 44 44 44 44 6e 44 46 44 44 44 44 44 44 44 44 44 44 6e 44 44 46 44 46 44 44 46 44 44 44 44 44 44 44 44 44 44 44 44 44 44 6e 44 44 44 44 46 6e 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 6e 44 44 44 6e 44 44 44 44 44 44 44 44 44 44 44
*/
|
SECTION code_clib
PUBLIC ansi_del_line
EXTERN ansi_del_line_generic
defc ansi_del_line = ansi_del_line_generic
|
.global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r8
push %rax
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_D_ht+0x136df, %rsi
lea addresses_WC_ht+0x126a7, %rdi
clflush (%rsi)
nop
nop
nop
add %r8, %r8
mov $114, %rcx
rep movsq
nop
nop
nop
nop
and %r8, %r8
lea addresses_normal_ht+0x7a67, %rax
nop
nop
cmp %rcx, %rcx
and $0xffffffffffffffc0, %rax
movaps (%rax), %xmm1
vpextrq $0, %xmm1, %r10
nop
nop
nop
cmp $25386, %r10
lea addresses_UC_ht+0xe6a7, %rsi
lea addresses_UC_ht+0x1d8a7, %rdi
nop
nop
nop
nop
inc %rbx
mov $21, %rcx
rep movsq
nop
dec %rsi
lea addresses_WC_ht+0x74a7, %r8
nop
nop
xor %r10, %r10
mov (%r8), %bx
nop
nop
nop
nop
nop
add $47596, %rcx
lea addresses_WC_ht+0x5aa7, %rsi
lea addresses_D_ht+0x7a37, %rdi
nop
lfence
mov $59, %rcx
rep movsw
nop
and %rsi, %rsi
lea addresses_A_ht+0xa4a7, %rsi
nop
nop
nop
nop
and $48233, %r8
mov (%rsi), %r10
nop
xor $52195, %rdi
lea addresses_UC_ht+0x2cb7, %rdi
add $39381, %r8
vmovups (%rdi), %ymm7
vextracti128 $1, %ymm7, %xmm7
vpextrq $1, %xmm7, %r10
nop
nop
nop
and $29516, %rbx
lea addresses_D_ht+0x12b71, %rsi
lea addresses_WC_ht+0xb4a7, %rdi
clflush (%rdi)
nop
nop
nop
dec %r10
mov $46, %rcx
rep movsw
dec %rbx
lea addresses_A_ht+0x11fa7, %r8
nop
nop
nop
nop
xor %r10, %r10
mov $0x6162636465666768, %rsi
movq %rsi, (%r8)
nop
nop
nop
nop
inc %rcx
lea addresses_A_ht+0xdc27, %rsi
add %rbx, %rbx
movb $0x61, (%rsi)
nop
nop
and $26638, %r10
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rax
pop %r8
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r13
push %rbp
push %rcx
push %rdi
push %rdx
push %rsi
// REPMOV
lea addresses_UC+0x4a87, %rsi
lea addresses_UC+0xcbfd, %rdi
clflush (%rsi)
sub $36452, %rbp
mov $29, %rcx
rep movsb
nop
nop
nop
nop
xor %rsi, %rsi
// Store
mov $0x5530fe00000002f7, %r13
nop
nop
sub $19858, %rdx
mov $0x5152535455565758, %rsi
movq %rsi, %xmm7
movaps %xmm7, (%r13)
nop
nop
nop
xor $14981, %rdx
// Store
lea addresses_RW+0x1a4f7, %rcx
nop
nop
nop
nop
dec %rbp
mov $0x5152535455565758, %rdi
movq %rdi, %xmm5
vmovups %ymm5, (%rcx)
nop
nop
nop
nop
inc %rsi
// Store
lea addresses_UC+0x144a7, %r10
nop
nop
nop
nop
add $44388, %rdx
mov $0x5152535455565758, %rsi
movq %rsi, %xmm5
movups %xmm5, (%r10)
// Exception!!!
nop
nop
nop
mov (0), %rdx
nop
nop
nop
xor %rsi, %rsi
// Faulty Load
lea addresses_RW+0x11ca7, %rbp
nop
dec %rdi
movb (%rbp), %r10b
lea oracles, %rcx
and $0xff, %r10
shlq $12, %r10
mov (%rcx,%r10,1), %r10
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbp
pop %r13
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'NT': True, 'AVXalign': False, 'size': 32, 'congruent': 0, 'same': False, 'type': 'addresses_RW'}, 'OP': 'LOAD'}
{'src': {'congruent': 5, 'same': False, 'type': 'addresses_UC'}, 'dst': {'congruent': 1, 'same': False, 'type': 'addresses_UC'}, 'OP': 'REPM'}
{'dst': {'NT': False, 'AVXalign': True, 'size': 16, 'congruent': 4, 'same': False, 'type': 'addresses_NC'}, 'OP': 'STOR'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 4, 'same': False, 'type': 'addresses_RW'}, 'OP': 'STOR'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 9, 'same': False, 'type': 'addresses_UC'}, 'OP': 'STOR'}
[Faulty Load]
{'src': {'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 0, 'same': True, 'type': 'addresses_RW'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'congruent': 2, 'same': False, 'type': 'addresses_D_ht'}, 'dst': {'congruent': 9, 'same': False, 'type': 'addresses_WC_ht'}, 'OP': 'REPM'}
{'src': {'NT': False, 'AVXalign': True, 'size': 16, 'congruent': 5, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 9, 'same': False, 'type': 'addresses_UC_ht'}, 'dst': {'congruent': 10, 'same': False, 'type': 'addresses_UC_ht'}, 'OP': 'REPM'}
{'src': {'NT': True, 'AVXalign': False, 'size': 2, 'congruent': 10, 'same': False, 'type': 'addresses_WC_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 8, 'same': False, 'type': 'addresses_WC_ht'}, 'dst': {'congruent': 3, 'same': False, 'type': 'addresses_D_ht'}, 'OP': 'REPM'}
{'src': {'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 9, 'same': False, 'type': 'addresses_A_ht'}, 'OP': 'LOAD'}
{'src': {'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 3, 'same': False, 'type': 'addresses_UC_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 1, 'same': True, 'type': 'addresses_D_ht'}, 'dst': {'congruent': 9, 'same': False, 'type': 'addresses_WC_ht'}, 'OP': 'REPM'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 3, 'same': False, 'type': 'addresses_A_ht'}, 'OP': 'STOR'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 7, 'same': True, 'type': 'addresses_A_ht'}, 'OP': 'STOR'}
{'32': 21829}
32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32
*/
|
MAGIC equ 0x1BADB002
MBALIGN equ 1 << 0
MEMINFO equ 1 << 1
CHECKSUM equ -(MAGIC + (MBALIGN | MEMINFO))
KiB equ 1024
MiB equ KiB * 1024
; define the multiboot header
section .multiboot
align 4
magic dd MAGIC
flags dd MBALIGN | MEMINFO
checksum dd CHECKSUM
section .data
KERNEL_V_ADDR equ 0xC0000000
KERNEL_V_PAGENO equ (KERNEL_V_ADDR >> 22)
align 4096
boot_page_dir:
dd 0x00000083 ; first 4MB identity mapped
times (KERNEL_V_PAGENO - 1) dd 0 ; bunch of empty pages
; kernel v addr entry
dd 0x00000083
times (1024 - KERNEL_V_PAGENO - 1) dd 0 ; fill the rest of the table
section .text
global _boot
_boot:
; time for paging :D
mov eax, (boot_page_dir - KERNEL_V_ADDR)
mov cr3, eax
; enable PSE
mov eax, cr4
or eax, 0x00000010
mov cr4, eax
; enable paging
mov eax, cr0
or eax, 0x80000001
mov cr0, eax
lea ecx, [_start]
jmp ecx
; multiboot wants to know where to start! we're startin here at _start
_start:
; invalidate the first 4MB identity mapping
mov dword [boot_page_dir], 0
invlpg [0]
; set up the stack! esp points to the top of the stack and it grows downwards
mov esp, stack_top
; call the kernel_main function
extern kernel_main
call kernel_main
; this *SHOULD* hang forever cuz it waits for an interrupt (which we disabled) but fuck sometimes some weird settings can still raise interrupts so we inf loop anyway
.hang: hlt
jmp .hang ; yeet
; multiboot does not designate a stack pointer
section .bss
align 16
stack_bot:
resb 16 * KiB
stack_top:
; temporary kernel heap
global heap_bot
heap_bot:
resb 16 * KiB
heap_top:
|
AREA |.text|,CODE,ALIGN=8,ARM64
EXPORT |add_mod_384|[FUNC]
ALIGN 32
|add_mod_384| PROC
DCDU 3573752639
stp x29,x30,[sp,#-48]!
add x29,sp,#0
stp x19,x20,[sp,#16]
stp x21,x22,[sp,#32]
ldp x4,x5,[x3]
ldp x6,x7,[x3,#16]
ldp x8,x9,[x3,#32]
bl __add_mod_384
ldr x30,[sp,#8]
stp x10,x11,[x0]
stp x12,x13,[x0,#16]
stp x14,x15,[x0,#32]
ldp x19,x20,[x29,#16]
ldp x21,x22,[x29,#32]
ldr x29,[sp],#48
DCDU 3573752767
ret
ENDP
ALIGN 32
|__add_mod_384| PROC
ldp x10,x11,[x1]
ldp x16,x17,[x2]
ldp x12,x13,[x1,#16]
ldp x19,x20,[x2,#16]
ldp x14,x15,[x1,#32]
ldp x21,x22,[x2,#32]
|__add_mod_384_ab_are_loaded|
adds x10,x10,x16
adcs x11,x11,x17
adcs x12,x12,x19
adcs x13,x13,x20
adcs x14,x14,x21
adcs x15,x15,x22
adc x3,xzr,xzr
subs x16,x10,x4
sbcs x17,x11,x5
sbcs x19,x12,x6
sbcs x20,x13,x7
sbcs x21,x14,x8
sbcs x22,x15,x9
sbcs xzr,x3,xzr
csello x10,x10,x16
csello x11,x11,x17
csello x12,x12,x19
csello x13,x13,x20
csello x14,x14,x21
csello x15,x15,x22
ret
ENDP
EXPORT |add_mod_384x|[FUNC]
ALIGN 32
|add_mod_384x| PROC
DCDU 3573752639
stp x29,x30,[sp,#-48]!
add x29,sp,#0
stp x19,x20,[sp,#16]
stp x21,x22,[sp,#32]
ldp x4,x5,[x3]
ldp x6,x7,[x3,#16]
ldp x8,x9,[x3,#32]
bl __add_mod_384
stp x10,x11,[x0]
add x1,x1,#48
stp x12,x13,[x0,#16]
add x2,x2,#48
stp x14,x15,[x0,#32]
bl __add_mod_384
ldr x30,[sp,#8]
stp x10,x11,[x0,#48]
stp x12,x13,[x0,#64]
stp x14,x15,[x0,#80]
ldp x19,x20,[x29,#16]
ldp x21,x22,[x29,#32]
ldr x29,[sp],#48
DCDU 3573752767
ret
ENDP
EXPORT |lshift_mod_384|[FUNC]
ALIGN 32
|lshift_mod_384| PROC
DCDU 3573752639
stp x29,x30,[sp,#-48]!
add x29,sp,#0
stp x19,x20,[sp,#16]
stp x21,x22,[sp,#32]
ldp x10,x11,[x1]
ldp x12,x13,[x1,#16]
ldp x14,x15,[x1,#32]
ldp x4,x5,[x3]
ldp x6,x7,[x3,#16]
ldp x8,x9,[x3,#32]
|$Loop_lshift_mod_384|
sub x2,x2,#1
bl __lshift_mod_384
cbnz x2,|$Loop_lshift_mod_384|
ldr x30,[sp,#8]
stp x10,x11,[x0]
stp x12,x13,[x0,#16]
stp x14,x15,[x0,#32]
ldp x19,x20,[x29,#16]
ldp x21,x22,[x29,#32]
ldr x29,[sp],#48
DCDU 3573752767
ret
ENDP
ALIGN 32
|__lshift_mod_384| PROC
adds x10,x10,x10
adcs x11,x11,x11
adcs x12,x12,x12
adcs x13,x13,x13
adcs x14,x14,x14
adcs x15,x15,x15
adc x3,xzr,xzr
subs x16,x10,x4
sbcs x17,x11,x5
sbcs x19,x12,x6
sbcs x20,x13,x7
sbcs x21,x14,x8
sbcs x22,x15,x9
sbcs xzr,x3,xzr
csello x10,x10,x16
csello x11,x11,x17
csello x12,x12,x19
csello x13,x13,x20
csello x14,x14,x21
csello x15,x15,x22
ret
ENDP
EXPORT |mul_by_3_mod_384|[FUNC]
ALIGN 32
|mul_by_3_mod_384| PROC
DCDU 3573752639
stp x29,x30,[sp,#-48]!
add x29,sp,#0
stp x19,x20,[sp,#16]
stp x21,x22,[sp,#32]
ldp x10,x11,[x1]
ldp x12,x13,[x1,#16]
ldp x14,x15,[x1,#32]
ldp x4,x5,[x2]
ldp x6,x7,[x2,#16]
ldp x8,x9,[x2,#32]
bl __lshift_mod_384
ldp x16,x17,[x1]
ldp x19,x20,[x1,#16]
ldp x21,x22,[x1,#32]
bl __add_mod_384_ab_are_loaded
ldr x30,[sp,#8]
stp x10,x11,[x0]
stp x12,x13,[x0,#16]
stp x14,x15,[x0,#32]
ldp x19,x20,[x29,#16]
ldp x21,x22,[x29,#32]
ldr x29,[sp],#48
DCDU 3573752767
ret
ENDP
EXPORT |mul_by_8_mod_384|[FUNC]
ALIGN 32
|mul_by_8_mod_384| PROC
DCDU 3573752639
stp x29,x30,[sp,#-48]!
add x29,sp,#0
stp x19,x20,[sp,#16]
stp x21,x22,[sp,#32]
ldp x10,x11,[x1]
ldp x12,x13,[x1,#16]
ldp x14,x15,[x1,#32]
ldp x4,x5,[x2]
ldp x6,x7,[x2,#16]
ldp x8,x9,[x2,#32]
bl __lshift_mod_384
bl __lshift_mod_384
bl __lshift_mod_384
ldr x30,[sp,#8]
stp x10,x11,[x0]
stp x12,x13,[x0,#16]
stp x14,x15,[x0,#32]
ldp x19,x20,[x29,#16]
ldp x21,x22,[x29,#32]
ldr x29,[sp],#48
DCDU 3573752767
ret
ENDP
EXPORT |mul_by_b_onE1|[FUNC]
ALIGN 32
|mul_by_b_onE1| PROC
DCDU 3573752639
stp x29,x30,[sp,#-48]!
add x29,sp,#0
stp x19,x20,[sp,#16]
stp x21,x22,[sp,#32]
adrp x3,BLS12_381_P
ldp x10,x11,[x1]
add x3,x3,BLS12_381_P
ldp x12,x13,[x1,#16]
ldp x14,x15,[x1,#32]
ldp x4,x5,[x3]
ldp x6,x7,[x3,#16]
ldp x8,x9,[x3,#32]
bl __lshift_mod_384
bl __lshift_mod_384
ldr x30,[sp,#8]
stp x10,x11,[x0]
stp x12,x13,[x0,#16]
stp x14,x15,[x0,#32]
ldp x19,x20,[x29,#16]
ldp x21,x22,[x29,#32]
ldr x29,[sp],#48
DCDU 3573752767
ret
ENDP
EXPORT |mul_by_4b_onE1|[FUNC]
ALIGN 32
|mul_by_4b_onE1| PROC
DCDU 3573752639
stp x29,x30,[sp,#-48]!
add x29,sp,#0
stp x19,x20,[sp,#16]
stp x21,x22,[sp,#32]
adrp x3,BLS12_381_P
ldp x10,x11,[x1]
add x3,x3,BLS12_381_P
ldp x12,x13,[x1,#16]
ldp x14,x15,[x1,#32]
ldp x4,x5,[x3]
ldp x6,x7,[x3,#16]
ldp x8,x9,[x3,#32]
bl __lshift_mod_384
bl __lshift_mod_384
bl __lshift_mod_384
bl __lshift_mod_384
ldr x30,[sp,#8]
stp x10,x11,[x0]
stp x12,x13,[x0,#16]
stp x14,x15,[x0,#32]
ldp x19,x20,[x29,#16]
ldp x21,x22,[x29,#32]
ldr x29,[sp],#48
DCDU 3573752767
ret
ENDP
EXPORT |mul_by_3_mod_384x|[FUNC]
ALIGN 32
|mul_by_3_mod_384x| PROC
DCDU 3573752639
stp x29,x30,[sp,#-48]!
add x29,sp,#0
stp x19,x20,[sp,#16]
stp x21,x22,[sp,#32]
ldp x10,x11,[x1]
ldp x12,x13,[x1,#16]
ldp x14,x15,[x1,#32]
ldp x4,x5,[x2]
ldp x6,x7,[x2,#16]
ldp x8,x9,[x2,#32]
bl __lshift_mod_384
ldp x16,x17,[x1]
ldp x19,x20,[x1,#16]
ldp x21,x22,[x1,#32]
bl __add_mod_384_ab_are_loaded
stp x10,x11,[x0]
ldp x10,x11,[x1,#48]
stp x12,x13,[x0,#16]
ldp x12,x13,[x1,#64]
stp x14,x15,[x0,#32]
ldp x14,x15,[x1,#80]
bl __lshift_mod_384
ldp x16,x17,[x1,#48]
ldp x19,x20,[x1,#64]
ldp x21,x22,[x1,#80]
bl __add_mod_384_ab_are_loaded
ldr x30,[sp,#8]
stp x10,x11,[x0,#48]
stp x12,x13,[x0,#64]
stp x14,x15,[x0,#80]
ldp x19,x20,[x29,#16]
ldp x21,x22,[x29,#32]
ldr x29,[sp],#48
DCDU 3573752767
ret
ENDP
EXPORT |mul_by_8_mod_384x|[FUNC]
ALIGN 32
|mul_by_8_mod_384x| PROC
DCDU 3573752639
stp x29,x30,[sp,#-48]!
add x29,sp,#0
stp x19,x20,[sp,#16]
stp x21,x22,[sp,#32]
ldp x10,x11,[x1]
ldp x12,x13,[x1,#16]
ldp x14,x15,[x1,#32]
ldp x4,x5,[x2]
ldp x6,x7,[x2,#16]
ldp x8,x9,[x2,#32]
bl __lshift_mod_384
bl __lshift_mod_384
bl __lshift_mod_384
stp x10,x11,[x0]
ldp x10,x11,[x1,#48]
stp x12,x13,[x0,#16]
ldp x12,x13,[x1,#64]
stp x14,x15,[x0,#32]
ldp x14,x15,[x1,#80]
bl __lshift_mod_384
bl __lshift_mod_384
bl __lshift_mod_384
ldr x30,[sp,#8]
stp x10,x11,[x0,#48]
stp x12,x13,[x0,#64]
stp x14,x15,[x0,#80]
ldp x19,x20,[x29,#16]
ldp x21,x22,[x29,#32]
ldr x29,[sp],#48
DCDU 3573752767
ret
ENDP
EXPORT |mul_by_b_onE2|[FUNC]
ALIGN 32
|mul_by_b_onE2| PROC
DCDU 3573752639
stp x29,x30,[sp,#-48]!
add x29,sp,#0
stp x19,x20,[sp,#16]
stp x21,x22,[sp,#32]
adrp x3,BLS12_381_P
add x3,x3,BLS12_381_P
add x2,x1,#48
ldp x4,x5,[x3]
ldp x6,x7,[x3,#16]
ldp x8,x9,[x3,#32]
bl __sub_mod_384
bl __lshift_mod_384
bl __lshift_mod_384
stp x10,x11,[x0]
stp x12,x13,[x0,#16]
stp x14,x15,[x0,#32]
bl __add_mod_384
bl __lshift_mod_384
bl __lshift_mod_384
ldr x30,[sp,#8]
stp x10,x11,[x0,#48]
stp x12,x13,[x0,#64]
stp x14,x15,[x0,#80]
ldp x19,x20,[x29,#16]
ldp x21,x22,[x29,#32]
ldr x29,[sp],#48
DCDU 3573752767
ret
ENDP
EXPORT |mul_by_4b_onE2|[FUNC]
ALIGN 32
|mul_by_4b_onE2| PROC
DCDU 3573752639
stp x29,x30,[sp,#-48]!
add x29,sp,#0
stp x19,x20,[sp,#16]
stp x21,x22,[sp,#32]
adrp x3,BLS12_381_P
add x3,x3,BLS12_381_P
add x2,x1,#48
ldp x4,x5,[x3]
ldp x6,x7,[x3,#16]
ldp x8,x9,[x3,#32]
bl __sub_mod_384
bl __lshift_mod_384
bl __lshift_mod_384
bl __lshift_mod_384
bl __lshift_mod_384
stp x10,x11,[x0]
stp x12,x13,[x0,#16]
stp x14,x15,[x0,#32]
bl __add_mod_384
bl __lshift_mod_384
bl __lshift_mod_384
bl __lshift_mod_384
bl __lshift_mod_384
ldr x30,[sp,#8]
stp x10,x11,[x0,#48]
stp x12,x13,[x0,#64]
stp x14,x15,[x0,#80]
ldp x19,x20,[x29,#16]
ldp x21,x22,[x29,#32]
ldr x29,[sp],#48
DCDU 3573752767
ret
ENDP
EXPORT |cneg_mod_384|[FUNC]
ALIGN 32
|cneg_mod_384| PROC
DCDU 3573752639
stp x29,x30,[sp,#-48]!
add x29,sp,#0
stp x19,x20,[sp,#16]
stp x21,x22,[sp,#32]
ldp x10,x11,[x1]
ldp x4,x5,[x3]
ldp x12,x13,[x1,#16]
ldp x6,x7,[x3,#16]
subs x16,x4,x10
ldp x14,x15,[x1,#32]
ldp x8,x9,[x3,#32]
orr x3,x10,x11
sbcs x17,x5,x11
orr x3,x3,x12
sbcs x19,x6,x12
orr x3,x3,x13
sbcs x20,x7,x13
orr x3,x3,x14
sbcs x21,x8,x14
orr x3,x3,x15
sbc x22,x9,x15
cmp x3,#0
csetmne x3
ands x2,x2,x3
cseleq x10,x10,x16
cseleq x11,x11,x17
cseleq x12,x12,x19
cseleq x13,x13,x20
stp x10,x11,[x0]
cseleq x14,x14,x21
stp x12,x13,[x0,#16]
cseleq x15,x15,x22
stp x14,x15,[x0,#32]
ldp x19,x20,[x29,#16]
ldp x21,x22,[x29,#32]
ldr x29,[sp],#48
DCDU 3573752767
ret
ENDP
EXPORT |sub_mod_384|[FUNC]
ALIGN 32
|sub_mod_384| PROC
DCDU 3573752639
stp x29,x30,[sp,#-48]!
add x29,sp,#0
stp x19,x20,[sp,#16]
stp x21,x22,[sp,#32]
ldp x4,x5,[x3]
ldp x6,x7,[x3,#16]
ldp x8,x9,[x3,#32]
bl __sub_mod_384
ldr x30,[sp,#8]
stp x10,x11,[x0]
stp x12,x13,[x0,#16]
stp x14,x15,[x0,#32]
ldp x19,x20,[x29,#16]
ldp x21,x22,[x29,#32]
ldr x29,[sp],#48
DCDU 3573752767
ret
ENDP
ALIGN 32
|__sub_mod_384| PROC
ldp x10,x11,[x1]
ldp x16,x17,[x2]
ldp x12,x13,[x1,#16]
ldp x19,x20,[x2,#16]
ldp x14,x15,[x1,#32]
ldp x21,x22,[x2,#32]
subs x10,x10,x16
sbcs x11,x11,x17
sbcs x12,x12,x19
sbcs x13,x13,x20
sbcs x14,x14,x21
sbcs x15,x15,x22
sbc x3,xzr,xzr
and x16,x4,x3
and x17,x5,x3
adds x10,x10,x16
and x19,x6,x3
adcs x11,x11,x17
and x20,x7,x3
adcs x12,x12,x19
and x21,x8,x3
adcs x13,x13,x20
and x22,x9,x3
adcs x14,x14,x21
adc x15,x15,x22
ret
ENDP
EXPORT |sub_mod_384x|[FUNC]
ALIGN 32
|sub_mod_384x| PROC
DCDU 3573752639
stp x29,x30,[sp,#-48]!
add x29,sp,#0
stp x19,x20,[sp,#16]
stp x21,x22,[sp,#32]
ldp x4,x5,[x3]
ldp x6,x7,[x3,#16]
ldp x8,x9,[x3,#32]
bl __sub_mod_384
stp x10,x11,[x0]
add x1,x1,#48
stp x12,x13,[x0,#16]
add x2,x2,#48
stp x14,x15,[x0,#32]
bl __sub_mod_384
ldr x30,[sp,#8]
stp x10,x11,[x0,#48]
stp x12,x13,[x0,#64]
stp x14,x15,[x0,#80]
ldp x19,x20,[x29,#16]
ldp x21,x22,[x29,#32]
ldr x29,[sp],#48
DCDU 3573752767
ret
ENDP
EXPORT |mul_by_1_plus_i_mod_384x|[FUNC]
ALIGN 32
|mul_by_1_plus_i_mod_384x| PROC
DCDU 3573752639
stp x29,x30,[sp,#-48]!
add x29,sp,#0
stp x19,x20,[sp,#16]
stp x21,x22,[sp,#32]
ldp x4,x5,[x2]
ldp x6,x7,[x2,#16]
ldp x8,x9,[x2,#32]
add x2,x1,#48
bl __sub_mod_384 // a->re - a->im
ldp x16,x17,[x1]
ldp x19,x20,[x1,#16]
ldp x21,x22,[x1,#32]
stp x10,x11,[x0]
ldp x10,x11,[x1,#48]
stp x12,x13,[x0,#16]
ldp x12,x13,[x1,#64]
stp x14,x15,[x0,#32]
ldp x14,x15,[x1,#80]
bl __add_mod_384_ab_are_loaded // a->re + a->im
ldr x30,[sp,#8]
stp x10,x11,[x0,#48]
stp x12,x13,[x0,#64]
stp x14,x15,[x0,#80]
ldp x19,x20,[x29,#16]
ldp x21,x22,[x29,#32]
ldr x29,[sp],#48
DCDU 3573752767
ret
ENDP
EXPORT |sgn0_pty_mod_384|[FUNC]
ALIGN 32
|sgn0_pty_mod_384| PROC
ldp x10,x11,[x0]
ldp x12,x13,[x0,#16]
ldp x14,x15,[x0,#32]
ldp x4,x5,[x1]
ldp x6,x7,[x1,#16]
ldp x8,x9,[x1,#32]
and x0,x10,#1
adds x10,x10,x10
adcs x11,x11,x11
adcs x12,x12,x12
adcs x13,x13,x13
adcs x14,x14,x14
adcs x15,x15,x15
adc x3,xzr,xzr
subs x10,x10,x4
sbcs x11,x11,x5
sbcs x12,x12,x6
sbcs x13,x13,x7
sbcs x14,x14,x8
sbcs x15,x15,x9
sbc x3,x3,xzr
mvn x3,x3
and x3,x3,#2
orr x0,x0,x3
ret
ENDP
EXPORT |sgn0_pty_mod_384x|[FUNC]
ALIGN 32
|sgn0_pty_mod_384x| PROC
ldp x10,x11,[x0]
ldp x12,x13,[x0,#16]
ldp x14,x15,[x0,#32]
ldp x4,x5,[x1]
ldp x6,x7,[x1,#16]
ldp x8,x9,[x1,#32]
and x2,x10,#1
orr x3,x10,x11
adds x10,x10,x10
orr x3,x3,x12
adcs x11,x11,x11
orr x3,x3,x13
adcs x12,x12,x12
orr x3,x3,x14
adcs x13,x13,x13
orr x3,x3,x15
adcs x14,x14,x14
adcs x15,x15,x15
adc x16,xzr,xzr
subs x10,x10,x4
sbcs x11,x11,x5
sbcs x12,x12,x6
sbcs x13,x13,x7
sbcs x14,x14,x8
sbcs x15,x15,x9
sbc x16,x16,xzr
ldp x10,x11,[x0,#48]
ldp x12,x13,[x0,#64]
ldp x14,x15,[x0,#80]
mvn x16,x16
and x16,x16,#2
orr x2,x2,x16
and x0,x10,#1
orr x1,x10,x11
adds x10,x10,x10
orr x1,x1,x12
adcs x11,x11,x11
orr x1,x1,x13
adcs x12,x12,x12
orr x1,x1,x14
adcs x13,x13,x13
orr x1,x1,x15
adcs x14,x14,x14
adcs x15,x15,x15
adc x16,xzr,xzr
subs x10,x10,x4
sbcs x11,x11,x5
sbcs x12,x12,x6
sbcs x13,x13,x7
sbcs x14,x14,x8
sbcs x15,x15,x9
sbc x16,x16,xzr
mvn x16,x16
and x16,x16,#2
orr x0,x0,x16
cmp x3,#0
cseleq x3,x0,x2
cmp x1,#0
cselne x1,x0,x2
and x3,x3,#1
and x1,x1,#2
orr x0,x1,x3 // pack sign and parity
ret
ENDP
END
|
!cpu w65c02
*=$0801
!byte $0C,$08,$0A,$00,$9E,' ','2','0','6','4',$00,$00,$00
*=$0810
!src "vtuilib-acme.inc"
jmp main
Buffer !skip 10 ; Buffer for 10 characters
Str !pet "name:"
StrLen !byte 0
main:
ldx #(BLUE<<4)|WHITE ; Clear screen with blue background
lda #' ' ; and white foreground
jsr vtui_clr_scr
lda #10 ; Goto 10, 10
ldy #10
+VTUI_GOTOXY
lda #18
sta r1l ; Width of box
lda #3
sta r2l ; Height of box
lda #3 ; Border mode
ldx #(BLUE<<4)|WHITE ; Colorcode
+VTUI_BORDER
lda #11 ; Goto 11, 11
ldy #11
jsr vtui_gotoxy
lda #<Str ; Print Str
sta r0l
lda #>Str
sta r0h
ldx #(BLUE<<4)|WHITE ; Blue background, white foreground
ldy #StrLen-Str
lda #0 ; Convert from PETSCII
jsr vtui_print_str
ldy #10 ; Max length to get from user
lda #<Buffer ; Address of buffer to store string in
sta r0
lda #>Buffer
sta r0+1
ldx #(BLUE<<4)|WHITE ; Blue background, white foreground
+VTUI_INPUT_STR ; Get a string from user
sty StrLen ; Store actual length of string
lda #20 ; Goto 20, 20
ldy #20
+VTUI_GOTOXY
lda StrLen ; Caculate box width from string length
inc
inc
sta r1l ; Store the width
lda #3
sta r2l ; Height of the box
lda #5
ldx #(BLUE<<4)|WHITE
jsr vtui_border ; Draw a border
lda #21 ; Goto 21, 21 = inside the box
ldy #21
+VTUI_GOTOXY
lda #<Buffer ; Print the string in the buffer
sta r0l
lda #>Buffer
sta r0h
ldx #(BLUE<<4)|WHITE ; Blue background, white foreground
ldy StrLen
+VTUI_PRINT_STR
rts
|
// Copyright © 2017-2020 Khaos Wallet.
//
// This file is part of Trust. The full Trust copyright notice, including
// terms governing use, modification, and redistribution, is contained in the
// file LICENSE at the root of the source code distribution tree.
#include "Transaction.h"
#include "BinaryCoding.h"
#include "../HexCoding.h"
using namespace TW;
using namespace TW::Algorand;
Data Transaction::serialize() const {
/* Algorand transaction is encoded with msgpack
{
amt: 847,
fee: 488931,
fv: 51,
gen: 'mainnet-v1.0',
gh: <Buffer>
lv: 61,
note: <Buffer>
rcv: <Buffer>
snd: <Buffer>
type: 'pay',
}
*/
Data data;
// encode map length
uint8_t size = 9;
if (!note.empty()) {
// note is optional
size += 1;
}
data.push_back(0x80 + size);
// encode fields one by one (sorted by name)
encodeString("amt", data);
encodeNumber(amount, data);
encodeString("fee", data);
encodeNumber(fee, data);
encodeString("fv", data);
encodeNumber(firstRound, data);
encodeString("gen", data);
encodeString(genesisId, data);
encodeString("gh", data);
encodeBytes(genesisHash, data);
encodeString("lv", data);
encodeNumber(lastRound, data);
if (!note.empty()) {
encodeString("note", data);
encodeBytes(note, data);
}
encodeString("rcv", data);
encodeBytes(Data(to.bytes.begin(), to.bytes.end()), data);
encodeString("snd", data);
encodeBytes(Data(from.bytes.begin(), from.bytes.end()), data);
encodeString("type", data);
encodeString(type, data);
return data;
}
Data Transaction::serialize(Data& signature) const {
/* Algorand transaction and signature are encoded with msgpack:
{
"sig": <signature bytes>
"txn": <encoded transaction object>,
}
*/
Data data;
// encode map length
data.push_back(0x80 + 2);
// signature
encodeString("sig", data);
encodeBytes(signature, data);
// transaction
encodeString("txn", data);
append(data, serialize());
return data;
}
|
/**
* @file OStream.cpp
* @brief Implementations of wrapper classes for C++ standard output streams.
* @author Akiya Jouraku
*
* <!--------------------------------------------------------------------------
* This file is part of libSBML. Please visit http://sbml.org for more
* information about SBML, and the latest version of libSBML.
*
* Copyright (C) 2020 jointly by the following organizations:
* 1. California Institute of Technology, Pasadena, CA, USA
* 2. University of Heidelberg, Heidelberg, Germany
* 3. University College London, London, UK
*
* Copyright (C) 2019 jointly by the following organizations:
* 1. California Institute of Technology, Pasadena, CA, USA
* 2. University of Heidelberg, Heidelberg, Germany
*
* Copyright (C) 2013-2018 jointly by the following organizations:
* 1. California Institute of Technology, Pasadena, CA, USA
* 2. EMBL European Bioinformatics Institute (EMBL-EBI), Hinxton, UK
* 3. University of Heidelberg, Heidelberg, Germany
*
* Copyright (C) 2009-2013 jointly by the following organizations:
* 1. California Institute of Technology, Pasadena, CA, USA
* 2. EMBL European Bioinformatics Institute (EMBL-EBI), Hinxton, UK
*
* Copyright (C) 2006-2008 by the California Institute of Technology,
* Pasadena, CA, USA
*
* Copyright (C) 2002-2005 jointly by the following organizations:
* 1. California Institute of Technology, Pasadena, CA, USA
* 2. Japan Science and Technology Agency, Japan
*
* This library is free software; you can redistribute it and/or modify it
* under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation. A copy of the license agreement is provided
* in the file named "LICENSE.txt" included with this software distribution
* and also available online as http://sbml.org/software/libsbml/license.html
* ---------------------------------------------------------------------- -->*/
#include "OStream.h"
/**
* Creates a new OStream object with one of standard output stream objects.
*
* @param sot a value from the StdOSType enumeration indicating
* the type of stream to create.
*/
OStream::OStream (StdOSType sot)
{
switch (sot) {
case COUT:
Stream = &std::cout;
break;
case CERR:
Stream = &std::cerr;
break;
case CLOG:
Stream = &std::clog;
break;
default:
Stream = &std::cout;
}
}
/**
* Destructor.
*/
OStream::~OStream ()
{
}
/**
* Returns the stream object.
* <p>
* @return the stream object
*/
std::ostream*
OStream::get_ostream ()
{
return Stream;
}
/**
* Writes an end-of-line character on this tream.
*/
void
OStream::endl ()
{
std::endl(*Stream);
}
/**
* Creates a new OFStream object for a file.
* <p>
* This opens the given file @p filename with the @p is_append flag
* (default is <code>false</code>), and creates an OFStream object
* instance that associates the file's content with an OStream object.
* <p>
* @param filename the name of the file to open
* @param is_append whether to open the file for appending (default:
* <code>false</code>, meaning overwrite the content instead)
*/
OFStream::OFStream (const std::string& filename, bool is_append)
{
if (is_append) {
Stream = new std::ofstream(filename.c_str(),std::ios_base::app);
}
else {
Stream = new std::ofstream(filename.c_str(),std::ios_base::out);
}
}
/**
* Destructor.
*/
OFStream::~OFStream ()
{
delete Stream;
}
/**
* Opens a file and associates this stream object with it.
* <p>
* This method opens a given file @p filename with the given
* @p is_append flag (whose default value is <code>false</code>),
* and associates <i>this</i> stream object with the file's content.
* <p>
* @param filename the name of the file to open
* @param is_append whether to open the file for appending (default:
* <code>false</code>, meaning overwrite the content instead)
*/
void
OFStream::open (const std::string& filename, bool is_append)
{
if (is_append) {
static_cast<std::ofstream*>(Stream)->open(filename.c_str(),std::ios_base::app);
}
else {
static_cast<std::ofstream*>(Stream)->open(filename.c_str(),std::ios_base::out);
}
}
/**
* Closes the file currently associated with this stream object.
*/
void
OFStream::close ()
{
static_cast<std::ofstream*>(Stream)->close();
}
/**
* Returns <code>true</code> if this stream object is currently
* associated with a file.
* <p>
* @return <code>true</code> if the stream object is currently
* associated with a file, <code>false</code> otherwise
*/
bool
OFStream::is_open ()
{
return static_cast<std::ofstream*>(Stream)->is_open();
}
/**
* Creates a new OStringStream object
*/
OStringStream::OStringStream ()
{
Stream = new std::ostringstream();
}
/**
* Returns the copy of the string object currently assosiated
* with this <code>ostringstream</code> buffer.
* <p>
* @return a copy of the string object for this stream
*/
std::string
OStringStream::str ()
{
return static_cast<std::ostringstream*>(Stream)->str();
}
/**
* Sets string @p s to the string object currently assosiated with
* this stream buffer.
* <p>
* @param s the string to write to this stream
*/
void
OStringStream::str (const std::string& s)
{
static_cast<std::ostringstream*>(Stream)->str(s.c_str());
}
/**
* Destructor.
*/
OStringStream::~OStringStream ()
{
delete Stream;
}
|
_mkdir: file format elf32-i386
Disassembly of section .text:
00000000 <main>:
#include "stat.h"
#include "user.h"
int
main(int argc, char *argv[])
{
0: 8d 4c 24 04 lea 0x4(%esp),%ecx
4: 83 e4 f0 and $0xfffffff0,%esp
7: ff 71 fc pushl -0x4(%ecx)
a: 55 push %ebp
b: 89 e5 mov %esp,%ebp
d: 57 push %edi
e: 56 push %esi
f: 53 push %ebx
10: 51 push %ecx
11: bf 01 00 00 00 mov $0x1,%edi
16: 83 ec 08 sub $0x8,%esp
19: 8b 31 mov (%ecx),%esi
1b: 8b 59 04 mov 0x4(%ecx),%ebx
1e: 83 c3 04 add $0x4,%ebx
int i;
if(argc < 2){
21: 83 fe 01 cmp $0x1,%esi
24: 7e 3e jle 64 <main+0x64>
26: 8d 76 00 lea 0x0(%esi),%esi
29: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
printf(2, "Usage: mkdir files...\n");
exit();
}
for(i = 1; i < argc; i++){
if(mkdir(argv[i]) < 0){
30: 83 ec 0c sub $0xc,%esp
33: ff 33 pushl (%ebx)
35: e8 f0 02 00 00 call 32a <mkdir>
3a: 83 c4 10 add $0x10,%esp
3d: 85 c0 test %eax,%eax
3f: 78 0f js 50 <main+0x50>
if(argc < 2){
printf(2, "Usage: mkdir files...\n");
exit();
}
for(i = 1; i < argc; i++){
41: 83 c7 01 add $0x1,%edi
44: 83 c3 04 add $0x4,%ebx
47: 39 fe cmp %edi,%esi
49: 75 e5 jne 30 <main+0x30>
printf(2, "mkdir: %s failed to create\n", argv[i]);
break;
}
}
exit();
4b: e8 72 02 00 00 call 2c2 <exit>
exit();
}
for(i = 1; i < argc; i++){
if(mkdir(argv[i]) < 0){
printf(2, "mkdir: %s failed to create\n", argv[i]);
50: 50 push %eax
51: ff 33 pushl (%ebx)
53: 68 47 07 00 00 push $0x747
58: 6a 02 push $0x2
5a: e8 b1 03 00 00 call 410 <printf>
break;
5f: 83 c4 10 add $0x10,%esp
62: eb e7 jmp 4b <main+0x4b>
main(int argc, char *argv[])
{
int i;
if(argc < 2){
printf(2, "Usage: mkdir files...\n");
64: 52 push %edx
65: 52 push %edx
66: 68 30 07 00 00 push $0x730
6b: 6a 02 push $0x2
6d: e8 9e 03 00 00 call 410 <printf>
exit();
72: e8 4b 02 00 00 call 2c2 <exit>
77: 66 90 xchg %ax,%ax
79: 66 90 xchg %ax,%ax
7b: 66 90 xchg %ax,%ax
7d: 66 90 xchg %ax,%ax
7f: 90 nop
00000080 <strcpy>:
#include "user.h"
#include "x86.h"
char*
strcpy(char *s, const char *t)
{
80: 55 push %ebp
81: 89 e5 mov %esp,%ebp
83: 53 push %ebx
84: 8b 45 08 mov 0x8(%ebp),%eax
87: 8b 4d 0c mov 0xc(%ebp),%ecx
char *os;
os = s;
while((*s++ = *t++) != 0)
8a: 89 c2 mov %eax,%edx
8c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
90: 83 c1 01 add $0x1,%ecx
93: 0f b6 59 ff movzbl -0x1(%ecx),%ebx
97: 83 c2 01 add $0x1,%edx
9a: 84 db test %bl,%bl
9c: 88 5a ff mov %bl,-0x1(%edx)
9f: 75 ef jne 90 <strcpy+0x10>
;
return os;
}
a1: 5b pop %ebx
a2: 5d pop %ebp
a3: c3 ret
a4: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
aa: 8d bf 00 00 00 00 lea 0x0(%edi),%edi
000000b0 <strcmp>:
int
strcmp(const char *p, const char *q)
{
b0: 55 push %ebp
b1: 89 e5 mov %esp,%ebp
b3: 56 push %esi
b4: 53 push %ebx
b5: 8b 55 08 mov 0x8(%ebp),%edx
b8: 8b 4d 0c mov 0xc(%ebp),%ecx
while(*p && *p == *q)
bb: 0f b6 02 movzbl (%edx),%eax
be: 0f b6 19 movzbl (%ecx),%ebx
c1: 84 c0 test %al,%al
c3: 75 1e jne e3 <strcmp+0x33>
c5: eb 29 jmp f0 <strcmp+0x40>
c7: 89 f6 mov %esi,%esi
c9: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
p++, q++;
d0: 83 c2 01 add $0x1,%edx
}
int
strcmp(const char *p, const char *q)
{
while(*p && *p == *q)
d3: 0f b6 02 movzbl (%edx),%eax
p++, q++;
d6: 8d 71 01 lea 0x1(%ecx),%esi
}
int
strcmp(const char *p, const char *q)
{
while(*p && *p == *q)
d9: 0f b6 59 01 movzbl 0x1(%ecx),%ebx
dd: 84 c0 test %al,%al
df: 74 0f je f0 <strcmp+0x40>
e1: 89 f1 mov %esi,%ecx
e3: 38 d8 cmp %bl,%al
e5: 74 e9 je d0 <strcmp+0x20>
p++, q++;
return (uchar)*p - (uchar)*q;
e7: 29 d8 sub %ebx,%eax
}
e9: 5b pop %ebx
ea: 5e pop %esi
eb: 5d pop %ebp
ec: c3 ret
ed: 8d 76 00 lea 0x0(%esi),%esi
}
int
strcmp(const char *p, const char *q)
{
while(*p && *p == *q)
f0: 31 c0 xor %eax,%eax
p++, q++;
return (uchar)*p - (uchar)*q;
f2: 29 d8 sub %ebx,%eax
}
f4: 5b pop %ebx
f5: 5e pop %esi
f6: 5d pop %ebp
f7: c3 ret
f8: 90 nop
f9: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
00000100 <strlen>:
uint
strlen(const char *s)
{
100: 55 push %ebp
101: 89 e5 mov %esp,%ebp
103: 8b 4d 08 mov 0x8(%ebp),%ecx
int n;
for(n = 0; s[n]; n++)
106: 80 39 00 cmpb $0x0,(%ecx)
109: 74 12 je 11d <strlen+0x1d>
10b: 31 d2 xor %edx,%edx
10d: 8d 76 00 lea 0x0(%esi),%esi
110: 83 c2 01 add $0x1,%edx
113: 80 3c 11 00 cmpb $0x0,(%ecx,%edx,1)
117: 89 d0 mov %edx,%eax
119: 75 f5 jne 110 <strlen+0x10>
;
return n;
}
11b: 5d pop %ebp
11c: c3 ret
uint
strlen(const char *s)
{
int n;
for(n = 0; s[n]; n++)
11d: 31 c0 xor %eax,%eax
;
return n;
}
11f: 5d pop %ebp
120: c3 ret
121: eb 0d jmp 130 <memset>
123: 90 nop
124: 90 nop
125: 90 nop
126: 90 nop
127: 90 nop
128: 90 nop
129: 90 nop
12a: 90 nop
12b: 90 nop
12c: 90 nop
12d: 90 nop
12e: 90 nop
12f: 90 nop
00000130 <memset>:
void*
memset(void *dst, int c, uint n)
{
130: 55 push %ebp
131: 89 e5 mov %esp,%ebp
133: 57 push %edi
134: 8b 55 08 mov 0x8(%ebp),%edx
}
static inline void
stosb(void *addr, int data, int cnt)
{
asm volatile("cld; rep stosb" :
137: 8b 4d 10 mov 0x10(%ebp),%ecx
13a: 8b 45 0c mov 0xc(%ebp),%eax
13d: 89 d7 mov %edx,%edi
13f: fc cld
140: f3 aa rep stos %al,%es:(%edi)
stosb(dst, c, n);
return dst;
}
142: 89 d0 mov %edx,%eax
144: 5f pop %edi
145: 5d pop %ebp
146: c3 ret
147: 89 f6 mov %esi,%esi
149: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
00000150 <strchr>:
char*
strchr(const char *s, char c)
{
150: 55 push %ebp
151: 89 e5 mov %esp,%ebp
153: 53 push %ebx
154: 8b 45 08 mov 0x8(%ebp),%eax
157: 8b 5d 0c mov 0xc(%ebp),%ebx
for(; *s; s++)
15a: 0f b6 10 movzbl (%eax),%edx
15d: 84 d2 test %dl,%dl
15f: 74 1d je 17e <strchr+0x2e>
if(*s == c)
161: 38 d3 cmp %dl,%bl
163: 89 d9 mov %ebx,%ecx
165: 75 0d jne 174 <strchr+0x24>
167: eb 17 jmp 180 <strchr+0x30>
169: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
170: 38 ca cmp %cl,%dl
172: 74 0c je 180 <strchr+0x30>
}
char*
strchr(const char *s, char c)
{
for(; *s; s++)
174: 83 c0 01 add $0x1,%eax
177: 0f b6 10 movzbl (%eax),%edx
17a: 84 d2 test %dl,%dl
17c: 75 f2 jne 170 <strchr+0x20>
if(*s == c)
return (char*)s;
return 0;
17e: 31 c0 xor %eax,%eax
}
180: 5b pop %ebx
181: 5d pop %ebp
182: c3 ret
183: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
189: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
00000190 <gets>:
char*
gets(char *buf, int max)
{
190: 55 push %ebp
191: 89 e5 mov %esp,%ebp
193: 57 push %edi
194: 56 push %esi
195: 53 push %ebx
int i, cc;
char c;
for(i=0; i+1 < max; ){
196: 31 f6 xor %esi,%esi
cc = read(0, &c, 1);
198: 8d 7d e7 lea -0x19(%ebp),%edi
return 0;
}
char*
gets(char *buf, int max)
{
19b: 83 ec 1c sub $0x1c,%esp
int i, cc;
char c;
for(i=0; i+1 < max; ){
19e: eb 29 jmp 1c9 <gets+0x39>
cc = read(0, &c, 1);
1a0: 83 ec 04 sub $0x4,%esp
1a3: 6a 01 push $0x1
1a5: 57 push %edi
1a6: 6a 00 push $0x0
1a8: e8 2d 01 00 00 call 2da <read>
if(cc < 1)
1ad: 83 c4 10 add $0x10,%esp
1b0: 85 c0 test %eax,%eax
1b2: 7e 1d jle 1d1 <gets+0x41>
break;
buf[i++] = c;
1b4: 0f b6 45 e7 movzbl -0x19(%ebp),%eax
1b8: 8b 55 08 mov 0x8(%ebp),%edx
1bb: 89 de mov %ebx,%esi
if(c == '\n' || c == '\r')
1bd: 3c 0a cmp $0xa,%al
for(i=0; i+1 < max; ){
cc = read(0, &c, 1);
if(cc < 1)
break;
buf[i++] = c;
1bf: 88 44 1a ff mov %al,-0x1(%edx,%ebx,1)
if(c == '\n' || c == '\r')
1c3: 74 1b je 1e0 <gets+0x50>
1c5: 3c 0d cmp $0xd,%al
1c7: 74 17 je 1e0 <gets+0x50>
gets(char *buf, int max)
{
int i, cc;
char c;
for(i=0; i+1 < max; ){
1c9: 8d 5e 01 lea 0x1(%esi),%ebx
1cc: 3b 5d 0c cmp 0xc(%ebp),%ebx
1cf: 7c cf jl 1a0 <gets+0x10>
break;
buf[i++] = c;
if(c == '\n' || c == '\r')
break;
}
buf[i] = '\0';
1d1: 8b 45 08 mov 0x8(%ebp),%eax
1d4: c6 04 30 00 movb $0x0,(%eax,%esi,1)
return buf;
}
1d8: 8d 65 f4 lea -0xc(%ebp),%esp
1db: 5b pop %ebx
1dc: 5e pop %esi
1dd: 5f pop %edi
1de: 5d pop %ebp
1df: c3 ret
break;
buf[i++] = c;
if(c == '\n' || c == '\r')
break;
}
buf[i] = '\0';
1e0: 8b 45 08 mov 0x8(%ebp),%eax
gets(char *buf, int max)
{
int i, cc;
char c;
for(i=0; i+1 < max; ){
1e3: 89 de mov %ebx,%esi
break;
buf[i++] = c;
if(c == '\n' || c == '\r')
break;
}
buf[i] = '\0';
1e5: c6 04 30 00 movb $0x0,(%eax,%esi,1)
return buf;
}
1e9: 8d 65 f4 lea -0xc(%ebp),%esp
1ec: 5b pop %ebx
1ed: 5e pop %esi
1ee: 5f pop %edi
1ef: 5d pop %ebp
1f0: c3 ret
1f1: eb 0d jmp 200 <stat>
1f3: 90 nop
1f4: 90 nop
1f5: 90 nop
1f6: 90 nop
1f7: 90 nop
1f8: 90 nop
1f9: 90 nop
1fa: 90 nop
1fb: 90 nop
1fc: 90 nop
1fd: 90 nop
1fe: 90 nop
1ff: 90 nop
00000200 <stat>:
int
stat(const char *n, struct stat *st)
{
200: 55 push %ebp
201: 89 e5 mov %esp,%ebp
203: 56 push %esi
204: 53 push %ebx
int fd;
int r;
fd = open(n, O_RDONLY);
205: 83 ec 08 sub $0x8,%esp
208: 6a 00 push $0x0
20a: ff 75 08 pushl 0x8(%ebp)
20d: e8 f0 00 00 00 call 302 <open>
if(fd < 0)
212: 83 c4 10 add $0x10,%esp
215: 85 c0 test %eax,%eax
217: 78 27 js 240 <stat+0x40>
return -1;
r = fstat(fd, st);
219: 83 ec 08 sub $0x8,%esp
21c: ff 75 0c pushl 0xc(%ebp)
21f: 89 c3 mov %eax,%ebx
221: 50 push %eax
222: e8 f3 00 00 00 call 31a <fstat>
227: 89 c6 mov %eax,%esi
close(fd);
229: 89 1c 24 mov %ebx,(%esp)
22c: e8 b9 00 00 00 call 2ea <close>
return r;
231: 83 c4 10 add $0x10,%esp
234: 89 f0 mov %esi,%eax
}
236: 8d 65 f8 lea -0x8(%ebp),%esp
239: 5b pop %ebx
23a: 5e pop %esi
23b: 5d pop %ebp
23c: c3 ret
23d: 8d 76 00 lea 0x0(%esi),%esi
int fd;
int r;
fd = open(n, O_RDONLY);
if(fd < 0)
return -1;
240: b8 ff ff ff ff mov $0xffffffff,%eax
245: eb ef jmp 236 <stat+0x36>
247: 89 f6 mov %esi,%esi
249: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
00000250 <atoi>:
return r;
}
int
atoi(const char *s)
{
250: 55 push %ebp
251: 89 e5 mov %esp,%ebp
253: 53 push %ebx
254: 8b 4d 08 mov 0x8(%ebp),%ecx
int n;
n = 0;
while('0' <= *s && *s <= '9')
257: 0f be 11 movsbl (%ecx),%edx
25a: 8d 42 d0 lea -0x30(%edx),%eax
25d: 3c 09 cmp $0x9,%al
25f: b8 00 00 00 00 mov $0x0,%eax
264: 77 1f ja 285 <atoi+0x35>
266: 8d 76 00 lea 0x0(%esi),%esi
269: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
n = n*10 + *s++ - '0';
270: 8d 04 80 lea (%eax,%eax,4),%eax
273: 83 c1 01 add $0x1,%ecx
276: 8d 44 42 d0 lea -0x30(%edx,%eax,2),%eax
atoi(const char *s)
{
int n;
n = 0;
while('0' <= *s && *s <= '9')
27a: 0f be 11 movsbl (%ecx),%edx
27d: 8d 5a d0 lea -0x30(%edx),%ebx
280: 80 fb 09 cmp $0x9,%bl
283: 76 eb jbe 270 <atoi+0x20>
n = n*10 + *s++ - '0';
return n;
}
285: 5b pop %ebx
286: 5d pop %ebp
287: c3 ret
288: 90 nop
289: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
00000290 <memmove>:
void*
memmove(void *vdst, const void *vsrc, int n)
{
290: 55 push %ebp
291: 89 e5 mov %esp,%ebp
293: 56 push %esi
294: 53 push %ebx
295: 8b 5d 10 mov 0x10(%ebp),%ebx
298: 8b 45 08 mov 0x8(%ebp),%eax
29b: 8b 75 0c mov 0xc(%ebp),%esi
char *dst;
const char *src;
dst = vdst;
src = vsrc;
while(n-- > 0)
29e: 85 db test %ebx,%ebx
2a0: 7e 14 jle 2b6 <memmove+0x26>
2a2: 31 d2 xor %edx,%edx
2a4: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
*dst++ = *src++;
2a8: 0f b6 0c 16 movzbl (%esi,%edx,1),%ecx
2ac: 88 0c 10 mov %cl,(%eax,%edx,1)
2af: 83 c2 01 add $0x1,%edx
char *dst;
const char *src;
dst = vdst;
src = vsrc;
while(n-- > 0)
2b2: 39 da cmp %ebx,%edx
2b4: 75 f2 jne 2a8 <memmove+0x18>
*dst++ = *src++;
return vdst;
}
2b6: 5b pop %ebx
2b7: 5e pop %esi
2b8: 5d pop %ebp
2b9: c3 ret
000002ba <fork>:
name: \
movl $SYS_ ## name, %eax; \
int $T_SYSCALL; \
ret
SYSCALL(fork)
2ba: b8 01 00 00 00 mov $0x1,%eax
2bf: cd 40 int $0x40
2c1: c3 ret
000002c2 <exit>:
SYSCALL(exit)
2c2: b8 02 00 00 00 mov $0x2,%eax
2c7: cd 40 int $0x40
2c9: c3 ret
000002ca <wait>:
SYSCALL(wait)
2ca: b8 03 00 00 00 mov $0x3,%eax
2cf: cd 40 int $0x40
2d1: c3 ret
000002d2 <pipe>:
SYSCALL(pipe)
2d2: b8 04 00 00 00 mov $0x4,%eax
2d7: cd 40 int $0x40
2d9: c3 ret
000002da <read>:
SYSCALL(read)
2da: b8 05 00 00 00 mov $0x5,%eax
2df: cd 40 int $0x40
2e1: c3 ret
000002e2 <write>:
SYSCALL(write)
2e2: b8 10 00 00 00 mov $0x10,%eax
2e7: cd 40 int $0x40
2e9: c3 ret
000002ea <close>:
SYSCALL(close)
2ea: b8 15 00 00 00 mov $0x15,%eax
2ef: cd 40 int $0x40
2f1: c3 ret
000002f2 <kill>:
SYSCALL(kill)
2f2: b8 06 00 00 00 mov $0x6,%eax
2f7: cd 40 int $0x40
2f9: c3 ret
000002fa <exec>:
SYSCALL(exec)
2fa: b8 07 00 00 00 mov $0x7,%eax
2ff: cd 40 int $0x40
301: c3 ret
00000302 <open>:
SYSCALL(open)
302: b8 0f 00 00 00 mov $0xf,%eax
307: cd 40 int $0x40
309: c3 ret
0000030a <mknod>:
SYSCALL(mknod)
30a: b8 11 00 00 00 mov $0x11,%eax
30f: cd 40 int $0x40
311: c3 ret
00000312 <unlink>:
SYSCALL(unlink)
312: b8 12 00 00 00 mov $0x12,%eax
317: cd 40 int $0x40
319: c3 ret
0000031a <fstat>:
SYSCALL(fstat)
31a: b8 08 00 00 00 mov $0x8,%eax
31f: cd 40 int $0x40
321: c3 ret
00000322 <link>:
SYSCALL(link)
322: b8 13 00 00 00 mov $0x13,%eax
327: cd 40 int $0x40
329: c3 ret
0000032a <mkdir>:
SYSCALL(mkdir)
32a: b8 14 00 00 00 mov $0x14,%eax
32f: cd 40 int $0x40
331: c3 ret
00000332 <chdir>:
SYSCALL(chdir)
332: b8 09 00 00 00 mov $0x9,%eax
337: cd 40 int $0x40
339: c3 ret
0000033a <dup>:
SYSCALL(dup)
33a: b8 0a 00 00 00 mov $0xa,%eax
33f: cd 40 int $0x40
341: c3 ret
00000342 <getpid>:
SYSCALL(getpid)
342: b8 0b 00 00 00 mov $0xb,%eax
347: cd 40 int $0x40
349: c3 ret
0000034a <sbrk>:
SYSCALL(sbrk)
34a: b8 0c 00 00 00 mov $0xc,%eax
34f: cd 40 int $0x40
351: c3 ret
00000352 <sleep>:
SYSCALL(sleep)
352: b8 0d 00 00 00 mov $0xd,%eax
357: cd 40 int $0x40
359: c3 ret
0000035a <uptime>:
SYSCALL(uptime)
35a: b8 0e 00 00 00 mov $0xe,%eax
35f: cd 40 int $0x40
361: c3 ret
00000362 <getreadcount>:
SYSCALL(getreadcount)
362: b8 16 00 00 00 mov $0x16,%eax
367: cd 40 int $0x40
369: c3 ret
36a: 66 90 xchg %ax,%ax
36c: 66 90 xchg %ax,%ax
36e: 66 90 xchg %ax,%ax
00000370 <printint>:
write(fd, &c, 1);
}
static void
printint(int fd, int xx, int base, int sgn)
{
370: 55 push %ebp
371: 89 e5 mov %esp,%ebp
373: 57 push %edi
374: 56 push %esi
375: 53 push %ebx
376: 89 c6 mov %eax,%esi
378: 83 ec 3c sub $0x3c,%esp
char buf[16];
int i, neg;
uint x;
neg = 0;
if(sgn && xx < 0){
37b: 8b 5d 08 mov 0x8(%ebp),%ebx
37e: 85 db test %ebx,%ebx
380: 74 7e je 400 <printint+0x90>
382: 89 d0 mov %edx,%eax
384: c1 e8 1f shr $0x1f,%eax
387: 84 c0 test %al,%al
389: 74 75 je 400 <printint+0x90>
neg = 1;
x = -xx;
38b: 89 d0 mov %edx,%eax
int i, neg;
uint x;
neg = 0;
if(sgn && xx < 0){
neg = 1;
38d: c7 45 c4 01 00 00 00 movl $0x1,-0x3c(%ebp)
x = -xx;
394: f7 d8 neg %eax
396: 89 75 c0 mov %esi,-0x40(%ebp)
} else {
x = xx;
}
i = 0;
399: 31 ff xor %edi,%edi
39b: 8d 5d d7 lea -0x29(%ebp),%ebx
39e: 89 ce mov %ecx,%esi
3a0: eb 08 jmp 3aa <printint+0x3a>
3a2: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
do{
buf[i++] = digits[x % base];
3a8: 89 cf mov %ecx,%edi
3aa: 31 d2 xor %edx,%edx
3ac: 8d 4f 01 lea 0x1(%edi),%ecx
3af: f7 f6 div %esi
3b1: 0f b6 92 6c 07 00 00 movzbl 0x76c(%edx),%edx
}while((x /= base) != 0);
3b8: 85 c0 test %eax,%eax
x = xx;
}
i = 0;
do{
buf[i++] = digits[x % base];
3ba: 88 14 0b mov %dl,(%ebx,%ecx,1)
}while((x /= base) != 0);
3bd: 75 e9 jne 3a8 <printint+0x38>
if(neg)
3bf: 8b 45 c4 mov -0x3c(%ebp),%eax
3c2: 8b 75 c0 mov -0x40(%ebp),%esi
3c5: 85 c0 test %eax,%eax
3c7: 74 08 je 3d1 <printint+0x61>
buf[i++] = '-';
3c9: c6 44 0d d8 2d movb $0x2d,-0x28(%ebp,%ecx,1)
3ce: 8d 4f 02 lea 0x2(%edi),%ecx
3d1: 8d 7c 0d d7 lea -0x29(%ebp,%ecx,1),%edi
3d5: 8d 76 00 lea 0x0(%esi),%esi
3d8: 0f b6 07 movzbl (%edi),%eax
#include "user.h"
static void
putc(int fd, char c)
{
write(fd, &c, 1);
3db: 83 ec 04 sub $0x4,%esp
3de: 83 ef 01 sub $0x1,%edi
3e1: 6a 01 push $0x1
3e3: 53 push %ebx
3e4: 56 push %esi
3e5: 88 45 d7 mov %al,-0x29(%ebp)
3e8: e8 f5 fe ff ff call 2e2 <write>
buf[i++] = digits[x % base];
}while((x /= base) != 0);
if(neg)
buf[i++] = '-';
while(--i >= 0)
3ed: 83 c4 10 add $0x10,%esp
3f0: 39 df cmp %ebx,%edi
3f2: 75 e4 jne 3d8 <printint+0x68>
putc(fd, buf[i]);
}
3f4: 8d 65 f4 lea -0xc(%ebp),%esp
3f7: 5b pop %ebx
3f8: 5e pop %esi
3f9: 5f pop %edi
3fa: 5d pop %ebp
3fb: c3 ret
3fc: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
neg = 0;
if(sgn && xx < 0){
neg = 1;
x = -xx;
} else {
x = xx;
400: 89 d0 mov %edx,%eax
static char digits[] = "0123456789ABCDEF";
char buf[16];
int i, neg;
uint x;
neg = 0;
402: c7 45 c4 00 00 00 00 movl $0x0,-0x3c(%ebp)
409: eb 8b jmp 396 <printint+0x26>
40b: 90 nop
40c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
00000410 <printf>:
}
// Print to the given fd. Only understands %d, %x, %p, %s.
void
printf(int fd, const char *fmt, ...)
{
410: 55 push %ebp
411: 89 e5 mov %esp,%ebp
413: 57 push %edi
414: 56 push %esi
415: 53 push %ebx
int c, i, state;
uint *ap;
state = 0;
ap = (uint*)(void*)&fmt + 1;
for(i = 0; fmt[i]; i++){
416: 8d 45 10 lea 0x10(%ebp),%eax
}
// Print to the given fd. Only understands %d, %x, %p, %s.
void
printf(int fd, const char *fmt, ...)
{
419: 83 ec 2c sub $0x2c,%esp
int c, i, state;
uint *ap;
state = 0;
ap = (uint*)(void*)&fmt + 1;
for(i = 0; fmt[i]; i++){
41c: 8b 75 0c mov 0xc(%ebp),%esi
}
// Print to the given fd. Only understands %d, %x, %p, %s.
void
printf(int fd, const char *fmt, ...)
{
41f: 8b 7d 08 mov 0x8(%ebp),%edi
int c, i, state;
uint *ap;
state = 0;
ap = (uint*)(void*)&fmt + 1;
for(i = 0; fmt[i]; i++){
422: 89 45 d0 mov %eax,-0x30(%ebp)
425: 0f b6 1e movzbl (%esi),%ebx
428: 83 c6 01 add $0x1,%esi
42b: 84 db test %bl,%bl
42d: 0f 84 b0 00 00 00 je 4e3 <printf+0xd3>
433: 31 d2 xor %edx,%edx
435: eb 39 jmp 470 <printf+0x60>
437: 89 f6 mov %esi,%esi
439: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
c = fmt[i] & 0xff;
if(state == 0){
if(c == '%'){
440: 83 f8 25 cmp $0x25,%eax
443: 89 55 d4 mov %edx,-0x2c(%ebp)
state = '%';
446: ba 25 00 00 00 mov $0x25,%edx
state = 0;
ap = (uint*)(void*)&fmt + 1;
for(i = 0; fmt[i]; i++){
c = fmt[i] & 0xff;
if(state == 0){
if(c == '%'){
44b: 74 18 je 465 <printf+0x55>
#include "user.h"
static void
putc(int fd, char c)
{
write(fd, &c, 1);
44d: 8d 45 e2 lea -0x1e(%ebp),%eax
450: 83 ec 04 sub $0x4,%esp
453: 88 5d e2 mov %bl,-0x1e(%ebp)
456: 6a 01 push $0x1
458: 50 push %eax
459: 57 push %edi
45a: e8 83 fe ff ff call 2e2 <write>
45f: 8b 55 d4 mov -0x2c(%ebp),%edx
462: 83 c4 10 add $0x10,%esp
465: 83 c6 01 add $0x1,%esi
int c, i, state;
uint *ap;
state = 0;
ap = (uint*)(void*)&fmt + 1;
for(i = 0; fmt[i]; i++){
468: 0f b6 5e ff movzbl -0x1(%esi),%ebx
46c: 84 db test %bl,%bl
46e: 74 73 je 4e3 <printf+0xd3>
c = fmt[i] & 0xff;
if(state == 0){
470: 85 d2 test %edx,%edx
uint *ap;
state = 0;
ap = (uint*)(void*)&fmt + 1;
for(i = 0; fmt[i]; i++){
c = fmt[i] & 0xff;
472: 0f be cb movsbl %bl,%ecx
475: 0f b6 c3 movzbl %bl,%eax
if(state == 0){
478: 74 c6 je 440 <printf+0x30>
if(c == '%'){
state = '%';
} else {
putc(fd, c);
}
} else if(state == '%'){
47a: 83 fa 25 cmp $0x25,%edx
47d: 75 e6 jne 465 <printf+0x55>
if(c == 'd'){
47f: 83 f8 64 cmp $0x64,%eax
482: 0f 84 f8 00 00 00 je 580 <printf+0x170>
printint(fd, *ap, 10, 1);
ap++;
} else if(c == 'x' || c == 'p'){
488: 81 e1 f7 00 00 00 and $0xf7,%ecx
48e: 83 f9 70 cmp $0x70,%ecx
491: 74 5d je 4f0 <printf+0xe0>
printint(fd, *ap, 16, 0);
ap++;
} else if(c == 's'){
493: 83 f8 73 cmp $0x73,%eax
496: 0f 84 84 00 00 00 je 520 <printf+0x110>
s = "(null)";
while(*s != 0){
putc(fd, *s);
s++;
}
} else if(c == 'c'){
49c: 83 f8 63 cmp $0x63,%eax
49f: 0f 84 ea 00 00 00 je 58f <printf+0x17f>
putc(fd, *ap);
ap++;
} else if(c == '%'){
4a5: 83 f8 25 cmp $0x25,%eax
4a8: 0f 84 c2 00 00 00 je 570 <printf+0x160>
#include "user.h"
static void
putc(int fd, char c)
{
write(fd, &c, 1);
4ae: 8d 45 e7 lea -0x19(%ebp),%eax
4b1: 83 ec 04 sub $0x4,%esp
4b4: c6 45 e7 25 movb $0x25,-0x19(%ebp)
4b8: 6a 01 push $0x1
4ba: 50 push %eax
4bb: 57 push %edi
4bc: e8 21 fe ff ff call 2e2 <write>
4c1: 83 c4 0c add $0xc,%esp
4c4: 8d 45 e6 lea -0x1a(%ebp),%eax
4c7: 88 5d e6 mov %bl,-0x1a(%ebp)
4ca: 6a 01 push $0x1
4cc: 50 push %eax
4cd: 57 push %edi
4ce: 83 c6 01 add $0x1,%esi
4d1: e8 0c fe ff ff call 2e2 <write>
int c, i, state;
uint *ap;
state = 0;
ap = (uint*)(void*)&fmt + 1;
for(i = 0; fmt[i]; i++){
4d6: 0f b6 5e ff movzbl -0x1(%esi),%ebx
#include "user.h"
static void
putc(int fd, char c)
{
write(fd, &c, 1);
4da: 83 c4 10 add $0x10,%esp
} else {
// Unknown % sequence. Print it to draw attention.
putc(fd, '%');
putc(fd, c);
}
state = 0;
4dd: 31 d2 xor %edx,%edx
int c, i, state;
uint *ap;
state = 0;
ap = (uint*)(void*)&fmt + 1;
for(i = 0; fmt[i]; i++){
4df: 84 db test %bl,%bl
4e1: 75 8d jne 470 <printf+0x60>
putc(fd, c);
}
state = 0;
}
}
}
4e3: 8d 65 f4 lea -0xc(%ebp),%esp
4e6: 5b pop %ebx
4e7: 5e pop %esi
4e8: 5f pop %edi
4e9: 5d pop %ebp
4ea: c3 ret
4eb: 90 nop
4ec: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
} else if(state == '%'){
if(c == 'd'){
printint(fd, *ap, 10, 1);
ap++;
} else if(c == 'x' || c == 'p'){
printint(fd, *ap, 16, 0);
4f0: 83 ec 0c sub $0xc,%esp
4f3: b9 10 00 00 00 mov $0x10,%ecx
4f8: 6a 00 push $0x0
4fa: 8b 5d d0 mov -0x30(%ebp),%ebx
4fd: 89 f8 mov %edi,%eax
4ff: 8b 13 mov (%ebx),%edx
501: e8 6a fe ff ff call 370 <printint>
ap++;
506: 89 d8 mov %ebx,%eax
508: 83 c4 10 add $0x10,%esp
} else {
// Unknown % sequence. Print it to draw attention.
putc(fd, '%');
putc(fd, c);
}
state = 0;
50b: 31 d2 xor %edx,%edx
if(c == 'd'){
printint(fd, *ap, 10, 1);
ap++;
} else if(c == 'x' || c == 'p'){
printint(fd, *ap, 16, 0);
ap++;
50d: 83 c0 04 add $0x4,%eax
510: 89 45 d0 mov %eax,-0x30(%ebp)
513: e9 4d ff ff ff jmp 465 <printf+0x55>
518: 90 nop
519: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
} else if(c == 's'){
s = (char*)*ap;
520: 8b 45 d0 mov -0x30(%ebp),%eax
523: 8b 18 mov (%eax),%ebx
ap++;
525: 83 c0 04 add $0x4,%eax
528: 89 45 d0 mov %eax,-0x30(%ebp)
if(s == 0)
s = "(null)";
52b: b8 63 07 00 00 mov $0x763,%eax
530: 85 db test %ebx,%ebx
532: 0f 44 d8 cmove %eax,%ebx
while(*s != 0){
535: 0f b6 03 movzbl (%ebx),%eax
538: 84 c0 test %al,%al
53a: 74 23 je 55f <printf+0x14f>
53c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
540: 88 45 e3 mov %al,-0x1d(%ebp)
#include "user.h"
static void
putc(int fd, char c)
{
write(fd, &c, 1);
543: 8d 45 e3 lea -0x1d(%ebp),%eax
546: 83 ec 04 sub $0x4,%esp
549: 6a 01 push $0x1
ap++;
if(s == 0)
s = "(null)";
while(*s != 0){
putc(fd, *s);
s++;
54b: 83 c3 01 add $0x1,%ebx
#include "user.h"
static void
putc(int fd, char c)
{
write(fd, &c, 1);
54e: 50 push %eax
54f: 57 push %edi
550: e8 8d fd ff ff call 2e2 <write>
} else if(c == 's'){
s = (char*)*ap;
ap++;
if(s == 0)
s = "(null)";
while(*s != 0){
555: 0f b6 03 movzbl (%ebx),%eax
558: 83 c4 10 add $0x10,%esp
55b: 84 c0 test %al,%al
55d: 75 e1 jne 540 <printf+0x130>
} else {
// Unknown % sequence. Print it to draw attention.
putc(fd, '%');
putc(fd, c);
}
state = 0;
55f: 31 d2 xor %edx,%edx
561: e9 ff fe ff ff jmp 465 <printf+0x55>
566: 8d 76 00 lea 0x0(%esi),%esi
569: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
#include "user.h"
static void
putc(int fd, char c)
{
write(fd, &c, 1);
570: 83 ec 04 sub $0x4,%esp
573: 88 5d e5 mov %bl,-0x1b(%ebp)
576: 8d 45 e5 lea -0x1b(%ebp),%eax
579: 6a 01 push $0x1
57b: e9 4c ff ff ff jmp 4cc <printf+0xbc>
} else {
putc(fd, c);
}
} else if(state == '%'){
if(c == 'd'){
printint(fd, *ap, 10, 1);
580: 83 ec 0c sub $0xc,%esp
583: b9 0a 00 00 00 mov $0xa,%ecx
588: 6a 01 push $0x1
58a: e9 6b ff ff ff jmp 4fa <printf+0xea>
58f: 8b 5d d0 mov -0x30(%ebp),%ebx
#include "user.h"
static void
putc(int fd, char c)
{
write(fd, &c, 1);
592: 83 ec 04 sub $0x4,%esp
595: 8b 03 mov (%ebx),%eax
597: 6a 01 push $0x1
599: 88 45 e4 mov %al,-0x1c(%ebp)
59c: 8d 45 e4 lea -0x1c(%ebp),%eax
59f: 50 push %eax
5a0: 57 push %edi
5a1: e8 3c fd ff ff call 2e2 <write>
5a6: e9 5b ff ff ff jmp 506 <printf+0xf6>
5ab: 66 90 xchg %ax,%ax
5ad: 66 90 xchg %ax,%ax
5af: 90 nop
000005b0 <free>:
static Header base;
static Header *freep;
void
free(void *ap)
{
5b0: 55 push %ebp
Header *bp, *p;
bp = (Header*)ap - 1;
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
5b1: a1 10 0a 00 00 mov 0xa10,%eax
static Header base;
static Header *freep;
void
free(void *ap)
{
5b6: 89 e5 mov %esp,%ebp
5b8: 57 push %edi
5b9: 56 push %esi
5ba: 53 push %ebx
5bb: 8b 5d 08 mov 0x8(%ebp),%ebx
Header *bp, *p;
bp = (Header*)ap - 1;
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
5be: 8b 10 mov (%eax),%edx
void
free(void *ap)
{
Header *bp, *p;
bp = (Header*)ap - 1;
5c0: 8d 4b f8 lea -0x8(%ebx),%ecx
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
5c3: 39 c8 cmp %ecx,%eax
5c5: 73 19 jae 5e0 <free+0x30>
5c7: 89 f6 mov %esi,%esi
5c9: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
5d0: 39 d1 cmp %edx,%ecx
5d2: 72 1c jb 5f0 <free+0x40>
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
5d4: 39 d0 cmp %edx,%eax
5d6: 73 18 jae 5f0 <free+0x40>
static Header base;
static Header *freep;
void
free(void *ap)
{
5d8: 89 d0 mov %edx,%eax
Header *bp, *p;
bp = (Header*)ap - 1;
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
5da: 39 c8 cmp %ecx,%eax
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
5dc: 8b 10 mov (%eax),%edx
free(void *ap)
{
Header *bp, *p;
bp = (Header*)ap - 1;
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
5de: 72 f0 jb 5d0 <free+0x20>
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
5e0: 39 d0 cmp %edx,%eax
5e2: 72 f4 jb 5d8 <free+0x28>
5e4: 39 d1 cmp %edx,%ecx
5e6: 73 f0 jae 5d8 <free+0x28>
5e8: 90 nop
5e9: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
break;
if(bp + bp->s.size == p->s.ptr){
5f0: 8b 73 fc mov -0x4(%ebx),%esi
5f3: 8d 3c f1 lea (%ecx,%esi,8),%edi
5f6: 39 d7 cmp %edx,%edi
5f8: 74 19 je 613 <free+0x63>
bp->s.size += p->s.ptr->s.size;
bp->s.ptr = p->s.ptr->s.ptr;
} else
bp->s.ptr = p->s.ptr;
5fa: 89 53 f8 mov %edx,-0x8(%ebx)
if(p + p->s.size == bp){
5fd: 8b 50 04 mov 0x4(%eax),%edx
600: 8d 34 d0 lea (%eax,%edx,8),%esi
603: 39 f1 cmp %esi,%ecx
605: 74 23 je 62a <free+0x7a>
p->s.size += bp->s.size;
p->s.ptr = bp->s.ptr;
} else
p->s.ptr = bp;
607: 89 08 mov %ecx,(%eax)
freep = p;
609: a3 10 0a 00 00 mov %eax,0xa10
}
60e: 5b pop %ebx
60f: 5e pop %esi
610: 5f pop %edi
611: 5d pop %ebp
612: c3 ret
bp = (Header*)ap - 1;
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
break;
if(bp + bp->s.size == p->s.ptr){
bp->s.size += p->s.ptr->s.size;
613: 03 72 04 add 0x4(%edx),%esi
616: 89 73 fc mov %esi,-0x4(%ebx)
bp->s.ptr = p->s.ptr->s.ptr;
619: 8b 10 mov (%eax),%edx
61b: 8b 12 mov (%edx),%edx
61d: 89 53 f8 mov %edx,-0x8(%ebx)
} else
bp->s.ptr = p->s.ptr;
if(p + p->s.size == bp){
620: 8b 50 04 mov 0x4(%eax),%edx
623: 8d 34 d0 lea (%eax,%edx,8),%esi
626: 39 f1 cmp %esi,%ecx
628: 75 dd jne 607 <free+0x57>
p->s.size += bp->s.size;
62a: 03 53 fc add -0x4(%ebx),%edx
p->s.ptr = bp->s.ptr;
} else
p->s.ptr = bp;
freep = p;
62d: a3 10 0a 00 00 mov %eax,0xa10
bp->s.size += p->s.ptr->s.size;
bp->s.ptr = p->s.ptr->s.ptr;
} else
bp->s.ptr = p->s.ptr;
if(p + p->s.size == bp){
p->s.size += bp->s.size;
632: 89 50 04 mov %edx,0x4(%eax)
p->s.ptr = bp->s.ptr;
635: 8b 53 f8 mov -0x8(%ebx),%edx
638: 89 10 mov %edx,(%eax)
} else
p->s.ptr = bp;
freep = p;
}
63a: 5b pop %ebx
63b: 5e pop %esi
63c: 5f pop %edi
63d: 5d pop %ebp
63e: c3 ret
63f: 90 nop
00000640 <malloc>:
return freep;
}
void*
malloc(uint nbytes)
{
640: 55 push %ebp
641: 89 e5 mov %esp,%ebp
643: 57 push %edi
644: 56 push %esi
645: 53 push %ebx
646: 83 ec 0c sub $0xc,%esp
Header *p, *prevp;
uint nunits;
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
649: 8b 45 08 mov 0x8(%ebp),%eax
if((prevp = freep) == 0){
64c: 8b 15 10 0a 00 00 mov 0xa10,%edx
malloc(uint nbytes)
{
Header *p, *prevp;
uint nunits;
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
652: 8d 78 07 lea 0x7(%eax),%edi
655: c1 ef 03 shr $0x3,%edi
658: 83 c7 01 add $0x1,%edi
if((prevp = freep) == 0){
65b: 85 d2 test %edx,%edx
65d: 0f 84 a3 00 00 00 je 706 <malloc+0xc6>
663: 8b 02 mov (%edx),%eax
665: 8b 48 04 mov 0x4(%eax),%ecx
base.s.ptr = freep = prevp = &base;
base.s.size = 0;
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
if(p->s.size >= nunits){
668: 39 cf cmp %ecx,%edi
66a: 76 74 jbe 6e0 <malloc+0xa0>
66c: 81 ff 00 10 00 00 cmp $0x1000,%edi
672: be 00 10 00 00 mov $0x1000,%esi
677: 8d 1c fd 00 00 00 00 lea 0x0(,%edi,8),%ebx
67e: 0f 43 f7 cmovae %edi,%esi
681: ba 00 80 00 00 mov $0x8000,%edx
686: 81 ff ff 0f 00 00 cmp $0xfff,%edi
68c: 0f 46 da cmovbe %edx,%ebx
68f: eb 10 jmp 6a1 <malloc+0x61>
691: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
if((prevp = freep) == 0){
base.s.ptr = freep = prevp = &base;
base.s.size = 0;
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
698: 8b 02 mov (%edx),%eax
if(p->s.size >= nunits){
69a: 8b 48 04 mov 0x4(%eax),%ecx
69d: 39 cf cmp %ecx,%edi
69f: 76 3f jbe 6e0 <malloc+0xa0>
p->s.size = nunits;
}
freep = prevp;
return (void*)(p + 1);
}
if(p == freep)
6a1: 39 05 10 0a 00 00 cmp %eax,0xa10
6a7: 89 c2 mov %eax,%edx
6a9: 75 ed jne 698 <malloc+0x58>
char *p;
Header *hp;
if(nu < 4096)
nu = 4096;
p = sbrk(nu * sizeof(Header));
6ab: 83 ec 0c sub $0xc,%esp
6ae: 53 push %ebx
6af: e8 96 fc ff ff call 34a <sbrk>
if(p == (char*)-1)
6b4: 83 c4 10 add $0x10,%esp
6b7: 83 f8 ff cmp $0xffffffff,%eax
6ba: 74 1c je 6d8 <malloc+0x98>
return 0;
hp = (Header*)p;
hp->s.size = nu;
6bc: 89 70 04 mov %esi,0x4(%eax)
free((void*)(hp + 1));
6bf: 83 ec 0c sub $0xc,%esp
6c2: 83 c0 08 add $0x8,%eax
6c5: 50 push %eax
6c6: e8 e5 fe ff ff call 5b0 <free>
return freep;
6cb: 8b 15 10 0a 00 00 mov 0xa10,%edx
}
freep = prevp;
return (void*)(p + 1);
}
if(p == freep)
if((p = morecore(nunits)) == 0)
6d1: 83 c4 10 add $0x10,%esp
6d4: 85 d2 test %edx,%edx
6d6: 75 c0 jne 698 <malloc+0x58>
return 0;
6d8: 31 c0 xor %eax,%eax
6da: eb 1c jmp 6f8 <malloc+0xb8>
6dc: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
base.s.ptr = freep = prevp = &base;
base.s.size = 0;
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
if(p->s.size >= nunits){
if(p->s.size == nunits)
6e0: 39 cf cmp %ecx,%edi
6e2: 74 1c je 700 <malloc+0xc0>
prevp->s.ptr = p->s.ptr;
else {
p->s.size -= nunits;
6e4: 29 f9 sub %edi,%ecx
6e6: 89 48 04 mov %ecx,0x4(%eax)
p += p->s.size;
6e9: 8d 04 c8 lea (%eax,%ecx,8),%eax
p->s.size = nunits;
6ec: 89 78 04 mov %edi,0x4(%eax)
}
freep = prevp;
6ef: 89 15 10 0a 00 00 mov %edx,0xa10
return (void*)(p + 1);
6f5: 83 c0 08 add $0x8,%eax
}
if(p == freep)
if((p = morecore(nunits)) == 0)
return 0;
}
}
6f8: 8d 65 f4 lea -0xc(%ebp),%esp
6fb: 5b pop %ebx
6fc: 5e pop %esi
6fd: 5f pop %edi
6fe: 5d pop %ebp
6ff: c3 ret
base.s.size = 0;
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
if(p->s.size >= nunits){
if(p->s.size == nunits)
prevp->s.ptr = p->s.ptr;
700: 8b 08 mov (%eax),%ecx
702: 89 0a mov %ecx,(%edx)
704: eb e9 jmp 6ef <malloc+0xaf>
Header *p, *prevp;
uint nunits;
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
if((prevp = freep) == 0){
base.s.ptr = freep = prevp = &base;
706: c7 05 10 0a 00 00 14 movl $0xa14,0xa10
70d: 0a 00 00
710: c7 05 14 0a 00 00 14 movl $0xa14,0xa14
717: 0a 00 00
base.s.size = 0;
71a: b8 14 0a 00 00 mov $0xa14,%eax
71f: c7 05 18 0a 00 00 00 movl $0x0,0xa18
726: 00 00 00
729: e9 3e ff ff ff jmp 66c <malloc+0x2c>
|
#include "Catch.hpp"
#include "RaZ/Math/Matrix.hpp"
#include "RaZ/Math/Vector.hpp"
namespace {
// Declaring matrices to be tested
const Raz::Mat3f mat31({{ 4.12f, 25.1f, 30.7842f },
{ 3.04f, 5.f, -64.5f },
{ -1.f, -7.54f, 8.41f }});
const Raz::Mat3f mat32({{ 47.4f, 10.001f, 15.12f },
{ 8.01f, -98.1f, 97.f },
{ 12.54f, 70.f, -54.05f }});
const Raz::Mat4f mat41({{ -3.2f, 53.032f, 832.451f, 74.2f },
{ 10.01f, 3.15f, -91.41f, 187.46f },
{ -6.f, -7.78f, 90.f, 38.f },
{ 123.f, -74.8f, 147.0001f, 748.6f }});
const Raz::Mat4f mat42({{ 5.5f, 98.14f, -8.24f, 42.f },
{ 15.84f, -145.f, 3.145f, 52.74f },
{ -8.12f, 38.24f, 62.f, 43.12f },
{ 74.f, 15.7f, 43.64f, 28.8f }});
} // namespace
TEST_CASE("Matrix near-equality") {
CHECK_FALSE(mat31 == mat32);
const Raz::Mat2f baseMat = Raz::Mat2f::identity();
Raz::Mat2f compMat = baseMat;
CHECK(baseMat[0] == compMat[0]); // Copied, strict equality
CHECK(baseMat[1] == compMat[1]);
CHECK(baseMat[2] == compMat[2]);
CHECK(baseMat[3] == compMat[3]);
compMat += 0.0000001f; // Adding a tiny offset
CHECK_FALSE(baseMat[0] == compMat[0]); // Values not strictly equal
CHECK_FALSE(baseMat[1] == compMat[1]);
CHECK_FALSE(baseMat[2] == compMat[2]);
CHECK_FALSE(baseMat[3] == compMat[3]);
CHECK_THAT(baseMat[0], IsNearlyEqualTo(compMat[0])); // Near-equality components check
CHECK_THAT(baseMat[1], IsNearlyEqualTo(compMat[1]));
CHECK_THAT(baseMat[2], IsNearlyEqualTo(compMat[2]));
CHECK_THAT(baseMat[3], IsNearlyEqualTo(compMat[3]));
CHECK(baseMat == compMat); // Matrix::operator== does a near-equality check on floating point types
}
TEST_CASE("Matrix resize") {
const Raz::Mat3f truncatedMat(mat41);
const Raz::Mat4f expandedMat(truncatedMat);
CHECK(truncatedMat == Raz::Mat3f({{ -3.2f, 53.032f, 832.451f },
{ 10.01f, 3.15f, -91.41f },
{ -6.f, -7.78f, 90.f }}));
CHECK(expandedMat == Raz::Mat4f({{ -3.2f, 53.032f, 832.451f, 0.f },
{ 10.01f, 3.15f, -91.41f, 0.f },
{ -6.f, -7.78f, 90.f, 0.f },
{ 0.f, 0.f, 0.f, 1.f }}));
CHECK(Raz::Mat4f(mat31) == Raz::Mat4f({{ 4.12f, 25.1f, 30.7842f, 0.f },
{ 3.04f, 5.f, -64.5f, 0.f },
{ -1.f, -7.54f, 8.41f, 0.f },
{ 0.f, 0.f, 0.f, 1.f }}));
CHECK(Raz::Mat4f(Raz::Mat3f(mat42)) == Raz::Mat4f({{ 5.5f, 98.14f, -8.24f, 0.f },
{ 15.84f, -145.f, 3.145f, 0.f },
{ -8.12f, 38.24f, 62.f, 0.f },
{ 0.f, 0.f, 0.f, 1.f }}));
}
TEST_CASE("Matrix row/column") {
CHECK(mat31.recoverRow(0) == Raz::Vec3f({ 4.12f, 25.1f, 30.7842f }));
CHECK(mat42.recoverRow(2) == Raz::Vec4f({ -8.12f, 38.24f, 62.f, 43.12f }));
CHECK(mat32.recoverColumn(2) == Raz::Vec3f({ 15.12f, 97.f, -54.05f }));
CHECK(mat41.recoverColumn(1) == Raz::Vec4f({ 53.032f, 3.15f, -7.78f, -74.8f }));
const Raz::Matrix<float, 8, 2> testMat({{ 1.f, 2.f, 3.f, 4.f, 5.f, 6.f, 7.f, 8.f },
{ 9.f, 10.f, 11.f, 12.f, 13.f, 14.f, 15.f, 16.f }});
CHECK(testMat.recoverRow(1) == Raz::Vector<float, 8>({ 9.f, 10.f, 11.f, 12.f, 13.f, 14.f, 15.f, 16.f }));
CHECK(testMat.recoverColumn(5) == Raz::Vec2f({ 6.f, 14.f }));
const Raz::Matrix<float, 2, 8> testMatTrans = testMat.transpose();
CHECK(testMatTrans.recoverRow(7) == Raz::Vec2f({ 8.f, 16.f }));
CHECK(testMatTrans.recoverColumn(0) == Raz::Vector<float, 8>({ 1.f, 2.f, 3.f, 4.f, 5.f, 6.f, 7.f, 8.f }));
}
TEST_CASE("Matrix/scalar operations") {
CHECK((mat31 * 3.f) == Raz::Mat3f({{ 12.36f, 75.3f, 92.3526f },
{ 9.12f, 15.f, -193.5f },
{ -3.f, -22.62f, 25.23f }}));
CHECK((mat31 * 4.152f) == Raz::Mat3f({{ 17.10624f, 104.2152f, 127.8159984f },
{ 12.62208f, 20.76f, -267.804f },
{ -4.152f, -31.30608f, 34.91832f }}));
CHECK((mat41 * 7.5f) == Raz::Mat4f({{ -24.f, 397.74f, 6243.3825f, 556.5f },
{ 75.075f, 23.625f, -685.575f, 1405.95f },
{ -45.f, -58.35f, 675.f, 285.f },
{ 922.5f, -561.f, 1102.50075f, 5614.5f }}));
CHECK((mat41 * 8.0002f) == Raz::Mat4f({{ -25.60064f, 424.2666064f, 6659.7744902f, 593.61484f },
{ 80.082002f, 25.20063f, -731.298282f, 1499.717492f },
{ -48.0012f, -62.241556f, 720.018f, 304.0076f },
{ 984.0246f, -598.41496f, 1176.03020002f, 5988.94972f }}));
CHECK((mat41 * 0.f) == Raz::Mat4f({{ 0.f, 0.f, 0.f, 0.f },
{ 0.f, 0.f, 0.f, 0.f },
{ 0.f, 0.f, 0.f, 0.f },
{ 0.f, 0.f, 0.f, 0.f }}));
}
TEST_CASE("Matrix/matrix operations") {
CHECK((mat31 - mat31) == Raz::Mat3f({{ 0.f, 0.f, 0.f },
{ 0.f, 0.f, 0.f },
{ 0.f, 0.f, 0.f }}));
// Component-wise multiplication
CHECK((mat31 % mat32) == Raz::Mat3f({{ 195.288f, 251.0251f, 465.457104f },
{ 24.3504f, -490.5f, -6256.5f },
{ -12.54f, -527.8f, -454.5605f }}));
// Matrix multiplication
// The cell containing -2.334007 isn't the actual result; by hand we find -2.334, but this test doesn't pass with that value
// The code's result is here truncated to make it pass. Really not clean, but is assumed to fail because of errors accumulation
const Raz::Mat3f res3132({{ 782.372868f, -266.21188f, 833.10839f },
{ -624.684f, -4975.09696f, 4017.1898f },
{ -2.334007f, 1318.373f, -1201.0605f }});
const Raz::Mat3f res3231({{ 210.57104f, 1125.7402f, 941.26578f },
{ -362.2228f, -1020.829f, 7389.801442f },
{ 318.5148f, 1072.291f, -4583.526632f }});
CHECK((mat31 * mat32) == res3132);
CHECK((mat32 * mat31) == res3231);
CHECK((mat31 * Raz::Mat3f::identity()) == mat31);
CHECK((mat41 * Raz::Mat4f::identity()) == mat41);
}
TEST_CASE("Matrix/vector operations") {
const Raz::Vec3f vec3({ 3.18f, 42.f, 0.874f });
CHECK((mat31 * vec3) == Raz::Vec3f({ 1094.2069908f, 163.2942f, -312.50966f }));
CHECK((mat32 * vec3) == Raz::Vec3f({ 583.98888f, -4009.9502f, 2932.6375f }));
const Raz::Vec4f vec4({ 84.47f, 2.f, 0.001f, 847.12f });
CHECK((mat41 * vec4) == Raz::Vec4f({ 62692.896451f, 159652.86849f, 31668.27f, 644394.3890001f }));
CHECK((mat42 * vec4) == Raz::Vec4f({ 36239.89676f, 45725.116745f, 35918.46f, 30679.27964f }));
}
|
;RaTol Symbolinen konekieli: koeteht 2
;Tero Kukka IY96A
;Tiedosto: alik2.asm
;Luotu 27.4.1998
;Aliohjelma _etsi:
public _etsi ;near
.model small ;huom! muistimalli
.stack 00h ;pinon koko
.data ;muuttujalohko
.code
_etsi proc
push bp
mov bp, sp
push dx
push di
mov word ptr ax, 0
mov dx, [bp + 6] ;etsittävä tavu
mov di, [bp + 4] ;jonon offset
ALKU:
cmp byte ptr [di], 0 ;onko loppumerkki?
jz LOPPU
cmp [di], dl
jnz OHI
inc ax
OHI:
inc di
jmp ALKU
LOPPU:
pop di
pop dx
pop bp
ret
_etsi endp
end
|
// Copyright 2021 Google LLC
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include "maldoca/service/maldoca_client.h"
namespace maldoca {
::grpc::Status MaldocaClient::ProcessDocument(
const ProcessDocumentRequest& request, ProcessDocumentResponse* response) {
::grpc::ClientContext context;
return stub_->SendProcessingRequest(&context, request, response);
}
} // namespace maldoca
|
{
let r := 0
0xffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
256
shl
=: r
switch r
case 0 {
}
default {
0
0
revert
}
///
r := 0
2
1
shl
=: r
switch r
case 4 {
}
default {
0
0
revert
}
///
r := 0
0xffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
1
shl
=: r
switch r
case 0xfffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe {
}
default {
0
0
revert
}
///
r := 0
0x8000000000000000000000000000000000000000000000000000000000000000
1
shl
=: r
switch r
case 0 {
}
default {
0
0
revert
}
///
r := 0
3
255
shl
=: r
switch r
case 0x8000000000000000000000000000000000000000000000000000000000000000 {
}
default {
0
0
revert
}
///
r := 0
0xffffffff
224
shl
=: r
switch r
case 0xffffffff00000000000000000000000000000000000000000000000000000000 {
}
default {
0
0
revert
}
///
r := 0
2
1
shr
=: r
switch r
case 1 {
}
default {
0
0
revert
}
///
r := 0
0xffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
256
shr
=: r
switch r
case 0 {
}
default {
0
0
revert
}
///
r := 0
0xffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
1
shr
=: r
switch r
case 0x7fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff {
}
default {
0
0
revert
}
///
r := 0
0x7fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
1
shr
=: r
switch r
case 0x3fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff {
}
default {
0
0
revert
}
///
r := 0
0x8000000000000000000000000000000000000000000000000000000000000000
1
shr
=: r
switch r
case 0x4000000000000000000000000000000000000000000000000000000000000000 {
}
default {
0
0
revert
}
///
r := 0
0xffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
256
sar
=: r
switch r
case 0xffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff {
}
default {
0
0
revert
}
///
0x7fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
256
sar
=: r
switch r
case 0 {
}
default {
0
0
revert
}
///
r := 0
0xffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
1
sar
=: r
switch r
case 0xffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff {
}
default {
0
0
revert
}
///
r := 0
0x7fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
1
sar
=: r
switch r
case 0x3fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff {
stop
}
default {
0
0
revert
}
}
|
.global s_prepare_buffers
s_prepare_buffers:
ret
.global s_faulty_load
s_faulty_load:
push %r14
push %r8
push %r9
push %rax
push %rbx
push %rcx
push %rdi
push %rdx
push %rsi
// Load
lea addresses_normal+0xdbb9, %r14
nop
nop
nop
and %r9, %r9
mov (%r14), %r8d
nop
nop
nop
dec %rax
// REPMOV
lea addresses_D+0x1acb9, %rsi
lea addresses_PSE+0xe9b9, %rdi
clflush (%rsi)
nop
nop
nop
nop
nop
and $63856, %r9
mov $59, %rcx
rep movsb
// Exception!!!
mov (0), %rdi
nop
xor %r8, %r8
// Store
lea addresses_US+0xcfb9, %rdi
nop
nop
sub %rcx, %rcx
movw $0x5152, (%rdi)
nop
nop
nop
nop
nop
add $46267, %rdi
// Store
lea addresses_WT+0x12155, %r9
nop
nop
nop
nop
nop
sub %rdx, %rdx
mov $0x5152535455565758, %rdi
movq %rdi, (%r9)
// Exception!!!
nop
nop
nop
nop
nop
mov (0), %rax
nop
nop
nop
nop
nop
xor $27288, %rax
// Load
lea addresses_PSE+0x46f9, %rbx
clflush (%rbx)
nop
nop
dec %rsi
mov (%rbx), %cx
nop
nop
nop
and $27554, %r9
// Load
lea addresses_UC+0x1a1b9, %rdi
nop
nop
nop
sub $9283, %r14
mov (%rdi), %r8w
nop
nop
nop
nop
and %rcx, %rcx
// Store
lea addresses_A+0x1a759, %rsi
nop
nop
nop
nop
and $41242, %rcx
movl $0x51525354, (%rsi)
nop
nop
nop
sub $7731, %r14
// Load
lea addresses_US+0x11790, %r14
nop
nop
cmp $63094, %rsi
vmovups (%r14), %ymm1
vextracti128 $0, %ymm1, %xmm1
vpextrq $0, %xmm1, %rdx
nop
nop
nop
nop
sub %rdi, %rdi
// Load
lea addresses_D+0x1c379, %rcx
sub %r14, %r14
mov (%rcx), %r9d
nop
nop
nop
inc %r9
// Faulty Load
lea addresses_D+0x1f5b9, %rcx
nop
nop
nop
nop
nop
xor $24019, %rdx
mov (%rcx), %edi
lea oracles, %r9
and $0xff, %rdi
shlq $12, %rdi
mov (%r9,%rdi,1), %rdi
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbx
pop %rax
pop %r9
pop %r8
pop %r14
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_D', 'AVXalign': True, 'size': 16, 'NT': False, 'same': False, 'congruent': 0}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_normal', 'AVXalign': False, 'size': 4, 'NT': False, 'same': False, 'congruent': 9}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_D', 'congruent': 8, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_PSE', 'congruent': 7, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_US', 'AVXalign': False, 'size': 2, 'NT': True, 'same': False, 'congruent': 9}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WT', 'AVXalign': False, 'size': 8, 'NT': False, 'same': False, 'congruent': 2}}
{'src': {'type': 'addresses_PSE', 'AVXalign': False, 'size': 2, 'NT': False, 'same': False, 'congruent': 6}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_UC', 'AVXalign': False, 'size': 2, 'NT': False, 'same': False, 'congruent': 9}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'type': 'addresses_A', 'AVXalign': False, 'size': 4, 'NT': True, 'same': False, 'congruent': 5}}
{'src': {'type': 'addresses_US', 'AVXalign': False, 'size': 32, 'NT': False, 'same': False, 'congruent': 0}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_D', 'AVXalign': False, 'size': 4, 'NT': False, 'same': False, 'congruent': 6}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'type': 'addresses_D', 'AVXalign': False, 'size': 4, 'NT': False, 'same': True, 'congruent': 0}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'36': 21829}
36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36
*/
|
.MODEL SMALL
.STACK 100H
.DATA
STR1 DB "ENTER a to z: $"
I1 DB 50 DUP("$")
I2 DB 50 DUP("$")
NEW DB 10,13,"$"
MAIN PROC
CODE SEGMENT
ASSUME DS:DATA,CS:CODE
START:
MOV AX,@DATA
MOV DS,AX
LEA SI,I1
MOV AH,09H
LEA DX,STR1
INT 21H
MOV AH,0AH
MOV DX,SI
INT 21H
MOV AH,09H
LEA DX,NEW
INT 21H
MOV CL,I1+1
ADD CL,1
ADD SI,2
L1:
INC SI
CMP BYTE PTR[SI],"$"
JNE L1
DEC SI
LEA DI,I2
L2:
MOV AL,BYTE PTR[SI]
MOV BYTE PTR[DI],AL
DEC SI
INC DI
LOOP L2
MOV AH,09H
LEA DX,I2
INT 21H
MOV AH,09H
LEA DX,NEW
INT 21H
MOV AH,4CH
INT 21H
ENDS
END START
|
; BeepFX sound effect by shiru
; http://shiru.untergrund.net
SECTION rodata_clib
SECTION rodata_sound_bit
PUBLIC _bfx_0
_bfx_0:
; Shot_1
defb 1 ;tone
defw 20,50,2000,65486,128
defb 0
|
segment .text
align 4
f:
push ebp
mov ebp, esp
sub esp, 4
push dword 2
lea eax, [ebp+-4]
push eax
pop ecx
pop eax
mov [ecx], eax
lea eax, [ebp+-4]
push eax
pop eax
push dword [eax]
pop eax
leave
ret
align 4
global _main:function
_main:
align 4
xpl:
push ebp
mov ebp, esp
sub esp, 4
push dword 0
lea eax, [ebp+-4]
push eax
pop ecx
pop eax
mov [ecx], eax
call f
add esp, 0
push eax
call printi
add esp, 4
lea eax, [ebp+-4]
push eax
pop eax
push dword [eax]
pop eax
leave
ret
extern argc
extern argv
extern envp
extern readi
extern readd
extern printi
extern prints
extern printd
extern println
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright(c) 2011-2015 Intel Corporation All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in
; the documentation and/or other materials provided with the
; distribution.
; * Neither the name of Intel Corporation nor the names of its
; contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;
;;; gf_4vect_mad_avx2(len, vec, vec_i, mul_array, src, dest);
;;;
%include "reg_sizes.asm"
%define PS 8
%ifidn __OUTPUT_FORMAT__, win64
%define arg0 rcx
%define arg0.w ecx
%define arg1 rdx
%define arg2 r8
%define arg3 r9
%define arg4 r12
%define arg5 r15
%define tmp r11
%define tmp.w r11d
%define tmp.b r11b
%define return rax
%define return.w eax
%define stack_size 16*10 + 3*8
%define arg(x) [rsp + stack_size + PS + PS*x]
%define func(x) proc_frame x
%macro FUNC_SAVE 0
sub rsp, stack_size
movdqa [rsp+16*0],xmm6
movdqa [rsp+16*1],xmm7
movdqa [rsp+16*2],xmm8
movdqa [rsp+16*3],xmm9
movdqa [rsp+16*4],xmm10
movdqa [rsp+16*5],xmm11
movdqa [rsp+16*6],xmm12
movdqa [rsp+16*7],xmm13
movdqa [rsp+16*8],xmm14
movdqa [rsp+16*9],xmm15
save_reg r12, 10*16 + 0*8
save_reg r15, 10*16 + 1*8
end_prolog
mov arg4, arg(4)
mov arg5, arg(5)
%endmacro
%macro FUNC_RESTORE 0
movdqa xmm6, [rsp+16*0]
movdqa xmm7, [rsp+16*1]
movdqa xmm8, [rsp+16*2]
movdqa xmm9, [rsp+16*3]
movdqa xmm10, [rsp+16*4]
movdqa xmm11, [rsp+16*5]
movdqa xmm12, [rsp+16*6]
movdqa xmm13, [rsp+16*7]
movdqa xmm14, [rsp+16*8]
movdqa xmm15, [rsp+16*9]
mov r12, [rsp + 10*16 + 0*8]
mov r15, [rsp + 10*16 + 1*8]
add rsp, stack_size
%endmacro
%elifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg0.w edi
%define arg1 rsi
%define arg2 rdx
%define arg3 rcx
%define arg4 r8
%define arg5 r9
%define tmp r11
%define tmp.w r11d
%define tmp.b r11b
%define return rax
%define return.w eax
%define func(x) x:
%define FUNC_SAVE
%define FUNC_RESTORE
%endif
;;; gf_4vect_mad_avx2(len, vec, vec_i, mul_array, src, dest)
%define len arg0
%define len.w arg0.w
%define vec arg1
%define vec_i arg2
%define mul_array arg3
%define src arg4
%define dest1 arg5
%define pos return
%define pos.w return.w
%define dest2 mul_array
%define dest3 vec
%define dest4 vec_i
%ifndef EC_ALIGNED_ADDR
;;; Use Un-aligned load/store
%define XLDR vmovdqu
%define XSTR vmovdqu
%else
;;; Use Non-temporal load/stor
%ifdef NO_NT_LDST
%define XLDR vmovdqa
%define XSTR vmovdqa
%else
%define XLDR vmovntdqa
%define XSTR vmovntdq
%endif
%endif
default rel
[bits 64]
section .text
%define xmask0f ymm15
%define xmask0fx xmm15
%define xgft1_lo ymm14
%define xgft2_lo ymm13
%define xgft3_lo ymm12
%define xgft4_lo ymm11
%define x0 ymm0
%define xtmpa ymm1
%define xtmpl ymm2
%define xtmplx xmm2
%define xtmph1 ymm3
%define xtmph1x xmm3
%define xtmph2 ymm4
%define xtmph3 ymm5
%define xtmph4 ymm6
%define xd1 ymm7
%define xd2 ymm8
%define xd3 ymm9
%define xd4 ymm10
align 16
global gf_4vect_mad_avx2:ISAL_SYM_TYPE_FUNCTION
func(gf_4vect_mad_avx2)
FUNC_SAVE
sub len, 32
jl .return_fail
xor pos, pos
mov tmp.b, 0x0f
vpinsrb xmask0fx, xmask0fx, tmp.w, 0
vpbroadcastb xmask0f, xmask0fx ;Construct mask 0x0f0f0f...
sal vec_i, 5 ;Multiply by 32
sal vec, 5 ;Multiply by 32
lea tmp, [mul_array + vec_i]
vmovdqu xgft1_lo, [tmp] ;Load array Ax{00}, Ax{01}, Ax{02}, ...
; " Ax{00}, Ax{10}, Ax{20}, ... , Ax{f0}
vmovdqu xgft2_lo, [tmp+vec] ;Load array Bx{00}, Bx{01}, Bx{02}, ...
; " Bx{00}, Bx{10}, Bx{20}, ... , Bx{f0}
vmovdqu xgft3_lo, [tmp+2*vec] ;Load array Cx{00}, Cx{01}, Cx{02}, ...
; " Cx{00}, Cx{10}, Cx{20}, ... , Cx{f0}
add tmp, vec
vmovdqu xgft4_lo, [tmp+2*vec] ;Load array Dx{00}, Dx{01}, Dx{02}, ...
; " Dx{00}, Dx{10}, Dx{20}, ... , Dx{f0}
mov dest2, [dest1+PS] ; reuse mul_array
mov dest3, [dest1+2*PS] ; reuse vec
mov dest4, [dest1+3*PS] ; reuse vec_i
mov dest1, [dest1]
.loop32:
XLDR x0, [src+pos] ;Get next source vector
XLDR xd1, [dest1+pos] ;Get next dest vector
XLDR xd2, [dest2+pos] ;Get next dest vector
XLDR xd3, [dest3+pos] ;Get next dest vector
XLDR xd4, [dest4+pos] ;reuse xtmpl1. Get next dest vector
vpand xtmpl, x0, xmask0f ;Mask low src nibble in bits 4-0
vpsraw x0, x0, 4 ;Shift to put high nibble into bits 4-0
vpand x0, x0, xmask0f ;Mask high src nibble in bits 4-0
vperm2i128 xtmpa, xtmpl, x0, 0x30 ;swap xtmpa from 1lo|2lo to 1lo|2hi
vperm2i128 x0, xtmpl, x0, 0x12 ;swap x0 from 1hi|2hi to 1hi|2lo
vperm2i128 xtmph1, xgft1_lo, xgft1_lo, 0x01 ; swapped to hi | lo
vperm2i128 xtmph2, xgft2_lo, xgft2_lo, 0x01 ; swapped to hi | lo
vperm2i128 xtmph3, xgft3_lo, xgft3_lo, 0x01 ; swapped to hi | lo
vperm2i128 xtmph4, xgft4_lo, xgft4_lo, 0x01 ; swapped to hi | lo
; dest1
vpshufb xtmph1, xtmph1, x0 ;Lookup mul table of high nibble
vpshufb xtmpl, xgft1_lo, xtmpa ;Lookup mul table of low nibble
vpxor xtmph1, xtmph1, xtmpl ;GF add high and low partials
vpxor xd1, xd1, xtmph1 ;xd1 += partial
; dest2
vpshufb xtmph2, xtmph2, x0 ;Lookup mul table of high nibble
vpshufb xtmpl, xgft2_lo, xtmpa ;Lookup mul table of low nibble
vpxor xtmph2, xtmph2, xtmpl ;GF add high and low partials
vpxor xd2, xd2, xtmph2 ;xd2 += partial
; dest3
vpshufb xtmph3, xtmph3, x0 ;Lookup mul table of high nibble
vpshufb xtmpl, xgft3_lo, xtmpa ;Lookup mul table of low nibble
vpxor xtmph3, xtmph3, xtmpl ;GF add high and low partials
vpxor xd3, xd3, xtmph3 ;xd3 += partial
; dest4
vpshufb xtmph4, xtmph4, x0 ;Lookup mul table of high nibble
vpshufb xtmpl, xgft4_lo, xtmpa ;Lookup mul table of low nibble
vpxor xtmph4, xtmph4, xtmpl ;GF add high and low partials
vpxor xd4, xd4, xtmph4 ;xd4 += partial
XSTR [dest1+pos], xd1
XSTR [dest2+pos], xd2
XSTR [dest3+pos], xd3
XSTR [dest4+pos], xd4
add pos, 32 ;Loop on 32 bytes at a time
cmp pos, len
jle .loop32
lea tmp, [len + 32]
cmp pos, tmp
je .return_pass
.lessthan32:
;; Tail len
;; Do one more overlap pass
mov tmp.b, 0x1f
vpinsrb xtmph1x, xtmph1x, tmp.w, 0
vpbroadcastb xtmph1, xtmph1x ;Construct mask 0x1f1f1f...
mov tmp, len ;Overlapped offset length-32
XLDR x0, [src+tmp] ;Get next source vector
XLDR xd1, [dest1+tmp] ;Get next dest vector
XLDR xd2, [dest2+tmp] ;Get next dest vector
XLDR xd3, [dest3+tmp] ;Get next dest vector
XLDR xd4, [dest4+tmp] ;Get next dest vector
sub len, pos
vmovdqa xtmph2, [constip32] ;Load const of i + 32
vpinsrb xtmplx, xtmplx, len.w, 15
vinserti128 xtmpl, xtmpl, xtmplx, 1 ;swapped to xtmplx | xtmplx
vpshufb xtmpl, xtmpl, xtmph1 ;Broadcast len to all bytes. xtmph1=0x1f1f1f...
vpcmpgtb xtmpl, xtmpl, xtmph2
vpand xtmph1, x0, xmask0f ;Mask low src nibble in bits 4-0
vpsraw x0, x0, 4 ;Shift to put high nibble into bits 4-0
vpand x0, x0, xmask0f ;Mask high src nibble in bits 4-0
vperm2i128 xtmpa, xtmph1, x0, 0x30 ;swap xtmpa from 1lo|2lo to 1lo|2hi
vperm2i128 x0, xtmph1, x0, 0x12 ;swap x0 from 1hi|2hi to 1hi|2lo
vperm2i128 xtmph1, xgft1_lo, xgft1_lo, 0x01 ; swapped to hi | lo
vperm2i128 xtmph2, xgft2_lo, xgft2_lo, 0x01 ; swapped to hi | lo
vperm2i128 xtmph3, xgft3_lo, xgft3_lo, 0x01 ; swapped to hi | lo
vperm2i128 xtmph4, xgft4_lo, xgft4_lo, 0x01 ; swapped to hi | lo
; dest1
vpshufb xtmph1, xtmph1, x0 ;Lookup mul table of high nibble
vpshufb xgft1_lo, xgft1_lo, xtmpa ;Lookup mul table of low nibble
vpxor xtmph1, xtmph1, xgft1_lo ;GF add high and low partials
vpand xtmph1, xtmph1, xtmpl
vpxor xd1, xd1, xtmph1 ;xd1 += partial
; dest2
vpshufb xtmph2, xtmph2, x0 ;Lookup mul table of high nibble
vpshufb xgft2_lo, xgft2_lo, xtmpa ;Lookup mul table of low nibble
vpxor xtmph2, xtmph2, xgft2_lo ;GF add high and low partials
vpand xtmph2, xtmph2, xtmpl
vpxor xd2, xd2, xtmph2 ;xd2 += partial
; dest3
vpshufb xtmph3, xtmph3, x0 ;Lookup mul table of high nibble
vpshufb xgft3_lo, xgft3_lo, xtmpa ;Lookup mul table of low nibble
vpxor xtmph3, xtmph3, xgft3_lo ;GF add high and low partials
vpand xtmph3, xtmph3, xtmpl
vpxor xd3, xd3, xtmph3 ;xd3 += partial
; dest4
vpshufb xtmph4, xtmph4, x0 ;Lookup mul table of high nibble
vpshufb xgft4_lo, xgft4_lo, xtmpa ;Lookup mul table of low nibble
vpxor xtmph4, xtmph4, xgft4_lo ;GF add high and low partials
vpand xtmph4, xtmph4, xtmpl
vpxor xd4, xd4, xtmph4 ;xd4 += partial
XSTR [dest1+tmp], xd1
XSTR [dest2+tmp], xd2
XSTR [dest3+tmp], xd3
XSTR [dest4+tmp], xd4
.return_pass:
mov return, 0
FUNC_RESTORE
ret
.return_fail:
mov return, 1
FUNC_RESTORE
ret
endproc_frame
section .data
align 32
constip32:
dq 0xf8f9fafbfcfdfeff, 0xf0f1f2f3f4f5f6f7
dq 0xe8e9eaebecedeeef, 0xe0e1e2e3e4e5e6e7
;;; func core, ver, snum
slversion gf_4vect_mad_avx2, 04, 01, 020b
|
; HOTKEY use routine V2.00 1988 Tony Tebby QJUMP
section hotkey
xdef hk_thuse
xref hk_ckjob
include 'dev8_keys_qlv'
include 'dev8_keys_err'
include 'dev8_ee_hk_data'
; check if job still exists
hku_ckjb
cmp.b #-1,hkd_act+hkd.thg(a1) ; used by hotkey job?
bne.s hku_inus ; ... no, in use
move.l a3,-(sp) ; save linkage
lea hkd.thg(a1),a3 ; set the thing itself
jsr hk_ckjob ; check job still exists
move.l (sp)+,a3
beq.s hku_inus ; it is alright!
;+++
; Use routine for Hotkey Thing. Prevents multiple access including polling
; routine and Hotkey Job.
;---
hk_thuse
tas hkd_act+hkd.thg(a1) ; kill polling routine
bne.s hku_ckjb ; ... in use, check job
tst.b hkd_req+hkd.thg(a1) ; request pending?
bne.s hku_reqp ; ... yes
moveq #$18,d1 ; allocate usage
move.w mem.achp,a2
jmp (a2)
hku_reqp
clr.b hkd_act+hkd.thg(a1) ; re-enable polling
hku_inus
moveq #err.fdiu,d0
rts
end
|
extern scanf
extern printf
section .data
poczatek dd 0
przesuniecie dd 0
suma dd 0
format db "%d",0
napis1 db "Podaj poczatek przedzialu: ",0
napis2 db "Podaj ilość wyrazow: ",0
format2 db "Suma: %d",10,0
section .text
global main
main:
xor rax, rax
mov rdi, napis1
call printf
xor rax, rax
mov rdi, format
mov rsi, poczatek
call scanf
xor rax, rax
mov rdi, napis2
call printf
xor rax, rax
mov rdi, format
mov rsi, przesuniecie
call scanf
mov eax, [poczatek]
mov ebx, [przesuniecie]
mov ecx, 0
inc ebx
_dodawanie:
add ecx, eax
inc eax
dec ebx
cmp ebx, 0
ja _dodawanie
mov dword [suma], ecx
xor rax, rax
mov rdi, format2
mov rsi, [suma]
call printf
mov rax, 1
mov rbx, 0
int 80h
|
/*
* The MIT License
*
* Copyright 2016 annas.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
/*
* File: save_ptr.hpp
* Author: annas
*
* Created on 11. November 2016, 05:58
*/
#ifndef SAVE_PTR_HPP
#define SAVE_PTR_HPP
#include "common.hpp"
namespace std
{
template<typename T>
class save_ptr
{
public:
using value_type = T;
using pointer = T*;
using reference = T&;
using self_type = save_ptr<T>;
save_ptr() : m_ptr(0) {
}
explicit save_ptr(T *v) : m_ptr(v) {
}
~save_ptr() {
if(m_ptr) delete m_ptr;
}
value_type const *get() const {
return m_ptr;
}
value_type *get() {
return m_ptr;
}
value_type const &operator *() const {
return *m_ptr;
}
value_type &operator *() {
return *m_ptr;
}
value_type const *operator->() const {
return m_ptr;
}
value_type *operator->() {
return m_ptr;
}
value_type *release() {
value_type *tmp = m_ptr;
m_ptr = NULL;
return tmp;
}
void reset(value_type *p = NULL)
{
if(m_ptr) delete m_ptr;
m_ptr = p;
}
void swap(self_type &other)
{
value_type *tmp = other.m_ptr;
other.m_ptr = m_ptr;
m_ptr = tmp;
}
private:
pointer *m_ptr;
save_ptr(save_ptr const &other) {}
save_ptr const &operator=(save_ptr const &other) {}
};
}
#endif /* SAVE_PTR_HPP */
|
; RUN: not llvm-ml -filetype=s %s /Fo - 2>&1 | FileCheck %s --implicit-check-not=error:
.code
; CHECK: error: Vararg parameter 'param' should be last in the list of parameters
; CHECK: error: unexpected 'ENDM' in file, no current macro definition
early_vararg_macro MACRO param:vararg, trailing_param
ENDM
; CHECK: error: macro 'colliding_parameters_macro' has multiple parameters named 'paRAM'
; CHECK: error: unexpected 'ENDM' in file, no current macro definition
colliding_parameters_macro MACRO Param, paRAM
ENDM
; CHECK: error: missing parameter qualifier for 'param' in macro 'missing_qualifier_macro'
; CHECK: error: unexpected 'ENDM' in file, no current macro definition
missing_qualifier_macro MACRO param:
ENDM
; CHECK: error: no matching 'endm' in definition
missing_end_macro MACRO
end
|
; ASM source file created by SevenuP v1.20
; SevenuP (C) Copyright 2002-2006 by Jaime Tejedor Gomez, aka Metalbrain
;GRAPHIC DATA:
;Pixel Size: ( 24, 32)
;Char Size: ( 3, 4)
;Frames: 2
;Sort Priorities: X char, Char line, Y char, Frame number
;Data Outputted: Gfx
;Interleave: Sprite
;Mask: No
barbaro_palanca:
DEFB 0, 0, 0, 1,240, 0, 2, 8
DEFB 0, 4, 4, 0, 8,164, 0, 0
DEFB 240, 0, 28,240, 0, 62, 96, 0
DEFB 61,128, 32, 63,192,112, 31,184
DEFB 112, 7,254, 64, 8,255, 0, 7
DEFB 0, 0, 7,160, 0, 0, 64, 0
DEFB 0, 0, 0, 0, 0, 0, 0, 0
DEFB 0, 0, 0, 0, 0, 96, 0, 1
DEFB 240, 0, 3,248, 0, 0,252, 0
DEFB 4, 60, 0, 2, 72, 0, 4,116
DEFB 0, 1, 24, 0, 3,128, 0, 9
DEFB 224, 0, 20,112, 0, 42,128, 0
DEFB 0, 0, 0, 0, 0, 0, 3, 24
DEFB 0, 4,228, 0, 24, 4, 0, 32
DEFB 0, 0, 24,160, 0, 0,240, 0
DEFB 28,244, 4, 62, 10,174, 61,224
DEFB 14, 63,223,136, 31,255,192, 0
DEFB 60, 0, 15, 0, 0, 7,160, 0
DEFB 0, 64, 0, 0, 0, 0, 0, 0
DEFB 0, 0, 0, 0, 0, 0, 0, 1
DEFB 224, 0, 3,240, 0, 5,240, 0
DEFB 2,240, 0, 16,104, 0, 10,152
DEFB 0, 20,240, 0, 10, 0, 0, 16
DEFB 224, 0, 0,240, 0, 1,252, 0 |
@256
D=A
@SP
M=D
@7
D=A
@SP
A=M
M=D
@SP
M=M+1
@8
D=A
@SP
A=M
M=D
@SP
M=M+1
@SP
M=M-1
@SP
A=M
D=M
@SP
M=M-1
@SP
A=M
A=M
D=D+A
@SP
A=M
M=D
@SP
M=M+1
|
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; ReadGdtr.Asm
;
; Abstract:
;
; AsmReadGdtr function
;
; Notes:
;
;------------------------------------------------------------------------------
.386
.model flat,C
.code
;------------------------------------------------------------------------------
; VOID
; EFIAPI
; InternalX86ReadGdtr (
; OUT IA32_DESCRIPTOR *Gdtr
; );
;------------------------------------------------------------------------------
InternalX86ReadGdtr PROC
mov eax, [esp + 4]
sgdt fword ptr [eax]
ret
InternalX86ReadGdtr ENDP
END
|
; A177712: Even numbers that have a nontrivial odd divisor.
; 6,10,12,14,18,20,22,24,26,28,30,34,36,38,40,42,44,46,48,50,52,54,56,58,60,62,66,68,70,72,74,76,78,80,82,84,86,88,90,92,94,96,98,100,102,104,106,108,110,112,114,116,118,120,122,124,126,130,132,134,136,138,140,142,144,146,148,150,152,154,156,158,160,162,164,166,168,170,172,174,176,178,180,182,184,186,188,190,192,194,196,198,200,202,204,206,208,210,212,214,216,218,220,222,224,226,228,230,232,234,236,238,240,242,244,246,248,250,252,254,258,260,262,264,266,268,270,272,274,276,278,280,282,284,286,288,290,292,294,296,298,300,302,304,306,308,310,312,314,316,318,320,322,324,326,328,330,332,334,336,338,340,342,344,346,348,350,352,354,356,358,360,362,364,366,368,370,372,374,376,378,380,382,384,386,388,390,392,394,396,398,400,402,404,406,408,410,412,414,416,418,420,422,424,426,428,430,432,434,436,438,440,442,444,446,448,450,452,454,456,458,460,462,464,466,468,470,472,474,476,478,480,482,484,486,488,490,492,494,496,498,500,502,504,506,508,510,514,516,518
mov $2,$0
lpb $2
add $0,1
mul $2,2
sub $2,$0
trn $2,2
lpe
mov $1,$0
mul $1,2
add $1,6
|
0x0000 (0x000000) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x0001 (0x000002) 0x2919- f:00024 d: 281 | OR[281] = A
0x0002 (0x000004) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x0003 (0x000006) 0x291A- f:00024 d: 282 | OR[282] = A
0x0004 (0x000008) 0x100C- f:00010 d: 12 | A = 12 (0x000C)
0x0005 (0x00000A) 0x292A- f:00024 d: 298 | OR[298] = A
0x0006 (0x00000C) 0x2118- f:00020 d: 280 | A = OR[280]
0x0007 (0x00000E) 0x292B- f:00024 d: 299 | OR[299] = A
0x0008 (0x000010) 0x112A- f:00010 d: 298 | A = 298 (0x012A)
0x0009 (0x000012) 0x5800- f:00054 d: 0 | B = A
0x000A (0x000014) 0x1800-0x2518 f:00014 d: 0 | A = 9496 (0x2518)
0x000C (0x000018) 0x7C09- f:00076 d: 9 | R = OR[9]
0x000D (0x00001A) 0x2006- f:00020 d: 6 | A = OR[6]
0x000E (0x00001C) 0x140B- f:00012 d: 11 | A = A + 11 (0x000B)
0x000F (0x00001E) 0x2908- f:00024 d: 264 | OR[264] = A
0x0010 (0x000020) 0x3108- f:00030 d: 264 | A = (OR[264])
0x0011 (0x000022) 0x291B- f:00024 d: 283 | OR[283] = A
0x0012 (0x000024) 0x211B- f:00020 d: 283 | A = OR[283]
0x0013 (0x000026) 0x1408- f:00012 d: 8 | A = A + 8 (0x0008)
0x0014 (0x000028) 0x2908- f:00024 d: 264 | OR[264] = A
0x0015 (0x00002A) 0x3108- f:00030 d: 264 | A = (OR[264])
0x0016 (0x00002C) 0x291C- f:00024 d: 284 | OR[284] = A
0x0017 (0x00002E) 0x211B- f:00020 d: 283 | A = OR[283]
0x0018 (0x000030) 0x1409- f:00012 d: 9 | A = A + 9 (0x0009)
0x0019 (0x000032) 0x2908- f:00024 d: 264 | OR[264] = A
0x001A (0x000034) 0x3108- f:00030 d: 264 | A = (OR[264])
0x001B (0x000036) 0x291D- f:00024 d: 285 | OR[285] = A
0x001C (0x000038) 0x211B- f:00020 d: 283 | A = OR[283]
0x001D (0x00003A) 0x140A- f:00012 d: 10 | A = A + 10 (0x000A)
0x001E (0x00003C) 0x2908- f:00024 d: 264 | OR[264] = A
0x001F (0x00003E) 0x3108- f:00030 d: 264 | A = (OR[264])
0x0020 (0x000040) 0x291E- f:00024 d: 286 | OR[286] = A
0x0021 (0x000042) 0x211B- f:00020 d: 283 | A = OR[283]
0x0022 (0x000044) 0x140B- f:00012 d: 11 | A = A + 11 (0x000B)
0x0023 (0x000046) 0x2908- f:00024 d: 264 | OR[264] = A
0x0024 (0x000048) 0x3108- f:00030 d: 264 | A = (OR[264])
0x0025 (0x00004A) 0x291F- f:00024 d: 287 | OR[287] = A
0x0026 (0x00004C) 0x211B- f:00020 d: 283 | A = OR[283]
0x0027 (0x00004E) 0x140C- f:00012 d: 12 | A = A + 12 (0x000C)
0x0028 (0x000050) 0x2908- f:00024 d: 264 | OR[264] = A
0x0029 (0x000052) 0x3108- f:00030 d: 264 | A = (OR[264])
0x002A (0x000054) 0x2920- f:00024 d: 288 | OR[288] = A
0x002B (0x000056) 0x211B- f:00020 d: 283 | A = OR[283]
0x002C (0x000058) 0x140D- f:00012 d: 13 | A = A + 13 (0x000D)
0x002D (0x00005A) 0x2908- f:00024 d: 264 | OR[264] = A
0x002E (0x00005C) 0x3108- f:00030 d: 264 | A = (OR[264])
0x002F (0x00005E) 0x2921- f:00024 d: 289 | OR[289] = A
0x0030 (0x000060) 0x211B- f:00020 d: 283 | A = OR[283]
0x0031 (0x000062) 0x140E- f:00012 d: 14 | A = A + 14 (0x000E)
0x0032 (0x000064) 0x2908- f:00024 d: 264 | OR[264] = A
0x0033 (0x000066) 0x3108- f:00030 d: 264 | A = (OR[264])
0x0034 (0x000068) 0x2922- f:00024 d: 290 | OR[290] = A
0x0035 (0x00006A) 0x211C- f:00020 d: 284 | A = OR[284]
0x0036 (0x00006C) 0x8402- f:00102 d: 2 | P = P + 2 (0x0038), A = 0
0x0037 (0x00006E) 0x7004- f:00070 d: 4 | P = P + 4 (0x003B)
0x0038 (0x000070) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x0039 (0x000072) 0x2923- f:00024 d: 291 | OR[291] = A
0x003A (0x000074) 0x7010- f:00070 d: 16 | P = P + 16 (0x004A)
0x003B (0x000076) 0x211C- f:00020 d: 284 | A = OR[284]
0x003C (0x000078) 0x1601- f:00013 d: 1 | A = A - 1 (0x0001)
0x003D (0x00007A) 0x8402- f:00102 d: 2 | P = P + 2 (0x003F), A = 0
0x003E (0x00007C) 0x7004- f:00070 d: 4 | P = P + 4 (0x0042)
0x003F (0x00007E) 0x1001- f:00010 d: 1 | A = 1 (0x0001)
0x0040 (0x000080) 0x2923- f:00024 d: 291 | OR[291] = A
0x0041 (0x000082) 0x7009- f:00070 d: 9 | P = P + 9 (0x004A)
0x0042 (0x000084) 0x211C- f:00020 d: 284 | A = OR[284]
0x0043 (0x000086) 0x1602- f:00013 d: 2 | A = A - 2 (0x0002)
0x0044 (0x000088) 0x8402- f:00102 d: 2 | P = P + 2 (0x0046), A = 0
0x0045 (0x00008A) 0x7003- f:00070 d: 3 | P = P + 3 (0x0048)
0x0046 (0x00008C) 0x708E- f:00070 d: 142 | P = P + 142 (0x00D4)
0x0047 (0x00008E) 0x7003- f:00070 d: 3 | P = P + 3 (0x004A)
0x0048 (0x000090) 0x7C34- f:00076 d: 52 | R = OR[52]
0x0049 (0x000092) 0x0000- f:00000 d: 0 | PASS
0x004A (0x000094) 0x211D- f:00020 d: 285 | A = OR[285]
0x004B (0x000096) 0x8402- f:00102 d: 2 | P = P + 2 (0x004D), A = 0
0x004C (0x000098) 0x7006- f:00070 d: 6 | P = P + 6 (0x0052)
0x004D (0x00009A) 0x211E- f:00020 d: 286 | A = OR[286]
0x004E (0x00009C) 0x8402- f:00102 d: 2 | P = P + 2 (0x0050), A = 0
0x004F (0x00009E) 0x7003- f:00070 d: 3 | P = P + 3 (0x0052)
0x0050 (0x0000A0) 0x7C34- f:00076 d: 52 | R = OR[52]
0x0051 (0x0000A2) 0x0000- f:00000 d: 0 | PASS
0x0052 (0x0000A4) 0x7489- f:00072 d: 137 | R = P + 137 (0x00DB)
0x0053 (0x0000A6) 0x2121- f:00020 d: 289 | A = OR[289]
0x0054 (0x0000A8) 0x2913- f:00024 d: 275 | OR[275] = A
0x0055 (0x0000AA) 0x2122- f:00020 d: 290 | A = OR[290]
0x0056 (0x0000AC) 0x2914- f:00024 d: 276 | OR[276] = A
0x0057 (0x0000AE) 0x1800-0x0FFF f:00014 d: 0 | A = 4095 (0x0FFF)
0x0059 (0x0000B2) 0x2B14- f:00025 d: 276 | OR[276] = A + OR[276]
0x005A (0x0000B4) 0x8002- f:00100 d: 2 | P = P + 2 (0x005C), C = 0
0x005B (0x0000B6) 0x2D13- f:00026 d: 275 | OR[275] = OR[275] + 1
0x005C (0x0000B8) 0x1010- f:00010 d: 16 | A = 16 (0x0010)
0x005D (0x0000BA) 0x160C- f:00013 d: 12 | A = A - 12 (0x000C)
0x005E (0x0000BC) 0x5800- f:00054 d: 0 | B = A
0x005F (0x0000BE) 0x2113- f:00020 d: 275 | A = OR[275]
0x0060 (0x0000C0) 0x4A00- f:00045 d: 0 | A = A < B
0x0061 (0x0000C2) 0x290D- f:00024 d: 269 | OR[269] = A
0x0062 (0x0000C4) 0x100C- f:00010 d: 12 | A = 12 (0x000C)
0x0063 (0x0000C6) 0x5800- f:00054 d: 0 | B = A
0x0064 (0x0000C8) 0x2113- f:00020 d: 275 | A = OR[275]
0x0065 (0x0000CA) 0x4800- f:00044 d: 0 | A = A > B
0x0066 (0x0000CC) 0x2913- f:00024 d: 275 | OR[275] = A
0x0067 (0x0000CE) 0x2114- f:00020 d: 276 | A = OR[276]
0x0068 (0x0000D0) 0x4800- f:00044 d: 0 | A = A > B
0x0069 (0x0000D2) 0x250D- f:00022 d: 269 | A = A + OR[269]
0x006A (0x0000D4) 0x2914- f:00024 d: 276 | OR[276] = A
0x006B (0x0000D6) 0x1026- f:00010 d: 38 | A = 38 (0x0026)
0x006C (0x0000D8) 0x292A- f:00024 d: 298 | OR[298] = A
0x006D (0x0000DA) 0x211D- f:00020 d: 285 | A = OR[285]
0x006E (0x0000DC) 0x292B- f:00024 d: 299 | OR[299] = A
0x006F (0x0000DE) 0x211E- f:00020 d: 286 | A = OR[286]
0x0070 (0x0000E0) 0x292C- f:00024 d: 300 | OR[300] = A
0x0071 (0x0000E2) 0x211A- f:00020 d: 282 | A = OR[282]
0x0072 (0x0000E4) 0x292D- f:00024 d: 301 | OR[301] = A
0x0073 (0x0000E6) 0x2114- f:00020 d: 276 | A = OR[276]
0x0074 (0x0000E8) 0x292E- f:00024 d: 302 | OR[302] = A
0x0075 (0x0000EA) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x0076 (0x0000EC) 0x292F- f:00024 d: 303 | OR[303] = A
0x0077 (0x0000EE) 0x112A- f:00010 d: 298 | A = 298 (0x012A)
0x0078 (0x0000F0) 0x5800- f:00054 d: 0 | B = A
0x0079 (0x0000F2) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x007A (0x0000F4) 0x7C09- f:00076 d: 9 | R = OR[9]
0x007B (0x0000F6) 0x211A- f:00020 d: 282 | A = OR[282]
0x007C (0x0000F8) 0x2926- f:00024 d: 294 | OR[294] = A
0x007D (0x0000FA) 0x2121- f:00020 d: 289 | A = OR[289]
0x007E (0x0000FC) 0x8402- f:00102 d: 2 | P = P + 2 (0x0080), A = 0
0x007F (0x0000FE) 0x7003- f:00070 d: 3 | P = P + 3 (0x0082)
0x0080 (0x000100) 0x2122- f:00020 d: 290 | A = OR[290]
0x0081 (0x000102) 0x8450- f:00102 d: 80 | P = P + 80 (0x00D1), A = 0
0x0082 (0x000104) 0x2126- f:00020 d: 294 | A = OR[294]
0x0083 (0x000106) 0x1402- f:00012 d: 2 | A = A + 2 (0x0002)
0x0084 (0x000108) 0x2908- f:00024 d: 264 | OR[264] = A
0x0085 (0x00010A) 0x3108- f:00030 d: 264 | A = (OR[264])
0x0086 (0x00010C) 0x2927- f:00024 d: 295 | OR[295] = A
0x0087 (0x00010E) 0x2126- f:00020 d: 294 | A = OR[294]
0x0088 (0x000110) 0x1403- f:00012 d: 3 | A = A + 3 (0x0003)
0x0089 (0x000112) 0x2908- f:00024 d: 264 | OR[264] = A
0x008A (0x000114) 0x3108- f:00030 d: 264 | A = (OR[264])
0x008B (0x000116) 0x2928- f:00024 d: 296 | OR[296] = A
0x008C (0x000118) 0x2127- f:00020 d: 295 | A = OR[295]
0x008D (0x00011A) 0x8402- f:00102 d: 2 | P = P + 2 (0x008F), A = 0
0x008E (0x00011C) 0x7006- f:00070 d: 6 | P = P + 6 (0x0094)
0x008F (0x00011E) 0x2128- f:00020 d: 296 | A = OR[296]
0x0090 (0x000120) 0x8402- f:00102 d: 2 | P = P + 2 (0x0092), A = 0
0x0091 (0x000122) 0x7003- f:00070 d: 3 | P = P + 3 (0x0094)
0x0092 (0x000124) 0x7C34- f:00076 d: 52 | R = OR[52]
0x0093 (0x000126) 0x0000- f:00000 d: 0 | PASS
0x0094 (0x000128) 0x2121- f:00020 d: 289 | A = OR[289]
0x0095 (0x00012A) 0x8402- f:00102 d: 2 | P = P + 2 (0x0097), A = 0
0x0096 (0x00012C) 0x7009- f:00070 d: 9 | P = P + 9 (0x009F)
0x0097 (0x00012E) 0x2122- f:00020 d: 290 | A = OR[290]
0x0098 (0x000130) 0x1E00-0x1000 f:00017 d: 0 | A = A - 4096 (0x1000)
0x009A (0x000134) 0x8002- f:00100 d: 2 | P = P + 2 (0x009C), C = 0
0x009B (0x000136) 0x7004- f:00070 d: 4 | P = P + 4 (0x009F)
0x009C (0x000138) 0x2122- f:00020 d: 290 | A = OR[290]
0x009D (0x00013A) 0x2929- f:00024 d: 297 | OR[297] = A
0x009E (0x00013C) 0x7004- f:00070 d: 4 | P = P + 4 (0x00A2)
0x009F (0x00013E) 0x1800-0x1000 f:00014 d: 0 | A = 4096 (0x1000)
0x00A1 (0x000142) 0x2929- f:00024 d: 297 | OR[297] = A
0x00A2 (0x000144) 0x1001- f:00010 d: 1 | A = 1 (0x0001)
0x00A3 (0x000146) 0x290F- f:00024 d: 271 | OR[271] = A
0x00A4 (0x000148) 0x2122- f:00020 d: 290 | A = OR[290]
0x00A5 (0x00014A) 0x2729- f:00023 d: 297 | A = A - OR[297]
0x00A6 (0x00014C) 0x2922- f:00024 d: 290 | OR[290] = A
0x00A7 (0x00014E) 0x8202- f:00101 d: 2 | P = P + 2 (0x00A9), C = 1
0x00A8 (0x000150) 0x2F21- f:00027 d: 289 | OR[289] = OR[289] - 1
0x00A9 (0x000152) 0x0810- f:00004 d: 16 | A = A > 16 (0x0010)
0x00AA (0x000154) 0x230F- f:00021 d: 271 | A = A & OR[271]
0x00AB (0x000156) 0x2129- f:00020 d: 297 | A = OR[297]
0x00AC (0x000158) 0x1408- f:00012 d: 8 | A = A + 8 (0x0008)
0x00AD (0x00015A) 0x1601- f:00013 d: 1 | A = A - 1 (0x0001)
0x00AE (0x00015C) 0x2929- f:00024 d: 297 | OR[297] = A
0x00AF (0x00015E) 0x2129- f:00020 d: 297 | A = OR[297]
0x00B0 (0x000160) 0x0803- f:00004 d: 3 | A = A > 3 (0x0003)
0x00B1 (0x000162) 0x2929- f:00024 d: 297 | OR[297] = A
0x00B2 (0x000164) 0x1025- f:00010 d: 37 | A = 37 (0x0025)
0x00B3 (0x000166) 0x292A- f:00024 d: 298 | OR[298] = A
0x00B4 (0x000168) 0x2123- f:00020 d: 291 | A = OR[291]
0x00B5 (0x00016A) 0x292B- f:00024 d: 299 | OR[299] = A
0x00B6 (0x00016C) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x00B7 (0x00016E) 0x292C- f:00024 d: 300 | OR[300] = A
0x00B8 (0x000170) 0x211F- f:00020 d: 287 | A = OR[287]
0x00B9 (0x000172) 0x292D- f:00024 d: 301 | OR[301] = A
0x00BA (0x000174) 0x2120- f:00020 d: 288 | A = OR[288]
0x00BB (0x000176) 0x292E- f:00024 d: 302 | OR[302] = A
0x00BC (0x000178) 0x2127- f:00020 d: 295 | A = OR[295]
0x00BD (0x00017A) 0x292F- f:00024 d: 303 | OR[303] = A
0x00BE (0x00017C) 0x2128- f:00020 d: 296 | A = OR[296]
0x00BF (0x00017E) 0x2930- f:00024 d: 304 | OR[304] = A
0x00C0 (0x000180) 0x2129- f:00020 d: 297 | A = OR[297]
0x00C1 (0x000182) 0x2931- f:00024 d: 305 | OR[305] = A
0x00C2 (0x000184) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x00C3 (0x000186) 0x2932- f:00024 d: 306 | OR[306] = A
0x00C4 (0x000188) 0x112A- f:00010 d: 298 | A = 298 (0x012A)
0x00C5 (0x00018A) 0x5800- f:00054 d: 0 | B = A
0x00C6 (0x00018C) 0x1800-0x2518 f:00014 d: 0 | A = 9496 (0x2518)
0x00C8 (0x000190) 0x7C09- f:00076 d: 9 | R = OR[9]
0x00C9 (0x000192) 0x2120- f:00020 d: 288 | A = OR[288]
0x00CA (0x000194) 0x2529- f:00022 d: 297 | A = A + OR[297]
0x00CB (0x000196) 0x2920- f:00024 d: 288 | OR[288] = A
0x00CC (0x000198) 0x8002- f:00100 d: 2 | P = P + 2 (0x00CE), C = 0
0x00CD (0x00019A) 0x2D1F- f:00026 d: 287 | OR[287] = OR[287] + 1
0x00CE (0x00019C) 0x1004- f:00010 d: 4 | A = 4 (0x0004)
0x00CF (0x00019E) 0x2B26- f:00025 d: 294 | OR[294] = A + OR[294]
0x00D0 (0x0001A0) 0x7253- f:00071 d: 83 | P = P - 83 (0x007D)
0x00D1 (0x0001A2) 0x741F- f:00072 d: 31 | R = P + 31 (0x00F0)
0x00D2 (0x0001A4) 0x742C- f:00072 d: 44 | R = P + 44 (0x00FE)
0x00D3 (0x0001A6) 0x72CF- f:00071 d: 207 | P = P - 207 (0x0004)
0x00D4 (0x0001A8) 0x742A- f:00072 d: 42 | R = P + 42 (0x00FE)
0x00D5 (0x0001AA) 0x102A- f:00010 d: 42 | A = 42 (0x002A)
0x00D6 (0x0001AC) 0x292A- f:00024 d: 298 | OR[298] = A
0x00D7 (0x0001AE) 0x112A- f:00010 d: 298 | A = 298 (0x012A)
0x00D8 (0x0001B0) 0x5800- f:00054 d: 0 | B = A
0x00D9 (0x0001B2) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x00DA (0x0001B4) 0x7C09- f:00076 d: 9 | R = OR[9]
0x00DB (0x0001B6) 0x101A- f:00010 d: 26 | A = 26 (0x001A)
0x00DC (0x0001B8) 0x292A- f:00024 d: 298 | OR[298] = A
0x00DD (0x0001BA) 0x111A- f:00010 d: 282 | A = 282 (0x011A)
0x00DE (0x0001BC) 0x292B- f:00024 d: 299 | OR[299] = A
0x00DF (0x0001BE) 0x112A- f:00010 d: 298 | A = 298 (0x012A)
0x00E0 (0x0001C0) 0x5800- f:00054 d: 0 | B = A
0x00E1 (0x0001C2) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x00E2 (0x0001C4) 0x7C09- f:00076 d: 9 | R = OR[9]
0x00E3 (0x0001C6) 0x8602- f:00103 d: 2 | P = P + 2 (0x00E5), A # 0
0x00E4 (0x0001C8) 0x700B- f:00070 d: 11 | P = P + 11 (0x00EF)
0x00E5 (0x0001CA) 0x1007- f:00010 d: 7 | A = 7 (0x0007)
0x00E6 (0x0001CC) 0x292A- f:00024 d: 298 | OR[298] = A
0x00E7 (0x0001CE) 0x1001- f:00010 d: 1 | A = 1 (0x0001)
0x00E8 (0x0001D0) 0x292B- f:00024 d: 299 | OR[299] = A
0x00E9 (0x0001D2) 0x112A- f:00010 d: 298 | A = 298 (0x012A)
0x00EA (0x0001D4) 0x5800- f:00054 d: 0 | B = A
0x00EB (0x0001D6) 0x1800-0x2518 f:00014 d: 0 | A = 9496 (0x2518)
0x00ED (0x0001DA) 0x7C09- f:00076 d: 9 | R = OR[9]
0x00EE (0x0001DC) 0x7213- f:00071 d: 19 | P = P - 19 (0x00DB)
0x00EF (0x0001DE) 0x0200- f:00001 d: 0 | EXIT
0x00F0 (0x0001E0) 0x211A- f:00020 d: 282 | A = OR[282]
0x00F1 (0x0001E2) 0x8602- f:00103 d: 2 | P = P + 2 (0x00F3), A # 0
0x00F2 (0x0001E4) 0x700B- f:00070 d: 11 | P = P + 11 (0x00FD)
0x00F3 (0x0001E6) 0x101B- f:00010 d: 27 | A = 27 (0x001B)
0x00F4 (0x0001E8) 0x292A- f:00024 d: 298 | OR[298] = A
0x00F5 (0x0001EA) 0x211A- f:00020 d: 282 | A = OR[282]
0x00F6 (0x0001EC) 0x292B- f:00024 d: 299 | OR[299] = A
0x00F7 (0x0001EE) 0x112A- f:00010 d: 298 | A = 298 (0x012A)
0x00F8 (0x0001F0) 0x5800- f:00054 d: 0 | B = A
0x00F9 (0x0001F2) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x00FA (0x0001F4) 0x7C09- f:00076 d: 9 | R = OR[9]
0x00FB (0x0001F6) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x00FC (0x0001F8) 0x291A- f:00024 d: 282 | OR[282] = A
0x00FD (0x0001FA) 0x0200- f:00001 d: 0 | EXIT
0x00FE (0x0001FC) 0x100F- f:00010 d: 15 | A = 15 (0x000F)
0x00FF (0x0001FE) 0x292A- f:00024 d: 298 | OR[298] = A
0x0100 (0x000200) 0x211B- f:00020 d: 283 | A = OR[283]
0x0101 (0x000202) 0x292B- f:00024 d: 299 | OR[299] = A
0x0102 (0x000204) 0x2119- f:00020 d: 281 | A = OR[281]
0x0103 (0x000206) 0x292C- f:00024 d: 300 | OR[300] = A
0x0104 (0x000208) 0x112A- f:00010 d: 298 | A = 298 (0x012A)
0x0105 (0x00020A) 0x5800- f:00054 d: 0 | B = A
0x0106 (0x00020C) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x0107 (0x00020E) 0x7C09- f:00076 d: 9 | R = OR[9]
0x0108 (0x000210) 0x0200- f:00001 d: 0 | EXIT
0x0109 (0x000212) 0x0000- f:00000 d: 0 | PASS
0x010A (0x000214) 0x0000- f:00000 d: 0 | PASS
0x010B (0x000216) 0x0000- f:00000 d: 0 | PASS
|
; A169498: Number of reduced words of length n in Coxeter group on 5 generators S_i with relations (S_i)^2 = (S_i S_j)^34 = I.
; 1,5,20,80,320,1280,5120,20480,81920,327680,1310720,5242880,20971520,83886080,335544320,1342177280,5368709120,21474836480,85899345920,343597383680,1374389534720,5497558138880,21990232555520,87960930222080
mov $1,4
pow $1,$0
mul $1,5
div $1,4
mov $0,$1
|
; A189662: Positions of 0 in A189661; complement of A026356.
; 1,3,5,6,8,10,11,13,14,16,18,19,21,23,24,26,27,29,31,32,34,35,37,39,40,42,44,45,47,48,50,52,53,55,57,58,60,61,63,65,66,68,69,71,73,74,76,78,79,81,82,84,86,87,89,90,92,94,95,97,99,100,102,103,105,107,108,110,112,113,115,116,118,120,121,123,124,126,128,129,131,133,134,136,137,139,141,142,144
mov $1,$0
mov $2,$0
pow $2,2
lpb $2,1
add $0,2
add $1,1
add $2,1
trn $2,$0
lpe
add $1,1
|
//===- MemoryBuiltins.cpp - Identify calls to memory builtins -------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This family of functions identifies calls to builtin functions that allocate
// or free memory.
//
//===----------------------------------------------------------------------===//
#include "llvm/Analysis/MemoryBuiltins.h"
#include "llvm/ADT/APInt.h"
#include "llvm/ADT/None.h"
#include "llvm/ADT/Optional.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Analysis/TargetFolder.h"
#include "llvm/Analysis/TargetLibraryInfo.h"
#include "llvm/Analysis/Utils/Local.h"
#include "llvm/Analysis/ValueTracking.h"
#include "llvm/IR/Argument.h"
#include "llvm/IR/Attributes.h"
#include "llvm/IR/Constants.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/IR/DerivedTypes.h"
#include "llvm/IR/Function.h"
#include "llvm/IR/GlobalAlias.h"
#include "llvm/IR/GlobalVariable.h"
#include "llvm/IR/Instruction.h"
#include "llvm/IR/Instructions.h"
#include "llvm/IR/IntrinsicInst.h"
#include "llvm/IR/Operator.h"
#include "llvm/IR/Type.h"
#include "llvm/IR/Value.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
#include <cassert>
#include <cstdint>
#include <iterator>
#include <utility>
using namespace llvm;
#define DEBUG_TYPE "memory-builtins"
enum AllocType : uint8_t {
OpNewLike = 1<<0, // allocates; never returns null
MallocLike = 1<<1 | OpNewLike, // allocates; may return null
AlignedAllocLike = 1<<2, // allocates with alignment; may return null
CallocLike = 1<<3, // allocates + bzero
ReallocLike = 1<<4, // reallocates
StrDupLike = 1<<5,
MallocOrCallocLike = MallocLike | CallocLike | AlignedAllocLike,
AllocLike = MallocOrCallocLike | StrDupLike,
AnyAlloc = AllocLike | ReallocLike
};
struct AllocFnsTy {
AllocType AllocTy;
unsigned NumParams;
// First and Second size parameters (or -1 if unused)
int FstParam, SndParam;
};
// FIXME: certain users need more information. E.g., SimplifyLibCalls needs to
// know which functions are nounwind, noalias, nocapture parameters, etc.
static const std::pair<LibFunc, AllocFnsTy> AllocationFnData[] = {
{LibFunc_malloc, {MallocLike, 1, 0, -1}},
{LibFunc_vec_malloc, {MallocLike, 1, 0, -1}},
{LibFunc_valloc, {MallocLike, 1, 0, -1}},
{LibFunc_Znwj, {OpNewLike, 1, 0, -1}}, // new(unsigned int)
{LibFunc_ZnwjRKSt9nothrow_t, {MallocLike, 2, 0, -1}}, // new(unsigned int, nothrow)
{LibFunc_ZnwjSt11align_val_t, {OpNewLike, 2, 0, -1}}, // new(unsigned int, align_val_t)
{LibFunc_ZnwjSt11align_val_tRKSt9nothrow_t, // new(unsigned int, align_val_t, nothrow)
{MallocLike, 3, 0, -1}},
{LibFunc_Znwm, {OpNewLike, 1, 0, -1}}, // new(unsigned long)
{LibFunc_ZnwmRKSt9nothrow_t, {MallocLike, 2, 0, -1}}, // new(unsigned long, nothrow)
{LibFunc_ZnwmSt11align_val_t, {OpNewLike, 2, 0, -1}}, // new(unsigned long, align_val_t)
{LibFunc_ZnwmSt11align_val_tRKSt9nothrow_t, // new(unsigned long, align_val_t, nothrow)
{MallocLike, 3, 0, -1}},
{LibFunc_Znaj, {OpNewLike, 1, 0, -1}}, // new[](unsigned int)
{LibFunc_ZnajRKSt9nothrow_t, {MallocLike, 2, 0, -1}}, // new[](unsigned int, nothrow)
{LibFunc_ZnajSt11align_val_t, {OpNewLike, 2, 0, -1}}, // new[](unsigned int, align_val_t)
{LibFunc_ZnajSt11align_val_tRKSt9nothrow_t, // new[](unsigned int, align_val_t, nothrow)
{MallocLike, 3, 0, -1}},
{LibFunc_Znam, {OpNewLike, 1, 0, -1}}, // new[](unsigned long)
{LibFunc_ZnamRKSt9nothrow_t, {MallocLike, 2, 0, -1}}, // new[](unsigned long, nothrow)
{LibFunc_ZnamSt11align_val_t, {OpNewLike, 2, 0, -1}}, // new[](unsigned long, align_val_t)
{LibFunc_ZnamSt11align_val_tRKSt9nothrow_t, // new[](unsigned long, align_val_t, nothrow)
{MallocLike, 3, 0, -1}},
{LibFunc_msvc_new_int, {OpNewLike, 1, 0, -1}}, // new(unsigned int)
{LibFunc_msvc_new_int_nothrow, {MallocLike, 2, 0, -1}}, // new(unsigned int, nothrow)
{LibFunc_msvc_new_longlong, {OpNewLike, 1, 0, -1}}, // new(unsigned long long)
{LibFunc_msvc_new_longlong_nothrow, {MallocLike, 2, 0, -1}}, // new(unsigned long long, nothrow)
{LibFunc_msvc_new_array_int, {OpNewLike, 1, 0, -1}}, // new[](unsigned int)
{LibFunc_msvc_new_array_int_nothrow, {MallocLike, 2, 0, -1}}, // new[](unsigned int, nothrow)
{LibFunc_msvc_new_array_longlong, {OpNewLike, 1, 0, -1}}, // new[](unsigned long long)
{LibFunc_msvc_new_array_longlong_nothrow, {MallocLike, 2, 0, -1}}, // new[](unsigned long long, nothrow)
{LibFunc_aligned_alloc, {AlignedAllocLike, 2, 1, -1}},
{LibFunc_memalign, {AlignedAllocLike, 2, 1, -1}},
{LibFunc_calloc, {CallocLike, 2, 0, 1}},
{LibFunc_vec_calloc, {CallocLike, 2, 0, 1}},
{LibFunc_realloc, {ReallocLike, 2, 1, -1}},
{LibFunc_vec_realloc, {ReallocLike, 2, 1, -1}},
{LibFunc_reallocf, {ReallocLike, 2, 1, -1}},
{LibFunc_strdup, {StrDupLike, 1, -1, -1}},
{LibFunc_strndup, {StrDupLike, 2, 1, -1}},
{LibFunc___kmpc_alloc_shared, {MallocLike, 1, 0, -1}},
// TODO: Handle "int posix_memalign(void **, size_t, size_t)"
};
static const Function *getCalledFunction(const Value *V, bool LookThroughBitCast,
bool &IsNoBuiltin) {
// Don't care about intrinsics in this case.
if (isa<IntrinsicInst>(V))
return nullptr;
if (LookThroughBitCast)
V = V->stripPointerCasts();
const auto *CB = dyn_cast<CallBase>(V);
if (!CB)
return nullptr;
IsNoBuiltin = CB->isNoBuiltin();
if (const Function *Callee = CB->getCalledFunction())
return Callee;
return nullptr;
}
/// Returns the allocation data for the given value if it's a call to a known
/// allocation function.
static Optional<AllocFnsTy>
getAllocationDataForFunction(const Function *Callee, AllocType AllocTy,
const TargetLibraryInfo *TLI) {
// Make sure that the function is available.
LibFunc TLIFn;
if (!TLI || !TLI->getLibFunc(*Callee, TLIFn) || !TLI->has(TLIFn))
return None;
const auto *Iter = find_if(
AllocationFnData, [TLIFn](const std::pair<LibFunc, AllocFnsTy> &P) {
return P.first == TLIFn;
});
if (Iter == std::end(AllocationFnData))
return None;
const AllocFnsTy *FnData = &Iter->second;
if ((FnData->AllocTy & AllocTy) != FnData->AllocTy)
return None;
// Check function prototype.
int FstParam = FnData->FstParam;
int SndParam = FnData->SndParam;
FunctionType *FTy = Callee->getFunctionType();
if (FTy->getReturnType() == Type::getInt8PtrTy(FTy->getContext()) &&
FTy->getNumParams() == FnData->NumParams &&
(FstParam < 0 ||
(FTy->getParamType(FstParam)->isIntegerTy(32) ||
FTy->getParamType(FstParam)->isIntegerTy(64))) &&
(SndParam < 0 ||
FTy->getParamType(SndParam)->isIntegerTy(32) ||
FTy->getParamType(SndParam)->isIntegerTy(64)))
return *FnData;
return None;
}
static Optional<AllocFnsTy> getAllocationData(const Value *V, AllocType AllocTy,
const TargetLibraryInfo *TLI,
bool LookThroughBitCast = false) {
bool IsNoBuiltinCall;
if (const Function *Callee =
getCalledFunction(V, LookThroughBitCast, IsNoBuiltinCall))
if (!IsNoBuiltinCall)
return getAllocationDataForFunction(Callee, AllocTy, TLI);
return None;
}
static Optional<AllocFnsTy>
getAllocationData(const Value *V, AllocType AllocTy,
function_ref<const TargetLibraryInfo &(Function &)> GetTLI,
bool LookThroughBitCast = false) {
bool IsNoBuiltinCall;
if (const Function *Callee =
getCalledFunction(V, LookThroughBitCast, IsNoBuiltinCall))
if (!IsNoBuiltinCall)
return getAllocationDataForFunction(
Callee, AllocTy, &GetTLI(const_cast<Function &>(*Callee)));
return None;
}
static Optional<AllocFnsTy> getAllocationSize(const Value *V,
const TargetLibraryInfo *TLI) {
bool IsNoBuiltinCall;
const Function *Callee =
getCalledFunction(V, /*LookThroughBitCast=*/false, IsNoBuiltinCall);
if (!Callee)
return None;
// Prefer to use existing information over allocsize. This will give us an
// accurate AllocTy.
if (!IsNoBuiltinCall)
if (Optional<AllocFnsTy> Data =
getAllocationDataForFunction(Callee, AnyAlloc, TLI))
return Data;
Attribute Attr = Callee->getFnAttribute(Attribute::AllocSize);
if (Attr == Attribute())
return None;
std::pair<unsigned, Optional<unsigned>> Args = Attr.getAllocSizeArgs();
AllocFnsTy Result;
// Because allocsize only tells us how many bytes are allocated, we're not
// really allowed to assume anything, so we use MallocLike.
Result.AllocTy = MallocLike;
Result.NumParams = Callee->getNumOperands();
Result.FstParam = Args.first;
Result.SndParam = Args.second.getValueOr(-1);
return Result;
}
static bool hasNoAliasAttr(const Value *V, bool LookThroughBitCast) {
const auto *CB =
dyn_cast<CallBase>(LookThroughBitCast ? V->stripPointerCasts() : V);
return CB && CB->hasRetAttr(Attribute::NoAlias);
}
/// Tests if a value is a call or invoke to a library function that
/// allocates or reallocates memory (either malloc, calloc, realloc, or strdup
/// like).
bool llvm::isAllocationFn(const Value *V, const TargetLibraryInfo *TLI,
bool LookThroughBitCast) {
return getAllocationData(V, AnyAlloc, TLI, LookThroughBitCast).hasValue();
}
bool llvm::isAllocationFn(
const Value *V, function_ref<const TargetLibraryInfo &(Function &)> GetTLI,
bool LookThroughBitCast) {
return getAllocationData(V, AnyAlloc, GetTLI, LookThroughBitCast).hasValue();
}
/// Tests if a value is a call or invoke to a function that returns a
/// NoAlias pointer (including malloc/calloc/realloc/strdup-like functions).
bool llvm::isNoAliasFn(const Value *V, const TargetLibraryInfo *TLI,
bool LookThroughBitCast) {
// it's safe to consider realloc as noalias since accessing the original
// pointer is undefined behavior
return isAllocationFn(V, TLI, LookThroughBitCast) ||
hasNoAliasAttr(V, LookThroughBitCast);
}
/// Tests if a value is a call or invoke to a library function that
/// allocates uninitialized memory (such as malloc).
bool llvm::isMallocLikeFn(const Value *V, const TargetLibraryInfo *TLI,
bool LookThroughBitCast) {
return getAllocationData(V, MallocLike, TLI, LookThroughBitCast).hasValue();
}
bool llvm::isMallocLikeFn(
const Value *V, function_ref<const TargetLibraryInfo &(Function &)> GetTLI,
bool LookThroughBitCast) {
return getAllocationData(V, MallocLike, GetTLI, LookThroughBitCast)
.hasValue();
}
/// Tests if a value is a call or invoke to a library function that
/// allocates uninitialized memory with alignment (such as aligned_alloc).
bool llvm::isAlignedAllocLikeFn(const Value *V, const TargetLibraryInfo *TLI,
bool LookThroughBitCast) {
return getAllocationData(V, AlignedAllocLike, TLI, LookThroughBitCast)
.hasValue();
}
bool llvm::isAlignedAllocLikeFn(
const Value *V, function_ref<const TargetLibraryInfo &(Function &)> GetTLI,
bool LookThroughBitCast) {
return getAllocationData(V, AlignedAllocLike, GetTLI, LookThroughBitCast)
.hasValue();
}
/// Tests if a value is a call or invoke to a library function that
/// allocates zero-filled memory (such as calloc).
bool llvm::isCallocLikeFn(const Value *V, const TargetLibraryInfo *TLI,
bool LookThroughBitCast) {
return getAllocationData(V, CallocLike, TLI, LookThroughBitCast).hasValue();
}
/// Tests if a value is a call or invoke to a library function that
/// allocates memory similar to malloc or calloc.
bool llvm::isMallocOrCallocLikeFn(const Value *V, const TargetLibraryInfo *TLI,
bool LookThroughBitCast) {
return getAllocationData(V, MallocOrCallocLike, TLI,
LookThroughBitCast).hasValue();
}
/// Tests if a value is a call or invoke to a library function that
/// allocates memory (either malloc, calloc, or strdup like).
bool llvm::isAllocLikeFn(const Value *V, const TargetLibraryInfo *TLI,
bool LookThroughBitCast) {
return getAllocationData(V, AllocLike, TLI, LookThroughBitCast).hasValue();
}
/// Tests if a value is a call or invoke to a library function that
/// reallocates memory (e.g., realloc).
bool llvm::isReallocLikeFn(const Value *V, const TargetLibraryInfo *TLI,
bool LookThroughBitCast) {
return getAllocationData(V, ReallocLike, TLI, LookThroughBitCast).hasValue();
}
/// Tests if a functions is a call or invoke to a library function that
/// reallocates memory (e.g., realloc).
bool llvm::isReallocLikeFn(const Function *F, const TargetLibraryInfo *TLI) {
return getAllocationDataForFunction(F, ReallocLike, TLI).hasValue();
}
/// Tests if a value is a call or invoke to a library function that
/// allocates memory and throws if an allocation failed (e.g., new).
bool llvm::isOpNewLikeFn(const Value *V, const TargetLibraryInfo *TLI,
bool LookThroughBitCast) {
return getAllocationData(V, OpNewLike, TLI, LookThroughBitCast).hasValue();
}
/// Tests if a value is a call or invoke to a library function that
/// allocates memory (strdup, strndup).
bool llvm::isStrdupLikeFn(const Value *V, const TargetLibraryInfo *TLI,
bool LookThroughBitCast) {
return getAllocationData(V, StrDupLike, TLI, LookThroughBitCast).hasValue();
}
/// extractMallocCall - Returns the corresponding CallInst if the instruction
/// is a malloc call. Since CallInst::CreateMalloc() only creates calls, we
/// ignore InvokeInst here.
const CallInst *llvm::extractMallocCall(
const Value *I,
function_ref<const TargetLibraryInfo &(Function &)> GetTLI) {
return isMallocLikeFn(I, GetTLI) ? dyn_cast<CallInst>(I) : nullptr;
}
static Value *computeArraySize(const CallInst *CI, const DataLayout &DL,
const TargetLibraryInfo *TLI,
bool LookThroughSExt = false) {
if (!CI)
return nullptr;
// The size of the malloc's result type must be known to determine array size.
Type *T = getMallocAllocatedType(CI, TLI);
if (!T || !T->isSized())
return nullptr;
unsigned ElementSize = DL.getTypeAllocSize(T);
if (StructType *ST = dyn_cast<StructType>(T))
ElementSize = DL.getStructLayout(ST)->getSizeInBytes();
// If malloc call's arg can be determined to be a multiple of ElementSize,
// return the multiple. Otherwise, return NULL.
Value *MallocArg = CI->getArgOperand(0);
Value *Multiple = nullptr;
if (ComputeMultiple(MallocArg, ElementSize, Multiple, LookThroughSExt))
return Multiple;
return nullptr;
}
/// getMallocType - Returns the PointerType resulting from the malloc call.
/// The PointerType depends on the number of bitcast uses of the malloc call:
/// 0: PointerType is the calls' return type.
/// 1: PointerType is the bitcast's result type.
/// >1: Unique PointerType cannot be determined, return NULL.
PointerType *llvm::getMallocType(const CallInst *CI,
const TargetLibraryInfo *TLI) {
assert(isMallocLikeFn(CI, TLI) && "getMallocType and not malloc call");
PointerType *MallocType = nullptr;
unsigned NumOfBitCastUses = 0;
// Determine if CallInst has a bitcast use.
for (const User *U : CI->users())
if (const BitCastInst *BCI = dyn_cast<BitCastInst>(U)) {
MallocType = cast<PointerType>(BCI->getDestTy());
NumOfBitCastUses++;
}
// Malloc call has 1 bitcast use, so type is the bitcast's destination type.
if (NumOfBitCastUses == 1)
return MallocType;
// Malloc call was not bitcast, so type is the malloc function's return type.
if (NumOfBitCastUses == 0)
return cast<PointerType>(CI->getType());
// Type could not be determined.
return nullptr;
}
/// getMallocAllocatedType - Returns the Type allocated by malloc call.
/// The Type depends on the number of bitcast uses of the malloc call:
/// 0: PointerType is the malloc calls' return type.
/// 1: PointerType is the bitcast's result type.
/// >1: Unique PointerType cannot be determined, return NULL.
Type *llvm::getMallocAllocatedType(const CallInst *CI,
const TargetLibraryInfo *TLI) {
PointerType *PT = getMallocType(CI, TLI);
return PT ? PT->getElementType() : nullptr;
}
/// getMallocArraySize - Returns the array size of a malloc call. If the
/// argument passed to malloc is a multiple of the size of the malloced type,
/// then return that multiple. For non-array mallocs, the multiple is
/// constant 1. Otherwise, return NULL for mallocs whose array size cannot be
/// determined.
Value *llvm::getMallocArraySize(CallInst *CI, const DataLayout &DL,
const TargetLibraryInfo *TLI,
bool LookThroughSExt) {
assert(isMallocLikeFn(CI, TLI) && "getMallocArraySize and not malloc call");
return computeArraySize(CI, DL, TLI, LookThroughSExt);
}
/// extractCallocCall - Returns the corresponding CallInst if the instruction
/// is a calloc call.
const CallInst *llvm::extractCallocCall(const Value *I,
const TargetLibraryInfo *TLI) {
return isCallocLikeFn(I, TLI) ? cast<CallInst>(I) : nullptr;
}
/// isLibFreeFunction - Returns true if the function is a builtin free()
bool llvm::isLibFreeFunction(const Function *F, const LibFunc TLIFn) {
unsigned ExpectedNumParams;
if (TLIFn == LibFunc_free ||
TLIFn == LibFunc_ZdlPv || // operator delete(void*)
TLIFn == LibFunc_ZdaPv || // operator delete[](void*)
TLIFn == LibFunc_msvc_delete_ptr32 || // operator delete(void*)
TLIFn == LibFunc_msvc_delete_ptr64 || // operator delete(void*)
TLIFn == LibFunc_msvc_delete_array_ptr32 || // operator delete[](void*)
TLIFn == LibFunc_msvc_delete_array_ptr64) // operator delete[](void*)
ExpectedNumParams = 1;
else if (TLIFn == LibFunc_ZdlPvj || // delete(void*, uint)
TLIFn == LibFunc_ZdlPvm || // delete(void*, ulong)
TLIFn == LibFunc_ZdlPvRKSt9nothrow_t || // delete(void*, nothrow)
TLIFn == LibFunc_ZdlPvSt11align_val_t || // delete(void*, align_val_t)
TLIFn == LibFunc_ZdaPvj || // delete[](void*, uint)
TLIFn == LibFunc_ZdaPvm || // delete[](void*, ulong)
TLIFn == LibFunc_ZdaPvRKSt9nothrow_t || // delete[](void*, nothrow)
TLIFn == LibFunc_ZdaPvSt11align_val_t || // delete[](void*, align_val_t)
TLIFn == LibFunc_msvc_delete_ptr32_int || // delete(void*, uint)
TLIFn == LibFunc_msvc_delete_ptr64_longlong || // delete(void*, ulonglong)
TLIFn == LibFunc_msvc_delete_ptr32_nothrow || // delete(void*, nothrow)
TLIFn == LibFunc_msvc_delete_ptr64_nothrow || // delete(void*, nothrow)
TLIFn == LibFunc_msvc_delete_array_ptr32_int || // delete[](void*, uint)
TLIFn == LibFunc_msvc_delete_array_ptr64_longlong || // delete[](void*, ulonglong)
TLIFn == LibFunc_msvc_delete_array_ptr32_nothrow || // delete[](void*, nothrow)
TLIFn == LibFunc_msvc_delete_array_ptr64_nothrow || // delete[](void*, nothrow)
TLIFn == LibFunc___kmpc_free_shared) // OpenMP Offloading RTL free
ExpectedNumParams = 2;
else if (TLIFn == LibFunc_ZdaPvSt11align_val_tRKSt9nothrow_t || // delete(void*, align_val_t, nothrow)
TLIFn == LibFunc_ZdlPvSt11align_val_tRKSt9nothrow_t || // delete[](void*, align_val_t, nothrow)
TLIFn == LibFunc_ZdlPvjSt11align_val_t || // delete(void*, unsigned long, align_val_t)
TLIFn == LibFunc_ZdlPvmSt11align_val_t || // delete(void*, unsigned long, align_val_t)
TLIFn == LibFunc_ZdaPvjSt11align_val_t || // delete[](void*, unsigned int, align_val_t)
TLIFn == LibFunc_ZdaPvmSt11align_val_t) // delete[](void*, unsigned long, align_val_t)
ExpectedNumParams = 3;
else
return false;
// Check free prototype.
// FIXME: workaround for PR5130, this will be obsolete when a nobuiltin
// attribute will exist.
FunctionType *FTy = F->getFunctionType();
if (!FTy->getReturnType()->isVoidTy())
return false;
if (FTy->getNumParams() != ExpectedNumParams)
return false;
if (FTy->getParamType(0) != Type::getInt8PtrTy(F->getContext()))
return false;
return true;
}
/// isFreeCall - Returns non-null if the value is a call to the builtin free()
const CallInst *llvm::isFreeCall(const Value *I, const TargetLibraryInfo *TLI) {
bool IsNoBuiltinCall;
const Function *Callee =
getCalledFunction(I, /*LookThroughBitCast=*/false, IsNoBuiltinCall);
if (Callee == nullptr || IsNoBuiltinCall)
return nullptr;
LibFunc TLIFn;
if (!TLI || !TLI->getLibFunc(*Callee, TLIFn) || !TLI->has(TLIFn))
return nullptr;
return isLibFreeFunction(Callee, TLIFn) ? dyn_cast<CallInst>(I) : nullptr;
}
//===----------------------------------------------------------------------===//
// Utility functions to compute size of objects.
//
static APInt getSizeWithOverflow(const SizeOffsetType &Data) {
if (Data.second.isNegative() || Data.first.ult(Data.second))
return APInt(Data.first.getBitWidth(), 0);
return Data.first - Data.second;
}
/// Compute the size of the object pointed by Ptr. Returns true and the
/// object size in Size if successful, and false otherwise.
/// If RoundToAlign is true, then Size is rounded up to the alignment of
/// allocas, byval arguments, and global variables.
bool llvm::getObjectSize(const Value *Ptr, uint64_t &Size, const DataLayout &DL,
const TargetLibraryInfo *TLI, ObjectSizeOpts Opts) {
ObjectSizeOffsetVisitor Visitor(DL, TLI, Ptr->getContext(), Opts);
SizeOffsetType Data = Visitor.compute(const_cast<Value*>(Ptr));
if (!Visitor.bothKnown(Data))
return false;
Size = getSizeWithOverflow(Data).getZExtValue();
return true;
}
Value *llvm::lowerObjectSizeCall(IntrinsicInst *ObjectSize,
const DataLayout &DL,
const TargetLibraryInfo *TLI,
bool MustSucceed) {
assert(ObjectSize->getIntrinsicID() == Intrinsic::objectsize &&
"ObjectSize must be a call to llvm.objectsize!");
bool MaxVal = cast<ConstantInt>(ObjectSize->getArgOperand(1))->isZero();
ObjectSizeOpts EvalOptions;
// Unless we have to fold this to something, try to be as accurate as
// possible.
if (MustSucceed)
EvalOptions.EvalMode =
MaxVal ? ObjectSizeOpts::Mode::Max : ObjectSizeOpts::Mode::Min;
else
EvalOptions.EvalMode = ObjectSizeOpts::Mode::Exact;
EvalOptions.NullIsUnknownSize =
cast<ConstantInt>(ObjectSize->getArgOperand(2))->isOne();
auto *ResultType = cast<IntegerType>(ObjectSize->getType());
bool StaticOnly = cast<ConstantInt>(ObjectSize->getArgOperand(3))->isZero();
if (StaticOnly) {
// FIXME: Does it make sense to just return a failure value if the size won't
// fit in the output and `!MustSucceed`?
uint64_t Size;
if (getObjectSize(ObjectSize->getArgOperand(0), Size, DL, TLI, EvalOptions) &&
isUIntN(ResultType->getBitWidth(), Size))
return ConstantInt::get(ResultType, Size);
} else {
LLVMContext &Ctx = ObjectSize->getFunction()->getContext();
ObjectSizeOffsetEvaluator Eval(DL, TLI, Ctx, EvalOptions);
SizeOffsetEvalType SizeOffsetPair =
Eval.compute(ObjectSize->getArgOperand(0));
if (SizeOffsetPair != ObjectSizeOffsetEvaluator::unknown()) {
IRBuilder<TargetFolder> Builder(Ctx, TargetFolder(DL));
Builder.SetInsertPoint(ObjectSize);
// If we've outside the end of the object, then we can always access
// exactly 0 bytes.
Value *ResultSize =
Builder.CreateSub(SizeOffsetPair.first, SizeOffsetPair.second);
Value *UseZero =
Builder.CreateICmpULT(SizeOffsetPair.first, SizeOffsetPair.second);
ResultSize = Builder.CreateZExtOrTrunc(ResultSize, ResultType);
Value *Ret = Builder.CreateSelect(
UseZero, ConstantInt::get(ResultType, 0), ResultSize);
// The non-constant size expression cannot evaluate to -1.
if (!isa<Constant>(SizeOffsetPair.first) ||
!isa<Constant>(SizeOffsetPair.second))
Builder.CreateAssumption(
Builder.CreateICmpNE(Ret, ConstantInt::get(ResultType, -1)));
return Ret;
}
}
if (!MustSucceed)
return nullptr;
return ConstantInt::get(ResultType, MaxVal ? -1ULL : 0);
}
STATISTIC(ObjectVisitorArgument,
"Number of arguments with unsolved size and offset");
STATISTIC(ObjectVisitorLoad,
"Number of load instructions with unsolved size and offset");
APInt ObjectSizeOffsetVisitor::align(APInt Size, MaybeAlign Alignment) {
if (Options.RoundToAlign && Alignment)
return APInt(IntTyBits, alignTo(Size.getZExtValue(), Alignment));
return Size;
}
ObjectSizeOffsetVisitor::ObjectSizeOffsetVisitor(const DataLayout &DL,
const TargetLibraryInfo *TLI,
LLVMContext &Context,
ObjectSizeOpts Options)
: DL(DL), TLI(TLI), Options(Options) {
// Pointer size must be rechecked for each object visited since it could have
// a different address space.
}
SizeOffsetType ObjectSizeOffsetVisitor::compute(Value *V) {
IntTyBits = DL.getIndexTypeSizeInBits(V->getType());
Zero = APInt::getZero(IntTyBits);
V = V->stripPointerCasts();
if (Instruction *I = dyn_cast<Instruction>(V)) {
// If we have already seen this instruction, bail out. Cycles can happen in
// unreachable code after constant propagation.
if (!SeenInsts.insert(I).second)
return unknown();
if (GEPOperator *GEP = dyn_cast<GEPOperator>(V))
return visitGEPOperator(*GEP);
return visit(*I);
}
if (Argument *A = dyn_cast<Argument>(V))
return visitArgument(*A);
if (ConstantPointerNull *P = dyn_cast<ConstantPointerNull>(V))
return visitConstantPointerNull(*P);
if (GlobalAlias *GA = dyn_cast<GlobalAlias>(V))
return visitGlobalAlias(*GA);
if (GlobalVariable *GV = dyn_cast<GlobalVariable>(V))
return visitGlobalVariable(*GV);
if (UndefValue *UV = dyn_cast<UndefValue>(V))
return visitUndefValue(*UV);
if (ConstantExpr *CE = dyn_cast<ConstantExpr>(V)) {
if (CE->getOpcode() == Instruction::IntToPtr)
return unknown(); // clueless
if (CE->getOpcode() == Instruction::GetElementPtr)
return visitGEPOperator(cast<GEPOperator>(*CE));
}
LLVM_DEBUG(dbgs() << "ObjectSizeOffsetVisitor::compute() unhandled value: "
<< *V << '\n');
return unknown();
}
/// When we're compiling N-bit code, and the user uses parameters that are
/// greater than N bits (e.g. uint64_t on a 32-bit build), we can run into
/// trouble with APInt size issues. This function handles resizing + overflow
/// checks for us. Check and zext or trunc \p I depending on IntTyBits and
/// I's value.
bool ObjectSizeOffsetVisitor::CheckedZextOrTrunc(APInt &I) {
// More bits than we can handle. Checking the bit width isn't necessary, but
// it's faster than checking active bits, and should give `false` in the
// vast majority of cases.
if (I.getBitWidth() > IntTyBits && I.getActiveBits() > IntTyBits)
return false;
if (I.getBitWidth() != IntTyBits)
I = I.zextOrTrunc(IntTyBits);
return true;
}
SizeOffsetType ObjectSizeOffsetVisitor::visitAllocaInst(AllocaInst &I) {
if (!I.getAllocatedType()->isSized())
return unknown();
if (isa<ScalableVectorType>(I.getAllocatedType()))
return unknown();
APInt Size(IntTyBits, DL.getTypeAllocSize(I.getAllocatedType()));
if (!I.isArrayAllocation())
return std::make_pair(align(Size, I.getAlign()), Zero);
Value *ArraySize = I.getArraySize();
if (const ConstantInt *C = dyn_cast<ConstantInt>(ArraySize)) {
APInt NumElems = C->getValue();
if (!CheckedZextOrTrunc(NumElems))
return unknown();
bool Overflow;
Size = Size.umul_ov(NumElems, Overflow);
return Overflow ? unknown()
: std::make_pair(align(Size, I.getAlign()), Zero);
}
return unknown();
}
SizeOffsetType ObjectSizeOffsetVisitor::visitArgument(Argument &A) {
Type *MemoryTy = A.getPointeeInMemoryValueType();
// No interprocedural analysis is done at the moment.
if (!MemoryTy|| !MemoryTy->isSized()) {
++ObjectVisitorArgument;
return unknown();
}
APInt Size(IntTyBits, DL.getTypeAllocSize(MemoryTy));
return std::make_pair(align(Size, A.getParamAlign()), Zero);
}
SizeOffsetType ObjectSizeOffsetVisitor::visitCallBase(CallBase &CB) {
Optional<AllocFnsTy> FnData = getAllocationSize(&CB, TLI);
if (!FnData)
return unknown();
// Handle strdup-like functions separately.
if (FnData->AllocTy == StrDupLike) {
APInt Size(IntTyBits, GetStringLength(CB.getArgOperand(0)));
if (!Size)
return unknown();
// Strndup limits strlen.
if (FnData->FstParam > 0) {
ConstantInt *Arg =
dyn_cast<ConstantInt>(CB.getArgOperand(FnData->FstParam));
if (!Arg)
return unknown();
APInt MaxSize = Arg->getValue().zextOrSelf(IntTyBits);
if (Size.ugt(MaxSize))
Size = MaxSize + 1;
}
return std::make_pair(Size, Zero);
}
ConstantInt *Arg = dyn_cast<ConstantInt>(CB.getArgOperand(FnData->FstParam));
if (!Arg)
return unknown();
APInt Size = Arg->getValue();
if (!CheckedZextOrTrunc(Size))
return unknown();
// Size is determined by just 1 parameter.
if (FnData->SndParam < 0)
return std::make_pair(Size, Zero);
Arg = dyn_cast<ConstantInt>(CB.getArgOperand(FnData->SndParam));
if (!Arg)
return unknown();
APInt NumElems = Arg->getValue();
if (!CheckedZextOrTrunc(NumElems))
return unknown();
bool Overflow;
Size = Size.umul_ov(NumElems, Overflow);
return Overflow ? unknown() : std::make_pair(Size, Zero);
// TODO: handle more standard functions (+ wchar cousins):
// - strdup / strndup
// - strcpy / strncpy
// - strcat / strncat
// - memcpy / memmove
// - strcat / strncat
// - memset
}
SizeOffsetType
ObjectSizeOffsetVisitor::visitConstantPointerNull(ConstantPointerNull& CPN) {
// If null is unknown, there's nothing we can do. Additionally, non-zero
// address spaces can make use of null, so we don't presume to know anything
// about that.
//
// TODO: How should this work with address space casts? We currently just drop
// them on the floor, but it's unclear what we should do when a NULL from
// addrspace(1) gets casted to addrspace(0) (or vice-versa).
if (Options.NullIsUnknownSize || CPN.getType()->getAddressSpace())
return unknown();
return std::make_pair(Zero, Zero);
}
SizeOffsetType
ObjectSizeOffsetVisitor::visitExtractElementInst(ExtractElementInst&) {
return unknown();
}
SizeOffsetType
ObjectSizeOffsetVisitor::visitExtractValueInst(ExtractValueInst&) {
// Easy cases were already folded by previous passes.
return unknown();
}
SizeOffsetType ObjectSizeOffsetVisitor::visitGEPOperator(GEPOperator &GEP) {
SizeOffsetType PtrData = compute(GEP.getPointerOperand());
APInt Offset(DL.getIndexTypeSizeInBits(GEP.getPointerOperand()->getType()), 0);
if (!bothKnown(PtrData) || !GEP.accumulateConstantOffset(DL, Offset))
return unknown();
return std::make_pair(PtrData.first, PtrData.second + Offset);
}
SizeOffsetType ObjectSizeOffsetVisitor::visitGlobalAlias(GlobalAlias &GA) {
if (GA.isInterposable())
return unknown();
return compute(GA.getAliasee());
}
SizeOffsetType ObjectSizeOffsetVisitor::visitGlobalVariable(GlobalVariable &GV){
if (!GV.hasDefinitiveInitializer())
return unknown();
APInt Size(IntTyBits, DL.getTypeAllocSize(GV.getValueType()));
return std::make_pair(align(Size, GV.getAlign()), Zero);
}
SizeOffsetType ObjectSizeOffsetVisitor::visitIntToPtrInst(IntToPtrInst&) {
// clueless
return unknown();
}
SizeOffsetType ObjectSizeOffsetVisitor::visitLoadInst(LoadInst&) {
++ObjectVisitorLoad;
return unknown();
}
SizeOffsetType ObjectSizeOffsetVisitor::visitPHINode(PHINode&) {
// too complex to analyze statically.
return unknown();
}
SizeOffsetType ObjectSizeOffsetVisitor::visitSelectInst(SelectInst &I) {
SizeOffsetType TrueSide = compute(I.getTrueValue());
SizeOffsetType FalseSide = compute(I.getFalseValue());
if (bothKnown(TrueSide) && bothKnown(FalseSide)) {
if (TrueSide == FalseSide) {
return TrueSide;
}
APInt TrueResult = getSizeWithOverflow(TrueSide);
APInt FalseResult = getSizeWithOverflow(FalseSide);
if (TrueResult == FalseResult) {
return TrueSide;
}
if (Options.EvalMode == ObjectSizeOpts::Mode::Min) {
if (TrueResult.slt(FalseResult))
return TrueSide;
return FalseSide;
}
if (Options.EvalMode == ObjectSizeOpts::Mode::Max) {
if (TrueResult.sgt(FalseResult))
return TrueSide;
return FalseSide;
}
}
return unknown();
}
SizeOffsetType ObjectSizeOffsetVisitor::visitUndefValue(UndefValue&) {
return std::make_pair(Zero, Zero);
}
SizeOffsetType ObjectSizeOffsetVisitor::visitInstruction(Instruction &I) {
LLVM_DEBUG(dbgs() << "ObjectSizeOffsetVisitor unknown instruction:" << I
<< '\n');
return unknown();
}
ObjectSizeOffsetEvaluator::ObjectSizeOffsetEvaluator(
const DataLayout &DL, const TargetLibraryInfo *TLI, LLVMContext &Context,
ObjectSizeOpts EvalOpts)
: DL(DL), TLI(TLI), Context(Context),
Builder(Context, TargetFolder(DL),
IRBuilderCallbackInserter(
[&](Instruction *I) { InsertedInstructions.insert(I); })),
EvalOpts(EvalOpts) {
// IntTy and Zero must be set for each compute() since the address space may
// be different for later objects.
}
SizeOffsetEvalType ObjectSizeOffsetEvaluator::compute(Value *V) {
// XXX - Are vectors of pointers possible here?
IntTy = cast<IntegerType>(DL.getIndexType(V->getType()));
Zero = ConstantInt::get(IntTy, 0);
SizeOffsetEvalType Result = compute_(V);
if (!bothKnown(Result)) {
// Erase everything that was computed in this iteration from the cache, so
// that no dangling references are left behind. We could be a bit smarter if
// we kept a dependency graph. It's probably not worth the complexity.
for (const Value *SeenVal : SeenVals) {
CacheMapTy::iterator CacheIt = CacheMap.find(SeenVal);
// non-computable results can be safely cached
if (CacheIt != CacheMap.end() && anyKnown(CacheIt->second))
CacheMap.erase(CacheIt);
}
// Erase any instructions we inserted as part of the traversal.
for (Instruction *I : InsertedInstructions) {
I->replaceAllUsesWith(UndefValue::get(I->getType()));
I->eraseFromParent();
}
}
SeenVals.clear();
InsertedInstructions.clear();
return Result;
}
SizeOffsetEvalType ObjectSizeOffsetEvaluator::compute_(Value *V) {
ObjectSizeOffsetVisitor Visitor(DL, TLI, Context, EvalOpts);
SizeOffsetType Const = Visitor.compute(V);
if (Visitor.bothKnown(Const))
return std::make_pair(ConstantInt::get(Context, Const.first),
ConstantInt::get(Context, Const.second));
V = V->stripPointerCasts();
// Check cache.
CacheMapTy::iterator CacheIt = CacheMap.find(V);
if (CacheIt != CacheMap.end())
return CacheIt->second;
// Always generate code immediately before the instruction being
// processed, so that the generated code dominates the same BBs.
BuilderTy::InsertPointGuard Guard(Builder);
if (Instruction *I = dyn_cast<Instruction>(V))
Builder.SetInsertPoint(I);
// Now compute the size and offset.
SizeOffsetEvalType Result;
// Record the pointers that were handled in this run, so that they can be
// cleaned later if something fails. We also use this set to break cycles that
// can occur in dead code.
if (!SeenVals.insert(V).second) {
Result = unknown();
} else if (GEPOperator *GEP = dyn_cast<GEPOperator>(V)) {
Result = visitGEPOperator(*GEP);
} else if (Instruction *I = dyn_cast<Instruction>(V)) {
Result = visit(*I);
} else if (isa<Argument>(V) ||
(isa<ConstantExpr>(V) &&
cast<ConstantExpr>(V)->getOpcode() == Instruction::IntToPtr) ||
isa<GlobalAlias>(V) ||
isa<GlobalVariable>(V)) {
// Ignore values where we cannot do more than ObjectSizeVisitor.
Result = unknown();
} else {
LLVM_DEBUG(
dbgs() << "ObjectSizeOffsetEvaluator::compute() unhandled value: " << *V
<< '\n');
Result = unknown();
}
// Don't reuse CacheIt since it may be invalid at this point.
CacheMap[V] = Result;
return Result;
}
SizeOffsetEvalType ObjectSizeOffsetEvaluator::visitAllocaInst(AllocaInst &I) {
if (!I.getAllocatedType()->isSized())
return unknown();
// must be a VLA
assert(I.isArrayAllocation());
// If needed, adjust the alloca's operand size to match the pointer size.
// Subsequent math operations expect the types to match.
Value *ArraySize = Builder.CreateZExtOrTrunc(
I.getArraySize(), DL.getIntPtrType(I.getContext()));
assert(ArraySize->getType() == Zero->getType() &&
"Expected zero constant to have pointer type");
Value *Size = ConstantInt::get(ArraySize->getType(),
DL.getTypeAllocSize(I.getAllocatedType()));
Size = Builder.CreateMul(Size, ArraySize);
return std::make_pair(Size, Zero);
}
SizeOffsetEvalType ObjectSizeOffsetEvaluator::visitCallBase(CallBase &CB) {
Optional<AllocFnsTy> FnData = getAllocationSize(&CB, TLI);
if (!FnData)
return unknown();
// Handle strdup-like functions separately.
if (FnData->AllocTy == StrDupLike) {
// TODO
return unknown();
}
Value *FirstArg = CB.getArgOperand(FnData->FstParam);
FirstArg = Builder.CreateZExtOrTrunc(FirstArg, IntTy);
if (FnData->SndParam < 0)
return std::make_pair(FirstArg, Zero);
Value *SecondArg = CB.getArgOperand(FnData->SndParam);
SecondArg = Builder.CreateZExtOrTrunc(SecondArg, IntTy);
Value *Size = Builder.CreateMul(FirstArg, SecondArg);
return std::make_pair(Size, Zero);
// TODO: handle more standard functions (+ wchar cousins):
// - strdup / strndup
// - strcpy / strncpy
// - strcat / strncat
// - memcpy / memmove
// - strcat / strncat
// - memset
}
SizeOffsetEvalType
ObjectSizeOffsetEvaluator::visitExtractElementInst(ExtractElementInst&) {
return unknown();
}
SizeOffsetEvalType
ObjectSizeOffsetEvaluator::visitExtractValueInst(ExtractValueInst&) {
return unknown();
}
SizeOffsetEvalType
ObjectSizeOffsetEvaluator::visitGEPOperator(GEPOperator &GEP) {
SizeOffsetEvalType PtrData = compute_(GEP.getPointerOperand());
if (!bothKnown(PtrData))
return unknown();
Value *Offset = EmitGEPOffset(&Builder, DL, &GEP, /*NoAssumptions=*/true);
Offset = Builder.CreateAdd(PtrData.second, Offset);
return std::make_pair(PtrData.first, Offset);
}
SizeOffsetEvalType ObjectSizeOffsetEvaluator::visitIntToPtrInst(IntToPtrInst&) {
// clueless
return unknown();
}
SizeOffsetEvalType ObjectSizeOffsetEvaluator::visitLoadInst(LoadInst&) {
return unknown();
}
SizeOffsetEvalType ObjectSizeOffsetEvaluator::visitPHINode(PHINode &PHI) {
// Create 2 PHIs: one for size and another for offset.
PHINode *SizePHI = Builder.CreatePHI(IntTy, PHI.getNumIncomingValues());
PHINode *OffsetPHI = Builder.CreatePHI(IntTy, PHI.getNumIncomingValues());
// Insert right away in the cache to handle recursive PHIs.
CacheMap[&PHI] = std::make_pair(SizePHI, OffsetPHI);
// Compute offset/size for each PHI incoming pointer.
for (unsigned i = 0, e = PHI.getNumIncomingValues(); i != e; ++i) {
Builder.SetInsertPoint(&*PHI.getIncomingBlock(i)->getFirstInsertionPt());
SizeOffsetEvalType EdgeData = compute_(PHI.getIncomingValue(i));
if (!bothKnown(EdgeData)) {
OffsetPHI->replaceAllUsesWith(UndefValue::get(IntTy));
OffsetPHI->eraseFromParent();
InsertedInstructions.erase(OffsetPHI);
SizePHI->replaceAllUsesWith(UndefValue::get(IntTy));
SizePHI->eraseFromParent();
InsertedInstructions.erase(SizePHI);
return unknown();
}
SizePHI->addIncoming(EdgeData.first, PHI.getIncomingBlock(i));
OffsetPHI->addIncoming(EdgeData.second, PHI.getIncomingBlock(i));
}
Value *Size = SizePHI, *Offset = OffsetPHI;
if (Value *Tmp = SizePHI->hasConstantValue()) {
Size = Tmp;
SizePHI->replaceAllUsesWith(Size);
SizePHI->eraseFromParent();
InsertedInstructions.erase(SizePHI);
}
if (Value *Tmp = OffsetPHI->hasConstantValue()) {
Offset = Tmp;
OffsetPHI->replaceAllUsesWith(Offset);
OffsetPHI->eraseFromParent();
InsertedInstructions.erase(OffsetPHI);
}
return std::make_pair(Size, Offset);
}
SizeOffsetEvalType ObjectSizeOffsetEvaluator::visitSelectInst(SelectInst &I) {
SizeOffsetEvalType TrueSide = compute_(I.getTrueValue());
SizeOffsetEvalType FalseSide = compute_(I.getFalseValue());
if (!bothKnown(TrueSide) || !bothKnown(FalseSide))
return unknown();
if (TrueSide == FalseSide)
return TrueSide;
Value *Size = Builder.CreateSelect(I.getCondition(), TrueSide.first,
FalseSide.first);
Value *Offset = Builder.CreateSelect(I.getCondition(), TrueSide.second,
FalseSide.second);
return std::make_pair(Size, Offset);
}
SizeOffsetEvalType ObjectSizeOffsetEvaluator::visitInstruction(Instruction &I) {
LLVM_DEBUG(dbgs() << "ObjectSizeOffsetEvaluator unknown instruction:" << I
<< '\n');
return unknown();
}
|
; A064266: Lune of Jan 01 in Julian calendar for a year with Golden Number n.
; 9,20,1,12,23,4,15,26,7,18,29,10,21,2,13,24,5,16,27
mul $0,11
add $0,9
mod $0,30
|
/*
* Copyright (c) 2010-2017 OTClient <https://github.com/edubart/otclient>
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include "tile.h"
#include "item.h"
#include "thingtypemanager.h"
#include "map.h"
#include "game.h"
#include "localplayer.h"
#include "effect.h"
#include "protocolgame.h"
#include "lightview.h"
#include "spritemanager.h"
#include <framework/graphics/fontmanager.h>
#include <framework/util/extras.h>
#include <framework/core/adaptiverenderer.h>
Tile::Tile(const Position& position) :
m_position(position),
m_drawElevation(0),
m_minimapColor(0),
m_flags(0)
{
}
void Tile::drawBottom(const Point& dest, LightView* lightView)
{
m_topDraws = 0;
m_drawElevation = 0;
if (m_fill != Color::alpha) {
g_drawQueue->addFilledRect(Rect(dest, Otc::TILE_PIXELS, Otc::TILE_PIXELS), m_fill);
return;
}
// bottom things
for (const ThingPtr& thing : m_things) {
if (!thing->isGround() && !thing->isGroundBorder() && !thing->isOnBottom())
break;
if (thing->isHidden())
continue;
thing->draw(dest - m_drawElevation, true, lightView);
m_drawElevation = std::min<uint8_t>(m_drawElevation + thing->getElevation(), Otc::MAX_ELEVATION);
}
// common items, reverse order
int redrawPreviousTopW = 0, redrawPreviousTopH = 0;
for (auto it = m_things.rbegin(); it != m_things.rend(); ++it) {
const ThingPtr& thing = *it;
if (thing->isOnTop() || thing->isOnBottom() || thing->isGroundBorder() || thing->isGround() || thing->isCreature())
break;
if (thing->isHidden())
continue;
thing->draw(dest - m_drawElevation, true, lightView);
m_drawElevation = std::min<uint8_t>(m_drawElevation + thing->getElevation(), Otc::MAX_ELEVATION);
if (thing->isLyingCorpse()) {
redrawPreviousTopW = std::max<int>(thing->getWidth() - 1, redrawPreviousTopW);
redrawPreviousTopH = std::max<int>(thing->getHeight() - 1, redrawPreviousTopH);
}
}
for (int x = -redrawPreviousTopW; x <= 0; ++x) {
for (int y = -redrawPreviousTopH; y <= 0; ++y) {
if (x == 0 && y == 0)
continue;
if(const TilePtr& tile = g_map.getTile(m_position.translated(x, y)))
tile->drawTop(dest + Point(x * Otc::TILE_PIXELS, y * Otc::TILE_PIXELS), lightView);
}
}
if (lightView && hasTranslucentLight()) {
lightView->addLight(dest + Point(16, 16), 215, 1);
}
}
void Tile::drawTop(const Point& dest, LightView* lightView)
{
if (m_fill != Color::alpha)
return;
if (m_topDraws++ < m_topCorrection)
return;
// walking creatures
for (const CreaturePtr& creature : m_walkingCreatures) {
if (creature->isHidden())
continue;
Point creatureDest(dest.x + ((creature->getPrewalkingPosition().x - m_position.x) * Otc::TILE_PIXELS - m_drawElevation),
dest.y + ((creature->getPrewalkingPosition().y - m_position.y) * Otc::TILE_PIXELS - m_drawElevation));
creature->draw(creatureDest, true, lightView);
}
// creatures
std::vector<CreaturePtr> creaturesToDraw;
int limit = g_adaptiveRenderer.creaturesLimit();
for (auto& thing : m_things) {
if (!thing->isCreature() || thing->isHidden())
continue;
if (limit-- <= 0)
break;
CreaturePtr creature = thing->static_self_cast<Creature>();
if (!creature || creature->isWalking())
continue;
creature->draw(dest - m_drawElevation, true, lightView);
}
// effects
limit = std::min<int>((int)m_effects.size() - 1, g_adaptiveRenderer.effetsLimit());
for (int i = limit; i >= 0; --i) {
if (m_effects[i]->isHidden())
continue;
m_effects[i]->draw(dest - m_drawElevation, m_position.x - g_map.getCentralPosition().x, m_position.y - g_map.getCentralPosition().y, true, lightView);
}
// top
for (const ThingPtr& thing : m_things) {
if (!thing->isOnTop() || thing->isHidden())
continue;
thing->draw(dest, true, lightView);
}
}
void Tile::calculateCorpseCorrection() {
m_topCorrection = 0;
int redrawPreviousTopW = 0, redrawPreviousTopH = 0;
for(auto it = m_things.rbegin(); it != m_things.rend(); ++it) {
const ThingPtr& thing = *it;
if(!thing->isLyingCorpse()) {
continue;
}
if (thing->isHidden())
continue;
redrawPreviousTopW = std::max<int>(thing->getWidth() - 1, redrawPreviousTopW);
redrawPreviousTopH = std::max<int>(thing->getHeight() - 1, redrawPreviousTopH);
}
for (int x = -redrawPreviousTopW; x <= 0; ++x) {
for (int y = -redrawPreviousTopH; y <= 0; ++y) {
if (x == 0 && y == 0)
continue;
if (const TilePtr& tile = g_map.getTile(m_position.translated(x, y)))
tile->m_topCorrection += 1;
}
}
}
void Tile::drawTexts(Point dest)
{
if (m_timerText && g_clock.millis() < m_timer) {
if (m_text && m_text->hasText())
dest.y -= 8;
m_timerText->setText(stdext::format("%.01f", (m_timer - g_clock.millis()) / 1000.));
m_timerText->drawText(dest, Rect(dest.x - 64, dest.y - 64, 128, 128));
dest.y += 16;
}
if (m_text && m_text->hasText()) {
m_text->drawText(dest, Rect(dest.x - 64, dest.y - 64, 128, 128));
}
}
void Tile::clean()
{
while(!m_things.empty())
removeThing(m_things.front());
}
void Tile::addWalkingCreature(const CreaturePtr& creature)
{
m_walkingCreatures.push_back(creature);
}
void Tile::removeWalkingCreature(const CreaturePtr& creature)
{
auto it = std::find(m_walkingCreatures.begin(), m_walkingCreatures.end(), creature);
if(it != m_walkingCreatures.end())
m_walkingCreatures.erase(it);
}
void Tile::addThing(const ThingPtr& thing, int stackPos)
{
if(!thing)
return;
if(thing->isEffect()) {
if(thing->isTopEffect())
m_effects.insert(m_effects.begin(), thing->static_self_cast<Effect>());
else
m_effects.push_back(thing->static_self_cast<Effect>());
} else {
// priority 854
// 0 - ground, --> -->
// 1 - ground borders --> -->
// 2 - bottom (walls), --> -->
// 3 - on top (doors) --> -->
// 4 - creatures, from top to bottom <-- -->
// 5 - items, from top to bottom <-- <--
if(stackPos < 0 || stackPos == 255) {
int priority = thing->getStackPriority();
// -1 or 255 => auto detect position
// -2 => append
bool append;
if(stackPos == -2)
append = true;
else {
append = (priority <= 3);
// newer protocols does not store creatures in reverse order
if(g_game.getClientVersion() >= 854 && priority == 4)
append = !append;
}
for(stackPos = 0; stackPos < (int)m_things.size(); ++stackPos) {
int otherPriority = m_things[stackPos]->getStackPriority();
if((append && otherPriority > priority) || (!append && otherPriority >= priority))
break;
}
} else if(stackPos > (int)m_things.size())
stackPos = m_things.size();
m_things.insert(m_things.begin() + stackPos, thing);
if(m_things.size() > MAX_THINGS)
removeThing(m_things[MAX_THINGS]);
/*
// check stack priorities
// this code exists to find stackpos bugs faster
int lastPriority = 0;
for(const ThingPtr& thing : m_things) {
int priority = thing->getStackPriority();
VALIDATE(lastPriority <= priority);
lastPriority = priority;
}
*/
}
thing->setPosition(m_position);
thing->onAppear();
if(thing->isTranslucent())
checkTranslucentLight();
if(g_game.isTileThingLuaCallbackEnabled())
callLuaField("onAddThing", thing);
}
bool Tile::removeThing(ThingPtr thing)
{
if(!thing)
return false;
bool removed = false;
if(thing->isEffect()) {
EffectPtr effect = thing->static_self_cast<Effect>();
auto it = std::find(m_effects.begin(), m_effects.end(), effect);
if(it != m_effects.end()) {
m_effects.erase(it);
removed = true;
}
} else {
auto it = std::find(m_things.begin(), m_things.end(), thing);
if(it != m_things.end()) {
m_things.erase(it);
removed = true;
}
}
if (thing->isCreature()) {
m_lastCreature = thing->getId();
}
thing->onDisappear();
if(thing->isTranslucent())
checkTranslucentLight();
if (g_game.isTileThingLuaCallbackEnabled() && removed) {
callLuaField("onRemoveThing", thing);
}
return removed;
}
ThingPtr Tile::getThing(int stackPos)
{
if(stackPos >= 0 && stackPos < (int)m_things.size())
return m_things[stackPos];
return nullptr;
}
EffectPtr Tile::getEffect(uint16 id)
{
for(const EffectPtr& effect : m_effects)
if(effect->getId() == id)
return effect;
return nullptr;
}
bool Tile::hasThing(const ThingPtr& thing)
{
return std::find(m_things.begin(), m_things.end(), thing) != m_things.end();
}
int Tile::getThingStackPos(const ThingPtr& thing)
{
for(uint stackpos = 0; stackpos < m_things.size(); ++stackpos)
if(thing == m_things[stackpos])
return stackpos;
return -1;
}
ThingPtr Tile::getTopThing()
{
if(isEmpty())
return nullptr;
for(const ThingPtr& thing : m_things)
if(!thing->isGround() && !thing->isGroundBorder() && !thing->isOnBottom() && !thing->isOnTop() && !thing->isCreature())
return thing;
return m_things[m_things.size() - 1];
}
std::vector<ItemPtr> Tile::getItems()
{
std::vector<ItemPtr> items;
for(const ThingPtr& thing : m_things) {
if(!thing->isItem())
continue;
ItemPtr item = thing->static_self_cast<Item>();
items.push_back(item);
}
return items;
}
std::vector<CreaturePtr> Tile::getCreatures()
{
std::vector<CreaturePtr> creatures;
for(const ThingPtr& thing : m_things) {
if(thing->isCreature())
creatures.push_back(thing->static_self_cast<Creature>());
}
return creatures;
}
ItemPtr Tile::getGround()
{
ThingPtr firstObject = getThing(0);
if(!firstObject)
return nullptr;
if(firstObject->isGround() && firstObject->isItem())
return firstObject->static_self_cast<Item>();
return nullptr;
}
int Tile::getGroundSpeed()
{
if (m_speed)
return m_speed;
int groundSpeed = 100;
if(ItemPtr ground = getGround())
groundSpeed = ground->getGroundSpeed();
return groundSpeed;
}
uint8 Tile::getMinimapColorByte()
{
uint8 color = 255; // alpha
if(m_minimapColor != 0)
return m_minimapColor;
for(const ThingPtr& thing : m_things) {
if(!thing->isGround() && !thing->isGroundBorder() && !thing->isOnBottom() && !thing->isOnTop())
break;
uint8 c = thing->getMinimapColor();
if(c != 0)
color = c;
}
return color;
}
ThingPtr Tile::getTopLookThing()
{
if(isEmpty())
return nullptr;
for(uint i = 0; i < m_things.size(); ++i) {
ThingPtr thing = m_things[i];
if(!thing->isIgnoreLook() && (!thing->isGround() && !thing->isGroundBorder() && !thing->isOnBottom() && !thing->isOnTop()))
return thing;
}
return m_things[0];
}
ThingPtr Tile::getTopLookThingEx(Point offset)
{
auto creature = getTopCreatureEx(offset);
if (creature)
return creature;
if (isEmpty())
return nullptr;
for (uint i = 0; i < m_things.size(); ++i) {
ThingPtr thing = m_things[i];
if (!thing->isIgnoreLook() && (!thing->isGround() && !thing->isGroundBorder() && !thing->isOnBottom() && !thing->isOnTop() && !thing->isCreature()))
return thing;
}
return m_things[0];
}
ThingPtr Tile::getTopUseThing()
{
if(isEmpty())
return nullptr;
for(uint i = 0; i < m_things.size(); ++i) {
ThingPtr thing = m_things[i];
if (thing->isForceUse() || (!thing->isGround() && !thing->isGroundBorder() && !thing->isOnBottom() && !thing->isOnTop() && !thing->isCreature() && !thing->isSplash()))
return thing;
}
for (uint i = m_things.size() - 1; i > 0; --i) {
ThingPtr thing = m_things[i];
if (!thing->isSplash() && !thing->isCreature())
return thing;
}
return m_things[0];
}
CreaturePtr Tile::getTopCreature()
{
CreaturePtr creature;
for(uint i = 0; i < m_things.size(); ++i) {
ThingPtr thing = m_things[i];
if(thing->isLocalPlayer()) // return local player if there is no other creature
creature = thing->static_self_cast<Creature>();
else if(thing->isCreature() && !thing->isLocalPlayer())
return thing->static_self_cast<Creature>();
}
if(!creature && !m_walkingCreatures.empty())
creature = m_walkingCreatures.back();
// check for walking creatures in tiles around
if(!creature) {
for(int xi=-1;xi<=1;++xi) {
for(int yi=-1;yi<=1;++yi) {
Position pos = m_position.translated(xi, yi);
if(pos == m_position)
continue;
const TilePtr& tile = g_map.getTile(pos);
if(tile) {
for(const CreaturePtr& c : tile->getCreatures()) {
if(c->isWalking() && c->getLastStepFromPosition() == m_position && c->getStepProgress() < 0.75f) {
creature = c;
}
}
}
}
}
}
return creature;
}
CreaturePtr Tile::getTopCreatureEx(Point offset)
{
static const int cords[][2] = { {1,1}, {0,1}, {1, 0}, {-1, 1}, {0, 0}, {1, -1}, {-1, 0}, {0, -1}, {-1, -1} };
CreaturePtr localPlayer = nullptr;
Point localPlayerOffset;
for (auto& xy : cords) {
Position pos = m_position.translated(xy[0], xy[1]);
const TilePtr& tile = g_map.getTile(pos);
if (!tile) continue;
for (const CreaturePtr& c : tile->getCreatures()) {
if (c->isLocalPlayer()) {
localPlayer = c;
localPlayerOffset = Point(offset.x - xy[0] * Otc::TILE_PIXELS, offset.y - xy[1] * Otc::TILE_PIXELS);
continue;
}
if (c->isInsideOffset(Point(offset.x - xy[0] * Otc::TILE_PIXELS, offset.y - xy[1] * Otc::TILE_PIXELS)))
return c;
}
}
if (localPlayer && localPlayer->isInsideOffset(localPlayerOffset))
return localPlayer;
return nullptr;
}
ThingPtr Tile::getTopMoveThing()
{
if(isEmpty())
return nullptr;
for(uint i = 0; i < m_things.size(); ++i) {
ThingPtr thing = m_things[i];
if(!thing->isGround() && !thing->isGroundBorder() && !thing->isOnBottom() && !thing->isOnTop() && !thing->isCreature()) {
if(i > 0 && thing->isNotMoveable())
return m_things[i-1];
return thing;
}
}
for(const ThingPtr& thing : m_things) {
if(thing->isCreature())
return thing;
}
return m_things[0];
}
ThingPtr Tile::getTopMultiUseThing()
{
if (isEmpty())
return nullptr;
if (CreaturePtr topCreature = getTopCreature())
return topCreature;
for (uint i = 0; i < m_things.size(); ++i) {
ThingPtr thing = m_things[i];
if (thing->isForceUse())
return thing;
}
for (uint i = 0; i < m_things.size(); ++i) {
ThingPtr thing = m_things[i];
if (!thing->isGround() && !thing->isGroundBorder() && !thing->isOnBottom() && !thing->isOnTop()) {
if (i > 0 && thing->isSplash())
return m_things[i - 1];
return thing;
}
}
return m_things.back();
}
ThingPtr Tile::getTopMultiUseThingEx(Point offset)
{
if (CreaturePtr topCreature = getTopCreatureEx(offset))
return topCreature;
if (isEmpty())
return nullptr;
for (uint i = 0; i < m_things.size(); ++i) {
ThingPtr thing = m_things[i];
if (thing->isForceUse() && !thing->isCreature())
return thing;
}
for (uint i = 0; i < m_things.size(); ++i) {
ThingPtr thing = m_things[i];
if (!thing->isGround() && !thing->isGroundBorder() && !thing->isOnBottom() && !thing->isOnTop() && !thing->isCreature()) {
if (i > 0 && thing->isSplash())
return m_things[i - 1];
return thing;
}
}
for (uint i = m_things.size() - 1; i > 0; --i) {
ThingPtr thing = m_things[i];
if (!thing->isCreature())
return thing;
}
return m_things[0];
}
bool Tile::isWalkable(bool ignoreCreatures)
{
if(!getGround())
return false;
for(const ThingPtr& thing : m_things) {
if(thing->isNotWalkable())
return false;
if(!ignoreCreatures) {
if(thing->isCreature()) {
CreaturePtr creature = thing->static_self_cast<Creature>();
if(!creature->isPassable() && creature->canBeSeen() && !creature->isLocalPlayer())
return false;
}
}
}
return true;
}
bool Tile::isPathable()
{
for(const ThingPtr& thing : m_things)
if(thing->isNotPathable())
return false;
return true;
}
bool Tile::isFullGround()
{
ItemPtr ground = getGround();
if(ground && ground->isFullGround())
return true;
return false;
}
bool Tile::isFullyOpaque()
{
ThingPtr firstObject = getThing(0);
return firstObject && firstObject->isFullGround();
}
bool Tile::isSingleDimension()
{
if(!m_walkingCreatures.empty())
return false;
for(const ThingPtr& thing : m_things)
if(thing->getHeight() != 1 || thing->getWidth() != 1)
return false;
return true;
}
bool Tile::isLookPossible()
{
for (const ThingPtr& thing : m_things)
if (thing->blockProjectile())
return false;
return true;
}
bool Tile::isBlockingProjectile()
{
for (const ThingPtr& thing : m_things)
if (thing->blockProjectile())
return true;
return false;
}
bool Tile::isClickable()
{
bool hasGround = false;
bool hasOnBottom = false;
bool hasIgnoreLook = false;
for(const ThingPtr& thing : m_things) {
if(thing->isGround())
hasGround = true;
if(thing->isOnBottom())
hasOnBottom = true;
if((hasGround || hasOnBottom) && !hasIgnoreLook)
return true;
}
return false;
}
bool Tile::isEmpty()
{
return m_things.size() == 0;
}
bool Tile::isDrawable()
{
return !m_things.empty() || !m_walkingCreatures.empty() || !m_effects.empty();
}
bool Tile::mustHookEast()
{
for(const ThingPtr& thing : m_things)
if(thing->isHookEast())
return true;
return false;
}
bool Tile::mustHookSouth()
{
for(const ThingPtr& thing : m_things)
if(thing->isHookSouth())
return true;
return false;
}
bool Tile::hasCreature()
{
for(const ThingPtr& thing : m_things)
if(thing->isCreature())
return true;
return false;
}
bool Tile::hasBlockingCreature()
{
for (const ThingPtr& thing : m_things)
if (thing->isCreature() && !thing->static_self_cast<Creature>()->isPassable() && !thing->isLocalPlayer())
return true;
return false;
}
bool Tile::limitsFloorsView(bool isFreeView)
{
// ground and walls limits the view
ThingPtr firstThing = getThing(0);
if(isFreeView) {
if(firstThing && !firstThing->isDontHide() && (firstThing->isGround() || firstThing->isOnBottom()))
return true;
} else if(firstThing && !firstThing->isDontHide() && (firstThing->isGround() || (firstThing->isOnBottom() && firstThing->blockProjectile())))
return true;
return false;
}
bool Tile::canErase()
{
return m_walkingCreatures.empty() && m_effects.empty() && m_things.empty() && m_flags == 0 && m_minimapColor == 0;
}
int Tile::getElevation()
{
int elevation = 0;
for(const ThingPtr& thing : m_things)
if(thing->getElevation() > 0)
elevation++;
return elevation;
}
bool Tile::hasElevation(int elevation)
{
return getElevation() >= elevation;
}
void Tile::checkTranslucentLight()
{
if(m_position.z != Otc::SEA_FLOOR)
return;
Position downPos = m_position;
if(!downPos.down())
return;
TilePtr tile = g_map.getOrCreateTile(downPos);
if(!tile)
return;
bool translucent = false;
for(const ThingPtr& thing : m_things) {
if(thing->isTranslucent() || thing->hasLensHelp()) {
translucent = true;
break;
}
}
if(translucent)
tile->m_flags |= TILESTATE_TRANSLUECENT_LIGHT;
else
tile->m_flags &= ~TILESTATE_TRANSLUECENT_LIGHT;
}
void Tile::setText(const std::string& text, Color color)
{
if (!m_text) {
m_text = StaticTextPtr(new StaticText());
}
m_text->setText(text);
m_text->setColor(color);
}
std::string Tile::getText()
{
return m_text ? m_text->getCachedText().getText() : "";
}
void Tile::setTimer(int time, Color color)
{
if (time > 60000) {
g_logger.warning("Max tile timer value is 300000 (300s)!");
return;
}
m_timer = time + g_clock.millis();
if (!m_timerText) {
m_timerText = StaticTextPtr(new StaticText());
}
m_timerText->setColor(color);
}
int Tile::getTimer()
{
return m_timerText ? std::max<int>(0, m_timer - g_clock.millis()) : 0;
}
void Tile::setFill(Color color)
{
m_fill = color;
}
bool Tile::canShoot(int distance)
{
auto player = g_game.getLocalPlayer();
if (!player) return false;
auto playerPos = player->getPrewalkingPosition();
if(distance > 0 && std::max<int>(std::abs<int>(m_position.x - playerPos.x), std::abs<int>(m_position.y - playerPos.y)) > distance)
return false;
return g_map.isSightClear(playerPos, m_position);
}
|
<%
import collections
import pwnlib.abi
import pwnlib.constants
import pwnlib.shellcraft
import six
%>
<%docstring>stty(fd, params) -> str
Invokes the syscall stty.
See 'man 2 stty' for more information.
Arguments:
fd(int): fd
params(sgttyb*): params
Returns:
int
</%docstring>
<%page args="fd=0, params=0"/>
<%
abi = pwnlib.abi.ABI.syscall()
stack = abi.stack
regs = abi.register_arguments[1:]
allregs = pwnlib.shellcraft.registers.current()
can_pushstr = []
can_pushstr_array = []
argument_names = ['fd', 'params']
argument_values = [fd, params]
# Load all of the arguments into their destination registers / stack slots.
register_arguments = dict()
stack_arguments = collections.OrderedDict()
string_arguments = dict()
dict_arguments = dict()
array_arguments = dict()
syscall_repr = []
for name, arg in zip(argument_names, argument_values):
if arg is not None:
syscall_repr.append('%s=%r' % (name, arg))
# If the argument itself (input) is a register...
if arg in allregs:
index = argument_names.index(name)
if index < len(regs):
target = regs[index]
register_arguments[target] = arg
elif arg is not None:
stack_arguments[index] = arg
# The argument is not a register. It is a string value, and we
# are expecting a string value
elif name in can_pushstr and isinstance(arg, (six.binary_type, six.text_type)):
if isinstance(arg, six.text_type):
arg = arg.encode('utf-8')
string_arguments[name] = arg
# The argument is not a register. It is a dictionary, and we are
# expecting K:V paris.
elif name in can_pushstr_array and isinstance(arg, dict):
array_arguments[name] = ['%s=%s' % (k,v) for (k,v) in arg.items()]
# The arguent is not a register. It is a list, and we are expecting
# a list of arguments.
elif name in can_pushstr_array and isinstance(arg, (list, tuple)):
array_arguments[name] = arg
# The argument is not a register, string, dict, or list.
# It could be a constant string ('O_RDONLY') for an integer argument,
# an actual integer value, or a constant.
else:
index = argument_names.index(name)
if index < len(regs):
target = regs[index]
register_arguments[target] = arg
elif arg is not None:
stack_arguments[target] = arg
# Some syscalls have different names on various architectures.
# Determine which syscall number to use for the current architecture.
for syscall in ['SYS_stty']:
if hasattr(pwnlib.constants, syscall):
break
else:
raise Exception("Could not locate any syscalls: %r" % syscalls)
%>
/* stty(${', '.join(syscall_repr)}) */
%for name, arg in string_arguments.items():
${pwnlib.shellcraft.pushstr(arg, append_null=(b'\x00' not in arg))}
${pwnlib.shellcraft.mov(regs[argument_names.index(name)], abi.stack)}
%endfor
%for name, arg in array_arguments.items():
${pwnlib.shellcraft.pushstr_array(regs[argument_names.index(name)], arg)}
%endfor
%for name, arg in stack_arguments.items():
${pwnlib.shellcraft.push(arg)}
%endfor
${pwnlib.shellcraft.setregs(register_arguments)}
${pwnlib.shellcraft.syscall(syscall)} |
.include "defaults_mod.asm"
table_file_jp equ "exe5-utf8.tbl"
table_file_en equ "bn5-utf8.tbl"
game_code_len equ 3
game_code equ 0x4252424A // BRBJ
game_code_2 equ 0x42524245 // BRBE
game_code_3 equ 0x42524250 // BRBP
card_type equ 1
card_id equ 23
card_no equ "023"
card_sub equ "Mod Card 023"
card_sub_x equ 64
card_desc_len equ 2
card_desc_1 equ "Lark"
card_desc_2 equ "17MB"
card_desc_3 equ ""
card_name_jp_full equ "ゲイラーク"
card_name_jp_game equ "ゲイラーク"
card_name_en_full equ "Lark"
card_name_en_game equ "Lark"
card_address equ ""
card_address_id equ 0
card_bug equ 0
card_wrote_en equ ""
card_wrote_jp equ "" |
; A142391: Primes congruent to 40 mod 47.
; Submitted by Christian Krause
; 181,463,557,839,1873,2437,2531,2719,3001,3659,3847,4129,4787,5351,5821,6197,6761,6949,7043,7607,8171,8641,8923,9769,10333,10427,10709,11273,11743,12119,12401,12589,13999,14281,14563,14657,14939,15973,16067,16349,16631,17383,17477,18041,18229,18793,20297,21143,21613,22271,22741,23117,23399,23869,24151,24527,24809,25373,25561,26407,26501,26783,27253,27817,28099,28663,30449,30637,31013,31859,32141,32423,32611,32987,33457,33739,34303,34679,34961,35149,36277,36559,36653,37123,37217,37781,39097,39191
mov $1,50
mov $2,$0
add $2,2
pow $2,2
lpb $2
sub $1,7
sub $2,1
mov $3,$1
mul $3,2
seq $3,10051 ; Characteristic function of primes: 1 if n is prime, else 0.
sub $0,$3
add $1,54
mov $4,$0
max $4,0
cmp $4,$0
mul $2,$4
lpe
mov $0,$1
mul $0,2
sub $0,107
|
.size 8000
.text@48
jp lstatint
.text@100
jp lbegin
.data@143
80
.text@150
lbegin:
ld c, 41
ld b, 03
ld d, 03
lbegin_waitm3:
ldff a, (c)
and a, d
cmp a, b
jrnz lbegin_waitm3
ld a, 20
ldff(c), a
xor a, a
ldff(0f), a
ld a, 02
ldff(ff), a
ei
ld hl, 8000
ld a, 01
.text@1000
lstatint:
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
ld(hl), a
.text@1048
ld a, (hl)
and a, 07
jp lprint_a
.text@7000
lprint_a:
push af
ld b, 91
call lwaitly_b
xor a, a
ldff(40), a
pop af
ld(9800), a
ld bc, 7a00
ld hl, 8000
ld d, a0
lprint_copytiles:
ld a, (bc)
inc bc
ld(hl++), a
dec d
jrnz lprint_copytiles
ld a, c0
ldff(47), a
ld a, 80
ldff(68), a
ld a, ff
ldff(69), a
ldff(69), a
ldff(69), a
ldff(69), a
ldff(69), a
ldff(69), a
xor a, a
ldff(69), a
ldff(69), a
ldff(43), a
ld a, 91
ldff(40), a
lprint_limbo:
jr lprint_limbo
.text@7400
lwaitly_b:
ld c, 44
lwaitly_b_loop:
ldff a, (c)
cmp a, b
jrnz lwaitly_b_loop
ret
.data@7a00
00 00 7f 7f 41 41 41 41
41 41 41 41 41 41 7f 7f
00 00 08 08 08 08 08 08
08 08 08 08 08 08 08 08
00 00 7f 7f 01 01 01 01
7f 7f 40 40 40 40 7f 7f
00 00 7f 7f 01 01 01 01
3f 3f 01 01 01 01 7f 7f
00 00 41 41 41 41 41 41
7f 7f 01 01 01 01 01 01
00 00 7f 7f 40 40 40 40
7e 7e 01 01 01 01 7e 7e
00 00 7f 7f 40 40 40 40
7f 7f 41 41 41 41 7f 7f
00 00 7f 7f 01 01 02 02
04 04 08 08 10 10 10 10
00 00 3e 3e 41 41 41 41
3e 3e 41 41 41 41 3e 3e
00 00 7f 7f 41 41 41 41
7f 7f 01 01 01 01 7f 7f
|
//Petdraw (Commander X16 version)
//by David Murray 2019
//dfwgreencars@gmail.com
//
//Converted to KickAssembler
//by Marcelo Lv Cabral 2020
//https://github.com/lvcabral
// The following routine is the Pixel-Draw screen
// which allows the user to draw using an 80x50 matrix
// of PETSCII block characters. it is accessed by
// pressing F3.
PIXEL_DRAW_SCREEN:
jsr MAIN_CURSOR_UNPLOT
lda XLOC //convert coordinates from regular screen to
asl //the pixel-draw matrix so that cursor shows
sta PX //up around the same place.
lda YLOC
asl
sta PY
jsr POSTMOVE
PXGETKEYBOARD:
jsr PXCURSOR
jsr $FFE4
cmp #$00
beq PXGETKEYBOARD
cmp #138 // F4
bne PXKEY01
jsr PREMOVE
jsr COLOR_SCREEN
jsr POSTMOVE
PXKEY01: cmp #$85 //F1-KEY
bne PXKEY02
jsr PREMOVE
jsr MAIN_CURSOR_PLOT
jmp MAIN_DRAW_SCREEN
PXKEY02: cmp #$91 //CURSOR UP
bne PXKEY03
jsr PXUP
jmp PXGETKEYBOARD
PXKEY03: cmp #$11 //CURSOR DOWN
bne PXKEY04
jsr PXDOWN
jmp PXGETKEYBOARD
PXKEY04: cmp #$9D //CURSOR LEFT
bne PXKEY05
jsr PXLEFT
jmp PXGETKEYBOARD
PXKEY05: cmp #$1D //CURSOR RIGHT
bne PXKEY06
jsr PXRIGHT
jmp PXGETKEYBOARD
PXKEY06: cmp #$20 //SPACE
bne PXKEY07
jsr PIXELPLOT
lda PCHAR
sta CHRTEMP
lda SELCOL
sta COLTEMP
jmp PXGETKEYBOARD
PXKEY07: cmp #$14 //BACKSPACE
bne PXKEY08
jsr PIXELUNPLOT
jmp PXGETKEYBOARD
PXKEY08: cmp #134 //F3
bne PXKEY09
//jmp TYPINGMODESCREEN
PXKEY09:
jmp PXGETKEYBOARD
PXRIGHT:
lda SCR_SIZE_X
asl //MULTIPLY BY 2
sec
sbc #1
cmp PX
beq PXR01
jsr PREMOVE
inc PX
jsr CONVPXPY
jsr POSTMOVE
PXR01: rts
PXLEFT:
lda PX
cmp #$00
beq PXL01
jsr PREMOVE
dec PX
jsr CONVPXPY
jsr POSTMOVE
PXL01: rts
PXDOWN:
lda SCR_SIZE_Y
asl //MULTIPLY BY 2
sec
sbc #1
cmp PY
beq PXD01
jsr PREMOVE
inc PY
jsr CONVPXPY
jsr POSTMOVE
PXD01: rts
PXUP:
lda PY
cmp #$00
beq PXU01
jsr PREMOVE
dec PY
jsr CONVPXPY
jsr POSTMOVE
PXU01: rts
//The following routine blinks the cursor for pixel mode. However
//it is a carry over from the C64 version and needs to be re-written
//to use the VIA timers instead of a loop like it does now.
PXCURSOR:
inc CRXTIMER //TIMING ROUTINE
lda #$00
cmp CRXTIMER
bne PXCR10
inc CRXTIM2
lda #$04
cmp CRXTIM2
bne PXCR10
lda #$00
sta CRXTIM2
lda PXCRST //TIME TO DO SOMETHING
cmp #$01 // check cursor state
bne PXCR01
lda #$00
sta PXCRST //TURN CURSOR ON
jsr PIXELCRPLOT
jmp PXCR10
PXCR01: lda #$01
sta PXCRST
jsr PIXELCRUNPLOT //TURN CURSOR OFF
PXCR10: rts
//The following routing converts the pixel coordinates
//into regular 40x25 text coordinates.
CONVPXPY:
lda PX
lsr //divide by 2
sta XLOC
lda PY
lsr //divide by 2
sta YLOC
rts
// The following routine takes the coordinates in
// PX and PY and plots a pixel on the screen.
PIXELPLOTFIND:
jsr CONVPXPY
jsr GETCHAR //find out what char is already there
ldx #$00
PP01: lda PIXELMAP,X
cmp PCHAR
beq PP02
inx
cpx #$00
beq PP02
jmp PP01
PP02: stx PIXEL
lda PX
and #%00000001
cmp #%00000001
beq PP03
lda #%00000010
jmp PP04
PP03: lda #%00000001
PP04: sta PIXEL2
lda PY
and #%00000001
cmp #%00000001
beq PP05
asl PIXEL2
asl PIXEL2
PP05: rts
PX: .byte $00 // X-Location (0-79)
PY: .byte $00 // Y-Location (0-49)
PIXEL: .byte $00 // CURRENT 4-BIT PIXEL
PIXEL2: .byte $00 // TEMP
PIXELPLOT:
jsr PIXELPLOTFIND
lda PIXEL2
ora PIXEL
tax
lda PIXELMAP,X
sta PCHAR
sta CHRTEMP
lda SELCOL
sta PCOL
jsr PLOTCHAR
rts
PIXELUNPLOT:
jsr PIXELPLOTFIND
lda PIXEL2
eor #%11111111
and PIXEL
tax
lda PIXELMAP,X
sta PCHAR
sta CHRTEMP
lda SELCOL
sta PCOL
jsr PLOTCHAR
rts
PIXELCRPLOT:
jsr PIXELPLOTFIND
lda PIXEL2
ora PIXEL
tax
lda PIXELMAP,X
sta PCHAR
lda SELCOL
sta PCOL
jsr PLOTCHAR
rts
PIXELCRUNPLOT:
jsr PIXELPLOTFIND
lda PIXEL2
eor #%11111111
and PIXEL
tax
lda PIXELMAP,X
sta PCHAR
lda SELCOL
sta PCOL
jsr PLOTCHAR
rts
|
;
; Copyright (c) 2010 The VP8 project authors. All Rights Reserved.
;
; Use of this source code is governed by a BSD-style license
; that can be found in the LICENSE file in the root of the source
; tree. An additional intellectual property rights grant can be found
; in the file PATENTS. All contributing project authors may
; be found in the AUTHORS file in the root of the source tree.
;
.globl vp8_subtract_mbuv_ppc
.globl vp8_subtract_mby_ppc
;# r3 short *diff
;# r4 unsigned char *usrc
;# r5 unsigned char *vsrc
;# r6 unsigned char *pred
;# r7 int stride
vp8_subtract_mbuv_ppc:
mfspr r11, 256 ;# get old VRSAVE
oris r12, r11, 0xf000
mtspr 256, r12 ;# set VRSAVE
li r9, 256
add r3, r3, r9
add r3, r3, r9
add r6, r6, r9
li r10, 16
li r9, 4
mtctr r9
vspltisw v0, 0
mbu_loop:
lvsl v5, 0, r4 ;# permutate value for alignment
lvx v1, 0, r4 ;# src
lvx v2, 0, r6 ;# pred
add r4, r4, r7
addi r6, r6, 16
vperm v1, v1, v0, v5
vmrghb v3, v0, v1 ;# unpack high src to short
vmrghb v4, v0, v2 ;# unpack high pred to short
lvsl v5, 0, r4 ;# permutate value for alignment
lvx v1, 0, r4 ;# src
add r4, r4, r7
vsubshs v3, v3, v4
stvx v3, 0, r3 ;# store out diff
vperm v1, v1, v0, v5
vmrghb v3, v0, v1 ;# unpack high src to short
vmrglb v4, v0, v2 ;# unpack high pred to short
vsubshs v3, v3, v4
stvx v3, r10, r3 ;# store out diff
addi r3, r3, 32
bdnz mbu_loop
mtctr r9
mbv_loop:
lvsl v5, 0, r5 ;# permutate value for alignment
lvx v1, 0, r5 ;# src
lvx v2, 0, r6 ;# pred
add r5, r5, r7
addi r6, r6, 16
vperm v1, v1, v0, v5
vmrghb v3, v0, v1 ;# unpack high src to short
vmrghb v4, v0, v2 ;# unpack high pred to short
lvsl v5, 0, r5 ;# permutate value for alignment
lvx v1, 0, r5 ;# src
add r5, r5, r7
vsubshs v3, v3, v4
stvx v3, 0, r3 ;# store out diff
vperm v1, v1, v0, v5
vmrghb v3, v0, v1 ;# unpack high src to short
vmrglb v4, v0, v2 ;# unpack high pred to short
vsubshs v3, v3, v4
stvx v3, r10, r3 ;# store out diff
addi r3, r3, 32
bdnz mbv_loop
mtspr 256, r11 ;# reset old VRSAVE
blr
;# r3 short *diff
;# r4 unsigned char *src
;# r5 unsigned char *pred
;# r6 int stride
vp8_subtract_mby_ppc:
mfspr r11, 256 ;# get old VRSAVE
oris r12, r11, 0xf800
mtspr 256, r12 ;# set VRSAVE
li r10, 16
mtctr r10
vspltisw v0, 0
mby_loop:
lvx v1, 0, r4 ;# src
lvx v2, 0, r5 ;# pred
add r4, r4, r6
addi r5, r5, 16
vmrghb v3, v0, v1 ;# unpack high src to short
vmrghb v4, v0, v2 ;# unpack high pred to short
vsubshs v3, v3, v4
stvx v3, 0, r3 ;# store out diff
vmrglb v3, v0, v1 ;# unpack low src to short
vmrglb v4, v0, v2 ;# unpack low pred to short
vsubshs v3, v3, v4
stvx v3, r10, r3 ;# store out diff
addi r3, r3, 32
bdnz mby_loop
mtspr 256, r11 ;# reset old VRSAVE
blr
|
db DEX_DODUO ; pokedex id
db 35 ; base hp
db 85 ; base attack
db 45 ; base defense
db 75 ; base speed
db 35 ; base special
db GROUND ; species type 1
db FLYING ; species type 2
db 37 ; catch rate, carbos
db 96 ; base exp yield
INCBIN "pic/ymon/doduo.pic",0,1 ; 55, sprite dimensions
dw DoduoPicFront
dw DoduoPicBack
; attacks known at lvl 0
db PECK
db DIG
db 0
db 0
db 0 ; growth rate
; learnset
tmlearn 4,6,8
tmlearn 9,10
tmlearn 20
tmlearn 31,32
tmlearn 33,34,40
tmlearn 43,44
tmlearn 49,50,52
db BANK(DoduoPicFront)
|
// Copyright 2011 The Kyua Authors.
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are
// met:
//
// * Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
// * Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
// * Neither the name of Google Inc. nor the names of its contributors
// may be used to endorse or promote products derived from this software
// without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#include "engine/filters.hpp"
#include <stdexcept>
#include <atf-c++.hpp>
namespace fs = utils::fs;
namespace {
/// Syntactic sugar to instantiate engine::test_filter objects.
///
/// \param test_program Test program.
/// \param test_case Test case.
///
/// \return A \p test_filter object, based on \p test_program and \p test_case.
inline engine::test_filter
mkfilter(const char* test_program, const char* test_case)
{
return engine::test_filter(fs::path(test_program), test_case);
}
} // anonymous namespace
ATF_TEST_CASE_WITHOUT_HEAD(test_filter__public_fields);
ATF_TEST_CASE_BODY(test_filter__public_fields)
{
const engine::test_filter filter(fs::path("foo/bar"), "baz");
ATF_REQUIRE_EQ(fs::path("foo/bar"), filter.test_program);
ATF_REQUIRE_EQ("baz", filter.test_case);
}
ATF_TEST_CASE_WITHOUT_HEAD(test_filter__parse__ok);
ATF_TEST_CASE_BODY(test_filter__parse__ok)
{
const engine::test_filter filter(engine::test_filter::parse("foo"));
ATF_REQUIRE_EQ(fs::path("foo"), filter.test_program);
ATF_REQUIRE(filter.test_case.empty());
}
ATF_TEST_CASE_WITHOUT_HEAD(test_filter__parse__empty);
ATF_TEST_CASE_BODY(test_filter__parse__empty)
{
ATF_REQUIRE_THROW_RE(std::runtime_error, "empty",
engine::test_filter::parse(""));
}
ATF_TEST_CASE_WITHOUT_HEAD(test_filter__parse__absolute);
ATF_TEST_CASE_BODY(test_filter__parse__absolute)
{
ATF_REQUIRE_THROW_RE(std::runtime_error, "'/foo/bar'.*relative",
engine::test_filter::parse("/foo//bar"));
}
ATF_TEST_CASE_WITHOUT_HEAD(test_filter__parse__bad_program_name);
ATF_TEST_CASE_BODY(test_filter__parse__bad_program_name)
{
ATF_REQUIRE_THROW_RE(std::runtime_error, "Program name.*':foo'",
engine::test_filter::parse(":foo"));
}
ATF_TEST_CASE_WITHOUT_HEAD(test_filter__parse__bad_test_case);
ATF_TEST_CASE_BODY(test_filter__parse__bad_test_case)
{
ATF_REQUIRE_THROW_RE(std::runtime_error, "Test case.*'bar/baz:'",
engine::test_filter::parse("bar/baz:"));
}
ATF_TEST_CASE_WITHOUT_HEAD(test_filter__parse__bad_path);
ATF_TEST_CASE_BODY(test_filter__parse__bad_path)
{
// TODO(jmmv): Not implemented. At the moment, the only reason for a path
// to be invalid is if it is empty... but we are checking this exact
// condition ourselves as part of the input validation. So we can't mock in
// an argument with an invalid non-empty path...
}
ATF_TEST_CASE_WITHOUT_HEAD(test_filter__str);
ATF_TEST_CASE_BODY(test_filter__str)
{
const engine::test_filter filter(fs::path("foo/bar"), "baz");
ATF_REQUIRE_EQ("foo/bar:baz", filter.str());
}
ATF_TEST_CASE_WITHOUT_HEAD(test_filter__contains__same);
ATF_TEST_CASE_BODY(test_filter__contains__same)
{
{
const engine::test_filter f(fs::path("foo/bar"), "baz");
ATF_REQUIRE(f.contains(f));
}
{
const engine::test_filter f(fs::path("foo/bar"), "");
ATF_REQUIRE(f.contains(f));
}
{
const engine::test_filter f(fs::path("foo"), "");
ATF_REQUIRE(f.contains(f));
}
}
ATF_TEST_CASE_WITHOUT_HEAD(test_filter__contains__different);
ATF_TEST_CASE_BODY(test_filter__contains__different)
{
{
const engine::test_filter f1(fs::path("foo"), "");
const engine::test_filter f2(fs::path("foo"), "bar");
ATF_REQUIRE( f1.contains(f2));
ATF_REQUIRE(!f2.contains(f1));
}
{
const engine::test_filter f1(fs::path("foo/bar"), "");
const engine::test_filter f2(fs::path("foo/bar"), "baz");
ATF_REQUIRE( f1.contains(f2));
ATF_REQUIRE(!f2.contains(f1));
}
{
const engine::test_filter f1(fs::path("foo/bar"), "");
const engine::test_filter f2(fs::path("foo/baz"), "");
ATF_REQUIRE(!f1.contains(f2));
ATF_REQUIRE(!f2.contains(f1));
}
{
const engine::test_filter f1(fs::path("foo"), "");
const engine::test_filter f2(fs::path("foo/bar"), "");
ATF_REQUIRE( f1.contains(f2));
ATF_REQUIRE(!f2.contains(f1));
}
{
const engine::test_filter f1(fs::path("foo"), "bar");
const engine::test_filter f2(fs::path("foo/bar"), "");
ATF_REQUIRE(!f1.contains(f2));
ATF_REQUIRE(!f2.contains(f1));
}
}
ATF_TEST_CASE_WITHOUT_HEAD(test_filter__matches_test_program)
ATF_TEST_CASE_BODY(test_filter__matches_test_program)
{
{
const engine::test_filter f(fs::path("top"), "unused");
ATF_REQUIRE( f.matches_test_program(fs::path("top")));
ATF_REQUIRE(!f.matches_test_program(fs::path("top2")));
}
{
const engine::test_filter f(fs::path("dir1/dir2"), "");
ATF_REQUIRE( f.matches_test_program(fs::path("dir1/dir2/foo")));
ATF_REQUIRE( f.matches_test_program(fs::path("dir1/dir2/bar")));
ATF_REQUIRE( f.matches_test_program(fs::path("dir1/dir2/bar/baz")));
ATF_REQUIRE( f.matches_test_program(fs::path("dir1/dir2/bar/baz")));
ATF_REQUIRE(!f.matches_test_program(fs::path("dir1")));
ATF_REQUIRE(!f.matches_test_program(fs::path("dir1/bar/baz")));
ATF_REQUIRE(!f.matches_test_program(fs::path("dir2/bar/baz")));
}
{
const engine::test_filter f(fs::path("dir1/dir2"), "unused");
ATF_REQUIRE( f.matches_test_program(fs::path("dir1/dir2")));
ATF_REQUIRE(!f.matches_test_program(fs::path("dir1/dir2/foo")));
ATF_REQUIRE(!f.matches_test_program(fs::path("dir1/dir2/bar")));
ATF_REQUIRE(!f.matches_test_program(fs::path("dir1/dir2/bar/baz")));
ATF_REQUIRE(!f.matches_test_program(fs::path("dir1/dir2/bar/baz")));
ATF_REQUIRE(!f.matches_test_program(fs::path("dir1")));
ATF_REQUIRE(!f.matches_test_program(fs::path("dir1/bar/baz")));
ATF_REQUIRE(!f.matches_test_program(fs::path("dir2/bar/baz")));
}
}
ATF_TEST_CASE_WITHOUT_HEAD(test_filter__matches_test_case)
ATF_TEST_CASE_BODY(test_filter__matches_test_case)
{
{
const engine::test_filter f(fs::path("top"), "foo");
ATF_REQUIRE( f.matches_test_case(fs::path("top"), "foo"));
ATF_REQUIRE(!f.matches_test_case(fs::path("top"), "bar"));
}
{
const engine::test_filter f(fs::path("top"), "");
ATF_REQUIRE( f.matches_test_case(fs::path("top"), "foo"));
ATF_REQUIRE( f.matches_test_case(fs::path("top"), "bar"));
ATF_REQUIRE(!f.matches_test_case(fs::path("top2"), "foo"));
}
{
const engine::test_filter f(fs::path("d1/d2/prog"), "t1");
ATF_REQUIRE( f.matches_test_case(fs::path("d1/d2/prog"), "t1"));
ATF_REQUIRE(!f.matches_test_case(fs::path("d1/d2/prog"), "t2"));
}
{
const engine::test_filter f(fs::path("d1/d2"), "");
ATF_REQUIRE( f.matches_test_case(fs::path("d1/d2/prog"), "t1"));
ATF_REQUIRE( f.matches_test_case(fs::path("d1/d2/prog"), "t2"));
ATF_REQUIRE( f.matches_test_case(fs::path("d1/d2/prog2"), "t2"));
ATF_REQUIRE(!f.matches_test_case(fs::path("d1/d3"), "foo"));
ATF_REQUIRE(!f.matches_test_case(fs::path("d2"), "foo"));
}
}
ATF_TEST_CASE_WITHOUT_HEAD(test_filter__operator_lt)
ATF_TEST_CASE_BODY(test_filter__operator_lt)
{
{
const engine::test_filter f1(fs::path("d1/d2"), "");
ATF_REQUIRE(!(f1 < f1));
}
{
const engine::test_filter f1(fs::path("d1/d2"), "");
const engine::test_filter f2(fs::path("d1/d3"), "");
ATF_REQUIRE( (f1 < f2));
ATF_REQUIRE(!(f2 < f1));
}
{
const engine::test_filter f1(fs::path("d1/d2"), "");
const engine::test_filter f2(fs::path("d1/d2"), "foo");
ATF_REQUIRE( (f1 < f2));
ATF_REQUIRE(!(f2 < f1));
}
{
const engine::test_filter f1(fs::path("d1/d2"), "bar");
const engine::test_filter f2(fs::path("d1/d2"), "foo");
ATF_REQUIRE( (f1 < f2));
ATF_REQUIRE(!(f2 < f1));
}
{
const engine::test_filter f1(fs::path("d1/d2"), "bar");
const engine::test_filter f2(fs::path("d1/d3"), "");
ATF_REQUIRE( (f1 < f2));
ATF_REQUIRE(!(f2 < f1));
}
}
ATF_TEST_CASE_WITHOUT_HEAD(test_filter__operator_eq)
ATF_TEST_CASE_BODY(test_filter__operator_eq)
{
const engine::test_filter f1(fs::path("d1/d2"), "");
const engine::test_filter f2(fs::path("d1/d2"), "bar");
ATF_REQUIRE( (f1 == f1));
ATF_REQUIRE(!(f1 == f2));
ATF_REQUIRE(!(f2 == f1));
ATF_REQUIRE( (f2 == f2));
}
ATF_TEST_CASE_WITHOUT_HEAD(test_filter__operator_ne)
ATF_TEST_CASE_BODY(test_filter__operator_ne)
{
const engine::test_filter f1(fs::path("d1/d2"), "");
const engine::test_filter f2(fs::path("d1/d2"), "bar");
ATF_REQUIRE(!(f1 != f1));
ATF_REQUIRE( (f1 != f2));
ATF_REQUIRE( (f2 != f1));
ATF_REQUIRE(!(f2 != f2));
}
ATF_TEST_CASE_WITHOUT_HEAD(test_filter__output);
ATF_TEST_CASE_BODY(test_filter__output)
{
{
std::ostringstream str;
str << engine::test_filter(fs::path("d1/d2"), "");
ATF_REQUIRE_EQ(
"test_filter{test_program=d1/d2}",
str.str());
}
{
std::ostringstream str;
str << engine::test_filter(fs::path("d1/d2"), "bar");
ATF_REQUIRE_EQ(
"test_filter{test_program=d1/d2, test_case=bar}",
str.str());
}
}
ATF_TEST_CASE_WITHOUT_HEAD(test_filters__match_test_case__no_filters)
ATF_TEST_CASE_BODY(test_filters__match_test_case__no_filters)
{
const std::set< engine::test_filter > raw_filters;
const engine::test_filters filters(raw_filters);
engine::test_filters::match match;
match = filters.match_test_case(fs::path("foo"), "baz");
ATF_REQUIRE(match.first);
ATF_REQUIRE(!match.second);
match = filters.match_test_case(fs::path("foo/bar"), "baz");
ATF_REQUIRE(match.first);
ATF_REQUIRE(!match.second);
}
ATF_TEST_CASE_WITHOUT_HEAD(test_filters__match_test_case__some_filters)
ATF_TEST_CASE_BODY(test_filters__match_test_case__some_filters)
{
std::set< engine::test_filter > raw_filters;
raw_filters.insert(mkfilter("top_test", ""));
raw_filters.insert(mkfilter("subdir_1", ""));
raw_filters.insert(mkfilter("subdir_2/a_test", ""));
raw_filters.insert(mkfilter("subdir_2/b_test", "foo"));
const engine::test_filters filters(raw_filters);
engine::test_filters::match match;
match = filters.match_test_case(fs::path("top_test"), "a");
ATF_REQUIRE(match.first);
ATF_REQUIRE_EQ("top_test", match.second.get().str());
match = filters.match_test_case(fs::path("subdir_1/foo"), "a");
ATF_REQUIRE(match.first);
ATF_REQUIRE_EQ("subdir_1", match.second.get().str());
match = filters.match_test_case(fs::path("subdir_1/bar"), "z");
ATF_REQUIRE(match.first);
ATF_REQUIRE_EQ("subdir_1", match.second.get().str());
match = filters.match_test_case(fs::path("subdir_2/a_test"), "bar");
ATF_REQUIRE(match.first);
ATF_REQUIRE_EQ("subdir_2/a_test", match.second.get().str());
match = filters.match_test_case(fs::path("subdir_2/b_test"), "foo");
ATF_REQUIRE(match.first);
ATF_REQUIRE_EQ("subdir_2/b_test:foo", match.second.get().str());
match = filters.match_test_case(fs::path("subdir_2/b_test"), "bar");
ATF_REQUIRE(!match.first);
match = filters.match_test_case(fs::path("subdir_2/c_test"), "foo");
ATF_REQUIRE(!match.first);
match = filters.match_test_case(fs::path("subdir_3"), "hello");
ATF_REQUIRE(!match.first);
}
ATF_TEST_CASE_WITHOUT_HEAD(test_filters__match_test_program__no_filters)
ATF_TEST_CASE_BODY(test_filters__match_test_program__no_filters)
{
const std::set< engine::test_filter > raw_filters;
const engine::test_filters filters(raw_filters);
ATF_REQUIRE(filters.match_test_program(fs::path("foo")));
ATF_REQUIRE(filters.match_test_program(fs::path("foo/bar")));
}
ATF_TEST_CASE_WITHOUT_HEAD(test_filters__match_test_program__some_filters)
ATF_TEST_CASE_BODY(test_filters__match_test_program__some_filters)
{
std::set< engine::test_filter > raw_filters;
raw_filters.insert(mkfilter("top_test", ""));
raw_filters.insert(mkfilter("subdir_1", ""));
raw_filters.insert(mkfilter("subdir_2/a_test", ""));
raw_filters.insert(mkfilter("subdir_2/b_test", "foo"));
const engine::test_filters filters(raw_filters);
ATF_REQUIRE( filters.match_test_program(fs::path("top_test")));
ATF_REQUIRE( filters.match_test_program(fs::path("subdir_1/foo")));
ATF_REQUIRE( filters.match_test_program(fs::path("subdir_1/bar")));
ATF_REQUIRE( filters.match_test_program(fs::path("subdir_2/a_test")));
ATF_REQUIRE( filters.match_test_program(fs::path("subdir_2/b_test")));
ATF_REQUIRE(!filters.match_test_program(fs::path("subdir_2/c_test")));
ATF_REQUIRE(!filters.match_test_program(fs::path("subdir_3")));
}
ATF_TEST_CASE_WITHOUT_HEAD(test_filters__difference__no_filters);
ATF_TEST_CASE_BODY(test_filters__difference__no_filters)
{
const std::set< engine::test_filter > in_filters;
const std::set< engine::test_filter > used;
const std::set< engine::test_filter > diff = engine::test_filters(
in_filters).difference(used);
ATF_REQUIRE(diff.empty());
}
ATF_TEST_CASE_WITHOUT_HEAD(test_filters__difference__some_filters__all_used);
ATF_TEST_CASE_BODY(test_filters__difference__some_filters__all_used)
{
std::set< engine::test_filter > in_filters;
in_filters.insert(mkfilter("a", ""));
in_filters.insert(mkfilter("b", "c"));
const std::set< engine::test_filter > used = in_filters;
const std::set< engine::test_filter > diff = engine::test_filters(
in_filters).difference(used);
ATF_REQUIRE(diff.empty());
}
ATF_TEST_CASE_WITHOUT_HEAD(test_filters__difference__some_filters__some_unused);
ATF_TEST_CASE_BODY(test_filters__difference__some_filters__some_unused)
{
std::set< engine::test_filter > in_filters;
in_filters.insert(mkfilter("a", ""));
in_filters.insert(mkfilter("b", "c"));
in_filters.insert(mkfilter("d", ""));
in_filters.insert(mkfilter("e", "f"));
std::set< engine::test_filter > used;
used.insert(mkfilter("b", "c"));
used.insert(mkfilter("d", ""));
const std::set< engine::test_filter > diff = engine::test_filters(
in_filters).difference(used);
ATF_REQUIRE_EQ(2, diff.size());
ATF_REQUIRE(diff.find(mkfilter("a", "")) != diff.end());
ATF_REQUIRE(diff.find(mkfilter("e", "f")) != diff.end());
}
ATF_TEST_CASE_WITHOUT_HEAD(check_disjoint_filters__ok);
ATF_TEST_CASE_BODY(check_disjoint_filters__ok)
{
std::set< engine::test_filter > filters;
filters.insert(mkfilter("a", ""));
filters.insert(mkfilter("b", ""));
filters.insert(mkfilter("c", "a"));
filters.insert(mkfilter("c", "b"));
engine::check_disjoint_filters(filters);
}
ATF_TEST_CASE_WITHOUT_HEAD(check_disjoint_filters__fail);
ATF_TEST_CASE_BODY(check_disjoint_filters__fail)
{
std::set< engine::test_filter > filters;
filters.insert(mkfilter("a", ""));
filters.insert(mkfilter("b", ""));
filters.insert(mkfilter("c", "a"));
filters.insert(mkfilter("d", "b"));
filters.insert(mkfilter("c", ""));
ATF_REQUIRE_THROW_RE(std::runtime_error, "'c'.*'c:a'.*not disjoint",
engine::check_disjoint_filters(filters));
}
ATF_TEST_CASE_WITHOUT_HEAD(filters_state__match_test_program);
ATF_TEST_CASE_BODY(filters_state__match_test_program)
{
std::set< engine::test_filter > filters;
filters.insert(mkfilter("foo/bar", ""));
filters.insert(mkfilter("baz", "tc"));
engine::filters_state state(filters);
ATF_REQUIRE(state.match_test_program(fs::path("foo/bar/something")));
ATF_REQUIRE(state.match_test_program(fs::path("baz")));
ATF_REQUIRE(!state.match_test_program(fs::path("foo/baz")));
ATF_REQUIRE(!state.match_test_program(fs::path("hello")));
}
ATF_TEST_CASE_WITHOUT_HEAD(filters_state__match_test_case);
ATF_TEST_CASE_BODY(filters_state__match_test_case)
{
std::set< engine::test_filter > filters;
filters.insert(mkfilter("foo/bar", ""));
filters.insert(mkfilter("baz", "tc"));
engine::filters_state state(filters);
ATF_REQUIRE(state.match_test_case(fs::path("foo/bar/something"), "any"));
ATF_REQUIRE(state.match_test_case(fs::path("baz"), "tc"));
ATF_REQUIRE(!state.match_test_case(fs::path("foo/baz/something"), "tc"));
ATF_REQUIRE(!state.match_test_case(fs::path("baz"), "tc2"));
}
ATF_TEST_CASE_WITHOUT_HEAD(filters_state__unused__none);
ATF_TEST_CASE_BODY(filters_state__unused__none)
{
std::set< engine::test_filter > filters;
filters.insert(mkfilter("a/b", ""));
filters.insert(mkfilter("baz", "tc"));
filters.insert(mkfilter("hey/d", "yes"));
engine::filters_state state(filters);
state.match_test_case(fs::path("a/b/c"), "any");
state.match_test_case(fs::path("baz"), "tc");
state.match_test_case(fs::path("hey/d"), "yes");
ATF_REQUIRE(state.unused().empty());
}
ATF_TEST_CASE_WITHOUT_HEAD(filters_state__unused__some);
ATF_TEST_CASE_BODY(filters_state__unused__some)
{
std::set< engine::test_filter > filters;
filters.insert(mkfilter("a/b", ""));
filters.insert(mkfilter("baz", "tc"));
filters.insert(mkfilter("hey/d", "yes"));
engine::filters_state state(filters);
state.match_test_program(fs::path("a/b/c"));
state.match_test_case(fs::path("baz"), "tc");
std::set< engine::test_filter > exp_unused;
exp_unused.insert(mkfilter("a/b", ""));
exp_unused.insert(mkfilter("hey/d", "yes"));
ATF_REQUIRE(exp_unused == state.unused());
}
ATF_INIT_TEST_CASES(tcs)
{
ATF_ADD_TEST_CASE(tcs, test_filter__public_fields);
ATF_ADD_TEST_CASE(tcs, test_filter__parse__ok);
ATF_ADD_TEST_CASE(tcs, test_filter__parse__empty);
ATF_ADD_TEST_CASE(tcs, test_filter__parse__absolute);
ATF_ADD_TEST_CASE(tcs, test_filter__parse__bad_program_name);
ATF_ADD_TEST_CASE(tcs, test_filter__parse__bad_test_case);
ATF_ADD_TEST_CASE(tcs, test_filter__parse__bad_path);
ATF_ADD_TEST_CASE(tcs, test_filter__str);
ATF_ADD_TEST_CASE(tcs, test_filter__contains__same);
ATF_ADD_TEST_CASE(tcs, test_filter__contains__different);
ATF_ADD_TEST_CASE(tcs, test_filter__matches_test_program);
ATF_ADD_TEST_CASE(tcs, test_filter__matches_test_case);
ATF_ADD_TEST_CASE(tcs, test_filter__operator_lt);
ATF_ADD_TEST_CASE(tcs, test_filter__operator_eq);
ATF_ADD_TEST_CASE(tcs, test_filter__operator_ne);
ATF_ADD_TEST_CASE(tcs, test_filter__output);
ATF_ADD_TEST_CASE(tcs, test_filters__match_test_case__no_filters);
ATF_ADD_TEST_CASE(tcs, test_filters__match_test_case__some_filters);
ATF_ADD_TEST_CASE(tcs, test_filters__match_test_program__no_filters);
ATF_ADD_TEST_CASE(tcs, test_filters__match_test_program__some_filters);
ATF_ADD_TEST_CASE(tcs, test_filters__difference__no_filters);
ATF_ADD_TEST_CASE(tcs, test_filters__difference__some_filters__all_used);
ATF_ADD_TEST_CASE(tcs, test_filters__difference__some_filters__some_unused);
ATF_ADD_TEST_CASE(tcs, check_disjoint_filters__ok);
ATF_ADD_TEST_CASE(tcs, check_disjoint_filters__fail);
ATF_ADD_TEST_CASE(tcs, filters_state__match_test_program);
ATF_ADD_TEST_CASE(tcs, filters_state__match_test_case);
ATF_ADD_TEST_CASE(tcs, filters_state__unused__none);
ATF_ADD_TEST_CASE(tcs, filters_state__unused__some);
}
|
; A176006: The number of branching configurations of RNA (see Sankoff, 1985) with n or fewer hairpins.
; Submitted by Jon Maiga
; 1,2,4,10,32,122,516,2322,10880,52466,258564,1296282,6589728,33887466,175966212,921353250,4858956288,25786112994,137604139012,737922992938,3974647310112,21493266631002,116642921832964,635074797251890,3467998148181632,18989465797056722,104239408386028036,573525556257865402,3162284447218503200,17470690556316346826,96698722376309481476,536141504991923843138,2977404514238099695616,16559690128452002885570,92232235466248463785988,514390763273169713469002,2872435798269986809987616
mov $1,$0
mov $3,$0
add $3,1
lpb $3
mov $0,$1
sub $3,1
sub $0,$3
trn $0,1
seq $0,6318 ; Large Schröder numbers (or large Schroeder numbers, or big Schroeder numbers).
add $2,$0
lpe
mov $0,$2
|
/*!
* Copyright (c) 2016 by Contributors
*/
#include <string>
#include <vector>
#include "include/c_api.h"
#include "include/logging.h"
#include "image_pred.hpp"
class BufferFile {
public :
explicit BufferFile(const std::string & file_path);
int getLength() {return length_;}
char* getBuffer() {return buffer_;}
~BufferFile();
private:
std::string file_path_;
int length_;
char* buffer_;
};
BufferFile::BufferFile(const std::string & file_path) {
file_path_ = file_path;
std::ifstream ifs(file_path.c_str(), std::ios::in | std::ios::binary);
ifs.seekg(0, std::ios::end);
length_ = ifs.tellg();
ifs.seekg(0, std::ios::beg);
buffer_ = new char[sizeof(char) * length_];
ifs.read(buffer_, length_);
ifs.close();
}
BufferFile::~BufferFile() {
delete[] buffer_;
buffer_ = NULL;
}
std::vector<std::string> loadSynset(const std::string & filename) {
std::ifstream fi(filename.c_str());
std::vector<std::string> output;
std::string synset, lemma;
while ( fi >> synset ) {
getline(fi, lemma);
output.push_back(lemma);
}
fi.close();
return output;
}
ImagePred::ImagePred(int w, int h, int c) {
width = w;
height = h;
channels = c;
image_size = width * height * channels;
dev_type = 1;
dev_id = 0;
pred_hnd = 0;
}
void ImagePred::setSeed(int seed) {
MXRandomSeed(seed);
}
void ImagePred::loadInception() {
loadModel();
}
void ImagePred::loadModel() {
synset = loadSynset(model_path_ + "/synset.txt");
BufferFile json_data(model_path_ + "/Inception_BN-symbol.json");
BufferFile param_data(model_path_ + "/Inception_BN-0039.params");
BufferFile nd_buf(model_path_ + "/mean_224.nd");
mx_uint nd_index = 0;
mx_uint nd_len;
mx_uint nd_ndim = 0;
const char* nd_key = 0;
const mx_uint* nd_shape = 0;
MXNDListCreate((const char*)nd_buf.getBuffer(), nd_buf.getLength(), &nd_hnd, &nd_len);
MXNDListGet(nd_hnd, nd_index, &nd_key, &nd_data, &nd_shape, &nd_ndim);
const mx_uint input_shape_indptr[2] = {0, 4};
const mx_uint input_shape_data[4] = {
1,
static_cast<mx_uint>(channels),
static_cast<mx_uint>(width),
static_cast<mx_uint>(height)
};
mx_uint num_input_nodes = 1; // 1 for feedforward
const char* input_key[1] = {"data"};
const char** input_keys = input_key;
MXPredCreate((const char*)json_data.getBuffer(),
(const char*)param_data.getBuffer(),
static_cast<size_t>(param_data.getLength()),
dev_type,
dev_id,
num_input_nodes,
input_keys,
input_shape_indptr,
input_shape_data,
&pred_hnd);
}
std::string ImagePred::predict(float * image_data) {
for (int i = 0; i < image_size; i++) {
image_data[i] = image_data[i] - nd_data[i];
}
MXPredSetInput(pred_hnd, "data", image_data, image_size);
MXPredForward(pred_hnd);
mx_uint output_index = 0;
mx_uint *shape = 0;
mx_uint shape_len;
MXPredGetOutputShape(pred_hnd, output_index, &shape, &shape_len);
size_t size = 1;
for (mx_uint i = 0; i < shape_len; ++i) size *= shape[i];
std::vector<float> data(size);
MXPredGetOutput(pred_hnd, output_index, &(data[0]), size);
int K = 5;
std::vector<int> topK(K);
for ( size_t i = 0; i < data.size(); i++ ) {
for ( size_t j = 0; j < (size_t)K; j++ ) {
if ( data[i] > data[topK[j]] ) {
topK[j] = i;
break;
}
}
}
std::string res = "\nTop " + std::to_string(K) + " predictions:\n";
for ( size_t j = 0; j < (size_t)K; j++ ) {
res += " Score: " + std::to_string(data[topK[j]]) + "\t" + synset[topK[j]] + "\n";
}
LG << res;
return res;
}
std::vector<float> ImagePred::predict_probs(float * image_data) {
for (int i = 0; i < image_size; i++) {
image_data[i] = image_data[i] - nd_data[i];
}
MXPredSetInput(pred_hnd, "data", image_data, image_size);
MXPredForward(pred_hnd);
mx_uint output_index = 0;
mx_uint *shape = 0;
mx_uint shape_len;
MXPredGetOutputShape(pred_hnd, output_index, &shape, &shape_len);
size_t size = 1;
for (mx_uint i = 0; i < shape_len; ++i) size *= shape[i];
std::vector<float> data(size);
MXPredGetOutput(pred_hnd, output_index, &(data[0]), size);
return data;
}
ImagePred::~ImagePred() {
MXNDListFree(nd_hnd);
MXPredFree(pred_hnd);
delete[] nd_data;
}
|
#include "extensions/filters/network/dubbo_proxy/router/router_impl.h"
#include "envoy/upstream/cluster_manager.h"
#include "envoy/upstream/thread_local_cluster.h"
#include "extensions/filters/network/dubbo_proxy/app_exception.h"
namespace Envoy {
namespace Extensions {
namespace NetworkFilters {
namespace DubboProxy {
namespace Router {
void Router::onDestroy() {
if (upstream_request_) {
upstream_request_->resetStream();
}
cleanup();
}
void Router::setDecoderFilterCallbacks(DubboFilters::DecoderFilterCallbacks& callbacks) {
callbacks_ = &callbacks;
}
FilterStatus Router::onMessageDecoded(MessageMetadataSharedPtr metadata, ContextSharedPtr ctx) {
ASSERT(metadata->hasInvocationInfo());
const auto& invocation = metadata->invocationInfo();
route_ = callbacks_->route();
if (!route_) {
ENVOY_STREAM_LOG(debug, "dubbo router: no cluster match for interface '{}'", *callbacks_,
invocation.serviceName());
callbacks_->sendLocalReply(AppException(ResponseStatus::ServiceNotFound,
fmt::format("dubbo router: no route for interface '{}'",
invocation.serviceName())),
false);
return FilterStatus::StopIteration;
}
route_entry_ = route_->routeEntry();
Upstream::ThreadLocalCluster* cluster = cluster_manager_.get(route_entry_->clusterName());
if (!cluster) {
ENVOY_STREAM_LOG(debug, "dubbo router: unknown cluster '{}'", *callbacks_,
route_entry_->clusterName());
callbacks_->sendLocalReply(
AppException(ResponseStatus::ServerError, fmt::format("dubbo router: unknown cluster '{}'",
route_entry_->clusterName())),
false);
return FilterStatus::StopIteration;
}
cluster_ = cluster->info();
ENVOY_STREAM_LOG(debug, "dubbo router: cluster '{}' match for interface '{}'", *callbacks_,
route_entry_->clusterName(), invocation.serviceName());
if (cluster_->maintenanceMode()) {
callbacks_->sendLocalReply(
AppException(ResponseStatus::ServerError,
fmt::format("dubbo router: maintenance mode for cluster '{}'",
route_entry_->clusterName())),
false);
return FilterStatus::StopIteration;
}
Tcp::ConnectionPool::Instance* conn_pool = cluster_manager_.tcpConnPoolForCluster(
route_entry_->clusterName(), Upstream::ResourcePriority::Default, this);
if (!conn_pool) {
callbacks_->sendLocalReply(
AppException(
ResponseStatus::ServerError,
fmt::format("dubbo router: no healthy upstream for '{}'", route_entry_->clusterName())),
false);
return FilterStatus::StopIteration;
}
ENVOY_STREAM_LOG(debug, "dubbo router: decoding request", *callbacks_);
upstream_request_buffer_.move(ctx->messageOriginData(), ctx->messageSize());
upstream_request_ = std::make_unique<UpstreamRequest>(
*this, *conn_pool, metadata, callbacks_->serializationType(), callbacks_->protocolType());
return upstream_request_->start();
}
void Router::onUpstreamData(Buffer::Instance& data, bool end_stream) {
ASSERT(!upstream_request_->response_complete_);
ENVOY_STREAM_LOG(trace, "dubbo router: reading response: {} bytes", *callbacks_, data.length());
// Handle normal response.
if (!upstream_request_->response_started_) {
callbacks_->startUpstreamResponse();
upstream_request_->response_started_ = true;
}
DubboFilters::UpstreamResponseStatus status = callbacks_->upstreamData(data);
if (status == DubboFilters::UpstreamResponseStatus::Complete) {
ENVOY_STREAM_LOG(debug, "dubbo router: response complete", *callbacks_);
upstream_request_->onResponseComplete();
cleanup();
return;
} else if (status == DubboFilters::UpstreamResponseStatus::Reset) {
ENVOY_STREAM_LOG(debug, "dubbo router: upstream reset", *callbacks_);
// When the upstreamData function returns Reset,
// the current stream is already released from the upper layer,
// so there is no need to call callbacks_->resetStream() to notify
// the upper layer to release the stream.
upstream_request_->resetStream();
return;
}
if (end_stream) {
// Response is incomplete, but no more data is coming.
ENVOY_STREAM_LOG(debug, "dubbo router: response underflow", *callbacks_);
upstream_request_->onResetStream(ConnectionPool::PoolFailureReason::RemoteConnectionFailure);
upstream_request_->onResponseComplete();
cleanup();
}
}
void Router::onEvent(Network::ConnectionEvent event) {
if (!upstream_request_ || upstream_request_->response_complete_) {
// Client closed connection after completing response.
ENVOY_LOG(debug, "dubbo upstream request: the upstream request had completed");
return;
}
if (upstream_request_->stream_reset_ && event == Network::ConnectionEvent::LocalClose) {
ENVOY_LOG(debug, "dubbo upstream request: the stream reset");
return;
}
switch (event) {
case Network::ConnectionEvent::RemoteClose:
upstream_request_->onResetStream(ConnectionPool::PoolFailureReason::RemoteConnectionFailure);
break;
case Network::ConnectionEvent::LocalClose:
upstream_request_->onResetStream(ConnectionPool::PoolFailureReason::LocalConnectionFailure);
break;
default:
// Connected is consumed by the connection pool.
NOT_REACHED_GCOVR_EXCL_LINE;
}
}
const Network::Connection* Router::downstreamConnection() const {
return callbacks_ != nullptr ? callbacks_->connection() : nullptr;
}
void Router::cleanup() {
if (upstream_request_) {
upstream_request_.reset();
}
}
Router::UpstreamRequest::UpstreamRequest(Router& parent, Tcp::ConnectionPool::Instance& pool,
MessageMetadataSharedPtr& metadata,
SerializationType serialization_type,
ProtocolType protocol_type)
: parent_(parent), conn_pool_(pool), metadata_(metadata),
protocol_(
NamedProtocolConfigFactory::getFactory(protocol_type).createProtocol(serialization_type)),
request_complete_(false), response_started_(false), response_complete_(false),
stream_reset_(false) {}
Router::UpstreamRequest::~UpstreamRequest() = default;
FilterStatus Router::UpstreamRequest::start() {
Tcp::ConnectionPool::Cancellable* handle = conn_pool_.newConnection(*this);
if (handle) {
// Pause while we wait for a connection.
conn_pool_handle_ = handle;
return FilterStatus::StopIteration;
}
return FilterStatus::Continue;
}
void Router::UpstreamRequest::resetStream() {
stream_reset_ = true;
if (conn_pool_handle_) {
ASSERT(!conn_data_);
conn_pool_handle_->cancel(Tcp::ConnectionPool::CancelPolicy::Default);
conn_pool_handle_ = nullptr;
ENVOY_LOG(debug, "dubbo upstream request: reset connection pool handler");
}
if (conn_data_) {
ASSERT(!conn_pool_handle_);
conn_data_->connection().close(Network::ConnectionCloseType::NoFlush);
conn_data_.reset();
ENVOY_LOG(debug, "dubbo upstream request: reset connection data");
}
}
void Router::UpstreamRequest::encodeData(Buffer::Instance& data) {
ASSERT(conn_data_);
ASSERT(!conn_pool_handle_);
ENVOY_STREAM_LOG(trace, "proxying {} bytes", *parent_.callbacks_, data.length());
conn_data_->connection().write(data, false);
}
void Router::UpstreamRequest::onPoolFailure(ConnectionPool::PoolFailureReason reason,
Upstream::HostDescriptionConstSharedPtr host) {
conn_pool_handle_ = nullptr;
// Mimic an upstream reset.
onUpstreamHostSelected(host);
onResetStream(reason);
parent_.upstream_request_buffer_.drain(parent_.upstream_request_buffer_.length());
// If it is a connection error, it means that the connection pool returned
// the error asynchronously and the upper layer needs to be notified to continue decoding.
// If it is a non-connection error, it is returned synchronously from the connection pool
// and is still in the callback at the current Filter, nothing to do.
if (reason == ConnectionPool::PoolFailureReason::Timeout ||
reason == ConnectionPool::PoolFailureReason::LocalConnectionFailure ||
reason == ConnectionPool::PoolFailureReason::RemoteConnectionFailure) {
parent_.callbacks_->continueDecoding();
}
}
void Router::UpstreamRequest::onPoolReady(Tcp::ConnectionPool::ConnectionDataPtr&& conn_data,
Upstream::HostDescriptionConstSharedPtr host) {
ENVOY_LOG(debug, "dubbo upstream request: tcp connection has ready");
// Only invoke continueDecoding if we'd previously stopped the filter chain.
bool continue_decoding = conn_pool_handle_ != nullptr;
onUpstreamHostSelected(host);
conn_data_ = std::move(conn_data);
conn_data_->addUpstreamCallbacks(parent_);
conn_pool_handle_ = nullptr;
onRequestStart(continue_decoding);
encodeData(parent_.upstream_request_buffer_);
}
void Router::UpstreamRequest::onRequestStart(bool continue_decoding) {
ENVOY_LOG(debug, "dubbo upstream request: start sending data to the server {}",
upstream_host_->address()->asString());
if (continue_decoding) {
parent_.callbacks_->continueDecoding();
}
onRequestComplete();
}
void Router::UpstreamRequest::onRequestComplete() { request_complete_ = true; }
void Router::UpstreamRequest::onResponseComplete() {
response_complete_ = true;
conn_data_.reset();
}
void Router::UpstreamRequest::onUpstreamHostSelected(Upstream::HostDescriptionConstSharedPtr host) {
ENVOY_LOG(debug, "dubbo upstream request: selected upstream {}", host->address()->asString());
upstream_host_ = host;
}
void Router::UpstreamRequest::onResetStream(ConnectionPool::PoolFailureReason reason) {
if (metadata_->messageType() == MessageType::Oneway) {
// For oneway requests, we should not attempt a response. Reset the downstream to signal
// an error.
ENVOY_LOG(debug, "dubbo upstream request: the request is oneway, reset downstream stream");
parent_.callbacks_->resetStream();
return;
}
// When the filter's callback does not end, the sendLocalReply function call
// triggers the release of the current stream at the end of the filter's callback.
switch (reason) {
case ConnectionPool::PoolFailureReason::Overflow:
parent_.callbacks_->sendLocalReply(
AppException(ResponseStatus::ServerError,
fmt::format("dubbo upstream request: too many connections")),
false);
break;
case ConnectionPool::PoolFailureReason::LocalConnectionFailure:
// Should only happen if we closed the connection, due to an error condition, in which case
// we've already handled any possible downstream response.
parent_.callbacks_->sendLocalReply(
AppException(ResponseStatus::ServerError,
fmt::format("dubbo upstream request: local connection failure '{}'",
upstream_host_->address()->asString())),
false);
break;
case ConnectionPool::PoolFailureReason::RemoteConnectionFailure:
parent_.callbacks_->sendLocalReply(
AppException(ResponseStatus::ServerError,
fmt::format("dubbo upstream request: remote connection failure '{}'",
upstream_host_->address()->asString())),
false);
break;
case ConnectionPool::PoolFailureReason::Timeout:
parent_.callbacks_->sendLocalReply(
AppException(ResponseStatus::ServerError,
fmt::format("dubbo upstream request: connection failure '{}' due to timeout",
upstream_host_->address()->asString())),
false);
break;
default:
NOT_REACHED_GCOVR_EXCL_LINE;
}
if (parent_.filter_complete_ && !response_complete_) {
// When the filter's callback has ended and the reply message has not been processed,
// call resetStream to release the current stream.
// the resetStream eventually triggers the onDestroy function call.
parent_.callbacks_->resetStream();
}
}
} // namespace Router
} // namespace DubboProxy
} // namespace NetworkFilters
} // namespace Extensions
} // namespace Envoy
|
; A022787: Place where n-th 1 occurs in A023125.
; 1,9,24,47,77,114,159,211,271,338,412,494,583,680,784,895,1014,1140,1274,1415,1563,1719,1882,2052,2230,2415,2608,2808,3015,3230,3452,3682,3919,4163,4415,4674,4941,5215,5496,5785,6081,6384,6695,7013
mov $2,$0
add $2,1
mov $5,$0
lpb $2
mov $0,$5
sub $2,1
sub $0,$2
mov $4,$0
mul $4,7
lpb $0
sub $0,1
mov $3,$4
div $3,18
lpe
add $4,$3
add $4,1
add $1,$4
lpe
mov $0,$1
|
#include <memory>
#include "Foundational/iwmisc/misc.h"
#include "Molecule_Lib/molecule.h"
#include "Molecule_Lib/path.h"
#include "Molecule_Lib/path_around_ring.h"
//#define DEBUG_PATH_AROUND_EDGE_OF_RING_SYSTEM
int
path_around_edge_of_ring_system (Molecule & m,
const int * process_these_atoms,
int flag,
Set_of_Atoms & s)
{
int matoms = m.natoms();
if (s.number_elements())
s.resize_keep_storage(0);
const int * ring_membership = m.ring_membership();
#ifdef DEBUG_PATH_AROUND_EDGE_OF_RING_SYSTEM
for (int i = 0; i < matoms; i++)
{
if (flag == process_these_atoms[i])
cerr << "Atom " << i << " type " << m.atomic_symbol(i) << " in " << ring_membership[i] << " rings\n";
}
#endif
// The start atom must be one in just one ring
atom_number_t start_atom = INVALID_ATOM_NUMBER;
for (int i = 0; i < matoms; i++)
{
if (flag != process_these_atoms[i])
continue;
if (INVALID_ATOM_NUMBER != start_atom) // already found a starting point
continue;
if (1 != ring_membership[i])
continue;
start_atom = i;
}
if (INVALID_ATOM_NUMBER == start_atom)
{
// cerr << "path_around_edge_of_ring_system::no start atom in '" << m.name() << "'\n";
return 0;
}
int * already_visited = new_int(matoms); std::unique_ptr<int[]> free_already_visited(already_visited);
already_visited[start_atom] = 1;
s.add(start_atom);
// If there are any non sssr rings that touch these atoms, don't continue
int n = m.non_sssr_rings();
for (int i = 0; i < n; i++)
{
const Ring * r = m.non_sssr_ring(i);
if (r->any_members_set_in_array(process_these_atoms, flag))
return 0;
}
#ifdef DEBUG_PATH_AROUND_EDGE_OF_RING_SYSTEM
cerr << "First atom in traversal " << s[0] << endl;
#endif
atom_number_t current_atom = s[0];
atom_number_t first_atom = current_atom;
while (s.number_elements() <= matoms + 1)
{
const Atom * a = m.atomi(current_atom);
int acon = a->ncon();
#ifdef DEBUG_PATH_AROUND_EDGE_OF_RING_SYSTEM
cerr << "Current atom " << current_atom << ", ncon " << acon << endl;
#endif
atom_number_t next_atom = INVALID_ATOM_NUMBER;
for (int i = 0; i < acon; i++)
{
const Bond * b = a->item(i);
#ifdef DEBUG_PATH_AROUND_EDGE_OF_RING_SYSTEM
cerr << "From " << current_atom << " can we go to to atom " << b->other(current_atom) << " bond in " << b->nrings() << " rings , flag? " << (flag == process_these_atoms[b->other(current_atom)]) << endl;
#endif
atom_number_t j = b->other(current_atom);
if (flag != process_these_atoms[j])
continue;
if (b->nrings() > 2) // either non-planar ring, or 3 rings intersecting
continue;
if (2 == b->nrings()) // fused ring, not going around the outside
continue;
#ifdef DEBUG_PATH_AROUND_EDGE_OF_RING_SYSTEM
cerr << "Check first atom " << first_atom << " vs " << j << " have " << s.number_elements() << " items\n";
#endif
if (first_atom == j && s.number_elements() > 2) // we are done!
return s.number_elements();
if (already_visited[j])
continue;
// if (ring_membership[j] > 2)
// return 0;
if (INVALID_ATOM_NUMBER == next_atom)
next_atom = j;
else if (s.number_elements() > 1) // first step will have two choices
return 0;
}
if (INVALID_ATOM_NUMBER == next_atom)
return 0;
#ifdef DEBUG_PATH_AROUND_EDGE_OF_RING_SYSTEM
cerr << "path_around_edge_of_ring_system '" << m.name() << " continuing from " << current_atom << " to " << next_atom << endl; //" '" << m.smarts_equivalent_for_atom (current_atom) << "'\n";
#endif
s.add(next_atom);
already_visited[next_atom] = 1;
current_atom = next_atom;
}
cerr << "path_around_edge_of_ring_system:no termination\n";
cerr << s << endl;
assert (NULL == "Should not come to here");
return 0;
}
|
#include <bits/stdc++.h>
using namespace std;
int main(void)
{
int k, sum=0;
int ara[13];
scanf("%d", &k);
for(int i=0; i<12; i++)
{
scanf("%d", &ara[i]);
}
sort(ara, ara+12);
for(int i=11; i>=0; i--)
{
if(sum>=k)
{
printf("%d\n", 11-i);
return 0;
}
else
{
sum+=ara[i];
}
}
if(sum>=k) printf("12\n");
else printf("-1\n");
return 0;
}
|
;
;
; ZX Maths Routines
;
; 8/12/02 - Stefano Bodrato
;
; $Id: dge.asm,v 1.4 2015/08/10 08:52:12 stefano Exp $
;
IF FORzx
INCLUDE "zxfp.def"
ENDIF
IF FORzx81
INCLUDE "81fp.def"
ENDIF
IF FORlambda
INCLUDE "lambdafp.def"
ENDIF
PUBLIC dge
EXTERN fsetup
EXTERN f_yesno
.dge
call fsetup
defb ZXFP_SUBTRACT
defb ZXFP_LESS_0
IF FORlambda
defb ZXFP_NOT + 128
ELSE
defb ZXFP_NOT
defb ZXFP_END_CALC
ENDIF
jp f_yesno |
;++
;
; Copyright (c) Microsoft Corporation. All rights reserved.
;
; You may only use this code if you agree to the terms of the Windows Research Kernel Source Code License agreement (see License.txt).
; If you do not agree to the terms, do not use the code.
;
; Module Name:
;
; sysstubs.asm
;
; Abstract:
;
; This module implements the system service dispatch stub procedures.
;
;--
include ksamd64.inc
STUBS_BEGIN1 macro t
title t
endm
STUBS_BEGIN2 macro t
endm
STUBS_BEGIN3 macro t
endm
STUBS_BEGIN4 macro t
endm
STUBS_BEGIN5 macro t
endm
STUBS_BEGIN6 macro t
endm
STUBS_BEGIN7 macro t
endm
STUBS_BEGIN8 macro t
endm
STUBS_END macro t
end
endm
SYSSTUBS_ENTRY1 macro ServiceNumber, Name, NumArgs
extern KiServiceInternal:proc
extern KiServiceLinkage:proc
NESTED_ENTRY Zw&Name, _TEXT$00,, NoPad
if DBG
mov 8[rsp], rcx ; save argument register
mov 16[rsp], rdx ;
mov 24[rsp], r8 ;
mov 32[rsp], r9 ;
endif
mov rax, rsp ; save stack address
cli ; disable interrupts
sub rsp, 16 ; alignment and dummy SS selector
push rax ; save previous stack pointer
pushfq ; push EFLAGS on stack
push KGDT64_R0_CODE ; push CS selector
lea rax, KiServiceLinkage ; push service linkage RIP
push rax ; push return address
mov eax, ServiceNumber ; set service number
jmp KiServiceInternal ; finish in service dispatcher
push_frame ; mark machine frame push
END_PROLOGUE
NESTED_END Zw&Name, _TEXT$00
endm
SYSSTUBS_ENTRY2 macro ServiceNumber, Name, NumArgs
endm
SYSSTUBS_ENTRY3 macro ServiceNumber, Name, NumArgs
endm
SYSSTUBS_ENTRY4 macro ServiceNumber, Name, NumArgs
endm
SYSSTUBS_ENTRY5 macro ServiceNumber, Name, NumArgs
endm
SYSSTUBS_ENTRY6 macro ServiceNumber, Name, NumArgs
endm
SYSSTUBS_ENTRY7 macro ServiceNumber, Name, NumArgs
endm
SYSSTUBS_ENTRY8 macro ServiceNumber, Name, NumArgs
endm
USRSTUBS_ENTRY1 macro ServiceNumber, Name, NumArgs
altentry Nt&Name
endm
USRSTUBS_ENTRY2 macro ServiceNumber, Name, NumArgs
ifidn <Name>, <QuerySystemTime>
extern RtlQuerySystemTime:proc
endif
LEAF_ENTRY Zw&Name, _TEXT$00, NoPad
ALTERNATE_ENTRY Nt&Name
if DBG
mov 8[rsp], rcx
mov 16[rsp], rdx
mov 24[rsp], r8
mov 32[rsp], r9
endif
ifidn <Name>, <QuerySystemTime>
jmp RtlQuerySystemTime
else
mov r10, rcx
mov eax, ServiceNumber
syscall
ret
endif
LEAF_END Zw&Name, _TEXT$00
endm
USRSTUBS_ENTRY3 macro ServiceNumber, Name, NumArgs
endm
USRSTUBS_ENTRY4 macro ServiceNumber, Name, NumArgs
endm
USRSTUBS_ENTRY5 macro ServiceNumber, Name, NumArgs
endm
USRSTUBS_ENTRY6 macro ServiceNumber, Name, NumArgs
endm
USRSTUBS_ENTRY7 macro ServiceNumber, Name, NumArgs
endm
USRSTUBS_ENTRY8 macro ServiceNumber, Name, NumArgs
endm
STUBS_BEGIN1 <"System Service Stub Procedures">
STUBS_BEGIN2 <"System Service Stub Procedures">
STUBS_BEGIN3 <"System Service Stub Procedures">
STUBS_BEGIN4 <"System Service Stub Procedures">
STUBS_BEGIN5 <"System Service Stub Procedures">
STUBS_BEGIN6 <"System Service Stub Procedures">
STUBS_BEGIN7 <"System Service Stub Procedures">
STUBS_BEGIN8 <"System Service Stub Procedures">
SYSSTUBS_ENTRY1 0, MapUserPhysicalPagesScatter, 0
SYSSTUBS_ENTRY2 0, MapUserPhysicalPagesScatter, 0
SYSSTUBS_ENTRY3 0, MapUserPhysicalPagesScatter, 0
SYSSTUBS_ENTRY4 0, MapUserPhysicalPagesScatter, 0
SYSSTUBS_ENTRY5 0, MapUserPhysicalPagesScatter, 0
SYSSTUBS_ENTRY6 0, MapUserPhysicalPagesScatter, 0
SYSSTUBS_ENTRY7 0, MapUserPhysicalPagesScatter, 0
SYSSTUBS_ENTRY8 0, MapUserPhysicalPagesScatter, 0
SYSSTUBS_ENTRY1 1, WaitForSingleObject, 0
SYSSTUBS_ENTRY2 1, WaitForSingleObject, 0
SYSSTUBS_ENTRY3 1, WaitForSingleObject, 0
SYSSTUBS_ENTRY4 1, WaitForSingleObject, 0
SYSSTUBS_ENTRY5 1, WaitForSingleObject, 0
SYSSTUBS_ENTRY6 1, WaitForSingleObject, 0
SYSSTUBS_ENTRY7 1, WaitForSingleObject, 0
SYSSTUBS_ENTRY8 1, WaitForSingleObject, 0
SYSSTUBS_ENTRY1 2, CallbackReturn, 0
SYSSTUBS_ENTRY2 2, CallbackReturn, 0
SYSSTUBS_ENTRY3 2, CallbackReturn, 0
SYSSTUBS_ENTRY4 2, CallbackReturn, 0
SYSSTUBS_ENTRY5 2, CallbackReturn, 0
SYSSTUBS_ENTRY6 2, CallbackReturn, 0
SYSSTUBS_ENTRY7 2, CallbackReturn, 0
SYSSTUBS_ENTRY8 2, CallbackReturn, 0
SYSSTUBS_ENTRY1 3, ReadFile, 5
SYSSTUBS_ENTRY2 3, ReadFile, 5
SYSSTUBS_ENTRY3 3, ReadFile, 5
SYSSTUBS_ENTRY4 3, ReadFile, 5
SYSSTUBS_ENTRY5 3, ReadFile, 5
SYSSTUBS_ENTRY6 3, ReadFile, 5
SYSSTUBS_ENTRY7 3, ReadFile, 5
SYSSTUBS_ENTRY8 3, ReadFile, 5
SYSSTUBS_ENTRY1 4, DeviceIoControlFile, 6
SYSSTUBS_ENTRY2 4, DeviceIoControlFile, 6
SYSSTUBS_ENTRY3 4, DeviceIoControlFile, 6
SYSSTUBS_ENTRY4 4, DeviceIoControlFile, 6
SYSSTUBS_ENTRY5 4, DeviceIoControlFile, 6
SYSSTUBS_ENTRY6 4, DeviceIoControlFile, 6
SYSSTUBS_ENTRY7 4, DeviceIoControlFile, 6
SYSSTUBS_ENTRY8 4, DeviceIoControlFile, 6
SYSSTUBS_ENTRY1 5, WriteFile, 5
SYSSTUBS_ENTRY2 5, WriteFile, 5
SYSSTUBS_ENTRY3 5, WriteFile, 5
SYSSTUBS_ENTRY4 5, WriteFile, 5
SYSSTUBS_ENTRY5 5, WriteFile, 5
SYSSTUBS_ENTRY6 5, WriteFile, 5
SYSSTUBS_ENTRY7 5, WriteFile, 5
SYSSTUBS_ENTRY8 5, WriteFile, 5
SYSSTUBS_ENTRY1 6, RemoveIoCompletion, 1
SYSSTUBS_ENTRY2 6, RemoveIoCompletion, 1
SYSSTUBS_ENTRY3 6, RemoveIoCompletion, 1
SYSSTUBS_ENTRY4 6, RemoveIoCompletion, 1
SYSSTUBS_ENTRY5 6, RemoveIoCompletion, 1
SYSSTUBS_ENTRY6 6, RemoveIoCompletion, 1
SYSSTUBS_ENTRY7 6, RemoveIoCompletion, 1
SYSSTUBS_ENTRY8 6, RemoveIoCompletion, 1
SYSSTUBS_ENTRY1 7, ReleaseSemaphore, 0
SYSSTUBS_ENTRY2 7, ReleaseSemaphore, 0
SYSSTUBS_ENTRY3 7, ReleaseSemaphore, 0
SYSSTUBS_ENTRY4 7, ReleaseSemaphore, 0
SYSSTUBS_ENTRY5 7, ReleaseSemaphore, 0
SYSSTUBS_ENTRY6 7, ReleaseSemaphore, 0
SYSSTUBS_ENTRY7 7, ReleaseSemaphore, 0
SYSSTUBS_ENTRY8 7, ReleaseSemaphore, 0
SYSSTUBS_ENTRY1 8, ReplyWaitReceivePort, 0
SYSSTUBS_ENTRY2 8, ReplyWaitReceivePort, 0
SYSSTUBS_ENTRY3 8, ReplyWaitReceivePort, 0
SYSSTUBS_ENTRY4 8, ReplyWaitReceivePort, 0
SYSSTUBS_ENTRY5 8, ReplyWaitReceivePort, 0
SYSSTUBS_ENTRY6 8, ReplyWaitReceivePort, 0
SYSSTUBS_ENTRY7 8, ReplyWaitReceivePort, 0
SYSSTUBS_ENTRY8 8, ReplyWaitReceivePort, 0
SYSSTUBS_ENTRY1 9, ReplyPort, 0
SYSSTUBS_ENTRY2 9, ReplyPort, 0
SYSSTUBS_ENTRY3 9, ReplyPort, 0
SYSSTUBS_ENTRY4 9, ReplyPort, 0
SYSSTUBS_ENTRY5 9, ReplyPort, 0
SYSSTUBS_ENTRY6 9, ReplyPort, 0
SYSSTUBS_ENTRY7 9, ReplyPort, 0
SYSSTUBS_ENTRY8 9, ReplyPort, 0
SYSSTUBS_ENTRY1 10, SetInformationThread, 0
SYSSTUBS_ENTRY2 10, SetInformationThread, 0
SYSSTUBS_ENTRY3 10, SetInformationThread, 0
SYSSTUBS_ENTRY4 10, SetInformationThread, 0
SYSSTUBS_ENTRY5 10, SetInformationThread, 0
SYSSTUBS_ENTRY6 10, SetInformationThread, 0
SYSSTUBS_ENTRY7 10, SetInformationThread, 0
SYSSTUBS_ENTRY8 10, SetInformationThread, 0
SYSSTUBS_ENTRY1 11, SetEvent, 0
SYSSTUBS_ENTRY2 11, SetEvent, 0
SYSSTUBS_ENTRY3 11, SetEvent, 0
SYSSTUBS_ENTRY4 11, SetEvent, 0
SYSSTUBS_ENTRY5 11, SetEvent, 0
SYSSTUBS_ENTRY6 11, SetEvent, 0
SYSSTUBS_ENTRY7 11, SetEvent, 0
SYSSTUBS_ENTRY8 11, SetEvent, 0
SYSSTUBS_ENTRY1 12, Close, 0
SYSSTUBS_ENTRY2 12, Close, 0
SYSSTUBS_ENTRY3 12, Close, 0
SYSSTUBS_ENTRY4 12, Close, 0
SYSSTUBS_ENTRY5 12, Close, 0
SYSSTUBS_ENTRY6 12, Close, 0
SYSSTUBS_ENTRY7 12, Close, 0
SYSSTUBS_ENTRY8 12, Close, 0
SYSSTUBS_ENTRY1 13, QueryObject, 1
SYSSTUBS_ENTRY2 13, QueryObject, 1
SYSSTUBS_ENTRY3 13, QueryObject, 1
SYSSTUBS_ENTRY4 13, QueryObject, 1
SYSSTUBS_ENTRY5 13, QueryObject, 1
SYSSTUBS_ENTRY6 13, QueryObject, 1
SYSSTUBS_ENTRY7 13, QueryObject, 1
SYSSTUBS_ENTRY8 13, QueryObject, 1
SYSSTUBS_ENTRY1 14, QueryInformationFile, 1
SYSSTUBS_ENTRY2 14, QueryInformationFile, 1
SYSSTUBS_ENTRY3 14, QueryInformationFile, 1
SYSSTUBS_ENTRY4 14, QueryInformationFile, 1
SYSSTUBS_ENTRY5 14, QueryInformationFile, 1
SYSSTUBS_ENTRY6 14, QueryInformationFile, 1
SYSSTUBS_ENTRY7 14, QueryInformationFile, 1
SYSSTUBS_ENTRY8 14, QueryInformationFile, 1
SYSSTUBS_ENTRY1 15, OpenKey, 0
SYSSTUBS_ENTRY2 15, OpenKey, 0
SYSSTUBS_ENTRY3 15, OpenKey, 0
SYSSTUBS_ENTRY4 15, OpenKey, 0
SYSSTUBS_ENTRY5 15, OpenKey, 0
SYSSTUBS_ENTRY6 15, OpenKey, 0
SYSSTUBS_ENTRY7 15, OpenKey, 0
SYSSTUBS_ENTRY8 15, OpenKey, 0
SYSSTUBS_ENTRY1 16, EnumerateValueKey, 2
SYSSTUBS_ENTRY2 16, EnumerateValueKey, 2
SYSSTUBS_ENTRY3 16, EnumerateValueKey, 2
SYSSTUBS_ENTRY4 16, EnumerateValueKey, 2
SYSSTUBS_ENTRY5 16, EnumerateValueKey, 2
SYSSTUBS_ENTRY6 16, EnumerateValueKey, 2
SYSSTUBS_ENTRY7 16, EnumerateValueKey, 2
SYSSTUBS_ENTRY8 16, EnumerateValueKey, 2
SYSSTUBS_ENTRY1 17, FindAtom, 0
SYSSTUBS_ENTRY2 17, FindAtom, 0
SYSSTUBS_ENTRY3 17, FindAtom, 0
SYSSTUBS_ENTRY4 17, FindAtom, 0
SYSSTUBS_ENTRY5 17, FindAtom, 0
SYSSTUBS_ENTRY6 17, FindAtom, 0
SYSSTUBS_ENTRY7 17, FindAtom, 0
SYSSTUBS_ENTRY8 17, FindAtom, 0
SYSSTUBS_ENTRY1 18, QueryDefaultLocale, 0
SYSSTUBS_ENTRY2 18, QueryDefaultLocale, 0
SYSSTUBS_ENTRY3 18, QueryDefaultLocale, 0
SYSSTUBS_ENTRY4 18, QueryDefaultLocale, 0
SYSSTUBS_ENTRY5 18, QueryDefaultLocale, 0
SYSSTUBS_ENTRY6 18, QueryDefaultLocale, 0
SYSSTUBS_ENTRY7 18, QueryDefaultLocale, 0
SYSSTUBS_ENTRY8 18, QueryDefaultLocale, 0
SYSSTUBS_ENTRY1 19, QueryKey, 1
SYSSTUBS_ENTRY2 19, QueryKey, 1
SYSSTUBS_ENTRY3 19, QueryKey, 1
SYSSTUBS_ENTRY4 19, QueryKey, 1
SYSSTUBS_ENTRY5 19, QueryKey, 1
SYSSTUBS_ENTRY6 19, QueryKey, 1
SYSSTUBS_ENTRY7 19, QueryKey, 1
SYSSTUBS_ENTRY8 19, QueryKey, 1
SYSSTUBS_ENTRY1 20, QueryValueKey, 2
SYSSTUBS_ENTRY2 20, QueryValueKey, 2
SYSSTUBS_ENTRY3 20, QueryValueKey, 2
SYSSTUBS_ENTRY4 20, QueryValueKey, 2
SYSSTUBS_ENTRY5 20, QueryValueKey, 2
SYSSTUBS_ENTRY6 20, QueryValueKey, 2
SYSSTUBS_ENTRY7 20, QueryValueKey, 2
SYSSTUBS_ENTRY8 20, QueryValueKey, 2
SYSSTUBS_ENTRY1 21, AllocateVirtualMemory, 2
SYSSTUBS_ENTRY2 21, AllocateVirtualMemory, 2
SYSSTUBS_ENTRY3 21, AllocateVirtualMemory, 2
SYSSTUBS_ENTRY4 21, AllocateVirtualMemory, 2
SYSSTUBS_ENTRY5 21, AllocateVirtualMemory, 2
SYSSTUBS_ENTRY6 21, AllocateVirtualMemory, 2
SYSSTUBS_ENTRY7 21, AllocateVirtualMemory, 2
SYSSTUBS_ENTRY8 21, AllocateVirtualMemory, 2
SYSSTUBS_ENTRY1 22, QueryInformationProcess, 1
SYSSTUBS_ENTRY2 22, QueryInformationProcess, 1
SYSSTUBS_ENTRY3 22, QueryInformationProcess, 1
SYSSTUBS_ENTRY4 22, QueryInformationProcess, 1
SYSSTUBS_ENTRY5 22, QueryInformationProcess, 1
SYSSTUBS_ENTRY6 22, QueryInformationProcess, 1
SYSSTUBS_ENTRY7 22, QueryInformationProcess, 1
SYSSTUBS_ENTRY8 22, QueryInformationProcess, 1
SYSSTUBS_ENTRY1 23, WaitForMultipleObjects32, 1
SYSSTUBS_ENTRY2 23, WaitForMultipleObjects32, 1
SYSSTUBS_ENTRY3 23, WaitForMultipleObjects32, 1
SYSSTUBS_ENTRY4 23, WaitForMultipleObjects32, 1
SYSSTUBS_ENTRY5 23, WaitForMultipleObjects32, 1
SYSSTUBS_ENTRY6 23, WaitForMultipleObjects32, 1
SYSSTUBS_ENTRY7 23, WaitForMultipleObjects32, 1
SYSSTUBS_ENTRY8 23, WaitForMultipleObjects32, 1
SYSSTUBS_ENTRY1 24, WriteFileGather, 5
SYSSTUBS_ENTRY2 24, WriteFileGather, 5
SYSSTUBS_ENTRY3 24, WriteFileGather, 5
SYSSTUBS_ENTRY4 24, WriteFileGather, 5
SYSSTUBS_ENTRY5 24, WriteFileGather, 5
SYSSTUBS_ENTRY6 24, WriteFileGather, 5
SYSSTUBS_ENTRY7 24, WriteFileGather, 5
SYSSTUBS_ENTRY8 24, WriteFileGather, 5
SYSSTUBS_ENTRY1 25, SetInformationProcess, 0
SYSSTUBS_ENTRY2 25, SetInformationProcess, 0
SYSSTUBS_ENTRY3 25, SetInformationProcess, 0
SYSSTUBS_ENTRY4 25, SetInformationProcess, 0
SYSSTUBS_ENTRY5 25, SetInformationProcess, 0
SYSSTUBS_ENTRY6 25, SetInformationProcess, 0
SYSSTUBS_ENTRY7 25, SetInformationProcess, 0
SYSSTUBS_ENTRY8 25, SetInformationProcess, 0
SYSSTUBS_ENTRY1 26, CreateKey, 3
SYSSTUBS_ENTRY2 26, CreateKey, 3
SYSSTUBS_ENTRY3 26, CreateKey, 3
SYSSTUBS_ENTRY4 26, CreateKey, 3
SYSSTUBS_ENTRY5 26, CreateKey, 3
SYSSTUBS_ENTRY6 26, CreateKey, 3
SYSSTUBS_ENTRY7 26, CreateKey, 3
SYSSTUBS_ENTRY8 26, CreateKey, 3
SYSSTUBS_ENTRY1 27, FreeVirtualMemory, 0
SYSSTUBS_ENTRY2 27, FreeVirtualMemory, 0
SYSSTUBS_ENTRY3 27, FreeVirtualMemory, 0
SYSSTUBS_ENTRY4 27, FreeVirtualMemory, 0
SYSSTUBS_ENTRY5 27, FreeVirtualMemory, 0
SYSSTUBS_ENTRY6 27, FreeVirtualMemory, 0
SYSSTUBS_ENTRY7 27, FreeVirtualMemory, 0
SYSSTUBS_ENTRY8 27, FreeVirtualMemory, 0
SYSSTUBS_ENTRY1 28, ImpersonateClientOfPort, 0
SYSSTUBS_ENTRY2 28, ImpersonateClientOfPort, 0
SYSSTUBS_ENTRY3 28, ImpersonateClientOfPort, 0
SYSSTUBS_ENTRY4 28, ImpersonateClientOfPort, 0
SYSSTUBS_ENTRY5 28, ImpersonateClientOfPort, 0
SYSSTUBS_ENTRY6 28, ImpersonateClientOfPort, 0
SYSSTUBS_ENTRY7 28, ImpersonateClientOfPort, 0
SYSSTUBS_ENTRY8 28, ImpersonateClientOfPort, 0
SYSSTUBS_ENTRY1 29, ReleaseMutant, 0
SYSSTUBS_ENTRY2 29, ReleaseMutant, 0
SYSSTUBS_ENTRY3 29, ReleaseMutant, 0
SYSSTUBS_ENTRY4 29, ReleaseMutant, 0
SYSSTUBS_ENTRY5 29, ReleaseMutant, 0
SYSSTUBS_ENTRY6 29, ReleaseMutant, 0
SYSSTUBS_ENTRY7 29, ReleaseMutant, 0
SYSSTUBS_ENTRY8 29, ReleaseMutant, 0
SYSSTUBS_ENTRY1 30, QueryInformationToken, 1
SYSSTUBS_ENTRY2 30, QueryInformationToken, 1
SYSSTUBS_ENTRY3 30, QueryInformationToken, 1
SYSSTUBS_ENTRY4 30, QueryInformationToken, 1
SYSSTUBS_ENTRY5 30, QueryInformationToken, 1
SYSSTUBS_ENTRY6 30, QueryInformationToken, 1
SYSSTUBS_ENTRY7 30, QueryInformationToken, 1
SYSSTUBS_ENTRY8 30, QueryInformationToken, 1
SYSSTUBS_ENTRY1 31, RequestWaitReplyPort, 0
SYSSTUBS_ENTRY2 31, RequestWaitReplyPort, 0
SYSSTUBS_ENTRY3 31, RequestWaitReplyPort, 0
SYSSTUBS_ENTRY4 31, RequestWaitReplyPort, 0
SYSSTUBS_ENTRY5 31, RequestWaitReplyPort, 0
SYSSTUBS_ENTRY6 31, RequestWaitReplyPort, 0
SYSSTUBS_ENTRY7 31, RequestWaitReplyPort, 0
SYSSTUBS_ENTRY8 31, RequestWaitReplyPort, 0
SYSSTUBS_ENTRY1 32, QueryVirtualMemory, 2
SYSSTUBS_ENTRY2 32, QueryVirtualMemory, 2
SYSSTUBS_ENTRY3 32, QueryVirtualMemory, 2
SYSSTUBS_ENTRY4 32, QueryVirtualMemory, 2
SYSSTUBS_ENTRY5 32, QueryVirtualMemory, 2
SYSSTUBS_ENTRY6 32, QueryVirtualMemory, 2
SYSSTUBS_ENTRY7 32, QueryVirtualMemory, 2
SYSSTUBS_ENTRY8 32, QueryVirtualMemory, 2
SYSSTUBS_ENTRY1 33, OpenThreadToken, 0
SYSSTUBS_ENTRY2 33, OpenThreadToken, 0
SYSSTUBS_ENTRY3 33, OpenThreadToken, 0
SYSSTUBS_ENTRY4 33, OpenThreadToken, 0
SYSSTUBS_ENTRY5 33, OpenThreadToken, 0
SYSSTUBS_ENTRY6 33, OpenThreadToken, 0
SYSSTUBS_ENTRY7 33, OpenThreadToken, 0
SYSSTUBS_ENTRY8 33, OpenThreadToken, 0
SYSSTUBS_ENTRY1 34, QueryInformationThread, 1
SYSSTUBS_ENTRY2 34, QueryInformationThread, 1
SYSSTUBS_ENTRY3 34, QueryInformationThread, 1
SYSSTUBS_ENTRY4 34, QueryInformationThread, 1
SYSSTUBS_ENTRY5 34, QueryInformationThread, 1
SYSSTUBS_ENTRY6 34, QueryInformationThread, 1
SYSSTUBS_ENTRY7 34, QueryInformationThread, 1
SYSSTUBS_ENTRY8 34, QueryInformationThread, 1
SYSSTUBS_ENTRY1 35, OpenProcess, 0
SYSSTUBS_ENTRY2 35, OpenProcess, 0
SYSSTUBS_ENTRY3 35, OpenProcess, 0
SYSSTUBS_ENTRY4 35, OpenProcess, 0
SYSSTUBS_ENTRY5 35, OpenProcess, 0
SYSSTUBS_ENTRY6 35, OpenProcess, 0
SYSSTUBS_ENTRY7 35, OpenProcess, 0
SYSSTUBS_ENTRY8 35, OpenProcess, 0
SYSSTUBS_ENTRY1 36, SetInformationFile, 1
SYSSTUBS_ENTRY2 36, SetInformationFile, 1
SYSSTUBS_ENTRY3 36, SetInformationFile, 1
SYSSTUBS_ENTRY4 36, SetInformationFile, 1
SYSSTUBS_ENTRY5 36, SetInformationFile, 1
SYSSTUBS_ENTRY6 36, SetInformationFile, 1
SYSSTUBS_ENTRY7 36, SetInformationFile, 1
SYSSTUBS_ENTRY8 36, SetInformationFile, 1
SYSSTUBS_ENTRY1 37, MapViewOfSection, 6
SYSSTUBS_ENTRY2 37, MapViewOfSection, 6
SYSSTUBS_ENTRY3 37, MapViewOfSection, 6
SYSSTUBS_ENTRY4 37, MapViewOfSection, 6
SYSSTUBS_ENTRY5 37, MapViewOfSection, 6
SYSSTUBS_ENTRY6 37, MapViewOfSection, 6
SYSSTUBS_ENTRY7 37, MapViewOfSection, 6
SYSSTUBS_ENTRY8 37, MapViewOfSection, 6
SYSSTUBS_ENTRY1 38, AccessCheckAndAuditAlarm, 7
SYSSTUBS_ENTRY2 38, AccessCheckAndAuditAlarm, 7
SYSSTUBS_ENTRY3 38, AccessCheckAndAuditAlarm, 7
SYSSTUBS_ENTRY4 38, AccessCheckAndAuditAlarm, 7
SYSSTUBS_ENTRY5 38, AccessCheckAndAuditAlarm, 7
SYSSTUBS_ENTRY6 38, AccessCheckAndAuditAlarm, 7
SYSSTUBS_ENTRY7 38, AccessCheckAndAuditAlarm, 7
SYSSTUBS_ENTRY8 38, AccessCheckAndAuditAlarm, 7
SYSSTUBS_ENTRY1 39, UnmapViewOfSection, 0
SYSSTUBS_ENTRY2 39, UnmapViewOfSection, 0
SYSSTUBS_ENTRY3 39, UnmapViewOfSection, 0
SYSSTUBS_ENTRY4 39, UnmapViewOfSection, 0
SYSSTUBS_ENTRY5 39, UnmapViewOfSection, 0
SYSSTUBS_ENTRY6 39, UnmapViewOfSection, 0
SYSSTUBS_ENTRY7 39, UnmapViewOfSection, 0
SYSSTUBS_ENTRY8 39, UnmapViewOfSection, 0
SYSSTUBS_ENTRY1 40, ReplyWaitReceivePortEx, 1
SYSSTUBS_ENTRY2 40, ReplyWaitReceivePortEx, 1
SYSSTUBS_ENTRY3 40, ReplyWaitReceivePortEx, 1
SYSSTUBS_ENTRY4 40, ReplyWaitReceivePortEx, 1
SYSSTUBS_ENTRY5 40, ReplyWaitReceivePortEx, 1
SYSSTUBS_ENTRY6 40, ReplyWaitReceivePortEx, 1
SYSSTUBS_ENTRY7 40, ReplyWaitReceivePortEx, 1
SYSSTUBS_ENTRY8 40, ReplyWaitReceivePortEx, 1
SYSSTUBS_ENTRY1 41, TerminateProcess, 0
SYSSTUBS_ENTRY2 41, TerminateProcess, 0
SYSSTUBS_ENTRY3 41, TerminateProcess, 0
SYSSTUBS_ENTRY4 41, TerminateProcess, 0
SYSSTUBS_ENTRY5 41, TerminateProcess, 0
SYSSTUBS_ENTRY6 41, TerminateProcess, 0
SYSSTUBS_ENTRY7 41, TerminateProcess, 0
SYSSTUBS_ENTRY8 41, TerminateProcess, 0
SYSSTUBS_ENTRY1 42, SetEventBoostPriority, 0
SYSSTUBS_ENTRY2 42, SetEventBoostPriority, 0
SYSSTUBS_ENTRY3 42, SetEventBoostPriority, 0
SYSSTUBS_ENTRY4 42, SetEventBoostPriority, 0
SYSSTUBS_ENTRY5 42, SetEventBoostPriority, 0
SYSSTUBS_ENTRY6 42, SetEventBoostPriority, 0
SYSSTUBS_ENTRY7 42, SetEventBoostPriority, 0
SYSSTUBS_ENTRY8 42, SetEventBoostPriority, 0
SYSSTUBS_ENTRY1 43, ReadFileScatter, 5
SYSSTUBS_ENTRY2 43, ReadFileScatter, 5
SYSSTUBS_ENTRY3 43, ReadFileScatter, 5
SYSSTUBS_ENTRY4 43, ReadFileScatter, 5
SYSSTUBS_ENTRY5 43, ReadFileScatter, 5
SYSSTUBS_ENTRY6 43, ReadFileScatter, 5
SYSSTUBS_ENTRY7 43, ReadFileScatter, 5
SYSSTUBS_ENTRY8 43, ReadFileScatter, 5
SYSSTUBS_ENTRY1 44, OpenThreadTokenEx, 1
SYSSTUBS_ENTRY2 44, OpenThreadTokenEx, 1
SYSSTUBS_ENTRY3 44, OpenThreadTokenEx, 1
SYSSTUBS_ENTRY4 44, OpenThreadTokenEx, 1
SYSSTUBS_ENTRY5 44, OpenThreadTokenEx, 1
SYSSTUBS_ENTRY6 44, OpenThreadTokenEx, 1
SYSSTUBS_ENTRY7 44, OpenThreadTokenEx, 1
SYSSTUBS_ENTRY8 44, OpenThreadTokenEx, 1
SYSSTUBS_ENTRY1 45, OpenProcessTokenEx, 0
SYSSTUBS_ENTRY2 45, OpenProcessTokenEx, 0
SYSSTUBS_ENTRY3 45, OpenProcessTokenEx, 0
SYSSTUBS_ENTRY4 45, OpenProcessTokenEx, 0
SYSSTUBS_ENTRY5 45, OpenProcessTokenEx, 0
SYSSTUBS_ENTRY6 45, OpenProcessTokenEx, 0
SYSSTUBS_ENTRY7 45, OpenProcessTokenEx, 0
SYSSTUBS_ENTRY8 45, OpenProcessTokenEx, 0
SYSSTUBS_ENTRY1 46, QueryPerformanceCounter, 0
SYSSTUBS_ENTRY2 46, QueryPerformanceCounter, 0
SYSSTUBS_ENTRY3 46, QueryPerformanceCounter, 0
SYSSTUBS_ENTRY4 46, QueryPerformanceCounter, 0
SYSSTUBS_ENTRY5 46, QueryPerformanceCounter, 0
SYSSTUBS_ENTRY6 46, QueryPerformanceCounter, 0
SYSSTUBS_ENTRY7 46, QueryPerformanceCounter, 0
SYSSTUBS_ENTRY8 46, QueryPerformanceCounter, 0
SYSSTUBS_ENTRY1 47, EnumerateKey, 2
SYSSTUBS_ENTRY2 47, EnumerateKey, 2
SYSSTUBS_ENTRY3 47, EnumerateKey, 2
SYSSTUBS_ENTRY4 47, EnumerateKey, 2
SYSSTUBS_ENTRY5 47, EnumerateKey, 2
SYSSTUBS_ENTRY6 47, EnumerateKey, 2
SYSSTUBS_ENTRY7 47, EnumerateKey, 2
SYSSTUBS_ENTRY8 47, EnumerateKey, 2
SYSSTUBS_ENTRY1 48, OpenFile, 2
SYSSTUBS_ENTRY2 48, OpenFile, 2
SYSSTUBS_ENTRY3 48, OpenFile, 2
SYSSTUBS_ENTRY4 48, OpenFile, 2
SYSSTUBS_ENTRY5 48, OpenFile, 2
SYSSTUBS_ENTRY6 48, OpenFile, 2
SYSSTUBS_ENTRY7 48, OpenFile, 2
SYSSTUBS_ENTRY8 48, OpenFile, 2
SYSSTUBS_ENTRY1 49, DelayExecution, 0
SYSSTUBS_ENTRY2 49, DelayExecution, 0
SYSSTUBS_ENTRY3 49, DelayExecution, 0
SYSSTUBS_ENTRY4 49, DelayExecution, 0
SYSSTUBS_ENTRY5 49, DelayExecution, 0
SYSSTUBS_ENTRY6 49, DelayExecution, 0
SYSSTUBS_ENTRY7 49, DelayExecution, 0
SYSSTUBS_ENTRY8 49, DelayExecution, 0
SYSSTUBS_ENTRY1 50, QueryDirectoryFile, 7
SYSSTUBS_ENTRY2 50, QueryDirectoryFile, 7
SYSSTUBS_ENTRY3 50, QueryDirectoryFile, 7
SYSSTUBS_ENTRY4 50, QueryDirectoryFile, 7
SYSSTUBS_ENTRY5 50, QueryDirectoryFile, 7
SYSSTUBS_ENTRY6 50, QueryDirectoryFile, 7
SYSSTUBS_ENTRY7 50, QueryDirectoryFile, 7
SYSSTUBS_ENTRY8 50, QueryDirectoryFile, 7
SYSSTUBS_ENTRY1 51, QuerySystemInformation, 0
SYSSTUBS_ENTRY2 51, QuerySystemInformation, 0
SYSSTUBS_ENTRY3 51, QuerySystemInformation, 0
SYSSTUBS_ENTRY4 51, QuerySystemInformation, 0
SYSSTUBS_ENTRY5 51, QuerySystemInformation, 0
SYSSTUBS_ENTRY6 51, QuerySystemInformation, 0
SYSSTUBS_ENTRY7 51, QuerySystemInformation, 0
SYSSTUBS_ENTRY8 51, QuerySystemInformation, 0
SYSSTUBS_ENTRY1 52, OpenSection, 0
SYSSTUBS_ENTRY2 52, OpenSection, 0
SYSSTUBS_ENTRY3 52, OpenSection, 0
SYSSTUBS_ENTRY4 52, OpenSection, 0
SYSSTUBS_ENTRY5 52, OpenSection, 0
SYSSTUBS_ENTRY6 52, OpenSection, 0
SYSSTUBS_ENTRY7 52, OpenSection, 0
SYSSTUBS_ENTRY8 52, OpenSection, 0
SYSSTUBS_ENTRY1 53, QueryTimer, 1
SYSSTUBS_ENTRY2 53, QueryTimer, 1
SYSSTUBS_ENTRY3 53, QueryTimer, 1
SYSSTUBS_ENTRY4 53, QueryTimer, 1
SYSSTUBS_ENTRY5 53, QueryTimer, 1
SYSSTUBS_ENTRY6 53, QueryTimer, 1
SYSSTUBS_ENTRY7 53, QueryTimer, 1
SYSSTUBS_ENTRY8 53, QueryTimer, 1
SYSSTUBS_ENTRY1 54, FsControlFile, 6
SYSSTUBS_ENTRY2 54, FsControlFile, 6
SYSSTUBS_ENTRY3 54, FsControlFile, 6
SYSSTUBS_ENTRY4 54, FsControlFile, 6
SYSSTUBS_ENTRY5 54, FsControlFile, 6
SYSSTUBS_ENTRY6 54, FsControlFile, 6
SYSSTUBS_ENTRY7 54, FsControlFile, 6
SYSSTUBS_ENTRY8 54, FsControlFile, 6
SYSSTUBS_ENTRY1 55, WriteVirtualMemory, 1
SYSSTUBS_ENTRY2 55, WriteVirtualMemory, 1
SYSSTUBS_ENTRY3 55, WriteVirtualMemory, 1
SYSSTUBS_ENTRY4 55, WriteVirtualMemory, 1
SYSSTUBS_ENTRY5 55, WriteVirtualMemory, 1
SYSSTUBS_ENTRY6 55, WriteVirtualMemory, 1
SYSSTUBS_ENTRY7 55, WriteVirtualMemory, 1
SYSSTUBS_ENTRY8 55, WriteVirtualMemory, 1
SYSSTUBS_ENTRY1 56, CloseObjectAuditAlarm, 0
SYSSTUBS_ENTRY2 56, CloseObjectAuditAlarm, 0
SYSSTUBS_ENTRY3 56, CloseObjectAuditAlarm, 0
SYSSTUBS_ENTRY4 56, CloseObjectAuditAlarm, 0
SYSSTUBS_ENTRY5 56, CloseObjectAuditAlarm, 0
SYSSTUBS_ENTRY6 56, CloseObjectAuditAlarm, 0
SYSSTUBS_ENTRY7 56, CloseObjectAuditAlarm, 0
SYSSTUBS_ENTRY8 56, CloseObjectAuditAlarm, 0
SYSSTUBS_ENTRY1 57, DuplicateObject, 3
SYSSTUBS_ENTRY2 57, DuplicateObject, 3
SYSSTUBS_ENTRY3 57, DuplicateObject, 3
SYSSTUBS_ENTRY4 57, DuplicateObject, 3
SYSSTUBS_ENTRY5 57, DuplicateObject, 3
SYSSTUBS_ENTRY6 57, DuplicateObject, 3
SYSSTUBS_ENTRY7 57, DuplicateObject, 3
SYSSTUBS_ENTRY8 57, DuplicateObject, 3
SYSSTUBS_ENTRY1 58, QueryAttributesFile, 0
SYSSTUBS_ENTRY2 58, QueryAttributesFile, 0
SYSSTUBS_ENTRY3 58, QueryAttributesFile, 0
SYSSTUBS_ENTRY4 58, QueryAttributesFile, 0
SYSSTUBS_ENTRY5 58, QueryAttributesFile, 0
SYSSTUBS_ENTRY6 58, QueryAttributesFile, 0
SYSSTUBS_ENTRY7 58, QueryAttributesFile, 0
SYSSTUBS_ENTRY8 58, QueryAttributesFile, 0
SYSSTUBS_ENTRY1 59, ClearEvent, 0
SYSSTUBS_ENTRY2 59, ClearEvent, 0
SYSSTUBS_ENTRY3 59, ClearEvent, 0
SYSSTUBS_ENTRY4 59, ClearEvent, 0
SYSSTUBS_ENTRY5 59, ClearEvent, 0
SYSSTUBS_ENTRY6 59, ClearEvent, 0
SYSSTUBS_ENTRY7 59, ClearEvent, 0
SYSSTUBS_ENTRY8 59, ClearEvent, 0
SYSSTUBS_ENTRY1 60, ReadVirtualMemory, 1
SYSSTUBS_ENTRY2 60, ReadVirtualMemory, 1
SYSSTUBS_ENTRY3 60, ReadVirtualMemory, 1
SYSSTUBS_ENTRY4 60, ReadVirtualMemory, 1
SYSSTUBS_ENTRY5 60, ReadVirtualMemory, 1
SYSSTUBS_ENTRY6 60, ReadVirtualMemory, 1
SYSSTUBS_ENTRY7 60, ReadVirtualMemory, 1
SYSSTUBS_ENTRY8 60, ReadVirtualMemory, 1
SYSSTUBS_ENTRY1 61, OpenEvent, 0
SYSSTUBS_ENTRY2 61, OpenEvent, 0
SYSSTUBS_ENTRY3 61, OpenEvent, 0
SYSSTUBS_ENTRY4 61, OpenEvent, 0
SYSSTUBS_ENTRY5 61, OpenEvent, 0
SYSSTUBS_ENTRY6 61, OpenEvent, 0
SYSSTUBS_ENTRY7 61, OpenEvent, 0
SYSSTUBS_ENTRY8 61, OpenEvent, 0
SYSSTUBS_ENTRY1 62, AdjustPrivilegesToken, 2
SYSSTUBS_ENTRY2 62, AdjustPrivilegesToken, 2
SYSSTUBS_ENTRY3 62, AdjustPrivilegesToken, 2
SYSSTUBS_ENTRY4 62, AdjustPrivilegesToken, 2
SYSSTUBS_ENTRY5 62, AdjustPrivilegesToken, 2
SYSSTUBS_ENTRY6 62, AdjustPrivilegesToken, 2
SYSSTUBS_ENTRY7 62, AdjustPrivilegesToken, 2
SYSSTUBS_ENTRY8 62, AdjustPrivilegesToken, 2
SYSSTUBS_ENTRY1 63, DuplicateToken, 2
SYSSTUBS_ENTRY2 63, DuplicateToken, 2
SYSSTUBS_ENTRY3 63, DuplicateToken, 2
SYSSTUBS_ENTRY4 63, DuplicateToken, 2
SYSSTUBS_ENTRY5 63, DuplicateToken, 2
SYSSTUBS_ENTRY6 63, DuplicateToken, 2
SYSSTUBS_ENTRY7 63, DuplicateToken, 2
SYSSTUBS_ENTRY8 63, DuplicateToken, 2
SYSSTUBS_ENTRY1 64, Continue, 0
SYSSTUBS_ENTRY2 64, Continue, 0
SYSSTUBS_ENTRY3 64, Continue, 0
SYSSTUBS_ENTRY4 64, Continue, 0
SYSSTUBS_ENTRY5 64, Continue, 0
SYSSTUBS_ENTRY6 64, Continue, 0
SYSSTUBS_ENTRY7 64, Continue, 0
SYSSTUBS_ENTRY8 64, Continue, 0
SYSSTUBS_ENTRY1 65, QueryDefaultUILanguage, 0
SYSSTUBS_ENTRY2 65, QueryDefaultUILanguage, 0
SYSSTUBS_ENTRY3 65, QueryDefaultUILanguage, 0
SYSSTUBS_ENTRY4 65, QueryDefaultUILanguage, 0
SYSSTUBS_ENTRY5 65, QueryDefaultUILanguage, 0
SYSSTUBS_ENTRY6 65, QueryDefaultUILanguage, 0
SYSSTUBS_ENTRY7 65, QueryDefaultUILanguage, 0
SYSSTUBS_ENTRY8 65, QueryDefaultUILanguage, 0
SYSSTUBS_ENTRY1 66, QueueApcThread, 1
SYSSTUBS_ENTRY2 66, QueueApcThread, 1
SYSSTUBS_ENTRY3 66, QueueApcThread, 1
SYSSTUBS_ENTRY4 66, QueueApcThread, 1
SYSSTUBS_ENTRY5 66, QueueApcThread, 1
SYSSTUBS_ENTRY6 66, QueueApcThread, 1
SYSSTUBS_ENTRY7 66, QueueApcThread, 1
SYSSTUBS_ENTRY8 66, QueueApcThread, 1
SYSSTUBS_ENTRY1 67, YieldExecution, 0
SYSSTUBS_ENTRY2 67, YieldExecution, 0
SYSSTUBS_ENTRY3 67, YieldExecution, 0
SYSSTUBS_ENTRY4 67, YieldExecution, 0
SYSSTUBS_ENTRY5 67, YieldExecution, 0
SYSSTUBS_ENTRY6 67, YieldExecution, 0
SYSSTUBS_ENTRY7 67, YieldExecution, 0
SYSSTUBS_ENTRY8 67, YieldExecution, 0
SYSSTUBS_ENTRY1 68, AddAtom, 0
SYSSTUBS_ENTRY2 68, AddAtom, 0
SYSSTUBS_ENTRY3 68, AddAtom, 0
SYSSTUBS_ENTRY4 68, AddAtom, 0
SYSSTUBS_ENTRY5 68, AddAtom, 0
SYSSTUBS_ENTRY6 68, AddAtom, 0
SYSSTUBS_ENTRY7 68, AddAtom, 0
SYSSTUBS_ENTRY8 68, AddAtom, 0
SYSSTUBS_ENTRY1 69, CreateEvent, 1
SYSSTUBS_ENTRY2 69, CreateEvent, 1
SYSSTUBS_ENTRY3 69, CreateEvent, 1
SYSSTUBS_ENTRY4 69, CreateEvent, 1
SYSSTUBS_ENTRY5 69, CreateEvent, 1
SYSSTUBS_ENTRY6 69, CreateEvent, 1
SYSSTUBS_ENTRY7 69, CreateEvent, 1
SYSSTUBS_ENTRY8 69, CreateEvent, 1
SYSSTUBS_ENTRY1 70, QueryVolumeInformationFile, 1
SYSSTUBS_ENTRY2 70, QueryVolumeInformationFile, 1
SYSSTUBS_ENTRY3 70, QueryVolumeInformationFile, 1
SYSSTUBS_ENTRY4 70, QueryVolumeInformationFile, 1
SYSSTUBS_ENTRY5 70, QueryVolumeInformationFile, 1
SYSSTUBS_ENTRY6 70, QueryVolumeInformationFile, 1
SYSSTUBS_ENTRY7 70, QueryVolumeInformationFile, 1
SYSSTUBS_ENTRY8 70, QueryVolumeInformationFile, 1
SYSSTUBS_ENTRY1 71, CreateSection, 3
SYSSTUBS_ENTRY2 71, CreateSection, 3
SYSSTUBS_ENTRY3 71, CreateSection, 3
SYSSTUBS_ENTRY4 71, CreateSection, 3
SYSSTUBS_ENTRY5 71, CreateSection, 3
SYSSTUBS_ENTRY6 71, CreateSection, 3
SYSSTUBS_ENTRY7 71, CreateSection, 3
SYSSTUBS_ENTRY8 71, CreateSection, 3
SYSSTUBS_ENTRY1 72, FlushBuffersFile, 0
SYSSTUBS_ENTRY2 72, FlushBuffersFile, 0
SYSSTUBS_ENTRY3 72, FlushBuffersFile, 0
SYSSTUBS_ENTRY4 72, FlushBuffersFile, 0
SYSSTUBS_ENTRY5 72, FlushBuffersFile, 0
SYSSTUBS_ENTRY6 72, FlushBuffersFile, 0
SYSSTUBS_ENTRY7 72, FlushBuffersFile, 0
SYSSTUBS_ENTRY8 72, FlushBuffersFile, 0
SYSSTUBS_ENTRY1 73, ApphelpCacheControl, 0
SYSSTUBS_ENTRY2 73, ApphelpCacheControl, 0
SYSSTUBS_ENTRY3 73, ApphelpCacheControl, 0
SYSSTUBS_ENTRY4 73, ApphelpCacheControl, 0
SYSSTUBS_ENTRY5 73, ApphelpCacheControl, 0
SYSSTUBS_ENTRY6 73, ApphelpCacheControl, 0
SYSSTUBS_ENTRY7 73, ApphelpCacheControl, 0
SYSSTUBS_ENTRY8 73, ApphelpCacheControl, 0
SYSSTUBS_ENTRY1 74, CreateProcessEx, 5
SYSSTUBS_ENTRY2 74, CreateProcessEx, 5
SYSSTUBS_ENTRY3 74, CreateProcessEx, 5
SYSSTUBS_ENTRY4 74, CreateProcessEx, 5
SYSSTUBS_ENTRY5 74, CreateProcessEx, 5
SYSSTUBS_ENTRY6 74, CreateProcessEx, 5
SYSSTUBS_ENTRY7 74, CreateProcessEx, 5
SYSSTUBS_ENTRY8 74, CreateProcessEx, 5
SYSSTUBS_ENTRY1 75, CreateThread, 4
SYSSTUBS_ENTRY2 75, CreateThread, 4
SYSSTUBS_ENTRY3 75, CreateThread, 4
SYSSTUBS_ENTRY4 75, CreateThread, 4
SYSSTUBS_ENTRY5 75, CreateThread, 4
SYSSTUBS_ENTRY6 75, CreateThread, 4
SYSSTUBS_ENTRY7 75, CreateThread, 4
SYSSTUBS_ENTRY8 75, CreateThread, 4
SYSSTUBS_ENTRY1 76, IsProcessInJob, 0
SYSSTUBS_ENTRY2 76, IsProcessInJob, 0
SYSSTUBS_ENTRY3 76, IsProcessInJob, 0
SYSSTUBS_ENTRY4 76, IsProcessInJob, 0
SYSSTUBS_ENTRY5 76, IsProcessInJob, 0
SYSSTUBS_ENTRY6 76, IsProcessInJob, 0
SYSSTUBS_ENTRY7 76, IsProcessInJob, 0
SYSSTUBS_ENTRY8 76, IsProcessInJob, 0
SYSSTUBS_ENTRY1 77, ProtectVirtualMemory, 1
SYSSTUBS_ENTRY2 77, ProtectVirtualMemory, 1
SYSSTUBS_ENTRY3 77, ProtectVirtualMemory, 1
SYSSTUBS_ENTRY4 77, ProtectVirtualMemory, 1
SYSSTUBS_ENTRY5 77, ProtectVirtualMemory, 1
SYSSTUBS_ENTRY6 77, ProtectVirtualMemory, 1
SYSSTUBS_ENTRY7 77, ProtectVirtualMemory, 1
SYSSTUBS_ENTRY8 77, ProtectVirtualMemory, 1
SYSSTUBS_ENTRY1 78, QuerySection, 1
SYSSTUBS_ENTRY2 78, QuerySection, 1
SYSSTUBS_ENTRY3 78, QuerySection, 1
SYSSTUBS_ENTRY4 78, QuerySection, 1
SYSSTUBS_ENTRY5 78, QuerySection, 1
SYSSTUBS_ENTRY6 78, QuerySection, 1
SYSSTUBS_ENTRY7 78, QuerySection, 1
SYSSTUBS_ENTRY8 78, QuerySection, 1
SYSSTUBS_ENTRY1 79, ResumeThread, 0
SYSSTUBS_ENTRY2 79, ResumeThread, 0
SYSSTUBS_ENTRY3 79, ResumeThread, 0
SYSSTUBS_ENTRY4 79, ResumeThread, 0
SYSSTUBS_ENTRY5 79, ResumeThread, 0
SYSSTUBS_ENTRY6 79, ResumeThread, 0
SYSSTUBS_ENTRY7 79, ResumeThread, 0
SYSSTUBS_ENTRY8 79, ResumeThread, 0
SYSSTUBS_ENTRY1 80, TerminateThread, 0
SYSSTUBS_ENTRY2 80, TerminateThread, 0
SYSSTUBS_ENTRY3 80, TerminateThread, 0
SYSSTUBS_ENTRY4 80, TerminateThread, 0
SYSSTUBS_ENTRY5 80, TerminateThread, 0
SYSSTUBS_ENTRY6 80, TerminateThread, 0
SYSSTUBS_ENTRY7 80, TerminateThread, 0
SYSSTUBS_ENTRY8 80, TerminateThread, 0
SYSSTUBS_ENTRY1 81, ReadRequestData, 2
SYSSTUBS_ENTRY2 81, ReadRequestData, 2
SYSSTUBS_ENTRY3 81, ReadRequestData, 2
SYSSTUBS_ENTRY4 81, ReadRequestData, 2
SYSSTUBS_ENTRY5 81, ReadRequestData, 2
SYSSTUBS_ENTRY6 81, ReadRequestData, 2
SYSSTUBS_ENTRY7 81, ReadRequestData, 2
SYSSTUBS_ENTRY8 81, ReadRequestData, 2
SYSSTUBS_ENTRY1 82, CreateFile, 7
SYSSTUBS_ENTRY2 82, CreateFile, 7
SYSSTUBS_ENTRY3 82, CreateFile, 7
SYSSTUBS_ENTRY4 82, CreateFile, 7
SYSSTUBS_ENTRY5 82, CreateFile, 7
SYSSTUBS_ENTRY6 82, CreateFile, 7
SYSSTUBS_ENTRY7 82, CreateFile, 7
SYSSTUBS_ENTRY8 82, CreateFile, 7
SYSSTUBS_ENTRY1 83, QueryEvent, 1
SYSSTUBS_ENTRY2 83, QueryEvent, 1
SYSSTUBS_ENTRY3 83, QueryEvent, 1
SYSSTUBS_ENTRY4 83, QueryEvent, 1
SYSSTUBS_ENTRY5 83, QueryEvent, 1
SYSSTUBS_ENTRY6 83, QueryEvent, 1
SYSSTUBS_ENTRY7 83, QueryEvent, 1
SYSSTUBS_ENTRY8 83, QueryEvent, 1
SYSSTUBS_ENTRY1 84, WriteRequestData, 2
SYSSTUBS_ENTRY2 84, WriteRequestData, 2
SYSSTUBS_ENTRY3 84, WriteRequestData, 2
SYSSTUBS_ENTRY4 84, WriteRequestData, 2
SYSSTUBS_ENTRY5 84, WriteRequestData, 2
SYSSTUBS_ENTRY6 84, WriteRequestData, 2
SYSSTUBS_ENTRY7 84, WriteRequestData, 2
SYSSTUBS_ENTRY8 84, WriteRequestData, 2
SYSSTUBS_ENTRY1 85, OpenDirectoryObject, 0
SYSSTUBS_ENTRY2 85, OpenDirectoryObject, 0
SYSSTUBS_ENTRY3 85, OpenDirectoryObject, 0
SYSSTUBS_ENTRY4 85, OpenDirectoryObject, 0
SYSSTUBS_ENTRY5 85, OpenDirectoryObject, 0
SYSSTUBS_ENTRY6 85, OpenDirectoryObject, 0
SYSSTUBS_ENTRY7 85, OpenDirectoryObject, 0
SYSSTUBS_ENTRY8 85, OpenDirectoryObject, 0
SYSSTUBS_ENTRY1 86, AccessCheckByTypeAndAuditAlarm, 12
SYSSTUBS_ENTRY2 86, AccessCheckByTypeAndAuditAlarm, 12
SYSSTUBS_ENTRY3 86, AccessCheckByTypeAndAuditAlarm, 12
SYSSTUBS_ENTRY4 86, AccessCheckByTypeAndAuditAlarm, 12
SYSSTUBS_ENTRY5 86, AccessCheckByTypeAndAuditAlarm, 12
SYSSTUBS_ENTRY6 86, AccessCheckByTypeAndAuditAlarm, 12
SYSSTUBS_ENTRY7 86, AccessCheckByTypeAndAuditAlarm, 12
SYSSTUBS_ENTRY8 86, AccessCheckByTypeAndAuditAlarm, 12
SYSSTUBS_ENTRY1 87, QuerySystemTime, 0
SYSSTUBS_ENTRY2 87, QuerySystemTime, 0
SYSSTUBS_ENTRY3 87, QuerySystemTime, 0
SYSSTUBS_ENTRY4 87, QuerySystemTime, 0
SYSSTUBS_ENTRY5 87, QuerySystemTime, 0
SYSSTUBS_ENTRY6 87, QuerySystemTime, 0
SYSSTUBS_ENTRY7 87, QuerySystemTime, 0
SYSSTUBS_ENTRY8 87, QuerySystemTime, 0
SYSSTUBS_ENTRY1 88, WaitForMultipleObjects, 1
SYSSTUBS_ENTRY2 88, WaitForMultipleObjects, 1
SYSSTUBS_ENTRY3 88, WaitForMultipleObjects, 1
SYSSTUBS_ENTRY4 88, WaitForMultipleObjects, 1
SYSSTUBS_ENTRY5 88, WaitForMultipleObjects, 1
SYSSTUBS_ENTRY6 88, WaitForMultipleObjects, 1
SYSSTUBS_ENTRY7 88, WaitForMultipleObjects, 1
SYSSTUBS_ENTRY8 88, WaitForMultipleObjects, 1
SYSSTUBS_ENTRY1 89, SetInformationObject, 0
SYSSTUBS_ENTRY2 89, SetInformationObject, 0
SYSSTUBS_ENTRY3 89, SetInformationObject, 0
SYSSTUBS_ENTRY4 89, SetInformationObject, 0
SYSSTUBS_ENTRY5 89, SetInformationObject, 0
SYSSTUBS_ENTRY6 89, SetInformationObject, 0
SYSSTUBS_ENTRY7 89, SetInformationObject, 0
SYSSTUBS_ENTRY8 89, SetInformationObject, 0
SYSSTUBS_ENTRY1 90, CancelIoFile, 0
SYSSTUBS_ENTRY2 90, CancelIoFile, 0
SYSSTUBS_ENTRY3 90, CancelIoFile, 0
SYSSTUBS_ENTRY4 90, CancelIoFile, 0
SYSSTUBS_ENTRY5 90, CancelIoFile, 0
SYSSTUBS_ENTRY6 90, CancelIoFile, 0
SYSSTUBS_ENTRY7 90, CancelIoFile, 0
SYSSTUBS_ENTRY8 90, CancelIoFile, 0
SYSSTUBS_ENTRY1 91, TraceEvent, 0
SYSSTUBS_ENTRY2 91, TraceEvent, 0
SYSSTUBS_ENTRY3 91, TraceEvent, 0
SYSSTUBS_ENTRY4 91, TraceEvent, 0
SYSSTUBS_ENTRY5 91, TraceEvent, 0
SYSSTUBS_ENTRY6 91, TraceEvent, 0
SYSSTUBS_ENTRY7 91, TraceEvent, 0
SYSSTUBS_ENTRY8 91, TraceEvent, 0
SYSSTUBS_ENTRY1 92, PowerInformation, 1
SYSSTUBS_ENTRY2 92, PowerInformation, 1
SYSSTUBS_ENTRY3 92, PowerInformation, 1
SYSSTUBS_ENTRY4 92, PowerInformation, 1
SYSSTUBS_ENTRY5 92, PowerInformation, 1
SYSSTUBS_ENTRY6 92, PowerInformation, 1
SYSSTUBS_ENTRY7 92, PowerInformation, 1
SYSSTUBS_ENTRY8 92, PowerInformation, 1
SYSSTUBS_ENTRY1 93, SetValueKey, 2
SYSSTUBS_ENTRY2 93, SetValueKey, 2
SYSSTUBS_ENTRY3 93, SetValueKey, 2
SYSSTUBS_ENTRY4 93, SetValueKey, 2
SYSSTUBS_ENTRY5 93, SetValueKey, 2
SYSSTUBS_ENTRY6 93, SetValueKey, 2
SYSSTUBS_ENTRY7 93, SetValueKey, 2
SYSSTUBS_ENTRY8 93, SetValueKey, 2
SYSSTUBS_ENTRY1 94, CancelTimer, 0
SYSSTUBS_ENTRY2 94, CancelTimer, 0
SYSSTUBS_ENTRY3 94, CancelTimer, 0
SYSSTUBS_ENTRY4 94, CancelTimer, 0
SYSSTUBS_ENTRY5 94, CancelTimer, 0
SYSSTUBS_ENTRY6 94, CancelTimer, 0
SYSSTUBS_ENTRY7 94, CancelTimer, 0
SYSSTUBS_ENTRY8 94, CancelTimer, 0
SYSSTUBS_ENTRY1 95, SetTimer, 3
SYSSTUBS_ENTRY2 95, SetTimer, 3
SYSSTUBS_ENTRY3 95, SetTimer, 3
SYSSTUBS_ENTRY4 95, SetTimer, 3
SYSSTUBS_ENTRY5 95, SetTimer, 3
SYSSTUBS_ENTRY6 95, SetTimer, 3
SYSSTUBS_ENTRY7 95, SetTimer, 3
SYSSTUBS_ENTRY8 95, SetTimer, 3
SYSSTUBS_ENTRY1 96, AcceptConnectPort, 2
SYSSTUBS_ENTRY2 96, AcceptConnectPort, 2
SYSSTUBS_ENTRY3 96, AcceptConnectPort, 2
SYSSTUBS_ENTRY4 96, AcceptConnectPort, 2
SYSSTUBS_ENTRY5 96, AcceptConnectPort, 2
SYSSTUBS_ENTRY6 96, AcceptConnectPort, 2
SYSSTUBS_ENTRY7 96, AcceptConnectPort, 2
SYSSTUBS_ENTRY8 96, AcceptConnectPort, 2
SYSSTUBS_ENTRY1 97, AccessCheck, 4
SYSSTUBS_ENTRY2 97, AccessCheck, 4
SYSSTUBS_ENTRY3 97, AccessCheck, 4
SYSSTUBS_ENTRY4 97, AccessCheck, 4
SYSSTUBS_ENTRY5 97, AccessCheck, 4
SYSSTUBS_ENTRY6 97, AccessCheck, 4
SYSSTUBS_ENTRY7 97, AccessCheck, 4
SYSSTUBS_ENTRY8 97, AccessCheck, 4
SYSSTUBS_ENTRY1 98, AccessCheckByType, 7
SYSSTUBS_ENTRY2 98, AccessCheckByType, 7
SYSSTUBS_ENTRY3 98, AccessCheckByType, 7
SYSSTUBS_ENTRY4 98, AccessCheckByType, 7
SYSSTUBS_ENTRY5 98, AccessCheckByType, 7
SYSSTUBS_ENTRY6 98, AccessCheckByType, 7
SYSSTUBS_ENTRY7 98, AccessCheckByType, 7
SYSSTUBS_ENTRY8 98, AccessCheckByType, 7
SYSSTUBS_ENTRY1 99, AccessCheckByTypeResultList, 7
SYSSTUBS_ENTRY2 99, AccessCheckByTypeResultList, 7
SYSSTUBS_ENTRY3 99, AccessCheckByTypeResultList, 7
SYSSTUBS_ENTRY4 99, AccessCheckByTypeResultList, 7
SYSSTUBS_ENTRY5 99, AccessCheckByTypeResultList, 7
SYSSTUBS_ENTRY6 99, AccessCheckByTypeResultList, 7
SYSSTUBS_ENTRY7 99, AccessCheckByTypeResultList, 7
SYSSTUBS_ENTRY8 99, AccessCheckByTypeResultList, 7
SYSSTUBS_ENTRY1 100, AccessCheckByTypeResultListAndAuditAlarm, 12
SYSSTUBS_ENTRY2 100, AccessCheckByTypeResultListAndAuditAlarm, 12
SYSSTUBS_ENTRY3 100, AccessCheckByTypeResultListAndAuditAlarm, 12
SYSSTUBS_ENTRY4 100, AccessCheckByTypeResultListAndAuditAlarm, 12
SYSSTUBS_ENTRY5 100, AccessCheckByTypeResultListAndAuditAlarm, 12
SYSSTUBS_ENTRY6 100, AccessCheckByTypeResultListAndAuditAlarm, 12
SYSSTUBS_ENTRY7 100, AccessCheckByTypeResultListAndAuditAlarm, 12
SYSSTUBS_ENTRY8 100, AccessCheckByTypeResultListAndAuditAlarm, 12
SYSSTUBS_ENTRY1 101, AccessCheckByTypeResultListAndAuditAlarmByHandle, 13
SYSSTUBS_ENTRY2 101, AccessCheckByTypeResultListAndAuditAlarmByHandle, 13
SYSSTUBS_ENTRY3 101, AccessCheckByTypeResultListAndAuditAlarmByHandle, 13
SYSSTUBS_ENTRY4 101, AccessCheckByTypeResultListAndAuditAlarmByHandle, 13
SYSSTUBS_ENTRY5 101, AccessCheckByTypeResultListAndAuditAlarmByHandle, 13
SYSSTUBS_ENTRY6 101, AccessCheckByTypeResultListAndAuditAlarmByHandle, 13
SYSSTUBS_ENTRY7 101, AccessCheckByTypeResultListAndAuditAlarmByHandle, 13
SYSSTUBS_ENTRY8 101, AccessCheckByTypeResultListAndAuditAlarmByHandle, 13
SYSSTUBS_ENTRY1 102, AddBootEntry, 0
SYSSTUBS_ENTRY2 102, AddBootEntry, 0
SYSSTUBS_ENTRY3 102, AddBootEntry, 0
SYSSTUBS_ENTRY4 102, AddBootEntry, 0
SYSSTUBS_ENTRY5 102, AddBootEntry, 0
SYSSTUBS_ENTRY6 102, AddBootEntry, 0
SYSSTUBS_ENTRY7 102, AddBootEntry, 0
SYSSTUBS_ENTRY8 102, AddBootEntry, 0
SYSSTUBS_ENTRY1 103, AddDriverEntry, 0
SYSSTUBS_ENTRY2 103, AddDriverEntry, 0
SYSSTUBS_ENTRY3 103, AddDriverEntry, 0
SYSSTUBS_ENTRY4 103, AddDriverEntry, 0
SYSSTUBS_ENTRY5 103, AddDriverEntry, 0
SYSSTUBS_ENTRY6 103, AddDriverEntry, 0
SYSSTUBS_ENTRY7 103, AddDriverEntry, 0
SYSSTUBS_ENTRY8 103, AddDriverEntry, 0
SYSSTUBS_ENTRY1 104, AdjustGroupsToken, 2
SYSSTUBS_ENTRY2 104, AdjustGroupsToken, 2
SYSSTUBS_ENTRY3 104, AdjustGroupsToken, 2
SYSSTUBS_ENTRY4 104, AdjustGroupsToken, 2
SYSSTUBS_ENTRY5 104, AdjustGroupsToken, 2
SYSSTUBS_ENTRY6 104, AdjustGroupsToken, 2
SYSSTUBS_ENTRY7 104, AdjustGroupsToken, 2
SYSSTUBS_ENTRY8 104, AdjustGroupsToken, 2
SYSSTUBS_ENTRY1 105, AlertResumeThread, 0
SYSSTUBS_ENTRY2 105, AlertResumeThread, 0
SYSSTUBS_ENTRY3 105, AlertResumeThread, 0
SYSSTUBS_ENTRY4 105, AlertResumeThread, 0
SYSSTUBS_ENTRY5 105, AlertResumeThread, 0
SYSSTUBS_ENTRY6 105, AlertResumeThread, 0
SYSSTUBS_ENTRY7 105, AlertResumeThread, 0
SYSSTUBS_ENTRY8 105, AlertResumeThread, 0
SYSSTUBS_ENTRY1 106, AlertThread, 0
SYSSTUBS_ENTRY2 106, AlertThread, 0
SYSSTUBS_ENTRY3 106, AlertThread, 0
SYSSTUBS_ENTRY4 106, AlertThread, 0
SYSSTUBS_ENTRY5 106, AlertThread, 0
SYSSTUBS_ENTRY6 106, AlertThread, 0
SYSSTUBS_ENTRY7 106, AlertThread, 0
SYSSTUBS_ENTRY8 106, AlertThread, 0
SYSSTUBS_ENTRY1 107, AllocateLocallyUniqueId, 0
SYSSTUBS_ENTRY2 107, AllocateLocallyUniqueId, 0
SYSSTUBS_ENTRY3 107, AllocateLocallyUniqueId, 0
SYSSTUBS_ENTRY4 107, AllocateLocallyUniqueId, 0
SYSSTUBS_ENTRY5 107, AllocateLocallyUniqueId, 0
SYSSTUBS_ENTRY6 107, AllocateLocallyUniqueId, 0
SYSSTUBS_ENTRY7 107, AllocateLocallyUniqueId, 0
SYSSTUBS_ENTRY8 107, AllocateLocallyUniqueId, 0
SYSSTUBS_ENTRY1 108, AllocateUserPhysicalPages, 0
SYSSTUBS_ENTRY2 108, AllocateUserPhysicalPages, 0
SYSSTUBS_ENTRY3 108, AllocateUserPhysicalPages, 0
SYSSTUBS_ENTRY4 108, AllocateUserPhysicalPages, 0
SYSSTUBS_ENTRY5 108, AllocateUserPhysicalPages, 0
SYSSTUBS_ENTRY6 108, AllocateUserPhysicalPages, 0
SYSSTUBS_ENTRY7 108, AllocateUserPhysicalPages, 0
SYSSTUBS_ENTRY8 108, AllocateUserPhysicalPages, 0
SYSSTUBS_ENTRY1 109, AllocateUuids, 0
SYSSTUBS_ENTRY2 109, AllocateUuids, 0
SYSSTUBS_ENTRY3 109, AllocateUuids, 0
SYSSTUBS_ENTRY4 109, AllocateUuids, 0
SYSSTUBS_ENTRY5 109, AllocateUuids, 0
SYSSTUBS_ENTRY6 109, AllocateUuids, 0
SYSSTUBS_ENTRY7 109, AllocateUuids, 0
SYSSTUBS_ENTRY8 109, AllocateUuids, 0
SYSSTUBS_ENTRY1 110, AreMappedFilesTheSame, 0
SYSSTUBS_ENTRY2 110, AreMappedFilesTheSame, 0
SYSSTUBS_ENTRY3 110, AreMappedFilesTheSame, 0
SYSSTUBS_ENTRY4 110, AreMappedFilesTheSame, 0
SYSSTUBS_ENTRY5 110, AreMappedFilesTheSame, 0
SYSSTUBS_ENTRY6 110, AreMappedFilesTheSame, 0
SYSSTUBS_ENTRY7 110, AreMappedFilesTheSame, 0
SYSSTUBS_ENTRY8 110, AreMappedFilesTheSame, 0
SYSSTUBS_ENTRY1 111, AssignProcessToJobObject, 0
SYSSTUBS_ENTRY2 111, AssignProcessToJobObject, 0
SYSSTUBS_ENTRY3 111, AssignProcessToJobObject, 0
SYSSTUBS_ENTRY4 111, AssignProcessToJobObject, 0
SYSSTUBS_ENTRY5 111, AssignProcessToJobObject, 0
SYSSTUBS_ENTRY6 111, AssignProcessToJobObject, 0
SYSSTUBS_ENTRY7 111, AssignProcessToJobObject, 0
SYSSTUBS_ENTRY8 111, AssignProcessToJobObject, 0
SYSSTUBS_ENTRY1 112, CancelDeviceWakeupRequest, 0
SYSSTUBS_ENTRY2 112, CancelDeviceWakeupRequest, 0
SYSSTUBS_ENTRY3 112, CancelDeviceWakeupRequest, 0
SYSSTUBS_ENTRY4 112, CancelDeviceWakeupRequest, 0
SYSSTUBS_ENTRY5 112, CancelDeviceWakeupRequest, 0
SYSSTUBS_ENTRY6 112, CancelDeviceWakeupRequest, 0
SYSSTUBS_ENTRY7 112, CancelDeviceWakeupRequest, 0
SYSSTUBS_ENTRY8 112, CancelDeviceWakeupRequest, 0
SYSSTUBS_ENTRY1 113, CompactKeys, 0
SYSSTUBS_ENTRY2 113, CompactKeys, 0
SYSSTUBS_ENTRY3 113, CompactKeys, 0
SYSSTUBS_ENTRY4 113, CompactKeys, 0
SYSSTUBS_ENTRY5 113, CompactKeys, 0
SYSSTUBS_ENTRY6 113, CompactKeys, 0
SYSSTUBS_ENTRY7 113, CompactKeys, 0
SYSSTUBS_ENTRY8 113, CompactKeys, 0
SYSSTUBS_ENTRY1 114, CompareTokens, 0
SYSSTUBS_ENTRY2 114, CompareTokens, 0
SYSSTUBS_ENTRY3 114, CompareTokens, 0
SYSSTUBS_ENTRY4 114, CompareTokens, 0
SYSSTUBS_ENTRY5 114, CompareTokens, 0
SYSSTUBS_ENTRY6 114, CompareTokens, 0
SYSSTUBS_ENTRY7 114, CompareTokens, 0
SYSSTUBS_ENTRY8 114, CompareTokens, 0
SYSSTUBS_ENTRY1 115, CompleteConnectPort, 0
SYSSTUBS_ENTRY2 115, CompleteConnectPort, 0
SYSSTUBS_ENTRY3 115, CompleteConnectPort, 0
SYSSTUBS_ENTRY4 115, CompleteConnectPort, 0
SYSSTUBS_ENTRY5 115, CompleteConnectPort, 0
SYSSTUBS_ENTRY6 115, CompleteConnectPort, 0
SYSSTUBS_ENTRY7 115, CompleteConnectPort, 0
SYSSTUBS_ENTRY8 115, CompleteConnectPort, 0
SYSSTUBS_ENTRY1 116, CompressKey, 0
SYSSTUBS_ENTRY2 116, CompressKey, 0
SYSSTUBS_ENTRY3 116, CompressKey, 0
SYSSTUBS_ENTRY4 116, CompressKey, 0
SYSSTUBS_ENTRY5 116, CompressKey, 0
SYSSTUBS_ENTRY6 116, CompressKey, 0
SYSSTUBS_ENTRY7 116, CompressKey, 0
SYSSTUBS_ENTRY8 116, CompressKey, 0
SYSSTUBS_ENTRY1 117, ConnectPort, 4
SYSSTUBS_ENTRY2 117, ConnectPort, 4
SYSSTUBS_ENTRY3 117, ConnectPort, 4
SYSSTUBS_ENTRY4 117, ConnectPort, 4
SYSSTUBS_ENTRY5 117, ConnectPort, 4
SYSSTUBS_ENTRY6 117, ConnectPort, 4
SYSSTUBS_ENTRY7 117, ConnectPort, 4
SYSSTUBS_ENTRY8 117, ConnectPort, 4
SYSSTUBS_ENTRY1 118, CreateDebugObject, 0
SYSSTUBS_ENTRY2 118, CreateDebugObject, 0
SYSSTUBS_ENTRY3 118, CreateDebugObject, 0
SYSSTUBS_ENTRY4 118, CreateDebugObject, 0
SYSSTUBS_ENTRY5 118, CreateDebugObject, 0
SYSSTUBS_ENTRY6 118, CreateDebugObject, 0
SYSSTUBS_ENTRY7 118, CreateDebugObject, 0
SYSSTUBS_ENTRY8 118, CreateDebugObject, 0
SYSSTUBS_ENTRY1 119, CreateDirectoryObject, 0
SYSSTUBS_ENTRY2 119, CreateDirectoryObject, 0
SYSSTUBS_ENTRY3 119, CreateDirectoryObject, 0
SYSSTUBS_ENTRY4 119, CreateDirectoryObject, 0
SYSSTUBS_ENTRY5 119, CreateDirectoryObject, 0
SYSSTUBS_ENTRY6 119, CreateDirectoryObject, 0
SYSSTUBS_ENTRY7 119, CreateDirectoryObject, 0
SYSSTUBS_ENTRY8 119, CreateDirectoryObject, 0
SYSSTUBS_ENTRY1 120, CreateEventPair, 0
SYSSTUBS_ENTRY2 120, CreateEventPair, 0
SYSSTUBS_ENTRY3 120, CreateEventPair, 0
SYSSTUBS_ENTRY4 120, CreateEventPair, 0
SYSSTUBS_ENTRY5 120, CreateEventPair, 0
SYSSTUBS_ENTRY6 120, CreateEventPair, 0
SYSSTUBS_ENTRY7 120, CreateEventPair, 0
SYSSTUBS_ENTRY8 120, CreateEventPair, 0
SYSSTUBS_ENTRY1 121, CreateIoCompletion, 0
SYSSTUBS_ENTRY2 121, CreateIoCompletion, 0
SYSSTUBS_ENTRY3 121, CreateIoCompletion, 0
SYSSTUBS_ENTRY4 121, CreateIoCompletion, 0
SYSSTUBS_ENTRY5 121, CreateIoCompletion, 0
SYSSTUBS_ENTRY6 121, CreateIoCompletion, 0
SYSSTUBS_ENTRY7 121, CreateIoCompletion, 0
SYSSTUBS_ENTRY8 121, CreateIoCompletion, 0
SYSSTUBS_ENTRY1 122, CreateJobObject, 0
SYSSTUBS_ENTRY2 122, CreateJobObject, 0
SYSSTUBS_ENTRY3 122, CreateJobObject, 0
SYSSTUBS_ENTRY4 122, CreateJobObject, 0
SYSSTUBS_ENTRY5 122, CreateJobObject, 0
SYSSTUBS_ENTRY6 122, CreateJobObject, 0
SYSSTUBS_ENTRY7 122, CreateJobObject, 0
SYSSTUBS_ENTRY8 122, CreateJobObject, 0
SYSSTUBS_ENTRY1 123, CreateJobSet, 0
SYSSTUBS_ENTRY2 123, CreateJobSet, 0
SYSSTUBS_ENTRY3 123, CreateJobSet, 0
SYSSTUBS_ENTRY4 123, CreateJobSet, 0
SYSSTUBS_ENTRY5 123, CreateJobSet, 0
SYSSTUBS_ENTRY6 123, CreateJobSet, 0
SYSSTUBS_ENTRY7 123, CreateJobSet, 0
SYSSTUBS_ENTRY8 123, CreateJobSet, 0
SYSSTUBS_ENTRY1 124, CreateKeyedEvent, 0
SYSSTUBS_ENTRY2 124, CreateKeyedEvent, 0
SYSSTUBS_ENTRY3 124, CreateKeyedEvent, 0
SYSSTUBS_ENTRY4 124, CreateKeyedEvent, 0
SYSSTUBS_ENTRY5 124, CreateKeyedEvent, 0
SYSSTUBS_ENTRY6 124, CreateKeyedEvent, 0
SYSSTUBS_ENTRY7 124, CreateKeyedEvent, 0
SYSSTUBS_ENTRY8 124, CreateKeyedEvent, 0
SYSSTUBS_ENTRY1 125, CreateMailslotFile, 4
SYSSTUBS_ENTRY2 125, CreateMailslotFile, 4
SYSSTUBS_ENTRY3 125, CreateMailslotFile, 4
SYSSTUBS_ENTRY4 125, CreateMailslotFile, 4
SYSSTUBS_ENTRY5 125, CreateMailslotFile, 4
SYSSTUBS_ENTRY6 125, CreateMailslotFile, 4
SYSSTUBS_ENTRY7 125, CreateMailslotFile, 4
SYSSTUBS_ENTRY8 125, CreateMailslotFile, 4
SYSSTUBS_ENTRY1 126, CreateMutant, 0
SYSSTUBS_ENTRY2 126, CreateMutant, 0
SYSSTUBS_ENTRY3 126, CreateMutant, 0
SYSSTUBS_ENTRY4 126, CreateMutant, 0
SYSSTUBS_ENTRY5 126, CreateMutant, 0
SYSSTUBS_ENTRY6 126, CreateMutant, 0
SYSSTUBS_ENTRY7 126, CreateMutant, 0
SYSSTUBS_ENTRY8 126, CreateMutant, 0
SYSSTUBS_ENTRY1 127, CreateNamedPipeFile, 10
SYSSTUBS_ENTRY2 127, CreateNamedPipeFile, 10
SYSSTUBS_ENTRY3 127, CreateNamedPipeFile, 10
SYSSTUBS_ENTRY4 127, CreateNamedPipeFile, 10
SYSSTUBS_ENTRY5 127, CreateNamedPipeFile, 10
SYSSTUBS_ENTRY6 127, CreateNamedPipeFile, 10
SYSSTUBS_ENTRY7 127, CreateNamedPipeFile, 10
SYSSTUBS_ENTRY8 127, CreateNamedPipeFile, 10
SYSSTUBS_ENTRY1 128, CreatePagingFile, 0
SYSSTUBS_ENTRY2 128, CreatePagingFile, 0
SYSSTUBS_ENTRY3 128, CreatePagingFile, 0
SYSSTUBS_ENTRY4 128, CreatePagingFile, 0
SYSSTUBS_ENTRY5 128, CreatePagingFile, 0
SYSSTUBS_ENTRY6 128, CreatePagingFile, 0
SYSSTUBS_ENTRY7 128, CreatePagingFile, 0
SYSSTUBS_ENTRY8 128, CreatePagingFile, 0
SYSSTUBS_ENTRY1 129, CreatePort, 1
SYSSTUBS_ENTRY2 129, CreatePort, 1
SYSSTUBS_ENTRY3 129, CreatePort, 1
SYSSTUBS_ENTRY4 129, CreatePort, 1
SYSSTUBS_ENTRY5 129, CreatePort, 1
SYSSTUBS_ENTRY6 129, CreatePort, 1
SYSSTUBS_ENTRY7 129, CreatePort, 1
SYSSTUBS_ENTRY8 129, CreatePort, 1
SYSSTUBS_ENTRY1 130, CreateProcess, 4
SYSSTUBS_ENTRY2 130, CreateProcess, 4
SYSSTUBS_ENTRY3 130, CreateProcess, 4
SYSSTUBS_ENTRY4 130, CreateProcess, 4
SYSSTUBS_ENTRY5 130, CreateProcess, 4
SYSSTUBS_ENTRY6 130, CreateProcess, 4
SYSSTUBS_ENTRY7 130, CreateProcess, 4
SYSSTUBS_ENTRY8 130, CreateProcess, 4
SYSSTUBS_ENTRY1 131, CreateProfile, 5
SYSSTUBS_ENTRY2 131, CreateProfile, 5
SYSSTUBS_ENTRY3 131, CreateProfile, 5
SYSSTUBS_ENTRY4 131, CreateProfile, 5
SYSSTUBS_ENTRY5 131, CreateProfile, 5
SYSSTUBS_ENTRY6 131, CreateProfile, 5
SYSSTUBS_ENTRY7 131, CreateProfile, 5
SYSSTUBS_ENTRY8 131, CreateProfile, 5
SYSSTUBS_ENTRY1 132, CreateSemaphore, 1
SYSSTUBS_ENTRY2 132, CreateSemaphore, 1
SYSSTUBS_ENTRY3 132, CreateSemaphore, 1
SYSSTUBS_ENTRY4 132, CreateSemaphore, 1
SYSSTUBS_ENTRY5 132, CreateSemaphore, 1
SYSSTUBS_ENTRY6 132, CreateSemaphore, 1
SYSSTUBS_ENTRY7 132, CreateSemaphore, 1
SYSSTUBS_ENTRY8 132, CreateSemaphore, 1
SYSSTUBS_ENTRY1 133, CreateSymbolicLinkObject, 0
SYSSTUBS_ENTRY2 133, CreateSymbolicLinkObject, 0
SYSSTUBS_ENTRY3 133, CreateSymbolicLinkObject, 0
SYSSTUBS_ENTRY4 133, CreateSymbolicLinkObject, 0
SYSSTUBS_ENTRY5 133, CreateSymbolicLinkObject, 0
SYSSTUBS_ENTRY6 133, CreateSymbolicLinkObject, 0
SYSSTUBS_ENTRY7 133, CreateSymbolicLinkObject, 0
SYSSTUBS_ENTRY8 133, CreateSymbolicLinkObject, 0
SYSSTUBS_ENTRY1 134, CreateTimer, 0
SYSSTUBS_ENTRY2 134, CreateTimer, 0
SYSSTUBS_ENTRY3 134, CreateTimer, 0
SYSSTUBS_ENTRY4 134, CreateTimer, 0
SYSSTUBS_ENTRY5 134, CreateTimer, 0
SYSSTUBS_ENTRY6 134, CreateTimer, 0
SYSSTUBS_ENTRY7 134, CreateTimer, 0
SYSSTUBS_ENTRY8 134, CreateTimer, 0
SYSSTUBS_ENTRY1 135, CreateToken, 9
SYSSTUBS_ENTRY2 135, CreateToken, 9
SYSSTUBS_ENTRY3 135, CreateToken, 9
SYSSTUBS_ENTRY4 135, CreateToken, 9
SYSSTUBS_ENTRY5 135, CreateToken, 9
SYSSTUBS_ENTRY6 135, CreateToken, 9
SYSSTUBS_ENTRY7 135, CreateToken, 9
SYSSTUBS_ENTRY8 135, CreateToken, 9
SYSSTUBS_ENTRY1 136, CreateWaitablePort, 1
SYSSTUBS_ENTRY2 136, CreateWaitablePort, 1
SYSSTUBS_ENTRY3 136, CreateWaitablePort, 1
SYSSTUBS_ENTRY4 136, CreateWaitablePort, 1
SYSSTUBS_ENTRY5 136, CreateWaitablePort, 1
SYSSTUBS_ENTRY6 136, CreateWaitablePort, 1
SYSSTUBS_ENTRY7 136, CreateWaitablePort, 1
SYSSTUBS_ENTRY8 136, CreateWaitablePort, 1
SYSSTUBS_ENTRY1 137, DebugActiveProcess, 0
SYSSTUBS_ENTRY2 137, DebugActiveProcess, 0
SYSSTUBS_ENTRY3 137, DebugActiveProcess, 0
SYSSTUBS_ENTRY4 137, DebugActiveProcess, 0
SYSSTUBS_ENTRY5 137, DebugActiveProcess, 0
SYSSTUBS_ENTRY6 137, DebugActiveProcess, 0
SYSSTUBS_ENTRY7 137, DebugActiveProcess, 0
SYSSTUBS_ENTRY8 137, DebugActiveProcess, 0
SYSSTUBS_ENTRY1 138, DebugContinue, 0
SYSSTUBS_ENTRY2 138, DebugContinue, 0
SYSSTUBS_ENTRY3 138, DebugContinue, 0
SYSSTUBS_ENTRY4 138, DebugContinue, 0
SYSSTUBS_ENTRY5 138, DebugContinue, 0
SYSSTUBS_ENTRY6 138, DebugContinue, 0
SYSSTUBS_ENTRY7 138, DebugContinue, 0
SYSSTUBS_ENTRY8 138, DebugContinue, 0
SYSSTUBS_ENTRY1 139, DeleteAtom, 0
SYSSTUBS_ENTRY2 139, DeleteAtom, 0
SYSSTUBS_ENTRY3 139, DeleteAtom, 0
SYSSTUBS_ENTRY4 139, DeleteAtom, 0
SYSSTUBS_ENTRY5 139, DeleteAtom, 0
SYSSTUBS_ENTRY6 139, DeleteAtom, 0
SYSSTUBS_ENTRY7 139, DeleteAtom, 0
SYSSTUBS_ENTRY8 139, DeleteAtom, 0
SYSSTUBS_ENTRY1 140, DeleteBootEntry, 0
SYSSTUBS_ENTRY2 140, DeleteBootEntry, 0
SYSSTUBS_ENTRY3 140, DeleteBootEntry, 0
SYSSTUBS_ENTRY4 140, DeleteBootEntry, 0
SYSSTUBS_ENTRY5 140, DeleteBootEntry, 0
SYSSTUBS_ENTRY6 140, DeleteBootEntry, 0
SYSSTUBS_ENTRY7 140, DeleteBootEntry, 0
SYSSTUBS_ENTRY8 140, DeleteBootEntry, 0
SYSSTUBS_ENTRY1 141, DeleteDriverEntry, 0
SYSSTUBS_ENTRY2 141, DeleteDriverEntry, 0
SYSSTUBS_ENTRY3 141, DeleteDriverEntry, 0
SYSSTUBS_ENTRY4 141, DeleteDriverEntry, 0
SYSSTUBS_ENTRY5 141, DeleteDriverEntry, 0
SYSSTUBS_ENTRY6 141, DeleteDriverEntry, 0
SYSSTUBS_ENTRY7 141, DeleteDriverEntry, 0
SYSSTUBS_ENTRY8 141, DeleteDriverEntry, 0
SYSSTUBS_ENTRY1 142, DeleteFile, 0
SYSSTUBS_ENTRY2 142, DeleteFile, 0
SYSSTUBS_ENTRY3 142, DeleteFile, 0
SYSSTUBS_ENTRY4 142, DeleteFile, 0
SYSSTUBS_ENTRY5 142, DeleteFile, 0
SYSSTUBS_ENTRY6 142, DeleteFile, 0
SYSSTUBS_ENTRY7 142, DeleteFile, 0
SYSSTUBS_ENTRY8 142, DeleteFile, 0
SYSSTUBS_ENTRY1 143, DeleteKey, 0
SYSSTUBS_ENTRY2 143, DeleteKey, 0
SYSSTUBS_ENTRY3 143, DeleteKey, 0
SYSSTUBS_ENTRY4 143, DeleteKey, 0
SYSSTUBS_ENTRY5 143, DeleteKey, 0
SYSSTUBS_ENTRY6 143, DeleteKey, 0
SYSSTUBS_ENTRY7 143, DeleteKey, 0
SYSSTUBS_ENTRY8 143, DeleteKey, 0
SYSSTUBS_ENTRY1 144, DeleteObjectAuditAlarm, 0
SYSSTUBS_ENTRY2 144, DeleteObjectAuditAlarm, 0
SYSSTUBS_ENTRY3 144, DeleteObjectAuditAlarm, 0
SYSSTUBS_ENTRY4 144, DeleteObjectAuditAlarm, 0
SYSSTUBS_ENTRY5 144, DeleteObjectAuditAlarm, 0
SYSSTUBS_ENTRY6 144, DeleteObjectAuditAlarm, 0
SYSSTUBS_ENTRY7 144, DeleteObjectAuditAlarm, 0
SYSSTUBS_ENTRY8 144, DeleteObjectAuditAlarm, 0
SYSSTUBS_ENTRY1 145, DeleteValueKey, 0
SYSSTUBS_ENTRY2 145, DeleteValueKey, 0
SYSSTUBS_ENTRY3 145, DeleteValueKey, 0
SYSSTUBS_ENTRY4 145, DeleteValueKey, 0
SYSSTUBS_ENTRY5 145, DeleteValueKey, 0
SYSSTUBS_ENTRY6 145, DeleteValueKey, 0
SYSSTUBS_ENTRY7 145, DeleteValueKey, 0
SYSSTUBS_ENTRY8 145, DeleteValueKey, 0
SYSSTUBS_ENTRY1 146, DisplayString, 0
SYSSTUBS_ENTRY2 146, DisplayString, 0
SYSSTUBS_ENTRY3 146, DisplayString, 0
SYSSTUBS_ENTRY4 146, DisplayString, 0
SYSSTUBS_ENTRY5 146, DisplayString, 0
SYSSTUBS_ENTRY6 146, DisplayString, 0
SYSSTUBS_ENTRY7 146, DisplayString, 0
SYSSTUBS_ENTRY8 146, DisplayString, 0
SYSSTUBS_ENTRY1 147, EnumerateBootEntries, 0
SYSSTUBS_ENTRY2 147, EnumerateBootEntries, 0
SYSSTUBS_ENTRY3 147, EnumerateBootEntries, 0
SYSSTUBS_ENTRY4 147, EnumerateBootEntries, 0
SYSSTUBS_ENTRY5 147, EnumerateBootEntries, 0
SYSSTUBS_ENTRY6 147, EnumerateBootEntries, 0
SYSSTUBS_ENTRY7 147, EnumerateBootEntries, 0
SYSSTUBS_ENTRY8 147, EnumerateBootEntries, 0
SYSSTUBS_ENTRY1 148, EnumerateDriverEntries, 0
SYSSTUBS_ENTRY2 148, EnumerateDriverEntries, 0
SYSSTUBS_ENTRY3 148, EnumerateDriverEntries, 0
SYSSTUBS_ENTRY4 148, EnumerateDriverEntries, 0
SYSSTUBS_ENTRY5 148, EnumerateDriverEntries, 0
SYSSTUBS_ENTRY6 148, EnumerateDriverEntries, 0
SYSSTUBS_ENTRY7 148, EnumerateDriverEntries, 0
SYSSTUBS_ENTRY8 148, EnumerateDriverEntries, 0
SYSSTUBS_ENTRY1 149, EnumerateSystemEnvironmentValuesEx, 0
SYSSTUBS_ENTRY2 149, EnumerateSystemEnvironmentValuesEx, 0
SYSSTUBS_ENTRY3 149, EnumerateSystemEnvironmentValuesEx, 0
SYSSTUBS_ENTRY4 149, EnumerateSystemEnvironmentValuesEx, 0
SYSSTUBS_ENTRY5 149, EnumerateSystemEnvironmentValuesEx, 0
SYSSTUBS_ENTRY6 149, EnumerateSystemEnvironmentValuesEx, 0
SYSSTUBS_ENTRY7 149, EnumerateSystemEnvironmentValuesEx, 0
SYSSTUBS_ENTRY8 149, EnumerateSystemEnvironmentValuesEx, 0
SYSSTUBS_ENTRY1 150, ExtendSection, 0
SYSSTUBS_ENTRY2 150, ExtendSection, 0
SYSSTUBS_ENTRY3 150, ExtendSection, 0
SYSSTUBS_ENTRY4 150, ExtendSection, 0
SYSSTUBS_ENTRY5 150, ExtendSection, 0
SYSSTUBS_ENTRY6 150, ExtendSection, 0
SYSSTUBS_ENTRY7 150, ExtendSection, 0
SYSSTUBS_ENTRY8 150, ExtendSection, 0
SYSSTUBS_ENTRY1 151, FilterToken, 2
SYSSTUBS_ENTRY2 151, FilterToken, 2
SYSSTUBS_ENTRY3 151, FilterToken, 2
SYSSTUBS_ENTRY4 151, FilterToken, 2
SYSSTUBS_ENTRY5 151, FilterToken, 2
SYSSTUBS_ENTRY6 151, FilterToken, 2
SYSSTUBS_ENTRY7 151, FilterToken, 2
SYSSTUBS_ENTRY8 151, FilterToken, 2
SYSSTUBS_ENTRY1 152, FlushInstructionCache, 0
SYSSTUBS_ENTRY2 152, FlushInstructionCache, 0
SYSSTUBS_ENTRY3 152, FlushInstructionCache, 0
SYSSTUBS_ENTRY4 152, FlushInstructionCache, 0
SYSSTUBS_ENTRY5 152, FlushInstructionCache, 0
SYSSTUBS_ENTRY6 152, FlushInstructionCache, 0
SYSSTUBS_ENTRY7 152, FlushInstructionCache, 0
SYSSTUBS_ENTRY8 152, FlushInstructionCache, 0
SYSSTUBS_ENTRY1 153, FlushKey, 0
SYSSTUBS_ENTRY2 153, FlushKey, 0
SYSSTUBS_ENTRY3 153, FlushKey, 0
SYSSTUBS_ENTRY4 153, FlushKey, 0
SYSSTUBS_ENTRY5 153, FlushKey, 0
SYSSTUBS_ENTRY6 153, FlushKey, 0
SYSSTUBS_ENTRY7 153, FlushKey, 0
SYSSTUBS_ENTRY8 153, FlushKey, 0
SYSSTUBS_ENTRY1 154, FlushVirtualMemory, 0
SYSSTUBS_ENTRY2 154, FlushVirtualMemory, 0
SYSSTUBS_ENTRY3 154, FlushVirtualMemory, 0
SYSSTUBS_ENTRY4 154, FlushVirtualMemory, 0
SYSSTUBS_ENTRY5 154, FlushVirtualMemory, 0
SYSSTUBS_ENTRY6 154, FlushVirtualMemory, 0
SYSSTUBS_ENTRY7 154, FlushVirtualMemory, 0
SYSSTUBS_ENTRY8 154, FlushVirtualMemory, 0
SYSSTUBS_ENTRY1 155, FlushWriteBuffer, 0
SYSSTUBS_ENTRY2 155, FlushWriteBuffer, 0
SYSSTUBS_ENTRY3 155, FlushWriteBuffer, 0
SYSSTUBS_ENTRY4 155, FlushWriteBuffer, 0
SYSSTUBS_ENTRY5 155, FlushWriteBuffer, 0
SYSSTUBS_ENTRY6 155, FlushWriteBuffer, 0
SYSSTUBS_ENTRY7 155, FlushWriteBuffer, 0
SYSSTUBS_ENTRY8 155, FlushWriteBuffer, 0
SYSSTUBS_ENTRY1 156, FreeUserPhysicalPages, 0
SYSSTUBS_ENTRY2 156, FreeUserPhysicalPages, 0
SYSSTUBS_ENTRY3 156, FreeUserPhysicalPages, 0
SYSSTUBS_ENTRY4 156, FreeUserPhysicalPages, 0
SYSSTUBS_ENTRY5 156, FreeUserPhysicalPages, 0
SYSSTUBS_ENTRY6 156, FreeUserPhysicalPages, 0
SYSSTUBS_ENTRY7 156, FreeUserPhysicalPages, 0
SYSSTUBS_ENTRY8 156, FreeUserPhysicalPages, 0
SYSSTUBS_ENTRY1 157, GetContextThread, 0
SYSSTUBS_ENTRY2 157, GetContextThread, 0
SYSSTUBS_ENTRY3 157, GetContextThread, 0
SYSSTUBS_ENTRY4 157, GetContextThread, 0
SYSSTUBS_ENTRY5 157, GetContextThread, 0
SYSSTUBS_ENTRY6 157, GetContextThread, 0
SYSSTUBS_ENTRY7 157, GetContextThread, 0
SYSSTUBS_ENTRY8 157, GetContextThread, 0
SYSSTUBS_ENTRY1 158, GetCurrentProcessorNumber, 0
SYSSTUBS_ENTRY2 158, GetCurrentProcessorNumber, 0
SYSSTUBS_ENTRY3 158, GetCurrentProcessorNumber, 0
SYSSTUBS_ENTRY4 158, GetCurrentProcessorNumber, 0
SYSSTUBS_ENTRY5 158, GetCurrentProcessorNumber, 0
SYSSTUBS_ENTRY6 158, GetCurrentProcessorNumber, 0
SYSSTUBS_ENTRY7 158, GetCurrentProcessorNumber, 0
SYSSTUBS_ENTRY8 158, GetCurrentProcessorNumber, 0
SYSSTUBS_ENTRY1 159, GetDevicePowerState, 0
SYSSTUBS_ENTRY2 159, GetDevicePowerState, 0
SYSSTUBS_ENTRY3 159, GetDevicePowerState, 0
SYSSTUBS_ENTRY4 159, GetDevicePowerState, 0
SYSSTUBS_ENTRY5 159, GetDevicePowerState, 0
SYSSTUBS_ENTRY6 159, GetDevicePowerState, 0
SYSSTUBS_ENTRY7 159, GetDevicePowerState, 0
SYSSTUBS_ENTRY8 159, GetDevicePowerState, 0
SYSSTUBS_ENTRY1 160, GetPlugPlayEvent, 0
SYSSTUBS_ENTRY2 160, GetPlugPlayEvent, 0
SYSSTUBS_ENTRY3 160, GetPlugPlayEvent, 0
SYSSTUBS_ENTRY4 160, GetPlugPlayEvent, 0
SYSSTUBS_ENTRY5 160, GetPlugPlayEvent, 0
SYSSTUBS_ENTRY6 160, GetPlugPlayEvent, 0
SYSSTUBS_ENTRY7 160, GetPlugPlayEvent, 0
SYSSTUBS_ENTRY8 160, GetPlugPlayEvent, 0
SYSSTUBS_ENTRY1 161, GetWriteWatch, 3
SYSSTUBS_ENTRY2 161, GetWriteWatch, 3
SYSSTUBS_ENTRY3 161, GetWriteWatch, 3
SYSSTUBS_ENTRY4 161, GetWriteWatch, 3
SYSSTUBS_ENTRY5 161, GetWriteWatch, 3
SYSSTUBS_ENTRY6 161, GetWriteWatch, 3
SYSSTUBS_ENTRY7 161, GetWriteWatch, 3
SYSSTUBS_ENTRY8 161, GetWriteWatch, 3
SYSSTUBS_ENTRY1 162, ImpersonateAnonymousToken, 0
SYSSTUBS_ENTRY2 162, ImpersonateAnonymousToken, 0
SYSSTUBS_ENTRY3 162, ImpersonateAnonymousToken, 0
SYSSTUBS_ENTRY4 162, ImpersonateAnonymousToken, 0
SYSSTUBS_ENTRY5 162, ImpersonateAnonymousToken, 0
SYSSTUBS_ENTRY6 162, ImpersonateAnonymousToken, 0
SYSSTUBS_ENTRY7 162, ImpersonateAnonymousToken, 0
SYSSTUBS_ENTRY8 162, ImpersonateAnonymousToken, 0
SYSSTUBS_ENTRY1 163, ImpersonateThread, 0
SYSSTUBS_ENTRY2 163, ImpersonateThread, 0
SYSSTUBS_ENTRY3 163, ImpersonateThread, 0
SYSSTUBS_ENTRY4 163, ImpersonateThread, 0
SYSSTUBS_ENTRY5 163, ImpersonateThread, 0
SYSSTUBS_ENTRY6 163, ImpersonateThread, 0
SYSSTUBS_ENTRY7 163, ImpersonateThread, 0
SYSSTUBS_ENTRY8 163, ImpersonateThread, 0
SYSSTUBS_ENTRY1 164, InitializeRegistry, 0
SYSSTUBS_ENTRY2 164, InitializeRegistry, 0
SYSSTUBS_ENTRY3 164, InitializeRegistry, 0
SYSSTUBS_ENTRY4 164, InitializeRegistry, 0
SYSSTUBS_ENTRY5 164, InitializeRegistry, 0
SYSSTUBS_ENTRY6 164, InitializeRegistry, 0
SYSSTUBS_ENTRY7 164, InitializeRegistry, 0
SYSSTUBS_ENTRY8 164, InitializeRegistry, 0
SYSSTUBS_ENTRY1 165, InitiatePowerAction, 0
SYSSTUBS_ENTRY2 165, InitiatePowerAction, 0
SYSSTUBS_ENTRY3 165, InitiatePowerAction, 0
SYSSTUBS_ENTRY4 165, InitiatePowerAction, 0
SYSSTUBS_ENTRY5 165, InitiatePowerAction, 0
SYSSTUBS_ENTRY6 165, InitiatePowerAction, 0
SYSSTUBS_ENTRY7 165, InitiatePowerAction, 0
SYSSTUBS_ENTRY8 165, InitiatePowerAction, 0
SYSSTUBS_ENTRY1 166, IsSystemResumeAutomatic, 0
SYSSTUBS_ENTRY2 166, IsSystemResumeAutomatic, 0
SYSSTUBS_ENTRY3 166, IsSystemResumeAutomatic, 0
SYSSTUBS_ENTRY4 166, IsSystemResumeAutomatic, 0
SYSSTUBS_ENTRY5 166, IsSystemResumeAutomatic, 0
SYSSTUBS_ENTRY6 166, IsSystemResumeAutomatic, 0
SYSSTUBS_ENTRY7 166, IsSystemResumeAutomatic, 0
SYSSTUBS_ENTRY8 166, IsSystemResumeAutomatic, 0
SYSSTUBS_ENTRY1 167, ListenPort, 0
SYSSTUBS_ENTRY2 167, ListenPort, 0
SYSSTUBS_ENTRY3 167, ListenPort, 0
SYSSTUBS_ENTRY4 167, ListenPort, 0
SYSSTUBS_ENTRY5 167, ListenPort, 0
SYSSTUBS_ENTRY6 167, ListenPort, 0
SYSSTUBS_ENTRY7 167, ListenPort, 0
SYSSTUBS_ENTRY8 167, ListenPort, 0
SYSSTUBS_ENTRY1 168, LoadDriver, 0
SYSSTUBS_ENTRY2 168, LoadDriver, 0
SYSSTUBS_ENTRY3 168, LoadDriver, 0
SYSSTUBS_ENTRY4 168, LoadDriver, 0
SYSSTUBS_ENTRY5 168, LoadDriver, 0
SYSSTUBS_ENTRY6 168, LoadDriver, 0
SYSSTUBS_ENTRY7 168, LoadDriver, 0
SYSSTUBS_ENTRY8 168, LoadDriver, 0
SYSSTUBS_ENTRY1 169, LoadKey, 0
SYSSTUBS_ENTRY2 169, LoadKey, 0
SYSSTUBS_ENTRY3 169, LoadKey, 0
SYSSTUBS_ENTRY4 169, LoadKey, 0
SYSSTUBS_ENTRY5 169, LoadKey, 0
SYSSTUBS_ENTRY6 169, LoadKey, 0
SYSSTUBS_ENTRY7 169, LoadKey, 0
SYSSTUBS_ENTRY8 169, LoadKey, 0
SYSSTUBS_ENTRY1 170, LoadKey2, 0
SYSSTUBS_ENTRY2 170, LoadKey2, 0
SYSSTUBS_ENTRY3 170, LoadKey2, 0
SYSSTUBS_ENTRY4 170, LoadKey2, 0
SYSSTUBS_ENTRY5 170, LoadKey2, 0
SYSSTUBS_ENTRY6 170, LoadKey2, 0
SYSSTUBS_ENTRY7 170, LoadKey2, 0
SYSSTUBS_ENTRY8 170, LoadKey2, 0
SYSSTUBS_ENTRY1 171, LoadKeyEx, 0
SYSSTUBS_ENTRY2 171, LoadKeyEx, 0
SYSSTUBS_ENTRY3 171, LoadKeyEx, 0
SYSSTUBS_ENTRY4 171, LoadKeyEx, 0
SYSSTUBS_ENTRY5 171, LoadKeyEx, 0
SYSSTUBS_ENTRY6 171, LoadKeyEx, 0
SYSSTUBS_ENTRY7 171, LoadKeyEx, 0
SYSSTUBS_ENTRY8 171, LoadKeyEx, 0
SYSSTUBS_ENTRY1 172, LockFile, 6
SYSSTUBS_ENTRY2 172, LockFile, 6
SYSSTUBS_ENTRY3 172, LockFile, 6
SYSSTUBS_ENTRY4 172, LockFile, 6
SYSSTUBS_ENTRY5 172, LockFile, 6
SYSSTUBS_ENTRY6 172, LockFile, 6
SYSSTUBS_ENTRY7 172, LockFile, 6
SYSSTUBS_ENTRY8 172, LockFile, 6
SYSSTUBS_ENTRY1 173, LockProductActivationKeys, 0
SYSSTUBS_ENTRY2 173, LockProductActivationKeys, 0
SYSSTUBS_ENTRY3 173, LockProductActivationKeys, 0
SYSSTUBS_ENTRY4 173, LockProductActivationKeys, 0
SYSSTUBS_ENTRY5 173, LockProductActivationKeys, 0
SYSSTUBS_ENTRY6 173, LockProductActivationKeys, 0
SYSSTUBS_ENTRY7 173, LockProductActivationKeys, 0
SYSSTUBS_ENTRY8 173, LockProductActivationKeys, 0
SYSSTUBS_ENTRY1 174, LockRegistryKey, 0
SYSSTUBS_ENTRY2 174, LockRegistryKey, 0
SYSSTUBS_ENTRY3 174, LockRegistryKey, 0
SYSSTUBS_ENTRY4 174, LockRegistryKey, 0
SYSSTUBS_ENTRY5 174, LockRegistryKey, 0
SYSSTUBS_ENTRY6 174, LockRegistryKey, 0
SYSSTUBS_ENTRY7 174, LockRegistryKey, 0
SYSSTUBS_ENTRY8 174, LockRegistryKey, 0
SYSSTUBS_ENTRY1 175, LockVirtualMemory, 0
SYSSTUBS_ENTRY2 175, LockVirtualMemory, 0
SYSSTUBS_ENTRY3 175, LockVirtualMemory, 0
SYSSTUBS_ENTRY4 175, LockVirtualMemory, 0
SYSSTUBS_ENTRY5 175, LockVirtualMemory, 0
SYSSTUBS_ENTRY6 175, LockVirtualMemory, 0
SYSSTUBS_ENTRY7 175, LockVirtualMemory, 0
SYSSTUBS_ENTRY8 175, LockVirtualMemory, 0
SYSSTUBS_ENTRY1 176, MakePermanentObject, 0
SYSSTUBS_ENTRY2 176, MakePermanentObject, 0
SYSSTUBS_ENTRY3 176, MakePermanentObject, 0
SYSSTUBS_ENTRY4 176, MakePermanentObject, 0
SYSSTUBS_ENTRY5 176, MakePermanentObject, 0
SYSSTUBS_ENTRY6 176, MakePermanentObject, 0
SYSSTUBS_ENTRY7 176, MakePermanentObject, 0
SYSSTUBS_ENTRY8 176, MakePermanentObject, 0
SYSSTUBS_ENTRY1 177, MakeTemporaryObject, 0
SYSSTUBS_ENTRY2 177, MakeTemporaryObject, 0
SYSSTUBS_ENTRY3 177, MakeTemporaryObject, 0
SYSSTUBS_ENTRY4 177, MakeTemporaryObject, 0
SYSSTUBS_ENTRY5 177, MakeTemporaryObject, 0
SYSSTUBS_ENTRY6 177, MakeTemporaryObject, 0
SYSSTUBS_ENTRY7 177, MakeTemporaryObject, 0
SYSSTUBS_ENTRY8 177, MakeTemporaryObject, 0
SYSSTUBS_ENTRY1 178, MapUserPhysicalPages, 0
SYSSTUBS_ENTRY2 178, MapUserPhysicalPages, 0
SYSSTUBS_ENTRY3 178, MapUserPhysicalPages, 0
SYSSTUBS_ENTRY4 178, MapUserPhysicalPages, 0
SYSSTUBS_ENTRY5 178, MapUserPhysicalPages, 0
SYSSTUBS_ENTRY6 178, MapUserPhysicalPages, 0
SYSSTUBS_ENTRY7 178, MapUserPhysicalPages, 0
SYSSTUBS_ENTRY8 178, MapUserPhysicalPages, 0
SYSSTUBS_ENTRY1 179, ModifyBootEntry, 0
SYSSTUBS_ENTRY2 179, ModifyBootEntry, 0
SYSSTUBS_ENTRY3 179, ModifyBootEntry, 0
SYSSTUBS_ENTRY4 179, ModifyBootEntry, 0
SYSSTUBS_ENTRY5 179, ModifyBootEntry, 0
SYSSTUBS_ENTRY6 179, ModifyBootEntry, 0
SYSSTUBS_ENTRY7 179, ModifyBootEntry, 0
SYSSTUBS_ENTRY8 179, ModifyBootEntry, 0
SYSSTUBS_ENTRY1 180, ModifyDriverEntry, 0
SYSSTUBS_ENTRY2 180, ModifyDriverEntry, 0
SYSSTUBS_ENTRY3 180, ModifyDriverEntry, 0
SYSSTUBS_ENTRY4 180, ModifyDriverEntry, 0
SYSSTUBS_ENTRY5 180, ModifyDriverEntry, 0
SYSSTUBS_ENTRY6 180, ModifyDriverEntry, 0
SYSSTUBS_ENTRY7 180, ModifyDriverEntry, 0
SYSSTUBS_ENTRY8 180, ModifyDriverEntry, 0
SYSSTUBS_ENTRY1 181, NotifyChangeDirectoryFile, 5
SYSSTUBS_ENTRY2 181, NotifyChangeDirectoryFile, 5
SYSSTUBS_ENTRY3 181, NotifyChangeDirectoryFile, 5
SYSSTUBS_ENTRY4 181, NotifyChangeDirectoryFile, 5
SYSSTUBS_ENTRY5 181, NotifyChangeDirectoryFile, 5
SYSSTUBS_ENTRY6 181, NotifyChangeDirectoryFile, 5
SYSSTUBS_ENTRY7 181, NotifyChangeDirectoryFile, 5
SYSSTUBS_ENTRY8 181, NotifyChangeDirectoryFile, 5
SYSSTUBS_ENTRY1 182, NotifyChangeKey, 6
SYSSTUBS_ENTRY2 182, NotifyChangeKey, 6
SYSSTUBS_ENTRY3 182, NotifyChangeKey, 6
SYSSTUBS_ENTRY4 182, NotifyChangeKey, 6
SYSSTUBS_ENTRY5 182, NotifyChangeKey, 6
SYSSTUBS_ENTRY6 182, NotifyChangeKey, 6
SYSSTUBS_ENTRY7 182, NotifyChangeKey, 6
SYSSTUBS_ENTRY8 182, NotifyChangeKey, 6
SYSSTUBS_ENTRY1 183, NotifyChangeMultipleKeys, 8
SYSSTUBS_ENTRY2 183, NotifyChangeMultipleKeys, 8
SYSSTUBS_ENTRY3 183, NotifyChangeMultipleKeys, 8
SYSSTUBS_ENTRY4 183, NotifyChangeMultipleKeys, 8
SYSSTUBS_ENTRY5 183, NotifyChangeMultipleKeys, 8
SYSSTUBS_ENTRY6 183, NotifyChangeMultipleKeys, 8
SYSSTUBS_ENTRY7 183, NotifyChangeMultipleKeys, 8
SYSSTUBS_ENTRY8 183, NotifyChangeMultipleKeys, 8
SYSSTUBS_ENTRY1 184, OpenEventPair, 0
SYSSTUBS_ENTRY2 184, OpenEventPair, 0
SYSSTUBS_ENTRY3 184, OpenEventPair, 0
SYSSTUBS_ENTRY4 184, OpenEventPair, 0
SYSSTUBS_ENTRY5 184, OpenEventPair, 0
SYSSTUBS_ENTRY6 184, OpenEventPair, 0
SYSSTUBS_ENTRY7 184, OpenEventPair, 0
SYSSTUBS_ENTRY8 184, OpenEventPair, 0
SYSSTUBS_ENTRY1 185, OpenIoCompletion, 0
SYSSTUBS_ENTRY2 185, OpenIoCompletion, 0
SYSSTUBS_ENTRY3 185, OpenIoCompletion, 0
SYSSTUBS_ENTRY4 185, OpenIoCompletion, 0
SYSSTUBS_ENTRY5 185, OpenIoCompletion, 0
SYSSTUBS_ENTRY6 185, OpenIoCompletion, 0
SYSSTUBS_ENTRY7 185, OpenIoCompletion, 0
SYSSTUBS_ENTRY8 185, OpenIoCompletion, 0
SYSSTUBS_ENTRY1 186, OpenJobObject, 0
SYSSTUBS_ENTRY2 186, OpenJobObject, 0
SYSSTUBS_ENTRY3 186, OpenJobObject, 0
SYSSTUBS_ENTRY4 186, OpenJobObject, 0
SYSSTUBS_ENTRY5 186, OpenJobObject, 0
SYSSTUBS_ENTRY6 186, OpenJobObject, 0
SYSSTUBS_ENTRY7 186, OpenJobObject, 0
SYSSTUBS_ENTRY8 186, OpenJobObject, 0
SYSSTUBS_ENTRY1 187, OpenKeyedEvent, 0
SYSSTUBS_ENTRY2 187, OpenKeyedEvent, 0
SYSSTUBS_ENTRY3 187, OpenKeyedEvent, 0
SYSSTUBS_ENTRY4 187, OpenKeyedEvent, 0
SYSSTUBS_ENTRY5 187, OpenKeyedEvent, 0
SYSSTUBS_ENTRY6 187, OpenKeyedEvent, 0
SYSSTUBS_ENTRY7 187, OpenKeyedEvent, 0
SYSSTUBS_ENTRY8 187, OpenKeyedEvent, 0
SYSSTUBS_ENTRY1 188, OpenMutant, 0
SYSSTUBS_ENTRY2 188, OpenMutant, 0
SYSSTUBS_ENTRY3 188, OpenMutant, 0
SYSSTUBS_ENTRY4 188, OpenMutant, 0
SYSSTUBS_ENTRY5 188, OpenMutant, 0
SYSSTUBS_ENTRY6 188, OpenMutant, 0
SYSSTUBS_ENTRY7 188, OpenMutant, 0
SYSSTUBS_ENTRY8 188, OpenMutant, 0
SYSSTUBS_ENTRY1 189, OpenObjectAuditAlarm, 8
SYSSTUBS_ENTRY2 189, OpenObjectAuditAlarm, 8
SYSSTUBS_ENTRY3 189, OpenObjectAuditAlarm, 8
SYSSTUBS_ENTRY4 189, OpenObjectAuditAlarm, 8
SYSSTUBS_ENTRY5 189, OpenObjectAuditAlarm, 8
SYSSTUBS_ENTRY6 189, OpenObjectAuditAlarm, 8
SYSSTUBS_ENTRY7 189, OpenObjectAuditAlarm, 8
SYSSTUBS_ENTRY8 189, OpenObjectAuditAlarm, 8
SYSSTUBS_ENTRY1 190, OpenProcessToken, 0
SYSSTUBS_ENTRY2 190, OpenProcessToken, 0
SYSSTUBS_ENTRY3 190, OpenProcessToken, 0
SYSSTUBS_ENTRY4 190, OpenProcessToken, 0
SYSSTUBS_ENTRY5 190, OpenProcessToken, 0
SYSSTUBS_ENTRY6 190, OpenProcessToken, 0
SYSSTUBS_ENTRY7 190, OpenProcessToken, 0
SYSSTUBS_ENTRY8 190, OpenProcessToken, 0
SYSSTUBS_ENTRY1 191, OpenSemaphore, 0
SYSSTUBS_ENTRY2 191, OpenSemaphore, 0
SYSSTUBS_ENTRY3 191, OpenSemaphore, 0
SYSSTUBS_ENTRY4 191, OpenSemaphore, 0
SYSSTUBS_ENTRY5 191, OpenSemaphore, 0
SYSSTUBS_ENTRY6 191, OpenSemaphore, 0
SYSSTUBS_ENTRY7 191, OpenSemaphore, 0
SYSSTUBS_ENTRY8 191, OpenSemaphore, 0
SYSSTUBS_ENTRY1 192, OpenSymbolicLinkObject, 0
SYSSTUBS_ENTRY2 192, OpenSymbolicLinkObject, 0
SYSSTUBS_ENTRY3 192, OpenSymbolicLinkObject, 0
SYSSTUBS_ENTRY4 192, OpenSymbolicLinkObject, 0
SYSSTUBS_ENTRY5 192, OpenSymbolicLinkObject, 0
SYSSTUBS_ENTRY6 192, OpenSymbolicLinkObject, 0
SYSSTUBS_ENTRY7 192, OpenSymbolicLinkObject, 0
SYSSTUBS_ENTRY8 192, OpenSymbolicLinkObject, 0
SYSSTUBS_ENTRY1 193, OpenThread, 0
SYSSTUBS_ENTRY2 193, OpenThread, 0
SYSSTUBS_ENTRY3 193, OpenThread, 0
SYSSTUBS_ENTRY4 193, OpenThread, 0
SYSSTUBS_ENTRY5 193, OpenThread, 0
SYSSTUBS_ENTRY6 193, OpenThread, 0
SYSSTUBS_ENTRY7 193, OpenThread, 0
SYSSTUBS_ENTRY8 193, OpenThread, 0
SYSSTUBS_ENTRY1 194, OpenTimer, 0
SYSSTUBS_ENTRY2 194, OpenTimer, 0
SYSSTUBS_ENTRY3 194, OpenTimer, 0
SYSSTUBS_ENTRY4 194, OpenTimer, 0
SYSSTUBS_ENTRY5 194, OpenTimer, 0
SYSSTUBS_ENTRY6 194, OpenTimer, 0
SYSSTUBS_ENTRY7 194, OpenTimer, 0
SYSSTUBS_ENTRY8 194, OpenTimer, 0
SYSSTUBS_ENTRY1 195, PlugPlayControl, 0
SYSSTUBS_ENTRY2 195, PlugPlayControl, 0
SYSSTUBS_ENTRY3 195, PlugPlayControl, 0
SYSSTUBS_ENTRY4 195, PlugPlayControl, 0
SYSSTUBS_ENTRY5 195, PlugPlayControl, 0
SYSSTUBS_ENTRY6 195, PlugPlayControl, 0
SYSSTUBS_ENTRY7 195, PlugPlayControl, 0
SYSSTUBS_ENTRY8 195, PlugPlayControl, 0
SYSSTUBS_ENTRY1 196, PrivilegeCheck, 0
SYSSTUBS_ENTRY2 196, PrivilegeCheck, 0
SYSSTUBS_ENTRY3 196, PrivilegeCheck, 0
SYSSTUBS_ENTRY4 196, PrivilegeCheck, 0
SYSSTUBS_ENTRY5 196, PrivilegeCheck, 0
SYSSTUBS_ENTRY6 196, PrivilegeCheck, 0
SYSSTUBS_ENTRY7 196, PrivilegeCheck, 0
SYSSTUBS_ENTRY8 196, PrivilegeCheck, 0
SYSSTUBS_ENTRY1 197, PrivilegeObjectAuditAlarm, 2
SYSSTUBS_ENTRY2 197, PrivilegeObjectAuditAlarm, 2
SYSSTUBS_ENTRY3 197, PrivilegeObjectAuditAlarm, 2
SYSSTUBS_ENTRY4 197, PrivilegeObjectAuditAlarm, 2
SYSSTUBS_ENTRY5 197, PrivilegeObjectAuditAlarm, 2
SYSSTUBS_ENTRY6 197, PrivilegeObjectAuditAlarm, 2
SYSSTUBS_ENTRY7 197, PrivilegeObjectAuditAlarm, 2
SYSSTUBS_ENTRY8 197, PrivilegeObjectAuditAlarm, 2
SYSSTUBS_ENTRY1 198, PrivilegedServiceAuditAlarm, 1
SYSSTUBS_ENTRY2 198, PrivilegedServiceAuditAlarm, 1
SYSSTUBS_ENTRY3 198, PrivilegedServiceAuditAlarm, 1
SYSSTUBS_ENTRY4 198, PrivilegedServiceAuditAlarm, 1
SYSSTUBS_ENTRY5 198, PrivilegedServiceAuditAlarm, 1
SYSSTUBS_ENTRY6 198, PrivilegedServiceAuditAlarm, 1
SYSSTUBS_ENTRY7 198, PrivilegedServiceAuditAlarm, 1
SYSSTUBS_ENTRY8 198, PrivilegedServiceAuditAlarm, 1
SYSSTUBS_ENTRY1 199, PulseEvent, 0
SYSSTUBS_ENTRY2 199, PulseEvent, 0
SYSSTUBS_ENTRY3 199, PulseEvent, 0
SYSSTUBS_ENTRY4 199, PulseEvent, 0
SYSSTUBS_ENTRY5 199, PulseEvent, 0
SYSSTUBS_ENTRY6 199, PulseEvent, 0
SYSSTUBS_ENTRY7 199, PulseEvent, 0
SYSSTUBS_ENTRY8 199, PulseEvent, 0
SYSSTUBS_ENTRY1 200, QueryBootEntryOrder, 0
SYSSTUBS_ENTRY2 200, QueryBootEntryOrder, 0
SYSSTUBS_ENTRY3 200, QueryBootEntryOrder, 0
SYSSTUBS_ENTRY4 200, QueryBootEntryOrder, 0
SYSSTUBS_ENTRY5 200, QueryBootEntryOrder, 0
SYSSTUBS_ENTRY6 200, QueryBootEntryOrder, 0
SYSSTUBS_ENTRY7 200, QueryBootEntryOrder, 0
SYSSTUBS_ENTRY8 200, QueryBootEntryOrder, 0
SYSSTUBS_ENTRY1 201, QueryBootOptions, 0
SYSSTUBS_ENTRY2 201, QueryBootOptions, 0
SYSSTUBS_ENTRY3 201, QueryBootOptions, 0
SYSSTUBS_ENTRY4 201, QueryBootOptions, 0
SYSSTUBS_ENTRY5 201, QueryBootOptions, 0
SYSSTUBS_ENTRY6 201, QueryBootOptions, 0
SYSSTUBS_ENTRY7 201, QueryBootOptions, 0
SYSSTUBS_ENTRY8 201, QueryBootOptions, 0
SYSSTUBS_ENTRY1 202, QueryDebugFilterState, 0
SYSSTUBS_ENTRY2 202, QueryDebugFilterState, 0
SYSSTUBS_ENTRY3 202, QueryDebugFilterState, 0
SYSSTUBS_ENTRY4 202, QueryDebugFilterState, 0
SYSSTUBS_ENTRY5 202, QueryDebugFilterState, 0
SYSSTUBS_ENTRY6 202, QueryDebugFilterState, 0
SYSSTUBS_ENTRY7 202, QueryDebugFilterState, 0
SYSSTUBS_ENTRY8 202, QueryDebugFilterState, 0
SYSSTUBS_ENTRY1 203, QueryDirectoryObject, 3
SYSSTUBS_ENTRY2 203, QueryDirectoryObject, 3
SYSSTUBS_ENTRY3 203, QueryDirectoryObject, 3
SYSSTUBS_ENTRY4 203, QueryDirectoryObject, 3
SYSSTUBS_ENTRY5 203, QueryDirectoryObject, 3
SYSSTUBS_ENTRY6 203, QueryDirectoryObject, 3
SYSSTUBS_ENTRY7 203, QueryDirectoryObject, 3
SYSSTUBS_ENTRY8 203, QueryDirectoryObject, 3
SYSSTUBS_ENTRY1 204, QueryDriverEntryOrder, 0
SYSSTUBS_ENTRY2 204, QueryDriverEntryOrder, 0
SYSSTUBS_ENTRY3 204, QueryDriverEntryOrder, 0
SYSSTUBS_ENTRY4 204, QueryDriverEntryOrder, 0
SYSSTUBS_ENTRY5 204, QueryDriverEntryOrder, 0
SYSSTUBS_ENTRY6 204, QueryDriverEntryOrder, 0
SYSSTUBS_ENTRY7 204, QueryDriverEntryOrder, 0
SYSSTUBS_ENTRY8 204, QueryDriverEntryOrder, 0
SYSSTUBS_ENTRY1 205, QueryEaFile, 5
SYSSTUBS_ENTRY2 205, QueryEaFile, 5
SYSSTUBS_ENTRY3 205, QueryEaFile, 5
SYSSTUBS_ENTRY4 205, QueryEaFile, 5
SYSSTUBS_ENTRY5 205, QueryEaFile, 5
SYSSTUBS_ENTRY6 205, QueryEaFile, 5
SYSSTUBS_ENTRY7 205, QueryEaFile, 5
SYSSTUBS_ENTRY8 205, QueryEaFile, 5
SYSSTUBS_ENTRY1 206, QueryFullAttributesFile, 0
SYSSTUBS_ENTRY2 206, QueryFullAttributesFile, 0
SYSSTUBS_ENTRY3 206, QueryFullAttributesFile, 0
SYSSTUBS_ENTRY4 206, QueryFullAttributesFile, 0
SYSSTUBS_ENTRY5 206, QueryFullAttributesFile, 0
SYSSTUBS_ENTRY6 206, QueryFullAttributesFile, 0
SYSSTUBS_ENTRY7 206, QueryFullAttributesFile, 0
SYSSTUBS_ENTRY8 206, QueryFullAttributesFile, 0
SYSSTUBS_ENTRY1 207, QueryInformationAtom, 1
SYSSTUBS_ENTRY2 207, QueryInformationAtom, 1
SYSSTUBS_ENTRY3 207, QueryInformationAtom, 1
SYSSTUBS_ENTRY4 207, QueryInformationAtom, 1
SYSSTUBS_ENTRY5 207, QueryInformationAtom, 1
SYSSTUBS_ENTRY6 207, QueryInformationAtom, 1
SYSSTUBS_ENTRY7 207, QueryInformationAtom, 1
SYSSTUBS_ENTRY8 207, QueryInformationAtom, 1
SYSSTUBS_ENTRY1 208, QueryInformationJobObject, 1
SYSSTUBS_ENTRY2 208, QueryInformationJobObject, 1
SYSSTUBS_ENTRY3 208, QueryInformationJobObject, 1
SYSSTUBS_ENTRY4 208, QueryInformationJobObject, 1
SYSSTUBS_ENTRY5 208, QueryInformationJobObject, 1
SYSSTUBS_ENTRY6 208, QueryInformationJobObject, 1
SYSSTUBS_ENTRY7 208, QueryInformationJobObject, 1
SYSSTUBS_ENTRY8 208, QueryInformationJobObject, 1
SYSSTUBS_ENTRY1 209, QueryInformationPort, 1
SYSSTUBS_ENTRY2 209, QueryInformationPort, 1
SYSSTUBS_ENTRY3 209, QueryInformationPort, 1
SYSSTUBS_ENTRY4 209, QueryInformationPort, 1
SYSSTUBS_ENTRY5 209, QueryInformationPort, 1
SYSSTUBS_ENTRY6 209, QueryInformationPort, 1
SYSSTUBS_ENTRY7 209, QueryInformationPort, 1
SYSSTUBS_ENTRY8 209, QueryInformationPort, 1
SYSSTUBS_ENTRY1 210, QueryInstallUILanguage, 0
SYSSTUBS_ENTRY2 210, QueryInstallUILanguage, 0
SYSSTUBS_ENTRY3 210, QueryInstallUILanguage, 0
SYSSTUBS_ENTRY4 210, QueryInstallUILanguage, 0
SYSSTUBS_ENTRY5 210, QueryInstallUILanguage, 0
SYSSTUBS_ENTRY6 210, QueryInstallUILanguage, 0
SYSSTUBS_ENTRY7 210, QueryInstallUILanguage, 0
SYSSTUBS_ENTRY8 210, QueryInstallUILanguage, 0
SYSSTUBS_ENTRY1 211, QueryIntervalProfile, 0
SYSSTUBS_ENTRY2 211, QueryIntervalProfile, 0
SYSSTUBS_ENTRY3 211, QueryIntervalProfile, 0
SYSSTUBS_ENTRY4 211, QueryIntervalProfile, 0
SYSSTUBS_ENTRY5 211, QueryIntervalProfile, 0
SYSSTUBS_ENTRY6 211, QueryIntervalProfile, 0
SYSSTUBS_ENTRY7 211, QueryIntervalProfile, 0
SYSSTUBS_ENTRY8 211, QueryIntervalProfile, 0
SYSSTUBS_ENTRY1 212, QueryIoCompletion, 1
SYSSTUBS_ENTRY2 212, QueryIoCompletion, 1
SYSSTUBS_ENTRY3 212, QueryIoCompletion, 1
SYSSTUBS_ENTRY4 212, QueryIoCompletion, 1
SYSSTUBS_ENTRY5 212, QueryIoCompletion, 1
SYSSTUBS_ENTRY6 212, QueryIoCompletion, 1
SYSSTUBS_ENTRY7 212, QueryIoCompletion, 1
SYSSTUBS_ENTRY8 212, QueryIoCompletion, 1
SYSSTUBS_ENTRY1 213, QueryMultipleValueKey, 2
SYSSTUBS_ENTRY2 213, QueryMultipleValueKey, 2
SYSSTUBS_ENTRY3 213, QueryMultipleValueKey, 2
SYSSTUBS_ENTRY4 213, QueryMultipleValueKey, 2
SYSSTUBS_ENTRY5 213, QueryMultipleValueKey, 2
SYSSTUBS_ENTRY6 213, QueryMultipleValueKey, 2
SYSSTUBS_ENTRY7 213, QueryMultipleValueKey, 2
SYSSTUBS_ENTRY8 213, QueryMultipleValueKey, 2
SYSSTUBS_ENTRY1 214, QueryMutant, 1
SYSSTUBS_ENTRY2 214, QueryMutant, 1
SYSSTUBS_ENTRY3 214, QueryMutant, 1
SYSSTUBS_ENTRY4 214, QueryMutant, 1
SYSSTUBS_ENTRY5 214, QueryMutant, 1
SYSSTUBS_ENTRY6 214, QueryMutant, 1
SYSSTUBS_ENTRY7 214, QueryMutant, 1
SYSSTUBS_ENTRY8 214, QueryMutant, 1
SYSSTUBS_ENTRY1 215, QueryOpenSubKeys, 0
SYSSTUBS_ENTRY2 215, QueryOpenSubKeys, 0
SYSSTUBS_ENTRY3 215, QueryOpenSubKeys, 0
SYSSTUBS_ENTRY4 215, QueryOpenSubKeys, 0
SYSSTUBS_ENTRY5 215, QueryOpenSubKeys, 0
SYSSTUBS_ENTRY6 215, QueryOpenSubKeys, 0
SYSSTUBS_ENTRY7 215, QueryOpenSubKeys, 0
SYSSTUBS_ENTRY8 215, QueryOpenSubKeys, 0
SYSSTUBS_ENTRY1 216, QueryOpenSubKeysEx, 0
SYSSTUBS_ENTRY2 216, QueryOpenSubKeysEx, 0
SYSSTUBS_ENTRY3 216, QueryOpenSubKeysEx, 0
SYSSTUBS_ENTRY4 216, QueryOpenSubKeysEx, 0
SYSSTUBS_ENTRY5 216, QueryOpenSubKeysEx, 0
SYSSTUBS_ENTRY6 216, QueryOpenSubKeysEx, 0
SYSSTUBS_ENTRY7 216, QueryOpenSubKeysEx, 0
SYSSTUBS_ENTRY8 216, QueryOpenSubKeysEx, 0
SYSSTUBS_ENTRY1 217, QueryPortInformationProcess, 0
SYSSTUBS_ENTRY2 217, QueryPortInformationProcess, 0
SYSSTUBS_ENTRY3 217, QueryPortInformationProcess, 0
SYSSTUBS_ENTRY4 217, QueryPortInformationProcess, 0
SYSSTUBS_ENTRY5 217, QueryPortInformationProcess, 0
SYSSTUBS_ENTRY6 217, QueryPortInformationProcess, 0
SYSSTUBS_ENTRY7 217, QueryPortInformationProcess, 0
SYSSTUBS_ENTRY8 217, QueryPortInformationProcess, 0
SYSSTUBS_ENTRY1 218, QueryQuotaInformationFile, 5
SYSSTUBS_ENTRY2 218, QueryQuotaInformationFile, 5
SYSSTUBS_ENTRY3 218, QueryQuotaInformationFile, 5
SYSSTUBS_ENTRY4 218, QueryQuotaInformationFile, 5
SYSSTUBS_ENTRY5 218, QueryQuotaInformationFile, 5
SYSSTUBS_ENTRY6 218, QueryQuotaInformationFile, 5
SYSSTUBS_ENTRY7 218, QueryQuotaInformationFile, 5
SYSSTUBS_ENTRY8 218, QueryQuotaInformationFile, 5
SYSSTUBS_ENTRY1 219, QuerySecurityObject, 1
SYSSTUBS_ENTRY2 219, QuerySecurityObject, 1
SYSSTUBS_ENTRY3 219, QuerySecurityObject, 1
SYSSTUBS_ENTRY4 219, QuerySecurityObject, 1
SYSSTUBS_ENTRY5 219, QuerySecurityObject, 1
SYSSTUBS_ENTRY6 219, QuerySecurityObject, 1
SYSSTUBS_ENTRY7 219, QuerySecurityObject, 1
SYSSTUBS_ENTRY8 219, QuerySecurityObject, 1
SYSSTUBS_ENTRY1 220, QuerySemaphore, 1
SYSSTUBS_ENTRY2 220, QuerySemaphore, 1
SYSSTUBS_ENTRY3 220, QuerySemaphore, 1
SYSSTUBS_ENTRY4 220, QuerySemaphore, 1
SYSSTUBS_ENTRY5 220, QuerySemaphore, 1
SYSSTUBS_ENTRY6 220, QuerySemaphore, 1
SYSSTUBS_ENTRY7 220, QuerySemaphore, 1
SYSSTUBS_ENTRY8 220, QuerySemaphore, 1
SYSSTUBS_ENTRY1 221, QuerySymbolicLinkObject, 0
SYSSTUBS_ENTRY2 221, QuerySymbolicLinkObject, 0
SYSSTUBS_ENTRY3 221, QuerySymbolicLinkObject, 0
SYSSTUBS_ENTRY4 221, QuerySymbolicLinkObject, 0
SYSSTUBS_ENTRY5 221, QuerySymbolicLinkObject, 0
SYSSTUBS_ENTRY6 221, QuerySymbolicLinkObject, 0
SYSSTUBS_ENTRY7 221, QuerySymbolicLinkObject, 0
SYSSTUBS_ENTRY8 221, QuerySymbolicLinkObject, 0
SYSSTUBS_ENTRY1 222, QuerySystemEnvironmentValue, 0
SYSSTUBS_ENTRY2 222, QuerySystemEnvironmentValue, 0
SYSSTUBS_ENTRY3 222, QuerySystemEnvironmentValue, 0
SYSSTUBS_ENTRY4 222, QuerySystemEnvironmentValue, 0
SYSSTUBS_ENTRY5 222, QuerySystemEnvironmentValue, 0
SYSSTUBS_ENTRY6 222, QuerySystemEnvironmentValue, 0
SYSSTUBS_ENTRY7 222, QuerySystemEnvironmentValue, 0
SYSSTUBS_ENTRY8 222, QuerySystemEnvironmentValue, 0
SYSSTUBS_ENTRY1 223, QuerySystemEnvironmentValueEx, 1
SYSSTUBS_ENTRY2 223, QuerySystemEnvironmentValueEx, 1
SYSSTUBS_ENTRY3 223, QuerySystemEnvironmentValueEx, 1
SYSSTUBS_ENTRY4 223, QuerySystemEnvironmentValueEx, 1
SYSSTUBS_ENTRY5 223, QuerySystemEnvironmentValueEx, 1
SYSSTUBS_ENTRY6 223, QuerySystemEnvironmentValueEx, 1
SYSSTUBS_ENTRY7 223, QuerySystemEnvironmentValueEx, 1
SYSSTUBS_ENTRY8 223, QuerySystemEnvironmentValueEx, 1
SYSSTUBS_ENTRY1 224, QueryTimerResolution, 0
SYSSTUBS_ENTRY2 224, QueryTimerResolution, 0
SYSSTUBS_ENTRY3 224, QueryTimerResolution, 0
SYSSTUBS_ENTRY4 224, QueryTimerResolution, 0
SYSSTUBS_ENTRY5 224, QueryTimerResolution, 0
SYSSTUBS_ENTRY6 224, QueryTimerResolution, 0
SYSSTUBS_ENTRY7 224, QueryTimerResolution, 0
SYSSTUBS_ENTRY8 224, QueryTimerResolution, 0
SYSSTUBS_ENTRY1 225, RaiseException, 0
SYSSTUBS_ENTRY2 225, RaiseException, 0
SYSSTUBS_ENTRY3 225, RaiseException, 0
SYSSTUBS_ENTRY4 225, RaiseException, 0
SYSSTUBS_ENTRY5 225, RaiseException, 0
SYSSTUBS_ENTRY6 225, RaiseException, 0
SYSSTUBS_ENTRY7 225, RaiseException, 0
SYSSTUBS_ENTRY8 225, RaiseException, 0
SYSSTUBS_ENTRY1 226, RaiseHardError, 2
SYSSTUBS_ENTRY2 226, RaiseHardError, 2
SYSSTUBS_ENTRY3 226, RaiseHardError, 2
SYSSTUBS_ENTRY4 226, RaiseHardError, 2
SYSSTUBS_ENTRY5 226, RaiseHardError, 2
SYSSTUBS_ENTRY6 226, RaiseHardError, 2
SYSSTUBS_ENTRY7 226, RaiseHardError, 2
SYSSTUBS_ENTRY8 226, RaiseHardError, 2
SYSSTUBS_ENTRY1 227, RegisterThreadTerminatePort, 0
SYSSTUBS_ENTRY2 227, RegisterThreadTerminatePort, 0
SYSSTUBS_ENTRY3 227, RegisterThreadTerminatePort, 0
SYSSTUBS_ENTRY4 227, RegisterThreadTerminatePort, 0
SYSSTUBS_ENTRY5 227, RegisterThreadTerminatePort, 0
SYSSTUBS_ENTRY6 227, RegisterThreadTerminatePort, 0
SYSSTUBS_ENTRY7 227, RegisterThreadTerminatePort, 0
SYSSTUBS_ENTRY8 227, RegisterThreadTerminatePort, 0
SYSSTUBS_ENTRY1 228, ReleaseKeyedEvent, 0
SYSSTUBS_ENTRY2 228, ReleaseKeyedEvent, 0
SYSSTUBS_ENTRY3 228, ReleaseKeyedEvent, 0
SYSSTUBS_ENTRY4 228, ReleaseKeyedEvent, 0
SYSSTUBS_ENTRY5 228, ReleaseKeyedEvent, 0
SYSSTUBS_ENTRY6 228, ReleaseKeyedEvent, 0
SYSSTUBS_ENTRY7 228, ReleaseKeyedEvent, 0
SYSSTUBS_ENTRY8 228, ReleaseKeyedEvent, 0
SYSSTUBS_ENTRY1 229, RemoveProcessDebug, 0
SYSSTUBS_ENTRY2 229, RemoveProcessDebug, 0
SYSSTUBS_ENTRY3 229, RemoveProcessDebug, 0
SYSSTUBS_ENTRY4 229, RemoveProcessDebug, 0
SYSSTUBS_ENTRY5 229, RemoveProcessDebug, 0
SYSSTUBS_ENTRY6 229, RemoveProcessDebug, 0
SYSSTUBS_ENTRY7 229, RemoveProcessDebug, 0
SYSSTUBS_ENTRY8 229, RemoveProcessDebug, 0
SYSSTUBS_ENTRY1 230, RenameKey, 0
SYSSTUBS_ENTRY2 230, RenameKey, 0
SYSSTUBS_ENTRY3 230, RenameKey, 0
SYSSTUBS_ENTRY4 230, RenameKey, 0
SYSSTUBS_ENTRY5 230, RenameKey, 0
SYSSTUBS_ENTRY6 230, RenameKey, 0
SYSSTUBS_ENTRY7 230, RenameKey, 0
SYSSTUBS_ENTRY8 230, RenameKey, 0
SYSSTUBS_ENTRY1 231, ReplaceKey, 0
SYSSTUBS_ENTRY2 231, ReplaceKey, 0
SYSSTUBS_ENTRY3 231, ReplaceKey, 0
SYSSTUBS_ENTRY4 231, ReplaceKey, 0
SYSSTUBS_ENTRY5 231, ReplaceKey, 0
SYSSTUBS_ENTRY6 231, ReplaceKey, 0
SYSSTUBS_ENTRY7 231, ReplaceKey, 0
SYSSTUBS_ENTRY8 231, ReplaceKey, 0
SYSSTUBS_ENTRY1 232, ReplyWaitReplyPort, 0
SYSSTUBS_ENTRY2 232, ReplyWaitReplyPort, 0
SYSSTUBS_ENTRY3 232, ReplyWaitReplyPort, 0
SYSSTUBS_ENTRY4 232, ReplyWaitReplyPort, 0
SYSSTUBS_ENTRY5 232, ReplyWaitReplyPort, 0
SYSSTUBS_ENTRY6 232, ReplyWaitReplyPort, 0
SYSSTUBS_ENTRY7 232, ReplyWaitReplyPort, 0
SYSSTUBS_ENTRY8 232, ReplyWaitReplyPort, 0
SYSSTUBS_ENTRY1 233, RequestDeviceWakeup, 0
SYSSTUBS_ENTRY2 233, RequestDeviceWakeup, 0
SYSSTUBS_ENTRY3 233, RequestDeviceWakeup, 0
SYSSTUBS_ENTRY4 233, RequestDeviceWakeup, 0
SYSSTUBS_ENTRY5 233, RequestDeviceWakeup, 0
SYSSTUBS_ENTRY6 233, RequestDeviceWakeup, 0
SYSSTUBS_ENTRY7 233, RequestDeviceWakeup, 0
SYSSTUBS_ENTRY8 233, RequestDeviceWakeup, 0
SYSSTUBS_ENTRY1 234, RequestPort, 0
SYSSTUBS_ENTRY2 234, RequestPort, 0
SYSSTUBS_ENTRY3 234, RequestPort, 0
SYSSTUBS_ENTRY4 234, RequestPort, 0
SYSSTUBS_ENTRY5 234, RequestPort, 0
SYSSTUBS_ENTRY6 234, RequestPort, 0
SYSSTUBS_ENTRY7 234, RequestPort, 0
SYSSTUBS_ENTRY8 234, RequestPort, 0
SYSSTUBS_ENTRY1 235, RequestWakeupLatency, 0
SYSSTUBS_ENTRY2 235, RequestWakeupLatency, 0
SYSSTUBS_ENTRY3 235, RequestWakeupLatency, 0
SYSSTUBS_ENTRY4 235, RequestWakeupLatency, 0
SYSSTUBS_ENTRY5 235, RequestWakeupLatency, 0
SYSSTUBS_ENTRY6 235, RequestWakeupLatency, 0
SYSSTUBS_ENTRY7 235, RequestWakeupLatency, 0
SYSSTUBS_ENTRY8 235, RequestWakeupLatency, 0
SYSSTUBS_ENTRY1 236, ResetEvent, 0
SYSSTUBS_ENTRY2 236, ResetEvent, 0
SYSSTUBS_ENTRY3 236, ResetEvent, 0
SYSSTUBS_ENTRY4 236, ResetEvent, 0
SYSSTUBS_ENTRY5 236, ResetEvent, 0
SYSSTUBS_ENTRY6 236, ResetEvent, 0
SYSSTUBS_ENTRY7 236, ResetEvent, 0
SYSSTUBS_ENTRY8 236, ResetEvent, 0
SYSSTUBS_ENTRY1 237, ResetWriteWatch, 0
SYSSTUBS_ENTRY2 237, ResetWriteWatch, 0
SYSSTUBS_ENTRY3 237, ResetWriteWatch, 0
SYSSTUBS_ENTRY4 237, ResetWriteWatch, 0
SYSSTUBS_ENTRY5 237, ResetWriteWatch, 0
SYSSTUBS_ENTRY6 237, ResetWriteWatch, 0
SYSSTUBS_ENTRY7 237, ResetWriteWatch, 0
SYSSTUBS_ENTRY8 237, ResetWriteWatch, 0
SYSSTUBS_ENTRY1 238, RestoreKey, 0
SYSSTUBS_ENTRY2 238, RestoreKey, 0
SYSSTUBS_ENTRY3 238, RestoreKey, 0
SYSSTUBS_ENTRY4 238, RestoreKey, 0
SYSSTUBS_ENTRY5 238, RestoreKey, 0
SYSSTUBS_ENTRY6 238, RestoreKey, 0
SYSSTUBS_ENTRY7 238, RestoreKey, 0
SYSSTUBS_ENTRY8 238, RestoreKey, 0
SYSSTUBS_ENTRY1 239, ResumeProcess, 0
SYSSTUBS_ENTRY2 239, ResumeProcess, 0
SYSSTUBS_ENTRY3 239, ResumeProcess, 0
SYSSTUBS_ENTRY4 239, ResumeProcess, 0
SYSSTUBS_ENTRY5 239, ResumeProcess, 0
SYSSTUBS_ENTRY6 239, ResumeProcess, 0
SYSSTUBS_ENTRY7 239, ResumeProcess, 0
SYSSTUBS_ENTRY8 239, ResumeProcess, 0
SYSSTUBS_ENTRY1 240, SaveKey, 0
SYSSTUBS_ENTRY2 240, SaveKey, 0
SYSSTUBS_ENTRY3 240, SaveKey, 0
SYSSTUBS_ENTRY4 240, SaveKey, 0
SYSSTUBS_ENTRY5 240, SaveKey, 0
SYSSTUBS_ENTRY6 240, SaveKey, 0
SYSSTUBS_ENTRY7 240, SaveKey, 0
SYSSTUBS_ENTRY8 240, SaveKey, 0
SYSSTUBS_ENTRY1 241, SaveKeyEx, 0
SYSSTUBS_ENTRY2 241, SaveKeyEx, 0
SYSSTUBS_ENTRY3 241, SaveKeyEx, 0
SYSSTUBS_ENTRY4 241, SaveKeyEx, 0
SYSSTUBS_ENTRY5 241, SaveKeyEx, 0
SYSSTUBS_ENTRY6 241, SaveKeyEx, 0
SYSSTUBS_ENTRY7 241, SaveKeyEx, 0
SYSSTUBS_ENTRY8 241, SaveKeyEx, 0
SYSSTUBS_ENTRY1 242, SaveMergedKeys, 0
SYSSTUBS_ENTRY2 242, SaveMergedKeys, 0
SYSSTUBS_ENTRY3 242, SaveMergedKeys, 0
SYSSTUBS_ENTRY4 242, SaveMergedKeys, 0
SYSSTUBS_ENTRY5 242, SaveMergedKeys, 0
SYSSTUBS_ENTRY6 242, SaveMergedKeys, 0
SYSSTUBS_ENTRY7 242, SaveMergedKeys, 0
SYSSTUBS_ENTRY8 242, SaveMergedKeys, 0
SYSSTUBS_ENTRY1 243, SecureConnectPort, 5
SYSSTUBS_ENTRY2 243, SecureConnectPort, 5
SYSSTUBS_ENTRY3 243, SecureConnectPort, 5
SYSSTUBS_ENTRY4 243, SecureConnectPort, 5
SYSSTUBS_ENTRY5 243, SecureConnectPort, 5
SYSSTUBS_ENTRY6 243, SecureConnectPort, 5
SYSSTUBS_ENTRY7 243, SecureConnectPort, 5
SYSSTUBS_ENTRY8 243, SecureConnectPort, 5
SYSSTUBS_ENTRY1 244, SetBootEntryOrder, 0
SYSSTUBS_ENTRY2 244, SetBootEntryOrder, 0
SYSSTUBS_ENTRY3 244, SetBootEntryOrder, 0
SYSSTUBS_ENTRY4 244, SetBootEntryOrder, 0
SYSSTUBS_ENTRY5 244, SetBootEntryOrder, 0
SYSSTUBS_ENTRY6 244, SetBootEntryOrder, 0
SYSSTUBS_ENTRY7 244, SetBootEntryOrder, 0
SYSSTUBS_ENTRY8 244, SetBootEntryOrder, 0
SYSSTUBS_ENTRY1 245, SetBootOptions, 0
SYSSTUBS_ENTRY2 245, SetBootOptions, 0
SYSSTUBS_ENTRY3 245, SetBootOptions, 0
SYSSTUBS_ENTRY4 245, SetBootOptions, 0
SYSSTUBS_ENTRY5 245, SetBootOptions, 0
SYSSTUBS_ENTRY6 245, SetBootOptions, 0
SYSSTUBS_ENTRY7 245, SetBootOptions, 0
SYSSTUBS_ENTRY8 245, SetBootOptions, 0
SYSSTUBS_ENTRY1 246, SetContextThread, 0
SYSSTUBS_ENTRY2 246, SetContextThread, 0
SYSSTUBS_ENTRY3 246, SetContextThread, 0
SYSSTUBS_ENTRY4 246, SetContextThread, 0
SYSSTUBS_ENTRY5 246, SetContextThread, 0
SYSSTUBS_ENTRY6 246, SetContextThread, 0
SYSSTUBS_ENTRY7 246, SetContextThread, 0
SYSSTUBS_ENTRY8 246, SetContextThread, 0
SYSSTUBS_ENTRY1 247, SetDebugFilterState, 0
SYSSTUBS_ENTRY2 247, SetDebugFilterState, 0
SYSSTUBS_ENTRY3 247, SetDebugFilterState, 0
SYSSTUBS_ENTRY4 247, SetDebugFilterState, 0
SYSSTUBS_ENTRY5 247, SetDebugFilterState, 0
SYSSTUBS_ENTRY6 247, SetDebugFilterState, 0
SYSSTUBS_ENTRY7 247, SetDebugFilterState, 0
SYSSTUBS_ENTRY8 247, SetDebugFilterState, 0
SYSSTUBS_ENTRY1 248, SetDefaultHardErrorPort, 0
SYSSTUBS_ENTRY2 248, SetDefaultHardErrorPort, 0
SYSSTUBS_ENTRY3 248, SetDefaultHardErrorPort, 0
SYSSTUBS_ENTRY4 248, SetDefaultHardErrorPort, 0
SYSSTUBS_ENTRY5 248, SetDefaultHardErrorPort, 0
SYSSTUBS_ENTRY6 248, SetDefaultHardErrorPort, 0
SYSSTUBS_ENTRY7 248, SetDefaultHardErrorPort, 0
SYSSTUBS_ENTRY8 248, SetDefaultHardErrorPort, 0
SYSSTUBS_ENTRY1 249, SetDefaultLocale, 0
SYSSTUBS_ENTRY2 249, SetDefaultLocale, 0
SYSSTUBS_ENTRY3 249, SetDefaultLocale, 0
SYSSTUBS_ENTRY4 249, SetDefaultLocale, 0
SYSSTUBS_ENTRY5 249, SetDefaultLocale, 0
SYSSTUBS_ENTRY6 249, SetDefaultLocale, 0
SYSSTUBS_ENTRY7 249, SetDefaultLocale, 0
SYSSTUBS_ENTRY8 249, SetDefaultLocale, 0
SYSSTUBS_ENTRY1 250, SetDefaultUILanguage, 0
SYSSTUBS_ENTRY2 250, SetDefaultUILanguage, 0
SYSSTUBS_ENTRY3 250, SetDefaultUILanguage, 0
SYSSTUBS_ENTRY4 250, SetDefaultUILanguage, 0
SYSSTUBS_ENTRY5 250, SetDefaultUILanguage, 0
SYSSTUBS_ENTRY6 250, SetDefaultUILanguage, 0
SYSSTUBS_ENTRY7 250, SetDefaultUILanguage, 0
SYSSTUBS_ENTRY8 250, SetDefaultUILanguage, 0
SYSSTUBS_ENTRY1 251, SetDriverEntryOrder, 0
SYSSTUBS_ENTRY2 251, SetDriverEntryOrder, 0
SYSSTUBS_ENTRY3 251, SetDriverEntryOrder, 0
SYSSTUBS_ENTRY4 251, SetDriverEntryOrder, 0
SYSSTUBS_ENTRY5 251, SetDriverEntryOrder, 0
SYSSTUBS_ENTRY6 251, SetDriverEntryOrder, 0
SYSSTUBS_ENTRY7 251, SetDriverEntryOrder, 0
SYSSTUBS_ENTRY8 251, SetDriverEntryOrder, 0
SYSSTUBS_ENTRY1 252, SetEaFile, 0
SYSSTUBS_ENTRY2 252, SetEaFile, 0
SYSSTUBS_ENTRY3 252, SetEaFile, 0
SYSSTUBS_ENTRY4 252, SetEaFile, 0
SYSSTUBS_ENTRY5 252, SetEaFile, 0
SYSSTUBS_ENTRY6 252, SetEaFile, 0
SYSSTUBS_ENTRY7 252, SetEaFile, 0
SYSSTUBS_ENTRY8 252, SetEaFile, 0
SYSSTUBS_ENTRY1 253, SetHighEventPair, 0
SYSSTUBS_ENTRY2 253, SetHighEventPair, 0
SYSSTUBS_ENTRY3 253, SetHighEventPair, 0
SYSSTUBS_ENTRY4 253, SetHighEventPair, 0
SYSSTUBS_ENTRY5 253, SetHighEventPair, 0
SYSSTUBS_ENTRY6 253, SetHighEventPair, 0
SYSSTUBS_ENTRY7 253, SetHighEventPair, 0
SYSSTUBS_ENTRY8 253, SetHighEventPair, 0
SYSSTUBS_ENTRY1 254, SetHighWaitLowEventPair, 0
SYSSTUBS_ENTRY2 254, SetHighWaitLowEventPair, 0
SYSSTUBS_ENTRY3 254, SetHighWaitLowEventPair, 0
SYSSTUBS_ENTRY4 254, SetHighWaitLowEventPair, 0
SYSSTUBS_ENTRY5 254, SetHighWaitLowEventPair, 0
SYSSTUBS_ENTRY6 254, SetHighWaitLowEventPair, 0
SYSSTUBS_ENTRY7 254, SetHighWaitLowEventPair, 0
SYSSTUBS_ENTRY8 254, SetHighWaitLowEventPair, 0
SYSSTUBS_ENTRY1 255, SetInformationDebugObject, 1
SYSSTUBS_ENTRY2 255, SetInformationDebugObject, 1
SYSSTUBS_ENTRY3 255, SetInformationDebugObject, 1
SYSSTUBS_ENTRY4 255, SetInformationDebugObject, 1
SYSSTUBS_ENTRY5 255, SetInformationDebugObject, 1
SYSSTUBS_ENTRY6 255, SetInformationDebugObject, 1
SYSSTUBS_ENTRY7 255, SetInformationDebugObject, 1
SYSSTUBS_ENTRY8 255, SetInformationDebugObject, 1
SYSSTUBS_ENTRY1 256, SetInformationJobObject, 0
SYSSTUBS_ENTRY2 256, SetInformationJobObject, 0
SYSSTUBS_ENTRY3 256, SetInformationJobObject, 0
SYSSTUBS_ENTRY4 256, SetInformationJobObject, 0
SYSSTUBS_ENTRY5 256, SetInformationJobObject, 0
SYSSTUBS_ENTRY6 256, SetInformationJobObject, 0
SYSSTUBS_ENTRY7 256, SetInformationJobObject, 0
SYSSTUBS_ENTRY8 256, SetInformationJobObject, 0
SYSSTUBS_ENTRY1 257, SetInformationKey, 0
SYSSTUBS_ENTRY2 257, SetInformationKey, 0
SYSSTUBS_ENTRY3 257, SetInformationKey, 0
SYSSTUBS_ENTRY4 257, SetInformationKey, 0
SYSSTUBS_ENTRY5 257, SetInformationKey, 0
SYSSTUBS_ENTRY6 257, SetInformationKey, 0
SYSSTUBS_ENTRY7 257, SetInformationKey, 0
SYSSTUBS_ENTRY8 257, SetInformationKey, 0
SYSSTUBS_ENTRY1 258, SetInformationToken, 0
SYSSTUBS_ENTRY2 258, SetInformationToken, 0
SYSSTUBS_ENTRY3 258, SetInformationToken, 0
SYSSTUBS_ENTRY4 258, SetInformationToken, 0
SYSSTUBS_ENTRY5 258, SetInformationToken, 0
SYSSTUBS_ENTRY6 258, SetInformationToken, 0
SYSSTUBS_ENTRY7 258, SetInformationToken, 0
SYSSTUBS_ENTRY8 258, SetInformationToken, 0
SYSSTUBS_ENTRY1 259, SetIntervalProfile, 0
SYSSTUBS_ENTRY2 259, SetIntervalProfile, 0
SYSSTUBS_ENTRY3 259, SetIntervalProfile, 0
SYSSTUBS_ENTRY4 259, SetIntervalProfile, 0
SYSSTUBS_ENTRY5 259, SetIntervalProfile, 0
SYSSTUBS_ENTRY6 259, SetIntervalProfile, 0
SYSSTUBS_ENTRY7 259, SetIntervalProfile, 0
SYSSTUBS_ENTRY8 259, SetIntervalProfile, 0
SYSSTUBS_ENTRY1 260, SetIoCompletion, 1
SYSSTUBS_ENTRY2 260, SetIoCompletion, 1
SYSSTUBS_ENTRY3 260, SetIoCompletion, 1
SYSSTUBS_ENTRY4 260, SetIoCompletion, 1
SYSSTUBS_ENTRY5 260, SetIoCompletion, 1
SYSSTUBS_ENTRY6 260, SetIoCompletion, 1
SYSSTUBS_ENTRY7 260, SetIoCompletion, 1
SYSSTUBS_ENTRY8 260, SetIoCompletion, 1
SYSSTUBS_ENTRY1 261, SetLdtEntries, 2
SYSSTUBS_ENTRY2 261, SetLdtEntries, 2
SYSSTUBS_ENTRY3 261, SetLdtEntries, 2
SYSSTUBS_ENTRY4 261, SetLdtEntries, 2
SYSSTUBS_ENTRY5 261, SetLdtEntries, 2
SYSSTUBS_ENTRY6 261, SetLdtEntries, 2
SYSSTUBS_ENTRY7 261, SetLdtEntries, 2
SYSSTUBS_ENTRY8 261, SetLdtEntries, 2
SYSSTUBS_ENTRY1 262, SetLowEventPair, 0
SYSSTUBS_ENTRY2 262, SetLowEventPair, 0
SYSSTUBS_ENTRY3 262, SetLowEventPair, 0
SYSSTUBS_ENTRY4 262, SetLowEventPair, 0
SYSSTUBS_ENTRY5 262, SetLowEventPair, 0
SYSSTUBS_ENTRY6 262, SetLowEventPair, 0
SYSSTUBS_ENTRY7 262, SetLowEventPair, 0
SYSSTUBS_ENTRY8 262, SetLowEventPair, 0
SYSSTUBS_ENTRY1 263, SetLowWaitHighEventPair, 0
SYSSTUBS_ENTRY2 263, SetLowWaitHighEventPair, 0
SYSSTUBS_ENTRY3 263, SetLowWaitHighEventPair, 0
SYSSTUBS_ENTRY4 263, SetLowWaitHighEventPair, 0
SYSSTUBS_ENTRY5 263, SetLowWaitHighEventPair, 0
SYSSTUBS_ENTRY6 263, SetLowWaitHighEventPair, 0
SYSSTUBS_ENTRY7 263, SetLowWaitHighEventPair, 0
SYSSTUBS_ENTRY8 263, SetLowWaitHighEventPair, 0
SYSSTUBS_ENTRY1 264, SetQuotaInformationFile, 0
SYSSTUBS_ENTRY2 264, SetQuotaInformationFile, 0
SYSSTUBS_ENTRY3 264, SetQuotaInformationFile, 0
SYSSTUBS_ENTRY4 264, SetQuotaInformationFile, 0
SYSSTUBS_ENTRY5 264, SetQuotaInformationFile, 0
SYSSTUBS_ENTRY6 264, SetQuotaInformationFile, 0
SYSSTUBS_ENTRY7 264, SetQuotaInformationFile, 0
SYSSTUBS_ENTRY8 264, SetQuotaInformationFile, 0
SYSSTUBS_ENTRY1 265, SetSecurityObject, 0
SYSSTUBS_ENTRY2 265, SetSecurityObject, 0
SYSSTUBS_ENTRY3 265, SetSecurityObject, 0
SYSSTUBS_ENTRY4 265, SetSecurityObject, 0
SYSSTUBS_ENTRY5 265, SetSecurityObject, 0
SYSSTUBS_ENTRY6 265, SetSecurityObject, 0
SYSSTUBS_ENTRY7 265, SetSecurityObject, 0
SYSSTUBS_ENTRY8 265, SetSecurityObject, 0
SYSSTUBS_ENTRY1 266, SetSystemEnvironmentValue, 0
SYSSTUBS_ENTRY2 266, SetSystemEnvironmentValue, 0
SYSSTUBS_ENTRY3 266, SetSystemEnvironmentValue, 0
SYSSTUBS_ENTRY4 266, SetSystemEnvironmentValue, 0
SYSSTUBS_ENTRY5 266, SetSystemEnvironmentValue, 0
SYSSTUBS_ENTRY6 266, SetSystemEnvironmentValue, 0
SYSSTUBS_ENTRY7 266, SetSystemEnvironmentValue, 0
SYSSTUBS_ENTRY8 266, SetSystemEnvironmentValue, 0
SYSSTUBS_ENTRY1 267, SetSystemEnvironmentValueEx, 1
SYSSTUBS_ENTRY2 267, SetSystemEnvironmentValueEx, 1
SYSSTUBS_ENTRY3 267, SetSystemEnvironmentValueEx, 1
SYSSTUBS_ENTRY4 267, SetSystemEnvironmentValueEx, 1
SYSSTUBS_ENTRY5 267, SetSystemEnvironmentValueEx, 1
SYSSTUBS_ENTRY6 267, SetSystemEnvironmentValueEx, 1
SYSSTUBS_ENTRY7 267, SetSystemEnvironmentValueEx, 1
SYSSTUBS_ENTRY8 267, SetSystemEnvironmentValueEx, 1
SYSSTUBS_ENTRY1 268, SetSystemInformation, 0
SYSSTUBS_ENTRY2 268, SetSystemInformation, 0
SYSSTUBS_ENTRY3 268, SetSystemInformation, 0
SYSSTUBS_ENTRY4 268, SetSystemInformation, 0
SYSSTUBS_ENTRY5 268, SetSystemInformation, 0
SYSSTUBS_ENTRY6 268, SetSystemInformation, 0
SYSSTUBS_ENTRY7 268, SetSystemInformation, 0
SYSSTUBS_ENTRY8 268, SetSystemInformation, 0
SYSSTUBS_ENTRY1 269, SetSystemPowerState, 0
SYSSTUBS_ENTRY2 269, SetSystemPowerState, 0
SYSSTUBS_ENTRY3 269, SetSystemPowerState, 0
SYSSTUBS_ENTRY4 269, SetSystemPowerState, 0
SYSSTUBS_ENTRY5 269, SetSystemPowerState, 0
SYSSTUBS_ENTRY6 269, SetSystemPowerState, 0
SYSSTUBS_ENTRY7 269, SetSystemPowerState, 0
SYSSTUBS_ENTRY8 269, SetSystemPowerState, 0
SYSSTUBS_ENTRY1 270, SetSystemTime, 0
SYSSTUBS_ENTRY2 270, SetSystemTime, 0
SYSSTUBS_ENTRY3 270, SetSystemTime, 0
SYSSTUBS_ENTRY4 270, SetSystemTime, 0
SYSSTUBS_ENTRY5 270, SetSystemTime, 0
SYSSTUBS_ENTRY6 270, SetSystemTime, 0
SYSSTUBS_ENTRY7 270, SetSystemTime, 0
SYSSTUBS_ENTRY8 270, SetSystemTime, 0
SYSSTUBS_ENTRY1 271, SetThreadExecutionState, 0
SYSSTUBS_ENTRY2 271, SetThreadExecutionState, 0
SYSSTUBS_ENTRY3 271, SetThreadExecutionState, 0
SYSSTUBS_ENTRY4 271, SetThreadExecutionState, 0
SYSSTUBS_ENTRY5 271, SetThreadExecutionState, 0
SYSSTUBS_ENTRY6 271, SetThreadExecutionState, 0
SYSSTUBS_ENTRY7 271, SetThreadExecutionState, 0
SYSSTUBS_ENTRY8 271, SetThreadExecutionState, 0
SYSSTUBS_ENTRY1 272, SetTimerResolution, 0
SYSSTUBS_ENTRY2 272, SetTimerResolution, 0
SYSSTUBS_ENTRY3 272, SetTimerResolution, 0
SYSSTUBS_ENTRY4 272, SetTimerResolution, 0
SYSSTUBS_ENTRY5 272, SetTimerResolution, 0
SYSSTUBS_ENTRY6 272, SetTimerResolution, 0
SYSSTUBS_ENTRY7 272, SetTimerResolution, 0
SYSSTUBS_ENTRY8 272, SetTimerResolution, 0
SYSSTUBS_ENTRY1 273, SetUuidSeed, 0
SYSSTUBS_ENTRY2 273, SetUuidSeed, 0
SYSSTUBS_ENTRY3 273, SetUuidSeed, 0
SYSSTUBS_ENTRY4 273, SetUuidSeed, 0
SYSSTUBS_ENTRY5 273, SetUuidSeed, 0
SYSSTUBS_ENTRY6 273, SetUuidSeed, 0
SYSSTUBS_ENTRY7 273, SetUuidSeed, 0
SYSSTUBS_ENTRY8 273, SetUuidSeed, 0
SYSSTUBS_ENTRY1 274, SetVolumeInformationFile, 1
SYSSTUBS_ENTRY2 274, SetVolumeInformationFile, 1
SYSSTUBS_ENTRY3 274, SetVolumeInformationFile, 1
SYSSTUBS_ENTRY4 274, SetVolumeInformationFile, 1
SYSSTUBS_ENTRY5 274, SetVolumeInformationFile, 1
SYSSTUBS_ENTRY6 274, SetVolumeInformationFile, 1
SYSSTUBS_ENTRY7 274, SetVolumeInformationFile, 1
SYSSTUBS_ENTRY8 274, SetVolumeInformationFile, 1
SYSSTUBS_ENTRY1 275, ShutdownSystem, 0
SYSSTUBS_ENTRY2 275, ShutdownSystem, 0
SYSSTUBS_ENTRY3 275, ShutdownSystem, 0
SYSSTUBS_ENTRY4 275, ShutdownSystem, 0
SYSSTUBS_ENTRY5 275, ShutdownSystem, 0
SYSSTUBS_ENTRY6 275, ShutdownSystem, 0
SYSSTUBS_ENTRY7 275, ShutdownSystem, 0
SYSSTUBS_ENTRY8 275, ShutdownSystem, 0
SYSSTUBS_ENTRY1 276, SignalAndWaitForSingleObject, 0
SYSSTUBS_ENTRY2 276, SignalAndWaitForSingleObject, 0
SYSSTUBS_ENTRY3 276, SignalAndWaitForSingleObject, 0
SYSSTUBS_ENTRY4 276, SignalAndWaitForSingleObject, 0
SYSSTUBS_ENTRY5 276, SignalAndWaitForSingleObject, 0
SYSSTUBS_ENTRY6 276, SignalAndWaitForSingleObject, 0
SYSSTUBS_ENTRY7 276, SignalAndWaitForSingleObject, 0
SYSSTUBS_ENTRY8 276, SignalAndWaitForSingleObject, 0
SYSSTUBS_ENTRY1 277, StartProfile, 0
SYSSTUBS_ENTRY2 277, StartProfile, 0
SYSSTUBS_ENTRY3 277, StartProfile, 0
SYSSTUBS_ENTRY4 277, StartProfile, 0
SYSSTUBS_ENTRY5 277, StartProfile, 0
SYSSTUBS_ENTRY6 277, StartProfile, 0
SYSSTUBS_ENTRY7 277, StartProfile, 0
SYSSTUBS_ENTRY8 277, StartProfile, 0
SYSSTUBS_ENTRY1 278, StopProfile, 0
SYSSTUBS_ENTRY2 278, StopProfile, 0
SYSSTUBS_ENTRY3 278, StopProfile, 0
SYSSTUBS_ENTRY4 278, StopProfile, 0
SYSSTUBS_ENTRY5 278, StopProfile, 0
SYSSTUBS_ENTRY6 278, StopProfile, 0
SYSSTUBS_ENTRY7 278, StopProfile, 0
SYSSTUBS_ENTRY8 278, StopProfile, 0
SYSSTUBS_ENTRY1 279, SuspendProcess, 0
SYSSTUBS_ENTRY2 279, SuspendProcess, 0
SYSSTUBS_ENTRY3 279, SuspendProcess, 0
SYSSTUBS_ENTRY4 279, SuspendProcess, 0
SYSSTUBS_ENTRY5 279, SuspendProcess, 0
SYSSTUBS_ENTRY6 279, SuspendProcess, 0
SYSSTUBS_ENTRY7 279, SuspendProcess, 0
SYSSTUBS_ENTRY8 279, SuspendProcess, 0
SYSSTUBS_ENTRY1 280, SuspendThread, 0
SYSSTUBS_ENTRY2 280, SuspendThread, 0
SYSSTUBS_ENTRY3 280, SuspendThread, 0
SYSSTUBS_ENTRY4 280, SuspendThread, 0
SYSSTUBS_ENTRY5 280, SuspendThread, 0
SYSSTUBS_ENTRY6 280, SuspendThread, 0
SYSSTUBS_ENTRY7 280, SuspendThread, 0
SYSSTUBS_ENTRY8 280, SuspendThread, 0
SYSSTUBS_ENTRY1 281, SystemDebugControl, 2
SYSSTUBS_ENTRY2 281, SystemDebugControl, 2
SYSSTUBS_ENTRY3 281, SystemDebugControl, 2
SYSSTUBS_ENTRY4 281, SystemDebugControl, 2
SYSSTUBS_ENTRY5 281, SystemDebugControl, 2
SYSSTUBS_ENTRY6 281, SystemDebugControl, 2
SYSSTUBS_ENTRY7 281, SystemDebugControl, 2
SYSSTUBS_ENTRY8 281, SystemDebugControl, 2
SYSSTUBS_ENTRY1 282, TerminateJobObject, 0
SYSSTUBS_ENTRY2 282, TerminateJobObject, 0
SYSSTUBS_ENTRY3 282, TerminateJobObject, 0
SYSSTUBS_ENTRY4 282, TerminateJobObject, 0
SYSSTUBS_ENTRY5 282, TerminateJobObject, 0
SYSSTUBS_ENTRY6 282, TerminateJobObject, 0
SYSSTUBS_ENTRY7 282, TerminateJobObject, 0
SYSSTUBS_ENTRY8 282, TerminateJobObject, 0
SYSSTUBS_ENTRY1 283, TestAlert, 0
SYSSTUBS_ENTRY2 283, TestAlert, 0
SYSSTUBS_ENTRY3 283, TestAlert, 0
SYSSTUBS_ENTRY4 283, TestAlert, 0
SYSSTUBS_ENTRY5 283, TestAlert, 0
SYSSTUBS_ENTRY6 283, TestAlert, 0
SYSSTUBS_ENTRY7 283, TestAlert, 0
SYSSTUBS_ENTRY8 283, TestAlert, 0
SYSSTUBS_ENTRY1 284, TranslateFilePath, 0
SYSSTUBS_ENTRY2 284, TranslateFilePath, 0
SYSSTUBS_ENTRY3 284, TranslateFilePath, 0
SYSSTUBS_ENTRY4 284, TranslateFilePath, 0
SYSSTUBS_ENTRY5 284, TranslateFilePath, 0
SYSSTUBS_ENTRY6 284, TranslateFilePath, 0
SYSSTUBS_ENTRY7 284, TranslateFilePath, 0
SYSSTUBS_ENTRY8 284, TranslateFilePath, 0
SYSSTUBS_ENTRY1 285, UnloadDriver, 0
SYSSTUBS_ENTRY2 285, UnloadDriver, 0
SYSSTUBS_ENTRY3 285, UnloadDriver, 0
SYSSTUBS_ENTRY4 285, UnloadDriver, 0
SYSSTUBS_ENTRY5 285, UnloadDriver, 0
SYSSTUBS_ENTRY6 285, UnloadDriver, 0
SYSSTUBS_ENTRY7 285, UnloadDriver, 0
SYSSTUBS_ENTRY8 285, UnloadDriver, 0
SYSSTUBS_ENTRY1 286, UnloadKey, 0
SYSSTUBS_ENTRY2 286, UnloadKey, 0
SYSSTUBS_ENTRY3 286, UnloadKey, 0
SYSSTUBS_ENTRY4 286, UnloadKey, 0
SYSSTUBS_ENTRY5 286, UnloadKey, 0
SYSSTUBS_ENTRY6 286, UnloadKey, 0
SYSSTUBS_ENTRY7 286, UnloadKey, 0
SYSSTUBS_ENTRY8 286, UnloadKey, 0
SYSSTUBS_ENTRY1 287, UnloadKey2, 0
SYSSTUBS_ENTRY2 287, UnloadKey2, 0
SYSSTUBS_ENTRY3 287, UnloadKey2, 0
SYSSTUBS_ENTRY4 287, UnloadKey2, 0
SYSSTUBS_ENTRY5 287, UnloadKey2, 0
SYSSTUBS_ENTRY6 287, UnloadKey2, 0
SYSSTUBS_ENTRY7 287, UnloadKey2, 0
SYSSTUBS_ENTRY8 287, UnloadKey2, 0
SYSSTUBS_ENTRY1 288, UnloadKeyEx, 0
SYSSTUBS_ENTRY2 288, UnloadKeyEx, 0
SYSSTUBS_ENTRY3 288, UnloadKeyEx, 0
SYSSTUBS_ENTRY4 288, UnloadKeyEx, 0
SYSSTUBS_ENTRY5 288, UnloadKeyEx, 0
SYSSTUBS_ENTRY6 288, UnloadKeyEx, 0
SYSSTUBS_ENTRY7 288, UnloadKeyEx, 0
SYSSTUBS_ENTRY8 288, UnloadKeyEx, 0
SYSSTUBS_ENTRY1 289, UnlockFile, 1
SYSSTUBS_ENTRY2 289, UnlockFile, 1
SYSSTUBS_ENTRY3 289, UnlockFile, 1
SYSSTUBS_ENTRY4 289, UnlockFile, 1
SYSSTUBS_ENTRY5 289, UnlockFile, 1
SYSSTUBS_ENTRY6 289, UnlockFile, 1
SYSSTUBS_ENTRY7 289, UnlockFile, 1
SYSSTUBS_ENTRY8 289, UnlockFile, 1
SYSSTUBS_ENTRY1 290, UnlockVirtualMemory, 0
SYSSTUBS_ENTRY2 290, UnlockVirtualMemory, 0
SYSSTUBS_ENTRY3 290, UnlockVirtualMemory, 0
SYSSTUBS_ENTRY4 290, UnlockVirtualMemory, 0
SYSSTUBS_ENTRY5 290, UnlockVirtualMemory, 0
SYSSTUBS_ENTRY6 290, UnlockVirtualMemory, 0
SYSSTUBS_ENTRY7 290, UnlockVirtualMemory, 0
SYSSTUBS_ENTRY8 290, UnlockVirtualMemory, 0
SYSSTUBS_ENTRY1 291, VdmControl, 0
SYSSTUBS_ENTRY2 291, VdmControl, 0
SYSSTUBS_ENTRY3 291, VdmControl, 0
SYSSTUBS_ENTRY4 291, VdmControl, 0
SYSSTUBS_ENTRY5 291, VdmControl, 0
SYSSTUBS_ENTRY6 291, VdmControl, 0
SYSSTUBS_ENTRY7 291, VdmControl, 0
SYSSTUBS_ENTRY8 291, VdmControl, 0
SYSSTUBS_ENTRY1 292, WaitForDebugEvent, 0
SYSSTUBS_ENTRY2 292, WaitForDebugEvent, 0
SYSSTUBS_ENTRY3 292, WaitForDebugEvent, 0
SYSSTUBS_ENTRY4 292, WaitForDebugEvent, 0
SYSSTUBS_ENTRY5 292, WaitForDebugEvent, 0
SYSSTUBS_ENTRY6 292, WaitForDebugEvent, 0
SYSSTUBS_ENTRY7 292, WaitForDebugEvent, 0
SYSSTUBS_ENTRY8 292, WaitForDebugEvent, 0
SYSSTUBS_ENTRY1 293, WaitForKeyedEvent, 0
SYSSTUBS_ENTRY2 293, WaitForKeyedEvent, 0
SYSSTUBS_ENTRY3 293, WaitForKeyedEvent, 0
SYSSTUBS_ENTRY4 293, WaitForKeyedEvent, 0
SYSSTUBS_ENTRY5 293, WaitForKeyedEvent, 0
SYSSTUBS_ENTRY6 293, WaitForKeyedEvent, 0
SYSSTUBS_ENTRY7 293, WaitForKeyedEvent, 0
SYSSTUBS_ENTRY8 293, WaitForKeyedEvent, 0
SYSSTUBS_ENTRY1 294, WaitHighEventPair, 0
SYSSTUBS_ENTRY2 294, WaitHighEventPair, 0
SYSSTUBS_ENTRY3 294, WaitHighEventPair, 0
SYSSTUBS_ENTRY4 294, WaitHighEventPair, 0
SYSSTUBS_ENTRY5 294, WaitHighEventPair, 0
SYSSTUBS_ENTRY6 294, WaitHighEventPair, 0
SYSSTUBS_ENTRY7 294, WaitHighEventPair, 0
SYSSTUBS_ENTRY8 294, WaitHighEventPair, 0
SYSSTUBS_ENTRY1 295, WaitLowEventPair, 0
SYSSTUBS_ENTRY2 295, WaitLowEventPair, 0
SYSSTUBS_ENTRY3 295, WaitLowEventPair, 0
SYSSTUBS_ENTRY4 295, WaitLowEventPair, 0
SYSSTUBS_ENTRY5 295, WaitLowEventPair, 0
SYSSTUBS_ENTRY6 295, WaitLowEventPair, 0
SYSSTUBS_ENTRY7 295, WaitLowEventPair, 0
SYSSTUBS_ENTRY8 295, WaitLowEventPair, 0
STUBS_END
|
;
; jcqnts2f.asm - sample data conversion and quantization (SSE & SSE2)
;
; Copyright 2009 Pierre Ossman <ossman@cendio.se> for Cendio AB
;
; Based on
; x86 SIMD extension for IJG JPEG library
; Copyright (C) 1999-2006, MIYASAKA Masaru.
; For conditions of distribution and use, see copyright notice in jsimdext.inc
;
; This file should be assembled with NASM (Netwide Assembler),
; can *not* be assembled with Microsoft's MASM or any compatible
; assembler (including Borland's Turbo Assembler).
; NASM is available from http://nasm.sourceforge.net/ or
; http://sourceforge.net/project/showfiles.php?group_id=6208
;
; [TAB8]
%include "jsimdext.inc"
%include "jdct.inc"
; --------------------------------------------------------------------------
SECTION SEG_TEXT
BITS 32
;
; Load data into workspace, applying unsigned->signed conversion
;
; GLOBAL(void)
; jsimd_convsamp_float_sse2 (JSAMPARRAY sample_data, JDIMENSION start_col,
; FAST_FLOAT * workspace);
;
%define sample_data ebp+8 ; JSAMPARRAY sample_data
%define start_col ebp+12 ; JDIMENSION start_col
%define workspace ebp+16 ; FAST_FLOAT * workspace
align 16
global EXTN(jsimd_convsamp_float_sse2)
EXTN(jsimd_convsamp_float_sse2):
push ebp
mov ebp,esp
push ebx
; push ecx ; need not be preserved
; push edx ; need not be preserved
push esi
push edi
pcmpeqw xmm7,xmm7
psllw xmm7,7
packsswb xmm7,xmm7 ; xmm7 = PB_CENTERJSAMPLE (0x808080..)
mov esi, JSAMPARRAY [sample_data] ; (JSAMPROW *)
mov eax, JDIMENSION [start_col]
mov edi, POINTER [workspace] ; (DCTELEM *)
mov ecx, DCTSIZE/2
alignx 16,7
.convloop:
mov ebx, JSAMPROW [esi+0*SIZEOF_JSAMPROW] ; (JSAMPLE *)
mov edx, JSAMPROW [esi+1*SIZEOF_JSAMPROW] ; (JSAMPLE *)
movq xmm0, XMM_MMWORD [ebx+eax*SIZEOF_JSAMPLE]
movq xmm1, XMM_MMWORD [edx+eax*SIZEOF_JSAMPLE]
psubb xmm0,xmm7 ; xmm0=(01234567)
psubb xmm1,xmm7 ; xmm1=(89ABCDEF)
punpcklbw xmm0,xmm0 ; xmm0=(*0*1*2*3*4*5*6*7)
punpcklbw xmm1,xmm1 ; xmm1=(*8*9*A*B*C*D*E*F)
punpcklwd xmm2,xmm0 ; xmm2=(***0***1***2***3)
punpckhwd xmm0,xmm0 ; xmm0=(***4***5***6***7)
punpcklwd xmm3,xmm1 ; xmm3=(***8***9***A***B)
punpckhwd xmm1,xmm1 ; xmm1=(***C***D***E***F)
psrad xmm2,(DWORD_BIT-BYTE_BIT) ; xmm2=(0123)
psrad xmm0,(DWORD_BIT-BYTE_BIT) ; xmm0=(4567)
cvtdq2ps xmm2,xmm2 ; xmm2=(0123)
cvtdq2ps xmm0,xmm0 ; xmm0=(4567)
psrad xmm3,(DWORD_BIT-BYTE_BIT) ; xmm3=(89AB)
psrad xmm1,(DWORD_BIT-BYTE_BIT) ; xmm1=(CDEF)
cvtdq2ps xmm3,xmm3 ; xmm3=(89AB)
cvtdq2ps xmm1,xmm1 ; xmm1=(CDEF)
movaps XMMWORD [XMMBLOCK(0,0,edi,SIZEOF_FAST_FLOAT)], xmm2
movaps XMMWORD [XMMBLOCK(0,1,edi,SIZEOF_FAST_FLOAT)], xmm0
movaps XMMWORD [XMMBLOCK(1,0,edi,SIZEOF_FAST_FLOAT)], xmm3
movaps XMMWORD [XMMBLOCK(1,1,edi,SIZEOF_FAST_FLOAT)], xmm1
add esi, byte 2*SIZEOF_JSAMPROW
add edi, byte 2*DCTSIZE*SIZEOF_FAST_FLOAT
dec ecx
jnz short .convloop
pop edi
pop esi
; pop edx ; need not be preserved
; pop ecx ; need not be preserved
pop ebx
pop ebp
ret
; --------------------------------------------------------------------------
;
; Quantize/descale the coefficients, and store into coef_block
;
; GLOBAL(void)
; jsimd_quantize_float_sse2 (JCOEFPTR coef_block, FAST_FLOAT * divisors,
; FAST_FLOAT * workspace);
;
%define coef_block ebp+8 ; JCOEFPTR coef_block
%define divisors ebp+12 ; FAST_FLOAT * divisors
%define workspace ebp+16 ; FAST_FLOAT * workspace
align 16
global EXTN(jsimd_quantize_float_sse2)
EXTN(jsimd_quantize_float_sse2):
push ebp
mov ebp,esp
; push ebx ; unused
; push ecx ; unused
; push edx ; need not be preserved
push esi
push edi
mov esi, POINTER [workspace]
mov edx, POINTER [divisors]
mov edi, JCOEFPTR [coef_block]
mov eax, DCTSIZE2/16
alignx 16,7
.quantloop:
movaps xmm0, XMMWORD [XMMBLOCK(0,0,esi,SIZEOF_FAST_FLOAT)]
movaps xmm1, XMMWORD [XMMBLOCK(0,1,esi,SIZEOF_FAST_FLOAT)]
mulps xmm0, XMMWORD [XMMBLOCK(0,0,edx,SIZEOF_FAST_FLOAT)]
mulps xmm1, XMMWORD [XMMBLOCK(0,1,edx,SIZEOF_FAST_FLOAT)]
movaps xmm2, XMMWORD [XMMBLOCK(1,0,esi,SIZEOF_FAST_FLOAT)]
movaps xmm3, XMMWORD [XMMBLOCK(1,1,esi,SIZEOF_FAST_FLOAT)]
mulps xmm2, XMMWORD [XMMBLOCK(1,0,edx,SIZEOF_FAST_FLOAT)]
mulps xmm3, XMMWORD [XMMBLOCK(1,1,edx,SIZEOF_FAST_FLOAT)]
cvtps2dq xmm0,xmm0
cvtps2dq xmm1,xmm1
cvtps2dq xmm2,xmm2
cvtps2dq xmm3,xmm3
packssdw xmm0,xmm1
packssdw xmm2,xmm3
movdqa XMMWORD [XMMBLOCK(0,0,edi,SIZEOF_JCOEF)], xmm0
movdqa XMMWORD [XMMBLOCK(1,0,edi,SIZEOF_JCOEF)], xmm2
add esi, byte 16*SIZEOF_FAST_FLOAT
add edx, byte 16*SIZEOF_FAST_FLOAT
add edi, byte 16*SIZEOF_JCOEF
dec eax
jnz short .quantloop
pop edi
pop esi
; pop edx ; need not be preserved
; pop ecx ; unused
; pop ebx ; unused
pop ebp
ret
; For some reason, the OS X linker does not honor the request to align the
; segment unless we do this.
align 16
|
#include <nestedtensor/csrc/nested_tensor_impl.h>
#include <nestedtensor/csrc/utils/nested_node_functions.h>
#include <torch/extension.h>
#include <torch/library.h>
using namespace torch::nn;
namespace F = torch::nn::functional;
namespace at {
Tensor NestedTensor_embedding(
const Tensor& weight,
const Tensor& indices,
int64_t padding_idx,
bool scale_grad_by_freq,
bool sparse) {
if (is_nested_tensor_impl(weight)) {
// TODO: Needs test coverage
return autograd_map_nested_tensor(
[&](at::Tensor w, at::Tensor i) {
return at::embedding(w, i, padding_idx, scale_grad_by_freq, sparse);
},
weight,
indices);
}
return autograd_map_nested_tensor(
[&](at::Tensor i) {
return at::embedding(
weight, i, padding_idx, scale_grad_by_freq, sparse);
},
indices);
}
Tensor NestedTensor_layer_norm(
const Tensor& input,
IntArrayRef normalized_shape,
const c10::optional<Tensor>& weight,
const c10::optional<Tensor>& bias,
double eps,
bool /* cudnn_enable, deprecated */) {
TORCH_CHECK(
normalized_shape.size() == 1,
"Currently only singleton tuples of integers supported for layer_norm.");
auto input_data = get_nested_tensor_impl(input);
TORCH_CHECK(
input_data->opt_sizes()[input.dim() - 1],
"Cannot normalize across irregular dimension ",
std::to_string(input.dim() - 1));
if (weight && bias) {
return autograd_map_nested_tensor(
[normalized_shape, eps](const at::Tensor t, Tensor w, Tensor b) {
return at::layer_norm(t, normalized_shape, w, b, eps, true);
},
input,
*weight,
*bias);
}
TORCH_CHECK(!weight && !bias, "Either both weight and bias are used or not.");
return autograd_map_nested_tensor(
[normalized_shape, eps](const at::Tensor t) {
return at::layer_norm(
t, normalized_shape, c10::nullopt, c10::nullopt, eps, true);
},
input);
}
Tensor NestedTensor_all(const Tensor& self) {
auto self_impl = get_nested_tensor_impl(self);
if (self.numel() == 0) {
// XXX: self.options doesn't work here because
// we don't want a Tensor backed by a NestedTensor
Tensor result = at::empty({0}, at::kBool); //, self.options());
result.fill_(1);
return result;
}
auto map_all = flatten(
map([](at::Tensor tensor) { return tensor.all(); },
self_impl->get_structure()));
at::Tensor gathered = at::empty(
{static_cast<int64_t>(map_all.size())}, at::kBool); //, self.options());
for (size_t i = 0; i < map_all.size(); i++) {
gathered[i] = map_all[i];
}
return gathered.all();
}
Tensor NestedTensor_any(const Tensor& self) {
auto self_impl = get_nested_tensor_impl(self);
if (self.numel() == 0) {
// XXX: self.options doesn't work here because
// we don't want a Tensor backed by a NestedTensor
Tensor result = at::empty({0}, at::kBool); //, self.options());
result.fill_(1);
return result;
}
auto map_any = flatten(
map([](at::Tensor tensor) { return tensor.any(); },
self_impl->get_structure()));
at::Tensor gathered = at::empty(
{static_cast<int64_t>(map_any.size())}, at::kBool); //, self.options());
for (size_t i = 0; i < map_any.size(); i++) {
gathered[i] = map_any[i];
}
return gathered.any();
}
Tensor NestedTensor__log_softmax(
const Tensor& self,
const int64_t dim_,
const bool half_to_float) {
return autograd_map_nested_tensor(
[&](Tensor a) { return at::_log_softmax(a, dim_, half_to_float); }, self);
}
Tensor NestedTensor_pin_memory(const Tensor& self) {
return map_nested_tensor(
[](Tensor tensor) { return at::native::pin_memory(tensor); }, self);
}
Tensor NestedTensor_flatten(
const Tensor& self,
int64_t start_dim,
int64_t end_dim) {
auto self_data = get_nested_tensor_impl(self);
start_dim = maybe_wrap_dim(start_dim, self.dim());
end_dim = maybe_wrap_dim(end_dim, self.dim());
int64_t nested_dim = self_data->nested_dim();
TORCH_CHECK(
start_dim >= nested_dim, "Cannot flatten nested dimension ", start_dim);
TORCH_CHECK(
end_dim >= nested_dim, "Cannot flatten nested dimension ", end_dim);
// XXX: Write test that checks for flatten autograd support.
return autograd_map_nested_tensor(
[start_dim, end_dim, nested_dim](at::Tensor tensor) {
return at::flatten(
tensor, start_dim - nested_dim, end_dim - nested_dim);
},
self);
}
std::vector<Tensor> get_stack_inputs(TensorList tensors, int64_t dim) {
std::vector<Tensor> inputs(tensors.size());
for (size_t i = 0; i < tensors.size(); ++i) {
inputs[i] = tensors[i].unsqueeze(dim);
}
return inputs;
}
Tensor& NestedTensor_stack_out(
Tensor& result,
TensorList tensors,
int64_t dim) {
TORCH_CHECK(tensors.size() > 0, "stack expects a non-empty TensorList");
dim = maybe_wrap_dim(dim, tensors[0].dim() + 1);
return at::cat_out(result, get_stack_inputs(tensors, dim), dim);
}
Tensor NestedTensor_stack(TensorList tensors, int64_t dim) {
TORCH_CHECK(tensors.size() > 0, "stack expects a non-empty TensorList");
dim = maybe_wrap_dim(dim, tensors[0].dim() + 1);
return at::cat(get_stack_inputs(tensors, dim), dim);
}
Tensor& NestedTensor_cat_out(Tensor& result, TensorList tensors, int64_t dim) {
auto tmp = at::cat(tensors, dim);
result.copy_(tmp);
return result;
}
Tensor NestedTensor_cat(TensorList tensors, int64_t dim) {
TORCH_CHECK(tensors.size() > 0, "Cannot cat an empty list.");
auto nested_dim_0 = get_nested_tensor_impl(tensors[0])->nested_dim();
auto dim_0 = get_nested_tensor_impl(tensors[0])->dim();
// TORCH_CHECK(dim == 0, "cat currently only supports dim set to 0.")
for (size_t i = 1; i < tensors.size(); i++) {
TORCH_CHECK(
nested_dim_0 == get_nested_tensor_impl(tensors[i])->nested_dim(),
"Nested dimension of NestedTensors must match for cat to succeed.");
TORCH_CHECK(
dim_0 == get_nested_tensor_impl(tensors[i])->dim(),
"Dimension of NestedTensors must match for cat to succeed.");
}
if (dim == 0) {
std::vector<TensorNode> result;
for (size_t i = 0; i < tensors.size(); i++) {
auto unbound = get_nested_tensor_structure(tensors[i]).unbind();
for (size_t j = 0; j < unbound.size(); j++) {
result.push_back(unbound[j]);
}
}
return wrap_tensor_node(TensorNode(std::move(result)));
}
std::vector<std::vector<at::Tensor>> candidates;
for (size_t i = 0; i < tensors.size(); i++) {
auto unbound = tensors[i].unbind();
for (size_t j = 0; j < unbound.size(); j++) {
if (j >= candidates.size()) {
candidates.resize(j + 1);
}
candidates[j].push_back(unbound[j]);
}
}
std::vector<TensorNode> result;
for (size_t i = 0; i < candidates.size(); i++) {
auto tmp = at::cat(TensorList(candidates[i]), dim - 1);
if (is_nested_tensor_impl(tmp)) {
result.push_back(get_nested_tensor_structure(tmp));
} else {
result.push_back(TensorNode(std::move(tmp)));
}
}
return wrap_tensor_node(TensorNode(std::move(result)));
}
TORCH_LIBRARY_IMPL(aten, AutogradNestedTensor, m) {
nt_impl(m, "embedding", NestedTensor_embedding);
nt_impl(m, "any", NestedTensor_any);
nt_impl(m, "all", NestedTensor_all);
nt_impl(m, "_log_softmax", NestedTensor__log_softmax);
nt_impl(m, "layer_norm", NestedTensor_layer_norm);
nt_impl(m, "pin_memory", NestedTensor_pin_memory);
nt_impl(m, "flatten.using_ints", NestedTensor_flatten);
nt_impl(m, "stack", NestedTensor_stack);
nt_impl(m, "stack.out", NestedTensor_stack_out);
nt_impl(m, "cat", NestedTensor_cat);
nt_impl(m, "cat.out", NestedTensor_cat_out);
}
} // namespace at
|
;
;=======================================================================
; RomWBW Loader
;=======================================================================
;
; The loader code is invoked immediately after HBIOS completes system
; initialization. it is responsible for loading a runnable image
; (operating system, etc.) into memory and transferring control to that
; image. The image may come from ROM (romboot), RAM (appboot/imgboot)
; or from disk (disk boot).
;
; In the case of a ROM boot, the selected executable image is copied
; from ROM into the default RAM and then control is passed to the
; starting address in RAM. In the case of an appboot or imgboot
; startup (see hbios.asm) the source of the image may be RAM.
;
; In the case of a disk boot, sector 2 (the third sector) of the disk
; device will be read -- this is the boot info sector and is expected
; to have the format defined at bl_infosec below. the last three words
; of data in this sector determine the final destination starting and
; ending address for the disk load operation as well as the entry point
; to transfer control to. The actual image to be loaded *must* be on
; the disk in the sectors immediately following the boot info sector.
; This means the image to be loaded must begin in sector 3 (the fourth
; sector) and occupy sectors contiguously after that.
;
; The code below relocates itself at startup to the start of common RAM
; at $8000. This means that the code, data, and stack will all stay
; within $8000-$8FFF. Since all code images like to be loaded either
; high or low (never in the middle), the $8000-$8FFF location tends to
; avoid the problem where the code is overlaid during the loading of
; the desired executable image.
;
#INCLUDE "std.asm" ; standard RomWBW constants
;
#ifndef BOOT_DEFAULT
#define BOOT_DEFAULT "H"
#endif
;
bel .equ 7 ; ASCII bell
bs .equ 8 ; ASCII backspace
lf .equ 10 ; ASCII linefeed
cr .equ 13 ; ASCII carriage return
;
cmdbuf .equ $80 ; cmd buf is in second half of page zero
cmdmax .equ 60 ; max cmd len (arbitrary), must be < bufsiz
bufsiz .equ $80 ; size of cmd buf
;
int_im1 .equ $FF00 ; IM1 vector target for RomWBW HBIOS proxy
;
bid_cur .equ -1 ; used below to indicate current bank
;
.org 0 ; we expect to be loaded at $0000
;
;=======================================================================
; Normal page zero setup, ret/reti/retn as appropriate
;=======================================================================
;
jp $100 ; rst 0: jump to boot code
.fill ($08 - $)
#if (BIOS == BIOS_WBW)
jp HB_INVOKE ; rst 8: invoke HBIOS function
#else
jp $FFFD ; rst 8: invoke UBIOS function
#endif
.fill ($10 - $)
ret ; rst 10
.fill ($18 - $)
ret ; rst 18
.fill ($20 - $)
ret ; rst 20
.fill ($28 - $)
ret ; rst 28
.fill ($30 - $)
ret ; rst 30
.fill ($38 - $)
#if (BIOS == BIOS_WBW)
#if (INTMODE == 1)
jp int_im1 ; go to handler in hi mem
#else
ret ; return w/ ints left disabled
#endif
#else
ret ; return w/ ints disabled
#endif
;
#if (BIOS == BIOS_WBW)
.fill ($40 - $),$FF
; After initial bootup, it is conventional for a jp 0 to
; cause a warm start of the system. If there is no OS running
; then this bit of code will suffice. After bootup, the
; jp instruction at $0 is modified to point here.
pop hl ; save PC in case needed for ...
ld bc,$F003 ; HBIOS user reset function
call HB_INVOKE ; do it
ld bc,$F001 ; HBIOS warm start function
call HB_INVOKE ; do it
#endif
;
.fill ($66 - $)
retn ; nmi
;
.fill ($100 - $) ; pad remainder of page zero
;
;=======================================================================
; Startup and loader initialization
;=======================================================================
;
; Note: at startup, we should not assume which bank we are operating in.
;
; Relocate to start of common ram at $8000
ld hl,0
ld de,$8000
ld bc,LDR_SIZ
ldir
;
jp start
;
.ORG $8000 + $
;
start:
ld sp,bl_stack ; setup private stack
call delay_init ; init delay functions
;
; Disable interrupts if IM1 is active because we are switching to page
; zero in user bank and it has not been prepared with IM1 vector yet.
;
#if (INTMODE == 1)
di
#endif
;
; Switch to user RAM bank
;
#if (BIOS == BIOS_WBW)
ld b,BF_SYSSETBNK ; HBIOS func: set bank
ld c,BID_USR ; select user bank
rst 08 ; do it
ld a,c ; previous bank to A
ld (bid_ldr),a ; save previous bank for later
bit 7,a ; starting from ROM?
#endif
;
#if (BIOS == BIOS_UNA)
ld bc,$01FB ; UNA func: set bank
ld de,BID_USR ; select user bank
rst 08 ; do it
ld (bid_ldr),de ; ... for later
bit 7,d ; starting from ROM?
#endif
;
; For app mode startup, use alternate table
ld hl,ra_tbl ; assume ROM startup
jr z,start1 ; if so, ra_tbl OK, skip ahead
ld hl,ra_tbl_app ; not ROM boot, get app tbl loc
start1:
ld (ra_tbl_loc),hl ; and overlay pointer
;
; Copy original page zero into user page zero
;
ld hl,$8000 ; page zero was copied here
ld de,0 ; put it in user page zero
ld bc,$100 ; full page
ldir ; do it
ld hl,$0040 ; adr of user reset code
ld (1),hl ; save at $0000
;
; Page zero in user bank is ready for interrupts now.
;
#if (INTMODE == 1)
ei
#endif
;
;=======================================================================
; Loader prompt
;=======================================================================
;
call nl2 ; formatting
ld hl,str_banner ; display boot banner
call pstr ; do it
call clrbuf ; zero fill the cmd buffer
;
#if (BOOT_TIMEOUT != -1)
; Initialize auto command timeout downcounter
or $FF ; auto cmd active value
ld (acmd_act),a ; set flag
ld bc,BOOT_TIMEOUT * 100 ; hundredths of seconds
ld (acmd_to),bc ; save auto cmd timeout
;
; If timeout is zero, boot auto command immediately
ld a,b ; check for
or c ; ... zero
jr nz,prompt ; not zero, prompt w/ timeout
call nl2 ; formatting
ld hl,str_autoboot ; auto command prefix
call pstr ; show it
call autocmd ; handle w/o prompt
jr reprompt ; restart w/ autocmd disable
#endif
;
prompt:
ld hl,reprompt ; adr of prompt restart routine
push hl ; put it on stack
call nl2 ; formatting
ld hl,str_prompt ; display boot prompt
call pstr ; do it
call clrbuf ; zero fill the cmd buffer
;
#if (DSKYENABLE)
call DSKY_PREINIT ; *** TEMPORARY ***
call DSKY_RESET ; clear DSKY
ld hl,msg_sel ; boot select msg
call DSKY_SHOW ; show on DSKY
#IF (DSKYMODE == DSKYMODE_NG)
call DSKY_PUTLED
.db $3f,$3f,$3f,$3f,$00,$00,$00,$00
call DSKY_BEEP
call DSKY_L2ON
#ENDIF
#endif
;
wtkey:
; wait for a key or timeout
call cst ; check for keyboard key
jr nz,concmd ; if pending, do console command
;
#if (DSKYENABLE)
call DSKY_STAT ; check DSKY for keypress
or a ; set flags
jp nz,dskycmd ; if pending, do DSKY command
#endif
;
#if (BOOT_TIMEOUT != -1)
; check for timeout and handle auto boot here
ld a,(acmd_act) ; get auto cmd active flag
or a ; set flags
jr z,wtkey ; if not active, just loop
ld bc,(acmd_to) ; load timeout value
ld a,b ; test for
or c ; ... zero
jr z,autocmd ; if so, handle it
dec bc ; decrement
ld (acmd_to),bc ; resave it
ld de,625 ; 16us * 625 = 10ms
call vdelay ; 10ms delay
#endif
;
jr wtkey ; loop
;
reprompt:
xor a ; zero accum
ld (acmd_act),a ; set auto cmd inactive
jr prompt ; back to loader prompt
;
clrbuf:
ld hl,cmdbuf
ld b,bufsiz
xor a
clrbuf1:
ld (hl),a
djnz clrbuf1
ret
;
;=======================================================================
; Process a command line from buffer
;=======================================================================
;
concmd:
call clrled ; clear LEDs
;
#if (DSKYENABLE)
#if (DSKYMODE == DSKYMODE_NG)
call DSKY_PUTLED
.db $00,$00,$00,$00,$00,$00,$00,$00
call DSKY_L2OFF
#endif
#endif
;
; Get a command line from console and handle it
call rdln ; get a line from the user
ld de,cmdbuf ; point to buffer
call skipws ; skip whitespace
or a ; set flags to check for null
jr nz,runcmd ; got a cmd, process it
; if no cmd entered, fall thru to process default cmd
;
autocmd:
; Copy autocmd string to buffer and process it
ld hl,acmd ; auto cmd string
call pstr ; display it
ld hl,acmd ; auto cmd string
ld de,cmdbuf ; cmd buffer adr
ld bc,acmd_len ; auto cmd length
ldir ; copy to command line buffer
;
runcmd:
; Process command line
;
ld de,cmdbuf ; point to start of buf
call skipws ; skip whitespace
or a ; check for null terminator
ret z ; if empty line, just bail out
ld a,(de) ; get character
call upcase ; make upper case
;
; Attempt built-in commands
cp 'H' ; H = display help
jp z,help ; if so, do it
cp '?' ; '?' alias for help
jp z,help ; if so, do it
cp 'L' ; L = List ROM applications
jp z,applst ; if so, do it
cp 'D' ; D = device inventory
jp z,devlst ; if so, do it
cp 'R' ; R = reboot system
jp z,reboot ; if so, do it
#if (BIOS == BIOS_WBW)
cp 'I' ; C = set console interface
jp z,setcon ; if so, do it
cp 'V' ; V = diagnostic verbosity
jp z,setdl ; is so, do it
#endif
;
; Attempt ROM application launch
ld ix,(ra_tbl_loc) ; point to start of ROM app tbl
ld c,a ; save command in C
runcmd1:
ld a,(ix+ra_conkey) ; get match char
and ~$80 ; clear "hidden entry" bit
cp c ; compare
jp z,romload ; if match, load it
ld de,ra_entsiz ; table entry size
add ix,de ; bump IX to next entry
ld a,(ix) ; check for end
or (ix+1) ; ... of table
jr nz,runcmd1 ; loop till done
;
; Attempt disk boot
ld de,cmdbuf ; start of buffer
call skipws ; skip whitespace
call isnum ; do we have a number?
jp nz,err_invcmd ; invalid format if empty
call getnum ; parse a number
jp c,err_invcmd ; handle overflow error
ld (bootunit),a ; save boot unit
xor a ; zero accum
ld (bootslice),a ; save default slice
call skipws ; skip possible whitespace
ld a,(de) ; get separator char
or a ; test for terminator
jp z,diskboot ; if so, boot the disk unit
cp '.' ; otherwise, is '.'?
jr z,runcmd2 ; yes, handle slice spec
cp ':' ; or ':'?
jr z,runcmd2 ; alt sep for slice spec
jp err_invcmd ; if not, format error
runcmd2:
inc de ; bump past separator
call skipws ; skip possible whitespace
call isnum ; do we have a number?
jp nz,err_invcmd ; if not, format error
call getnum ; get number
jp c,err_invcmd ; handle overflow error
ld (bootslice),a ; save boot slice
jp diskboot ; boot the disk unit/slice
;
;=======================================================================
; Process a DSKY command from key in A
;=======================================================================
;
#if (DSKYENABLE)
;
dskycmd:
call clrled ; clear LEDs
;
call DSKY_GETKEY ; get DSKY key
cp $FF ; check for error
ret z ; abort if so
;
#if (DSKYMODE == DSKYMODE_NG)
call DSKY_PUTLED
.db $00,$00,$00,$00,$00,$00,$00,$00
call DSKY_L2OFF
#endif
;
; Attempt built-in commands
cp KY_BO ; reboot system
jp z,reboot ; if so, do it
;
; Attempt ROM application launch
ld ix,(ra_tbl_loc) ; point to start of ROM app tbl
ld c,a ; save DSKY key in C
dskycmd1:
ld a,(ix+ra_dskykey) ; get match char
cp c ; compare
jp z,romload ; if match, load it
ld de,ra_entsiz ; table entry size
add ix,de ; bump IX to next entry
ld a,(ix) ; check for end
or (ix+1) ; ... of table
jr nz,dskycmd1 ; loop till done
;
; Attempt disk boot
ld a,c ; copy key to A
cp KY_F + 1 ; over max?
ret nc ; abort if so
ld (bootunit),a ; set as boot unit
xor a ; zero A
ld (bootslice),a ; boot slice always zero here
jp diskboot ; go do it
;
#endif
;
;=======================================================================
; Special command processing
;=======================================================================
;
; Display Help
;
help:
ld hl,str_help ; point to help string
call pstr ; display it
ret
;
; List ROM apps
;
applst:
ld hl,str_applst
call pstr
call nl
ld ix,(ra_tbl_loc)
applst1:
; check for end of table
ld a,(ix)
or (ix+1)
ret z
;
ld a,(ix+ra_conkey)
bit 7,a
jr nz,applst2
push af
call nl
ld a,' '
call cout
call cout
pop af
call cout
ld a,':'
call cout
ld a,' '
call cout
ld l,(ix+ra_name)
ld h,(ix+ra_name+1)
call pstr
;
applst2:
ld bc,ra_entsiz
add ix,bc
jr applst1
ret
;
; Device list
;
devlst:
ld hl,str_devlst ; device list header string
call pstr ; display it
jp prtall ; do it
;
; Set console interface unit
;
#if (BIOS == BIOS_WBW)
;
setcon:
; On entry DE is expected to be pointing to start
; of command. Get unit number.
call findws ; skip command
call skipws ; and skip it
call isnum ; do we have a number?
jp nz,err_invcmd ; if not, invalid
call getnum ; parse number into A
jp c,err_nocon ; handle overflow error
;
; Check against max char unit
push de
push af ; save requested unit
ld b,BF_SYSGET ; HBIOS func: SYS GET
ld c,BF_SYSGET_CIOCNT ; HBIOS subfunc: CIO unit count
rst 08 ; E := unit count
pop af ; restore requested unit
cp e ; compare
pop de
jp nc,err_nocon ; handle invalid unit
ld (newcon),a ; save validated console
;
; Get baud rate
call findws
call skipws ; skip whitespace
call isnum ; do we have a number?
jp nz,docon ; if no we don't change baudrate
call getnum ; parse a number
jp c,err_invcmd ; handle overflow error
;
cp 32 ; handle invalid
jp nc,err_invcmd ; baud rate
bit 0,a
jr z,iseven ; convert sequential
inc a ; baud rate code to
srl a ; encoded baud rate
jr setspd ; 13=9600
iseven: dec a ; 15=19200
srl a ; 17=38400
add a,16 ; 20=115200
setspd: ld (newspeed),a ; save validated baud rate
;
ld hl,str_chspeed ; notify user
call pstr ; to change
call cin ; speed
;
; Get the current settings for chosen console
ld b,BF_CIOQUERY ; BIOS serial device query
ld a,(newcon) ; get device unit num
ld c,a ; ... and put in C
rst 08 ; call H/UBIOS, DE := line characteristics
jp nz,err_invcmd ; abort on error
;
ld a,d ; mask off current
and $11100000 ; baud rate
ld hl,newspeed ; and load in new
or (hl) ; baud rate
ld d,a
;
ld b,BF_CIOINIT ; BIOS serial init
ld a,(newcon) ; get serial device unit
ld c,a ; ... into C
rst 08 ; call HBIOS
jp nz,err_invcmd ; handle error
;
; Notify user, we're outta here....
docon: ld hl,str_newcon ; new console msg
call pstr ; print string on cur console
ld a,(newcon) ; restore new console unit
call prtdecb ; print unit num
;
; Set console unit
ld b,BF_SYSPOKE ; HBIOS func: POKE
ld d,BID_BIOS ; BIOS bank
ld e,a ; Char unit value
ld hl,HCB_LOC + HCB_CONDEV ; Con unit num in HCB
rst 08 ; do it
;
; Display loader prompt on new console
call nl2 ; formatting
ld hl,str_banner ; display boot banner
call pstr ; do it
ret ; done
;
#endif
;
; Set RomWBW HBIOS Diagnostic Level
;
#if (BIOS == BIOS_WBW)
;
setdl:
; On entry DE is expected to be pointing to start
; of command
call findws ; skip command
call skipws ; and skip it
or a ; set flags to check for null
jr z,showdl ; no parm, just display
call isnum ; do we have a number?
jp nz,err_invcmd ; if not, invalid
call getnum ; parse number into A
jp c,err_invcmd ; handle overflow error
;
; Set diagnostic level
ld b,BF_SYSPOKE ; HBIOS func: POKE
ld d,BID_BIOS ; BIOS bank
ld e,a ; diag level value
ld hl,HCB_LOC + HCB_DIAGLVL ; offset into HCB
rst 08 ; do it
; Fall thru to display new value
;
showdl:
; Display current diagnostic level
ld hl,str_diaglvl ; diag level tag
call pstr ; print it
ld b,BF_SYSPEEK ; HBIOS func: PEEK
ld d,BID_BIOS ; BIOS bank
ld hl,HCB_LOC + HCB_DIAGLVL ; offset into HCB
rst 08 ; do it, E := level value
ld a,e ; put in accum
call prtdecb ; print it
ret ; done
;
#endif
;
; Restart system
;
reboot:
ld hl,str_reboot ; point to message
call pstr ; print it
call ldelay ; wait for message to display
;
#if (BIOS == BIOS_WBW)
;
#if (DSKYENABLE)
ld hl,msg_boot ; point to boot message
call DSKY_SHOW ; display message
#endif
;
; cold boot system
ld b,BF_SYSRESET ; system restart
ld c,BF_SYSRES_COLD ; cold start
rst 08 ; do it, no return
#endif
;
#if (BIOS == BIOS_UNA)
; switch to rom bank 0 and jump to address 0
ld bc,$01FB ; UNA func = set bank
ld de,0 ; ROM bank 0
rst 08 ; do it
jp 0 ; jump to restart address
#endif
;
;=======================================================================
; Load and run a ROM application, IX=ROM app table entry
;=======================================================================
;
romload:
;
; Notify user
ld hl,str_load
call pstr
ld l,(ix+ra_name)
ld h,(ix+ra_name+1)
call pstr
;
#if (DSKYENABLE)
ld hl,msg_load ; point to load message
call DSKY_SHOW ; display message
#endif
;
#if (BIOS == BIOS_WBW)
;
; Copy image to it's running location
ld a,(ix+ra_bnk) ; get image source bank id
cp bid_cur ; special value?
jr nz,romload1 ; if not, continue
ld a,(bid_ldr) ; else substitute
romload1:
push af ; save source bank
ld e,a ; source bank to E
ld d,BID_USR ; dest is user bank
ld l,(ix+ra_siz) ; HL := image size
ld h,(ix+ra_siz+1) ; ...
ld b,BF_SYSSETCPY ; HBIOS func: setup bank copy
rst 08 ; do it
ld a,'.' ; dot character
call cout ; show progress
ld e,(ix+ra_dest) ; DE := run dest adr
ld d,(ix+ra_dest+1) ; ...
ld l,(ix+ra_src) ; HL := image source adr
ld h,(ix+ra_src+1) ; ...
ld b,BF_SYSBNKCPY ; HBIOS func: bank copy
rst 08 ; do it
ld a,'.' ; dot character
call cout ; show progress
;
; Record boot information
pop af ; recover source bank
ld l,a ; L := source bank
ld de,$0000 ; boot vol=0, slice=0
ld b,BF_SYSSET ; HBIOS func: system set
ld c,BF_SYSSET_BOOTINFO ; BBIOS subfunc: boot info
rst 08 ; do it
ld a,'.' ; dot character
call cout ; show progress
;
#endif
;
#if (BIOS == BIOS_UNA)
;
; Note: UNA has no interbank memory copy, so we can only load
; images from the current bank. We switch to the original bank
; use a simple ldir to relocate the image, then switch back to the
; user bank to launch. This will only work if the images are in
; the lower 32K and the relocation adr is in the upper 32K.
;
; Switch to original bank
ld bc,$01FB ; UNA func: set bank
ld de,(bid_ldr) ; select user bank
rst 08 ; do it
ld a,'.' ; dot character
call cout ; show progress
;
; Copy image to running location
ld l,(ix+ra_src) ; HL := image source adr
ld h,(ix+ra_src+1) ; ...
ld e,(ix+ra_dest) ; DE := run dest adr
ld d,(ix+ra_dest+1) ; ...
ld c,(ix+ra_siz) ; BC := image size
ld b,(ix+ra_siz+1) ; ...
ldir ; copy image
ld a,'.' ; dot character
call cout ; show progress
;
; Switch back to user bank
ld bc,$01FB ; UNA func: set bank
ld de,(bid_ldr) ; select user bank
rst 08 ; do it
ld a,'.' ; dot character
call cout ; show progress
;
; Record boot information
ld de,(bid_ldr) ; original bank
ld l,$01 ; encoded boot slice/unit
ld bc,$01FC ; UNA func: set bootstrap hist
rst 08 ; call una
;
#endif
;
#if (DSKYENABLE)
ld hl,msg_go ; point to go message
call DSKY_SHOW ; display message
#endif
;
ld l,(ix+ra_ent) ; HL := app entry address
ld h,(ix+ra_ent+1) ; ...
jp (hl) ; go
;
;=======================================================================
; Boot disk unit/slice
;=======================================================================
;
diskboot:
;
; Notify user
ld hl,str_boot1
call pstr
ld a,(bootunit)
call prtdecb
ld hl,str_boot2
call pstr
ld a,(bootslice)
call prtdecb
;
#if (DSKYENABLE)
ld hl,msg_load ; point to load message
call DSKY_SHOW ; display message
#endif
;
#if (BIOS == BIOS_WBW)
;
; Check that drive actually exists
ld b,BF_SYSGET ; HBIOS func: sys get
ld c,BF_SYSGET_DIOCNT ; HBIOS sub-func: disk count
rst 08 ; do it, E=disk count
ld a,(bootunit) ; get boot disk unit
cp e ; compare to count
jp nc,err_nodisk ; handle no disk err
;
; Sense media
ld a,(bootunit) ; get boot disk unit
ld c,a ; put in C for func call
ld b,BF_DIOMEDIA ; HBIOS func: media
ld e,1 ; enable media check/discovery
rst 08 ; do it
jp nz,err_diskio ; handle error
ld a,e ; media id to A
ld (mediaid),a ; save media id
;
; If non-zero slice requested, confirm device can handle it
ld a,(bootslice) ; get slice
or a ; set flags
jr z,diskboot1 ; slice 0, skip slice check
ld a,(bootunit) ; get disk unit
ld c,a ; put in C for func call
ld b,BF_DIODEVICE ; HBIOS func: device info
rst 08 ; do it
ld a,d ; device type to A
cp DIODEV_IDE ; IDE is max slice device type
jp c,err_noslice ; no such slice, handle err
;
#endif
;
#if (BIOS == BIOS_UNA)
;
; Check that drive actually exists
ld a,(bootunit) ; get disk unit to boot
ld b,a ; put in B for func call
ld c,$48 ; UNA func: get disk type
rst 08 ; call UNA, B preserved
jp nz,err_nodisk ; handle error if no such disk
;
; If non-zero slice requested, confirm device can handle it
ld a,(bootslice) ; get slice
or a ; set flags
jr z,diskboot0 ; slice 0, skip slice check
ld a,d ; disk type to A
cp $41 ; IDE?
jr z,diskboot0 ; if so, OK
cp $42 ; PPIDE?
jr z,diskboot0 ; if so, OK
cp $43 ; SD?
jr z,diskboot0 ; if so, OK
cp $44 ; DSD?
jr z,diskboot0 ; if so, OK
jp err_noslice ; no such slice, handle err
;
diskboot0:
; Below is wrong. It assumes we are booting from a hard
; disk, but it could also be a RAM/ROM disk. However, it is
; not actually possible to boot from those, so not gonna
; worry about this.
ld a,4 ; assume legacy hard disk
ld (mediaid),a ; save media id
;
#endif
;
diskboot1:
; Initialize working LBA value
ld hl,0 ; zero HL
ld (lba),hl ; init
ld (lba+2),hl ; ... LBA
;
; Set legacy sectors per slice
ld hl,16640 ; legacy sectors per slice
ld (sps),hl ; save it
;
; Check for hard disk
ld a,(mediaid) ; load media id
cp 4 ; legacy hard disk?
jr nz,diskboot8 ; if not hd, no part table
;
; Attempt to read MBR
ld de,0 ; MBR is at
ld hl,0 ; ... first sector
ld bc,bl_mbrsec ; read into MBR buffer
ld (dma),bc ; save
ld b,1 ; one sector
ld a,(bootunit) ; get bootunit
ld c,a ; put in C
call diskread ; do it
ret nz ; abort on error
;
; Check signature
ld hl,(bl_mbrsec+$1FE) ; get signature
ld a,l ; first byte
cp $55 ; should be $55
jr nz,diskboot4 ; if not, no part table
ld a,h ; second byte
cp $AA ; should be $AA
jr nz,diskboot4 ; if not, no part table
;
; Try to find our entry in part table and capture lba offset
ld b,4 ; four entries in part table
ld hl,bl_mbrsec+$1BE+4 ; offset of first entry part type
diskboot2:
ld a,(hl) ; get part type
cp $2E ; cp/m partition?
jr z,diskboot3 ; cool, grab the lba offset
ld de,16 ; part table entry size
add hl,de ; bump to next entry part type
djnz diskboot2 ; loop thru table
jr diskboot4 ; too bad, no cp/m partition
;
diskboot3:
; Capture the starting LBA of the CP/M partition we found
ld de,4 ; LBA is 4 bytes after part type
add hl,de ; point to it
ld de,lba ; loc to store lba offset
ld bc,4 ; 4 bytes (32 bits)
ldir ; copy it
; If boot from partition, use new sectors per slice value
ld hl,16384 ; new sectors per slice
ld (sps),hl ; save it
;
diskboot4:
; Add slice offset
ld a,(bootslice) ; get boot slice, A is loop cnt
ld hl,(lba) ; set DE:HL
ld de,(lba+2) ; ... to starting LBA
ld bc,(sps) ; sectors per slice
diskboot5:
or a ; set flags to check loop ctr
jr z,diskboot7 ; done if counter exhausted
add hl,bc ; add one slice to low word
jr nc,diskboot6 ; check for carry
inc de ; if so, bump high word
diskboot6:
dec a ; dec loop downcounter
jr diskboot5 ; and loop
;
diskboot7:
ld (lba),hl ; update lba, low word
ld (lba+2),de ; update lba, high word
;
diskboot8:
; Note that we could be coming from diskboot1!
ld hl,str_ldsec ; display prefix
call pstr ; do it
ld hl,(lba) ; recover lba loword
ld de,(lba+2) ; recover lba hiword
call prthex32 ; display starting sector
call pdot ; show progress
;
; Read boot info sector, third sector
ld bc,2 ; sector offset
add hl,bc ; add to LBA value low word
jr nc,diskboot9 ; check for carry
inc de ; if so, bump high word
diskboot9:
ld bc,bl_infosec ; read buffer
ld (dma),bc ; save
ld a,(bootunit) ; disk unit to read
ld c,a ; put in C
ld b,1 ; one sector
call diskread ; do it
ret nz ; abort on error
call pdot ; show progress
;
; Check signature
ld de,(bb_sig) ; get signature read
ld a,$A5 ; expected value of first byte
cp d ; compare
jp nz,err_sig ; handle error
ld a,$5A ; expected value of second byte
cp e ; compare
jp nz,err_sig ; handle error
call pdot ; show progress
;
; Print disk boot info
; Volume "xxxxxxx" (0xXXXX-0xXXXX, entry @ 0xXXXX)
ld hl,str_binfo1 ; load string
call pstr ; print
push hl ; save string ptr
ld hl,bb_label ; point to label
call pvol ; print it
pop hl ; restore string ptr
call pstr ; print
push hl ; save string ptr
ld bc,(bb_cpmloc) ; get load loc
call prthexword ; print it
pop hl ; restore string ptr
call pstr ; print
push hl ; save string ptr
ld bc,(bb_cpmend) ; get load end
call prthexword ; print it
pop hl ; restore string ptr
call pstr ; print
push hl ; save string ptr
ld bc,(bb_cpment) ; get load end
call prthexword ; print it
pop hl ; restore string ptr
call pstr ; print
;
; Compute number of sectors to load
ld hl,(bb_cpmend) ; hl := end
ld de,(bb_cpmloc) ; de := start
or a ; clear carry
sbc hl,de ; hl := length to load
; If load length is not a multiple of sector size (512)
; we need to round up to get everything loaded!
ld de,511 ; 1 less than sector size
add hl,de ; ... and roundup
ld a,h ; determine 512 byte sector count
rra ; ... by dividing msb by two
ld (loadcnt),a ; ... and save it
call pdot ; show progress
;
; Start OS load at sector 3
ld hl,(lba) ; low word of saved LBA
ld de,(lba+2) ; high word of saved LBA
ld bc,3 ; offset for sector 3
add hl,bc ; apply it
jr nc,diskboot10 ; check for carry
inc de ; bump high word if so
diskboot10:
ld bc,(bb_cpmloc) ; load address
ld (dma),bc ; and save it
ld a,(loadcnt) ; get sectors to read
ld b,a ; put in B
ld a,(bootunit) ; get boot disk unit
ld c,a ; put in C
call diskread ; read image
ret nz ; abort on error
call pdot ; show progress
;
#if (BIOS == BIOS_WBW)
;
; Record boot unit/slice
ld b,BF_SYSSET ; hb func: set hbios parameter
ld c,BF_SYSSET_BOOTINFO ; hb subfunc: set boot info
ld a,(bid_ldr) ; original bank is boot bank
ld l,a ; ... and save as boot bank
ld a,(bootunit) ; load boot unit
ld d,a ; save in D
ld a,(bootslice) ; load boot slice
ld e,a ; save in E
rst 08
jp nz,err_api ; handle errors
;
#endif
;
#if (BIOS == BIOS_UNA)
;
; Record boot unit/slice
; UNA provides only a single byte to record the boot unit
; so we encode the unit/slice into one byte by using the
; high nibble for unit and low nibble for slice.
ld de,-1 ; boot rom page, -1 for n/a
ld a,(bootslice) ; get boot slice
and $0F ; 4 bits only
rlca ; rotate to high bits
rlca ; ...
rlca ; ...
rlca ; ...
ld l,a ; put in L
ld a,(bootunit) ; get boot disk unit
and $0F ; 4 bits only
or l ; combine
ld l,a ; back to L
ld bc,$01FC ; UNA func: set bootstrap hist
rst 08 ; call UNA
jp nz,err_api ; handle error
;
#endif
;
call pdot ; show progress
;
#if (DSKYENABLE)
ld hl,msg_go ; point to go message
call DSKY_SHOW ; display message
#endif
;
; Jump to entry vector
ld hl,(bb_cpment) ; get entry vector
jp (hl) ; and go there
;
; Read disk sector(s)
; DE:HL is LBA, B is sector count, C is disk unit
;
diskread:
;
#if (BIOS == BIOS_UNA)
;
; Seek to requested sector in DE:HL
push bc ; save unit and count
ld b,c ; unit to read in B
ld c,$41 ; UNA func: set lba
rst 08 ; set lba
pop bc ; recover unit and count
jp nz,err_api ; handle error
;
; Read sector(s) into buffer
ld l,b ; sectors to read
ld b,c ; unit to read in B
ld c,$42 ; UNA func: read sectors
ld de,(dma) ; dest for read
rst 08 ; do read
jp nz,err_diskio ; handle error
xor a ; signal success
ret ; and done
;
#endif
;
#if (BIOS == BIOS_WBW)
;
; Seek to requested sector in DE:HL
push bc ; save unit & count
set 7,d ; set LBA access flag
ld b,BF_DIOSEEK ; HBIOS func: seek
rst 08 ; do it
pop bc ; recover unit & count
jp nz,err_diskio ; handle error
;
; Read sector(s) into buffer
ld e,b ; transfer count
ld b,BF_DIOREAD ; HBIOS func: disk read
ld hl,(dma) ; read into info sec buffer
ld d,BID_USR ; user bank
rst 08 ; do it
jp nz,err_diskio ; handle error
xor a ; signal success
ret ; and done
;
#endif
;
;=======================================================================
; Utility functions
;=======================================================================
;
; Clear LEDs
;
clrled:
#if (BIOS == BIOS_WBW)
#if (DIAGENABLE)
xor a ; zero accum
out (DIAGPORT),a ; clear diag leds
#endif
#if (LEDENABLE)
#if (LEDMODE == LEDMODE_STD)
ld a,$FF ; led is inverted
out (LEDPORT),a ; clear led
#endif
#if (LEDMODE == LEDMODE_RTC)
; Bits 0 and 1 of the RTC latch are for the LEDs.
ld a,(HB_RTCVAL)
and ~%00000011
out (RTCIO),a ; clear led
ld (HB_RTCVAL),a
#endif
#endif
#endif
ret
;
; Print string at HL on console, null terminated
;
pstr:
ld a,(hl) ; get next character
or a ; set flags
inc hl ; bump pointer regardless
ret z ; done if null
call cout ; display character
jr pstr ; loop till done
;
; Print volume label string at HL, '$' terminated, 16 chars max
;
pvol:
ld b,16 ; init max char downcounter
pvol1:
ld a,(hl) ; get next character
cp '$' ; set flags
inc hl ; bump pointer regardless
ret z ; done if null
call cout ; display character
djnz pvol1 ; loop till done
ret ; hit max of 16 chars
;
; Start a newline on console (cr/lf)
;
nl2:
call nl ; double newline
nl:
ld a,cr ; cr
call cout ; send it
ld a,lf ; lf
jp cout ; send it and return
;
; Print a dot on console
;
pdot:
push af
ld a,'.'
call cout
pop af
ret
;
; Read a string on the console
;
; Uses address $0080 in page zero for buffer
; Input is zero terminated
;
rdln:
ld de,cmdbuf ; init buffer address ptr
rdln_nxt:
call cin ; get a character
cp bs ; backspace?
jr z,rdln_bs ; handle it if so
cp cr ; return?
jr z,rdln_cr ; handle it if so
;
; check for non-printing characters
cp ' ' ; first printable is space char
jr c,rdln_bel ; too low, beep and loop
cp '~'+1 ; last printable char
jr nc,rdln_bel ; too high, beep and loop
;
; need to check for buffer overflow here!!!
ld hl,cmdbuf+cmdmax ; max cmd length
or a ; clear carry
sbc hl,de ; test for max
jr z,rdln_bel ; at max, beep and loop
;
; good to go, echo and store character
call cout ; echo character input
ld (de),a ; save in buffer
inc de ; inc buffer ptr
jr rdln_nxt ; loop till done
;
rdln_bs:
ld hl,cmdbuf ; start of buffer
or a ; clear carry
sbc hl,de ; subtract from cur buf ptr
jr z,rdln_bel ; at buf start, just beep
ld hl,str_bs ; backspace sequence
call pstr ; send it
dec de ; backup buffer pointer
jr rdln_nxt ; and loop
;
rdln_bel:
ld a,bel ; Bell characters
call cout ; send it
jr rdln_nxt ; and loop
;
rdln_cr:
xor a ; null to A
ld (de),a ; store terminator
ret ; and return
;
; Find next whitespace character at buffer adr in DE, returns with first
; whitespace character in A.
;
findws:
ld a,(de) ; get next char
or a ; check for eol
ret z ; done if so
cp ' ' ; blank?
ret z ; nope, done
inc de ; bump buffer pointer
jr findws ; and loop
;
; Skip whitespace at buffer adr in DE, returns with first
; non-whitespace character in A.
;
skipws:
ld a,(de) ; get next char
or a ; check for eol
ret z ; done if so
cp ' ' ; blank?
ret nz ; nope, done
inc de ; bump buffer pointer
jr skipws ; and loop
;
; Uppercase character in A
;
upcase:
cp 'a' ; below 'a'?
ret c ; if so, nothing to do
cp 'z'+1 ; above 'z'?
ret nc ; if so, nothing to do
and ~$20 ; convert character to lower
ret ; done
;
; Get numeric chars at DE and convert to number returned in A
; Carry flag set on overflow
;
getnum:
ld c,0 ; C is working register
getnum1:
ld a,(de) ; get the active char
cp '0' ; compare to ascii '0'
jr c,getnum2 ; abort if below
cp '9' + 1 ; compare to ascii '9'
jr nc,getnum2 ; abort if above
;
; valid digit, add new digit to C
ld a,c ; get working value to A
rlca ; multiply by 10
ret c ; overflow, return with carry set
rlca ; ...
ret c ; overflow, return with carry set
add a,c ; ...
ret c ; overflow, return with carry set
rlca ; ...
ret c ; overflow, return with carry set
ld c,a ; back to C
ld a,(de) ; get new digit
sub '0' ; make binary
add a,c ; add in working value
ret c ; overflow, return with carry set
ld c,a ; back to C
;
inc de ; bump to next char
jr getnum1 ; loop
;
getnum2: ; return result
ld a,c ; return result in A
or a ; with flags set, CF is cleared
ret
;
; Is character in A numberic? NZ if not
;
isnum:
cp '0' ; compare to ascii '0'
jr c,isnum1 ; abort if below
cp '9' + 1 ; compare to ascii '9'
jr nc,isnum1 ; abort if above
cp a ; set Z
ret
isnum1:
or $FF ; set NZ
ret ; and done
;
; Delay 16us (cpu speed compensated) incuding call/ret invocation
; Register A and flags destroyed
; No compensation for z180 memory wait states
; There is an overhead of 3ts per invocation
; Impact of overhead diminishes as cpu speed increases
;
; cpu scaler (cpuscl) = (cpuhmz - 2) for 16us + 3ts delay
; note: cpuscl must be >= 1!
;
; example: 8mhz cpu (delay goal is 16us)
; loop = ((6 * 16) - 5) = 91ts
; total cost = (91 + 40) = 131ts
; actual delay = (131 / 8) = 16.375us
;
; --- total cost = (loop cost + 40) ts -----------------+
delay: ; 17ts (from invoking call) |
ld a,(cpuscl) ; 13ts |
; |
delay1: ; |
; --- loop = ((cpuscl * 16) - 5) ts ------------+ |
dec a ; 4ts | |
#if (BIOS == BIOS_WBW) ; | |
#if (CPUFAM == CPU_Z180) ; | |
or a ; +4ts for z180 | |
#endif ; | |
#endif ; | |
jr nz,delay1 ; 12ts (nz) / 7ts (z) | |
; ----------------------------------------------+ |
; |
ret ; 10ts (return) |
;-------------------------------------------------------+
;
; Delay 16us * DE (cpu speed compensated)
; Register DE, A, and flags destroyed
; No compensation for z180 memory wait states
; There is a 27ts overhead for call/ret per invocation
; Impact of overhead diminishes as DE and/or cpu speed increases
;
; cpu scaler (cpuscl) = (cpuhmz - 2) for 16us outer loop cost
; note: cpuscl must be > 0!
;
; Example: 8MHz cpu, DE=6250 (delay goal is .1 sec or 100,000us)
; inner loop = ((16 * 6) - 5) = 91ts
; outer loop = ((91 + 37) * 6250) = 800,000ts
; actual delay = ((800,000 + 27) / 8) = 100,003us
;
; --- total cost = (outer loop + 27) ts ------------------------+
vdelay: ; 17ts (from invoking call) |
; |
; --- outer loop = ((inner loop + 37) * de) ts ---------+ |
ld a,(cpuscl) ; 13ts | |
; | |
vdelay1: ; | |
; --- inner loop = ((cpuscl * 16) - 5) ts ------+ | |
#if (BIOS == BIOS_WBW) ; | | |
#if (CPUFAM == CPU_Z180) ; | | |
or a ; +4ts for z180 | | |
#endif ; | | |
#endif ; | | |
dec a ; 4ts | | |
jr nz,vdelay1 ; 12ts (nz) / 7ts (z) | | |
; ----------------------------------------------+ | |
; | |
dec de ; 6ts | |
#if (BIOS == BIOS_WBW) ; | | |
#if (CPUFAM == CPU_Z180) ; | |
or a ; +4ts for z180 | |
#endif ; | |
#endif ; | |
ld a,d ; 4ts | |
or e ; 4ts | |
jp nz,vdelay ; 10ts | |
;-------------------------------------------------------+ |
; |
ret ; 10ts (final return) |
;---------------------------------------------------------------+
;
; Delay about 0.5 seconds
; 500000us / 16us = 31250
;
ldelay:
push af
push de
ld de,31250
call vdelay
pop de
pop af
ret
;
; Initialize delay scaler based on operating cpu speed
; HBIOS *must* be installed and available via rst 8!!!
; CPU scaler := max(1, (phimhz - 2))
;
delay_init:
#if (BIOS == BIOS_UNA)
ld c,$F8 ; UNA bios get phi function
rst 08 ; returns speed in hz in de:hl
ld b,4 ; divide mhz in de:hl by 100000h
delay_init0:
srl d ; ... to get approx cpu speed in
rr e ; ...mhz. throw away hl, and
djnz delay_init0 ; ...right shift de by 4.
inc e ; fix up for value truncation
ld a,e ; put in a
#else
ld b,BF_SYSGET ; HBIOS func=get sys info
ld c,BF_SYSGET_CPUINFO ; HBIOS subfunc=get cpu info
rst 08 ; call HBIOS, rst 08 not yet installed
ld a,l ; put speed in mhz in accum
#endif
cp 3 ; test for <= 2 (special handling)
jr c,delay_init1 ; if <= 2, special processing
sub 2 ; adjust as required by delay functions
jr delay_init2 ; and continue
delay_init1:
ld a,1 ; use the min value of 1
delay_init2:
ld (cpuscl),a ; update cpu scaler value
ret
#if (CPUMHZ < 3)
cpuscl .db 1 ; cpu scaler must be > 0
#else
cpuscl .db CPUMHZ - 2 ; otherwise 2 less than phi mhz
#endif
;
; Print value of a in decimal with leading zero suppression
;
prtdecb:
push hl
push af
ld l,a
ld h,0
call prtdec
pop af
pop hl
ret
;
; Print value of HL in decimal with leading zero suppression
;
prtdec:
push bc
push de
push hl
ld e,'0'
ld bc,-10000
call prtdec1
ld bc,-1000
call prtdec1
ld bc,-100
call prtdec1
ld c,-10
call prtdec1
ld e,0
ld c,-1
call prtdec1
pop hl
pop de
pop bc
ret
prtdec1:
ld a,'0' - 1
prtdec2:
inc a
add hl,bc
jr c,prtdec2
sbc hl,bc
cp e
jr z,prtdec3
ld e,0
call cout
prtdec3:
ret
;
; Short delay functions. No clock speed compensation, so they
; will run longer on slower systems. The number indicates the
; number of call/ret invocations. A single call/ret is
; 27 t-states on a z80, 25 t-states on a z180.
;
; ; z80 z180
; ; ---- ----
dly64: call dly32 ; 1728 1600
dly32: call dly16 ; 864 800
dly16: call dly8 ; 432 400
dly8: call dly4 ; 216 200
dly4: call dly2 ; 108 100
dly2: call dly1 ; 54 50
dly1: ret ; 27 25
;
; Add hl,a
;
; A register is destroyed!
;
addhla:
add a,l
ld l,a
ret nc
inc h
ret
;
; Print the hex byte value in A
;
prthexbyte:
push af
push de
call hexascii
ld a,d
call cout
ld a,e
call cout
pop de
pop af
ret
;
; Print the hex word value in BC
;
prthexword:
push af
ld a,b
call prthexbyte
ld a,c
call prthexbyte
pop af
ret
;
; Print the hex dword value in DE:HL
;
prthex32:
push bc
push de
pop bc
call prthexword
push hl
pop bc
call prthexword
pop bc
ret
;
; Convert binary value in A to ASCII hex characters in DE
;
hexascii:
ld d,a
call hexconv
ld e,a
ld a,d
rlca
rlca
rlca
rlca
call hexconv
ld d,a
ret
;
; Convert low nibble of A to ASCII hex
;
hexconv:
and 0Fh ; low nibble only
add a,90h
daa
adc a,40h
daa
ret
;
;=======================================================================
; Console character I/O helper routines (registers preserved)
;=======================================================================
;
#if (BIOS == BIOS_WBW)
;
; Output character from A
;
cout:
; Save all incoming registers
push af
push bc
push de
push hl
;
; Output character to console via HBIOS
ld e,a ; output char to E
ld c,CIO_CONSOLE ; console unit to C
ld b,BF_CIOOUT ; HBIOS func: output char
rst 08 ; HBIOS outputs character
;
; Restore all registers
pop hl
pop de
pop bc
pop af
ret
;
; Input character to A
;
cin:
; Save incoming registers (AF is output)
push bc
push de
push hl
;
; Input character from console via hbios
ld c,CIO_CONSOLE ; console unit to c
ld b,BF_CIOIN ; HBIOS func: input char
rst 08 ; HBIOS reads character
ld a,e ; move character to A for return
;
; Restore registers (AF is output)
pop hl
pop de
pop bc
ret
;
; Return input status in A (0 = no char, != 0 char waiting)
;
cst:
; Save incoming registers (AF is output)
push bc
push de
push hl
;
; Get console input status via HBIOS
ld c,CIO_CONSOLE ; console unit to C
ld b,BF_CIOIST ; HBIOS func: input status
rst 08 ; HBIOS returns status in A
;
; Restore registers (AF is output)
pop hl
pop de
pop bc
ret
;
#endif
;
#if (BIOS == BIOS_UNA)
;
; Output character from A
;
cout:
; Save all incoming registers
push af
push bc
push de
push hl
;
; Output character to console via UBIOS
ld e,a
ld bc,$12
rst 08
;
; Restore all registers
pop hl
pop de
pop bc
pop af
ret
;
; Input character to A
;
cin:
; Save incoming registers (AF is output)
push bc
push de
push hl
;
; Input character from console via UBIOS
ld bc,$11
rst 08
ld a,e
;
; Restore registers (AF is output)
pop hl
pop de
pop bc
ret
;
; Return input status in A (0 = no char, != 0 char waiting)
;
cst:
; Save incoming registers (AF is output)
push bc
push de
push hl
;
; Get console input status via UBIOS
ld bc,$13
rst 08
ld a,e
or a
;
; Restore registers (AF is output)
pop hl
pop de
pop bc
ret
;
#endif
;
; Generic console I/O
;
CIN .equ cin
COUT .equ cout
CST .equ cst
;
;=======================================================================
; Device inventory display
;=======================================================================
;
; Print list of all drives (WBW)
;
#if (BIOS == BIOS_WBW)
;
prtall:
call nl ; formatting
ld b,BF_SYSGET
ld c,BF_SYSGET_DIOCNT
rst 08 ; E := disk unit count
ld b,e ; count to B
ld a,b ; count to A
or a ; set flags
ret z ; bail out if zero
ld c,0 ; init device index
;
prtall1:
ld hl,str_disk ; prefix string
call pstr ; display it
ld a,c ; index
call prtdecb ; print it
ld hl,str_on ; separator string
call pstr
push bc ; save loop control
ld b,BF_DIODEVICE ; HBIOS func: report device info
rst 08 ; call HBIOS
call prtdrv ; print it
pop bc ; restore loop control
inc c ; bump index
djnz prtall1 ; loop as needed
ret ; done
;
; Print the device info
; On input D has device type, E has device number
; Destroy no registers other than A
;
prtdrv:
push de ; preserve de
push hl ; preserve HL
ld a,d ; load device/unit
rrca ; rotate device
rrca ; ... bits
rrca ; ... into
rrca ; ... lowest 4 bits
and $0F ; isolate device bits
add a,a ; multiple by two for word table
ld hl,devtbl ; point to start of table
call addhla ; add A to HL for table entry
ld a,(hl) ; deref HL for string adr
inc hl ; ...
ld h,(hl) ; ...
ld l,a ; ...
call pstr ; print the device nmemonic
pop hl ; recover HL
pop de ; recover DE
ld a,e ; device number
call prtdecb ; print it
ld a,':' ; suffix
call cout ; print it
ret
;
devtbl: ; device table
.dw dev00, dev01, dev02, dev03
.dw dev04, dev05, dev06, dev07
.dw dev08, dev09, dev10, dev11
.dw dev12, dev13, dev14, dev15
;
devunk .db "???",0
dev00 .db "MD",0
dev01 .db "FD",0
dev02 .db "RAMF",0
dev03 .db "IDE",0
dev04 .db "ATAPI",0
dev05 .db "PPIDE",0
dev06 .db "SD",0
dev07 .db "PRPSD",0
dev08 .db "PPPSD",0
dev09 .db "HDSK",0
dev10 .equ devunk
dev11 .equ devunk
dev12 .equ devunk
dev13 .equ devunk
dev14 .equ devunk
dev15 .equ devunk
;
#endif
;
;
;
#if (BIOS == BIOS_UNA)
;
; Print list of all drives (UNA)
;
prtall:
call nl ; formatting
ld b,0 ; start with unit 0
;
prtall1: ; loop thru all units available
ld c,$48 ; UNA func: get disk type
ld l,0 ; preset unit count to zero
rst 08 ; call UNA, B preserved
ld a,l ; unit count to a
or a ; past end?
ret z ; we are done
push bc ; save unit
call prtdrv ; process the unit
pop bc ; restore unit
inc b ; next unit
jr prtall1 ; loop
;
; print the una unit info
; on input b has unit
;
prtdrv:
push bc ; save unit
push de ; save disk type
ld hl,str_disk ; prefix string
call pstr ; display it
ld a,b ; index
call prtdecb ; print it
ld a,' ' ; formatting
call cout ; do it
ld a,'=' ; formatting
call cout ; do it
ld a,' ' ; formatting
call cout ; do it
pop de ; recover disk type
ld a,d ; disk type to a
cp $40 ; ram/rom?
jr z,prtdrv1 ; handle ram/rom
ld hl,devide ; assume ide
cp $41 ; ide?
jr z,prtdrv2 ; print it
ld hl,devppide ; assume ppide
cp $42 ; ppide?
jr z,prtdrv2 ; print it
ld hl,devsd ; assume sd
cp $43 ; sd?
jr z,prtdrv2 ; print it
ld hl,devdsd ; assume dsd
cp $44 ; dsd?
jr z,prtdrv2 ; print it
ld hl,devunk ; otherwise unknown
jr prtdrv2
;
prtdrv1: ; handle ram/rom
ld c,$45 ; una func: get disk info
ld de,bl_infosec ; 512 byte buffer
rst 08 ; call una
bit 7,b ; test ram drive bit
ld hl,devrom ; assume rom
jr z,prtdrv2 ; if so, print it
ld hl,devram ; otherwise ram
jr prtdrv2 ; print it
;
prtdrv2: ; print device
pop bc ; recover unit
call pstr ; print device name
ld a,b ; unit to a
call prtdecb ; print it
ld a,':' ; device name suffix
call cout ; print it
ret ; done
;
devram .db "RAM",0
devrom .db "ROM",0
devide .db "IDE",0
devppide .db "PPIDE",0
devsd .db "SD",0
devdsd .db "DSD",0
devunk .db "UNK",0
;
#endif
;
;=======================================================================
; Error handlers
;=======================================================================
;
err_invcmd:
ld hl,str_err_invcmd
jr err
;
err_nodisk:
ld hl,str_err_nodisk
jr err
;
err_noslice:
ld hl,str_err_noslice
jr err
;
err_nocon:
ld hl,str_err_nocon
jr err
;
err_diskio:
ld hl,str_err_diskio
jr err
;
err_sig:
ld hl,str_err_sig
jr err
;
err_api:
ld hl,str_err_api
jr err
;
err:
push hl
; ld a,(acmd_act) ; get auto cmd active flag
; or a ; set flags
; call nz,showcmd ; if auto cmd act, show cmd
; ld a,bel ; bel character
; call cout ; beep
ld hl,str_err_prefix
call pstr
pop hl
jp pstr
;
str_err_prefix .db bel,"\r\n\r\n*** ",0
str_err_invcmd .db "Invalid command",0
str_err_nodisk .db "Disk unit not available",0
str_err_noslice .db "Disk unit does not support slices",0
str_err_nocon .db "Invalid character unit specification",0
str_err_diskio .db "Disk I/O failure",0
str_err_sig .db "No system image on disk",0
str_err_api .db "Unexpected hardware BIOS API failure",0
;
;=======================================================================
; Includes
;=======================================================================
;
#if (DSKYENABLE)
#define DSKY_KBD
#if (DSKYMODE == DSKYMODE_V1)
VDELAY .equ vdelay
DLY2 .equ dly2
#include "dsky.asm"
#endif
#if (DSKYMODE == DSKYMODE_NG)
#include "dskyng.asm"
#endif
#endif
;
;=======================================================================
; Working data storage (initialized)
;=======================================================================
;
acmd .db BOOT_DEFAULT ; auto cmd string
.db 0
acmd_len .equ $ - acmd ; len of auto cmd
acmd_act .db $FF ; auto cmd active
acmd_to .dw BOOT_TIMEOUT ; auto cmd timeout
;
;=======================================================================
; Strings
;=======================================================================
;
str_banner .db PLATFORM_NAME," Boot Loader",0
str_autoboot .db "AutoBoot: ",0
str_prompt .db "Boot [H=Help]: ",0
str_bs .db bs,' ',bs,0
str_reboot .db "\r\n\r\nRestarting System...",0
str_newcon .db "\r\n\r\n Console on Unit #",0
str_chspeed .db "\r\n\r\n Change speed now. Press a key to resume.",0
str_applst .db "\r\n\r\nROM Applications:",0
str_devlst .db "\r\n\r\nDisk Devices:",0
str_invcmd .db "\r\n\r\n*** Invalid Command ***",bel,0
str_load .db "\r\n\r\nLoading ",0
str_disk .db "\r\n Disk Unit ",0
str_on .db " on ",0
str_boot1 .db "\r\n\r\nBooting Disk Unit ",0
str_boot2 .db ", Slice ",0
str_binfo1 .db "\r\n\r\nVolume ",$22,0
str_binfo2 .db $22," [0x",0
str_binfo3 .db "-0x",0
str_binfo4 .db ", entry @ 0x",0
str_binfo5 .db "]",0
str_ldsec .db ", Sector 0x",0
str_diaglvl .db "\r\n\r\nHBIOS Diagnostic Level: ",0
;
str_help .db "\r\n"
.db "\r\n L - List ROM Applications"
.db "\r\n D - Disk Device Inventory"
.db "\r\n R - Reboot System"
#if (BIOS == BIOS_WBW)
.db "\r\n I <u> [<c>] - Set Console Interface/Baud code"
.db "\r\n V [<n>] - View/Set HBIOS Diagnostic Verbosity"
#endif
.db "\r\n <u>[.<s>] - Boot Disk Unit/Slice"
.db 0
;
#if (DSKYENABLE)
#if (DSKYMODE == DSKYMODE_V1)
msg_sel .db $7f,$1d,$1d,$0f,$6c,$00,$00,$00 ; "boot? "
msg_boot .db $7f,$1d,$1d,$0f,$80,$80,$80,$00 ; "boot... "
msg_load .db $0b,$1d,$7d,$3d,$80,$80,$80,$00 ; "load... "
msg_go .db $5b,$1d,$80,$80,$80,$00,$00,$00 ; "go... "
#endif
#if (DSKYMODE == DSKYMODE_NG)
msg_sel .db $7f,$5c,$5c,$78,$53,$00,$00,$00 ; "boot? "
msg_boot .db $7f,$5c,$5c,$78,$80,$80,$80,$00 ; "boot... "
msg_load .db $38,$5c,$5f,$5e,$80,$80,$80,$00 ; "load... "
msg_go .db $3d,$5c,$80,$80,$80,$00,$00,$00 ; "go... "
#endif
#endif
;
;=======================================================================
; ROM Application Table
;=======================================================================
;
; Macro ra_ent:
;
; WBW UNA
; p1: Application name string adr word (+0) word (+0)
; p2: Console keyboard selection key byte (+2) byte (+2)
; p3: DSKY selection key byte (+3) byte (+3)
; p4: Application image bank byte (+4) word (+4)
; p5: Application image source address word (+5) word (+6)
; p6: Application image dest load address word (+7) word (+8)
; p7: Application image size word (+9) word (+10)
; p8: Application entry address word (+11) word (+12)
;
#if (BIOS == BIOS_WBW)
ra_name .equ 0
ra_conkey .equ 2
ra_dskykey .equ 3
ra_bnk .equ 4
ra_src .equ 5
ra_dest .equ 7
ra_siz .equ 9
ra_ent .equ 11
#endif
;
#if (BIOS == BIOS_UNA)
ra_name .equ 0
ra_conkey .equ 2
ra_dskykey .equ 3
ra_bnk .equ 4
ra_src .equ 6
ra_dest .equ 8
ra_siz .equ 10
ra_ent .equ 12
#endif
;
#define ra_ent(p1,p2,p3,p4,p5,p6,p7,p8) \
#defcont .dw p1 \
#defcont .db p2 \
#if (DSKYENABLE)
#defcont .db p3 \
#else
#defcont .db $FF \
#endif
#if (BIOS == BIOS_WBW)
#defcont .db p4 \
#endif
#if (BIOS == BIOS_UNA)
#defcont .dw p4 \
#endif
#defcont .dw p5 \
#defcont .dw p6 \
#defcont .dw p7 \
#defcont .dw p8
;
; Note: The formatting of the following is critical. TASM does not pass
; macro arguments well. Ensure std.asm holds the definitions for *_LOC,
; *_SIZ *_END and any code generated which does not include std.asm is
; synced.
;
; Note: The loadable ROM images are placed in ROM banks BID_IMG0 and
; BID_IMG1. However, RomWBW supports a mechanism to load a complete
; new system dynamically as a runnable application (see appboot and
; imgboot in hbios.asm). In this case, the contents of BID_IMG0 will
; be pre-loaded into the currently executing ram bank thereby allowing
; those images to be dynamically loaded as well. To support this
; concept, a pseudo-bank called bid_cur is used to specify the images
; normally found in BID_IMG0. In romload, this special value will cause
; the associated image to be loaded from the currently executing bank
; which will be correct regardless of the load mode. Images in other
; banks (BID_IMG1) will always be loaded directly from ROM.
;
ra_tbl:
;
; Name Key Dsky Bank Src Dest Size Entry
; --------- ------- ----- -------- ----- ------- ------- ----------
ra_ent(str_mon, 'M', KY_CL, BID_IMG0, MON_IMGLOC, MON_LOC, MON_SIZ, MON_SERIAL)
ra_entsiz .equ $ - ra_tbl
ra_ent(str_zsys, 'Z', KY_FW, BID_IMG0, ZSYS_IMGLOC, CPM_LOC, CPM_SIZ, CPM_ENT)
ra_ent(str_cpm22, 'C', KY_BK, BID_IMG0, CPM_IMGLOC, CPM_LOC, CPM_SIZ, CPM_ENT)
#if (BIOS == BIOS_WBW)
ra_ent(str_fth, 'F', KY_EX, BID_IMG1, FTH_IMGLOC, FTH_LOC, FTH_SIZ, FTH_LOC)
ra_ent(str_bas, 'B', KY_DE, BID_IMG1, BAS_IMGLOC, BAS_LOC, BAS_SIZ, BAS_LOC)
ra_ent(str_tbas, 'T', KY_EN, BID_IMG1, TBC_IMGLOC, TBC_LOC, TBC_SIZ, TBC_LOC)
ra_ent(str_play, 'P', $FF, BID_IMG1, GAM_IMGLOC, GAM_LOC, GAM_SIZ, GAM_LOC)
ra_ent(str_egg, 'E'+$80, $FF, BID_IMG1, EGG_IMGLOC, EGG_LOC, EGG_SIZ, EGG_LOC)
ra_ent(str_net, 'N', $FF, BID_IMG1, NET_IMGLOC, NET_LOC, NET_SIZ, NET_LOC)
ra_ent(str_upd, 'X', $FF, BID_IMG1, UPD_IMGLOC, UPD_LOC, UPD_SIZ, UPD_LOC)
ra_ent(str_user, 'U', $FF, BID_IMG1, USR_IMGLOC, USR_LOC, USR_SIZ, USR_LOC)
#endif
#if (DSKYENABLE)
ra_ent(str_dsky, 'Y'+$80, KY_GO, BID_IMG0, MON_IMGLOC, MON_LOC, MON_SIZ, MON_DSKY)
#endif
.dw 0 ; table terminator
;
ra_tbl_app:
;
; Name Key Dsky Bank Src Dest Size Entry
; --------- ------- ----- -------- ----- ------- ------- ----------
ra_ent(str_mon, 'M', KY_CL, bid_cur, MON_IMGLOC, MON_LOC, MON_SIZ, MON_SERIAL)
ra_ent(str_zsys, 'Z', KY_FW, bid_cur, ZSYS_IMGLOC, CPM_LOC, CPM_SIZ, CPM_ENT)
#if (DSKYENABLE)
ra_ent(str_dsky, 'Y'+$80, KY_GO, bid_cur, MON_IMGLOC, MON_LOC, MON_SIZ, MON_DSKY)
#endif
.dw 0 ; table terminator
;
str_mon .db "Monitor",0
str_cpm22 .db "CP/M 2.2",0
str_zsys .db "Z-System",0
str_dsky .db "DSKY Monitor",0
str_fth .db "Forth",0
str_bas .db "BASIC",0
str_tbas .db "Tasty BASIC",0
str_play .db "Play a Game",0
str_upd .db "XModem Flash Updater",0
str_user .db "User App",0
str_egg .db "",0
str_net .db "Network Boot",0
newcon .db 0
newspeed .db 0
;
;=======================================================================
; Working data storage
;=======================================================================
;
.fill 64,0 ; 32 level stack
bl_stack .equ $ ; ... top is here
;
#if (BIOS == BIOS_WBW)
bid_ldr .db 0 ; bank at startup
#endif
#if (BIOS == BIOS_UNA)
bid_ldr .dw 0 ; bank at startup
#endif
;
lba .fill 4,0 ; lba for load, dword
dma .dw 0 ; address for load
sps .dw 0 ; sectors per slice
mediaid .db 0 ; media id
;
ra_tbl_loc .dw 0 ; points to active ra_tbl
bootunit .db 0 ; boot disk unit
bootslice .db 0 ; boot disk slice
loadcnt .db 0 ; num disk sectors to load
;
;=======================================================================
; Pad remainder of ROM Loader
;=======================================================================
;
slack .equ ($8000 + LDR_SIZ - $)
.fill slack
;
.echo "LOADER space remaining: "
.echo slack
.echo " bytes.\n"
;
;
;=======================================================================
; Disk buffers (uninitialized)
;=======================================================================
;
; Master Boot Record sector is read into area below.
; Note that this buffer is actually shared with bl_infosec
; buffer below.
;
bl_mbrsec .equ $
;
; Boot info sector is read into area below.
; The third sector of a disk device is reserved for boot info.
;
bl_infosec .equ $
.ds (512 - 128)
bb_metabuf .equ $
bb_sig .ds 2 ; signature (0xA55A if set)
bb_platform .ds 1 ; formatting platform
bb_device .ds 1 ; formatting device
bb_formatter .ds 8 ; formatting program
bb_drive .ds 1 ; physical disk drive #
bb_lu .ds 1 ; logical unit (lu)
.ds 1 ; msb of lu, now deprecated
.ds (bb_metabuf + 128) - $ - 32
bb_protect .ds 1 ; write protect boolean
bb_updates .ds 2 ; update counter
bb_rmj .ds 1 ; rmj major version number
bb_rmn .ds 1 ; rmn minor version number
bb_rup .ds 1 ; rup update number
bb_rtp .ds 1 ; rtp patch level
bb_label .ds 16 ; 16 character drive label
bb_term .ds 1 ; label terminator ('$')
bb_biloc .ds 2 ; loc to patch boot drive info
bb_cpmloc .ds 2 ; final ram dest for cpm/cbios
bb_cpmend .ds 2 ; end address for load
bb_cpment .ds 2 ; CP/M entry point (cbios boot)
;
.end
|
checkfeatures:
mov eax, [basicid] ; Is the CPU compatible with this instruction?
cmp eax, 1
jge features
jmp main_loop
features:
mov eax, 1
cpuid
mov di, 24000
mov esi, 2
mov eax, edx
mov edx, 0
features_loop:
div esi
mov [di], dx
inc di
cmp di, 24032
jge near features2
jmp features_loop
features2:
mov eax, ecx
mov edx, 0
features_loop2:
div si
mov [di], dx
inc di
cmp di, 24064
jge near features_output
jmp features_loop2
features_output:
mov di, 24000
mov cx, feature00
mov dl, 0
mov dh, 1
features_loop_output:
call os_move_cursor
mov si, cx
call os_print_string
mov ax, [di]
cmp ax, 1
je near feature_enabled
mov si, disabled
call os_print_string
feature_loop_continue:
inc di
inc dh
add cx, 14
cmp di, 24064
je near feature_end
cmp dh, 24
je near feature_loop_nextcolumn
jmp features_loop_output
feature_enabled:
mov si, enabled
call os_print_string
jmp feature_loop_continue
feature_loop_nextcolumn:
add dl, 26
mov dh, 1
jmp features_loop_output
feature_end:
call os_wait_for_key
jmp main_loop
feature00 db 'fpu: ', 0
feature01 db 'vme: ', 0
feature02 db 'de: ', 0
feature03 db 'pse: ', 0
feature04 db 'tsc: ', 0
feature05 db 'msr: ', 0
feature06 db 'pae: ', 0
feature07 db 'mce: ', 0
feature08 db 'cx8: ', 0
feature09 db 'apic: ', 0
feature10 db '<reserved> ', 0
feature11 db 'sep: ', 0
feature12 db 'mtrr: ', 0
feature13 db 'pge: ', 0
feature14 db 'mca: ', 0
feature15 db 'cmov: ', 0
feature16 db 'pat: ', 0
feature17 db 'pse-36: ', 0
feature18 db 'psn: ', 0
feature19 db 'clfsh: ', 0
feature20 db '<reserved> ', 0
feature21 db 'ds: ', 0
feature22 db 'acpi: ', 0
feature23 db 'mmx: ', 0
feature24 db 'fxsr: ', 0
feature25 db 'sse: ', 0
feature26 db 'sse2: ', 0
feature27 db 'ss: ', 0
feature28 db 'htt: ', 0
feature29 db 'tm: ', 0
feature30 db 'ia64: ', 0
feature31 db 'pbe: ', 0
feature32 db 'sse3: ', 0
feature33 db 'pclmulqdq: ', 0
feature34 db 'dtes64: ', 0
feature35 db 'monitor: ', 0
feature36 db 'ds-cpl: ', 0
feature37 db 'vmx: ', 0
feature38 db 'smx: ', 0
feature39 db 'est: ', 0
feature40 db 'tm2: ', 0
feature41 db 'ssse3: ', 0
feature42 db 'cnxt-id: ', 0
feature43 db 'sdbg: ', 0
feature44 db 'fma: ', 0
feature45 db 'cx16: ', 0
feature46 db 'xtpr: ', 0
feature47 db 'pdcm: ', 0
feature48 db '<reserved> ', 0
feature49 db 'pcid: ', 0
feature50 db 'dca: ', 0
feature51 db 'sse4.1: ', 0
feature52 db 'sse4.2: ', 0
feature53 db 'x2apic: ', 0
feature54 db 'movbe: ', 0
feature55 db 'popcnt: ', 0
feature56 db 'tsx-deadline:', 0
feature57 db 'aes: ', 0
feature58 db 'xsave: ', 0
feature59 db 'osxsave: ', 0
feature60 db 'avx: ', 0
feature61 db 'f16c: ', 0
feature62 db 'rdrnd: ', 0
feature63 db 'hypervisor: ', 0
|
db DEX_RATICATE ; pokedex id
db 75 ; base hp
db 81 ; base attack
db 70 ; base defense
db 97 ; base speed
db 50 ; base special
db DARK ; species type 1
db DARK ; species type 2
db 80 ; catch rate
db 90 ; base exp yield
INCBIN "pic/ymon/raticate.pic",0,1 ; 66, sprite dimensions
dw RaticatePicFront
dw RaticatePicBack
; attacks known at lvl 0
db TACKLE
db TAIL_WHIP
db QUICK_ATTACK
db 0
db 0 ; growth rate
; learnset
tmlearn 6,7,8
tmlearn 9,10,11,12,13,14,15,16
tmlearn 20,24
tmlearn 25,28,31,32
tmlearn 34,39,40
tmlearn 44
tmlearn 50,51
db BANK(RaticatePicFront)
|
// Copyright 2015 the V8 project authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.
#include "src/compiler/code-generator.h"
#include "src/ast/scopes.h"
#include "src/compiler/code-generator-impl.h"
#include "src/compiler/gap-resolver.h"
#include "src/compiler/node-matchers.h"
#include "src/compiler/osr.h"
#include "src/s390/macro-assembler-s390.h"
namespace v8 {
namespace internal {
namespace compiler {
#define __ masm()->
#define kScratchReg ip
// Adds S390-specific methods to convert InstructionOperands.
class S390OperandConverter final : public InstructionOperandConverter {
public:
S390OperandConverter(CodeGenerator* gen, Instruction* instr)
: InstructionOperandConverter(gen, instr) {}
size_t OutputCount() { return instr_->OutputCount(); }
bool CompareLogical() const {
switch (instr_->flags_condition()) {
case kUnsignedLessThan:
case kUnsignedGreaterThanOrEqual:
case kUnsignedLessThanOrEqual:
case kUnsignedGreaterThan:
return true;
default:
return false;
}
UNREACHABLE();
return false;
}
Operand InputImmediate(size_t index) {
Constant constant = ToConstant(instr_->InputAt(index));
switch (constant.type()) {
case Constant::kInt32:
return Operand(constant.ToInt32());
case Constant::kFloat32:
return Operand(
isolate()->factory()->NewNumber(constant.ToFloat32(), TENURED));
case Constant::kFloat64:
return Operand(
isolate()->factory()->NewNumber(constant.ToFloat64(), TENURED));
case Constant::kInt64:
#if V8_TARGET_ARCH_S390X
return Operand(constant.ToInt64());
#endif
case Constant::kExternalReference:
case Constant::kHeapObject:
case Constant::kRpoNumber:
break;
}
UNREACHABLE();
return Operand::Zero();
}
MemOperand MemoryOperand(AddressingMode* mode, size_t* first_index) {
const size_t index = *first_index;
if (mode) *mode = AddressingModeField::decode(instr_->opcode());
switch (AddressingModeField::decode(instr_->opcode())) {
case kMode_None:
break;
case kMode_MR:
*first_index += 1;
return MemOperand(InputRegister(index + 0), 0);
case kMode_MRI:
*first_index += 2;
return MemOperand(InputRegister(index + 0), InputInt32(index + 1));
case kMode_MRR:
*first_index += 2;
return MemOperand(InputRegister(index + 0), InputRegister(index + 1));
case kMode_MRRI:
*first_index += 3;
return MemOperand(InputRegister(index + 0), InputRegister(index + 1),
InputInt32(index + 2));
}
UNREACHABLE();
return MemOperand(r0);
}
MemOperand MemoryOperand(AddressingMode* mode = NULL,
size_t first_index = 0) {
return MemoryOperand(mode, &first_index);
}
MemOperand ToMemOperand(InstructionOperand* op) const {
DCHECK_NOT_NULL(op);
DCHECK(op->IsStackSlot() || op->IsFPStackSlot());
return SlotToMemOperand(AllocatedOperand::cast(op)->index());
}
MemOperand SlotToMemOperand(int slot) const {
FrameOffset offset = frame_access_state()->GetFrameOffset(slot);
return MemOperand(offset.from_stack_pointer() ? sp : fp, offset.offset());
}
};
static inline bool HasRegisterInput(Instruction* instr, int index) {
return instr->InputAt(index)->IsRegister();
}
namespace {
class OutOfLineLoadNAN32 final : public OutOfLineCode {
public:
OutOfLineLoadNAN32(CodeGenerator* gen, DoubleRegister result)
: OutOfLineCode(gen), result_(result) {}
void Generate() final {
__ LoadDoubleLiteral(result_, std::numeric_limits<float>::quiet_NaN(),
kScratchReg);
}
private:
DoubleRegister const result_;
};
class OutOfLineLoadNAN64 final : public OutOfLineCode {
public:
OutOfLineLoadNAN64(CodeGenerator* gen, DoubleRegister result)
: OutOfLineCode(gen), result_(result) {}
void Generate() final {
__ LoadDoubleLiteral(result_, std::numeric_limits<double>::quiet_NaN(),
kScratchReg);
}
private:
DoubleRegister const result_;
};
class OutOfLineLoadZero final : public OutOfLineCode {
public:
OutOfLineLoadZero(CodeGenerator* gen, Register result)
: OutOfLineCode(gen), result_(result) {}
void Generate() final { __ LoadImmP(result_, Operand::Zero()); }
private:
Register const result_;
};
class OutOfLineRecordWrite final : public OutOfLineCode {
public:
OutOfLineRecordWrite(CodeGenerator* gen, Register object, Register offset,
Register value, Register scratch0, Register scratch1,
RecordWriteMode mode)
: OutOfLineCode(gen),
object_(object),
offset_(offset),
offset_immediate_(0),
value_(value),
scratch0_(scratch0),
scratch1_(scratch1),
mode_(mode),
must_save_lr_(!gen->frame_access_state()->has_frame()) {}
OutOfLineRecordWrite(CodeGenerator* gen, Register object, int32_t offset,
Register value, Register scratch0, Register scratch1,
RecordWriteMode mode)
: OutOfLineCode(gen),
object_(object),
offset_(no_reg),
offset_immediate_(offset),
value_(value),
scratch0_(scratch0),
scratch1_(scratch1),
mode_(mode),
must_save_lr_(!gen->frame_access_state()->has_frame()) {}
void Generate() final {
if (mode_ > RecordWriteMode::kValueIsPointer) {
__ JumpIfSmi(value_, exit());
}
__ CheckPageFlag(value_, scratch0_,
MemoryChunk::kPointersToHereAreInterestingMask, eq,
exit());
RememberedSetAction const remembered_set_action =
mode_ > RecordWriteMode::kValueIsMap ? EMIT_REMEMBERED_SET
: OMIT_REMEMBERED_SET;
SaveFPRegsMode const save_fp_mode =
frame()->DidAllocateDoubleRegisters() ? kSaveFPRegs : kDontSaveFPRegs;
if (must_save_lr_) {
// We need to save and restore r14 if the frame was elided.
__ Push(r14);
}
RecordWriteStub stub(isolate(), object_, scratch0_, scratch1_,
remembered_set_action, save_fp_mode);
if (offset_.is(no_reg)) {
__ AddP(scratch1_, object_, Operand(offset_immediate_));
} else {
DCHECK_EQ(0, offset_immediate_);
__ AddP(scratch1_, object_, offset_);
}
__ CallStub(&stub);
if (must_save_lr_) {
// We need to save and restore r14 if the frame was elided.
__ Pop(r14);
}
}
private:
Register const object_;
Register const offset_;
int32_t const offset_immediate_; // Valid if offset_.is(no_reg).
Register const value_;
Register const scratch0_;
Register const scratch1_;
RecordWriteMode const mode_;
bool must_save_lr_;
};
Condition FlagsConditionToCondition(FlagsCondition condition, ArchOpcode op) {
switch (condition) {
case kEqual:
return eq;
case kNotEqual:
return ne;
case kSignedLessThan:
case kUnsignedLessThan:
return lt;
case kSignedGreaterThanOrEqual:
case kUnsignedGreaterThanOrEqual:
return ge;
case kSignedLessThanOrEqual:
case kUnsignedLessThanOrEqual:
return le;
case kSignedGreaterThan:
case kUnsignedGreaterThan:
return gt;
case kOverflow:
// Overflow checked for AddP/SubP only.
switch (op) {
case kS390_Add32:
case kS390_Add64:
case kS390_Sub32:
case kS390_Sub64:
return overflow;
default:
break;
}
break;
case kNotOverflow:
switch (op) {
case kS390_Add32:
case kS390_Add64:
case kS390_Sub32:
case kS390_Sub64:
return nooverflow;
default:
break;
}
break;
default:
break;
}
UNREACHABLE();
return kNoCondition;
}
} // namespace
#define ASSEMBLE_FLOAT_UNOP(asm_instr) \
do { \
__ asm_instr(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); \
} while (0)
#define ASSEMBLE_FLOAT_BINOP(asm_instr) \
do { \
__ asm_instr(i.OutputDoubleRegister(), i.InputDoubleRegister(0), \
i.InputDoubleRegister(1)); \
} while (0)
#define ASSEMBLE_BINOP(asm_instr) \
do { \
if (HasRegisterInput(instr, 1)) { \
__ asm_instr(i.OutputRegister(), i.InputRegister(0), \
i.InputRegister(1)); \
} else { \
__ asm_instr(i.OutputRegister(), i.InputRegister(0), \
i.InputImmediate(1)); \
} \
} while (0)
#define ASSEMBLE_COMPARE(cmp_instr, cmpl_instr) \
do { \
if (HasRegisterInput(instr, 1)) { \
if (i.CompareLogical()) { \
__ cmpl_instr(i.InputRegister(0), i.InputRegister(1)); \
} else { \
__ cmp_instr(i.InputRegister(0), i.InputRegister(1)); \
} \
} else { \
if (i.CompareLogical()) { \
__ cmpl_instr(i.InputRegister(0), i.InputImmediate(1)); \
} else { \
__ cmp_instr(i.InputRegister(0), i.InputImmediate(1)); \
} \
} \
} while (0)
#define ASSEMBLE_FLOAT_COMPARE(cmp_instr) \
do { \
__ cmp_instr(i.InputDoubleRegister(0), i.InputDoubleRegister(1); \
} while (0)
// Divide instruction dr will implicity use register pair
// r0 & r1 below.
// R0:R1 = R1 / divisor - R0 remainder
// Copy remainder to output reg
#define ASSEMBLE_MODULO(div_instr, shift_instr) \
do { \
__ LoadRR(r0, i.InputRegister(0)); \
__ shift_instr(r0, Operand(32)); \
__ div_instr(r0, i.InputRegister(1)); \
__ ltr(i.OutputRegister(), r0); \
} while (0)
#define ASSEMBLE_FLOAT_MODULO() \
do { \
FrameScope scope(masm(), StackFrame::MANUAL); \
__ PrepareCallCFunction(0, 2, kScratchReg); \
__ MovToFloatParameters(i.InputDoubleRegister(0), \
i.InputDoubleRegister(1)); \
__ CallCFunction(ExternalReference::mod_two_doubles_operation(isolate()), \
0, 2); \
__ MovFromFloatResult(i.OutputDoubleRegister()); \
} while (0)
#define ASSEMBLE_IEEE754_UNOP(name) \
do { \
/* TODO(bmeurer): We should really get rid of this special instruction, */ \
/* and generate a CallAddress instruction instead. */ \
FrameScope scope(masm(), StackFrame::MANUAL); \
__ PrepareCallCFunction(0, 1, kScratchReg); \
__ MovToFloatParameter(i.InputDoubleRegister(0)); \
__ CallCFunction(ExternalReference::ieee754_##name##_function(isolate()), \
0, 1); \
/* Move the result in the double result register. */ \
__ MovFromFloatResult(i.OutputDoubleRegister()); \
} while (0)
#define ASSEMBLE_IEEE754_BINOP(name) \
do { \
/* TODO(bmeurer): We should really get rid of this special instruction, */ \
/* and generate a CallAddress instruction instead. */ \
FrameScope scope(masm(), StackFrame::MANUAL); \
__ PrepareCallCFunction(0, 2, kScratchReg); \
__ MovToFloatParameters(i.InputDoubleRegister(0), \
i.InputDoubleRegister(1)); \
__ CallCFunction(ExternalReference::ieee754_##name##_function(isolate()), \
0, 2); \
/* Move the result in the double result register. */ \
__ MovFromFloatResult(i.OutputDoubleRegister()); \
} while (0)
#define ASSEMBLE_FLOAT_MAX() \
do { \
DoubleRegister left_reg = i.InputDoubleRegister(0); \
DoubleRegister right_reg = i.InputDoubleRegister(1); \
DoubleRegister result_reg = i.OutputDoubleRegister(); \
Label check_nan_left, check_zero, return_left, return_right, done; \
__ cdbr(left_reg, right_reg); \
__ bunordered(&check_nan_left, Label::kNear); \
__ beq(&check_zero); \
__ bge(&return_left, Label::kNear); \
__ b(&return_right, Label::kNear); \
\
__ bind(&check_zero); \
__ lzdr(kDoubleRegZero); \
__ cdbr(left_reg, kDoubleRegZero); \
/* left == right != 0. */ \
__ bne(&return_left, Label::kNear); \
/* At this point, both left and right are either 0 or -0. */ \
/* N.B. The following works because +0 + -0 == +0 */ \
/* For max we want logical-and of sign bit: (L + R) */ \
__ ldr(result_reg, left_reg); \
__ adbr(result_reg, right_reg); \
__ b(&done, Label::kNear); \
\
__ bind(&check_nan_left); \
__ cdbr(left_reg, left_reg); \
/* left == NaN. */ \
__ bunordered(&return_left, Label::kNear); \
\
__ bind(&return_right); \
if (!right_reg.is(result_reg)) { \
__ ldr(result_reg, right_reg); \
} \
__ b(&done, Label::kNear); \
\
__ bind(&return_left); \
if (!left_reg.is(result_reg)) { \
__ ldr(result_reg, left_reg); \
} \
__ bind(&done); \
} while (0) \
#define ASSEMBLE_FLOAT_MIN() \
do { \
DoubleRegister left_reg = i.InputDoubleRegister(0); \
DoubleRegister right_reg = i.InputDoubleRegister(1); \
DoubleRegister result_reg = i.OutputDoubleRegister(); \
Label check_nan_left, check_zero, return_left, return_right, done; \
__ cdbr(left_reg, right_reg); \
__ bunordered(&check_nan_left, Label::kNear); \
__ beq(&check_zero); \
__ ble(&return_left, Label::kNear); \
__ b(&return_right, Label::kNear); \
\
__ bind(&check_zero); \
__ lzdr(kDoubleRegZero); \
__ cdbr(left_reg, kDoubleRegZero); \
/* left == right != 0. */ \
__ bne(&return_left, Label::kNear); \
/* At this point, both left and right are either 0 or -0. */ \
/* N.B. The following works because +0 + -0 == +0 */ \
/* For min we want logical-or of sign bit: -(-L + -R) */ \
__ lcdbr(left_reg, left_reg); \
__ ldr(result_reg, left_reg); \
if (left_reg.is(right_reg)) { \
__ adbr(result_reg, right_reg); \
} else { \
__ sdbr(result_reg, right_reg); \
} \
__ lcdbr(result_reg, result_reg); \
__ b(&done, Label::kNear); \
\
__ bind(&check_nan_left); \
__ cdbr(left_reg, left_reg); \
/* left == NaN. */ \
__ bunordered(&return_left, Label::kNear); \
\
__ bind(&return_right); \
if (!right_reg.is(result_reg)) { \
__ ldr(result_reg, right_reg); \
} \
__ b(&done, Label::kNear); \
\
__ bind(&return_left); \
if (!left_reg.is(result_reg)) { \
__ ldr(result_reg, left_reg); \
} \
__ bind(&done); \
} while (0)
// Only MRI mode for these instructions available
#define ASSEMBLE_LOAD_FLOAT(asm_instr) \
do { \
DoubleRegister result = i.OutputDoubleRegister(); \
AddressingMode mode = kMode_None; \
MemOperand operand = i.MemoryOperand(&mode); \
__ asm_instr(result, operand); \
} while (0)
#define ASSEMBLE_LOAD_INTEGER(asm_instr) \
do { \
Register result = i.OutputRegister(); \
AddressingMode mode = kMode_None; \
MemOperand operand = i.MemoryOperand(&mode); \
__ asm_instr(result, operand); \
} while (0)
#define ASSEMBLE_STORE_FLOAT32() \
do { \
size_t index = 0; \
AddressingMode mode = kMode_None; \
MemOperand operand = i.MemoryOperand(&mode, &index); \
DoubleRegister value = i.InputDoubleRegister(index); \
__ StoreFloat32(value, operand); \
} while (0)
#define ASSEMBLE_STORE_DOUBLE() \
do { \
size_t index = 0; \
AddressingMode mode = kMode_None; \
MemOperand operand = i.MemoryOperand(&mode, &index); \
DoubleRegister value = i.InputDoubleRegister(index); \
__ StoreDouble(value, operand); \
} while (0)
#define ASSEMBLE_STORE_INTEGER(asm_instr) \
do { \
size_t index = 0; \
AddressingMode mode = kMode_None; \
MemOperand operand = i.MemoryOperand(&mode, &index); \
Register value = i.InputRegister(index); \
__ asm_instr(value, operand); \
} while (0)
#define ASSEMBLE_CHECKED_LOAD_FLOAT(asm_instr, width) \
do { \
DoubleRegister result = i.OutputDoubleRegister(); \
size_t index = 0; \
AddressingMode mode = kMode_None; \
MemOperand operand = i.MemoryOperand(&mode, index); \
Register offset = operand.rb(); \
if (HasRegisterInput(instr, 2)) { \
__ CmpLogical32(offset, i.InputRegister(2)); \
} else { \
__ CmpLogical32(offset, i.InputImmediate(2)); \
} \
auto ool = new (zone()) OutOfLineLoadNAN##width(this, result); \
__ bge(ool->entry()); \
__ CleanUInt32(offset); \
__ asm_instr(result, operand); \
__ bind(ool->exit()); \
} while (0)
#define ASSEMBLE_CHECKED_LOAD_INTEGER(asm_instr) \
do { \
Register result = i.OutputRegister(); \
size_t index = 0; \
AddressingMode mode = kMode_None; \
MemOperand operand = i.MemoryOperand(&mode, index); \
Register offset = operand.rb(); \
if (HasRegisterInput(instr, 2)) { \
__ CmpLogical32(offset, i.InputRegister(2)); \
} else { \
__ CmpLogical32(offset, i.InputImmediate(2)); \
} \
auto ool = new (zone()) OutOfLineLoadZero(this, result); \
__ bge(ool->entry()); \
__ CleanUInt32(offset); \
__ asm_instr(result, operand); \
__ bind(ool->exit()); \
} while (0)
#define ASSEMBLE_CHECKED_STORE_FLOAT32() \
do { \
Label done; \
size_t index = 0; \
AddressingMode mode = kMode_None; \
MemOperand operand = i.MemoryOperand(&mode, index); \
Register offset = operand.rb(); \
if (HasRegisterInput(instr, 2)) { \
__ CmpLogical32(offset, i.InputRegister(2)); \
} else { \
__ CmpLogical32(offset, i.InputImmediate(2)); \
} \
__ bge(&done); \
DoubleRegister value = i.InputDoubleRegister(3); \
__ CleanUInt32(offset); \
__ StoreFloat32(value, operand); \
__ bind(&done); \
} while (0)
#define ASSEMBLE_CHECKED_STORE_DOUBLE() \
do { \
Label done; \
size_t index = 0; \
AddressingMode mode = kMode_None; \
MemOperand operand = i.MemoryOperand(&mode, index); \
DCHECK_EQ(kMode_MRR, mode); \
Register offset = operand.rb(); \
if (HasRegisterInput(instr, 2)) { \
__ CmpLogical32(offset, i.InputRegister(2)); \
} else { \
__ CmpLogical32(offset, i.InputImmediate(2)); \
} \
__ bge(&done); \
DoubleRegister value = i.InputDoubleRegister(3); \
__ CleanUInt32(offset); \
__ StoreDouble(value, operand); \
__ bind(&done); \
} while (0)
#define ASSEMBLE_CHECKED_STORE_INTEGER(asm_instr) \
do { \
Label done; \
size_t index = 0; \
AddressingMode mode = kMode_None; \
MemOperand operand = i.MemoryOperand(&mode, index); \
Register offset = operand.rb(); \
if (HasRegisterInput(instr, 2)) { \
__ CmpLogical32(offset, i.InputRegister(2)); \
} else { \
__ CmpLogical32(offset, i.InputImmediate(2)); \
} \
__ bge(&done); \
Register value = i.InputRegister(3); \
__ CleanUInt32(offset); \
__ asm_instr(value, operand); \
__ bind(&done); \
} while (0)
void CodeGenerator::AssembleDeconstructFrame() {
__ LeaveFrame(StackFrame::MANUAL);
}
void CodeGenerator::AssemblePrepareTailCall() {
if (frame_access_state()->has_frame()) {
__ RestoreFrameStateForTailCall();
}
frame_access_state()->SetFrameAccessToSP();
}
void CodeGenerator::AssemblePopArgumentsAdaptorFrame(Register args_reg,
Register scratch1,
Register scratch2,
Register scratch3) {
DCHECK(!AreAliased(args_reg, scratch1, scratch2, scratch3));
Label done;
// Check if current frame is an arguments adaptor frame.
__ LoadP(scratch1, MemOperand(fp, StandardFrameConstants::kContextOffset));
__ CmpSmiLiteral(scratch1, Smi::FromInt(StackFrame::ARGUMENTS_ADAPTOR), r0);
__ bne(&done);
// Load arguments count from current arguments adaptor frame (note, it
// does not include receiver).
Register caller_args_count_reg = scratch1;
__ LoadP(caller_args_count_reg,
MemOperand(fp, ArgumentsAdaptorFrameConstants::kLengthOffset));
__ SmiUntag(caller_args_count_reg);
ParameterCount callee_args_count(args_reg);
__ PrepareForTailCall(callee_args_count, caller_args_count_reg, scratch2,
scratch3);
__ bind(&done);
}
namespace {
void FlushPendingPushRegisters(MacroAssembler* masm,
FrameAccessState* frame_access_state,
ZoneVector<Register>* pending_pushes) {
switch (pending_pushes->size()) {
case 0:
break;
case 1:
masm->Push((*pending_pushes)[0]);
break;
case 2:
masm->Push((*pending_pushes)[0], (*pending_pushes)[1]);
break;
case 3:
masm->Push((*pending_pushes)[0], (*pending_pushes)[1],
(*pending_pushes)[2]);
break;
default:
UNREACHABLE();
break;
}
frame_access_state->IncreaseSPDelta(pending_pushes->size());
pending_pushes->resize(0);
}
void AddPendingPushRegister(MacroAssembler* masm,
FrameAccessState* frame_access_state,
ZoneVector<Register>* pending_pushes,
Register reg) {
pending_pushes->push_back(reg);
if (pending_pushes->size() == 3 || reg.is(ip)) {
FlushPendingPushRegisters(masm, frame_access_state, pending_pushes);
}
}
void AdjustStackPointerForTailCall(
MacroAssembler* masm, FrameAccessState* state, int new_slot_above_sp,
ZoneVector<Register>* pending_pushes = nullptr,
bool allow_shrinkage = true) {
int current_sp_offset = state->GetSPToFPSlotCount() +
StandardFrameConstants::kFixedSlotCountAboveFp;
int stack_slot_delta = new_slot_above_sp - current_sp_offset;
if (stack_slot_delta > 0) {
if (pending_pushes != nullptr) {
FlushPendingPushRegisters(masm, state, pending_pushes);
}
masm->AddP(sp, sp, Operand(-stack_slot_delta * kPointerSize));
state->IncreaseSPDelta(stack_slot_delta);
} else if (allow_shrinkage && stack_slot_delta < 0) {
if (pending_pushes != nullptr) {
FlushPendingPushRegisters(masm, state, pending_pushes);
}
masm->AddP(sp, sp, Operand(-stack_slot_delta * kPointerSize));
state->IncreaseSPDelta(stack_slot_delta);
}
}
} // namespace
void CodeGenerator::AssembleTailCallBeforeGap(Instruction* instr,
int first_unused_stack_slot) {
CodeGenerator::PushTypeFlags flags(kImmediatePush | kScalarPush);
ZoneVector<MoveOperands*> pushes(zone());
GetPushCompatibleMoves(instr, flags, &pushes);
if (!pushes.empty() &&
(LocationOperand::cast(pushes.back()->destination()).index() + 1 ==
first_unused_stack_slot)) {
S390OperandConverter g(this, instr);
ZoneVector<Register> pending_pushes(zone());
for (auto move : pushes) {
LocationOperand destination_location(
LocationOperand::cast(move->destination()));
InstructionOperand source(move->source());
AdjustStackPointerForTailCall(
masm(), frame_access_state(),
destination_location.index() - pending_pushes.size(),
&pending_pushes);
if (source.IsStackSlot()) {
LocationOperand source_location(LocationOperand::cast(source));
__ LoadP(ip, g.SlotToMemOperand(source_location.index()));
AddPendingPushRegister(masm(), frame_access_state(), &pending_pushes,
ip);
} else if (source.IsRegister()) {
LocationOperand source_location(LocationOperand::cast(source));
AddPendingPushRegister(masm(), frame_access_state(), &pending_pushes,
source_location.GetRegister());
} else if (source.IsImmediate()) {
AddPendingPushRegister(masm(), frame_access_state(), &pending_pushes,
ip);
} else {
// Pushes of non-scalar data types is not supported.
UNIMPLEMENTED();
}
move->Eliminate();
}
FlushPendingPushRegisters(masm(), frame_access_state(), &pending_pushes);
}
AdjustStackPointerForTailCall(masm(), frame_access_state(),
first_unused_stack_slot, nullptr, false);
}
void CodeGenerator::AssembleTailCallAfterGap(Instruction* instr,
int first_unused_stack_slot) {
AdjustStackPointerForTailCall(masm(), frame_access_state(),
first_unused_stack_slot);
}
// Assembles an instruction after register allocation, producing machine code.
CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
Instruction* instr) {
S390OperandConverter i(this, instr);
ArchOpcode opcode = ArchOpcodeField::decode(instr->opcode());
switch (opcode) {
case kArchComment: {
Address comment_string = i.InputExternalReference(0).address();
__ RecordComment(reinterpret_cast<const char*>(comment_string));
break;
}
case kArchCallCodeObject: {
EnsureSpaceForLazyDeopt();
if (HasRegisterInput(instr, 0)) {
__ AddP(ip, i.InputRegister(0),
Operand(Code::kHeaderSize - kHeapObjectTag));
__ Call(ip);
} else {
__ Call(Handle<Code>::cast(i.InputHeapObject(0)),
RelocInfo::CODE_TARGET);
}
RecordCallPosition(instr);
frame_access_state()->ClearSPDelta();
break;
}
case kArchTailCallCodeObjectFromJSFunction:
case kArchTailCallCodeObject: {
if (opcode == kArchTailCallCodeObjectFromJSFunction) {
AssemblePopArgumentsAdaptorFrame(kJavaScriptCallArgCountRegister,
i.TempRegister(0), i.TempRegister(1),
i.TempRegister(2));
}
if (HasRegisterInput(instr, 0)) {
__ AddP(ip, i.InputRegister(0),
Operand(Code::kHeaderSize - kHeapObjectTag));
__ Jump(ip);
} else {
// We cannot use the constant pool to load the target since
// we've already restored the caller's frame.
ConstantPoolUnavailableScope constant_pool_unavailable(masm());
__ Jump(Handle<Code>::cast(i.InputHeapObject(0)),
RelocInfo::CODE_TARGET);
}
frame_access_state()->ClearSPDelta();
frame_access_state()->SetFrameAccessToDefault();
break;
}
case kArchTailCallAddress: {
CHECK(!instr->InputAt(0)->IsImmediate());
__ Jump(i.InputRegister(0));
frame_access_state()->ClearSPDelta();
frame_access_state()->SetFrameAccessToDefault();
break;
}
case kArchCallJSFunction: {
EnsureSpaceForLazyDeopt();
Register func = i.InputRegister(0);
if (FLAG_debug_code) {
// Check the function's context matches the context argument.
__ LoadP(kScratchReg,
FieldMemOperand(func, JSFunction::kContextOffset));
__ CmpP(cp, kScratchReg);
__ Assert(eq, kWrongFunctionContext);
}
__ LoadP(ip, FieldMemOperand(func, JSFunction::kCodeEntryOffset));
__ Call(ip);
RecordCallPosition(instr);
frame_access_state()->ClearSPDelta();
break;
}
case kArchTailCallJSFunctionFromJSFunction:
case kArchTailCallJSFunction: {
Register func = i.InputRegister(0);
if (FLAG_debug_code) {
// Check the function's context matches the context argument.
__ LoadP(kScratchReg,
FieldMemOperand(func, JSFunction::kContextOffset));
__ CmpP(cp, kScratchReg);
__ Assert(eq, kWrongFunctionContext);
}
if (opcode == kArchTailCallJSFunctionFromJSFunction) {
AssemblePopArgumentsAdaptorFrame(kJavaScriptCallArgCountRegister,
i.TempRegister(0), i.TempRegister(1),
i.TempRegister(2));
}
__ LoadP(ip, FieldMemOperand(func, JSFunction::kCodeEntryOffset));
__ Jump(ip);
frame_access_state()->ClearSPDelta();
frame_access_state()->SetFrameAccessToDefault();
break;
}
case kArchPrepareCallCFunction: {
int const num_parameters = MiscField::decode(instr->opcode());
__ PrepareCallCFunction(num_parameters, kScratchReg);
// Frame alignment requires using FP-relative frame addressing.
frame_access_state()->SetFrameAccessToFP();
break;
}
case kArchPrepareTailCall:
AssemblePrepareTailCall();
break;
case kArchCallCFunction: {
int const num_parameters = MiscField::decode(instr->opcode());
if (instr->InputAt(0)->IsImmediate()) {
ExternalReference ref = i.InputExternalReference(0);
__ CallCFunction(ref, num_parameters);
} else {
Register func = i.InputRegister(0);
__ CallCFunction(func, num_parameters);
}
frame_access_state()->SetFrameAccessToDefault();
frame_access_state()->ClearSPDelta();
break;
}
case kArchJmp:
AssembleArchJump(i.InputRpo(0));
break;
case kArchLookupSwitch:
AssembleArchLookupSwitch(instr);
break;
case kArchTableSwitch:
AssembleArchTableSwitch(instr);
break;
case kArchDebugBreak:
__ stop("kArchDebugBreak");
break;
case kArchImpossible:
__ Abort(kConversionFromImpossibleValue);
break;
case kArchNop:
case kArchThrowTerminator:
// don't emit code for nops.
break;
case kArchDeoptimize: {
int deopt_state_id =
BuildTranslation(instr, -1, 0, OutputFrameStateCombine::Ignore());
Deoptimizer::BailoutType bailout_type =
Deoptimizer::BailoutType(MiscField::decode(instr->opcode()));
CodeGenResult result =
AssembleDeoptimizerCall(deopt_state_id, bailout_type);
if (result != kSuccess) return result;
break;
}
case kArchRet:
AssembleReturn();
break;
case kArchStackPointer:
__ LoadRR(i.OutputRegister(), sp);
break;
case kArchFramePointer:
__ LoadRR(i.OutputRegister(), fp);
break;
case kArchParentFramePointer:
if (frame_access_state()->has_frame()) {
__ LoadP(i.OutputRegister(), MemOperand(fp, 0));
} else {
__ LoadRR(i.OutputRegister(), fp);
}
break;
case kArchTruncateDoubleToI:
// TODO(mbrandy): move slow call to stub out of line.
__ TruncateDoubleToI(i.OutputRegister(), i.InputDoubleRegister(0));
break;
case kArchStoreWithWriteBarrier: {
RecordWriteMode mode =
static_cast<RecordWriteMode>(MiscField::decode(instr->opcode()));
Register object = i.InputRegister(0);
Register value = i.InputRegister(2);
Register scratch0 = i.TempRegister(0);
Register scratch1 = i.TempRegister(1);
OutOfLineRecordWrite* ool;
AddressingMode addressing_mode =
AddressingModeField::decode(instr->opcode());
if (addressing_mode == kMode_MRI) {
int32_t offset = i.InputInt32(1);
ool = new (zone()) OutOfLineRecordWrite(this, object, offset, value,
scratch0, scratch1, mode);
__ StoreP(value, MemOperand(object, offset));
} else {
DCHECK_EQ(kMode_MRR, addressing_mode);
Register offset(i.InputRegister(1));
ool = new (zone()) OutOfLineRecordWrite(this, object, offset, value,
scratch0, scratch1, mode);
__ StoreP(value, MemOperand(object, offset));
}
__ CheckPageFlag(object, scratch0,
MemoryChunk::kPointersFromHereAreInterestingMask, ne,
ool->entry());
__ bind(ool->exit());
break;
}
case kArchStackSlot: {
FrameOffset offset =
frame_access_state()->GetFrameOffset(i.InputInt32(0));
__ AddP(i.OutputRegister(), offset.from_stack_pointer() ? sp : fp,
Operand(offset.offset()));
break;
}
case kS390_And32:
ASSEMBLE_BINOP(And);
break;
case kS390_And64:
ASSEMBLE_BINOP(AndP);
break;
case kS390_Or32:
ASSEMBLE_BINOP(Or);
case kS390_Or64:
ASSEMBLE_BINOP(OrP);
break;
case kS390_Xor32:
ASSEMBLE_BINOP(Xor);
break;
case kS390_Xor64:
ASSEMBLE_BINOP(XorP);
break;
case kS390_ShiftLeft32:
if (HasRegisterInput(instr, 1)) {
if (i.OutputRegister().is(i.InputRegister(1)) &&
!CpuFeatures::IsSupported(DISTINCT_OPS)) {
__ LoadRR(kScratchReg, i.InputRegister(1));
__ ShiftLeft(i.OutputRegister(), i.InputRegister(0), kScratchReg);
} else {
ASSEMBLE_BINOP(ShiftLeft);
}
} else {
ASSEMBLE_BINOP(ShiftLeft);
}
__ LoadlW(i.OutputRegister(0), i.OutputRegister(0));
break;
#if V8_TARGET_ARCH_S390X
case kS390_ShiftLeft64:
ASSEMBLE_BINOP(sllg);
break;
#endif
case kS390_ShiftRight32:
if (HasRegisterInput(instr, 1)) {
if (i.OutputRegister().is(i.InputRegister(1)) &&
!CpuFeatures::IsSupported(DISTINCT_OPS)) {
__ LoadRR(kScratchReg, i.InputRegister(1));
__ ShiftRight(i.OutputRegister(), i.InputRegister(0), kScratchReg);
} else {
ASSEMBLE_BINOP(ShiftRight);
}
} else {
ASSEMBLE_BINOP(ShiftRight);
}
__ LoadlW(i.OutputRegister(0), i.OutputRegister(0));
break;
#if V8_TARGET_ARCH_S390X
case kS390_ShiftRight64:
ASSEMBLE_BINOP(srlg);
break;
#endif
case kS390_ShiftRightArith32:
if (HasRegisterInput(instr, 1)) {
if (i.OutputRegister().is(i.InputRegister(1)) &&
!CpuFeatures::IsSupported(DISTINCT_OPS)) {
__ LoadRR(kScratchReg, i.InputRegister(1));
__ ShiftRightArith(i.OutputRegister(), i.InputRegister(0),
kScratchReg);
} else {
ASSEMBLE_BINOP(ShiftRightArith);
}
} else {
ASSEMBLE_BINOP(ShiftRightArith);
}
__ LoadlW(i.OutputRegister(), i.OutputRegister());
break;
#if V8_TARGET_ARCH_S390X
case kS390_ShiftRightArith64:
ASSEMBLE_BINOP(srag);
break;
#endif
#if !V8_TARGET_ARCH_S390X
case kS390_AddPair:
// i.InputRegister(0) ... left low word.
// i.InputRegister(1) ... left high word.
// i.InputRegister(2) ... right low word.
// i.InputRegister(3) ... right high word.
__ AddLogical32(i.OutputRegister(0), i.InputRegister(0),
i.InputRegister(2));
__ AddLogicalWithCarry32(i.OutputRegister(1), i.InputRegister(1),
i.InputRegister(3));
break;
case kS390_SubPair:
// i.InputRegister(0) ... left low word.
// i.InputRegister(1) ... left high word.
// i.InputRegister(2) ... right low word.
// i.InputRegister(3) ... right high word.
__ SubLogical32(i.OutputRegister(0), i.InputRegister(0),
i.InputRegister(2));
__ SubLogicalWithBorrow32(i.OutputRegister(1), i.InputRegister(1),
i.InputRegister(3));
break;
case kS390_MulPair:
// i.InputRegister(0) ... left low word.
// i.InputRegister(1) ... left high word.
// i.InputRegister(2) ... right low word.
// i.InputRegister(3) ... right high word.
__ sllg(r0, i.InputRegister(1), Operand(32));
__ sllg(r1, i.InputRegister(3), Operand(32));
__ lr(r0, i.InputRegister(0));
__ lr(r1, i.InputRegister(2));
__ msgr(r1, r0);
__ lr(i.OutputRegister(0), r1);
__ srag(i.OutputRegister(1), r1, Operand(32));
break;
case kS390_ShiftLeftPair:
if (instr->InputAt(2)->IsImmediate()) {
__ ShiftLeftPair(i.OutputRegister(0), i.OutputRegister(1),
i.InputRegister(0), i.InputRegister(1),
i.InputInt32(2));
} else {
__ ShiftLeftPair(i.OutputRegister(0), i.OutputRegister(1),
i.InputRegister(0), i.InputRegister(1), kScratchReg,
i.InputRegister(2));
}
break;
case kS390_ShiftRightPair:
if (instr->InputAt(2)->IsImmediate()) {
__ ShiftRightPair(i.OutputRegister(0), i.OutputRegister(1),
i.InputRegister(0), i.InputRegister(1),
i.InputInt32(2));
} else {
__ ShiftRightPair(i.OutputRegister(0), i.OutputRegister(1),
i.InputRegister(0), i.InputRegister(1), kScratchReg,
i.InputRegister(2));
}
break;
case kS390_ShiftRightArithPair:
if (instr->InputAt(2)->IsImmediate()) {
__ ShiftRightArithPair(i.OutputRegister(0), i.OutputRegister(1),
i.InputRegister(0), i.InputRegister(1),
i.InputInt32(2));
} else {
__ ShiftRightArithPair(i.OutputRegister(0), i.OutputRegister(1),
i.InputRegister(0), i.InputRegister(1),
kScratchReg, i.InputRegister(2));
}
break;
#endif
case kS390_RotRight32:
if (HasRegisterInput(instr, 1)) {
__ LoadComplementRR(kScratchReg, i.InputRegister(1));
__ rll(i.OutputRegister(), i.InputRegister(0), kScratchReg);
} else {
__ rll(i.OutputRegister(), i.InputRegister(0),
Operand(32 - i.InputInt32(1)));
}
break;
#if V8_TARGET_ARCH_S390X
case kS390_RotRight64:
if (HasRegisterInput(instr, 1)) {
__ LoadComplementRR(kScratchReg, i.InputRegister(1));
__ rllg(i.OutputRegister(), i.InputRegister(0), kScratchReg);
} else {
__ rllg(i.OutputRegister(), i.InputRegister(0),
Operand(64 - i.InputInt32(1)));
}
break;
#endif
case kS390_Not32:
__ Not32(i.OutputRegister(), i.InputRegister(0));
break;
case kS390_Not64:
__ Not64(i.OutputRegister(), i.InputRegister(0));
break;
case kS390_RotLeftAndMask32:
if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT)) {
int shiftAmount = i.InputInt32(1);
int endBit = 63 - i.InputInt32(3);
int startBit = 63 - i.InputInt32(2);
__ rll(i.OutputRegister(), i.InputRegister(0), Operand(shiftAmount));
__ risbg(i.OutputRegister(), i.OutputRegister(), Operand(startBit),
Operand(endBit), Operand::Zero(), true);
} else {
int shiftAmount = i.InputInt32(1);
int clearBitLeft = 63 - i.InputInt32(2);
int clearBitRight = i.InputInt32(3);
__ rll(i.OutputRegister(), i.InputRegister(0), Operand(shiftAmount));
__ sllg(i.OutputRegister(), i.OutputRegister(), Operand(clearBitLeft));
__ srlg(i.OutputRegister(), i.OutputRegister(),
Operand((clearBitLeft + clearBitRight)));
__ sllg(i.OutputRegister(), i.OutputRegister(), Operand(clearBitRight));
}
break;
#if V8_TARGET_ARCH_S390X
case kS390_RotLeftAndClear64:
UNIMPLEMENTED(); // Find correct instruction
break;
case kS390_RotLeftAndClearLeft64:
if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT)) {
int shiftAmount = i.InputInt32(1);
int endBit = 63;
int startBit = 63 - i.InputInt32(2);
__ risbg(i.OutputRegister(), i.InputRegister(0), Operand(startBit),
Operand(endBit), Operand(shiftAmount), true);
} else {
int shiftAmount = i.InputInt32(1);
int clearBit = 63 - i.InputInt32(2);
__ rllg(i.OutputRegister(), i.InputRegister(0), Operand(shiftAmount));
__ sllg(i.OutputRegister(), i.OutputRegister(), Operand(clearBit));
__ srlg(i.OutputRegister(), i.OutputRegister(), Operand(clearBit));
}
break;
case kS390_RotLeftAndClearRight64:
if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT)) {
int shiftAmount = i.InputInt32(1);
int endBit = 63 - i.InputInt32(2);
int startBit = 0;
__ risbg(i.OutputRegister(), i.InputRegister(0), Operand(startBit),
Operand(endBit), Operand(shiftAmount), true);
} else {
int shiftAmount = i.InputInt32(1);
int clearBit = i.InputInt32(2);
__ rllg(i.OutputRegister(), i.InputRegister(0), Operand(shiftAmount));
__ srlg(i.OutputRegister(), i.OutputRegister(), Operand(clearBit));
__ sllg(i.OutputRegister(), i.OutputRegister(), Operand(clearBit));
}
break;
#endif
case kS390_Add32:
ASSEMBLE_BINOP(Add32);
__ LoadW(i.OutputRegister(), i.OutputRegister());
break;
case kS390_Add64:
ASSEMBLE_BINOP(AddP);
break;
case kS390_AddFloat:
// Ensure we don't clobber right/InputReg(1)
if (i.OutputDoubleRegister().is(i.InputDoubleRegister(1))) {
ASSEMBLE_FLOAT_UNOP(aebr);
} else {
if (!i.OutputDoubleRegister().is(i.InputDoubleRegister(0)))
__ ldr(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
__ aebr(i.OutputDoubleRegister(), i.InputDoubleRegister(1));
}
break;
case kS390_AddDouble:
// Ensure we don't clobber right/InputReg(1)
if (i.OutputDoubleRegister().is(i.InputDoubleRegister(1))) {
ASSEMBLE_FLOAT_UNOP(adbr);
} else {
if (!i.OutputDoubleRegister().is(i.InputDoubleRegister(0)))
__ ldr(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
__ adbr(i.OutputDoubleRegister(), i.InputDoubleRegister(1));
}
break;
case kS390_Sub32:
ASSEMBLE_BINOP(Sub32);
__ LoadW(i.OutputRegister(), i.OutputRegister());
break;
case kS390_Sub64:
ASSEMBLE_BINOP(SubP);
break;
case kS390_SubFloat:
// OutputDoubleReg() = i.InputDoubleRegister(0) - i.InputDoubleRegister(1)
if (i.OutputDoubleRegister().is(i.InputDoubleRegister(1))) {
__ ldr(kScratchDoubleReg, i.InputDoubleRegister(1));
__ ldr(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
__ sebr(i.OutputDoubleRegister(), kScratchDoubleReg);
} else {
if (!i.OutputDoubleRegister().is(i.InputDoubleRegister(0))) {
__ ldr(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
}
__ sebr(i.OutputDoubleRegister(), i.InputDoubleRegister(1));
}
break;
case kS390_SubDouble:
// OutputDoubleReg() = i.InputDoubleRegister(0) - i.InputDoubleRegister(1)
if (i.OutputDoubleRegister().is(i.InputDoubleRegister(1))) {
__ ldr(kScratchDoubleReg, i.InputDoubleRegister(1));
__ ldr(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
__ sdbr(i.OutputDoubleRegister(), kScratchDoubleReg);
} else {
if (!i.OutputDoubleRegister().is(i.InputDoubleRegister(0))) {
__ ldr(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
}
__ sdbr(i.OutputDoubleRegister(), i.InputDoubleRegister(1));
}
break;
case kS390_Mul32:
#if V8_TARGET_ARCH_S390X
case kS390_Mul64:
#endif
__ Mul(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1));
break;
case kS390_MulHigh32:
__ LoadRR(r1, i.InputRegister(0));
__ mr_z(r0, i.InputRegister(1));
__ LoadW(i.OutputRegister(), r0);
break;
case kS390_Mul32WithHigh32:
__ LoadRR(r1, i.InputRegister(0));
__ mr_z(r0, i.InputRegister(1));
__ LoadW(i.OutputRegister(0), r1); // low
__ LoadW(i.OutputRegister(1), r0); // high
break;
case kS390_MulHighU32:
__ LoadRR(r1, i.InputRegister(0));
__ mlr(r0, i.InputRegister(1));
__ LoadlW(i.OutputRegister(), r0);
break;
case kS390_MulFloat:
// Ensure we don't clobber right
if (i.OutputDoubleRegister().is(i.InputDoubleRegister(1))) {
ASSEMBLE_FLOAT_UNOP(meebr);
} else {
if (!i.OutputDoubleRegister().is(i.InputDoubleRegister(0)))
__ ldr(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
__ meebr(i.OutputDoubleRegister(), i.InputDoubleRegister(1));
}
break;
case kS390_MulDouble:
// Ensure we don't clobber right
if (i.OutputDoubleRegister().is(i.InputDoubleRegister(1))) {
ASSEMBLE_FLOAT_UNOP(mdbr);
} else {
if (!i.OutputDoubleRegister().is(i.InputDoubleRegister(0)))
__ ldr(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
__ mdbr(i.OutputDoubleRegister(), i.InputDoubleRegister(1));
}
break;
#if V8_TARGET_ARCH_S390X
case kS390_Div64:
__ LoadRR(r1, i.InputRegister(0));
__ dsgr(r0, i.InputRegister(1)); // R1: Dividend
__ ltgr(i.OutputRegister(), r1); // Copy R1: Quotient to output
break;
#endif
case kS390_Div32:
__ LoadRR(r0, i.InputRegister(0));
__ srda(r0, Operand(32));
__ dr(r0, i.InputRegister(1));
__ LoadAndTestP_ExtendSrc(i.OutputRegister(),
r1); // Copy R1: Quotient to output
break;
#if V8_TARGET_ARCH_S390X
case kS390_DivU64:
__ LoadRR(r1, i.InputRegister(0));
__ LoadImmP(r0, Operand::Zero());
__ dlgr(r0, i.InputRegister(1)); // R0:R1: Dividend
__ ltgr(i.OutputRegister(), r1); // Copy R1: Quotient to output
break;
#endif
case kS390_DivU32:
__ LoadRR(r0, i.InputRegister(0));
__ srdl(r0, Operand(32));
__ dlr(r0, i.InputRegister(1)); // R0:R1: Dividend
__ LoadlW(i.OutputRegister(), r1); // Copy R1: Quotient to output
__ LoadAndTestP_ExtendSrc(r1, r1);
break;
case kS390_DivFloat:
// InputDoubleRegister(1)=InputDoubleRegister(0)/InputDoubleRegister(1)
if (i.OutputDoubleRegister().is(i.InputDoubleRegister(1))) {
__ ldr(kScratchDoubleReg, i.InputDoubleRegister(1));
__ ldr(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
__ debr(i.OutputDoubleRegister(), kScratchDoubleReg);
} else {
if (!i.OutputDoubleRegister().is(i.InputDoubleRegister(0)))
__ ldr(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
__ debr(i.OutputDoubleRegister(), i.InputDoubleRegister(1));
}
break;
case kS390_DivDouble:
// InputDoubleRegister(1)=InputDoubleRegister(0)/InputDoubleRegister(1)
if (i.OutputDoubleRegister().is(i.InputDoubleRegister(1))) {
__ ldr(kScratchDoubleReg, i.InputDoubleRegister(1));
__ ldr(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
__ ddbr(i.OutputDoubleRegister(), kScratchDoubleReg);
} else {
if (!i.OutputDoubleRegister().is(i.InputDoubleRegister(0)))
__ ldr(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
__ ddbr(i.OutputDoubleRegister(), i.InputDoubleRegister(1));
}
break;
case kS390_Mod32:
ASSEMBLE_MODULO(dr, srda);
break;
case kS390_ModU32:
ASSEMBLE_MODULO(dlr, srdl);
break;
#if V8_TARGET_ARCH_S390X
case kS390_Mod64:
__ LoadRR(r1, i.InputRegister(0));
__ dsgr(r0, i.InputRegister(1)); // R1: Dividend
__ ltgr(i.OutputRegister(), r0); // Copy R0: Remainder to output
break;
case kS390_ModU64:
__ LoadRR(r1, i.InputRegister(0));
__ LoadImmP(r0, Operand::Zero());
__ dlgr(r0, i.InputRegister(1)); // R0:R1: Dividend
__ ltgr(i.OutputRegister(), r0); // Copy R0: Remainder to output
break;
#endif
case kS390_AbsFloat:
__ lpebr(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
break;
case kS390_SqrtFloat:
ASSEMBLE_FLOAT_UNOP(sqebr);
break;
case kS390_FloorFloat:
__ fiebra(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
v8::internal::Assembler::FIDBRA_ROUND_TOWARD_NEG_INF);
break;
case kS390_CeilFloat:
__ fiebra(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
v8::internal::Assembler::FIDBRA_ROUND_TOWARD_POS_INF);
break;
case kS390_TruncateFloat:
__ fiebra(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
v8::internal::Assembler::FIDBRA_ROUND_TOWARD_0);
break;
// Double operations
case kS390_ModDouble:
ASSEMBLE_FLOAT_MODULO();
break;
case kIeee754Float64Acos:
ASSEMBLE_IEEE754_UNOP(acos);
break;
case kIeee754Float64Acosh:
ASSEMBLE_IEEE754_UNOP(acosh);
break;
case kIeee754Float64Asin:
ASSEMBLE_IEEE754_UNOP(asin);
break;
case kIeee754Float64Asinh:
ASSEMBLE_IEEE754_UNOP(asinh);
break;
case kIeee754Float64Atanh:
ASSEMBLE_IEEE754_UNOP(atanh);
break;
case kIeee754Float64Atan:
ASSEMBLE_IEEE754_UNOP(atan);
break;
case kIeee754Float64Atan2:
ASSEMBLE_IEEE754_BINOP(atan2);
break;
case kIeee754Float64Tan:
ASSEMBLE_IEEE754_UNOP(tan);
break;
case kIeee754Float64Tanh:
ASSEMBLE_IEEE754_UNOP(tanh);
break;
case kIeee754Float64Cbrt:
ASSEMBLE_IEEE754_UNOP(cbrt);
break;
case kIeee754Float64Sin:
ASSEMBLE_IEEE754_UNOP(sin);
break;
case kIeee754Float64Sinh:
ASSEMBLE_IEEE754_UNOP(sinh);
break;
case kIeee754Float64Cos:
ASSEMBLE_IEEE754_UNOP(cos);
break;
case kIeee754Float64Cosh:
ASSEMBLE_IEEE754_UNOP(cosh);
break;
case kIeee754Float64Exp:
ASSEMBLE_IEEE754_UNOP(exp);
break;
case kIeee754Float64Expm1:
ASSEMBLE_IEEE754_UNOP(expm1);
break;
case kIeee754Float64Log:
ASSEMBLE_IEEE754_UNOP(log);
break;
case kIeee754Float64Log1p:
ASSEMBLE_IEEE754_UNOP(log1p);
break;
case kIeee754Float64Log2:
ASSEMBLE_IEEE754_UNOP(log2);
break;
case kIeee754Float64Log10:
ASSEMBLE_IEEE754_UNOP(log10);
break;
case kIeee754Float64Pow: {
MathPowStub stub(isolate(), MathPowStub::DOUBLE);
__ CallStub(&stub);
__ Move(d1, d3);
break;
}
case kS390_Neg32:
__ lcr(i.OutputRegister(), i.InputRegister(0));
__ LoadW(i.OutputRegister(), i.OutputRegister());
break;
case kS390_Neg64:
__ lcgr(i.OutputRegister(), i.InputRegister(0));
break;
case kS390_MaxDouble:
ASSEMBLE_FLOAT_MAX();
break;
case kS390_MinDouble:
ASSEMBLE_FLOAT_MIN();
break;
case kS390_AbsDouble:
__ lpdbr(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
break;
case kS390_SqrtDouble:
ASSEMBLE_FLOAT_UNOP(sqdbr);
break;
case kS390_FloorDouble:
__ fidbra(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
v8::internal::Assembler::FIDBRA_ROUND_TOWARD_NEG_INF);
break;
case kS390_CeilDouble:
__ fidbra(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
v8::internal::Assembler::FIDBRA_ROUND_TOWARD_POS_INF);
break;
case kS390_TruncateDouble:
__ fidbra(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
v8::internal::Assembler::FIDBRA_ROUND_TOWARD_0);
break;
case kS390_RoundDouble:
__ fidbra(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
v8::internal::Assembler::FIDBRA_ROUND_TO_NEAREST_AWAY_FROM_0);
break;
case kS390_NegFloat:
ASSEMBLE_FLOAT_UNOP(lcebr);
break;
case kS390_NegDouble:
ASSEMBLE_FLOAT_UNOP(lcdbr);
break;
case kS390_Cntlz32: {
__ llgfr(i.OutputRegister(), i.InputRegister(0));
__ flogr(r0, i.OutputRegister());
__ LoadRR(i.OutputRegister(), r0);
__ SubP(i.OutputRegister(), Operand(32));
} break;
#if V8_TARGET_ARCH_S390X
case kS390_Cntlz64: {
__ flogr(r0, i.InputRegister(0));
__ LoadRR(i.OutputRegister(), r0);
} break;
#endif
case kS390_Popcnt32:
__ Popcnt32(i.OutputRegister(), i.InputRegister(0));
break;
#if V8_TARGET_ARCH_S390X
case kS390_Popcnt64:
__ Popcnt64(i.OutputRegister(), i.InputRegister(0));
break;
#endif
case kS390_Cmp32:
ASSEMBLE_COMPARE(Cmp32, CmpLogical32);
break;
#if V8_TARGET_ARCH_S390X
case kS390_Cmp64:
ASSEMBLE_COMPARE(CmpP, CmpLogicalP);
break;
#endif
case kS390_CmpFloat:
__ cebr(i.InputDoubleRegister(0), i.InputDoubleRegister(1));
break;
case kS390_CmpDouble:
__ cdbr(i.InputDoubleRegister(0), i.InputDoubleRegister(1));
break;
case kS390_Tst32:
if (HasRegisterInput(instr, 1)) {
__ AndP(r0, i.InputRegister(0), i.InputRegister(1));
} else {
__ AndP(r0, i.InputRegister(0), i.InputImmediate(1));
}
__ LoadAndTestP_ExtendSrc(r0, r0);
break;
#if V8_TARGET_ARCH_S390X
case kS390_Tst64:
if (HasRegisterInput(instr, 1)) {
__ AndP(r0, i.InputRegister(0), i.InputRegister(1));
} else {
__ AndP(r0, i.InputRegister(0), i.InputImmediate(1));
}
break;
#endif
case kS390_Float64SilenceNaN: {
DoubleRegister value = i.InputDoubleRegister(0);
DoubleRegister result = i.OutputDoubleRegister();
__ CanonicalizeNaN(result, value);
break;
}
case kS390_Push:
if (instr->InputAt(0)->IsFPRegister()) {
__ lay(sp, MemOperand(sp, -kDoubleSize));
__ StoreDouble(i.InputDoubleRegister(0), MemOperand(sp));
frame_access_state()->IncreaseSPDelta(kDoubleSize / kPointerSize);
} else {
__ Push(i.InputRegister(0));
frame_access_state()->IncreaseSPDelta(1);
}
break;
case kS390_PushFrame: {
int num_slots = i.InputInt32(1);
__ lay(sp, MemOperand(sp, -num_slots * kPointerSize));
if (instr->InputAt(0)->IsFPRegister()) {
LocationOperand* op = LocationOperand::cast(instr->InputAt(0));
if (op->representation() == MachineRepresentation::kFloat64) {
__ StoreDouble(i.InputDoubleRegister(0), MemOperand(sp));
} else {
DCHECK(op->representation() == MachineRepresentation::kFloat32);
__ StoreFloat32(i.InputDoubleRegister(0), MemOperand(sp));
}
} else {
__ StoreP(i.InputRegister(0),
MemOperand(sp));
}
break;
}
case kS390_StoreToStackSlot: {
int slot = i.InputInt32(1);
if (instr->InputAt(0)->IsFPRegister()) {
LocationOperand* op = LocationOperand::cast(instr->InputAt(0));
if (op->representation() == MachineRepresentation::kFloat64) {
__ StoreDouble(i.InputDoubleRegister(0),
MemOperand(sp, slot * kPointerSize));
} else {
DCHECK(op->representation() == MachineRepresentation::kFloat32);
__ StoreFloat32(i.InputDoubleRegister(0),
MemOperand(sp, slot * kPointerSize));
}
} else {
__ StoreP(i.InputRegister(0), MemOperand(sp, slot * kPointerSize));
}
break;
}
case kS390_ExtendSignWord8:
#if V8_TARGET_ARCH_S390X
__ lgbr(i.OutputRegister(), i.InputRegister(0));
#else
__ lbr(i.OutputRegister(), i.InputRegister(0));
#endif
break;
case kS390_ExtendSignWord16:
#if V8_TARGET_ARCH_S390X
__ lghr(i.OutputRegister(), i.InputRegister(0));
#else
__ lhr(i.OutputRegister(), i.InputRegister(0));
#endif
break;
#if V8_TARGET_ARCH_S390X
case kS390_ExtendSignWord32:
__ lgfr(i.OutputRegister(), i.InputRegister(0));
break;
case kS390_Uint32ToUint64:
// Zero extend
__ llgfr(i.OutputRegister(), i.InputRegister(0));
break;
case kS390_Int64ToInt32:
// sign extend
__ lgfr(i.OutputRegister(), i.InputRegister(0));
break;
case kS390_Int64ToFloat32:
__ ConvertInt64ToFloat(i.InputRegister(0), i.OutputDoubleRegister());
break;
case kS390_Int64ToDouble:
__ ConvertInt64ToDouble(i.InputRegister(0), i.OutputDoubleRegister());
break;
case kS390_Uint64ToFloat32:
__ ConvertUnsignedInt64ToFloat(i.InputRegister(0),
i.OutputDoubleRegister());
break;
case kS390_Uint64ToDouble:
__ ConvertUnsignedInt64ToDouble(i.InputRegister(0),
i.OutputDoubleRegister());
break;
#endif
case kS390_Int32ToFloat32:
__ ConvertIntToFloat(i.InputRegister(0), i.OutputDoubleRegister());
break;
case kS390_Int32ToDouble:
__ ConvertIntToDouble(i.InputRegister(0), i.OutputDoubleRegister());
break;
case kS390_Uint32ToFloat32:
__ ConvertUnsignedIntToFloat(i.InputRegister(0),
i.OutputDoubleRegister());
break;
case kS390_Uint32ToDouble:
__ ConvertUnsignedIntToDouble(i.InputRegister(0),
i.OutputDoubleRegister());
break;
case kS390_DoubleToInt32:
case kS390_DoubleToUint32:
case kS390_DoubleToInt64: {
#if V8_TARGET_ARCH_S390X
bool check_conversion =
(opcode == kS390_DoubleToInt64 && i.OutputCount() > 1);
#endif
__ ConvertDoubleToInt64(i.InputDoubleRegister(0),
#if !V8_TARGET_ARCH_S390X
kScratchReg,
#endif
i.OutputRegister(0), kScratchDoubleReg);
#if V8_TARGET_ARCH_S390X
if (check_conversion) {
Label conversion_done;
__ LoadImmP(i.OutputRegister(1), Operand::Zero());
__ b(Condition(1), &conversion_done); // special case
__ LoadImmP(i.OutputRegister(1), Operand(1));
__ bind(&conversion_done);
}
#endif
break;
}
case kS390_Float32ToInt32: {
bool check_conversion = (i.OutputCount() > 1);
__ ConvertFloat32ToInt32(i.InputDoubleRegister(0), i.OutputRegister(0),
kScratchDoubleReg, kRoundToZero);
if (check_conversion) {
Label conversion_done;
__ LoadImmP(i.OutputRegister(1), Operand::Zero());
__ b(Condition(1), &conversion_done); // special case
__ LoadImmP(i.OutputRegister(1), Operand(1));
__ bind(&conversion_done);
}
break;
}
case kS390_Float32ToUint32: {
bool check_conversion = (i.OutputCount() > 1);
__ ConvertFloat32ToUnsignedInt32(i.InputDoubleRegister(0),
i.OutputRegister(0), kScratchDoubleReg);
if (check_conversion) {
Label conversion_done;
__ LoadImmP(i.OutputRegister(1), Operand::Zero());
__ b(Condition(1), &conversion_done); // special case
__ LoadImmP(i.OutputRegister(1), Operand(1));
__ bind(&conversion_done);
}
break;
}
#if V8_TARGET_ARCH_S390X
case kS390_Float32ToUint64: {
bool check_conversion = (i.OutputCount() > 1);
__ ConvertFloat32ToUnsignedInt64(i.InputDoubleRegister(0),
i.OutputRegister(0), kScratchDoubleReg);
if (check_conversion) {
Label conversion_done;
__ LoadImmP(i.OutputRegister(1), Operand::Zero());
__ b(Condition(1), &conversion_done); // special case
__ LoadImmP(i.OutputRegister(1), Operand(1));
__ bind(&conversion_done);
}
break;
}
#endif
case kS390_Float32ToInt64: {
#if V8_TARGET_ARCH_S390X
bool check_conversion =
(opcode == kS390_Float32ToInt64 && i.OutputCount() > 1);
#endif
__ ConvertFloat32ToInt64(i.InputDoubleRegister(0),
#if !V8_TARGET_ARCH_S390X
kScratchReg,
#endif
i.OutputRegister(0), kScratchDoubleReg);
#if V8_TARGET_ARCH_S390X
if (check_conversion) {
Label conversion_done;
__ LoadImmP(i.OutputRegister(1), Operand::Zero());
__ b(Condition(1), &conversion_done); // special case
__ LoadImmP(i.OutputRegister(1), Operand(1));
__ bind(&conversion_done);
}
#endif
break;
}
#if V8_TARGET_ARCH_S390X
case kS390_DoubleToUint64: {
bool check_conversion = (i.OutputCount() > 1);
__ ConvertDoubleToUnsignedInt64(i.InputDoubleRegister(0),
i.OutputRegister(0), kScratchDoubleReg);
if (check_conversion) {
Label conversion_done;
__ LoadImmP(i.OutputRegister(1), Operand::Zero());
__ b(Condition(1), &conversion_done); // special case
__ LoadImmP(i.OutputRegister(1), Operand(1));
__ bind(&conversion_done);
}
break;
}
#endif
case kS390_DoubleToFloat32:
__ ledbr(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
break;
case kS390_Float32ToDouble:
__ ldebr(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
break;
case kS390_DoubleExtractLowWord32:
__ lgdr(i.OutputRegister(), i.InputDoubleRegister(0));
__ llgfr(i.OutputRegister(), i.OutputRegister());
break;
case kS390_DoubleExtractHighWord32:
__ lgdr(i.OutputRegister(), i.InputDoubleRegister(0));
__ srlg(i.OutputRegister(), i.OutputRegister(), Operand(32));
break;
case kS390_DoubleInsertLowWord32:
__ lgdr(kScratchReg, i.OutputDoubleRegister());
__ lr(kScratchReg, i.InputRegister(1));
__ ldgr(i.OutputDoubleRegister(), kScratchReg);
break;
case kS390_DoubleInsertHighWord32:
__ sllg(kScratchReg, i.InputRegister(1), Operand(32));
__ lgdr(r0, i.OutputDoubleRegister());
__ lr(kScratchReg, r0);
__ ldgr(i.OutputDoubleRegister(), kScratchReg);
break;
case kS390_DoubleConstruct:
__ sllg(kScratchReg, i.InputRegister(0), Operand(32));
__ lr(kScratchReg, i.InputRegister(1));
// Bitwise convert from GPR to FPR
__ ldgr(i.OutputDoubleRegister(), kScratchReg);
break;
case kS390_LoadWordS8:
ASSEMBLE_LOAD_INTEGER(LoadlB);
#if V8_TARGET_ARCH_S390X
__ lgbr(i.OutputRegister(), i.OutputRegister());
#else
__ lbr(i.OutputRegister(), i.OutputRegister());
#endif
break;
case kS390_BitcastFloat32ToInt32:
__ MovFloatToInt(i.OutputRegister(), i.InputDoubleRegister(0));
break;
case kS390_BitcastInt32ToFloat32:
__ MovIntToFloat(i.OutputDoubleRegister(), i.InputRegister(0));
break;
#if V8_TARGET_ARCH_S390X
case kS390_BitcastDoubleToInt64:
__ MovDoubleToInt64(i.OutputRegister(), i.InputDoubleRegister(0));
break;
case kS390_BitcastInt64ToDouble:
__ MovInt64ToDouble(i.OutputDoubleRegister(), i.InputRegister(0));
break;
#endif
case kS390_LoadWordU8:
ASSEMBLE_LOAD_INTEGER(LoadlB);
break;
case kS390_LoadWordU16:
ASSEMBLE_LOAD_INTEGER(LoadLogicalHalfWordP);
break;
case kS390_LoadWordS16:
ASSEMBLE_LOAD_INTEGER(LoadHalfWordP);
break;
case kS390_LoadWordU32:
ASSEMBLE_LOAD_INTEGER(LoadlW);
break;
case kS390_LoadWordS32:
ASSEMBLE_LOAD_INTEGER(LoadW);
break;
case kS390_LoadReverse16:
ASSEMBLE_LOAD_INTEGER(lrvh);
break;
case kS390_LoadReverse32:
ASSEMBLE_LOAD_INTEGER(lrv);
break;
case kS390_LoadReverse64:
ASSEMBLE_LOAD_INTEGER(lrvg);
break;
case kS390_LoadReverse16RR:
__ lrvr(i.OutputRegister(), i.InputRegister(0));
__ rll(i.OutputRegister(), i.OutputRegister(), Operand(16));
break;
case kS390_LoadReverse32RR:
__ lrvr(i.OutputRegister(), i.InputRegister(0));
break;
case kS390_LoadReverse64RR:
__ lrvgr(i.OutputRegister(), i.InputRegister(0));
break;
#if V8_TARGET_ARCH_S390X
case kS390_LoadWord64:
ASSEMBLE_LOAD_INTEGER(lg);
break;
#endif
case kS390_LoadFloat32:
ASSEMBLE_LOAD_FLOAT(LoadFloat32);
break;
case kS390_LoadDouble:
ASSEMBLE_LOAD_FLOAT(LoadDouble);
break;
case kS390_StoreWord8:
ASSEMBLE_STORE_INTEGER(StoreByte);
break;
case kS390_StoreWord16:
ASSEMBLE_STORE_INTEGER(StoreHalfWord);
break;
case kS390_StoreWord32:
ASSEMBLE_STORE_INTEGER(StoreW);
break;
#if V8_TARGET_ARCH_S390X
case kS390_StoreWord64:
ASSEMBLE_STORE_INTEGER(StoreP);
break;
#endif
case kS390_StoreReverse16:
ASSEMBLE_STORE_INTEGER(strvh);
break;
case kS390_StoreReverse32:
ASSEMBLE_STORE_INTEGER(strv);
break;
case kS390_StoreReverse64:
ASSEMBLE_STORE_INTEGER(strvg);
break;
case kS390_StoreFloat32:
ASSEMBLE_STORE_FLOAT32();
break;
case kS390_StoreDouble:
ASSEMBLE_STORE_DOUBLE();
break;
case kCheckedLoadInt8:
ASSEMBLE_CHECKED_LOAD_INTEGER(LoadlB);
#if V8_TARGET_ARCH_S390X
__ lgbr(i.OutputRegister(), i.OutputRegister());
#else
__ lbr(i.OutputRegister(), i.OutputRegister());
#endif
break;
case kCheckedLoadUint8:
ASSEMBLE_CHECKED_LOAD_INTEGER(LoadlB);
break;
case kCheckedLoadInt16:
ASSEMBLE_CHECKED_LOAD_INTEGER(LoadHalfWordP);
break;
case kCheckedLoadUint16:
ASSEMBLE_CHECKED_LOAD_INTEGER(LoadLogicalHalfWordP);
break;
case kCheckedLoadWord32:
ASSEMBLE_CHECKED_LOAD_INTEGER(LoadlW);
break;
case kCheckedLoadWord64:
#if V8_TARGET_ARCH_S390X
ASSEMBLE_CHECKED_LOAD_INTEGER(LoadP);
#else
UNREACHABLE();
#endif
break;
case kCheckedLoadFloat32:
ASSEMBLE_CHECKED_LOAD_FLOAT(LoadFloat32, 32);
break;
case kCheckedLoadFloat64:
ASSEMBLE_CHECKED_LOAD_FLOAT(LoadDouble, 64);
break;
case kCheckedStoreWord8:
ASSEMBLE_CHECKED_STORE_INTEGER(StoreByte);
break;
case kCheckedStoreWord16:
ASSEMBLE_CHECKED_STORE_INTEGER(StoreHalfWord);
break;
case kCheckedStoreWord32:
ASSEMBLE_CHECKED_STORE_INTEGER(StoreW);
break;
case kCheckedStoreWord64:
#if V8_TARGET_ARCH_S390X
ASSEMBLE_CHECKED_STORE_INTEGER(StoreP);
#else
UNREACHABLE();
#endif
break;
case kCheckedStoreFloat32:
ASSEMBLE_CHECKED_STORE_FLOAT32();
break;
case kCheckedStoreFloat64:
ASSEMBLE_CHECKED_STORE_DOUBLE();
break;
case kAtomicLoadInt8:
__ LoadB(i.OutputRegister(), i.MemoryOperand());
break;
case kAtomicLoadUint8:
__ LoadlB(i.OutputRegister(), i.MemoryOperand());
break;
case kAtomicLoadInt16:
__ LoadHalfWordP(i.OutputRegister(), i.MemoryOperand());
break;
case kAtomicLoadUint16:
__ LoadLogicalHalfWordP(i.OutputRegister(), i.MemoryOperand());
break;
case kAtomicLoadWord32:
__ LoadlW(i.OutputRegister(), i.MemoryOperand());
break;
case kAtomicStoreWord8:
__ StoreByte(i.InputRegister(0), i.MemoryOperand(NULL, 1));
break;
case kAtomicStoreWord16:
__ StoreHalfWord(i.InputRegister(0), i.MemoryOperand(NULL, 1));
break;
case kAtomicStoreWord32:
__ StoreW(i.InputRegister(0), i.MemoryOperand(NULL, 1));
break;
default:
UNREACHABLE();
break;
}
return kSuccess;
} // NOLINT(readability/fn_size)
// Assembles branches after an instruction.
void CodeGenerator::AssembleArchBranch(Instruction* instr, BranchInfo* branch) {
S390OperandConverter i(this, instr);
Label* tlabel = branch->true_label;
Label* flabel = branch->false_label;
ArchOpcode op = instr->arch_opcode();
FlagsCondition condition = branch->condition;
Condition cond = FlagsConditionToCondition(condition, op);
if (op == kS390_CmpDouble) {
// check for unordered if necessary
// Branching to flabel/tlabel according to what's expected by tests
if (cond == le || cond == eq || cond == lt) {
__ bunordered(flabel);
} else if (cond == gt || cond == ne || cond == ge) {
__ bunordered(tlabel);
}
}
__ b(cond, tlabel);
if (!branch->fallthru) __ b(flabel); // no fallthru to flabel.
}
void CodeGenerator::AssembleArchJump(RpoNumber target) {
if (!IsNextInAssemblyOrder(target)) __ b(GetLabel(target));
}
// Assembles boolean materializations after an instruction.
void CodeGenerator::AssembleArchBoolean(Instruction* instr,
FlagsCondition condition) {
S390OperandConverter i(this, instr);
ArchOpcode op = instr->arch_opcode();
bool check_unordered = (op == kS390_CmpDouble || op == kS390_CmpFloat);
// Overflow checked for add/sub only.
DCHECK((condition != kOverflow && condition != kNotOverflow) ||
(op == kS390_Add32 || kS390_Add64 || op == kS390_Sub32 ||
op == kS390_Sub64));
// Materialize a full 32-bit 1 or 0 value. The result register is always the
// last output of the instruction.
DCHECK_NE(0u, instr->OutputCount());
Register reg = i.OutputRegister(instr->OutputCount() - 1);
Condition cond = FlagsConditionToCondition(condition, op);
Label done;
if (check_unordered) {
__ LoadImmP(reg, (cond == eq || cond == le || cond == lt) ? Operand::Zero()
: Operand(1));
__ bunordered(&done);
}
__ LoadImmP(reg, Operand::Zero());
__ LoadImmP(kScratchReg, Operand(1));
// locr is sufficient since reg's upper 32 is guarrantee to be 0
__ locr(cond, reg, kScratchReg);
__ bind(&done);
}
void CodeGenerator::AssembleArchLookupSwitch(Instruction* instr) {
S390OperandConverter i(this, instr);
Register input = i.InputRegister(0);
for (size_t index = 2; index < instr->InputCount(); index += 2) {
__ Cmp32(input, Operand(i.InputInt32(index + 0)));
__ beq(GetLabel(i.InputRpo(index + 1)));
}
AssembleArchJump(i.InputRpo(1));
}
void CodeGenerator::AssembleArchTableSwitch(Instruction* instr) {
S390OperandConverter i(this, instr);
Register input = i.InputRegister(0);
int32_t const case_count = static_cast<int32_t>(instr->InputCount() - 2);
Label** cases = zone()->NewArray<Label*>(case_count);
for (int32_t index = 0; index < case_count; ++index) {
cases[index] = GetLabel(i.InputRpo(index + 2));
}
Label* const table = AddJumpTable(cases, case_count);
__ CmpLogicalP(input, Operand(case_count));
__ bge(GetLabel(i.InputRpo(1)));
__ larl(kScratchReg, table);
__ ShiftLeftP(r1, input, Operand(kPointerSizeLog2));
__ LoadP(kScratchReg, MemOperand(kScratchReg, r1));
__ Jump(kScratchReg);
}
CodeGenerator::CodeGenResult CodeGenerator::AssembleDeoptimizerCall(
int deoptimization_id, Deoptimizer::BailoutType bailout_type) {
Address deopt_entry = Deoptimizer::GetDeoptimizationEntry(
isolate(), deoptimization_id, bailout_type);
// TODO(turbofan): We should be able to generate better code by sharing the
// actual final call site and just bl'ing to it here, similar to what we do
// in the lithium backend.
if (deopt_entry == nullptr) return kTooManyDeoptimizationBailouts;
DeoptimizeReason deoptimization_reason =
GetDeoptimizationReason(deoptimization_id);
__ RecordDeoptReason(deoptimization_reason, 0, deoptimization_id);
__ Call(deopt_entry, RelocInfo::RUNTIME_ENTRY);
return kSuccess;
}
void CodeGenerator::FinishFrame(Frame* frame) {
CallDescriptor* descriptor = linkage()->GetIncomingDescriptor();
const RegList double_saves = descriptor->CalleeSavedFPRegisters();
// Save callee-saved Double registers.
if (double_saves != 0) {
frame->AlignSavedCalleeRegisterSlots();
DCHECK(kNumCalleeSavedDoubles ==
base::bits::CountPopulation32(double_saves));
frame->AllocateSavedCalleeRegisterSlots(kNumCalleeSavedDoubles *
(kDoubleSize / kPointerSize));
}
// Save callee-saved registers.
const RegList saves = descriptor->CalleeSavedRegisters();
if (saves != 0) {
// register save area does not include the fp or constant pool pointer.
const int num_saves = kNumCalleeSaved - 1;
DCHECK(num_saves == base::bits::CountPopulation32(saves));
frame->AllocateSavedCalleeRegisterSlots(num_saves);
}
}
void CodeGenerator::AssembleConstructFrame() {
CallDescriptor* descriptor = linkage()->GetIncomingDescriptor();
if (frame_access_state()->has_frame()) {
if (descriptor->IsCFunctionCall()) {
__ Push(r14, fp);
__ LoadRR(fp, sp);
} else if (descriptor->IsJSFunctionCall()) {
__ Prologue(this->info()->GeneratePreagedPrologue(), ip);
} else {
StackFrame::Type type = info()->GetOutputStackFrameType();
// TODO(mbrandy): Detect cases where ip is the entrypoint (for
// efficient intialization of the constant pool pointer register).
__ StubPrologue(type);
}
}
int shrink_slots = frame()->GetSpillSlotCount();
if (info()->is_osr()) {
// TurboFan OSR-compiled functions cannot be entered directly.
__ Abort(kShouldNotDirectlyEnterOsrFunction);
// Unoptimized code jumps directly to this entrypoint while the unoptimized
// frame is still on the stack. Optimized code uses OSR values directly from
// the unoptimized frame. Thus, all that needs to be done is to allocate the
// remaining stack slots.
if (FLAG_code_comments) __ RecordComment("-- OSR entrypoint --");
osr_pc_offset_ = __ pc_offset();
shrink_slots -= OsrHelper(info()).UnoptimizedFrameSlots();
}
const RegList double_saves = descriptor->CalleeSavedFPRegisters();
if (shrink_slots > 0) {
__ lay(sp, MemOperand(sp, -shrink_slots * kPointerSize));
}
// Save callee-saved Double registers.
if (double_saves != 0) {
__ MultiPushDoubles(double_saves);
DCHECK(kNumCalleeSavedDoubles ==
base::bits::CountPopulation32(double_saves));
}
// Save callee-saved registers.
const RegList saves = descriptor->CalleeSavedRegisters();
if (saves != 0) {
__ MultiPush(saves);
// register save area does not include the fp or constant pool pointer.
}
}
void CodeGenerator::AssembleReturn() {
CallDescriptor* descriptor = linkage()->GetIncomingDescriptor();
int pop_count = static_cast<int>(descriptor->StackParameterCount());
// Restore registers.
const RegList saves = descriptor->CalleeSavedRegisters();
if (saves != 0) {
__ MultiPop(saves);
}
// Restore double registers.
const RegList double_saves = descriptor->CalleeSavedFPRegisters();
if (double_saves != 0) {
__ MultiPopDoubles(double_saves);
}
if (descriptor->IsCFunctionCall()) {
AssembleDeconstructFrame();
} else if (frame_access_state()->has_frame()) {
// Canonicalize JSFunction return sites for now.
if (return_label_.is_bound()) {
__ b(&return_label_);
return;
} else {
__ bind(&return_label_);
AssembleDeconstructFrame();
}
}
__ Ret(pop_count);
}
void CodeGenerator::AssembleMove(InstructionOperand* source,
InstructionOperand* destination) {
S390OperandConverter g(this, nullptr);
// Dispatch on the source and destination operand kinds. Not all
// combinations are possible.
if (source->IsRegister()) {
DCHECK(destination->IsRegister() || destination->IsStackSlot());
Register src = g.ToRegister(source);
if (destination->IsRegister()) {
__ Move(g.ToRegister(destination), src);
} else {
__ StoreP(src, g.ToMemOperand(destination));
}
} else if (source->IsStackSlot()) {
DCHECK(destination->IsRegister() || destination->IsStackSlot());
MemOperand src = g.ToMemOperand(source);
if (destination->IsRegister()) {
__ LoadP(g.ToRegister(destination), src);
} else {
Register temp = kScratchReg;
__ LoadP(temp, src, r0);
__ StoreP(temp, g.ToMemOperand(destination));
}
} else if (source->IsConstant()) {
Constant src = g.ToConstant(source);
if (destination->IsRegister() || destination->IsStackSlot()) {
Register dst =
destination->IsRegister() ? g.ToRegister(destination) : kScratchReg;
switch (src.type()) {
case Constant::kInt32:
#if V8_TARGET_ARCH_S390X
if (src.rmode() == RelocInfo::WASM_MEMORY_SIZE_REFERENCE) {
#else
if (src.rmode() == RelocInfo::WASM_MEMORY_REFERENCE ||
src.rmode() == RelocInfo::WASM_GLOBAL_REFERENCE ||
src.rmode() == RelocInfo::WASM_MEMORY_SIZE_REFERENCE) {
#endif
__ mov(dst, Operand(src.ToInt32(), src.rmode()));
} else {
__ mov(dst, Operand(src.ToInt32()));
}
break;
case Constant::kInt64:
#if V8_TARGET_ARCH_S390X
if (src.rmode() == RelocInfo::WASM_MEMORY_REFERENCE ||
src.rmode() == RelocInfo::WASM_GLOBAL_REFERENCE) {
__ mov(dst, Operand(src.ToInt64(), src.rmode()));
} else {
DCHECK(src.rmode() != RelocInfo::WASM_MEMORY_SIZE_REFERENCE);
__ mov(dst, Operand(src.ToInt64()));
}
#else
__ mov(dst, Operand(src.ToInt64()));
#endif // V8_TARGET_ARCH_S390X
break;
case Constant::kFloat32:
__ Move(dst,
isolate()->factory()->NewNumber(src.ToFloat32(), TENURED));
break;
case Constant::kFloat64:
__ Move(dst,
isolate()->factory()->NewNumber(src.ToFloat64(), TENURED));
break;
case Constant::kExternalReference:
__ mov(dst, Operand(src.ToExternalReference()));
break;
case Constant::kHeapObject: {
Handle<HeapObject> src_object = src.ToHeapObject();
Heap::RootListIndex index;
int slot;
if (IsMaterializableFromFrame(src_object, &slot)) {
__ LoadP(dst, g.SlotToMemOperand(slot));
} else if (IsMaterializableFromRoot(src_object, &index)) {
__ LoadRoot(dst, index);
} else {
__ Move(dst, src_object);
}
break;
}
case Constant::kRpoNumber:
UNREACHABLE(); // TODO(dcarney): loading RPO constants on S390.
break;
}
if (destination->IsStackSlot()) {
__ StoreP(dst, g.ToMemOperand(destination), r0);
}
} else {
DoubleRegister dst = destination->IsFPRegister()
? g.ToDoubleRegister(destination)
: kScratchDoubleReg;
double value = (src.type() == Constant::kFloat32) ? src.ToFloat32()
: src.ToFloat64();
if (src.type() == Constant::kFloat32) {
__ LoadFloat32Literal(dst, src.ToFloat32(), kScratchReg);
} else {
__ LoadDoubleLiteral(dst, value, kScratchReg);
}
if (destination->IsFPStackSlot()) {
__ StoreDouble(dst, g.ToMemOperand(destination));
}
}
} else if (source->IsFPRegister()) {
DoubleRegister src = g.ToDoubleRegister(source);
if (destination->IsFPRegister()) {
DoubleRegister dst = g.ToDoubleRegister(destination);
__ Move(dst, src);
} else {
DCHECK(destination->IsFPStackSlot());
LocationOperand* op = LocationOperand::cast(source);
if (op->representation() == MachineRepresentation::kFloat64) {
__ StoreDouble(src, g.ToMemOperand(destination));
} else {
__ StoreFloat32(src, g.ToMemOperand(destination));
}
}
} else if (source->IsFPStackSlot()) {
DCHECK(destination->IsFPRegister() || destination->IsFPStackSlot());
MemOperand src = g.ToMemOperand(source);
if (destination->IsFPRegister()) {
LocationOperand* op = LocationOperand::cast(source);
if (op->representation() == MachineRepresentation::kFloat64) {
__ LoadDouble(g.ToDoubleRegister(destination), src);
} else {
__ LoadFloat32(g.ToDoubleRegister(destination), src);
}
} else {
LocationOperand* op = LocationOperand::cast(source);
DoubleRegister temp = kScratchDoubleReg;
if (op->representation() == MachineRepresentation::kFloat64) {
__ LoadDouble(temp, src);
__ StoreDouble(temp, g.ToMemOperand(destination));
} else {
__ LoadFloat32(temp, src);
__ StoreFloat32(temp, g.ToMemOperand(destination));
}
}
} else {
UNREACHABLE();
}
}
void CodeGenerator::AssembleSwap(InstructionOperand* source,
InstructionOperand* destination) {
S390OperandConverter g(this, nullptr);
// Dispatch on the source and destination operand kinds. Not all
// combinations are possible.
if (source->IsRegister()) {
// Register-register.
Register temp = kScratchReg;
Register src = g.ToRegister(source);
if (destination->IsRegister()) {
Register dst = g.ToRegister(destination);
__ LoadRR(temp, src);
__ LoadRR(src, dst);
__ LoadRR(dst, temp);
} else {
DCHECK(destination->IsStackSlot());
MemOperand dst = g.ToMemOperand(destination);
__ LoadRR(temp, src);
__ LoadP(src, dst);
__ StoreP(temp, dst);
}
#if V8_TARGET_ARCH_S390X
} else if (source->IsStackSlot() || source->IsFPStackSlot()) {
#else
} else if (source->IsStackSlot()) {
DCHECK(destination->IsStackSlot());
#endif
Register temp_0 = kScratchReg;
Register temp_1 = r0;
MemOperand src = g.ToMemOperand(source);
MemOperand dst = g.ToMemOperand(destination);
__ LoadP(temp_0, src);
__ LoadP(temp_1, dst);
__ StoreP(temp_0, dst);
__ StoreP(temp_1, src);
} else if (source->IsFPRegister()) {
DoubleRegister temp = kScratchDoubleReg;
DoubleRegister src = g.ToDoubleRegister(source);
if (destination->IsFPRegister()) {
DoubleRegister dst = g.ToDoubleRegister(destination);
__ ldr(temp, src);
__ ldr(src, dst);
__ ldr(dst, temp);
} else {
DCHECK(destination->IsFPStackSlot());
MemOperand dst = g.ToMemOperand(destination);
__ ldr(temp, src);
__ LoadDouble(src, dst);
__ StoreDouble(temp, dst);
}
#if !V8_TARGET_ARCH_S390X
} else if (source->IsFPStackSlot()) {
DCHECK(destination->IsFPStackSlot());
DoubleRegister temp_0 = kScratchDoubleReg;
DoubleRegister temp_1 = d0;
MemOperand src = g.ToMemOperand(source);
MemOperand dst = g.ToMemOperand(destination);
// TODO(joransiu): MVC opportunity
__ LoadDouble(temp_0, src);
__ LoadDouble(temp_1, dst);
__ StoreDouble(temp_0, dst);
__ StoreDouble(temp_1, src);
#endif
} else {
// No other combinations are possible.
UNREACHABLE();
}
}
void CodeGenerator::AssembleJumpTable(Label** targets, size_t target_count) {
for (size_t index = 0; index < target_count; ++index) {
__ emit_label_addr(targets[index]);
}
}
void CodeGenerator::EnsureSpaceForLazyDeopt() {
if (!info()->ShouldEnsureSpaceForLazyDeopt()) {
return;
}
int space_needed = Deoptimizer::patch_size();
// Ensure that we have enough space after the previous lazy-bailout
// instruction for patching the code here.
int current_pc = masm()->pc_offset();
if (current_pc < last_lazy_deopt_pc_ + space_needed) {
int padding_size = last_lazy_deopt_pc_ + space_needed - current_pc;
DCHECK_EQ(0, padding_size % 2);
while (padding_size > 0) {
__ nop();
padding_size -= 2;
}
}
}
#undef __
} // namespace compiler
} // namespace internal
} // namespace v8
|
export CG_BuildSolidList
code
proc CG_BuildSolidList 32 0
ADDRLP4 16
CNSTI4 0
ASGNI4
ADDRGP4 cg_numSolidEntities
ADDRLP4 16
INDIRI4
ASGNI4
ADDRGP4 cg_numTriggerEntities
ADDRLP4 16
INDIRI4
ASGNI4
ADDRGP4 cg+40
INDIRP4
CVPU4 4
CNSTU4 0
EQU4 $72
ADDRLP4 20
CNSTI4 0
ASGNI4
ADDRGP4 cg+107596
INDIRI4
ADDRLP4 20
INDIRI4
NEI4 $72
ADDRGP4 cg+107592
INDIRI4
ADDRLP4 20
INDIRI4
NEI4 $72
ADDRLP4 12
ADDRGP4 cg+40
INDIRP4
ASGNP4
ADDRGP4 $73
JUMPV
LABELV $72
ADDRLP4 12
ADDRGP4 cg+36
INDIRP4
ASGNP4
LABELV $73
ADDRLP4 8
CNSTI4 0
ASGNI4
ADDRGP4 $82
JUMPV
LABELV $79
ADDRLP4 0
CNSTI4 716
CNSTI4 208
ADDRLP4 8
INDIRI4
MULI4
ADDRLP4 12
INDIRP4
CNSTI4 516
ADDP4
ADDP4
INDIRI4
MULI4
ADDRGP4 cg_entities
ADDP4
ASGNP4
ADDRLP4 4
ADDRLP4 0
INDIRP4
ASGNP4
ADDRLP4 24
ADDRLP4 4
INDIRP4
CNSTI4 4
ADDP4
INDIRI4
ASGNI4
ADDRLP4 24
INDIRI4
CNSTI4 2
EQI4 $86
ADDRLP4 24
INDIRI4
CNSTI4 8
EQI4 $86
ADDRLP4 24
INDIRI4
CNSTI4 9
NEI4 $83
LABELV $86
ADDRGP4 cg_numTriggerEntities
INDIRI4
CNSTI4 2
LSHI4
ADDRGP4 cg_triggerEntities
ADDP4
ADDRLP4 0
INDIRP4
ASGNP4
ADDRLP4 28
ADDRGP4 cg_numTriggerEntities
ASGNP4
ADDRLP4 28
INDIRP4
ADDRLP4 28
INDIRP4
INDIRI4
CNSTI4 1
ADDI4
ASGNI4
ADDRGP4 $80
JUMPV
LABELV $83
ADDRLP4 0
INDIRP4
CNSTI4 384
ADDP4
INDIRI4
CNSTI4 0
EQI4 $87
ADDRGP4 cg_numSolidEntities
INDIRI4
CNSTI4 2
LSHI4
ADDRGP4 cg_solidEntities
ADDP4
ADDRLP4 0
INDIRP4
ASGNP4
ADDRLP4 28
ADDRGP4 cg_numSolidEntities
ASGNP4
ADDRLP4 28
INDIRP4
ADDRLP4 28
INDIRP4
INDIRI4
CNSTI4 1
ADDI4
ASGNI4
LABELV $87
LABELV $80
ADDRLP4 8
ADDRLP4 8
INDIRI4
CNSTI4 1
ADDI4
ASGNI4
LABELV $82
ADDRLP4 8
INDIRI4
ADDRLP4 12
INDIRP4
CNSTI4 512
ADDP4
INDIRI4
LTI4 $79
LABELV $71
endproc CG_BuildSolidList 32 0
proc CG_ClipMoveToEntities 152 36
ADDRFP4 0
ADDRFP4 0
INDIRP4
ASGNP4
ADDRFP4 4
ADDRFP4 4
INDIRP4
ASGNP4
ADDRFP4 8
ADDRFP4 8
INDIRP4
ASGNP4
ADDRFP4 12
ADDRFP4 12
INDIRP4
ASGNP4
ADDRFP4 16
ADDRFP4 16
INDIRI4
ASGNI4
ADDRFP4 20
ADDRFP4 20
INDIRI4
ASGNI4
ADDRFP4 24
ADDRFP4 24
INDIRP4
ASGNP4
ADDRLP4 64
CNSTI4 0
ASGNI4
ADDRGP4 $93
JUMPV
LABELV $90
ADDRLP4 60
ADDRLP4 64
INDIRI4
CNSTI4 2
LSHI4
ADDRGP4 cg_solidEntities
ADDP4
INDIRP4
ASGNP4
ADDRLP4 0
ADDRLP4 60
INDIRP4
ASGNP4
ADDRLP4 0
INDIRP4
INDIRI4
ADDRFP4 16
INDIRI4
NEI4 $94
ADDRGP4 $91
JUMPV
LABELV $94
ADDRLP4 0
INDIRP4
CNSTI4 176
ADDP4
INDIRI4
CNSTI4 16777215
NEI4 $96
ADDRLP4 0
INDIRP4
CNSTI4 160
ADDP4
INDIRI4
ARGI4
ADDRLP4 132
ADDRGP4 trap_CM_InlineModel
CALLI4
ASGNI4
ADDRLP4 68
ADDRLP4 132
INDIRI4
ASGNI4
ADDRLP4 108
ADDRLP4 60
INDIRP4
CNSTI4 704
ADDP4
INDIRB
ASGNB 12
ADDRLP4 60
INDIRP4
CNSTI4 12
ADDP4
ARGP4
ADDRGP4 cg+107612
INDIRI4
ARGI4
ADDRLP4 96
ARGP4
ADDRGP4 BG_EvaluateTrajectory
CALLV
pop
ADDRGP4 $97
JUMPV
LABELV $96
ADDRLP4 132
ADDRLP4 0
INDIRP4
CNSTI4 176
ADDP4
ASGNP4
ADDRLP4 136
CNSTI4 255
ASGNI4
ADDRLP4 120
ADDRLP4 132
INDIRP4
INDIRI4
ADDRLP4 136
INDIRI4
BANDI4
ASGNI4
ADDRLP4 124
ADDRLP4 132
INDIRP4
INDIRI4
CNSTI4 8
RSHI4
ADDRLP4 136
INDIRI4
BANDI4
ASGNI4
ADDRLP4 128
ADDRLP4 132
INDIRP4
INDIRI4
CNSTI4 16
RSHI4
ADDRLP4 136
INDIRI4
BANDI4
CNSTI4 32
SUBI4
ASGNI4
ADDRLP4 140
ADDRLP4 120
INDIRI4
NEGI4
CVIF4 4
ASGNF4
ADDRLP4 72+4
ADDRLP4 140
INDIRF4
ASGNF4
ADDRLP4 72
ADDRLP4 140
INDIRF4
ASGNF4
ADDRLP4 144
ADDRLP4 120
INDIRI4
CVIF4 4
ASGNF4
ADDRLP4 84+4
ADDRLP4 144
INDIRF4
ASGNF4
ADDRLP4 84
ADDRLP4 144
INDIRF4
ASGNF4
ADDRLP4 72+8
ADDRLP4 124
INDIRI4
NEGI4
CVIF4 4
ASGNF4
ADDRLP4 84+8
ADDRLP4 128
INDIRI4
CVIF4 4
ASGNF4
ADDRLP4 72
ARGP4
ADDRLP4 84
ARGP4
ADDRLP4 148
ADDRGP4 trap_CM_TempBoxModel
CALLI4
ASGNI4
ADDRLP4 68
ADDRLP4 148
INDIRI4
ASGNI4
ADDRLP4 108
ADDRGP4 vec3_origin
INDIRB
ASGNB 12
ADDRLP4 96
ADDRLP4 60
INDIRP4
CNSTI4 692
ADDP4
INDIRB
ASGNB 12
LABELV $97
ADDRLP4 4
ARGP4
ADDRFP4 0
INDIRP4
ARGP4
ADDRFP4 12
INDIRP4
ARGP4
ADDRFP4 4
INDIRP4
ARGP4
ADDRFP4 8
INDIRP4
ARGP4
ADDRLP4 68
INDIRI4
ARGI4
ADDRFP4 20
INDIRI4
ARGI4
ADDRLP4 96
ARGP4
ADDRLP4 108
ARGP4
ADDRGP4 trap_CM_TransformedBoxTrace
CALLV
pop
ADDRLP4 4
INDIRI4
CNSTI4 0
NEI4 $106
ADDRLP4 4+8
INDIRF4
ADDRFP4 24
INDIRP4
CNSTI4 8
ADDP4
INDIRF4
GEF4 $103
LABELV $106
ADDRLP4 4+52
ADDRLP4 0
INDIRP4
INDIRI4
ASGNI4
ADDRFP4 24
INDIRP4
ADDRLP4 4
INDIRB
ASGNB 56
ADDRGP4 $104
JUMPV
LABELV $103
ADDRLP4 4+4
INDIRI4
CNSTI4 0
EQI4 $108
ADDRFP4 24
INDIRP4
CNSTI4 4
ADDP4
CNSTI4 1
ASGNI4
LABELV $108
LABELV $104
ADDRFP4 24
INDIRP4
INDIRI4
CNSTI4 0
EQI4 $111
ADDRGP4 $89
JUMPV
LABELV $111
LABELV $91
ADDRLP4 64
ADDRLP4 64
INDIRI4
CNSTI4 1
ADDI4
ASGNI4
LABELV $93
ADDRLP4 64
INDIRI4
ADDRGP4 cg_numSolidEntities
INDIRI4
LTI4 $90
LABELV $89
endproc CG_ClipMoveToEntities 152 36
export CG_Trace
proc CG_Trace 60 28
ADDRLP4 0
ARGP4
ADDRFP4 4
INDIRP4
ARGP4
ADDRFP4 16
INDIRP4
ARGP4
ADDRFP4 8
INDIRP4
ARGP4
ADDRFP4 12
INDIRP4
ARGP4
CNSTI4 0
ARGI4
ADDRFP4 24
INDIRI4
ARGI4
ADDRGP4 trap_CM_BoxTrace
CALLV
pop
ADDRLP4 0+8
INDIRF4
CNSTF4 1065353216
EQF4 $117
ADDRLP4 56
CNSTI4 1022
ASGNI4
ADDRGP4 $118
JUMPV
LABELV $117
ADDRLP4 56
CNSTI4 1023
ASGNI4
LABELV $118
ADDRLP4 0+52
ADDRLP4 56
INDIRI4
ASGNI4
ADDRFP4 4
INDIRP4
ARGP4
ADDRFP4 8
INDIRP4
ARGP4
ADDRFP4 12
INDIRP4
ARGP4
ADDRFP4 16
INDIRP4
ARGP4
ADDRFP4 20
INDIRI4
ARGI4
ADDRFP4 24
INDIRI4
ARGI4
ADDRLP4 0
ARGP4
ADDRGP4 CG_ClipMoveToEntities
CALLV
pop
ADDRFP4 0
INDIRP4
ADDRLP4 0
INDIRB
ASGNB 56
LABELV $113
endproc CG_Trace 60 28
export CG_PointContents
proc CG_PointContents 36 16
ADDRFP4 0
ADDRFP4 0
INDIRP4
ASGNP4
ADDRFP4 4
ADDRFP4 4
INDIRI4
ASGNI4
ADDRFP4 0
INDIRP4
ARGP4
CNSTI4 0
ARGI4
ADDRLP4 20
ADDRGP4 trap_CM_PointContents
CALLI4
ASGNI4
ADDRLP4 16
ADDRLP4 20
INDIRI4
ASGNI4
ADDRLP4 8
CNSTI4 0
ASGNI4
ADDRGP4 $123
JUMPV
LABELV $120
ADDRLP4 4
ADDRLP4 8
INDIRI4
CNSTI4 2
LSHI4
ADDRGP4 cg_solidEntities
ADDP4
INDIRP4
ASGNP4
ADDRLP4 0
ADDRLP4 4
INDIRP4
ASGNP4
ADDRLP4 0
INDIRP4
INDIRI4
ADDRFP4 4
INDIRI4
NEI4 $124
ADDRGP4 $121
JUMPV
LABELV $124
ADDRLP4 0
INDIRP4
CNSTI4 176
ADDP4
INDIRI4
CNSTI4 16777215
EQI4 $126
ADDRGP4 $121
JUMPV
LABELV $126
ADDRLP4 0
INDIRP4
CNSTI4 160
ADDP4
INDIRI4
ARGI4
ADDRLP4 24
ADDRGP4 trap_CM_InlineModel
CALLI4
ASGNI4
ADDRLP4 12
ADDRLP4 24
INDIRI4
ASGNI4
ADDRLP4 12
INDIRI4
CNSTI4 0
NEI4 $128
ADDRGP4 $121
JUMPV
LABELV $128
ADDRFP4 0
INDIRP4
ARGP4
ADDRLP4 12
INDIRI4
ARGI4
ADDRLP4 4
INDIRP4
CNSTI4 692
ADDP4
ARGP4
ADDRLP4 4
INDIRP4
CNSTI4 704
ADDP4
ARGP4
ADDRLP4 32
ADDRGP4 trap_CM_TransformedPointContents
CALLI4
ASGNI4
ADDRLP4 16
ADDRLP4 16
INDIRI4
ADDRLP4 32
INDIRI4
BORI4
ASGNI4
LABELV $121
ADDRLP4 8
ADDRLP4 8
INDIRI4
CNSTI4 1
ADDI4
ASGNI4
LABELV $123
ADDRLP4 8
INDIRI4
ADDRGP4 cg_numSolidEntities
INDIRI4
LTI4 $120
ADDRLP4 16
INDIRI4
RETI4
LABELV $119
endproc CG_PointContents 36 16
proc CG_InterpolatePlayerState 76 12
ADDRFP4 0
ADDRFP4 0
INDIRI4
ASGNI4
ADDRLP4 12
ADDRGP4 cg+107636
ASGNP4
ADDRLP4 4
ADDRGP4 cg+36
INDIRP4
ASGNP4
ADDRLP4 8
ADDRGP4 cg+40
INDIRP4
ASGNP4
ADDRLP4 12
INDIRP4
ADDRGP4 cg+36
INDIRP4
CNSTI4 44
ADDP4
INDIRB
ASGNB 468
ADDRFP4 0
INDIRI4
CNSTI4 0
EQI4 $135
ADDRLP4 48
ADDRGP4 trap_GetCurrentCmdNumber
CALLI4
ASGNI4
ADDRLP4 44
ADDRLP4 48
INDIRI4
ASGNI4
ADDRLP4 44
INDIRI4
ARGI4
ADDRLP4 20
ARGP4
ADDRGP4 trap_GetUserCmd
CALLI4
pop
ADDRLP4 12
INDIRP4
ARGP4
ADDRLP4 20
ARGP4
ADDRGP4 PM_UpdateViewAngles
CALLV
pop
LABELV $135
ADDRGP4 cg+107596
INDIRI4
CNSTI4 0
EQI4 $137
ADDRGP4 $130
JUMPV
LABELV $137
ADDRLP4 8
INDIRP4
CVPU4 4
CNSTU4 0
EQU4 $142
ADDRLP4 24
CNSTI4 8
ASGNI4
ADDRLP4 8
INDIRP4
ADDRLP4 24
INDIRI4
ADDP4
INDIRI4
ADDRLP4 4
INDIRP4
ADDRLP4 24
INDIRI4
ADDP4
INDIRI4
GTI4 $140
LABELV $142
ADDRGP4 $130
JUMPV
LABELV $140
ADDRLP4 32
CNSTI4 8
ASGNI4
ADDRLP4 36
ADDRLP4 4
INDIRP4
ADDRLP4 32
INDIRI4
ADDP4
INDIRI4
ASGNI4
ADDRLP4 16
ADDRGP4 cg+107604
INDIRI4
ADDRLP4 36
INDIRI4
SUBI4
CVIF4 4
ADDRLP4 8
INDIRP4
ADDRLP4 32
INDIRI4
ADDP4
INDIRI4
ADDRLP4 36
INDIRI4
SUBI4
CVIF4 4
DIVF4
ASGNF4
ADDRLP4 44
CNSTI4 52
ASGNI4
ADDRLP4 0
ADDRLP4 8
INDIRP4
ADDRLP4 44
INDIRI4
ADDP4
INDIRI4
ASGNI4
ADDRLP4 0
INDIRI4
ADDRLP4 4
INDIRP4
ADDRLP4 44
INDIRI4
ADDP4
INDIRI4
GEI4 $144
ADDRLP4 0
ADDRLP4 0
INDIRI4
CNSTI4 256
ADDI4
ASGNI4
LABELV $144
ADDRLP4 48
ADDRLP4 4
INDIRP4
CNSTI4 52
ADDP4
INDIRI4
ASGNI4
ADDRLP4 12
INDIRP4
CNSTI4 8
ADDP4
ADDRLP4 48
INDIRI4
CVIF4 4
ADDRLP4 16
INDIRF4
ADDRLP4 0
INDIRI4
ADDRLP4 48
INDIRI4
SUBI4
CVIF4 4
MULF4
ADDF4
CVFI4 4
ASGNI4
ADDRLP4 0
CNSTI4 0
ASGNI4
LABELV $146
ADDRLP4 52
ADDRLP4 0
INDIRI4
CNSTI4 2
LSHI4
ASGNI4
ADDRLP4 56
CNSTI4 64
ASGNI4
ADDRLP4 60
ADDRLP4 52
INDIRI4
ADDRLP4 4
INDIRP4
ADDRLP4 56
INDIRI4
ADDP4
ADDP4
INDIRF4
ASGNF4
ADDRLP4 52
INDIRI4
ADDRLP4 12
INDIRP4
CNSTI4 20
ADDP4
ADDP4
ADDRLP4 60
INDIRF4
ADDRLP4 16
INDIRF4
ADDRLP4 52
INDIRI4
ADDRLP4 8
INDIRP4
ADDRLP4 56
INDIRI4
ADDP4
ADDP4
INDIRF4
ADDRLP4 60
INDIRF4
SUBF4
MULF4
ADDF4
ASGNF4
ADDRFP4 0
INDIRI4
CNSTI4 0
NEI4 $150
ADDRLP4 64
ADDRLP4 0
INDIRI4
CNSTI4 2
LSHI4
ASGNI4
ADDRLP4 68
CNSTI4 196
ASGNI4
ADDRLP4 64
INDIRI4
ADDRLP4 4
INDIRP4
ADDRLP4 68
INDIRI4
ADDP4
ADDP4
INDIRF4
ARGF4
ADDRLP4 64
INDIRI4
ADDRLP4 8
INDIRP4
ADDRLP4 68
INDIRI4
ADDP4
ADDP4
INDIRF4
ARGF4
ADDRLP4 16
INDIRF4
ARGF4
ADDRLP4 72
ADDRGP4 LerpAngle
CALLF4
ASGNF4
ADDRLP4 64
INDIRI4
ADDRLP4 12
INDIRP4
CNSTI4 152
ADDP4
ADDP4
ADDRLP4 72
INDIRF4
ASGNF4
LABELV $150
ADDRLP4 64
ADDRLP4 0
INDIRI4
CNSTI4 2
LSHI4
ASGNI4
ADDRLP4 68
CNSTI4 76
ASGNI4
ADDRLP4 72
ADDRLP4 64
INDIRI4
ADDRLP4 4
INDIRP4
ADDRLP4 68
INDIRI4
ADDP4
ADDP4
INDIRF4
ASGNF4
ADDRLP4 64
INDIRI4
ADDRLP4 12
INDIRP4
CNSTI4 32
ADDP4
ADDP4
ADDRLP4 72
INDIRF4
ADDRLP4 16
INDIRF4
ADDRLP4 64
INDIRI4
ADDRLP4 8
INDIRP4
ADDRLP4 68
INDIRI4
ADDP4
ADDP4
INDIRF4
ADDRLP4 72
INDIRF4
SUBF4
MULF4
ADDF4
ASGNF4
LABELV $147
ADDRLP4 0
ADDRLP4 0
INDIRI4
CNSTI4 1
ADDI4
ASGNI4
ADDRLP4 0
INDIRI4
CNSTI4 3
LTI4 $146
LABELV $130
endproc CG_InterpolatePlayerState 76 12
proc CG_TouchItem 24 12
ADDRFP4 0
ADDRFP4 0
INDIRP4
ASGNP4
ADDRGP4 cg_predictItems+12
INDIRI4
CNSTI4 0
NEI4 $153
ADDRGP4 $152
JUMPV
LABELV $153
ADDRGP4 cg+107636
ARGP4
ADDRFP4 0
INDIRP4
ARGP4
ADDRGP4 cg+107604
INDIRI4
ARGI4
ADDRLP4 4
ADDRGP4 BG_PlayerTouchesItem
CALLI4
ASGNI4
ADDRLP4 4
INDIRI4
CNSTI4 0
NEI4 $156
ADDRGP4 $152
JUMPV
LABELV $156
ADDRFP4 0
INDIRP4
CNSTI4 444
ADDP4
INDIRI4
ADDRGP4 cg+107604
INDIRI4
NEI4 $160
ADDRGP4 $152
JUMPV
LABELV $160
ADDRGP4 cgs+31456
INDIRI4
ARGI4
ADDRFP4 0
INDIRP4
ARGP4
ADDRGP4 cg+107636
ARGP4
ADDRLP4 8
ADDRGP4 BG_CanItemBeGrabbed
CALLI4
ASGNI4
ADDRLP4 8
INDIRI4
CNSTI4 0
NEI4 $163
ADDRGP4 $152
JUMPV
LABELV $163
ADDRLP4 0
CNSTI4 52
ADDRFP4 0
INDIRP4
CNSTI4 160
ADDP4
INDIRI4
MULI4
ADDRGP4 bg_itemlist
ADDP4
ASGNP4
ADDRGP4 cgs+31456
INDIRI4
CNSTI4 5
NEI4 $167
ADDRLP4 0
INDIRP4
CNSTI4 36
ADDP4
INDIRI4
CNSTI4 8
NEI4 $170
ADDRLP4 0
INDIRP4
CNSTI4 40
ADDP4
INDIRI4
CNSTI4 9
EQI4 $170
ADDRGP4 $152
JUMPV
LABELV $170
LABELV $167
ADDRGP4 cgs+31456
INDIRI4
CNSTI4 4
NEI4 $172
ADDRGP4 cg+107636+248+12
INDIRI4
CNSTI4 1
NEI4 $175
ADDRLP4 0
INDIRP4
CNSTI4 36
ADDP4
INDIRI4
CNSTI4 8
NEI4 $175
ADDRLP4 0
INDIRP4
CNSTI4 40
ADDP4
INDIRI4
CNSTI4 7
NEI4 $175
ADDRGP4 $152
JUMPV
LABELV $175
ADDRGP4 cg+107636+248+12
INDIRI4
CNSTI4 2
NEI4 $180
ADDRLP4 20
CNSTI4 8
ASGNI4
ADDRLP4 0
INDIRP4
CNSTI4 36
ADDP4
INDIRI4
ADDRLP4 20
INDIRI4
NEI4 $180
ADDRLP4 0
INDIRP4
CNSTI4 40
ADDP4
INDIRI4
ADDRLP4 20
INDIRI4
NEI4 $180
ADDRGP4 $152
JUMPV
LABELV $180
LABELV $172
CNSTI4 19
ARGI4
ADDRFP4 0
INDIRP4
CNSTI4 160
ADDP4
INDIRI4
ARGI4
ADDRGP4 cg+107636
ARGP4
ADDRGP4 BG_AddPredictableEventToPlayerstate
CALLV
pop
ADDRLP4 12
ADDRFP4 0
INDIRP4
CNSTI4 8
ADDP4
ASGNP4
ADDRLP4 12
INDIRP4
ADDRLP4 12
INDIRP4
INDIRI4
CNSTI4 128
BORI4
ASGNI4
ADDRFP4 0
INDIRP4
CNSTI4 444
ADDP4
ADDRGP4 cg+107604
INDIRI4
ASGNI4
ADDRLP4 0
INDIRP4
CNSTI4 36
ADDP4
INDIRI4
CNSTI4 1
NEI4 $187
ADDRLP4 16
ADDRGP4 cg+107636+184+12
ASGNP4
ADDRLP4 16
INDIRP4
ADDRLP4 16
INDIRP4
INDIRI4
CNSTI4 1
ADDRLP4 0
INDIRP4
CNSTI4 40
ADDP4
INDIRI4
LSHI4
BORI4
ASGNI4
ADDRLP4 0
INDIRP4
CNSTI4 40
ADDP4
INDIRI4
CNSTI4 2
LSHI4
ADDRGP4 cg+107636+376
ADDP4
INDIRI4
CNSTI4 0
NEI4 $192
ADDRLP4 0
INDIRP4
CNSTI4 40
ADDP4
INDIRI4
CNSTI4 2
LSHI4
ADDRGP4 cg+107636+376
ADDP4
CNSTI4 1
ASGNI4
LABELV $192
LABELV $187
LABELV $152
endproc CG_TouchItem 24 12
proc CG_TouchTriggerPrediction 88 28
ADDRGP4 cg+107636+184
INDIRI4
CNSTI4 0
GTI4 $199
ADDRGP4 $198
JUMPV
LABELV $199
ADDRGP4 cg+107636+4
INDIRI4
CNSTI4 2
NEI4 $206
ADDRLP4 76
CNSTI4 1
ASGNI4
ADDRGP4 $207
JUMPV
LABELV $206
ADDRLP4 76
CNSTI4 0
ASGNI4
LABELV $207
ADDRLP4 72
ADDRLP4 76
INDIRI4
ASGNI4
ADDRLP4 80
CNSTI4 0
ASGNI4
ADDRGP4 cg+107636+4
INDIRI4
ADDRLP4 80
INDIRI4
EQI4 $208
ADDRLP4 72
INDIRI4
ADDRLP4 80
INDIRI4
NEI4 $208
ADDRGP4 $198
JUMPV
LABELV $208
ADDRLP4 4
CNSTI4 0
ASGNI4
ADDRGP4 $215
JUMPV
LABELV $212
ADDRLP4 12
ADDRLP4 4
INDIRI4
CNSTI4 2
LSHI4
ADDRGP4 cg_triggerEntities
ADDP4
INDIRP4
ASGNP4
ADDRLP4 0
ADDRLP4 12
INDIRP4
ASGNP4
ADDRLP4 0
INDIRP4
CNSTI4 4
ADDP4
INDIRI4
CNSTI4 2
NEI4 $216
ADDRLP4 72
INDIRI4
CNSTI4 0
NEI4 $216
ADDRLP4 12
INDIRP4
ARGP4
ADDRGP4 CG_TouchItem
CALLV
pop
ADDRGP4 $213
JUMPV
LABELV $216
ADDRLP4 0
INDIRP4
CNSTI4 176
ADDP4
INDIRI4
CNSTI4 16777215
EQI4 $218
ADDRGP4 $213
JUMPV
LABELV $218
ADDRLP4 0
INDIRP4
CNSTI4 160
ADDP4
INDIRI4
ARGI4
ADDRLP4 84
ADDRGP4 trap_CM_InlineModel
CALLI4
ASGNI4
ADDRLP4 8
ADDRLP4 84
INDIRI4
ASGNI4
ADDRLP4 8
INDIRI4
CNSTI4 0
NEI4 $220
ADDRGP4 $213
JUMPV
LABELV $220
ADDRLP4 16
ARGP4
ADDRGP4 cg+107636+20
ARGP4
ADDRGP4 cg+107636+20
ARGP4
ADDRGP4 cg_pmove+180
ARGP4
ADDRGP4 cg_pmove+192
ARGP4
ADDRLP4 8
INDIRI4
ARGI4
CNSTI4 -1
ARGI4
ADDRGP4 trap_CM_BoxTrace
CALLV
pop
ADDRLP4 16+4
INDIRI4
CNSTI4 0
NEI4 $228
ADDRGP4 $213
JUMPV
LABELV $228
ADDRLP4 0
INDIRP4
CNSTI4 4
ADDP4
INDIRI4
CNSTI4 9
NEI4 $231
ADDRGP4 cg+107632
CNSTI4 1
ASGNI4
ADDRGP4 $232
JUMPV
LABELV $231
ADDRLP4 0
INDIRP4
CNSTI4 4
ADDP4
INDIRI4
CNSTI4 8
NEI4 $234
ADDRGP4 cg+107636
ARGP4
ADDRLP4 0
INDIRP4
ARGP4
ADDRGP4 BG_TouchJumpPad
CALLV
pop
LABELV $234
LABELV $232
LABELV $213
ADDRLP4 4
ADDRLP4 4
INDIRI4
CNSTI4 1
ADDI4
ASGNI4
LABELV $215
ADDRLP4 4
INDIRI4
ADDRGP4 cg_numTriggerEntities
INDIRI4
LTI4 $212
ADDRGP4 cg+107636+460
INDIRI4
ADDRGP4 cg+107636+456
INDIRI4
EQI4 $237
ADDRGP4 cg+107636+460
CNSTI4 0
ASGNI4
ADDRGP4 cg+107636+448
CNSTI4 0
ASGNI4
LABELV $237
LABELV $198
endproc CG_TouchTriggerPrediction 88 28
export CG_PredictPlayerState
proc CG_PredictPlayerState 604 28
ADDRGP4 cg+107632
CNSTI4 0
ASGNI4
ADDRGP4 cg+108820
INDIRI4
CNSTI4 0
NEI4 $249
ADDRGP4 cg+108820
CNSTI4 1
ASGNI4
ADDRGP4 cg+107636
ADDRGP4 cg+36
INDIRP4
CNSTI4 44
ADDP4
INDIRB
ASGNB 468
LABELV $249
ADDRLP4 528
CNSTI4 0
ASGNI4
ADDRGP4 cg+8
INDIRI4
ADDRLP4 528
INDIRI4
NEI4 $259
ADDRGP4 cg+36
INDIRP4
CNSTI4 56
ADDP4
INDIRI4
CNSTI4 4096
BANDI4
ADDRLP4 528
INDIRI4
EQI4 $255
LABELV $259
CNSTI4 0
ARGI4
ADDRGP4 CG_InterpolatePlayerState
CALLV
pop
ADDRGP4 $247
JUMPV
LABELV $255
ADDRLP4 532
CNSTI4 0
ASGNI4
ADDRGP4 cg_nopredict+12
INDIRI4
ADDRLP4 532
INDIRI4
NEI4 $264
ADDRGP4 cg_synchronousClients+12
INDIRI4
ADDRLP4 532
INDIRI4
EQI4 $260
LABELV $264
CNSTI4 1
ARGI4
ADDRGP4 CG_InterpolatePlayerState
CALLV
pop
ADDRGP4 $247
JUMPV
LABELV $260
ADDRGP4 cg_pmove
ADDRGP4 cg+107636
ASGNP4
ADDRGP4 cg_pmove+224
ADDRGP4 CG_Trace
ASGNP4
ADDRGP4 cg_pmove+228
ADDRGP4 CG_PointContents
ASGNP4
ADDRGP4 cg_pmove
INDIRP4
CNSTI4 4
ADDP4
INDIRI4
CNSTI4 3
NEI4 $268
ADDRGP4 cg_pmove+28
CNSTI4 65537
ASGNI4
ADDRGP4 $269
JUMPV
LABELV $268
ADDRGP4 cg_pmove+28
CNSTI4 33619969
ASGNI4
LABELV $269
ADDRGP4 cg+36
INDIRP4
CNSTI4 304
ADDP4
INDIRI4
CNSTI4 3
NEI4 $272
ADDRLP4 536
ADDRGP4 cg_pmove+28
ASGNP4
ADDRLP4 536
INDIRP4
ADDRLP4 536
INDIRP4
INDIRI4
CNSTI4 -33554433
BANDI4
ASGNI4
LABELV $272
ADDRGP4 cgs+31460
INDIRI4
CNSTI4 32
BANDI4
CNSTI4 0
LEI4 $279
ADDRLP4 536
CNSTI4 1
ASGNI4
ADDRGP4 $280
JUMPV
LABELV $279
ADDRLP4 536
CNSTI4 0
ASGNI4
LABELV $280
ADDRGP4 cg_pmove+36
ADDRLP4 536
INDIRI4
ASGNI4
ADDRLP4 4
ADDRGP4 cg+107636
INDIRB
ASGNB 468
ADDRLP4 540
ADDRGP4 trap_GetCurrentCmdNumber
CALLI4
ASGNI4
ADDRLP4 472
ADDRLP4 540
INDIRI4
ASGNI4
ADDRLP4 0
ADDRLP4 472
INDIRI4
CNSTI4 64
SUBI4
CNSTI4 1
ADDI4
ASGNI4
ADDRLP4 0
INDIRI4
ARGI4
ADDRLP4 504
ARGP4
ADDRGP4 trap_GetUserCmd
CALLI4
pop
ADDRLP4 544
ADDRLP4 504
INDIRI4
ASGNI4
ADDRLP4 544
INDIRI4
ADDRGP4 cg+36
INDIRP4
CNSTI4 44
ADDP4
INDIRI4
LEI4 $282
ADDRLP4 544
INDIRI4
ADDRGP4 cg+107604
INDIRI4
GEI4 $282
ADDRGP4 cg_showmiss+12
INDIRI4
CNSTI4 0
EQI4 $247
ADDRGP4 $289
ARGP4
ADDRGP4 CG_Printf
CALLV
pop
ADDRGP4 $247
JUMPV
LABELV $282
ADDRLP4 472
INDIRI4
ARGI4
ADDRLP4 480
ARGP4
ADDRGP4 trap_GetUserCmd
CALLI4
pop
ADDRGP4 cg+40
INDIRP4
CVPU4 4
CNSTU4 0
EQU4 $290
ADDRLP4 548
CNSTI4 0
ASGNI4
ADDRGP4 cg+107596
INDIRI4
ADDRLP4 548
INDIRI4
NEI4 $290
ADDRGP4 cg+107592
INDIRI4
ADDRLP4 548
INDIRI4
NEI4 $290
ADDRGP4 cg+107636
ADDRGP4 cg+40
INDIRP4
CNSTI4 44
ADDP4
INDIRB
ASGNB 468
ADDRGP4 cg+107612
ADDRGP4 cg+40
INDIRP4
CNSTI4 8
ADDP4
INDIRI4
ASGNI4
ADDRGP4 $291
JUMPV
LABELV $290
ADDRGP4 cg+107636
ADDRGP4 cg+36
INDIRP4
CNSTI4 44
ADDP4
INDIRB
ASGNB 468
ADDRGP4 cg+107612
ADDRGP4 cg+36
INDIRP4
CNSTI4 8
ADDP4
INDIRI4
ASGNI4
LABELV $291
ADDRGP4 pmove_msec+12
INDIRI4
CNSTI4 8
GEI4 $303
ADDRGP4 $306
ARGP4
ADDRGP4 $307
ARGP4
ADDRGP4 trap_Cvar_Set
CALLV
pop
ADDRGP4 $304
JUMPV
LABELV $303
ADDRGP4 pmove_msec+12
INDIRI4
CNSTI4 33
LEI4 $308
ADDRGP4 $306
ARGP4
ADDRGP4 $311
ARGP4
ADDRGP4 trap_Cvar_Set
CALLV
pop
LABELV $308
LABELV $304
ADDRGP4 cg_pmove+216
ADDRGP4 pmove_fixed+12
INDIRI4
ASGNI4
ADDRGP4 cg_pmove+220
ADDRGP4 pmove_msec+12
INDIRI4
ASGNI4
ADDRLP4 476
CNSTI4 0
ASGNI4
ADDRLP4 0
ADDRLP4 472
INDIRI4
CNSTI4 64
SUBI4
CNSTI4 1
ADDI4
ASGNI4
ADDRGP4 $319
JUMPV
LABELV $316
ADDRLP4 0
INDIRI4
ARGI4
ADDRGP4 cg_pmove+4
ARGP4
ADDRGP4 trap_GetUserCmd
CALLI4
pop
ADDRGP4 cg_pmove+216
INDIRI4
CNSTI4 0
EQI4 $321
ADDRGP4 cg_pmove
INDIRP4
ARGP4
ADDRGP4 cg_pmove+4
ARGP4
ADDRGP4 PM_UpdateViewAngles
CALLV
pop
LABELV $321
ADDRGP4 cg_pmove+4
INDIRI4
ADDRGP4 cg+107636
INDIRI4
GTI4 $325
ADDRGP4 $317
JUMPV
LABELV $325
ADDRGP4 cg_pmove+4
INDIRI4
ADDRLP4 480
INDIRI4
LEI4 $329
ADDRGP4 $317
JUMPV
LABELV $329
ADDRGP4 cg+107636
INDIRI4
ADDRLP4 4
INDIRI4
NEI4 $332
ADDRGP4 cg+107592
INDIRI4
CNSTI4 0
EQI4 $335
ADDRLP4 568
CNSTF4 0
ASGNF4
ADDRGP4 cg+108828+8
ADDRLP4 568
INDIRF4
ASGNF4
ADDRGP4 cg+108828+4
ADDRLP4 568
INDIRF4
ASGNF4
ADDRGP4 cg+108828
ADDRLP4 568
INDIRF4
ASGNF4
ADDRGP4 cg_showmiss+12
INDIRI4
CNSTI4 0
EQI4 $343
ADDRGP4 $346
ARGP4
ADDRGP4 CG_Printf
CALLV
pop
LABELV $343
ADDRGP4 cg+107592
CNSTI4 0
ASGNI4
ADDRGP4 $336
JUMPV
LABELV $335
ADDRGP4 cg+107636+20
ARGP4
ADDRGP4 cg+107636+68
INDIRI4
ARGI4
ADDRGP4 cg+107612
INDIRI4
ARGI4
ADDRGP4 cg+107608
INDIRI4
ARGI4
ADDRLP4 568
ARGP4
ADDRGP4 cg+107636+152
ARGP4
ADDRLP4 580
ARGP4
ADDRGP4 CG_AdjustPositionForMover
CALLV
pop
ADDRGP4 cg_showmiss+12
INDIRI4
CNSTI4 0
EQI4 $356
ADDRLP4 4+20
ARGP4
ADDRLP4 568
ARGP4
ADDRLP4 592
ADDRGP4 VectorCompare
CALLI4
ASGNI4
ADDRLP4 592
INDIRI4
CNSTI4 0
NEI4 $359
ADDRGP4 $362
ARGP4
ADDRGP4 CG_Printf
CALLV
pop
LABELV $359
LABELV $356
ADDRLP4 552
ADDRLP4 4+20
INDIRF4
ADDRLP4 568
INDIRF4
SUBF4
ASGNF4
ADDRLP4 552+4
ADDRLP4 4+20+4
INDIRF4
ADDRLP4 568+4
INDIRF4
SUBF4
ASGNF4
ADDRLP4 552+8
ADDRLP4 4+20+8
INDIRF4
ADDRLP4 568+8
INDIRF4
SUBF4
ASGNF4
ADDRLP4 552
ARGP4
ADDRLP4 592
ADDRGP4 VectorLength
CALLF4
ASGNF4
ADDRLP4 564
ADDRLP4 592
INDIRF4
ASGNF4
ADDRLP4 564
INDIRF4
CNSTF4 1036831949
LEF4 $372
ADDRGP4 cg_showmiss+12
INDIRI4
CNSTI4 0
EQI4 $374
ADDRGP4 $377
ARGP4
ADDRLP4 564
INDIRF4
ARGF4
ADDRGP4 CG_Printf
CALLV
pop
LABELV $374
ADDRGP4 cg_errorDecay+12
INDIRI4
CNSTI4 0
EQI4 $378
ADDRLP4 600
ADDRGP4 cg+107604
INDIRI4
ADDRGP4 cg+108824
INDIRI4
SUBI4
ASGNI4
ADDRLP4 596
ADDRGP4 cg_errorDecay+8
INDIRF4
ADDRLP4 600
INDIRI4
CVIF4 4
SUBF4
ADDRGP4 cg_errorDecay+8
INDIRF4
DIVF4
ASGNF4
ADDRLP4 596
INDIRF4
CNSTF4 0
GEF4 $385
ADDRLP4 596
CNSTF4 0
ASGNF4
LABELV $385
ADDRLP4 596
INDIRF4
CNSTF4 0
LEF4 $387
ADDRGP4 cg_showmiss+12
INDIRI4
CNSTI4 0
EQI4 $387
ADDRGP4 $390
ARGP4
ADDRLP4 596
INDIRF4
ARGF4
ADDRGP4 CG_Printf
CALLV
pop
LABELV $387
ADDRGP4 cg+108828
ADDRGP4 cg+108828
INDIRF4
ADDRLP4 596
INDIRF4
MULF4
ASGNF4
ADDRGP4 cg+108828+4
ADDRGP4 cg+108828+4
INDIRF4
ADDRLP4 596
INDIRF4
MULF4
ASGNF4
ADDRGP4 cg+108828+8
ADDRGP4 cg+108828+8
INDIRF4
ADDRLP4 596
INDIRF4
MULF4
ASGNF4
ADDRGP4 $379
JUMPV
LABELV $378
ADDRLP4 596
CNSTF4 0
ASGNF4
ADDRGP4 cg+108828+8
ADDRLP4 596
INDIRF4
ASGNF4
ADDRGP4 cg+108828+4
ADDRLP4 596
INDIRF4
ASGNF4
ADDRGP4 cg+108828
ADDRLP4 596
INDIRF4
ASGNF4
LABELV $379
ADDRGP4 cg+108828
ADDRLP4 552
INDIRF4
ADDRGP4 cg+108828
INDIRF4
ADDF4
ASGNF4
ADDRGP4 cg+108828+4
ADDRLP4 552+4
INDIRF4
ADDRGP4 cg+108828+4
INDIRF4
ADDF4
ASGNF4
ADDRGP4 cg+108828+8
ADDRLP4 552+8
INDIRF4
ADDRGP4 cg+108828+8
INDIRF4
ADDF4
ASGNF4
ADDRGP4 cg+108824
ADDRGP4 cg+107608
INDIRI4
ASGNI4
LABELV $372
LABELV $336
LABELV $332
ADDRGP4 cg_pmove+40
CNSTI4 0
ASGNI4
ADDRGP4 cg_pmove+216
INDIRI4
CNSTI4 0
EQI4 $421
ADDRGP4 cg_pmove+4
ADDRGP4 cg_pmove+4
INDIRI4
ADDRGP4 pmove_msec+12
INDIRI4
ADDI4
CNSTI4 1
SUBI4
ADDRGP4 pmove_msec+12
INDIRI4
DIVI4
ADDRGP4 pmove_msec+12
INDIRI4
MULI4
ASGNI4
LABELV $421
ADDRGP4 cg_pmove
ARGP4
ADDRGP4 Pmove
CALLV
pop
ADDRLP4 476
CNSTI4 1
ASGNI4
ADDRGP4 CG_TouchTriggerPrediction
CALLV
pop
LABELV $317
ADDRLP4 0
ADDRLP4 0
INDIRI4
CNSTI4 1
ADDI4
ASGNI4
LABELV $319
ADDRLP4 0
INDIRI4
ADDRLP4 472
INDIRI4
LEI4 $316
ADDRGP4 cg_showmiss+12
INDIRI4
CNSTI4 1
LEI4 $429
ADDRGP4 $432
ARGP4
ADDRGP4 cg_pmove+4
INDIRI4
ARGI4
ADDRGP4 cg+107604
INDIRI4
ARGI4
ADDRGP4 CG_Printf
CALLV
pop
LABELV $429
ADDRLP4 476
INDIRI4
CNSTI4 0
NEI4 $435
ADDRGP4 cg_showmiss+12
INDIRI4
CNSTI4 0
EQI4 $247
ADDRGP4 $440
ARGP4
ADDRGP4 CG_Printf
CALLV
pop
ADDRGP4 $247
JUMPV
LABELV $435
ADDRGP4 cg+107636+20
ARGP4
ADDRGP4 cg+107636+68
INDIRI4
ARGI4
ADDRGP4 cg+107612
INDIRI4
ARGI4
ADDRGP4 cg+107604
INDIRI4
ARGI4
ADDRGP4 cg+107636+20
ARGP4
ADDRGP4 cg+107636+152
ARGP4
ADDRGP4 cg+107636+152
ARGP4
ADDRGP4 CG_AdjustPositionForMover
CALLV
pop
ADDRGP4 cg_showmiss+12
INDIRI4
CNSTI4 0
EQI4 $453
ADDRGP4 cg+107636+108
INDIRI4
ADDRLP4 4+108
INDIRI4
CNSTI4 2
ADDI4
LEI4 $456
ADDRGP4 $461
ARGP4
ADDRGP4 CG_Printf
CALLV
pop
LABELV $456
LABELV $453
ADDRGP4 cg+107636
ARGP4
ADDRLP4 4
ARGP4
ADDRGP4 CG_TransitionPlayerState
CALLV
pop
ADDRGP4 cg_showmiss+12
INDIRI4
CNSTI4 0
EQI4 $463
ADDRGP4 cg+108840
INDIRI4
ADDRGP4 cg+107636+108
INDIRI4
LEI4 $466
ADDRGP4 $471
ARGP4
ADDRGP4 CG_Printf
CALLV
pop
ADDRGP4 cg+108840
ADDRGP4 cg+107636+108
INDIRI4
ASGNI4
LABELV $466
LABELV $463
LABELV $247
endproc CG_PredictPlayerState 604 28
bss
align 4
LABELV cg_triggerEntities
skip 1024
align 4
LABELV cg_numTriggerEntities
skip 4
align 4
LABELV cg_solidEntities
skip 1024
align 4
LABELV cg_numSolidEntities
skip 4
align 4
LABELV cg_pmove
skip 232
import CG_NewParticleArea
import initparticles
import CG_ParticleExplosion
import CG_ParticleMisc
import CG_ParticleDust
import CG_ParticleSparks
import CG_ParticleBulletDebris
import CG_ParticleSnowFlurry
import CG_AddParticleShrapnel
import CG_ParticleSmoke
import CG_ParticleSnow
import CG_AddParticles
import CG_ClearParticles
import trap_GetEntityToken
import trap_getCameraInfo
import trap_startCamera
import trap_loadCamera
import trap_SnapVector
import trap_RealTime
import trap_CIN_SetExtents
import trap_CIN_DrawCinematic
import trap_CIN_RunCinematic
import trap_CIN_StopCinematic
import trap_CIN_PlayCinematic
import trap_Key_GetKey
import trap_Key_SetCatcher
import trap_Key_GetCatcher
import trap_Key_IsDown
import trap_R_RegisterFont
import trap_MemoryRemaining
import testPrintFloat
import testPrintInt
import trap_SetUserCmdValue
import trap_GetUserCmd
import trap_GetCurrentCmdNumber
import trap_GetServerCommand
import trap_GetSnapshot
import trap_GetCurrentSnapshotNumber
import trap_GetGameState
import trap_GetGlconfig
import trap_R_inPVS
import trap_R_RemapShader
import trap_R_LerpTag
import trap_R_ModelBounds
import trap_R_DrawStretchPic
import trap_R_SetColor
import trap_R_RenderScene
import trap_R_LightForPoint
import trap_R_AddAdditiveLightToScene
import trap_R_AddLightToScene
import trap_R_AddPolysToScene
import trap_R_AddPolyToScene
import trap_R_AddRefEntityToScene
import trap_R_ClearScene
import trap_R_RegisterShaderNoMip
import trap_R_RegisterShader
import trap_R_RegisterSkin
import trap_R_RegisterModel
import trap_R_LoadWorldMap
import trap_S_StopBackgroundTrack
import trap_S_StartBackgroundTrack
import trap_S_RegisterSound
import trap_S_Respatialize
import trap_S_UpdateEntityPosition
import trap_S_AddRealLoopingSound
import trap_S_AddLoopingSound
import trap_S_ClearLoopingSounds
import trap_S_StartLocalSound
import trap_S_StopLoopingSound
import trap_S_StartSound
import trap_CM_MarkFragments
import trap_CM_TransformedCapsuleTrace
import trap_CM_TransformedBoxTrace
import trap_CM_CapsuleTrace
import trap_CM_BoxTrace
import trap_CM_TransformedPointContents
import trap_CM_PointContents
import trap_CM_TempBoxModel
import trap_CM_InlineModel
import trap_CM_NumInlineModels
import trap_CM_LoadMap
import trap_UpdateScreen
import trap_SendClientCommand
import trap_RemoveCommand
import trap_AddCommand
import trap_SendConsoleCommand
import trap_FS_Seek
import trap_FS_FCloseFile
import trap_FS_Write
import trap_FS_Read
import trap_FS_FOpenFile
import trap_Args
import trap_Argv
import trap_Argc
import trap_Cvar_VariableStringBuffer
import trap_Cvar_Set
import trap_Cvar_Update
import trap_Cvar_Register
import trap_Milliseconds
import trap_Error
import trap_Print
import CG_CheckChangedPredictableEvents
import CG_TransitionPlayerState
import CG_Respawn
import CG_PlayBufferedVoiceChats
import CG_VoiceChatLocal
import CG_LoadVoiceChats
import CG_ShaderStateChanged
import CG_SetConfigValues
import CG_ParseServerinfo
import CG_ExecuteNewServerCommands
import CG_InitConsoleCommands
import CG_ConsoleCommand
import CG_DrawOldTourneyScoreboard
import CG_DrawOldScoreboard
import CG_DrawInformation
import CG_LoadingClient
import CG_LoadingItem
import CG_LoadingString
import CG_ProcessSnapshots
import CG_MakeExplosion
import CG_Bleed
import CG_BigExplode
import CG_GibPlayer
import CG_ScorePlum
import CG_LightningBoltBeam
import CG_InvulnerabilityJuiced
import CG_InvulnerabilityImpact
import CG_ObeliskPain
import CG_ObeliskExplode
import CG_KamikazeEffect
import CG_SpawnEffect
import CG_BubbleTrail
import CG_SmokePuff
import CG_AddLocalEntities
import CG_AllocLocalEntity
import CG_InitLocalEntities
import CG_ImpactMark
import CG_AddMarks
import CG_InitMarkPolys
import CG_OutOfAmmoChange
import CG_DrawWeaponSelect
import CG_AddPlayerWeapon
import CG_AddViewWeapon
import CG_GrappleTrail
import CG_RailTrail
import CG_Bullet
import CG_ShotgunFire
import CG_MissileHitPlayer
import CG_MissileHitWall
import CG_FireWeapon
import CG_RegisterItemVisuals
import CG_RegisterWeapon
import CG_Weapon_f
import CG_PrevWeapon_f
import CG_NextWeapon_f
import CG_PositionRotatedEntityOnTag
import CG_PositionEntityOnTag
import CG_AdjustPositionForMover
import CG_Beam
import CG_AddPacketEntities
import CG_SetEntitySoundPosition
import CG_PainEvent
import CG_EntityEvent
import CG_PlaceString
import CG_CheckEvents
import CG_LoadDeferredPlayers
import CG_CustomSound
import CG_NewClientInfo
import CG_AddRefEntityWithPowerups
import CG_ResetPlayerEntity
import CG_Player
import CG_StatusHandle
import CG_OtherTeamHasFlag
import CG_YourTeamHasFlag
import CG_GameTypeString
import CG_CheckOrderPending
import CG_Text_PaintChar
import CG_Draw3DModel
import CG_GetKillerText
import CG_GetGameStatusText
import CG_GetTeamColor
import CG_InitTeamChat
import CG_SetPrintString
import CG_ShowResponseHead
import CG_RunMenuScript
import CG_OwnerDrawVisible
import CG_GetValue
import CG_SelectNextPlayer
import CG_SelectPrevPlayer
import CG_Text_Height
import CG_Text_Width
import CG_Text_Paint
import CG_OwnerDraw
import CG_DrawTeamBackground
import CG_DrawFlagModel
import CG_DrawActive
import CG_DrawHead
import CG_CenterPrint
import CG_AddLagometerSnapshotInfo
import CG_AddLagometerFrameInfo
import teamChat2
import teamChat1
import systemChat
import drawTeamOverlayModificationCount
import numSortedTeamPlayers
import sortedTeamPlayers
import CG_DrawTopBottom
import CG_DrawSides
import CG_DrawRect
import UI_DrawProportionalString
import CG_GetColorForHealth
import CG_ColorForHealth
import CG_TileClear
import CG_TeamColor
import CG_FadeColor
import CG_DrawStrlen
import CG_DrawSmallStringColor
import CG_DrawSmallString
import CG_DrawBigStringColor
import CG_DrawBigString
import CG_DrawStringExt
import CG_DrawString
import CG_DrawPic
import CG_FillRect
import CG_AdjustFrom640
import CG_DrawActiveFrame
import CG_AddBufferedSound
import CG_ZoomUp_f
import CG_ZoomDown_f
import CG_TestModelPrevSkin_f
import CG_TestModelNextSkin_f
import CG_TestModelPrevFrame_f
import CG_TestModelNextFrame_f
import CG_TestGun_f
import CG_TestModel_f
import CG_BuildSpectatorString
import CG_GetSelectedScore
import CG_SetScoreSelection
import CG_RankRunFrame
import CG_EventHandling
import CG_MouseEvent
import CG_KeyEvent
import CG_LoadMenus
import CG_LastAttacker
import CG_CrosshairPlayer
import CG_UpdateCvars
import CG_StartMusic
import CG_Error
import CG_Printf
import CG_Argv
import CG_ConfigString
import cg_obeliskRespawnDelay
import cg_recordSPDemoName
import cg_recordSPDemo
import cg_singlePlayerActive
import cg_enableBreath
import cg_enableDust
import cg_singlePlayer
import cg_currentSelectedPlayerName
import cg_currentSelectedPlayer
import cg_blueTeamName
import cg_redTeamName
import cg_trueLightning
import cg_oldPlasma
import cg_oldRocket
import cg_oldRail
import cg_noProjectileTrail
import cg_noTaunt
import cg_bigFont
import cg_smallFont
import cg_cameraMode
import cg_timescale
import cg_timescaleFadeSpeed
import cg_timescaleFadeEnd
import cg_cameraOrbitDelay
import cg_cameraOrbit
import pmove_msec
import pmove_fixed
import cg_smoothClients
import cg_scorePlum
import cg_noVoiceText
import cg_noVoiceChats
import cg_teamChatsOnly
import cg_drawFriend
import cg_deferPlayers
import cg_predictItems
import cg_blood
import cg_paused
import cg_buildScript
import cg_forceModel
import cg_stats
import cg_teamChatHeight
import cg_teamChatTime
import cg_synchronousClients
import cg_drawAttacker
import cg_lagometer
import cg_thirdPerson
import cg_thirdPersonAngle
import cg_thirdPersonRange
import cg_zoomFov
import cg_fov
import cg_simpleItems
import cg_ignore
import cg_autoswitch
import cg_tracerLength
import cg_tracerWidth
import cg_tracerChance
import cg_viewsize
import cg_drawGun
import cg_gun_z
import cg_gun_y
import cg_gun_x
import cg_gun_frame
import cg_brassTime
import cg_addMarks
import cg_footsteps
import cg_showmiss
import cg_noPlayerAnims
import cg_nopredict
import cg_errorDecay
import cg_railTrailTime
import cg_debugEvents
import cg_debugPosition
import cg_debugAnim
import cg_animSpeed
import cg_draw2D
import cg_drawStatus
import cg_crosshairHealth
import cg_crosshairSize
import cg_crosshairY
import cg_crosshairX
import cg_teamOverlayUserinfo
import cg_drawTeamOverlay
import cg_drawRewards
import cg_drawCrosshairNames
import cg_drawCrosshair
import cg_drawAmmoWarning
import cg_drawIcons
import cg_draw3dIcons
import cg_drawSnapshot
import cg_drawFPS
import cg_drawTimer
import cg_gibs
import cg_shadows
import cg_swingSpeed
import cg_bobroll
import cg_bobpitch
import cg_bobup
import cg_runroll
import cg_runpitch
import cg_centertime
import cg_markPolys
import cg_items
import cg_weapons
import cg_entities
import cg
import cgs
import BG_PlayerTouchesItem
import BG_PlayerStateToEntityStateExtraPolate
import BG_PlayerStateToEntityState
import BG_TouchJumpPad
import BG_AddPredictableEventToPlayerstate
import BG_EvaluateTrajectoryDelta
import BG_EvaluateTrajectory
import BG_CanItemBeGrabbed
import BG_FindItemForHoldable
import BG_FindItemForPowerup
import BG_FindItemForWeapon
import BG_FindItem
import bg_numItems
import bg_itemlist
import Pmove
import PM_UpdateViewAngles
import Com_Printf
import Com_Error
import Info_NextPair
import Info_Validate
import Info_SetValueForKey_Big
import Info_SetValueForKey
import Info_RemoveKey_Big
import Info_RemoveKey
import Info_ValueForKey
import Com_TruncateLongString
import va
import Q_CountChar
import Q_CleanStr
import Q_PrintStrlen
import Q_strcat
import Q_strncpyz
import Q_stristr
import Q_strupr
import Q_strlwr
import Q_stricmpn
import Q_strncmp
import Q_stricmp
import Q_isintegral
import Q_isanumber
import Q_isalpha
import Q_isupper
import Q_islower
import Q_isprint
import Com_RandomBytes
import Com_SkipCharset
import Com_SkipTokens
import Com_sprintf
import Com_HexStrToInt
import Parse3DMatrix
import Parse2DMatrix
import Parse1DMatrix
import SkipRestOfLine
import SkipBracedSection
import COM_MatchToken
import COM_ParseWarning
import COM_ParseError
import COM_Compress
import COM_ParseExt
import COM_Parse
import COM_GetCurrentParseLine
import COM_BeginParseSession
import COM_DefaultExtension
import COM_CompareExtension
import COM_StripExtension
import COM_GetExtension
import COM_SkipPath
import Com_Clamp
import PerpendicularVector
import AngleVectors
import MatrixMultiply
import MakeNormalVectors
import RotateAroundDirection
import RotatePointAroundVector
import ProjectPointOnPlane
import PlaneFromPoints
import AngleDelta
import AngleNormalize180
import AngleNormalize360
import AnglesSubtract
import AngleSubtract
import LerpAngle
import AngleMod
import BoundsIntersectPoint
import BoundsIntersectSphere
import BoundsIntersect
import BoxOnPlaneSide
import SetPlaneSignbits
import AxisCopy
import AxisClear
import AnglesToAxis
import vectoangles
import Q_crandom
import Q_random
import Q_rand
import Q_acos
import Q_log2
import VectorRotate
import Vector4Scale
import VectorNormalize2
import VectorNormalize
import CrossProduct
import VectorInverse
import VectorNormalizeFast
import DistanceSquared
import Distance
import VectorLengthSquared
import VectorLength
import VectorCompare
import AddPointToBounds
import ClearBounds
import RadiusFromBounds
import NormalizeColor
import ColorBytes4
import ColorBytes3
import _VectorMA
import _VectorScale
import _VectorCopy
import _VectorAdd
import _VectorSubtract
import _DotProduct
import ByteToDir
import DirToByte
import ClampShort
import ClampChar
import Q_rsqrt
import Q_fabs
import Q_isnan
import axisDefault
import vec3_origin
import g_color_table
import colorDkGrey
import colorMdGrey
import colorLtGrey
import colorWhite
import colorCyan
import colorMagenta
import colorYellow
import colorBlue
import colorGreen
import colorRed
import colorBlack
import bytedirs
import Hunk_AllocDebug
import FloatSwap
import LongSwap
import ShortSwap
import CopyLongSwap
import CopyShortSwap
import qk_acos
import qk_fabs
import qk_abs
import qk_tan
import qk_atan2
import qk_cos
import qk_sin
import qk_sqrt
import qk_floor
import qk_ceil
import qk_memcpy
import qk_memset
import qk_memmove
import qk_sscanf
import qk_vsnprintf
import qk_strtol
import qk_atoi
import qk_strtod
import qk_atof
import qk_toupper
import qk_tolower
import qk_strncpy
import qk_strstr
import qk_strrchr
import qk_strchr
import qk_strcmp
import qk_strcpy
import qk_strcat
import qk_strlen
import qk_rand
import qk_srand
import qk_qsort
lit
align 1
LABELV $471
byte 1 87
byte 1 65
byte 1 82
byte 1 78
byte 1 73
byte 1 78
byte 1 71
byte 1 58
byte 1 32
byte 1 100
byte 1 111
byte 1 117
byte 1 98
byte 1 108
byte 1 101
byte 1 32
byte 1 101
byte 1 118
byte 1 101
byte 1 110
byte 1 116
byte 1 10
byte 1 0
align 1
LABELV $461
byte 1 87
byte 1 65
byte 1 82
byte 1 78
byte 1 73
byte 1 78
byte 1 71
byte 1 58
byte 1 32
byte 1 100
byte 1 114
byte 1 111
byte 1 112
byte 1 112
byte 1 101
byte 1 100
byte 1 32
byte 1 101
byte 1 118
byte 1 101
byte 1 110
byte 1 116
byte 1 10
byte 1 0
align 1
LABELV $440
byte 1 110
byte 1 111
byte 1 116
byte 1 32
byte 1 109
byte 1 111
byte 1 118
byte 1 101
byte 1 100
byte 1 10
byte 1 0
align 1
LABELV $432
byte 1 91
byte 1 37
byte 1 105
byte 1 32
byte 1 58
byte 1 32
byte 1 37
byte 1 105
byte 1 93
byte 1 32
byte 1 0
align 1
LABELV $390
byte 1 68
byte 1 111
byte 1 117
byte 1 98
byte 1 108
byte 1 101
byte 1 32
byte 1 112
byte 1 114
byte 1 101
byte 1 100
byte 1 105
byte 1 99
byte 1 116
byte 1 105
byte 1 111
byte 1 110
byte 1 32
byte 1 100
byte 1 101
byte 1 99
byte 1 97
byte 1 121
byte 1 58
byte 1 32
byte 1 37
byte 1 102
byte 1 10
byte 1 0
align 1
LABELV $377
byte 1 80
byte 1 114
byte 1 101
byte 1 100
byte 1 105
byte 1 99
byte 1 116
byte 1 105
byte 1 111
byte 1 110
byte 1 32
byte 1 109
byte 1 105
byte 1 115
byte 1 115
byte 1 58
byte 1 32
byte 1 37
byte 1 102
byte 1 10
byte 1 0
align 1
LABELV $362
byte 1 112
byte 1 114
byte 1 101
byte 1 100
byte 1 105
byte 1 99
byte 1 116
byte 1 105
byte 1 111
byte 1 110
byte 1 32
byte 1 101
byte 1 114
byte 1 114
byte 1 111
byte 1 114
byte 1 10
byte 1 0
align 1
LABELV $346
byte 1 80
byte 1 114
byte 1 101
byte 1 100
byte 1 105
byte 1 99
byte 1 116
byte 1 105
byte 1 111
byte 1 110
byte 1 84
byte 1 101
byte 1 108
byte 1 101
byte 1 112
byte 1 111
byte 1 114
byte 1 116
byte 1 10
byte 1 0
align 1
LABELV $311
byte 1 51
byte 1 51
byte 1 0
align 1
LABELV $307
byte 1 56
byte 1 0
align 1
LABELV $306
byte 1 112
byte 1 109
byte 1 111
byte 1 118
byte 1 101
byte 1 95
byte 1 109
byte 1 115
byte 1 101
byte 1 99
byte 1 0
align 1
LABELV $289
byte 1 101
byte 1 120
byte 1 99
byte 1 101
byte 1 101
byte 1 100
byte 1 101
byte 1 100
byte 1 32
byte 1 80
byte 1 65
byte 1 67
byte 1 75
byte 1 69
byte 1 84
byte 1 95
byte 1 66
byte 1 65
byte 1 67
byte 1 75
byte 1 85
byte 1 80
byte 1 32
byte 1 111
byte 1 110
byte 1 32
byte 1 99
byte 1 111
byte 1 109
byte 1 109
byte 1 97
byte 1 110
byte 1 100
byte 1 115
byte 1 10
byte 1 0
|
// Copyright (C) 2021 Intel Corporation
// SPDX-License-Identifier: Apache-2.0
//
#pragma once
#include <cuda_runtime_api.h>
#include <functional>
#include <cuda/device_pointers.hpp>
#include <error.hpp>
#include "props.hpp"
inline void throwIfError(
cudaError_t err,
const std::experimental::source_location& location = std::experimental::source_location::current()) {
if (err != cudaSuccess) CUDAPlugin::throwIEException(cudaGetErrorString(err), location);
}
inline void logIfError(
cudaError_t err,
const std::experimental::source_location& location = std::experimental::source_location::current()) {
if (err != cudaSuccess) CUDAPlugin::logError(cudaGetErrorString(err), location);
}
namespace CUDA {
template <typename T>
auto toNative(T&& a) noexcept(noexcept(std::forward<T>(a).get())) -> decltype(std::forward<T>(a).get()) {
return std::forward<T>(a).get();
}
template <typename T>
auto toNative(T&& a) noexcept(noexcept(std::forward<T>(a).data())) -> decltype(std::forward<T>(a).data()) {
return std::forward<T>(a).data();
}
template <typename T>
std::enable_if_t<std::is_scalar_v<std::decay_t<T>>, std::decay_t<T>> toNative(T t) noexcept {
return t;
}
template <typename T, typename R, typename... Args>
T createFirstArg(R (*creator)(T*, Args... args), Args... args) {
T t;
throwIfError(creator(&t, args...));
return t;
}
template <typename R, typename... NativeArgs, typename... Args>
auto createLastArg(R (*creator)(NativeArgs...), Args&&... args) {
std::remove_pointer_t<decltype((NativeArgs{}, ...))> t;
throwIfError(creator(toNative(std::forward<Args>(args))..., &t));
return t;
}
class Device {
int id;
public:
Device() : Device{currentId()} {}
explicit Device(int id) noexcept : id{id} {}
static int currentId() { return createFirstArg(cudaGetDevice); }
static int count() { return createFirstArg(cudaGetDeviceCount); }
cudaDeviceProp props() const { return createFirstArg(cudaGetDeviceProperties, id); }
const Device& setCurrent() const {
throwIfError(cudaSetDevice(id));
return *this;
}
};
constexpr auto memoryAlignment = 256;
constexpr auto defaultResidentGrids = 16;
inline int residentGrids6x(int minor) {
switch (minor) {
case 0:
return 128;
case 1:
return 32;
case 2:
return 16;
}
return defaultResidentGrids;
}
inline int residentGrids7x(int minor) {
switch (minor) {
case 0:
return 128;
case 2:
return 16;
case 5:
return 128;
}
return defaultResidentGrids;
}
inline int residentGrids8x(int minor) { return 128; }
inline int residentGrids(const cudaDeviceProp& p) {
switch (p.major) {
case 6:
return residentGrids6x(p.minor);
case 7:
return residentGrids7x(p.minor);
case 8:
return residentGrids8x(p.minor);
}
return defaultResidentGrids;
}
inline int maxConcurrentStreams(CUDA::Device d) {
auto p = d.props();
int r = p.asyncEngineCount;
if (!p.concurrentKernels) return r + 1;
return r + residentGrids(p);
}
inline bool isHalfSupported(CUDA::Device d) {
const auto computeCompatabilityVersion = std::to_string(d.props().major) + "." + std::to_string(d.props().minor);
return fp16SupportedArchitecture.count(computeCompatabilityVersion) > 0;
}
inline bool isInt8Supported(CUDA::Device d) {
const auto computeCompatabilityVersion = std::to_string(d.props().major) + "." + std::to_string(d.props().minor);
return int8SupportedArchitecture.count(computeCompatabilityVersion) > 0;
}
template <typename T>
class Handle {
public:
using Native = T;
template <typename R, typename... Args>
using Construct = R (*)(T*, Args... args);
template <typename R, typename... Args>
using Destruct = R (*)(T);
Handle(const Handle&) = delete;
Handle& operator=(const Handle&) = delete;
Handle(Handle&& handle) { operator=(std::move(handle)); }
Handle& operator=(Handle&& handle) {
destroy();
std::swap(native_, handle.native_);
destructor_ = std::move(handle.destructor_);
return *this;
}
~Handle() { destroy(); }
const Native& get() const noexcept { return native_; }
protected:
template <typename R, typename... Args>
Handle(Construct<R, Args...> constructor, Destruct<R> destructor, Args... args) {
native_ = Native{createFirstArg(constructor, args...)};
if (destructor) {
destructor_ = [destructor](const Native& native) { logIfError(destructor(native)); };
}
}
template <typename R, typename... Args>
Handle(Construct<R, Args...> constructor, std::nullptr_t, Args... args) {
native_ = Native{createFirstArg(constructor, args...)};
}
private:
void destroy() {
if (destructor_) {
destructor_(native_);
destructor_ = nullptr;
native_ = Native{};
}
}
Native native_{};
std::function<void(const Native&)> destructor_;
};
class Allocation {
class Deleter {
cudaStream_t stream; // no raii, fixme?
// maybe deallocation stream could be different, i.e. maybe we could have
// setStream method?
auto freeImpl(void* p) const noexcept {
#if CUDART_VERSION >= 11020
return cudaFreeAsync(p, stream);
#else
return cudaFree(p);
#endif
}
public:
Deleter(cudaStream_t stream) noexcept : stream{stream} {}
void operator()(void* p) const noexcept { logIfError(freeImpl(p)); }
};
std::unique_ptr<void, Deleter> p;
public:
Allocation(void* p, cudaStream_t stream) noexcept : p{p, Deleter{stream}} {}
void* get() const noexcept { return p.get(); }
template <typename T, std::enable_if_t<std::is_void_v<T>>* = nullptr>
operator DevicePointer<T*>() const noexcept {
return DevicePointer<T*>{get()};
}
};
class DefaultAllocation {
struct Deleter {
void operator()(void* p) const noexcept { logIfError(cudaFree(p)); }
};
std::unique_ptr<void, Deleter> p;
public:
explicit DefaultAllocation(void* p) noexcept : p{p} {}
void* get() const noexcept { return p.get(); }
template <typename T, std::enable_if_t<std::is_void_v<T>>* = nullptr>
operator DevicePointer<T*>() const noexcept {
return DevicePointer<T*>{get()};
}
};
class Stream : public Handle<cudaStream_t> {
public:
Stream() : Handle(cudaStreamCreate, cudaStreamDestroy) {}
Allocation malloc(std::size_t size) const { return {mallocImpl(size), get()}; }
void upload(CUDA::DevicePointer<void*> dst, const void* src, std::size_t count) const {
uploadImpl(dst.get(), src, count);
}
void transfer(CUDA::DevicePointer<void*> dst, CUDA::DevicePointer<const void*> src, std::size_t count) const {
throwIfError(cudaMemcpyAsync(dst.get(), src.get(), count, cudaMemcpyDeviceToDevice, get()));
}
void upload(const Allocation& dst, const void* src, std::size_t count) const { uploadImpl(dst.get(), src, count); }
void download(void* dst, const Allocation& src, std::size_t count) const { downloadImpl(dst, src.get(), count); }
void download(void* dst, CUDA::DevicePointer<const void*> src, std::size_t count) const {
downloadImpl(dst, src.get(), count);
}
void download(void* dst, CUDA::DevicePointer<void*> src, std::size_t count) const {
downloadImpl(dst, src.get(), count);
}
void memset(const Allocation& dst, int value, std::size_t count) const { memsetImpl(dst.get(), value, count); }
void memset(CUDA::DevicePointer<void*> dst, int value, std::size_t count) const {
memsetImpl(dst.get(), value, count);
}
void synchronize() const { throwIfError(cudaStreamSynchronize(get())); }
#ifdef __CUDACC__
template <typename... Args>
void run(dim3 gridDim, dim3 blockDim, void (*kernel)(Args...), Args... args) const {
kernel
#ifndef __CDT_PARSER__
<<<gridDim, blockDim, 0, get()>>>
#endif
(args...);
}
#endif
private:
void uploadImpl(void* dst, const void* src, std::size_t count) const {
throwIfError(cudaMemcpyAsync(dst, src, count, cudaMemcpyHostToDevice, get()));
}
void downloadImpl(void* dst, const void* src, std::size_t count) const {
throwIfError(cudaMemcpyAsync(dst, src, count, cudaMemcpyDeviceToHost, get()));
}
void* mallocImpl(std::size_t size) const {
return createFirstArg<void*, cudaError_t>(
#if CUDART_VERSION >= 11020
cudaMallocAsync, size, get()
#else
cudaMalloc, size
#endif
);
}
void memsetImpl(void* dst, int value, size_t count) const {
throwIfError(cudaMemsetAsync(dst, value, count, get()));
}
};
class DefaultStream {
void uploadImpl(void* dst, const void* src, std::size_t count) const {
throwIfError(cudaMemcpy(dst, src, count, cudaMemcpyHostToDevice));
}
void downloadImpl(void* dst, const void* src, std::size_t count) const {
throwIfError(cudaMemcpy(dst, src, count, cudaMemcpyDeviceToHost));
}
void memsetImpl(void* dst, int value, std::size_t count) const { throwIfError(cudaMemset(dst, value, count)); }
DefaultStream() = default;
public:
static DefaultStream& stream() {
static DefaultStream stream{};
return stream;
}
auto malloc(std::size_t size) const {
return DefaultAllocation{createFirstArg<void*, cudaError_t>(cudaMalloc, size)};
}
void upload(DevicePointer<void*> dst, const void* src, std::size_t count) const {
uploadImpl(dst.get(), src, count);
}
void upload(const Allocation& dst, const void* src, std::size_t count) const { uploadImpl(dst.get(), src, count); }
void download(void* dst, const Allocation& src, std::size_t count) const { downloadImpl(dst, src.get(), count); }
void download(void* dst, DevicePointer<const void*> src, std::size_t count) const {
downloadImpl(dst, src.get(), count);
}
void memset(const Allocation& dst, int value, std::size_t count) const { memsetImpl(dst.get(), value, count); }
void memset(CUDA::DevicePointer<void*> dst, int value, std::size_t count) const {
memsetImpl(dst.get(), value, count);
}
};
} // namespace CUDA
|
/*
* Copyright 2010-2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License").
* You may not use this file except in compliance with the License.
* A copy of the License is located at
*
* http://aws.amazon.com/apache2.0
*
* or in the "license" file accompanying this file. This file is distributed
* on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either
* express or implied. See the License for the specific language governing
* permissions and limitations under the License.
*/
#include <aws/imagebuilder/model/EbsVolumeType.h>
#include <aws/core/utils/HashingUtils.h>
#include <aws/core/Globals.h>
#include <aws/core/utils/EnumParseOverflowContainer.h>
using namespace Aws::Utils;
namespace Aws
{
namespace imagebuilder
{
namespace Model
{
namespace EbsVolumeTypeMapper
{
static const int standard_HASH = HashingUtils::HashString("standard");
static const int io1_HASH = HashingUtils::HashString("io1");
static const int gp2_HASH = HashingUtils::HashString("gp2");
static const int sc1_HASH = HashingUtils::HashString("sc1");
static const int st1_HASH = HashingUtils::HashString("st1");
EbsVolumeType GetEbsVolumeTypeForName(const Aws::String& name)
{
int hashCode = HashingUtils::HashString(name.c_str());
if (hashCode == standard_HASH)
{
return EbsVolumeType::standard;
}
else if (hashCode == io1_HASH)
{
return EbsVolumeType::io1;
}
else if (hashCode == gp2_HASH)
{
return EbsVolumeType::gp2;
}
else if (hashCode == sc1_HASH)
{
return EbsVolumeType::sc1;
}
else if (hashCode == st1_HASH)
{
return EbsVolumeType::st1;
}
EnumParseOverflowContainer* overflowContainer = Aws::GetEnumOverflowContainer();
if(overflowContainer)
{
overflowContainer->StoreOverflow(hashCode, name);
return static_cast<EbsVolumeType>(hashCode);
}
return EbsVolumeType::NOT_SET;
}
Aws::String GetNameForEbsVolumeType(EbsVolumeType enumValue)
{
switch(enumValue)
{
case EbsVolumeType::standard:
return "standard";
case EbsVolumeType::io1:
return "io1";
case EbsVolumeType::gp2:
return "gp2";
case EbsVolumeType::sc1:
return "sc1";
case EbsVolumeType::st1:
return "st1";
default:
EnumParseOverflowContainer* overflowContainer = Aws::GetEnumOverflowContainer();
if(overflowContainer)
{
return overflowContainer->RetrieveOverflow(static_cast<int>(enumValue));
}
return {};
}
}
} // namespace EbsVolumeTypeMapper
} // namespace Model
} // namespace imagebuilder
} // namespace Aws
|
#include<bits/stdc++.h>
using namespace std;
#define ll long long int
int main()
{
ll n;
cin>>n;
if(n==0) cout<<n;
else if(n%2==0) cout<<n+1;
else cout<<(n+1)/2;
return 0;
}
|
;
; Copyright (c) 2016, Alliance for Open Media. All rights reserved
;
; This source code is subject to the terms of the BSD 2 Clause License and
; the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
; was not distributed with this source code in the LICENSE file, you can
; obtain it at www.aomedia.org/license/software. If the Alliance for Open
; Media Patent License 1.0 was not distributed with this source code in the
; PATENTS file, you can obtain it at www.aomedia.org/license/patent.
;
;
%include "third_party/x86inc/x86inc.asm"
SECTION .text
; void aom_subtract_block(int rows, int cols,
; int16_t *diff, ptrdiff_t diff_stride,
; const uint8_t *src, ptrdiff_t src_stride,
; const uint8_t *pred, ptrdiff_t pred_stride)
INIT_XMM sse2
cglobal subtract_block, 7, 7, 8, \
rows, cols, diff, diff_stride, src, src_stride, \
pred, pred_stride
%define pred_str colsq
pxor m7, m7 ; dedicated zero register
cmp colsd, 4
je .case_4
cmp colsd, 8
je .case_8
cmp colsd, 16
je .case_16
cmp colsd, 32
je .case_32
cmp colsd, 64
je .case_64
%macro loop16 6
mova m0, [srcq+%1]
mova m4, [srcq+%2]
mova m1, [predq+%3]
mova m5, [predq+%4]
punpckhbw m2, m0, m7
punpckhbw m3, m1, m7
punpcklbw m0, m7
punpcklbw m1, m7
psubw m2, m3
psubw m0, m1
punpckhbw m1, m4, m7
punpckhbw m3, m5, m7
punpcklbw m4, m7
punpcklbw m5, m7
psubw m1, m3
psubw m4, m5
mova [diffq+mmsize*0+%5], m0
mova [diffq+mmsize*1+%5], m2
mova [diffq+mmsize*0+%6], m4
mova [diffq+mmsize*1+%6], m1
%endmacro
mov pred_str, pred_stridemp
.loop_128:
loop16 0*mmsize, 1*mmsize, 0*mmsize, 1*mmsize, 0*mmsize, 2*mmsize
loop16 2*mmsize, 3*mmsize, 2*mmsize, 3*mmsize, 4*mmsize, 6*mmsize
loop16 4*mmsize, 5*mmsize, 4*mmsize, 5*mmsize, 8*mmsize, 10*mmsize
loop16 6*mmsize, 7*mmsize, 6*mmsize, 7*mmsize, 12*mmsize, 14*mmsize
lea diffq, [diffq+diff_strideq*2]
add predq, pred_str
add srcq, src_strideq
sub rowsd, 1
jnz .loop_128
RET
.case_64:
mov pred_str, pred_stridemp
.loop_64:
loop16 0*mmsize, 1*mmsize, 0*mmsize, 1*mmsize, 0*mmsize, 2*mmsize
loop16 2*mmsize, 3*mmsize, 2*mmsize, 3*mmsize, 4*mmsize, 6*mmsize
lea diffq, [diffq+diff_strideq*2]
add predq, pred_str
add srcq, src_strideq
dec rowsd
jg .loop_64
RET
.case_32:
mov pred_str, pred_stridemp
.loop_32:
loop16 0, mmsize, 0, mmsize, 0, 2*mmsize
lea diffq, [diffq+diff_strideq*2]
add predq, pred_str
add srcq, src_strideq
dec rowsd
jg .loop_32
RET
.case_16:
mov pred_str, pred_stridemp
.loop_16:
loop16 0, src_strideq, 0, pred_str, 0, diff_strideq*2
lea diffq, [diffq+diff_strideq*4]
lea predq, [predq+pred_str*2]
lea srcq, [srcq+src_strideq*2]
sub rowsd, 2
jg .loop_16
RET
%macro loop_h 0
movh m0, [srcq]
movh m2, [srcq+src_strideq]
movh m1, [predq]
movh m3, [predq+pred_str]
punpcklbw m0, m7
punpcklbw m1, m7
punpcklbw m2, m7
punpcklbw m3, m7
psubw m0, m1
psubw m2, m3
mova [diffq], m0
mova [diffq+diff_strideq*2], m2
%endmacro
.case_8:
mov pred_str, pred_stridemp
.loop_8:
loop_h
lea diffq, [diffq+diff_strideq*4]
lea srcq, [srcq+src_strideq*2]
lea predq, [predq+pred_str*2]
sub rowsd, 2
jg .loop_8
RET
INIT_MMX
.case_4:
mov pred_str, pred_stridemp
.loop_4:
loop_h
lea diffq, [diffq+diff_strideq*4]
lea srcq, [srcq+src_strideq*2]
lea predq, [predq+pred_str*2]
sub rowsd, 2
jg .loop_4
RET
|
; A159696: a(0)=8, a(n) = 2*a(n-1) + 2^(n-1) for n > 0.
; 8,17,36,76,160,336,704,1472,3072,6400,13312,27648,57344,118784,245760,507904,1048576,2162688,4456448,9175040,18874368,38797312,79691776,163577856,335544320,687865856,1409286144,2885681152,5905580032,12079595520,24696061952,50465865728,103079215104,210453397504,429496729600,876173328384,1786706395136,3642132267008,7421703487488,15118284881920,30786325577728,62672162783232,127543348822016,259484744155136,527765581332480,1073123348709376,2181431069507584,4433230883192832,9007199254740992
mov $3,2
pow $3,$0
mov $1,$3
mov $2,$0
add $2,16
mul $1,$2
div $1,2
|
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