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;;
;; Copyright (c) 2021 Antti Tiihala
;;
;; Permission to use, copy, modify, and/or distribute this software for any
;; purpose with or without fee is hereby granted, provided that the above
;; copyright notice and this permission notice appear in all copies.
;;
;; THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
;; WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
;; MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
;; ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
;; WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
;; ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
;; OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
;;
;; base/a32/gdt.asm
;; Global Descriptor Table
;;
bits 32
section .text
global _gdt_load
global _gdt_load_cs
global _gdt_load_es
global _gdt_load_ss
global _gdt_load_ds
global _gdt_load_fs
global _gdt_load_gs
global _gdt_load_tss
global _gdt_read_segment
align 16
; void gdt_load(const void *gdt_ptr)
_gdt_load:
mov ecx, [esp+4] ; ecx = gdt_ptr
lgdt [ecx] ; load global descriptor table
xor ecx, ecx ; ecx = 0 (segment selector)
lldt cx ; load local descriptor table
ret
align 16
; void gdt_load_cs(int sel)
_gdt_load_cs:
push ebx ; save register ebx
mov eax, _gdt_load_cs_end ; eax = address of _gdt_load_cs_end
mov ecx, [esp+8] ; ecx = sel
sub esp, 8 ; decrement stack pointer
mov ebx, esp ; ebx = stack pointer
mov [ebx+0], eax ; offset
mov [ebx+4], ecx ; selector
db 0xFF, 0x2B ; jmp far [ebx]
_gdt_load_cs_end:
add esp, 8 ; restore stack pointer
pop ebx ; restore register ebx
ret
align 16
; void gdt_load_es(int sel)
_gdt_load_es:
mov ecx, [esp+4] ; ecx = sel
mov es, ecx ; set segment register es
ret
align 16
; void gdt_load_ss(int sel)
_gdt_load_ss:
mov ecx, [esp+4] ; ecx = sel
mov ss, ecx ; set segment register ss
ret
align 16
; void gdt_load_ds(int sel)
_gdt_load_ds:
mov ecx, [esp+4] ; ecx = sel
mov ds, ecx ; set segment register ds
ret
align 16
; void gdt_load_fs(int sel)
_gdt_load_fs:
mov ecx, [esp+4] ; ecx = sel
mov fs, ecx ; set segment register fs
ret
align 16
; void gdt_load_gs(int sel)
_gdt_load_gs:
mov ecx, [esp+4] ; ecx = sel
mov gs, ecx ; set segment register gs
ret
align 16
; void gdt_load_tss(int sel)
_gdt_load_tss:
mov ecx, [esp+4] ; ecx = sel
ltr cx ; load task register
ret
align 16
; uint32_t gdt_read_segment(int sel, size_t offset)
;
; Interrupts should be disabled before calling this function.
_gdt_read_segment:
push fs ; save segment register fs
mov ecx, [esp+8] ; ecx = sel
mov edx, [esp+12] ; edx = offset
mov fs, ecx ; set segment register fs
mov eax, [fs:edx] ; eax = return value
pop fs ; restore segment register fs
ret
|
.model small
.data
.code
main proc
mov ah, 01010001b
test ah, 01010001b ; The test operation is very similar to the and operation. The main difference is that it doesn't store
; the result into the registers, rather the zero flag in the FR is toggled to 0 when both of the value
; that's being tested is the same as the value being tested against. The zero flag is toggled to 1 when
; they are not equal. In this case, the zero flag should be zero.
test ah, 01010000b ; In this case the zero flag is set to 1
endp
end main
|
/*
* Copyright (c) 2018-2020, Andreas Kling <kling@serenityos.org>
* Copyright (c) 2021-2022, Sam Atkins <atkinssj@serenityos.org>
* Copyright (c) 2021, Tobias Christiansen <tobyase@serenityos.org>
*
* SPDX-License-Identifier: BSD-2-Clause
*/
#include <AK/ByteBuffer.h>
#include <LibGfx/Palette.h>
#include <LibWeb/CSS/Serialize.h>
#include <LibWeb/CSS/StyleValue.h>
#include <LibWeb/DOM/Document.h>
#include <LibWeb/HTML/BrowsingContext.h>
#include <LibWeb/Loader/LoadRequest.h>
#include <LibWeb/Loader/ResourceLoader.h>
#include <LibWeb/Page/Page.h>
namespace Web::CSS {
StyleValue::StyleValue(Type type)
: m_type(type)
{
}
StyleValue::~StyleValue()
{
}
BackgroundStyleValue const& StyleValue::as_background() const
{
VERIFY(is_background());
return static_cast<BackgroundStyleValue const&>(*this);
}
BackgroundRepeatStyleValue const& StyleValue::as_background_repeat() const
{
VERIFY(is_background_repeat());
return static_cast<BackgroundRepeatStyleValue const&>(*this);
}
BackgroundSizeStyleValue const& StyleValue::as_background_size() const
{
VERIFY(is_background_size());
return static_cast<BackgroundSizeStyleValue const&>(*this);
}
BorderStyleValue const& StyleValue::as_border() const
{
VERIFY(is_border());
return static_cast<BorderStyleValue const&>(*this);
}
BorderRadiusStyleValue const& StyleValue::as_border_radius() const
{
VERIFY(is_border_radius());
return static_cast<BorderRadiusStyleValue const&>(*this);
}
BoxShadowStyleValue const& StyleValue::as_box_shadow() const
{
VERIFY(is_box_shadow());
return static_cast<BoxShadowStyleValue const&>(*this);
}
CalculatedStyleValue const& StyleValue::as_calculated() const
{
VERIFY(is_calculated());
return static_cast<CalculatedStyleValue const&>(*this);
}
ColorStyleValue const& StyleValue::as_color() const
{
VERIFY(is_color());
return static_cast<ColorStyleValue const&>(*this);
}
FlexStyleValue const& StyleValue::as_flex() const
{
VERIFY(is_flex());
return static_cast<FlexStyleValue const&>(*this);
}
FlexFlowStyleValue const& StyleValue::as_flex_flow() const
{
VERIFY(is_flex_flow());
return static_cast<FlexFlowStyleValue const&>(*this);
}
FontStyleValue const& StyleValue::as_font() const
{
VERIFY(is_font());
return static_cast<FontStyleValue const&>(*this);
}
IdentifierStyleValue const& StyleValue::as_identifier() const
{
VERIFY(is_identifier());
return static_cast<IdentifierStyleValue const&>(*this);
}
ImageStyleValue const& StyleValue::as_image() const
{
VERIFY(is_image());
return static_cast<ImageStyleValue const&>(*this);
}
InheritStyleValue const& StyleValue::as_inherit() const
{
VERIFY(is_inherit());
return static_cast<InheritStyleValue const&>(*this);
}
InitialStyleValue const& StyleValue::as_initial() const
{
VERIFY(is_initial());
return static_cast<InitialStyleValue const&>(*this);
}
LengthStyleValue const& StyleValue::as_length() const
{
VERIFY(is_length());
return static_cast<LengthStyleValue const&>(*this);
}
ListStyleStyleValue const& StyleValue::as_list_style() const
{
VERIFY(is_list_style());
return static_cast<ListStyleStyleValue const&>(*this);
}
NumericStyleValue const& StyleValue::as_numeric() const
{
VERIFY(is_numeric());
return static_cast<NumericStyleValue const&>(*this);
}
OverflowStyleValue const& StyleValue::as_overflow() const
{
VERIFY(is_overflow());
return static_cast<OverflowStyleValue const&>(*this);
}
PercentageStyleValue const& StyleValue::as_percentage() const
{
VERIFY(is_percentage());
return static_cast<PercentageStyleValue const&>(*this);
}
PositionStyleValue const& StyleValue::as_position() const
{
VERIFY(is_position());
return static_cast<PositionStyleValue const&>(*this);
}
StringStyleValue const& StyleValue::as_string() const
{
VERIFY(is_string());
return static_cast<StringStyleValue const&>(*this);
}
TextDecorationStyleValue const& StyleValue::as_text_decoration() const
{
VERIFY(is_text_decoration());
return static_cast<TextDecorationStyleValue const&>(*this);
}
TransformationStyleValue const& StyleValue::as_transformation() const
{
VERIFY(is_transformation());
return static_cast<TransformationStyleValue const&>(*this);
}
UnresolvedStyleValue const& StyleValue::as_unresolved() const
{
VERIFY(is_unresolved());
return static_cast<UnresolvedStyleValue const&>(*this);
}
UnsetStyleValue const& StyleValue::as_unset() const
{
VERIFY(is_unset());
return static_cast<UnsetStyleValue const&>(*this);
}
StyleValueList const& StyleValue::as_value_list() const
{
VERIFY(is_value_list());
return static_cast<StyleValueList const&>(*this);
}
BackgroundStyleValue::BackgroundStyleValue(
NonnullRefPtr<StyleValue> color,
NonnullRefPtr<StyleValue> image,
NonnullRefPtr<StyleValue> position,
NonnullRefPtr<StyleValue> size,
NonnullRefPtr<StyleValue> repeat,
NonnullRefPtr<StyleValue> attachment,
NonnullRefPtr<StyleValue> origin,
NonnullRefPtr<StyleValue> clip)
: StyleValue(Type::Background)
, m_color(color)
, m_image(image)
, m_position(position)
, m_size(size)
, m_repeat(repeat)
, m_attachment(attachment)
, m_origin(origin)
, m_clip(clip)
{
auto layer_count = [](auto style_value) -> size_t {
if (style_value->is_value_list())
return style_value->as_value_list().size();
else
return 1;
};
m_layer_count = max(layer_count(m_image), layer_count(m_position));
m_layer_count = max(m_layer_count, layer_count(m_size));
m_layer_count = max(m_layer_count, layer_count(m_repeat));
m_layer_count = max(m_layer_count, layer_count(m_attachment));
m_layer_count = max(m_layer_count, layer_count(m_origin));
m_layer_count = max(m_layer_count, layer_count(m_clip));
VERIFY(!m_color->is_value_list());
}
String BackgroundStyleValue::to_string() const
{
if (m_layer_count == 1) {
return String::formatted("{} {} {} {} {} {} {} {}", m_color->to_string(), m_image->to_string(), m_position->to_string(), m_size->to_string(), m_repeat->to_string(), m_attachment->to_string(), m_origin->to_string(), m_clip->to_string());
}
auto get_layer_value_string = [](NonnullRefPtr<StyleValue> const& style_value, size_t index) {
if (style_value->is_value_list())
return style_value->as_value_list().value_at(index, true)->to_string();
return style_value->to_string();
};
StringBuilder builder;
for (size_t i = 0; i < m_layer_count; i++) {
if (i)
builder.append(", ");
if (i == m_layer_count - 1)
builder.appendff("{} ", m_color->to_string());
builder.appendff("{} {} {} {} {} {} {}", get_layer_value_string(m_image, i), get_layer_value_string(m_position, i), get_layer_value_string(m_size, i), get_layer_value_string(m_repeat, i), get_layer_value_string(m_attachment, i), get_layer_value_string(m_origin, i), get_layer_value_string(m_clip, i));
}
return builder.to_string();
}
String BackgroundRepeatStyleValue::to_string() const
{
return String::formatted("{} {}", CSS::to_string(m_repeat_x), CSS::to_string(m_repeat_y));
}
String BackgroundSizeStyleValue::to_string() const
{
return String::formatted("{} {}", m_size_x.to_string(), m_size_y.to_string());
}
String BorderStyleValue::to_string() const
{
return String::formatted("{} {} {}", m_border_width->to_string(), m_border_style->to_string(), m_border_color->to_string());
}
String BorderRadiusStyleValue::to_string() const
{
return String::formatted("{} / {}", m_horizontal_radius.to_string(), m_vertical_radius.to_string());
}
String BoxShadowStyleValue::to_string() const
{
return String::formatted("{} {} {} {}", m_offset_x.to_string(), m_offset_y.to_string(), m_blur_radius.to_string(), m_color.to_string());
}
void CalculatedStyleValue::CalculationResult::add(CalculationResult const& other, Layout::Node const* layout_node, Length const& percentage_basis)
{
add_or_subtract_internal(SumOperation::Add, other, layout_node, percentage_basis);
}
void CalculatedStyleValue::CalculationResult::subtract(CalculationResult const& other, Layout::Node const* layout_node, Length const& percentage_basis)
{
add_or_subtract_internal(SumOperation::Subtract, other, layout_node, percentage_basis);
}
void CalculatedStyleValue::CalculationResult::add_or_subtract_internal(SumOperation op, CalculationResult const& other, Layout::Node const* layout_node, Length const& percentage_basis)
{
// We know from validation when resolving the type, that "both sides have the same type, or that one side is a <number> and the other is an <integer>".
// Though, having the same type may mean that one side is a <dimension> and the other a <percentage>.
// Note: This is almost identical to ::add()
m_value.visit(
[&](Number const& number) {
auto other_number = other.m_value.get<Number>();
if (op == SumOperation::Add) {
m_value = Number {
.is_integer = number.is_integer && other_number.is_integer,
.value = number.value + other_number.value
};
} else {
m_value = Number {
.is_integer = number.is_integer && other_number.is_integer,
.value = number.value - other_number.value
};
}
},
[&](Length const& length) {
auto this_px = length.to_px(*layout_node);
if (other.m_value.has<Length>()) {
auto other_px = other.m_value.get<Length>().to_px(*layout_node);
if (op == SumOperation::Add)
m_value = Length::make_px(this_px + other_px);
else
m_value = Length::make_px(this_px - other_px);
} else {
VERIFY(!percentage_basis.is_undefined());
auto other_px = percentage_basis.percentage_of(other.m_value.get<Percentage>()).to_px(*layout_node);
if (op == SumOperation::Add)
m_value = Length::make_px(this_px + other_px);
else
m_value = Length::make_px(this_px - other_px);
}
},
[&](Percentage const& percentage) {
if (other.m_value.has<Percentage>()) {
if (op == SumOperation::Add)
m_value = Percentage { percentage.value() + other.m_value.get<Percentage>().value() };
else
m_value = Percentage { percentage.value() - other.m_value.get<Percentage>().value() };
return;
}
// Other side isn't a percentage, so the easiest way to handle it without duplicating all the logic, is just to swap `this` and `other`.
CalculationResult new_value = other;
if (op == SumOperation::Add)
new_value.add(*this, layout_node, percentage_basis);
else
new_value.subtract(*this, layout_node, percentage_basis);
*this = new_value;
});
}
void CalculatedStyleValue::CalculationResult::multiply_by(CalculationResult const& other, Layout::Node const* layout_node)
{
// We know from validation when resolving the type, that at least one side must be a <number> or <integer>.
// Both of these are represented as a float.
VERIFY(m_value.has<Number>() || other.m_value.has<Number>());
bool other_is_number = other.m_value.has<Number>();
m_value.visit(
[&](Number const& number) {
if (other_is_number) {
auto other_number = other.m_value.get<Number>();
m_value = Number {
.is_integer = number.is_integer && other_number.is_integer,
.value = number.value * other_number.value
};
} else {
// Avoid duplicating all the logic by swapping `this` and `other`.
CalculationResult new_value = other;
new_value.multiply_by(*this, layout_node);
*this = new_value;
}
},
[&](Length const& length) {
VERIFY(layout_node);
m_value = Length::make_px(length.to_px(*layout_node) * other.m_value.get<Number>().value);
},
[&](Percentage const& percentage) {
m_value = Percentage { percentage.value() * other.m_value.get<Number>().value };
});
}
void CalculatedStyleValue::CalculationResult::divide_by(CalculationResult const& other, Layout::Node const* layout_node)
{
// We know from validation when resolving the type, that `other` must be a <number> or <integer>.
// Both of these are represented as a Number.
auto denominator = other.m_value.get<Number>().value;
// FIXME: Dividing by 0 is invalid, and should be caught during parsing.
VERIFY(denominator != 0.0f);
m_value.visit(
[&](Number const& number) {
m_value = Number {
.is_integer = false,
.value = number.value / denominator
};
},
[&](Length const& length) {
VERIFY(layout_node);
m_value = Length::make_px(length.to_px(*layout_node) / denominator);
},
[&](Percentage const& percentage) {
m_value = Percentage { percentage.value() / denominator };
});
}
String CalculatedStyleValue::to_string() const
{
return String::formatted("calc({})", m_expression->to_string());
}
String CalculatedStyleValue::CalcNumberValue::to_string() const
{
return value.visit(
[](Number const& number) { return String::number(number.value); },
[](NonnullOwnPtr<CalcNumberSum> const& sum) { return String::formatted("({})", sum->to_string()); });
}
String CalculatedStyleValue::CalcValue::to_string() const
{
return value.visit(
[](Number const& number) { return String::number(number.value); },
[](Length const& length) { return length.to_string(); },
[](Percentage const& percentage) { return percentage.to_string(); },
[](NonnullOwnPtr<CalcSum> const& sum) { return String::formatted("({})", sum->to_string()); });
}
String CalculatedStyleValue::CalcSum::to_string() const
{
StringBuilder builder;
builder.append(first_calc_product->to_string());
for (auto const& item : zero_or_more_additional_calc_products)
builder.append(item.to_string());
return builder.to_string();
}
String CalculatedStyleValue::CalcNumberSum::to_string() const
{
StringBuilder builder;
builder.append(first_calc_number_product->to_string());
for (auto const& item : zero_or_more_additional_calc_number_products)
builder.append(item.to_string());
return builder.to_string();
}
String CalculatedStyleValue::CalcProduct::to_string() const
{
StringBuilder builder;
builder.append(first_calc_value.to_string());
for (auto const& item : zero_or_more_additional_calc_values)
builder.append(item.to_string());
return builder.to_string();
}
String CalculatedStyleValue::CalcSumPartWithOperator::to_string() const
{
return String::formatted(" {} {}", op == SumOperation::Add ? "+"sv : "-"sv, value->to_string());
}
String CalculatedStyleValue::CalcProductPartWithOperator::to_string() const
{
auto value_string = value.visit(
[](CalcValue const& v) { return v.to_string(); },
[](CalcNumberValue const& v) { return v.to_string(); });
return String::formatted(" {} {}", op == ProductOperation::Multiply ? "*"sv : "/"sv, value_string);
}
String CalculatedStyleValue::CalcNumberProduct::to_string() const
{
StringBuilder builder;
builder.append(first_calc_number_value.to_string());
for (auto const& item : zero_or_more_additional_calc_number_values)
builder.append(item.to_string());
return builder.to_string();
}
String CalculatedStyleValue::CalcNumberProductPartWithOperator::to_string() const
{
return String::formatted(" {} {}", op == ProductOperation::Multiply ? "*"sv : "/"sv, value.to_string());
}
String CalculatedStyleValue::CalcNumberSumPartWithOperator::to_string() const
{
return String::formatted(" {} {}", op == SumOperation::Add ? "+"sv : "-"sv, value->to_string());
}
Optional<Length> CalculatedStyleValue::resolve_length(Layout::Node const& layout_node) const
{
auto result = m_expression->resolve(&layout_node, {});
return result.value().visit(
[&](Number) -> Optional<Length> {
return {};
},
[&](Length const& length) -> Optional<Length> {
return length;
},
[&](Percentage const&) -> Optional<Length> {
return {};
});
}
Optional<LengthPercentage> CalculatedStyleValue::resolve_length_percentage(Layout::Node const& layout_node, Length const& percentage_basis) const
{
VERIFY(!percentage_basis.is_undefined());
auto result = m_expression->resolve(&layout_node, percentage_basis);
return result.value().visit(
[&](Number) -> Optional<LengthPercentage> {
return {};
},
[&](Length const& length) -> Optional<LengthPercentage> {
return length;
},
[&](Percentage const& percentage) -> Optional<LengthPercentage> {
return percentage;
});
}
Optional<Percentage> CalculatedStyleValue::resolve_percentage() const
{
auto result = m_expression->resolve(nullptr, {});
if (result.value().has<Percentage>())
return result.value().get<Percentage>();
return {};
}
Optional<float> CalculatedStyleValue::resolve_number()
{
auto result = m_expression->resolve(nullptr, {});
if (result.value().has<Number>())
return result.value().get<Number>().value;
return {};
}
Optional<i64> CalculatedStyleValue::resolve_integer()
{
auto result = m_expression->resolve(nullptr, {});
if (result.value().has<Number>())
return lroundf(result.value().get<Number>().value);
return {};
}
static bool is_number(CalculatedStyleValue::ResolvedType type)
{
return type == CalculatedStyleValue::ResolvedType::Number || type == CalculatedStyleValue::ResolvedType::Integer;
}
static bool is_dimension(CalculatedStyleValue::ResolvedType type)
{
return type != CalculatedStyleValue::ResolvedType::Number
&& type != CalculatedStyleValue::ResolvedType::Integer
&& type != CalculatedStyleValue::ResolvedType::Percentage;
}
template<typename SumWithOperator>
static Optional<CalculatedStyleValue::ResolvedType> resolve_sum_type(CalculatedStyleValue::ResolvedType first_type, NonnullOwnPtrVector<SumWithOperator> const& zero_or_more_additional_products)
{
auto type = first_type;
for (auto const& product : zero_or_more_additional_products) {
auto maybe_product_type = product.resolved_type();
if (!maybe_product_type.has_value())
return {};
auto product_type = maybe_product_type.value();
// At + or -, check that both sides have the same type, or that one side is a <number> and the other is an <integer>.
// If both sides are the same type, resolve to that type.
if (product_type == type)
continue;
// If one side is a <number> and the other is an <integer>, resolve to <number>.
if (is_number(type) && is_number(product_type)) {
type = CalculatedStyleValue::ResolvedType::Number;
continue;
}
// FIXME: calc() handles <percentage> by allowing them to pretend to be whatever <dimension> type is allowed at this location.
// Since we can't easily check what that type is, we just allow <percentage> to combine with any other <dimension> type.
if (type == CalculatedStyleValue::ResolvedType::Percentage && is_dimension(product_type)) {
type = product_type;
continue;
}
if (is_dimension(type) && product_type == CalculatedStyleValue::ResolvedType::Percentage)
continue;
return {};
}
return type;
}
Optional<CalculatedStyleValue::ResolvedType> CalculatedStyleValue::CalcSum::resolved_type() const
{
auto maybe_type = first_calc_product->resolved_type();
if (!maybe_type.has_value())
return {};
auto type = maybe_type.value();
return resolve_sum_type(type, zero_or_more_additional_calc_products);
}
Optional<CalculatedStyleValue::ResolvedType> CalculatedStyleValue::CalcNumberSum::resolved_type() const
{
auto maybe_type = first_calc_number_product->resolved_type();
if (!maybe_type.has_value())
return {};
auto type = maybe_type.value();
return resolve_sum_type(type, zero_or_more_additional_calc_number_products);
}
template<typename ProductWithOperator>
static Optional<CalculatedStyleValue::ResolvedType> resolve_product_type(CalculatedStyleValue::ResolvedType first_type, NonnullOwnPtrVector<ProductWithOperator> const& zero_or_more_additional_values)
{
auto type = first_type;
for (auto const& value : zero_or_more_additional_values) {
auto maybe_value_type = value.resolved_type();
if (!maybe_value_type.has_value())
return {};
auto value_type = maybe_value_type.value();
if (value.op == CalculatedStyleValue::ProductOperation::Multiply) {
// At *, check that at least one side is <number>.
if (!(is_number(type) || is_number(value_type)))
return {};
// If both sides are <integer>, resolve to <integer>.
if (type == CalculatedStyleValue::ResolvedType::Integer && value_type == CalculatedStyleValue::ResolvedType::Integer) {
type = CalculatedStyleValue::ResolvedType::Integer;
} else {
// Otherwise, resolve to the type of the other side.
if (is_number(type))
type = value_type;
}
continue;
} else {
VERIFY(value.op == CalculatedStyleValue::ProductOperation::Divide);
// At /, check that the right side is <number>.
if (!is_number(value_type))
return {};
// If the left side is <integer>, resolve to <number>.
if (type == CalculatedStyleValue::ResolvedType::Integer) {
type = CalculatedStyleValue::ResolvedType::Number;
} else {
// Otherwise, resolve to the type of the left side.
}
// FIXME: Division by zero makes the whole calc() expression invalid.
}
}
return type;
}
Optional<CalculatedStyleValue::ResolvedType> CalculatedStyleValue::CalcProduct::resolved_type() const
{
auto maybe_type = first_calc_value.resolved_type();
if (!maybe_type.has_value())
return {};
auto type = maybe_type.value();
return resolve_product_type(type, zero_or_more_additional_calc_values);
}
Optional<CalculatedStyleValue::ResolvedType> CalculatedStyleValue::CalcSumPartWithOperator::resolved_type() const
{
return value->resolved_type();
}
Optional<CalculatedStyleValue::ResolvedType> CalculatedStyleValue::CalcNumberProduct::resolved_type() const
{
auto maybe_type = first_calc_number_value.resolved_type();
if (!maybe_type.has_value())
return {};
auto type = maybe_type.value();
return resolve_product_type(type, zero_or_more_additional_calc_number_values);
}
Optional<CalculatedStyleValue::ResolvedType> CalculatedStyleValue::CalcNumberProductPartWithOperator::resolved_type() const
{
return value.resolved_type();
}
Optional<CalculatedStyleValue::ResolvedType> CalculatedStyleValue::CalcNumberSumPartWithOperator::resolved_type() const
{
return value->resolved_type();
}
Optional<CalculatedStyleValue::ResolvedType> CalculatedStyleValue::CalcProductPartWithOperator::resolved_type() const
{
return value.visit(
[](CalcValue const& calc_value) {
return calc_value.resolved_type();
},
[](CalcNumberValue const& calc_number_value) {
return calc_number_value.resolved_type();
});
}
Optional<CalculatedStyleValue::ResolvedType> CalculatedStyleValue::CalcValue::resolved_type() const
{
return value.visit(
[](Number const& number) -> Optional<CalculatedStyleValue::ResolvedType> {
return { number.is_integer ? ResolvedType::Integer : ResolvedType::Number };
},
[](Length const&) -> Optional<CalculatedStyleValue::ResolvedType> { return { ResolvedType::Length }; },
[](Percentage const&) -> Optional<CalculatedStyleValue::ResolvedType> { return { ResolvedType::Percentage }; },
[](NonnullOwnPtr<CalcSum> const& sum) { return sum->resolved_type(); });
}
Optional<CalculatedStyleValue::ResolvedType> CalculatedStyleValue::CalcNumberValue::resolved_type() const
{
return value.visit(
[](Number const& number) -> Optional<CalculatedStyleValue::ResolvedType> {
return { number.is_integer ? ResolvedType::Integer : ResolvedType::Number };
},
[](NonnullOwnPtr<CalcNumberSum> const& sum) { return sum->resolved_type(); });
}
CalculatedStyleValue::CalculationResult CalculatedStyleValue::CalcNumberValue::resolve(Layout::Node const* layout_node, Length const& percentage_basis) const
{
return value.visit(
[&](Number const& number) -> CalculatedStyleValue::CalculationResult {
return CalculatedStyleValue::CalculationResult { number };
},
[&](NonnullOwnPtr<CalcNumberSum> const& sum) -> CalculatedStyleValue::CalculationResult {
return sum->resolve(layout_node, percentage_basis);
});
}
CalculatedStyleValue::CalculationResult CalculatedStyleValue::CalcValue::resolve(Layout::Node const* layout_node, Length const& percentage_basis) const
{
return value.visit(
[&](Number const& number) -> CalculatedStyleValue::CalculationResult {
return CalculatedStyleValue::CalculationResult { number };
},
[&](Length const& length) -> CalculatedStyleValue::CalculationResult {
return CalculatedStyleValue::CalculationResult { length };
},
[&](Percentage const& percentage) -> CalculatedStyleValue::CalculationResult {
return CalculatedStyleValue::CalculationResult { percentage };
},
[&](NonnullOwnPtr<CalcSum> const& sum) -> CalculatedStyleValue::CalculationResult {
return sum->resolve(layout_node, percentage_basis);
});
}
CalculatedStyleValue::CalculationResult CalculatedStyleValue::CalcSum::resolve(Layout::Node const* layout_node, Length const& percentage_basis) const
{
auto value = first_calc_product->resolve(layout_node, percentage_basis);
for (auto& additional_product : zero_or_more_additional_calc_products) {
auto additional_value = additional_product.resolve(layout_node, percentage_basis);
if (additional_product.op == CalculatedStyleValue::SumOperation::Add)
value.add(additional_value, layout_node, percentage_basis);
else if (additional_product.op == CalculatedStyleValue::SumOperation::Subtract)
value.subtract(additional_value, layout_node, percentage_basis);
else
VERIFY_NOT_REACHED();
}
return value;
}
CalculatedStyleValue::CalculationResult CalculatedStyleValue::CalcNumberSum::resolve(Layout::Node const* layout_node, Length const& percentage_basis) const
{
auto value = first_calc_number_product->resolve(layout_node, percentage_basis);
for (auto& additional_product : zero_or_more_additional_calc_number_products) {
auto additional_value = additional_product.resolve(layout_node, percentage_basis);
if (additional_product.op == CSS::CalculatedStyleValue::SumOperation::Add)
value.add(additional_value, layout_node, percentage_basis);
else if (additional_product.op == CalculatedStyleValue::SumOperation::Subtract)
value.subtract(additional_value, layout_node, percentage_basis);
else
VERIFY_NOT_REACHED();
}
return value;
}
CalculatedStyleValue::CalculationResult CalculatedStyleValue::CalcProduct::resolve(Layout::Node const* layout_node, Length const& percentage_basis) const
{
auto value = first_calc_value.resolve(layout_node, percentage_basis);
for (auto& additional_value : zero_or_more_additional_calc_values) {
additional_value.value.visit(
[&](CalculatedStyleValue::CalcValue const& calc_value) {
VERIFY(additional_value.op == CalculatedStyleValue::ProductOperation::Multiply);
auto resolved_value = calc_value.resolve(layout_node, percentage_basis);
value.multiply_by(resolved_value, layout_node);
},
[&](CalculatedStyleValue::CalcNumberValue const& calc_number_value) {
VERIFY(additional_value.op == CalculatedStyleValue::ProductOperation::Divide);
auto resolved_calc_number_value = calc_number_value.resolve(layout_node, percentage_basis);
// FIXME: Checking for division by 0 should happen during parsing.
VERIFY(resolved_calc_number_value.value().get<Number>().value != 0.0f);
value.divide_by(resolved_calc_number_value, layout_node);
});
}
return value;
}
CalculatedStyleValue::CalculationResult CalculatedStyleValue::CalcNumberProduct::resolve(Layout::Node const* layout_node, Length const& percentage_basis) const
{
auto value = first_calc_number_value.resolve(layout_node, percentage_basis);
for (auto& additional_number_value : zero_or_more_additional_calc_number_values) {
auto additional_value = additional_number_value.resolve(layout_node, percentage_basis);
if (additional_number_value.op == CalculatedStyleValue::ProductOperation::Multiply)
value.multiply_by(additional_value, layout_node);
else if (additional_number_value.op == CalculatedStyleValue::ProductOperation::Divide)
value.divide_by(additional_value, layout_node);
else
VERIFY_NOT_REACHED();
}
return value;
}
CalculatedStyleValue::CalculationResult CalculatedStyleValue::CalcProductPartWithOperator::resolve(Layout::Node const* layout_node, Length const& percentage_basis) const
{
return value.visit(
[&](CalcValue const& calc_value) {
return calc_value.resolve(layout_node, percentage_basis);
},
[&](CalcNumberValue const& calc_number_value) {
return calc_number_value.resolve(layout_node, percentage_basis);
});
}
CalculatedStyleValue::CalculationResult CalculatedStyleValue::CalcSumPartWithOperator::resolve(Layout::Node const* layout_node, Length const& percentage_basis) const
{
return value->resolve(layout_node, percentage_basis);
}
CalculatedStyleValue::CalculationResult CalculatedStyleValue::CalcNumberProductPartWithOperator::resolve(Layout::Node const* layout_node, Length const& percentage_basis) const
{
return value.resolve(layout_node, percentage_basis);
}
CalculatedStyleValue::CalculationResult CalculatedStyleValue::CalcNumberSumPartWithOperator::resolve(Layout::Node const* layout_node, Length const& percentage_basis) const
{
return value->resolve(layout_node, percentage_basis);
}
// https://www.w3.org/TR/css-color-4/#serializing-sRGB-values
String ColorStyleValue::to_string() const
{
if (m_color.alpha() == 1)
return String::formatted("rgb({}, {}, {})", m_color.red(), m_color.green(), m_color.blue());
return String::formatted("rgba({}, {}, {}, {})", m_color.red(), m_color.green(), m_color.blue(), (float)(m_color.alpha()) / 255.0f);
}
String CombinedBorderRadiusStyleValue::to_string() const
{
return String::formatted("{} {} {} {} / {} {} {} {}", m_top_left->horizontal_radius().to_string(), m_top_right->horizontal_radius().to_string(), m_bottom_right->horizontal_radius().to_string(), m_bottom_left->horizontal_radius().to_string(), m_top_left->vertical_radius().to_string(), m_top_right->vertical_radius().to_string(), m_bottom_right->vertical_radius().to_string(), m_bottom_left->vertical_radius().to_string());
}
String FlexStyleValue::to_string() const
{
return String::formatted("{} {} {}", m_grow->to_string(), m_shrink->to_string(), m_basis->to_string());
}
String FlexFlowStyleValue::to_string() const
{
return String::formatted("{} {}", m_flex_direction->to_string(), m_flex_wrap->to_string());
}
String FontStyleValue::to_string() const
{
return String::formatted("{} {} {} / {} {}", m_font_style->to_string(), m_font_weight->to_string(), m_font_size->to_string(), m_line_height->to_string(), m_font_families->to_string());
}
String IdentifierStyleValue::to_string() const
{
return CSS::string_from_value_id(m_id);
}
bool IdentifierStyleValue::has_color() const
{
switch (m_id) {
case ValueID::Currentcolor:
case ValueID::LibwebLink:
case ValueID::LibwebPaletteActiveLink:
case ValueID::LibwebPaletteActiveWindowBorder1:
case ValueID::LibwebPaletteActiveWindowBorder2:
case ValueID::LibwebPaletteActiveWindowTitle:
case ValueID::LibwebPaletteBase:
case ValueID::LibwebPaletteBaseText:
case ValueID::LibwebPaletteButton:
case ValueID::LibwebPaletteButtonText:
case ValueID::LibwebPaletteDesktopBackground:
case ValueID::LibwebPaletteFocusOutline:
case ValueID::LibwebPaletteHighlightWindowBorder1:
case ValueID::LibwebPaletteHighlightWindowBorder2:
case ValueID::LibwebPaletteHighlightWindowTitle:
case ValueID::LibwebPaletteHoverHighlight:
case ValueID::LibwebPaletteInactiveSelection:
case ValueID::LibwebPaletteInactiveSelectionText:
case ValueID::LibwebPaletteInactiveWindowBorder1:
case ValueID::LibwebPaletteInactiveWindowBorder2:
case ValueID::LibwebPaletteInactiveWindowTitle:
case ValueID::LibwebPaletteLink:
case ValueID::LibwebPaletteMenuBase:
case ValueID::LibwebPaletteMenuBaseText:
case ValueID::LibwebPaletteMenuSelection:
case ValueID::LibwebPaletteMenuSelectionText:
case ValueID::LibwebPaletteMenuStripe:
case ValueID::LibwebPaletteMovingWindowBorder1:
case ValueID::LibwebPaletteMovingWindowBorder2:
case ValueID::LibwebPaletteMovingWindowTitle:
case ValueID::LibwebPaletteRubberBandBorder:
case ValueID::LibwebPaletteRubberBandFill:
case ValueID::LibwebPaletteRuler:
case ValueID::LibwebPaletteRulerActiveText:
case ValueID::LibwebPaletteRulerBorder:
case ValueID::LibwebPaletteRulerInactiveText:
case ValueID::LibwebPaletteSelection:
case ValueID::LibwebPaletteSelectionText:
case ValueID::LibwebPaletteSyntaxComment:
case ValueID::LibwebPaletteSyntaxControlKeyword:
case ValueID::LibwebPaletteSyntaxIdentifier:
case ValueID::LibwebPaletteSyntaxKeyword:
case ValueID::LibwebPaletteSyntaxNumber:
case ValueID::LibwebPaletteSyntaxOperator:
case ValueID::LibwebPaletteSyntaxPreprocessorStatement:
case ValueID::LibwebPaletteSyntaxPreprocessorValue:
case ValueID::LibwebPaletteSyntaxPunctuation:
case ValueID::LibwebPaletteSyntaxString:
case ValueID::LibwebPaletteSyntaxType:
case ValueID::LibwebPaletteTextCursor:
case ValueID::LibwebPaletteThreedHighlight:
case ValueID::LibwebPaletteThreedShadow1:
case ValueID::LibwebPaletteThreedShadow2:
case ValueID::LibwebPaletteVisitedLink:
case ValueID::LibwebPaletteWindow:
case ValueID::LibwebPaletteWindowText:
return true;
default:
return false;
}
}
Color IdentifierStyleValue::to_color(Layout::NodeWithStyle const& node) const
{
if (id() == CSS::ValueID::Currentcolor) {
if (!node.has_style())
return Color::Black;
return node.computed_values().color();
}
auto& document = node.document();
if (id() == CSS::ValueID::LibwebLink)
return document.link_color();
VERIFY(document.page());
auto palette = document.page()->palette();
switch (id()) {
case CSS::ValueID::LibwebPaletteDesktopBackground:
return palette.color(ColorRole::DesktopBackground);
case CSS::ValueID::LibwebPaletteActiveWindowBorder1:
return palette.color(ColorRole::ActiveWindowBorder1);
case CSS::ValueID::LibwebPaletteActiveWindowBorder2:
return palette.color(ColorRole::ActiveWindowBorder2);
case CSS::ValueID::LibwebPaletteActiveWindowTitle:
return palette.color(ColorRole::ActiveWindowTitle);
case CSS::ValueID::LibwebPaletteInactiveWindowBorder1:
return palette.color(ColorRole::InactiveWindowBorder1);
case CSS::ValueID::LibwebPaletteInactiveWindowBorder2:
return palette.color(ColorRole::InactiveWindowBorder2);
case CSS::ValueID::LibwebPaletteInactiveWindowTitle:
return palette.color(ColorRole::InactiveWindowTitle);
case CSS::ValueID::LibwebPaletteMovingWindowBorder1:
return palette.color(ColorRole::MovingWindowBorder1);
case CSS::ValueID::LibwebPaletteMovingWindowBorder2:
return palette.color(ColorRole::MovingWindowBorder2);
case CSS::ValueID::LibwebPaletteMovingWindowTitle:
return palette.color(ColorRole::MovingWindowTitle);
case CSS::ValueID::LibwebPaletteHighlightWindowBorder1:
return palette.color(ColorRole::HighlightWindowBorder1);
case CSS::ValueID::LibwebPaletteHighlightWindowBorder2:
return palette.color(ColorRole::HighlightWindowBorder2);
case CSS::ValueID::LibwebPaletteHighlightWindowTitle:
return palette.color(ColorRole::HighlightWindowTitle);
case CSS::ValueID::LibwebPaletteMenuStripe:
return palette.color(ColorRole::MenuStripe);
case CSS::ValueID::LibwebPaletteMenuBase:
return palette.color(ColorRole::MenuBase);
case CSS::ValueID::LibwebPaletteMenuBaseText:
return palette.color(ColorRole::MenuBaseText);
case CSS::ValueID::LibwebPaletteMenuSelection:
return palette.color(ColorRole::MenuSelection);
case CSS::ValueID::LibwebPaletteMenuSelectionText:
return palette.color(ColorRole::MenuSelectionText);
case CSS::ValueID::LibwebPaletteWindow:
return palette.color(ColorRole::Window);
case CSS::ValueID::LibwebPaletteWindowText:
return palette.color(ColorRole::WindowText);
case CSS::ValueID::LibwebPaletteButton:
return palette.color(ColorRole::Button);
case CSS::ValueID::LibwebPaletteButtonText:
return palette.color(ColorRole::ButtonText);
case CSS::ValueID::LibwebPaletteBase:
return palette.color(ColorRole::Base);
case CSS::ValueID::LibwebPaletteBaseText:
return palette.color(ColorRole::BaseText);
case CSS::ValueID::LibwebPaletteThreedHighlight:
return palette.color(ColorRole::ThreedHighlight);
case CSS::ValueID::LibwebPaletteThreedShadow1:
return palette.color(ColorRole::ThreedShadow1);
case CSS::ValueID::LibwebPaletteThreedShadow2:
return palette.color(ColorRole::ThreedShadow2);
case CSS::ValueID::LibwebPaletteHoverHighlight:
return palette.color(ColorRole::HoverHighlight);
case CSS::ValueID::LibwebPaletteSelection:
return palette.color(ColorRole::Selection);
case CSS::ValueID::LibwebPaletteSelectionText:
return palette.color(ColorRole::SelectionText);
case CSS::ValueID::LibwebPaletteInactiveSelection:
return palette.color(ColorRole::InactiveSelection);
case CSS::ValueID::LibwebPaletteInactiveSelectionText:
return palette.color(ColorRole::InactiveSelectionText);
case CSS::ValueID::LibwebPaletteRubberBandFill:
return palette.color(ColorRole::RubberBandFill);
case CSS::ValueID::LibwebPaletteRubberBandBorder:
return palette.color(ColorRole::RubberBandBorder);
case CSS::ValueID::LibwebPaletteLink:
return palette.color(ColorRole::Link);
case CSS::ValueID::LibwebPaletteActiveLink:
return palette.color(ColorRole::ActiveLink);
case CSS::ValueID::LibwebPaletteVisitedLink:
return palette.color(ColorRole::VisitedLink);
case CSS::ValueID::LibwebPaletteRuler:
return palette.color(ColorRole::Ruler);
case CSS::ValueID::LibwebPaletteRulerBorder:
return palette.color(ColorRole::RulerBorder);
case CSS::ValueID::LibwebPaletteRulerActiveText:
return palette.color(ColorRole::RulerActiveText);
case CSS::ValueID::LibwebPaletteRulerInactiveText:
return palette.color(ColorRole::RulerInactiveText);
case CSS::ValueID::LibwebPaletteTextCursor:
return palette.color(ColorRole::TextCursor);
case CSS::ValueID::LibwebPaletteFocusOutline:
return palette.color(ColorRole::FocusOutline);
case CSS::ValueID::LibwebPaletteSyntaxComment:
return palette.color(ColorRole::SyntaxComment);
case CSS::ValueID::LibwebPaletteSyntaxNumber:
return palette.color(ColorRole::SyntaxNumber);
case CSS::ValueID::LibwebPaletteSyntaxString:
return palette.color(ColorRole::SyntaxString);
case CSS::ValueID::LibwebPaletteSyntaxType:
return palette.color(ColorRole::SyntaxType);
case CSS::ValueID::LibwebPaletteSyntaxPunctuation:
return palette.color(ColorRole::SyntaxPunctuation);
case CSS::ValueID::LibwebPaletteSyntaxOperator:
return palette.color(ColorRole::SyntaxOperator);
case CSS::ValueID::LibwebPaletteSyntaxKeyword:
return palette.color(ColorRole::SyntaxKeyword);
case CSS::ValueID::LibwebPaletteSyntaxControlKeyword:
return palette.color(ColorRole::SyntaxControlKeyword);
case CSS::ValueID::LibwebPaletteSyntaxIdentifier:
return palette.color(ColorRole::SyntaxIdentifier);
case CSS::ValueID::LibwebPaletteSyntaxPreprocessorStatement:
return palette.color(ColorRole::SyntaxPreprocessorStatement);
case CSS::ValueID::LibwebPaletteSyntaxPreprocessorValue:
return palette.color(ColorRole::SyntaxPreprocessorValue);
default:
return {};
}
}
ImageStyleValue::ImageStyleValue(AK::URL const& url)
: StyleValue(Type::Image)
, m_url(url)
{
}
void ImageStyleValue::load_bitmap(DOM::Document& document)
{
if (m_bitmap)
return;
m_document = &document;
auto request = LoadRequest::create_for_url_on_page(m_url, document.page());
set_resource(ResourceLoader::the().load_resource(Resource::Type::Image, request));
}
void ImageStyleValue::resource_did_load()
{
if (!m_document)
return;
m_bitmap = resource()->bitmap();
// FIXME: Do less than a full repaint if possible?
if (m_document && m_document->browsing_context())
m_document->browsing_context()->set_needs_display({});
}
String ImageStyleValue::to_string() const
{
return serialize_a_url(m_url.to_string());
}
String ListStyleStyleValue::to_string() const
{
return String::formatted("{} {} {}", m_position->to_string(), m_image->to_string(), m_style_type->to_string());
}
String NumericStyleValue::to_string() const
{
return m_value.visit(
[](float value) {
return String::formatted("{}", value);
},
[](i64 value) {
return String::formatted("{}", value);
});
}
String OverflowStyleValue::to_string() const
{
return String::formatted("{} {}", m_overflow_x->to_string(), m_overflow_y->to_string());
}
String PercentageStyleValue::to_string() const
{
return m_percentage.to_string();
}
String PositionStyleValue::to_string() const
{
auto to_string = [](PositionEdge edge) {
switch (edge) {
case PositionEdge::Left:
return "left";
case PositionEdge::Right:
return "right";
case PositionEdge::Top:
return "top";
case PositionEdge::Bottom:
return "bottom";
}
VERIFY_NOT_REACHED();
};
return String::formatted("{} {} {} {}", to_string(m_edge_x), m_offset_x.to_string(), to_string(m_edge_y), m_offset_y.to_string());
}
String TextDecorationStyleValue::to_string() const
{
return String::formatted("{} {} {}", m_line->to_string(), m_style->to_string(), m_color->to_string());
}
String TransformationStyleValue::to_string() const
{
StringBuilder builder;
switch (m_transform_function) {
case TransformFunction::TranslateY:
builder.append("translateY");
break;
default:
VERIFY_NOT_REACHED();
}
builder.append('(');
builder.join(", ", m_values);
builder.append(')');
return builder.to_string();
}
String UnresolvedStyleValue::to_string() const
{
StringBuilder builder;
for (auto& value : m_values)
builder.append(value.to_string());
return builder.to_string();
}
String StyleValueList::to_string() const
{
String separator = "";
switch (m_separator) {
case Separator::Space:
separator = " ";
break;
case Separator::Comma:
separator = ", ";
break;
default:
VERIFY_NOT_REACHED();
}
return String::join(separator, m_values);
}
}
|
; sp1_DrawUpdateStructIfInv(struct sp1_update *u)
SECTION code_clib
SECTION code_temp_sp1
PUBLIC _sp1_DrawUpdateStructIfInv
EXTERN asm_sp1_DrawUpdateStructIfInv
_sp1_DrawUpdateStructIfInv:
pop af
pop hl
push hl
push af
jp asm_sp1_DrawUpdateStructIfInv
|
default rel
%define XMMWORD
%define YMMWORD
%define ZMMWORD
section .text code align=64
EXTERN OPENSSL_ia32cap_P
global poly1305_init
global poly1305_blocks
global poly1305_emit
ALIGN 32
poly1305_init:
mov QWORD[8+rsp],rdi ;WIN64 prologue
mov QWORD[16+rsp],rsi
mov rax,rsp
$L$SEH_begin_poly1305_init:
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
xor rax,rax
mov QWORD[rdi],rax
mov QWORD[8+rdi],rax
mov QWORD[16+rdi],rax
cmp rsi,0
je NEAR $L$no_key
lea r10,[poly1305_blocks]
lea r11,[poly1305_emit]
mov r9,QWORD[((OPENSSL_ia32cap_P+4))]
lea rax,[poly1305_blocks_avx]
lea rcx,[poly1305_emit_avx]
bt r9,28
cmovc r10,rax
cmovc r11,rcx
lea rax,[poly1305_blocks_avx2]
bt r9,37
cmovc r10,rax
mov rax,0x0ffffffc0fffffff
mov rcx,0x0ffffffc0ffffffc
and rax,QWORD[rsi]
and rcx,QWORD[8+rsi]
mov QWORD[24+rdi],rax
mov QWORD[32+rdi],rcx
mov QWORD[rdx],r10
mov QWORD[8+rdx],r11
mov eax,1
$L$no_key:
mov rdi,QWORD[8+rsp] ;WIN64 epilogue
mov rsi,QWORD[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_poly1305_init:
ALIGN 32
poly1305_blocks:
mov QWORD[8+rsp],rdi ;WIN64 prologue
mov QWORD[16+rsp],rsi
mov rax,rsp
$L$SEH_begin_poly1305_blocks:
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
mov rcx,r9
$L$blocks:
sub rdx,16
jc NEAR $L$no_data
push rbx
push rbp
push r12
push r13
push r14
push r15
$L$blocks_body:
mov r15,rdx
mov r11,QWORD[24+rdi]
mov r13,QWORD[32+rdi]
mov r14,QWORD[rdi]
mov rbx,QWORD[8+rdi]
mov rbp,QWORD[16+rdi]
mov r12,r13
shr r13,2
mov rax,r12
add r13,r12
jmp NEAR $L$oop
ALIGN 32
$L$oop:
add r14,QWORD[rsi]
adc rbx,QWORD[8+rsi]
lea rsi,[16+rsi]
adc rbp,rcx
mul r14
mov r9,rax
mov rax,r11
mov r10,rdx
mul r14
mov r14,rax
mov rax,r11
mov r8,rdx
mul rbx
add r9,rax
mov rax,r13
adc r10,rdx
mul rbx
mov rbx,rbp
add r14,rax
adc r8,rdx
imul rbx,r13
add r9,rbx
mov rbx,r8
adc r10,0
imul rbp,r11
add rbx,r9
mov rax,-4
adc r10,rbp
and rax,r10
mov rbp,r10
shr r10,2
and rbp,3
add rax,r10
add r14,rax
adc rbx,0
mov rax,r12
sub r15,16
jnc NEAR $L$oop
mov QWORD[rdi],r14
mov QWORD[8+rdi],rbx
mov QWORD[16+rdi],rbp
mov r15,QWORD[rsp]
mov r14,QWORD[8+rsp]
mov r13,QWORD[16+rsp]
mov r12,QWORD[24+rsp]
mov rbp,QWORD[32+rsp]
mov rbx,QWORD[40+rsp]
lea rsp,[48+rsp]
$L$no_data:
$L$blocks_epilogue:
mov rdi,QWORD[8+rsp] ;WIN64 epilogue
mov rsi,QWORD[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_poly1305_blocks:
ALIGN 32
poly1305_emit:
mov QWORD[8+rsp],rdi ;WIN64 prologue
mov QWORD[16+rsp],rsi
mov rax,rsp
$L$SEH_begin_poly1305_emit:
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
$L$emit:
mov r8,QWORD[rdi]
mov r9,QWORD[8+rdi]
mov r10,QWORD[16+rdi]
mov rax,r8
add r8,5
mov rcx,r9
adc r9,0
adc r10,0
shr r10,2
cmovnz rax,r8
cmovnz rcx,r9
add rax,QWORD[rdx]
adc rcx,QWORD[8+rdx]
mov QWORD[rsi],rax
mov QWORD[8+rsi],rcx
mov rdi,QWORD[8+rsp] ;WIN64 epilogue
mov rsi,QWORD[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_poly1305_emit:
ALIGN 32
__poly1305_block:
mul r14
mov r9,rax
mov rax,r11
mov r10,rdx
mul r14
mov r14,rax
mov rax,r11
mov r8,rdx
mul rbx
add r9,rax
mov rax,r13
adc r10,rdx
mul rbx
mov rbx,rbp
add r14,rax
adc r8,rdx
imul rbx,r13
add r9,rbx
mov rbx,r8
adc r10,0
imul rbp,r11
add rbx,r9
mov rax,-4
adc r10,rbp
and rax,r10
mov rbp,r10
shr r10,2
and rbp,3
add rax,r10
add r14,rax
adc rbx,0
DB 0F3h,0C3h ;repret
ALIGN 32
__poly1305_init_avx:
mov r14,r11
mov rbx,r12
xor rbp,rbp
lea rdi,[((48+64))+rdi]
mov rax,r12
call __poly1305_block
mov eax,0x3ffffff
mov edx,0x3ffffff
mov r8,r14
and eax,r14d
mov r9,r11
and edx,r11d
mov DWORD[((-64))+rdi],eax
shr r8,26
mov DWORD[((-60))+rdi],edx
shr r9,26
mov eax,0x3ffffff
mov edx,0x3ffffff
and eax,r8d
and edx,r9d
mov DWORD[((-48))+rdi],eax
lea eax,[rax*4+rax]
mov DWORD[((-44))+rdi],edx
lea edx,[rdx*4+rdx]
mov DWORD[((-32))+rdi],eax
shr r8,26
mov DWORD[((-28))+rdi],edx
shr r9,26
mov rax,rbx
mov rdx,r12
shl rax,12
shl rdx,12
or rax,r8
or rdx,r9
and eax,0x3ffffff
and edx,0x3ffffff
mov DWORD[((-16))+rdi],eax
lea eax,[rax*4+rax]
mov DWORD[((-12))+rdi],edx
lea edx,[rdx*4+rdx]
mov DWORD[rdi],eax
mov r8,rbx
mov DWORD[4+rdi],edx
mov r9,r12
mov eax,0x3ffffff
mov edx,0x3ffffff
shr r8,14
shr r9,14
and eax,r8d
and edx,r9d
mov DWORD[16+rdi],eax
lea eax,[rax*4+rax]
mov DWORD[20+rdi],edx
lea edx,[rdx*4+rdx]
mov DWORD[32+rdi],eax
shr r8,26
mov DWORD[36+rdi],edx
shr r9,26
mov rax,rbp
shl rax,24
or r8,rax
mov DWORD[48+rdi],r8d
lea r8,[r8*4+r8]
mov DWORD[52+rdi],r9d
lea r9,[r9*4+r9]
mov DWORD[64+rdi],r8d
mov DWORD[68+rdi],r9d
mov rax,r12
call __poly1305_block
mov eax,0x3ffffff
mov r8,r14
and eax,r14d
shr r8,26
mov DWORD[((-52))+rdi],eax
mov edx,0x3ffffff
and edx,r8d
mov DWORD[((-36))+rdi],edx
lea edx,[rdx*4+rdx]
shr r8,26
mov DWORD[((-20))+rdi],edx
mov rax,rbx
shl rax,12
or rax,r8
and eax,0x3ffffff
mov DWORD[((-4))+rdi],eax
lea eax,[rax*4+rax]
mov r8,rbx
mov DWORD[12+rdi],eax
mov edx,0x3ffffff
shr r8,14
and edx,r8d
mov DWORD[28+rdi],edx
lea edx,[rdx*4+rdx]
shr r8,26
mov DWORD[44+rdi],edx
mov rax,rbp
shl rax,24
or r8,rax
mov DWORD[60+rdi],r8d
lea r8,[r8*4+r8]
mov DWORD[76+rdi],r8d
mov rax,r12
call __poly1305_block
mov eax,0x3ffffff
mov r8,r14
and eax,r14d
shr r8,26
mov DWORD[((-56))+rdi],eax
mov edx,0x3ffffff
and edx,r8d
mov DWORD[((-40))+rdi],edx
lea edx,[rdx*4+rdx]
shr r8,26
mov DWORD[((-24))+rdi],edx
mov rax,rbx
shl rax,12
or rax,r8
and eax,0x3ffffff
mov DWORD[((-8))+rdi],eax
lea eax,[rax*4+rax]
mov r8,rbx
mov DWORD[8+rdi],eax
mov edx,0x3ffffff
shr r8,14
and edx,r8d
mov DWORD[24+rdi],edx
lea edx,[rdx*4+rdx]
shr r8,26
mov DWORD[40+rdi],edx
mov rax,rbp
shl rax,24
or r8,rax
mov DWORD[56+rdi],r8d
lea r8,[r8*4+r8]
mov DWORD[72+rdi],r8d
lea rdi,[((-48-64))+rdi]
DB 0F3h,0C3h ;repret
ALIGN 32
poly1305_blocks_avx:
mov QWORD[8+rsp],rdi ;WIN64 prologue
mov QWORD[16+rsp],rsi
mov rax,rsp
$L$SEH_begin_poly1305_blocks_avx:
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
mov rcx,r9
mov r8d,DWORD[20+rdi]
cmp rdx,128
jae NEAR $L$blocks_avx
test r8d,r8d
jz NEAR $L$blocks
$L$blocks_avx:
and rdx,-16
jz NEAR $L$no_data_avx
vzeroupper
test r8d,r8d
jz NEAR $L$base2_64_avx
test rdx,31
jz NEAR $L$even_avx
push rbx
push rbp
push r12
push r13
push r14
push r15
$L$blocks_avx_body:
mov r15,rdx
mov r8,QWORD[rdi]
mov r9,QWORD[8+rdi]
mov ebp,DWORD[16+rdi]
mov r11,QWORD[24+rdi]
mov r13,QWORD[32+rdi]
mov r14d,r8d
and r8,-1<<31
mov r12,r9
mov ebx,r9d
and r9,-1<<31
shr r8,6
shl r12,52
add r14,r8
shr rbx,12
shr r9,18
add r14,r12
adc rbx,r9
mov r8,rbp
shl r8,40
shr rbp,24
add rbx,r8
adc rbp,0
mov r9,-4
mov r8,rbp
and r9,rbp
shr r8,2
and rbp,3
add r8,r9
add r14,r8
adc rbx,0
mov r12,r13
mov rax,r13
shr r13,2
add r13,r12
add r14,QWORD[rsi]
adc rbx,QWORD[8+rsi]
lea rsi,[16+rsi]
adc rbp,rcx
call __poly1305_block
test rcx,rcx
jz NEAR $L$store_base2_64_avx
mov rax,r14
mov rdx,r14
shr r14,52
mov r11,rbx
mov r12,rbx
shr rdx,26
and rax,0x3ffffff
shl r11,12
and rdx,0x3ffffff
shr rbx,14
or r14,r11
shl rbp,24
and r14,0x3ffffff
shr r12,40
and rbx,0x3ffffff
or rbp,r12
sub r15,16
jz NEAR $L$store_base2_26_avx
vmovd xmm0,eax
vmovd xmm1,edx
vmovd xmm2,r14d
vmovd xmm3,ebx
vmovd xmm4,ebp
jmp NEAR $L$proceed_avx
ALIGN 32
$L$store_base2_64_avx:
mov QWORD[rdi],r14
mov QWORD[8+rdi],rbx
mov QWORD[16+rdi],rbp
jmp NEAR $L$done_avx
ALIGN 16
$L$store_base2_26_avx:
mov DWORD[rdi],eax
mov DWORD[4+rdi],edx
mov DWORD[8+rdi],r14d
mov DWORD[12+rdi],ebx
mov DWORD[16+rdi],ebp
ALIGN 16
$L$done_avx:
mov r15,QWORD[rsp]
mov r14,QWORD[8+rsp]
mov r13,QWORD[16+rsp]
mov r12,QWORD[24+rsp]
mov rbp,QWORD[32+rsp]
mov rbx,QWORD[40+rsp]
lea rsp,[48+rsp]
$L$no_data_avx:
$L$blocks_avx_epilogue:
mov rdi,QWORD[8+rsp] ;WIN64 epilogue
mov rsi,QWORD[16+rsp]
DB 0F3h,0C3h ;repret
ALIGN 32
$L$base2_64_avx:
push rbx
push rbp
push r12
push r13
push r14
push r15
$L$base2_64_avx_body:
mov r15,rdx
mov r11,QWORD[24+rdi]
mov r13,QWORD[32+rdi]
mov r14,QWORD[rdi]
mov rbx,QWORD[8+rdi]
mov ebp,DWORD[16+rdi]
mov r12,r13
mov rax,r13
shr r13,2
add r13,r12
test rdx,31
jz NEAR $L$init_avx
add r14,QWORD[rsi]
adc rbx,QWORD[8+rsi]
lea rsi,[16+rsi]
adc rbp,rcx
sub r15,16
call __poly1305_block
$L$init_avx:
mov rax,r14
mov rdx,r14
shr r14,52
mov r8,rbx
mov r9,rbx
shr rdx,26
and rax,0x3ffffff
shl r8,12
and rdx,0x3ffffff
shr rbx,14
or r14,r8
shl rbp,24
and r14,0x3ffffff
shr r9,40
and rbx,0x3ffffff
or rbp,r9
vmovd xmm0,eax
vmovd xmm1,edx
vmovd xmm2,r14d
vmovd xmm3,ebx
vmovd xmm4,ebp
mov DWORD[20+rdi],1
call __poly1305_init_avx
$L$proceed_avx:
mov rdx,r15
mov r15,QWORD[rsp]
mov r14,QWORD[8+rsp]
mov r13,QWORD[16+rsp]
mov r12,QWORD[24+rsp]
mov rbp,QWORD[32+rsp]
mov rbx,QWORD[40+rsp]
lea rax,[48+rsp]
lea rsp,[48+rsp]
$L$base2_64_avx_epilogue:
jmp NEAR $L$do_avx
ALIGN 32
$L$even_avx:
vmovd xmm0,DWORD[rdi]
vmovd xmm1,DWORD[4+rdi]
vmovd xmm2,DWORD[8+rdi]
vmovd xmm3,DWORD[12+rdi]
vmovd xmm4,DWORD[16+rdi]
$L$do_avx:
lea r11,[((-248))+rsp]
sub rsp,0x218
vmovdqa XMMWORD[80+r11],xmm6
vmovdqa XMMWORD[96+r11],xmm7
vmovdqa XMMWORD[112+r11],xmm8
vmovdqa XMMWORD[128+r11],xmm9
vmovdqa XMMWORD[144+r11],xmm10
vmovdqa XMMWORD[160+r11],xmm11
vmovdqa XMMWORD[176+r11],xmm12
vmovdqa XMMWORD[192+r11],xmm13
vmovdqa XMMWORD[208+r11],xmm14
vmovdqa XMMWORD[224+r11],xmm15
$L$do_avx_body:
sub rdx,64
lea rax,[((-32))+rsi]
cmovc rsi,rax
vmovdqu xmm14,XMMWORD[48+rdi]
lea rdi,[112+rdi]
lea rcx,[$L$const]
vmovdqu xmm5,XMMWORD[32+rsi]
vmovdqu xmm6,XMMWORD[48+rsi]
vmovdqa xmm15,XMMWORD[64+rcx]
vpsrldq xmm7,xmm5,6
vpsrldq xmm8,xmm6,6
vpunpckhqdq xmm9,xmm5,xmm6
vpunpcklqdq xmm5,xmm5,xmm6
vpunpcklqdq xmm8,xmm7,xmm8
vpsrlq xmm9,xmm9,40
vpsrlq xmm6,xmm5,26
vpand xmm5,xmm5,xmm15
vpsrlq xmm7,xmm8,4
vpand xmm6,xmm6,xmm15
vpsrlq xmm8,xmm8,30
vpand xmm7,xmm7,xmm15
vpand xmm8,xmm8,xmm15
vpor xmm9,xmm9,XMMWORD[32+rcx]
jbe NEAR $L$skip_loop_avx
vmovdqu xmm11,XMMWORD[((-48))+rdi]
vmovdqu xmm12,XMMWORD[((-32))+rdi]
vpshufd xmm13,xmm14,0xEE
vpshufd xmm10,xmm14,0x44
vmovdqa XMMWORD[(-144)+r11],xmm13
vmovdqa XMMWORD[rsp],xmm10
vpshufd xmm14,xmm11,0xEE
vmovdqu xmm10,XMMWORD[((-16))+rdi]
vpshufd xmm11,xmm11,0x44
vmovdqa XMMWORD[(-128)+r11],xmm14
vmovdqa XMMWORD[16+rsp],xmm11
vpshufd xmm13,xmm12,0xEE
vmovdqu xmm11,XMMWORD[rdi]
vpshufd xmm12,xmm12,0x44
vmovdqa XMMWORD[(-112)+r11],xmm13
vmovdqa XMMWORD[32+rsp],xmm12
vpshufd xmm14,xmm10,0xEE
vmovdqu xmm12,XMMWORD[16+rdi]
vpshufd xmm10,xmm10,0x44
vmovdqa XMMWORD[(-96)+r11],xmm14
vmovdqa XMMWORD[48+rsp],xmm10
vpshufd xmm13,xmm11,0xEE
vmovdqu xmm10,XMMWORD[32+rdi]
vpshufd xmm11,xmm11,0x44
vmovdqa XMMWORD[(-80)+r11],xmm13
vmovdqa XMMWORD[64+rsp],xmm11
vpshufd xmm14,xmm12,0xEE
vmovdqu xmm11,XMMWORD[48+rdi]
vpshufd xmm12,xmm12,0x44
vmovdqa XMMWORD[(-64)+r11],xmm14
vmovdqa XMMWORD[80+rsp],xmm12
vpshufd xmm13,xmm10,0xEE
vmovdqu xmm12,XMMWORD[64+rdi]
vpshufd xmm10,xmm10,0x44
vmovdqa XMMWORD[(-48)+r11],xmm13
vmovdqa XMMWORD[96+rsp],xmm10
vpshufd xmm14,xmm11,0xEE
vpshufd xmm11,xmm11,0x44
vmovdqa XMMWORD[(-32)+r11],xmm14
vmovdqa XMMWORD[112+rsp],xmm11
vpshufd xmm13,xmm12,0xEE
vmovdqa xmm14,XMMWORD[rsp]
vpshufd xmm12,xmm12,0x44
vmovdqa XMMWORD[(-16)+r11],xmm13
vmovdqa XMMWORD[128+rsp],xmm12
jmp NEAR $L$oop_avx
ALIGN 32
$L$oop_avx:
vpmuludq xmm10,xmm14,xmm5
vpmuludq xmm11,xmm14,xmm6
vmovdqa XMMWORD[32+r11],xmm2
vpmuludq xmm12,xmm14,xmm7
vmovdqa xmm2,XMMWORD[16+rsp]
vpmuludq xmm13,xmm14,xmm8
vpmuludq xmm14,xmm14,xmm9
vmovdqa XMMWORD[r11],xmm0
vpmuludq xmm0,xmm9,XMMWORD[32+rsp]
vmovdqa XMMWORD[16+r11],xmm1
vpmuludq xmm1,xmm2,xmm8
vpaddq xmm10,xmm10,xmm0
vpaddq xmm14,xmm14,xmm1
vmovdqa XMMWORD[48+r11],xmm3
vpmuludq xmm0,xmm2,xmm7
vpmuludq xmm1,xmm2,xmm6
vpaddq xmm13,xmm13,xmm0
vmovdqa xmm3,XMMWORD[48+rsp]
vpaddq xmm12,xmm12,xmm1
vmovdqa XMMWORD[64+r11],xmm4
vpmuludq xmm2,xmm2,xmm5
vpmuludq xmm0,xmm3,xmm7
vpaddq xmm11,xmm11,xmm2
vmovdqa xmm4,XMMWORD[64+rsp]
vpaddq xmm14,xmm14,xmm0
vpmuludq xmm1,xmm3,xmm6
vpmuludq xmm3,xmm3,xmm5
vpaddq xmm13,xmm13,xmm1
vmovdqa xmm2,XMMWORD[80+rsp]
vpaddq xmm12,xmm12,xmm3
vpmuludq xmm0,xmm4,xmm9
vpmuludq xmm4,xmm4,xmm8
vpaddq xmm11,xmm11,xmm0
vmovdqa xmm3,XMMWORD[96+rsp]
vpaddq xmm10,xmm10,xmm4
vmovdqa xmm4,XMMWORD[128+rsp]
vpmuludq xmm1,xmm2,xmm6
vpmuludq xmm2,xmm2,xmm5
vpaddq xmm14,xmm14,xmm1
vpaddq xmm13,xmm13,xmm2
vpmuludq xmm0,xmm3,xmm9
vpmuludq xmm1,xmm3,xmm8
vpaddq xmm12,xmm12,xmm0
vmovdqu xmm0,XMMWORD[rsi]
vpaddq xmm11,xmm11,xmm1
vpmuludq xmm3,xmm3,xmm7
vpmuludq xmm7,xmm4,xmm7
vpaddq xmm10,xmm10,xmm3
vmovdqu xmm1,XMMWORD[16+rsi]
vpaddq xmm11,xmm11,xmm7
vpmuludq xmm8,xmm4,xmm8
vpmuludq xmm9,xmm4,xmm9
vpsrldq xmm2,xmm0,6
vpaddq xmm12,xmm12,xmm8
vpaddq xmm13,xmm13,xmm9
vpsrldq xmm3,xmm1,6
vpmuludq xmm9,xmm5,XMMWORD[112+rsp]
vpmuludq xmm5,xmm4,xmm6
vpunpckhqdq xmm4,xmm0,xmm1
vpaddq xmm14,xmm14,xmm9
vmovdqa xmm9,XMMWORD[((-144))+r11]
vpaddq xmm10,xmm10,xmm5
vpunpcklqdq xmm0,xmm0,xmm1
vpunpcklqdq xmm3,xmm2,xmm3
vpsrldq xmm4,xmm4,5
vpsrlq xmm1,xmm0,26
vpand xmm0,xmm0,xmm15
vpsrlq xmm2,xmm3,4
vpand xmm1,xmm1,xmm15
vpand xmm4,xmm4,XMMWORD[rcx]
vpsrlq xmm3,xmm3,30
vpand xmm2,xmm2,xmm15
vpand xmm3,xmm3,xmm15
vpor xmm4,xmm4,XMMWORD[32+rcx]
vpaddq xmm0,xmm0,XMMWORD[r11]
vpaddq xmm1,xmm1,XMMWORD[16+r11]
vpaddq xmm2,xmm2,XMMWORD[32+r11]
vpaddq xmm3,xmm3,XMMWORD[48+r11]
vpaddq xmm4,xmm4,XMMWORD[64+r11]
lea rax,[32+rsi]
lea rsi,[64+rsi]
sub rdx,64
cmovc rsi,rax
vpmuludq xmm5,xmm9,xmm0
vpmuludq xmm6,xmm9,xmm1
vpaddq xmm10,xmm10,xmm5
vpaddq xmm11,xmm11,xmm6
vmovdqa xmm7,XMMWORD[((-128))+r11]
vpmuludq xmm5,xmm9,xmm2
vpmuludq xmm6,xmm9,xmm3
vpaddq xmm12,xmm12,xmm5
vpaddq xmm13,xmm13,xmm6
vpmuludq xmm9,xmm9,xmm4
vpmuludq xmm5,xmm4,XMMWORD[((-112))+r11]
vpaddq xmm14,xmm14,xmm9
vpaddq xmm10,xmm10,xmm5
vpmuludq xmm6,xmm7,xmm2
vpmuludq xmm5,xmm7,xmm3
vpaddq xmm13,xmm13,xmm6
vmovdqa xmm8,XMMWORD[((-96))+r11]
vpaddq xmm14,xmm14,xmm5
vpmuludq xmm6,xmm7,xmm1
vpmuludq xmm7,xmm7,xmm0
vpaddq xmm12,xmm12,xmm6
vpaddq xmm11,xmm11,xmm7
vmovdqa xmm9,XMMWORD[((-80))+r11]
vpmuludq xmm5,xmm8,xmm2
vpmuludq xmm6,xmm8,xmm1
vpaddq xmm14,xmm14,xmm5
vpaddq xmm13,xmm13,xmm6
vmovdqa xmm7,XMMWORD[((-64))+r11]
vpmuludq xmm8,xmm8,xmm0
vpmuludq xmm5,xmm9,xmm4
vpaddq xmm12,xmm12,xmm8
vpaddq xmm11,xmm11,xmm5
vmovdqa xmm8,XMMWORD[((-48))+r11]
vpmuludq xmm9,xmm9,xmm3
vpmuludq xmm6,xmm7,xmm1
vpaddq xmm10,xmm10,xmm9
vmovdqa xmm9,XMMWORD[((-16))+r11]
vpaddq xmm14,xmm14,xmm6
vpmuludq xmm7,xmm7,xmm0
vpmuludq xmm5,xmm8,xmm4
vpaddq xmm13,xmm13,xmm7
vpaddq xmm12,xmm12,xmm5
vmovdqu xmm5,XMMWORD[32+rsi]
vpmuludq xmm7,xmm8,xmm3
vpmuludq xmm8,xmm8,xmm2
vpaddq xmm11,xmm11,xmm7
vmovdqu xmm6,XMMWORD[48+rsi]
vpaddq xmm10,xmm10,xmm8
vpmuludq xmm2,xmm9,xmm2
vpmuludq xmm3,xmm9,xmm3
vpsrldq xmm7,xmm5,6
vpaddq xmm11,xmm11,xmm2
vpmuludq xmm4,xmm9,xmm4
vpsrldq xmm8,xmm6,6
vpaddq xmm2,xmm12,xmm3
vpaddq xmm3,xmm13,xmm4
vpmuludq xmm4,xmm0,XMMWORD[((-32))+r11]
vpmuludq xmm0,xmm9,xmm1
vpunpckhqdq xmm9,xmm5,xmm6
vpaddq xmm4,xmm14,xmm4
vpaddq xmm0,xmm10,xmm0
vpunpcklqdq xmm5,xmm5,xmm6
vpunpcklqdq xmm8,xmm7,xmm8
vpsrldq xmm9,xmm9,5
vpsrlq xmm6,xmm5,26
vmovdqa xmm14,XMMWORD[rsp]
vpand xmm5,xmm5,xmm15
vpsrlq xmm7,xmm8,4
vpand xmm6,xmm6,xmm15
vpand xmm9,xmm9,XMMWORD[rcx]
vpsrlq xmm8,xmm8,30
vpand xmm7,xmm7,xmm15
vpand xmm8,xmm8,xmm15
vpor xmm9,xmm9,XMMWORD[32+rcx]
vpsrlq xmm13,xmm3,26
vpand xmm3,xmm3,xmm15
vpaddq xmm4,xmm4,xmm13
vpsrlq xmm10,xmm0,26
vpand xmm0,xmm0,xmm15
vpaddq xmm1,xmm11,xmm10
vpsrlq xmm10,xmm4,26
vpand xmm4,xmm4,xmm15
vpsrlq xmm11,xmm1,26
vpand xmm1,xmm1,xmm15
vpaddq xmm2,xmm2,xmm11
vpaddq xmm0,xmm0,xmm10
vpsllq xmm10,xmm10,2
vpaddq xmm0,xmm0,xmm10
vpsrlq xmm12,xmm2,26
vpand xmm2,xmm2,xmm15
vpaddq xmm3,xmm3,xmm12
vpsrlq xmm10,xmm0,26
vpand xmm0,xmm0,xmm15
vpaddq xmm1,xmm1,xmm10
vpsrlq xmm13,xmm3,26
vpand xmm3,xmm3,xmm15
vpaddq xmm4,xmm4,xmm13
ja NEAR $L$oop_avx
$L$skip_loop_avx:
vpshufd xmm14,xmm14,0x10
add rdx,32
jnz NEAR $L$ong_tail_avx
vpaddq xmm7,xmm7,xmm2
vpaddq xmm5,xmm5,xmm0
vpaddq xmm6,xmm6,xmm1
vpaddq xmm8,xmm8,xmm3
vpaddq xmm9,xmm9,xmm4
$L$ong_tail_avx:
vmovdqa XMMWORD[32+r11],xmm2
vmovdqa XMMWORD[r11],xmm0
vmovdqa XMMWORD[16+r11],xmm1
vmovdqa XMMWORD[48+r11],xmm3
vmovdqa XMMWORD[64+r11],xmm4
vpmuludq xmm12,xmm14,xmm7
vpmuludq xmm10,xmm14,xmm5
vpshufd xmm2,XMMWORD[((-48))+rdi],0x10
vpmuludq xmm11,xmm14,xmm6
vpmuludq xmm13,xmm14,xmm8
vpmuludq xmm14,xmm14,xmm9
vpmuludq xmm0,xmm2,xmm8
vpaddq xmm14,xmm14,xmm0
vpshufd xmm3,XMMWORD[((-32))+rdi],0x10
vpmuludq xmm1,xmm2,xmm7
vpaddq xmm13,xmm13,xmm1
vpshufd xmm4,XMMWORD[((-16))+rdi],0x10
vpmuludq xmm0,xmm2,xmm6
vpaddq xmm12,xmm12,xmm0
vpmuludq xmm2,xmm2,xmm5
vpaddq xmm11,xmm11,xmm2
vpmuludq xmm3,xmm3,xmm9
vpaddq xmm10,xmm10,xmm3
vpshufd xmm2,XMMWORD[rdi],0x10
vpmuludq xmm1,xmm4,xmm7
vpaddq xmm14,xmm14,xmm1
vpmuludq xmm0,xmm4,xmm6
vpaddq xmm13,xmm13,xmm0
vpshufd xmm3,XMMWORD[16+rdi],0x10
vpmuludq xmm4,xmm4,xmm5
vpaddq xmm12,xmm12,xmm4
vpmuludq xmm1,xmm2,xmm9
vpaddq xmm11,xmm11,xmm1
vpshufd xmm4,XMMWORD[32+rdi],0x10
vpmuludq xmm2,xmm2,xmm8
vpaddq xmm10,xmm10,xmm2
vpmuludq xmm0,xmm3,xmm6
vpaddq xmm14,xmm14,xmm0
vpmuludq xmm3,xmm3,xmm5
vpaddq xmm13,xmm13,xmm3
vpshufd xmm2,XMMWORD[48+rdi],0x10
vpmuludq xmm1,xmm4,xmm9
vpaddq xmm12,xmm12,xmm1
vpshufd xmm3,XMMWORD[64+rdi],0x10
vpmuludq xmm0,xmm4,xmm8
vpaddq xmm11,xmm11,xmm0
vpmuludq xmm4,xmm4,xmm7
vpaddq xmm10,xmm10,xmm4
vpmuludq xmm2,xmm2,xmm5
vpaddq xmm14,xmm14,xmm2
vpmuludq xmm1,xmm3,xmm9
vpaddq xmm13,xmm13,xmm1
vpmuludq xmm0,xmm3,xmm8
vpaddq xmm12,xmm12,xmm0
vpmuludq xmm1,xmm3,xmm7
vpaddq xmm11,xmm11,xmm1
vpmuludq xmm3,xmm3,xmm6
vpaddq xmm10,xmm10,xmm3
jz NEAR $L$short_tail_avx
vmovdqu xmm0,XMMWORD[rsi]
vmovdqu xmm1,XMMWORD[16+rsi]
vpsrldq xmm2,xmm0,6
vpsrldq xmm3,xmm1,6
vpunpckhqdq xmm4,xmm0,xmm1
vpunpcklqdq xmm0,xmm0,xmm1
vpunpcklqdq xmm3,xmm2,xmm3
vpsrlq xmm4,xmm4,40
vpsrlq xmm1,xmm0,26
vpand xmm0,xmm0,xmm15
vpsrlq xmm2,xmm3,4
vpand xmm1,xmm1,xmm15
vpsrlq xmm3,xmm3,30
vpand xmm2,xmm2,xmm15
vpand xmm3,xmm3,xmm15
vpor xmm4,xmm4,XMMWORD[32+rcx]
vpshufd xmm9,XMMWORD[((-64))+rdi],0x32
vpaddq xmm0,xmm0,XMMWORD[r11]
vpaddq xmm1,xmm1,XMMWORD[16+r11]
vpaddq xmm2,xmm2,XMMWORD[32+r11]
vpaddq xmm3,xmm3,XMMWORD[48+r11]
vpaddq xmm4,xmm4,XMMWORD[64+r11]
vpmuludq xmm5,xmm9,xmm0
vpaddq xmm10,xmm10,xmm5
vpmuludq xmm6,xmm9,xmm1
vpaddq xmm11,xmm11,xmm6
vpmuludq xmm5,xmm9,xmm2
vpaddq xmm12,xmm12,xmm5
vpshufd xmm7,XMMWORD[((-48))+rdi],0x32
vpmuludq xmm6,xmm9,xmm3
vpaddq xmm13,xmm13,xmm6
vpmuludq xmm9,xmm9,xmm4
vpaddq xmm14,xmm14,xmm9
vpmuludq xmm5,xmm7,xmm3
vpaddq xmm14,xmm14,xmm5
vpshufd xmm8,XMMWORD[((-32))+rdi],0x32
vpmuludq xmm6,xmm7,xmm2
vpaddq xmm13,xmm13,xmm6
vpshufd xmm9,XMMWORD[((-16))+rdi],0x32
vpmuludq xmm5,xmm7,xmm1
vpaddq xmm12,xmm12,xmm5
vpmuludq xmm7,xmm7,xmm0
vpaddq xmm11,xmm11,xmm7
vpmuludq xmm8,xmm8,xmm4
vpaddq xmm10,xmm10,xmm8
vpshufd xmm7,XMMWORD[rdi],0x32
vpmuludq xmm6,xmm9,xmm2
vpaddq xmm14,xmm14,xmm6
vpmuludq xmm5,xmm9,xmm1
vpaddq xmm13,xmm13,xmm5
vpshufd xmm8,XMMWORD[16+rdi],0x32
vpmuludq xmm9,xmm9,xmm0
vpaddq xmm12,xmm12,xmm9
vpmuludq xmm6,xmm7,xmm4
vpaddq xmm11,xmm11,xmm6
vpshufd xmm9,XMMWORD[32+rdi],0x32
vpmuludq xmm7,xmm7,xmm3
vpaddq xmm10,xmm10,xmm7
vpmuludq xmm5,xmm8,xmm1
vpaddq xmm14,xmm14,xmm5
vpmuludq xmm8,xmm8,xmm0
vpaddq xmm13,xmm13,xmm8
vpshufd xmm7,XMMWORD[48+rdi],0x32
vpmuludq xmm6,xmm9,xmm4
vpaddq xmm12,xmm12,xmm6
vpshufd xmm8,XMMWORD[64+rdi],0x32
vpmuludq xmm5,xmm9,xmm3
vpaddq xmm11,xmm11,xmm5
vpmuludq xmm9,xmm9,xmm2
vpaddq xmm10,xmm10,xmm9
vpmuludq xmm7,xmm7,xmm0
vpaddq xmm14,xmm14,xmm7
vpmuludq xmm6,xmm8,xmm4
vpaddq xmm13,xmm13,xmm6
vpmuludq xmm5,xmm8,xmm3
vpaddq xmm12,xmm12,xmm5
vpmuludq xmm6,xmm8,xmm2
vpaddq xmm11,xmm11,xmm6
vpmuludq xmm8,xmm8,xmm1
vpaddq xmm10,xmm10,xmm8
$L$short_tail_avx:
vpsrldq xmm9,xmm14,8
vpsrldq xmm8,xmm13,8
vpsrldq xmm6,xmm11,8
vpsrldq xmm5,xmm10,8
vpsrldq xmm7,xmm12,8
vpaddq xmm13,xmm13,xmm8
vpaddq xmm14,xmm14,xmm9
vpaddq xmm10,xmm10,xmm5
vpaddq xmm11,xmm11,xmm6
vpaddq xmm12,xmm12,xmm7
vpsrlq xmm3,xmm13,26
vpand xmm13,xmm13,xmm15
vpaddq xmm14,xmm14,xmm3
vpsrlq xmm0,xmm10,26
vpand xmm10,xmm10,xmm15
vpaddq xmm11,xmm11,xmm0
vpsrlq xmm4,xmm14,26
vpand xmm14,xmm14,xmm15
vpsrlq xmm1,xmm11,26
vpand xmm11,xmm11,xmm15
vpaddq xmm12,xmm12,xmm1
vpaddq xmm10,xmm10,xmm4
vpsllq xmm4,xmm4,2
vpaddq xmm10,xmm10,xmm4
vpsrlq xmm2,xmm12,26
vpand xmm12,xmm12,xmm15
vpaddq xmm13,xmm13,xmm2
vpsrlq xmm0,xmm10,26
vpand xmm10,xmm10,xmm15
vpaddq xmm11,xmm11,xmm0
vpsrlq xmm3,xmm13,26
vpand xmm13,xmm13,xmm15
vpaddq xmm14,xmm14,xmm3
vmovd DWORD[(-112)+rdi],xmm10
vmovd DWORD[(-108)+rdi],xmm11
vmovd DWORD[(-104)+rdi],xmm12
vmovd DWORD[(-100)+rdi],xmm13
vmovd DWORD[(-96)+rdi],xmm14
vmovdqa xmm6,XMMWORD[80+r11]
vmovdqa xmm7,XMMWORD[96+r11]
vmovdqa xmm8,XMMWORD[112+r11]
vmovdqa xmm9,XMMWORD[128+r11]
vmovdqa xmm10,XMMWORD[144+r11]
vmovdqa xmm11,XMMWORD[160+r11]
vmovdqa xmm12,XMMWORD[176+r11]
vmovdqa xmm13,XMMWORD[192+r11]
vmovdqa xmm14,XMMWORD[208+r11]
vmovdqa xmm15,XMMWORD[224+r11]
lea rsp,[248+r11]
$L$do_avx_epilogue:
vzeroupper
mov rdi,QWORD[8+rsp] ;WIN64 epilogue
mov rsi,QWORD[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_poly1305_blocks_avx:
ALIGN 32
poly1305_emit_avx:
mov QWORD[8+rsp],rdi ;WIN64 prologue
mov QWORD[16+rsp],rsi
mov rax,rsp
$L$SEH_begin_poly1305_emit_avx:
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
cmp DWORD[20+rdi],0
je NEAR $L$emit
mov eax,DWORD[rdi]
mov ecx,DWORD[4+rdi]
mov r8d,DWORD[8+rdi]
mov r11d,DWORD[12+rdi]
mov r10d,DWORD[16+rdi]
shl rcx,26
mov r9,r8
shl r8,52
add rax,rcx
shr r9,12
add r8,rax
adc r9,0
shl r11,14
mov rax,r10
shr r10,24
add r9,r11
shl rax,40
add r9,rax
adc r10,0
mov rax,r10
mov rcx,r10
and r10,3
shr rax,2
and rcx,-4
add rax,rcx
add r8,rax
adc r9,0
mov rax,r8
add r8,5
mov rcx,r9
adc r9,0
adc r10,0
shr r10,2
cmovnz rax,r8
cmovnz rcx,r9
add rax,QWORD[rdx]
adc rcx,QWORD[8+rdx]
mov QWORD[rsi],rax
mov QWORD[8+rsi],rcx
mov rdi,QWORD[8+rsp] ;WIN64 epilogue
mov rsi,QWORD[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_poly1305_emit_avx:
ALIGN 32
poly1305_blocks_avx2:
mov QWORD[8+rsp],rdi ;WIN64 prologue
mov QWORD[16+rsp],rsi
mov rax,rsp
$L$SEH_begin_poly1305_blocks_avx2:
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
mov rcx,r9
mov r8d,DWORD[20+rdi]
cmp rdx,128
jae NEAR $L$blocks_avx2
test r8d,r8d
jz NEAR $L$blocks
$L$blocks_avx2:
and rdx,-16
jz NEAR $L$no_data_avx2
vzeroupper
test r8d,r8d
jz NEAR $L$base2_64_avx2
test rdx,63
jz NEAR $L$even_avx2
push rbx
push rbp
push r12
push r13
push r14
push r15
$L$blocks_avx2_body:
mov r15,rdx
mov r8,QWORD[rdi]
mov r9,QWORD[8+rdi]
mov ebp,DWORD[16+rdi]
mov r11,QWORD[24+rdi]
mov r13,QWORD[32+rdi]
mov r14d,r8d
and r8,-1<<31
mov r12,r9
mov ebx,r9d
and r9,-1<<31
shr r8,6
shl r12,52
add r14,r8
shr rbx,12
shr r9,18
add r14,r12
adc rbx,r9
mov r8,rbp
shl r8,40
shr rbp,24
add rbx,r8
adc rbp,0
mov r9,-4
mov r8,rbp
and r9,rbp
shr r8,2
and rbp,3
add r8,r9
add r14,r8
adc rbx,0
mov r12,r13
mov rax,r13
shr r13,2
add r13,r12
$L$base2_26_pre_avx2:
add r14,QWORD[rsi]
adc rbx,QWORD[8+rsi]
lea rsi,[16+rsi]
adc rbp,rcx
sub r15,16
call __poly1305_block
mov rax,r12
test r15,63
jnz NEAR $L$base2_26_pre_avx2
test rcx,rcx
jz NEAR $L$store_base2_64_avx2
mov rax,r14
mov rdx,r14
shr r14,52
mov r11,rbx
mov r12,rbx
shr rdx,26
and rax,0x3ffffff
shl r11,12
and rdx,0x3ffffff
shr rbx,14
or r14,r11
shl rbp,24
and r14,0x3ffffff
shr r12,40
and rbx,0x3ffffff
or rbp,r12
test r15,r15
jz NEAR $L$store_base2_26_avx2
vmovd xmm0,eax
vmovd xmm1,edx
vmovd xmm2,r14d
vmovd xmm3,ebx
vmovd xmm4,ebp
jmp NEAR $L$proceed_avx2
ALIGN 32
$L$store_base2_64_avx2:
mov QWORD[rdi],r14
mov QWORD[8+rdi],rbx
mov QWORD[16+rdi],rbp
jmp NEAR $L$done_avx2
ALIGN 16
$L$store_base2_26_avx2:
mov DWORD[rdi],eax
mov DWORD[4+rdi],edx
mov DWORD[8+rdi],r14d
mov DWORD[12+rdi],ebx
mov DWORD[16+rdi],ebp
ALIGN 16
$L$done_avx2:
mov r15,QWORD[rsp]
mov r14,QWORD[8+rsp]
mov r13,QWORD[16+rsp]
mov r12,QWORD[24+rsp]
mov rbp,QWORD[32+rsp]
mov rbx,QWORD[40+rsp]
lea rsp,[48+rsp]
$L$no_data_avx2:
$L$blocks_avx2_epilogue:
mov rdi,QWORD[8+rsp] ;WIN64 epilogue
mov rsi,QWORD[16+rsp]
DB 0F3h,0C3h ;repret
ALIGN 32
$L$base2_64_avx2:
push rbx
push rbp
push r12
push r13
push r14
push r15
$L$base2_64_avx2_body:
mov r15,rdx
mov r11,QWORD[24+rdi]
mov r13,QWORD[32+rdi]
mov r14,QWORD[rdi]
mov rbx,QWORD[8+rdi]
mov ebp,DWORD[16+rdi]
mov r12,r13
mov rax,r13
shr r13,2
add r13,r12
test rdx,63
jz NEAR $L$init_avx2
$L$base2_64_pre_avx2:
add r14,QWORD[rsi]
adc rbx,QWORD[8+rsi]
lea rsi,[16+rsi]
adc rbp,rcx
sub r15,16
call __poly1305_block
mov rax,r12
test r15,63
jnz NEAR $L$base2_64_pre_avx2
$L$init_avx2:
mov rax,r14
mov rdx,r14
shr r14,52
mov r8,rbx
mov r9,rbx
shr rdx,26
and rax,0x3ffffff
shl r8,12
and rdx,0x3ffffff
shr rbx,14
or r14,r8
shl rbp,24
and r14,0x3ffffff
shr r9,40
and rbx,0x3ffffff
or rbp,r9
vmovd xmm0,eax
vmovd xmm1,edx
vmovd xmm2,r14d
vmovd xmm3,ebx
vmovd xmm4,ebp
mov DWORD[20+rdi],1
call __poly1305_init_avx
$L$proceed_avx2:
mov rdx,r15
mov r15,QWORD[rsp]
mov r14,QWORD[8+rsp]
mov r13,QWORD[16+rsp]
mov r12,QWORD[24+rsp]
mov rbp,QWORD[32+rsp]
mov rbx,QWORD[40+rsp]
lea rax,[48+rsp]
lea rsp,[48+rsp]
$L$base2_64_avx2_epilogue:
jmp NEAR $L$do_avx2
ALIGN 32
$L$even_avx2:
vmovd xmm0,DWORD[rdi]
vmovd xmm1,DWORD[4+rdi]
vmovd xmm2,DWORD[8+rdi]
vmovd xmm3,DWORD[12+rdi]
vmovd xmm4,DWORD[16+rdi]
$L$do_avx2:
lea r11,[((-248))+rsp]
sub rsp,0x1c8
vmovdqa XMMWORD[80+r11],xmm6
vmovdqa XMMWORD[96+r11],xmm7
vmovdqa XMMWORD[112+r11],xmm8
vmovdqa XMMWORD[128+r11],xmm9
vmovdqa XMMWORD[144+r11],xmm10
vmovdqa XMMWORD[160+r11],xmm11
vmovdqa XMMWORD[176+r11],xmm12
vmovdqa XMMWORD[192+r11],xmm13
vmovdqa XMMWORD[208+r11],xmm14
vmovdqa XMMWORD[224+r11],xmm15
$L$do_avx2_body:
lea rdi,[((48+64))+rdi]
lea rcx,[$L$const]
vmovdqu xmm9,XMMWORD[((-64))+rdi]
and rsp,-512
vmovdqu xmm10,XMMWORD[((-48))+rdi]
vmovdqu xmm6,XMMWORD[((-32))+rdi]
vmovdqu xmm11,XMMWORD[((-16))+rdi]
vmovdqu xmm12,XMMWORD[rdi]
vmovdqu xmm13,XMMWORD[16+rdi]
vmovdqu xmm14,XMMWORD[32+rdi]
vpermq ymm9,ymm9,0x15
vmovdqu xmm15,XMMWORD[48+rdi]
vpermq ymm10,ymm10,0x15
vpshufd ymm9,ymm9,0xc8
vmovdqu xmm5,XMMWORD[64+rdi]
vpermq ymm6,ymm6,0x15
vpshufd ymm10,ymm10,0xc8
vmovdqa YMMWORD[rsp],ymm9
vpermq ymm11,ymm11,0x15
vpshufd ymm6,ymm6,0xc8
vmovdqa YMMWORD[32+rsp],ymm10
vpermq ymm12,ymm12,0x15
vpshufd ymm11,ymm11,0xc8
vmovdqa YMMWORD[64+rsp],ymm6
vpermq ymm13,ymm13,0x15
vpshufd ymm12,ymm12,0xc8
vmovdqa YMMWORD[96+rsp],ymm11
vpermq ymm14,ymm14,0x15
vpshufd ymm13,ymm13,0xc8
vmovdqa YMMWORD[128+rsp],ymm12
vpermq ymm15,ymm15,0x15
vpshufd ymm14,ymm14,0xc8
vmovdqa YMMWORD[160+rsp],ymm13
vpermq ymm5,ymm5,0x15
vpshufd ymm15,ymm15,0xc8
vmovdqa YMMWORD[192+rsp],ymm14
vpshufd ymm5,ymm5,0xc8
vmovdqa YMMWORD[224+rsp],ymm15
vmovdqa YMMWORD[256+rsp],ymm5
vmovdqa ymm5,YMMWORD[64+rcx]
vmovdqu xmm7,XMMWORD[rsi]
vmovdqu xmm8,XMMWORD[16+rsi]
vinserti128 ymm7,ymm7,XMMWORD[32+rsi],1
vinserti128 ymm8,ymm8,XMMWORD[48+rsi],1
lea rsi,[64+rsi]
vpsrldq ymm9,ymm7,6
vpsrldq ymm10,ymm8,6
vpunpckhqdq ymm6,ymm7,ymm8
vpunpcklqdq ymm9,ymm9,ymm10
vpunpcklqdq ymm7,ymm7,ymm8
vpsrlq ymm10,ymm9,30
vpsrlq ymm9,ymm9,4
vpsrlq ymm8,ymm7,26
vpsrlq ymm6,ymm6,40
vpand ymm9,ymm9,ymm5
vpand ymm7,ymm7,ymm5
vpand ymm8,ymm8,ymm5
vpand ymm10,ymm10,ymm5
vpor ymm6,ymm6,YMMWORD[32+rcx]
lea rax,[144+rsp]
vpaddq ymm2,ymm9,ymm2
sub rdx,64
jz NEAR $L$tail_avx2
jmp NEAR $L$oop_avx2
ALIGN 32
$L$oop_avx2:
vpaddq ymm0,ymm7,ymm0
vmovdqa ymm7,YMMWORD[rsp]
vpaddq ymm1,ymm8,ymm1
vmovdqa ymm8,YMMWORD[32+rsp]
vpaddq ymm3,ymm10,ymm3
vmovdqa ymm9,YMMWORD[96+rsp]
vpaddq ymm4,ymm6,ymm4
vmovdqa ymm10,YMMWORD[48+rax]
vmovdqa ymm5,YMMWORD[112+rax]
vpmuludq ymm13,ymm7,ymm2
vpmuludq ymm14,ymm8,ymm2
vpmuludq ymm15,ymm9,ymm2
vpmuludq ymm11,ymm10,ymm2
vpmuludq ymm12,ymm5,ymm2
vpmuludq ymm6,ymm8,ymm0
vpmuludq ymm2,ymm8,ymm1
vpaddq ymm12,ymm12,ymm6
vpaddq ymm13,ymm13,ymm2
vpmuludq ymm6,ymm8,ymm3
vpmuludq ymm2,ymm4,YMMWORD[64+rsp]
vpaddq ymm15,ymm15,ymm6
vpaddq ymm11,ymm11,ymm2
vmovdqa ymm8,YMMWORD[((-16))+rax]
vpmuludq ymm6,ymm7,ymm0
vpmuludq ymm2,ymm7,ymm1
vpaddq ymm11,ymm11,ymm6
vpaddq ymm12,ymm12,ymm2
vpmuludq ymm6,ymm7,ymm3
vpmuludq ymm2,ymm7,ymm4
vmovdqu xmm7,XMMWORD[rsi]
vpaddq ymm14,ymm14,ymm6
vpaddq ymm15,ymm15,ymm2
vinserti128 ymm7,ymm7,XMMWORD[32+rsi],1
vpmuludq ymm6,ymm8,ymm3
vpmuludq ymm2,ymm8,ymm4
vmovdqu xmm8,XMMWORD[16+rsi]
vpaddq ymm11,ymm11,ymm6
vpaddq ymm12,ymm12,ymm2
vmovdqa ymm2,YMMWORD[16+rax]
vpmuludq ymm6,ymm9,ymm1
vpmuludq ymm9,ymm9,ymm0
vpaddq ymm14,ymm14,ymm6
vpaddq ymm13,ymm13,ymm9
vinserti128 ymm8,ymm8,XMMWORD[48+rsi],1
lea rsi,[64+rsi]
vpmuludq ymm6,ymm2,ymm1
vpmuludq ymm2,ymm2,ymm0
vpsrldq ymm9,ymm7,6
vpaddq ymm15,ymm15,ymm6
vpaddq ymm14,ymm14,ymm2
vpmuludq ymm6,ymm10,ymm3
vpmuludq ymm2,ymm10,ymm4
vpsrldq ymm10,ymm8,6
vpaddq ymm12,ymm12,ymm6
vpaddq ymm13,ymm13,ymm2
vpunpckhqdq ymm6,ymm7,ymm8
vpmuludq ymm3,ymm5,ymm3
vpmuludq ymm4,ymm5,ymm4
vpunpcklqdq ymm7,ymm7,ymm8
vpaddq ymm2,ymm13,ymm3
vpaddq ymm3,ymm14,ymm4
vpunpcklqdq ymm10,ymm9,ymm10
vpmuludq ymm4,ymm0,YMMWORD[80+rax]
vpmuludq ymm0,ymm5,ymm1
vmovdqa ymm5,YMMWORD[64+rcx]
vpaddq ymm4,ymm15,ymm4
vpaddq ymm0,ymm11,ymm0
vpsrlq ymm14,ymm3,26
vpand ymm3,ymm3,ymm5
vpaddq ymm4,ymm4,ymm14
vpsrlq ymm11,ymm0,26
vpand ymm0,ymm0,ymm5
vpaddq ymm1,ymm12,ymm11
vpsrlq ymm15,ymm4,26
vpand ymm4,ymm4,ymm5
vpsrlq ymm9,ymm10,4
vpsrlq ymm12,ymm1,26
vpand ymm1,ymm1,ymm5
vpaddq ymm2,ymm2,ymm12
vpaddq ymm0,ymm0,ymm15
vpsllq ymm15,ymm15,2
vpaddq ymm0,ymm0,ymm15
vpand ymm9,ymm9,ymm5
vpsrlq ymm8,ymm7,26
vpsrlq ymm13,ymm2,26
vpand ymm2,ymm2,ymm5
vpaddq ymm3,ymm3,ymm13
vpaddq ymm2,ymm2,ymm9
vpsrlq ymm10,ymm10,30
vpsrlq ymm11,ymm0,26
vpand ymm0,ymm0,ymm5
vpaddq ymm1,ymm1,ymm11
vpsrlq ymm6,ymm6,40
vpsrlq ymm14,ymm3,26
vpand ymm3,ymm3,ymm5
vpaddq ymm4,ymm4,ymm14
vpand ymm7,ymm7,ymm5
vpand ymm8,ymm8,ymm5
vpand ymm10,ymm10,ymm5
vpor ymm6,ymm6,YMMWORD[32+rcx]
sub rdx,64
jnz NEAR $L$oop_avx2
DB 0x66,0x90
$L$tail_avx2:
vpaddq ymm0,ymm7,ymm0
vmovdqu ymm7,YMMWORD[4+rsp]
vpaddq ymm1,ymm8,ymm1
vmovdqu ymm8,YMMWORD[36+rsp]
vpaddq ymm3,ymm10,ymm3
vmovdqu ymm9,YMMWORD[100+rsp]
vpaddq ymm4,ymm6,ymm4
vmovdqu ymm10,YMMWORD[52+rax]
vmovdqu ymm5,YMMWORD[116+rax]
vpmuludq ymm13,ymm7,ymm2
vpmuludq ymm14,ymm8,ymm2
vpmuludq ymm15,ymm9,ymm2
vpmuludq ymm11,ymm10,ymm2
vpmuludq ymm12,ymm5,ymm2
vpmuludq ymm6,ymm8,ymm0
vpmuludq ymm2,ymm8,ymm1
vpaddq ymm12,ymm12,ymm6
vpaddq ymm13,ymm13,ymm2
vpmuludq ymm6,ymm8,ymm3
vpmuludq ymm2,ymm4,YMMWORD[68+rsp]
vpaddq ymm15,ymm15,ymm6
vpaddq ymm11,ymm11,ymm2
vpmuludq ymm6,ymm7,ymm0
vpmuludq ymm2,ymm7,ymm1
vpaddq ymm11,ymm11,ymm6
vmovdqu ymm8,YMMWORD[((-12))+rax]
vpaddq ymm12,ymm12,ymm2
vpmuludq ymm6,ymm7,ymm3
vpmuludq ymm2,ymm7,ymm4
vpaddq ymm14,ymm14,ymm6
vpaddq ymm15,ymm15,ymm2
vpmuludq ymm6,ymm8,ymm3
vpmuludq ymm2,ymm8,ymm4
vpaddq ymm11,ymm11,ymm6
vpaddq ymm12,ymm12,ymm2
vmovdqu ymm2,YMMWORD[20+rax]
vpmuludq ymm6,ymm9,ymm1
vpmuludq ymm9,ymm9,ymm0
vpaddq ymm14,ymm14,ymm6
vpaddq ymm13,ymm13,ymm9
vpmuludq ymm6,ymm2,ymm1
vpmuludq ymm2,ymm2,ymm0
vpaddq ymm15,ymm15,ymm6
vpaddq ymm14,ymm14,ymm2
vpmuludq ymm6,ymm10,ymm3
vpmuludq ymm2,ymm10,ymm4
vpaddq ymm12,ymm12,ymm6
vpaddq ymm13,ymm13,ymm2
vpmuludq ymm3,ymm5,ymm3
vpmuludq ymm4,ymm5,ymm4
vpaddq ymm2,ymm13,ymm3
vpaddq ymm3,ymm14,ymm4
vpmuludq ymm4,ymm0,YMMWORD[84+rax]
vpmuludq ymm0,ymm5,ymm1
vmovdqa ymm5,YMMWORD[64+rcx]
vpaddq ymm4,ymm15,ymm4
vpaddq ymm0,ymm11,ymm0
vpsrldq ymm8,ymm12,8
vpsrldq ymm9,ymm2,8
vpsrldq ymm10,ymm3,8
vpsrldq ymm6,ymm4,8
vpsrldq ymm7,ymm0,8
vpaddq ymm12,ymm12,ymm8
vpaddq ymm2,ymm2,ymm9
vpaddq ymm3,ymm3,ymm10
vpaddq ymm4,ymm4,ymm6
vpaddq ymm0,ymm0,ymm7
vpermq ymm10,ymm3,0x2
vpermq ymm6,ymm4,0x2
vpermq ymm7,ymm0,0x2
vpermq ymm8,ymm12,0x2
vpermq ymm9,ymm2,0x2
vpaddq ymm3,ymm3,ymm10
vpaddq ymm4,ymm4,ymm6
vpaddq ymm0,ymm0,ymm7
vpaddq ymm12,ymm12,ymm8
vpaddq ymm2,ymm2,ymm9
vpsrlq ymm14,ymm3,26
vpand ymm3,ymm3,ymm5
vpaddq ymm4,ymm4,ymm14
vpsrlq ymm11,ymm0,26
vpand ymm0,ymm0,ymm5
vpaddq ymm1,ymm12,ymm11
vpsrlq ymm15,ymm4,26
vpand ymm4,ymm4,ymm5
vpsrlq ymm12,ymm1,26
vpand ymm1,ymm1,ymm5
vpaddq ymm2,ymm2,ymm12
vpaddq ymm0,ymm0,ymm15
vpsllq ymm15,ymm15,2
vpaddq ymm0,ymm0,ymm15
vpsrlq ymm13,ymm2,26
vpand ymm2,ymm2,ymm5
vpaddq ymm3,ymm3,ymm13
vpsrlq ymm11,ymm0,26
vpand ymm0,ymm0,ymm5
vpaddq ymm1,ymm1,ymm11
vpsrlq ymm14,ymm3,26
vpand ymm3,ymm3,ymm5
vpaddq ymm4,ymm4,ymm14
vmovd DWORD[(-112)+rdi],xmm0
vmovd DWORD[(-108)+rdi],xmm1
vmovd DWORD[(-104)+rdi],xmm2
vmovd DWORD[(-100)+rdi],xmm3
vmovd DWORD[(-96)+rdi],xmm4
vmovdqa xmm6,XMMWORD[80+r11]
vmovdqa xmm7,XMMWORD[96+r11]
vmovdqa xmm8,XMMWORD[112+r11]
vmovdqa xmm9,XMMWORD[128+r11]
vmovdqa xmm10,XMMWORD[144+r11]
vmovdqa xmm11,XMMWORD[160+r11]
vmovdqa xmm12,XMMWORD[176+r11]
vmovdqa xmm13,XMMWORD[192+r11]
vmovdqa xmm14,XMMWORD[208+r11]
vmovdqa xmm15,XMMWORD[224+r11]
lea rsp,[248+r11]
$L$do_avx2_epilogue:
vzeroupper
mov rdi,QWORD[8+rsp] ;WIN64 epilogue
mov rsi,QWORD[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_poly1305_blocks_avx2:
ALIGN 64
$L$const:
$L$mask24:
DD 0x0ffffff,0,0x0ffffff,0,0x0ffffff,0,0x0ffffff,0
$L$129:
DD 1<<24,0,1<<24,0,1<<24,0,1<<24,0
$L$mask26:
DD 0x3ffffff,0,0x3ffffff,0,0x3ffffff,0,0x3ffffff,0
$L$five:
DD 5,0,5,0,5,0,5,0
DB 80,111,108,121,49,51,48,53,32,102,111,114,32,120,56,54
DB 95,54,52,44,32,67,82,89,80,84,79,71,65,77,83,32
DB 98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115
DB 108,46,111,114,103,62,0
ALIGN 16
EXTERN __imp_RtlVirtualUnwind
ALIGN 16
se_handler:
push rsi
push rdi
push rbx
push rbp
push r12
push r13
push r14
push r15
pushfq
sub rsp,64
mov rax,QWORD[120+r8]
mov rbx,QWORD[248+r8]
mov rsi,QWORD[8+r9]
mov r11,QWORD[56+r9]
mov r10d,DWORD[r11]
lea r10,[r10*1+rsi]
cmp rbx,r10
jb NEAR $L$common_seh_tail
mov rax,QWORD[152+r8]
mov r10d,DWORD[4+r11]
lea r10,[r10*1+rsi]
cmp rbx,r10
jae NEAR $L$common_seh_tail
lea rax,[48+rax]
mov rbx,QWORD[((-8))+rax]
mov rbp,QWORD[((-16))+rax]
mov r12,QWORD[((-24))+rax]
mov r13,QWORD[((-32))+rax]
mov r14,QWORD[((-40))+rax]
mov r15,QWORD[((-48))+rax]
mov QWORD[144+r8],rbx
mov QWORD[160+r8],rbp
mov QWORD[216+r8],r12
mov QWORD[224+r8],r13
mov QWORD[232+r8],r14
mov QWORD[240+r8],r15
jmp NEAR $L$common_seh_tail
ALIGN 16
avx_handler:
push rsi
push rdi
push rbx
push rbp
push r12
push r13
push r14
push r15
pushfq
sub rsp,64
mov rax,QWORD[120+r8]
mov rbx,QWORD[248+r8]
mov rsi,QWORD[8+r9]
mov r11,QWORD[56+r9]
mov r10d,DWORD[r11]
lea r10,[r10*1+rsi]
cmp rbx,r10
jb NEAR $L$common_seh_tail
mov rax,QWORD[152+r8]
mov r10d,DWORD[4+r11]
lea r10,[r10*1+rsi]
cmp rbx,r10
jae NEAR $L$common_seh_tail
mov rax,QWORD[208+r8]
lea rsi,[80+rax]
lea rax,[248+rax]
lea rdi,[512+r8]
mov ecx,20
DD 0xa548f3fc
$L$common_seh_tail:
mov rdi,QWORD[8+rax]
mov rsi,QWORD[16+rax]
mov QWORD[152+r8],rax
mov QWORD[168+r8],rsi
mov QWORD[176+r8],rdi
mov rdi,QWORD[40+r9]
mov rsi,r8
mov ecx,154
DD 0xa548f3fc
mov rsi,r9
xor rcx,rcx
mov rdx,QWORD[8+rsi]
mov r8,QWORD[rsi]
mov r9,QWORD[16+rsi]
mov r10,QWORD[40+rsi]
lea r11,[56+rsi]
lea r12,[24+rsi]
mov QWORD[32+rsp],r10
mov QWORD[40+rsp],r11
mov QWORD[48+rsp],r12
mov QWORD[56+rsp],rcx
call QWORD[__imp_RtlVirtualUnwind]
mov eax,1
add rsp,64
popfq
pop r15
pop r14
pop r13
pop r12
pop rbp
pop rbx
pop rdi
pop rsi
DB 0F3h,0C3h ;repret
section .pdata rdata align=4
ALIGN 4
DD $L$SEH_begin_poly1305_init wrt ..imagebase
DD $L$SEH_end_poly1305_init wrt ..imagebase
DD $L$SEH_info_poly1305_init wrt ..imagebase
DD $L$SEH_begin_poly1305_blocks wrt ..imagebase
DD $L$SEH_end_poly1305_blocks wrt ..imagebase
DD $L$SEH_info_poly1305_blocks wrt ..imagebase
DD $L$SEH_begin_poly1305_emit wrt ..imagebase
DD $L$SEH_end_poly1305_emit wrt ..imagebase
DD $L$SEH_info_poly1305_emit wrt ..imagebase
DD $L$SEH_begin_poly1305_blocks_avx wrt ..imagebase
DD $L$base2_64_avx wrt ..imagebase
DD $L$SEH_info_poly1305_blocks_avx_1 wrt ..imagebase
DD $L$base2_64_avx wrt ..imagebase
DD $L$even_avx wrt ..imagebase
DD $L$SEH_info_poly1305_blocks_avx_2 wrt ..imagebase
DD $L$even_avx wrt ..imagebase
DD $L$SEH_end_poly1305_blocks_avx wrt ..imagebase
DD $L$SEH_info_poly1305_blocks_avx_3 wrt ..imagebase
DD $L$SEH_begin_poly1305_emit_avx wrt ..imagebase
DD $L$SEH_end_poly1305_emit_avx wrt ..imagebase
DD $L$SEH_info_poly1305_emit_avx wrt ..imagebase
DD $L$SEH_begin_poly1305_blocks_avx2 wrt ..imagebase
DD $L$base2_64_avx2 wrt ..imagebase
DD $L$SEH_info_poly1305_blocks_avx2_1 wrt ..imagebase
DD $L$base2_64_avx2 wrt ..imagebase
DD $L$even_avx2 wrt ..imagebase
DD $L$SEH_info_poly1305_blocks_avx2_2 wrt ..imagebase
DD $L$even_avx2 wrt ..imagebase
DD $L$SEH_end_poly1305_blocks_avx2 wrt ..imagebase
DD $L$SEH_info_poly1305_blocks_avx2_3 wrt ..imagebase
section .xdata rdata align=8
ALIGN 8
$L$SEH_info_poly1305_init:
DB 9,0,0,0
DD se_handler wrt ..imagebase
DD $L$SEH_begin_poly1305_init wrt ..imagebase,$L$SEH_begin_poly1305_init wrt ..imagebase
$L$SEH_info_poly1305_blocks:
DB 9,0,0,0
DD se_handler wrt ..imagebase
DD $L$blocks_body wrt ..imagebase,$L$blocks_epilogue wrt ..imagebase
$L$SEH_info_poly1305_emit:
DB 9,0,0,0
DD se_handler wrt ..imagebase
DD $L$SEH_begin_poly1305_emit wrt ..imagebase,$L$SEH_begin_poly1305_emit wrt ..imagebase
$L$SEH_info_poly1305_blocks_avx_1:
DB 9,0,0,0
DD se_handler wrt ..imagebase
DD $L$blocks_avx_body wrt ..imagebase,$L$blocks_avx_epilogue wrt ..imagebase
$L$SEH_info_poly1305_blocks_avx_2:
DB 9,0,0,0
DD se_handler wrt ..imagebase
DD $L$base2_64_avx_body wrt ..imagebase,$L$base2_64_avx_epilogue wrt ..imagebase
$L$SEH_info_poly1305_blocks_avx_3:
DB 9,0,0,0
DD avx_handler wrt ..imagebase
DD $L$do_avx_body wrt ..imagebase,$L$do_avx_epilogue wrt ..imagebase
$L$SEH_info_poly1305_emit_avx:
DB 9,0,0,0
DD se_handler wrt ..imagebase
DD $L$SEH_begin_poly1305_emit_avx wrt ..imagebase,$L$SEH_begin_poly1305_emit_avx wrt ..imagebase
$L$SEH_info_poly1305_blocks_avx2_1:
DB 9,0,0,0
DD se_handler wrt ..imagebase
DD $L$blocks_avx2_body wrt ..imagebase,$L$blocks_avx2_epilogue wrt ..imagebase
$L$SEH_info_poly1305_blocks_avx2_2:
DB 9,0,0,0
DD se_handler wrt ..imagebase
DD $L$base2_64_avx2_body wrt ..imagebase,$L$base2_64_avx2_epilogue wrt ..imagebase
$L$SEH_info_poly1305_blocks_avx2_3:
DB 9,0,0,0
DD avx_handler wrt ..imagebase
DD $L$do_avx2_body wrt ..imagebase,$L$do_avx2_epilogue wrt ..imagebase
|
; Options:
; startup=1 --> RAM mode
; startup=2 --> ROM mode (position code at location 0 and provide minimal interrupt services)
;
; CRT_ORG_CODE = start address
; CRT_ORG_BSS = address for bss variables
; CRT_MODEL = 0 (RAM), 1 = (ROM, code copied), 2 = (ROM, code compressed)
;
; djm 18/5/99
;
; $Id: spec_crt0.asm,v 1.53 2016-07-16 07:06:27 dom Exp $
;
MODULE zx82_crt0
defc crt0 = 1
INCLUDE "zcc_opt.def"
EXTERN _main ; main() is always external to crt0 code
PUBLIC cleanup ; jp'd to by exit()
PUBLIC l_dcal ; jp(hl)
PUBLIC call_rom3 ; Interposer
PUBLIC __SYSVAR_BORDCR
defc __SYSVAR_BORDCR = 23624
IF DEFINED_ZXVGS
IF !DEFINED_CRT_ORG_CODE
defc CRT_ORG_CODE = $5CCB ; repleaces BASIC program
defc DEFINED_CRT_ORG_CODE = 1
ENDIF
defc TAR__register_sp = 0xff57 ; below UDG, keep eye when using banks
ENDIF
PUBLIC _FRAMES
IF startup != 2
defc _FRAMES = 23672 ; Timer
ENDIF
IF !DEFINED_CRT_ORG_CODE
IF (startup=2) ; ROM ?
defc CRT_ORG_CODE = 0
defc TAR__register_sp = 32767
ELSE
IF DEFINED_CRT_TS2068_HRG
defc CRT_ORG_CODE = 40000
ELSE
defc CRT_ORG_CODE = 32768
ENDIF
ENDIF
ENDIF
; We default to the 64 column terminal driver
; Check whether to default to 32 column display
defc CONSOLE_ROWS = 24
IF DEFINED_CLIB_DEFAULT_SCREEN_MODE && __TS2068__
IF DEFINED_CLIB_ZX_CONIO32
defc BASE_COLS = 32
ELSE
defc CLIB_ZX_CONIO32 = 0
defc BASE_COLS = 64
ENDIF
IF CLIB_DEFAULT_SCREEN_MODE < 6
defc CONSOLE_COLUMNS = BASE_COLS
ELSE
; Hires mode
defc CONSOLE_COLUMNS = BASE_COLS * 2
ENDIF
ELIF !DEFINED_CLIB_ZX_CONIO32
defc CLIB_ZX_CONIO32 = 0
defc CONSOLE_COLUMNS = 64
ELSE
defc CONSOLE_COLUMNS = 32
ENDIF
PUBLIC __CLIB_ZX_CONIO32
defc __CLIB_ZX_CONIO32 = CLIB_ZX_CONIO32
IFNDEF CLIB_FGETC_CONS_DELAY
defc CLIB_FGETC_CONS_DELAY = 100
ENDIF
; We use the generic driver by default
defc TAR__fputc_cons_generic = 1
defc DEF__register_sp = -1
defc TAR__clib_exit_stack_size = 32
defc CRT_KEY_DEL = 12
defc __CPU_CLOCK = 3500000
INCLUDE "crt/classic/crt_rules.inc"
org CRT_ORG_CODE
start:
; --- startup=2 ---> build a ROM
IF (startup=2)
IFNDEF CLIB_FGETC_CONS_DELAY
defc CLIB_FGETC_CONS_DELAY = 100
ENDIF
di ; put hardware in a stable state
ld a,$3F
ld i,a
jr init ; go over rst 8, bypass shadow ROM
defs $0008-ASMPC
if (ASMPC<>$0008)
defs CODE_ALIGNMENT_ERROR
endif
; --- rst 8 ---
ld hl,($5c5d) ; It was the address reached by CH-ADD.
nop ; one byte still, to jump over the
; Opus Discovery and similar shadowing traps
; --- nothing more ?
init:
INCLUDE "crt/classic/crt_init_sp.asm"
ld a,@111000 ; White PAPER, black INK
call zx_internal_cls
ld (hl),0
ld bc,42239
ldir
INCLUDE "crt/classic/crt_init_atexit.asm"
call crt0_init_bss
im 1
ei
ELSE
; --- startup=[default] ---
IF DEFINED_CLIB_DEFAULT_SCREEN_MODE && __TS2068__
EXTERN ts_vmod
ld l,CLIB_DEFAULT_SCREEN_MODE
call ts_vmod
ENDIF
IF !DEFINED_CRT_DISABLELOADER
call loadbanks
ENDIF
ld iy,23610 ; restore the right iy value,
; fixing the self-relocating trick, if any
IF !DEFINED_ZXVGS
ld (start1+1),sp ; Save entry stack
ENDIF
INCLUDE "crt/classic/crt_init_sp.asm"
INCLUDE "crt/classic/crt_init_atexit.asm"
call crt0_init_bss
ld (exitsp),sp
; Optional definition for auto MALLOC init; it takes
; all the space between the end of the program and UDG
IF DEFINED_USING_amalloc
defc CRT_MAX_HEAP_ADDRESS = 65535 - 169
INCLUDE "crt/classic/crt_init_amalloc.asm"
ENDIF
IF DEFINED_ZXVGS
;setting variables needed for proper keyboard reading
LD (IY+1),$CD ; FLAGS #5C3B
LD (IY+48),1 ; FLAGS2 #5C6A
EI ; ZXVGS starts with disabled interrupts
ENDIF
; ld a,2 ; open the upper display (uneeded?)
; call 5633
ENDIF
IF DEFINED_NEEDresidos
call residos_detect
jp c,cleanup_exit
ENDIF
call _main ; Call user program
cleanup:
push hl
call crt0_exit
IF (startup=2) ; ROM ?
cleanup_exit:
rst 0
defs 56-cleanup_exit-1
if (ASMPC<>$0038)
defs CODE_ALIGNMENT_ERROR
endif
; ######## IM 1 MODE INTERRUPT ENTRY ########
INCLUDE "target/zx/classic/spec_crt0_rom_isr.asm"
; ######## END OF ROM INTERRUPT HANDLER ########
PUBLIC zx_internal_cls
zx_internal_cls:
ld hl,$4000 ; cls
ld d,h
ld e,l
inc de
ld (hl),0
ld bc,$1800
ldir
ld (hl),a
ld bc,768
ldir
rrca
rrca
rrca
out (254),a
ret
ELSE
IF DEFINED_ZXVGS
POP BC ;let's say exit code goes to BC
RST 8
DEFB $FD ;Program finished
ELSE
cleanup_exit:
ld hl,10072 ;Restore hl' to what basic wants
exx
pop bc
start1: ld sp,0 ;Restore stack to entry value
ret
ENDIF
ENDIF
l_dcal: jp (hl) ;Used for function pointer calls
; Runtime selection
IF NEED_fzxterminal
PUBLIC fputc_cons
PUBLIC _fputc_cons
PUBLIC _fgets_cons_erase_character
PUBLIC fgets_cons_erase_character
EXTERN fputc_cons_fzx
EXTERN fgets_cons_erase_character_fzx
defc DEFINED_fputc_cons = 1
defc fputc_cons = fputc_cons_fzx
defc _fputc_cons = fputc_cons_fzx
defc fgets_cons_erase_character = fgets_cons_erase_character_fzx
defc _fgets_cons_erase_character = fgets_cons_erase_character_fzx
ENDIF
INCLUDE "crt/classic/crt_runtime_selection.asm"
;---------------------------------------------
; Some +3 stuff - this needs to be below 49152
;---------------------------------------------
IF DEFINED_NEEDresidos
INCLUDE "target/zx/def/idedos.def"
defc ERR_NR=$5c3a ; BASIC system variables
defc ERR_SP=$5c3d
PUBLIC dodos
EXTERN dodos_residos
defc dodos = dodos_residos
; Detect an installed version of ResiDOS.
;
; This should be done before you attempt to call any other ResiDOS/+3DOS/IDEDOS
; routines, and ensures that the Spectrum is running with ResiDOS installed.
; Since +3DOS and IDEDOS are present only from v1.40, this version must
; be checked for before making any further calls.
;
; If you need to use calls that were only provided from a certain version of
; ResiDOS, you can check that here as well.
;
; The ResiDOS version call is made with a special hook-code after a RST 8,
; which will cause an error on Speccies without ResiDOS v1.20+ installed,
; or error 0 (OK) if ResiDOS v1.20+ is present. Therefore, we need
; to trap any errors here.
residos_detect:
ld hl,(ERR_SP)
push hl ; save the existing ERR_SP
ld hl,detect_error
push hl ; stack error-handler return address
ld hl,0
add hl,sp
ld (ERR_SP),hl ; set the error-handler SP
rst RST_HOOK ; invoke the version info hook code
defb HOOK_VERSION
pop hl ; ResiDOS doesn't return, so if we get
jr noresidos ; here, some other hardware is present
detect_error:
pop hl
ld (ERR_SP),hl ; restore the old ERR_SP
ld a,(ERR_NR)
inc a ; is the error code now "OK"?
jr nz,noresidos ; if not, ResiDOS was not detected
ex de,hl ; get HL=ResiDOS version
push hl ; save the version
ld de,$0140 ; DE=minimum version to run with
and a
sbc hl,de
pop bc ; restore the version to BC
ret nc ; and return with it if at least v1.40
noresidos:
ld bc,0 ; no ResiDOS
ld a,$ff
ld (ERR_NR),a ; clear error
ret
ENDIF
; Call a routine in the spectrum ROM
; The routine to call is stored in the two bytes following
call_rom3:
exx ; Use alternate registers
IF DEFINED_NEED_ZXMMC
push af
xor a ; standard ROM
out ($7F),a ; ZXMMC FASTPAGE
pop af
ENDIF
ex (sp),hl ; get return address
ld c,(hl)
inc hl
ld b,(hl) ; BC=BASIC address
inc hl
ex (sp),hl ; restore return address
push bc
exx ; Back to the regular set
ret
IF (startup=2) ;ROM
IF !DEFINED_CRT_ORG_BSS
defc CRT_ORG_BSS = 24576
defc DEFINED_CRT_ORG_BSS = 1
ENDIF
; If we were given a model then use it
IF DEFINED_CRT_MODEL
defc __crt_model = CRT_MODEL
ELSE
defc __crt_model = 1
ENDIF
ELSE
IF !DEFINED_CRT_DISABLELOADER
loadbanks:
IF DEFINED_CRT_PLUS3LOADER
INCLUDE "target/zx/classic/zx_p3loader.asm"
ELSE
INCLUDE "target/zx/classic/zx_tapeloader.asm"
ENDIF
ENDIF
ENDIF
; If we were given an address for the BSS then use it
IF DEFINED_CRT_ORG_BSS
defc __crt_org_bss = CRT_ORG_BSS
ENDIF
; Create a dedicated contended section
IF CRT_ORG_CODE < 32768
SECTION CONTENDED
ENDIF
INCLUDE "crt/classic/crt_section.asm"
SECTION code_crt_init
ld a,@111000 ; White PAPER, black INK
ld ($5c48),a ; BORDCR
ld ($5c8d),a ; ATTR_P
ld ($5c8f),a ; ATTR_T
SECTION bss_crt
IF startup=2
PUBLIC romsvc
_FRAMES: defs 3
romsvc: defs 10 ; Pointer to the end of the sysdefvars
; used by the ROM version of some library
ENDIF
IF __MMAP != -1
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Define Memory Banks
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
IFNDEF CRT_ORG_BANK_0
defc CRT_ORG_BANK_0 = 0xc000
ENDIF
IFNDEF CRT_ORG_BANK_1
defc CRT_ORG_BANK_1 = 0xc000
ENDIF
IFNDEF CRT_ORG_BANK_2
defc CRT_ORG_BANK_2 = 0xc000
ENDIF
IFNDEF CRT_ORG_BANK_3
defc CRT_ORG_BANK_3 = 0xc000
ENDIF
IFNDEF CRT_ORG_BANK_4
defc CRT_ORG_BANK_4 = 0xc000
ENDIF
IFNDEF CRT_ORG_BANK_5
defc CRT_ORG_BANK_5 = 0xc000
ENDIF
IFNDEF CRT_ORG_BANK_6
defc CRT_ORG_BANK_6 = 0xc000
ENDIF
IFNDEF CRT_ORG_BANK_7
defc CRT_ORG_BANK_7 = 0xc000
ENDIF
SECTION BANK_0
org 0x000000 + CRT_ORG_BANK_0
SECTION CODE_0
SECTION RODATA_0
SECTION DATA_0
SECTION BSS_0
SECTION BANK_0_END
SECTION BANK_1
org 0x010000 + CRT_ORG_BANK_1
SECTION CODE_1
SECTION RODATA_1
SECTION DATA_1
SECTION BSS_1
SECTION BANK_1_END
SECTION BANK_2
org 0x020000 + CRT_ORG_BANK_2
SECTION CODE_2
SECTION RODATA_2
SECTION DATA_2
SECTION BSS_2
SECTION BANK_2_END
SECTION BANK_3
org 0x030000+ CRT_ORG_BANK_3
SECTION CODE_3
SECTION RODATA_3
SECTION DATA_3
SECTION BSS_3
SECTION BANK_3_END
SECTION BANK_4
org 0x040000 + CRT_ORG_BANK_4
SECTION CODE_4
SECTION RODATA_4
SECTION DATA_4
SECTION BSS_4
SECTION BANK_4_END
SECTION BANK_5
org 0x050000 + CRT_ORG_BANK_5
SECTION CODE_5
SECTION RODATA_5
SECTION DATA_5
SECTION BSS_5
SECTION BANK_5_END
SECTION BANK_6
org 0x060000 + CRT_ORG_BANK_6
SECTION CODE_6
SECTION RODATA_6
SECTION DATA_6
SECTION BSS_6
SECTION BANK_6_END
SECTION BANK_7
org 0x070000 + CRT_ORG_BANK_7
SECTION CODE_7
SECTION RODATA_7
SECTION DATA_7
SECTION BSS_7
SECTION BANK_7_END
ENDIF
|
// Copyright (c) 2012-2013 The Bitcoin Core developers
// Distributed under the MIT software license, see the accompanying
// file COPYING or https://www.opensource.org/licenses/mit-license.php .
#include "key.h"
#include "chainparams.h"
#include "key_io.h"
#include "script/script.h"
#include "uint256.h"
#include "util.h"
#include "utilstrencodings.h"
#include "utiltest.h"
#include "test/test_bitcoin.h"
#include "arnak/Address.hpp"
#include <string>
#include <vector>
#include <boost/test/unit_test.hpp>
using namespace std;
using namespace libzcash;
static const std::string strSecret1 = "5HxWvvfubhXpYYpS3tJkw6fq9jE9j18THftkZjHHfmFiWtmAbrj";
static const std::string strSecret2 = "5KC4ejrDjv152FGwP386VD1i2NYc5KkfSMyv1nGy1VGDxGHqVY3";
static const std::string strSecret1C = "Kwr371tjA9u2rFSMZjTNun2PXXP3WPZu2afRHTcta6KxEUdm1vEw";
static const std::string strSecret2C = "L3Hq7a8FEQwJkW1M2GNKDW28546Vp5miewcCzSqUD9kCAXrJdS3g";
static const std::string addr1 = "t1h8SqgtM3QM5e2M8EzhhT1yL2PXXtA6oqe";
static const std::string addr2 = "t1Xxa5ZVPKvs9bGMn7aWTiHjyHvR31XkUst";
static const std::string addr1C = "t1ffus9J1vhxvFqLoExGBRPjE7BcJxiSCTC";
static const std::string addr2C = "t1VJL2dPUyXK7avDRGqhqQA5bw2eEMdhyg6";
static const std::string strAddressBad = "t1aMkLwU1LcMZYN7TgXUJAwzA1r44dbLkSp";
#ifdef KEY_TESTS_DUMPINFO
void dumpKeyInfo(uint256 privkey)
{
CKey key;
key.resize(32);
memcpy(&secret[0], &privkey, 32);
vector<unsigned char> sec;
sec.resize(32);
memcpy(&sec[0], &secret[0], 32);
printf(" * secret (hex): %s\n", HexStr(sec).c_str());
for (int nCompressed=0; nCompressed<2; nCompressed++)
{
bool fCompressed = nCompressed == 1;
printf(" * %s:\n", fCompressed ? "compressed" : "uncompressed");
CBitcoinSecret bsecret;
bsecret.SetSecret(secret, fCompressed);
printf(" * secret (base58): %s\n", bsecret.ToString().c_str());
CKey key;
key.SetSecret(secret, fCompressed);
vector<unsigned char> vchPubKey = key.GetPubKey();
printf(" * pubkey (hex): %s\n", HexStr(vchPubKey).c_str());
printf(" * address (base58): %s\n", EncodeDestination(vchPubKey).c_str());
}
}
#endif
BOOST_FIXTURE_TEST_SUITE(key_tests, BasicTestingSetup)
BOOST_AUTO_TEST_CASE(key_test1)
{
CKey key1 = DecodeSecret(strSecret1);
BOOST_CHECK(key1.IsValid() && !key1.IsCompressed());
CKey key2 = DecodeSecret(strSecret2);
BOOST_CHECK(key2.IsValid() && !key2.IsCompressed());
CKey key1C = DecodeSecret(strSecret1C);
BOOST_CHECK(key1C.IsValid() && key1C.IsCompressed());
CKey key2C = DecodeSecret(strSecret2C);
BOOST_CHECK(key2C.IsValid() && key2C.IsCompressed());
CKey bad_key = DecodeSecret(strAddressBad);
BOOST_CHECK(!bad_key.IsValid());
CPubKey pubkey1 = key1. GetPubKey();
CPubKey pubkey2 = key2. GetPubKey();
CPubKey pubkey1C = key1C.GetPubKey();
CPubKey pubkey2C = key2C.GetPubKey();
BOOST_CHECK(key1.VerifyPubKey(pubkey1));
BOOST_CHECK(!key1.VerifyPubKey(pubkey1C));
BOOST_CHECK(!key1.VerifyPubKey(pubkey2));
BOOST_CHECK(!key1.VerifyPubKey(pubkey2C));
BOOST_CHECK(!key1C.VerifyPubKey(pubkey1));
BOOST_CHECK(key1C.VerifyPubKey(pubkey1C));
BOOST_CHECK(!key1C.VerifyPubKey(pubkey2));
BOOST_CHECK(!key1C.VerifyPubKey(pubkey2C));
BOOST_CHECK(!key2.VerifyPubKey(pubkey1));
BOOST_CHECK(!key2.VerifyPubKey(pubkey1C));
BOOST_CHECK(key2.VerifyPubKey(pubkey2));
BOOST_CHECK(!key2.VerifyPubKey(pubkey2C));
BOOST_CHECK(!key2C.VerifyPubKey(pubkey1));
BOOST_CHECK(!key2C.VerifyPubKey(pubkey1C));
BOOST_CHECK(!key2C.VerifyPubKey(pubkey2));
BOOST_CHECK(key2C.VerifyPubKey(pubkey2C));
BOOST_CHECK(DecodeDestination(addr1) == CTxDestination(pubkey1.GetID()));
BOOST_CHECK(DecodeDestination(addr2) == CTxDestination(pubkey2.GetID()));
BOOST_CHECK(DecodeDestination(addr1C) == CTxDestination(pubkey1C.GetID()));
BOOST_CHECK(DecodeDestination(addr2C) == CTxDestination(pubkey2C.GetID()));
for (int n=0; n<16; n++)
{
string strMsg = strprintf("Very secret message %i: 11", n);
uint256 hashMsg = Hash(strMsg.begin(), strMsg.end());
// normal signatures
vector<unsigned char> sign1, sign2, sign1C, sign2C;
BOOST_CHECK(key1.Sign (hashMsg, sign1));
BOOST_CHECK(key2.Sign (hashMsg, sign2));
BOOST_CHECK(key1C.Sign(hashMsg, sign1C));
BOOST_CHECK(key2C.Sign(hashMsg, sign2C));
BOOST_CHECK( pubkey1.Verify(hashMsg, sign1));
BOOST_CHECK(!pubkey1.Verify(hashMsg, sign2));
BOOST_CHECK( pubkey1.Verify(hashMsg, sign1C));
BOOST_CHECK(!pubkey1.Verify(hashMsg, sign2C));
BOOST_CHECK(!pubkey2.Verify(hashMsg, sign1));
BOOST_CHECK( pubkey2.Verify(hashMsg, sign2));
BOOST_CHECK(!pubkey2.Verify(hashMsg, sign1C));
BOOST_CHECK( pubkey2.Verify(hashMsg, sign2C));
BOOST_CHECK( pubkey1C.Verify(hashMsg, sign1));
BOOST_CHECK(!pubkey1C.Verify(hashMsg, sign2));
BOOST_CHECK( pubkey1C.Verify(hashMsg, sign1C));
BOOST_CHECK(!pubkey1C.Verify(hashMsg, sign2C));
BOOST_CHECK(!pubkey2C.Verify(hashMsg, sign1));
BOOST_CHECK( pubkey2C.Verify(hashMsg, sign2));
BOOST_CHECK(!pubkey2C.Verify(hashMsg, sign1C));
BOOST_CHECK( pubkey2C.Verify(hashMsg, sign2C));
// compact signatures (with key recovery)
vector<unsigned char> csign1, csign2, csign1C, csign2C;
BOOST_CHECK(key1.SignCompact (hashMsg, csign1));
BOOST_CHECK(key2.SignCompact (hashMsg, csign2));
BOOST_CHECK(key1C.SignCompact(hashMsg, csign1C));
BOOST_CHECK(key2C.SignCompact(hashMsg, csign2C));
CPubKey rkey1, rkey2, rkey1C, rkey2C;
BOOST_CHECK(rkey1.RecoverCompact (hashMsg, csign1));
BOOST_CHECK(rkey2.RecoverCompact (hashMsg, csign2));
BOOST_CHECK(rkey1C.RecoverCompact(hashMsg, csign1C));
BOOST_CHECK(rkey2C.RecoverCompact(hashMsg, csign2C));
BOOST_CHECK(rkey1 == pubkey1);
BOOST_CHECK(rkey2 == pubkey2);
BOOST_CHECK(rkey1C == pubkey1C);
BOOST_CHECK(rkey2C == pubkey2C);
}
// test deterministic signing
std::vector<unsigned char> detsig, detsigc;
string strMsg = "Very deterministic message";
uint256 hashMsg = Hash(strMsg.begin(), strMsg.end());
BOOST_CHECK(key1.Sign(hashMsg, detsig));
BOOST_CHECK(key1C.Sign(hashMsg, detsigc));
BOOST_CHECK(detsig == detsigc);
BOOST_CHECK(detsig == ParseHex("304402205dbbddda71772d95ce91cd2d14b592cfbc1dd0aabd6a394b6c2d377bbe59d31d022014ddda21494a4e221f0824f0b8b924c43fa43c0ad57dccdaa11f81a6bd4582f6"));
BOOST_CHECK(key2.Sign(hashMsg, detsig));
BOOST_CHECK(key2C.Sign(hashMsg, detsigc));
BOOST_CHECK(detsig == detsigc);
BOOST_CHECK(detsig == ParseHex("3044022052d8a32079c11e79db95af63bb9600c5b04f21a9ca33dc129c2bfa8ac9dc1cd5022061d8ae5e0f6c1a16bde3719c64c2fd70e404b6428ab9a69566962e8771b5944d"));
BOOST_CHECK(key1.SignCompact(hashMsg, detsig));
BOOST_CHECK(key1C.SignCompact(hashMsg, detsigc));
BOOST_CHECK(detsig == ParseHex("1c5dbbddda71772d95ce91cd2d14b592cfbc1dd0aabd6a394b6c2d377bbe59d31d14ddda21494a4e221f0824f0b8b924c43fa43c0ad57dccdaa11f81a6bd4582f6"));
BOOST_CHECK(detsigc == ParseHex("205dbbddda71772d95ce91cd2d14b592cfbc1dd0aabd6a394b6c2d377bbe59d31d14ddda21494a4e221f0824f0b8b924c43fa43c0ad57dccdaa11f81a6bd4582f6"));
BOOST_CHECK(key2.SignCompact(hashMsg, detsig));
BOOST_CHECK(key2C.SignCompact(hashMsg, detsigc));
BOOST_CHECK(detsig == ParseHex("1c52d8a32079c11e79db95af63bb9600c5b04f21a9ca33dc129c2bfa8ac9dc1cd561d8ae5e0f6c1a16bde3719c64c2fd70e404b6428ab9a69566962e8771b5944d"));
BOOST_CHECK(detsigc == ParseHex("2052d8a32079c11e79db95af63bb9600c5b04f21a9ca33dc129c2bfa8ac9dc1cd561d8ae5e0f6c1a16bde3719c64c2fd70e404b6428ab9a69566962e8771b5944d"));
}
BOOST_AUTO_TEST_CASE(zc_address_test)
{
for (size_t i = 0; i < 1000; i++) {
auto sk = SproutSpendingKey::random();
{
string sk_string = EncodeSpendingKey(sk);
BOOST_CHECK(sk_string[0] == 'S');
BOOST_CHECK(sk_string[1] == 'K');
auto spendingkey2 = DecodeSpendingKey(sk_string);
BOOST_CHECK(IsValidSpendingKey(spendingkey2));
BOOST_ASSERT(boost::get<SproutSpendingKey>(&spendingkey2) != nullptr);
auto sk2 = boost::get<SproutSpendingKey>(spendingkey2);
BOOST_CHECK(sk.inner() == sk2.inner());
}
{
auto addr = sk.address();
std::string addr_string = EncodePaymentAddress(addr);
BOOST_CHECK(addr_string[0] == 'z');
BOOST_CHECK(addr_string[1] == 'c');
auto paymentaddr2 = DecodePaymentAddress(addr_string);
BOOST_ASSERT(IsValidPaymentAddress(paymentaddr2));
BOOST_ASSERT(boost::get<SproutPaymentAddress>(&paymentaddr2) != nullptr);
auto addr2 = boost::get<SproutPaymentAddress>(paymentaddr2);
BOOST_CHECK(addr.a_pk == addr2.a_pk);
BOOST_CHECK(addr.pk_enc == addr2.pk_enc);
}
}
}
BOOST_AUTO_TEST_CASE(zs_address_test)
{
SelectParams(CBaseChainParams::REGTEST);
auto m = GetTestMasterSaplingSpendingKey();
for (uint32_t i = 0; i < 1000; i++) {
auto sk = m.Derive(i);
{
std::string sk_string = EncodeSpendingKey(sk);
BOOST_CHECK(sk_string.compare(0, 27, Params().Bech32HRP(CChainParams::SAPLING_EXTENDED_SPEND_KEY)) == 0);
auto spendingkey2 = DecodeSpendingKey(sk_string);
BOOST_CHECK(IsValidSpendingKey(spendingkey2));
BOOST_ASSERT(boost::get<SaplingExtendedSpendingKey>(&spendingkey2) != nullptr);
auto sk2 = boost::get<SaplingExtendedSpendingKey>(spendingkey2);
BOOST_CHECK(sk == sk2);
}
{
auto addr = sk.DefaultAddress();
std::string addr_string = EncodePaymentAddress(addr);
BOOST_CHECK(addr_string.compare(0, 15, Params().Bech32HRP(CChainParams::SAPLING_PAYMENT_ADDRESS)) == 0);
auto paymentaddr2 = DecodePaymentAddress(addr_string);
BOOST_CHECK(IsValidPaymentAddress(paymentaddr2));
BOOST_ASSERT(boost::get<SaplingPaymentAddress>(&paymentaddr2) != nullptr);
auto addr2 = boost::get<SaplingPaymentAddress>(paymentaddr2);
BOOST_CHECK(addr == addr2);
}
}
}
BOOST_AUTO_TEST_SUITE_END()
|
%ifdef CONFIG
{
"RegData": {
"RBX": "0x80",
"RCX": "0x00",
"RDX": "0xC0",
"RSI": "0x40",
"R8": "0x1",
"R9": "0x0",
"R10": "0x0",
"R11": "0x1"
}
}
%endif
mov rbx, 0x01
mov rcx, 0x01
mov rdx, 0x80
mov rsi, 0x80
mov r15, 1
stc
rcr bl, 1
mov r8, 0
cmovo r8, r15 ; We only care about OF here
clc
rcr cl, 1
mov r9, 0
cmovo r9, r15 ; We only care about OF here
stc
rcr dl, 1
mov r10, 0
cmovo r10, r15 ; We only care about OF here
clc
rcr sil, 1
mov r11, 0
cmovo r11, r15 ; We only care about OF here
hlt
|
org 0100h
jmp LABEL_START ; Start
; 下面是 FAT12 磁盘的头, 之所以包含它是因为下面用到了磁盘的一些信息
%include "fat12hdr.inc"
%include "load.inc"
%include "pm.inc"
; GDT ------------------------------------------------------------------------------------------------------------------------------------------------------------
; 段基址 段界限 , 属性
LABEL_GDT: Descriptor 0, 0, 0 ; 空描述符
LABEL_DESC_FLAT_C: Descriptor 0, 0fffffh, DA_CR | DA_32 | DA_LIMIT_4K ; 0 ~ 4G
LABEL_DESC_FLAT_RW: Descriptor 0, 0fffffh, DA_DRW | DA_32 | DA_LIMIT_4K ; 0 ~ 4G
LABEL_DESC_VIDEO: Descriptor 0B8000h, 0ffffh, DA_DRW | DA_DPL3 ; 显存首地址
; GDT ------------------------------------------------------------------------------------------------------------------------------------------------------------
GdtLen equ $ - LABEL_GDT
GdtPtr dw GdtLen - 1 ; 段界限
dd BaseOfLoaderPhyAddr + LABEL_GDT ; 基地址
; GDT 选择子 ----------------------------------------------------------------------------------
SelectorFlatC equ LABEL_DESC_FLAT_C - LABEL_GDT
SelectorFlatRW equ LABEL_DESC_FLAT_RW - LABEL_GDT
SelectorVideo equ LABEL_DESC_VIDEO - LABEL_GDT + SA_RPL3
; GDT 选择子 ----------------------------------------------------------------------------------
BaseOfStack equ 0100h
LABEL_START: ; <--- 从这里开始 *************
mov ax, cs
mov ds, ax
mov es, ax
mov ss, ax
mov sp, BaseOfStack
mov dh, 0 ; "Loading "
call DispStrRealMode ; 显示字符串
; 得到内存数
mov ebx, 0 ; ebx = 后续值, 开始时需为 0
mov di, _MemChkBuf ; es:di 指向一个地址范围描述符结构（Address Range Descriptor Structure）
.MemChkLoop:
mov eax, 0E820h ; eax = 0000E820h
mov ecx, 20 ; ecx = 地址范围描述符结构的大小
mov edx, 0534D4150h ; edx = 'SMAP'
int 15h ; int 15h
jc .MemChkFail
add di, 20
inc dword [_dwMCRNumber] ; dwMCRNumber = ARDS 的个数
cmp ebx, 0
jne .MemChkLoop
jmp .MemChkOK
.MemChkFail:
mov dword [_dwMCRNumber], 0
.MemChkOK:
; 下面在 A 盘的根目录寻找 KERNEL.BIN
mov word [wSectorNo], SectorNoOfRootDirectory
xor ah, ah ; ┓
xor dl, dl ; ┣ 软驱复位
int 13h ; ┛
LABEL_SEARCH_IN_ROOT_DIR_BEGIN:
cmp word [wRootDirSizeForLoop], 0 ; ┓
jz LABEL_NO_KERNELBIN ; ┣ 判断根目录区是不是已经读完, 如果读完表示没有找到 KERNEL.BIN
dec word [wRootDirSizeForLoop] ; ┛
mov ax, BaseOfKernelFile
mov es, ax ; es <- BaseOfKernelFile
mov bx, OffsetOfKernelFile ; bx <- OffsetOfKernelFile 于是, es:bx = BaseOfKernelFile:OffsetOfKernelFile = BaseOfKernelFile * 10h + OffsetOfKernelFile
mov ax, [wSectorNo] ; ax <- Root Directory 中的某 Sector 号
mov cl, 1
call ReadSector
mov si, KernelFileName ; ds:si -> "KERNEL BIN"
mov di, OffsetOfKernelFile ; es:di -> BaseOfKernelFile:???? = BaseOfKernelFile*10h+????
cld
mov dx, 10h
LABEL_SEARCH_FOR_KERNELBIN:
cmp dx, 0 ; ┓
jz LABEL_GOTO_NEXT_SECTOR_IN_ROOT_DIR ; ┣ 循环次数控制, 如果已经读完了一个 Sector, 就跳到下一个 Sector
dec dx ; ┛
mov cx, 11
LABEL_CMP_FILENAME:
cmp cx, 0 ; ┓
jz LABEL_FILENAME_FOUND ; ┣ 循环次数控制, 如果比较了 11 个字符都相等, 表示找到
dec cx ; ┛
lodsb ; ds:si -> al
cmp al, byte [es:di] ; if al == es:di
jz LABEL_GO_ON
jmp LABEL_DIFFERENT
LABEL_GO_ON:
inc di
jmp LABEL_CMP_FILENAME ; 继续循环
LABEL_DIFFERENT:
and di, 0FFE0h ; else┓ 这时di的值不知道是什么, di &= e0 为了让它是 20h 的倍数
add di, 20h ; ┃
mov si, KernelFileName ; ┣ di += 20h 下一个目录条目
jmp LABEL_SEARCH_FOR_KERNELBIN; ┛
LABEL_GOTO_NEXT_SECTOR_IN_ROOT_DIR:
add word [wSectorNo], 1
jmp LABEL_SEARCH_IN_ROOT_DIR_BEGIN
LABEL_NO_KERNELBIN:
mov dh, 2 ; "No KERNEL."
call DispStrRealMode ; 显示字符串
jmp $ ; 没有找到 KERNEL.BIN, 死循环在这里
LABEL_FILENAME_FOUND: ; 找到 KERNEL.BIN 后便来到这里继续
mov ax, RootDirSectors
and di, 0FFF0h ; di -> 当前条目的开始
push eax
mov eax, [es : di + 01Ch] ; ┓
mov dword [dwKernelSize], eax ; ┛保存 KERNEL.BIN 文件大小
pop eax
add di, 01Ah ; di -> 首 Sector
mov cx, word [es:di]
push cx ; 保存此 Sector 在 FAT 中的序号
add cx, ax
add cx, DeltaSectorNo ; 这时 cl 里面是 LOADER.BIN 的起始扇区号 (从 0 开始数的序号)
mov ax, BaseOfKernelFile
mov es, ax ; es <- BaseOfKernelFile
mov bx, OffsetOfKernelFile ; bx <- OffsetOfKernelFile 于是, es:bx = BaseOfKernelFile:OffsetOfKernelFile = BaseOfKernelFile * 10h + OffsetOfKernelFile
mov ax, cx ; ax <- Sector 号
LABEL_GOON_LOADING_FILE:
push ax ; ┓
push bx ; ┃
mov ah, 0Eh ; ┃ 每读一个扇区就在 "Loading " 后面打一个点, 形成这样的效果:
mov al, '.' ; ┃
mov bl, 0Fh ; ┃ Loading ......
int 10h ; ┃
pop bx ; ┃
pop ax ; ┛
mov cl, 1
call ReadSector
pop ax ; 取出此 Sector 在 FAT 中的序号
call GetFATEntry
cmp ax, 0FFFh
jz LABEL_FILE_LOADED
push ax ; 保存 Sector 在 FAT 中的序号
mov dx, RootDirSectors
add ax, dx
add ax, DeltaSectorNo
add bx, [BPB_BytsPerSec]
jmp LABEL_GOON_LOADING_FILE
LABEL_FILE_LOADED:
call KillMotor ; 关闭软驱马达
mov dh, 1 ; "Ready."
call DispStrRealMode ; 显示字符串
; 下面准备跳入保护模式 -------------------------------------------
; 加载 GDTR
lgdt [GdtPtr]
; 关中断
cli
; 打开地址线A20
in al, 92h
or al, 00000010b
out 92h, al
; 准备切换到保护模式
mov eax, cr0
or eax, 1
mov cr0, eax
; 真正进入保护模式
jmp dword SelectorFlatC:(BaseOfLoaderPhyAddr+LABEL_PM_START)
;============================================================================
;变量
;----------------------------------------------------------------------------
wRootDirSizeForLoop dw RootDirSectors ; Root Directory 占用的扇区数
wSectorNo dw 0 ; 要读取的扇区号
bOdd db 0 ; 奇数还是偶数
dwKernelSize dd 0 ; KERNEL.BIN 文件大小
;============================================================================
;字符串
;----------------------------------------------------------------------------
KernelFileName db "KERNEL BIN", 0 ; KERNEL.BIN 之文件名
; 为简化代码, 下面每个字符串的长度均为 MessageLength
MessageLength equ 9
LoadMessage: db "Loading "
Message1 db "Ready. "
Message2 db "No KERNEL"
;============================================================================
;----------------------------------------------------------------------------
; 函数名: DispStrRealMode
;----------------------------------------------------------------------------
; 运行环境:
; 实模式（保护模式下显示字符串由函数 DispStr 完成）
; 作用:
; 显示一个字符串, 函数开始时 dh 中应该是字符串序号(0-based)
DispStrRealMode:
mov ax, MessageLength
mul dh
add ax, LoadMessage
mov bp, ax ; ┓
mov ax, ds ; ┣ ES:BP = 串地址
mov es, ax ; ┛
mov cx, MessageLength ; CX = 串长度
mov ax, 01301h ; AH = 13, AL = 01h
mov bx, 0007h ; 页号为0(BH = 0) 黑底白字(BL = 07h)
mov dl, 0
add dh, 3 ; 从第 3 行往下显示
int 10h ; int 10h
ret
;----------------------------------------------------------------------------
; 函数名: ReadSector
;----------------------------------------------------------------------------
; 作用:
; 从序号(Directory Entry 中的 Sector 号)为 ax 的的 Sector 开始, 将 cl 个 Sector 读入 es:bx 中
ReadSector:
; -----------------------------------------------------------------------
; 怎样由扇区号求扇区在磁盘中的位置 (扇区号 -> 柱面号, 起始扇区, 磁头号)
; -----------------------------------------------------------------------
; 设扇区号为 x
; ┌ 柱面号 = y >> 1
; x ┌ 商 y ┤
; -------------- => ┤ └ 磁头号 = y & 1
; 每磁道扇区数 │
; └ 余 z => 起始扇区号 = z + 1
push bp
mov bp, sp
sub esp, 2 ; 辟出两个字节的堆栈区域保存要读的扇区数: byte [bp-2]
mov byte [bp-2], cl
push bx ; 保存 bx
mov bl, [BPB_SecPerTrk] ; bl: 除数
div bl ; y 在 al 中, z 在 ah 中
inc ah ; z ++
mov cl, ah ; cl <- 起始扇区号
mov dh, al ; dh <- y
shr al, 1 ; y >> 1 (其实是 y/BPB_NumHeads, 这里BPB_NumHeads=2)
mov ch, al ; ch <- 柱面号
and dh, 1 ; dh & 1 = 磁头号
pop bx ; 恢复 bx
; 至此, "柱面号, 起始扇区, 磁头号" 全部得到 ^^^^^^^^^^^^^^^^^^^^^^^^
mov dl, [BS_DrvNum] ; 驱动器号 (0 表示 A 盘)
.GoOnReading:
mov ah, 2 ; 读
mov al, byte [bp-2] ; 读 al 个扇区
int 13h
jc .GoOnReading ; 如果读取错误 CF 会被置为 1, 这时就不停地读, 直到正确为止
add esp, 2
pop bp
ret
;----------------------------------------------------------------------------
; 函数名: GetFATEntry
;----------------------------------------------------------------------------
; 作用:
; 找到序号为 ax 的 Sector 在 FAT 中的条目, 结果放在 ax 中
; 需要注意的是, 中间需要读 FAT 的扇区到 es:bx 处, 所以函数一开始保存了 es 和 bx
GetFATEntry:
push es
push bx
push ax
mov ax, BaseOfKernelFile ; ┓
sub ax, 0100h ; ┣ 在 BaseOfKernelFile 后面留出 4K 空间用于存放 FAT
mov es, ax ; ┛
pop ax
mov byte [bOdd], 0
mov bx, 3
mul bx ; dx:ax = ax * 3
mov bx, 2
div bx ; dx:ax / 2 ==> ax <- 商, dx <- 余数
cmp dx, 0
jz LABEL_EVEN
mov byte [bOdd], 1
LABEL_EVEN:;偶数
xor dx, dx ; 现在 ax 中是 FATEntry 在 FAT 中的偏移量. 下面来计算 FATEntry 在哪个扇区中(FAT占用不止一个扇区)
mov bx, [BPB_BytsPerSec]
div bx ; dx:ax / BPB_BytsPerSec ==> ax <- 商 (FATEntry 所在的扇区相对于 FAT 来说的扇区号)
; dx <- 余数 (FATEntry 在扇区内的偏移)。
push dx
mov bx, 0 ; bx <- 0 于是, es:bx = (BaseOfKernelFile - 100):00 = (BaseOfKernelFile - 100) * 10h
add ax, SectorNoOfFAT1 ; 此句执行之后的 ax 就是 FATEntry 所在的扇区号
mov cl, 2
call ReadSector ; 读取 FATEntry 所在的扇区, 一次读两个, 避免在边界发生错误, 因为一个 FATEntry 可能跨越两个扇区
pop dx
add bx, dx
mov ax, [es:bx]
cmp byte [bOdd], 1
jnz LABEL_EVEN_2
shr ax, 4
LABEL_EVEN_2:
and ax, 0FFFh
LABEL_GET_FAT_ENRY_OK:
pop bx
pop es
ret
;----------------------------------------------------------------------------
;----------------------------------------------------------------------------
; 函数名: KillMotor
;----------------------------------------------------------------------------
; 作用:
; 关闭软驱马达
KillMotor:
push dx
mov dx, 03F2h
mov al, 0
out dx, al
pop dx
ret
;----------------------------------------------------------------------------
; 从此以后的代码在保护模式下执行 ----------------------------------------------------
; 32 位代码段. 由实模式跳入 ---------------------------------------------------------
[SECTION .s32]
ALIGN 32
[BITS 32]
LABEL_PM_START:
mov ax, SelectorVideo
mov gs, ax
mov ax, SelectorFlatRW
mov ds, ax
mov es, ax
mov fs, ax
mov ss, ax
mov esp, TopOfStack
push szMemChkTitle
call DispStr
add esp, 4
call DispMemInfo
call SetupPaging
mov ah, 0Fh ; 0000: 黑底 1111: 白字
mov al, 'P'
mov [gs:((80 * 0 + 39) * 2)], ax ; 屏幕第 0 行, 第 39 列。
call InitKernel
;jmp $
;***************************************************************
jmp SelectorFlatC:KernelEntryPointPhyAddr ; 正式进入内核 *
;***************************************************************
; 内存看上去是这样的：
; ┃ ┃
; ┃ . ┃
; ┃ . ┃
; ┃ . ┃
; ┣━━━━━━━━━━━━━━━━━━┫
; ┃■■■■■■■■■■■■■■■■■■┃
; ┃■■■■■■Page Tables■■■■■■┃
; ┃■■■■■(大小由LOADER决定)■■■■┃
; 00101000h ┃■■■■■■■■■■■■■■■■■■┃ PageTblBase
; ┣━━━━━━━━━━━━━━━━━━┫
; ┃■■■■■■■■■■■■■■■■■■┃
; 00100000h ┃■■■■Page Directory Table■■■■┃ PageDirBase <- 1M
; ┣━━━━━━━━━━━━━━━━━━┫
; ┃□□□□□□□□□□□□□□□□□□┃
; F0000h ┃□□□□□□□System ROM□□□□□□┃
; ┣━━━━━━━━━━━━━━━━━━┫
; ┃□□□□□□□□□□□□□□□□□□┃
; E0000h ┃□□□□Expansion of system ROM □□┃
; ┣━━━━━━━━━━━━━━━━━━┫
; ┃□□□□□□□□□□□□□□□□□□┃
; C0000h ┃□□□Reserved for ROM expansion□□┃
; ┣━━━━━━━━━━━━━━━━━━┫
; ┃□□□□□□□□□□□□□□□□□□┃ B8000h ← gs
; A0000h ┃□□□Display adapter reserved□□□┃
; ┣━━━━━━━━━━━━━━━━━━┫
; ┃□□□□□□□□□□□□□□□□□□┃
; 9FC00h ┃□□extended BIOS data area (EBDA)□┃
; ┣━━━━━━━━━━━━━━━━━━┫
; ┃■■■■■■■■■■■■■■■■■■┃
; 90000h ┃■■■■■■■LOADER.BIN■■■■■■┃ somewhere in LOADER ← esp
; ┣━━━━━━━━━━━━━━━━━━┫
; ┃■■■■■■■■■■■■■■■■■■┃
; 80000h ┃■■■■■■■KERNEL.BIN■■■■■■┃
; ┣━━━━━━━━━━━━━━━━━━┫
; ┃■■■■■■■■■■■■■■■■■■┃
; 30000h ┃■■■■■■■■KERNEL■■■■■■■┃ 30400h ← KERNEL 入口 (KernelEntryPointPhyAddr)
; ┣━━━━━━━━━━━━━━━━━━┫
; ┃ ┃
; 7E00h ┃ F R E E ┃
; ┣━━━━━━━━━━━━━━━━━━┫
; ┃■■■■■■■■■■■■■■■■■■┃
; 7C00h ┃■■■■■■BOOT SECTOR■■■■■■┃
; ┣━━━━━━━━━━━━━━━━━━┫
; ┃ ┃
; 500h ┃ F R E E ┃
; ┣━━━━━━━━━━━━━━━━━━┫
; ┃□□□□□□□□□□□□□□□□□□┃
; 400h ┃□□□□ROM BIOS parameter area □□┃
; ┣━━━━━━━━━━━━━━━━━━┫
; ┃◇◇◇◇◇◇◇◇◇◇◇◇◇◇◇◇◇◇┃
; 0h ┃◇◇◇◇◇◇Int Vectors◇◇◇◇◇◇┃
; ┗━━━━━━━━━━━━━━━━━━┛ ← cs, ds, es, fs, ss
;
;
; ┏━━━┓ ┏━━━┓
; ┃■■■┃ 我们使用 ┃□□□┃ 不能使用的内存
; ┗━━━┛ ┗━━━┛
; ┏━━━┓ ┏━━━┓
; ┃ ┃ 未使用空间 ┃◇◇◇┃ 可以覆盖的内存
; ┗━━━┛ ┗━━━┛
;
; 注：KERNEL 的位置实际上是很灵活的，可以通过同时改变 LOAD.INC 中的
; KernelEntryPointPhyAddr 和 MAKEFILE 中参数 -Ttext 的值来改变。
; 比如把 KernelEntryPointPhyAddr 和 -Ttext 的值都改为 0x400400，
; 则 KERNEL 就会被加载到内存 0x400000(4M) 处，入口在 0x400400。
;
; ------------------------------------------------------------------------
; 显示 AL 中的数字
; ------------------------------------------------------------------------
DispAL:
push ecx
push edx
push edi
mov edi, [dwDispPos]
mov ah, 0Fh ; 0000b: 黑底 1111b: 白字
mov dl, al
shr al, 4
mov ecx, 2
.begin:
and al, 01111b
cmp al, 9
ja .1
add al, '0'
jmp .2
.1:
sub al, 0Ah
add al, 'A'
.2:
mov [gs:edi], ax
add edi, 2
mov al, dl
loop .begin
mov [dwDispPos], edi
pop edi
pop edx
pop ecx
ret
; DispAL 结束-------------------------------------------------------------
; ------------------------------------------------------------------------
; 显示一个整形数
; ------------------------------------------------------------------------
DispInt:
mov eax, [esp + 4]
shr eax, 24
call DispAL
mov eax, [esp + 4]
shr eax, 16
call DispAL
mov eax, [esp + 4]
shr eax, 8
call DispAL
mov eax, [esp + 4]
call DispAL
mov ah, 07h ; 0000b: 黑底 0111b: 灰字
mov al, 'h'
push edi
mov edi, [dwDispPos]
mov [gs:edi], ax
add edi, 4
mov [dwDispPos], edi
pop edi
ret
; DispInt 结束------------------------------------------------------------
; ------------------------------------------------------------------------
; 显示一个字符串
; ------------------------------------------------------------------------
DispStr:
push ebp
mov ebp, esp
push ebx
push esi
push edi
mov esi, [ebp + 8] ; pszInfo
mov edi, [dwDispPos]
mov ah, 0Fh
.1:
lodsb
test al, al
jz .2
cmp al, 0Ah ; 是回车吗?
jnz .3
push eax
mov eax, edi
mov bl, 160
div bl
and eax, 0FFh
inc eax
mov bl, 160
mul bl
mov edi, eax
pop eax
jmp .1
.3:
mov [gs:edi], ax
add edi, 2
jmp .1
.2:
mov [dwDispPos], edi
pop edi
pop esi
pop ebx
pop ebp
ret
; DispStr 结束------------------------------------------------------------
; ------------------------------------------------------------------------
; 换行
; ------------------------------------------------------------------------
DispReturn:
push szReturn
call DispStr ;printf("\n");
add esp, 4
ret
; DispReturn 结束---------------------------------------------------------
; ------------------------------------------------------------------------
; 内存拷贝，仿 memcpy
; ------------------------------------------------------------------------
; void* MemCpy(void* es:pDest, void* ds:pSrc, int iSize);
; ------------------------------------------------------------------------
MemCpy:
push ebp
mov ebp, esp
push esi
push edi
push ecx
mov edi, [ebp + 8] ; Destination
mov esi, [ebp + 12] ; Source
mov ecx, [ebp + 16] ; Counter
.1:
cmp ecx, 0 ; 判断计数器
jz .2 ; 计数器为零时跳出
mov al, [ds:esi] ; ┓
inc esi ; ┃
; ┣ 逐字节移动
mov byte [es:edi], al ; ┃
inc edi ; ┛
dec ecx ; 计数器减一
jmp .1 ; 循环
.2:
mov eax, [ebp + 8] ; 返回值
pop ecx
pop edi
pop esi
mov esp, ebp
pop ebp
ret ; 函数结束，返回
; MemCpy 结束-------------------------------------------------------------
; 显示内存信息 --------------------------------------------------------------
DispMemInfo:
push esi
push edi
push ecx
mov esi, MemChkBuf
mov ecx, [dwMCRNumber] ;for(int i=0;i<[MCRNumber];i++) // 每次得到一个ARDS(Address Range Descriptor Structure)结构
.loop: ;{
mov edx, 5 ; for(int j=0;j<5;j++) // 每次得到一个ARDS中的成员，共5个成员
mov edi, ARDStruct ; { // 依次显示：BaseAddrLow，BaseAddrHigh，LengthLow，LengthHigh，Type
.1: ;
push dword [esi] ;
call DispInt ; DispInt(MemChkBuf[j*4]); // 显示一个成员
pop eax ;
stosd ; ARDStruct[j*4] = MemChkBuf[j*4];
add esi, 4 ;
dec edx ;
cmp edx, 0 ;
jnz .1 ; }
call DispReturn ; printf("\n");
cmp dword [dwType], 1 ; if(Type == AddressRangeMemory) // AddressRangeMemory : 1, AddressRangeReserved : 2
jne .2 ; {
mov eax, [dwBaseAddrLow] ;
add eax, [dwLengthLow] ;
cmp eax, [dwMemSize] ; if(BaseAddrLow + LengthLow > MemSize)
jb .2 ;
mov [dwMemSize], eax ; MemSize = BaseAddrLow + LengthLow;
.2: ; }
loop .loop ;}
;
call DispReturn ;printf("\n");
push szRAMSize ;
call DispStr ;printf("RAM size:");
add esp, 4 ;
;
push dword [dwMemSize] ;
call DispInt ;DispInt(MemSize);
add esp, 4 ;
pop ecx
pop edi
pop esi
ret
; ---------------------------------------------------------------------------
; 启动分页机制 --------------------------------------------------------------
SetupPaging:
; 根据内存大小计算应初始化多少PDE以及多少页表
xor edx, edx
mov eax, [dwMemSize]
mov ebx, 400000h ; 400000h = 4M = 4096 * 1024, 一个页表对应的内存大小
div ebx
mov ecx, eax ; 此时 ecx 为页表的个数，也即 PDE 应该的个数
test edx, edx
jz .no_remainder
inc ecx ; 如果余数不为 0 就需增加一个页表
.no_remainder:
push ecx ; 暂存页表个数
; 为简化处理, 所有线性地址对应相等的物理地址. 并且不考虑内存空洞.
; 首先初始化页目录
mov ax, SelectorFlatRW
mov es, ax
mov edi, PageDirBase ; 此段首地址为 PageDirBase
xor eax, eax
mov eax, PageTblBase | PG_P | PG_USU | PG_RWW
.1:
stosd
add eax, 4096 ; 为了简化, 所有页表在内存中是连续的.
loop .1
; 再初始化所有页表
pop eax ; 页表个数
mov ebx, 1024 ; 每个页表 1024 个 PTE
mul ebx
mov ecx, eax ; PTE个数 = 页表个数 * 1024
mov edi, PageTblBase ; 此段首地址为 PageTblBase
xor eax, eax
mov eax, PG_P | PG_USU | PG_RWW
.2:
stosd
add eax, 4096 ; 每一页指向 4K 的空间
loop .2
mov eax, PageDirBase
mov cr3, eax
mov eax, cr0
or eax, 80000000h
mov cr0, eax
jmp short .3
.3:
nop
ret
; 分页机制启动完毕 ----------------------------------------------------------
; InitKernel ---------------------------------------------------------------------------------
; 将 KERNEL.BIN 的内容经过整理对齐后放到新的位置
; 遍历每一个 Program Header，根据 Program Header 中的信息来确定把什么放进内存，放到什么位置，以及放多少。
; --------------------------------------------------------------------------------------------
InitKernel:
xor esi, esi
mov cx, word [BaseOfKernelFilePhyAddr+2Ch];`. ecx <- pELFHdr->e_phnum
movzx ecx, cx ;/
mov esi, [BaseOfKernelFilePhyAddr + 1Ch] ; esi <- pELFHdr->e_phoff
add esi, BaseOfKernelFilePhyAddr;esi<-OffsetOfKernel+pELFHdr->e_phoff
.Begin:
mov eax, [esi + 0]
cmp eax, 0 ; PT_NULL
jz .NoAction
push dword [esi + 010h] ;size ;`.
mov eax, [esi + 04h] ; |
add eax, BaseOfKernelFilePhyAddr; | memcpy((void*)(pPHdr->p_vaddr),
push eax ;src ; | uchCode + pPHdr->p_offset,
push dword [esi + 08h] ;dst ; | pPHdr->p_filesz;
call MemCpy ; |
add esp, 12 ;/
.NoAction:
add esi, 020h ; esi += pELFHdr->e_phentsize
dec ecx
jnz .Begin
ret
; InitKernel ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
; SECTION .data1 之开始 ---------------------------------------------------------------------------------------------
[SECTION .data1]
ALIGN 32
LABEL_DATA:
; 实模式下使用这些符号
; 字符串
_szMemChkTitle: db "BaseAddrL BaseAddrH LengthLow LengthHigh Type", 0Ah, 0
_szRAMSize: db "RAM size:", 0
_szReturn: db 0Ah, 0
;; 变量
_dwMCRNumber: dd 0 ; Memory Check Result
_dwDispPos: dd (80 * 6 + 0) * 2 ; 屏幕第 6 行, 第 0 列。
_dwMemSize: dd 0
_ARDStruct: ; Address Range Descriptor Structure
_dwBaseAddrLow: dd 0
_dwBaseAddrHigh: dd 0
_dwLengthLow: dd 0
_dwLengthHigh: dd 0
_dwType: dd 0
_MemChkBuf: times 256 db 0
;
;; 保护模式下使用这些符号
szMemChkTitle equ BaseOfLoaderPhyAddr + _szMemChkTitle
szRAMSize equ BaseOfLoaderPhyAddr + _szRAMSize
szReturn equ BaseOfLoaderPhyAddr + _szReturn
dwDispPos equ BaseOfLoaderPhyAddr + _dwDispPos
dwMemSize equ BaseOfLoaderPhyAddr + _dwMemSize
dwMCRNumber equ BaseOfLoaderPhyAddr + _dwMCRNumber
ARDStruct equ BaseOfLoaderPhyAddr + _ARDStruct
dwBaseAddrLow equ BaseOfLoaderPhyAddr + _dwBaseAddrLow
dwBaseAddrHigh equ BaseOfLoaderPhyAddr + _dwBaseAddrHigh
dwLengthLow equ BaseOfLoaderPhyAddr + _dwLengthLow
dwLengthHigh equ BaseOfLoaderPhyAddr + _dwLengthHigh
dwType equ BaseOfLoaderPhyAddr + _dwType
MemChkBuf equ BaseOfLoaderPhyAddr + _MemChkBuf
; 堆栈就在数据段的末尾
StackSpace: times 1000h db 0
TopOfStack equ BaseOfLoaderPhyAddr + $ ; 栈顶
; SECTION .data1 之结束 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
; A165188: Interleaving of A014125 and zero followed by A014125.
; 1,0,3,1,6,3,11,6,18,11,27,18,39,27,54,39,72,54,94,72,120,94,150,120,185,150,225,185,270,225,321,270,378,321,441,378,511,441,588,511,672,588,764,672,864,764,972,864,1089,972,1215,1089,1350,1215,1495,1350
add $0,1
lpb $0
mov $2,$0
trn $0,2
seq $2,114209 ; Number of permutations of [n] having exactly two fixed points and avoiding the patterns 123 and 231.
add $1,$2
lpe
mov $0,$1
|
#include <iostream>
#include <fstream>
#include <string>
#include <cmath>
#include <stdio.h>
#include <stdlib.h>
using namespace std;
class poly{
public:
int deg;
double* coef;
poly();//default constructor
poly(int,double*);//constructor 1
poly(int);//constructor 2
~poly () { //destructor
}
double eval(double point) { //evaluating the polynomial for a point
double sum=0;
for(int i=deg;i>=0;i--) {
sum += (pow(point,i)*(coef[i])); //summing of terms of all degrees
}
return sum;
}
void bisection(double x1,double x2,double tol){//Applying bisection algorithm
int iterationnum=0;
double x0;
double g1=x1;//assigning given guesses to variables in order to keep them unchanged.
double g2=x2;
while (fabs(g2-g1) > tol)
{
x0 = g1+(g2-g1)/2; // Finding middle point
if (eval(x0) == 0)// Checking if middle point is root
break;
else if (eval(x0)*eval(g1) < 0)// Decide the side to repeat the steps
g2 = x0;
else
g1 = x0;
iterationnum++;//updating the number of iteration.
}
cout << "Bisecetion Method - The value of root is : " <<x0<< endl;
cout << "Bisecetion Method - # of iterations : "<<iterationnum<<endl;
}
void secant(double x1, double x2, double tol)//applying secant method
{
double g1;
double g2=x1;
double iterationnum = 0;
double x0=x2;
do {
g1 = g2;//Assigning given guesses to variables in order to keep them unchanged.
g2 = x0;
x0=g2-eval(g2)*(g2-g1)/(eval(g2)-eval(g1));// calculating the intermediate value
iterationnum++;// updating number of iteration
if (eval(x0) == 0)// if x0 is the root of equation then break the loop
break;
} while (fabs(g2 - x0) > tol); // repeat the loop until the convergence
cout << "Secant Method - The value of root is : " << x0 << endl;
cout << "Secant Method - # of iterations = " << iterationnum << endl;
}
void hybrid(double x1, double x2, double tol){//applying hybrid method
double x0;
double g1=x1;//assigning given guesses to variables in order to keep them unchanged
double g2=x2;
double temp;
double iterationnum=0;
for(int i=0; i<2;i++){//applying bisection method for first 2 iterations
x0 = g1+(g2-g1)/2;
if (eval(x0)==0||g2-g1<=tol){//breaking loop if it converges or middle point is a root of equation.
cout << "Hybrid Method - The value of root is : " << x0 << endl;
cout << "Hybrid Method - # of iterations = " << iterationnum << endl;
break;
}
// Decide the side to repeat the steps
else if (eval(x0)*eval(g1) < 0)
g2 = x0;
else
g1 = x0;
iterationnum++;
}
while (1){
x0=g2-eval(g2)*(g2-g1)/(eval(g2)-eval(g1));//finding the intermadiate value
iterationnum++;
if (eval(x0) == 0||fabs(g2-x0)<=tol){//breaking the loop if it converges or x0 is a root of equation.
cout << "Hybrid Method - The value of root is : " << x0 << endl;
cout << "Hybrid Method - # of iterations = " << iterationnum << endl;
break;
}
temp=g2;//using temp variable to update values.
g2=x0;
g1=temp;
}
}};
poly::poly(int d, double *c){//construct decleration, if we have degree and coefficients both.
deg=d;
coef=new double[deg+1];//creating a dynamic array to store coefficients, note that we also need to consider 0th degree.
coef=c;
}
poly::poly(int d){//construct decleration, if we only have degree.
deg=d;
coef=new double[deg+1];
}
int main(int argc, char** argv) {
if(argc <5) { //error check mechanism for insufficient command line arguments
cout<<"Error-Insuffient argument!"<<endl;
return 0;
}
if (argc == 5) { //error check mechanism for 0th degree constant polynomials
cout<<"Error-Polynomial is 0th degree, i.e. have no roots!"<<endl;
return 0;
}
poly x(argc-5);//creating a polynomial with proper degree, -5 is beceause of given guesses, tolerance, and effect of 0th degree coefficient.
for(int i=0;i<=(argc-5);i++) {
x.coef[(argc-5)-i]=atof(argv[i+1]);//assigning coefficients to respective degrees.
}
double tol=atof(argv[argc-1]);//converting and assigning.
double g1=atof(argv[argc-3]);//converting and assigning.
double g2=atof(argv[argc-2]);//converting and assigning.
x.bisection(g1,g2,tol);
x.secant(g1,g2,tol);
x.hybrid(g1,g2,tol);
return 0;
}
|
#include <bits/stdc++.h>
using namespace std;
struct Node
{
int data;
struct Node *left, *right;
};
Node *newNode(int data)
{
Node *new_node = new Node;
new_node->data = data;
new_node->left = new_node->right = NULL;
return new_node;
}
/* Given a binary tree, print its nodes in inorder*/
void inorder(Node * node)
{
if (!node)
return;
inorder(node->left);
printf("%d ", node->data);
inorder(node->right);
}
/* Function to merge given two binary trees*/
Node *MergeTrees(Node * t1, Node * t2)
{
if (!t1)
return t2;
if (!t2)
return t1;
t1->data += t2->data;
t1->left = MergeTrees(t1->left, t2->left);
t1->right = MergeTrees(t1->right, t2->right);
return t1;
}
// Driver code
int main()
{
Node *root1 = newNode(1);
root1->left = newNode(2);
root1->right = newNode(3);
root1->left->left = newNode(4);
root1->left->right = newNode(5);
root1->right->right = newNode(6);
Node *root2 = newNode(4);
root2->left = newNode(1);
root2->right = newNode(7);
root2->left->left = newNode(3);
root2->right->left = newNode(2);
root2->right->right = newNode(6);
Node *root3 = MergeTrees(root1, root2);
printf("The Merged Binary Tree is:\n");
inorder(root3);
return 0;
} |
; WMAN data and configuration v1.00 2003 Marcel Kilgus
; 24-06-2003 1.01 d0 test added at end (wl)
; 28.04.2013 1.02 added config item for alpha blending when moving
xdef wm_initdata
xref wm_initsp
xref gu_achpp
include 'dev8_keys_wman_data'
include 'dev8_keys_qdos_sms'
include 'dev8_keys_con'
include 'dev8_keys_sys'
include 'dev8_mac_config02'
section wman
wcf_move dc.b 0,0
wcf_alph dc.b 128,0
dc.w 0
xref.l wm_vers
mkcfhead {WMAN},{wm_vers}
mkcfitem 'WMMV',code,'V',wcf_move,,,\
{Move window operation} \
0,S,{Sprite},1,O,{Outline},2,W,{Window},3,T,{Transparent Window}
mkcfitem 'WMAB',byte,'A',wcf_alph,,,\
{Alpha value for move window operation},1,$ff
mkcfend
dc.w 0
;+++
; Initialise WMAN data space
;---
wm_initdata
movem.l d1-d3/a0/a5-a6,-(sp)
moveq #sms.info,d0
trap #1
move.l sys_clnk(a0),a6 ; CON linkage
moveq #wd_end,d0 ; size of WMAN data block
jsr gu_achpp
bne.s wid_rts
move.l a0,pt_wdata(a6) ; save ptr to block
move.l a0,a5
lea wcf_move,a0 ; copy config data
move.b (a0),wd_movemd(a5)
lea wcf_alph,a0 ; copy config data
move.b (a0),wd_alpha(a5)
jsr wm_initsp ; allocate and initialise system palette
bne.s wid_rts
move.l a0,wd_syspal(a5); this sets NZ on goldcard!
wid_rts
movem.l (sp)+,d1-d3/a0/a5-a6
tst.l d0
rts
end
|
; A305062: a(n) = 96*2^n + 80.
; 176,272,464,848,1616,3152,6224,12368,24656,49232,98384,196688,393296,786512,1572944,3145808,6291536,12582992,25165904,50331728,100663376,201326672,402653264,805306448,1610612816,3221225552,6442451024,12884901968,25769803856,51539607632,103079215184,206158430288,412316860496,824633720912,1649267441744
mov $1,2
pow $1,$0
sub $1,1
mul $1,96
add $1,176
|
#include "TransformRF32.h"
#include <stdio.h>
#include "Error.h"
#include "Test.h"
#define SNR_THRESHOLD 120
void TransformRF32::test_rfft_f32()
{
float32_t *inp = input.ptr();
float32_t *tmp = inputchanged.ptr();
float32_t *outp = outputfft.ptr();
memcpy(tmp,inp,sizeof(float32_t)*input.nbSamples());
arm_rfft_fast_f32(
&this->instRfftF32,
tmp,
outp,
this->ifft);
ASSERT_SNR(outputfft,ref,(float32_t)SNR_THRESHOLD);
ASSERT_EMPTY_TAIL(outputfft);
}
void TransformRF32::setUp(Testing::testID_t id,std::vector<Testing::param_t>& paramsArgs,Client::PatternMgr *mgr)
{
(void)paramsArgs;
switch(id)
{
case TransformRF32::TEST_RFFT_F32_1:
input.reload(TransformRF32::INPUTS_RFFT_NOISY_32_F32_ID,mgr);
ref.reload( TransformRF32::REF_RFFT_NOISY_32_F32_ID,mgr);
arm_rfft_fast_init_f32(&this->instRfftF32 ,32);
inputchanged.create(input.nbSamples(),TransformRF32::TEMP_F32_ID,mgr);
this->ifft=0;
break;
case TransformRF32::TEST_RFFT_F32_17:
input.reload(TransformRF32::INPUTS_RIFFT_NOISY_32_F32_ID,mgr);
ref.reload( TransformRF32::INPUTS_RFFT_NOISY_32_F32_ID,mgr);
arm_rfft_fast_init_f32(&this->instRfftF32 ,32);
inputchanged.create(input.nbSamples(),TransformRF32::TEMP_F32_ID,mgr);
this->ifft=1;
break;
case TransformRF32::TEST_RFFT_F32_2:
input.reload(TransformRF32::INPUTS_RFFT_NOISY_64_F32_ID,mgr);
ref.reload( TransformRF32::REF_RFFT_NOISY_64_F32_ID,mgr);
arm_rfft_fast_init_f32(&this->instRfftF32 ,64);
inputchanged.create(input.nbSamples(),TransformRF32::TEMP_F32_ID,mgr);
this->ifft=0;
break;
case TransformRF32::TEST_RFFT_F32_18:
input.reload(TransformRF32::INPUTS_RIFFT_NOISY_64_F32_ID,mgr);
ref.reload( TransformRF32::INPUTS_RFFT_NOISY_64_F32_ID,mgr);
arm_rfft_fast_init_f32(&this->instRfftF32 ,64);
inputchanged.create(input.nbSamples(),TransformRF32::TEMP_F32_ID,mgr);
this->ifft=1;
break;
case TransformRF32::TEST_RFFT_F32_3:
input.reload(TransformRF32::INPUTS_RFFT_NOISY_128_F32_ID,mgr);
ref.reload( TransformRF32::REF_RFFT_NOISY_128_F32_ID,mgr);
arm_rfft_fast_init_f32(&this->instRfftF32 ,128);
inputchanged.create(input.nbSamples(),TransformRF32::TEMP_F32_ID,mgr);
this->ifft=0;
break;
case TransformRF32::TEST_RFFT_F32_19:
input.reload(TransformRF32::INPUTS_RIFFT_NOISY_128_F32_ID,mgr);
ref.reload( TransformRF32::INPUTS_RFFT_NOISY_128_F32_ID,mgr);
arm_rfft_fast_init_f32(&this->instRfftF32 ,128);
inputchanged.create(input.nbSamples(),TransformRF32::TEMP_F32_ID,mgr);
this->ifft=1;
break;
case TransformRF32::TEST_RFFT_F32_4:
input.reload(TransformRF32::INPUTS_RFFT_NOISY_256_F32_ID,mgr);
ref.reload( TransformRF32::REF_RFFT_NOISY_256_F32_ID,mgr);
arm_rfft_fast_init_f32(&this->instRfftF32 ,256);
inputchanged.create(input.nbSamples(),TransformRF32::TEMP_F32_ID,mgr);
this->ifft=0;
break;
case TransformRF32::TEST_RFFT_F32_20:
input.reload(TransformRF32::INPUTS_RIFFT_NOISY_256_F32_ID,mgr);
ref.reload( TransformRF32::INPUTS_RFFT_NOISY_256_F32_ID,mgr);
arm_rfft_fast_init_f32(&this->instRfftF32 ,256);
inputchanged.create(input.nbSamples(),TransformRF32::TEMP_F32_ID,mgr);
this->ifft=1;
break;
case TransformRF32::TEST_RFFT_F32_5:
input.reload(TransformRF32::INPUTS_RFFT_NOISY_512_F32_ID,mgr);
ref.reload( TransformRF32::REF_RFFT_NOISY_512_F32_ID,mgr);
arm_rfft_fast_init_f32(&this->instRfftF32 ,512);
inputchanged.create(input.nbSamples(),TransformRF32::TEMP_F32_ID,mgr);
this->ifft=0;
break;
case TransformRF32::TEST_RFFT_F32_21:
input.reload(TransformRF32::INPUTS_RIFFT_NOISY_512_F32_ID,mgr);
ref.reload( TransformRF32::INPUTS_RFFT_NOISY_512_F32_ID,mgr);
arm_rfft_fast_init_f32(&this->instRfftF32 ,512);
inputchanged.create(input.nbSamples(),TransformRF32::TEMP_F32_ID,mgr);
this->ifft=1;
break;
case TransformRF32::TEST_RFFT_F32_6:
input.reload(TransformRF32::INPUTS_RFFT_NOISY_1024_F32_ID,mgr);
ref.reload( TransformRF32::REF_RFFT_NOISY_1024_F32_ID,mgr);
arm_rfft_fast_init_f32(&this->instRfftF32 ,1024);
inputchanged.create(input.nbSamples(),TransformRF32::TEMP_F32_ID,mgr);
this->ifft=0;
break;
case TransformRF32::TEST_RFFT_F32_22:
input.reload(TransformRF32::INPUTS_RIFFT_NOISY_1024_F32_ID,mgr);
ref.reload( TransformRF32::INPUTS_RFFT_NOISY_1024_F32_ID,mgr);
arm_rfft_fast_init_f32(&this->instRfftF32 ,1024);
inputchanged.create(input.nbSamples(),TransformRF32::TEMP_F32_ID,mgr);
this->ifft=1;
break;
case TransformRF32::TEST_RFFT_F32_7:
input.reload(TransformRF32::INPUTS_RFFT_NOISY_2048_F32_ID,mgr);
ref.reload( TransformRF32::REF_RFFT_NOISY_2048_F32_ID,mgr);
arm_rfft_fast_init_f32(&this->instRfftF32 ,2048);
inputchanged.create(input.nbSamples(),TransformRF32::TEMP_F32_ID,mgr);
this->ifft=0;
break;
case TransformRF32::TEST_RFFT_F32_23:
input.reload(TransformRF32::INPUTS_RIFFT_NOISY_2048_F32_ID,mgr);
ref.reload( TransformRF32::INPUTS_RFFT_NOISY_2048_F32_ID,mgr);
arm_rfft_fast_init_f32(&this->instRfftF32 ,2048);
inputchanged.create(input.nbSamples(),TransformRF32::TEMP_F32_ID,mgr);
this->ifft=1;
break;
case TransformRF32::TEST_RFFT_F32_8:
input.reload(TransformRF32::INPUTS_RFFT_NOISY_4096_F32_ID,mgr);
ref.reload( TransformRF32::REF_RFFT_NOISY_4096_F32_ID,mgr);
arm_rfft_fast_init_f32(&this->instRfftF32 ,4096);
inputchanged.create(input.nbSamples(),TransformRF32::TEMP_F32_ID,mgr);
this->ifft=0;
break;
case TransformRF32::TEST_RFFT_F32_24:
input.reload(TransformRF32::INPUTS_RIFFT_NOISY_4096_F32_ID,mgr);
ref.reload( TransformRF32::INPUTS_RFFT_NOISY_4096_F32_ID,mgr);
arm_rfft_fast_init_f32(&this->instRfftF32 ,4096);
inputchanged.create(input.nbSamples(),TransformRF32::TEMP_F32_ID,mgr);
this->ifft=1;
break;
/* STEP FUNCTIONS */
case TransformRF32::TEST_RFFT_F32_9:
input.reload(TransformRF32::INPUTS_RFFT_STEP_32_F32_ID,mgr);
ref.reload( TransformRF32::REF_RFFT_STEP_32_F32_ID,mgr);
arm_rfft_fast_init_f32(&this->instRfftF32 ,32);
inputchanged.create(input.nbSamples(),TransformRF32::TEMP_F32_ID,mgr);
this->ifft=0;
break;
case TransformRF32::TEST_RFFT_F32_25:
input.reload(TransformRF32::INPUTS_RIFFT_STEP_32_F32_ID,mgr);
ref.reload( TransformRF32::INPUTS_RFFT_STEP_32_F32_ID,mgr);
arm_rfft_fast_init_f32(&this->instRfftF32 ,32);
inputchanged.create(input.nbSamples(),TransformRF32::TEMP_F32_ID,mgr);
this->ifft=1;
break;
case TransformRF32::TEST_RFFT_F32_10:
input.reload(TransformRF32::INPUTS_RFFT_STEP_64_F32_ID,mgr);
ref.reload( TransformRF32::REF_RFFT_STEP_64_F32_ID,mgr);
arm_rfft_fast_init_f32(&this->instRfftF32 ,64);
inputchanged.create(input.nbSamples(),TransformRF32::TEMP_F32_ID,mgr);
this->ifft=0;
break;
case TransformRF32::TEST_RFFT_F32_26:
input.reload(TransformRF32::INPUTS_RIFFT_STEP_64_F32_ID,mgr);
ref.reload( TransformRF32::INPUTS_RFFT_STEP_64_F32_ID,mgr);
arm_rfft_fast_init_f32(&this->instRfftF32 ,64);
inputchanged.create(input.nbSamples(),TransformRF32::TEMP_F32_ID,mgr);
this->ifft=1;
break;
case TransformRF32::TEST_RFFT_F32_11:
input.reload(TransformRF32::INPUTS_RFFT_STEP_128_F32_ID,mgr);
ref.reload( TransformRF32::REF_RFFT_STEP_128_F32_ID,mgr);
arm_rfft_fast_init_f32(&this->instRfftF32 ,128);
inputchanged.create(input.nbSamples(),TransformRF32::TEMP_F32_ID,mgr);
this->ifft=0;
break;
case TransformRF32::TEST_RFFT_F32_27:
input.reload(TransformRF32::INPUTS_RIFFT_STEP_128_F32_ID,mgr);
ref.reload( TransformRF32::INPUTS_RFFT_STEP_128_F32_ID,mgr);
arm_rfft_fast_init_f32(&this->instRfftF32 ,128);
inputchanged.create(input.nbSamples(),TransformRF32::TEMP_F32_ID,mgr);
this->ifft=1;
break;
case TransformRF32::TEST_RFFT_F32_12:
input.reload(TransformRF32::INPUTS_RFFT_STEP_256_F32_ID,mgr);
ref.reload( TransformRF32::REF_RFFT_STEP_256_F32_ID,mgr);
arm_rfft_fast_init_f32(&this->instRfftF32 ,256);
inputchanged.create(input.nbSamples(),TransformRF32::TEMP_F32_ID,mgr);
this->ifft=0;
break;
case TransformRF32::TEST_RFFT_F32_28:
input.reload(TransformRF32::INPUTS_RIFFT_STEP_256_F32_ID,mgr);
ref.reload( TransformRF32::INPUTS_RFFT_STEP_256_F32_ID,mgr);
arm_rfft_fast_init_f32(&this->instRfftF32 ,256);
inputchanged.create(input.nbSamples(),TransformRF32::TEMP_F32_ID,mgr);
this->ifft=1;
break;
case TransformRF32::TEST_RFFT_F32_13:
input.reload(TransformRF32::INPUTS_RFFT_STEP_512_F32_ID,mgr);
ref.reload( TransformRF32::REF_RFFT_STEP_512_F32_ID,mgr);
arm_rfft_fast_init_f32(&this->instRfftF32 ,512);
inputchanged.create(input.nbSamples(),TransformRF32::TEMP_F32_ID,mgr);
this->ifft=0;
break;
case TransformRF32::TEST_RFFT_F32_29:
input.reload(TransformRF32::INPUTS_RIFFT_STEP_512_F32_ID,mgr);
ref.reload( TransformRF32::INPUTS_RFFT_STEP_512_F32_ID,mgr);
arm_rfft_fast_init_f32(&this->instRfftF32 ,512);
inputchanged.create(input.nbSamples(),TransformRF32::TEMP_F32_ID,mgr);
this->ifft=1;
break;
case TransformRF32::TEST_RFFT_F32_14:
input.reload(TransformRF32::INPUTS_RFFT_STEP_1024_F32_ID,mgr);
ref.reload( TransformRF32::REF_RFFT_STEP_1024_F32_ID,mgr);
arm_rfft_fast_init_f32(&this->instRfftF32 ,1024);
inputchanged.create(input.nbSamples(),TransformRF32::TEMP_F32_ID,mgr);
this->ifft=0;
break;
case TransformRF32::TEST_RFFT_F32_30:
input.reload(TransformRF32::INPUTS_RIFFT_STEP_1024_F32_ID,mgr);
ref.reload( TransformRF32::INPUTS_RFFT_STEP_1024_F32_ID,mgr);
arm_rfft_fast_init_f32(&this->instRfftF32 ,1024);
inputchanged.create(input.nbSamples(),TransformRF32::TEMP_F32_ID,mgr);
this->ifft=1;
break;
case TransformRF32::TEST_RFFT_F32_15:
input.reload(TransformRF32::INPUTS_RFFT_STEP_2048_F32_ID,mgr);
ref.reload( TransformRF32::REF_RFFT_STEP_2048_F32_ID,mgr);
arm_rfft_fast_init_f32(&this->instRfftF32 ,2048);
inputchanged.create(input.nbSamples(),TransformRF32::TEMP_F32_ID,mgr);
this->ifft=0;
break;
case TransformRF32::TEST_RFFT_F32_31:
input.reload(TransformRF32::INPUTS_RIFFT_STEP_2048_F32_ID,mgr);
ref.reload( TransformRF32::INPUTS_RFFT_STEP_2048_F32_ID,mgr);
arm_rfft_fast_init_f32(&this->instRfftF32 ,2048);
inputchanged.create(input.nbSamples(),TransformRF32::TEMP_F32_ID,mgr);
this->ifft=1;
break;
case TransformRF32::TEST_RFFT_F32_16:
input.reload(TransformRF32::INPUTS_RFFT_STEP_4096_F32_ID,mgr);
ref.reload( TransformRF32::REF_RFFT_STEP_4096_F32_ID,mgr);
arm_rfft_fast_init_f32(&this->instRfftF32 ,4096);
inputchanged.create(input.nbSamples(),TransformRF32::TEMP_F32_ID,mgr);
this->ifft=0;
break;
case TransformRF32::TEST_RFFT_F32_32:
input.reload(TransformRF32::INPUTS_RIFFT_STEP_4096_F32_ID,mgr);
ref.reload( TransformRF32::INPUTS_RFFT_STEP_4096_F32_ID,mgr);
arm_rfft_fast_init_f32(&this->instRfftF32 ,4096);
inputchanged.create(input.nbSamples(),TransformRF32::TEMP_F32_ID,mgr);
this->ifft=1;
break;
}
outputfft.create(ref.nbSamples(),TransformRF32::OUTPUT_RFFT_F32_ID,mgr);
}
void TransformRF32::tearDown(Testing::testID_t id,Client::PatternMgr *mgr)
{
(void)id;
outputfft.dump(mgr);
}
|
; A010785: Repdigit numbers, or numbers with repeated digits.
; 0,1,2,3,4,5,6,7,8,9,11,22,33,44,55,66,77,88,99,111,222,333,444,555,666,777,888,999,1111,2222,3333,4444,5555,6666,7777,8888,9999,11111,22222,33333,44444,55555,66666,77777,88888,99999,111111,222222,333333,444444,555555,666666,777777,888888,999999,1111111,2222222,3333333,4444444,5555555,6666666,7777777,8888888,9999999,11111111,22222222,33333333,44444444,55555555,66666666,77777777,88888888,99999999,111111111,222222222,333333333,444444444,555555555,666666666,777777777,888888888,999999999,1111111111
lpb $0
sub $0,1
mov $2,$0
trn $0,8
max $2,0
seq $2,51596 ; Numerical values or Gematriahs of Hebrew letters {aleph, bet, ..., tav}.
add $1,$2
lpe
mov $0,$1
|
;sequence
loop
dw ptn0
dw ptn2
dw ptn1
dw ptn2
dw ptn3
dw ptn4
dw ptn5
dw ptn4
dw ptn6
dw ptn7
dw ptn8
dw ptn7
dw ptn9
dw 0
;pattern data
ptn0
dw instr0*256+#5,#4000,#0,#0,instr13*256+instr0
dw instr0*256+#5,#0,#0,#0,instr0*256+instr0
dw instr0*256+#5,#0,#0,#0,instr0*256+instr0
dw instr0*256+#5,#4000,#0,#0,instr13*256+instr0
dw instr0*256+#5,#bfc9,#0,#0,instr2*256+instr0
dw instr0*256+#5,#0,#0,#0,instr0*256+instr0
dw instr0*256+#5,#4000,#0,#0,instr13*256+instr0
dw instr0*256+#5,#4000,#0,#0,instr13*256+instr0
dw instr0*256+#5,#4000,#0,#0,instr13*256+instr0
dw instr0*256+#5,#0,#0,#0,instr0*256+instr0
dw instr0*256+#5,#0,#0,#0,instr0*256+instr0
dw instr0*256+#5,#4000,#0,#0,instr13*256+instr0
dw instr0*256+#5,#bfc9,#0,#0,instr2*256+instr0
dw instr0*256+#5,#4000,#0,#0,instr13*256+instr0
dw instr0*256+#5,#0,#0,#0,instr0*256+instr0
dw instr0*256+#5,#0,#0,#0,instr0*256+instr0
dw instr0*256+#5,#4000,#0,#0,instr13*256+instr0
dw instr0*256+#5,#0,#0,#0,instr0*256+instr0
dw instr0*256+#5,#0,#0,#0,instr0*256+instr0
dw instr0*256+#5,#4000,#0,#0,instr13*256+instr0
dw instr0*256+#5,#bfc9,#0,#0,instr2*256+instr0
dw instr0*256+#5,#0,#0,#0,instr0*256+instr0
dw instr0*256+#5,#4000,#0,#0,instr13*256+instr0
dw instr0*256+#5,#4000,#0,#0,instr13*256+instr0
dw instr0*256+#5,#4000,#0,#0,instr13*256+instr0
dw instr0*256+#5,#0,#0,#0,instr0*256+instr0
dw instr0*256+#5,#0,#0,#0,instr0*256+instr0
dw instr0*256+#5,#4000,#0,#0,instr13*256+instr0
dw instr0*256+#5,#bfc9,#0,#0,instr2*256+instr0
dw instr0*256+#5,#0,#0,#0,instr0*256+instr0
dw instr0*256+#5,#0,#0,#0,instr0*256+instr0
dw instr0*256+#5,#f1a2,#0,#0,instr13*256+instr0
db #00
ptn1
dw instr0*256+#5,#4000,#1429,#0,instr13*256+instr3
dw instr0*256+#5,#0,#1429,#0,instr0*256+instr3
dw instr0*256+#5,#0,#2851,#0,instr0*256+instr3
dw instr0*256+#5,#4000,#2ff2,#0,instr13*256+instr3
dw instr0*256+#5,#bfc9,#1429,#0,instr2*256+instr3
dw instr0*256+#5,#0,#1429,#0,instr0*256+instr3
dw instr0*256+#5,#4000,#1429,#0,instr13*256+instr3
dw instr0*256+#5,#4000,#1429,#0,instr13*256+instr3
dw instr0*256+#5,#4000,#1429,#0,instr13*256+instr3
dw instr0*256+#5,#0,#1429,#0,instr0*256+instr3
dw instr0*256+#5,#0,#1429,#0,instr0*256+instr3
dw instr0*256+#5,#4000,#1429,#0,instr13*256+instr3
dw instr0*256+#5,#bfc9,#11f6,#0,instr2*256+instr3
dw instr0*256+#5,#4000,#11f6,#0,instr13*256+instr3
dw instr0*256+#5,#0,#11f6,#0,instr0*256+instr3
dw instr0*256+#5,#0,#11f6,#0,instr0*256+instr3
dw instr0*256+#5,#4000,#1429,#0,instr13*256+instr3
dw instr0*256+#5,#0,#1429,#0,instr0*256+instr3
dw instr0*256+#5,#0,#2851,#0,instr0*256+instr3
dw instr0*256+#5,#4000,#2ff2,#0,instr13*256+instr3
dw instr0*256+#5,#bfc9,#1429,#0,instr2*256+instr3
dw instr0*256+#5,#0,#1429,#0,instr0*256+instr3
dw instr0*256+#5,#4000,#1429,#0,instr13*256+instr3
dw instr0*256+#5,#4000,#1429,#0,instr13*256+instr3
dw instr0*256+#5,#4000,#1429,#0,instr13*256+instr3
dw instr0*256+#5,#0,#1429,#0,instr0*256+instr3
dw instr0*256+#5,#0,#1429,#0,instr0*256+instr3
dw instr0*256+#5,#4000,#1429,#0,instr13*256+instr3
dw instr3*256+#5,#bfc9,#3c68,#5fe4,instr2*256+instr3
dw instr3*256+#5,#0,#3c68,#5fe4,instr0*256+instr3
dw instr3*256+#5,#0,#3c68,#5fe4,instr0*256+instr3
dw instr0*256+#5,#f1a2,#0,#0,instr13*256+instr0
db #00
ptn2
dw instr0*256+#5,#4000,#1429,#0,instr13*256+instr3
dw instr0*256+#5,#0,#1429,#0,instr0*256+instr3
dw instr0*256+#5,#0,#2851,#0,instr0*256+instr3
dw instr0*256+#5,#4000,#2ff2,#0,instr13*256+instr3
dw instr0*256+#5,#bfc9,#1429,#0,instr2*256+instr3
dw instr0*256+#5,#0,#1429,#0,instr0*256+instr3
dw instr0*256+#5,#4000,#1429,#0,instr13*256+instr3
dw instr0*256+#5,#4000,#1429,#0,instr13*256+instr3
dw instr0*256+#5,#4000,#1429,#0,instr13*256+instr3
dw instr0*256+#5,#0,#1429,#0,instr0*256+instr3
dw instr0*256+#5,#0,#1429,#0,instr0*256+instr3
dw instr0*256+#5,#4000,#1429,#0,instr13*256+instr3
dw instr0*256+#5,#bfc9,#11f6,#0,instr2*256+instr3
dw instr0*256+#5,#4000,#11f6,#0,instr13*256+instr3
dw instr0*256+#5,#0,#11f6,#0,instr0*256+instr3
dw instr0*256+#5,#0,#11f6,#0,instr0*256+instr3
dw instr0*256+#5,#4000,#1429,#0,instr13*256+instr3
dw instr0*256+#5,#0,#1429,#0,instr0*256+instr3
dw instr0*256+#5,#0,#2851,#0,instr0*256+instr3
dw instr0*256+#5,#4000,#2ff2,#0,instr13*256+instr3
dw instr0*256+#5,#bfc9,#1429,#0,instr2*256+instr3
dw instr0*256+#5,#0,#1429,#0,instr0*256+instr3
dw instr0*256+#5,#4000,#1429,#0,instr13*256+instr3
dw instr0*256+#5,#4000,#1429,#0,instr13*256+instr3
dw instr0*256+#5,#4000,#1429,#0,instr13*256+instr3
dw instr0*256+#5,#0,#1429,#0,instr0*256+instr3
dw instr0*256+#5,#0,#1429,#0,instr0*256+instr3
dw instr0*256+#5,#4000,#1429,#0,instr13*256+instr3
dw instr0*256+#5,#bfc9,#23eb,#0,instr2*256+instr12
dw instr0*256+#5,#0,#2ab7,#0,instr0*256+instr12
dw instr0*256+#5,#0,#35d1,#0,instr0*256+instr12
dw instr0*256+#5,#f1a2,#4000,#0,instr13*256+instr12
db #00
ptn3
dw instr0*256+#5,#4000,#1429,#0,instr13*256+instr3
dw instr0*256+#5,#0,#1429,#0,instr0*256+instr3
dw instr0*256+#5,#0,#2851,#0,instr0*256+instr3
dw instr0*256+#5,#4000,#2ff2,#0,instr13*256+instr3
dw instr0*256+#5,#bfc9,#1429,#0,instr2*256+instr3
dw instr0*256+#5,#0,#1429,#0,instr0*256+instr3
dw instr0*256+#5,#4000,#1429,#0,instr13*256+instr3
dw instr0*256+#5,#4000,#1429,#0,instr13*256+instr3
dw instr0*256+#5,#4000,#1429,#0,instr13*256+instr3
dw instr0*256+#5,#0,#1429,#0,instr0*256+instr3
dw instr0*256+#5,#0,#1429,#0,instr0*256+instr3
dw instr0*256+#5,#4000,#1429,#0,instr13*256+instr3
dw instr0*256+#5,#bfc9,#11f6,#0,instr2*256+instr3
dw instr0*256+#5,#4000,#11f6,#0,instr13*256+instr3
dw instr0*256+#5,#0,#11f6,#0,instr0*256+instr3
dw instr0*256+#5,#0,#11f6,#0,instr0*256+instr3
dw instr0*256+#5,#4000,#1429,#0,instr13*256+instr3
dw instr0*256+#5,#0,#1429,#0,instr0*256+instr3
dw instr0*256+#5,#0,#2851,#0,instr0*256+instr3
dw instr0*256+#5,#4000,#2ff2,#0,instr13*256+instr3
dw instr0*256+#5,#bfc9,#1429,#0,instr2*256+instr3
dw instr0*256+#5,#0,#1429,#0,instr0*256+instr3
dw instr0*256+#5,#4000,#1429,#0,instr13*256+instr3
dw instr0*256+#5,#4000,#1429,#0,instr13*256+instr3
dw instr0*256+#5,#4000,#1429,#0,instr13*256+instr3
dw instr0*256+#5,#0,#1429,#0,instr0*256+instr3
dw instr0*256+#5,#0,#1429,#0,instr0*256+instr3
dw instr0*256+#5,#4000,#1429,#0,instr13*256+instr3
dw instr0*256+#5,#bfc9,#47d6,#0,instr2*256+instr5
dw instr0*256+#5,#0,#50a3,#0,instr0*256+instr5
dw instr0*256+#5,#0,#4000,#0,instr0*256+instr5
dw instr0*256+#5,#f1a2,#47d6,#0,instr13*256+instr5
db #00
ptn4
dw instr10*256+#5,#4000,#1429,#3c68,instr13*256+instr3
dw instr10*256+#5,#0,#1429,#2ff2,instr0*256+instr3
dw instr10*256+#5,#0,#2851,#35d1,instr0*256+instr3
dw instr10*256+#5,#4000,#2ff2,#2851,instr13*256+instr3
dw instr10*256+#5,#bfc9,#1429,#2851,instr2*256+instr3
dw instr10*256+#5,#0,#1429,#2851,instr0*256+instr3
dw instr10*256+#5,#4000,#1429,#2851,instr13*256+instr3
dw instr10*256+#5,#4000,#1429,#2851,instr13*256+instr3
dw instr10*256+#5,#4000,#1429,#2851,instr13*256+instr3
dw instr10*256+#5,#0,#1429,#2851,instr0*256+instr3
dw instr10*256+#5,#0,#1429,#2851,instr0*256+instr3
dw instr10*256+#5,#4000,#1429,#2851,instr13*256+instr3
dw instr10*256+#5,#bfc9,#11f6,#2ff2,instr2*256+instr3
dw instr10*256+#5,#4000,#11f6,#2ff2,instr13*256+instr3
dw instr10*256+#5,#0,#11f6,#35d1,instr0*256+instr3
dw instr10*256+#5,#0,#11f6,#35d1,instr0*256+instr3
dw instr10*256+#5,#4000,#1429,#3c68,instr13*256+instr3
dw instr10*256+#5,#0,#1429,#2ff2,instr0*256+instr3
dw instr10*256+#5,#0,#2851,#35d1,instr0*256+instr3
dw instr10*256+#5,#4000,#2ff2,#2851,instr13*256+instr3
dw instr10*256+#5,#bfc9,#1429,#2851,instr2*256+instr3
dw instr10*256+#5,#0,#1429,#2851,instr0*256+instr3
dw instr10*256+#5,#4000,#1429,#2851,instr13*256+instr3
dw instr10*256+#5,#4000,#1429,#2851,instr13*256+instr3
dw instr10*256+#5,#4000,#1429,#2851,instr13*256+instr3
dw instr10*256+#5,#0,#1429,#2851,instr0*256+instr3
dw instr10*256+#5,#0,#1429,#2851,instr0*256+instr3
dw instr10*256+#5,#4000,#1429,#2851,instr13*256+instr3
dw instr10*256+#5,#bfc9,#23eb,#47d6,instr2*256+instr12
dw instr10*256+#5,#0,#2ab7,#556e,instr0*256+instr12
dw instr10*256+#5,#0,#35d1,#6ba3,instr0*256+instr12
dw instr10*256+#5,#f1a2,#4000,#8000,instr13*256+instr12
db #00
ptn5
dw instr10*256+#5,#4000,#1429,#3c68,instr13*256+instr3
dw instr10*256+#5,#0,#1429,#2ff2,instr0*256+instr3
dw instr10*256+#5,#0,#2851,#35d1,instr0*256+instr3
dw instr10*256+#5,#4000,#2ff2,#2851,instr13*256+instr3
dw instr10*256+#5,#bfc9,#1429,#2851,instr2*256+instr3
dw instr10*256+#5,#0,#1429,#2851,instr0*256+instr3
dw instr10*256+#5,#4000,#1429,#2851,instr13*256+instr3
dw instr10*256+#5,#4000,#1429,#2851,instr13*256+instr3
dw instr10*256+#5,#4000,#1429,#2851,instr13*256+instr3
dw instr10*256+#5,#0,#1429,#2851,instr0*256+instr3
dw instr10*256+#5,#0,#1429,#2851,instr0*256+instr3
dw instr10*256+#5,#4000,#1429,#2851,instr13*256+instr3
dw instr10*256+#5,#bfc9,#11f6,#2ff2,instr2*256+instr3
dw instr10*256+#5,#4000,#11f6,#2ff2,instr13*256+instr3
dw instr10*256+#5,#0,#11f6,#35d1,instr0*256+instr3
dw instr10*256+#5,#0,#11f6,#35d1,instr0*256+instr3
dw instr10*256+#5,#4000,#1429,#3c68,instr13*256+instr3
dw instr10*256+#5,#0,#1429,#2ff2,instr0*256+instr3
dw instr10*256+#5,#0,#2851,#35d1,instr0*256+instr3
dw instr10*256+#5,#4000,#2ff2,#2851,instr13*256+instr3
dw instr10*256+#5,#bfc9,#1429,#78d1,instr2*256+instr3
dw instr10*256+#5,#0,#1429,#5fe4,instr0*256+instr3
dw instr10*256+#5,#4000,#1429,#6ba3,instr13*256+instr3
dw instr10*256+#5,#4000,#1429,#50a3,instr13*256+instr3
dw instr10*256+#5,#4000,#1429,#f1a2,instr13*256+instr3
dw instr10*256+#5,#0,#1429,#bfc9,instr0*256+instr3
dw instr10*256+#5,#0,#1429,#d745,instr0*256+instr3
dw instr10*256+#5,#4000,#1429,#a145,instr13*256+instr3
dw instr3*256+#5,#bfc9,#3c68,#5fe4,instr2*256+instr3
dw instr3*256+#5,#0,#3c68,#5fe4,instr0*256+instr3
dw instr3*256+#5,#0,#3c68,#5fe4,instr0*256+instr3
dw instr0*256+#5,#f1a2,#0,#0,instr13*256+instr0
db #00
ptn6
dw instr10*256+#5,#4000,#1429,#3c68,instr13*256+instr3
dw instr10*256+#5,#0,#1429,#2ff2,instr0*256+instr3
dw instr10*256+#5,#0,#2851,#35d1,instr0*256+instr3
dw instr10*256+#5,#4000,#2ff2,#2851,instr13*256+instr3
dw instr10*256+#5,#bfc9,#1429,#3c68,instr2*256+instr3
dw instr10*256+#5,#0,#1429,#2ff2,instr0*256+instr3
dw instr10*256+#5,#4000,#1429,#35d1,instr13*256+instr3
dw instr10*256+#5,#4000,#1429,#2851,instr13*256+instr3
dw instr10*256+#5,#4000,#1429,#50a3,instr13*256+instr3
dw instr10*256+#5,#0,#1429,#78d1,instr0*256+instr3
dw instr10*256+#5,#0,#1429,#5fe4,instr0*256+instr3
dw instr10*256+#5,#4000,#1429,#6ba3,instr13*256+instr3
dw instr10*256+#5,#bfc9,#11f6,#50a3,instr2*256+instr3
dw instr10*256+#5,#4000,#11f6,#78d1,instr13*256+instr3
dw instr10*256+#5,#0,#11f6,#5fe4,instr0*256+instr3
dw instr10*256+#5,#0,#11f6,#6ba3,instr0*256+instr3
dw instr10*256+#5,#4000,#1429,#50a3,instr13*256+instr3
dw instr10*256+#5,#0,#1429,#f1a2,instr0*256+instr3
dw instr10*256+#5,#0,#2851,#bfc9,instr0*256+instr3
dw instr10*256+#5,#4000,#2ff2,#d745,instr13*256+instr3
dw instr10*256+#5,#bfc9,#1429,#a145,instr2*256+instr3
dw instr10*256+#5,#0,#1429,#f1a2,instr0*256+instr3
dw instr10*256+#5,#4000,#1429,#bfc9,instr13*256+instr3
dw instr10*256+#5,#4000,#1429,#d745,instr13*256+instr3
dw instr10*256+#5,#4000,#1429,#a145,instr13*256+instr3
dw instr10*256+#5,#0,#1429,#8fad,instr0*256+instr3
dw instr10*256+#5,#0,#1429,#a145,instr0*256+instr3
dw instr10*256+#5,#4000,#1429,#bfc9,instr13*256+instr3
dw instr10*256+#5,#bfc9,#47d6,#8fad,instr2*256+instr5
dw instr10*256+#5,#0,#50a3,#a145,instr0*256+instr5
dw instr10*256+#5,#0,#4000,#8000,instr0*256+instr5
dw instr10*256+#5,#f1a2,#47d6,#8fad,instr13*256+instr5
db #00
ptn7
dw instr10*256+#5,#4000,#1ae9,#50a3,instr13*256+instr3
dw instr10*256+#5,#0,#1ae9,#4000,instr0*256+instr3
dw instr10*256+#5,#0,#35d1,#47d6,instr0*256+instr3
dw instr10*256+#5,#4000,#4000,#35d1,instr13*256+instr3
dw instr10*256+#5,#bfc9,#1ae9,#35d1,instr2*256+instr3
dw instr10*256+#5,#0,#1ae9,#35d1,instr0*256+instr3
dw instr10*256+#5,#4000,#1ae9,#35d1,instr13*256+instr3
dw instr10*256+#5,#4000,#1ae9,#35d1,instr13*256+instr3
dw instr10*256+#5,#4000,#1ae9,#35d1,instr13*256+instr3
dw instr10*256+#5,#0,#1ae9,#35d1,instr0*256+instr3
dw instr10*256+#5,#0,#1ae9,#35d1,instr0*256+instr3
dw instr10*256+#5,#4000,#1ae9,#35d1,instr13*256+instr3
dw instr10*256+#5,#bfc9,#17f9,#4000,instr2*256+instr3
dw instr10*256+#5,#4000,#17f9,#4000,instr13*256+instr3
dw instr10*256+#5,#0,#17f9,#47d6,instr0*256+instr3
dw instr10*256+#5,#0,#17f9,#47d6,instr0*256+instr3
dw instr10*256+#5,#4000,#1ae9,#50a3,instr13*256+instr3
dw instr10*256+#5,#0,#1ae9,#4000,instr0*256+instr3
dw instr10*256+#5,#0,#35d1,#47d6,instr0*256+instr3
dw instr10*256+#5,#4000,#4000,#35d1,instr13*256+instr3
dw instr10*256+#5,#bfc9,#1ae9,#35d1,instr2*256+instr3
dw instr10*256+#5,#0,#1ae9,#35d1,instr0*256+instr3
dw instr10*256+#5,#4000,#1ae9,#35d1,instr13*256+instr3
dw instr10*256+#5,#4000,#1ae9,#35d1,instr13*256+instr3
dw instr10*256+#5,#4000,#1ae9,#35d1,instr13*256+instr3
dw instr10*256+#5,#0,#1ae9,#35d1,instr0*256+instr3
dw instr10*256+#5,#0,#1ae9,#35d1,instr0*256+instr3
dw instr10*256+#5,#4000,#1ae9,#35d1,instr13*256+instr3
dw instr10*256+#5,#bfc9,#2ff2,#5fe4,instr2*256+instr12
dw instr10*256+#5,#0,#3905,#7209,instr0*256+instr12
dw instr10*256+#5,#0,#47d6,#8fad,instr0*256+instr12
dw instr10*256+#5,#f1a2,#556e,#aadc,instr13*256+instr12
db #00
ptn8
dw instr10*256+#5,#4000,#1ae9,#50a3,instr13*256+instr3
dw instr10*256+#5,#0,#1ae9,#4000,instr0*256+instr3
dw instr10*256+#5,#0,#35d1,#47d6,instr0*256+instr3
dw instr10*256+#5,#4000,#4000,#35d1,instr13*256+instr3
dw instr10*256+#5,#bfc9,#1ae9,#35d1,instr2*256+instr3
dw instr10*256+#5,#0,#1ae9,#35d1,instr0*256+instr3
dw instr10*256+#5,#4000,#1ae9,#35d1,instr13*256+instr3
dw instr10*256+#5,#4000,#1ae9,#35d1,instr13*256+instr3
dw instr10*256+#5,#4000,#1ae9,#35d1,instr13*256+instr3
dw instr10*256+#5,#0,#1ae9,#35d1,instr0*256+instr3
dw instr10*256+#5,#0,#1ae9,#35d1,instr0*256+instr3
dw instr10*256+#5,#4000,#1ae9,#35d1,instr13*256+instr3
dw instr10*256+#5,#bfc9,#17f9,#4000,instr2*256+instr3
dw instr10*256+#5,#4000,#17f9,#4000,instr13*256+instr3
dw instr10*256+#5,#0,#17f9,#47d6,instr0*256+instr3
dw instr10*256+#5,#0,#17f9,#47d6,instr0*256+instr3
dw instr10*256+#5,#4000,#1ae9,#50a3,instr13*256+instr3
dw instr10*256+#5,#0,#1ae9,#4000,instr0*256+instr3
dw instr10*256+#5,#0,#35d1,#47d6,instr0*256+instr3
dw instr10*256+#5,#4000,#4000,#35d1,instr13*256+instr3
dw instr10*256+#5,#bfc9,#1ae9,#a145,instr2*256+instr3
dw instr10*256+#5,#0,#1ae9,#8000,instr0*256+instr3
dw instr10*256+#5,#4000,#1ae9,#8fad,instr13*256+instr3
dw instr10*256+#5,#4000,#1ae9,#6ba3,instr13*256+instr3
dw instr0*256+#5,#4000,#1ae9,#0,instr13*256+instr3
dw instr0*256+#5,#0,#1ae9,#0,instr0*256+instr3
dw instr0*256+#5,#0,#1ae9,#0,instr0*256+instr3
dw instr10*256+#5,#4000,#1ae9,#d745,instr13*256+instr3
dw instr3*256+#5,#bfc9,#50a3,#8000,instr2*256+instr3
dw instr3*256+#5,#0,#50a3,#8000,instr0*256+instr3
dw instr3*256+#5,#0,#50a3,#8000,instr0*256+instr3
dw instr0*256+#5,#f1a2,#0,#0,instr13*256+instr0
db #00
ptn9
dw instr10*256+#5,#4000,#1ae9,#3c68,instr13*256+instr3
dw instr10*256+#5,#0,#1ae9,#2ff2,instr0*256+instr3
dw instr10*256+#5,#0,#35d1,#35d1,instr0*256+instr3
dw instr10*256+#5,#4000,#4000,#2851,instr13*256+instr3
dw instr10*256+#5,#bfc9,#1ae9,#3c68,instr2*256+instr3
dw instr10*256+#5,#0,#1ae9,#2ff2,instr0*256+instr3
dw instr10*256+#5,#4000,#1ae9,#35d1,instr13*256+instr3
dw instr10*256+#5,#4000,#1ae9,#2851,instr13*256+instr3
dw instr10*256+#5,#4000,#1ae9,#50a3,instr13*256+instr3
dw instr10*256+#5,#0,#1ae9,#78d1,instr0*256+instr3
dw instr10*256+#5,#0,#1ae9,#5fe4,instr0*256+instr3
dw instr10*256+#5,#4000,#1ae9,#6ba3,instr13*256+instr3
dw instr10*256+#5,#bfc9,#17f9,#50a3,instr2*256+instr3
dw instr10*256+#5,#4000,#17f9,#78d1,instr13*256+instr3
dw instr10*256+#5,#0,#17f9,#5fe4,instr0*256+instr3
dw instr10*256+#5,#0,#17f9,#6ba3,instr0*256+instr3
dw instr10*256+#5,#4000,#1ae9,#50a3,instr13*256+instr3
dw instr10*256+#5,#0,#1ae9,#f1a2,instr0*256+instr3
dw instr10*256+#5,#0,#35d1,#bfc9,instr0*256+instr3
dw instr10*256+#5,#4000,#4000,#d745,instr13*256+instr3
dw instr10*256+#5,#bfc9,#1ae9,#a145,instr2*256+instr3
dw instr10*256+#5,#0,#1ae9,#f1a2,instr0*256+instr3
dw instr10*256+#5,#4000,#1ae9,#bfc9,instr13*256+instr3
dw instr10*256+#5,#4000,#1ae9,#d745,instr13*256+instr3
dw instr10*256+#5,#4000,#1ae9,#a145,instr13*256+instr3
dw instr10*256+#5,#0,#1ae9,#8fad,instr0*256+instr3
dw instr10*256+#5,#0,#1ae9,#a145,instr0*256+instr3
dw instr10*256+#5,#4000,#1ae9,#bfc9,instr13*256+instr3
dw instr10*256+#5,#bfc9,#5fe4,#8fad,instr2*256+instr5
dw instr10*256+#5,#0,#6ba3,#a145,instr0*256+instr5
dw instr10*256+#5,#0,#556e,#8000,instr0*256+instr5
dw instr10*256+#5,#f1a2,#5fe4,#8fad,instr13*256+instr5
db #00
|
; Copyright 2015-2020 Matt "MateoConLechuga" Waltz
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
;
; 1. Redistributions of source code must retain the above copyright notice,
; this list of conditions and the following disclaimer.
;
; 2. Redistributions in binary form must reproduce the above copyright notice,
; this list of conditions and the following disclaimer in the documentation
; and/or other materials provided with the distribution.
;
; 3. Neither the name of the copyright holder nor the names of its contributors
; may be used to endorse or promote products derived from this software
; without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
; routines for building lists of available programs and applications
find_files:
call ti.DeleteTempPrograms
call ti.CleanAll
call find_lists
ld hl,(item_locations_ptr)
ld de,item_location_base
or a,a
sbc hl,de
srl h
rr l
srl h
rr l
ld (number_of_items),hl ; divide by 4 to compute number of stored items
ld hl,return_info
ld a,(hl)
ld (hl),0
cp a,return_prgm
jr z,.restore_selection
cp a,return_edit
jr z,.restore_selection
cp a,return_goto
ret nz
.restore_selection:
ld hl,backup_prgm_name + 1
jp search_name
find_lists:
call .reset
call find_check_apps
ld a,(current_screen)
cp a,screen_apps
jp z,find_apps
call sort_vat ; sort the vat before trying anything
ld a,(current_screen)
cp a,screen_programs
jp z,find_programs
cp a,screen_appvars
jp z,find_appvars
jp exit_full ; abort
.reset:
ld hl,item_location_base
ld (item_locations_ptr),hl
xor a,a
sbc hl,hl
ld (number_of_items),hl
.reset_selection:
ld a,(return_info)
cp a,return_settings
jr z,.reset_offset
xor a,a
sbc hl,hl
ld (current_selection),a
ld (scroll_amount),hl
ld (current_selection_absolute),hl
ret
.reset_offset:
xor a,a
ld (return_info),a
ret
find_appvars:
call find_app_directory
ld hl,(ti.progPtr)
.loop:
ld de,(ti.pTemp) ; check to see if at end of symbol table
or a,a
sbc hl,de
ret z
ret c
add hl,de ; restore hl
ld a,(hl) ; check the [t] of entry, take appropriate action
ld de,6
or a,a
sbc hl,de
and a,$1f ; bitmask off bits 7-5 to get type only.
cp a,ti.AppVarObj ; check if appvar
jr nz,.skip
ex de,hl
ld hl,(item_locations_ptr)
ld (hl),de
inc hl
inc hl
inc hl
ld (hl),file_appvar
inc hl ; 4 bytes per entry - pointer to name + dummy
ld (item_locations_ptr),hl
ex de,hl
ld de,0
.skip:
ld e,(hl) ; e = name length
inc e ; add 1 to go to [t] of next entry
or a,a
sbc hl,de
jr .loop
find_programs:
call find_app_directory
call find_usb_directory
ld hl,(ti.progPtr)
.loop:
ld de,(ti.pTemp) ; check to see if at end of symbol table
or a,a
sbc hl,de
ret z
ret c
add hl,de ; restore hl
ld a,(hl) ; check the [t] of entry, take appropriate action
and a,$1f ; bitmask off bits 7-5 to get type only.
cp a,ti.ProgObj ; check if program
jr z,.normal_program
cp a,ti.ProtProgObj ; check if protected progrm
jp nz,.skip_program
.normal_program: ; at this point, hl -> [t], so we'll move back six bytes to [nl]
dec hl
bit cesium_is_disabled,(iy + cesium_flag)
jr z,.no_disable_check
ld a,(hl)
inc hl
or a,a
jr nz,.skip_program
dec hl
.no_disable_check:
dec hl
dec hl ; hl -> [dal]
ld e,(hl)
dec hl
ld d,(hl)
dec hl
ld a,(hl)
call ti.SetDEUToA
dec hl
push hl
call find_data_ptr
inc hl
inc hl
ld a,(hl)
cp a,ti.tExtTok ; is it an assembly program
jr z,.check_if_is_asm
.program_is_basic:
cp a,byte_ice_source ; actually it is ice source
ld a,file_ice_source
jr z,.store_program_type
ld a,file_basic
jr .store_program_type
.check_if_is_asm:
inc hl
ld a,(hl)
cp a,ti.tAsm84CeCmp
jr nz,.program_is_basic ; is it a basic program
inc hl
ld a,(hl)
cp a,byte_ice
ld a,file_ice
jr z,.store_program_type ; is it an ice program
ld a,(hl)
cp a,byte_c
ld a,file_c
jr z,.store_program_type
ld a,file_asm ; default to assembly program
.store_program_type:
ld (.file_type),a
pop hl
dec hl
ld a,(hl)
cp a,'!' ; system variable
jp z,.not_valid
cp a,'#' ; system variable
jr z,.not_valid
cp a,27 ; hidden?
jr nc,.not_hidden
bit setting_hide_hidden,(iy + settings_flag)
jq nz,.not_valid
.not_hidden:
inc hl
ex de,hl
ld hl,0
item_locations_ptr := $-3 ; this is the location to store the pointers to vat entry
ld (hl),de
inc hl
inc hl
inc hl
ld (hl),0
.file_type := $-1
inc hl ; 4 bytes per entry - pointer to name + type of program
ld (item_locations_ptr),hl
ex de,hl
ld de,0
jr .skip_name
.not_valid:
ld de,0
inc hl
jr .skip_name
.skip_program: ; skip an entry
ld de,6
or a,a
sbc hl,de
.skip_name:
ld e,(hl) ; put name length in e to skip
inc e ; add 1 to go to [t] of next entry
or a,a
sbc hl,de
jp .loop
find_app_directory:
bit setting_special_directories,(iy + settings_adv_flag)
ret z
ld hl,(item_locations_ptr)
ld de,find_application_directory_name
ld (hl),de
inc hl
inc hl
inc hl
ld (hl),byte_dir
inc hl
ld (item_locations_ptr),hl
ret
find_usb_directory:
bit setting_enable_usb,(iy + settings_adv_flag)
ret z
ld hl,(item_locations_ptr)
ld de,find_usb_directory_name
ld (hl),de
inc hl
inc hl
inc hl
ld (hl),byte_usb_dir
inc hl
ld (item_locations_ptr),hl
ret
find_apps:
ld hl,(item_locations_ptr)
ld de,find_program_directory_name
ld (hl),de
inc hl
inc hl
inc hl
inc hl
ld de,find_appvars_directory_name
ld (hl),de
inc hl
inc hl
inc hl
inc hl
ld (item_locations_ptr),hl
call ti.ZeroOP3
ld a,ti.AppObj
ld (ti.OP3),a
.loop:
call ti.OP3ToOP1
call ti.FindAppUp
push hl
push de
call ti.OP1ToOP3
pop hl
pop de
ret c
ld bc,$100 ; bypass some header info
add hl,bc
ex de,hl
ld hl,(item_locations_ptr)
ld (hl),de
inc hl
inc hl
inc hl
inc hl
ld (item_locations_ptr),hl
jr .loop
find_data_ptr: ; gets a pointer to the data
cp a,$d0
ex de,hl
ret nc
ld de,9
add hl,de ; skip vat entry
ld e,(hl)
add hl,de
inc hl ; size of name
ret
find_check_apps:
res cesium_is_disabled,(iy + cesium_flag)
res cesium_is_nl_disabled,(iy + cesium_flag)
ld de,$c00
call $310
ret nz
call $30c
ld a,(hl)
or a,a
ret z
set cesium_is_disabled,(iy + cesium_flag)
inc hl
ld a,(hl)
tst a,4
jr nz,.skip
res setting_special_directories,(iy + settings_adv_flag)
ret
.skip:
set cesium_is_nl_disabled,(iy + cesium_flag)
pop hl
ret
; program metadata directories
db "evirD hsalF BSU"
find_usb_directory_name:
db 15
.ptr:
dl .ptr bswap 3
db 0,0,$ff
db "sppA"
find_application_directory_name:
db 4
.ptr:
dl .ptr bswap 3
db 0,0,$ff
find_program_directory_name:
db 0,0,0,"All Programs",0
.ptr:
dl .ptr bswap 3
db 0,0,4
; application metadata directories
find_appvars_directory_name:
db 0,0,0,"AppVars",0
.ptr:
dl .ptr bswap 3
db 0,0,4
|
class Solution {
public:
vector<int> getAverages(vector<int>& nums, int k) {
long long sum = 0;
vector<int> results(nums.size(),-1);
if(k > nums.size() || 2*k >= nums.size()) return results;
for(int i=0;i<=min(2*k,(int)nums.size());++i){
sum += nums[i];
}
int left = 0;
int right = 2*k + 1;
for(int i=k;i<(int)nums.size()-(int)k;++i){
results[i] = sum/(2*k + 1);
if(left >= 0)
sum -= nums[left];
if(right < nums.size())
sum += nums[right];
left++;
right++;
}
return results;
}
}; |
; A086746: Multiples of 3018.
; 3018,6036,9054,12072,15090,18108,21126,24144,27162,30180,33198,36216,39234,42252,45270,48288,51306,54324,57342,60360,63378,66396,69414,72432,75450,78468,81486,84504,87522,90540,93558,96576,99594,102612
mov $1,$0
mul $1,3018
add $1,3018
|
Sound_9A_Header:
smpsHeaderStartSong 3
smpsHeaderVoice Sound_9A_Voices
smpsHeaderTempoSFX $01
smpsHeaderChanSFX $01
smpsHeaderSFXChannel cPSG3, Sound_9A_PSG3, $FF, $00
; PSG3 Data
Sound_9A_PSG3:
smpsPSGform $E7
smpsPSGvoice sTone_15
smpsModSet $01, $01, $DD, $02
dc.b nE5, $04
Sound_9A_Loop00:
dc.b nG6, $01
smpsPSGAlterVol $01
smpsLoop $00, $0C, Sound_9A_Loop00
smpsStop
; Song seems to not use any FM voices
Sound_9A_Voices:
|
color_menubar equ $70
color_menubar_highlight equ $74
color_menubar_active equ $3F
color_menubar_active_hi equ $3E
color_menu_dropdown equ $3F
color_menu_dropdown_hi equ $3E
color_menu_dropdown_active equ $4F
color_menu_dropdown_act_hi equ $4E
color_menu_dropdown_shadow equ $08
color_editor_top equ $17
color_editor_left equ $17
color_editor_title equ $1F
color_editor_scrollbar equ $78
color_tool_key equ $1F
color_tool_key_active equ $4E
color_tool_text equ $17
color_tool_hint equ $19
color_tool_hint_highlight equ $91
color_statusbar equ $3F
color_statusbar_highlight equ $3E
color_statusbar_info equ $30
color_statusbar_info2 equ $31
instruction_indent equ 2
instruction_align equ 8
chars_tools_top:
.db $D5, $CD, $20, $CD, $CD
chars_editor_top:
.db $D1, $CD, $20, $CD, $B8
chars_menu_dropdown_top:
.db $DA, $C4, $BF
chars_menu_dropdown_frame:
.db $B3, $20, $B3
chars_menu_dropdown_bottom:
.db $C0, $C4, $D9
chars_scrollbar:
.db $18, $19, $DB, $B1
colors_editor:
.db $1F ; labels, defines, references
.db $17 ; text, comments
.db $1C ; numbers, raw nibbles
.db $1F ; expressions / placeholders
.db $1D ; flags
.db $1E ; registers / indirect memory / rst targets
.db $1B ; pseudo instructions
.db $1A ; instructions
colors_editor_active:
.db $9F ; labels, defines, references
.db $97 ; text, comments
.db $9C ; numbers, raw nibbles
.db $9F ; expressions / placeholders
.db $9D ; flags
.db $9E ; registers / indirect memory / rst targets
.db $9B ; pseudo instructions
.db $9A ; instructions
|
// ArduinoJson - arduinojson.org
// Copyright Benoit Blanchon 2014-2018
// MIT License
#include <ArduinoJson6_8.h>
#include <catch.hpp>
using namespace Catch::Matchers;
TEST_CASE("JsonObject::invalid()") {
JsonObject obj;
SECTION("SubscriptFails") {
REQUIRE(obj["key"].isNull());
}
SECTION("AddFails") {
obj["hello"] = "world";
REQUIRE(0 == obj.size());
}
SECTION("CreateNestedArrayFails") {
REQUIRE(obj.createNestedArray("hello").isNull());
}
SECTION("CreateNestedObjectFails") {
REQUIRE(obj.createNestedObject("world").isNull());
}
SECTION("serialize to 'null'") {
char buffer[32];
serializeJson(obj, buffer, sizeof(buffer));
REQUIRE_THAT(buffer, Equals("null"));
}
}
|
; A087136: Smallest positive number m such that A073642(m)=n.
; 1,2,4,6,10,12,14,22,26,28,30,46,54,58,60,62,94,110,118,122,124,126,190,222,238,246,250,252,254,382,446,478,494,502,506,508,510,766,894,958,990,1006,1014,1018,1020,1022,1534,1790,1918,1982,2014,2030,2038
cal $0,224195 ; Ordered sequence of numbers of form (2^n - 1)*2^m + 1 where n >= 1, m >= 1.
trn $0,4
add $0,1
mov $1,$0
|
; A170796: a(n) = n^10*(n^4 + 1)/2.
; 0,1,8704,2421009,134742016,3056640625,39212315136,339252774049,2199560126464,11440139619681,50005000000000,189887885503921,641990190956544,1968757122095569,5556148040106496,14596751337890625,36029346774777856,84189921276650689,187408469024653824,399506408424570961,819205120000000000,1621968306201243441,3110923916675305984,5796438875524981729,10517891763274776576,18626499176025390625,32255057935196402176,54709597511322226929,91029708013354614784,148779326691516381841,239148745245000000000,378472377424541650561,590296373308659073024,908166606681392943489,1379352187363489440256,2069773940458369140625,3070472935311627780096,4506033052289690358769,6545465909039310713344,9416178667268913900321,13421778042880000000000,18964620308787434477281,26574200627315259953664,36942689477810408524849,50969173470601175105536,69814447124682744140625,94968536380995179823616,128333519393399822582209,172324651711528125333504,229993308168503129294401,305175830078125000000000,402673021881707564795601,528465785046963235323904,689973218472307066949809,896360464381608879100416,1158904648080811650390625,1491428461299633787764736,1910812285462803469113249,2437597257482252654539264,3096693362004283344052081,3918208507130880000000000,4938416623352114878997521,6200885136978446390239744,7757784730331379868122369,9671407133377785701072896,12015919818947985712890625,14879389921341335155155456,18366113492867350136847889,22599290383342259810074624,27724089604268420144981361,33911155054826245000000000,41360606975406939968795041,50306600492848889865437184,61022509168686209188626529,73826808598786306668990976,89089742883396148681640625,107240865237033074177867776,128777553186701280017362129,154274608766215151071363584,184395064908477236940210241,219902330923909120000000000,261673822592512998135220161,310716236053149824505332224,368182639413838836633726289,435391571902011644595142656,513848357498141997431640625,605268858428261567248093696,711605913712738651594911969,835078729266597645877510144,978205508911080671655186721,1143839640181972005000000000,1335209775106836508532624881,1555964174274884358506020864,1810219712648653836669365649,2102615977780127122012135936,2438374925514496256962890625,2823366595017199811838345216,3264181424174244417134433409,3768209748228150104699298304,4343729109063995290308678801
mov $1,$0
pow $0,10
mov $2,$1
pow $2,4
mul $2,$0
add $0,$2
div $0,2
|
; stdio_errno_zc
; 06.2008 aralbrec
PUBLIC stdio_errno_zc
EXTERN stdio_error_zc
EXTERN _errno
.stdio_errno_zc
ld (_errno),hl
jp stdio_error_zc
|
; A195319: Three times second hexagonal numbers: 3*n*(2*n+1).
; 0,9,30,63,108,165,234,315,408,513,630,759,900,1053,1218,1395,1584,1785,1998,2223,2460,2709,2970,3243,3528,3825,4134,4455,4788,5133,5490,5859,6240,6633,7038,7455,7884,8325,8778,9243,9720,10209,10710,11223,11748,12285,12834,13395,13968,14553,15150,15759,16380,17013,17658,18315,18984,19665,20358,21063,21780,22509,23250,24003,24768,25545,26334,27135,27948,28773,29610,30459,31320,32193,33078,33975,34884,35805,36738,37683,38640,39609,40590,41583,42588,43605,44634,45675,46728,47793,48870,49959,51060,52173,53298,54435,55584,56745,57918,59103,60300,61509,62730,63963,65208,66465,67734,69015,70308,71613,72930,74259,75600,76953,78318,79695,81084,82485,83898,85323,86760,88209,89670,91143,92628,94125,95634,97155,98688,100233,101790,103359,104940,106533,108138,109755,111384,113025,114678,116343,118020,119709,121410,123123,124848,126585,128334,130095,131868,133653,135450,137259,139080,140913,142758,144615,146484,148365,150258,152163,154080,156009,157950,159903,161868,163845,165834,167835,169848,171873,173910,175959,178020,180093,182178,184275,186384,188505,190638,192783,194940,197109,199290,201483,203688,205905,208134,210375,212628,214893,217170,219459,221760,224073,226398,228735,231084,233445,235818,238203,240600,243009,245430,247863,250308,252765,255234,257715,260208,262713,265230,267759,270300,272853,275418,277995,280584,283185,285798,288423,291060,293709,296370,299043,301728,304425,307134,309855,312588,315333,318090,320859,323640,326433,329238,332055,334884,337725,340578,343443,346320,349209,352110,355023,357948,360885,363834,366795,369768,372753
mov $1,$0
mul $0,6
add $0,3
mul $1,$0
|
;****************************************************************************
;*
;* SciTech OS Portability Manager Library
;*
;* ========================================================================
;*
;* The contents of this file are subject to the SciTech MGL Public
;* License Version 1.0 (the "License"); you may not use this file
;* except in compliance with the License. You may obtain a copy of
;* the License at http://www.scitechsoft.com/mgl-license.txt
;*
;* Software distributed under the License is distributed on an
;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
;* implied. See the License for the specific language governing
;* rights and limitations under the License.
;*
;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
;*
;* The Initial Developer of the Original Code is SciTech Software, Inc.
;* All Rights Reserved.
;*
;* ========================================================================
;*
;* Language: 80386 Assembler, TASM 4.0 or NASM
;* Environment: IBM PC Real mode and 16/32 bit protected mode
;*
;* Description: Low level assembly support for the PM library specific to
;* MSDOS interrupt handling.
;*
;****************************************************************************
IDEAL
include "scitech.mac" ; Memory model macros
header _pmdos ; Set up memory model
; Define the size of our local stacks. For real mode code they cant be
; that big, but for 32 bit protected mode code we can make them nice and
; large so that complex C functions can be used.
ifdef flatmodel
MOUSE_STACK EQU 4096
TIMER_STACK EQU 4096
KEY_STACK EQU 1024
INT10_STACK EQU 1024
IRQ_STACK EQU 1024
else
MOUSE_STACK EQU 1024
TIMER_STACK EQU 512
KEY_STACK EQU 256
INT10_STACK EQU 256
IRQ_STACK EQU 256
endif
ifdef USE_NASM
; Macro to load DS and ES registers with correct value.
%imacro LOAD_DS 0
%ifdef flatmodel
mov ds,[cs:_PM_savedDS]
mov es,[cs:_PM_savedDS]
%else
push ax
mov ax,_DATA
mov ds,ax
pop ax
%endif
%endmacro
; Note that interrupts we disable interrupts during the following stack
; %imacro for correct operation, but we do not enable them again. Normally
; these %imacros are used within interrupt handlers so interrupts should
; already be off. We turn them back on explicitly later if the user code
; needs them to be back on.
; Macro to switch to a new local stack.
%imacro NEWSTK 1
cli
mov [seg_%1],ss
mov [ptr_%1],_sp
mov [TempSeg],ds
mov ss,[TempSeg]
mov _sp,offset %1
%endmacro
; %imacro to switch back to the old stack.
%imacro RESTSTK 1
cli
mov ss,[seg_%1]
mov _sp,[ptr_%1]
%endmacro
; %imacro to swap the current stack with the one saved away.
%imacro SWAPSTK 1
cli
mov ax,ss
xchg ax,[seg_%1]
mov ss,ax
xchg _sp,[ptr_%1]
%endmacro
else
; Macro to load DS and ES registers with correct value.
MACRO LOAD_DS
ifdef flatmodel
mov ds,[cs:_PM_savedDS]
mov es,[cs:_PM_savedDS]
else
push ax
mov ax,_DATA
mov ds,ax
pop ax
endif
ENDM
; Note that interrupts we disable interrupts during the following stack
; macro for correct operation, but we do not enable them again. Normally
; these macros are used within interrupt handlers so interrupts should
; already be off. We turn them back on explicitly later if the user code
; needs them to be back on.
; Macro to switch to a new local stack.
MACRO NEWSTK stkname
cli
mov [seg_&stkname&],ss
mov [ptr_&stkname&],_sp
mov [TempSeg],ds
mov ss,[TempSeg]
mov _sp,offset stkname
ENDM
; Macro to switch back to the old stack.
MACRO RESTSTK stkname
cli
mov ss,[seg_&stkname&]
mov _sp,[ptr_&stkname&]
ENDM
; Macro to swap the current stack with the one saved away.
MACRO SWAPSTK stkname
cli
mov ax,ss
xchg ax,[seg_&stkname&]
mov ss,ax
xchg _sp,[ptr_&stkname&]
ENDM
endif
begdataseg _pmdos
ifdef flatmodel
cextern _PM_savedDS,USHORT
endif
cextern _PM_critHandler,CPTR
cextern _PM_breakHandler,CPTR
cextern _PM_timerHandler,CPTR
cextern _PM_rtcHandler,CPTR
cextern _PM_keyHandler,CPTR
cextern _PM_key15Handler,CPTR
cextern _PM_mouseHandler,CPTR
cextern _PM_int10Handler,CPTR
cextern _PM_ctrlCPtr,DPTR
cextern _PM_ctrlBPtr,DPTR
cextern _PM_critPtr,DPTR
cextern _PM_prevTimer,FCPTR
cextern _PM_prevRTC,FCPTR
cextern _PM_prevKey,FCPTR
cextern _PM_prevKey15,FCPTR
cextern _PM_prevBreak,FCPTR
cextern _PM_prevCtrlC,FCPTR
cextern _PM_prevCritical,FCPTR
cextern _PM_prevRealTimer,ULONG
cextern _PM_prevRealRTC,ULONG
cextern _PM_prevRealKey,ULONG
cextern _PM_prevRealKey15,ULONG
cextern _PM_prevRealInt10,ULONG
cpublic _PM_pmdosDataStart
; Allocate space for all of the local stacks that we need. These stacks
; are not very large, but should be large enough for most purposes
; (generally you want to handle these interrupts quickly, simply storing
; the information for later and then returning). If you need bigger
; stacks then change the appropriate value in here.
ALIGN 4
dclb MOUSE_STACK ; Space for local stack (small)
MsStack: ; Stack starts at end!
ptr_MsStack DUINT 0 ; Place to store old stack offset
seg_MsStack dw 0 ; Place to store old stack segment
ALIGN 4
dclb INT10_STACK ; Space for local stack (small)
Int10Stack: ; Stack starts at end!
ptr_Int10Stack DUINT 0 ; Place to store old stack offset
seg_Int10Stack dw 0 ; Place to store old stack segment
ALIGN 4
dclb TIMER_STACK ; Space for local stack (small)
TmStack: ; Stack starts at end!
ptr_TmStack DUINT 0 ; Place to store old stack offset
seg_TmStack dw 0 ; Place to store old stack segment
ALIGN 4
dclb TIMER_STACK ; Space for local stack (small)
RtcStack: ; Stack starts at end!
ptr_RtcStack DUINT 0 ; Place to store old stack offset
seg_RtcStack dw 0 ; Place to store old stack segment
RtcInside dw 0 ; Are we still handling current interrupt
ALIGN 4
dclb KEY_STACK ; Space for local stack (small)
KyStack: ; Stack starts at end!
ptr_KyStack DUINT 0 ; Place to store old stack offset
seg_KyStack dw 0 ; Place to store old stack segment
KyInside dw 0 ; Are we still handling current interrupt
ALIGN 4
dclb KEY_STACK ; Space for local stack (small)
Ky15Stack: ; Stack starts at end!
ptr_Ky15Stack DUINT 0 ; Place to store old stack offset
seg_Ky15Stack dw 0 ; Place to store old stack segment
TempSeg dw 0 ; Place to store stack segment
cpublic _PM_pmdosDataEnd
enddataseg _pmdos
begcodeseg _pmdos ; Start of code segment
cpublic _PM_pmdosCodeStart
;----------------------------------------------------------------------------
; PM_mouseISR - Mouse interrupt subroutine dispatcher
;----------------------------------------------------------------------------
; Interrupt subroutine called by the mouse driver upon interrupts, to
; dispatch control to high level C based subroutines. Interrupts are on
; when we call the user code.
;
; It is _extremely_ important to save the state of the extended registers
; as these may well be trashed by the routines called from here and not
; restored correctly by the mouse interface module.
;
; NOTE: This routine switches to a local stack before calling any C code,
; and hence is _not_ re-entrant. For mouse handlers this is not a
; problem, as the mouse driver arbitrates calls to the user mouse
; handler for us.
;
; Entry: AX - Condition mask giving reason for call
; BX - Mouse button state
; CX - Horizontal cursor coordinate
; DX - Vertical cursor coordinate
; SI - Horizontal mickey value
; DI - Vertical mickey value
;
;----------------------------------------------------------------------------
ifdef DJGPP
cprocstart _PM_mouseISR
else
cprocfar _PM_mouseISR
endif
push ds ; Save value of DS
push es
pushad ; Save _all_ extended registers
cld ; Clear direction flag
LOAD_DS ; Load DS register
NEWSTK MsStack ; Switch to local stack
; Call the installed high level C code routine
clrhi dx ; Clear out high order values
clrhi cx
clrhi bx
clrhi ax
sgnhi si
sgnhi di
push _di
push _si
push _dx
push _cx
push _bx
push _ax
sti ; Enable interrupts
call [CPTR _PM_mouseHandler]
_add sp,12,24
RESTSTK MsStack ; Restore previous stack
popad ; Restore all extended registers
pop es
pop ds
ret ; We are done!!
cprocend
;----------------------------------------------------------------------------
; PM_timerISR - Timer interrupt subroutine dispatcher
;----------------------------------------------------------------------------
; Hardware interrupt handler for the timer interrupt, to dispatch control
; to high level C based subroutines. We save the state of all registers
; in this routine, and switch to a local stack. Interrupts are *off*
; when we call the user code.
;
; NOTE: This routine switches to a local stack before calling any C code,
; and hence is _not_ re-entrant. Make sure your C code executes as
; quickly as possible, since a timer overrun will simply hang the
; system.
;----------------------------------------------------------------------------
cprocfar _PM_timerISR
push ds ; Save value of DS
push es
pushad ; Save _all_ extended registers
cld ; Clear direction flag
LOAD_DS ; Load DS register
NEWSTK TmStack ; Switch to local stack
call [CPTR _PM_timerHandler]
RESTSTK TmStack ; Restore previous stack
popad ; Restore all extended registers
pop es
pop ds
iret ; Return from interrupt
cprocend
;----------------------------------------------------------------------------
; PM_chainPrevTimer - Chain to previous timer interrupt and return
;----------------------------------------------------------------------------
; Chains to the previous timer interrupt routine and returns control
; back to the high level interrupt handler.
;----------------------------------------------------------------------------
cprocstart PM_chainPrevTimer
ifdef TNT
push eax
push ebx
push ecx
pushfd ; Push flags on stack to simulate interrupt
mov ax,250Eh ; Call real mode procedure function
mov ebx,[_PM_prevRealTimer]
mov ecx,1 ; Copy real mode flags to real mode stack
int 21h ; Call the real mode code
popfd
pop ecx
pop ebx
pop eax
ret
else
SWAPSTK TmStack ; Swap back to previous stack
pushf ; Save state of interrupt flag
pushf ; Push flags on stack to simulate interrupt
ifdef USE_NASM
call far dword [_PM_prevTimer]
else
call [_PM_prevTimer]
endif
popf ; Restore state of interrupt flag
SWAPSTK TmStack ; Swap back to C stack again
ret
endif
cprocend
; Macro to delay briefly to ensure that enough time has elapsed between
; successive I/O accesses so that the device being accessed can respond
; to both accesses even on a very fast PC.
ifdef USE_NASM
%macro DELAY 0
jmp short $+2
jmp short $+2
jmp short $+2
%endmacro
%macro IODELAYN 1
%rep %1
DELAY
%endrep
%endmacro
else
macro DELAY
jmp short $+2
jmp short $+2
jmp short $+2
endm
macro IODELAYN N
rept N
DELAY
endm
endm
endif
;----------------------------------------------------------------------------
; PM_rtcISR - Real time clock interrupt subroutine dispatcher
;----------------------------------------------------------------------------
; Hardware interrupt handler for the timer interrupt, to dispatch control
; to high level C based subroutines. We save the state of all registers
; in this routine, and switch to a local stack. Interrupts are *off*
; when we call the user code.
;
; NOTE: This routine switches to a local stack before calling any C code,
; and hence is _not_ re-entrant. Make sure your C code executes as
; quickly as possible, since a timer overrun will simply hang the
; system.
;----------------------------------------------------------------------------
cprocfar _PM_rtcISR
push ds ; Save value of DS
push es
pushad ; Save _all_ extended registers
cld ; Clear direction flag
; Clear priority interrupt controller and re-enable interrupts so we
; dont lock things up for long.
mov al,20h
out 0A0h,al
out 020h,al
; Clear real-time clock timeout
in al,70h ; Read CMOS index register
push _ax ; and save for later
IODELAYN 3
mov al,0Ch
out 70h,al
IODELAYN 5
in al,71h
; Call the C interrupt handler function
LOAD_DS ; Load DS register
cmp [BYTE RtcInside],1 ; Check for mutual exclusion
je @@Exit
mov [BYTE RtcInside],1
NEWSTK RtcStack ; Switch to local stack
sti ; Re-enable interrupts
call [CPTR _PM_rtcHandler]
RESTSTK RtcStack ; Restore previous stack
mov [BYTE RtcInside],0
@@Exit: pop _ax
out 70h,al ; Restore CMOS index register
popad ; Restore all extended registers
pop es
pop ds
iret ; Return from interrupt
cprocend
ifdef flatmodel
;----------------------------------------------------------------------------
; PM_irqISRTemplate - Hardware interrupt handler IRQ template
;----------------------------------------------------------------------------
; Hardware interrupt handler for any interrupt, to dispatch control
; to high level C based subroutines. We save the state of all registers
; in this routine, and switch to a local stack. Interrupts are *off*
; when we call the user code.
;
; NOTE: This routine switches to a local stack before calling any C code,
; and hence is _not_ re-entrant. Make sure your C code executes as
; quickly as possible.
;----------------------------------------------------------------------------
cprocfar _PM_irqISRTemplate
push ebx
mov ebx,0 ; Relocation adjustment factor
jmp __IRQEntry
; Global variables stored in the IRQ thunk code segment
_CHandler dd 0 ; Pointer to C interrupt handler
_PrevIRQ dd 0 ; Previous IRQ handler
dd 0
_IRQ dd 0 ; IRQ we are hooked for
ptr_IRQStack DUINT 0 ; Place to store old stack offset
seg_IRQStack dw 0 ; Place to store old stack segment
_Inside db 0 ; Mutual exclusion flag
ALIGN 4
dclb IRQ_STACK ; Space for local stack
_IRQStack: ; Stack starts at end!
; Check for and reject spurious IRQ 7 signals
__IRQEntry:
cmp [BYTE cs:ebx+_IRQ],7 ; Spurious IRQs occur only on IRQ 7
jmp @@ValidIRQ
push eax
mov al,1011b ; OCW3: read ISR
out 20h,al ; (Intel Peripheral Components, 1991,
in al,20h ; p. 3-188)
shl al,1 ; Set C = bit 7 (IRQ 7) of ISR register
pop eax
jc @@ValidIRQ
iret ; Return from interrupt
; Save all registers for duration of IRQ handler
@@ValidIRQ:
push ds ; Save value of DS
push es
pushad ; Save _all_ extended registers
cld ; Clear direction flag
LOAD_DS ; Load DS register
; Send an EOI to the PIC
mov al,20h ; Send EOI to PIC
cmp [BYTE ebx+_IRQ],8 ; Clear PIC1 first if IRQ >= 8
jb @@1
out 0A0h,al
@@1: out 20h,al
; Check for mutual exclusion
cmp [BYTE ebx+_Inside],1
je @@ChainOldHandler
mov [BYTE ebx+_Inside],1
; Call the C interrupt handler function
mov [ebx+seg_IRQStack],ss ; Switch to local stack
mov [ebx+ptr_IRQStack],esp
mov [TempSeg],ds
mov ss,[TempSeg]
lea esp,[ebx+_IRQStack]
sti ; Re-enable interrupts
push ebx
call [DWORD ebx+_CHandler]
pop ebx
cli
mov ss,[ebx+seg_IRQStack] ; Restore previous stack
mov esp,[ebx+ptr_IRQStack]
or eax,eax
jz @@ChainOldHandler ; Chain if not handled for shared IRQ
@@Exit: mov [BYTE ebx+_Inside],0
popad ; Restore all extended registers
pop es
pop ds
pop ebx
iret ; Return from interrupt
@@ChainOldHandler:
cmp [DWORD ebx+_PrevIRQ],0
jz @@Exit
mov [BYTE ebx+_Inside],0
mov eax,[DWORD ebx+_PrevIRQ]
mov ebx,[DWORD ebx+_PrevIRQ+4]
mov [DWORD _PrevIRQ],eax
mov [DWORD _PrevIRQ+4],ebx
popad ; Restore all extended registers
pop es
pop ds
pop ebx
jmp [cs:_PrevIRQ] ; Chain to previous IRQ handler
cprocend
cpublic _PM_irqISRTemplateEnd
endif
;----------------------------------------------------------------------------
; PM_keyISR - keyboard interrupt subroutine dispatcher
;----------------------------------------------------------------------------
; Hardware interrupt handler for the keyboard interrupt, to dispatch control
; to high level C based subroutines. We save the state of all registers
; in this routine, and switch to a local stack. Interrupts are *off*
; when we call the user code.
;
; NOTE: This routine switches to a local stack before calling any C code,
; and hence is _not_ re-entrant. However we ensure within this routine
; mutual exclusion to the keyboard handling routine.
;----------------------------------------------------------------------------
cprocfar _PM_keyISR
push ds ; Save value of DS
push es
pushad ; Save _all_ extended registers
cld ; Clear direction flag
LOAD_DS ; Load DS register
cmp [BYTE KyInside],1 ; Check for mutual exclusion
je @@Reissued
mov [BYTE KyInside],1
NEWSTK KyStack ; Switch to local stack
call [CPTR _PM_keyHandler] ; Call C code
RESTSTK KyStack ; Restore previous stack
mov [BYTE KyInside],0
@@Exit: popad ; Restore all extended registers
pop es
pop ds
iret ; Return from interrupt
; When the BIOS keyboard handler needs to change the SHIFT status lights
; on the keyboard, in the process of doing this the keyboard controller
; re-issues another interrupt, while the current handler is still executing.
; If we recieve another interrupt while still handling the current one,
; then simply chain directly to the previous handler.
;
; Note that for most DOS extenders, the real mode interrupt handler that we
; install takes care of this for us.
@@Reissued:
ifdef TNT
push eax
push ebx
push ecx
pushfd ; Push flags on stack to simulate interrupt
mov ax,250Eh ; Call real mode procedure function
mov ebx,[_PM_prevRealKey]
mov ecx,1 ; Copy real mode flags to real mode stack
int 21h ; Call the real mode code
popfd
pop ecx
pop ebx
pop eax
else
pushf
ifdef USE_NASM
call far dword [_PM_prevKey]
else
call [_PM_prevKey]
endif
endif
jmp @@Exit
cprocend
;----------------------------------------------------------------------------
; PM_chainPrevkey - Chain to previous key interrupt and return
;----------------------------------------------------------------------------
; Chains to the previous key interrupt routine and returns control
; back to the high level interrupt handler.
;----------------------------------------------------------------------------
cprocstart PM_chainPrevKey
ifdef TNT
push eax
push ebx
push ecx
pushfd ; Push flags on stack to simulate interrupt
mov ax,250Eh ; Call real mode procedure function
mov ebx,[_PM_prevRealKey]
mov ecx,1 ; Copy real mode flags to real mode stack
int 21h ; Call the real mode code
popfd
pop ecx
pop ebx
pop eax
ret
else
; YIKES! For some strange reason, when execution returns from the
; previous keyboard handler, interrupts are re-enabled!! Since we expect
; interrupts to remain off during the duration of our handler, this can
; cause havoc. However our stack macros always turn off interrupts, so they
; will be off when we exit this routine. Obviously there is a tiny weeny
; window when interrupts will be enabled, but there is nothing we can
; do about this.
SWAPSTK KyStack ; Swap back to previous stack
pushf ; Push flags on stack to simulate interrupt
ifdef USE_NASM
call far dword [_PM_prevKey]
else
call [_PM_prevKey]
endif
SWAPSTK KyStack ; Swap back to C stack again
ret
endif
cprocend
;----------------------------------------------------------------------------
; PM_key15ISR - Int 15h keyboard interrupt subroutine dispatcher
;----------------------------------------------------------------------------
; This routine gets called if we have been called to handle the Int 15h
; keyboard interrupt callout from real mode.
;
; Entry: AX - Hardware scan code to process
; Exit: AX - Hardware scan code to process (0 to ignore)
;----------------------------------------------------------------------------
cprocfar _PM_key15ISR
push ds
push es
LOAD_DS
cmp ah,4Fh
jnz @@NotOurs ; Quit if not keyboard callout
pushad
cld ; Clear direction flag
xor ah,ah ; AX := scan code
NEWSTK Ky15Stack ; Switch to local stack
push _ax
call [CPTR _PM_key15Handler] ; Call C code
_add sp,2,4
RESTSTK Ky15Stack ; Restore previous stack
test ax,ax
jz @@1
stc ; Set carry to process as normal
jmp @@2
@@1: clc ; Clear carry to ignore scan code
@@2: popad
jmp @@Exit ; We are done
@@NotOurs:
ifdef TNT
push eax
push ebx
push ecx
pushfd ; Push flags on stack to simulate interrupt
mov ax,250Eh ; Call real mode procedure function
mov ebx,[_PM_prevRealKey15]
mov ecx,1 ; Copy real mode flags to real mode stack
int 21h ; Call the real mode code
popfd
pop ecx
pop ebx
pop eax
else
pushf
ifdef USE_NASM
call far dword [_PM_prevKey15]
else
call [_PM_prevKey15]
endif
endif
@@Exit: pop es
pop ds
ifdef flatmodel
retf 4
else
retf 2
endif
cprocend
;----------------------------------------------------------------------------
; PM_breakISR - Control Break interrupt subroutine dispatcher
;----------------------------------------------------------------------------
; Hardware interrupt handler for the Ctrl-Break interrupt. We simply set
; the Ctrl-Break flag to a 1 and leave (note that this is accessed through
; a far pointer, as it may well be located in conventional memory).
;----------------------------------------------------------------------------
cprocfar _PM_breakISR
sti
push ds ; Save value of DS
push es
push _bx
LOAD_DS ; Load DS register
ifdef flatmodel
mov ebx,[_PM_ctrlBPtr]
else
les bx,[_PM_ctrlBPtr]
endif
mov [UINT _ES _bx],1
; Run alternate break handler code if installed
cmp [CPTR _PM_breakHandler],0
je @@Exit
pushad
mov _ax,1
push _ax
call [CPTR _PM_breakHandler] ; Call C code
pop _ax
popad
@@Exit: pop _bx
pop es
pop ds
iret ; Return from interrupt
cprocend
;----------------------------------------------------------------------------
; int PM_ctrlBreakHit(int clearFlag)
;----------------------------------------------------------------------------
; Returns the current state of the Ctrl-Break flag and possibly clears it.
;----------------------------------------------------------------------------
cprocstart PM_ctrlBreakHit
ARG clearFlag:UINT
enter_c
pushf ; Save interrupt status
push es
ifdef flatmodel
mov ebx,[_PM_ctrlBPtr]
else
les bx,[_PM_ctrlBPtr]
endif
cli ; No interrupts thanks!
mov _ax,[_ES _bx]
test [BYTE clearFlag],1
jz @@Done
mov [UINT _ES _bx],0
@@Done: pop es
popf ; Restore interrupt status
leave_c
ret
cprocend
;----------------------------------------------------------------------------
; PM_ctrlCISR - Control Break interrupt subroutine dispatcher
;----------------------------------------------------------------------------
; Hardware interrupt handler for the Ctrl-C interrupt. We simply set
; the Ctrl-C flag to a 1 and leave (note that this is accessed through
; a far pointer, as it may well be located in conventional memory).
;----------------------------------------------------------------------------
cprocfar _PM_ctrlCISR
sti
push ds ; Save value of DS
push es
push _bx
LOAD_DS ; Load DS register
ifdef flatmodel
mov ebx,[_PM_ctrlCPtr]
else
les bx,[_PM_ctrlCPtr]
endif
mov [UINT _ES _bx],1
; Run alternate break handler code if installed
cmp [CPTR _PM_breakHandler],0
je @@Exit
pushad
mov _ax,0
push _ax
call [CPTR _PM_breakHandler] ; Call C code
pop _ax
popad
@@Exit: pop _bx
pop es
pop ds
iret ; Return from interrupt
iretd
cprocend
;----------------------------------------------------------------------------
; int PM_ctrlCHit(int clearFlag)
;----------------------------------------------------------------------------
; Returns the current state of the Ctrl-C flag and possibly clears it.
;----------------------------------------------------------------------------
cprocstart PM_ctrlCHit
ARG clearFlag:UINT
enter_c
pushf ; Save interrupt status
push es
ifdef flatmodel
mov ebx,[_PM_ctrlCPtr]
else
les bx,[_PM_ctrlCPtr]
endif
cli ; No interrupts thanks!
mov _ax,[_ES _bx]
test [BYTE clearFlag],1
jz @@Done
mov [UINT _ES _bx],0
@@Done:
pop es
popf ; Restore interrupt status
leave_c
ret
cprocend
;----------------------------------------------------------------------------
; PM_criticalISR - Control Error handler interrupt subroutine dispatcher
;----------------------------------------------------------------------------
; Interrupt handler for the MSDOS Critical Error interrupt, to dispatch
; control to high level C based subroutines. We save the state of all
; registers in this routine, and switch to a local stack. We also pass
; the values of the AX and DI registers to the as pointers, so that the
; values can be modified before returning to MSDOS.
;----------------------------------------------------------------------------
cprocfar _PM_criticalISR
sti
push ds ; Save value of DS
push es
push _bx ; Save register values changed
cld ; Clear direction flag
LOAD_DS ; Load DS register
ifdef flatmodel
mov ebx,[_PM_critPtr]
else
les bx,[_PM_critPtr]
endif
mov [_ES _bx],ax
mov [_ES _bx+2],di
; Run alternate critical handler code if installed
cmp [CPTR _PM_critHandler],0
je @@NoAltHandler
pushad
push _di
push _ax
call [CPTR _PM_critHandler] ; Call C code
_add sp,4,8
popad
pop _bx
pop es
pop ds
iret ; Return from interrupt
@@NoAltHandler:
mov ax,3 ; Tell MSDOS to fail the operation
pop _bx
pop es
pop ds
iret ; Return from interrupt
cprocend
;----------------------------------------------------------------------------
; int PM_criticalError(int *axVal,int *diVal,int clearFlag)
;----------------------------------------------------------------------------
; Returns the current state of the critical error flags, and the values that
; MSDOS passed in the AX and DI registers to our handler.
;----------------------------------------------------------------------------
cprocstart PM_criticalError
ARG axVal:DPTR, diVal:DPTR, clearFlag:UINT
enter_c
pushf ; Save interrupt status
push es
ifdef flatmodel
mov ebx,[_PM_critPtr]
else
les bx,[_PM_critPtr]
endif
cli ; No interrupts thanks!
xor _ax,_ax
xor _di,_di
mov ax,[_ES _bx]
mov di,[_ES _bx+2]
test [BYTE clearFlag],1
jz @@NoClear
mov [ULONG _ES _bx],0
@@NoClear:
_les _bx,[axVal]
mov [_ES _bx],_ax
_les _bx,[diVal]
mov [_ES _bx],_di
pop es
popf ; Restore interrupt status
leave_c
ret
cprocend
;----------------------------------------------------------------------------
; void PM_setMouseHandler(int mask, PM_mouseHandler mh)
;----------------------------------------------------------------------------
cprocstart _PM_setMouseHandler
ARG mouseMask:UINT
enter_c
push es
mov ax,0Ch ; AX := Function 12 - install interrupt sub
mov _cx,[mouseMask] ; CX := mouse mask
mov _dx,offset _PM_mouseISR
push cs
pop es ; ES:_DX -> mouse handler
int 33h ; Call mouse driver
pop es
leave_c
ret
cprocend
ifdef flatmodel
;----------------------------------------------------------------------------
; void PM_mousePMCB(void)
;----------------------------------------------------------------------------
; Mouse realmode callback routine. Upon entry to this routine, we recieve
; the following from the DPMI server:
;
; Entry: DS:_SI -> Real mode stack at time of call
; ES:_DI -> Real mode register data structure
; SS:_SP -> Locked protected mode stack to use
;----------------------------------------------------------------------------
cprocfar _PM_mousePMCB
pushad
mov eax,[es:_di+1Ch] ; Load register values from real mode
mov ebx,[es:_di+10h]
mov ecx,[es:_di+18h]
mov edx,[es:_di+14h]
mov esi,[es:_di+04h]
mov edi,[es:_di]
call _PM_mouseISR ; Call the mouse handler
popad
mov ax,[ds:_si]
mov [es:_di+2Ah],ax ; Plug in return IP address
mov ax,[ds:_si+2]
mov [es:_di+2Ch],ax ; Plug in return CS value
add [WORD es:_di+2Eh],4 ; Remove return address from stack
iret ; Go back to real mode!
cprocend
;----------------------------------------------------------------------------
; void PM_int10PMCB(void)
;----------------------------------------------------------------------------
; int10 realmode callback routine. Upon entry to this routine, we recieve
; the following from the DPMI server:
;
; Entry: DS:ESI -> Real mode stack at time of call
; ES:EDI -> Real mode register data structure
; SS:ESP -> Locked protected mode stack to use
;----------------------------------------------------------------------------
cprocfar _PM_int10PMCB
pushad
push ds
push es
push fs
pushfd
pop eax
mov [es:edi+20h],ax ; Save return flag status
mov ax,[ds:esi]
mov [es:edi+2Ah],ax ; Plug in return IP address
mov ax,[ds:esi+2]
mov [es:edi+2Ch],ax ; Plug in return CS value
add [WORD es:edi+2Eh],4 ; Remove return address from stack
; Call the install int10 handler in protected mode. This function gets called
; with DS set to the current data selector, and ES:EDI pointing the the
; real mode DPMI register structure at the time of the interrupt. The
; handle must be written in assembler to be able to extract the real mode
; register values from the structure
push es
pop fs ; FS:EDI -> real mode registers
LOAD_DS
NEWSTK Int10Stack ; Switch to local stack
call [_PM_int10Handler]
RESTSTK Int10Stack ; Restore previous stack
pop fs
pop es
pop ds
popad
iret ; Go back to real mode!
cprocend
endif
cpublic _PM_pmdosCodeEnd
endcodeseg _pmdos
END ; End of module
|
; A093467: a(1) = 1, a(2) = 2; for n >= 2, a(n+1) = a(n) + Sum_{i = 1..n} (a(i) - a(1)).
; 1,2,3,6,14,35,90,234,611,1598,4182,10947,28658,75026,196419,514230,1346270,3524579,9227466,24157818,63245987,165580142,433494438,1134903171,2971215074,7778742050,20365011075,53316291174,139583862446,365435296163,956722026042,2504730781962,6557470319843,17167680177566,44945570212854,117669030460995,308061521170130,806515533049394,2111485077978051,5527939700884758
mov $3,1
lpb $0
mov $1,$3
lpb $0
sub $0,$3
add $1,$2
add $2,$1
lpe
lpe
add $1,1
|
dnl Alpha ev6 mpn_mul_1 -- Multiply a limb vector with a limb and store the
dnl result in a second limb vector.
dnl Copyright 2000, 2001, 2005 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C INPUT PARAMETERS
C res_ptr r16
C s1_ptr r17
C size r18
C s2_limb r19
C This code runs at 2.25 cycles/limb on EV6.
C This code was written in close cooperation with ev6 pipeline expert
C Steve Root. Any errors are tege's fault, though.
C Code structure:
C code for n < 8
C code for n > 8 code for (n mod 8)
C code for (n div 8) feed-in code
C 8-way unrolled loop
C wind-down code
C Some notes about unrolled loop:
C
C r1-r8 multiplies and workup
C r21-r28 multiplies and workup
C r9-r12 loads
C r0 -1
C r20,r29,r13-r15 scramble
C
C We're doing 7 of the 8 carry propagations with a br fixup code and 1 with a
C put-the-carry-into-hi. The idea is that these branches are very rarely
C taken, and since a non-taken branch consumes no resources, that is better
C than an addq.
C
C Software pipeline: a load in cycle #09, feeds a mul in cycle #16, feeds an
C add NEXT cycle #09 which feeds a store in NEXT cycle #02
C The code could use some further work:
C 1. Speed up really small multiplies. The default alpha/mul_1.asm code is
C faster than this for size < 3.
C 2. Improve feed-in code, perhaps with the equivalent of switch(n%8) unless
C that is too costly.
C 3. Consider using 4-way unrolling, even if that runs slower.
C 4. Reduce register usage. In particular, try to avoid using r29.
ASM_START()
PROLOGUE(mpn_mul_1)
cmpult r18, 8, r1
beq r1, $Large
$Lsmall:
ldq r2,0(r17) C r2 = s1_limb
lda r18,-1(r18) C size--
mulq r2,r19,r3 C r3 = prod_low
bic r31,r31,r4 C clear cy_limb
umulh r2,r19,r0 C r0 = prod_high
beq r18,$Le1a C jump if size was == 1
ldq r2,8(r17) C r2 = s1_limb
lda r18,-1(r18) C size--
stq r3,0(r16)
beq r18,$Le2a C jump if size was == 2
ALIGN(8)
$Lopa: mulq r2,r19,r3 C r3 = prod_low
addq r4,r0,r0 C cy_limb = cy_limb + 'cy'
lda r18,-1(r18) C size--
umulh r2,r19,r4 C r4 = cy_limb
ldq r2,16(r17) C r2 = s1_limb
lda r17,8(r17) C s1_ptr++
addq r3,r0,r3 C r3 = cy_limb + prod_low
stq r3,8(r16)
cmpult r3,r0,r0 C r0 = carry from (cy_limb + prod_low)
lda r16,8(r16) C res_ptr++
bne r18,$Lopa
$Le2a: mulq r2,r19,r3 C r3 = prod_low
addq r4,r0,r0 C cy_limb = cy_limb + 'cy'
umulh r2,r19,r4 C r4 = cy_limb
addq r3,r0,r3 C r3 = cy_limb + prod_low
cmpult r3,r0,r0 C r0 = carry from (cy_limb + prod_low)
stq r3,8(r16)
addq r4,r0,r0 C cy_limb = prod_high + cy
ret r31,(r26),1
$Le1a: stq r3,0(r16)
ret r31,(r26),1
$Large:
lda r30, -224(r30)
stq r26, 0(r30)
stq r9, 8(r30)
stq r10, 16(r30)
stq r11, 24(r30)
stq r12, 32(r30)
stq r13, 40(r30)
stq r14, 48(r30)
stq r15, 56(r30)
stq r29, 64(r30)
and r18, 7, r20 C count for the first loop, 0-7
srl r18, 3, r18 C count for unrolled loop
bis r31, r31, r21
beq r20, $L_8_or_more C skip first loop
$L_9_or_more:
ldq r2,0(r17) C r2 = s1_limb
lda r17,8(r17) C s1_ptr++
lda r20,-1(r20) C size--
mulq r2,r19,r3 C r3 = prod_low
umulh r2,r19,r21 C r21 = prod_high
beq r20,$Le1b C jump if size was == 1
bis r31, r31, r0 C FIXME: shouldn't need this
ldq r2,0(r17) C r2 = s1_limb
lda r17,8(r17) C s1_ptr++
lda r20,-1(r20) C size--
stq r3,0(r16)
lda r16,8(r16) C res_ptr++
beq r20,$Le2b C jump if size was == 2
ALIGN(8)
$Lopb: mulq r2,r19,r3 C r3 = prod_low
addq r21,r0,r0 C cy_limb = cy_limb + 'cy'
lda r20,-1(r20) C size--
umulh r2,r19,r21 C r21 = prod_high
ldq r2,0(r17) C r2 = s1_limb
lda r17,8(r17) C s1_ptr++
addq r3,r0,r3 C r3 = cy_limb + prod_low
stq r3,0(r16)
cmpult r3,r0,r0 C r0 = carry from (cy_limb + prod_low)
lda r16,8(r16) C res_ptr++
bne r20,$Lopb
$Le2b: mulq r2,r19,r3 C r3 = prod_low
addq r21,r0,r0 C cy_limb = cy_limb + 'cy'
umulh r2,r19,r21 C r21 = prod_high
addq r3,r0,r3 C r3 = cy_limb + prod_low
cmpult r3,r0,r0 C r0 = carry from (cy_limb + prod_low)
stq r3,0(r16)
lda r16,8(r16) C res_ptr++
addq r21,r0,r21 C cy_limb = prod_high + cy
br r31, $L_8_or_more
$Le1b: stq r3,0(r16)
lda r16,8(r16) C res_ptr++
$L_8_or_more:
lda r0, -1(r31) C put -1 in r0, for tricky loop control
lda r17, -32(r17) C L1 bookkeeping
lda r18, -1(r18) C decrement count
ldq r9, 32(r17) C L1
ldq r10, 40(r17) C L1
mulq r9, r19, r22 C U1 #07
ldq r11, 48(r17) C L1
umulh r9, r19, r23 C U1 #08
ldq r12, 56(r17) C L1
mulq r10, r19, r24 C U1 #09
ldq r9, 64(r17) C L1
lda r17, 64(r17) C L1 bookkeeping
umulh r10, r19, r25 C U1 #11
mulq r11, r19, r26 C U1 #12
umulh r11, r19, r27 C U1 #13
mulq r12, r19, r28 C U1 #14
ldq r10, 8(r17) C L1
umulh r12, r19, r1 C U1 #15
ldq r11, 16(r17) C L1
mulq r9, r19, r2 C U1 #16
ldq r12, 24(r17) C L1
umulh r9, r19, r3 C U1 #17
addq r21, r22, r13 C L1 mov
mulq r10, r19, r4 C U1 #18
addq r23, r24, r22 C L0 sum 2 mul's
cmpult r13, r21, r14 C L1 carry from sum
bgt r18, $L_16_or_more
cmpult r22, r24, r24 C U0 carry from sum
umulh r10, r19, r5 C U1 #02
addq r25, r26, r23 C U0 sum 2 mul's
mulq r11, r19, r6 C U1 #03
cmpult r23, r26, r25 C U0 carry from sum
umulh r11, r19, r7 C U1 #04
addq r27, r28, r28 C U0 sum 2 mul's
mulq r12, r19, r8 C U1 #05
cmpult r28, r27, r15 C L0 carry from sum
lda r16, 32(r16) C L1 bookkeeping
addq r13, r31, r13 C U0 start carry cascade
umulh r12, r19, r21 C U1 #06
br r31, $ret0c
$L_16_or_more:
C ---------------------------------------------------------------
subq r18,1,r18
cmpult r22, r24, r24 C U0 carry from sum
ldq r9, 32(r17) C L1
umulh r10, r19, r5 C U1 #02
addq r25, r26, r23 C U0 sum 2 mul's
mulq r11, r19, r6 C U1 #03
cmpult r23, r26, r25 C U0 carry from sum
umulh r11, r19, r7 C U1 #04
addq r27, r28, r28 C U0 sum 2 mul's
mulq r12, r19, r8 C U1 #05
cmpult r28, r27, r15 C L0 carry from sum
lda r16, 32(r16) C L1 bookkeeping
addq r13, r31, r13 C U0 start carry cascade
umulh r12, r19, r21 C U1 #06
C beq r13, $fix0w C U0
$ret0w: addq r22, r14, r26 C L0
ldq r10, 40(r17) C L1
mulq r9, r19, r22 C U1 #07
beq r26, $fix1w C U0
$ret1w: addq r23, r24, r27 C L0
ldq r11, 48(r17) C L1
umulh r9, r19, r23 C U1 #08
beq r27, $fix2w C U0
$ret2w: addq r28, r25, r28 C L0
ldq r12, 56(r17) C L1
mulq r10, r19, r24 C U1 #09
beq r28, $fix3w C U0
$ret3w: addq r1, r2, r20 C L0 sum 2 mul's
ldq r9, 64(r17) C L1
addq r3, r4, r2 C L0 #10 2 mul's
lda r17, 64(r17) C L1 bookkeeping
cmpult r20, r1, r29 C U0 carry from sum
umulh r10, r19, r25 C U1 #11
cmpult r2, r4, r4 C U0 carry from sum
stq r13, -32(r16) C L0
stq r26, -24(r16) C L1
mulq r11, r19, r26 C U1 #12
addq r5, r6, r14 C U0 sum 2 mul's
stq r27, -16(r16) C L0
stq r28, -8(r16) C L1
umulh r11, r19, r27 C U1 #13
cmpult r14, r6, r3 C U0 carry from sum
C could do cross-jumping here:
C bra $L_middle_of_unrolled_loop
mulq r12, r19, r28 C U1 #14
addq r7, r3, r5 C L0 eat carry
addq r20, r15, r20 C U0 carry cascade
ldq r10, 8(r17) C L1
umulh r12, r19, r1 C U1 #15
beq r20, $fix4 C U0
$ret4w: addq r2, r29, r6 C L0
ldq r11, 16(r17) C L1
mulq r9, r19, r2 C U1 #16
beq r6, $fix5 C U0
$ret5w: addq r14, r4, r7 C L0
ldq r12, 24(r17) C L1
umulh r9, r19, r3 C U1 #17
beq r7, $fix6 C U0
$ret6w: addq r5, r8, r8 C L0 sum 2
addq r21, r22, r13 C L1 sum 2 mul's
mulq r10, r19, r4 C U1 #18
addq r23, r24, r22 C L0 sum 2 mul's
cmpult r13, r21, r14 C L1 carry from sum
ble r18, $Lend C U0
C ---------------------------------------------------------------
ALIGN(16)
$Loop:
umulh r0, r18, r18 C U1 #01 decrement r18!
cmpult r8, r5, r29 C L0 carry from last bunch
cmpult r22, r24, r24 C U0 carry from sum
ldq r9, 32(r17) C L1
umulh r10, r19, r5 C U1 #02
addq r25, r26, r23 C U0 sum 2 mul's
stq r20, 0(r16) C L0
stq r6, 8(r16) C L1
mulq r11, r19, r6 C U1 #03
cmpult r23, r26, r25 C U0 carry from sum
stq r7, 16(r16) C L0
stq r8, 24(r16) C L1
umulh r11, r19, r7 C U1 #04
bis r31, r31, r31 C L0 st slosh
bis r31, r31, r31 C L1 st slosh
addq r27, r28, r28 C U0 sum 2 mul's
mulq r12, r19, r8 C U1 #05
cmpult r28, r27, r15 C L0 carry from sum
lda r16, 64(r16) C L1 bookkeeping
addq r13, r29, r13 C U0 start carry cascade
umulh r12, r19, r21 C U1 #06
beq r13, $fix0 C U0
$ret0: addq r22, r14, r26 C L0
ldq r10, 40(r17) C L1
mulq r9, r19, r22 C U1 #07
beq r26, $fix1 C U0
$ret1: addq r23, r24, r27 C L0
ldq r11, 48(r17) C L1
umulh r9, r19, r23 C U1 #08
beq r27, $fix2 C U0
$ret2: addq r28, r25, r28 C L0
ldq r12, 56(r17) C L1
mulq r10, r19, r24 C U1 #09
beq r28, $fix3 C U0
$ret3: addq r1, r2, r20 C L0 sum 2 mul's
ldq r9, 64(r17) C L1
addq r3, r4, r2 C L0 #10 2 mul's
bis r31, r31, r31 C U1 mul hole
lda r17, 64(r17) C L1 bookkeeping
cmpult r20, r1, r29 C U0 carry from sum
umulh r10, r19, r25 C U1 #11
cmpult r2, r4, r4 C U0 carry from sum
stq r13, -32(r16) C L0
stq r26, -24(r16) C L1
mulq r11, r19, r26 C U1 #12
addq r5, r6, r14 C U0 sum 2 mul's
stq r27, -16(r16) C L0
stq r28, -8(r16) C L1
umulh r11, r19, r27 C U1 #13
bis r31, r31, r31 C L0 st slosh
bis r31, r31, r31 C L1 st slosh
cmpult r14, r6, r3 C U0 carry from sum
$L_middle_of_unrolled_loop:
mulq r12, r19, r28 C U1 #14
addq r7, r3, r5 C L0 eat carry
addq r20, r15, r20 C U0 carry cascade
ldq r10, 8(r17) C L1
umulh r12, r19, r1 C U1 #15
beq r20, $fix4 C U0
$ret4: addq r2, r29, r6 C L0
ldq r11, 16(r17) C L1
mulq r9, r19, r2 C U1 #16
beq r6, $fix5 C U0
$ret5: addq r14, r4, r7 C L0
ldq r12, 24(r17) C L1
umulh r9, r19, r3 C U1 #17
beq r7, $fix6 C U0
$ret6: addq r5, r8, r8 C L0 sum 2
addq r21, r22, r13 C L1 sum 2 mul's
mulq r10, r19, r4 C U1 #18
addq r23, r24, r22 C L0 sum 2 mul's
cmpult r13, r21, r14 C L1 carry from sum
bgt r18, $Loop C U0
C ---------------------------------------------------------------
$Lend:
cmpult r8, r5, r29 C L0 carry from last bunch
cmpult r22, r24, r24 C U0 carry from sum
umulh r10, r19, r5 C U1 #02
addq r25, r26, r23 C U0 sum 2 mul's
stq r20, 0(r16) C L0
stq r6, 8(r16) C L1
mulq r11, r19, r6 C U1 #03
cmpult r23, r26, r25 C U0 carry from sum
stq r7, 16(r16) C L0
stq r8, 24(r16) C L1
umulh r11, r19, r7 C U1 #04
addq r27, r28, r28 C U0 sum 2 mul's
mulq r12, r19, r8 C U1 #05
cmpult r28, r27, r15 C L0 carry from sum
lda r16, 64(r16) C L1 bookkeeping
addq r13, r29, r13 C U0 start carry cascade
umulh r12, r19, r21 C U1 #06
beq r13, $fix0c C U0
$ret0c: addq r22, r14, r26 C L0
beq r26, $fix1c C U0
$ret1c: addq r23, r24, r27 C L0
beq r27, $fix2c C U0
$ret2c: addq r28, r25, r28 C L0
beq r28, $fix3c C U0
$ret3c: addq r1, r2, r20 C L0 sum 2 mul's
addq r3, r4, r2 C L0 #10 2 mul's
lda r17, 64(r17) C L1 bookkeeping
cmpult r20, r1, r29 C U0 carry from sum
cmpult r2, r4, r4 C U0 carry from sum
stq r13, -32(r16) C L0
stq r26, -24(r16) C L1
addq r5, r6, r14 C U0 sum 2 mul's
stq r27, -16(r16) C L0
stq r28, -8(r16) C L1
cmpult r14, r6, r3 C U0 carry from sum
addq r7, r3, r5 C L0 eat carry
addq r20, r15, r20 C U0 carry cascade
beq r20, $fix4c C U0
$ret4c: addq r2, r29, r6 C L0
beq r6, $fix5c C U0
$ret5c: addq r14, r4, r7 C L0
beq r7, $fix6c C U0
$ret6c: addq r5, r8, r8 C L0 sum 2
cmpult r8, r5, r29 C L0 carry from last bunch
stq r20, 0(r16) C L0
stq r6, 8(r16) C L1
stq r7, 16(r16) C L0
stq r8, 24(r16) C L1
addq r29, r21, r0
ldq r26, 0(r30)
ldq r9, 8(r30)
ldq r10, 16(r30)
ldq r11, 24(r30)
ldq r12, 32(r30)
ldq r13, 40(r30)
ldq r14, 48(r30)
ldq r15, 56(r30)
ldq r29, 64(r30)
lda r30, 224(r30)
ret r31, (r26), 1
C $fix0w: bis r14, r29, r14 C join carries
C br r31, $ret0w
$fix1w: bis r24, r14, r24 C join carries
br r31, $ret1w
$fix2w: bis r25, r24, r25 C join carries
br r31, $ret2w
$fix3w: bis r15, r25, r15 C join carries
br r31, $ret3w
$fix0: bis r14, r29, r14 C join carries
br r31, $ret0
$fix1: bis r24, r14, r24 C join carries
br r31, $ret1
$fix2: bis r25, r24, r25 C join carries
br r31, $ret2
$fix3: bis r15, r25, r15 C join carries
br r31, $ret3
$fix4: bis r29, r15, r29 C join carries
br r31, $ret4
$fix5: bis r4, r29, r4 C join carries
br r31, $ret5
$fix6: addq r5, r4, r5 C can't carry twice!
br r31, $ret6
$fix0c: bis r14, r29, r14 C join carries
br r31, $ret0c
$fix1c: bis r24, r14, r24 C join carries
br r31, $ret1c
$fix2c: bis r25, r24, r25 C join carries
br r31, $ret2c
$fix3c: bis r15, r25, r15 C join carries
br r31, $ret3c
$fix4c: bis r29, r15, r29 C join carries
br r31, $ret4c
$fix5c: bis r4, r29, r4 C join carries
br r31, $ret5c
$fix6c: addq r5, r4, r5 C can't carry twice!
br r31, $ret6c
EPILOGUE(mpn_mul_1)
ASM_END()
|
BattleCommand_MirrorCoat:
; mirrorcoat
ld a, 1
ld [wAttackMissed], a
ld a, BATTLE_VARS_LAST_COUNTER_MOVE_OPP
call GetBattleVar
and a
ret z
ld b, a
callfar GetMoveEffect
ld a, b
cp EFFECT_MIRROR_COAT
ret z
call BattleCommand_ResetTypeMatchup
ld a, [wTypeMatchup]
and a
ret z
call CheckOpponentWentFirst
ret z
ld a, BATTLE_VARS_LAST_COUNTER_MOVE_OPP
call GetBattleVar
ld de, wStringBuffer1
call GetMoveData
ld a, [wStringBuffer1 + MOVE_POWER]
and a
ret z
ld a, [wStringBuffer1 + MOVE_TYPE]
cp SPECIAL
ret c
; BUG: Move should fail with all non-damaging battle actions
ld hl, wCurDamage
ld a, [hli]
or [hl]
ret z
ld a, [hl]
add a
ld [hld], a
ld a, [hl]
adc a
ld [hl], a
jr nc, .capped
ld a, $ff
ld [hli], a
ld [hl], a
.capped
xor a
ld [wAttackMissed], a
ret
|
; A111262: a(n) = (1/n)*Sum_{k=1..n} F(4*k)*B(2*n-2*k)*binomial(2*n,2*k)), where F are Fibonacci numbers and B are Bernoulli numbers.
; Submitted by Christian Krause
; 3,12,65,403,2652,17889,121859,833260,5706081,39096531,267936188,1836369217,12586419075,86267964108,591287758337,4052742230419,27777897084444,190392509164065,1304969593244291,8944394450283436,61305791052771873,420196141594478547,2880067196640622460,19740274225810653313,135301852360264230147,927372692233809021324,6356306993113478830529,43566776259134012462995,298611126819707937510876,2046711111475898067743841,14028366653503924760487683,96151855463031537409414252,659034621587664377342853345
mul $0,2
mov $3,1
lpb $0
sub $0,1
mov $2,$3
add $3,$1
mov $1,$2
lpe
mul $1,2
add $1,1
add $1,$3
add $1,1
mul $3,$1
mov $0,$3
|
db 0 ; species ID placeholder
db 50, 65, 45, 95, 85, 65
; hp atk def spd sat sdf
db GRASS, GRASS ; type
db 45 ; catch rate
db 141 ; base exp
db NO_ITEM, NO_ITEM ; items
db GENDER_F12_5 ; gender ratio
db 100 ; unknown 1
db 20 ; step cycles to hatch
db 5 ; unknown 2
INCBIN "gfx/pokemon/grovyle/front.dimensions"
db 0, 0, 0, 0 ; padding
db GROWTH_MEDIUM_SLOW ; growth rate
dn EGG_MONSTER, EGG_DRAGON ; egg groups
; tm/hm learnset
tmhm DYNAMICPUNCH, HEADBUTT, CURSE, TOXIC, ROCK_SMASH, HIDDEN_POWER, SUNNY_DAY, SWEET_SCENT, SNORE, PROTECT, GIGA_DRAIN, ENDURE, FRUSTRATION, SOLARBEAM, IRON_TAIL, DRAGONBREATH, RETURN, DIG, MUD_SLAP, DOUBLE_TEAM, SWAGGER, SLEEP_TALK, SWIFT, THUNDERPUNCH, DETECT, REST, ATTRACT, FURY_CUTTER, CUT, STRENGTH, FLASH
; end
|
; CRT0 for the Mattel Aquarius
;
; Stefano Bodrato Dec. 2000
;
; If an error occurs eg break we just drop back to BASIC
;
; $Id: aquarius_crt0.asm $
;
IF !DEFINED_CRT_ORG_CODE
;defc CRT_ORG_CODE = 14712
defc CRT_ORG_CODE = 14768
ENDIF
defc TAR__clib_exit_stack_size = 32
defc TAR__register_sp = -1
INCLUDE "crt/classic/crt_rules.inc"
org CRT_ORG_CODE
start:
ld (start1+1),sp ;Save entry stack
INCLUDE "crt/classic/crt_init_sp.asm"
INCLUDE "crt/classic/crt_init_atexit.asm"
call crt0_init_bss
ld (exitsp),sp
; Optional definition for auto MALLOC init
; it assumes we have free space between the end of
; the compiled program and the stack pointer
IF DEFINED_USING_amalloc
INCLUDE "crt/classic/crt_init_amalloc.asm"
ENDIF
call _main ;Call user program
cleanup:
;
; Deallocate memory which has been allocated here!
;
call crt0_exit
start1: ld sp,0 ;Restore stack to entry value
ret
|
Name: zel_main.asm
Type: file
Size: 45760
Last-Modified: '2016-05-13T04:23:03Z'
SHA-1: 6411697286279E61629E534475E84D8921693ED7
Description: null
|
; void _div_(div_t *d, int numer, int denom)
SECTION code_stdlib
PUBLIC _div_
EXTERN asm__div
_div_:
pop af
pop de
pop hl
pop bc
push bc
push hl
push de
push af
jp asm__div
|
; -----------------------------------------------------------------------------
; VIA init functions.
; Took code from Rich Cini's SBC OS and made it generic using macros and
; compile time dependency injection. Since most systems have two VIA's, I
; create two init routines.
; Martin Heermance <mheermance@gmail.com>
; -----------------------------------------------------------------------------
.scope
;
; Aliases
;
; I/O Locations for the 6522 VIA chip registers
.alias VIA_PRB $00
.alias VIA_PRA $01
.alias VIA_DDRB $02
.alias VIA_DDRA $03
.alias VIA_T1CL $04
.alias VIA_T1CH $05
.alias VIA_T1LL $06
.alias VIA_TALH $07
.alias VIA_T2CL $08
.alias VIA_T2CH $09
.alias VIA_SR $0a
.alias VIA_ACR $0b
.alias VIA_PCR $0c
.alias VIA_IFR $0d
.alias VIA_IER $0e
.alias VIA_PRA1 $0f
;
; Data segments
;
.data ZPDATA
.data BSS
.text
;
; Macros
;
.macro viaInit
lda #00
ldy #VIA_PCR ; zero out lower regsiters
_loop: sta _1,y
dey
bpl _loop
lda #$7f ; init two upper registers.
sta _1 + VIA_IFR
sta _1 + VIA_IER
.macend
;
; Functions
;
via1Init:
`viaInit VIA1_BASE
rts
via2Init:
`viaInit VIA2_BASE
rts
.scend
|
#pragma once
#include "BaseOption.hpp"
#include "UIManager.hpp"
namespace Big::UserInterface
{
class BreakOption : public BaseOption<BreakOption>
{
public:
explicit BreakOption() = default;
explicit BreakOption(const char* text, const char* description = nullptr, std::function<void()> action = [] {})
{
SetLeftText(((std::string)"~italic~[ " + text + " ]").c_str());
if (description)
SetDescription(description);
SetAction(std::move(action));
}
bool GetFlag(OptionFlag flag) override
{
if (flag == OptionFlag::Break)
{
return true;
}
return false;
}
~BreakOption() noexcept = default;
BreakOption(BreakOption const&) = default;
BreakOption& operator=(BreakOption const&) = default;
BreakOption(BreakOption&&) = default;
BreakOption& operator=(BreakOption&&) = default;
};
}
|
#pragma once
#include "../dependancies/stb/stb_image.h"
#include "../utils/utils.hpp"
#include "ray.hpp"
#include "../shaders/bsdf.hpp"
namespace core {
glm::vec3 reflect_ray(const glm::vec3& v, const glm::vec3& n);
glm::vec3 refract_ray(glm::vec3& ray_in, const glm::vec3& n, double ratio);
class Material {
public:
virtual bool bsdf(const Ray& ray_in, const utils::hit_details& rec, utils::scatter_details& srec) {return false;};
virtual double scattering_pdf(const Ray& ray_in, const utils::hit_details& rec, const Ray& scattered) {return 0;}
virtual glm::vec3 emitted(const Ray& ray_in, const utils::hit_details& rec, double u, double v, const glm::vec3& p) {return glm::vec3(0);};
virtual glm::vec3 get_albedo() {return alb;}
public:
glm::vec3 alb;
};
class Texture {
public:
virtual glm::vec3 value(double u, double v, const glm::vec3& p) = 0;
};
class SolidColor : public Texture{
public:
SolidColor() {}
SolidColor(glm::vec3 c) : color_value(c) {}
SolidColor(double red, double green, double blue)
: SolidColor(glm::vec3(red, green, blue)) {}
virtual glm::vec3 value(double u, double v, const glm::vec3& p) override {
return color_value;
}
private:
glm::vec3 color_value;
};
class ImageTexture : public Texture {
public:
const static int bytes_per_pixel = 3;
ImageTexture() : data(nullptr), width(0), height(0), bytes_per_scanline(0) {}
ImageTexture(const char* filename);
~ImageTexture(){
delete data;
}
virtual glm::vec3 value(double u, double v, const glm::vec3& p) override;
private:
unsigned char *data;
int width, height;
int bytes_per_scanline;
};
class CheckeredTexture: public Texture {
public:
CheckeredTexture() {}
CheckeredTexture(std::shared_ptr<Texture> _even, std::shared_ptr<Texture> _odd)
: even(_even), odd(_odd) {}
CheckeredTexture(glm::vec3 c1, glm::vec3 c2)
: even(std::make_shared<SolidColor>(c1)) , odd(std::make_shared<SolidColor>(c2)) {}
virtual glm::vec3 value(double u, double v, const glm::vec3& p) override;
public:
std::shared_ptr<Texture> odd, even;
};
class Emitter : public Material {
public:
Emitter(std::shared_ptr<Texture> a) : emit(a) {}
Emitter(glm::vec3 c) : emit(std::make_shared<SolidColor>(c)) {}
virtual bool bsdf(const Ray& r_in, const utils::hit_details& rec, utils::scatter_details& srec) override {
return false;
}
virtual glm::vec3 emitted(const Ray& ray_in, const utils::hit_details& rec,double u, double v, const glm::vec3& p) override {
if (rec.front_face) return emit->value(u, v, p);
else return glm::vec3(0);
}
public:
std::shared_ptr<Texture> emit;
glm::vec3 alb;
};
class Metal : public Material {
public:
Metal(const glm::vec3& a, double f) : alb(a), fuzz(f < 1 ? f : 1){}
virtual bool bsdf(const Ray& ray_in, const utils::hit_details& rec, utils::scatter_details& srec) override;
inline virtual glm::vec3 emitted(const Ray& ray_in, const utils::hit_details& rec, double u, double v, const glm::vec3& p) override { return glm::vec3(0,0,0);}
inline glm::vec3 get_albedo() override {return alb;}
public:
glm::vec3 alb;
double fuzz;
};
class Dielectric : public Material {
public:
Dielectric(double refraction_index, double f) : ir(refraction_index), fuzz(f < 1 ? f : 1), alb(glm::vec3(0)){}
virtual bool bsdf(const Ray& ray_in, const utils::hit_details& rec, utils::scatter_details& srec) override;
inline virtual glm::vec3 emitted(const Ray& ray_in, const utils::hit_details& rec, double u, double v, const glm::vec3& p) override { return glm::vec3(0,0,0);}
inline glm::vec3 get_albedo() override {return alb;}
public:
double ir;
double fuzz;
glm::vec3 alb;
private:
double reflectance(double cosine, double ref_idx);
};
class Lambertian : public Material {
public:
Lambertian(const glm::vec3& a) : albedo(std::make_shared<SolidColor>(a)), alb(a){}
Lambertian(std::shared_ptr<Texture> a) : albedo(a) {}
virtual bool bsdf(const Ray& ray_in, const utils::hit_details& rec, utils::scatter_details& srec) override;
virtual double scattering_pdf(const Ray& ray_in, const utils::hit_details& rec, const Ray& scattered) override;
inline virtual glm::vec3 emitted(const Ray& ray_in, const utils::hit_details& rec,double u, double v, const glm::vec3& p) override { return glm::vec3(0);}
inline glm::vec3 get_albedo() override {return alb;}
public:
std::shared_ptr<Texture> albedo;
glm::vec3 alb;
};
class Isotropic : public Material {
public:
Isotropic(glm::vec3 c) : albedo(std::make_shared<SolidColor>(c)), alb(c) {}
Isotropic(std::shared_ptr<Texture> a) : albedo(a) {}
virtual bool bsdf(const Ray& ray_in, const utils::hit_details& rec, utils::scatter_details& srec) override;
inline virtual double scattering_pdf(const Ray& ray_in, const utils::hit_details& rec, const Ray& scattered) override {return 0;};
inline virtual glm::vec3 emitted(const Ray& ray_in, const utils::hit_details& rec,double u, double v, const glm::vec3& p) override { return glm::vec3(0);}
inline glm::vec3 get_albedo() override {return alb;}
public:
glm::vec3 alb;
std::shared_ptr<Texture> albedo;
};
class Disney : public Material {
public:
Disney(const glm::vec3& a, float specular, float diffuse, float clearcoat, float transmission, bool thin);
bsdf::SurfaceParameters get_surface_point(const utils::hit_details& rec);
virtual bool bsdf(const Ray& ray_in, const utils::hit_details& rec, utils::scatter_details& srec) override;
inline virtual double scattering_pdf(const Ray& ray_in, const utils::hit_details& rec, const Ray& scattered) override {return 0;};
inline virtual glm::vec3 emitted(const Ray& ray_in, const utils::hit_details& rec,double u, double v, const glm::vec3& p) override { return glm::vec3(0);}
inline glm::vec3 get_albedo() override {return alb;}
public:
glm::vec3 alb;
bsdf::SurfaceParameters surface_params;
float specular, diffuse, clearcoat, transmission;
bool thin;
};
} |
; A093001: Least k such that Sum_{r=n+1..k} r is greater than or equal to the sum of the first n positive integers (i.e., the n-th triangular number, A000217(n)). Or, least k such that (sum of first n positive integers) <= (sum of numbers from n+1 up to k).
; 2,3,5,6,8,9,11,12,13,15,16,18,19,20,22,23,25,26,28,29,30,32,33,35,36,37,39,40,42,43,45,46,47,49,50,52,53,54,56,57,59,60,62,63,64,66,67,69,70,71,73,74,76,77,78,80,81,83,84,86,87,88,90,91,93,94,95,97,98,100,101
mov $1,$0
mul $0,2
pow $1,2
lpb $1
sub $1,$0
sub $0,1
trn $1,1
lpe
add $0,2
|
// Copyright (c) 2010 The WebM project authors. All Rights Reserved.
//
// Use of this source code is governed by a BSD-style license
// that can be found in the LICENSE file in the root of the source
// tree. An additional intellectual property rights grant can be found
// in the file PATENTS. All contributing project authors may
// be found in the AUTHORS file in the root of the source tree.
#pragma once
#include "webmvorbisdecoderpin.hpp"
#include "graphutil.hpp"
#include "vorbis/codec.h"
#include <vector>
#include <deque>
#include <list>
namespace WebmVorbisDecoderLib
{
class Inpin : public Pin, public IMemInputPin
{
Inpin(const Inpin&);
Inpin& operator=(const Inpin&);
public:
explicit Inpin(Filter*);
~Inpin();
//IUnknown interface:
HRESULT STDMETHODCALLTYPE QueryInterface(const IID&, void**);
ULONG STDMETHODCALLTYPE AddRef();
ULONG STDMETHODCALLTYPE Release();
//IPin interface:
HRESULT STDMETHODCALLTYPE QueryAccept(const AM_MEDIA_TYPE*);
HRESULT STDMETHODCALLTYPE Connect(IPin*, const AM_MEDIA_TYPE*);
//HRESULT STDMETHODCALLTYPE Disconnect();
HRESULT STDMETHODCALLTYPE ReceiveConnection(
IPin*,
const AM_MEDIA_TYPE*);
HRESULT STDMETHODCALLTYPE QueryInternalConnections(
IPin**,
ULONG*);
HRESULT STDMETHODCALLTYPE EndOfStream();
HRESULT STDMETHODCALLTYPE BeginFlush();
HRESULT STDMETHODCALLTYPE EndFlush();
HRESULT STDMETHODCALLTYPE NewSegment(
REFERENCE_TIME,
REFERENCE_TIME,
double);
//IMemInputPin
HRESULT STDMETHODCALLTYPE GetAllocator(
IMemAllocator**);
HRESULT STDMETHODCALLTYPE NotifyAllocator(
IMemAllocator*,
BOOL);
HRESULT STDMETHODCALLTYPE GetAllocatorRequirements(ALLOCATOR_PROPERTIES*);
HRESULT STDMETHODCALLTYPE Receive(IMediaSample*);
HRESULT STDMETHODCALLTYPE ReceiveMultiple(
IMediaSample**,
long,
long*);
HRESULT STDMETHODCALLTYPE ReceiveCanBlock();
//local functions
HRESULT Start(); //from stopped to running/paused
void Stop(); //from running/paused to stopped
HANDLE m_hSamples;
int GetSample(IMediaSample**);
void OnCompletion();
protected:
HRESULT GetName(PIN_INFO&) const;
HRESULT OnDisconnect();
private:
GraphUtil::IMemAllocatorPtr m_pAllocator;
bool m_bEndOfStream;
bool m_bFlush;
bool m_bDone;
ogg_packet m_packet;
vorbis_info m_info;
vorbis_comment m_comment;
vorbis_dsp_state m_dsp_state;
vorbis_block m_block;
LONGLONG m_first_reftime;
LONGLONG m_start_reftime;
double m_samples;
bool m_bDiscontinuity;
typedef std::deque<float> samples_t;
typedef std::vector<samples_t> channels_t;
channels_t m_channels;
typedef std::list<IMediaSample*> buffers_t;
buffers_t m_buffers;
void Decode(IMediaSample*);
void PopulateSample(IMediaSample*, long, const WAVEFORMATEX&);
HRESULT PopulateSamples();
};
} //end namespace WebmVorbisDecoderLib
|
SECTION code_clib
PUBLIC xorpixel
EXTERN xor_MODE0
EXTERN xor_MODE1
EXTERN __z1013_mode
xorpixel:
ld a,(__z1013_mode)
cp 1
jp z,xor_MODE1
and a
ret nz
jp xor_MODE0
|
stk segment stack 'stack'
dw 100 dup (0)
stk ends
data segment 'data'
data ends
code segment 'code'
assume ds:data, cs:code
main: mov ax, data
mov ds, ax
mov ax, 4C00h
int 21h
code ends
end main |
.global s_prepare_buffers
s_prepare_buffers:
push %r12
push %r13
push %r14
push %r15
push %r8
push %r9
push %rcx
push %rdi
push %rsi
lea addresses_D_ht+0xb2b7, %rdi
nop
nop
nop
xor %r13, %r13
movb $0x61, (%rdi)
nop
xor $42022, %r9
lea addresses_A_ht+0xd493, %r12
nop
nop
nop
nop
and %r15, %r15
movb $0x61, (%r12)
nop
nop
nop
sub $4815, %r13
lea addresses_normal_ht+0x1b9b7, %r14
clflush (%r14)
nop
add %r8, %r8
mov $0x6162636465666768, %r13
movq %r13, (%r14)
nop
nop
nop
xor $36944, %r15
lea addresses_WC_ht+0x14877, %rsi
lea addresses_A_ht+0x82b7, %rdi
nop
nop
nop
xor $49200, %r8
mov $23, %rcx
rep movsb
nop
nop
xor $18330, %r9
lea addresses_UC_ht+0x1ebb7, %r12
nop
nop
nop
nop
nop
cmp $21873, %r14
movups (%r12), %xmm1
vpextrq $1, %xmm1, %rsi
nop
nop
nop
nop
nop
add %r9, %r9
lea addresses_UC_ht+0x10a37, %rsi
lea addresses_WT_ht+0x1dcb7, %rdi
cmp $47017, %r15
mov $65, %rcx
rep movsw
xor %r9, %r9
lea addresses_WT_ht+0x15523, %r8
nop
xor %rsi, %rsi
mov $0x6162636465666768, %r9
movq %r9, %xmm2
vmovups %ymm2, (%r8)
nop
nop
nop
add %r8, %r8
lea addresses_D_ht+0x1dab7, %r15
inc %r8
movb (%r15), %r9b
xor %r13, %r13
lea addresses_normal_ht+0x13ab7, %r14
nop
nop
nop
nop
nop
cmp $47269, %rcx
movb (%r14), %r12b
nop
nop
nop
nop
cmp $39500, %r12
lea addresses_D_ht+0xc5a7, %r9
nop
cmp $43366, %r15
mov $0x6162636465666768, %rsi
movq %rsi, %xmm1
and $0xffffffffffffffc0, %r9
vmovaps %ymm1, (%r9)
nop
nop
nop
cmp %r8, %r8
lea addresses_WT_ht+0xc2b7, %r13
nop
and $15144, %r15
movl $0x61626364, (%r13)
nop
nop
nop
nop
nop
and %rdi, %rdi
pop %rsi
pop %rdi
pop %rcx
pop %r9
pop %r8
pop %r15
pop %r14
pop %r13
pop %r12
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r14
push %r8
push %rbx
push %rcx
push %rdi
push %rsi
// Store
lea addresses_D+0x8477, %rsi
nop
nop
nop
nop
nop
dec %rdi
movb $0x51, (%rsi)
nop
nop
nop
nop
nop
add %rcx, %rcx
// REPMOV
lea addresses_UC+0xecb7, %rsi
lea addresses_PSE+0x14d91, %rdi
nop
nop
nop
and %r8, %r8
mov $96, %rcx
rep movsl
nop
nop
nop
nop
lfence
// Faulty Load
lea addresses_UC+0x42b7, %rsi
nop
nop
nop
add $17177, %rbx
movaps (%rsi), %xmm2
vpextrq $1, %xmm2, %r10
lea oracles, %rbx
and $0xff, %r10
shlq $12, %r10
mov (%rbx,%r10,1), %r10
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %r8
pop %r14
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 0, 'same': False, 'type': 'addresses_UC'}, 'OP': 'LOAD'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 5, 'same': False, 'type': 'addresses_D'}, 'OP': 'STOR'}
{'src': {'congruent': 8, 'same': False, 'type': 'addresses_UC'}, 'dst': {'congruent': 1, 'same': False, 'type': 'addresses_PSE'}, 'OP': 'REPM'}
[Faulty Load]
{'src': {'NT': False, 'AVXalign': True, 'size': 16, 'congruent': 0, 'same': True, 'type': 'addresses_UC'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'dst': {'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 11, 'same': False, 'type': 'addresses_D_ht'}, 'OP': 'STOR'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 2, 'same': False, 'type': 'addresses_A_ht'}, 'OP': 'STOR'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 4, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'STOR'}
{'src': {'congruent': 6, 'same': False, 'type': 'addresses_WC_ht'}, 'dst': {'congruent': 8, 'same': False, 'type': 'addresses_A_ht'}, 'OP': 'REPM'}
{'src': {'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 7, 'same': False, 'type': 'addresses_UC_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 7, 'same': False, 'type': 'addresses_UC_ht'}, 'dst': {'congruent': 6, 'same': False, 'type': 'addresses_WT_ht'}, 'OP': 'REPM'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 2, 'same': False, 'type': 'addresses_WT_ht'}, 'OP': 'STOR'}
{'src': {'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 10, 'same': False, 'type': 'addresses_D_ht'}, 'OP': 'LOAD'}
{'src': {'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 11, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'LOAD'}
{'dst': {'NT': False, 'AVXalign': True, 'size': 32, 'congruent': 3, 'same': False, 'type': 'addresses_D_ht'}, 'OP': 'STOR'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 10, 'same': False, 'type': 'addresses_WT_ht'}, 'OP': 'STOR'}
{'48': 1}
48
*/
|
; lzo1y_s1.asm -- lzo1y_decompress_asm
;
; This file is part of the LZO real-time data compression library.
;
; Copyright (C) 2011 Markus Franz Xaver Johannes Oberhumer
; Copyright (C) 2010 Markus Franz Xaver Johannes Oberhumer
; Copyright (C) 2009 Markus Franz Xaver Johannes Oberhumer
; Copyright (C) 2008 Markus Franz Xaver Johannes Oberhumer
; Copyright (C) 2007 Markus Franz Xaver Johannes Oberhumer
; Copyright (C) 2006 Markus Franz Xaver Johannes Oberhumer
; Copyright (C) 2005 Markus Franz Xaver Johannes Oberhumer
; Copyright (C) 2004 Markus Franz Xaver Johannes Oberhumer
; Copyright (C) 2003 Markus Franz Xaver Johannes Oberhumer
; Copyright (C) 2002 Markus Franz Xaver Johannes Oberhumer
; Copyright (C) 2001 Markus Franz Xaver Johannes Oberhumer
; Copyright (C) 2000 Markus Franz Xaver Johannes Oberhumer
; Copyright (C) 1999 Markus Franz Xaver Johannes Oberhumer
; Copyright (C) 1998 Markus Franz Xaver Johannes Oberhumer
; Copyright (C) 1997 Markus Franz Xaver Johannes Oberhumer
; Copyright (C) 1996 Markus Franz Xaver Johannes Oberhumer
; All Rights Reserved.
;
; The LZO library is free software; you can redistribute it and/or
; modify it under the terms of the GNU General Public License as
; published by the Free Software Foundation; either version 2 of
; the License, or (at your option) any later version.
;
; The LZO library is distributed in the hope that it will be useful,
; but WITHOUT ANY WARRANTY; without even the implied warranty of
; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
; GNU General Public License for more details.
;
; You should have received a copy of the GNU General Public License
; along with the LZO library; see the file COPYING.
; If not, write to the Free Software Foundation, Inc.,
; 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
;
; Markus F.X.J. Oberhumer
; <markus@oberhumer.com>
; http://www.oberhumer.com/opensource/lzo/
;
; /***** DO NOT EDIT - GENERATED AUTOMATICALLY *****/
include asminit.def
public _lzo1y_decompress_asm
_lzo1y_decompress_asm:
db 85,87,86,83,81,82,131,236,12,252,139,116,36,40,139,124
db 36,48,189,3,0,0,0,49,192,49,219,172,60,17,118,35
db 44,17,60,4,115,40,137,193,235,56,5,255,0,0,0,138
db 30,70,8,219,116,244,141,68,24,18,235,18,141,116,38,0
db 138,6,70,60,16,115,73,8,192,116,228,131,192,3,137,193
db 193,232,2,33,233,139,22,131,198,4,137,23,131,199,4,72
db 117,243,243,164,138,6,70,60,16,115,37,193,232,2,138,30
db 141,151,255,251,255,255,141,4,152,70,41,194,138,2,136,7
db 138,66,1,136,71,1,138,66,2,136,71,2,1,239,235,119
db 60,64,114,52,137,193,193,232,2,141,87,255,33,232,138,30
db 193,233,4,141,4,152,70,41,194,73,57,232,115,56,235,120
db 5,255,0,0,0,138,30,70,8,219,116,244,141,76,24,33
db 49,192,235,16,141,116,38,0,60,32,114,124,131,224,31,116
db 228,141,72,2,102,139,6,141,87,255,193,232,2,131,198,2
db 41,194,57,232,114,66,137,203,193,235,2,116,17,139,2,131
db 194,4,137,7,131,199,4,75,117,243,33,233,116,9,138,2
db 66,136,7,71,73,117,247,138,70,254,33,232,15,132,46,255
db 255,255,138,14,70,136,15,71,72,117,247,138,6,70,233,109
db 255,255,255,144,141,116,38,0,135,214,243,164,137,214,235,215
db 129,193,255,0,0,0,138,30,70,8,219,116,243,141,76,11
db 9,235,25,144,141,116,38,0,60,16,114,44,137,193,131,224
db 8,193,224,13,131,225,7,116,221,131,193,2,102,139,6,131
db 198,2,141,151,0,192,255,255,193,232,2,116,43,41,194,233
db 114,255,255,255,141,116,38,0,193,232,2,138,30,141,87,255
db 141,4,152,70,41,194,138,2,136,7,138,90,1,136,95,1
db 131,199,2,233,111,255,255,255,131,249,3,15,149,192,139,84
db 36,40,3,84,36,44,57,214,119,38,114,29,43,124,36,48
db 139,84,36,52,137,58,247,216,131,196,12,90,89,91,94,95
db 93,195,184,1,0,0,0,235,227,184,8,0,0,0,235,220
db 184,4,0,0,0,235,213,137,246,141,188,39,0,0,0,0
end
|
; A170546: Number of reduced words of length n in Coxeter group on 9 generators S_i with relations (S_i)^2 = (S_i S_j)^47 = I.
; 1,9,72,576,4608,36864,294912,2359296,18874368,150994944,1207959552,9663676416,77309411328,618475290624,4947802324992,39582418599936,316659348799488,2533274790395904,20266198323167232,162129586585337856
seq $0,3951 ; Expansion of g.f.: (1+x)/(1-8*x).
|
_x$ = 8 ; size = 4
bool <lambda_b04b230afa1f9f4d5d61ec8317e156ba>::operator()(int)const PROC ; <lambda_b04b230afa1f9f4d5d61ec8317e156ba>::operator(), COMDAT
mov eax, DWORD PTR _x$[esp-4]
cmp eax, 42 ; 0000002aH
je SHORT $LN3@operator
cmp eax, -1
je SHORT $LN3@operator
xor al, al
ret 4
$LN3@operator:
mov al, 1
ret 4
bool <lambda_b04b230afa1f9f4d5d61ec8317e156ba>::operator()(int)const ENDP ; <lambda_b04b230afa1f9f4d5d61ec8317e156ba>::operator()
_x$ = 8 ; size = 4
bool <lambda_1ca96eb0ae177b0888bc5941a2950080>::operator()(int)const PROC ; <lambda_1ca96eb0ae177b0888bc5941a2950080>::operator(), COMDAT
mov eax, DWORD PTR _x$[esp-4]
cmp eax, 42 ; 0000002aH
je SHORT $LN3@operator
cmp eax, -1
je SHORT $LN3@operator
xor al, al
ret 4
$LN3@operator:
mov al, 1
ret 4
bool <lambda_1ca96eb0ae177b0888bc5941a2950080>::operator()(int)const ENDP ; <lambda_1ca96eb0ae177b0888bc5941a2950080>::operator()
_v$ = 8 ; size = 4
unsigned int count_if_epi32(std::vector<int,std::allocator<int> > const &) PROC ; count_if_epi32, COMDAT
mov eax, DWORD PTR _v$[esp-4]
push esi
push edi
xor esi, esi
mov edi, DWORD PTR [eax+4]
mov ecx, DWORD PTR [eax]
cmp ecx, edi
je SHORT $LN30@count_if_e
$LL23@count_if_e:
mov eax, DWORD PTR [ecx]
cmp eax, 42 ; 0000002aH
je SHORT $LN24@count_if_e
cmp eax, -1
je SHORT $LN24@count_if_e
xor dl, dl
jmp SHORT $LN25@count_if_e
$LN24@count_if_e:
mov dl, 1
$LN25@count_if_e:
test dl, dl
lea eax, DWORD PTR [esi+1]
cmove eax, esi
add ecx, 4
mov esi, eax
cmp ecx, edi
jne SHORT $LL23@count_if_e
$LN30@count_if_e:
pop edi
mov eax, esi
pop esi
ret 0
unsigned int count_if_epi32(std::vector<int,std::allocator<int> > const &) ENDP ; count_if_epi32
_v$ = 8 ; size = 4
unsigned int count_if_epi8(std::vector<signed char,std::allocator<signed char> > const &) PROC ; count_if_epi8, COMDAT
mov eax, DWORD PTR _v$[esp-4]
push esi
push edi
xor esi, esi
mov edi, DWORD PTR [eax+4]
mov ecx, DWORD PTR [eax]
cmp ecx, edi
je SHORT $LN30@count_if_e
$LL23@count_if_e:
movsx eax, BYTE PTR [ecx]
cmp eax, 42 ; 0000002aH
je SHORT $LN24@count_if_e
cmp eax, -1
je SHORT $LN24@count_if_e
xor dl, dl
jmp SHORT $LN25@count_if_e
$LN24@count_if_e:
mov dl, 1
$LN25@count_if_e:
test dl, dl
lea eax, DWORD PTR [esi+1]
cmove eax, esi
inc ecx
mov esi, eax
cmp ecx, edi
jne SHORT $LL23@count_if_e
$LN30@count_if_e:
pop edi
mov eax, esi
pop esi
ret 0
unsigned int count_if_epi8(std::vector<signed char,std::allocator<signed char> > const &) ENDP ; count_if_epi8
|
###############################################################################
# Copyright 2019 Intel Corporation
# All Rights Reserved.
#
# If this software was obtained under the Intel Simplified Software License,
# the following terms apply:
#
# The source code, information and material ("Material") contained herein is
# owned by Intel Corporation or its suppliers or licensors, and title to such
# Material remains with Intel Corporation or its suppliers or licensors. The
# Material contains proprietary information of Intel or its suppliers and
# licensors. The Material is protected by worldwide copyright laws and treaty
# provisions. No part of the Material may be used, copied, reproduced,
# modified, published, uploaded, posted, transmitted, distributed or disclosed
# in any way without Intel's prior express written permission. No license under
# any patent, copyright or other intellectual property rights in the Material
# is granted to or conferred upon you, either expressly, by implication,
# inducement, estoppel or otherwise. Any license under such intellectual
# property rights must be express and approved by Intel in writing.
#
# Unless otherwise agreed by Intel in writing, you may not remove or alter this
# notice or any other notice embedded in Materials by Intel or Intel's
# suppliers or licensors in any way.
#
#
# If this software was obtained under the Apache License, Version 2.0 (the
# "License"), the following terms apply:
#
# You may not use this file except in compliance with the License. You may
# obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
#
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
#
# See the License for the specific language governing permissions and
# limitations under the License.
###############################################################################
.section .note.GNU-stack,"",%progbits
.text
.p2align 4, 0x90
.globl EncryptCFB_RIJ128_AES_NI
.type EncryptCFB_RIJ128_AES_NI, @function
EncryptCFB_RIJ128_AES_NI:
push %r12
push %r15
sub $(152), %rsp
mov (176)(%rsp), %rax
movdqu (%rax), %xmm4
movdqa %xmm4, (%rsp)
movslq %r8d, %r8
movslq %r9d, %r9
mov %rcx, %r15
lea (,%rdx,4), %rax
lea (-144)(%r15,%rax,4), %rax
lea (,%r9,4), %r10
.Lblks_loopgas_1:
cmp %r10, %r8
cmovl %r8, %r10
xor %rcx, %rcx
.L__0009gas_1:
movb (%rdi,%rcx), %r11b
movb %r11b, (80)(%rsp,%rcx)
add $(1), %rcx
cmp %r10, %rcx
jl .L__0009gas_1
mov %r10, %r12
xor %r11, %r11
.Lsingle_blkgas_1:
movdqu (%rsp,%r11), %xmm0
pxor (%r15), %xmm0
cmp $(12), %rdx
jl .Lkey_128_sgas_1
jz .Lkey_192_sgas_1
.Lkey_256_sgas_1:
aesenc (-64)(%rax), %xmm0
aesenc (-48)(%rax), %xmm0
.Lkey_192_sgas_1:
aesenc (-32)(%rax), %xmm0
aesenc (-16)(%rax), %xmm0
.Lkey_128_sgas_1:
aesenc (%rax), %xmm0
aesenc (16)(%rax), %xmm0
aesenc (32)(%rax), %xmm0
aesenc (48)(%rax), %xmm0
aesenc (64)(%rax), %xmm0
aesenc (80)(%rax), %xmm0
aesenc (96)(%rax), %xmm0
aesenc (112)(%rax), %xmm0
aesenc (128)(%rax), %xmm0
aesenclast (144)(%rax), %xmm0
movdqu (80)(%rsp,%r11), %xmm1
pxor %xmm1, %xmm0
movdqu %xmm0, (16)(%rsp,%r11)
add %r9, %r11
sub %r9, %r12
jg .Lsingle_blkgas_1
xor %rcx, %rcx
.L__000Agas_1:
movb (16)(%rsp,%rcx), %r11b
movb %r11b, (%rsi,%rcx)
add $(1), %rcx
cmp %r10, %rcx
jl .L__000Agas_1
movdqu (%rsp,%r10), %xmm0
movdqa %xmm0, (%rsp)
add %r10, %rdi
add %r10, %rsi
sub %r10, %r8
jg .Lblks_loopgas_1
add $(152), %rsp
pop %r15
pop %r12
ret
.Lfe1:
.size EncryptCFB_RIJ128_AES_NI, .Lfe1-(EncryptCFB_RIJ128_AES_NI)
.p2align 4, 0x90
.globl EncryptCFB32_RIJ128_AES_NI
.type EncryptCFB32_RIJ128_AES_NI, @function
EncryptCFB32_RIJ128_AES_NI:
push %r12
push %r15
sub $(152), %rsp
mov (176)(%rsp), %rax
movdqu (%rax), %xmm4
movdqa %xmm4, (%rsp)
movslq %r8d, %r8
movslq %r9d, %r9
mov %rcx, %r15
lea (,%rdx,4), %rax
lea (-144)(%r15,%rax,4), %rax
lea (,%r9,4), %r10
.Lblks_loopgas_2:
cmp %r10, %r8
cmovl %r8, %r10
xor %rcx, %rcx
.L__001Bgas_2:
movl (%rdi,%rcx), %r11d
movl %r11d, (80)(%rsp,%rcx)
add $(4), %rcx
cmp %r10, %rcx
jl .L__001Bgas_2
mov %r10, %r12
xor %r11, %r11
.Lsingle_blkgas_2:
movdqu (%rsp,%r11), %xmm0
pxor (%r15), %xmm0
cmp $(12), %rdx
jl .Lkey_128_sgas_2
jz .Lkey_192_sgas_2
.Lkey_256_sgas_2:
aesenc (-64)(%rax), %xmm0
aesenc (-48)(%rax), %xmm0
.Lkey_192_sgas_2:
aesenc (-32)(%rax), %xmm0
aesenc (-16)(%rax), %xmm0
.Lkey_128_sgas_2:
aesenc (%rax), %xmm0
aesenc (16)(%rax), %xmm0
aesenc (32)(%rax), %xmm0
aesenc (48)(%rax), %xmm0
aesenc (64)(%rax), %xmm0
aesenc (80)(%rax), %xmm0
aesenc (96)(%rax), %xmm0
aesenc (112)(%rax), %xmm0
aesenc (128)(%rax), %xmm0
aesenclast (144)(%rax), %xmm0
movdqu (80)(%rsp,%r11), %xmm1
pxor %xmm1, %xmm0
movdqu %xmm0, (16)(%rsp,%r11)
add %r9, %r11
sub %r9, %r12
jg .Lsingle_blkgas_2
xor %rcx, %rcx
.L__001Cgas_2:
movl (16)(%rsp,%rcx), %r11d
movl %r11d, (%rsi,%rcx)
add $(4), %rcx
cmp %r10, %rcx
jl .L__001Cgas_2
movdqu (%rsp,%r10), %xmm0
movdqa %xmm0, (%rsp)
add %r10, %rdi
add %r10, %rsi
sub %r10, %r8
jg .Lblks_loopgas_2
add $(152), %rsp
pop %r15
pop %r12
ret
.Lfe2:
.size EncryptCFB32_RIJ128_AES_NI, .Lfe2-(EncryptCFB32_RIJ128_AES_NI)
.p2align 4, 0x90
.globl EncryptCFB128_RIJ128_AES_NI
.type EncryptCFB128_RIJ128_AES_NI, @function
EncryptCFB128_RIJ128_AES_NI:
movdqu (%r9), %xmm0
movslq %r8d, %r8
movslq %r9d, %r9
lea (,%rdx,4), %rax
lea (-144)(%rcx,%rax,4), %rax
.Lblks_loopgas_3:
pxor (%rcx), %xmm0
movdqu (%rdi), %xmm1
cmp $(12), %rdx
jl .Lkey_128_sgas_3
jz .Lkey_192_sgas_3
.Lkey_256_sgas_3:
aesenc (-64)(%rax), %xmm0
aesenc (-48)(%rax), %xmm0
.Lkey_192_sgas_3:
aesenc (-32)(%rax), %xmm0
aesenc (-16)(%rax), %xmm0
.Lkey_128_sgas_3:
aesenc (%rax), %xmm0
aesenc (16)(%rax), %xmm0
aesenc (32)(%rax), %xmm0
aesenc (48)(%rax), %xmm0
aesenc (64)(%rax), %xmm0
aesenc (80)(%rax), %xmm0
aesenc (96)(%rax), %xmm0
aesenc (112)(%rax), %xmm0
aesenc (128)(%rax), %xmm0
aesenclast (144)(%rax), %xmm0
pxor %xmm1, %xmm0
movdqu %xmm0, (%rsi)
add $(16), %rdi
add $(16), %rsi
sub $(16), %r8
jg .Lblks_loopgas_3
ret
.Lfe3:
.size EncryptCFB128_RIJ128_AES_NI, .Lfe3-(EncryptCFB128_RIJ128_AES_NI)
|
.global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r8
push %rbp
push %rbx
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_D_ht+0x127e5, %rsi
lea addresses_D_ht+0x15bd9, %rdi
nop
nop
nop
xor %rdx, %rdx
mov $28, %rcx
rep movsw
nop
sub $55698, %rbp
lea addresses_A_ht+0x1c43d, %r10
nop
nop
nop
nop
nop
add $46857, %rbx
movups (%r10), %xmm1
vpextrq $0, %xmm1, %rcx
nop
nop
nop
cmp %rdx, %rdx
lea addresses_A_ht+0x196f1, %rdx
clflush (%rdx)
nop
and $30892, %r10
movups (%rdx), %xmm0
vpextrq $1, %xmm0, %rsi
nop
add %rbx, %rbx
lea addresses_A_ht+0x98fd, %rsi
lea addresses_A_ht+0x14a55, %rdi
nop
nop
nop
nop
nop
xor %r8, %r8
mov $19, %rcx
rep movsq
nop
nop
nop
nop
nop
xor $18291, %r10
lea addresses_WC_ht+0x1e93d, %rcx
nop
nop
nop
nop
nop
and %rsi, %rsi
mov (%rcx), %r8d
nop
nop
nop
nop
nop
inc %rbp
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbx
pop %rbp
pop %r8
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r12
push %r15
push %r9
push %rbp
push %rbx
push %rcx
push %rdi
push %rsi
// Load
lea addresses_RW+0x53d, %rsi
nop
nop
nop
sub $64810, %r9
movb (%rsi), %r15b
nop
nop
add %rsi, %rsi
// Store
lea addresses_D+0x313d, %rbx
nop
dec %r11
mov $0x5152535455565758, %rsi
movq %rsi, (%rbx)
nop
inc %rbx
// Store
lea addresses_D+0x1a73d, %rbp
cmp %r9, %r9
mov $0x5152535455565758, %r11
movq %r11, (%rbp)
nop
nop
nop
nop
dec %r15
// REPMOV
lea addresses_A+0x7f3d, %rsi
lea addresses_A+0x11c2d, %rdi
nop
and %rbx, %rbx
mov $65, %rcx
rep movsb
nop
nop
nop
sub %rbp, %rbp
// Store
lea addresses_D+0x1933d, %r9
nop
nop
nop
nop
nop
and %rsi, %rsi
mov $0x5152535455565758, %rdi
movq %rdi, (%r9)
nop
nop
nop
nop
add %r11, %r11
// Load
lea addresses_PSE+0x162e5, %r12
inc %r15
vmovups (%r12), %ymm3
vextracti128 $0, %ymm3, %xmm3
vpextrq $0, %xmm3, %rcx
nop
nop
nop
nop
nop
dec %r11
// Faulty Load
lea addresses_D+0x313d, %r12
nop
nop
nop
xor %r15, %r15
mov (%r12), %r11w
lea oracles, %rbp
and $0xff, %r11
shlq $12, %r11
mov (%rbp,%r11,1), %r11
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rbp
pop %r9
pop %r15
pop %r12
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_D', 'same': False, 'size': 16, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_RW', 'same': False, 'size': 1, 'congruent': 7, 'NT': True, 'AVXalign': False}, 'OP': 'LOAD'}
{'dst': {'type': 'addresses_D', 'same': True, 'size': 8, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_D', 'same': False, 'size': 8, 'congruent': 4, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_A', 'congruent': 9, 'same': False}, 'dst': {'type': 'addresses_A', 'congruent': 2, 'same': False}, 'OP': 'REPM'}
{'dst': {'type': 'addresses_D', 'same': False, 'size': 8, 'congruent': 9, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_PSE', 'same': False, 'size': 32, 'congruent': 1, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'type': 'addresses_D', 'same': True, 'size': 2, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_D_ht', 'congruent': 2, 'same': True}, 'dst': {'type': 'addresses_D_ht', 'congruent': 0, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_A_ht', 'same': False, 'size': 16, 'congruent': 7, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_A_ht', 'same': False, 'size': 16, 'congruent': 2, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_A_ht', 'congruent': 3, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 3, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_WC_ht', 'same': False, 'size': 4, 'congruent': 11, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'58': 21829}
58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58
*/
|
/*
* Copyright 2020 Joe T. Sylve, Ph.D.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#pragma once
#include <limits>
#include <vector>
#include "bit.hpp"
#include "endian.hpp"
#include "span.hpp"
// Test for constexpr vectors
#if defined(__cpp_lib_constexpr_vector) && __cpp_lib_constexpr_vector >= 201907L
#define YAT_BITMAP_CONSTEXPR constexpr
#else
#define YAT_BITMAP_CONSTEXPR
#endif
namespace yat {
/// `bitmap` represents a sequence of bits that can be manipulated efficiently.
///
/// This is similar to std::vector<bool>, but the layout of the bits in memory
/// is well defined.
class bitmap {
using storage_type = yat::little_uint64_t;
static constexpr size_t storage_bits =
std::numeric_limits<storage_type::value_type>::digits;
/// Calculate the number of storage ints we need to store n bits
static constexpr size_t storage_size(size_t n) noexcept {
return (n + storage_bits - 1) / storage_bits;
}
/// Calculate the storage index
static constexpr size_t si(size_t n) noexcept { return n / storage_bits; }
/// Calculate the bit index
static constexpr size_t bi(size_t n) noexcept { return n % storage_bits; }
/// Calculate the bitmask for an index
static constexpr storage_type::value_type bm(size_t n) noexcept {
return 1ULL << bi(n);
}
public:
/// Create an empty bitmap
YAT_BITMAP_CONSTEXPR bitmap() noexcept = default;
/// Create a bitmap with `n` unset bits
explicit YAT_BITMAP_CONSTEXPR bitmap(size_t n)
: _storage(storage_size(n)), _count{n} {}
/// Access a given bit. No bounds checking is performed and accessing an
/// invalid index is undefined behavior.
YAT_BITMAP_CONSTEXPR bool operator[](size_t n) const {
return (_storage[si(n)] | bm(n)) != 0;
}
/// Set a given bit. No bounds checking is performed and accessing an
/// invalid index is undefined behavior.
YAT_BITMAP_CONSTEXPR void set(size_t n) {
auto& val = _storage[si(n)];
val = val | bm(n);
}
/// Set a range of bits. No bounds checking is performed and accessing an
/// invalid index is undefined behavior.
YAT_BITMAP_CONSTEXPR void set(size_t start, size_t count) {
while (count > 0) {
if (bi(start) == 0 && count >= storage_bits) {
// We're dealing the the entire element, so set all the bits
_storage[si(start)] =
std::numeric_limits<storage_type::value_type>::max();
start += storage_bits;
count -= storage_bits;
continue;
}
set(start);
start++;
count--;
}
}
/// Clear a given bit. No bounds checking is performed and accessing an
/// invalid index is undefined behavior.
YAT_BITMAP_CONSTEXPR void clear(size_t n) noexcept {
auto& val = _storage[si(n)];
val = val & ~bm(n);
}
/// Clear a range of bits. No bounds checking is performed and accessing an
/// invalid index is undefined behavior.
YAT_BITMAP_CONSTEXPR void clear(size_t start, size_t count) {
while (count > 0) {
if (bi(start) == 0 && count >= storage_bits) {
// We're dealing the the entire element, so clear all the bits
_storage[si(start)] = 0;
start += storage_bits;
count -= storage_bits;
continue;
}
clear(start);
start++;
count--;
}
}
/// Return the count of bits in the set
constexpr size_t count() const noexcept { return _count; }
/// Resize the bitset
YAT_BITMAP_CONSTEXPR void resize(size_t n) {
_storage.resize(storage_size(n));
_count = n;
}
private:
std::vector<storage_type> _storage{}; ///< Underlying bit storage
size_t _count{}; ///< Number of bits in bitset
friend class bitmap_scanner;
};
/// A bitmap scanner is used to scan bitmaps for ranges of set or unset bits.
///
/// It assumes that bitmaps are stored as an array of bytes that count bits from
/// LSB->MSB.
class bitmap_scanner {
/// Special marker that is returned when there are no bits left to scan
static constexpr uint64_t no_bits_left = std::numeric_limits<uint64_t>::max();
//
// Rather than reading one byte at a time, we can use little endian unsigned
// integers of any size and the byte reordering will work as expected.
//
using storage_type = yat::little_scalar<uintmax_t>;
static constexpr auto storage_bits =
std::numeric_limits<storage_type::value_type>::digits;
/// Calculates the needed array size to hold a certain amount of bits
static constexpr size_t cas(size_t block_count) noexcept {
return (block_count + storage_bits - 1) / storage_bits;
}
/// An iterator for bitmap_scanner that iterates through the scanned ranges
class iterator {
public:
using iterator_category = std::input_iterator_tag;
using value_type = struct {
size_t start; /// start of the range
size_t count; /// number of elements in the range
};
using difference_type = void; // No meaningful way of taking difference
using pointer = const value_type*;
using reference = const value_type&;
/// Construct an empty iterator (this will compare with end())
constexpr iterator() noexcept = default;
/// Construct an iterator from a chunk bitmap
explicit iterator(const bitmap_scanner* bm)
: _bm{bm}, _find_set{_bm->_scan_set} {
next();
}
/// Equality operator
friend bool operator==(const iterator& lhs, const iterator& rhs) noexcept {
return (lhs._bm == rhs._bm) && (lhs._next_block == rhs._next_block);
}
/// Inequality operator
friend bool operator!=(const iterator& lhs, const iterator& rhs) noexcept {
return (lhs._bm != rhs._bm) || (lhs._next_block != rhs._next_block);
}
/// Dereference operator
reference operator*() const noexcept { return _range; }
/// Pointer dereference operator
pointer operator->() const noexcept { return &_range; }
/// Prefix increment operator
iterator& operator++() { return next(); }
/// Postfix increment operator
iterator operator++(int) {
iterator copy{*this};
operator++();
return copy;
}
protected:
/// Cache the next set of bitmap data to read
void cache_next() noexcept {
// Fetch the next set of bits into the cache
_cache = _bm->_bits[_next_block / _bm->storage_bits];
// If we're scanning for unset bits then invert the bits since we actually
// only do logic to scan for ones
if (!_find_set) {
_cache = ~_cache;
}
}
/// Toggles the scanning mode
void toggle_mode() noexcept {
_find_set = !_find_set;
_cache = ~_cache;
}
/// Scan for the next set bit
uint64_t scan() noexcept {
while (_next_block < _bm->_block_count) {
// Calculate the bit we're starting our scan
const auto i = _next_block % _bm->storage_bits;
// If we're scanning the first bit, we need to cache the bits
if (i == 0) {
cache_next();
// If there are no bits set then there's nothing to scan for, so let's
// move on.
if (_cache == 0) {
_next_block += _bm->storage_bits;
continue;
}
}
// Mask the already fetched baclues and count the number of trailing
// zero bits
const auto c = yat::countr_zero((_cache >> i) << i);
// If c is the number of bits, then there are no more set bits
// and we need to move on to scan the next set
if (c == _bm->storage_bits) {
_next_block += _bm->storage_bits - i;
continue;
}
// Adjust the next block for the next scan
_next_block += static_cast<uint64_t>(c) + 1 - i;
// If the last black is within range then return it
if (const uint64_t next = _next_block - 1; next < _bm->_block_count) {
return next;
}
return no_bits_left;
}
return no_bits_left;
}
/// Get the next range
iterator& next() noexcept {
// Get the start of the next range
const uint64_t s = scan();
// If there's no start then there are no more ranges and we need to set
// ourself as the end interator
if (s == no_bits_left) {
*this = {};
return (*this);
}
// Toggle the scan mode to look for the next type of bit
toggle_mode();
// Get the end of the range
uint64_t e = scan();
// Toggle the scan mode to look for the next type of bit
toggle_mode();
// If there's no end then we set the end of the range to the end of the
// bitmap
if (e == no_bits_left) {
e = _bm->_block_count;
}
_range = {s, e - s};
return (*this);
}
private:
const bitmap_scanner* _bm{}; ///< Unowned pointer to bitmap
uint64_t _next_block{}; ///< The next block number to be scanned
bool _find_set{}; ///< The current scanning mode
bitmap_scanner::storage_type _cache{}; ///< Cached data
value_type _range{}; ///< The current range
};
public:
/// Creates a bitmap scanner from raw data
///
/// \param data The bitmap data to scan
/// \param count The number of bits to scan in the bitmap
/// \param scan_set Indicates that we're scanning for ranges of set bits
bitmap_scanner(const void* data, uint64_t count,
bool scan_set = true) noexcept
: _scan_set{scan_set},
_block_count{count},
_bits{static_cast<const storage_type*>(data), cas(count)} {}
/// Creates a bitmap scanner for a given bitmap
bitmap_scanner(const bitmap& bitmap, bool scan_set = true) noexcept
: bitmap_scanner(bitmap._storage.data(), bitmap._count, scan_set) {}
/// Returns an iterator to the start of the ranges
[[nodiscard]] iterator begin() const noexcept { return iterator{this}; }
/// Returns an iterator to the end of the ranges
[[nodiscard]] iterator end() const noexcept { return {}; }
/// Returns true if the scanner has enough data to do scanning
[[nodiscard]] bool is_valid() const noexcept { return !_bits.empty(); }
/// Returns true if the scanner has enough data to do scanning
[[nodiscard]] explicit operator bool() const noexcept { return is_valid(); }
private:
bool _scan_set{}; ///< True if scanning for ranges of set bits
size_t _block_count{}; ///< The number of bits that we're scanning for
yat::span<const storage_type> _bits{}; ///< The view into the data
};
} // namespace yat |
// Copyright 2014 The Chromium Authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.
#include "chrome/browser/plugins/plugin_info_message_filter.h"
#include "base/at_exit.h"
#include "base/bind.h"
#include "base/bind_helpers.h"
#include "base/message_loop/message_loop.h"
#include "base/run_loop.h"
#include "base/strings/utf_string_conversions.h"
#include "base/test/scoped_feature_list.h"
#include "build/build_config.h"
#include "chrome/browser/content_settings/host_content_settings_map_factory.h"
#include "chrome/browser/plugins/plugin_metadata.h"
#include "chrome/browser/plugins/plugin_utils.h"
#include "chrome/common/chrome_features.h"
#include "chrome/common/pref_names.h"
#include "chrome/common/render_messages.h"
#include "chrome/test/base/testing_profile.h"
#include "components/content_settings/core/browser/host_content_settings_map.h"
#include "components/content_settings/core/common/pref_names.h"
#include "components/sync_preferences/testing_pref_service_syncable.h"
#include "content/public/browser/plugin_service.h"
#include "content/public/browser/plugin_service_filter.h"
#include "content/public/browser/render_process_host.h"
#include "content/public/common/content_constants.h"
#include "content/public/test/test_browser_thread_bundle.h"
#include "testing/gmock/include/gmock/gmock.h"
#include "testing/gtest/include/gtest/gtest.h"
#include "url/origin.h"
using content::PluginService;
namespace {
void PluginsLoaded(const base::Closure& callback,
const std::vector<content::WebPluginInfo>& plugins) {
callback.Run();
}
class FakePluginServiceFilter : public content::PluginServiceFilter {
public:
FakePluginServiceFilter() {}
~FakePluginServiceFilter() override {}
bool IsPluginAvailable(int render_process_id,
int render_view_id,
const void* context,
const GURL& url,
const url::Origin& main_frame_origin,
content::WebPluginInfo* plugin) override;
bool CanLoadPlugin(int render_process_id,
const base::FilePath& path) override;
void set_plugin_enabled(const base::FilePath& plugin_path, bool enabled) {
plugin_state_[plugin_path] = enabled;
}
private:
std::map<base::FilePath, bool> plugin_state_;
};
bool FakePluginServiceFilter::IsPluginAvailable(
int render_process_id,
int render_view_id,
const void* context,
const GURL& url,
const url::Origin& main_frame_origin,
content::WebPluginInfo* plugin) {
std::map<base::FilePath, bool>::iterator it =
plugin_state_.find(plugin->path);
if (it == plugin_state_.end()) {
ADD_FAILURE() << "No plugin state for '" << plugin->path.value() << "'";
return false;
}
return it->second;
}
bool FakePluginServiceFilter::CanLoadPlugin(int render_process_id,
const base::FilePath& path) {
return true;
}
} // namespace
class PluginInfoMessageFilterTest : public ::testing::Test {
public:
PluginInfoMessageFilterTest()
: foo_plugin_path_(FILE_PATH_LITERAL("/path/to/foo")),
bar_plugin_path_(FILE_PATH_LITERAL("/path/to/bar")),
fake_flash_path_(FILE_PATH_LITERAL("/path/to/fake/flash")),
context_(0, &profile_),
host_content_settings_map_(
HostContentSettingsMapFactory::GetForProfile(&profile_)) {}
void SetUp() override {
content::WebPluginInfo foo_plugin(base::ASCIIToUTF16("Foo Plugin"),
foo_plugin_path_,
base::ASCIIToUTF16("1"),
base::ASCIIToUTF16("The Foo plugin."));
content::WebPluginMimeType mime_type;
mime_type.mime_type = "foo/bar";
foo_plugin.mime_types.push_back(mime_type);
foo_plugin.type = content::WebPluginInfo::PLUGIN_TYPE_PEPPER_IN_PROCESS;
PluginService::GetInstance()->Init();
PluginService::GetInstance()->RegisterInternalPlugin(foo_plugin, false);
content::WebPluginInfo bar_plugin(base::ASCIIToUTF16("Bar Plugin"),
bar_plugin_path_,
base::ASCIIToUTF16("1"),
base::ASCIIToUTF16("The Bar plugin."));
mime_type.mime_type = "foo/bar";
bar_plugin.mime_types.push_back(mime_type);
bar_plugin.type = content::WebPluginInfo::PLUGIN_TYPE_PEPPER_IN_PROCESS;
PluginService::GetInstance()->RegisterInternalPlugin(bar_plugin, false);
content::WebPluginInfo fake_flash(
base::ASCIIToUTF16(content::kFlashPluginName), fake_flash_path_,
base::ASCIIToUTF16("100.0"),
base::ASCIIToUTF16("Fake Flash Description."));
mime_type.mime_type = content::kFlashPluginSwfMimeType;
fake_flash.mime_types.push_back(mime_type);
fake_flash.type = content::WebPluginInfo::PLUGIN_TYPE_PEPPER_OUT_OF_PROCESS;
PluginService::GetInstance()->RegisterInternalPlugin(fake_flash, false);
PluginService::GetInstance()->SetFilter(&filter_);
#if !defined(OS_WIN)
// Can't go out of process in unit tests.
content::RenderProcessHost::SetRunRendererInProcess(true);
#endif
base::RunLoop run_loop;
PluginService::GetInstance()->GetPlugins(
base::BindOnce(&PluginsLoaded, run_loop.QuitClosure()));
run_loop.Run();
#if !defined(OS_WIN)
content::RenderProcessHost::SetRunRendererInProcess(false);
#endif
}
protected:
TestingProfile* profile() {
return &profile_;
}
PluginInfoMessageFilter::Context* context() {
return &context_;
}
void VerifyPluginContentSetting(const GURL& url,
const std::string& plugin,
ContentSetting expected_setting,
bool expected_is_default,
bool expected_is_managed) {
ContentSetting setting = expected_setting == CONTENT_SETTING_DEFAULT ?
CONTENT_SETTING_BLOCK : CONTENT_SETTING_DEFAULT;
bool is_default = !expected_is_default;
bool is_managed = !expected_is_managed;
// Pass in a fake Flash plugin info.
content::WebPluginInfo plugin_info(
base::ASCIIToUTF16(content::kFlashPluginName), base::FilePath(),
base::ASCIIToUTF16("1"), base::ASCIIToUTF16("Fake Flash"));
PluginUtils::GetPluginContentSetting(
host_content_settings_map_, plugin_info, url::Origin(url), url, plugin,
&setting, &is_default, &is_managed);
EXPECT_EQ(expected_setting, setting);
EXPECT_EQ(expected_is_default, is_default);
EXPECT_EQ(expected_is_managed, is_managed);
}
base::FilePath foo_plugin_path_;
base::FilePath bar_plugin_path_;
base::FilePath fake_flash_path_;
FakePluginServiceFilter filter_;
private:
base::ShadowingAtExitManager at_exit_manager_; // Destroys the PluginService.
content::TestBrowserThreadBundle test_thread_bundle;
TestingProfile profile_;
PluginInfoMessageFilter::Context context_;
HostContentSettingsMap* host_content_settings_map_;
};
TEST_F(PluginInfoMessageFilterTest, FindEnabledPlugin) {
filter_.set_plugin_enabled(foo_plugin_path_, true);
filter_.set_plugin_enabled(bar_plugin_path_, true);
{
ChromeViewHostMsg_GetPluginInfo_Status status;
content::WebPluginInfo plugin;
std::string actual_mime_type;
EXPECT_TRUE(context()->FindEnabledPlugin(0, GURL(), url::Origin(),
"foo/bar", &status, &plugin,
&actual_mime_type, NULL));
EXPECT_EQ(ChromeViewHostMsg_GetPluginInfo_Status::kAllowed, status);
EXPECT_EQ(foo_plugin_path_.value(), plugin.path.value());
}
filter_.set_plugin_enabled(foo_plugin_path_, false);
{
ChromeViewHostMsg_GetPluginInfo_Status status;
content::WebPluginInfo plugin;
std::string actual_mime_type;
EXPECT_TRUE(context()->FindEnabledPlugin(0, GURL(), url::Origin(),
"foo/bar", &status, &plugin,
&actual_mime_type, NULL));
EXPECT_EQ(ChromeViewHostMsg_GetPluginInfo_Status::kAllowed, status);
EXPECT_EQ(bar_plugin_path_.value(), plugin.path.value());
}
filter_.set_plugin_enabled(bar_plugin_path_, false);
{
ChromeViewHostMsg_GetPluginInfo_Status status;
content::WebPluginInfo plugin;
std::string actual_mime_type;
std::string identifier;
base::string16 plugin_name;
EXPECT_FALSE(context()->FindEnabledPlugin(0, GURL(), url::Origin(),
"foo/bar", &status, &plugin,
&actual_mime_type, NULL));
EXPECT_EQ(ChromeViewHostMsg_GetPluginInfo_Status::kDisabled, status);
EXPECT_EQ(foo_plugin_path_.value(), plugin.path.value());
}
{
ChromeViewHostMsg_GetPluginInfo_Status status;
content::WebPluginInfo plugin;
std::string actual_mime_type;
EXPECT_FALSE(context()->FindEnabledPlugin(0, GURL(), url::Origin(),
"baz/blurp", &status, &plugin,
&actual_mime_type, NULL));
EXPECT_EQ(ChromeViewHostMsg_GetPluginInfo_Status::kNotFound, status);
EXPECT_EQ(FILE_PATH_LITERAL(""), plugin.path.value());
}
}
TEST_F(PluginInfoMessageFilterTest, PreferHtmlOverPlugins) {
base::test::ScopedFeatureList feature_list;
feature_list.InitAndEnableFeature(features::kPreferHtmlOverPlugins);
// The HTML5 By Default feature hides Flash using the plugin filter.
filter_.set_plugin_enabled(fake_flash_path_, false);
// Make a real HTTP origin, as all Flash content from non-HTTP and non-FILE
// origins are blocked.
url::Origin main_frame_origin(GURL("http://example.com"));
ChromeViewHostMsg_GetPluginInfo_Status status;
content::WebPluginInfo plugin;
std::string actual_mime_type;
EXPECT_TRUE(context()->FindEnabledPlugin(
0, GURL(), main_frame_origin, content::kFlashPluginSwfMimeType, &status,
&plugin, &actual_mime_type, NULL));
EXPECT_EQ(ChromeViewHostMsg_GetPluginInfo_Status::kFlashHiddenPreferHtml,
status);
PluginMetadata::SecurityStatus security_status =
PluginMetadata::SECURITY_STATUS_UP_TO_DATE;
context()->DecidePluginStatus(GURL(), main_frame_origin, plugin,
security_status, content::kFlashPluginName,
&status);
EXPECT_EQ(ChromeViewHostMsg_GetPluginInfo_Status::kFlashHiddenPreferHtml,
status);
// Now block plugins.
HostContentSettingsMapFactory::GetForProfile(profile())
->SetDefaultContentSetting(CONTENT_SETTINGS_TYPE_PLUGINS,
CONTENT_SETTING_BLOCK);
context()->DecidePluginStatus(GURL(), main_frame_origin, plugin,
security_status, content::kFlashPluginName,
&status);
EXPECT_EQ(ChromeViewHostMsg_GetPluginInfo_Status::kBlockedNoLoading, status);
}
TEST_F(PluginInfoMessageFilterTest, GetPluginContentSetting) {
HostContentSettingsMap* map =
HostContentSettingsMapFactory::GetForProfile(profile());
// Block plugins by default.
map->SetDefaultContentSetting(CONTENT_SETTINGS_TYPE_PLUGINS,
CONTENT_SETTING_BLOCK);
// Set plugins to Plugin Power Saver on example.com and subdomains.
GURL host("http://example.com/");
map->SetContentSettingDefaultScope(host, GURL(),
CONTENT_SETTINGS_TYPE_PLUGINS, std::string(),
CONTENT_SETTING_DETECT_IMPORTANT_CONTENT);
// Allow plugin "foo" on all sites.
map->SetContentSettingCustomScope(
ContentSettingsPattern::Wildcard(), ContentSettingsPattern::Wildcard(),
CONTENT_SETTINGS_TYPE_PLUGINS, "foo", CONTENT_SETTING_ALLOW);
GURL unmatched_host("https://www.google.com");
ASSERT_EQ(CONTENT_SETTING_BLOCK, map->GetContentSetting(
unmatched_host, unmatched_host, CONTENT_SETTINGS_TYPE_PLUGINS,
std::string()));
ASSERT_EQ(CONTENT_SETTING_DETECT_IMPORTANT_CONTENT,
map->GetContentSetting(host, host, CONTENT_SETTINGS_TYPE_PLUGINS,
std::string()));
ASSERT_EQ(CONTENT_SETTING_ALLOW, map->GetContentSetting(
host, host, CONTENT_SETTINGS_TYPE_PLUGINS, "foo"));
ASSERT_EQ(CONTENT_SETTING_DEFAULT, map->GetContentSetting(
host, host, CONTENT_SETTINGS_TYPE_PLUGINS, "bar"));
// "foo" is allowed everywhere.
VerifyPluginContentSetting(host, "foo", CONTENT_SETTING_ALLOW, false, false);
// There is no specific content setting for "bar", so the general setting
// for example.com applies.
VerifyPluginContentSetting(
host, "bar", CONTENT_SETTING_DETECT_IMPORTANT_CONTENT, false, false);
// Otherwise, use the default.
VerifyPluginContentSetting(unmatched_host, "bar", CONTENT_SETTING_BLOCK,
true, false);
// Block plugins via policy.
sync_preferences::TestingPrefServiceSyncable* prefs =
profile()->GetTestingPrefService();
prefs->SetManagedPref(prefs::kManagedDefaultPluginsSetting,
base::MakeUnique<base::Value>(CONTENT_SETTING_BLOCK));
// All plugins should be blocked now.
VerifyPluginContentSetting(host, "foo", CONTENT_SETTING_BLOCK, true, true);
VerifyPluginContentSetting(host, "bar", CONTENT_SETTING_BLOCK, true, true);
VerifyPluginContentSetting(unmatched_host, "bar", CONTENT_SETTING_BLOCK,
true, true);
}
|
; float nan(const char *tagp)
SECTION code_clib
SECTION code_fp_math48
PUBLIC cm48_sdcciy_nan
EXTERN cm48_sdcciy_nan_fastcall
cm48_sdcciy_nan:
pop af
pop hl
push hl
push af
jp cm48_sdcciy_nan_fastcall
|
#fibo
.text
main:
li $v0 5
syscall #get value
move $a0,$v0# won't beedited
li $a1, 1#n-1
li $a2, 1#n-2
li $a3, 2#first value of counter
jal fibo
li $v0 1 #print
syscall
li $v0 10 #end
syscall
fibo:
add $t0, $a1, $a2 #fibo
move $a2, $a1 #new n-2
move $a1,$t0 #new n-1
addi $a3,$a3,1
bne $a0, $a3, fibo #check if done
move $a0,$a1#latest n-1
jr $ra |
BITS 64
;TEST_FILE_META_BEGIN
;TEST_TYPE=TEST_F
;TEST_IGNOREFLAGS=FLAG_OF
;TEST_FILE_META_END
; RCL8rCL
mov bh, 0x41
mov cl, 0x4
;TEST_BEGIN_RECORDING
rcl bh, cl
;TEST_END_RECORDING
|
; $Id: bs3-mode-SwitchToPEV86.asm $
;; @file
; BS3Kit - Bs3SwitchToPEV86
;
;
; Copyright (C) 2007-2017 Oracle Corporation
;
; This file is part of VirtualBox Open Source Edition (OSE), as
; available from http://www.virtualbox.org. This file is free software;
; you can redistribute it and/or modify it under the terms of the GNU
; General Public License (GPL) as published by the Free Software
; Foundation, in version 2 as it comes in the "COPYING" file of the
; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
;
; The contents of this file may alternatively be used under the terms
; of the Common Development and Distribution License Version 1.0
; (CDDL) only, as it comes in the "COPYING.CDDL" file of the
; VirtualBox OSE distribution, in which case the provisions of the
; CDDL are applicable instead of those of the GPL.
;
; You may elect to license modified versions of this file under the
; terms and conditions of either the GPL or the CDDL or both.
;
%include "bs3kit-template-header.mac"
;;
; Switch to 16-bit v8086 unpaged protected mode with 32-bit sys+tss from any other mode.
;
; @cproto BS3_DECL(void) Bs3SwitchToPEV86(void);
;
; @uses Nothing (except high 32-bit register parts).
;
; @remarks Obviously returns to 16-bit v8086 mode, even if the caller was
; in 32-bit or 64-bit mode.
;
; @remarks Does not require 20h of parameter scratch space in 64-bit mode.
;
%if TMPL_BITS == 16
BS3_GLOBAL_NAME_EX TMPL_NM(Bs3SwitchToPEV86_Safe), function , 0
%endif
BS3_PROC_BEGIN_MODE Bs3SwitchToPEV86, BS3_PBC_NEAR
%if TMPL_MODE == BS3_MODE_PEV86
ret
%else
;
; Switch to 32-bit PE32 and from there to V8086.
;
extern TMPL_NM(Bs3SwitchToPE32)
call TMPL_NM(Bs3SwitchToPE32)
BS3_SET_BITS 32
;
; Switch to v8086 mode after adjusting the return address.
;
%if TMPL_BITS == 16
push word [esp]
mov word [esp + 2], 0
%elif TMPL_BITS == 64
pop dword [esp + 4]
%endif
extern _Bs3SwitchTo16BitV86_c32
jmp _Bs3SwitchTo16BitV86_c32
%endif
BS3_PROC_END_MODE Bs3SwitchToPEV86
%if TMPL_BITS == 16
;;
; Custom far stub.
BS3_BEGIN_TEXT16_FARSTUBS
BS3_PROC_BEGIN_MODE Bs3SwitchToPEV86, BS3_PBC_FAR
inc bp
push bp
mov bp, sp
; Call the real thing.
call TMPL_NM(Bs3SwitchToPEV86)
%if !BS3_MODE_IS_RM_OR_V86(TMPL_MODE)
; Jmp to common code for the tedious conversion.
BS3_EXTERN_CMN Bs3SwitchHlpConvProtModeRetfPopBpDecBpAndReturn
jmp Bs3SwitchHlpConvProtModeRetfPopBpDecBpAndReturn
%else
pop bp
dec bp
retf
%endif
BS3_PROC_END_MODE Bs3SwitchToPEV86
%else
;;
; Safe far return to non-BS3TEXT16 code.
BS3_EXTERN_CMN Bs3SwitchHlpConvFlatRetToRetfProtMode
BS3_BEGIN_TEXT16
BS3_SET_BITS TMPL_BITS
BS3_PROC_BEGIN_MODE Bs3SwitchToPEV86_Safe, BS3_PBC_NEAR
call Bs3SwitchHlpConvFlatRetToRetfProtMode ; Special internal function. Uses nothing, but modifies the stack.
call TMPL_NM(Bs3SwitchToPEV86)
BS3_SET_BITS 16
retf
BS3_PROC_END_MODE Bs3SwitchToPEV86_Safe
%endif
|
//=================================================================================================
/*!
// \file src/mathtest/operations/dmatdmatkron/LDbMDa.cpp
// \brief Source file for the LDbMDa dense matrix/dense matrix Kronecker product math test
//
// Copyright (C) 2012-2020 Klaus Iglberger - All Rights Reserved
//
// This file is part of the Blaze library. You can redistribute it and/or modify it under
// the terms of the New (Revised) BSD License. Redistribution and use in source and binary
// forms, with or without modification, are permitted provided that the following conditions
// are met:
//
// 1. Redistributions of source code must retain the above copyright notice, this list of
// conditions and the following disclaimer.
// 2. Redistributions in binary form must reproduce the above copyright notice, this list
// of conditions and the following disclaimer in the documentation and/or other materials
// provided with the distribution.
// 3. Neither the names of the Blaze development group nor the names of its contributors
// may be used to endorse or promote products derived from this software without specific
// prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY
// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
// OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
// SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
// TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
// ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
// DAMAGE.
*/
//=================================================================================================
//*************************************************************************************************
// Includes
//*************************************************************************************************
#include <cstdlib>
#include <iostream>
#include <blaze/math/DynamicMatrix.h>
#include <blaze/math/LowerMatrix.h>
#include <blazetest/mathtest/Creator.h>
#include <blazetest/mathtest/operations/dmatdmatkron/OperationTest.h>
#include <blazetest/system/MathTest.h>
#ifdef BLAZE_USE_HPX_THREADS
# include <hpx/hpx_main.hpp>
#endif
//=================================================================================================
//
// MAIN FUNCTION
//
//=================================================================================================
//*************************************************************************************************
int main()
{
std::cout << " Running 'LDbMDa'..." << std::endl;
using blazetest::mathtest::TypeA;
using blazetest::mathtest::TypeB;
try
{
// Matrix type definitions
using LDb = blaze::LowerMatrix< blaze::DynamicMatrix<TypeB> >;
using MDa = blaze::DynamicMatrix<TypeA>;
// Creator type definitions
using CLDb = blazetest::Creator<LDb>;
using CMDa = blazetest::Creator<MDa>;
// Running tests with small matrices
for( size_t i=0UL; i<=4UL; ++i ) {
for( size_t j=0UL; j<=4UL; ++j ) {
for( size_t k=0UL; k<=4UL; ++k ) {
RUN_DMATDMATKRON_OPERATION_TEST( CLDb( i ), CMDa( j, k ) );
}
}
}
// Running tests with large matrices
RUN_DMATDMATKRON_OPERATION_TEST( CLDb( 9UL ), CMDa( 8UL, 16UL ) );
RUN_DMATDMATKRON_OPERATION_TEST( CLDb( 16UL ), CMDa( 15UL, 9UL ) );
}
catch( std::exception& ex ) {
std::cerr << "\n\n ERROR DETECTED during dense matrix/dense matrix Kronecker product:\n"
<< ex.what() << "\n";
return EXIT_FAILURE;
}
return EXIT_SUCCESS;
}
//*************************************************************************************************
|
/*
Copyright(c) 2016-2021 Panos Karabelas
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and / or sell
copies of the Software, and to permit persons to whom the Software is furnished
to do so, subject to the following conditions :
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
//= INCLUDES =====================
#include "Spartan.h"
#include "../RHI_Implementation.h"
#include "../RHI_Sampler.h"
#include "../RHI_Device.h"
//================================
namespace Spartan
{
void RHI_Sampler::CreateResource()
{
D3D11_SAMPLER_DESC sampler_desc = {};
sampler_desc.Filter = d3d11_utility::sampler::get_filter(m_filter_min, m_filter_mag, m_filter_mipmap, m_anisotropy != 0, m_comparison_enabled);
sampler_desc.AddressU = d3d11_sampler_address_mode[static_cast<uint32_t>(m_sampler_address_mode)];
sampler_desc.AddressV = d3d11_sampler_address_mode[static_cast<uint32_t>(m_sampler_address_mode)];
sampler_desc.AddressW = d3d11_sampler_address_mode[static_cast<uint32_t>(m_sampler_address_mode)];
sampler_desc.MipLODBias = m_mip_lod_bias;
sampler_desc.MaxAnisotropy = static_cast<UINT>(m_anisotropy);
sampler_desc.ComparisonFunc = d3d11_comparison_function[static_cast<uint32_t>(m_comparison_function)];
sampler_desc.BorderColor[0] = 0;
sampler_desc.BorderColor[1] = 0;
sampler_desc.BorderColor[2] = 0;
sampler_desc.BorderColor[3] = 0;
sampler_desc.MinLOD = 0;
sampler_desc.MaxLOD = FLT_MAX;
// Create sampler state.
d3d11_utility::error_check(m_rhi_device->GetContextRhi()->device->CreateSamplerState(&sampler_desc, reinterpret_cast<ID3D11SamplerState**>(&m_resource)));
}
RHI_Sampler::~RHI_Sampler()
{
d3d11_utility::release(static_cast<ID3D11SamplerState*>(m_resource));
}
}
|
strlen:
mov rdx, rax
_strlen_loop:
cmp byte [rdx], 0
lea rdx, [rdx+1]
jne _strlen_loop
sub rdx, rax
ret
print:
push rax
push rdi
push rsi
push rdx
mov rsi, rax
call strlen
mov rax, 1 ; sys_write
mov rdi, 1 ; stdout
syscall ; x86-64 system call
pop rdx
pop rsi
pop rdi
pop rax
ret
println:
call print
push rax
push 0xA
mov rax, rsp
call print
pop rax
pop rax
ret
exit:
mov rax, 60
mov rdi, 0
syscall
|
; A292371: A binary encoding of 1-digits in the base-4 representation of n.
; Submitted by Jon Maiga
; 0,1,0,0,2,3,2,2,0,1,0,0,0,1,0,0,4,5,4,4,6,7,6,6,4,5,4,4,4,5,4,4,0,1,0,0,2,3,2,2,0,1,0,0,0,1,0,0,0,1,0,0,2,3,2,2,0,1,0,0,0,1,0,0,8,9,8,8,10,11,10,10,8,9,8,8,8,9,8,8,12,13,12,12,14,15,14,14,12,13,12,12,12,13,12,12,8,9,8,8
mov $3,1
lpb $0
mov $2,$0
div $0,4
mod $2,4
cmp $2,1
mul $2,$3
add $1,$2
mul $3,2
lpe
mov $0,$1
|
#ifndef TPF_MEMORY_LEAK_DETECT_HPP
#define TPF_MEMORY_LEAK_DETECT_HPP
/* Programmed by: Thomas Kim
First Created: Nov. 5, 2017
Last Modified: Nov. 7, 2017
Version: 1.2
*/
#include <iostream>
#include <sstream>
#include <string>
#ifdef UNICODE
#define STDSTRING std::wstring
#define STRSTREAM std::wostringstream
#define UNISTR(txt) L##txt
#define UNITXT(txt) UNISTR(#txt)
#define STDCOUT std::wcout
#else
#define STDSTRING std::string
#define STRSTREAM std::ostringstream
#define UNISTR(txt) txt
#define UNITXT(txt) UNISTR(#txt)
#define STDCOUT std::cout
#endif
#if !defined(_WINDOWS) && !defined(_AFXDLL)
#ifdef _DEBUG
// order of #define
// and #include should be preserved
#define _CRTDBG_MAP_ALLOC
#include <cstdlib>
#include <crtdbg.h>
#ifndef new
#define new new(_NORMAL_BLOCK, __FILE__, __LINE__)
#endif
class CMemLeakCheck
{
protected:
STDSTRING m_filename;
STDSTRING m_varname;
int m_lineno;
size_t m_total;
public:
CMemLeakCheck(const STDSTRING& filename=UNISTR(""),
int lineno=0, const STDSTRING& varname=UNISTR("")) :
m_filename(filename), m_lineno(lineno), m_varname(varname), m_total(0)
{
// does not work
Reset();
}
void Reset() {
_CrtMemState mem_state;
_CrtMemCheckpoint(&mem_state);
this->m_total = mem_state.lSizes[_NORMAL_BLOCK];
}
size_t Difference() {
_CrtMemState mem_state;
_CrtMemCheckpoint(&mem_state);
return mem_state.lSizes[_NORMAL_BLOCK] - this->m_total;
}
STDSTRING Message(int lineno = 0, bool from_destructor=false)
{
size_t bytes = Difference();
STRSTREAM stm;
if (bytes > 0)
{
stm << UNISTR("File: ") << m_filename << UNISTR("\nAt line: ") << (lineno ? lineno : m_lineno)
<< UNISTR(", Checkpoint: ") << m_varname << UNISTR(", ") << bytes
<< (from_destructor ? UNISTR(" bytes LEAKED.") : UNISTR(" bytes ALIVE."));
}
else
{
stm << UNISTR("Memory State CLEAN.");
}
return stm.str();
}
void Report(int lineno = 0, bool from_destructor=false)
{
STDCOUT << UNISTR("\n") << Message(lineno, from_destructor) << UNISTR("\n");
}
~CMemLeakCheck()
{
if (Difference() > 0) { Report(0, true); }
}
};
#define MemLeakCheckReport(varname) varname.Report(__LINE__)
#define MemLeakCheckMessage(varname) varname.Message(__LINE__)
#endif // end of debugging
#else // MFC Console or MFC Window
#ifdef _DEBUG
#ifndef new
#define new DEBUG_NEW
#endif
class CMemLeakCheck
{
protected:
CString m_filename;
CString m_varname;
int m_lineno;
size_t m_total;
CMemoryState mem_state;
public:
CMemLeakCheck(const CString& filename= UNISTR(""),
int lineno=0, const CString& varname= UNISTR("")) :
m_filename(filename), m_lineno(lineno), m_varname(varname), m_total(0)
{
// this does not work
// Reset();
}
void Reset()
{
mem_state.Checkpoint();
this->m_total = mem_state.m_lSizes[_NORMAL_BLOCK];
}
size_t Difference()
{
mem_state.Checkpoint();
return (mem_state.m_lSizes[_NORMAL_BLOCK]) - this->m_total;
}
#ifdef _CONSOLE
STDSTRING
#else
CString
#endif
Message(int lineno=0, bool from_destructor=false)
{
size_t bytes = Difference();
STRSTREAM stm;
if (bytes > 0)
{
stm << UNISTR("File: ") << m_filename.GetString() << UNISTR("\nAt line: ") << (lineno ? lineno : m_lineno)
<< UNISTR(", Checkpoint: ") << m_varname.GetString() << UNISTR(", ") << bytes <<
(from_destructor ? UNISTR(" bytes LEAKED.") : UNISTR(" bytes are ALIVE."));
}
else
{
stm << UNISTR("Memory Clean.");
}
#ifdef _CONSOLE
return stm.str();
#else
return CString(stm.str().c_str());
#endif
}
void Report(int lineno = 0, bool from_destructor=false)
{
#ifdef _CONSOLE
STDCOUT <<std::endl<<Message(lineno, from_destructor) << std::endl;
#else
CString msg = Message(lineno, from_destructor);
AfxMessageBox(msg);
#endif
}
~CMemLeakCheck()
{
if (Difference() > 0) { Report(0, true); }
}
};
#define MemLeakCheckReport(varname) varname.Report(__LINE__)
#define MemLeakCheckMessage(varname) varname.Message(__LINE__)
//#define MemLeakCheckReport(varname) AfxMessageBox(_T("MemLeakCheckReport is not supported in MFC Windows App"))
//#define MemLeakCheckMessage(varname) AfxMessageBox(_T("MemLeakCheckMessage is not supported in MFC Windows App"))
#endif // end of debugging
#endif //
#ifdef _DEBUG
#ifdef UNICODE
#define Tpf_MemLeakCheck(varname) CMemLeakCheck varname(__FILEW__, __LINE__, UNITXT(varname)) ; varname.Reset()
#else
#define Tpf_MemLeakCheck(varname) CMemLeakCheck varname(__FILE__, __LINE__, UNITXT(varname)) ; varname.Reset()
#endif
#define Tpf_MemLeakCheckReport(varname) varname.Report(__LINE__)
#define Tpf_MemLeakCheckMessage(varname) varname.Message(__LINE__)
#else
// non debugging mode
#define Tpf_MemLeakCheck(varname)
#define Tpf_MemLeakCheckReport(varname)
#define Tpf_MemLeakCheckMessage(varname)
#endif
#endif // end of file |
#include "MaterialTable.hpp"
using namespace LWGC;
std::unordered_map<ShaderProgram *, std::vector< Material * > > MaterialTable::_shadersPrograms;
MaterialTable * _instance = nullptr;
MaterialTable * MaterialTable::Get(void) { return _instance; }
MaterialTable::MaterialTable(void) : _swapChain(nullptr), _renderPass(nullptr), _initialized(false)
{
_instance = this;
}
MaterialTable::~MaterialTable(void)
{
}
void MaterialTable::UpdateMaterial(ShaderProgram *shaderProgram) noexcept
{
auto materials = _shadersPrograms[shaderProgram];
for (auto material: materials)
{
try {
material->ReloadShaders();
} catch (const std::runtime_error & e) {
std::cout << e.what() << std::endl;
}
}
}
void MaterialTable::RegsiterObject(Material * material)
{
ObjectTable::RegsiterObject(material);
_shadersPrograms[material->GetShaderProgram()].push_back(material);
}
void MaterialTable::Initialize(LWGC::SwapChain *swapChain , LWGC::RenderPass *renderPipeline)
{
_swapChain = swapChain;
_renderPass = renderPipeline;
for (auto material : _objects)
{
material->Initialize(_swapChain, _renderPass);
}
_initialized = true;
}
void MaterialTable::NotifyMaterialReady(Material * material)
{
if (_renderPass && _swapChain)
{
material->Initialize(_swapChain, _renderPass);
}
}
void MaterialTable::RecreateAll(void)
{
for (auto material : _objects)
{
material->CleanupPipelineAndLayout();
material->CreatePipelineLayout();
material->CreatePipeline();
}
}
void MaterialTable::SetRenderPass(RenderPass * renderPass) { _renderPass = renderPass; }
bool MaterialTable::IsInitialized(void) const noexcept { return _initialized; }
std::ostream & operator<<(std::ostream & o, MaterialTable const & r)
{
o << "tostring of the class" << std::endl;
(void)r;
return (o);
} |
; MIT License
;
; Copyright (c) 2022 Jackson Shelton <jacksonshelton8@gmail.com>
;
; Permission is hereby granted, free of charge, to any person obtaining a copy
; of this software and associated documentation files (the "Software"), to deal
; in the Software without restriction, including without limitation the rights
; to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
; copies of the Software, and to permit persons to whom the Software is
; furnished to do so, subject to the following conditions:
;
; The above copyright notice and this permission notice shall be included in all
; copies or substantial portions of the Software.
;
; THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
; IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
; FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
; AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
; LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
; OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
; SOFTWARE.
INCLUDE "hardware.inc"
SECTION "Timer interrupt", ROM0[$50]
TimerInterrupt:
ld a, [hli]
ld d, a
or e
ldh [rNR12], a
swap d
ld a, d
or e
ldh [rNR22], a
ld a, [hli]
ld d, a
ld a, $80
ldh [rNR50], a
ldh [rNR24], a
ldh [rNR14], a
ld a, d
ldh [rNR50], a
bit 7, h
jr z, sampleEnd
ld h, $30
inc bc
ld [hl], b
dec h
ld [hl], c
ld h, $40
endSample:
reti
waitSample:
jr waitSample
SECTION "Header", ROM0[$100]
EntryPoint:
di
jp Start
REPT $150 - $104
db 0
ENDR
SECTION "Game code", ROM0[$150]
Start:
di
ld a, $01
ldh [rKEY1], a
stop
nop
xor a
ldh [rNR52], a
cpl
ldh [rNR52], a
ld hl, $4000
ld bc, $0001
ld sp, $fffe
ld a, $e0
ldh [rNR13], a
ldh [rNR23], a
ld a, $c0
ldh [rNR11], a
ldh [rNR21], a
ld a, $0f
ldh [rNR12], a
ldh [rNR22], a
ld a, $87
ldh [rDIV], a
ldh [rNR14], a
stallPulse1:
ldh a, [rDIV]
cp 19
jr nz, stallPulse1
xor a
ldh [rNR13], a
ld a, $80
ldh [rNR14], a
ld a, $87
ldh [rDIV], a
ldh [rNR24], a
stallPulse2:
ldh a, [rDIV]
cp 19
jr nz, stallPulse2
xor a
ldh [rNR23], a
ld a, $80
ldh [rNR24], a
ldh [rNR14], a
ld e, $0f
ld a, $12
ldh [rNR51], a
ld a, $77
ldh [rNR50], a
|
#ifndef projectmodeldatabase_hpp
#define projectmodeldatabase_hpp
#include "litesql.hpp"
namespace ProjectModel {
class Project;
class Analysis;
class Model;
class Result;
class ResultQuery;
class RequestedResult;
class AnalysisProjectRelation {
public:
class Row {
public:
litesql::Field<int> project;
litesql::Field<int> analysis;
Row(const litesql::Database& db, const litesql::Record& rec=litesql::Record());
};
static const std::string table__;
static const litesql::FieldType Analysis;
static const litesql::FieldType Project;
static void link(const litesql::Database& db, const ProjectModel::Analysis& o0, const ProjectModel::Project& o1);
static void unlink(const litesql::Database& db, const ProjectModel::Analysis& o0, const ProjectModel::Project& o1);
static void del(const litesql::Database& db, const litesql::Expr& expr=litesql::Expr());
static litesql::DataSource<AnalysisProjectRelation::Row> getRows(const litesql::Database& db, const litesql::Expr& expr=litesql::Expr());
template <class T> static litesql::DataSource<T> get(const litesql::Database& db, const litesql::Expr& expr=litesql::Expr(), const litesql::Expr& srcExpr=litesql::Expr());
;
;
};
class AnalysisModelRelation {
public:
class Row {
public:
litesql::Field<int> model;
litesql::Field<int> analysis;
Row(const litesql::Database& db, const litesql::Record& rec=litesql::Record());
};
static const std::string table__;
static const litesql::FieldType Analysis;
static const litesql::FieldType Model;
static void link(const litesql::Database& db, const ProjectModel::Analysis& o0, const ProjectModel::Model& o1);
static void unlink(const litesql::Database& db, const ProjectModel::Analysis& o0, const ProjectModel::Model& o1);
static void del(const litesql::Database& db, const litesql::Expr& expr=litesql::Expr());
static litesql::DataSource<AnalysisModelRelation::Row> getRows(const litesql::Database& db, const litesql::Expr& expr=litesql::Expr());
template <class T> static litesql::DataSource<T> get(const litesql::Database& db, const litesql::Expr& expr=litesql::Expr(), const litesql::Expr& srcExpr=litesql::Expr());
;
;
};
class ModelResultRelation {
public:
class Row {
public:
litesql::Field<int> result;
litesql::Field<int> model;
Row(const litesql::Database& db, const litesql::Record& rec=litesql::Record());
};
static const std::string table__;
static const litesql::FieldType Model;
static const litesql::FieldType Result;
static void link(const litesql::Database& db, const ProjectModel::Model& o0, const ProjectModel::Result& o1);
static void unlink(const litesql::Database& db, const ProjectModel::Model& o0, const ProjectModel::Result& o1);
static void del(const litesql::Database& db, const litesql::Expr& expr=litesql::Expr());
static litesql::DataSource<ModelResultRelation::Row> getRows(const litesql::Database& db, const litesql::Expr& expr=litesql::Expr());
template <class T> static litesql::DataSource<T> get(const litesql::Database& db, const litesql::Expr& expr=litesql::Expr(), const litesql::Expr& srcExpr=litesql::Expr());
;
;
};
class ResultResultQueryRelation {
public:
class Row {
public:
litesql::Field<int> resultQuery;
litesql::Field<int> result;
Row(const litesql::Database& db, const litesql::Record& rec=litesql::Record());
};
static const std::string table__;
static const litesql::FieldType Result;
static const litesql::FieldType ResultQuery;
static void link(const litesql::Database& db, const ProjectModel::Result& o0, const ProjectModel::ResultQuery& o1);
static void unlink(const litesql::Database& db, const ProjectModel::Result& o0, const ProjectModel::ResultQuery& o1);
static void del(const litesql::Database& db, const litesql::Expr& expr=litesql::Expr());
static litesql::DataSource<ResultResultQueryRelation::Row> getRows(const litesql::Database& db, const litesql::Expr& expr=litesql::Expr());
template <class T> static litesql::DataSource<T> get(const litesql::Database& db, const litesql::Expr& expr=litesql::Expr(), const litesql::Expr& srcExpr=litesql::Expr());
;
;
};
class RequestedResultResultQueryRelation {
public:
class Row {
public:
litesql::Field<int> resultQuery;
litesql::Field<int> requestedResult;
Row(const litesql::Database& db, const litesql::Record& rec=litesql::Record());
};
static const std::string table__;
static const litesql::FieldType RequestedResult;
static const litesql::FieldType ResultQuery;
static void link(const litesql::Database& db, const ProjectModel::RequestedResult& o0, const ProjectModel::ResultQuery& o1);
static void unlink(const litesql::Database& db, const ProjectModel::RequestedResult& o0, const ProjectModel::ResultQuery& o1);
static void del(const litesql::Database& db, const litesql::Expr& expr=litesql::Expr());
static litesql::DataSource<RequestedResultResultQueryRelation::Row> getRows(const litesql::Database& db, const litesql::Expr& expr=litesql::Expr());
template <class T> static litesql::DataSource<T> get(const litesql::Database& db, const litesql::Expr& expr=litesql::Expr(), const litesql::Expr& srcExpr=litesql::Expr());
;
;
};
class Project : public litesql::Persistent {
public:
class Own {
public:
static const litesql::FieldType Id;
};
class AnalysesHandle : public litesql::RelationHandle<Project> {
public:
AnalysesHandle(const Project& owner);
void link(const Analysis& o0);
void unlink(const Analysis& o0);
void del(const litesql::Expr& expr=litesql::Expr());
litesql::DataSource<Analysis> get(const litesql::Expr& expr=litesql::Expr(), const litesql::Expr& srcExpr=litesql::Expr());
litesql::DataSource<AnalysisProjectRelation::Row> getRows(const litesql::Expr& expr=litesql::Expr());
};
static const std::string type__;
static const std::string table__;
static const std::string sequence__;
static const litesql::FieldType Id;
litesql::Field<int> id;
static const litesql::FieldType Type;
litesql::Field<std::string> type;
static const litesql::FieldType Name;
litesql::Field<std::string> name;
static const litesql::FieldType Projecttype;
litesql::Field<std::string> projecttype;
protected:
void defaults();
public:
Project(const litesql::Database& db);
Project(const litesql::Database& db, const litesql::Record& rec);
Project(const Project& obj);
const Project& operator=(const Project& obj);
Project::AnalysesHandle analyses();
protected:
std::string insert(litesql::Record& tables, litesql::Records& fieldRecs, litesql::Records& valueRecs);
void create();
virtual void addUpdates(Updates& updates);
virtual void addIDUpdates(Updates& updates);
public:
static void getFieldTypes(std::vector<litesql::FieldType>& ftypes);
protected:
virtual void delRecord();
virtual void delRelations();
public:
virtual void update();
virtual void del();
virtual bool typeIsCorrect();
std::auto_ptr<Project> upcast();
std::auto_ptr<Project> upcastCopy();
};
std::ostream & operator<<(std::ostream& os, Project o);
class Analysis : public litesql::Persistent {
public:
class Own {
public:
static const litesql::FieldType Id;
};
class ProjectHandle : public litesql::RelationHandle<Analysis> {
public:
ProjectHandle(const Analysis& owner);
void link(const Project& o0);
void unlink(const Project& o0);
void del(const litesql::Expr& expr=litesql::Expr());
litesql::DataSource<Project> get(const litesql::Expr& expr=litesql::Expr(), const litesql::Expr& srcExpr=litesql::Expr());
litesql::DataSource<AnalysisProjectRelation::Row> getRows(const litesql::Expr& expr=litesql::Expr());
};
class ModelsHandle : public litesql::RelationHandle<Analysis> {
public:
ModelsHandle(const Analysis& owner);
void link(const Model& o0);
void unlink(const Model& o0);
void del(const litesql::Expr& expr=litesql::Expr());
litesql::DataSource<Model> get(const litesql::Expr& expr=litesql::Expr(), const litesql::Expr& srcExpr=litesql::Expr());
litesql::DataSource<AnalysisModelRelation::Row> getRows(const litesql::Expr& expr=litesql::Expr());
};
static const std::string type__;
static const std::string table__;
static const std::string sequence__;
static const litesql::FieldType Id;
litesql::Field<int> id;
static const litesql::FieldType Type;
litesql::Field<std::string> type;
static const litesql::FieldType Name;
litesql::Field<std::string> name;
static const litesql::FieldType Analysistype;
litesql::Field<std::string> analysistype;
protected:
void defaults();
public:
Analysis(const litesql::Database& db);
Analysis(const litesql::Database& db, const litesql::Record& rec);
Analysis(const Analysis& obj);
const Analysis& operator=(const Analysis& obj);
Analysis::ProjectHandle project();
Analysis::ModelsHandle models();
protected:
std::string insert(litesql::Record& tables, litesql::Records& fieldRecs, litesql::Records& valueRecs);
void create();
virtual void addUpdates(Updates& updates);
virtual void addIDUpdates(Updates& updates);
public:
static void getFieldTypes(std::vector<litesql::FieldType>& ftypes);
protected:
virtual void delRecord();
virtual void delRelations();
public:
virtual void update();
virtual void del();
virtual bool typeIsCorrect();
std::auto_ptr<Analysis> upcast();
std::auto_ptr<Analysis> upcastCopy();
};
std::ostream & operator<<(std::ostream& os, Analysis o);
class Model : public litesql::Persistent {
public:
class Own {
public:
static const litesql::FieldType Id;
};
class AnalysesHandle : public litesql::RelationHandle<Model> {
public:
AnalysesHandle(const Model& owner);
void link(const Analysis& o0);
void unlink(const Analysis& o0);
void del(const litesql::Expr& expr=litesql::Expr());
litesql::DataSource<Analysis> get(const litesql::Expr& expr=litesql::Expr(), const litesql::Expr& srcExpr=litesql::Expr());
litesql::DataSource<AnalysisModelRelation::Row> getRows(const litesql::Expr& expr=litesql::Expr());
};
class ResultsHandle : public litesql::RelationHandle<Model> {
public:
ResultsHandle(const Model& owner);
void link(const Result& o0);
void unlink(const Result& o0);
void del(const litesql::Expr& expr=litesql::Expr());
litesql::DataSource<Result> get(const litesql::Expr& expr=litesql::Expr(), const litesql::Expr& srcExpr=litesql::Expr());
litesql::DataSource<ModelResultRelation::Row> getRows(const litesql::Expr& expr=litesql::Expr());
};
static const std::string type__;
static const std::string table__;
static const std::string sequence__;
static const litesql::FieldType Id;
litesql::Field<int> id;
static const litesql::FieldType Type;
litesql::Field<std::string> type;
static const litesql::FieldType Name;
litesql::Field<std::string> name;
static const litesql::FieldType Path;
litesql::Field<std::string> path;
static const litesql::FieldType Guid;
litesql::Field<std::string> guid;
protected:
void defaults();
public:
Model(const litesql::Database& db);
Model(const litesql::Database& db, const litesql::Record& rec);
Model(const Model& obj);
const Model& operator=(const Model& obj);
Model::AnalysesHandle analyses();
Model::ResultsHandle results();
protected:
std::string insert(litesql::Record& tables, litesql::Records& fieldRecs, litesql::Records& valueRecs);
void create();
virtual void addUpdates(Updates& updates);
virtual void addIDUpdates(Updates& updates);
public:
static void getFieldTypes(std::vector<litesql::FieldType>& ftypes);
protected:
virtual void delRecord();
virtual void delRelations();
public:
virtual void update();
virtual void del();
virtual bool typeIsCorrect();
std::auto_ptr<Model> upcast();
std::auto_ptr<Model> upcastCopy();
};
std::ostream & operator<<(std::ostream& os, Model o);
class Result : public litesql::Persistent {
public:
class Own {
public:
static const litesql::FieldType Id;
};
class ModelHandle : public litesql::RelationHandle<Result> {
public:
ModelHandle(const Result& owner);
void link(const Model& o0);
void unlink(const Model& o0);
void del(const litesql::Expr& expr=litesql::Expr());
litesql::DataSource<Model> get(const litesql::Expr& expr=litesql::Expr(), const litesql::Expr& srcExpr=litesql::Expr());
litesql::DataSource<ModelResultRelation::Row> getRows(const litesql::Expr& expr=litesql::Expr());
};
class ResultqueriesHandle : public litesql::RelationHandle<Result> {
public:
ResultqueriesHandle(const Result& owner);
void link(const ResultQuery& o0);
void unlink(const ResultQuery& o0);
void del(const litesql::Expr& expr=litesql::Expr());
litesql::DataSource<ResultQuery> get(const litesql::Expr& expr=litesql::Expr(), const litesql::Expr& srcExpr=litesql::Expr());
litesql::DataSource<ResultResultQueryRelation::Row> getRows(const litesql::Expr& expr=litesql::Expr());
};
static const std::string type__;
static const std::string table__;
static const std::string sequence__;
static const litesql::FieldType Id;
litesql::Field<int> id;
static const litesql::FieldType Type;
litesql::Field<std::string> type;
static const litesql::FieldType Value;
litesql::Field<int> value;
protected:
void defaults();
public:
Result(const litesql::Database& db);
Result(const litesql::Database& db, const litesql::Record& rec);
Result(const Result& obj);
const Result& operator=(const Result& obj);
Result::ModelHandle model();
Result::ResultqueriesHandle resultqueries();
protected:
std::string insert(litesql::Record& tables, litesql::Records& fieldRecs, litesql::Records& valueRecs);
void create();
virtual void addUpdates(Updates& updates);
virtual void addIDUpdates(Updates& updates);
public:
static void getFieldTypes(std::vector<litesql::FieldType>& ftypes);
protected:
virtual void delRecord();
virtual void delRelations();
public:
virtual void update();
virtual void del();
virtual bool typeIsCorrect();
std::auto_ptr<Result> upcast();
std::auto_ptr<Result> upcastCopy();
};
std::ostream & operator<<(std::ostream& os, Result o);
class ResultQuery : public litesql::Persistent {
public:
class Own {
public:
static const litesql::FieldType Id;
};
class ResultHandle : public litesql::RelationHandle<ResultQuery> {
public:
ResultHandle(const ResultQuery& owner);
void link(const Result& o0);
void unlink(const Result& o0);
void del(const litesql::Expr& expr=litesql::Expr());
litesql::DataSource<Result> get(const litesql::Expr& expr=litesql::Expr(), const litesql::Expr& srcExpr=litesql::Expr());
litesql::DataSource<ResultResultQueryRelation::Row> getRows(const litesql::Expr& expr=litesql::Expr());
};
class RequestedresultsHandle : public litesql::RelationHandle<ResultQuery> {
public:
RequestedresultsHandle(const ResultQuery& owner);
void link(const RequestedResult& o0);
void unlink(const RequestedResult& o0);
void del(const litesql::Expr& expr=litesql::Expr());
litesql::DataSource<RequestedResult> get(const litesql::Expr& expr=litesql::Expr(), const litesql::Expr& srcExpr=litesql::Expr());
litesql::DataSource<RequestedResultResultQueryRelation::Row> getRows(const litesql::Expr& expr=litesql::Expr());
};
static const std::string type__;
static const std::string table__;
static const std::string sequence__;
static const litesql::FieldType Id;
litesql::Field<int> id;
static const litesql::FieldType Type;
litesql::Field<std::string> type;
static const litesql::FieldType Query;
litesql::Field<std::string> query;
protected:
void defaults();
public:
ResultQuery(const litesql::Database& db);
ResultQuery(const litesql::Database& db, const litesql::Record& rec);
ResultQuery(const ResultQuery& obj);
const ResultQuery& operator=(const ResultQuery& obj);
ResultQuery::ResultHandle result();
ResultQuery::RequestedresultsHandle requestedresults();
protected:
std::string insert(litesql::Record& tables, litesql::Records& fieldRecs, litesql::Records& valueRecs);
void create();
virtual void addUpdates(Updates& updates);
virtual void addIDUpdates(Updates& updates);
public:
static void getFieldTypes(std::vector<litesql::FieldType>& ftypes);
protected:
virtual void delRecord();
virtual void delRelations();
public:
virtual void update();
virtual void del();
virtual bool typeIsCorrect();
std::auto_ptr<ResultQuery> upcast();
std::auto_ptr<ResultQuery> upcastCopy();
};
std::ostream & operator<<(std::ostream& os, ResultQuery o);
class RequestedResult : public litesql::Persistent {
public:
class Own {
public:
static const litesql::FieldType Id;
};
class ResultqueryHandle : public litesql::RelationHandle<RequestedResult> {
public:
ResultqueryHandle(const RequestedResult& owner);
void link(const ResultQuery& o0);
void unlink(const ResultQuery& o0);
void del(const litesql::Expr& expr=litesql::Expr());
litesql::DataSource<ResultQuery> get(const litesql::Expr& expr=litesql::Expr(), const litesql::Expr& srcExpr=litesql::Expr());
litesql::DataSource<RequestedResultResultQueryRelation::Row> getRows(const litesql::Expr& expr=litesql::Expr());
};
static const std::string type__;
static const std::string table__;
static const std::string sequence__;
static const litesql::FieldType Id;
litesql::Field<int> id;
static const litesql::FieldType Type;
litesql::Field<std::string> type;
static const litesql::FieldType Result;
litesql::Field<std::string> result;
protected:
void defaults();
public:
RequestedResult(const litesql::Database& db);
RequestedResult(const litesql::Database& db, const litesql::Record& rec);
RequestedResult(const RequestedResult& obj);
const RequestedResult& operator=(const RequestedResult& obj);
RequestedResult::ResultqueryHandle resultquery();
protected:
std::string insert(litesql::Record& tables, litesql::Records& fieldRecs, litesql::Records& valueRecs);
void create();
virtual void addUpdates(Updates& updates);
virtual void addIDUpdates(Updates& updates);
public:
static void getFieldTypes(std::vector<litesql::FieldType>& ftypes);
protected:
virtual void delRecord();
virtual void delRelations();
public:
virtual void update();
virtual void del();
virtual bool typeIsCorrect();
std::auto_ptr<RequestedResult> upcast();
std::auto_ptr<RequestedResult> upcastCopy();
};
std::ostream & operator<<(std::ostream& os, RequestedResult o);
class ProjectModelDatabase : public litesql::Database {
public:
ProjectModelDatabase(std::string backendType, std::string connInfo);
protected:
virtual std::vector<litesql::Database::SchemaItem> getSchema() const;
static void initialize();
};
}
#endif
|
include "include/HARDWARE.INC"
include "include/hUGE.inc"
add_a_to_r16: MACRO
add \2
ld \2, a
adc \1
sub \2
ld \1, a
ENDM
;; Thanks PinoBatch!
sub_from_r16: MACRO ;; (high, low, value)
ld a, \2
sub \3
ld \2, a
sbc a ; A = -1 if borrow or 0 if not
add \1
ld \1, a
ENDM
add_a_to_hl: MACRO
add_a_to_r16 h, l
ENDM
add_a_to_de: MACRO
add_a_to_r16 d, e
ENDM
ret_dont_call_playnote: MACRO
pop hl
pop af
ld a, 6 ; How many bytes until the next channel's code
add_a_to_hl
jp hl
ENDM
add_a_ind_ret_hl: MACRO
ld hl, \1
add [hl]
inc hl
ld h, [hl]
ld l, a
adc h
sub l
ld h, a
ENDM
load_hl_ind: MACRO
ld hl, \1
ld a, [hl+]
ld h, [hl]
ld l, a
ENDM
load_de_ind: MACRO
ld a, [\1]
ld e, a
ld a, [\1+1]
ld d, a
ENDM
retMute: MACRO
bit \1, a
ret nz
ENDM
checkMute: MACRO
ld a, [mute_channels]
bit \1, a
jr nz, \2
ENDM
loadShort: MACRO
ld a, [\1]
ld \3, a
ld a, [\1 + 1]
ld \2, a
ENDM
;; Maximum pattern length
PATTERN_LENGTH EQU 64
;; Amount to be shifted in order to skip a channel.
CHANNEL_SIZE_EXPONENT EQU 3
SECTION "Playback variables", WRAM0
_start_vars:
;; active song descriptor
order_cnt: db
_start_song_descriptor_pointers:
order1: dw
order2: dw
order3: dw
order4: dw
duty_instruments: dw
wave_instruments: dw
noise_instruments: dw
routines: dw
waves: dw
_end_song_descriptor_pointers:
;; variables
mute_channels: db
pattern1: dw
pattern2: dw
pattern3: dw
pattern4: dw
ticks_per_row: db
current_order: db
next_order: db
row_break: db
temp_note_value: dw
row: db
tick: db
counter: db
__current_ch3_wave::
_hUGE_current_wave::
current_wave: db
channels:
;;;;;;;;;;;
;;Channel 1
;;;;;;;;;;;
channel1:
channel_period1: dw
toneporta_target1: dw
channel_note1: db
vibrato_tremolo_phase1: db
envelope1: db
highmask1: db
;;;;;;;;;;;
;;Channel 2
;;;;;;;;;;;
channel2:
channel_period2: dw
toneporta_target2: dw
channel_note2: db
vibrato_tremolo_phase2: db
envelope2: db
highmask2: db
;;;;;;;;;;;
;;Channel 3
;;;;;;;;;;;
channel3:
channel_period3: dw
toneporta_target3: dw
channel_note3: db
vibrato_tremolo_phase3: db
envelope3: db
highmask3: db
;;;;;;;;;;;
;;Channel 4
;;;;;;;;;;;
channel4:
channel_period4: dw
toneporta_target4: dw
channel_note4: db
vibrato_tremolo_phase4: db
envelope4: db
highmask4: db
_end_vars:
SECTION "Sound Driver", ROMX
_hUGE_init_banked::
ld hl, sp+2+4
jr continue_init
_hUGE_init::
ld hl, sp+2
continue_init:
push bc
ld a, [hl+]
ld h, [hl]
ld l, a
call hUGE_init
pop bc
ret
_hUGE_mute_channel_banked::
ld hl, sp+3+4
jr continue_mute
_hUGE_mute_channel::
ld hl, sp+3
continue_mute:
push bc
ld a, [hl-]
and 1
ld c, a
ld b, [hl]
call hUGE_mute_channel
pop bc
ret
hUGE_mute_channel::
;; B: channel
;; C: enable flag
ld e, $fe
ld a, b
or a
jr z, .enable_cut
.enable_loop:
sla c
rlc e
dec a
jr nz, .enable_loop
.enable_cut:
ld a, [mute_channels]
and e
or c
ld [mute_channels], a
and c
call nz, note_cut
ret
_hUGE_set_position_banked::
ld hl, sp+2+4
jr continue_set_position
_hUGE_set_position::
ld hl, sp+2
continue_set_position:
push bc
ld c, [hl]
call hUGE_set_position
pop bc
ret
hUGE_init::
push hl
if !DEF(PREVIEW_MODE)
;; Zero some ram
ld c, _end_vars - _start_vars
ld hl, _start_vars
xor a
.fill_loop:
ld [hl+], a
dec c
jr nz, .fill_loop
ENDC
ld a, %11110000
ld [envelope1], a
ld [envelope2], a
ld a, 100
ld [current_wave], a
pop hl
ld a, [hl+] ; tempo
ld [ticks_per_row], a
ld a, [hl+]
ld e, a
ld a, [hl+]
ld d, a
ld a, [de]
ld [order_cnt], a
ld c, _end_song_descriptor_pointers - (_start_song_descriptor_pointers)
ld de, order1
.copy_song_descriptor_loop:
ld a, [hl+]
ld [de], a
inc de
dec c
jr nz, .copy_song_descriptor_loop
ld a, [current_order]
ld c, a ;; Current order index
;; Fall through into _refresh_patterns
_refresh_patterns:
;; Loads pattern registers with pointers to correct pattern based on
;; an order index
;; Call with c set to what order to load
IF DEF(PREVIEW_MODE)
db $fc ; signal order update to tracker
ENDC
ld hl, order1
ld de, pattern1
call .load_pattern
ld hl, order2
call .load_pattern
ld hl, order3
call .load_pattern
ld hl, order4
.load_pattern:
ld a, [hl+]
ld h, [hl]
ld l, a
ld a, c
add_a_to_hl
ld a, [hl+]
ld [de], a
inc de
ld a, [hl]
ld [de], a
inc de
ret
_load_note_data:
;; Call with:
;; Pattern pointer in BC
;; Stores instrument/effect code in B
;; Stores effect params in C
;; Stores note number in A
ld a, [row]
ld h, a
;; Multiply by 3 for the note value
add h
add h
add 2
ld h, 0
ld l, a
add hl, bc ; HL now points at the 3rd byte of the note
ld a, [hl-]
ld c, a
ld a, [hl-]
ld b, a
ld a, [hl]
ret
_lookup_note:
;; Call with:
;; Pattern pointer in BC
;; channel_noteX pointer in DE
;; Stores note period value in HL
;; Stores instrument/effect code in B
;; Stores effect params in C
;; Stores note number in the memory pointed to by DE
call _load_note_data
ld hl, 0
;; If the note we found is greater than LAST_NOTE, then it's not a valid note
;; and nothing needs to be updated.
cp LAST_NOTE
ret nc
;; Store the loaded note value in channel_noteX
ld [de], a
_convert_note:
;; Call with:
;; Note number in A
;; Stores note period value in HL
add a ;; double it to get index into hi/lo table
ld hl, note_table
add_a_to_hl
ld a, [hl+]
ld h, [hl]
ld l, a
scf
ret
_convert_ch4_note:
;; Call with:
;; Note number in A
;; Stores polynomial counter in A
;; Free: HL
;; Invert the order of the numbers
add 192 ; (255 - 63)
cpl
;; Thanks to RichardULZ for this formula
;; https://docs.google.com/spreadsheets/d/1O9OTAHgLk1SUt972w88uVHp44w7HKEbS/edit#gid=75028951
; if A > 7 then begin
; B := (A-4) div 4;
; C := (A mod 4)+4;
; A := (C or (B shl 4))
; end;
; if A < 7 then return
cp 7
ret c
ld h, a
; B := (A-4) div 4;
sub 4
srl a
srl a
ld l, a
; C := (A mod 4)+4;
ld a, h
and 3 ; mod 4
add 4
; A := (C or (B shl 4))
swap l
or l
ret
_update_channel:
;; Call with:
;; Highmask in A
;; Channel in B
;; Note tone in DE
ld c, a
ld a, [mute_channels]
dec b
jr z, .update_channel2
dec b
jr z, .update_channel3
dec b
jr z, .update_channel4
.update_channel1:
retMute 0
ld a, e
ld [rAUD1LOW], a
ld a, d
or c
ld [rAUD1HIGH], a
ret
.update_channel2:
retMute 1
ld a, e
ld [rAUD2LOW], a
ld a, d
or c
ld [rAUD2HIGH], a
ret
.update_channel3:
retMute 2
ld a, e
ld [rAUD3LOW], a
ld a, d
or c
ld [rAUD3HIGH], a
ret
.update_channel4:
retMute 3
ld a, e
call _convert_ch4_note
ld [rAUD4POLY], a
xor a
ld [rAUD4GO], a
ret
_play_note_routines:
jr _playnote1
jr _playnote2
jr _playnote3
jr _playnote4
_playnote1:
ld a, [mute_channels]
retMute 0
;; Play a note on channel 1 (square wave)
ld a, [temp_note_value+1]
ld [channel_period1], a
ld [rAUD1LOW], a
ld a, [temp_note_value]
ld [channel_period1+1], a
;; Get the highmask and apply it.
ld hl, highmask1
or [hl]
ld [rAUD1HIGH], a
ret
_playnote2:
ld a, [mute_channels]
retMute 1
;; Play a note on channel 2 (square wave)
ld a, [temp_note_value+1]
ld [channel_period2], a
ld [rAUD2LOW], a
ld a, [temp_note_value]
ld [channel_period2+1], a
;; Get the highmask and apply it.
ld hl, highmask2
or [hl]
ld [rAUD2HIGH], a
ret
_playnote3:
ld a, [mute_channels]
retMute 2
;; This fixes a gameboy hardware quirk, apparently.
;; The problem is emulated accurately in BGB.
;; https://gbdev.gg8.se/wiki/articles/Gameboy_sound_hardware
xor a
ld [rAUD3ENA], a
cpl
ld [rAUD3ENA], a
;; Play a note on channel 3 (waveform)
ld a, [temp_note_value+1]
ld [channel_period3], a
ld [rAUD3LOW], a
ld a, [temp_note_value]
ld [channel_period3+1], a
;; Get the highmask and apply it.
ld hl, highmask3
or [hl]
ld [rAUD3HIGH], a
ret
_playnote4:
ld a, [mute_channels]
retMute 3
;; Play a "note" on channel 4 (noise)
ld a, [temp_note_value]
ld [channel_period4+1], a
ld [rAUD4POLY], a
;; Get the highmask and apply it.
ld a, [highmask4]
ld [rAUD4GO], a
ret
_doeffect:
;; Call with:
;; B: instrument nibble + effect type nibble
;; C: effect parameters
;; E: channel
;; free: A, D, H, L
;; Strip the instrument bits off leaving only effect code
ld a, b
and %00001111
;; Multiply by 2 to get offset into table
add a, a
ld hl, .jump
add_a_to_hl
ld a, [hl+]
ld h, [hl]
ld l, a
ld b, e
ld a, [tick]
or a ; We can return right off the bat if it's tick zero
jp hl
.jump:
;; Jump table for effect
dw fx_arpeggio ;0xy
dw fx_porta_up ;1xy
dw fx_porta_down ;2xy
dw fx_toneporta ;3xy
dw fx_vibrato ;4xy
dw fx_set_master_volume ;5xy ; global
dw fx_call_routine ;6xy
dw fx_note_delay ;7xy
dw fx_set_pan ;8xy
dw fx_set_duty ;9xy
dw fx_vol_slide ;Axy
dw fx_pos_jump ;Bxy ; global
dw fx_set_volume ;Cxy
dw fx_pattern_break ;Dxy ; global
dw fx_note_cut ;Exy
dw fx_set_speed ;Fxy ; global
setup_channel_pointer:
;; Call with:
;; Channel value in B
;; Offset in D
;; Returns value in HL
ld a, b
REPT CHANNEL_SIZE_EXPONENT
add a
ENDR
add d
ld hl, channels
add_a_to_hl
ret
fx_set_master_volume:
ret nz
;; A: tick
;; ZF: (tick == 0)
;; B: channel
;; C: effect parameters
;; free registers: A, D, E, H, L
;; Upper 4 bits contain volume for left, lower 4 bits for right
;; Format is ?LLL ?RRR where ? is just a random bit, since we don't use
;; the Vin
;; This can be used as a more fine grained control over channel 3's output,
;; if you pan it completely.
ld a, c
ld [rAUDVOL], a
ret
fx_call_routine:
;; A: tick
;; ZF: (tick == 0)
;; B: channel
;; C: effect parameters
;; free registers: A, D, E, H, L
;; Routines are 16 bytes. Shift left to multiply by 16, then
;; jump to that location.
load_hl_ind routines
ld a, h
or l
ret z
ld a, c
and $0f
add a
add_a_to_hl
ld a, [hl+]
ld h, [hl]
ld l, a
ld a, [tick]
push af
inc sp
push bc
or a ; set zero flag if tick 0 for compatibility
call .call_hl
add sp, 3
ret
.call_hl:
jp hl
fx_set_pan:
ret nz
;; A: tick
;; ZF: (tick == 0)
;; B: channel
;; C: effect parameters
;; free registers: A, D, E, H, L
;; Pretty simple. The editor can create the correct value here without a bunch
;; of bit shifting manually.
ld a, c
ld [rAUDTERM], a
ret
fx_set_duty:
ret nz
;; A: tick
;; ZF: (tick == 0)
;; B: channel
;; C: effect parameters
;; free registers: A, D, E, H, L
;; $900 = 12.5%
;; $940 = 25%
;; $980 = 50%
;; $9C0 = 75%
ld a, b
or a
ld a, [mute_channels]
jr z, .chan1
.chan2:
retMute 1
ld a, c
ld [rAUD2LEN], a
ret
.chan1:
retMute 0
ld a, c
ld [rAUD1LEN], a
ret
fx_vol_slide:
ret nz
;; This is really more of a "retrigger note with lower volume" effect and thus
;; isn't really that useful. Instrument envelopes should be used instead.
;; Might replace this effect with something different if a new effect is
;; ever needed.
;; A: tick
;; ZF: (tick == 0)
;; B: channel
;; C: effect parameters
;; free registers: A, D, E, H, L
;; Todo
;; check channel mute
ld d, 1
ld a, b
or a
jr z, .cont
.loop:
sla d
dec a
jr nz, .loop
.cont:
ld a, [mute_channels]
and d
ret nz
ld d, 0
call setup_channel_pointer
ld a, [hl+]
ld [temp_note_value+1], a
ld a, [hl]
ld [temp_note_value], a
ld a, b
add a
ld hl, _envelope_registers
add_a_to_hl
ld a, [hl+]
ld h, [hl]
ld l, a
;; setup the up and down params
ld a, c
and %00001111
ld d, a
ld a, c
and %11110000
ld e, a
swap e
ld a, [hl]
and %11110000
swap a
sub d
jr nc, .cont1
xor a
.cont1:
add e
cp $10
jr c, .cont2
ld a, $F
.cont2:
swap a
ld [hl+], a
inc hl
ld a, [hl]
or %10000000
ld [hl], a
ld hl, _play_note_routines
ld a, b
add a
add_a_to_hl
jp hl
_envelope_registers:
dw rAUD1ENV
dw rAUD2ENV
dw rAUD3LEVEL
dw rAUD4ENV
fx_note_delay:
;; A: tick
;; ZF: (tick == 0)
;; B: channel
;; C: effect parameters
;; free registers: A, D, E, H, L
jr nz, .play_note
;; Just store the note into the channel period, and don't play a note.
ld d, 0
call setup_channel_pointer
ld a, [temp_note_value]
ld [hl+], a
ld a, [temp_note_value+1]
ld [hl], a
;; Don't call _playnote. This is done by grabbing the return
;; address and manually skipping the next call instruction.
ret_dont_call_playnote
.play_note:
ld a, [tick]
cp c
ret nz ; wait until the correct tick to play the note
ld d, 0
call setup_channel_pointer
;; TODO: Change this to accept HL instead?
ld a, [hl+]
ld [temp_note_value], a
ld a, [hl]
ld [temp_note_value+1], a
;; TODO: Generalize this somehow?
ld hl, _play_note_routines
ld a, b
add a
add_a_to_hl
jp hl
fx_set_speed:
ret nz
;; A: tick
;; ZF: (tick == 0)
;; B: channel
;; C: effect parameters
;; free registers: A, D, E, H, L
ld a, c
ld [ticks_per_row], a
ret
hUGE_set_position::
fx_pos_jump:
;; A: tick
;; ZF: (tick == 0)
;; B: channel
;; C: effect parameters
;; free registers: A, D, E, H, L
ld a, 1
ld [row_break], a
ld a, c
ld [next_order], a
ret
fx_pattern_break:
;; A: tick
;; ZF: (tick == 0)
;; B: channel
;; C: effect parameters
;; free registers: A, D, E, H, L
ld a, c
ld [row_break], a
ret
fx_note_cut:
;; A: tick
;; ZF: (tick == 0)
;; B: channel
;; C: effect parameters
;; free registers: A, D, E, H, L
cp c
ret nz
;; check channel mute
ld d, 1
ld a, b
or a
jr z, .cont
.loop:
sla d
dec a
jr nz, .loop
.cont:
ld a, [mute_channels]
and d
ret nz
note_cut:
ld hl, rAUD1ENV
ld a, b
add a
add a
add b ; multiply by 5
add_a_to_hl
ld [hl], 0
ld a, b
cp 2
ret z ; return early if CH3-- no need to retrigger note
;; Retrigger note
inc hl
inc hl
ld [hl], %11111111
ret
fx_set_volume:
ret nz ;; Return if we're not on tick zero.
;; A: tick
;; ZF: (tick == 0)
;; B: channel
;; C: effect parameters
;; free registers: A, D, E, H, L
;; Arguments to this effect will be massaged to correct form for the channel
;; in the editor so we don't have to AND and SWAP and stuff.
set_channel_volume:
;; Call with:
;; Correct volume value in C
;; Channel number in B
ld a, [mute_channels]
dec b
jr z, .set_chn_2_vol
dec b
jr z, .set_chn_3_vol
dec b
jr z, .set_chn_4_vol
.set_chn_1_vol:
retMute 0
ld a, [rAUD1ENV]
and %00001111
swap c
or c
ld [rAUD1ENV], a
ret
.set_chn_2_vol:
retMute 1
ld a, [rAUD2ENV]
and %00001111
swap c
or c
ld [rAUD2ENV], a
ret
.set_chn_3_vol:
retMute 2
;; "Quantize" the more finely grained volume control down to one of 4 values.
ld a, c
cp 10
jr nc, .one
cp 5
jr nc, .two
or a
jr z, .zero
.three:
ld a, %01100000
jr .done
.two:
ld a, %01000000
jr .done
.one:
ld a, %00100000
jr .done
.zero:
xor a
.done:
ld [rAUD3LEVEL], a
ret
.set_chn_4_vol:
retMute 3
swap c
ld a, c
ld [rAUD4ENV], a
ret
fx_vibrato:
ret z
;; A: tick
;; ZF: (tick == 0)
;; B: channel
;; C: effect parameters
;; free registers: A, D, E, H, L
;; Extremely poor man's vibrato.
;; Speed values:
;; (0x0 = 1.0)
;; (0x1 = 0.5)
;; (0x3 = 0.25)
;; (0x7 = 0.125)
;; (0xf = 0.0625)
ld d, 4
call setup_channel_pointer
ld a, c
and %11110000
swap a
ld e, a
ld a, [counter]
and e
ld a, [hl]
jr z, .go_up
.restore:
call _convert_note
jr .finish_vibrato
.go_up:
call _convert_note
ld a, c
and %00001111
add_a_to_hl
.finish_vibrato:
ld d, h
ld e, l
xor a
jp _update_channel
fx_arpeggio:
ret z
;; A: tick
;; ZF: (tick == 0)
;; B: channel
;; C: effect parameters
;; free registers: A, D, E, H, L
ld d, 4
call setup_channel_pointer
ld a, [tick]
dec a
;; A crappy modulo, because it's not a multiple of four :(
jr .test_greater_than_two
.greater_than_two:
sub a, 3
.test_greater_than_two:
cp 3
jr nc, .greater_than_two
;; Multiply by 2 to get offset into table
add a
ld d, [hl]
ld hl, .arp_options
add_a_to_hl
jp hl
.arp_options:
jr .set_arp1
jr .set_arp2
jr .reset_arp
.reset_arp:
ld a, d
jr .finish_skip_add
.set_arp2:
ld a, c
swap a
jr .finish_arp
.set_arp1:
ld a, c
.finish_arp:
and %00001111
add d
.finish_skip_add:
call _convert_note
ld d, h
ld e, l
xor a
jp _update_channel
fx_porta_up:
ret z
;; A: tick
;; ZF: (tick == 0)
;; B: channel
;; C: effect parameters
;; free registers: A, D, E, H, L
ld d, 0
call setup_channel_pointer
ld a, [hl+]
ld e, a
ld d, [hl]
ld a, c
add_a_to_de
.finish:
ld a, d
ld [hl-], a
ld [hl], e
xor a
jp _update_channel
fx_porta_down:
ret z
;; A: tick
;; ZF: (tick == 0)
;; B: channel
;; C: effect parameters
;; free registers: A, D, E, H, L
ld d, 0
call setup_channel_pointer
ld a, [hl+]
ld e, a
ld d, [hl]
ld a, c
sub_from_r16 d, e, c
jr fx_porta_up.finish
fx_toneporta:
jr nz, .do_toneporta
;; We're on tick zero, so just move the temp note value into the toneporta target.
ld d, 2
call setup_channel_pointer
;; If the note is nonexistent, then just return
ld a, [temp_note_value+1]
or a
jr z, .return_skip
ld [hl+], a
ld a, [temp_note_value]
ld [hl], a
;; Don't call _playnote. This is done by grabbing the return
;; address and manually skipping the next call instruction.
.return_skip:
ret_dont_call_playnote
.do_toneporta:
;; A: tick
;; ZF: (tick == 0)
;; B: channel
;; C: effect parameters
;; free registers: A, D, E, H, L
ld d, 0
call setup_channel_pointer
push hl
ld a, [hl+]
ld e, a
ld a, [hl+]
ld d, a
ld a, [hl+]
ld h, [hl]
ld l, a
;; Comparing which direction to move the current value
;; TODO: Optimize this!!!!
;; Compare high byte
ld a, h
cp d
jr c, .subtract ; target is less than the current period
jr z, .high_byte_same
jr .add
.high_byte_same:
ld a, l
cp e
jr c, .subtract ; the target is less than the current period
jr z, .done ; both nibbles are the same so no portamento
.add:
ld a, c
add_a_to_de
ld a, h
cp d
jr c, .set_exact
jr nz, .done
ld a, l
cp e
jr c, .set_exact
jr .done
.subtract:
sub_from_r16 d, e, c
bit 7, d ; check for overflow
jr nz, .set_exact
ld a, d
cp h
jr c, .set_exact
jr nz, .done
ld a, e
cp l
jr c, .set_exact
jr .done
.set_exact:
ld d, h
ld e, l
.done:
pop hl
ld [hl], e
inc hl
ld [hl], d
ld a, 6
add_a_to_hl
ld a, [hl]
ld c, a
res 7, c
ld [hl], c
jp _update_channel
;; TODO: Find some way to de-duplicate this code!
_setup_instrument_pointer_ch4:
;; Call with:
;; Instrument/High nibble of effect in B
;; Stores whether the instrument was real in the Z flag
;; Stores the instrument pointer in DE
ld a, b
and %11110000
swap a
ret z ; If there's no instrument, then return early.
dec a ; Instrument 0 is "no instrument"
add a
jr _setup_instrument_pointer.finish
_setup_instrument_pointer:
;; Call with:
;; Instrument/High nibble of effect in B
;; Stores whether the instrument was real in the Z flag
;; Stores the instrument pointer in DE
ld a, b
and %11110000
swap a
ret z ; If there's no instrument, then return early.
dec a ; Instrument 0 is "no instrument"
.finish:
;; Shift left twice to multiply by 4
add a
add a
add_a_to_de
rla ; reset the Z flag
ret
_hUGE_dosound_banked::
_hUGE_dosound::
ld a, [tick]
or a
jp nz, .process_effects
;; Note playback
loadShort pattern1, b, c
ld de, channel_note1
call _lookup_note
push af
jr nc, .do_setvol1
load_de_ind duty_instruments
call _setup_instrument_pointer
ld a, [highmask1]
res 7, a ; Turn off the "initial" flag
jr z, .write_mask1
checkMute 0, .do_setvol1
ld a, [de]
inc de
ld [rAUD1SWEEP], a
ld a, [de]
inc de
ld [rAUD1LEN], a
ld a, [de]
ld [rAUD1ENV], a
inc de
ld a, [de]
.write_mask1:
ld [highmask1], a
.do_setvol1:
ld a, h
ld [temp_note_value], a
ld a, l
ld [temp_note_value+1], a
ld e, 0
call _doeffect
pop af ; 1 byte
jr nc, .after_note1 ; 2 bytes
call _playnote1 ; 3 bytes
.after_note1:
;; Note playback
loadShort pattern2, b, c
ld de, channel_note2
call _lookup_note
push af
jr nc, .do_setvol2
load_de_ind duty_instruments
call _setup_instrument_pointer
ld a, [highmask2]
res 7, a ; Turn off the "initial" flag
jr z, .write_mask2
checkMute 1, .do_setvol2
inc de
ld a, [de]
inc de
ld [rAUD2LEN], a
ld a, [de]
ld [rAUD2ENV], a
inc de
ld a, [de]
.write_mask2:
ld [highmask2], a
.do_setvol2:
ld a, h
ld [temp_note_value], a
ld a, l
ld [temp_note_value+1], a
ld e, 1
call _doeffect
pop af ; 1 byte
jr nc, .after_note2 ; 2 bytes
call _playnote2 ; 3 bytes
.after_note2:
loadShort pattern3, b, c
ld de, channel_note3
call _lookup_note
ld a, h
ld [temp_note_value], a
ld a, l
ld [temp_note_value+1], a
push af
jr nc, .do_setvol3
load_de_ind wave_instruments
call _setup_instrument_pointer
ld a, [highmask3]
res 7, a ; Turn off the "initial" flag
jr z, .write_mask3
checkMute 2, .do_setvol3
ld a, [de]
inc de
ld [rAUD3LEN], a
ld a, [de]
inc de
ld [rAUD3LEVEL], a
ld a, [de]
inc de
;; Check to see if we need to copy a wave and then do so
ld hl, current_wave
cp [hl]
jr z, .no_wave_copy
ld [hl], a
swap a
add_a_ind_ret_hl waves
xor a
ld [rAUD3ENA], a
_addr = _AUD3WAVERAM
REPT 16
ld a, [hl+]
ldh [_addr], a
_addr = _addr + 1
ENDR
ld a, %10000000
ld [rAUD3ENA], a
.no_wave_copy:
ld a, [de]
.write_mask3:
ld [highmask3], a
.do_setvol3:
ld e, 2
call _doeffect
pop af ; 1 byte
jr nc, .after_note3 ; 2 bytes
call _playnote3 ; 3 bytes
.after_note3:
loadShort pattern4, b, c
call _load_note_data
ld [channel_note4], a
cp LAST_NOTE
push af
jr nc, .do_setvol4
call _convert_ch4_note
ld [temp_note_value], a
ld de, 0
call _setup_instrument_pointer
ld a, [highmask4]
res 7, a ; Turn off the "initial" flag
jr z, .write_mask4
checkMute 3, .do_setvol4
load_hl_ind noise_instruments
sla e
add hl, de
ld a, [hl+]
ld [rAUD4ENV], a
ld a, [hl]
and %00111111
ld [rAUD4LEN], a
ld a, [temp_note_value]
ld d, a
ld a, [hl]
and %10000000
swap a
or d
ld [temp_note_value], a
ld a, [hl]
and %01000000
or %10000000
.write_mask4:
ld [highmask4], a
.do_setvol4:
ld e, 3
call _doeffect
pop af ; 1 byte
jr nc, .after_note4 ; 2 bytes
call _playnote4 ; 3 bytes
.after_note4:
;; finally just update the tick/order/row values
jp process_tick
.process_effects:
;; Only do effects if not on tick zero
checkMute 0, .after_effect1
loadShort pattern1, b, c
call _load_note_data
ld a, c
or a
jr z, .after_effect1
ld e, 0
call _doeffect ; make sure we never return with ret_dont_call_playnote macro
.after_effect1:
checkMute 1, .after_effect2
loadShort pattern2, b, c
call _load_note_data
ld a, c
or a
jr z, .after_effect2
ld e, 1
call _doeffect ; make sure we never return with ret_dont_call_playnote macro
.after_effect2:
checkMute 2, .after_effect3
loadShort pattern3, b, c
call _load_note_data
ld a, c
or a
jr z, .after_effect3
ld e, 2
call _doeffect ; make sure we never return with ret_dont_call_playnote macro
.after_effect3:
checkMute 3, .after_effect4
loadShort pattern4, b, c
call _load_note_data
cp LAST_NOTE
jr nc, .done_macro
ld h, a
load_de_ind noise_instruments
call _setup_instrument_pointer_ch4
jr z, .done_macro ; No instrument, thus no macro
ld a, [tick]
cp 7
jr nc, .done_macro
inc de
push de
push de
add_a_to_de
ld a, [de]
add h
call _convert_ch4_note
ld d, a
pop hl
ld a, [hl]
and %10000000
swap a
or d
ld [rAUD4POLY], a
pop de
ld a, [de]
and %01000000
ld [rAUD4GO], a
.done_macro:
ld a, c
or a
jr z, .after_effect4
ld e, 3
call _doeffect ; make sure we never return with ret_dont_call_playnote macro
.after_effect4:
process_tick:
ld hl, counter
inc [hl]
ld a, [ticks_per_row]
ld b, a
ld hl, tick
ld a, [hl]
inc a
cp b
jr z, _newrow
ld [hl], a
ret
_newrow:
;; Reset tick to 0
ld [hl], 0
;; Check if we need to perform a row break or pattern break
ld a, [row_break]
or a
jr z, .no_break
;; These are offset by one so we can check to see if they've
;; been modified
dec a
ld b, a
ld hl, row_break
xor a
ld [hl-], a
or [hl] ; a = [next_order], zf = ([next_order] == 0)
ld [hl], 0
jr z, _neworder
dec a
add a ; multiply order by 2 (they are words)
jr _update_current_order
.no_break:
;; Increment row.
ld a, [row]
inc a
ld b, a
cp PATTERN_LENGTH
jr nz, _noreset
ld b, 0
_neworder:
;; Increment order and change loaded patterns
ld a, [order_cnt]
ld c, a
ld a, [current_order]
add a, 2
cp c
jr nz, _update_current_order
xor a
_update_current_order:
;; Call with:
;; A: The order to load
;; B: The row for the order to start on
ld [current_order], a
ld c, a
call _refresh_patterns
_noreset:
ld a, b
ld [row], a
IF DEF(PREVIEW_MODE)
db $fd ; signal row update to tracker
ENDC
ret
note_table:
include "include/hUGE_note_table.inc"
|
; A000930: Narayana's cows sequence: a(0) = a(1) = a(2) = 1; thereafter a(n) = a(n-1) + a(n-3).
; 1,1,1,2,3,4,6,9,13,19,28,41,60,88,129,189,277,406,595,872,1278,1873,2745,4023,5896,8641,12664,18560,27201,39865,58425,85626,125491,183916,269542,395033,578949,848491,1243524,1822473,2670964,3914488,5736961,8407925,12322413,18059374,26467299,38789712,56849086,83316385,122106097,178955183,262271568,384377665,563332848,825604416,1209982081,1773314929,2598919345,3808901426,5582216355,8181135700,11990037126,17572253481,25753389181,37743426307,55315679788,81069068969,118812495276,174128175064,255197244033,374009739309,548137914373,803335158406,1177344897715,1725482812088,2528817970494,3706162868209,5431645680297,7960463650791,11666626519000,17098272199297,25058735850088,36725362369088,53823634568385,78882370418473,115607732787561,169431367355946,248313737774419,363921470561980,533352837917926,781666575692345,1145588046254325,1678940884172251,2460607459864596,3606195506118921,5285136390291172,7745743850155768
mov $2,3
mov $5,3
lpb $0
sub $0,1
mov $1,$2
add $3,1
add $4,5
trn $3,$4
sub $4,$2
trn $4,1
add $5,1
mov $2,$5
add $5,$3
mov $3,$1
lpe
sub $1,3
add $4,1
trn $1,$4
add $1,1
|
; A112087: 4*(n^2 - n + 1).
; 4,12,28,52,84,124,172,228,292,364,444,532,628,732,844,964,1092,1228,1372,1524,1684,1852,2028,2212,2404,2604,2812,3028,3252,3484,3724,3972,4228,4492,4764,5044,5332,5628,5932,6244,6564,6892,7228,7572,7924,8284
sub $1,$0
bin $1,2
mul $1,8
add $1,4
mov $0,$1
|
;; rdrand.asm - written and placed in public domain by Jeffrey Walton and Uri Blumenthal.
;; Copyright assigned to the Crypto++ project.
;; This ASM file provides RDRAND and RDSEED to downlevel Microsoft tool chains.
;; Everything "just works" under Visual Studio. Other platforms will have to
;; run MASM/MASM-64 and then link to the object files.
;; set ASFLAGS=/nologo /D_M_X86 /W3 /Cx /Zi /safeseh
;; set ASFLAGS64=/nologo /D_M_X64 /W3 /Cx /Zi
;; "C:\Program Files (x86)\Microsoft Visual Studio 11.0\VC\bin\ml.exe" %ASFLAGS% /Fo rdrand-x86.obj /c rdrand.asm
;; "C:\Program Files (x86)\Microsoft Visual Studio 11.0\VC\bin\amd64\ml64.exe" %ASFLAGS64% /Fo rdrand-x64.obj /c rdrand.asm
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
TITLE MASM_RDRAND_GenerateBlock and MASM_RDSEED_GenerateBlock
SUBTITLE Microsoft specific ASM code to utilize RDRAND and RDSEED for down level Microsoft toolchains
PUBLIC MASM_RDRAND_GenerateBlock
PUBLIC MASM_RDSEED_GenerateBlock
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; C/C++ Function prototypes (both are fastcall)
;; X86:
;; extern "C" void __fastcall MASM_RDRAND_GenerateBlock(byte* ptr, size_t size);
;; X64:
;; extern "C" void __fastcall MASM_RDRAND_GenerateBlock(byte* ptr, size_t size);
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
IFDEF _M_X86 ;; Set via the command line
.486
.MODEL FLAT
;; Fastcall calling conventions exports
ALIAS <@MASM_RDRAND_GenerateBlock@8> = <MASM_RDRAND_GenerateBlock>
ALIAS <@MASM_RDSEED_GenerateBlock@8> = <MASM_RDSEED_GenerateBlock>
ENDIF
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
IFDEF _M_X86 ;; Set via the command line
.CODE
ALIGN 8
OPTION PROLOGUE:NONE
OPTION EPILOGUE:NONE
;; No need for Load_Arguments due to fastcall
;; ECX (in): arg1, byte* buffer
;; EDX (in): arg2, size_t bsize
MASM_RDRAND_GenerateBlock PROC ;; arg1:DWORD, arg2:DWORD
MWSIZE EQU 04h ;; machine word size
buffer EQU ecx
bsize EQU edx
;; Top of While loop
GenerateBlock_Top:
;; Check remaining size
cmp bsize, 0
je GenerateBlock_Return
Call_RDRAND_EAX:
;; RDRAND is not available prior to VS2012. Just emit
;; the byte codes using DB. This is `rdrand eax`.
DB 0Fh, 0C7h, 0F0h
;; If CF=1, the number returned by RDRAND is valid.
;; If CF=0, a random number was not available.
;; Retry immediately
jnc Call_RDRAND_EAX
RDRAND_succeeded:
cmp bsize, MWSIZE
jb Partial_Machine_Word
Full_Machine_Word:
mov DWORD PTR [buffer], eax
add buffer, MWSIZE ;; No need for Intel Core 2 slow workarounds, like
sub bsize, MWSIZE ;; `lea buffer,[buffer+MWSIZE]` for faster adds
;; Continue
jmp GenerateBlock_Top
;; 1,2,3 bytes remain
Partial_Machine_Word:
;; Test bit 1 to see if size is at least 2
test bsize, 2
jz Bit_1_Not_Set
mov WORD PTR [buffer], ax
shr eax, 16
add buffer, 2
Bit_1_Not_Set:
;; Test bit 0 to see if size is at least 1
test bsize, 1
jz Bit_0_Not_Set
mov BYTE PTR [buffer], al
Bit_0_Not_Set:
;; We've hit all the bits
GenerateBlock_Return:
;; Clear artifacts
xor eax, eax
ret
MASM_RDRAND_GenerateBlock ENDP
ENDIF ;; _M_X86
OPTION PROLOGUE:PrologueDef
OPTION EPILOGUE:EpilogueDef
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
IFDEF _M_X64 ;; Set via the command line
.CODE
ALIGN 16
OPTION PROLOGUE:NONE
OPTION EPILOGUE:NONE
;; No need for Load_Arguments due to fastcall
;; RCX (in): arg1, byte* buffer
;; RDX (in): arg2, size_t bsize
MASM_RDRAND_GenerateBlock PROC ;; arg1:QWORD, arg2:QWORD
MWSIZE EQU 08h ;; machine word size
buffer EQU rcx
bsize EQU rdx
;; Top of While loop
GenerateBlock_Top:
;; Check remaining size
cmp bsize, 0
je GenerateBlock_Return
Call_RDRAND_RAX:
;; RDRAND is not available prior to VS2012. Just emit
;; the byte codes using DB. This is `rdrand rax`.
DB 048h, 0Fh, 0C7h, 0F0h
;; If CF=1, the number returned by RDRAND is valid.
;; If CF=0, a random number was not available.
;; Retry immediately
jnc Call_RDRAND_RAX
RDRAND_succeeded:
cmp bsize, MWSIZE
jb Partial_Machine_Word
Full_Machine_Word:
mov QWORD PTR [buffer], rax
add buffer, MWSIZE
sub bsize, MWSIZE
;; Continue
jmp GenerateBlock_Top
;; 1,2,3,4,5,6,7 bytes remain
Partial_Machine_Word:
;; Test bit 2 to see if size is at least 4
test bsize, 4
jz Bit_2_Not_Set
mov DWORD PTR [buffer], eax
shr rax, 32
add buffer, 4
Bit_2_Not_Set:
;; Test bit 1 to see if size is at least 2
test bsize, 2
jz Bit_1_Not_Set
mov WORD PTR [buffer], ax
shr eax, 16
add buffer, 2
Bit_1_Not_Set:
;; Test bit 0 to see if size is at least 1
test bsize, 1
jz Bit_0_Not_Set
mov BYTE PTR [buffer], al
Bit_0_Not_Set:
;; We've hit all the bits
GenerateBlock_Return:
;; Clear artifacts
xor rax, rax
ret
MASM_RDRAND_GenerateBlock ENDP
ENDIF ;; _M_X64
OPTION PROLOGUE:PrologueDef
OPTION EPILOGUE:EpilogueDef
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
IFDEF _M_X86 ;; Set via the command line
.CODE
ALIGN 8
OPTION PROLOGUE:NONE
OPTION EPILOGUE:NONE
;; No need for Load_Arguments due to fastcall
;; ECX (in): arg1, byte* buffer
;; EDX (in): arg2, size_t bsize
MASM_RDSEED_GenerateBlock PROC ;; arg1:DWORD, arg2:DWORD
MWSIZE EQU 04h ;; machine word size
buffer EQU ecx
bsize EQU edx
;; Top of While loop
GenerateBlock_Top:
;; Check remaining size
cmp bsize, 0
je GenerateBlock_Return
Call_RDSEED_EAX:
;; RDSEED is not available prior to VS2012. Just emit
;; the byte codes using DB. This is `rdseed eax`.
DB 0Fh, 0C7h, 0F8h
;; If CF=1, the number returned by RDSEED is valid.
;; If CF=0, a random number was not available.
;; Retry immediately
jnc Call_RDSEED_EAX
RDSEED_succeeded:
cmp bsize, MWSIZE
jb Partial_Machine_Word
Full_Machine_Word:
mov DWORD PTR [buffer], eax
add buffer, MWSIZE ;; No need for Intel Core 2 slow workarounds, like
sub bsize, MWSIZE ;; `lea buffer,[buffer+MWSIZE]` for faster adds
;; Continue
jmp GenerateBlock_Top
;; 1,2,3 bytes remain
Partial_Machine_Word:
;; Test bit 1 to see if size is at least 2
test bsize, 2
jz Bit_1_Not_Set
mov WORD PTR [buffer], ax
shr eax, 16
add buffer, 2
Bit_1_Not_Set:
;; Test bit 0 to see if size is at least 1
test bsize, 1
jz Bit_0_Not_Set
mov BYTE PTR [buffer], al
Bit_0_Not_Set:
;; We've hit all the bits
GenerateBlock_Return:
;; Clear artifacts
xor eax, eax
ret
MASM_RDSEED_GenerateBlock ENDP
ENDIF ;; _M_X86
OPTION PROLOGUE:PrologueDef
OPTION EPILOGUE:EpilogueDef
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
IFDEF _M_X64 ;; Set via the command line
.CODE
ALIGN 16
OPTION PROLOGUE:NONE
OPTION EPILOGUE:NONE
;; No need for Load_Arguments due to fastcall
;; RCX (in): arg1, byte* buffer
;; RDX (in): arg2, size_t bsize
MASM_RDSEED_GenerateBlock PROC ;; arg1:QWORD, arg2:QWORD
MWSIZE EQU 08h ;; machine word size
buffer EQU rcx
bsize EQU rdx
;; Top of While loop
GenerateBlock_Top:
;; Check remaining size
cmp bsize, 0
je GenerateBlock_Return
Call_RDSEED_RAX:
;; RDSEED is not available prior to VS2012. Just emit
;; the byte codes using DB. This is `rdseed rax`.
DB 048h, 0Fh, 0C7h, 0F8h
;; If CF=1, the number returned by RDSEED is valid.
;; If CF=0, a random number was not available.
;; Retry immediately
jnc Call_RDSEED_RAX
RDSEED_succeeded:
cmp bsize, MWSIZE
jb Partial_Machine_Word
Full_Machine_Word:
mov QWORD PTR [buffer], rax
add buffer, MWSIZE
sub bsize, MWSIZE
;; Continue
jmp GenerateBlock_Top
;; 1,2,3,4,5,6,7 bytes remain
Partial_Machine_Word:
;; Test bit 2 to see if size is at least 4
test bsize, 4
jz Bit_2_Not_Set
mov DWORD PTR [buffer], eax
shr rax, 32
add buffer, 4
Bit_2_Not_Set:
;; Test bit 1 to see if size is at least 2
test bsize, 2
jz Bit_1_Not_Set
mov WORD PTR [buffer], ax
shr eax, 16
add buffer, 2
Bit_1_Not_Set:
;; Test bit 0 to see if size is at least 1
test bsize, 1
jz Bit_0_Not_Set
mov BYTE PTR [buffer], al
Bit_0_Not_Set:
;; We've hit all the bits
GenerateBlock_Return:
;; Clear artifacts
xor rax, rax
ret
MASM_RDSEED_GenerateBlock ENDP
ENDIF ;; _M_X64
OPTION PROLOGUE:PrologueDef
OPTION EPILOGUE:EpilogueDef
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
END
|
;
; Copyright (c) 2010 The WebM project authors. All Rights Reserved.
;
; Use of this source code is governed by a BSD-style license
; that can be found in the LICENSE file in the root of the source
; tree. An additional intellectual property rights grant can be found
; in the file PATENTS. All contributing project authors may
; be found in the AUTHORS file in the root of the source tree.
;
%include "vpx_ports/x86_abi_support.asm"
;void vp8_short_fdct4x4_mmx(short *input, short *output, int pitch)
global sym(vp8_short_fdct4x4_mmx)
sym(vp8_short_fdct4x4_mmx):
push rbp
mov rbp, rsp
SHADOW_ARGS_TO_STACK 3
GET_GOT rbx
push rsi
push rdi
; end prolog
mov rsi, arg(0) ; input
mov rdi, arg(1) ; output
movsxd rax, dword ptr arg(2) ;pitch
lea rcx, [rsi + rax*2]
; read the input data
movq mm0, [rsi]
movq mm1, [rsi + rax]
movq mm2, [rcx]
movq mm4, [rcx + rax]
; transpose for the first stage
movq mm3, mm0 ; 00 01 02 03
movq mm5, mm2 ; 20 21 22 23
punpcklwd mm0, mm1 ; 00 10 01 11
punpckhwd mm3, mm1 ; 02 12 03 13
punpcklwd mm2, mm4 ; 20 30 21 31
punpckhwd mm5, mm4 ; 22 32 23 33
movq mm1, mm0 ; 00 10 01 11
punpckldq mm0, mm2 ; 00 10 20 30
punpckhdq mm1, mm2 ; 01 11 21 31
movq mm2, mm3 ; 02 12 03 13
punpckldq mm2, mm5 ; 02 12 22 32
punpckhdq mm3, mm5 ; 03 13 23 33
; mm0 0
; mm1 1
; mm2 2
; mm3 3
; first stage
movq mm5, mm0
movq mm4, mm1
paddw mm0, mm3 ; a1 = 0 + 3
paddw mm1, mm2 ; b1 = 1 + 2
psubw mm4, mm2 ; c1 = 1 - 2
psubw mm5, mm3 ; d1 = 0 - 3
psllw mm5, 3
psllw mm4, 3
psllw mm0, 3
psllw mm1, 3
; output 0 and 2
movq mm2, mm0 ; a1
paddw mm0, mm1 ; op[0] = a1 + b1
psubw mm2, mm1 ; op[2] = a1 - b1
; output 1 and 3
; interleave c1, d1
movq mm1, mm5 ; d1
punpcklwd mm1, mm4 ; c1 d1
punpckhwd mm5, mm4 ; c1 d1
movq mm3, mm1
movq mm4, mm5
pmaddwd mm1, MMWORD PTR[GLOBAL (_5352_2217)] ; c1*2217 + d1*5352
pmaddwd mm4, MMWORD PTR[GLOBAL (_5352_2217)] ; c1*2217 + d1*5352
pmaddwd mm3, MMWORD PTR[GLOBAL(_2217_neg5352)] ; d1*2217 - c1*5352
pmaddwd mm5, MMWORD PTR[GLOBAL(_2217_neg5352)] ; d1*2217 - c1*5352
paddd mm1, MMWORD PTR[GLOBAL(_14500)]
paddd mm4, MMWORD PTR[GLOBAL(_14500)]
paddd mm3, MMWORD PTR[GLOBAL(_7500)]
paddd mm5, MMWORD PTR[GLOBAL(_7500)]
psrad mm1, 12 ; (c1 * 2217 + d1 * 5352 + 14500)>>12
psrad mm4, 12 ; (c1 * 2217 + d1 * 5352 + 14500)>>12
psrad mm3, 12 ; (d1 * 2217 - c1 * 5352 + 7500)>>12
psrad mm5, 12 ; (d1 * 2217 - c1 * 5352 + 7500)>>12
packssdw mm1, mm4 ; op[1]
packssdw mm3, mm5 ; op[3]
; done with vertical
; transpose for the second stage
movq mm4, mm0 ; 00 10 20 30
movq mm5, mm2 ; 02 12 22 32
punpcklwd mm0, mm1 ; 00 01 10 11
punpckhwd mm4, mm1 ; 20 21 30 31
punpcklwd mm2, mm3 ; 02 03 12 13
punpckhwd mm5, mm3 ; 22 23 32 33
movq mm1, mm0 ; 00 01 10 11
punpckldq mm0, mm2 ; 00 01 02 03
punpckhdq mm1, mm2 ; 01 22 12 13
movq mm2, mm4 ; 20 31 30 31
punpckldq mm2, mm5 ; 20 21 22 23
punpckhdq mm4, mm5 ; 30 31 32 33
; mm0 0
; mm1 1
; mm2 2
; mm3 4
movq mm5, mm0
movq mm3, mm1
paddw mm0, mm4 ; a1 = 0 + 3
paddw mm1, mm2 ; b1 = 1 + 2
psubw mm3, mm2 ; c1 = 1 - 2
psubw mm5, mm4 ; d1 = 0 - 3
pxor mm6, mm6 ; zero out for compare
pcmpeqw mm6, mm5 ; d1 != 0
pandn mm6, MMWORD PTR[GLOBAL(_cmp_mask)] ; clear upper,
; and keep bit 0 of lower
; output 0 and 2
movq mm2, mm0 ; a1
paddw mm0, mm1 ; a1 + b1
psubw mm2, mm1 ; a1 - b1
paddw mm0, MMWORD PTR[GLOBAL(_7w)]
paddw mm2, MMWORD PTR[GLOBAL(_7w)]
psraw mm0, 4 ; op[0] = (a1 + b1 + 7)>>4
psraw mm2, 4 ; op[8] = (a1 - b1 + 7)>>4
movq MMWORD PTR[rdi + 0 ], mm0
movq MMWORD PTR[rdi + 16], mm2
; output 1 and 3
; interleave c1, d1
movq mm1, mm5 ; d1
punpcklwd mm1, mm3 ; c1 d1
punpckhwd mm5, mm3 ; c1 d1
movq mm3, mm1
movq mm4, mm5
pmaddwd mm1, MMWORD PTR[GLOBAL (_5352_2217)] ; c1*2217 + d1*5352
pmaddwd mm4, MMWORD PTR[GLOBAL (_5352_2217)] ; c1*2217 + d1*5352
pmaddwd mm3, MMWORD PTR[GLOBAL(_2217_neg5352)] ; d1*2217 - c1*5352
pmaddwd mm5, MMWORD PTR[GLOBAL(_2217_neg5352)] ; d1*2217 - c1*5352
paddd mm1, MMWORD PTR[GLOBAL(_12000)]
paddd mm4, MMWORD PTR[GLOBAL(_12000)]
paddd mm3, MMWORD PTR[GLOBAL(_51000)]
paddd mm5, MMWORD PTR[GLOBAL(_51000)]
psrad mm1, 16 ; (c1 * 2217 + d1 * 5352 + 14500)>>16
psrad mm4, 16 ; (c1 * 2217 + d1 * 5352 + 14500)>>16
psrad mm3, 16 ; (d1 * 2217 - c1 * 5352 + 7500)>>16
psrad mm5, 16 ; (d1 * 2217 - c1 * 5352 + 7500)>>16
packssdw mm1, mm4 ; op[4]
packssdw mm3, mm5 ; op[12]
paddw mm1, mm6 ; op[4] += (d1!=0)
movq MMWORD PTR[rdi + 8 ], mm1
movq MMWORD PTR[rdi + 24], mm3
; begin epilog
pop rdi
pop rsi
RESTORE_GOT
UNSHADOW_ARGS
pop rbp
ret
SECTION_RODATA
align 8
_5352_2217:
dw 5352
dw 2217
dw 5352
dw 2217
align 8
_2217_neg5352:
dw 2217
dw -5352
dw 2217
dw -5352
align 8
_cmp_mask:
times 4 dw 1
align 8
_7w:
times 4 dw 7
align 8
_14500:
times 2 dd 14500
align 8
_7500:
times 2 dd 7500
align 8
_12000:
times 2 dd 12000
align 8
_51000:
times 2 dd 51000
|
FuchsiaPokecenterObject:
db $0 ; border block
db $2 ; warps
db $7, $3, $2, $ff
db $7, $4, $2, $ff
db $0 ; signs
db $4 ; objects
object SPRITE_NURSE, $3, $1, STAY, DOWN, $1 ; person
object SPRITE_ROCKER, $2, $3, STAY, NONE, $2 ; person
object SPRITE_LASS, $6, $5, WALK, $2, $3 ; person
object SPRITE_NURSE, $b, $2, STAY, DOWN, $4 ; person
; warp-to
EVENT_DISP FUCHSIA_POKECENTER_WIDTH, $7, $3
EVENT_DISP FUCHSIA_POKECENTER_WIDTH, $7, $4
|
#include "main.h"
#include "../Classes/AppDelegate.h"
#include "cocos2d.h"
#include <stdlib.h>
#include <stdio.h>
#include <unistd.h>
#include <string>
USING_NS_CC;
int main(int argc, char **argv)
{
// create the application instance
AppDelegate app;
CCEGLView* eglView = CCEGLView::sharedOpenGLView();
eglView->setFrameSize(800, 480);
return CCApplication::sharedApplication()->run();
}
|
.global s_prepare_buffers
s_prepare_buffers:
push %r11
push %rax
push %rbx
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_A_ht+0x18c45, %rsi
lea addresses_D_ht+0x19455, %rdi
clflush (%rsi)
nop
nop
nop
xor %rdx, %rdx
mov $107, %rcx
rep movsb
nop
nop
nop
nop
nop
inc %rbx
lea addresses_WT_ht+0xbe71, %r11
nop
nop
xor %rax, %rax
movw $0x6162, (%r11)
nop
nop
add %rdx, %rdx
lea addresses_WC_ht+0x1e355, %rdx
nop
nop
nop
nop
xor %rdi, %rdi
mov $0x6162636465666768, %rsi
movq %rsi, %xmm7
movups %xmm7, (%rdx)
nop
nop
nop
nop
nop
dec %r11
lea addresses_WT_ht+0x1d995, %rsi
lea addresses_D_ht+0x13055, %rdi
clflush (%rsi)
nop
add $26747, %rdx
mov $124, %rcx
rep movsb
and %rsi, %rsi
lea addresses_D_ht+0x1a855, %rdi
nop
nop
and $61455, %rsi
mov $0x6162636465666768, %r11
movq %r11, %xmm7
vmovups %ymm7, (%rdi)
cmp $36533, %rsi
lea addresses_A_ht+0x10ed5, %rdx
nop
and %rsi, %rsi
mov $0x6162636465666768, %rdi
movq %rdi, %xmm7
and $0xffffffffffffffc0, %rdx
movaps %xmm7, (%rdx)
nop
nop
nop
and %rdi, %rdi
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbx
pop %rax
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r12
push %r13
push %r14
push %r8
push %r9
push %rbp
push %rdx
// Store
lea addresses_WC+0x1e255, %r12
nop
nop
nop
sub %r9, %r9
movw $0x5152, (%r12)
nop
nop
nop
sub $62807, %r8
// Store
lea addresses_normal+0x48ed, %r9
nop
nop
nop
cmp $11639, %rdx
mov $0x5152535455565758, %r8
movq %r8, %xmm7
movups %xmm7, (%r9)
nop
nop
add %r12, %r12
// Store
lea addresses_RW+0xcb55, %rdx
nop
nop
dec %r14
mov $0x5152535455565758, %r13
movq %r13, (%rdx)
// Exception!!!
mov (0), %r8
nop
nop
nop
nop
nop
add %rdx, %rdx
// Load
lea addresses_normal+0x131fb, %r8
nop
nop
nop
nop
nop
sub %rdx, %rdx
mov (%r8), %r14
nop
nop
dec %rdx
// Store
mov $0x5a06a10000000691, %rdx
nop
xor %r12, %r12
movl $0x51525354, (%rdx)
nop
nop
add %r13, %r13
// Faulty Load
lea addresses_US+0x14c55, %rdx
nop
xor $37266, %r14
movb (%rdx), %r12b
lea oracles, %r13
and $0xff, %r12
shlq $12, %r12
mov (%r13,%r12,1), %r12
pop %rdx
pop %rbp
pop %r9
pop %r8
pop %r14
pop %r13
pop %r12
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_US', 'same': False, 'size': 32, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'dst': {'type': 'addresses_WC', 'same': False, 'size': 2, 'congruent': 8, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_normal', 'same': False, 'size': 16, 'congruent': 3, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_RW', 'same': False, 'size': 8, 'congruent': 7, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_normal', 'same': False, 'size': 8, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'dst': {'type': 'addresses_NC', 'same': False, 'size': 4, 'congruent': 2, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
[Faulty Load]
{'src': {'type': 'addresses_US', 'same': True, 'size': 1, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_A_ht', 'congruent': 1, 'same': False}, 'dst': {'type': 'addresses_D_ht', 'congruent': 11, 'same': False}, 'OP': 'REPM'}
{'dst': {'type': 'addresses_WT_ht', 'same': False, 'size': 2, 'congruent': 2, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_WC_ht', 'same': False, 'size': 16, 'congruent': 6, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_WT_ht', 'congruent': 5, 'same': False}, 'dst': {'type': 'addresses_D_ht', 'congruent': 10, 'same': True}, 'OP': 'REPM'}
{'dst': {'type': 'addresses_D_ht', 'same': True, 'size': 32, 'congruent': 10, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_A_ht', 'same': True, 'size': 16, 'congruent': 4, 'NT': False, 'AVXalign': True}, 'OP': 'STOR'}
{'00': 21829}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
|
; A156260: Row sums of A156254.
; 1,2,2,1,2,4,2,1,1,4,2,1,2,4,4,1,2,1,2,1,4,4,2,1,1,4,1,1,2,8,2,1,4,4,4,1,2,4,4,1,2,8,2,1,1,4,2,1,1,1,4,1,2,1,4,1,4,4,2,1,2,4,1,1,4,8,2,1,4,8,2,1,2,4,1,1,4,8,2,1,1,4,2,1,4,4,4,1,2,1,4,1,4,4,4,1,2,1,1,1
seq $0,226177 ; a(n) = mu(n)*d(n), where mu(n) = A008683 and d(n) = A000005.
trn $1,$0
bin $1,$0
gcd $1,$0
mov $0,$1
|
copyright zengfr site:http://github.com/zengfr/romhack
00042A move.l D1, (A0)+
00042C dbra D0, $42a
0018CE add.w ($1e,A6), D0 [123p+ 18, enemy+18, item+18]
0018D2 move.w D0, ($18,A6) [123p+ 1E, enemy+1E, item+1E]
004D94 move.l D1, (A1)+
004D96 dbra D0, $4d94
00539C move.w (A0), ($1e,A6) [123p+ 18]
0053A0 rts
018CA8 move.l D0, ($1c,A6)
018CAC clr.b ($116,A6)
019140 move.w D0, ($1e,A6)
019144 move.b D0, ($25,A6)
01976C move.w D0, ($1e,A6)
019770 move.b D0, ($25,A6)
019D30 move.w D0, ($1e,A6)
019D34 move.w D0, ($16,A6)
01A9EE move.w D0, ($1e,A6)
01A9F2 move.b #$e, ($58,A6)
01AA9E move.w D0, ($1e,A6)
01AAA2 move.b #$14, ($c8,A6)
01AB3A move.w D0, ($1e,A6)
01AB3E move.b #$1, ($51,A6)
01AC02 move.w D0, ($1e,A6)
01AC06 lea ($1322,PC) ; ($1bf2a), A0
01AE70 move.w D0, ($1e,A6)
01AE74 move.w D0, ($14,A6)
01AF96 move.w D0, ($1e,A6)
01AF9A move.w #$500, ($14,A6)
01B6A4 move.w D0, ($1e,A6)
01B6A8 move.b D0, ($25,A6)
01B772 move.w D0, ($1e,A6)
01B776 lea ($78e,PC) ; ($1bf06), A0
01B8CE move.w D0, ($1e,A6)
01B8D2 lea ($63a,PC) ; ($1bf0e), A0
01B9C2 move.w D0, ($1e,A6)
01B9C6 lea ($54e,PC) ; ($1bf16), A0
01C25A move.w D0, ($1e,A6)
01C25E moveq #$2, D0
01C43A move.w D0, ($1e,A6)
01C43E moveq #$2, D0
01C60E move.w D0, ($1e,A6)
01C612 clr.w ($b6,A6)
01C790 move.w D0, ($1e,A6)
01C794 jsr $16446.l
01C9A2 move.w D0, ($1e,A6)
01C9A6 jsr $98cc.l
01CC84 move.w D0, ($1e,A6)
01CC88 moveq #$2, D0
0AAACA move.l (A0), D2
0AAACC move.w D0, (A0) [123p+11A, 123p+11C, 123p+11E, 123p+120, 123p+122, 123p+124, 123p+126, 123p+128, 123p+12A, enemy+BC, enemy+C0, enemy+C2, enemy+C4, enemy+CC, enemy+CE, enemy+D0, enemy+D2, enemy+D4, enemy+D6, enemy+D8, enemy+DA, enemy+DE, item+86, item+88, item+8A, item+98, item+9A, item+9C, item+9E, item+A0, item+A2, item+A4, item+A6, scr1]
0AAACE move.w D0, ($2,A0)
0AAAD2 cmp.l (A0), D0
0AAAD4 bne $aaafc
0AAAD8 move.l D2, (A0)+
0AAADA cmpa.l A0, A1 [123p+11A, 123p+11C, 123p+11E, 123p+120, 123p+122, 123p+124, 123p+126, 123p+128, 123p+12A, enemy+BC, enemy+C0, enemy+C2, enemy+C4, enemy+CC, enemy+CE, enemy+D0, enemy+D2, enemy+D4, enemy+D6, enemy+D8, enemy+DA, enemy+DE, item+86, item+88, item+8A, item+98, item+9A, item+9C, item+9E, item+A0, item+A2, item+A4, item+A6, scr1]
0AAAE6 move.l (A0), D2
0AAAE8 move.w D0, (A0) [123p+11A, 123p+11C, 123p+11E, 123p+120, 123p+122, 123p+124, 123p+126, 123p+128, 123p+12A, enemy+BC, enemy+C0, enemy+C2, enemy+C4, enemy+CC, enemy+CE, enemy+D0, enemy+D2, enemy+D4, enemy+D6, enemy+D8, enemy+DA, enemy+DE, item+86, item+88, item+8A, item+98, item+9A, item+9C, item+9E, item+A0, item+A2, item+A4, item+A6, scr1]
0AAAF4 move.l D2, (A0)+
0AAAF6 cmpa.l A0, A1 [123p+11A, 123p+11C, 123p+11E, 123p+120, 123p+122, 123p+124, 123p+126, 123p+128, 123p+12A, enemy+BC, enemy+C0, enemy+C2, enemy+C4, enemy+CC, enemy+CE, enemy+D0, enemy+D2, enemy+D4, enemy+D6, enemy+D8, enemy+DA, enemy+DE, item+86, item+88, item+8A, item+98, item+9A, item+9C, item+9E, item+A0, item+A2, item+A4, item+A6, scr1]
copyright zengfr site:http://github.com/zengfr/romhack
|
; A305264: a(n) = 836*2^n - 771.
; 65,901,2573,5917,12605,25981,52733,106237,213245,427261,855293,1711357,3423485,6847741,13696253,27393277,54787325,109575421,219151613,438303997,876608765,1753218301,3506437373,7012875517,14025751805,28051504381,56103009533,112206019837,224412040445,448824081661,897648164093,1795296328957,3590592658685,7181185318141,14362370637053,28724741274877,57449482550525,114898965101821,229797930204413,459595860409597,919191720819965,1838383441640701,3676766883282173,7353533766565117,14707067533131005,29414135066262781,58828270132526333,117656540265053437,235313080530107645,470626161060216061,941252322120432893,1882504644240866557,3765009288481733885,7530018576963468541,15060037153926937853,30120074307853876477,60240148615707753725,120480297231415508221,240960594462831017213,481921188925662035197,963842377851324071165,1927684755702648143101,3855369511405296286973,7710739022810592574717,15421478045621185150205,30842956091242370301181,61685912182484740603133,123371824364969481207037,246743648729938962414845,493487297459877924830461,986974594919755849661693,1973949189839511699324157,3947898379679023398649085,7895796759358046797298941,15791593518716093594598653,31583187037432187189198077,63166374074864374378396925,126332748149728748756794621,252665496299457497513590013,505330992598914995027180797,1010661985197829990054362365,2021323970395659980108725501,4042647940791319960217451773,8085295881582639920434904317,16170591763165279840869809405,32341183526330559681739619581,64682367052661119363479239933,129364734105322238726958480637,258729468210644477453916962045,517458936421288954907833924861,1034917872842577909815667850493,2069835745685155819631335701757,4139671491370311639262671404285,8279342982740623278525342809341,16558685965481246557050685619453,33117371930962493114101371239677,66234743861924986228202742480125,132469487723849972456405484961021,264938975447699944912810969922813,529877950895399889825621939846397
mov $1,2
pow $1,$0
sub $1,1
mul $1,836
add $1,65
mov $0,$1
|
/*
* nextpnr -- Next Generation Place and Route
*
* Copyright (C) 2018 Clifford Wolf <clifford@symbioticeda.com>
* Copyright (C) 2018 Serge Bazanski <q3k@symbioticeda.com>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include <algorithm>
#include <cmath>
#include "cells.h"
#include "embed.h"
#include "gfx.h"
#include "log.h"
#include "nextpnr.h"
#include "placer1.h"
#include "placer_heap.h"
#include "router1.h"
#include "router2.h"
#include "timing_opt.h"
#include "util.h"
NEXTPNR_NAMESPACE_BEGIN
// -----------------------------------------------------------------------
void IdString::initialize_arch(const BaseCtx *ctx)
{
#define X(t) initialize_add(ctx, #t, ID_##t);
#include "constids.inc"
#undef X
}
// -----------------------------------------------------------------------
static const ChipInfoPOD *get_chip_info(ArchArgs::ArchArgsTypes chip)
{
std::string chipdb;
if (chip == ArchArgs::LP384) {
chipdb = "ice40/chipdb-384.bin";
} else if (chip == ArchArgs::LP1K || chip == ArchArgs::HX1K) {
chipdb = "ice40/chipdb-1k.bin";
} else if (chip == ArchArgs::U1K || chip == ArchArgs::U2K || chip == ArchArgs::U4K) {
chipdb = "ice40/chipdb-u4k.bin";
} else if (chip == ArchArgs::UP3K || chip == ArchArgs::UP5K) {
chipdb = "ice40/chipdb-5k.bin";
} else if (chip == ArchArgs::LP8K || chip == ArchArgs::HX8K || chip == ArchArgs::LP4K || chip == ArchArgs::HX4K) {
chipdb = "ice40/chipdb-8k.bin";
} else {
log_error("Unknown chip\n");
}
auto ptr = reinterpret_cast<const RelPtr<ChipInfoPOD> *>(get_chipdb(chipdb));
if (ptr == nullptr)
return nullptr;
return ptr->get();
}
bool Arch::is_available(ArchArgs::ArchArgsTypes chip) { return get_chip_info(chip) != nullptr; }
std::vector<std::string> Arch::get_supported_packages(ArchArgs::ArchArgsTypes chip)
{
const ChipInfoPOD *chip_info = get_chip_info(chip);
std::vector<std::string> packages;
for (auto &pkg : chip_info->packages_data) {
std::string name = pkg.name.get();
if (chip == ArchArgs::LP4K || chip == ArchArgs::HX4K) {
if (name.find(":4k") != std::string::npos)
name = name.substr(0, name.size() - 3);
else
continue;
}
packages.push_back(name);
}
return packages;
}
// -----------------------------------------------------------------------
Arch::Arch(ArchArgs args) : args(args)
{
fast_part = (args.type == ArchArgs::HX8K || args.type == ArchArgs::HX4K || args.type == ArchArgs::HX1K);
chip_info = get_chip_info(args.type);
if (chip_info == nullptr)
log_error("Unsupported iCE40 chip type.\n");
package_info = nullptr;
std::string package_name = args.package;
if (args.type == ArchArgs::LP4K || args.type == ArchArgs::HX4K)
package_name += ":4k";
for (auto &pkg : chip_info->packages_data) {
if (pkg.name.get() == package_name) {
package_info = &pkg;
break;
}
}
if (package_info == nullptr)
log_error("Unsupported package '%s'.\n", args.package.c_str());
for (int i = 0; i < chip_info->width; i++) {
IdString x_id = id(stringf("X%d", i));
x_ids.push_back(x_id);
id_to_x[x_id] = i;
}
for (int i = 0; i < chip_info->height; i++) {
IdString y_id = id(stringf("Y%d", i));
y_ids.push_back(y_id);
id_to_y[y_id] = i;
}
bel_carry.resize(chip_info->bel_data.size());
bel_to_cell.resize(chip_info->bel_data.size());
wire_to_net.resize(chip_info->wire_data.size());
pip_to_net.resize(chip_info->pip_data.size());
switches_locked.resize(chip_info->num_switches);
BaseArch::init_cell_types();
BaseArch::init_bel_buckets();
}
// -----------------------------------------------------------------------
std::string Arch::getChipName() const
{
if (args.type == ArchArgs::LP384) {
return "Lattice iCE40LP384";
} else if (args.type == ArchArgs::LP1K) {
return "Lattice iCE40LP1K";
} else if (args.type == ArchArgs::HX1K) {
return "Lattice iCE40HX1K";
} else if (args.type == ArchArgs::UP3K) {
return "Lattice iCE40UP3K";
} else if (args.type == ArchArgs::UP5K) {
return "Lattice iCE40UP5K";
} else if (args.type == ArchArgs::U1K) {
return "Lattice iCE5LP1K";
} else if (args.type == ArchArgs::U2K) {
return "Lattice iCE5LP2K";
} else if (args.type == ArchArgs::U4K) {
return "Lattice iCE5LP4K";
} else if (args.type == ArchArgs::LP4K) {
return "Lattice iCE40LP4K";
} else if (args.type == ArchArgs::LP8K) {
return "Lattice iCE40LP8K";
} else if (args.type == ArchArgs::HX4K) {
return "Lattice iCE40HX4K";
} else if (args.type == ArchArgs::HX8K) {
return "Lattice iCE40HX8K";
} else {
log_error("Unknown chip\n");
}
}
// -----------------------------------------------------------------------
IdString Arch::archArgsToId(ArchArgs args) const
{
if (args.type == ArchArgs::LP384)
return id("lp384");
if (args.type == ArchArgs::LP1K)
return id("lp1k");
if (args.type == ArchArgs::HX1K)
return id("hx1k");
if (args.type == ArchArgs::UP3K)
return id("up3k");
if (args.type == ArchArgs::UP5K)
return id("up5k");
if (args.type == ArchArgs::U1K)
return id("u1k");
if (args.type == ArchArgs::U2K)
return id("u2k");
if (args.type == ArchArgs::U4K)
return id("u4k");
if (args.type == ArchArgs::LP4K)
return id("lp4k");
if (args.type == ArchArgs::LP8K)
return id("lp8k");
if (args.type == ArchArgs::HX4K)
return id("hx4k");
if (args.type == ArchArgs::HX8K)
return id("hx8k");
return IdString();
}
// -----------------------------------------------------------------------
BelId Arch::getBelByName(IdStringList name) const
{
BelId ret;
if (bel_by_name.empty()) {
for (size_t i = 0; i < chip_info->bel_data.size(); i++) {
BelId b;
b.index = i;
bel_by_name[getBelName(b)] = i;
}
}
auto it = bel_by_name.find(name);
if (it != bel_by_name.end())
ret.index = it->second;
return ret;
}
BelId Arch::getBelByLocation(Loc loc) const
{
BelId bel;
if (bel_by_loc.empty()) {
for (size_t i = 0; i < chip_info->bel_data.size(); i++) {
BelId b;
b.index = i;
bel_by_loc[getBelLocation(b)] = i;
}
}
auto it = bel_by_loc.find(loc);
if (it != bel_by_loc.end())
bel.index = it->second;
return bel;
}
BelRange Arch::getBelsByTile(int x, int y) const
{
// In iCE40 chipdb bels at the same tile are consecutive and dense z ordinates
// are used
BelRange br;
for (int i = 0; i < 4; i++) {
br.b.cursor = Arch::getBelByLocation(Loc(x, y, i)).index;
if (br.b.cursor != -1)
break;
}
br.e.cursor = br.b.cursor;
if (br.e.cursor != -1) {
while (br.e.cursor < chip_info->bel_data.ssize() && chip_info->bel_data[br.e.cursor].x == x &&
chip_info->bel_data[br.e.cursor].y == y)
br.e.cursor++;
}
return br;
}
PortType Arch::getBelPinType(BelId bel, IdString pin) const
{
NPNR_ASSERT(bel != BelId());
int num_bel_wires = chip_info->bel_data[bel.index].bel_wires.size();
const BelWirePOD *bel_wires = chip_info->bel_data[bel.index].bel_wires.get();
if (num_bel_wires < 7) {
for (int i = 0; i < num_bel_wires; i++) {
if (bel_wires[i].port == pin.index)
return PortType(bel_wires[i].type);
}
} else {
int b = 0, e = num_bel_wires - 1;
while (b <= e) {
int i = (b + e) / 2;
if (bel_wires[i].port == pin.index)
return PortType(bel_wires[i].type);
if (bel_wires[i].port > pin.index)
e = i - 1;
else
b = i + 1;
}
}
return PORT_INOUT;
}
std::vector<std::pair<IdString, std::string>> Arch::getBelAttrs(BelId bel) const
{
std::vector<std::pair<IdString, std::string>> ret;
ret.push_back(std::make_pair(id("INDEX"), stringf("%d", bel.index)));
return ret;
}
WireId Arch::getBelPinWire(BelId bel, IdString pin) const
{
WireId ret;
NPNR_ASSERT(bel != BelId());
int num_bel_wires = chip_info->bel_data[bel.index].bel_wires.size();
const BelWirePOD *bel_wires = chip_info->bel_data[bel.index].bel_wires.get();
if (num_bel_wires < 7) {
for (int i = 0; i < num_bel_wires; i++) {
if (bel_wires[i].port == pin.index) {
ret.index = bel_wires[i].wire_index;
break;
}
}
} else {
int b = 0, e = num_bel_wires - 1;
while (b <= e) {
int i = (b + e) / 2;
if (bel_wires[i].port == pin.index) {
ret.index = bel_wires[i].wire_index;
break;
}
if (bel_wires[i].port > pin.index)
e = i - 1;
else
b = i + 1;
}
}
return ret;
}
std::vector<IdString> Arch::getBelPins(BelId bel) const
{
std::vector<IdString> ret;
NPNR_ASSERT(bel != BelId());
for (auto &w : chip_info->bel_data[bel.index].bel_wires)
ret.push_back(IdString(w.port));
return ret;
}
bool Arch::is_bel_locked(BelId bel) const
{
const BelConfigPOD *bel_config = nullptr;
for (auto &bel_cfg : chip_info->bel_config) {
if (bel_cfg.bel_index == bel.index) {
bel_config = &bel_cfg;
break;
}
}
NPNR_ASSERT(bel_config != nullptr);
for (auto &entry : bel_config->entries) {
if (strcmp("LOCKED", entry.cbit_name.get()))
continue;
if ("LOCKED_" + archArgs().package == entry.entry_name.get())
return true;
}
return false;
}
// -----------------------------------------------------------------------
WireId Arch::getWireByName(IdStringList name) const
{
WireId ret;
if (wire_by_name.empty()) {
for (int i = 0; i < chip_info->wire_data.ssize(); i++) {
WireId w;
w.index = i;
wire_by_name[getWireName(w)] = i;
}
}
auto it = wire_by_name.find(name);
if (it != wire_by_name.end())
ret.index = it->second;
return ret;
}
IdString Arch::getWireType(WireId wire) const
{
NPNR_ASSERT(wire != WireId());
switch (chip_info->wire_data[wire.index].type) {
case WireInfoPOD::WIRE_TYPE_NONE:
return IdString();
case WireInfoPOD::WIRE_TYPE_GLB2LOCAL:
return id("GLB2LOCAL");
case WireInfoPOD::WIRE_TYPE_GLB_NETWK:
return id("GLB_NETWK");
case WireInfoPOD::WIRE_TYPE_LOCAL:
return id("LOCAL");
case WireInfoPOD::WIRE_TYPE_LUTFF_IN:
return id("LUTFF_IN");
case WireInfoPOD::WIRE_TYPE_LUTFF_IN_LUT:
return id("LUTFF_IN_LUT");
case WireInfoPOD::WIRE_TYPE_LUTFF_LOUT:
return id("LUTFF_LOUT");
case WireInfoPOD::WIRE_TYPE_LUTFF_OUT:
return id("LUTFF_OUT");
case WireInfoPOD::WIRE_TYPE_LUTFF_COUT:
return id("LUTFF_COUT");
case WireInfoPOD::WIRE_TYPE_LUTFF_GLOBAL:
return id("LUTFF_GLOBAL");
case WireInfoPOD::WIRE_TYPE_CARRY_IN_MUX:
return id("CARRY_IN_MUX");
case WireInfoPOD::WIRE_TYPE_SP4_V:
return id("SP4_V");
case WireInfoPOD::WIRE_TYPE_SP4_H:
return id("SP4_H");
case WireInfoPOD::WIRE_TYPE_SP12_V:
return id("SP12_V");
case WireInfoPOD::WIRE_TYPE_SP12_H:
return id("SP12_H");
}
return IdString();
}
std::vector<std::pair<IdString, std::string>> Arch::getWireAttrs(WireId wire) const
{
std::vector<std::pair<IdString, std::string>> ret;
auto &wi = chip_info->wire_data[wire.index];
ret.push_back(std::make_pair(id("INDEX"), stringf("%d", wire.index)));
ret.push_back(std::make_pair(id("GRID_X"), stringf("%d", wi.x)));
ret.push_back(std::make_pair(id("GRID_Y"), stringf("%d", wi.y)));
ret.push_back(std::make_pair(id("GRID_Z"), stringf("%d", wi.z)));
return ret;
}
// -----------------------------------------------------------------------
PipId Arch::getPipByName(IdStringList name) const
{
PipId ret;
if (pip_by_name.empty()) {
for (int i = 0; i < chip_info->pip_data.ssize(); i++) {
PipId pip;
pip.index = i;
pip_by_name[getPipName(pip)] = i;
}
}
auto it = pip_by_name.find(name);
if (it != pip_by_name.end())
ret.index = it->second;
return ret;
}
IdStringList Arch::getPipName(PipId pip) const
{
NPNR_ASSERT(pip != PipId());
int x = chip_info->pip_data[pip.index].x;
int y = chip_info->pip_data[pip.index].y;
auto &src_wire = chip_info->wire_data[chip_info->pip_data[pip.index].src];
auto &dst_wire = chip_info->wire_data[chip_info->pip_data[pip.index].dst];
std::string src_name = stringf("%d.%d.%s", int(src_wire.name_x), int(src_wire.name_y), src_wire.name.get());
std::string dst_name = stringf("%d.%d.%s", int(dst_wire.name_x), int(dst_wire.name_y), dst_wire.name.get());
std::array<IdString, 3> ids{x_ids.at(x), y_ids.at(y), id(src_name + ".->." + dst_name)};
return IdStringList(ids);
}
IdString Arch::getPipType(PipId pip) const { return IdString(); }
std::vector<std::pair<IdString, std::string>> Arch::getPipAttrs(PipId pip) const
{
std::vector<std::pair<IdString, std::string>> ret;
ret.push_back(std::make_pair(id("INDEX"), stringf("%d", pip.index)));
return ret;
}
// -----------------------------------------------------------------------
BelId Arch::get_package_pin_bel(const std::string &pin) const
{
for (auto &ppin : package_info->pins) {
if (ppin.name.get() == pin) {
BelId id;
id.index = ppin.bel_index;
return id;
}
}
return BelId();
}
std::string Arch::get_bel_package_pin(BelId bel) const
{
for (auto &ppin : package_info->pins) {
if (ppin.bel_index == bel.index) {
return std::string(ppin.name.get());
}
}
return "";
}
// -----------------------------------------------------------------------
GroupId Arch::getGroupByName(IdStringList name) const
{
for (auto g : getGroups())
if (getGroupName(g) == name)
return g;
return GroupId();
}
IdStringList Arch::getGroupName(GroupId group) const
{
std::string suffix;
switch (group.type) {
case GroupId::TYPE_FRAME:
suffix = "tile";
break;
case GroupId::TYPE_MAIN_SW:
suffix = "main_sw";
break;
case GroupId::TYPE_LOCAL_SW:
suffix = "local_sw";
break;
case GroupId::TYPE_LC0_SW:
suffix = "lc0_sw";
break;
case GroupId::TYPE_LC1_SW:
suffix = "lc1_sw";
break;
case GroupId::TYPE_LC2_SW:
suffix = "lc2_sw";
break;
case GroupId::TYPE_LC3_SW:
suffix = "lc3_sw";
break;
case GroupId::TYPE_LC4_SW:
suffix = "lc4_sw";
break;
case GroupId::TYPE_LC5_SW:
suffix = "lc5_sw";
break;
case GroupId::TYPE_LC6_SW:
suffix = "lc6_sw";
break;
case GroupId::TYPE_LC7_SW:
suffix = "lc7_sw";
break;
default:
return IdStringList();
}
std::array<IdString, 3> ids{x_ids.at(group.x), y_ids.at(group.y), id(suffix)};
return IdStringList(ids);
}
std::vector<GroupId> Arch::getGroups() const
{
std::vector<GroupId> ret;
for (int y = 0; y < chip_info->height; y++) {
for (int x = 0; x < chip_info->width; x++) {
TileType type = chip_info->tile_grid[y * chip_info->width + x];
if (type == TILE_NONE)
continue;
GroupId group;
group.type = GroupId::TYPE_FRAME;
group.x = x;
group.y = y;
// ret.push_back(group);
group.type = GroupId::TYPE_MAIN_SW;
ret.push_back(group);
group.type = GroupId::TYPE_LOCAL_SW;
ret.push_back(group);
if (type == TILE_LOGIC) {
group.type = GroupId::TYPE_LC0_SW;
ret.push_back(group);
group.type = GroupId::TYPE_LC1_SW;
ret.push_back(group);
group.type = GroupId::TYPE_LC2_SW;
ret.push_back(group);
group.type = GroupId::TYPE_LC3_SW;
ret.push_back(group);
group.type = GroupId::TYPE_LC4_SW;
ret.push_back(group);
group.type = GroupId::TYPE_LC5_SW;
ret.push_back(group);
group.type = GroupId::TYPE_LC6_SW;
ret.push_back(group);
group.type = GroupId::TYPE_LC7_SW;
ret.push_back(group);
}
}
}
return ret;
}
std::vector<BelId> Arch::getGroupBels(GroupId group) const
{
std::vector<BelId> ret;
return ret;
}
std::vector<WireId> Arch::getGroupWires(GroupId group) const
{
std::vector<WireId> ret;
return ret;
}
std::vector<PipId> Arch::getGroupPips(GroupId group) const
{
std::vector<PipId> ret;
return ret;
}
std::vector<GroupId> Arch::getGroupGroups(GroupId group) const
{
std::vector<GroupId> ret;
return ret;
}
// -----------------------------------------------------------------------
bool Arch::getBudgetOverride(const NetInfo *net_info, const PortRef &sink, delay_t &budget) const
{
const auto &driver = net_info->driver;
if (driver.port == id_COUT) {
NPNR_ASSERT(sink.port == id_CIN || sink.port == id_I3);
NPNR_ASSERT(driver.cell->constr_abs_z);
bool cin = sink.port == id_CIN;
bool same_y = driver.cell->constr_z < 7;
if (cin && same_y)
budget = 0;
else {
switch (args.type) {
case ArchArgs::HX8K:
case ArchArgs::HX4K:
case ArchArgs::HX1K:
budget = cin ? 190 : (same_y ? 260 : 560);
break;
case ArchArgs::LP384:
case ArchArgs::LP1K:
case ArchArgs::LP4K:
case ArchArgs::LP8K:
budget = cin ? 290 : (same_y ? 380 : 670);
break;
case ArchArgs::UP3K:
case ArchArgs::UP5K:
case ArchArgs::U1K:
case ArchArgs::U2K:
case ArchArgs::U4K:
budget = cin ? 560 : (same_y ? 660 : 1220);
break;
default:
log_error("Unsupported iCE40 chip type.\n");
}
}
return true;
}
return false;
}
// -----------------------------------------------------------------------
bool Arch::place()
{
std::string placer = str_or_default(settings, id("placer"), defaultPlacer);
if (placer == "heap") {
PlacerHeapCfg cfg(getCtx());
cfg.ioBufTypes.insert(id_SB_IO);
if (!placer_heap(getCtx(), cfg))
return false;
} else if (placer == "sa") {
if (!placer1(getCtx(), Placer1Cfg(getCtx())))
return false;
} else {
log_error("iCE40 architecture does not support placer '%s'\n", placer.c_str());
}
bool retVal = true;
if (bool_or_default(settings, id("opt_timing"), false)) {
TimingOptCfg tocfg(getCtx());
tocfg.cellTypes.insert(id_ICESTORM_LC);
retVal = timing_opt(getCtx(), tocfg);
}
getCtx()->settings[getCtx()->id("place")] = 1;
archInfoToAttributes();
return retVal;
}
bool Arch::route()
{
std::string router = str_or_default(settings, id("router"), defaultRouter);
bool result;
if (router == "router1") {
result = router1(getCtx(), Router1Cfg(getCtx()));
} else if (router == "router2") {
router2(getCtx(), Router2Cfg(getCtx()));
result = true;
} else {
log_error("iCE40 architecture does not support router '%s'\n", router.c_str());
}
getCtx()->settings[getCtx()->id("route")] = 1;
archInfoToAttributes();
return result;
}
// -----------------------------------------------------------------------
DecalXY Arch::getBelDecal(BelId bel) const
{
DecalXY decalxy;
decalxy.decal.type = DecalId::TYPE_BEL;
decalxy.decal.index = bel.index;
decalxy.decal.active = bel_to_cell.at(bel.index) != nullptr;
return decalxy;
}
DecalXY Arch::getWireDecal(WireId wire) const
{
DecalXY decalxy;
decalxy.decal.type = DecalId::TYPE_WIRE;
decalxy.decal.index = wire.index;
decalxy.decal.active = wire_to_net.at(wire.index) != nullptr;
return decalxy;
}
DecalXY Arch::getPipDecal(PipId pip) const
{
DecalXY decalxy;
decalxy.decal.type = DecalId::TYPE_PIP;
decalxy.decal.index = pip.index;
decalxy.decal.active = pip_to_net.at(pip.index) != nullptr;
return decalxy;
};
DecalXY Arch::getGroupDecal(GroupId group) const
{
DecalXY decalxy;
decalxy.decal.type = DecalId::TYPE_GROUP;
decalxy.decal.index = (group.type << 16) | (group.x << 8) | (group.y);
decalxy.decal.active = true;
return decalxy;
};
std::vector<GraphicElement> Arch::getDecalGraphics(DecalId decal) const
{
std::vector<GraphicElement> ret;
if (decal.type == DecalId::TYPE_GROUP) {
int type = (decal.index >> 16) & 255;
int x = (decal.index >> 8) & 255;
int y = decal.index & 255;
if (type == GroupId::TYPE_FRAME) {
GraphicElement el;
el.type = GraphicElement::TYPE_LINE;
el.style = GraphicElement::STYLE_FRAME;
el.x1 = x + 0.01, el.x2 = x + 0.02, el.y1 = y + 0.01, el.y2 = y + 0.01;
ret.push_back(el);
el.x1 = x + 0.01, el.x2 = x + 0.01, el.y1 = y + 0.01, el.y2 = y + 0.02;
ret.push_back(el);
el.x1 = x + 0.99, el.x2 = x + 0.98, el.y1 = y + 0.01, el.y2 = y + 0.01;
ret.push_back(el);
el.x1 = x + 0.99, el.x2 = x + 0.99, el.y1 = y + 0.01, el.y2 = y + 0.02;
ret.push_back(el);
el.x1 = x + 0.99, el.x2 = x + 0.98, el.y1 = y + 0.99, el.y2 = y + 0.99;
ret.push_back(el);
el.x1 = x + 0.99, el.x2 = x + 0.99, el.y1 = y + 0.99, el.y2 = y + 0.98;
ret.push_back(el);
el.x1 = x + 0.01, el.x2 = x + 0.02, el.y1 = y + 0.99, el.y2 = y + 0.99;
ret.push_back(el);
el.x1 = x + 0.01, el.x2 = x + 0.01, el.y1 = y + 0.99, el.y2 = y + 0.98;
ret.push_back(el);
}
if (type == GroupId::TYPE_MAIN_SW) {
GraphicElement el;
el.type = GraphicElement::TYPE_BOX;
el.style = GraphicElement::STYLE_FRAME;
el.x1 = x + main_swbox_x1;
el.x2 = x + main_swbox_x2;
el.y1 = y + main_swbox_y1;
el.y2 = y + main_swbox_y2;
ret.push_back(el);
}
if (type == GroupId::TYPE_LOCAL_SW) {
GraphicElement el;
el.type = GraphicElement::TYPE_BOX;
el.style = GraphicElement::STYLE_FRAME;
el.x1 = x + local_swbox_x1;
el.x2 = x + local_swbox_x2;
el.y1 = y + local_swbox_y1;
el.y2 = y + local_swbox_y2;
ret.push_back(el);
}
if (GroupId::TYPE_LC0_SW <= type && type <= GroupId::TYPE_LC7_SW) {
GraphicElement el;
el.type = GraphicElement::TYPE_BOX;
el.style = GraphicElement::STYLE_FRAME;
el.x1 = x + lut_swbox_x1;
el.x2 = x + lut_swbox_x2;
el.y1 = y + logic_cell_y1 + logic_cell_pitch * (type - GroupId::TYPE_LC0_SW);
el.y2 = y + logic_cell_y2 + logic_cell_pitch * (type - GroupId::TYPE_LC0_SW);
ret.push_back(el);
}
}
if (decal.type == DecalId::TYPE_WIRE) {
int n = chip_info->wire_data[decal.index].segments.size();
const WireSegmentPOD *p = chip_info->wire_data[decal.index].segments.get();
GraphicElement::style_t style = decal.active ? GraphicElement::STYLE_ACTIVE : GraphicElement::STYLE_INACTIVE;
for (int i = 0; i < n; i++)
gfxTileWire(ret, p[i].x, p[i].y, chip_info->width, chip_info->height, GfxTileWireId(p[i].index), style);
}
if (decal.type == DecalId::TYPE_PIP) {
const PipInfoPOD &p = chip_info->pip_data[decal.index];
GraphicElement::style_t style = decal.active ? GraphicElement::STYLE_ACTIVE : GraphicElement::STYLE_HIDDEN;
gfxTilePip(ret, p.x, p.y, GfxTileWireId(p.src_seg), GfxTileWireId(p.dst_seg), style);
}
if (decal.type == DecalId::TYPE_BEL) {
BelId bel;
bel.index = decal.index;
auto bel_type = getBelType(bel);
if (bel_type == id_ICESTORM_LC) {
GraphicElement el;
el.type = GraphicElement::TYPE_BOX;
el.style = decal.active ? GraphicElement::STYLE_ACTIVE : GraphicElement::STYLE_INACTIVE;
el.x1 = chip_info->bel_data[bel.index].x + logic_cell_x1;
el.x2 = chip_info->bel_data[bel.index].x + logic_cell_x2;
el.y1 = chip_info->bel_data[bel.index].y + logic_cell_y1 +
(chip_info->bel_data[bel.index].z) * logic_cell_pitch;
el.y2 = chip_info->bel_data[bel.index].y + logic_cell_y2 +
(chip_info->bel_data[bel.index].z) * logic_cell_pitch;
ret.push_back(el);
}
if (bel_type == id_SB_IO) {
GraphicElement el;
el.type = GraphicElement::TYPE_BOX;
el.style = decal.active ? GraphicElement::STYLE_ACTIVE : GraphicElement::STYLE_INACTIVE;
el.x1 = chip_info->bel_data[bel.index].x + lut_swbox_x1;
el.x2 = chip_info->bel_data[bel.index].x + logic_cell_x2;
el.y1 = chip_info->bel_data[bel.index].y + logic_cell_y1 +
(4 * chip_info->bel_data[bel.index].z) * logic_cell_pitch;
el.y2 = chip_info->bel_data[bel.index].y + logic_cell_y2 +
(4 * chip_info->bel_data[bel.index].z + 3) * logic_cell_pitch;
ret.push_back(el);
}
if (bel_type == id_ICESTORM_RAM) {
for (int i = 0; i < 2; i++) {
GraphicElement el;
el.type = GraphicElement::TYPE_BOX;
el.style = decal.active ? GraphicElement::STYLE_ACTIVE : GraphicElement::STYLE_INACTIVE;
el.x1 = chip_info->bel_data[bel.index].x + lut_swbox_x1;
el.x2 = chip_info->bel_data[bel.index].x + logic_cell_x2;
el.y1 = chip_info->bel_data[bel.index].y + logic_cell_y1 + i;
el.y2 = chip_info->bel_data[bel.index].y + logic_cell_y2 + i + 7 * logic_cell_pitch;
ret.push_back(el);
}
}
if (bel_type == id_SB_GB) {
GraphicElement el;
el.type = GraphicElement::TYPE_BOX;
el.style = decal.active ? GraphicElement::STYLE_ACTIVE : GraphicElement::STYLE_INACTIVE;
el.x1 = chip_info->bel_data[bel.index].x + local_swbox_x1 + 0.05;
el.x2 = chip_info->bel_data[bel.index].x + logic_cell_x2 - 0.05;
el.y1 = chip_info->bel_data[bel.index].y + main_swbox_y2 - 0.05;
el.y2 = chip_info->bel_data[bel.index].y + main_swbox_y2 - 0.10;
ret.push_back(el);
}
if (bel_type == id_ICESTORM_PLL || bel_type == id_SB_WARMBOOT) {
GraphicElement el;
el.type = GraphicElement::TYPE_BOX;
el.style = decal.active ? GraphicElement::STYLE_ACTIVE : GraphicElement::STYLE_INACTIVE;
el.x1 = chip_info->bel_data[bel.index].x + local_swbox_x1 + 0.05;
el.x2 = chip_info->bel_data[bel.index].x + logic_cell_x2 - 0.05;
el.y1 = chip_info->bel_data[bel.index].y + main_swbox_y2;
el.y2 = chip_info->bel_data[bel.index].y + main_swbox_y2 + 0.05;
ret.push_back(el);
}
}
return ret;
}
// -----------------------------------------------------------------------
bool Arch::getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort, DelayQuad &delay) const
{
if (cell->type == id_ICESTORM_LC && cell->lcInfo.dffEnable) {
if (toPort == id_O)
return false;
} else if (cell->type == id_ICESTORM_RAM || cell->type == id_ICESTORM_SPRAM) {
return false;
}
return get_cell_delay_internal(cell, fromPort, toPort, delay);
}
bool Arch::get_cell_delay_internal(const CellInfo *cell, IdString fromPort, IdString toPort, DelayQuad &delay) const
{
for (auto &tc : chip_info->cell_timing) {
if (tc.type == cell->type.index) {
for (auto &path : tc.path_delays) {
if (path.from_port == fromPort.index && path.to_port == toPort.index) {
if (fast_part)
delay = DelayQuad(path.fast_delay);
else
delay = DelayQuad(path.slow_delay);
return true;
}
}
break;
}
}
return false;
}
// Get the port class, also setting clockPort to associated clock if applicable
TimingPortClass Arch::getPortTimingClass(const CellInfo *cell, IdString port, int &clockInfoCount) const
{
clockInfoCount = 0;
if (cell->type == id_ICESTORM_LC) {
if (port == id_CLK)
return TMG_CLOCK_INPUT;
if (port == id_CIN)
return TMG_COMB_INPUT;
if (port == id_COUT || port == id_LO)
return TMG_COMB_OUTPUT;
if (port == id_O) {
// LCs with no inputs are constant drivers
if (cell->lcInfo.inputCount == 0)
return TMG_IGNORE;
if (cell->lcInfo.dffEnable) {
clockInfoCount = 1;
return TMG_REGISTER_OUTPUT;
} else
return TMG_COMB_OUTPUT;
} else {
if (cell->lcInfo.dffEnable) {
clockInfoCount = 1;
return TMG_REGISTER_INPUT;
} else
return TMG_COMB_INPUT;
}
} else if (cell->type == id_ICESTORM_RAM) {
if (port == id_RCLK || port == id_WCLK)
return TMG_CLOCK_INPUT;
clockInfoCount = 1;
if (cell->ports.at(port).type == PORT_OUT)
return TMG_REGISTER_OUTPUT;
else
return TMG_REGISTER_INPUT;
} else if (cell->type == id_ICESTORM_DSP || cell->type == id_ICESTORM_SPRAM) {
if (port == id_CLK || port == id_CLOCK)
return TMG_CLOCK_INPUT;
else {
clockInfoCount = 1;
if (cell->ports.at(port).type == PORT_OUT)
return TMG_REGISTER_OUTPUT;
else
return TMG_REGISTER_INPUT;
}
} else if (cell->type == id_SB_IO) {
if (port == id_INPUT_CLK || port == id_OUTPUT_CLK)
return TMG_CLOCK_INPUT;
if (port == id_CLOCK_ENABLE) {
clockInfoCount = 2;
return TMG_REGISTER_INPUT;
}
if ((port == id_D_IN_0 && !(cell->ioInfo.pintype & 0x1)) || port == id_D_IN_1) {
clockInfoCount = 1;
return TMG_REGISTER_OUTPUT;
} else if (port == id_D_IN_0) {
return TMG_STARTPOINT;
}
if (port == id_D_OUT_0 || port == id_D_OUT_1) {
if ((cell->ioInfo.pintype & 0xC) == 0x8) {
return TMG_ENDPOINT;
} else {
clockInfoCount = 1;
return TMG_REGISTER_INPUT;
}
}
if (port == id_OUTPUT_ENABLE) {
if ((cell->ioInfo.pintype & 0x30) == 0x30) {
return TMG_REGISTER_INPUT;
} else {
return TMG_ENDPOINT;
}
}
return TMG_IGNORE;
} else if (cell->type == id_ICESTORM_PLL) {
if (port == id_PLLOUT_A || port == id_PLLOUT_B || port == id_PLLOUT_A_GLOBAL || port == id_PLLOUT_B_GLOBAL)
return TMG_GEN_CLOCK;
return TMG_IGNORE;
} else if (cell->type == id_ICESTORM_LFOSC) {
if (port == id_CLKLF)
return TMG_GEN_CLOCK;
return TMG_IGNORE;
} else if (cell->type == id_ICESTORM_HFOSC) {
if (port == id_CLKHF)
return TMG_GEN_CLOCK;
return TMG_IGNORE;
} else if (cell->type == id_SB_GB) {
if (port == id_GLOBAL_BUFFER_OUTPUT)
return cell->gbInfo.forPadIn ? TMG_GEN_CLOCK : TMG_COMB_OUTPUT;
return TMG_COMB_INPUT;
} else if (cell->type == id_SB_WARMBOOT) {
return TMG_ENDPOINT;
} else if (cell->type == id_SB_LED_DRV_CUR) {
if (port == id_LEDPU)
return TMG_IGNORE;
return TMG_ENDPOINT;
} else if (cell->type == id_SB_RGB_DRV) {
if (port == id_RGB0 || port == id_RGB1 || port == id_RGB2 || port == id_RGBPU)
return TMG_IGNORE;
return TMG_ENDPOINT;
} else if (cell->type == id_SB_RGBA_DRV) {
if (port == id_RGB0 || port == id_RGB1 || port == id_RGB2)
return TMG_IGNORE;
return TMG_ENDPOINT;
} else if (cell->type == id_SB_LEDDA_IP) {
if (port == id_CLK || port == id_CLOCK)
return TMG_CLOCK_INPUT;
return TMG_IGNORE;
} else if (cell->type == id_SB_I2C || cell->type == id_SB_SPI) {
if (port == this->id("SBCLKI"))
return TMG_CLOCK_INPUT;
clockInfoCount = 1;
if (cell->ports.at(port).type == PORT_OUT)
return TMG_REGISTER_OUTPUT;
else
return TMG_REGISTER_INPUT;
}
log_error("cell type '%s' is unsupported (instantiated as '%s')\n", cell->type.c_str(this), cell->name.c_str(this));
}
TimingClockingInfo Arch::getPortClockingInfo(const CellInfo *cell, IdString port, int index) const
{
TimingClockingInfo info;
if (cell->type == id_ICESTORM_LC) {
info.clock_port = id_CLK;
info.edge = cell->lcInfo.negClk ? FALLING_EDGE : RISING_EDGE;
if (port == id_O) {
bool has_clktoq = get_cell_delay_internal(cell, id_CLK, id_O, info.clockToQ);
NPNR_ASSERT(has_clktoq);
} else {
if (port == id_I0 || port == id_I1 || port == id_I2 || port == id_I3) {
DelayQuad dlut;
bool has_ld = get_cell_delay_internal(cell, port, id_O, dlut);
NPNR_ASSERT(has_ld);
if (args.type == ArchArgs::LP1K || args.type == ArchArgs::LP4K || args.type == ArchArgs::LP8K ||
args.type == ArchArgs::LP384) {
info.setup = DelayPair(30 + dlut.maxDelay());
} else if (args.type == ArchArgs::UP3K || args.type == ArchArgs::UP5K || args.type == ArchArgs::U4K ||
args.type == ArchArgs::U1K || args.type == ArchArgs::U2K) { // XXX verify u4k
info.setup = DelayPair(dlut.maxDelay() - 50);
} else {
info.setup = DelayPair(20 + dlut.maxDelay());
}
} else {
info.setup = DelayPair(100);
}
info.hold = DelayPair(0);
}
} else if (cell->type == id_ICESTORM_RAM) {
if (port.str(this)[0] == 'R') {
info.clock_port = id_RCLK;
info.edge = bool_or_default(cell->params, id("NEG_CLK_R")) ? FALLING_EDGE : RISING_EDGE;
} else {
info.clock_port = id_WCLK;
info.edge = bool_or_default(cell->params, id("NEG_CLK_W")) ? FALLING_EDGE : RISING_EDGE;
}
if (cell->ports.at(port).type == PORT_OUT) {
bool has_clktoq = get_cell_delay_internal(cell, info.clock_port, port, info.clockToQ);
NPNR_ASSERT(has_clktoq);
} else {
info.setup = DelayPair(100);
info.hold = DelayPair(0);
}
} else if (cell->type == id_SB_IO) {
delay_t io_setup = 80, io_clktoq = 140;
if (args.type == ArchArgs::LP1K || args.type == ArchArgs::LP8K || args.type == ArchArgs::LP384) {
io_setup = 115;
io_clktoq = 210;
} else if (args.type == ArchArgs::UP3K || args.type == ArchArgs::UP5K || args.type == ArchArgs::U4K ||
args.type == ArchArgs::U1K || args.type == ArchArgs::U2K) {
io_setup = 205;
io_clktoq = 1005;
}
if (port == id_CLOCK_ENABLE) {
info.clock_port = (index == 1) ? id_OUTPUT_CLK : id_INPUT_CLK;
info.edge = cell->ioInfo.negtrig ? FALLING_EDGE : RISING_EDGE;
info.setup = DelayPair(io_setup);
info.hold = DelayPair(0);
} else if (port == id_D_OUT_0 || port == id_OUTPUT_ENABLE) {
info.clock_port = id_OUTPUT_CLK;
info.edge = cell->ioInfo.negtrig ? FALLING_EDGE : RISING_EDGE;
info.setup = DelayPair(io_setup);
info.hold = DelayPair(0);
} else if (port == id_D_OUT_1) {
info.clock_port = id_OUTPUT_CLK;
info.edge = cell->ioInfo.negtrig ? RISING_EDGE : FALLING_EDGE;
info.setup = DelayPair(io_setup);
info.hold = DelayPair(0);
} else if (port == id_D_IN_0) {
info.clock_port = id_INPUT_CLK;
info.edge = cell->ioInfo.negtrig ? FALLING_EDGE : RISING_EDGE;
info.clockToQ = DelayQuad(io_clktoq);
} else if (port == id_D_IN_1) {
info.clock_port = id_INPUT_CLK;
info.edge = cell->ioInfo.negtrig ? RISING_EDGE : FALLING_EDGE;
info.clockToQ = DelayQuad(io_clktoq);
} else {
NPNR_ASSERT_FALSE("no clock data for IO cell port");
}
} else if (cell->type == id_ICESTORM_DSP || cell->type == id_ICESTORM_SPRAM) {
info.clock_port = cell->type == id_ICESTORM_SPRAM ? id_CLOCK : id_CLK;
info.edge = RISING_EDGE;
if (cell->ports.at(port).type == PORT_OUT) {
bool has_clktoq = get_cell_delay_internal(cell, info.clock_port, port, info.clockToQ);
if (!has_clktoq)
info.clockToQ = DelayQuad(100);
} else {
info.setup = DelayPair(100);
info.hold = DelayPair(0);
}
} else if (cell->type == id_SB_I2C || cell->type == id_SB_SPI) {
info.clock_port = this->id("SBCLKI");
info.edge = RISING_EDGE;
if (cell->ports.at(port).type == PORT_OUT) {
/* Dummy number */
info.clockToQ = DelayQuad(1500);
} else {
/* Dummy number */
info.setup = DelayPair(1500);
info.hold = DelayPair(0);
}
} else {
NPNR_ASSERT_FALSE("unhandled cell type in getPortClockingInfo");
}
return info;
}
bool Arch::is_global_net(const NetInfo *net) const
{
if (net == nullptr)
return false;
return net->driver.cell != nullptr && net->driver.port == id_GLOBAL_BUFFER_OUTPUT;
}
// Assign arch arg info
void Arch::assignArchInfo()
{
for (auto &net : getCtx()->nets) {
NetInfo *ni = net.second.get();
if (is_global_net(ni))
ni->is_global = true;
ni->is_enable = false;
ni->is_reset = false;
for (auto usr : ni->users) {
if (is_enable_port(this, usr))
ni->is_enable = true;
if (is_reset_port(this, usr))
ni->is_reset = true;
}
}
for (auto &cell : getCtx()->cells) {
CellInfo *ci = cell.second.get();
assignCellInfo(ci);
}
}
void Arch::assignCellInfo(CellInfo *cell)
{
if (cell->type == id_ICESTORM_LC) {
cell->lcInfo.dffEnable = bool_or_default(cell->params, id_DFF_ENABLE);
cell->lcInfo.carryEnable = bool_or_default(cell->params, id_CARRY_ENABLE);
cell->lcInfo.negClk = bool_or_default(cell->params, id_NEG_CLK);
cell->lcInfo.clk = get_net_or_empty(cell, id_CLK);
cell->lcInfo.cen = get_net_or_empty(cell, id_CEN);
cell->lcInfo.sr = get_net_or_empty(cell, id_SR);
cell->lcInfo.inputCount = 0;
if (get_net_or_empty(cell, id_I0))
cell->lcInfo.inputCount++;
if (get_net_or_empty(cell, id_I1))
cell->lcInfo.inputCount++;
if (get_net_or_empty(cell, id_I2))
cell->lcInfo.inputCount++;
if (get_net_or_empty(cell, id_I3))
cell->lcInfo.inputCount++;
} else if (cell->type == id_SB_IO) {
cell->ioInfo.lvds = str_or_default(cell->params, id_IO_STANDARD, "SB_LVCMOS") == "SB_LVDS_INPUT";
cell->ioInfo.global = bool_or_default(cell->attrs, this->id("GLOBAL"));
cell->ioInfo.pintype = int_or_default(cell->params, this->id("PIN_TYPE"));
cell->ioInfo.negtrig = bool_or_default(cell->params, this->id("NEG_TRIGGER"));
} else if (cell->type == id_SB_GB) {
cell->gbInfo.forPadIn = bool_or_default(cell->attrs, this->id("FOR_PAD_IN"));
}
}
ArcBounds Arch::getRouteBoundingBox(WireId src, WireId dst) const
{
ArcBounds bb;
int src_x = chip_info->wire_data[src.index].x;
int src_y = chip_info->wire_data[src.index].y;
int dst_x = chip_info->wire_data[dst.index].x;
int dst_y = chip_info->wire_data[dst.index].y;
bb.x0 = src_x;
bb.y0 = src_y;
bb.x1 = src_x;
bb.y1 = src_y;
auto extend = [&](int x, int y) {
bb.x0 = std::min(bb.x0, x);
bb.x1 = std::max(bb.x1, x);
bb.y0 = std::min(bb.y0, y);
bb.y1 = std::max(bb.y1, y);
};
extend(dst_x, dst_y);
return bb;
}
#ifdef WITH_HEAP
const std::string Arch::defaultPlacer = "heap";
#else
const std::string Arch::defaultPlacer = "sa";
#endif
const std::vector<std::string> Arch::availablePlacers = {"sa",
#ifdef WITH_HEAP
"heap"
#endif
};
const std::string Arch::defaultRouter = "router1";
const std::vector<std::string> Arch::availableRouters = {"router1", "router2"};
NEXTPNR_NAMESPACE_END
|
extern printf
extern exit
global _start
[section .text]
_start:
push hello ; arg1, "hello world\n"
call printf ; printf
add esp, 4
push 0 ; arg1, 0
call exit ; exit
add esp, 4
ret
[section .rodata]
hello:
db "hello world", 10, 0
|
;; Root source file, based on empty asm project from http://www.dustlayer.com
!cpu 6502
!to "build/slither.prg",cbm ; output file
;; BASIC loader
* = $0801 ; BASIC start address (#2049)
!byte $0d,$08,$dc,$07,$9e,$20,$34,$39 ; BASIC loader to start at $c000...
!byte $31,$35,$32,$00,$00,$00 ; puts BASIC line 2012 SYS 49152
* = $c000 ; start address for 6502 code
!source "code/zero.asm"
!source "code/macro.asm"
!source "code/main.asm"
!source "code/gfx.asm"
!source "code/text.asm"
!source "code/pixel.asm"
!source "code/score.asm"
!source "code/sfx.asm"
!source "code/irq.asm"
* = $1000
!bin "data/slither_r.sid",, $7c+2
|
//
// Created by haohanwang on 1/24/16.
//
#ifndef ALGORITHMS_LINEARREGRESSION_HPP
#define ALGORITHMS_LINEARREGRESSION_HPP
#include "Model.hpp"
#include <Eigen/Dense>
#include <unordered_map>
#ifdef BAZEL
#include "Models/ModelOptions.hpp"
#else
#include "../Models/ModelOptions.hpp"
#endif
using namespace Eigen;
class LinearRegression : public virtual Model {
private:
float L1_reg;
float L2_reg;
MatrixXf betaAll;
static constexpr float default_L1_reg = 0;
static constexpr float default_L2_reg = 0;
public:
LinearRegression();
LinearRegression(const unordered_map<string, string>& options);
void setL1_reg(float);
float getL1_reg();
void setL2_reg(float);
float getL2_reg();
// general use methods
MatrixXf derivative();
float cost();
// algorithm use methods
// proximal gradient descent
MatrixXf proximal_derivative();
MatrixXf proximal_operator(VectorXf, float);
void assertReadyToRun();
void updateBetaAll(MatrixXf);
MatrixXf getBetaAll();
};
#endif //ALGORITHMS_LINEARREGRESSION_HPP
|
display_screen:
call jiffy_wait
call DISSCR
ld a,(sheet_number)
call get_sheet_address
ld (sheet_pointer),hl
call CLRSPR
ld a,(sheet_number)
call initialize_patterns
call initialize_vram_patterns
call initialize_border
call print_sheet
call print_player_sprite
call initialize_gui
call jiffy_wait
call ENASCR
ret
|
/**
* \copyright
* Copyright (c) 2012-2019, OpenGeoSys Community (http://www.opengeosys.org)
* Distributed under a Modified BSD License.
* See accompanying file LICENSE.txt or
* http://www.opengeosys.org/project/license
*
*/
#include "MFront.h"
#include <MGIS/Behaviour/Integrate.hxx>
namespace
{
/// Converts between OGSes and MFront's Kelvin vector indices.
constexpr std::ptrdiff_t OGSToMFront(std::ptrdiff_t i)
{
// MFront: 11 22 33 12 13 23
// OGS: 11 22 33 12 23 13
if (i < 4)
return i;
if (i == 4)
return 5;
return 4;
}
/// Converts between OGSes and MFront's Kelvin vector indices.
constexpr std::ptrdiff_t MFrontToOGS(std::ptrdiff_t i)
{
// MFront: 11 22 33 12 13 23
// OGS: 11 22 33 12 23 13
return OGSToMFront(i); // Same algorithm: indices 4 and 5 swapped.
}
/// Converts between OGSes and MFront's Kelvin vectors and matrices.
template <typename Derived>
typename Derived::PlainObject OGSToMFront(Eigen::DenseBase<Derived> const& m)
{
static_assert(Derived::RowsAtCompileTime != Eigen::Dynamic, "Error");
static_assert(Derived::ColsAtCompileTime != Eigen::Dynamic, "Error");
typename Derived::PlainObject n;
// optimal for row-major storage order
for (std::ptrdiff_t r = 0; r < Eigen::DenseBase<Derived>::RowsAtCompileTime;
++r)
{
auto const R = OGSToMFront(r);
for (std::ptrdiff_t c = 0;
c < Eigen::DenseBase<Derived>::ColsAtCompileTime;
++c)
{
auto const C = OGSToMFront(c);
n(R, C) = m(r, c);
}
}
return n;
}
/// Converts between OGSes and MFront's Kelvin vectors and matrices.
template <typename Derived>
typename Derived::PlainObject MFrontToOGS(Eigen::DenseBase<Derived> const& m)
{
static_assert(Derived::RowsAtCompileTime != Eigen::Dynamic, "Error");
static_assert(Derived::ColsAtCompileTime != Eigen::Dynamic, "Error");
typename Derived::PlainObject n;
// optimal for row-major storage order
for (std::ptrdiff_t r = 0; r < Eigen::DenseBase<Derived>::RowsAtCompileTime;
++r)
{
auto const R = MFrontToOGS(r);
for (std::ptrdiff_t c = 0;
c < Eigen::DenseBase<Derived>::ColsAtCompileTime;
++c)
{
auto const C = MFrontToOGS(c);
n(R, C) = m(r, c);
}
}
return n;
}
} // namespace
namespace MaterialLib
{
namespace Solids
{
namespace MFront
{
const char* toString(mgis::behaviour::Behaviour::Kinematic kin)
{
using K = mgis::behaviour::Behaviour::Kinematic;
switch (kin)
{
case K::UNDEFINEDKINEMATIC:
return "UNDEFINEDKINEMATIC";
case K::SMALLSTRAINKINEMATIC:
return "SMALLSTRAINKINEMATIC";
case K::COHESIVEZONEKINEMATIC:
return "COHESIVEZONEKINEMATIC";
case K::FINITESTRAINKINEMATIC_F_CAUCHY:
return "FINITESTRAINKINEMATIC_F_CAUCHY";
case K::FINITESTRAINKINEMATIC_ETO_PK1:
return "FINITESTRAINKINEMATIC_ETO_PK1";
}
OGS_FATAL("Unknown kinematic %d.", kin);
}
const char* toString(mgis::behaviour::Behaviour::Symmetry sym)
{
using S = mgis::behaviour::Behaviour::Symmetry;
switch (sym)
{
case S::ISOTROPIC:
return "ISOTROPIC";
case S::ORTHOTROPIC:
return "ORTHOTROPIC";
}
OGS_FATAL("Unknown symmetry %d.", sym);
}
const char* btypeToString(int btype)
{
using B = mgis::behaviour::Behaviour;
if (btype == B::GENERALBEHAVIOUR)
return "GENERALBEHAVIOUR";
if (btype == B::STANDARDSTRAINBASEDBEHAVIOUR)
return "STANDARDSTRAINBASEDBEHAVIOUR";
if (btype == B::STANDARDFINITESTRAINBEHAVIOUR)
return "STANDARDFINITESTRAINBEHAVIOUR";
if (btype == B::COHESIVEZONEMODEL)
return "COHESIVEZONEMODEL";
OGS_FATAL("Unknown behaviour type %d.", btype);
}
const char* varTypeToString(int v)
{
using V = mgis::behaviour::Variable;
if (v == V::SCALAR)
return "SCALAR";
if (v == V::VECTOR)
return "VECTOR";
if (v == V::STENSOR)
return "STENSOR";
if (v == V::TENSOR)
return "TENSOR";
OGS_FATAL("Unknown variable type %d.", v);
}
template <int DisplacementDim>
MFront<DisplacementDim>::MFront(
mgis::behaviour::Behaviour&& behaviour,
std::vector<ProcessLib::Parameter<double> const*>&& material_properties)
: _behaviour(std::move(behaviour)),
_material_properties(std::move(material_properties))
{
auto const hypothesis = behaviour.hypothesis;
if (_behaviour.symmetry != mgis::behaviour::Behaviour::Symmetry::ISOTROPIC)
OGS_FATAL(
"The storage order of the stiffness matrix is not tested, yet. "
"Thus, we cannot be sure if we compute the behaviour of "
"anisotropic materials correctly. Therefore, currently only "
"isotropic materials are allowed.");
if (_behaviour.gradients.size() != 1)
OGS_FATAL(
"The behaviour must have exactly a single gradient as input.");
if (_behaviour.gradients[0].name != "Strain")
OGS_FATAL("The behaviour must be driven by strain.");
if (_behaviour.gradients[0].type != mgis::behaviour::Variable::STENSOR)
OGS_FATAL("Strain must be a symmetric tensor.");
if (mgis::behaviour::getVariableSize(_behaviour.gradients[0], hypothesis) !=
MFront<DisplacementDim>::KelvinVector::SizeAtCompileTime)
OGS_FATAL("Strain must have %ld components instead of %lu.",
MFront<DisplacementDim>::KelvinVector::SizeAtCompileTime,
mgis::behaviour::getVariableSize(_behaviour.gradients[0],
hypothesis));
if (_behaviour.thermodynamic_forces.size() != 1)
OGS_FATAL(
"The behaviour must compute exactly one thermodynamic force.");
if (_behaviour.thermodynamic_forces[0].name != "Stress")
OGS_FATAL("The behaviour must compute stress.");
if (_behaviour.thermodynamic_forces[0].type !=
mgis::behaviour::Variable::STENSOR)
OGS_FATAL("Stress must be a symmetric tensor.");
if (mgis::behaviour::getVariableSize(_behaviour.thermodynamic_forces[0],
hypothesis) !=
MFront<DisplacementDim>::KelvinVector::SizeAtCompileTime)
OGS_FATAL("Stress must have %ld components instead of %lu.",
MFront<DisplacementDim>::KelvinVector::SizeAtCompileTime,
mgis::behaviour::getVariableSize(
_behaviour.thermodynamic_forces[0], hypothesis));
if (!_behaviour.esvs.empty())
{
if (_behaviour.esvs[0].name != "Temperature")
{
OGS_FATAL(
"Only temperature is supported as external state variable.");
}
if (mgis::behaviour::getVariableSize(_behaviour.esvs[0], hypothesis) !=
1)
OGS_FATAL(
"Temperature must be a scalar instead of having %lu "
"components.",
mgis::behaviour::getVariableSize(
_behaviour.thermodynamic_forces[0], hypothesis));
}
}
template <int DisplacementDim>
std::unique_ptr<typename MechanicsBase<DisplacementDim>::MaterialStateVariables>
MFront<DisplacementDim>::createMaterialStateVariables() const
{
return std::make_unique<MaterialStateVariables>(_behaviour);
}
template <int DisplacementDim>
boost::optional<std::tuple<typename MFront<DisplacementDim>::KelvinVector,
std::unique_ptr<typename MechanicsBase<
DisplacementDim>::MaterialStateVariables>,
typename MFront<DisplacementDim>::KelvinMatrix>>
MFront<DisplacementDim>::integrateStress(
double const t,
ProcessLib::SpatialPosition const& x,
double const dt,
KelvinVector const& /*eps_prev*/,
KelvinVector const& eps,
KelvinVector const& /*sigma_prev*/,
typename MechanicsBase<DisplacementDim>::MaterialStateVariables const&
material_state_variables,
double const T) const
{
assert(
dynamic_cast<MaterialStateVariables const*>(&material_state_variables));
auto& d =
static_cast<MaterialStateVariables const&>(material_state_variables)
._data;
// TODO add a test of material behaviour where the value of dt matters.
d.dt = dt;
d.rdt = 1.0;
d.K[0] = 4.0; // if K[0] is greater than 3.5, the consistent tangent
// operator must be computed.
// evaluate parameters at (t, x)
{
auto out = d.s1.material_properties.begin();
for (auto* param : _material_properties)
{
auto const& vals = (*param)(t, x);
out = std::copy(vals.begin(), vals.end(), out);
}
}
if (!d.s1.external_state_variables.empty())
{
// assuming that there is only temperature
d.s1.external_state_variables[0] = T;
}
auto v = mgis::behaviour::make_view(d);
auto const eps_MFront = OGSToMFront(eps);
for (auto i = 0; i < KelvinVector::SizeAtCompileTime; ++i)
{
v.s1.gradients[i] = eps_MFront[i];
}
auto const status = mgis::behaviour::integrate(v, _behaviour);
if (status != 1)
{
OGS_FATAL("Integration failed with status %i.", status);
}
KelvinVector sigma;
for (auto i = 0; i < KelvinVector::SizeAtCompileTime; ++i)
{
sigma[i] = d.s1.thermodynamic_forces[i];
}
sigma = MFrontToOGS(sigma);
// TODO row- vs. column-major storage order. This should only matter for
// anisotropic materials.
if (d.K.size() !=
KelvinMatrix::RowsAtCompileTime * KelvinMatrix::ColsAtCompileTime)
OGS_FATAL("Stiffness matrix has wrong size.");
KelvinMatrix C = MFrontToOGS(Eigen::Map<KelvinMatrix>(d.K.data()));
// TODO avoid copying the state
auto state_copy = std::make_unique<MaterialStateVariables>(
static_cast<MaterialStateVariables const&>(material_state_variables));
std::unique_ptr<
typename MechanicsBase<DisplacementDim>::MaterialStateVariables>
state_upcast(state_copy.release());
return {std::make_tuple(std::move(sigma), std::move(state_upcast), std::move(C))};
}
template <int DisplacementDim>
double MFront<DisplacementDim>::computeFreeEnergyDensity(
double const /*t*/,
ProcessLib::SpatialPosition const& /*x*/,
double const /*dt*/,
KelvinVector const& /*eps*/,
KelvinVector const& /*sigma*/,
typename MechanicsBase<DisplacementDim>::MaterialStateVariables const&
/*material_state_variables*/) const
{
// TODO implement
return std::numeric_limits<double>::quiet_NaN();
}
template class MFront<2>;
template class MFront<3>;
} // namespace MFront
} // namespace Solids
} // namespace MaterialLib
|
; A213779: Principal diagonal of the convolution array A213778.
; 1,6,15,33,58,97,146,214,295,400,521,671,840,1043,1268,1532,1821,2154,2515,2925,3366,3861,4390,4978,5603,6292,7021,7819,8660,9575,10536,11576,12665,13838,15063,16377,17746,19209,20730,22350,24031,25816,27665,29623,31648,33787,35996,38324,40725,43250,45851,48581,51390,54333,57358,60522,63771,67164,70645,74275,77996,81871,85840,89968,94193,98582,103071,107729,112490,117425,122466,127686,133015,138528,144153,149967,155896,162019,168260,174700,181261,188026,194915,202013,209238,216677,224246,232034
lpb $0
mov $2,$0
sub $0,1
seq $2,110349 ; a(n) = n + (n+1) + (n-1) + (n+2) + (n-2) ... n terms.
add $1,$2
lpe
add $1,1
mov $0,$1
|
// This file is part of RAVL, Recognition And Vision Library
// Copyright (C) 2006, OmniPerception Ltd.
// This code may be redistributed under the terms of the GNU Lesser
// General Public License (LGPL). See the lgpl.licence file for details or
// see http://www.gnu.org/copyleft/lesser.html
// file-header-ends-here
#ifndef RAVLPROB_CPDDESIGNERFACTORY_HEADER
#define RAVLPROB_CPDDESIGNERFACTORY_HEADER 1
//! rcsid="$Id$"
//! lib=RavlProb
//! author="Robert Crida"
//! docentry="Ravl.API.Math.Statistics.Probability Framework"
#include "Ravl/RCHandleV.hh"
#include "Ravl/Prob/CPDDesigner.hh"
namespace RavlProbN {
using namespace RavlN;
//! userlevel=Develop
//: Class used for choosing conditional probability distribution designers
class CPDDesignerFactoryBodyC
: public RCBodyVC {
public:
CPDDesignerFactoryBodyC();
//: Constructor
virtual ~CPDDesignerFactoryBodyC();
//: Destructor
CPDDesignerC GetCPDDesigner(const VariableC& variable, const VariableSetC& parentVariableSet) const;
//: Find a distribution designer for the specified domain
//!param: variable - the type of dependent random variable
//!param: parentVariableSet - set of parent variables
//!return: the conditional probability distribution designer
};
//! userlevel=Normal
//: Class used for choosing conditional probability distribution designers
//!cwiz:author
class CPDDesignerFactoryC
: public RCHandleC<CPDDesignerFactoryBodyC>
{
public:
CPDDesignerFactoryC()
{}
//: Default constructor makes invalid handle
static CPDDesignerFactoryC GetInstance();
//: Get an instance of the factory
CPDDesignerC GetCPDDesigner(const VariableC& variable, const VariableSetC& parentVariableSet) const
{ return Body().GetCPDDesigner(variable, parentVariableSet); }
//: Find a distribution designer for the specified domain
//!param: variable - the type of dependent random variable
//!param: parentVariableSet - set of parent variables
//!return: the conditional probability distribution designer
private:
CPDDesignerFactoryC(bool)
: RCHandleC<CPDDesignerFactoryBodyC>(new CPDDesignerFactoryBodyC())
{}
//: Private constructor
protected:
CPDDesignerFactoryC(CPDDesignerFactoryBodyC &bod)
: RCHandleC<CPDDesignerFactoryBodyC>(bod)
{}
//: Body constructor.
CPDDesignerFactoryC(const CPDDesignerFactoryBodyC *bod)
: RCHandleC<CPDDesignerFactoryBodyC>(bod)
{}
//: Body constructor.
CPDDesignerFactoryBodyC& Body()
{ return static_cast<CPDDesignerFactoryBodyC &>(RCHandleC<CPDDesignerFactoryBodyC>::Body()); }
//: Body Access.
const CPDDesignerFactoryBodyC& Body() const
{ return static_cast<const CPDDesignerFactoryBodyC &>(RCHandleC<CPDDesignerFactoryBodyC>::Body()); }
//: Body Access.
private:
static CPDDesignerFactoryC m_instance;
//: The instance of the factory
};
}
#endif
|
; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430G2xx3 Demo - Software Poll P1.4, Set P1.0 if P1.4 = 1
;
; Description: Poll P1.4 in a loop, if hi P1.0 is set, if low, P1.0 reset.
; ACLK = n/a, MCLK = SMCLK = default DCO
;
; MSP430G2xx3
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; /|\ | |
; --o--|P1.4 P1.0|-->LED
; \|/
;
; D. Dang
; Texas Instruments Inc.
; December 2010
; Built with Code Composer Essentials Version: 4.2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;------------------------------------------------------------------------------
.text ; Program Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
;
Mainloop bit.b #010h,&P1IN ; P1.4 hi/low?
jc ON ; jmp--> P1.4 is set
;
OFF bic.b #001h,&P1OUT ; P1.0 = 0 / LED OFF
jmp Mainloop ;
ON bis.b #001h,&P1OUT ; P1.0 = 1 / LED ON
jmp Mainloop ;
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.end
|
#include "TcPacketStored.h"
#include "../../objectmanager/ObjectManagerIF.h"
#include "../../serviceinterface/ServiceInterfaceStream.h"
#include <cstring>
StorageManagerIF* TcPacketStored::store = nullptr;
TcPacketStored::TcPacketStored(store_address_t setAddress) :
TcPacketBase(nullptr), storeAddress(setAddress) {
setStoreAddress(storeAddress);
}
TcPacketStored::TcPacketStored(uint16_t apid, uint8_t service,
uint8_t subservice, uint8_t sequenceCount, const uint8_t* data,
size_t size, uint8_t ack) :
TcPacketBase(nullptr) {
this->storeAddress.raw = StorageManagerIF::INVALID_ADDRESS;
if (not this->checkAndSetStore()) {
return;
}
uint8_t* pData = nullptr;
ReturnValue_t returnValue = this->store->getFreeElement(&this->storeAddress,
(TC_PACKET_MIN_SIZE + size), &pData);
if (returnValue != this->store->RETURN_OK) {
sif::warning << "TcPacketStored: Could not get free element from store!"
<< std::endl;
return;
}
this->setData(pData);
initializeTcPacket(apid, sequenceCount, ack, service, subservice);
memcpy(&tcData->appData, data, size);
this->setPacketDataLength(
size + sizeof(PUSTcDataFieldHeader) + CRC_SIZE - 1);
this->setErrorControl();
}
ReturnValue_t TcPacketStored::getData(const uint8_t ** dataPtr,
size_t* dataSize) {
auto result = this->store->getData(storeAddress, dataPtr, dataSize);
if(result != HasReturnvaluesIF::RETURN_OK) {
sif::warning << "TcPacketStored: Could not get data!" << std::endl;
}
return result;
}
TcPacketStored::TcPacketStored(): TcPacketBase(nullptr) {
this->storeAddress.raw = StorageManagerIF::INVALID_ADDRESS;
this->checkAndSetStore();
}
ReturnValue_t TcPacketStored::deletePacket() {
ReturnValue_t result = this->store->deleteData(this->storeAddress);
this->storeAddress.raw = StorageManagerIF::INVALID_ADDRESS;
this->setData(nullptr);
return result;
}
bool TcPacketStored::checkAndSetStore() {
if (this->store == nullptr) {
this->store = objectManager->get<StorageManagerIF>(objects::TC_STORE);
if (this->store == nullptr) {
sif::error << "TcPacketStored::TcPacketStored: TC Store not found!"
<< std::endl;
return false;
}
}
return true;
}
void TcPacketStored::setStoreAddress(store_address_t setAddress) {
this->storeAddress = setAddress;
const uint8_t* tempData = nullptr;
size_t temp_size;
ReturnValue_t status = StorageManagerIF::RETURN_FAILED;
if (this->checkAndSetStore()) {
status = this->store->getData(this->storeAddress, &tempData,
&temp_size);
}
if (status == StorageManagerIF::RETURN_OK) {
this->setData(tempData);
} else {
this->setData(nullptr);
this->storeAddress.raw = StorageManagerIF::INVALID_ADDRESS;
}
}
store_address_t TcPacketStored::getStoreAddress() {
return this->storeAddress;
}
bool TcPacketStored::isSizeCorrect() {
const uint8_t* temp_data = nullptr;
size_t temp_size;
ReturnValue_t status = this->store->getData(this->storeAddress, &temp_data,
&temp_size);
if (status == StorageManagerIF::RETURN_OK) {
if (this->getFullSize() == temp_size) {
return true;
}
}
return false;
}
TcPacketStored::TcPacketStored(const uint8_t* data, uint32_t size) :
TcPacketBase(data) {
if (getFullSize() != size) {
return;
}
if (this->checkAndSetStore()) {
ReturnValue_t status = store->addData(&storeAddress, data, size);
if (status != HasReturnvaluesIF::RETURN_OK) {
this->setData(nullptr);
}
}
}
|
#include "rainbow.hh"
#include <thread>
#include <stddef.h>
#include <unistd.h>
#include <cstdio>
#include <cerrno>
#include <cmath>
#include <cstdlib>
using namespace std;
Rainbow& Rainbow::getInstance() {
const char* cooperative_string = getenv("cooperative");
bool cooperative;
if (cooperative_string != NULL) {
cooperative = (bool) strtoul(cooperative_string, NULL, 10L);
} else {
puts("Cooperative wasn't set; using uncooperative training.");
cooperative = false;
}
static Rainbow instance(cooperative);
return instance;
}
Rainbow& Rainbow::getInstance(const bool& cooperative) {
static Rainbow instance(cooperative);
return instance;
}
Rainbow::Rainbow(const bool& cooperative) :
global_lock(),
pModule(NULL),
pActionFunc(NULL),
pRewardFunc(NULL),
pCreateFunc(NULL),
pDeleteFunc(NULL),
pFinishFunc(NULL),
pSaveFunc(NULL),
_training(true) {
puts("Initializing Python interpreter");
Py_Initialize();
char cwd[1024 * sizeof(char)];
if (getcwd(cwd, sizeof(cwd)) != NULL)
fprintf(stdout, "Current working dir: %s\n", cwd);
else
perror("getcwd() error");
const char python_directory[] = "/home/mbachl/repos/remy/async_deep_reinforce";
// const char* home_directory = getenv("HOME");
const char* home_directory = "";
char* search_path = new char[strlen(home_directory)+strlen(python_directory)+1];
sprintf(search_path, "%s%s", home_directory, python_directory);
// char* search_path = new char[strlen(cwd)+strlen(python_directory)+1];
// sprintf(search_path, "%s%s", cwd, python_directory);
// // FIXME: Hardcoded path to python stuff is NOT GOOD.
// const char python_directory[] = "~/repos/remy/async_deep_reinforce";
// const char* search_path = python_directory;
printf("Current search path: %s\n", search_path);
const char pModuleName[] = "a3c";
const char pActionFuncName[] = "call_process_action";
const char pRewardFuncName[] = "call_process_reward";
const char pCreateFuncName[] = "create_training_thread";
const char pDeleteFuncName[] = "delete_training_thread";
const char pFinishFuncName[] = "call_process_finished";
const char pSaveFuncName[] = "save_session";
PyObject* path = PySys_GetObject("path");
if (path == NULL) {
PyErr_Print();
}
PyObject* pSearchPath = PyUnicode_FromString(search_path);
if (pSearchPath == NULL) {
PyErr_Print();
}
// FIXME: search_path doesn't get deleted anymore... but shouldn't actually matter...
// delete search_path;
PyList_Append(path, pSearchPath);
Py_DECREF(pSearchPath);
// size_t dummy_size = 1;
// // FIXME: pArgString never gets freed.
// wchar_t* pArgString = Py_DecodeLocale("", &dummy_size);
wchar_t* pArgCooperativeString = NULL;
if (cooperative) {
const char* raw_string = "cooperative";
size_t dummy_size = strlen(raw_string)+1;
pArgCooperativeString = Py_DecodeLocale(raw_string, &dummy_size);
} else {
const char* raw_string = "independent";
size_t dummy_size = strlen(raw_string)+1;
pArgCooperativeString = Py_DecodeLocale(raw_string, &dummy_size);
}
// PySys_SetArgv(1, &pArgString);
PySys_SetArgv(1, &pArgCooperativeString);
pModule = PyImport_ImportModule(pModuleName);
if (pModule == NULL) {
PyErr_Print();
}
puts("Yeah, loaded the a3c module");
pActionFunc = PyObject_GetAttrString(pModule, pActionFuncName);
if (pActionFunc == NULL) {PyErr_Print();}
pRewardFunc = PyObject_GetAttrString(pModule, pRewardFuncName);
if (pRewardFunc == NULL) {PyErr_Print();}
pCreateFunc = PyObject_GetAttrString(pModule, pCreateFuncName);
if (pCreateFunc == NULL) {PyErr_Print();}
pDeleteFunc = PyObject_GetAttrString(pModule, pDeleteFuncName);
if (pDeleteFunc == NULL) {PyErr_Print();}
pFinishFunc = PyObject_GetAttrString(pModule, pFinishFuncName);
if (pFinishFunc == NULL) {PyErr_Print();}
pSaveFunc = PyObject_GetAttrString(pModule, pSaveFuncName);
if (pSaveFunc == NULL) {PyErr_Print();}
}
double Rainbow::get_action(const long unsigned int thread_id, const vector<double> state, const double& tickno, const double& window) {
lock_guard<mutex> guard(global_lock);
PyObject* pState = PyTuple_New(state.size());
for (size_t i=0; i<state.size(); i++) {
PyTuple_SetItem(pState, i, PyFloat_FromDouble(state[i]));
}
PyObject* pArgs = Py_BuildValue("(iOff)", (long) thread_id, pState, tickno, window);
PyObject* pActionReturnValue = PyObject_CallObject(pActionFunc, pArgs);
if (pActionReturnValue == NULL) {
PyErr_Print();
}
double action = PyFloat_AsDouble(pActionReturnValue);
// printf("action: %f\n", action);
Py_DECREF(pActionReturnValue);
Py_DECREF(pArgs);
Py_DECREF(pState);
return action;
}
void Rainbow::put_reward(const long unsigned int thread_id, const double reward_throughput, const double reward_delay, const double duration, const double sent) {
lock_guard<mutex> guard(global_lock);
PyObject* pRewardArgs = Py_BuildValue("(iffff)", (long) thread_id, reward_throughput, reward_delay, duration, sent);
PyObject* pReturnValue = PyObject_CallObject(pRewardFunc, pRewardArgs);
if (pReturnValue == NULL) {
PyErr_Print();
fflush(stdout);
fflush(stderr);
}
Py_DECREF(pRewardArgs);
Py_DECREF(pReturnValue);
}
long unsigned int Rainbow::create_thread(const double& delay_delta) {
lock_guard<mutex> guard(global_lock);
PyObject* pArgs = Py_BuildValue("(Of)", _training ? Py_True : Py_False, delay_delta);
if (pArgs == NULL) {
PyErr_Print();
}
PyObject* pThreadId = PyObject_CallObject(pCreateFunc, pArgs);
if (pThreadId == NULL) {
puts("Oh no, NULL value for create_thread");
PyErr_Print();
}
long unsigned int thread_id = (int) PyLong_AsLong(pThreadId);
Py_DECREF(pArgs);
Py_DECREF(pThreadId);
printf("%lu: Created training thread\n", thread_id);
return thread_id;
}
void Rainbow::delete_thread(const long unsigned int thread_id) {
lock_guard<mutex> guard(global_lock);
PyObject* pThreadIdTuple = Py_BuildValue("(i)", (long) thread_id);
PyObject* pReturnValue = PyObject_CallObject(pDeleteFunc, pThreadIdTuple);
if (pReturnValue == NULL) {
PyErr_Print();
}
Py_DECREF(pReturnValue);
Py_DECREF(pThreadIdTuple);
}
void Rainbow::finish(const long unsigned int thread_id, size_t actions_to_remove, const double time_difference, const double window) {
lock_guard<mutex> guard(global_lock);
PyObject* pArgs = Py_BuildValue("(iiff)", (long) thread_id, (long) actions_to_remove, time_difference, window);
if (pArgs == NULL) {
PyErr_Print();
}
PyObject* pReturnValue = PyObject_CallObject(pFinishFunc, pArgs);
if (pReturnValue == NULL) {
PyErr_Print();
}
Py_DECREF(pArgs);
Py_DECREF(pReturnValue);
}
void Rainbow::save_session() {
lock_guard<mutex> guard(global_lock);
puts("Saving session");
PyErr_Print();
PyObject* pReturnValue = PyObject_CallObject(pSaveFunc, NULL);
if (pReturnValue == NULL) {
PyErr_Print();
}
Py_DECREF(pReturnValue);
puts("Saved session");
}
|
; A098871: Sums of distinct powers of 4 plus 1.
; Submitted by Jon Maiga
; 1,2,5,6,17,18,21,22,65,66,69,70,81,82,85,86,257,258,261,262,273,274,277,278,321,322,325,326,337,338,341,342,1025,1026,1029,1030,1041,1042,1045,1046,1089,1090,1093,1094,1105,1106,1109,1110,1281,1282,1285,1286
mov $2,1
lpb $0
mov $3,$0
div $0,2
mod $3,2
mul $3,$2
add $1,$3
mul $2,4
lpe
mov $0,$1
add $0,1
|
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
Copyright (c) GeoWorks 1992 -- All Rights Reserved
PROJECT: PC GEOS
MODULE:
FILE: cmainChangeDir.asm
AUTHOR: Chris Boyke
ROUTINES:
Name Description
---- -----------
REVISION HISTORY:
Name Date Description
---- ---- -----------
cdb 7/15/92 Initial version.
DESCRIPTION:
$Id: cmainChangeDir.asm,v 1.1 97/04/04 15:00:10 newdeal Exp $
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
UtilCode segment resource
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
DesktopQuick{Appl,Doc,Max,Restore,Tree}
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: handle icon area stuff and Tree Window
CALLED BY: misc. methods
PASS:
RETURN:
DESTROYED:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/IDEAS:
none
REVISION HISTORY:
Name Date Description
---- ---- -----------
brianc 05/09/90 added header
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
ifndef GEOLAUNCHER ; no World button for GeoLauncher
DesktopQuickAppl method DesktopClass, MSG_QUICK_APPL
mov bx, SP_APPLICATION
call DesktopQuickApplDocCommon
ret
DesktopQuickAppl endm
DesktopQuickDosRoom method DesktopClass, MSG_QUICK_DOS_ROOM
mov bx, SP_DOS_ROOM
call DesktopQuickApplDocCommon
ret
DesktopQuickDosRoom endm
if not _FORCE_DELETE
DesktopQuickWastebasket method DesktopClass, MSG_QUICK_WASTEBASKET
mov bx, SP_WASTE_BASKET
call DesktopQuickApplDocCommon
ret
DesktopQuickWastebasket endm
endif ; not _FORCE_DELETE
DesktopQuickBackup method DesktopClass, MSG_QUICK_BACKUP
mov bx, SP_BACKUP
call DesktopQuickApplDocCommon
ret
DesktopQuickBackup endm
endif
DesktopQuickDoc method DesktopClass, MSG_QUICK_DOC
mov bx, SP_DOCUMENT
call DesktopQuickApplDocCommon
ret
DesktopQuickDoc endm
;
; pass: bx = StandardPath
;
DesktopQuickApplDocCommon proc near
NOFXIP < mov dx, cs >
NOFXIP < mov bp, offset DeskProcessNullPath ;dx:bp=null path for >
;passed SP
FXIP < clr bp >
FXIP < push bp >
FXIP < mov dx, ss >
FXIP < mov bp, sp ;dx:bp = null path >
call CreateNewFolderWindow
FXIP < pop bp >
ret
DesktopQuickApplDocCommon endp
SBCS <DeskProcessNullPath char 0 >
DBCS <DeskProcessNullPath wchar 0 >
if _GMGR
ifndef GEOLAUNCHER ; no Icon Area buttons for GeoLauncher
;
; pass:
; cx = identifier
;
DesktopOverlappingFullSizedToggle method DesktopClass, \
MSG_OVERLAPPING_FULL_SIZED_TOGGLE
mov ax, MSG_GEN_DISPLAY_GROUP_SET_FULL_SIZED ; assume full-sized
test cx, mask QVTI_FULL_SIZED
jnz haveMode
mov ax, MSG_GEN_DISPLAY_GROUP_SET_OVERLAPPING ; else overlapping
haveMode:
mov bx, handle FileSystemDisplayGroup
mov si, offset FileSystemDisplayGroup
call ObjMessageCallFixup
ret
DesktopOverlappingFullSizedToggle endm
endif ; ifndef GEOLAUNCHER
endif ; if _GMGR
ifdef GEOLAUNCHER ; GeoLauncher has open/close directory buttons
DesktopOpenDirectory method DesktopClass, MSG_OPEN_DIRECTORY
mov ax, MSG_OPEN_SELECT_LIST ; simulate File:Open
call DesktopSendToCurrentWindow ; sends only to FolderClass obj.
ret
DesktopOpenDirectory endm
DesktopCloseDirectory method DesktopClass, MSG_CLOSE_DIRECTORY
mov ax, MSG_FOLDER_UP_DIR
call DesktopSendToCurrentWindow ; sends only to FolderClass obj.
ret
DesktopCloseDirectory endm
DesktopExitToDos method DesktopClass, MSG_EXIT_TO_DOS
mov bx, handle Desktop
mov si, offset Desktop
mov ax, MSG_GEN_GUP_QUERY
mov cx, GUQT_FIELD
call ObjMessageCallFixup ; ^lcx:dx = field
mov bx, cx
mov si, dx ; ^lbx:si = field
mov ax, MSG_GEN_FIELD_EXIT_TO_DOS
call ObjMessageForce
ret
DesktopExitToDos endm
endif
if _GMGR
if not _ZMGR
ifndef GEOLAUNCHER ; no "Show Tree Window" menu item
if _TREE_MENU
DesktopQuickTree method DesktopClass, MSG_QUICK_TREE
call IsTreeWindowUp
jnc needToCreate ; nope, create
call BringUpTreeWindow ; if so, just bring-to-front
ret ; <-- EXIT HERE ALSO
needToCreate:
;
; get current tree drive from Tree Drive menu
;
mov bx, handle TreeMenuDriveList
mov si, offset TreeMenuDriveList
mov ax, MSG_GEN_ITEM_GROUP_GET_SELECTION
call ObjMessageCallFixup ; ax = drive #/media
jnc short haveDriveAL ; excl found, use drive #
mov bx, ss:[geosDiskHandle] ; else no excl, use system drive
call DiskGetDrive ; al = drive number
haveDriveAL:
clr ah
mov bp, ax ; bp = drive number
;
; create Tree Window if new drive contains good disk
; else, do nothing but report error
; bp = drive number
;
call SetTreeDriveAndShowTreeWindow
ret
DesktopQuickTree endm
endif ; ifdef _TREE_MENU
endif ; ifndef GEOLAUNCHER
endif ; if (not _ZMGR)
endif ; if _GMGR
UtilCode ends
|
#include <bits/stdc++.h>
#define INF 2000000000
using namespace std;
typedef long long ll;
int read(){
int f = 1, x = 0;
char c = getchar();
while(c < '0' || c > '9'){if(c == '-') f = -f; c = getchar();}
while(c >= '0' && c <= '9')x = x * 10 + c - '0', c = getchar();
return f * x;
}
class Trie {
private:
vector<vector<int> > trie;
int cnt;
public:
/** Initialize your data structure here. */
Trie() {
trie = vector<vector<int> >(2, vector<int>(2, 0));
cnt = 1;
}
/** Inserts a word into the trie. */
void insert(int x) {
int rt = 1;
for(int i = (1 << 30); i; i >>= 1){
int res = ((i & x) == i) ? 1: 0;
if(!trie[rt][res])
trie.push_back(vector<int>(2, 0)),
trie[rt][res] = ++cnt;
rt = trie[rt][res];
}
}
/** Returns if the word is in the trie. */
int search(int x) {
int rt = 1, res = 0;
for(int i = (1 << 30); i; i >>= 1){
int B = ((i & x) == i) ? 1: 0;
if(!trie[rt][B ^ 1])
rt = trie[rt][B];
else
rt = trie[rt][B ^ 1], res |= i;
}
return res;
}
};
class Solution {
public:
int findMaximumXOR(vector<int>& nums) {
Trie t;
for (int i: nums)
t.insert(i);
int ans = 0;
for (int i: nums)
ans = max(ans, t.search(i));
return ans;
}
};
Solution sol;
void init(){
}
void solve(){
// sol.convert();
}
int main(){
init();
solve();
return 0;
}
|
dnl AMD64 mpn_mul_basecase optimised for AMD bobcat.
dnl Copyright 2003-2005, 2007, 2008, 2011, 2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 4.5
C AMD K10 4.5
C AMD bd1 4.75
C AMD bobcat 5
C Intel P4 17.7
C Intel core2 5.5
C Intel NHM 5.43
C Intel SBR 3.92
C Intel atom 23
C VIA nano 5.63
C This mul_basecase is based on mul_1 and addmul_1, since these both run at the
C multiply insn bandwidth, without any apparent loop branch exit pipeline
C replays experienced on K8. The structure is unusual: it falls into mul_1 in
C the same way for all n, then it splits into 4 different wind-down blocks and
C 4 separate addmul_1 loops.
C
C We have not tried using the same addmul_1 loops with a switch into feed-in
C code, as we do in other basecase implementations. Doing that could save
C substantial code volume, but would also probably add some overhead.
C TODO
C * Tune un < 3 code.
C * Fix slowdown for un=vn=3 (67->71) compared to default code.
C * This is 1263 bytes, compared to 1099 bytes for default code. Consider
C combining addmul loops like that code. Tolerable slowdown?
C * Lots of space could be saved by replacing the "switch" code by gradual
C jumps out from mul_1 winddown code, perhaps with no added overhead.
C * Are the ALIGN(16) really necessary? They add about 25 bytes of padding.
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
C Standard parameters
define(`rp', `%rdi')
define(`up', `%rsi')
define(`un_param', `%rdx')
define(`vp', `%rcx')
define(`vn', `%r8')
C Standard allocations
define(`un', `%rbx')
define(`w0', `%r10')
define(`w1', `%r11')
define(`w2', `%r12')
define(`w3', `%r13')
define(`n', `%rbp')
define(`v0', `%r9')
C Temp macro for allowing control over indexing.
C Define to return $1 for more conservative ptr handling.
define(`X',`$2')
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(mpn_mul_basecase)
FUNC_ENTRY(4)
IFDOS(` mov 56(%rsp), %r8d ')
mov (up), %rax
mov (vp), v0
cmp $2, un_param
ja L(ge3)
jz L(u2)
mul v0 C u0 x v0
mov %rax, (rp)
mov %rdx, 8(rp)
FUNC_EXIT()
ret
L(u2): mul v0 C u0 x v0
mov %rax, (rp)
mov 8(up), %rax
mov %rdx, w0
mul v0
add %rax, w0
mov %rdx, w1
adc $0, w1
cmp $1, R32(vn)
jnz L(u2v2)
mov w0, 8(rp)
mov w1, 16(rp)
FUNC_EXIT()
ret
L(u2v2):mov 8(vp), v0
mov (up), %rax
mul v0
add %rax, w0
mov w0, 8(rp)
mov %rdx, %r8 C CAUTION: r8 realloc
adc $0, %r8
mov 8(up), %rax
mul v0
add w1, %r8
adc $0, %rdx
add %r8, %rax
adc $0, %rdx
mov %rax, 16(rp)
mov %rdx, 24(rp)
FUNC_EXIT()
ret
L(ge3): push %rbx
push %rbp
push %r12
push %r13
lea 8(vp), vp
lea -24(rp,un_param,8), rp
lea -24(up,un_param,8), up
xor R32(un), R32(un)
mov $2, R32(n)
sub un_param, un
sub un_param, n
mul v0
mov %rax, w2
mov %rdx, w3
jmp L(L3)
ALIGN(16)
L(top): mov w0, -16(rp,n,8)
add w1, w2
adc $0, w3
mov (up,n,8), %rax
mul v0
mov %rax, w0
mov %rdx, w1
mov w2, -8(rp,n,8)
add w3, w0
adc $0, w1
mov 8(up,n,8), %rax
mul v0
mov %rax, w2
mov %rdx, w3
mov w0, (rp,n,8)
add w1, w2
adc $0, w3
L(L3): mov 16(up,n,8), %rax
mul v0
mov %rax, w0
mov %rdx, w1
mov w2, 8(rp,n,8)
add w3, w0
adc $0, w1
mov 24(up,n,8), %rax
mul v0
mov %rax, w2
mov %rdx, w3
add $4, n
js L(top)
mov w0, -16(rp,n,8)
add w1, w2
adc $0, w3
C Switch on n into right addmul_l loop
test n, n
jz L(r2)
cmp $2, R32(n)
ja L(r3)
jz L(r0)
jmp L(r1)
L(r3): mov w2, X(-8(rp,n,8),16(rp))
mov w3, X((rp,n,8),24(rp))
add $2, un
C outer loop(3)
L(to3): dec vn
jz L(ret)
mov (vp), v0
mov 8(up,un,8), %rax
lea 8(vp), vp
lea 8(rp), rp
mov un, n
mul v0
mov %rax, w2
mov %rdx, w3
jmp L(al3)
ALIGN(16)
L(ta3): add w0, -16(rp,n,8)
adc w1, w2
adc $0, w3
mov (up,n,8), %rax
mul v0
mov %rax, w0
mov %rdx, w1
add w2, -8(rp,n,8)
adc w3, w0
adc $0, w1
mov 8(up,n,8), %rax
mul v0
mov %rax, w2
mov %rdx, w3
add w0, (rp,n,8)
adc w1, w2
adc $0, w3
L(al3): mov 16(up,n,8), %rax
mul v0
mov %rax, w0
mov %rdx, w1
add w2, 8(rp,n,8)
adc w3, w0
adc $0, w1
mov 24(up,n,8), %rax
mul v0
mov %rax, w2
mov %rdx, w3
add $4, n
js L(ta3)
add w0, X(-16(rp,n,8),8(rp))
adc w1, w2
adc $0, w3
add w2, X(-8(rp,n,8),16(rp))
adc $0, w3
mov w3, X((rp,n,8),24(rp))
jmp L(to3)
L(r2): mov X(0(up,n,8),(up)), %rax
mul v0
mov %rax, w0
mov %rdx, w1
mov w2, X(-8(rp,n,8),-8(rp))
add w3, w0
adc $0, w1
mov X(8(up,n,8),8(up)), %rax
mul v0
mov %rax, w2
mov %rdx, w3
mov w0, X((rp,n,8),(rp))
add w1, w2
adc $0, w3
mov X(16(up,n,8),16(up)), %rax
mul v0
mov %rax, w0
mov %rdx, w1
mov w2, X(8(rp,n,8),8(rp))
add w3, w0
adc $0, w1
mov w0, X(16(rp,n,8),16(rp))
adc $0, w3
mov w1, X(24(rp,n,8),24(rp))
inc un
C outer loop(2)
L(to2): dec vn
jz L(ret)
mov (vp), v0
mov 16(up,un,8), %rax
lea 8(vp), vp
lea 8(rp), rp
mov un, n
mul v0
mov %rax, w0
mov %rdx, w1
jmp L(al2)
ALIGN(16)
L(ta2): add w0, -16(rp,n,8)
adc w1, w2
adc $0, w3
mov (up,n,8), %rax
mul v0
mov %rax, w0
mov %rdx, w1
add w2, -8(rp,n,8)
adc w3, w0
adc $0, w1
mov 8(up,n,8), %rax
mul v0
mov %rax, w2
mov %rdx, w3
add w0, (rp,n,8)
adc w1, w2
adc $0, w3
mov 16(up,n,8), %rax
mul v0
mov %rax, w0
mov %rdx, w1
add w2, 8(rp,n,8)
adc w3, w0
adc $0, w1
L(al2): mov 24(up,n,8), %rax
mul v0
mov %rax, w2
mov %rdx, w3
add $4, n
js L(ta2)
add w0, X(-16(rp,n,8),8(rp))
adc w1, w2
adc $0, w3
add w2, X(-8(rp,n,8),16(rp))
adc $0, w3
mov w3, X((rp,n,8),24(rp))
jmp L(to2)
L(r1): mov X(0(up,n,8),8(up)), %rax
mul v0
mov %rax, w0
mov %rdx, w1
mov w2, X(-8(rp,n,8),(rp))
add w3, w0
adc $0, w1
mov X(8(up,n,8),16(up)), %rax
mul v0
mov %rax, w2
mov %rdx, w3
mov w0, X((rp,n,8),8(rp))
add w1, w2
adc $0, w3
mov w2, X(8(rp,n,8),16(rp))
mov w3, X(16(rp,n,8),24(rp))
add $4, un
C outer loop(1)
L(to1): dec vn
jz L(ret)
mov (vp), v0
mov -8(up,un,8), %rax
lea 8(vp), vp
lea 8(rp), rp
mov un, n
mul v0
mov %rax, w2
mov %rdx, w3
jmp L(al1)
ALIGN(16)
L(ta1): add w0, -16(rp,n,8)
adc w1, w2
adc $0, w3
L(al1): mov (up,n,8), %rax
mul v0
mov %rax, w0
mov %rdx, w1
add w2, -8(rp,n,8)
adc w3, w0
adc $0, w1
mov 8(up,n,8), %rax
mul v0
mov %rax, w2
mov %rdx, w3
add w0, (rp,n,8)
adc w1, w2
adc $0, w3
mov 16(up,n,8), %rax
mul v0
mov %rax, w0
mov %rdx, w1
add w2, 8(rp,n,8)
adc w3, w0
adc $0, w1
mov 24(up,n,8), %rax
mul v0
mov %rax, w2
mov %rdx, w3
add $4, n
js L(ta1)
add w0, X(-16(rp,n,8),8(rp))
adc w1, w2
adc $0, w3
add w2, X(-8(rp,n,8),16(rp))
adc $0, w3
mov w3, X((rp,n,8),24(rp))
jmp L(to1)
L(r0): mov X((up,n,8),16(up)), %rax
mul v0
mov %rax, w0
mov %rdx, w1
mov w2, X(-8(rp,n,8),8(rp))
add w3, w0
adc $0, w1
mov w0, X((rp,n,8),16(rp))
mov w1, X(8(rp,n,8),24(rp))
add $3, un
C outer loop(0)
L(to0): dec vn
jz L(ret)
mov (vp), v0
mov (up,un,8), %rax
lea 8(vp), vp
lea 8(rp), rp
mov un, n
mul v0
mov %rax, w0
mov %rdx, w1
jmp L(al0)
ALIGN(16)
L(ta0): add w0, -16(rp,n,8)
adc w1, w2
adc $0, w3
mov (up,n,8), %rax
mul v0
mov %rax, w0
mov %rdx, w1
add w2, -8(rp,n,8)
adc w3, w0
adc $0, w1
L(al0): mov 8(up,n,8), %rax
mul v0
mov %rax, w2
mov %rdx, w3
add w0, (rp,n,8)
adc w1, w2
adc $0, w3
mov 16(up,n,8), %rax
mul v0
mov %rax, w0
mov %rdx, w1
add w2, 8(rp,n,8)
adc w3, w0
adc $0, w1
mov 24(up,n,8), %rax
mul v0
mov %rax, w2
mov %rdx, w3
add $4, n
js L(ta0)
add w0, X(-16(rp,n,8),8(rp))
adc w1, w2
adc $0, w3
add w2, X(-8(rp,n,8),16(rp))
adc $0, w3
mov w3, X((rp,n,8),24(rp))
jmp L(to0)
L(ret): pop %r13
pop %r12
pop %rbp
pop %rbx
FUNC_EXIT()
ret
EPILOGUE()
|
;*******************************************************************************
;* Language : Motorola/Freescale/NXP 68HC11 Assembly Language (aspisys.com/ASM11)
;*******************************************************************************
;* Scott's Monitor
;* Based heavily on BUFFALO version 3.4 from Motorola CRC: $7779
;*
;* Changes from BUFFALO version 3.4:
;* - relocated code to dddd
;* - removed 'dflop' at 4000
;* - removed vector table initialization
;* - removed support for duart, acia
;* - removed support for evb board test
;* - changed memory dump to not read twice for hex, ascii
;* - improved formatting of memory dumps
;* - added halt command
;* Changes needed:
;* - add write w/o verify command
;***************
;* EQUATES *
;***************
RAMBS equ $0000 ; start of ram
REGBS equ $1000 ; start of registers
CODEBS equ $2000 ; start of code *****
DSTREE equ $FE00 ; start of eeprom *****
DENDEE equ $FFFF ; end of eeprom *****
PORTE equ REGBS+$0A ; port e
CFORC equ REGBS+$0B ; force output compare
TCNT equ REGBS+$0E ; timer count
TOC5 equ REGBS+$1E ; oc5 reg
TCTL1 equ REGBS+$20 ; timer control 1
TMSK1 equ REGBS+$22 ; timer mask 1
TFLG1 equ REGBS+$23 ; timer flag 1
TMSK2 equ REGBS+$24 ; timer mask 2
BAUD equ REGBS+$2B ; sci baud reg
SCCR1 equ REGBS+$2C ; sci control1 reg
SCCR2 equ REGBS+$2D ; sci control2 reg
SCSR equ REGBS+$2E ; sci status reg
SCDAT equ REGBS+$2F ; sci data reg
BPROT equ REGBS+$35 ; block protect reg
OPTION equ REGBS+$39 ; option reg
COPRST equ REGBS+$3A ; cop reset reg
PPROG equ REGBS+$3B ; ee prog reg
HPRIO equ REGBS+$3C ; hprio reg
CONFIG equ REGBS+$3F ; config register
PROMPT equ '>'
BUFFLNG equ 35 ; input buffer length
CTLA equ $01 ; exit host or assembler
CTLB equ $02 ; send break to host
CTLW equ $17 ; wait
CTLX equ $18 ; abort
DEL equ $7F ; abort
EOT equ $04 ; end of text/table
SWI equ $3F
;***************
;* RAM *
;***************
org $2D
;*** Buffalo ram space ***
rmb 20 ; user stack area
USTACK rmb 30 ; monitor stack area
STACK rmb 1
REGS rmb 9 ; user's pc,y,x,a,b,c
SP rmb 2 ; user's sp
INBUFF rmb BUFFLNG ; input buffer
ENDBUFF equ *
COMBUFF rmb 8 ; command buffer
SHFTREG rmb 2 ; input shift register
STREE rmb 2 ; eeprom start address
ENDEE rmb 2 ; eeprom end address
BRKTABL rmb 8 ; breakpoint table
AUTOLF rmb 1 ; auto lf flag for i/o
;IODEV rmb 1 ; 0=sci, 1=acia, 2=duartA, 3=duartB
;EXTDEV rmb 1 ; 0=none, 1=acia, 2=duart,
;HOSTDEV rmb 1 ; 0=sci, 1=acia, 3=duartB
COUNT rmb 1 ; # characters read
CHRCNT rmb 1 ; # characters output on current line
PTRMEM rmb 2 ; current memory location
LDOFFST rmb 2 ; offset for download
BFR equ INBUFF+16 ; borrow end of input bfr for mem dump
;*** Buffalo variables - used by: ***
PTR0 rmb 2 ; main,readbuff,incbuff,AS
PTR1 rmb 2 ; main,BR,DU,MO,AS,EX
PTR2 rmb 2 ; EX,DU,MO,AS
PTR3 rmb 2 ; EX,HO,MO,AS
PTR4 rmb 2 ; EX,AS
PTR5 rmb 2 ; EX,AS,BOOT
PTR6 rmb 2 ; EX,AS,BOOT
PTR7 rmb 2 ; EX,AS
PTR8 rmb 2 ; AS
TMP1 rmb 1 ; main,hexbin,buffarg,termarg
TMP2 rmb 1 ; GO,HO,AS,LOAD
TMP3 rmb 1 ; AS,LOAD
TMP4 rmb 1 ; TR,HO,ME,AS,LOAD
;*** Vector jump table ***
org $00C4
JSCI rmb 3
JSPI rmb 3
JPAIE rmb 3
JPAO rmb 3
JTOF rmb 3
JTOC5 rmb 3
JTOC4 rmb 3
JTOC3 rmb 3
JTOC2 rmb 3
JTOC1 rmb 3
JTIC3 rmb 3
JTIC2 rmb 3
JTIC1 rmb 3
JRTI rmb 3
JIRQ rmb 3
JXIRQ rmb 3
JSWI rmb 3
JILLOP rmb 3
JCOP rmb 3
JCLM rmb 3
;*****************
;*
;* ROM starts here *
;*
;*****************
org CODEBS ;*****
;*****************
;** BUFFALO - This is where Buffalo starts
;** out of reset. All initialization is done
;** here including determination of where the
;** user terminal is (SCI,ACIA, or DUART).
;*****************
BUFFALO lda #$93
sta OPTION ; adpu, dly, irqe, cop
lda #$00
sta TMSK2 ; timer pre = %1 for trace
lda #$00
sta BPROT ; clear eeprom block protect
ldx #DSTREE ; set up default eeprom address range
stx STREE
ldx #DENDEE
stx ENDEE
ldx #$0000 ; set up default download offset
stx LDOFFST
lds #STACK ; monitor stack pointer
ldx #USTACK
stx SP ; default user stack
lda TCTL1
ora #$03
sta TCTL1 ; force oc5 pin high for trace
lda #$D0
sta REGS+8 ; default user ccr
ldd #$3F0D ; initial command is ?
std INBUFF
jsr BPCLR ; clear breakpoints
clr AUTOLF
inc AUTOLF ; auto cr/lf = on
;* Determine type of external comm device - none, or acia *
BUFF1 equ * ; see if duart exists
;* Find terminal port - SCI or external. *
BUFF2 bsr SIGNON ; initialize sci
jsr OUTCRLF
bra MAIN
BUFF3 jsr INPUT ; get input from sci port
cmpa #$0D
beq BUFF4 ; jump if cr - sci is terminal port
bra BUFF3
SIGNON jsr INIT ; initialize device
ldx #MSG1 ; buffalo message
jmp OUTSTRG
; RTS
;* Determine where host port should be. *
BUFF4 equ *
;*****************
;** MAIN - This module reads the user's input into
;** a buffer called INBUFF. The first field (assumed
;** to be the command field) is then parsed into a
;** second buffer called COMBUFF. The command table
;** is then searched for the contents of COMBUFF and
;** if found, the address of the corresponding task
;** routine is fetched from the command table. The
;** task is then called as a subroutine so that
;** control returns back to here upon completion of
;** the task. Buffalo expects the following format
;** for commands:
;** <cmd>[<wsp><arg><wsp><arg>...]<cr>
;** [] implies contents optional.
;** <wsp> means whitespace character (space,comma,tab).
;** <cmd> = command string of 1-8 characters.
;** <arg> = Argument particular to the command.
;** <cr> = Carriage return signifying end of input string.
;*****************
;* Prompt user
;*do
;* a=input();
;* if(a==(cntlx or del)) continue;
;* elseif(a==backspace)
;* b--;
;* if(b<0) b=0;
;* else
;* if(a==cr && buffer empty)
;* repeat last command;
;* else put a into buffer;
;* check if buffer full;
;*while(a != (cr or /)
MAIN sei ; block interrupts
lds #STACK ; initialize sp every time
clr AUTOLF
inc AUTOLF ; auto cr/lf = on
jsr OUTCRLF
lda #PROMPT ; prompt user
jsr OUTPUT
clrb
MAIN1 jsr INCHAR ; read terminal
ldx #INBUFF
abx ; pointer into buffer
cmpa #CTLX
beq MAIN ; jump if cntl X
cmpa #DEL
beq MAIN ; jump if del
cmpa #$08
bne MAIN2 ; jump if not bckspc
decb
blt MAIN ; jump if buffer empty
bra MAIN1
MAIN2 cmpa #$D
bne MAIN3 ; jump if not cr
tstb
beq COMM0 ; jump if buffer empty
sta ,X ; put a in buffer
bra COMM0
MAIN3 sta ,X ; put a in buffer
incb
cmpb #BUFFLNG
ble MAIN4 ; jump if not long
ldx #MSG3 ; "long"
jsr OUTSTRG
bra MAIN
MAIN4 cmpa #'/'
bne MAIN1 ; jump if not "/"
;* *******************
;*****************
;* Parse out and evaluate the command field.
;*****************
;*Initialize
COMM0 equ *
clr TMP1 ; Enable "/" command
clr SHFTREG
clr SHFTREG+1
clrb
ldx #INBUFF ; ptrbuff[] = inbuff[]
stx PTR0
jsr WSKIP ; find first char
;*while((a=readbuff) != (cr or wspace))
;* upcase(a);
;* buffptr[b] = a
;* b++
;* if (b > 8) error(too long);
;* if(a == "/")
;* if(enabled) mslash();
;* else error(command?);
;* else hexbin(a);
COMM1 equ *
jsr READBUFF ; read from buffer
ldx #COMBUFF
abx
bsr UPCASE ; convert to upper case
sta ,X ; put in command buffer
cmpa #$0D
beq SRCH ; jump if cr
jsr WCHEK
beq SRCH ; jump if wspac
jsr INCBUFF ; move buffer pointer
incb
cmpb #$8
ble COMM2
ldx #MSG3 ; "long"
jsr OUTSTRG
bra MAIN
COMM2 equ *
cmpa #'/'
bne COMM4 ; jump if not "/"
tst TMP1
bne COMM3 ; jump if not enabled
decb
stb COUNT
ldx #MSLASH
bra EXEC ; execute "/"
COMM3 ldx #MSG8 ; "command?"
jsr OUTSTRG
jmp MAIN
COMM4 equ *
jsr HEXBIN
bra COMM1
;*****************
;* Search tables for command. At this point,
;* COMBUFF holds the command field to be executed,
;* and B = # of characters in the command field.
;* The command table holds the whole command name
;* but only the first n characters of the command
;* must match what is in COMBUFF where n is the
;* number of characters entered by the user.
;*****************
;*count = b;
;*ptr1 = comtabl;
;*while(ptr1[0] != end of table)
;* ptr1 = next entry
;* for(b=1; b=count; b++)
;* if(ptr1[b] == combuff[b]) continue;
;* else error(not found);
;* execute task;
;* return();
;*return(command not found);
SRCH stb COUNT ; size of command entered
ldx #COMTABL ; pointer to table
stx PTR1 ; pointer to next entry
SRCH1 ldx PTR1
ldy #COMBUFF ; pointer to command buffer
ldb 0,X
cmpb #$FF
bne SRCH2
ldx #MSG2 ; "command not found"
jsr OUTSTRG
jmp MAIN
SRCH2 pshx ; compute next table entry
addb #$3
abx
stx PTR1
pulx
clrb
SRCHLP incb ; match characters loop
lda 1,X ; read table
cmpa 0,Y ; compare to combuff
bne SRCH1 ; try next entry
inx ; move pointers
iny
cmpb COUNT
blt SRCHLP ; loop countu1 times
ldx PTR1
dex
dex
ldx 0,X ; jump address from table
EXEC jsr 0,X ; call task as subroutine
jmp MAIN
;*
;*****************
;* UTILITY SUBROUTINES - These routines
;* are called by any of the task routines.
;*****************
;*****************
;* UPCASE(a) - If the contents of A is alpha,
;* returns a converted to uppercase.
;*****************
UPCASE cmpa #'a'
blt UPCASE1 ; jump if < a
cmpa #'z'
bgt UPCASE1 ; jump if > z
suba #$20 ; convert
UPCASE1 rts
;*****************
;* BPCLR() - Clear all entries in the
;* table of breakpoints.
;*****************
BPCLR ldx #BRKTABL
ldb #8
BPCLR1 clr 0,X
inx
decb
bgt BPCLR1 ; loop 8 times
rts
;*****************
;* RPRNT1(x) - Prints name and contents of a single
;* user register. On entry X points to name of register
;* in reglist. On exit, a=register name.
;*****************
REGLIST fcc 'PYXABCS' ; names
fcb 0,2,4,6,7,8,9 ; offset
fcb 1,1,1,0,0,0,1 ; size
RPRNT1 lda 0,X
psha
pshx
jsr OUTPUT ; name
lda #'-'
jsr OUTPUT ; dash
ldb 7,X ; contents offset
lda 14,X ; bytesize
ldx #REGS ; address
abx
tsta
beq RPRN2 ; jump if 1 byte
jsr OUT1BYT ; 2 bytes
RPRN2 jsr OUT1BSP
pulx
pula
rts
;*****************
;* RPRINT() - Print the name and contents
;* of all the user registers.
;*****************
RPRINT pshx
ldx #REGLIST
RPRI1 bsr RPRNT1 ; print name
inx
cmpa #'S' ; s is last register
bne RPRI1 ; jump if not done
pulx
rts
;*****************
;* HEXBIN(a) - Convert the ASCII character in a
;* to binary and shift into shftreg. Returns value
;* in tmp1 incremented if a is not hex.
;*****************
HEXBIN psha
pshb
pshx
bsr UPCASE ; convert to upper case
cmpa #'0'
blt HEXNOT ; jump if a < $30
cmpa #'9'
ble HEXNMB ; jump if 0-9
cmpa #'A'
blt HEXNOT ; jump if $39> a <$41
cmpa #'F'
bgt HEXNOT ; jump if a > $46
adda #$9 ; convert $A-$F
HEXNMB anda #$0F ; convert to binary
ldx #SHFTREG
ldb #4
HEXSHFT asl 1,X ; 2 byte shift through
rol 0,X ; carry bit
decb
bgt HEXSHFT ; shift 4 times
ora 1,X
sta 1,X
bra HEXRTS
HEXNOT inc TMP1 ; indicate not hex
HEXRTS pulx
pulb
pula
rts
;*****************
;* BUFFARG() - Build a hex argument from the
;* contents of the input buffer. Characters are
;* converted to binary and shifted into shftreg
;* until a non-hex character is found. On exit
;* shftreg holds the last four digits read, count
;* holds the number of digits read, ptrbuff points
;* to the first non-hex character read, and A holds
;* that first non-hex character.
;*****************
;*Initialize
;*while((a=readbuff()) not hex)
;* hexbin(a);
;*return();
BUFFARG clr TMP1 ; not hex indicator
clr COUNT ; # or digits
clr SHFTREG
clr SHFTREG+1
jsr WSKIP
BUFFLP jsr READBUFF ; read char
bsr HEXBIN
tst TMP1
bne BUFFRTS ; jump if not hex
inc COUNT
jsr INCBUFF ; move buffer pointer
bra BUFFLP
BUFFRTS rts
;*****************
;* TERMARG() - Build a hex argument from the
;* terminal. Characters are converted to binary
;* and shifted into shftreg until a non-hex character
;* is found. On exit shftreg holds the last four
;* digits read, count holds the number of digits
;* read, and A holds the first non-hex character.
;*****************
;*initialize
;*while((a=inchar()) == hex)
;* if(a = cntlx or del)
;* abort;
;* else
;* hexbin(a); countu1++;
;*return();
TERMARG clr COUNT
clr SHFTREG
clr SHFTREG+1
TERM0 jsr INCHAR
cmpa #CTLX
beq TERM1 ; jump if controlx
cmpa #DEL
bne TERM2 ; jump if not delete
TERM1 jmp MAIN ; abort
TERM2 clr TMP1 ; hex indicator
bsr HEXBIN
tst TMP1
bne TERM3 ; jump if not hex
inc COUNT
bra TERM0
TERM3 rts
;*****************
;* CHGBYT() - If shftreg is not empty, put
;* contents of shftreg at address in X. If X
;* is an address in EEPROM then program it.
;*****************
;*if(count != 0)
;* (x) = a;
CHGBYT tst COUNT
beq CHGBYT4 ; quit if shftreg empty
lda SHFTREG+1 ; get data into a
bsr WRITE
CHGBYT4 rts
;*****************
;* WRITE() - This routine is used to write the
;*contents of A to the address of X. If the
;*address is in EEPROM, it will be programmed
;*and if it is already programmed, it will be
;*byte erased first.
;******************
;*if(X == config) then
;* byte erase config;
;*if(X is eeprom)then
;* if(not erased) then erase;
;* program (x) = A;
;*write (x) = A;
;*if((x) != A) error(rom);
WRITE equ *
cpx #CONFIG
beq WRITE0 ; jump if config
cpx STREE ; start of EE
blo WRITE2 ; jump if not EE
cpx ENDEE ; end of EE
bhi WRITE2 ; jump if not EE
WRITEE pshb ; check if byte erased
ldb 0,X
cmpb #$FF
pulb
beq WRITE1 ; jump if erased
WRITE0 bsr EEBYTE ; byte erase
WRITE1 bsr EEWRIT ; byte program
WRITE2 sta 0,X ; write for non EE
cmpa 0,X
beq WRITE3 ; jump if write ok
pshx
ldx #MSG6 ; "rom"
jsr OUTSTRG
pulx
WRITE3 rts
;*****************
;* EEWRIT(), EEBYTE(), EEBULK() -
;* These routines are used to program and eeprom
;*locations. eewrite programs the address in X with
;*the value in A, eebyte does a byte address at X,
;*and eebulk does a bulk of eeprom. Whether eebulk
;*erases the config or not depends on the address it
;*receives in X.
;****************
EEWRIT equ * ; program one byte at x
pshb
ldb #$02
stb PPROG
sta 0,X
ldb #$03
bra EEPROG
;***
EEBYTE equ * ; byte erase address x
pshb
ldb #$16
stb PPROG
ldb #$FF
stb 0,X
ldb #$17
bra EEPROG
;***
EEBULK equ * ; bulk erase eeprom
pshb
ldb #$06
stb PPROG
sta 0,X ; erase config or not ...
ldb #$07 ; ... depends on X addr
EEPROG bne ACL1
clrb ; fail safe
ACL1 stb PPROG
pulb
;***
DLY10MS equ * ; delay 10ms at E = 2MHz
pshx
ldx #$0D06
DLYLP dex
bne DLYLP
pulx
clr PPROG
rts
;*****************
;* READBUFF() - Read the character in INBUFF
;* pointed at by ptrbuff into A. Returns ptrbuff
;* unchanged.
;*****************
READBUFF pshx
ldx PTR0
lda 0,X
pulx
rts
;*****************
;* INCBUFF(), DECBUFF() - Increment or decrement
;* ptrbuff.
;*****************
INCBUFF pshx
ldx PTR0
inx
bra INCDEC
DECBUFF pshx
ldx PTR0
dex
INCDEC stx PTR0
pulx
rts
;*****************
;* WSKIP() - Read from the INBUFF until a
;* non whitespace (space, comma, tab) character
;* is found. Returns ptrbuff pointing to the
;* first non-whitespace character and a holds
;* that character. WSKIP also compares a to
;* $0D (CR) and cond codes indicating the
;* results of that compare.
;*****************
WSKIP bsr READBUFF ; read character
bsr WCHEK
bne WSKIP1 ; jump if not wspc
bsr INCBUFF ; move pointer
bra WSKIP ; loop
WSKIP1 cmpa #$0D
rts
;*****************
;* WCHEK(a) - Returns z=1 if a holds a
;* whitespace character, else z=0.
;*****************
WCHEK cmpa #$2C ; comma
beq WCHEK1
cmpa #$20 ; space
beq WCHEK1
cmpa #$09 ; tab
WCHEK1 rts
;*****************
;* DCHEK(a) - Returns Z=1 if a = whitespace
;* or carriage return. Else returns z=0.
;*****************
DCHEK bsr WCHEK
beq DCHEK1 ; jump if whitespace
cmpa #$0D
DCHEK1 rts
;*****************
;* CHKABRT() - Checks for a control x or delete
;* from the terminal. If found, the stack is
;* reset and the control is transferred to main.
;* Note that this is an abnormal termination.
;* If the input from the terminal is a control W
;* then this routine keeps waiting until any other
;* character is read.
;*****************
;*a=input();
;*if(a=cntl w) wait until any other key;
;*if(a = cntl x or del) abort;
CHKABRT bsr INPUT
beq CHK4 ; jump if no input
cmpa #CTLW
bne CHK2 ; jump in not cntlw
CHKABRT1 bsr INPUT
beq CHKABRT1 ; jump if no input
CHK2 cmpa #DEL
beq CHK3 ; jump if delete
cmpa #CTLX
beq CHK3 ; jump if control x
cmpa #CTLA
bne CHK4 ; jump not control a
CHK3 jmp MAIN ; abort
CHK4 rts ; return
;**********
;*
;* I/O MODULE
;* Communications with the outside world.
;* 3 I/O routines (INIT, INPUT, and OUTPUT) call
;* drivers specified by IODEV (0=SCI, 1=ACIA,
;* 2=DUARTA, 3=DUARTB).
;*
;**********
;* INIT() - Initialize device specified by iodev.
;*********
;*
INIT equ *
psha ; save registers
pshx
bsr ONSCI ; initialize sci
INIT4 pulx ; restore registers
pula
rts
;**********
;* INPUT() - Read device. Returns a=char or 0.
;* This routine also disarms the cop.
;**********
INPUT equ *
pshx
lda #$55 ; reset cop
sta COPRST
lda #$AA
sta COPRST
bsr INSCI ; read sci
INPUT4 pulx
rts
;**********
;* OUTPUT() - Output character in A.
;* chrcnt indicates the current column on the
;*output display. It is incremented every time
;*a character is outputted, and cleared whenever
;*the subroutine outcrlf is called.
;**********
OUTPUT equ *
psha ; save registers
pshb
pshx
bsr OUTSCI ; write sci
OUTPUT4 pulx
pulb
pula
inc CHRCNT ; increment column count
rts
;**********
;* ONSCI() - Initialize the SCI for 9600
;* baud at 8 MHz Extal.
;**********
ONSCI lda #$30
sta BAUD ; baud register
lda #$00
sta SCCR1
lda #$0C
sta SCCR2 ; enable
rts
;**********
;* INSCI() - Read from SCI. Return a=char or 0.
;**********
INSCI lda SCSR ; read status reg
anda #$20 ; check rdrf
beq INSCI1 ; jump if no data
lda SCDAT ; read data
anda #$7F ; mask parity
INSCI1 rts
;**********
;* OUTSCI() - Output A to sci. IF autolf = 1,
;* cr and lf sent as crlf.
;**********
OUTSCI tst AUTOLF
beq OUTSCI2 ; jump if autolf=0
bsr OUTSCI2
cmpa #$0D
bne OUTSCI1
lda #$0A ; if cr, send lf
bra OUTSCI2
OUTSCI1 cmpa #$0A
bne OUTSCI3
lda #$0D ; if lf, send cr
OUTSCI2 ldb SCSR ; read status
bitb #$80
beq OUTSCI2 ; loop until tdre=1
anda #$7F ; mask parity
sta SCDAT ; send character
OUTSCI3 rts
;*******************************
;*** I/O UTILITY SUBROUTINES ***
;***These subroutines perform the neccesary
;* data I/O operations.
;* OUTLHLF-Convert left 4 bits of A from binary
;* to ASCII and output.
;* OUTRHLF-Convert right 4 bits of A from binary
;* to ASCII and output.
;* OUT1BYT-Convert byte addresed by X from binary
;* to ASCII and output.
;* OUT1BSP-Convert byte addressed by X from binary
;* to ASCII and output followed by a space.
;* OUT2BSP-Convert 2 bytes addressed by X from binary
;* to ASCII and output followed by a space.
;* OUTSPAC-Output a space.
;*
;* OUTCRLF-Output a line feed and carriage return.
;*
;* OUTSTRG-Output the string of ASCII bytes addressed
;* by X until $04.
;* OUTA-Output the ASCII character in A.
;*
;* TABTO-Output spaces until column 20 is reached.
;*
;* INCHAR-Input to A and echo one character. Loops
;* until character read.
;* *******************
;**********
;* OUTRHLF(), OUTLHLF(), OUTA()
;*Convert A from binary to ASCII and output.
;*Contents of A are destroyed..
;**********
OUTLHLF lsra ; shift data to right
lsra
lsra
lsra
OUTRHLF anda #$0F ; mask top half
adda #$30 ; convert to ascii
cmpa #$39
ble OUTA ; jump if 0-9
adda #$07 ; convert to hex A-F
OUTA bra OUTPUT ; output character
; RTS
;**********
;* OUT1BYT(x) - Convert the byte at X to two
;* ASCII characters and output. Return X pointing
;* to next byte.
;**********
OUT1BYT psha
lda 0,X ; get data in a
psha ; save copy
bsr OUTLHLF ; output left half
pula ; retrieve copy
bsr OUTRHLF ; output right half
pula
inx
rts
;**********
;* OUT1BSP(x), OUT2BSP(x) - Output 1 or 2 bytes
;* at x followed by a space. Returns x pointing to
;* next byte.
;**********
OUT2BSP bsr OUT1BYT ; do first byte
OUT1BSP bsr OUT1BYT ; do next byte
OUTSPAC lda #$20 ; output a space
bra OUTPUT
; RTS
;**********
;* OUTCRLF() - Output a Carriage return and
;* a line feed. Returns a = cr.
;**********
OUTCRLF lda #$0D ; cr
bsr OUTPUT ; output a
lda #$00
bsr OUTPUT ; output padding
lda #$0D
clr CHRCNT ; zero the column counter
rts
;**********
;* OUTSTRG(x) - Output string of ASCII bytes
;* starting at x until end of text ($04). Can
;* be paused by control w (any char restarts).
;**********
OUTSTRG bsr OUTCRLF
OUTSTRG0 psha
OUTSTRG1 lda 0,X ; read char into a
cmpa #EOT
beq OUTSTRG3 ; jump if eot
jsr OUTPUT ; output character
inx
jsr INPUT
beq OUTSTRG1 ; jump if no input
cmpa #CTLW
bne OUTSTRG1 ; jump if not cntlw
OUTSTRG2 jsr INPUT
beq OUTSTRG2 ; jump if any input
bra OUTSTRG1
OUTSTRG3 pula
rts
;*********
;* TABTO() - move cursor over to column 20.
;*while(chrcnt < 16) outspac.
TABTO equ *
psha
TABTOLP bsr OUTSPAC
lda CHRCNT
cmpa #20
ble TABTOLP
pula
rts
;**********
;* INCHAR() - Reads input until character sent.
;* Echoes char and returns with a = char.
INCHAR jsr INPUT
tsta
beq INCHAR ; jump if no input
jmp OUTPUT ; echo
; RTS
;*********************
;*** COMMAND TABLE ***
COMTABL equ *
fcb 5
fcc 'ASSEM'
fdb ASSEM
fcb 5
fcc 'BREAK'
fdb BREAK
fcb 4
fcc 'BULK'
fdb BULK
fcb 7
fcc 'BULKALL'
fdb BULKALL
fcb 4
fcc 'CALL'
fdb CALL
fcb 4
fcc 'DUMP'
fdb DUMP
fcb 5
fcc 'EEMOD'
fdb EEMOD
fcb 4
fcc 'FILL'
fdb FILL
fcb 2
fcc 'GO'
fdb GO
fcb 4
fcc 'HELP'
fdb HELP
fcb 4
fcc 'HOST'
fdb HOST
fcb 4
fcc 'LOAD'
fdb LOAD
fcb 6 ; LENGTH OF COMMAND
fcc 'MEMORY' ; ASCII COMMAND
fdb MEMORY ; COMMAND ADDRESS
fcb 4
fcc 'MOVE'
fdb MOVE
fcb 6
fcc 'OFFSET'
fdb OFFSET
fcb 7
fcc 'PROCEED'
fdb PROCEED
fcb 8
fcc 'REGISTER'
fdb REGISTER
fcb 6
fcc 'STOPAT'
fdb STOPAT
fcb 5
fcc 'TRACE'
fdb TRACE
fcb 6
fcc 'VERIFY'
fdb VERIFY
fcb 1
fcc '?' ; initial command
fdb HELP
fcb 5
fcc 'XBOOT'
fdb BOOT
fcb 1 ; dummy command for load
fcc '~'
fdb TILDE
;*
;*** Command names for evm compatability ***
;*
fcb 3
fcc 'ASM'
fdb ASSEM
fcb 2
fcc 'BF'
fdb FILL
fcb 4
fcc 'COPY'
fdb MOVE
fcb 5
fcc 'ERASE'
fdb BULK
fcb 2
fcc 'MD'
fdb DUMP
fcb 2
fcc 'MM'
fdb MEMORY
fcb 2
fcc 'RD'
fdb REGISTER
fcb 2
fcc 'RM'
fdb REGISTER
fcb 4
fcc 'READ'
fdb MOVE
fcb 2
fcc 'TM'
fdb HOST
fcb 4
fcc 'HALT'
fdb HALT
fcb $FF
;*******************
;*** TEXT TABLES ***
MSG1 fcc "Scott's Monitor version 0.1"
fcb EOT
MSG2 fcc 'What?'
fcb EOT
MSG3 fcc 'Too Long'
fcb EOT
MSG4 fcc 'Full'
fcb EOT
MSG5 fcc 'Op- '
fcb EOT
MSG6 fcc 'rom-'
fcb EOT
MSG8 fcc 'Command?'
fcb EOT
MSG9 fcc 'Bad argument'
fcb EOT
MSG10 fcc 'No host port'
fcb EOT
MSG11 fcc 'done'
fcb EOT
MSG12 fcc 'chksum error'
fcb EOT
MSG13 fcc 'error addr '
fcb EOT
MSG14 fcc 'rcvr error'
fcb EOT
;**********
;* break [-][<addr>] . . .
;* Modifies the breakpoint table. More than
;* one argument can be entered on the command
;* line but the table will hold only 4 entries.
;* 4 types of arguments are implied above:
;* break Prints table contents.
;* break <addr> Inserts <addr>.
;* break -<addr> Deletes <addr>.
;* break - Clears all entries.
;**********
;* while 1
;* a = wskip();
;* switch(a)
;* case(cr):
;* bprint(); return;
BREAK jsr WSKIP
bne BRKDEL ; jump if not cr
jmp BPRINT ; print table
; RTS
;* case("-"):
;* incbuff(); readbuff();
;* if(dchek(a)) /* look for wspac or cr */
;* bpclr();
;* breaksw;
;* a = buffarg();
;* if( !dchek(a) ) return(bad argument);
;* b = bpsrch();
;* if(b >= 0)
;* brktabl[b] = 0;
;* breaksw;
BRKDEL cmpa #'-'
bne BRKDEF ; jump if not -
jsr INCBUFF
jsr READBUFF
jsr DCHEK
bne BRKDEL1 ; jump if not delimeter
jsr BPCLR ; clear table
bra BREAK ; do next argument
BRKDEL1 jsr BUFFARG ; get address to delete
jsr DCHEK
beq BRKDEL2 ; jump if delimeter
ldx #MSG9 ; "bad argument"
jmp OUTSTRG
; RTS
BRKDEL2 bsr BPSRCH ; look for addr in table
tstb
bmi BRKDEL3 ; jump if not found
ldx #BRKTABL
abx
clr 0,X ; clear entry
clr 1,X
BRKDEL3 bra BREAK ; do next argument
;* default:
;* a = buffarg();
;* if( !dchek(a) ) return(bad argument);
;* b = bpsrch();
;* if(b < 0) /* not already in table */
;* x = shftreg;
;* shftreg = 0;
;* a = x[0]; x[0] = $3F
;* b = x[0]; x[0] = a;
;* if(b != $3F) return(rom);
;* b = bpsrch(); /* look for hole */
;* if(b >= 0) return(table full);
;* brktabl[b] = x;
;* breaksw;
BRKDEF jsr BUFFARG ; get argument
jsr DCHEK
beq BRKDEF1 ; jump if delimiter
ldx #MSG9 ; "bad argument"
jmp OUTSTRG
; RTS
BRKDEF1 bsr BPSRCH ; look for entry in table
tstb
bge BREAK ; jump if already in table
ldx SHFTREG ; x = new entry addr
lda 0,X ; save original contents
psha
lda #SWI
jsr WRITE ; write to entry addr
ldb 0,X ; read back
pula
jsr WRITE ; restore original
cmpb #SWI
beq BRKDEF2 ; jump if writes ok
stx PTR1 ; save address
ldx #PTR1
jsr OUT2BSP ; print address
bra BPRINT
; RTS
BRKDEF2 clr SHFTREG
clr SHFTREG+1
pshx
bsr BPSRCH ; look for 0 entry
pulx
tstb
bpl BRKDEF3 ; jump if table not full
ldx #MSG4 ; "full"
jsr OUTSTRG
bra BPRINT
; RTS
BRKDEF3 ldy #BRKTABL
aby
stx 0,Y ; put new entry in
jmp BREAK ; do next argument
;**********
;* bprint() - print the contents of the table.
;**********
BPRINT jsr OUTCRLF
ldx #BRKTABL
ldb #4
BPRINT1 jsr OUT2BSP
decb
bgt BPRINT1 ; loop 4 times
rts
;**********
;* bpsrch() - search table for address in
;* shftreg. Returns b = index to entry or
;* b = -1 if not found.
;**********
;*for(b=0; b=6; b=+2)
;* x[] = brktabl + b;
;* if(x[0] = shftreg)
;* return(b);
;*return(-1);
BPSRCH clrb
BPSRCH1 ldx #BRKTABL
abx
ldx 0,X ; get table entry
cpx SHFTREG
bne BPSRCH2 ; jump if no match
rts
BPSRCH2 incb
incb
cmpb #$6
ble BPSRCH1 ; loop 4 times
ldb #$FF
rts
;**********
;* bulk - Bulk erase the eeprom not config.
;* bulkall - Bulk erase eeprom and config.
;*********
BULK equ *
ldx STREE
bra BULK1
BULKALL ldx #CONFIG
BULK1 lda #$FF
jmp EEBULK
; RTS
;**********
;* dump [<addr1> [<addr2>]] - Dump memory
;* in 16 byte lines from <addr1> to <addr2>.
;* Default starting address is "current
;* location" and default number of lines is 8.
;**********
;*ptr1 = ptrmem; /* default start address */
;*ptr2 = ptr1 + $80; /* default end address */
;*a = wskip();
;*if(a != cr)
;* a = buffarg();
;* if(countu1 = 0) return(bad argument);
;* if( !dchek(a) ) return(bad argument);
;* ptr1 = shftreg;
;* ptr2 = ptr1 + $80; /* default end address */
;* a = wskip();
;* if(a != cr)
;* a = buffarg();
;* if(countu1 = 0) return(bad argument);
;* a = wskip();
;* if(a != cr) return(bad argument);
;* ptr2 = shftreg;
DUMP ldx PTRMEM ; current location
stx PTR1 ; default start
ldb #$80
abx
stx PTR2 ; default end
jsr WSKIP
beq DUMP1 ; jump - no arguments
jsr BUFFARG ; read argument
tst COUNT
beq DUMPERR ; jump if no argument
jsr DCHEK
bne DUMPERR ; jump if delimiter
ldx SHFTREG
stx PTR1
ldb #$80
abx
stx PTR2 ; default end address
jsr WSKIP
beq DUMP1 ; jump - 1 argument
jsr BUFFARG ; read argument
tst COUNT
beq DUMPERR ; jump if no argument
jsr WSKIP
bne DUMPERR ; jump if not cr
ldx SHFTREG
stx PTR2
bra DUMP1 ; jump - 2 arguments
DUMPERR ldx #MSG9 ; "bad argument"
jmp OUTSTRG
; RTS
;*ptrmem = ptr1;
;*ptr1 = ptr1 & $fff0;
DUMP1 ldd PTR1
std PTRMEM ; new current location
;* ANDB #$F0
std PTR1 ; start dump at 16 byte boundary
;*** dump loop starts here ***
;*do:
;* output address of first byte;
DUMPLP jsr OUTCRLF
ldx #PTR1
jsr OUT2BSP ; first address
;* copy 16 bytes to buffer
ldx PTR1
ldy #BFR
clrb
DUMPCPY lda 0,X
sta 0,Y
inx
iny
incb
cmpb #$10
blt DUMPCPY
;* x = ptr1;
;* for(b=0; b=16; b++)
;* output contents;
ldx #BFR ; base address
clrb ; loop counter
DUMPDAT jsr OUT1BSP ; hex value loop
incb
cmpb #$08
bne DUMPD1
jsr OUTSPAC ; extra space after 8
DUMPD1 cmpb #$10
blt DUMPDAT ; loop 16 times
;* x = ptr1;
;* for(b=0; b=16; b++)
;* a = x[b];
;* if($7A < a < $20) a = $20;
;* output ascii contents;
clrb ; loop counter
DUMPASC ldx #BFR ; base address
abx
lda ,X ; ascii value loop
cmpa #$20
blo DUMP3 ; jump if non printable
cmpa #$7A
bls DUMP4 ; jump if printable
DUMP3 lda #$20 ; space for non printables
DUMP4 jsr OUTPUT ; output ascii value
incb
cmpb #$10
blt DUMPASC ; loop 16 times
;* chkabrt();
;* ptr1 = ptr1 + $10;
;*while(ptr1 <= ptr2);
;*return;
jsr CHKABRT ; check abort or wait
ldd PTR1
addd #$10 ; point to next 16 byte bound
std PTR1 ; update ptr1
cpd PTR2
bhi DUMP5 ; quit if ptr1 > ptr2
cpd #$00 ; check wraparound at $ffff
bne DUMPLP ; jump - no wraparound
ldd PTR2
cpd #$FFF0
blo DUMPLP ; upper bound not at top
DUMP5 rts ; quit
;**********
;* eemod [<addr1> [<addr2>]]
;* Modifies the eeprom address range.
;* EEMOD -show ee address range
;* EEMOD <addr1> -set range to addr1 -> addr1+2k
;* EEMOD <addr1> <addr2> -set range to addr1 -> addr2
;**********
;*if(<addr1>)
;* stree = addr1;
;* endee = addr1 + 2k bytes;
;*if(<addr2>)
;* endee = addr2;
;*print(stree,endee);
EEMOD equ *
jsr WSKIP
beq EEMOD2 ; jump - no arguments
jsr BUFFARG ; read argument
tst COUNT
beq EEMODER ; jump if no argument
jsr DCHEK
bne EEMODER ; jump if no delimeter
ldd SHFTREG
std PTR1
addd #$07FF ; add 2k bytes to stree
std PTR2 ; default endee address
jsr WSKIP
beq EEMOD1 ; jump - 1 argument
jsr BUFFARG ; read argument
tst COUNT
beq EEMODER ; jump if no argument
jsr WSKIP
bne EEMODER ; jump if not cr
ldx SHFTREG
stx PTR2
EEMOD1 ldx PTR1
stx STREE ; new stree address
ldx PTR2
stx ENDEE ; new endee address
EEMOD2 jsr OUTCRLF ; display ee range
ldx #STREE
jsr OUT2BSP
ldx #ENDEE
jmp OUT2BSP
; RTS
EEMODER ldx #MSG9 ; "bad argument"
jmp OUTSTRG
; RTS
;**********
;* fill <addr1> <addr2> [<data>] - Block fill
;*memory from addr1 to addr2 with data. Data
;*defaults to $FF.
;**********
;*get addr1 and addr2
FILL equ *
jsr WSKIP
jsr BUFFARG
tst COUNT
beq FILLERR ; jump if no argument
jsr WCHEK
bne FILLERR ; jump if bad argument
ldx SHFTREG
stx PTR1 ; address1
jsr WSKIP
jsr BUFFARG
tst COUNT
beq FILLERR ; jump if no argument
jsr DCHEK
bne FILLERR ; jump if bad argument
ldx SHFTREG
stx PTR2 ; address2
;*Get data if it exists
lda #$FF
sta TMP2 ; default data
jsr WSKIP
beq FILL1 ; jump if default data
jsr BUFFARG
tst COUNT
beq FILLERR ; jump if no argument
jsr WSKIP
bne FILLERR ; jump if bad argument
lda SHFTREG+1
sta TMP2
;*while(ptr1 <= ptr2)
;* *ptr1 = data
;* if(*ptr1 != data) abort
FILL1 equ *
jsr CHKABRT ; check for abort
ldx PTR1 ; starting address
lda TMP2 ; data
jsr WRITE ; write the data to x
cmpa 0,X
bne FILLBAD ; jump if no write
cpx PTR2
beq FILL2 ; quit yet?
inx
stx PTR1
bra FILL1 ; loop
FILL2 rts
FILLERR ldx #MSG9 ; "bad argument"
jmp OUTSTRG
; RTS
FILLBAD equ *
ldx #PTR1 ; output bad address
jmp OUT2BSP
; RTS
;*******************************************
;* MEMORY [<addr>]
;* [<addr>]/
;* Opens memory and allows user to modify the
;*contents at <addr> or the last opened location.
;* Subcommands:
;* [<data>]<cr> - Close current location and exit.
;* [<data>]<lf><+> - Close current and open next.
;* [<data>]<^><-><bs> - Close current and open previous.
;* [<data>]<sp> - Close current and open next.
;* [<data>]</><=> - Reopen current location.
;* The contents of the current location is only
;* changed if valid data is entered before each
;* subcommand.
;* [<addr>]O - Compute relative offset from current
;* location to <addr>. The current location must
;* be the address of the offset byte.
;**********
;*a = wskip();
;*if(a != cr)
;* a = buffarg();
;* if(a != cr) return(bad argument);
;* if(countu1 != 0) ptrmem[] = shftreg;
MEMORY jsr WSKIP
beq MEM1 ; jump if cr
jsr BUFFARG
jsr WSKIP
beq MSLASH ; jump if cr
ldx #MSG9 ; "bad argument"
jmp OUTSTRG
; RTS
MSLASH tst COUNT
beq MEM1 ; jump if no argument
ldx SHFTREG
stx PTRMEM ; update "current location"
;**********
;* Subcommands
;**********
;*outcrlf();
;*out2bsp(ptrmem[]);
;*out1bsp(ptrmem[0]);
MEM1 jsr OUTCRLF
MEM2 ldx #PTRMEM
jsr OUT2BSP ; output address
MEM3 ldx PTRMEM
jsr OUT1BSP ; output contents
clr SHFTREG
clr SHFTREG+1
;*while 1
;*a = termarg();
;* switch(a)
;* case(space):
;* chgbyt();
;* ptrmem[]++;
;* if(ptrmem%16 == 0) start new line;
;* case(linefeed | +):
;* chgbyt();
;* ptrmem[]++;
;* case(up arrow | backspace | -):
;* chgbyt();
;* ptrmem[]--;
;* case('/' | '='):
;* chgbyt();
;* outcrlf();
;* case(O):
;* d = ptrmem[0] - (shftreg);
;* if($80 < d < $ff81)
;* print(out of range);
;* countt1 = d-1;
;* out1bsp(countt1);
;* case(carriage return):
;* chgbyt();
;* return;
;* default: return(command?)
MEM4 jsr TERMARG
jsr UPCASE
ldx PTRMEM
cmpa #$20
beq MEMSP ; jump if space
cmpa #$0A
beq MEMLF ; jump if linefeed
cmpa #$2B
beq MEMPLUS ; jump if +
cmpa #$5E
beq MEMUA ; jump if up arrow
cmpa #$2D
beq MEMUA ; jump if -
cmpa #$08
beq MEMUA ; jump if backspace
cmpa #'/'
beq MEMSL ; jump if /
cmpa #'='
beq MEMSL ; jump if =
cmpa #'O'
beq MEMOFF ; jump if O
cmpa #$0D
beq MEMCR ; jump if carriage ret
cmpa #'.'
beq MEMEND ; jump if .
ldx #MSG8 ; "command?"
jsr OUTSTRG
bra MEM1
MEMSP jsr CHGBYT
inx
stx PTRMEM
xgdx
andb #$0F
beq MEMSP1 ; jump if mod16=0
bra MEM3 ; continue same line
MEMSP1 bra MEM1 ; .. else start new line
MEMLF jsr CHGBYT
inx
stx PTRMEM
bra MEM2 ; output next address
MEMPLUS jsr CHGBYT
inx
stx PTRMEM
bra MEM1 ; output cr, next address
MEMUA jsr CHGBYT
dex
stx PTRMEM
bra MEM1 ; output cr, previous address
MEMSL jsr CHGBYT
bra MEM1 ; output cr, same address
MEMOFF ldd SHFTREG ; destination addr
subd PTRMEM
cmpa #$0
bne MEMOFF1 ; jump if not 0
cmpb #$80
bls MEMOFF3 ; jump if in range
bra MEMOFF2 ; out of range
MEMOFF1 cmpa #$FF
bne MEMOFF2 ; out of range
cmpb #$81
bhs MEMOFF3 ; in range
MEMOFF2 ldx #MSG3 ; "Too long"
jsr OUTSTRG
jmp MEM1 ; output cr, addr, contents
MEMOFF3 subd #$1 ; b now has offset
stb TMP4
jsr OUTSPAC
ldx #TMP4
jsr OUT1BSP ; output offset
jmp MEM1 ; output cr, addr, contents
MEMCR jsr CHGBYT
MEMEND rts ; exit task
;**********
;* move <src1> <src2> [<dest>] - move
;*block at <src1> to <src2> to <dest>.
;* Moves block 1 byte up if no <dest>.
;**********
;*a = buffarg();
;*if(countu1 = 0) return(bad argument);
;*if( !wchek(a) ) return(bad argument);
;*ptr1 = shftreg; /* src1 */
MOVE equ *
jsr BUFFARG
tst COUNT
beq MOVERR ; jump if no arg
jsr WCHEK
bne MOVERR ; jump if no delim
ldx SHFTREG ; src1
stx PTR1
;*a = buffarg();
;*if(countu1 = 0) return(bad argument);
;*if( !dchek(a) ) return(bad argument);
;*ptr2 = shftreg; /* src2 */
jsr BUFFARG
tst COUNT
beq MOVERR ; jump if no arg
jsr DCHEK
bne MOVERR ; jump if no delim
ldx SHFTREG ; src2
stx PTR2
;*a = buffarg();
;*a = wskip();
;*if(a != cr) return(bad argument);
;*if(countu1 != 0) tmp2 = shftreg; /* dest */
;*else tmp2 = ptr1 + 1;
jsr BUFFARG
jsr WSKIP
bne MOVERR ; jump if not cr
tst COUNT
beq MOVE1 ; jump if no arg
ldx SHFTREG ; dest
bra MOVE2
MOVERR ldx #MSG9 ; "bad argument"
jmp OUTSTRG
; RTS
MOVE1 ldx PTR1
inx ; default dest
MOVE2 stx PTR3
;*if(src1 < dest <= src2)
;* dest = dest+(src2-src1);
;* for(x = src2; x = src1; x--)
;* dest[0]-- = x[0]--;
ldx PTR3 ; dest
cpx PTR1 ; src1
bls MOVE3 ; jump if dest =< src1
cpx PTR2 ; src2
bhi MOVE3 ; jump if dest > src2
ldd PTR2
subd PTR1
addd PTR3
std PTR3 ; dest = dest+(src2-src1)
ldx PTR2
MOVELP1 jsr CHKABRT ; check for abort
lda ,X ; char at src2
pshx
ldx PTR3
jsr WRITE ; write a to x
cmpa 0,X
bne MOVEBAD ; jump if no write
dex
stx PTR3
pulx
cpx PTR1
beq MOVRTS
dex
bra MOVELP1 ; Loop SRC2 - SRC1 times
;*
;* else
;* for(x=src1; x=src2; x++)
;* dest[0]++ = x[0]++;
MOVE3 ldx PTR1 ; srce1
MOVELP2 jsr CHKABRT ; check for abort
lda ,X
pshx
ldx PTR3 ; dest
jsr WRITE ; write a to x
cmpa 0,X
bne MOVEBAD ; jump if no write
inx
stx PTR3
pulx
cpx PTR2
beq MOVRTS
inx
bra MOVELP2 ; Loop SRC2-SRC1 times
MOVRTS rts
MOVEBAD pulx ; restore stack
ldx #PTR3
jmp OUT2BSP ; output bad address
; RTS
;****************
;* assem(addr) -68HC11 line assembler/disassembler.
;* This routine will disassemble the opcode at
;*<addr> and then allow the user to enter a line for
;*assembly. Rules for assembly are as follows:
;* -A '#' sign indicates immediate addressing.
;* -A ',' (comma) indicates indexed addressing
;* and the next character must be X or Y.
;* -All arguments are assumed to be hex and the
;* '$' sign shouldn't be used.
;* -Arguments should be separated by 1 or more
;* spaces or tabs.
;* -Any input after the required number of
;* arguments is ignored.
;* -Upper or lower case makes no difference.
;*
;* To signify end of input line, the following
;*commands are available and have the indicated action:
;* <cr> - Finds the next opcode for
;* assembly. If there was no assembly input,
;* the next opcode disassembled is retrieved
;* from the disassembler.
;* <lf><+> - Works the same as carriage return
;* except if there was no assembly input, the
;* <addr> is incremented and the next <addr> is
;* disassembled.
;* <^><-> - Decrements <addr> and the previous
;* address is then disassembled.
;* </><=> - Redisassembles the current address.
;*
;* To exit the assembler use CONTROL A or . (period).
;*Of course control X and DEL will also allow you to abort.
;*** Equates for assembler ***
PAGE1 equ $00 ; values for page opcodes
PAGE2 equ $18
PAGE3 equ $1A
PAGE4 equ $CD
IMMED equ $0 ; addressing modes
INDX equ $1
INDY equ $2
LIMMED equ $3 ; (long immediate)
OTHER equ $4
;*** Rename variables for assem/disassem ***
AMODE equ TMP2 ; addressing mode
YFLAG equ TMP3
PNORM equ TMP4 ; page for normal opcode
OLDPC equ PTR8
PC equ PTR1 ; program counter
PX equ PTR2 ; page for x indexed
PY equ PTR2+1 ; page for y indexed
BASEOP equ PTR3 ; base opcode
CLASS equ PTR3+1 ; class
DISPC equ PTR4 ; pc for disassembler
BRADDR equ PTR5 ; relative branch offset
MNEPTR equ PTR6 ; pointer to table for dis
ASSCOMM equ PTR7 ; subcommand for assembler
;*** Error messages for assembler ***
MSGDIR fdb MSGA1 ; message table index
fdb MSGA2
fdb MSGA3
fdb MSGA4
fdb MSGA5
fdb MSGA6
fdb MSGA7
fdb MSGA8
fdb MSGA9
MSGA1 fcc 'Immed mode illegal'
fcb EOT
MSGA2 fcc 'Error in Mne table'
fcb EOT
MSGA3 fcc 'Illegal bit op'
fcb EOT
MSGA4 fcc 'Bad argument'
fcb EOT
MSGA5 fcc 'Mnemonic not found'
fcb EOT
MSGA6 fcc 'Unknown addressing mode'
fcb EOT
MSGA7 fcc 'Indexed addressing assumed'
fcb EOT
MSGA8 fcc 'Syntax error'
fcb EOT
MSGA9 fcc 'Branch out of range'
fcb EOT
;**********
;*oldpc = rambase;
;*a = wskip();
;*if (a != cr)
;* buffarg()
;* a = wskip();
;* if ( a != cr ) return(error);
;* oldpc = a;
ASSEM equ *
ldx #RAMBS
stx OLDPC
jsr WSKIP
beq ASSLOOP ; jump if no argument
jsr BUFFARG
jsr WSKIP
beq ASSEM1 ; jump if argument ok
ldx #MSGA4 ; "bad argument"
jmp OUTSTRG
; RTS
ASSEM1 ldx SHFTREG
stx OLDPC
;*repeat
;* pc = oldpc;
;* out2bsp(pc);
;* disassem();
;* a=readln();
;* asscomm = a; /* save command */
;* if(a == [^,+,-,/,=]) outcrlf;
;* if(a == 0) return(error);
ASSLOOP ldx OLDPC
stx PC
jsr OUTCRLF
ldx #PC
jsr OUT2BSP ; output the address
jsr DISASSM ; disassemble opcode
jsr TABTO
lda #PROMPT ; prompt user
jsr OUTA ; output prompt character
jsr READLN ; read input for assembly
sta ASSCOMM
cmpa #'^'
beq ASSLP0 ; jump if '^'
cmpa #'+'
beq ASSLP0 ; jump if '+'
cmpa #'-'
beq ASSLP0 ; jump if '-'
cmpa #'/'
beq ASSLP0 ; jump if '/'
cmpa #'='
beq ASSLP0 ; jump if '='
cmpa #$00
bne ASSLP1 ; jump if none of above
rts ; return if bad input
ASSLP0 jsr OUTCRLF
ASSLP1 equ * ; come here for cr or lf
jsr OUTSPAC
jsr OUTSPAC
jsr OUTSPAC
jsr OUTSPAC
jsr OUTSPAC
;* b = parse(input); /* get mnemonic */
;* if(b > 5) print("not found"); asscomm='/';
;* elseif(b >= 1)
;* msrch();
;* if(class==$FF)
;* print("not found"); asscomm='/';
;* else
;* a = doop(opcode,class);
;* if(a == 0) dispc=0;
;* else process error; asscomm='/';
jsr PARSE
cmpb #$5
ble ASSLP2 ; jump if mnemonic <= 5 chars
ldx #MSGA5 ; "mnemonic not found"
jsr OUTSTRG
bra ASSLP5
ASSLP2 equ *
cmpb #$0
beq ASSLP10 ; jump if no input
jsr MSRCH
lda CLASS
cmpa #$FF
bne ASSLP3
ldx #MSGA5 ; "mnemonic not found"
jsr OUTSTRG
bra ASSLP5
ASSLP3 jsr DOOP
cmpa #$00
bne ASSLP4 ; jump if doop error
ldx #$00
stx DISPC ; indicate good assembly
bra ASSLP10
ASSLP4 deca ; a = error message index
tab
ldx #MSGDIR
abx
abx
ldx 0,X
jsr OUTSTRG ; output error message
ASSLP5 clr ASSCOMM ; error command
;* /* compute next address - asscomm holds subcommand
;* and dispc indicates if valid assembly occured. */
;* if(asscomm== ^ or -) oldpc--;
;* if(asscomm==(lf or + or cr)
;* if(dispc==0) oldpc=pc; /* good assembly */
;* else
;* if(asscomm==lf or +) dispc= ++oldpc;
;* oldpc=dispc;
;*until(eot)
ASSLP10 equ *
lda ASSCOMM
cmpa #'^'
beq ASSLPA ; jump if '^'
cmpa #'-'
bne ASSLP11 ; jump not '-'
ASSLPA ldx OLDPC ; back up for '^' or '-'
dex
stx OLDPC
bra ASSLP15
ASSLP11 cmpa #$0A
beq ASSLP12 ; jump if linefeed
cmpa #'+'
beq ASSLP12 ; jump if '+'
cmpa #$0D
bne ASSLP15 ; jump if not cr
ASSLP12 ldx DISPC
bne ASSLP13 ; jump if dispc != 0
ldx PC
stx OLDPC
bra ASSLP15
ASSLP13 cmpa #$0A
beq ASSLPB ; jump not lf
cmpa #'+'
bne ASSLP14 ; jump not lf or '+'
ASSLPB ldx OLDPC
inx
stx DISPC
ASSLP14 ldx DISPC
stx OLDPC
ASSLP15 jmp ASSLOOP
;****************
;* readln() --- Read input from terminal into buffer
;* until a command character is read (cr,lf,/,^).
;* If more chars are typed than the buffer will hold,
;* the extra characters are overwritten on the end.
;* On exit: b=number of chars read, a=0 if quit,
;* else a=next command.
;****************
;*for(b==0;b<=bufflng;b++) inbuff[b] = cr;
READLN clrb
lda #$0D ; carriage ret
RLN0 ldx #INBUFF
abx
sta 0,X ; initialize input buffer
incb
cmpb #BUFFLNG
blt RLN0
;*b=0;
;*repeat
;* if(a == (ctla, cntlc, cntld, cntlx, del))
;* return(a=0);
;* if(a == backspace)
;* if(b > 0) b--;
;* else b=0;
;* else inbuff[b] = upcase(a);
;* if(b < bufflng) b++;
;*until (a == [cr,lf,+,^,-,/,=])
;*return(a);
clrb
RLN1 jsr INCHAR
cmpa #DEL ; Delete
beq RLNQUIT
cmpa #CTLX ; Control X
beq RLNQUIT
cmpa #CTLA ; Control A
beq RLNQUIT
cmpa #$2E ; Period
beq RLNQUIT
cmpa #$03 ; Control C
beq RLNQUIT
cmpa #$04 ; Control D
beq RLNQUIT
cmpa #$08 ; backspace
bne RLN2
decb
bgt RLN1
bra READLN ; start over
RLN2 ldx #INBUFF
abx
jsr UPCASE
sta 0,X ; put char in buffer
cmpb #BUFFLNG ; max buffer length
bge RLN3 ; jump if buffer full
incb ; move buffer pointer
RLN3 bsr ASSCHEK ; check for subcommand
bne RLN1
rts
RLNQUIT clra ; quit
rts ; return
;**********
;* parse() -parse out the mnemonic from INBUFF
;* to COMBUFF. on exit: b=number of chars parsed.
;**********
;*combuff[3] = <space>; initialize 4th character to space.
;*ptrbuff[] = inbuff[];
;*a=wskip();
;*for (b = 0; b = 5; b++)
;* a=readbuff(); incbuff();
;* if (a = (cr,lf,^,/,wspace)) return(b);
;* combuff[b] = upcase(a);
;*return(b);
PARSE lda #$20
sta COMBUFF+3
ldx #INBUFF ; initialize buffer ptr
stx PTR0
jsr WSKIP ; find first character
clrb
PARSLP jsr READBUFF ; read character
jsr INCBUFF
jsr WCHEK
beq PARSRT ; jump if whitespace
bsr ASSCHEK
beq PARSRT ; jump if end of line
jsr UPCASE ; convert to upper case
ldx #COMBUFF
abx
sta 0,X ; store in combuff
incb
cmpb #$5
ble PARSLP ; loop 6 times
PARSRT rts
;****************
;* asschek() -perform compares for
;* lf, cr, ^, /, +, -, =
;****************
ASSCHEK cmpa #$0A ; linefeed
beq ASSCHK1
cmpa #$0D ; carriage ret
beq ASSCHK1
cmpa #'^' ; up arrow
beq ASSCHK1
cmpa #'/' ; slash
beq ASSCHK1
cmpa #'+' ; plus
beq ASSCHK1
cmpa #'-' ; minus
beq ASSCHK1
cmpa #'=' ; equals
ASSCHK1 rts
;*********
;* msrch() --- Search MNETABL for mnemonic in COMBUFF.
;*stores base opcode at baseop and class at class.
;* Class = FF if not found.
;**********
;*while ( != EOF )
;* if (COMBUFF[0-3] = MNETABL[0-3])
;* return(MNETABL[4],MNETABL[5]);
;* else *MNETABL =+ 6
MSRCH ldx #MNETABL ; pointer to mnemonic table
ldy #COMBUFF ; pointer to string
bra MSRCH1
MSNEXT equ *
ldb #6
abx ; point to next table entry
MSRCH1 lda 0,X ; read table
cmpa #EOT
bne MSRCH2 ; jump if not end of table
lda #$FF
sta CLASS ; FF = not in table
rts
MSRCH2 cmpa 0,Y ; op[0] = tabl[0] ?
bne MSNEXT
lda 1,X
cmpa 1,Y ; op[1] = tabl[1] ?
bne MSNEXT
lda 2,X
cmpa 2,Y ; op[2] = tabl[2] ?
bne MSNEXT
lda 3,X
cmpa 3,Y ; op[2] = tabl[2] ?
bne MSNEXT
ldd 4,X ; opcode, class
sta BASEOP
stb CLASS
rts
;**********
;** doop(baseop,class) --- process mnemonic.
;** on exit: a=error code corresponding to error
;** messages.
;**********
;*amode = OTHER; /* addressing mode */
;*yflag = 0; /* ynoimm, nlimm, and cpd flag */
;*x[] = ptrbuff[]
DOOP equ *
lda #OTHER
sta AMODE ; mode
clr YFLAG
ldx PTR0
;*while (*x != end of buffer)
;* if (x[0]++ == ',')
;* if (x[0] == 'y') amode = INDY;
;* else amod = INDX;
;* break;
;*a = wskip()
;*if( a == '#' ) amode = IMMED;
DOPLP1 cpx #ENDBUFF ; (end of buffer)
beq DOOP1 ; jump if end of buffer
ldd 0,X ; read 2 chars from buffer
inx ; move pointer
cmpa #','
bne DOPLP1
cmpb #'Y' ; look for ",y"
bne DOPLP2
lda #INDY
sta AMODE
bra DOOP1
DOPLP2 cmpb #'X' ; look for ",x"
bne DOOP1 ; jump if not x
lda #INDX
sta AMODE
DOOP1 jsr WSKIP
cmpa #'#' ; look for immediate mode
bne DOOP2
jsr INCBUFF ; point at argument
lda #IMMED
sta AMODE
DOOP2 equ *
;*switch(class)
ldb CLASS
cmpb #P2INH
bne DOSW1
bra DOP2I
DOSW1 cmpb #INH
bne DOSW2
bra DOINH
DOSW2 cmpb #REL
bne DOSW3
bra DOREL
DOSW3 cmpb #LIMM
bne DOSW4
jmp DOLIM
DOSW4 cmpb #NIMM
bne DOSW5
jmp DONOI
DOSW5 cmpb #GEN
bne DOSW6
jmp DOGENE
DOSW6 cmpb #GRP2
bne DOSW7
jmp DOGRP
DOSW7 cmpb #CPD
bne DOSW8
jmp DOCPD
DOSW8 cmpb #XNIMM
bne DOSW9
jmp DOXNOI
DOSW9 cmpb #XLIMM
bne DOSW10
jmp DOXLI
DOSW10 cmpb #YNIMM
bne DOSW11
jmp DOYNOI
DOSW11 cmpb #YLIMM
bne DOSW12
jmp DOYLI
DOSW12 cmpb #BTB
bne DOSW13
jmp DOBTB
DOSW13 cmpb #SETCLR
bne DODEF
jmp DOSET
;* default: return("error in mnemonic table");
DODEF lda #$2
rts
;* case P2INH: emit(PAGE2)
DOP2I lda #PAGE2
jsr EMIT
;* case INH: emit(baseop);
;* return(0);
DOINH lda BASEOP
jsr EMIT
clra
rts
;* case REL: a = assarg();
;* if(a=4) return(a);
;* d = address - pc + 2;
;* if ($7f >= d >= $ff82)
;* return (out of range);
;* emit(opcode);
;* emit(offset);
;* return(0);
DOREL jsr ASSARG
cmpa #$04
bne DOREL1 ; jump if arg ok
rts
DOREL1 ldd SHFTREG ; get branch address
ldx PC ; get program counter
inx
inx ; point to end of opcode
stx BRADDR
subd BRADDR ; calculate offset
std BRADDR ; save result
cmpd #$7F ; in range ?
bls DOREL2 ; jump if in range
cmpd #$FF80
bhs DOREL2 ; jump if in range
lda #$09 ; 'Out of range'
rts
DOREL2 lda BASEOP
jsr EMIT ; emit opcode
lda BRADDR+1
jsr EMIT ; emit offset
clra ; normal return
rts
;* case LIMM: if (amode == IMMED) amode = LIMMED;
DOLIM lda AMODE
cmpa #IMMED
bne DONOI
lda #LIMMED
sta AMODE
;* case NIMM: if (amode == IMMED)
;* return("Immediate mode illegal");
DONOI lda AMODE
cmpa #IMMED
bne DOGENE ; jump if not immediate
lda #$1 ; "immediate mode illegal"
rts
;* case GEN: dogen(baseop,amode,PAGE1,PAGE1,PAGE2);
;* return;
DOGENE lda #PAGE1
sta PNORM
sta PX
lda #PAGE2
sta PY
jmp DOGEN
; RTS
;* case GRP2: if (amode == INDY)
;* emit(PAGE2);
;* amode = INDX;
;* if( amode == INDX )
;* doindx(baseop);
;* else a = assarg();
;* if(a=4) return(a);
;* emit(opcode+0x10);
;* emit(extended address);
;* return;
DOGRP lda AMODE
cmpa #INDY
bne DOGRP1
lda #PAGE2
jsr EMIT
lda #INDX
sta AMODE
DOGRP1 equ *
lda AMODE
cmpa #INDX
bne DOGRP2
jmp DOINDEX
; RTS
DOGRP2 equ *
lda BASEOP
adda #$10
jsr EMIT
jsr ASSARG
cmpa #$04
beq DOGRPRT ; jump if bad arg
ldd SHFTREG ; extended address
jsr EMIT
tba
jsr EMIT
clra
DOGRPRT rts
;* case CPD: if (amode == IMMED)
;* amode = LIMMED; /* cpd */
;* if( amode == INDY ) yflag = 1;
;* dogen(baseop,amode,PAGE3,PAGE3,PAGE4);
;* return;
DOCPD lda AMODE
cmpa #IMMED
bne DOCPD1
lda #LIMMED
sta AMODE
DOCPD1 lda AMODE
cmpa #INDY
bne DOCPD2
inc YFLAG
DOCPD2 lda #PAGE3
sta PNORM
sta PX
lda #PAGE4
sta PY
jmp DOGEN
; RTS
;* case XNIMM: if (amode == IMMED) /* stx */
;* return("Immediate mode illegal");
DOXNOI lda AMODE
cmpa #IMMED
bne DOXLI
lda #1 ; "immediate mode illegal"
rts
;* case XLIMM: if (amode == IMMED) /* cpx, ldx */
;* amode = LIMMED;
;* dogen(baseop,amode,PAGE1,PAGE1,PAGE4);
;* return;
DOXLI lda AMODE
cmpa #IMMED
bne DOXLI1
lda #LIMMED
sta AMODE
DOXLI1 lda #PAGE1
sta PNORM
sta PX
lda #PAGE4
sta PY
jmp DOGEN
; RTS
;* case YNIMM: if (amode == IMMED) /* sty */
;* return("Immediate mode illegal");
DOYNOI lda AMODE
cmpa #IMMED
bne DOYLI
lda #$1 ; "immediate mode illegal"
rts
;* case YLIMM: if (amode == INDY) yflag = 1;/* cpy, ldy */
;* if(amode == IMMED) amode = LIMMED;
;* dogen(opcode,amode,PAGE2,PAGE3,PAGE2);
;* return;
DOYLI lda AMODE
cmpa #INDY
bne DOYLI1
inc YFLAG
DOYLI1 cmpa #IMMED
bne DOYLI2
lda #LIMMED
sta AMODE
DOYLI2 lda #PAGE2
sta PNORM
sta PY
lda #PAGE3
sta PX
jmp DOGEN
; RTS
;* case BTB: /* bset, bclr */
;* case SETCLR: a = bitop(baseop,amode,class);
;* if(a=0) return(a = 3);
;* if( amode == INDY )
;* emit(PAGE2);
;* amode = INDX;
DOBTB equ *
DOSET bsr BITOP
cmpa #$00
bne DOSET1
lda #$3 ; "illegal bit op"
rts
DOSET1 lda AMODE
cmpa #INDY
bne DOSET2
lda #PAGE2
jsr EMIT
lda #INDX
sta AMODE
DOSET2 equ *
;* emit(baseop);
;* a = assarg();
;* if(a = 4) return(a);
;* emit(index offset);
;* if( amode == INDX )
;* Buffptr += 2; /* skip ,x or ,y */
lda BASEOP
jsr EMIT
jsr ASSARG
cmpa #$04
bne DOSET22 ; jump if arg ok
rts
DOSET22 lda SHFTREG+1 ; index offset
jsr EMIT
lda AMODE
cmpa #INDX
bne DOSET3
jsr INCBUFF
jsr INCBUFF
DOSET3 equ *
;* a = assarg();
;* if(a = 4) return(a);
;* emit(mask); /* mask */
;* if( class == SETCLR )
;* return;
jsr ASSARG
cmpa #$04
bne DOSET33 ; jump if arg ok
rts
DOSET33 lda SHFTREG+1 ; mask
jsr EMIT
lda CLASS
cmpa #SETCLR
bne DOSET4
clra
rts
DOSET4 equ *
;* a = assarg();
;* if(a = 4) return(a);
;* d = (pc+1) - shftreg;
;* if ($7f >= d >= $ff82)
;* return (out of range);
;* emit(branch offset);
;* return(0);
jsr ASSARG
cmpa #$04
bne DOSET5 ; jump if arg ok
rts
DOSET5 ldx PC ; program counter
inx ; point to next inst
stx BRADDR ; save pc value
ldd SHFTREG ; get branch address
subd BRADDR ; calculate offset
cmpd #$7F
bls DOSET6 ; jump if in range
cmpd #$FF80
bhs DOSET6 ; jump if in range
clra
jsr EMIT
lda #$09 ; 'out of range'
rts
DOSET6 tba ; offset
jsr EMIT
clra
rts
;**********
;** bitop(baseop,amode,class) --- adjust opcode on bit
;** manipulation instructions. Returns opcode in a
;** or a = 0 if error
;**********
;*if( amode == INDX || amode == INDY ) return(op);
;*if( class == SETCLR ) return(op-8);
;*else if(class==BTB) return(op-12);
;*else fatal("bitop");
BITOP equ *
lda AMODE
ldb CLASS
cmpa #INDX
bne BITOP1
rts
BITOP1 cmpa #INDY
bne BITOP2 ; jump not indexed
rts
BITOP2 cmpb #SETCLR
bne BITOP3 ; jump not bset,bclr
lda BASEOP ; get opcode
suba #8
sta BASEOP
rts
BITOP3 cmpb #BTB
bne BITOP4 ; jump not bit branch
lda BASEOP ; get opcode
suba #12
sta BASEOP
rts
BITOP4 clra ; 0 = fatal bitop
rts
;**********
;** dogen(baseop,mode,pnorm,px,py) - process
;** general addressing modes. Returns a = error #.
;**********
;*pnorm = page for normal addressing modes: IMM,DIR,EXT
;*px = page for INDX addressing
;*py = page for INDY addressing
;*switch(amode)
DOGEN lda AMODE
cmpa #LIMMED
beq DOGLIM
cmpa #IMMED
beq DOGIMM
cmpa #INDY
beq DOGINDY
cmpa #INDX
beq DOGINDX
cmpa #OTHER
beq DOGOTH
;*default: error("Unknown Addressing Mode");
DOGDEF lda #$06 ; unknown addre...
rts
;*case LIMMED: epage(pnorm);
;* emit(baseop);
;* a = assarg();
;* if(a = 4) return(a);
;* emit(2 bytes);
;* return(0);
DOGLIM lda PNORM
jsr EPAGE
DOGLIM1 lda BASEOP
jsr EMIT
jsr ASSARG ; get next argument
cmpa #$04
bne DOGLIM2 ; jump if arg ok
rts
DOGLIM2 ldd SHFTREG
jsr EMIT
tba
jsr EMIT
clra
rts
;*case IMMED: epage(pnorm);
;* emit(baseop);
;* a = assarg();
;* if(a = 4) return(a);
;* emit(lobyte);
;* return(0);
DOGIMM lda PNORM
jsr EPAGE
lda BASEOP
jsr EMIT
bsr ASSARG
cmpa #$04
bne DOGIMM1 ; jump if arg ok
rts
DOGIMM1 lda SHFTREG+1
jsr EMIT
clra
rts
;*case INDY: epage(py);
;* a=doindex(op+0x20);
;* return(a);
DOGINDY lda PY
jsr EPAGE
lda BASEOP
adda #$20
sta BASEOP
bra DOINDEX
; RTS
;*case INDX: epage(px);
;* a=doindex(op+0x20);
;* return(a);
DOGINDX lda PX
bsr EPAGE
lda BASEOP
adda #$20
sta BASEOP
bra DOINDEX
; RTS
;*case OTHER: a = assarg();
;* if(a = 4) return(a);
;* epage(pnorm);
;* if(countu1 <= 2 digits) /* direct */
;* emit(op+0x10);
;* emit(lobyte(Result));
;* return(0);
;* else emit(op+0x30); /* extended */
;* eword(Result);
;* return(0)
DOGOTH bsr ASSARG
cmpa #4
bne DOGOTH0 ; jump if arg ok
rts
DOGOTH0 lda PNORM
bsr EPAGE
lda COUNT
cmpa #$2
bgt DOGOTH1
lda BASEOP
adda #$10 ; direct mode opcode
bsr EMIT
lda SHFTREG+1
bsr EMIT
clra
rts
DOGOTH1 lda BASEOP
adda #$30 ; extended mode opcode
bsr EMIT
ldd SHFTREG
bsr EMIT
tba
bsr EMIT
clra
rts
;**********
;** doindex(op) --- handle all wierd stuff for
;** indexed addressing. Returns a = error number.
;**********
;*emit(baseop);
;*a=assarg();
;*if(a = 4) return(a);
;*if( a != ',' ) return("Syntax");
;*buffptr++
;*a=readbuff()
;*if( a != 'x' && != 'y') warn("Ind Addr Assumed");
;*emit(lobyte);
;*return(0);
DOINDEX lda BASEOP
bsr EMIT
bsr ASSARG
cmpa #$04
bne DOINDX0 ; jump if arg ok
rts
DOINDX0 cmpa #','
beq DOINDX1
lda #$08 ; "syntax error"
rts
DOINDX1 jsr INCBUFF
jsr READBUFF
cmpa #'Y'
beq DOINDX2
cmpa #'X'
beq DOINDX2
ldx MSGA7 ; "index addr assumed"
jsr OUTSTRG
DOINDX2 lda SHFTREG+1
bsr EMIT
clra
rts
;**********
;** assarg(); - get argument. Returns a = 4 if bad
;** argument, else a = first non hex char.
;**********
;*a = buffarg()
;*if(asschk(aa) && countu1 != 0) return(a);
;*return(bad argument);
ASSARG jsr BUFFARG
jsr ASSCHEK ; check for command
beq ASSARG1 ; jump if ok
jsr WCHEK ; check for whitespace
bne ASSARG2 ; jump if not ok
ASSARG1 tst COUNT
beq ASSARG2 ; jump if no argument
rts
ASSARG2 lda #$04 ; bad argument
rts
;**********
;** epage(a) --- emit page prebyte
;**********
;*if( a != PAGE1 ) emit(a);
EPAGE cmpa #PAGE1
bne EMIT
rts
;**********
;* emit(a) --- emit contents of a
;**********
EMIT ldx PC
jsr WRITE ; write a to x
jsr OUT1BSP
stx PC
rts
;*Mnemonic table for hc11 line assembler
NULL equ $0 ; nothing
INH equ $1 ; inherent
P2INH equ $2 ; page 2 inherent
GEN equ $3 ; general addressing
GRP2 equ $4 ; group 2
REL equ $5 ; relative
IMM equ $6 ; immediate
NIMM equ $7 ; general except for immediate
LIMM equ $8 ; 2 byte immediate
XLIMM equ $9 ; longimm for x
XNIMM equ $10 ; no immediate for x
YLIMM equ $11 ; longimm for y
YNIMM equ $12 ; no immediate for y
BTB equ $13 ; bit test and branch
SETCLR equ $14 ; bit set or clear
CPD equ $15 ; compare d
BTBD equ $16 ; bit test and branch direct
SETCLRD equ $17 ; bit set or clear direct
;**********
;* mnetabl - includes all '11 mnemonics, base opcodes,
;* and type of instruction. The assembler search routine
;*depends on 4 characters for each mnemonic so that 3 char
;*mnemonics are extended with a space and 5 char mnemonics
;*are truncated.
;**********
MNETABL equ *
fcc 'ABA ' ; Mnemonic
fcb $1B ; Base opcode
fcb INH ; Class
fcc 'ABX '
fcb $3A
fcb INH
fcc 'ABY '
fcb $3A
fcb P2INH
fcc 'ADCA'
fcb $89
fcb GEN
fcc 'ADCB'
fcb $C9
fcb GEN
fcc 'ADDA'
fcb $8B
fcb GEN
fcc 'ADDB'
fcb $CB
fcb GEN
fcc 'ADDD'
fcb $C3
fcb LIMM
fcc 'ANDA'
fcb $84
fcb GEN
fcc 'ANDB'
fcb $C4
fcb GEN
fcc 'ASL '
fcb $68
fcb GRP2
fcc 'ASLA'
fcb $48
fcb INH
fcc 'ASLB'
fcb $58
fcb INH
fcc 'ASLD'
fcb $05
fcb INH
fcc 'ASR '
fcb $67
fcb GRP2
fcc 'ASRA'
fcb $47
fcb INH
fcc 'ASRB'
fcb $57
fcb INH
fcc 'BCC '
fcb $24
fcb REL
fcc 'BCLR'
fcb $1D
fcb SETCLR
fcc 'BCS '
fcb $25
fcb REL
fcc 'BEQ '
fcb $27
fcb REL
fcc 'BGE '
fcb $2C
fcb REL
fcc 'BGT '
fcb $2E
fcb REL
fcc 'BHI '
fcb $22
fcb REL
fcc 'BHS '
fcb $24
fcb REL
fcc 'BITA'
fcb $85
fcb GEN
fcc 'BITB'
fcb $C5
fcb GEN
fcc 'BLE '
fcb $2F
fcb REL
fcc 'BLO '
fcb $25
fcb REL
fcc 'BLS '
fcb $23
fcb REL
fcc 'BLT '
fcb $2D
fcb REL
fcc 'BMI '
fcb $2B
fcb REL
fcc 'BNE '
fcb $26
fcb REL
fcc 'BPL '
fcb $2A
fcb REL
fcc 'BRA '
fcb $20
fcb REL
fcc 'BRCL' ; (BRCLR)
fcb $1F
fcb BTB
fcc 'BRN '
fcb $21
fcb REL
fcc 'BRSE' ; (BRSET)
fcb $1E
fcb BTB
fcc 'BSET'
fcb $1C
fcb SETCLR
fcc 'BSR '
fcb $8D
fcb REL
fcc 'BVC '
fcb $28
fcb REL
fcc 'BVS '
fcb $29
fcb REL
fcc 'CBA '
fcb $11
fcb INH
fcc 'CLC '
fcb $0C
fcb INH
fcc 'CLI '
fcb $0E
fcb INH
fcc 'CLR '
fcb $6F
fcb GRP2
fcc 'CLRA'
fcb $4F
fcb INH
fcc 'CLRB'
fcb $5F
fcb INH
fcc 'CLV '
fcb $0A
fcb INH
fcc 'CMPA'
fcb $81
fcb GEN
fcc 'CMPB'
fcb $C1
fcb GEN
fcc 'COM '
fcb $63
fcb GRP2
fcc 'COMA'
fcb $43
fcb INH
fcc 'COMB'
fcb $53
fcb INH
fcc 'CPD '
fcb $83
fcb CPD
fcc 'CPX '
fcb $8C
fcb XLIMM
fcc 'CPY '
fcb $8C
fcb YLIMM
fcc 'DAA '
fcb $19
fcb INH
fcc 'DEC '
fcb $6A
fcb GRP2
fcc 'DECA'
fcb $4A
fcb INH
fcc 'DECB'
fcb $5A
fcb INH
fcc 'DES '
fcb $34
fcb INH
fcc 'DEX '
fcb $09
fcb INH
fcc 'DEY '
fcb $09
fcb P2INH
fcc 'EORA'
fcb $88
fcb GEN
fcc 'EORB'
fcb $C8
fcb GEN
fcc 'FDIV'
fcb $03
fcb INH
fcc 'IDIV'
fcb $02
fcb INH
fcc 'INC '
fcb $6C
fcb GRP2
fcc 'INCA'
fcb $4C
fcb INH
fcc 'INCB'
fcb $5C
fcb INH
fcc 'INS '
fcb $31
fcb INH
fcc 'INX '
fcb $08
fcb INH
fcc 'INY '
fcb $08
fcb P2INH
fcc 'JMP '
fcb $6E
fcb GRP2
fcc 'JSR '
fcb $8D
fcb NIMM
fcc 'LDAA'
fcb $86
fcb GEN
fcc 'LDAB'
fcb $C6
fcb GEN
fcc 'LDD '
fcb $CC
fcb LIMM
fcc 'LDS '
fcb $8E
fcb LIMM
fcc 'LDX '
fcb $CE
fcb XLIMM
fcc 'LDY '
fcb $CE
fcb YLIMM
fcc 'LSL '
fcb $68
fcb GRP2
fcc 'LSLA'
fcb $48
fcb INH
fcc 'LSLB'
fcb $58
fcb INH
fcc 'LSLD'
fcb $05
fcb INH
fcc 'LSR '
fcb $64
fcb GRP2
fcc 'LSRA'
fcb $44
fcb INH
fcc 'LSRB'
fcb $54
fcb INH
fcc 'LSRD'
fcb $04
fcb INH
fcc 'MUL '
fcb $3D
fcb INH
fcc 'NEG '
fcb $60
fcb GRP2
fcc 'NEGA'
fcb $40
fcb INH
fcc 'NEGB'
fcb $50
fcb INH
fcc 'NOP '
fcb $01
fcb INH
fcc 'ORAA'
fcb $8A
fcb GEN
fcc 'ORAB'
fcb $CA
fcb GEN
fcc 'PSHA'
fcb $36
fcb INH
fcc 'PSHB'
fcb $37
fcb INH
fcc 'PSHX'
fcb $3C
fcb INH
fcc 'PSHY'
fcb $3C
fcb P2INH
fcc 'PULA'
fcb $32
fcb INH
fcc 'PULB'
fcb $33
fcb INH
fcc 'PULX'
fcb $38
fcb INH
fcc 'PULY'
fcb $38
fcb P2INH
fcc 'ROL '
fcb $69
fcb GRP2
fcc 'ROLA'
fcb $49
fcb INH
fcc 'ROLB'
fcb $59
fcb INH
fcc 'ROR '
fcb $66
fcb GRP2
fcc 'RORA'
fcb $46
fcb INH
fcc 'RORB'
fcb $56
fcb INH
fcc 'RTI '
fcb $3B
fcb INH
fcc 'RTS '
fcb $39
fcb INH
fcc 'SBA '
fcb $10
fcb INH
fcc 'SBCA'
fcb $82
fcb GEN
fcc 'SBCB'
fcb $C2
fcb GEN
fcc 'SEC '
fcb $0D
fcb INH
fcc 'SEI '
fcb $0F
fcb INH
fcc 'SEV '
fcb $0B
fcb INH
fcc 'STAA'
fcb $87
fcb NIMM
fcc 'STAB'
fcb $C7
fcb NIMM
fcc 'STD '
fcb $CD
fcb NIMM
fcc 'STOP'
fcb $CF
fcb INH
fcc 'STS '
fcb $8F
fcb NIMM
fcc 'STX '
fcb $CF
fcb XNIMM
fcc 'STY '
fcb $CF
fcb YNIMM
fcc 'SUBA'
fcb $80
fcb GEN
fcc 'SUBB'
fcb $C0
fcb GEN
fcc 'SUBD'
fcb $83
fcb LIMM
fcc 'SWI '
fcb $3F
fcb INH
fcc 'TAB '
fcb $16
fcb INH
fcc 'TAP '
fcb $06
fcb INH
fcc 'TBA '
fcb $17
fcb INH
fcc 'TPA '
fcb $07
fcb INH
fcc 'TEST'
fcb $00
fcb INH
fcc 'TST '
fcb $6D
fcb GRP2
fcc 'TSTA'
fcb $4D
fcb INH
fcc 'TSTB'
fcb $5D
fcb INH
fcc 'TSX '
fcb $30
fcb INH
fcc 'TSY '
fcb $30
fcb P2INH
fcc 'TXS '
fcb $35
fcb INH
fcc 'TYS '
fcb $35
fcb P2INH
fcc 'WAI '
fcb $3E
fcb INH
fcc 'XGDX'
fcb $8F
fcb INH
fcc 'XGDY'
fcb $8F
fcb P2INH
fcc 'BRSE' ; bit direct modes for
fcb $12 ; disassembler.
fcb BTBD
fcc 'BRCL'
fcb $13
fcb BTBD
fcc 'BSET'
fcb $14
fcb SETCLRD
fcc 'BCLR'
fcb $15
fcb SETCLRD
fcb EOT ; End of table
;**********************************************
PG1 equ $0
PG2 equ $1
PG3 equ $2
PG4 equ $3
;******************
;*disassem() - disassemble the opcode.
;******************
;*(check for page prebyte)
;*baseop=pc[0];
;*pnorm=PG1;
;*if(baseop==$18) pnorm=PG2;
;*if(baseop==$1A) pnorm=PG3;
;*if(baseop==$CD) pnorm=PG4;
;*if(pnorm != PG1) dispc=pc+1;
;*else dispc=pc; (dispc points to next byte)
DISASSM equ *
ldx PC ; address
lda 0,X ; opcode
ldb #PG1
cmpa #$18
beq DISP2 ; jump if page2
cmpa #$1A
beq DISP3 ; jump if page3
cmpa #$CD
bne DISP1 ; jump if not page4
DISP4 incb ; set up page value
DISP3 incb
DISP2 incb
inx
DISP1 stx DISPC ; point to opcode
stb PNORM ; save page
;*If(opcode == ($00-$5F or $8D or $8F or $CF))
;* if(pnorm == (PG3 or PG4))
;* disillop(); return();
;* b=disrch(opcode,NULL);
;* if(b==0) disillop(); return();
lda 0,X ; get current opcode
sta BASEOP
inx
stx DISPC ; point to next byte
cmpa #$5F
bls DIS1 ; jump if in range
cmpa #$8D
beq DIS1 ; jump if bsr
cmpa #$8F
beq DIS1 ; jump if xgdx
cmpa #$CF
beq DIS1 ; jump if stop
jmp DISGRP ; try next part of map
DIS1 ldb PNORM
cmpb #PG3
blo DIS2 ; jump if page 1 or 2
jmp DISILLOP ; "illegal opcode"
; RTS
DIS2 ldb BASEOP ; opcode
clrb ; class=null
jsr DISRCH
tstb
bne DISPEC ; jump if opcode found
jmp DISILLOP ; "illegal opcode"
; RTS
;* if(opcode==$8D) dissrch(opcode,REL);
;* if(opcode==($8F or $CF)) disrch(opcode,INH);
DISPEC lda BASEOP
cmpa #$8D
bne DISPEC1
ldb #REL
bra DISPEC3 ; look for BSR opcode
DISPEC1 cmpa #$8F
beq DISPEC2 ; jump if XGDX opcode
cmpa #$CF
bne DISINH ; jump not STOP opcode
DISPEC2 ldb #INH
DISPEC3 jsr DISRCH ; find other entry in table
;* if(class==INH) /* INH */
;* if(pnorm==PG2)
;* b=disrch(baseop,P2INH);
;* if(b==0) disillop(); return();
;* prntmne();
;* return();
DISINH equ *
ldb CLASS
cmpb #INH
bne DISREL ; jump if not inherent
ldb PNORM
cmpb #PG1
beq DISINH1 ; jump if page1
lda BASEOP ; get opcode
ldb #P2INH ; class=p2inh
jsr DISRCH
tstb
bne DISINH1 ; jump if found
jmp DISILLOP ; "illegal opcode"
; RTS
DISINH1 jmp PRNTMNE
; RTS
;* elseif(class=REL) /* REL */
;* if(pnorm != PG1)
;* disillop(); return();
;* prntmne();
;* disrelad();
;* return();
DISREL equ *
ldb CLASS
cmpb #REL
bne DISBTD
tst PNORM
beq DISREL1 ; jump if page1
jmp DISILLOP ; "illegal opcode"
; RTS
DISREL1 jsr PRNTMNE ; output mnemonic
jmp DISRELAD ; compute relative address
; RTS
;* else /* SETCLR,SETCLRD,BTB,BTBD */
;* if(class == (SETCLRD or BTBD))
;* if(pnorm != PG1)
;* disillop(); return(); /* illop */
;* prntmne(); /* direct */
;* disdir(); /* output $byte */
;* else (class == (SETCLR or BTB))
;* prntmne(); /* indexed */
;* disindx();
;* outspac();
;* disdir();
;* outspac();
;* if(class == (BTB or BTBD))
;* disrelad();
;* return();
DISBTD equ *
ldb CLASS
cmpb #SETCLRD
beq DISBTD1
cmpb #BTBD
bne DISBIT ; jump not direct bitop
DISBTD1 tst PNORM
beq DISBTD2 ; jump if page 1
jmp DISILLOP
; RTS
DISBTD2 jsr PRNTMNE
jsr DISDIR ; operand(direct)
bra DISBIT1
DISBIT equ *
jsr PRNTMNE
jsr DISINDX ; operand(indexed)
DISBIT1 jsr OUTSPAC
jsr DISDIR ; mask
ldb CLASS
cmpb #BTB
beq DISBIT2 ; jump if btb
cmpb #BTBD
bne DISBIT3 ; jump if not bit branch
DISBIT2 jsr DISRELAD ; relative address
DISBIT3 rts
;*Elseif($60 <= opcode <= $7F) /* GRP2 */
;* if(pnorm == (PG3 or PG4))
;* disillop(); return();
;* if((pnorm==PG2) and (opcode != $6x))
;* disillop(); return();
;* b=disrch(baseop & $6F,NULL);
;* if(b==0) disillop(); return();
;* prntmne();
;* if(opcode == $6x)
;* disindx();
;* else
;* disext();
;* return();
DISGRP equ *
cmpa #$7F ; a=opcode
bhi DISNEXT ; try next part of map
ldb PNORM
cmpb #PG3
blo DISGRP2 ; jump if page 1 or 2
jmp DISILLOP ; "illegal opcode"
; RTS
DISGRP2 anda #$6F ; mask bit 4
clrb ; class=null
jsr DISRCH
tstb
bne DISGRP3 ; jump if found
jmp DISILLOP ; "illegal opcode"
; RTS
DISGRP3 jsr PRNTMNE
lda BASEOP ; get opcode
anda #$F0
cmpa #$60
bne DISGRP4 ; jump if not 6x
jmp DISINDX ; operand(indexed)
; RTS
DISGRP4 jmp DISEXT ; operand(extended)
; RTS
;*Else ($80 <= opcode <= $FF)
;* if(opcode == ($87 or $C7))
;* disillop(); return();
;* b=disrch(opcode&$CF,NULL);
;* if(b==0) disillop(); return();
DISNEXT equ *
cmpa #$87 ; a=opcode
beq DISNEX1
cmpa #$C7
bne DISNEX2
DISNEX1 jmp DISILLOP ; "illegal opcode"
; RTS
DISNEX2 anda #$CF
clrb ; class=null
jsr DISRCH
tstb
bne DISNEW ; jump if mne found
jmp DISILLOP ; "illegal opcode"
; RTS
;* if(opcode&$CF==$8D) disrch(baseop,NIMM; (jsr)
;* if(opcode&$CF==$8F) disrch(baseop,NIMM; (sts)
;* if(opcode&$CF==$CF) disrch(baseop,XNIMM; (stx)
;* if(opcode&$CF==$83) disrch(baseop,LIMM); (subd)
DISNEW lda BASEOP
anda #$CF
cmpa #$8D
bne DISNEW1 ; jump not jsr
ldb #NIMM
bra DISNEW4
DISNEW1 cmpa #$8F
bne DISNEW2 ; jump not sts
ldb #NIMM
bra DISNEW4
DISNEW2 cmpa #$CF
bne DISNEW3 ; jump not stx
ldb #XNIMM
bra DISNEW4
DISNEW3 cmpa #$83
bne DISGEN ; jump not subd
ldb #LIMM
DISNEW4 bsr DISRCH
tstb
bne DISGEN ; jump if found
jmp DISILLOP ; "illegal opcode"
; RTS
;* if(class == (GEN or NIMM or LIMM )) /* GEN,NIMM,LIMM,CPD */
;* if(opcode&$CF==$83)
;* if(pnorm==(PG3 or PG4)) disrch(opcode#$CF,CPD)
;* class=LIMM;
;* if((pnorm == (PG2 or PG4) and (opcode != ($Ax or $Ex)))
;* disillop(); return();
;* disgenrl();
;* return();
DISGEN ldb CLASS ; get class
cmpb #GEN
beq DISGEN1
cmpb #NIMM
beq DISGEN1
cmpb #LIMM
bne DISXLN ; jump if other class
DISGEN1 lda BASEOP
anda #$CF
cmpa #$83
bne DISGEN3 ; jump if not #$83
ldb PNORM
cmpb #PG3
blo DISGEN3 ; jump not pg3 or 4
ldb #CPD
bsr DISRCH ; look for cpd mne
ldb #LIMM
stb CLASS ; set class to limm
DISGEN3 ldb PNORM
cmpb #PG2
beq DISGEN4 ; jump if page 2
cmpb #PG4
bne DISGEN5 ; jump not page 2 or 4
DISGEN4 lda BASEOP
anda #$B0 ; mask bits 6,3-0
cmpa #$A0
beq DISGEN5 ; jump if $Ax or $Ex
jmp DISILLOP ; "illegal opcode"
; RTS
DISGEN5 jmp DISGENRL ; process general class
; RTS
;* else /* XLIMM,XNIMM,YLIMM,YNIMM */
;* if(pnorm==(PG2 or PG3))
;* if(class==XLIMM) disrch(opcode&$CF,YLIMM);
;* else disrch(opcode&$CF,YNIMM);
;* if((pnorm == (PG3 or PG4))
;* if(opcode != ($Ax or $Ex))
;* disillop(); return();
;* class=LIMM;
;* disgen();
;* return();
DISXLN ldb PNORM
cmpb #PG2
beq DISXLN1 ; jump if page2
cmpb #PG3
bne DISXLN4 ; jump not page3
DISXLN1 lda BASEOP
anda #$CF
ldb CLASS
cmpb #XLIMM
bne DISXLN2
ldb #YLIMM
bra DISXLN3 ; look for ylimm
DISXLN2 ldb #YNIMM ; look for ynimm
DISXLN3 bsr DISRCH
DISXLN4 ldb PNORM
cmpb #PG3
blo DISXLN5 ; jump if page 1 or 2
lda BASEOP ; get opcode
anda #$B0 ; mask bits 6,3-0
cmpa #$A0
beq DISXLN5 ; jump opcode = $Ax or $Ex
jmp DISILLOP ; "illegal opcode"
; RTS
DISXLN5 ldb #LIMM
stb CLASS
bra DISGENRL ; process general class
; RTS
;******************
;*disrch(a=opcode,b=class)
;*return b=0 if not found
;* else mneptr=points to mnemonic
;* class=class of opcode
;******************
;*x=#MNETABL
;*while(x[0] != eot)
;* if((opcode==x[4]) && ((class=NULL) || (class=x[5])))
;* mneptr=x;
;* class=x[5];
;* return(1);
;* x += 6;
;*return(0); /* not found */
DISRCH equ *
ldx #MNETABL ; point to top of table
DISRCH1 cmpa 4,X ; test opcode
bne DISRCH3 ; jump not this entry
tstb
beq DISRCH2 ; jump if class=null
cmpb 5,X ; test class
bne DISRCH3 ; jump not this entry
DISRCH2 ldb 5,X
stb CLASS
stx MNEPTR ; return ptr to mnemonic
incb
rts ; return found
DISRCH3 pshb ; save class
ldb #6
abx
ldb 0,X
cmpb #EOT ; test end of table
pulb
bne DISRCH1
clrb
rts ; return not found
;******************
;*prntmne() - output the mnemonic pointed
;*at by mneptr.
;******************
;*outa(mneptr[0-3]);
;*outspac;
;*return();
PRNTMNE equ *
ldx MNEPTR
lda 0,X
jsr OUTA ; output char1
lda 1,X
jsr OUTA ; output char2
lda 2,X
jsr OUTA ; output char3
lda 3,X
jsr OUTA ; output char4
jmp OUTSPAC
; RTS
;******************
;*disindx() - process indexed mode
;******************
;*disdir();
;*outa(',');
;*if(pnorm == (PG2 or PG4)) outa('Y');
;*else outa('X');
;*return();
DISINDX equ *
bsr DISDIR ; output $byte
lda #','
jsr OUTA ; output ,
ldb PNORM
cmpb #PG2
beq DISIND1 ; jump if page2
cmpb #PG4
bne DISIND2 ; jump if not page4
DISIND1 lda #'Y'
bra DISIND3
DISIND2 lda #'X'
DISIND3 jmp OUTA ; output x or y
; RTS
;******************
;*disrelad() - compute and output relative address.
;******************
;* braddr = dispc[0] + (dispc++);( 2's comp arith)
;*outa('$');
;*out2bsp(braddr);
;*return();
DISRELAD equ *
ldx DISPC
ldb 0,X ; get relative offset
inx
stx DISPC
tstb
bmi DISRLD1 ; jump if negative
abx
bra DISRLD2
DISRLD1 dex
incb
bne DISRLD1 ; subtract
DISRLD2 stx BRADDR ; save address
jsr OUTSPAC
lda #'$'
jsr OUTA
ldx #BRADDR
jmp OUT2BSP ; output address
; RTS
;******************
;*disgenrl() - output data for the general cases which
;*includes immediate, direct, indexed, and extended modes.
;******************
;*prntmne();
;*if(baseop == ($8x or $Cx)) /* immediate */
;* outa('#');
;* disdir();
;* if(class == LIMM)
;* out1byt(dispc++);
;*elseif(baseop == ($9x or $Dx)) /* direct */
;* disdir();
;*elseif(baseop == ($Ax or $Ex)) /* indexed */
;* disindx();
;*else (baseop == ($Bx or $Fx)) /* extended */
;* disext();
;*return();
DISGENRL equ *
bsr PRNTMNE ; print mnemonic
lda BASEOP ; get opcode
anda #$B0 ; mask bits 6,3-0
cmpa #$80
bne DISGRL2 ; jump if not immed
lda #'#' ; do immediate
jsr OUTA
bsr DISDIR
ldb CLASS
cmpb #LIMM
beq DISGRL1 ; jump class = limm
rts
DISGRL1 ldx DISPC
jsr OUT1BYT
stx DISPC
rts
DISGRL2 cmpa #$90
bne DISGRL3 ; jump not direct
bra DISDIR ; do direct
; RTS
DISGRL3 cmpa #$A0
bne DISEXT ; jump not indexed
bra DISINDX ; do extended
; RTS
;*****************
;*disdir() - output "$ next byte"
;*****************
DISDIR equ *
lda #'$'
jsr OUTA
ldx DISPC
jsr OUT1BYT
stx DISPC
rts
;*****************
;*disext() - output "$ next 2 bytes"
;*****************
DISEXT equ *
lda #'$'
jsr OUTA
ldx DISPC
jsr OUT2BSP
stx DISPC
rts
;*****************
;*disillop() - output "illegal opcode"
;*****************
DISMSG1 fcc 'ILLOP'
fcb EOT
DISILLOP equ *
pshx
ldx #DISMSG1
jsr OUTSTRG0 ; no cr
pulx
rts
;**********
;* help - List buffalo commands to terminal.
;**********
HELP equ *
ldx #HELPMSG1
jmp OUTSTRG ; print help screen
; RTS
HELPMSG1 equ *
fcc 'ASM [<addr>] Line asm/disasm'
fcb $0D
fcc ' [/,=] Same addr, [^,-] Prev addr, [+,CTLJ] Next addr'
fcb $0D
fcc ' [CR] Next opcode, [CTLA,.] Quit'
fcb $0D
fcc 'BF <addr1> <addr2> [<data>] Block fill memory'
fcb $0D
fcc 'BR [-][<addr>] Set up bkpt table'
fcb $0D
fcc 'BULK Erase EEPROM, BULKALL Erase EEPROM and CONFIG'
fcb $0D
fcc 'CALL [<addr>] Call subroutine'
fcb $0D
fcc 'GO [<addr>] Execute code at addr, PROCEED Continue execution'
fcb $0D
fcc 'EEMOD [<addr> [<addr>]] Modify EEPROM range'
fcb $0D
fcc 'LOAD, VERIFY [T] <host dwnld command> Load or verify S-records'
fcb $0D
fcc 'MD [<addr1> [<addr2>]] Memory dump'
fcb $0D
fcc 'MM [<addr>] or [<addr>]/ Memory Modify'
fcb $0D
fcc ' [/,=] Same addr, [^,-,CTLH] Prev addr, [+,CTLJ,SPACE] Next addr'
fcb $0D
fcc ' <addr>O Compute offset, [CR] Quit'
fcb $0D
fcc 'MOVE <s1> <s2> [<d>] Block move'
fcb $0D
fcc 'OFFSET [-]<arg> Offset for download'
fcb $0D
fcc 'RM [P,Y,X,A,B,C,S] Register modify'
fcb $0D
fcc 'STOPAT <addr> Trace until addr'
fcb $0D
fcc 'T [<n>] Trace n instructions'
fcb $0D
fcc 'TM Transparent mode (CTLA = exit, CTLB = send brk)'
fcb $0D
fcc 'HALT Stops processor (must reset to continue)'
fcb $0D
fcc '[CTLW] Wait, [CTLX,DEL] Abort [CR] Repeat last cmd'
fcb $0D
fcb 4
;**********
;* call [<addr>] - Execute a jsr to <addr> or user
;*pc value. Return to monitor via rts or breakpoint.
;**********
;*a = wskip();
;*if(a != cr)
;* a = buffarg();
;* a = wskip();
;* if(a != cr) return(bad argument)
;* pc = shftreg;
CALL jsr WSKIP
beq CALL3 ; jump if no arg
jsr BUFFARG
jsr WSKIP
beq CALL2 ; jump if cr
ldx #MSG9 ; "bad argument"
jmp OUTSTRG
; RTS
CALL2 ldx SHFTREG
stx REGS ; pc = <addr>
;*put return address on user stack
;*setbps();
;*restack(); /* restack and go*/
CALL3 ldx SP
dex ; user stack pointer
ldd #RETURN ; return address
std 0,X
dex
stx SP ; new user stack pointer
bsr SETBPS
clr TMP2 ; 1=go, 0=call
jmp RESTACK ; go to user code
;**********
;* return() - Return here from rts after
;*call command.
;**********
RETURN psha ; save a register
tpa
sta REGS+8 ; cc register
sei ; mask interrupts
pula
std REGS+6 ; a and b registers
stx REGS+4 ; x register
sty REGS+2 ; y register
sts SP ; user stack pointer
lds PTR2 ; monitor stack pointer
jsr REMBPS ; remove breakpoints
jsr OUTCRLF
jmp RPRINT ; print user registers
; RTS
;**********
;* proceed - Same as go except it ignores
;*a breakpoint at the first opcode. Calls
;*runone for the first instruction only.
;**********
PROCEED equ *
jsr RUNONE ; run one instruction
jsr CHKABRT ; check for abort
clr TMP2 ; flag for breakpoints
inc TMP2 ; 1=go 0=call
bsr SETBPS
jmp RESTACK ; go execute
;**********
;* go [<addr>] - Execute starting at <addr> or
;*user's pc value. Executes an rti to user code.
;*Returns to monitor via an swi through swiin.
;**********
;*a = wskip();
;*if(a != cr)
;* a = buffarg();
;* a = wskip();
;* if(a != cr) return(bad argument)
;* pc = shftreg;
;*setbps();
;*restack(); /* restack and go*/
GO jsr WSKIP
beq GO2 ; jump if no arg
jsr BUFFARG
jsr WSKIP
beq GO1 ; jump if cr
ldx #MSG9 ; "bad argument"
jmp OUTSTRG
; RTS
GO1 ldx SHFTREG
stx REGS ; pc = <addr>
GO2 clr TMP2
inc TMP2 ; 1=go, 0=call
bsr SETBPS
jmp RESTACK ; go to user code
;*****
;** SWIIN - Breakpoints from go or call commands enter here.
;*Remove breakpoints, save user registers, return
SWIIN equ * ; swi entry point
tsx ; user sp -> x
lds PTR2 ; restore monitor sp
jsr SAVSTACK ; save user regs
bsr REMBPS ; remove breakpoints from code
ldx REGS
dex
stx REGS ; save user pc value
;*if(call command) remove call return addr from user stack;
tst TMP2 ; 1=go, 0=call
bne GO3 ; jump if go command
ldx SP ; remove return address
inx ; user stack pointer
inx
stx SP
GO3 jsr OUTCRLF ; print register values
jmp RPRINT
; RTS done
;**********
;* setbps - Replace user code with swi's at
;*breakpoint addresses.
;**********
;*for(b=0; b=6; b =+ 2)
;* x = brktabl[b];
;* if(x != 0)
;* optabl[b] = x[0];
;* x[0] = $3F;
;*Put monitor SWI vector into jump table
SETBPS clrb
SETBPS1 ldx #BRKTABL
ldy #PTR4
abx
aby
ldx 0,X ; breakpoint table entry
beq SETBPS2 ; jump if 0
lda 0,X ; save user opcode
sta 0,Y
lda #SWI
jsr WRITE ; insert swi into code
SETBPS2 addb #$2
cmpb #$6
ble SETBPS1 ; loop 4 times
ldx JSWI+1
stx PTR3 ; save user swi vector
lda #$7E ; jmp opcode
sta JSWI
ldx #SWIIN
stx JSWI+1 ; monitor swi vector
rts
;**********
;* rembps - Remove breakpoints from user code.
;**********
;*for(b=0; b=6; b =+ 2)
;* x = brktabl[b];
;* if(x != 0)
;* x[0] = optabl[b];
;*Replace user's SWI vector
REMBPS clrb
REMBPS1 ldx #BRKTABL
ldy #PTR4
abx
aby
ldx 0,X ; breakpoint table entry
beq REMBPS2 ; jump if 0
lda 0,Y
jsr WRITE ; restore user opcode
REMBPS2 addb #$2
cmpb #$6
ble REMBPS1 ; loop 4 times
ldx PTR3 ; restore user swi vector
stx JSWI+1
rts
;**********
;* trace <n> - Trace n instructions starting
;*at user's pc value. n is a hex number less than
;*$FF (defaults to 1).
;**********
;*a = wskip();
;*if(a != cr)
;* a = buffarg(); a = wskip();
;* if(a != cr) return(bad argument);
;* countt1 = n
TRACE clr TMP4
inc TMP4 ; default count=1
clr CHRCNT ; set up for display
jsr WSKIP
beq TRACE2 ; jump if cr
jsr BUFFARG
jsr WSKIP
beq TRACE1 ; jump if cr
ldx #MSG9 ; "bad argument"
jmp OUTSTRG
; RTS
TRACE1 lda SHFTREG+1 ; n
sta TMP4
;*Disassemble the line about to be traced
TRACE2 equ *
ldb TMP4
pshb
ldx REGS
stx PTR1 ; pc value for disass
jsr DISASSM
pulb
stb TMP4
;*run one instruction
;*rprint();
;*while(count > 0) continue trace;
bsr RUNONE
jsr CHKABRT ; check for abort
jsr TABTO ; print registers for
jsr RPRINT ; result of trace
dec TMP4
beq TRACDON ; quit if count=0
TRACE3 jsr OUTCRLF
bra TRACE2
TRACDON rts
;**********
;* stopat <addr> - Trace instructions until <addr>
;*is reached.
;**********
;*if((a=wskip) != cr)
;* a = buffarg(); a = wskip();
;* if(a != cr) return(bad argument);
;*else return(bad argument);
STOPAT equ *
jsr WSKIP
beq STOPGO ; jump if cr - no argument
jsr BUFFARG
jsr WSKIP
beq STOPAT1 ; jump if cr
ldx #MSG9 ; "bad argument"
jmp OUTSTRG
; RTS
STOPAT1 tst COUNT
beq STOPGO ; jump if no argument
ldx SHFTREG
stx PTRMEM ; update "current location"
;*while(!(ptrmem <= userpc < ptrmem+10)) runone();
;*rprint();
STOPGO ldd REGS ; userpc
cpd PTRMEM
blo STOPNEXT ; if(userpc < ptrmem) runone
ldd PTRMEM
addd #10
cpd REGS
bhi STOPDON ; quit if ptrmem+10 > userpc
STOPNEXT bsr RUNONE
jsr CHKABRT ; check for abort
bra STOPGO
STOPDON jsr OUTCRLF
jmp RPRINT ; result of trace
; RTS done
;*************************
;* runone - This routine is used by the trace and
;* execute commands to run one only one user instruction.
;* Control is passed to the user code via an RTI. OC5
;* is then used to trigger an XIRQ as soon as the first user
;* opcode is fetched. Control then returns to the monitor
;* through XIRQIN.
;* Externally, the OC5 pin must be wired to the XIRQ pin.
;************************
;* Disable oc5 interrupts
;* Put monitor XIRQ vector into jump table
;* Unmask x bit in user ccr
;* Setup OC5 to go low when first user instruction executed
RUNONE equ *
lda #$7E ; put "jmp xirqin" in jump table
sta JTOC5
ldx #XIRQIN
stx JXIRQ+1
lda REGS+8 ; x bit will be cleared when
anda #$BF ; rti is executed below
sta REGS+8
ldb #87 ; cycles to end of rti
ldx TCNT
abx ; 3~ \
stx TOC5 ; oc5 match register 5~ \
lda TCTL1 ; 4~ \
anda #$FE ; set up oc5 low on match 2~ \
sta TCTL1 ; enable oc5 interrupt 4~ / 86~
;** RESTACK - Restore user stack and RTI to user code.
;* This code is the pathway to execution of user code.
;*(Force extended addressing to maintain cycle count)
;*Restore user stack and rti to user code
RESTACK equ * ; 68~
sts >PTR2 ; save monitor sp
lds >SP ; user stack pointer
ldx >REGS
pshx ; pc
ldx >REGS+2
pshx ; y
ldx >REGS+4
pshx ; x
ldd >REGS+6
psha ; a
pshb ; b
lda >REGS+8
psha ; ccr
rti
;** Return here from run one line of user code.
XIRQIN equ *
tsx ; user sp -> x
lds PTR2 ; restore monitor sp
;** SAVSTACK - Save user's registers.
;* On entry - x points to top of user stack.
SAVSTACK equ *
lda 0,X
sta REGS+8 ; user ccr
ldd 1,X
sta REGS+7 ; b
stb REGS+6 ; a
ldd 3,X
std REGS+4 ; x
ldd 5,X
std REGS+2 ; y
ldd 7,X
std REGS ; pc
ldb #8
abx
stx SP ; user stack pointer
lda TCTL1 ; force oc5 pin high which
ora #$03 ; is tied to xirq line
sta TCTL1
lda #$08
sta CFORC
rts
;**********
;* HOST() - Estb lishes transparent link between
;* terminal and host. Port used for host is
;* determined in the reset initialization routine
;* and stored in HOSTDEV.
;* To exit type control A.
;* To send break to host type control B.
;*if(no external device) return;
;*initialize host port;
;*While( !(control A))
;* input(terminal); output(host);
;* input(host); output(terminal);
HOST ldx #MSG10 ; "no host port avail"
jmp OUTSTRG
; RTS
;**********
;* txbreak() - transmit break to host port.
;* The duration of the transmitted break is
;* approximately 200,000 E-clock cycles, or
;* 100ms at 2.0 MHz.
;***********
TXBREAK equ *
TXBSCI ldx #SCCR2 ; sci is host
bset 0,X,$01 ; set send break bit
bsr TXBWAIT
bclr 0,X,$01 ; clear send break bit
TXB1 lda #$0D
bsr HOSTOUT ; send carriage return
lda #$0A
bra HOSTOUT ; send linefeed
; RTS
TXBWAIT ldy #$6F9B ; loop count = 28571
TXBWAIT1 dey ; 7 cycle loop
bne TXBWAIT1
rts
;**********
;* hostinit(), hostin(), hostout() - host i/o
;*routines. Restores original terminal device.
;**********
HOSTINIT jmp INIT ; initialize host
; RTS
HOSTIN jmp INPUT ; read host
; RTS
HOSTOUT jmp OUTPUT ; write to host
; RTS
;**********
;* load(ptrbuff[]) - Load s1/s9 records from
;*host to memory. Ptrbuff[] points to string in
;*input buffer which is a command to output s1/s9
;*records from the host ("cat filename" for unix).
;* Returns error and address if it can't write
;*to a particular location.
;**********
;* verify(ptrbuff[]) - Verify memory from load
;*command. Ptrbuff[] is same as for load.
;* tmp3 is used as an error indication, 0=no errors,
;* 1=receiver, 2=rom error, 3=checksum error.
;**********
VERIFY clr TMP2
inc TMP2 ; TMP2=1=verify
bra LOAD1
LOAD clr TMP2 ; 0=load
;*a=wskip();
;*if(a = cr) goto transparent mode;
;*if(t option) hostdev = iodev;
LOAD1 equ *
clr TMP3 ; clear error flag
jsr WSKIP
;* BNE LOAD2
;* JMP HOST go to host if no args
LOAD2 jsr UPCASE
cmpa #'T' ; look for t option
bne LOAD3 ; jump not t option
jsr INCBUFF
jsr READBUFF ; get next character
jsr DECBUFF
cmpa #$0D
bne LOAD3 ; jump if not t option
clr AUTOLF
bra LOAD10 ; go wait for s1 records
;*else while(not cr)
;* read character from input buffer;
;* send character to host;
LOAD3 clr AUTOLF
bsr HOSTINIT ; initialize host port
LOAD4 jsr READBUFF ; get next char
jsr INCBUFF
psha ; save char
bsr HOSTOUT ; output to host
jsr OUTPUT ; echo to terminal
pula
cmpa #$0D
bne LOAD4 ; jump if not cr
;*repeat: /* look for s records */
;* if(hostdev != iodev) check abort;
;* a = hostin();
;* if(a = 'S')
;* a = hostin;
;* if(a = '1')
;* checksum = 0;
;* get byte count in b;
;* get base address in x;
;* while(byte count > 0)
;* byte();
;* x++; b--;
;* if(tmp3=0) /* no error */
;* if(load) x[0] = shftreg+1;
;* if(x[0] != shftreg+1)
;* tmp3 = 2; /* rom error */
;* ptr3 = x; /* save address */
;* if(tmp3 = 0) do checksum;
;* if(checksum err) tmp3 = 3; /* checksum error */
;** Look for s-record header
LOAD10 equ *
LOAD11 bsr HOSTIN ; read host
tsta
beq LOAD10 ; jump if no input
cmpa #'S'
bne LOAD10 ; jump if not S
LOAD12 bsr HOSTIN ; read host
tsta
beq LOAD12 ; jump if no input
cmpa #'9'
beq LOAD90 ; jump if S9 record
cmpa #'1'
bne LOAD10 ; jump if not S1
clr TMP4 ; clear checksum
;** Get Byte Count and Starting Address
jsr BYTE
ldb SHFTREG+1
subb #$2 ; b = byte count
bsr BYTE
bsr BYTE
pshb ; save byte count
ldd SHFTREG
addd LDOFFST ; add offset
xgdx ; x = address+offset
pulb ; restore byte count
dex ; condition for loop
;** Get and Store Incoming Data Byte
LOAD20 bsr BYTE ; get next byte
inx
decb ; check byte count
beq LOAD30 ; if b=0, go do checksum
tst TMP3
bne LOAD10 ; jump if error flagged
tst TMP2
bne LOAD21 ; jump if verify
lda SHFTREG+1
jsr WRITE ; load only
LOAD21 cmpa 0,X ; verify ram location
beq LOAD20 ; jump if ram ok
lda #$02
sta TMP3 ; indicate rom error
stx PTR3 ; save error address
bra LOAD20 ; finish download
;** Get and Test Checksum
LOAD30 tst TMP3
bne LOAD10 ; jump if error already
lda TMP4
inca ; do checksum
beq LOAD10 ; jump if s1 record okay
lda #$03
sta TMP3 ; indicate checksum error
bra LOAD10
;* if(a = '9')
;* read rest of record;
;* if(tmp3=2) return("[ptr3]");
;* if(tmp3=1) return("rcv error");
;* if(tmp3=3) return("checksum err");
;* else return("done");
LOAD90 bsr BYTE
ldb SHFTREG+1 ; b = byte count
LOAD91 bsr BYTE
decb
bne LOAD91 ; loop until end of record
ldb #$64
LOAD91A jsr DLY10MS ; delay 1 sec -let host finish
decb
bne LOAD91A
jsr INPUT ; clear comm device
ldd #$7E0D ; put dummy command in inbuff
std INBUFF
inc AUTOLF ; turn on autolf
ldx #MSG11 ; "done" default msg
lda TMP3
cmpa #$02
bne LOAD92 ; jump not rom error
ldx #PTR3
jsr OUT2BSP ; address of rom error
bra LOAD95
LOAD92 cmpa #$01
bne LOAD93 ; jump not rcv error
ldx #MSG14 ; "rcv error"
bra LOAD94
LOAD93 cmpa #$03
bne LOAD94 ; jump not checksum error
ldx #MSG12 ; "checksum error"
LOAD94 jsr OUTSTRG
LOAD95 rts
;**********
;* byte() - Read 2 ascii bytes from host and
;*convert to one hex byte. Returns byte
;*shifted into shftreg and added to tmp4.
;**********
BYTE pshb
pshx
BYTE0 jsr HOSTIN ; read host (1st byte)
tsta
beq BYTE0 ; loop until input
jsr HEXBIN
BYTE1 jsr HOSTIN ; read host (2nd byte)
tsta
beq BYTE1 ; loop until input
jsr HEXBIN
lda SHFTREG+1
adda TMP4
sta TMP4 ; add to checksum
pulx
pulb
rts
;**********
;* offset [<addr>]
;* Specify offset to be added to s-record address when
;* downloading from the host.
;* OFFSET -show the current offset
;* OFFSET <data> -current offset = data
;* OFFSET -<data> -current offset = 0 - data
;**********
;*if(<data>) then offset = data;
;*print(offset);
OFFSET equ *
clr TMP4 ; minus indicator
jsr WSKIP
beq OFFST3 ; jump if cr (no argument)
cmpa #'-'
bne OFFST1 ; jump not -
inc TMP4 ; set minus sign flag
jsr INCBUFF ; move buffer pointer
jsr WSKIP
OFFST1 jsr BUFFARG ; read argument
tst COUNT
beq OFFSTER ; jump if bad argument
jsr WSKIP
bne OFFSTER ; jump if not cr
ldd SHFTREG ; get offset value
tst TMP4
beq OFFST2 ; jump if positive
ldd #$0000 ; negative - sub from 0
subd SHFTREG
OFFST2 std LDOFFST
OFFST3 jsr OUTCRLF ; display current offset
ldx #LDOFFST
jmp OUT2BSP
; RTS
OFFSTER ldx #MSG9 ; "bad argument"
jmp OUTSTRG
; RTS
;**********
;* register [<name>] - prints the user regs
;*and opens them for modification. <name> is
;*the first register opened (default = P).
;* Subcommands:
;* [<nn>]<space> Opens the next register.
;* [<nn>]<cr> Return.
;* The register value is only changed if
;* <nn> is entered before the subcommand.
;**********
;*x[] = reglist
;*a = wskip(); a = upcase(a);
;*if(a != cr)
;* while( a != x[0] )
;* if( x[0] = "s") return(bad argument);
;* x[]++;
;* incbuff(); a = wskip();
;* if(a != cr) return(bad argument);
REGISTER ldx #REGLIST
jsr WSKIP ; a = first char of arg
jsr UPCASE ; convert to upper case
cmpa #$D
beq REG4 ; jump if no argument
REG1 cmpa 0,X
beq REG3
ldb 0,X
inx
cmpb #'S'
bne REG1 ; jump if not "s"
REG2 ldx #MSG9 ; "bad argument"
jmp OUTSTRG
; RTS
REG3 pshx
jsr INCBUFF
jsr WSKIP ; next char after arg
pulx
bne REG2 ; jump if not cr
;*rprint();
;* while(x[0] != "s")
;* rprnt1(x);
;* a = termarg(); /* read from terminal */
;* if( ! dchek(a) ) return(bad argument);
;* if(countu1 != 0)
;* if(x[14] = 1)
;* regs[x[7]++ = shftreg;
;* regs[x[7]] = shftreg+1;
;* if(a = cr) break;
;*return;
REG4 jsr RPRINT ; print all registers
REG5 jsr OUTCRLF
jsr RPRNT1 ; print reg name
clr SHFTREG
clr SHFTREG+1
jsr TERMARG ; read subcommand
jsr DCHEK
beq REG6 ; jump if delimeter
ldx #MSG9 ; "bad argument"
jmp OUTSTRG
; RTS
REG6 psha
pshx
tst COUNT
beq REG8 ; jump if no input
ldb 7,X ; get reg offset
lda 14,X ; byte size
ldx #REGS ; user registers
abx
tsta
beq REG7 ; jump if 1 byte reg
lda SHFTREG
sta 0,X ; put in top byte
inx
REG7 lda SHFTREG+1
sta 0,X ; put in bottom byte
REG8 pulx
pula
ldb 0,X ; CHECK FOR REGISTER S
cmpb #'S'
beq REG9 ; jump if "s"
inx ; point to next register
cmpa #$D
bne REG5 ; jump if not cr
REG9 rts
;* Equates
JPORTD equ $08
JDDRD equ $09
JBAUD equ $2B
JSCCR1 equ $2C
JSCCR2 equ $2D
JSCSR equ $2E
JSCDAT equ $2F
;*
;************
;* xboot [<addr1> [<addr2>]] - Use SCI to talk to an 'hc11 in
;* boot mode. Downloads bytes from addr1 thru addr2.
;* Default addr1 = $C000 and addr2 = $C0ff.
;*
;* IMPORTANT:
;* if talking to an 'A8 or 'A2: use either default addresses or ONLY
;* addr1 - this sends 256 bytes
;* if talking to an 'E9: include BOTH addr1 and addr2 for variable
;* length
;************
;*Get arguments
;*If no args, default $C000
BOOT jsr WSKIP
bne BOT1 ; jump if arguments
ldx #$C0FF ; addr2 default
stx PTR5
ldy #$C000 ; addr1 default
bra BOT2 ; go - use default address
;*Else get arguments
BOT1 jsr BUFFARG
tst COUNT
beq BOTERR ; jump if no address
ldy SHFTREG ; start address (addr1)
jsr WSKIP
bne BOT1A ; go get addr2
sty PTR5 ; default addr2...
ldd PTR5 ; ...by taking addr1...
addd #$FF ; ...and adding 255 to it...
std PTR5 ; ...for a total download of 256
bra BOT2 ; continue
;*
BOT1A jsr BUFFARG
tst COUNT
beq BOTERR ; jump if no address
ldx SHFTREG ; end address (addr2)
stx PTR5
jsr WSKIP
bne BOTERR ; go use addr1 and addr2
bra BOT2
;*
BOTERR ldx #MSG9 ; "bad argument"
jmp OUTSTRG
; RTS
;*Boot routine
BOT2 ldb #$FF ; control character ($ff -> download)
bsr BTSUB ; set up SCI and send control char
;* initializes X as register pointer
;*Download block
BLOP lda 0,Y
sta JSCDAT,X ; write to transmitter
brclr JSCSR,X,$80,* ; wait for TDRE
cpy PTR5 ; if last...
beq BTDONE ; ...quit
iny ; else...
bra BLOP ; ...send next
BTDONE rts
;************************************************
;*Subroutine
;* btsub - sets up SCI and outputs control character
;* On entry, B = control character
;* On exit, X = $1000
;* A = $0C
;***************************
BTSUB equ *
ldx #$1000 ; to use indexed addressing
lda #$02
sta JPORTD,X ; drive transmitter line
sta JDDRD,X ; high
clr JSCCR2,X ; turn off XMTR and RCVR
lda #$22 ; BAUD = /16
sta JBAUD,X
lda #$0C ; TURN ON XMTR & RCVR
sta JSCCR2,X
stb JSCDAT,X
brclr JSCSR,X,$80,* ; wait for TDRE
rts
;***********
;* TILDE - This command is put into the combuff by the
;* load command so that extraneous carriage returns after
;* the load will not hang up.
TILDE rts
;***********
;* HALT - This command halts the processor and stops the clock.
HALT stop
;*** Jump table ***
org $EF7C ; $1000 bytes below Buffalo locations
.WARMST jmp MAIN ; warm start
.BPCLR jmp BPCLR ; clear breakpoint table
.RPRINT jmp RPRINT ; display user registers
.HEXBIN jmp HEXBIN ; convert ascii hex char to binary
.BUFFAR jmp BUFFARG ; build hex argument from buffer
.TERMAR jmp TERMARG ; read hex argument from terminal
.CHGBYT jmp CHGBYT ; modify memory at address in x
.READBU jmp READBUFF ; read character from buffer
.INCBUF jmp INCBUFF ; increment buffer pointer
.DECBUF jmp DECBUFF ; decrement buffer pointer
.WSKIP jmp WSKIP ; find non-whitespace char in buffer
.CHKABR jmp CHKABRT ; check for abort from terminal
.UPCASE jmp UPCASE ; convert to upper case
.WCHEK jmp WCHEK ; check for white space
.DCHEK jmp DCHEK ; check for delimeter
.INIT jmp INIT ; initialize i/o device
.INPUT jmp INPUT ; low level input routine
.OUTPUT jmp OUTPUT ; low level output routine
.OUTLHL jmp OUTLHLF ; display top 4 bits as hex digit
.OUTRHL jmp OUTRHLF ; display bottom 4 bits as hex digit
.OUTA jmp OUTA ; output ascii character in A
.OUT1BY jmp OUT1BYT ; display the hex value of byte at X
.OUT1BS jmp OUT1BSP ; out1byt followed by space
.OUT2BS jmp OUT2BSP ; display 2 hex bytes at x and a space
.OUTCRL jmp OUTCRLF ; carriage return, line feed to terminal
.OUTSTR jmp OUTSTRG ; display string at X (term with $04)
.OUTST0 jmp OUTSTRG0 ; outstrg with no initial carr ret
.INCHAR jmp INCHAR ; wait for and input a char from term
;*.VECINT JMP VECINIT initialize RAM vector table
|
title "Asynchronous Procedure Call Interrupt"
;++
;
; Copyright (c) Microsoft Corporation. All rights reserved.
;
; You may only use this code if you agree to the terms of the Windows Research Kernel Source Code License agreement (see License.txt).
; If you do not agree to the terms, do not use the code.
;
;
; Module Name:
;
; apcint.asm
;
; Abstract:
;
; This module implements the code necessary to process the Asynchronous
; Procedure Call interrupt request.
;
;--
include ksamd64.inc
extern KiDeliverApc:proc
extern KiIdleSummary:qword
extern KiRestoreDebugRegisterState:proc
extern KiSaveDebugRegisterState:proc
subttl "Asynchronous Procedure Call Interrupt"
;++
;
; VOID
; KiApcInterrupt (
; VOID
; )
;
; Routine Description:
;
; This routine is entered as the result of a software interrupt generated
; at APC_LEVEL. Its function is to save the machine state and call the APC
; delivery routine.
;
; N.B. This is a directly connected interrupt that does not use an interrupt
; object.
;
; N.B. APC interrupts are never requested for user mode APCs.
;
; Arguments:
;
; None.
;
; Return Value:
;
; None.
;
;--
NESTED_ENTRY KiApcInterrupt, _TEXT$00
.pushframe ; mark machine frame
;
; Check for interrupt from the idle halt state.
;
; N.B. If an APC interrupt occurs when idle halt is set, then the interrupt
; occurred during the power managment halted state. The interrupt can
; be immediately dismissed since the idle loop will provide the correct
; processing.
;
test byte ptr MfSegCs[rsp], MODE_MASK ; test if previous mode user
jnz short KiAP10 ; if nz, previous mode is user
cmp byte ptr gs:[PcIdleHalt], 0 ; check for idle halt interrupt
je short KiAP10 ; if e, not interrupt from halt
EndSystemInterrupt ; Perform EOI
iretq ; return
;
; Normal APC interrupt.
;
KiAP10: alloc_stack 8 ; allocate dummy vector
push_reg rbp ; save nonvolatile register
GENERATE_INTERRUPT_FRAME <>, <DirectNoSlistCheck> ; generate interrupt frame
mov ecx, APC_LEVEL ; set new IRQL level
ENTER_INTERRUPT <>, <NoCount> ; raise IRQL, do EOI, enable interrupts
mov ecx, KernelMode ; set APC processor mode
xor edx, edx ; set exception frame address
lea r8, (-128)[rbp] ; set trap frame address
call KiDeliverApc ; initiate APC execution
EXIT_INTERRUPT <NoEOI>, <NoCount>, <Direct> ; lower IRQL and restore state
NESTED_END KiApcInterrupt, _TEXT$00
subttl "Initiate User APC Execution"
;++
;
; Routine Description:
;
; This routine generates an exception frame and attempts to deliver a user
; APC.
;
; Arguments:
;
; rbp - Supplies the address of the trap frame.
;
; rsp - Supplies the address of the trap frame.
;
; Return value:
;
; None.
;
;--
NESTED_ENTRY KiInitiateUserApc, _TEXT$00
GENERATE_EXCEPTION_FRAME ; generate exception frame
mov ecx, UserMode ; set APC processor mode
mov rdx, rsp ; set exception frame address
lea r8, (-128)[rbp] ; set trap frame address
call KiDeliverApc ; deliver APC
RESTORE_EXCEPTION_STATE ; restore exception state/deallocate
ret ; return
NESTED_END KiInitiateUserApc, _TEXT$00
end
|
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
Copyright (c) Geoworks 1994 -- All Rights Reserved
PROJECT:
MODULE:
FILE: pgfsUtils.asm
AUTHOR: Adam de Boor, Sep 30, 1993
ROUTINES:
Name Description
---- -----------
REVISION HISTORY:
Name Date Description
---- ---- -----------
Adam 9/30/93 Initial revision
DESCRIPTION:
Utility routines
$Id: pgfsUtils.asm,v 1.1 97/04/18 11:46:37 newdeal Exp $
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
.186
Resident segment resource
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
PGFSUDerefSocket
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Get the offset of the PGFSSocketInfo for the indicated
socket.
CALLED BY: (EXTERNAL)
PASS: cx = socket number
RETURN: bx = offset of PGFSSocketInfo in dgroup
DESTROYED: nothing
SIDE EFFECTS: none
PSEUDO CODE/STRATEGY:
REVISION HISTORY:
Name Date Description
---- ---- -----------
ardeb 9/30/93 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
PGFSUDerefSocket proc far
uses ax, dx
.enter
mov ax, size PGFSSocketInfo
mul cx
mov_tr bx, ax
add bx, offset socketInfo
.leave
ret
PGFSUDerefSocket endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
PGFSUCheckInUse
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: See if the indicated socket is in-use
CALLED BY: (EXTERNAL) PGFSRHandleRemoval,
PGFSCardServicesCallback
PASS: ds = dgroup
cx = socket number
RETURN: carry set if socket in-use
carry clear if not in-use
ds:bx = PGFSSocketInfo for the socket
DESTROYED: nothing
SIDE EFFECTS: none
PSEUDO CODE/STRATEGY:
REVISION HISTORY:
Name Date Description
---- ---- -----------
ardeb 10/26/93 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
PGFSUCheckInUse proc near
.enter
call PGFSUDerefSocket
test ds:[bx].PGFSSI_flags, mask PSF_PRESENT
jz done
test ds:[bx].PGFSSI_flags, mask PSF_HAS_FONTS
jnz inUse
;
; If nothing referencing the card, we're willing to see it go.
;
tst_clc ds:[bx].PGFSSI_inUseCount
jz done
inUse:
stc
done:
.leave
ret
PGFSUCheckInUse endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
PGFSMapOffset
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Map memory into the window given us by card services
CALLED BY: GFSDevRead, GFSDevMapDir, GFSDevMapEA
PASS: dxax - 32-bit offset of GFS to map in
RETURN: es:di - pointer to first byte of data
carry set if error (card no longer available, etc)
ds:bx - PGFSSocketInfo for this socket
DESTROYED: nothing
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
chrisb 4/28/94 Initial version.
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
PGFSMapOffset proc near
uses ax, cx, dx
mapMemPageArgs local CSMapMemPageArgs
.enter
call LoadVarSegDS
mov bx, ds:[curSocketPtr]
;
; Get the linear address of the memory.
;
adddw dxax, ds:[bx].PGFSSI_address
;
; Return the in-bank offset in DI.
;
mov di, ax
andnf di, BANK_SIZE-1
andnf ax, not (BANK_SIZE-1)
movdw ss:[mapMemPageArgs].CSMMPA_cardOffset, dxax
mov ss:[mapMemPageArgs].CSMMPA_page, 0
mov dx, ds:[bx].PGFSSI_window
push bx
segmov es, ss, bx
lea bx, ss:[mapMemPageArgs] ; es:bx = ArgPointer
mov cx, size CSMapMemPageArgs
cmp ds:[inserting], TRUE
jne lockBIOS
CallCS CSF_MAP_MEM_PAGE, DONT_LOCK_BIOS
jmp $10
lockBIOS:
CallCS CSF_MAP_MEM_PAGE
$10:
pop bx
mov es, ds:[bx].PGFSSI_windowSeg
if ERROR_CHECK
jc done
mov ds:[fsMapped], TRUE
done:
endif
.leave
ret
PGFSMapOffset endp
PGFSMapOffsetFar proc far
call PGFSMapOffset
ret
PGFSMapOffsetFar endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
PGFSUDerefSocketFromDisk
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Deref the PGFSSocketInfo given a DiskDesc
CALLED BY: GFSDevLock, GFSCurPathCopy, GFSCurPathDelete
PASS: es:si - DiskDesc
RETURN: ds:bx - PGFSSocketInfo (ds = dgroup)
DESTROYED: nothing
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
chrisb 5/ 3/94 Initial version.
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
PGFSUDerefSocketFromDisk proc far
.enter
call LoadVarSegDS
mov bx, es:[si].DD_drive
mov bx, es:[bx].DSE_private
mov bx, es:[bx].PGFSPD_socketPtr
.leave
ret
PGFSUDerefSocketFromDisk endp
Resident ends
|
;
; Copyright (c) 2010 The WebM project authors. All Rights Reserved.
;
; Use of this source code is governed by a BSD-style license
; that can be found in the LICENSE file in the root of the source
; tree. An additional intellectual property rights grant can be found
; in the file PATENTS. All contributing project authors may
; be found in the AUTHORS file in the root of the source tree.
;
EXPORT |vp8_bilinear_predict16x16_neon|
ARM
REQUIRE8
PRESERVE8
AREA ||.text||, CODE, READONLY, ALIGN=2
; r0 unsigned char *src_ptr,
; r1 int src_pixels_per_line,
; r2 int xoffset,
; r3 int yoffset,
; r4 unsigned char *dst_ptr,
; stack(r5) int dst_pitch
|vp8_bilinear_predict16x16_neon| PROC
push {r4-r5, lr}
ldr r12, _bifilter16_coeff_
ldr r4, [sp, #12] ;load parameters from stack
ldr r5, [sp, #16] ;load parameters from stack
cmp r2, #0 ;skip first_pass filter if xoffset=0
beq secondpass_bfilter16x16_only
add r2, r12, r2, lsl #3 ;calculate filter location
cmp r3, #0 ;skip second_pass filter if yoffset=0
vld1.s32 {d31}, [r2] ;load first_pass filter
beq firstpass_bfilter16x16_only
sub sp, sp, #272 ;reserve space on stack for temporary storage
vld1.u8 {d2, d3, d4}, [r0], r1 ;load src data
mov lr, sp
vld1.u8 {d5, d6, d7}, [r0], r1
mov r2, #3 ;loop counter
vld1.u8 {d8, d9, d10}, [r0], r1
vdup.8 d0, d31[0] ;first_pass filter (d0 d1)
vld1.u8 {d11, d12, d13}, [r0], r1
vdup.8 d1, d31[4]
;First Pass: output_height lines x output_width columns (17x16)
filt_blk2d_fp16x16_loop_neon
pld [r0]
pld [r0, r1]
pld [r0, r1, lsl #1]
vmull.u8 q7, d2, d0 ;(src_ptr[0] * vp8_filter[0])
vmull.u8 q8, d3, d0
vmull.u8 q9, d5, d0
vmull.u8 q10, d6, d0
vmull.u8 q11, d8, d0
vmull.u8 q12, d9, d0
vmull.u8 q13, d11, d0
vmull.u8 q14, d12, d0
vext.8 d2, d2, d3, #1 ;construct src_ptr[1]
vext.8 d5, d5, d6, #1
vext.8 d8, d8, d9, #1
vext.8 d11, d11, d12, #1
vmlal.u8 q7, d2, d1 ;(src_ptr[0] * vp8_filter[1])
vmlal.u8 q9, d5, d1
vmlal.u8 q11, d8, d1
vmlal.u8 q13, d11, d1
vext.8 d3, d3, d4, #1
vext.8 d6, d6, d7, #1
vext.8 d9, d9, d10, #1
vext.8 d12, d12, d13, #1
vmlal.u8 q8, d3, d1 ;(src_ptr[0] * vp8_filter[1])
vmlal.u8 q10, d6, d1
vmlal.u8 q12, d9, d1
vmlal.u8 q14, d12, d1
subs r2, r2, #1
vqrshrn.u16 d14, q7, #7 ;shift/round/saturate to u8
vqrshrn.u16 d15, q8, #7
vqrshrn.u16 d16, q9, #7
vqrshrn.u16 d17, q10, #7
vqrshrn.u16 d18, q11, #7
vqrshrn.u16 d19, q12, #7
vqrshrn.u16 d20, q13, #7
vld1.u8 {d2, d3, d4}, [r0], r1 ;load src data
vqrshrn.u16 d21, q14, #7
vld1.u8 {d5, d6, d7}, [r0], r1
vst1.u8 {d14, d15, d16, d17}, [lr]! ;store result
vld1.u8 {d8, d9, d10}, [r0], r1
vst1.u8 {d18, d19, d20, d21}, [lr]!
vld1.u8 {d11, d12, d13}, [r0], r1
bne filt_blk2d_fp16x16_loop_neon
;First-pass filtering for rest 5 lines
vld1.u8 {d14, d15, d16}, [r0], r1
vmull.u8 q9, d2, d0 ;(src_ptr[0] * vp8_filter[0])
vmull.u8 q10, d3, d0
vmull.u8 q11, d5, d0
vmull.u8 q12, d6, d0
vmull.u8 q13, d8, d0
vmull.u8 q14, d9, d0
vext.8 d2, d2, d3, #1 ;construct src_ptr[1]
vext.8 d5, d5, d6, #1
vext.8 d8, d8, d9, #1
vmlal.u8 q9, d2, d1 ;(src_ptr[0] * vp8_filter[1])
vmlal.u8 q11, d5, d1
vmlal.u8 q13, d8, d1
vext.8 d3, d3, d4, #1
vext.8 d6, d6, d7, #1
vext.8 d9, d9, d10, #1
vmlal.u8 q10, d3, d1 ;(src_ptr[0] * vp8_filter[1])
vmlal.u8 q12, d6, d1
vmlal.u8 q14, d9, d1
vmull.u8 q1, d11, d0
vmull.u8 q2, d12, d0
vmull.u8 q3, d14, d0
vmull.u8 q4, d15, d0
vext.8 d11, d11, d12, #1 ;construct src_ptr[1]
vext.8 d14, d14, d15, #1
vmlal.u8 q1, d11, d1 ;(src_ptr[0] * vp8_filter[1])
vmlal.u8 q3, d14, d1
vext.8 d12, d12, d13, #1
vext.8 d15, d15, d16, #1
vmlal.u8 q2, d12, d1 ;(src_ptr[0] * vp8_filter[1])
vmlal.u8 q4, d15, d1
vqrshrn.u16 d10, q9, #7 ;shift/round/saturate to u8
vqrshrn.u16 d11, q10, #7
vqrshrn.u16 d12, q11, #7
vqrshrn.u16 d13, q12, #7
vqrshrn.u16 d14, q13, #7
vqrshrn.u16 d15, q14, #7
vqrshrn.u16 d16, q1, #7
vqrshrn.u16 d17, q2, #7
vqrshrn.u16 d18, q3, #7
vqrshrn.u16 d19, q4, #7
vst1.u8 {d10, d11, d12, d13}, [lr]! ;store result
vst1.u8 {d14, d15, d16, d17}, [lr]!
vst1.u8 {d18, d19}, [lr]!
;Second pass: 16x16
;secondpass_filter
add r3, r12, r3, lsl #3
sub lr, lr, #272
vld1.u32 {d31}, [r3] ;load second_pass filter
vld1.u8 {d22, d23}, [lr]! ;load src data
vdup.8 d0, d31[0] ;second_pass filter parameters (d0 d1)
vdup.8 d1, d31[4]
mov r12, #4 ;loop counter
filt_blk2d_sp16x16_loop_neon
vld1.u8 {d24, d25}, [lr]!
vmull.u8 q1, d22, d0 ;(src_ptr[0] * vp8_filter[0])
vld1.u8 {d26, d27}, [lr]!
vmull.u8 q2, d23, d0
vld1.u8 {d28, d29}, [lr]!
vmull.u8 q3, d24, d0
vld1.u8 {d30, d31}, [lr]!
vmull.u8 q4, d25, d0
vmull.u8 q5, d26, d0
vmull.u8 q6, d27, d0
vmull.u8 q7, d28, d0
vmull.u8 q8, d29, d0
vmlal.u8 q1, d24, d1 ;(src_ptr[pixel_step] * vp8_filter[1])
vmlal.u8 q2, d25, d1
vmlal.u8 q3, d26, d1
vmlal.u8 q4, d27, d1
vmlal.u8 q5, d28, d1
vmlal.u8 q6, d29, d1
vmlal.u8 q7, d30, d1
vmlal.u8 q8, d31, d1
subs r12, r12, #1
vqrshrn.u16 d2, q1, #7 ;shift/round/saturate to u8
vqrshrn.u16 d3, q2, #7
vqrshrn.u16 d4, q3, #7
vqrshrn.u16 d5, q4, #7
vqrshrn.u16 d6, q5, #7
vqrshrn.u16 d7, q6, #7
vqrshrn.u16 d8, q7, #7
vqrshrn.u16 d9, q8, #7
vst1.u8 {d2, d3}, [r4], r5 ;store result
vst1.u8 {d4, d5}, [r4], r5
vst1.u8 {d6, d7}, [r4], r5
vmov q11, q15
vst1.u8 {d8, d9}, [r4], r5
bne filt_blk2d_sp16x16_loop_neon
add sp, sp, #272
pop {r4-r5,pc}
;--------------------
firstpass_bfilter16x16_only
mov r2, #4 ;loop counter
vdup.8 d0, d31[0] ;first_pass filter (d0 d1)
vdup.8 d1, d31[4]
;First Pass: output_height lines x output_width columns (16x16)
filt_blk2d_fpo16x16_loop_neon
vld1.u8 {d2, d3, d4}, [r0], r1 ;load src data
vld1.u8 {d5, d6, d7}, [r0], r1
vld1.u8 {d8, d9, d10}, [r0], r1
vld1.u8 {d11, d12, d13}, [r0], r1
pld [r0]
pld [r0, r1]
pld [r0, r1, lsl #1]
vmull.u8 q7, d2, d0 ;(src_ptr[0] * vp8_filter[0])
vmull.u8 q8, d3, d0
vmull.u8 q9, d5, d0
vmull.u8 q10, d6, d0
vmull.u8 q11, d8, d0
vmull.u8 q12, d9, d0
vmull.u8 q13, d11, d0
vmull.u8 q14, d12, d0
vext.8 d2, d2, d3, #1 ;construct src_ptr[1]
vext.8 d5, d5, d6, #1
vext.8 d8, d8, d9, #1
vext.8 d11, d11, d12, #1
vmlal.u8 q7, d2, d1 ;(src_ptr[0] * vp8_filter[1])
vmlal.u8 q9, d5, d1
vmlal.u8 q11, d8, d1
vmlal.u8 q13, d11, d1
vext.8 d3, d3, d4, #1
vext.8 d6, d6, d7, #1
vext.8 d9, d9, d10, #1
vext.8 d12, d12, d13, #1
vmlal.u8 q8, d3, d1 ;(src_ptr[0] * vp8_filter[1])
vmlal.u8 q10, d6, d1
vmlal.u8 q12, d9, d1
vmlal.u8 q14, d12, d1
subs r2, r2, #1
vqrshrn.u16 d14, q7, #7 ;shift/round/saturate to u8
vqrshrn.u16 d15, q8, #7
vqrshrn.u16 d16, q9, #7
vqrshrn.u16 d17, q10, #7
vqrshrn.u16 d18, q11, #7
vqrshrn.u16 d19, q12, #7
vqrshrn.u16 d20, q13, #7
vst1.u8 {d14, d15}, [r4], r5 ;store result
vqrshrn.u16 d21, q14, #7
vst1.u8 {d16, d17}, [r4], r5
vst1.u8 {d18, d19}, [r4], r5
vst1.u8 {d20, d21}, [r4], r5
bne filt_blk2d_fpo16x16_loop_neon
pop {r4-r5,pc}
;---------------------
secondpass_bfilter16x16_only
;Second pass: 16x16
;secondpass_filter
add r3, r12, r3, lsl #3
mov r12, #4 ;loop counter
vld1.u32 {d31}, [r3] ;load second_pass filter
vld1.u8 {d22, d23}, [r0], r1 ;load src data
vdup.8 d0, d31[0] ;second_pass filter parameters (d0 d1)
vdup.8 d1, d31[4]
filt_blk2d_spo16x16_loop_neon
vld1.u8 {d24, d25}, [r0], r1
vmull.u8 q1, d22, d0 ;(src_ptr[0] * vp8_filter[0])
vld1.u8 {d26, d27}, [r0], r1
vmull.u8 q2, d23, d0
vld1.u8 {d28, d29}, [r0], r1
vmull.u8 q3, d24, d0
vld1.u8 {d30, d31}, [r0], r1
vmull.u8 q4, d25, d0
vmull.u8 q5, d26, d0
vmull.u8 q6, d27, d0
vmull.u8 q7, d28, d0
vmull.u8 q8, d29, d0
vmlal.u8 q1, d24, d1 ;(src_ptr[pixel_step] * vp8_filter[1])
vmlal.u8 q2, d25, d1
vmlal.u8 q3, d26, d1
vmlal.u8 q4, d27, d1
vmlal.u8 q5, d28, d1
vmlal.u8 q6, d29, d1
vmlal.u8 q7, d30, d1
vmlal.u8 q8, d31, d1
vqrshrn.u16 d2, q1, #7 ;shift/round/saturate to u8
vqrshrn.u16 d3, q2, #7
vqrshrn.u16 d4, q3, #7
vqrshrn.u16 d5, q4, #7
vqrshrn.u16 d6, q5, #7
vqrshrn.u16 d7, q6, #7
vqrshrn.u16 d8, q7, #7
vqrshrn.u16 d9, q8, #7
vst1.u8 {d2, d3}, [r4], r5 ;store result
subs r12, r12, #1
vst1.u8 {d4, d5}, [r4], r5
vmov q11, q15
vst1.u8 {d6, d7}, [r4], r5
vst1.u8 {d8, d9}, [r4], r5
bne filt_blk2d_spo16x16_loop_neon
pop {r4-r5,pc}
ENDP
;-----------------
AREA bifilters16_dat, DATA, READWRITE ;read/write by default
;Data section with name data_area is specified. DCD reserves space in memory for 48 data.
;One word each is reserved. Label filter_coeff can be used to access the data.
;Data address: filter_coeff, filter_coeff+4, filter_coeff+8 ...
_bifilter16_coeff_
DCD bifilter16_coeff
bifilter16_coeff
DCD 128, 0, 112, 16, 96, 32, 80, 48, 64, 64, 48, 80, 32, 96, 16, 112
END
|
<%
import collections
import pwnlib.abi
import pwnlib.constants
import pwnlib.shellcraft
import six
%>
<%docstring>fstatfs64(fildes, buf) -> str
Invokes the syscall fstatfs64.
See 'man 2 fstatfs64' for more information.
Arguments:
fildes(int): fildes
buf(statfs64*): buf
Returns:
int
</%docstring>
<%page args="fildes=0, buf=0"/>
<%
abi = pwnlib.abi.ABI.syscall()
stack = abi.stack
regs = abi.register_arguments[1:]
allregs = pwnlib.shellcraft.registers.current()
can_pushstr = []
can_pushstr_array = []
argument_names = ['fildes', 'buf']
argument_values = [fildes, buf]
# Load all of the arguments into their destination registers / stack slots.
register_arguments = dict()
stack_arguments = collections.OrderedDict()
string_arguments = dict()
dict_arguments = dict()
array_arguments = dict()
syscall_repr = []
for name, arg in zip(argument_names, argument_values):
if arg is not None:
syscall_repr.append('%s=%s' % (name, pwnlib.shellcraft.pretty(arg, False)))
# If the argument itself (input) is a register...
if arg in allregs:
index = argument_names.index(name)
if index < len(regs):
target = regs[index]
register_arguments[target] = arg
elif arg is not None:
stack_arguments[index] = arg
# The argument is not a register. It is a string value, and we
# are expecting a string value
elif name in can_pushstr and isinstance(arg, (six.binary_type, six.text_type)):
if isinstance(arg, six.text_type):
arg = arg.encode('utf-8')
string_arguments[name] = arg
# The argument is not a register. It is a dictionary, and we are
# expecting K:V paris.
elif name in can_pushstr_array and isinstance(arg, dict):
array_arguments[name] = ['%s=%s' % (k,v) for (k,v) in arg.items()]
# The arguent is not a register. It is a list, and we are expecting
# a list of arguments.
elif name in can_pushstr_array and isinstance(arg, (list, tuple)):
array_arguments[name] = arg
# The argument is not a register, string, dict, or list.
# It could be a constant string ('O_RDONLY') for an integer argument,
# an actual integer value, or a constant.
else:
index = argument_names.index(name)
if index < len(regs):
target = regs[index]
register_arguments[target] = arg
elif arg is not None:
stack_arguments[target] = arg
# Some syscalls have different names on various architectures.
# Determine which syscall number to use for the current architecture.
for syscall in ['SYS_fstatfs64']:
if hasattr(pwnlib.constants, syscall):
break
else:
raise Exception("Could not locate any syscalls: %r" % syscalls)
%>
/* fstatfs64(${', '.join(syscall_repr)}) */
%for name, arg in string_arguments.items():
${pwnlib.shellcraft.pushstr(arg, append_null=(b'\x00' not in arg))}
${pwnlib.shellcraft.mov(regs[argument_names.index(name)], abi.stack)}
%endfor
%for name, arg in array_arguments.items():
${pwnlib.shellcraft.pushstr_array(regs[argument_names.index(name)], arg)}
%endfor
%for name, arg in stack_arguments.items():
${pwnlib.shellcraft.push(arg)}
%endfor
${pwnlib.shellcraft.setregs(register_arguments)}
${pwnlib.shellcraft.syscall(syscall)}
|
ChampionsRoom_h:
db GYM ; tileset
db CHAMPIONS_ROOM_HEIGHT, CHAMPIONS_ROOM_WIDTH ; dimensions (y, x)
dw ChampionsRoom_Blocks ; blocks
dw ChampionsRoom_TextPointers ; texts
dw ChampionsRoom_Script ; scripts
db $0 ; connections
dw ChampionsRoom_Object ; objects
|
; SP1MakeRect16
; 05.2006 aralbrec, Sprite Pack v3.0
; sinclair spectrum version
XLIB SP1MakeRect16
; A straight conversion from struct_sp1_Rect
; to struct_r_Rect16
;
; enter : hl = struct sp1_Rect *
; de = destination struct r_Rect16 *
; uses : af, b, de, hl
.SP1MakeRect16
ld b,(hl)
inc hl
ld a,(hl)
inc hl
ld (de),a
inc de
xor a
ld (de),a
inc de
ld a,(hl)
ld (de),a
inc de
xor a
ld (de),a
inc de
ld a,b
ld (de),a
inc de
xor a
ld (de),a
inc de
ld a,(hl)
ld (de),a
inc de
xor a
ld (de),a
ret
|
SECTION code_fp_math48
PUBLIC mm48__ac1_3
mm48__ac1_3:
; set AC = 1/3
ld bc,$2aaa
ld e,c
ld d,c
ld hl,$aa7f
ret
|
.global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r15
push %r8
push %r9
push %rax
push %rcx
push %rdi
push %rsi
lea addresses_WT_ht+0x21b9, %r8
nop
nop
dec %rdi
mov $0x6162636465666768, %r15
movq %r15, %xmm4
vmovups %ymm4, (%r8)
nop
nop
nop
nop
add $32953, %r9
lea addresses_WC_ht+0x19f9f, %rsi
lea addresses_UC_ht+0x125b9, %rdi
nop
add $45170, %r10
mov $0, %rcx
rep movsw
nop
nop
nop
add %r15, %r15
lea addresses_WT_ht+0x180f9, %rcx
clflush (%rcx)
sub %r8, %r8
movb (%rcx), %r10b
nop
nop
nop
xor %rsi, %rsi
lea addresses_WC_ht+0xffb9, %r10
nop
nop
nop
sub $8340, %r8
mov (%r10), %r15w
nop
nop
nop
nop
nop
and %r8, %r8
lea addresses_WT_ht+0x6db9, %rsi
lea addresses_A_ht+0x16209, %rdi
nop
nop
nop
nop
and %rax, %rax
mov $10, %rcx
rep movsl
nop
nop
nop
inc %r8
lea addresses_normal_ht+0x7f85, %r9
nop
and %r15, %r15
mov (%r9), %cx
nop
nop
nop
nop
add $36512, %rsi
lea addresses_A_ht+0x2c01, %rsi
lea addresses_WC_ht+0xef95, %rdi
clflush (%rdi)
nop
nop
nop
nop
nop
sub %r9, %r9
mov $47, %rcx
rep movsq
nop
nop
inc %r9
lea addresses_WT_ht+0x19573, %rcx
nop
nop
xor $20546, %r10
and $0xffffffffffffffc0, %rcx
movaps (%rcx), %xmm0
vpextrq $1, %xmm0, %rax
nop
nop
nop
nop
xor $9884, %rcx
lea addresses_A_ht+0x11bb9, %rcx
cmp %r8, %r8
movb (%rcx), %al
nop
nop
nop
xor $59795, %rdi
lea addresses_A_ht+0x5af9, %rsi
lea addresses_normal_ht+0xc099, %rdi
nop
nop
nop
add %r8, %r8
mov $60, %rcx
rep movsq
nop
nop
nop
xor %r15, %r15
pop %rsi
pop %rdi
pop %rcx
pop %rax
pop %r9
pop %r8
pop %r15
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r11
push %r12
push %r13
push %r15
push %r8
push %rbx
// Store
lea addresses_WC+0x1039c, %r10
nop
xor %r8, %r8
movl $0x51525354, (%r10)
nop
nop
nop
nop
and %r13, %r13
// Faulty Load
lea addresses_PSE+0x4db9, %r11
nop
nop
nop
nop
nop
dec %rbx
mov (%r11), %r15d
lea oracles, %r11
and $0xff, %r15
shlq $12, %r15
mov (%r11,%r15,1), %r15
pop %rbx
pop %r8
pop %r15
pop %r13
pop %r12
pop %r11
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_PSE', 'same': False, 'size': 2, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'dst': {'type': 'addresses_WC', 'same': False, 'size': 4, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
[Faulty Load]
{'src': {'type': 'addresses_PSE', 'same': True, 'size': 4, 'congruent': 0, 'NT': True, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'dst': {'type': 'addresses_WT_ht', 'same': False, 'size': 32, 'congruent': 10, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_WC_ht', 'congruent': 0, 'same': False}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 11, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_WT_ht', 'same': False, 'size': 1, 'congruent': 5, 'NT': False, 'AVXalign': True}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WC_ht', 'same': False, 'size': 2, 'congruent': 9, 'NT': True, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WT_ht', 'congruent': 11, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 2, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_normal_ht', 'same': False, 'size': 2, 'congruent': 2, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_A_ht', 'congruent': 3, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 1, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_WT_ht', 'same': False, 'size': 16, 'congruent': 0, 'NT': False, 'AVXalign': True}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_A_ht', 'same': True, 'size': 1, 'congruent': 8, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_A_ht', 'congruent': 5, 'same': False}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 4, 'same': False}, 'OP': 'REPM'}
{'33': 21829}
33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33
*/
|
// We index anonymous namespaces.
//- @namespace defines/binding AnonymousNamespace
namespace {
}
|
; Program 4.1
; Addition and Subtraction - NASM (64-bit)
; Copyright (c) 2020 Hall & Slonka
SECTION .data
sum: DQ 0
val: DQ 25
SECTION .text
global _main
_main:
mov rax, 0
inc rax
add rax, 200
sub rax, [val]
mov [sum], rax
dec QWORD [sum]
neg QWORD [sum]
mov rax, 60
xor rdi, rdi
syscall
|
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