text stringlengths 1 1.05M |
|---|
; { "technology": "Phantasy Star Gaiden (fast)", "extension": "psgcompr" }
.memorymap
defaultslot 0
slotsize $4000
slot 0 $0000
.endme
.rombankmap
bankstotal 1
banksize $4000
banks 1
.endro
.bank 0 slot 0
.org 0
ld hl,data
ld de,$4000
call PSGaiden_tile_decompr
ret ; ends the test
.define PSGaiden_decomp_buffer $c000
.block "decompressor"
.include "../decompressors/Phantasy Star Gaiden decompressor (fast).asm"
.endb
data: .incbin "data.psgcompr"
|
db MANKEY ; pokedex id
db 40 ; base hp
db 80 ; base attack
db 35 ; base defense
db 70 ; base speed
db 35 ; base special
db FIGHTING ; species type 1
db FIGHTING ; species type 2
db 190 ; catch rate
db 74 ; base exp yield
INCBIN "pic/gsmon/mankey.pic",0,1 ; 55, sprite dimensions
dw MankeyPicFront
dw MankeyPicBack
; attacks known at lvl 0
db SCRATCH
db LEER
db 0
db 0
db 0 ; growth rate
; learnset
tmlearn 1,5,6,8
tmlearn 9,10,16
tmlearn 17,18,19,20,23,24
tmlearn 25,26,28,31,32
tmlearn 34,35,39,40
tmlearn 44,48
tmlearn 50,54
db BANK(MankeyPicFront)
|
; CALLER linkage for function pointers
XLIB bcopy
LIB memcpy_callee
XREF ASMDISP_MEMCPY_CALLEE
.bcopy
pop af
pop bc
pop hl
pop de
push de
push hl
push bc
push af
jp memcpy_callee + ASMDISP_MEMCPY_CALLEE
|
; A005029: 13*2^n.
; 13,26,52,104,208,416,832,1664,3328,6656,13312,26624,53248,106496,212992,425984,851968,1703936,3407872,6815744,13631488,27262976,54525952,109051904,218103808,436207616,872415232,1744830464,3489660928,6979321856,13958643712,27917287424,55834574848,111669149696,223338299392,446676598784,893353197568,1786706395136,3573412790272,7146825580544,14293651161088,28587302322176,57174604644352,114349209288704,228698418577408,457396837154816,914793674309632,1829587348619264,3659174697238528,7318349394477056
mov $1,2
pow $1,$0
mul $1,13
mov $0,$1
|
/*
* Copyright (c) 2016, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file
* This file implements 6LoWPAN header compression.
*/
#include "lowpan.hpp"
#include "common/code_utils.hpp"
#include "common/debug.hpp"
#include "common/encoding.hpp"
#include "common/instance.hpp"
#include "common/locator-getters.hpp"
#include "net/ip6.hpp"
#include "net/udp6.hpp"
#include "thread/network_data_leader.hpp"
#include "thread/thread_netif.hpp"
using ot::Encoding::BigEndian::HostSwap16;
using ot::Encoding::BigEndian::ReadUint16;
using ot::Encoding::BigEndian::WriteUint16;
namespace ot {
namespace Lowpan {
Lowpan::Lowpan(Instance &aInstance)
: InstanceLocator(aInstance)
{
}
void Lowpan::CopyContext(const Context &aContext, Ip6::Address &aAddress)
{
aAddress.SetPrefix(aContext.mPrefix);
}
otError Lowpan::ComputeIid(const Mac::Address &aMacAddr, const Context &aContext, Ip6::Address &aIpAddress)
{
otError error = OT_ERROR_NONE;
switch (aMacAddr.GetType())
{
case Mac::Address::kTypeShort:
aIpAddress.GetIid().SetToLocator(aMacAddr.GetShort());
break;
case Mac::Address::kTypeExtended:
aIpAddress.GetIid().SetFromExtAddress(aMacAddr.GetExtended());
break;
default:
ExitNow(error = OT_ERROR_PARSE);
}
if (aContext.mPrefix.GetLength() > 64)
{
for (int i = (aContext.mPrefix.GetLength() & ~7); i < aContext.mPrefix.GetLength(); i++)
{
aIpAddress.mFields.m8[i / CHAR_BIT] &= ~(0x80 >> (i % CHAR_BIT));
aIpAddress.mFields.m8[i / CHAR_BIT] |= aContext.mPrefix.GetBytes()[i / CHAR_BIT] & (0x80 >> (i % CHAR_BIT));
}
}
exit:
return error;
}
otError Lowpan::CompressSourceIid(const Mac::Address &aMacAddr,
const Ip6::Address &aIpAddr,
const Context & aContext,
uint16_t & aHcCtl,
BufferWriter & aBuf)
{
otError error = OT_ERROR_NONE;
BufferWriter buf = aBuf;
Ip6::Address ipaddr;
Mac::Address tmp;
IgnoreError(ComputeIid(aMacAddr, aContext, ipaddr));
if (ipaddr.GetIid() == aIpAddr.GetIid())
{
aHcCtl |= kHcSrcAddrMode3;
}
else
{
tmp.SetShort(aIpAddr.GetIid().GetLocator());
IgnoreError(ComputeIid(tmp, aContext, ipaddr));
if (ipaddr.GetIid() == aIpAddr.GetIid())
{
aHcCtl |= kHcSrcAddrMode2;
SuccessOrExit(error = buf.Write(aIpAddr.mFields.m8 + 14, 2));
}
else
{
aHcCtl |= kHcSrcAddrMode1;
SuccessOrExit(error = buf.Write(aIpAddr.GetIid().GetBytes(), Ip6::InterfaceIdentifier::kSize));
}
}
exit:
if (error == OT_ERROR_NONE)
{
aBuf = buf;
}
return error;
}
otError Lowpan::CompressDestinationIid(const Mac::Address &aMacAddr,
const Ip6::Address &aIpAddr,
const Context & aContext,
uint16_t & aHcCtl,
BufferWriter & aBuf)
{
otError error = OT_ERROR_NONE;
BufferWriter buf = aBuf;
Ip6::Address ipaddr;
Mac::Address tmp;
IgnoreError(ComputeIid(aMacAddr, aContext, ipaddr));
if (ipaddr.GetIid() == aIpAddr.GetIid())
{
aHcCtl |= kHcDstAddrMode3;
}
else
{
tmp.SetShort(aIpAddr.GetIid().GetLocator());
IgnoreError(ComputeIid(tmp, aContext, ipaddr));
if (ipaddr.GetIid() == aIpAddr.GetIid())
{
aHcCtl |= kHcDstAddrMode2;
SuccessOrExit(error = buf.Write(aIpAddr.mFields.m8 + 14, 2));
}
else
{
aHcCtl |= kHcDstAddrMode1;
SuccessOrExit(error = buf.Write(aIpAddr.GetIid().GetBytes(), Ip6::InterfaceIdentifier::kSize));
}
}
exit:
if (error == OT_ERROR_NONE)
{
aBuf = buf;
}
return error;
}
otError Lowpan::CompressMulticast(const Ip6::Address &aIpAddr, uint16_t &aHcCtl, BufferWriter &aBuf)
{
otError error = OT_ERROR_NONE;
BufferWriter buf = aBuf;
Context multicastContext;
aHcCtl |= kHcMulticast;
for (unsigned int i = 2; i < sizeof(Ip6::Address); i++)
{
if (aIpAddr.mFields.m8[i])
{
// Check if multicast address can be compressed to 8-bits (ff02::00xx)
if (aIpAddr.mFields.m8[1] == 0x02 && i >= 15)
{
aHcCtl |= kHcDstAddrMode3;
SuccessOrExit(error = buf.Write(aIpAddr.mFields.m8[15]));
}
// Check if multicast address can be compressed to 32-bits (ffxx::00xx:xxxx)
else if (i >= 13)
{
aHcCtl |= kHcDstAddrMode2;
SuccessOrExit(error = buf.Write(aIpAddr.mFields.m8[1]));
SuccessOrExit(error = buf.Write(aIpAddr.mFields.m8 + 13, 3));
}
// Check if multicast address can be compressed to 48-bits (ffxx::00xx:xxxx:xxxx)
else if (i >= 11)
{
aHcCtl |= kHcDstAddrMode1;
SuccessOrExit(error = buf.Write(aIpAddr.mFields.m8[1]));
SuccessOrExit(error = buf.Write(aIpAddr.mFields.m8 + 11, 5));
}
else
{
// Check if multicast address can be compressed using Context ID 0.
if (Get<NetworkData::Leader>().GetContext(0, multicastContext) == OT_ERROR_NONE &&
multicastContext.mPrefix.GetLength() == aIpAddr.mFields.m8[3] &&
memcmp(multicastContext.mPrefix.GetBytes(), aIpAddr.mFields.m8 + 4, 8) == 0)
{
aHcCtl |= kHcDstAddrContext | kHcDstAddrMode0;
SuccessOrExit(error = buf.Write(aIpAddr.mFields.m8 + 1, 2));
SuccessOrExit(error = buf.Write(aIpAddr.mFields.m8 + 12, 4));
}
else
{
SuccessOrExit(error = buf.Write(aIpAddr.mFields.m8, sizeof(Ip6::Address)));
}
}
break;
}
}
exit:
if (error == OT_ERROR_NONE)
{
aBuf = buf;
}
return error;
}
otError Lowpan::Compress(Message & aMessage,
const Mac::Address &aMacSource,
const Mac::Address &aMacDest,
BufferWriter & aBuf)
{
otError error;
uint8_t headerDepth = 0xff;
do
{
error = Compress(aMessage, aMacSource, aMacDest, aBuf, headerDepth);
} while ((error != OT_ERROR_NONE) && (headerDepth > 0));
return error;
}
otError Lowpan::Compress(Message & aMessage,
const Mac::Address &aMacSource,
const Mac::Address &aMacDest,
BufferWriter & aBuf,
uint8_t & aHeaderDepth)
{
otError error = OT_ERROR_NONE;
NetworkData::Leader &networkData = Get<NetworkData::Leader>();
uint16_t startOffset = aMessage.GetOffset();
BufferWriter buf = aBuf;
uint16_t hcCtl = kHcDispatch;
Ip6::Header ip6Header;
uint8_t * ip6HeaderBytes = reinterpret_cast<uint8_t *>(&ip6Header);
Context srcContext, dstContext;
bool srcContextValid, dstContextValid;
uint8_t nextHeader;
uint8_t ecn;
uint8_t dscp;
uint8_t headerDepth = 0;
uint8_t headerMaxDepth = aHeaderDepth;
VerifyOrExit(aMessage.Read(aMessage.GetOffset(), sizeof(ip6Header), &ip6Header) == sizeof(ip6Header),
error = OT_ERROR_PARSE);
srcContextValid =
(networkData.GetContext(ip6Header.GetSource(), srcContext) == OT_ERROR_NONE && srcContext.mCompressFlag);
if (!srcContextValid)
{
IgnoreError(networkData.GetContext(0, srcContext));
}
dstContextValid =
(networkData.GetContext(ip6Header.GetDestination(), dstContext) == OT_ERROR_NONE && dstContext.mCompressFlag);
if (!dstContextValid)
{
IgnoreError(networkData.GetContext(0, dstContext));
}
// Lowpan HC Control Bits
SuccessOrExit(error = buf.Advance(sizeof(hcCtl)));
// Context Identifier
if (srcContext.mContextId != 0 || dstContext.mContextId != 0)
{
hcCtl |= kHcContextId;
SuccessOrExit(error = buf.Write(((srcContext.mContextId << 4) | dstContext.mContextId) & 0xff));
}
dscp = ((ip6HeaderBytes[0] << 2) & 0x3c) | (ip6HeaderBytes[1] >> 6);
ecn = (ip6HeaderBytes[1] << 2) & 0xc0;
// Flow Label
if (((ip6HeaderBytes[1] & 0x0f) == 0) && ((ip6HeaderBytes[2]) == 0) && ((ip6HeaderBytes[3]) == 0))
{
if (dscp == 0 && ecn == 0)
{
// Elide Flow Label and Traffic Class.
hcCtl |= kHcTrafficClass | kHcFlowLabel;
}
else
{
// Elide Flow Label and carry Traffic Class in-line.
hcCtl |= kHcFlowLabel;
SuccessOrExit(error = buf.Write(ecn | dscp));
}
}
else if (dscp == 0)
{
// Carry Flow Label and ECN only with 2-bit padding.
hcCtl |= kHcTrafficClass;
SuccessOrExit(error = buf.Write(ecn | (ip6HeaderBytes[1] & 0x0f)));
SuccessOrExit(error = buf.Write(ip6HeaderBytes + 2, 2));
}
else
{
// Carry Flow Label and Traffic Class in-line.
SuccessOrExit(error = buf.Write(ecn | dscp));
SuccessOrExit(error = buf.Write(ip6HeaderBytes[1] & 0x0f));
SuccessOrExit(error = buf.Write(ip6HeaderBytes + 2, 2));
}
// Next Header
switch (ip6Header.GetNextHeader())
{
case Ip6::kProtoHopOpts:
case Ip6::kProtoUdp:
case Ip6::kProtoIp6:
if (headerDepth + 1 < headerMaxDepth)
{
hcCtl |= kHcNextHeader;
break;
}
// fall through
default:
SuccessOrExit(error = buf.Write(static_cast<uint8_t>(ip6Header.GetNextHeader())));
break;
}
// Hop Limit
switch (ip6Header.GetHopLimit())
{
case 1:
hcCtl |= kHcHopLimit1;
break;
case 64:
hcCtl |= kHcHopLimit64;
break;
case 255:
hcCtl |= kHcHopLimit255;
break;
default:
SuccessOrExit(error = buf.Write(ip6Header.GetHopLimit()));
break;
}
// Source Address
if (ip6Header.GetSource().IsUnspecified())
{
hcCtl |= kHcSrcAddrContext;
}
else if (ip6Header.GetSource().IsLinkLocal())
{
SuccessOrExit(error = CompressSourceIid(aMacSource, ip6Header.GetSource(), srcContext, hcCtl, buf));
}
else if (srcContextValid)
{
hcCtl |= kHcSrcAddrContext;
SuccessOrExit(error = CompressSourceIid(aMacSource, ip6Header.GetSource(), srcContext, hcCtl, buf));
}
else
{
SuccessOrExit(error = buf.Write(ip6Header.GetSource().mFields.m8, sizeof(ip6Header.GetSource())));
}
// Destination Address
if (ip6Header.GetDestination().IsMulticast())
{
SuccessOrExit(error = CompressMulticast(ip6Header.GetDestination(), hcCtl, buf));
}
else if (ip6Header.GetDestination().IsLinkLocal())
{
SuccessOrExit(error = CompressDestinationIid(aMacDest, ip6Header.GetDestination(), dstContext, hcCtl, buf));
}
else if (dstContextValid)
{
hcCtl |= kHcDstAddrContext;
SuccessOrExit(error = CompressDestinationIid(aMacDest, ip6Header.GetDestination(), dstContext, hcCtl, buf));
}
else
{
SuccessOrExit(error = buf.Write(&ip6Header.GetDestination(), sizeof(ip6Header.GetDestination())));
}
headerDepth++;
aMessage.MoveOffset(sizeof(ip6Header));
nextHeader = static_cast<uint8_t>(ip6Header.GetNextHeader());
while (headerDepth < headerMaxDepth)
{
switch (nextHeader)
{
case Ip6::kProtoHopOpts:
SuccessOrExit(error = CompressExtensionHeader(aMessage, buf, nextHeader));
break;
case Ip6::kProtoUdp:
error = CompressUdp(aMessage, buf);
ExitNow();
case Ip6::kProtoIp6:
// For IP-in-IP the NH bit of the LOWPAN_NHC encoding MUST be set to zero.
SuccessOrExit(error = buf.Write(kExtHdrDispatch | kExtHdrEidIp6));
error = Compress(aMessage, aMacSource, aMacDest, buf);
// fall through
default:
ExitNow();
}
headerDepth++;
}
exit:
aHeaderDepth = headerDepth;
if (error == OT_ERROR_NONE)
{
IgnoreError(aBuf.Write(hcCtl >> 8));
IgnoreError(aBuf.Write(hcCtl & 0xff));
aBuf = buf;
}
else
{
aMessage.SetOffset(startOffset);
}
return error;
}
otError Lowpan::CompressExtensionHeader(Message &aMessage, BufferWriter &aBuf, uint8_t &aNextHeader)
{
otError error = OT_ERROR_NONE;
BufferWriter buf = aBuf;
uint16_t startOffset = aMessage.GetOffset();
Ip6::ExtensionHeader extHeader;
uint16_t len;
uint8_t padLength = 0;
uint8_t tmpByte;
VerifyOrExit(aMessage.Read(aMessage.GetOffset(), sizeof(extHeader), &extHeader) == sizeof(extHeader),
error = OT_ERROR_PARSE);
aMessage.MoveOffset(sizeof(extHeader));
tmpByte = kExtHdrDispatch | kExtHdrEidHbh;
switch (extHeader.GetNextHeader())
{
case Ip6::kProtoUdp:
case Ip6::kProtoIp6:
tmpByte |= kExtHdrNextHeader;
break;
default:
SuccessOrExit(error = buf.Write(tmpByte));
tmpByte = static_cast<uint8_t>(extHeader.GetNextHeader());
break;
}
SuccessOrExit(error = buf.Write(tmpByte));
len = (extHeader.GetLength() + 1) * 8 - sizeof(extHeader);
// RFC 6282 does not support compressing large extension headers
VerifyOrExit(len <= kExtHdrMaxLength, error = OT_ERROR_FAILED);
// RFC 6282 says: "IPv6 Hop-by-Hop and Destination Options Headers may use a trailing
// Pad1 or PadN to achieve 8-octet alignment. When there is a single trailing Pad1 or PadN
// option of 7 octets or less and the containing header is a multiple of 8 octets, the trailing
// Pad1 or PadN option MAY be elided by the compressor."
if (aNextHeader == Ip6::kProtoHopOpts || aNextHeader == Ip6::kProtoDstOpts)
{
uint16_t offset = aMessage.GetOffset();
Ip6::OptionHeader optionHeader;
while ((offset - aMessage.GetOffset()) < len)
{
VerifyOrExit(aMessage.Read(offset, sizeof(optionHeader), &optionHeader) == sizeof(optionHeader),
error = OT_ERROR_PARSE);
if (optionHeader.GetType() == Ip6::OptionPad1::kType)
{
offset += sizeof(Ip6::OptionPad1);
}
else
{
offset += sizeof(optionHeader) + optionHeader.GetLength();
}
}
// Check if the last option can be compressed.
if (optionHeader.GetType() == Ip6::OptionPad1::kType)
{
padLength = sizeof(Ip6::OptionPad1);
}
else if (optionHeader.GetType() == Ip6::OptionPadN::kType)
{
padLength = sizeof(optionHeader) + optionHeader.GetLength();
}
len -= padLength;
}
VerifyOrExit(aMessage.GetOffset() + len + padLength <= aMessage.GetLength(), error = OT_ERROR_PARSE);
aNextHeader = static_cast<uint8_t>(extHeader.GetNextHeader());
SuccessOrExit(error = buf.Write(static_cast<uint8_t>(len)));
SuccessOrExit(error = buf.Write(aMessage, static_cast<uint8_t>(len)));
aMessage.MoveOffset(len + padLength);
exit:
if (error == OT_ERROR_NONE)
{
aBuf = buf;
}
else
{
aMessage.SetOffset(startOffset);
}
return error;
}
otError Lowpan::CompressUdp(Message &aMessage, BufferWriter &aBuf)
{
otError error = OT_ERROR_NONE;
BufferWriter buf = aBuf;
uint16_t startOffset = aMessage.GetOffset();
Ip6::Udp::Header udpHeader;
uint16_t source;
uint16_t destination;
VerifyOrExit(aMessage.Read(aMessage.GetOffset(), sizeof(udpHeader), &udpHeader) == sizeof(udpHeader),
error = OT_ERROR_PARSE);
source = udpHeader.GetSourcePort();
destination = udpHeader.GetDestinationPort();
if ((source & 0xfff0) == 0xf0b0 && (destination & 0xfff0) == 0xf0b0)
{
SuccessOrExit(error = buf.Write(kUdpDispatch | 3));
SuccessOrExit(error = buf.Write((((source & 0xf) << 4) | (destination & 0xf)) & 0xff));
}
else if ((source & 0xff00) == 0xf000)
{
SuccessOrExit(error = buf.Write(kUdpDispatch | 2));
SuccessOrExit(error = buf.Write(source & 0xff));
SuccessOrExit(error = buf.Write(destination >> 8));
SuccessOrExit(error = buf.Write(destination & 0xff));
}
else if ((destination & 0xff00) == 0xf000)
{
SuccessOrExit(error = buf.Write(kUdpDispatch | 1));
SuccessOrExit(error = buf.Write(source >> 8));
SuccessOrExit(error = buf.Write(source & 0xff));
SuccessOrExit(error = buf.Write(destination & 0xff));
}
else
{
SuccessOrExit(error = buf.Write(kUdpDispatch));
SuccessOrExit(error = buf.Write(&udpHeader, Ip6::Udp::Header::kLengthFieldOffset));
}
SuccessOrExit(error =
buf.Write(reinterpret_cast<uint8_t *>(&udpHeader) + Ip6::Udp::Header::kChecksumFieldOffset, 2));
aMessage.MoveOffset(sizeof(udpHeader));
exit:
if (error == OT_ERROR_NONE)
{
aBuf = buf;
}
else
{
aMessage.SetOffset(startOffset);
}
return error;
}
otError Lowpan::DispatchToNextHeader(uint8_t aDispatch, uint8_t &aNextHeader)
{
otError error = OT_ERROR_NONE;
if ((aDispatch & kExtHdrDispatchMask) == kExtHdrDispatch)
{
switch (aDispatch & kExtHdrEidMask)
{
case kExtHdrEidHbh:
aNextHeader = Ip6::kProtoHopOpts;
ExitNow();
case kExtHdrEidRouting:
aNextHeader = Ip6::kProtoRouting;
ExitNow();
case kExtHdrEidFragment:
aNextHeader = Ip6::kProtoFragment;
ExitNow();
case kExtHdrEidDst:
aNextHeader = Ip6::kProtoDstOpts;
ExitNow();
case kExtHdrEidIp6:
aNextHeader = Ip6::kProtoIp6;
ExitNow();
}
}
else if ((aDispatch & kUdpDispatchMask) == kUdpDispatch)
{
aNextHeader = Ip6::kProtoUdp;
ExitNow();
}
error = OT_ERROR_PARSE;
exit:
return error;
}
int Lowpan::DecompressBaseHeader(Ip6::Header & aIp6Header,
bool & aCompressedNextHeader,
const Mac::Address &aMacSource,
const Mac::Address &aMacDest,
const uint8_t * aBuf,
uint16_t aBufLength)
{
NetworkData::Leader &networkData = Get<NetworkData::Leader>();
otError error = OT_ERROR_PARSE;
const uint8_t * cur = aBuf;
const uint8_t * end = aBuf + aBufLength;
uint16_t hcCtl;
Context srcContext, dstContext;
bool srcContextValid = true, dstContextValid = true;
uint8_t nextHeader;
uint8_t * bytes;
VerifyOrExit(cur + 2 <= end, OT_NOOP);
hcCtl = ReadUint16(cur);
cur += 2;
// check Dispatch bits
VerifyOrExit((hcCtl & kHcDispatchMask) == kHcDispatch, OT_NOOP);
// Context Identifier
srcContext.mPrefix.SetLength(0);
dstContext.mPrefix.SetLength(0);
if ((hcCtl & kHcContextId) != 0)
{
VerifyOrExit(cur < end, OT_NOOP);
if (networkData.GetContext(cur[0] >> 4, srcContext) != OT_ERROR_NONE)
{
srcContextValid = false;
}
if (networkData.GetContext(cur[0] & 0xf, dstContext) != OT_ERROR_NONE)
{
dstContextValid = false;
}
cur++;
}
else
{
IgnoreError(networkData.GetContext(0, srcContext));
IgnoreError(networkData.GetContext(0, dstContext));
}
memset(&aIp6Header, 0, sizeof(aIp6Header));
aIp6Header.Init();
// Traffic Class and Flow Label
if ((hcCtl & kHcTrafficFlowMask) != kHcTrafficFlow)
{
VerifyOrExit(cur < end, OT_NOOP);
bytes = reinterpret_cast<uint8_t *>(&aIp6Header);
bytes[1] |= (cur[0] & 0xc0) >> 2;
if ((hcCtl & kHcTrafficClass) == 0)
{
bytes[0] |= (cur[0] >> 2) & 0x0f;
bytes[1] |= (cur[0] << 6) & 0xc0;
cur++;
}
if ((hcCtl & kHcFlowLabel) == 0)
{
VerifyOrExit(cur + 3 <= end, OT_NOOP);
bytes[1] |= cur[0] & 0x0f;
bytes[2] |= cur[1];
bytes[3] |= cur[2];
cur += 3;
}
}
// Next Header
if ((hcCtl & kHcNextHeader) == 0)
{
VerifyOrExit(cur < end, OT_NOOP);
aIp6Header.SetNextHeader(cur[0]);
cur++;
aCompressedNextHeader = false;
}
else
{
aCompressedNextHeader = true;
}
// Hop Limit
switch (hcCtl & kHcHopLimitMask)
{
case kHcHopLimit1:
aIp6Header.SetHopLimit(1);
break;
case kHcHopLimit64:
aIp6Header.SetHopLimit(64);
break;
case kHcHopLimit255:
aIp6Header.SetHopLimit(255);
break;
default:
VerifyOrExit(cur < end, OT_NOOP);
aIp6Header.SetHopLimit(cur[0]);
cur++;
break;
}
// Source Address
switch (hcCtl & kHcSrcAddrModeMask)
{
case kHcSrcAddrMode0:
if ((hcCtl & kHcSrcAddrContext) == 0)
{
VerifyOrExit(cur + sizeof(Ip6::Address) <= end, OT_NOOP);
memcpy(&aIp6Header.GetSource(), cur, sizeof(aIp6Header.GetSource()));
cur += sizeof(Ip6::Address);
}
break;
case kHcSrcAddrMode1:
VerifyOrExit(cur + Ip6::InterfaceIdentifier::kSize <= end, OT_NOOP);
aIp6Header.GetSource().GetIid().SetBytes(cur);
cur += Ip6::InterfaceIdentifier::kSize;
break;
case kHcSrcAddrMode2:
VerifyOrExit(cur + 2 <= end, OT_NOOP);
aIp6Header.GetSource().mFields.m8[11] = 0xff;
aIp6Header.GetSource().mFields.m8[12] = 0xfe;
memcpy(aIp6Header.GetSource().mFields.m8 + 14, cur, 2);
cur += 2;
break;
case kHcSrcAddrMode3:
IgnoreError(ComputeIid(aMacSource, srcContext, aIp6Header.GetSource()));
break;
}
if ((hcCtl & kHcSrcAddrModeMask) != kHcSrcAddrMode0)
{
if ((hcCtl & kHcSrcAddrContext) == 0)
{
aIp6Header.GetSource().mFields.m16[0] = HostSwap16(0xfe80);
}
else
{
VerifyOrExit(srcContextValid, OT_NOOP);
CopyContext(srcContext, aIp6Header.GetSource());
}
}
if ((hcCtl & kHcMulticast) == 0)
{
// Unicast Destination Address
switch (hcCtl & kHcDstAddrModeMask)
{
case kHcDstAddrMode0:
VerifyOrExit((hcCtl & kHcDstAddrContext) == 0, OT_NOOP);
VerifyOrExit(cur + sizeof(Ip6::Address) <= end, OT_NOOP);
memcpy(&aIp6Header.GetDestination(), cur, sizeof(aIp6Header.GetDestination()));
cur += sizeof(Ip6::Address);
break;
case kHcDstAddrMode1:
VerifyOrExit(cur + Ip6::InterfaceIdentifier::kSize <= end, OT_NOOP);
aIp6Header.GetDestination().GetIid().SetBytes(cur);
cur += Ip6::InterfaceIdentifier::kSize;
break;
case kHcDstAddrMode2:
VerifyOrExit(cur + 2 <= end, OT_NOOP);
aIp6Header.GetDestination().mFields.m8[11] = 0xff;
aIp6Header.GetDestination().mFields.m8[12] = 0xfe;
memcpy(aIp6Header.GetDestination().mFields.m8 + 14, cur, 2);
cur += 2;
break;
case kHcDstAddrMode3:
SuccessOrExit(ComputeIid(aMacDest, dstContext, aIp6Header.GetDestination()));
break;
}
if ((hcCtl & kHcDstAddrContext) == 0)
{
if ((hcCtl & kHcDstAddrModeMask) != 0)
{
aIp6Header.GetDestination().mFields.m16[0] = HostSwap16(0xfe80);
}
}
else
{
VerifyOrExit(dstContextValid, OT_NOOP);
CopyContext(dstContext, aIp6Header.GetDestination());
}
}
else
{
// Multicast Destination Address
aIp6Header.GetDestination().mFields.m8[0] = 0xff;
if ((hcCtl & kHcDstAddrContext) == 0)
{
switch (hcCtl & kHcDstAddrModeMask)
{
case kHcDstAddrMode0:
VerifyOrExit(cur + sizeof(Ip6::Address) <= end, OT_NOOP);
memcpy(aIp6Header.GetDestination().mFields.m8, cur, sizeof(Ip6::Address));
cur += sizeof(Ip6::Address);
break;
case kHcDstAddrMode1:
VerifyOrExit(cur + 6 <= end, OT_NOOP);
aIp6Header.GetDestination().mFields.m8[1] = cur[0];
memcpy(aIp6Header.GetDestination().mFields.m8 + 11, cur + 1, 5);
cur += 6;
break;
case kHcDstAddrMode2:
VerifyOrExit(cur + 4 <= end, OT_NOOP);
aIp6Header.GetDestination().mFields.m8[1] = cur[0];
memcpy(aIp6Header.GetDestination().mFields.m8 + 13, cur + 1, 3);
cur += 4;
break;
case kHcDstAddrMode3:
VerifyOrExit(cur < end, OT_NOOP);
aIp6Header.GetDestination().mFields.m8[1] = 0x02;
aIp6Header.GetDestination().mFields.m8[15] = cur[0];
cur++;
break;
}
}
else
{
switch (hcCtl & kHcDstAddrModeMask)
{
case 0:
VerifyOrExit(cur + 6 <= end, OT_NOOP);
VerifyOrExit(dstContextValid, OT_NOOP);
aIp6Header.GetDestination().mFields.m8[1] = cur[0];
aIp6Header.GetDestination().mFields.m8[2] = cur[1];
aIp6Header.GetDestination().mFields.m8[3] = dstContext.mPrefix.GetLength();
memcpy(aIp6Header.GetDestination().mFields.m8 + 4, dstContext.mPrefix.GetBytes(), 8);
memcpy(aIp6Header.GetDestination().mFields.m8 + 12, cur + 2, 4);
cur += 6;
break;
default:
ExitNow();
}
}
}
if ((hcCtl & kHcNextHeader) != 0)
{
VerifyOrExit(cur < end, OT_NOOP);
SuccessOrExit(DispatchToNextHeader(cur[0], nextHeader));
aIp6Header.SetNextHeader(nextHeader);
}
error = OT_ERROR_NONE;
exit:
return (error == OT_ERROR_NONE) ? static_cast<int>(cur - aBuf) : -1;
}
int Lowpan::DecompressExtensionHeader(Message &aMessage, const uint8_t *aBuf, uint16_t aBufLength)
{
otError error = OT_ERROR_PARSE;
const uint8_t * cur = aBuf;
const uint8_t * end = aBuf + aBufLength;
uint8_t hdr[2];
uint8_t len;
uint8_t nextHeader;
uint8_t ctl = cur[0];
uint8_t padLength;
Ip6::OptionPad1 optionPad1;
Ip6::OptionPadN optionPadN;
VerifyOrExit(cur < end, OT_NOOP);
cur++;
// next header
if (ctl & kExtHdrNextHeader)
{
VerifyOrExit(cur < end, OT_NOOP);
len = cur[0];
cur++;
VerifyOrExit(cur + len <= end, OT_NOOP);
SuccessOrExit(DispatchToNextHeader(cur[len], nextHeader));
hdr[0] = static_cast<uint8_t>(nextHeader);
}
else
{
VerifyOrExit(cur + 2 <= end, OT_NOOP);
hdr[0] = cur[0];
len = cur[1];
cur += 2;
VerifyOrExit(cur + len <= end, OT_NOOP);
}
// length
hdr[1] = BitVectorBytes(sizeof(hdr) + len) - 1;
SuccessOrExit(aMessage.Append(hdr, sizeof(hdr)));
aMessage.MoveOffset(sizeof(hdr));
// payload
SuccessOrExit(aMessage.Append(cur, len));
aMessage.MoveOffset(len);
cur += len;
// The RFC6282 says: "The trailing Pad1 or PadN option MAY be elided by the compressor.
// A decompressor MUST ensure that the containing header is padded out to a multiple of 8 octets
// in length, using a Pad1 or PadN option if necessary."
padLength = 8 - ((len + sizeof(hdr)) & 0x07);
if (padLength != 8)
{
if (padLength == 1)
{
optionPad1.Init();
SuccessOrExit(aMessage.Append(&optionPad1, padLength));
}
else
{
optionPadN.Init(padLength);
SuccessOrExit(aMessage.Append(&optionPadN, padLength));
}
aMessage.MoveOffset(padLength);
}
error = OT_ERROR_NONE;
exit:
return (error == OT_ERROR_NONE) ? static_cast<int>(cur - aBuf) : -1;
}
int Lowpan::DecompressUdpHeader(Ip6::Udp::Header &aUdpHeader, const uint8_t *aBuf, uint16_t aBufLength)
{
otError error = OT_ERROR_PARSE;
const uint8_t *cur = aBuf;
const uint8_t *end = aBuf + aBufLength;
uint8_t udpCtl;
VerifyOrExit(cur < end, OT_NOOP);
udpCtl = cur[0];
cur++;
VerifyOrExit((udpCtl & kUdpDispatchMask) == kUdpDispatch, OT_NOOP);
memset(&aUdpHeader, 0, sizeof(aUdpHeader));
// source and dest ports
switch (udpCtl & kUdpPortMask)
{
case 0:
VerifyOrExit(cur + 4 <= end, OT_NOOP);
aUdpHeader.SetSourcePort(ReadUint16(cur));
aUdpHeader.SetDestinationPort(ReadUint16(cur + 2));
cur += 4;
break;
case 1:
VerifyOrExit(cur + 3 <= end, OT_NOOP);
aUdpHeader.SetSourcePort(ReadUint16(cur));
aUdpHeader.SetDestinationPort(0xf000 | cur[2]);
cur += 3;
break;
case 2:
VerifyOrExit(cur + 3 <= end, OT_NOOP);
aUdpHeader.SetSourcePort(0xf000 | cur[0]);
aUdpHeader.SetDestinationPort(ReadUint16(cur + 1));
cur += 3;
break;
case 3:
VerifyOrExit(cur < end, OT_NOOP);
aUdpHeader.SetSourcePort(0xf0b0 | (cur[0] >> 4));
aUdpHeader.SetDestinationPort(0xf0b0 | (cur[0] & 0xf));
cur++;
break;
}
// checksum
if ((udpCtl & kUdpChecksum) != 0)
{
ExitNow();
}
else
{
VerifyOrExit(cur + 2 <= end, OT_NOOP);
aUdpHeader.SetChecksum(ReadUint16(cur));
cur += 2;
}
error = OT_ERROR_NONE;
exit:
return (error == OT_ERROR_NONE) ? static_cast<int>(cur - aBuf) : -1;
}
int Lowpan::DecompressUdpHeader(Message &aMessage, const uint8_t *aBuf, uint16_t aBufLength, uint16_t aDatagramLength)
{
Ip6::Udp::Header udpHeader;
int headerLen = -1;
headerLen = DecompressUdpHeader(udpHeader, aBuf, aBufLength);
VerifyOrExit(headerLen >= 0, OT_NOOP);
// length
if (aDatagramLength == 0)
{
udpHeader.SetLength(sizeof(udpHeader) + static_cast<uint16_t>(aBufLength - headerLen));
}
else
{
udpHeader.SetLength(aDatagramLength - aMessage.GetOffset());
}
VerifyOrExit(aMessage.Append(&udpHeader, sizeof(udpHeader)) == OT_ERROR_NONE, headerLen = -1);
aMessage.MoveOffset(sizeof(udpHeader));
exit:
return headerLen;
}
int Lowpan::Decompress(Message & aMessage,
const Mac::Address &aMacSource,
const Mac::Address &aMacDest,
const uint8_t * aBuf,
uint16_t aBufLength,
uint16_t aDatagramLength)
{
otError error = OT_ERROR_PARSE;
Ip6::Header ip6Header;
const uint8_t *cur = aBuf;
uint16_t remaining = aBufLength;
bool compressed;
int rval;
uint16_t ip6PayloadLength;
uint16_t compressedLength = 0;
uint16_t currentOffset = aMessage.GetOffset();
VerifyOrExit(remaining >= 2, OT_NOOP);
VerifyOrExit((rval = DecompressBaseHeader(ip6Header, compressed, aMacSource, aMacDest, cur, remaining)) >= 0,
OT_NOOP);
cur += rval;
remaining -= rval;
SuccessOrExit(aMessage.Append(&ip6Header, sizeof(ip6Header)));
aMessage.MoveOffset(sizeof(ip6Header));
while (compressed)
{
VerifyOrExit(remaining >= 1, OT_NOOP);
if ((cur[0] & kExtHdrDispatchMask) == kExtHdrDispatch)
{
if ((cur[0] & kExtHdrEidMask) == kExtHdrEidIp6)
{
compressed = false;
cur++;
remaining--;
VerifyOrExit((rval = Decompress(aMessage, aMacSource, aMacDest, cur, remaining, aDatagramLength)) >= 0,
OT_NOOP);
}
else
{
compressed = (cur[0] & kExtHdrNextHeader) != 0;
VerifyOrExit((rval = DecompressExtensionHeader(aMessage, cur, remaining)) >= 0, OT_NOOP);
}
}
else if ((cur[0] & kUdpDispatchMask) == kUdpDispatch)
{
compressed = false;
VerifyOrExit((rval = DecompressUdpHeader(aMessage, cur, remaining, aDatagramLength)) >= 0, OT_NOOP);
}
else
{
ExitNow();
}
VerifyOrExit(remaining >= rval, OT_NOOP);
cur += rval;
remaining -= rval;
}
compressedLength = static_cast<uint16_t>(cur - aBuf);
if (aDatagramLength)
{
ip6PayloadLength = HostSwap16(aDatagramLength - currentOffset - sizeof(Ip6::Header));
}
else
{
ip6PayloadLength =
HostSwap16(aMessage.GetOffset() - currentOffset - sizeof(Ip6::Header) + aBufLength - compressedLength);
}
aMessage.Write(currentOffset + Ip6::Header::kPayloadLengthFieldOffset, sizeof(ip6PayloadLength), &ip6PayloadLength);
error = OT_ERROR_NONE;
exit:
return (error == OT_ERROR_NONE) ? static_cast<int>(compressedLength) : -1;
}
//---------------------------------------------------------------------------------------------------------------------
// MeshHeader
void MeshHeader::Init(uint16_t aSource, uint16_t aDestination, uint8_t aHopsLeft)
{
mSource = aSource;
mDestination = aDestination;
mHopsLeft = aHopsLeft;
}
bool MeshHeader::IsMeshHeader(const uint8_t *aFrame, uint16_t aFrameLength)
{
return (aFrameLength >= kMinHeaderLength) && ((*aFrame & kDispatchMask) == kDispatch);
}
otError MeshHeader::ParseFrom(const uint8_t *aFrame, uint16_t aFrameLength, uint16_t &aHeaderLength)
{
otError error = OT_ERROR_PARSE;
uint8_t dispatch;
VerifyOrExit(aFrameLength >= kMinHeaderLength, OT_NOOP);
dispatch = *aFrame++;
VerifyOrExit((dispatch & (kDispatchMask | kSourceShort | kDestShort)) == (kDispatch | kSourceShort | kDestShort),
OT_NOOP);
mHopsLeft = (dispatch & kHopsLeftMask);
if (mHopsLeft == kDeepHopsLeft)
{
VerifyOrExit(aFrameLength >= kDeepHopsHeaderLength, OT_NOOP);
mHopsLeft = *aFrame++;
aHeaderLength = kDeepHopsHeaderLength;
}
else
{
aHeaderLength = kMinHeaderLength;
}
mSource = ReadUint16(aFrame);
mDestination = ReadUint16(aFrame + 2);
error = OT_ERROR_NONE;
exit:
return error;
}
otError MeshHeader::ParseFrom(const Message &aMessage)
{
uint16_t headerLength;
return ParseFrom(aMessage, headerLength);
}
otError MeshHeader::ParseFrom(const Message &aMessage, uint16_t &aHeaderLength)
{
uint8_t frame[kDeepHopsHeaderLength];
uint16_t frameLength;
frameLength = aMessage.Read(/* aOffset */ 0, sizeof(frame), frame);
return ParseFrom(frame, frameLength, aHeaderLength);
}
uint16_t MeshHeader::GetHeaderLength(void) const
{
return (mHopsLeft >= kDeepHopsLeft) ? kDeepHopsHeaderLength : kMinHeaderLength;
}
void MeshHeader::DecrementHopsLeft(void)
{
if (mHopsLeft > 0)
{
mHopsLeft--;
}
}
uint16_t MeshHeader::WriteTo(uint8_t *aFrame) const
{
uint8_t *cur = aFrame;
uint8_t dispatch = (kDispatch | kSourceShort | kDestShort);
if (mHopsLeft < kDeepHopsLeft)
{
*cur++ = (dispatch | mHopsLeft);
}
else
{
*cur++ = (dispatch | kDeepHopsLeft);
*cur++ = mHopsLeft;
}
WriteUint16(mSource, cur);
cur += sizeof(uint16_t);
WriteUint16(mDestination, cur);
cur += sizeof(uint16_t);
return static_cast<uint16_t>(cur - aFrame);
}
uint16_t MeshHeader::WriteTo(Message &aMessage, uint16_t aOffset) const
{
uint8_t frame[kDeepHopsHeaderLength];
uint16_t headerLength;
headerLength = WriteTo(frame);
aMessage.Write(aOffset, headerLength, frame);
return headerLength;
}
//---------------------------------------------------------------------------------------------------------------------
// FragmentHeader
void FragmentHeader::Init(uint16_t aSize, uint16_t aTag, uint16_t aOffset)
{
mSize = (aSize & kSizeMask);
mTag = aTag;
mOffset = (aOffset & kOffsetMask);
}
bool FragmentHeader::IsFragmentHeader(const uint8_t *aFrame, uint16_t aFrameLength)
{
return (aFrameLength >= kFirstFragmentHeaderSize) && ((*aFrame & kDispatchMask) == kDispatch);
}
otError FragmentHeader::ParseFrom(const uint8_t *aFrame, uint16_t aFrameLength, uint16_t &aHeaderLength)
{
otError error = OT_ERROR_PARSE;
VerifyOrExit(IsFragmentHeader(aFrame, aFrameLength), OT_NOOP);
mSize = ReadUint16(aFrame + kSizeIndex) & kSizeMask;
mTag = ReadUint16(aFrame + kTagIndex);
if ((*aFrame & kOffsetFlag) == kOffsetFlag)
{
VerifyOrExit(aFrameLength >= kSubsequentFragmentHeaderSize, OT_NOOP);
mOffset = aFrame[kOffsetIndex] * 8;
aHeaderLength = kSubsequentFragmentHeaderSize;
}
else
{
mOffset = 0;
aHeaderLength = kFirstFragmentHeaderSize;
}
error = OT_ERROR_NONE;
exit:
return error;
}
otError FragmentHeader::ParseFrom(const Message &aMessage, uint16_t aOffset, uint16_t &aHeaderLength)
{
uint8_t frame[kSubsequentFragmentHeaderSize];
uint16_t frameLength;
frameLength = aMessage.Read(aOffset, sizeof(frame), frame);
return ParseFrom(frame, frameLength, aHeaderLength);
}
uint16_t FragmentHeader::WriteTo(uint8_t *aFrame) const
{
uint8_t *cur = aFrame;
WriteUint16((kDispatch << 8) + mSize, cur);
cur += sizeof(uint16_t);
WriteUint16(mTag, cur);
cur += sizeof(uint16_t);
if (mOffset != 0)
{
*aFrame |= kOffsetFlag;
*cur++ = static_cast<uint8_t>(mOffset >> 3);
}
return static_cast<uint16_t>(cur - aFrame);
}
} // namespace Lowpan
} // namespace ot
|
#define __gmp_const const
#include <igl/copyleft/cgal/piecewise_constant_winding_number.h>
#include <spdlog/spdlog.h>
#include "cutmesh_validation.hpp"
using namespace mandoline;
std::array<int, 2> grid_cells_fully_utilized_count(const CutCellMesh<3>& ccm) {
auto V = ccm.vertices();
Eigen::MatrixXd IV = V.transpose();
int is_utilized = 0;
int is_not_utilized = 0;
mtao::VecXd vols = ccm.cell_volumes();
std::map<std::array<int, 3>, double> grid_cell_volumes;
for (auto&& [cid, cell] : mtao::iterator::enumerate(ccm.cells())) {
double v = vols(cid);
auto [it, happened] = grid_cell_volumes.try_emplace(cell.grid_cell, v);
if (!happened) {
it->second += v;
}
}
//for (auto&& [c, v] : grid_cell_volumes) {
// spdlog::info("{} {}", fmt::join(c, ","), v);
//}
auto& active_cells = ccm.active_grid_cell_mask();
int active_count =
std::count(active_cells.begin(), active_cells.end(), true);
int unused_cells = active_count - grid_cell_volumes.size();
if (unused_cells > 0) {
std::cout << "Missing " << unused_cells << " cells" << std::endl;
}
int bad_vols = 0;
double cell_vol = ccm.dx().prod();
for (auto&& [c, v] : grid_cell_volumes) {
if (std::abs(1 - v / cell_vol) > 1e-5) {
bad_vols += 1;
} else if (!active_cells.valid_index(c) || !active_cells(c)) {
//spdlog::info("{} : {} {}", fmt::join(c, ","),
// active_cells.valid_index(c), active_cells(c));
unused_cells++;
}
}
return {{bad_vols, unused_cells}};
}
bool grid_cells_fully_utilized(const mandoline::CutCellMesh<3>& ccm) {
auto [a, b] = grid_cells_fully_utilized_count(ccm);
return a == 0 && b == 0;
}
|
TITLE 'bfp-012-loadtest.asm: Test IEEE Test Data Class, Load And Test'
***********************************************************************
*
*Testcase IEEE Test Data Classs and Load And Test
* Exhaustively test results from the Test Data Class instruction.
* Exhaustively test condition code setting from Load And Test.
* The Condition Code, the only result from either instruction, is
* saved for comparison with reference values.
*
***********************************************************************
SPACE 2
***********************************************************************
*
* bfp-012-loadtest.asm
*
* This assembly-language source file is part of the
* Hercules Binary Floating Point Validation Package
* by Stephen R. Orso
*
* Copyright 2016 by Stephen R Orso.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* 3. The name of the author may not be used to endorse or promote
* products derived from this software without specific prior written
* permission.
*
* DISCLAMER: THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* HOLDER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
***********************************************************************
SPACE 2
***********************************************************************
*
* Neither Load And Test nor Test Data Class can result in IEEE
* exceptions. All tests are performed with the FPC set to not trap
* on any exception.
*
* The same test data are used for both Load And Test and Test Data
* Class.
*
* For Load And Test, the result value and condition code are stored.
* For all but SNaN inputs, the result should be the same as the input.
* For SNaN inputs, the result is the corresponding QNaN.
*
* For Test Data Class, 13 Condition codes are stored. The first
* 12 correspond to a one-bit in each of 12 positions of the Test Data
* class second operand mask, and the thirteenth is generated with a
* mask of zero. Test Data Class mask bits:
*
* 1 0 0 0 | 0 0 0 0 | 0 0 0 0 + zero
* 0 1 0 0 | 0 0 0 0 | 0 0 0 0 - zero
* 0 0 1 0 | 0 0 0 0 | 0 0 0 0 + finite
* 0 0 0 1 | 0 0 0 0 | 0 0 0 0 - finite
* 0 0 0 0 | 1 0 0 0 | 0 0 0 0 + tiny
* 0 0 0 0 | 0 1 0 0 | 0 0 0 0 - tiny
* 0 0 0 0 | 0 0 1 0 | 0 0 0 0 + inf
* 0 0 0 0 | 0 0 0 1 | 0 0 0 0 - inf
* 0 0 0 0 | 0 0 0 0 | 1 0 0 0 + QNaN
* 0 0 0 0 | 0 0 0 0 | 0 1 0 0 - QNaN
* 0 0 0 0 | 0 0 0 0 | 0 0 1 0 + SNaN
* 0 0 0 0 | 0 0 0 0 | 0 0 0 1 - SNaN
*
* Tests 3 LOAD AND TEST and 3 TEST DATA CLASS instructions
* LOAD AND TEST (BFP short, RRE) LTEBR
* LOAD AND TEST (BFP long, RRE) LTDBR
* LOAD AND TEST (BFP extended, RRE) LTXBR
* TEST DATA CLASS (BFP short, RRE) LTEBR
* TEST DATA CLASS (BFP long, RRE) LTDBR
* TEST DATA CLASS (BFP extended, RRE) LTXBR
*
* Also tests the following floating point support instructions
* EXTRACT FPC
* LOAD (Short)
* LOAD (Long)
* LOAD ZERO (Long)
* STORE (Short)
* STORE (Long)
* SET FPC
*
***********************************************************************
SPACE 2
MACRO
PADCSECT &ENDLABL
.*
.* Macro to pad the CSECT to include result data areas if this test
.* program is not being assembled using asma. asma generates a core
.* image that is loaded by the loadcore command, and because the
.* core image is a binary stored in Github, it makes sense to make
.* this small effort to keep the core image small.
.*
AIF (D'&ENDLABL).GOODPAD
MNOTE 4,'Missing or invalid CSECT padding label ''&ENDLABL'''
MNOTE *,'No CSECT padding performed'
MEXIT
.*
.GOODPAD ANOP Label valid. See if we're on asma
AIF ('&SYSASM' EQ 'A SMALL MAINFRAME ASSEMBLER').NOPAD
ORG &ENDLABL-1 Not ASMA. Pad CSECT
MEXIT
.*
.NOPAD ANOP
MNOTE *,'asma detected; no CSECT padding performed'
MEND
*
* Note: for compatibility with the z/CMS test rig, do not change
* or use R11, R14, or R15. Everything else is fair game.
*
BFPLTTDC START 0
STRTLABL EQU *
R0 EQU 0 Work register for cc extraction
R1 EQU 1 Current Test Data Class mask
R2 EQU 2 Holds count of test input values
R3 EQU 3 Points to next test input value(s)
R4 EQU 4 Available
R5 EQU 5 Available
R6 EQU 6 Test Data Class top of loop
R7 EQU 7 Ptr to next result for Load And Test
R8 EQU 8 Ptr to next CC for Load And Test
R9 EQU 9 Ptr to next CC for Test Data Class
R10 EQU 10 Pointer to test address list
R11 EQU 11 **Reserved for z/CMS test rig
R12 EQU 12 Test value top of loop
R13 EQU 13 Mainline return address
R14 EQU 14 **Return address for z/CMS test rig
R15 EQU 15 **Base register on z/CMS or Hyperion
*
* Floating Point Register equates to keep the cross reference clean
*
FPR0 EQU 0
FPR1 EQU 1
FPR2 EQU 2
FPR3 EQU 3
FPR4 EQU 4
FPR5 EQU 5
FPR6 EQU 6
FPR7 EQU 7
FPR8 EQU 8
FPR9 EQU 9
FPR10 EQU 10
FPR11 EQU 11
FPR12 EQU 12
FPR13 EQU 13
FPR14 EQU 14
FPR15 EQU 15
*
USING *,R15
*
* Above works on real iron (R15=0 after sysclear)
* and in z/CMS (R15 points to start of load module)
*
SPACE 2
***********************************************************************
*
* Low core definitions, Restart PSW, and Program Check Routine.
*
***********************************************************************
SPACE 2
ORG STRTLABL+X'8E' Program check interrution code
PCINTCD DS H
*
PCOLDPSW EQU STRTLABL+X'150' z/Arch Program check old PSW
*
ORG STRTLABL+X'1A0' z/Arch Restart PSW
DC X'0000000180000000',AD(START)
*
ORG STRTLABL+X'1D0' z/Arch Program check old PSW
DC X'0000000000000000',AD(PROGCHK)
*
* Program check routine. If Data Exception, continue execution at
* the instruction following the program check. Otherwise, hard wait.
* No need to collect data. All interesting DXC stuff is captured
* in the FPCR.
*
ORG STRTLABL+X'200'
PROGCHK DS 0H Program check occured...
CLI PCINTCD+1,X'07' Data Exception?
JNE PCNOTDTA ..no, hardwait (not sure if R15 is ok)
LPSWE PCOLDPSW ..yes, resume program execution
PCNOTDTA DS 0H
LTR R14,R14 Return address provided?
BNZR R14 Yes, return to z/CMS test rig.
LPSWE HARDWAIT Not data exception, enter disabled wait
EJECT
***********************************************************************
*
* Main program. Enable Advanced Floating Point, process test cases.
*
***********************************************************************
SPACE 2
START DS 0H
STCTL R0,R0,CTLR0 Store CR0 to enable AFP
OI CTLR0+1,X'04' Turn on AFP bit
LCTL R0,R0,CTLR0 Reload updated CR0
*
LA R10,SHORTS Point to short BFP test inputs
BAS R13,TESTSBFP Perform short BFP tests
*
LA R10,LONGS Point to long BFP test inputs
BAS R13,TESTLBFP Perform long BFP tests
*
LA R10,EXTDS Point to extended BFP test inputs
BAS R13,TESTXBFP Perform short BFP tests
*
LTR R14,R14 Return address provided?
BNZR R14 ..Yes, return to z/CMS test rig.
LPSWE WAITPSW All done
*
DS 0D Ensure correct alignment for psw
WAITPSW DC X'0002000000000000',AD(0) Normal end - disabled wait
HARDWAIT DC X'0002000000000000',XL6'00',X'DEAD' Abnormal end
*
CTLR0 DS F
FPCREGNT DC X'00000000' FPCR, trap no IEEE exceptions, zero flags
FPCREGTR DC X'F8000000' FPCR, trap all IEEE exceptions, zero flags
*
* Input values parameter list, four fullwords for each test data set
* 1) Count,
* 2) Address of inputs,
* 3) Address to place results, and
* 4) Address to place DXC/Flags/cc values.
*
ORG STRTLABL+X'300' Enable run-time replacement
SHORTS DS 0F Input pairs for short BFP ests
DC A(SBFPINCT)
DC A(SBFPIN)
DC A(SBFPOUT)
DC A(SBFPOCC)
*
LONGS DS 0F Input pairs for long BFP testing
DC A(LBFPINCT)
DC A(LBFPIN)
DC A(LBFPOUT)
DC A(LBFPOCC)
*
EXTDS DS 0F Input pairs for extendedd BFP testing
DC A(XBFPINCT)
DC A(XBFPIN)
DC A(XBFPOUT)
DC A(XBFPOCC)
EJECT
***********************************************************************
* Perform Short BFP Tests. This includes one execution of Load And
* Test, followed by 13 executions of Test Data Class. The result value
* and Condition code are saved for Load And Test, and the Condition
* Code is saved for each execution of Test Data Class.
*
***********************************************************************
SPACE 2
TESTSBFP DS 0H Test short BFP input values
LM R2,R3,0(R10) Get count and address of test input values
LM R7,R8,8(R10) Get address of result and CC areas.
LTR R2,R2 Any test cases?
BZR R13 ..No, return to caller
BASR R12,0 Set top of loop
*
LE FPR8,0(,R3) Get short BFP test value
* Polute the CC result area. Correct
* ..results will clean it up.
MVC 0(16,R8),=X'FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF'
*
LFPC FPCREGNT Set exceptions non-trappable
LE FPR1,SBFPINVL Ensure an unchanged FPR1 is detectable
IPM R0 Get current program mask and CC
N R0,=X'CFFFFFFF' Turn off condition code bits
O R0,=X'20000000' Force condition code two
SPM R0 Set PSW CC to two
LTEBR FPR1,FPR8 Load and Test into FPR1
STE FPR1,0(,R7) Store short BFP result
IPM R0 Retrieve condition code
SRL R0,28 Move CC to low-order r0, dump prog mask
STC R0,0(,R8) Store in CC result area
*
LFPC FPCREGTR Set exceptions non-trappable
LE FPR1,SBFPINVL Ensure an unchanged FPR1 is detectable
IPM R0 Get current program mask and CC
N R0,=X'CFFFFFFF' Turn off condition code bits
O R0,=X'20000000' Force condition code two
SPM R0 Set PSW CC to two
LTEBR FPR1,FPR8 Load and Test into FPR1
STE FPR1,4(,R7) Store short BFP result
IPM R0 Retrieve condition code
SRL R0,28 Move CC to low-order r0, dump prog mask
STC R0,1(,R8) Store in CC result area
EFPC R0 Extract FPC contents to R0
STCM R0,B'0010',2(R8) Store any DXC code
*
LHI R1,4096 Load Test Data Class mask starting point
LA R9,3(,R8) Point to first Test Data Class CC
BASR R6,0 Set start of Test Data Class loop
*
SRL R1,1 Shift to get next class mask value
TCEB FPR8,0(,R1) Test value against class mask
IPM R0 Retrieve condition code
SRL R0,28 Move CC to low-order r0, dump prog mask
STC R0,0(,R9) Store in CC result area
LA R9,1(,R9) Point to next CC slot
LTR R1,R1 Have we tested all masks including zero
BNZR R6 ..no, at least one more to test
LA R3,4(,R3) Point to next short BFP test value
LA R7,8(,R7) Point to next Load And Test result pair
LA R8,16(,R8) Point to next CC result set
BCTR R2,R12 Loop through all test cases
*
BR R13 Tests done, return to mainline
EJECT
***********************************************************************
* Perform long BFP Tests. This includes one execution of Load And
* Test, followed by 13 executions of Test Data Class. The result value
* and Condition code are saved for Load And Test, and the Condition
* Code is saved for each execution of Test Data Class.
*
***********************************************************************
SPACE 2
TESTLBFP DS 0H Test long BFP input values
LM R2,R3,0(R10) Get count and address of test input values
LM R7,R8,8(R10) Get address of result and CC areas.
LTR R2,R2 Any test cases?
BZR R13 ..No, return to caller
BASR R12,0 Set top of loop
*
LD FPR8,0(,R3) Get long BFP test value
* Polute the CC result area. Correct
* ..results will clean it up.
MVC 0(16,R8),=X'FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF'
*
LFPC FPCREGNT Set exceptions non-trappable
LD FPR1,LBFPINVL Ensure an unchanged FPR1 is detectable
IPM R0 Get current program mask and CC
N R0,=X'CFFFFFFF' Turn off condition code bits
O R0,=X'10000000' Force condition code one
SPM R0 Set PSW CC to one
LTDBR FPR1,FPR8 Load and Test into FPR1
STD FPR1,0(,R7) Store long BFP result
IPM R0 Retrieve condition code
SRL R0,28 Move CC to low-order r0, dump prog mask
STC R0,0(,R8) Store in CC result area
*
LFPC FPCREGTR Set exceptions trappable
LD FPR1,LBFPINVL Ensure an unchanged FPR1 is detectable
IPM R0 Get current program mask and CC
N R0,=X'CFFFFFFF' Turn off condition code bits
O R0,=X'10000000' Force condition code one
SPM R0 Set PSW CC to one
LTDBR FPR1,FPR8 Load and Test into FPR1
STD FPR1,8(,R7) Store long BFP result
IPM R0 Retrieve condition code
SRL R0,28 Move CC to low-order r0, dump prog mask
STC R0,1(,R8) Store in CC result area
EFPC R0 Extract FPC contents to R0
STCM R0,B'0010',2(R8) Store any DXC code
*
LHI R1,4096 Load Test Data Class mask starting point
LA R9,3(,R8) Point to first Test Data Class CC
BASR R6,0 Set start of Test Data Class loop
SRL R1,1 Shift to get next class mask value
TCDB FPR8,0(,R1) Test value against class mask
IPM R0 Retrieve condition code
SRL R0,28 Move CC to low-order r0, dump prog mask
STC R0,0(,R9) Store in CC result area
LA R9,1(,R9) Point to next CC slot
LTR R1,R1 Have we tested all masks including zero
BNZR R6 ..no, at least one more to test
LA R3,8(,R3) Point to next long BFP test value
LA R7,16(,R7) Point to next Load And Test result pair
LA R8,16(,R8) Point to next CC result set
BCTR R2,R12 Loop through all test cases
*
BR R13 Tests done, return to mainline
EJECT
***********************************************************************
* Perform extended BFP Tests. This includes one execution of Load And
* Test, followed by 13 executions of Test Data Class. The result value
* and Condition code are saved for Load And Test, and the Condition
* Code is saved for each execution of Test Data Class.
*
***********************************************************************
SPACE 2
TESTXBFP DS 0H Test extended BFP input values
LM R2,R3,0(R10) Get count and address of test input values
LM R7,R8,8(R10) Get address of result and CC areas.
LTR R2,R2 Any test cases?
BZR R13 ..No, return to caller
BASR R12,0 Set top of loop
*
LD FPR8,0(,R3) Get extended BFP test value part 1
LD FPR10,8(,R3) Get extended BFP test value part 2
* Polute the CC result area. Correct
* ..results will clean it up.
MVC 0(16,R8),=X'FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF'
*
LFPC FPCREGNT Set exceptions non-trappable
LD FPR1,XBFPINVL Ensure an unchanged FPR1-3 is detectable
LD FPR3,XBFPINVL+8 ..part 2 of load FPR pair
IPM R0 Get current program mask and CC
N R0,=X'CFFFFFFF' Turn off condition code bits
SPM R0 Set PSW CC to zero
LTXBR FPR1,FPR8 Load and Test into FPR1
STD FPR1,0(,R7) Store extended BFP result part 1
STD FPR3,8(,R7) Store extended BFP result part 2
IPM R0 Retrieve condition code
SRL R0,28 Move CC to low-order r0, dump prog mask
STC R0,0(,R8) Store in CC result area
*
LFPC FPCREGTR Set exceptions trappable
LD FPR1,XBFPINVL Ensure an unchanged FPR1-3 is detectable
LD FPR3,XBFPINVL+8 ..part 2 of load FPR pair
IPM R0 Get current program mask and CC
N R0,=X'CFFFFFFF' Turn off condition code bits
SPM R0 Set PSW CC to zero
LTXBR FPR1,FPR8 Load and Test into FPR1
STD FPR1,16(,R7) Store extended BFP result part 1
STD FPR3,24(,R7) Store extended BFP result part 2
IPM R0 Retrieve condition code
SRL R0,28 Move CC to low-order r0, dump prog mask
STC R0,1(,R8) Store in CC result area
EFPC R0 Extract FPC contents to R0
STCM R0,B'0010',2(R8) Store any DXC code
*
LHI R1,4096 Load Test Data Class mask starting point
LA R9,3(,R8) Point to first Test Data Class CC
BASR R6,0 Set start of Test Data Class loop
SRL R1,1 Shift to get next class mask value
TCXB FPR8,0(,R1) Test value against class mask
IPM R0 Retrieve condition code
SRL R0,28 Move CC to low-order r0, dump prog mask
STC R0,0(,R9) Store in last byte of FPCR
LA R9,1(,R9) Point to next CC slot
LTR R1,R1 Have we tested all masks including zero
BNZR R6 ..no, at least one more to test
LA R3,16(,R3) Point to next extended BFP test value
LA R7,32(,R7) Point to next Load And Test result pair
LA R8,16(,R8) Point to next CC result set
BCTR R2,R12 Loop through all test cases
*
BR R13 Tests done, return to mainline
*
LTORG
EJECT
***********************************************************************
*
* Short integer inputs for Load And Test and Test Data Class. The same
* values are used for short, long, and extended formats.
*
***********************************************************************
SPACE 2
SBFPIN DS 0F Ensure fullword alignment for input table
DC X'00000000' +0
DC X'80000000' -0
DC X'3F800000' +1
DC X'BF800000' -1
DC X'007FFFFF' +subnormal
DC X'807FFFFF' -subnormal
DC X'7F800000' +infinity
DC X'FF800000' -infinity
DC X'7FC00000' +QNaN
DC X'FFC00000' -QNaN
DC X'7F810000' +SNaN
DC X'FF810000' -SNaN
SBFPINCT EQU (*-SBFPIN)/4 count of short BFP test values
*
SBFPINVL DC X'0000DEAD' Invalid result, used to polute result FPR
SPACE 3
***********************************************************************
*
* Long integer inputs for Load And Test and Test Data Class. The same
* values are used for short, long, and extended formats.
*
***********************************************************************
SPACE 2
LBFPIN DS 0D
DC X'0000000000000000' +0
DC X'8000000000000000' -0
DC X'3FF0000000000000' +1
DC X'BFF0000000000000' -1
DC X'000FFFFFFFFFFFFF' +subnormal
DC X'800FFFFFFFFFFFFF' -subnormal
DC X'7FF0000000000000' +infinity
DC X'FFF0000000000000' -infinity
DC X'7FF8000000000000' +QNaN
DC X'FFF8000000000000' -QNaN
DC X'7FF0100000000000' +SNaN
DC X'FFF0100000000000' -SNaN
LBFPINCT EQU (*-LBFPIN)/8 count of long BFP test values
*
LBFPINVL DC X'0000DEAD00000000' Invalid result, used to
* ..polute result FPR
SPACE 3
***********************************************************************
*
* Extended integer inputs for Load And Test and Test Data Class. The
* same values are used for short, long, and extended formats.
*
***********************************************************************
SPACE 2
XBFPIN DS 0D
DC X'00000000000000000000000000000000' +0
DC X'80000000000000000000000000000000' -0
DC X'3FFF0000000000000000000000000000' +1
DC X'BFFF0000000000000000000000000000' -1
DC X'0000FFFFFFFFFFFFFFFFFFFFFFFFFFFF' +subnormal
DC X'8000FFFFFFFFFFFFFFFFFFFFFFFFFFFF' -subnormal
DC X'7FFF0000000000000000000000000000' +infinity
DC X'FFFF0000000000000000000000000000' -infinity
DC X'7FFF8000000000000000000000000000' +QNaN
DC X'FFFF8000000000000000000000000000' -QNaN
DC X'7FFF0100000000000000000000000000' +SNaN
DC X'FFFF0100000000000000000000000000' -SNaN
XBFPINCT EQU (*-XBFPIN)/16 count of extended BFP test values
*
XBFPINVL DC X'0000DEAD000000000000000000000000' Invalid result, used to
* ..used to polute result FPR
SPACE 3
***********************************************************************
*
* Locations for results
*
***********************************************************************
SPACE 2
SBFPOUT EQU STRTLABL+X'1000' Integer short BFP Load and Test
* ..12 used, room for 60 tests
SBFPOCC EQU STRTLABL+X'1100' Condition codes from Load and Test
* ..and Test Data Class.
* ..12 sets used, room for 60 sets
* ..next available is X'1500'
*
LBFPOUT EQU STRTLABL+X'2000' Integer long BFP Load And Test
* ..12 used, room for 32 tests,
LBFPOCC EQU STRTLABL+X'2100' Condition codes from Load and Test
* ..and Test Data Class.
* ..12 sets used, room for 32 sets
* ..next available is X'2300'
*
XBFPOUT EQU STRTLABL+X'3000' Integer extended BFP Load And Test
* ..12 used, room for 32 tests,
XBFPOCC EQU STRTLABL+X'3200' Condition codes from Load and Test
* ..and Test Data Class.
* ..12 sets used, room for 32 sets
* ..next available is X'3400'
*
ENDLABL EQU STRTLABL+X'3400'
PADCSECT ENDLABL
*
END |
; A084568: a(0)=1, a(1)=5, a(n+2)=4a(n), n>0.
; 1,5,8,20,32,80,128,320,512,1280,2048,5120,8192,20480,32768,81920,131072,327680,524288,1310720,2097152,5242880,8388608,20971520,33554432,83886080,134217728,335544320,536870912,1342177280,2147483648
mov $3,$0
add $3,1
mov $8,$0
lpb $3,1
mov $0,$8
sub $3,1
sub $0,$3
mov $2,$0
mov $0,1
add $4,3
mov $6,1
mov $10,1
lpb $2,1
mul $0,$9
sub $2,1
lpb $4,1
mov $0,4
sub $4,$6
mov $5,$2
lpe
lpb $5,1
sub $5,$6
trn $10,$7
lpe
sub $0,1
add $0,$10
trn $2,1
mov $9,4
mov $10,1
lpe
add $1,$0
mov $7,$0
lpe
|
;;
;; Copyright (c) 2012-2020, Intel Corporation
;;
;; Redistribution and use in source and binary forms, with or without
;; modification, are permitted provided that the following conditions are met:
;;
;; * Redistributions of source code must retain the above copyright notice,
;; this list of conditions and the following disclaimer.
;; * Redistributions in binary form must reproduce the above copyright
;; notice, this list of conditions and the following disclaimer in the
;; documentation and/or other materials provided with the distribution.
;; * Neither the name of Intel Corporation nor the names of its contributors
;; may be used to endorse or promote products derived from this software
;; without specific prior written permission.
;;
;; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
;; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
;; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
;; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
;; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
;; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
;; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
;; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
;; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;
;;; routine to do 128 bit AES XCBC
;;; process 4 buffers at a time, single data structure as input
;;; Updates In pointer at end
;; clobbers all registers except for ARG1 and rbp
%include "include/os.asm"
%include "mb_mgr_datastruct.asm"
%include "include/clear_regs.asm"
%ifndef AES_XCBC_X4
%define AES_XCBC_X4 aes_xcbc_mac_128_x4
%endif
%define MOVDQ movdqu ;; assume buffers not aligned
%macro pxor2 2
MOVDQ XTMP, %2
pxor %1, XTMP
%endm
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; struct AES_XCBC_ARGS_x8 {
;; void* in[8];
;; UINT128* keys[8];
;; UINT128 ICV[8];
;; }
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; void aes_xcbc_mac_128_x4(AES_XCBC_ARGS_x8 *args, UINT64 len);
;; arg 1: ARG : addr of AES_XCBC_ARGS_x8 structure
;; arg 2: LEN : len (in units of bytes)
%ifdef LINUX
%define ARG rdi
%define LEN rsi
%define REG3 rcx
%define REG4 rdx
%else
%define ARG rcx
%define LEN rdx
%define REG3 rsi
%define REG4 rdi
%endif
%define IDX rax
%define IN0 r8
%define KEYS0 rbx
%define OUT0 r9
%define IN1 r10
%define KEYS1 REG3
%define OUT1 r11
%define IN2 r12
%define KEYS2 REG4
%define OUT2 r13
%define IN3 r14
%define KEYS3 rbp
%define OUT3 r15
%define XDATA0 xmm0
%define XDATA1 xmm1
%define XDATA2 xmm2
%define XDATA3 xmm3
%define XKEY0_3 xmm4
%define XKEY0_6 [KEYS0 + 16*6]
%define XTMP xmm5
%define XKEY0_9 xmm6
%define XKEY1_3 xmm7
%define XKEY1_6 xmm8
%define XKEY1_9 xmm9
%define XKEY2_3 xmm10
%define XKEY2_6 xmm11
%define XKEY2_9 xmm12
%define XKEY3_3 xmm13
%define XKEY3_6 xmm14
%define XKEY3_9 xmm15
section .text
MKGLOBAL(AES_XCBC_X4,function,internal)
AES_XCBC_X4:
push rbp
mov IDX, 16
mov IN0, [ARG + _aesxcbcarg_in + 8*0]
mov IN1, [ARG + _aesxcbcarg_in + 8*1]
mov IN2, [ARG + _aesxcbcarg_in + 8*2]
mov IN3, [ARG + _aesxcbcarg_in + 8*3]
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
MOVDQ XDATA0, [IN0] ; load first block of plain text
MOVDQ XDATA1, [IN1] ; load first block of plain text
MOVDQ XDATA2, [IN2] ; load first block of plain text
MOVDQ XDATA3, [IN3] ; load first block of plain text
mov KEYS0, [ARG + _aesxcbcarg_keys + 8*0]
mov KEYS1, [ARG + _aesxcbcarg_keys + 8*1]
mov KEYS2, [ARG + _aesxcbcarg_keys + 8*2]
mov KEYS3, [ARG + _aesxcbcarg_keys + 8*3]
pxor XDATA0, [ARG + _aesxcbcarg_ICV + 16*0] ; plaintext XOR ICV
pxor XDATA1, [ARG + _aesxcbcarg_ICV + 16*1] ; plaintext XOR ICV
pxor XDATA2, [ARG + _aesxcbcarg_ICV + 16*2] ; plaintext XOR ICV
pxor XDATA3, [ARG + _aesxcbcarg_ICV + 16*3] ; plaintext XOR ICV
pxor XDATA0, [KEYS0 + 16*0] ; 0. ARK
pxor XDATA1, [KEYS1 + 16*0] ; 0. ARK
pxor XDATA2, [KEYS2 + 16*0] ; 0. ARK
pxor XDATA3, [KEYS3 + 16*0] ; 0. ARK
aesenc XDATA0, [KEYS0 + 16*1] ; 1. ENC
aesenc XDATA1, [KEYS1 + 16*1] ; 1. ENC
aesenc XDATA2, [KEYS2 + 16*1] ; 1. ENC
aesenc XDATA3, [KEYS3 + 16*1] ; 1. ENC
aesenc XDATA0, [KEYS0 + 16*2] ; 2. ENC
aesenc XDATA1, [KEYS1 + 16*2] ; 2. ENC
aesenc XDATA2, [KEYS2 + 16*2] ; 2. ENC
aesenc XDATA3, [KEYS3 + 16*2] ; 2. ENC
movdqa XKEY0_3, [KEYS0 + 16*3] ; load round 3 key
movdqa XKEY1_3, [KEYS1 + 16*3] ; load round 3 key
movdqa XKEY2_3, [KEYS2 + 16*3] ; load round 3 key
movdqa XKEY3_3, [KEYS3 + 16*3] ; load round 3 key
aesenc XDATA0, XKEY0_3 ; 3. ENC
aesenc XDATA1, XKEY1_3 ; 3. ENC
aesenc XDATA2, XKEY2_3 ; 3. ENC
aesenc XDATA3, XKEY3_3 ; 3. ENC
aesenc XDATA0, [KEYS0 + 16*4] ; 4. ENC
aesenc XDATA1, [KEYS1 + 16*4] ; 4. ENC
aesenc XDATA2, [KEYS2 + 16*4] ; 4. ENC
aesenc XDATA3, [KEYS3 + 16*4] ; 4. ENC
aesenc XDATA0, [KEYS0 + 16*5] ; 5. ENC
aesenc XDATA1, [KEYS1 + 16*5] ; 5. ENC
aesenc XDATA2, [KEYS2 + 16*5] ; 5. ENC
aesenc XDATA3, [KEYS3 + 16*5] ; 5. ENC
movdqa XKEY1_6, [KEYS1 + 16*6] ; load round 6 key
movdqa XKEY2_6, [KEYS2 + 16*6] ; load round 6 key
movdqa XKEY3_6, [KEYS3 + 16*6] ; load round 6 key
aesenc XDATA0, XKEY0_6 ; 6. ENC
aesenc XDATA1, XKEY1_6 ; 6. ENC
aesenc XDATA2, XKEY2_6 ; 6. ENC
aesenc XDATA3, XKEY3_6 ; 6. ENC
aesenc XDATA0, [KEYS0 + 16*7] ; 7. ENC
aesenc XDATA1, [KEYS1 + 16*7] ; 7. ENC
aesenc XDATA2, [KEYS2 + 16*7] ; 7. ENC
aesenc XDATA3, [KEYS3 + 16*7] ; 7. ENC
aesenc XDATA0, [KEYS0 + 16*8] ; 8. ENC
aesenc XDATA1, [KEYS1 + 16*8] ; 8. ENC
aesenc XDATA2, [KEYS2 + 16*8] ; 8. ENC
aesenc XDATA3, [KEYS3 + 16*8] ; 8. ENC
movdqa XKEY0_9, [KEYS0 + 16*9] ; load round 9 key
movdqa XKEY1_9, [KEYS1 + 16*9] ; load round 9 key
movdqa XKEY2_9, [KEYS2 + 16*9] ; load round 9 key
movdqa XKEY3_9, [KEYS3 + 16*9] ; load round 9 key
aesenc XDATA0, XKEY0_9 ; 9. ENC
aesenc XDATA1, XKEY1_9 ; 9. ENC
aesenc XDATA2, XKEY2_9 ; 9. ENC
aesenc XDATA3, XKEY3_9 ; 9. ENC
aesenclast XDATA0, [KEYS0 + 16*10] ; 10. ENC
aesenclast XDATA1, [KEYS1 + 16*10] ; 10. ENC
aesenclast XDATA2, [KEYS2 + 16*10] ; 10. ENC
aesenclast XDATA3, [KEYS3 + 16*10] ; 10. ENC
cmp LEN, IDX
je done
main_loop:
pxor2 XDATA0, [IN0 + IDX] ; plaintext XOR ICV
pxor2 XDATA1, [IN1 + IDX] ; plaintext XOR ICV
pxor2 XDATA2, [IN2 + IDX] ; plaintext XOR ICV
pxor2 XDATA3, [IN3 + IDX] ; plaintext XOR ICV
pxor XDATA0, [KEYS0 + 16*0] ; 0. ARK
pxor XDATA1, [KEYS1 + 16*0] ; 0. ARK
pxor XDATA2, [KEYS2 + 16*0] ; 0. ARK
pxor XDATA3, [KEYS3 + 16*0] ; 0. ARK
aesenc XDATA0, [KEYS0 + 16*1] ; 1. ENC
aesenc XDATA1, [KEYS1 + 16*1] ; 1. ENC
aesenc XDATA2, [KEYS2 + 16*1] ; 1. ENC
aesenc XDATA3, [KEYS3 + 16*1] ; 1. ENC
aesenc XDATA0, [KEYS0 + 16*2] ; 2. ENC
aesenc XDATA1, [KEYS1 + 16*2] ; 2. ENC
aesenc XDATA2, [KEYS2 + 16*2] ; 2. ENC
aesenc XDATA3, [KEYS3 + 16*2] ; 2. ENC
aesenc XDATA0, XKEY0_3 ; 3. ENC
aesenc XDATA1, XKEY1_3 ; 3. ENC
aesenc XDATA2, XKEY2_3 ; 3. ENC
aesenc XDATA3, XKEY3_3 ; 3. ENC
aesenc XDATA0, [KEYS0 + 16*4] ; 4. ENC
aesenc XDATA1, [KEYS1 + 16*4] ; 4. ENC
aesenc XDATA2, [KEYS2 + 16*4] ; 4. ENC
aesenc XDATA3, [KEYS3 + 16*4] ; 4. ENC
aesenc XDATA0, [KEYS0 + 16*5] ; 5. ENC
aesenc XDATA1, [KEYS1 + 16*5] ; 5. ENC
aesenc XDATA2, [KEYS2 + 16*5] ; 5. ENC
aesenc XDATA3, [KEYS3 + 16*5] ; 5. ENC
aesenc XDATA0, XKEY0_6 ; 6. ENC
aesenc XDATA1, XKEY1_6 ; 6. ENC
aesenc XDATA2, XKEY2_6 ; 6. ENC
aesenc XDATA3, XKEY3_6 ; 6. ENC
aesenc XDATA0, [KEYS0 + 16*7] ; 7. ENC
aesenc XDATA1, [KEYS1 + 16*7] ; 7. ENC
aesenc XDATA2, [KEYS2 + 16*7] ; 7. ENC
aesenc XDATA3, [KEYS3 + 16*7] ; 7. ENC
aesenc XDATA0, [KEYS0 + 16*8] ; 8. ENC
aesenc XDATA1, [KEYS1 + 16*8] ; 8. ENC
aesenc XDATA2, [KEYS2 + 16*8] ; 8. ENC
aesenc XDATA3, [KEYS3 + 16*8] ; 8. ENC
aesenc XDATA0, XKEY0_9 ; 9. ENC
aesenc XDATA1, XKEY1_9 ; 9. ENC
aesenc XDATA2, XKEY2_9 ; 9. ENC
aesenc XDATA3, XKEY3_9 ; 9. ENC
aesenclast XDATA0, [KEYS0 + 16*10] ; 10. ENC
aesenclast XDATA1, [KEYS1 + 16*10] ; 10. ENC
aesenclast XDATA2, [KEYS2 + 16*10] ; 10. ENC
aesenclast XDATA3, [KEYS3 + 16*10] ; 10. ENC
add IDX, 16
cmp LEN, IDX
jne main_loop
done:
;; update ICV
movdqa [ARG + _aesxcbcarg_ICV + 16*0], XDATA0
movdqa [ARG + _aesxcbcarg_ICV + 16*1], XDATA1
movdqa [ARG + _aesxcbcarg_ICV + 16*2], XDATA2
movdqa [ARG + _aesxcbcarg_ICV + 16*3], XDATA3
;; update IN
add IN0, LEN
mov [ARG + _aesxcbcarg_in + 8*0], IN0
add IN1, LEN
mov [ARG + _aesxcbcarg_in + 8*1], IN1
add IN2, LEN
mov [ARG + _aesxcbcarg_in + 8*2], IN2
add IN3, LEN
mov [ARG + _aesxcbcarg_in + 8*3], IN3
pop rbp
%ifdef SAFE_DATA
clear_all_xmms_sse_asm
%endif ;; SAFE_DATA
ret
%ifdef LINUX
section .note.GNU-stack noalloc noexec nowrite progbits
%endif
|
#include "ThuVien.h"
using namespace std;
int main()
{
//Initialize data
//LƯU Ý: nhớ đỗi đường dẫn phù hơp
const string wd = "E:\\Visual Studio\\ThuVien\\ThuVien\\Data\\";
const string pSachViet = wd + "SachViet.txt";
const string pSachNgoai= wd + "SachNgoai.txt";
const string pDocGia = wd + "DocGia.txt";
DSDG dsdg;
dsdg.nhap_tu_file(pDocGia.c_str());
DSSV dssv;
dssv.nhap_tu_file(pSachViet.c_str());
DSSN dssn;
dssn.nhap_tu_file(pSachNgoai.c_str());
std::vector<Phieu> vPhieu = {
Phieu(
dsdg.danh_sach()[0],
std::list<SachViet>({dssv.danh_sach()[0],dssv.danh_sach()[1],dssv.danh_sach()[2]}),
std::list<SachNgoai>(),
ThoiGian(10,1,2019),
15,
false
),
Phieu(
dsdg.danh_sach()[1],
std::list<SachViet>({dssv.danh_sach()[1]}),
std::list<SachNgoai>({dssn.danh_sach()[1]}),
ThoiGian(1,7,2018),
5,
true
),
Phieu(
dsdg.danh_sach()[2],
std::list<SachViet>({dssv.danh_sach()[2]}),
std::list<SachNgoai>({dssn.danh_sach()[1],dssn.danh_sach()[2]}),
ThoiGian(28,12,2018),
10,
false
),
Phieu(
dsdg.danh_sach()[4],
std::list<SachViet>({dssv.danh_sach()[2], dssv.danh_sach()[3]}),
std::list<SachNgoai>({dssn.danh_sach()[0],dssn.danh_sach()[3]}),
ThoiGian(25,12,2018),
6,
true
),
Phieu(
dsdg.danh_sach()[3],
std::list<SachViet>(),
std::list<SachNgoai>({dssn.danh_sach()[0]}),
ThoiGian(1,1,2018),
10,
false
)
};
DSP dsp(vPhieu);
ThuVien a(dssn, dssv, dsdg, dsp);
a.run();
return 0;
} |
db "PROTECTOR@" ; species name
db "It protects its"
next "child with its"
next "life. The bone of"
page "its skull is five"
next "times harder than"
next "staineless steel.@"
|
/*
* Copyright 2009-2017 Alibaba Cloud All rights reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include <alibabacloud/cms/model/ModifyMonitorGroupRequest.h>
using AlibabaCloud::Cms::Model::ModifyMonitorGroupRequest;
ModifyMonitorGroupRequest::ModifyMonitorGroupRequest() :
RpcServiceRequest("cms", "2019-01-01", "ModifyMonitorGroup")
{
setMethod(HttpRequest::Method::Post);
}
ModifyMonitorGroupRequest::~ModifyMonitorGroupRequest()
{}
std::string ModifyMonitorGroupRequest::getContactGroups()const
{
return contactGroups_;
}
void ModifyMonitorGroupRequest::setContactGroups(const std::string& contactGroups)
{
contactGroups_ = contactGroups;
setParameter("ContactGroups", contactGroups);
}
std::string ModifyMonitorGroupRequest::getGroupId()const
{
return groupId_;
}
void ModifyMonitorGroupRequest::setGroupId(const std::string& groupId)
{
groupId_ = groupId;
setParameter("GroupId", groupId);
}
std::string ModifyMonitorGroupRequest::getGroupName()const
{
return groupName_;
}
void ModifyMonitorGroupRequest::setGroupName(const std::string& groupName)
{
groupName_ = groupName;
setParameter("GroupName", groupName);
}
std::string ModifyMonitorGroupRequest::getBindUrls()const
{
return bindUrls_;
}
void ModifyMonitorGroupRequest::setBindUrls(const std::string& bindUrls)
{
bindUrls_ = bindUrls;
setParameter("BindUrls", bindUrls);
}
long ModifyMonitorGroupRequest::getServiceId()const
{
return serviceId_;
}
void ModifyMonitorGroupRequest::setServiceId(long serviceId)
{
serviceId_ = serviceId;
setParameter("ServiceId", std::to_string(serviceId));
}
|
;;
;; Copyright (c) 2020, Intel Corporation
;;
;; Redistribution and use in source and binary forms, with or without
;; modification, are permitted provided that the following conditions are met:
;;
;; * Redistributions of source code must retain the above copyright notice,
;; this list of conditions and the following disclaimer.
;; * Redistributions in binary form must reproduce the above copyright
;; notice, this list of conditions and the following disclaimer in the
;; documentation and/or other materials provided with the distribution.
;; * Neither the name of Intel Corporation nor the names of its contributors
;; may be used to endorse or promote products derived from this software
;; without specific prior written permission.
;;
;; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
;; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
;; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
;; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
;; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
;; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
;; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
;; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
;; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;
%use smartalign
%include "include/imb_job.asm"
%include "include/reg_sizes.asm"
%include "include/os.asm"
%include "include/clear_regs.asm"
%include "include/aes_common.asm"
%include "include/mb_mgr_datastruct.asm"
%include "include/cet.inc"
default rel
extern ethernet_fcs_avx512_local
;; In System V AMD64 ABI
;; callee saves: RBX, RBP, R12-R15
;; Windows x64 ABI
;; callee saves: RBX, RBP, RDI, RSI, RSP, R12-R15
%define CONCAT(a,b) a %+ b
struc STACKFRAME
_rsp_save: resq 1
_job_save: resq 1
_gpr_save: resq 4
endstruc
%ifdef LINUX
%define arg1 rdi
%define arg2 rsi
%define arg3 rdx
%else
%define arg1 rcx
%define arg2 rdx
%define arg3 r8
%endif
%define job arg1
%define tmp1 rbx
%define tmp2 rbp
%define tmp3 r10
%define tmp4 r11
%define tmp5 r12
%define tmp6 r13
%define tmp7 r8
%define tmp8 r9
section .data
;;; Precomputed constants for CRC32 (Ethernet FCS)
;;; Details of the CRC algorithm and 4 byte buffer of
;;; {0x01, 0x02, 0x03, 0x04}:
;;; Result Poly Init RefIn RefOut XorOut
;;; 0xB63CFBCD 0x04C11DB7 0xFFFFFFFF true true 0xFFFFFFFF
align 16
rk5:
dq 0x00000000ccaa009e, 0x0000000163cd6124
rk7:
dq 0x00000001f7011640, 0x00000001db710640
align 16
fold_by_16: ;; fold by 16x128-bits
dq 0x00000000e95c1271, 0x00000000ce3371cb
fold_by_8: ;; fold by 8x128-bits
dq 0x000000014a7fe880, 0x00000001e88ef372
fold_by_4: ;; fold by 4x128-bits
dq 0x00000001c6e41596, 0x0000000154442bd4
fold_by_2: ;; fold by 2x128-bits
dq 0x000000015a546366, 0x00000000f1da05aa
fold_by_1: ;; fold by 1x128-bits
dq 0x00000000ccaa009e, 0x00000001751997d0
align 16
pshufb_shf_table:
;; use these values for shift registers with the pshufb instruction
dq 0x8786858483828100, 0x8f8e8d8c8b8a8988
dq 0x0706050403020100, 0x000e0d0c0b0a0908
align 16
init_crc_value:
dq 0x00000000FFFFFFFF, 0x0000000000000000
align 16
mask:
dq 0xFFFFFFFFFFFFFFFF, 0x0000000000000000
align 16
mask2:
dq 0xFFFFFFFF00000000, 0xFFFFFFFFFFFFFFFF
align 16
mask3:
dq 0x8080808080808080, 0x8080808080808080
align 16
mask_out_top_bytes:
dq 0xFFFFFFFFFFFFFFFF, 0xFFFFFFFFFFFFFFFF
dq 0x0000000000000000, 0x0000000000000000
;;; partial block read/write table
align 64
byte_len_to_mask_table:
dw 0x0000, 0x0001, 0x0003, 0x0007,
dw 0x000f, 0x001f, 0x003f, 0x007f,
dw 0x00ff, 0x01ff, 0x03ff, 0x07ff,
dw 0x0fff, 0x1fff, 0x3fff, 0x7fff,
dw 0xffff
section .text
;; ===================================================================
;; ===================================================================
;; CRC multiply before XOR against data block
;; ===================================================================
%macro CRC_CLMUL 4
%define %%XCRC_IN_OUT %1 ; [in/out] XMM with CRC (can be anything if "no_crc" below)
%define %%XCRC_MUL %2 ; [in] XMM with CRC constant (can be anything if "no_crc" below)
%define %%XCRC_DATA %3 ; [in] XMM with data block
%define %%XTMP %4 ; [clobbered] temporary XMM
vpclmulqdq %%XTMP, %%XCRC_IN_OUT, %%XCRC_MUL, 0x01
vpclmulqdq %%XCRC_IN_OUT, %%XCRC_IN_OUT, %%XCRC_MUL, 0x10
vpternlogq %%XCRC_IN_OUT, %%XTMP, %%XCRC_DATA, 0x96 ; XCRC = XCRC ^ XTMP ^ DATA
%endmacro
;; ===================================================================
;; ===================================================================
;; CRC32 calculation on 16 byte data
;; ===================================================================
%macro CRC_UPDATE16 6
%define %%INP %1 ; [in/out] GP with input text pointer or "no_load"
%define %%XCRC_IN_OUT %2 ; [in/out] XMM with CRC (can be anything if "no_crc" below)
%define %%XCRC_MUL %3 ; [in] XMM with CRC multiplier constant
%define %%TXMM1 %4 ; [clobbered|in] XMM temporary or data in (no_load)
%define %%TXMM2 %5 ; [clobbered] XMM temporary
%define %%CRC_TYPE %6 ; [in] "first_crc" or "next_crc" or "no_crc"
;; load data and increment in pointer
%ifnidn %%INP, no_load
vmovdqu64 %%TXMM1, [%%INP]
add %%INP, 16
%endif
;; CRC calculation
%ifidn %%CRC_TYPE, next_crc
CRC_CLMUL %%XCRC_IN_OUT, %%XCRC_MUL, %%TXMM1, %%TXMM2
%endif
%ifidn %%CRC_TYPE, first_crc
;; in the first run just XOR initial CRC with the first block
vpxorq %%XCRC_IN_OUT, %%TXMM1
%endif
%endmacro
;; ===================================================================
;; ===================================================================
;; Barrett reduction from 128-bits to 32-bits modulo Ethernet FCS polynomial
;; ===================================================================
%macro CRC32_REDUCE_128_TO_32 5
%define %%CRC %1 ; [out] GP to store 32-bit Ethernet FCS value
%define %%XCRC %2 ; [in/clobbered] XMM with CRC
%define %%XT1 %3 ; [clobbered] temporary xmm register
%define %%XT2 %4 ; [clobbered] temporary xmm register
%define %%XT3 %5 ; [clobbered] temporary xmm register
%define %%XCRCKEY %%XT3
;; compute crc of a 128-bit value
vmovdqa64 %%XCRCKEY, [rel rk5]
;; 64b fold
vpclmulqdq %%XT1, %%XCRC, %%XCRCKEY, 0x00
vpsrldq %%XCRC, %%XCRC, 8
vpxorq %%XCRC, %%XCRC, %%XT1
;; 32b fold
vpslldq %%XT1, %%XCRC, 4
vpclmulqdq %%XT1, %%XT1, %%XCRCKEY, 0x10
vpxorq %%XCRC, %%XCRC, %%XT1
%%_crc_barrett:
;; Barrett reduction
vpandq %%XCRC, [rel mask2]
vmovdqa64 %%XT1, %%XCRC
vmovdqa64 %%XT2, %%XCRC
vmovdqa64 %%XCRCKEY, [rel rk7]
vpclmulqdq %%XCRC, %%XCRCKEY, 0x00
vpxorq %%XCRC, %%XT2
vpandq %%XCRC, [rel mask]
vmovdqa64 %%XT2, %%XCRC
vpclmulqdq %%XCRC, %%XCRCKEY, 0x10
vpternlogq %%XCRC, %%XT2, %%XT1, 0x96 ; XCRC = XCRC ^ XT2 ^ XT1
vpextrd DWORD(%%CRC), %%XCRC, 2 ; 32-bit CRC value
not DWORD(%%CRC)
%endmacro
;; ===================================================================
;; ===================================================================
;; Barrett reduction from 64-bits to 32-bits modulo Ethernet FCS polynomial
;; ===================================================================
%macro CRC32_REDUCE_64_TO_32 5
%define %%CRC %1 ; [out] GP to store 32-bit Ethernet FCS value
%define %%XCRC %2 ; [in/clobbered] XMM with CRC
%define %%XT1 %3 ; [clobbered] temporary xmm register
%define %%XT2 %4 ; [clobbered] temporary xmm register
%define %%XT3 %5 ; [clobbered] temporary xmm register
%define %%XCRCKEY %%XT3
;; Barrett reduction
vpandq %%XCRC, [rel mask2]
vmovdqa64 %%XT1, %%XCRC
vmovdqa64 %%XT2, %%XCRC
vmovdqa64 %%XCRCKEY, [rel rk7]
vpclmulqdq %%XCRC, %%XCRCKEY, 0x00
vpxorq %%XCRC, %%XT2
vpandq %%XCRC, [rel mask]
vmovdqa64 %%XT2, %%XCRC
vpclmulqdq %%XCRC, %%XCRCKEY, 0x10
vpternlogq %%XCRC, %%XT2, %%XT1, 0x96 ; XCRC = XCRC ^ XT2 ^ XT1
vpextrd DWORD(%%CRC), %%XCRC, 2 ; 32-bit CRC value
not DWORD(%%CRC)
%endmacro
;; ===================================================================
;; ===================================================================
;; ETHERNET FCS CRC
;; ===================================================================
%macro ETHERNET_FCS_CRC 9
%define %%p_in %1 ; [in] pointer to the buffer (GPR)
%define %%bytes_to_crc %2 ; [in] number of bytes in the buffer (GPR)
%define %%ethernet_fcs %3 ; [out] GPR to put CRC value into (32 bits)
%define %%xcrc %4 ; [in] initial CRC value (xmm)
%define %%tmp %5 ; [clobbered] temporary GPR
%define %%xcrckey %6 ; [clobbered] temporary XMM / CRC multiplier
%define %%xtmp1 %7 ; [clobbered] temporary XMM
%define %%xtmp2 %8 ; [clobbered] temporary XMM
%define %%xtmp3 %9 ; [clobbered] temporary XMM
;; load CRC constants
vmovdqa64 %%xcrckey, [rel fold_by_1]
cmp %%bytes_to_crc, 32
jae %%_at_least_32_bytes
;; less than 32 bytes
cmp %%bytes_to_crc, 16
je %%_exact_16_left
jl %%_less_than_16_left
;; load the plain-text
vmovdqu64 %%xtmp1, [%%p_in]
vpxorq %%xcrc, %%xtmp1 ; xor the initial crc value
add %%p_in, 16
sub %%bytes_to_crc, 16
jmp %%_crc_two_xmms
%%_exact_16_left:
vmovdqu64 %%xtmp1, [%%p_in]
vpxorq %%xcrc, %%xtmp1 ; xor the initial CRC value
jmp %%_128_done
%%_less_than_16_left:
lea %%tmp, [rel byte_len_to_mask_table]
kmovw k1, [%%tmp + %%bytes_to_crc*2]
vmovdqu8 %%xtmp1{k1}{z}, [%%p_in]
vpxorq %%xcrc, %%xtmp1 ; xor the initial CRC value
cmp %%bytes_to_crc, 4
jb %%_less_than_4_left
lea %%tmp, [rel pshufb_shf_table]
vmovdqu64 %%xtmp1, [%%tmp + %%bytes_to_crc]
vpshufb %%xcrc, %%xtmp1
jmp %%_128_done
%%_less_than_4_left:
;; less than 4 bytes left
cmp %%bytes_to_crc, 3
jne %%_less_than_3_left
vpslldq %%xcrc, 5
jmp %%_do_barret
%%_less_than_3_left:
cmp %%bytes_to_crc, 2
jne %%_less_than_2_left
vpslldq %%xcrc, 6
jmp %%_do_barret
%%_less_than_2_left:
vpslldq %%xcrc, 7
%%_do_barret:
CRC32_REDUCE_64_TO_32 %%ethernet_fcs, %%xcrc, %%xtmp1, %%xtmp2, %%xcrckey
jmp %%_64_done
%%_at_least_32_bytes:
CRC_UPDATE16 %%p_in, %%xcrc, %%xcrckey, %%xtmp1, %%xtmp2, first_crc
sub %%bytes_to_crc, 16
%%_main_loop:
cmp %%bytes_to_crc, 16
jb %%_exit_loop
CRC_UPDATE16 %%p_in, %%xcrc, %%xcrckey, %%xtmp1, %%xtmp2, next_crc
sub %%bytes_to_crc, 16
jz %%_128_done
jmp %%_main_loop
%%_exit_loop:
;; Partial bytes left - complete CRC calculation
%%_crc_two_xmms:
lea %%tmp, [rel pshufb_shf_table]
vmovdqu64 %%xtmp2, [%%tmp + %%bytes_to_crc]
vmovdqu64 %%xtmp1, [%%p_in - 16 + %%bytes_to_crc] ; xtmp1 = data for CRC
vmovdqa64 %%xtmp3, %%xcrc
vpshufb %%xcrc, %%xtmp2 ; top num_bytes with LSB xcrc
vpxorq %%xtmp2, [rel mask3]
vpshufb %%xtmp3, %%xtmp2 ; bottom (16 - num_bytes) with MSB xcrc
;; data num_bytes (top) blended with MSB bytes of CRC (bottom)
vpblendvb %%xtmp3, %%xtmp1, %%xtmp2
;; final CRC calculation
CRC_CLMUL %%xcrc, %%xcrckey, %%xtmp3, %%xtmp1
%%_128_done:
CRC32_REDUCE_128_TO_32 %%ethernet_fcs, %%xcrc, %%xtmp1, %%xtmp2, %%xcrckey
%%_64_done:
%endmacro
;; ===================================================================
;; ===================================================================
;; AES128/256 CBC decryption on 1 to 16 blocks
;; ===================================================================
%macro AES_CBC_DEC_1_TO_16 17
%define %%SRC %1 ; [in] GP with pointer to source buffer
%define %%DST %2 ; [in] GP with pointer to destination buffer
%define %%NUMBL %3 ; [in] numerical constant with number of blocks to process
%define %%OFFS %4 ; [in/out] GP with src/dst buffer offset
%define %%NBYTES %5 ; [in/out] GP with number of bytes to decrypt
%define %%KEY_PTR %6 ; [in] GP with pointer to expanded AES decrypt keys
%define %%ZIV %7 ; [in/out] IV in / last cipher text block on out (xmm0 - xmm15)
%define %%NROUNDS %8 ; [in] number of rounds; numerical value
%define %%CIPHER_00_03 %9 ; [out] ZMM next 0-3 cipher blocks
%define %%CIPHER_04_07 %10 ; [out] ZMM next 4-7 cipher blocks
%define %%CIPHER_08_11 %11 ; [out] ZMM next 8-11 cipher blocks
%define %%CIPHER_12_15 %12 ; [out] ZMM next 12-15 cipher blocks
%define %%ZT1 %13 ; [clobbered] ZMM temporary
%define %%ZT2 %14 ; [clobbered] ZMM temporary
%define %%ZT3 %15 ; [clobbered] ZMM temporary
%define %%ZT4 %16 ; [clobbered] ZMM temporary
%define %%ZT5 %17 ; [clobbered] ZMM temporary
;; /////////////////////////////////////////////////
;; load cipher text
ZMM_LOAD_BLOCKS_0_16 %%NUMBL, %%SRC, %%OFFS, \
%%CIPHER_00_03, %%CIPHER_04_07, \
%%CIPHER_08_11, %%CIPHER_12_15
;; /////////////////////////////////////////////////
;; prepare cipher text blocks for an XOR after AES-DEC rounds
valignq %%ZT1, %%CIPHER_00_03, %%ZIV, 6
%if %%NUMBL > 4
valignq %%ZT2, %%CIPHER_04_07, %%CIPHER_00_03, 6
%endif
%if %%NUMBL > 8
valignq %%ZT3, %%CIPHER_08_11, %%CIPHER_04_07, 6
%endif
%if %%NUMBL > 12
valignq %%ZT4, %%CIPHER_12_15, %%CIPHER_08_11, 6
%endif
;; /////////////////////////////////////////////////
;; update IV with the last cipher block
%if %%NUMBL < 4
valignq %%ZIV, %%CIPHER_00_03, %%CIPHER_00_03, ((%%NUMBL % 4) * 2)
%elif %%NUMBL == 4
vmovdqa64 %%ZIV, %%CIPHER_00_03
%elif %%NUMBL < 8
valignq %%ZIV, %%CIPHER_04_07, %%CIPHER_04_07, ((%%NUMBL % 4) * 2)
%elif %%NUMBL == 8
vmovdqa64 %%ZIV, %%CIPHER_04_07
%elif %%NUMBL < 12
valignq %%ZIV, %%CIPHER_08_11, %%CIPHER_08_11, ((%%NUMBL % 4) * 2)
%elif %%NUMBL == 12
vmovdqa64 %%ZIV, %%CIPHER_08_11
%elif %%NUMBL < 16
valignq %%ZIV, %%CIPHER_12_15, %%CIPHER_12_15, ((%%NUMBL % 4) * 2)
%else ;; %%NUMBL == 16
vmovdqa64 %%ZIV, %%CIPHER_12_15
%endif
;; /////////////////////////////////////////////////
;; AES rounds including XOR
%assign j 0
%rep (%%NROUNDS + 2)
vbroadcastf64x2 %%ZT5, [%%KEY_PTR + (j * 16)]
ZMM_AESDEC_ROUND_BLOCKS_0_16 %%CIPHER_00_03, %%CIPHER_04_07, \
%%CIPHER_08_11, %%CIPHER_12_15, \
%%ZT5, j, %%ZT1, %%ZT2, %%ZT3, %%ZT4, \
%%NUMBL, %%NROUNDS
%assign j (j + 1)
%endrep
;; /////////////////////////////////////////////////
;; write plain text back to output
ZMM_STORE_BLOCKS_0_16 %%NUMBL, %%DST, %%OFFS, \
%%CIPHER_00_03, %%CIPHER_04_07, \
%%CIPHER_08_11, %%CIPHER_12_15
;; /////////////////////////////////////////////////
;; update lengths and offset
add %%OFFS, (%%NUMBL * 16)
sub %%NBYTES, (%%NUMBL * 16)
%endmacro ;; AES_CBC_DEC_1_TO_16
;; ===================================================================
;; ===================================================================
;; CRC32 on 1 to 16 blocks (first_crc case only)
;; ===================================================================
%macro CRC32_FIRST_1_TO_16 13
%define %%CRC_MUL %1 ; [in] XMM with CRC multiplier
%define %%CRC_IN_OUT %2 ; [in/out] current CRC value
%define %%XTMP %3 ; [clobbered] temporary XMM
%define %%XTMP2 %4 ; [clobbered] temporary XMM
%define %%NUMBL %5 ; [in] number of blocks of clear text to compute CRC on
%define %%ZCRCIN0 %6 ; [in] clear text 4 blocks
%define %%ZCRCIN1 %7 ; [in] clear text 4 blocks
%define %%ZCRCIN2 %8 ; [in] clear text 4 blocks
%define %%ZCRCIN3 %9 ; [in] clear text 4 blocks
%define %%ZCRCSUM0 %10 ; [clobbered] temporary ZMM
%define %%ZCRCSUM1 %11 ; [clobbered] temporary ZMM
%define %%ZCRCSUM2 %12 ; [clobbered] temporary ZMM
%define %%ZCRCSUM3 %13 ; [clobbered] temporary ZMM
%xdefine %%ZTMP0 ZWORD(%%XTMP)
%xdefine %%ZTMP1 ZWORD(%%XTMP2)
%if (%%NUMBL == 0)
;; do nothing
%elif (%%NUMBL == 1)
vpxorq %%CRC_IN_OUT, XWORD(%%ZCRCIN0)
%elif (%%NUMBL == 16)
vmovdqa64 %%ZCRCSUM0, %%ZCRCIN0
vmovdqa64 %%ZCRCSUM1, %%ZCRCIN1
vmovdqa64 %%ZCRCSUM2, %%ZCRCIN2
vmovdqa64 %%ZCRCSUM3, %%ZCRCIN3
;; Add current CRC sum into block 0
vmovdqa64 %%CRC_IN_OUT, %%CRC_IN_OUT
vpxorq %%ZCRCSUM0, %%ZCRCSUM0, ZWORD(%%CRC_IN_OUT)
;; fold 16 x 128 bits -> 8 x 128 bits
vbroadcastf64x2 %%ZTMP0, [rel fold_by_8]
vpclmulqdq %%ZTMP1, %%ZCRCSUM0, %%ZTMP0, 0x01
vpclmulqdq %%ZCRCSUM0, %%ZCRCSUM0, %%ZTMP0, 0x10
vpternlogq %%ZCRCSUM0, %%ZCRCSUM2, %%ZTMP1, 0x96
vpclmulqdq %%ZTMP1, %%ZCRCSUM1, %%ZTMP0, 0x01
vpclmulqdq %%ZCRCSUM1, %%ZCRCSUM1, %%ZTMP0, 0x10
vpternlogq %%ZCRCSUM1, %%ZCRCSUM3, %%ZTMP1, 0x96
;; fold 8 x 128 bits -> 4 x 128 bits
vbroadcastf64x2 %%ZTMP0, [rel fold_by_4]
vpclmulqdq %%ZTMP1, %%ZCRCSUM0, %%ZTMP0, 0x01
vpclmulqdq %%ZCRCSUM0, %%ZCRCSUM0, %%ZTMP0, 0x10
vpternlogq %%ZCRCSUM0, %%ZCRCSUM1, %%ZTMP1, 0x96
;; fold 4 x 128 bits -> 2 x 128 bits
vbroadcastf64x2 YWORD(%%ZTMP0), [rel fold_by_2]
vextracti64x4 YWORD(%%ZCRCSUM1), %%ZCRCSUM0, 1
vpclmulqdq YWORD(%%ZTMP1), YWORD(%%ZCRCSUM0), YWORD(%%ZTMP0), 0x01
vpclmulqdq YWORD(%%ZCRCSUM0), YWORD(%%ZCRCSUM0), YWORD(%%ZTMP0), 0x10
vpternlogq YWORD(%%ZCRCSUM0), YWORD(%%ZCRCSUM1), YWORD(%%ZTMP1), 0x96
;; fold 2 x 128 bits -> 1 x 128 bits
vmovdqa64 XWORD(%%ZTMP0), [rel fold_by_1]
vextracti64x2 XWORD(%%ZCRCSUM1), YWORD(%%ZCRCSUM0), 1
vpclmulqdq XWORD(%%ZTMP1), XWORD(%%ZCRCSUM0), XWORD(%%ZTMP0), 0x01
vpclmulqdq XWORD(%%ZCRCSUM0), XWORD(%%ZCRCSUM0), XWORD(%%ZTMP0), 0x10
vpternlogq XWORD(%%ZCRCSUM0), XWORD(%%ZCRCSUM1), XWORD(%%ZTMP1), 0x96
vmovdqa64 %%CRC_IN_OUT, XWORD(%%ZCRCSUM0)
%else
vpxorq %%ZCRCSUM0, %%ZCRCSUM0
vpxorq %%ZCRCSUM1, %%ZCRCSUM1
vpxorq %%ZCRCSUM2, %%ZCRCSUM2
vpxorq %%ZCRCSUM3, %%ZCRCSUM3
vmovdqa64 %%ZCRCSUM0, %%ZCRCIN0
%if %%NUMBL > 4
vmovdqa64 %%ZCRCSUM1, %%ZCRCIN1
%endif
%if %%NUMBL > 8
vmovdqa64 %%ZCRCSUM2, %%ZCRCIN2
%endif
%if %%NUMBL > 12
vmovdqa64 %%ZCRCSUM3, %%ZCRCIN3
%endif
;; Add current CRC sum into block 0
vmovdqa64 %%CRC_IN_OUT, %%CRC_IN_OUT
vpxorq %%ZCRCSUM0, %%ZCRCSUM0, ZWORD(%%CRC_IN_OUT)
%assign blocks_left %%NUMBL
%if (%%NUMBL >= 12)
vbroadcastf64x2 %%ZTMP0, [rel fold_by_4]
vpclmulqdq %%ZTMP1, %%ZCRCSUM0, %%ZTMP0, 0x01
vpclmulqdq %%ZCRCSUM0, %%ZCRCSUM0, %%ZTMP0, 0x10
vpternlogq %%ZCRCSUM0, %%ZCRCSUM1, %%ZTMP1, 0x96
vpclmulqdq %%ZTMP1, %%ZCRCSUM0, %%ZTMP0, 0x01
vpclmulqdq %%ZCRCSUM0, %%ZCRCSUM0, %%ZTMP0, 0x10
vpternlogq %%ZCRCSUM0, %%ZCRCSUM2, %%ZTMP1, 0x96
vmovdqa64 %%ZCRCSUM1, %%ZCRCSUM3
%assign blocks_left (blocks_left - 8)
%elif (%%NUMBL >= 8)
vbroadcastf64x2 %%ZTMP0, [rel fold_by_4]
vpclmulqdq %%ZTMP1, %%ZCRCSUM0, %%ZTMP0, 0x01
vpclmulqdq %%ZCRCSUM0, %%ZCRCSUM0, %%ZTMP0, 0x10
vpternlogq %%ZCRCSUM0, %%ZCRCSUM1, %%ZTMP1, 0x96
vmovdqa64 %%ZCRCSUM1, %%ZCRCSUM2
%assign blocks_left (blocks_left - 4)
%endif
;; 1 to 8 blocks left in ZCRCSUM0 and ZCRCSUM1
%if blocks_left >= 4
;; fold 4 x 128 bits -> 2 x 128 bits
vbroadcastf64x2 YWORD(%%ZTMP0), [rel fold_by_2]
vextracti64x4 YWORD(%%ZCRCSUM3), %%ZCRCSUM0, 1
vpclmulqdq YWORD(%%ZTMP1), YWORD(%%ZCRCSUM0), YWORD(%%ZTMP0), 0x01
vpclmulqdq YWORD(%%ZCRCSUM0), YWORD(%%ZCRCSUM0), YWORD(%%ZTMP0), 0x10
vpternlogq YWORD(%%ZCRCSUM0), YWORD(%%ZCRCSUM3), YWORD(%%ZTMP1), 0x96
;; fold 2 x 128 bits -> 1 x 128 bits
vmovdqa64 XWORD(%%ZTMP0), [rel fold_by_1]
vextracti64x2 XWORD(%%ZCRCSUM3), YWORD(%%ZCRCSUM0), 1
vpclmulqdq XWORD(%%ZTMP1), XWORD(%%ZCRCSUM0), XWORD(%%ZTMP0), 0x01
vpclmulqdq XWORD(%%ZCRCSUM0), XWORD(%%ZCRCSUM0), XWORD(%%ZTMP0), 0x10
vpternlogq XWORD(%%ZCRCSUM0), XWORD(%%ZCRCSUM3), XWORD(%%ZTMP1), 0x96
vmovdqa64 %%CRC_IN_OUT, XWORD(%%ZCRCSUM0)
vmovdqa64 %%ZCRCSUM0, %%ZCRCSUM1
%assign blocks_left (blocks_left - 4)
%else
vmovdqa64 %%CRC_IN_OUT, XWORD(%%ZCRCSUM0)
vshufi64x2 %%ZCRCSUM0, %%ZCRCSUM0, %%ZCRCSUM0, 0011_1001b
%assign blocks_left (blocks_left - 1)
%endif
%rep blocks_left
vmovdqa64 %%XTMP, XWORD(%%ZCRCSUM0)
CRC_CLMUL %%CRC_IN_OUT, %%CRC_MUL, %%XTMP, %%XTMP2
vshufi64x2 %%ZCRCSUM0, %%ZCRCSUM0, %%ZCRCSUM0, 0011_1001b
%endrep
%endif ;; %%NUMBL > 0
%endmacro ;; CRC32_FIRST_1_TO_16
;; ===================================================================
;; ===================================================================
;; Stitched AES128/256 CBC decryption & CRC32 on 16 blocks
;; ===================================================================
%macro AES_CBC_DEC_CRC32_16 22
%define %%SRC %1 ; [in] GP with pointer to source buffer
%define %%DST %2 ; [in] GP with pointer to destination buffer
%define %%OFFS %3 ; [in/out] GP with src/dst buffer offset
%define %%NBYTES %4 ; [in/out] GP with number of bytes to decrypt
%define %%KEY_PTR %5 ; [in] GP with pointer to expanded AES decrypt keys
%define %%ZIV %6 ; [in/out] IV in / last cipher text block on out
%define %%ZD0 %7 ; [clobbered] temporary ZMM
%define %%ZD1 %8 ; [clobbered] temporary ZMM
%define %%ZD2 %9 ; [clobbered] temporary ZMM
%define %%ZD3 %10 ; [clobbered] temporary ZMM
%define %%ZC0 %11 ; [clobbered] temporary ZMM
%define %%ZC1 %12 ; [clobbered] temporary ZMM
%define %%ZC2 %13 ; [clobbered] temporary ZMM
%define %%ZC3 %14 ; [clobbered] temporary ZMM
%define %%ZTMP0 %15 ; [clobbered] temporary ZMM
%define %%ZTMP1 %16 ; [clobbered] temporary ZMM
%define %%NROUNDS %17 ; [in] Number of rounds (9 or 13)
%define %%ZCRC_SUM0 %18 ; [in/out] current CRC value
%define %%ZCRC_SUM1 %19 ; [in/out] current CRC value
%define %%ZCRC_SUM2 %20 ; [in/out] current CRC value
%define %%ZCRC_SUM3 %21 ; [in/out] current CRC value
%define %%LAST_BLOCK %22 ; [out] xmm to store the last clear text block
;; /////////////////////////////////////////////////
;; load cipher text blocks
ZMM_LOAD_BLOCKS_0_16 16, %%SRC, %%OFFS, \
%%ZC0, %%ZC1, %%ZC2, %%ZC3
;; /////////////////////////////////////////////////
;; prepare cipher text blocks for an XOR after AES-DEC rounds
valignq %%ZD0, %%ZC0, %%ZIV, 6
valignq %%ZD1, %%ZC1, %%ZC0, 6
valignq %%ZD2, %%ZC2, %%ZC1, 6
valignq %%ZD3, %%ZC3, %%ZC2, 6
;; /////////////////////////////////////////////////
;; update IV for the next round (block 3 in ZIV)
vmovdqa64 %%ZIV, %%ZC3
;; /////////////////////////////////////////////////
;; AES rounds 0 to 10/14 & CRC
%assign round 0
%rep (%%NROUNDS + 2)
;; /////////////////////////////////////////////////
;; AES decrypt round
vbroadcastf64x2 %%ZTMP0, [%%KEY_PTR + (round*16)]
ZMM_AESDEC_ROUND_BLOCKS_0_16 %%ZC0, %%ZC1, %%ZC2, %%ZC3, \
%%ZTMP0, round, %%ZD0, %%ZD1, %%ZD2, %%ZD3, \
16, %%NROUNDS
%assign round (round + 1)
%endrep
;; /////////////////////////////////////////////////
;; store clear text
ZMM_STORE_BLOCKS_0_16 16, %%DST, %%OFFS, \
%%ZC0, %%ZC1, %%ZC2, %%ZC3
;; \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\
;; CRC just decrypted blocks
vbroadcastf64x2 %%ZTMP0, [rel fold_by_16]
vpclmulqdq %%ZTMP1, %%ZCRC_SUM0, %%ZTMP0, 0x10
vpclmulqdq %%ZCRC_SUM0, %%ZCRC_SUM0, %%ZTMP0, 0x01
vpternlogq %%ZCRC_SUM0, %%ZTMP1, %%ZC0, 0x96
vpclmulqdq %%ZTMP1, %%ZCRC_SUM1, %%ZTMP0, 0x10
vpclmulqdq %%ZCRC_SUM1, %%ZCRC_SUM1, %%ZTMP0, 0x01
vpternlogq %%ZCRC_SUM1, %%ZTMP1, %%ZC1, 0x96
vpclmulqdq %%ZTMP1, %%ZCRC_SUM2, %%ZTMP0, 0x10
vpclmulqdq %%ZCRC_SUM2, %%ZCRC_SUM2, %%ZTMP0, 0x01
vpternlogq %%ZCRC_SUM2, %%ZTMP1, %%ZC2, 0x96
vpclmulqdq %%ZTMP1, %%ZCRC_SUM3, %%ZTMP0, 0x10
vpclmulqdq %%ZCRC_SUM3, %%ZCRC_SUM3, %%ZTMP0, 0x01
vpternlogq %%ZCRC_SUM3, %%ZTMP1, %%ZC3, 0x96
vextracti64x2 %%LAST_BLOCK, %%ZC3, 3
;; /////////////////////////////////////////////////
;; update lengths and offset
add %%OFFS, (16 * 16)
sub %%NBYTES, (16 * 16)
%endmacro ;; AES_CBC_DEC_CRC32_16
;; ===================================================================
;; ===================================================================
;; DOCSIS SEC BPI decryption + CRC32
;; This macro is handling the case when the two components are
;; executed together.
;; ===================================================================
%macro DOCSIS_DEC_CRC32 40
%define %%KEYS %1 ;; [in] GP with pointer to expanded keys (decrypt)
%define %%SRC %2 ;; [in] GP with pointer to source buffer
%define %%DST %3 ;; [in] GP with pointer to destination buffer
%define %%NUM_BYTES %4 ;; [in/clobbered] GP with number of bytes to decrypt
%define %%KEYS_ENC %5 ;; [in] GP with pointer to expanded keys (encrypt)
%define %%GT1 %6 ;; [clobbered] temporary GP
%define %%GT2 %7 ;; [clobbered] temporary GP
%define %%XCRC_INIT %8 ;; [in/out] CRC initial value
%define %%XIV %9 ;; [in/out] cipher IV
%define %%ZT1 %10 ;; [clobbered] temporary ZMM
%define %%ZT2 %11 ;; [clobbered] temporary ZMM
%define %%ZT3 %12 ;; [clobbered] temporary ZMM
%define %%ZT4 %13 ;; [clobbered] temporary ZMM
%define %%ZT5 %14 ;; [clobbered] temporary ZMM
%define %%ZT6 %15 ;; [clobbered] temporary ZMM
%define %%ZT7 %16 ;; [clobbered] temporary ZMM
%define %%ZT8 %17 ;; [clobbered] temporary ZMM
%define %%ZT9 %18 ;; [clobbered] temporary ZMM
%define %%ZT10 %19 ;; [clobbered] temporary ZMM
%define %%ZT11 %20 ;; [clobbered] temporary ZMM
%define %%ZT12 %21 ;; [clobbered] temporary ZMM
%define %%ZT13 %22 ;; [clobbered] temporary ZMM
;; no ZT14 - taken by XIV
;; no ZT15 - taken by CRC_INIT
%define %%ZT16 %23 ;; [clobbered] temporary ZMM
%define %%ZT17 %24 ;; [clobbered] temporary ZMM
%define %%ZT18 %25 ;; [clobbered] temporary ZMM
%define %%ZT19 %26 ;; [clobbered] temporary ZMM
%define %%ZT20 %27 ;; [clobbered] temporary ZMM
%define %%ZT21 %28 ;; [clobbered] temporary ZMM
%define %%ZT22 %29 ;; [clobbered] temporary ZMM
%define %%ZT23 %30 ;; [clobbered] temporary ZMM
%define %%ZT24 %31 ;; [clobbered] temporary ZMM
%define %%ZT25 %32 ;; [clobbered] temporary ZMM
%define %%ZT26 %33 ;; [clobbered] temporary ZMM
%define %%ZT27 %34 ;; [clobbered] temporary ZMM
%define %%ZT28 %35 ;; [clobbered] temporary ZMM
%define %%ZT29 %36 ;; [clobbered] temporary ZMM
%define %%ZT30 %37 ;; [clobbered] temporary ZMM
%define %%ZT31 %38 ;; [clobbered] temporary ZMM
%define %%ZT32 %39 ;; [clobbered] temporary ZMM
%define %%NROUNDS %40 ;; [in] Number of rounds (9 or 13)
%define %%NUM_BLOCKS %%GT1
%define %%OFFSET %%GT2
%xdefine %%ZIV ZWORD(%%XIV)
%xdefine %%XTMP0 XWORD(%%ZT1)
%xdefine %%XTMP1 XWORD(%%ZT2)
%xdefine %%XCRC_TMP XWORD(%%ZT3)
%xdefine %%XCRC_MUL XWORD(%%ZT4)
%xdefine %%XCRC_IN_OUT %%XCRC_INIT
%xdefine %%ZCRC0 %%ZT5
%xdefine %%ZCRC1 %%ZT6
%xdefine %%ZCRC2 %%ZT7
%xdefine %%ZCRC3 %%ZT8
%xdefine %%XCRC0 XWORD(%%ZCRC0)
%xdefine %%ZCIPH0 %%ZT9
%xdefine %%ZCIPH1 %%ZT10
%xdefine %%ZCIPH2 %%ZT11
%xdefine %%ZCIPH3 %%ZT12
%xdefine %%ZTMP0 %%ZT20
%xdefine %%ZTMP1 %%ZT21
%xdefine %%ZTMP2 %%ZT22
%xdefine %%ZTMP3 %%ZT23
%xdefine %%ZTMP4 %%ZT24
%xdefine %%ZTMP5 %%ZT25
%xdefine %%ZTMP6 %%ZT26
%xdefine %%ZTMP7 %%ZT27
%xdefine %%ZTMP8 %%ZT28
%xdefine %%ZTMP9 %%ZT29
%xdefine %%ZCRC_IN_OUT0 ZWORD(%%XCRC_IN_OUT)
%xdefine %%ZCRC_IN_OUT1 %%ZT30
%xdefine %%ZCRC_IN_OUT2 %%ZT31
%xdefine %%ZCRC_IN_OUT3 %%ZT32
vmovdqa64 %%XCRC_MUL, [rel fold_by_1]
vmovdqa64 %%XCRC_INIT, %%XCRC_INIT
xor %%OFFSET, %%OFFSET
cmp %%NUM_BYTES, 16
jb %%_check_partial_block
cmp %%NUM_BYTES, (16 * 16) + 16
jb %%_below_17_blocks
cmp %%NUM_BYTES, (32 * 16) + 16
jb %%_below_33_blocks
;; =====================================================================
;; =====================================================================
;; Part handling messages bigger-equal 33 blocks
;; - decrypt & crc performed per 16 block basis
;; =====================================================================
;; Decrypt 16 blocks first.
;; Make sure IV is in the top 128 bits of ZMM.
vshufi64x2 %%ZIV, %%ZIV, %%ZIV, 0000_0000b
AES_CBC_DEC_1_TO_16 %%SRC, %%DST, 16, %%OFFSET, %%NUM_BYTES, \
%%KEYS, %%ZIV, %%NROUNDS, \
%%ZTMP0, %%ZCRC_IN_OUT1, \
%%ZCRC_IN_OUT2, %%ZCRC_IN_OUT3, \
%%ZTMP1, %%ZTMP2, %%ZTMP3, %%ZTMP4, %%ZTMP5
;; Start of CRC is just reading the data and adding initial value.
;; In the next round multiply and add operations will apply.
vpxorq %%ZCRC_IN_OUT0, %%ZCRC_IN_OUT0, %%ZTMP0
vextracti64x2 %%XCRC0, %%ZCRC_IN_OUT3, 3
%%_main_loop:
cmp %%NUM_BYTES, (16 * 16) + 16
jb %%_main_loop_exit
;; Stitched cipher and CRC on 16 blocks
AES_CBC_DEC_CRC32_16 %%SRC, %%DST, %%OFFSET, %%NUM_BYTES, \
%%KEYS, %%ZIV, \
%%ZTMP0, %%ZTMP1, %%ZTMP2, %%ZTMP3, %%ZTMP4, \
%%ZTMP5, %%ZTMP6, %%ZTMP7, %%ZTMP8, %%ZTMP9, \
%%NROUNDS, \
%%ZCRC_IN_OUT0, %%ZCRC_IN_OUT1, \
%%ZCRC_IN_OUT2, %%ZCRC_IN_OUT3, \
%%XCRC0
jmp %%_main_loop
%%_main_loop_exit:
;; Up to 16 (inclusive) blocks left to process
;; - decrypt the blocks first
;; - then crc decrypted blocks minus one block
;; broadcast IV across ZMM (4th and 1st 128-bit positions are only important really)
vshufi64x2 %%ZIV, %%ZIV, %%ZIV, 1111_1111b
mov %%NUM_BLOCKS, %%NUM_BYTES
shr %%NUM_BLOCKS, 4
and %%NUM_BLOCKS, 15
jz %%_decrypt_eq0
cmp %%NUM_BLOCKS, 8
jg %%_decrypt_gt8
je %%_decrypt_eq8
;; 1 to 7 blocks
cmp %%NUM_BLOCKS, 4
jg %%_decrypt_gt4
je %%_decrypt_eq4
%%_decrypt_lt4:
;; 1 to 3 blocks
cmp %%NUM_BLOCKS, 2
jg %%_decrypt_eq3
je %%_decrypt_eq2
jmp %%_decrypt_eq1
%%_decrypt_gt4:
;; 5 to 7
cmp %%NUM_BLOCKS, 6
jg %%_decrypt_eq7
je %%_decrypt_eq6
jmp %%_decrypt_eq5
%%_decrypt_gt8:
;; 9 to 15
cmp %%NUM_BLOCKS, 12
jg %%_decrypt_gt12
je %%_decrypt_eq12
;; 9 to 11
cmp %%NUM_BLOCKS, 10
jg %%_decrypt_eq11
je %%_decrypt_eq10
jmp %%_decrypt_eq9
%%_decrypt_gt12:
;; 13 to 15
cmp %%NUM_BLOCKS, 14
jg %%_decrypt_eq15
je %%_decrypt_eq14
jmp %%_decrypt_eq13
%assign number_of_blocks 1
%rep 15
%%_decrypt_eq %+ number_of_blocks :
;; decrypt selected number of blocks
AES_CBC_DEC_1_TO_16 %%SRC, %%DST, number_of_blocks, %%OFFSET, %%NUM_BYTES, \
%%KEYS, %%ZIV, %%NROUNDS, \
%%ZTMP6, %%ZTMP7, %%ZTMP8, %%ZTMP9, \
%%ZTMP1, %%ZTMP2, %%ZTMP3, %%ZTMP4, %%ZTMP5
;; extract & save the last decrypted block as crc for it is done separately
;; towards the end of this macro
%if number_of_blocks < 5
vextracti64x2 %%XCRC0, %%ZTMP6, (number_of_blocks - 1)
%elif number_of_blocks < 9
vextracti64x2 %%XCRC0, %%ZTMP7, (number_of_blocks - 4 - 1)
%elif number_of_blocks < 13
vextracti64x2 %%XCRC0, %%ZTMP8, (number_of_blocks - 8 - 1)
%else
vextracti64x2 %%XCRC0, %%ZTMP9, (number_of_blocks - 12 - 1)
%endif
;; set number of blocks for CRC
mov %%NUM_BLOCKS, (number_of_blocks - 1)
;; extract latest IV into XIV for partial block processing
vextracti32x4 %%XIV, %%ZIV, 3
jmp %%_decrypt_done_fold_by8
%assign number_of_blocks (number_of_blocks + 1)
%endrep
%%_decrypt_eq0:
;; Special case. Check if there are full 16 blocks for decrypt
;; - it can happen here because the main loop checks for 17 blocks
;; If yes then decrypt them and fall through to folding/crc section
;; identifying 15 blocks for CRC
cmp %%NUM_BYTES, (16 * 16)
jb %%_cbc_decrypt_done
AES_CBC_DEC_1_TO_16 %%SRC, %%DST, 16, %%OFFSET, %%NUM_BYTES, \
%%KEYS, %%ZIV, %%NROUNDS, \
%%ZTMP6, %%ZTMP7, %%ZTMP8, %%ZTMP9, \
%%ZTMP1, %%ZTMP2, %%ZTMP3, %%ZTMP4, %%ZTMP5
mov %%NUM_BLOCKS, 15
vextracti32x4 %%XIV, %%ZIV, 3
vextracti64x2 %%XCRC0, %%ZTMP9, 3
%%_decrypt_done_fold_by8:
;; Register content at this point:
;; ZTMP6 - ZTMP9 => decrypted blocks (16 to 31)
;; ZCRC_IN_OUT0 - ZCRC_IN_OUT3 - fold by 16 CRC sums
;; NUM_BLOCKS - number of blocks to CRC
;; fold 16 x 128 bits -> 8 x 128 bits
vbroadcastf64x2 %%ZTMP2, [rel fold_by_8]
vpclmulqdq %%ZTMP1, %%ZCRC_IN_OUT0, %%ZTMP2, 0x01
vpclmulqdq %%ZCRC_IN_OUT0, %%ZCRC_IN_OUT0, %%ZTMP2, 0x10
vpternlogq %%ZCRC_IN_OUT0, %%ZCRC_IN_OUT2, %%ZTMP1, 0x96
vpclmulqdq %%ZTMP1, %%ZCRC_IN_OUT1, %%ZTMP2, 0x01
vpclmulqdq %%ZCRC_IN_OUT1, %%ZCRC_IN_OUT1, %%ZTMP2, 0x10
vpternlogq %%ZCRC_IN_OUT1, %%ZCRC_IN_OUT3, %%ZTMP1, 0x96
%%_decrypt_done_no_fold_16_to_8:
;; CRC 8 blocks of already decrypted text
test %%NUM_BLOCKS, 8
jz %%_skip_crc_by8
vbroadcastf64x2 %%ZTMP2, [rel fold_by_8]
vpclmulqdq %%ZTMP1, %%ZCRC_IN_OUT0, %%ZTMP2, 0x01
vpclmulqdq %%ZCRC_IN_OUT0, %%ZCRC_IN_OUT0, %%ZTMP2, 0x10
vpternlogq %%ZCRC_IN_OUT0, %%ZTMP6, %%ZTMP1, 0x96
vpclmulqdq %%ZTMP1, %%ZCRC_IN_OUT1, %%ZTMP2, 0x01
vpclmulqdq %%ZCRC_IN_OUT1, %%ZCRC_IN_OUT1, %%ZTMP2, 0x10
vpternlogq %%ZCRC_IN_OUT1, %%ZTMP7, %%ZTMP1, 0x96
vmovdqa64 %%ZTMP6, %%ZTMP8
vmovdqa64 %%ZTMP7, %%ZTMP9
%%_skip_crc_by8:
;; fold 8 x 128 bits -> 4 x 128 bits
vbroadcastf64x2 %%ZTMP2, [rel fold_by_4]
vpclmulqdq %%ZTMP1, %%ZCRC_IN_OUT0, %%ZTMP2, 0x01
vpclmulqdq %%ZCRC_IN_OUT0, %%ZCRC_IN_OUT0, %%ZTMP2, 0x10
vpternlogq %%ZCRC_IN_OUT0, %%ZCRC_IN_OUT1, %%ZTMP1, 0x96
;; CRC 4 blocks of already decrypted text
test %%NUM_BLOCKS, 4
jz %%_skip_crc_by4
vpclmulqdq %%ZTMP1, %%ZCRC_IN_OUT0, %%ZTMP2, 0x01
vpclmulqdq %%ZCRC_IN_OUT0, %%ZCRC_IN_OUT0, %%ZTMP2, 0x10
vpternlogq %%ZCRC_IN_OUT0, %%ZTMP6, %%ZTMP1, 0x96
vmovdqa64 %%ZTMP6, %%ZTMP7
%%_skip_crc_by4:
;; fold 4 x 128 bits -> 2 x 128 bits
vbroadcastf64x2 YWORD(%%ZTMP2), [rel fold_by_2]
vextracti64x4 YWORD(%%ZCRC_IN_OUT1), %%ZCRC_IN_OUT0, 1
vpclmulqdq YWORD(%%ZTMP1), YWORD(%%ZCRC_IN_OUT0), YWORD(%%ZTMP2), 0x01
vpclmulqdq YWORD(%%ZCRC_IN_OUT0), YWORD(%%ZCRC_IN_OUT0), YWORD(%%ZTMP2), 0x10
vpternlogq YWORD(%%ZCRC_IN_OUT0), YWORD(%%ZCRC_IN_OUT1), YWORD(%%ZTMP1), 0x96
;; CRC 2 blocks of already decrypted text
test %%NUM_BLOCKS, 2
jz %%_skip_crc_by2
vpclmulqdq YWORD(%%ZTMP1), YWORD(%%ZCRC_IN_OUT0), YWORD(%%ZTMP2), 0x01
vpclmulqdq YWORD(%%ZCRC_IN_OUT0), YWORD(%%ZCRC_IN_OUT0), YWORD(%%ZTMP2), 0x10
vpternlogq YWORD(%%ZCRC_IN_OUT0), YWORD(%%ZTMP6), YWORD(%%ZTMP1), 0x96
vshufi64x2 %%ZTMP6, %%ZTMP6, %%ZTMP6, 1110_1110b
%%_skip_crc_by2:
;; fold 2 x 128 bits -> 1 x 128 bits
vmovdqa64 XWORD(%%ZTMP2), [rel fold_by_1]
vextracti64x2 XWORD(%%ZCRC_IN_OUT1), YWORD(%%ZCRC_IN_OUT0), 1
vpclmulqdq XWORD(%%ZTMP1), XWORD(%%ZCRC_IN_OUT0), XWORD(%%ZTMP2), 0x01
vpclmulqdq XWORD(%%ZCRC_IN_OUT0), XWORD(%%ZCRC_IN_OUT0), XWORD(%%ZTMP2), 0x10
vpternlogq XWORD(%%ZCRC_IN_OUT0), XWORD(%%ZCRC_IN_OUT1), XWORD(%%ZTMP1), 0x96
;; CRC 1 block of already decrypted text
test %%NUM_BLOCKS, 1
jz %%_skip_crc_by1
vpclmulqdq XWORD(%%ZTMP1), XWORD(%%ZCRC_IN_OUT0), XWORD(%%ZTMP2), 0x01
vpclmulqdq XWORD(%%ZCRC_IN_OUT0), XWORD(%%ZCRC_IN_OUT0), XWORD(%%ZTMP2), 0x10
vpternlogq XWORD(%%ZCRC_IN_OUT0), XWORD(%%ZTMP6), XWORD(%%ZTMP1), 0x96
%%_skip_crc_by1:
jmp %%_check_partial_block
%%_cbc_decrypt_done:
;; No blocks left to compute CRC for. Just fold the sums from 16x128-bits into 1x128-bits.
;; Register content at this point:
;; ZCRC_IN_OUT0 - ZCRC_IN_OUT3 - fold by 16 CRC sums
;; XCRC0 - includes the last decrypted block to be passed to partial check case
;; fold 16 x 128 bits -> 8 x 128 bits
vbroadcastf64x2 %%ZTMP2, [rel fold_by_8]
vpclmulqdq %%ZTMP1, %%ZCRC_IN_OUT0, %%ZTMP2, 0x01
vpclmulqdq %%ZCRC_IN_OUT0, %%ZCRC_IN_OUT0, %%ZTMP2, 0x10
vpternlogq %%ZCRC_IN_OUT0, %%ZCRC_IN_OUT2, %%ZTMP1, 0x96
vpclmulqdq %%ZTMP1, %%ZCRC_IN_OUT1, %%ZTMP2, 0x01
vpclmulqdq %%ZCRC_IN_OUT1, %%ZCRC_IN_OUT1, %%ZTMP2, 0x10
vpternlogq %%ZCRC_IN_OUT1, %%ZCRC_IN_OUT3, %%ZTMP1, 0x96
%%_cbc_decrypt_done_fold_8_to_4:
;; fold 8 x 128 bits -> 4 x 128 bits
vbroadcastf64x2 %%ZTMP2, [rel fold_by_4]
vpclmulqdq %%ZTMP1, %%ZCRC_IN_OUT0, %%ZTMP2, 0x01
vpclmulqdq %%ZCRC_IN_OUT0, %%ZCRC_IN_OUT0, %%ZTMP2, 0x10
vpternlogq %%ZCRC_IN_OUT0, %%ZCRC_IN_OUT1, %%ZTMP1, 0x96
;; fold 4 x 128 bits -> 2 x 128 bits
vbroadcastf64x2 YWORD(%%ZTMP2), [rel fold_by_2]
vextracti64x4 YWORD(%%ZCRC_IN_OUT1), %%ZCRC_IN_OUT0, 1
vpclmulqdq YWORD(%%ZTMP1), YWORD(%%ZCRC_IN_OUT0), YWORD(%%ZTMP2), 0x01
vpclmulqdq YWORD(%%ZCRC_IN_OUT0), YWORD(%%ZCRC_IN_OUT0), YWORD(%%ZTMP2), 0x10
vpternlogq YWORD(%%ZCRC_IN_OUT0), YWORD(%%ZCRC_IN_OUT1), YWORD(%%ZTMP1), 0x96
;; fold 2 x 128 bits -> 1 x 128 bits
vmovdqa64 XWORD(%%ZTMP2), [rel fold_by_1]
vextracti64x2 XWORD(%%ZCRC_IN_OUT1), YWORD(%%ZCRC_IN_OUT0), 1
vpclmulqdq XWORD(%%ZTMP1), XWORD(%%ZCRC_IN_OUT0), XWORD(%%ZTMP2), 0x01
vpclmulqdq XWORD(%%ZCRC_IN_OUT0), XWORD(%%ZCRC_IN_OUT0), XWORD(%%ZTMP2), 0x10
vpternlogq XWORD(%%ZCRC_IN_OUT0), XWORD(%%ZCRC_IN_OUT1), XWORD(%%ZTMP1), 0x96
;; - keep the last block out from the calculation
;; (this may be a partial block - additional checks follow)
jmp %%_check_partial_block
;; =====================================================================
;; =====================================================================
;; Part handling messages from 16 - 32 blocks
;; =====================================================================
%%_below_33_blocks:
;; Decrypt 16 blocks first
;; Make sure IV is in the top 128 bits of ZMM.
vshufi64x2 %%ZIV, %%ZIV, %%ZIV, 0000_0000b
AES_CBC_DEC_1_TO_16 %%SRC, %%DST, 16, %%OFFSET, %%NUM_BYTES, \
%%KEYS, %%ZIV, %%NROUNDS, \
%%ZTMP0, %%ZCRC_IN_OUT1, \
%%ZCRC_IN_OUT2, %%ZCRC_IN_OUT3, \
%%ZTMP1, %%ZTMP2, %%ZTMP3, %%ZTMP4, %%ZTMP5
;; Start of CRC is just reading the data and adding initial value.
vpxorq %%ZCRC_IN_OUT0, %%ZCRC_IN_OUT0, %%ZTMP0
;; Use fold by 8 approach to start the CRC.
;; ZCRC_IN_OUT0 and ZCRC_IN_OUT1 include CRC sums.
vbroadcastf64x2 %%ZTMP2, [rel fold_by_8]
vpclmulqdq %%ZTMP1, %%ZCRC_IN_OUT0, %%ZTMP2, 0x01
vpclmulqdq %%ZCRC_IN_OUT0, %%ZCRC_IN_OUT0, %%ZTMP2, 0x10
vpternlogq %%ZCRC_IN_OUT0, %%ZCRC_IN_OUT2, %%ZTMP1, 0x96
vpclmulqdq %%ZTMP1, %%ZCRC_IN_OUT1, %%ZTMP2, 0x01
vpclmulqdq %%ZCRC_IN_OUT1, %%ZCRC_IN_OUT1, %%ZTMP2, 0x10
vpternlogq %%ZCRC_IN_OUT1, %%ZCRC_IN_OUT3, %%ZTMP1, 0x96
;; Decrypt rest of the message.
mov %%NUM_BLOCKS, %%NUM_BYTES
shr %%NUM_BLOCKS, 4
and %%NUM_BLOCKS, 15
jz %%_decrypt2_eq0
cmp %%NUM_BLOCKS, 8
jg %%_decrypt2_gt8
je %%_decrypt2_eq8
;; 1 to 7 blocks
cmp %%NUM_BLOCKS, 4
jg %%_decrypt2_gt4
je %%_decrypt2_eq4
%%_decrypt2_lt4:
;; 1 to 3 blocks
cmp %%NUM_BLOCKS, 2
jg %%_decrypt2_eq3
je %%_decrypt2_eq2
jmp %%_decrypt2_eq1
%%_decrypt2_gt4:
;; 5 to 7
cmp %%NUM_BLOCKS, 6
jg %%_decrypt2_eq7
je %%_decrypt2_eq6
jmp %%_decrypt2_eq5
%%_decrypt2_gt8:
;; 9 to 15
cmp %%NUM_BLOCKS, 12
jg %%_decrypt2_gt12
je %%_decrypt2_eq12
;; 9 to 11
cmp %%NUM_BLOCKS, 10
jg %%_decrypt2_eq11
je %%_decrypt2_eq10
jmp %%_decrypt2_eq9
%%_decrypt2_gt12:
;; 13 to 15
cmp %%NUM_BLOCKS, 14
jg %%_decrypt2_eq15
je %%_decrypt2_eq14
jmp %%_decrypt2_eq13
%assign number_of_blocks 1
%rep 15
%%_decrypt2_eq %+ number_of_blocks :
AES_CBC_DEC_1_TO_16 %%SRC, %%DST, number_of_blocks, %%OFFSET, %%NUM_BYTES, \
%%KEYS, %%ZIV, %%NROUNDS, \
%%ZTMP6, %%ZTMP7, %%ZTMP8, %%ZTMP9, \
%%ZTMP1, %%ZTMP2, %%ZTMP3, %%ZTMP4, %%ZTMP5
%if number_of_blocks < 5
vextracti64x2 %%XCRC0, %%ZTMP6, (number_of_blocks - 1)
%elif number_of_blocks < 9
vextracti64x2 %%XCRC0, %%ZTMP7, (number_of_blocks - 4 - 1)
%elif number_of_blocks < 13
vextracti64x2 %%XCRC0, %%ZTMP8, (number_of_blocks - 8 - 1)
%else
vextracti64x2 %%XCRC0, %%ZTMP9, (number_of_blocks - 12 - 1)
%endif
;; Update XIV
mov %%NUM_BLOCKS, (number_of_blocks - 1)
;; Extract latest IV
vextracti32x4 %%XIV, %%ZIV, 3
jmp %%_decrypt_done_no_fold_16_to_8
%assign number_of_blocks (number_of_blocks + 1)
%endrep
%%_decrypt2_eq0:
;; Special case. Check if there are full 16 blocks for decrypt.
;; If yes then decrypt them and fall through to folding/crc section
;; identifying 15 blocks for CRC
cmp %%NUM_BYTES, (16 * 16)
jb %%_cbc_decrypt_done_fold_8_to_4
AES_CBC_DEC_1_TO_16 %%SRC, %%DST, 16, %%OFFSET, %%NUM_BYTES, \
%%KEYS, %%ZIV, %%NROUNDS, \
%%ZTMP6, %%ZTMP7, %%ZTMP8, %%ZTMP9, \
%%ZTMP1, %%ZTMP2, %%ZTMP3, %%ZTMP4, %%ZTMP5
mov %%NUM_BLOCKS, 15
vextracti32x4 %%XIV, %%ZIV, 3
vextracti64x2 %%XCRC0, %%ZTMP9, 3
jmp %%_decrypt_done_no_fold_16_to_8
;; =====================================================================
;; =====================================================================
;; Part handling messages up to from 1 to 16 blocks
;; =====================================================================
%%_below_17_blocks:
;; Make sure IV is in the top 128 bits of ZMM.
vshufi64x2 %%ZIV, %%ZIV, %%ZIV, 0000_0000b
mov %%NUM_BLOCKS, %%NUM_BYTES
shr %%NUM_BLOCKS, 4
and %%NUM_BLOCKS, 15
jz %%_eq16
cmp %%NUM_BLOCKS, 8
jg %%_gt8
je %%_eq8
;; 1 to 7 blocks
cmp %%NUM_BLOCKS, 4
jg %%_gt4
je %%_eq4
%%_lt4:
;; 1 to 3 blocks
cmp %%NUM_BLOCKS, 2
jg %%_eq3
je %%_eq2
jmp %%_eq1
%%_gt4:
;; 5 to 7
cmp %%NUM_BLOCKS, 6
jg %%_eq7
je %%_eq6
jmp %%_eq5
%%_gt8:
;; 9 to 15
cmp %%NUM_BLOCKS, 12
jg %%_gt12
je %%_eq12
;; 9 to 11
cmp %%NUM_BLOCKS, 10
jg %%_eq11
je %%_eq10
jmp %%_eq9
%%_gt12:
;; 13 to 15
cmp %%NUM_BLOCKS, 14
jg %%_eq15
je %%_eq14
jmp %%_eq13
%assign number_of_blocks 1
%rep 16
%%_eq %+ number_of_blocks :
;; Start building the pipeline by decrypting number of blocks
;; - later cipher & CRC operations get stitched
AES_CBC_DEC_1_TO_16 %%SRC, %%DST, number_of_blocks, %%OFFSET, %%NUM_BYTES, \
%%KEYS, %%ZIV, %%NROUNDS, \
%%ZCRC0, %%ZCRC1, %%ZCRC2, %%ZCRC3, \
%%ZTMP1, %%ZTMP2, %%ZTMP3, %%ZTMP4, %%ZTMP5
vextracti32x4 %%XIV, %%ZIV, 3
;; Less than 16 blocks remaining in the message:
;; - compute CRC on decrypted blocks (minus one, in case it is the last one)
;; - then check for any partial block left
%assign number_of_blocks_to_crc (number_of_blocks - 1)
CRC32_FIRST_1_TO_16 %%XCRC_MUL, %%XCRC_IN_OUT, %%XTMP0, %%XTMP1, \
number_of_blocks_to_crc, \
%%ZCRC0, %%ZCRC1, %%ZCRC2, %%ZCRC3, \
%%ZTMP0, %%ZTMP1, %%ZTMP2, %%ZTMP3
%if number_of_blocks_to_crc == 0
%elif number_of_blocks_to_crc < 4
vextracti32x4 %%XCRC0, %%ZCRC0, (number_of_blocks_to_crc % 4)
%elif number_of_blocks_to_crc < 8
vextracti32x4 %%XCRC0, %%ZCRC1, (number_of_blocks_to_crc % 4)
%elif number_of_blocks_to_crc < 12
vextracti32x4 %%XCRC0, %%ZCRC2, (number_of_blocks_to_crc % 4)
%else ;; number_of_blocks_to_crc < 16
vextracti32x4 %%XCRC0, %%ZCRC3, (number_of_blocks_to_crc % 4)
%endif
jmp %%_check_partial_block
%assign number_of_blocks (number_of_blocks + 1)
%endrep
;; =====================================================================
;; =====================================================================
;; Part handling decrypt & CRC of partial block and
;; CRC of the second last block.
;; Register content at entry to this section:
;; XCRC0 - last 16 bytes of clear text to compute crc on (optional)
;; XCRC_IN_OUT - 128-bit crc fold product
;; OFFSET - current offset
;; NUM_BYTES - number of bytes left to decrypt
;; XIV - IV for decrypt operation
;; =====================================================================
%%_check_partial_block:
or %%NUM_BYTES, %%NUM_BYTES
jz %%_no_partial_bytes
;; AES128/256-CFB on the partial block
lea %%GT1, [rel byte_len_to_mask_table]
kmovw k1, [%%GT1 + %%NUM_BYTES*2]
vmovdqu8 %%XTMP1{k1}{z}, [%%SRC + %%OFFSET + 0]
vpxorq %%XTMP0, %%XIV, [%%KEYS_ENC + 0*16]
%assign i 1
%rep %%NROUNDS
vaesenc %%XTMP0, [%%KEYS_ENC + i*16]
%assign i (i + 1)
%endrep
vaesenclast %%XTMP0, [%%KEYS_ENC + i*16]
vpxorq %%XTMP0, %%XTMP0, %%XTMP1
vmovdqu8 [%%DST + %%OFFSET + 0]{k1}, %%XTMP0
%%_no_partial_bytes:
;; At this stage:
;; - whole message is decrypted the focus moves to complete CRC
;; - XCRC_IN_OUT includes folded data from all payload apart from
;; the last full block and (potential) partial bytes
;; - max 2 blocks (minus 1 byte) remain for CRC calculation
;; - %%OFFSET == 0 is used to check
;; if message consists of partial block only
or %%OFFSET, %%OFFSET
jz %%_no_block_pending_crc
;; Data block(s) was previously decrypted
;; - move to the last decrypted block
;; - calculate number of bytes to compute CRC for (less CRC field size)
add %%NUM_BYTES, (16 - 4)
sub %%OFFSET, 16
jz %%_no_partial_bytes__start_crc
cmp %%NUM_BYTES, 16
jb %%_no_partial_bytes__lt16
;; XCRC0 has copy of the last full decrypted block
CRC_UPDATE16 no_load, %%XCRC_IN_OUT, %%XCRC_MUL, %%XCRC0, %%XTMP1, next_crc
sub %%NUM_BYTES, 16
add %%OFFSET, 16 ; compensate for the subtract above
%%_no_partial_bytes__lt16:
or %%NUM_BYTES, %%NUM_BYTES
jz %%_no_partial_bytes__128_done
;; Partial bytes left - complete CRC calculation
lea %%GT1, [rel pshufb_shf_table]
vmovdqu64 %%XTMP0, [%%GT1 + %%NUM_BYTES]
lea %%GT1, [%%DST + %%OFFSET]
vmovdqu64 %%XTMP1, [%%GT1 - 16 + %%NUM_BYTES] ; xtmp1 = data for CRC
vmovdqa64 %%XCRC_TMP, %%XCRC_IN_OUT
vpshufb %%XCRC_IN_OUT, %%XTMP0 ; top num_bytes with LSB xcrc
vpxorq %%XTMP0, [rel mask3]
vpshufb %%XCRC_TMP, %%XTMP0 ; bottom (16 - num_bytes) with MSB xcrc
;; data num_bytes (top) blended with MSB bytes of CRC (bottom)
vpblendvb %%XCRC_TMP, %%XTMP1, %%XTMP0
CRC_CLMUL %%XCRC_IN_OUT, %%XCRC_MUL, %%XCRC_TMP, %%XTMP1
%%_no_partial_bytes__128_done:
CRC32_REDUCE_128_TO_32 rax, %%XCRC_IN_OUT, %%XTMP1, %%XTMP0, %%XCRC_TMP
jmp %%_do_return
%%_no_partial_bytes__start_crc:
;; - CRC was not started yet
;; - CBC decryption could have taken place and/or CFB
;; - DST is never modified so it points to start of the buffer that
;; is subject of CRC calculation
ETHERNET_FCS_CRC %%DST, %%NUM_BYTES, rax, %%XCRC_IN_OUT, %%GT1, \
%%XCRC_MUL, %%XTMP0, %%XTMP1, %%XCRC_TMP
jmp %%_do_return
%%_no_block_pending_crc:
;; Message consists of partial block only (first_crc not employed yet)
;; - XTMP0 includes clear text from CFB processing above
;; - k1 includes mask of bytes belonging to the message
;; - NUM_BYTES is length of cipher, CRC is 4 bytes shorter
;; - ignoring hash lengths 1 to 4
cmp %%NUM_BYTES, 5
jb %%_do_return
;; clear top 4 bytes of the data
kshiftrw k1, k1, 4
vmovdqu8 %%XTMP0{k1}{z}, %%XTMP0
vpxorq %%XCRC_IN_OUT, %%XTMP0 ; xor the data in
sub %%NUM_BYTES, 4
;; CRC calculation for payload lengths below 4 is different
cmp %%NUM_BYTES, 4
jb %%_no_block_pending_crc__lt4
;; 4 or more bytes left
lea %%GT1, [rel pshufb_shf_table]
vmovdqu64 %%XTMP1, [%%GT1 + %%NUM_BYTES]
vpshufb %%XCRC_IN_OUT, %%XTMP1
CRC32_REDUCE_128_TO_32 rax, %%XCRC_IN_OUT, %%XTMP0, %%XTMP1, %%XCRC_TMP
jmp %%_do_return
%%_no_block_pending_crc__lt4:
;; less than 4 bytes left for CRC
cmp %%NUM_BYTES, 3
jne %%_no_block_pending_crc__neq3
vpslldq %%XCRC_IN_OUT, 5
jmp %%_do_barret
%%_no_block_pending_crc__neq3:
cmp %%NUM_BYTES, 2
jne %%_no_block_pending_crc__neq2
vpslldq %%XCRC_IN_OUT, 6
jmp %%_do_barret
%%_no_block_pending_crc__neq2:
vpslldq %%XCRC_IN_OUT, 7
%%_do_barret:
CRC32_REDUCE_64_TO_32 rax, %%XCRC_IN_OUT, %%XTMP0, %%XTMP1, %%XCRC_TMP
%%_do_return:
;; result in rax
%endmacro ;; DOCSIS_DEC_CRC32
;; ===================================================================
;; ===================================================================
;; MACRO IMPLEMENTING API FOR STITCHED DOCSIS DECRYPT AND CRC32
;; ===================================================================
%macro AES_DOCSIS_DEC_CRC32 1
%define %%NROUNDS %1 ; [in] Number of rounds (9 or 13)
mov rax, rsp
sub rsp, STACKFRAME_size
and rsp, -64
mov [rsp + _rsp_save], rax ; original SP
mov [rsp + _gpr_save + 0*8], r12
mov [rsp + _gpr_save + 1*8], r13
mov [rsp + _gpr_save + 2*8], rbx
mov [rsp + _gpr_save + 3*8], rbp
vmovdqa64 xmm15, [rel init_crc_value]
mov tmp1, [job + _src]
add tmp1, [job + _hash_start_src_offset_in_bytes] ; CRC only start
cmp qword [job + _msg_len_to_cipher_in_bytes], 0
jz %%aes_docsis_dec_crc32_avx512__no_cipher
mov tmp2, [job + _cipher_start_src_offset_in_bytes]
cmp tmp2, [job + _hash_start_src_offset_in_bytes]
jbe %%aes_docsis_dec_crc32_avx512__skip_aad ; avoid zero lengths or negative cases
sub tmp2, [job + _hash_start_src_offset_in_bytes] ; CRC only size / AAD
ETHERNET_FCS_CRC tmp1, tmp2, rax, xmm15, tmp3, xmm0, xmm1, xmm2, xmm3
not eax ; carry CRC value into the combined part
vmovd xmm15, eax ; initial CRC value
%%aes_docsis_dec_crc32_avx512__skip_aad:
mov tmp1, [job + _iv]
vmovdqu64 xmm14, [tmp1] ; load IV
mov tmp2, [job + _src]
add tmp2, [job + _cipher_start_src_offset_in_bytes] ; AES start
mov tmp3, [job + _dst] ; AES destination
mov tmp4, [job + _msg_len_to_cipher_in_bytes] ; CRC + AES size
mov tmp5, [job + _dec_keys]
mov tmp6, [job + _enc_keys]
DOCSIS_DEC_CRC32 tmp5, tmp2, tmp3, tmp4, tmp6, \
tmp7, tmp8, \
xmm15, xmm14, \
zmm0, zmm1, zmm2, zmm3, zmm4, zmm5, zmm6, zmm7, \
zmm8, zmm9, zmm10, zmm11, zmm12, zmm13, \
zmm16, zmm17, zmm18, zmm19, zmm20, zmm21, zmm22, zmm23, \
zmm24, zmm25, zmm26, zmm27, zmm28, zmm29, zmm30, zmm31, \
%%NROUNDS
jmp %%aes_docsis_dec_crc32_avx512__exit
%%aes_docsis_dec_crc32_avx512__no_cipher:
;; tmp1 - already points to hash start
;; job is arg1
mov [rsp + _job_save], job
mov arg2, [job + _msg_len_to_hash_in_bytes]
xor arg3, arg3
mov arg1, tmp1
call ethernet_fcs_avx512_local
mov job, [rsp + _job_save]
%%aes_docsis_dec_crc32_avx512__exit:
mov tmp1, [job + _auth_tag_output]
mov [tmp1], eax ; store CRC32 value
or qword [job + _status], IMB_STATUS_COMPLETED_CIPHER
;; restore stack pointer and registers
mov r12, [rsp + _gpr_save + 0*8]
mov r13, [rsp + _gpr_save + 1*8]
mov rbx, [rsp + _gpr_save + 2*8]
mov rbp, [rsp + _gpr_save + 3*8]
mov rsp, [rsp + _rsp_save] ; original SP
%ifdef SAFE_DATA
clear_all_zmms_asm
%endif ;; SAFE_DATA
%endmacro
;; ===================================================================
;; ===================================================================
;; input: arg1 = job
;; ===================================================================
align 64
MKGLOBAL(aes_docsis128_dec_crc32_vaes_avx512,function,internal)
aes_docsis128_dec_crc32_vaes_avx512:
endbranch64
AES_DOCSIS_DEC_CRC32 9
ret
align 64
MKGLOBAL(aes_docsis256_dec_crc32_vaes_avx512,function,internal)
aes_docsis256_dec_crc32_vaes_avx512:
endbranch64
AES_DOCSIS_DEC_CRC32 13
ret
%ifdef LINUX
section .note.GNU-stack noalloc noexec nowrite progbits
%endif
|
;------------------------------------------------------------------------------
;
; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; RRotU64.nasm
;
; Abstract:
;
; 64-bit right rotation for Ia32
;
;------------------------------------------------------------------------------
SECTION .text
;------------------------------------------------------------------------------
; UINT64
; EFIAPI
; InternalMathRRotU64 (
; IN UINT64 Operand,
; IN UINTN Count
; );
;------------------------------------------------------------------------------
global ASM_PFX(InternalMathRRotU64)
ASM_PFX(InternalMathRRotU64):
push ebx
mov cl, [esp + 16]
mov eax, [esp + 8]
mov edx, [esp + 12]
shrd ebx, eax, cl
shrd eax, edx, cl
rol ebx, cl
shrd edx, ebx, cl
test cl, 32 ; Count >= 32?
jz .0
mov ecx, eax ; switch eax & edx if Count >= 32
mov eax, edx
mov edx, ecx
.0:
pop ebx
ret
|
SECTION code_fp_am9511
PUBLIC l_f32_sub
EXTERN cam32_sccz80_fsub_callee
defc l_f32_sub = cam32_sccz80_fsub_callee
|
#include "binary_search.h"
#include <benchmark/benchmark.h>
#include "data_generators.hpp"
using namespace mrai;
static void recursive_binary_search( benchmark::State& state )
{
auto input = generate_incrementing_sequence( state.range( 0 ) );
auto target = generate_random_target( state.range( 0 ) );
for ( auto _ : state )
{
[[maybe_unused]] auto result = recursive_binary_search( input.begin(), input.end(), target );
}
}
BENCHMARK( recursive_binary_search )->RangeMultiplier( 10 )->Range( 10, 10'000'000 )->Complexity();
static void sequential_binary_search( benchmark::State& state )
{
auto input = generate_incrementing_sequence( state.range( 0 ) );
auto target = generate_random_target( state.range( 0 ) );
for ( auto _ : state )
{
[[maybe_unused]] auto result = sequential_binary_search( input.begin(), input.end(), target );
}
}
BENCHMARK( sequential_binary_search )->RangeMultiplier( 10 )->Range( 10, 10'000'000 )->Complexity();
BENCHMARK_MAIN(); |
SECTION code_fp_am9511
PUBLIC _cos
EXTERN cam32_sdcc_cos
defc _cos = cam32_sdcc_cos
|
COMMENT @----------------------------------------------------------------------
Copyright (c) Berkeley Softworks 1992 -- All Rights Reserved
PROJECT: PC GEOS
MODULE: GeoWrite
FILE: documentDisplay.asm
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 3/92 Initial version
DESCRIPTION:
This file contains the VisContent related code for WriteDocumentClass
$Id: documentDisplay.asm,v 1.1 97/04/04 15:56:13 newdeal Exp $
------------------------------------------------------------------------------@
GeoWriteClassStructures segment resource
WriteDisplayClass
WriteMainDisplayClass
WriteMasterPageDisplayClass
GeoWriteClassStructures ends
;-----
DocOpenClose segment resource
COMMENT @----------------------------------------------------------------------
MESSAGE: WriteDisplayBuildBranch -- MSG_SPEC_BUILD_BRANCH
for WriteDisplayClass
DESCRIPTION: Do a little extra work while we're coming up
PASS:
*ds:si - instance data
es - segment of WriteDisplayClass
ax - The message
bp - SpecBuildFlags
RETURN:
DESTROYED:
bx, si, di, ds, es (message handler)
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 6/11/92 Initial version
------------------------------------------------------------------------------@
WriteDisplayBuildBranch method dynamic WriteDisplayClass,
MSG_SPEC_BUILD_BRANCH,
MSG_VIS_OPEN
; add ourself to the display GCN list now so that we can immediately
; set our rulers not usable if needed
mov di, MSG_META_GCN_LIST_ADD
call GCNCommon
mov di, offset WriteDisplayClass
GOTO ObjCallSuperNoLock
WriteDisplayBuildBranch endm
;---
WriteDisplayUnbuildBranch method dynamic WriteDisplayClass,
MSG_SPEC_UNBUILD_BRANCH,
MSG_VIS_CLOSE
mov di, offset WriteDisplayClass
call ObjCallSuperNoLock
; add ourself to the display GCN list now so that we can immediately
; set our rulers not usable if needed
mov di, MSG_META_GCN_LIST_REMOVE
call GCNCommon
ret
WriteDisplayUnbuildBranch endm
;---
GCNCommon proc near
push ax, si, bp
sub sp, size GCNListParams ; create stack frame
mov bp, sp
mov ss:[bp].GCNLP_ID.GCNLT_manuf, MANUFACTURER_ID_GEOWORKS
mov ss:[bp].GCNLP_ID.GCNLT_type,
GAGCNLT_DISPLAY_OBJECTS_WITH_RULERS
mov bx, ds:[LMBH_handle]
mov ss:[bp].GCNLP_optr.handle, bx
mov ss:[bp].GCNLP_optr.chunk, si
mov dx, size GCNListParams ; create stack frame
clr bx
call GeodeGetAppObject
mov_tr ax, di
mov di, mask MF_STACK or mask MF_FIXUP_DS
call ObjMessage
add sp, size GCNListParams ; fix stack
pop ax, si, bp
ret
GCNCommon endp
COMMENT @----------------------------------------------------------------------
MESSAGE: WriteMainDisplayUpdateRulers --
MSG_WRITE_DISPLAY_UPDATE_RULERS for WriteMainDisplayClass
DESCRIPTION: Update the usable/not-usable status of the rulers
PASS:
*ds:si - instance data
es - segment of WriteMainDisplayClass
ax - The message
cx - RulerShowControlAttributes
RETURN:
DESTROYED:
bx, si, di, ds, es (message handler)
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 6/11/92 Initial version
------------------------------------------------------------------------------@
WriteMainDisplayUpdateRulers method dynamic WriteMainDisplayClass,
MSG_WRITE_DISPLAY_UPDATE_RULERS
mov ax, mask RSCA_SHOW_VERTICAL
mov si, offset MainVerticalRulerView
call UpdateRuler
mov ax, mask RSCA_SHOW_HORIZONTAL
mov si, offset MainHorizontalRulerView
call UpdateRuler
mov ax, mask RSCA_SHOW_VERTICAL or mask RSCA_SHOW_HORIZONTAL
mov si, offset CornerGlyph
call UpdateRuler
ret
WriteMainDisplayUpdateRulers endm
;---
WriteMasterPageDisplayUpdateRulers method dynamic \
WriteMasterPageDisplayClass,
MSG_WRITE_DISPLAY_UPDATE_RULERS
mov ax, mask RSCA_SHOW_VERTICAL
mov si, offset MPVerticalRulerView
call UpdateRuler
mov ax, mask RSCA_SHOW_HORIZONTAL
mov si, offset MPHorizontalRulerView
call UpdateRuler
mov ax, mask RSCA_SHOW_VERTICAL or mask RSCA_SHOW_HORIZONTAL
mov si, offset MPCornerGlyph
call UpdateRuler
ret
WriteMasterPageDisplayUpdateRulers endm
COMMENT @----------------------------------------------------------------------
FUNCTION: UpdateRuler
DESCRIPTION: Update the usable/not-usable status of something
CALLED BY: INTERNAL
PASS:
*ds:si - object
ax - bits to check for
cx - RulerShowControlAttributes
RETURN:
none
DESTROYED:
bx, dx, di
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 6/11/92 Initial version
------------------------------------------------------------------------------@
UpdateRuler proc near uses cx
.enter
mov bx, ax
and bx, cx
cmp ax, bx
mov ax, MSG_GEN_SET_USABLE
jz 20$
mov ax, MSG_GEN_SET_NOT_USABLE
20$:
mov dl, VUM_NOW
call ObjCallInstanceNoLock
.leave
ret
UpdateRuler endp
DocOpenClose ends
DocEditMP segment resource
COMMENT @----------------------------------------------------------------------
MESSAGE: WriteMasterPageDisplaySetDocumentAndMP --
MSG_WRITE_MASTER_PAGE_DISPLAY_SET_DOCUMENT_AND_MP
for WriteMasterPageDisplayClass
DESCRIPTION: Set the document
PASS:
*ds:si - instance data
es - segment of WriteMasterPageDisplayClass
ax - The message
cx:dx - document
bp - master page body block
RETURN:
DESTROYED:
bx, si, di, ds, es (message handler)
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 6/ 5/92 Initial version
------------------------------------------------------------------------------@
WriteMasterPageDisplaySetDocumentAndMP method dynamic \
WriteMasterPageDisplayClass,
MSG_WRITE_MASTER_PAGE_DISPLAY_SET_DOCUMENT_AND_MP
movdw ds:[di].WMPDI_document, cxdx
mov ds:[di].WMPDI_bodyVMBlock, bp
ret
WriteMasterPageDisplaySetDocumentAndMP endm
COMMENT @----------------------------------------------------------------------
MESSAGE: WriteMasterPageDisplayClose -- MSG_GEN_DISPLAY_CLOSE
for WriteMasterPageDisplayClass
DESCRIPTION: Close a master page
PASS:
*ds:si - instance data
es - segment of WriteMasterPageDisplayClass
ax - The message
RETURN:
DESTROYED:
bx, si, di, ds, es (message handler)
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 6/ 5/92 Initial version
------------------------------------------------------------------------------@
WriteMasterPageDisplayClose method dynamic WriteMasterPageDisplayClass,
MSG_GEN_DISPLAY_CLOSE
; we need to tell the associated document to close itsself
movdw bxsi, ds:[di].WMPDI_document
mov cx, ds:[di].WMPDI_bodyVMBlock
mov ax, MSG_WRITE_DOCUMENT_CLOSE_MASTER_PAGE
call DEMP_ObjMessageNoFlags
ret
WriteMasterPageDisplayClose endm
DocEditMP ends
|
; A032509: a(n) = round(tan(Pi*(1-1/n)/2)).
; 0,1,2,2,3,4,4,5,6,6,7,8,8,9,10,10,11,11,12,13,13,14,15,15,16,17,17,18,18,19,20,20,21,22,22,23,24,24,25,25,26,27,27,28,29,29,30,31,31,32,32,33,34,34,35,36,36,37,38,38,39,39,40,41,41,42,43,43,44
add $0,3
mov $3,2
lpb $0
mov $1,11
add $3,$0
mov $0,0
mov $5,8
mul $5,$3
trn $3,10
add $4,$5
add $2,$4
sub $2,$3
div $2,11
add $1,$2
lpe
sub $1,14
mov $0,$1
|
// Copyright 2020 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V.
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// https:www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
//
#include "mars_topology_common/TimeIntervalBasedObjectTree.h"
mars::topology::common::TimeIntervalBasedObjectTree::TimeIntervalBasedObjectTree()
{
this->mRoot = NULL;
}
void mars::topology::common::TimeIntervalBasedObjectTree::insert(
mars::topology::common::TimeIntervalBaseObject*
timeIntervalBaseObject) noexcept(false)
{
this->mRoot = this->insertTimeIntervalBaseObject(this->mRoot, timeIntervalBaseObject);
}
bool mars::topology::common::TimeIntervalBasedObjectTree::checkOverlap(
const mars::common::TimeInterval& pTimeInterval) const
{
return (this->checkOverlapWithTree(this->mRoot, pTimeInterval) != NULL);
}
std::shared_ptr<mars::topology::common::TimeIntervalBasedObjectTreeNode>
mars::topology::common::TimeIntervalBasedObjectTree::getRoot() const
{
return this->mRoot;
}
std::shared_ptr<mars::topology::common::TimeIntervalBasedObjectTreeNode>
mars::topology::common::TimeIntervalBasedObjectTree::insertTimeIntervalBaseObject(
std::shared_ptr<TimeIntervalBasedObjectTreeNode> pRoot,
mars::topology::common::TimeIntervalBaseObject* pTimeIntervalBaseObject)
{
// Base case: Tree is empty, new node becomes root
if (pRoot == NULL)
{
// return std::make_shared<mars::topology::common::TimeIntervalBasedObjectTreeNode>(
// pTimeIntervalBaseObject);
return std::shared_ptr<mars::topology::common::TimeIntervalBasedObjectTreeNode>(
new mars::topology::common::TimeIntervalBasedObjectTreeNode(pTimeIntervalBaseObject));
}
// If root's low value is smaller, then new interval goes to left subtree
if (pTimeIntervalBaseObject->getTimeInterval().getStartTime() >
pRoot->getTimeIntervalBaseObject()->getTimeInterval().getStartTime())
{
pRoot->setLeftNode(
mars::topology::common::TimeIntervalBasedObjectTree::insertTimeIntervalBaseObject(
pRoot->getLeftNode(), pTimeIntervalBaseObject));
}
// else, new node goes to right subtree.
else
{
pRoot->setRightNode(
mars::topology::common::TimeIntervalBasedObjectTree::insertTimeIntervalBaseObject(
pRoot->getRightNode(), pTimeIntervalBaseObject));
}
// Update the max value of this ancestor if needed
if (pRoot->getMaxTime() < pTimeIntervalBaseObject->getTimeInterval().getEndTime())
{
pRoot->setMaxTime(pTimeIntervalBaseObject->getTimeInterval().getEndTime());
}
return pRoot;
}
std::shared_ptr<mars::topology::common::TimeIntervalBaseObject>
mars::topology::common::TimeIntervalBasedObjectTree::checkOverlapWithTree(
std::shared_ptr<mars::topology::common::TimeIntervalBasedObjectTreeNode> pRoot,
const mars::topology::common::TimeIntervalBaseObject& pTimeIntervalBaseObject)
{
// Base Case, tree is empty
if (pRoot == NULL)
return NULL;
// If given interval overlaps with root
if (pRoot->getTimeIntervalBaseObject()->getTimeInterval() !=
pTimeIntervalBaseObject.getTimeInterval())
{
return pRoot->getTimeIntervalBaseObject();
}
// If left child of root is present and max of left child is
// greater than or equal to given interval, then i may
// overlap with an interval is left subtree
if ((pRoot->getLeftNode() != NULL) && (pRoot->getLeftNode()->getMaxTime() >=
pTimeIntervalBaseObject.getTimeInterval().getStartTime()))
{
return mars::topology::common::TimeIntervalBasedObjectTree::checkOverlapWithTree(
pRoot->getLeftNode(), pTimeIntervalBaseObject);
}
// Else interval can only overlap with right subtree
return mars::topology::common::TimeIntervalBasedObjectTree::checkOverlapWithTree(
pRoot->getRightNode(), pTimeIntervalBaseObject);
}
|
/*
* Copyright 2017-2018, Intel Corporation
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* * Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifdef __linux__
#include <errno.h>
#include <fcntl.h>
#include <fts.h>
#include <libgen.h>
#include <sys/statvfs.h>
#include <unistd.h>
#include <cstring>
#include "api_c.h"
int ApiC::GetExecutableDirectory(std::string &path) {
char file_path[FILENAME_MAX + 1] = {0};
ssize_t count = readlink("/proc/self/exe", file_path, FILENAME_MAX);
if (count == -1) {
return -1;
}
file_path[count] = '\0';
path = std::string(dirname(file_path)) + "/";
return 0;
}
long long ApiC::GetFreeSpaceT(const std::string &path) {
struct statvfs fs;
if (statvfs(path.c_str(), &fs) != 0) {
std::cerr << "Unable to get file system statistics: " << strerror(errno)
<< std::endl;
return -1;
}
return fs.f_bsize * fs.f_bavail;
}
int ApiC::CreateDirectoryT(const std::string &path) {
if (mkdir(path.c_str(), S_IRWXU | S_IRWXG | S_IROTH | S_IXOTH) == -1) {
std::cerr << "mkdir failed: " << strerror(errno) << std::endl;
return -1;
}
return 0;
}
int ApiC::CleanDirectory(const std::string &dir) {
FTS *fts;
FTSENT *f_sent;
int options = FTS_COMFOLLOW | FTS_LOGICAL | FTS_NOCHDIR;
int ret = 0;
char *d[] = {(char *)dir.c_str(), nullptr};
fts = fts_open(d, options, nullptr);
if (fts == nullptr) {
std::cerr << "fts_open failed: " << strerror(errno) << std::endl;
return -1;
}
f_sent = fts_children(fts, 0);
if (f_sent == nullptr) {
if (fts_close(fts) != 0) {
std::cerr << "fts_close failed: " << strerror(errno) << std::endl;
return -1;
}
return 0;
}
while ((f_sent = fts_read(fts)) != nullptr) {
switch (f_sent->fts_info) {
case FTS_D:
if (f_sent->fts_path != dir &&
RemoveDirectoryT(f_sent->fts_path) != 0) {
std::cerr << "Unable to remove directory " << f_sent->fts_path << ": "
<< strerror(errno) << std::endl;
ret = -1;
}
break;
case FTS_F:
if (RemoveFile(f_sent->fts_path) != 0) {
std::cerr << "Unable to remove file: " << f_sent->fts_path
<< std::endl;
ret = -1;
}
break;
default:
break;
}
}
if (fts_close(fts) != 0) {
std::cerr << "fts_close failed: " << strerror(errno) << std::endl;
ret = -1;
}
return ret;
}
int ApiC::RemoveDirectoryT(const std::string &path) {
int ret = rmdir(path.c_str());
if (ret != 0) {
std::cerr << "Unable to remove directory: " << strerror(errno) << std::endl;
return ret;
}
return 0;
}
int ApiC::SetEnv(const std::string &name, const std::string &value) {
return setenv(name.c_str(), value.c_str(), 1);
}
int ApiC::UnsetEnv(const std::string &name) {
return unsetenv(name.c_str());
}
#endif // __linux__
|
; A152017: a(n) = n^5-n^4-n^3-n^2-n.
; 0,-3,2,123,684,2345,6222,14007,28088,51669,88890,144947,226212,340353,496454,705135,978672,1331117,1778418,2338539,3031580,3879897,4908222,6143783,7616424,9358725,11406122,13797027,16572948,19778609,23462070,27674847,32472032,37912413,44058594,50977115,58738572,67417737,77093678,87849879,99774360,112959797,127503642,143508243,161080964,180334305,201386022,224359247,249382608,276590349,306122450,338124747,372749052,410153273,450501534,493964295,540718472,590947557,644841738,702598019,764420340,830519697,901114262,976429503,1056698304,1142161085,1233065922,1329668667,1432233068,1541030889,1656342030,1778454647,1907665272,2044278933,2188609274,2340978675,2501718372,2671168577,2849678598,3037606959,3235321520,3443199597,3661628082,3891003563,4131732444,4384231065,4648925822,4926253287,5216660328,5520604229,5838552810,6170984547,6518388692,6881265393,7260125814,7655492255,8067898272,8497888797,8946020258,9412860699,9898989900,10404999497,10931493102,11479086423,12048407384,12640096245,13254805722,13893201107,14555960388,15243774369,15957346790,16697394447,17464647312,18259848653,19083755154,19937137035,20820778172,21735476217,22682042718,23661303239,24674097480,25721279397,26803717322,27922294083,29077907124,30271468625,31503905622,32776160127,34089189248,35443965309,36841475970,38282724347,39768729132,41300524713,42879161294,44505705015,46181238072,47906858837,49683681978,51512838579,53395476260,55332759297,57325868742,59376002543,61484375664,63652220205,65880785522,68171338347,70525162908,72943561049,75427852350,77979374247,80599482152,83289549573,86050968234,88885148195,91793517972,94777524657,97838634038,100978330719,104198118240,107499519197,110884075362,114353347803,117908917004,121552382985,125285365422,129109503767,133026457368,137037905589,141145547930,145351104147,149656314372,154062939233,158572759974,163187578575,167909217872,172739521677,177680354898,182733603659,187901175420,193184999097,198587025182,204109225863,209753595144,215522148965,221416925322,227439984387,233593408628,239879302929,246299794710,252857034047,259553193792,266390469693,273371080514,280497268155,287771297772,295195457897,302772060558,310503441399,318391959800,326439998997,334649966202,343024292723,351565434084,360275870145,369158105222,378214668207,387448112688,396861017069,406455984690,416235643947,426202648412,436359676953,446709433854,457254648935,467998077672,478942501317,490090727018,501445587939,513009943380,524786678897,536778706422,548988964383,561420417824,574076058525,586958905122,600072003227,613418425548,627001272009,640823669870,654888773847,669199766232,683759857013,698572283994,713640312915,728967237572,744556379937,760411090278,776534747279,792930758160,809602558797,826553613842,843787416843,861307490364,879117386105,897220685022,915620997447,934321963208,953327251749
mov $1,$0
mov $2,4
lpb $2
sub $1,1
mul $1,$0
sub $2,1
lpe
|
global get_fs_sentinel_value:function
global pre_initialize_tls:function
extern _ELF_START_
extern kernel_start
%define IA32_FS_BASE 0xc0000100
get_fs_sentinel_value:
mov rax, [fs:0x28]
ret
pre_initialize_tls:
mov ecx, IA32_FS_BASE
mov edx, 0x0
mov eax, initial_tls_table
wrmsr
;; stack starts at ELF boundary growing down
mov rsp, _ELF_START_
call kernel_start
ret
SECTION .data
initial_tls_table:
dd initial_tls_table
dd 0
dq 0
dq 0
dq 0
dq 0
dq 0x123456789ABCDEF
dq 0x123456789ABCDEF
|
; A089633: Numbers having no more than one 0 in their binary representation.
; 0,1,2,3,5,6,7,11,13,14,15,23,27,29,30,31,47,55,59,61,62,63,95,111,119,123,125,126,127,191,223,239,247,251,253,254,255,383,447,479,495,503,507,509,510,511,767,895,959,991,1007,1015,1019,1021,1022,1023,1535,1791,1919,1983,2015,2031,2039,2043,2045,2046,2047,3071,3583,3839,3967,4031,4063,4079,4087,4091,4093,4094,4095,6143,7167,7679,7935,8063,8127,8159,8175,8183,8187,8189,8190,8191,12287,14335,15359,15871,16127,16255,16319,16351
lpb $0
mov $2,$0
sub $0,1
seq $2,57728 ; A triangular table of decreasing powers of two (with first column all ones).
add $1,$2
lpe
mov $0,$1
|
-- 7 Billion Humans (2145) --
-- 53: 100 Cubes on the Floor --
-- Author: landfillbaby
-- Size: 26
-- Speed: 61
a:
step w
if c == nothing:
jump a
endif
pickup c
if n == wall:
mem1 = set 99
jump b
endif
if s == wall:
mem1 = set 9
jump c
endif
d:
mem1 = set n
if mem1 != 0:
mem1 = calc mem1 - 10
jump e
endif
mem1 = set s
if mem1 != 0:
mem1 = calc mem1 + 10
jump f
endif
jump d
f:
b:
c:
e:
g:
write mem1
drop
if w != wall:
step w
pickup c
mem1 = calc mem1 - 1
jump g
endif |
;*****************************************************
;
; Video Technology library for small C compiler
;
; Juergen Buchmueller
;
;*****************************************************
XLIB isqrt
; ----- uint __FASTCALL__ isqrt(uint val)
.isqrt
ld b,l ; b = LSB of val
ld l,h ; l = MSB of val
xor a ; result
ld h,a
ld de,1
.sqrt1
or a
sbc hl,de
jr c, sqrt2
inc de
inc de
add a,$10 ; result += 16
jp sqrt1
.sqrt2
add hl,de ; take back SBC HL, DE
ld c,a ; save result
ld e,a ; save result * 16 in E
inc a ; result * 16 + 1
add a,e ; add to E
ld e,a ; start subtracting here
ld d,0
ld a,c ; get result
ld h,l ; val <<= 8
ld l,b ; + LSB(val)
.sqrt3
or a
sbc hl,de
jr c, sqrt4
inc de
inc de
inc a ; result += 1
jp sqrt3
.sqrt4
add hl,de ; take back SBC HL, DE
ld l,a ; result in HL
ret
|
;// TI File $Revision: /main/2 $
;// Checkin $Date: January 4, 2011 10:10:10 $
;//###########################################################################
;//
;// FILE: F2806x_CSMPasswords.asm
;//
;// TITLE: F2806x Code Security Module Passwords.
;//
;// DESCRIPTION:
;//
;// This file is used to specify password values to
;// program into the CSM password locations in Flash
;// at 0x3F7FF8 - 0x3F7FFF.
;//
;// In addition, the reserved locations 0x3F7F80 - 0x3F7FF5 are
;// all programmed to 0x0000
;//
;//###########################################################################
;// $TI Release: F2806x Support Library v2.04.00.00 $
;// $Release Date: Thu Oct 18 15:47:20 CDT 2018 $
;// $Copyright:
;// Copyright (C) 2009-2018 Texas Instruments Incorporated - http://www.ti.com/
;//
;// Redistribution and use in source and binary forms, with or without
;// modification, are permitted provided that the following conditions
;// are met:
;//
;// Redistributions of source code must retain the above copyright
;// notice, this list of conditions and the following disclaimer.
;//
;// Redistributions in binary form must reproduce the above copyright
;// notice, this list of conditions and the following disclaimer in the
;// documentation and/or other materials provided with the
;// distribution.
;//
;// Neither the name of Texas Instruments Incorporated nor the names of
;// its contributors may be used to endorse or promote products derived
;// from this software without specific prior written permission.
;//
;// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
;// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
;// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
;// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
;// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
;// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
;// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
;// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
;// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
;// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
;// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;// $
;//###########################################################################
; The "csmpasswords" section contains the actual CSM passwords that will be
; linked and programmed into to the CSM password locations (PWL) in flash.
; These passwords must be known in order to unlock the CSM module.
; All 0xFFFF's (erased) is the default value for the password locations (PWL).
; It is recommended that all passwords be left as 0xFFFF during code
; development. Passwords of 0xFFFF do not activate code security and dummy
; reads of the CSM PWL registers is all that is required to unlock the CSM.
; When code development is complete, modify the passwords to activate the
; code security module.
.sect "csmpasswds"
.int 0xFFFF ;PWL0 (LSW of 128-bit password)
.int 0xFFFF ;PWL1
.int 0xFFFF ;PWL2
.int 0xFFFF ;PWL3
.int 0xFFFF ;PWL4
.int 0xFFFF ;PWL5
.int 0xFFFF ;PWL6
.int 0xFFFF ;PWL7 (MSW of 128-bit password)
;----------------------------------------------------------------------
; For code security operation, all addresses between 0x3F7F80 and
; 0x3F7FF5 cannot be used as program code or data. These locations
; must be programmed to 0x0000 when the code security password locations
; (PWL) are programmed. If security is not a concern, then these addresses
; can be used for code or data.
; The section "csm_rsvd" can be used to program these locations to 0x0000.
.sect "csm_rsvd"
.loop (3F7FF5h - 3F7F80h + 1)
.int 0x0000
.endloop
;//
;// End of file
;//
|
/*
* Thread key.
*
* A thead key can be used to create variables that have different values in
* different threads.
*/
#ifndef CONCURRENT__THREADS__THREAD_KEY_HH
#define CONCURRENT__THREADS__THREAD_KEY_HH
#include "lang/exceptions/ex_not_found.hh"
#include "lang/null.hh"
#include <pthread.h>
namespace concurrent {
namespace threads {
/*
* Imports.
*/
using lang::exceptions::ex_not_found;
/*
* Thread key.
*/
template <typename T>
class thread_key {
public:
/*
* Constructor.
* Allocate a new key that can be used to associate each thread with an
* object of type T.
*/
thread_key();
/*
* Constructor.
* Allocate a new key that can be used to associate each thread with an
* object of type T and set the associated object for the current thread.
*/
explicit thread_key(T&);
/*
* Copy constructor.
* Allocate a new key and set the associated object for the current thread
* to the same object associated with the given key.
*/
explicit thread_key(const thread_key<T>&);
/*
* Destructor.
* Deallocate the key.
*/
virtual ~thread_key();
/*
* Set the object associated with the current thread.
*/
void set(T&);
/*
* Get the object associated with the current thread.
* Throw an exception (ex_not_found) if no object is associated with the
* current thread.
*/
T& get() const;
/*
* Remove the object (if any) associated with the current thread.
* This does not delete the object, only removes the association.
*/
void clear();
protected:
pthread_key_t _key; /* key for thread-specific data */
};
/*
* Constructor.
* Allocate a new key that can be used to associate each thread with an
* object of type T.
*/
template <typename T>
thread_key<T>::thread_key() {
pthread_key_create(&_key, NULL);
}
/*
* Constructor.
* Allocate a new key that can be used to associate each thread with an
* object of type T and set the associated object for the current thread.
*/
template <typename T>
thread_key<T>::thread_key(T& t) {
pthread_key_create(&_key, NULL);
this->set(t);
}
/*
* Copy constructor.
* Allocate a new key and set the associated object for the current thread
* to the same object associated with the given key.
*/
template <typename T>
thread_key<T>::thread_key(const thread_key<T>& t_key) {
T& t = t_key.get();
pthread_key_create(&_key, NULL);
this->set(t);
}
/*
* Destructor.
* Deallocate the key.
*/
template <typename T>
thread_key<T>::~thread_key() {
pthread_key_delete(_key);
}
/*
* Set the object associated with the current thread.
*/
template <typename T>
void thread_key<T>::set(T& t) {
pthread_setspecific(_key, &t);
}
/*
* Get the object associated with the current thread.
* Throw an exception (ex_not_found) if no object is associated with the
* current thread.
*/
template <typename T>
T& thread_key<T>::get() const {
T* p = static_cast<T*>(pthread_getspecific(_key));
if (p == NULL)
throw ex_not_found(
"no object associated with key in current thread"
);
return *p;
}
/*
* Remove the object (if any) associated with the current thread.
* This does not delete the object, only removes the association.
*/
template <typename T>
void thread_key<T>::clear() {
pthread_setspecific(_key, NULL);
}
} /* namespace threads */
} /* namespace concurrent */
#endif
|
;
; Fast background area save
;
; MSX version
;
; $Id: bksave.asm,v 1.7 2016-07-02 09:01:36 dom Exp $
;
SECTION smc_clib
PUBLIC bksave
PUBLIC _bksave
PUBLIC bkpixeladdress
EXTERN l_tms9918_disable_interrupts
EXTERN l_tms9918_enable_interrupts
INCLUDE "video/tms9918/vdp.inc"
.bksave
._bksave
push ix ;save callers
ld hl,2
add hl,sp
ld e,(hl)
inc hl
ld d,(hl) ;sprite address
push de
pop ix
inc hl
ld e,(hl)
inc hl
inc hl
ld d,(hl) ; x and y __gfx_coords
ld h,d ; current x coordinate
ld l,e ; current y coordinate
ld (ix+2),h
ld (ix+3),l
ld a,(ix+0)
ld b,(ix+1)
dec a
srl a
srl a
srl a
inc a
inc a ; INT ((Xsize-1)/8+2)
ld (rbytes+1),a
.bksaves
push bc
push hl
call bkpixeladdress
pop hl
.rbytes
ld a,0
.rloop ex af,af
;-------
call l_tms9918_disable_interrupts
IF VDP_CMD < 0
ld a,e
ld (-VDP_CMD),a
ld a,d ; MSB of video mem ptr
and @00111111 ; masked with "read command" bits
ld (-VDP_CMD),a
ld a,(-VDP_DATAIN)
ld (ix+4),a
ELSE
ld bc,VDP_CMD
out (c),e
ld a,d ; MSB of video mem ptr
and @00111111 ; masked with "read command" bits
out (c),a
ld bc,VDP_DATAIN
in a,(c)
ld (ix+4),a
ENDIF
call l_tms9918_enable_interrupts
ex de,hl
ld bc,8
add hl,bc
ex de,hl
inc ix
ex af,af
dec a
jr nz,rloop
inc l
pop bc
djnz bksaves
pop ix ;restore callers
ret
.bkpixeladdress
push hl
ld b,l ; Y
ld a,h ; X
and @11111000
ld l,a
ld a,b ; Y
rra
rra
rra
and @00011111
ld h,a ; + ((Y & @11111000) << 5)
ld a,b ; Y
and 7
ld e,a
ld d,0
add hl,de ; + Y&7
ex de,hl
pop hl
ret
|
;
; Sharp OZ family functions
;
; ported from the OZ-7xx SDK by by Alexander R. Pruss
; by Stefano Bodrato - Oct. 2003
;
;
; clock functions
;
;
; ------
; $Id: oztimecompute.asm,v 1.1 2003/10/21 17:15:22 stefano Exp $
;
XLIB Compute
Compute:
in a,(c)
and 0fh
add a,a
ld b,a
add a,a
add a,a
add a,b
ld b,a ; b=10*(c)
dec c
in a,(c)
and 0fh
add a,b
ld l,a
ld h,0
ret
|
// Eggs.SD-6
//
// Copyright Agustin K-ballo Berge, Fusion Fenix 2015
//
// Distributed under the Boost Software License, Version 1.0. (See accompanying
// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
void test_noexcept() noexcept {
}
void test_noexcept_if() noexcept(true) {
}
void test_noexcept_expr() noexcept(noexcept(test_noexcept())) {
int check_noexcept[noexcept(test_noexcept()) ? 1 : -1];
int check_noexcept_if[noexcept(test_noexcept_if()) ? 1 : -1];
int check_noexcept_expr[noexcept(test_noexcept_expr()) ? 1 : -1];
}
int main() {
test_noexcept();
test_noexcept_if();
test_noexcept_expr();
}
|
#include "JWModules.hpp"
struct Pete : Module {
enum ParamIds {
BOWL_PARAM,
NUM_PARAMS
};
enum InputIds {
NUM_INPUTS
};
enum OutputIds {
NUM_OUTPUTS
};
enum LightIds {
NUM_LIGHTS
};
int catY = 0;
bool goingDown = true;
Pete() {
config(NUM_PARAMS, NUM_INPUTS, NUM_OUTPUTS, NUM_LIGHTS);
}
};
struct PeteWidget : ModuleWidget {
PeteWidget(Pete *module);
};
PeteWidget::PeteWidget(Pete *module) {
setModule(module);
box.size = Vec(RACK_GRID_WIDTH*12, RACK_GRID_HEIGHT);
{
SVGPanel *panel = new SVGPanel();
panel->box.size = box.size;
panel->setBackground(APP->window->loadSvg(asset::plugin(pluginInstance, "res/PT.svg")));
addChild(panel);
}
addChild(createWidget<Screw_J>(Vec(16, 2)));
addChild(createWidget<Screw_J>(Vec(16, 365)));
addChild(createWidget<Screw_W>(Vec(box.size.x-29, 2)));
addChild(createWidget<Screw_W>(Vec(box.size.x-29, 365)));
}
Model *modelPete = createModel<Pete, PeteWidget>("Pete"); |
.data
arrSize: .word 0
arr: .space 4000 #4000 bytes can contains 1000 word elements
inputFile: .asciiz "input_sort.txt"
outputFile: .asciiz "output_sort.txt"
inputBuffer: .space 20000
outputBuffer: .space 20000
.text
.globl main
main:
jal readFile
#Read number of elements
la $a0, inputBuffer
jal charToInt
addi $s0, $v0, 0
la $t0, arrSize
sw $s0, 0($t0)
#Convert input string to int array
jal toArray
#Preparing parameters for Quick sort
la $a0, arr
la $t0, arrSize
lw $t1, 0($t0)
li $t2, 4
subi $t1, $t1, 1
mult $t1, $t2
mflo $t3
add $a1, $a0, $t3
jal quickSort
#Write result to file
jal writeFile
li $v0, 10
syscall
########################
##Load Array to Memory##
########################
readFile:
#Open File
li $v0, 13
la $a0, inputFile
li $a1, 0
li $a2, 0
syscall
addi $s0, $v0, 0
#Read File
li $v0, 14
addi $a0, $s0, 0
la $a1, inputBuffer
li $a2, 19999
syscall
#Close file
li $v0, 16
addi $a0, $s0, 0
syscall
jr $ra
#Convert a char to int
charToInt:
li $v0, 0
loopConvert:
lb $t0, 0($a0)
#Check whether this character is a number
bgt $t0, '9', endLoopConvert
blt $t0, '0', endLoopConvert
#num *= 10 by using num = num + 8 + 2 or num = (num << 3) + (num << 1)
sll $t1, $v0, 1
sll $v0, $v0, 3
add $v0, $v0, $t1
subi $t0, $t0, '0'
add $v0, $v0, $t0
addi $a0, $a0, 1
j loopConvert
endLoopConvert:
jr $ra # return
#String to array
toArray:
addi $s2, $ra, 0
la $s3, arr
la $a0, inputBuffer
jal charToInt
addi $s1, $v0, 0
addi $a0, $a0, 1
lb $t0, 0($a0)
bgt $t0, '9', endLine
blt $t0, '0', endLine
j loopInput
endLine:
addi $a0, $a0, 1
loopInput:
beq $s1, 0, endLoopInput
jal charToInt
addi $a0, $a0, 1
addi $s1, $s1, -1
sw $v0, 0($s3)
addi $s3, $s3, 4
j loopInput
endLoopInput:
addi $ra, $s2, 0
jr $ra
##############
##Quick Sort##
##############
##This procedure receive $a0: left, $a1: right, $a2: pivot
##Specification:
##$t0: leftArr[leftPointer]
##$t1: leftArr[rightPointer]
partition:
subi $t0, $a0, 4
addi $t1, $a1, 0
#Get address of array
la $t2, arr
loopLeftPointer:
addi $t0, $t0, 4
lw $t3, 0($t0)
bge $t3, $a2, loopRightPointer
j loopLeftPointer
loopRightPointer:
ble $t1, $t2, endSortLoop #Compare $t1(Right pointer) and $t2(Address of first element)
subi $t1, $t1, 4
lw $t3, 0($t1)
ble $t3, $a2, endSortLoop
j loopRightPointer
endSortLoop:
bge $t0, $t1, outLoop
#Swap
lw $t4, 0($t0)
lw $t5, 0($t1)
sw $t4, 0($t1)
sw $t5, 0($t0)
j loopLeftPointer
outLoop:
lw $t4, 0($t0)
lw $t5, 0($a1)
sw $t4, 0($a1)
sw $t5, 0($t0)
addi $v0, $t0, 0
jr $ra
quickSort:
ble $a1, $a0, endQuickSort
lw $a2, 0($a1)
addi $s0, $ra, 0
jal partition
#Push to stack
subi $sp, $sp, 12
sw $s0, 0($sp)
sw $v0, 4($sp)
sw $a1, 8($sp)
subi $a1, $v0, 4
jal quickSort
#Pop stack
lw $v0, 4($sp)
lw $a1, 8($sp)
addi $a0, $v0, 4
jal quickSort
lw $ra, 0($sp)
addi $sp, $sp, 12
endQuickSort:
jr $ra
################
###Write File###
################
intToString:
beq $a0, $0, isZero
li $t0, 10
addi $t2, $sp, 0#Start address of stack
loopDiv:
beq $a0, $0, getDataFromStack
div $a0, $t0
mfhi $t1
mflo $a0
addi $t1, $t1, '0'
subi $sp, $sp, 1
sb $t1, 0($sp)
j loopDiv
getDataFromStack:
beq $sp, $t2, done
lb $t1, 0($sp)
addi $sp, $sp, 1
sb $t1, 0($a1)
addi $a1, $a1, 1
j getDataFromStack
isZero:
li $t0, '0'
sb $t0, 0($a1)
addi $a1, $a1, 1
done:
li $t0, ' '
sb $t0, 0($a1)
jr $ra
writeFile:
la $s0, arr
la $s1, arrSize
lw $s2, 0($s1)
addi $s3, $ra, 0
la $a1, outputBuffer
li $s4, ' '
loopWriteToBuffer:
beq $s2, $0, endLoopWrite
subi $s2, $s2, 1
lw $a0, 0($s0)
addi $s0, $s0, 4
jal intToString
sb $s4, 0($a1)
addi $a1, $a1, 1
j loopWriteToBuffer
endLoopWrite:
addi $t0, $a1, 0
#Open file
li $v0, 13
la $a0, outputFile
li $a1, 1
li $a2, 0
syscall
#Write file
addi $s0, $v0, 0
li $v0, 15
addi $a0, $s0, 0
la $a1, outputBuffer
sub $a2, $t0, $a1 #Get length of buffer
syscall
#Close file
li $v0, 16
addi $a0, $s0, 0
syscall
jr $s3
|
; A093142: Expansion of (1-5x)/((1-x)(1-10x)).
; 1,6,56,556,5556,55556,555556,5555556,55555556,555555556,5555555556,55555555556,555555555556,5555555555556,55555555555556,555555555555556,5555555555555556
mov $1,10
pow $1,$0
div $1,9
mul $1,5
add $1,1
|
%define BE(a) ( ((((a)>>24)&0xFF) << 0) + ((((a)>>16)&0xFF) << 8) + ((((a)>>8)&0xFF) << 16) + ((((a)>>0)&0xFF) << 24))
%define fourcc(a) db a
moov_start:
dd BE(moov_end - moov_start)
fourcc("moov")
mvhd_start:
dd BE(mvhd_end - mvhd_start)
dd "mvhd"
mvhd_end:
trak_start:
dd BE(trak_end - trak_start)
fourcc("trak")
tkhd_start:
dd BE(tkhd_end - tkhd_start)
dd "tkhd"
db 0x00 ; version(8)
db 0x00, 0x00, 0x01 ; flags(24)
db 0xD7, 0xAE, 0x43, 0xC0 ; creation_time(32)
db 0xD8, 0x7E, 0xD7, 0x51 ; modification_time(32)
db 0x00, 0x00, 0x00, 0x02 ; track_ID(32)
db 0x00, 0x00, 0x00, 0x00 ; reserved(32)
db 0x00, 0x00, 0x09, 0x49 ; duration(32)
db 0x00, 0x00, 0x00, 0x00 ; reserved(32)
db 0x00, 0x00, 0x00, 0x00 ; reserved(32)
db 0x00, 0x00 ; layer(16)
db 0x00, 0x00 ; alternate_group(16)
db 0x00, 0x00 ; volume(16)
db 0x00, 0x00 ; reserved(16)
db 0x00, 0x01, 0x00, 0x00 ; matrix(32)
db 0x00, 0x00, 0x00, 0x00 ; matrix(32)
db 0x00, 0x00, 0x00, 0x00 ; matrix(32)
db 0x00, 0x00, 0x00, 0x00 ; matrix(32)
db 0x00, 0x01, 0x00, 0x00 ; matrix(32)
db 0x00, 0x00, 0x00, 0x00 ; matrix(32)
db 0x00, 0x00, 0x00, 0x00 ; matrix(32)
db 0x00, 0x00, 0x00, 0x00 ; matrix(32)
db 0x40, 0x00, 0x00, 0x00 ; matrix(32)
db 0x01, 0xE0, 0x00, 0x00 ; width(32)
db 0x01, 0x0E, 0x00, 0x00 ; height(32)
tkhd_end:
mdia_start:
dd BE(mdia_end - mdia_start)
fourcc("mdia")
hdlr_start:
dd BE(hdlr_end - hdlr_start)
db "hdlr"
db 0x00 ; version(8)
db 0x00, 0x00, 0x00 ; flags(24)
db 0x00, 0x00, 0x00, 0x00 ; pre_defined(32)
db 0x70, 0x69, 0x63, 0x74 ; handler_type(32) ('pict')
db 0x00, 0x00, 0x00, 0x00 ; reserved1(32)
db 0x00, 0x00, 0x00, 0x00 ; reserved2(32)
db 0x00, 0x00, 0x00, 0x00 ; reserved3(32)
db 0x00 ; name(8)
hdlr_end:
mdhd_start:
dd BE(mdhd_end - mdhd_start)
dd "mdhd"
mdhd_end:
minf_start:
dd BE(minf_end - minf_start)
fourcc("minf")
vmhd_start:
dd BE(vmhd_end - vmhd_start)
dd "vmhd"
db 0x00 ; (8)
db 0x00 ; (8)
db 0x00 ; (8)
db 0x01 ; (8)
db 0x00 ; (8)
db 0x00 ; (8)
db 0x00 ; (8)
db 0x00 ; (8)
db 0x00 ; (8)
db 0x00 ; (8)
db 0x00 ; (8)
db 0x00 ; (8)
vmhd_end:
dinf_start:
dd BE(dinf_end - dinf_start)
dd "dinf"
dref_start:
dd BE(dref_end - dref_start)
dd "dref"
db 0x00 ; version(8)
db 0x00, 0x00, 0x00 ; flags(24)
db 0x00, 0x00, 0x00, 0x01 ; entry_count(32)
url_start:
dd BE(url_end - url_start)
dd "url "
db 0x00 ; version(8)
db 0x00, 0x00, 0x01 ; flags(24)
url_end:
dref_end:
dinf_end:
stbl_start:
dd BE(stbl_end - stbl_start)
fourcc("stbl")
stsd_start:
dd BE(stsd_end - stsd_start)
fourcc("stsd")
dd BE(0)
dd BE(0) ; entry_count
stsd_end:
stts_start:
dd BE(stts_end - stts_start)
dd "stts"
db 0x00 ; version(8)
db 0x00, 0x00, 0x00 ; flags(24)
db 0x00, 0x00, 0x00, 0x01 ; entry_count(32)
db 0x00, 0x00, 0x00, 0x01 ; sample_count(32)
db 0x00, 0x00, 0x00, 0x01 ; sample_delta(32)
stts_end:
stsc_start:
dd BE(stsc_end - stsc_start)
dd "stsc"
db 0x00, 0x00, 0x00, 0x00
db 0x00, 0x00, 0x00, 0x00
db 0x00, 0x00, 0x00, 0x00
stsc_end:
stsz_start:
dd BE(stsz_end - stsz_start)
dd "stsz"
db 0x00, 0x00, 0x00, 0x01
db 0x00, 0x00, 0x00, 0x01
stsz_end:
stco_start:
dd BE(stco_end - stco_start)
dd "stco"
db 0x00 ; version(8)
db 0x00, 0x00, 0x00 ; flags(24)
db 0x00, 0x00, 0x00, 0x01 ; entry_count(32)
dd BE(mdat_start - moov_start + 8) ; chunk_offset(32)
stco_end:
stbl_end:
minf_end:
mdia_end:
trak_end:
moov_end:
free_start:
dd BE(free_end - free_start)
db "free"
free_end:
mdat_start:
dd BE(mdat_end - mdat_start)
db "mdat"
db 0x00
mdat_end:
ftyp_start:
dd BE(ftyp_end - ftyp_start)
db "ftyp"
db "isom"
dd BE(0x00)
db "mif1", "miaf"
ftyp_end:
; vim: syntax=nasm
|
global _main
section .text
_main:
mov ah, 0x0e ; tty mode
mov bp, 0x8000 ; this is an address far away from 0x7c00 so that we don't get overwritten
mov sp, bp ; if the stack is empty then sp points to bp
mov al, bl ; 0x8000 - 2
push 'A'
push 'B'
push 'C'
pop bx
pop bx
pop bx
|
; A194149: Sum{floor(j*(5-sqrt(3))/2) : 1<=j<=n}; n-th partial sum of Beatty sequence for (5-sqrt(3))/2.
; 1,4,8,14,22,31,42,55,69,85,102,121,142,164,188,214,241,270,301,333,367,402,439,478,518,560,604,649,696,745,795,847,900,955,1012,1070,1130,1192,1255,1320,1386,1454,1524,1595,1668,1743,1819,1897,1977
mov $2,$0
add $2,1
mov $11,$0
lpb $2
mov $0,$11
sub $2,1
sub $0,$2
mov $8,$0
mov $9,0
mov $10,$0
add $10,1
lpb $10
mov $0,$8
mov $5,0
sub $10,1
sub $0,$10
mov $4,$0
mov $6,2
lpb $6
mov $0,$4
sub $6,1
add $0,$6
trn $0,1
seq $0,74065 ; Numerators a(n) of fractions slowly converging to sqrt(3): let a(1) = 0, b(n) = n - a(n); if (a(n) + 1) / b(n) < sqrt(3), then a(n+1) = a(n) + 1, else a(n+1)= a(n).
mov $3,$0
mov $7,$6
mul $7,$0
add $5,$7
lpe
min $4,1
mul $4,$3
mov $3,$5
sub $3,$4
add $3,1
add $9,$3
lpe
add $1,$9
lpe
mov $0,$1
|
#include <catch.hpp>
#include <internal/facts/resolvers/ldom_resolver.hpp>
#include <facter/facts/collection.hpp>
#include <facter/facts/fact.hpp>
#include <facter/facts/scalar_value.hpp>
#include <facter/facts/map_value.hpp>
#include "../../collection_fixture.hpp"
using namespace std;
using namespace facter::facts;
using namespace facter::facts::resolvers;
using namespace facter::testing;
struct empty_ldom_resolver : ldom_resolver
{
protected:
virtual data collect_data(collection& facts) override
{
data result;
return result;
}
};
struct test_ldom_resolver : ldom_resolver
{
protected:
virtual data collect_data(collection& facts) override
{
ldom_info single_value;
single_value.key = "domainname";
single_value.values.insert({ "domainname", "somedomain"});
ldom_info multi_value;
multi_value.key = "domainrole";
multi_value.values.insert({ "impl", "true"});
multi_value.values.insert({ "io", "false"});
data result;
result.ldom.emplace_back(single_value);
result.ldom.emplace_back(multi_value);
return result;
}
};
SCENARIO("Using the Solaris LDom resolver") {
collection_fixture facts;
WHEN("data is not present") {
facts.add(make_shared<empty_ldom_resolver>());
THEN("no LDom facts should be added") {
REQUIRE(facts.size() == 0u);
}
}
WHEN("data is present") {
facts.add(make_shared<test_ldom_resolver>());
THEN("a structured fact is added") {
REQUIRE(facts.size() == 4u);
auto ldom = facts.get<map_value>(fact::ldom);
REQUIRE(ldom);
REQUIRE(ldom->size() == 2u);
auto sval = ldom->get<string_value>("domainname");
REQUIRE(sval);
REQUIRE(sval->value() == "somedomain");
auto mval = ldom->get<map_value>("domainrole");
REQUIRE(mval);
REQUIRE(mval->size() == 2u);
}
THEN("flat facts are added") {
REQUIRE(facts.size() == 4u);
auto sval_2 = facts.get<string_value>("ldom_domainname");
REQUIRE(sval_2);
REQUIRE(sval_2->value() == "somedomain");
auto sval_3 = facts.get<string_value>("ldom_domainrole_impl");
REQUIRE(sval_3);
REQUIRE(sval_3->value() == "true");
auto sval_4 = facts.get<string_value>("ldom_domainrole_io");
REQUIRE(sval_4);
REQUIRE(sval_4->value() == "false");
}
}
}
|
; generated assembly file [May 16 2021 & 17:20:32]
; link using "ld object_file.o - o exe_file" command
%define program _start
section .text
global program
program:
push rbp
mov rbp, rsp
mov QWORD [rbp-8], rdi
mov QWORD [rbp-16], rsi
mov QWORD [rbp-24], 10
mov QWORD [rbp-32], 20
mov BYTE [rbp-33], 97
mov BYTE [rbp-34], 66
mov QWORD [rbp-42], LBSTR.1
mov QWORD [rbp-50], LBSTR.2
mov r10, 5
mov r11, 10
cmp r10, r11
jg .L0
mov QWORD [rbp-58], 50
jmp .L1
.L0:
mov QWORD [rbp-66], 50
.L1:
jmp .L9
.L10:
mov r10, 10
mov rax, r10
.L9:
mov r10, 10
mov r11, 10
cmp r10, r11
je .L10
pop rbp
syscall
section .data
LBSTR.1: DB 76,97,115,97,110,0
LBSTR.2: DB 78,97,110,111,71,0
; nano_g compiler developed by lasan nishshanka (@las_nish)
; May 16 2021 & 17:20:32 |
;
; This file is automatically generated
;
; Do not edit!!!
;
; djm 12/2/2000
;
; ZSock Lib function: tcp_chktimeout
PUBLIC tcp_chktimeout
EXTERN no_zsock
INCLUDE "packages.def"
INCLUDE "zsock.def"
.tcp_chktimeout
ld a,r_tcp_chktimeout
call_pkg(tcp_all)
ret nc
; We failed..are we installed?
cp rc_pnf
scf ;signal error
ret nz ;Internal error
call_pkg(tcp_ayt)
jr nc,tcp_chktimeout
jp no_zsock
|
SYS_EXIT equ 1
SYS_READ equ 3
SYS_WRITE equ 4
STDIN equ 0
STDOUT equ 1
segment .data
msg_1 db "Enter a digit:", 0x20
len_1 equ $ - msg_1
msg_2 db "Please enter as second digit:", 0x20
len_2 equ $ - msg_2
msg_3 db "The sum is:", 0x20
len_3 equ $ - msg_3
segment .bss
num_1 resb 2
num_2 resb 2
res resb 1
section .text
global _start
_start:
mov ecx, msg_1
mov edx, len_1
call _print_to_std
mov ecx, num_1
mov edx, 2
call _read_from_std
mov ecx, msg_2
mov edx, len_2
call _print_to_std
mov ecx, num_2
mov edx, 2
call _read_from_std
mov ecx, msg_3
mov edx, len_3
call _print_to_std
; moving the first number to eax register and second number to ebx
; and subtracting ascii '0' to convert it into a decimal number
mov eax, [num_1]
sub eax, '0'
mov ebx, [num_2]
sub ebx, '0'
; eax = eax + ebx
add eax, ebx
; add '0' to to convert the sum from decimal to ASCII
add eax, '0'
; store result to memory
mov [res], eax
; print result
mov ecx, res
mov edx, 1
call _print_to_std
exit:
mov eax, SYS_EXIT
xor ebx, ebx
int 0x80
_print_to_std:
mov eax, SYS_WRITE
mov ebx, STDOUT
int 0x80
ret
_read_from_std:
mov eax, SYS_READ
mov ebx, STDIN
int 0x80
ret |
// Demonstrates a problem where wrong alive ranges result in clobbering an alive variable
// The compiler does not realize that A is alive in the statement b=b-a - and thus can clobber it.
// Commodore 64 PRG executable file
.file [name="euclid-problem.prg", type="prg", segments="Program"]
.segmentdef Program [segments="Basic, Code, Data"]
.segmentdef Basic [start=$0801]
.segmentdef Code [start=$80d]
.segmentdef Data [startAfter="Code"]
.segment Basic
:BasicUpstart(main)
.label SCREEN = $400
.segment Code
main: {
.label a = 2
ldx #2
lda #$80
sta.z a
__b1:
// while (a!=b)
cpx.z a
bne __b2
// *SCREEN = a
lda.z a
sta SCREEN
// }
rts
__b2:
// if(a>b)
cpx.z a
bcc __b4
// b = b-a
txa
sec
sbc.z a
tax
jmp __b1
__b4:
// a = a-b
txa
eor #$ff
sec
adc.z a
sta.z a
jmp __b1
}
|
processor 6502
org $1000
loop:
ldx #$20
lda #$03
sta $d000,X
sta $d001,X
jmp loop
|
#include "core/ecs/system_descriptor.h"
#include "core/ecs/world.h"
#include "world/render/render_tags.h"
#include "world/shared/normal_input_single_component.h"
#include "world/shared/window_single_component.h"
#include "world/shared/window_system.h"
#include <SDL2/SDL.h>
#include <fmt/format.h>
#include <iostream>
namespace hg {
SYSTEM_DESCRIPTOR(
SYSTEM(WindowSystem),
TAGS(render)
)
WindowSystem::WindowSystem(World& world)
: NormalSystem(world) {
if (SDL_Init(SDL_INIT_VIDEO) != 0) {
throw std::runtime_error(fmt::format("Failed to initialize SDL!\nDetails: {}", SDL_GetError()));
}
auto& window_single_component = world.set<WindowSingleComponent>();
window_single_component.window = SDL_CreateWindow(window_single_component.title.c_str(), SDL_WINDOWPOS_UNDEFINED, SDL_WINDOWPOS_UNDEFINED, window_single_component.width, window_single_component.height, SDL_WINDOW_SHOWN | SDL_WINDOW_MAXIMIZED | SDL_WINDOW_RESIZABLE);
if (window_single_component.window == nullptr) {
SDL_Quit();
throw std::runtime_error(fmt::format("Failed to initialize a window!\nDetails: {}", SDL_GetError()));
}
int window_width, window_height;
SDL_GetWindowSize(window_single_component.window, &window_width, &window_height);
window_single_component.width = std::max(static_cast<uint32_t>(window_width), 1U);
window_single_component.height = std::max(static_cast<uint32_t>(window_height), 1U);
world.set<NormalInputSingleComponent>();
}
WindowSystem::~WindowSystem() {
auto& window_single_component = world.ctx<WindowSingleComponent>();
SDL_DestroyWindow(window_single_component.window);
SDL_Quit();
}
void WindowSystem::update(float /*elapsed_time*/) {
auto& window_single_component = world.ctx<WindowSingleComponent>();
window_single_component.resized = false;
const char* window_title = SDL_GetWindowTitle(window_single_component.window);
if (std::strcmp(window_title, window_single_component.title.c_str()) != 0) {
SDL_SetWindowTitle(window_single_component.window, window_single_component.title.c_str());
}
int window_width, window_height;
SDL_GetWindowSize(window_single_component.window, &window_width, &window_height);
// Don't let user change window size to zero. Zeros may break many other systems.
window_single_component.width = std::max(window_single_component.width, 1U);
window_single_component.height = std::max(window_single_component.height, 1U);
if (window_width != window_single_component.width || window_height != window_single_component.height) {
SDL_SetWindowSize(window_single_component.window, window_single_component.width, window_single_component.height);
}
auto& normal_input_single_component = world.ctx<NormalInputSingleComponent>();
std::copy(std::begin(normal_input_single_component.m_mouse_buttons), std::end(normal_input_single_component.m_mouse_buttons), std::begin(normal_input_single_component.m_previous_mouse_buttons));
std::copy(std::begin(normal_input_single_component.m_keys), std::end(normal_input_single_component.m_keys), std::begin(normal_input_single_component.m_previous_keys));
normal_input_single_component.m_mouse_delta_x = 0;
normal_input_single_component.m_mouse_delta_y = 0;
normal_input_single_component.m_mouse_wheel = 0;
normal_input_single_component.m_text[0] = '\0';
SDL_Event event;
while (SDL_PollEvent(&event)) {
switch (event.type) {
case SDL_QUIT:
world.unset<RunningWorldSingleComponent>();
return;
case SDL_WINDOWEVENT:
handle_window_event(event);
break;
case SDL_MOUSEMOTION:
case SDL_MOUSEBUTTONDOWN:
case SDL_MOUSEBUTTONUP:
case SDL_MOUSEWHEEL:
handle_mouse_event(event);
break;
case SDL_KEYDOWN:
case SDL_KEYUP:
case SDL_TEXTINPUT:
handle_key_event(event);
break;
default:
break;
}
}
#if defined(__APPLE__)
normal_input_single_component.m_keys[static_cast<size_t>(Control::KEY_CTRL)] =
normal_input_single_component.m_keys[static_cast<size_t>(Control::KEY_LGUI)] ||
normal_input_single_component.m_keys[static_cast<size_t>(Control::KEY_RGUI)];
#else
normal_input_single_component.m_keys[static_cast<size_t>(Control::KEY_CTRL)] =
normal_input_single_component.m_keys[static_cast<size_t>(Control::KEY_LCTRL)] ||
normal_input_single_component.m_keys[static_cast<size_t>(Control::KEY_RCTRL)];
#endif
normal_input_single_component.m_keys[static_cast<size_t>(Control::KEY_SHIFT)] =
normal_input_single_component.m_keys[static_cast<size_t>(Control::KEY_LSHIFT)] ||
normal_input_single_component.m_keys[static_cast<size_t>(Control::KEY_RSHIFT)];
normal_input_single_component.m_keys[static_cast<size_t>(Control::KEY_ALT)] =
normal_input_single_component.m_keys[static_cast<size_t>(Control::KEY_LALT)] ||
normal_input_single_component.m_keys[static_cast<size_t>(Control::KEY_RALT)];
#if defined(__APPLE__)
normal_input_single_component.m_keys[static_cast<size_t>(Control::KEY_GUI)] =
normal_input_single_component.m_keys[static_cast<size_t>(Control::KEY_LCTRL)] ||
normal_input_single_component.m_keys[static_cast<size_t>(Control::KEY_RCTRL)];
#else
normal_input_single_component.m_keys[static_cast<size_t>(Control::KEY_GUI)] =
normal_input_single_component.m_keys[static_cast<size_t>(Control::KEY_LGUI)] ||
normal_input_single_component.m_keys[static_cast<size_t>(Control::KEY_RGUI)];
#endif
}
void WindowSystem::handle_window_event(SDL_Event& event) {
switch (event.window.event) {
case SDL_WINDOWEVENT_RESIZED:
case SDL_WINDOWEVENT_SIZE_CHANGED: {
auto &window_single_component = world.ctx<WindowSingleComponent>();
window_single_component.width = std::max(static_cast<uint32_t>(event.window.data1), 1U);
window_single_component.height = std::max(static_cast<uint32_t>(event.window.data2), 1U);
window_single_component.resized = true;
break;
}
case SDL_WINDOWEVENT_FOCUS_LOST: {
auto &normal_input_single_component = world.ctx<NormalInputSingleComponent>();
for (bool& key : normal_input_single_component.m_keys) {
key = false;
}
for (bool& button : normal_input_single_component.m_mouse_buttons) {
button = false;
}
}
default:
break;
}
}
void WindowSystem::handle_mouse_event(SDL_Event& event) {
auto& normal_input_single_component = world.ctx<NormalInputSingleComponent>();
switch (event.type) {
case SDL_MOUSEMOTION:
normal_input_single_component.m_mouse_x = event.motion.x;
normal_input_single_component.m_mouse_y = event.motion.y;
normal_input_single_component.m_mouse_delta_x = event.motion.xrel;
normal_input_single_component.m_mouse_delta_y = event.motion.yrel;
break;
case SDL_MOUSEBUTTONDOWN:
case SDL_MOUSEBUTTONUP:
if (event.button.button > 0 && event.button.button - 1 < std::size(normal_input_single_component.m_mouse_buttons)) {
normal_input_single_component.m_mouse_buttons[event.button.button - 1] = event.button.state == SDL_PRESSED;
}
break;
case SDL_MOUSEWHEEL:
normal_input_single_component.m_mouse_wheel = event.wheel.direction == SDL_MOUSEWHEEL_NORMAL ? event.wheel.y : -event.wheel.y;
break;
default:
break;
}
}
void WindowSystem::handle_key_event(SDL_Event& event) {
auto& normal_input_single_component = world.ctx<NormalInputSingleComponent>();
switch (event.type) {
case SDL_KEYDOWN:
case SDL_KEYUP:
if (event.key.keysym.scancode < std::size(normal_input_single_component.m_keys)) {
normal_input_single_component.m_keys[event.key.keysym.scancode] = event.type == SDL_KEYDOWN;
}
break;
case SDL_TEXTINPUT:
std::copy(std::begin(event.text.text), std::end(event.text.text), std::begin(normal_input_single_component.m_text));
break;
default:
break;
}
}
} // namespace hg
|
; $Id: bit_close.asm,v 1.3 2015/01/19 01:32:45 pauloscustodio Exp $
;
; TI calculator "Infrared port" 1 bit sound functions stub
;
; void bit_close();
;
; Stefano Bodrato - 24/10/2001
;
PUBLIC bit_close
.bit_close
ret
|
// 2tm1637 program for 4-Digit display with TM1637 chip
// Code Licence: CC BY 4.0 (https://creativecommons.org/licenses/by/4.0/)
// written by m.stroh
#include "TM1637Display.h"
#include <fcntl.h>
#include <unistd.h>
int main(int argc, char *argv[]) {
TM1637Display display(23, 24, 60); // CLK to GPIO 23 and DIO to GPIO 24, 60% brightness
//printf("2tm1637 - set text to 4-Digit display with TM1637 chip (written by m.stroh)\n\n");
if (argc>1) {
display.Show(argv[1]);
} else {
char buf[5]={"\0"};
fcntl(0, F_SETFL, fcntl(0, F_GETFL) | O_NONBLOCK);
int n = read(0, buf, 4);
if (n>0) {
display.Show(buf);
} else {
display.Clear();
}
}
}
|
.global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r14
push %r15
push %r8
push %r9
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_UC_ht+0x117c8, %r10
nop
nop
nop
nop
nop
and %r8, %r8
and $0xffffffffffffffc0, %r10
movaps (%r10), %xmm5
vpextrq $0, %xmm5, %r14
nop
sub %r15, %r15
lea addresses_UC_ht+0x14548, %rdx
nop
nop
nop
sub %r9, %r9
mov $0x6162636465666768, %r14
movq %r14, %xmm6
vmovups %ymm6, (%rdx)
inc %rdx
lea addresses_A_ht+0xa788, %rsi
lea addresses_WC_ht+0x1db88, %rdi
nop
nop
nop
and %r10, %r10
mov $43, %rcx
rep movsw
nop
nop
nop
nop
and %r14, %r14
lea addresses_normal_ht+0xd2b0, %r8
nop
lfence
mov $0x6162636465666768, %r10
movq %r10, %xmm2
movups %xmm2, (%r8)
nop
nop
nop
cmp %rdi, %rdi
lea addresses_WT_ht+0xaabb, %rsi
lea addresses_WC_ht+0x15788, %rdi
nop
nop
and %r8, %r8
mov $64, %rcx
rep movsl
nop
nop
and $3494, %rdx
lea addresses_WC_ht+0x51f4, %r9
nop
nop
nop
sub %rcx, %rcx
movb $0x61, (%r9)
nop
nop
nop
nop
nop
sub $22410, %r9
lea addresses_normal_ht+0x6f88, %rcx
nop
nop
nop
nop
nop
and %r8, %r8
mov (%rcx), %di
nop
nop
nop
nop
nop
cmp $43868, %rsi
lea addresses_WT_ht+0x1f32, %r10
nop
nop
nop
nop
xor %rdx, %rdx
movb (%r10), %r9b
nop
nop
sub $62832, %r9
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %r9
pop %r8
pop %r15
pop %r14
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r12
push %r13
push %r15
push %r8
push %rbx
push %rcx
push %rsi
// Store
lea addresses_normal+0x10508, %rsi
nop
nop
nop
and %r12, %r12
mov $0x5152535455565758, %r8
movq %r8, %xmm6
movups %xmm6, (%rsi)
nop
add %r12, %r12
// Store
lea addresses_UC+0x10cc8, %r15
nop
nop
nop
nop
nop
mfence
movb $0x51, (%r15)
nop
nop
nop
nop
nop
xor %r13, %r13
// Store
lea addresses_PSE+0x17f64, %r15
nop
nop
sub %r13, %r13
movw $0x5152, (%r15)
inc %r13
// Store
lea addresses_A+0x1d788, %rbx
nop
nop
nop
nop
inc %rsi
movb $0x51, (%rbx)
nop
nop
nop
nop
nop
sub $17277, %r15
// Store
lea addresses_normal+0x1b037, %rsi
nop
nop
nop
nop
nop
sub %r15, %r15
mov $0x5152535455565758, %r12
movq %r12, %xmm5
vmovups %ymm5, (%rsi)
inc %r8
// Faulty Load
lea addresses_D+0x1ff88, %rcx
nop
nop
sub %r13, %r13
movups (%rcx), %xmm2
vpextrq $1, %xmm2, %rsi
lea oracles, %r12
and $0xff, %rsi
shlq $12, %rsi
mov (%r12,%rsi,1), %rsi
pop %rsi
pop %rcx
pop %rbx
pop %r8
pop %r15
pop %r13
pop %r12
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 1, 'type': 'addresses_D', 'congruent': 0}}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 16, 'type': 'addresses_normal', 'congruent': 7}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 1, 'type': 'addresses_UC', 'congruent': 3}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 2, 'type': 'addresses_PSE', 'congruent': 2}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 1, 'type': 'addresses_A', 'congruent': 11}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 32, 'type': 'addresses_normal', 'congruent': 0}, 'OP': 'STOR'}
[Faulty Load]
{'OP': 'LOAD', 'src': {'same': True, 'NT': False, 'AVXalign': False, 'size': 16, 'type': 'addresses_D', 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': True, 'size': 16, 'type': 'addresses_UC_ht', 'congruent': 0}}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 32, 'type': 'addresses_UC_ht', 'congruent': 4}, 'OP': 'STOR'}
{'dst': {'same': False, 'congruent': 10, 'type': 'addresses_WC_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 11, 'type': 'addresses_A_ht'}}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 16, 'type': 'addresses_normal_ht', 'congruent': 3}, 'OP': 'STOR'}
{'dst': {'same': False, 'congruent': 11, 'type': 'addresses_WC_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 0, 'type': 'addresses_WT_ht'}}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 1, 'type': 'addresses_WC_ht', 'congruent': 1}, 'OP': 'STOR'}
{'OP': 'LOAD', 'src': {'same': False, 'NT': True, 'AVXalign': False, 'size': 2, 'type': 'addresses_normal_ht', 'congruent': 9}}
{'OP': 'LOAD', 'src': {'same': True, 'NT': False, 'AVXalign': False, 'size': 1, 'type': 'addresses_WT_ht', 'congruent': 0}}
{'36': 21829}
36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36
*/
|
/*
* Copyright (c) 2017, Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
L0:
mov (8|M0) r16.0<1>:ud r0.0<8;8,1>:ud
(W&~f0.1)jmpi L208
L32:
mov (8|M0) r17.0<1>:ud r25.0<8;8,1>:ud
mov (1|M0) r16.2<1>:ud 0x0:ud
add (1|M0) a0.0<1>:ud r23.5<0;1,0>:ud 0x48EC130:ud
send (1|M0) r112:uw r16:ub 0x2 a0.0
mov (1|M0) r17.2<1>:f r10.1<0;1,0>:f
send (1|M0) r120:uw r16:ub 0x2 a0.0
mov (1|M0) a0.8<1>:uw 0xE00:uw
mov (1|M0) a0.9<1>:uw 0xE40:uw
mov (1|M0) a0.10<1>:uw 0xE80:uw
mov (1|M0) a0.11<1>:uw 0xEC0:uw
add (4|M0) a0.12<1>:uw a0.8<4;4,1>:uw 0x100:uw
L208:
nop
|
.global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r15
push %r8
push %rax
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_WC_ht+0x151c3, %rsi
lea addresses_WC_ht+0x4073, %rdi
nop
xor $24387, %r15
mov $78, %rcx
rep movsb
nop
nop
nop
inc %r11
lea addresses_A_ht+0x1bd3f, %rsi
lea addresses_normal_ht+0x1ca73, %rdi
xor $34284, %r8
mov $55, %rcx
rep movsb
cmp $27551, %rdi
lea addresses_WT_ht+0xce73, %rsi
nop
nop
add %r15, %r15
mov $0x6162636465666768, %r11
movq %r11, %xmm0
vmovups %ymm0, (%rsi)
nop
lfence
lea addresses_normal_ht+0x1bb93, %r11
nop
nop
nop
nop
nop
dec %rdx
mov (%r11), %cx
nop
nop
nop
nop
nop
xor %rdi, %rdi
lea addresses_A_ht+0x19773, %rsi
lea addresses_WC_ht+0x9453, %rdi
nop
nop
xor $41533, %rax
mov $94, %rcx
rep movsw
nop
nop
nop
nop
dec %r15
lea addresses_D_ht+0x1cd57, %r11
nop
nop
nop
nop
nop
xor $35283, %rcx
mov (%r11), %edi
nop
nop
cmp $26056, %r8
lea addresses_A_ht+0x14153, %r8
nop
nop
nop
add %rcx, %rcx
movw $0x6162, (%r8)
sub $44224, %rcx
lea addresses_normal_ht+0x14c17, %rsi
lea addresses_A_ht+0x2e39, %rdi
nop
nop
nop
and %r8, %r8
mov $23, %rcx
rep movsq
nop
xor %r8, %r8
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rax
pop %r8
pop %r15
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r12
push %r15
push %r9
push %rax
push %rdi
push %rdx
// Store
mov $0x773, %rdx
sub %rax, %rax
movl $0x51525354, (%rdx)
nop
nop
nop
nop
nop
dec %r15
// Load
lea addresses_UC+0x473, %rdi
nop
nop
nop
nop
nop
xor $1491, %r12
mov (%rdi), %r15w
nop
nop
nop
nop
dec %r9
// Store
lea addresses_PSE+0x4873, %r15
nop
nop
nop
and %r10, %r10
mov $0x5152535455565758, %r12
movq %r12, %xmm3
movaps %xmm3, (%r15)
// Exception!!!
nop
nop
nop
mov (0), %r9
add %r9, %r9
// Store
lea addresses_PSE+0x13873, %rdx
nop
nop
nop
nop
nop
and %r9, %r9
movl $0x51525354, (%rdx)
nop
nop
and $50549, %r10
// Faulty Load
lea addresses_PSE+0x4873, %rax
nop
nop
sub $55898, %r15
movb (%rax), %r12b
lea oracles, %rdi
and $0xff, %r12
shlq $12, %r12
mov (%rdi,%r12,1), %r12
pop %rdx
pop %rdi
pop %rax
pop %r9
pop %r15
pop %r12
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_PSE', 'AVXalign': False, 'congruent': 0, 'size': 32, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_P', 'AVXalign': False, 'congruent': 8, 'size': 4, 'same': False, 'NT': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_UC', 'AVXalign': False, 'congruent': 7, 'size': 2, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_PSE', 'AVXalign': True, 'congruent': 0, 'size': 16, 'same': True, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_PSE', 'AVXalign': False, 'congruent': 11, 'size': 4, 'same': False, 'NT': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_PSE', 'AVXalign': True, 'congruent': 0, 'size': 1, 'same': True, 'NT': True}}
<gen_prepare_buffer>
{'OP': 'REPM', 'src': {'type': 'addresses_WC_ht', 'congruent': 3, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 10, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_A_ht', 'congruent': 2, 'same': False}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 9, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WT_ht', 'AVXalign': False, 'congruent': 9, 'size': 32, 'same': False, 'NT': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_normal_ht', 'AVXalign': False, 'congruent': 5, 'size': 2, 'same': False, 'NT': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_A_ht', 'congruent': 6, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 5, 'same': True}}
{'OP': 'LOAD', 'src': {'type': 'addresses_D_ht', 'AVXalign': False, 'congruent': 1, 'size': 4, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A_ht', 'AVXalign': False, 'congruent': 4, 'size': 2, 'same': False, 'NT': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_normal_ht', 'congruent': 2, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 1, 'same': False}}
{'58': 21829}
58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58
*/
|
#include "Object.hpp"
#include "Class.hpp"
#include "String.hpp"
#include "Array.hpp"
#include <algorithm>
#include <iostream>
namespace Rice
{
Object const Nil(Qnil);
Object const True(Qtrue);
Object const False(Qfalse);
Object const Undef(Qundef);
}
Rice::Class Rice::Object::
class_of() const {
return rb_class_of(value_);
}
int Rice::Object::
compare(Object const & other) const
{
Object result = call("<=>", other);
return from_ruby<int>(result);
}
void Rice::Object::
freeze()
{
protect(rb_obj_freeze, value());
}
bool Rice::Object::
is_frozen() const
{
return bool(OBJ_FROZEN(value()));
}
Rice::String Rice::Object::
to_s() const {
return call("to_s");
}
Rice::String Rice::Object::
inspect() const {
return call("inspect");
}
void Rice::Object::
swap(Rice::Object & other)
{
std::swap(value_, other.value_);
}
Rice::Object Rice::Object::
instance_eval(String const & s)
{
VALUE argv[] = { s.value() };
return protect(rb_obj_instance_eval, 1, &argv[0], *this);
}
int Rice::Object::
rb_type() const
{
return ::rb_type(*this);
}
bool Rice::Object::
is_a(Object klass) const
{
Object result = protect(rb_obj_is_kind_of, *this, klass);
return result.test();
}
bool Rice::Object::
respond_to(Identifier id) const
{
return bool(rb_respond_to(*this, id));
}
bool Rice::Object::
is_instance_of(Object klass) const
{
Object result = protect(rb_obj_is_instance_of, *this, klass);
return result.test();
}
Rice::Object Rice::Object::
iv_get(
Identifier name) const
{
return protect(rb_iv_get, *this, name.c_str());
}
Rice::Object Rice::Object::
vcall(
Identifier id,
Array args)
{
return protect(rb_funcall3, *this, id, args.size(), args.to_c_array());
}
void Rice::Object::
mark() const
{
rb_gc_mark(*this);
}
void Rice::Object::
set_value(VALUE v)
{
value_ = v;
}
std::ostream & Rice::
operator<<(std::ostream & out, Rice::Object const & obj)
{
String s(obj.to_s());
out << s.c_str();
return out;
}
bool Rice::
operator==(Rice::Object const & lhs, Rice::Object const & rhs)
{
Object result = lhs.call("==", rhs);
return result.test();
}
bool Rice::
operator!=(Rice::Object const & lhs, Rice::Object const & rhs)
{
return !(lhs == rhs);
}
bool Rice::
operator<(Rice::Object const & lhs, Rice::Object const & rhs)
{
Object result = lhs.call("<", rhs);
return result.test();
}
bool Rice::
operator>(Rice::Object const & lhs, Rice::Object const & rhs)
{
Object result = lhs.call(">", rhs);
return result.test();
}
|
.global s_prepare_buffers
s_prepare_buffers:
push %r13
push %r15
push %r8
push %r9
push %rbp
push %rcx
push %rdi
push %rsi
lea addresses_WT_ht+0x19ff6, %rsi
lea addresses_normal_ht+0x6e86, %rdi
nop
nop
sub %r15, %r15
mov $93, %rcx
rep movsw
add $57896, %r8
lea addresses_D_ht+0x150c2, %r15
nop
nop
nop
sub $21504, %r8
movups (%r15), %xmm5
vpextrq $1, %xmm5, %rcx
nop
sub %r8, %r8
lea addresses_normal_ht+0x1cb76, %r13
nop
nop
nop
nop
nop
cmp $64403, %rcx
movl $0x61626364, (%r13)
sub $61303, %r13
lea addresses_normal_ht+0x17eba, %rdi
dec %r9
movl $0x61626364, (%rdi)
nop
nop
nop
xor $45514, %r8
lea addresses_WT_ht+0x1af56, %rsi
lea addresses_normal_ht+0x4e9e, %rdi
xor $1109, %rbp
mov $65, %rcx
rep movsw
nop
nop
nop
nop
xor $49784, %r8
lea addresses_WC_ht+0xa3f6, %r13
nop
and $54900, %r9
mov (%r13), %si
and %rdi, %rdi
lea addresses_WC_ht+0x2ff6, %r8
nop
and $42831, %rbp
mov (%r8), %r9w
xor %rcx, %rcx
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %r9
pop %r8
pop %r15
pop %r13
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r13
push %r14
push %r15
push %r8
push %r9
push %rdx
// Store
lea addresses_WC+0x2bee, %rdx
nop
nop
nop
nop
cmp %r11, %r11
movb $0x51, (%rdx)
and $15591, %r11
// Load
lea addresses_WC+0x25fa, %r14
clflush (%r14)
nop
nop
nop
nop
sub $54984, %r13
movb (%r14), %r11b
nop
nop
nop
nop
sub $19744, %r14
// Load
lea addresses_RW+0x12fb6, %r14
nop
nop
nop
dec %r9
vmovups (%r14), %ymm6
vextracti128 $0, %ymm6, %xmm6
vpextrq $1, %xmm6, %r15
inc %r14
// Faulty Load
lea addresses_WC+0x87f6, %r13
nop
sub %r11, %r11
movups (%r13), %xmm4
vpextrq $0, %xmm4, %r9
lea oracles, %r13
and $0xff, %r9
shlq $12, %r9
mov (%r13,%r9,1), %r9
pop %rdx
pop %r9
pop %r8
pop %r15
pop %r14
pop %r13
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'src': {'congruent': 0, 'AVXalign': False, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_WC'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 3, 'AVXalign': False, 'same': False, 'size': 1, 'NT': False, 'type': 'addresses_WC'}}
{'src': {'congruent': 2, 'AVXalign': False, 'same': False, 'size': 1, 'NT': False, 'type': 'addresses_WC'}, 'OP': 'LOAD'}
{'src': {'congruent': 4, 'AVXalign': False, 'same': False, 'size': 32, 'NT': False, 'type': 'addresses_RW'}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 16, 'NT': False, 'type': 'addresses_WC'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'congruent': 9, 'same': False, 'type': 'addresses_WT_ht'}, 'OP': 'REPM', 'dst': {'congruent': 4, 'same': False, 'type': 'addresses_normal_ht'}}
{'src': {'congruent': 1, 'AVXalign': False, 'same': False, 'size': 16, 'NT': False, 'type': 'addresses_D_ht'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 5, 'AVXalign': False, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_normal_ht'}}
{'OP': 'STOR', 'dst': {'congruent': 1, 'AVXalign': False, 'same': True, 'size': 4, 'NT': False, 'type': 'addresses_normal_ht'}}
{'src': {'congruent': 3, 'same': False, 'type': 'addresses_WT_ht'}, 'OP': 'REPM', 'dst': {'congruent': 3, 'same': False, 'type': 'addresses_normal_ht'}}
{'src': {'congruent': 8, 'AVXalign': False, 'same': False, 'size': 2, 'NT': False, 'type': 'addresses_WC_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 11, 'AVXalign': False, 'same': False, 'size': 2, 'NT': False, 'type': 'addresses_WC_ht'}, 'OP': 'LOAD'}
{'46': 1, '49': 8498, '00': 13253, '48': 76, '50': 1}
00 49 49 00 00 49 00 00 49 00 49 00 00 49 00 49 49 00 49 00 49 00 00 00 00 49 00 00 00 00 00 00 00 00 49 49 00 49 00 00 49 49 00 00 49 00 49 00 49 00 49 00 49 49 00 00 00 00 00 00 00 00 49 49 49 00 00 00 00 00 00 49 00 00 00 49 49 49 00 49 00 49 49 49 49 00 00 00 49 00 00 00 00 00 49 00 49 00 49 00 00 00 00 00 00 49 00 00 00 49 00 00 49 00 00 00 00 00 49 49 49 00 00 49 49 00 00 00 49 49 00 00 00 00 49 49 00 00 49 00 49 49 49 00 00 49 49 00 00 49 00 00 00 00 49 00 00 49 00 00 00 49 00 49 49 00 00 00 00 00 00 00 00 00 49 49 00 49 49 00 00 00 00 00 49 00 00 00 00 00 00 49 00 00 00 49 00 49 00 00 00 49 00 00 49 00 00 00 00 49 00 00 49 48 00 00 00 00 49 00 00 00 49 00 49 49 00 00 00 49 49 49 49 00 00 00 00 00 49 00 00 49 00 49 49 00 49 49 00 00 00 49 49 00 49 00 00 00 49 00 49 49 49 00 00 49 49 49 00 49 49 49 49 00 00 00 49 00 00 49 00 00 49 00 00 49 00 00 00 49 00 00 00 49 00 00 49 00 00 49 49 49 00 00 00 49 00 49 00 00 49 49 00 00 49 00 49 00 00 00 00 49 49 00 00 49 00 49 49 00 49 49 00 49 49 00 49 00 49 00 00 00 00 00 00 49 00 00 00 49 49 00 00 00 00 49 00 00 00 49 49 00 49 49 00 00 00 49 00 00 00 00 00 49 00 00 49 49 00 49 00 00 00 49 49 00 00 49 49 00 00 49 49 00 49 49 49 00 00 00 00 00 00 00 00 49 00 00 00 49 49 49 49 49 00 00 00 49 00 49 00 49 00 49 49 00 00 00 00 00 49 00 00 00 49 00 00 00 49 00 49 00 49 00 00 00 00 49 49 00 49 49 49 00 00 00 00 00 00 00 49 00 49 00 49 00 00 49 49 49 00 00 00 00 00 49 00 49 00 00 00 00 00 00 49 49 00 00 00 49 49 00 00 00 00 49 00 00 49 49 00 49 49 00 00 00 00 00 00 00 49 00 00 49 49 00 00 00 00 00 00 49 00 00 00 00 00 00 49 00 00 00 49 49 49 49 00 00 00 00 00 00 00 00 00 00 00 00 00 00 49 49 00 00 00 00 00 00 00 00 49 49 00 00 49 49 00 00 49 00 49 00 00 49 49 00 00 00 00 00 00 00 00 49 00 00 49 00 00 49 00 49 00 00 00 49 00 49 00 49 00 00 00 49 00 00 49 49 00 49 49 00 49 00 00 00 00 00 00 49 00 00 49 00 00 49 00 00 49 00 49 48 49 00 49 49 49 00 00 00 49 00 00 00 00 00 49 49 00 49 00 00 00 00 49 00 49 00 00 00 00 00 49 00 00 49 00 00 00 00 00 49 00 49 00 00 00 00 00 00 49 00 00 00 00 00 00 00 00 49 00 49 00 00 49 00 00 49 00 49 00 00 00 00 00 49 00 00 49 00 49 49 49 49 00 00 00 00 00 00 49 49 00 00 49 00 00 00 00 00 00 00 49 00 00 00 49 49 49 00 00 49 00 00 49 49 49 00 00 49 00 49 00 00 00 00 49 00 00 49 49 49 00 00 49 00 49 49 00 49 49 00 00 49 00 49 49 00 00 00 49 49 00 00 00 49 49 00 00 00 00 49 00 00 00 00 49 49 49 00 49 00 00 49 49 49 49 49 00 49 00 00 00 00 00 49 00 00 49 00 49 00 49 00 00 00 00 00 00 00 00 00 49 00 49 00 49 49 00 00 00 49 49 00 00 00 00 00 00 00 49 00 49 00 49 00 00 00 00 00 00 49 00 00 00 00 00 00 00 00 49 00 00 00 49 49 49 00 49 49 49 00 00 00 00 49 49 49 49 00 00 49 49 49 00 00 00 00 49 00 00 49 00 00 00 49 49 00 00 49 00 49 49 00 00 00 00 49 00 49 00 49 49 00 00 49 00 49 00 49 49 00 00 49 00 49 00 00 00 00 00 00 00 00 00 00 00 00 00 00 49 00 49 00 00 49 00 00 00 00 00 49 00 49 00 00 00 49 49 00 49 49 00 49 00 49 00 00 00 00 00 49 49 49 49 00 49 49 49 49 00 00 00 49 00 49 00 00 49 00
*/
|
AREA SBCS, CODE, READONLY
ENTRY
LDR R0, =0X00000000
LDR R1, =0X40001000
MOV R3, #32
LDR R2, [R1], #04
LOOP
MOVS R2, R2, LSR #01
ADDCS R0, R0, #01
ADDCC R0, R0, #00
SUBS R3, R3, #01
BNE LOOP
STR R0, [R1]
UP B UP
END |
;**************************************************************************
; arch/z80/src/ez80/ez80_reset.asm
;
; Licensed to the Apache Software Foundation (ASF) under one or more
; contributor license agreements. See the NOTICE file distributed with
; this work for additional information regarding copyright ownership. The
; ASF licenses this file to you under the Apache License, Version 2.0 (the
; "License"); you may not use this file except in compliance with the
; License. You may obtain a copy of the License at
;
; http://www.apache.org/licenses/LICENSE-2.0
;
; Unless required by applicable law or agreed to in writing, software
; distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
; WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
; License for the specific language governing permissions and limitations
; under the License.
;
;**************************************************************************
;**************************************************************************
; Global Symbols Imported
;**************************************************************************
xref _ez80_startup
;**************************************************************************
; Global Symbols Exported
;**************************************************************************
xdef _ez80_reset
;**************************************************************************
; Macros
;**************************************************************************
; Define one reset handler
; 1. Disable interrupts
; 2. Clear mixed memory mode (MADL) flag
; 3. jump to initialization procedure with jp.lil to set ADL
rstvector: macro
di
rsmix
jp.lil _ez80_startup
endmac rstvector
;**************************************************************************
; Reset entry points
;**************************************************************************
define .RESET, space = ROM
segment .RESET
_ez80_reset:
_rst0:
rstvector
_rst8:
rstvector
_rst10:
rstvector
_rst18:
rstvector
_rst20:
rstvector
_rst28:
rstvector
_rst30:
rstvector
_rst38:
rstvector
ds %26
_nmi:
retn
end
|
%define BOOTADD 0x500
%define COM1 [0x400] |
; A POC demonstrating adding a convar to the CSS console and calling CSS console commands.
; Adding a cvar requires 2 steps: 1. Registering the cvar with the console, and 2. Adding the cvar to
; the internal linked-list of all cvars.
;
; Originally written 2010/06/02 by attilathedud.
; System descriptors
.386
.model flat,stdcall
option casemap:none
include \masm32\include\kernel32.inc
includelib \masm32\lib\kernel32.lib
; Since these function reside in a dll that is never loaded dynamically, we don't need to worry
; about offsetting them.
.data
outputTest db "This is example echo text.",0ah,0
testDescription db "This is a test description.",0
conVarTest db "r_test",0
ori_echo dd 20072340h
ori_register dd 20227bb0h
ori_link dd 202a4663h
ori_link_internal dd 202273b0h
base dd 0
.code
main:
; Save the base pointer and load in the stack pointer
push ebp
mov ebp,esp
; Check to see if the dll is being loaded validly.
mov eax,dword ptr ss:[ebp+0ch]
cmp eax,1
jnz @returnf
call @init
; Restore all the values and pop back up the call frame.
pop eax
@returnf:
leave
retn 0ch
; Calls CSS' internal console chat_out function. The function displays the last item pushed on
; the stack. It requires the caller to balance the stack.
@chat_out:
push eax
call dword ptr cs:[ori_echo]
add esp,4
retn
; CSS' function to link cvars to its linked list contains 2 parts. The first part sets up
; required items, with the second part accessing the internal list. Before calling the
; second part, we have to push the address of this internal helper function on the stack.
;
; The internal function requires ecx to hold the base address of the cvar name's location in
; memory.
@link_internal:
mov ecx,base
jmp dword ptr cs:[ori_link_internal]
@init:
; Save the current state of the stack.
pushad
; Output our example text message to the console.
lea eax,outputTest
call @chat_out
; Allocate a section of memory inside CSS to store the structure created when
; we register our cvar.
push 40h
push 1000h
push 34h
push 0
call VirtualAlloc
mov base,eax
; Call CSS' register function. The function declaration:
; ori_register( char* convar_name, void* struct_out_top, dword unknown, char* convar_description )
; with ecx containing the base address of struct_out_top.
lea eax,testDescription
push eax
push 80h
push [base+30h]
lea eax,conVarTest
push eax
mov ecx,base
call dword ptr cs:[ori_register]
; Link our cvar to the list. The function takes a pointer to the internal link helper function
; as it's only argument. It requires the caller to fix the stack by +4.
lea eax,@link_internal
push eax
call dword ptr cs:[ori_link]
pop ecx
; Restore the previous state of the stack.
popad
retn
end main |
;/*
; * Microsoft Confidential
; * Copyright (C) Microsoft Corporation 1991
; * All Rights Reserved.
; */
;***************************************************
; CHARACTER FONT FILE
; Source Assembler File
;
; CODE PAGE: 860
; FONT RESOLUTION: 8 x 8
;
; DATE CREATED:05-28-1987
;
;
; Output file from: MULTIFON, Version 1A
;
;***************************************************
Db 000h,000h,000h,000h,000h,000h,000h,000h ; Hex #0
Db 07Eh,081h,0A5h,081h,0BDh,099h,081h,07Eh ; Hex #1
Db 07Eh,0FFh,0DBh,0FFh,0C3h,0E7h,0FFh,07Eh ; Hex #2
Db 06Ch,0FEh,0FEh,0FEh,07Ch,038h,010h,000h ; Hex #3
Db 010h,038h,07Ch,0FEh,07Ch,038h,010h,000h ; Hex #4
Db 038h,07Ch,038h,0FEh,0FEh,0D6h,010h,038h ; Hex #5
Db 010h,038h,07Ch,0FEh,0FEh,07Ch,010h,038h ; Hex #6
Db 000h,000h,018h,03Ch,03Ch,018h,000h,000h ; Hex #7
Db 0FFh,0FFh,0E7h,0C3h,0C3h,0E7h,0FFh,0FFh ; Hex #8
Db 000h,03Ch,066h,042h,042h,066h,03Ch,000h ; Hex #9
Db 0FFh,0C3h,099h,0BDh,0BDh,099h,0C3h,0FFh ; Hex #A
Db 00Fh,007h,00Fh,07Dh,0CCh,0CCh,0CCh,078h ; Hex #B
Db 03Ch,066h,066h,066h,03Ch,018h,07Eh,018h ; Hex #C
Db 03Fh,033h,03Fh,030h,030h,070h,0F0h,0E0h ; Hex #D
Db 07Fh,063h,07Fh,063h,063h,067h,0E6h,0C0h ; Hex #E
Db 018h,0DBh,03Ch,0E7h,0E7h,03Ch,0DBh,018h ; Hex #F
Db 080h,0E0h,0F8h,0FEh,0F8h,0E0h,080h,000h ; Hex #10
Db 002h,00Eh,03Eh,0FEh,03Eh,00Eh,002h,000h ; Hex #11
Db 018h,03Ch,07Eh,018h,018h,07Eh,03Ch,018h ; Hex #12
Db 066h,066h,066h,066h,066h,000h,066h,000h ; Hex #13
Db 07Fh,0DBh,0DBh,07Bh,01Bh,01Bh,01Bh,000h ; Hex #14
Db 03Eh,061h,03Ch,066h,066h,03Ch,086h,07Ch ; Hex #15
Db 000h,000h,000h,000h,07Eh,07Eh,07Eh,000h ; Hex #16
Db 018h,03Ch,07Eh,018h,07Eh,03Ch,018h,0FFh ; Hex #17
Db 018h,03Ch,07Eh,018h,018h,018h,018h,000h ; Hex #18
Db 018h,018h,018h,018h,07Eh,03Ch,018h,000h ; Hex #19
Db 000h,018h,00Ch,0FEh,00Ch,018h,000h,000h ; Hex #1A
Db 000h,030h,060h,0FEh,060h,030h,000h,000h ; Hex #1B
Db 000h,000h,0C0h,0C0h,0C0h,0FEh,000h,000h ; Hex #1C
Db 000h,024h,066h,0FFh,066h,024h,000h,000h ; Hex #1D
Db 000h,018h,03Ch,07Eh,0FFh,0FFh,000h,000h ; Hex #1E
Db 000h,0FFh,0FFh,07Eh,03Ch,018h,000h,000h ; Hex #1F
Db 000h,000h,000h,000h,000h,000h,000h,000h ; Hex #20
Db 018h,03Ch,03Ch,018h,018h,000h,018h,000h ; Hex #21
Db 066h,066h,024h,000h,000h,000h,000h,000h ; Hex #22
Db 06Ch,06Ch,0FEh,06Ch,0FEh,06Ch,06Ch,000h ; Hex #23
Db 018h,03Eh,060h,03Ch,006h,07Ch,018h,000h ; Hex #24
Db 000h,0C6h,0CCh,018h,030h,066h,0C6h,000h ; Hex #25
Db 038h,06Ch,038h,076h,0DCh,0CCh,076h,000h ; Hex #26
Db 018h,018h,030h,000h,000h,000h,000h,000h ; Hex #27
Db 00Ch,018h,030h,030h,030h,018h,00Ch,000h ; Hex #28
Db 030h,018h,00Ch,00Ch,00Ch,018h,030h,000h ; Hex #29
Db 000h,066h,03Ch,0FFh,03Ch,066h,000h,000h ; Hex #2A
Db 000h,018h,018h,07Eh,018h,018h,000h,000h ; Hex #2B
Db 000h,000h,000h,000h,000h,018h,018h,030h ; Hex #2C
Db 000h,000h,000h,07Eh,000h,000h,000h,000h ; Hex #2D
Db 000h,000h,000h,000h,000h,018h,018h,000h ; Hex #2E
Db 006h,00Ch,018h,030h,060h,0C0h,080h,000h ; Hex #2F
Db 038h,06Ch,0C6h,0D6h,0C6h,06Ch,038h,000h ; Hex #30
Db 018h,038h,018h,018h,018h,018h,07Eh,000h ; Hex #31
Db 07Ch,0C6h,006h,01Ch,030h,066h,0FEh,000h ; Hex #32
Db 07Ch,0C6h,006h,03Ch,006h,0C6h,07Ch,000h ; Hex #33
Db 01Ch,03Ch,06Ch,0CCh,0FEh,00Ch,01Eh,000h ; Hex #34
Db 0FEh,0C0h,0C0h,0FCh,006h,0C6h,07Ch,000h ; Hex #35
Db 038h,060h,0C0h,0FCh,0C6h,0C6h,07Ch,000h ; Hex #36
Db 0FEh,0C6h,00Ch,018h,030h,030h,030h,000h ; Hex #37
Db 07Ch,0C6h,0C6h,07Ch,0C6h,0C6h,07Ch,000h ; Hex #38
Db 07Ch,0C6h,0C6h,07Eh,006h,00Ch,078h,000h ; Hex #39
Db 000h,018h,018h,000h,000h,018h,018h,000h ; Hex #3A
Db 000h,018h,018h,000h,000h,018h,018h,030h ; Hex #3B
Db 006h,00Ch,018h,030h,018h,00Ch,006h,000h ; Hex #3C
Db 000h,000h,07Eh,000h,000h,07Eh,000h,000h ; Hex #3D
Db 060h,030h,018h,00Ch,018h,030h,060h,000h ; Hex #3E
Db 07Ch,0C6h,00Ch,018h,018h,000h,018h,000h ; Hex #3F
Db 07Ch,0C6h,0DEh,0DEh,0DEh,0C0h,078h,000h ; Hex #40
Db 038h,06Ch,0C6h,0FEh,0C6h,0C6h,0C6h,000h ; Hex #41
Db 0FCh,066h,066h,07Ch,066h,066h,0FCh,000h ; Hex #42
Db 03Ch,066h,0C0h,0C0h,0C0h,066h,03Ch,000h ; Hex #43
Db 0F8h,06Ch,066h,066h,066h,06Ch,0F8h,000h ; Hex #44
Db 0FEh,062h,068h,078h,068h,062h,0FEh,000h ; Hex #45
Db 0FEh,062h,068h,078h,068h,060h,0F0h,000h ; Hex #46
Db 03Ch,066h,0C0h,0C0h,0CEh,066h,03Ah,000h ; Hex #47
Db 0C6h,0C6h,0C6h,0FEh,0C6h,0C6h,0C6h,000h ; Hex #48
Db 03Ch,018h,018h,018h,018h,018h,03Ch,000h ; Hex #49
Db 01Eh,00Ch,00Ch,00Ch,0CCh,0CCh,078h,000h ; Hex #4A
Db 0E6h,066h,06Ch,078h,06Ch,066h,0E6h,000h ; Hex #4B
Db 0F0h,060h,060h,060h,062h,066h,0FEh,000h ; Hex #4C
Db 0C6h,0EEh,0FEh,0FEh,0D6h,0C6h,0C6h,000h ; Hex #4D
Db 0C6h,0E6h,0F6h,0DEh,0CEh,0C6h,0C6h,000h ; Hex #4E
Db 07Ch,0C6h,0C6h,0C6h,0C6h,0C6h,07Ch,000h ; Hex #4F
Db 0FCh,066h,066h,07Ch,060h,060h,0F0h,000h ; Hex #50
Db 07Ch,0C6h,0C6h,0C6h,0C6h,0CEh,07Ch,00Eh ; Hex #51
Db 0FCh,066h,066h,07Ch,06Ch,066h,0E6h,000h ; Hex #52
Db 03Ch,066h,030h,018h,00Ch,066h,03Ch,000h ; Hex #53
Db 07Eh,07Eh,05Ah,018h,018h,018h,03Ch,000h ; Hex #54
Db 0C6h,0C6h,0C6h,0C6h,0C6h,0C6h,07Ch,000h ; Hex #55
Db 0C6h,0C6h,0C6h,0C6h,0C6h,06Ch,038h,000h ; Hex #56
Db 0C6h,0C6h,0C6h,0D6h,0D6h,0FEh,06Ch,000h ; Hex #57
Db 0C6h,0C6h,06Ch,038h,06Ch,0C6h,0C6h,000h ; Hex #58
Db 066h,066h,066h,03Ch,018h,018h,03Ch,000h ; Hex #59
Db 0FEh,0C6h,08Ch,018h,032h,066h,0FEh,000h ; Hex #5A
Db 03Ch,030h,030h,030h,030h,030h,03Ch,000h ; Hex #5B
Db 0C0h,060h,030h,018h,00Ch,006h,002h,000h ; Hex #5C
Db 03Ch,00Ch,00Ch,00Ch,00Ch,00Ch,03Ch,000h ; Hex #5D
Db 010h,038h,06Ch,0C6h,000h,000h,000h,000h ; Hex #5E
Db 000h,000h,000h,000h,000h,000h,000h,0FFh ; Hex #5F
Db 030h,018h,00Ch,000h,000h,000h,000h,000h ; Hex #60
Db 000h,000h,078h,00Ch,07Ch,0CCh,076h,000h ; Hex #61
Db 0E0h,060h,07Ch,066h,066h,066h,0DCh,000h ; Hex #62
Db 000h,000h,07Ch,0C6h,0C0h,0C6h,07Ch,000h ; Hex #63
Db 01Ch,00Ch,07Ch,0CCh,0CCh,0CCh,076h,000h ; Hex #64
Db 000h,000h,07Ch,0C6h,0FEh,0C0h,07Ch,000h ; Hex #65
Db 03Ch,066h,060h,0F8h,060h,060h,0F0h,000h ; Hex #66
Db 000h,000h,076h,0CCh,0CCh,07Ch,00Ch,0F8h ; Hex #67
Db 0E0h,060h,06Ch,076h,066h,066h,0E6h,000h ; Hex #68
Db 018h,000h,038h,018h,018h,018h,03Ch,000h ; Hex #69
Db 006h,000h,006h,006h,006h,066h,066h,03Ch ; Hex #6A
Db 0E0h,060h,066h,06Ch,078h,06Ch,0E6h,000h ; Hex #6B
Db 038h,018h,018h,018h,018h,018h,03Ch,000h ; Hex #6C
Db 000h,000h,0ECh,0FEh,0D6h,0D6h,0D6h,000h ; Hex #6D
Db 000h,000h,0DCh,066h,066h,066h,066h,000h ; Hex #6E
Db 000h,000h,07Ch,0C6h,0C6h,0C6h,07Ch,000h ; Hex #6F
Db 000h,000h,0DCh,066h,066h,07Ch,060h,0F0h ; Hex #70
Db 000h,000h,076h,0CCh,0CCh,07Ch,00Ch,01Eh ; Hex #71
Db 000h,000h,0DCh,076h,060h,060h,0F0h,000h ; Hex #72
Db 000h,000h,07Eh,0C0h,07Ch,006h,0FCh,000h ; Hex #73
Db 030h,030h,0FCh,030h,030h,036h,01Ch,000h ; Hex #74
Db 000h,000h,0CCh,0CCh,0CCh,0CCh,076h,000h ; Hex #75
Db 000h,000h,0C6h,0C6h,0C6h,06Ch,038h,000h ; Hex #76
Db 000h,000h,0C6h,0D6h,0D6h,0FEh,06Ch,000h ; Hex #77
Db 000h,000h,0C6h,06Ch,038h,06Ch,0C6h,000h ; Hex #78
Db 000h,000h,0C6h,0C6h,0C6h,07Eh,006h,0FCh ; Hex #79
Db 000h,000h,07Eh,04Ch,018h,032h,07Eh,000h ; Hex #7A
Db 00Eh,018h,018h,070h,018h,018h,00Eh,000h ; Hex #7B
Db 018h,018h,018h,018h,018h,018h,018h,000h ; Hex #7C
Db 070h,018h,018h,00Eh,018h,018h,070h,000h ; Hex #7D
Db 076h,0DCh,000h,000h,000h,000h,000h,000h ; Hex #7E
Db 000h,010h,038h,06Ch,0C6h,0C6h,0FEh,000h ; Hex #7F
Db 07Ch,0C6h,0C0h,0C0h,0C6h,07Ch,00Ch,078h ; Hex #80
Db 0CCh,000h,0CCh,0CCh,0CCh,0CCh,076h,000h ; Hex #81
Db 00Ch,018h,07Ch,0C6h,0FEh,0C0h,07Ch,000h ; Hex #82
Db 07Ch,082h,078h,00Ch,07Ch,0CCh,076h,000h ; Hex #83
Db 076h,0DCh,078h,00Ch,07Ch,0CCh,076h,000h ; Hex #84
Db 030h,018h,078h,00Ch,07Ch,0CCh,076h,000h ; Hex #85
Db 030h,060h,038h,06Ch,0C6h,0FEh,0C6h,000h ; Hex #86
Db 000h,000h,07Eh,0C0h,0C0h,07Eh,00Ch,038h ; Hex #87
Db 07Ch,082h,07Ch,0C6h,0FEh,0C0h,07Ch,000h ; Hex #88
Db 07Ch,082h,0FEh,0C0h,0F8h,0C0h,0FEh,000h ; Hex #89
Db 030h,018h,07Ch,0C6h,0FEh,0C0h,07Ch,000h ; Hex #8A
Db 00Ch,018h,03Ch,018h,018h,018h,03Ch,000h ; Hex #8B
Db 07Ch,082h,038h,06Ch,0C6h,06Ch,038h,000h ; Hex #8C
Db 030h,018h,000h,038h,018h,018h,03Ch,000h ; Hex #8D
Db 076h,0DCh,038h,06Ch,0C6h,0FEh,0C6h,000h ; Hex #8E
Db 07Ch,082h,038h,06Ch,0C6h,0FEh,0C6h,000h ; Hex #8F
Db 018h,030h,0FEh,0C0h,0F8h,0C0h,0FEh,000h ; Hex #90
Db 060h,030h,038h,06Ch,0C6h,0FEh,0C6h,000h ; Hex #91
Db 030h,018h,0FEh,0C0h,0F8h,0C0h,0FEh,000h ; Hex #92
Db 07Ch,082h,07Ch,0C6h,0C6h,0C6h,07Ch,000h ; Hex #93
Db 076h,0DCh,07Ch,0C6h,0C6h,0C6h,07Ch,000h ; Hex #94
Db 030h,018h,07Ch,0C6h,0C6h,0C6h,07Ch,000h ; Hex #95
Db 00Ch,018h,0C6h,0C6h,0C6h,0C6h,07Ch,000h ; Hex #96
Db 060h,030h,0CCh,0CCh,0CCh,0CCh,076h,000h ; Hex #97
Db 030h,018h,03Ch,018h,018h,018h,03Ch,000h ; Hex #98
Db 076h,0DCh,038h,06Ch,0C6h,06Ch,038h,000h ; Hex #99
Db 0C6h,000h,0C6h,0C6h,0C6h,0C6h,07Ch,000h ; Hex #9A
Db 018h,018h,07Eh,0C0h,0C0h,07Eh,018h,018h ; Hex #9B
Db 038h,06Ch,064h,0F0h,060h,066h,0FCh,000h ; Hex #9C
Db 030h,018h,0C6h,0C6h,0C6h,0C6h,07Ch,000h ; Hex #9D
Db 0F8h,0CCh,0CCh,0FAh,0C6h,0CFh,0C6h,0C7h ; Hex #9E
Db 00Ch,018h,038h,06Ch,0C6h,06Ch,038h,000h ; Hex #9F
Db 018h,030h,078h,00Ch,07Ch,0CCh,076h,000h ; Hex #A0
Db 00Ch,018h,000h,038h,018h,018h,03Ch,000h ; Hex #A1
Db 00Ch,018h,07Ch,0C6h,0C6h,0C6h,07Ch,000h ; Hex #A2
Db 018h,030h,0CCh,0CCh,0CCh,0CCh,076h,000h ; Hex #A3
Db 076h,0DCh,000h,0DCh,066h,066h,066h,000h ; Hex #A4
Db 076h,0DCh,000h,0E6h,0F6h,0DEh,0CEh,000h ; Hex #A5
Db 03Ch,06Ch,06Ch,03Eh,000h,07Eh,000h,000h ; Hex #A6
Db 038h,06Ch,06Ch,038h,000h,07Ch,000h,000h ; Hex #A7
Db 018h,000h,018h,018h,030h,063h,03Eh,000h ; Hex #A8
Db 030h,018h,038h,06Ch,0C6h,06Ch,038h,000h ; Hex #A9
Db 000h,000h,000h,0FEh,006h,006h,000h,000h ; Hex #AA
Db 063h,0E6h,06Ch,07Eh,033h,066h,0CCh,00Fh ; Hex #AB
Db 063h,0E6h,06Ch,07Ah,036h,06Ah,0DFh,006h ; Hex #AC
Db 018h,000h,018h,018h,03Ch,03Ch,018h,000h ; Hex #AD
Db 000h,033h,066h,0CCh,066h,033h,000h,000h ; Hex #AE
Db 000h,0CCh,066h,033h,066h,0CCh,000h,000h ; Hex #AF
Db 022h,088h,022h,088h,022h,088h,022h,088h ; Hex #B0
Db 055h,0AAh,055h,0AAh,055h,0AAh,055h,0AAh ; Hex #B1
Db 077h,0DDh,077h,0DDh,077h,0DDh,077h,0DDh ; Hex #B2
Db 018h,018h,018h,018h,018h,018h,018h,018h ; Hex #B3
Db 018h,018h,018h,018h,0F8h,018h,018h,018h ; Hex #B4
Db 018h,018h,0F8h,018h,0F8h,018h,018h,018h ; Hex #B5
Db 036h,036h,036h,036h,0F6h,036h,036h,036h ; Hex #B6
Db 000h,000h,000h,000h,0FEh,036h,036h,036h ; Hex #B7
Db 000h,000h,0F8h,018h,0F8h,018h,018h,018h ; Hex #B8
Db 036h,036h,0F6h,006h,0F6h,036h,036h,036h ; Hex #B9
Db 036h,036h,036h,036h,036h,036h,036h,036h ; Hex #BA
Db 000h,000h,0FEh,006h,0F6h,036h,036h,036h ; Hex #BB
Db 036h,036h,0F6h,006h,0FEh,000h,000h,000h ; Hex #BC
Db 036h,036h,036h,036h,0FEh,000h,000h,000h ; Hex #BD
Db 018h,018h,0F8h,018h,0F8h,000h,000h,000h ; Hex #BE
Db 000h,000h,000h,000h,0F8h,018h,018h,018h ; Hex #BF
Db 018h,018h,018h,018h,01Fh,000h,000h,000h ; Hex #C0
Db 018h,018h,018h,018h,0FFh,000h,000h,000h ; Hex #C1
Db 000h,000h,000h,000h,0FFh,018h,018h,018h ; Hex #C2
Db 018h,018h,018h,018h,01Fh,018h,018h,018h ; Hex #C3
Db 000h,000h,000h,000h,0FFh,000h,000h,000h ; Hex #C4
Db 018h,018h,018h,018h,0FFh,018h,018h,018h ; Hex #C5
Db 018h,018h,01Fh,018h,01Fh,018h,018h,018h ; Hex #C6
Db 036h,036h,036h,036h,037h,036h,036h,036h ; Hex #C7
Db 036h,036h,037h,030h,03Fh,000h,000h,000h ; Hex #C8
Db 000h,000h,03Fh,030h,037h,036h,036h,036h ; Hex #C9
Db 036h,036h,0F7h,000h,0FFh,000h,000h,000h ; Hex #CA
Db 000h,000h,0FFh,000h,0F7h,036h,036h,036h ; Hex #CB
Db 036h,036h,037h,030h,037h,036h,036h,036h ; Hex #CC
Db 000h,000h,0FFh,000h,0FFh,000h,000h,000h ; Hex #CD
Db 036h,036h,0F7h,000h,0F7h,036h,036h,036h ; Hex #CE
Db 018h,018h,0FFh,000h,0FFh,000h,000h,000h ; Hex #CF
Db 036h,036h,036h,036h,0FFh,000h,000h,000h ; Hex #D0
Db 000h,000h,0FFh,000h,0FFh,018h,018h,018h ; Hex #D1
Db 000h,000h,000h,000h,0FFh,036h,036h,036h ; Hex #D2
Db 036h,036h,036h,036h,03Fh,000h,000h,000h ; Hex #D3
Db 018h,018h,01Fh,018h,01Fh,000h,000h,000h ; Hex #D4
Db 000h,000h,01Fh,018h,01Fh,018h,018h,018h ; Hex #D5
Db 000h,000h,000h,000h,03Fh,036h,036h,036h ; Hex #D6
Db 036h,036h,036h,036h,0FFh,036h,036h,036h ; Hex #D7
Db 018h,018h,0FFh,018h,0FFh,018h,018h,018h ; Hex #D8
Db 018h,018h,018h,018h,0F8h,000h,000h,000h ; Hex #D9
Db 000h,000h,000h,000h,01Fh,018h,018h,018h ; Hex #DA
Db 0FFh,0FFh,0FFh,0FFh,0FFh,0FFh,0FFh,0FFh ; Hex #DB
Db 000h,000h,000h,000h,0FFh,0FFh,0FFh,0FFh ; Hex #DC
Db 0F0h,0F0h,0F0h,0F0h,0F0h,0F0h,0F0h,0F0h ; Hex #DD
Db 00Fh,00Fh,00Fh,00Fh,00Fh,00Fh,00Fh,00Fh ; Hex #DE
Db 0FFh,0FFh,0FFh,0FFh,000h,000h,000h,000h ; Hex #DF
Db 000h,000h,076h,0DCh,0C8h,0DCh,076h,000h ; Hex #E0
Db 078h,0CCh,0CCh,0D8h,0CCh,0C6h,0CCh,000h ; Hex #E1
Db 0FEh,0C6h,0C0h,0C0h,0C0h,0C0h,0C0h,000h ; Hex #E2
Db 000h,000h,0FEh,06Ch,06Ch,06Ch,06Ch,000h ; Hex #E3
Db 0FEh,0C6h,060h,030h,060h,0C6h,0FEh,000h ; Hex #E4
Db 000h,000h,07Eh,0D8h,0D8h,0D8h,070h,000h ; Hex #E5
Db 000h,000h,066h,066h,066h,066h,07Ch,0C0h ; Hex #E6
Db 000h,076h,0DCh,018h,018h,018h,018h,000h ; Hex #E7
Db 07Eh,018h,03Ch,066h,066h,03Ch,018h,07Eh ; Hex #E8
Db 038h,06Ch,0C6h,0FEh,0C6h,06Ch,038h,000h ; Hex #E9
Db 038h,06Ch,0C6h,0C6h,06Ch,06Ch,0EEh,000h ; Hex #EA
Db 00Eh,018h,00Ch,03Eh,066h,066h,03Ch,000h ; Hex #EB
Db 000h,000h,07Eh,0DBh,0DBh,07Eh,000h,000h ; Hex #EC
Db 006h,00Ch,07Eh,0DBh,0DBh,07Eh,060h,0C0h ; Hex #ED
Db 01Eh,030h,060h,07Eh,060h,030h,01Eh,000h ; Hex #EE
Db 000h,07Ch,0C6h,0C6h,0C6h,0C6h,0C6h,000h ; Hex #EF
Db 000h,0FEh,000h,0FEh,000h,0FEh,000h,000h ; Hex #F0
Db 018h,018h,07Eh,018h,018h,000h,07Eh,000h ; Hex #F1
Db 030h,018h,00Ch,018h,030h,000h,07Eh,000h ; Hex #F2
Db 00Ch,018h,030h,018h,00Ch,000h,07Eh,000h ; Hex #F3
Db 00Eh,01Bh,01Bh,018h,018h,018h,018h,018h ; Hex #F4
Db 018h,018h,018h,018h,018h,0D8h,0D8h,070h ; Hex #F5
Db 000h,018h,000h,07Eh,000h,018h,000h,000h ; Hex #F6
Db 000h,076h,0DCh,000h,076h,0DCh,000h,000h ; Hex #F7
Db 038h,06Ch,06Ch,038h,000h,000h,000h,000h ; Hex #F8
Db 000h,000h,000h,018h,018h,000h,000h,000h ; Hex #F9
Db 000h,000h,000h,018h,000h,000h,000h,000h ; Hex #FA
Db 00Fh,00Ch,00Ch,00Ch,0ECh,06Ch,03Ch,01Ch ; Hex #FB
Db 06Ch,036h,036h,036h,036h,000h,000h,000h ; Hex #FC
Db 078h,00Ch,018h,030h,07Ch,000h,000h,000h ; Hex #FD
Db 000h,000h,03Ch,03Ch,03Ch,03Ch,000h,000h ; Hex #FE
Db 000h,000h,000h,000h,000h,000h,000h,000h ; Hex #FF
|
; A017643: a(n) = (12n+10)^3.
; 1000,10648,39304,97336,195112,343000,551368,830584,1191016,1643032,2197000,2863288,3652264,4574296,5639752,6859000,8242408,9800344,11543176,13481272,15625000,17984728,20570824,23393656,26463592,29791000,33386248,37259704
mul $0,12
add $0,10
pow $0,3
|
; A092353: Expansion of (1+x^3)/((1-x)^2*(1-x^3)^2).
; 1,2,3,7,11,15,24,33,42,58,74,90,115,140,165,201,237,273,322,371,420,484,548,612,693,774,855,955,1055,1155,1276,1397,1518,1662,1806,1950,2119,2288,2457,2653,2849,3045,3270,3495,3720,3976,4232,4488,4777,5066,5355,5679,6003,6327,6688,7049,7410,7810,8210,8610,9051,9492,9933,10417,10901,11385,11914,12443,12972,13548,14124,14700,15325,15950,16575,17251,17927,18603,19332,20061,20790,21574,22358,23142,23983,24824,25665,26565,27465,28365,29326,30287,31248,32272,33296,34320,35409,36498,37587,38743,39899,41055,42280,43505,44730,46026,47322,48618,49987,51356,52725,54169,55613,57057,58578,60099,61620,63220,64820,66420,68101,69782,71463,73227,74991,76755,78604,80453,82302,84238,86174,88110,90135,92160,94185,96301,98417,100533,102742,104951,107160,109464,111768,114072,116473,118874,121275,123775,126275,128775,131376,133977,136578,139282,141986,144690,147499,150308,153117,156033,158949,161865,164890,167915,170940,174076,177212,180348,183597,186846,190095,193459,196823,200187,203668,207149,210630,214230,217830,221430,225151,228872,232593,236437,240281,244125,248094,252063,256032,260128,264224,268320,272545,276770,280995,285351,289707,294063,298552,303041,307530,312154,316778,321402,326163,330924,335685,340585,345485,350385,355426,360467,365508,370692,375876,381060,386389,391718,397047,402523,407999,413475,419100,424725,430350,436126,441902,447678,453607,459536,465465,471549,477633,483717,489958,496199,502440,508840,515240,521640,528201,534762,541323,548047,554771,561495,568384,575273,582162,589218
mov $2,$0
add $2,1
mov $3,$0
lpb $2,1
mov $0,$3
sub $2,1
sub $0,$2
mov $4,$0
div $4,3
add $4,1
pow $4,2
add $1,$4
lpe
|
/*
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS HEADER.
*
* Copyright 1997-2007 Sun Microsystems, Inc. All rights reserved.
*
* The contents of this file are subject to the terms of either the GNU
* General Public License Version 2 only ("GPL") or the Common
* Development and Distribution License("CDDL") (collectively, the
* "License"). You may not use this file except in compliance with the
* License. You can obtain a copy of the License at
* http://www.netbeans.org/cddl-gplv2.html
* or nbbuild/licenses/CDDL-GPL-2-CP. See the License for the
* specific language governing permissions and limitations under the
* License. When distributing the software, include this License Header
* Notice in each file and include the License file at
* nbbuild/licenses/CDDL-GPL-2-CP. Sun designates this
* particular file as subject to the "Classpath" exception as provided
* by Sun in the GPL Version 2 section of the License file that
* accompanied this code. If applicable, add the following below the
* License Header, with the fields enclosed by brackets [] replaced by
* your own identifying information:
* "Portions Copyrighted [year] [name of copyright owner]"
*
* Contributor(s):
*
* The Original Software is NetBeans. The Initial Developer of the Original
* Software is Sun Microsystems, Inc. Portions Copyright 1997-2007 Sun
* Microsystems, Inc. All Rights Reserved.
*
* If you wish your version of this file to be governed by only the CDDL
* or only the GPL Version 2, indicate your decision by adding
* "[Contributor] elects to include this software in this distribution
* under the [CDDL or GPL Version 2] license." If you do not indicate a
* single choice of license, a recipient has the option to distribute
* your version of this file under either the CDDL, the GPL Version 2 or
* to extend the choice of license to its licensees as provided above.
* However, if you add GPL Version 2 code and therefore, elected the GPL
* Version 2 license, then the option applies only if the new code is
* made subject to such option by the copyright holder.
*/
namespace {
namespace inner_235102cc {
struct AAA_235102cc {
int foo();
};
struct cast_235102cc_retty {};
AAA_235102cc cast_235102cc(int);
}
int boo() {
inner_235102cc::cast_235102cc(1).foo();
}
}
|
lui $1,19519
ori $1,$1,48194
lui $2,61094
ori $2,$2,59664
lui $3,50492
ori $3,$3,36876
lui $4,32230
ori $4,$4,13622
lui $5,1046
ori $5,$5,34330
lui $6,4566
ori $6,$6,2118
mthi $1
mtlo $2
sec0:
nop
nop
nop
sltu $1,$6,$6
sec1:
nop
nop
xor $6,$4,$3
sltu $3,$6,$6
sec2:
nop
nop
sltiu $6,$5,26085
sltu $3,$6,$6
sec3:
nop
nop
mfhi $6
sltu $3,$6,$6
sec4:
nop
nop
lw $6,16($0)
sltu $2,$6,$6
sec5:
nop
nor $6,$4,$1
nop
sltu $1,$6,$6
sec6:
nop
addu $6,$1,$3
nor $6,$4,$3
sltu $1,$6,$6
sec7:
nop
nor $6,$4,$5
slti $6,$1,5144
sltu $3,$6,$6
sec8:
nop
nor $6,$1,$4
mfhi $6
sltu $2,$6,$6
sec9:
nop
slt $6,$5,$2
lh $6,12($0)
sltu $5,$6,$6
sec10:
nop
xori $6,$5,27505
nop
sltu $5,$6,$6
sec11:
nop
andi $6,$3,22174
nor $6,$1,$4
sltu $2,$6,$6
sec12:
nop
ori $6,$2,45555
andi $6,$4,19180
sltu $3,$6,$6
sec13:
nop
xori $6,$0,55436
mfhi $6
sltu $3,$6,$6
sec14:
nop
lui $6,40027
lw $6,12($0)
sltu $2,$6,$6
sec15:
nop
mflo $6
nop
sltu $5,$6,$6
sec16:
nop
mflo $6
sltu $6,$3,$4
sltu $0,$6,$6
sec17:
nop
mfhi $6
xori $6,$3,43246
sltu $2,$6,$6
sec18:
nop
mfhi $6
mflo $6
sltu $1,$6,$6
sec19:
nop
mflo $6
lh $6,10($0)
sltu $4,$6,$6
sec20:
nop
lw $6,0($0)
nop
sltu $4,$6,$6
sec21:
nop
lw $6,12($0)
sltu $6,$4,$3
sltu $4,$6,$6
sec22:
nop
lhu $6,6($0)
addiu $6,$1,4966
sltu $5,$6,$6
sec23:
nop
lw $6,8($0)
mflo $6
sltu $5,$6,$6
sec24:
nop
lhu $6,10($0)
lhu $6,4($0)
sltu $6,$6,$6
sec25:
nor $6,$0,$4
nop
nop
sltu $3,$6,$6
sec26:
addu $6,$4,$5
nop
sltu $6,$1,$4
sltu $2,$6,$6
sec27:
and $6,$4,$3
nop
sltiu $6,$0,20172
sltu $5,$6,$6
sec28:
xor $6,$0,$5
nop
mfhi $6
sltu $4,$6,$6
sec29:
sltu $6,$2,$0
nop
lhu $6,12($0)
sltu $3,$6,$6
sec30:
subu $6,$4,$6
and $6,$4,$3
nop
sltu $0,$6,$6
sec31:
addu $6,$2,$2
or $6,$5,$2
or $6,$0,$5
sltu $4,$6,$6
sec32:
addu $6,$3,$3
or $6,$3,$4
sltiu $6,$5,5892
sltu $1,$6,$6
sec33:
subu $6,$3,$0
and $6,$4,$4
mfhi $6
sltu $3,$6,$6
sec34:
xor $6,$2,$2
or $6,$1,$4
lh $6,4($0)
sltu $6,$6,$6
sec35:
subu $6,$6,$2
lui $6,22927
nop
sltu $3,$6,$6
sec36:
and $6,$5,$3
andi $6,$6,42219
xor $6,$2,$4
sltu $5,$6,$6
sec37:
and $6,$1,$1
slti $6,$4,22498
addiu $6,$2,8520
sltu $4,$6,$6
sec38:
sltu $6,$4,$1
addiu $6,$5,24097
mfhi $6
sltu $5,$6,$6
sec39:
and $6,$2,$5
sltiu $6,$0,-29707
lw $6,12($0)
sltu $2,$6,$6
sec40:
and $6,$6,$3
mfhi $6
nop
sltu $1,$6,$6
sec41:
or $6,$3,$3
mflo $6
xor $6,$3,$2
sltu $5,$6,$6
sec42:
subu $6,$1,$2
mfhi $6
xori $6,$5,779
sltu $1,$6,$6
sec43:
nor $6,$3,$3
mfhi $6
mfhi $6
sltu $3,$6,$6
sec44:
slt $6,$1,$4
mflo $6
lh $6,12($0)
sltu $2,$6,$6
sec45:
and $6,$2,$1
lh $6,8($0)
nop
sltu $4,$6,$6
sec46:
slt $6,$2,$5
lw $6,8($0)
sltu $6,$2,$3
sltu $5,$6,$6
sec47:
addu $6,$1,$5
lhu $6,8($0)
ori $6,$0,58796
sltu $3,$6,$6
sec48:
slt $6,$3,$2
lw $6,0($0)
mflo $6
sltu $4,$6,$6
sec49:
and $6,$2,$4
lb $6,7($0)
lhu $6,6($0)
sltu $3,$6,$6
sec50:
slti $6,$3,32141
nop
nop
sltu $4,$6,$6
sec51:
ori $6,$2,44171
nop
sltu $6,$2,$3
sltu $3,$6,$6
sec52:
ori $6,$3,51763
nop
andi $6,$4,2274
sltu $3,$6,$6
sec53:
lui $6,60928
nop
mfhi $6
sltu $3,$6,$6
sec54:
slti $6,$2,19379
nop
lb $6,2($0)
sltu $4,$6,$6
sec55:
lui $6,2226
or $6,$3,$3
nop
sltu $0,$6,$6
sec56:
andi $6,$5,38318
xor $6,$6,$4
addu $6,$2,$1
sltu $2,$6,$6
sec57:
andi $6,$4,953
subu $6,$2,$2
sltiu $6,$4,-30835
sltu $4,$6,$6
sec58:
sltiu $6,$4,-24424
subu $6,$5,$4
mflo $6
sltu $4,$6,$6
sec59:
slti $6,$3,-20820
xor $6,$3,$0
lhu $6,6($0)
sltu $5,$6,$6
sec60:
andi $6,$4,9055
sltiu $6,$0,30081
nop
sltu $5,$6,$6
sec61:
andi $6,$3,63624
slti $6,$1,6732
sltu $6,$4,$1
sltu $1,$6,$6
sec62:
ori $6,$2,13561
addiu $6,$3,15149
addiu $6,$4,-2500
sltu $2,$6,$6
sec63:
sltiu $6,$3,8837
lui $6,51964
mflo $6
sltu $3,$6,$6
sec64:
slti $6,$0,20491
xori $6,$3,19777
lhu $6,0($0)
sltu $3,$6,$6
sec65:
slti $6,$4,-28418
mfhi $6
nop
sltu $6,$6,$6
sec66:
sltiu $6,$2,19955
mflo $6
xor $6,$3,$4
sltu $5,$6,$6
sec67:
lui $6,11448
mflo $6
lui $6,38358
sltu $1,$6,$6
sec68:
addiu $6,$3,17332
mfhi $6
mfhi $6
sltu $3,$6,$6
sec69:
sltiu $6,$3,12345
mfhi $6
lhu $6,6($0)
sltu $3,$6,$6
sec70:
slti $6,$1,-4252
lb $6,11($0)
nop
sltu $5,$6,$6
sec71:
xori $6,$2,63471
lw $6,0($0)
xor $6,$2,$3
sltu $6,$6,$6
sec72:
addiu $6,$2,-1741
lb $6,13($0)
sltiu $6,$6,18668
sltu $2,$6,$6
sec73:
addiu $6,$2,29379
lhu $6,12($0)
mflo $6
sltu $4,$6,$6
sec74:
sltiu $6,$5,-24054
lh $6,16($0)
lh $6,4($0)
sltu $2,$6,$6
sec75:
mfhi $6
nop
nop
sltu $4,$6,$6
sec76:
mfhi $6
nop
xor $6,$2,$2
sltu $4,$6,$6
sec77:
mflo $6
nop
lui $6,39112
sltu $1,$6,$6
sec78:
mfhi $6
nop
mflo $6
sltu $1,$6,$6
sec79:
mflo $6
nop
lh $6,8($0)
sltu $5,$6,$6
sec80:
mfhi $6
subu $6,$3,$6
nop
sltu $3,$6,$6
sec81:
mfhi $6
and $6,$3,$3
slt $6,$0,$2
sltu $5,$6,$6
sec82:
mflo $6
and $6,$4,$2
ori $6,$3,21254
sltu $2,$6,$6
sec83:
mfhi $6
or $6,$4,$4
mflo $6
sltu $4,$6,$6
sec84:
mflo $6
subu $6,$2,$5
lh $6,14($0)
sltu $2,$6,$6
sec85:
mfhi $6
andi $6,$4,52506
nop
sltu $3,$6,$6
sec86:
mflo $6
addiu $6,$5,-13431
or $6,$0,$2
sltu $0,$6,$6
sec87:
mflo $6
addiu $6,$3,-9508
addiu $6,$3,-15409
sltu $6,$6,$6
sec88:
mfhi $6
ori $6,$1,43062
mfhi $6
sltu $1,$6,$6
sec89:
mflo $6
lui $6,19962
lb $6,1($0)
sltu $6,$6,$6
sec90:
mfhi $6
mflo $6
nop
sltu $0,$6,$6
sec91:
mfhi $6
mflo $6
and $6,$5,$2
sltu $6,$6,$6
sec92:
mfhi $6
mflo $6
sltiu $6,$2,-17814
sltu $3,$6,$6
sec93:
mflo $6
mflo $6
mfhi $6
sltu $4,$6,$6
sec94:
mflo $6
mfhi $6
lw $6,0($0)
sltu $2,$6,$6
sec95:
mflo $6
lb $6,14($0)
nop
sltu $3,$6,$6
sec96:
mflo $6
lhu $6,8($0)
and $6,$4,$6
sltu $5,$6,$6
sec97:
mfhi $6
lw $6,0($0)
andi $6,$4,28316
sltu $5,$6,$6
sec98:
mflo $6
lhu $6,14($0)
mfhi $6
sltu $3,$6,$6
sec99:
mfhi $6
lw $6,12($0)
lw $6,8($0)
sltu $2,$6,$6
sec100:
lb $6,2($0)
nop
nop
sltu $3,$6,$6
sec101:
lb $6,0($0)
nop
or $6,$5,$4
sltu $2,$6,$6
sec102:
lb $6,3($0)
nop
addiu $6,$2,-23937
sltu $5,$6,$6
sec103:
lhu $6,0($0)
nop
mfhi $6
sltu $3,$6,$6
sec104:
lb $6,9($0)
nop
lh $6,16($0)
sltu $4,$6,$6
sec105:
lb $6,16($0)
addu $6,$3,$5
nop
sltu $3,$6,$6
sec106:
lh $6,2($0)
and $6,$4,$3
addu $6,$2,$2
sltu $2,$6,$6
sec107:
lh $6,2($0)
or $6,$5,$4
lui $6,59990
sltu $3,$6,$6
sec108:
lw $6,16($0)
xor $6,$6,$3
mfhi $6
sltu $3,$6,$6
sec109:
lw $6,12($0)
and $6,$4,$1
lbu $6,2($0)
sltu $1,$6,$6
sec110:
lhu $6,16($0)
xori $6,$1,49621
nop
sltu $4,$6,$6
sec111:
lhu $6,16($0)
lui $6,6748
subu $6,$3,$0
sltu $3,$6,$6
sec112:
lb $6,5($0)
sltiu $6,$0,-26456
slti $6,$2,-17399
sltu $3,$6,$6
sec113:
lb $6,2($0)
slti $6,$6,32730
mfhi $6
sltu $5,$6,$6
sec114:
lw $6,4($0)
andi $6,$5,41457
lh $6,4($0)
sltu $1,$6,$6
sec115:
lbu $6,12($0)
mfhi $6
nop
sltu $4,$6,$6
sec116:
lhu $6,6($0)
mfhi $6
addu $6,$2,$2
sltu $0,$6,$6
sec117:
lh $6,6($0)
mflo $6
ori $6,$5,38649
sltu $3,$6,$6
sec118:
lw $6,12($0)
mfhi $6
mfhi $6
sltu $2,$6,$6
sec119:
lh $6,14($0)
mflo $6
lhu $6,0($0)
sltu $3,$6,$6
sec120:
lh $6,10($0)
lb $6,8($0)
nop
sltu $5,$6,$6
sec121:
lb $6,8($0)
lw $6,0($0)
and $6,$2,$5
sltu $0,$6,$6
sec122:
lbu $6,0($0)
lw $6,0($0)
andi $6,$4,55338
sltu $6,$6,$6
sec123:
lh $6,16($0)
lhu $6,10($0)
mfhi $6
sltu $6,$6,$6
sec124:
lbu $6,11($0)
lh $6,0($0)
lhu $6,2($0)
sltu $4,$6,$6
|
TITLE "Interrupt Object Support Routines"
;++
;
; Copyright (c) 2000 Microsoft Corporation
;
; Module Name:
;
; intsup.asm
;
; Abstract:
;
; This module implements the platform specific code to support interrupt
; objects. It contains the interrupt dispatch code and the code template
; that gets copied into an interrupt object.
;
; Author:
;
; David N. Cutler (davec) 19-Jun-2000
;
; Environment:
;
; Kernel mode only.
;
;--
include ksamd64.inc
extern KeBugCheck:proc
extern KiInitiateUserApc:proc
extern __imp_HalEndSystemInterrupt:qword
subttl "Synchronize Execution"
;++
;
; BOOLEAN
; KeSynchronizeExecution (
; IN PKINTERRUPT Interrupt,
; IN PKSYNCHRONIZE_ROUTINE SynchronizeRoutine,
; IN PVOID SynchronizeContext
; )
;
; Routine Description:
;
; This function synchronizes the execution of the specified routine with
; the execution of the service routine associated with the specified
; interrupt object.
;
; Arguments:
;
; Interrupt (rcx) - Supplies a pointer to an interrupt object.
;
; SynchronizeRoutine (rdx) - Supplies a pointer to the function whose
; execution is to be synchronized with the execution of the service
; routine associated with the specified interrupt object.
;
; SynchronizeContext (r8) - Supplies a context pointer which is to be
; passed to the synchronization function as a parameter.
;
; Return Value:
;
; The value returned by the synchronization routine is returned as the
; function value.
;
;--
SyFrame struct
P1Home dq ? ; parameter home address
OldIrql dd ? ; saved IRQL
Fill dd ? ; fill
syFrame ends
NESTED_ENTRY KeSynchronizeExecution, _TEXT$00
push_reg rsi ; save nonvolatile register
alloc_stack (sizeof SyFrame) ; allocate stack frame
END_PROLOGUE
mov rsi, rcx ; save interrupt object address
movzx ecx, byte ptr InSynchronizeIrql[rsi] ; get synchronization IRQL
RaiseIrql ; raise IRQL to synchronization level
mov SyFrame.OldIrql[rsp], eax ; save previous IRQL
AcquireSpinLock InActualLock[rsi] ; acquire interrupt spin lock
mov rcx, r8 ; set synchronization context
call rdx ; call synchronization routine
ReleaseSpinlock InActualLock[rsi] ; release interrutp spin lock
mov ecx, SyFrame.OldIrql[rsp] ; get previous IRQL
LowerIrql ; lower IRQL to previous level
add rsp, sizeof SyFrame ; deallocate stack frame
pop rsi ; restore nonvolatile register
ret ;
NESTED_END KeSynchronizeExecution, _TEXT$00
subttl "Interrupt Exception Handler"
;++
;
; EXCEPTION_DISPOSITION
; KiInterruptHandler (
; IN PEXCEPTION_RECORD ExceptionRecord,
; IN PVOID EstablisherFrame,
; IN OUT PCONTEXT ContextRecord,
; IN OUT PDISPATCHER_CONTEXT DispatcherContext
; )
;
; Routine Description:
;
; This routine is the exception handler for the interrupt dispatcher. The
; dispatching or unwinding of an exception across an interrupt causes a
; bug check.
;
; Arguments:
;
; ExceptionRecord (rcx) - Supplies a pointer to an exception record.
;
; EstablisherFrame (rdx) - Supplies the frame pointer of the establisher
; of this exception handler.
;
; ContextRecord (r8) - Supplies a pointer to a context record.
;
; DispatcherContext (r9) - Supplies a pointer to the dispatcher context
; record.
;
; Return Value:
;
; There is no return from this routine.
;
;--
IhFrame struct
P1Home dq ? ; parameter home address
IhFrame ends
NESTED_ENTRY KiInterruptHandler, _TEXT$00
alloc_stack (sizeof IhFrame) ; allocate stack frame
END_PROLOGUE
test dword ptr ErExceptionFlags[rcx], EXCEPTION_UNWIND ; test for unwind
mov ecx, INTERRUPT_UNWIND_ATTEMPTED ; set bug check code
jnz short KiIH10 ; if nz, unwind in progress
mov ecx, INTERRUPT_EXCEPTION_NOT_HANDLED ; set bug check code
KiIH10: call KeBugCheck ; bug check - no return
nop ; fill - do not remove
NESTED_END KiInterruptHandler, _TEXT$00
subttl "Chained Dispatch"
;++
;
; VOID
; KiChainedDispatch (
; VOID
; );
;
; Routine Description:
;
; This routine is entered as the result of an interrupt being generated
; via a vector that is connected to more than one interrupt object.
;
; Arguments:
;
; rbp - Supplies a pointer to the interrupt object.
;
; Return Value:
;
; None.
;
;--
NESTED_ENTRY KiChainedDispatch, _TEXT$00, KiInterruptHandler
.pushframe code ; mark machine frame
.pushreg rbp ; mark mark nonvolatile register push
GENERATE_INTERRUPT_FRAME ; generate interrupt frame
movzx ecx, byte ptr InIrql[rsi] ; set interrupt IRQL
ENTER_INTERRUPT <NoEOI> ; raise IRQL and enable interrupts
call KiScanInterruptObjectList ; scan interrupt object list
EXIT_INTERRUPT ; do EOI, lower IRQL, and restore state
NESTED_END KiChainedDispatch, _TEXT$00
subttl "Scan Interrupt Object List"
;++
;
; Routine Description:
;
; This routine scans the list of interrupt objects for chained interrupt
; dispatch. If the mode of the interrupt is latched, then a complete scan
; of the list must be performed. Otherwise, the scan can be cut short as
; soon as an interrupt routine returns
;
; Arguments:
;
; rsi - Supplies a pointer to the interrupt object.
;
; Return Value:
;
; None.
;
;--
SiFrame struct
P1Home dq ? ; interrupt object parameter
P2Home dq ? ; service context parameter
Return db ? ; service routine return value
Fill db 15 dup (?) ; fill
SavedRbx dq ? ; saved register RBX
SavedRdi dq ? ; saved register RDI
SavedR12 dq ? ; saved register RSI
SiFrame ends
NESTED_ENTRY KiScanInterruptObjectList, _TEXT$00
push_reg r12 ; save nonvolatile registers
push_reg rdi ;
push_reg rbx ;
alloc_stack (sizeof SiFrame - (3 * 8)) ; allocate stack frame
END_PROLOGUE
lea rbx, InInterruptListEntry[rsi] ; get list head address
mov r12, rbx ; set address of first list entry
;
; Scan the list of connected interrupt objects and call the service routine.
;
Si05: xor edi, edi ; clear interrupt handled flag
Si10: sub r12, InInterruptListEntry ; compute interrupt object address
movzx ecx, byte ptr InSynchronizeIrql[r12] ; get synchronization IRQL
cmp cl, InIrql[rsi] ; check if equal interrupt IRQL
je short Si20 ; if e, IRQL levels equal
SetIrql ; set IRQL to synchronization level
Si20: AcquireSpinLock InActualLock[r12] ; acquire interrupt spin lock
mov rcx, r12 ; set interrupt object parameter
mov rdx, InServiceContext[r12] ; set context parameter
call qword ptr InServiceRoutine[r12] ; call interrupt service routine
mov SiFrame.Return[rsp], al ; save return value
ReleaseSpinLock InActualLock[r12] ; release interrupt spin lock
movzx ecx, byte ptr InIrql[rsi] ; get interrupt IRQL
cmp cl, InSynchronizeIrql[r12] ; check if equal synchronization IRQL
je short Si30 ; if e, IRQL levels equal
SetIrql ; set IRQL to interrupt level
Si30: test byte ptr SiFrame.Return[rsp], 0ffh ; test if interrupt handled
jz short Si40 ; if z, interrupt not handled
cmp word ptr InMode[r12], InLatched ; check if latched interrupt
jne short Si50 ; if ne, not latched interrupt
inc edi ; indicate latched interrupt handled
Si40: mov r12, InInterruptListEntry[r12] ; get next interrupt list entry
cmp r12, rbx ; check if end of list
jne Si10 ; if ne, not end of list
;
; The complete interrupt object list has been scanned. This can only happen
; if the interrupt is a level sensitive interrupt and no interrupt was handled
; or the interrupt is a latched interrupt. Therefore, if any interrupt was
; handled it was a latched interrupt and the list needs to be scanned again
; to ensure that no interrupts are lost.
;
test edi, edi ; test if any interrupts handled
jnz Si05 ; if nz, latched interrupt handled
Si50: add rsp, sizeof SiFrame - (3 * 8) ; deallocate stack frame
pop rbx ; restore nonvolatile register
pop rdi ;
pop r12 ;
ret ;
NESTED_END KiscanInterruptObjectList, _TEXT$00
subttl "Interrupt Dispatch"
;++
;
; Routine Description:
;
; This routine is entered as the result of an interrupt being generated
; via a vector that is connected to an interrupt object. Its function is
; to directly call the specified interrupt service routine.
;
; This routine is identical to KiInterruptDispatchNoLock except that
; the interrupt spinlock is taken.
;
; N.B. On entry rbp and rsi have been saved on the stack.
;
; Arguments:
;
; rbp - Supplies a pointer to the interrupt object.
;
; Return Value:
;
; None.
;
;--
NESTED_ENTRY KiInterruptDispatch, _TEXT$00, KiInterruptHandler
.pushframe code ; mark machine frame
.pushreg rbp ; mark mark nonvolatile register push
GENERATE_INTERRUPT_FRAME ; generate interrupt frame
;
; N.B. It is possible for a interrupt to occur at an IRQL that is lower
; than the current IRQL. This happens when the IRQL raised and at
; the same time an interrupt request is granted.
;
movzx ecx, byte ptr InIrql[rsi] ; set interrupt IRQL
ENTER_INTERRUPT <NoEOI> ; raise IRQL and enable interrupts
lea rax, (-128)[rbp] ; set trap frame address
mov InTrapFrame[rsi], rax ;
AcquireSpinLock InActualLock[rsi] ; acquire interrupt spin lock
mov rcx, rsi ; set address of interrupt object
mov rdx, InServiceContext[rsi] ; set service context
call qword ptr InServiceRoutine[rsi] ; call interrupt service routine
ReleaseSpinLock InActualLock[rsi] ; release interrupt spin lock
EXIT_INTERRUPT ; do EOI, lower IRQL, and restore state
NESTED_END KiInterruptDispatch, _TEXT$00
subttl "Interrupt Dispatch, No Lock"
;++
;
; Routine Description:
;
; This routine is entered as the result of an interrupt being generated
; via a vector that is connected to an interrupt object. Its function is
; to directly call the specified interrupt service routine.
;
; This routine is identical to KiInterruptDispatch except that no spinlock
; is taken.
;
; N.B. On entry rbp and rsi have been saved on the stack.
;
; Arguments:
;
; rbp - Supplies a pointer to the interrupt object.
;
; Return Value:
;
; None.
;
;--
NESTED_ENTRY KiInterruptDispatchNoLock, _TEXT$00, KiInterruptHandler
.pushframe code ; mark machine frame
.pushreg rbp ; mark mark nonvolatile register push
GENERATE_INTERRUPT_FRAME ; generate interrupt frame
;
; N.B. It is possible for a interrupt to occur at an IRQL that is lower
; than the current IRQL. This happens when the IRQL raised and at
; the same time an interrupt request is granted.
;
movzx ecx, byte ptr InIrql[rsi] ; set interrupt IRQL
ENTER_INTERRUPT <NoEOI> ; raise IRQL and enable interrupts
lea rax, (-128)[rbp] ; set trap frame address
mov InTrapFrame[rsi], rax ;
mov rcx, rsi ; set address of interrupt object
mov rdx, InServiceContext[rsi] ; set service context
call qword ptr InServiceRoutine[rsi] ; call interrupt service routine
EXIT_INTERRUPT ; do EOI, lower IRQL, and restore state
NESTED_END KiInterruptDispatchNoLock, _TEXT$00
subttl "Disable Processor Interrupts"
;++
;
; BOOLEAN
; KeDisableInterrupts(
; VOID
; )
;
; Routine Description:
;
; This function saves the state of the interrupt enable flag, clear the
; state of the interrupt flag (disables interrupts), and return the old
; inerrrupt enable flag state.
;
; Arguments:
;
; None.
;
; Return Value:
;
; If interrupts were previously enabled, then 1 is returned as the function
; value. Otherwise, 0 is returned.
;
;--
DiFrame struct
Flags dd ? ; processor flags
Fill dd ? ; fill
DiFrame ends
NESTED_ENTRY KeDisableInterrupts, _TEXT$00
push_eflags ; push processor flags
END_PROLOGUE
mov eax, DiFrame.Flags[rsp] ; isolate interrupt enable bit
shr eax, EFLAGS_IF_SHIFT ;
and al, 1 ;
cli ; disable interrupts
add rsp, sizeof DiFrame ; deallocate stack frame
ret ; return
NESTED_END KeDisableInterrupts, _TEXT$00
subttl "Interrupt Template"
;++
;
; Routine Description:
;
; This routine is a template that is copied into each interrupt object.
; Its function is to save volatile machine state, compute the interrupt
; object address, and transfer control to the appropriate interrupt
; dispatcher.
;
; N.B. Interrupts are disabled on entry to this routine.
;
; Arguments:
;
; None.
;
; Return Value:
;
; N.B. Control does not return to this routine. The respective interrupt
; dispatcher dismisses the interrupt directly.
;
;--
LEAF_ENTRY KiInterruptTemplate, _TEXT$00
push rax ; push dummy vector number
push rbp ; save nonvolatile register
lea rbp, KiInterruptTemplate - InDispatchCode ; get interrupt object address
jmp qword ptr InDispatchAddress[rbp] ; finish in common code
LEAF_END KiInterruptTemplate, _TEXT$00
end
|
; A209404: Negated coefficients of Chebyshev T polynomials: a(n) = -A053120(n+14, n), n >= 0.
; Submitted by Christian Krause
; 1,15,128,816,4320,20064,84480,329472,1208064,4209920,14057472,45260800,141213696,428654592,1270087680,3683254272,10478223360,29297934336,80648077312,218864025600,586290298880,1551944908800,4063273943040,10531142369280,27039419596800,68822438510592,173752901959680,435347548798976,1083059755548672,2676526982103040,6573052309536768,16047114509352960,38958828003262464,94086339565191168,226089827240509440,540731503483551744,1287455960675123200,3052314510011400192,7207116201141469184
mov $3,2
mov $5,$0
lpb $3
mov $0,$5
sub $3,1
add $0,$3
trn $0,1
seq $0,54851 ; a(n) = 2^(n-7)*binomial(n,7). Number of 7D hypercubes in an n-dimensional hypercube.
mov $2,$3
mul $2,$0
add $4,$2
lpe
add $4,1
min $5,1
mul $5,$0
mov $0,$4
sub $0,$5
sub $0,1
|
; A087404: a(n) = 4a(n-1) + 5a(n-2).
; 2,4,26,124,626,3124,15626,78124,390626,1953124,9765626,48828124,244140626,1220703124,6103515626,30517578124,152587890626,762939453124,3814697265626,19073486328124,95367431640626,476837158203124
mov $1,5
pow $1,$0
mod $0,2
mul $0,2
add $1,4
sub $1,$0
sub $1,3
mov $0,$1
|
; A139271: a(n) = 2*n*(4*n-3).
; 0,2,20,54,104,170,252,350,464,594,740,902,1080,1274,1484,1710,1952,2210,2484,2774,3080,3402,3740,4094,4464,4850,5252,5670,6104,6554,7020,7502,8000,8514,9044,9590,10152,10730,11324,11934,12560,13202,13860,14534,15224,15930,16652,17390,18144,18914,19700,20502,21320,22154,23004,23870,24752,25650,26564,27494,28440,29402,30380,31374,32384,33410,34452,35510,36584,37674,38780,39902,41040,42194,43364,44550,45752,46970,48204,49454,50720,52002,53300,54614,55944,57290,58652,60030,61424,62834,64260,65702,67160,68634,70124,71630,73152,74690,76244,77814
mov $1,8
mul $1,$0
sub $1,6
mul $1,$0
mov $0,$1
|
! crt1.s for solaris 2.0.
! Copyright (C) 1992 Free Software Foundation, Inc.
! Written By David Vinayak Henkel-Wallace, June 1992
!
! This file is free software; you can redistribute it and/or modify it
! under the terms of the GNU General Public License as published by the
! Free Software Foundation; either version 2, or (at your option) any
! later version.
!
! In addition to the permissions in the GNU General Public License, the
! Free Software Foundation gives you unlimited permission to link the
! compiled version of this file with other programs, and to distribute
! those programs without any restriction coming from the use of this
! file. (The General Public License restrictions do apply in other
! respects; for example, they cover modification of the file, and
! distribution when not linked into another program.)
!
! This file is distributed in the hope that it will be useful, but
! WITHOUT ANY WARRANTY; without even the implied warranty of
! MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
! General Public License for more details.
!
! You should have received a copy of the GNU General Public License
! along with this program; see the file COPYING. If not, write to
! the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
!
! As a special exception, if you link this library with files
! compiled with GCC to produce an executable, this does not cause
! the resulting executable to be covered by the GNU General Public License.
! This exception does not however invalidate any other reasons why
! the executable file might be covered by the GNU General Public License.
!
! This file takes control of the process from the kernel, as specified
! in section 3 of the SVr4 ABI.
! This file is the first thing linked into any executable.
.section ".text"
.proc 022
.global _start
_start:
mov 0, %fp ! Mark bottom frame pointer
ld [%sp + 64], %l0 ! argc
add %sp, 68, %l1 ! argv
! Leave some room for a call. Sun leaves 32 octets (to sit on
! a cache line?) so we do too.
sub %sp, 32, %sp
! %g1 may contain a function to be registered w/atexit
orcc %g0, %g1, %g0
be .nope
mov %g1, %o0
call atexit
nop
.nope:
! Now make sure constructors and destructors are handled.
set _fini, %o0
call atexit, 1
nop
call _init, 0
nop
! We ignore the auxiliary vector; there's no defined way to
! access those data anyway. Instead, go straight to main:
mov %l0, %o0 ! argc
mov %l1, %o1 ! argv
! Skip argc words past argv, to env:
sll %l0, 2, %o2
add %o2, 4, %o2
add %l1, %o2, %o2 ! env
set _environ, %o3
st %o2, [%o3] ! *_environ
call main, 4
nop
call exit, 0
nop
call _exit, 0
nop
! We should never get here.
.type _start,#function
.size _start,.-_start
|
ColosseumObject:
db $e ; border block
db $0 ; warps
db $0 ; signs
db $1 ; objects
object SPRITE_RED, $2, $2, STAY, $0, $1 ; person
|
; A010215: Continued fraction for sqrt(167).
; Submitted by Jamie Morken(s3)
; 12,1,11,1,24,1,11,1,24,1,11,1,24,1,11,1,24,1,11,1,24,1,11,1,24,1,11,1,24,1,11,1,24,1,11,1,24,1,11,1,24,1,11,1,24,1,11,1,24,1,11,1,24,1,11,1,24,1,11,1,24,1,11,1,24,1
gcd $0,262156
mul $0,42
mod $0,13
mov $1,$0
div $1,5
mul $1,7
add $0,$1
sub $0,2
|
[bits 64]
GLOBAL LoadGDT
section .text
LoadGDT:
LGDT [rdi]
MOV ax, 0x10
MOV ds, ax
MOV es, ax
MOV fs, ax
MOV gs, ax
MOV ss, ax
POP rdi
MOV rax, 0x08
PUSH rax
PUSH rdi
RETFQ
|
; Copyright (c) 2018-2019, tevador <tevador@gmail.com>
;
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
; * Neither the name of the copyright holder nor the
; names of its contributors may be used to endorse or promote products
; derived from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
; ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
; WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
IFDEF RAX
_RANDOMX_JITX86_STATIC SEGMENT PAGE READ EXECUTE
PUBLIC randomx_program_prologue
PUBLIC randomx_program_loop_begin
PUBLIC randomx_program_loop_load
PUBLIC randomx_program_start
PUBLIC randomx_program_read_dataset
PUBLIC randomx_program_read_dataset_sshash_init
PUBLIC randomx_program_read_dataset_sshash_fin
PUBLIC randomx_dataset_init
PUBLIC randomx_program_loop_store
PUBLIC randomx_program_loop_end
PUBLIC randomx_program_epilogue
PUBLIC randomx_sshash_load
PUBLIC randomx_sshash_prefetch
PUBLIC randomx_sshash_end
PUBLIC randomx_sshash_init
PUBLIC randomx_program_end
PUBLIC randomx_reciprocal_fast
include asm/configuration.asm
RANDOMX_SCRATCHPAD_MASK EQU (RANDOMX_SCRATCHPAD_L3-64)
RANDOMX_DATASET_BASE_MASK EQU (RANDOMX_DATASET_BASE_SIZE-64)
RANDOMX_CACHE_MASK EQU (RANDOMX_ARGON_MEMORY*16-1)
RANDOMX_ALIGN EQU 4096
SUPERSCALAR_OFFSET EQU ((((RANDOMX_ALIGN + 32 * RANDOMX_PROGRAM_SIZE) - 1) / (RANDOMX_ALIGN) + 1) * (RANDOMX_ALIGN))
ALIGN 64
randomx_program_prologue PROC
include asm/program_prologue_win64.inc
movapd xmm13, xmmword ptr [mantissaMask]
movapd xmm14, xmmword ptr [exp240]
movapd xmm15, xmmword ptr [scaleMask]
jmp randomx_program_loop_begin
randomx_program_prologue ENDP
ALIGN 64
include asm/program_xmm_constants.inc
ALIGN 64
randomx_program_loop_begin PROC
nop
randomx_program_loop_begin ENDP
randomx_program_loop_load PROC
include asm/program_loop_load.inc
randomx_program_loop_load ENDP
randomx_program_start PROC
nop
randomx_program_start ENDP
randomx_program_read_dataset PROC
include asm/program_read_dataset.inc
randomx_program_read_dataset ENDP
randomx_program_read_dataset_sshash_init PROC
include asm/program_read_dataset_sshash_init.inc
randomx_program_read_dataset_sshash_init ENDP
randomx_program_read_dataset_sshash_fin PROC
include asm/program_read_dataset_sshash_fin.inc
randomx_program_read_dataset_sshash_fin ENDP
randomx_program_loop_store PROC
include asm/program_loop_store.inc
randomx_program_loop_store ENDP
randomx_program_loop_end PROC
nop
randomx_program_loop_end ENDP
ALIGN 64
randomx_dataset_init PROC
push rbx
push rbp
push rdi
push rsi
push r12
push r13
push r14
push r15
mov rdi, qword ptr [rcx] ;# cache->memory
mov rsi, rdx ;# dataset
mov rbp, r8 ;# block index
push r9 ;# max. block index
init_block_loop:
prefetchw byte ptr [rsi]
mov rbx, rbp
db 232 ;# 0xE8 = call
dd SUPERSCALAR_OFFSET - distance
distance equ $ - offset randomx_dataset_init
mov qword ptr [rsi+0], r8
mov qword ptr [rsi+8], r9
mov qword ptr [rsi+16], r10
mov qword ptr [rsi+24], r11
mov qword ptr [rsi+32], r12
mov qword ptr [rsi+40], r13
mov qword ptr [rsi+48], r14
mov qword ptr [rsi+56], r15
add rbp, 1
add rsi, 64
cmp rbp, qword ptr [rsp]
jb init_block_loop
pop r9
pop r15
pop r14
pop r13
pop r12
pop rsi
pop rdi
pop rbp
pop rbx
ret
randomx_dataset_init ENDP
ALIGN 64
randomx_program_epilogue PROC
include asm/program_epilogue_store.inc
include asm/program_epilogue_win64.inc
randomx_program_epilogue ENDP
ALIGN 64
randomx_sshash_load PROC
include asm/program_sshash_load.inc
randomx_sshash_load ENDP
randomx_sshash_prefetch PROC
include asm/program_sshash_prefetch.inc
randomx_sshash_prefetch ENDP
randomx_sshash_end PROC
nop
randomx_sshash_end ENDP
ALIGN 64
randomx_sshash_init PROC
lea r8, [rbx+1]
include asm/program_sshash_prefetch.inc
imul r8, qword ptr [r0_mul]
mov r9, qword ptr [r1_add]
xor r9, r8
mov r10, qword ptr [r2_add]
xor r10, r8
mov r11, qword ptr [r3_add]
xor r11, r8
mov r12, qword ptr [r4_add]
xor r12, r8
mov r13, qword ptr [r5_add]
xor r13, r8
mov r14, qword ptr [r6_add]
xor r14, r8
mov r15, qword ptr [r7_add]
xor r15, r8
jmp randomx_program_end
randomx_sshash_init ENDP
ALIGN 64
include asm/program_sshash_constants.inc
ALIGN 64
randomx_program_end PROC
nop
randomx_program_end ENDP
randomx_reciprocal_fast PROC
include asm/randomx_reciprocal.inc
randomx_reciprocal_fast ENDP
_RANDOMX_JITX86_STATIC ENDS
ENDIF
END |
_cat: file format elf32-i386
Disassembly of section .text:
00000000 <main>:
}
}
int
main(int argc, char *argv[])
{
0: f3 0f 1e fb endbr32
4: 8d 4c 24 04 lea 0x4(%esp),%ecx
8: 83 e4 f0 and $0xfffffff0,%esp
b: ff 71 fc pushl -0x4(%ecx)
e: 55 push %ebp
f: 89 e5 mov %esp,%ebp
11: 57 push %edi
12: 56 push %esi
13: be 01 00 00 00 mov $0x1,%esi
18: 53 push %ebx
19: 51 push %ecx
1a: 83 ec 18 sub $0x18,%esp
1d: 8b 01 mov (%ecx),%eax
1f: 8b 59 04 mov 0x4(%ecx),%ebx
22: 89 45 e4 mov %eax,-0x1c(%ebp)
25: 83 c3 04 add $0x4,%ebx
int fd, i;
if(argc <= 1){
28: 83 f8 01 cmp $0x1,%eax
2b: 7e 50 jle 7d <main+0x7d>
2d: 8d 76 00 lea 0x0(%esi),%esi
cat(0);
exit();
}
for(i = 1; i < argc; i++){
if((fd = open(argv[i], 0)) < 0){
30: 83 ec 08 sub $0x8,%esp
33: 6a 00 push $0x0
35: ff 33 pushl (%ebx)
37: e8 77 03 00 00 call 3b3 <open>
3c: 83 c4 10 add $0x10,%esp
3f: 89 c7 mov %eax,%edi
41: 85 c0 test %eax,%eax
43: 78 24 js 69 <main+0x69>
printf(1, "cat: cannot open %s\n", argv[i]);
exit();
}
cat(fd);
45: 83 ec 0c sub $0xc,%esp
for(i = 1; i < argc; i++){
48: 83 c6 01 add $0x1,%esi
4b: 83 c3 04 add $0x4,%ebx
cat(fd);
4e: 50 push %eax
4f: e8 3c 00 00 00 call 90 <cat>
close(fd);
54: 89 3c 24 mov %edi,(%esp)
57: e8 3f 03 00 00 call 39b <close>
for(i = 1; i < argc; i++){
5c: 83 c4 10 add $0x10,%esp
5f: 39 75 e4 cmp %esi,-0x1c(%ebp)
62: 75 cc jne 30 <main+0x30>
}
exit();
64: e8 0a 03 00 00 call 373 <exit>
printf(1, "cat: cannot open %s\n", argv[i]);
69: 50 push %eax
6a: ff 33 pushl (%ebx)
6c: 68 6b 08 00 00 push $0x86b
71: 6a 01 push $0x1
73: e8 68 04 00 00 call 4e0 <printf>
exit();
78: e8 f6 02 00 00 call 373 <exit>
cat(0);
7d: 83 ec 0c sub $0xc,%esp
80: 6a 00 push $0x0
82: e8 09 00 00 00 call 90 <cat>
exit();
87: e8 e7 02 00 00 call 373 <exit>
8c: 66 90 xchg %ax,%ax
8e: 66 90 xchg %ax,%ax
00000090 <cat>:
{
90: f3 0f 1e fb endbr32
94: 55 push %ebp
95: 89 e5 mov %esp,%ebp
97: 56 push %esi
98: 8b 75 08 mov 0x8(%ebp),%esi
9b: 53 push %ebx
while((n = read(fd, buf, sizeof(buf))) > 0) {
9c: eb 19 jmp b7 <cat+0x27>
9e: 66 90 xchg %ax,%ax
if (write(1, buf, n) != n) {
a0: 83 ec 04 sub $0x4,%esp
a3: 53 push %ebx
a4: 68 a0 0b 00 00 push $0xba0
a9: 6a 01 push $0x1
ab: e8 e3 02 00 00 call 393 <write>
b0: 83 c4 10 add $0x10,%esp
b3: 39 d8 cmp %ebx,%eax
b5: 75 25 jne dc <cat+0x4c>
while((n = read(fd, buf, sizeof(buf))) > 0) {
b7: 83 ec 04 sub $0x4,%esp
ba: 68 00 02 00 00 push $0x200
bf: 68 a0 0b 00 00 push $0xba0
c4: 56 push %esi
c5: e8 c1 02 00 00 call 38b <read>
ca: 83 c4 10 add $0x10,%esp
cd: 89 c3 mov %eax,%ebx
cf: 85 c0 test %eax,%eax
d1: 7f cd jg a0 <cat+0x10>
if(n < 0){
d3: 75 1b jne f0 <cat+0x60>
}
d5: 8d 65 f8 lea -0x8(%ebp),%esp
d8: 5b pop %ebx
d9: 5e pop %esi
da: 5d pop %ebp
db: c3 ret
printf(1, "cat: write error\n");
dc: 83 ec 08 sub $0x8,%esp
df: 68 48 08 00 00 push $0x848
e4: 6a 01 push $0x1
e6: e8 f5 03 00 00 call 4e0 <printf>
exit();
eb: e8 83 02 00 00 call 373 <exit>
printf(1, "cat: read error\n");
f0: 50 push %eax
f1: 50 push %eax
f2: 68 5a 08 00 00 push $0x85a
f7: 6a 01 push $0x1
f9: e8 e2 03 00 00 call 4e0 <printf>
exit();
fe: e8 70 02 00 00 call 373 <exit>
103: 66 90 xchg %ax,%ax
105: 66 90 xchg %ax,%ax
107: 66 90 xchg %ax,%ax
109: 66 90 xchg %ax,%ax
10b: 66 90 xchg %ax,%ax
10d: 66 90 xchg %ax,%ax
10f: 90 nop
00000110 <strcpy>:
#include "user.h"
#include "x86.h"
char*
strcpy(char *s, const char *t)
{
110: f3 0f 1e fb endbr32
114: 55 push %ebp
char *os;
os = s;
while((*s++ = *t++) != 0)
115: 31 c0 xor %eax,%eax
{
117: 89 e5 mov %esp,%ebp
119: 53 push %ebx
11a: 8b 4d 08 mov 0x8(%ebp),%ecx
11d: 8b 5d 0c mov 0xc(%ebp),%ebx
while((*s++ = *t++) != 0)
120: 0f b6 14 03 movzbl (%ebx,%eax,1),%edx
124: 88 14 01 mov %dl,(%ecx,%eax,1)
127: 83 c0 01 add $0x1,%eax
12a: 84 d2 test %dl,%dl
12c: 75 f2 jne 120 <strcpy+0x10>
;
return os;
}
12e: 89 c8 mov %ecx,%eax
130: 5b pop %ebx
131: 5d pop %ebp
132: c3 ret
133: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
13a: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
00000140 <strcmp>:
int
strcmp(const char *p, const char *q)
{
140: f3 0f 1e fb endbr32
144: 55 push %ebp
145: 89 e5 mov %esp,%ebp
147: 53 push %ebx
148: 8b 4d 08 mov 0x8(%ebp),%ecx
14b: 8b 55 0c mov 0xc(%ebp),%edx
while(*p && *p == *q)
14e: 0f b6 01 movzbl (%ecx),%eax
151: 0f b6 1a movzbl (%edx),%ebx
154: 84 c0 test %al,%al
156: 75 19 jne 171 <strcmp+0x31>
158: eb 26 jmp 180 <strcmp+0x40>
15a: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
160: 0f b6 41 01 movzbl 0x1(%ecx),%eax
p++, q++;
164: 83 c1 01 add $0x1,%ecx
167: 83 c2 01 add $0x1,%edx
while(*p && *p == *q)
16a: 0f b6 1a movzbl (%edx),%ebx
16d: 84 c0 test %al,%al
16f: 74 0f je 180 <strcmp+0x40>
171: 38 d8 cmp %bl,%al
173: 74 eb je 160 <strcmp+0x20>
return (uchar)*p - (uchar)*q;
175: 29 d8 sub %ebx,%eax
}
177: 5b pop %ebx
178: 5d pop %ebp
179: c3 ret
17a: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
180: 31 c0 xor %eax,%eax
return (uchar)*p - (uchar)*q;
182: 29 d8 sub %ebx,%eax
}
184: 5b pop %ebx
185: 5d pop %ebp
186: c3 ret
187: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
18e: 66 90 xchg %ax,%ax
00000190 <strlen>:
uint
strlen(const char *s)
{
190: f3 0f 1e fb endbr32
194: 55 push %ebp
195: 89 e5 mov %esp,%ebp
197: 8b 55 08 mov 0x8(%ebp),%edx
int n;
for(n = 0; s[n]; n++)
19a: 80 3a 00 cmpb $0x0,(%edx)
19d: 74 21 je 1c0 <strlen+0x30>
19f: 31 c0 xor %eax,%eax
1a1: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
1a8: 83 c0 01 add $0x1,%eax
1ab: 80 3c 02 00 cmpb $0x0,(%edx,%eax,1)
1af: 89 c1 mov %eax,%ecx
1b1: 75 f5 jne 1a8 <strlen+0x18>
;
return n;
}
1b3: 89 c8 mov %ecx,%eax
1b5: 5d pop %ebp
1b6: c3 ret
1b7: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
1be: 66 90 xchg %ax,%ax
for(n = 0; s[n]; n++)
1c0: 31 c9 xor %ecx,%ecx
}
1c2: 5d pop %ebp
1c3: 89 c8 mov %ecx,%eax
1c5: c3 ret
1c6: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
1cd: 8d 76 00 lea 0x0(%esi),%esi
000001d0 <memset>:
void*
memset(void *dst, int c, uint n)
{
1d0: f3 0f 1e fb endbr32
1d4: 55 push %ebp
1d5: 89 e5 mov %esp,%ebp
1d7: 57 push %edi
1d8: 8b 55 08 mov 0x8(%ebp),%edx
}
static inline void
stosb(void *addr, int data, int cnt)
{
asm volatile("cld; rep stosb" :
1db: 8b 4d 10 mov 0x10(%ebp),%ecx
1de: 8b 45 0c mov 0xc(%ebp),%eax
1e1: 89 d7 mov %edx,%edi
1e3: fc cld
1e4: f3 aa rep stos %al,%es:(%edi)
stosb(dst, c, n);
return dst;
}
1e6: 89 d0 mov %edx,%eax
1e8: 5f pop %edi
1e9: 5d pop %ebp
1ea: c3 ret
1eb: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
1ef: 90 nop
000001f0 <strchr>:
char*
strchr(const char *s, char c)
{
1f0: f3 0f 1e fb endbr32
1f4: 55 push %ebp
1f5: 89 e5 mov %esp,%ebp
1f7: 8b 45 08 mov 0x8(%ebp),%eax
1fa: 0f b6 4d 0c movzbl 0xc(%ebp),%ecx
for(; *s; s++)
1fe: 0f b6 10 movzbl (%eax),%edx
201: 84 d2 test %dl,%dl
203: 75 16 jne 21b <strchr+0x2b>
205: eb 21 jmp 228 <strchr+0x38>
207: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
20e: 66 90 xchg %ax,%ax
210: 0f b6 50 01 movzbl 0x1(%eax),%edx
214: 83 c0 01 add $0x1,%eax
217: 84 d2 test %dl,%dl
219: 74 0d je 228 <strchr+0x38>
if(*s == c)
21b: 38 d1 cmp %dl,%cl
21d: 75 f1 jne 210 <strchr+0x20>
return (char*)s;
return 0;
}
21f: 5d pop %ebp
220: c3 ret
221: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
return 0;
228: 31 c0 xor %eax,%eax
}
22a: 5d pop %ebp
22b: c3 ret
22c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
00000230 <gets>:
char*
gets(char *buf, int max)
{
230: f3 0f 1e fb endbr32
234: 55 push %ebp
235: 89 e5 mov %esp,%ebp
237: 57 push %edi
238: 56 push %esi
int i, cc;
char c;
for(i=0; i+1 < max; ){
239: 31 f6 xor %esi,%esi
{
23b: 53 push %ebx
23c: 89 f3 mov %esi,%ebx
23e: 83 ec 1c sub $0x1c,%esp
241: 8b 7d 08 mov 0x8(%ebp),%edi
for(i=0; i+1 < max; ){
244: eb 33 jmp 279 <gets+0x49>
246: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
24d: 8d 76 00 lea 0x0(%esi),%esi
cc = read(0, &c, 1);
250: 83 ec 04 sub $0x4,%esp
253: 8d 45 e7 lea -0x19(%ebp),%eax
256: 6a 01 push $0x1
258: 50 push %eax
259: 6a 00 push $0x0
25b: e8 2b 01 00 00 call 38b <read>
if(cc < 1)
260: 83 c4 10 add $0x10,%esp
263: 85 c0 test %eax,%eax
265: 7e 1c jle 283 <gets+0x53>
break;
buf[i++] = c;
267: 0f b6 45 e7 movzbl -0x19(%ebp),%eax
26b: 83 c7 01 add $0x1,%edi
26e: 88 47 ff mov %al,-0x1(%edi)
if(c == '\n' || c == '\r')
271: 3c 0a cmp $0xa,%al
273: 74 23 je 298 <gets+0x68>
275: 3c 0d cmp $0xd,%al
277: 74 1f je 298 <gets+0x68>
for(i=0; i+1 < max; ){
279: 83 c3 01 add $0x1,%ebx
27c: 89 fe mov %edi,%esi
27e: 3b 5d 0c cmp 0xc(%ebp),%ebx
281: 7c cd jl 250 <gets+0x20>
283: 89 f3 mov %esi,%ebx
break;
}
buf[i] = '\0';
return buf;
}
285: 8b 45 08 mov 0x8(%ebp),%eax
buf[i] = '\0';
288: c6 03 00 movb $0x0,(%ebx)
}
28b: 8d 65 f4 lea -0xc(%ebp),%esp
28e: 5b pop %ebx
28f: 5e pop %esi
290: 5f pop %edi
291: 5d pop %ebp
292: c3 ret
293: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
297: 90 nop
298: 8b 75 08 mov 0x8(%ebp),%esi
29b: 8b 45 08 mov 0x8(%ebp),%eax
29e: 01 de add %ebx,%esi
2a0: 89 f3 mov %esi,%ebx
buf[i] = '\0';
2a2: c6 03 00 movb $0x0,(%ebx)
}
2a5: 8d 65 f4 lea -0xc(%ebp),%esp
2a8: 5b pop %ebx
2a9: 5e pop %esi
2aa: 5f pop %edi
2ab: 5d pop %ebp
2ac: c3 ret
2ad: 8d 76 00 lea 0x0(%esi),%esi
000002b0 <stat>:
int
stat(const char *n, struct stat *st)
{
2b0: f3 0f 1e fb endbr32
2b4: 55 push %ebp
2b5: 89 e5 mov %esp,%ebp
2b7: 56 push %esi
2b8: 53 push %ebx
int fd;
int r;
fd = open(n, O_RDONLY);
2b9: 83 ec 08 sub $0x8,%esp
2bc: 6a 00 push $0x0
2be: ff 75 08 pushl 0x8(%ebp)
2c1: e8 ed 00 00 00 call 3b3 <open>
if(fd < 0)
2c6: 83 c4 10 add $0x10,%esp
2c9: 85 c0 test %eax,%eax
2cb: 78 2b js 2f8 <stat+0x48>
return -1;
r = fstat(fd, st);
2cd: 83 ec 08 sub $0x8,%esp
2d0: ff 75 0c pushl 0xc(%ebp)
2d3: 89 c3 mov %eax,%ebx
2d5: 50 push %eax
2d6: e8 f0 00 00 00 call 3cb <fstat>
close(fd);
2db: 89 1c 24 mov %ebx,(%esp)
r = fstat(fd, st);
2de: 89 c6 mov %eax,%esi
close(fd);
2e0: e8 b6 00 00 00 call 39b <close>
return r;
2e5: 83 c4 10 add $0x10,%esp
}
2e8: 8d 65 f8 lea -0x8(%ebp),%esp
2eb: 89 f0 mov %esi,%eax
2ed: 5b pop %ebx
2ee: 5e pop %esi
2ef: 5d pop %ebp
2f0: c3 ret
2f1: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
return -1;
2f8: be ff ff ff ff mov $0xffffffff,%esi
2fd: eb e9 jmp 2e8 <stat+0x38>
2ff: 90 nop
00000300 <atoi>:
int
atoi(const char *s)
{
300: f3 0f 1e fb endbr32
304: 55 push %ebp
305: 89 e5 mov %esp,%ebp
307: 53 push %ebx
308: 8b 55 08 mov 0x8(%ebp),%edx
int n;
n = 0;
while('0' <= *s && *s <= '9')
30b: 0f be 02 movsbl (%edx),%eax
30e: 8d 48 d0 lea -0x30(%eax),%ecx
311: 80 f9 09 cmp $0x9,%cl
n = 0;
314: b9 00 00 00 00 mov $0x0,%ecx
while('0' <= *s && *s <= '9')
319: 77 1a ja 335 <atoi+0x35>
31b: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
31f: 90 nop
n = n*10 + *s++ - '0';
320: 83 c2 01 add $0x1,%edx
323: 8d 0c 89 lea (%ecx,%ecx,4),%ecx
326: 8d 4c 48 d0 lea -0x30(%eax,%ecx,2),%ecx
while('0' <= *s && *s <= '9')
32a: 0f be 02 movsbl (%edx),%eax
32d: 8d 58 d0 lea -0x30(%eax),%ebx
330: 80 fb 09 cmp $0x9,%bl
333: 76 eb jbe 320 <atoi+0x20>
return n;
}
335: 89 c8 mov %ecx,%eax
337: 5b pop %ebx
338: 5d pop %ebp
339: c3 ret
33a: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
00000340 <memmove>:
void*
memmove(void *vdst, const void *vsrc, int n)
{
340: f3 0f 1e fb endbr32
344: 55 push %ebp
345: 89 e5 mov %esp,%ebp
347: 57 push %edi
348: 8b 45 10 mov 0x10(%ebp),%eax
34b: 8b 55 08 mov 0x8(%ebp),%edx
34e: 56 push %esi
34f: 8b 75 0c mov 0xc(%ebp),%esi
char *dst;
const char *src;
dst = vdst;
src = vsrc;
while(n-- > 0)
352: 85 c0 test %eax,%eax
354: 7e 0f jle 365 <memmove+0x25>
356: 01 d0 add %edx,%eax
dst = vdst;
358: 89 d7 mov %edx,%edi
35a: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
*dst++ = *src++;
360: a4 movsb %ds:(%esi),%es:(%edi)
while(n-- > 0)
361: 39 f8 cmp %edi,%eax
363: 75 fb jne 360 <memmove+0x20>
return vdst;
}
365: 5e pop %esi
366: 89 d0 mov %edx,%eax
368: 5f pop %edi
369: 5d pop %ebp
36a: c3 ret
0000036b <fork>:
name: \
movl $SYS_ ## name, %eax; \
int $T_SYSCALL; \
ret
SYSCALL(fork)
36b: b8 01 00 00 00 mov $0x1,%eax
370: cd 40 int $0x40
372: c3 ret
00000373 <exit>:
SYSCALL(exit)
373: b8 02 00 00 00 mov $0x2,%eax
378: cd 40 int $0x40
37a: c3 ret
0000037b <wait>:
SYSCALL(wait)
37b: b8 03 00 00 00 mov $0x3,%eax
380: cd 40 int $0x40
382: c3 ret
00000383 <pipe>:
SYSCALL(pipe)
383: b8 04 00 00 00 mov $0x4,%eax
388: cd 40 int $0x40
38a: c3 ret
0000038b <read>:
SYSCALL(read)
38b: b8 05 00 00 00 mov $0x5,%eax
390: cd 40 int $0x40
392: c3 ret
00000393 <write>:
SYSCALL(write)
393: b8 10 00 00 00 mov $0x10,%eax
398: cd 40 int $0x40
39a: c3 ret
0000039b <close>:
SYSCALL(close)
39b: b8 15 00 00 00 mov $0x15,%eax
3a0: cd 40 int $0x40
3a2: c3 ret
000003a3 <kill>:
SYSCALL(kill)
3a3: b8 06 00 00 00 mov $0x6,%eax
3a8: cd 40 int $0x40
3aa: c3 ret
000003ab <exec>:
SYSCALL(exec)
3ab: b8 07 00 00 00 mov $0x7,%eax
3b0: cd 40 int $0x40
3b2: c3 ret
000003b3 <open>:
SYSCALL(open)
3b3: b8 0f 00 00 00 mov $0xf,%eax
3b8: cd 40 int $0x40
3ba: c3 ret
000003bb <mknod>:
SYSCALL(mknod)
3bb: b8 11 00 00 00 mov $0x11,%eax
3c0: cd 40 int $0x40
3c2: c3 ret
000003c3 <unlink>:
SYSCALL(unlink)
3c3: b8 12 00 00 00 mov $0x12,%eax
3c8: cd 40 int $0x40
3ca: c3 ret
000003cb <fstat>:
SYSCALL(fstat)
3cb: b8 08 00 00 00 mov $0x8,%eax
3d0: cd 40 int $0x40
3d2: c3 ret
000003d3 <link>:
SYSCALL(link)
3d3: b8 13 00 00 00 mov $0x13,%eax
3d8: cd 40 int $0x40
3da: c3 ret
000003db <mkdir>:
SYSCALL(mkdir)
3db: b8 14 00 00 00 mov $0x14,%eax
3e0: cd 40 int $0x40
3e2: c3 ret
000003e3 <chdir>:
SYSCALL(chdir)
3e3: b8 09 00 00 00 mov $0x9,%eax
3e8: cd 40 int $0x40
3ea: c3 ret
000003eb <dup>:
SYSCALL(dup)
3eb: b8 0a 00 00 00 mov $0xa,%eax
3f0: cd 40 int $0x40
3f2: c3 ret
000003f3 <getpid>:
SYSCALL(getpid)
3f3: b8 0b 00 00 00 mov $0xb,%eax
3f8: cd 40 int $0x40
3fa: c3 ret
000003fb <sbrk>:
SYSCALL(sbrk)
3fb: b8 0c 00 00 00 mov $0xc,%eax
400: cd 40 int $0x40
402: c3 ret
00000403 <sleep>:
SYSCALL(sleep)
403: b8 0d 00 00 00 mov $0xd,%eax
408: cd 40 int $0x40
40a: c3 ret
0000040b <uptime>:
SYSCALL(uptime)
40b: b8 0e 00 00 00 mov $0xe,%eax
410: cd 40 int $0x40
412: c3 ret
00000413 <cps>:
SYSCALL(cps)
413: b8 16 00 00 00 mov $0x16,%eax
418: cd 40 int $0x40
41a: c3 ret
0000041b <chpr>:
41b: b8 17 00 00 00 mov $0x17,%eax
420: cd 40 int $0x40
422: c3 ret
423: 66 90 xchg %ax,%ax
425: 66 90 xchg %ax,%ax
427: 66 90 xchg %ax,%ax
429: 66 90 xchg %ax,%ax
42b: 66 90 xchg %ax,%ax
42d: 66 90 xchg %ax,%ax
42f: 90 nop
00000430 <printint>:
write(fd, &c, 1);
}
static void
printint(int fd, int xx, int base, int sgn)
{
430: 55 push %ebp
431: 89 e5 mov %esp,%ebp
433: 57 push %edi
434: 56 push %esi
435: 53 push %ebx
436: 83 ec 3c sub $0x3c,%esp
439: 89 4d c4 mov %ecx,-0x3c(%ebp)
uint x;
neg = 0;
if(sgn && xx < 0){
neg = 1;
x = -xx;
43c: 89 d1 mov %edx,%ecx
{
43e: 89 45 b8 mov %eax,-0x48(%ebp)
if(sgn && xx < 0){
441: 85 d2 test %edx,%edx
443: 0f 89 7f 00 00 00 jns 4c8 <printint+0x98>
449: f6 45 08 01 testb $0x1,0x8(%ebp)
44d: 74 79 je 4c8 <printint+0x98>
neg = 1;
44f: c7 45 bc 01 00 00 00 movl $0x1,-0x44(%ebp)
x = -xx;
456: f7 d9 neg %ecx
} else {
x = xx;
}
i = 0;
458: 31 db xor %ebx,%ebx
45a: 8d 75 d7 lea -0x29(%ebp),%esi
45d: 8d 76 00 lea 0x0(%esi),%esi
do{
buf[i++] = digits[x % base];
460: 89 c8 mov %ecx,%eax
462: 31 d2 xor %edx,%edx
464: 89 cf mov %ecx,%edi
466: f7 75 c4 divl -0x3c(%ebp)
469: 0f b6 92 88 08 00 00 movzbl 0x888(%edx),%edx
470: 89 45 c0 mov %eax,-0x40(%ebp)
473: 89 d8 mov %ebx,%eax
475: 8d 5b 01 lea 0x1(%ebx),%ebx
}while((x /= base) != 0);
478: 8b 4d c0 mov -0x40(%ebp),%ecx
buf[i++] = digits[x % base];
47b: 88 14 1e mov %dl,(%esi,%ebx,1)
}while((x /= base) != 0);
47e: 39 7d c4 cmp %edi,-0x3c(%ebp)
481: 76 dd jbe 460 <printint+0x30>
if(neg)
483: 8b 4d bc mov -0x44(%ebp),%ecx
486: 85 c9 test %ecx,%ecx
488: 74 0c je 496 <printint+0x66>
buf[i++] = '-';
48a: c6 44 1d d8 2d movb $0x2d,-0x28(%ebp,%ebx,1)
buf[i++] = digits[x % base];
48f: 89 d8 mov %ebx,%eax
buf[i++] = '-';
491: ba 2d 00 00 00 mov $0x2d,%edx
while(--i >= 0)
496: 8b 7d b8 mov -0x48(%ebp),%edi
499: 8d 5c 05 d7 lea -0x29(%ebp,%eax,1),%ebx
49d: eb 07 jmp 4a6 <printint+0x76>
49f: 90 nop
4a0: 0f b6 13 movzbl (%ebx),%edx
4a3: 83 eb 01 sub $0x1,%ebx
write(fd, &c, 1);
4a6: 83 ec 04 sub $0x4,%esp
4a9: 88 55 d7 mov %dl,-0x29(%ebp)
4ac: 6a 01 push $0x1
4ae: 56 push %esi
4af: 57 push %edi
4b0: e8 de fe ff ff call 393 <write>
while(--i >= 0)
4b5: 83 c4 10 add $0x10,%esp
4b8: 39 de cmp %ebx,%esi
4ba: 75 e4 jne 4a0 <printint+0x70>
putc(fd, buf[i]);
}
4bc: 8d 65 f4 lea -0xc(%ebp),%esp
4bf: 5b pop %ebx
4c0: 5e pop %esi
4c1: 5f pop %edi
4c2: 5d pop %ebp
4c3: c3 ret
4c4: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
neg = 0;
4c8: c7 45 bc 00 00 00 00 movl $0x0,-0x44(%ebp)
4cf: eb 87 jmp 458 <printint+0x28>
4d1: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
4d8: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
4df: 90 nop
000004e0 <printf>:
// Print to the given fd. Only understands %d, %x, %p, %s.
void
printf(int fd, const char *fmt, ...)
{
4e0: f3 0f 1e fb endbr32
4e4: 55 push %ebp
4e5: 89 e5 mov %esp,%ebp
4e7: 57 push %edi
4e8: 56 push %esi
4e9: 53 push %ebx
4ea: 83 ec 2c sub $0x2c,%esp
int c, i, state;
uint *ap;
state = 0;
ap = (uint*)(void*)&fmt + 1;
for(i = 0; fmt[i]; i++){
4ed: 8b 75 0c mov 0xc(%ebp),%esi
4f0: 0f b6 1e movzbl (%esi),%ebx
4f3: 84 db test %bl,%bl
4f5: 0f 84 b4 00 00 00 je 5af <printf+0xcf>
ap = (uint*)(void*)&fmt + 1;
4fb: 8d 45 10 lea 0x10(%ebp),%eax
4fe: 83 c6 01 add $0x1,%esi
write(fd, &c, 1);
501: 8d 7d e7 lea -0x19(%ebp),%edi
state = 0;
504: 31 d2 xor %edx,%edx
ap = (uint*)(void*)&fmt + 1;
506: 89 45 d0 mov %eax,-0x30(%ebp)
509: eb 33 jmp 53e <printf+0x5e>
50b: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
50f: 90 nop
510: 89 55 d4 mov %edx,-0x2c(%ebp)
c = fmt[i] & 0xff;
if(state == 0){
if(c == '%'){
state = '%';
513: ba 25 00 00 00 mov $0x25,%edx
if(c == '%'){
518: 83 f8 25 cmp $0x25,%eax
51b: 74 17 je 534 <printf+0x54>
write(fd, &c, 1);
51d: 83 ec 04 sub $0x4,%esp
520: 88 5d e7 mov %bl,-0x19(%ebp)
523: 6a 01 push $0x1
525: 57 push %edi
526: ff 75 08 pushl 0x8(%ebp)
529: e8 65 fe ff ff call 393 <write>
52e: 8b 55 d4 mov -0x2c(%ebp),%edx
} else {
putc(fd, c);
531: 83 c4 10 add $0x10,%esp
for(i = 0; fmt[i]; i++){
534: 0f b6 1e movzbl (%esi),%ebx
537: 83 c6 01 add $0x1,%esi
53a: 84 db test %bl,%bl
53c: 74 71 je 5af <printf+0xcf>
c = fmt[i] & 0xff;
53e: 0f be cb movsbl %bl,%ecx
541: 0f b6 c3 movzbl %bl,%eax
if(state == 0){
544: 85 d2 test %edx,%edx
546: 74 c8 je 510 <printf+0x30>
}
} else if(state == '%'){
548: 83 fa 25 cmp $0x25,%edx
54b: 75 e7 jne 534 <printf+0x54>
if(c == 'd'){
54d: 83 f8 64 cmp $0x64,%eax
550: 0f 84 9a 00 00 00 je 5f0 <printf+0x110>
printint(fd, *ap, 10, 1);
ap++;
} else if(c == 'x' || c == 'p'){
556: 81 e1 f7 00 00 00 and $0xf7,%ecx
55c: 83 f9 70 cmp $0x70,%ecx
55f: 74 5f je 5c0 <printf+0xe0>
printint(fd, *ap, 16, 0);
ap++;
} else if(c == 's'){
561: 83 f8 73 cmp $0x73,%eax
564: 0f 84 d6 00 00 00 je 640 <printf+0x160>
s = "(null)";
while(*s != 0){
putc(fd, *s);
s++;
}
} else if(c == 'c'){
56a: 83 f8 63 cmp $0x63,%eax
56d: 0f 84 8d 00 00 00 je 600 <printf+0x120>
putc(fd, *ap);
ap++;
} else if(c == '%'){
573: 83 f8 25 cmp $0x25,%eax
576: 0f 84 b4 00 00 00 je 630 <printf+0x150>
write(fd, &c, 1);
57c: 83 ec 04 sub $0x4,%esp
57f: c6 45 e7 25 movb $0x25,-0x19(%ebp)
583: 6a 01 push $0x1
585: 57 push %edi
586: ff 75 08 pushl 0x8(%ebp)
589: e8 05 fe ff ff call 393 <write>
putc(fd, c);
} else {
// Unknown % sequence. Print it to draw attention.
putc(fd, '%');
putc(fd, c);
58e: 88 5d e7 mov %bl,-0x19(%ebp)
write(fd, &c, 1);
591: 83 c4 0c add $0xc,%esp
594: 6a 01 push $0x1
596: 83 c6 01 add $0x1,%esi
599: 57 push %edi
59a: ff 75 08 pushl 0x8(%ebp)
59d: e8 f1 fd ff ff call 393 <write>
for(i = 0; fmt[i]; i++){
5a2: 0f b6 5e ff movzbl -0x1(%esi),%ebx
putc(fd, c);
5a6: 83 c4 10 add $0x10,%esp
}
state = 0;
5a9: 31 d2 xor %edx,%edx
for(i = 0; fmt[i]; i++){
5ab: 84 db test %bl,%bl
5ad: 75 8f jne 53e <printf+0x5e>
}
}
}
5af: 8d 65 f4 lea -0xc(%ebp),%esp
5b2: 5b pop %ebx
5b3: 5e pop %esi
5b4: 5f pop %edi
5b5: 5d pop %ebp
5b6: c3 ret
5b7: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
5be: 66 90 xchg %ax,%ax
printint(fd, *ap, 16, 0);
5c0: 83 ec 0c sub $0xc,%esp
5c3: b9 10 00 00 00 mov $0x10,%ecx
5c8: 6a 00 push $0x0
5ca: 8b 5d d0 mov -0x30(%ebp),%ebx
5cd: 8b 45 08 mov 0x8(%ebp),%eax
5d0: 8b 13 mov (%ebx),%edx
5d2: e8 59 fe ff ff call 430 <printint>
ap++;
5d7: 89 d8 mov %ebx,%eax
5d9: 83 c4 10 add $0x10,%esp
state = 0;
5dc: 31 d2 xor %edx,%edx
ap++;
5de: 83 c0 04 add $0x4,%eax
5e1: 89 45 d0 mov %eax,-0x30(%ebp)
5e4: e9 4b ff ff ff jmp 534 <printf+0x54>
5e9: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
printint(fd, *ap, 10, 1);
5f0: 83 ec 0c sub $0xc,%esp
5f3: b9 0a 00 00 00 mov $0xa,%ecx
5f8: 6a 01 push $0x1
5fa: eb ce jmp 5ca <printf+0xea>
5fc: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
putc(fd, *ap);
600: 8b 5d d0 mov -0x30(%ebp),%ebx
write(fd, &c, 1);
603: 83 ec 04 sub $0x4,%esp
putc(fd, *ap);
606: 8b 03 mov (%ebx),%eax
write(fd, &c, 1);
608: 6a 01 push $0x1
ap++;
60a: 83 c3 04 add $0x4,%ebx
write(fd, &c, 1);
60d: 57 push %edi
60e: ff 75 08 pushl 0x8(%ebp)
putc(fd, *ap);
611: 88 45 e7 mov %al,-0x19(%ebp)
write(fd, &c, 1);
614: e8 7a fd ff ff call 393 <write>
ap++;
619: 89 5d d0 mov %ebx,-0x30(%ebp)
61c: 83 c4 10 add $0x10,%esp
state = 0;
61f: 31 d2 xor %edx,%edx
621: e9 0e ff ff ff jmp 534 <printf+0x54>
626: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
62d: 8d 76 00 lea 0x0(%esi),%esi
putc(fd, c);
630: 88 5d e7 mov %bl,-0x19(%ebp)
write(fd, &c, 1);
633: 83 ec 04 sub $0x4,%esp
636: e9 59 ff ff ff jmp 594 <printf+0xb4>
63b: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
63f: 90 nop
s = (char*)*ap;
640: 8b 45 d0 mov -0x30(%ebp),%eax
643: 8b 18 mov (%eax),%ebx
ap++;
645: 83 c0 04 add $0x4,%eax
648: 89 45 d0 mov %eax,-0x30(%ebp)
if(s == 0)
64b: 85 db test %ebx,%ebx
64d: 74 17 je 666 <printf+0x186>
while(*s != 0){
64f: 0f b6 03 movzbl (%ebx),%eax
state = 0;
652: 31 d2 xor %edx,%edx
while(*s != 0){
654: 84 c0 test %al,%al
656: 0f 84 d8 fe ff ff je 534 <printf+0x54>
65c: 89 75 d4 mov %esi,-0x2c(%ebp)
65f: 89 de mov %ebx,%esi
661: 8b 5d 08 mov 0x8(%ebp),%ebx
664: eb 1a jmp 680 <printf+0x1a0>
s = "(null)";
666: bb 80 08 00 00 mov $0x880,%ebx
while(*s != 0){
66b: 89 75 d4 mov %esi,-0x2c(%ebp)
66e: b8 28 00 00 00 mov $0x28,%eax
673: 89 de mov %ebx,%esi
675: 8b 5d 08 mov 0x8(%ebp),%ebx
678: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
67f: 90 nop
write(fd, &c, 1);
680: 83 ec 04 sub $0x4,%esp
s++;
683: 83 c6 01 add $0x1,%esi
686: 88 45 e7 mov %al,-0x19(%ebp)
write(fd, &c, 1);
689: 6a 01 push $0x1
68b: 57 push %edi
68c: 53 push %ebx
68d: e8 01 fd ff ff call 393 <write>
while(*s != 0){
692: 0f b6 06 movzbl (%esi),%eax
695: 83 c4 10 add $0x10,%esp
698: 84 c0 test %al,%al
69a: 75 e4 jne 680 <printf+0x1a0>
69c: 8b 75 d4 mov -0x2c(%ebp),%esi
state = 0;
69f: 31 d2 xor %edx,%edx
6a1: e9 8e fe ff ff jmp 534 <printf+0x54>
6a6: 66 90 xchg %ax,%ax
6a8: 66 90 xchg %ax,%ax
6aa: 66 90 xchg %ax,%ax
6ac: 66 90 xchg %ax,%ax
6ae: 66 90 xchg %ax,%ax
000006b0 <free>:
static Header base;
static Header *freep;
void
free(void *ap)
{
6b0: f3 0f 1e fb endbr32
6b4: 55 push %ebp
Header *bp, *p;
bp = (Header*)ap - 1;
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
6b5: a1 80 0b 00 00 mov 0xb80,%eax
{
6ba: 89 e5 mov %esp,%ebp
6bc: 57 push %edi
6bd: 56 push %esi
6be: 53 push %ebx
6bf: 8b 5d 08 mov 0x8(%ebp),%ebx
6c2: 8b 10 mov (%eax),%edx
bp = (Header*)ap - 1;
6c4: 8d 4b f8 lea -0x8(%ebx),%ecx
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
6c7: 39 c8 cmp %ecx,%eax
6c9: 73 15 jae 6e0 <free+0x30>
6cb: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
6cf: 90 nop
6d0: 39 d1 cmp %edx,%ecx
6d2: 72 14 jb 6e8 <free+0x38>
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
6d4: 39 d0 cmp %edx,%eax
6d6: 73 10 jae 6e8 <free+0x38>
{
6d8: 89 d0 mov %edx,%eax
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
6da: 8b 10 mov (%eax),%edx
6dc: 39 c8 cmp %ecx,%eax
6de: 72 f0 jb 6d0 <free+0x20>
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
6e0: 39 d0 cmp %edx,%eax
6e2: 72 f4 jb 6d8 <free+0x28>
6e4: 39 d1 cmp %edx,%ecx
6e6: 73 f0 jae 6d8 <free+0x28>
break;
if(bp + bp->s.size == p->s.ptr){
6e8: 8b 73 fc mov -0x4(%ebx),%esi
6eb: 8d 3c f1 lea (%ecx,%esi,8),%edi
6ee: 39 fa cmp %edi,%edx
6f0: 74 1e je 710 <free+0x60>
bp->s.size += p->s.ptr->s.size;
bp->s.ptr = p->s.ptr->s.ptr;
} else
bp->s.ptr = p->s.ptr;
6f2: 89 53 f8 mov %edx,-0x8(%ebx)
if(p + p->s.size == bp){
6f5: 8b 50 04 mov 0x4(%eax),%edx
6f8: 8d 34 d0 lea (%eax,%edx,8),%esi
6fb: 39 f1 cmp %esi,%ecx
6fd: 74 28 je 727 <free+0x77>
p->s.size += bp->s.size;
p->s.ptr = bp->s.ptr;
} else
p->s.ptr = bp;
6ff: 89 08 mov %ecx,(%eax)
freep = p;
}
701: 5b pop %ebx
freep = p;
702: a3 80 0b 00 00 mov %eax,0xb80
}
707: 5e pop %esi
708: 5f pop %edi
709: 5d pop %ebp
70a: c3 ret
70b: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
70f: 90 nop
bp->s.size += p->s.ptr->s.size;
710: 03 72 04 add 0x4(%edx),%esi
713: 89 73 fc mov %esi,-0x4(%ebx)
bp->s.ptr = p->s.ptr->s.ptr;
716: 8b 10 mov (%eax),%edx
718: 8b 12 mov (%edx),%edx
71a: 89 53 f8 mov %edx,-0x8(%ebx)
if(p + p->s.size == bp){
71d: 8b 50 04 mov 0x4(%eax),%edx
720: 8d 34 d0 lea (%eax,%edx,8),%esi
723: 39 f1 cmp %esi,%ecx
725: 75 d8 jne 6ff <free+0x4f>
p->s.size += bp->s.size;
727: 03 53 fc add -0x4(%ebx),%edx
freep = p;
72a: a3 80 0b 00 00 mov %eax,0xb80
p->s.size += bp->s.size;
72f: 89 50 04 mov %edx,0x4(%eax)
p->s.ptr = bp->s.ptr;
732: 8b 53 f8 mov -0x8(%ebx),%edx
735: 89 10 mov %edx,(%eax)
}
737: 5b pop %ebx
738: 5e pop %esi
739: 5f pop %edi
73a: 5d pop %ebp
73b: c3 ret
73c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
00000740 <malloc>:
return freep;
}
void*
malloc(uint nbytes)
{
740: f3 0f 1e fb endbr32
744: 55 push %ebp
745: 89 e5 mov %esp,%ebp
747: 57 push %edi
748: 56 push %esi
749: 53 push %ebx
74a: 83 ec 1c sub $0x1c,%esp
Header *p, *prevp;
uint nunits;
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
74d: 8b 45 08 mov 0x8(%ebp),%eax
if((prevp = freep) == 0){
750: 8b 3d 80 0b 00 00 mov 0xb80,%edi
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
756: 8d 70 07 lea 0x7(%eax),%esi
759: c1 ee 03 shr $0x3,%esi
75c: 83 c6 01 add $0x1,%esi
if((prevp = freep) == 0){
75f: 85 ff test %edi,%edi
761: 0f 84 a9 00 00 00 je 810 <malloc+0xd0>
base.s.ptr = freep = prevp = &base;
base.s.size = 0;
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
767: 8b 07 mov (%edi),%eax
if(p->s.size >= nunits){
769: 8b 48 04 mov 0x4(%eax),%ecx
76c: 39 f1 cmp %esi,%ecx
76e: 73 6d jae 7dd <malloc+0x9d>
770: 81 fe 00 10 00 00 cmp $0x1000,%esi
776: bb 00 10 00 00 mov $0x1000,%ebx
77b: 0f 43 de cmovae %esi,%ebx
p = sbrk(nu * sizeof(Header));
77e: 8d 0c dd 00 00 00 00 lea 0x0(,%ebx,8),%ecx
785: 89 4d e4 mov %ecx,-0x1c(%ebp)
788: eb 17 jmp 7a1 <malloc+0x61>
78a: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
790: 8b 10 mov (%eax),%edx
if(p->s.size >= nunits){
792: 8b 4a 04 mov 0x4(%edx),%ecx
795: 39 f1 cmp %esi,%ecx
797: 73 4f jae 7e8 <malloc+0xa8>
799: 8b 3d 80 0b 00 00 mov 0xb80,%edi
79f: 89 d0 mov %edx,%eax
p->s.size = nunits;
}
freep = prevp;
return (void*)(p + 1);
}
if(p == freep)
7a1: 39 c7 cmp %eax,%edi
7a3: 75 eb jne 790 <malloc+0x50>
p = sbrk(nu * sizeof(Header));
7a5: 83 ec 0c sub $0xc,%esp
7a8: ff 75 e4 pushl -0x1c(%ebp)
7ab: e8 4b fc ff ff call 3fb <sbrk>
if(p == (char*)-1)
7b0: 83 c4 10 add $0x10,%esp
7b3: 83 f8 ff cmp $0xffffffff,%eax
7b6: 74 1b je 7d3 <malloc+0x93>
hp->s.size = nu;
7b8: 89 58 04 mov %ebx,0x4(%eax)
free((void*)(hp + 1));
7bb: 83 ec 0c sub $0xc,%esp
7be: 83 c0 08 add $0x8,%eax
7c1: 50 push %eax
7c2: e8 e9 fe ff ff call 6b0 <free>
return freep;
7c7: a1 80 0b 00 00 mov 0xb80,%eax
if((p = morecore(nunits)) == 0)
7cc: 83 c4 10 add $0x10,%esp
7cf: 85 c0 test %eax,%eax
7d1: 75 bd jne 790 <malloc+0x50>
return 0;
}
}
7d3: 8d 65 f4 lea -0xc(%ebp),%esp
return 0;
7d6: 31 c0 xor %eax,%eax
}
7d8: 5b pop %ebx
7d9: 5e pop %esi
7da: 5f pop %edi
7db: 5d pop %ebp
7dc: c3 ret
if(p->s.size >= nunits){
7dd: 89 c2 mov %eax,%edx
7df: 89 f8 mov %edi,%eax
7e1: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
if(p->s.size == nunits)
7e8: 39 ce cmp %ecx,%esi
7ea: 74 54 je 840 <malloc+0x100>
p->s.size -= nunits;
7ec: 29 f1 sub %esi,%ecx
7ee: 89 4a 04 mov %ecx,0x4(%edx)
p += p->s.size;
7f1: 8d 14 ca lea (%edx,%ecx,8),%edx
p->s.size = nunits;
7f4: 89 72 04 mov %esi,0x4(%edx)
freep = prevp;
7f7: a3 80 0b 00 00 mov %eax,0xb80
}
7fc: 8d 65 f4 lea -0xc(%ebp),%esp
return (void*)(p + 1);
7ff: 8d 42 08 lea 0x8(%edx),%eax
}
802: 5b pop %ebx
803: 5e pop %esi
804: 5f pop %edi
805: 5d pop %ebp
806: c3 ret
807: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
80e: 66 90 xchg %ax,%ax
base.s.ptr = freep = prevp = &base;
810: c7 05 80 0b 00 00 84 movl $0xb84,0xb80
817: 0b 00 00
base.s.size = 0;
81a: bf 84 0b 00 00 mov $0xb84,%edi
base.s.ptr = freep = prevp = &base;
81f: c7 05 84 0b 00 00 84 movl $0xb84,0xb84
826: 0b 00 00
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
829: 89 f8 mov %edi,%eax
base.s.size = 0;
82b: c7 05 88 0b 00 00 00 movl $0x0,0xb88
832: 00 00 00
if(p->s.size >= nunits){
835: e9 36 ff ff ff jmp 770 <malloc+0x30>
83a: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
prevp->s.ptr = p->s.ptr;
840: 8b 0a mov (%edx),%ecx
842: 89 08 mov %ecx,(%eax)
844: eb b1 jmp 7f7 <malloc+0xb7>
|
;Talk to ADC (don't forget CS assertion)
;Out in C, In in D
spicomb:
push bc
ld d,0
ld b,8
-:
rl c
ld a,$08
jr nc,+
ld a,$28
+: ; 00D0 1000
ld ($2000),a ; Data out
nop
or $10 ; 00D1 1000
ld ($2000),a ; SCK high
nop
push af
sla d
ld a,($A000) ; Read SO
xor 1
and 1
or d
ld d,a
pop af
and $28 ; 00D0 1000
ld ($2000),a ; SCK low
nop
dec b
jr nz,-
pop bc
ret
;Talk to EEPROM (don't forget CS assertion)
;Out in C, In in D
spicom:
push bc
ld d,0
ld b,8
-:
rl c
ld a,0
jr nc,+
ld a,$20
+: ; 00D0 0000
ld ($2000),a ; Data out
nop
or $10 ; 00D1 0000
ld ($2000),a ; SCK high
nop
push af
sla d
ld a,($A000) ; Read SO
xor 1
and 1
or d
ld d,a
pop af
and $20 ; 00D0 0000
ld ($2000),a ; SCK low
nop
dec b
jr nz,-
pop bc
ret
|
SECTION code_clib
SECTION code_fp_math48
PUBLIC atan2_callee
EXTERN cm48_sccz80_atan2_callee
defc atan2_callee = cm48_sccz80_atan2_callee
|
; A137457: Consider a row of standard dice as a counter. This sequence enumerates the number of changes (one face rotated over an edge to an adjacent face) from n-1 to n.
; 0,1,1,2,1,1,3,1,1,2,1,1,3,1,1,2,1,1,4,1,1,2,1,1,3,1,1,2,1,1,3,1,1,2,1,1,5,1,1,2,1,1,3,1,1,2,1,1,3,1,1,2,1,1,4,1,1,2,1,1,3,1,1,2,1,1,3,1,1,2,1,1,5,1,1,2,1,1,3,1,1,2,1,1,3,1,1,2,1,1,4,1,1,2,1,1,3,1,1,2,1,1,3,1,1
mov $3,$0
mov $5,2
lpb $5,1
clr $0,3
mov $0,$3
sub $5,1
add $0,$5
sub $0,1
lpb $0,1
add $1,$0
div $0,3
add $1,$0
div $0,2
lpe
mov $6,$5
lpb $6,1
mov $4,$1
sub $6,1
lpe
lpe
lpb $3,1
mov $3,0
sub $4,$1
lpe
mov $1,$4
|
; A028878: a(n) = (n+3)^2 - 6.
; 3,10,19,30,43,58,75,94,115,138,163,190,219,250,283,318,355,394,435,478,523,570,619,670,723,778,835,894,955,1018,1083,1150,1219,1290,1363,1438,1515,1594,1675,1758,1843,1930,2019,2110,2203,2298,2395,2494,2595,2698,2803,2910,3019,3130,3243,3358,3475,3594,3715,3838,3963,4090,4219,4350,4483,4618,4755,4894,5035,5178,5323,5470,5619,5770,5923,6078,6235,6394,6555,6718,6883,7050,7219,7390,7563,7738,7915,8094,8275,8458,8643,8830,9019,9210,9403,9598,9795,9994,10195,10398
mov $1,3
add $1,$0
pow $1,2
sub $1,6
mov $0,$1
|
;
; Copy the graphics from screen to the zx printer
; It can be used for any redefined (or not) pseudo-graphics, fonts and characters.
;
; Traps the BREAK key to avoid an unwanted C program termination, etc..
;
; Stefano Bodrato, 2018
;
;
; $Id: zx_hardcopy.asm $
;
SECTION code_clib
PUBLIC zx_hardcopy
PUBLIC _zx_hardcopy
.zx_hardcopy
._zx_hardcopy
; first part of the character set, "battenberg cake" chars
ld hl,0
ld de,acefont
fontloop:
LD A,L
AND $BF
RRCA
RRCA
RRCA
JR NC,skip
RRCA
RRCA
skip:
RRCA
LD B,A
SBC A
RR B
LD B,A
SBC A
XOR B
AND $F0
XOR B
add hl,de
LD (HL),A
sbc hl,de
INC L
JR NZ,fontloop
; needs to be fixed, lowercase chars have some dirt on the top row
LD DE,acefont+1024 ; de-compress the character set from ROM
LD HL,1FFBh
LD BC,0008h
LDDR
EX DE,HL
LD A,5Fh
bitloop:
LD C,07h
BIT 5,A
JR Z,skip2
LD (HL),B
DEC HL
DEC C
skip2:
EX DE,HL
LDDR
EX DE,HL
LD (HL),B
DEC HL
DEC A
JR NZ,bitloop
; ld c,0 ; first UDG chr$ to load
; ld b,64 ; number of characters to load
; ld hl,acefont+768+256
; call loadudg6
; The full character-mapped screen is copied to the ZX-Printer.
; All twenty-four text/graphic lines are printed.
;; COPY
DI
L0869: LD D,24 ; prepare to copy twenty four text lines.
LD HL,$2400 ; set HL to start of display file from D_FILE.
; we are always in FAST mode..
;call zx_fast
PUSH BC ; *** preserve BC throughout.
; a pending character may be present
; in C from LPRINT-CH
;; COPY-LOOP
L087A: PUSH HL ; save first character of line pointer. (*)
XOR A ; clear accumulator.
LD E,A ; set pixel line count, range 0-7, to zero.
; this inner loop deals with each horizontal pixel line.
;; COPY-TIME
L087D: OUT ($FB),A ; bit 2 reset starts the printer motor
; with an inactive stylus - bit 7 reset.
POP HL ; pick up first character of line pointer (*)
; on inner loop.
; row_sync
;.LOOP1
; IN A,($FB) ; GET PRINTER STATUS BYTE
; RLA ; ROTATE BIT 7 (LF BUSY) TO C FLAG
; JR NC,LOOP1 ; LOOP IF LINEFEED IS BUSY
;; COPY-BRK
L0880:
IN A,($FE) ;
RRA ;
jr nc,stop_exit
; ---
;; COPY-CONT
L088A: IN A,($FB) ; read from printer port.
ADD A,A ; test bit 6 and 7
JP M,L08DE ; jump forward with no printer to COPY-END
JR NC,L0880 ; back if stylus not in position to COPY-BRK
PUSH HL ; save first character of line pointer (*)
PUSH DE ; ** preserve character line and pixel line.
LD A,D ; text line count to A?
CP $02 ; sets carry if last line.
SBC A,A ; now $FF if last line else zero.
; now cleverly prepare a printer control mask setting bit 2 (later moved to 1)
; of D to slow printer for the last two pixel lines ( E = 6 and 7)
AND E ; and with pixel line offset 0-7
RLCA ; shift to left.
AND E ; and again.
LD D,A ; store control mask in D.
;; COPY-NEXT
L089C: LD A,(HL) ; load character from screen or buffer.
INC HL ; update pointer for next time.
PUSH HL ; * else preserve the character pointer.
rla ; *2 and shift leftmost bit in carry
ld l,a
ex af,af ; keep carry flag
ld h,0
ld c,d ; save D reg
ld d,h
rl l
rl h ; *4
rl l
rl h ; *8
add hl,de ; current character row
ld a,e ; save E reg
ld de,acefont
add hl,de
ld e,a
ld d,c
ex af,af
SBC A,A ; accumulator now $00 if normal, $FF if inverse, basing on CY status.
XOR (HL) ; combine with bit pattern at end or ROM.
LD C,A ; transfer the byte to C.
LD B,$08 ; count eight bits to output.
;; COPY-BITS
L08B5: LD A,D ; fetch speed control mask from D.
RLC C ; rotate a bit from output byte to carry.
RRA ; pick up in bit 7, speed bit to bit 1
LD H,A ; store aligned mask in H register.
;; COPY-WAIT
L08BA:
IN A,($FB) ; read the printer port
RRA ; test for alignment signal from encoder.
JR NC,L08BA ; loop if not present to COPY-WAIT
LD A,H ; control byte to A.
OUT ($FB),A ; and output to printer port.
DJNZ L08B5 ; loop for all eight bits to COPY-BITS
POP HL ; * restore character pointer.
ld a,31
and l ; test if we are in a new line
JR nz,L089C ; if within 32 columns, back for adjacent character line to COPY-NEXT
; ---
; End of line
;; COPY-N/L
L08C7:
IN A,($FB) ; read the printer port
RRA ; test for alignment signal from encoder.
JR NC,L08C7 ; loop if not present (as in COPY-WAIT)
LD A,D ; transfer speed mask to A.
RRCA ; rotate speed bit to bit 1.
; bit 7, stylus control is reset.
OUT ($FB),A ; set the printer speed.
POP DE ; ** restore character line and pixel line.
INC E ; increment pixel line 0-7.
BIT 3,E ; test if value eight reached.
JR Z,L087D ; back if not to COPY-TIME
; eight pixel lines, a text line have been completed.
POP BC ; lose the now redundant first character
; pointer
DEC D ; decrease text line count.
JR NZ,L087A ; back if not zero to COPY-LOOP
stop_exit:
LD A,$04 ; stop the already slowed printer motor.
OUT ($FB),A ; output to printer port.
;; COPY-END
L08DE:
;call zx_slow
POP BC ; *** restore preserved BC.
EI
RET
acefont:
defs 256
;binary "stdio/ansi/f8.bin"
defs 768
|
; A298008: a(n) = f(n-1,n) + 10*(n-1), where f(a,b) is the number of primes in the range [10*a,10*b].
; 4,14,22,32,43,52,62,73,82,91,104,111,121,133,141,152,162,172,181,194,200,211,223,232,241,252,262,272,282,291,301,313,320,332,342,352,361,372,382,391,402,411,421,433,442,451,463,471,481,492,502,510,522,530,542,551,562,572,581,592,602,613,620,631,643
mov $4,$0
mov $5,$0
mov $7,2
lpb $7,1
mov $0,$5
sub $7,1
add $0,$7
sub $0,1
mul $0,5
add $0,4
cal $0,99801 ; PrimePi(2n+1), the number of primes less than or equal to 2n+1.
add $0,44
mul $0,14
mov $1,$0
sub $1,671
div $1,14
add $1,4
mov $3,$7
lpb $3,1
sub $3,1
mov $6,$1
lpe
lpe
lpb $5,1
mov $5,0
sub $6,$1
lpe
mov $1,$6
mov $2,$4
mul $2,10
add $1,$2
|
; A274072: a(n) = 5^n-(-1)^n.
; 0,6,24,126,624,3126,15624,78126,390624,1953126,9765624,48828126,244140624,1220703126,6103515624,30517578126,152587890624,762939453126,3814697265624,19073486328126,95367431640624,476837158203126,2384185791015624,11920928955078126
mov $1,5
pow $1,$0
add $1,4
div $1,6
mul $1,6
|
/*
The MIT License (MIT)
Copyright (c) 2014 by Jakob Larsson
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the "Software"),
to deal in the Software without restriction, including without limitation the
rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
sell copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR
IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef SAUROBYTE_GAME_HPP
#define SAUROBYTE_GAME_HPP
#include <Saurobyte/EntityPool.hpp>
#include <Saurobyte/SystemPool.hpp>
#include <Saurobyte/ScenePool.hpp>
#include <Saurobyte/MessageCentral.hpp>
#include <Saurobyte/FrameCounter.hpp>
#include <Saurobyte/LuaEnvironment.hpp>
#include <Saurobyte/LuaConfig.hpp>
#include <Saurobyte/Window.hpp>
#include <Saurobyte/ApiDefines.hpp>
#include <Saurobyte/NonCopyable.hpp>
#include <string>
namespace Saurobyte
{
class AudioDevice;
class VideoDevice;
class SAUROBYTE_API Engine : public NonCopyable
{
public:
/**
* Initializes the Engine instance of the Saurobyte engine, of which there may be only one and creates an OpenGL window
* @param title Title of the window
* @param width Width of the window
* @param height Height of the window
* @param windowMode Display mode of the window
*/
explicit Engine(
const std::string &title,
unsigned int width,
unsigned int height,
Window::WindowModes windowMode = Window::Normal);
~Engine();
void start();
void stop();
void setFps(unsigned int fps);
// Creating entities and scenes
Entity& createEntity();
Entity& createEntity(const std::string &templateName);
Scene& createScene(const std::string &name);
// Scene managing
void changeScene(const std::string &sceneName);
Scene* getActiveScene();
// Message sending
void sendMessage(const Message &message);
void sendMessage(const std::string &messageName, Entity *entity = nullptr);
template<typename TType> void sendMessage(const std::string &messageName, TType data, Entity *entity = nullptr)
{
sendMessage(MessageData<TType>(messageName, data, entity));
};
// Running Lua scripts
bool runScript(const std::string &filePath);
/*template<typename TBaseType, typename TRealType = TBaseType> void exposeComponentToLua()
{
auto func = [] (lua_State *state) -> int
{
// First argument is self
Entity *ent = LuaEnvironment::convertUserdata<Entity>(state, 1, "jl.Entity");
// All other args are optional parameters to constructor
ent->addComponent<TBaseType>(new TRealType(state));
return 0;
};
std::string funcName = "Add";
lua_State *state = m_luaEnvironment.getRaw();
// Grab component name
TRealType tempComp = TRealType(state); // This doesn't have the args pushed, won't work
funcName += tempComp.getName();
const luaL_Reg funcs[] =
{
{ funcName.c_str(), func },
{ NULL, NULL }
};
// Grab entity metatable
luaL_getmetatable(state, "jl.Entity");
int metaTable = lua_gettop(state);
luaL_setfuncs(state, funcs, 0);
// Pop metatable value
lua_pop(state, 1);
};*/
unsigned int getFps() const;
float getDelta() const;
EntityPool& getEntityPool();
SystemPool& getSystemPool();
ScenePool& getScenePool();
MessageCentral& getMessageCentral();
Window& getWindow();
LuaEnvironment& getLua();
LuaConfig& getConfig();
private:
EntityPool m_entityPool;
SystemPool m_systemPool;
ScenePool m_scenePool;
FrameCounter m_frameCounter;
std::unique_ptr<AudioDevice> m_audioDevice;
std::unique_ptr<VideoDevice> m_videoDevice;
LuaEnvironment m_luaEnvironment;
LuaConfig m_luaConfig;
MessageCentral m_messageCentral;
/**
* Processes system events and broadcasts a select few as messages.
* @return True if the application shutdown event was not received, false otherwise
*/
bool handleEvents();
// Enforce one Engine instance
static bool m_engineInstanceExists;
};
};
#endif |
; A038057: a(n) = 2^n*n^(n-1).
; 2,8,72,1024,20000,497664,15059072,536870912,22039921152,1024000000000,53119845582848,3043362286338048,190857913323364352,13004222844995895296,956593800000000000000,75557863725914323419136
mov $1,1
add $1,$0
mul $1,2
pow $1,$0
mul $1,2
mov $0,$1
|
; SCCSID = @(#)dprintf.asm 6.3 92/05/05
; $Source: R:/source/driver/raid/RCS/Dprintf.asm,v $
;/***********************************************************************/
;/* */
;/* Driver Name: IBM2SCSI.ADD - Adapter Driver for ABIOS SCB Devices */
;/* --------------------------------------------------- */
;/* */
;/* Source File Name: DPRINTF.ASM */
;/* */
;/* Descriptive Name: Format/Send debug information to COMx: */
;/* */
;/* Function: */
;/* */
;/* */
;/*---------------------------------------------------------------------*/
;/* */
;/* Copyright (C) 1992 IBM Corporation */
;/* */
;/* DISCLAIMER OF WARRANTIES. The following [enclosed] code is */
;/* provided to you solely for the purpose of assisting you in */
;/* the development of your applications. The code is provided */
;/* "AS IS", without warranty of any kind. IBM shall not be liable */
;/* for any damages arising out of your use of this code, even if */
;/* they have been advised of the possibility of such damages. */
;/* */
;/*---------------------------------------------------------------------*/
;/* */
;/* Change Log */
;/* */
;/* Mark Date Programmer Comment */
;/* ---- ---- ---------- ------- */
;/* @nnnn mm/dd/yy NNN */
;/* */
;/* $Log: Dprintf.asm,v $
;/* Revision 1.2 1998/05/29 01:36:55 vitus
;/* - save/restore flags
;/*
;/* Revision 1.1 1998/02/17 23:12:04 vitus
;/* Initial revision
;/***********************************************************************/
;****************************************************************************
;*
;* dprintf - this routine displays information on the debug terminal. it
;* provides limited formatting, which is a subset of c's printf
;* function
;*
;* calling sequence: push selector for insert 'n'
;* push offset for insert 'n'
;* push selector for 'n-1'
;* push offset for 'n-1'
;* ...
;* push selector for second insert
;* push offset for second insert
;* push selector for first insert
;* push offset for first insert
;* push selector raw string
;* push offset for raw string
;* call dprintf
;* add sp,4 + ('n' * 4)
;*
;* for "%w", just push one word containing the data to
;* be displayed. make sure that the "add sp"
;* cleans the stack correctly.
;*
;* for "%z", just the repeat count, then the selector
;* of the area to display, and then the offset.
;* make sure that the "add sp" cleans the stack
;* correctly.
;*
;* formatting: prior to being displayed, the raw string is formatted
;* by scanning it for format control sequences. as each
;* format control sequence is encountered, it is replaced
;* by appropriately formatted text obtained from the
;* corresponding pointer
;*
;* the following format control sequences are supported:
;*
;* %c - the corresponding far ptr points to a byte
;* which replaces the "%c"
;*
;* %u - the corresponding far ptr points to a word
;* which is displayed as an unsigned decimal
;* integer, replacing the "%u"
;*
;* %x - the corresponding far ptr points to a word
;* which is displayed as upper case hex,
;* replacing the "%X"
;*
;* %lx - the corresponding far ptr points to a double
;* word which is displayed as upper case hex,
;* replacing the "%X"
;*
;* %s - the corresponding far ptr points to a null
;* terminated string which is displayed unchanged,
;* replacing the "%s"
;*
;* %p - the corresponding far ptr is displayed as upper
;* case hex in the format "ssss:oooo"
;*
;* %w - the corresponding word is displayed as upper
;* case hex replacing the "%w". note that in this
;* case, only one word is pushed onto the stack
;* for the %w insert
;*
;* %z - using the corresponding repeat count and far
;* pointer, a memory dump is produced. note that
;* in this case the stack contains a repeat count
;* and a far pointer to the area to dump
;*
;* %% - the character "%" is displayed, replacing the
;* "%%"
;*
;*
.286p
COM1_PORT EQU 03f8h
COM2_PORT EQU 02f8h
DEFAULT_PORT EQU COM2_PORT
CAR_RET EQU 0DH
LINE_FEED EQU 0AH
BELL EQU 07H
COM_LSR EQU 05H
COM_DAT EQU 00H
s_frame struc
s_bp dw ? ; callers bp.
s_ptr_delta dw ? ; delta (in bytes) to current pointer
; from first pointer.
s_ret dw ? ; callers ip.
s_string dd ? ; far pointer to raw string.
s_ptrs dd ? ; pointer to first variable.
s_frame ends
;word_10000 dw 10000
;word_1000 dw 1000
;word_100 dw 100
;word_10 dw 10
_TEXT segment word public 'CODE'
assume cs:_TEXT
_dprintf proc near
public _dprintf
push 0 ; zero the delta to current pointer.
push bp ; save our callers bp register.
mov bp,sp ; point to our stack frame.
push ds ; save our callers ds register.
push es ; save our callers es register.
pusha ; save all other caller registers.
pushf
cli
lds si,ss:[bp+s_string] ; point to the raw string.
dprintf_loop: lodsb ; pick up a byte of the string.
or al,al ; is it the end of the string?
jnz dprintf_more ; no, go check for format control.
popf
popa ; restore all other caller registers.
pop es ; restore our callers es register.
pop ds ; restore our callers ds register.
pop bp ; restore our callers bp register.
add sp,2 ; unstack s_ptr_delta.
ret ; return to our caller.
dprintf_more: cmp al,'%' ; no, is it the start of a format
; control sequence?
je dprintf_type ; yes, go see what type of sequence.
jmp dprintf_put_ch ; no, go display character and return.
dprintf_type: lodsb ; pick up a byte of the string.
cmp al,'%' ; is caller trying to display "%"?
jne dprintf_try_c ; no, go see if it is a "c".
mov al,'%' ; yes, go display it
jmp dprintf_put_ch ; and exit.
dprintf_try_c: cmp al,'c' ; is it a string display?
jne dprintf_try_s ; no, go see if it is a "s".
lea bx,[bp]+s_ptrs ; yes, pick up the
add bx,ss:[bp+s_ptr_delta] ; corresponding
les bx,ss:[bx] ; pointer.
add ss:[bp+s_ptr_delta],4 ; move down to next pointer.
mov al,es:[bx] ; pick up a byte.
jmp dprintf_put_ch ; go display character and return.
dprintf_try_s: cmp al,'s' ; is it a string display?
jne dprintf_try_u ; no, go see if it is a "u".
lea bx,[bp]+s_ptrs ; yes, pick up the
add bx,ss:[bp+s_ptr_delta] ; corresponding
les bx,ss:[bx] ; pointer.
add ss:[bp+s_ptr_delta],4 ; move down to next pointer.
dprintf_next_s: mov al,es:[bx] ; pick up a byte.
or al,al ; is it the end of the string?
jz dprintf_loop ; yes, go do next raw string byte.
call put_char ; no, display the character.
inc bx ; move down to the next character
jmp dprintf_next_s ; and go round again.
dprintf_try_u: cmp al,'u' ; is it an unsigned short display?
jne dprintf_try_x ; no, go see if it is a "X".
lea bx,[bp]+s_ptrs ; yes, pick up the
add bx,ss:[bp+s_ptr_delta] ; corresponding
les bx,ss:[bx] ; pointer.
add ss:[bp+s_ptr_delta],4 ; move down to next pointer.
mov ax,es:[bx] ; pick up the word to display.
xor dx,dx ; convert the
mov cx, 10000
div cx ; ten thousands
; div word_10000 ; ten thousands
or al,'0' ; digit and
call put_char ; display it.
mov ax,dx ; convert the
xor dx,dx ; thousands
mov cx, 1000
div cx ; digit
; div word_1000 ; digit
or al,'0' ; and
call put_char ; display it.
mov ax,dx ; convert the
xor dx,dx ; hundreds
mov cx, 100
div cx ; digit
; div word_100 ; digit
or al,'0' ; and
call put_char ; display it.
mov ax,dx ; convert the
xor dx,dx ; tens
mov cx, 10
div cx ; digit
; div word_10 ; digit
or al,'0' ; and
call put_char ; display it.
mov al,dl ; convert the units digit
or al,'0' ; and go display it
jmp dprintf_put_ch ; and return.
dprintf_try_x: cmp al,'x' ; is it an unsigned short hex display?
jne dprintf_try_lx ; no, go see if it is a "lX".
lea bx,[bp]+s_ptrs ; yes, pick up the
add bx,ss:[bp+s_ptr_delta] ; corresponding
les bx,ss:[bx] ; pointer.
add ss:[bp+s_ptr_delta],4 ; move down to next pointer.
call put_hex_word ; convert and display the word.
jmp dprintf_loop ; go do next raw string byte.
dprintf_try_lx: cmp al,'l' ; is it an unsigned long hex display?
jne dprintf_try_p ; no, go see if it is a "p".
lodsb ; maybe, pick up a byte of the string.
cmp al,'x' ; is the second byte correct?
je dprintf_do_lx ; no, go report
jmp dprintf_error ; the error.
dprintf_do_lx: lea bx,[bp]+s_ptrs ; yes, pick up the
add bx,ss:[bp+s_ptr_delta] ; corresponding
les bx,ss:[bx] ; pointer.
add ss:[bp+s_ptr_delta],4 ; move down to next pointer.
add bx,2 ; move down to the second word.
call put_hex_word ; convert and display the second word.
sub bx,2 ; move back to the first word.
call put_hex_word ; convert and display the first word.
jmp dprintf_loop ; go do next raw string byte.
dprintf_try_p: cmp al,'p' ; is it a far pointer display?
jne dprintf_try_w ; no, go see if it is a "w".
lea bx,[bp]+s_ptrs ; yes, pick up the
add bx,ss:[bp+s_ptr_delta] ; corresponding pointer.
add ss:[bp+s_ptr_delta],4 ; move down to next pointer.
push es ; save the callers data selector.
push ss ; set up the proper
pop es ; selector.
add bx,2 ; move down to the second word.
call put_hex_word ; convert and display the selector.
mov al,':' ; display
call put_char ; the ":".
sub bx,2 ; move back to the first word.
call put_hex_word ; convert and display the offset.
;;; mov al,' ' ; display
;;; call put_char ; a couple
;;; mov al,' ' ; of
;;; call put_char ; spaces.
pop es ; recover the callers data selector.
jmp dprintf_loop ; go do next raw string byte.
dprintf_try_w: cmp al,'w' ; is it an immediate word display?
jne dprintf_try_z ; no, go see if it is a "z".
lea bx,[bp]+s_ptrs ; yes, pick up the
add bx,ss:[bp+s_ptr_delta] ; corresponding pointer.
add ss:[bp+s_ptr_delta],2 ; move down to next pointer.
push es ; save the callers data selector.
push ss ; set up the proper
pop es ; selector.
call put_hex_word ; convert and display the word.
pop es ; recover the callers data selector.
jmp dprintf_loop ; go do next raw string byte.
dprintf_try_z: cmp al,'z' ; is it a memory dump display?
je dprintf_do_z ; no, go report
jmp dprintf_error ; the error.
dprintf_do_z:
lea bx,[bp]+s_ptrs ; yes, pick up the
add bx,ss:[bp+s_ptr_delta] ; corresponding pointer.
add ss:[bp+s_ptr_delta],6 ; move down to next pointer.
mov cx,ss:[bx+4] ; pick up the repeat count.
push es ; save the callers data selector.
les bx,ss:[bx] ; point to the area to display.
dprintf_z_a: mov ax,es ; pick up the selector to display.
xchg ah,al ; set up to process the first byte.
call put_left_nib ; display the first byte
call put_right_nib ; of the selector.
xchg ah,al ; set up to process the second byte.
call put_left_nib ; display the second byte
call put_right_nib ; of the selector.
mov al,':' ; display a
call put_char ; colon.
mov ax,bx ; pick up the offset to display.
xchg ah,al ; set up to process the first byte.
call put_left_nib ; display the first byte
call put_right_nib ; of the offset.
xchg ah,al ; set up to process the second byte.
call put_left_nib ; display the second byte
call put_right_nib ; of the offset.
mov al,' ' ; display
call put_char ; two
mov al,' ' ; seperating
call put_char ; spaces.
push cx ; save the repeat count for later.
mov dx,16*3+1 ; initialize the fill count.
cmp cx,16 ; are there more than 16 bytes left?
jbe dprintf_z_b ; yes, limit it to 16 bytes
mov cx,16 ; for this line.
dprintf_z_b: push bx ; save offset and display count
push cx ; for the character display.
dprintf_z_c: mov al,es:[bx] ; pick up a byte to display.
call put_hex_byte ; display it in hex.
mov al,' ' ; set up to display a space.
cmp dx,9*3+1 ; should it be a dash?
jne dprintf_z_e ; no, bypass changing it.
mov al,'-' ; yes, set up to display a dash.
dprintf_z_e: call put_char ; display the dash or space.
sub dx,3 ; down the fill count by one position.
inc bx ; move down to the next byte.
loop dprintf_z_c ; more to do? yes, go round again?
mov cx,dx ; no, pick up remaining fill count.
dprintf_z_g: mov al,' ' ; display a
call put_char ; space.
loop dprintf_z_g ; more to do? yes, go round again.
pop cx ; recover the offset and
pop bx ; display count.
dprintf_z_i: mov al,'.' ; set up to display a dot.
mov ah,es:[bx] ; does the byte
cmp ah,20h ; contain a
jb dprintf_z_k ; valid ascii
cmp ah,7fh ; code?
ja dprintf_z_k ; no, go display the dot.
xchg al,ah ; yes, set up to do byte's contents.
dprintf_z_k: call put_char ; display a dot or the byte contents.
inc bx ; move down to the next byte.
loop dprintf_z_i ; more to do on this line?
; yes, go round again.
pop cx ; no, recover the repeat count.
sub cx,16 ; down the repeat count by one line.
jle dprintf_z_z ; more to do? no, go exit.
mov al,CAR_RET ; perform
call put_char ; a
mov al,LINE_FEED ; new line
call put_char ; operation.
jmp dprintf_z_a ; go round and display another line.
dprintf_z_z: pop es ; recover the callers data selector.
jmp dprintf_loop ; go do next raw string byte.
dprintf_error: mov ah,al ; display
mov al,'?' ; an
call put_char ; eye
mov al,'\' ; catching
call put_char ; "invalid
mov al,ah ; format
call put_char ; control"
mov al,'\' ; message
call put_char ; and
mov al,BELL ; beep.
dprintf_put_ch: call put_char ; display the character.
jmp dprintf_loop ; go process next raw string byte.
_dprintf endp
put_left_nib proc near
push ax ; save the callers ax register.
shr al,4 ; convert the
add al,'0' ; left nibble
cmp al,'9' ; to an ascii
jbe put_left_nib_a ; hex
add al,'A'-'9'-1 ; representation.
put_left_nib_a: call put_char ; display the character.
pop ax ; restore the callers ax register.
ret ; return to our caller.
put_left_nib endp
put_right_nib proc near
push ax ; save the callers ax register.
and al,0fh ; convert the
add al,'0' ; right nibble
cmp al,'9' ; to an
jbe put_rght_nib_a ; ascii hex
add al,'A'-'9'-1 ; representation.
put_rght_nib_a: call put_char ; display the character.
pop ax ; restore the callers ax register.
ret ; return to our caller
put_right_nib endp
put_hex_byte proc near
mov al,es:[bx] ; display the left nibble
call put_left_nib ; in ascii hex.
mov al,es:[bx] ; display the right nibble
call put_right_nib ; in ascii hex.
ret ; return to our caller.
put_hex_byte endp
put_hex_word proc near
inc bx ; set up to process second byte first.
call put_hex_byte ; display the byte in hex.
dec bx ; move back to the first byte.
call put_hex_byte ; display the byte in hex.
ret ; return to our caller.
put_hex_word endp
; public portadr
;portadr dw DEFAULT_PORT ; change config.h to change this.
; use: com2=02f8H, com1=03f8H
IODelay Macro
local a
jmp a
a:
endm
PollC PROC NEAR
; mov dx, cs:PortAdr
mov dx, DEFAULT_PORT
add dx, COM_LSR
in al,dx ; get input status
; IODelay
and al,1 ; is there a char in RECV buffer?
jz plc1 ; no, go return empty
; mov dx, cs:PortAdr
mov dx, DEFAULT_PORT
add dx, COM_DAT
in al,dx ; suck char out of buffer
; IODelay
and al,07fh ; strip off stupid parity crap
plc1: ret
PollC ENDP
;** PUTC - output a single char to COM2 handling ^S
put_char proc near
push dx
push ax
; See if ^S
call PollC ; is there a char at input
jz pc2 ; no, go output our char
cmp al,'S' - 'A' + 1 ; is it ^S?
jnz pc2 ; no, go output our char
; Saw ^S. Wait for and eat next char.
pc1: call PollC ; look for next char
jz pc1 ; no char, go look again
cmp al,'S' - 'A' + 1 ; is it ^S again?
jz pc1 ; yes, go look for something else
;pc2: mov dx, cs:PortAdr
pc2: mov dx, DEFAULT_PORT
add dx, COM_LSR
in al,dx
; IODelay
test al,020h
jz pc2
; ready. crank it out!
; mov dx, cs:PortAdr
mov dx, DEFAULT_PORT
add dx, COM_DAT
pop ax
out dx,al
pop dx ; restore the callers dx register.
ret
put_char endp
_TEXT ends
end
|
; A132118: Triangle read by rows: T(n,k) = n*(n-1)/2 + 2*k - 1.
; 1,2,4,4,6,8,7,9,11,13,11,13,15,17,19,16,18,20,22,24,26,22,24,26,28,30,32,34,29,31,33,35,37,39,41,43,37,39,41,43,45,47,49,51,53,46,48,50,52,54,56,58,60,62,64,56,58,60,62,64,66,68,70,72,74,76,67,69,71,73,75,77,79,81,83,85,87,89,79,81,83,85,87,89,91,93,95,97,99,101,103,92,94,96,98,100,102,104,106,108
mov $1,$0
seq $1,25675 ; Exponent of 8 (value of j) in n-th number of form 7^i*8^j.
add $0,$1
add $0,1
|
SECTION code_clib
SECTION code_fp_math48
PUBLIC am48_dldpush
EXTERN am48_dload
am48_dldpush:
; load double from memory and push onto stack
;
; enter : hl = double *
;
; exit : AC = double x (*hl)
; stack = double x (*hl)
;
; uses : af, bc, de, hl
call am48_dload
exx
pop af
push bc
push de
push hl
push af
ret
|
CeladonMart1F_Object:
db $f ; border block
db 6 ; warps
warp 2, 7, 0, -1
warp 3, 7, 0, -1
warp 16, 7, 1, -1
warp 17, 7, 1, -1
warp 12, 1, 0, CELADON_MART_2F
warp 1, 1, 0, CELADON_MART_ELEVATOR
db 2 ; signs
sign 11, 4, 2 ; CeladonMart1Text2
sign 14, 1, 3 ; CeladonMart1Text3
db 1 ; objects
object SPRITE_CABLE_CLUB_WOMAN, 8, 3, STAY, DOWN, 1 ; person
; warp-to
warp_to 2, 7, CELADON_MART_1F_WIDTH
warp_to 3, 7, CELADON_MART_1F_WIDTH
warp_to 16, 7, CELADON_MART_1F_WIDTH
warp_to 17, 7, CELADON_MART_1F_WIDTH
warp_to 12, 1, CELADON_MART_1F_WIDTH ; CELADON_MART_2F
warp_to 1, 1, CELADON_MART_1F_WIDTH ; CELADON_MART_ELEVATOR
|
; A246298: Numbers k such that sin(k) > sin(k+1) > sin(k+2) < sin(k+3).
; 3,9,15,22,28,34,40,47,53,59,66,72,78,84,91,97,103,110,116,122,128,135,141,147,154,160,166,172,179,185,191,197,204,210,216,223,229,235,241,248,254,260,267,273,279,285,292,298,304,311,317,323,329,336,342,348,355,361,367,373,380,386,392,399,405,411,417,424,430,436,443,449,455,461,468,474,480,487,493,499,505,512,518,524,530,537,543,549,556,562,568,574,581,587,593,600,606,612,618,625,631,637,644,650,656,662,669,675,681,688,694,700,706,713,719,725,732,738,744,750,757,763,769,776,782,788,794,801,807,813,820,826,832,838,845,851,857,864,870,876,882,889,895,901,907,914,920,926,933,939,945,951,958,964,970,977,983,989,995,1002,1008,1014,1021,1027,1033,1039,1046,1052,1058,1065,1071,1077,1083,1090,1096,1102,1109,1115,1121,1127,1134,1140,1146,1153,1159,1165,1171,1178,1184,1190,1197,1203,1209,1215,1222,1228,1234,1240,1247,1253,1259,1266,1272,1278,1284,1291,1297,1303,1310,1316,1322,1328,1335,1341,1347,1354,1360,1366,1372,1379,1385,1391,1398,1404,1410,1416,1423,1429,1435,1442,1448,1454,1460,1467,1473,1479,1486,1492,1498,1504,1511,1517,1523,1530,1536,1542,1548,1555,1561,1567
mul $0,2
add $0,5
cal $0,22853 ; a(n) = integer nearest n*Pi.
mov $1,$0
sub $1,13
|
; A076627: a(n) = tau(n)*(n-tau(n)), where tau(n) = number of divisors of n (A000005).
; 0,0,2,3,6,8,10,16,18,24,18,36,22,40,44,55,30,72,34,84,68,72,42,128,66,88,92,132,54,176,58,156,116,120,124,243,70,136,140,256,78,272,82,228,234,168,90,380,138,264,188,276,102,368,204,384,212,216,114,576,118,232,342,399,244,464,130,372,260,496,138,720,142,280,414,420,292,560,154,700,380,312,162,864,324,328,332,640,174,936,348,516,356,360,364,1008,190,552,558,819,198,752,202,768,776,408,210,1152,214,816,428,1020,222,848,444,660,666,456,460,1664,354,472,476,708,484,1368,250,960,500,976,258,1440,516,520,1016,1024,270,1040,274,1536,548,552,556,1935,564,568,846,852,294,1656,298,1152,882,1168,604,1728,310,616,620,1776,628,1520,322,948,1256,648,330,2432,498,1296,990,996,342,1328,1014,1660,692,696,354,2916,358,1392,716,1408,724,1424,732,1092,1448,1456,378,2492,382,760,1496,1683,390,2232,394,2256,788,792,796,2304,804,808,1206,1980,820,3104,418,1236,836,840,844,3200,852,856,860,2496,868,1712,442,2544,1944,888,450,2592,454,1776,1784,1792,462,2664,924,1380,932,1840,474,4400,478,1416,1422,1428,1434,1904,972,1920,980,1936
mov $1,$0
cal $0,5 ; d(n) (also called tau(n) or sigma_0(n)), the number of divisors of n.
sub $1,$0
mul $1,$0
add $1,$0
|
; A003516: Binomial coefficients C(2n+1, n-2).
; 1,7,36,165,715,3003,12376,50388,203490,817190,3268760,13037895,51895935,206253075,818809200,3247943160,12875774670,51021117810,202112640600,800472431850,3169870830126,12551759587422,49699896548176,196793068630200,779255311989700,3085851035479212,12220888964329584,48402641245296107,191724747789809255,759510004936100355,3009106305270645216,11923179284862717872,47249626017378270486,187265264199657100730,742282223705428145880,2942618815403661578310,11666805764052999699370,46261812817306682205610
mov $1,5
add $1,$0
add $1,$0
bin $1,$0
mov $0,$1
|
; A010848: Number of numbers k <= n such that at least one prime factor of n is not a prime factor of k.
; 0,1,2,2,4,5,6,4,6,9,10,10,12,13,14,8,16,15,18,18,20,21,22,20,20,25,18,26,28,29,30,16,32,33,34,30,36,37,38,36,40,41,42,42,42,45,46,40,42,45,50,50,52,45,54,52,56,57,58,58,60,61,60,32,64,65,66,66,68,69,70,60,72,73,70,74,76,77,78,72,54,81,82,82,84,85,86,84,88,87,90,90,92,93,94,80,96,91,96,90
mov $1,$0
seq $1,336551 ; a(n) = A003557(n) - 1.
sub $0,$1
|
; A002055: Number of diagonal dissections of a convex n-gon into n-4 regions.
; 1,9,56,300,1485,7007,32032,143208,629850,2735810,11767536,50220040,212952285,898198875,3771484800,15775723920,65770848990,273420862110,1133802618000,4691140763400,19371432850770,79850555673174,328627887379776,1350540667070000,5543004766417300,22723084897619652,93050277377527008,380658059963006672,1555799182884517725,6353361469862299795,25924608168485558784,105706992465797827104,430724851665665683126,1753963390039041858950,7138111247139870663120,29033838978649460905992,118031710262302425529990,479600312624989528182210,1947865802833965566552000,7907673094206189192226800,32089197147142920510319020,130166438756761313769629340,527810525607367268545577760,2139459582960455354541558000,8669313540751966356252193650,35117771189420520799159655070,142212354448480362488807868672,575734089730005058103113026528,2330163971876246923739542027500,9428362041984781565087430576300,38139607393424335268781851338656,154244981525483896419180901454544,623655986623072795582903164843396,2521055944061847040145803401228300,10188894576850722248770388723487360,41170153954008844532762648082489312,166322950695988529615126963629822632,671799037920225723483979097778140808
add $0,2
mov $1,$0
mul $0,2
add $1,2
mov $2,$0
bin $0,$1
mul $0,$2
div $0,4
|
#include <Core/Utils/Log.hpp>
#include <Engine/Renderer/RenderTechnique/RenderParameters.hpp>
namespace Ra {
namespace Engine {
void RenderParameters::bind( const ShaderProgram* shader ) const {
m_boolParamsVector.bind( shader );
m_intParamsVector.bind( shader );
m_uintParamsVector.bind( shader );
m_scalarParamsVector.bind( shader );
m_intsParamsVector.bind( shader );
m_uintsParamsVector.bind( shader );
m_scalarsParamsVector.bind( shader );
m_vec2ParamsVector.bind( shader );
m_vec3ParamsVector.bind( shader );
m_vec4ParamsVector.bind( shader );
m_colorParamsVector.bind( shader );
m_mat2ParamsVector.bind( shader );
m_mat3ParamsVector.bind( shader );
m_mat4ParamsVector.bind( shader );
m_texParamsVector.bind( shader );
}
void RenderParameters::addParameter( const std::string& name, bool value ) {
m_boolParamsVector[name] = BoolParameter( name, value );
}
void RenderParameters::addParameter( const std::string& name, int value ) {
m_intParamsVector[name] = IntParameter( name, value );
}
void RenderParameters::addParameter( const std::string& name, uint value ) {
m_uintParamsVector[name] = UIntParameter( name, value );
}
void RenderParameters::addParameter( const std::string& name, Scalar value ) {
m_scalarParamsVector[name] = ScalarParameter( name, value );
}
///!! array version
void RenderParameters::addParameter( const std::string& name, std::vector<int> value ) {
m_intsParamsVector[name] = IntsParameter( name, value );
}
void RenderParameters::addParameter( const std::string& name, std::vector<uint> value ) {
m_uintsParamsVector[name] = UIntsParameter( name, value );
}
void RenderParameters::addParameter( const std::string& name, std::vector<Scalar> value ) {
m_scalarsParamsVector[name] = ScalarsParameter( name, value );
}
///!!
void RenderParameters::addParameter( const std::string& name, const Core::Vector2& value ) {
m_vec2ParamsVector[name] = Vec2Parameter( name, value );
}
void RenderParameters::addParameter( const std::string& name, const Core::Vector3& value ) {
m_vec3ParamsVector[name] = Vec3Parameter( name, value );
}
void RenderParameters::addParameter( const std::string& name, const Core::Vector4& value ) {
m_vec4ParamsVector[name] = Vec4Parameter( name, value );
}
void RenderParameters::addParameter( const std::string& name, const Core::Utils::Color& value ) {
m_colorParamsVector[name] = ColorParameter( name, value );
}
void RenderParameters::addParameter( const std::string& name, const Core::Matrix2& value ) {
m_mat2ParamsVector[name] = Mat2Parameter( name, value );
}
void RenderParameters::addParameter( const std::string& name, const Core::Matrix3& value ) {
m_mat3ParamsVector[name] = Mat3Parameter( name, value );
}
void RenderParameters::addParameter( const std::string& name, const Core::Matrix4& value ) {
m_mat4ParamsVector[name] = Mat4Parameter( name, value );
}
void RenderParameters::addParameter( const std::string& name, Texture* tex, int texUnit ) {
m_texParamsVector[name] = TextureParameter( name, tex, texUnit );
}
void RenderParameters::concatParameters( const RenderParameters& params ) {
for ( const auto& param : params.m_intParamsVector )
{
m_intParamsVector.insert( param );
}
for ( const auto& param : params.m_uintParamsVector )
{
m_uintParamsVector.insert( param );
}
for ( const auto& param : params.m_scalarParamsVector )
{
m_scalarParamsVector.insert( param );
}
for ( const auto& param : params.m_vec2ParamsVector )
{
m_vec2ParamsVector.insert( param );
}
for ( const auto& param : params.m_vec3ParamsVector )
{
m_vec3ParamsVector.insert( param );
}
for ( const auto& param : params.m_vec4ParamsVector )
{
m_vec4ParamsVector.insert( param );
}
for ( const auto& param : params.m_mat2ParamsVector )
{
m_mat2ParamsVector.insert( param );
}
for ( const auto& param : params.m_mat3ParamsVector )
{
m_mat3ParamsVector.insert( param );
}
for ( const auto& param : params.m_mat4ParamsVector )
{
m_mat4ParamsVector.insert( param );
}
for ( const auto& param : params.m_texParamsVector )
{
m_texParamsVector.insert( param );
}
}
} // namespace Engine
} // namespace Ra
|
db 0 ; species ID placeholder
db 130, 85, 80, 60, 85, 95
; hp atk def spd sat sdf
db WATER, ICE ; type
db 45 ; catch rate
db 219 ; base exp
db NO_ITEM, NO_ITEM ; items
db GENDER_F50 ; gender ratio
db 100 ; unknown 1
db 40 ; step cycles to hatch
db 5 ; unknown 2
INCBIN "gfx/pokemon/lapras/front.dimensions"
db 0, 0, 0, 0 ; padding
db GROWTH_SLOW ; growth rate
dn EGG_MONSTER, EGG_WATER_1 ; egg groups
; tm/hm learnset
tmhm HEADBUTT, CURSE, TOXIC, ZAP_CANNON, ROCK_SMASH, HIDDEN_POWER, SNORE, BLIZZARD, HYPER_BEAM, ICY_WIND, PROTECT, RAIN_DANCE, ENDURE, FRUSTRATION, IRON_TAIL, DRAGONBREATH, THUNDER, RETURN, PSYCHIC_M, DOUBLE_TEAM, SWAGGER, SLEEP_TALK, DREAM_EATER, REST, ATTRACT, NIGHTMARE, SURF, STRENGTH, WHIRLPOOL, THUNDERBOLT, ICE_BEAM
; end
|
/*
* Copyright 2021 Google LLC
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "cases/batch_op_fixture.h"
#include <algorithm>
#include <cstdint>
#include <functional>
#include <thread> // NOLINT
#include "glog/logging.h"
#include "absl/status/status.h"
#include "absl/synchronization/barrier.h"
#include "infiniband/verbs.h"
#include "public/status_matchers.h"
#include "public/verbs_util.h"
namespace rdma_unit_test {
absl::StatusOr<BatchOpFixture::BasicSetup> BatchOpFixture::CreateBasicSetup() {
BasicSetup setup;
setup.src_memblock = ibv_.AllocAlignedBufferByBytes(kBufferSize);
std::fill_n(setup.src_memblock.data(), setup.src_memblock.size(),
kSrcContent);
setup.dst_memblock = ibv_.AllocAlignedBufferByBytes(kBufferSize);
std::fill_n(setup.dst_memblock.data(), setup.dst_memblock.size(),
kDstContent);
ASSIGN_OR_RETURN(setup.context, ibv_.OpenDevice());
setup.port_gid = ibv_.GetLocalPortGid(setup.context);
setup.pd = ibv_.AllocPd(setup.context);
if (!setup.pd) {
return absl::InternalError("Failed to allocate pd.");
}
setup.src_mr = ibv_.RegMr(setup.pd, setup.src_memblock);
if (!setup.src_mr) {
return absl::InternalError("Failed to register source mr.");
}
memset(setup.dst_memblock.data(), 0, setup.dst_memblock.size());
setup.dst_mr = ibv_.RegMr(setup.pd, setup.dst_memblock);
if (!setup.dst_mr) {
return absl::InternalError("Failed to register destination mr.");
}
return setup;
}
int BatchOpFixture::QueueSend(BasicSetup& setup, QpPair& qp) {
return QueueWork(setup, qp, WorkType::kSend);
}
int BatchOpFixture::QueueWrite(BasicSetup& setup, QpPair& qp) {
return QueueWork(setup, qp, WorkType::kWrite);
}
int BatchOpFixture::QueueRecv(BasicSetup& setup, QpPair& qp) {
uint32_t wr_id = qp.next_recv_wr_id++;
DCHECK_LT(wr_id, setup.dst_memblock.size());
auto dst_buffer =
qp.dst_buffer.subspan(wr_id, 1); // use wr_id as index to the buffer.
ibv_sge sge = verbs_util::CreateSge(dst_buffer, setup.dst_mr);
ibv_recv_wr wqe = verbs_util::CreateRecvWr(wr_id, &sge, /*num_sge=*/1);
ibv_recv_wr* bad_wr;
return ibv_post_recv(qp.recv_qp, &wqe, &bad_wr);
}
int BatchOpFixture::QueueWork(BasicSetup& setup, QpPair& qp,
WorkType work_type) {
uint64_t wr_id = qp.next_send_wr_id++;
DCHECK_LT(wr_id, setup.src_memblock.size());
auto src_buffer = setup.src_memblock.subspan(
wr_id, 1); // use wr_id as index to the buffer.
ibv_sge sge = verbs_util::CreateSge(src_buffer, setup.src_mr);
ibv_send_wr wqe;
switch (work_type) {
case WorkType::kSend: {
wqe = verbs_util::CreateSendWr(wr_id, &sge, /*num_sge=*/1);
break;
}
case WorkType::kWrite: {
DCHECK_LT(wr_id, setup.dst_memblock.size());
auto dst_buffer =
qp.dst_buffer.subspan(wr_id, 1); // use wr_id as index to the buffer.
wqe = verbs_util::CreateWriteWr(wr_id, &sge, /*num_sge=*/1,
dst_buffer.data(), setup.dst_mr->rkey);
break;
}
}
ibv_send_wr* bad_wr;
return ibv_post_send(qp.send_qp, &wqe, &bad_wr);
}
std::vector<BatchOpFixture::QpPair> BatchOpFixture::CreateTestQpPairs(
BasicSetup& setup, ibv_cq* send_cq, ibv_cq* recv_cq, size_t max_qp_wr,
int count) {
DCHECK_LE(max_qp_wr * count, setup.dst_memblock.size())
<< "Not enough space on destination buffer for all QPs.";
std::vector<QpPair> qp_pairs;
for (int i = 0; i < count; ++i) {
QpPair qp_pair;
qp_pair.send_qp = ibv_.CreateQp(setup.pd, send_cq, recv_cq, nullptr,
max_qp_wr, max_qp_wr, IBV_QPT_RC,
/*sig_all=*/0);
DCHECK(qp_pair.send_qp) << "Failed to create send qp - " << errno;
qp_pair.recv_qp = ibv_.CreateQp(setup.pd, send_cq, recv_cq, nullptr,
max_qp_wr, max_qp_wr, IBV_QPT_RC,
/*sig_all=*/0);
DCHECK(qp_pair.recv_qp) << "Failed to create recv qp - " << errno;
ibv_.SetUpLoopbackRcQps(qp_pair.send_qp, qp_pair.recv_qp, setup.port_gid);
qp_pair.dst_buffer = setup.dst_memblock.subspan(i * max_qp_wr, max_qp_wr);
qp_pairs.push_back(qp_pair);
}
return qp_pairs;
}
void BatchOpFixture::ThreadedSubmission(std::vector<QpPair> qp_pairs,
int times_per_pair,
std::function<void(QpPair&)> work) {
std::vector<std::thread> threads;
absl::Barrier wait_barrier(qp_pairs.size());
threads.reserve(qp_pairs.size());
for (auto& qp_pair : qp_pairs) {
threads.push_back(
std::thread([&qp_pair, times_per_pair, &wait_barrier, work]() {
wait_barrier.Block();
for (int i = 0; i < times_per_pair; ++i) {
work(qp_pair);
}
}));
}
for (auto& thread : threads) {
thread.join();
}
}
} // namespace rdma_unit_test
|
/*
*/
#include<iostream>
#include<vector>
#include<string>
#include<climits>
#include<math.h>
#include<stack>
#include<list>
#include<algorithm>
#include<queue>
#include<map>
#include<set>
#include <iomanip>
#include<utility>
#define int int64_t
#define vi vector<int>
#define vii vector<pair<int,int>>
#define vs vector<string>
#define vc vector<char>
#define vb vector<bool>
#define pb push_back
#define vvi vector<vector<int>>
#define pii pair<int,int>
#define mp make_pair
#define all(x) (x).begin(), (x).end()
#define vin(x,v) for(auto &x:v)cin>>x;
#define vout(x,v)for(auto x:v)cout<<x<<" ";
#define MEM(a, b) memset(a, (b), sizeof(a))
#define loop(i, j, k) for (int i=j ; i<k ; i+=1)
#define rloop(i, j, k) for (int i=j ; i>=k ; i-=1)
#define rep(i, j) loop(i, 0, j)
#define rrep(i, j) rloop(i, j, 0)
#define MP make_pair
#define endl "\n"
#define INF (int)1e18
#define EPS 1e-18
#define PI 3.1415926535897932384626433832795
#define MOD 1000000007
//cout <<setprecision(15)
#define NEED_FOR_SPEED_MOST_WANTED ios_base::sync_with_stdio(false);cin.tie(NULL)
using namespace std;
/*-----------------------------------D-E-B-U-G-----------------------------------------------*/
#ifndef ONLINE_JUDGE
#define deb(x) \
cerr << #x << " "; \
_print(x); \
cerr << endl;
#else
#define deb(x)
#endif
void _print(int32_t t){ cerr<<t;}
void _print(int t) { cerr << t; }
void _print(string t) { cerr << t; }
void _print(char t) { cerr << t; }
void _print(long double t) { cerr << t; }
void _print(double t) { cerr << t; }
void _print(unsigned long long t) { cerr << t; }
template <class T, class V>
void _print(pair<T, V> p);
template <class T>
void _print(vector<T> v);
template <class T>
void _print(set<T> v);
template <class T, class V>
void _print(map<T, V> v);
template <class T>
void _print(multiset<T> v);
template <class T, class V>
void _print(pair<T, V> p)
{
cerr << "{";
_print(p.first);
cerr << ",";
_print(p.second);
cerr << "}";
}
template <class T>
void _print(vector<T> v)
{
cerr << "[ ";
for (T i : v)
{
_print(i);
cerr << " ";
}
cerr << "]";
}
template <class T>
void _print(set<T> v)
{
cerr << "[ ";
for (T i : v)
{
_print(i);
cerr << " ";
}
cerr << "]";
}
template <class T>
void _print(multiset<T> v)
{
cerr << "[ ";
for (T i : v)
{
_print(i);
cerr << " ";
}
cerr << "]";
}
template <class T, class V>
void _print(map<T, V> v)
{
cerr << "[ ";
for (auto i : v)
{
_print(i);
cerr << " ";
}
cerr << "]";
}
/*-----------------------------------D-E-B-U-G-----------------------------------------------*/
map<int,vi>graph;
map<int,int>val;
vi temp;
void dfs(int u,int parent, int z){
temp.pb(z);
for(auto v:graph[u]){
if(v==parent)continue;
dfs(v,u,z+1);
}
}
void solve(){
int n,k;cin>>n>>k;
vi v;
rep(i,n-1){
int a,b;cin>>a>>b;
graph[a].push_back(b);graph[b].push_back(a);
}
dfs(1,-1,0);
for(auto x:val)v.push_back(x.second);
sort(all(temp),greater<int>());
deb(v);
int ans=0;
rep(i,k)ans+=temp[i];cout<<ans;
}
signed main(){
NEED_FOR_SPEED_MOST_WANTED;
//#ifndef ONLINE_JUDGE
//FOR GETTING INPUT FROM input.txt
//freopen("input.txt", "r", stdin);
//FOR GETTING INPUT FROM input.txt
//freopen("output.txt", "w", stdout);
// #endif
int t=1;
//cin>>t;
while(t--){
solve();
cout<<endl;
}
} |
#pragma once
// This file is generated from the Game's Reflection data
#include <cstdint>
#include <RED4ext/Common.hpp>
#include <RED4ext/REDhash.hpp>
#include <RED4ext/Types/generated/IAreaSettings.hpp>
namespace RED4ext
{
struct DistantLightsAreaSettings : IAreaSettings
{
static constexpr const char* NAME = "DistantLightsAreaSettings";
static constexpr const char* ALIAS = NAME;
float distantLightStartDistance; // 48
float distantLightFadeDistance; // 4C
};
RED4EXT_ASSERT_SIZE(DistantLightsAreaSettings, 0x50);
} // namespace RED4ext
|
;;
; Name: Print Diagonally (schraeg) in x86_64
; Author: Saadat M. Baig, <me@saadat.dev>
;;
; system_consts (x86_64)
%define SYS_WRITE 1
%define SYS_READ 0
; fd consts
%define STDIN 0
%define STDOUT 1
; custom consts
%define NoError 0
%define NEWLINE 10
section .data
; errors
argcError db "Error: Missing or Wrong amounts of args!", NEWLINE
argcErrorlen equ $-argcError
; consts
NewLine db 0x0A
section .bss
bufferSTR resb 255 ; reserve 255 bytes for our buffer
section .text
global _start
_start:
mov r8, 0 ; buffer-iter for our diagonal strings
mov r9, 0 ; kinda strlen
mov r12, 0 ; whitespace iterator
pop r10 ; copy argc into r10
add rsp, 8 ; increment by 8 so rsp points to first arg
cmp r10, 1 ; check if we even have args
je _exitARGC
_argvLoop:
xor r9, r9 ; null strlen each round
xor r8, r8 ; also null the ptr to re-use the buffer!
cmp r10, 1 ; check if we processed all args
je _exit ; if yes, exit
dec r10 ; decrement argc counter by 1
pop r11 ; copy arg into r11
call _parseDiagonally ; parse the char[] with spaces & shit
call _printAgent ; print out the buffer so far
jmp _argvLoop ; loop, null the necessary ptr & go again
_parseDiagonally: ; strip byte by byte & print it | arg is in r11!
cmp [r11], byte 0 ; check if zero terminator exists
je _ret
call _addWhitespaces ; whitespaces loop
inc r9 ; strlen += 1
xor r12, r12 ; zero-out the whitepsace counter so loop can begin over again
mov al, [r11] ; move out a byte
mov byte[bufferSTR+r8], al ; write char to buffer with whitespaces prefixing it
inc r8
mov byte[bufferSTR+r8], 0x0A ; write the newline char at the end!
inc r8
inc r11 ; point to next byte
jmp _parseDiagonally
_addWhitespaces: ; compare against strlen & add as many whitespaces as strlen/ strlen = position in string => needed whitespaces before char
cmp r12, r9 ; check if whitespace counter matches strlen, because it determines how many whitespaces per char
je _ret
mov byte[bufferSTR+r8], 0x20 ; whitespace char
inc r8 ; inrecement buffer pos_ptr
inc r12 ; increment because we added 1 whitespace
jmp _addWhitespaces
_printAgent: ; print our buffer
mov rax, SYS_WRITE
mov rdi, STDOUT
mov rsi, bufferSTR ; buffer
mov rdx, r8 ; buffer_pos_ptr indicates size+1 so we can use it!
syscall
ret ; jumpback to wherever we got called
;; jumpback
_ret:
ret
;; exit because argc is non-matching to our cond
_exitARGC:
mov rax, SYS_WRITE
mov rdi, STDOUT
mov rsi, argcError
mov rdx, argcErrorlen
syscall
jmp _exit
;; exit bruh
_exit:
mov rax, 60
mov rdi, 0
syscall |
/****************************************************************************
*
* Copyright (c) 2020 PX4 Development Team. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name PX4 nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#include "ICM20649.hpp"
using namespace time_literals;
static constexpr int16_t combine(uint8_t msb, uint8_t lsb)
{
return (msb << 8u) | lsb;
}
ICM20649::ICM20649(I2CSPIBusOption bus_option, int bus, uint32_t device, enum Rotation rotation, int bus_frequency,
spi_mode_e spi_mode, spi_drdy_gpio_t drdy_gpio) :
SPI(DRV_IMU_DEVTYPE_ICM20649, MODULE_NAME, bus, device, spi_mode, bus_frequency),
I2CSPIDriver(MODULE_NAME, px4::device_bus_to_wq(get_device_id()), bus_option, bus),
_drdy_gpio(drdy_gpio),
_px4_accel(get_device_id(), ORB_PRIO_HIGH, rotation),
_px4_gyro(get_device_id(), ORB_PRIO_HIGH, rotation)
{
ConfigureSampleRate(_px4_gyro.get_max_rate_hz());
}
ICM20649::~ICM20649()
{
perf_free(_transfer_perf);
perf_free(_bad_register_perf);
perf_free(_bad_transfer_perf);
perf_free(_fifo_empty_perf);
perf_free(_fifo_overflow_perf);
perf_free(_fifo_reset_perf);
perf_free(_drdy_interval_perf);
}
int ICM20649::init()
{
int ret = SPI::init();
if (ret != PX4_OK) {
DEVICE_DEBUG("SPI::init failed (%i)", ret);
return ret;
}
return Reset() ? 0 : -1;
}
bool ICM20649::Reset()
{
_state = STATE::RESET;
ScheduleClear();
ScheduleNow();
return true;
}
void ICM20649::exit_and_cleanup()
{
DataReadyInterruptDisable();
I2CSPIDriverBase::exit_and_cleanup();
}
void ICM20649::print_status()
{
I2CSPIDriverBase::print_status();
PX4_INFO("FIFO empty interval: %d us (%.3f Hz)", _fifo_empty_interval_us,
static_cast<double>(1000000 / _fifo_empty_interval_us));
perf_print_counter(_transfer_perf);
perf_print_counter(_bad_register_perf);
perf_print_counter(_bad_transfer_perf);
perf_print_counter(_fifo_empty_perf);
perf_print_counter(_fifo_overflow_perf);
perf_print_counter(_fifo_reset_perf);
perf_print_counter(_drdy_interval_perf);
_px4_accel.print_status();
_px4_gyro.print_status();
}
int ICM20649::probe()
{
const uint8_t whoami = RegisterRead(Register::BANK_0::WHO_AM_I);
if (whoami != WHOAMI) {
DEVICE_DEBUG("unexpected WHO_AM_I 0x%02x", whoami);
return PX4_ERROR;
}
return PX4_OK;
}
void ICM20649::RunImpl()
{
switch (_state) {
case STATE::RESET:
// PWR_MGMT_1: Device Reset
RegisterWrite(Register::BANK_0::PWR_MGMT_1, PWR_MGMT_1_BIT::DEVICE_RESET);
_reset_timestamp = hrt_absolute_time();
_state = STATE::WAIT_FOR_RESET;
ScheduleDelayed(10_ms);
break;
case STATE::WAIT_FOR_RESET:
// The reset value is 0x00 for all registers other than the registers below
if ((RegisterRead(Register::BANK_0::WHO_AM_I) == WHOAMI)
&& (RegisterRead(Register::BANK_0::PWR_MGMT_1) == 0x41)) {
// if reset succeeded then configure
_state = STATE::CONFIGURE;
ScheduleNow();
} else {
// RESET not complete
if (hrt_elapsed_time(&_reset_timestamp) > 100_ms) {
PX4_DEBUG("Reset failed, retrying");
_state = STATE::RESET;
ScheduleDelayed(100_ms);
} else {
PX4_DEBUG("Reset not complete, check again in 10 ms");
ScheduleDelayed(10_ms);
}
}
break;
case STATE::CONFIGURE:
if (Configure()) {
// if configure succeeded then start reading from FIFO
_state = STATE::FIFO_READ;
if (DataReadyInterruptConfigure()) {
_data_ready_interrupt_enabled = true;
// backup schedule as a watchdog timeout
ScheduleDelayed(10_ms);
} else {
_data_ready_interrupt_enabled = false;
ScheduleOnInterval(_fifo_empty_interval_us, _fifo_empty_interval_us);
}
FIFOReset();
} else {
PX4_DEBUG("Configure failed, retrying");
// try again in 10 ms
ScheduleDelayed(10_ms);
}
break;
case STATE::FIFO_READ: {
hrt_abstime timestamp_sample = 0;
uint8_t samples = 0;
if (_data_ready_interrupt_enabled) {
// re-schedule as watchdog timeout
ScheduleDelayed(10_ms);
// timestamp set in data ready interrupt
if (!_force_fifo_count_check) {
samples = _fifo_read_samples.load();
} else {
const uint16_t fifo_count = FIFOReadCount();
samples = (fifo_count / sizeof(FIFO::DATA) / SAMPLES_PER_TRANSFER) * SAMPLES_PER_TRANSFER; // round down to nearest
}
timestamp_sample = _fifo_watermark_interrupt_timestamp;
}
bool failure = false;
// manually check FIFO count if no samples from DRDY or timestamp looks bogus
if (!_data_ready_interrupt_enabled || (samples == 0)
|| (hrt_elapsed_time(×tamp_sample) > (_fifo_empty_interval_us / 2))) {
// use the time now roughly corresponding with the last sample we'll pull from the FIFO
timestamp_sample = hrt_absolute_time();
const uint16_t fifo_count = FIFOReadCount();
samples = (fifo_count / sizeof(FIFO::DATA) / SAMPLES_PER_TRANSFER) * SAMPLES_PER_TRANSFER; // round down to nearest
}
if (samples > FIFO_MAX_SAMPLES) {
// not technically an overflow, but more samples than we expected or can publish
perf_count(_fifo_overflow_perf);
failure = true;
FIFOReset();
} else if (samples >= SAMPLES_PER_TRANSFER) {
// require at least SAMPLES_PER_TRANSFER (we want at least 1 new accel sample per transfer)
if (!FIFORead(timestamp_sample, samples)) {
failure = true;
_px4_accel.increase_error_count();
_px4_gyro.increase_error_count();
}
} else if (samples == 0) {
failure = true;
perf_count(_fifo_empty_perf);
}
if (failure || hrt_elapsed_time(&_last_config_check_timestamp) > 10_ms) {
// check BANK_0 & BANK_2 registers incrementally
if (RegisterCheck(_register_bank0_cfg[_checked_register_bank0], true)
&& RegisterCheck(_register_bank2_cfg[_checked_register_bank2], true)) {
_last_config_check_timestamp = timestamp_sample;
_checked_register_bank0 = (_checked_register_bank0 + 1) % size_register_bank0_cfg;
_checked_register_bank2 = (_checked_register_bank2 + 1) % size_register_bank2_cfg;
} else {
// register check failed, force reconfigure
PX4_DEBUG("Health check failed, reconfiguring");
_state = STATE::CONFIGURE;
ScheduleNow();
}
} else {
// periodically update temperature (1 Hz)
if (hrt_elapsed_time(&_temperature_update_timestamp) > 1_s) {
UpdateTemperature();
_temperature_update_timestamp = timestamp_sample;
}
}
}
break;
}
}
void ICM20649::ConfigureAccel()
{
const uint8_t ACCEL_FS_SEL = RegisterRead(Register::BANK_2::ACCEL_CONFIG) & (Bit2 | Bit1); // 2:1 ACCEL_FS_SEL[1:0]
switch (ACCEL_FS_SEL) {
case ACCEL_FS_SEL_4G:
_px4_accel.set_scale(CONSTANTS_ONE_G / 8192.f);
_px4_accel.set_range(4.f * CONSTANTS_ONE_G);
break;
case ACCEL_FS_SEL_8G:
_px4_accel.set_scale(CONSTANTS_ONE_G / 4096.f);
_px4_accel.set_range(8.f * CONSTANTS_ONE_G);
break;
case ACCEL_FS_SEL_16G:
_px4_accel.set_scale(CONSTANTS_ONE_G / 2048.f);
_px4_accel.set_range(16.f * CONSTANTS_ONE_G);
break;
case ACCEL_FS_SEL_30G:
_px4_accel.set_scale(CONSTANTS_ONE_G / 1024.f);
_px4_accel.set_range(30.f * CONSTANTS_ONE_G);
break;
}
}
void ICM20649::ConfigureGyro()
{
const uint8_t GYRO_FS_SEL = RegisterRead(Register::BANK_2::GYRO_CONFIG_1) & (Bit2 | Bit1); // 2:1 GYRO_FS_SEL[1:0]
switch (GYRO_FS_SEL) {
case GYRO_FS_SEL_500_DPS:
_px4_gyro.set_scale(math::radians(1.f / 65.5f));
_px4_gyro.set_range(math::radians(500.f));
break;
case GYRO_FS_SEL_1000_DPS:
_px4_gyro.set_scale(math::radians(1.f / 32.8f));
_px4_gyro.set_range(math::radians(1000.f));
break;
case GYRO_FS_SEL_2000_DPS:
_px4_gyro.set_scale(math::radians(1.f / 16.4f));
_px4_gyro.set_range(math::radians(2000.f));
break;
case GYRO_FS_SEL_4000_DPS:
_px4_gyro.set_scale(math::radians(1.f / 8.2f));
_px4_gyro.set_range(math::radians(4000.f));
break;
}
}
void ICM20649::ConfigureSampleRate(int sample_rate)
{
if (sample_rate == 0) {
sample_rate = 1000; // default to ~1 kHz
}
// round down to nearest FIFO sample dt * SAMPLES_PER_TRANSFER
const float min_interval = SAMPLES_PER_TRANSFER * FIFO_SAMPLE_DT;
_fifo_empty_interval_us = math::max(roundf((1e6f / (float)sample_rate) / min_interval) * min_interval, min_interval);
_fifo_gyro_samples = roundf(math::min((float)_fifo_empty_interval_us / (1e6f / GYRO_RATE), (float)FIFO_MAX_SAMPLES));
// recompute FIFO empty interval (us) with actual gyro sample limit
_fifo_empty_interval_us = _fifo_gyro_samples * (1e6f / GYRO_RATE);
_fifo_accel_samples = roundf(math::min(_fifo_empty_interval_us / (1e6f / ACCEL_RATE), (float)FIFO_MAX_SAMPLES));
_px4_accel.set_update_rate(1e6f / _fifo_empty_interval_us);
_px4_gyro.set_update_rate(1e6f / _fifo_empty_interval_us);
}
void ICM20649::SelectRegisterBank(enum REG_BANK_SEL_BIT bank)
{
if (bank != _last_register_bank) {
// select BANK_0
uint8_t cmd_bank_sel[2] {};
cmd_bank_sel[0] = static_cast<uint8_t>(Register::BANK_0::REG_BANK_SEL);
cmd_bank_sel[1] = bank;
transfer(cmd_bank_sel, cmd_bank_sel, sizeof(cmd_bank_sel));
_last_register_bank = bank;
}
}
bool ICM20649::Configure()
{
bool success = true;
for (const auto ® : _register_bank0_cfg) {
if (!RegisterCheck(reg)) {
success = false;
}
}
for (const auto ® : _register_bank2_cfg) {
if (!RegisterCheck(reg)) {
success = false;
}
}
ConfigureAccel();
ConfigureGyro();
return success;
}
int ICM20649::DataReadyInterruptCallback(int irq, void *context, void *arg)
{
static_cast<ICM20649 *>(arg)->DataReady();
return 0;
}
void ICM20649::DataReady()
{
perf_count(_drdy_interval_perf);
if (_data_ready_count.fetch_add(1) >= (_fifo_gyro_samples - 1)) {
_data_ready_count.store(0);
_fifo_watermark_interrupt_timestamp = hrt_absolute_time();
_fifo_read_samples.store(_fifo_gyro_samples);
ScheduleNow();
}
}
bool ICM20649::DataReadyInterruptConfigure()
{
// TODO: enable data ready interrupt
return false;
// if (_drdy_gpio == 0) {
// return false;
// }
// // Setup data ready on falling edge
// return px4_arch_gpiosetevent(_drdy_gpio, false, true, true, &DataReadyInterruptCallback, this) == 0;
}
bool ICM20649::DataReadyInterruptDisable()
{
// TODO: enable data ready interrupt
return false;
// if (_drdy_gpio == 0) {
// return false;
// }
// return px4_arch_gpiosetevent(_drdy_gpio, false, false, false, nullptr, nullptr) == 0;
}
template <typename T>
bool ICM20649::RegisterCheck(const T ®_cfg, bool notify)
{
bool success = true;
const uint8_t reg_value = RegisterRead(reg_cfg.reg);
if (reg_cfg.set_bits && ((reg_value & reg_cfg.set_bits) != reg_cfg.set_bits)) {
PX4_DEBUG("0x%02hhX: 0x%02hhX (0x%02hhX not set)", (uint8_t)reg_cfg.reg, reg_value, reg_cfg.set_bits);
success = false;
}
if (reg_cfg.clear_bits && ((reg_value & reg_cfg.clear_bits) != 0)) {
PX4_DEBUG("0x%02hhX: 0x%02hhX (0x%02hhX not cleared)", (uint8_t)reg_cfg.reg, reg_value, reg_cfg.clear_bits);
success = false;
}
if (!success) {
RegisterSetAndClearBits(reg_cfg.reg, reg_cfg.set_bits, reg_cfg.clear_bits);
if (notify) {
perf_count(_bad_register_perf);
_px4_accel.increase_error_count();
_px4_gyro.increase_error_count();
}
}
return success;
}
template <typename T>
uint8_t ICM20649::RegisterRead(T reg)
{
SelectRegisterBank(reg);
uint8_t cmd[2] {};
cmd[0] = static_cast<uint8_t>(reg) | DIR_READ;
transfer(cmd, cmd, sizeof(cmd));
return cmd[1];
}
template <typename T>
void ICM20649::RegisterWrite(T reg, uint8_t value)
{
SelectRegisterBank(reg);
uint8_t cmd[2] { (uint8_t)reg, value };
transfer(cmd, cmd, sizeof(cmd));
}
template <typename T>
void ICM20649::RegisterSetAndClearBits(T reg, uint8_t setbits, uint8_t clearbits)
{
const uint8_t orig_val = RegisterRead(reg);
uint8_t val = orig_val;
if (setbits) {
val |= setbits;
}
if (clearbits) {
val &= ~clearbits;
}
RegisterWrite(reg, val);
}
uint16_t ICM20649::FIFOReadCount()
{
SelectRegisterBank(REG_BANK_SEL_BIT::USER_BANK_0);
// read FIFO count
uint8_t fifo_count_buf[3] {};
fifo_count_buf[0] = static_cast<uint8_t>(Register::BANK_0::FIFO_COUNTH) | DIR_READ;
if (transfer(fifo_count_buf, fifo_count_buf, sizeof(fifo_count_buf)) != PX4_OK) {
perf_count(_bad_transfer_perf);
return 0;
}
return combine(fifo_count_buf[1], fifo_count_buf[2]);
}
bool ICM20649::FIFORead(const hrt_abstime ×tamp_sample, uint16_t samples)
{
perf_begin(_transfer_perf);
SelectRegisterBank(REG_BANK_SEL_BIT::USER_BANK_0);
FIFOTransferBuffer buffer{};
const size_t transfer_size = math::min(samples * sizeof(FIFO::DATA) + 3, FIFO::SIZE);
if (transfer((uint8_t *)&buffer, (uint8_t *)&buffer, transfer_size) != PX4_OK) {
perf_end(_transfer_perf);
perf_count(_bad_transfer_perf);
return false;
}
perf_end(_transfer_perf);
const uint16_t fifo_count_bytes = combine(buffer.FIFO_COUNTH, buffer.FIFO_COUNTL);
const uint16_t fifo_count_samples = fifo_count_bytes / sizeof(FIFO::DATA);
if (fifo_count_samples == 0) {
perf_count(_fifo_empty_perf);
return false;
}
if (fifo_count_bytes >= FIFO::SIZE) {
perf_count(_fifo_overflow_perf);
FIFOReset();
return false;
}
const uint16_t valid_samples = math::min(samples, fifo_count_samples);
if (fifo_count_samples < samples) {
// force check if there is somehow fewer samples actually in the FIFO (potentially a serious error)
_force_fifo_count_check = true;
} else if (fifo_count_samples >= samples + 2) {
// if we're more than a couple samples behind force FIFO_COUNT check
_force_fifo_count_check = true;
} else {
// skip earlier FIFO_COUNT and trust DRDY count if we're in sync
_force_fifo_count_check = false;
}
if (valid_samples > 0) {
ProcessGyro(timestamp_sample, buffer, valid_samples);
if (ProcessAccel(timestamp_sample, buffer, valid_samples)) {
return true;
}
}
// force FIFO count check if there was any other error
_force_fifo_count_check = true;
return false;
}
void ICM20649::FIFOReset()
{
perf_count(_fifo_reset_perf);
// FIFO_RST: reset FIFO
RegisterSetBits(Register::BANK_0::FIFO_RST, FIFO_RST_BIT::FIFO_RESET);
RegisterClearBits(Register::BANK_0::FIFO_RST, FIFO_RST_BIT::FIFO_RESET);
// reset while FIFO is disabled
_data_ready_count.store(0);
_fifo_watermark_interrupt_timestamp = 0;
_fifo_read_samples.store(0);
}
static bool fifo_accel_equal(const FIFO::DATA &f0, const FIFO::DATA &f1)
{
return (memcmp(&f0.ACCEL_XOUT_H, &f1.ACCEL_XOUT_H, 6) == 0);
}
bool ICM20649::ProcessAccel(const hrt_abstime ×tamp_sample, const FIFOTransferBuffer &buffer,
const uint8_t samples)
{
PX4Accelerometer::FIFOSample accel;
accel.timestamp_sample = timestamp_sample;
accel.dt = _fifo_empty_interval_us / _fifo_accel_samples;
bool bad_data = false;
// accel data is doubled in FIFO, but might be shifted
int accel_first_sample = 1;
if (samples >= 4) {
if (fifo_accel_equal(buffer.f[0], buffer.f[1]) && fifo_accel_equal(buffer.f[2], buffer.f[3])) {
// [A0, A1, A2, A3]
// A0==A1, A2==A3
accel_first_sample = 1;
} else if (fifo_accel_equal(buffer.f[1], buffer.f[2])) {
// [A0, A1, A2, A3]
// A0, A1==A2, A3
accel_first_sample = 0;
} else {
perf_count(_bad_transfer_perf);
bad_data = true;
}
}
int accel_samples = 0;
for (int i = accel_first_sample; i < samples; i = i + 2) {
const FIFO::DATA &fifo_sample = buffer.f[i];
int16_t accel_x = combine(fifo_sample.ACCEL_XOUT_H, fifo_sample.ACCEL_XOUT_L);
int16_t accel_y = combine(fifo_sample.ACCEL_YOUT_H, fifo_sample.ACCEL_YOUT_L);
int16_t accel_z = combine(fifo_sample.ACCEL_ZOUT_H, fifo_sample.ACCEL_ZOUT_L);
// sensor's frame is +x forward, +y left, +z up
// flip y & z to publish right handed with z down (x forward, y right, z down)
accel.x[accel_samples] = accel_x;
accel.y[accel_samples] = (accel_y == INT16_MIN) ? INT16_MAX : -accel_y;
accel.z[accel_samples] = (accel_z == INT16_MIN) ? INT16_MAX : -accel_z;
accel_samples++;
}
accel.samples = accel_samples;
_px4_accel.updateFIFO(accel);
return !bad_data;
}
void ICM20649::ProcessGyro(const hrt_abstime ×tamp_sample, const FIFOTransferBuffer &buffer, const uint8_t samples)
{
PX4Gyroscope::FIFOSample gyro;
gyro.timestamp_sample = timestamp_sample;
gyro.samples = samples;
gyro.dt = _fifo_empty_interval_us / _fifo_gyro_samples;
for (int i = 0; i < samples; i++) {
const FIFO::DATA &fifo_sample = buffer.f[i];
const int16_t gyro_x = combine(fifo_sample.GYRO_XOUT_H, fifo_sample.GYRO_XOUT_L);
const int16_t gyro_y = combine(fifo_sample.GYRO_YOUT_H, fifo_sample.GYRO_YOUT_L);
const int16_t gyro_z = combine(fifo_sample.GYRO_ZOUT_H, fifo_sample.GYRO_ZOUT_L);
// sensor's frame is +x forward, +y left, +z up
// flip y & z to publish right handed with z down (x forward, y right, z down)
gyro.x[i] = gyro_x;
gyro.y[i] = (gyro_y == INT16_MIN) ? INT16_MAX : -gyro_y;
gyro.z[i] = (gyro_z == INT16_MIN) ? INT16_MAX : -gyro_z;
}
_px4_gyro.updateFIFO(gyro);
}
void ICM20649::UpdateTemperature()
{
SelectRegisterBank(REG_BANK_SEL_BIT::USER_BANK_0);
// read current temperature
uint8_t temperature_buf[3] {};
temperature_buf[0] = static_cast<uint8_t>(Register::BANK_0::TEMP_OUT_H) | DIR_READ;
if (transfer(temperature_buf, temperature_buf, sizeof(temperature_buf)) != PX4_OK) {
perf_count(_bad_transfer_perf);
return;
}
const int16_t TEMP_OUT = combine(temperature_buf[1], temperature_buf[2]);
const float TEMP_degC = (TEMP_OUT / TEMPERATURE_SENSITIVITY) + TEMPERATURE_OFFSET;
if (PX4_ISFINITE(TEMP_degC)) {
_px4_accel.set_temperature(TEMP_degC);
_px4_gyro.set_temperature(TEMP_degC);
}
}
|
; BIOS will load this to address 7c00
[org 0x7c00]
mov ah, 0x0e
mov al, [my_character]
int 0x10
my_character:
db 'X'
jmp $
times (510-($-$$)) db 0
db 0x55, 0xaa |
bits 64
default rel
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
segment .rodata
BOARD_HEIGHT equ 28
BOARD_WIDTH equ 45
NEWLINE db 0xd, 0xa, 0
FMT_INT db "%d", 0xd, 0xa, 0
FMT_SHORT db "%hd", 0xd, 0xa, 0
FMT_UINT db "%u", 0xd, 0xa, 0
FMT_CHAR db "%c", 0xd, 0xa, 0
FMT_STRING db "%s", 0xd, 0xa, 0
FMT_TITLE db "Snake in x64 asm", 0
FMT_AUTHOR db "By vladh", 0
FMT_SCORE db "Score: %d", 0
FMT_SPEED db "Speed: %d%%", 0
FMT_LENGTH db "Length: %d", 0
FMT_CONTROLS_MOVEMENT db "WASD to move", 0
FMT_CONTROLS_QUIT db "Q to quit", 0
FMT_GAME db "GAME", 0
FMT_OVER db "OVER", 0
FMT_END_SCORE db "Your score was: %d", 0
FMT_RATING_1 db "Sucks to suck!", 0
FMT_RATING_2 db "A Snake god.", 0
FMT_PRESS_ANY_KEY db "Press any key to exit.", 0
BOARD_ICON_EMPTY db ". ", 0
BOARD_ICON_FRUIT db 0x1b, 0x5b, "91m", "* ", 0x1b, 0x5b, "0m", 0
BOARD_ICON_HEAD db 0x1b, 0x5b, "92m", "O ", 0x1b, 0x5b, "0m", 0
BOARD_ICON_TAIL db 0x1b, 0x5b, "92m", "x ", 0x1b, 0x5b, "0m", 0
SEQ_CLEAR db 0x1b, 0x5b, "2J", 0
SEQ_POS db 0x1b, 0x5b, "%d;%dH", 0
SEQ_BLUE db 0x1b, 0x5b, "94m", 0
SEQ_GREEN db 0x1b, 0x5b, "92m", 0
SEQ_RED db 0x1b, 0x5b, "91m", 0
SEQ_RESET db 0x1b, 0x5b, "0m", 0
SEQ_HIDE_CURSOR db 0x1b, 0x5b, "?25l", 0
SEQ_SHOW_CURSOR db 0x1b, 0x5b, "?25h", 0
SEQ_USE_ALT_BUFFER db 0x1b, 0x5b, "?1049h", 0
SEQ_USE_MAIN_BUFFER db 0x1b, 0x5b, "?1049l", 0
STD_INPUT_HANDLE dq -10
STD_OUTPUT_HANDLE dq -11
INPUT_UP db "w"
INPUT_DOWN db "s"
INPUT_LEFT db "a"
INPUT_RIGHT db "d"
INPUT_QUIT db "q"
VKEY_W equ 0x57
VKEY_A equ 0x41
VKEY_S equ 0x53
VKEY_D equ 0x44
VKEY_Q equ 0x51
DIR_UP equ 1
DIR_DOWN equ 2
DIR_LEFT equ 3
DIR_RIGHT equ 4
KEY_DOWN_VALUE equ 0b1000000000000000
BASE_WAIT_TIME equ 50
MIN_WAIT_TIME equ 5
GAME_OVER_WAIT_TIME equ 2500
SPEED_INCREMENT equ 1
SNAKE_MAX_LENGTH equ 32
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
segment .data
g_std_input_handle dq 0
g_std_output_handle dq 0
g_head_x dq 10
g_head_y dq 10
g_fruit_x dq 10
g_fruit_y dq 5
g_dir dq 4 ; right
g_score dq 0
g_speed dq 0
g_snake_length dq 0
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
segment .text
global main
; HANDLE WINAPI GetStdHandle(
; _In_ DWORD nStdHandle
; );
extern GetStdHandle
; BOOL WINAPI FlushConsoleInputBuffer(
; _In_ HANDLE hConsoleInput
; );
extern FlushConsoleInputBuffer
; VOID WINAPI ExitProcess(
; _In_ UINT uExitCode
; );
extern ExitProcess
; void Sleep(
; DWORD dwMilliseconds
; );
extern Sleep
; BOOL WINAPI SetConsoleMode(
; _In_ HANDLE hConsoleHandle,
; _In_ DWORD dwMode
; );
extern SetConsoleMode
; BOOL WINAPI ReadConsole(
; _In_ HANDLE hConsoleInput,
; _Out_ LPVOID lpBuffer,
; _In_ DWORD nNumberOfCharsToRead,
; _Out_ LPDWORD lpNumberOfCharsRead,
; _In_opt_ LPVOID pInputControl
; );
extern ReadConsoleA
; SHORT GetAsyncKeyState(
; int vKey
; );
extern GetAsyncKeyState
; _Post_equals_last_error_ DWORD GetLastError();
extern GetLastError
extern _CRT_INIT
extern printf
setup_input:
push rbp
mov rbp, rsp
sub rsp, 32
; Use alternate buffer
mov rcx, SEQ_USE_ALT_BUFFER
call printf
; Get the standard input handle
mov rcx, [STD_INPUT_HANDLE] ; nStdHandle
call GetStdHandle
mov [g_std_input_handle], rax
; Get the standard output handle
mov rcx, [STD_OUTPUT_HANDLE] ; nStdHandle
call GetStdHandle
mov [g_std_output_handle], rax
; Set console mode.
; Disable echoing input and other such things, so that we don't print stuff
; out when we're reading characters.
; However, preserve virtual terminal sequences.
mov rcx, [g_std_input_handle]
mov rdx, 0
or rdx, 0x0200 ; ENABLE_VIRTUAL_TERMINAL_INPUT
call SetConsoleMode
mov rcx, [g_std_output_handle]
mov rdx, 0
or rdx, 0x0004 ; ENABLE_VIRTUAL_TERMINAL_PROCESSING
or rdx, 0x0001 ; ENABLE_PROCESSED OUTPUT
or rdx, 0x0008 ; DISABLE_NEWLINE_AUTO_RETURN
call SetConsoleMode
; Hide the cursor
mov rcx, SEQ_HIDE_CURSOR
call printf
mov rsp, rbp
pop rbp
ret
flush_input_buffer:
push rbp
mov rbp, rsp
sub rsp, 32
; Flush buffer so we don't get a bunch of characters printed
; This is apparently bad/deprecated, but do we care? No!
mov rcx, [g_std_input_handle]
call FlushConsoleInputBuffer
mov rsp, rbp
pop rbp
ret
reset_input:
push rbp
mov rbp, rsp
sub rsp, 32
; Switch back to main buffer
mov rcx, SEQ_USE_MAIN_BUFFER
call printf
mov rsp, rbp
pop rbp
ret
clear_screen:
push rbp
mov rbp, rsp
sub rsp, 32
mov rdx, 1
mov r8, 1
mov rcx, SEQ_POS
call printf
mov rcx, SEQ_CLEAR
call printf
mov rsp, rbp
pop rbp
ret
print_board: ; (tail_addr)
; rbp +
.r12_storage equ 16
.r13_storage equ 24
.r14_storage equ 32
; rsp +
.tail_addr equ 32
push rbp
mov rbp, rsp
sub rsp, 32 + 64
mov [rbp + .r12_storage], r12
mov [rbp + .r13_storage], r13
mov [rbp + .r14_storage], r14
mov [rsp + .tail_addr], rcx
; Reset position to 1, 1
mov rdx, 1
mov r8, 1
mov rcx, SEQ_POS
call printf
xor r12, r12
.height_loop:
cmp r12, BOARD_HEIGHT
je .end_height_loop
xor r13, r13
.width_loop:
cmp r13, BOARD_WIDTH
je .end_width_loop
.maybe_print_head:
cmp r13, [g_head_x]
jne .maybe_print_fruit
cmp r12, [g_head_y]
jne .maybe_print_fruit
mov rcx, BOARD_ICON_HEAD
call printf
jmp .end_print
.maybe_print_fruit:
cmp r13, [g_fruit_x]
jne .maybe_print_tail
cmp r12, [g_fruit_y]
jne .maybe_print_tail
mov rcx, BOARD_ICON_FRUIT
call printf
jmp .end_print
.maybe_print_tail:
mov r14, 0
.loop_tail:
cmp r14, [g_snake_length]
je .end_tail_loop
mov rax, r14
xor edx, edx
mov ecx, 16
mul ecx ; [r14 (index)] * 16
add rax, [rsp + .tail_addr]
cmp r13, [rax]
jne .no_tail_match
add rax, 8
cmp r12, [rax]
jne .no_tail_match
mov rcx, BOARD_ICON_TAIL
call printf
jmp .end_print
.no_tail_match:
inc r14
jmp .loop_tail
.end_tail_loop:
.print_empty:
mov rcx, BOARD_ICON_EMPTY
call printf
jmp .end_print
.end_print:
inc r13
jmp .width_loop
.end_width_loop:
mov rcx, NEWLINE
call printf
inc r12
jmp .height_loop
.end_height_loop:
; Get ready to print info
mov rcx, SEQ_BLUE
call printf
; Print title
mov rdx, 1
mov r8, (BOARD_WIDTH * 2) + 2
mov rcx, SEQ_POS
call printf
mov rcx, FMT_TITLE
mov rdx, [g_score]
call printf
; Print author
mov rdx, 2
mov r8, (BOARD_WIDTH * 2) + 2
mov rcx, SEQ_POS
call printf
mov rcx, FMT_AUTHOR
mov rdx, [g_score]
call printf
; Print score
mov rdx, 4
mov r8, (BOARD_WIDTH * 2) + 2
mov rcx, SEQ_POS
call printf
mov rcx, FMT_SCORE
mov rdx, [g_score]
call printf
; Print speed
mov rdx, 5
mov r8, (BOARD_WIDTH * 2) + 2
mov rcx, SEQ_POS
call printf
; Get speed percentage out of the max speed
mov eax, [g_speed]
mov ecx, 100
mul ecx
xor edx, edx
mov ecx, BASE_WAIT_TIME - MIN_WAIT_TIME
div ecx
mov rcx, FMT_SPEED
mov edx, eax
call printf
; Print length
mov rdx, 6
mov r8, (BOARD_WIDTH * 2) + 2
mov rcx, SEQ_POS
call printf
mov rcx, FMT_LENGTH
mov rdx, [g_snake_length]
call printf
; Print controls
mov rdx, 7
mov r8, (BOARD_WIDTH * 2) + 2
mov rcx, SEQ_POS
call printf
mov rcx, FMT_CONTROLS_MOVEMENT
mov rdx, [g_snake_length]
call printf
mov rdx, 8
mov r8, (BOARD_WIDTH * 2) + 2
mov rcx, SEQ_POS
call printf
mov rcx, FMT_CONTROLS_QUIT
mov rdx, [g_snake_length]
call printf
; Clean up
mov rcx, SEQ_RESET
call printf
mov r12, [rbp + .r12_storage]
mov r13, [rbp + .r13_storage]
mov r13, [rbp + .r14_storage]
mov rsp, rbp
pop rbp
ret
reposition_fruit:
rdtsc
xor edx, edx
mov ecx, BOARD_WIDTH
div ecx
mov [g_fruit_x], edx
rdtsc
xor edx, edx
mov ecx, BOARD_HEIGHT
div ecx
mov [g_fruit_y], edx
ret
update_game_data: ; (tail_addr)
mov r8, rcx
; Update snake tail
cmp qword [g_snake_length], 0
je .end_tail_update
; We want to move the tail position from index r9 - 1 to index r9
; The index, r9, is in [0, g_snake_length - 1]
; If r9 == 0, we copy from the head to the first tail position
mov r9, [g_snake_length]
sub r9, 1
; Calculate tail memory address
mov eax, r9d
xor edx, edx
mov ecx, 16
mul ecx
add rax, r8 ; rax = ([g_snake_length] * 16) + tail_addr
.loop_tail:
cmp r9, 0
jne .update_tail_segment
; Update first tail segment (to replace old head)
mov rcx, [g_head_x]
mov [rax], rcx
mov rcx, [g_head_y]
mov [rax + 8], rcx
jmp .end_tail_update
.update_tail_segment:
; Update tail segment
; Move segment n to segment n + 1
; But first, has this tail piece collided with the head?
mov rcx, [g_head_x]
cmp rcx, [rax]
jne .can_update_tail_segment
mov rcx, [g_head_y]
cmp rcx, [rax + 8]
jne .can_update_tail_segment
; Oops, they collided!
jmp .finish_with_game_over
; Ok, we're good, we can move the segment now
.can_update_tail_segment:
mov rcx, [rax - 16]
mov [rax], rcx
mov rcx, [rax - 16 + 8]
mov [rax + 8], rcx
dec r9
sub rax, 16
jmp .loop_tail
.end_tail_update:
; Move snake
cmp byte [g_dir], DIR_UP
jne .check_down
cmp byte [g_head_y], 0
jne .move_up
mov byte [g_head_y], BOARD_HEIGHT - 1
jmp .end_checks
.move_up:
sub byte [g_head_y], 1
jmp .end_checks
.check_down:
cmp byte [g_dir], DIR_DOWN
jne .check_left
cmp byte [g_head_y], BOARD_HEIGHT - 1
jne .move_down
mov byte [g_head_y], 0
jmp .end_checks
.move_down:
add byte [g_head_y], 1
jmp .end_checks
.check_left:
cmp byte [g_dir], DIR_LEFT
jne .check_right
cmp byte [g_head_x], 0
jne .move_left
mov byte [g_head_x], BOARD_WIDTH - 1
jmp .end_checks
.move_left:
sub byte [g_head_x], 1
jmp .end_checks
.check_right:
cmp byte [g_dir], DIR_RIGHT
jne .end_checks
cmp byte [g_head_x], BOARD_WIDTH - 1
jne .move_right
mov byte [g_head_x], 0
jmp .end_checks
.move_right:
add byte [g_head_x], 1
jmp .end_checks
.end_checks:
xor rax, rax
jmp .finish_update
.finish_with_game_over:
mov rax, 1
.finish_update:
ret
check_if_we_ate_and_update_length:
; Check if we ate fruit
mov rdx, [g_head_x]
cmp rdx, [g_fruit_x]
jne .end_eat
mov rdx, [g_head_y]
cmp rdx, [g_fruit_y]
jne .end_eat
inc qword [g_snake_length]
call reposition_fruit
inc qword [g_score]
cmp qword [g_speed], BASE_WAIT_TIME - MIN_WAIT_TIME - SPEED_INCREMENT
jg .end_wait_change
add qword [g_speed], SPEED_INCREMENT
.end_wait_change:
.end_eat:
ret
process_inputs:
push rbp
mov rbp, rsp
sub rsp, 32
; Check keys pressed
mov rcx, VKEY_W
call GetAsyncKeyState
and rax, KEY_DOWN_VALUE
cmp rax, 0
jne .action_up
mov rcx, VKEY_S
call GetAsyncKeyState
and rax, KEY_DOWN_VALUE
cmp rax, 0
jne .action_down
mov rcx, VKEY_A
call GetAsyncKeyState
and rax, KEY_DOWN_VALUE
cmp rax, 0
jne .action_left
mov rcx, VKEY_D
call GetAsyncKeyState
and rax, KEY_DOWN_VALUE
cmp rax, 0
jne .action_right
mov rcx, VKEY_Q
call GetAsyncKeyState
and rax, KEY_DOWN_VALUE
cmp rax, 0
jne .action_quit
jmp .end_input
.action_up:
mov byte [g_dir], 1
jmp .end_input
.action_down:
mov byte [g_dir], 2
jmp .end_input
.action_left:
mov byte [g_dir], 3
jmp .end_input
.action_right:
mov byte [g_dir], 4
jmp .end_input
.action_quit:
mov rax, 1
jmp .return_input
.end_input:
xor rax, rax
.return_input:
mov rsp, rbp
pop rbp
ret
print_game_over:
; rbp +
.scratch1 equ 16
.scratch2 equ 24
; rsp +
.pInputControl equ 32
push rbp
mov rbp, rsp
sub rsp, 64
; Print game over stuff
; NOTE: When we move to BOARD_WIDTH below, keep in mind that our characters
; are 2-wide, so BOARD_WIDTH will be half the effective width.
mov rcx, SEQ_BLUE
call printf
; Print "GAME"
mov rdx, (BOARD_HEIGHT / 2)
mov r8, BOARD_WIDTH - (BOARD_WIDTH / 4)
mov rcx, SEQ_POS
call printf
mov rcx, FMT_GAME
call printf
; Print "OVER"
mov rdx, (BOARD_HEIGHT / 2) + 1
mov r8, BOARD_WIDTH - (BOARD_WIDTH / 4)
mov rcx, SEQ_POS
call printf
mov rcx, FMT_OVER
call printf
; Print score
mov rdx, (BOARD_HEIGHT / 2) + 2
mov r8, BOARD_WIDTH - (BOARD_WIDTH / 4)
mov rcx, SEQ_POS
call printf
mov rcx, FMT_END_SCORE
mov rdx, [g_score]
call printf
; Print rating
mov rdx, (BOARD_HEIGHT / 2) + 3
mov r8, BOARD_WIDTH - (BOARD_WIDTH / 4)
mov rcx, SEQ_POS
call printf
cmp qword [g_score], 10
jge .print_rating_2
mov rcx, FMT_RATING_1
call printf
jmp .end_print_rating
.print_rating_2:
mov rcx, FMT_RATING_2
call printf
jmp .end_print_rating
.end_print_rating:
; Wait for a bit, so we don't accept a keypress right away, because that
; would lead to the user accidentally pressing a key immediately.
mov rcx, GAME_OVER_WAIT_TIME
call Sleep
; Ignore any keys pressed until now
call flush_input_buffer
; Print the "press any key" message
mov rdx, (BOARD_HEIGHT / 2) + 4
mov r8, BOARD_WIDTH - (BOARD_WIDTH / 4)
mov rcx, SEQ_POS
call printf
mov rcx, FMT_PRESS_ANY_KEY
mov rdx, [g_score]
call printf
; We're done printing, reset colors
mov rcx, SEQ_RESET
call printf
; Wait for the user to press something
mov rcx, [g_std_input_handle] ; hConsoleInput
lea rdx, [rbp + .scratch1] ; lpBuffer
mov r8, 1 ; nNumberOfChartsToRead
lea r9, [rbp + .scratch2] ; lpNumberOfCharsToRead
mov byte [rsp + .pInputControl], 0 ; pInputControl
call ReadConsoleA
mov rsp, rbp
pop rbp
ret
main:
push rbp
mov rbp, rsp
sub rsp, 32 + 512
call _CRT_INIT
call clear_screen
call setup_input
call reposition_fruit
.loop:
mov rcx, rsp
add rcx, 32
call update_game_data
cmp rax, 1
je .game_over
mov rcx, rsp
add rcx, 32
call print_board
call check_if_we_ate_and_update_length
call process_inputs
cmp rax, 1
je .end_loop
mov rcx, BASE_WAIT_TIME
sub rcx, [g_speed]
call Sleep
jmp .loop
.end_loop:
jmp .cleanup
.game_over:
call print_game_over
.cleanup:
call flush_input_buffer
call reset_input
jmp .end
.end:
xor rax, rax
mov rsp, rbp
pop rbp
call ExitProcess
|
; A182027: a(n) = number of n-lettered words in the alphabet {1, 2} with as many occurrences of the substring (consecutive subword) [1, 1] as of [2, 2].
; 1,2,2,2,4,6,12,20,40,70,140,252,504,924,1848,3432,6864,12870,25740,48620,97240,184756,369512,705432,1410864,2704156,5408312,10400600,20801200,40116600,80233200,155117520,310235040,601080390,1202160780,2333606220,4667212440,9075135300,18150270600,35345263800
sub $0,2
mov $1,1
mov $3,$0
mov $5,$0
div $5,2
bin $3,$5
mov $4,$3
cmp $4,0
add $3,$4
mov $2,$3
div $5,$3
add $1,$5
mul $2,2
add $1,$2
sub $1,1
mov $0,$1
|
// Mapper 34: BNROM
// TODO: support NINA-001
scope Mapper34: {
Init:
addi sp, 8
sw ra, -8(sp)
// 32K
jal TLB.AllocateVaddr
lui a0, 0x1'0000 >> 16 // align 64K to leave a 32k guard page unmapped
ls_gp(sw a0, mapper34_prgrom_vaddr)
ls_gp(sb a1, mapper34_prgrom_tlb_index)
// 0x8000-0x1'0000
addi t0, a0, -0x8000
la_gp(t1, Write)
lli t2, 0
lli t3, 0x80
-
sw t0, cpu_read_map + 0x80 * 4 (t2)
sw t1, cpu_write_map + 0x80 * 4 (t2)
addi t3, -1
bnez t3,-
addi t2, 4
// Hard wired CHR mapping 0x0000-0x2000 (8K)
ls_gp(lw t0, chrrom_start)
lli t1, 8
lli t2, 0
-
sw t0, ppu_map (t2)
addi t1, -1
bnez t1,-
addi t2, 4
lw ra, -8(sp)
addi sp, -8
// Initially map PRG ROM bank 0, fall through to Write
lli cpu_t0, 0
Write:
sll t0, cpu_t0, 15 // choose from 4 32k PRG ROM banks
ls_gp(lw a1, prgrom_start_phys)
ls_gp(lw a0, mapper34_prgrom_vaddr)
ls_gp(lwu t1, prgrom_mask)
ls_gp(lbu t2, mapper34_prgrom_tlb_index)
and t0, t1
add a1, t0
// tail call
j TLB.Map32K
mtc0 t2, Index
}
begin_bss()
align(4)
mapper34_prgrom_vaddr:; dw 0
mapper34_prgrom_tlb_index:; db 0
align(4)
end_bss()
|
#include <sstream>
#include <iostream>
#include <ydk/entity_util.hpp>
#include "bundle_info.hpp"
#include "generated_entity_lookup.hpp"
#include "Cisco_IOS_XR_ipv4_ma_cfg.hpp"
using namespace ydk;
namespace cisco_ios_xr {
namespace Cisco_IOS_XR_ipv4_ma_cfg {
Ipv4NetworkGlobal::Ipv4NetworkGlobal()
:
source_route{YType::boolean, "source-route"},
reassemble_max_packets{YType::uint32, "reassemble-max-packets"},
reassemble_time_out{YType::uint32, "reassemble-time-out"}
,
unnumbered(std::make_shared<Ipv4NetworkGlobal::Unnumbered>())
, qppb(std::make_shared<Ipv4NetworkGlobal::Qppb>())
{
unnumbered->parent = this;
qppb->parent = this;
yang_name = "ipv4-network-global"; yang_parent_name = "Cisco-IOS-XR-ipv4-ma-cfg"; is_top_level_class = true; has_list_ancestor = false;
}
Ipv4NetworkGlobal::~Ipv4NetworkGlobal()
{
}
bool Ipv4NetworkGlobal::has_data() const
{
if (is_presence_container) return true;
return source_route.is_set
|| reassemble_max_packets.is_set
|| reassemble_time_out.is_set
|| (unnumbered != nullptr && unnumbered->has_data())
|| (qppb != nullptr && qppb->has_data());
}
bool Ipv4NetworkGlobal::has_operation() const
{
return is_set(yfilter)
|| ydk::is_set(source_route.yfilter)
|| ydk::is_set(reassemble_max_packets.yfilter)
|| ydk::is_set(reassemble_time_out.yfilter)
|| (unnumbered != nullptr && unnumbered->has_operation())
|| (qppb != nullptr && qppb->has_operation());
}
std::string Ipv4NetworkGlobal::get_segment_path() const
{
std::ostringstream path_buffer;
path_buffer << "Cisco-IOS-XR-ipv4-ma-cfg:ipv4-network-global";
return path_buffer.str();
}
std::vector<std::pair<std::string, LeafData> > Ipv4NetworkGlobal::get_name_leaf_data() const
{
std::vector<std::pair<std::string, LeafData> > leaf_name_data {};
if (source_route.is_set || is_set(source_route.yfilter)) leaf_name_data.push_back(source_route.get_name_leafdata());
if (reassemble_max_packets.is_set || is_set(reassemble_max_packets.yfilter)) leaf_name_data.push_back(reassemble_max_packets.get_name_leafdata());
if (reassemble_time_out.is_set || is_set(reassemble_time_out.yfilter)) leaf_name_data.push_back(reassemble_time_out.get_name_leafdata());
return leaf_name_data;
}
std::shared_ptr<ydk::Entity> Ipv4NetworkGlobal::get_child_by_name(const std::string & child_yang_name, const std::string & segment_path)
{
if(child_yang_name == "unnumbered")
{
if(unnumbered == nullptr)
{
unnumbered = std::make_shared<Ipv4NetworkGlobal::Unnumbered>();
}
return unnumbered;
}
if(child_yang_name == "qppb")
{
if(qppb == nullptr)
{
qppb = std::make_shared<Ipv4NetworkGlobal::Qppb>();
}
return qppb;
}
return nullptr;
}
std::map<std::string, std::shared_ptr<ydk::Entity>> Ipv4NetworkGlobal::get_children() const
{
std::map<std::string, std::shared_ptr<ydk::Entity>> _children{};
char count_=0;
if(unnumbered != nullptr)
{
_children["unnumbered"] = unnumbered;
}
if(qppb != nullptr)
{
_children["qppb"] = qppb;
}
return _children;
}
void Ipv4NetworkGlobal::set_value(const std::string & value_path, const std::string & value, const std::string & name_space, const std::string & name_space_prefix)
{
if(value_path == "source-route")
{
source_route = value;
source_route.value_namespace = name_space;
source_route.value_namespace_prefix = name_space_prefix;
}
if(value_path == "reassemble-max-packets")
{
reassemble_max_packets = value;
reassemble_max_packets.value_namespace = name_space;
reassemble_max_packets.value_namespace_prefix = name_space_prefix;
}
if(value_path == "reassemble-time-out")
{
reassemble_time_out = value;
reassemble_time_out.value_namespace = name_space;
reassemble_time_out.value_namespace_prefix = name_space_prefix;
}
}
void Ipv4NetworkGlobal::set_filter(const std::string & value_path, YFilter yfilter)
{
if(value_path == "source-route")
{
source_route.yfilter = yfilter;
}
if(value_path == "reassemble-max-packets")
{
reassemble_max_packets.yfilter = yfilter;
}
if(value_path == "reassemble-time-out")
{
reassemble_time_out.yfilter = yfilter;
}
}
std::shared_ptr<ydk::Entity> Ipv4NetworkGlobal::clone_ptr() const
{
return std::make_shared<Ipv4NetworkGlobal>();
}
std::string Ipv4NetworkGlobal::get_bundle_yang_models_location() const
{
return ydk_cisco_ios_xr_models_path;
}
std::string Ipv4NetworkGlobal::get_bundle_name() const
{
return "cisco_ios_xr";
}
augment_capabilities_function Ipv4NetworkGlobal::get_augment_capabilities_function() const
{
return cisco_ios_xr_augment_lookup_tables;
}
std::map<std::pair<std::string, std::string>, std::string> Ipv4NetworkGlobal::get_namespace_identity_lookup() const
{
return cisco_ios_xr_namespace_identity_lookup;
}
bool Ipv4NetworkGlobal::has_leaf_or_child_of_name(const std::string & name) const
{
if(name == "unnumbered" || name == "qppb" || name == "source-route" || name == "reassemble-max-packets" || name == "reassemble-time-out")
return true;
return false;
}
Ipv4NetworkGlobal::Unnumbered::Unnumbered()
:
mpls(std::make_shared<Ipv4NetworkGlobal::Unnumbered::Mpls>())
{
mpls->parent = this;
yang_name = "unnumbered"; yang_parent_name = "ipv4-network-global"; is_top_level_class = false; has_list_ancestor = false;
}
Ipv4NetworkGlobal::Unnumbered::~Unnumbered()
{
}
bool Ipv4NetworkGlobal::Unnumbered::has_data() const
{
if (is_presence_container) return true;
return (mpls != nullptr && mpls->has_data());
}
bool Ipv4NetworkGlobal::Unnumbered::has_operation() const
{
return is_set(yfilter)
|| (mpls != nullptr && mpls->has_operation());
}
std::string Ipv4NetworkGlobal::Unnumbered::get_absolute_path() const
{
std::ostringstream path_buffer;
path_buffer << "Cisco-IOS-XR-ipv4-ma-cfg:ipv4-network-global/" << get_segment_path();
return path_buffer.str();
}
std::string Ipv4NetworkGlobal::Unnumbered::get_segment_path() const
{
std::ostringstream path_buffer;
path_buffer << "unnumbered";
return path_buffer.str();
}
std::vector<std::pair<std::string, LeafData> > Ipv4NetworkGlobal::Unnumbered::get_name_leaf_data() const
{
std::vector<std::pair<std::string, LeafData> > leaf_name_data {};
return leaf_name_data;
}
std::shared_ptr<ydk::Entity> Ipv4NetworkGlobal::Unnumbered::get_child_by_name(const std::string & child_yang_name, const std::string & segment_path)
{
if(child_yang_name == "mpls")
{
if(mpls == nullptr)
{
mpls = std::make_shared<Ipv4NetworkGlobal::Unnumbered::Mpls>();
}
return mpls;
}
return nullptr;
}
std::map<std::string, std::shared_ptr<ydk::Entity>> Ipv4NetworkGlobal::Unnumbered::get_children() const
{
std::map<std::string, std::shared_ptr<ydk::Entity>> _children{};
char count_=0;
if(mpls != nullptr)
{
_children["mpls"] = mpls;
}
return _children;
}
void Ipv4NetworkGlobal::Unnumbered::set_value(const std::string & value_path, const std::string & value, const std::string & name_space, const std::string & name_space_prefix)
{
}
void Ipv4NetworkGlobal::Unnumbered::set_filter(const std::string & value_path, YFilter yfilter)
{
}
bool Ipv4NetworkGlobal::Unnumbered::has_leaf_or_child_of_name(const std::string & name) const
{
if(name == "mpls")
return true;
return false;
}
Ipv4NetworkGlobal::Unnumbered::Mpls::Mpls()
:
te(std::make_shared<Ipv4NetworkGlobal::Unnumbered::Mpls::Te>())
{
te->parent = this;
yang_name = "mpls"; yang_parent_name = "unnumbered"; is_top_level_class = false; has_list_ancestor = false;
}
Ipv4NetworkGlobal::Unnumbered::Mpls::~Mpls()
{
}
bool Ipv4NetworkGlobal::Unnumbered::Mpls::has_data() const
{
if (is_presence_container) return true;
return (te != nullptr && te->has_data());
}
bool Ipv4NetworkGlobal::Unnumbered::Mpls::has_operation() const
{
return is_set(yfilter)
|| (te != nullptr && te->has_operation());
}
std::string Ipv4NetworkGlobal::Unnumbered::Mpls::get_absolute_path() const
{
std::ostringstream path_buffer;
path_buffer << "Cisco-IOS-XR-ipv4-ma-cfg:ipv4-network-global/unnumbered/" << get_segment_path();
return path_buffer.str();
}
std::string Ipv4NetworkGlobal::Unnumbered::Mpls::get_segment_path() const
{
std::ostringstream path_buffer;
path_buffer << "mpls";
return path_buffer.str();
}
std::vector<std::pair<std::string, LeafData> > Ipv4NetworkGlobal::Unnumbered::Mpls::get_name_leaf_data() const
{
std::vector<std::pair<std::string, LeafData> > leaf_name_data {};
return leaf_name_data;
}
std::shared_ptr<ydk::Entity> Ipv4NetworkGlobal::Unnumbered::Mpls::get_child_by_name(const std::string & child_yang_name, const std::string & segment_path)
{
if(child_yang_name == "te")
{
if(te == nullptr)
{
te = std::make_shared<Ipv4NetworkGlobal::Unnumbered::Mpls::Te>();
}
return te;
}
return nullptr;
}
std::map<std::string, std::shared_ptr<ydk::Entity>> Ipv4NetworkGlobal::Unnumbered::Mpls::get_children() const
{
std::map<std::string, std::shared_ptr<ydk::Entity>> _children{};
char count_=0;
if(te != nullptr)
{
_children["te"] = te;
}
return _children;
}
void Ipv4NetworkGlobal::Unnumbered::Mpls::set_value(const std::string & value_path, const std::string & value, const std::string & name_space, const std::string & name_space_prefix)
{
}
void Ipv4NetworkGlobal::Unnumbered::Mpls::set_filter(const std::string & value_path, YFilter yfilter)
{
}
bool Ipv4NetworkGlobal::Unnumbered::Mpls::has_leaf_or_child_of_name(const std::string & name) const
{
if(name == "te")
return true;
return false;
}
Ipv4NetworkGlobal::Unnumbered::Mpls::Te::Te()
:
interface{YType::str, "interface"}
{
yang_name = "te"; yang_parent_name = "mpls"; is_top_level_class = false; has_list_ancestor = false;
}
Ipv4NetworkGlobal::Unnumbered::Mpls::Te::~Te()
{
}
bool Ipv4NetworkGlobal::Unnumbered::Mpls::Te::has_data() const
{
if (is_presence_container) return true;
return interface.is_set;
}
bool Ipv4NetworkGlobal::Unnumbered::Mpls::Te::has_operation() const
{
return is_set(yfilter)
|| ydk::is_set(interface.yfilter);
}
std::string Ipv4NetworkGlobal::Unnumbered::Mpls::Te::get_absolute_path() const
{
std::ostringstream path_buffer;
path_buffer << "Cisco-IOS-XR-ipv4-ma-cfg:ipv4-network-global/unnumbered/mpls/" << get_segment_path();
return path_buffer.str();
}
std::string Ipv4NetworkGlobal::Unnumbered::Mpls::Te::get_segment_path() const
{
std::ostringstream path_buffer;
path_buffer << "te";
return path_buffer.str();
}
std::vector<std::pair<std::string, LeafData> > Ipv4NetworkGlobal::Unnumbered::Mpls::Te::get_name_leaf_data() const
{
std::vector<std::pair<std::string, LeafData> > leaf_name_data {};
if (interface.is_set || is_set(interface.yfilter)) leaf_name_data.push_back(interface.get_name_leafdata());
return leaf_name_data;
}
std::shared_ptr<ydk::Entity> Ipv4NetworkGlobal::Unnumbered::Mpls::Te::get_child_by_name(const std::string & child_yang_name, const std::string & segment_path)
{
return nullptr;
}
std::map<std::string, std::shared_ptr<ydk::Entity>> Ipv4NetworkGlobal::Unnumbered::Mpls::Te::get_children() const
{
std::map<std::string, std::shared_ptr<ydk::Entity>> _children{};
char count_=0;
return _children;
}
void Ipv4NetworkGlobal::Unnumbered::Mpls::Te::set_value(const std::string & value_path, const std::string & value, const std::string & name_space, const std::string & name_space_prefix)
{
if(value_path == "interface")
{
interface = value;
interface.value_namespace = name_space;
interface.value_namespace_prefix = name_space_prefix;
}
}
void Ipv4NetworkGlobal::Unnumbered::Mpls::Te::set_filter(const std::string & value_path, YFilter yfilter)
{
if(value_path == "interface")
{
interface.yfilter = yfilter;
}
}
bool Ipv4NetworkGlobal::Unnumbered::Mpls::Te::has_leaf_or_child_of_name(const std::string & name) const
{
if(name == "interface")
return true;
return false;
}
Ipv4NetworkGlobal::Qppb::Qppb()
:
source{YType::enumeration, "source"},
destination{YType::enumeration, "destination"}
{
yang_name = "qppb"; yang_parent_name = "ipv4-network-global"; is_top_level_class = false; has_list_ancestor = false;
}
Ipv4NetworkGlobal::Qppb::~Qppb()
{
}
bool Ipv4NetworkGlobal::Qppb::has_data() const
{
if (is_presence_container) return true;
return source.is_set
|| destination.is_set;
}
bool Ipv4NetworkGlobal::Qppb::has_operation() const
{
return is_set(yfilter)
|| ydk::is_set(source.yfilter)
|| ydk::is_set(destination.yfilter);
}
std::string Ipv4NetworkGlobal::Qppb::get_absolute_path() const
{
std::ostringstream path_buffer;
path_buffer << "Cisco-IOS-XR-ipv4-ma-cfg:ipv4-network-global/" << get_segment_path();
return path_buffer.str();
}
std::string Ipv4NetworkGlobal::Qppb::get_segment_path() const
{
std::ostringstream path_buffer;
path_buffer << "qppb";
return path_buffer.str();
}
std::vector<std::pair<std::string, LeafData> > Ipv4NetworkGlobal::Qppb::get_name_leaf_data() const
{
std::vector<std::pair<std::string, LeafData> > leaf_name_data {};
if (source.is_set || is_set(source.yfilter)) leaf_name_data.push_back(source.get_name_leafdata());
if (destination.is_set || is_set(destination.yfilter)) leaf_name_data.push_back(destination.get_name_leafdata());
return leaf_name_data;
}
std::shared_ptr<ydk::Entity> Ipv4NetworkGlobal::Qppb::get_child_by_name(const std::string & child_yang_name, const std::string & segment_path)
{
return nullptr;
}
std::map<std::string, std::shared_ptr<ydk::Entity>> Ipv4NetworkGlobal::Qppb::get_children() const
{
std::map<std::string, std::shared_ptr<ydk::Entity>> _children{};
char count_=0;
return _children;
}
void Ipv4NetworkGlobal::Qppb::set_value(const std::string & value_path, const std::string & value, const std::string & name_space, const std::string & name_space_prefix)
{
if(value_path == "source")
{
source = value;
source.value_namespace = name_space;
source.value_namespace_prefix = name_space_prefix;
}
if(value_path == "destination")
{
destination = value;
destination.value_namespace = name_space;
destination.value_namespace_prefix = name_space_prefix;
}
}
void Ipv4NetworkGlobal::Qppb::set_filter(const std::string & value_path, YFilter yfilter)
{
if(value_path == "source")
{
source.yfilter = yfilter;
}
if(value_path == "destination")
{
destination.yfilter = yfilter;
}
}
bool Ipv4NetworkGlobal::Qppb::has_leaf_or_child_of_name(const std::string & name) const
{
if(name == "source" || name == "destination")
return true;
return false;
}
SubscriberPta::SubscriberPta()
:
tcp_mss_adjust{YType::uint32, "tcp-mss-adjust"}
{
yang_name = "subscriber-pta"; yang_parent_name = "Cisco-IOS-XR-ipv4-ma-cfg"; is_top_level_class = true; has_list_ancestor = false;
}
SubscriberPta::~SubscriberPta()
{
}
bool SubscriberPta::has_data() const
{
if (is_presence_container) return true;
return tcp_mss_adjust.is_set;
}
bool SubscriberPta::has_operation() const
{
return is_set(yfilter)
|| ydk::is_set(tcp_mss_adjust.yfilter);
}
std::string SubscriberPta::get_segment_path() const
{
std::ostringstream path_buffer;
path_buffer << "Cisco-IOS-XR-ipv4-ma-cfg:subscriber-pta";
return path_buffer.str();
}
std::vector<std::pair<std::string, LeafData> > SubscriberPta::get_name_leaf_data() const
{
std::vector<std::pair<std::string, LeafData> > leaf_name_data {};
if (tcp_mss_adjust.is_set || is_set(tcp_mss_adjust.yfilter)) leaf_name_data.push_back(tcp_mss_adjust.get_name_leafdata());
return leaf_name_data;
}
std::shared_ptr<ydk::Entity> SubscriberPta::get_child_by_name(const std::string & child_yang_name, const std::string & segment_path)
{
return nullptr;
}
std::map<std::string, std::shared_ptr<ydk::Entity>> SubscriberPta::get_children() const
{
std::map<std::string, std::shared_ptr<ydk::Entity>> _children{};
char count_=0;
return _children;
}
void SubscriberPta::set_value(const std::string & value_path, const std::string & value, const std::string & name_space, const std::string & name_space_prefix)
{
if(value_path == "tcp-mss-adjust")
{
tcp_mss_adjust = value;
tcp_mss_adjust.value_namespace = name_space;
tcp_mss_adjust.value_namespace_prefix = name_space_prefix;
}
}
void SubscriberPta::set_filter(const std::string & value_path, YFilter yfilter)
{
if(value_path == "tcp-mss-adjust")
{
tcp_mss_adjust.yfilter = yfilter;
}
}
std::shared_ptr<ydk::Entity> SubscriberPta::clone_ptr() const
{
return std::make_shared<SubscriberPta>();
}
std::string SubscriberPta::get_bundle_yang_models_location() const
{
return ydk_cisco_ios_xr_models_path;
}
std::string SubscriberPta::get_bundle_name() const
{
return "cisco_ios_xr";
}
augment_capabilities_function SubscriberPta::get_augment_capabilities_function() const
{
return cisco_ios_xr_augment_lookup_tables;
}
std::map<std::pair<std::string, std::string>, std::string> SubscriberPta::get_namespace_identity_lookup() const
{
return cisco_ios_xr_namespace_identity_lookup;
}
bool SubscriberPta::has_leaf_or_child_of_name(const std::string & name) const
{
if(name == "tcp-mss-adjust")
return true;
return false;
}
const Enum::YLeaf Ipv4Qppb::none {0, "none"};
const Enum::YLeaf Ipv4Qppb::ip_prec {1, "ip-prec"};
const Enum::YLeaf Ipv4Qppb::qos_grp {2, "qos-grp"};
const Enum::YLeaf Ipv4Qppb::both {3, "both"};
}
}
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