text stringlengths 1 1.05M |
|---|
LXI H, 3629H ; BCD-1
LXI D, 4738H ; BCD-2
MOV A, L ; A = L
ADD E ; A += E
DAA ; A yı BCD ye çevirir.
MOV C, A ; C = A Result lower
MOV A, H ; A = H
ADC D ; A += (D + Elde)
DAA ; A yı BCD ye çevirir.
MOV B, A ; B = A Result high
HLT
; HL ve DE deki BCD sayıları toplar,
; sonucu BC ye yazar. |
// Copyright (c) 2011-2016 The Flericoin developers
// Distributed under the MIT/X11 software license, see the accompanying
// file COPYING or http://www.opensource.org/licenses/mit-license.php.
#include "WalletServiceErrorCategory.h"
namespace CryptoNote {
namespace error {
WalletServiceErrorCategory WalletServiceErrorCategory::INSTANCE;
}
}
|
object_const_def ; object_event constants
const ROUTE42_FISHER
const ROUTE42_POKEFAN_M
const ROUTE42_SUPER_NERD
const ROUTE42_FRUIT_TREE1
const ROUTE42_FRUIT_TREE2
const ROUTE42_FRUIT_TREE3
const ROUTE42_POKE_BALL1
const ROUTE42_POKE_BALL2
const ROUTE42_SUICUNE
Route42_MapScripts:
db 2 ; scene scripts
scene_script .DummyScene0 ; SCENE_ROUTE42_NOTHING
scene_script .DummyScene1 ; SCENE_ROUTE42_SUICUNE
db 0 ; callbacks
.DummyScene0:
end
.DummyScene1:
end
Route42SuicuneScript:
showemote EMOTE_SHOCK, PLAYER, 15
pause 15
playsound SFX_WARP_FROM
applymovement ROUTE42_SUICUNE, Route42SuicuneMovement
disappear ROUTE42_SUICUNE
pause 10
setscene SCENE_ROUTE42_NOTHING
clearevent EVENT_SAW_SUICUNE_ON_ROUTE_36
setmapscene ROUTE_36, SCENE_ROUTE36_SUICUNE
end
TrainerFisherTully:
trainer FISHER, TULLY1, EVENT_BEAT_FISHER_TULLY, FisherTullySeenText, FisherTullyBeatenText, 0, .Script
.Script:
loadvar VAR_CALLERID, PHONE_FISHER_TULLY
endifjustbattled
opentext
checkflag ENGINE_TULLY
iftrue .WantsBattle
checkflag ENGINE_TULLY_HAS_WATER_STONE
iftrue .HasWaterStone
checkcellnum PHONE_FISHER_TULLY
iftrue .NumberAccepted
checkevent EVENT_TULLY_ASKED_FOR_PHONE_NUMBER
iftrue .AskedAlready
writetext FisherTullyAfterBattleText
buttonsound
setevent EVENT_TULLY_ASKED_FOR_PHONE_NUMBER
scall .AskNumber1
sjump .AskForNumber
.AskedAlready:
scall .AskNumber2
.AskForNumber:
askforphonenumber PHONE_FISHER_TULLY
ifequal PHONE_CONTACTS_FULL, .PhoneFull
ifequal PHONE_CONTACT_REFUSED, .NumberDeclined
gettrainername STRING_BUFFER_3, FISHER, TULLY1
scall .RegisteredNumber
sjump .NumberAccepted
.WantsBattle:
scall .Rematch
winlosstext FisherTullyBeatenText, 0
readmem wTullyFightCount
ifequal 3, .Fight3
ifequal 2, .Fight2
ifequal 1, .Fight1
ifequal 0, .LoadFight0
.Fight3:
checkevent EVENT_RESTORED_POWER_TO_KANTO
iftrue .LoadFight3
.Fight2:
checkevent EVENT_BEAT_ELITE_FOUR
iftrue .LoadFight2
.Fight1:
checkevent EVENT_CLEARED_ROCKET_HIDEOUT
iftrue .LoadFight1
.LoadFight0:
loadtrainer FISHER, TULLY1
startbattle
reloadmapafterbattle
loadmem wTullyFightCount, 1
clearflag ENGINE_TULLY
end
.LoadFight1:
loadtrainer FISHER, TULLY2
startbattle
reloadmapafterbattle
loadmem wTullyFightCount, 2
clearflag ENGINE_TULLY
end
.LoadFight2:
loadtrainer FISHER, TULLY3
startbattle
reloadmapafterbattle
loadmem wTullyFightCount, 3
clearflag ENGINE_TULLY
end
.LoadFight3:
loadtrainer FISHER, TULLY4
startbattle
reloadmapafterbattle
clearflag ENGINE_TULLY
end
.HasWaterStone:
scall .Gift
verbosegiveitem WATER_STONE
iffalse .NoRoom
clearflag ENGINE_TULLY_HAS_WATER_STONE
setevent EVENT_TULLY_GAVE_WATER_STONE
sjump .NumberAccepted
.NoRoom:
sjump .PackFull
.AskNumber1:
jumpstd asknumber1m
end
.AskNumber2:
jumpstd asknumber2m
end
.RegisteredNumber:
jumpstd registerednumberm
end
.NumberAccepted:
jumpstd numberacceptedm
end
.NumberDeclined:
jumpstd numberdeclinedm
end
.PhoneFull:
jumpstd phonefullm
end
.Rematch:
jumpstd rematchm
end
.Gift:
jumpstd giftm
end
.PackFull:
jumpstd packfullm
end
TrainerPokemaniacShane:
trainer POKEMANIAC, SHANE, EVENT_BEAT_POKEMANIAC_SHANE, PokemaniacShaneSeenText, PokemaniacShaneBeatenText, 0, .Script
.Script:
endifjustbattled
opentext
writetext PokemaniacShaneAfterBattleText
waitbutton
closetext
end
TrainerHikerBenjamin:
trainer HIKER, BENJAMIN, EVENT_BEAT_HIKER_BENJAMIN, HikerBenjaminSeenText, HikerBenjaminBeatenText, 0, .Script
.Script:
endifjustbattled
opentext
writetext HikerBenjaminAfterBattleText
waitbutton
closetext
end
Route42Sign1:
jumptext Route42Sign1Text
MtMortarSign1:
jumptext MtMortarSign1Text
MtMortarSign2:
jumptext MtMortarSign2Text
Route42Sign2:
jumptext Route42Sign2Text
Route42UltraBall:
itemball ULTRA_BALL
Route42SuperPotion:
itemball SUPER_POTION
Route42FruitTree1:
fruittree FRUITTREE_ROUTE_42_1
Route42FruitTree2:
fruittree FRUITTREE_ROUTE_42_2
Route42FruitTree3:
fruittree FRUITTREE_ROUTE_42_3
Route42HiddenMaxPotion:
hiddenitem MAX_POTION, EVENT_ROUTE_42_HIDDEN_MAX_POTION
Route42SuicuneMovement:
set_sliding
fast_jump_step UP
fast_jump_step UP
fast_jump_step UP
fast_jump_step RIGHT
fast_jump_step RIGHT
fast_jump_step RIGHT
remove_sliding
step_end
FisherTullySeenText:
text "Let me demonstrate"
line "the power of the"
cont "#MON I caught!"
done
FisherTullyBeatenText:
text "What? That's not"
line "right."
done
FisherTullyAfterBattleText:
text "I want to become"
line "the trainer CHAMP"
para "using the #MON"
line "I caught."
para "That's the best"
line "part of fishing!"
done
HikerBenjaminSeenText:
text "Ah, it's good to"
line "be outside!"
cont "I feel so free!"
done
HikerBenjaminBeatenText:
text "Gahahah!"
done
HikerBenjaminAfterBattleText:
text "Losing feels in-"
line "significant if you"
para "look up at the big"
line "sky!"
done
PokemaniacShaneSeenText:
text "HEY!"
para "This is my secret"
line "place! Get lost,"
cont "you outsider!"
done
PokemaniacShaneBeatenText:
text "I should have used"
line "my MOON STONE…"
done
PokemaniacShaneAfterBattleText:
text "You're working on"
line "a #DEX?"
para "Wow, you must know"
line "some pretty rare"
cont "#MON!"
para "May I please see"
line "it. Please?"
done
Route42Sign1Text:
text "ROUTE 42"
para "ECRUTEAK CITY -"
line "MAHOGANY TOWN"
done
MtMortarSign1Text:
text "MT.MORTAR"
para "WATERFALL CAVE"
line "INSIDE"
done
MtMortarSign2Text:
text "MT.MORTAR"
para "WATERFALL CAVE"
line "INSIDE"
done
Route42Sign2Text:
text "ROUTE 42"
para "ECRUTEAK CITY -"
line "MAHOGANY TOWN"
done
Route42_MapEvents:
db 0, 0 ; filler
db 5 ; warp events
warp_event 0, 8, ROUTE_42_ECRUTEAK_GATE, 3
warp_event 0, 9, ROUTE_42_ECRUTEAK_GATE, 4
warp_event 10, 5, MOUNT_MORTAR_1F_OUTSIDE, 1
warp_event 28, 9, MOUNT_MORTAR_1F_OUTSIDE, 2
warp_event 46, 7, MOUNT_MORTAR_1F_OUTSIDE, 3
db 1 ; coord events
coord_event 24, 14, SCENE_ROUTE42_SUICUNE, Route42SuicuneScript
db 5 ; bg events
bg_event 4, 10, BGEVENT_READ, Route42Sign1
bg_event 7, 5, BGEVENT_READ, MtMortarSign1
bg_event 45, 9, BGEVENT_READ, MtMortarSign2
bg_event 54, 8, BGEVENT_READ, Route42Sign2
bg_event 16, 11, BGEVENT_ITEM, Route42HiddenMaxPotion
db 9 ; object events
object_event 40, 10, SPRITE_FISHER, SPRITEMOVEDATA_STANDING_LEFT, 0, 0, -1, -1, PAL_NPC_GREEN, OBJECTTYPE_TRAINER, 1, TrainerFisherTully, -1
object_event 51, 9, SPRITE_POKEFAN_M, SPRITEMOVEDATA_SPINRANDOM_FAST, 0, 0, -1, -1, PAL_NPC_BROWN, OBJECTTYPE_TRAINER, 3, TrainerHikerBenjamin, -1
object_event 47, 8, SPRITE_SUPER_NERD, SPRITEMOVEDATA_STANDING_DOWN, 0, 0, -1, -1, PAL_NPC_BLUE, OBJECTTYPE_TRAINER, 3, TrainerPokemaniacShane, -1
object_event 27, 16, SPRITE_FRUIT_TREE, SPRITEMOVEDATA_STILL, 0, 0, -1, -1, 0, OBJECTTYPE_SCRIPT, 0, Route42FruitTree1, -1
object_event 28, 16, SPRITE_FRUIT_TREE, SPRITEMOVEDATA_STILL, 0, 0, -1, -1, 0, OBJECTTYPE_SCRIPT, 0, Route42FruitTree2, -1
object_event 29, 16, SPRITE_FRUIT_TREE, SPRITEMOVEDATA_STILL, 0, 0, -1, -1, 0, OBJECTTYPE_SCRIPT, 0, Route42FruitTree3, -1
object_event 6, 4, SPRITE_POKE_BALL, SPRITEMOVEDATA_STILL, 0, 0, -1, -1, 0, OBJECTTYPE_ITEMBALL, 0, Route42UltraBall, EVENT_ROUTE_42_ULTRA_BALL
object_event 33, 8, SPRITE_POKE_BALL, SPRITEMOVEDATA_STILL, 0, 0, -1, -1, 0, OBJECTTYPE_ITEMBALL, 0, Route42SuperPotion, EVENT_ROUTE_42_SUPER_POTION
object_event 26, 16, SPRITE_SUICUNE, SPRITEMOVEDATA_STILL, 0, 0, -1, -1, PAL_NPC_BLUE, OBJECTTYPE_SCRIPT, 0, ObjectEvent, EVENT_SAW_SUICUNE_ON_ROUTE_42
|
frame 1, 12
frame 2, 24
frame 1, 12
endanim
|
;
; jcgrass2.asm - grayscale colorspace conversion (SSE2)
;
; x86 SIMD extension for IJG JPEG library
; Copyright (C) 1999-2006, MIYASAKA Masaru.
; Copyright (C) 2011, D. R. Commander.
; For conditions of distribution and use, see copyright notice in jsimdext.inc
;
; This file should be assembled with NASM (Netwide Assembler),
; can *not* be assembled with Microsoft's MASM or any compatible
; assembler (including Borland's Turbo Assembler).
; NASM is available from http://nasm.sourceforge.net/ or
; http://sourceforge.net/project/showfiles.php?group_id=6208
;
; [TAB8]
%include "jsimdext.inc"
; --------------------------------------------------------------------------
%define SCALEBITS 16
F_0_114 equ 7471 ; FIX(0.11400)
F_0_250 equ 16384 ; FIX(0.25000)
F_0_299 equ 19595 ; FIX(0.29900)
F_0_587 equ 38470 ; FIX(0.58700)
F_0_337 equ (F_0_587 - F_0_250) ; FIX(0.58700) - FIX(0.25000)
; --------------------------------------------------------------------------
SECTION SEG_CONST
alignz 16
global EXTN(jconst_rgb_gray_convert_sse2) PRIVATE
EXTN(jconst_rgb_gray_convert_sse2):
PW_F0299_F0337 times 4 dw F_0_299, F_0_337
PW_F0114_F0250 times 4 dw F_0_114, F_0_250
PD_ONEHALF times 4 dd (1 << (SCALEBITS-1))
alignz 16
; --------------------------------------------------------------------------
SECTION SEG_TEXT
BITS 32
%include "jcgryss2.asm"
%undef RGB_RED
%undef RGB_GREEN
%undef RGB_BLUE
%undef RGB_PIXELSIZE
%define RGB_RED EXT_RGB_RED
%define RGB_GREEN EXT_RGB_GREEN
%define RGB_BLUE EXT_RGB_BLUE
%define RGB_PIXELSIZE EXT_RGB_PIXELSIZE
%define jsimd_rgb_gray_convert_sse2 jsimd_extrgb_gray_convert_sse2
%include "jcgryss2.asm"
%undef RGB_RED
%undef RGB_GREEN
%undef RGB_BLUE
%undef RGB_PIXELSIZE
%define RGB_RED EXT_RGBX_RED
%define RGB_GREEN EXT_RGBX_GREEN
%define RGB_BLUE EXT_RGBX_BLUE
%define RGB_PIXELSIZE EXT_RGBX_PIXELSIZE
%define jsimd_rgb_gray_convert_sse2 jsimd_extrgbx_gray_convert_sse2
%include "jcgryss2.asm"
%undef RGB_RED
%undef RGB_GREEN
%undef RGB_BLUE
%undef RGB_PIXELSIZE
%define RGB_RED EXT_BGR_RED
%define RGB_GREEN EXT_BGR_GREEN
%define RGB_BLUE EXT_BGR_BLUE
%define RGB_PIXELSIZE EXT_BGR_PIXELSIZE
%define jsimd_rgb_gray_convert_sse2 jsimd_extbgr_gray_convert_sse2
%include "jcgryss2.asm"
%undef RGB_RED
%undef RGB_GREEN
%undef RGB_BLUE
%undef RGB_PIXELSIZE
%define RGB_RED EXT_BGRX_RED
%define RGB_GREEN EXT_BGRX_GREEN
%define RGB_BLUE EXT_BGRX_BLUE
%define RGB_PIXELSIZE EXT_BGRX_PIXELSIZE
%define jsimd_rgb_gray_convert_sse2 jsimd_extbgrx_gray_convert_sse2
%include "jcgryss2.asm"
%undef RGB_RED
%undef RGB_GREEN
%undef RGB_BLUE
%undef RGB_PIXELSIZE
%define RGB_RED EXT_XBGR_RED
%define RGB_GREEN EXT_XBGR_GREEN
%define RGB_BLUE EXT_XBGR_BLUE
%define RGB_PIXELSIZE EXT_XBGR_PIXELSIZE
%define jsimd_rgb_gray_convert_sse2 jsimd_extxbgr_gray_convert_sse2
%include "jcgryss2.asm"
%undef RGB_RED
%undef RGB_GREEN
%undef RGB_BLUE
%undef RGB_PIXELSIZE
%define RGB_RED EXT_XRGB_RED
%define RGB_GREEN EXT_XRGB_GREEN
%define RGB_BLUE EXT_XRGB_BLUE
%define RGB_PIXELSIZE EXT_XRGB_PIXELSIZE
%define jsimd_rgb_gray_convert_sse2 jsimd_extxrgb_gray_convert_sse2
%include "jcgryss2.asm"
|
// QOL improvements
//.org 0x80068DC // Respawn Heart/Star Data when date changes,
// // but this removes Fortune effect.
// // Taken from Virtual Console.
// bl 0x80668A8 // Spawn Heart Data
// bl 0x8068CCC // Spawn Star Data
.org 0x80255A8
ldr r2,=bugfix_videomanTapeDodgeTarget|1
bx r2
.org 0x80255C0
ldr r2,=bugfix_videomanTapeDodgeHitbox|1
bx r2
.pool
.org 0x802DAB4 // Let ghost Navis spawn without jacking out
.area 0x6C,0x00
push r4-r7,r14
bl 0x802EFB2
bne @@end
// Check if on spawn tile
mov r7,r10
ldr r7,[r7,0x40]
ldr r0,[r7,0x28]
add r0,0x24
bl 0x802B12A
mov r6,r0
cmp r6,0xD0
blt @@unset
cmp r6,0xEF
bgt @@unset
ldr r4,[0x802DB20]
ldr r5,[0x802DB5C]
@@loop:
ldrh r0,[r4]
tst r0,r0
beq @@unset
cmp r0,r6
bne @@next
// Found the ghost data
// Check should be active
ldrh r0,[r4,0x4]
bl 0x80287A0
beq @@unset
// Check already started
ldrh r0,[r4,0x2]
bl 0x80287A0
bne @@unset
mov r0,0x1E
mov r1,0x39
bl 0x80287AE
bne @@end
// Start the battle
// Set started
ldrh r0,[r4,0x2]
bl 0x8028710
ldrh r0,[r4,0x6]
bl 0x8028710
// Start battle
ldr r0,[0x802DB78]
ldr r1,[r5]
bl 0x802EF08
b @@end
@@next:
add r4,0x8
add r5,0x4
b @@loop
@@unset:
// Remove the ghost disable flag
mov r0,0x1E
mov r1,0x39
bl 0x802874E
@@end:
pop r4-r7,r15
.endarea
.org 0x80C0BDA // Playable Bass uses proper animation for Shooting Buster
mov r0,0x13 // New animation
.org 0x80C0C4C
.area 0xC
ldr r0,=bugfix_bassShootingBusterWindDown|1
mov r14,r0
bl r14
b @@end
.pool
@@end:
.endarea
.org 0x80C0D3E
mov r4,0x14 // Shot effect x-offset
.org 0x80C0D4C
mov r0,0x22 // Shot effect y-offset
.org 0x802900C // Bass XX title screen code
.area 0x8
ldr r1,=bugfix_bassXXCode|1
bx r1
.pool
.endarea
.org 0x8049BD8 // Bass Omega -> XX upgrade
.area 0x8
ldr r1,=bugfix_bassXXUpgrade|1
bx r1
.pool
.endarea
.org 0x8006546 // Set max year to 2099 instead of 2050
mov r2,0x63
cmp r2,0x63
.org 0x804B334 // Use unused Under BBS label
.dw (VAR_JP ? 0x86FFDAC : file_6FFDAC)
// Major bugs
// Some also fixed in Virtual Console, but those fixes aren't perfect,
// so we're bypassing them.
.org 0x8035984 // PET screen day icon copy bug
mov r2,0x40
.org 0x8040512 // E-Mail screen crash when you press A+B
mov r0,0x0
strb r0,[r5,0x3]
mov r0,0xC
strb r0,[r5,0x2]
.org 0x8037350 // Random crash on scene transition
ldr r1,[r7]
add sp,0x10
.org 0x804FC04 // Text box palette copy bug
mov r2,0x20
.org 0x807DB5C // NumberMan MegaChip freeze bug
mov r0,0xFF
strb r0,[r5,0x11]
mov r0,0x0
strb r0,[r5,0x10]
.org 0x807E658 // FireMan freeze bug
ldr r0,=bugfix_bypassVC|1
mov r14,r15
bx r0
b 0x807E668
.pool
.org 0x807ED58 // GutsMan MegaChip freeze bug
ldr r0,=bugfix_bypassVC|1
mov r14,r15
bx r0
b 0x807ED68
.pool
.org 0x8080344 // AquaMan MegaChip freeze bug
ldr r0,=bugfix_bypassVC|1
mov r14,r15
bx r0
b 0x8080354
.pool
.org 0x8088560 // WindMan freeze bug
ldr r0,=bugfix_bypassVC|1
mov r14,r15
bx r0
b 0x8088570
.pool
.org 0x808CD04 // ??? freeze bug
ldr r0,=bugfix_bypassVC|1
mov r14,r15
bx r0
b 0x808CD14
.pool
.org 0x808D334 // ??? freeze bug
ldr r0,=bugfix_bypassVC|1
mov r14,r15
bx r0
b 0x808D344
.pool
.org 0x808D5D0 // ??? freeze bug
ldr r0,=bugfix_bypassVC|1
mov r14,r15
bx r0
b 0x808D5E0
.pool
.org 0x80994E8 // ??? freeze bug
mov r0,0xFF
strb r0,[r5,0x11]
mov r0,0xB
strb r0,[r5,0x10]
.org 0x809E334 // ??? freeze bug
mov r0,0xFF
strb r0,[r5,0x11]
mov r0,0x1
strb r0,[r5,0x10]
.org 0x80A2DE4 // ??? freeze bug
mov r0,0xFF
strb r0,[r5,0x11]
mov r0,0x5
strb r0,[r5,0x10]
.org 0x80A3850 // ??? freeze bug
mov r0,0xFF
strb r0,[r5,0x11]
mov r0,0x0
strb r0,[r5,0x10]
.org 0x80A4150 // ??? freeze bug
mov r0,0xFF
strb r0,[r5,0x11]
mov r0,0x0
strb r0,[r5,0x10]
.org 0x80A50C0 // CircGun freeze bug
mov r0,0xFF
strb r0,[r5,0x11]
mov r0,0x1
strb r0,[r5,0x10]
.org 0x80A6018 // ??? freeze bug
mov r0,0xFF
strb r0,[r5,0x11]
mov r0,0x0
strb r0,[r5,0x10]
.org 0x80A61CC // GreenWood freeze bug
mov r0,0xFF
strb r0,[r5,0x11]
ldrb r0,[r7,0x2]
strb r0,[r5,0x10]
.org 0x80A6E88 // ??? freeze bug
mov r0,0xFF
strb r0,[r5,0x11]
mov r0,0x0
strb r0,[r5,0x10]
.org 0x8097B42 // GutsMan desync in EXE4 battle
tst r0,r0
.org 0x8034D2A // text input scroll out graphical error
cmp r7,0x1F
.org 0x80769DC // broken clock tree crash
mov r4,0x1
.org 0x8076A0E
sub r1,r0,0x1
bmi 0x8076A2E
ldr r0,[0x8076A30]
ldrb r4,[r0,r1]
cmp r4,0xFF
bne 0x8076A2C
.org 0x80B021C // Bass XX afterimage palette
mov r0,0x9
.org 0x80D5F40 // Chip Trader color glitch
beq 0x80D5F74
.org 0x80D5F74
mov r0,r10
ldr r0,[r0,0x2C]
ldr r0,[r0,0x4C]
bl 0x801A894
ldrb r0,[r0,0x8]
strb r0,[r7,0x4]
bl 0x800219C
pop r15
.org 0x803A7E8 // Day of month set glitch
// Should be overridden for US/EU
.dw bugfix_yearSet|1
.dw bugfix_monthSet|1
.org 0x80B2404 // Remove Navi reappear SFX for GutPunch
b 0x80B240A
.org 0x802E2E4 // Fix world time on 1/1, 0:00-5:59 setting year to 2001
ldr r1,=bugfix_worldTimePrevDay|1
mov r14,r15
bx r1
b 0x802E2FA
.pool
.org 0x80497EC // Tournament finalist RNG bug
lsl r2,r0,0x1F
lsr r2,r2,0x1F
// Fixed tournament win rates table
.org 0x804A072 // Bass
.db 16, 8, 16, 16, 16, 16, 16, 16, 16, 16
.org 0x804A05E // Finalist
.db 14, 0, 8, 2, 14, 14, 14, 14, 14, 14
.org 0x804A068 // ShadowMan
.db 16, 0, 14, 8, 16, 16, 16, 16, 16, 16
.org 0x804A02C // Null
.db 8, 0, 2, 0, 8, 6, 6, 6, 6, 14
.org 0x804A036 // Fire
.db 10, 0, 2, 0, 10, 8, 8, 3, 13, 14
.org 0x804A04A // Elec
.db 10, 0, 2, 0, 10, 8, 8, 13, 3, 14
.org 0x804A040 // Aqua
.db 10, 0, 2, 0, 10, 13, 3, 8, 8, 14
.org 0x804A054 // Wood
.db 10, 0, 2, 0, 10, 3, 13, 8, 8, 14
.org 0x804A07C // NormalNavi/HeelNavi
.db 2, 0, 2, 0, 2, 2, 2, 2, 2, 8
.org 0x8088EFC // Bass backwards cloak glitch
.dw bugfix_bassCloakFlipStunned|1
.org 0x8088F00
.dw bugfix_bassCloakFlipParalyzed|1
.org 0x807135A // Internet 9 Purple Mystery Data out-of-bounds clip
.dh 0x0114 // from 0x011C
.dh 0xFF8C // from 0xFF84
.org 0x8073130 // Golf Course Comp 2 Purple Mystery Data out-of-bounds clip
.dh 0xFF9C // from 0xFF96
.org 0x8093EFC // ShadowMan AntiNavi warp bug
ldr r0,=bugfix_shadowmanAntiNavi1|1
bx r0
.pool
.org 0x8093F40
ldr r0,=bugfix_shadowmanAntiNavi2|1
bx r0
.pool
.org 0x8093F60
ldr r1,=bugfix_shadowmanAntiNavi3|1
bx r1
.pool
.org 0x8093F84
ldr r1,=bugfix_shadowmanAntiNavi4|1
bx r1
.pool
.org 0x8093FB4
ldr r1,=bugfix_shadowmanAntiNavi5|1
bx r1
.pool
.org 0x8085D34 // ShadowMan AntiNavi Roll never targets player
ldr r0,=bugfix_shadowmanAntiNaviRoll|1
bx r0
.pool
.org 0x80BBCF4 // ProtoMan sword comes out too early
cmp r0,0x1
.org 0x80BBD52
mov r0,0x0
add r1,=0x80BBD68
add r1,0x1
ldr r2,=bugfix_protomanSwordTiming|1
bx r2
.pool
.org 0x80BBF4C
b 0x80BBF62
.org 0x80BBFC2
b 0x80BBFC8
.org 0x80BC0BE
cmp r0,0x1
.org 0x80BC0F4
mov r0,0x1
add r1,=0x80BC108
add r1,0x3
ldr r2,=bugfix_protomanSwordTiming|1
bx r2
.pool
.org 0x808B984 // ProtoMan/DeltaRay sword comes out too early
bne @bugfix_protomanChipState1
.org 0x808B992
mov r0,0x4
strb r0,[r5,0xB]
b 0x808B9AE
@bugfix_protomanChipState1:
ldr r0,=bugfix_protomanChipSpawns|1
mov r14,r15
bx r0
b 0x808B9A4
.pool
.org 0x808BD92 // DeltaRay sword comes out too early
bne @bugfix_deltarayChipState1
.org 0x808BDA0
mov r0,0x4
strb r0,[r5,0xB]
b 0x808BDD4
@bugfix_deltarayChipState1:
ldrh r0,[r5,0x20]
cmp r0,0x5
ble @@timer
// Check command code
bl 0x808BEB0
beq @@timer
mov r0,0x1
strb r0,[r7,0x19]
@@timer:
ldr r0,=bugfix_protomanChipSpawns|1
mov r14,r15
bx r0
b 0x808BDCA
.pool
.org 0x808B9EA // Split into 2 functions
.area 0x56
bugfix_protomanChipSpawnHilt:
push r4,r7,r14
// Load chip subtype
ldrb r6,[r5,0x4]
// Spawn sword hilt
ldr r4,[0x808BA44]
mov r7,0x4C
add r7,r7,r5
bl 0x8094A72
// Set ProtoMan Omega animation
cmp r6,0x3
blt @@sfx
mov r1,(0x17 - 0x3)
add r1,r1,r6
strb r1,[r0,0x5]
@@sfx:
// Play SFX
mov r0,0x8E
bl 0x8000534
pop r4,r7,r15
bugfix_protomanChipSpawnSlash:
push r4,r6-r7,r14
// Get coordinates
ldr r0,[r5,0x6C]
bl 0x800B3E6
ldrb r1,[r5,0x12]
add r0,r0,r1
ldrb r1,[r5,0x13]
// Spawn hitbox
mov r3,0x10
lsl r3,r3,0x10
push r0,r1,r3
ldr r4,[0x808BA40]
ldr r6,[r5,0x2C]
mov r7,0x3
mov r2,0x0
bl 0x8094BAE
pop r0,r1,r3
// Spawn slash
bl 0x800B39A
mov r2,r1
mov r1,r0
ldr r4,[r5,0x6C]
lsl r4,r4,0x8
add r4,0x5E
bl 0x80AA892
pop r4,r6-r7,r15
.endarea
.org 0x808D43C // HawkCut comes out too early
.area 0x22,0x00
bne @@state1
// Start swing animation
mov r0,0x5
strb r0,[r5,0x10]
mov r0,0xFF
strb r0,[r5,0x11]
// Start timer
mov r0,0x14
strh r0,[r5,0x20]
// Play SFX
mov r0,0x8E
bl 0x8000534
// Set state
mov r0,0x4
strb r0,[r5,0xB]
@@state1:
ldrh r0,[r5,0x20]
cmp r0,0x13
ldr r1,=bugfix_hawkCut1|1
mov r14,r15 // doesn't update flags
bx r1
.endarea
.org 0x808D460
cmp r0,0xA // timing for slash effect
.org 0x808D4AC
.area 0x4
.pool
.endarea
.org 0x808D4BA
.area 0x22,0x00
bne @@state1
// Start swing animation
mov r0,0x5
strb r0,[r5,0x10]
mov r0,0xFF
strb r0,[r5,0x11]
// Start timer
mov r0,0x14
strh r0,[r5,0x20]
// Play SFX
mov r0,0x8E
bl 0x8000534
// Set state
mov r0,0x4
strb r0,[r5,0xB]
@@state1:
ldr r0,=bugfix_hawkCut2|1
mov r14,r15
bx r0
bugfix_hawkCut2Return:
.pool
.endarea
.org 0x80C04F2 // ElecMan Dash Elec Sword color
mov r4,0x74
.org 0x80AA81C // Extra sword types
lsl r1,r0,0x2
.org 0x80AA820
ldr r2,=bugfix_extraSwords|1
bx r2
.pool
.org 0x809BB98 // Enemy Heat Chaser updates during screen dim
mov r2,0x14
.org 0x809BC86
mov r2,0x14
.org 0x809BADC // Heat Chaser destroy doesn't clear hitboxes
.dw bugfix_burnermanHeatChaserDestroy|1
.org 0x802E35A // Better update time checks
bl 0x800615C
.org 0x802E378
ldr r2,=bugfix_checkLastUpdateTime|1
bx r2
.pool
.org 0x802E394
ldr r1,=bugfix_checkNextUpdateTime|1
bx r1
.pool
.org 0x8002C94 // Object overload for early warp-in NaviChips
ldr r7,=bugfix_replaceType1WithType4Object|1
bx r7
.pool
.org 0x8002BA0
.dw bugfix_type4ObjectList
.org 0x80942E8 // VideoMan Stock Footage updates during screen dim
ldr r0,=bugfix_videomanStockFootage|1
bx r0
.pool
.org 0x8067118 // SearchMan mission area availability checks missing
.db 0xA2,0x00 // Internet 9
.org 0x8067128
.db 0xA2,0x01 // Internet 10
.org 0x8067138
.db 0xA2,0x02 // Internet 11
.org 0x8067148
.db 0xA2,0x02 // Internet 11
.org 0x8067158
.db 0xA2,0x03 // Internet 12
.org 0x80681F4 // Proto/Shadow first mission cannot be #2
mov r0,0xFF
.org 0x806996C
mov r0,0xFF
.org 0x8006834 // Do not spawn WindMan Mr. Prog as part of Navi initialization
pop r15
.org 0x80DE648 // Check WindMan flags for Mr. Progs rather than current Navi
mov r0,0xF
mov r1,0x3
bl 0x80287AE
.org 0x80DE656
mov r0,0xF
mov r1,0x83
bl 0x80287AE
.org 0x80DE402 // Force HP Memory for WindMan minigame if below HP threshold
.area 0xE
ldr r0,=bugfix_windmanMinigameForceHPMemory|1
mov r14,r15
bx r0
beq 0x80DE41C
b 0x80DE410
.pool
.endarea
.org 0x80D3714 // Printing wrong equipment name for 1 frame
cmp r7,0x1
.org 0x803C22C // Delay fade-in for menus to hide placeholder numbers
b 0x803C234
.org 0x803C1D8
.dw bugfix_equipmentScreenFadeIn|1
.org 0x8040D4C
b 0x8040D54
.org 0x8040CF4
.dw bugfix_mailScreenFadeIn|1
.org 0x80440AC
ldr r2,=bugfix_commScreenFadeIn2|1
mov r14,r15
bx r2
b 0x80440B8
.pool
.org 0x8044008
.dw bugfix_commScreenFadeIn|1
.org 0x802E33C // Don't do world update while coming out of a battle
ldr r0,=bugfix_delayWorldUpdateAfterBattle|1
bx r0
.pool
.org 0x80DF726 // Wrong music being played after cancelling Search mission in Undernet
push r4,r14
.org 0x80DF730
nop // call soundPlayBGM text script command
bl 0x80519CC // modifies r4, but we don't need it here
.org 0x80DF746
pop r4,r15
.org 0x80DF74A
pop r4,r15
.org 0x80E8EA6 // Wrong music being played after cancelling Napalm mission in Undernet
push r4,r14
.org 0x80E8EB0
nop // call soundPlayBGM text script command
bl 0x80519CC // modifies r4, but we don't need it here
.org 0x80E8EC6
pop r4,r15
.org 0x80E8ECA
pop r4,r15
// Fix MB for Ligtnin2 and Ligtnin3
.org 0x801AF0C+0x2C*167+0x6 :: .db 45
.org 0x801AF0C+0x2C*168+0x6 :: .db 53
// Fix ID sort for BurnMan
.org 0x801AF0C+0x2C*260+0x1C :: .db 264
.org 0x801AF0C+0x2C*261+0x1C :: .db 265
.org 0x801AF0C+0x2C*262+0x1C :: .db 266
.org 0x801AF0C+0x2C*263+0x1C :: .db 267
.org 0x801AF0C+0x2C*264+0x1C :: .db 268
.org 0x801AF0C+0x2C*265+0x1C :: .db 269
.org 0x801AF0C+0x2C*266+0x1C :: .db 258
.org 0x801AF0C+0x2C*267+0x1C :: .db 259
.org 0x801AF0C+0x2C*268+0x1C :: .db 260
.org 0x801AF0C+0x2C*269+0x1C :: .db 261
.org 0x801AF0C+0x2C*270+0x1C :: .db 262
.org 0x801AF0C+0x2C*271+0x1C :: .db 263
// Smaller bugs
.org 0x8000FA0 // ThunderMan max HP
.dh 1200
.org 0x8013944 // write using wrong register
str r0,[r7,0x5C]
.org 0x80296C8 // misaligned read
ldrb r0,[r3,r1]
.org 0x803066E // wrong size
mov r2,0x20
nop
.org 0x8035F48 // wrong size
mov r2,0x40
.org 0x804FCB6 // useless read from 0xFFFFFFFF
nop
.org 0x80D6666 // misaligned read
ldrh r0,[r1,r0]
.org 0x8001452 // leftover buffer clear from EXE3
pop r15
.org 0x80085E2 // probably misaligned read
ldrb r0,[r1,r0]
.org 0x8009A5A // write using wrong register
strb r1,[r4]
.org 0x800CB78 // likely wrong jump to end (r4 not loaded yet)
beq 0x800CBAC
.org 0x800CB84
beq 0x800CBAC
.org 0x8031712 // write using wrong register
strb r0,[r3,0x8]
.org 0x80111EC // likely wrong animation initialization
strb r0,[r5,0x11]
.org 0x80787A0
strb r0,[r5,0x11]
.org 0x807C778
strb r0,[r5,0x11]
.org 0x807D5BC
strb r0,[r5,0x11]
.org 0x80814E4
strb r0,[r5,0x11]
.org 0x80858D8
strb r0,[r5,0x11]
.org 0x80879E8
strb r0,[r5,0x11]
.org 0x8087FA8
strb r0,[r5,0x11]
.org 0x808A400
strb r0,[r5,0x11]
.org 0x808C168
strb r0,[r5,0x11]
.org 0x808DAD0
strb r0,[r5,0x11]
.org 0x8091FFC
strb r0,[r5,0x11]
.org 0x8092280
strb r0,[r5,0x11]
.org 0x8092A00
strb r0,[r5,0x11]
.org 0x802C57C // BIOS read; add placeholder
.dw 0x802C65F
.org 0x802D8D4 // potential BIOS read; using removed struct member
nop
.org 0x802D8DA
nop
.org 0x80E9A76 // IceMan minigame, remove leftover soundPlay call
nop
nop
nop
.org 0x80EAB26 // IceMan minigame; trying to update too many rows
cmp r5,0x5
.org 0x80EAD1A
cmp r5,0x5
.org 0x80DE8BE // WindMan minigame; creating player object twice
nop
nop
.org 0x800C71E // potentially try to destroy null objects
.area 0x12
push r14
ldr r3,[r5,0x58]
tst r3,r3
beq @@end
mov r0,0x0
strb r0,[r3,0x9]
strh r0,[r3,0xA]
str r0,[r3,0x30]
@@end:
pop r15
.endarea
.org 0x806E8E0 // Default NPC sprite set to ThunderMan mugshot; set to white dot
mov r1,0x18
mov r2,0x0
.org 0x80EE6CC // read from write-only I/O
ldrh r0,[r1,0x2]
.org 0x80EE6D0
lsl r2,r2,0x2
.org 0x80EE6DE
ldrh r0,[r1,0x2]
.org 0x80EE962 // read from write-only I/O
ldrh r0,[r1,0x2]
.org 0x80EE966
lsl r3,r3,0x2
.org 0x80EE974
ldrh r0,[r1,0x2]
.org 0x80EDC80 // read from write-only I/O
ldrh r1,[r2,0xA]
lsl r1,r1,0x17
.org 0x80EDC8A
ldrh r1,[r2,0x16]
lsl r1,r1,0x17
.org 0x803E97C // not reloading r0
bne 0x803E982
mov r3,0x0
str r3,[r1,r2]
ldr r0,[sp,0x10]
.org 0x80D4A24 // saving r5 too late
.area 0x2A,0x00
push r5 // fix
mov r0,r7
bl 0x80D4CE0
mov r0,r7
bl 0x801A894
ldr r1,[r0,0x24]
tst r1,r1
beq 0x80D4A9C
ldr r2,[r0,0x28]
bl 0x80D4ACC
bl 0x80D4B28
bl 0x80D4B80
ldr r0,[0x80D4AC4]
ldr r1,[0x80D4AC8]
bl 0x803C6FC
.endarea
.org IWRAM_BLOB+0x160 // read from write-only I/O
.area 0x44,0x00
push r14
ldr r1,[IWRAM_BLOB+0x1A4]
ldrb r3,[r1]
tst r3,r3
beq @@end
ldr r0,[IWRAM_BLOB+0x1A8]
ldr r1,[IWRAM_BLOB+0x1AC]
ldrh r2,[r0,0xA] // fix
lsl r2,r2,0x10 // fix
and r2,r1
str r2,[r0,0x8]
cmp r3,0x80
bne @@alt
ldr r1,[IWRAM_BLOB+0x1A4]
mov r0,0x0
strb r0,[r1]
b @@end
@@alt:
ldr r1,[IWRAM_BLOB+0x1A4]
ldr r2,[IWRAM_BLOB+0x1B0]
str r2,[r0]
ldr r2,[r1,0x8]
str r2,[r0,0x4]
ldrb r2,[r1,0x1]
ldrh r3,[r1,0x2]
lsl r3,r3,0x10
orr r2,r3
str r2,[r0,0x8]
ldr r0,[r1,0x4]
ldr r1,[IWRAM_BLOB+0x1B0]
ldr r2,[IWRAM_BLOB+0x1B4]
ldr r3,[IWRAM_BLOB+0x1B8]
mov r14,r15
bx r3
@@end:
pop r15
.endarea
|
; Multiplier ratios for all stats from modifier -6 to +6
; (except accuracy, see data/battle/accuracy_multipliers.asm).
; This table is identical to data/battle/stat_multipliers_2.asm.
; This one is used by CalcBattleStats.
StatLevelMultipliers:
db 25, 100 ; -6 = 25%
db 28, 100 ; -5 = 28%
db 33, 100 ; -4 = 33%
db 40, 100 ; -3 = 40%
db 50, 100 ; -2 = 50%
db 66, 100 ; -1 = 66%
db 1, 1 ; 0 = 100%
db 15, 10 ; +1 = 150%
db 2, 1 ; +2 = 200%
db 25, 10 ; +3 = 250%
db 3, 1 ; +4 = 300%
db 35, 10 ; +5 = 350%
db 4, 1 ; +6 = 400%
|
; A006134: a(n) = Sum_{k=0..n} binomial(2*k,k).
; 1,3,9,29,99,351,1275,4707,17577,66197,250953,956385,3660541,14061141,54177741,209295261,810375651,3143981871,12219117171,47564380971,185410909791,723668784231,2827767747951,11061198475551,43308802158651,169719408596403,665637941544507,2612577367192619
mov $2,$0
add $2,1
mov $4,$0
lpb $2,1
mov $0,$4
sub $2,1
sub $0,$2
mul $3,$0
bin $3,$0
add $1,$3
mov $3,2
lpe
|
#ifndef DEF_VBO
#define DEF_VBO
#include <iostream>
//#include <GL/glew.h>
#define GLFW_INCLUDE_GLCOREARB
//#include <GLFW/glfw3.h>
#include <string.h>
#include "shader_program.hpp"
#include "logger.hpp"
class VBO {
public:
VBO(GLenum target,GLenum mode,GLenum element_type,GLuint vao);
VBO(GLenum target,GLenum mode,GLenum element_type,GLuint vao,Shader_Attribs attrib);
~VBO();
void create();
bool iscreated();
void destroy();
void bind();
void unbind();
GLuint id();
int size();
int element_size();
GLenum element_type();
void update(void *data,int size);
void updateWithStride(void *data, int size, int elemSize, int offset, int stride);
void print_contents();
private:
GLuint vao;
GLuint vbo;
GLenum vbo_type;
GLenum access_mode;
GLsizei vbo_size;
GLsizei vbo_capacity;
GLint vbo_element_size;
GLenum vbo_element_type;
bool created;
};
#endif
|
; A040520: Continued fraction for sqrt(544).
; Submitted by Christian Krause
; 23,3,11,3,46,3,11,3,46,3,11,3,46,3,11,3,46,3,11,3,46,3,11,3,46,3,11,3,46,3,11,3,46,3,11,3,46,3,11,3,46,3,11,3,46,3,11,3,46,3,11,3,46,3,11,3,46,3,11,3,46,3,11,3,46,3,11,3,46,3,11,3,46,3,11
gcd $0,262156
mul $0,42
mod $0,13
mul $0,2
mov $1,$0
sub $0,2
gcd $0,45
sub $1,4
div $1,5
mul $1,22
sub $1,$0
mov $0,$1
div $0,2
add $0,3
|
clc
lda {m1}
adc {m2}+2
sta {m1}
lda {m1}+1
adc {m2}+3
sta {m1}+1
|
/*
*
* Copyright 2016 gRPC authors.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
*/
#include <grpc/support/port_platform.h>
#include <string>
#include "absl/strings/str_cat.h"
#include <grpc/support/alloc.h>
#include <grpc/support/log.h>
#include "src/core/lib/gpr/env.h"
#include "src/core/lib/security/credentials/credentials.h"
#include "src/core/lib/security/credentials/google_default/google_default_credentials.h"
std::string grpc_get_well_known_google_credentials_file_path_impl(void) {
char* base = gpr_getenv(GRPC_GOOGLE_CREDENTIALS_PATH_ENV_VAR);
if (base == nullptr) {
gpr_log(GPR_ERROR, "Could not get " GRPC_GOOGLE_CREDENTIALS_PATH_ENV_VAR
" environment variable.");
return "";
}
std::string result =
absl::StrCat(base, "/", GRPC_GOOGLE_CREDENTIALS_PATH_SUFFIX);
gpr_free(base);
return result;
}
|
COMMENT }%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
Copyright (c) Berkeley Softworks 1990 -- All Rights Reserved
PROJECT: PC GEOS
MODULE: IBM late model 24-pin printer driver for Zoomer
FILE: ppds24zManager.asm
AUTHOR: Dave Durran
REVISION HISTORY:
Name Date Description
---- ---- -----------
Dave 2/90 initial version
Dave 3/90 added 24-pin print resources.
Dave 9/90 added IBM 24-pin print resources.
Dave 5/92 Initial 2.0 version
DESCRIPTION:
This file contains the source for the ppds 24-pin printer driver
$Id: ppds24zManager.asm,v 1.1 97/04/18 11:54:24 newdeal Exp $
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%}
;--------------------------------------
; Include files
;--------------------------------------
include printcomInclude.def
;------------------------------------------------------------------------------
; Constants and Macros
;------------------------------------------------------------------------------
include printcomConstant.def
include ppds24Constant.def
include printcomMacro.def
include printcomIBMProp.rdef
;------------------------------------------------------------------------------
; Driver Info Table
;------------------------------------------------------------------------------
idata segment ; MODULE_FIXED
DriverTable DriverExtendedInfoStruct \
< <Entry:DriverStrategy, ; DIS_strategy
mask DA_HAS_EXTENDED_INFO, ; DIS_driverAttributes
DRIVER_TYPE_PRINTER >, ; DIS_driverType
handle DriverInfo ; DEIS_resource
>
public DriverTable
idata ends
;------------------------------------------------------------------------------
; Entry Code
;------------------------------------------------------------------------------
Entry segment resource ; MODULE_FIXED
include printcomEntry.asm ; entry point, misc bookeeping routines
include printcomInfo.asm ; various info getting/setting routines
include printcomAdmin.asm ; misc init routines
include printcomTables.asm ; module jump table for driver calls
include printcomNoEscapes.asm ; module jump table for driver escape calls
Entry ends
;------------------------------------------------------------------------------
; Driver code
;------------------------------------------------------------------------------
CommonCode segment resource ; MODULE_STANDARD
include printcomIBMJob.asm ; StartJob/EndJob/SetPaperpath routines
include Job/Custom/customPPDS24.asm
include printcomIBMPropDialog.asm ; code to implement UI setting
include printcomIBMPPDS24Cursor.asm ; code for PPDS 24 pin Cursor routines
include printcomIBMPPDS24Styles.asm ; code to implement Style setting routines
include printcomStream.asm ; code to talk with the stream driver
include printcomDotMatrixBuffer.asm ; code to deal with graphic print buffers
include printcomNoColor.asm ; code to implement Color routines
include printcomIBMPPDS24Graphics.asm ; code for PPDS 24 pin graphics routines
include ppds24ControlCodes.asm ; Escape and control codes
include ppds24Text.asm ; common code to implement text routines
include ppds24Page.asm ; code to implement Page routines
CommonCode ends
;------------------------------------------------------------------------------
; Device Info Resources (each in their own resource)
;------------------------------------------------------------------------------
include ppds24zDriverInfo.asm ; overall driver info
include ppds24generInfo.asm ; specific info for narrow printer
include ppds24generwInfo.asm ; specific info for wide carr. printer
end
|
; A216703: a(n) = Product_{k=1..n} (49 - 7/k).
; Submitted by Christian Krause
; 1,42,1911,89180,4213755,200574738,9594158301,460519598448,22162505675310,1068725273676060,51619430718553698,2496503376570051576,120872371815599997138,5857661095679076784380,284096563140435224042430,13788153197749122873525936
mov $1,1
mov $3,$0
mov $0,41
mov $4,1
lpb $3
add $0,1
mul $1,$3
mul $1,$0
add $0,48
add $2,$4
div $1,$2
sub $3,1
add $4,2
lpe
mov $0,$1
|
/* Copyright (c) 2015-2018 The Khronos Group Inc.
* Copyright (c) 2015-2018 Valve Corporation
* Copyright (c) 2015-2018 LunarG, Inc.
* Copyright (C) 2015-2018 Google Inc.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <unordered_map>
#include <list>
#include "vk_loader_platform.h"
#include "vulkan/vk_layer.h"
#include "vk_layer_config.h"
#include "vk_layer_extension_utils.h"
#include "vk_layer_utils.h"
#include "vk_layer_logging.h"
#include "threading.h"
#include "vk_dispatch_table_helper.h"
#include "vk_enum_string_helper.h"
#include "vk_layer_data.h"
#include "vk_layer_utils.h"
#include "thread_check.h"
namespace threading {
static uint32_t loader_layer_if_version = CURRENT_LOADER_LAYER_INTERFACE_VERSION;
static void initThreading(layer_data *my_data, const VkAllocationCallbacks *pAllocator) {
layer_debug_report_actions(my_data->report_data, my_data->logging_callback, pAllocator, "google_threading");
layer_debug_messenger_actions(my_data->report_data, my_data->logging_messenger, pAllocator, "google_threading");
}
VKAPI_ATTR VkResult VKAPI_CALL CreateInstance(const VkInstanceCreateInfo *pCreateInfo, const VkAllocationCallbacks *pAllocator,
VkInstance *pInstance) {
VkLayerInstanceCreateInfo *chain_info = get_chain_info(pCreateInfo, VK_LAYER_LINK_INFO);
assert(chain_info->u.pLayerInfo);
PFN_vkGetInstanceProcAddr fpGetInstanceProcAddr = chain_info->u.pLayerInfo->pfnNextGetInstanceProcAddr;
PFN_vkCreateInstance fpCreateInstance = (PFN_vkCreateInstance)fpGetInstanceProcAddr(NULL, "vkCreateInstance");
if (fpCreateInstance == NULL) {
return VK_ERROR_INITIALIZATION_FAILED;
}
// Advance the link info for the next element on the chain
chain_info->u.pLayerInfo = chain_info->u.pLayerInfo->pNext;
VkResult result = fpCreateInstance(pCreateInfo, pAllocator, pInstance);
if (result != VK_SUCCESS) return result;
layer_data *my_data = GetLayerDataPtr(get_dispatch_key(*pInstance), layer_data_map);
my_data->instance = *pInstance;
my_data->instance_dispatch_table = new VkLayerInstanceDispatchTable;
layer_init_instance_dispatch_table(*pInstance, my_data->instance_dispatch_table, fpGetInstanceProcAddr);
my_data->report_data = debug_utils_create_instance(my_data->instance_dispatch_table, *pInstance,
pCreateInfo->enabledExtensionCount, pCreateInfo->ppEnabledExtensionNames);
initThreading(my_data, pAllocator);
// Look for one or more debug report create info structures, and copy the
// callback(s) for each one found (for use by vkDestroyInstance)
layer_copy_tmp_debug_messengers(pCreateInfo->pNext, &my_data->num_tmp_debug_messengers, &my_data->tmp_messenger_create_infos,
&my_data->tmp_debug_messengers);
layer_copy_tmp_report_callbacks(pCreateInfo->pNext, &my_data->num_tmp_report_callbacks, &my_data->tmp_report_create_infos,
&my_data->tmp_report_callbacks);
return result;
}
VKAPI_ATTR void VKAPI_CALL DestroyInstance(VkInstance instance, const VkAllocationCallbacks *pAllocator) {
dispatch_key key = get_dispatch_key(instance);
layer_data *my_data = GetLayerDataPtr(key, layer_data_map);
VkLayerInstanceDispatchTable *pTable = my_data->instance_dispatch_table;
// Enable the temporary callback(s) here to catch cleanup issues:
bool callback_setup = false;
if (my_data->num_tmp_debug_messengers > 0) {
if (!layer_enable_tmp_debug_messengers(my_data->report_data, my_data->num_tmp_debug_messengers,
my_data->tmp_messenger_create_infos, my_data->tmp_debug_messengers)) {
callback_setup = true;
}
}
if (my_data->num_tmp_report_callbacks > 0) {
if (!layer_enable_tmp_report_callbacks(my_data->report_data, my_data->num_tmp_report_callbacks,
my_data->tmp_report_create_infos, my_data->tmp_report_callbacks)) {
callback_setup = true;
}
}
bool threadChecks = startMultiThread();
if (threadChecks) {
startWriteObject(my_data, instance);
}
pTable->DestroyInstance(instance, pAllocator);
if (threadChecks) {
finishWriteObject(my_data, instance);
} else {
finishMultiThread();
}
// Disable and cleanup the temporary callback(s):
if (callback_setup) {
layer_disable_tmp_debug_messengers(my_data->report_data, my_data->num_tmp_debug_messengers, my_data->tmp_debug_messengers);
layer_disable_tmp_report_callbacks(my_data->report_data, my_data->num_tmp_report_callbacks, my_data->tmp_report_callbacks);
}
if (my_data->num_tmp_debug_messengers > 0) {
layer_free_tmp_debug_messengers(my_data->tmp_messenger_create_infos, my_data->tmp_debug_messengers);
my_data->num_tmp_debug_messengers = 0;
}
if (my_data->num_tmp_report_callbacks > 0) {
layer_free_tmp_report_callbacks(my_data->tmp_report_create_infos, my_data->tmp_report_callbacks);
my_data->num_tmp_report_callbacks = 0;
}
// Clean up logging callbacks, if any
while (my_data->logging_messenger.size() > 0) {
VkDebugUtilsMessengerEXT messenger = my_data->logging_messenger.back();
layer_destroy_messenger_callback(my_data->report_data, messenger, pAllocator);
my_data->logging_messenger.pop_back();
}
while (my_data->logging_callback.size() > 0) {
VkDebugReportCallbackEXT callback = my_data->logging_callback.back();
layer_destroy_report_callback(my_data->report_data, callback, pAllocator);
my_data->logging_callback.pop_back();
}
layer_debug_utils_destroy_instance(my_data->report_data);
delete my_data->instance_dispatch_table;
FreeLayerDataPtr(key, layer_data_map);
}
VKAPI_ATTR VkResult VKAPI_CALL CreateDevice(VkPhysicalDevice gpu, const VkDeviceCreateInfo *pCreateInfo,
const VkAllocationCallbacks *pAllocator, VkDevice *pDevice) {
layer_data *my_instance_data = GetLayerDataPtr(get_dispatch_key(gpu), layer_data_map);
VkLayerDeviceCreateInfo *chain_info = get_chain_info(pCreateInfo, VK_LAYER_LINK_INFO);
assert(chain_info->u.pLayerInfo);
PFN_vkGetInstanceProcAddr fpGetInstanceProcAddr = chain_info->u.pLayerInfo->pfnNextGetInstanceProcAddr;
PFN_vkGetDeviceProcAddr fpGetDeviceProcAddr = chain_info->u.pLayerInfo->pfnNextGetDeviceProcAddr;
PFN_vkCreateDevice fpCreateDevice = (PFN_vkCreateDevice)fpGetInstanceProcAddr(my_instance_data->instance, "vkCreateDevice");
if (fpCreateDevice == NULL) {
return VK_ERROR_INITIALIZATION_FAILED;
}
// Advance the link info for the next element on the chain
chain_info->u.pLayerInfo = chain_info->u.pLayerInfo->pNext;
VkResult result = fpCreateDevice(gpu, pCreateInfo, pAllocator, pDevice);
if (result != VK_SUCCESS) {
return result;
}
layer_data *my_device_data = GetLayerDataPtr(get_dispatch_key(*pDevice), layer_data_map);
// Setup device dispatch table
my_device_data->device_dispatch_table = new VkLayerDispatchTable;
layer_init_device_dispatch_table(*pDevice, my_device_data->device_dispatch_table, fpGetDeviceProcAddr);
// Save pCreateInfo device extension list for GetDeviceProcAddr()
for (uint32_t extn = 0; extn < pCreateInfo->enabledExtensionCount; extn++) {
my_device_data->device_extension_set.insert(pCreateInfo->ppEnabledExtensionNames[extn]);
}
my_device_data->report_data = layer_debug_utils_create_device(my_instance_data->report_data, *pDevice);
return result;
}
VKAPI_ATTR void VKAPI_CALL DestroyDevice(VkDevice device, const VkAllocationCallbacks *pAllocator) {
dispatch_key key = get_dispatch_key(device);
layer_data *dev_data = GetLayerDataPtr(key, layer_data_map);
bool threadChecks = startMultiThread();
if (threadChecks) {
startWriteObject(dev_data, device);
}
dev_data->device_dispatch_table->DestroyDevice(device, pAllocator);
if (threadChecks) {
finishWriteObject(dev_data, device);
} else {
finishMultiThread();
}
delete dev_data->device_dispatch_table;
FreeLayerDataPtr(key, layer_data_map);
}
VKAPI_ATTR VkResult VKAPI_CALL GetSwapchainImagesKHR(VkDevice device, VkSwapchainKHR swapchain, uint32_t *pSwapchainImageCount,
VkImage *pSwapchainImages) {
dispatch_key key = get_dispatch_key(device);
layer_data *my_data = GetLayerDataPtr(key, layer_data_map);
VkLayerDispatchTable *pTable = my_data->device_dispatch_table;
VkResult result;
bool threadChecks = startMultiThread();
if (threadChecks) {
startReadObject(my_data, device);
startReadObject(my_data, swapchain);
}
result = pTable->GetSwapchainImagesKHR(device, swapchain, pSwapchainImageCount, pSwapchainImages);
if (threadChecks) {
finishReadObject(my_data, device);
finishReadObject(my_data, swapchain);
} else {
finishMultiThread();
}
return result;
}
static const VkExtensionProperties threading_extensions[] = {{VK_EXT_DEBUG_REPORT_EXTENSION_NAME, VK_EXT_DEBUG_REPORT_SPEC_VERSION},
{VK_EXT_DEBUG_UTILS_EXTENSION_NAME, VK_EXT_DEBUG_UTILS_SPEC_VERSION}};
static const VkLayerProperties layerProps = {
"VK_LAYER_GOOGLE_threading",
VK_LAYER_API_VERSION, // specVersion
1,
"Google Validation Layer",
};
VKAPI_ATTR VkResult VKAPI_CALL EnumerateInstanceLayerProperties(uint32_t *pCount, VkLayerProperties *pProperties) {
return util_GetLayerProperties(1, &layerProps, pCount, pProperties);
}
VKAPI_ATTR VkResult VKAPI_CALL EnumerateDeviceLayerProperties(VkPhysicalDevice physicalDevice, uint32_t *pCount,
VkLayerProperties *pProperties) {
return util_GetLayerProperties(1, &layerProps, pCount, pProperties);
}
VKAPI_ATTR VkResult VKAPI_CALL EnumerateInstanceExtensionProperties(const char *pLayerName, uint32_t *pCount,
VkExtensionProperties *pProperties) {
if (pLayerName && !strcmp(pLayerName, layerProps.layerName))
return util_GetExtensionProperties(1, threading_extensions, pCount, pProperties);
return VK_ERROR_LAYER_NOT_PRESENT;
}
VKAPI_ATTR VkResult VKAPI_CALL EnumerateDeviceExtensionProperties(VkPhysicalDevice physicalDevice, const char *pLayerName,
uint32_t *pCount, VkExtensionProperties *pProperties) {
// Threading layer does not have any device extensions
if (pLayerName && !strcmp(pLayerName, layerProps.layerName))
return util_GetExtensionProperties(0, nullptr, pCount, pProperties);
assert(physicalDevice);
dispatch_key key = get_dispatch_key(physicalDevice);
layer_data *my_data = GetLayerDataPtr(key, layer_data_map);
return my_data->instance_dispatch_table->EnumerateDeviceExtensionProperties(physicalDevice, NULL, pCount, pProperties);
}
// Need to prototype this call because it's internal and does not show up in vk.xml
VKAPI_ATTR PFN_vkVoidFunction VKAPI_CALL GetPhysicalDeviceProcAddr(VkInstance instance, const char *funcName);
VKAPI_ATTR PFN_vkVoidFunction VKAPI_CALL GetDeviceProcAddr(VkDevice device, const char *funcName) {
layer_data *device_data = GetLayerDataPtr(get_dispatch_key(device), layer_data_map);
if (!ApiParentExtensionEnabled(funcName, device_data->device_extension_set)) {
return nullptr;
}
const auto item = name_to_funcptr_map.find(funcName);
if (item != name_to_funcptr_map.end()) {
return reinterpret_cast<PFN_vkVoidFunction>(item->second);
}
auto &table = device_data->device_dispatch_table;
if (!table->GetDeviceProcAddr) return nullptr;
return table->GetDeviceProcAddr(device, funcName);
}
VKAPI_ATTR PFN_vkVoidFunction VKAPI_CALL GetInstanceProcAddr(VkInstance instance, const char *funcName) {
const auto item = name_to_funcptr_map.find(funcName);
if (item != name_to_funcptr_map.end()) {
return reinterpret_cast<PFN_vkVoidFunction>(item->second);
}
auto instance_data = GetLayerDataPtr(get_dispatch_key(instance), layer_data_map);
auto &table = instance_data->instance_dispatch_table;
if (!table->GetInstanceProcAddr) return nullptr;
return table->GetInstanceProcAddr(instance, funcName);
}
VKAPI_ATTR PFN_vkVoidFunction VKAPI_CALL GetPhysicalDeviceProcAddr(VkInstance instance, const char *funcName) {
assert(instance);
layer_data *my_data;
my_data = GetLayerDataPtr(get_dispatch_key(instance), layer_data_map);
VkLayerInstanceDispatchTable *pTable = my_data->instance_dispatch_table;
if (pTable->GetPhysicalDeviceProcAddr == NULL) return NULL;
return pTable->GetPhysicalDeviceProcAddr(instance, funcName);
}
// VK_EXT_debug_utils commands
VKAPI_ATTR VkResult VKAPI_CALL CreateDebugUtilsMessengerEXT(VkInstance instance,
const VkDebugUtilsMessengerCreateInfoEXT *pCreateInfo,
const VkAllocationCallbacks *pAllocator,
VkDebugUtilsMessengerEXT *pMessenger) {
layer_data *my_data = GetLayerDataPtr(get_dispatch_key(instance), layer_data_map);
bool threadChecks = startMultiThread();
if (threadChecks) {
startReadObject(my_data, instance);
}
VkResult result = my_data->instance_dispatch_table->CreateDebugUtilsMessengerEXT(instance, pCreateInfo, pAllocator, pMessenger);
if (VK_SUCCESS == result) {
result = layer_create_messenger_callback(my_data->report_data, false, pCreateInfo, pAllocator, pMessenger);
// If something happened during this call, clean up the message callback that was created earlier in the lower levels
if (VK_SUCCESS != result) {
my_data->instance_dispatch_table->DestroyDebugUtilsMessengerEXT(instance, *pMessenger, pAllocator);
}
}
if (threadChecks) {
finishReadObject(my_data, instance);
} else {
finishMultiThread();
}
return result;
}
VKAPI_ATTR void VKAPI_CALL DestroyDebugUtilsMessengerEXT(VkInstance instance, VkDebugUtilsMessengerEXT messenger,
const VkAllocationCallbacks *pAllocator) {
layer_data *my_data = GetLayerDataPtr(get_dispatch_key(instance), layer_data_map);
bool threadChecks = startMultiThread();
if (threadChecks) {
startReadObject(my_data, instance);
startWriteObject(my_data, messenger);
}
my_data->instance_dispatch_table->DestroyDebugUtilsMessengerEXT(instance, messenger, pAllocator);
layer_destroy_messenger_callback(my_data->report_data, messenger, pAllocator);
if (threadChecks) {
finishReadObject(my_data, instance);
finishWriteObject(my_data, messenger);
} else {
finishMultiThread();
}
}
// VK_EXT_debug_report commands
VKAPI_ATTR VkResult VKAPI_CALL CreateDebugReportCallbackEXT(VkInstance instance,
const VkDebugReportCallbackCreateInfoEXT *pCreateInfo,
const VkAllocationCallbacks *pAllocator,
VkDebugReportCallbackEXT *pMsgCallback) {
layer_data *my_data = GetLayerDataPtr(get_dispatch_key(instance), layer_data_map);
bool threadChecks = startMultiThread();
if (threadChecks) {
startReadObject(my_data, instance);
}
VkResult result =
my_data->instance_dispatch_table->CreateDebugReportCallbackEXT(instance, pCreateInfo, pAllocator, pMsgCallback);
if (VK_SUCCESS == result) {
result = layer_create_report_callback(my_data->report_data, false, pCreateInfo, pAllocator, pMsgCallback);
// If something happened during this call, clean up the message callback that was created earlier in the lower levels
if (VK_SUCCESS != result) {
my_data->instance_dispatch_table->DestroyDebugReportCallbackEXT(instance, *pMsgCallback, pAllocator);
}
}
if (threadChecks) {
finishReadObject(my_data, instance);
} else {
finishMultiThread();
}
return result;
}
VKAPI_ATTR void VKAPI_CALL DestroyDebugReportCallbackEXT(VkInstance instance, VkDebugReportCallbackEXT callback,
const VkAllocationCallbacks *pAllocator) {
layer_data *my_data = GetLayerDataPtr(get_dispatch_key(instance), layer_data_map);
bool threadChecks = startMultiThread();
if (threadChecks) {
startReadObject(my_data, instance);
startWriteObject(my_data, callback);
}
my_data->instance_dispatch_table->DestroyDebugReportCallbackEXT(instance, callback, pAllocator);
layer_destroy_report_callback(my_data->report_data, callback, pAllocator);
if (threadChecks) {
finishReadObject(my_data, instance);
finishWriteObject(my_data, callback);
} else {
finishMultiThread();
}
}
VKAPI_ATTR VkResult VKAPI_CALL AllocateCommandBuffers(VkDevice device, const VkCommandBufferAllocateInfo *pAllocateInfo,
VkCommandBuffer *pCommandBuffers) {
dispatch_key key = get_dispatch_key(device);
layer_data *my_data = GetLayerDataPtr(key, layer_data_map);
VkLayerDispatchTable *pTable = my_data->device_dispatch_table;
VkResult result;
bool threadChecks = startMultiThread();
if (threadChecks) {
startReadObject(my_data, device);
startWriteObject(my_data, pAllocateInfo->commandPool);
}
result = pTable->AllocateCommandBuffers(device, pAllocateInfo, pCommandBuffers);
if (threadChecks) {
finishReadObject(my_data, device);
finishWriteObject(my_data, pAllocateInfo->commandPool);
} else {
finishMultiThread();
}
// Record mapping from command buffer to command pool
if (VK_SUCCESS == result) {
for (uint32_t index = 0; index < pAllocateInfo->commandBufferCount; index++) {
std::lock_guard<std::mutex> lock(command_pool_lock);
command_pool_map[pCommandBuffers[index]] = pAllocateInfo->commandPool;
}
}
return result;
}
VKAPI_ATTR VkResult VKAPI_CALL AllocateDescriptorSets(VkDevice device, const VkDescriptorSetAllocateInfo *pAllocateInfo,
VkDescriptorSet *pDescriptorSets) {
dispatch_key key = get_dispatch_key(device);
layer_data *my_data = GetLayerDataPtr(key, layer_data_map);
VkLayerDispatchTable *pTable = my_data->device_dispatch_table;
VkResult result;
bool threadChecks = startMultiThread();
if (threadChecks) {
startReadObject(my_data, device);
startWriteObject(my_data, pAllocateInfo->descriptorPool);
// Host access to pAllocateInfo::descriptorPool must be externally synchronized
}
result = pTable->AllocateDescriptorSets(device, pAllocateInfo, pDescriptorSets);
if (threadChecks) {
finishReadObject(my_data, device);
finishWriteObject(my_data, pAllocateInfo->descriptorPool);
// Host access to pAllocateInfo::descriptorPool must be externally synchronized
} else {
finishMultiThread();
}
return result;
}
VKAPI_ATTR void VKAPI_CALL FreeCommandBuffers(VkDevice device, VkCommandPool commandPool, uint32_t commandBufferCount,
const VkCommandBuffer *pCommandBuffers) {
dispatch_key key = get_dispatch_key(device);
layer_data *my_data = GetLayerDataPtr(key, layer_data_map);
VkLayerDispatchTable *pTable = my_data->device_dispatch_table;
const bool lockCommandPool = false; // pool is already directly locked
bool threadChecks = startMultiThread();
if (threadChecks) {
startReadObject(my_data, device);
startWriteObject(my_data, commandPool);
for (uint32_t index = 0; index < commandBufferCount; index++) {
startWriteObject(my_data, pCommandBuffers[index], lockCommandPool);
}
// The driver may immediately reuse command buffers in another thread.
// These updates need to be done before calling down to the driver.
for (uint32_t index = 0; index < commandBufferCount; index++) {
finishWriteObject(my_data, pCommandBuffers[index], lockCommandPool);
std::lock_guard<std::mutex> lock(command_pool_lock);
command_pool_map.erase(pCommandBuffers[index]);
}
}
pTable->FreeCommandBuffers(device, commandPool, commandBufferCount, pCommandBuffers);
if (threadChecks) {
finishReadObject(my_data, device);
finishWriteObject(my_data, commandPool);
} else {
finishMultiThread();
}
}
} // namespace threading
// vk_layer_logging.h expects these to be defined
VKAPI_ATTR VkResult VKAPI_CALL vkCreateDebugUtilsMessengerEXT(VkInstance instance,
const VkDebugUtilsMessengerCreateInfoEXT *pCreateInfo,
const VkAllocationCallbacks *pAllocator,
VkDebugUtilsMessengerEXT *pMessenger) {
return threading::CreateDebugUtilsMessengerEXT(instance, pCreateInfo, pAllocator, pMessenger);
}
VKAPI_ATTR void VKAPI_CALL vkDestroyDebugUtilsMessengerEXT(VkInstance instance, VkDebugUtilsMessengerEXT messenger,
const VkAllocationCallbacks *pAllocator) {
threading::DestroyDebugUtilsMessengerEXT(instance, messenger, pAllocator);
}
VKAPI_ATTR void VKAPI_CALL vkSubmitDebugUtilsMessageEXT(VkInstance instance, VkDebugUtilsMessageSeverityFlagBitsEXT messageSeverity,
VkDebugUtilsMessageTypeFlagsEXT messageTypes,
const VkDebugUtilsMessengerCallbackDataEXT *pCallbackData) {
threading::SubmitDebugUtilsMessageEXT(instance, messageSeverity, messageTypes, pCallbackData);
}
VKAPI_ATTR VkResult VKAPI_CALL vkCreateDebugReportCallbackEXT(VkInstance instance,
const VkDebugReportCallbackCreateInfoEXT *pCreateInfo,
const VkAllocationCallbacks *pAllocator,
VkDebugReportCallbackEXT *pMsgCallback) {
return threading::CreateDebugReportCallbackEXT(instance, pCreateInfo, pAllocator, pMsgCallback);
}
VKAPI_ATTR void VKAPI_CALL vkDestroyDebugReportCallbackEXT(VkInstance instance, VkDebugReportCallbackEXT msgCallback,
const VkAllocationCallbacks *pAllocator) {
threading::DestroyDebugReportCallbackEXT(instance, msgCallback, pAllocator);
}
VKAPI_ATTR void VKAPI_CALL vkDebugReportMessageEXT(VkInstance instance, VkDebugReportFlagsEXT flags,
VkDebugReportObjectTypeEXT objType, uint64_t object, size_t location,
int32_t msgCode, const char *pLayerPrefix, const char *pMsg) {
threading::DebugReportMessageEXT(instance, flags, objType, object, location, msgCode, pLayerPrefix, pMsg);
}
// loader-layer interface v0, just wrappers since there is only a layer
VK_LAYER_EXPORT VKAPI_ATTR VkResult VKAPI_CALL vkEnumerateInstanceExtensionProperties(const char *pLayerName, uint32_t *pCount,
VkExtensionProperties *pProperties) {
return threading::EnumerateInstanceExtensionProperties(pLayerName, pCount, pProperties);
}
VK_LAYER_EXPORT VKAPI_ATTR VkResult VKAPI_CALL vkEnumerateInstanceLayerProperties(uint32_t *pCount,
VkLayerProperties *pProperties) {
return threading::EnumerateInstanceLayerProperties(pCount, pProperties);
}
VK_LAYER_EXPORT VKAPI_ATTR VkResult VKAPI_CALL vkEnumerateDeviceLayerProperties(VkPhysicalDevice physicalDevice, uint32_t *pCount,
VkLayerProperties *pProperties) {
// the layer command handles VK_NULL_HANDLE just fine internally
assert(physicalDevice == VK_NULL_HANDLE);
return threading::EnumerateDeviceLayerProperties(VK_NULL_HANDLE, pCount, pProperties);
}
VK_LAYER_EXPORT VKAPI_ATTR VkResult VKAPI_CALL vkEnumerateDeviceExtensionProperties(VkPhysicalDevice physicalDevice,
const char *pLayerName, uint32_t *pCount,
VkExtensionProperties *pProperties) {
// the layer command handles VK_NULL_HANDLE just fine internally
assert(physicalDevice == VK_NULL_HANDLE);
return threading::EnumerateDeviceExtensionProperties(VK_NULL_HANDLE, pLayerName, pCount, pProperties);
}
VK_LAYER_EXPORT VKAPI_ATTR PFN_vkVoidFunction VKAPI_CALL vkGetDeviceProcAddr(VkDevice dev, const char *funcName) {
return threading::GetDeviceProcAddr(dev, funcName);
}
VK_LAYER_EXPORT VKAPI_ATTR PFN_vkVoidFunction VKAPI_CALL vkGetInstanceProcAddr(VkInstance instance, const char *funcName) {
return threading::GetInstanceProcAddr(instance, funcName);
}
VK_LAYER_EXPORT VKAPI_ATTR PFN_vkVoidFunction VKAPI_CALL vk_layerGetPhysicalDeviceProcAddr(VkInstance instance,
const char *funcName) {
return threading::GetPhysicalDeviceProcAddr(instance, funcName);
}
VK_LAYER_EXPORT VKAPI_ATTR VkResult VKAPI_CALL vkNegotiateLoaderLayerInterfaceVersion(VkNegotiateLayerInterface *pVersionStruct) {
assert(pVersionStruct != NULL);
assert(pVersionStruct->sType == LAYER_NEGOTIATE_INTERFACE_STRUCT);
// Fill in the function pointers if our version is at least capable of having the structure contain them.
if (pVersionStruct->loaderLayerInterfaceVersion >= 2) {
pVersionStruct->pfnGetInstanceProcAddr = vkGetInstanceProcAddr;
pVersionStruct->pfnGetDeviceProcAddr = vkGetDeviceProcAddr;
pVersionStruct->pfnGetPhysicalDeviceProcAddr = vk_layerGetPhysicalDeviceProcAddr;
}
if (pVersionStruct->loaderLayerInterfaceVersion < CURRENT_LOADER_LAYER_INTERFACE_VERSION) {
threading::loader_layer_if_version = pVersionStruct->loaderLayerInterfaceVersion;
} else if (pVersionStruct->loaderLayerInterfaceVersion > CURRENT_LOADER_LAYER_INTERFACE_VERSION) {
pVersionStruct->loaderLayerInterfaceVersion = CURRENT_LOADER_LAYER_INTERFACE_VERSION;
}
return VK_SUCCESS;
}
|
TITLE NHINIT.ASM - Near Heap Initialization/Termination module
;***
;NHINIT.ASM - Near Heap initialization/termination module
;
; Copyright <C> 1986, Microsoft Corporation
;
;Purpose:
; This module contains near heap managment initialization and termination
; support for the BASIC 3.0 runtime. This module will only be present
; in a user's program when a program contains statements which need
; dynamic memory management.
;
;******************************************************************************
INCLUDE switch.inc
INCLUDE rmacros.inc
;
; Code Segments
;
USESEG <INIT_CODE> ;Initialization
USESEG <NH_TEXT> ;Near Heap
USESEG <ER_TEXT> ;Error handler
USESEG <RT_TEXT> ;RunTime Core
USESEG <DV_TEXT>
;
; Data Segments
;
USESEG <_BSS> ;runtime data (uninitialized)
USESEG <_DATA> ;runtime data (initialized)
USESEG <XIB> ; XIB and XIE must bracket XI!
USESEG <XI> ;initializer segment
USESEG <XIE>
INCLUDE seg.inc
INCLUDE compvect.inc ;component vectors
INCLUDE messages.inc ;error/message definitions.
INCLUDE idmac.inc ; debugging macros
INITIALIZER B$xNHINI ;put B$xNHINI in initializer list.
SUBTTL Code Externals
PAGE
sBegin DV_TEXT
externNP B$NearRet ;for disp vectors in compvect.inc
sEnd DV_TEXT
sBegin ER_TEXT
externNP B$ERR_OM_NH ; Runtime Out of Memory error
externNP B$RUNERR ;runtime error handler
sEnd ER_TEXT
sBegin NH_TEXT
externNP B$NHINIT ;routine to initialize and reset near heap.
externNP B$NHCLEAN ; Clean local heap and string space.
externNP B$VarHeap_CPCT ;crunches down var heap
externNP B$LHDALC_CPCT
externNP B$STDALCTMP ;erprococ all string temps
externNP B$STDALCALLTMP ;erprococ all string temps
sEnd NH_TEXT
PAGE
SUBTTL Runtime data definitions for BASIC Near Heap
sBegin _DATA
;
; Global Data
;
globalW b$NH_first,0 ;first word of near heap space
globalW b$NH_last,0 ;last word of near heap space
;
; external data
;
externW b$ini_disp ;One time initialization dispatch table
externW b$run_disp ;RUN time initialization dispatch table
externW b$clrt_disp ; CLEAR statement support dispatch table
externW b$err_disp ; error dispatch table
externW b$pSTDALCALLTMP ; indirect B$STDALCALLTMP vector
externW b$pSTDALCTMP ; indirect B$STDALCTMP vector
externW b$pLHDALC_CPCT ; indirect B$LHDALC_CPCT vector
externW __atopsp ;top word allocated to stack
externW __asizds ;top of allocated DGROUP (64K or max avail)
externW b$HugeDelta
externB b$HugeShift
sEnd _DATA
sBegin _BSS
externW b$curlevel ;defined in NHSTUTIL.ASM
sEnd _BSS
SUBTTL Runtime Near Heap Initialization
PAGE
assumes CS,INIT_CODE
sBegin INIT_CODE
;***
;B$xNHINI - Near Heap initializer
;PLM B$xNHINI()
;
;Purpose:
; Initializer for Near Heap component. This routine is called
; by the Crt0 startup before _main is called. It will update the
; indirect dispatch tables for the Near Heap routines. This
; insures that the only time that Near Heap is accessed is when
; this module is linked into the user program.
;
;Entry:
; None.
;
;Exit:
; Appropriate dispatch vectors filled.
;
;Uses:
; None.
;
;Exceptions:
; None.
;****
cProc B$xNHINI,<FAR>
cBegin
;
; update "ONE" time initialization dispatch address to B$NHINI
;
MOV WORD PTR [b$ini_disp].NH_IVEC,NH_TEXTOFFSET B$NHINI
;
; update "RUN" time initialization dispatch address to B$NHCLR
;
MOV WORD PTR [b$run_disp].NH_RVEC,NH_TEXTOFFSET B$NHCLR
;
; update CLEAR statement termination dispatch address to B$NHCLR
;
MOV WORD PTR [b$clrt_disp].NH_CLTVEC,NH_TEXTOFFSET B$NHCLR
;
; update error dispatch address to B$NHERR
;
MOV WORD PTR [b$err_disp].XH_ERVEC,NH_TEXTOFFSET B$NHERR
;
; initialize /O granularity vectors
;
MOV [b$pSTDALCALLTMP],NH_TEXTOFFSET B$STDALCALLTMP
MOV [b$pSTDALCTMP],NH_TEXTOFFSET B$STDALCTMP
MOV [b$pLHDALC_CPCT],NH_TEXTOFFSET B$LHDALC_CPCT
cEnd
sEnd INIT_CODE
assumes CS,NH_TEXT
sBegin NH_TEXT
;***
;B$NHINI - One time initialization for Near Heap
;void pascal B$NHINI()
;
;Purpose:
; BC3
; ---
; Initializes near heap manager.
; B$NHINI does the following:
; allocates all free space in DGROUP.
; initializes global heap shadow variables.
;
;Entry:
; None.
;
;Exit:
; b$NH_first - points to first unallocated word in DGROUP.
; b$NH_last - points to last unallocated word in DGROUP.
;
; Note: these variables must lie on the first byte of an eight
; byte boundary.
;
;Uses:
; None.
;
;Exceptions:
; None.
;
;****
cProc B$NHINI,<NEAR,PUBLIC>
cBegin
MOV b$HugeShift,12 ;Huge shift is 12 for DOS 3
MOV b$HugeDelta,1000H ;save seg increment for DOS 3
MOV CX,__atopsp ;get top of stack
MOV AX,__asizds ;get top of allocated DGROUP (64K or max
AND AL,0FEH ;available - round down to next word
CMP AX,CX ;check to see if any room for heap
JB FATAL ;out of memory if not
; (CX) = first available byte
; (AX) = last available byte
MOV b$NH_first,CX ;Set starting offset of near heap
MOV b$NH_last,AX ;Set ending offset of near heap
cCall B$NHRST ;only reset NH once for interp
cEnd
FATAL:
MOV BX,FE_MEMORY ;OUT OF MEMORY error code
JMP FAR PTR B$RUNERR ;fatal error - get out of town
;***
;B$NHERR - Reset the Near Heap at error time
;void pascal B$NHERR()
;
;Purpose:
; Deallocates all temp strings
;
;Entry:
;
;Exit:
; None.
;
;Uses:
; None.
;
;Exceptions:
; None.
;****
cProc B$NHERR,<NEAR>
cBegin
MOV AX,b$curlevel ;at or above current level...
CALL B$STDALCALLTMP ;deallocate all string temps.
cEnd
;***
;B$NHRST - Reset the Near Heap based upon the shadow values.
;void pascal B$NHRST()
;
;Purpose:
;
;Entry:
; b$NH_first - points to first byte of the near heap
; b$NH_last - points to last word of the near heap
;
;Exit:
; None.
;
;Uses:
; None.
;
;Exceptions:
; None.
;****
cProc B$NHRST,<NEAR>
cBegin
MOV AX,b$NH_first ;get first word of dynamic space
MOV CX,b$NH_last ;get last word of dynamic space
cCall B$NHINIT ;Initialize Near Heap
JNC RESET_OK ;Was memory set up ok?
JMP B$ERR_OM_NH ;Issue "out of memory" error
RESET_OK:
cEnd
;***
;B$NHCLR - Clean string space and local heap
;Purpose:
; To clean the string space and local heap of entries whose
; descriptors are not in interpreter entries or other special areas.
; This routine is used during the RUN init, NEW and CLEAR process.
;
;Entry:
; None.
;Exit:
; None.
;Modifies:
; Per Convention.
;Exceptions:
; None.
;
;Added as part of [7]
;****
cProc B$NHCLR,<PUBLIC,NEAR>,ES
cBegin
XOR AX,AX
MOV b$curlevel,AX ;set current level to main (0)
CALL B$STDALCALLTMP ;deallocate all string temps.
PUSH DS
POP ES ; requires ES set
CALL B$NHCLEAN ; clean local heap and string space.
CALL B$VarHeap_CPCT
cEnd
sEnd NH_TEXT
END
|
; size_t dtog(double x, char *buf, uint16_t prec, uint16_t flag) __z88dk_callee
SECTION code_stdlib
PUBLIC _dtog_callee
EXTERN dcallee1, asm_dtog
_dtog_callee:
call dcallee1 ; AC' = x
pop af
pop hl
pop de
pop bc
push af
jp asm_dtog
|
;--------------------------------------------------------
; File Created by SDCC : free open source ANSI-C Compiler
; Version 4.1.6 #12555 (Linux)
;--------------------------------------------------------
; Processed by Z88DK
;--------------------------------------------------------
EXTERN __divschar
EXTERN __divschar_callee
EXTERN __divsint
EXTERN __divsint_callee
EXTERN __divslong
EXTERN __divslong_callee
EXTERN __divslonglong
EXTERN __divslonglong_callee
EXTERN __divsuchar
EXTERN __divsuchar_callee
EXTERN __divuchar
EXTERN __divuchar_callee
EXTERN __divuint
EXTERN __divuint_callee
EXTERN __divulong
EXTERN __divulong_callee
EXTERN __divulonglong
EXTERN __divulonglong_callee
EXTERN __divuschar
EXTERN __divuschar_callee
EXTERN __modschar
EXTERN __modschar_callee
EXTERN __modsint
EXTERN __modsint_callee
EXTERN __modslong
EXTERN __modslong_callee
EXTERN __modslonglong
EXTERN __modslonglong_callee
EXTERN __modsuchar
EXTERN __modsuchar_callee
EXTERN __moduchar
EXTERN __moduchar_callee
EXTERN __moduint
EXTERN __moduint_callee
EXTERN __modulong
EXTERN __modulong_callee
EXTERN __modulonglong
EXTERN __modulonglong_callee
EXTERN __moduschar
EXTERN __moduschar_callee
EXTERN __mulint
EXTERN __mulint_callee
EXTERN __mullong
EXTERN __mullong_callee
EXTERN __mullonglong
EXTERN __mullonglong_callee
EXTERN __mulschar
EXTERN __mulschar_callee
EXTERN __mulsuchar
EXTERN __mulsuchar_callee
EXTERN __muluchar
EXTERN __muluchar_callee
EXTERN __muluschar
EXTERN __muluschar_callee
EXTERN __rlslonglong
EXTERN __rlslonglong_callee
EXTERN __rlulonglong
EXTERN __rlulonglong_callee
EXTERN __rrslonglong
EXTERN __rrslonglong_callee
EXTERN __rrulonglong
EXTERN __rrulonglong_callee
EXTERN ___sdcc_call_hl
EXTERN ___sdcc_call_iy
EXTERN ___sdcc_enter_ix
EXTERN banked_call
EXTERN _banked_ret
EXTERN ___fs2schar
EXTERN ___fs2schar_callee
EXTERN ___fs2sint
EXTERN ___fs2sint_callee
EXTERN ___fs2slong
EXTERN ___fs2slong_callee
EXTERN ___fs2slonglong
EXTERN ___fs2slonglong_callee
EXTERN ___fs2uchar
EXTERN ___fs2uchar_callee
EXTERN ___fs2uint
EXTERN ___fs2uint_callee
EXTERN ___fs2ulong
EXTERN ___fs2ulong_callee
EXTERN ___fs2ulonglong
EXTERN ___fs2ulonglong_callee
EXTERN ___fsadd
EXTERN ___fsadd_callee
EXTERN ___fsdiv
EXTERN ___fsdiv_callee
EXTERN ___fseq
EXTERN ___fseq_callee
EXTERN ___fsgt
EXTERN ___fsgt_callee
EXTERN ___fslt
EXTERN ___fslt_callee
EXTERN ___fsmul
EXTERN ___fsmul_callee
EXTERN ___fsneq
EXTERN ___fsneq_callee
EXTERN ___fssub
EXTERN ___fssub_callee
EXTERN ___schar2fs
EXTERN ___schar2fs_callee
EXTERN ___sint2fs
EXTERN ___sint2fs_callee
EXTERN ___slong2fs
EXTERN ___slong2fs_callee
EXTERN ___slonglong2fs
EXTERN ___slonglong2fs_callee
EXTERN ___uchar2fs
EXTERN ___uchar2fs_callee
EXTERN ___uint2fs
EXTERN ___uint2fs_callee
EXTERN ___ulong2fs
EXTERN ___ulong2fs_callee
EXTERN ___ulonglong2fs
EXTERN ___ulonglong2fs_callee
EXTERN ____sdcc_2_copy_src_mhl_dst_deix
EXTERN ____sdcc_2_copy_src_mhl_dst_bcix
EXTERN ____sdcc_4_copy_src_mhl_dst_deix
EXTERN ____sdcc_4_copy_src_mhl_dst_bcix
EXTERN ____sdcc_4_copy_src_mhl_dst_mbc
EXTERN ____sdcc_4_ldi_nosave_bc
EXTERN ____sdcc_4_ldi_save_bc
EXTERN ____sdcc_4_push_hlix
EXTERN ____sdcc_4_push_mhl
EXTERN ____sdcc_lib_setmem_hl
EXTERN ____sdcc_ll_add_de_bc_hl
EXTERN ____sdcc_ll_add_de_bc_hlix
EXTERN ____sdcc_ll_add_de_hlix_bc
EXTERN ____sdcc_ll_add_de_hlix_bcix
EXTERN ____sdcc_ll_add_deix_bc_hl
EXTERN ____sdcc_ll_add_deix_hlix
EXTERN ____sdcc_ll_add_hlix_bc_deix
EXTERN ____sdcc_ll_add_hlix_deix_bc
EXTERN ____sdcc_ll_add_hlix_deix_bcix
EXTERN ____sdcc_ll_asr_hlix_a
EXTERN ____sdcc_ll_asr_mbc_a
EXTERN ____sdcc_ll_copy_src_de_dst_hlix
EXTERN ____sdcc_ll_copy_src_de_dst_hlsp
EXTERN ____sdcc_ll_copy_src_deix_dst_hl
EXTERN ____sdcc_ll_copy_src_deix_dst_hlix
EXTERN ____sdcc_ll_copy_src_deixm_dst_hlsp
EXTERN ____sdcc_ll_copy_src_desp_dst_hlsp
EXTERN ____sdcc_ll_copy_src_hl_dst_de
EXTERN ____sdcc_ll_copy_src_hlsp_dst_de
EXTERN ____sdcc_ll_copy_src_hlsp_dst_deixm
EXTERN ____sdcc_ll_lsl_hlix_a
EXTERN ____sdcc_ll_lsl_mbc_a
EXTERN ____sdcc_ll_lsr_hlix_a
EXTERN ____sdcc_ll_lsr_mbc_a
EXTERN ____sdcc_ll_push_hlix
EXTERN ____sdcc_ll_push_mhl
EXTERN ____sdcc_ll_sub_de_bc_hl
EXTERN ____sdcc_ll_sub_de_bc_hlix
EXTERN ____sdcc_ll_sub_de_hlix_bc
EXTERN ____sdcc_ll_sub_de_hlix_bcix
EXTERN ____sdcc_ll_sub_deix_bc_hl
EXTERN ____sdcc_ll_sub_deix_hlix
EXTERN ____sdcc_ll_sub_hlix_bc_deix
EXTERN ____sdcc_ll_sub_hlix_deix_bc
EXTERN ____sdcc_ll_sub_hlix_deix_bcix
EXTERN ____sdcc_load_debc_deix
EXTERN ____sdcc_load_dehl_deix
EXTERN ____sdcc_load_debc_mhl
EXTERN ____sdcc_load_hlde_mhl
EXTERN ____sdcc_store_dehl_bcix
EXTERN ____sdcc_store_debc_hlix
EXTERN ____sdcc_store_debc_mhl
EXTERN ____sdcc_cpu_pop_ei
EXTERN ____sdcc_cpu_pop_ei_jp
EXTERN ____sdcc_cpu_push_di
EXTERN ____sdcc_outi
EXTERN ____sdcc_outi_128
EXTERN ____sdcc_outi_256
EXTERN ____sdcc_ldi
EXTERN ____sdcc_ldi_128
EXTERN ____sdcc_ldi_256
EXTERN ____sdcc_4_copy_srcd_hlix_dst_deix
EXTERN ____sdcc_4_and_src_mbc_mhl_dst_deix
EXTERN ____sdcc_4_or_src_mbc_mhl_dst_deix
EXTERN ____sdcc_4_xor_src_mbc_mhl_dst_deix
EXTERN ____sdcc_4_or_src_dehl_dst_bcix
EXTERN ____sdcc_4_xor_src_dehl_dst_bcix
EXTERN ____sdcc_4_and_src_dehl_dst_bcix
EXTERN ____sdcc_4_xor_src_mbc_mhl_dst_debc
EXTERN ____sdcc_4_or_src_mbc_mhl_dst_debc
EXTERN ____sdcc_4_and_src_mbc_mhl_dst_debc
EXTERN ____sdcc_4_cpl_src_mhl_dst_debc
EXTERN ____sdcc_4_xor_src_debc_mhl_dst_debc
EXTERN ____sdcc_4_or_src_debc_mhl_dst_debc
EXTERN ____sdcc_4_and_src_debc_mhl_dst_debc
EXTERN ____sdcc_4_and_src_debc_hlix_dst_debc
EXTERN ____sdcc_4_or_src_debc_hlix_dst_debc
EXTERN ____sdcc_4_xor_src_debc_hlix_dst_debc
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
GLOBAL _m32_tanf
;--------------------------------------------------------
; Externals used
;--------------------------------------------------------
GLOBAL _m32_polyf
GLOBAL _m32_hypotf
GLOBAL _m32_ldexpf
GLOBAL _m32_frexpf
GLOBAL _m32_invsqrtf
GLOBAL _m32_sqrtf
GLOBAL _m32_invf
GLOBAL _m32_sqrf
GLOBAL _m32_div2f
GLOBAL _m32_mul2f
GLOBAL _m32_modff
GLOBAL _m32_fmodf
GLOBAL _m32_roundf
GLOBAL _m32_floorf
GLOBAL _m32_fabsf
GLOBAL _m32_ceilf
GLOBAL _m32_powf
GLOBAL _m32_log10f
GLOBAL _m32_log2f
GLOBAL _m32_logf
GLOBAL _m32_exp10f
GLOBAL _m32_exp2f
GLOBAL _m32_expf
GLOBAL _m32_atanhf
GLOBAL _m32_acoshf
GLOBAL _m32_asinhf
GLOBAL _m32_tanhf
GLOBAL _m32_coshf
GLOBAL _m32_sinhf
GLOBAL _m32_atan2f
GLOBAL _m32_atanf
GLOBAL _m32_acosf
GLOBAL _m32_asinf
GLOBAL _m32_cosf
GLOBAL _m32_sinf
GLOBAL _poly_callee
GLOBAL _poly
GLOBAL _exp10_fastcall
GLOBAL _exp10
GLOBAL _mul10u_fastcall
GLOBAL _mul10u
GLOBAL _mul2_fastcall
GLOBAL _mul2
GLOBAL _div2_fastcall
GLOBAL _div2
GLOBAL _invsqrt_fastcall
GLOBAL _invsqrt
GLOBAL _inv_fastcall
GLOBAL _inv
GLOBAL _sqr_fastcall
GLOBAL _sqr
GLOBAL _neg_fastcall
GLOBAL _neg
GLOBAL _isunordered_callee
GLOBAL _isunordered
GLOBAL _islessgreater_callee
GLOBAL _islessgreater
GLOBAL _islessequal_callee
GLOBAL _islessequal
GLOBAL _isless_callee
GLOBAL _isless
GLOBAL _isgreaterequal_callee
GLOBAL _isgreaterequal
GLOBAL _isgreater_callee
GLOBAL _isgreater
GLOBAL _fma_callee
GLOBAL _fma
GLOBAL _fmin_callee
GLOBAL _fmin
GLOBAL _fmax_callee
GLOBAL _fmax
GLOBAL _fdim_callee
GLOBAL _fdim
GLOBAL _nexttoward_callee
GLOBAL _nexttoward
GLOBAL _nextafter_callee
GLOBAL _nextafter
GLOBAL _nan_fastcall
GLOBAL _nan
GLOBAL _copysign_callee
GLOBAL _copysign
GLOBAL _remquo_callee
GLOBAL _remquo
GLOBAL _remainder_callee
GLOBAL _remainder
GLOBAL _fmod_callee
GLOBAL _fmod
GLOBAL _modf_callee
GLOBAL _modf
GLOBAL _trunc_fastcall
GLOBAL _trunc
GLOBAL _lround_fastcall
GLOBAL _lround
GLOBAL _round_fastcall
GLOBAL _round
GLOBAL _lrint_fastcall
GLOBAL _lrint
GLOBAL _rint_fastcall
GLOBAL _rint
GLOBAL _nearbyint_fastcall
GLOBAL _nearbyint
GLOBAL _floor_fastcall
GLOBAL _floor
GLOBAL _ceil_fastcall
GLOBAL _ceil
GLOBAL _tgamma_fastcall
GLOBAL _tgamma
GLOBAL _lgamma_fastcall
GLOBAL _lgamma
GLOBAL _erfc_fastcall
GLOBAL _erfc
GLOBAL _erf_fastcall
GLOBAL _erf
GLOBAL _cbrt_fastcall
GLOBAL _cbrt
GLOBAL _sqrt_fastcall
GLOBAL _sqrt
GLOBAL _pow_callee
GLOBAL _pow
GLOBAL _hypot_callee
GLOBAL _hypot
GLOBAL _fabs_fastcall
GLOBAL _fabs
GLOBAL _logb_fastcall
GLOBAL _logb
GLOBAL _log2_fastcall
GLOBAL _log2
GLOBAL _log1p_fastcall
GLOBAL _log1p
GLOBAL _log10_fastcall
GLOBAL _log10
GLOBAL _log_fastcall
GLOBAL _log
GLOBAL _scalbln_callee
GLOBAL _scalbln
GLOBAL _scalbn_callee
GLOBAL _scalbn
GLOBAL _ldexp_callee
GLOBAL _ldexp
GLOBAL _ilogb_fastcall
GLOBAL _ilogb
GLOBAL _frexp_callee
GLOBAL _frexp
GLOBAL _expm1_fastcall
GLOBAL _expm1
GLOBAL _exp2_fastcall
GLOBAL _exp2
GLOBAL _exp_fastcall
GLOBAL _exp
GLOBAL _tanh_fastcall
GLOBAL _tanh
GLOBAL _sinh_fastcall
GLOBAL _sinh
GLOBAL _cosh_fastcall
GLOBAL _cosh
GLOBAL _atanh_fastcall
GLOBAL _atanh
GLOBAL _asinh_fastcall
GLOBAL _asinh
GLOBAL _acosh_fastcall
GLOBAL _acosh
GLOBAL _tan_fastcall
GLOBAL _tan
GLOBAL _sin_fastcall
GLOBAL _sin
GLOBAL _cos_fastcall
GLOBAL _cos
GLOBAL _atan2_callee
GLOBAL _atan2
GLOBAL _atan_fastcall
GLOBAL _atan
GLOBAL _asin_fastcall
GLOBAL _asin
GLOBAL _acos_fastcall
GLOBAL _acos
;--------------------------------------------------------
; special function registers
;--------------------------------------------------------
;--------------------------------------------------------
; ram data
;--------------------------------------------------------
SECTION bss_compiler
;--------------------------------------------------------
; ram data
;--------------------------------------------------------
IF 0
; .area _INITIALIZED removed by z88dk
ENDIF
;--------------------------------------------------------
; absolute external ram data
;--------------------------------------------------------
SECTION IGNORE
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
SECTION code_crt_init
;--------------------------------------------------------
; Home
;--------------------------------------------------------
SECTION IGNORE
;--------------------------------------------------------
; code
;--------------------------------------------------------
SECTION code_compiler
; ---------------------------------
; Function m32_tanf
; ---------------------------------
_m32_tanf:
push ix
ld ix,0
add ix,sp
push af
push af
push hl
push de
call _m32_sinf
ld (ix-4),l
ld (ix-3),h
ld (ix-2),e
ld (ix-1),d
pop de
pop hl
call _m32_cosf
push de
push hl
ld l,(ix-2)
ld h,(ix-1)
push hl
ld l,(ix-4)
ld h,(ix-3)
push hl
call ___fsdiv
ld sp,ix
pop ix
ret
SECTION IGNORE
|
###############################################################################
# File : clo.asm
# Project : MIPS32 MUX
# Author: : Grant Ayers (ayers@cs.stanford.edu)
#
# Standards/Formatting:
# MIPS gas, soft tab, 80 column
#
# Description:
# Test the functionality of the 'clo' instruction.
#
###############################################################################
.section .test, "x"
.balign 4
.set noreorder
.global test
.ent test
test:
lui $s0, 0xbfff # Load the base address 0xbffffff0
ori $s0, 0xfff0
ori $s1, $0, 1 # Prepare the 'done' status
#### Test code start ####
lui $t2, 0xffff # 32
ori $t2, 0xffff
lui $t3, 0xffff # 18
ori $t3, 0xc000
lui $t4, 0xf800 # 5
lui $t5, 0xf000 # 4
lui $t6, 0x7fff # 0
ori $t7, $0, 0 # 0
clo $s2, $t2
clo $s3, $t3
clo $s4, $t4
clo $s5, $t5
clo $s6, $t6
clo $s7, $t7
addiu $s2, -32
addiu $s3, -18
addiu $s4, -5
addiu $s5, -4
addiu $s6, 0
addiu $s7, 0
or $v1, $s2, $s3
or $v1, $v1, $s4
or $v1, $v1, $s5
or $v1, $v1, $s6
or $v1, $v1, $s7
sltiu $v0, $v1, 1
#### Test code end ####
sw $v0, 8($s0) # Set the test result
sw $s1, 4($s0) # Set 'done'
$done:
jr $ra
nop
.end test
|
BITS 64
;TEST_FILE_META_BEGIN
;TEST_TYPE=TEST_F
;TEST_IGNOREFLAGS=
;TEST_FILE_META_END
; put 2 into ecx for future load into xmm0
mov ecx, 2
cvtsi2sd xmm0, ecx
;TEST_BEGIN_RECORDING
cvtsd2ss xmm1, xmm0
;TEST_END_RECORDING
xor ecx, ecx
cvtsi2sd xmm0, ecx
cvtsi2sd xmm1, ecx
|
-- 7 Billion Humans (2087) --
-- 6: Little Exterminator 1 --
-- Author: landfillbaby
-- Size: 8
-- Speed: 27
a:
if s != hole:
step s
pickup c
endif
if s == hole and
se == hole and
w != hole and
nw == hole:
step w
endif
if s == hole and
sw == hole and
e != hole:
step e
endif
jump a
|
; A240924: Digital root of squares of numbers not divisible by 2, 3 or 5.
; 1,4,4,7,1,1,7,4,7,1,7,4,4,7,1,7,4,7,1,1,7,4,4,1,1,4,4,7,1,1,7,4,7,1,7,4,4,7,1,7,4,7,1,1,7,4,4,1,1,4,4,7,1,1,7,4,7,1,7,4,4,7,1,7,4,7,1,1,7,4,4,1,1,4,4,7,1,1,7,4,7,1,7,4,4,7,1,7,4,7,1,1,7,4,4,1,1,4,4,7,1,1,7,4,7,1,7,4,4,7,1,7,4,7,1,1,7,4,4,1,1,4,4,7,1,1,7,4,7,1,7,4,4,7,1,7,4,7,1,1,7,4,4,1,1,4,4,7,1,1,7,4,7,1,7,4,4,7,1,7,4,7,1,1,7,4,4,1,1,4,4,7,1,1,7,4,7,1,7,4,4,7,1,7,4,7,1,1,7,4,4,1,1,4,4,7,1,1,7,4,7,1,7,4,4,7,1,7,4,7,1,1,7,4,4,1,1,4,4,7,1,1,7,4,7,1,7,4,4,7,1,7,4,7,1,1,7,4,4,1,1,4,4,7,1,1,7,4,7,1
cal $0,84968 ; Multiples of 7 coprime to 30.
mul $0,2
pow $0,2
lpb $0,1
add $0,2
mod $0,9
lpe
mov $1,$0
div $1,3
mul $1,3
add $1,1
|
// Copyright: Copyright (C) 2022 Doğa Can Yanıkoğlu
// Source Code: https://github.com/dyanikoglu/ALS-Community
#include "Character/Animation/Notify/ALSNotifyStateEarlyBlendOut.h"
#include "Character/ALSBaseCharacter.h"
void UALSNotifyStateEarlyBlendOut::NotifyTick(USkeletalMeshComponent* MeshComp, UAnimSequenceBase* Animation,
float FrameDeltaTime, const FAnimNotifyEventReference& EventReference)
{
Super::NotifyTick(MeshComp, Animation, FrameDeltaTime, EventReference);
if (!MeshComp || !MeshComp->GetAnimInstance())
{
return;
}
UAnimInstance* AnimInstance = MeshComp->GetAnimInstance();
AALSBaseCharacter* OwnerCharacter = Cast<AALSBaseCharacter>(MeshComp->GetOwner());
if (!OwnerCharacter || !AnimInstance)
{
return;
}
bool bStopMontage = false;
if (bCheckMovementState && OwnerCharacter->GetMovementState() == MovementStateEquals)
{
bStopMontage = true;
}
else if (bCheckStance && OwnerCharacter->GetStance() == StanceEquals)
{
bStopMontage = true;
}
else if (bCheckMovementInput && OwnerCharacter->HasMovementInput())
{
bStopMontage = true;
}
if (bStopMontage)
{
AnimInstance->Montage_Stop(BlendOutTime, ThisMontage);
}
}
FString UALSNotifyStateEarlyBlendOut::GetNotifyName_Implementation() const
{
return FString(TEXT("Early Blend Out"));
}
|
; ===============================================================
; Dec 2013
; ===============================================================
;
; char *_strrstrip(const char *s)
;
; Return ptr to first whitespace char of the trailing whitespace
; chars in s.
;
; If s consists entirely of whitespace then s is returned.
;
; See also strrstrip() that modifies s.
;
; ===============================================================
SECTION code_clib
SECTION code_string
PUBLIC asm__strrstrip
EXTERN asm_strlen, asm_isspace
asm__strrstrip:
; enter : hl = char *s
;
; exit : hl = ptr to first ws char of trailing ws chars in s
; de = char *s
; carry reset if s is entirely whitespace
;
; uses : af, bc, de, hl
ld e,l
ld d,h ; de = char *s
; find strlen(s) and terminating NUL
call asm_strlen
jr z, exit ; if strlen(s) == 0
ld c,l
ld b,h ; bc = strlen(s)
add hl,de ; hl = s + strlen(s)
dec hl ; hl points at last char in s
loop:
ld a,(hl)
call asm_isspace
jr c, not_ws
IF __CPU_GBZ80__ || __CPU_INTEL__
dec hl
dec bc
ld a,b
or c
jr nz,loop
ELSE
cpd ; hl--, bc--
jp pe, loop
ENDIF
all_ws:
exit:
ld l,e
ld h,d
ret
not_ws:
inc hl ; past non-ws char
ret
|
; COPYRIGHT (c) 1995,99,2002 XDS. All Rights Reserved.
; Implementation for cos & cosl functions
cpu 386
bits 32
%ifdef OS2
group DGROUP _DATA
section _DATA use32 align=4 FLAT public 'DATA'
%else
group DGROUP _DATA
section _DATA use32 align=4 public 'DATA'
%endif
%ifdef OS2
section .text use32 align=4 FLAT public 'CODE'
%else
section .text use32 align=16 public 'CODE'
%endif
; assume cs: .text, ds: DGROUP, gs: nothing, fs: nothing
;PROCEDURE ["StdCall"] X2C_cos(x: REAL): REAL
global X2C_cos
X2C_cos:
fld dword [esp+4]
fcos
fstsw ax
test ah, 004H
jz X2C_cos_L2
fld1 ; cos argument is out of -2^63..+2^63
fldpi
fscale
fstp st1
fxch st1
X2C_cos_L1:
fprem1
fstsw ax
test ah, 004H
jnz X2C_cos_L1
fstp ST1
fcos
X2C_cos_L2:
ret 4h
;X2C_cos endp
;PROCEDURE [2] X2C_cosl(x: LONGREAL): LONGREAL
global X2C_cosl
X2C_cosl:
fld qword [esp+4]
fcos
fstsw ax
test ah, 004H
jz X2C_cosl_L4
fld1 ; cos argument is out of -2^63..+2^63
fldpi
fscale
fstp st1
fxch st1
X2C_cosl_L3:
fprem1
fstsw ax
test ah, 004H
jnz X2C_cosl_L3
fstp st1
fcos
X2C_cosl_L4:
ret 8h
;X2C_cosl endp
|
;MusicMaker for Chip16
;Shendo, May 2011
;
;r0 - Selector X coordinate (in board coordinates)
;r1 - Selector Y coordinate (in board coordinates)
;r2 - Unused
;r3 - Unused
;r4 - Unused
;r5 - Unused
;r6 - Play timeout
;r7 - Play cursor (0 to 29)
;r8 - Player state (0 - stopped, 1 - playing)
;r9 - PAD1 timeout
;ra - Scratchpad
;rb - Scratchpad
;rc - Scratchpad
;rd - Scratchpad / Sprite memory location
;re - Scratchpad / Sprite X coordinate
;rf - Scratchpad / Sprite Y coordinate
;
;ASCII Index (0xFF is the string terminator):
;00 01 02 03 04 05 06 07 08 09 HEX
;00 01 02 03 04 05 06 07 08 09 DEC
; 0 1 2 3 4 5 6 7 8 9 SPR
;
;0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 HEX
;10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 DEC
; A B C D E F G H I J K L M N O P Q R S T U V W X Y Z SPR
;
;24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D HEX
;36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 DEC
; a b c d e f g h i j k l m n o p q r s t u v w x y z SPR
;
;3E 3F 40 41 42 43 44 45 46 47 HEX
;62 63 64 65 66 67 68 69 70 71 DEC
; ! - / , . : ( ) & SPR
;GRAPHIC DATA
importbin block_gray.bin 0 32 block_gray ;8x8 pixel gray block
importbin block_green.bin 0 32 block_green ;8x8 pixel green block
importbin selector.bin 0 50 selector ;10x10 selector sprite
importbin cursor.bin 0 32 cursor ;8x8 pixel play cursor
importbin numbers_font.bin 0 320 numbers_font ;Font data (numbers)
importbin capitals_font.bin 0 832 capitals_font ;Font data (capital letters)
importbin lowcase_font.bin 0 832 lowcase_font ;Font data (lowcase letters)
importbin special_font.bin 0 320 special_font ;Font data (special characters)
importbin work_ram.bin 0 62 work_ram ;Part of memory where sequence will be stored
start: ;Start of the application
cls ;Clear screen for fresh start
ldi r0, 0 ;Default selector X coordinate
ldi r1, 0 ;Default selector Y coordinate
ldi r9, 0 ;No PAD1 timeout by default
call player_reset ;Set default player values
loop: ;The main game loop
vblnk ;Wait for VBlank
cls ;Clear screen
call process_input ;React to PAD1 keys
ldi re, 10 ;Load string X coordinate
ldi rf, 10 ;Load string Y coordinate
ldi rd, ascii_maker ;Load string memory location
call draw_string ;Draw string on screen
ldi re, 10 ;Load string X coordinate
ldi rf, 188 ;Load string Y coordinate
ldi rd, ascii_dpad ;Load string memory location
call draw_string ;Draw string on screen
ldi re, 10 ;Load string X coordinate
ldi rf, 200 ;Load string Y coordinate
ldi rd, ascii_start ;Load string memory location
call draw_string ;Draw string on screen
ldi re, 10 ;Load string X coordinate
ldi rf, 212 ;Load string Y coordinate
ldi rd, ascii_a ;Load string memory location
call draw_string ;Draw string on screen
ldi re, 10 ;Load string X coordinate
ldi rf, 224 ;Load string Y coordinate
ldi rd, ascii_b ;Load string memory location
call draw_string ;Draw string on screen
call draw_blocks ;Draw "playfield"
call draw_selector ;Draw selector sprite
call draw_cursor ;Draw cursor sprite
addi r6, 0 ;Update flags
jz sound_engine ;No timeout, play sound
subi r6, 1 ;Decrease play timeout
jmp loop ;Draw another frame
:sound_engine
addi r8, 0 ;Update flags
jz loop ;Player is inactive, draw another frame
call play_sound ;Play pre-set sounds
addi r7, 1 ;Increase play cursor
ldi r6, 10 ;Set play timeout
mov ra, r7 ;Move play cursor to scratchpad
subi ra, 31 ;Check if max value has been reached
jz sound_engine_stop ;Stop playing sounds
jmp loop ;Draw another frame
:sound_engine_stop
call player_reset ;Set default player values
jmp loop ;Draw another frame
;SUBROUTINES
:player_reset ;Set default values
;snd0 ;Stop playing sounds
ldi r6, 0 ;No play timeout
ldi r7, 0 ;Default play cursor
ldi r8, 0 ;Playing is stopped by default
ret ;Return from a subroutine
:play_sound ;Play a sound of the specific frequency
mov ra, r7 ;Copy cursor value to scratchpad
muli ra, 2 ;Convert to work RAM offset
ldi rc, work_ram ;Load work RAM address
add rc, ra ;Apply precalculated offset
ldm rb, rc ;Load sound index value
addi rb, 0 ;Update flags
jz fret ;No sound should be played, break subroutine
subi rb, 1 ;Decrease sound index
jz play_sound_500 ;Index was 1, play 500 Hz tone
subi rb, 1 ;Decrease sound index
jz play_sound_1000 ;Index was 2, play 1000 Hz tone
subi rb, 1 ;Decrease sound index
jz play_sound_1500 ;Index was 3, play 1500 Hz tone
ret ;Return from a subroutine
:play_sound_500
snd1 200 ;Play 500 Hz tone for 200 ms
ret ;Return from a subroutine
:play_sound_1000
snd2 200 ;Play 1000 Hz tone for 200 ms
ret ;Return from a subroutine
:play_sound_1500
snd3 200 ;Play 1500 Hz tone for 200 ms
ret ;Return from a subroutine
:process_input ;Process PAD1 keys
addi r9, 0 ;Update flags
jz process_input_up ;Timeout is zero, read keys
subi r9, 1 ;Decrease timeout
ret ;Return from a subroutine
:process_input_up
ldm ra, #FFF0 ;Load PAD1 status
andi ra, 1 ;Isolate up key
jz process_input_down ;Up key is not pressed, proceed to next key
addi r1, 0 ;Update flags
jz process_input_down ;Minimum offset reached, proceed to next key
subi r1, 1 ;Decrease selector Y coordinate
ldi r9, 4 ;Load 4 frames timeout
:process_input_down
ldm ra, #FFF0 ;Load PAD1 status
andi ra, 2 ;Isolate down key
jz process_input_left ;Down key is not pressed, proceed to next key
mov rf, r1 ;Copy Y coordinate to scratchpad
subi rf, 2 ;Remove maximum offset
jz process_input_left ;Maximum offset reached, proceed to next key
addi r1, 1 ;Increase selector Y coordinate
ldi r9, 4 ;Load 4 frames timeout
:process_input_left
ldm ra, #FFF0 ;Load PAD1 status
andi ra, 4 ;Isolate left key
jz process_input_right ;Left key is not pressed, proceed to next key
addi r0, 0 ;Update flags
jz process_input_right ;Minimum offset reached, proceed to next key
subi r0, 1 ;Decrease selector X coordinate
ldi r9, 4 ;Load 4 frames timeout
:process_input_right
ldm ra, #FFF0 ;Load PAD1 status
andi ra, 8 ;Isolate right key
jz process_input_a ;Right key is not pressed, proceed to next key
mov rf, r0 ;Copy X coordinate to scratchpad
subi rf, 29 ;Remove maximum offset
jz process_input_a ;Maximum offset reached, proceed to next key
addi r0, 1 ;Increase selector X coordinate
ldi r9, 4 ;Load 4 frames timeout
:process_input_a
ldm ra, #FFF0 ;Load PAD1 status
andi ra, 64 ;Isolate A key
jz process_input_b ;A key is not pressed, proceed to next key
mov rc, r0 ;Move selector X coordinate to scratchpad
muli rc, 2 ;Convert to memory offset
ldi rd, work_ram ;Load work RAM memory address
add rd, rc ;Add precalculated offset
mov re, r1 ;Move selector Y coordinate to scratchpad
addi re, 1 ;Convert to sound index value
stm re, rd ;Store value to memory
ldi r9, 4 ;Load 4 frames timeout
:process_input_b
ldm ra, #FFF0 ;Load PAD1 status
andi ra, 128 ;Isolate B key
jz process_input_start ;B key is not pressed, proceed to next key
mov rc, r0 ;Move selector X coordinate to scratchpad
muli rc, 2 ;Convert to memory offset
ldi rd, work_ram ;Load work RAM memory address
add rd, rc ;Add precalculated offset
ldi re, 0 ;Load "cleared" value
stm re, rd ;Store cleared value to memory
ldi r9, 4 ;Load 4 frames timeout
:process_input_start
ldm ra, #FFF0 ;Load PAD1 status
andi ra, 32 ;Isolate start key
jz fret ;start key is not pressed, break subroutine
ldi r9, 10 ;Load 10 frames timeout
xori r8, 1 ;Toggle player state
jz player_reset ;If the player is not running, reset values
ret ;Return from a subroutine
:draw_cursor ;Draw cursor on screen
spr #0804 ;Set 8x8 pixel sprites
mov ra, r7 ;Copy play cursor to scratchpad
addi ra, 0 ;Update flags
jz fret ;Skip drawing if the cursor is zero
muli ra, 10 ;Convert to X offset
ldi rb, 92 ;Cursor Y coordinate
drw ra, rb, cursor ;Draw sprite on screen
ret ;Return from a subroutine
:draw_selector ;Draw selector sprite on screen
spr #0A05 ;Set 10x10 pixel sprites
mov ra, r0 ;Copy selector X coordinate
mov rb, r1 ;Copy selector Y coordinate
muli ra, 10 ;Convert to board coordinates
muli rb, 10 ;Convert to board coordinates
addi ra, 9 ;Add offset
addi rb, 101 ;Add offset
drw ra, rb, selector ;Draw sprite on screen
ret ;Return from a subroutine
:draw_blocks ;Draw set of gray or green blocks
spr #0804 ;Set 8x8 pixel sprites
ldi ra, 300 ;Default X coordinate
ldi rb, 102 ;Default Y coordinate
ldi rc, work_ram ;Load work RAM address
addi rc, 58 ;Increase Work RAM offset
:draw_blocks_1
drw ra, rb, block_green ;Draw green sprite on screen
ldm rd, rc ;Load data from memory
subi rd, 1 ;Remove 500 Hz offset
jz draw_blocks_2 ;Offset matched, skip drawing gray sprite
drw ra, rb, block_gray ;Draw gray sprite on screen
:draw_blocks_2
addi rb, 10 ;Increase Y coordinate
drw ra, rb, block_green ;Draw green sprite on screen
ldm rd, rc ;Load data from memory
subi rd, 2 ;Remove 1000 Hz offset
jz draw_blocks_3 ;Offset matched, skip drawing gray sprite
drw ra, rb, block_gray ;Draw gray sprite on screen
:draw_blocks_3
addi rb, 10 ;Increase Y coordinate
drw ra, rb, block_green ;Draw green sprite on screen
ldm rd, rc ;Load data from memory
subi rd, 3 ;Remove 1500 Hz offset
jz draw_decrease ;Offset matched, skip drawing gray sprite
drw ra, rb, block_gray ;Draw gray sprite on screen
:draw_decrease
subi rb, 20 ;Restore Y coordinate
subi rc, 2 ;Decreser work RAM offset
subi ra, 10 ;Decrease X offset
jz fret ;Break subroutine if all blocks have been drawn
jmp draw_blocks_1 ;Draw another block
:draw_string ;Draw string on screen
spr #0804 ;Set 8x8 pixel sprites
ldm ra, rd ;Load characted from memory
andi ra, #FF ;Only the lo byte is needed
mov rb, ra ;Copy data to scratchpad
subi rb, 255 ;Remove terminator
jz fret ;Terminator reached, break subroutine
mov rb, ra ;Copy data to scratchpad
muli rb, 32 ;Each character is 32 bytes long
addi rb, numbers_font ;Apply offset to font address
drw re, rf, rb ;Draw 8x8 character on the set coordinates
addi rd, 1 ;Increase memory offset
addi re, 9 ;Increase X coordinate
jmp draw_string
:fret ;Subroutine return function
ret ;Return from a subroutine
;STRING DATA
:ascii_author ;Author's name in standard ASCII
db #53 ;S
db #68 ;h
db #65 ;e
db #6E ;n
db #64 ;d
db #6F ;o
db #00 ;/0
:ascii_maker
db 22 ;M
db 56 ;u
db 54 ;s
db 44 ;i
db 38 ;c
db 62 ;
db 48 ;m
db 36 ;a
db 46 ;k
db 40 ;e
db 53 ;r
db 255 ;/0
:ascii_dpad
db 13 ;D
db 64 ;-
db 25 ;P
db 10 ;A
db 13 ;D
db 62 ;
db 64 ;-
db 62 ;
db 22 ;M
db 50 ;o
db 57 ;v
db 40 ;e
db 62 ;
db 54 ;s
db 40 ;e
db 47 ;l
db 40 ;e
db 38 ;c
db 55 ;t
db 50 ;o
db 53 ;r
db 255 ;/0
:ascii_start
db 28 ;S
db 29 ;T
db 10 ;A
db 27 ;R
db 29 ;T
db 62 ;
db 64 ;-
db 62 ;
db 25 ;P
db 47 ;l
db 36 ;a
db 60 ;y
db 65 ;/
db 28 ;S
db 55 ;t
db 50 ;o
db 51 ;p
db 255 ;/0
:ascii_a
db 10 ;A
db 62 ;
db 64 ;-
db 62 ;
db 10 ;A
db 38 ;c
db 55 ;t
db 44 ;i
db 57 ;v
db 36 ;a
db 55 ;t
db 40 ;e
db 62 ;
db 37 ;b
db 47 ;l
db 50 ;o
db 38 ;c
db 46 ;k
db 255 ;/0
:ascii_b
db 11 ;B
db 62 ;
db 64 ;-
db 62 ;
db 14 ;E
db 53 ;r
db 36 ;a
db 54 ;s
db 40 ;e
db 62 ;
db 38 ;c
db 50 ;o
db 47 ;l
db 56 ;u
db 48 ;m
db 49 ;n
db 255 ;/0 |
.386 ; Tells the machine that x86 intel architecture will be used
.model flat ; Flat memory segementation model
.code ; Code area
; Now, we start the procedure
start PROC ; The word PROC is the keyword for procedure
mov eax,213 ; moves 213 to eax register ;
add eax,432 ; add the value of 432 to eax and then store the result to eax ;
ret ; Return the value
start endp ; end the procedure
end start ; stop the assembly module |
; void *p_forward_list_front_fastcall(p_forward_list_t *list)
SECTION code_clib
SECTION code_adt_p_forward_list
PUBLIC _p_forward_list_front_fastcall
EXTERN asm_p_forward_list_front
defc _p_forward_list_front_fastcall = asm_p_forward_list_front
|
Map_ObjHCZ_1F2CE: dc.w word_1F2DC-Map_ObjHCZ_1F2CE
dc.w word_1F2DC-Map_ObjHCZ_1F2CE
dc.w word_1F2F0-Map_ObjHCZ_1F2CE
dc.w word_1F304-Map_ObjHCZ_1F2CE
dc.w word_1F318-Map_ObjHCZ_1F2CE
dc.w word_1F33E-Map_ObjHCZ_1F2CE
dc.w word_1F364-Map_ObjHCZ_1F2CE
word_1F2DC: dc.w 3
dc.b $FD, $D, 0, 0, $FF, $A0
dc.b $FD, $D, 0, 0, $FF, $E0
dc.b $FD, $D, 0, 0, 0, $20
word_1F2F0: dc.w 3
dc.b $FD, $D, 0, 8, $FF, $A0
dc.b $FD, $D, 0, 8, $FF, $E0
dc.b $FD, $D, 0, 8, 0, $20
word_1F304: dc.w 3
dc.b $FD, $D, 8, 0, $FF, $A0
dc.b $FD, $D, 8, 0, $FF, $E0
dc.b $FD, $D, 8, 0, 0, $20
word_1F318: dc.w 6
dc.b $FD, $D, 0, 0, $FF, $A0
dc.b $FD, $D, 0, 0, $FF, $C0
dc.b $FD, $D, 0, 0, $FF, $E0
dc.b $FD, $D, 0, 0, 0, 0
dc.b $FD, $D, 0, 0, 0, $20
dc.b $FD, $D, 0, 0, 0, $40
word_1F33E: dc.w 6
dc.b $FD, $D, 0, 8, $FF, $A0
dc.b $FD, $D, 0, 8, $FF, $C0
dc.b $FD, $D, 0, 8, $FF, $E0
dc.b $FD, $D, 0, 8, 0, 0
dc.b $FD, $D, 0, 8, 0, $20
dc.b $FD, $D, 0, 8, 0, $40
word_1F364: dc.w 6
dc.b $FD, $D, 8, 0, $FF, $A0
dc.b $FD, $D, 8, 0, $FF, $C0
dc.b $FD, $D, 8, 0, $FF, $E0
dc.b $FD, $D, 8, 0, 0, 0
dc.b $FD, $D, 8, 0, 0, $20
dc.b $FD, $D, 8, 0, 0, $40
|
; public domain!!
; Atan8[n] = atan( n/256 ) * 180 / pi
; 0 <= n < 256
;
; Revision History:
; 93/ 8/15 Initial: atandeg.asm/master.lib 0.21
.MODEL SMALL
.DATA
public AtanTableDeg, _AtanTableDeg
AtanTableDeg label byte
_AtanTableDeg label byte
db 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 2, 2, 3, 3, 3, 3
db 4, 4, 4, 4, 4, 5, 5, 5, 5, 6, 6, 6, 6, 6, 7, 7
db 7, 7, 8, 8, 8, 8, 8, 9, 9, 9, 9,10,10,10,10,10
db 11,11,11,11,11,12,12,12, 12,13,13,13,13,13,14,14
db 14,14,14,15,15,15,15,16, 16,16,16,16,17,17,17,17
db 17,18,18,18,18,18,19,19, 19,19,19,20,20,20,20,20
db 21,21,21,21,21,22,22,22, 22,22,22,23,23,23,23,23
db 24,24,24,24,24,25,25,25, 25,25,25,26,26,26,26,26
db 27,27,27,27,27,27,28,28, 28,28,28,29,29,29,29,29
db 29,30,30,30,30,30,30,31, 31,31,31,31,31,32,32,32
db 32,32,32,32,33,33,33,33, 33,33,34,34,34,34,34,34
db 35,35,35,35,35,35,35,36, 36,36,36,36,36,36,37,37
db 37,37,37,37,37,38,38,38, 38,38,38,38,39,39,39,39
db 39,39,39,39,40,40,40,40, 40,40,40,41,41,41,41,41
db 41,41,41,42,42,42,42,42, 42,42,42,43,43,43,43,43
db 43,43,43,44,44,44,44,44, 44,44,44,44,45,45,45,45
END
|
; ----------------------------------------------------------------------------------------------------------------------------------------------------------------
; int run1(in CodeBuffers src)::located://asmrun/sigclient?run1#run1_(CodeBuffers~in)
; public static ReadOnlySpan<byte> run1_ᐤCodeBuffersᕀinᐤ => new byte[191]{0xe9,0xf3,0x8d,0x34,0x04,0x5f,0x03,0x02,0xe9,0xab,0x8e,0x34,0x04,0x5f,0x06,0x01,0xe8,0x53,0xec,0xb4,0x5f,0x5e,0x09,0x00,0xc8,0x39,0x96,0xa2,0xfa,0x7f,0x00,0x00,0xe8,0x43,0xec,0xb4,0x5f,0x5e,0x00,0x01,0xe8,0x3b,0xec,0xb4,0x5f,0x5e,0x04,0x00,0xc0,0x3a,0x96,0xa2,0xfa,0x7f,0x00,0x00,0xe8,0x2b,0xec,0xb4,0x5f,0x5e,0x00,0x00,0xf0,0x3b,0x96,0xa2,0xfa,0x7f,0x00,0x00,0xe8,0x1b,0xec,0xb4,0x5f,0x5e,0x00,0x0c,0xe8,0x13,0xec,0xb4,0x5f,0x5e,0x02,0x0b,0xe8,0x0b,0xec,0xb4,0x5f,0x5e,0x04,0x0a,0xe8,0x03,0xec,0xb4,0x5f,0x5e,0x06,0x09,0xe8,0xfb,0xeb,0xb4,0x5f,0x5e,0x08,0x08,0xe8,0xf3,0xeb,0xb4,0x5f,0x5e,0x0a,0x07,0xe8,0xeb,0xeb,0xb4,0x5f,0x5e,0x0c,0x06,0xe8,0xe3,0xeb,0xb4,0x5f,0x5e,0x0e,0x05,0xe8,0xdb,0xeb,0xb4,0x5f,0x5e,0x10,0x04,0xe8,0xd3,0xeb,0xb4,0x5f,0x5e,0x12,0x03,0xe8,0xcb,0xeb,0xb4,0x5f,0x5e,0x14,0x02,0xe8,0xc3,0xeb,0xb4,0x5f,0x5e,0x16,0x01,0xe8,0xbb,0xeb,0xb4,0x5f,0x5e,0x18,0x00,0x10,0x3d,0x96,0xa2,0xfa,0x7f,0x00,0x00,0xe9,0xfb,0x4b,0x00,0x00,0x5f,0x00};
; BaseAddress = 7ffaa270abd8h
; TermCode = CTC_Zx7
0000h jmp near ptr 4348df8h ; JMP rel32 | E9 cd | 5 | e9 f3 8d 34 04
0005h pop rdi ; POP r64 | 58 +ro | 1 | 5f
0006h add eax,[rdx] ; ADD r32, r/m32 | 03 /r | 2 | 03 02
0008h jmp near ptr 4348eb8h ; JMP rel32 | E9 cd | 5 | e9 ab 8e 34 04
000dh pop rdi ; POP r64 | 58 +ro | 1 | 5f
000eh (bad) ; <invalid> | <invalid> | 2 | 06 01
0010h call 7ffb02259840h ; CALL rel32 | E8 cd | 5 | e8 53 ec b4 5f
0015h pop rsi ; POP r64 | 58 +ro | 1 | 5e
0016h or [rax],eax ; OR r/m32, r32 | 09 /r | 2 | 09 00
0018h enter 9639h,0a2h ; ENTER imm16, imm8 | C8 iw ib | 4 | c8 39 96 a2
001ch cli ; CLI | FA | 1 | fa
001dh jg short 001fh ; JG rel8 | 7F cb | 2 | 7f 00
001fh add al,ch ; ADD r/m8, r8 | 00 /r | 2 | 00 e8
0021h in al,dx ; IN AL, DX | EC | 2 | 43 ec
0023h mov ah,5fh ; MOV r8, imm8 | B0 +rb ib | 2 | b4 5f
0025h pop rsi ; POP r64 | 58 +ro | 1 | 5e
0026h add [rcx],al ; ADD r/m8, r8 | 00 /r | 2 | 00 01
0028h call 7ffb02259840h ; CALL rel32 | E8 cd | 5 | e8 3b ec b4 5f
002dh pop rsi ; POP r64 | 58 +ro | 1 | 5e
002eh add al,0 ; ADD AL, imm8 | 04 ib | 2 | 04 00
0030h sar byte ptr [rdx],96h ; SAR r/m8, imm8 | C0 /7 ib | 3 | c0 3a 96
0033h mov [0b4ec2be800007ffah],al ; MOV moffs8, AL | A2 mo | 9 | a2 fa 7f 00 00 e8 2b ec b4
003ch pop rdi ; POP r64 | 58 +ro | 1 | 5f
003dh pop rsi ; POP r64 | 58 +ro | 1 | 5e
003eh add [rax],al ; ADD r/m8, r8 | 00 /r | 2 | 00 00
0040h (bad) ; <invalid> | <invalid> | 7 | f0 3b 96 a2 fa 7f 00
0047h add al,ch ; ADD r/m8, r8 | 00 /r | 2 | 00 e8
0049h sbb ebp,esp ; SBB r32, r/m32 | 1B /r | 2 | 1b ec
004bh mov ah,5fh ; MOV r8, imm8 | B0 +rb ib | 2 | b4 5f
004dh pop rsi ; POP r64 | 58 +ro | 1 | 5e
004eh add [rax+rbp*8],cl ; ADD r/m8, r8 | 00 /r | 3 | 00 0c e8
0051h adc ebp,esp ; ADC r32, r/m32 | 13 /r | 2 | 13 ec
0053h mov ah,5fh ; MOV r8, imm8 | B0 +rb ib | 2 | b4 5f
0055h pop rsi ; POP r64 | 58 +ro | 1 | 5e
0056h add cl,[rbx] ; ADD r8, r/m8 | 02 /r | 2 | 02 0b
0058h call 7ffb02259840h ; CALL rel32 | E8 cd | 5 | e8 0b ec b4 5f
005dh pop rsi ; POP r64 | 58 +ro | 1 | 5e
005eh add al,0ah ; ADD AL, imm8 | 04 ib | 2 | 04 0a
0060h call 7ffb02259840h ; CALL rel32 | E8 cd | 5 | e8 03 ec b4 5f
0065h pop rsi ; POP r64 | 58 +ro | 1 | 5e
0066h (bad) ; <invalid> | <invalid> | 2 | 06 09
0068h call 7ffb02259840h ; CALL rel32 | E8 cd | 5 | e8 fb eb b4 5f
006dh pop rsi ; POP r64 | 58 +ro | 1 | 5e
006eh or [rax],cl ; OR r/m8, r8 | 08 /r | 2 | 08 08
0070h call 7ffb02259840h ; CALL rel32 | E8 cd | 5 | e8 f3 eb b4 5f
0075h pop rsi ; POP r64 | 58 +ro | 1 | 5e
0076h or al,[rdi] ; OR r8, r/m8 | 0A /r | 2 | 0a 07
0078h call 7ffb02259840h ; CALL rel32 | E8 cd | 5 | e8 eb eb b4 5f
007dh pop rsi ; POP r64 | 58 +ro | 1 | 5e
007eh or al,6 ; OR AL, imm8 | 0C ib | 2 | 0c 06
0080h call 7ffb02259840h ; CALL rel32 | E8 cd | 5 | e8 e3 eb b4 5f
0085h pop rsi ; POP r64 | 58 +ro | 1 | 5e
0086h (bad) ; <invalid> | <invalid> | 2 | 0e 05
0088h call 7ffb02259840h ; CALL rel32 | E8 cd | 5 | e8 db eb b4 5f
008dh pop rsi ; POP r64 | 58 +ro | 1 | 5e
008eh adc [rax+rbp*8],al ; ADC r/m8, r8 | 10 /r | 3 | 10 04 e8
0091h shr ebx,cl ; SHR r/m32, CL | D3 /5 | 2 | d3 eb
0093h mov ah,5fh ; MOV r8, imm8 | B0 +rb ib | 2 | b4 5f
0095h pop rsi ; POP r64 | 58 +ro | 1 | 5e
0096h adc al,[rbx] ; ADC r8, r/m8 | 12 /r | 2 | 12 03
0098h call 7ffb02259840h ; CALL rel32 | E8 cd | 5 | e8 cb eb b4 5f
009dh pop rsi ; POP r64 | 58 +ro | 1 | 5e
009eh adc al,2 ; ADC AL, imm8 | 14 ib | 2 | 14 02
00a0h call 7ffb02259840h ; CALL rel32 | E8 cd | 5 | e8 c3 eb b4 5f
00a5h pop rsi ; POP r64 | 58 +ro | 1 | 5e
00a6h (bad) ; <invalid> | <invalid> | 2 | 16 01
00a8h call 7ffb02259840h ; CALL rel32 | E8 cd | 5 | e8 bb eb b4 5f
00adh pop rsi ; POP r64 | 58 +ro | 1 | 5e
00aeh sbb [rax],al ; SBB r/m8, r8 | 18 /r | 2 | 18 00
00b0h adc [rip+7ffaa296h],bh ; ADC r/m8, r8 | 10 /r | 6 | 10 3d 96 a2 fa 7f
00b6h add [rax],al ; ADD r/m8, r8 | 00 /r | 2 | 00 00
00b8h jmp near ptr 4cb8h ; JMP rel32 | E9 cd | 5 | e9 fb 4b 00 00
00bdh pop rdi ; POP r64 | 58 +ro | 1 | 5f
00beh (bad) ; <invalid> | <invalid> | 1 | 00
; ----------------------------------------------------------------------------------------------------------------------------------------------------------------
; int run2(in CodeBuffers src)::located://asmrun/sigclient?run2#run2_(CodeBuffers~in)
; public static ReadOnlySpan<byte> run2_ᐤCodeBuffersᕀinᐤ => new byte[183]{0xe9,0xab,0x8e,0x34,0x04,0x5f,0x06,0x01,0xe8,0x53,0xec,0xb4,0x5f,0x5e,0x09,0x00,0xc8,0x39,0x96,0xa2,0xfa,0x7f,0x00,0x00,0xe8,0x43,0xec,0xb4,0x5f,0x5e,0x00,0x01,0xe8,0x3b,0xec,0xb4,0x5f,0x5e,0x04,0x00,0xc0,0x3a,0x96,0xa2,0xfa,0x7f,0x00,0x00,0xe8,0x2b,0xec,0xb4,0x5f,0x5e,0x00,0x00,0xf0,0x3b,0x96,0xa2,0xfa,0x7f,0x00,0x00,0xe8,0x1b,0xec,0xb4,0x5f,0x5e,0x00,0x0c,0xe8,0x13,0xec,0xb4,0x5f,0x5e,0x02,0x0b,0xe8,0x0b,0xec,0xb4,0x5f,0x5e,0x04,0x0a,0xe8,0x03,0xec,0xb4,0x5f,0x5e,0x06,0x09,0xe8,0xfb,0xeb,0xb4,0x5f,0x5e,0x08,0x08,0xe8,0xf3,0xeb,0xb4,0x5f,0x5e,0x0a,0x07,0xe8,0xeb,0xeb,0xb4,0x5f,0x5e,0x0c,0x06,0xe8,0xe3,0xeb,0xb4,0x5f,0x5e,0x0e,0x05,0xe8,0xdb,0xeb,0xb4,0x5f,0x5e,0x10,0x04,0xe8,0xd3,0xeb,0xb4,0x5f,0x5e,0x12,0x03,0xe8,0xcb,0xeb,0xb4,0x5f,0x5e,0x14,0x02,0xe8,0xc3,0xeb,0xb4,0x5f,0x5e,0x16,0x01,0xe8,0xbb,0xeb,0xb4,0x5f,0x5e,0x18,0x00,0x10,0x3d,0x96,0xa2,0xfa,0x7f,0x00,0x00,0xe9,0xfb,0x4b,0x00,0x00,0x5f,0x00};
; BaseAddress = 7ffaa270abe0h
; TermCode = CTC_Zx7
0000h jmp near ptr 4348eb0h ; JMP rel32 | E9 cd | 5 | e9 ab 8e 34 04
0005h pop rdi ; POP r64 | 58 +ro | 1 | 5f
0006h (bad) ; <invalid> | <invalid> | 2 | 06 01
0008h call 7ffb02259840h ; CALL rel32 | E8 cd | 5 | e8 53 ec b4 5f
000dh pop rsi ; POP r64 | 58 +ro | 1 | 5e
000eh or [rax],eax ; OR r/m32, r32 | 09 /r | 2 | 09 00
0010h enter 9639h,0a2h ; ENTER imm16, imm8 | C8 iw ib | 4 | c8 39 96 a2
0014h cli ; CLI | FA | 1 | fa
0015h jg short 0017h ; JG rel8 | 7F cb | 2 | 7f 00
0017h add al,ch ; ADD r/m8, r8 | 00 /r | 2 | 00 e8
0019h in al,dx ; IN AL, DX | EC | 2 | 43 ec
001bh mov ah,5fh ; MOV r8, imm8 | B0 +rb ib | 2 | b4 5f
001dh pop rsi ; POP r64 | 58 +ro | 1 | 5e
001eh add [rcx],al ; ADD r/m8, r8 | 00 /r | 2 | 00 01
0020h call 7ffb02259840h ; CALL rel32 | E8 cd | 5 | e8 3b ec b4 5f
0025h pop rsi ; POP r64 | 58 +ro | 1 | 5e
0026h add al,0 ; ADD AL, imm8 | 04 ib | 2 | 04 00
0028h sar byte ptr [rdx],96h ; SAR r/m8, imm8 | C0 /7 ib | 3 | c0 3a 96
002bh mov [0b4ec2be800007ffah],al ; MOV moffs8, AL | A2 mo | 9 | a2 fa 7f 00 00 e8 2b ec b4
0034h pop rdi ; POP r64 | 58 +ro | 1 | 5f
0035h pop rsi ; POP r64 | 58 +ro | 1 | 5e
0036h add [rax],al ; ADD r/m8, r8 | 00 /r | 2 | 00 00
0038h (bad) ; <invalid> | <invalid> | 7 | f0 3b 96 a2 fa 7f 00
003fh add al,ch ; ADD r/m8, r8 | 00 /r | 2 | 00 e8
0041h sbb ebp,esp ; SBB r32, r/m32 | 1B /r | 2 | 1b ec
0043h mov ah,5fh ; MOV r8, imm8 | B0 +rb ib | 2 | b4 5f
0045h pop rsi ; POP r64 | 58 +ro | 1 | 5e
0046h add [rax+rbp*8],cl ; ADD r/m8, r8 | 00 /r | 3 | 00 0c e8
0049h adc ebp,esp ; ADC r32, r/m32 | 13 /r | 2 | 13 ec
004bh mov ah,5fh ; MOV r8, imm8 | B0 +rb ib | 2 | b4 5f
004dh pop rsi ; POP r64 | 58 +ro | 1 | 5e
004eh add cl,[rbx] ; ADD r8, r/m8 | 02 /r | 2 | 02 0b
0050h call 7ffb02259840h ; CALL rel32 | E8 cd | 5 | e8 0b ec b4 5f
0055h pop rsi ; POP r64 | 58 +ro | 1 | 5e
0056h add al,0ah ; ADD AL, imm8 | 04 ib | 2 | 04 0a
0058h call 7ffb02259840h ; CALL rel32 | E8 cd | 5 | e8 03 ec b4 5f
005dh pop rsi ; POP r64 | 58 +ro | 1 | 5e
005eh (bad) ; <invalid> | <invalid> | 2 | 06 09
0060h call 7ffb02259840h ; CALL rel32 | E8 cd | 5 | e8 fb eb b4 5f
0065h pop rsi ; POP r64 | 58 +ro | 1 | 5e
0066h or [rax],cl ; OR r/m8, r8 | 08 /r | 2 | 08 08
0068h call 7ffb02259840h ; CALL rel32 | E8 cd | 5 | e8 f3 eb b4 5f
006dh pop rsi ; POP r64 | 58 +ro | 1 | 5e
006eh or al,[rdi] ; OR r8, r/m8 | 0A /r | 2 | 0a 07
0070h call 7ffb02259840h ; CALL rel32 | E8 cd | 5 | e8 eb eb b4 5f
0075h pop rsi ; POP r64 | 58 +ro | 1 | 5e
0076h or al,6 ; OR AL, imm8 | 0C ib | 2 | 0c 06
0078h call 7ffb02259840h ; CALL rel32 | E8 cd | 5 | e8 e3 eb b4 5f
007dh pop rsi ; POP r64 | 58 +ro | 1 | 5e
007eh (bad) ; <invalid> | <invalid> | 2 | 0e 05
0080h call 7ffb02259840h ; CALL rel32 | E8 cd | 5 | e8 db eb b4 5f
0085h pop rsi ; POP r64 | 58 +ro | 1 | 5e
0086h adc [rax+rbp*8],al ; ADC r/m8, r8 | 10 /r | 3 | 10 04 e8
0089h shr ebx,cl ; SHR r/m32, CL | D3 /5 | 2 | d3 eb
008bh mov ah,5fh ; MOV r8, imm8 | B0 +rb ib | 2 | b4 5f
008dh pop rsi ; POP r64 | 58 +ro | 1 | 5e
008eh adc al,[rbx] ; ADC r8, r/m8 | 12 /r | 2 | 12 03
0090h call 7ffb02259840h ; CALL rel32 | E8 cd | 5 | e8 cb eb b4 5f
0095h pop rsi ; POP r64 | 58 +ro | 1 | 5e
0096h adc al,2 ; ADC AL, imm8 | 14 ib | 2 | 14 02
0098h call 7ffb02259840h ; CALL rel32 | E8 cd | 5 | e8 c3 eb b4 5f
009dh pop rsi ; POP r64 | 58 +ro | 1 | 5e
009eh (bad) ; <invalid> | <invalid> | 2 | 16 01
00a0h call 7ffb02259840h ; CALL rel32 | E8 cd | 5 | e8 bb eb b4 5f
00a5h pop rsi ; POP r64 | 58 +ro | 1 | 5e
00a6h sbb [rax],al ; SBB r/m8, r8 | 18 /r | 2 | 18 00
00a8h adc [rip+7ffaa296h],bh ; ADC r/m8, r8 | 10 /r | 6 | 10 3d 96 a2 fa 7f
00aeh add [rax],al ; ADD r/m8, r8 | 00 /r | 2 | 00 00
00b0h jmp near ptr 4cb0h ; JMP rel32 | E9 cd | 5 | e9 fb 4b 00 00
00b5h pop rdi ; POP r64 | 58 +ro | 1 | 5f
00b6h (bad) ; <invalid> | <invalid> | 1 | 00
|
; A188509: Triangle read by rows: T(n,k) (n >= 1, 1 <= k <= n) is the maximal number of colors in a vertex coloring of the cube graph Q_n such that no subgraph Q_k is a rainbow.
; 1,1,3,1,5,7,1,9,13,15,1,17,25,29,31,1,33,49,57,61,63,1,65
seq $0,131437 ; (A000012 * A131436) + (A131436 * A000012) - A000012.
seq $0,30109 ; Write n in binary, reverse bits, subtract 1, divide by 2.
mul $0,2
add $0,1
|
; A217701: Permanent of the n X n matrix with all diagonal entries n and all off diagonal entries 1.
; Submitted by Christian Krause
; 1,1,5,38,393,5144,81445,1512720,32237681,775193984,20759213061,612623724800,19751688891385,690721009155072,26039042401938917,1052645311044368384,45424010394042998625,2083972769418997760000,101288683106200561501189,5199006109868903819575296,281022491246604447246252521,15955685676786007549706240000,949380017240160649793418662565,59074725137705576733992084307968,3836769283387970636899545593675473,259636759999002168006074998638772224,18276709635711861909029286361248453125
mov $3,1
lpb $0
sub $0,1
mov $2,$1
add $1,1
add $2,$0
pow $2,$1
mul $3,$1
add $3,$2
lpe
mov $0,$3
|
.thumb
.include "../../_FuncLib/_Definitions.h.s"
.include "../../_FuncLib/MokhaRAMSpace.s"
SET_FUNC_INLINE _1D9DC_Loop6C_MoveLimitView
@ new_MapMovement: 0x1 Blue/ 0x20 Red/ 0x40 Green
@ new_RangeMap: 0x2 Red/ 0x4 Green/ 0x10 Blue
_1D9DC_Loop6C_MoveLimitView:
push {r3-r7, lr}
mov r4, r0
_blh1 GetGameClock|1
lsr r5, r0, #0x1
mov r0, #0x1F
and r5, r0
add r4, #0x4A
ldrh r1,[r4]
.TestRoutine:
mov r0, #0x1
and r0, r1
cmp r0, #0x0
beq .NotBit1
lsl r0, r5, #0x1
ldr r1, =gPalBlueRangeSquare
add r0, r0, r1
mov r1, #0x82
mov r2, #0x20
_blh3 CopyToPaletteBuffer
.NotBit1:
ldrh r1,[r4]
mov r0, #0x2
and r0, r1
cmp r0, #0x0
beq .NotBit2
lsl r0, r5, #0x1
ldr r1, =gPalRedRangeSquare
add r0, r0, r1
mov r1, #0xA2
mov r2, #0x20
_blh3 CopyToPaletteBuffer
.NotBit2:
ldrh r1,[r4]
mov r0, #0x4
and r0, r1
cmp r0, #0x0
beq .NotBit4
lsl r0, r5, #0x1
ldr r1, =gPalGreenRangeSquare
add r0, r0, r1
mov r1, #0xA2
mov r2, #0x20
_blh3 CopyToPaletteBuffer
.NotBit4:
ldrh r1,[r4]
mov r0, #0x10
and r0, r1
cmp r0, #0x0
beq .NotBit10
lsl r0, r5, #0x1
ldr r1, =gPalBlueRangeSquare
add r0, r0, r1
mov r1, #0xA2
mov r2, #0x20
_blh3 CopyToPaletteBuffer
.NotBit10:
@-------------------- New Here -------------------
ldrh r1,[r4]
mov r0, #0x20
and r0, r1
cmp r0, #0x0
beq .NotBit20
lsl r0, r5, #0x1
ldr r1, =gPalRedRangeSquare
add r0, r0, r1
mov r1, #0x82
mov r2, #0x20
_blh3 CopyToPaletteBuffer
.NotBit20:
ldrh r1,[r4]
mov r0, #0x40
and r0, r1
cmp r0, #0x0
beq .NotBit40
lsl r0, r5, #0x1
ldr r1, =gPalGreenRangeSquare
add r0, r0, r1
mov r1, #0x82
mov r2, #0x20
_blh3 CopyToPaletteBuffer
.NotBit40:
@-------------------------------------------------
.End:
pop {r3-r7}
pop {r0}
bx r0
|
test START 0
BYTE 0xff + 1
END test
|
.include "defines.asm"
.slot "RAM"
.orga $80
.RAMSECTION "scratchpad" SLOT "RAM" FORCE
wScratchpad: ds 10
.ENDS
|
#include <cmath>
#include <cstdio>
#include <vector>
#include <iostream>
#include <algorithm>
using namespace std;
int main() {
int T;
cin >> T;
while (T--) {
int M, N;
int m = 1, n=1;
long long input, output=0;
vector<long long> MS, NS;
cin >> M >> N;
M--;
N--;
while (M--) {
cin >> input;
MS.push_back(input);
}
while (N--) {
cin >> input;
NS.push_back(input);
}
sort(MS.begin(), MS.end(), [] (long long x, long long y) {return x>y;});
sort(NS.begin(), NS.end(), [] (long long x, long long y) {return x>y;});
vector<long long>::iterator mi = MS.begin(), ni = NS.begin();
while (true) {
if (mi == MS.end() && ni == NS.end()) {
//cerr << "<END>" << endl;
output %= 1000000007;
break;
}
else if (mi == MS.end()) {
output += ((*ni * m) % 1000000007);
//cerr << "<ONLY N> ni:" << *ni << ", m:" << m << ", output:" << output << endl;
ni++;
n++;
}
else if (ni == NS.end()) {
output += ((*mi * n) % 1000000007);
//cerr << "<ONLY M> *mi:" << *mi << ", n:" << n << ", output:" << output << endl;
mi++;
m++;
}
else if (*mi >= *ni) {
//cerr << "<M>=N> *mi:" << *mi << ", *ni:" << *ni << "n:" << n << ", output:" << output << endl;
output += ((*mi * n) % 1000000007);
mi++;
m++;
}
else {
//cerr << "<M<N> *mi:" << *mi << ", *ni:" << *ni << ", m:" << m << ", output:" << output << endl;
output += ((*ni * m) % 1000000007);
ni++;
n++;
}
}
cout << output << endl;
}
return 0;
}
|
# input value is in $0
# returns the square of the input in $0
# check for negative number
andi $1 $0 0x80
clr $2
# if this passes, input is positive
beq $1 $2 square
# otherwise negate it
inv $0 $0
addi $0 $0 0x01
# do the square calculation
square:
clr $1
loop_top:
add $2 $2 $0
addi $1 $1 0x01
bne $1 $0 loop_top
# move output to $0
clr $0
add $0 $0 $2
|
/*
MIT License
Copyright (c) 2021 Attila Kiss
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in all
copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
*/
$INCLUDE(CONFIG.INC)
$IF(DUMMY_ERROR_MSG == 1)
__ERROR__ "Dummy error"
$ENDIF
END |
.global s_prepare_buffers
s_prepare_buffers:
push %r12
push %r14
push %r8
push %r9
push %rcx
push %rdi
push %rsi
lea addresses_D_ht+0x143fd, %rsi
lea addresses_WC_ht+0x13f7d, %rdi
nop
nop
sub %r12, %r12
mov $46, %rcx
rep movsq
nop
nop
nop
nop
mfence
lea addresses_D_ht+0x14389, %r8
nop
nop
nop
nop
sub $29946, %rsi
vmovups (%r8), %ymm7
vextracti128 $0, %ymm7, %xmm7
vpextrq $0, %xmm7, %rcx
dec %r12
lea addresses_normal_ht+0x5ab5, %rsi
lea addresses_D_ht+0x1d3f5, %rdi
nop
nop
nop
nop
xor $14438, %r14
mov $67, %rcx
rep movsw
nop
nop
nop
nop
nop
and %r14, %r14
lea addresses_normal_ht+0x1cdb5, %r9
nop
nop
nop
nop
nop
sub $1333, %rdi
vmovups (%r9), %ymm7
vextracti128 $0, %ymm7, %xmm7
vpextrq $1, %xmm7, %rcx
nop
nop
nop
and $41721, %r9
lea addresses_A_ht+0x69b5, %r12
clflush (%r12)
nop
nop
nop
nop
xor $62881, %r8
vmovups (%r12), %ymm6
vextracti128 $0, %ymm6, %xmm6
vpextrq $0, %xmm6, %rsi
nop
nop
nop
inc %rsi
lea addresses_normal_ht+0x14d75, %rcx
nop
nop
nop
nop
nop
inc %r8
movl $0x61626364, (%rcx)
nop
nop
nop
add %rdi, %rdi
lea addresses_normal_ht+0x91b5, %r8
nop
nop
nop
nop
nop
sub %rdi, %rdi
mov (%r8), %r14
nop
nop
add $8338, %r8
pop %rsi
pop %rdi
pop %rcx
pop %r9
pop %r8
pop %r14
pop %r12
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r12
push %r13
push %r14
push %r15
push %r8
push %rbx
// Store
lea addresses_PSE+0x1f57d, %r10
nop
nop
nop
cmp %r13, %r13
mov $0x5152535455565758, %r14
movq %r14, %xmm3
movups %xmm3, (%r10)
nop
inc %r13
// Store
lea addresses_UC+0x61b5, %rbx
nop
nop
sub %r8, %r8
movw $0x5152, (%rbx)
inc %r12
// Load
lea addresses_D+0x91b1, %r15
nop
nop
sub %r13, %r13
mov (%r15), %r10d
nop
nop
nop
nop
nop
add %r13, %r13
// Faulty Load
lea addresses_normal+0xbdb5, %r8
nop
cmp $64394, %r15
movb (%r8), %r12b
lea oracles, %r15
and $0xff, %r12
shlq $12, %r12
mov (%r15,%r12,1), %r12
pop %rbx
pop %r8
pop %r15
pop %r14
pop %r13
pop %r12
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_normal', 'AVXalign': False, 'size': 1, 'NT': False, 'same': False, 'congruent': 0}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'type': 'addresses_PSE', 'AVXalign': False, 'size': 16, 'NT': False, 'same': False, 'congruent': 2}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC', 'AVXalign': False, 'size': 2, 'NT': False, 'same': False, 'congruent': 10}}
{'src': {'type': 'addresses_D', 'AVXalign': False, 'size': 4, 'NT': False, 'same': False, 'congruent': 1}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'type': 'addresses_normal', 'AVXalign': False, 'size': 1, 'NT': False, 'same': True, 'congruent': 0}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_D_ht', 'congruent': 1, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WC_ht', 'congruent': 3, 'same': False}}
{'src': {'type': 'addresses_D_ht', 'AVXalign': False, 'size': 32, 'NT': False, 'same': False, 'congruent': 0}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_normal_ht', 'congruent': 5, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_D_ht', 'congruent': 6, 'same': False}}
{'src': {'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 32, 'NT': False, 'same': True, 'congruent': 6}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_A_ht', 'AVXalign': False, 'size': 32, 'NT': False, 'same': False, 'congruent': 9}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 4, 'NT': False, 'same': False, 'congruent': 6}}
{'src': {'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 8, 'NT': False, 'same': True, 'congruent': 10}, 'OP': 'LOAD'}
{'34': 21829}
34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34
*/
|
; A226721: Position of 2^n in the joint ranking of all the numbers 2^j for j>=0 and 5^k for k>=1; complement of A123384.
; 2,3,5,6,8,9,11,12,13,15,16,18,19,21,22,23,25,26,28,29,31,32,33,35,36,38,39,41,42,43,45,46,48,49,51,52,53,55,56,58,59,61,62,63,65,66,68,69,71,72,73,75,76,78,79,81,82,83,85,86,88,89,91,92,93,95,96,98,99,101,102,104,105,106,108,109,111,112,114,115,116,118,119,121,122,124,125,126,128,129,131,132,134,135,136,138,139,141,142,144
mov $2,$0
add $2,1
mov $3,2
pow $3,$2
lpb $3
add $2,1
div $3,5
lpe
mov $0,$2
|
.global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r11
push %rax
push %rbp
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_WT_ht+0x71e6, %rsi
lea addresses_WC_ht+0x114a6, %rdi
nop
nop
xor $39632, %rax
mov $97, %rcx
rep movsl
dec %rbx
lea addresses_UC_ht+0x1a9d3, %r10
nop
nop
nop
and %rcx, %rcx
mov $0x6162636465666768, %rdi
movq %rdi, %xmm3
and $0xffffffffffffffc0, %r10
vmovaps %ymm3, (%r10)
cmp %r10, %r10
lea addresses_D_ht+0x65e6, %rsi
clflush (%rsi)
and %rbp, %rbp
movb $0x61, (%rsi)
nop
nop
nop
nop
inc %rax
lea addresses_D_ht+0x81e6, %rsi
sub %r10, %r10
and $0xffffffffffffffc0, %rsi
movaps (%rsi), %xmm2
vpextrq $0, %xmm2, %rbx
nop
inc %rbx
lea addresses_UC_ht+0x1bec6, %rbx
clflush (%rbx)
nop
nop
nop
nop
nop
and %rcx, %rcx
movups (%rbx), %xmm7
vpextrq $0, %xmm7, %rsi
nop
nop
and $16822, %rsi
lea addresses_WT_ht+0xf63f, %rsi
lea addresses_normal_ht+0xa966, %rdi
nop
nop
nop
nop
nop
sub $41152, %r11
mov $63, %rcx
rep movsw
nop
nop
nop
nop
nop
add $59371, %rax
lea addresses_D_ht+0x10320, %rsi
lea addresses_normal_ht+0x2de6, %rdi
nop
nop
and %rbp, %rbp
mov $78, %rcx
rep movsq
and %rax, %rax
lea addresses_D_ht+0x158e6, %r11
xor %rbx, %rbx
mov $0x6162636465666768, %rdi
movq %rdi, (%r11)
nop
nop
nop
nop
nop
and %rax, %rax
lea addresses_D_ht+0x1aad6, %rsi
lea addresses_UC_ht+0x11e6, %rdi
nop
nop
nop
nop
dec %rbp
mov $34, %rcx
rep movsq
nop
nop
nop
nop
and $51576, %r10
lea addresses_A_ht+0xa9e6, %rbp
nop
nop
nop
nop
cmp $26782, %r10
movl $0x61626364, (%rbp)
nop
nop
nop
sub $5672, %rsi
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rbp
pop %rax
pop %r11
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r11
push %r15
push %r8
push %r9
push %rax
push %rsi
// Store
lea addresses_US+0x1fde6, %rax
nop
nop
add $55676, %r8
mov $0x5152535455565758, %r11
movq %r11, %xmm7
vmovaps %ymm7, (%rax)
add %r11, %r11
// Load
lea addresses_UC+0x188d6, %r11
inc %rsi
mov (%r11), %r9
// Exception!!!
mov (0), %rax
cmp %r9, %r9
// Store
lea addresses_RW+0x1b1e6, %rsi
nop
xor $35180, %r10
mov $0x5152535455565758, %rax
movq %rax, %xmm3
movups %xmm3, (%rsi)
cmp %r10, %r10
// Faulty Load
lea addresses_UC+0x101e6, %rax
nop
nop
nop
nop
nop
and %r15, %r15
vmovntdqa (%rax), %ymm7
vextracti128 $1, %ymm7, %xmm7
vpextrq $0, %xmm7, %r11
lea oracles, %r8
and $0xff, %r11
shlq $12, %r11
mov (%r8,%r11,1), %r11
pop %rsi
pop %rax
pop %r9
pop %r8
pop %r15
pop %r11
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_UC', 'NT': False, 'AVXalign': True, 'size': 8, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_US', 'NT': False, 'AVXalign': True, 'size': 32, 'congruent': 8}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_UC', 'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 3}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_RW', 'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 11}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'same': True, 'type': 'addresses_UC', 'NT': True, 'AVXalign': False, 'size': 32, 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'REPM', 'src': {'same': False, 'congruent': 11, 'type': 'addresses_WT_ht'}, 'dst': {'same': False, 'congruent': 5, 'type': 'addresses_WC_ht'}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_UC_ht', 'NT': False, 'AVXalign': True, 'size': 32, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_D_ht', 'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 10}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_D_ht', 'NT': False, 'AVXalign': True, 'size': 16, 'congruent': 11}}
{'OP': 'LOAD', 'src': {'same': True, 'type': 'addresses_UC_ht', 'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 5}}
{'OP': 'REPM', 'src': {'same': False, 'congruent': 0, 'type': 'addresses_WT_ht'}, 'dst': {'same': False, 'congruent': 7, 'type': 'addresses_normal_ht'}}
{'OP': 'REPM', 'src': {'same': False, 'congruent': 0, 'type': 'addresses_D_ht'}, 'dst': {'same': False, 'congruent': 10, 'type': 'addresses_normal_ht'}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_D_ht', 'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 7}}
{'OP': 'REPM', 'src': {'same': False, 'congruent': 2, 'type': 'addresses_D_ht'}, 'dst': {'same': False, 'congruent': 11, 'type': 'addresses_UC_ht'}}
{'OP': 'STOR', 'dst': {'same': True, 'type': 'addresses_A_ht', 'NT': False, 'AVXalign': True, 'size': 4, 'congruent': 11}}
{'46': 1404, '49': 20, '00': 845}
46 46 49 46 00 46 46 00 00 00 46 46 00 46 46 00 46 00 46 46 00 00 00 00 46 46 46 46 46 46 00 46 00 46 46 00 46 00 46 46 00 46 00 46 00 46 00 46 46 00 00 46 46 46 00 00 46 00 00 46 46 00 00 46 46 00 46 00 46 00 46 46 46 00 46 46 00 00 46 46 00 46 46 00 46 46 00 00 46 46 46 46 46 00 00 46 00 46 00 46 46 46 00 46 46 46 46 46 00 00 46 00 46 46 00 46 00 00 46 46 00 00 46 46 00 46 00 46 00 00 46 46 46 46 46 00 46 46 00 46 46 46 00 46 00 00 00 46 00 00 46 46 00 46 00 46 46 46 46 46 00 00 46 46 00 46 00 46 46 00 46 46 46 46 00 00 46 00 46 00 46 00 46 46 46 00 46 46 46 46 46 00 00 49 46 00 46 46 46 46 00 00 00 00 00 46 46 49 46 46 00 00 46 46 00 00 46 00 46 46 46 46 46 46 46 46 46 00 46 46 46 00 00 00 00 00 00 00 00 46 00 00 00 46 46 00 46 46 46 46 46 46 46 46 46 46 46 46 00 46 00 46 46 46 46 46 46 46 00 46 00 00 00 00 46 46 46 46 00 00 46 46 00 46 46 00 46 46 46 46 00 46 46 00 46 00 00 46 46 00 46 00 00 46 46 46 00 46 46 00 46 46 46 46 46 46 46 00 46 46 46 46 46 46 46 46 00 46 46 00 46 46 00 46 00 46 46 46 46 00 00 46 00 46 00 46 00 00 00 46 46 46 46 46 46 00 46 00 00 46 46 46 00 46 46 46 46 46 46 46 46 46 46 46 46 00 46 00 46 00 46 00 46 46 46 46 46 46 46 46 00 00 46 46 00 46 46 46 46 00 46 46 46 00 00 46 00 00 46 00 00 00 46 00 46 46 46 46 00 46 00 00 46 00 00 00 00 46 46 46 00 00 46 46 46 00 46 00 46 46 46 00 00 46 46 46 46 46 46 00 46 00 00 46 46 46 00 46 46 00 46 46 46 00 46 46 46 46 00 46 46 00 46 49 00 00 00 00 46 46 46 00 00 46 00 46 46 46 46 00 46 00 46 00 00 46 46 46 46 46 46 46 00 46 00 00 46 00 46 46 46 00 46 46 46 46 00 46 00 46 00 46 00 00 00 00 00 00 00 46 46 46 46 00 46 46 00 00 46 00 46 00 46 46 00 46 46 46 46 46 46 46 46 46 00 46 00 00 46 46 46 46 46 46 46 46 00 46 46 46 46 46 46 46 46 00 00 46 00 46 00 46 46 46 46 46 00 00 00 00 46 00 00 46 00 46 00 00 00 46 00 46 00 46 46 46 00 46 00 00 46 46 46 00 46 46 46 46 00 46 46 46 46 00 00 00 00 00 46 46 46 00 00 46 00 00 00 46 46 46 00 46 46 00 00 00 00 46 46 00 46 46 46 46 46 46 46 46 46 00 46 46 00 46 46 00 00 00 46 46 46 46 00 00 00 00 00 00 46 00 46 00 46 46 46 46 46 00 46 00 46 00 46 46 46 46 46 00 00 00 00 46 46 00 46 00 46 46 00 00 00 46 46 00 46 00 00 00 00 46 46 00 00 46 46 46 46 46 46 46 46 46 46 00 00 46 46 00 46 46 46 46 46 46 00 46 00 00 00 00 00 49 46 00 46 00 00 00 46 46 46 46 00 00 46 46 00 00 46 46 00 00 46 46 46 46 00 00 00 00 46 00 00 46 46 00 00 00 00 46 46 46 46 00 00 00 46 46 46 00 46 46 46 00 46 46 46 00 46 00 46 46 46 00 46 46 00 46 46 46 46 46 46 00 46 00 46 46 46 46 46 00 00 46 46 46 00 46 00 46 46 46 46 46 46 00 46 00 00 46 46 00 46 00 00 49 00 00 46 00 00 46 46 00 46 46 00 46 00 46 00 46 46 46 00 46 46 46 46 00 00 00 46 46 46 00 00 46 46 46 46 00 00 46 00 00 46 00 46 46 46 46 00 46 46 46 00 00 00 00 00 00 00 00 46 00 46 46 00 46 49 00 46 46 00 46 00 00 00 00 00 00 46 00 00 46 00 46 46 00 46 46 00 46 00 46 46 46 00 46 46 46 46 46 46 46 46 46 00 00 00 46 46 46 00 00 00 46 46 00 00 46 00 00 46 00 46 46 46 00 00 46 46 46 46 46 46 46 46 46 46 46 00 46 00 46 46 46 46 46
*/
|
#include <sfc/sfc.hpp>
namespace SuperFamicom {
System system;
Scheduler scheduler;
Random random;
Cheat cheat;
#include "serialization.cpp"
auto System::run() -> void {
if(scheduler.enter() == Scheduler::Event::Frame) if (!ppu.disabled) ppu.refresh();
}
auto System::runToSave() -> void {
if (!cpu.disabled) scheduler.synchronize(cpu);
scheduler.synchronize(smp);
if (!ppu.disabled) scheduler.synchronize(ppu);
scheduler.synchronize(dsp);
if (!cpu.disabled) {
for(auto coprocessor : cpu.coprocessors) scheduler.synchronize(*coprocessor);
for(auto peripheral : cpu.peripherals) scheduler.synchronize(*peripheral);
}
}
auto System::load(Emulator::Interface* interface) -> bool {
information = {};
hacks.fastPPU = configuration.hacks.ppuFast.enable;
hacks.fastDSP = configuration.hacks.dspFast.enable;
bus.reset();
if (!cpu.disabled) if(!cpu.load()) return false;
if(!smp.load()) return false;
if (!ppu.disabled) if(!ppu.load()) return false;
if(!dsp.load()) return false;
if(!cartridge.load()) return false;
if(cartridge.region() == "NTSC") {
information.region = Region::NTSC;
information.cpuFrequency = Emulator::Constants::Colorburst::NTSC * 6.0;
}
if(cartridge.region() == "PAL") {
information.region = Region::PAL;
information.cpuFrequency = Emulator::Constants::Colorburst::PAL * 4.8;
}
if(cartridge.has.ICD) icd.load();
if(cartridge.has.BSMemorySlot) bsmemory.load();
serializeInit();
this->interface = interface;
return information.loaded = true;
}
auto System::save() -> void {
if(!loaded()) return;
cartridge.save();
}
auto System::unload() -> void {
if(!loaded()) return;
if (!cpu.disabled) cpu.peripherals.reset();
controllerPort1.unload();
controllerPort2.unload();
expansionPort.unload();
if(cartridge.has.ICD) icd.unload();
if(cartridge.has.MCC) mcc.unload();
if(cartridge.has.Event) event.unload();
if(cartridge.has.SA1) sa1.unload();
if(cartridge.has.SuperFX) superfx.unload();
if(cartridge.has.HitachiDSP) hitachidsp.unload();
if(cartridge.has.SPC7110) spc7110.unload();
if(cartridge.has.SDD1) sdd1.unload();
if(cartridge.has.OBC1) obc1.unload();
if(cartridge.has.MSU1) msu1.unload();
if(cartridge.has.BSMemorySlot) bsmemory.unload();
if(cartridge.has.SufamiTurboSlotA) sufamiturboA.unload();
if(cartridge.has.SufamiTurboSlotB) sufamiturboB.unload();
cartridge.unload();
information.loaded = false;
}
auto System::power(bool reset) -> void {
Emulator::video.reset(interface);
Emulator::video.setPalette();
Emulator::audio.reset(interface);
random.entropy(Random::Entropy::Low);
scheduler.reset();
if (!cpu.disabled) cpu.power(reset);
smp.power(reset);
dsp.power(reset);
if (!ppu.disabled) ppu.power(reset);
if(cartridge.has.ICD) icd.power();
if(cartridge.has.MCC) mcc.power();
if(cartridge.has.DIP) dip.power();
if(cartridge.has.Event) event.power();
if(cartridge.has.SA1) sa1.power();
if(cartridge.has.SuperFX) superfx.power();
if(cartridge.has.ARMDSP) armdsp.power();
if(cartridge.has.HitachiDSP) hitachidsp.power();
if(cartridge.has.NECDSP) necdsp.power();
if(cartridge.has.EpsonRTC) epsonrtc.power();
if(cartridge.has.SharpRTC) sharprtc.power();
if(cartridge.has.SPC7110) spc7110.power();
if(cartridge.has.SDD1) sdd1.power();
if(cartridge.has.OBC1) obc1.power();
if(cartridge.has.MSU1) msu1.power();
if(cartridge.has.BSMemorySlot) bsmemory.power();
if(cartridge.has.SufamiTurboSlotA) sufamiturboA.power();
if(cartridge.has.SufamiTurboSlotB) sufamiturboB.power();
if (!cpu.disabled) {
if(cartridge.has.ICD) cpu.coprocessors.append(&icd);
if(cartridge.has.Event) cpu.coprocessors.append(&event);
if(cartridge.has.SA1) cpu.coprocessors.append(&sa1);
if(cartridge.has.SuperFX) cpu.coprocessors.append(&superfx);
if(cartridge.has.ARMDSP) cpu.coprocessors.append(&armdsp);
if(cartridge.has.HitachiDSP) cpu.coprocessors.append(&hitachidsp);
if(cartridge.has.NECDSP) cpu.coprocessors.append(&necdsp);
if(cartridge.has.EpsonRTC) cpu.coprocessors.append(&epsonrtc);
if(cartridge.has.SharpRTC) cpu.coprocessors.append(&sharprtc);
if(cartridge.has.SPC7110) cpu.coprocessors.append(&spc7110);
if(cartridge.has.MSU1) cpu.coprocessors.append(&msu1);
if(cartridge.has.BSMemorySlot) cpu.coprocessors.append(&bsmemory);
scheduler.primary(cpu);
controllerPort1.power(ID::Port::Controller1);
controllerPort2.power(ID::Port::Controller2);
expansionPort.power();
controllerPort1.connect(settings.controllerPort1);
controllerPort2.connect(settings.controllerPort2);
expansionPort.connect(settings.expansionPort);
} else {
scheduler.primary(smp);
}
}
}
|
; A040553: Continued fraction for sqrt(578).
; Submitted by Christian Krause
; 24,24,48,24,48,24,48,24,48,24,48,24,48,24,48,24,48,24,48,24,48,24,48,24,48,24,48,24,48,24,48,24,48,24,48,24,48,24,48,24,48,24,48,24,48,24,48,24,48,24,48,24,48,24,48,24,48,24,48,24,48,24,48
trn $0,1
mod $0,2
mul $0,24
add $0,24
|
// Copyright (C) 2018-2021 Intel Corporation
// SPDX-License-Identifier: Apache-2.0
//
#include "utils/pooling_factory.hpp"
#include <iterator>
#include "default_opset.hpp"
#include "exceptions.hpp"
#include "ngraph/coordinate_diff.hpp"
#include "utils/convpool.hpp"
namespace ngraph {
namespace onnx_import {
namespace pooling {
PoolingFactory::PoolingFactory(const Node& node)
: m_onnx_node{node},
m_inputs{node.get_ng_inputs()},
m_kernel_shape(node.get_attribute_value<std::vector<std::size_t>>("kernel_shape")),
m_strides{convpool::get_strides(node, m_kernel_shape.size())},
m_dilations{convpool::get_dilations(node, m_kernel_shape.size())},
m_auto_pad{convpool::get_auto_pad(node)},
m_rounding_type{convpool::get_rounding_type(node)} {
const auto paddings = convpool::get_pads(node, m_kernel_shape.size());
const CoordinateDiff& padding_above{paddings.second};
const CoordinateDiff& padding_below{paddings.first};
m_padding_below = Shape{std::begin(padding_below), std::end(padding_below)};
m_padding_above = Shape{std::begin(padding_above), std::end(padding_above)};
}
OutputVector PoolingFactory::make_avg_pool() const {
const bool count_include_pad = m_onnx_node.get_attribute_value<std::int64_t>("count_include_pad", 0);
return {std::make_shared<default_opset::AvgPool>(m_inputs.at(0),
m_strides,
m_padding_below,
m_padding_above,
m_kernel_shape,
!count_include_pad,
m_rounding_type,
m_auto_pad)};
}
OutputVector PoolingFactory::make_max_pool() const {
return {std::make_shared<default_opset::MaxPool>(m_inputs.at(0),
m_strides,
m_padding_below,
m_padding_above,
m_kernel_shape,
m_rounding_type,
m_auto_pad)};
}
} // namespace pooling
} // namespace onnx_import
} // namespace ngraph
|
; A266221: Total number of ON (black) cells after n iterations of the "Rule 7" elementary cellular automaton starting with a single ON (black) cell.
; 1,3,3,10,10,21,21,36,36,55,55,78,78,105,105,136,136,171,171,210,210,253,253,300,300,351,351,406,406,465,465,528,528,595,595,666,666,741,741,820,820,903,903,990,990,1081,1081,1176,1176,1275,1275,1378,1378,1485,1485,1596,1596,1711,1711,1830,1830,1953,1953,2080,2080,2211,2211,2346,2346,2485,2485,2628,2628,2775,2775,2926,2926,3081,3081,3240,3240,3403,3403,3570,3570,3741,3741,3916,3916,4095,4095,4278,4278,4465,4465,4656,4656,4851,4851,5050
lpb $0
trn $0,2
trn $1,1
add $2,4
add $1,$2
lpe
trn $1,2
add $1,1
mov $0,$1
|
;
; This file is automatically generated
;
; Do not edit!!!
;
; djm 12/2/2000
;
; ZSock Lib function: sock_waitclose
XLIB sock_waitclose
LIB no_zsock
INCLUDE "#packages.def"
INCLUDE "#zsock.def"
.sock_waitclose
ld a,r_sock_waitclose
call_pkg(tcp_all)
ret nc
; We failed..are we installed?
cp rc_pnf
scf ;signal error
ret nz ;Internal error
call_pkg(tcp_ayt)
jr nc,sock_waitclose
jp no_zsock
|
#include "IEX.h"
using namespace std;
void print_price(const std::string& symbol) {
IEX::PriceData stock;
stock = IEX::Stock::getPrice(symbol);
cout << "Called Endpoint: " << stock.called_endpoint << endl;
cout << "Stock Symbol: " << stock.stock_symbol << endl;
cout << "Latest Price: $" << stock.latest_price << endl;
}
void print_company(const std::string& symbol) {
IEX::CompanyData cd = IEX::Stock::getCompany(symbol);
cout << "Called Endpoint: " << cd.called_endpoint << endl;
cout << "Company Name: " << cd.company_name << endl;
cout << "Exchange: " << cd.exchange << endl;
cout << "Industry: " << cd.industry << endl;
cout << "Website: " << cd.website << endl;
cout << "Description: " << cd.description << endl;
cout << "CEO: " << cd.CEO << endl;
cout << "Issue type: " << cd.issue_type << endl;
cout << "Sector: " << cd.sector << endl;
cout << "Tags:" << endl;
for (const auto& t : cd.tags) {
cout << " " << t << endl;
}
}
void print_company_logo(const std::string& symbol) {
IEX::CompanyLogoData cld = IEX::Stock::getCompanyLogo(symbol);
cout << "Called Endpoint: " << cld.called_endpoint << endl;
cout << "Stock Symbol: " << cld.stock_symbol << endl;
cout << "Company Logo URL: " << cld.logo_url << endl;
}
void print_stats(const std::string& symbol) {
IEX::KeyStatsData ksd = IEX::Stock::getKeyStats(symbol);
cout << "Called Endpoint: " << ksd.called_endpoint << endl;
cout << "Company Name: " << ksd.company_name << endl;
cout << "marketcap: " << ksd.market_cap << endl;
cout << "beta: " << ksd.beta << endl;
cout << "week52high: " << ksd.week_52_high << endl;
cout << "week52low: " << ksd.week_52_low << endl;
cout << "week52change: " << ksd.week_52_change << endl;
cout << "shortInterest: " << ksd.short_interest << endl;
cout << "shortDate: " << ksd.short_date << endl;
cout << "dividendRate: " << ksd.dividend_rate << endl;
cout << "dividendYield: " << ksd.dividend_yield << endl;
cout << "exDividendDate: " << ksd.ex_dividend_date << endl;
cout << "latestEPS: " << ksd.latest_EPS << endl;
cout << "latestEPSDate: " << ksd.latest_EPS_date << endl;
cout << "sharesOutstanding: " << ksd.shares_outstanding << endl;
cout << "_float: " << ksd._float << endl;
cout << "returnOnEquity: " << ksd.return_on_equity << endl;
cout << "consensusEPS: " << ksd.consensus_EPS << endl;
cout << "numberOfEstimates: " << ksd.number_of_estimates << endl;
cout << "EBITDA: " << ksd.EBITDA << endl;
cout << "revenue: " << ksd.revenue << endl;
cout << "grossProfit: " << ksd.gross_profit << endl;
cout << "cash: " << ksd.cash << endl;
cout << "debt: " << ksd.debt << endl;
cout << "ttmEPS: " << ksd.ttm_EPS << endl;
cout << "revenuePerShare: " << ksd.revenue_per_share << endl;
cout << "revenuePerEmployee: " << ksd.revenue_per_employee << endl;
cout << "peRatioHigh: " << ksd.pe_ratio_high << endl;
cout << "peRatioLow: " << ksd.pe_ratio_low << endl;
cout << "EPSSurpriseDollar: " << ksd.EPS_surprise_dollar << endl;
cout << "EPSSurprisePercent: " << ksd.EPS_surprise_percent << endl;
cout << "returnOnAssets: " << ksd.return_on_assets << endl;
cout << "returnOnCapital: " << ksd.return_on_capital << endl;
cout << "profitMargin: " << ksd.profit_margin << endl;
cout << "priceToSales: " << ksd.price_to_sales << endl;
cout << "priceToBook: " << ksd.price_to_book << endl;
cout << "day200MovingAvg: " << ksd.day_200_moving_avg << endl;
cout << "day50MovingAvg: " << ksd.day_50_moving_avg << endl;
cout << "institutionPercent: " << ksd.institution_percent << endl;
cout << "insiderPercent: " << ksd.insider_percent << endl;
cout << "shortRatio: " << ksd.short_ratio << endl;
cout << "year5ChangePercent: " << ksd.year_5_change_percent << endl;
cout << "year2ChangePercent: " << ksd.year_2_change_percent << endl;
cout << "year1ChangePercent: " << ksd.year_1_change_percent << endl;
cout << "ytdChangePercent: " << ksd.ytd_change_percent << endl;
cout << "month6ChangePercent: " << ksd.month_6_change_percent << endl;
cout << "month3ChangePercent: " << ksd.month_3_change_percent << endl;
cout << "month1ChangePercent: " << ksd.month_1_change_percent << endl;
cout << "day5ChangePercent: " << ksd.day_5_change_percent << endl;
}
void print_financials(const std::string& symbol,
const IEX::Period period) {
auto financials = IEX::Stock::getFinancials(symbol, period);
for (const auto& f : financials) {
cout << "called_endpoint: " << f.called_endpoint << endl;
cout << "stock_symbol: " << f.stock_symbol << endl;
cout << "report_date: " << f.report_date << endl;
cout << "gross_profit: " << f.gross_profit << endl;
cout << "operating_revenue: " << f.operating_revenue << endl;
cout << "total_revenue: " << f.total_revenue << endl;
cout << "operating_income: " << f.operating_income << endl;
cout << "net_income: " << f.net_income << endl;
cout << "research_and_development: " << f.research_and_development
<< endl;
cout << "operating_expense: " << f.operating_expense << endl;
cout << "current_assets: " << f.current_assets << endl;
cout << "total_assets: " << f.total_assets << endl;
cout << "total_liabilities: " << f.total_liabilities << endl;
cout << "current_cash: " << f.current_cash << endl;
cout << "current_debt: " << f.current_debt << endl;
cout << "total_cash: " << f.total_cash << endl;
cout << "total_debt: " << f.total_debt << endl;
cout << "shareholder_equity: " << f.shareholder_equity << endl;
cout << "cash_change: " << f.cash_change << endl;
cout << "cash_flow: " << f.cash_flow << endl;
cout << "operating_gains_losses: " << f.operating_gains_losses << endl;
}
}
void print_dividends(const std::string& symbol, const std::string& range) {
IEX::DividendsData data = IEX::Stock::getDividends(symbol, range);
cout << "Called Endpoint: " << data.called_endpoint << endl;
cout << "Number of dividends: " << data.number_of_dividends << endl;
int i = 1;
for (const IEX::Dividend& dividend : data.dividends) {
cout << "Dividend #" << i << endl;
i = i + 1;
cout << "\texDate: " << dividend.ex_date << endl;
cout << "\tPayment Date: " << dividend.payment_date << endl;
cout << "\tRecord Date: " << dividend.record_date << endl;
cout << "\tDeclared Date: " << dividend.declared_date << endl;
cout << "\tAmount: " << dividend.amount << endl;
cout << "\tFlag: " << dividend.flag << endl;
cout << "\tType: " << dividend.type << endl;
cout << "\tQualified: " << dividend.qualified << endl;
cout << "\tIndicated: " << dividend.indicated << endl;
}
}
void menu_options(const std::string& symbol) {
cout << "\n--------------------------------------------------" << endl;
cout << "OPTIONS for [" + symbol + "]" << endl;
cout << " 1. Company Information" << endl;
cout << " 2. Stock/Company Logo" << endl;
cout << " 3. Stock/Company Latest Price" << endl;
cout << " 4. Stock/Company Statistics" << endl;
cout << " 5. Stock/Company Financial Reports" << endl;
cout << " 6. Stock/Company Dividends" << endl;
cout << " 0. Quit\n\n" << endl;
}
void print_menu(const std::string& symbol) {
int choice;
menu_options(symbol);
std::cin >> choice;
while (choice != 0) {
switch(choice) {
case 1:
print_company(symbol);
break;
case 2:
print_company_logo(symbol);
break;
case 3:
print_price(symbol);
break;
case 4:
print_stats(symbol);
break;
case 5:
print_financials(symbol, IEX::Period::annual);
break;
case 6:
print_dividends(symbol,"3m");
break;
case 0:
std::cout << "Bye!" << endl;
break;
default:
std::cout << "Invalid Option" << endl;
break;
}
cin.clear();
menu_options(symbol);
std::cin >> choice;
}
}
void run_all_methods(const std::string& symbol) {
print_company(symbol);
print_company_logo(symbol);
print_price(symbol);
print_stats(symbol);
print_financials(symbol, IEX::Period::annual);
print_dividends(symbol, "3m");
}
int main(int argc, char* argv[]) {
if (argc == 3) {
std::string symbol = argv[1];
std::string argument = argv[2];
if (argument == "-c") {
print_company(symbol);
} else if (argument == "-l") {
print_company_logo(symbol);
} else if (argument == "-p") {
print_price(symbol);
} else if (argument == "-s") {
print_stats(symbol);
} else if (argument == "-r") {
print_financials(symbol,
IEX::Period::annual);
} else if (argument == "-a") {
run_all_methods("AMZN");
} else {
std::cout << "Option Invalid" << endl;
}
return 0;
} else {
print_menu(argv[1]);
return 1;
}
}
|
; Copyright (c) 2019, Maxime Bacoux
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
;
; 1. Redistributions of source code must retain the above copyright notice, this
; list of conditions and the following disclaimer.
;
; 2. Redistributions in binary form must reproduce the above copyright notice,
; this list of conditions and the following disclaimer in the documentation
; and/or other materials provided with the distribution.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
BITS 64
%ifidn __OUTPUT_FORMAT__, win64
%define ARG0 rcx
%define ARG1 edx
%define ARG2 r8d
%else
%define ARG0 rdi
%define ARG1 esi
%define ARG2 edx
%define ISA_Cpuid2 _ISA_Cpuid2
%endif
SECTION .text
ALIGN 16
GLOBAL ISA_Cpuid2
ISA_Cpuid2:
push rbx
mov r11, ARG0
mov eax, ARG1
mov ecx, ARG2
cpuid
mov DWORD [r11 + 0x00], eax
mov DWORD [r11 + 0x04], ebx
mov DWORD [r11 + 0x08], ecx
mov DWORD [r11 + 0x0c], edx
pop rbx
ret
|
; A212886: Decimal expansion of 2/(3*sqrt(3)) = 2*sqrt(3)/9.
; Submitted by Christian Krause
; 3,8,4,9,0,0,1,7,9,4,5,9,7,5,0,5,0,9,6,7,2,7,6,5,8,5,3,6,6,7,9,7,1,6,3,7,0,9,8,4,0,1,1,6,7,5,1,3,4,1,7,9,1,7,3,4,5,7,3,4,8,8,4,3,2,2,6,5,1,7,8,1,5,3,5,2,8,8,8,9,7,1,2,9,1,4,3,5,9,7,0,5,7,1,6,6,3,5,0,1
add $0,2
seq $0,11549 ; Decimal expansion of sqrt(3) truncated to n places.
div $0,45
mod $0,10
|
global long_mode_start
extern Orchid____Orchid___method_______
section .text
bits 64
long_mode_start:
; load null into all data segment registers
mov ax, 0
mov ss, ax
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
call Orchid____Orchid___method_______
hlt
|
;
; jfdctfst.asm - fast integer FDCT (64-bit SSE2)
;
; Copyright 2009 Pierre Ossman <ossman@cendio.se> for Cendio AB
; Copyright (C) 2009, 2016, D. R. Commander.
;
; Based on the x86 SIMD extension for IJG JPEG library
; Copyright (C) 1999-2006, MIYASAKA Masaru.
; For conditions of distribution and use, see copyright notice in jsimdext.inc
;
; This file should be assembled with NASM (Netwide Assembler),
; can *not* be assembled with Microsoft's MASM or any compatible
; assembler (including Borland's Turbo Assembler).
; NASM is available from http://nasm.sourceforge.net/ or
; http://sourceforge.net/project/showfiles.php?group_id=6208
;
; This file contains a fast, not so accurate integer implementation of
; the forward DCT (Discrete Cosine Transform). The following code is
; based directly on the IJG's original jfdctfst.c; see the jfdctfst.c
; for more details.
;
; [TAB8]
%include "jsimdext.inc"
%include "jdct.inc"
; --------------------------------------------------------------------------
%define CONST_BITS 8 ; 14 is also OK.
%if CONST_BITS == 8
F_0_382 equ 98 ; FIX(0.382683433)
F_0_541 equ 139 ; FIX(0.541196100)
F_0_707 equ 181 ; FIX(0.707106781)
F_1_306 equ 334 ; FIX(1.306562965)
%else
; NASM cannot do compile-time arithmetic on floating-point constants.
%define DESCALE(x,n) (((x)+(1<<((n)-1)))>>(n))
F_0_382 equ DESCALE( 410903207, 30-CONST_BITS) ; FIX(0.382683433)
F_0_541 equ DESCALE( 581104887, 30-CONST_BITS) ; FIX(0.541196100)
F_0_707 equ DESCALE( 759250124, 30-CONST_BITS) ; FIX(0.707106781)
F_1_306 equ DESCALE(1402911301, 30-CONST_BITS) ; FIX(1.306562965)
%endif
; --------------------------------------------------------------------------
SECTION SEG_CONST
; PRE_MULTIPLY_SCALE_BITS <= 2 (to avoid overflow)
; CONST_BITS + CONST_SHIFT + PRE_MULTIPLY_SCALE_BITS == 16 (for pmulhw)
%define PRE_MULTIPLY_SCALE_BITS 2
%define CONST_SHIFT (16 - PRE_MULTIPLY_SCALE_BITS - CONST_BITS)
alignz 32
global EXTN(jconst_fdct_ifast_sse2)
EXTN(jconst_fdct_ifast_sse2):
PW_F0707 times 8 dw F_0_707 << CONST_SHIFT
PW_F0382 times 8 dw F_0_382 << CONST_SHIFT
PW_F0541 times 8 dw F_0_541 << CONST_SHIFT
PW_F1306 times 8 dw F_1_306 << CONST_SHIFT
alignz 32
; --------------------------------------------------------------------------
SECTION SEG_TEXT
BITS 64
;
; Perform the forward DCT on one block of samples.
;
; GLOBAL(void)
; jsimd_fdct_ifast_sse2 (DCTELEM *data)
;
; r10 = DCTELEM *data
%define wk(i) rbp-(WK_NUM-(i))*SIZEOF_XMMWORD ; xmmword wk[WK_NUM]
%define WK_NUM 2
align 32
global EXTN(jsimd_fdct_ifast_sse2)
EXTN(jsimd_fdct_ifast_sse2):
push rbp
mov rax, rsp ; rax = original rbp
sub rsp, byte 4
and rsp, byte (-SIZEOF_XMMWORD) ; align to 128 bits
mov [rsp], rax
mov rbp, rsp ; rbp = aligned rbp
lea rsp, [wk(0)]
collect_args 1
; ---- Pass 1: process rows.
mov rdx, r10 ; (DCTELEM *)
movdqa xmm0, XMMWORD [XMMBLOCK(0,0,rdx,SIZEOF_DCTELEM)]
movdqa xmm1, XMMWORD [XMMBLOCK(1,0,rdx,SIZEOF_DCTELEM)]
movdqa xmm2, XMMWORD [XMMBLOCK(2,0,rdx,SIZEOF_DCTELEM)]
movdqa xmm3, XMMWORD [XMMBLOCK(3,0,rdx,SIZEOF_DCTELEM)]
; xmm0=(00 01 02 03 04 05 06 07), xmm2=(20 21 22 23 24 25 26 27)
; xmm1=(10 11 12 13 14 15 16 17), xmm3=(30 31 32 33 34 35 36 37)
movdqa xmm4, xmm0 ; transpose coefficients(phase 1)
punpcklwd xmm0, xmm1 ; xmm0=(00 10 01 11 02 12 03 13)
punpckhwd xmm4, xmm1 ; xmm4=(04 14 05 15 06 16 07 17)
movdqa xmm5, xmm2 ; transpose coefficients(phase 1)
punpcklwd xmm2, xmm3 ; xmm2=(20 30 21 31 22 32 23 33)
punpckhwd xmm5, xmm3 ; xmm5=(24 34 25 35 26 36 27 37)
movdqa xmm6, XMMWORD [XMMBLOCK(4,0,rdx,SIZEOF_DCTELEM)]
movdqa xmm7, XMMWORD [XMMBLOCK(5,0,rdx,SIZEOF_DCTELEM)]
movdqa xmm1, XMMWORD [XMMBLOCK(6,0,rdx,SIZEOF_DCTELEM)]
movdqa xmm3, XMMWORD [XMMBLOCK(7,0,rdx,SIZEOF_DCTELEM)]
; xmm6=( 4 12 20 28 36 44 52 60), xmm1=( 6 14 22 30 38 46 54 62)
; xmm7=( 5 13 21 29 37 45 53 61), xmm3=( 7 15 23 31 39 47 55 63)
movdqa XMMWORD [wk(0)], xmm2 ; wk(0)=(20 30 21 31 22 32 23 33)
movdqa XMMWORD [wk(1)], xmm5 ; wk(1)=(24 34 25 35 26 36 27 37)
movdqa xmm2, xmm6 ; transpose coefficients(phase 1)
punpcklwd xmm6, xmm7 ; xmm6=(40 50 41 51 42 52 43 53)
punpckhwd xmm2, xmm7 ; xmm2=(44 54 45 55 46 56 47 57)
movdqa xmm5, xmm1 ; transpose coefficients(phase 1)
punpcklwd xmm1, xmm3 ; xmm1=(60 70 61 71 62 72 63 73)
punpckhwd xmm5, xmm3 ; xmm5=(64 74 65 75 66 76 67 77)
movdqa xmm7, xmm6 ; transpose coefficients(phase 2)
punpckldq xmm6, xmm1 ; xmm6=(40 50 60 70 41 51 61 71)
punpckhdq xmm7, xmm1 ; xmm7=(42 52 62 72 43 53 63 73)
movdqa xmm3, xmm2 ; transpose coefficients(phase 2)
punpckldq xmm2, xmm5 ; xmm2=(44 54 64 74 45 55 65 75)
punpckhdq xmm3, xmm5 ; xmm3=(46 56 66 76 47 57 67 77)
movdqa xmm1, XMMWORD [wk(0)] ; xmm1=(20 30 21 31 22 32 23 33)
movdqa xmm5, XMMWORD [wk(1)] ; xmm5=(24 34 25 35 26 36 27 37)
movdqa XMMWORD [wk(0)], xmm7 ; wk(0)=(42 52 62 72 43 53 63 73)
movdqa XMMWORD [wk(1)], xmm2 ; wk(1)=(44 54 64 74 45 55 65 75)
movdqa xmm7, xmm0 ; transpose coefficients(phase 2)
punpckldq xmm0, xmm1 ; xmm0=(00 10 20 30 01 11 21 31)
punpckhdq xmm7, xmm1 ; xmm7=(02 12 22 32 03 13 23 33)
movdqa xmm2, xmm4 ; transpose coefficients(phase 2)
punpckldq xmm4, xmm5 ; xmm4=(04 14 24 34 05 15 25 35)
punpckhdq xmm2, xmm5 ; xmm2=(06 16 26 36 07 17 27 37)
movdqa xmm1, xmm0 ; transpose coefficients(phase 3)
punpcklqdq xmm0, xmm6 ; xmm0=(00 10 20 30 40 50 60 70)=data0
punpckhqdq xmm1, xmm6 ; xmm1=(01 11 21 31 41 51 61 71)=data1
movdqa xmm5, xmm2 ; transpose coefficients(phase 3)
punpcklqdq xmm2, xmm3 ; xmm2=(06 16 26 36 46 56 66 76)=data6
punpckhqdq xmm5, xmm3 ; xmm5=(07 17 27 37 47 57 67 77)=data7
movdqa xmm6, xmm1
movdqa xmm3, xmm0
psubw xmm1, xmm2 ; xmm1=data1-data6=tmp6
psubw xmm0, xmm5 ; xmm0=data0-data7=tmp7
paddw xmm6, xmm2 ; xmm6=data1+data6=tmp1
paddw xmm3, xmm5 ; xmm3=data0+data7=tmp0
movdqa xmm2, XMMWORD [wk(0)] ; xmm2=(42 52 62 72 43 53 63 73)
movdqa xmm5, XMMWORD [wk(1)] ; xmm5=(44 54 64 74 45 55 65 75)
movdqa XMMWORD [wk(0)], xmm1 ; wk(0)=tmp6
movdqa XMMWORD [wk(1)], xmm0 ; wk(1)=tmp7
movdqa xmm1, xmm7 ; transpose coefficients(phase 3)
punpcklqdq xmm7, xmm2 ; xmm7=(02 12 22 32 42 52 62 72)=data2
punpckhqdq xmm1, xmm2 ; xmm1=(03 13 23 33 43 53 63 73)=data3
movdqa xmm0, xmm4 ; transpose coefficients(phase 3)
punpcklqdq xmm4, xmm5 ; xmm4=(04 14 24 34 44 54 64 74)=data4
punpckhqdq xmm0, xmm5 ; xmm0=(05 15 25 35 45 55 65 75)=data5
movdqa xmm2, xmm1
movdqa xmm5, xmm7
paddw xmm1, xmm4 ; xmm1=data3+data4=tmp3
paddw xmm7, xmm0 ; xmm7=data2+data5=tmp2
psubw xmm2, xmm4 ; xmm2=data3-data4=tmp4
psubw xmm5, xmm0 ; xmm5=data2-data5=tmp5
; -- Even part
movdqa xmm4, xmm3
movdqa xmm0, xmm6
psubw xmm3, xmm1 ; xmm3=tmp13
psubw xmm6, xmm7 ; xmm6=tmp12
paddw xmm4, xmm1 ; xmm4=tmp10
paddw xmm0, xmm7 ; xmm0=tmp11
paddw xmm6, xmm3
psllw xmm6, PRE_MULTIPLY_SCALE_BITS
pmulhw xmm6, [rel PW_F0707] ; xmm6=z1
movdqa xmm1, xmm4
movdqa xmm7, xmm3
psubw xmm4, xmm0 ; xmm4=data4
psubw xmm3, xmm6 ; xmm3=data6
paddw xmm1, xmm0 ; xmm1=data0
paddw xmm7, xmm6 ; xmm7=data2
movdqa xmm0, XMMWORD [wk(0)] ; xmm0=tmp6
movdqa xmm6, XMMWORD [wk(1)] ; xmm6=tmp7
movdqa XMMWORD [wk(0)], xmm4 ; wk(0)=data4
movdqa XMMWORD [wk(1)], xmm3 ; wk(1)=data6
; -- Odd part
paddw xmm2, xmm5 ; xmm2=tmp10
paddw xmm5, xmm0 ; xmm5=tmp11
paddw xmm0, xmm6 ; xmm0=tmp12, xmm6=tmp7
psllw xmm2, PRE_MULTIPLY_SCALE_BITS
psllw xmm0, PRE_MULTIPLY_SCALE_BITS
psllw xmm5, PRE_MULTIPLY_SCALE_BITS
pmulhw xmm5, [rel PW_F0707] ; xmm5=z3
movdqa xmm4, xmm2 ; xmm4=tmp10
psubw xmm2, xmm0
pmulhw xmm2, [rel PW_F0382] ; xmm2=z5
pmulhw xmm4, [rel PW_F0541] ; xmm4=MULTIPLY(tmp10,FIX_0_541196)
pmulhw xmm0, [rel PW_F1306] ; xmm0=MULTIPLY(tmp12,FIX_1_306562)
paddw xmm4, xmm2 ; xmm4=z2
paddw xmm0, xmm2 ; xmm0=z4
movdqa xmm3, xmm6
psubw xmm6, xmm5 ; xmm6=z13
paddw xmm3, xmm5 ; xmm3=z11
movdqa xmm2, xmm6
movdqa xmm5, xmm3
psubw xmm6, xmm4 ; xmm6=data3
psubw xmm3, xmm0 ; xmm3=data7
paddw xmm2, xmm4 ; xmm2=data5
paddw xmm5, xmm0 ; xmm5=data1
; ---- Pass 2: process columns.
; xmm1=(00 10 20 30 40 50 60 70), xmm7=(02 12 22 32 42 52 62 72)
; xmm5=(01 11 21 31 41 51 61 71), xmm6=(03 13 23 33 43 53 63 73)
movdqa xmm4, xmm1 ; transpose coefficients(phase 1)
punpcklwd xmm1, xmm5 ; xmm1=(00 01 10 11 20 21 30 31)
punpckhwd xmm4, xmm5 ; xmm4=(40 41 50 51 60 61 70 71)
movdqa xmm0, xmm7 ; transpose coefficients(phase 1)
punpcklwd xmm7, xmm6 ; xmm7=(02 03 12 13 22 23 32 33)
punpckhwd xmm0, xmm6 ; xmm0=(42 43 52 53 62 63 72 73)
movdqa xmm5, XMMWORD [wk(0)] ; xmm5=col4
movdqa xmm6, XMMWORD [wk(1)] ; xmm6=col6
; xmm5=(04 14 24 34 44 54 64 74), xmm6=(06 16 26 36 46 56 66 76)
; xmm2=(05 15 25 35 45 55 65 75), xmm3=(07 17 27 37 47 57 67 77)
movdqa XMMWORD [wk(0)], xmm7 ; wk(0)=(02 03 12 13 22 23 32 33)
movdqa XMMWORD [wk(1)], xmm0 ; wk(1)=(42 43 52 53 62 63 72 73)
movdqa xmm7, xmm5 ; transpose coefficients(phase 1)
punpcklwd xmm5, xmm2 ; xmm5=(04 05 14 15 24 25 34 35)
punpckhwd xmm7, xmm2 ; xmm7=(44 45 54 55 64 65 74 75)
movdqa xmm0, xmm6 ; transpose coefficients(phase 1)
punpcklwd xmm6, xmm3 ; xmm6=(06 07 16 17 26 27 36 37)
punpckhwd xmm0, xmm3 ; xmm0=(46 47 56 57 66 67 76 77)
movdqa xmm2, xmm5 ; transpose coefficients(phase 2)
punpckldq xmm5, xmm6 ; xmm5=(04 05 06 07 14 15 16 17)
punpckhdq xmm2, xmm6 ; xmm2=(24 25 26 27 34 35 36 37)
movdqa xmm3, xmm7 ; transpose coefficients(phase 2)
punpckldq xmm7, xmm0 ; xmm7=(44 45 46 47 54 55 56 57)
punpckhdq xmm3, xmm0 ; xmm3=(64 65 66 67 74 75 76 77)
movdqa xmm6, XMMWORD [wk(0)] ; xmm6=(02 03 12 13 22 23 32 33)
movdqa xmm0, XMMWORD [wk(1)] ; xmm0=(42 43 52 53 62 63 72 73)
movdqa XMMWORD [wk(0)], xmm2 ; wk(0)=(24 25 26 27 34 35 36 37)
movdqa XMMWORD [wk(1)], xmm7 ; wk(1)=(44 45 46 47 54 55 56 57)
movdqa xmm2, xmm1 ; transpose coefficients(phase 2)
punpckldq xmm1, xmm6 ; xmm1=(00 01 02 03 10 11 12 13)
punpckhdq xmm2, xmm6 ; xmm2=(20 21 22 23 30 31 32 33)
movdqa xmm7, xmm4 ; transpose coefficients(phase 2)
punpckldq xmm4, xmm0 ; xmm4=(40 41 42 43 50 51 52 53)
punpckhdq xmm7, xmm0 ; xmm7=(60 61 62 63 70 71 72 73)
movdqa xmm6, xmm1 ; transpose coefficients(phase 3)
punpcklqdq xmm1, xmm5 ; xmm1=(00 01 02 03 04 05 06 07)=data0
punpckhqdq xmm6, xmm5 ; xmm6=(10 11 12 13 14 15 16 17)=data1
movdqa xmm0, xmm7 ; transpose coefficients(phase 3)
punpcklqdq xmm7, xmm3 ; xmm7=(60 61 62 63 64 65 66 67)=data6
punpckhqdq xmm0, xmm3 ; xmm0=(70 71 72 73 74 75 76 77)=data7
movdqa xmm5, xmm6
movdqa xmm3, xmm1
psubw xmm6, xmm7 ; xmm6=data1-data6=tmp6
psubw xmm1, xmm0 ; xmm1=data0-data7=tmp7
paddw xmm5, xmm7 ; xmm5=data1+data6=tmp1
paddw xmm3, xmm0 ; xmm3=data0+data7=tmp0
movdqa xmm7, XMMWORD [wk(0)] ; xmm7=(24 25 26 27 34 35 36 37)
movdqa xmm0, XMMWORD [wk(1)] ; xmm0=(44 45 46 47 54 55 56 57)
movdqa XMMWORD [wk(0)], xmm6 ; wk(0)=tmp6
movdqa XMMWORD [wk(1)], xmm1 ; wk(1)=tmp7
movdqa xmm6, xmm2 ; transpose coefficients(phase 3)
punpcklqdq xmm2, xmm7 ; xmm2=(20 21 22 23 24 25 26 27)=data2
punpckhqdq xmm6, xmm7 ; xmm6=(30 31 32 33 34 35 36 37)=data3
movdqa xmm1, xmm4 ; transpose coefficients(phase 3)
punpcklqdq xmm4, xmm0 ; xmm4=(40 41 42 43 44 45 46 47)=data4
punpckhqdq xmm1, xmm0 ; xmm1=(50 51 52 53 54 55 56 57)=data5
movdqa xmm7, xmm6
movdqa xmm0, xmm2
paddw xmm6, xmm4 ; xmm6=data3+data4=tmp3
paddw xmm2, xmm1 ; xmm2=data2+data5=tmp2
psubw xmm7, xmm4 ; xmm7=data3-data4=tmp4
psubw xmm0, xmm1 ; xmm0=data2-data5=tmp5
; -- Even part
movdqa xmm4, xmm3
movdqa xmm1, xmm5
psubw xmm3, xmm6 ; xmm3=tmp13
psubw xmm5, xmm2 ; xmm5=tmp12
paddw xmm4, xmm6 ; xmm4=tmp10
paddw xmm1, xmm2 ; xmm1=tmp11
paddw xmm5, xmm3
psllw xmm5, PRE_MULTIPLY_SCALE_BITS
pmulhw xmm5, [rel PW_F0707] ; xmm5=z1
movdqa xmm6, xmm4
movdqa xmm2, xmm3
psubw xmm4, xmm1 ; xmm4=data4
psubw xmm3, xmm5 ; xmm3=data6
paddw xmm6, xmm1 ; xmm6=data0
paddw xmm2, xmm5 ; xmm2=data2
movdqa XMMWORD [XMMBLOCK(4,0,rdx,SIZEOF_DCTELEM)], xmm4
movdqa XMMWORD [XMMBLOCK(6,0,rdx,SIZEOF_DCTELEM)], xmm3
movdqa XMMWORD [XMMBLOCK(0,0,rdx,SIZEOF_DCTELEM)], xmm6
movdqa XMMWORD [XMMBLOCK(2,0,rdx,SIZEOF_DCTELEM)], xmm2
; -- Odd part
movdqa xmm1, XMMWORD [wk(0)] ; xmm1=tmp6
movdqa xmm5, XMMWORD [wk(1)] ; xmm5=tmp7
paddw xmm7, xmm0 ; xmm7=tmp10
paddw xmm0, xmm1 ; xmm0=tmp11
paddw xmm1, xmm5 ; xmm1=tmp12, xmm5=tmp7
psllw xmm7, PRE_MULTIPLY_SCALE_BITS
psllw xmm1, PRE_MULTIPLY_SCALE_BITS
psllw xmm0, PRE_MULTIPLY_SCALE_BITS
pmulhw xmm0, [rel PW_F0707] ; xmm0=z3
movdqa xmm4, xmm7 ; xmm4=tmp10
psubw xmm7, xmm1
pmulhw xmm7, [rel PW_F0382] ; xmm7=z5
pmulhw xmm4, [rel PW_F0541] ; xmm4=MULTIPLY(tmp10,FIX_0_541196)
pmulhw xmm1, [rel PW_F1306] ; xmm1=MULTIPLY(tmp12,FIX_1_306562)
paddw xmm4, xmm7 ; xmm4=z2
paddw xmm1, xmm7 ; xmm1=z4
movdqa xmm3, xmm5
psubw xmm5, xmm0 ; xmm5=z13
paddw xmm3, xmm0 ; xmm3=z11
movdqa xmm6, xmm5
movdqa xmm2, xmm3
psubw xmm5, xmm4 ; xmm5=data3
psubw xmm3, xmm1 ; xmm3=data7
paddw xmm6, xmm4 ; xmm6=data5
paddw xmm2, xmm1 ; xmm2=data1
movdqa XMMWORD [XMMBLOCK(3,0,rdx,SIZEOF_DCTELEM)], xmm5
movdqa XMMWORD [XMMBLOCK(7,0,rdx,SIZEOF_DCTELEM)], xmm3
movdqa XMMWORD [XMMBLOCK(5,0,rdx,SIZEOF_DCTELEM)], xmm6
movdqa XMMWORD [XMMBLOCK(1,0,rdx,SIZEOF_DCTELEM)], xmm2
uncollect_args 1
mov rsp, rbp ; rsp <- aligned rbp
pop rsp ; rsp <- original rbp
pop rbp
ret
; For some reason, the OS X linker does not honor the request to align the
; segment unless we do this.
align 32
|
; A348978: Numerator of ratio A332993(n) / sigma(n).
; Submitted by Jon Maiga
; 1,1,1,1,1,5,1,1,1,8,1,11,1,11,7,1,1,31,1,6,29,17,1,23,1,20,1,25,1,17,1,1,15,26,43,67,1,29,53,38,1,71,1,13,11,35,1,47,1,27,23,46,1,47,67,53,77,44,1,37,1,47,23,1,79,37,1,20,31,113,1,139,1,56,53,67,89,131,1,26,1,62,1,155,103,65,39,83
mov $1,$0
seq $0,332993 ; a(1) = 1, for n > 1, a(n) = n + a(A032742(n)).
seq $1,203 ; a(n) = sigma(n), the sum of the divisors of n. Also called sigma_1(n).
gcd $1,$0
div $0,$1
|
; A094838: The longest subsequence length that provides an example for A094837.
; 1,1,2,2,2,3,4,4,5,6,6,7,7,8,8,9,9,10,10,11,12,12,13,13,14
lpb $0
pow $0,2
sub $0,1
dif $0,5
lpe
add $0,2
mul $0,6
div $0,11
|
// TODO: Enable compilation w/o -fno-sycl-early-optimizations option.
// See https://github.com/intel/llvm/issues/2264 for more details.
// RUN: %clangxx -fsycl -fno-sycl-early-optimizations %s -o %t.out
// RUNx: %ACC_RUN_PLACEHOLDER %t.out
//==----------------- fpga_lsu.cpp - SYCL FPGA LSU test --------------------==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#include <CL/sycl.hpp>
#include <CL/sycl/INTEL/fpga_extensions.hpp>
// TODO: run is disabled, since no support added in FPGA backend yet. Check
// implementation correctness from CXX and SYCL languages perspective.
int test_lsu(cl::sycl::queue Queue) {
int output_data[2];
for (size_t i = 0; i < 2; i++) {
output_data[i] = -1;
}
int input_data[2];
for (size_t i = 0; i < 2; i++) {
input_data[i] = i + 1;
}
{
cl::sycl::buffer<int, 1> output_buffer(output_data, 1);
cl::sycl::buffer<int, 1> input_buffer(input_data, 1);
Queue.submit([&](cl::sycl::handler &cgh) {
auto output_accessor =
output_buffer.get_access<cl::sycl::access::mode::write>(cgh);
auto input_accessor =
input_buffer.get_access<cl::sycl::access::mode::read>(cgh);
cgh.single_task<class kernel>([=] {
auto input_ptr = input_accessor.get_pointer();
auto output_ptr = output_accessor.get_pointer();
using PrefetchingLSU =
cl::sycl::INTEL::lsu<cl::sycl::INTEL::prefetch<true>,
cl::sycl::INTEL::statically_coalesce<false>>;
using BurstCoalescedLSU =
cl::sycl::INTEL::lsu<cl::sycl::INTEL::burst_coalesce<true>,
cl::sycl::INTEL::statically_coalesce<false>>;
using CachingLSU =
cl::sycl::INTEL::lsu<cl::sycl::INTEL::burst_coalesce<true>,
cl::sycl::INTEL::cache<1024>,
cl::sycl::INTEL::statically_coalesce<false>>;
using PipelinedLSU = cl::sycl::INTEL::lsu<>;
int X = PrefetchingLSU::load(input_ptr); // int X = input_ptr[0]
int Y = CachingLSU::load(input_ptr + 1); // int Y = input_ptr[1]
BurstCoalescedLSU::store(output_ptr, X); // output_ptr[0] = X
PipelinedLSU::store(output_ptr + 1, Y); // output_ptr[1] = Y
});
});
}
for (int i = 0; i < 2; i++) {
if (output_data[i] != input_data[i]) {
std::cout << "Unexpected read from output_data: " << output_data[i]
<< ", v.s. expected " << input_data[i] << std::endl;
return -1;
}
}
return 0;
}
int main() {
cl::sycl::queue Queue{cl::sycl::INTEL::fpga_emulator_selector{}};
return test_lsu(Queue);
}
|
;hello.asm
; turns on an LED which is connected to PB5 (digital out 13)
.include "./m328Pdef.inc"
ldi r16,0b00100000
out DDRB,r16 ; Set data direction to out
out PortB,r16 ; Set pins high or low
Start:
rjmp Start |
###############################################################################
# Copyright 2018 Intel Corporation
# All Rights Reserved.
#
# If this software was obtained under the Intel Simplified Software License,
# the following terms apply:
#
# The source code, information and material ("Material") contained herein is
# owned by Intel Corporation or its suppliers or licensors, and title to such
# Material remains with Intel Corporation or its suppliers or licensors. The
# Material contains proprietary information of Intel or its suppliers and
# licensors. The Material is protected by worldwide copyright laws and treaty
# provisions. No part of the Material may be used, copied, reproduced,
# modified, published, uploaded, posted, transmitted, distributed or disclosed
# in any way without Intel's prior express written permission. No license under
# any patent, copyright or other intellectual property rights in the Material
# is granted to or conferred upon you, either expressly, by implication,
# inducement, estoppel or otherwise. Any license under such intellectual
# property rights must be express and approved by Intel in writing.
#
# Unless otherwise agreed by Intel in writing, you may not remove or alter this
# notice or any other notice embedded in Materials by Intel or Intel's
# suppliers or licensors in any way.
#
#
# If this software was obtained under the Apache License, Version 2.0 (the
# "License"), the following terms apply:
#
# You may not use this file except in compliance with the License. You may
# obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
#
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
#
# See the License for the specific language governing permissions and
# limitations under the License.
###############################################################################
.text
.p2align 4, 0x90
CONST_TABLE:
_poly:
.quad 0x1, 0xC200000000000000
_twoone:
.quad 0x1, 0x100000000
_u128_str:
.byte 15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0
_mask1:
.quad 0xffffffffffffffff, 0x0
_mask2:
.quad 0x0, 0xffffffffffffffff
_inc1:
.quad 1,0
.p2align 4, 0x90
.globl _p8_AesGcmPrecompute_avx
_p8_AesGcmPrecompute_avx:
push %ebp
mov %esp, %ebp
push %esi
call .L__0000gas_1
.L__0000gas_1:
pop %esi
sub $(.L__0000gas_1-CONST_TABLE), %esi
movl (8)(%ebp), %eax
movdqu (%eax), %xmm0
pshufb ((_u128_str-CONST_TABLE))(%esi), %xmm0
movdqa %xmm0, %xmm4
psllq $(1), %xmm0
psrlq $(63), %xmm4
movdqa %xmm4, %xmm3
pslldq $(8), %xmm4
psrldq $(8), %xmm3
por %xmm4, %xmm0
pshufd $(36), %xmm3, %xmm4
pcmpeqd ((_twoone-CONST_TABLE))(%esi), %xmm4
pand ((_poly-CONST_TABLE))(%esi), %xmm4
pxor %xmm4, %xmm0
movdqa %xmm0, %xmm1
pshufd $(78), %xmm1, %xmm5
pshufd $(78), %xmm0, %xmm3
pxor %xmm1, %xmm5
pxor %xmm0, %xmm3
pclmulqdq $(0), %xmm3, %xmm5
movdqa %xmm1, %xmm4
pclmulqdq $(0), %xmm0, %xmm1
pxor %xmm3, %xmm3
pclmulqdq $(17), %xmm0, %xmm4
pxor %xmm1, %xmm5
pxor %xmm4, %xmm5
palignr $(8), %xmm5, %xmm3
pslldq $(8), %xmm5
pxor %xmm3, %xmm4
pxor %xmm5, %xmm1
movdqa %xmm1, %xmm3
psllq $(1), %xmm3
pxor %xmm1, %xmm3
psllq $(5), %xmm3
pxor %xmm1, %xmm3
psllq $(57), %xmm3
movdqa %xmm3, %xmm5
pslldq $(8), %xmm5
psrldq $(8), %xmm3
pxor %xmm5, %xmm1
pxor %xmm3, %xmm4
movdqa %xmm1, %xmm5
psrlq $(5), %xmm5
pxor %xmm1, %xmm5
psrlq $(1), %xmm5
pxor %xmm1, %xmm5
psrlq $(1), %xmm5
pxor %xmm5, %xmm1
pxor %xmm4, %xmm1
movdqa %xmm1, %xmm2
pshufd $(78), %xmm2, %xmm5
pshufd $(78), %xmm1, %xmm3
pxor %xmm2, %xmm5
pxor %xmm1, %xmm3
pclmulqdq $(0), %xmm3, %xmm5
movdqa %xmm2, %xmm4
pclmulqdq $(0), %xmm1, %xmm2
pxor %xmm3, %xmm3
pclmulqdq $(17), %xmm1, %xmm4
pxor %xmm2, %xmm5
pxor %xmm4, %xmm5
palignr $(8), %xmm5, %xmm3
pslldq $(8), %xmm5
pxor %xmm3, %xmm4
pxor %xmm5, %xmm2
movdqa %xmm2, %xmm3
psllq $(1), %xmm3
pxor %xmm2, %xmm3
psllq $(5), %xmm3
pxor %xmm2, %xmm3
psllq $(57), %xmm3
movdqa %xmm3, %xmm5
pslldq $(8), %xmm5
psrldq $(8), %xmm3
pxor %xmm5, %xmm2
pxor %xmm3, %xmm4
movdqa %xmm2, %xmm5
psrlq $(5), %xmm5
pxor %xmm2, %xmm5
psrlq $(1), %xmm5
pxor %xmm2, %xmm5
psrlq $(1), %xmm5
pxor %xmm5, %xmm2
pxor %xmm4, %xmm2
movl (12)(%ebp), %eax
movdqu %xmm0, (%eax)
movdqu %xmm1, (16)(%eax)
movdqu %xmm2, (32)(%eax)
pop %esi
pop %ebp
ret
.p2align 4, 0x90
.globl _p8_AesGcmMulGcm_avx
_p8_AesGcmMulGcm_avx:
push %ebp
mov %esp, %ebp
push %esi
push %edi
call .L__0001gas_2
.L__0001gas_2:
pop %esi
sub $(.L__0001gas_2-CONST_TABLE), %esi
movl (8)(%ebp), %edi
movl (12)(%ebp), %eax
movdqa (%edi), %xmm0
pshufb ((_u128_str-CONST_TABLE))(%esi), %xmm0
movdqa (%eax), %xmm1
pshufd $(78), %xmm0, %xmm4
pshufd $(78), %xmm1, %xmm2
pxor %xmm0, %xmm4
pxor %xmm1, %xmm2
pclmulqdq $(0), %xmm2, %xmm4
movdqa %xmm0, %xmm3
pclmulqdq $(0), %xmm1, %xmm0
pxor %xmm2, %xmm2
pclmulqdq $(17), %xmm1, %xmm3
pxor %xmm0, %xmm4
pxor %xmm3, %xmm4
palignr $(8), %xmm4, %xmm2
pslldq $(8), %xmm4
pxor %xmm2, %xmm3
pxor %xmm4, %xmm0
movdqa %xmm0, %xmm2
psllq $(1), %xmm2
pxor %xmm0, %xmm2
psllq $(5), %xmm2
pxor %xmm0, %xmm2
psllq $(57), %xmm2
movdqa %xmm2, %xmm4
pslldq $(8), %xmm4
psrldq $(8), %xmm2
pxor %xmm4, %xmm0
pxor %xmm2, %xmm3
movdqa %xmm0, %xmm4
psrlq $(5), %xmm4
pxor %xmm0, %xmm4
psrlq $(1), %xmm4
pxor %xmm0, %xmm4
psrlq $(1), %xmm4
pxor %xmm4, %xmm0
pxor %xmm3, %xmm0
pshufb ((_u128_str-CONST_TABLE))(%esi), %xmm0
movdqa %xmm0, (%edi)
pop %edi
pop %esi
pop %ebp
ret
.p2align 4, 0x90
.globl _p8_AesGcmAuth_avx
_p8_AesGcmAuth_avx:
push %ebp
mov %esp, %ebp
push %esi
push %edi
call .L__0002gas_3
.L__0002gas_3:
pop %esi
sub $(.L__0002gas_3-CONST_TABLE), %esi
movl (8)(%ebp), %edi
movdqa (%edi), %xmm0
pshufb ((_u128_str-CONST_TABLE))(%esi), %xmm0
movl (20)(%ebp), %eax
movdqa (%eax), %xmm1
movl (12)(%ebp), %ecx
movl (16)(%ebp), %edx
.p2align 4, 0x90
.Lauth_loopgas_3:
movdqu (%ecx), %xmm2
pshufb ((_u128_str-CONST_TABLE))(%esi), %xmm2
add $(16), %ecx
pxor %xmm2, %xmm0
pshufd $(78), %xmm0, %xmm4
pshufd $(78), %xmm1, %xmm2
pxor %xmm0, %xmm4
pxor %xmm1, %xmm2
pclmulqdq $(0), %xmm2, %xmm4
movdqa %xmm0, %xmm3
pclmulqdq $(0), %xmm1, %xmm0
pxor %xmm2, %xmm2
pclmulqdq $(17), %xmm1, %xmm3
pxor %xmm0, %xmm4
pxor %xmm3, %xmm4
palignr $(8), %xmm4, %xmm2
pslldq $(8), %xmm4
pxor %xmm2, %xmm3
pxor %xmm4, %xmm0
movdqa %xmm0, %xmm2
psllq $(1), %xmm2
pxor %xmm0, %xmm2
psllq $(5), %xmm2
pxor %xmm0, %xmm2
psllq $(57), %xmm2
movdqa %xmm2, %xmm4
pslldq $(8), %xmm4
psrldq $(8), %xmm2
pxor %xmm4, %xmm0
pxor %xmm2, %xmm3
movdqa %xmm0, %xmm4
psrlq $(5), %xmm4
pxor %xmm0, %xmm4
psrlq $(1), %xmm4
pxor %xmm0, %xmm4
psrlq $(1), %xmm4
pxor %xmm4, %xmm0
pxor %xmm3, %xmm0
sub $(16), %edx
jnz .Lauth_loopgas_3
pshufb ((_u128_str-CONST_TABLE))(%esi), %xmm0
movdqa %xmm0, (%edi)
pop %edi
pop %esi
pop %ebp
ret
.p2align 4, 0x90
.globl _p8_AesGcmEnc_avx
_p8_AesGcmEnc_avx:
push %ebp
mov %esp, %ebp
push %ebx
push %esi
push %edi
sub $(152), %esp
lea (16)(%esp), %ebx
and $(-16), %ebx
movl (20)(%ebp), %eax
call .L__0003gas_4
.L__0003gas_4:
pop %esi
sub $(.L__0003gas_4-CONST_TABLE), %esi
movdqa ((_u128_str-CONST_TABLE))(%esi), %xmm4
movdqa ((_inc1-CONST_TABLE))(%esi), %xmm5
movl (36)(%ebp), %eax
movl (40)(%ebp), %ecx
movl (32)(%ebp), %edx
movdqu (%eax), %xmm0
movdqu (%ecx), %xmm1
movdqu (%edx), %xmm2
pshufb %xmm4, %xmm0
movdqa %xmm0, (%ebx)
movdqa %xmm1, (16)(%ebx)
pshufb %xmm4, %xmm2
pxor %xmm1, %xmm1
movdqa %xmm2, (32)(%ebx)
movdqa %xmm1, (48)(%ebx)
movdqa %xmm1, (64)(%ebx)
movdqa %xmm1, (80)(%ebx)
movdqa %xmm4, (96)(%ebx)
movdqa %xmm5, (112)(%ebx)
movl (28)(%ebp), %ecx
movl (12)(%ebp), %esi
movl (8)(%ebp), %edi
movl (16)(%ebp), %eax
mov $(63), %edx
and %eax, %edx
and $(-64), %eax
movl %eax, (128)(%ebx)
movl %edx, (132)(%ebx)
jz .Lsingle_block_procgas_4
.p2align 4, 0x90
.Lblks4_loopgas_4:
movdqa (112)(%ebx), %xmm5
movdqa %xmm0, %xmm1
paddd %xmm5, %xmm1
movdqa %xmm1, %xmm2
paddd %xmm5, %xmm2
movdqa %xmm2, %xmm3
paddd %xmm5, %xmm3
movdqa %xmm3, %xmm4
paddd %xmm5, %xmm4
movdqa %xmm4, (%ebx)
movdqa (96)(%ebx), %xmm5
movdqa (%ecx), %xmm0
lea (16)(%ecx), %eax
pshufb %xmm5, %xmm1
pshufb %xmm5, %xmm2
pshufb %xmm5, %xmm3
pshufb %xmm5, %xmm4
pxor %xmm0, %xmm1
pxor %xmm0, %xmm2
pxor %xmm0, %xmm3
pxor %xmm0, %xmm4
movdqa (%eax), %xmm0
add $(16), %eax
movl (24)(%ebp), %edx
sub $(1), %edx
.p2align 4, 0x90
.Lcipher4_loopgas_4:
aesenc %xmm0, %xmm1
aesenc %xmm0, %xmm2
aesenc %xmm0, %xmm3
aesenc %xmm0, %xmm4
movdqa (%eax), %xmm0
add $(16), %eax
dec %edx
jnz .Lcipher4_loopgas_4
aesenclast %xmm0, %xmm1
aesenclast %xmm0, %xmm2
aesenclast %xmm0, %xmm3
aesenclast %xmm0, %xmm4
movdqa (16)(%ebx), %xmm0
movdqa %xmm4, (16)(%ebx)
movdqu (%esi), %xmm4
movdqu (16)(%esi), %xmm5
movdqu (32)(%esi), %xmm6
movdqu (48)(%esi), %xmm7
add $(64), %esi
pxor %xmm4, %xmm0
movdqu %xmm0, (%edi)
pshufb (96)(%ebx), %xmm0
pxor (32)(%ebx), %xmm0
pxor %xmm5, %xmm1
movdqu %xmm1, (16)(%edi)
pshufb (96)(%ebx), %xmm1
pxor (48)(%ebx), %xmm1
pxor %xmm6, %xmm2
movdqu %xmm2, (32)(%edi)
pshufb (96)(%ebx), %xmm2
pxor (64)(%ebx), %xmm2
pxor %xmm7, %xmm3
movdqu %xmm3, (48)(%edi)
pshufb (96)(%ebx), %xmm3
pxor (80)(%ebx), %xmm3
add $(64), %edi
movl (44)(%ebp), %eax
movdqa (32)(%eax), %xmm7
cmpl $(64), (128)(%ebx)
je .Lcombine_hashgas_4
pshufd $(78), %xmm0, %xmm6
pshufd $(78), %xmm7, %xmm4
pxor %xmm0, %xmm6
pxor %xmm7, %xmm4
pclmulqdq $(0), %xmm4, %xmm6
movdqa %xmm0, %xmm5
pclmulqdq $(0), %xmm7, %xmm0
pxor %xmm4, %xmm4
pclmulqdq $(17), %xmm7, %xmm5
pxor %xmm0, %xmm6
pxor %xmm5, %xmm6
palignr $(8), %xmm6, %xmm4
pslldq $(8), %xmm6
pxor %xmm4, %xmm5
pxor %xmm6, %xmm0
movdqa %xmm0, %xmm4
psllq $(1), %xmm4
pxor %xmm0, %xmm4
psllq $(5), %xmm4
pxor %xmm0, %xmm4
psllq $(57), %xmm4
movdqa %xmm4, %xmm6
pslldq $(8), %xmm6
psrldq $(8), %xmm4
pxor %xmm6, %xmm0
pxor %xmm4, %xmm5
movdqa %xmm0, %xmm6
psrlq $(5), %xmm6
pxor %xmm0, %xmm6
psrlq $(1), %xmm6
pxor %xmm0, %xmm6
psrlq $(1), %xmm6
pxor %xmm6, %xmm0
pxor %xmm5, %xmm0
pshufd $(78), %xmm1, %xmm6
pshufd $(78), %xmm7, %xmm4
pxor %xmm1, %xmm6
pxor %xmm7, %xmm4
pclmulqdq $(0), %xmm4, %xmm6
movdqa %xmm1, %xmm5
pclmulqdq $(0), %xmm7, %xmm1
pxor %xmm4, %xmm4
pclmulqdq $(17), %xmm7, %xmm5
pxor %xmm1, %xmm6
pxor %xmm5, %xmm6
palignr $(8), %xmm6, %xmm4
pslldq $(8), %xmm6
pxor %xmm4, %xmm5
pxor %xmm6, %xmm1
movdqa %xmm1, %xmm4
psllq $(1), %xmm4
pxor %xmm1, %xmm4
psllq $(5), %xmm4
pxor %xmm1, %xmm4
psllq $(57), %xmm4
movdqa %xmm4, %xmm6
pslldq $(8), %xmm6
psrldq $(8), %xmm4
pxor %xmm6, %xmm1
pxor %xmm4, %xmm5
movdqa %xmm1, %xmm6
psrlq $(5), %xmm6
pxor %xmm1, %xmm6
psrlq $(1), %xmm6
pxor %xmm1, %xmm6
psrlq $(1), %xmm6
pxor %xmm6, %xmm1
pxor %xmm5, %xmm1
pshufd $(78), %xmm2, %xmm6
pshufd $(78), %xmm7, %xmm4
pxor %xmm2, %xmm6
pxor %xmm7, %xmm4
pclmulqdq $(0), %xmm4, %xmm6
movdqa %xmm2, %xmm5
pclmulqdq $(0), %xmm7, %xmm2
pxor %xmm4, %xmm4
pclmulqdq $(17), %xmm7, %xmm5
pxor %xmm2, %xmm6
pxor %xmm5, %xmm6
palignr $(8), %xmm6, %xmm4
pslldq $(8), %xmm6
pxor %xmm4, %xmm5
pxor %xmm6, %xmm2
movdqa %xmm2, %xmm4
psllq $(1), %xmm4
pxor %xmm2, %xmm4
psllq $(5), %xmm4
pxor %xmm2, %xmm4
psllq $(57), %xmm4
movdqa %xmm4, %xmm6
pslldq $(8), %xmm6
psrldq $(8), %xmm4
pxor %xmm6, %xmm2
pxor %xmm4, %xmm5
movdqa %xmm2, %xmm6
psrlq $(5), %xmm6
pxor %xmm2, %xmm6
psrlq $(1), %xmm6
pxor %xmm2, %xmm6
psrlq $(1), %xmm6
pxor %xmm6, %xmm2
pxor %xmm5, %xmm2
pshufd $(78), %xmm3, %xmm6
pshufd $(78), %xmm7, %xmm4
pxor %xmm3, %xmm6
pxor %xmm7, %xmm4
pclmulqdq $(0), %xmm4, %xmm6
movdqa %xmm3, %xmm5
pclmulqdq $(0), %xmm7, %xmm3
pxor %xmm4, %xmm4
pclmulqdq $(17), %xmm7, %xmm5
pxor %xmm3, %xmm6
pxor %xmm5, %xmm6
palignr $(8), %xmm6, %xmm4
pslldq $(8), %xmm6
pxor %xmm4, %xmm5
pxor %xmm6, %xmm3
movdqa %xmm3, %xmm4
psllq $(1), %xmm4
pxor %xmm3, %xmm4
psllq $(5), %xmm4
pxor %xmm3, %xmm4
psllq $(57), %xmm4
movdqa %xmm4, %xmm6
pslldq $(8), %xmm6
psrldq $(8), %xmm4
pxor %xmm6, %xmm3
pxor %xmm4, %xmm5
movdqa %xmm3, %xmm6
psrlq $(5), %xmm6
pxor %xmm3, %xmm6
psrlq $(1), %xmm6
pxor %xmm3, %xmm6
psrlq $(1), %xmm6
pxor %xmm6, %xmm3
pxor %xmm5, %xmm3
movdqa %xmm0, (32)(%ebx)
movdqa %xmm1, (48)(%ebx)
movdqa %xmm2, (64)(%ebx)
movdqa %xmm3, (80)(%ebx)
movdqa (%ebx), %xmm0
subl $(64), (128)(%ebx)
jge .Lblks4_loopgas_4
.Lcombine_hashgas_4:
pshufd $(78), %xmm0, %xmm6
pshufd $(78), %xmm7, %xmm4
pxor %xmm0, %xmm6
pxor %xmm7, %xmm4
pclmulqdq $(0), %xmm4, %xmm6
movdqa %xmm0, %xmm5
pclmulqdq $(0), %xmm7, %xmm0
pxor %xmm4, %xmm4
pclmulqdq $(17), %xmm7, %xmm5
pxor %xmm0, %xmm6
pxor %xmm5, %xmm6
palignr $(8), %xmm6, %xmm4
pslldq $(8), %xmm6
pxor %xmm4, %xmm5
pxor %xmm6, %xmm0
movdqa %xmm0, %xmm4
psllq $(1), %xmm4
pxor %xmm0, %xmm4
psllq $(5), %xmm4
pxor %xmm0, %xmm4
psllq $(57), %xmm4
movdqa %xmm4, %xmm6
pslldq $(8), %xmm6
psrldq $(8), %xmm4
pxor %xmm6, %xmm0
pxor %xmm4, %xmm5
movdqa %xmm0, %xmm6
psrlq $(5), %xmm6
pxor %xmm0, %xmm6
psrlq $(1), %xmm6
pxor %xmm0, %xmm6
psrlq $(1), %xmm6
pxor %xmm6, %xmm0
pxor %xmm5, %xmm0
movdqa (16)(%eax), %xmm7
pshufd $(78), %xmm1, %xmm6
pshufd $(78), %xmm7, %xmm4
pxor %xmm1, %xmm6
pxor %xmm7, %xmm4
pclmulqdq $(0), %xmm4, %xmm6
movdqa %xmm1, %xmm5
pclmulqdq $(0), %xmm7, %xmm1
pxor %xmm4, %xmm4
pclmulqdq $(17), %xmm7, %xmm5
pxor %xmm1, %xmm6
pxor %xmm5, %xmm6
palignr $(8), %xmm6, %xmm4
pslldq $(8), %xmm6
pxor %xmm4, %xmm5
pxor %xmm6, %xmm1
movdqa %xmm1, %xmm4
psllq $(1), %xmm4
pxor %xmm1, %xmm4
psllq $(5), %xmm4
pxor %xmm1, %xmm4
psllq $(57), %xmm4
movdqa %xmm4, %xmm6
pslldq $(8), %xmm6
psrldq $(8), %xmm4
pxor %xmm6, %xmm1
pxor %xmm4, %xmm5
movdqa %xmm1, %xmm6
psrlq $(5), %xmm6
pxor %xmm1, %xmm6
psrlq $(1), %xmm6
pxor %xmm1, %xmm6
psrlq $(1), %xmm6
pxor %xmm6, %xmm1
pxor %xmm5, %xmm1
movdqa (%eax), %xmm7
pshufd $(78), %xmm2, %xmm6
pshufd $(78), %xmm7, %xmm4
pxor %xmm2, %xmm6
pxor %xmm7, %xmm4
pclmulqdq $(0), %xmm4, %xmm6
movdqa %xmm2, %xmm5
pclmulqdq $(0), %xmm7, %xmm2
pxor %xmm4, %xmm4
pclmulqdq $(17), %xmm7, %xmm5
pxor %xmm2, %xmm6
pxor %xmm5, %xmm6
palignr $(8), %xmm6, %xmm4
pslldq $(8), %xmm6
pxor %xmm4, %xmm5
pxor %xmm6, %xmm2
movdqa %xmm2, %xmm4
psllq $(1), %xmm4
pxor %xmm2, %xmm4
psllq $(5), %xmm4
pxor %xmm2, %xmm4
psllq $(57), %xmm4
movdqa %xmm4, %xmm6
pslldq $(8), %xmm6
psrldq $(8), %xmm4
pxor %xmm6, %xmm2
pxor %xmm4, %xmm5
movdqa %xmm2, %xmm6
psrlq $(5), %xmm6
pxor %xmm2, %xmm6
psrlq $(1), %xmm6
pxor %xmm2, %xmm6
psrlq $(1), %xmm6
pxor %xmm6, %xmm2
pxor %xmm5, %xmm2
pxor %xmm1, %xmm3
pxor %xmm2, %xmm3
pshufd $(78), %xmm3, %xmm6
pshufd $(78), %xmm7, %xmm4
pxor %xmm3, %xmm6
pxor %xmm7, %xmm4
pclmulqdq $(0), %xmm4, %xmm6
movdqa %xmm3, %xmm5
pclmulqdq $(0), %xmm7, %xmm3
pxor %xmm4, %xmm4
pclmulqdq $(17), %xmm7, %xmm5
pxor %xmm3, %xmm6
pxor %xmm5, %xmm6
palignr $(8), %xmm6, %xmm4
pslldq $(8), %xmm6
pxor %xmm4, %xmm5
pxor %xmm6, %xmm3
movdqa %xmm3, %xmm4
psllq $(1), %xmm4
pxor %xmm3, %xmm4
psllq $(5), %xmm4
pxor %xmm3, %xmm4
psllq $(57), %xmm4
movdqa %xmm4, %xmm6
pslldq $(8), %xmm6
psrldq $(8), %xmm4
pxor %xmm6, %xmm3
pxor %xmm4, %xmm5
movdqa %xmm3, %xmm6
psrlq $(5), %xmm6
pxor %xmm3, %xmm6
psrlq $(1), %xmm6
pxor %xmm3, %xmm6
psrlq $(1), %xmm6
pxor %xmm6, %xmm3
pxor %xmm5, %xmm3
pxor %xmm0, %xmm3
movdqa %xmm3, (32)(%ebx)
.Lsingle_block_procgas_4:
cmpl $(0), (132)(%ebx)
jz .Lquitgas_4
.p2align 4, 0x90
.Lblk_loopgas_4:
movdqa (%ebx), %xmm0
movdqa %xmm0, %xmm1
paddd (112)(%ebx), %xmm1
movdqa %xmm1, (%ebx)
movdqa (%ecx), %xmm0
lea (16)(%ecx), %eax
pshufb (96)(%ebx), %xmm1
pxor %xmm0, %xmm1
movdqa (%eax), %xmm0
add $(16), %eax
movl (24)(%ebp), %edx
sub $(1), %edx
.p2align 4, 0x90
.Lcipher_loopgas_4:
aesenc %xmm0, %xmm1
movdqa (%eax), %xmm0
add $(16), %eax
dec %edx
jnz .Lcipher_loopgas_4
aesenclast %xmm0, %xmm1
movdqa (16)(%ebx), %xmm0
movdqa %xmm1, (16)(%ebx)
movdqu (%esi), %xmm1
add $(16), %esi
pxor %xmm1, %xmm0
movdqu %xmm0, (%edi)
add $(16), %edi
movl (44)(%ebp), %eax
pshufb (96)(%ebx), %xmm0
pxor (32)(%ebx), %xmm0
movdqa (%eax), %xmm1
pshufd $(78), %xmm0, %xmm4
pshufd $(78), %xmm1, %xmm2
pxor %xmm0, %xmm4
pxor %xmm1, %xmm2
pclmulqdq $(0), %xmm2, %xmm4
movdqa %xmm0, %xmm3
pclmulqdq $(0), %xmm1, %xmm0
pxor %xmm2, %xmm2
pclmulqdq $(17), %xmm1, %xmm3
pxor %xmm0, %xmm4
pxor %xmm3, %xmm4
palignr $(8), %xmm4, %xmm2
pslldq $(8), %xmm4
pxor %xmm2, %xmm3
pxor %xmm4, %xmm0
movdqa %xmm0, %xmm2
psllq $(1), %xmm2
pxor %xmm0, %xmm2
psllq $(5), %xmm2
pxor %xmm0, %xmm2
psllq $(57), %xmm2
movdqa %xmm2, %xmm4
pslldq $(8), %xmm4
psrldq $(8), %xmm2
pxor %xmm4, %xmm0
pxor %xmm2, %xmm3
movdqa %xmm0, %xmm4
psrlq $(5), %xmm4
pxor %xmm0, %xmm4
psrlq $(1), %xmm4
pxor %xmm0, %xmm4
psrlq $(1), %xmm4
pxor %xmm4, %xmm0
pxor %xmm3, %xmm0
movdqa %xmm0, (32)(%ebx)
subl $(16), (132)(%ebx)
jg .Lblk_loopgas_4
.Lquitgas_4:
movdqa (96)(%ebx), %xmm4
movdqa (%ebx), %xmm0
movdqa (16)(%ebx), %xmm1
movdqa (32)(%ebx), %xmm2
movl (36)(%ebp), %eax
movl (40)(%ebp), %ecx
movl (32)(%ebp), %edx
pshufb %xmm4, %xmm0
movdqu %xmm0, (%eax)
movdqu %xmm1, (%ecx)
pshufb %xmm4, %xmm2
movdqu %xmm2, (%edx)
add $(152), %esp
pop %edi
pop %esi
pop %ebx
pop %ebp
ret
.p2align 4, 0x90
.globl _p8_AesGcmDec_avx
_p8_AesGcmDec_avx:
push %ebp
mov %esp, %ebp
push %ebx
push %esi
push %edi
sub $(152), %esp
lea (16)(%esp), %ebx
and $(-16), %ebx
movl (20)(%ebp), %eax
call .L__0004gas_5
.L__0004gas_5:
pop %esi
sub $(.L__0004gas_5-CONST_TABLE), %esi
movdqa ((_u128_str-CONST_TABLE))(%esi), %xmm4
movdqa ((_inc1-CONST_TABLE))(%esi), %xmm5
movl (36)(%ebp), %eax
movl (40)(%ebp), %ecx
movl (32)(%ebp), %edx
movdqu (%eax), %xmm0
movdqu (%ecx), %xmm1
movdqu (%edx), %xmm2
pshufb %xmm4, %xmm0
movdqa %xmm0, (%ebx)
movdqa %xmm1, (16)(%ebx)
pshufb %xmm4, %xmm2
pxor %xmm1, %xmm1
movdqa %xmm2, (32)(%ebx)
movdqa %xmm1, (48)(%ebx)
movdqa %xmm1, (64)(%ebx)
movdqa %xmm1, (80)(%ebx)
movdqa %xmm4, (96)(%ebx)
movdqa %xmm5, (112)(%ebx)
movl (28)(%ebp), %ecx
movl (12)(%ebp), %esi
movl (8)(%ebp), %edi
movl (16)(%ebp), %eax
mov $(63), %edx
and %eax, %edx
and $(-64), %eax
movl %eax, (128)(%ebx)
movl %edx, (132)(%ebx)
jz .Lsingle_block_procgas_5
.p2align 4, 0x90
.Lblks4_loopgas_5:
movdqa (112)(%ebx), %xmm5
movdqa %xmm0, %xmm1
paddd %xmm5, %xmm1
movdqa %xmm1, %xmm2
paddd %xmm5, %xmm2
movdqa %xmm2, %xmm3
paddd %xmm5, %xmm3
movdqa %xmm3, %xmm4
paddd %xmm5, %xmm4
movdqa %xmm4, (%ebx)
movdqa (96)(%ebx), %xmm5
movdqa (%ecx), %xmm0
lea (16)(%ecx), %eax
pshufb %xmm5, %xmm1
pshufb %xmm5, %xmm2
pshufb %xmm5, %xmm3
pshufb %xmm5, %xmm4
pxor %xmm0, %xmm1
pxor %xmm0, %xmm2
pxor %xmm0, %xmm3
pxor %xmm0, %xmm4
movdqa (%eax), %xmm0
add $(16), %eax
movl (24)(%ebp), %edx
sub $(1), %edx
.p2align 4, 0x90
.Lcipher4_loopgas_5:
aesenc %xmm0, %xmm1
aesenc %xmm0, %xmm2
aesenc %xmm0, %xmm3
aesenc %xmm0, %xmm4
movdqa (%eax), %xmm0
add $(16), %eax
dec %edx
jnz .Lcipher4_loopgas_5
aesenclast %xmm0, %xmm1
aesenclast %xmm0, %xmm2
aesenclast %xmm0, %xmm3
aesenclast %xmm0, %xmm4
movdqa (16)(%ebx), %xmm0
movdqa %xmm4, (16)(%ebx)
movdqu (%esi), %xmm4
movdqu (16)(%esi), %xmm5
movdqu (32)(%esi), %xmm6
movdqu (48)(%esi), %xmm7
add $(64), %esi
pxor %xmm4, %xmm0
movdqu %xmm0, (%edi)
pshufb (96)(%ebx), %xmm4
pxor (32)(%ebx), %xmm4
pxor %xmm5, %xmm1
movdqu %xmm1, (16)(%edi)
pshufb (96)(%ebx), %xmm5
pxor (48)(%ebx), %xmm5
pxor %xmm6, %xmm2
movdqu %xmm2, (32)(%edi)
pshufb (96)(%ebx), %xmm6
pxor (64)(%ebx), %xmm6
pxor %xmm7, %xmm3
movdqu %xmm3, (48)(%edi)
pshufb (96)(%ebx), %xmm7
pxor (80)(%ebx), %xmm7
add $(64), %edi
movl (44)(%ebp), %eax
movdqa (32)(%eax), %xmm0
cmpl $(64), (128)(%ebx)
je .Lcombine_hashgas_5
pshufd $(78), %xmm4, %xmm3
pshufd $(78), %xmm0, %xmm1
pxor %xmm4, %xmm3
pxor %xmm0, %xmm1
pclmulqdq $(0), %xmm1, %xmm3
movdqa %xmm4, %xmm2
pclmulqdq $(0), %xmm0, %xmm4
pxor %xmm1, %xmm1
pclmulqdq $(17), %xmm0, %xmm2
pxor %xmm4, %xmm3
pxor %xmm2, %xmm3
palignr $(8), %xmm3, %xmm1
pslldq $(8), %xmm3
pxor %xmm1, %xmm2
pxor %xmm3, %xmm4
movdqa %xmm4, %xmm1
psllq $(1), %xmm1
pxor %xmm4, %xmm1
psllq $(5), %xmm1
pxor %xmm4, %xmm1
psllq $(57), %xmm1
movdqa %xmm1, %xmm3
pslldq $(8), %xmm3
psrldq $(8), %xmm1
pxor %xmm3, %xmm4
pxor %xmm1, %xmm2
movdqa %xmm4, %xmm3
psrlq $(5), %xmm3
pxor %xmm4, %xmm3
psrlq $(1), %xmm3
pxor %xmm4, %xmm3
psrlq $(1), %xmm3
pxor %xmm3, %xmm4
pxor %xmm2, %xmm4
pshufd $(78), %xmm5, %xmm3
pshufd $(78), %xmm0, %xmm1
pxor %xmm5, %xmm3
pxor %xmm0, %xmm1
pclmulqdq $(0), %xmm1, %xmm3
movdqa %xmm5, %xmm2
pclmulqdq $(0), %xmm0, %xmm5
pxor %xmm1, %xmm1
pclmulqdq $(17), %xmm0, %xmm2
pxor %xmm5, %xmm3
pxor %xmm2, %xmm3
palignr $(8), %xmm3, %xmm1
pslldq $(8), %xmm3
pxor %xmm1, %xmm2
pxor %xmm3, %xmm5
movdqa %xmm5, %xmm1
psllq $(1), %xmm1
pxor %xmm5, %xmm1
psllq $(5), %xmm1
pxor %xmm5, %xmm1
psllq $(57), %xmm1
movdqa %xmm1, %xmm3
pslldq $(8), %xmm3
psrldq $(8), %xmm1
pxor %xmm3, %xmm5
pxor %xmm1, %xmm2
movdqa %xmm5, %xmm3
psrlq $(5), %xmm3
pxor %xmm5, %xmm3
psrlq $(1), %xmm3
pxor %xmm5, %xmm3
psrlq $(1), %xmm3
pxor %xmm3, %xmm5
pxor %xmm2, %xmm5
pshufd $(78), %xmm6, %xmm3
pshufd $(78), %xmm0, %xmm1
pxor %xmm6, %xmm3
pxor %xmm0, %xmm1
pclmulqdq $(0), %xmm1, %xmm3
movdqa %xmm6, %xmm2
pclmulqdq $(0), %xmm0, %xmm6
pxor %xmm1, %xmm1
pclmulqdq $(17), %xmm0, %xmm2
pxor %xmm6, %xmm3
pxor %xmm2, %xmm3
palignr $(8), %xmm3, %xmm1
pslldq $(8), %xmm3
pxor %xmm1, %xmm2
pxor %xmm3, %xmm6
movdqa %xmm6, %xmm1
psllq $(1), %xmm1
pxor %xmm6, %xmm1
psllq $(5), %xmm1
pxor %xmm6, %xmm1
psllq $(57), %xmm1
movdqa %xmm1, %xmm3
pslldq $(8), %xmm3
psrldq $(8), %xmm1
pxor %xmm3, %xmm6
pxor %xmm1, %xmm2
movdqa %xmm6, %xmm3
psrlq $(5), %xmm3
pxor %xmm6, %xmm3
psrlq $(1), %xmm3
pxor %xmm6, %xmm3
psrlq $(1), %xmm3
pxor %xmm3, %xmm6
pxor %xmm2, %xmm6
pshufd $(78), %xmm7, %xmm3
pshufd $(78), %xmm0, %xmm1
pxor %xmm7, %xmm3
pxor %xmm0, %xmm1
pclmulqdq $(0), %xmm1, %xmm3
movdqa %xmm7, %xmm2
pclmulqdq $(0), %xmm0, %xmm7
pxor %xmm1, %xmm1
pclmulqdq $(17), %xmm0, %xmm2
pxor %xmm7, %xmm3
pxor %xmm2, %xmm3
palignr $(8), %xmm3, %xmm1
pslldq $(8), %xmm3
pxor %xmm1, %xmm2
pxor %xmm3, %xmm7
movdqa %xmm7, %xmm1
psllq $(1), %xmm1
pxor %xmm7, %xmm1
psllq $(5), %xmm1
pxor %xmm7, %xmm1
psllq $(57), %xmm1
movdqa %xmm1, %xmm3
pslldq $(8), %xmm3
psrldq $(8), %xmm1
pxor %xmm3, %xmm7
pxor %xmm1, %xmm2
movdqa %xmm7, %xmm3
psrlq $(5), %xmm3
pxor %xmm7, %xmm3
psrlq $(1), %xmm3
pxor %xmm7, %xmm3
psrlq $(1), %xmm3
pxor %xmm3, %xmm7
pxor %xmm2, %xmm7
movdqa %xmm4, (32)(%ebx)
movdqa %xmm5, (48)(%ebx)
movdqa %xmm6, (64)(%ebx)
movdqa %xmm7, (80)(%ebx)
movdqa (%ebx), %xmm0
subl $(64), (128)(%ebx)
jge .Lblks4_loopgas_5
.Lcombine_hashgas_5:
pshufd $(78), %xmm4, %xmm3
pshufd $(78), %xmm0, %xmm1
pxor %xmm4, %xmm3
pxor %xmm0, %xmm1
pclmulqdq $(0), %xmm1, %xmm3
movdqa %xmm4, %xmm2
pclmulqdq $(0), %xmm0, %xmm4
pxor %xmm1, %xmm1
pclmulqdq $(17), %xmm0, %xmm2
pxor %xmm4, %xmm3
pxor %xmm2, %xmm3
palignr $(8), %xmm3, %xmm1
pslldq $(8), %xmm3
pxor %xmm1, %xmm2
pxor %xmm3, %xmm4
movdqa %xmm4, %xmm1
psllq $(1), %xmm1
pxor %xmm4, %xmm1
psllq $(5), %xmm1
pxor %xmm4, %xmm1
psllq $(57), %xmm1
movdqa %xmm1, %xmm3
pslldq $(8), %xmm3
psrldq $(8), %xmm1
pxor %xmm3, %xmm4
pxor %xmm1, %xmm2
movdqa %xmm4, %xmm3
psrlq $(5), %xmm3
pxor %xmm4, %xmm3
psrlq $(1), %xmm3
pxor %xmm4, %xmm3
psrlq $(1), %xmm3
pxor %xmm3, %xmm4
pxor %xmm2, %xmm4
movdqa (16)(%eax), %xmm0
pshufd $(78), %xmm5, %xmm3
pshufd $(78), %xmm0, %xmm1
pxor %xmm5, %xmm3
pxor %xmm0, %xmm1
pclmulqdq $(0), %xmm1, %xmm3
movdqa %xmm5, %xmm2
pclmulqdq $(0), %xmm0, %xmm5
pxor %xmm1, %xmm1
pclmulqdq $(17), %xmm0, %xmm2
pxor %xmm5, %xmm3
pxor %xmm2, %xmm3
palignr $(8), %xmm3, %xmm1
pslldq $(8), %xmm3
pxor %xmm1, %xmm2
pxor %xmm3, %xmm5
movdqa %xmm5, %xmm1
psllq $(1), %xmm1
pxor %xmm5, %xmm1
psllq $(5), %xmm1
pxor %xmm5, %xmm1
psllq $(57), %xmm1
movdqa %xmm1, %xmm3
pslldq $(8), %xmm3
psrldq $(8), %xmm1
pxor %xmm3, %xmm5
pxor %xmm1, %xmm2
movdqa %xmm5, %xmm3
psrlq $(5), %xmm3
pxor %xmm5, %xmm3
psrlq $(1), %xmm3
pxor %xmm5, %xmm3
psrlq $(1), %xmm3
pxor %xmm3, %xmm5
pxor %xmm2, %xmm5
movdqa (%eax), %xmm0
pshufd $(78), %xmm6, %xmm3
pshufd $(78), %xmm0, %xmm1
pxor %xmm6, %xmm3
pxor %xmm0, %xmm1
pclmulqdq $(0), %xmm1, %xmm3
movdqa %xmm6, %xmm2
pclmulqdq $(0), %xmm0, %xmm6
pxor %xmm1, %xmm1
pclmulqdq $(17), %xmm0, %xmm2
pxor %xmm6, %xmm3
pxor %xmm2, %xmm3
palignr $(8), %xmm3, %xmm1
pslldq $(8), %xmm3
pxor %xmm1, %xmm2
pxor %xmm3, %xmm6
movdqa %xmm6, %xmm1
psllq $(1), %xmm1
pxor %xmm6, %xmm1
psllq $(5), %xmm1
pxor %xmm6, %xmm1
psllq $(57), %xmm1
movdqa %xmm1, %xmm3
pslldq $(8), %xmm3
psrldq $(8), %xmm1
pxor %xmm3, %xmm6
pxor %xmm1, %xmm2
movdqa %xmm6, %xmm3
psrlq $(5), %xmm3
pxor %xmm6, %xmm3
psrlq $(1), %xmm3
pxor %xmm6, %xmm3
psrlq $(1), %xmm3
pxor %xmm3, %xmm6
pxor %xmm2, %xmm6
pxor %xmm5, %xmm7
pxor %xmm6, %xmm7
pshufd $(78), %xmm7, %xmm3
pshufd $(78), %xmm0, %xmm1
pxor %xmm7, %xmm3
pxor %xmm0, %xmm1
pclmulqdq $(0), %xmm1, %xmm3
movdqa %xmm7, %xmm2
pclmulqdq $(0), %xmm0, %xmm7
pxor %xmm1, %xmm1
pclmulqdq $(17), %xmm0, %xmm2
pxor %xmm7, %xmm3
pxor %xmm2, %xmm3
palignr $(8), %xmm3, %xmm1
pslldq $(8), %xmm3
pxor %xmm1, %xmm2
pxor %xmm3, %xmm7
movdqa %xmm7, %xmm1
psllq $(1), %xmm1
pxor %xmm7, %xmm1
psllq $(5), %xmm1
pxor %xmm7, %xmm1
psllq $(57), %xmm1
movdqa %xmm1, %xmm3
pslldq $(8), %xmm3
psrldq $(8), %xmm1
pxor %xmm3, %xmm7
pxor %xmm1, %xmm2
movdqa %xmm7, %xmm3
psrlq $(5), %xmm3
pxor %xmm7, %xmm3
psrlq $(1), %xmm3
pxor %xmm7, %xmm3
psrlq $(1), %xmm3
pxor %xmm3, %xmm7
pxor %xmm2, %xmm7
pxor %xmm4, %xmm7
movdqa %xmm7, (32)(%ebx)
.Lsingle_block_procgas_5:
cmpl $(0), (132)(%ebx)
jz .Lquitgas_5
.p2align 4, 0x90
.Lblk_loopgas_5:
movdqa (%ebx), %xmm0
movdqa %xmm0, %xmm1
paddd (112)(%ebx), %xmm1
movdqa %xmm1, (%ebx)
movdqa (%ecx), %xmm0
lea (16)(%ecx), %eax
pshufb (96)(%ebx), %xmm1
pxor %xmm0, %xmm1
movdqa (%eax), %xmm0
add $(16), %eax
movl (24)(%ebp), %edx
sub $(1), %edx
.p2align 4, 0x90
.Lcipher_loopgas_5:
aesenc %xmm0, %xmm1
movdqa (%eax), %xmm0
add $(16), %eax
dec %edx
jnz .Lcipher_loopgas_5
aesenclast %xmm0, %xmm1
movdqa (16)(%ebx), %xmm0
movdqa %xmm1, (16)(%ebx)
movdqu (%esi), %xmm1
add $(16), %esi
pxor %xmm1, %xmm0
movdqu %xmm0, (%edi)
add $(16), %edi
movl (44)(%ebp), %eax
pshufb (96)(%ebx), %xmm1
pxor (32)(%ebx), %xmm1
movdqa (%eax), %xmm0
pshufd $(78), %xmm1, %xmm4
pshufd $(78), %xmm0, %xmm2
pxor %xmm1, %xmm4
pxor %xmm0, %xmm2
pclmulqdq $(0), %xmm2, %xmm4
movdqa %xmm1, %xmm3
pclmulqdq $(0), %xmm0, %xmm1
pxor %xmm2, %xmm2
pclmulqdq $(17), %xmm0, %xmm3
pxor %xmm1, %xmm4
pxor %xmm3, %xmm4
palignr $(8), %xmm4, %xmm2
pslldq $(8), %xmm4
pxor %xmm2, %xmm3
pxor %xmm4, %xmm1
movdqa %xmm1, %xmm2
psllq $(1), %xmm2
pxor %xmm1, %xmm2
psllq $(5), %xmm2
pxor %xmm1, %xmm2
psllq $(57), %xmm2
movdqa %xmm2, %xmm4
pslldq $(8), %xmm4
psrldq $(8), %xmm2
pxor %xmm4, %xmm1
pxor %xmm2, %xmm3
movdqa %xmm1, %xmm4
psrlq $(5), %xmm4
pxor %xmm1, %xmm4
psrlq $(1), %xmm4
pxor %xmm1, %xmm4
psrlq $(1), %xmm4
pxor %xmm4, %xmm1
pxor %xmm3, %xmm1
movdqa %xmm1, (32)(%ebx)
subl $(16), (132)(%ebx)
jg .Lblk_loopgas_5
.Lquitgas_5:
movdqa (96)(%ebx), %xmm4
movdqa (%ebx), %xmm0
movdqa (16)(%ebx), %xmm1
movdqa (32)(%ebx), %xmm2
movl (36)(%ebp), %eax
movl (40)(%ebp), %ecx
movl (32)(%ebp), %edx
pshufb %xmm4, %xmm0
movdqu %xmm0, (%eax)
movdqu %xmm1, (%ecx)
pshufb %xmm4, %xmm2
movdqu %xmm2, (%edx)
add $(152), %esp
pop %edi
pop %esi
pop %ebx
pop %ebp
ret
|
//===- LegalizeDAG.cpp - Implement SelectionDAG::Legalize -----------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file implements the SelectionDAG::Legalize method.
//
//===----------------------------------------------------------------------===//
#include "llvm/ADT/APFloat.h"
#include "llvm/ADT/APInt.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/SetVector.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/Analysis/TargetLibraryInfo.h"
#include "llvm/CodeGen/ISDOpcodes.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineJumpTableInfo.h"
#include "llvm/CodeGen/MachineMemOperand.h"
#include "llvm/CodeGen/RuntimeLibcalls.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/CodeGen/SelectionDAGNodes.h"
#include "llvm/CodeGen/TargetFrameLowering.h"
#include "llvm/CodeGen/TargetLowering.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/IR/CallingConv.h"
#include "llvm/IR/Constants.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/IR/DerivedTypes.h"
#include "llvm/IR/Function.h"
#include "llvm/IR/Metadata.h"
#include "llvm/IR/Type.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MachineValueType.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
#include <algorithm>
#include <cassert>
#include <cstdint>
#include <tuple>
#include <utility>
using namespace llvm;
#define DEBUG_TYPE "legalizedag"
namespace {
/// Keeps track of state when getting the sign of a floating-point value as an
/// integer.
struct FloatSignAsInt {
EVT FloatVT;
SDValue Chain;
SDValue FloatPtr;
SDValue IntPtr;
MachinePointerInfo IntPointerInfo;
MachinePointerInfo FloatPointerInfo;
SDValue IntValue;
APInt SignMask;
uint8_t SignBit;
};
//===----------------------------------------------------------------------===//
/// This takes an arbitrary SelectionDAG as input and
/// hacks on it until the target machine can handle it. This involves
/// eliminating value sizes the machine cannot handle (promoting small sizes to
/// large sizes or splitting up large values into small values) as well as
/// eliminating operations the machine cannot handle.
///
/// This code also does a small amount of optimization and recognition of idioms
/// as part of its processing. For example, if a target does not support a
/// 'setcc' instruction efficiently, but does support 'brcc' instruction, this
/// will attempt merge setcc and brc instructions into brcc's.
class SelectionDAGLegalize {
const TargetMachine &TM;
const TargetLowering &TLI;
SelectionDAG &DAG;
/// The set of nodes which have already been legalized. We hold a
/// reference to it in order to update as necessary on node deletion.
SmallPtrSetImpl<SDNode *> &LegalizedNodes;
/// A set of all the nodes updated during legalization.
SmallSetVector<SDNode *, 16> *UpdatedNodes;
EVT getSetCCResultType(EVT VT) const {
return TLI.getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT);
}
// Libcall insertion helpers.
public:
SelectionDAGLegalize(SelectionDAG &DAG,
SmallPtrSetImpl<SDNode *> &LegalizedNodes,
SmallSetVector<SDNode *, 16> *UpdatedNodes = nullptr)
: TM(DAG.getTarget()), TLI(DAG.getTargetLoweringInfo()), DAG(DAG),
LegalizedNodes(LegalizedNodes), UpdatedNodes(UpdatedNodes) {}
/// Legalizes the given operation.
void LegalizeOp(SDNode *Node);
private:
SDValue OptimizeFloatStore(StoreSDNode *ST);
void LegalizeLoadOps(SDNode *Node);
void LegalizeStoreOps(SDNode *Node);
/// Some targets cannot handle a variable
/// insertion index for the INSERT_VECTOR_ELT instruction. In this case, it
/// is necessary to spill the vector being inserted into to memory, perform
/// the insert there, and then read the result back.
SDValue PerformInsertVectorEltInMemory(SDValue Vec, SDValue Val, SDValue Idx,
const SDLoc &dl);
SDValue ExpandINSERT_VECTOR_ELT(SDValue Vec, SDValue Val, SDValue Idx,
const SDLoc &dl);
/// Return a vector shuffle operation which
/// performs the same shuffe in terms of order or result bytes, but on a type
/// whose vector element type is narrower than the original shuffle type.
/// e.g. <v4i32> <0, 1, 0, 1> -> v8i16 <0, 1, 2, 3, 0, 1, 2, 3>
SDValue ShuffleWithNarrowerEltType(EVT NVT, EVT VT, const SDLoc &dl,
SDValue N1, SDValue N2,
ArrayRef<int> Mask) const;
SDValue ExpandLibCall(RTLIB::Libcall LC, SDNode *Node, bool isSigned);
void ExpandFPLibCall(SDNode *Node, RTLIB::Libcall LC,
SmallVectorImpl<SDValue> &Results);
void ExpandFPLibCall(SDNode *Node, RTLIB::Libcall Call_F32,
RTLIB::Libcall Call_F64, RTLIB::Libcall Call_F80,
RTLIB::Libcall Call_F128,
RTLIB::Libcall Call_PPCF128,
SmallVectorImpl<SDValue> &Results);
SDValue ExpandIntLibCall(SDNode *Node, bool isSigned,
RTLIB::Libcall Call_I8,
RTLIB::Libcall Call_I16,
RTLIB::Libcall Call_I32,
RTLIB::Libcall Call_I64,
RTLIB::Libcall Call_I128);
void ExpandArgFPLibCall(SDNode *Node,
RTLIB::Libcall Call_F32, RTLIB::Libcall Call_F64,
RTLIB::Libcall Call_F80, RTLIB::Libcall Call_F128,
RTLIB::Libcall Call_PPCF128,
SmallVectorImpl<SDValue> &Results);
void ExpandDivRemLibCall(SDNode *Node, SmallVectorImpl<SDValue> &Results);
void ExpandSinCosLibCall(SDNode *Node, SmallVectorImpl<SDValue> &Results);
SDValue EmitStackConvert(SDValue SrcOp, EVT SlotVT, EVT DestVT,
const SDLoc &dl);
SDValue EmitStackConvert(SDValue SrcOp, EVT SlotVT, EVT DestVT,
const SDLoc &dl, SDValue ChainIn);
SDValue ExpandBUILD_VECTOR(SDNode *Node);
SDValue ExpandSPLAT_VECTOR(SDNode *Node);
SDValue ExpandSCALAR_TO_VECTOR(SDNode *Node);
void ExpandDYNAMIC_STACKALLOC(SDNode *Node,
SmallVectorImpl<SDValue> &Results);
void getSignAsIntValue(FloatSignAsInt &State, const SDLoc &DL,
SDValue Value) const;
SDValue modifySignAsInt(const FloatSignAsInt &State, const SDLoc &DL,
SDValue NewIntValue) const;
SDValue ExpandFCOPYSIGN(SDNode *Node) const;
SDValue ExpandFABS(SDNode *Node) const;
SDValue ExpandFNEG(SDNode *Node) const;
SDValue ExpandLegalINT_TO_FP(SDNode *Node, SDValue &Chain);
void PromoteLegalINT_TO_FP(SDNode *N, const SDLoc &dl,
SmallVectorImpl<SDValue> &Results);
void PromoteLegalFP_TO_INT(SDNode *N, const SDLoc &dl,
SmallVectorImpl<SDValue> &Results);
SDValue PromoteLegalFP_TO_INT_SAT(SDNode *Node, const SDLoc &dl);
SDValue ExpandPARITY(SDValue Op, const SDLoc &dl);
SDValue ExpandExtractFromVectorThroughStack(SDValue Op);
SDValue ExpandInsertToVectorThroughStack(SDValue Op);
SDValue ExpandVectorBuildThroughStack(SDNode* Node);
SDValue ExpandConstantFP(ConstantFPSDNode *CFP, bool UseCP);
SDValue ExpandConstant(ConstantSDNode *CP);
// if ExpandNode returns false, LegalizeOp falls back to ConvertNodeToLibcall
bool ExpandNode(SDNode *Node);
void ConvertNodeToLibcall(SDNode *Node);
void PromoteNode(SDNode *Node);
public:
// Node replacement helpers
void ReplacedNode(SDNode *N) {
LegalizedNodes.erase(N);
if (UpdatedNodes)
UpdatedNodes->insert(N);
}
void ReplaceNode(SDNode *Old, SDNode *New) {
LLVM_DEBUG(dbgs() << " ... replacing: "; Old->dump(&DAG);
dbgs() << " with: "; New->dump(&DAG));
assert(Old->getNumValues() == New->getNumValues() &&
"Replacing one node with another that produces a different number "
"of values!");
DAG.ReplaceAllUsesWith(Old, New);
if (UpdatedNodes)
UpdatedNodes->insert(New);
ReplacedNode(Old);
}
void ReplaceNode(SDValue Old, SDValue New) {
LLVM_DEBUG(dbgs() << " ... replacing: "; Old->dump(&DAG);
dbgs() << " with: "; New->dump(&DAG));
DAG.ReplaceAllUsesWith(Old, New);
if (UpdatedNodes)
UpdatedNodes->insert(New.getNode());
ReplacedNode(Old.getNode());
}
void ReplaceNode(SDNode *Old, const SDValue *New) {
LLVM_DEBUG(dbgs() << " ... replacing: "; Old->dump(&DAG));
DAG.ReplaceAllUsesWith(Old, New);
for (unsigned i = 0, e = Old->getNumValues(); i != e; ++i) {
LLVM_DEBUG(dbgs() << (i == 0 ? " with: " : " and: ");
New[i]->dump(&DAG));
if (UpdatedNodes)
UpdatedNodes->insert(New[i].getNode());
}
ReplacedNode(Old);
}
void ReplaceNodeWithValue(SDValue Old, SDValue New) {
LLVM_DEBUG(dbgs() << " ... replacing: "; Old->dump(&DAG);
dbgs() << " with: "; New->dump(&DAG));
DAG.ReplaceAllUsesOfValueWith(Old, New);
if (UpdatedNodes)
UpdatedNodes->insert(New.getNode());
ReplacedNode(Old.getNode());
}
};
} // end anonymous namespace
/// Return a vector shuffle operation which
/// performs the same shuffle in terms of order or result bytes, but on a type
/// whose vector element type is narrower than the original shuffle type.
/// e.g. <v4i32> <0, 1, 0, 1> -> v8i16 <0, 1, 2, 3, 0, 1, 2, 3>
SDValue SelectionDAGLegalize::ShuffleWithNarrowerEltType(
EVT NVT, EVT VT, const SDLoc &dl, SDValue N1, SDValue N2,
ArrayRef<int> Mask) const {
unsigned NumMaskElts = VT.getVectorNumElements();
unsigned NumDestElts = NVT.getVectorNumElements();
unsigned NumEltsGrowth = NumDestElts / NumMaskElts;
assert(NumEltsGrowth && "Cannot promote to vector type with fewer elts!");
if (NumEltsGrowth == 1)
return DAG.getVectorShuffle(NVT, dl, N1, N2, Mask);
SmallVector<int, 8> NewMask;
for (unsigned i = 0; i != NumMaskElts; ++i) {
int Idx = Mask[i];
for (unsigned j = 0; j != NumEltsGrowth; ++j) {
if (Idx < 0)
NewMask.push_back(-1);
else
NewMask.push_back(Idx * NumEltsGrowth + j);
}
}
assert(NewMask.size() == NumDestElts && "Non-integer NumEltsGrowth?");
assert(TLI.isShuffleMaskLegal(NewMask, NVT) && "Shuffle not legal?");
return DAG.getVectorShuffle(NVT, dl, N1, N2, NewMask);
}
/// Expands the ConstantFP node to an integer constant or
/// a load from the constant pool.
SDValue
SelectionDAGLegalize::ExpandConstantFP(ConstantFPSDNode *CFP, bool UseCP) {
bool Extend = false;
SDLoc dl(CFP);
// If a FP immediate is precise when represented as a float and if the
// target can do an extending load from float to double, we put it into
// the constant pool as a float, even if it's is statically typed as a
// double. This shrinks FP constants and canonicalizes them for targets where
// an FP extending load is the same cost as a normal load (such as on the x87
// fp stack or PPC FP unit).
EVT VT = CFP->getValueType(0);
ConstantFP *LLVMC = const_cast<ConstantFP*>(CFP->getConstantFPValue());
if (!UseCP) {
assert((VT == MVT::f64 || VT == MVT::f32) && "Invalid type expansion");
return DAG.getConstant(LLVMC->getValueAPF().bitcastToAPInt(), dl,
(VT == MVT::f64) ? MVT::i64 : MVT::i32);
}
APFloat APF = CFP->getValueAPF();
EVT OrigVT = VT;
EVT SVT = VT;
// We don't want to shrink SNaNs. Converting the SNaN back to its real type
// can cause it to be changed into a QNaN on some platforms (e.g. on SystemZ).
if (!APF.isSignaling()) {
while (SVT != MVT::f32 && SVT != MVT::f16) {
SVT = (MVT::SimpleValueType)(SVT.getSimpleVT().SimpleTy - 1);
if (ConstantFPSDNode::isValueValidForType(SVT, APF) &&
// Only do this if the target has a native EXTLOAD instruction from
// smaller type.
TLI.isLoadExtLegal(ISD::EXTLOAD, OrigVT, SVT) &&
TLI.ShouldShrinkFPConstant(OrigVT)) {
Type *SType = SVT.getTypeForEVT(*DAG.getContext());
LLVMC = cast<ConstantFP>(ConstantExpr::getFPTrunc(LLVMC, SType));
VT = SVT;
Extend = true;
}
}
}
SDValue CPIdx =
DAG.getConstantPool(LLVMC, TLI.getPointerTy(DAG.getDataLayout()));
Align Alignment = cast<ConstantPoolSDNode>(CPIdx)->getAlign();
if (Extend) {
SDValue Result = DAG.getExtLoad(
ISD::EXTLOAD, dl, OrigVT, DAG.getEntryNode(), CPIdx,
MachinePointerInfo::getConstantPool(DAG.getMachineFunction()), VT,
Alignment);
return Result;
}
SDValue Result = DAG.getLoad(
OrigVT, dl, DAG.getEntryNode(), CPIdx,
MachinePointerInfo::getConstantPool(DAG.getMachineFunction()), Alignment);
return Result;
}
/// Expands the Constant node to a load from the constant pool.
SDValue SelectionDAGLegalize::ExpandConstant(ConstantSDNode *CP) {
SDLoc dl(CP);
EVT VT = CP->getValueType(0);
SDValue CPIdx = DAG.getConstantPool(CP->getConstantIntValue(),
TLI.getPointerTy(DAG.getDataLayout()));
Align Alignment = cast<ConstantPoolSDNode>(CPIdx)->getAlign();
SDValue Result = DAG.getLoad(
VT, dl, DAG.getEntryNode(), CPIdx,
MachinePointerInfo::getConstantPool(DAG.getMachineFunction()), Alignment);
return Result;
}
/// Some target cannot handle a variable insertion index for the
/// INSERT_VECTOR_ELT instruction. In this case, it
/// is necessary to spill the vector being inserted into to memory, perform
/// the insert there, and then read the result back.
SDValue SelectionDAGLegalize::PerformInsertVectorEltInMemory(SDValue Vec,
SDValue Val,
SDValue Idx,
const SDLoc &dl) {
SDValue Tmp1 = Vec;
SDValue Tmp2 = Val;
SDValue Tmp3 = Idx;
// If the target doesn't support this, we have to spill the input vector
// to a temporary stack slot, update the element, then reload it. This is
// badness. We could also load the value into a vector register (either
// with a "move to register" or "extload into register" instruction, then
// permute it into place, if the idx is a constant and if the idx is
// supported by the target.
EVT VT = Tmp1.getValueType();
EVT EltVT = VT.getVectorElementType();
SDValue StackPtr = DAG.CreateStackTemporary(VT);
int SPFI = cast<FrameIndexSDNode>(StackPtr.getNode())->getIndex();
// Store the vector.
SDValue Ch = DAG.getStore(
DAG.getEntryNode(), dl, Tmp1, StackPtr,
MachinePointerInfo::getFixedStack(DAG.getMachineFunction(), SPFI));
SDValue StackPtr2 = TLI.getVectorElementPointer(DAG, StackPtr, VT, Tmp3);
// Store the scalar value.
Ch = DAG.getTruncStore(
Ch, dl, Tmp2, StackPtr2,
MachinePointerInfo::getUnknownStack(DAG.getMachineFunction()), EltVT);
// Load the updated vector.
return DAG.getLoad(VT, dl, Ch, StackPtr, MachinePointerInfo::getFixedStack(
DAG.getMachineFunction(), SPFI));
}
SDValue SelectionDAGLegalize::ExpandINSERT_VECTOR_ELT(SDValue Vec, SDValue Val,
SDValue Idx,
const SDLoc &dl) {
if (ConstantSDNode *InsertPos = dyn_cast<ConstantSDNode>(Idx)) {
// SCALAR_TO_VECTOR requires that the type of the value being inserted
// match the element type of the vector being created, except for
// integers in which case the inserted value can be over width.
EVT EltVT = Vec.getValueType().getVectorElementType();
if (Val.getValueType() == EltVT ||
(EltVT.isInteger() && Val.getValueType().bitsGE(EltVT))) {
SDValue ScVec = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl,
Vec.getValueType(), Val);
unsigned NumElts = Vec.getValueType().getVectorNumElements();
// We generate a shuffle of InVec and ScVec, so the shuffle mask
// should be 0,1,2,3,4,5... with the appropriate element replaced with
// elt 0 of the RHS.
SmallVector<int, 8> ShufOps;
for (unsigned i = 0; i != NumElts; ++i)
ShufOps.push_back(i != InsertPos->getZExtValue() ? i : NumElts);
return DAG.getVectorShuffle(Vec.getValueType(), dl, Vec, ScVec, ShufOps);
}
}
return PerformInsertVectorEltInMemory(Vec, Val, Idx, dl);
}
SDValue SelectionDAGLegalize::OptimizeFloatStore(StoreSDNode* ST) {
if (!ISD::isNormalStore(ST))
return SDValue();
LLVM_DEBUG(dbgs() << "Optimizing float store operations\n");
// Turn 'store float 1.0, Ptr' -> 'store int 0x12345678, Ptr'
// FIXME: move this to the DAG Combiner! Note that we can't regress due
// to phase ordering between legalized code and the dag combiner. This
// probably means that we need to integrate dag combiner and legalizer
// together.
// We generally can't do this one for long doubles.
SDValue Chain = ST->getChain();
SDValue Ptr = ST->getBasePtr();
SDValue Value = ST->getValue();
MachineMemOperand::Flags MMOFlags = ST->getMemOperand()->getFlags();
AAMDNodes AAInfo = ST->getAAInfo();
SDLoc dl(ST);
// Don't optimise TargetConstantFP
if (Value.getOpcode() == ISD::TargetConstantFP)
return SDValue();
if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(Value)) {
if (CFP->getValueType(0) == MVT::f32 &&
TLI.isTypeLegal(MVT::i32)) {
SDValue Con = DAG.getConstant(CFP->getValueAPF().
bitcastToAPInt().zextOrTrunc(32),
SDLoc(CFP), MVT::i32);
return DAG.getStore(Chain, dl, Con, Ptr, ST->getPointerInfo(),
ST->getOriginalAlign(), MMOFlags, AAInfo);
}
if (CFP->getValueType(0) == MVT::f64) {
// If this target supports 64-bit registers, do a single 64-bit store.
if (TLI.isTypeLegal(MVT::i64)) {
SDValue Con = DAG.getConstant(CFP->getValueAPF().bitcastToAPInt().
zextOrTrunc(64), SDLoc(CFP), MVT::i64);
return DAG.getStore(Chain, dl, Con, Ptr, ST->getPointerInfo(),
ST->getOriginalAlign(), MMOFlags, AAInfo);
}
if (TLI.isTypeLegal(MVT::i32) && !ST->isVolatile()) {
// Otherwise, if the target supports 32-bit registers, use 2 32-bit
// stores. If the target supports neither 32- nor 64-bits, this
// xform is certainly not worth it.
const APInt &IntVal = CFP->getValueAPF().bitcastToAPInt();
SDValue Lo = DAG.getConstant(IntVal.trunc(32), dl, MVT::i32);
SDValue Hi = DAG.getConstant(IntVal.lshr(32).trunc(32), dl, MVT::i32);
if (DAG.getDataLayout().isBigEndian())
std::swap(Lo, Hi);
Lo = DAG.getStore(Chain, dl, Lo, Ptr, ST->getPointerInfo(),
ST->getOriginalAlign(), MMOFlags, AAInfo);
Ptr = DAG.getMemBasePlusOffset(Ptr, TypeSize::Fixed(4), dl);
Hi = DAG.getStore(Chain, dl, Hi, Ptr,
ST->getPointerInfo().getWithOffset(4),
ST->getOriginalAlign(), MMOFlags, AAInfo);
return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo, Hi);
}
}
}
return SDValue();
}
void SelectionDAGLegalize::LegalizeStoreOps(SDNode *Node) {
StoreSDNode *ST = cast<StoreSDNode>(Node);
SDValue Chain = ST->getChain();
SDValue Ptr = ST->getBasePtr();
SDLoc dl(Node);
MachineMemOperand::Flags MMOFlags = ST->getMemOperand()->getFlags();
AAMDNodes AAInfo = ST->getAAInfo();
if (!ST->isTruncatingStore()) {
LLVM_DEBUG(dbgs() << "Legalizing store operation\n");
if (SDNode *OptStore = OptimizeFloatStore(ST).getNode()) {
ReplaceNode(ST, OptStore);
return;
}
SDValue Value = ST->getValue();
MVT VT = Value.getSimpleValueType();
switch (TLI.getOperationAction(ISD::STORE, VT)) {
default: llvm_unreachable("This action is not supported yet!");
case TargetLowering::Legal: {
// If this is an unaligned store and the target doesn't support it,
// expand it.
EVT MemVT = ST->getMemoryVT();
const DataLayout &DL = DAG.getDataLayout();
if (!TLI.allowsMemoryAccessForAlignment(*DAG.getContext(), DL, MemVT,
*ST->getMemOperand())) {
LLVM_DEBUG(dbgs() << "Expanding unsupported unaligned store\n");
SDValue Result = TLI.expandUnalignedStore(ST, DAG);
ReplaceNode(SDValue(ST, 0), Result);
} else
LLVM_DEBUG(dbgs() << "Legal store\n");
break;
}
case TargetLowering::Custom: {
LLVM_DEBUG(dbgs() << "Trying custom lowering\n");
SDValue Res = TLI.LowerOperation(SDValue(Node, 0), DAG);
if (Res && Res != SDValue(Node, 0))
ReplaceNode(SDValue(Node, 0), Res);
return;
}
case TargetLowering::Promote: {
MVT NVT = TLI.getTypeToPromoteTo(ISD::STORE, VT);
assert(NVT.getSizeInBits() == VT.getSizeInBits() &&
"Can only promote stores to same size type");
Value = DAG.getNode(ISD::BITCAST, dl, NVT, Value);
SDValue Result = DAG.getStore(Chain, dl, Value, Ptr, ST->getPointerInfo(),
ST->getOriginalAlign(), MMOFlags, AAInfo);
ReplaceNode(SDValue(Node, 0), Result);
break;
}
}
return;
}
LLVM_DEBUG(dbgs() << "Legalizing truncating store operations\n");
SDValue Value = ST->getValue();
EVT StVT = ST->getMemoryVT();
TypeSize StWidth = StVT.getSizeInBits();
TypeSize StSize = StVT.getStoreSizeInBits();
auto &DL = DAG.getDataLayout();
if (StWidth != StSize) {
// Promote to a byte-sized store with upper bits zero if not
// storing an integral number of bytes. For example, promote
// TRUNCSTORE:i1 X -> TRUNCSTORE:i8 (and X, 1)
EVT NVT = EVT::getIntegerVT(*DAG.getContext(), StSize.getFixedSize());
Value = DAG.getZeroExtendInReg(Value, dl, StVT);
SDValue Result =
DAG.getTruncStore(Chain, dl, Value, Ptr, ST->getPointerInfo(), NVT,
ST->getOriginalAlign(), MMOFlags, AAInfo);
ReplaceNode(SDValue(Node, 0), Result);
} else if (!StVT.isVector() && !isPowerOf2_64(StWidth.getFixedSize())) {
// If not storing a power-of-2 number of bits, expand as two stores.
assert(!StVT.isVector() && "Unsupported truncstore!");
unsigned StWidthBits = StWidth.getFixedSize();
unsigned LogStWidth = Log2_32(StWidthBits);
assert(LogStWidth < 32);
unsigned RoundWidth = 1 << LogStWidth;
assert(RoundWidth < StWidthBits);
unsigned ExtraWidth = StWidthBits - RoundWidth;
assert(ExtraWidth < RoundWidth);
assert(!(RoundWidth % 8) && !(ExtraWidth % 8) &&
"Store size not an integral number of bytes!");
EVT RoundVT = EVT::getIntegerVT(*DAG.getContext(), RoundWidth);
EVT ExtraVT = EVT::getIntegerVT(*DAG.getContext(), ExtraWidth);
SDValue Lo, Hi;
unsigned IncrementSize;
if (DL.isLittleEndian()) {
// TRUNCSTORE:i24 X -> TRUNCSTORE:i16 X, TRUNCSTORE@+2:i8 (srl X, 16)
// Store the bottom RoundWidth bits.
Lo = DAG.getTruncStore(Chain, dl, Value, Ptr, ST->getPointerInfo(),
RoundVT, ST->getOriginalAlign(), MMOFlags, AAInfo);
// Store the remaining ExtraWidth bits.
IncrementSize = RoundWidth / 8;
Ptr = DAG.getMemBasePlusOffset(Ptr, TypeSize::Fixed(IncrementSize), dl);
Hi = DAG.getNode(
ISD::SRL, dl, Value.getValueType(), Value,
DAG.getConstant(RoundWidth, dl,
TLI.getShiftAmountTy(Value.getValueType(), DL)));
Hi = DAG.getTruncStore(Chain, dl, Hi, Ptr,
ST->getPointerInfo().getWithOffset(IncrementSize),
ExtraVT, ST->getOriginalAlign(), MMOFlags, AAInfo);
} else {
// Big endian - avoid unaligned stores.
// TRUNCSTORE:i24 X -> TRUNCSTORE:i16 (srl X, 8), TRUNCSTORE@+2:i8 X
// Store the top RoundWidth bits.
Hi = DAG.getNode(
ISD::SRL, dl, Value.getValueType(), Value,
DAG.getConstant(ExtraWidth, dl,
TLI.getShiftAmountTy(Value.getValueType(), DL)));
Hi = DAG.getTruncStore(Chain, dl, Hi, Ptr, ST->getPointerInfo(), RoundVT,
ST->getOriginalAlign(), MMOFlags, AAInfo);
// Store the remaining ExtraWidth bits.
IncrementSize = RoundWidth / 8;
Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
DAG.getConstant(IncrementSize, dl,
Ptr.getValueType()));
Lo = DAG.getTruncStore(Chain, dl, Value, Ptr,
ST->getPointerInfo().getWithOffset(IncrementSize),
ExtraVT, ST->getOriginalAlign(), MMOFlags, AAInfo);
}
// The order of the stores doesn't matter.
SDValue Result = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo, Hi);
ReplaceNode(SDValue(Node, 0), Result);
} else {
switch (TLI.getTruncStoreAction(ST->getValue().getValueType(), StVT)) {
default: llvm_unreachable("This action is not supported yet!");
case TargetLowering::Legal: {
EVT MemVT = ST->getMemoryVT();
// If this is an unaligned store and the target doesn't support it,
// expand it.
if (!TLI.allowsMemoryAccessForAlignment(*DAG.getContext(), DL, MemVT,
*ST->getMemOperand())) {
SDValue Result = TLI.expandUnalignedStore(ST, DAG);
ReplaceNode(SDValue(ST, 0), Result);
}
break;
}
case TargetLowering::Custom: {
SDValue Res = TLI.LowerOperation(SDValue(Node, 0), DAG);
if (Res && Res != SDValue(Node, 0))
ReplaceNode(SDValue(Node, 0), Res);
return;
}
case TargetLowering::Expand:
assert(!StVT.isVector() &&
"Vector Stores are handled in LegalizeVectorOps");
SDValue Result;
// TRUNCSTORE:i16 i32 -> STORE i16
if (TLI.isTypeLegal(StVT)) {
Value = DAG.getNode(ISD::TRUNCATE, dl, StVT, Value);
Result = DAG.getStore(Chain, dl, Value, Ptr, ST->getPointerInfo(),
ST->getOriginalAlign(), MMOFlags, AAInfo);
} else {
// The in-memory type isn't legal. Truncate to the type it would promote
// to, and then do a truncstore.
Value = DAG.getNode(ISD::TRUNCATE, dl,
TLI.getTypeToTransformTo(*DAG.getContext(), StVT),
Value);
Result =
DAG.getTruncStore(Chain, dl, Value, Ptr, ST->getPointerInfo(), StVT,
ST->getOriginalAlign(), MMOFlags, AAInfo);
}
ReplaceNode(SDValue(Node, 0), Result);
break;
}
}
}
void SelectionDAGLegalize::LegalizeLoadOps(SDNode *Node) {
LoadSDNode *LD = cast<LoadSDNode>(Node);
SDValue Chain = LD->getChain(); // The chain.
SDValue Ptr = LD->getBasePtr(); // The base pointer.
SDValue Value; // The value returned by the load op.
SDLoc dl(Node);
ISD::LoadExtType ExtType = LD->getExtensionType();
if (ExtType == ISD::NON_EXTLOAD) {
LLVM_DEBUG(dbgs() << "Legalizing non-extending load operation\n");
MVT VT = Node->getSimpleValueType(0);
SDValue RVal = SDValue(Node, 0);
SDValue RChain = SDValue(Node, 1);
switch (TLI.getOperationAction(Node->getOpcode(), VT)) {
default: llvm_unreachable("This action is not supported yet!");
case TargetLowering::Legal: {
EVT MemVT = LD->getMemoryVT();
const DataLayout &DL = DAG.getDataLayout();
// If this is an unaligned load and the target doesn't support it,
// expand it.
if (!TLI.allowsMemoryAccessForAlignment(*DAG.getContext(), DL, MemVT,
*LD->getMemOperand())) {
std::tie(RVal, RChain) = TLI.expandUnalignedLoad(LD, DAG);
}
break;
}
case TargetLowering::Custom:
if (SDValue Res = TLI.LowerOperation(RVal, DAG)) {
RVal = Res;
RChain = Res.getValue(1);
}
break;
case TargetLowering::Promote: {
MVT NVT = TLI.getTypeToPromoteTo(Node->getOpcode(), VT);
assert(NVT.getSizeInBits() == VT.getSizeInBits() &&
"Can only promote loads to same size type");
SDValue Res = DAG.getLoad(NVT, dl, Chain, Ptr, LD->getMemOperand());
RVal = DAG.getNode(ISD::BITCAST, dl, VT, Res);
RChain = Res.getValue(1);
break;
}
}
if (RChain.getNode() != Node) {
assert(RVal.getNode() != Node && "Load must be completely replaced");
DAG.ReplaceAllUsesOfValueWith(SDValue(Node, 0), RVal);
DAG.ReplaceAllUsesOfValueWith(SDValue(Node, 1), RChain);
if (UpdatedNodes) {
UpdatedNodes->insert(RVal.getNode());
UpdatedNodes->insert(RChain.getNode());
}
ReplacedNode(Node);
}
return;
}
LLVM_DEBUG(dbgs() << "Legalizing extending load operation\n");
EVT SrcVT = LD->getMemoryVT();
TypeSize SrcWidth = SrcVT.getSizeInBits();
MachineMemOperand::Flags MMOFlags = LD->getMemOperand()->getFlags();
AAMDNodes AAInfo = LD->getAAInfo();
if (SrcWidth != SrcVT.getStoreSizeInBits() &&
// Some targets pretend to have an i1 loading operation, and actually
// load an i8. This trick is correct for ZEXTLOAD because the top 7
// bits are guaranteed to be zero; it helps the optimizers understand
// that these bits are zero. It is also useful for EXTLOAD, since it
// tells the optimizers that those bits are undefined. It would be
// nice to have an effective generic way of getting these benefits...
// Until such a way is found, don't insist on promoting i1 here.
(SrcVT != MVT::i1 ||
TLI.getLoadExtAction(ExtType, Node->getValueType(0), MVT::i1) ==
TargetLowering::Promote)) {
// Promote to a byte-sized load if not loading an integral number of
// bytes. For example, promote EXTLOAD:i20 -> EXTLOAD:i24.
unsigned NewWidth = SrcVT.getStoreSizeInBits();
EVT NVT = EVT::getIntegerVT(*DAG.getContext(), NewWidth);
SDValue Ch;
// The extra bits are guaranteed to be zero, since we stored them that
// way. A zext load from NVT thus automatically gives zext from SrcVT.
ISD::LoadExtType NewExtType =
ExtType == ISD::ZEXTLOAD ? ISD::ZEXTLOAD : ISD::EXTLOAD;
SDValue Result = DAG.getExtLoad(NewExtType, dl, Node->getValueType(0),
Chain, Ptr, LD->getPointerInfo(), NVT,
LD->getOriginalAlign(), MMOFlags, AAInfo);
Ch = Result.getValue(1); // The chain.
if (ExtType == ISD::SEXTLOAD)
// Having the top bits zero doesn't help when sign extending.
Result = DAG.getNode(ISD::SIGN_EXTEND_INREG, dl,
Result.getValueType(),
Result, DAG.getValueType(SrcVT));
else if (ExtType == ISD::ZEXTLOAD || NVT == Result.getValueType())
// All the top bits are guaranteed to be zero - inform the optimizers.
Result = DAG.getNode(ISD::AssertZext, dl,
Result.getValueType(), Result,
DAG.getValueType(SrcVT));
Value = Result;
Chain = Ch;
} else if (!isPowerOf2_64(SrcWidth.getKnownMinSize())) {
// If not loading a power-of-2 number of bits, expand as two loads.
assert(!SrcVT.isVector() && "Unsupported extload!");
unsigned SrcWidthBits = SrcWidth.getFixedSize();
unsigned LogSrcWidth = Log2_32(SrcWidthBits);
assert(LogSrcWidth < 32);
unsigned RoundWidth = 1 << LogSrcWidth;
assert(RoundWidth < SrcWidthBits);
unsigned ExtraWidth = SrcWidthBits - RoundWidth;
assert(ExtraWidth < RoundWidth);
assert(!(RoundWidth % 8) && !(ExtraWidth % 8) &&
"Load size not an integral number of bytes!");
EVT RoundVT = EVT::getIntegerVT(*DAG.getContext(), RoundWidth);
EVT ExtraVT = EVT::getIntegerVT(*DAG.getContext(), ExtraWidth);
SDValue Lo, Hi, Ch;
unsigned IncrementSize;
auto &DL = DAG.getDataLayout();
if (DL.isLittleEndian()) {
// EXTLOAD:i24 -> ZEXTLOAD:i16 | (shl EXTLOAD@+2:i8, 16)
// Load the bottom RoundWidth bits.
Lo = DAG.getExtLoad(ISD::ZEXTLOAD, dl, Node->getValueType(0), Chain, Ptr,
LD->getPointerInfo(), RoundVT, LD->getOriginalAlign(),
MMOFlags, AAInfo);
// Load the remaining ExtraWidth bits.
IncrementSize = RoundWidth / 8;
Ptr = DAG.getMemBasePlusOffset(Ptr, TypeSize::Fixed(IncrementSize), dl);
Hi = DAG.getExtLoad(ExtType, dl, Node->getValueType(0), Chain, Ptr,
LD->getPointerInfo().getWithOffset(IncrementSize),
ExtraVT, LD->getOriginalAlign(), MMOFlags, AAInfo);
// Build a factor node to remember that this load is independent of
// the other one.
Ch = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo.getValue(1),
Hi.getValue(1));
// Move the top bits to the right place.
Hi = DAG.getNode(
ISD::SHL, dl, Hi.getValueType(), Hi,
DAG.getConstant(RoundWidth, dl,
TLI.getShiftAmountTy(Hi.getValueType(), DL)));
// Join the hi and lo parts.
Value = DAG.getNode(ISD::OR, dl, Node->getValueType(0), Lo, Hi);
} else {
// Big endian - avoid unaligned loads.
// EXTLOAD:i24 -> (shl EXTLOAD:i16, 8) | ZEXTLOAD@+2:i8
// Load the top RoundWidth bits.
Hi = DAG.getExtLoad(ExtType, dl, Node->getValueType(0), Chain, Ptr,
LD->getPointerInfo(), RoundVT, LD->getOriginalAlign(),
MMOFlags, AAInfo);
// Load the remaining ExtraWidth bits.
IncrementSize = RoundWidth / 8;
Ptr = DAG.getMemBasePlusOffset(Ptr, TypeSize::Fixed(IncrementSize), dl);
Lo = DAG.getExtLoad(ISD::ZEXTLOAD, dl, Node->getValueType(0), Chain, Ptr,
LD->getPointerInfo().getWithOffset(IncrementSize),
ExtraVT, LD->getOriginalAlign(), MMOFlags, AAInfo);
// Build a factor node to remember that this load is independent of
// the other one.
Ch = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo.getValue(1),
Hi.getValue(1));
// Move the top bits to the right place.
Hi = DAG.getNode(
ISD::SHL, dl, Hi.getValueType(), Hi,
DAG.getConstant(ExtraWidth, dl,
TLI.getShiftAmountTy(Hi.getValueType(), DL)));
// Join the hi and lo parts.
Value = DAG.getNode(ISD::OR, dl, Node->getValueType(0), Lo, Hi);
}
Chain = Ch;
} else {
bool isCustom = false;
switch (TLI.getLoadExtAction(ExtType, Node->getValueType(0),
SrcVT.getSimpleVT())) {
default: llvm_unreachable("This action is not supported yet!");
case TargetLowering::Custom:
isCustom = true;
LLVM_FALLTHROUGH;
case TargetLowering::Legal:
Value = SDValue(Node, 0);
Chain = SDValue(Node, 1);
if (isCustom) {
if (SDValue Res = TLI.LowerOperation(SDValue(Node, 0), DAG)) {
Value = Res;
Chain = Res.getValue(1);
}
} else {
// If this is an unaligned load and the target doesn't support it,
// expand it.
EVT MemVT = LD->getMemoryVT();
const DataLayout &DL = DAG.getDataLayout();
if (!TLI.allowsMemoryAccess(*DAG.getContext(), DL, MemVT,
*LD->getMemOperand())) {
std::tie(Value, Chain) = TLI.expandUnalignedLoad(LD, DAG);
}
}
break;
case TargetLowering::Expand: {
EVT DestVT = Node->getValueType(0);
if (!TLI.isLoadExtLegal(ISD::EXTLOAD, DestVT, SrcVT)) {
// If the source type is not legal, see if there is a legal extload to
// an intermediate type that we can then extend further.
EVT LoadVT = TLI.getRegisterType(SrcVT.getSimpleVT());
if (TLI.isTypeLegal(SrcVT) || // Same as SrcVT == LoadVT?
TLI.isLoadExtLegal(ExtType, LoadVT, SrcVT)) {
// If we are loading a legal type, this is a non-extload followed by a
// full extend.
ISD::LoadExtType MidExtType =
(LoadVT == SrcVT) ? ISD::NON_EXTLOAD : ExtType;
SDValue Load = DAG.getExtLoad(MidExtType, dl, LoadVT, Chain, Ptr,
SrcVT, LD->getMemOperand());
unsigned ExtendOp =
ISD::getExtForLoadExtType(SrcVT.isFloatingPoint(), ExtType);
Value = DAG.getNode(ExtendOp, dl, Node->getValueType(0), Load);
Chain = Load.getValue(1);
break;
}
// Handle the special case of fp16 extloads. EXTLOAD doesn't have the
// normal undefined upper bits behavior to allow using an in-reg extend
// with the illegal FP type, so load as an integer and do the
// from-integer conversion.
if (SrcVT.getScalarType() == MVT::f16) {
EVT ISrcVT = SrcVT.changeTypeToInteger();
EVT IDestVT = DestVT.changeTypeToInteger();
EVT ILoadVT = TLI.getRegisterType(IDestVT.getSimpleVT());
SDValue Result = DAG.getExtLoad(ISD::ZEXTLOAD, dl, ILoadVT, Chain,
Ptr, ISrcVT, LD->getMemOperand());
Value = DAG.getNode(ISD::FP16_TO_FP, dl, DestVT, Result);
Chain = Result.getValue(1);
break;
}
}
assert(!SrcVT.isVector() &&
"Vector Loads are handled in LegalizeVectorOps");
// FIXME: This does not work for vectors on most targets. Sign-
// and zero-extend operations are currently folded into extending
// loads, whether they are legal or not, and then we end up here
// without any support for legalizing them.
assert(ExtType != ISD::EXTLOAD &&
"EXTLOAD should always be supported!");
// Turn the unsupported load into an EXTLOAD followed by an
// explicit zero/sign extend inreg.
SDValue Result = DAG.getExtLoad(ISD::EXTLOAD, dl,
Node->getValueType(0),
Chain, Ptr, SrcVT,
LD->getMemOperand());
SDValue ValRes;
if (ExtType == ISD::SEXTLOAD)
ValRes = DAG.getNode(ISD::SIGN_EXTEND_INREG, dl,
Result.getValueType(),
Result, DAG.getValueType(SrcVT));
else
ValRes = DAG.getZeroExtendInReg(Result, dl, SrcVT);
Value = ValRes;
Chain = Result.getValue(1);
break;
}
}
}
// Since loads produce two values, make sure to remember that we legalized
// both of them.
if (Chain.getNode() != Node) {
assert(Value.getNode() != Node && "Load must be completely replaced");
DAG.ReplaceAllUsesOfValueWith(SDValue(Node, 0), Value);
DAG.ReplaceAllUsesOfValueWith(SDValue(Node, 1), Chain);
if (UpdatedNodes) {
UpdatedNodes->insert(Value.getNode());
UpdatedNodes->insert(Chain.getNode());
}
ReplacedNode(Node);
}
}
/// Return a legal replacement for the given operation, with all legal operands.
void SelectionDAGLegalize::LegalizeOp(SDNode *Node) {
LLVM_DEBUG(dbgs() << "\nLegalizing: "; Node->dump(&DAG));
// Allow illegal target nodes and illegal registers.
if (Node->getOpcode() == ISD::TargetConstant ||
Node->getOpcode() == ISD::Register)
return;
#ifndef NDEBUG
for (unsigned i = 0, e = Node->getNumValues(); i != e; ++i)
assert(TLI.getTypeAction(*DAG.getContext(), Node->getValueType(i)) ==
TargetLowering::TypeLegal &&
"Unexpected illegal type!");
for (const SDValue &Op : Node->op_values())
assert((TLI.getTypeAction(*DAG.getContext(), Op.getValueType()) ==
TargetLowering::TypeLegal ||
Op.getOpcode() == ISD::TargetConstant ||
Op.getOpcode() == ISD::Register) &&
"Unexpected illegal type!");
#endif
// Figure out the correct action; the way to query this varies by opcode
TargetLowering::LegalizeAction Action = TargetLowering::Legal;
bool SimpleFinishLegalizing = true;
switch (Node->getOpcode()) {
case ISD::INTRINSIC_W_CHAIN:
case ISD::INTRINSIC_WO_CHAIN:
case ISD::INTRINSIC_VOID:
case ISD::STACKSAVE:
Action = TLI.getOperationAction(Node->getOpcode(), MVT::Other);
break;
case ISD::GET_DYNAMIC_AREA_OFFSET:
Action = TLI.getOperationAction(Node->getOpcode(),
Node->getValueType(0));
break;
case ISD::VAARG:
Action = TLI.getOperationAction(Node->getOpcode(),
Node->getValueType(0));
if (Action != TargetLowering::Promote)
Action = TLI.getOperationAction(Node->getOpcode(), MVT::Other);
break;
case ISD::FP_TO_FP16:
case ISD::SINT_TO_FP:
case ISD::UINT_TO_FP:
case ISD::EXTRACT_VECTOR_ELT:
case ISD::LROUND:
case ISD::LLROUND:
case ISD::LRINT:
case ISD::LLRINT:
Action = TLI.getOperationAction(Node->getOpcode(),
Node->getOperand(0).getValueType());
break;
case ISD::STRICT_FP_TO_FP16:
case ISD::STRICT_SINT_TO_FP:
case ISD::STRICT_UINT_TO_FP:
case ISD::STRICT_LRINT:
case ISD::STRICT_LLRINT:
case ISD::STRICT_LROUND:
case ISD::STRICT_LLROUND:
// These pseudo-ops are the same as the other STRICT_ ops except
// they are registered with setOperationAction() using the input type
// instead of the output type.
Action = TLI.getOperationAction(Node->getOpcode(),
Node->getOperand(1).getValueType());
break;
case ISD::SIGN_EXTEND_INREG: {
EVT InnerType = cast<VTSDNode>(Node->getOperand(1))->getVT();
Action = TLI.getOperationAction(Node->getOpcode(), InnerType);
break;
}
case ISD::ATOMIC_STORE:
Action = TLI.getOperationAction(Node->getOpcode(),
Node->getOperand(2).getValueType());
break;
case ISD::SELECT_CC:
case ISD::STRICT_FSETCC:
case ISD::STRICT_FSETCCS:
case ISD::SETCC:
case ISD::BR_CC: {
unsigned CCOperand = Node->getOpcode() == ISD::SELECT_CC ? 4 :
Node->getOpcode() == ISD::STRICT_FSETCC ? 3 :
Node->getOpcode() == ISD::STRICT_FSETCCS ? 3 :
Node->getOpcode() == ISD::SETCC ? 2 : 1;
unsigned CompareOperand = Node->getOpcode() == ISD::BR_CC ? 2 :
Node->getOpcode() == ISD::STRICT_FSETCC ? 1 :
Node->getOpcode() == ISD::STRICT_FSETCCS ? 1 : 0;
MVT OpVT = Node->getOperand(CompareOperand).getSimpleValueType();
ISD::CondCode CCCode =
cast<CondCodeSDNode>(Node->getOperand(CCOperand))->get();
Action = TLI.getCondCodeAction(CCCode, OpVT);
if (Action == TargetLowering::Legal) {
if (Node->getOpcode() == ISD::SELECT_CC)
Action = TLI.getOperationAction(Node->getOpcode(),
Node->getValueType(0));
else
Action = TLI.getOperationAction(Node->getOpcode(), OpVT);
}
break;
}
case ISD::LOAD:
case ISD::STORE:
// FIXME: Model these properly. LOAD and STORE are complicated, and
// STORE expects the unlegalized operand in some cases.
SimpleFinishLegalizing = false;
break;
case ISD::CALLSEQ_START:
case ISD::CALLSEQ_END:
// FIXME: This shouldn't be necessary. These nodes have special properties
// dealing with the recursive nature of legalization. Removing this
// special case should be done as part of making LegalizeDAG non-recursive.
SimpleFinishLegalizing = false;
break;
case ISD::EXTRACT_ELEMENT:
case ISD::FLT_ROUNDS_:
case ISD::MERGE_VALUES:
case ISD::EH_RETURN:
case ISD::FRAME_TO_ARGS_OFFSET:
case ISD::EH_DWARF_CFA:
case ISD::EH_SJLJ_SETJMP:
case ISD::EH_SJLJ_LONGJMP:
case ISD::EH_SJLJ_SETUP_DISPATCH:
// These operations lie about being legal: when they claim to be legal,
// they should actually be expanded.
Action = TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0));
if (Action == TargetLowering::Legal)
Action = TargetLowering::Expand;
break;
case ISD::INIT_TRAMPOLINE:
case ISD::ADJUST_TRAMPOLINE:
case ISD::FRAMEADDR:
case ISD::RETURNADDR:
case ISD::ADDROFRETURNADDR:
case ISD::SPONENTRY:
// These operations lie about being legal: when they claim to be legal,
// they should actually be custom-lowered.
Action = TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0));
if (Action == TargetLowering::Legal)
Action = TargetLowering::Custom;
break;
case ISD::READCYCLECOUNTER:
// READCYCLECOUNTER returns an i64, even if type legalization might have
// expanded that to several smaller types.
Action = TLI.getOperationAction(Node->getOpcode(), MVT::i64);
break;
case ISD::READ_REGISTER:
case ISD::WRITE_REGISTER:
// Named register is legal in the DAG, but blocked by register name
// selection if not implemented by target (to chose the correct register)
// They'll be converted to Copy(To/From)Reg.
Action = TargetLowering::Legal;
break;
case ISD::UBSANTRAP:
Action = TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0));
if (Action == TargetLowering::Expand) {
// replace ISD::UBSANTRAP with ISD::TRAP
SDValue NewVal;
NewVal = DAG.getNode(ISD::TRAP, SDLoc(Node), Node->getVTList(),
Node->getOperand(0));
ReplaceNode(Node, NewVal.getNode());
LegalizeOp(NewVal.getNode());
return;
}
break;
case ISD::DEBUGTRAP:
Action = TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0));
if (Action == TargetLowering::Expand) {
// replace ISD::DEBUGTRAP with ISD::TRAP
SDValue NewVal;
NewVal = DAG.getNode(ISD::TRAP, SDLoc(Node), Node->getVTList(),
Node->getOperand(0));
ReplaceNode(Node, NewVal.getNode());
LegalizeOp(NewVal.getNode());
return;
}
break;
case ISD::SADDSAT:
case ISD::UADDSAT:
case ISD::SSUBSAT:
case ISD::USUBSAT:
case ISD::SSHLSAT:
case ISD::USHLSAT:
case ISD::FP_TO_SINT_SAT:
case ISD::FP_TO_UINT_SAT:
Action = TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0));
break;
case ISD::SMULFIX:
case ISD::SMULFIXSAT:
case ISD::UMULFIX:
case ISD::UMULFIXSAT:
case ISD::SDIVFIX:
case ISD::SDIVFIXSAT:
case ISD::UDIVFIX:
case ISD::UDIVFIXSAT: {
unsigned Scale = Node->getConstantOperandVal(2);
Action = TLI.getFixedPointOperationAction(Node->getOpcode(),
Node->getValueType(0), Scale);
break;
}
case ISD::MSCATTER:
Action = TLI.getOperationAction(Node->getOpcode(),
cast<MaskedScatterSDNode>(Node)->getValue().getValueType());
break;
case ISD::MSTORE:
Action = TLI.getOperationAction(Node->getOpcode(),
cast<MaskedStoreSDNode>(Node)->getValue().getValueType());
break;
case ISD::VP_SCATTER:
Action = TLI.getOperationAction(
Node->getOpcode(),
cast<VPScatterSDNode>(Node)->getValue().getValueType());
break;
case ISD::VP_STORE:
Action = TLI.getOperationAction(
Node->getOpcode(),
cast<VPStoreSDNode>(Node)->getValue().getValueType());
break;
case ISD::VECREDUCE_FADD:
case ISD::VECREDUCE_FMUL:
case ISD::VECREDUCE_ADD:
case ISD::VECREDUCE_MUL:
case ISD::VECREDUCE_AND:
case ISD::VECREDUCE_OR:
case ISD::VECREDUCE_XOR:
case ISD::VECREDUCE_SMAX:
case ISD::VECREDUCE_SMIN:
case ISD::VECREDUCE_UMAX:
case ISD::VECREDUCE_UMIN:
case ISD::VECREDUCE_FMAX:
case ISD::VECREDUCE_FMIN:
Action = TLI.getOperationAction(
Node->getOpcode(), Node->getOperand(0).getValueType());
break;
case ISD::VECREDUCE_SEQ_FADD:
case ISD::VECREDUCE_SEQ_FMUL:
case ISD::VP_REDUCE_FADD:
case ISD::VP_REDUCE_FMUL:
case ISD::VP_REDUCE_ADD:
case ISD::VP_REDUCE_MUL:
case ISD::VP_REDUCE_AND:
case ISD::VP_REDUCE_OR:
case ISD::VP_REDUCE_XOR:
case ISD::VP_REDUCE_SMAX:
case ISD::VP_REDUCE_SMIN:
case ISD::VP_REDUCE_UMAX:
case ISD::VP_REDUCE_UMIN:
case ISD::VP_REDUCE_FMAX:
case ISD::VP_REDUCE_FMIN:
case ISD::VP_REDUCE_SEQ_FADD:
case ISD::VP_REDUCE_SEQ_FMUL:
Action = TLI.getOperationAction(
Node->getOpcode(), Node->getOperand(1).getValueType());
break;
default:
if (Node->getOpcode() >= ISD::BUILTIN_OP_END) {
Action = TargetLowering::Legal;
} else {
Action = TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0));
}
break;
}
if (SimpleFinishLegalizing) {
SDNode *NewNode = Node;
switch (Node->getOpcode()) {
default: break;
case ISD::SHL:
case ISD::SRL:
case ISD::SRA:
case ISD::ROTL:
case ISD::ROTR: {
// Legalizing shifts/rotates requires adjusting the shift amount
// to the appropriate width.
SDValue Op0 = Node->getOperand(0);
SDValue Op1 = Node->getOperand(1);
if (!Op1.getValueType().isVector()) {
SDValue SAO = DAG.getShiftAmountOperand(Op0.getValueType(), Op1);
// The getShiftAmountOperand() may create a new operand node or
// return the existing one. If new operand is created we need
// to update the parent node.
// Do not try to legalize SAO here! It will be automatically legalized
// in the next round.
if (SAO != Op1)
NewNode = DAG.UpdateNodeOperands(Node, Op0, SAO);
}
}
break;
case ISD::FSHL:
case ISD::FSHR:
case ISD::SRL_PARTS:
case ISD::SRA_PARTS:
case ISD::SHL_PARTS: {
// Legalizing shifts/rotates requires adjusting the shift amount
// to the appropriate width.
SDValue Op0 = Node->getOperand(0);
SDValue Op1 = Node->getOperand(1);
SDValue Op2 = Node->getOperand(2);
if (!Op2.getValueType().isVector()) {
SDValue SAO = DAG.getShiftAmountOperand(Op0.getValueType(), Op2);
// The getShiftAmountOperand() may create a new operand node or
// return the existing one. If new operand is created we need
// to update the parent node.
if (SAO != Op2)
NewNode = DAG.UpdateNodeOperands(Node, Op0, Op1, SAO);
}
break;
}
}
if (NewNode != Node) {
ReplaceNode(Node, NewNode);
Node = NewNode;
}
switch (Action) {
case TargetLowering::Legal:
LLVM_DEBUG(dbgs() << "Legal node: nothing to do\n");
return;
case TargetLowering::Custom:
LLVM_DEBUG(dbgs() << "Trying custom legalization\n");
// FIXME: The handling for custom lowering with multiple results is
// a complete mess.
if (SDValue Res = TLI.LowerOperation(SDValue(Node, 0), DAG)) {
if (!(Res.getNode() != Node || Res.getResNo() != 0))
return;
if (Node->getNumValues() == 1) {
// Verify the new types match the original. Glue is waived because
// ISD::ADDC can be legalized by replacing Glue with an integer type.
assert((Res.getValueType() == Node->getValueType(0) ||
Node->getValueType(0) == MVT::Glue) &&
"Type mismatch for custom legalized operation");
LLVM_DEBUG(dbgs() << "Successfully custom legalized node\n");
// We can just directly replace this node with the lowered value.
ReplaceNode(SDValue(Node, 0), Res);
return;
}
SmallVector<SDValue, 8> ResultVals;
for (unsigned i = 0, e = Node->getNumValues(); i != e; ++i) {
// Verify the new types match the original. Glue is waived because
// ISD::ADDC can be legalized by replacing Glue with an integer type.
assert((Res->getValueType(i) == Node->getValueType(i) ||
Node->getValueType(i) == MVT::Glue) &&
"Type mismatch for custom legalized operation");
ResultVals.push_back(Res.getValue(i));
}
LLVM_DEBUG(dbgs() << "Successfully custom legalized node\n");
ReplaceNode(Node, ResultVals.data());
return;
}
LLVM_DEBUG(dbgs() << "Could not custom legalize node\n");
LLVM_FALLTHROUGH;
case TargetLowering::Expand:
if (ExpandNode(Node))
return;
LLVM_FALLTHROUGH;
case TargetLowering::LibCall:
ConvertNodeToLibcall(Node);
return;
case TargetLowering::Promote:
PromoteNode(Node);
return;
}
}
switch (Node->getOpcode()) {
default:
#ifndef NDEBUG
dbgs() << "NODE: ";
Node->dump( &DAG);
dbgs() << "\n";
#endif
llvm_unreachable("Do not know how to legalize this operator!");
case ISD::CALLSEQ_START:
case ISD::CALLSEQ_END:
break;
case ISD::LOAD:
return LegalizeLoadOps(Node);
case ISD::STORE:
return LegalizeStoreOps(Node);
}
}
SDValue SelectionDAGLegalize::ExpandExtractFromVectorThroughStack(SDValue Op) {
SDValue Vec = Op.getOperand(0);
SDValue Idx = Op.getOperand(1);
SDLoc dl(Op);
// Before we generate a new store to a temporary stack slot, see if there is
// already one that we can use. There often is because when we scalarize
// vector operations (using SelectionDAG::UnrollVectorOp for example) a whole
// series of EXTRACT_VECTOR_ELT nodes are generated, one for each element in
// the vector. If all are expanded here, we don't want one store per vector
// element.
// Caches for hasPredecessorHelper
SmallPtrSet<const SDNode *, 32> Visited;
SmallVector<const SDNode *, 16> Worklist;
Visited.insert(Op.getNode());
Worklist.push_back(Idx.getNode());
SDValue StackPtr, Ch;
for (SDNode::use_iterator UI = Vec.getNode()->use_begin(),
UE = Vec.getNode()->use_end(); UI != UE; ++UI) {
SDNode *User = *UI;
if (StoreSDNode *ST = dyn_cast<StoreSDNode>(User)) {
if (ST->isIndexed() || ST->isTruncatingStore() ||
ST->getValue() != Vec)
continue;
// Make sure that nothing else could have stored into the destination of
// this store.
if (!ST->getChain().reachesChainWithoutSideEffects(DAG.getEntryNode()))
continue;
// If the index is dependent on the store we will introduce a cycle when
// creating the load (the load uses the index, and by replacing the chain
// we will make the index dependent on the load). Also, the store might be
// dependent on the extractelement and introduce a cycle when creating
// the load.
if (SDNode::hasPredecessorHelper(ST, Visited, Worklist) ||
ST->hasPredecessor(Op.getNode()))
continue;
StackPtr = ST->getBasePtr();
Ch = SDValue(ST, 0);
break;
}
}
EVT VecVT = Vec.getValueType();
if (!Ch.getNode()) {
// Store the value to a temporary stack slot, then LOAD the returned part.
StackPtr = DAG.CreateStackTemporary(VecVT);
Ch = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr,
MachinePointerInfo());
}
SDValue NewLoad;
if (Op.getValueType().isVector()) {
StackPtr = TLI.getVectorSubVecPointer(DAG, StackPtr, VecVT,
Op.getValueType(), Idx);
NewLoad =
DAG.getLoad(Op.getValueType(), dl, Ch, StackPtr, MachinePointerInfo());
} else {
StackPtr = TLI.getVectorElementPointer(DAG, StackPtr, VecVT, Idx);
NewLoad = DAG.getExtLoad(ISD::EXTLOAD, dl, Op.getValueType(), Ch, StackPtr,
MachinePointerInfo(),
VecVT.getVectorElementType());
}
// Replace the chain going out of the store, by the one out of the load.
DAG.ReplaceAllUsesOfValueWith(Ch, SDValue(NewLoad.getNode(), 1));
// We introduced a cycle though, so update the loads operands, making sure
// to use the original store's chain as an incoming chain.
SmallVector<SDValue, 6> NewLoadOperands(NewLoad->op_begin(),
NewLoad->op_end());
NewLoadOperands[0] = Ch;
NewLoad =
SDValue(DAG.UpdateNodeOperands(NewLoad.getNode(), NewLoadOperands), 0);
return NewLoad;
}
SDValue SelectionDAGLegalize::ExpandInsertToVectorThroughStack(SDValue Op) {
assert(Op.getValueType().isVector() && "Non-vector insert subvector!");
SDValue Vec = Op.getOperand(0);
SDValue Part = Op.getOperand(1);
SDValue Idx = Op.getOperand(2);
SDLoc dl(Op);
// Store the value to a temporary stack slot, then LOAD the returned part.
EVT VecVT = Vec.getValueType();
EVT SubVecVT = Part.getValueType();
SDValue StackPtr = DAG.CreateStackTemporary(VecVT);
int FI = cast<FrameIndexSDNode>(StackPtr.getNode())->getIndex();
MachinePointerInfo PtrInfo =
MachinePointerInfo::getFixedStack(DAG.getMachineFunction(), FI);
// First store the whole vector.
SDValue Ch = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr, PtrInfo);
// Then store the inserted part.
SDValue SubStackPtr =
TLI.getVectorSubVecPointer(DAG, StackPtr, VecVT, SubVecVT, Idx);
// Store the subvector.
Ch = DAG.getStore(
Ch, dl, Part, SubStackPtr,
MachinePointerInfo::getUnknownStack(DAG.getMachineFunction()));
// Finally, load the updated vector.
return DAG.getLoad(Op.getValueType(), dl, Ch, StackPtr, PtrInfo);
}
SDValue SelectionDAGLegalize::ExpandVectorBuildThroughStack(SDNode* Node) {
assert((Node->getOpcode() == ISD::BUILD_VECTOR ||
Node->getOpcode() == ISD::CONCAT_VECTORS) &&
"Unexpected opcode!");
// We can't handle this case efficiently. Allocate a sufficiently
// aligned object on the stack, store each operand into it, then load
// the result as a vector.
// Create the stack frame object.
EVT VT = Node->getValueType(0);
EVT MemVT = isa<BuildVectorSDNode>(Node) ? VT.getVectorElementType()
: Node->getOperand(0).getValueType();
SDLoc dl(Node);
SDValue FIPtr = DAG.CreateStackTemporary(VT);
int FI = cast<FrameIndexSDNode>(FIPtr.getNode())->getIndex();
MachinePointerInfo PtrInfo =
MachinePointerInfo::getFixedStack(DAG.getMachineFunction(), FI);
// Emit a store of each element to the stack slot.
SmallVector<SDValue, 8> Stores;
unsigned TypeByteSize = MemVT.getSizeInBits() / 8;
assert(TypeByteSize > 0 && "Vector element type too small for stack store!");
// If the destination vector element type of a BUILD_VECTOR is narrower than
// the source element type, only store the bits necessary.
bool Truncate = isa<BuildVectorSDNode>(Node) &&
MemVT.bitsLT(Node->getOperand(0).getValueType());
// Store (in the right endianness) the elements to memory.
for (unsigned i = 0, e = Node->getNumOperands(); i != e; ++i) {
// Ignore undef elements.
if (Node->getOperand(i).isUndef()) continue;
unsigned Offset = TypeByteSize*i;
SDValue Idx = DAG.getMemBasePlusOffset(FIPtr, TypeSize::Fixed(Offset), dl);
if (Truncate)
Stores.push_back(DAG.getTruncStore(DAG.getEntryNode(), dl,
Node->getOperand(i), Idx,
PtrInfo.getWithOffset(Offset), MemVT));
else
Stores.push_back(DAG.getStore(DAG.getEntryNode(), dl, Node->getOperand(i),
Idx, PtrInfo.getWithOffset(Offset)));
}
SDValue StoreChain;
if (!Stores.empty()) // Not all undef elements?
StoreChain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Stores);
else
StoreChain = DAG.getEntryNode();
// Result is a load from the stack slot.
return DAG.getLoad(VT, dl, StoreChain, FIPtr, PtrInfo);
}
/// Bitcast a floating-point value to an integer value. Only bitcast the part
/// containing the sign bit if the target has no integer value capable of
/// holding all bits of the floating-point value.
void SelectionDAGLegalize::getSignAsIntValue(FloatSignAsInt &State,
const SDLoc &DL,
SDValue Value) const {
EVT FloatVT = Value.getValueType();
unsigned NumBits = FloatVT.getScalarSizeInBits();
State.FloatVT = FloatVT;
EVT IVT = EVT::getIntegerVT(*DAG.getContext(), NumBits);
// Convert to an integer of the same size.
if (TLI.isTypeLegal(IVT)) {
State.IntValue = DAG.getNode(ISD::BITCAST, DL, IVT, Value);
State.SignMask = APInt::getSignMask(NumBits);
State.SignBit = NumBits - 1;
return;
}
auto &DataLayout = DAG.getDataLayout();
// Store the float to memory, then load the sign part out as an integer.
MVT LoadTy = TLI.getRegisterType(*DAG.getContext(), MVT::i8);
// First create a temporary that is aligned for both the load and store.
SDValue StackPtr = DAG.CreateStackTemporary(FloatVT, LoadTy);
int FI = cast<FrameIndexSDNode>(StackPtr.getNode())->getIndex();
// Then store the float to it.
State.FloatPtr = StackPtr;
MachineFunction &MF = DAG.getMachineFunction();
State.FloatPointerInfo = MachinePointerInfo::getFixedStack(MF, FI);
State.Chain = DAG.getStore(DAG.getEntryNode(), DL, Value, State.FloatPtr,
State.FloatPointerInfo);
SDValue IntPtr;
if (DataLayout.isBigEndian()) {
assert(FloatVT.isByteSized() && "Unsupported floating point type!");
// Load out a legal integer with the same sign bit as the float.
IntPtr = StackPtr;
State.IntPointerInfo = State.FloatPointerInfo;
} else {
// Advance the pointer so that the loaded byte will contain the sign bit.
unsigned ByteOffset = (NumBits / 8) - 1;
IntPtr =
DAG.getMemBasePlusOffset(StackPtr, TypeSize::Fixed(ByteOffset), DL);
State.IntPointerInfo = MachinePointerInfo::getFixedStack(MF, FI,
ByteOffset);
}
State.IntPtr = IntPtr;
State.IntValue = DAG.getExtLoad(ISD::EXTLOAD, DL, LoadTy, State.Chain, IntPtr,
State.IntPointerInfo, MVT::i8);
State.SignMask = APInt::getOneBitSet(LoadTy.getScalarSizeInBits(), 7);
State.SignBit = 7;
}
/// Replace the integer value produced by getSignAsIntValue() with a new value
/// and cast the result back to a floating-point type.
SDValue SelectionDAGLegalize::modifySignAsInt(const FloatSignAsInt &State,
const SDLoc &DL,
SDValue NewIntValue) const {
if (!State.Chain)
return DAG.getNode(ISD::BITCAST, DL, State.FloatVT, NewIntValue);
// Override the part containing the sign bit in the value stored on the stack.
SDValue Chain = DAG.getTruncStore(State.Chain, DL, NewIntValue, State.IntPtr,
State.IntPointerInfo, MVT::i8);
return DAG.getLoad(State.FloatVT, DL, Chain, State.FloatPtr,
State.FloatPointerInfo);
}
SDValue SelectionDAGLegalize::ExpandFCOPYSIGN(SDNode *Node) const {
SDLoc DL(Node);
SDValue Mag = Node->getOperand(0);
SDValue Sign = Node->getOperand(1);
// Get sign bit into an integer value.
FloatSignAsInt SignAsInt;
getSignAsIntValue(SignAsInt, DL, Sign);
EVT IntVT = SignAsInt.IntValue.getValueType();
SDValue SignMask = DAG.getConstant(SignAsInt.SignMask, DL, IntVT);
SDValue SignBit = DAG.getNode(ISD::AND, DL, IntVT, SignAsInt.IntValue,
SignMask);
// If FABS is legal transform FCOPYSIGN(x, y) => sign(x) ? -FABS(x) : FABS(X)
EVT FloatVT = Mag.getValueType();
if (TLI.isOperationLegalOrCustom(ISD::FABS, FloatVT) &&
TLI.isOperationLegalOrCustom(ISD::FNEG, FloatVT)) {
SDValue AbsValue = DAG.getNode(ISD::FABS, DL, FloatVT, Mag);
SDValue NegValue = DAG.getNode(ISD::FNEG, DL, FloatVT, AbsValue);
SDValue Cond = DAG.getSetCC(DL, getSetCCResultType(IntVT), SignBit,
DAG.getConstant(0, DL, IntVT), ISD::SETNE);
return DAG.getSelect(DL, FloatVT, Cond, NegValue, AbsValue);
}
// Transform Mag value to integer, and clear the sign bit.
FloatSignAsInt MagAsInt;
getSignAsIntValue(MagAsInt, DL, Mag);
EVT MagVT = MagAsInt.IntValue.getValueType();
SDValue ClearSignMask = DAG.getConstant(~MagAsInt.SignMask, DL, MagVT);
SDValue ClearedSign = DAG.getNode(ISD::AND, DL, MagVT, MagAsInt.IntValue,
ClearSignMask);
// Get the signbit at the right position for MagAsInt.
int ShiftAmount = SignAsInt.SignBit - MagAsInt.SignBit;
EVT ShiftVT = IntVT;
if (SignBit.getScalarValueSizeInBits() <
ClearedSign.getScalarValueSizeInBits()) {
SignBit = DAG.getNode(ISD::ZERO_EXTEND, DL, MagVT, SignBit);
ShiftVT = MagVT;
}
if (ShiftAmount > 0) {
SDValue ShiftCnst = DAG.getConstant(ShiftAmount, DL, ShiftVT);
SignBit = DAG.getNode(ISD::SRL, DL, ShiftVT, SignBit, ShiftCnst);
} else if (ShiftAmount < 0) {
SDValue ShiftCnst = DAG.getConstant(-ShiftAmount, DL, ShiftVT);
SignBit = DAG.getNode(ISD::SHL, DL, ShiftVT, SignBit, ShiftCnst);
}
if (SignBit.getScalarValueSizeInBits() >
ClearedSign.getScalarValueSizeInBits()) {
SignBit = DAG.getNode(ISD::TRUNCATE, DL, MagVT, SignBit);
}
// Store the part with the modified sign and convert back to float.
SDValue CopiedSign = DAG.getNode(ISD::OR, DL, MagVT, ClearedSign, SignBit);
return modifySignAsInt(MagAsInt, DL, CopiedSign);
}
SDValue SelectionDAGLegalize::ExpandFNEG(SDNode *Node) const {
// Get the sign bit as an integer.
SDLoc DL(Node);
FloatSignAsInt SignAsInt;
getSignAsIntValue(SignAsInt, DL, Node->getOperand(0));
EVT IntVT = SignAsInt.IntValue.getValueType();
// Flip the sign.
SDValue SignMask = DAG.getConstant(SignAsInt.SignMask, DL, IntVT);
SDValue SignFlip =
DAG.getNode(ISD::XOR, DL, IntVT, SignAsInt.IntValue, SignMask);
// Convert back to float.
return modifySignAsInt(SignAsInt, DL, SignFlip);
}
SDValue SelectionDAGLegalize::ExpandFABS(SDNode *Node) const {
SDLoc DL(Node);
SDValue Value = Node->getOperand(0);
// Transform FABS(x) => FCOPYSIGN(x, 0.0) if FCOPYSIGN is legal.
EVT FloatVT = Value.getValueType();
if (TLI.isOperationLegalOrCustom(ISD::FCOPYSIGN, FloatVT)) {
SDValue Zero = DAG.getConstantFP(0.0, DL, FloatVT);
return DAG.getNode(ISD::FCOPYSIGN, DL, FloatVT, Value, Zero);
}
// Transform value to integer, clear the sign bit and transform back.
FloatSignAsInt ValueAsInt;
getSignAsIntValue(ValueAsInt, DL, Value);
EVT IntVT = ValueAsInt.IntValue.getValueType();
SDValue ClearSignMask = DAG.getConstant(~ValueAsInt.SignMask, DL, IntVT);
SDValue ClearedSign = DAG.getNode(ISD::AND, DL, IntVT, ValueAsInt.IntValue,
ClearSignMask);
return modifySignAsInt(ValueAsInt, DL, ClearedSign);
}
void SelectionDAGLegalize::ExpandDYNAMIC_STACKALLOC(SDNode* Node,
SmallVectorImpl<SDValue> &Results) {
Register SPReg = TLI.getStackPointerRegisterToSaveRestore();
assert(SPReg && "Target cannot require DYNAMIC_STACKALLOC expansion and"
" not tell us which reg is the stack pointer!");
SDLoc dl(Node);
EVT VT = Node->getValueType(0);
SDValue Tmp1 = SDValue(Node, 0);
SDValue Tmp2 = SDValue(Node, 1);
SDValue Tmp3 = Node->getOperand(2);
SDValue Chain = Tmp1.getOperand(0);
// Chain the dynamic stack allocation so that it doesn't modify the stack
// pointer when other instructions are using the stack.
Chain = DAG.getCALLSEQ_START(Chain, 0, 0, dl);
SDValue Size = Tmp2.getOperand(1);
SDValue SP = DAG.getCopyFromReg(Chain, dl, SPReg, VT);
Chain = SP.getValue(1);
Align Alignment = cast<ConstantSDNode>(Tmp3)->getAlignValue();
const TargetFrameLowering *TFL = DAG.getSubtarget().getFrameLowering();
unsigned Opc =
TFL->getStackGrowthDirection() == TargetFrameLowering::StackGrowsUp ?
ISD::ADD : ISD::SUB;
Align StackAlign = TFL->getStackAlign();
Tmp1 = DAG.getNode(Opc, dl, VT, SP, Size); // Value
if (Alignment > StackAlign)
Tmp1 = DAG.getNode(ISD::AND, dl, VT, Tmp1,
DAG.getConstant(-Alignment.value(), dl, VT));
Chain = DAG.getCopyToReg(Chain, dl, SPReg, Tmp1); // Output chain
Tmp2 = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(0, dl, true),
DAG.getIntPtrConstant(0, dl, true), SDValue(), dl);
Results.push_back(Tmp1);
Results.push_back(Tmp2);
}
/// Emit a store/load combination to the stack. This stores
/// SrcOp to a stack slot of type SlotVT, truncating it if needed. It then does
/// a load from the stack slot to DestVT, extending it if needed.
/// The resultant code need not be legal.
SDValue SelectionDAGLegalize::EmitStackConvert(SDValue SrcOp, EVT SlotVT,
EVT DestVT, const SDLoc &dl) {
return EmitStackConvert(SrcOp, SlotVT, DestVT, dl, DAG.getEntryNode());
}
SDValue SelectionDAGLegalize::EmitStackConvert(SDValue SrcOp, EVT SlotVT,
EVT DestVT, const SDLoc &dl,
SDValue Chain) {
unsigned SrcSize = SrcOp.getValueSizeInBits();
unsigned SlotSize = SlotVT.getSizeInBits();
unsigned DestSize = DestVT.getSizeInBits();
Type *DestType = DestVT.getTypeForEVT(*DAG.getContext());
Align DestAlign = DAG.getDataLayout().getPrefTypeAlign(DestType);
// Don't convert with stack if the load/store is expensive.
if ((SrcSize > SlotSize &&
!TLI.isTruncStoreLegalOrCustom(SrcOp.getValueType(), SlotVT)) ||
(SlotSize < DestSize &&
!TLI.isLoadExtLegalOrCustom(ISD::EXTLOAD, DestVT, SlotVT)))
return SDValue();
// Create the stack frame object.
Align SrcAlign = DAG.getDataLayout().getPrefTypeAlign(
SrcOp.getValueType().getTypeForEVT(*DAG.getContext()));
SDValue FIPtr = DAG.CreateStackTemporary(SlotVT.getStoreSize(), SrcAlign);
FrameIndexSDNode *StackPtrFI = cast<FrameIndexSDNode>(FIPtr);
int SPFI = StackPtrFI->getIndex();
MachinePointerInfo PtrInfo =
MachinePointerInfo::getFixedStack(DAG.getMachineFunction(), SPFI);
// Emit a store to the stack slot. Use a truncstore if the input value is
// later than DestVT.
SDValue Store;
if (SrcSize > SlotSize)
Store = DAG.getTruncStore(Chain, dl, SrcOp, FIPtr, PtrInfo,
SlotVT, SrcAlign);
else {
assert(SrcSize == SlotSize && "Invalid store");
Store =
DAG.getStore(Chain, dl, SrcOp, FIPtr, PtrInfo, SrcAlign);
}
// Result is a load from the stack slot.
if (SlotSize == DestSize)
return DAG.getLoad(DestVT, dl, Store, FIPtr, PtrInfo, DestAlign);
assert(SlotSize < DestSize && "Unknown extension!");
return DAG.getExtLoad(ISD::EXTLOAD, dl, DestVT, Store, FIPtr, PtrInfo, SlotVT,
DestAlign);
}
SDValue SelectionDAGLegalize::ExpandSCALAR_TO_VECTOR(SDNode *Node) {
SDLoc dl(Node);
// Create a vector sized/aligned stack slot, store the value to element #0,
// then load the whole vector back out.
SDValue StackPtr = DAG.CreateStackTemporary(Node->getValueType(0));
FrameIndexSDNode *StackPtrFI = cast<FrameIndexSDNode>(StackPtr);
int SPFI = StackPtrFI->getIndex();
SDValue Ch = DAG.getTruncStore(
DAG.getEntryNode(), dl, Node->getOperand(0), StackPtr,
MachinePointerInfo::getFixedStack(DAG.getMachineFunction(), SPFI),
Node->getValueType(0).getVectorElementType());
return DAG.getLoad(
Node->getValueType(0), dl, Ch, StackPtr,
MachinePointerInfo::getFixedStack(DAG.getMachineFunction(), SPFI));
}
static bool
ExpandBVWithShuffles(SDNode *Node, SelectionDAG &DAG,
const TargetLowering &TLI, SDValue &Res) {
unsigned NumElems = Node->getNumOperands();
SDLoc dl(Node);
EVT VT = Node->getValueType(0);
// Try to group the scalars into pairs, shuffle the pairs together, then
// shuffle the pairs of pairs together, etc. until the vector has
// been built. This will work only if all of the necessary shuffle masks
// are legal.
// We do this in two phases; first to check the legality of the shuffles,
// and next, assuming that all shuffles are legal, to create the new nodes.
for (int Phase = 0; Phase < 2; ++Phase) {
SmallVector<std::pair<SDValue, SmallVector<int, 16>>, 16> IntermedVals,
NewIntermedVals;
for (unsigned i = 0; i < NumElems; ++i) {
SDValue V = Node->getOperand(i);
if (V.isUndef())
continue;
SDValue Vec;
if (Phase)
Vec = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, V);
IntermedVals.push_back(std::make_pair(Vec, SmallVector<int, 16>(1, i)));
}
while (IntermedVals.size() > 2) {
NewIntermedVals.clear();
for (unsigned i = 0, e = (IntermedVals.size() & ~1u); i < e; i += 2) {
// This vector and the next vector are shuffled together (simply to
// append the one to the other).
SmallVector<int, 16> ShuffleVec(NumElems, -1);
SmallVector<int, 16> FinalIndices;
FinalIndices.reserve(IntermedVals[i].second.size() +
IntermedVals[i+1].second.size());
int k = 0;
for (unsigned j = 0, f = IntermedVals[i].second.size(); j != f;
++j, ++k) {
ShuffleVec[k] = j;
FinalIndices.push_back(IntermedVals[i].second[j]);
}
for (unsigned j = 0, f = IntermedVals[i+1].second.size(); j != f;
++j, ++k) {
ShuffleVec[k] = NumElems + j;
FinalIndices.push_back(IntermedVals[i+1].second[j]);
}
SDValue Shuffle;
if (Phase)
Shuffle = DAG.getVectorShuffle(VT, dl, IntermedVals[i].first,
IntermedVals[i+1].first,
ShuffleVec);
else if (!TLI.isShuffleMaskLegal(ShuffleVec, VT))
return false;
NewIntermedVals.push_back(
std::make_pair(Shuffle, std::move(FinalIndices)));
}
// If we had an odd number of defined values, then append the last
// element to the array of new vectors.
if ((IntermedVals.size() & 1) != 0)
NewIntermedVals.push_back(IntermedVals.back());
IntermedVals.swap(NewIntermedVals);
}
assert(IntermedVals.size() <= 2 && IntermedVals.size() > 0 &&
"Invalid number of intermediate vectors");
SDValue Vec1 = IntermedVals[0].first;
SDValue Vec2;
if (IntermedVals.size() > 1)
Vec2 = IntermedVals[1].first;
else if (Phase)
Vec2 = DAG.getUNDEF(VT);
SmallVector<int, 16> ShuffleVec(NumElems, -1);
for (unsigned i = 0, e = IntermedVals[0].second.size(); i != e; ++i)
ShuffleVec[IntermedVals[0].second[i]] = i;
for (unsigned i = 0, e = IntermedVals[1].second.size(); i != e; ++i)
ShuffleVec[IntermedVals[1].second[i]] = NumElems + i;
if (Phase)
Res = DAG.getVectorShuffle(VT, dl, Vec1, Vec2, ShuffleVec);
else if (!TLI.isShuffleMaskLegal(ShuffleVec, VT))
return false;
}
return true;
}
/// Expand a BUILD_VECTOR node on targets that don't
/// support the operation, but do support the resultant vector type.
SDValue SelectionDAGLegalize::ExpandBUILD_VECTOR(SDNode *Node) {
unsigned NumElems = Node->getNumOperands();
SDValue Value1, Value2;
SDLoc dl(Node);
EVT VT = Node->getValueType(0);
EVT OpVT = Node->getOperand(0).getValueType();
EVT EltVT = VT.getVectorElementType();
// If the only non-undef value is the low element, turn this into a
// SCALAR_TO_VECTOR node. If this is { X, X, X, X }, determine X.
bool isOnlyLowElement = true;
bool MoreThanTwoValues = false;
bool isConstant = true;
for (unsigned i = 0; i < NumElems; ++i) {
SDValue V = Node->getOperand(i);
if (V.isUndef())
continue;
if (i > 0)
isOnlyLowElement = false;
if (!isa<ConstantFPSDNode>(V) && !isa<ConstantSDNode>(V))
isConstant = false;
if (!Value1.getNode()) {
Value1 = V;
} else if (!Value2.getNode()) {
if (V != Value1)
Value2 = V;
} else if (V != Value1 && V != Value2) {
MoreThanTwoValues = true;
}
}
if (!Value1.getNode())
return DAG.getUNDEF(VT);
if (isOnlyLowElement)
return DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Node->getOperand(0));
// If all elements are constants, create a load from the constant pool.
if (isConstant) {
SmallVector<Constant*, 16> CV;
for (unsigned i = 0, e = NumElems; i != e; ++i) {
if (ConstantFPSDNode *V =
dyn_cast<ConstantFPSDNode>(Node->getOperand(i))) {
CV.push_back(const_cast<ConstantFP *>(V->getConstantFPValue()));
} else if (ConstantSDNode *V =
dyn_cast<ConstantSDNode>(Node->getOperand(i))) {
if (OpVT==EltVT)
CV.push_back(const_cast<ConstantInt *>(V->getConstantIntValue()));
else {
// If OpVT and EltVT don't match, EltVT is not legal and the
// element values have been promoted/truncated earlier. Undo this;
// we don't want a v16i8 to become a v16i32 for example.
const ConstantInt *CI = V->getConstantIntValue();
CV.push_back(ConstantInt::get(EltVT.getTypeForEVT(*DAG.getContext()),
CI->getZExtValue()));
}
} else {
assert(Node->getOperand(i).isUndef());
Type *OpNTy = EltVT.getTypeForEVT(*DAG.getContext());
CV.push_back(UndefValue::get(OpNTy));
}
}
Constant *CP = ConstantVector::get(CV);
SDValue CPIdx =
DAG.getConstantPool(CP, TLI.getPointerTy(DAG.getDataLayout()));
Align Alignment = cast<ConstantPoolSDNode>(CPIdx)->getAlign();
return DAG.getLoad(
VT, dl, DAG.getEntryNode(), CPIdx,
MachinePointerInfo::getConstantPool(DAG.getMachineFunction()),
Alignment);
}
SmallSet<SDValue, 16> DefinedValues;
for (unsigned i = 0; i < NumElems; ++i) {
if (Node->getOperand(i).isUndef())
continue;
DefinedValues.insert(Node->getOperand(i));
}
if (TLI.shouldExpandBuildVectorWithShuffles(VT, DefinedValues.size())) {
if (!MoreThanTwoValues) {
SmallVector<int, 8> ShuffleVec(NumElems, -1);
for (unsigned i = 0; i < NumElems; ++i) {
SDValue V = Node->getOperand(i);
if (V.isUndef())
continue;
ShuffleVec[i] = V == Value1 ? 0 : NumElems;
}
if (TLI.isShuffleMaskLegal(ShuffleVec, Node->getValueType(0))) {
// Get the splatted value into the low element of a vector register.
SDValue Vec1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Value1);
SDValue Vec2;
if (Value2.getNode())
Vec2 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Value2);
else
Vec2 = DAG.getUNDEF(VT);
// Return shuffle(LowValVec, undef, <0,0,0,0>)
return DAG.getVectorShuffle(VT, dl, Vec1, Vec2, ShuffleVec);
}
} else {
SDValue Res;
if (ExpandBVWithShuffles(Node, DAG, TLI, Res))
return Res;
}
}
// Otherwise, we can't handle this case efficiently.
return ExpandVectorBuildThroughStack(Node);
}
SDValue SelectionDAGLegalize::ExpandSPLAT_VECTOR(SDNode *Node) {
SDLoc DL(Node);
EVT VT = Node->getValueType(0);
SDValue SplatVal = Node->getOperand(0);
return DAG.getSplatBuildVector(VT, DL, SplatVal);
}
// Expand a node into a call to a libcall. If the result value
// does not fit into a register, return the lo part and set the hi part to the
// by-reg argument. If it does fit into a single register, return the result
// and leave the Hi part unset.
SDValue SelectionDAGLegalize::ExpandLibCall(RTLIB::Libcall LC, SDNode *Node,
bool isSigned) {
TargetLowering::ArgListTy Args;
TargetLowering::ArgListEntry Entry;
for (const SDValue &Op : Node->op_values()) {
EVT ArgVT = Op.getValueType();
Type *ArgTy = ArgVT.getTypeForEVT(*DAG.getContext());
Entry.Node = Op;
Entry.Ty = ArgTy;
Entry.IsSExt = TLI.shouldSignExtendTypeInLibCall(ArgVT, isSigned);
Entry.IsZExt = !TLI.shouldSignExtendTypeInLibCall(ArgVT, isSigned);
Args.push_back(Entry);
}
SDValue Callee = DAG.getExternalSymbol(TLI.getLibcallName(LC),
TLI.getPointerTy(DAG.getDataLayout()));
EVT RetVT = Node->getValueType(0);
Type *RetTy = RetVT.getTypeForEVT(*DAG.getContext());
// By default, the input chain to this libcall is the entry node of the
// function. If the libcall is going to be emitted as a tail call then
// TLI.isUsedByReturnOnly will change it to the right chain if the return
// node which is being folded has a non-entry input chain.
SDValue InChain = DAG.getEntryNode();
// isTailCall may be true since the callee does not reference caller stack
// frame. Check if it's in the right position and that the return types match.
SDValue TCChain = InChain;
const Function &F = DAG.getMachineFunction().getFunction();
bool isTailCall =
TLI.isInTailCallPosition(DAG, Node, TCChain) &&
(RetTy == F.getReturnType() || F.getReturnType()->isVoidTy());
if (isTailCall)
InChain = TCChain;
TargetLowering::CallLoweringInfo CLI(DAG);
bool signExtend = TLI.shouldSignExtendTypeInLibCall(RetVT, isSigned);
CLI.setDebugLoc(SDLoc(Node))
.setChain(InChain)
.setLibCallee(TLI.getLibcallCallingConv(LC), RetTy, Callee,
std::move(Args))
.setTailCall(isTailCall)
.setSExtResult(signExtend)
.setZExtResult(!signExtend)
.setIsPostTypeLegalization(true);
std::pair<SDValue, SDValue> CallInfo = TLI.LowerCallTo(CLI);
if (!CallInfo.second.getNode()) {
LLVM_DEBUG(dbgs() << "Created tailcall: "; DAG.getRoot().dump(&DAG));
// It's a tailcall, return the chain (which is the DAG root).
return DAG.getRoot();
}
LLVM_DEBUG(dbgs() << "Created libcall: "; CallInfo.first.dump(&DAG));
return CallInfo.first;
}
void SelectionDAGLegalize::ExpandFPLibCall(SDNode* Node,
RTLIB::Libcall LC,
SmallVectorImpl<SDValue> &Results) {
if (LC == RTLIB::UNKNOWN_LIBCALL)
llvm_unreachable("Can't create an unknown libcall!");
if (Node->isStrictFPOpcode()) {
EVT RetVT = Node->getValueType(0);
SmallVector<SDValue, 4> Ops(drop_begin(Node->ops()));
TargetLowering::MakeLibCallOptions CallOptions;
// FIXME: This doesn't support tail calls.
std::pair<SDValue, SDValue> Tmp = TLI.makeLibCall(DAG, LC, RetVT,
Ops, CallOptions,
SDLoc(Node),
Node->getOperand(0));
Results.push_back(Tmp.first);
Results.push_back(Tmp.second);
} else {
SDValue Tmp = ExpandLibCall(LC, Node, false);
Results.push_back(Tmp);
}
}
/// Expand the node to a libcall based on the result type.
void SelectionDAGLegalize::ExpandFPLibCall(SDNode* Node,
RTLIB::Libcall Call_F32,
RTLIB::Libcall Call_F64,
RTLIB::Libcall Call_F80,
RTLIB::Libcall Call_F128,
RTLIB::Libcall Call_PPCF128,
SmallVectorImpl<SDValue> &Results) {
RTLIB::Libcall LC = RTLIB::getFPLibCall(Node->getSimpleValueType(0),
Call_F32, Call_F64, Call_F80,
Call_F128, Call_PPCF128);
ExpandFPLibCall(Node, LC, Results);
}
SDValue SelectionDAGLegalize::ExpandIntLibCall(SDNode* Node, bool isSigned,
RTLIB::Libcall Call_I8,
RTLIB::Libcall Call_I16,
RTLIB::Libcall Call_I32,
RTLIB::Libcall Call_I64,
RTLIB::Libcall Call_I128) {
RTLIB::Libcall LC;
switch (Node->getSimpleValueType(0).SimpleTy) {
default: llvm_unreachable("Unexpected request for libcall!");
case MVT::i8: LC = Call_I8; break;
case MVT::i16: LC = Call_I16; break;
case MVT::i32: LC = Call_I32; break;
case MVT::i64: LC = Call_I64; break;
case MVT::i128: LC = Call_I128; break;
}
return ExpandLibCall(LC, Node, isSigned);
}
/// Expand the node to a libcall based on first argument type (for instance
/// lround and its variant).
void SelectionDAGLegalize::ExpandArgFPLibCall(SDNode* Node,
RTLIB::Libcall Call_F32,
RTLIB::Libcall Call_F64,
RTLIB::Libcall Call_F80,
RTLIB::Libcall Call_F128,
RTLIB::Libcall Call_PPCF128,
SmallVectorImpl<SDValue> &Results) {
EVT InVT = Node->getOperand(Node->isStrictFPOpcode() ? 1 : 0).getValueType();
RTLIB::Libcall LC = RTLIB::getFPLibCall(InVT.getSimpleVT(),
Call_F32, Call_F64, Call_F80,
Call_F128, Call_PPCF128);
ExpandFPLibCall(Node, LC, Results);
}
/// Issue libcalls to __{u}divmod to compute div / rem pairs.
void
SelectionDAGLegalize::ExpandDivRemLibCall(SDNode *Node,
SmallVectorImpl<SDValue> &Results) {
unsigned Opcode = Node->getOpcode();
bool isSigned = Opcode == ISD::SDIVREM;
RTLIB::Libcall LC;
switch (Node->getSimpleValueType(0).SimpleTy) {
default: llvm_unreachable("Unexpected request for libcall!");
case MVT::i8: LC= isSigned ? RTLIB::SDIVREM_I8 : RTLIB::UDIVREM_I8; break;
case MVT::i16: LC= isSigned ? RTLIB::SDIVREM_I16 : RTLIB::UDIVREM_I16; break;
case MVT::i32: LC= isSigned ? RTLIB::SDIVREM_I32 : RTLIB::UDIVREM_I32; break;
case MVT::i64: LC= isSigned ? RTLIB::SDIVREM_I64 : RTLIB::UDIVREM_I64; break;
case MVT::i128: LC= isSigned ? RTLIB::SDIVREM_I128:RTLIB::UDIVREM_I128; break;
}
// The input chain to this libcall is the entry node of the function.
// Legalizing the call will automatically add the previous call to the
// dependence.
SDValue InChain = DAG.getEntryNode();
EVT RetVT = Node->getValueType(0);
Type *RetTy = RetVT.getTypeForEVT(*DAG.getContext());
TargetLowering::ArgListTy Args;
TargetLowering::ArgListEntry Entry;
for (const SDValue &Op : Node->op_values()) {
EVT ArgVT = Op.getValueType();
Type *ArgTy = ArgVT.getTypeForEVT(*DAG.getContext());
Entry.Node = Op;
Entry.Ty = ArgTy;
Entry.IsSExt = isSigned;
Entry.IsZExt = !isSigned;
Args.push_back(Entry);
}
// Also pass the return address of the remainder.
SDValue FIPtr = DAG.CreateStackTemporary(RetVT);
Entry.Node = FIPtr;
Entry.Ty = RetTy->getPointerTo();
Entry.IsSExt = isSigned;
Entry.IsZExt = !isSigned;
Args.push_back(Entry);
SDValue Callee = DAG.getExternalSymbol(TLI.getLibcallName(LC),
TLI.getPointerTy(DAG.getDataLayout()));
SDLoc dl(Node);
TargetLowering::CallLoweringInfo CLI(DAG);
CLI.setDebugLoc(dl)
.setChain(InChain)
.setLibCallee(TLI.getLibcallCallingConv(LC), RetTy, Callee,
std::move(Args))
.setSExtResult(isSigned)
.setZExtResult(!isSigned);
std::pair<SDValue, SDValue> CallInfo = TLI.LowerCallTo(CLI);
// Remainder is loaded back from the stack frame.
SDValue Rem =
DAG.getLoad(RetVT, dl, CallInfo.second, FIPtr, MachinePointerInfo());
Results.push_back(CallInfo.first);
Results.push_back(Rem);
}
/// Return true if sincos libcall is available.
static bool isSinCosLibcallAvailable(SDNode *Node, const TargetLowering &TLI) {
RTLIB::Libcall LC;
switch (Node->getSimpleValueType(0).SimpleTy) {
default: llvm_unreachable("Unexpected request for libcall!");
case MVT::f32: LC = RTLIB::SINCOS_F32; break;
case MVT::f64: LC = RTLIB::SINCOS_F64; break;
case MVT::f80: LC = RTLIB::SINCOS_F80; break;
case MVT::f128: LC = RTLIB::SINCOS_F128; break;
case MVT::ppcf128: LC = RTLIB::SINCOS_PPCF128; break;
}
return TLI.getLibcallName(LC) != nullptr;
}
/// Only issue sincos libcall if both sin and cos are needed.
static bool useSinCos(SDNode *Node) {
unsigned OtherOpcode = Node->getOpcode() == ISD::FSIN
? ISD::FCOS : ISD::FSIN;
SDValue Op0 = Node->getOperand(0);
for (SDNode::use_iterator UI = Op0.getNode()->use_begin(),
UE = Op0.getNode()->use_end(); UI != UE; ++UI) {
SDNode *User = *UI;
if (User == Node)
continue;
// The other user might have been turned into sincos already.
if (User->getOpcode() == OtherOpcode || User->getOpcode() == ISD::FSINCOS)
return true;
}
return false;
}
/// Issue libcalls to sincos to compute sin / cos pairs.
void
SelectionDAGLegalize::ExpandSinCosLibCall(SDNode *Node,
SmallVectorImpl<SDValue> &Results) {
RTLIB::Libcall LC;
switch (Node->getSimpleValueType(0).SimpleTy) {
default: llvm_unreachable("Unexpected request for libcall!");
case MVT::f32: LC = RTLIB::SINCOS_F32; break;
case MVT::f64: LC = RTLIB::SINCOS_F64; break;
case MVT::f80: LC = RTLIB::SINCOS_F80; break;
case MVT::f128: LC = RTLIB::SINCOS_F128; break;
case MVT::ppcf128: LC = RTLIB::SINCOS_PPCF128; break;
}
// The input chain to this libcall is the entry node of the function.
// Legalizing the call will automatically add the previous call to the
// dependence.
SDValue InChain = DAG.getEntryNode();
EVT RetVT = Node->getValueType(0);
Type *RetTy = RetVT.getTypeForEVT(*DAG.getContext());
TargetLowering::ArgListTy Args;
TargetLowering::ArgListEntry Entry;
// Pass the argument.
Entry.Node = Node->getOperand(0);
Entry.Ty = RetTy;
Entry.IsSExt = false;
Entry.IsZExt = false;
Args.push_back(Entry);
// Pass the return address of sin.
SDValue SinPtr = DAG.CreateStackTemporary(RetVT);
Entry.Node = SinPtr;
Entry.Ty = RetTy->getPointerTo();
Entry.IsSExt = false;
Entry.IsZExt = false;
Args.push_back(Entry);
// Also pass the return address of the cos.
SDValue CosPtr = DAG.CreateStackTemporary(RetVT);
Entry.Node = CosPtr;
Entry.Ty = RetTy->getPointerTo();
Entry.IsSExt = false;
Entry.IsZExt = false;
Args.push_back(Entry);
SDValue Callee = DAG.getExternalSymbol(TLI.getLibcallName(LC),
TLI.getPointerTy(DAG.getDataLayout()));
SDLoc dl(Node);
TargetLowering::CallLoweringInfo CLI(DAG);
CLI.setDebugLoc(dl).setChain(InChain).setLibCallee(
TLI.getLibcallCallingConv(LC), Type::getVoidTy(*DAG.getContext()), Callee,
std::move(Args));
std::pair<SDValue, SDValue> CallInfo = TLI.LowerCallTo(CLI);
Results.push_back(
DAG.getLoad(RetVT, dl, CallInfo.second, SinPtr, MachinePointerInfo()));
Results.push_back(
DAG.getLoad(RetVT, dl, CallInfo.second, CosPtr, MachinePointerInfo()));
}
/// This function is responsible for legalizing a
/// INT_TO_FP operation of the specified operand when the target requests that
/// we expand it. At this point, we know that the result and operand types are
/// legal for the target.
SDValue SelectionDAGLegalize::ExpandLegalINT_TO_FP(SDNode *Node,
SDValue &Chain) {
bool isSigned = (Node->getOpcode() == ISD::STRICT_SINT_TO_FP ||
Node->getOpcode() == ISD::SINT_TO_FP);
EVT DestVT = Node->getValueType(0);
SDLoc dl(Node);
unsigned OpNo = Node->isStrictFPOpcode() ? 1 : 0;
SDValue Op0 = Node->getOperand(OpNo);
EVT SrcVT = Op0.getValueType();
// TODO: Should any fast-math-flags be set for the created nodes?
LLVM_DEBUG(dbgs() << "Legalizing INT_TO_FP\n");
if (SrcVT == MVT::i32 && TLI.isTypeLegal(MVT::f64) &&
(DestVT.bitsLE(MVT::f64) ||
TLI.isOperationLegal(Node->isStrictFPOpcode() ? ISD::STRICT_FP_EXTEND
: ISD::FP_EXTEND,
DestVT))) {
LLVM_DEBUG(dbgs() << "32-bit [signed|unsigned] integer to float/double "
"expansion\n");
// Get the stack frame index of a 8 byte buffer.
SDValue StackSlot = DAG.CreateStackTemporary(MVT::f64);
SDValue Lo = Op0;
// if signed map to unsigned space
if (isSigned) {
// Invert sign bit (signed to unsigned mapping).
Lo = DAG.getNode(ISD::XOR, dl, MVT::i32, Lo,
DAG.getConstant(0x80000000u, dl, MVT::i32));
}
// Initial hi portion of constructed double.
SDValue Hi = DAG.getConstant(0x43300000u, dl, MVT::i32);
// If this a big endian target, swap the lo and high data.
if (DAG.getDataLayout().isBigEndian())
std::swap(Lo, Hi);
SDValue MemChain = DAG.getEntryNode();
// Store the lo of the constructed double.
SDValue Store1 = DAG.getStore(MemChain, dl, Lo, StackSlot,
MachinePointerInfo());
// Store the hi of the constructed double.
SDValue HiPtr = DAG.getMemBasePlusOffset(StackSlot, TypeSize::Fixed(4), dl);
SDValue Store2 =
DAG.getStore(MemChain, dl, Hi, HiPtr, MachinePointerInfo());
MemChain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Store1, Store2);
// load the constructed double
SDValue Load =
DAG.getLoad(MVT::f64, dl, MemChain, StackSlot, MachinePointerInfo());
// FP constant to bias correct the final result
SDValue Bias = DAG.getConstantFP(isSigned ?
BitsToDouble(0x4330000080000000ULL) :
BitsToDouble(0x4330000000000000ULL),
dl, MVT::f64);
// Subtract the bias and get the final result.
SDValue Sub;
SDValue Result;
if (Node->isStrictFPOpcode()) {
Sub = DAG.getNode(ISD::STRICT_FSUB, dl, {MVT::f64, MVT::Other},
{Node->getOperand(0), Load, Bias});
Chain = Sub.getValue(1);
if (DestVT != Sub.getValueType()) {
std::pair<SDValue, SDValue> ResultPair;
ResultPair =
DAG.getStrictFPExtendOrRound(Sub, Chain, dl, DestVT);
Result = ResultPair.first;
Chain = ResultPair.second;
}
else
Result = Sub;
} else {
Sub = DAG.getNode(ISD::FSUB, dl, MVT::f64, Load, Bias);
Result = DAG.getFPExtendOrRound(Sub, dl, DestVT);
}
return Result;
}
if (isSigned)
return SDValue();
// TODO: Generalize this for use with other types.
if (((SrcVT == MVT::i32 || SrcVT == MVT::i64) && DestVT == MVT::f32) ||
(SrcVT == MVT::i64 && DestVT == MVT::f64)) {
LLVM_DEBUG(dbgs() << "Converting unsigned i32/i64 to f32/f64\n");
// For unsigned conversions, convert them to signed conversions using the
// algorithm from the x86_64 __floatundisf in compiler_rt. That method
// should be valid for i32->f32 as well.
// More generally this transform should be valid if there are 3 more bits
// in the integer type than the significand. Rounding uses the first bit
// after the width of the significand and the OR of all bits after that. So
// we need to be able to OR the shifted out bit into one of the bits that
// participate in the OR.
// TODO: This really should be implemented using a branch rather than a
// select. We happen to get lucky and machinesink does the right
// thing most of the time. This would be a good candidate for a
// pseudo-op, or, even better, for whole-function isel.
EVT SetCCVT = getSetCCResultType(SrcVT);
SDValue SignBitTest = DAG.getSetCC(
dl, SetCCVT, Op0, DAG.getConstant(0, dl, SrcVT), ISD::SETLT);
EVT ShiftVT = TLI.getShiftAmountTy(SrcVT, DAG.getDataLayout());
SDValue ShiftConst = DAG.getConstant(1, dl, ShiftVT);
SDValue Shr = DAG.getNode(ISD::SRL, dl, SrcVT, Op0, ShiftConst);
SDValue AndConst = DAG.getConstant(1, dl, SrcVT);
SDValue And = DAG.getNode(ISD::AND, dl, SrcVT, Op0, AndConst);
SDValue Or = DAG.getNode(ISD::OR, dl, SrcVT, And, Shr);
SDValue Slow, Fast;
if (Node->isStrictFPOpcode()) {
// In strict mode, we must avoid spurious exceptions, and therefore
// must make sure to only emit a single STRICT_SINT_TO_FP.
SDValue InCvt = DAG.getSelect(dl, SrcVT, SignBitTest, Or, Op0);
Fast = DAG.getNode(ISD::STRICT_SINT_TO_FP, dl, { DestVT, MVT::Other },
{ Node->getOperand(0), InCvt });
Slow = DAG.getNode(ISD::STRICT_FADD, dl, { DestVT, MVT::Other },
{ Fast.getValue(1), Fast, Fast });
Chain = Slow.getValue(1);
// The STRICT_SINT_TO_FP inherits the exception mode from the
// incoming STRICT_UINT_TO_FP node; the STRICT_FADD node can
// never raise any exception.
SDNodeFlags Flags;
Flags.setNoFPExcept(Node->getFlags().hasNoFPExcept());
Fast->setFlags(Flags);
Flags.setNoFPExcept(true);
Slow->setFlags(Flags);
} else {
SDValue SignCvt = DAG.getNode(ISD::SINT_TO_FP, dl, DestVT, Or);
Slow = DAG.getNode(ISD::FADD, dl, DestVT, SignCvt, SignCvt);
Fast = DAG.getNode(ISD::SINT_TO_FP, dl, DestVT, Op0);
}
return DAG.getSelect(dl, DestVT, SignBitTest, Slow, Fast);
}
// Don't expand it if there isn't cheap fadd.
if (!TLI.isOperationLegalOrCustom(
Node->isStrictFPOpcode() ? ISD::STRICT_FADD : ISD::FADD, DestVT))
return SDValue();
// The following optimization is valid only if every value in SrcVT (when
// treated as signed) is representable in DestVT. Check that the mantissa
// size of DestVT is >= than the number of bits in SrcVT -1.
assert(APFloat::semanticsPrecision(DAG.EVTToAPFloatSemantics(DestVT)) >=
SrcVT.getSizeInBits() - 1 &&
"Cannot perform lossless SINT_TO_FP!");
SDValue Tmp1;
if (Node->isStrictFPOpcode()) {
Tmp1 = DAG.getNode(ISD::STRICT_SINT_TO_FP, dl, { DestVT, MVT::Other },
{ Node->getOperand(0), Op0 });
} else
Tmp1 = DAG.getNode(ISD::SINT_TO_FP, dl, DestVT, Op0);
SDValue SignSet = DAG.getSetCC(dl, getSetCCResultType(SrcVT), Op0,
DAG.getConstant(0, dl, SrcVT), ISD::SETLT);
SDValue Zero = DAG.getIntPtrConstant(0, dl),
Four = DAG.getIntPtrConstant(4, dl);
SDValue CstOffset = DAG.getSelect(dl, Zero.getValueType(),
SignSet, Four, Zero);
// If the sign bit of the integer is set, the large number will be treated
// as a negative number. To counteract this, the dynamic code adds an
// offset depending on the data type.
uint64_t FF;
switch (SrcVT.getSimpleVT().SimpleTy) {
default:
return SDValue();
case MVT::i8 : FF = 0x43800000ULL; break; // 2^8 (as a float)
case MVT::i16: FF = 0x47800000ULL; break; // 2^16 (as a float)
case MVT::i32: FF = 0x4F800000ULL; break; // 2^32 (as a float)
case MVT::i64: FF = 0x5F800000ULL; break; // 2^64 (as a float)
}
if (DAG.getDataLayout().isLittleEndian())
FF <<= 32;
Constant *FudgeFactor = ConstantInt::get(
Type::getInt64Ty(*DAG.getContext()), FF);
SDValue CPIdx =
DAG.getConstantPool(FudgeFactor, TLI.getPointerTy(DAG.getDataLayout()));
Align Alignment = cast<ConstantPoolSDNode>(CPIdx)->getAlign();
CPIdx = DAG.getNode(ISD::ADD, dl, CPIdx.getValueType(), CPIdx, CstOffset);
Alignment = commonAlignment(Alignment, 4);
SDValue FudgeInReg;
if (DestVT == MVT::f32)
FudgeInReg = DAG.getLoad(
MVT::f32, dl, DAG.getEntryNode(), CPIdx,
MachinePointerInfo::getConstantPool(DAG.getMachineFunction()),
Alignment);
else {
SDValue Load = DAG.getExtLoad(
ISD::EXTLOAD, dl, DestVT, DAG.getEntryNode(), CPIdx,
MachinePointerInfo::getConstantPool(DAG.getMachineFunction()), MVT::f32,
Alignment);
HandleSDNode Handle(Load);
LegalizeOp(Load.getNode());
FudgeInReg = Handle.getValue();
}
if (Node->isStrictFPOpcode()) {
SDValue Result = DAG.getNode(ISD::STRICT_FADD, dl, { DestVT, MVT::Other },
{ Tmp1.getValue(1), Tmp1, FudgeInReg });
Chain = Result.getValue(1);
return Result;
}
return DAG.getNode(ISD::FADD, dl, DestVT, Tmp1, FudgeInReg);
}
/// This function is responsible for legalizing a
/// *INT_TO_FP operation of the specified operand when the target requests that
/// we promote it. At this point, we know that the result and operand types are
/// legal for the target, and that there is a legal UINT_TO_FP or SINT_TO_FP
/// operation that takes a larger input.
void SelectionDAGLegalize::PromoteLegalINT_TO_FP(
SDNode *N, const SDLoc &dl, SmallVectorImpl<SDValue> &Results) {
bool IsStrict = N->isStrictFPOpcode();
bool IsSigned = N->getOpcode() == ISD::SINT_TO_FP ||
N->getOpcode() == ISD::STRICT_SINT_TO_FP;
EVT DestVT = N->getValueType(0);
SDValue LegalOp = N->getOperand(IsStrict ? 1 : 0);
unsigned UIntOp = IsStrict ? ISD::STRICT_UINT_TO_FP : ISD::UINT_TO_FP;
unsigned SIntOp = IsStrict ? ISD::STRICT_SINT_TO_FP : ISD::SINT_TO_FP;
// First step, figure out the appropriate *INT_TO_FP operation to use.
EVT NewInTy = LegalOp.getValueType();
unsigned OpToUse = 0;
// Scan for the appropriate larger type to use.
while (true) {
NewInTy = (MVT::SimpleValueType)(NewInTy.getSimpleVT().SimpleTy+1);
assert(NewInTy.isInteger() && "Ran out of possibilities!");
// If the target supports SINT_TO_FP of this type, use it.
if (TLI.isOperationLegalOrCustom(SIntOp, NewInTy)) {
OpToUse = SIntOp;
break;
}
if (IsSigned)
continue;
// If the target supports UINT_TO_FP of this type, use it.
if (TLI.isOperationLegalOrCustom(UIntOp, NewInTy)) {
OpToUse = UIntOp;
break;
}
// Otherwise, try a larger type.
}
// Okay, we found the operation and type to use. Zero extend our input to the
// desired type then run the operation on it.
if (IsStrict) {
SDValue Res =
DAG.getNode(OpToUse, dl, {DestVT, MVT::Other},
{N->getOperand(0),
DAG.getNode(IsSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND,
dl, NewInTy, LegalOp)});
Results.push_back(Res);
Results.push_back(Res.getValue(1));
return;
}
Results.push_back(
DAG.getNode(OpToUse, dl, DestVT,
DAG.getNode(IsSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND,
dl, NewInTy, LegalOp)));
}
/// This function is responsible for legalizing a
/// FP_TO_*INT operation of the specified operand when the target requests that
/// we promote it. At this point, we know that the result and operand types are
/// legal for the target, and that there is a legal FP_TO_UINT or FP_TO_SINT
/// operation that returns a larger result.
void SelectionDAGLegalize::PromoteLegalFP_TO_INT(SDNode *N, const SDLoc &dl,
SmallVectorImpl<SDValue> &Results) {
bool IsStrict = N->isStrictFPOpcode();
bool IsSigned = N->getOpcode() == ISD::FP_TO_SINT ||
N->getOpcode() == ISD::STRICT_FP_TO_SINT;
EVT DestVT = N->getValueType(0);
SDValue LegalOp = N->getOperand(IsStrict ? 1 : 0);
// First step, figure out the appropriate FP_TO*INT operation to use.
EVT NewOutTy = DestVT;
unsigned OpToUse = 0;
// Scan for the appropriate larger type to use.
while (true) {
NewOutTy = (MVT::SimpleValueType)(NewOutTy.getSimpleVT().SimpleTy+1);
assert(NewOutTy.isInteger() && "Ran out of possibilities!");
// A larger signed type can hold all unsigned values of the requested type,
// so using FP_TO_SINT is valid
OpToUse = IsStrict ? ISD::STRICT_FP_TO_SINT : ISD::FP_TO_SINT;
if (TLI.isOperationLegalOrCustom(OpToUse, NewOutTy))
break;
// However, if the value may be < 0.0, we *must* use some FP_TO_SINT.
OpToUse = IsStrict ? ISD::STRICT_FP_TO_UINT : ISD::FP_TO_UINT;
if (!IsSigned && TLI.isOperationLegalOrCustom(OpToUse, NewOutTy))
break;
// Otherwise, try a larger type.
}
// Okay, we found the operation and type to use.
SDValue Operation;
if (IsStrict) {
SDVTList VTs = DAG.getVTList(NewOutTy, MVT::Other);
Operation = DAG.getNode(OpToUse, dl, VTs, N->getOperand(0), LegalOp);
} else
Operation = DAG.getNode(OpToUse, dl, NewOutTy, LegalOp);
// Truncate the result of the extended FP_TO_*INT operation to the desired
// size.
SDValue Trunc = DAG.getNode(ISD::TRUNCATE, dl, DestVT, Operation);
Results.push_back(Trunc);
if (IsStrict)
Results.push_back(Operation.getValue(1));
}
/// Promote FP_TO_*INT_SAT operation to a larger result type. At this point
/// the result and operand types are legal and there must be a legal
/// FP_TO_*INT_SAT operation for a larger result type.
SDValue SelectionDAGLegalize::PromoteLegalFP_TO_INT_SAT(SDNode *Node,
const SDLoc &dl) {
unsigned Opcode = Node->getOpcode();
// Scan for the appropriate larger type to use.
EVT NewOutTy = Node->getValueType(0);
while (true) {
NewOutTy = (MVT::SimpleValueType)(NewOutTy.getSimpleVT().SimpleTy + 1);
assert(NewOutTy.isInteger() && "Ran out of possibilities!");
if (TLI.isOperationLegalOrCustom(Opcode, NewOutTy))
break;
}
// Saturation width is determined by second operand, so we don't have to
// perform any fixup and can directly truncate the result.
SDValue Result = DAG.getNode(Opcode, dl, NewOutTy, Node->getOperand(0),
Node->getOperand(1));
return DAG.getNode(ISD::TRUNCATE, dl, Node->getValueType(0), Result);
}
/// Open code the operations for PARITY of the specified operation.
SDValue SelectionDAGLegalize::ExpandPARITY(SDValue Op, const SDLoc &dl) {
EVT VT = Op.getValueType();
EVT ShVT = TLI.getShiftAmountTy(VT, DAG.getDataLayout());
unsigned Sz = VT.getScalarSizeInBits();
// If CTPOP is legal, use it. Otherwise use shifts and xor.
SDValue Result;
if (TLI.isOperationLegal(ISD::CTPOP, VT)) {
Result = DAG.getNode(ISD::CTPOP, dl, VT, Op);
} else {
Result = Op;
for (unsigned i = Log2_32_Ceil(Sz); i != 0;) {
SDValue Shift = DAG.getNode(ISD::SRL, dl, VT, Result,
DAG.getConstant(1ULL << (--i), dl, ShVT));
Result = DAG.getNode(ISD::XOR, dl, VT, Result, Shift);
}
}
return DAG.getNode(ISD::AND, dl, VT, Result, DAG.getConstant(1, dl, VT));
}
bool SelectionDAGLegalize::ExpandNode(SDNode *Node) {
LLVM_DEBUG(dbgs() << "Trying to expand node\n");
SmallVector<SDValue, 8> Results;
SDLoc dl(Node);
SDValue Tmp1, Tmp2, Tmp3, Tmp4;
bool NeedInvert;
switch (Node->getOpcode()) {
case ISD::ABS:
if (TLI.expandABS(Node, Tmp1, DAG))
Results.push_back(Tmp1);
break;
case ISD::CTPOP:
if (TLI.expandCTPOP(Node, Tmp1, DAG))
Results.push_back(Tmp1);
break;
case ISD::CTLZ:
case ISD::CTLZ_ZERO_UNDEF:
if (TLI.expandCTLZ(Node, Tmp1, DAG))
Results.push_back(Tmp1);
break;
case ISD::CTTZ:
case ISD::CTTZ_ZERO_UNDEF:
if (TLI.expandCTTZ(Node, Tmp1, DAG))
Results.push_back(Tmp1);
break;
case ISD::BITREVERSE:
if ((Tmp1 = TLI.expandBITREVERSE(Node, DAG)))
Results.push_back(Tmp1);
break;
case ISD::BSWAP:
if ((Tmp1 = TLI.expandBSWAP(Node, DAG)))
Results.push_back(Tmp1);
break;
case ISD::PARITY:
Results.push_back(ExpandPARITY(Node->getOperand(0), dl));
break;
case ISD::FRAMEADDR:
case ISD::RETURNADDR:
case ISD::FRAME_TO_ARGS_OFFSET:
Results.push_back(DAG.getConstant(0, dl, Node->getValueType(0)));
break;
case ISD::EH_DWARF_CFA: {
SDValue CfaArg = DAG.getSExtOrTrunc(Node->getOperand(0), dl,
TLI.getPointerTy(DAG.getDataLayout()));
SDValue Offset = DAG.getNode(ISD::ADD, dl,
CfaArg.getValueType(),
DAG.getNode(ISD::FRAME_TO_ARGS_OFFSET, dl,
CfaArg.getValueType()),
CfaArg);
SDValue FA = DAG.getNode(
ISD::FRAMEADDR, dl, TLI.getPointerTy(DAG.getDataLayout()),
DAG.getConstant(0, dl, TLI.getPointerTy(DAG.getDataLayout())));
Results.push_back(DAG.getNode(ISD::ADD, dl, FA.getValueType(),
FA, Offset));
break;
}
case ISD::FLT_ROUNDS_:
Results.push_back(DAG.getConstant(1, dl, Node->getValueType(0)));
Results.push_back(Node->getOperand(0));
break;
case ISD::EH_RETURN:
case ISD::EH_LABEL:
case ISD::PREFETCH:
case ISD::VAEND:
case ISD::EH_SJLJ_LONGJMP:
// If the target didn't expand these, there's nothing to do, so just
// preserve the chain and be done.
Results.push_back(Node->getOperand(0));
break;
case ISD::READCYCLECOUNTER:
// If the target didn't expand this, just return 'zero' and preserve the
// chain.
Results.append(Node->getNumValues() - 1,
DAG.getConstant(0, dl, Node->getValueType(0)));
Results.push_back(Node->getOperand(0));
break;
case ISD::EH_SJLJ_SETJMP:
// If the target didn't expand this, just return 'zero' and preserve the
// chain.
Results.push_back(DAG.getConstant(0, dl, MVT::i32));
Results.push_back(Node->getOperand(0));
break;
case ISD::ATOMIC_LOAD: {
// There is no libcall for atomic load; fake it with ATOMIC_CMP_SWAP.
SDValue Zero = DAG.getConstant(0, dl, Node->getValueType(0));
SDVTList VTs = DAG.getVTList(Node->getValueType(0), MVT::Other);
SDValue Swap = DAG.getAtomicCmpSwap(
ISD::ATOMIC_CMP_SWAP, dl, cast<AtomicSDNode>(Node)->getMemoryVT(), VTs,
Node->getOperand(0), Node->getOperand(1), Zero, Zero,
cast<AtomicSDNode>(Node)->getMemOperand());
Results.push_back(Swap.getValue(0));
Results.push_back(Swap.getValue(1));
break;
}
case ISD::ATOMIC_STORE: {
// There is no libcall for atomic store; fake it with ATOMIC_SWAP.
SDValue Swap = DAG.getAtomic(ISD::ATOMIC_SWAP, dl,
cast<AtomicSDNode>(Node)->getMemoryVT(),
Node->getOperand(0),
Node->getOperand(1), Node->getOperand(2),
cast<AtomicSDNode>(Node)->getMemOperand());
Results.push_back(Swap.getValue(1));
break;
}
case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS: {
// Expanding an ATOMIC_CMP_SWAP_WITH_SUCCESS produces an ATOMIC_CMP_SWAP and
// splits out the success value as a comparison. Expanding the resulting
// ATOMIC_CMP_SWAP will produce a libcall.
SDVTList VTs = DAG.getVTList(Node->getValueType(0), MVT::Other);
SDValue Res = DAG.getAtomicCmpSwap(
ISD::ATOMIC_CMP_SWAP, dl, cast<AtomicSDNode>(Node)->getMemoryVT(), VTs,
Node->getOperand(0), Node->getOperand(1), Node->getOperand(2),
Node->getOperand(3), cast<MemSDNode>(Node)->getMemOperand());
SDValue ExtRes = Res;
SDValue LHS = Res;
SDValue RHS = Node->getOperand(1);
EVT AtomicType = cast<AtomicSDNode>(Node)->getMemoryVT();
EVT OuterType = Node->getValueType(0);
switch (TLI.getExtendForAtomicOps()) {
case ISD::SIGN_EXTEND:
LHS = DAG.getNode(ISD::AssertSext, dl, OuterType, Res,
DAG.getValueType(AtomicType));
RHS = DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, OuterType,
Node->getOperand(2), DAG.getValueType(AtomicType));
ExtRes = LHS;
break;
case ISD::ZERO_EXTEND:
LHS = DAG.getNode(ISD::AssertZext, dl, OuterType, Res,
DAG.getValueType(AtomicType));
RHS = DAG.getZeroExtendInReg(Node->getOperand(2), dl, AtomicType);
ExtRes = LHS;
break;
case ISD::ANY_EXTEND:
LHS = DAG.getZeroExtendInReg(Res, dl, AtomicType);
RHS = DAG.getZeroExtendInReg(Node->getOperand(2), dl, AtomicType);
break;
default:
llvm_unreachable("Invalid atomic op extension");
}
SDValue Success =
DAG.getSetCC(dl, Node->getValueType(1), LHS, RHS, ISD::SETEQ);
Results.push_back(ExtRes.getValue(0));
Results.push_back(Success);
Results.push_back(Res.getValue(1));
break;
}
case ISD::DYNAMIC_STACKALLOC:
ExpandDYNAMIC_STACKALLOC(Node, Results);
break;
case ISD::MERGE_VALUES:
for (unsigned i = 0; i < Node->getNumValues(); i++)
Results.push_back(Node->getOperand(i));
break;
case ISD::UNDEF: {
EVT VT = Node->getValueType(0);
if (VT.isInteger())
Results.push_back(DAG.getConstant(0, dl, VT));
else {
assert(VT.isFloatingPoint() && "Unknown value type!");
Results.push_back(DAG.getConstantFP(0, dl, VT));
}
break;
}
case ISD::STRICT_FP_ROUND:
// When strict mode is enforced we can't do expansion because it
// does not honor the "strict" properties. Only libcall is allowed.
if (TLI.isStrictFPEnabled())
break;
// We might as well mutate to FP_ROUND when FP_ROUND operation is legal
// since this operation is more efficient than stack operation.
if (TLI.getStrictFPOperationAction(Node->getOpcode(),
Node->getValueType(0))
== TargetLowering::Legal)
break;
// We fall back to use stack operation when the FP_ROUND operation
// isn't available.
if ((Tmp1 = EmitStackConvert(Node->getOperand(1), Node->getValueType(0),
Node->getValueType(0), dl,
Node->getOperand(0)))) {
ReplaceNode(Node, Tmp1.getNode());
LLVM_DEBUG(dbgs() << "Successfully expanded STRICT_FP_ROUND node\n");
return true;
}
break;
case ISD::FP_ROUND:
case ISD::BITCAST:
if ((Tmp1 = EmitStackConvert(Node->getOperand(0), Node->getValueType(0),
Node->getValueType(0), dl)))
Results.push_back(Tmp1);
break;
case ISD::STRICT_FP_EXTEND:
// When strict mode is enforced we can't do expansion because it
// does not honor the "strict" properties. Only libcall is allowed.
if (TLI.isStrictFPEnabled())
break;
// We might as well mutate to FP_EXTEND when FP_EXTEND operation is legal
// since this operation is more efficient than stack operation.
if (TLI.getStrictFPOperationAction(Node->getOpcode(),
Node->getValueType(0))
== TargetLowering::Legal)
break;
// We fall back to use stack operation when the FP_EXTEND operation
// isn't available.
if ((Tmp1 = EmitStackConvert(
Node->getOperand(1), Node->getOperand(1).getValueType(),
Node->getValueType(0), dl, Node->getOperand(0)))) {
ReplaceNode(Node, Tmp1.getNode());
LLVM_DEBUG(dbgs() << "Successfully expanded STRICT_FP_EXTEND node\n");
return true;
}
break;
case ISD::FP_EXTEND:
if ((Tmp1 = EmitStackConvert(Node->getOperand(0),
Node->getOperand(0).getValueType(),
Node->getValueType(0), dl)))
Results.push_back(Tmp1);
break;
case ISD::SIGN_EXTEND_INREG: {
EVT ExtraVT = cast<VTSDNode>(Node->getOperand(1))->getVT();
EVT VT = Node->getValueType(0);
// An in-register sign-extend of a boolean is a negation:
// 'true' (1) sign-extended is -1.
// 'false' (0) sign-extended is 0.
// However, we must mask the high bits of the source operand because the
// SIGN_EXTEND_INREG does not guarantee that the high bits are already zero.
// TODO: Do this for vectors too?
if (ExtraVT.getSizeInBits() == 1) {
SDValue One = DAG.getConstant(1, dl, VT);
SDValue And = DAG.getNode(ISD::AND, dl, VT, Node->getOperand(0), One);
SDValue Zero = DAG.getConstant(0, dl, VT);
SDValue Neg = DAG.getNode(ISD::SUB, dl, VT, Zero, And);
Results.push_back(Neg);
break;
}
// NOTE: we could fall back on load/store here too for targets without
// SRA. However, it is doubtful that any exist.
EVT ShiftAmountTy = TLI.getShiftAmountTy(VT, DAG.getDataLayout());
unsigned BitsDiff = VT.getScalarSizeInBits() -
ExtraVT.getScalarSizeInBits();
SDValue ShiftCst = DAG.getConstant(BitsDiff, dl, ShiftAmountTy);
Tmp1 = DAG.getNode(ISD::SHL, dl, Node->getValueType(0),
Node->getOperand(0), ShiftCst);
Tmp1 = DAG.getNode(ISD::SRA, dl, Node->getValueType(0), Tmp1, ShiftCst);
Results.push_back(Tmp1);
break;
}
case ISD::UINT_TO_FP:
case ISD::STRICT_UINT_TO_FP:
if (TLI.expandUINT_TO_FP(Node, Tmp1, Tmp2, DAG)) {
Results.push_back(Tmp1);
if (Node->isStrictFPOpcode())
Results.push_back(Tmp2);
break;
}
LLVM_FALLTHROUGH;
case ISD::SINT_TO_FP:
case ISD::STRICT_SINT_TO_FP:
if ((Tmp1 = ExpandLegalINT_TO_FP(Node, Tmp2))) {
Results.push_back(Tmp1);
if (Node->isStrictFPOpcode())
Results.push_back(Tmp2);
}
break;
case ISD::FP_TO_SINT:
if (TLI.expandFP_TO_SINT(Node, Tmp1, DAG))
Results.push_back(Tmp1);
break;
case ISD::STRICT_FP_TO_SINT:
if (TLI.expandFP_TO_SINT(Node, Tmp1, DAG)) {
ReplaceNode(Node, Tmp1.getNode());
LLVM_DEBUG(dbgs() << "Successfully expanded STRICT_FP_TO_SINT node\n");
return true;
}
break;
case ISD::FP_TO_UINT:
if (TLI.expandFP_TO_UINT(Node, Tmp1, Tmp2, DAG))
Results.push_back(Tmp1);
break;
case ISD::STRICT_FP_TO_UINT:
if (TLI.expandFP_TO_UINT(Node, Tmp1, Tmp2, DAG)) {
// Relink the chain.
DAG.ReplaceAllUsesOfValueWith(SDValue(Node,1), Tmp2);
// Replace the new UINT result.
ReplaceNodeWithValue(SDValue(Node, 0), Tmp1);
LLVM_DEBUG(dbgs() << "Successfully expanded STRICT_FP_TO_UINT node\n");
return true;
}
break;
case ISD::FP_TO_SINT_SAT:
case ISD::FP_TO_UINT_SAT:
Results.push_back(TLI.expandFP_TO_INT_SAT(Node, DAG));
break;
case ISD::VAARG:
Results.push_back(DAG.expandVAArg(Node));
Results.push_back(Results[0].getValue(1));
break;
case ISD::VACOPY:
Results.push_back(DAG.expandVACopy(Node));
break;
case ISD::EXTRACT_VECTOR_ELT:
if (Node->getOperand(0).getValueType().getVectorNumElements() == 1)
// This must be an access of the only element. Return it.
Tmp1 = DAG.getNode(ISD::BITCAST, dl, Node->getValueType(0),
Node->getOperand(0));
else
Tmp1 = ExpandExtractFromVectorThroughStack(SDValue(Node, 0));
Results.push_back(Tmp1);
break;
case ISD::EXTRACT_SUBVECTOR:
Results.push_back(ExpandExtractFromVectorThroughStack(SDValue(Node, 0)));
break;
case ISD::INSERT_SUBVECTOR:
Results.push_back(ExpandInsertToVectorThroughStack(SDValue(Node, 0)));
break;
case ISD::CONCAT_VECTORS:
Results.push_back(ExpandVectorBuildThroughStack(Node));
break;
case ISD::SCALAR_TO_VECTOR:
Results.push_back(ExpandSCALAR_TO_VECTOR(Node));
break;
case ISD::INSERT_VECTOR_ELT:
Results.push_back(ExpandINSERT_VECTOR_ELT(Node->getOperand(0),
Node->getOperand(1),
Node->getOperand(2), dl));
break;
case ISD::VECTOR_SHUFFLE: {
SmallVector<int, 32> NewMask;
ArrayRef<int> Mask = cast<ShuffleVectorSDNode>(Node)->getMask();
EVT VT = Node->getValueType(0);
EVT EltVT = VT.getVectorElementType();
SDValue Op0 = Node->getOperand(0);
SDValue Op1 = Node->getOperand(1);
if (!TLI.isTypeLegal(EltVT)) {
EVT NewEltVT = TLI.getTypeToTransformTo(*DAG.getContext(), EltVT);
// BUILD_VECTOR operands are allowed to be wider than the element type.
// But if NewEltVT is smaller that EltVT the BUILD_VECTOR does not accept
// it.
if (NewEltVT.bitsLT(EltVT)) {
// Convert shuffle node.
// If original node was v4i64 and the new EltVT is i32,
// cast operands to v8i32 and re-build the mask.
// Calculate new VT, the size of the new VT should be equal to original.
EVT NewVT =
EVT::getVectorVT(*DAG.getContext(), NewEltVT,
VT.getSizeInBits() / NewEltVT.getSizeInBits());
assert(NewVT.bitsEq(VT));
// cast operands to new VT
Op0 = DAG.getNode(ISD::BITCAST, dl, NewVT, Op0);
Op1 = DAG.getNode(ISD::BITCAST, dl, NewVT, Op1);
// Convert the shuffle mask
unsigned int factor =
NewVT.getVectorNumElements()/VT.getVectorNumElements();
// EltVT gets smaller
assert(factor > 0);
for (unsigned i = 0; i < VT.getVectorNumElements(); ++i) {
if (Mask[i] < 0) {
for (unsigned fi = 0; fi < factor; ++fi)
NewMask.push_back(Mask[i]);
}
else {
for (unsigned fi = 0; fi < factor; ++fi)
NewMask.push_back(Mask[i]*factor+fi);
}
}
Mask = NewMask;
VT = NewVT;
}
EltVT = NewEltVT;
}
unsigned NumElems = VT.getVectorNumElements();
SmallVector<SDValue, 16> Ops;
for (unsigned i = 0; i != NumElems; ++i) {
if (Mask[i] < 0) {
Ops.push_back(DAG.getUNDEF(EltVT));
continue;
}
unsigned Idx = Mask[i];
if (Idx < NumElems)
Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0,
DAG.getVectorIdxConstant(Idx, dl)));
else
Ops.push_back(
DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op1,
DAG.getVectorIdxConstant(Idx - NumElems, dl)));
}
Tmp1 = DAG.getBuildVector(VT, dl, Ops);
// We may have changed the BUILD_VECTOR type. Cast it back to the Node type.
Tmp1 = DAG.getNode(ISD::BITCAST, dl, Node->getValueType(0), Tmp1);
Results.push_back(Tmp1);
break;
}
case ISD::VECTOR_SPLICE: {
Results.push_back(TLI.expandVectorSplice(Node, DAG));
break;
}
case ISD::EXTRACT_ELEMENT: {
EVT OpTy = Node->getOperand(0).getValueType();
if (cast<ConstantSDNode>(Node->getOperand(1))->getZExtValue()) {
// 1 -> Hi
Tmp1 = DAG.getNode(ISD::SRL, dl, OpTy, Node->getOperand(0),
DAG.getConstant(OpTy.getSizeInBits() / 2, dl,
TLI.getShiftAmountTy(
Node->getOperand(0).getValueType(),
DAG.getDataLayout())));
Tmp1 = DAG.getNode(ISD::TRUNCATE, dl, Node->getValueType(0), Tmp1);
} else {
// 0 -> Lo
Tmp1 = DAG.getNode(ISD::TRUNCATE, dl, Node->getValueType(0),
Node->getOperand(0));
}
Results.push_back(Tmp1);
break;
}
case ISD::STACKSAVE:
// Expand to CopyFromReg if the target set
// StackPointerRegisterToSaveRestore.
if (Register SP = TLI.getStackPointerRegisterToSaveRestore()) {
Results.push_back(DAG.getCopyFromReg(Node->getOperand(0), dl, SP,
Node->getValueType(0)));
Results.push_back(Results[0].getValue(1));
} else {
Results.push_back(DAG.getUNDEF(Node->getValueType(0)));
Results.push_back(Node->getOperand(0));
}
break;
case ISD::STACKRESTORE:
// Expand to CopyToReg if the target set
// StackPointerRegisterToSaveRestore.
if (Register SP = TLI.getStackPointerRegisterToSaveRestore()) {
Results.push_back(DAG.getCopyToReg(Node->getOperand(0), dl, SP,
Node->getOperand(1)));
} else {
Results.push_back(Node->getOperand(0));
}
break;
case ISD::GET_DYNAMIC_AREA_OFFSET:
Results.push_back(DAG.getConstant(0, dl, Node->getValueType(0)));
Results.push_back(Results[0].getValue(0));
break;
case ISD::FCOPYSIGN:
Results.push_back(ExpandFCOPYSIGN(Node));
break;
case ISD::FNEG:
Results.push_back(ExpandFNEG(Node));
break;
case ISD::FABS:
Results.push_back(ExpandFABS(Node));
break;
case ISD::SMIN:
case ISD::SMAX:
case ISD::UMIN:
case ISD::UMAX: {
// Expand Y = MAX(A, B) -> Y = (A > B) ? A : B
ISD::CondCode Pred;
switch (Node->getOpcode()) {
default: llvm_unreachable("How did we get here?");
case ISD::SMAX: Pred = ISD::SETGT; break;
case ISD::SMIN: Pred = ISD::SETLT; break;
case ISD::UMAX: Pred = ISD::SETUGT; break;
case ISD::UMIN: Pred = ISD::SETULT; break;
}
Tmp1 = Node->getOperand(0);
Tmp2 = Node->getOperand(1);
Tmp1 = DAG.getSelectCC(dl, Tmp1, Tmp2, Tmp1, Tmp2, Pred);
Results.push_back(Tmp1);
break;
}
case ISD::FMINNUM:
case ISD::FMAXNUM: {
if (SDValue Expanded = TLI.expandFMINNUM_FMAXNUM(Node, DAG))
Results.push_back(Expanded);
break;
}
case ISD::FSIN:
case ISD::FCOS: {
EVT VT = Node->getValueType(0);
// Turn fsin / fcos into ISD::FSINCOS node if there are a pair of fsin /
// fcos which share the same operand and both are used.
if ((TLI.isOperationLegalOrCustom(ISD::FSINCOS, VT) ||
isSinCosLibcallAvailable(Node, TLI))
&& useSinCos(Node)) {
SDVTList VTs = DAG.getVTList(VT, VT);
Tmp1 = DAG.getNode(ISD::FSINCOS, dl, VTs, Node->getOperand(0));
if (Node->getOpcode() == ISD::FCOS)
Tmp1 = Tmp1.getValue(1);
Results.push_back(Tmp1);
}
break;
}
case ISD::FMAD:
llvm_unreachable("Illegal fmad should never be formed");
case ISD::FP16_TO_FP:
if (Node->getValueType(0) != MVT::f32) {
// We can extend to types bigger than f32 in two steps without changing
// the result. Since "f16 -> f32" is much more commonly available, give
// CodeGen the option of emitting that before resorting to a libcall.
SDValue Res =
DAG.getNode(ISD::FP16_TO_FP, dl, MVT::f32, Node->getOperand(0));
Results.push_back(
DAG.getNode(ISD::FP_EXTEND, dl, Node->getValueType(0), Res));
}
break;
case ISD::STRICT_FP16_TO_FP:
if (Node->getValueType(0) != MVT::f32) {
// We can extend to types bigger than f32 in two steps without changing
// the result. Since "f16 -> f32" is much more commonly available, give
// CodeGen the option of emitting that before resorting to a libcall.
SDValue Res =
DAG.getNode(ISD::STRICT_FP16_TO_FP, dl, {MVT::f32, MVT::Other},
{Node->getOperand(0), Node->getOperand(1)});
Res = DAG.getNode(ISD::STRICT_FP_EXTEND, dl,
{Node->getValueType(0), MVT::Other},
{Res.getValue(1), Res});
Results.push_back(Res);
Results.push_back(Res.getValue(1));
}
break;
case ISD::FP_TO_FP16:
LLVM_DEBUG(dbgs() << "Legalizing FP_TO_FP16\n");
if (!TLI.useSoftFloat() && TM.Options.UnsafeFPMath) {
SDValue Op = Node->getOperand(0);
MVT SVT = Op.getSimpleValueType();
if ((SVT == MVT::f64 || SVT == MVT::f80) &&
TLI.isOperationLegalOrCustom(ISD::FP_TO_FP16, MVT::f32)) {
// Under fastmath, we can expand this node into a fround followed by
// a float-half conversion.
SDValue FloatVal = DAG.getNode(ISD::FP_ROUND, dl, MVT::f32, Op,
DAG.getIntPtrConstant(0, dl));
Results.push_back(
DAG.getNode(ISD::FP_TO_FP16, dl, Node->getValueType(0), FloatVal));
}
}
break;
case ISD::ConstantFP: {
ConstantFPSDNode *CFP = cast<ConstantFPSDNode>(Node);
// Check to see if this FP immediate is already legal.
// If this is a legal constant, turn it into a TargetConstantFP node.
if (!TLI.isFPImmLegal(CFP->getValueAPF(), Node->getValueType(0),
DAG.shouldOptForSize()))
Results.push_back(ExpandConstantFP(CFP, true));
break;
}
case ISD::Constant: {
ConstantSDNode *CP = cast<ConstantSDNode>(Node);
Results.push_back(ExpandConstant(CP));
break;
}
case ISD::FSUB: {
EVT VT = Node->getValueType(0);
if (TLI.isOperationLegalOrCustom(ISD::FADD, VT) &&
TLI.isOperationLegalOrCustom(ISD::FNEG, VT)) {
const SDNodeFlags Flags = Node->getFlags();
Tmp1 = DAG.getNode(ISD::FNEG, dl, VT, Node->getOperand(1));
Tmp1 = DAG.getNode(ISD::FADD, dl, VT, Node->getOperand(0), Tmp1, Flags);
Results.push_back(Tmp1);
}
break;
}
case ISD::SUB: {
EVT VT = Node->getValueType(0);
assert(TLI.isOperationLegalOrCustom(ISD::ADD, VT) &&
TLI.isOperationLegalOrCustom(ISD::XOR, VT) &&
"Don't know how to expand this subtraction!");
Tmp1 = DAG.getNOT(dl, Node->getOperand(1), VT);
Tmp1 = DAG.getNode(ISD::ADD, dl, VT, Tmp1, DAG.getConstant(1, dl, VT));
Results.push_back(DAG.getNode(ISD::ADD, dl, VT, Node->getOperand(0), Tmp1));
break;
}
case ISD::UREM:
case ISD::SREM:
if (TLI.expandREM(Node, Tmp1, DAG))
Results.push_back(Tmp1);
break;
case ISD::UDIV:
case ISD::SDIV: {
bool isSigned = Node->getOpcode() == ISD::SDIV;
unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM;
EVT VT = Node->getValueType(0);
if (TLI.isOperationLegalOrCustom(DivRemOpc, VT)) {
SDVTList VTs = DAG.getVTList(VT, VT);
Tmp1 = DAG.getNode(DivRemOpc, dl, VTs, Node->getOperand(0),
Node->getOperand(1));
Results.push_back(Tmp1);
}
break;
}
case ISD::MULHU:
case ISD::MULHS: {
unsigned ExpandOpcode =
Node->getOpcode() == ISD::MULHU ? ISD::UMUL_LOHI : ISD::SMUL_LOHI;
EVT VT = Node->getValueType(0);
SDVTList VTs = DAG.getVTList(VT, VT);
Tmp1 = DAG.getNode(ExpandOpcode, dl, VTs, Node->getOperand(0),
Node->getOperand(1));
Results.push_back(Tmp1.getValue(1));
break;
}
case ISD::UMUL_LOHI:
case ISD::SMUL_LOHI: {
SDValue LHS = Node->getOperand(0);
SDValue RHS = Node->getOperand(1);
MVT VT = LHS.getSimpleValueType();
unsigned MULHOpcode =
Node->getOpcode() == ISD::UMUL_LOHI ? ISD::MULHU : ISD::MULHS;
if (TLI.isOperationLegalOrCustom(MULHOpcode, VT)) {
Results.push_back(DAG.getNode(ISD::MUL, dl, VT, LHS, RHS));
Results.push_back(DAG.getNode(MULHOpcode, dl, VT, LHS, RHS));
break;
}
SmallVector<SDValue, 4> Halves;
EVT HalfType = EVT(VT).getHalfSizedIntegerVT(*DAG.getContext());
assert(TLI.isTypeLegal(HalfType));
if (TLI.expandMUL_LOHI(Node->getOpcode(), VT, dl, LHS, RHS, Halves,
HalfType, DAG,
TargetLowering::MulExpansionKind::Always)) {
for (unsigned i = 0; i < 2; ++i) {
SDValue Lo = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Halves[2 * i]);
SDValue Hi = DAG.getNode(ISD::ANY_EXTEND, dl, VT, Halves[2 * i + 1]);
SDValue Shift = DAG.getConstant(
HalfType.getScalarSizeInBits(), dl,
TLI.getShiftAmountTy(HalfType, DAG.getDataLayout()));
Hi = DAG.getNode(ISD::SHL, dl, VT, Hi, Shift);
Results.push_back(DAG.getNode(ISD::OR, dl, VT, Lo, Hi));
}
break;
}
break;
}
case ISD::MUL: {
EVT VT = Node->getValueType(0);
SDVTList VTs = DAG.getVTList(VT, VT);
// See if multiply or divide can be lowered using two-result operations.
// We just need the low half of the multiply; try both the signed
// and unsigned forms. If the target supports both SMUL_LOHI and
// UMUL_LOHI, form a preference by checking which forms of plain
// MULH it supports.
bool HasSMUL_LOHI = TLI.isOperationLegalOrCustom(ISD::SMUL_LOHI, VT);
bool HasUMUL_LOHI = TLI.isOperationLegalOrCustom(ISD::UMUL_LOHI, VT);
bool HasMULHS = TLI.isOperationLegalOrCustom(ISD::MULHS, VT);
bool HasMULHU = TLI.isOperationLegalOrCustom(ISD::MULHU, VT);
unsigned OpToUse = 0;
if (HasSMUL_LOHI && !HasMULHS) {
OpToUse = ISD::SMUL_LOHI;
} else if (HasUMUL_LOHI && !HasMULHU) {
OpToUse = ISD::UMUL_LOHI;
} else if (HasSMUL_LOHI) {
OpToUse = ISD::SMUL_LOHI;
} else if (HasUMUL_LOHI) {
OpToUse = ISD::UMUL_LOHI;
}
if (OpToUse) {
Results.push_back(DAG.getNode(OpToUse, dl, VTs, Node->getOperand(0),
Node->getOperand(1)));
break;
}
SDValue Lo, Hi;
EVT HalfType = VT.getHalfSizedIntegerVT(*DAG.getContext());
if (TLI.isOperationLegalOrCustom(ISD::ZERO_EXTEND, VT) &&
TLI.isOperationLegalOrCustom(ISD::ANY_EXTEND, VT) &&
TLI.isOperationLegalOrCustom(ISD::SHL, VT) &&
TLI.isOperationLegalOrCustom(ISD::OR, VT) &&
TLI.expandMUL(Node, Lo, Hi, HalfType, DAG,
TargetLowering::MulExpansionKind::OnlyLegalOrCustom)) {
Lo = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Lo);
Hi = DAG.getNode(ISD::ANY_EXTEND, dl, VT, Hi);
SDValue Shift =
DAG.getConstant(HalfType.getSizeInBits(), dl,
TLI.getShiftAmountTy(HalfType, DAG.getDataLayout()));
Hi = DAG.getNode(ISD::SHL, dl, VT, Hi, Shift);
Results.push_back(DAG.getNode(ISD::OR, dl, VT, Lo, Hi));
}
break;
}
case ISD::FSHL:
case ISD::FSHR:
if (TLI.expandFunnelShift(Node, Tmp1, DAG))
Results.push_back(Tmp1);
break;
case ISD::ROTL:
case ISD::ROTR:
if (TLI.expandROT(Node, true /*AllowVectorOps*/, Tmp1, DAG))
Results.push_back(Tmp1);
break;
case ISD::SADDSAT:
case ISD::UADDSAT:
case ISD::SSUBSAT:
case ISD::USUBSAT:
Results.push_back(TLI.expandAddSubSat(Node, DAG));
break;
case ISD::SSHLSAT:
case ISD::USHLSAT:
Results.push_back(TLI.expandShlSat(Node, DAG));
break;
case ISD::SMULFIX:
case ISD::SMULFIXSAT:
case ISD::UMULFIX:
case ISD::UMULFIXSAT:
Results.push_back(TLI.expandFixedPointMul(Node, DAG));
break;
case ISD::SDIVFIX:
case ISD::SDIVFIXSAT:
case ISD::UDIVFIX:
case ISD::UDIVFIXSAT:
if (SDValue V = TLI.expandFixedPointDiv(Node->getOpcode(), SDLoc(Node),
Node->getOperand(0),
Node->getOperand(1),
Node->getConstantOperandVal(2),
DAG)) {
Results.push_back(V);
break;
}
// FIXME: We might want to retry here with a wider type if we fail, if that
// type is legal.
// FIXME: Technically, so long as we only have sdivfixes where BW+Scale is
// <= 128 (which is the case for all of the default Embedded-C types),
// we will only get here with types and scales that we could always expand
// if we were allowed to generate libcalls to division functions of illegal
// type. But we cannot do that.
llvm_unreachable("Cannot expand DIVFIX!");
case ISD::ADDCARRY:
case ISD::SUBCARRY: {
SDValue LHS = Node->getOperand(0);
SDValue RHS = Node->getOperand(1);
SDValue Carry = Node->getOperand(2);
bool IsAdd = Node->getOpcode() == ISD::ADDCARRY;
// Initial add of the 2 operands.
unsigned Op = IsAdd ? ISD::ADD : ISD::SUB;
EVT VT = LHS.getValueType();
SDValue Sum = DAG.getNode(Op, dl, VT, LHS, RHS);
// Initial check for overflow.
EVT CarryType = Node->getValueType(1);
EVT SetCCType = getSetCCResultType(Node->getValueType(0));
ISD::CondCode CC = IsAdd ? ISD::SETULT : ISD::SETUGT;
SDValue Overflow = DAG.getSetCC(dl, SetCCType, Sum, LHS, CC);
// Add of the sum and the carry.
SDValue One = DAG.getConstant(1, dl, VT);
SDValue CarryExt =
DAG.getNode(ISD::AND, dl, VT, DAG.getZExtOrTrunc(Carry, dl, VT), One);
SDValue Sum2 = DAG.getNode(Op, dl, VT, Sum, CarryExt);
// Second check for overflow. If we are adding, we can only overflow if the
// initial sum is all 1s ang the carry is set, resulting in a new sum of 0.
// If we are subtracting, we can only overflow if the initial sum is 0 and
// the carry is set, resulting in a new sum of all 1s.
SDValue Zero = DAG.getConstant(0, dl, VT);
SDValue Overflow2 =
IsAdd ? DAG.getSetCC(dl, SetCCType, Sum2, Zero, ISD::SETEQ)
: DAG.getSetCC(dl, SetCCType, Sum, Zero, ISD::SETEQ);
Overflow2 = DAG.getNode(ISD::AND, dl, SetCCType, Overflow2,
DAG.getZExtOrTrunc(Carry, dl, SetCCType));
SDValue ResultCarry =
DAG.getNode(ISD::OR, dl, SetCCType, Overflow, Overflow2);
Results.push_back(Sum2);
Results.push_back(DAG.getBoolExtOrTrunc(ResultCarry, dl, CarryType, VT));
break;
}
case ISD::SADDO:
case ISD::SSUBO: {
SDValue Result, Overflow;
TLI.expandSADDSUBO(Node, Result, Overflow, DAG);
Results.push_back(Result);
Results.push_back(Overflow);
break;
}
case ISD::UADDO:
case ISD::USUBO: {
SDValue Result, Overflow;
TLI.expandUADDSUBO(Node, Result, Overflow, DAG);
Results.push_back(Result);
Results.push_back(Overflow);
break;
}
case ISD::UMULO:
case ISD::SMULO: {
SDValue Result, Overflow;
if (TLI.expandMULO(Node, Result, Overflow, DAG)) {
Results.push_back(Result);
Results.push_back(Overflow);
}
break;
}
case ISD::BUILD_PAIR: {
EVT PairTy = Node->getValueType(0);
Tmp1 = DAG.getNode(ISD::ZERO_EXTEND, dl, PairTy, Node->getOperand(0));
Tmp2 = DAG.getNode(ISD::ANY_EXTEND, dl, PairTy, Node->getOperand(1));
Tmp2 = DAG.getNode(
ISD::SHL, dl, PairTy, Tmp2,
DAG.getConstant(PairTy.getSizeInBits() / 2, dl,
TLI.getShiftAmountTy(PairTy, DAG.getDataLayout())));
Results.push_back(DAG.getNode(ISD::OR, dl, PairTy, Tmp1, Tmp2));
break;
}
case ISD::SELECT:
Tmp1 = Node->getOperand(0);
Tmp2 = Node->getOperand(1);
Tmp3 = Node->getOperand(2);
if (Tmp1.getOpcode() == ISD::SETCC) {
Tmp1 = DAG.getSelectCC(dl, Tmp1.getOperand(0), Tmp1.getOperand(1),
Tmp2, Tmp3,
cast<CondCodeSDNode>(Tmp1.getOperand(2))->get());
} else {
Tmp1 = DAG.getSelectCC(dl, Tmp1,
DAG.getConstant(0, dl, Tmp1.getValueType()),
Tmp2, Tmp3, ISD::SETNE);
}
Tmp1->setFlags(Node->getFlags());
Results.push_back(Tmp1);
break;
case ISD::BR_JT: {
SDValue Chain = Node->getOperand(0);
SDValue Table = Node->getOperand(1);
SDValue Index = Node->getOperand(2);
const DataLayout &TD = DAG.getDataLayout();
EVT PTy = TLI.getPointerTy(TD);
unsigned EntrySize =
DAG.getMachineFunction().getJumpTableInfo()->getEntrySize(TD);
// For power-of-two jumptable entry sizes convert multiplication to a shift.
// This transformation needs to be done here since otherwise the MIPS
// backend will end up emitting a three instruction multiply sequence
// instead of a single shift and MSP430 will call a runtime function.
if (llvm::isPowerOf2_32(EntrySize))
Index = DAG.getNode(
ISD::SHL, dl, Index.getValueType(), Index,
DAG.getConstant(llvm::Log2_32(EntrySize), dl, Index.getValueType()));
else
Index = DAG.getNode(ISD::MUL, dl, Index.getValueType(), Index,
DAG.getConstant(EntrySize, dl, Index.getValueType()));
SDValue Addr = DAG.getNode(ISD::ADD, dl, Index.getValueType(),
Index, Table);
EVT MemVT = EVT::getIntegerVT(*DAG.getContext(), EntrySize * 8);
SDValue LD = DAG.getExtLoad(
ISD::SEXTLOAD, dl, PTy, Chain, Addr,
MachinePointerInfo::getJumpTable(DAG.getMachineFunction()), MemVT);
Addr = LD;
if (TLI.isJumpTableRelative()) {
// For PIC, the sequence is:
// BRIND(load(Jumptable + index) + RelocBase)
// RelocBase can be JumpTable, GOT or some sort of global base.
Addr = DAG.getNode(ISD::ADD, dl, PTy, Addr,
TLI.getPICJumpTableRelocBase(Table, DAG));
}
Tmp1 = TLI.expandIndirectJTBranch(dl, LD.getValue(1), Addr, DAG);
Results.push_back(Tmp1);
break;
}
case ISD::BRCOND:
// Expand brcond's setcc into its constituent parts and create a BR_CC
// Node.
Tmp1 = Node->getOperand(0);
Tmp2 = Node->getOperand(1);
if (Tmp2.getOpcode() == ISD::SETCC) {
Tmp1 = DAG.getNode(ISD::BR_CC, dl, MVT::Other,
Tmp1, Tmp2.getOperand(2),
Tmp2.getOperand(0), Tmp2.getOperand(1),
Node->getOperand(2));
} else {
// We test only the i1 bit. Skip the AND if UNDEF or another AND.
if (Tmp2.isUndef() ||
(Tmp2.getOpcode() == ISD::AND &&
isa<ConstantSDNode>(Tmp2.getOperand(1)) &&
cast<ConstantSDNode>(Tmp2.getOperand(1))->getZExtValue() == 1))
Tmp3 = Tmp2;
else
Tmp3 = DAG.getNode(ISD::AND, dl, Tmp2.getValueType(), Tmp2,
DAG.getConstant(1, dl, Tmp2.getValueType()));
Tmp1 = DAG.getNode(ISD::BR_CC, dl, MVT::Other, Tmp1,
DAG.getCondCode(ISD::SETNE), Tmp3,
DAG.getConstant(0, dl, Tmp3.getValueType()),
Node->getOperand(2));
}
Results.push_back(Tmp1);
break;
case ISD::SETCC:
case ISD::STRICT_FSETCC:
case ISD::STRICT_FSETCCS: {
bool IsStrict = Node->getOpcode() != ISD::SETCC;
bool IsSignaling = Node->getOpcode() == ISD::STRICT_FSETCCS;
SDValue Chain = IsStrict ? Node->getOperand(0) : SDValue();
unsigned Offset = IsStrict ? 1 : 0;
Tmp1 = Node->getOperand(0 + Offset);
Tmp2 = Node->getOperand(1 + Offset);
Tmp3 = Node->getOperand(2 + Offset);
bool Legalized =
TLI.LegalizeSetCCCondCode(DAG, Node->getValueType(0), Tmp1, Tmp2, Tmp3,
NeedInvert, dl, Chain, IsSignaling);
if (Legalized) {
// If we expanded the SETCC by swapping LHS and RHS, or by inverting the
// condition code, create a new SETCC node.
if (Tmp3.getNode())
Tmp1 = DAG.getNode(ISD::SETCC, dl, Node->getValueType(0),
Tmp1, Tmp2, Tmp3, Node->getFlags());
// If we expanded the SETCC by inverting the condition code, then wrap
// the existing SETCC in a NOT to restore the intended condition.
if (NeedInvert)
Tmp1 = DAG.getLogicalNOT(dl, Tmp1, Tmp1->getValueType(0));
Results.push_back(Tmp1);
if (IsStrict)
Results.push_back(Chain);
break;
}
// FIXME: It seems Legalized is false iff CCCode is Legal. I don't
// understand if this code is useful for strict nodes.
assert(!IsStrict && "Don't know how to expand for strict nodes.");
// Otherwise, SETCC for the given comparison type must be completely
// illegal; expand it into a SELECT_CC.
EVT VT = Node->getValueType(0);
int TrueValue;
switch (TLI.getBooleanContents(Tmp1.getValueType())) {
case TargetLowering::ZeroOrOneBooleanContent:
case TargetLowering::UndefinedBooleanContent:
TrueValue = 1;
break;
case TargetLowering::ZeroOrNegativeOneBooleanContent:
TrueValue = -1;
break;
}
Tmp1 = DAG.getNode(ISD::SELECT_CC, dl, VT, Tmp1, Tmp2,
DAG.getConstant(TrueValue, dl, VT),
DAG.getConstant(0, dl, VT),
Tmp3);
Tmp1->setFlags(Node->getFlags());
Results.push_back(Tmp1);
break;
}
case ISD::SELECT_CC: {
// TODO: need to add STRICT_SELECT_CC and STRICT_SELECT_CCS
Tmp1 = Node->getOperand(0); // LHS
Tmp2 = Node->getOperand(1); // RHS
Tmp3 = Node->getOperand(2); // True
Tmp4 = Node->getOperand(3); // False
EVT VT = Node->getValueType(0);
SDValue Chain;
SDValue CC = Node->getOperand(4);
ISD::CondCode CCOp = cast<CondCodeSDNode>(CC)->get();
if (TLI.isCondCodeLegalOrCustom(CCOp, Tmp1.getSimpleValueType())) {
// If the condition code is legal, then we need to expand this
// node using SETCC and SELECT.
EVT CmpVT = Tmp1.getValueType();
assert(!TLI.isOperationExpand(ISD::SELECT, VT) &&
"Cannot expand ISD::SELECT_CC when ISD::SELECT also needs to be "
"expanded.");
EVT CCVT = getSetCCResultType(CmpVT);
SDValue Cond = DAG.getNode(ISD::SETCC, dl, CCVT, Tmp1, Tmp2, CC, Node->getFlags());
Results.push_back(DAG.getSelect(dl, VT, Cond, Tmp3, Tmp4));
break;
}
// SELECT_CC is legal, so the condition code must not be.
bool Legalized = false;
// Try to legalize by inverting the condition. This is for targets that
// might support an ordered version of a condition, but not the unordered
// version (or vice versa).
ISD::CondCode InvCC = ISD::getSetCCInverse(CCOp, Tmp1.getValueType());
if (TLI.isCondCodeLegalOrCustom(InvCC, Tmp1.getSimpleValueType())) {
// Use the new condition code and swap true and false
Legalized = true;
Tmp1 = DAG.getSelectCC(dl, Tmp1, Tmp2, Tmp4, Tmp3, InvCC);
Tmp1->setFlags(Node->getFlags());
} else {
// If The inverse is not legal, then try to swap the arguments using
// the inverse condition code.
ISD::CondCode SwapInvCC = ISD::getSetCCSwappedOperands(InvCC);
if (TLI.isCondCodeLegalOrCustom(SwapInvCC, Tmp1.getSimpleValueType())) {
// The swapped inverse condition is legal, so swap true and false,
// lhs and rhs.
Legalized = true;
Tmp1 = DAG.getSelectCC(dl, Tmp2, Tmp1, Tmp4, Tmp3, SwapInvCC);
Tmp1->setFlags(Node->getFlags());
}
}
if (!Legalized) {
Legalized = TLI.LegalizeSetCCCondCode(
DAG, getSetCCResultType(Tmp1.getValueType()), Tmp1, Tmp2, CC,
NeedInvert, dl, Chain);
assert(Legalized && "Can't legalize SELECT_CC with legal condition!");
// If we expanded the SETCC by inverting the condition code, then swap
// the True/False operands to match.
if (NeedInvert)
std::swap(Tmp3, Tmp4);
// If we expanded the SETCC by swapping LHS and RHS, or by inverting the
// condition code, create a new SELECT_CC node.
if (CC.getNode()) {
Tmp1 = DAG.getNode(ISD::SELECT_CC, dl, Node->getValueType(0),
Tmp1, Tmp2, Tmp3, Tmp4, CC);
} else {
Tmp2 = DAG.getConstant(0, dl, Tmp1.getValueType());
CC = DAG.getCondCode(ISD::SETNE);
Tmp1 = DAG.getNode(ISD::SELECT_CC, dl, Node->getValueType(0), Tmp1,
Tmp2, Tmp3, Tmp4, CC);
}
Tmp1->setFlags(Node->getFlags());
}
Results.push_back(Tmp1);
break;
}
case ISD::BR_CC: {
// TODO: need to add STRICT_BR_CC and STRICT_BR_CCS
SDValue Chain;
Tmp1 = Node->getOperand(0); // Chain
Tmp2 = Node->getOperand(2); // LHS
Tmp3 = Node->getOperand(3); // RHS
Tmp4 = Node->getOperand(1); // CC
bool Legalized =
TLI.LegalizeSetCCCondCode(DAG, getSetCCResultType(Tmp2.getValueType()),
Tmp2, Tmp3, Tmp4, NeedInvert, dl, Chain);
(void)Legalized;
assert(Legalized && "Can't legalize BR_CC with legal condition!");
// If we expanded the SETCC by swapping LHS and RHS, create a new BR_CC
// node.
if (Tmp4.getNode()) {
assert(!NeedInvert && "Don't know how to invert BR_CC!");
Tmp1 = DAG.getNode(ISD::BR_CC, dl, Node->getValueType(0), Tmp1,
Tmp4, Tmp2, Tmp3, Node->getOperand(4));
} else {
Tmp3 = DAG.getConstant(0, dl, Tmp2.getValueType());
Tmp4 = DAG.getCondCode(NeedInvert ? ISD::SETEQ : ISD::SETNE);
Tmp1 = DAG.getNode(ISD::BR_CC, dl, Node->getValueType(0), Tmp1, Tmp4,
Tmp2, Tmp3, Node->getOperand(4));
}
Results.push_back(Tmp1);
break;
}
case ISD::BUILD_VECTOR:
Results.push_back(ExpandBUILD_VECTOR(Node));
break;
case ISD::SPLAT_VECTOR:
Results.push_back(ExpandSPLAT_VECTOR(Node));
break;
case ISD::SRA:
case ISD::SRL:
case ISD::SHL: {
// Scalarize vector SRA/SRL/SHL.
EVT VT = Node->getValueType(0);
assert(VT.isVector() && "Unable to legalize non-vector shift");
assert(TLI.isTypeLegal(VT.getScalarType())&& "Element type must be legal");
unsigned NumElem = VT.getVectorNumElements();
SmallVector<SDValue, 8> Scalars;
for (unsigned Idx = 0; Idx < NumElem; Idx++) {
SDValue Ex =
DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, VT.getScalarType(),
Node->getOperand(0), DAG.getVectorIdxConstant(Idx, dl));
SDValue Sh =
DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, VT.getScalarType(),
Node->getOperand(1), DAG.getVectorIdxConstant(Idx, dl));
Scalars.push_back(DAG.getNode(Node->getOpcode(), dl,
VT.getScalarType(), Ex, Sh));
}
SDValue Result = DAG.getBuildVector(Node->getValueType(0), dl, Scalars);
Results.push_back(Result);
break;
}
case ISD::VECREDUCE_FADD:
case ISD::VECREDUCE_FMUL:
case ISD::VECREDUCE_ADD:
case ISD::VECREDUCE_MUL:
case ISD::VECREDUCE_AND:
case ISD::VECREDUCE_OR:
case ISD::VECREDUCE_XOR:
case ISD::VECREDUCE_SMAX:
case ISD::VECREDUCE_SMIN:
case ISD::VECREDUCE_UMAX:
case ISD::VECREDUCE_UMIN:
case ISD::VECREDUCE_FMAX:
case ISD::VECREDUCE_FMIN:
Results.push_back(TLI.expandVecReduce(Node, DAG));
break;
case ISD::GLOBAL_OFFSET_TABLE:
case ISD::GlobalAddress:
case ISD::GlobalTLSAddress:
case ISD::ExternalSymbol:
case ISD::ConstantPool:
case ISD::JumpTable:
case ISD::INTRINSIC_W_CHAIN:
case ISD::INTRINSIC_WO_CHAIN:
case ISD::INTRINSIC_VOID:
// FIXME: Custom lowering for these operations shouldn't return null!
// Return true so that we don't call ConvertNodeToLibcall which also won't
// do anything.
return true;
}
if (!TLI.isStrictFPEnabled() && Results.empty() && Node->isStrictFPOpcode()) {
// FIXME: We were asked to expand a strict floating-point operation,
// but there is currently no expansion implemented that would preserve
// the "strict" properties. For now, we just fall back to the non-strict
// version if that is legal on the target. The actual mutation of the
// operation will happen in SelectionDAGISel::DoInstructionSelection.
switch (Node->getOpcode()) {
default:
if (TLI.getStrictFPOperationAction(Node->getOpcode(),
Node->getValueType(0))
== TargetLowering::Legal)
return true;
break;
case ISD::STRICT_FSUB: {
if (TLI.getStrictFPOperationAction(
ISD::STRICT_FSUB, Node->getValueType(0)) == TargetLowering::Legal)
return true;
if (TLI.getStrictFPOperationAction(
ISD::STRICT_FADD, Node->getValueType(0)) != TargetLowering::Legal)
break;
EVT VT = Node->getValueType(0);
const SDNodeFlags Flags = Node->getFlags();
SDValue Neg = DAG.getNode(ISD::FNEG, dl, VT, Node->getOperand(2), Flags);
SDValue Fadd = DAG.getNode(ISD::STRICT_FADD, dl, Node->getVTList(),
{Node->getOperand(0), Node->getOperand(1), Neg},
Flags);
Results.push_back(Fadd);
Results.push_back(Fadd.getValue(1));
break;
}
case ISD::STRICT_SINT_TO_FP:
case ISD::STRICT_UINT_TO_FP:
case ISD::STRICT_LRINT:
case ISD::STRICT_LLRINT:
case ISD::STRICT_LROUND:
case ISD::STRICT_LLROUND:
// These are registered by the operand type instead of the value
// type. Reflect that here.
if (TLI.getStrictFPOperationAction(Node->getOpcode(),
Node->getOperand(1).getValueType())
== TargetLowering::Legal)
return true;
break;
}
}
// Replace the original node with the legalized result.
if (Results.empty()) {
LLVM_DEBUG(dbgs() << "Cannot expand node\n");
return false;
}
LLVM_DEBUG(dbgs() << "Successfully expanded node\n");
ReplaceNode(Node, Results.data());
return true;
}
void SelectionDAGLegalize::ConvertNodeToLibcall(SDNode *Node) {
LLVM_DEBUG(dbgs() << "Trying to convert node to libcall\n");
SmallVector<SDValue, 8> Results;
SDLoc dl(Node);
// FIXME: Check flags on the node to see if we can use a finite call.
unsigned Opc = Node->getOpcode();
switch (Opc) {
case ISD::ATOMIC_FENCE: {
// If the target didn't lower this, lower it to '__sync_synchronize()' call
// FIXME: handle "fence singlethread" more efficiently.
TargetLowering::ArgListTy Args;
TargetLowering::CallLoweringInfo CLI(DAG);
CLI.setDebugLoc(dl)
.setChain(Node->getOperand(0))
.setLibCallee(
CallingConv::C, Type::getVoidTy(*DAG.getContext()),
DAG.getExternalSymbol("__sync_synchronize",
TLI.getPointerTy(DAG.getDataLayout())),
std::move(Args));
std::pair<SDValue, SDValue> CallResult = TLI.LowerCallTo(CLI);
Results.push_back(CallResult.second);
break;
}
// By default, atomic intrinsics are marked Legal and lowered. Targets
// which don't support them directly, however, may want libcalls, in which
// case they mark them Expand, and we get here.
case ISD::ATOMIC_SWAP:
case ISD::ATOMIC_LOAD_ADD:
case ISD::ATOMIC_LOAD_SUB:
case ISD::ATOMIC_LOAD_AND:
case ISD::ATOMIC_LOAD_CLR:
case ISD::ATOMIC_LOAD_OR:
case ISD::ATOMIC_LOAD_XOR:
case ISD::ATOMIC_LOAD_NAND:
case ISD::ATOMIC_LOAD_MIN:
case ISD::ATOMIC_LOAD_MAX:
case ISD::ATOMIC_LOAD_UMIN:
case ISD::ATOMIC_LOAD_UMAX:
case ISD::ATOMIC_CMP_SWAP: {
MVT VT = cast<AtomicSDNode>(Node)->getMemoryVT().getSimpleVT();
AtomicOrdering Order = cast<AtomicSDNode>(Node)->getMergedOrdering();
RTLIB::Libcall LC = RTLIB::getOUTLINE_ATOMIC(Opc, Order, VT);
EVT RetVT = Node->getValueType(0);
TargetLowering::MakeLibCallOptions CallOptions;
SmallVector<SDValue, 4> Ops;
if (TLI.getLibcallName(LC)) {
// If outline atomic available, prepare its arguments and expand.
Ops.append(Node->op_begin() + 2, Node->op_end());
Ops.push_back(Node->getOperand(1));
} else {
LC = RTLIB::getSYNC(Opc, VT);
assert(LC != RTLIB::UNKNOWN_LIBCALL &&
"Unexpected atomic op or value type!");
// Arguments for expansion to sync libcall
Ops.append(Node->op_begin() + 1, Node->op_end());
}
std::pair<SDValue, SDValue> Tmp = TLI.makeLibCall(DAG, LC, RetVT,
Ops, CallOptions,
SDLoc(Node),
Node->getOperand(0));
Results.push_back(Tmp.first);
Results.push_back(Tmp.second);
break;
}
case ISD::TRAP: {
// If this operation is not supported, lower it to 'abort()' call
TargetLowering::ArgListTy Args;
TargetLowering::CallLoweringInfo CLI(DAG);
CLI.setDebugLoc(dl)
.setChain(Node->getOperand(0))
.setLibCallee(CallingConv::C, Type::getVoidTy(*DAG.getContext()),
DAG.getExternalSymbol(
"abort", TLI.getPointerTy(DAG.getDataLayout())),
std::move(Args));
std::pair<SDValue, SDValue> CallResult = TLI.LowerCallTo(CLI);
Results.push_back(CallResult.second);
break;
}
case ISD::FMINNUM:
case ISD::STRICT_FMINNUM:
ExpandFPLibCall(Node, RTLIB::FMIN_F32, RTLIB::FMIN_F64,
RTLIB::FMIN_F80, RTLIB::FMIN_F128,
RTLIB::FMIN_PPCF128, Results);
break;
case ISD::FMAXNUM:
case ISD::STRICT_FMAXNUM:
ExpandFPLibCall(Node, RTLIB::FMAX_F32, RTLIB::FMAX_F64,
RTLIB::FMAX_F80, RTLIB::FMAX_F128,
RTLIB::FMAX_PPCF128, Results);
break;
case ISD::FSQRT:
case ISD::STRICT_FSQRT:
ExpandFPLibCall(Node, RTLIB::SQRT_F32, RTLIB::SQRT_F64,
RTLIB::SQRT_F80, RTLIB::SQRT_F128,
RTLIB::SQRT_PPCF128, Results);
break;
case ISD::FCBRT:
ExpandFPLibCall(Node, RTLIB::CBRT_F32, RTLIB::CBRT_F64,
RTLIB::CBRT_F80, RTLIB::CBRT_F128,
RTLIB::CBRT_PPCF128, Results);
break;
case ISD::FSIN:
case ISD::STRICT_FSIN:
ExpandFPLibCall(Node, RTLIB::SIN_F32, RTLIB::SIN_F64,
RTLIB::SIN_F80, RTLIB::SIN_F128,
RTLIB::SIN_PPCF128, Results);
break;
case ISD::FCOS:
case ISD::STRICT_FCOS:
ExpandFPLibCall(Node, RTLIB::COS_F32, RTLIB::COS_F64,
RTLIB::COS_F80, RTLIB::COS_F128,
RTLIB::COS_PPCF128, Results);
break;
case ISD::FSINCOS:
// Expand into sincos libcall.
ExpandSinCosLibCall(Node, Results);
break;
case ISD::FLOG:
case ISD::STRICT_FLOG:
ExpandFPLibCall(Node, RTLIB::LOG_F32, RTLIB::LOG_F64, RTLIB::LOG_F80,
RTLIB::LOG_F128, RTLIB::LOG_PPCF128, Results);
break;
case ISD::FLOG2:
case ISD::STRICT_FLOG2:
ExpandFPLibCall(Node, RTLIB::LOG2_F32, RTLIB::LOG2_F64, RTLIB::LOG2_F80,
RTLIB::LOG2_F128, RTLIB::LOG2_PPCF128, Results);
break;
case ISD::FLOG10:
case ISD::STRICT_FLOG10:
ExpandFPLibCall(Node, RTLIB::LOG10_F32, RTLIB::LOG10_F64, RTLIB::LOG10_F80,
RTLIB::LOG10_F128, RTLIB::LOG10_PPCF128, Results);
break;
case ISD::FEXP:
case ISD::STRICT_FEXP:
ExpandFPLibCall(Node, RTLIB::EXP_F32, RTLIB::EXP_F64, RTLIB::EXP_F80,
RTLIB::EXP_F128, RTLIB::EXP_PPCF128, Results);
break;
case ISD::FEXP2:
case ISD::STRICT_FEXP2:
ExpandFPLibCall(Node, RTLIB::EXP2_F32, RTLIB::EXP2_F64, RTLIB::EXP2_F80,
RTLIB::EXP2_F128, RTLIB::EXP2_PPCF128, Results);
break;
case ISD::FTRUNC:
case ISD::STRICT_FTRUNC:
ExpandFPLibCall(Node, RTLIB::TRUNC_F32, RTLIB::TRUNC_F64,
RTLIB::TRUNC_F80, RTLIB::TRUNC_F128,
RTLIB::TRUNC_PPCF128, Results);
break;
case ISD::FFLOOR:
case ISD::STRICT_FFLOOR:
ExpandFPLibCall(Node, RTLIB::FLOOR_F32, RTLIB::FLOOR_F64,
RTLIB::FLOOR_F80, RTLIB::FLOOR_F128,
RTLIB::FLOOR_PPCF128, Results);
break;
case ISD::FCEIL:
case ISD::STRICT_FCEIL:
ExpandFPLibCall(Node, RTLIB::CEIL_F32, RTLIB::CEIL_F64,
RTLIB::CEIL_F80, RTLIB::CEIL_F128,
RTLIB::CEIL_PPCF128, Results);
break;
case ISD::FRINT:
case ISD::STRICT_FRINT:
ExpandFPLibCall(Node, RTLIB::RINT_F32, RTLIB::RINT_F64,
RTLIB::RINT_F80, RTLIB::RINT_F128,
RTLIB::RINT_PPCF128, Results);
break;
case ISD::FNEARBYINT:
case ISD::STRICT_FNEARBYINT:
ExpandFPLibCall(Node, RTLIB::NEARBYINT_F32,
RTLIB::NEARBYINT_F64,
RTLIB::NEARBYINT_F80,
RTLIB::NEARBYINT_F128,
RTLIB::NEARBYINT_PPCF128, Results);
break;
case ISD::FROUND:
case ISD::STRICT_FROUND:
ExpandFPLibCall(Node, RTLIB::ROUND_F32,
RTLIB::ROUND_F64,
RTLIB::ROUND_F80,
RTLIB::ROUND_F128,
RTLIB::ROUND_PPCF128, Results);
break;
case ISD::FROUNDEVEN:
case ISD::STRICT_FROUNDEVEN:
ExpandFPLibCall(Node, RTLIB::ROUNDEVEN_F32,
RTLIB::ROUNDEVEN_F64,
RTLIB::ROUNDEVEN_F80,
RTLIB::ROUNDEVEN_F128,
RTLIB::ROUNDEVEN_PPCF128, Results);
break;
case ISD::FPOWI:
case ISD::STRICT_FPOWI: {
RTLIB::Libcall LC = RTLIB::getPOWI(Node->getSimpleValueType(0));
assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unexpected fpowi.");
if (!TLI.getLibcallName(LC)) {
// Some targets don't have a powi libcall; use pow instead.
SDValue Exponent = DAG.getNode(ISD::SINT_TO_FP, SDLoc(Node),
Node->getValueType(0),
Node->getOperand(1));
Results.push_back(DAG.getNode(ISD::FPOW, SDLoc(Node),
Node->getValueType(0), Node->getOperand(0),
Exponent));
break;
}
unsigned Offset = Node->isStrictFPOpcode() ? 1 : 0;
bool ExponentHasSizeOfInt =
DAG.getLibInfo().getIntSize() ==
Node->getOperand(1 + Offset).getValueType().getSizeInBits();
if (!ExponentHasSizeOfInt) {
// If the exponent does not match with sizeof(int) a libcall to
// RTLIB::POWI would use the wrong type for the argument.
DAG.getContext()->emitError("POWI exponent does not match sizeof(int)");
Results.push_back(DAG.getUNDEF(Node->getValueType(0)));
break;
}
ExpandFPLibCall(Node, LC, Results);
break;
}
case ISD::FPOW:
case ISD::STRICT_FPOW:
ExpandFPLibCall(Node, RTLIB::POW_F32, RTLIB::POW_F64, RTLIB::POW_F80,
RTLIB::POW_F128, RTLIB::POW_PPCF128, Results);
break;
case ISD::LROUND:
case ISD::STRICT_LROUND:
ExpandArgFPLibCall(Node, RTLIB::LROUND_F32,
RTLIB::LROUND_F64, RTLIB::LROUND_F80,
RTLIB::LROUND_F128,
RTLIB::LROUND_PPCF128, Results);
break;
case ISD::LLROUND:
case ISD::STRICT_LLROUND:
ExpandArgFPLibCall(Node, RTLIB::LLROUND_F32,
RTLIB::LLROUND_F64, RTLIB::LLROUND_F80,
RTLIB::LLROUND_F128,
RTLIB::LLROUND_PPCF128, Results);
break;
case ISD::LRINT:
case ISD::STRICT_LRINT:
ExpandArgFPLibCall(Node, RTLIB::LRINT_F32,
RTLIB::LRINT_F64, RTLIB::LRINT_F80,
RTLIB::LRINT_F128,
RTLIB::LRINT_PPCF128, Results);
break;
case ISD::LLRINT:
case ISD::STRICT_LLRINT:
ExpandArgFPLibCall(Node, RTLIB::LLRINT_F32,
RTLIB::LLRINT_F64, RTLIB::LLRINT_F80,
RTLIB::LLRINT_F128,
RTLIB::LLRINT_PPCF128, Results);
break;
case ISD::FDIV:
case ISD::STRICT_FDIV:
ExpandFPLibCall(Node, RTLIB::DIV_F32, RTLIB::DIV_F64,
RTLIB::DIV_F80, RTLIB::DIV_F128,
RTLIB::DIV_PPCF128, Results);
break;
case ISD::FREM:
case ISD::STRICT_FREM:
ExpandFPLibCall(Node, RTLIB::REM_F32, RTLIB::REM_F64,
RTLIB::REM_F80, RTLIB::REM_F128,
RTLIB::REM_PPCF128, Results);
break;
case ISD::FMA:
case ISD::STRICT_FMA:
ExpandFPLibCall(Node, RTLIB::FMA_F32, RTLIB::FMA_F64,
RTLIB::FMA_F80, RTLIB::FMA_F128,
RTLIB::FMA_PPCF128, Results);
break;
case ISD::FADD:
case ISD::STRICT_FADD:
ExpandFPLibCall(Node, RTLIB::ADD_F32, RTLIB::ADD_F64,
RTLIB::ADD_F80, RTLIB::ADD_F128,
RTLIB::ADD_PPCF128, Results);
break;
case ISD::FMUL:
case ISD::STRICT_FMUL:
ExpandFPLibCall(Node, RTLIB::MUL_F32, RTLIB::MUL_F64,
RTLIB::MUL_F80, RTLIB::MUL_F128,
RTLIB::MUL_PPCF128, Results);
break;
case ISD::FP16_TO_FP:
if (Node->getValueType(0) == MVT::f32) {
Results.push_back(ExpandLibCall(RTLIB::FPEXT_F16_F32, Node, false));
}
break;
case ISD::STRICT_FP16_TO_FP: {
if (Node->getValueType(0) == MVT::f32) {
TargetLowering::MakeLibCallOptions CallOptions;
std::pair<SDValue, SDValue> Tmp = TLI.makeLibCall(
DAG, RTLIB::FPEXT_F16_F32, MVT::f32, Node->getOperand(1), CallOptions,
SDLoc(Node), Node->getOperand(0));
Results.push_back(Tmp.first);
Results.push_back(Tmp.second);
}
break;
}
case ISD::FP_TO_FP16: {
RTLIB::Libcall LC =
RTLIB::getFPROUND(Node->getOperand(0).getValueType(), MVT::f16);
assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unable to expand fp_to_fp16");
Results.push_back(ExpandLibCall(LC, Node, false));
break;
}
case ISD::STRICT_SINT_TO_FP:
case ISD::STRICT_UINT_TO_FP:
case ISD::SINT_TO_FP:
case ISD::UINT_TO_FP: {
// TODO - Common the code with DAGTypeLegalizer::SoftenFloatRes_XINT_TO_FP
bool IsStrict = Node->isStrictFPOpcode();
bool Signed = Node->getOpcode() == ISD::SINT_TO_FP ||
Node->getOpcode() == ISD::STRICT_SINT_TO_FP;
EVT SVT = Node->getOperand(IsStrict ? 1 : 0).getValueType();
EVT RVT = Node->getValueType(0);
EVT NVT = EVT();
SDLoc dl(Node);
// Even if the input is legal, no libcall may exactly match, eg. we don't
// have i1 -> fp conversions. So, it needs to be promoted to a larger type,
// eg: i13 -> fp. Then, look for an appropriate libcall.
RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
for (unsigned t = MVT::FIRST_INTEGER_VALUETYPE;
t <= MVT::LAST_INTEGER_VALUETYPE && LC == RTLIB::UNKNOWN_LIBCALL;
++t) {
NVT = (MVT::SimpleValueType)t;
// The source needs to big enough to hold the operand.
if (NVT.bitsGE(SVT))
LC = Signed ? RTLIB::getSINTTOFP(NVT, RVT)
: RTLIB::getUINTTOFP(NVT, RVT);
}
assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unable to legalize as libcall");
SDValue Chain = IsStrict ? Node->getOperand(0) : SDValue();
// Sign/zero extend the argument if the libcall takes a larger type.
SDValue Op = DAG.getNode(Signed ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, dl,
NVT, Node->getOperand(IsStrict ? 1 : 0));
TargetLowering::MakeLibCallOptions CallOptions;
CallOptions.setSExt(Signed);
std::pair<SDValue, SDValue> Tmp =
TLI.makeLibCall(DAG, LC, RVT, Op, CallOptions, dl, Chain);
Results.push_back(Tmp.first);
if (IsStrict)
Results.push_back(Tmp.second);
break;
}
case ISD::FP_TO_SINT:
case ISD::FP_TO_UINT:
case ISD::STRICT_FP_TO_SINT:
case ISD::STRICT_FP_TO_UINT: {
// TODO - Common the code with DAGTypeLegalizer::SoftenFloatOp_FP_TO_XINT.
bool IsStrict = Node->isStrictFPOpcode();
bool Signed = Node->getOpcode() == ISD::FP_TO_SINT ||
Node->getOpcode() == ISD::STRICT_FP_TO_SINT;
SDValue Op = Node->getOperand(IsStrict ? 1 : 0);
EVT SVT = Op.getValueType();
EVT RVT = Node->getValueType(0);
EVT NVT = EVT();
SDLoc dl(Node);
// Even if the result is legal, no libcall may exactly match, eg. we don't
// have fp -> i1 conversions. So, it needs to be promoted to a larger type,
// eg: fp -> i32. Then, look for an appropriate libcall.
RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
for (unsigned IntVT = MVT::FIRST_INTEGER_VALUETYPE;
IntVT <= MVT::LAST_INTEGER_VALUETYPE && LC == RTLIB::UNKNOWN_LIBCALL;
++IntVT) {
NVT = (MVT::SimpleValueType)IntVT;
// The type needs to big enough to hold the result.
if (NVT.bitsGE(RVT))
LC = Signed ? RTLIB::getFPTOSINT(SVT, NVT)
: RTLIB::getFPTOUINT(SVT, NVT);
}
assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unable to legalize as libcall");
SDValue Chain = IsStrict ? Node->getOperand(0) : SDValue();
TargetLowering::MakeLibCallOptions CallOptions;
std::pair<SDValue, SDValue> Tmp =
TLI.makeLibCall(DAG, LC, NVT, Op, CallOptions, dl, Chain);
// Truncate the result if the libcall returns a larger type.
Results.push_back(DAG.getNode(ISD::TRUNCATE, dl, RVT, Tmp.first));
if (IsStrict)
Results.push_back(Tmp.second);
break;
}
case ISD::FP_ROUND:
case ISD::STRICT_FP_ROUND: {
// X = FP_ROUND(Y, TRUNC)
// TRUNC is a flag, which is always an integer that is zero or one.
// If TRUNC is 0, this is a normal rounding, if it is 1, this FP_ROUND
// is known to not change the value of Y.
// We can only expand it into libcall if the TRUNC is 0.
bool IsStrict = Node->isStrictFPOpcode();
SDValue Op = Node->getOperand(IsStrict ? 1 : 0);
SDValue Chain = IsStrict ? Node->getOperand(0) : SDValue();
EVT VT = Node->getValueType(0);
assert(cast<ConstantSDNode>(Node->getOperand(IsStrict ? 2 : 1))->isZero() &&
"Unable to expand as libcall if it is not normal rounding");
RTLIB::Libcall LC = RTLIB::getFPROUND(Op.getValueType(), VT);
assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unable to legalize as libcall");
TargetLowering::MakeLibCallOptions CallOptions;
std::pair<SDValue, SDValue> Tmp =
TLI.makeLibCall(DAG, LC, VT, Op, CallOptions, SDLoc(Node), Chain);
Results.push_back(Tmp.first);
if (IsStrict)
Results.push_back(Tmp.second);
break;
}
case ISD::FP_EXTEND: {
Results.push_back(
ExpandLibCall(RTLIB::getFPEXT(Node->getOperand(0).getValueType(),
Node->getValueType(0)),
Node, false));
break;
}
case ISD::STRICT_FP_EXTEND:
case ISD::STRICT_FP_TO_FP16: {
RTLIB::Libcall LC =
Node->getOpcode() == ISD::STRICT_FP_TO_FP16
? RTLIB::getFPROUND(Node->getOperand(1).getValueType(), MVT::f16)
: RTLIB::getFPEXT(Node->getOperand(1).getValueType(),
Node->getValueType(0));
assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unable to legalize as libcall");
TargetLowering::MakeLibCallOptions CallOptions;
std::pair<SDValue, SDValue> Tmp =
TLI.makeLibCall(DAG, LC, Node->getValueType(0), Node->getOperand(1),
CallOptions, SDLoc(Node), Node->getOperand(0));
Results.push_back(Tmp.first);
Results.push_back(Tmp.second);
break;
}
case ISD::FSUB:
case ISD::STRICT_FSUB:
ExpandFPLibCall(Node, RTLIB::SUB_F32, RTLIB::SUB_F64,
RTLIB::SUB_F80, RTLIB::SUB_F128,
RTLIB::SUB_PPCF128, Results);
break;
case ISD::SREM:
Results.push_back(ExpandIntLibCall(Node, true,
RTLIB::SREM_I8,
RTLIB::SREM_I16, RTLIB::SREM_I32,
RTLIB::SREM_I64, RTLIB::SREM_I128));
break;
case ISD::UREM:
Results.push_back(ExpandIntLibCall(Node, false,
RTLIB::UREM_I8,
RTLIB::UREM_I16, RTLIB::UREM_I32,
RTLIB::UREM_I64, RTLIB::UREM_I128));
break;
case ISD::SDIV:
Results.push_back(ExpandIntLibCall(Node, true,
RTLIB::SDIV_I8,
RTLIB::SDIV_I16, RTLIB::SDIV_I32,
RTLIB::SDIV_I64, RTLIB::SDIV_I128));
break;
case ISD::UDIV:
Results.push_back(ExpandIntLibCall(Node, false,
RTLIB::UDIV_I8,
RTLIB::UDIV_I16, RTLIB::UDIV_I32,
RTLIB::UDIV_I64, RTLIB::UDIV_I128));
break;
case ISD::SDIVREM:
case ISD::UDIVREM:
// Expand into divrem libcall
ExpandDivRemLibCall(Node, Results);
break;
case ISD::MUL:
Results.push_back(ExpandIntLibCall(Node, false,
RTLIB::MUL_I8,
RTLIB::MUL_I16, RTLIB::MUL_I32,
RTLIB::MUL_I64, RTLIB::MUL_I128));
break;
case ISD::CTLZ_ZERO_UNDEF:
switch (Node->getSimpleValueType(0).SimpleTy) {
default:
llvm_unreachable("LibCall explicitly requested, but not available");
case MVT::i32:
Results.push_back(ExpandLibCall(RTLIB::CTLZ_I32, Node, false));
break;
case MVT::i64:
Results.push_back(ExpandLibCall(RTLIB::CTLZ_I64, Node, false));
break;
case MVT::i128:
Results.push_back(ExpandLibCall(RTLIB::CTLZ_I128, Node, false));
break;
}
break;
}
// Replace the original node with the legalized result.
if (!Results.empty()) {
LLVM_DEBUG(dbgs() << "Successfully converted node to libcall\n");
ReplaceNode(Node, Results.data());
} else
LLVM_DEBUG(dbgs() << "Could not convert node to libcall\n");
}
// Determine the vector type to use in place of an original scalar element when
// promoting equally sized vectors.
static MVT getPromotedVectorElementType(const TargetLowering &TLI,
MVT EltVT, MVT NewEltVT) {
unsigned OldEltsPerNewElt = EltVT.getSizeInBits() / NewEltVT.getSizeInBits();
MVT MidVT = MVT::getVectorVT(NewEltVT, OldEltsPerNewElt);
assert(TLI.isTypeLegal(MidVT) && "unexpected");
return MidVT;
}
void SelectionDAGLegalize::PromoteNode(SDNode *Node) {
LLVM_DEBUG(dbgs() << "Trying to promote node\n");
SmallVector<SDValue, 8> Results;
MVT OVT = Node->getSimpleValueType(0);
if (Node->getOpcode() == ISD::UINT_TO_FP ||
Node->getOpcode() == ISD::SINT_TO_FP ||
Node->getOpcode() == ISD::SETCC ||
Node->getOpcode() == ISD::EXTRACT_VECTOR_ELT ||
Node->getOpcode() == ISD::INSERT_VECTOR_ELT) {
OVT = Node->getOperand(0).getSimpleValueType();
}
if (Node->getOpcode() == ISD::STRICT_UINT_TO_FP ||
Node->getOpcode() == ISD::STRICT_SINT_TO_FP ||
Node->getOpcode() == ISD::STRICT_FSETCC ||
Node->getOpcode() == ISD::STRICT_FSETCCS)
OVT = Node->getOperand(1).getSimpleValueType();
if (Node->getOpcode() == ISD::BR_CC ||
Node->getOpcode() == ISD::SELECT_CC)
OVT = Node->getOperand(2).getSimpleValueType();
MVT NVT = TLI.getTypeToPromoteTo(Node->getOpcode(), OVT);
SDLoc dl(Node);
SDValue Tmp1, Tmp2, Tmp3, Tmp4;
switch (Node->getOpcode()) {
case ISD::CTTZ:
case ISD::CTTZ_ZERO_UNDEF:
case ISD::CTLZ:
case ISD::CTLZ_ZERO_UNDEF:
case ISD::CTPOP:
// Zero extend the argument unless its cttz, then use any_extend.
if (Node->getOpcode() == ISD::CTTZ ||
Node->getOpcode() == ISD::CTTZ_ZERO_UNDEF)
Tmp1 = DAG.getNode(ISD::ANY_EXTEND, dl, NVT, Node->getOperand(0));
else
Tmp1 = DAG.getNode(ISD::ZERO_EXTEND, dl, NVT, Node->getOperand(0));
if (Node->getOpcode() == ISD::CTTZ) {
// The count is the same in the promoted type except if the original
// value was zero. This can be handled by setting the bit just off
// the top of the original type.
auto TopBit = APInt::getOneBitSet(NVT.getSizeInBits(),
OVT.getSizeInBits());
Tmp1 = DAG.getNode(ISD::OR, dl, NVT, Tmp1,
DAG.getConstant(TopBit, dl, NVT));
}
// Perform the larger operation. For CTPOP and CTTZ_ZERO_UNDEF, this is
// already the correct result.
Tmp1 = DAG.getNode(Node->getOpcode(), dl, NVT, Tmp1);
if (Node->getOpcode() == ISD::CTLZ ||
Node->getOpcode() == ISD::CTLZ_ZERO_UNDEF) {
// Tmp1 = Tmp1 - (sizeinbits(NVT) - sizeinbits(Old VT))
Tmp1 = DAG.getNode(ISD::SUB, dl, NVT, Tmp1,
DAG.getConstant(NVT.getSizeInBits() -
OVT.getSizeInBits(), dl, NVT));
}
Results.push_back(DAG.getNode(ISD::TRUNCATE, dl, OVT, Tmp1));
break;
case ISD::BITREVERSE:
case ISD::BSWAP: {
unsigned DiffBits = NVT.getSizeInBits() - OVT.getSizeInBits();
Tmp1 = DAG.getNode(ISD::ZERO_EXTEND, dl, NVT, Node->getOperand(0));
Tmp1 = DAG.getNode(Node->getOpcode(), dl, NVT, Tmp1);
Tmp1 = DAG.getNode(
ISD::SRL, dl, NVT, Tmp1,
DAG.getConstant(DiffBits, dl,
TLI.getShiftAmountTy(NVT, DAG.getDataLayout())));
Results.push_back(DAG.getNode(ISD::TRUNCATE, dl, OVT, Tmp1));
break;
}
case ISD::FP_TO_UINT:
case ISD::STRICT_FP_TO_UINT:
case ISD::FP_TO_SINT:
case ISD::STRICT_FP_TO_SINT:
PromoteLegalFP_TO_INT(Node, dl, Results);
break;
case ISD::FP_TO_UINT_SAT:
case ISD::FP_TO_SINT_SAT:
Results.push_back(PromoteLegalFP_TO_INT_SAT(Node, dl));
break;
case ISD::UINT_TO_FP:
case ISD::STRICT_UINT_TO_FP:
case ISD::SINT_TO_FP:
case ISD::STRICT_SINT_TO_FP:
PromoteLegalINT_TO_FP(Node, dl, Results);
break;
case ISD::VAARG: {
SDValue Chain = Node->getOperand(0); // Get the chain.
SDValue Ptr = Node->getOperand(1); // Get the pointer.
unsigned TruncOp;
if (OVT.isVector()) {
TruncOp = ISD::BITCAST;
} else {
assert(OVT.isInteger()
&& "VAARG promotion is supported only for vectors or integer types");
TruncOp = ISD::TRUNCATE;
}
// Perform the larger operation, then convert back
Tmp1 = DAG.getVAArg(NVT, dl, Chain, Ptr, Node->getOperand(2),
Node->getConstantOperandVal(3));
Chain = Tmp1.getValue(1);
Tmp2 = DAG.getNode(TruncOp, dl, OVT, Tmp1);
// Modified the chain result - switch anything that used the old chain to
// use the new one.
DAG.ReplaceAllUsesOfValueWith(SDValue(Node, 0), Tmp2);
DAG.ReplaceAllUsesOfValueWith(SDValue(Node, 1), Chain);
if (UpdatedNodes) {
UpdatedNodes->insert(Tmp2.getNode());
UpdatedNodes->insert(Chain.getNode());
}
ReplacedNode(Node);
break;
}
case ISD::MUL:
case ISD::SDIV:
case ISD::SREM:
case ISD::UDIV:
case ISD::UREM:
case ISD::AND:
case ISD::OR:
case ISD::XOR: {
unsigned ExtOp, TruncOp;
if (OVT.isVector()) {
ExtOp = ISD::BITCAST;
TruncOp = ISD::BITCAST;
} else {
assert(OVT.isInteger() && "Cannot promote logic operation");
switch (Node->getOpcode()) {
default:
ExtOp = ISD::ANY_EXTEND;
break;
case ISD::SDIV:
case ISD::SREM:
ExtOp = ISD::SIGN_EXTEND;
break;
case ISD::UDIV:
case ISD::UREM:
ExtOp = ISD::ZERO_EXTEND;
break;
}
TruncOp = ISD::TRUNCATE;
}
// Promote each of the values to the new type.
Tmp1 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(0));
Tmp2 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(1));
// Perform the larger operation, then convert back
Tmp1 = DAG.getNode(Node->getOpcode(), dl, NVT, Tmp1, Tmp2);
Results.push_back(DAG.getNode(TruncOp, dl, OVT, Tmp1));
break;
}
case ISD::UMUL_LOHI:
case ISD::SMUL_LOHI: {
// Promote to a multiply in a wider integer type.
unsigned ExtOp = Node->getOpcode() == ISD::UMUL_LOHI ? ISD::ZERO_EXTEND
: ISD::SIGN_EXTEND;
Tmp1 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(0));
Tmp2 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(1));
Tmp1 = DAG.getNode(ISD::MUL, dl, NVT, Tmp1, Tmp2);
auto &DL = DAG.getDataLayout();
unsigned OriginalSize = OVT.getScalarSizeInBits();
Tmp2 = DAG.getNode(
ISD::SRL, dl, NVT, Tmp1,
DAG.getConstant(OriginalSize, dl, TLI.getScalarShiftAmountTy(DL, NVT)));
Results.push_back(DAG.getNode(ISD::TRUNCATE, dl, OVT, Tmp1));
Results.push_back(DAG.getNode(ISD::TRUNCATE, dl, OVT, Tmp2));
break;
}
case ISD::SELECT: {
unsigned ExtOp, TruncOp;
if (Node->getValueType(0).isVector() ||
Node->getValueType(0).getSizeInBits() == NVT.getSizeInBits()) {
ExtOp = ISD::BITCAST;
TruncOp = ISD::BITCAST;
} else if (Node->getValueType(0).isInteger()) {
ExtOp = ISD::ANY_EXTEND;
TruncOp = ISD::TRUNCATE;
} else {
ExtOp = ISD::FP_EXTEND;
TruncOp = ISD::FP_ROUND;
}
Tmp1 = Node->getOperand(0);
// Promote each of the values to the new type.
Tmp2 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(1));
Tmp3 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(2));
// Perform the larger operation, then round down.
Tmp1 = DAG.getSelect(dl, NVT, Tmp1, Tmp2, Tmp3);
Tmp1->setFlags(Node->getFlags());
if (TruncOp != ISD::FP_ROUND)
Tmp1 = DAG.getNode(TruncOp, dl, Node->getValueType(0), Tmp1);
else
Tmp1 = DAG.getNode(TruncOp, dl, Node->getValueType(0), Tmp1,
DAG.getIntPtrConstant(0, dl));
Results.push_back(Tmp1);
break;
}
case ISD::VECTOR_SHUFFLE: {
ArrayRef<int> Mask = cast<ShuffleVectorSDNode>(Node)->getMask();
// Cast the two input vectors.
Tmp1 = DAG.getNode(ISD::BITCAST, dl, NVT, Node->getOperand(0));
Tmp2 = DAG.getNode(ISD::BITCAST, dl, NVT, Node->getOperand(1));
// Convert the shuffle mask to the right # elements.
Tmp1 = ShuffleWithNarrowerEltType(NVT, OVT, dl, Tmp1, Tmp2, Mask);
Tmp1 = DAG.getNode(ISD::BITCAST, dl, OVT, Tmp1);
Results.push_back(Tmp1);
break;
}
case ISD::VECTOR_SPLICE: {
Tmp1 = DAG.getNode(ISD::ANY_EXTEND, dl, NVT, Node->getOperand(0));
Tmp2 = DAG.getNode(ISD::ANY_EXTEND, dl, NVT, Node->getOperand(1));
Tmp3 = DAG.getNode(ISD::VECTOR_SPLICE, dl, NVT, Tmp1, Tmp2,
Node->getOperand(2));
Results.push_back(DAG.getNode(ISD::TRUNCATE, dl, OVT, Tmp3));
break;
}
case ISD::SELECT_CC: {
SDValue Cond = Node->getOperand(4);
ISD::CondCode CCCode = cast<CondCodeSDNode>(Cond)->get();
// Type of the comparison operands.
MVT CVT = Node->getSimpleValueType(0);
assert(CVT == OVT && "not handled");
unsigned ExtOp = ISD::FP_EXTEND;
if (NVT.isInteger()) {
ExtOp = isSignedIntSetCC(CCCode) ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND;
}
// Promote the comparison operands, if needed.
if (TLI.isCondCodeLegal(CCCode, CVT)) {
Tmp1 = Node->getOperand(0);
Tmp2 = Node->getOperand(1);
} else {
Tmp1 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(0));
Tmp2 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(1));
}
// Cast the true/false operands.
Tmp3 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(2));
Tmp4 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(3));
Tmp1 = DAG.getNode(ISD::SELECT_CC, dl, NVT, {Tmp1, Tmp2, Tmp3, Tmp4, Cond},
Node->getFlags());
// Cast the result back to the original type.
if (ExtOp != ISD::FP_EXTEND)
Tmp1 = DAG.getNode(ISD::TRUNCATE, dl, OVT, Tmp1);
else
Tmp1 = DAG.getNode(ISD::FP_ROUND, dl, OVT, Tmp1,
DAG.getIntPtrConstant(0, dl));
Results.push_back(Tmp1);
break;
}
case ISD::SETCC:
case ISD::STRICT_FSETCC:
case ISD::STRICT_FSETCCS: {
unsigned ExtOp = ISD::FP_EXTEND;
if (NVT.isInteger()) {
ISD::CondCode CCCode = cast<CondCodeSDNode>(Node->getOperand(2))->get();
ExtOp = isSignedIntSetCC(CCCode) ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND;
}
if (Node->isStrictFPOpcode()) {
SDValue InChain = Node->getOperand(0);
std::tie(Tmp1, std::ignore) =
DAG.getStrictFPExtendOrRound(Node->getOperand(1), InChain, dl, NVT);
std::tie(Tmp2, std::ignore) =
DAG.getStrictFPExtendOrRound(Node->getOperand(2), InChain, dl, NVT);
SmallVector<SDValue, 2> TmpChains = {Tmp1.getValue(1), Tmp2.getValue(1)};
SDValue OutChain = DAG.getTokenFactor(dl, TmpChains);
SDVTList VTs = DAG.getVTList(Node->getValueType(0), MVT::Other);
Results.push_back(DAG.getNode(Node->getOpcode(), dl, VTs,
{OutChain, Tmp1, Tmp2, Node->getOperand(3)},
Node->getFlags()));
Results.push_back(Results.back().getValue(1));
break;
}
Tmp1 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(0));
Tmp2 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(1));
Results.push_back(DAG.getNode(ISD::SETCC, dl, Node->getValueType(0), Tmp1,
Tmp2, Node->getOperand(2), Node->getFlags()));
break;
}
case ISD::BR_CC: {
unsigned ExtOp = ISD::FP_EXTEND;
if (NVT.isInteger()) {
ISD::CondCode CCCode =
cast<CondCodeSDNode>(Node->getOperand(1))->get();
ExtOp = isSignedIntSetCC(CCCode) ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND;
}
Tmp1 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(2));
Tmp2 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(3));
Results.push_back(DAG.getNode(ISD::BR_CC, dl, Node->getValueType(0),
Node->getOperand(0), Node->getOperand(1),
Tmp1, Tmp2, Node->getOperand(4)));
break;
}
case ISD::FADD:
case ISD::FSUB:
case ISD::FMUL:
case ISD::FDIV:
case ISD::FREM:
case ISD::FMINNUM:
case ISD::FMAXNUM:
case ISD::FPOW:
Tmp1 = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Node->getOperand(0));
Tmp2 = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Node->getOperand(1));
Tmp3 = DAG.getNode(Node->getOpcode(), dl, NVT, Tmp1, Tmp2,
Node->getFlags());
Results.push_back(DAG.getNode(ISD::FP_ROUND, dl, OVT,
Tmp3, DAG.getIntPtrConstant(0, dl)));
break;
case ISD::STRICT_FREM:
case ISD::STRICT_FPOW:
Tmp1 = DAG.getNode(ISD::STRICT_FP_EXTEND, dl, {NVT, MVT::Other},
{Node->getOperand(0), Node->getOperand(1)});
Tmp2 = DAG.getNode(ISD::STRICT_FP_EXTEND, dl, {NVT, MVT::Other},
{Node->getOperand(0), Node->getOperand(2)});
Tmp3 = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Tmp1.getValue(1),
Tmp2.getValue(1));
Tmp1 = DAG.getNode(Node->getOpcode(), dl, {NVT, MVT::Other},
{Tmp3, Tmp1, Tmp2});
Tmp1 = DAG.getNode(ISD::STRICT_FP_ROUND, dl, {OVT, MVT::Other},
{Tmp1.getValue(1), Tmp1, DAG.getIntPtrConstant(0, dl)});
Results.push_back(Tmp1);
Results.push_back(Tmp1.getValue(1));
break;
case ISD::FMA:
Tmp1 = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Node->getOperand(0));
Tmp2 = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Node->getOperand(1));
Tmp3 = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Node->getOperand(2));
Results.push_back(
DAG.getNode(ISD::FP_ROUND, dl, OVT,
DAG.getNode(Node->getOpcode(), dl, NVT, Tmp1, Tmp2, Tmp3),
DAG.getIntPtrConstant(0, dl)));
break;
case ISD::FCOPYSIGN:
case ISD::FPOWI: {
Tmp1 = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Node->getOperand(0));
Tmp2 = Node->getOperand(1);
Tmp3 = DAG.getNode(Node->getOpcode(), dl, NVT, Tmp1, Tmp2);
// fcopysign doesn't change anything but the sign bit, so
// (fp_round (fcopysign (fpext a), b))
// is as precise as
// (fp_round (fpext a))
// which is a no-op. Mark it as a TRUNCating FP_ROUND.
const bool isTrunc = (Node->getOpcode() == ISD::FCOPYSIGN);
Results.push_back(DAG.getNode(ISD::FP_ROUND, dl, OVT,
Tmp3, DAG.getIntPtrConstant(isTrunc, dl)));
break;
}
case ISD::FFLOOR:
case ISD::FCEIL:
case ISD::FRINT:
case ISD::FNEARBYINT:
case ISD::FROUND:
case ISD::FROUNDEVEN:
case ISD::FTRUNC:
case ISD::FNEG:
case ISD::FSQRT:
case ISD::FSIN:
case ISD::FCOS:
case ISD::FLOG:
case ISD::FLOG2:
case ISD::FLOG10:
case ISD::FABS:
case ISD::FEXP:
case ISD::FEXP2:
Tmp1 = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Node->getOperand(0));
Tmp2 = DAG.getNode(Node->getOpcode(), dl, NVT, Tmp1);
Results.push_back(DAG.getNode(ISD::FP_ROUND, dl, OVT,
Tmp2, DAG.getIntPtrConstant(0, dl)));
break;
case ISD::STRICT_FFLOOR:
case ISD::STRICT_FCEIL:
case ISD::STRICT_FSIN:
case ISD::STRICT_FCOS:
case ISD::STRICT_FLOG:
case ISD::STRICT_FLOG10:
case ISD::STRICT_FEXP:
Tmp1 = DAG.getNode(ISD::STRICT_FP_EXTEND, dl, {NVT, MVT::Other},
{Node->getOperand(0), Node->getOperand(1)});
Tmp2 = DAG.getNode(Node->getOpcode(), dl, {NVT, MVT::Other},
{Tmp1.getValue(1), Tmp1});
Tmp3 = DAG.getNode(ISD::STRICT_FP_ROUND, dl, {OVT, MVT::Other},
{Tmp2.getValue(1), Tmp2, DAG.getIntPtrConstant(0, dl)});
Results.push_back(Tmp3);
Results.push_back(Tmp3.getValue(1));
break;
case ISD::BUILD_VECTOR: {
MVT EltVT = OVT.getVectorElementType();
MVT NewEltVT = NVT.getVectorElementType();
// Handle bitcasts to a different vector type with the same total bit size
//
// e.g. v2i64 = build_vector i64:x, i64:y => v4i32
// =>
// v4i32 = concat_vectors (v2i32 (bitcast i64:x)), (v2i32 (bitcast i64:y))
assert(NVT.isVector() && OVT.getSizeInBits() == NVT.getSizeInBits() &&
"Invalid promote type for build_vector");
assert(NewEltVT.bitsLT(EltVT) && "not handled");
MVT MidVT = getPromotedVectorElementType(TLI, EltVT, NewEltVT);
SmallVector<SDValue, 8> NewOps;
for (unsigned I = 0, E = Node->getNumOperands(); I != E; ++I) {
SDValue Op = Node->getOperand(I);
NewOps.push_back(DAG.getNode(ISD::BITCAST, SDLoc(Op), MidVT, Op));
}
SDLoc SL(Node);
SDValue Concat = DAG.getNode(ISD::CONCAT_VECTORS, SL, NVT, NewOps);
SDValue CvtVec = DAG.getNode(ISD::BITCAST, SL, OVT, Concat);
Results.push_back(CvtVec);
break;
}
case ISD::EXTRACT_VECTOR_ELT: {
MVT EltVT = OVT.getVectorElementType();
MVT NewEltVT = NVT.getVectorElementType();
// Handle bitcasts to a different vector type with the same total bit size.
//
// e.g. v2i64 = extract_vector_elt x:v2i64, y:i32
// =>
// v4i32:castx = bitcast x:v2i64
//
// i64 = bitcast
// (v2i32 build_vector (i32 (extract_vector_elt castx, (2 * y))),
// (i32 (extract_vector_elt castx, (2 * y + 1)))
//
assert(NVT.isVector() && OVT.getSizeInBits() == NVT.getSizeInBits() &&
"Invalid promote type for extract_vector_elt");
assert(NewEltVT.bitsLT(EltVT) && "not handled");
MVT MidVT = getPromotedVectorElementType(TLI, EltVT, NewEltVT);
unsigned NewEltsPerOldElt = MidVT.getVectorNumElements();
SDValue Idx = Node->getOperand(1);
EVT IdxVT = Idx.getValueType();
SDLoc SL(Node);
SDValue Factor = DAG.getConstant(NewEltsPerOldElt, SL, IdxVT);
SDValue NewBaseIdx = DAG.getNode(ISD::MUL, SL, IdxVT, Idx, Factor);
SDValue CastVec = DAG.getNode(ISD::BITCAST, SL, NVT, Node->getOperand(0));
SmallVector<SDValue, 8> NewOps;
for (unsigned I = 0; I < NewEltsPerOldElt; ++I) {
SDValue IdxOffset = DAG.getConstant(I, SL, IdxVT);
SDValue TmpIdx = DAG.getNode(ISD::ADD, SL, IdxVT, NewBaseIdx, IdxOffset);
SDValue Elt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, NewEltVT,
CastVec, TmpIdx);
NewOps.push_back(Elt);
}
SDValue NewVec = DAG.getBuildVector(MidVT, SL, NewOps);
Results.push_back(DAG.getNode(ISD::BITCAST, SL, EltVT, NewVec));
break;
}
case ISD::INSERT_VECTOR_ELT: {
MVT EltVT = OVT.getVectorElementType();
MVT NewEltVT = NVT.getVectorElementType();
// Handle bitcasts to a different vector type with the same total bit size
//
// e.g. v2i64 = insert_vector_elt x:v2i64, y:i64, z:i32
// =>
// v4i32:castx = bitcast x:v2i64
// v2i32:casty = bitcast y:i64
//
// v2i64 = bitcast
// (v4i32 insert_vector_elt
// (v4i32 insert_vector_elt v4i32:castx,
// (extract_vector_elt casty, 0), 2 * z),
// (extract_vector_elt casty, 1), (2 * z + 1))
assert(NVT.isVector() && OVT.getSizeInBits() == NVT.getSizeInBits() &&
"Invalid promote type for insert_vector_elt");
assert(NewEltVT.bitsLT(EltVT) && "not handled");
MVT MidVT = getPromotedVectorElementType(TLI, EltVT, NewEltVT);
unsigned NewEltsPerOldElt = MidVT.getVectorNumElements();
SDValue Val = Node->getOperand(1);
SDValue Idx = Node->getOperand(2);
EVT IdxVT = Idx.getValueType();
SDLoc SL(Node);
SDValue Factor = DAG.getConstant(NewEltsPerOldElt, SDLoc(), IdxVT);
SDValue NewBaseIdx = DAG.getNode(ISD::MUL, SL, IdxVT, Idx, Factor);
SDValue CastVec = DAG.getNode(ISD::BITCAST, SL, NVT, Node->getOperand(0));
SDValue CastVal = DAG.getNode(ISD::BITCAST, SL, MidVT, Val);
SDValue NewVec = CastVec;
for (unsigned I = 0; I < NewEltsPerOldElt; ++I) {
SDValue IdxOffset = DAG.getConstant(I, SL, IdxVT);
SDValue InEltIdx = DAG.getNode(ISD::ADD, SL, IdxVT, NewBaseIdx, IdxOffset);
SDValue Elt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, NewEltVT,
CastVal, IdxOffset);
NewVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, SL, NVT,
NewVec, Elt, InEltIdx);
}
Results.push_back(DAG.getNode(ISD::BITCAST, SL, OVT, NewVec));
break;
}
case ISD::SCALAR_TO_VECTOR: {
MVT EltVT = OVT.getVectorElementType();
MVT NewEltVT = NVT.getVectorElementType();
// Handle bitcasts to different vector type with the same total bit size.
//
// e.g. v2i64 = scalar_to_vector x:i64
// =>
// concat_vectors (v2i32 bitcast x:i64), (v2i32 undef)
//
MVT MidVT = getPromotedVectorElementType(TLI, EltVT, NewEltVT);
SDValue Val = Node->getOperand(0);
SDLoc SL(Node);
SDValue CastVal = DAG.getNode(ISD::BITCAST, SL, MidVT, Val);
SDValue Undef = DAG.getUNDEF(MidVT);
SmallVector<SDValue, 8> NewElts;
NewElts.push_back(CastVal);
for (unsigned I = 1, NElts = OVT.getVectorNumElements(); I != NElts; ++I)
NewElts.push_back(Undef);
SDValue Concat = DAG.getNode(ISD::CONCAT_VECTORS, SL, NVT, NewElts);
SDValue CvtVec = DAG.getNode(ISD::BITCAST, SL, OVT, Concat);
Results.push_back(CvtVec);
break;
}
case ISD::ATOMIC_SWAP: {
AtomicSDNode *AM = cast<AtomicSDNode>(Node);
SDLoc SL(Node);
SDValue CastVal = DAG.getNode(ISD::BITCAST, SL, NVT, AM->getVal());
assert(NVT.getSizeInBits() == OVT.getSizeInBits() &&
"unexpected promotion type");
assert(AM->getMemoryVT().getSizeInBits() == NVT.getSizeInBits() &&
"unexpected atomic_swap with illegal type");
SDValue NewAtomic
= DAG.getAtomic(ISD::ATOMIC_SWAP, SL, NVT,
DAG.getVTList(NVT, MVT::Other),
{ AM->getChain(), AM->getBasePtr(), CastVal },
AM->getMemOperand());
Results.push_back(DAG.getNode(ISD::BITCAST, SL, OVT, NewAtomic));
Results.push_back(NewAtomic.getValue(1));
break;
}
}
// Replace the original node with the legalized result.
if (!Results.empty()) {
LLVM_DEBUG(dbgs() << "Successfully promoted node\n");
ReplaceNode(Node, Results.data());
} else
LLVM_DEBUG(dbgs() << "Could not promote node\n");
}
/// This is the entry point for the file.
void SelectionDAG::Legalize() {
AssignTopologicalOrder();
SmallPtrSet<SDNode *, 16> LegalizedNodes;
// Use a delete listener to remove nodes which were deleted during
// legalization from LegalizeNodes. This is needed to handle the situation
// where a new node is allocated by the object pool to the same address of a
// previously deleted node.
DAGNodeDeletedListener DeleteListener(
*this,
[&LegalizedNodes](SDNode *N, SDNode *E) { LegalizedNodes.erase(N); });
SelectionDAGLegalize Legalizer(*this, LegalizedNodes);
// Visit all the nodes. We start in topological order, so that we see
// nodes with their original operands intact. Legalization can produce
// new nodes which may themselves need to be legalized. Iterate until all
// nodes have been legalized.
while (true) {
bool AnyLegalized = false;
for (auto NI = allnodes_end(); NI != allnodes_begin();) {
--NI;
SDNode *N = &*NI;
if (N->use_empty() && N != getRoot().getNode()) {
++NI;
DeleteNode(N);
continue;
}
if (LegalizedNodes.insert(N).second) {
AnyLegalized = true;
Legalizer.LegalizeOp(N);
if (N->use_empty() && N != getRoot().getNode()) {
++NI;
DeleteNode(N);
}
}
}
if (!AnyLegalized)
break;
}
// Remove dead nodes now.
RemoveDeadNodes();
}
bool SelectionDAG::LegalizeOp(SDNode *N,
SmallSetVector<SDNode *, 16> &UpdatedNodes) {
SmallPtrSet<SDNode *, 16> LegalizedNodes;
SelectionDAGLegalize Legalizer(*this, LegalizedNodes, &UpdatedNodes);
// Directly insert the node in question, and legalize it. This will recurse
// as needed through operands.
LegalizedNodes.insert(N);
Legalizer.LegalizeOp(N);
return LegalizedNodes.count(N);
}
|
.include "defaults_mod.asm"
table_file_jp equ "exe6-utf8.tbl"
table_file_en equ "bn6-utf8.tbl"
game_code_len equ 3
game_code equ 0x4252354A // BR5J
game_code_2 equ 0x42523545 // BR5E
game_code_3 equ 0x42523550 // BR5P
card_type equ 1
card_id equ 88
card_no equ "088"
card_sub equ "Mod Card 088"
card_sub_x equ 64
card_desc_len equ 2
card_desc_1 equ "AirMan"
card_desc_2 equ "34MB"
card_desc_3 equ ""
card_name_jp_full equ "エアーマン"
card_name_jp_game equ "エアーマン"
card_name_en_full equ "AirMan"
card_name_en_game equ "AirMan"
card_address equ ""
card_address_id equ 0
card_bug equ 0
card_wrote_en equ ""
card_wrote_jp equ "" |
bits 64
xor rax, rax
xor rcx, rcx
xor al, 1
|
// Autogenerated from CppHeaderCreator
// Created by Sc2ad
// =========================================================================
#pragma once
// Begin includes
#include "beatsaber-hook/shared/utils/typedefs.h"
#include "beatsaber-hook/shared/utils/byref.hpp"
// Including type: OVRLipSyncContextBase
#include "GlobalNamespace/OVRLipSyncContextBase.hpp"
#include "beatsaber-hook/shared/utils/il2cpp-utils-methods.hpp"
#include "beatsaber-hook/shared/utils/il2cpp-utils-properties.hpp"
#include "beatsaber-hook/shared/utils/il2cpp-utils-fields.hpp"
#include "beatsaber-hook/shared/utils/utils.h"
// Completed includes
// Begin forward declares
// Forward declaring namespace: GlobalNamespace
namespace GlobalNamespace {
// Forward declaring type: OVRLipSyncSequence
class OVRLipSyncSequence;
}
// Completed forward declares
// Type namespace:
namespace GlobalNamespace {
// Forward declaring type: OVRLipSyncContextCanned
class OVRLipSyncContextCanned;
}
#include "beatsaber-hook/shared/utils/il2cpp-type-check.hpp"
NEED_NO_BOX(::GlobalNamespace::OVRLipSyncContextCanned);
DEFINE_IL2CPP_ARG_TYPE(::GlobalNamespace::OVRLipSyncContextCanned*, "", "OVRLipSyncContextCanned");
// Type namespace:
namespace GlobalNamespace {
// Size: 0x40
#pragma pack(push, 1)
// Autogenerated type: OVRLipSyncContextCanned
// [TokenAttribute] Offset: FFFFFFFF
// [RequireComponent] Offset: 6F8E48
class OVRLipSyncContextCanned : public ::GlobalNamespace::OVRLipSyncContextBase {
public:
public:
// [TooltipAttribute] Offset: 0x6F91F0
// public OVRLipSyncSequence currentSequence
// Size: 0x8
// Offset: 0x38
::GlobalNamespace::OVRLipSyncSequence* currentSequence;
// Field size check
static_assert(sizeof(::GlobalNamespace::OVRLipSyncSequence*) == 0x8);
public:
// Get instance field reference: public OVRLipSyncSequence currentSequence
[[deprecated("Use field access instead!")]] ::GlobalNamespace::OVRLipSyncSequence*& dyn_currentSequence();
// private System.Void Update()
// Offset: 0x18AACD8
void Update();
// public System.Void .ctor()
// Offset: 0x18AAEBC
// Implemented from: OVRLipSyncContextBase
// Base method: System.Void OVRLipSyncContextBase::.ctor()
template<::il2cpp_utils::CreationType creationType = ::il2cpp_utils::CreationType::Temporary>
static OVRLipSyncContextCanned* New_ctor() {
static auto ___internal__logger = ::Logger::get().WithContext("::GlobalNamespace::OVRLipSyncContextCanned::.ctor");
return THROW_UNLESS((::il2cpp_utils::New<OVRLipSyncContextCanned*, creationType>()));
}
}; // OVRLipSyncContextCanned
#pragma pack(pop)
static check_size<sizeof(OVRLipSyncContextCanned), 56 + sizeof(::GlobalNamespace::OVRLipSyncSequence*)> __GlobalNamespace_OVRLipSyncContextCannedSizeCheck;
static_assert(sizeof(OVRLipSyncContextCanned) == 0x40);
}
#include "beatsaber-hook/shared/utils/il2cpp-utils-methods.hpp"
// Writing MetadataGetter for method: GlobalNamespace::OVRLipSyncContextCanned::Update
// Il2CppName: Update
template<>
struct ::il2cpp_utils::il2cpp_type_check::MetadataGetter<static_cast<void (GlobalNamespace::OVRLipSyncContextCanned::*)()>(&GlobalNamespace::OVRLipSyncContextCanned::Update)> {
static const MethodInfo* get() {
return ::il2cpp_utils::FindMethod(classof(GlobalNamespace::OVRLipSyncContextCanned*), "Update", std::vector<Il2CppClass*>(), ::std::vector<const Il2CppType*>{});
}
};
// Writing MetadataGetter for method: GlobalNamespace::OVRLipSyncContextCanned::New_ctor
// Il2CppName: .ctor
// Cannot get method pointer of value based method overload from template for constructor!
// Try using FindMethod instead!
|
// Licensed to the Apache Software Foundation (ASF) under one
// or more contributor license agreements. See the NOTICE file
// distributed with this work for additional information
// regarding copyright ownership. The ASF licenses this file
// to you under the Apache License, Version 2.0 (the
// "License"); you may not use this file except in compliance
// with the License. You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing,
// software distributed under the License is distributed on an
// "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
// KIND, either express or implied. See the License for the
// specific language governing permissions and limitations
// under the License.
#include "arrow/array/array_base.h"
#include "arrow/array/builder_primitive.h"
#include "arrow/compute/api_scalar.h"
#include "arrow/compute/cast.h"
#include "arrow/compute/kernels/common.h"
#include "arrow/compute/kernels/util_internal.h"
#include "arrow/util/bit_util.h"
#include "arrow/util/bitmap_writer.h"
#include "arrow/util/hashing.h"
#include "arrow/visitor_inline.h"
namespace arrow {
using internal::checked_cast;
using internal::HashTraits;
namespace compute {
namespace internal {
namespace {
template <typename Type>
struct SetLookupState : public KernelState {
explicit SetLookupState(MemoryPool* pool) : lookup_table(pool, 0) {}
Status Init(const SetLookupOptions& options) {
if (options.value_set.kind() == Datum::ARRAY) {
RETURN_NOT_OK(AddArrayValueSet(*options.value_set.array()));
} else if (options.value_set.kind() == Datum::CHUNKED_ARRAY) {
const ChunkedArray& value_set = *options.value_set.chunked_array();
for (const std::shared_ptr<Array>& chunk : value_set.chunks()) {
RETURN_NOT_OK(AddArrayValueSet(*chunk->data()));
}
} else {
return Status::Invalid("value_set should be an array or chunked array");
}
if (lookup_table.size() != options.value_set.length()) {
return Status::NotImplemented("duplicate values in value_set");
}
if (!options.skip_nulls) {
null_index = lookup_table.GetNull();
}
return Status::OK();
}
Status AddArrayValueSet(const ArrayData& data) {
using T = typename GetViewType<Type>::T;
auto visit_valid = [&](T v) {
int32_t unused_memo_index;
return lookup_table.GetOrInsert(v, &unused_memo_index);
};
auto visit_null = [&]() {
lookup_table.GetOrInsertNull();
return Status::OK();
};
return VisitArrayDataInline<Type>(data, visit_valid, visit_null);
}
using MemoTable = typename HashTraits<Type>::MemoTableType;
MemoTable lookup_table;
int32_t null_index = -1;
};
template <>
struct SetLookupState<NullType> : public KernelState {
explicit SetLookupState(MemoryPool*) {}
Status Init(const SetLookupOptions& options) {
value_set_has_null = (options.value_set.length() > 0) && !options.skip_nulls;
return Status::OK();
}
bool value_set_has_null;
};
// TODO: Put this concept somewhere reusable
template <int width>
struct UnsignedIntType;
template <>
struct UnsignedIntType<1> {
using Type = UInt8Type;
};
template <>
struct UnsignedIntType<2> {
using Type = UInt16Type;
};
template <>
struct UnsignedIntType<4> {
using Type = UInt32Type;
};
template <>
struct UnsignedIntType<8> {
using Type = UInt64Type;
};
// Constructing the type requires a type parameter
struct InitStateVisitor {
KernelContext* ctx;
SetLookupOptions options;
const std::shared_ptr<DataType>& arg_type;
std::unique_ptr<KernelState> result;
InitStateVisitor(KernelContext* ctx, const KernelInitArgs& args)
: ctx(ctx),
options(*checked_cast<const SetLookupOptions*>(args.options)),
arg_type(args.inputs[0].type) {}
template <typename Type>
Status Init() {
using StateType = SetLookupState<Type>;
result.reset(new StateType(ctx->exec_context()->memory_pool()));
return static_cast<StateType*>(result.get())->Init(options);
}
Status Visit(const DataType&) { return Init<NullType>(); }
template <typename Type>
enable_if_boolean<Type, Status> Visit(const Type&) {
return Init<BooleanType>();
}
template <typename Type>
enable_if_t<has_c_type<Type>::value && !is_boolean_type<Type>::value, Status> Visit(
const Type&) {
return Init<typename UnsignedIntType<sizeof(typename Type::c_type)>::Type>();
}
template <typename Type>
enable_if_base_binary<Type, Status> Visit(const Type&) {
return Init<typename Type::PhysicalType>();
}
// Handle Decimal128Type, FixedSizeBinaryType
Status Visit(const FixedSizeBinaryType& type) { return Init<FixedSizeBinaryType>(); }
Status GetResult(std::unique_ptr<KernelState>* out) {
if (!options.value_set.type()->Equals(arg_type)) {
ARROW_ASSIGN_OR_RAISE(
options.value_set,
Cast(options.value_set, CastOptions::Safe(arg_type), ctx->exec_context()));
}
RETURN_NOT_OK(VisitTypeInline(*arg_type, this));
*out = std::move(result);
return Status::OK();
}
};
std::unique_ptr<KernelState> InitSetLookup(KernelContext* ctx,
const KernelInitArgs& args) {
if (args.options == nullptr) {
ctx->SetStatus(Status::Invalid(
"Attempted to call a set lookup function without SetLookupOptions"));
return nullptr;
}
std::unique_ptr<KernelState> result;
ctx->SetStatus(InitStateVisitor{ctx, args}.GetResult(&result));
return result;
}
struct IndexInVisitor {
KernelContext* ctx;
const ArrayData& data;
Datum* out;
Int32Builder builder;
IndexInVisitor(KernelContext* ctx, const ArrayData& data, Datum* out)
: ctx(ctx), data(data), out(out), builder(ctx->exec_context()->memory_pool()) {}
Status Visit(const DataType& type) {
DCHECK_EQ(type.id(), Type::NA);
const auto& state = checked_cast<const SetLookupState<NullType>&>(*ctx->state());
if (data.length != 0) {
// skip_nulls is honored for consistency with other types
if (state.value_set_has_null) {
RETURN_NOT_OK(this->builder.Reserve(data.length));
for (int64_t i = 0; i < data.length; ++i) {
this->builder.UnsafeAppend(0);
}
} else {
RETURN_NOT_OK(this->builder.AppendNulls(data.length));
}
}
return Status::OK();
}
template <typename Type>
Status ProcessIndexIn() {
using T = typename GetViewType<Type>::T;
const auto& state = checked_cast<const SetLookupState<Type>&>(*ctx->state());
RETURN_NOT_OK(this->builder.Reserve(data.length));
VisitArrayDataInline<Type>(
data,
[&](T v) {
int32_t index = state.lookup_table.Get(v);
if (index != -1) {
// matching needle; output index from value_set
this->builder.UnsafeAppend(index);
} else {
// no matching needle; output null
this->builder.UnsafeAppendNull();
}
},
[&]() {
if (state.null_index != -1) {
// value_set included null
this->builder.UnsafeAppend(state.null_index);
} else {
// value_set does not include null; output null
this->builder.UnsafeAppendNull();
}
});
return Status::OK();
}
template <typename Type>
enable_if_boolean<Type, Status> Visit(const Type&) {
return ProcessIndexIn<BooleanType>();
}
template <typename Type>
enable_if_t<has_c_type<Type>::value && !is_boolean_type<Type>::value, Status> Visit(
const Type&) {
return ProcessIndexIn<
typename UnsignedIntType<sizeof(typename Type::c_type)>::Type>();
}
template <typename Type>
enable_if_base_binary<Type, Status> Visit(const Type&) {
return ProcessIndexIn<typename Type::PhysicalType>();
}
// Handle Decimal128Type, FixedSizeBinaryType
Status Visit(const FixedSizeBinaryType& type) {
return ProcessIndexIn<FixedSizeBinaryType>();
}
Status Execute() {
Status s = VisitTypeInline(*data.type, this);
if (!s.ok()) {
return s;
}
std::shared_ptr<ArrayData> out_data;
RETURN_NOT_OK(this->builder.FinishInternal(&out_data));
out->value = std::move(out_data);
return Status::OK();
}
};
void ExecIndexIn(KernelContext* ctx, const ExecBatch& batch, Datum* out) {
KERNEL_RETURN_IF_ERROR(ctx, IndexInVisitor(ctx, *batch[0].array(), out).Execute());
}
// ----------------------------------------------------------------------
// IsIn writes the results into a preallocated boolean data bitmap
struct IsInVisitor {
KernelContext* ctx;
const ArrayData& data;
Datum* out;
IsInVisitor(KernelContext* ctx, const ArrayData& data, Datum* out)
: ctx(ctx), data(data), out(out) {}
Status Visit(const DataType& type) {
DCHECK_EQ(type.id(), Type::NA);
const auto& state = checked_cast<const SetLookupState<NullType>&>(*ctx->state());
ArrayData* output = out->mutable_array();
// skip_nulls is honored for consistency with other types
BitUtil::SetBitsTo(output->buffers[1]->mutable_data(), output->offset, output->length,
state.value_set_has_null);
return Status::OK();
}
template <typename Type>
Status ProcessIsIn() {
using T = typename GetViewType<Type>::T;
const auto& state = checked_cast<const SetLookupState<Type>&>(*ctx->state());
ArrayData* output = out->mutable_array();
FirstTimeBitmapWriter writer(output->buffers[1]->mutable_data(), output->offset,
output->length);
VisitArrayDataInline<Type>(
this->data,
[&](T v) {
if (state.lookup_table.Get(v) != -1) {
writer.Set();
} else {
writer.Clear();
}
writer.Next();
},
[&]() {
if (state.null_index != -1) {
writer.Set();
} else {
writer.Clear();
}
writer.Next();
});
writer.Finish();
return Status::OK();
}
template <typename Type>
enable_if_boolean<Type, Status> Visit(const Type&) {
return ProcessIsIn<BooleanType>();
}
template <typename Type>
enable_if_t<has_c_type<Type>::value && !is_boolean_type<Type>::value, Status> Visit(
const Type&) {
return ProcessIsIn<typename UnsignedIntType<sizeof(typename Type::c_type)>::Type>();
}
template <typename Type>
enable_if_base_binary<Type, Status> Visit(const Type&) {
return ProcessIsIn<typename Type::PhysicalType>();
}
// Handle Decimal128Type, FixedSizeBinaryType
Status Visit(const FixedSizeBinaryType& type) {
return ProcessIsIn<FixedSizeBinaryType>();
}
Status Execute() { return VisitTypeInline(*data.type, this); }
};
void ExecIsIn(KernelContext* ctx, const ExecBatch& batch, Datum* out) {
KERNEL_RETURN_IF_ERROR(ctx, IsInVisitor(ctx, *batch[0].array(), out).Execute());
}
// Unary set lookup kernels available for the following input types
//
// * Null type
// * Boolean
// * Numeric
// * Simple temporal types (date, time, timestamp)
// * Base binary types
// * Decimal
void AddBasicSetLookupKernels(ScalarKernel kernel,
const std::shared_ptr<DataType>& out_ty,
ScalarFunction* func) {
auto AddKernels = [&](const std::vector<std::shared_ptr<DataType>>& types) {
for (const std::shared_ptr<DataType>& ty : types) {
kernel.signature = KernelSignature::Make({ty}, out_ty);
DCHECK_OK(func->AddKernel(kernel));
}
};
AddKernels(BaseBinaryTypes());
AddKernels(NumericTypes());
AddKernels(TemporalTypes());
std::vector<Type::type> other_types = {Type::BOOL, Type::DECIMAL,
Type::FIXED_SIZE_BINARY};
for (auto ty : other_types) {
kernel.signature = KernelSignature::Make({InputType::Array(ty)}, out_ty);
DCHECK_OK(func->AddKernel(kernel));
}
}
// Enables calling is_in with CallFunction as though it were binary.
class IsInMetaBinary : public MetaFunction {
public:
IsInMetaBinary()
: MetaFunction("is_in_meta_binary", Arity::Binary(), /*doc=*/nullptr) {}
Result<Datum> ExecuteImpl(const std::vector<Datum>& args,
const FunctionOptions* options,
ExecContext* ctx) const override {
if (options != nullptr) {
return Status::Invalid("Unexpected options for 'is_in_meta_binary' function");
}
return IsIn(args[0], args[1], ctx);
}
};
// Enables calling index_in with CallFunction as though it were binary.
class IndexInMetaBinary : public MetaFunction {
public:
IndexInMetaBinary()
: MetaFunction("index_in_meta_binary", Arity::Binary(), /*doc=*/nullptr) {}
Result<Datum> ExecuteImpl(const std::vector<Datum>& args,
const FunctionOptions* options,
ExecContext* ctx) const override {
if (options != nullptr) {
return Status::Invalid("Unexpected options for 'index_in_meta_binary' function");
}
return IndexIn(args[0], args[1], ctx);
}
};
struct SetLookupFunction : ScalarFunction {
using ScalarFunction::ScalarFunction;
Result<const Kernel*> DispatchBest(std::vector<ValueDescr>* values) const override {
EnsureDictionaryDecoded(values);
return DispatchExact(*values);
}
};
const FunctionDoc is_in_doc{
"Find each element in a set of values",
("For each element in `values`, return true if it is found in a given\n"
"set of values, false otherwise.\n"
"The set of values to look for must be given in SetLookupOptions.\n"
"By default, nulls are matched against the value set, this can be\n"
"changed in SetLookupOptions."),
{"values"},
"SetLookupOptions"};
const FunctionDoc index_in_doc{
"Return index of each element in a set of values",
("For each element in `values`, return its index in a given set of\n"
"values, or null if it is not found there.\n"
"The set of values to look for must be given in SetLookupOptions.\n"
"By default, nulls are matched against the value set, this can be\n"
"changed in SetLookupOptions."),
{"values"},
"SetLookupOptions"};
} // namespace
void RegisterScalarSetLookup(FunctionRegistry* registry) {
// IsIn writes its boolean output into preallocated memory
{
ScalarKernel isin_base;
isin_base.init = InitSetLookup;
isin_base.exec =
TrivialScalarUnaryAsArraysExec(ExecIsIn, NullHandling::OUTPUT_NOT_NULL);
isin_base.null_handling = NullHandling::OUTPUT_NOT_NULL;
auto is_in = std::make_shared<SetLookupFunction>("is_in", Arity::Unary(), &is_in_doc);
AddBasicSetLookupKernels(isin_base, /*output_type=*/boolean(), is_in.get());
isin_base.signature = KernelSignature::Make({null()}, boolean());
DCHECK_OK(is_in->AddKernel(isin_base));
DCHECK_OK(registry->AddFunction(is_in));
DCHECK_OK(registry->AddFunction(std::make_shared<IsInMetaBinary>()));
}
// IndexIn uses Int32Builder and so is responsible for all its own allocation
{
ScalarKernel index_in_base;
index_in_base.init = InitSetLookup;
index_in_base.exec = TrivialScalarUnaryAsArraysExec(
ExecIndexIn, NullHandling::COMPUTED_NO_PREALLOCATE);
index_in_base.null_handling = NullHandling::COMPUTED_NO_PREALLOCATE;
index_in_base.mem_allocation = MemAllocation::NO_PREALLOCATE;
auto index_in =
std::make_shared<SetLookupFunction>("index_in", Arity::Unary(), &index_in_doc);
AddBasicSetLookupKernels(index_in_base, /*output_type=*/int32(), index_in.get());
index_in_base.signature = KernelSignature::Make({null()}, int32());
DCHECK_OK(index_in->AddKernel(index_in_base));
DCHECK_OK(registry->AddFunction(index_in));
DCHECK_OK(registry->AddFunction(std::make_shared<IndexInMetaBinary>()));
}
}
} // namespace internal
} // namespace compute
} // namespace arrow
|
; A006472: a(n) = n!*(n-1)!/2^(n-1).
; Submitted by Jon Maiga
; 1,1,3,18,180,2700,56700,1587600,57153600,2571912000,141455160000,9336040560000,728211163680000,66267215894880000,6958057668962400000,834966920275488000000,113555501157466368000000,17373991677092354304000000,2970952576782792585984000000,564480989588730591336960000000,118541007813633424180761600000000,27382972804949320985755929600000000,6927892119652178209396250188800000000,1912098225024001185793365052108800000000,573629467507200355738009515632640000000000
mov $3,1
lpb $0
mov $2,$0
sub $0,1
add $2,1
bin $2,2
mul $3,$2
lpe
mov $0,$3
|
#include "Clipboard.h"
#include <QClipboard>
#include <QDebug>
#include <QGuiApplication>
#include <QMimeData>
#include <algorithm>
#include "ComboOptions.h"
#include "editor/Settings.h"
struct CopyState {
std::list<Item> m_items;
qint32 m_copy_length;
// TODO: move this to editstate so you can see others' param selections too.
std::set<int> m_unit_nos;
CopyState(){};
CopyState(const std::set<int> &unit_nos, const Interval &range,
const pxtnService *pxtn, const NoIdMap &woiceIdMap,
const std::set<EVENTKIND> &kinds_to_copy);
std::list<Action::Primitive> makePaste(
const std::set<int> &paste_unit_nos,
const std::set<EVENTKIND> &kinds_to_paste, qint32 start_clock,
const NoIdMap &map);
};
QDataStream &operator<<(QDataStream &out, const Item &a) {
out << a.clock << a.kind << a.unit_no << a.value;
return out;
}
QDataStream &operator>>(QDataStream &in, Item &a) {
in >> a.clock >> a.kind >> a.unit_no >> a.value;
return in;
}
template <typename T>
QDataStream &operator<<(QDataStream &out, const std::list<T> &a) {
out << quint64(a.size());
for (const auto &i : a) out << i;
return out;
}
template <typename T>
QDataStream &operator<<(QDataStream &out, const std::set<T> &a) {
out << quint64(a.size());
for (const auto &i : a) out << i;
return out;
}
template <typename T>
QDataStream &operator>>(QDataStream &in, std::list<T> &a) {
quint64 size;
in >> size;
for (quint64 i = 0; i < size; ++i) {
T v;
in >> v;
a.push_back(v);
}
return in;
}
template <typename T>
QDataStream &operator>>(QDataStream &in, std::set<T> &a) {
quint64 size;
in >> size;
for (quint64 i = 0; i < size; ++i) {
T v;
in >> v;
a.insert(v);
}
return in;
}
QDataStream &operator<<(QDataStream &out, const CopyState &a) {
out << a.m_items << a.m_unit_nos << a.m_copy_length;
return out;
}
QDataStream &operator>>(QDataStream &in, CopyState &a) {
in >> a.m_items >> a.m_unit_nos >> a.m_copy_length;
return in;
}
Clipboard::Clipboard(QObject *parent) : QObject(parent) {
for (int kind : Settings::CopyKinds::get())
setKindIsCopied(EVENTKIND(kind), true);
connect(this, &Clipboard::copyKindsSet, [this]() {
QList<int> kinds;
for (EVENTKIND kind : m_kinds_to_copy) kinds.push_back(int(kind));
Settings::CopyKinds::set(kinds);
});
}
static const QString CLIPBOARD_MIME = "application/ptcollab-clipboard";
CopyState::CopyState(const std::set<int> &unit_nos, const Interval &range,
const pxtnService *pxtn, const NoIdMap &woiceIdMap,
const std::set<EVENTKIND> &kinds_to_copy) {
m_copy_length = range.length();
auto min = std::min_element(unit_nos.begin(), unit_nos.end());
uint8_t first_unit_no = (min == unit_nos.end() ? 0 : *min);
for (const int &i : unit_nos) m_unit_nos.insert(i - first_unit_no);
for (const EVERECORD *e = pxtn->evels->get_Records();
e && e->clock < range.end; e = e->next) {
EVENTKIND kind(EVENTKIND(e->kind));
bool is_tail = Evelist_Kind_IsTail(e->kind);
if (e->clock < range.start) {
if (!is_tail) continue;
// For on events, we don't want to include them if they end at the start
// of the selection. Hence the <=. But 0-length tail events that are in
// range should still be counted.
if (is_tail && e->clock + e->value <= range.start) continue;
}
if (unit_nos.find(e->unit_no) != unit_nos.end() &&
kinds_to_copy.find(kind) != kinds_to_copy.end()) {
int32_t v = e->value;
int32_t clock = e->clock;
if (kind == EVENTKIND_VOICENO)
v = woiceIdMap.noToId(v);
else if (is_tail) {
clock = std::max(e->clock, range.start);
v = std::min(v, e->clock + e->value - range.start);
}
uint8_t unit_no = e->unit_no - first_unit_no;
m_items.emplace_back(Item{clock - range.start, unit_no, kind, v});
}
}
}
// TODO: Maybe also be able to copy the tails of ONs, the existing state for
// state kinds, and unset them at the end of the interval.
void Clipboard::copy(const std::set<int> &unit_nos, const Interval &range,
const pxtnService *pxtn, const NoIdMap &woiceIdMap) {
QByteArray data;
QDataStream s(&data, QIODevice::ReadWrite);
s << CopyState(unit_nos, range, pxtn, woiceIdMap, m_kinds_to_copy);
QMimeData *mime = new QMimeData();
mime->setData(CLIPBOARD_MIME, data);
QGuiApplication::clipboard()->setMimeData(mime);
}
std::list<Action::Primitive> CopyState::makePaste(
const std::set<int> &paste_unit_nos,
const std::set<EVENTKIND> &kinds_to_paste, qint32 start_clock,
const NoIdMap &map) {
using namespace Action;
std::list<Primitive> actions;
auto min = std::min_element(paste_unit_nos.begin(), paste_unit_nos.end());
if (min == paste_unit_nos.end()) return actions;
uint8_t first_unit_no = *min;
qint32 end_clock = start_clock + m_copy_length;
for (const int &source_unit_no : m_unit_nos) {
uint8_t unit_no = source_unit_no + first_unit_no;
if (paste_unit_nos.find(unit_no) != paste_unit_nos.end()) {
if (map.numUnits() <= unit_no) continue;
qint32 unit_id = map.noToId(unit_no);
for (const EVENTKIND &kind : kinds_to_paste)
actions.emplace_back(
Primitive{kind, unit_id, start_clock, Delete{end_clock}});
}
}
for (const Item &item : m_items) {
uint8_t unit_no = item.unit_no + first_unit_no;
if (paste_unit_nos.find(unit_no) != paste_unit_nos.end() &&
kinds_to_paste.find(item.kind) != kinds_to_paste.end()) {
if (map.numUnits() <= unit_no) continue;
qint32 unit_id = map.noToId(unit_no);
actions.emplace_back(Primitive{
item.kind, unit_id, start_clock + item.clock, Add{item.value}});
}
}
return actions;
}
PasteResult Clipboard::makePaste(const std::set<int> &paste_unit_nos,
qint32 start_clock, const NoIdMap &map) {
using namespace Action;
const QMimeData *mime = QGuiApplication::clipboard()->mimeData();
if (!mime->hasFormat(CLIPBOARD_MIME)) return {std::list<Primitive>{}, 0};
QDataStream s(mime->data(CLIPBOARD_MIME));
CopyState c;
s >> c;
return {c.makePaste(paste_unit_nos, m_kinds_to_copy, start_clock, map),
c.m_copy_length};
}
// TODO: Maybe shouldn't be here? Doesn't actually use clipboard state ATM
std::list<Action::Primitive> Clipboard::makeClear(const std::set<int> &unit_nos,
const Interval &range,
const NoIdMap &map) {
using namespace Action;
std::list<Primitive> actions;
// TODO: Dedup with makePaste
for (const int &unit_no : unit_nos) {
if (map.numUnits() <= size_t(unit_no)) continue;
qint32 unit_id = map.noToId(unit_no);
for (const EVENTKIND &kind : m_kinds_to_copy)
actions.emplace_back(
Primitive{kind, unit_id, range.start, Delete{range.end}});
}
return actions;
}
PasteResult Clipboard::makeShift(const std::set<int> &unit_nos,
const Interval &range, qint32 dest_start_clock,
const pxtnService *pxtn,
const NoIdMap &woiceIdMap) {
CopyState c(unit_nos, range, pxtn, woiceIdMap, m_kinds_to_copy);
return {c.makePaste(unit_nos, m_kinds_to_copy, dest_start_clock, woiceIdMap),
c.m_copy_length};
}
void Clipboard::setKindIsCopied(EVENTKIND kind, bool set) {
if (kind == EVENTKIND_ON || kind == EVENTKIND_VELOCITY) {
if (set) {
m_kinds_to_copy.insert(EVENTKIND_ON);
m_kinds_to_copy.insert(EVENTKIND_VELOCITY);
m_kinds_to_copy.insert(EVENTKIND_KEY);
} else {
m_kinds_to_copy.erase(EVENTKIND_ON);
m_kinds_to_copy.erase(EVENTKIND_VELOCITY);
m_kinds_to_copy.erase(EVENTKIND_KEY);
}
} else {
if (set)
m_kinds_to_copy.insert(kind);
else
m_kinds_to_copy.erase(kind);
}
emit copyKindsSet();
}
bool Clipboard::kindIsCopied(EVENTKIND kind) const {
return m_kinds_to_copy.find(kind) != m_kinds_to_copy.end();
}
|
; A226279: a(4n) = a(4n+2) = 2*n , a(4n+1) = a(4n+3) = 2*n-1.
; 0,-1,0,-1,2,1,2,1,4,3,4,3,6,5,6,5,8,7,8,7,10,9,10,9,12,11,12,11,14,13,14,13,16,15,16,15,18,17,18,17,20,19,20,19,22,21,22,21,24,23,24,23,26,25,26,25,28,27,28,27,30,29,30,29
mov $1,$0
div $0,4
mul $0,2
gcd $1,2
add $1,$0
sub $1,2
mov $0,$1
|
#include <stdexcept>
#include <boost\test\unit_test.hpp>
using namespace std;
BOOST_AUTO_TEST_SUITE( TestPointerMemoryAllocation )
BOOST_AUTO_TEST_CASE( TestNewDelete )
{
char *name = new char[100];
strcpy_s( name, 100, "TestNewDelete" );
BOOST_CHECK_EQUAL( name, "TestNewDelete" );
char *another_name = name;
BOOST_CHECK_EQUAL( another_name, "TestNewDelete" );
delete name; // memory leak if we delete this !
// strcpy_s( another_name, 100, "NO NO NO" ); // access violation !
// delete another_name; // access violation !
}
BOOST_AUTO_TEST_CASE( TestFreeMemoryLeak )
{
try
{
char *name = new char[100];
strcpy_s( name, 100, "TestFreeMemoryLeak" );
// throw "Got some error!"; // memory leak if enable this line
delete name;
}
catch( ... )
{
}
}
BOOST_AUTO_TEST_SUITE_END() |
; int ba_priority_queue_pop_fastcall(ba_priority_queue_t *q)
SECTION code_adt_ba_priority_queue
PUBLIC _ba_priority_queue_pop_fastcall
_ba_priority_queue_pop_fastcall:
INCLUDE "adt/ba_priority_queue/z80/asm_ba_priority_queue_pop.asm"
|
.gba
.open "../bin/m12.gba",0x8000000
//==============================================================================
// Relocation hacks
//==============================================================================
// Move the weird box font from 0xFCE6C
.org 0x80B3274 :: dw m2_font_relocate
//==============================================================================
// Font hacks
//==============================================================================
.org 0x8AFED84 :: .incbin "data/m2-mainfont1-empty.bin"
.org 0x8B0F424 :: .incbin "data/m2-mainfont2-empty.bin"
.org 0x8B13424 :: .incbin "data/m2-mainfont3-empty.bin"
.org 0x8B088A4 :: .incbin "data/m2-shifted-cursor.bin"
.org 0x8B03384 :: .incbin "data/m2-header-bg.bin"
.org 0x8B03964 :: .incbin "data/m2-header-bg-sigle-tile.bin"
.org 0x8B03D64 :: .incbin "data/m2-header-bg-sigle-tile.bin"
.org 0x8B03DE4 :: .incbin "data/m2-status-symbols.bin"
// Greek letters
.org 0x8B1B907 :: db 0x8B // alpha
.org 0x8B1B90A :: db 0x8C // beta
.org 0x8B1B90D :: db 0x8D // gamma
.org 0x8B1B910 :: db 0x8E // sigma
.org 0x8B1B913 :: db 0x8F // omega
//==============================================================================
// VWF hacks
//==============================================================================
// 32- to 16-bit access change for window flags
.org 0x80BE16A :: strh r2,[r4]
.org 0x80BE1FA :: strh r2,[r6]
.org 0x80BE222 :: strh r6,[r1]
// PSI class window size
.org 0x80B7820
mov r1,4
mov r2,1
mov r3,6
//---------------------------------------------------------
// C0A5C hacks (status window)
//---------------------------------------------------------
.include "m2-status-initial.asm"
.include "m2-status-switch.asm"
//---------------------------------------------------------
// Main window hacks
//---------------------------------------------------------
.org 0x80B7D9A :: bl b7d9a_main_window_manage_input
.org 0x80B7DD2 :: bl printCashWindow
//.org 0x80B8A36 :: bl initWindow_buffer //Money window
//.org 0x80B8A3C :: bl print_window_with_buffer
.org 0x80B8890 :: bl print_window_with_buffer :: bl b8894_printCashWindowAndStore //Main window + Cash Window out of Status menu
.org 0x80B8664 :: bl print_window_with_buffer :: bl b8894_printCashWindowAndStore //Main window + Cash Window out of PSI menu
.org 0x80B8740 :: bl print_window_with_buffer :: bl b8894_printCashWindowAndStore //Main window + Cash Window out of Equip menu
.org 0x80B859C :: bl print_window_with_buffer :: bl b8894_printCashWindowAndStore //Main window + Cash Window out of Goods menu
.org 0x80B831A :: bl initWindow_buffer
.org 0x80B8320 :: bl b8320_statusWindowTextStore
//---------------------------------------------------------
// Overworld main window/PSI class window input management hacks
//---------------------------------------------------------
.org 0x80BEAA6 :: bl beaa6_fix_sounds
.org 0x80BEA88 :: bl bea88_fix_sounds
//---------------------------------------------------------
// Main battle window hacks
//---------------------------------------------------------
.org 0x80DC22A :: bl dc22a_load_buffer_battle
.org 0x80DC8C8 :: lsl r1,r0,#4 :: nop //Fixes wrong pointer
.org 0x80DC8DE :: nop :: nop //Removes useless print
//---------------------------------------------------------
// PSI battle window hacks
//---------------------------------------------------------
.org 0x80E00C8 :: bl e02c6_print_target_store
.org 0x80E02C6 :: bl e02c6_print_target_store
.org 0x80E0762 :: bl initWindow_buffer
.org 0x80E0776 :: bl print_window_with_buffer
.org 0x80E07C2 :: bl clearWindowTiles_buffer
.org 0x80E0892 :: bl initWindow_buffer
.org 0x80E08A6 :: bl print_window_with_buffer
.org 0x80E0990 :: bl initWindow_buffer
.org 0x80E0A30 :: bl initWindow_buffer
.org 0x80E0A54 :: bl print_window_with_buffer
.org 0x80C24A2 :: bl printstr_hlight_buffer
.org 0x80C24B4 :: bl printstr_hlight_buffer
.org 0x80C24CC :: bl printstr_hlight_buffer
.org 0x80C2500 :: bl printstr_hlight_buffer
.org 0x80C2518 :: bl printstr_hlight_buffer
.org 0x80E08D8 :: bl e06ec_redraw_bash_psi_goods_defend
//---------------------------------------------------------
// BAC18 hacks (status window)
//---------------------------------------------------------
.org 0x80BAC46 :: nop :: nop
.org 0x80BAC6E :: bl bac6e_statusWindowNumbersInputManagement
.org 0x80BAD7E :: bl printstr_buffer
.org 0x80BAD88 :: bl initWindow_buffer
.org 0x80BAD92 :: bl initWindow_buffer
.org 0x80BACFC :: bl bac18_redraw_status_store
.org 0x80BADE6 :: bl bac18_redraw_status
.org 0x80BACEA :: bl bacea_status_psi_window
.org 0x80BACBA :: bl print_window_with_buffer
.org 0x80BACC4 :: bl initWindow_buffer
.org 0x80BAD1A :: bl clearWindowTiles_buffer
.org 0x80BADF6 :: bl initWindow_buffer
.org 0x80BACEE :: bl bac18_clear_psi
.org 0x80BADB0 :: bl badb0_status_inner_window
.org 0x80BADCC :: b 0x80BADD8
//---------------------------------------------------------
// Normal PSI window hacks
//---------------------------------------------------------
.org 0x80B8C34 :: bl initWindow_buffer
.org 0x80B8C42 :: bl baec6_psi_window_print_buffer
.org 0x80B8C7E :: bl initWindow_buffer
.org 0x80B8C8C :: nop :: nop
.org 0x80B8CA8 :: bl initWindow_buffer
.org 0x80B8CAE :: bl print_window_with_buffer
.org 0x80B8CEA :: bl baec6_psi_window_print_buffer
.org 0x80B8D0C :: bl initWindow_buffer
.org 0x80B8D16 :: bl initWindow_buffer
.org 0x80B8D22 :: bl psiWindow_buffer
.org 0x80B8E44 :: bl initWindow_buffer
.org 0x80B8E62 :: bl baec6_psi_window_print_buffer
.org 0x80B9222 :: bl initWindow_buffer
.org 0x80B922E :: bl psiTargetWindow_buffer
.org 0x80B916E :: bl initWindow_buffer
.org 0x80B9174 :: bl print_window_with_buffer
.org 0x80B9238 :: bl initWindow_buffer
.org 0x80B9256 :: bl baec6_psi_window_print_buffer
.org 0x80BA9FA :: bl initWindow_buffer
.org 0x80BAA00 :: bl print_window_with_buffer
.org 0x80BAB64 :: bl initWindow_buffer
.org 0x80BABA6 :: bl printstr_hlight_buffer
.org 0x80BA8AC :: bl ba8ac_load_targets_print
.org 0x80B9100 :: bl initWindow_buffer
.org 0x80B910C :: bl initWindow_buffer
.org 0x80B9118 :: bl psiTargetWindow_buffer
.org 0x80B9122 :: bl initWindow_buffer
.org 0x80B9142 :: bl baec6_psi_window_print_buffer
//---------------------------------------------------------
// Teleport window hacks
//---------------------------------------------------------
.org 0x80B9030 :: bl initWindow_buffer//Opening teleport window - "Where?"
.org 0x80B9036 :: bl print_window_with_buffer
.org 0x80B9040 :: bl b9040_special_string
.org 0x80B90D4 :: bl initWindow_buffer //Going back from teleport to the PSI window
.org 0x80B90DE :: bl initWindow_buffer
.org 0x80C5D1C :: bl initWindow_buffer //Initializes the actual teleport window
.org 0x80C5EB0 :: bl printstr_hlight_buffer
.org 0x80C5F46 :: bl printstr_hlight_buffer
.org 0x80C5F80 :: bl c5f80_printstr_hlight_buffer_store_buffer // Multiple pages initial case
.org 0x80C5EB0 :: bl printstr_hlight_buffer
.org 0x80C6134 :: bl clearWindowTiles_buffer
.org 0x80C61C8 :: lsl r0,r5,#3 :: add r0,r0,r5 :: nop //Proper string address
.org 0x80C6224 :: bl printstr_hlight_buffer
.org 0x80C625E :: bl c5f80_printstr_hlight_buffer_store_buffer // Multiple pages changing pages
.org 0x80C5F04 :: bl c5f04_store_if_done //Only one page case
//---------------------------------------------------------
// Class PSI window hacks
//---------------------------------------------------------
.org 0x80BAE1C :: bl print_window_with_buffer
.org 0x80BAEC6 :: bl baec6_psi_window_print_buffer
.org 0x80BAED4 :: bl baec6_psi_window_print_buffer
.org 0x80BAEE2 :: bl baec6_psi_window_print_buffer
.org 0x80BAEF0 :: bl baec6_psi_window_print_buffer
//---------------------------------------------------------
// Equip window generic hacks
//---------------------------------------------------------
.org 0x80BB02C :: bl innerEquipInput
.org 0x80B8066 :: bl printstr_hlight_buffer
.org 0x80B8074 :: mov r3,#0x12
.org 0x80B80A2 :: mov r1,#3 :: mov r2,#0xB :: mov r3,#0xD
.org 0x80B8092 :: bl initWindow_buffer //Initialize equipment window
.org 0x80B8098 :: bl print_window_with_buffer
.org 0x80B80BE :: bl initWindow_buffer
.org 0x80B80C4 :: bl printEquipWindowNumberText
.org 0x80B80EA :: mov r2,#0x37 :: mov r3,#3 :: bl printNumberEquip //Offense Number
.org 0x80B8112 :: mov r2,#0x37 :: mov r3,#0x13 :: bl printNumberEquip //Defense Number
.org 0x80B8138 :: bl initWindow_buffer
.org 0x80B813E :: bl print_window_with_buffer
.org 0x80B814A :: bl equipPrint
.org 0x80B8152 :: bl innerEquipInput
.org 0x80B81A2 :: bl initWindow_buffer
.org 0x80B81A8 :: bl print_window_with_buffer
.org 0x80B81BC :: bl equipPrint
.org 0x80B81CC :: bl print_equip_base_numbers
.org 0x80BAF96 :: bl initWindow_buffer //Go to inner window from outer window
.org 0x80BAF9C :: bl baf9c_print_window_store_buffer
.org 0x80BAFE6 :: mov r2,#0x37 :: mov r3,#3 :: bl printNumberEquip //Offense Number
.org 0x80BB00C :: mov r2,#0x37
.org 0x80BB17C :: bl equippableReadInput
.org 0x80BB198 :: bl printEquipNumbersArrow :: bl store_pixels_overworld :: b 0x80BB1AE //Offense Number
.org 0x80BB1A6 :: mov r2,#0x4C :: mov r3,#0x13 :: bl bb1aa_printnumberequip_store //Defense Number
.org 0x80BB05E :: bl initWindow_buffer
.org 0x80BB066 :: bl print_window_with_buffer
.org 0x80BB08A :: nop :: nop //Remove highlighting
.org 0x80BB0A8 :: bl initWindow_buffer
.org 0x80BB24C :: bl initWindow_buffer //Go back to outer window - Also does going back to inner (not innermost) window from weapons - not touched equipment
.org 0x80BB254 :: bl print_window_with_buffer
.org 0x80BB2C2 :: bl initWindow_buffer
.org 0x80BB2CA :: bl print_window_with_buffer
.org 0x80BB2E0 :: bl initWindow_buffer
.org 0x80BB2E8 :: bl print_window_with_buffer
.org 0x80BB2F6 :: bl equipPrint
.org 0x80BB300 :: bl innerEquipInput
.org 0x80BB33C :: mov r2,#0x37 :: mov r3,#3 :: bl printNumberEquip
.org 0x80BB36C :: mov r2,#0x37 :: mov r3,#0x13 :: bl printNumberEquip
.org 0x80BB3FC :: bl initWindow_buffer //Go back to inner (not innermost) window from weapons - removed equipment
.org 0x80BB404 :: bl print_window_with_buffer
.org 0x80BB41A :: bl initWindow_buffer
.org 0x80BB422 :: bl print_window_with_buffer
.org 0x80BB430 :: bl equipPrint
.org 0x80BB43A :: bl innerEquipInput
.org 0x80BB476 :: mov r2,#0x37 :: mov r3,#3 :: bl printNumberEquip
.org 0x80BB4A6 :: mov r2,#0x37 :: mov r3,#0x13 :: bl printNumberEquip
.org 0x80BB532 :: bl initWindow_buffer //Go back to inner (not innermost) window from weapons - equipped a weapon
.org 0x80BB53A :: bl print_window_with_buffer
.org 0x80BB550 :: bl initWindow_buffer
.org 0x80BB558 :: bl print_window_with_buffer
.org 0x80BB566 :: bl equipPrint
.org 0x80BB570 :: bl innerEquipInput
.org 0x80BB5AC :: mov r2,#0x37 :: mov r3,#3 :: bl printNumberEquip
.org 0x80BB5DC :: mov r2,#0x37 :: mov r3,#0x13 :: bl printNumberEquip
.org 0x80BB9E4 :: bl initWindow_buffer //Go back to inner (not innermost) window from defensive equipment - not touched equipment
.org 0x80BB9EC :: bl print_window_with_buffer
.org 0x80BBA02 :: bl initWindow_buffer
.org 0x80BBA0A :: bl print_window_with_buffer
.org 0x80BBA18 :: bl equipPrint
.org 0x80BBA22 :: bl innerEquipInput
.org 0x80BBA5E :: mov r2,#0x37 :: mov r3,#3 :: bl printNumberEquip
.org 0x80BBA8E :: mov r2,#0x37 :: mov r3,#0x13 :: bl printNumberEquip
.org 0x80BBB2C :: bl initWindow_buffer //Go back to inner (not innermost) window from defensive equipment - removed equipment
.org 0x80BBB34 :: bl print_window_with_buffer
.org 0x80BBB4A :: bl initWindow_buffer
.org 0x80BBB52 :: bl print_window_with_buffer
.org 0x80BBB60 :: bl equipPrint
.org 0x80BBB6A :: bl innerEquipInput
.org 0x80BBBA6 :: mov r2,#0x37 :: mov r3,#3 :: bl printNumberEquip
.org 0x80BBBD6 :: mov r2,#0x37 :: mov r3,#0x13 :: bl printNumberEquip
.org 0x80BBC8A :: bl initWindow_buffer //Go back to inner (not innermost) window from defensive equipment - equipped something
.org 0x80BBC92 :: bl print_window_with_buffer
.org 0x80BBCA8 :: bl initWindow_buffer
.org 0x80BBCB0 :: bl print_window_with_buffer
.org 0x80BBCBE :: bl equipPrint
.org 0x80BBCC8 :: bl innerEquipInput
.org 0x80BBD04 :: mov r2,#0x37 :: mov r3,#3 :: bl printNumberEquip
.org 0x80BBD34 :: mov r2,#0x37 :: mov r3,#0x13 :: bl printNumberEquip
//When first entering the innermost menu
.org 0x80BB6E0 :: mov r2,#0x54 :: mov r3,#3 :: bl printNumberEquip //Change second offense number's position - Weapon
.org 0x80BB710 :: mov r2,#0x54 :: mov r3,#0x13 :: bl bb1aa_printnumberequip_store //Change second defense number's position - Weapon
.org 0x80BB820 :: mov r2,#0x54 :: mov r3,#0x13 :: bl printNumberEquip //Change second defense number's position - Body
.org 0x80BB950 :: mov r2,#0x54 :: mov r3,#0x13 :: bl printNumberEquip //Change second defense number's position - Arms
.org 0x80BBE8E :: mov r2,#0x54 :: mov r3,#0x13 :: bl printNumberEquip //Change second defense number's position - Other
.org 0x80BBEBE :: mov r2,#0x54 :: mov r3,#3 :: bl bb1aa_printnumberequip_store //Change second offense number's position - Other
//When changing selection in the innermost menu
.org 0x80BBDF0 :: mov r2,#0x54 :: mov r3,#0x13 :: bl printNumberEquip //Change second defense number's position - Defensive Equipment
.org 0x80BBE20 :: mov r2,#0x54 :: mov r3,#3 :: bl bb1aa_printnumberequip_store //Change second offense number's position - Defensive Equipment
//---------------------------------------------------------
// Target dialogue window hacks
//---------------------------------------------------------
.org 0x80BD496 :: bl ba8ac_load_targets_print
//---------------------------------------------------------
// Goods window hacks
//---------------------------------------------------------
.org 0x80B7F4E :: bl c5f80_printstr_hlight_buffer_store_buffer //Prints the balance window
.org 0x80B7F72 :: bl initWindow_cursor_buffer //Sets up the goods window
.org 0x80B97A8 :: bl initWindow_buffer //Prints "Who?" going into the window
.org 0x80B97AE :: bl baf9c_print_window_store_buffer_top
.org 0x80B992A :: bl initWindow_buffer //Prints "Who?" coming from the inner window
.org 0x80B9930 :: bl baf9c_print_window_store_buffer_top
.org 0x80B986E :: bl initWindow_buffer
.org 0x80B98B8 :: bl b98b8_print_window_store_buffer_needed //Prints "Which?" going into the window
.org 0x80B99A0 :: bl highlight_string //Highlight chosen item
.org 0x80B9A4C :: bl baf9c_print_window_store_buffer_needed //Prints "Use\nDrop\n,etc." going into the window
.org 0x80B9ADE :: bl initWindow_buffer
.org 0x80BA688 :: bl baf9c_print_window_store_buffer_top //Prints "Use\nDrop\n,etc." going out of the give window
.org 0x80BA340 :: bl initWindow_buffer //Prints "Who?" going into the window
.org 0x80BA346 :: bl print_window_with_buffer
.org 0x80BA37A :: bl initWindow_buffer //initiates the Give window
.org 0x80BA7FA :: bl initWindow_buffer //initiates the inventory window out of help
.org 0x80BA810 :: bl initWindow_buffer //initiates the options window out of help
//---------------------------------------------------------
// Goods window hacks - Stored Goods
//---------------------------------------------------------
//Choose inventory
.org 0x80BCDB4 :: bl initWindow_buffer
//First enter window - More than one page
.org 0x80C63BC :: bl initWindow_buffer
.org 0x80C63CC :: bl printstr_hlight_buffer //->Stored Goods(X)
.org 0x80C6412 :: bl printstr_hlight_buffer //Left part of the inventory
.org 0x80C643E :: bl printstr_hlight_buffer //Right part of the inventory
//First enter window - Only one page
.org 0x80C6492 :: bl initWindow_buffer
.org 0x80C64DA :: bl printstr_hlight_buffer //Left part of the inventory
.org 0x80C6518 :: bl printstr_hlight_buffer //Right part of the inventory
.org 0x80C694A :: bl clearWindowTiles_buffer
//When pressing arrow to switch page
.org 0x80C69D8 :: mov r0,#0x12 //Proper address to "->Stored Goods(3)" string
.org 0x80C69EE :: bl printstr_hlight_buffer //->Stored Goods(X)
.org 0x80C6A6C :: bl printstr_hlight_buffer //Left part of the inventory
.org 0x80C6AA4 :: bl printstr_hlight_buffer //Right part of the inventory
.org 0x80C6AC0 :: bl c6ac0_store_buffer_stored_goods_switch_page
//---------------------------------------------------------
// Goods window hacks - in battle
//---------------------------------------------------------
.org 0x80E05C0 :: lsl r1,r0,#4 :: nop //Fixes wrong pointer
.org 0x80E05D8 :: nop :: nop //Removes useless print
.org 0x80E0C46 :: bl initWindow_cursor_buffer //initiates the goods window in battle
.org 0x80E0CE4 :: bl e0ce4_redraw_battle_window_first_four //Reprints the background window for the target choosing items
.org 0x80E0D1E :: bl printstr_hlight_buffer //Prints the chosen item
.org 0x80E0EFA :: bl initWindow_buffer :: ldr r0,[r4,#0xC] :: bl print_window_with_buffer //Out of ally target window
.org 0x80E0FAA :: bl e0faa_redraw_battle_window_first_two
//---------------------------------------------------------
// BAEF8 hacks (equip window)
//---------------------------------------------------------
// Erase offense change
.macro erase_offense_buffer
mov r0,0xC
mov r1,0xB
mov r2,4
bl bb21c_print_blankstr_buffer
.endmacro
.macro erase_defense_buffer
mov r0,0xC
mov r1,0xD
mov r2,4
bl bb21c_print_blankstr_buffer
.endmacro
.macro erase_defense_buffer_store
mov r0,0xC
mov r1,0xD
mov r2,4
bl bb21c_print_blankstr_buffer_store
.endmacro
.org 0x80BB216 :: erase_offense_buffer
.org 0x80BB38C :: erase_offense_buffer
.org 0x80BB4C6 :: erase_offense_buffer
.org 0x80BB5FC :: erase_offense_buffer
.org 0x80BBAAE :: erase_offense_buffer
.org 0x80BBBF6 :: erase_offense_buffer
.org 0x80BBD54 :: erase_offense_buffer
// Erase defense change
.org 0x80BB226 :: erase_defense_buffer
.org 0x80BBABE :: erase_defense_buffer_store
.org 0x80BBC06 :: erase_defense_buffer_store
.org 0x80BBD64 :: erase_defense_buffer_store
// Erase offense/defense after changing equipment
.org 0x80BB3E2 :: bl baef8_reequip_erase
.org 0x80BB518 :: bl baef8_reequip_erase
.org 0x80BBB12 :: bl baef8_reequip_erase
.org 0x80BBC70 :: bl baef8_reequip_erase
//---------------------------------------------------------
// C5500 hacks (equip window switching)
//---------------------------------------------------------
// Don't draw equip icon
.org 0x80C5A1A :: nop
.org 0x80C5A28 :: nop
// Draw equipment window header
.org 0x80C55CE :: b 0x80C55F8
.org 0x80C55F8
mov r4,r0
mov r0,r9
mov r1,#0x10 //Tiles to clear
mov r2,#0x10 //x
mov r3,#0x11 //y
bl clear_window_header
mov r0,r4
mov r1,r6 // tilemap
mov r2,r9 // vram
mov r3,r7 // window
bl print_equip_header
mov r6,r0
b 0x80C5726
//---------------------------------------------------------
// C1FBC hacks (PSI window)
//---------------------------------------------------------
.org 0x80C203E :: mov r1,0x14 // new PSI name entry length
.org 0x80C2096 :: mov r1,0x14
.org 0x80C21B4 :: mov r1,0x14
.org 0x80C224A :: mov r1,0x14
.org 0x80C229E :: mov r1,0x14
// Draw PSI Rockin
.org 0x80C2192
mov r2,r8
str r2,[sp]
mov r2,0xFE
lsl r2,r2,1
add r0,r6,r2
mov r1,0x71
mov r2,8
bl print_string
//---------------------------------------------------------
// C239C hacks (print PSI name)
//---------------------------------------------------------
.org 0x80C23AA :: lsr r2,r2,0xD // tiles-to-pixels
.org 0x80C23AE :: lsr r6,r3,0xD // tiles-to-pixels
.org 0x80C23CE :: bl c239c_print_psi :: nop :: nop :: nop
.org 0x80C23DA :: add r4,17 // pixel width of "PSI "
.org 0x80C23F0 :: bl printstr_hlight_pixels_buffer // print rockin'
.org 0x80C2402 :: mov r0,3 :: lsl r0,r0,0x10 // pixel width of space
.org 0x80C242E :: mov r0,0x14 // new PSI name entry length
.org 0x80C2448
bl printstr_hlight_pixels_buffer // print PSI name
mov r2,r1 // record X width
add r2,3 // add a space
.org 0x80C2468 :: bl printstr_hlight_pixels_buffer
//---------------------------------------------------------
// PSI target window hacks
//---------------------------------------------------------
// PSI target length hack
.org 0x80B8B12 :: mov r0,0x14
.org 0x80C24EE :: mov r1,0x14
// Fix PSI target offset calculation
.org 0x80B8B08
mov r1,100
mul r1,r2
nop
nop
// Make PP cost use correct number values
.org 0x80CA732
add r1,0x60
// Make PP cost use the correct space value if there's only one digit
.org 0x80CA712
mov r0,0x50
//---------------------------------------------------------
// C438C hacks (Inner PSI window input management + target window printing + header printing)
//---------------------------------------------------------
.org 0x80C495A :: bl c495a_status_target
//---------------------------------------------------------
// B8BBC hacks (PSI window)
//---------------------------------------------------------
//Do not redraw unless it is needed
.org 0x80B8CD2 :: bl b8cd2_psi_window
//Fix multiple sounds issue when going inside the psi window
.org 0x80B8D40 :: bl b8d40_psi_going_inner_window
//Sets up for the target window
.org 0x80B8DB4 :: bl b8db4_psi_inner_window
// Redraw main menu when exiting PSI target window
.org 0x80B8E3A :: bl b8bbc_redraw_menu_2to1
// Redraw main menu when entering PSI target window
.org 0x80B8CF8 :: bl b8bbc_redraw_menu_13to2 // 1 to 2
.org 0x80B920C :: bl b8bbc_redraw_menu_13to2_store // 3 to 2
//---------------------------------------------------------
// E06EC hacks (PSI window in battle)
//---------------------------------------------------------
//Sets up for the target window
.org 0x80E0854 :: bl e0854_psi_inner_window_battle
//Do not redraw unless it is needed
.org 0x80E079A :: bl e079a_battle_psi_window
//---------------------------------------------------------
// C4B2C hacks (Equip window render)
//---------------------------------------------------------
// Start equipment at the 6th tile instead of 5th
.org 0x80C4C96 :: mov r2,6 // Weapon
.org 0x80C4D1C :: mov r2,6 // Body
.org 0x80C4DA4 :: mov r2,6 // Arms
.org 0x80C4E2C :: mov r2,6 // Other
// Only render (None) if necessary
.org 0x80C4C0C
bl c4b2c_skip_nones
b 0x80C4C58
// Don't render equip symbols
.org 0x80C4CD0 :: nop
.org 0x80C4CDE :: nop
.org 0x80C4D58 :: nop
.org 0x80C4D66 :: nop
.org 0x80C4DE0 :: nop
.org 0x80C4DEE :: nop
.org 0x80C4E68 :: nop
.org 0x80C4E76 :: nop
//---------------------------------------------------------
// C4B2C hacks (Equip window loop)
//---------------------------------------------------------
.org 0x80C4F80 :: bl c4b2c_clear_left
.org 0x80C4F84 :: bl c4b2c_clear_right
//---------------------------------------------------------
// C980C hacks (main character printing)
//---------------------------------------------------------
// Reset pixel X during scroll
.org 0x80C9858 :: bl c980c_resetx_newline
.org 0x80C9BF0 :: bl c980c_resetx_scroll
.org 0x80C9D18 :: bl c980c_resetx_newline
.org 0x80CA336 :: bl c980c_resetx_newline
// Reset pixel X during a newline
.org 0x80C9CC4
bl c980c_resetx_newline
// Other reset X
.org 0x80C9D62 :: bl c980c_resetx_other
.org 0x80C9D76 :: bl c980c_resetx_other2
.org 0x80C9EEC :: bl c980c_resetx_other3
.org 0x80C9F34 :: bl c980c_resetx_other3
.org 0x80CA204 :: bl c980c_resetx_other4
.org 0x80CA274 :: bl c980c_resetx_other4
.org 0x80CA30E :: bl c980c_resetx_newline
// Disable newline if the text overflows
.org 0x80CA2FA :: nop
// Custom codes check
.org 0x80CA2BC
bl c980c_custom_codes
// Reset pixel X when redrawing the window
.org 0x80CA2E6
bl c980c_resetx
// Welding entry
.org 0x80CA448
bl c980c_weld_entry
b 0x80CA46C
// Disable X coordinate incrementing
.org 0x80CA48E
nop
// Saturn text welding entry
.org 0x80CA39A
bl weld_entry_saturn
//---------------------------------------------------------
// C8FFC hacks (main string printing)
//---------------------------------------------------------
// Custom codes check
.org 0x80C90A2
bl c8ffc_custom_codes
// Welding entry
.org 0x80C9114
bl c8ffc_weld_entry
b 0x80C9144
// Integer-to-char changes
.org 0x80CA67C :: mov r3,0x50 // space
.org 0x80CA69C :: mov r2,0x60 // zero
.org 0x80CA6DC :: mov r2,0x69 // nine
.org 0x80CA78A :: mov r0,0x60 // zero
.org 0x80CA7AC :: mov r2,0x69 // nine
.org 0x80CA7EC :: sub r1,0xA0
//---------------------------------------------------------
// C87D0 hacks (draw blank window)
//---------------------------------------------------------
.org 0x80C87DC
bl c87d0_clear_entry
//---------------------------------------------------------
// C9634 hacks (string printing)
//---------------------------------------------------------
.org 0x80C967E
bl c9634_resetx
//---------------------------------------------------------
// C96F0 hacks (string printing with highlight)
//---------------------------------------------------------
.org 0x80C9714
lsl r3,r3,1 // change from row coords to tile coords
ldrh r1,[r0,0x22]
add r1,r1,r2
lsl r1,r1,3 // r1 = tile_x * 8
ldrh r2,[r0,0x24]
add r2,r2,r3
lsl r2,r2,3 // r2 = tile_y * 8
mov r0,r6
bl print_string
lsl r0,r0,16
lsr r7,r0,16
b 0x80C9788
//---------------------------------------------------------
// CA4BC hacks (scroll text)
//---------------------------------------------------------
.org 0x80CA55E :: bl ca4bc_erase_tile_short
.org 0x80CA60E :: bl ca4bc_copy_tile_up
.org 0x80CA626 :: bl ca4bc_erase_tile
//---------------------------------------------------------
// CAB90 hacks (print window header string)
//---------------------------------------------------------
.org 0x80CAB90
push {lr}
lsl r2,r2,3
lsl r3,r3,3 // tiles to pixels
bl print_window_header_string
add r0,7
lsr r0,r0,3 // pixels to tiles
pop {pc}
//---------------------------------------------------------
// Change checkerboard printing to properly handle statuses
//---------------------------------------------------------
.org 0x80D68C2 :: bl dead_name
.org 0x80D6960 :: bl sick_name
.org 0x80D6A8A :: bl alive_name
.org 0x80D6B5E :: bl dead_name
.org 0x80D6BFA :: bl sick_name
.org 0x80D6DAC :: bl d6dac_alive_name
.org m2_stat_symb_checker :: .incbin "data/m2-status-symbols-checkerboard.bin"
//---------------------------------------------------------
// CABF8 hacks (print checkerboard string)
//---------------------------------------------------------
.org 0x80CABF8 :: push {r4-r7,lr}
.org 0x80CAC0A
mov r6,1
mov r7,0
add sp,-4
b @@print_checkerboard_check
@@print_checkerboard_skip:
add r4,1
@@print_checkerboard_loop:
ldrb r0,[r4]
sub r0,0x50
mov r1,r5
add r2,r6,1
mov r3,6
str r3,[sp]
mov r3,3
bl print_character_to_ram
add r6,r0,r6
add r7,1
add r4,1
@@print_checkerboard_check:
ldrb r0,[r4,1]
cmp r0,0xFF
bne @@print_checkerboard_loop
ldrb r0,[r4]
cmp r0,0
bne @@print_checkerboard_skip
add r0,r6,7
lsr r0,r0,3 // number of tiles used
add sp,4
pop {r4-r7,pc}
//---------------------------------------------------------
// D2E94 hacks (print party character name)
//---------------------------------------------------------
.org 0x80D2F24
mov r1,r6
mov r2,r7
mov r0,r4
bl weld_entry
b 0x80D2F52
// Disable X increment
.org 0x80D2F5A :: nop
// Saturn weld entry
.org 0x80D2F1A
bl weld_entry_saturn
//---------------------------------------------------------
// D2FA0 hacks (print item)
//---------------------------------------------------------
.org 0x80D3044
mov r0,r4
mov r1,r6
bl weld_entry
b 0x80D3072
// Disable X increment
.org 0x80D307A :: nop
// Saturn weld entry
.org 0x80D301A
bl weld_entry_saturn
//---------------------------------------------------------
// D30C4 hacks (print number)
//---------------------------------------------------------
.org 0x80D314A
mov r0,r5
mov r1,r7
bl weld_entry
b 0x80D3178
// Disable X increment
.org 0x80D3180 :: nop
//---------------------------------------------------------
// D31F8 hacks (print money balance)
//---------------------------------------------------------
.org 0x80D327E
ldrb r0,[r7]
bl decode_character
mov r1,r5
bl print_character_to_window
b 0x80D32AC
.org 0x80D32B2 :: b 0x80D32B8
//---------------------------------------------------------
// D332C hacks (print name)
//---------------------------------------------------------
.org 0x80D34E8
mov r0,r5
mov r1,r4
bl weld_entry
b 0x80D3514
// Disable X increment
.org 0x80D351A :: nop
// Don't print [1E 20] after the name if there are multiple people
.org 0x80D3418 :: b 0x80D348C
//---------------------------------------------------------
// D3560 hacks (print money balance)
//---------------------------------------------------------
.org 0x80D35BA
bl decode_character
mov r1,r5
bl print_character_to_window
b 0x80D35EA
//---------------------------------------------------------
// D3934 hacks (print PSI name)
//---------------------------------------------------------
.org 0x80D39BA :: mov r0,0x14 // PSI name length
// Weld entry
.org 0x80D39E2
mov r0,r4
mov r1,r5
bl weld_entry
b 0x80D3A14
// Print a space before the Greek letter
.org 0x80D39D4 :: bl d3934_print_space
// Battle command hacks
.org 0x8B1F4C8 :: db 0x11 // Extend command window width two tiles (Normal)
.org 0x8B1F4CC :: db 0x16 // Extend command window width two tiles (Paula paralyzed leader)
.org 0x80D7A56 :: mov r1,4 // Move PSI class window left one tile
.org 0x80D7A5A :: mov r3,6 // Extend PSI class window width one tile
.org 0x80DC038 :: add r5,0x30 // String address calculation
.org 0x80DC0A8 :: add r1,0x60 // String address calculation
.org 0x80DC27C :: lsl r1,r2,4 :: nop // String address calculation
.org 0x80DC2AC :: lsl r1,r2,4 :: nop // String address calculation
.org 0x80DCC36 :: mov r2,2 // "to X" position
.org 0x80DCCE0 :: mov r2,2 // "to the Front Row" position
.org 0x80E079E :: bl e06ec_clear_window
.org 0x80E0888 :: bl e06ec_redraw_psi
.org 0x80E0A16 :: bl e06ec_redraw_bash_psi
//---------------------------------------------------------
// Equipment number printing in dialogue window
//---------------------------------------------------------
.org 0x80D37EC :: bl d37ec_print_number :: b 0x80D381C //Offense
.org 0x80D36D0 :: bl d37ec_print_number :: b 0x80D3700 //Defense
//---------------------------------------------------------
// Remove continuous printing of outer equip window and also
// remove continuous printing of Offense and Defense numbers
// in both outer and innermost equipment windows
//---------------------------------------------------------
.org 0x80C518E :: bl c518e_outer_equip
.org 0x80BAF60 :: bl baf60_outer_equip_setup
.org 0x80BAFC8 :: bl bafc8_outer_equip_attack_defense
.org 0x80BB26E :: bl bb990_inner_equip_attack_defense_setup //Weapon
.org 0x80BB730 :: bl bb990_inner_equip_attack_defense_setup //Body
.org 0x80BB860 :: bl bb990_inner_equip_attack_defense_setup //Arms
.org 0x80BB990 :: bl bb990_inner_equip_attack_defense_setup //Other
.org 0x80BB6B2 :: bl bb6b2_inner_equip_attack_defense_weapon
.org 0x80BB64E :: bl bb64e_inner_equip_attack_defense_none_weapon
.org 0x80BB80E :: bl bbe7c_inner_equip_attack_defense_defensive_equipment //Body Offense/Defense printing
.org 0x80BB93E :: bl bbe7c_inner_equip_attack_defense_defensive_equipment //Arms Offense/Defense printing
.org 0x80BBE7C :: bl bbe7c_inner_equip_attack_defense_defensive_equipment //Other Offense/Defense printing
.org 0x80BBDDE :: bl bbe7c_inner_equip_attack_defense_defensive_equipment //Defensive equipment Offense/Defense none printing
//---------------------------------------------------------
// B89EC hacks (print current cash balance)
//---------------------------------------------------------
.org 0x80B8A06
mov r2,r1
mov r1,0x30 // right-align to 48 pixels
bl format_cash_window
b 0x80B8A2E
.org 0x80B785C :: mov r0,0xC // allocate 2 extra bytes for cash window string
.org 0x80B786C :: mov r3,6 // make window 1 fewer tiles wide
//---------------------------------------------------------
// B8A60 hacks (print current cash balance, called from script. Since the script is already executing,
// this version cannot use m2_printnextch, so it requires an edited version of m2_printstr_hlight which recognizes 5F FF)
//---------------------------------------------------------
.org 0x80B8A80
ldr r2,[r5,#0]
mov r1,0x30 // right-align to 48 pixels
bl format_cash_window
b 0x80B8AAA
.org 0x80B8AC0 :: bl printstr_hlight_edited
//---------------------------------------------------------
// [68 FF] - clear window
//---------------------------------------------------------
.org m2_clearwindowtiles
push {r4,lr}
mov r4,r0
// Clear out the pixel data
bl clear_window
// Reset the X/Y printing coordinates
mov r0,0
strh r0,[r4,0x2A]
strh r0,[r4,0x2C]
pop {r4,pc}
//---------------------------------------------------------
// B96B8 hacks (Selected item action menu)
//---------------------------------------------------------
.org 0x80B998E :: bl b998e_get_itemstring_x
//---------------------------------------------------------
// BD918 hacks (battle setup)
//---------------------------------------------------------
// Longest enemy name is 24 letters + 2 for the end code, for 26 total
// We might have "The " later on, so make that 30
// " and its cohorts" makes that 46
// Let's round it to a nice 64: we need to allocate that many bytes for user
// and target strings on the heap. The game only allocates 16 each.
// Goal: allocate an extra 128 bytes and fix all the offsets to the user/target
// strings. We'll store the user string at +0x4C0 and the target string at +0x500.
.org 0x80BD97A :: mov r0,0xA8 // malloc an extra 128 bytes for longer user/target strings
// Fix user/target pointers
.org 0x80C9942 :: bl c980c_user_pointer
.org 0x80C9954 :: bl c980c_target_pointer
.org 0x80EBFDC :: bl ebfd4_user_pointer :: b 0x80EBFFA
.org 0x80EC004 :: push {lr} :: bl ec004_user_pointer
.org 0x80EC018 :: bl ec010_target_pointer :: b 0x80EC038
.org 0x80EC046 :: push {lr} :: bl ec046_target_pointer
// Length fixes
.org 0x80DAE02 :: add sp,-0x40
.org 0x80DAE08 :: mov r2,0x3E
.org 0x80DAE38 :: mov r2,0x3A
.org 0x80DAEA2 :: mov r1,0x3E
.org 0x80DAEDE :: add sp,0x40
.org 0x80DB04E :: add sp,-0x40
.org 0x80DB058 :: mov r2,0x3E
.org 0x80DB08C :: mov r2,0x3A
.org 0x80DB116 :: mov r1,0x3E
.org 0x80DB15A :: add sp,0x40
.org 0x80DCD02 :: add sp,-0x40
.org 0x80DCD0C :: mov r2,0x3C
.org 0x80DCD64 :: mov r2,0x3A
.org 0x80DCDA2 :: mov r1,0x3E
.org 0x80DCDA8 :: add sp,0x40
// Add a space between enemy name and letter
.org 0x80DCD94 :: bl dcd00_enemy_letter
.org 0x80DCD9A :: strb r0,[r5,2]
.org 0x80DCD9E :: strb r0,[r5,3]
.org 0x80DAE7E :: bl dae00_enemy_letter
.org 0x80DAE84 :: strb r0,[r4,2]
.org 0x80DAE88 :: strb r0,[r4,3]
.org 0x80DB0CE :: bl dae00_enemy_letter
.org 0x80DB0D2 :: strb r5,[r4,2]
.org 0x80DB0D6 :: strb r0,[r4,3]
// "The" flag checks
.org 0x80DB084 :: bl db04c_theflag :: nop :: nop
.org 0x80DB110 :: bl dae9c_king_0_the
.org 0x80DB156 :: bl db156_party_0_the //Not needed anymore, but is a good measure
.org 0x80DAE30 :: bl db04c_theflag :: nop :: nop
.org 0x80DAE9C :: bl dae9c_king_0_the
.org 0x80DAEDA :: bl daeda_party_0_the //Not needed anymore, but is a good measure
.org 0x80EC93C :: bl ec93c_party_0_the //Leveling up - Not needed anymore, but is a good measure
.org 0x80DCD5C :: bl dcd5c_theflag :: nop :: nop
.org 0x80DB08E :: bl db08e_theflagflag
.org 0x80DAE3A :: bl db08e_theflagflag
.org 0x80DCD66 :: bl db08e_theflagflag
.org 0x80C9C58 :: bl c9c58_9f_ad_minThe
.org 0x80C9C84 :: bl c9c58_9f_ad_minThe
.org 0x80CA442 :: bl ca442_store_letter
// Ignore the hard-coded Japanese "and cohorts"
.org 0x80DB0E6 :: b 0x80DB0FE
// Update musical note value (for Ness' Nightmare)
.org 0x80DAF12 :: cmp r0,0xAC
//---------------------------------------------------------
// BEB6C hacks (Goods inner menu)
//---------------------------------------------------------
.org 0x80BEB6C
push {lr}
bl goods_inner_process
pop {pc}
//---------------------------------------------------------
// BF858 hacks (Goods outer menu)
//---------------------------------------------------------
.org 0x80BF858
push {lr}
mov r1,0
mov r2,0
bl goods_outer_process
pop {pc}
//---------------------------------------------------------
// C0420 hacks (Goods outer menu for Tracy)
//---------------------------------------------------------
.org 0x80C0420
push {lr}
mov r1,1
mov r2,0
bl goods_outer_process
pop {pc}
//---------------------------------------------------------
// C7CA4 hacks (Shop)
//---------------------------------------------------------
.org 0x80C7CA4
mov r0,r8 //Window
ldr r1,[sp,#0xC] //Items in shop
mov r2,#0 //y_offset | r3 already has the item total for this window
bl shop_print_items //Print the items
b 0x80C7E12 //Avoid the game's printing by jumping it
//---------------------------------------------------------
// BFE74 hacks (Goods outer menu for Give)
//---------------------------------------------------------
.org 0x80BFE74
push {lr}
mov r1,#1
mov r2,#1
bl goods_outer_process
pop {pc}
//---------------------------------------------------------
// BA61C hacks (Fixes inventory when out of Give via B button)
//---------------------------------------------------------
.org 0x80BA61C
bl ba61c_get_print_inventory_window
//---------------------------------------------------------
// B9ECC hacks (Fixes inventory when out of selecting a party member to give food to via B button)
//---------------------------------------------------------
.org 0x80B9ECC
bl b9ecc_get_print_inventory_window
//---------------------------------------------------------
// BA48E hacks (Fixes inventory when out of Give via text)
//---------------------------------------------------------
.org 0x80BA48E
bl ba48e_get_print_inventory_window
//---------------------------------------------------------
// B9F96 hacks (Fixes main window after consuming an item)
//---------------------------------------------------------
.org 0x80B9F96
bl _reprint_first_menu
//---------------------------------------------------------
// B9CF8 hacks (Fixes main window after an item prints a dialogue)
//---------------------------------------------------------
.org 0x80B9CF8
bl _reprint_first_menu
//---------------------------------------------------------
// B9C88 hacks (Fixes main window after an equippable item prints a dialogue)
//---------------------------------------------------------
.org 0x80B9C88
bl _reprint_first_menu
//---------------------------------------------------------
// BA52C hacks (Fixes main window after giving an item)
//---------------------------------------------------------
.org 0x80BA52C
bl _reprint_first_menu
//---------------------------------------------------------
// BA44E hacks (Fixes main window after not being able to give an item)
//---------------------------------------------------------
.org 0x80BA44E
bl _reprint_first_menu
//---------------------------------------------------------
// BA7BE hacks (Fixes main window after calling the help function)
//---------------------------------------------------------
.org 0x80BA7BE
bl ba7be_reprint_first_menu
//---------------------------------------------------------
// B9AA2 hacks (Fixes main window after exiting the item action window)
//---------------------------------------------------------
.org 0x80B9AA2
bl b9aa2_reprint_first_menu
//---------------------------------------------------------
// BCEB0 hacks (Fixes main window after exiting the pickup menu)
//---------------------------------------------------------
.org 0x80BCEB0
bl _reprint_first_menu
//---------------------------------------------------------
// C1C98 hacks (menu selection)
//---------------------------------------------------------
// Print the selection menu string
.org 0x80C1CA6
ldr r7,=0x3005270
ldr r6,=0x30051EC
ldr r5,=0x3005228
bl print_menu_string
ldr r0,=0x3002500
mov r10,r0
b 0x80C1D20
.pool
.org 0x80C8EFC
ldrh r1,[r5,0x2C]
mov r0,0
ldrh r2,[r5,0x26]
mov r3,r5
bl print_blankstr_window
b 0x80C8FE8
//---------------------------------------------------------
// BCF00 hacks (number selection menu)
//---------------------------------------------------------
// Skip printing the first four columns of blank tiles
.org 0x80BCF88 :: nop
.org 0x80BCF98 :: nop
.org 0x80BCFA4 :: nop
.org 0x80BCFAE :: nop
.org 0x80BCFBA :: nop
.org 0x80BCFC6 :: nop
.org 0x80BCFD0 :: nop
.org 0x80BCFD8 :: nop
// Print dollar sign, zeroes, and 00 symbol
.org 0x80BCFDE
ldr r1,=0x3005238
ldr r0,[r1] // Get window pointer
mov r1,r9
bl print_number_menu
b 0x80BD084
.pool
// Clear number selector row
.org 0x80BD096
// [r4 + 8] = window
ldr r0,[r4,8]
bl clear_number_menu
b 0x80BD122
// Clear border tiles
//---------------------------------------------------------
// C9444 hacks (print number selection menu)
//---------------------------------------------------------
// Print the proper character
.org 0x80C956C
push {r2}
// r0 = digit, r6 = window
mov r1,r6
bl print_number_menu_current
pop {r2}
ldr r3,=0x3005228
ldr r4,=0x30051EC
ldrh r3,[r3]
b 0x080C959A
.pool
//---------------------------------------------------------
// EEB1A (load player name)
//---------------------------------------------------------
.org 0x80EEB1A
bl eeb1a_player_name //Call the new routine
b 0x80EEB7A //Do the rest of the original routine
//Remove subtract from player name printing
.org 0x80EEB94 :: mov r2,r3
//---------------------------------------------------------
// End of battle hacks
//---------------------------------------------------------
.org 0x80cb936
bl cb936_battle_won //Removes the game's ability to read the script instantly out of a won battle
.org 0x80a1f8c
bl a1f8c_set_script_reading //Change the game's ability to read the script instantly a bit
.org 0x80b7702
bl b7702_check_script_reading //Change the newly set value slowly and make it 0 when it's safe
//---------------------------------------------------------
// Teleport window hacks
//---------------------------------------------------------
// Note that the teleport table pointer has 6 instances in the ROM,
// but we are only changing two of them in m12-teleport-names.json.
// This is because the other four pointers are used for accessing
// the teleport flag/coord data in the table instead of the text.
// We need a couple hacks to make this work...
.org 0x80C5E8A :: ldr r7,[pc,0xC8] // This is used for text; load from one of the
// pointers that we DID change (previously it
// loaded from a pointer that we didn't change)
.org 0x80C5D8A
lsl r1,r0,4 // Text entries are now 16 bytes each, so multiply by 16
ldr r7,[pc,0x1C4] // ... to make room for loading r7 with the text pointer
add r1,r1,r7
ldrb r0,[r1]
ldr r7,[pc,0x13C] // The game uses r7 as the data pointer when looping back,
// so let's sneak the data pointer in here before it loops
.org 0x80C5E96
lsl r0,r1,4
nop
nop
.org 0x80C5F2C
lsl r0,r1,4
nop
nop
.org 0x80C620C
lsl r0,r1,4
nop
nop
//---------------------------------------------------------
// Teleport header fix
//---------------------------------------------------------
.org 0x80C5DE0 :: bl c65da_clean_print //To:
.org 0x80C5E30 :: bl c6190_clean_print //Number on first entering the menu
.org 0x80C6190 :: bl c6190_buffer_number //Number on page change
.org 0x80C5E04 :: nop :: strh r0,[r4,#0] :: add r4,#2 :: nop ::nop //Remove extra tile
//---------------------------------------------------------
// Stored Goods header fix
//---------------------------------------------------------
.org 0x80C656C :: mov r2,#0x10 :: mov r3,#0x11 :: bl c6570_clean_print_change_pos :: b 0x80C65C0 //Changes position and cleans tiles for Stored Goods
.org 0x80C65DA :: bl c65da_clean_print //Number on first entering the menu
.org 0x80C6996 :: bl c65da_clean_print //Number on page change
//---------------------------------------------------------
// Call header fix
//---------------------------------------------------------
.org 0x80BD26A :: bl c6190_clean_print //Call:
//---------------------------------------------------------
// Fix windows printing too many tiles due to not going off of pixels, but off of characters
//---------------------------------------------------------
.org 0x80C0B28 :: bl c0b28_fix_char_tiles //Status window
.org 0x80C009E :: bl c009e_fix_char_tiles //Give window
.org 0x80C4BD6 :: bl c4bd6_fix_char_tiles //Equip window
.org 0x80C42E0 :: bl c42e0_fix_char_tiles //Outer PSI window
.org 0x80C3FD8 :: bl c42e0_fix_char_tiles //Inner PSI window
.org 0x80C4448 :: bl c4448_fix_char_tiles //Inner PSI window - part 2
.org 0x80DBF36 :: bl c009e_fix_char_tiles //Battle menu window
//---------------------------------------------------------
// Proper dollar and 00 symbols for [9C FF]
//---------------------------------------------------------
.org 0x80B8AA0 :: mov r0,#0x54 //Dollar
.org 0x80B8AA6 :: mov r0,#0x56 //00
//---------------------------------------------------------
// wvf_skip hacks
//---------------------------------------------------------
.org 0x80B8C2A :: bl b8c2a_set_proper_wvf_skip_and_window_type //Fixes bug of M2GBA
.org 0x80BE45A :: bl be45a_set_proper_wvf_skip
.org 0x80BE4CA :: bl be4ca_set_proper_wvf_skip_goods_battle_window
//---------------------------------------------------------
// PSI Rockin in battle text
//---------------------------------------------------------
.org 0x80D3984 :: cmp r0,#3 //Now "PSI " is 4 letters long, not 2
.org 0x80D399E :: sub r0,#4 //Subtract from r0 the length of "PSI "
//---------------------------------------------------------
// Flyover hacks
//---------------------------------------------------------
//Notes
//Flyover entries are made of 8-bit codes with arguments.
//Codes with the first byte between 0 and 9 are special cases.
//00 = End
//01 XX = Position at X tile XX (Changed to Position at X pixel XX)
//02 XX = Position at Y tile XX
//08 XX = Print PC name (for this hack, use 80 FC-FF instead)
//09 = line break
//80 XX = Print character XX
//Flyover pointer remapping
.org 0x873112c :: dw flyovertextYear //The year is 199x
.org 0x8731130 :: dw flyovertextOnett //Onett, a small town in eagleland
.org 0x8731134 :: dw flyovertextNess //Ness's House
.org 0x8731138 :: dw flyovertextWinters //Winters, a small country to the north
.org 0x873113C :: dw flyovertextSnow //Snow Wood Boarding House
.org 0x8731140 :: dw flyovertextDalaam //Dalaam, in the Far East
.org 0x8731144 :: dw flyovertextPoo //The palace of Poo\nThe Crown Prince
.org 0x8731148 :: dw flyovertextLater //Later that night...
.org 0x80B3A80 :: dw flyover_tea
.org 0x80B3AA4 :: dw flyover_coffee
//Change line size to 0x20 pixels
//.org 0x80B3ABA :: add r0,#0x20
//.org 0x80B3B0C :: mov r1,#0x3F :: and r0,r1 :: nop
//.org 0x80B4162 :: bl flyover_scroll_routine :: b 0x80B41B0
//.org 0x80B3B44 :: dw 0x85000900
//Flyover remapping
.org 0x80B3482 :: bl largevwf :: b 0x80B348E
//Flyover remapping
.org 0x80B3B5E :: bl wrapper_largevwf_tea :: b 0x80B3A18
// Weld the odd-numbered flyover letters
.org 0x80B3254 :: bl flyoverweld :: nop
// Make it so the entire possible tileset is used
.org 0x80AE568 :: mov r0,#8
.org 0x80AE56E :: mov r0,#7
.org 0x80AE57A :: mov r1,#0x80 //Start at 0x100 instead of 0x120
// Change the [01 XX] flyover code to pixels from left of screen
.org 0x80B332C :: b 0x80B3334
// Alter the flyover palette so the borders don't show (orig 0x739C)
.org 0x80FCE50 :: .byte 0x00,0x00
//Insert the font
.org 0x80B3274 :: dw m2_font_big
//Print all 16 rows
.org 0x80B3262 :: cmp r7,0xF
//Print all 16 columns
.org 0x80B325C :: cmp r6,7
//---------------------------------------------------------
// Names hacks
//---------------------------------------------------------
//Change location of the names to allow 5-letter long characters and 6 letters long food, rockin and king
//Direct reference change
.org 0x80C98F8 :: dw m2_paula_name
.org 0x80C9908 :: dw m2_jeff_name
.org 0x80C9918 :: dw m2_poo_name
.org 0x80C9928 :: dw m2_food
.org 0x80C9938 :: dw m2_rockin
.org 0x80C9BC0 :: dw m2_king_name //Control Code for printing its name
.org 0x80DB134 :: dw m2_king_name //Action user related
.org 0x80DAEB8 :: dw m2_king_name //Action target related
.org 0x80133E8 :: dw m2_king_name //Cast Roll
.org 0x80C2368 :: dw m2_rockin
.org 0x80C2424 :: dw m2_rockin
.org 0x80C24E0 :: dw m2_rockin
.org 0x80D39AC :: dw m2_rockin
//Change the way the characters' names are called. Instead of number * 6, it's now number * 7
.org 0x80D6A72 :: lsl r1,r4,#3 :: sub r1,r1,r4 :: nop
.org 0x80D6948 :: lsl r1,r4,#3 :: sub r1,r1,r4 :: nop
.org 0x80D28B8 :: lsl r0,r6,#3 :: sub r0,r0,r6 :: nop
.org 0x80C4BC4 :: lsl r1,r0,#3 :: sub r1,r1,r0 :: nop
.org 0x80DB14A :: lsl r0,r1,#3 :: sub r0,r0,r1 :: nop
.org 0x80DAECE :: lsl r0,r1,#3 :: sub r0,r0,r1 :: nop
.org 0x80D336C :: lsl r0,r1,#3 :: sub r0,r0,r1 :: nop
.org 0x80D339C :: lsl r0,r1,#3 :: sub r0,r0,r1 :: nop
.org 0x80D33C4 :: lsl r1,r0,#3 :: sub r1,r1,r0 :: nop
.org 0x80D2EE2 :: lsl r1,r0,#3 :: sub r1,r1,r0 :: nop
.org 0x80BAB8A :: lsl r1,r5,#3 :: sub r1,r1,r5 :: nop
.org 0x80D6D96 :: lsl r1,r2,#3 :: sub r1,r1,r2 :: nop
.org 0x80D7096 :: lsl r1,r2,#3 :: sub r1,r1,r2 :: nop
.org 0x80EC92C :: lsl r0,r2,#3 :: sub r0,r0,r2 :: nop
.org 0x80B9C00 :: lsl r0,r2,#3 :: sub r0,r0,r2 :: nop
.org 0x80D68AA :: lsl r1,r4,#3 :: sub r1,r1,r4 :: nop
.org 0x80D6BE0 :: lsl r1,r4,#3 :: sub r1,r1,r4 :: nop
.org 0x80B9FAC :: lsl r0,r1,#3 :: sub r0,r0,r1 :: nop
.org 0x80B93F0 :: lsl r0,r1,#3 :: sub r0,r0,r1 :: nop
.org 0x80B9FE6 :: lsl r0,r7,#3 :: sub r0,r0,r7 :: nop
.org 0x80B932C :: lsl r1,r0,#3 :: sub r0,r1,r0 :: nop
.org 0x80C0B14 :: lsl r1,r0,#3 :: sub r1,r1,r0 :: nop
.org 0x80C008C :: lsl r1,r0,#3 :: sub r1,r1,r0 :: nop
.org 0x80C42CE :: lsl r1,r0,#3 :: sub r1,r1,r0 :: nop
.org 0x8013652 :: lsl r0,r1,#3 :: sub r0,r0,r1 :: nop
.org 0x80B9CB2 :: lsl r0,r1,#3 :: sub r0,r0,r1 :: nop
.org 0x80BA086 :: lsl r0,r1,#3 :: sub r0,r0,r1 :: nop
.org 0x80C97C0 :: lsl r4,r1,#3 :: sub r4,r4,r1 :: nop
.org 0x80B9316 :: lsl r0,r1,#3 :: sub r0,r0,r1 :: nop
.org 0x80D6B44 :: lsl r1,r4,#3 :: sub r1,r1,r4 :: nop
.org 0x80D6E3A :: lsl r1,r4,#3 :: sub r1,r1,r4 :: nop
.org 0x80D6ED0 :: lsl r1,r4,#3 :: sub r1,r1,r4 :: nop
.org 0x80C3FC6 :: lsl r1,r0,#3 :: sub r1,r1,r0 :: nop
.org 0x80C4436 :: lsl r1,r0,#3 :: sub r1,r1,r0 :: nop
//Change the way the characters' names are called. Instead of number * 6, it's now number * 7. These ones already received an lsl of 1 beforehand.
.org 0x80C0AC8 :: lsl r1,r1,#2 :: sub r1,r1,r5
.org 0x80C4B84 :: lsl r1,r1,#2 :: sub r1,r1,r5
.org 0x80C3F88 :: lsl r1,r1,#2 :: sub r1,r1,r5
.org 0x80C43FC :: lsl r1,r1,#2 :: sub r1,r1,r3
.org 0x80C0040 :: lsl r1,r1,#2 :: sub r1,r1,r3
.org 0x80C4296 :: lsl r1,r1,#2 :: sub r1,r1,r3
.org 0x80DBEFA :: lsl r2,r2,#2 :: sub r2,r2,r4
.org 0x80BEFCA :: lsl r1,r1,#2 :: sub r1,r1,r3
.org 0x80BFA3A :: lsl r1,r1,#2 :: sub r1,r1,r4
.org 0x80BD9AA :: add r0,r5,#7
.org 0x80BD9BA :: mov r1,#0xE
.org 0x80BD9CC :: add r6,#0x15
//Load proper addresses
.org 0x80C98C4 :: bl c98c4_load_1d7
.org 0x80C98CC :: mov r4,#0xEF
.org 0x80C98D4 :: bl c98d4_load_1e5
//Name writing
.org 0x80020B6 :: bl _2352_load_1d7
.org 0x80020C6 :: mov r0,#0xEF
.org 0x80020D6 :: bl _2372_load_1e5
.org 0x80020E8 :: add r0,#0xC0
.org 0x80020F8 :: add r0,#0x80
.org 0x8002108 :: add r0,#0x40
.org 0x80020AC :: mov r0,#5
.org 0x80020BC :: mov r0,#5
.org 0x80020CC :: mov r0,#5
.org 0x80020DC :: mov r0,#5
//Name loading
.org 0x8002214 :: bl _2352_load_1d7
.org 0x8002224 :: mov r0,#0xEF
.org 0x8002234 :: bl _2372_load_1e5
.org 0x8002246 :: mov r0,#0xF6
.org 0x8002258 :: mov r0,#0xFA
.org 0x800226A :: mov r0,#0xFE
.org 0x800220A :: mov r0,#5
.org 0x800221A :: mov r0,#5
.org 0x800222A :: mov r0,#5
.org 0x800223A :: mov r0,#5
//Name Reset change
.org 0x8002352 :: bl _2352_load_1d7
.org 0x8002362 :: mov r0,#0xEF
.org 0x8002372 :: bl _2372_load_1e5
.org 0x8002384 :: add r0,#0xC0
.org 0x8002394 :: add r0,#0x80
.org 0x80023A4 :: add r0,#0x40
.org 0x8002348 :: mov r0,#5
.org 0x8002358 :: mov r0,#5
.org 0x8002368 :: mov r0,#5
.org 0x8002378 :: mov r0,#5
//Change the maximum name size
.org 0x80DB154 :: mov r1,#7
.org 0x80DAED8 :: mov r1,#7
.org 0x80B9FB6 :: mov r1,#7
.org 0x80B9C0A :: mov r1,#7
.org 0x80B9320 :: mov r1,#7
.org 0x80B9CBC :: mov r1,#7
.org 0x80B9FF2 :: mov r1,#7
.org 0x80B93FA :: mov r1,#7
.org 0x80B9334 :: mov r1,#7
.org 0x80D28C6 :: mov r1,#7
.org 0x80BA090 :: mov r1,#7
.org 0x80EC93A :: mov r1,#7
.org 0x80B9FEE :: sub r1,#7
.org 0x80121DC :: cmp r2,#4
.org 0x8013672 :: cmp r5,#4
.org 0x80C0B0A :: cmp r2,#4 //Status window header
.org 0x80C4BBC :: cmp r2,#4 //Equip window header
.org 0x80C42C6 :: cmp r2,#4 //Outer PSI window header
.org 0x80C3FBE :: cmp r2,#4 //Inner PSI window header
.org 0x80C442E :: cmp r2,#4 //Inner PSI window - part 2 header
.org 0x80C0082 :: cmp r5,#4 //Give window header
.org 0x80DBF28 :: cmp r0,#4 //Battle menu window header
.org 0x80C97E2 :: cmp r1,#6
.org 0x80DAF3A :: cmp r0,#6
.org 0x80D33BC :: cmp r2,#6
//Default options auto-setup routine.
.org 0x80CB2F2 :: bl cb2f2_hardcoded_defaults :: b 0x80CB434
//Remove japanese name's storing and loading
.org 0x80C7524 :: nop
.org 0x80C752C :: nop
.org 0x80C76A2 :: mov r5,#0xFF
.org 0x80C76D0 :: mov r5,#0xFF
.org 0x80C76EA :: nop
.org 0x80C76F2 :: nop
.org 0x80C76FA :: nop
.org 0x80C7864 :: nop
.org 0x80C786C :: nop
.org 0x80C79C0 :: nop
.org 0x80D3AAE :: mov r0,#0xFF
//Select File name length
.org 0x8001F22 :: cmp r4,#4
.org 0x8001F3A :: cmp r4,#4
//Naming screen name length
.org 0x8004F54 :: mov r2,#5 //Ness
.org 0x8004F78 :: mov r0,#5 :: str r0,[sp,#0x18] :: bl _4f7c_window_selector //Paula
.org 0x8004F9C :: mov r0,#5 //Jeff
.org 0x8004FC0 :: mov r1,#5 //Poo
//Black bar hacks - Need to replace the position windows point at and move the >
//.org 0x80BD9DE :: mov r2,#0x16 //Ness
//.org 0x80BD9EA :: mov r2,#0x1B //Paula
//.org 0x80BD9F6 :: mov r2,#0x16 //Jeff
//.org 0x80BDA02 :: mov r2,#0x1B //Poo
//---------------------------------------------------------
// Movement code hacks
//---------------------------------------------------------
// Censor the spanking sound in Pokey's house
.org 0x8027BCB :: db 70 // Add 30 extra frames before the sound plays
.org 0x8027BD1 :: dh 84 // Replace sound effect
// Carpainter's timing fix
.org 0x802A75F :: db 0x30 //Add 8 extra frames before the game can start reading again.
//==============================================================================
// File select hacks
//==============================================================================
// Main file select window resize
.org 0x82B79BC :: dw 0x1C // new window width
.org 0x8003998 :: mov r0,1 // new window x
.org 0x8003F92 :: mov r0,1
.org 0x80053DC :: mov r0,1
.org 0x8003A04 :: bl _3a04_highlight_file //Changes window position and makes sure the file is properly highlighted
.org 0x8003B40 :: mov r0,0x10 // new cursor x
.org 0x86DB070 :: .incbin "data/m2-fileselect-template.bin"
.org 0x86D9808
.incbin "data/m2-fileselect-tileset.bin"
// Formatting
.org 0x80021E8 :: bl format_file_string
.org 0x8002284 :: bl format_file_string
//Load the pixels in fileselect_pixels_location
.org 0x80038C0 :: bl _38c0_load_pixels
// Printing
.org 0x80038CC :: mov r2,0x40 :: bl wrapper_first_file_string
.org 0x80038DE :: mov r2,0x40 :: bl wrapper_first_file_string
.org 0x80038F2 :: mov r2,0x40 :: bl wrapper_first_file_string :: bl _38f8_store_pixels
// Bump file select cursor up by 3 pixels - Not needed now that the text is 3 pixels lower
//.org 0x8003844 :: add r0,r5,1
// File select options
.org 0x8003F78 :: bl _3f78_highlight_file //Keeps highlight consistent when changing palette in the text flavour window
.org 0x8004072 :: bl _40e2_cursor_X //Removing highlight position
.org 0x8004080 :: mov r3,#4 //Remove highlight of 4 tiles maximum
.org 0x8004092 :: bl _4092_print_window_store //Printing + storing pixels
.org 0x80040E2 :: bl _40e2_cursor_X //Highlight position
.org 0x80040F4 :: mov r3,#4 //Print highlight of 4 tiles maximum
.org 0x80041D4 :: bl _41d4_cursor_X //New cursor's X
//Text Speed options
.org 0x8003BBC :: bl _4092_print_window_store //Printing + storing pixels
.org 0x8003C44 :: mov r3,#4 //Make highlighting the same speed for all text speeds
.org 0x8003FA2 :: bl _4092_print_window
.org 0x8003F8C :: mov r3,#4 //Print highlight of 4 tiles maximum
.org 0x8003E86 :: bl _3e86_special_setup //Avoid printing when not necessary
.org 0x8003EF2 :: bl _3e86_special_setup //Avoid printing when not necessary
.org 0x82B79D0 :: dw 0x10 //new window width
.org 0x86DB0FC :: .incbin "data/m2-textspeed-template.bin"
//Text Flavour options
.org 0x8003D8A :: bl _4092_print_window_store //Printing + storing pixels
.org 0x8003D86 :: mov r1,#4 //new window Y
.org 0x8003DB6 :: mov r1,#4
.org 0x8003E0C :: mov r1,#4
.org 0x8003E8C :: mov r1,#4
.org 0x8003EF8 :: mov r1,#4
.org 0x80053F2 :: mov r1,#4
.org 0x82B79E4 :: dw 0xF //new window width
.org 0x82B79E8 :: dw 0x10 //new window height
.org 0x8003DCE :: bl _3dce_fix_out_of_text_flavour
.org 0x86DB1F8 :: .incbin "data/m2-flavour-template.bin"
//Delete
.org 0x8004410 :: mov r1,#3 :: mov r2,#0x15 :: bl wrapper_delete_string
.org 0x800441E :: bl _4092_print_window_store //Printing + storing pixels
.org 0x82B7AFC :: dw 0x15 //new window width
.org 0x86DBE8C :: .incbin "data/m2-delete-template.bin"
//Copy
.org 0x8004294 :: bl _4294_print_window_store //Printing - 1 slot available
.org 0x80042BA :: bl _4092_print_window_store //Printing + storing pixels
.org 0x8004268 :: mov r2,#0x2 :: bl wrapper_copy_string
//Descriptions and Names
.org 0x80053F6 :: bl _53f6_fix_out_of_description
.org 0x8004ED2 :: bl wrapper_name_string //Printing names
.org 0x8004EDC :: bl _4edc_print_window_store //Printing + storing pixels
.org 0x86DB2B8 :: .incbin "data/m2-descriptions-template.bin"
.org 0x82B7A00 :: dw 0x86DB2B8 //Point all the descriptions + names to the same template
.org 0x82B7A14 :: dw 0x86DB2B8
.org 0x82B7A28 :: dw 0x86DB2B8
.org 0x82B7A3C :: dw 0x86DB2B8
.org 0x82B7A50 :: dw 0x86DB2B8
.org 0x82B7A64 :: dw 0x86DB2B8
//Alphabets
.org 0x80051A4 :: bl _4092_print_window_store //Printing + storing pixels - CAPITAL
.org 0x8004EA2 :: bl _4092_print_window_store //Printing + storing pixels - small
.org 0x82B7A8C :: dw 0x86DB5C4
.org 0x86DB5C4 :: .incbin "data/m2-alphabet-template.bin"
.org 0x8005222 :: bl setupCursorAction
.org 0x8005382 :: bl setupCursorMovement
.org 0x800538A :: bl setupCursorPosition //Cursor position
.org 0x800536C :: bl setupCursorPosition //Cursor position
.org 0x82B8FFC :: .incbin "data/m2-alphabet-table.bin"
.org 0x8002322 :: bl _2322_setup_windowing
//Summary
.org 0x80054F2 :: mov r2,#5 :: bl wrapper_name_summary_string //Printing Ness' name
.org 0x8005502 :: mov r2,#5 :: bl wrapper_name_summary_string //Printing Paula's name
.org 0x8005512 :: mov r2,#5 :: bl wrapper_name_summary_string //Printing Jeff's name
.org 0x8005522 :: mov r2,#5 :: bl wrapper_name_summary_string //Printing Poo's name
.org 0x800555C :: nop :: nop //Sends to a bunch of 0xFF
.org 0x800556A :: nop :: nop //Sends to a bunch of 0xFF
.org 0x8005530 :: mov r0,#0x11 //New x for King's name
.org 0x8005536 :: bl wrapper_name_summary_string //Printing King's name
.org 0x8005578 :: bl wrapper_count_pixels_to_tiles :: mov r2,#6 :: mov r4,#0x17 :: sub r0,r4,r0 //Count length of Food's name in tiles
.org 0x8005588 :: bl wrapper_name_summary_string //Printing Food's name
.org 0x8005596 :: bl wrapper_count_pixels_to_tiles :: mov r2,#6 :: sub r4,r4,r0 //Count length of Thing's name in tiles
.org 0x80055A6 :: bl wrapper_name_summary_string //Printing Thing's name
.org 0x80055B0 :: bl _4092_print_window_store //Printing + storing pixels
.org 0x80056F0 :: add r0,#0x90 //New cursor's X
.org 0x86DBC6C :: .incbin "data/m2-summary-template.bin"
//==============================================================================
// Overworld player name alphabet
//==============================================================================
//"Register your name" in buffer
.org 0x80C6C54 :: bl printstr_buffer
//BLANK name in buffer
.org 0x80C6C7A :: bl printstr_buffer
//First time entering the menu's alphabet
.org 0x80C6D72 :: bl initWindow_buffer :: ldr r0,[r5,#0x10] :: bl c6d78_print_slphabet_store
//Player name printing - character is added
.org 0x80C75B4 :: bl c75b4_overworld_naming_top_printing :: b 0x80C777A
//Player name printing - character is deleted via b button
.org 0x80C780E :: bl c780e_overworld_naming_top_printing :: b 0x80C789A
//Player name printing - character is deleted via backspace
.org 0x80C74CC :: bl c74cc_overworld_naming_top_printing :: b 0x80C755A
//Player name printing - menu is re-entered after the name has been inserted once
.org 0x80C6CC6 :: bl c6cc6_overworld_naming_top_printing :: b 0x80C6D5E
//Player name alphabet - cursor movement
.org 0x80C6F24 :: bl c6f24_overworld_alphabet_movement :: b 0x80C7340
//Alphabet - switching support - removal of unused alphabet
.org 0x80C7380 :: nop :: nop :: nop :: mov r0,r9 :: cmp r0,#0 :: beq 0x80C741A :: nop :: nop :: cmp r0,#1
//Print CAPITAL alphabet only if needed
.org 0x80C7394 :: bl c7394_CAPITAL_overworld_alphabet :: b 0x80C73B8
//Print small alphabet
.org 0x80C73B8 :: nop :: mov r0,r9 :: cmp r0,#2
//Print small alphabet only if needed
.org 0x80C73C0 :: bl c73c0_small_overworld_alphabet :: b 0x80C73E2
//Choose character table based on alphabet loaded in
.org 0x80C7578 :: bl c7578_load_letters
//==============================================================================
// Move stuff around in order to make space for the code
//==============================================================================
.org 0x82D92D4 :: dw moved_graphics_table :: dw moved_graphics_table + 0x1CD2C
.org 0x82D9BBC :: dw moved_graphics_table + 0x26618 :: dw moved_graphics_table + 0x3F818
//==============================================================================
// Lumine Hall hacks
//==============================================================================
.org 0x82DCF94
lumine_char_tilemap:
.area 4000h,00h
.incbin "data/lumine-char-tilemap.bin"
.endarea
//==============================================================================
// Cartridge choosing screen hacks
//==============================================================================
.org 0x8013C62 :: bl change_palette_needed_foreground
.org 0x8013CAA :: bl change_palette_needed_background
.org 0x86DD794 :: .incbin "data/m2-cartridge-tiles.bin"
.org 0x8706994 :: .incbin "data/m2-cartridge-arrangements.bin"
.org 0x8705794
m12_cartridge_palettes:
.incbin "data/m2-cartridge-palettes.bin"
//==============================================================================
// Data files
//==============================================================================
.org m2_default_names
.incbin "data/m2-default-names.bin"
.org 0x8B1BA88
m2_overworld_alphabet_table:
.incbin "data/m2-overworld-alphabet-table.bin"
.org 0x8B2C000
//This table MUST be 4-bytes padded
moved_graphics_table:
.incbin "data/moved-graphics-table.bin"
// Box font relocation
m2_font_relocate:
.incbin "data/m2-font-relocate.bin"
// Co-ordinate table
m2_coord_table:
.incbin "data/m2-coord-table.bin"
// Co-ordinate table, version which has 5 bits used for how many consecutive tiles there are after each tile
m2_coord_table_fast_progression:
.incbin "data/m2-coord-table-fast-progression.bin"
// EB fonts
m2_font_table:
dw m2_font_main
dw m2_font_saturn
dw m2_font_big
dw m2_font_battle
dw m2_font_tiny
m2_font_main:
.incbin "data/m2-font-main.bin"
m2_font_saturn:
.incbin "data/m2-font-saturn.bin"
m2_font_big:
.incbin "data/bigfont.bin"
m2_font_battle:
.incbin "data/m2-font-battle.bin"
m2_font_tiny:
.incbin "data/m2-font-tiny.bin"
// EB font dimensions
m2_font_widths:
db 2, 2, 2, 1, 1
.align 4
m2_font_heights:
db 2, 2, 2, 2, 1
.align 4
// EB font widths
m2_widths_table:
dw m2_widths_main
dw m2_widths_saturn
dw m2_widths_big
dw m2_widths_battle
dw m2_widths_tiny
m2_widths_main:
.incbin "data/m2-widths-main.bin"
m2_widths_saturn:
.incbin "data/m2-widths-saturn.bin"
m2_widths_big:
.incbin "data/largewidths.bin"
m2_widths_battle:
.incbin "data/m2-widths-battle.bin"
m2_widths_tiny:
.incbin "data/m2-widths-tiny.bin"
m2_bits_to_nybbles:
.incbin "data/m2-bits-to-nybbles.bin"
m2_bits_to_nybbles_fast:
.incbin "data/m2-bits-to-nybbles-fast.bin"
m2_nybbles_to_bits:
.incbin "data/m2-nybbles-to-bits.bin"
m2_enemy_attributes:
.incbin "data/m2-enemy-attributes.bin"
flyovertextYear:
.include "data/flyover-text-year.asm"
flyovertextOnett:
.include "data/flyover-text-onett.asm"
flyovertextNess:
.include "data/flyover-text-ness.asm"
flyovertextWinters:
.include "data/flyover-text-winters.asm"
flyovertextSnow:
.include "data/flyover-text-snow.asm"
flyovertextDalaam:
.include "data/flyover-text-dalaam.asm"
flyovertextPoo:
.include "data/flyover-text-poo.asm"
flyovertextLater:
.include "data/flyover-text-later.asm"
flyover_tea:
.include "data/flyover-tea.asm"
flyover_coffee:
.include "data/flyover-coffee.asm"
.align 2
m2_coord_table_file:
.incbin "data/m2-coord-table-file-select.bin"
optimized_byte_4bpp_to_1bpp_table:
.incbin "data/optimized-byte-4bpp-to-1bpp-table.bin"
m12_cartridge_palettes_dimmed:
.incbin "data/m12-cartridge-palettes-dimmed.bin"
//==============================================================================
// Existing subroutines/data
//==============================================================================
.definelabel buffer_subtractor ,0x0000800
.definelabel overworld_buffer ,0x200F200
.definelabel m2_ness_data ,0x3001D54
.definelabel m2_ness_name ,0x3001F10
.definelabel m2_old_paula_name ,0x3001F16
.definelabel m2_paula_name ,0x3001F17
.definelabel m2_old_jeff_name ,0x3001F1C
.definelabel m2_jeff_name ,0x3001F1E
.definelabel m2_old_poo_name ,0x3001F22
.definelabel m2_poo_name ,0x3001F25
.definelabel m2_old_king_name ,0x3001F28
.definelabel m2_king_name ,0x3001F2C
.definelabel m2_old_food ,0x3001F30
.definelabel m2_food ,0x3001F34
.definelabel m2_old_rockin ,0x3001F3A
.definelabel m2_rockin ,0x3001F3C
.definelabel m2_old_japanese_name ,0x3001F42
.definelabel m2_cstm_last_printed ,0x3001F4F
.definelabel m2_player1 ,0x3001F50
.definelabel m2_script_readability ,0x3004F08
.definelabel m2_psi_exist ,0x300525C
.definelabel m2_active_window_pc ,0x3005264
.definelabel m2_setup_naming_mem ,0x8001D5C
.definelabel m2_soundeffect ,0x8001720
.definelabel m2_copy_names_perm_mem ,0x8002088
.definelabel m2_reset_names ,0x8002318
.definelabel m2_copy_name_perm_mem ,0x80023C0
.definelabel m2_main_menu_handler ,0x80023F8
.definelabel m2_change_naming_space ,0x8004E08
.definelabel m2_copy_name_temp_mem ,0x8004E34
.definelabel m2_insert_default_name ,0x8005708
.definelabel m12_dim_palette ,0x80137DC
.definelabel m2_enable_script ,0x80A1F6C
.definelabel m2_sub_a334c ,0x80A334C
.definelabel m2_sub_a3384 ,0x80A3384
.definelabel m2_jump_to_offset ,0x80A6C24
.definelabel m2_get_selected_item ,0x80A469C
.definelabel m2_psitargetwindow ,0x80B8AE0
.definelabel m2_isequipped ,0x80BC670
.definelabel m2_swapwindowbuf ,0x80BD7AC
.definelabel m2_setup_window ,0x80BD844
.definelabel m2_strlookup ,0x80BE260
.definelabel m2_initwindow ,0x80BE458
.definelabel m2_initwindow_cursor ,0x80BE4C8
.definelabel m2_statuswindow_numbers,0x80C0A5C
.definelabel m2_psiwindow ,0x80C1FBC
.definelabel m2_drawwindow ,0x80C87D0
.definelabel m2_print_window ,0x80C8BE4
.definelabel m2_print_alphabet ,0x80C8FFC
.definelabel m2_printstr ,0x80C9634
.definelabel m2_printstr_hlight ,0x80C96F0
.definelabel m2_printnextch ,0x80C980C
.definelabel m2_scrolltext ,0x80CA4BC
.definelabel m2_formatnumber ,0x80CA65C
.definelabel m2_clearwindowtiles ,0x80CA834
.definelabel m2_menuwindow ,0x80C1C98
.definelabel m2_setupwindow ,0x80BE188
.definelabel m2_resetwindow ,0x80BE490
.definelabel m2_sub_d3c50 ,0x80D3C50
.definelabel m2_hpwindow_up ,0x80D3F0C
.definelabel m2_curhpwindow_down ,0x80D41D8
.definelabel m2_sub_d6844 ,0x80D6844
.definelabel m2_setupbattlename ,0x80DCD00
.definelabel m2_stat_symb_checker ,0x8B0EDA4
.definelabel m2_div ,0x80F49D8
.definelabel m2_remainder ,0x80F4A70
.definelabel cpuset ,0x80F47C0
.definelabel m2_items ,0x8B1D62C
.definelabel m2_default_names ,0x82B9330
.definelabel m2_psi_print_table ,0x8B2A9C0
//==============================================================================
// Code files
//==============================================================================
.org 0x80FCE6C
.include "syscalls.asm"
.include "m2-vwf.asm"
.include "m2-vwf-entries.asm"
.include "m2-formatting.asm"
.include "m2-customcodes.asm"
.include "m2-compiled.asm"
.include "m2-flyover.asm"
.close
|
.Model Tiny
.386
.DATA
FILE DB 'ABCD.txt',0
STORE DB 100 DUP('0')
.CODE
.Startup
;OPENING THE FILE
LEA DX, FILE
MOV AH, 3DH
MOV AL, 00H ;READING
INT 21H
;READING DATA FROM THE FILE
MOV BX, AX
MOV AH, 3FH
MOV CX, 37
LEA DX, STORE
INT 21H
MOV DI, DX
MOV AH, '$'
MOV [DI+37],AH
;DISPLAY THE DATA
MOV AH, 09H
LEA DX, STORE
INT 21H
;CLOSING THE FILE
MOV AH, 3EH
INT 21H
.EXIT
END |
; A266733: a(n) = 21*binomial(n+6,7).
; 0,21,168,756,2520,6930,16632,36036,72072,135135,240240,408408,668304,1058148,1627920,2441880,3581424,5148297,7268184,10094700,13813800,18648630,24864840,32776380,42751800,55221075,70682976,89713008,112971936,141214920,175301280,216204912,265025376,322999677,391514760,472120740,566544888,676706394,804731928,952972020,1124018280,1320721479,1546210512,1803912264,2097572400,2431277100,2809475760,3237004680,3719111760,4261482225,4870265400,5552102556,6314155848,7164138366,8110345320,9161686380,10327719192,11618684091,13045540032,14620001760,16354578240,18262612368,20358321984,22656842208,25174269120,27927704805,30935303784,34216320852,37791160344,41681426850,45909977400,50500975140,55479944520,60873828015,66711044400,73021548600,79836893136,87190291188,95116681296,103652793720,112837218480,122710475097,133315084056,144695640012,156898886760,169973793990,183971635848,198946071324,214953226488,232051778595,250303042080,269771056464,290522676192,312627662424,336158776800,361191877200,387806015520,416083537485,446110184520,477975197700
add $0,6
bin $0,7
mul $0,21
|
// Copyright (c) 2020 PaddlePaddle Authors. All Rights Reserved.
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include "include/paddlex/paddlex.h"
#include <iostream>
#include <fstream>
namespace PaddleX {
void Model::create_predictor(const std::string& model_dir,
const std::string& cfg_file,
int thread_num) {
paddle::lite_api::MobileConfig config;
config.set_model_from_file(model_dir);
config.set_threads(thread_num);
load_config(cfg_file);
predictor_ =
paddle::lite_api::CreatePaddlePredictor<paddle::lite_api::MobileConfig>(
config);
}
bool Model::load_config(const std::string& cfg_file) {
YAML::Node config = YAML::LoadFile(cfg_file);
type = config["_Attributes"]["model_type"].as<std::string>();
name = config["Model"].as<std::string>();
bool to_rgb = true;
if (config["TransformsMode"].IsDefined()) {
std::string mode = config["TransformsMode"].as<std::string>();
if (mode == "BGR") {
to_rgb = false;
} else if (mode != "RGB") {
std::cerr << "[Init] Only 'RGB' or 'BGR' is supported for TransformsMode"
<< std::endl;
return false;
}
}
// init preprocess ops
transforms_.Init(config["Transforms"], to_rgb);
// read label list
for (const auto& item : config["_Attributes"]["labels"]) {
int index = labels.size();
labels[index] = item.as<std::string>();
}
return true;
}
bool Model::preprocess(cv::Mat* input_im, ImageBlob* inputs) {
if (!transforms_.Run(input_im, inputs)) {
return false;
}
return true;
}
bool Model::predict(const cv::Mat& im, ClsResult* result) {
inputs_.clear();
if (type == "detector") {
std::cerr << "Loading model is a 'detector', DetResult should be passed to "
"function predict()!"
<< std::endl;
return false;
} else if (type == "segmenter") {
std::cerr << "Loading model is a 'segmenter', SegResult should be passed "
"to function predict()!"
<< std::endl;
return false;
}
// preprocess
inputs_.input_tensor_ = std::move(predictor_->GetInput(0));
cv::Mat im_clone = im.clone();
if (!preprocess(&im_clone, &inputs_)) {
std::cerr << "Preprocess failed!" << std::endl;
return false;
}
// predict
predictor_->Run();
std::unique_ptr<const paddle::lite_api::Tensor> output_tensor(
std::move(predictor_->GetOutput(0)));
const float *outputs_data = output_tensor->mutable_data<float>();
// postprocess
auto ptr = std::max_element(outputs_data, outputs_data+sizeof(outputs_data));
result->category_id = std::distance(outputs_data, ptr);
result->score = *ptr;
result->category = labels[result->category_id];
}
bool Model::predict(const cv::Mat& im, DetResult* result) {
inputs_.clear();
result->clear();
if (type == "classifier") {
std::cerr << "Loading model is a 'classifier', ClsResult should be passed "
"to function predict()!" << std::endl;
return false;
} else if (type == "segmenter") {
std::cerr << "Loading model is a 'segmenter', SegResult should be passed "
"to function predict()!" << std::endl;
return false;
}
inputs_.input_tensor_ = std::move(predictor_->GetInput(0));
cv::Mat im_clone = im.clone();
if (!preprocess(&im_clone, &inputs_)) {
std::cerr << "Preprocess failed!" << std::endl;
return false;
}
int h = inputs_.new_im_size_[0];
int w = inputs_.new_im_size_[1];
if (name == "YOLOv3") {
std::unique_ptr<paddle::lite_api::Tensor> im_size_tensor(
std::move(predictor_->GetInput(1)));
const std::vector<int64_t> IM_SIZE_SHAPE = {1, 2};
im_size_tensor->Resize(IM_SIZE_SHAPE);
auto *im_size_data = im_size_tensor->mutable_data<int>();
memcpy(im_size_data, inputs_.ori_im_size_.data(), 1*2*sizeof(int));
}
predictor_->Run();
auto output_names = predictor_->GetOutputNames();
auto output_box_tensor = predictor_->GetTensor(output_names[0]);
const float *output_box = output_box_tensor->mutable_data<float>();
std::vector<int64_t> output_box_shape = output_box_tensor->shape();
int size = 1;
for (const auto& i : output_box_shape) {
size *= i;
}
int num_boxes = size / 6;
for (int i = 0; i < num_boxes; ++i) {
Box box;
box.category_id = static_cast<int>(round(output_box[i * 6]));
box.category = labels[box.category_id];
box.score = output_box[i * 6 + 1];
float xmin = output_box[i * 6 + 2];
float ymin = output_box[i * 6 + 3];
float xmax = output_box[i * 6 + 4];
float ymax = output_box[i * 6 + 5];
float w = xmax - xmin + 1;
float h = ymax - ymin + 1;
box.coordinate = {xmin, ymin, w, h};
result->boxes.push_back(std::move(box));
}
return true;
}
bool Model::predict(const cv::Mat& im, SegResult* result) {
result->clear();
inputs_.clear();
if (type == "classifier") {
std::cerr << "Loading model is a 'classifier', ClsResult should be passed "
"to function predict()!" << std::endl;
return false;
} else if (type == "detector") {
std::cerr << "Loading model is a 'detector', DetResult should be passed to "
"function predict()!" << std::endl;
return false;
}
inputs_.input_tensor_ = std::move(predictor_->GetInput(0));
cv::Mat im_clone = im.clone();
if (!preprocess(&im_clone, &inputs_)) {
std::cerr << "Preprocess failed!" << std::endl;
return false;
}
std::cout << "Preprocess is done" << std::endl;
predictor_->Run();
auto output_names = predictor_->GetOutputNames();
auto output_label_tensor = predictor_->GetTensor(output_names[0]);
const int64_t *label_data = output_label_tensor->mutable_data<int64_t>();
std::vector<int64_t> output_label_shape = output_label_tensor->shape();
int size = 1;
for (const auto& i : output_label_shape) {
size *= i;
result->label_map.shape.push_back(i);
}
result->label_map.data.resize(size);
memcpy(result->label_map.data.data(), label_data, size*sizeof(int64_t));
auto output_score_tensor = predictor_->GetTensor(output_names[1]);
const float *score_data = output_score_tensor->mutable_data<float>();
std::vector<int64_t> output_score_shape = output_score_tensor->shape();
size = 1;
for (const auto& i : output_score_shape) {
size *= i;
result->score_map.shape.push_back(i);
}
result->score_map.data.resize(size);
memcpy(result->score_map.data.data(), score_data, size*sizeof(float));
std::vector<uint8_t> label_map(result->label_map.data.begin(),
result->label_map.data.end());
cv::Mat mask_label(result->label_map.shape[1],
result->label_map.shape[2],
CV_8UC1,
label_map.data());
cv::Mat mask_score(result->score_map.shape[2],
result->score_map.shape[3],
CV_32FC1,
result->score_map.data.data());
int idx = 1;
int len_postprocess = inputs_.im_size_before_resize_.size();
for (std::vector<std::string>::reverse_iterator iter =
inputs_.reshape_order_.rbegin();
iter != inputs_.reshape_order_.rend();
++iter) {
if (*iter == "padding") {
auto before_shape = inputs_.im_size_before_resize_[len_postprocess - idx];
inputs_.im_size_before_resize_.pop_back();
auto padding_w = before_shape[0];
auto padding_h = before_shape[1];
mask_label = mask_label(cv::Rect(0, 0, padding_h, padding_w));
mask_score = mask_score(cv::Rect(0, 0, padding_h, padding_w));
} else if (*iter == "resize") {
auto before_shape = inputs_.im_size_before_resize_[len_postprocess - idx];
inputs_.im_size_before_resize_.pop_back();
auto resize_w = before_shape[0];
auto resize_h = before_shape[1];
cv::resize(mask_label,
mask_label,
cv::Size(resize_h, resize_w),
0,
0,
cv::INTER_NEAREST);
cv::resize(mask_score,
mask_score,
cv::Size(resize_h, resize_w),
0,
0,
cv::INTER_LINEAR);
}
++idx;
}
result->label_map.data.assign(mask_label.begin<uint8_t>(),
mask_label.end<uint8_t>());
result->label_map.shape = {mask_label.rows, mask_label.cols};
result->score_map.data.assign(mask_score.begin<float>(),
mask_score.end<float>());
result->score_map.shape = {mask_score.rows, mask_score.cols};
return true;
}
} // namespace PaddleX
|
#include <algorithm>
#include <cstring>
#include <iostream>
#include "tcptlssession.h"
static ssize_t gnutls_pull_trampoline(gnutls_transport_ptr_t h, void *buf, size_t len)
{
auto session = static_cast<TCPTLSSession*>(h);
return session->gnutls_pull(buf, len);
}
static ssize_t gnutls_push_trampoline(gnutls_transport_ptr_t h, const void *buf, size_t len)
{
auto session = static_cast<TCPTLSSession*>(h);
return session->gnutls_push(buf, len);
}
TCPTLSSession::TCPTLSSession(std::shared_ptr<uvw::TcpHandle> handle,
TCPSession::malformed_data_cb malformed_data_handler,
TCPSession::got_dns_msg_cb got_dns_msg_handler,
TCPSession::connection_ready_cb connection_ready_handler,
handshake_error_cb handshake_error_handler)
: TCPSession(handle, malformed_data_handler, got_dns_msg_handler, connection_ready_handler),
_tls_state{LinkState::HANDSHAKE}, _handshake_error{handshake_error_handler}
{
}
TCPTLSSession::~TCPTLSSession()
{
gnutls_certificate_free_credentials(_gnutls_cert_credentials);
gnutls_deinit(_gnutls_session);
}
bool TCPTLSSession::setup()
{
int ret;
ret = gnutls_init(&_gnutls_session, GNUTLS_CLIENT | GNUTLS_NONBLOCK);
if (ret != GNUTLS_E_SUCCESS) {
std::cerr << "GNUTLS init failed: " << gnutls_strerror(ret) << std::endl;
return false;
}
ret = gnutls_set_default_priority(_gnutls_session);
if (ret != GNUTLS_E_SUCCESS) {
std::cerr << "GNUTLS failed to set default priority: " << gnutls_strerror(ret) << std::endl;
return false;
}
ret = gnutls_certificate_allocate_credentials(&_gnutls_cert_credentials);
if (ret < 0) {
std::cerr << "GNUTLS failed to allocate credentials: " << gnutls_strerror(ret) << std::endl;
return false;
}
ret = gnutls_certificate_set_x509_system_trust(_gnutls_cert_credentials);
if (ret < 0) {
std::cerr << "GNUTLS failed to set system trust: " << gnutls_strerror(ret) << std::endl;
return false;
}
ret = gnutls_credentials_set(_gnutls_session, GNUTLS_CRD_CERTIFICATE,
_gnutls_cert_credentials);
if (ret < 0) {
std::cerr << "GNUTLS failed to set system credentials" << gnutls_strerror(ret) << std::endl;
return false;
}
gnutls_transport_set_ptr(_gnutls_session, this);
gnutls_transport_set_pull_function(_gnutls_session, gnutls_pull_trampoline);
gnutls_transport_set_push_function(_gnutls_session, gnutls_push_trampoline);
gnutls_handshake_set_timeout(_gnutls_session, GNUTLS_DEFAULT_HANDSHAKE_TIMEOUT);
return true;
}
void TCPTLSSession::on_connect_event()
{
do_handshake();
}
// gracefully terminate the session
void TCPTLSSession::close()
{
_tls_state = LinkState::CLOSE;
gnutls_bye(_gnutls_session, GNUTLS_SHUT_WR);
TCPSession::close();
}
void TCPTLSSession::receive_data(const char data[], size_t len)
{
_pull_buffer.append(data, len);
switch(_tls_state) {
case LinkState::HANDSHAKE:
do_handshake();
break;
case LinkState::DATA:
for (;;) {
char buf[2048];
ssize_t len = gnutls_record_recv(_gnutls_session, buf, sizeof(buf));
if (len > 0) {
TCPSession::receive_data(buf, len);
} else {
break;
}
}
break;
case LinkState::CLOSE:
break;
}
}
void TCPTLSSession::write(std::unique_ptr<char[]> data, size_t len)
{
ssize_t sent = gnutls_record_send(_gnutls_session, data.get(), len);
if (sent < 0) {
std::cerr << "Error in sending data: " << gnutls_strerror(sent) << std::endl;
}
}
void TCPTLSSession::do_handshake()
{
int err = gnutls_handshake(_gnutls_session);
if (err == GNUTLS_E_SUCCESS) {
_tls_state = LinkState::DATA;
TCPSession::on_connect_event();
} else if (err < 0 && gnutls_error_is_fatal(err)) {
std::cerr << "Handshake failed: " << gnutls_strerror(err) << std::endl;
_handshake_error();
} else if (err != GNUTLS_E_AGAIN && err != GNUTLS_E_INTERRUPTED) {
std::cout << "Handshake " << gnutls_strerror(err) << std::endl;
}
}
int TCPTLSSession::gnutls_pull(void *buf, size_t len)
{
if (!_pull_buffer.empty()) {
len = std::min(len, _pull_buffer.size());
std::memcpy(buf, _pull_buffer.data(), len);
_pull_buffer.erase(0, len);
return len;
}
errno = EAGAIN;
return -1;
}
int TCPTLSSession::gnutls_push(const void *buf, size_t len)
{
auto data = std::make_unique<char[]>(len);
memcpy(data.get(), const_cast<char *>(reinterpret_cast<const char *>(buf)), len);
TCPSession::write(std::move(data), len);
return len;
}
|
; A188146: Three interleaved 1st-order polynomials: a(3*n) = 1+4*n, a(1+3*n) = 3+4*n, a(2+3*n) = 1+n.
; 1,3,1,5,7,2,9,11,3,13,15,4,17,19,5,21,23,6,25,27,7,29,31,8,33,35,9,37,39,10,41,43,11,45,47,12,49,51,13,53,55,14,57,59,15,61,63,16,65,67,17,69,71,18,73,75,19,77,79,20,81,83,21,85,87,22,89,91,23,93,95,24,97,99,25,101,103,26,105,107,27,109,111,28,113,115,29,117,119,30,121,123,31,125,127,32,129,131,33,133
sub $0,1
mul $0,4
div $0,3
add $0,3
dif $0,2
dif $0,2
|
; First two frames in main memory
org SCR_MEM_1
ins "frames/f0.bin"
org SCR_MEM_2
ins "frames/f1.bin"
icl 'src\atari.inc'
icl 'src\macros.asm'
FRAME_COUNT equ 104
SCR_MEM_1 equ $4150
SCR_MEM_1_P2 equ $5000
SCR_MEM_2 equ $6150
SCR_MEM_2_P2 equ $7000
@TAB_MEM_BANKS equ $0600
MAX_NAME_LEN equ 12
NAMES_BANK equ 52
NAMES_PER_SEX equ 500
ZERO_DIGIT_OFFSET equ 66
AMPERSAND_PIXEL_COUNT equ 176
SHADE_COLOR equ $b0
TIMER_LENGTH equ 14
TIMER_SHADOW_COLOR equ $0f
TIMER_COLOR equ $e4
PLAYER_DRAW_LIMIT equ 224
TIMER_START_CHAR equ 29
TIMER_NEXT_CHAR_1 equ 82
TIMER_NEXT_CHAR_2 equ 83
TIMER_NEXT_CHAR_3 equ 84
TIMER_NEXT_CHAR_4 equ 85
TIMER_NEXT_CHAR_5 equ 86
TIMER_NEXT_CHAR_6 equ 79
TIMER_NEXT_CHAR_7 equ 80
FADE_START_CHAR equ 29
FADE_NEXT_CHAR_1 equ 30
FADE_NEXT_CHAR_2 equ 31
FADE_NEXT_CHAR_3 equ 61
FADE_NEXT_CHAR_4 equ 62
FADE_NEXT_CHAR_5 equ 63
FADE_SPEED equ 47
QUOTE_TARGET_COLOR equ 10
LEVEL_TIMER_ADDRESS equ STATUS_BAR_BUFFER+$0c
P1_COLOR_1 equ $1a
P1_COLOR_2 equ $24
P2_COLOR_1 equ $98
P2_COLOR_2 equ $46
.zpvar P1_Y_TABLE .word
.zpvar P1_X_TABLE .word
.zpvar P2_Y_TABLE .word
.zpvar P2_X_TABLE .word
.zpvar P1_SCORE .byte
.zpvar P1_SCORE_H .byte ; 'H' is for hundred
.zpvar P1_H_PAINTED .byte
.zpvar P2_SCORE .byte
.zpvar P2_SCORE_H .byte ; 'H' is for hundred
.zpvar P2_H_PAINTED .byte
.zpvar P1_INVUL .byte
.zpvar P1_VISIBLE .byte
.zpvar P2_INVUL .byte
.zpvar P2_VISIBLE .byte
.zpvar P1_DRAWING_Y_OFFSET .byte
.zpvar P2_DRAWING_Y_OFFSET .byte
.zpvar P1_CPU .byte
.zpvar P2_CPU .byte
.zpvar STRIG_0_SOURCE .word
.zpvar STRIG_1_SOURCE .word
.zpvar STRIG0_CPU .word
.zpvar STRIG1_CPU .word
.zpvar STRIG0_CPU_HOLD .byte
.zpvar STRIG1_CPU_HOLD .byte
.zpvar XTMP .word
.zpvar XTMP1 .word
.zpvar XTMP2 .word
.zpvar QUOTE_COLOR .byte
.zpvar TIMER_PTR .word
.zpvar TIMER_COUNTER .byte
.zpvar IN_GAME .byte
.zpvar REDUCE_TIMER .byte
.zpvar GAME_OVER .byte
.zpvar QUOTE_COLOR_COUNTER .byte
QUOTE_COLOR_COOLDOWN equ 11
.zpvar P1_INVUL_COUNTER .byte
.zpvar P2_INVUL_COUNTER .byte
INVUL_COOLDOWN equ 5
.zpvar P1_INVUL_DISABLE_COUNTER .byte
.zpvar P2_INVUL_DISABLE_COUNTER .byte
INVUL_ROTATIONS equ 4
.zpvar SCORE_JUST_INCREASED .byte
SCORE_INCREASE_COOLDOWN equ 4
// 0 - 51 - slower rotation (52 frames)
// 52 - 85 - faster rotation (34 frames)
// 86 - 103 - fastest rotation (18 frames)
.zpvar CURRENT_FRAME .byte
.zpvar P1_X .byte
.zpvar P1_Y .byte
.zpvar P2_X .byte
.zpvar P2_Y .byte
P1_X_POSITION equ $50
P2_X_POSITION equ $aa
.zpvar DYING_JUMP_COUNTER_1 .byte
.zpvar DYING_JUMP_COUNTER_2 .byte
DYING_JUMP_COOLDOWN equ 2
DYING_JUMP_COOLDOWN_FAST equ 1
.zpvar JUMP_COUNTER_1 .byte
.zpvar JUMP_COUNTER_2 .byte
.zpvar JUMP_INTERRUPTED_1 .byte
.zpvar JUMP_INTERRUPTED_2 .byte
JUMP_FRAME_COUNT equ 46
JUMP_FRAME_ADVANCE equ 1
JUMP_INTERRUPT_RATIO equ 6
JUMP_HOLD_DISRUPTION equ 6
.zpvar DYING_POS_X_P1 .byte
.zpvar DYING_POS_X_P2 .byte
.zpvar P1_STATE .byte
.zpvar P2_STATE .byte
PS_IDLE equ 0
PS_JUMP equ 1
PS_DYING equ 2
PS_BURIED equ 3
; Each level maps to these parameters that control
; the speed of background rotation
; 1) Number of frames to skip before advancing to next rotator position
; 2) First animation frame
; 3) Last animation frame
.zpvar CURRENT_GAME_LEVEL .byte
LAST_GAME_LEVEL equ 12
.zpvar CURRENT_ROTATION_COOLDOWN .byte
.zpvar CURRENT_ROTATIONS .byte
.zpvar FIRST_FRAME .byte
.zpvar LAST_FRAME .byte
.zpvar ANTIC_XTMP .byte
//------------------------------------------------
// Memory detection
//------------------------------------------------
org $600
INIT_00
MAX_BANKS = 64 ; maksymalna liczba banków pamięci
LDA $7FFF ; bajt z pamięci podstawowej
STA TEMP
LDX #MAX_BANKS-1
_s1 LDA dBANK,X
STA PORTB
LDA $7FFF
STA dSAFE,X
DEX
BPL _s1
LDX #MAX_BANKS-1
_s2 LDA dBANK,X
STA PORTB
STA $7FFF
DEX
BPL _s2
LDA #$FF
STA PORTB
STA $7FFF
STA @TAB_MEM_BANKS ; pierwszy wpis w @TAB_MEM_BANKS = $FF
LDY #0
LDX #MAX_BANKS-1
LOP LDA dBANK,X
STA PORTB
CMP $7FFF
BNE SKP
STA @TAB_MEM_BANKS+1,Y
INY
SKP
DEX
BPL LOP
LDX #MAX_BANKS-1
_r3 LDA dBANK,X
STA PORTB
LDA dSAFE,X
STA $7FFF
DEX
BPL _r3
LDA #$FF
STA PORTB
LDA #0 ; przywracamy starą zawartość komórki pamięci spod adresu $7FFF w pamięci podstawowej
TEMP EQU *-1
STA $7FFF
TYA ; w regA liczba odnalezionych banków dodatkowej pamięci
rts
dBANK DTA B($E3),B($C3),B($A3),B($83),B($63),B($43),B($23),B($03)
DTA B($E7),B($C7),B($A7),B($87),B($67),B($47),B($27),B($07)
DTA B($EB),B($CB),B($AB),B($8B),B($6B),B($4B),B($2B),B($0B)
DTA B($EF),B($CF),B($AF),B($8F),B($6F),B($4F),B($2F),B($0F)
DTA B($ED),B($CD),B($AD),B($8D),B($6D),B($4D),B($2D),B($0D)
DTA B($E9),B($C9),B($A9),B($89),B($69),B($49),B($29),B($09)
DTA B($E5),B($C5),B($A5),B($85),B($65),B($45),B($25),B($05)
DTA B($E1),B($C1),B($A1),B($81),B($61),B($41),B($21),B($01)
dSAFE .ds MAX_BANKS
org $2000
; --------- DLIST & PMG data --------------------------
PMG_BASE
SCENE_DISPLAY_LIST
DLIST_GAME
:2 dta b($70)
dta b($50)
dta b(%10000000) ; DLI - top of the screen
dta b($00)
DLIST_MEM_TOP
dta b($4f)
DLIST_ADDR_TOP
dta a($0000)
:26 dta b($0f)
dta b(%10001111) ; DLI - before gameover text
:66 dta b($0f)
DLIST_MEM_BOTTOM
dta b($4f)
DLIST_ADDR_BOTTOM
dta a($0000)
:92 dta b($0f)
:3 dta b($0f)
dta b(%10001111) ; DLI - before status bar
dta b($0f)
dta b($20)
dta b($42),a(STATUS_BAR_BUFFER)
dta b($41),a(DLIST_GAME)
DL_MAIN_AREA
dta b('J')
dta b('E')
dta b('B')
dta b('A')
dta b('C')
dta b(' ')
dta b('P')
dta b('I')
dta b('S')
dta b(%00000100)
dta b(%00000100)
dta b(%00000100)
dta b(%00000100)
dta b(%00000100)
dta b(%00000100)
dta b(%00000100)
dta b(%00000100)
dta b(%00000100)
dta b($40)
dta b(%00000010)
dta b(%00000010)
dta b(%00000010)
dta b(%00000010)
dta b($41), a(SCENE_DISPLAY_LIST)
DLIST_TITLE_SCREEN
:4 dta b($70)
dta b($f0) ; DLI - top
dta b($70)
dta b($47)
dta a(SCR_MEM_MENU)
dta b($70)
:24 dta b($0f)
dta b($70)
dta b($07)
dta b($70)
dta b($70)
dta b($70)
dta b($f0) ; DLI - quotation font
dta b($70)
dta b($40)
dta b($02)
dta b($10)
dta b($02)
dta b($10)
dta b($02)
dta b($40)
dta b($02)
dta b($41), a(DLIST_TITLE_SCREEN)
:$800 dta b(0)
PMG_M0 equ PMG_BASE+$300
PMG_P0 equ PMG_BASE+$400
PMG_P1 equ PMG_BASE+$500
PMG_P2 equ PMG_BASE+$600
PMG_P3 equ PMG_BASE+$700
PMG_END equ PMG_BASE+$800
PMG_S_M0 equ PMG_BASE+$180
PMG_S_P0 equ PMG_BASE+$200
PMG_S_P1 equ PMG_BASE+$280
PMG_S_P2 equ PMG_BASE+$300
PMG_S_P3 equ PMG_BASE+$380
PMG_S_END equ PMG_BASE+$400
//------------------------------------------------
// Main program start
//------------------------------------------------
PROGRAM_START_FIRST_PART
jsr DISABLE_ANTIC
lda <DLI_ROUTINE_GAME
sta VDSLST
lda >DLI_ROUTINE_GAME
sta VDSLST+1
jsr PLAY_INGAME_MUSIC
jsr GAME_STATE_INIT
ldx <DLIST_GAME
ldy >DLIST_GAME
stx SDLSTL
sty SDLSTL+1
jsr ENABLE_ANTIC
inc IN_GAME
jsr GAME_ENGINE_INIT
jsr PAINT_TIMER
jsr PAINT_TIMER_SHADOW
jsr INIT_TIMER
GAME_LOOP
#if .byte P1_STATE = #PS_BURIED .and .byte P2_STATE = #PS_BURIED
jsr ENTER_GAMEOVER
#end
jsr TIMER_TICK
jsr SYNCHRO
jsr RESTART_TICK
lda #$ff
sta CH
lda GAME_OVER
bne GL_1
jsr AI_TICK
jsr PLAYER_TICK
jsr JOIN_PLAYER_TICK
GL_1 ldx CURRENT_FRAME
jsr SHOW_FRAME
jsr CHECK_SCORE
jsr CHECK_COLLISIONS
ldy #0
sty ATRACT
lda (STRIG_0_SOURCE),y
bne @+
START_JUMP 1
@ ldx #0
lda (STRIG_1_SOURCE,x)
bne @+
START_JUMP 2
@ jmp GAME_LOOP
AI_TICK AI_PLAYER_TICK 1 0
AI_PLAYER_TICK 2 1
RELEASE_AI_KEY 1 0
RELEASE_AI_KEY 2 1
rts
MUSIC_INIT
ldx <CMC_MUSIC
ldy >CMC_MUSIC
lda #$70
jsr CMC_PLAYER+3
rts
PLAY_MENU_MUSIC
lda #$10
ldx #19
jsr CMC_PLAYER+3
rts
PLAY_INGAME_MUSIC
lda #$10
ldx #0
jsr CMC_PLAYER+3
rts
PLAY_FADEIN_MUSIC
lda #$10
ldx #39
jsr CMC_PLAYER+3
rts
PLAY_FADEOUT_MUSIC
lda #$10
ldx #42
jsr CMC_PLAYER+3
rts
PLAY_ENDGAME_MUSIC
lda #$10
ldx #33
jsr CMC_PLAYER+3
rts
PAINT_TIMER_SHADOW
lda #$ff
ldy #7
@ sta PMG_P0+227,y
sta PMG_P1+227,y
dey
cpy #$ff
bne @-
rts
PAINT_TIMER
lda #TIMER_START_CHAR
ldy #TIMER_LENGTH
ldx #(40/2)+(TIMER_LENGTH/2)-1
@ sta STATUS_BAR_BUFFER,x
dex
dey
bne @-
mwa #((40/2)+(TIMER_LENGTH/2)-1)+STATUS_BAR_BUFFER TIMER_PTR
rts
INIT_TIMER
lda #0
sta TIMER_COUNTER
sta REDUCE_TIMER
rts
TIMER_TICK
lda REDUCE_TIMER
beq TT_X
ldy #0
#if .word TIMER_PTR > #LEVEL_TIMER_ADDRESS
lda (TIMER_PTR),y
jsr GET_NEXT_TIMER_CHAR
sta (TIMER_PTR),y
#end
ldx #0
stx REDUCE_TIMER
cmp #TIMER_START_CHAR+128
bne TT_X
dew TIMER_PTR
TT_X rts
GET_NEXT_TIMER_CHAR
cmp #TIMER_START_CHAR
bne @+
lda #TIMER_NEXT_CHAR_1
rts
@ cmp #TIMER_NEXT_CHAR_1
bne @+
lda #TIMER_NEXT_CHAR_2
rts
@ cmp #TIMER_NEXT_CHAR_2
bne @+
lda #TIMER_NEXT_CHAR_3
rts
@ cmp #TIMER_NEXT_CHAR_3
bne @+
lda #TIMER_NEXT_CHAR_4
rts
@ cmp #TIMER_NEXT_CHAR_4
bne @+
lda #TIMER_NEXT_CHAR_5
rts
@ cmp #TIMER_NEXT_CHAR_5
bne @+
lda #TIMER_NEXT_CHAR_6
rts
@ cmp #TIMER_NEXT_CHAR_6
bne @+
lda #TIMER_NEXT_CHAR_7
rts
@ lda #TIMER_START_CHAR+128
rts
JOIN_PLAYER_TICK
lda P1_CPU
beq JPT_1
lda STRIG0
bne JPT_1
lda P1_STATE
cmp #PS_DYING
beq JPT_1
cmp #PS_BURIED
beq JPT_1
dec P1_CPU
lda #<STRIG0
sta STRIG_0_SOURCE
lda #>STRIG0
sta STRIG_0_SOURCE+1
jsr PAINT_AI_INDICATORS
rts
JPT_1 lda P2_CPU
beq JPT_2
lda STRIG1
bne JPT_2
lda P2_STATE
cmp #PS_DYING
beq JPT_2
cmp #PS_BURIED
beq JPT_2
dec P2_CPU
lda #<STRIG1
sta STRIG_1_SOURCE
lda #>STRIG1
sta STRIG_1_SOURCE+1
jsr PAINT_AI_INDICATORS
JPT_2 rts
RESTART_TICK
lda CH
cmp #28
beq RT_1
#if .byte P1_STATE <> #PS_BURIED .or .byte P2_STATE <> #PS_BURIED
rts
#end
lda CONSOL
cmp #6
bne RT_X
RT_1 jsr HIDE_SPRITES
pla
pla
jmp TITLE_SCREEN
RT_X rts
; A=1 - yes
; A=0 - no
SHOULD_UPDATE_SCORE
lda SCORE_JUST_INCREASED
cmp #0
beq SUS_0
dec SCORE_JUST_INCREASED
lda #0
rts
SUS_0 lda #1
rts
HIDE_SPRITES
lda #0
sta HPOSP0
sta HPOSP1
sta HPOSP2
sta HPOSP3
rts
CHECK_SCORE
jsr SHOULD_UPDATE_SCORE
beq CS_X
#if .byte CURRENT_FRAME = #0+3 .or .byte CURRENT_FRAME = #52+3 .or .byte CURRENT_FRAME = #86+3
jmp CS_1
#end
CS_X rts
CS_1 jsr ADVANCE_SCORES
jsr PAINT_POINTS
ldx #SCORE_INCREASE_COOLDOWN
stx SCORE_JUST_INCREASED
rts
ENABLE_INVUL
jsr ADVANCE_SCORES
lda #1
sta P1_INVUL
sta P2_INVUL
lda #INVUL_COOLDOWN
sta P1_INVUL_COUNTER
sta P2_INVUL_COUNTER
ldx CURRENT_GAME_LEVEL
lda INVUL_ROTATIONS_PER_LEVEL,x
sta P1_INVUL_DISABLE_COUNTER
sta P2_INVUL_DISABLE_COUNTER
rts
DISABLE_INVUL
DISABLE_PLAYER_INVUL 1
DISABLE_PLAYER_INVUL 2
rts
ADVANCE_SCORES
ADVANCE_PLAYER_SCORES 1
ADVANCE_PLAYER_SCORES 2
rts
PLAYER_TICK
PLAYER_PLAYER_TICK 1
PLAYER_PLAYER_TICK 2
rts
CLEAR_PLAYERS
CLEAR_PLAYER 1
CLEAR_PLAYER 2
rts
CHECK_COLLISIONS
CHECK_PLAYER_COLLISIONS 1
CHECK_PLAYER_COLLISIONS 2
rts
BACKGROUND_TICK
dec CURRENT_ROTATION_COOLDOWN
bne BT_X ; Still not a good time to advance the rotation
inc CURRENT_FRAME
jsr INIT_LEVEL_PARAMS
lda CURRENT_FRAME
ldy CURRENT_GAME_LEVEL
cmp LAST_FRAME_PER_LEVEL,y
bne BT_X
ldy CURRENT_GAME_LEVEL
lda FIRST_FRAME_PER_LEVEL,y
sta CURRENT_FRAME
dec CURRENT_ROTATIONS
bne BT_X
; Advance to next level
lda CURRENT_GAME_LEVEL
cmp #LAST_GAME_LEVEL-1
beq BT_X
jsr ADVANCE_LEVEL
BT_X rts
ADVANCE_LEVEL
jsr ENABLE_INVUL
inc CURRENT_GAME_LEVEL
jsr INIT_LEVEL_PARAMS
ldy CURRENT_GAME_LEVEL
lda ROTATIONS_PER_LEVEL,y
sta CURRENT_ROTATIONS
jsr PAINT_TIMER
jsr INIT_TIMER
rts
PAINT_PLAYERS_PRECALC
tya
pha
txa
tay
lda (XTMP),y
sta XTMP1
lda (XTMP2),y
sta XTMP1+1
pla
tay
lda XTMP1
rts
ADD_FRAME_OFFSET
beq AFO_X
tya
asl
tay
adw XTMP PLAYER_DATA_OFFSETS,y
adw XTMP2 PLAYER_DATA_OFFSETS,y
AFO_X rts
PAINT_PLAYERS
; Paint left player
#if .byte P1_STATE <> #PS_BURIED
mwa #PLAYER_DATA_00 XTMP
mwa #PLAYER_DATA_01 XTMP2
ldy P1_Y
jsr ADD_FRAME_OFFSET
ldy P1_Y
lda (P1_Y_TABLE),y
sec
sbc P1_DRAWING_Y_OFFSET
tay
ldx #0
@ tya
#if .byte @ < #PLAYER_DRAW_LIMIT
jsr PAINT_PLAYERS_PRECALC
sta PMG_P0,y
lda XTMP1+1
sta PMG_P1,y
#end
iny
inx
cpx #20
bne @-
#end
; Paint right player
#if .byte P2_STATE <> #PS_BURIED
mwa #PLAYER_DATA_02 XTMP
mwa #PLAYER_DATA_03 XTMP2
ldy P2_Y
jsr ADD_FRAME_OFFSET
ldy P2_Y
lda (P2_Y_TABLE),y
sec
sbc P2_DRAWING_Y_OFFSET
tay
ldx #0
@ tya
#if .byte @ < #PLAYER_DRAW_LIMIT
jsr PAINT_PLAYERS_PRECALC
sta PMG_P2,y
lda XTMP1+1
sta PMG_P3,y
#end
iny
inx
cpx #20
bne @-
#end
rts
GAME_ENGINE_INIT
; Enable sprites
lda #>PMG_BASE
sta PMBASE
lda #%01100001
sta GPRIOR
lda #%00000011
sta GRACTL
lda SDMCTL
ora #%00011100
sta SDMCTL
rts
INIT_PLAYERS
lda #P1_X_POSITION
sta P1_X
lda #P2_X_POSITION
sta P2_X
lda #0
sta P1_Y
sta P2_Y
lda #P1_COLOR_1
sta PCOLR0
lda #P1_COLOR_2
sta PCOLR1
lda #P2_COLOR_1
sta PCOLR2
lda #P2_COLOR_2
sta PCOLR3
lda #PS_IDLE
sta P1_STATE
sta P2_STATE
lda P1_X
sta HPOSP0
sta HPOSP1
lda P2_X
sta HPOSP2
sta HPOSP3
rts
; Number of frames in X
WAIT_FRAMES
cpx #0
beq @+
jsr SYNCHRO
dex
jmp WAIT_FRAMES
@ rts
SYNCHRO
lda PAL
beq SYN_0
lda #120 ; NTSC
jmp SYN_1
SYN_0 lda #145 ; PAL
SYN_1 cmp VCOUNT
bne SYN_1
rts
INIT_LEVEL_PARAMS
ldy CURRENT_GAME_LEVEL
lda ROTATION_COOLDOWN_TAB,y
sta CURRENT_ROTATION_COOLDOWN
rts
GAME_STATE_INIT
lda #$ff
sta CH
lda #1
sta P1_VISIBLE
sta P2_VISIBLE
sta P1_CPU
sta P2_CPU
sta STRIG0_CPU
sta STRIG1_CPU
lda #<STRIG0_CPU
sta STRIG_0_SOURCE
lda #>STRIG0_CPU
sta STRIG_0_SOURCE+1
lda #<STRIG1_CPU
sta STRIG_1_SOURCE
lda #>STRIG1_CPU
sta STRIG_1_SOURCE+1
lda #0
sta GAME_OVER
sta STRIG0_CPU_HOLD
sta STRIG1_CPU_HOLD
sta P1_DRAWING_Y_OFFSET
sta P2_DRAWING_Y_OFFSET
sta SCORE_JUST_INCREASED
sta CURRENT_GAME_LEVEL
sta P1_SCORE
sta P2_SCORE
sta P1_SCORE_H
sta P2_SCORE_H
sta P1_INVUL
sta P2_INVUL
tay
lda FIRST_FRAME_PER_LEVEL,y
sta FIRST_FRAME
lda LAST_FRAME_PER_LEVEL,y
sta LAST_FRAME
jsr INIT_LEVEL_PARAMS
ldy CURRENT_GAME_LEVEL
lda ROTATIONS_PER_LEVEL,y
sta CURRENT_ROTATIONS
ldy FIRST_FRAME
iny
iny
iny
iny
sty CURRENT_FRAME
ldy #0
lda @TAB_MEM_BANKS,y
sta PORTB
mwa #JUMP_HEIGHT_TABLE P1_Y_TABLE
mwa #JUMP_HEIGHT_TABLE P2_Y_TABLE
jsr CLEAR_STATUS_BAR
jsr PAINT_POINTS
jsr PAINT_AI_INDICATORS
jsr INIT_PLAYERS
jsr PAINT_PLAYERS
rts
CLEAR_STATUS_BAR
lda #0
ldx #39
@ sta STATUS_BAR_BUFFER,x
dex
bne @-
sta STATUS_BAR_BUFFER,x
rts
PAINT_AI_INDICATORS
ldy #4
lda P1_CPU
beq PAI_1
jsr PRINT_CPU
jmp PAI_2
PAI_1 PRINT_PL 87
PAI_2 ldy #31
lda P2_CPU
beq PAI_3
jsr PRINT_CPU
jmp PAI_4
PAI_3 PRINT_PL 88
PAI_4 rts
PRINT_CPU
lda #64+128
sta STATUS_BAR_BUFFER,y
iny
lda #78+128
sta STATUS_BAR_BUFFER,y
iny
lda #77+128
sta STATUS_BAR_BUFFER,y
iny
lda #76+128
sta STATUS_BAR_BUFFER,y
iny
lda #65+128
sta STATUS_BAR_BUFFER,y
rts
PAINT_POINTS
; Note: These two cannot be deduped, since the
; implementation is different
jsr PAINT_POINTS_LEFT
jsr PAINT_POINTS_RIGHT
PAINT_POINTS_LEFT
lda #0
sta P1_H_PAINTED
ldy #0
lda P1_SCORE_H
beq PP_1
inc P1_H_PAINTED
clc
adc #ZERO_DIGIT_OFFSET
sta STATUS_BAR_BUFFER,y
iny
PP_1 lda P1_SCORE
and #%11110000
lsr
lsr
lsr
lsr
ldx P1_H_PAINTED
cpx #1
beq PP_3
cmp #0
beq PP_2
PP_3 clc
adc #ZERO_DIGIT_OFFSET
sta STATUS_BAR_BUFFER,y
iny
PP_2 lda P1_SCORE
and #%00001111
clc
adc #ZERO_DIGIT_OFFSET
sta STATUS_BAR_BUFFER,y
rts
PAINT_POINTS_RIGHT
lda #0
sta P2_H_PAINTED
ldy #39
lda P2_SCORE
and #%00001111
clc
adc #ZERO_DIGIT_OFFSET
sta STATUS_BAR_BUFFER,y
lda P2_SCORE_H
beq PPR_1
clc
adc #ZERO_DIGIT_OFFSET
dey
dey
sta STATUS_BAR_BUFFER,y
inc P2_H_PAINTED
PPR_1 lda P2_SCORE
and #%11110000
lsr
lsr
lsr
lsr
beq PPR_2
PPR_3 clc
adc #ZERO_DIGIT_OFFSET
ldy #38
sta STATUS_BAR_BUFFER,y
rts
PPR_2 ldx P2_H_PAINTED
cpx #0
bne PPR_3
rts
; Frame number in X
SHOW_FRAME
; Pick correct ext ram bank
txa
pha
lsr
tay
lda @TAB_MEM_BANKS,y
sta PORTB
pla
; Pick correct frame from ext ram bank
txa
and %00000001
bne SF_FIRST
mwa #SCR_MEM_1 DLIST_ADDR_TOP
mwa #SCR_MEM_1_P2 DLIST_ADDR_BOTTOM
jmp SF_X
SF_FIRST
mwa #SCR_MEM_2 DLIST_ADDR_TOP
mwa #SCR_MEM_2_P2 DLIST_ADDR_BOTTOM
SF_X rts
VBI_ROUTINE
lda IN_GAME
beq @+
jsr BACKGROUND_TICK
inc TIMER_COUNTER
ldy CURRENT_GAME_LEVEL
#if .byte TIMER_COUNTER == TIMER_DECREASE_TICS,y
inc REDUCE_TIMER
lda #0
sta TIMER_COUNTER
#end
@ jsr CMC_PLAYER+6
jmp XITVBV
TITLE_SCREEN
jsr MUSIC_INIT
jsr PLAY_FADEIN_MUSIC
; Init VBI
ldy <VBI_ROUTINE
ldx >VBI_ROUTINE
lda #7
jsr SETVBV
jsr DISABLE_ANTIC
icl 'src\title.asm'
DLI_ROUTINE_GAME
phr
lda VCOUNT
; Top of the game area
cmp #$0f
bne @+
ldy #0
sty SIZEP0
sty SIZEP1
sty SIZEP2
sty SIZEP3
ldx #SHADE_COLOR
ldy #$ff
lda P1_VISIBLE
beq DRG_1
ldy P1_X
DRG_1 lda #%01100001
sta WSYNC
sta WSYNC
sta PRIOR
stx COLBK
lda GAME_OVER
cmp #1
beq @+
sty HPOSP0
sty HPOSP1
plr
rti
; Top of gameover text
@ cmp #$1e-1
jne @+
lda GAME_OVER
cmp #1
jne @+
lda SDMCTL
and #%11101111
sta DMACTL
lda #FIRST_CHAR_XPOS
sta HPOSP0
ldy #CHAR_1_COLOR
sty COLPM0
sta WSYNC
sta WSYNC
sta WSYNC
sta WSYNC
lda #FIRST_CHAR_XPOS+8
sta HPOSP1
ldy #CHAR_2_COLOR
sty COLPM1
sta WSYNC
sta WSYNC
sta WSYNC
sta WSYNC
lda #FIRST_CHAR_XPOS+16
sta HPOSP2
ldy #CHAR_3_COLOR
sty COLPM2
sta WSYNC
sta WSYNC
sta WSYNC
sta WSYNC
lda #FIRST_CHAR_XPOS+24
sta HPOSP3
ldy #CHAR_4_COLOR
sty COLPM3
sta WSYNC
sta WSYNC
sta WSYNC
sta WSYNC
lda #FIRST_CHAR_XPOS+32
sta HPOSP0
ldy #CHAR_5_COLOR
sty COLPM0
sta WSYNC
sta WSYNC
sta WSYNC
sta WSYNC
lda #FIRST_CHAR_XPOS+40
sta HPOSP1
ldy #CHAR_6_COLOR
sty COLPM1
sta WSYNC
sta WSYNC
sta WSYNC
sta WSYNC
sta WSYNC
sta WSYNC
sta WSYNC
sta WSYNC
lda #FIRST_CHAR_XPOS+56
sta HPOSP2
ldy #CHAR_7_COLOR
sty COLPM2
sta WSYNC
sta WSYNC
sta WSYNC
sta WSYNC
lda #FIRST_CHAR_XPOS+64
sta HPOSP3
ldy #CHAR_8_COLOR
sty COLPM3
sta WSYNC
sta WSYNC
sta WSYNC
sta WSYNC
lda #FIRST_CHAR_XPOS+72
sta HPOSP0
ldy #CHAR_9_COLOR
sty COLPM0
plr
rti
; Status bar
@ cmp #$6f
bne @+
lda SDMCTL
ora #%00010000
sta DMACTL
lda #%00100000
ldx #$00
ldy #TIMER_SHADOW_COLOR
sta WSYNC
sta PRIOR
stx COLBK
lda #100
sta HPOSP0
lda #124
sta HPOSP1
lda #3
sta SIZEP0
sta SIZEP1
sty CLR1
ldy #TIMER_COLOR
sty COLPM0
sty COLPM1
@ plr
rti
DISABLE_ANTIC
lda SDMCTL
sta ANTIC_XTMP
lda #$00
sta SDMCTL
lda 20
@ cmp 20
beq @-
lda #%01000000
sta NMIEN
rts
ENABLE_ANTIC
lda ANTIC_XTMP
sta SDMCTL
lda #%11000000
sta NMIEN
rts
icl "src\gameover.asm"
PROGRAM_END_FIRST_PART ; Can't cross $4000
; Call mem detect proc
ini INIT_00
org $8000
STATUS_BAR_BUFFER
:40 dta b('A')
icl 'src\data.asm'
.align $1000
SCR_MEM_MENU
:1160 dta b(0)
; TODO: Here is a place for the code/data (887 bytes)
.align $400
NAMES_FONT
ins 'data\names.fnt'
QUOTE_FONT
ins 'data\quote.fnt'
DATA_END
CMC_MUSIC
ins 'src\music\SKA7.CMC',+6
CMC_MUSIC_END
CMC_PLAYER
icl 'src\music\cmc_player.asm'
CMC_PLAYER_END
//------------------------------------------------
// Loading data into extram
//------------------------------------------------
.rept FRAME_COUNT/2-1, #+1, #*2+2, #*2+3
; Frames 3..FRAME_COUNT into ext ram banks
org $6A0
INIT_:1
ldy #:1
lda @TAB_MEM_BANKS,y
sta PORTB
rts
ini INIT_:1
org SCR_MEM_1
ins "frames/f:2.bin"
org SCR_MEM_2
ins "frames/f:3.bin"
.endr
; More data into bank #52
org $6A0
INIT_52
ldy #52
lda @TAB_MEM_BANKS,y
sta PORTB
rts
ini INIT_52
org $4000
ins "data/names.bin"
run TITLE_SCREEN
|
SECTION code_clib
SECTION code_fp_math48
PUBLIC mm48__addac
mm48__addac:
;AC = AC + AC'
;Laeg AC' til AC.
ld a,h
exx
add a,h
mm48__aac1:
exx
ld h,a
ld a,e
exx
adc a,e
exx
ld e,a
ld a,d
exx
adc a,d
exx
ld d,a
ld a,c
exx
adc a,c
exx
ld c,a
ld a,b
exx
adc a,b
exx
ld b,a
ret
|
// Copyright Carl Philipp Reh 2009 - 2016.
// Distributed under the Boost Software License, Version 1.0.
// (See accompanying file LICENSE_1_0.txt or copy at
// http://www.boost.org/LICENSE_1_0.txt)
#include <fcppt/enum_range_impl.hpp>
#include <fcppt/make_enum_range.hpp>
#include <fcppt/make_enum_range_start.hpp>
#include <fcppt/make_enum_range_start_end.hpp>
#include <fcppt/preprocessor/disable_gcc_warning.hpp>
#include <fcppt/preprocessor/pop_warning.hpp>
#include <fcppt/preprocessor/push_warning.hpp>
#include <fcppt/config/external_begin.hpp>
#include <boost/test/unit_test.hpp>
#include <vector>
#include <fcppt/config/external_end.hpp>
namespace
{
enum class test_enum
{
test1,
test2,
test3,
fcppt_maximum = test3
};
typedef
std::vector<
test_enum
>
enum_vector;
void
test(
fcppt::enum_range<
test_enum
> const _range,
enum_vector const &_result
)
{
enum_vector values;
for(
test_enum const value
:
_range
)
values.push_back(
value
);
BOOST_CHECK((
values
==
_result
));
}
}
FCPPT_PP_PUSH_WARNING
FCPPT_PP_DISABLE_GCC_WARNING(-Weffc++)
BOOST_AUTO_TEST_CASE(
enum_range
)
{
FCPPT_PP_POP_WARNING
test(
fcppt::make_enum_range<
test_enum
>(),
enum_vector{
test_enum::test1,
test_enum::test2,
test_enum::test3
}
);
}
FCPPT_PP_PUSH_WARNING
FCPPT_PP_DISABLE_GCC_WARNING(-Weffc++)
BOOST_AUTO_TEST_CASE(
enum_range_start
)
{
FCPPT_PP_POP_WARNING
test(
fcppt::make_enum_range_start(
test_enum::test2
),
enum_vector{
test_enum::test2,
test_enum::test3
}
);
}
FCPPT_PP_PUSH_WARNING
FCPPT_PP_DISABLE_GCC_WARNING(-Weffc++)
BOOST_AUTO_TEST_CASE(
enum_range_start_end
)
{
FCPPT_PP_POP_WARNING
test(
fcppt::make_enum_range_start_end(
test_enum::test2,
test_enum::test2
),
enum_vector{
test_enum::test2
}
);
}
|
db 0 ; species ID placeholder
db 60, 69, 95, 36, 69, 95
; hp atk def spd sat sdf
db BUG, STEEL ; type
db 45 ; catch rate
db 148 ; base exp
db NO_ITEM, SILVERPOWDER ; items
db GENDER_F100 ; gender ratio
db 100 ; unknown 1
db 15 ; step cycles to hatch
db 5 ; unknown 2
INCBIN "gfx/pokemon/wormadam_t/front.dimensions"
db 0, 0, 0, 0 ; padding
db GROWTH_MEDIUM_FAST ; growth rate
dn EGG_BUG, EGG_BUG ; egg groups
; tm/hm learnset
tmhm CURSE, TOXIC, PSYCH_UP, HIDDEN_POWER, SUNNY_DAY, SNORE, HYPER_BEAM, PROTECT, RAIN_DANCE, ENDURE, FRUSTRATION, RETURN, PSYCHIC_M, SHADOW_BALL, DOUBLE_TEAM, SWAGGER, SLEEP_TALK, DREAM_EATER, REST, ATTRACT, THIEF, NIGHTMARE, FLASH
; end
|
header_start:
dd 0xe85250d6 ; multiboot magic number
dd 0 ; protected mode code
dd header_end - header_start ; header length
; checksum
dd 0x100000000 - (0xe85250d6 + 0 + (header_end - header_start))
; end tag
dw 0 ; type
dw 0 ; flags
dd 8 ; size
header_end:
|
#pragma once
#include <stdint.h>
#include "32blit.hpp"
void init();
void update(uint32_t time);
void render(uint32_t time); |
/****************************************************************************
**
** Copyright (C) 2016 The Qt Company Ltd.
** Contact: https://www.qt.io/licensing/
**
** This file is part of the test suite of the Qt Toolkit.
**
** $QT_BEGIN_LICENSE:GPL-EXCEPT$
** Commercial License Usage
** Licensees holding valid commercial Qt licenses may use this file in
** accordance with the commercial license agreement provided with the
** Software or, alternatively, in accordance with the terms contained in
** a written agreement between you and The Qt Company. For licensing terms
** and conditions see https://www.qt.io/terms-conditions. For further
** information use the contact form at https://www.qt.io/contact-us.
**
** GNU General Public License Usage
** Alternatively, this file may be used under the terms of the GNU
** General Public License version 3 as published by the Free Software
** Foundation with exceptions as appearing in the file LICENSE.GPL3-EXCEPT
** included in the packaging of this file. Please review the following
** information to ensure the GNU General Public License requirements will
** be met: https://www.gnu.org/licenses/gpl-3.0.html.
**
** $QT_END_LICENSE$
**
****************************************************************************/
#include <QtTest/QtTest>
#include <qvarlengtharray.h>
#include <qvariant.h>
const int N = 1;
class tst_QVarLengthArray : public QObject
{
Q_OBJECT
private slots:
void append();
void removeLast();
void oldTests();
void appendCausingRealloc();
void resize();
void realloc();
void reverseIterators();
void count();
void first();
void last();
void squeeze();
void operators();
void indexOf();
void lastIndexOf();
void contains();
void clear();
void initializeListInt();
void initializeListMovable();
void initializeListComplex();
private:
template<typename T>
void initializeList();
};
int fooCtor = 0;
int fooDtor = 0;
struct Foo
{
int *p;
Foo() { p = new int; ++fooCtor; }
Foo(const Foo &/*other*/) { p = new int; ++fooCtor; }
void operator=(const Foo & /* other */) { }
~Foo() { delete p; ++fooDtor; }
};
void tst_QVarLengthArray::append()
{
QVarLengthArray<QString, 2> v;
v.append(QString("1"));
v.append(v.front());
QCOMPARE(v.capacity(), 2);
// transition from prealloc to heap:
v.append(v.front());
QVERIFY(v.capacity() > 2);
QCOMPARE(v.front(), v.back());
while (v.size() < v.capacity())
v.push_back(v[0]);
QCOMPARE(v.back(), v.front());
QCOMPARE(v.size(), v.capacity());
// transition from heap to larger heap:
v.push_back(v.front());
QCOMPARE(v.back(), v.front());
QVarLengthArray<int> v2; // rocket!
v2.append(5);
}
void tst_QVarLengthArray::removeLast()
{
{
QVarLengthArray<char, 2> v;
v.append(0);
v.append(1);
QCOMPARE(v.size(), 2);
v.append(2);
v.append(3);
QCOMPARE(v.size(), 4);
v.removeLast();
QCOMPARE(v.size(), 3);
v.removeLast();
QCOMPARE(v.size(), 2);
}
{
QVarLengthArray<QString, 2> v;
v.append("0");
v.append("1");
QCOMPARE(v.size(), 2);
v.append("2");
v.append("3");
QCOMPARE(v.size(), 4);
v.removeLast();
QCOMPARE(v.size(), 3);
v.removeLast();
QCOMPARE(v.size(), 2);
}
}
void tst_QVarLengthArray::oldTests()
{
{
QVarLengthArray<int, 256> sa(128);
QVERIFY(sa.data() == &sa[0]);
sa[0] = 0xfee;
sa[10] = 0xff;
QVERIFY(sa[0] == 0xfee);
QVERIFY(sa[10] == 0xff);
sa.resize(512);
QVERIFY(sa.data() == &sa[0]);
QVERIFY(sa[0] == 0xfee);
QVERIFY(sa[10] == 0xff);
QVERIFY(sa.at(0) == 0xfee);
QVERIFY(sa.at(10) == 0xff);
QVERIFY(sa.value(0) == 0xfee);
QVERIFY(sa.value(10) == 0xff);
QVERIFY(sa.value(1000) == 0);
QVERIFY(sa.value(1000, 12) == 12);
QVERIFY(sa.size() == 512);
sa.reserve(1024);
QVERIFY(sa.capacity() == 1024);
QVERIFY(sa.size() == 512);
}
{
QVarLengthArray<QString> sa(10);
sa[0] = "Hello";
sa[9] = "World";
QCOMPARE(*sa.data(), QLatin1String("Hello"));
QCOMPARE(sa[9], QLatin1String("World"));
sa.reserve(512);
QCOMPARE(*sa.data(), QLatin1String("Hello"));
QCOMPARE(sa[9], QLatin1String("World"));
sa.resize(512);
QCOMPARE(*sa.data(), QLatin1String("Hello"));
QCOMPARE(sa[9], QLatin1String("World"));
}
{
int arr[2] = {1, 2};
QVarLengthArray<int> sa(10);
QCOMPARE(sa.size(), 10);
sa.append(arr, 2);
QCOMPARE(sa.size(), 12);
QCOMPARE(sa[10], 1);
QCOMPARE(sa[11], 2);
}
{
QString arr[2] = { QString("hello"), QString("world") };
QVarLengthArray<QString> sa(10);
QCOMPARE(sa.size(), 10);
sa.append(arr, 2);
QCOMPARE(sa.size(), 12);
QCOMPARE(sa[10], QString("hello"));
QCOMPARE(sa[11], QString("world"));
QCOMPARE(sa.at(10), QString("hello"));
QCOMPARE(sa.at(11), QString("world"));
QCOMPARE(sa.value(10), QString("hello"));
QCOMPARE(sa.value(11), QString("world"));
QCOMPARE(sa.value(10000), QString());
QCOMPARE(sa.value(1212112, QString("none")), QString("none"));
QCOMPARE(sa.value(-12, QString("neg")), QString("neg"));
sa.append(arr, 1);
QCOMPARE(sa.size(), 13);
QCOMPARE(sa[12], QString("hello"));
sa.append(arr, 0);
QCOMPARE(sa.size(), 13);
}
{
// assignment operator and copy constructor
QVarLengthArray<int> sa(10);
sa[5] = 5;
QVarLengthArray<int> sa2(10);
sa2[5] = 6;
sa2 = sa;
QCOMPARE(sa2[5], 5);
QVarLengthArray<int> sa3(sa);
QCOMPARE(sa3[5], 5);
}
}
void tst_QVarLengthArray::appendCausingRealloc()
{
// This is a regression test for an old bug where creating a
// QVarLengthArray of the same size as the prealloc size would make
// the next call to append(const T&) corrupt the memory.
QVarLengthArray<float, 1> d(1);
for (int i=0; i<30; i++)
d.append(i);
}
void tst_QVarLengthArray::resize()
{
//MOVABLE
{
QVarLengthArray<QVariant,1> values(1);
QCOMPARE(values.size(), 1);
values[0] = 1;
values.resize(2);
QCOMPARE(values[1], QVariant());
QCOMPARE(values[0], QVariant(1));
values[1] = 2;
QCOMPARE(values[1], QVariant(2));
QCOMPARE(values.size(), 2);
}
//POD
{
QVarLengthArray<int,1> values(1);
QCOMPARE(values.size(), 1);
values[0] = 1;
values.resize(2);
QCOMPARE(values[0], 1);
values[1] = 2;
QCOMPARE(values[1], 2);
QCOMPARE(values.size(), 2);
}
//COMPLEX
{
QVarLengthArray<QVarLengthArray<QString, 15>,1> values(1);
QCOMPARE(values.size(), 1);
values[0].resize(10);
values.resize(2);
QCOMPARE(values[1].size(), 0);
QCOMPARE(values[0].size(), 10);
values[1].resize(20);
QCOMPARE(values[1].size(), 20);
QCOMPARE(values.size(), 2);
}
}
struct MyBase
{
MyBase()
: data(this)
, isCopy(false)
{
++liveCount;
}
MyBase(MyBase const &)
: data(this)
, isCopy(true)
{
++copyCount;
++liveCount;
}
MyBase & operator=(MyBase const &)
{
if (!isCopy) {
isCopy = true;
++copyCount;
} else {
++errorCount;
}
return *this;
}
~MyBase()
{
if (isCopy) {
if (!copyCount)
++errorCount;
else
--copyCount;
}
if (!liveCount)
++errorCount;
else
--liveCount;
}
bool hasMoved() const
{
return this != data;
}
protected:
MyBase const * const data;
bool isCopy;
public:
static int errorCount;
static int liveCount;
static int copyCount;
};
int MyBase::errorCount = 0;
int MyBase::liveCount = 0;
int MyBase::copyCount = 0;
struct MyPrimitive
: MyBase
{
MyPrimitive()
{
++errorCount;
}
~MyPrimitive()
{
++errorCount;
}
MyPrimitive(MyPrimitive const &other)
: MyBase(other)
{
++errorCount;
}
};
struct MyMovable
: MyBase
{
MyMovable(char input = 'j') : i(input) {}
bool operator==(const MyMovable &other) const
{
return i == other.i;
}
char i;
};
struct MyComplex
: MyBase
{
MyComplex(char input = 'j') : i(input) {}
bool operator==(const MyComplex &other) const
{
return i == other.i;
}
char i;
};
QT_BEGIN_NAMESPACE
Q_DECLARE_TYPEINFO(MyPrimitive, Q_PRIMITIVE_TYPE);
Q_DECLARE_TYPEINFO(MyMovable, Q_MOVABLE_TYPE);
Q_DECLARE_TYPEINFO(MyComplex, Q_COMPLEX_TYPE);
QT_END_NAMESPACE
bool reallocTestProceed = true;
template <class T, int PreAlloc>
int countMoved(QVarLengthArray<T, PreAlloc> const &c)
{
int result = 0;
for (int i = 0; i < c.size(); ++i)
if (c[i].hasMoved())
++result;
return result;
}
template <class T>
void reallocTest()
{
reallocTestProceed = false;
typedef QVarLengthArray<T, 16> Container;
enum {
isStatic = QTypeInfo<T>::isStatic,
isComplex = QTypeInfo<T>::isComplex,
isPrimitive = !isComplex && !isStatic,
isMovable = !isStatic
};
// Constructors
Container a;
QCOMPARE( MyBase::liveCount, 0 );
QCOMPARE( MyBase::copyCount, 0 );
QVERIFY( a.capacity() >= 16 );
QCOMPARE( a.size(), 0 );
Container b_real(8);
Container const &b = b_real;
QCOMPARE( MyBase::liveCount, isPrimitive ? 0 : 8 );
QCOMPARE( MyBase::copyCount, 0 );
QVERIFY( b.capacity() >= 16 );
QCOMPARE( b.size(), 8 );
// Assignment
a = b;
QCOMPARE( MyBase::liveCount, isPrimitive ? 0 : 16 );
QCOMPARE( MyBase::copyCount, isComplex ? 8 : 0 );
QVERIFY( a.capacity() >= 16 );
QCOMPARE( a.size(), 8 );
QVERIFY( b.capacity() >= 16 );
QCOMPARE( b.size(), 8 );
// append
a.append(b.data(), b.size());
QCOMPARE( MyBase::liveCount, isPrimitive ? 0 : 24 );
QCOMPARE( MyBase::copyCount, isComplex ? 16 : 0 );
QVERIFY( a.capacity() >= 16 );
QCOMPARE( a.size(), 16 );
QVERIFY( b.capacity() >= 16 );
QCOMPARE( b.size(), 8 );
// removeLast
a.removeLast();
QCOMPARE( MyBase::liveCount, isPrimitive ? 0 : 23 );
QCOMPARE( MyBase::copyCount, isComplex ? 15 : 0 );
QVERIFY( a.capacity() >= 16 );
QCOMPARE( a.size(), 15 );
QVERIFY( b.capacity() >= 16 );
QCOMPARE( b.size(), 8 );
// Movable types
const int capacity = a.capacity();
if (!isPrimitive)
QCOMPARE( countMoved(a), 0 );
// Reserve, no re-allocation
a.reserve(capacity);
if (!isPrimitive)
QCOMPARE( countMoved(a), 0 );
QCOMPARE( MyBase::liveCount, isPrimitive ? 0 : 23 );
QCOMPARE( MyBase::copyCount, isComplex ? 15 : 0 );
QCOMPARE( a.capacity(), capacity );
QCOMPARE( a.size(), 15 );
QVERIFY( b.capacity() >= 16 );
QCOMPARE( b.size(), 8 );
// Reserve, force re-allocation
a.reserve(capacity * 2);
if (!isPrimitive)
QCOMPARE( countMoved(a), isMovable ? 15 : 0 );
QCOMPARE( MyBase::liveCount, isPrimitive ? 0 : 23 );
QCOMPARE( MyBase::copyCount, isComplex ? 15 : 0 );
QVERIFY( a.capacity() >= capacity * 2 );
QCOMPARE( a.size(), 15 );
QVERIFY( b.capacity() >= 16 );
QCOMPARE( b.size(), 8 );
// resize, grow
a.resize(40);
if (!isPrimitive)
QCOMPARE( countMoved(a), isMovable ? 15 : 0 );
QCOMPARE( MyBase::liveCount, isPrimitive ? 0 : 48 );
QCOMPARE( MyBase::copyCount, isComplex ? 15 : 0 );
QVERIFY( a.capacity() >= a.size() );
QCOMPARE( a.size(), 40 );
QVERIFY( b.capacity() >= 16 );
QCOMPARE( b.size(), 8 );
// Copy constructor, allocate
{
Container c(a);
if (!isPrimitive)
QCOMPARE( countMoved(c), 0 );
QCOMPARE( MyBase::liveCount, isPrimitive ? 0 : 88 );
QCOMPARE( MyBase::copyCount, isComplex ? 55 : 0 );
QVERIFY( a.capacity() >= a.size() );
QCOMPARE( a.size(), 40 );
QVERIFY( b.capacity() >= 16 );
QCOMPARE( b.size(), 8 );
QVERIFY( c.capacity() >= 40 );
QCOMPARE( c.size(), 40 );
}
// resize, shrink
a.resize(10);
if (!isPrimitive)
QCOMPARE( countMoved(a), isMovable ? 10 : 0 );
QCOMPARE( MyBase::liveCount, isPrimitive ? 0 : 18 );
QCOMPARE( MyBase::copyCount, isComplex ? 10 : 0 );
QVERIFY( a.capacity() >= a.size() );
QCOMPARE( a.size(), 10 );
QVERIFY( b.capacity() >= 16 );
QCOMPARE( b.size(), 8 );
// Copy constructor, don't allocate
{
Container c(a);
if (!isPrimitive)
QCOMPARE( countMoved(c), 0 );
QCOMPARE( MyBase::liveCount, isPrimitive ? 0 : 28 );
QCOMPARE( MyBase::copyCount, isComplex ? 20 : 0 );
QVERIFY( a.capacity() >= a.size() );
QCOMPARE( a.size(), 10 );
QVERIFY( b.capacity() >= 16 );
QCOMPARE( b.size(), 8 );
QVERIFY( c.capacity() >= 16 );
QCOMPARE( c.size(), 10 );
}
a.clear();
QCOMPARE( a.size(), 0 );
b_real.clear();
QCOMPARE( b.size(), 0 );
QCOMPARE(MyBase::errorCount, 0);
QCOMPARE(MyBase::liveCount, 0);
// All done
reallocTestProceed = true;
}
void tst_QVarLengthArray::realloc()
{
reallocTest<MyBase>();
QVERIFY(reallocTestProceed);
reallocTest<MyPrimitive>();
QVERIFY(reallocTestProceed);
reallocTest<MyMovable>();
QVERIFY(reallocTestProceed);
reallocTest<MyComplex>();
QVERIFY(reallocTestProceed);
}
void tst_QVarLengthArray::reverseIterators()
{
QVarLengthArray<int> v;
v << 1 << 2 << 3 << 4;
QVarLengthArray<int> vr = v;
std::reverse(vr.begin(), vr.end());
const QVarLengthArray<int> &cvr = vr;
QVERIFY(std::equal(v.begin(), v.end(), vr.rbegin()));
QVERIFY(std::equal(v.begin(), v.end(), vr.crbegin()));
QVERIFY(std::equal(v.begin(), v.end(), cvr.rbegin()));
QVERIFY(std::equal(vr.rbegin(), vr.rend(), v.begin()));
QVERIFY(std::equal(vr.crbegin(), vr.crend(), v.begin()));
QVERIFY(std::equal(cvr.rbegin(), cvr.rend(), v.begin()));
}
void tst_QVarLengthArray::count()
{
// tests size(), count() and length(), since they're the same thing
{
const QVarLengthArray<int> list;
QCOMPARE(list.length(), 0);
QCOMPARE(list.count(), 0);
QCOMPARE(list.size(), 0);
}
{
QVarLengthArray<int> list;
list.append(0);
QCOMPARE(list.length(), 1);
QCOMPARE(list.count(), 1);
QCOMPARE(list.size(), 1);
}
{
QVarLengthArray<int> list;
list.append(0);
list.append(1);
QCOMPARE(list.length(), 2);
QCOMPARE(list.count(), 2);
QCOMPARE(list.size(), 2);
}
{
QVarLengthArray<int> list;
list.append(0);
list.append(0);
list.append(0);
QCOMPARE(list.length(), 3);
QCOMPARE(list.count(), 3);
QCOMPARE(list.size(), 3);
}
// test removals too
{
QVarLengthArray<int> list;
list.append(0);
list.append(0);
list.append(0);
QCOMPARE(list.length(), 3);
QCOMPARE(list.count(), 3);
QCOMPARE(list.size(), 3);
list.removeLast();
QCOMPARE(list.length(), 2);
QCOMPARE(list.count(), 2);
QCOMPARE(list.size(), 2);
list.removeLast();
QCOMPARE(list.length(), 1);
QCOMPARE(list.count(), 1);
QCOMPARE(list.size(), 1);
list.removeLast();
QCOMPARE(list.length(), 0);
QCOMPARE(list.count(), 0);
QCOMPARE(list.size(), 0);
}
}
void tst_QVarLengthArray::first()
{
// append some items, make sure it stays sane
QVarLengthArray<int> list;
list.append(27);
QCOMPARE(list.first(), 27);
list.append(4);
QCOMPARE(list.first(), 27);
list.append(1987);
QCOMPARE(list.first(), 27);
QCOMPARE(list.length(), 3);
// remove some, make sure it stays sane
list.removeLast();
QCOMPARE(list.first(), 27);
QCOMPARE(list.length(), 2);
list.removeLast();
QCOMPARE(list.first(), 27);
QCOMPARE(list.length(), 1);
}
void tst_QVarLengthArray::last()
{
// append some items, make sure it stays sane
QVarLengthArray<int> list;
list.append(27);
QCOMPARE(list.last(), 27);
list.append(4);
QCOMPARE(list.last(), 4);
list.append(1987);
QCOMPARE(list.last(), 1987);
QCOMPARE(list.length(), 3);
// remove some, make sure it stays sane
list.removeLast();
QCOMPARE(list.last(), 4);
QCOMPARE(list.length(), 2);
list.removeLast();
QCOMPARE(list.last(), 27);
QCOMPARE(list.length(), 1);
}
void tst_QVarLengthArray::squeeze()
{
QVarLengthArray<int> list;
int sizeOnStack = list.capacity();
int sizeOnHeap = sizeOnStack * 2;
list.resize(0);
QCOMPARE(list.capacity(), sizeOnStack);
list.resize(sizeOnHeap);
QCOMPARE(list.capacity(), sizeOnHeap);
list.resize(sizeOnStack);
QCOMPARE(list.capacity(), sizeOnHeap);
list.resize(0);
QCOMPARE(list.capacity(), sizeOnHeap);
list.squeeze();
QCOMPARE(list.capacity(), sizeOnStack);
list.resize(sizeOnStack);
list.squeeze();
QCOMPARE(list.capacity(), sizeOnStack);
list.resize(sizeOnHeap);
list.squeeze();
QCOMPARE(list.capacity(), sizeOnHeap);
}
void tst_QVarLengthArray::operators()
{
QVarLengthArray<QString> myvla;
myvla << "A" << "B" << "C";
QVarLengthArray<QString> myvlatwo;
myvlatwo << "D" << "E" << "F";
QVarLengthArray<QString> combined;
combined << "A" << "B" << "C" << "D" << "E" << "F";
// !=
QVERIFY(myvla != myvlatwo);
// +=: not provided, emulate
//myvla += myvlatwo;
Q_FOREACH (const QString &s, myvlatwo)
myvla.push_back(s);
QCOMPARE(myvla, combined);
// ==
QVERIFY(myvla == combined);
// <, >, <=, >=
QVERIFY(!(myvla < combined));
QVERIFY(!(myvla > combined));
QVERIFY( myvla <= combined);
QVERIFY( myvla >= combined);
combined.push_back("G");
QVERIFY( myvla < combined);
QVERIFY(!(myvla > combined));
QVERIFY( myvla <= combined);
QVERIFY(!(myvla >= combined));
QVERIFY(combined > myvla);
QVERIFY(combined >= myvla);
// []
QCOMPARE(myvla[0], QLatin1String("A"));
QCOMPARE(myvla[1], QLatin1String("B"));
QCOMPARE(myvla[2], QLatin1String("C"));
QCOMPARE(myvla[3], QLatin1String("D"));
QCOMPARE(myvla[4], QLatin1String("E"));
QCOMPARE(myvla[5], QLatin1String("F"));
}
void tst_QVarLengthArray::indexOf()
{
QVarLengthArray<QString> myvec;
myvec << "A" << "B" << "C" << "B" << "A";
QVERIFY(myvec.indexOf("B") == 1);
QVERIFY(myvec.indexOf("B", 1) == 1);
QVERIFY(myvec.indexOf("B", 2) == 3);
QVERIFY(myvec.indexOf("X") == -1);
QVERIFY(myvec.indexOf("X", 2) == -1);
// add an X
myvec << "X";
QVERIFY(myvec.indexOf("X") == 5);
QVERIFY(myvec.indexOf("X", 5) == 5);
QVERIFY(myvec.indexOf("X", 6) == -1);
// remove first A
myvec.remove(0);
QVERIFY(myvec.indexOf("A") == 3);
QVERIFY(myvec.indexOf("A", 3) == 3);
QVERIFY(myvec.indexOf("A", 4) == -1);
}
void tst_QVarLengthArray::lastIndexOf()
{
QVarLengthArray<QString> myvec;
myvec << "A" << "B" << "C" << "B" << "A";
QVERIFY(myvec.lastIndexOf("B") == 3);
QVERIFY(myvec.lastIndexOf("B", 2) == 1);
QVERIFY(myvec.lastIndexOf("X") == -1);
QVERIFY(myvec.lastIndexOf("X", 2) == -1);
// add an X
myvec << "X";
QVERIFY(myvec.lastIndexOf("X") == 5);
QVERIFY(myvec.lastIndexOf("X", 5) == 5);
QVERIFY(myvec.lastIndexOf("X", 3) == -1);
// remove first A
myvec.remove(0);
QVERIFY(myvec.lastIndexOf("A") == 3);
QVERIFY(myvec.lastIndexOf("A", 3) == 3);
QVERIFY(myvec.lastIndexOf("A", 2) == -1);
}
void tst_QVarLengthArray::contains()
{
QVarLengthArray<QString> myvec;
myvec << "aaa" << "bbb" << "ccc";
QVERIFY(myvec.contains(QLatin1String("aaa")));
QVERIFY(myvec.contains(QLatin1String("bbb")));
QVERIFY(myvec.contains(QLatin1String("ccc")));
QVERIFY(!myvec.contains(QLatin1String("I don't exist")));
// add it and make sure it does :)
myvec.append(QLatin1String("I don't exist"));
QVERIFY(myvec.contains(QLatin1String("I don't exist")));
}
void tst_QVarLengthArray::clear()
{
QVarLengthArray<QString, 5> myvec;
for (int i = 0; i < 10; ++i)
myvec << "aaa";
QCOMPARE(myvec.size(), 10);
QVERIFY(myvec.capacity() >= myvec.size());
const int oldCapacity = myvec.capacity();
myvec.clear();
QCOMPARE(myvec.size(), 0);
QCOMPARE(myvec.capacity(), oldCapacity);
}
void tst_QVarLengthArray::initializeListInt()
{
initializeList<int>();
}
void tst_QVarLengthArray::initializeListMovable()
{
const int instancesCount = MyMovable::liveCount;
initializeList<MyMovable>();
QCOMPARE(MyMovable::liveCount, instancesCount);
}
void tst_QVarLengthArray::initializeListComplex()
{
const int instancesCount = MyComplex::liveCount;
initializeList<MyComplex>();
QCOMPARE(MyComplex::liveCount, instancesCount);
}
template<typename T>
void tst_QVarLengthArray::initializeList()
{
#ifdef Q_COMPILER_INITIALIZER_LISTS
T val1(110);
T val2(105);
T val3(101);
T val4(114);
// QVarLengthArray(std::initializer_list<>)
QVarLengthArray<T> v1 {val1, val2, val3};
QCOMPARE(v1, QVarLengthArray<T>() << val1 << val2 << val3);
QCOMPARE(v1, (QVarLengthArray<T> {val1, val2, val3}));
QVarLengthArray<QVarLengthArray<T>, 4> v2{ v1, {val4}, QVarLengthArray<T>(), {val1, val2, val3} };
QVarLengthArray<QVarLengthArray<T>, 4> v3;
v3 << v1 << (QVarLengthArray<T>() << val4) << QVarLengthArray<T>() << v1;
QCOMPARE(v3, v2);
QVarLengthArray<T> v4({});
QCOMPARE(v4.size(), 0);
// operator=(std::initializer_list<>)
QVarLengthArray<T> v5({val2, val1});
v1 = { val1, val2 }; // make array smaller
v4 = { val1, val2 }; // make array bigger
v5 = { val1, val2 }; // same size
QCOMPARE(v1, QVarLengthArray<T>() << val1 << val2);
QCOMPARE(v4, v1);
QCOMPARE(v5, v1);
QVarLengthArray<T, 1> v6 = { val1 };
v6 = { val1, val2 }; // force allocation on heap
QCOMPARE(v6.size(), 2);
QCOMPARE(v6.first(), val1);
QCOMPARE(v6.last(), val2);
v6 = {}; // assign empty
QCOMPARE(v6.size(), 0);
#else
QSKIP("This tests requires a compiler that supports initializer lists.");
#endif
}
QTEST_APPLESS_MAIN(tst_QVarLengthArray)
#include "tst_qvarlengtharray.moc"
|
include w2.inc
include noxport.inc
include consts.inc
include structs.inc
createSeg _FETCH,fetch,byte,public,CODE
; DEBUGGING DECLARATIONS
ifdef DEBUG
midFetchn3 equ 14 ; module ID, for native asserts
endif
; EXPORTED LABELS
; EXTERNAL FUNCTIONS
externFP <IbpReadFilePage>
externFP <HpsAlter,ApplySprm>
externFP <AnsiLower,MapStcStandard>
externFP <IInPlcRef>
externFP <IInPlcCheck>
externFP <N_FetchCp>
externFP <N_CachePara>
externFP <IbpLoadFn>
externNP <LN_IcpInRgcp>
externNP <LN_LprgcpForPlc>
externNP <LN_PdodOrNilFromDoc>
externNP <LN_ReloadSb>
externNP <LN_CpFromPlcIcp>
externNP <LN_FInCa>
externFP <CpMacDocEdit>
externFP <CpFirstTap>
ifdef DEBUG
externFP <AssertProcForNative>
externFP <S_CachePara,S_FetchCp>
externFP <S_ApplyPrlSgc>
externFP <CpMacDoc>
externFP <FInCa>
endif
; EXTERNAL DATA
sBegin data
externW vchpStc ; extern struct CHP vchpStc;
externW vhpchFetch ; extern HUGE *vhpchFetch;
externW mpfnhfcb ; extern struct FCB **mpfnhfcb[];
externW vsab ; extern struct SAB vsab;
externW vibp ; extern int vibp;
externW vbptbExt ; extern struct BPTB vbptbExt;
externW vstcpMapStc ; extern int vstcpMapStc;
externW dnsprm ; extern struct ESPRM dnsprm[];
externW vfnPreload ; extern int vfnPreload;
externW vpapFetch ; extern struct PAP vpapFetch;
externW caPara ; extern struct CA caPara;
externW vdocFetch ; extern int vdocFetch;
externD vcpFetch ; extern CP vcpFetch;
externW fcmFetch ; extern int fcmFetch;
externW vcaCell ; extern struct CA vcaCell;
externD vcpFirstTablePara ; extern CP vcpFirstTablePara;
externD vcpFirstTableCell ; extern CP vcpFirstTableCell;
externW vdocTemp ; extern int vdocTemp;
externD vmpitccp ; extern CP vmpitccp[];
externW caTap ; extern struct CA caTap;
externW vtapFetch ; extern struct TAP vtapFetch;
ifdef DEBUG
externW wFillBlock
endif
sEnd data
; CODE SEGMENT _FETCH
sBegin fetch
assumes cs,fetch
assumes ds,dgroup
assumes ss,dgroup
;-------------------------------------------------------------------------
; BFromFc(hpfkp,fc,pfcFirst,pfcLim,pifc)
;-------------------------------------------------------------------------
; %%Function:N_BFromFc %%Owner:BRADV
cProc N_BFromFc,<PUBLIC,FAR>,<si,di>
ParmD hpfkp
ParmD fc
ParmW pfcFirst
ParmW pfcLim
ParmW pifc
ifdef DEBUG
LocalW diSave
endif ;DEBUG
; /* B F R O M F C */
; /* Return the b, fcFirst & fcLim for the first run with fcLim > fc. */
; native int BFromFc(hpfkp, fc, pfcFirst, pfcLim, pifc)
; struct FKP HUGE *hpfkp;
; FC fc, *pfcFirst, *pfcLim;
; {
cBegin
mov bx,[SEG_hpfkp]
;LN_ReloadSb takes an sb in bx and set es to the corresponding value.
;Only es and bx are altered.
call LN_ReloadSb
mov di,[OFF_hpfkp]
mov ax,[OFF_fc]
mov dx,[SEG_fc]
call LN_BFromFcCore
mov di,[pfcFirst]
movsw
movsw
mov di,[pfcLim]
movsw
movsw
push ss
pop ds
mov bx,[pifc]
mov [bx],cx
; }
cEnd
; LN_BFromFcCore takes qfkp in es:di, fc in dx:ax.
; The result is returned in ax. ifc is returned in cx.
; Upon exit ds == es upon input, es == psDds,
; and ds:si points to (qfkp->rgfc[ifc])
; %%Function:LN_BFromFcCore %%Owner:BRADV
PUBLIC LN_BFromFcCore
LN_BFromFcCore:
; struct RUN *prun, *rgrun;
; int crun, ifc;
;
; crun = hpfkp->crun;
; *pifc = ifc = IcpInRgcp(LpFromHp(hpfkp->rgfc), crun, (CP) fc);
errnz <(rgfcFkp)>
mov cl,es:[di.crunFkp]
xor ch,ch
push cx ;save crun
; LN_IcpInRgcp expects lprgcp in es:di, icpLim in cx, and cp in ax:dx.
; bx and di are not altered.
cCall LN_IcpInRgcp
pop cx ;restore crun
; *pfcFirst = (hpfkp->rgfc)[ifc];
; *pfcLim = (hpfkp->rgfc)[ifc + 1];
; ax = ifc, es:di = pfkp, cx = crun
push es
pop ds
push ss
pop es
mov si,ax
shl si,1
shl si,1
add si,di
push si
mov si,di
; return (((char *)&((hpfkp->rgfc)[hpfkp->crun + 1]))[ifc]) << 1);
; ax = ifc
; cx = crun
errnz <(rgfcFkp)>
inc cx
shl cx,1
shl cx,1
add si,cx
add si,ax
mov cx,ax
; NOTE: we know ah is zero because ifc < (cbFkp / 4)
lodsb
shl ax,1
pop si
ret
;-------------------------------------------------------------------------
; MapStc(pdod, stc, pchp, ppap)
;-------------------------------------------------------------------------
; %%Function:N_MapStc %%Owner:BRADV
cProc N_MapStc,<PUBLIC,FAR>,<si,di>
ParmW pdod
ParmW stcArg
ParmW pchp
ParmW ppap
; /* M A P S T C */
; /* maps pdod, stc into
; *pchp
; *ppap
; */
; native MapStc(pdod, stc, pchp, ppap)
; struct DOD *pdod; int stc; struct CHP *pchp; struct PAP *ppap;
; {
; int cch, stcpT;
; CHAR HUGE *hpchpe, HUGE *hppape;
;
cBegin
mov bx,pdod
mov cx,stcArg
mov dx,pchp
mov di,ppap
cCall LN_MapStc,<>
; }
cEnd
; LN_MapStc takes pdod in bx, stc in cx, pchp in dx, ppap in di.
; ax, bx, cx, dx, si, di are altered.
; %%Function:LN_MapStc %%Owner:BRADV
PUBLIC LN_MapStc
LN_MapStc:
; #ifdef DEBUG
; int cMothers = 0;
; #endif /* DEBUG */
ifdef DEBUG
push cx ;save stc
xor cx,cx ;cMothers = 0;
endif ;DEBUG
; while (!pdod->fMother || pdod->fMotherStsh)
; {
MS01:
cmp [bx.FMotherDod],fFalse
je MS015
test [bx.FMotherStshDod],maskFMotherStshDod
je MS02
MS015:
ifdef DEBUG
; /* Assert (cMothers ++ < 5 && pdod->doc != docNil) with a call
; so as not to mess up short jumps */
call MS07
endif ;/* DEBUG */
; pdod = PdodDoc(pdod->doc);
; PdodOrNilFromDoc takes a doc in bx, and returns hNil in ax and bx
; if mpdochdod[doc] == hNil. Otherwise it returns doc in ax
; and pdod = *mpdochdod[doc] in bx. The zero flag is set according
; to the value of bx upon return. Only ax and bx are altered.
mov bx,[bx.docDod]
call LN_PdodOrNilFromDoc
jmp short MS01
; }
MS02:
ifdef DEBUG
pop cx ;restore stc
endif ;DEBUG
; cx = stc, dx = pchp, bx = pdod, di = ppap
; if (pdod == PdodDoc(docScrap) && vsab.docStsh != docNil)
push bx ;save pdod
mov bx,docScrap
; PdodOrNilFromDoc takes a doc in bx, and returns hNil in ax and bx
; if mpdochdod[doc] == hNil. Otherwise it returns doc in ax
; and pdod = *mpdochdod[doc] in bx. The zero flag is set according
; to the value of bx upon return. Only ax and bx are altered.
call LN_PdodOrNilFromDoc
pop ax ;restore pdod
xchg ax,bx
cmp ax,bx
jne MS03
cmp [vsab.docStshSab],docNil
je MS03
; pdod = PdodDoc(vsab.docStsh);
mov bx,[vsab.docStshSab]
; PdodOrNilFromDoc takes a doc in bx, and returns hNil in ax and bx
; if mpdochdod[doc] == hNil. Otherwise it returns doc in ax
; and pdod = *mpdochdod[doc] in bx. The zero flag is set according
; to the value of bx upon return. Only ax and bx are altered.
call LN_PdodOrNilFromDoc
MS03:
ifdef DEBUG
; /* Assert (pdod->hsttbChpe && ppap != 0) with a call
; so as not to mess up short jumps */
call MS10
endif ;/* DEBUG */
; psttbChpe = *pdod->hsttbChpe;
mov si,[bx.hsttbChpeDod]
mov si,[si]
push si ;save psttbChpe
; si = [sp] = psttbChpe, cx = stc, dx = pchp, bx = pdod, di = ppap
; vstcpMapStc = (stc + pdod->stsh.cstcStd) & 0377;
mov al,cl
add al,bptr ([bx.stshDod.cstcStdStsh])
xor ah,ah
; si = [sp] = psttbChpe, cx = stc, dx = pchp, bx = pdod, ax = vstcpMapStc
; di = ppap
; if (vstcpMapStc >= psttbChpe->ibstMac)
; {
cmp ax,[si.ibstMacSttb]
jl MS04
; vstcpMapStc = pdod->stsh.cstcStd;
mov ax,[bx.stshDod.cstcStdStsh]
; if (stc >= stcStdMin) goto LStcStandard;
cmp cx,stcStdMin
jl MS04
mov [vstcpMapStc],ax
; si = [sp] = psttbChpe, cx = stc, dx = pchp, bx = pdod, ax = vstcpMapStc
; di = ppap
jmp short LStcStandard
; }
; si = [sp] = psttbChpe, cx = stc, dx = pchp, bx = pdod, ax = vstcpMapStc
; di = ppap
MS04:
ifdef DEBUG
; /* Assert (pdod->hsttbPape) with a call
; so as not to mess up short jumps */
call MS13
endif ;/* DEBUG */
; psttbPape = *pdod->hsttbPape;
mov si,[bx.hsttbPapeDod]
mov si,[si]
; [sp] = psttbChpe, cx = stc, dx = pchp, bx = pdod, ax = vstcpMapStc
; di = ppap, si = psttbPape
ifdef DEBUG
; /* Assert (psttbPape->ibstMac > vstcpMapStc) with a call
; so as not to mess up short jumps */
call MS15
endif ;/* DEBUG */
; hppape = HpstFromSttb(pdod->hsttbPape,vstcpMapStc);
mov [vstcpMapStc],ax
;LN_LpstFromSttb takes a psttb in si, an ibst in ax, and returns an
;lpst in es:si, Only ax, bx, si, es are altered.
push bx ;save pdod in case we goto LStcStandard
call LN_LpstFromSttb
pop bx ;restore pdod
; [sp] = psttbChpe, cx = stc, dx = pchp, bx = pdod
; di = ppap, es:si = hppape
; if ((cch = *hppape++) == 0377) goto LStcStandard;
lods byte ptr es:[si]
cmp al,0377O
je LStcStandard
push cx ;save stc
push di ;save ppap
; bltbh(hppape, ppap, cch);
push ss
push es
pop ds
pop es
xor ah,ah
mov cx,ax
rep movsb
push ss
pop ds ;restore ds
; SetBytes(((char *)ppap) + cch, 0,
; ((cch < cbPAPBase) ?
; cbPAPBase : cbPAP) - cch);
; dx = pchp, di = ppap+cch, ax = cch
mov cx,cbPAPBase
cmp ax,cx
jl MS05
mov cx,cbPAP
MS05:
sub cx,ax
xor ax,ax
rep stosb
pop si ;restore ppap
pop cx ;restore stc
; ppap->stc = stc; /* return proper stc even if we faked the style */
mov [si.stcPap],cl
pop si ;restore psttbChpe
; si = psttbChpe, cx = stc, dx = pchp
; if (pchp)
; {
or dx,dx
jz MS06
ifdef DEBUG
; /* Assert (psttbChpe->ibstMac > vstcpMapStc) with a call
; so as not to mess up short jumps */
call MS17
endif ;/* DEBUG */
; hpchpe = HpstFromSttb(pdod->hsttbChpe, vstcpMapStc);
mov ax,[vstcpMapStc]
;LN_LpstFromSttb takes a psttb in si, an ibst in ax, and returns an
;lpst in es:si, Only ax, bx, si, es are altered.
call LN_LpstFromSttb
; es:si = hpchpe, cx = stc, dx = pchp
; cch = *hpchpe++;
push ss
push es
pop ds
pop es
lodsb
; bltbh(hpchpe, pchp, cch);
cbw
mov di,dx
mov cx,ax
rep movsb
push ss
pop ds ;restore ds
; SetBytes(((char *)pchp) + cch, 0, cwCHP*sizeof(int)-cch);
; assumes di = pchp + cch
mov cx,cbCHP
sub cx,ax
xor ax,ax
rep stosb
; }
; return;
jmp short MS06
; LStcStandard:
; [sp] = psttbChpe, cx = stc, dx = pchp, bx = pdod, di = ppap
LStcStandard:
pop ax ;remove psttbChpe from the stack.
; stcpT = vstcpMapStc;
push [vstcpMapStc]
; MapStc(pdod, 0, pchp, ppap);
; MapStcStandard(stc, pchp, ppap);
push cx ;stc argument for MapStcStandard
push dx ;pchp argument for MapStcStandard
push di ;ppap argument for MapStcStandard
xor cx,cx
; LN_MapStc takes pdod in bx, stc in cx, pchp in dx, ppap in di.
; ax, bx, cx, dx, si, di are altered.
call LN_MapStc
cCall MapStcStandard,<>
; vstcpMapStc = stcpT;
pop [vstcpMapStc]
MS06:
; }
ret
ifdef DEBUG
MS07:
; Assert (cMothers++ < 5);/* avoid a loop */
inc cx
cmp cx,6
jl MS08
push ax
push bx
push cx
push dx
mov ax,midFetchn3
mov bx,250
cCall AssertProcForNative,<ax, bx>
pop dx
pop cx
pop bx
pop ax
push ds
pop es
MS08:
; Assert (pdod->doc != docNil);
cmp [bx.docDod],docNil
jne MS09
push ax
push bx
push cx
push dx
mov ax,midFetchn3
mov bx,251
cCall AssertProcForNative,<ax, bx>
pop dx
pop cx
pop bx
pop ax
push ds
pop es
MS09:
ret
endif ;DEBUG
ifdef DEBUG
; Assert(pdod->hsttbChpe);
MS10:
cmp [bx.hsttbChpeDod],0
jnz MS11
push ax
push bx
push cx
push dx
mov ax,midFetchn3
mov bx,252
cCall AssertProcForNative,<ax, bx>
pop dx
pop cx
pop bx
pop ax
push ds
pop es
MS11:
; Assert(ppap != 0);
cmp di,0
jne MS12
push ax
push bx
push cx
push dx
mov ax,midFetchn3
mov bx,253
cCall AssertProcForNative,<ax, bx>
pop dx
pop cx
pop bx
pop ax
push ds
pop es
MS12:
ret
endif ;DEBUG
ifdef DEBUG
; Assert(pdod->hsttbPape);
MS13:
cmp [bx.hsttbPapeDod],0
jnz MS14
push ax
push bx
push cx
push dx
mov ax,midFetchn3
mov bx,254
cCall AssertProcForNative,<ax, bx>
pop dx
pop cx
pop bx
pop ax
push ds
pop es
MS14:
ret
endif ;DEBUG
ifdef DEBUG
; Assert(psttbPape->ibstMac > vstcpMapStc);
MS15:
; assumes ax = vstcpMapStc
cmp ax,[si.ibstMacSttb]
jl MS16
push ax
push bx
push cx
push dx
mov ax,midFetchn3
mov bx,255
cCall AssertProcForNative,<ax, bx>
pop dx
pop cx
pop bx
pop ax
push ds
pop es
MS16:
ret
endif ;DEBUG
ifdef DEBUG
; Assert(psttbChpe->ibstMac > vstcpMapStc);
MS17:
push ax
mov ax,[si.ibstMacSttb]
cmp ax,[vstcpMapStc]
pop ax
jg MS18
push ax
push bx
push cx
push dx
mov ax,midFetchn3
mov bx,256
cCall AssertProcForNative,<ax, bx>
pop dx
pop cx
pop bx
pop ax
push ds
pop es
MS18:
ret
endif ;DEBUG
;LN_LpstFromSttb takes a psttb in si, an ibst in ax, and returns an
;lpst in es:si, Only ax, bx, si, es are altered.
LN_LpstFromSttb:
ifdef DEBUG
mov bx,[wFillBlock]
endif ;DEBUG
push ss
pop es
add si,([rgbstSttb]) ;default es:si for !fExternal sttb
test [si.fExternalSttb - (rgbstSttb)],maskFExternalSttb
je LN_LFS01
mov bx,[si.SB_hqrgbstSttb - (rgbstSttb)]
;LN_ReloadSb takes an sb in bx and set es to the corresponding value.
;Only es and bx are altered.
call LN_ReloadSb
mov si,[si.OFF_hqrgbstSttb - (rgbstSttb)]
mov si,es:[si]
LN_LFS01:
xchg ax,bx
shl bx,1
add si,es:[bx+si]
ret
;-------------------------------------------------------------------------
; LowerRgch(pch, cch) GregC
;-------------------------------------------------------------------------
; %%Function:LowerRgch %%Owner:BRADV
cProc LowerRgch,<PUBLIC,FAR>,<si,di>
ParmW pch
ParmW cch
; /* L O W E R R G C H */
; /* converts characters to lower case */
; native LowerRgch(pch, cch)
; char *pch;
; int cch;
; {
cBegin
; for (; cch-- > 0; pch++)
xor bx,bx
mov di,[cch]
mov si,[pch]
or di,di
jz LowerRgch4
; *pch = AnsiLower(*pch);
LowerRgch2:
lodsb
cCall AnsiLower,<bx,ax>
mov [si-1],al
sub di,1
jnz LowerRgch2
LowerRgch4:
; }
cEnd
;-------------------------------------------------------------------------
; HpchFromFc(fn, fc)
;-------------------------------------------------------------------------
; %%Function:N_HpchFromFc %%Owner:BRADV
cProc N_HpchFromFc,<PUBLIC,FAR>,<si,di>
ParmW fn
ParmD fc
; /* H P C H F R O M F C */
; /* Returns pch to ch at fc in fn.
; Buffer number is left in vibp so that the buffer may be set dirty by caller.
; */
; native char HUGE *HpchFromFc(fn, fc)
; int fn;
; FC fc;
; {
cBegin
mov bx,[OFF_fc]
mov dx,[SEG_fc]
mov ax,[fn]
call LN_HpchFromFc
; }
cEnd
; LN_HpchFromFc takes fn in ax, and fc in dx:bx.
; The result is returned in dx:ax.
; ax, bx, cx, dx, si, di are altered.
; %%Function:LN_HpchFromFc %%Owner:BRADV
PUBLIC LN_HpchFromFc
LN_HpchFromFc:
; Assert(fn >= fnScratch && mpfnhfcb[fn] != hNil && fn < fnMax);
; Assert(fc < fcMax);
ifdef DEBUG
push ax
push bx
push cx
push dx
cmp ax,fnScratch
jl HFF01
push bx
mov bx,ax
shl bx,1
cmp mpfnhfcb[bx],hNil
pop bx
je HFF01
cmp ax,fnMax
jge HFF01
sub bx,LO_fcMax
sbb dx,HI_fcMax
jl HFF02
HFF01:
mov ax,midFetchn3
mov bx,1032
cCall AssertProcForNative,<ax, bx>
HFF02:
pop dx
pop cx
pop bx
pop ax
endif ;DEBUG
; vibp = IbpCacheFilePage(fn, (PN)(fc >> shftSector));
errnz <shftSector - 9>
push bx ;save low fc
xchg dl,dh
xchg bh,dl
shr bh,1
rcr dx,1
; LN_IbpCacheFilePage takes fn in ax, pn in dx.
; The result is returned in ax. ax, bx, cx, dx, di are altered.
call LN_IbpCacheFilePage
mov [vibp],ax
; bOffset = (int)fc & maskSector; /* beware native compiler bug */
; hpch = HpBaseForIbp(vibp) + bOffset;
; return (hpch);
;***Begin in line HpBaseForIbp
xor dx,dx
div [vbptbExt.cbpChunkBptb] ; ax = result, dx = remainder
add ax,[vbptbExt.SB_hprgbpExtBptb]
xchg ax,dx
errnz <cbSector - 512>
mov cl,9
shl ax,cl
;***End in line HpBaseForIbp
pop bx ;restore low fc
errnz <maskSector - 001FFh>
and bh,(maskSector SHR 8)
add ax,bx
ret
;-------------------------------------------------------------------------
; HpchGetPn(fn, pn)
;-------------------------------------------------------------------------
; %%Function:N_HpchGetPn %%Owner:BRADV
cProc N_HpchGetPn,<PUBLIC,FAR>,<si,di>
ParmW fn
ParmW pn
; /* H P C H G E T P N */
; /* Returns pch to start of buffer page containing page pn in file fn.
; Buffer number is left in vibp so that the buffer may be set dirty by caller.
; */
; native char HUGE *HpchGetPn(fn, pn)
; int fn;
; PN pn;
; {
cBegin
mov ax,[fn]
mov dx,[pn]
call LN_HpchGetPn
; }
cEnd
; LN_HpchGetPn takes fn in ax, and pn in dx.
; The result is returned in bx:ax. ax, bx, cx, dx, si, di are altered.
; %%Function:LN_HpGetPn %%Owner:BRADV
PUBLIC LN_HpchGetPn
LN_HpchGetPn:
; Assert(fn >= fnScratch && mpfnhfcb[fn] != hNil && fn < fnMax);
; Assert(pn >= 0 && pn <= 0x7fff);
ifdef DEBUG
push ax
push bx
push cx
push dx
cmp ax,fnScratch
jl HGP01
mov bx,ax
shl bx,1
cmp mpfnhfcb[bx],hNil
je HGP01
cmp ax,fnMax
jge HGP01
or dx,dx
jge HGP02
HGP01:
mov ax,midFetchn3
mov bx,1033
cCall AssertProcForNative,<ax, bx>
HGP02:
pop dx
pop cx
pop bx
pop ax
endif ;DEBUG
; vibp = IbpCacheFilePage(fn, pn);
; LN_IbpCacheFilePage takes fn in ax, pn in dx.
; The result is returned in ax. ax, bx, cx, dx, di are altered.
call LN_IbpCacheFilePage
mov [vibp],ax
; hpch = HpBaseForIbp(vibp); /* possible compiler problem */
; return(hpch);
;***Begin in line HpBaseForIbp
xor dx,dx
div [vbptbExt.cbpChunkBptb] ; ax = result, dx = remainder
add ax,[vbptbExt.SB_hprgbpExtBptb]
xchg ax,dx
errnz <cbSector - 512>
mov cl,9
shl ax,cl
;***End in line HpBaseForIbp
mov bx,dx
ret
;-------------------------------------------------------------------------
; SetDirty(ibp)
;-------------------------------------------------------------------------
; /* S E T D I R T Y */
; /* ibp in internal cache */
; native SetDirty(ibp)
; int ibp;
; {
; %%Function:SetDirty %%Owner:BRADV
PUBLIC SetDirty
SetDirty:
; struct BPS HUGE *hpbps;
; hpbps = &((struct BPS HUGE *)vbptbExt.hpmpibpbps)[ibp];
; hpbps->fDirty = fTrue;
mov bx,[vbptbExt.SB_hpmpibpbpsBptb]
;LN_ReloadSb takes an sb in bx and set es to the corresponding value.
;Only es and bx are altered.
call LN_ReloadSb
mov bx,sp
mov bx,[bx+4]
errnz <cbBpsMin - 8>
shl bx,1
shl bx,1
shl bx,1
add bx,[vbptbExt.OFF_hpmpibpbpsBptb]
mov es:[bx.fDirtyBps],fTrue
; Assert(hpbps->fn != fnNil);
ifdef DEBUG
cmp es:[bx.fnBps],fnNil
jnz SD01
inc bp
push bp
mov bp,sp
push bx
mov ax,midFetchn3
mov bx,1001
cCall AssertProcForNative,<ax,bx>
pop bx
pop bp
dec bp
SD01:
endif ;DEBUG
; PfcbFn(hpbps->fn)->fDirty = fTrue;
mov bl,es:[bx.fnBps]
xor bh,bh
shl bx,1
mov bx,[bx.mpfnhfcb]
mov bx,[bx]
or [bx.fDirtyFcb],maskfDirtyFcb
; }
db 0CAh, 002h, 000h ;far ret, pop 2 bytes
;/*
;REVIEW(robho): Possible improvements to IbpCacheFilePage swapping strategy
;robho 3/29/85: Would be nice some day to incorporate a list of the easily
;accessable volumes (disks currently in the drives) into the file page cache
;swapping out algorithm - try to avoid swaps that involve the user changing
;disks.
;*/
;-------------------------------------------------------------------------
; IbpCacheFilePage(fn, pn)
;-------------------------------------------------------------------------
;/* I B P C A C H E F I L E P A G E */
;/* Get page pn of file fn into file cache pbptb.
;Return ibp.
;See w2.rules for disk emergencies.
;*/
;native int IbpCacheFilePage(fn, pn)
;int fn;
;PN pn;
;{
; int ibp, iibp;
;/* NOTE: IibpHash macro has changed */
; %%Function:N_IbpCacheFilePage %%Owner:BRADV
cProc N_IbpCacheFilePage,<PUBLIC,FAR>,<si,di>
ParmW fn
ParmW pn
cBegin
mov ax,fn
mov dx,pn
call LN_IbpCacheFilePage
cEnd
;End of IbpCacheFilePage
; LN_IbpCacheFilePage takes fn in ax, pn in dx.
; The result is returned in ax. ax, bx, cx, dx, di are altered.
; %%Function:LN_IbpCacheFilePage %%Owner:BRADV
PUBLIC LN_IbpCacheFilePage
LN_IbpCacheFilePage:
; Assert(fn >= fnScratch && mpfnhfcb[fn] != hNil && fn < fnMax);
; Assert(pn >= 0 && pn <= 0x7fff);
ifdef DEBUG
push ax
push bx
push cx
push dx
cmp ax,fnScratch
jl ICFP01
mov bx,ax
shl bx,1
cmp mpfnhfcb[bx],hNil
je ICFP01
cmp ax,fnMax
jge ICFP01
or dx,dx
jge ICFP02
ICFP01:
mov ax,midFetchn3
mov bx,1000
cCall AssertProcForNative,<ax, bx>
ICFP02:
pop dx
pop cx
pop bx
pop ax
endif ;DEBUG
; iibp = IibpHash(fn, pn, vbptbExt.iibpHashMax);
;#define IibpHash(fn, pn, iibpHashMax) (((fn) * 33 + (pn) * 5) & ((iibpHashMax) - 1))
mov di,ax
mov cl,5
shl di,cl
add di,ax
xchg ax,cx
mov ax,dx
add di,ax
shl ax,1
shl ax,1
add di,ax
mov ax,[vbptbExt.iibpHashMaxBptb]
dec ax
and di,ax
; ibp = ((int far *)LpFromHp(vbptbExt.hprgibpHash))[iibp];
mov bx,[vbptbExt.SB_hprgibpHashBptb]
;LN_ReloadSb takes an sb in bx and set es to the corresponding value.
;Only es and bx are altered.
call LN_ReloadSb
mov bx,[vbptbExt.OFF_hprgibpHashBptb]
shl di,1
mov ax,es:[bx+di]
ICFP04:
;/* search list of buffers with the same hash code */
; while (ibp != ibpNil)
; {
cmp ax,ibpNil
je ICFP07
; qbps = QbpsHpIbp(vbptbExt.hpmpibpbps, ibp);
;#define QbpsHpIbp(hpmpibpbps, ibp) \
; (&((struct BPS far *)LpFromHp(hpmpibpbps))[ibp])
;Assert ([vbptbExt.SB_hpmpibpbpsBptb] == [vbptbExt.SB_hprgibpHashBptb])
;with a call so as not to mess up short jumps.
ifdef DEBUG
call ICFP11
endif ;DEBUG
errnz <cbBpsMin - 8>
mov bx,ax
shl bx,1
shl bx,1
shl bx,1
add bx,[vbptbExt.OFF_hpmpibpbpsBptb]
; if (qbps->pn == pn && qbps->fn == fn)
; {
cmp dx,es:[bx.pnBps]
jne ICFP06
cmp cl,es:[bx.fnBps]
jne ICFP06
;/* page found in the cache */
; qbps->ts = ++(vbptbExt.tsMruBps);
inc [vbptbExt.tsMruBpsBptb]
mov cx,[vbptbExt.tsMruBpsBptb]
mov es:[bx.tsBps],cx
; vbptbExt.hpmpispnts[(ibp << 2) / vbptbExt.cqbpspn]
; = vbptbExt.tsMruBps;
;Assert ([vbptbExt.SB_hpmpispnts] == [vbptbExt.SB_hprgibpHash])
;with a call so as not to mess up short jumps.
ifdef DEBUG
call ICFP13
endif ;DEBUG
push ax ;save ibp
shl ax,1
shl ax,1
cwd
div [vbptbExt.cqbpspnBptb]
mov bx,ax
pop ax ;restore ibp
shl bx,1
add bx,[vbptbExt.OFF_hpmpispntsBptb]
mov es:[bx],cx
; return(ibp);
; }
jmp short ICFP10
; ibp = qbps->ibpHashNext;
; }
ICFP06:
mov ax,es:[bx.ibpHashNextBps]
jmp short ICFP04
ICFP07:
; if (fn == vfnPreload)
; { /* Read in big chunks! */
; if ((ibp = IbpLoadFn(fn,pn)) != ibpNil)
; return ibp;
; }
cmp cx,[vfnPreload]
jnz ICFP09
push cx ;save fn
push dx ;save pn
cCall IbpLoadFn,<cx,dx>
pop dx ;restore pn
pop cx ;restore fn
cmp ax,ibpNil
jne ICFP10
ICFP09:
;/* page not found, read page into cache */
; return IbpReadFilePage(fn, pn, iibp);
shr di,1
cCall IbpReadFilePage,<cx, dx, di>
ICFP10:
;}
ret
ifdef DEBUG
;Assert ([vbptbExt.SB_hpmpibpbps] == [vbptbExt.SB_hprgibpHash]);
ICFP11:
push ax
push bx
push cx
push dx
mov ax,[vbptbExt.SB_hpmpibpbpsBptb]
cmp ax,[vbptbExt.SB_hprgibpHashBptb]
je ICFP12
mov ax,midFetchn3
mov bx,1030
cCall AssertProcForNative,<ax, bx>
ICFP12:
pop dx
pop cx
pop bx
pop ax
ret
endif ;DEBUG
ifdef DEBUG
;Assert ([vbptbExt.SB_hpmpispnts] == [vbptbExt.SB_hprgibpHash]);
ICFP13:
push ax
push bx
push cx
push dx
mov ax,[vbptbExt.SB_hpmpispntsBptb]
cmp ax,[vbptbExt.SB_hprgibpHashBptb]
je ICFP14
mov ax,midFetchn3
mov bx,1031
cCall AssertProcForNative,<ax, bx>
ICFP14:
pop dx
pop cx
pop bx
pop ax
ret
endif ;DEBUG
;-------------------------------------------------------------------------
; DoPrmSgc(prm, prgbProps, sgc)
;-------------------------------------------------------------------------
; %%Function:N_DoPrmSgc %%Owner:BRADV
cProc N_DoPrmSgc,<PUBLIC,FAR>,<si,di>
ParmW prm
ParmW prgbProps
ParmW sgc
; /* D O P R M S G C */
; /* apply prm to prgbProps that is of type sgc */
; native DoPrmSgc(prm, prgbProps, sgc)
; struct PRM prm; int sgc; char *prgbProps;
; {
; int cch;
; char *pprl;
; char grpprl[2];
cBegin
mov cx,[prm]
mov di,[prgbProps]
mov dx,[sgc]
cCall LN_DoPrmSgc,<>
; }
cEnd
; LN_DoPrmSgc takes prm in cx,
; prgbProps in di, sgc in dx.
; ax, bx, cx, dx, si, di are altered.
; %%Function:LN_DoPrmSgc %%Owner:BRADV
PUBLIC LN_DoPrmSgc
LN_DoPrmSgc:
; if (prm.fComplex)
mov bx,cx
errnz <maskfComplexPrm-1>
test bl,maskfComplexPrm
jz DPS01
; {
; struct PRC *pprc;
;
; pprc = *HprcFromPprmComplex(&prm);
;#define HprcFromPprmComplex(pprm) ((struct PRC **)((pprm)->cfgrPrc<<1))
errnz <maskcfgrPrcPrm - 0FFFEh>
and bl,0FEh
mov bx,[bx]
; cch = pprc->bprlMac;
mov cx,[bx.bprlMacPrc]
; pprl = pprc->grpprl;
lea si,[bx.grpprlPrc]
push ax ;room for grpprl (not used by complex prms)
; }
jmp short DPS02
DPS01:
; else
; {
; /* cch = 1 will pick up one sprm, no matter what its length */
; cch = 1;
mov cx,1
; grpprl[0] = prm.sprm;
; grpprl[1] = prm.val;
; assumed bx = prm
errnz <(sprmPrm) - 0>
errnz <masksprmPrm - 000FEh>
errnz <(valPrm) - 1>
shr bl,1
push bx
; pprl = grpprl;
mov si,sp
; }
DPS02:
; ApplyPrlSgc((char HUGE *)pprl, cch, prgbProps, sgc);
mov ax,sbDds
push ax
push si
push cx
push di
push dx
ifdef DEBUG
cCall S_ApplyPrlSgc,<>
else ;not DEBUG
call far ptr N_ApplyPrlSgc
endif ;DEBUG
pop dx ;remove "grpprl" from stack
; }
ret
APS_CALL label word
dw APS_spraBit
dw APS_spraByte
dw APS_spraWord
dw APS_spraCPlain
dw APS_spraCFtc
dw APS_spraCKul
dw APS_spraCSizePos
dw APS_spraSpec
dw APS_spraIco
dw APS_spraCHpsInc
dw APS_spraCHpsPosAdj
;-------------------------------------------------------------------------
; N_ApplyPrlSgc(hpprlFirst, cch, prgbProps, sgc)
;-------------------------------------------------------------------------
; %%Function:N_ApplyPrlSgc %%Owner:BRADV
cProc N_ApplyPrlSgc,<PUBLIC,FAR>,<si,di>
ParmD hpprlFirst
ParmW cch
ParmW prgbProps
ParmW sgc
; /* A P P L Y P R L S G C */
; /* apply sprms of type sgc in grpprl of length cch to prgbProps */
; native ApplyPrlSgc(pprl, cch, prgbProps, sgc)
; char *pprl; struct CHP *prgbProps; int cch, sgc;
; {
; int val, val2;
; struct SIAP siap;
; CHAR HUGE *hpprl = hpprlFirst;
cBegin
mov si,[OFF_hpprlFirst]
mov di,[prgbProps]
mov dx,[sgc]
mov cl,ibitSgcEsprm
shl dl,cl
mov cx,[cch]
;APS16 performs ReloadSb for hpprlFirst. bx, es are altered.
call APS16
; cx = cch, dl = sgc shl ibitsgcEsprm, es:si = qprl, di = prgbProps
; while (cch > 0)
; {
or cx,cx
jle APS04
APS01:
; int cchSprm;
; struct ESPRM esprm;
;
; Assert(*qprl < sprmMax);
ifdef DEBUG
; /* Assert (*qprl < sprmMax) with a call
; so as not to mess up short jumps */
call APS11
endif ;/* DEBUG */
; esprm = dnsprm[*qprl];
;/* if we encounter a pad character at the end of a grpprl of a PAPX we
; set the length to 1 and continue. */
; if (sprm == 0)
; {
; cchSprm = 1;
; goto LNext;
; }
mov al,es:[si]
inc si ; es:si = qprl + 1
xor ah,ah
mov bx,ax
inc ax
or bl,bl
je APS03
errnz <cbEsprmMin - 4>
shl bx,1
shl bx,1
errnz <maskCchEsprm AND 0FF00h>
mov al,[bx.dnsprm.cchEsprm]
mov bx,[bx.dnsprm] ; bx = esprm
; if ((cchSprm = esprm.cch) == 0)
; {
and ax,maskCchEsprm
errnz <ibitcchEsprm - 0>
jnz APS02
; if (sprm == sprmTDefTable)
; bltbh(hpprl + 1, &cchSprm, sizeof(int));
mov ax,es:[si]
cmp bptr es:[si-1],sprmTDefTable
je APS015
; else
; {
; cchSprm = val;
xor ah,ah
; if (cchSprm == 255 && sprm == sprmPChgTabs)
; {
cmp bptr es:[si-1],sprmPChgTabs
jne APS015
; char HUGE *hpprlT;
; cchSprm = (*(hpprlT = hpprl + 2) * 4) + 1;
; cchSprm += (*(hpprlT + cchSprm) * 3) + 1;
; }
; }
; Assert (cchSprm > 255 || cchSprm == esprm.cch);
ifdef DEBUG
; /* Assert (cchSprm > 255 || cchSprm == esprm.cch) with a call
; so as not to mess up short jumps */
call APS17
endif ;/* DEBUG */
push bx
mov bl,es:[si+1]
xor bh,bh
shl bx,1
shl bx,1
mov al,es:[bx+si+2]
add bx,ax
inc ax
shl ax,1
add ax,bx
pop bx
; cchSprm += 2;
; }
APS015:
add ax,2
; }
APS02:
; ax = cchSprm, bx = esprm, cx = cch, dl = sgc shl ibitsgcEsprm,
; es:si = qprl+1, di = prgbProps
; if (esprm.sgc == sgc)
errnz <(sgcEsprm) - 1>
xor bh,dl
test bh,masksgcEsprm
jne APS03
push ax ;save cchSprm
push cx ;save cch
push dx ;save sgc
; val = *(qprl + 1);
mov dh,es:[si] ; ch = val
; {
; switch (esprm.spra)
mov ax,bx
errnz <(spraEsprm) - 1>
mov bl,bh
and bx,maskspraEsprm
errnz <ibitSpraEsprm>
shl bx,1
; Assert (spra < 11);
ifdef DEBUG
; /* Assert (spra < 11) with a call
; so as not to mess up short jumps */
call APS13
endif ;/* DEBUG */
; all of the switch cases return to APS03
; ax = esprm, dh = val, si = qprl+1, di = prgbProps
call [bx.APS_CALL]
pop dx ;restore sgc
pop cx ;restore cch
pop ax ;restore cchSprm
; {
;LNext:
APS03:
; This code from after the switch is performed below in the C version.
; qprl += cchSprm;
; ax = cchSprm, cx = cch, dl = sgc shl ibitsgcEsprm, es:si = qprl+1
; di = prgbProps
add si,ax
dec si
; cch -= cchSprm;
sub cx,ax
jg APS01
; }
APS04:
; }
cEnd
; ax = esprm, dh = val, es:si = qprl+1, di = prgbProps
APS_spraWord:
; case spraWord:
; /* sprm has a word parameter that is to be stored at b */
; bltbx(LpFromHp(pprl+1), (CHAR *)prgbProps + esprm.b, 2);
xchg ax,bx
and bx,maskbEsprm
errnz <maskbEsprm - 0FEh>
errnz <(bEsprm) - 0>
shr bx,1
mov ax,es:[si]
mov [bx.di],ax
; break;
ret
; ax = esprm, dh = val, es:si = qprl+1, di = prgbProps
APS_spraByte:
; case spraByte:
; /* sprm has a byte parameter that is to be stored at b */
; *((char *)prgbProps + esprm.b) = val;
xchg ax,bx
and bx,maskbEsprm
errnz <maskbEsprm - 0FEh>
errnz <(bEsprm) - 0>
shr bx,1
mov [bx.di],dh
; break;
ret
; ax = esprm, dh = val, es:si = qprl+1, di = prgbProps
APS_spraBit:
; case spraBit:
; maskBit = (1<<(shftBit = esprm.b));
mov cl,al
and cl,maskbEsprm
errnz <ibitbEsprm-1>
errnz <(bEsprm) - 0>
shr cl,1
; cl = shftBit
mov bx,1
shl bx,cl
;/* if the high bit of the operand is on and the low bit of the operand is off
; we will make prop to be same as vchpStc prop. if the high operand bit is on
; and the low operand bit is on, we will set the prop to the negation of the
; vchpStc prop. */
; if (val & 0x80)
; {
; *((int *)prgbProps) &= ~maskBit;
; *((int *)prgbProps) |=
; (((*(int *)&vchpStc) & maskBit) ^
; ((val & 0x01)<<shftBit));
; }
; else if (val == 0)
; *((int *)prgbProps) &= ~(maskBit);
; else
; *((int *)prgbProps) |= maskBit;
; break;
; ax = esprm, dh = val, es:si = qprl+1, di = prgbProps,
; cl = shftBit, bx = maskBit
or dh,dh
js APS045
jnz APS05
APS045:
not bx
and [di],bx
or dh,dh
jns APS06
not bx
and bx,wptr ([vchpStc])
xor ax,ax
shr dh,1
inc cx
rcl ax,cl
xor bx,ax
APS05:
or [di],bx
APS06:
; break;
ret
; ax = esprm, dh = val, es:si = qprl+1, di = prgbProps
APS_spraCPlain:
; case spraCPlain:
; /* fSpec and fFldVanish are properties that
; the user is not allowed to modify! */
; val = (*(int *)prgbProps) & maskFNonUser;
mov dx,wptr [di]
and dx,maskfNonUser
; blt(&vchpStc, prgbProps, cwCHPBase);
push di
push es
push ds
pop es
mov ax,dataOffset vchpStc
xchg ax,si
errnz <cwCHPBase - 4>
movsw
movsw
movsw
movsw
xchg ax,si
pop es
pop di
; Assert((*(int *)&vchpStc & maskFNonUser) == 0);
ifdef DEBUG
test wptr [vchpStc],maskfNonUser
je APS063
push ax
push bx
push cx
push dx
mov ax,midFetchn3
mov bx,701
cCall AssertProcForNative,<ax, bx>
;APS16 performs ReloadSb for hpprlFirst. bx, es are altered.
call APS16
pop dx
pop cx
pop bx
pop ax
APS063:
endif ;/* DEBUG */
; (*(int *)prgbProps) |= val;
or wptr [di],dx
; break;
ret
; ax = esprm, dh = val, es:si = qprl+1, di = prgbProps
APS_spraCFtc:
; case spraCFtc:
; bltb(LpFromHp(pprl+1), &val, 2);
mov ax,es:[si]
; prgbProps->ftc = val;
mov [di.ftcChp],ax
; break;
ret
; ax = esprm, dh = val, es:si = qprl+1, di = prgbProps
APS_spraCKul:
; case spraCKul:
; Assert(val <= 7); /* hand native assumption */
ifdef DEBUG
cmp dh,7
jbe APS067
push ax
push bx
push cx
push dx
mov ax,midFetchn3
mov bx,702
cCall AssertProcForNative,<ax, bx>
;APS16 performs ReloadSb for hpprlFirst. bx, es are altered.
call APS16
pop dx
pop cx
pop bx
pop ax
APS067:
endif ;/* DEBUG */
; prgbProps->kul = val;
mov cl,ibitKulChp
shl dh,cl
and [di.kulChp],NOT maskKulChp
or [di.kulChp],dh
; break;
ret
; ax = esprm, dh = val, es:si = qprl+1, di = prgbProps
APS_spraCSizePos:
; case spraCSizePos:
; bltb(LpFromHp(pprl+1), &siap, cbSIAP);
; if ((val = siap.hpsSize) != 0)
mov al,es:[si.hpsSizeSiap]
or al,al
jz APS07
; prgbProps->hps = val;
mov [di.hpsChp],al
APS07:
; if ((val = siap.cInc) != 0)
mov al,es:[si.cIncSiap]
errnz <maskcIncSiap - 0007Fh>
shl al,1
jz APS08
; prgbProps->hps = HpsAlter(prgbProps->hps,
; val >= 64 ? val - 128 : val);
mov cl,1
;APS15 performs prgbProps->hps
;= HpsAlter(prgbProps->hps, (al >= 128 ? al - 256 : al) >> cl);
;ax, bx, cx, dx are altered.
call APS15
APS08:
; if ((val = siap.hpsPos) != hpsPosNil)
errnz <(hpsPosSiap) - (fAdjSiap) - 1)
mov ax,wptr (es:[si.fAdjSiap])
cmp ah,hpsPosNil
je APS10
; {
; if (siap.fAdj)
push ax ;save val
test al,maskfAdjSiap
jz APS09
; {
; if (val != 0)
; { /* Setting pos to super/sub */
; if (prgbProps->hpsPos == 0)
; prgbProps->hps = HpsAlter(prgbProps->hps, -1);
; }
; else
; { /* Restoring pos to normal */
; if (prgbProps->hpsPos != 0)
; prgbProps->hps = HpsAlter(prgbProps->hps, 1);
; }
APS085:
cmp ah,1
rcr al,1
cmp [di.hpsPosChp],0
rcr ah,1
xor al,ah
; do nothing if ((val == 0) ^ (prgbProps->hpsPos) == 0) == fFalse
jns APS09
cwd ;dx = (prgbProps->hpsPos == 0 ? -1 : 0)
shl dx,1
inc dx ;dx = (prgbProps->hpsPos == 0 ? -1 : 1)
mov al,[di.hpsChp]
xor ah,ah
cCall HpsAlter,<ax,dx>
;APS16 performs ReloadSb for hpprlFirst. bx, es are altered.
call APS16
mov [di.hpsChp],al
APS09:
; prgbProps->hpsPos = val;
pop ax ;restore val
mov [di.hpsPosChp],ah
; }
APS10:
; break;
ret
; case spraCHpsInc:
; val &= 255;
; prgbProps->hps = HpsAlter(prgbProps->hps,
; val >= 128 ? val - 256 : val);
; break;
APS_spraCHpsInc:
mov al,dh
mov cl,0
;APS15 performs prgbProps->hps
;= HpsAlter(prgbProps->hps, (al >= 128 ? al - 256 : al) >> cl);
;ax, bx, cx, dx are altered.
call APS15
ret
; case spraCHpsPosAdj:
; if (val != 0)
; { /* Setting pos to super/sub */
;
; if (prgbProps->hpsPos == 0)
; prgbProps->hps = HpsAlter(prgbProps->hps, -1);
; }
; else
; { /* Restoring pos to normal */
; if (prgbProps->hpsPos != 0)
; prgbProps->hps = HpsAlter(prgbProps->hps, 1);
; }
; prgbProps->hpsPos = val;
; break;
APS_spraCHpsPosAdj:
mov ah,dh
push ax ;save val
jmp short APS085
; ax = esprm, dh = val, es:si = qprl+1, di = prgbProps
APS_spraIco:
; case spraCIco:
; prgbProps->ico = val;
errnz <maskIcoChp - 00Fh>
and dh,maskIcoChp
and [di.icoChp],NOT maskIcoChp
or [di.icoChp],dh
; break;
ret
; #ifdef DEBUG
; default:Assert(fFalse); /* hand native assumption */
; #endif
; /* other special actions */
; ax = esprm, dh = val, es:si = qprl+1, di = prgbProps
APS_spraSpec:
; case spraSpec:
;/* if sprmPStcPermute is the first sprm of a grpprl, it would have been
; interpreted in CachePara before the papx grpprl was applied. */
; if (hpprl != hpprlFirst || sprm != sprmPStcPermute)
; ApplySprm(hpprl, sprm, val, prgbProps);
dec si
mov bx,si
lods bptr es:[si]
cmp bx,[OFF_hpprlFirst]
jne APS103
cmp al,sprmPStcPermute
je APS107
APS103:
push [SEG_hpprlFirst]
push bx
xor ah,ah
push ax
mov al,dh
push ax
push di
cCall ApplySprm,<>
;APS16 performs ReloadSb for hpprlFirst. bx, es are altered.
call APS16
APS107:
ret
; }
; }
; The following code is done above in the assembler version
; at APS03
; cch -= cchSprm;
; pprl += cchSprm;
; }
; }
ifdef DEBUG
; Assert(*qprl < sprmMax);
APS11:
cmp byte ptr es:[si],sprmMax
jb APS12
push ax
push bx
push cx
push dx
mov ax,midFetchn3
mov bx,700
cCall AssertProcForNative,<ax, bx>
;APS16 performs ReloadSb for hpprlFirst. bx, es are altered.
call APS16
pop dx
pop cx
pop bx
pop ax
APS12:
ret
endif ;DEBUG
ifdef DEBUG
; Assert(spra < 11);
APS13:
cmp bx,11 SHL 1
jb APS14
push ax
push bx
push cx
push dx
mov ax,midFetchn3
mov bx,1021
cCall AssertProcForNative,<ax, bx>
;APS16 performs ReloadSb for hpprlFirst. bx, es are altered.
call APS16
pop dx
pop cx
pop bx
pop ax
APS14:
ret
endif ;DEBUG
;APS15 performs prgbProps->hps
;= HpsAlter(prgbProps->hps, (al >= 128 ? al - 256 : al) >> cl);
;ax, bx, cx, dx are altered.
APS15:
mov bl,[di.hpsChp]
xor bh,bh
cbw
sar ax,cl
cCall HpsAlter,<bx,ax>
;APS16 performs ReloadSb for hpprlFirst. bx, es are altered.
call APS16
mov [di.hpsChp],al
ret
;APS16 performs ReloadSb for hpprlFirst. bx, es are altered.
APS16:
mov bx,[SEG_hpprlFirst]
;LN_ReloadSb takes an sb in bx and set es to the corresponding value.
;Only es and bx are altered.
call LN_ReloadSb
ret
ifdef DEBUG
; Assert (cchSprm > 255 || cchSprm == esprm.cch);
APS17:
push ax
push bx
push cx
push dx
mov cx,ax ;save old cchSprm
mov bl,es:[si+1]
xor bh,bh
shl bx,1
shl bx,1
mov al,es:[bx+si+2]
add bx,ax
inc ax
shl ax,1
add ax,bx
cmp ax,255
ja APS18
cmp ax,cx
je APS18
mov ax,midFetchn3
mov bx,1024
cCall AssertProcForNative,<ax, bx>
APS18:
;APS16 performs ReloadSb for hpprlFirst. bx, es are altered.
call APS16
pop dx
pop cx
pop bx
pop ax
ret
endif ;DEBUG
;
;
;-------------------------------------------------------------------------
; FetchCpAndPara(doc, cp, fcm) GregC
;-------------------------------------------------------------------------
; %%Function:FetchCpAndPara %%Owner:BRADV
cProc FetchCpAndPara,<PUBLIC,FAR>,<>
ParmW doc
ParmD cp
ParmW fcm
; /* F E T C H C P A N D P A R A */
; native FetchCpAndPara( doc, cp, fcm )
; int doc;
; CP cp;
; int fcm;
; {
cBegin
; CachePara( doc, cp );
; FetchCp( doc, cp, fcm );
mov bx,[doc]
mov ax,[OFF_cp]
mov dx,[SEG_cp]
push bx
push dx
push ax
push [fcm]
push bx
push dx
push ax
ifdef DEBUG
cCall S_CachePara,<>
cCall S_FetchCp,<>
else ;not DEBUG
cCall N_CachePara,<>
cCall N_FetchCp,<>
endif ;DEBUG
; }
cEnd
;
;-------------------------------------------------------------------------
; FetchCpAndParaCa(pca,fcm)
;-------------------------------------------------------------------------
; %%Function:FetchCpAndParaCa %%Owner:BRADV
cProc FetchCpAndParaCa,<PUBLIC,FAR>,<si>
ParmW pca
ParmW fcm
;/* F E T C H C P A N D P A R A C A */
;native FetchCpAndParaCa( pca, fcm )
;struct CA *pca;
;int fcm;
;{
cBegin
; CacheParaCa(pca);
; FetchCp(pca->doc, pca->cpFirst, fcm);
mov si,[pca]
errnz <(cpFirstCa) - 0>
lodsw
xchg ax,dx
lodsw
mov cx,[si.docCa-4]
push cx
push ax
push dx
push [fcm]
push cx
push ax
push dx
ifdef DEBUG
cCall S_CachePara,<>
cCall S_FetchCp,<>
else ;not DEBUG
cCall N_CachePara,<>
cCall N_FetchCp,<>
endif ;DEBUG
;}
cEnd
;-------------------------------------------------------------------------
; CacheParaCa(pca)
;-------------------------------------------------------------------------
; %%Function:CacheParaCa %%Owner:BRADV
cProc CacheParaCa,<PUBLIC,FAR>,<>
ParmW pca
;/* C A C H E P A R A C A */
;/* alternative entry point */
;CacheParaCa(pca)
;struct CA *pca;
;{
cBegin
; CachePara(pca->doc, pca->cpFirst);
mov bx,[pca]
ifdef DEBUG
cCall S_CachePara,<[bx.docCa],[bx.HI_cpFirstCa],[bx.LO_cpFirstCa]>
else ;not DEBUG
cCall N_CachePara,<[bx.docCa],[bx.HI_cpFirstCa],[bx.LO_cpFirstCa]>
endif ;DEBUG
;}
cEnd
;-------------------------------------------------------------------------
; ChFetch(pca)
;-------------------------------------------------------------------------
; %%Function:ChFetch %%Owner:BRADV
cProc ChFetch,<PUBLIC,FAR>,<>
ParmW doc
ParmD cp
ParmW fcm
;/* C H F E T C H */
;NATIVE ChFetch(doc, cp, fcm)
;int doc;
;CP cp;
;int fcm;
;{
; int ch;
cBegin
; if (fcm != fcmChars)
mov ax,[fcm]
mov bx,[OFF_cp]
mov cx,[SEG_cp]
mov dx,[doc]
push dx
push cx
push bx
push ax ;args for FetchCp
cmp ax,fcmChars
je CF01
; CachePara(doc, cp);
ifdef DEBUG
cCall S_CachePara,<dx,cx,bx>
else ;not DEBUG
cCall N_CachePara,<dx,cx,bx>
endif ;DEBUG
CF01:
; FetchCp(doc, cp, fcm);
ifdef DEBUG
cCall S_FetchCp,<>
else ;not DEBUG
cCall N_FetchCp,<>
endif ;DEBUG
; ch = *vhpchFetch;
mov bx,whi ([vhpchFetch])
;LN_ReloadSb takes an sb in bx and set es to the corresponding value.
;Only es and bx are altered.
call LN_ReloadSb
mov bx,wlo ([vhpchFetch])
; return (ch);
xor ax,ax
mov al,es:[bx]
;}
cEnd
;-------------------------------------------------------------------------
; FAbsPap(doc,ppap)
;-------------------------------------------------------------------------
; %%Function:FAbsPap %%Owner:BRADV
PUBLIC FAbsPap
FAbsPap:
;/*********************/
;/* F A b s P a p */
;NATIVE int FAbsPap(doc, ppap)
;int doc;
;struct PAP *ppap;
;{
;/* returns fTrue if pap describes an absolutely positioned object */
; struct DOD *pdod = PdodDoc(doc);
;
mov bx,sp
mov dx,[bx+4]
mov bx,[bx+6]
;doc in bx, ppap in dx
; PdodOrNilFromDoc takes a doc in bx, and returns hNil in ax and bx
; if mpdochdod[doc] == hNil. Otherwise it returns doc in ax
; and pdod = *mpdochdod[doc] in bx. The zero flag is set according
; to the value of bx upon return. Only ax and bx are altered.
call LN_PdodOrNilFromDoc
ifdef DEBUG
jnz FAP01
inc bp
push bp
mov bp,sp ;set up bp chain for call
push ax
push bx
push cx
push dx
mov ax,midFetchn3
mov bx,1022
cCall AssertProcForNative,<ax, bx>
pop dx
pop cx
pop bx
pop ax
pop bp ;restore old bp chain
dec bp
FAP01:
endif ;DEBUG
; int fAbs = doc != vdocTemp && !pdod->fFtn Win (&& !pdod->fAtn) &&
; (ppap->dxaAbs != 0 || ppap->dyaAbs != 0 ||
; ppap->pcHorz != pcHColumn || ppap->dxaWidth != 0);
;
; return(fAbs);
errnz <fFalse>
mov ax,[vdocTemp]
sub ax,[doc]
jz FAP02
xor ax,ax ;return fFalse
errnz <(fFtnDod) - (fAtnDod)>
test [bx.fFtnDod],maskfFtnDod+maskfAtnDod
jnz FAP02
mov bx,dx
mov cl,[bx.pcHorzPap]
errnz <pcHColumn - 0>
and cx,maskPcHorzPap
or cx,[bx.dxaAbsPap]
or cx,[bx.dyaAbsPap]
or cx,[bx.dxaWidthPap]
jz FAP02
errnz <fTrue - fFalse - 1>
inc ax
FAP02:
; }
db 0CAh, 004h, 000h ;far ret, pop 4 bytes
;-------------------------------------------------------------------------
; FInTableDocCp(doc, cp)
;-------------------------------------------------------------------------
;/* F I N T A B L E D O C C P */
;/* Returns whether a doc,cp is in a table according to field structures.
; vcpFirstTablePara is set to the cpFirst of the table in this paragraph.
; vcpFirstCellPara is set to the cpFirst of the table cell.
;*/
;/* %%Function:FInTableDocCp %%Owner:davidlu */
;HANDNATIVE BOOL C_FInTableDocCp(doc, cp)
;int doc;
;CP cp;
;{
; extern struct CA caPara;
; extern struct PAP vpapFetch;
; extern CP vcpFirstTablePara;
; extern CP vcpFirstTableCell;
; extern CP vmpitccp[];
; int icp;
; CP cpFirstCell, cpLimCell;
; int docFetchSav;
; CP cpFetchSav;
; int fcmFetchSav;
Ltemp001:
jmp FITDC09
; %%Function:N_FInTableDocCp %%Owner:BRADV
cProc N_FInTableDocCp,<PUBLIC,FAR>,<si,di>
ParmW doc
ParmD cp
cBegin
; CachePara(doc, cp);
ifdef DEBUG
cCall S_CachePara,<[doc], [SEG_cp], [OFF_cp]>
else ;not DEBUG
cCall N_CachePara,<[doc], [SEG_cp], [OFF_cp]>
endif ;DEBUG
; vcpFirstTableCell = vcpFirstTablePara = caPara.cpFirst;
mov cx,[caPara.LO_cpFirstCa]
mov dx,[caPara.HI_cpFirstCa]
; if (!vpapFetch.fInTable)
; return fFalse;
errnz <fFalse>
xor ax,ax
mov bx,fTrue ;Do this to allow code sharing at FITDC09
cmp [vpapFetch.fInTablePap],al
je Ltemp001
; if (!vtapFetch.fCaFull || !FInCa(doc, caPara.cpLim - 1, &caTap))
; {
mov si,dataoffset [caTap]
mov di,[doc]
mov cx,0FFFFh
mov dx,cx
add cx,[caPara.LO_cpLimCa]
adc dx,[caPara.HI_cpLimCa]
;LN_FInCa takes a doc in di, a cp in dx:cx and a pca in si and
;returns the result in bx. ax, bx, cx and dx are altered.
push dx
push cx ;save caPara.cpLim - 1;
call LN_FInCa
pop cx
pop dx ;restore caPara.cpLim - 1;
or bx,bx
je FITDC005
test [vtapFetch.fCaFullTap],maskFCaFullTap
jne FITDC05
FITDC005:
; docFetchSav = vdocFetch;
; cpFetchSav = vcpFetch;
; fcmFetchSav = fcmFetch;
push [fcmFetch] ;fcmFetchSav
push whi [vcpFetch]
push wlo [vcpFetch] ;cpFetchSav
push [vdocFetch] ;docFetchSav
; /* Optimization to reduce time spent by CpFirstTap looking for
; the beginning of the row. */
; if (CpFirstTap(doc, caPara.cpFirst) == cpNil)
push dx
push cx ;save caPara.cpLim - 1
cCall CpFirstTap,<di,[caPara.HI_cpFirstCa],[caPara.LO_cpFirstCa]>
and ax,dx ;returned cpNil if it failed
inc ax
pop cx
pop dx
jne FITDC008
; CpFirstTap(doc, caPara.cpLim - 1);
cCall CpFirstTap,<di, dx, cx>
; if (docFetchSav != docNil && cpFetchSav <= CpMacDocEdit(docFetchSav))
; FetchCpAndPara(docFetchSav, cpFetchSav, fcmFetchSav);
; else
; vdocFetch = docNil;
FITDC008:
pop si ;docFetchSav
or si,si
je FITDC01
cCall CpMacDocEdit,<si>
FITDC01:
pop bx
pop cx ;cx:bx = cpFetchSav
pop di ;fcmFetchSav
errnz <docNil>
or si,si
je FITDC02
sub ax,bx
sbb dx,cx
jge FITDC03
FITDC02:
mov [vdocFetch],docNil
jmp short FITDC04
FITDC03:
cCall FetchCpAndPara,<si,cx,bx,di>
FITDC04:
; CachePara(doc, cp);
ifdef DEBUG
cCall S_CachePara,<[doc], [SEG_cp], [OFF_cp]>
else ;not DEBUG
cCall N_CachePara,<[doc], [SEG_cp], [OFF_cp]>
endif ;DEBUG
; }
FITDC05:
; Assert(FInCa(doc, caPara.cpLim - 1, &caTap));
; Assert(caTap.cpFirst == vmpitccp[0]);
ifdef DEBUG
push ax
push bx
push cx
push dx
mov ax,-1
cwd
add ax,[caPara.LO_cpLimCa]
adc dx,[caPara.HI_cpLimCa]
mov bx,dataoffset [caTap]
cCall FInCa,<[doc],dx,ax,bx>
or ax,ax
jne FITDC06
mov ax,midFetchn3
mov bx,1023
cCall AssertProcForNative,<ax, bx>
FITDC06:
mov ax,[caTap.LO_cpFirstCa]
mov dx,[caTap.HI_cpFirstCa]
sub ax,wlo [vmpitccp]
sbb dx,whi [vmpitccp]
or ax,dx
je FITDC07
mov ax,midFetchn3
mov bx,1024
cCall AssertProcForNative,<ax, bx>
FITDC07:
pop dx
pop cx
pop bx
pop ax
endif ;DEBUG
; for (icp = 0; cp >= vmpitccp[icp+1]; icp++);
mov bx,dataoffset [vmpitccp]
mov cx,[OFF_cp]
mov dx,[SEG_cp]
FITDC08:
add bx,4
cmp cx,[bx]
mov ax,dx
sbb ax,[bx+2]
jge FITDC08
;Assembler note: compute fResult = (cp >= caTap.cpFirst) now because
;we have cp handy.
sub cx,[caTap.LO_cpFirstCa]
sbb dx,[caTap.HI_cpFirstCa]
cmc
sbb ax,ax
; vcpFirstTableCell = vmpitccp[icp];
mov cx,[bx-4]
mov dx,[bx-2]
; vcpFirstTablePara = FInCa(doc, vcpFirstTableCell, &caPara)
; ? vcpFirstTableCell : caPara.cpFirst;
mov si,dataoffset [caPara]
mov di,[doc]
;LN_FInCa takes a doc in di, a cp in dx:cx and a pca in si and
;returns the result in bx. ax, bx, cx and dx are altered.
push dx
push cx ;save vcpFirstTableCell;
push ax ;save fResult
call LN_FInCa
pop ax ;restore fResult
pop cx
pop dx ;restore vcpFirstTableCell;
FITDC09:
mov wlo [vcpFirstTableCell],cx
mov whi [vcpFirstTableCell],dx
or bx,bx
jne FITDC10
mov cx,[caPara.LO_cpFirstCa]
mov dx,[caPara.HI_cpFirstCa]
FITDC10:
mov wlo [vcpFirstTablePara],cx
mov whi [vcpFirstTablePara],dx
; return (cp >= caTap.cpFirst);
;}
cEnd
sEnd fetch
end
|
; SUM NUMBERS FROM 1 TO 100, THEN STORE THE RESULT IN PARAMETER S.
DATA SEGMENT
S DW (0) ; (?) IN EMU8086 IS ILLEGAL
DATA ENDS
CODE SEGMENT
ASSUME DS:DATA,CS:CODE
START: MOV AX,DATA
MOV DS,AX
MOV CX,64H
MOV AX,0
MOV BX,1
AGAIN: ADD AX,BX
INC BX
LOOP AGAIN
MOV S,AX
;MOV BX,S VERIFY THE NUMBER IN S
MOV AH,4CH
INT 21H
CODE ENDS
END START |
; void zx_cls_wc_attr(struct r_Rect8 *r, uchar attr)
SECTION code_clib
SECTION code_arch
PUBLIC zx_cls_wc_attr
EXTERN asm_zx_cls_wc_attr
zx_cls_wc_attr:
pop af
pop hl
pop ix
push hl
push hl
push af
jp asm_zx_cls_wc_attr
|
; A079001: Digital equivalents of letters A, B, C, ..., Z on touch-tone telephone keypad.
; 2,2,2,3,3,3,4,4,4,5,5,5,6,6,6,7,7,7,7,8,8,8,9,9,9,9
add $0,4
lpb $0
trn $0,3
mov $2,$1
trn $2,6
add $0,$2
add $1,1
lpe
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright(c) 2011-2016 Intel Corporation All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in
; the documentation and/or other materials provided with the
; distribution.
; * Neither the name of Intel Corporation nor the names of its
; contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
%include "md5_job.asm"
%include "md5_mb_mgr_datastruct.asm"
%include "reg_sizes.asm"
extern md5_mb_x4x2_avx
default rel
%if 1
%ifidn __OUTPUT_FORMAT__, elf64
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; UN*X register definitions
%define arg1 rdi ; rcx
%define arg2 rsi ; rdx
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
%else
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; WINDOWS register definitions
%define arg1 rcx
%define arg2 rdx
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
%endif
; Common register definitions
%define state arg1
%define len2 arg2
; idx must be a register not clobberred by md5_mb_x4x2_avx
%define idx r8
%define unused_lanes r9
%define lane_data r10
%define job_rax rax
%define tmp rax
%endif ;; if 1
; STACK_SPACE needs to be an odd multiple of 8
_XMM_SAVE_SIZE equ 10*16
_GPR_SAVE_SIZE equ 8*8
_ALIGN_SIZE equ 8
_XMM_SAVE equ 0
_GPR_SAVE equ _XMM_SAVE + _XMM_SAVE_SIZE
STACK_SPACE equ _GPR_SAVE + _GPR_SAVE_SIZE + _ALIGN_SIZE
%define APPEND(a,b) a %+ b
; JOB* md5_mb_mgr_flush_avx(MB_MGR_HMAC_OOO *state)
; arg 1 : rcx : state
mk_global md5_mb_mgr_flush_avx, function
md5_mb_mgr_flush_avx:
sub rsp, STACK_SPACE
mov [rsp + _GPR_SAVE + 8*0], rbx
mov [rsp + _GPR_SAVE + 8*3], rbp
mov [rsp + _GPR_SAVE + 8*4], r12
mov [rsp + _GPR_SAVE + 8*5], r13
mov [rsp + _GPR_SAVE + 8*6], r14
mov [rsp + _GPR_SAVE + 8*7], r15
%ifidn __OUTPUT_FORMAT__, win64
mov [rsp + _GPR_SAVE + 8*1], rsi
mov [rsp + _GPR_SAVE + 8*2], rdi
vmovdqa [rsp + _XMM_SAVE + 16*0], xmm6
vmovdqa [rsp + _XMM_SAVE + 16*1], xmm7
vmovdqa [rsp + _XMM_SAVE + 16*2], xmm8
vmovdqa [rsp + _XMM_SAVE + 16*3], xmm9
vmovdqa [rsp + _XMM_SAVE + 16*4], xmm10
vmovdqa [rsp + _XMM_SAVE + 16*5], xmm11
vmovdqa [rsp + _XMM_SAVE + 16*6], xmm12
vmovdqa [rsp + _XMM_SAVE + 16*7], xmm13
vmovdqa [rsp + _XMM_SAVE + 16*8], xmm14
vmovdqa [rsp + _XMM_SAVE + 16*9], xmm15
%endif
; if bit (32+3) is set, then all lanes are empty
mov unused_lanes, [state + _unused_lanes]
bt unused_lanes, 32+3
jc return_null
; find a lane with a non-null job
xor idx, idx
cmp qword [state + _ldata + 1 * _LANE_DATA_size + _job_in_lane], 0
cmovne idx, [one]
cmp qword [state + _ldata + 2 * _LANE_DATA_size + _job_in_lane], 0
cmovne idx, [two]
cmp qword [state + _ldata + 3 * _LANE_DATA_size + _job_in_lane], 0
cmovne idx, [three]
cmp qword [state + _ldata + 4 * _LANE_DATA_size + _job_in_lane], 0
cmovne idx, [four]
cmp qword [state + _ldata + 5 * _LANE_DATA_size + _job_in_lane], 0
cmovne idx, [five]
cmp qword [state + _ldata + 6 * _LANE_DATA_size + _job_in_lane], 0
cmovne idx, [six]
cmp qword [state + _ldata + 7 * _LANE_DATA_size + _job_in_lane], 0
cmovne idx, [seven]
; copy idx to empty lanes
copy_lane_data:
mov tmp, [state + _args + _data_ptr + 8*idx]
%assign I 0
%rep 8
cmp qword [state + _ldata + I * _LANE_DATA_size + _job_in_lane], 0
jne APPEND(skip_,I)
mov [state + _args + _data_ptr + 8*I], tmp
mov dword [state + _lens + 4*I], 0xFFFFFFFF
APPEND(skip_,I):
%assign I (I+1)
%endrep
; Find min length
vmovdqa xmm0, [state + _lens + 0*16]
vmovdqa xmm1, [state + _lens + 1*16]
vpminud xmm2, xmm0, xmm1 ; xmm2 has {D,C,B,A}
vpalignr xmm3, xmm3, xmm2, 8 ; xmm3 has {x,x,D,C}
vpminud xmm2, xmm2, xmm3 ; xmm2 has {x,x,E,F}
vpalignr xmm3, xmm3, xmm2, 4 ; xmm3 has {x,x,x,E}
vpminud xmm2, xmm2, xmm3 ; xmm2 has min value in low dword
vmovd DWORD(idx), xmm2
mov len2, idx
and idx, 0xF
shr len2, 4
jz len_is_0
vpand xmm2, xmm2, [rel clear_low_nibble]
vpshufd xmm2, xmm2, 0
vpsubd xmm0, xmm0, xmm2
vpsubd xmm1, xmm1, xmm2
vmovdqa [state + _lens + 0*16], xmm0
vmovdqa [state + _lens + 1*16], xmm1
; "state" and "args" are the same address, arg1
; len is arg2
call md5_mb_x4x2_avx
; state and idx are intact
len_is_0:
; process completed job "idx"
imul lane_data, idx, _LANE_DATA_size
lea lane_data, [state + _ldata + lane_data]
mov job_rax, [lane_data + _job_in_lane]
mov qword [lane_data + _job_in_lane], 0
mov dword [job_rax + _status], STS_COMPLETED
mov unused_lanes, [state + _unused_lanes]
shl unused_lanes, 4
or unused_lanes, idx
mov [state + _unused_lanes], unused_lanes
mov dword [state + _lens + 4*idx], 0xFFFFFFFF
sub dword [state + _num_lanes_inuse], 1
vmovd xmm0, [state + _args_digest + 4*idx + 0*32]
vpinsrd xmm0, [state + _args_digest + 4*idx + 1*32], 1
vpinsrd xmm0, [state + _args_digest + 4*idx + 2*32], 2
vpinsrd xmm0, [state + _args_digest + 4*idx + 3*32], 3
vmovdqa [job_rax + _result_digest + 0*16], xmm0
return:
%ifidn __OUTPUT_FORMAT__, win64
vmovdqa xmm6, [rsp + _XMM_SAVE + 16*0]
vmovdqa xmm7, [rsp + _XMM_SAVE + 16*1]
vmovdqa xmm8, [rsp + _XMM_SAVE + 16*2]
vmovdqa xmm9, [rsp + _XMM_SAVE + 16*3]
vmovdqa xmm10, [rsp + _XMM_SAVE + 16*4]
vmovdqa xmm11, [rsp + _XMM_SAVE + 16*5]
vmovdqa xmm12, [rsp + _XMM_SAVE + 16*6]
vmovdqa xmm13, [rsp + _XMM_SAVE + 16*7]
vmovdqa xmm14, [rsp + _XMM_SAVE + 16*8]
vmovdqa xmm15, [rsp + _XMM_SAVE + 16*9]
mov rsi, [rsp + _GPR_SAVE + 8*1]
mov rdi, [rsp + _GPR_SAVE + 8*2]
%endif
mov rbx, [rsp + _GPR_SAVE + 8*0]
mov rbp, [rsp + _GPR_SAVE + 8*3]
mov r12, [rsp + _GPR_SAVE + 8*4]
mov r13, [rsp + _GPR_SAVE + 8*5]
mov r14, [rsp + _GPR_SAVE + 8*6]
mov r15, [rsp + _GPR_SAVE + 8*7]
add rsp, STACK_SPACE
ret
return_null:
xor job_rax, job_rax
jmp return
section .data align=16
align 16
clear_low_nibble:
dq 0x00000000FFFFFFF0, 0x0000000000000000
one: dq 1
two: dq 2
three: dq 3
four: dq 4
five: dq 5
six: dq 6
seven: dq 7
|
; 각종 레지스터와 세그먼트 상태를 백업하는 매크로
%macro SEG_REG_SAVE 0
push ebp
mov ebp, esp
push eax
push ebx
push ecx
push edx
push esi
push edi
push gs
push fs
mov ax, es
push ax
mov ax, ds
push ax
mov ax, DataDescriptor
mov es, ax
%endmacro
; 각종 레지스터와 세그먼트 상태를 복구하는 매크로
%macro SEG_REG_LOAD 0
pop ax
mov ds, ax
pop ax
mov es, ax
pop fs
pop gs
pop edi
pop esi
pop edx
pop ecx
pop ebx
pop eax
pop ebp
%endmacro
; 인터럽트 테이블 초기화
_kernel_init_idt_table:
mov ax, DataDescriptor
mov es, ax
; IDT 정보가 올라갈 시작 메모리 주소 설정
; 기본적으로 GDT 정보 바로 다음에 올라간다.
mov esi, dword [idtr]
mov word [esi], 256*8-1
; IDT 전체 크기 초기화
mov eax, esi
add eax, 6
mov dword [esi+2], eax
;!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
; IDT 시작 위치값 셋팅 !
; 이부분이 잘못 지정되어 그동안 인터럽트만 걸리면 튕기는 것이였다. !
;!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
;---------------------------------------------------------------
; 예외 핸들러 등록
;---------------------------------------------------------------
push 0
push __int_devide_error
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
push 1
push __int_debug
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
push 2
push __int_nmi
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
push 3
push __int_break_point
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
push 4
push __int_overflow
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
push 5
push __int_bound_range_exceeded
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
push 6
push __int_invalid_opcode
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
push 7
push __int_device_not_available
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
push 8
push __int_double_fault
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
push 9
push __int_coprocessor_segment_overrun
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
push 10
push __int_invalid_tss
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
push 11
push __int_segment_not_present
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
push 12
push __int_stack_segment_fault
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
push 13
push __int_general_protection
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
push 14
push __int_page_fault
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
push 15
push __int_reserved_15
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
push 16
push __int_fpu_error
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
push 17
push __int_alignment_check
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
push 18
push __int_machine_check
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
push 19
push __int_simd_floating_point_exception
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
; #20 ~ #31
mov ecx, 31-20
.ETC_EXCEPTION_LOOP:
mov eax, ecx
add eax, 20
push eax
push __int_etc_exception
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
cmp ecx, 0
dec ecx
jne .ETC_EXCEPTION_LOOP
;---------------------------------------------------------------
; 인터럽트 핸들러 등록
;---------------------------------------------------------------
push 32
push __int_timer
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
push 33
push __int_keyboard
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
push 34
push __int_slave_pic
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
push 35
push __int_serial_port_2
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
push 36
push __int_serial_port_1
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
push 37
push __int_parallel_port_2
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
push 38
push __int_floppy
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
push 39
push __int_parallel_port_1
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
push 40
push __int_rtc
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
push 41
push __int_reserved_41
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
push 42
push __int_not_used_42
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
push 43
push __int_not_used_43
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
push 44
push __int_mouse
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
push 45
push __int_coprocessor
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
push 46
push __int_hdd_1
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
push 47
push __int_hdd_2
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
mov ecx, 255-48
.ETC_INTERRUPT_LOOP:
mov eax, ecx
add eax, 48
push eax
push __int_etc_interrupt
push CodeDescriptor
push 0x8E00
call _kernel_set_idt
cmp ecx, 0
dec ecx
jne .ETC_INTERRUPT_LOOP
; 256개의 인터럽트들을 초기화 처리 한다.
ret
; 특정 인터럽트를 등록하는 함수
; void kernel_set_idt(WORD interrupt_number, void(*interrupt_handle)(), WORD segment, WORD options);
; i_interrupt_number 번째의 인터럽트 함수를 *interrupt_handle로 등록한다.
_kernel_set_idt:
push ebp
mov ebp, esp
pusha
mov ax, DataDescriptor
mov es, ax
mov eax, dword [idtr]
mov esi, eax
add eax, 6
;mov ax, word [esi]
;add ax, 8
;mov word [esi], ax
; IDT 전체 크기값 갱신
mov edi, dword [ebp+20]
shl edi, 3
add edi, eax
; edi : 해당 인터럽트의 등록 시작 주소
mov eax, dword [ebp+16]
mov word [edi], ax
; interrupt handler 등록
mov eax, dword [ebp+12]
mov word [edi+2], ax
; access segment 등록
mov eax, dword [ebp+8]
mov al, 1 & 0x3
mov word [edi+4], ax
; interrupt options 등록
mov word [edi+6], 0
; 64bit모드용 확장 주소
popa
mov esp, ebp
pop ebp
ret 16
; IDT 로드 함수
_kernel_load_idt:
lidt [esi]
ret
; 인터럽트 처리 핸들러
; edi : interrupt number
; esi : error code
_kernel_interrupt_handler:
mov eax, dword [_print32_location]
push eax
; push 24
; push 0
; call _print32_gotoxy
push 24
push 0
push 0x07
push in_msg
call _call_print
push 24
push 12
push edi
call _print_hex32
; 이곳에서 등록된 인터럽트 핸들러가 실행되도록 한다.
mov eax, edi
mov edx, DFT + 5
shl eax, 2
add edx, eax
mov eax, dword [edx]
test eax, eax
jz .end_of_interrupt
call dword [edx]
; Handler Run
.end_of_interrupt:
sub edi, 32
push edi
call _send_eoi_to_pic
; PIC에게 인터럽트 종료 신호 보내기
pop eax
mov dword [_print32_location], eax
ret
; 예외 처리 핸들러
; edi : exception number
; esi : error code
_kernel_exception_handler:
; push 23
; push 0
; call _print32_gotoxy
push 23
push 0
push 0x07
push er_msg
call _print32
push 23
push 12
push edi
call _print_hex32
push 23
push 34
push esi
call _print_hex32
mov eax, cr2
push 23
push 52
push eax
call _print_hex32
;---------------------------------------------
; GUI 버전의 Interrupt Exception Message
;---------------------------------------------
push 751
push 5
push 0x000000
push er_msg
call _print32_gui
push 751
push 6
push 0x000000
push er_msg
call _print32_gui
push 750
push 5
push 0xFF0000
push er_msg
call _print32_gui
push 750
push 6
push 0xFF0000
push er_msg
call _print32_gui
; 이곳에서 등록된 인터럽트 핸들러가 실행되도록 한다.
mov eax, edi
mov edx, DFT + 5
shl eax, 2
add edx, eax
mov eax, dword [edx]
test eax, eax
jz .L1
call dword [edx]
; Handler Run
.L1:
hlt
jmp .L1
; 예외 발생시 아직은 커널영역의 예외 이므로
; 무한루프를 실행시킨다.
ret
er_msg: db 'Exception : , ErrorNo : , CR2 : ', 0x0A, 0
in_msg: db 'Interrupt : ', 0x0A, 0
;-----------------------------------------------------
; Exception handler
;-----------------------------------------------------
; #0, Device Error ISR
__int_devide_error:
SEG_REG_SAVE
mov edi, 0
call _kernel_exception_handler
SEG_REG_LOAD
iretd
; #1, Debug ISR
__int_debug:
SEG_REG_SAVE
mov edi, 1
call _kernel_exception_handler
SEG_REG_LOAD
iretd
; #2, NMI ISR
__int_nmi:
SEG_REG_SAVE
mov edi, 2
call _kernel_exception_handler
SEG_REG_LOAD
iretd
; #3, BreakPoint ISR
__int_break_point:
SEG_REG_SAVE
mov edi, 3
call _kernel_exception_handler
SEG_REG_LOAD
iretd
; #4, Overflow ISR
__int_overflow:
SEG_REG_SAVE
mov edi, 4
call _kernel_exception_handler
SEG_REG_LOAD
iretd
; #5, Bound Range Exceeded ISR
__int_bound_range_exceeded:
SEG_REG_SAVE
mov edi, 5
call _kernel_exception_handler
SEG_REG_LOAD
iretd
; #6, Invalid Opcode ISR
__int_invalid_opcode:
SEG_REG_SAVE
mov edi, 6
call _kernel_exception_handler
SEG_REG_LOAD
iretd
; #7, Device not available ISR
__int_device_not_available:
SEG_REG_SAVE
mov edi, 7
call _kernel_exception_handler
SEG_REG_LOAD
iretd
; #8, Double Fault ISR
__int_double_fault:
SEG_REG_SAVE
mov edi, 8
mov esi, dword [ebp+4]
call _kernel_exception_handler
SEG_REG_LOAD
add ebp, 4
; error code를 스택에서 제거
iretd
; #9, Coprocessor Segment Overrun ISR
__int_coprocessor_segment_overrun:
SEG_REG_SAVE
mov edi, 9
call _kernel_exception_handler
SEG_REG_LOAD
iretd
; #10, Invalid TSS ISR
__int_invalid_tss:
SEG_REG_SAVE
mov edi, 10
mov esi, dword [ebp+4]
call _kernel_exception_handler
SEG_REG_LOAD
add ebp, 4
; error code를 스택에서 제거
iretd
; #11, Segment Not Present ISR
__int_segment_not_present:
SEG_REG_SAVE
mov edi, 11
mov esi, dword [ebp+4]
call _kernel_exception_handler
SEG_REG_LOAD
add ebp, 4
; error code를 스택에서 제거
iretd
; #12, Stack Segment Fault ISR
__int_stack_segment_fault:
SEG_REG_SAVE
mov edi, 12
mov esi, dword [ebp+4]
call _kernel_exception_handler
SEG_REG_LOAD
add ebp, 4
; error code를 스택에서 제거
iretd
; #13, General Protection ISR
__int_general_protection:
SEG_REG_SAVE
mov edi, 13
mov esi, dword [ebp+4]
call _kernel_exception_handler
SEG_REG_LOAD
add ebp, 4
; error code를 스택에서 제거
iretd
; #14, Page Fault ISR
__int_page_fault:
SEG_REG_SAVE
mov edi, 14
mov esi, dword [ebp+4]
call _kernel_exception_handler
SEG_REG_LOAD
add ebp, 4
; error code를 스택에서 제거
iretd
; #15, Reserved ISR
__int_reserved_15:
SEG_REG_SAVE
mov edi, 15
mov esi, dword [ebp+4]
call _kernel_exception_handler
SEG_REG_LOAD
add ebp, 4
; error code를 스택에서 제거
iretd
; #16, FPU Error ISR
__int_fpu_error:
SEG_REG_SAVE
mov edi, 16
mov esi, dword [ebp+4]
call _kernel_exception_handler
SEG_REG_LOAD
add ebp, 4
; error code를 스택에서 제거
iretd
; #17, Alignment Check ISR
__int_alignment_check:
SEG_REG_SAVE
mov edi, 17
mov esi, dword [ebp+4]
call _kernel_exception_handler
SEG_REG_LOAD
add ebp, 4
; error code를 스택에서 제거
iretd
; #18, Machine Check ISR
__int_machine_check:
SEG_REG_SAVE
mov edi, 18
call _kernel_exception_handler
SEG_REG_LOAD
iretd
; #19, SIMD Floating Point Exception ISR
__int_simd_floating_point_exception:
SEG_REG_SAVE
mov edi, 19
call _kernel_exception_handler
SEG_REG_LOAD
iretd
; #20 ~ #31, Reserved ISR
__int_etc_exception:
SEG_REG_SAVE
mov edi, 20
call _kernel_exception_handler
SEG_REG_LOAD
iretd
;-----------------------------------------------------
; interrupt handler
;-----------------------------------------------------
; #32, Timer ISR
__int_timer:
SEG_REG_SAVE
mov edi, 32
call _kernel_interrupt_handler
SEG_REG_LOAD
iretd
; #33, Keyboard ISR
__int_keyboard:
SEG_REG_SAVE
mov edi, 33
call _kernel_interrupt_handler
SEG_REG_LOAD
iretd
; #34, Slave PIC ISR
__int_slave_pic:
SEG_REG_SAVE
mov edi, 34
call _kernel_interrupt_handler
SEG_REG_LOAD
iretd
; #35, Serial Port 2 ISR
__int_serial_port_2:
SEG_REG_SAVE
mov edi, 35
call _kernel_interrupt_handler
SEG_REG_LOAD
iretd
; #36, Serial Port 1 ISR
__int_serial_port_1:
SEG_REG_SAVE
mov edi, 36
call _kernel_interrupt_handler
SEG_REG_LOAD
iretd
; #37, Parallel Port 2 ISR
__int_parallel_port_2:
SEG_REG_SAVE
mov edi, 37
call _kernel_interrupt_handler
SEG_REG_LOAD
iretd
; #38, floppy Disk Controller ISR
__int_floppy:
SEG_REG_SAVE
mov edi, 38
call _kernel_interrupt_handler
SEG_REG_LOAD
iretd
; #39, Parallel Port 1 ISR
__int_parallel_port_1:
SEG_REG_SAVE
mov edi, 39
call _kernel_interrupt_handler
SEG_REG_LOAD
iretd
; #40, RTC ISR
__int_rtc:
SEG_REG_SAVE
mov edi, 40
call _kernel_interrupt_handler
SEG_REG_LOAD
iretd
; #41, Reserved ISR
__int_reserved_41:
SEG_REG_SAVE
mov edi, 41
call _kernel_interrupt_handler
SEG_REG_LOAD
iretd
; #42, Not Used ISR
__int_not_used_42:
SEG_REG_SAVE
mov edi, 42
call _kernel_interrupt_handler
SEG_REG_LOAD
iretd
; #43, Not Used ISR
__int_not_used_43:
SEG_REG_SAVE
mov edi, 43
call _kernel_interrupt_handler
SEG_REG_LOAD
iretd
; #44, Mouse ISR
__int_mouse:
SEG_REG_SAVE
mov edi, 44
call _kernel_interrupt_handler
SEG_REG_LOAD
iretd
; #45, Coprocessor ISR
__int_coprocessor:
SEG_REG_SAVE
mov edi, 45
call _kernel_interrupt_handler
SEG_REG_LOAD
iretd
; #46, HardDisk 1 ISR
__int_hdd_1:
SEG_REG_SAVE
mov edi, 46
call _kernel_interrupt_handler
SEG_REG_LOAD
iretd
; #47, HardDisk 2 ISR
__int_hdd_2:
SEG_REG_SAVE
mov edi, 47
call _kernel_interrupt_handler
SEG_REG_LOAD
iretd
; #48, Etc Interrupt ... ISR
__int_etc_interrupt:
SEG_REG_SAVE
mov edi, 48
call _kernel_interrupt_handler
SEG_REG_LOAD
iretd
;---------------------------------------
; -------------------------------
; | P | DPL | 0 | D | 1 | 1 | 0 |
; -------------------------------
; P : 존재 유무
; DPL : 특권 레벨(2bit)
; D : 16bit 인지? 32bit 인지?
;---------------------------------------
idtr: dd 0x00401000
; dw 256 * 8 - 1
; dd 0
;__idt_nothing:
; dw __int_nothing ; Handler Address1
; dw CodeDescriptor
; dw 0x00, 0x8E ; 10001110b : 하위 1byte : Option Information
; dw 0x0000 ; Handler Address2
|
;SmeargleBaseStats:: kind of pointless to add unless I programm in sketch, but could give it a crazy movelist with all the most common sketched moves instead... idk. Smeargle doesn't seem to be very popular either, although I kind of like it that base attack is just freakin' awful. maybe boost from 20 to 50, at least..
db DEX_SMEARGLE ; pokedex id
db 55 ; base hp
db 50 ; base attack
db 35 ; base defense
db 75 ; base speed
db 33 ; base special
db NORMAL ; species type 1
db NORMAL ; species type 2
db 79 ; catch rate
db 106 ; base exp yield
INCBIN "pic/ymon/smeargle.pic",0,1 ; 55, sprite dimensions
dw SmearglePicFront
dw SmearglePicBack
; attacks known at lvl 0
db SPORE
db TRANSFORM
db EXPLOSION
db EXTREME_SPEED
db 4 ; growth rate
; learnset
tmlearn 0
tmlearn 0
tmlearn 0
tmlearn 0
tmlearn 0
tmlearn 0
tmlearn 0
db Bank(SmearglePicFront) ; padding
|
//
// main.cpp
// 96. Unique Binary Search Trees
//
// Created by admin on 2019/4/8.
// Copyright © 2019年 liu. All rights reserved.
//
#include <iostream>
#include <vector>
using namespace std;
class Solution {
public:
int numTrees(int n) {
if(n<1){
return 0;
}
vector<int> dp(n+1,0);
dp[0]=1;
dp[1]=1;
for(int i=2;i<=n;i++){
for(int j=1;j<=i;j++){
dp[i]+=dp[j-1]*dp[i-j];
}
}
return dp[n];
}
};
int main(int argc, const char * argv[]) {
Solution so=Solution();
int ret=so.numTrees(3);
cout<<"The ret is:"<<ret<<endl;
return 0;
}
|
pxor xmm0, xmm8
pxor xmm1, xmm8
pxor xmm2, xmm8
pxor xmm3, xmm8
pxor xmm4, xmm8
pxor xmm5, xmm8
pxor xmm6, xmm8
pxor xmm7, xmm8
aesenc xmm0, xmm9
aesenc xmm1, xmm9
aesenc xmm2, xmm9
aesenc xmm3, xmm9
aesenc xmm4, xmm9
aesenc xmm5, xmm9
aesenc xmm6, xmm9
aesenc xmm7, xmm9
aesenc xmm0, xmm10
aesenc xmm1, xmm10
aesenc xmm2, xmm10
aesenc xmm3, xmm10
aesenc xmm4, xmm10
aesenc xmm5, xmm10
aesenc xmm6, xmm10
aesenc xmm7, xmm10
aesenc xmm0, xmm11
aesenc xmm1, xmm11
aesenc xmm2, xmm11
aesenc xmm3, xmm11
aesenc xmm4, xmm11
aesenc xmm5, xmm11
aesenc xmm6, xmm11
aesenc xmm7, xmm11
aesenc xmm0, xmm12
aesenc xmm1, xmm12
aesenc xmm2, xmm12
aesenc xmm3, xmm12
aesenc xmm4, xmm12
aesenc xmm5, xmm12
aesenc xmm6, xmm12
aesenc xmm7, xmm12
aesenc xmm0, xmm13
aesenc xmm1, xmm13
aesenc xmm2, xmm13
aesenc xmm3, xmm13
aesenc xmm4, xmm13
aesenc xmm5, xmm13
aesenc xmm6, xmm13
aesenc xmm7, xmm13
aesenc xmm0, xmm14
aesenc xmm1, xmm14
aesenc xmm2, xmm14
aesenc xmm3, xmm14
aesenc xmm4, xmm14
aesenc xmm5, xmm14
aesenc xmm6, xmm14
aesenc xmm7, xmm14
aesenc xmm0, xmm15
aesenc xmm1, xmm15
aesenc xmm2, xmm15
aesenc xmm3, xmm15
aesenc xmm4, xmm15
aesenc xmm5, xmm15
aesenc xmm6, xmm15
aesenc xmm7, xmm15 |
; A123282: X-values of solutions to the equation 3(X-Y)^4 - 4*X*Y = 0 with X >= Y.
; Submitted by Jon Maiga
; 0,16,2744,527280,102219376,19829053904,3846720619560,746243781460336,144767444240778464,28084137902132541840,5448177985056955967896,1056918444956008893061424,205036730143381242763959120
mul $0,2
mov $1,1
lpb $0
sub $0,1
add $1,$2
add $2,$1
add $1,$2
lpe
mul $1,4
sub $1,2
div $1,2
add $1,3
mul $1,$2
mov $0,$1
div $0,4
|
; AddTwo.asm - adds two 32-bit integers.
; Chapter 3 example
include Irvine32.inc
.data
var BYTE "this works", 0
.code
main proc
; creating the registors needed
mov ebx, 5
mov eax, 1
CDQ
call Factorial
call WriteDec
CALL Crlf
exit
main ENDP
;push ebx
;return n * fun(n-1)
Factorial PROC
;pushing the variables needed in the stack
push ebx
;if the base case is reached then just call the ret part with the ans
cmp ebx, 1
je endRecursion
;modifying the variables needed using the registers
dec ebx
CALL Factorial
endRecursion:
;take the value of the answer and then return it.
;the answer will be stored in the
pop ebx
mul ebx
ret
Factorial ENDP
END main
|
dnl MIPS64 mpn_submul_1 -- Multiply a limb vector with a single limb and
dnl subtract the product from a second limb vector.
dnl Copyright 1992, 1994, 1995, 2000-2002 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C INPUT PARAMETERS
C res_ptr $4
C s1_ptr $5
C size $6
C s2_limb $7
ASM_START()
PROLOGUE(mpn_submul_1)
C feed-in phase 0
ld $8,0($5)
C feed-in phase 1
daddiu $5,$5,8
dmultu $8,$7
daddiu $6,$6,-1
beq $6,$0,$LC0
move $2,$0 C zero cy2
daddiu $6,$6,-1
beq $6,$0,$LC1
ld $8,0($5) C load new s1 limb as early as possible
Loop: ld $10,0($4)
mflo $3
mfhi $9
daddiu $5,$5,8
daddu $3,$3,$2 C add old carry limb to low product limb
dmultu $8,$7
ld $8,0($5) C load new s1 limb as early as possible
daddiu $6,$6,-1 C decrement loop counter
sltu $2,$3,$2 C carry from previous addition -> $2
dsubu $3,$10,$3
sgtu $10,$3,$10
daddu $2,$2,$10
sd $3,0($4)
daddiu $4,$4,8
bne $6,$0,Loop
daddu $2,$9,$2 C add high product limb and carry from addition
C wind-down phase 1
$LC1: ld $10,0($4)
mflo $3
mfhi $9
daddu $3,$3,$2
sltu $2,$3,$2
dmultu $8,$7
dsubu $3,$10,$3
sgtu $10,$3,$10
daddu $2,$2,$10
sd $3,0($4)
daddiu $4,$4,8
daddu $2,$9,$2 C add high product limb and carry from addition
C wind-down phase 0
$LC0: ld $10,0($4)
mflo $3
mfhi $9
daddu $3,$3,$2
sltu $2,$3,$2
dsubu $3,$10,$3
sgtu $10,$3,$10
daddu $2,$2,$10
sd $3,0($4)
j $31
daddu $2,$9,$2 C add high product limb and carry from addition
EPILOGUE(mpn_submul_1)
|
#importonce
.const colorRam = $d800
.const screen = $0400
.const screen_0 = $0400
.const screen_0_40 = $0428
.const screen_1 = $0500
.const screen_2 = $0600
.const screen_3 = $0700
.const NAS = 1
.label vic2_screen_control_register1 = $d011
.label vic2_screen_control_register2 = $d016
.label vic2_rasterline_register = $d012
.label vic2_interrupt_control_register = $d01a
.label vic2_interrupt_status_register = $d019
.macro stabilize_irq() {
start:
:mov16 #irq2 : $fffe
inc vic2_rasterline_register
asl vic2_interrupt_status_register
tsx
cli
:cycles(18)
irq2:
txs
:cycles(44)// -3-2*NAS)
test:
lda vic2_rasterline_register
cmp vic2_rasterline_register
beq next_instruction
next_instruction:
}
.macro set_raster(line_number) {
// Notice that only the 8 least significant bits are stored in the accumulator.
lda #line_number
sta vic2_rasterline_register
lda vic2_screen_control_register1
.if (line_number > 255) {
ora #%10000000
} else {
and #%01111111
}
sta vic2_screen_control_register1
}
.pseudocommand mov16 source : destination {
:_mov bits_to_bytes(16) : source : destination
}
.pseudocommand mov source : destination {
:_mov bits_to_bytes(8) : source : destination
}
.pseudocommand _mov bytes_count : source : destination {
.for (var i = 0; i < bytes_count.getValue(); i++) {
lda extract_byte_argument(source, i)
sta extract_byte_argument(destination, i)
}
}
.pseudocommand _add bytes_count : left : right : result {
clc
.for (var i = 0; i < bytes_count.getValue(); i++) {
lda extract_byte_argument(left, i)
adc extract_byte_argument(right, i)
sta extract_byte_argument(result, i)
}
}
.function extract_byte_argument(arg, byte_id) {
.if (arg.getType()==AT_IMMEDIATE) {
.return CmdArgument(arg.getType(), extract_byte(arg.getValue(), byte_id))
} else {
.return CmdArgument(arg.getType(), arg.getValue() + byte_id)
}
}
.function extract_byte(value, byte_id) {
.var bits = _bytes_to_bits(byte_id)
.eval value = value >> bits
.return value & $ff
}
.function _bytes_to_bits(bytes) {
.return bytes * 8
}
.function bits_to_bytes(bits) {
.return bits / 8
}
.macro clear_screen(char_code) {
ldx #0
lda #char_code
clear_next_char:
sta screen_0,x
sta screen_1,x
sta screen_2,x
sta screen_3,x
inx
bne clear_next_char
}
.macro randomize_screen() {
// Place some chars on screen memory.
ldx #0
lda #0
next_char:
.for (var row = 0; row < 25; row++) {
sta screen + row * 40,x
}
inx
txa
cpx #40
bne next_char
// Place some colors in color memory.
ldx #0
lda #0
next_color:
.for (var row = 0; row < 25; row++) {
sta colorRam + row * 40,x
}
inx
txa
cpx #40
bne next_color
}
.macro nops(count) {
.for (var i = 0; i < count; i++) {
nop
}
}
.macro cycles(count) {
.if (count < 0) {
.error "The cycle count cannot be less than 0 (" + count + " given)."
}
.if (count == 1) {
.error "Can't wait only one cycle."
}
.if (mod(count, 2) != 0) {
bit $ea
.eval count -= 3
}
:nops(count/2)
}
|
; ----------------------------------------------------------------
; Z88DK INTERFACE LIBRARY FOR THE BIFROST* ENGINE - RELEASE 1.2/L
;
; See "bifrost_h.h" for further details
; ----------------------------------------------------------------
; void BIFROSTH_resetTileImages(void *addr)
SECTION code_clib
SECTION code_bifrost_h
PUBLIC _BIFROSTH_resetTileImages
EXTERN asm_BIFROSTH_resetTileImages
_BIFROSTH_resetTileImages:
pop af
pop hl
push hl
push af
jp asm_BIFROSTH_resetTileImages
|
; read 16 bytes from data segment and write them on the next line
; as is, if the byte is positive
; the positive equvilant value, if the byte is negative
;------------
; stack segment :
STSEG SEGMENT
DB 64 DUP (?)
STSEG ENDS
;------------
; data segment :
DTSEG SEGMENT
; place program data here
array DB 73H, 82H, 10H, 7FH, 0D0H, 20H, 0B3H, 01DH, 94H, 0A2H, 71H, 50H, 11H, 0B0H, 17H, 99H
org 10H
output DB 10H DUP (00H)
DTSEG ENDS
;------------
; code segment :
CDSEG SEGMENT
MAIN PROC FAR
ASSUME CS:CDSEG, DS:DTSEG, SS:STSEG
MOV AX, DTSEG
MOV DS, AX
; main code starts here
; initialize
MOV BX, OFFSET array
MOV CX, 10H
loop1:
MOV AL, [BX]
CMP AL, 00H
JG writeout ; JG label Short Jump if first operand is Greater then second operand (as set by CMP instruction). Signed.
NOT AL ; toggle (NOT) AL bits
INC AL ; AL = AL + 1
; last two lines are the same as "NEG AL". NEG: Negate. Makes operand negative (two's complement).
writeout:
MOV [BX + 10H], AL
INC BX
LOOP loop1
; end (terminate) program
terminate:
MOV AH, 4CH
INT 21H
MAIN ENDP
CDSEG ENDS
END MAIN
|
; A016237: Expansion of 1/((1-x)(1-5x)(1-10x)).
; 1,16,191,2066,21441,218316,2202691,22124566,221733941,2219780816,22210015191,222161187066,2221917046441,22220696343316,222214592827691,2222184075249566,22222031487358941,222221268547905816,2222217453850640191,22222198380364312066
lpb $0
mov $2,$0
sub $0,1
seq $2,16164 ; Expansion of 1/((1-5x)(1-10x)).
add $1,$2
lpe
add $1,1
mov $0,$1
|
; A231720: a(0)=1, after which, for any n uniquely written as du*u! + ... + d2*2! + d1*1! (each di in range 0..i), a(n) = (du+1)*(u+1)! + ... + (d2+1)*3! + (d1+1)*2! + 1; the natural numbers with their factorial base representation (A007623) shifted left one step and each digit incremented by one, converted back to decimal.
; Submitted by Jon Maiga
; 1,5,15,17,21,23,57,59,63,65,69,71,81,83,87,89,93,95,105,107,111,113,117,119,273,275,279,281,285,287,297,299,303,305,309,311,321,323,327,329,333,335,345,347,351,353,357,359,393,395,399,401,405,407,417,419,423,425,429,431,441,443,447,449,453,455,465,467,471,473,477,479,513,515,519,521,525,527,537,539,543,545,549,551,561,563,567,569,573,575,585,587,591,593,597,599,633,635,639,641
mov $1,$0
mov $2,2
mov $3,1
lpb $0
div $0,$2
add $1,$3
add $2,1
mov $4,$0
mul $4,$3
add $1,$4
mul $3,$2
lpe
mov $0,$1
mul $0,2
add $0,1
|
// Copyright (C) 2020 Jonathan Müller <jonathanmueller.dev@gmail.com>
// This file is subject to the license terms in the LICENSE file
// found in the top-level directory of this distribution.
#include "../../examples/shell.cpp"
#include <doctest/doctest.h>
#include <lexy/input/string_input.hpp>
#include <lexy/match.hpp>
namespace
{
void fail(const char* str)
{
auto input = lexy::zstring_input<lexy::utf8_encoding>(str);
INFO(str);
REQUIRE(!lexy::match<grammar::command>(input));
}
void pass(const char* str)
{
auto input = lexy::zstring_input<lexy::utf8_encoding>(str);
INFO(str);
REQUIRE(lexy::match<grammar::command>(input));
}
} // namespace
TEST_CASE("command")
{
pass("");
pass("exit\n");
pass("exit");
pass("echo hi");
pass(R"(echo \
hi)");
fail("unknown command");
}
TEST_CASE("cmd_exit")
{
pass("exit");
fail("exit trailing");
}
TEST_CASE("cmd_echo")
{
pass("echo hi");
fail("echo");
fail("echo hi trailing");
}
TEST_CASE("cmd_set")
{
pass("set var value");
fail("set");
fail("set var");
fail("set var value trailing");
}
TEST_CASE("arg_string")
{
pass("echo 'string'");
pass("echo 'string \"\\n'");
fail("echo 'unterminated");
}
TEST_CASE("arg_string")
{
pass(R"(echo "string")");
pass(R"(echo "string \\\"\n\r")");
pass(R"(echo "\{var}")");
fail(R"(echo "unterminated)");
fail(R"(echo "\x")");
}
TEST_CASE("arg_var")
{
pass("echo $var");
pass("echo ${'var'}");
fail("echo $'var'");
fail("echo ${'var'");
}
|
100: LD SP, #4000
108: MUL R1, #3, #1
116: MUL R2, #-1, R1
124: ST y, R2
132: MUL R3, #-1, R2
140: ST x, R3
148: ADD R4, R2, R3
156: ADD R5, #3, R4
164: MUL R6, #-1, R5
172: ST z, R6
180: LD R7, #true
188: ST a, R7
196: NOT R8, R7
204: NOT R9, R8
212: NOT R10, R9
220: ST b, R10
228: NOT R11, #false
236: ST c, R11
|
;------------------------------------------------------------------------------ ;
; Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; AsmFuncs.Asm
;
; Abstract:
;
; Assembly function to set segment selectors.
;
; Notes:
;
;------------------------------------------------------------------------------
SECTION .text
;------------------------------------------------------------------------------
; VOID
; EFIAPI
; AsmSetDataSelectors (
; IN UINT16 SelectorValue
; );
;------------------------------------------------------------------------------
global ASM_PFX(AsmSetDataSelectors)
ASM_PFX(AsmSetDataSelectors):
mov eax, [esp + 4]
o16 mov ds, ax
o16 mov es, ax
o16 mov fs, ax
o16 mov gs, ax
o16 mov ss, ax
ret
|
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