code stringlengths 1 1.05M | repo_name stringlengths 6 83 | path stringlengths 3 242 | language stringclasses 222
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|---|---|---|---|---|---|
#ifndef PCA9544_H
#define PCA9544_H
#ifdef __cplusplus
extern "C" {
#endif
/* ===== System include ===== */
#include "aos/hal/i2c.h"
/* ===== Default Configuration Based on BSP ===== */
#ifdef HAAS_I2C
#define I2C_PORT 1
#define I2C_ADDR_W_8BIT 8
#define I2C_BR_100K 100000
#endif
/* ===== MACRO Definition ===== */
#define PCA9544_CHAN_CLEAN 0
#define PCA9544_CONFIG_REG_LEN 1U
#define PCA9544_IRQ_MASK 0xF0
#define PCA9544_BASE_ADDR 0x70
/* ===== Dev Type Definition ===== */
/* pca9544 channel list */
typedef enum {
PCA9544_CH_NULL = 0,
PCA9544_CHO = 4,
PCA9544_CH1 = 5,
PCA9544_CH2 = 6,
PCA9544_CH3 = 7,
} PCA9544_CH_E;
/* pca9544 parameters configuration */
typedef struct {
/* pca9544 i2c address */
uint8_t dev_addr;
/* pca9544 interrupt status */
uint8_t irq_status;
/* the current pca9544 channel */
PCA9544_CH_E pca9544_ch;
/* the sub dev addr for the selected pca9544 channel */
uint8_t subdev_addr;
// uint8_t control_reg;
/* the sub dev register address */
uint8_t reg_addr;
} PCA9544_DEV_CFG_T;
/* ===== API Lists ===== */
/**********************************************************
* @fun pca9544_init
* @breif pca9544 initialization
* @param i2c:the pointer for i2c configuration
* @param dev_cfg: the pointer for dev configuration
* @rtn
*********************************************************/
int pca9544_init(i2c_dev_t *i2c, PCA9544_DEV_CFG_T *dev_cfg);
/**********************************************************
* @fun pca9544_deinit
* @breif pca9544 deinitialization
* @param none
* @rtn none
*********************************************************/
void pca9544_deinit();
/**********************************************************
* @fun pca9544_set_chan
* @breif pca9544 channel set
* @param chan: the object channel
* @rtn ret
*********************************************************/
int pca9544_set_chan(PCA9544_CH_E chan);
/**********************************************************
* @fun pca9544_clean_chan
* @breif pca9544 channel clean
* @param none
* @rtn ret
*********************************************************/
int pca9544_clean_chan();
/**********************************************************
* @fun pca9544_read_chan
* @breif pca9544 channel reading
* @param none
* @rtn chan: the current selected channel of pca9544
*********************************************************/
PCA9544_CH_E pca9544_read_chan();
/**********************************************************
* @fun pca9544_write_reg
* @breif pca9544 register writing operation
* @param dev_addr: i2c device address
* @param regval: register value
* @rtn ret
*********************************************************/
int pca9544_write_reg(uint16_t dev_addr, uint8_t regval);
/**********************************************************
* @fun pca9544_read_reg
* @breif pca9544 register reading operation
* @param dev_addr: i2c device address
* @param regval: register value
* @rtn ret
*********************************************************/
int pca9544_read_reg(uint16_t dev_addr, uint8_t *data);
int pca954x_irq_handler(uint16_t dev_addr, uint8_t *data);
int pca9544_get_irq_state(uint16_t dev_addr, uint8_t *regval);
/**********************************************************
* @fun pca9544_raw_data_write
* @breif write raw data to the selected channel
* @param sub_addr: the sub dev addr for
* the selected pca9544 channel
* @param reg_addr: the sub dev register addr for
* the selected pca9544 channel
* @param size: register size
* @param data: the pointer for the writing data
* @param len: the data length
* @rtn ret
*********************************************************/
int pca9544_raw_data_write(uint16_t subdev_addr, uint16_t reg_addr, uint16_t size, uint8_t *data, uint16_t len);
/**********************************************************
* @fun pca9544_raw_data_read
* @breif read raw data to the selected channel
* @param sub_addr: the sub dev addr for
* the selected pca9544 channel
* @param reg_addr: the sub dev register addr for
* the selected pca9544 channel
* @param size: register size
* @param data: the pointer for the reading data
* @param len: the data length
* @rtn ret
*********************************************************/
int pca9544_raw_data_read(uint16_t subdev_addr, uint16_t reg_addr, uint16_t size, uint8_t *data, uint16_t len);
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* PCA9544_H */
| YifuLiu/AliOS-Things | components/drivers/external_device/pca9544/include/pca9544.h | C | apache-2.0 | 4,671 |
#ifndef PCA9544_I2C_DRV_H
#define PCA9544_I2C_DRV_H
#ifdef __cplusplus
extern "C" {
#endif
/* ===== System include ===== */
#include "aos/hal/i2c.h"
/* ===== API Lists ===== */
/**********************************************************
* @fun pca9544_i2c_init
* @breif pca9544 i2c initialization
* @param i2c:the pointer for i2c configuration
* @rtn 0 : on success, EIO : error
*********************************************************/
int32_t pca9544_i2c_init(i2c_dev_t *i2c);
/********************************************************
* @fun pca9544_i2c_master_send
*
* @param[in] i2c the i2c device
* @param[in] dev_addr device address
* @param[in] data i2c master send data
* @param[in] size i2c master send data size
* @param[in] timeout timeout in milisecond, set this value to
*HAL_WAIT_FOREVER if you want to wait forever
*
* @rtn 0 : on success, EIO : error
*********************************************************/
int32_t pca9544_i2c_master_send(i2c_dev_t *i2c, uint16_t dev_addr, const uint8_t *data, uint16_t size, uint32_t timeout);
/********************************************************
* @fun pca9544_i2c_master_recv
*
* @param[in] i2c the i2c device
* @param[in] dev_addr device address
* @param[in] data i2c master recv data
* @param[in] size i2c master recv data size
* @param[in] timeout timeout in milisecond, set this value to
*HAL_WAIT_FOREVER if you want to wait forever
*
* @rtn 0 : on success, EIO : error
*********************************************************/
int32_t pca9544_i2c_master_recv(i2c_dev_t *i2c, uint16_t dev_addr, uint8_t *data, uint16_t size, uint32_t timeout);
/*********************************************************
* @fun pca9544_i2c_mem_write
* @param[in] i2c the i2c device
* @param[in] dev_addr device address
* @param[in] mem_addr register address
* @param[in] mem_addr_size register address size
* @param[in] data i2c master send data
* @param[in] size i2c master send data size
* @param[in] timeout timeout in milisecond, set this value to
*HAL_WAIT_FOREVER if you want to wait forever
*
* @rtn 0 : on success, EIO : error
*********************************************************/
int32_t pca9544_i2c_mem_write(i2c_dev_t *i2c, uint16_t dev_addr, uint16_t mem_addr, uint16_t mem_addr_size, const uint8_t* data, uint16_t size, uint32_t timeout);
/*********************************************************
* @fun pca9544_i2c_mem_read
* @param[in] i2c the i2c device
* @param[in] dev_addr device address
* @param[in] mem_addr register address
* @param[in] mem_addr_size register address size
* @param[in] data i2c master send data
* @param[in] size i2c master send data size
* @param[in] timeout timeout in milisecond, set this value to
*HAL_WAIT_FOREVER if you want to wait forever
*
* @rtn 0 : on success, EIO : error
*********************************************************/
int32_t pca9544_i2c_mem_read(i2c_dev_t *i2c, uint16_t dev_addr, uint16_t mem_addr, uint16_t mem_addr_size, uint8_t* data, uint16_t size, uint32_t timeout);
/********************************************************
* @fun pca9544_i2c_finalize
* @param[in] i2c the i2c device
* @rtn 0 : on success, EIO : error
*********************************************************/
int32_t pca9544_i2c_finalize(i2c_dev_t *i2c);
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* PCA9544_I2C_DRV_H */
| YifuLiu/AliOS-Things | components/drivers/external_device/pca9544/internal/pca9544_i2c_drv.h | C | apache-2.0 | 3,658 |
#include <stdio.h>
#include <stdlib.h>
#include "pca9544.h"
#include "pca9544_i2c_drv.h"
static PCA9544_DEV_CFG_T g_pca9544_dev_cfg;
static i2c_dev_t g_pca9544_i2c_cfg;
/**********************************************************
* @fun PCA9544_init
* @breif pca9544 initialization
* @param i2c:the pointer for i2c configuration
* @param dev_cfg: the pointer for dev configuration
* @rtn
*********************************************************/
int pca9544_init(i2c_dev_t *i2c, PCA9544_DEV_CFG_T *dev_cfg)
{
int ret = 0;
if (i2c == NULL) {
printf("PCA9544 i2c is null\n");
return -1;
}
memset(&g_pca9544_i2c_cfg, 0, sizeof(i2c_dev_t));
memcpy(&g_pca9544_i2c_cfg, i2c, sizeof(i2c_dev_t));
/*ret = hal_i2c_init(&g_pca9544_i2c_cfg);*/
ret = pca9544_i2c_init(&g_pca9544_i2c_cfg);
if (ret) {
printf("Host I2C open failed\n");
/*hal_i2c_finalize(&g_pca9544_i2c_cfg);*/
pca9544_i2c_finalize(&g_pca9544_i2c_cfg);
return -1;
}
if (dev_cfg == NULL) {
printf("PCA9544 cfg is null\n");
return -1;
}
memset(&g_pca9544_dev_cfg, 0, sizeof(PCA9544_DEV_CFG_T));
memcpy(&g_pca9544_dev_cfg, dev_cfg, sizeof(PCA9544_DEV_CFG_T));
printf("PCA9544 cfg is successful\n");
return ret;
}
/**********************************************************
* @fun pca9544_deinit
* @breif pca9544 deinitialization
* @param none
* @rtn none
*********************************************************/
void pca9544_deinit()
{
memset(&g_pca9544_i2c_cfg, 0, sizeof(i2c_dev_t));
memset(&g_pca9544_dev_cfg, 0, sizeof(PCA9544_DEV_CFG_T));
/*hal_i2c_finalize(&g_pca9544_i2c_cfg);*/
pca9544_i2c_finalize(&g_pca9544_i2c_cfg);
}
/**********************************************************
* @fun pca9544_set_chan
* @breif pca9544 channel set
* @param chan: the object channel
* @rtn ret
*********************************************************/
int pca9544_set_chan(PCA9544_CH_E chan)
{
int ret = 0;
uint16_t dev_addr = g_pca9544_dev_cfg.dev_addr;
uint8_t regval = 0;
if ((chan < PCA9544_CHO) || (chan > PCA9544_CH3)) {
printf("the setting channel is not valid\n");
return -1;
}
g_pca9544_dev_cfg.pca9544_ch = chan;
regval = g_pca9544_dev_cfg.pca9544_ch;
ret = pca9544_write_reg(dev_addr, regval);
if (ret) {
printf("set PCA9544 channel failed\n");
return -1;
}
return ret;
}
/**********************************************************
* @fun pca9544_read_chan
* @breif pca9544 channel reading
* @param none
* @rtn chan: the current selected channel of pca9544
*********************************************************/
PCA9544_CH_E pca9544_read_chan()
{
PCA9544_CH_E chan = g_pca9544_dev_cfg.pca9544_ch;
return chan;
}
/**********************************************************
* @fun pca9544_clean_chan
* @breif pca9544 channel clean
* @param none
* @rtn ret
*********************************************************/
int pca9544_clean_chan()
{
int ret = 0;
uint16_t dev_addr = g_pca9544_dev_cfg.dev_addr;
g_pca9544_dev_cfg.pca9544_ch = PCA9544_CHAN_CLEAN;
uint8_t regval = g_pca9544_dev_cfg.pca9544_ch;
ret = pca9544_write_reg(dev_addr, regval);
if (ret) {
printf("clean PCA9544 channel failed\n");
return -1;
}
return ret;
}
/**********************************************************
* @fun pca9544_write_reg
* @breif pca9544 register writing operation
* @param dev_addr: i2c device address
* @param regval: register value
* @rtn ret
*********************************************************/
int pca9544_write_reg(uint16_t dev_addr, uint8_t regval)
{
int ret = 0;
i2c_dev_t *i2c = &g_pca9544_i2c_cfg;
uint32_t timeout = 1000;
/*ret = hal_i2c_master_send(i2c, dev_addr, ®val, sizeof(regval),
* timeout);*/
ret = pca9544_i2c_master_send(i2c, dev_addr, ®val, sizeof(regval), timeout);
if (ret) {
printf("write PCA9544 reg failed\n");
return -1;
}
return ret;
}
/**********************************************************
* @fun pca9544_read_reg
* @breif pca9544 register reading operation
* @param dev_addr: i2c device address
* @param regval: register value
* @rtn ret
*********************************************************/
int pca9544_read_reg(uint16_t dev_addr, uint8_t *data)
{
int ret = 0;
i2c_dev_t *i2c = &g_pca9544_i2c_cfg;
uint16_t len = PCA9544_CONFIG_REG_LEN;
uint32_t timeout = 1000;
/*ret = hal_i2c_master_recv(i2c, dev_addr, data, len, timeout);*/
ret = pca9544_i2c_master_recv(i2c, dev_addr, data, len, timeout);
if (ret) {
printf("Read PCA9544 reg failed\n");
return -1;
}
return ret;
}
/**********************************************************
* @fun pca9544_raw_data_write
* @breif write raw data to the selected channel
* @param sub_addr: the sub dev addr for
* the selected pca9544 channel
* @param reg_addr: the sub dev register addr for
* the selected pca9544 channel
* @param size: register size
* @param data: the pointer for the writing data
* @param len: the data length
* @rtn ret
*********************************************************/
int pca9544_raw_data_write(uint16_t subdev_addr, uint16_t reg_addr, uint16_t size, uint8_t *data, uint16_t len)
{
int ret = 0;
i2c_dev_t *i2c = &g_pca9544_i2c_cfg;
g_pca9544_dev_cfg.subdev_addr = subdev_addr;
g_pca9544_dev_cfg.reg_addr = reg_addr;
uint16_t dev_addr = g_pca9544_dev_cfg.subdev_addr;
uint16_t mem_addr = g_pca9544_dev_cfg.reg_addr;
uint16_t mem_addr_size = size;
uint32_t timeout = 1000;
/*ret = hal_i2c_mem_write(i2c, dev_addr, mem_addr, mem_addr_size, &data[0],
* len, timeout);*/
ret = pca9544_i2c_mem_write(i2c, dev_addr, mem_addr, mem_addr_size, &data[0], len, timeout);
if (ret) {
printf("PCA9544 sub dev raw data writing failed\n");
return -1;
}
return ret;
}
/**********************************************************
* @fun pca9544_raw_data_read
* @breif read raw data to the selected channel
* @param sub_addr: the sub dev addr for
* the selected pca9544 channel
* @param reg_addr: the sub dev register addr for
* the selected pca9544 channel
* @param size: register size
* @param data: the pointer for the reading data
* @param len: the data length
* @rtn ret
*********************************************************/
int pca9544_raw_data_read(uint16_t subdev_addr, uint16_t reg_addr, uint16_t size, uint8_t *data, uint16_t len)
{
int ret = 0;
i2c_dev_t *i2c = &g_pca9544_i2c_cfg;
g_pca9544_dev_cfg.subdev_addr = subdev_addr;
g_pca9544_dev_cfg.reg_addr = reg_addr;
uint16_t dev_addr = g_pca9544_dev_cfg.subdev_addr;
uint16_t mem_addr = g_pca9544_dev_cfg.reg_addr;
uint16_t mem_addr_size = size;
uint32_t timeout = 1000;
/*ret = hal_i2c_mem_read(i2c, dev_addr, mem_addr, mem_addr_size, &data[0],
* len, timeout);*/
ret = pca9544_i2c_mem_read(i2c, dev_addr, mem_addr, mem_addr_size, &data[0], len, timeout);
if (ret) {
printf("PCA9544 sub dev raw data reading failed\n");
return -1;
}
return ret;
}
int pca954x_irq_handler(uint16_t dev_addr, uint8_t *data)
{
int ret = 0;
uint8_t irq_state = 0;
ret = pca9544_get_irq_state(dev_addr, data);
return ret;
}
int pca9544_get_irq_state(uint16_t dev_addr, uint8_t *regval)
{
int ret = 0;
ret = pca9544_read_reg(dev_addr, ®val);
if (ret) {
printf("get PCA9544 irq state failed\n");
return -1;
} else {
regval[0] = regval[0] | PCA9544_IRQ_MASK;
regval[0] = regval[0] >> 4;
printf("PCA9544 IRQ STATUS is %d\n", regval[0]);
}
return ret;
}
| YifuLiu/AliOS-Things | components/drivers/external_device/pca9544/src/pca9544.c | C | apache-2.0 | 8,309 |
#include "pca9544_i2c_drv.h"
#include <aos/errno.h>
#include <stddef.h>
#include <stdint.h>
#include <vfsdev/i2c_dev.h>
#define I2C_PORT_MAX 4
static int g_i2c_fd[I2C_PORT_MAX] = { -1, -1, -1, -1 };
/**********************************************************
* @fun pca9544_i2c_init
* @breif pca9544 i2c initialization
* @param i2c:the pointer for i2c configuration
* @rtn 0 : on success, EIO : error
*********************************************************/
int32_t pca9544_i2c_init(i2c_dev_t *i2c)
{
int32_t ret = 0;
int32_t *p_fd = NULL;
char name[16] = { 0 };
io_i2c_control_u i2c_ctrl;
if (!i2c) {
printf("i2c is null\r\n");
return -EINVAL;
}
if (i2c->port >= I2C_PORT_MAX) {
return -EINVAL;
}
p_fd = &g_i2c_fd[i2c->port];
if (*p_fd >= 0) {
printf("i2c port[%d] isn't ready\r\n", i2c->port);
return -EALREADY;
}
memset(&i2c_ctrl, 0, sizeof(io_i2c_control_u));
snprintf(name, sizeof(name), "/dev/i2c%d", i2c->port);
*p_fd = open(name, 0);
if (*p_fd < 0) {
printf("open %s failed, fd:%d\r\n", name, *p_fd);
return -EIO;
}
i2c_ctrl.c.addr = i2c->config.dev_addr; /* sensor's address */
i2c_ctrl.c.addr_width = i2c->config.address_width; /* 7-bit address */
i2c_ctrl.c.role = 1; /* master mode */
ret = ioctl(*p_fd, IOC_I2C_SET_CONFIG, (unsigned long)&i2c_ctrl);
if (ret) {
printf("set i2c config on %s failed\r\n", name);
return -EINVAL;
}
i2c_ctrl.freq = i2c->config.freq;
ret = ioctl(*p_fd, IOC_I2C_SET_FREQ, (unsigned long)&i2c_ctrl);
if (ret) {
printf("IOC_I2C_SET_CONFIG or IOC_I2C_SET_FREQ on %s failed, ret:%d\r\n", name, ret);
close(*p_fd);
*p_fd = -1;
}
return ret;
}
/********************************************************
* @fun pca9544_i2c_master_send
*
* @param[in] i2c the i2c device
* @param[in] dev_addr device address
* @param[in] data i2c master send data
* @param[in] size i2c master send data size
* @param[in] timeout timeout in milisecond, set this value to
*HAL_WAIT_FOREVER if you want to wait forever
*
* @rtn 0 : on success, EIO : error
*********************************************************/
int32_t pca9544_i2c_master_send(i2c_dev_t *i2c, uint16_t dev_addr, const uint8_t* data, uint16_t size, uint32_t timeout)
{
int32_t *p_fd = NULL;
int32_t ret = -1;
io_i2c_data_t i2c_data;
if (!i2c) {
return -EINVAL;
}
if (i2c->port >= I2C_PORT_MAX) {
return -EINVAL;
}
p_fd = &g_i2c_fd[i2c->port];
if (!p_fd || (*p_fd < 0)) {
printf("i2c port[%d] has not been initialized\r\n", i2c->port);
return -EINVAL;
}
i2c_data.addr = dev_addr;
i2c_data.data = data;
i2c_data.length = size;
i2c_data.maddr = 0;
i2c_data.mlength = 0;
i2c_data.timeout = timeout;
ret = ioctl(*p_fd, IOC_I2C_MASTER_TX, (unsigned long)&i2c_data);
return ret;
}
/********************************************************
* @fun pca9544_i2c_master_recv
*
* @param[in] i2c the i2c device
* @param[in] dev_addr device address
* @param[in] data i2c master recv data
* @param[in] size i2c master recv data size
* @param[in] timeout timeout in milisecond, set this value to
*HAL_WAIT_FOREVER if you want to wait forever
*
* @rtn 0 : on success, EIO : error
*********************************************************/
int32_t pca9544_i2c_master_recv(i2c_dev_t *i2c, uint16_t dev_addr, uint8_t *data, uint16_t size, uint32_t timeout)
{
int32_t *p_fd = NULL;
int32_t ret = -1;
io_i2c_data_t i2c_data;
if (!i2c) {
printf("i2c is null\r\n");
return -EINVAL;
}
if (i2c->port >= I2C_PORT_MAX) {
return -EINVAL;
}
p_fd = &g_i2c_fd[i2c->port];
if (!p_fd || (*p_fd < 0)) {
printf("i2c port[%d] has not been initialized\r\n", i2c->port);
return -EINVAL;
}
i2c_data.addr = dev_addr;
i2c_data.data = data;
i2c_data.length = size;
i2c_data.maddr = 0;
i2c_data.mlength = 0;
i2c_data.timeout = timeout;
ret = ioctl(*p_fd, IOC_I2C_MASTER_RX, (unsigned long)&i2c_data);
return 0;
}
/*********************************************************
* @fun pca9544_i2c_mem_write
* @param[in] i2c the i2c device
* @param[in] dev_addr device address
* @param[in] mem_addr register address
* @param[in] mem_addr_size register address size
* @param[in] data i2c master send data
* @param[in] size i2c master send data size
* @param[in] timeout timeout in milisecond, set this value to
*HAL_WAIT_FOREVER if you want to wait forever
*
* @rtn 0 : on success, EIO : error
*********************************************************/
int32_t pca9544_i2c_mem_write(i2c_dev_t *i2c, uint16_t dev_addr, uint16_t mem_addr, uint16_t mem_addr_size, const uint8_t* data, uint16_t size, uint32_t timeout)
{
int32_t *p_fd = NULL;
int32_t ret = -1;
io_i2c_data_t i2c_data;
if (!i2c) {
return -EINVAL;
}
if (i2c->port >= I2C_PORT_MAX) {
return -EINVAL;
}
p_fd = &g_i2c_fd[i2c->port];
if (!p_fd || (*p_fd < 0)) {
printf("i2c port[%d] has not been initialized\r\n", i2c->port);
return -EINVAL;
}
i2c_data.addr = dev_addr;
i2c_data.data = data;
i2c_data.length = size;
i2c_data.maddr = mem_addr;
i2c_data.mlength = mem_addr_size;
i2c_data.timeout = timeout;
ret = ioctl(*p_fd, IOC_I2C_MEM_TX, (unsigned long)&i2c_data);
return ret;
}
/*********************************************************
* @fun pca9544_i2c_mem_read
* @param[in] i2c the i2c device
* @param[in] dev_addr device address
* @param[in] mem_addr register address
* @param[in] mem_addr_size register address size
* @param[in] data i2c master send data
* @param[in] size i2c master send data size
* @param[in] timeout timeout in milisecond, set this value to
*HAL_WAIT_FOREVER if you want to wait forever
*
* @rtn 0 : on success, EIO : error
*********************************************************/
int32_t pca9544_i2c_mem_read(i2c_dev_t *i2c, uint16_t dev_addr, uint16_t mem_addr, uint16_t mem_addr_size, uint8_t *data, uint16_t size, uint32_t timeout)
{
int32_t *p_fd = NULL;
int32_t ret = -1;
io_i2c_data_t i2c_data;
if (!i2c) {
return -EINVAL;
}
if (i2c->port >= I2C_PORT_MAX) {
return -EINVAL;
}
p_fd = &g_i2c_fd[i2c->port];
if (!p_fd || (*p_fd < 0)) {
printf("i2c port[%d] has not been initialized\r\n", i2c->port);
return -EINVAL;
}
memset(&i2c_data, 0, sizeof(io_i2c_data_t));
i2c_data.addr = dev_addr;
i2c_data.data = data;
i2c_data.length = size;
i2c_data.maddr = mem_addr;
i2c_data.mlength = mem_addr_size;
i2c_data.timeout = timeout;
ret = ioctl(*p_fd, IOC_I2C_MEM_RX, (unsigned long)&i2c_data);
return ret;
}
/********************************************************
* @fun pca9544_i2c_finalize
* @param[in] i2c the i2c device
* @rtn 0 : on success, EIO : error
*********************************************************/
int32_t pca9544_i2c_finalize(i2c_dev_t *i2c)
{
int32_t ret = 0;
int32_t *p_fd = NULL;
if (!i2c || !i2c->priv) {
return -EINVAL;
}
if (i2c->port >= I2C_PORT_MAX) {
return -EINVAL;
}
p_fd = &g_i2c_fd[i2c->port];
if (!p_fd || (*p_fd < 0)) {
printf("i2c port[%d] has not been initialized\r\n", i2c->port);
return -EINVAL;
}
close(*p_fd);
*p_fd = -1;
return 0;
}
| YifuLiu/AliOS-Things | components/drivers/external_device/pca9544/src/pca9544_i2c_drv.c | C | apache-2.0 | 8,018 |
/*
* Copyright (C) 2015-2021 Alibaba Group Holding Limited
*/
#if AOS_COMP_CLI
#include "aos/cli.h"
#endif
#include "sh1106.h"
static void example_sh1106_init(int argc, char **argv)
{
printf("sh1106 init test begin ...\r\n");
sh1106_init();
printf("sh1106 init test end !!!\r\n");
return;
}
static void example_sh1106_display(int argc, char **argv)
{
printf("sh1106 display test begin ...\r\n");
sh1106_show_string(6, 12 * 0, "Welcome to sh1106!", 12, 1);
sh1106_show_string(24, (12 + 4) * 1, "This is Haas!", 12, 1);
sh1106_show_string(24, (12 + 4) * 2, "2000-01-01 00:01", 12, 1);
sh1106_show_string(24, (12 + 4) * 3, "T:30^C H:70%", 12, 1);
printf("sh1106 display test end !!!\r\n");
return;
}
#if AOS_COMP_CLI
/* reg args: fun, cmd, description*/
ALIOS_CLI_CMD_REGISTER(example_sh1106_init, sh1106_init, sh1106 init test example)
ALIOS_CLI_CMD_REGISTER(example_sh1106_display, sh1106_display, sh1106 display test example)
#endif
| YifuLiu/AliOS-Things | components/drivers/external_device/sh1106/example/sh1106_example.c | C | apache-2.0 | 984 |
/*
* Copyright (C) 2015-2021 Alibaba Group Holding Limited
*/
#ifndef _OLED_FONT_H
#define _OELD_FONT_H
// 常用ASCII表
// 偏移量32
// ASCII字符集:
// !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~
// PC2LCD2002取模方式设置：阴码+逐列式+顺向+C51格式
// 总共：3个字符集（12*12、16*16和24*24），用户可以自行新增其他分辨率的字符集。
// 每个字符所占用的字节数为:(size/8+((size%8)?1:0))*(size/2),其中size:是字库生成时的点阵大小(12/16/24...)
// 12*12 ASCII字符集点阵
static const unsigned char sh1106_asc2_1206[95][12] = {
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00}, /*" ",0*/
{0x00, 0x00, 0x00, 0x00, 0x3F, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00}, /*"!",1*/
{0x00, 0x00, 0x30, 0x00, 0x40, 0x00, 0x30, 0x00, 0x40, 0x00, 0x00,
0x00}, /*""",2*/
{0x09, 0x00, 0x0B, 0xC0, 0x3D, 0x00, 0x0B, 0xC0, 0x3D, 0x00, 0x09,
0x00}, /*"#",3*/
{0x18, 0xC0, 0x24, 0x40, 0x7F, 0xE0, 0x22, 0x40, 0x31, 0x80, 0x00,
0x00}, /*"$",4*/
{0x18, 0x00, 0x24, 0xC0, 0x1B, 0x00, 0x0D, 0x80, 0x32, 0x40, 0x01,
0x80}, /*"%",5*/
{0x03, 0x80, 0x1C, 0x40, 0x27, 0x40, 0x1C, 0x80, 0x07, 0x40, 0x00,
0x40}, /*"&",6*/
{0x10, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00}, /*"'",7*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1F, 0x80, 0x20, 0x40, 0x40,
0x20}, /*"(",8*/
{0x00, 0x00, 0x40, 0x20, 0x20, 0x40, 0x1F, 0x80, 0x00, 0x00, 0x00,
0x00}, /*")",9*/
{0x09, 0x00, 0x06, 0x00, 0x1F, 0x80, 0x06, 0x00, 0x09, 0x00, 0x00,
0x00}, /*"*",10*/
{0x04, 0x00, 0x04, 0x00, 0x3F, 0x80, 0x04, 0x00, 0x04, 0x00, 0x00,
0x00}, /*"+",11*/
{0x00, 0x10, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00}, /*",",12*/
{0x04, 0x00, 0x04, 0x00, 0x04, 0x00, 0x04, 0x00, 0x04, 0x00, 0x00,
0x00}, /*"-",13*/
{0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00}, /*".",14*/
{0x00, 0x20, 0x01, 0xC0, 0x06, 0x00, 0x38, 0x00, 0x40, 0x00, 0x00,
0x00}, /*"/",15*/
{0x1F, 0x80, 0x20, 0x40, 0x20, 0x40, 0x20, 0x40, 0x1F, 0x80, 0x00,
0x00}, /*"0",16*/
{0x00, 0x00, 0x10, 0x40, 0x3F, 0xC0, 0x00, 0x40, 0x00, 0x00, 0x00,
0x00}, /*"1",17*/
{0x18, 0xC0, 0x21, 0x40, 0x22, 0x40, 0x24, 0x40, 0x18, 0x40, 0x00,
0x00}, /*"2",18*/
{0x10, 0x80, 0x20, 0x40, 0x24, 0x40, 0x24, 0x40, 0x1B, 0x80, 0x00,
0x00}, /*"3",19*/
{0x02, 0x00, 0x0D, 0x00, 0x11, 0x00, 0x3F, 0xC0, 0x01, 0x40, 0x00,
0x00}, /*"4",20*/
{0x3C, 0x80, 0x24, 0x40, 0x24, 0x40, 0x24, 0x40, 0x23, 0x80, 0x00,
0x00}, /*"5",21*/
{0x1F, 0x80, 0x24, 0x40, 0x24, 0x40, 0x34, 0x40, 0x03, 0x80, 0x00,
0x00}, /*"6",22*/
{0x30, 0x00, 0x20, 0x00, 0x27, 0xC0, 0x38, 0x00, 0x20, 0x00, 0x00,
0x00}, /*"7",23*/
{0x1B, 0x80, 0x24, 0x40, 0x24, 0x40, 0x24, 0x40, 0x1B, 0x80, 0x00,
0x00}, /*"8",24*/
{0x1C, 0x00, 0x22, 0xC0, 0x22, 0x40, 0x22, 0x40, 0x1F, 0x80, 0x00,
0x00}, /*"9",25*/
{0x00, 0x00, 0x00, 0x00, 0x08, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00}, /*":",26*/
{0x00, 0x00, 0x00, 0x00, 0x04, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00}, /*";",27*/
{0x00, 0x00, 0x04, 0x00, 0x0A, 0x00, 0x11, 0x00, 0x20, 0x80, 0x40,
0x40}, /*"<",28*/
{0x09, 0x00, 0x09, 0x00, 0x09, 0x00, 0x09, 0x00, 0x09, 0x00, 0x00,
0x00}, /*"=",29*/
{0x00, 0x00, 0x40, 0x40, 0x20, 0x80, 0x11, 0x00, 0x0A, 0x00, 0x04,
0x00}, /*">",30*/
{0x18, 0x00, 0x20, 0x00, 0x23, 0x40, 0x24, 0x00, 0x18, 0x00, 0x00,
0x00}, /*"?",31*/
{0x1F, 0x80, 0x20, 0x40, 0x27, 0x40, 0x29, 0x40, 0x1F, 0x40, 0x00,
0x00}, /*"@",32*/
{0x00, 0x40, 0x07, 0xC0, 0x39, 0x00, 0x0F, 0x00, 0x01, 0xC0, 0x00,
0x40}, /*"A",33*/
{0x20, 0x40, 0x3F, 0xC0, 0x24, 0x40, 0x24, 0x40, 0x1B, 0x80, 0x00,
0x00}, /*"B",34*/
{0x1F, 0x80, 0x20, 0x40, 0x20, 0x40, 0x20, 0x40, 0x30, 0x80, 0x00,
0x00}, /*"C",35*/
{0x20, 0x40, 0x3F, 0xC0, 0x20, 0x40, 0x20, 0x40, 0x1F, 0x80, 0x00,
0x00}, /*"D",36*/
{0x20, 0x40, 0x3F, 0xC0, 0x24, 0x40, 0x2E, 0x40, 0x30, 0xC0, 0x00,
0x00}, /*"E",37*/
{0x20, 0x40, 0x3F, 0xC0, 0x24, 0x40, 0x2E, 0x00, 0x30, 0x00, 0x00,
0x00}, /*"F",38*/
{0x0F, 0x00, 0x10, 0x80, 0x20, 0x40, 0x22, 0x40, 0x33, 0x80, 0x02,
0x00}, /*"G",39*/
{0x20, 0x40, 0x3F, 0xC0, 0x04, 0x00, 0x04, 0x00, 0x3F, 0xC0, 0x20,
0x40}, /*"H",40*/
{0x20, 0x40, 0x20, 0x40, 0x3F, 0xC0, 0x20, 0x40, 0x20, 0x40, 0x00,
0x00}, /*"I",41*/
{0x00, 0x60, 0x20, 0x20, 0x20, 0x20, 0x3F, 0xC0, 0x20, 0x00, 0x20,
0x00}, /*"J",42*/
{0x20, 0x40, 0x3F, 0xC0, 0x24, 0x40, 0x0B, 0x00, 0x30, 0xC0, 0x20,
0x40}, /*"K",43*/
{0x20, 0x40, 0x3F, 0xC0, 0x20, 0x40, 0x00, 0x40, 0x00, 0x40, 0x00,
0xC0}, /*"L",44*/
{0x3F, 0xC0, 0x3C, 0x00, 0x03, 0xC0, 0x3C, 0x00, 0x3F, 0xC0, 0x00,
0x00}, /*"M",45*/
{0x20, 0x40, 0x3F, 0xC0, 0x0C, 0x40, 0x23, 0x00, 0x3F, 0xC0, 0x20,
0x00}, /*"N",46*/
{0x1F, 0x80, 0x20, 0x40, 0x20, 0x40, 0x20, 0x40, 0x1F, 0x80, 0x00,
0x00}, /*"O",47*/
{0x20, 0x40, 0x3F, 0xC0, 0x24, 0x40, 0x24, 0x00, 0x18, 0x00, 0x00,
0x00}, /*"P",48*/
{0x1F, 0x80, 0x21, 0x40, 0x21, 0x40, 0x20, 0xE0, 0x1F, 0xA0, 0x00,
0x00}, /*"Q",49*/
{0x20, 0x40, 0x3F, 0xC0, 0x24, 0x40, 0x26, 0x00, 0x19, 0xC0, 0x00,
0x40}, /*"R",50*/
{0x18, 0xC0, 0x24, 0x40, 0x24, 0x40, 0x22, 0x40, 0x31, 0x80, 0x00,
0x00}, /*"S",51*/
{0x30, 0x00, 0x20, 0x40, 0x3F, 0xC0, 0x20, 0x40, 0x30, 0x00, 0x00,
0x00}, /*"T",52*/
{0x20, 0x00, 0x3F, 0x80, 0x00, 0x40, 0x00, 0x40, 0x3F, 0x80, 0x20,
0x00}, /*"U",53*/
{0x20, 0x00, 0x3E, 0x00, 0x01, 0xC0, 0x07, 0x00, 0x38, 0x00, 0x20,
0x00}, /*"V",54*/
{0x38, 0x00, 0x07, 0xC0, 0x3C, 0x00, 0x07, 0xC0, 0x38, 0x00, 0x00,
0x00}, /*"W",55*/
{0x20, 0x40, 0x39, 0xC0, 0x06, 0x00, 0x39, 0xC0, 0x20, 0x40, 0x00,
0x00}, /*"X",56*/
{0x20, 0x00, 0x38, 0x40, 0x07, 0xC0, 0x38, 0x40, 0x20, 0x00, 0x00,
0x00}, /*"Y",57*/
{0x30, 0x40, 0x21, 0xC0, 0x26, 0x40, 0x38, 0x40, 0x20, 0xC0, 0x00,
0x00}, /*"Z",58*/
{0x00, 0x00, 0x00, 0x00, 0x7F, 0xE0, 0x40, 0x20, 0x40, 0x20, 0x00,
0x00}, /*"[",59*/
{0x00, 0x00, 0x70, 0x00, 0x0C, 0x00, 0x03, 0x80, 0x00, 0x40, 0x00,
0x00}, /*"\",60*/
{0x00, 0x00, 0x40, 0x20, 0x40, 0x20, 0x7F, 0xE0, 0x00, 0x00, 0x00,
0x00}, /*"]",61*/
{0x00, 0x00, 0x20, 0x00, 0x40, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00,
0x00}, /*"^",62*/
{0x00, 0x10, 0x00, 0x10, 0x00, 0x10, 0x00, 0x10, 0x00, 0x10, 0x00,
0x10}, /*"_",63*/
{0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00}, /*"`",64*/
{0x00, 0x00, 0x02, 0x80, 0x05, 0x40, 0x05, 0x40, 0x03, 0xC0, 0x00,
0x40}, /*"a",65*/
{0x20, 0x00, 0x3F, 0xC0, 0x04, 0x40, 0x04, 0x40, 0x03, 0x80, 0x00,
0x00}, /*"b",66*/
{0x00, 0x00, 0x03, 0x80, 0x04, 0x40, 0x04, 0x40, 0x06, 0x40, 0x00,
0x00}, /*"c",67*/
{0x00, 0x00, 0x03, 0x80, 0x04, 0x40, 0x24, 0x40, 0x3F, 0xC0, 0x00,
0x40}, /*"d",68*/
{0x00, 0x00, 0x03, 0x80, 0x05, 0x40, 0x05, 0x40, 0x03, 0x40, 0x00,
0x00}, /*"e",69*/
{0x00, 0x00, 0x04, 0x40, 0x1F, 0xC0, 0x24, 0x40, 0x24, 0x40, 0x20,
0x00}, /*"f",70*/
{0x00, 0x00, 0x02, 0xE0, 0x05, 0x50, 0x05, 0x50, 0x06, 0x50, 0x04,
0x20}, /*"g",71*/
{0x20, 0x40, 0x3F, 0xC0, 0x04, 0x40, 0x04, 0x00, 0x03, 0xC0, 0x00,
0x40}, /*"h",72*/
{0x00, 0x00, 0x04, 0x40, 0x27, 0xC0, 0x00, 0x40, 0x00, 0x00, 0x00,
0x00}, /*"i",73*/
{0x00, 0x10, 0x00, 0x10, 0x04, 0x10, 0x27, 0xE0, 0x00, 0x00, 0x00,
0x00}, /*"j",74*/
{0x20, 0x40, 0x3F, 0xC0, 0x01, 0x40, 0x07, 0x00, 0x04, 0xC0, 0x04,
0x40}, /*"k",75*/
{0x20, 0x40, 0x20, 0x40, 0x3F, 0xC0, 0x00, 0x40, 0x00, 0x40, 0x00,
0x00}, /*"l",76*/
{0x07, 0xC0, 0x04, 0x00, 0x07, 0xC0, 0x04, 0x00, 0x03, 0xC0, 0x00,
0x00}, /*"m",77*/
{0x04, 0x40, 0x07, 0xC0, 0x04, 0x40, 0x04, 0x00, 0x03, 0xC0, 0x00,
0x40}, /*"n",78*/
{0x00, 0x00, 0x03, 0x80, 0x04, 0x40, 0x04, 0x40, 0x03, 0x80, 0x00,
0x00}, /*"o",79*/
{0x04, 0x10, 0x07, 0xF0, 0x04, 0x50, 0x04, 0x40, 0x03, 0x80, 0x00,
0x00}, /*"p",80*/
{0x00, 0x00, 0x03, 0x80, 0x04, 0x40, 0x04, 0x50, 0x07, 0xF0, 0x00,
0x10}, /*"q",81*/
{0x04, 0x40, 0x07, 0xC0, 0x02, 0x40, 0x04, 0x00, 0x04, 0x00, 0x00,
0x00}, /*"r",82*/
{0x00, 0x00, 0x06, 0x40, 0x05, 0x40, 0x05, 0x40, 0x04, 0xC0, 0x00,
0x00}, /*"s",83*/
{0x00, 0x00, 0x04, 0x00, 0x1F, 0x80, 0x04, 0x40, 0x00, 0x40, 0x00,
0x00}, /*"t",84*/
{0x04, 0x00, 0x07, 0x80, 0x00, 0x40, 0x04, 0x40, 0x07, 0xC0, 0x00,
0x40}, /*"u",85*/
{0x04, 0x00, 0x07, 0x00, 0x04, 0xC0, 0x01, 0x80, 0x06, 0x00, 0x04,
0x00}, /*"v",86*/
{0x06, 0x00, 0x01, 0xC0, 0x07, 0x00, 0x01, 0xC0, 0x06, 0x00, 0x00,
0x00}, /*"w",87*/
{0x04, 0x40, 0x06, 0xC0, 0x01, 0x00, 0x06, 0xC0, 0x04, 0x40, 0x00,
0x00}, /*"x",88*/
{0x04, 0x10, 0x07, 0x10, 0x04, 0xE0, 0x01, 0x80, 0x06, 0x00, 0x04,
0x00}, /*"y",89*/
{0x00, 0x00, 0x04, 0x40, 0x05, 0xC0, 0x06, 0x40, 0x04, 0x40, 0x00,
0x00}, /*"z",90*/
{0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x7B, 0xE0, 0x40, 0x20, 0x00,
0x00}, /*"{",91*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xF0, 0x00, 0x00, 0x00,
0x00}, /*"|",92*/
{0x00, 0x00, 0x40, 0x20, 0x7B, 0xE0, 0x04, 0x00, 0x00, 0x00, 0x00,
0x00}, /*"}",93*/
{0x40, 0x00, 0x80, 0x00, 0x40, 0x00, 0x20, 0x00, 0x20, 0x00, 0x40,
0x00}, /*"~",94*/
};
// 16*16 ASCII字符集点阵
static const unsigned char sh1106_asc2_1608[95][16] = {
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00}, /*" ",0*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1F, 0xCC, 0x00, 0x0C, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00}, /*"!",1*/
{0x00, 0x00, 0x08, 0x00, 0x30, 0x00, 0x60, 0x00, 0x08, 0x00, 0x30, 0x00,
0x60, 0x00, 0x00, 0x00}, /*""",2*/
{0x02, 0x20, 0x03, 0xFC, 0x1E, 0x20, 0x02, 0x20, 0x03, 0xFC, 0x1E, 0x20,
0x02, 0x20, 0x00, 0x00}, /*"#",3*/
{0x00, 0x00, 0x0E, 0x18, 0x11, 0x04, 0x3F, 0xFF, 0x10, 0x84, 0x0C, 0x78,
0x00, 0x00, 0x00, 0x00}, /*"$",4*/
{0x0F, 0x00, 0x10, 0x84, 0x0F, 0x38, 0x00, 0xC0, 0x07, 0x78, 0x18, 0x84,
0x00, 0x78, 0x00, 0x00}, /*"%",5*/
{0x00, 0x78, 0x0F, 0x84, 0x10, 0xC4, 0x11, 0x24, 0x0E, 0x98, 0x00, 0xE4,
0x00, 0x84, 0x00, 0x08}, /*"&",6*/
{0x08, 0x00, 0x68, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00}, /*"'",7*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0xE0, 0x18, 0x18, 0x20, 0x04,
0x40, 0x02, 0x00, 0x00}, /*"(",8*/
{0x00, 0x00, 0x40, 0x02, 0x20, 0x04, 0x18, 0x18, 0x07, 0xE0, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00}, /*")",9*/
{0x02, 0x40, 0x02, 0x40, 0x01, 0x80, 0x0F, 0xF0, 0x01, 0x80, 0x02, 0x40,
0x02, 0x40, 0x00, 0x00}, /*"*",10*/
{0x00, 0x80, 0x00, 0x80, 0x00, 0x80, 0x0F, 0xF8, 0x00, 0x80, 0x00, 0x80,
0x00, 0x80, 0x00, 0x00}, /*"+",11*/
{0x00, 0x01, 0x00, 0x0D, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00}, /*",",12*/
{0x00, 0x00, 0x00, 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, 0x80,
0x00, 0x80, 0x00, 0x80}, /*"-",13*/
{0x00, 0x00, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00}, /*".",14*/
{0x00, 0x00, 0x00, 0x06, 0x00, 0x18, 0x00, 0x60, 0x01, 0x80, 0x06, 0x00,
0x18, 0x00, 0x20, 0x00}, /*"/",15*/
{0x00, 0x00, 0x07, 0xF0, 0x08, 0x08, 0x10, 0x04, 0x10, 0x04, 0x08, 0x08,
0x07, 0xF0, 0x00, 0x00}, /*"0",16*/
{0x00, 0x00, 0x08, 0x04, 0x08, 0x04, 0x1F, 0xFC, 0x00, 0x04, 0x00, 0x04,
0x00, 0x00, 0x00, 0x00}, /*"1",17*/
{0x00, 0x00, 0x0E, 0x0C, 0x10, 0x14, 0x10, 0x24, 0x10, 0x44, 0x11, 0x84,
0x0E, 0x0C, 0x00, 0x00}, /*"2",18*/
{0x00, 0x00, 0x0C, 0x18, 0x10, 0x04, 0x11, 0x04, 0x11, 0x04, 0x12, 0x88,
0x0C, 0x70, 0x00, 0x00}, /*"3",19*/
{0x00, 0x00, 0x00, 0xE0, 0x03, 0x20, 0x04, 0x24, 0x08, 0x24, 0x1F, 0xFC,
0x00, 0x24, 0x00, 0x00}, /*"4",20*/
{0x00, 0x00, 0x1F, 0x98, 0x10, 0x84, 0x11, 0x04, 0x11, 0x04, 0x10, 0x88,
0x10, 0x70, 0x00, 0x00}, /*"5",21*/
{0x00, 0x00, 0x07, 0xF0, 0x08, 0x88, 0x11, 0x04, 0x11, 0x04, 0x18, 0x88,
0x00, 0x70, 0x00, 0x00}, /*"6",22*/
{0x00, 0x00, 0x1C, 0x00, 0x10, 0x00, 0x10, 0xFC, 0x13, 0x00, 0x1C, 0x00,
0x10, 0x00, 0x00, 0x00}, /*"7",23*/
{0x00, 0x00, 0x0E, 0x38, 0x11, 0x44, 0x10, 0x84, 0x10, 0x84, 0x11, 0x44,
0x0E, 0x38, 0x00, 0x00}, /*"8",24*/
{0x00, 0x00, 0x07, 0x00, 0x08, 0x8C, 0x10, 0x44, 0x10, 0x44, 0x08, 0x88,
0x07, 0xF0, 0x00, 0x00}, /*"9",25*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x0C, 0x03, 0x0C, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00}, /*":",26*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x06, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00}, /*";",27*/
{0x00, 0x00, 0x00, 0x80, 0x01, 0x40, 0x02, 0x20, 0x04, 0x10, 0x08, 0x08,
0x10, 0x04, 0x00, 0x00}, /*"<",28*/
{0x02, 0x20, 0x02, 0x20, 0x02, 0x20, 0x02, 0x20, 0x02, 0x20, 0x02, 0x20,
0x02, 0x20, 0x00, 0x00}, /*"=",29*/
{0x00, 0x00, 0x10, 0x04, 0x08, 0x08, 0x04, 0x10, 0x02, 0x20, 0x01, 0x40,
0x00, 0x80, 0x00, 0x00}, /*">",30*/
{0x00, 0x00, 0x0E, 0x00, 0x12, 0x00, 0x10, 0x0C, 0x10, 0x6C, 0x10, 0x80,
0x0F, 0x00, 0x00, 0x00}, /*"?",31*/
{0x03, 0xE0, 0x0C, 0x18, 0x13, 0xE4, 0x14, 0x24, 0x17, 0xC4, 0x08, 0x28,
0x07, 0xD0, 0x00, 0x00}, /*"@",32*/
{0x00, 0x04, 0x00, 0x3C, 0x03, 0xC4, 0x1C, 0x40, 0x07, 0x40, 0x00, 0xE4,
0x00, 0x1C, 0x00, 0x04}, /*"A",33*/
{0x10, 0x04, 0x1F, 0xFC, 0x11, 0x04, 0x11, 0x04, 0x11, 0x04, 0x0E, 0x88,
0x00, 0x70, 0x00, 0x00}, /*"B",34*/
{0x03, 0xE0, 0x0C, 0x18, 0x10, 0x04, 0x10, 0x04, 0x10, 0x04, 0x10, 0x08,
0x1C, 0x10, 0x00, 0x00}, /*"C",35*/
{0x10, 0x04, 0x1F, 0xFC, 0x10, 0x04, 0x10, 0x04, 0x10, 0x04, 0x08, 0x08,
0x07, 0xF0, 0x00, 0x00}, /*"D",36*/
{0x10, 0x04, 0x1F, 0xFC, 0x11, 0x04, 0x11, 0x04, 0x17, 0xC4, 0x10, 0x04,
0x08, 0x18, 0x00, 0x00}, /*"E",37*/
{0x10, 0x04, 0x1F, 0xFC, 0x11, 0x04, 0x11, 0x00, 0x17, 0xC0, 0x10, 0x00,
0x08, 0x00, 0x00, 0x00}, /*"F",38*/
{0x03, 0xE0, 0x0C, 0x18, 0x10, 0x04, 0x10, 0x04, 0x10, 0x44, 0x1C, 0x78,
0x00, 0x40, 0x00, 0x00}, /*"G",39*/
{0x10, 0x04, 0x1F, 0xFC, 0x10, 0x84, 0x00, 0x80, 0x00, 0x80, 0x10, 0x84,
0x1F, 0xFC, 0x10, 0x04}, /*"H",40*/
{0x00, 0x00, 0x10, 0x04, 0x10, 0x04, 0x1F, 0xFC, 0x10, 0x04, 0x10, 0x04,
0x00, 0x00, 0x00, 0x00}, /*"I",41*/
{0x00, 0x03, 0x00, 0x01, 0x10, 0x01, 0x10, 0x01, 0x1F, 0xFE, 0x10, 0x00,
0x10, 0x00, 0x00, 0x00}, /*"J",42*/
{0x10, 0x04, 0x1F, 0xFC, 0x11, 0x04, 0x03, 0x80, 0x14, 0x64, 0x18, 0x1C,
0x10, 0x04, 0x00, 0x00}, /*"K",43*/
{0x10, 0x04, 0x1F, 0xFC, 0x10, 0x04, 0x00, 0x04, 0x00, 0x04, 0x00, 0x04,
0x00, 0x0C, 0x00, 0x00}, /*"L",44*/
{0x10, 0x04, 0x1F, 0xFC, 0x1F, 0x00, 0x00, 0xFC, 0x1F, 0x00, 0x1F, 0xFC,
0x10, 0x04, 0x00, 0x00}, /*"M",45*/
{0x10, 0x04, 0x1F, 0xFC, 0x0C, 0x04, 0x03, 0x00, 0x00, 0xE0, 0x10, 0x18,
0x1F, 0xFC, 0x10, 0x00}, /*"N",46*/
{0x07, 0xF0, 0x08, 0x08, 0x10, 0x04, 0x10, 0x04, 0x10, 0x04, 0x08, 0x08,
0x07, 0xF0, 0x00, 0x00}, /*"O",47*/
{0x10, 0x04, 0x1F, 0xFC, 0x10, 0x84, 0x10, 0x80, 0x10, 0x80, 0x10, 0x80,
0x0F, 0x00, 0x00, 0x00}, /*"P",48*/
{0x07, 0xF0, 0x08, 0x18, 0x10, 0x24, 0x10, 0x24, 0x10, 0x1C, 0x08, 0x0A,
0x07, 0xF2, 0x00, 0x00}, /*"Q",49*/
{0x10, 0x04, 0x1F, 0xFC, 0x11, 0x04, 0x11, 0x00, 0x11, 0xC0, 0x11, 0x30,
0x0E, 0x0C, 0x00, 0x04}, /*"R",50*/
{0x00, 0x00, 0x0E, 0x1C, 0x11, 0x04, 0x10, 0x84, 0x10, 0x84, 0x10, 0x44,
0x1C, 0x38, 0x00, 0x00}, /*"S",51*/
{0x18, 0x00, 0x10, 0x00, 0x10, 0x04, 0x1F, 0xFC, 0x10, 0x04, 0x10, 0x00,
0x18, 0x00, 0x00, 0x00}, /*"T",52*/
{0x10, 0x00, 0x1F, 0xF8, 0x10, 0x04, 0x00, 0x04, 0x00, 0x04, 0x10, 0x04,
0x1F, 0xF8, 0x10, 0x00}, /*"U",53*/
{0x10, 0x00, 0x1E, 0x00, 0x11, 0xE0, 0x00, 0x1C, 0x00, 0x70, 0x13, 0x80,
0x1C, 0x00, 0x10, 0x00}, /*"V",54*/
{0x1F, 0xC0, 0x10, 0x3C, 0x00, 0xE0, 0x1F, 0x00, 0x00, 0xE0, 0x10, 0x3C,
0x1F, 0xC0, 0x00, 0x00}, /*"W",55*/
{0x10, 0x04, 0x18, 0x0C, 0x16, 0x34, 0x01, 0xC0, 0x01, 0xC0, 0x16, 0x34,
0x18, 0x0C, 0x10, 0x04}, /*"X",56*/
{0x10, 0x00, 0x1C, 0x00, 0x13, 0x04, 0x00, 0xFC, 0x13, 0x04, 0x1C, 0x00,
0x10, 0x00, 0x00, 0x00}, /*"Y",57*/
{0x08, 0x04, 0x10, 0x1C, 0x10, 0x64, 0x10, 0x84, 0x13, 0x04, 0x1C, 0x04,
0x10, 0x18, 0x00, 0x00}, /*"Z",58*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7F, 0xFE, 0x40, 0x02, 0x40, 0x02,
0x40, 0x02, 0x00, 0x00}, /*"[",59*/
{0x00, 0x00, 0x30, 0x00, 0x0C, 0x00, 0x03, 0x80, 0x00, 0x60, 0x00, 0x1C,
0x00, 0x03, 0x00, 0x00}, /*"\",60*/
{0x00, 0x00, 0x40, 0x02, 0x40, 0x02, 0x40, 0x02, 0x7F, 0xFE, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00}, /*"]",61*/
{0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x40, 0x00, 0x40, 0x00, 0x40, 0x00,
0x20, 0x00, 0x00, 0x00}, /*"^",62*/
{0x00, 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, 0x01,
0x00, 0x01, 0x00, 0x01}, /*"_",63*/
{0x00, 0x00, 0x40, 0x00, 0x40, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00}, /*"`",64*/
{0x00, 0x00, 0x00, 0x98, 0x01, 0x24, 0x01, 0x44, 0x01, 0x44, 0x01, 0x44,
0x00, 0xFC, 0x00, 0x04}, /*"a",65*/
{0x10, 0x00, 0x1F, 0xFC, 0x00, 0x88, 0x01, 0x04, 0x01, 0x04, 0x00, 0x88,
0x00, 0x70, 0x00, 0x00}, /*"b",66*/
{0x00, 0x00, 0x00, 0x70, 0x00, 0x88, 0x01, 0x04, 0x01, 0x04, 0x01, 0x04,
0x00, 0x88, 0x00, 0x00}, /*"c",67*/
{0x00, 0x00, 0x00, 0x70, 0x00, 0x88, 0x01, 0x04, 0x01, 0x04, 0x11, 0x08,
0x1F, 0xFC, 0x00, 0x04}, /*"d",68*/
{0x00, 0x00, 0x00, 0xF8, 0x01, 0x44, 0x01, 0x44, 0x01, 0x44, 0x01, 0x44,
0x00, 0xC8, 0x00, 0x00}, /*"e",69*/
{0x00, 0x00, 0x01, 0x04, 0x01, 0x04, 0x0F, 0xFC, 0x11, 0x04, 0x11, 0x04,
0x11, 0x00, 0x18, 0x00}, /*"f",70*/
{0x00, 0x00, 0x00, 0xD6, 0x01, 0x29, 0x01, 0x29, 0x01, 0x29, 0x01, 0xC9,
0x01, 0x06, 0x00, 0x00}, /*"g",71*/
{0x10, 0x04, 0x1F, 0xFC, 0x00, 0x84, 0x01, 0x00, 0x01, 0x00, 0x01, 0x04,
0x00, 0xFC, 0x00, 0x04}, /*"h",72*/
{0x00, 0x00, 0x01, 0x04, 0x19, 0x04, 0x19, 0xFC, 0x00, 0x04, 0x00, 0x04,
0x00, 0x00, 0x00, 0x00}, /*"i",73*/
{0x00, 0x00, 0x00, 0x03, 0x00, 0x01, 0x01, 0x01, 0x19, 0x01, 0x19, 0xFE,
0x00, 0x00, 0x00, 0x00}, /*"j",74*/
{0x10, 0x04, 0x1F, 0xFC, 0x00, 0x24, 0x00, 0x40, 0x01, 0xB4, 0x01, 0x0C,
0x01, 0x04, 0x00, 0x00}, /*"k",75*/
{0x00, 0x00, 0x10, 0x04, 0x10, 0x04, 0x1F, 0xFC, 0x00, 0x04, 0x00, 0x04,
0x00, 0x00, 0x00, 0x00}, /*"l",76*/
{0x01, 0x04, 0x01, 0xFC, 0x01, 0x04, 0x01, 0x00, 0x01, 0xFC, 0x01, 0x04,
0x01, 0x00, 0x00, 0xFC}, /*"m",77*/
{0x01, 0x04, 0x01, 0xFC, 0x00, 0x84, 0x01, 0x00, 0x01, 0x00, 0x01, 0x04,
0x00, 0xFC, 0x00, 0x04}, /*"n",78*/
{0x00, 0x00, 0x00, 0xF8, 0x01, 0x04, 0x01, 0x04, 0x01, 0x04, 0x01, 0x04,
0x00, 0xF8, 0x00, 0x00}, /*"o",79*/
{0x01, 0x01, 0x01, 0xFF, 0x00, 0x85, 0x01, 0x04, 0x01, 0x04, 0x00, 0x88,
0x00, 0x70, 0x00, 0x00}, /*"p",80*/
{0x00, 0x00, 0x00, 0x70, 0x00, 0x88, 0x01, 0x04, 0x01, 0x04, 0x01, 0x05,
0x01, 0xFF, 0x00, 0x01}, /*"q",81*/
{0x01, 0x04, 0x01, 0x04, 0x01, 0xFC, 0x00, 0x84, 0x01, 0x04, 0x01, 0x00,
0x01, 0x80, 0x00, 0x00}, /*"r",82*/
{0x00, 0x00, 0x00, 0xCC, 0x01, 0x24, 0x01, 0x24, 0x01, 0x24, 0x01, 0x24,
0x01, 0x98, 0x00, 0x00}, /*"s",83*/
{0x00, 0x00, 0x01, 0x00, 0x01, 0x00, 0x07, 0xF8, 0x01, 0x04, 0x01, 0x04,
0x00, 0x00, 0x00, 0x00}, /*"t",84*/
{0x01, 0x00, 0x01, 0xF8, 0x00, 0x04, 0x00, 0x04, 0x00, 0x04, 0x01, 0x08,
0x01, 0xFC, 0x00, 0x04}, /*"u",85*/
{0x01, 0x00, 0x01, 0x80, 0x01, 0x70, 0x00, 0x0C, 0x00, 0x10, 0x01, 0x60,
0x01, 0x80, 0x01, 0x00}, /*"v",86*/
{0x01, 0xF0, 0x01, 0x0C, 0x00, 0x30, 0x01, 0xC0, 0x00, 0x30, 0x01, 0x0C,
0x01, 0xF0, 0x01, 0x00}, /*"w",87*/
{0x00, 0x00, 0x01, 0x04, 0x01, 0x8C, 0x00, 0x74, 0x01, 0x70, 0x01, 0x8C,
0x01, 0x04, 0x00, 0x00}, /*"x",88*/
{0x01, 0x01, 0x01, 0x81, 0x01, 0x71, 0x00, 0x0E, 0x00, 0x18, 0x01, 0x60,
0x01, 0x80, 0x01, 0x00}, /*"y",89*/
{0x00, 0x00, 0x01, 0x84, 0x01, 0x0C, 0x01, 0x34, 0x01, 0x44, 0x01, 0x84,
0x01, 0x0C, 0x00, 0x00}, /*"z",90*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x3E, 0xFC,
0x40, 0x02, 0x40, 0x02}, /*"{",91*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00}, /*"|",92*/
{0x00, 0x00, 0x40, 0x02, 0x40, 0x02, 0x3E, 0xFC, 0x01, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00}, /*"}",93*/
{0x00, 0x00, 0x60, 0x00, 0x80, 0x00, 0x80, 0x00, 0x40, 0x00, 0x40, 0x00,
0x20, 0x00, 0x20, 0x00}, /*"~",94*/
};
// 24*24 ASICII字符集点阵
static const unsigned char sh1106_asc2_2412[95][36] = {
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*" ",0*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0F, 0x80, 0x38,
0x0F, 0xFE, 0x38, 0x0F, 0x80, 0x38, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*"!",1*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
0x06, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x38, 0x00, 0x00,
0x31, 0x00, 0x00, 0x06, 0x00, 0x00, 0x0C, 0x00, 0x00,
0x38, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00}, /*""",2*/
{0x00, 0x00, 0x00, 0x00, 0x61, 0x80, 0x00, 0x67, 0xF8,
0x07, 0xF9, 0x80, 0x00, 0x61, 0x80, 0x00, 0x61, 0x80,
0x00, 0x61, 0x80, 0x00, 0x61, 0x80, 0x00, 0x67, 0xF8,
0x07, 0xF9, 0x80, 0x00, 0x61, 0x80, 0x00, 0x00, 0x00}, /*"#",3*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xC0, 0xE0,
0x03, 0xE0, 0xF0, 0x06, 0x30, 0x08, 0x04, 0x18, 0x08,
0x1F, 0xFF, 0xFE, 0x04, 0x0E, 0x08, 0x07, 0x87, 0xF0,
0x03, 0x81, 0xE0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*"$",4*/
{0x01, 0xF0, 0x00, 0x06, 0x0C, 0x00, 0x04, 0x04, 0x08,
0x06, 0x0C, 0x70, 0x01, 0xF9, 0xC0, 0x00, 0x0E, 0x00,
0x00, 0x3B, 0xE0, 0x00, 0xEC, 0x18, 0x07, 0x08, 0x08,
0x04, 0x0C, 0x18, 0x00, 0x03, 0xE0, 0x00, 0x00, 0x00}, /*"%",5*/
{0x00, 0x01, 0xE0, 0x00, 0x07, 0xF0, 0x03, 0xF8, 0x18,
0x04, 0x1C, 0x08, 0x04, 0x17, 0x08, 0x07, 0xE1, 0xD0,
0x03, 0xC0, 0xE0, 0x00, 0x23, 0xB0, 0x00, 0x3C, 0x08,
0x00, 0x20, 0x08, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00}, /*"&",6*/
{0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x31, 0x00, 0x00,
0x32, 0x00, 0x00, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*"'",7*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7F, 0x00,
0x01, 0xFF, 0xC0, 0x07, 0x80, 0xF0, 0x0C, 0x00, 0x18,
0x10, 0x00, 0x04, 0x20, 0x00, 0x02, 0x00, 0x00, 0x00}, /*"(",8*/
{0x00, 0x00, 0x00, 0x20, 0x00, 0x02, 0x10, 0x00, 0x04,
0x0C, 0x00, 0x18, 0x07, 0x80, 0xF0, 0x01, 0xFF, 0xC0,
0x00, 0x7F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*")",9*/
{0x00, 0x00, 0x00, 0x00, 0x42, 0x00, 0x00, 0x66, 0x00,
0x00, 0x66, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x18, 0x00,
0x03, 0xFF, 0xC0, 0x00, 0x18, 0x00, 0x00, 0x3C, 0x00,
0x00, 0x66, 0x00, 0x00, 0x66, 0x00, 0x00, 0x42, 0x00}, /*"*",10*/
{0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x08, 0x00,
0x00, 0x08, 0x00, 0x00, 0x08, 0x00, 0x00, 0x08, 0x00,
0x01, 0xFF, 0xC0, 0x00, 0x08, 0x00, 0x00, 0x08, 0x00,
0x00, 0x08, 0x00, 0x00, 0x08, 0x00, 0x00, 0x08, 0x00}, /*"+",11*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x31,
0x00, 0x00, 0x32, 0x00, 0x00, 0x1C, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*",",12*/
{0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x08, 0x00,
0x00, 0x08, 0x00, 0x00, 0x08, 0x00, 0x00, 0x08, 0x00,
0x00, 0x08, 0x00, 0x00, 0x08, 0x00, 0x00, 0x08, 0x00,
0x00, 0x08, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00}, /*"-",13*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38,
0x00, 0x00, 0x38, 0x00, 0x00, 0x38, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*".",14*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x1C,
0x00, 0x00, 0x70, 0x00, 0x01, 0x80, 0x00, 0x0E, 0x00,
0x00, 0x38, 0x00, 0x00, 0xC0, 0x00, 0x07, 0x00, 0x00,
0x1C, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00}, /*"/",15*/
{0x00, 0x00, 0x00, 0x00, 0x7F, 0x80, 0x01, 0xFF, 0xE0,
0x03, 0x80, 0x70, 0x06, 0x00, 0x18, 0x04, 0x00, 0x08,
0x04, 0x00, 0x08, 0x06, 0x00, 0x18, 0x03, 0x80, 0x70,
0x01, 0xFF, 0xE0, 0x00, 0x7F, 0x80, 0x00, 0x00, 0x00}, /*"0",16*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x08,
0x01, 0x00, 0x08, 0x01, 0x00, 0x08, 0x03, 0xFF, 0xF8,
0x07, 0xFF, 0xF8, 0x00, 0x00, 0x08, 0x00, 0x00, 0x08,
0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*"1",17*/
{0x00, 0x00, 0x00, 0x01, 0xC0, 0x38, 0x02, 0xC0, 0x58,
0x04, 0x00, 0x98, 0x04, 0x01, 0x18, 0x04, 0x02, 0x18,
0x04, 0x04, 0x18, 0x06, 0x1C, 0x18, 0x03, 0xF8, 0x18,
0x01, 0xE0, 0xF8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*"2",18*/
{0x00, 0x00, 0x00, 0x01, 0xC0, 0xE0, 0x03, 0xC0, 0xF0,
0x04, 0x00, 0x08, 0x04, 0x08, 0x08, 0x04, 0x08, 0x08,
0x06, 0x18, 0x08, 0x03, 0xF4, 0x18, 0x01, 0xE7, 0xF0,
0x00, 0x01, 0xE0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*"3",19*/
{0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x0D, 0x00,
0x00, 0x11, 0x00, 0x00, 0x61, 0x00, 0x00, 0x81, 0x08,
0x03, 0x01, 0x08, 0x07, 0xFF, 0xF8, 0x0F, 0xFF, 0xF8,
0x00, 0x01, 0x08, 0x00, 0x01, 0x08, 0x00, 0x00, 0x00}, /*"4",20*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x07, 0xFC, 0xD0,
0x06, 0x08, 0x08, 0x06, 0x10, 0x08, 0x06, 0x10, 0x08,
0x06, 0x10, 0x08, 0x06, 0x18, 0x38, 0x06, 0x0F, 0xF0,
0x06, 0x07, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*"5",21*/
{0x00, 0x00, 0x00, 0x00, 0x3F, 0x80, 0x01, 0xFF, 0xE0,
0x03, 0x84, 0x30, 0x02, 0x08, 0x18, 0x04, 0x10, 0x08,
0x04, 0x10, 0x08, 0x04, 0x10, 0x08, 0x07, 0x18, 0x10,
0x03, 0x0F, 0xF0, 0x00, 0x07, 0xC0, 0x00, 0x00, 0x00}, /*"6",22*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0xC0, 0x00,
0x07, 0x00, 0x00, 0x06, 0x00, 0x00, 0x06, 0x00, 0xF8,
0x06, 0x07, 0xF8, 0x06, 0x18, 0x00, 0x06, 0xE0, 0x00,
0x07, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00}, /*"7",23*/
{0x00, 0x00, 0x00, 0x01, 0xE1, 0xE0, 0x03, 0xF7, 0xF0,
0x06, 0x34, 0x10, 0x04, 0x18, 0x08, 0x04, 0x18, 0x08,
0x04, 0x0C, 0x08, 0x04, 0x0C, 0x08, 0x06, 0x16, 0x18,
0x03, 0xF3, 0xF0, 0x01, 0xC1, 0xE0, 0x00, 0x00, 0x00}, /*"8",24*/
{0x00, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x03, 0xFC, 0x30,
0x03, 0x06, 0x38, 0x04, 0x02, 0x08, 0x04, 0x02, 0x08,
0x04, 0x02, 0x08, 0x04, 0x04, 0x10, 0x03, 0x08, 0xF0,
0x01, 0xFF, 0xC0, 0x00, 0x7F, 0x00, 0x00, 0x00, 0x00}, /*"9",25*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x38,
0x00, 0x70, 0x38, 0x00, 0x70, 0x38, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*":",26*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x1A,
0x00, 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*";",27*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00,
0x00, 0x14, 0x00, 0x00, 0x22, 0x00, 0x00, 0x41, 0x00,
0x00, 0x80, 0x80, 0x01, 0x00, 0x40, 0x02, 0x00, 0x20,
0x04, 0x00, 0x10, 0x08, 0x00, 0x08, 0x00, 0x00, 0x00}, /*"<",28*/
{0x00, 0x00, 0x00, 0x00, 0x21, 0x00, 0x00, 0x21, 0x00,
0x00, 0x21, 0x00, 0x00, 0x21, 0x00, 0x00, 0x21, 0x00,
0x00, 0x21, 0x00, 0x00, 0x21, 0x00, 0x00, 0x21, 0x00,
0x00, 0x21, 0x00, 0x00, 0x21, 0x00, 0x00, 0x00, 0x00}, /*"=",29*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x08,
0x04, 0x00, 0x10, 0x02, 0x00, 0x20, 0x01, 0x00, 0x40,
0x00, 0x80, 0x80, 0x00, 0x41, 0x00, 0x00, 0x22, 0x00,
0x00, 0x14, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00}, /*">",30*/
{0x00, 0x00, 0x00, 0x03, 0xC0, 0x00, 0x04, 0xC0, 0x00,
0x04, 0x00, 0x00, 0x08, 0x00, 0x38, 0x08, 0x0F, 0x38,
0x08, 0x08, 0x38, 0x08, 0x10, 0x00, 0x0C, 0x30, 0x00,
0x07, 0xE0, 0x00, 0x03, 0xC0, 0x00, 0x00, 0x00, 0x00}, /*"?",31*/
{0x00, 0x00, 0x00, 0x00, 0x3F, 0x80, 0x00, 0xFF, 0xE0,
0x03, 0x80, 0x70, 0x02, 0x0F, 0x10, 0x06, 0x70, 0x88,
0x04, 0xC0, 0x88, 0x04, 0x83, 0x08, 0x04, 0x7F, 0x88,
0x02, 0xC0, 0x90, 0x03, 0x01, 0x20, 0x00, 0xFE, 0x40}, /*"@",32*/
{0x00, 0x00, 0x08, 0x00, 0x00, 0x18, 0x00, 0x01, 0xF8,
0x00, 0x3E, 0x08, 0x01, 0xC2, 0x00, 0x07, 0x02, 0x00,
0x07, 0xE2, 0x00, 0x00, 0xFE, 0x00, 0x00, 0x1F, 0xC8,
0x00, 0x01, 0xF8, 0x00, 0x00, 0x38, 0x00, 0x00, 0x08}, /*"A",33*/
{0x04, 0x00, 0x08, 0x07, 0xFF, 0xF8, 0x07, 0xFF, 0xF8,
0x04, 0x08, 0x08, 0x04, 0x08, 0x08, 0x04, 0x08, 0x08,
0x04, 0x08, 0x08, 0x06, 0x18, 0x08, 0x03, 0xF4, 0x18,
0x01, 0xE7, 0xF0, 0x00, 0x01, 0xE0, 0x00, 0x00, 0x00}, /*"B",34*/
{0x00, 0x00, 0x00, 0x00, 0x3F, 0x80, 0x01, 0xFF, 0xE0,
0x03, 0x80, 0x70, 0x02, 0x00, 0x18, 0x04, 0x00, 0x08,
0x04, 0x00, 0x08, 0x04, 0x00, 0x08, 0x04, 0x00, 0x10,
0x06, 0x00, 0x20, 0x07, 0x80, 0xC0, 0x00, 0x00, 0x00}, /*"C",35*/
{0x04, 0x00, 0x08, 0x07, 0xFF, 0xF8, 0x07, 0xFF, 0xF8,
0x04, 0x00, 0x08, 0x04, 0x00, 0x08, 0x04, 0x00, 0x08,
0x04, 0x00, 0x18, 0x02, 0x00, 0x10, 0x03, 0x80, 0x70,
0x01, 0xFF, 0xE0, 0x00, 0x7F, 0x80, 0x00, 0x00, 0x00}, /*"D",36*/
{0x04, 0x00, 0x08, 0x07, 0xFF, 0xF8, 0x07, 0xFF, 0xF8,
0x04, 0x08, 0x08, 0x04, 0x08, 0x08, 0x04, 0x08, 0x08,
0x04, 0x08, 0x08, 0x04, 0x3E, 0x08, 0x04, 0x00, 0x08,
0x06, 0x00, 0x18, 0x01, 0x00, 0x60, 0x00, 0x00, 0x00}, /*"E",37*/
{0x04, 0x00, 0x08, 0x07, 0xFF, 0xF8, 0x07, 0xFF, 0xF8,
0x04, 0x08, 0x08, 0x04, 0x08, 0x00, 0x04, 0x08, 0x00,
0x04, 0x08, 0x00, 0x04, 0x3E, 0x00, 0x06, 0x00, 0x00,
0x06, 0x00, 0x00, 0x01, 0x80, 0x00, 0x00, 0x00, 0x00}, /*"F",38*/
{0x00, 0x00, 0x00, 0x00, 0x3F, 0x80, 0x01, 0xFF, 0xE0,
0x03, 0x80, 0x70, 0x06, 0x00, 0x18, 0x04, 0x00, 0x08,
0x04, 0x02, 0x08, 0x04, 0x02, 0x08, 0x02, 0x03, 0xF0,
0x07, 0x83, 0xF0, 0x00, 0x02, 0x00, 0x00, 0x02, 0x00}, /*"G",39*/
{0x04, 0x00, 0x08, 0x07, 0xFF, 0xF8, 0x07, 0xFF, 0xF8,
0x04, 0x08, 0x08, 0x00, 0x08, 0x00, 0x00, 0x08, 0x00,
0x00, 0x08, 0x00, 0x00, 0x08, 0x00, 0x04, 0x08, 0x08,
0x07, 0xFF, 0xF8, 0x07, 0xFF, 0xF8, 0x04, 0x00, 0x08}, /*"H",40*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x08,
0x04, 0x00, 0x08, 0x04, 0x00, 0x08, 0x07, 0xFF, 0xF8,
0x07, 0xFF, 0xF8, 0x04, 0x00, 0x08, 0x04, 0x00, 0x08,
0x04, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*"I",41*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x07,
0x00, 0x00, 0x01, 0x04, 0x00, 0x01, 0x04, 0x00, 0x01,
0x04, 0x00, 0x03, 0x07, 0xFF, 0xFE, 0x07, 0xFF, 0xFC,
0x04, 0x00, 0x00, 0x04, 0x00, 0x00, 0x04, 0x00, 0x00}, /*"J",42*/
{0x04, 0x00, 0x08, 0x07, 0xFF, 0xF8, 0x07, 0xFF, 0xF8,
0x04, 0x0C, 0x08, 0x00, 0x18, 0x00, 0x00, 0x3E, 0x00,
0x04, 0xC7, 0x80, 0x05, 0x03, 0xC8, 0x06, 0x00, 0xF8,
0x04, 0x00, 0x38, 0x04, 0x00, 0x18, 0x00, 0x00, 0x08}, /*"K",43*/
{0x04, 0x00, 0x08, 0x07, 0xFF, 0xF8, 0x07, 0xFF, 0xF8,
0x04, 0x00, 0x08, 0x00, 0x00, 0x08, 0x00, 0x00, 0x08,
0x00, 0x00, 0x08, 0x00, 0x00, 0x08, 0x00, 0x00, 0x08,
0x00, 0x00, 0x18, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00}, /*"L",44*/
{0x04, 0x00, 0x08, 0x07, 0xFF, 0xF8, 0x07, 0x80, 0x08,
0x07, 0xFC, 0x00, 0x00, 0x7F, 0xC0, 0x00, 0x03, 0xF8,
0x00, 0x07, 0xC0, 0x00, 0x78, 0x00, 0x07, 0x80, 0x08,
0x07, 0xFF, 0xF8, 0x07, 0xFF, 0xF8, 0x04, 0x00, 0x08}, /*"M",45*/
{0x04, 0x00, 0x08, 0x07, 0xFF, 0xF8, 0x07, 0x00, 0x08,
0x03, 0xC0, 0x00, 0x00, 0xE0, 0x00, 0x00, 0x38, 0x00,
0x00, 0x1E, 0x00, 0x00, 0x07, 0x00, 0x00, 0x01, 0xC0,
0x04, 0x00, 0xF0, 0x07, 0xFF, 0xF8, 0x04, 0x00, 0x00}, /*"N",46*/
{0x00, 0x00, 0x00, 0x00, 0x7F, 0x80, 0x01, 0xFF, 0xE0,
0x03, 0x80, 0x70, 0x06, 0x00, 0x18, 0x04, 0x00, 0x08,
0x04, 0x00, 0x08, 0x06, 0x00, 0x18, 0x03, 0x00, 0x30,
0x01, 0xFF, 0xE0, 0x00, 0x7F, 0x80, 0x00, 0x00, 0x00}, /*"O",47*/
{0x04, 0x00, 0x08, 0x07, 0xFF, 0xF8, 0x07, 0xFF, 0xF8,
0x04, 0x04, 0x08, 0x04, 0x04, 0x00, 0x04, 0x04, 0x00,
0x04, 0x04, 0x00, 0x04, 0x04, 0x00, 0x06, 0x0C, 0x00,
0x03, 0xF8, 0x00, 0x01, 0xF0, 0x00, 0x00, 0x00, 0x00}, /*"P",48*/
{0x00, 0x00, 0x00, 0x00, 0x7F, 0x80, 0x01, 0xFF, 0xE0,
0x03, 0x80, 0x70, 0x06, 0x00, 0x88, 0x04, 0x00, 0x88,
0x04, 0x00, 0xC8, 0x06, 0x00, 0x3C, 0x03, 0x00, 0x3E,
0x01, 0xFF, 0xE6, 0x00, 0x7F, 0x84, 0x00, 0x00, 0x00}, /*"Q",49*/
{0x04, 0x00, 0x08, 0x07, 0xFF, 0xF8, 0x07, 0xFF, 0xF8,
0x04, 0x08, 0x08, 0x04, 0x08, 0x00, 0x04, 0x0C, 0x00,
0x04, 0x0F, 0x00, 0x04, 0x0B, 0xC0, 0x06, 0x10, 0xF0,
0x03, 0xF0, 0x38, 0x01, 0xE0, 0x08, 0x00, 0x00, 0x08}, /*"R",50*/
{0x00, 0x00, 0x00, 0x01, 0xE0, 0xF8, 0x03, 0xF0, 0x30,
0x06, 0x30, 0x10, 0x04, 0x18, 0x08, 0x04, 0x18, 0x08,
0x04, 0x0C, 0x08, 0x04, 0x0C, 0x08, 0x02, 0x06, 0x18,
0x02, 0x07, 0xF0, 0x07, 0x81, 0xE0, 0x00, 0x00, 0x00}, /*"S",51*/
{0x01, 0x80, 0x00, 0x06, 0x00, 0x00, 0x04, 0x00, 0x00,
0x04, 0x00, 0x00, 0x04, 0x00, 0x08, 0x07, 0xFF, 0xF8,
0x07, 0xFF, 0xF8, 0x04, 0x00, 0x08, 0x04, 0x00, 0x00,
0x04, 0x00, 0x00, 0x06, 0x00, 0x00, 0x01, 0x80, 0x00}, /*"T",52*/
{0x04, 0x00, 0x00, 0x07, 0xFF, 0xE0, 0x07, 0xFF, 0xF0,
0x04, 0x00, 0x18, 0x00, 0x00, 0x08, 0x00, 0x00, 0x08,
0x00, 0x00, 0x08, 0x00, 0x00, 0x08, 0x00, 0x00, 0x08,
0x04, 0x00, 0x10, 0x07, 0xFF, 0xE0, 0x04, 0x00, 0x00}, /*"U",53*/
{0x04, 0x00, 0x00, 0x06, 0x00, 0x00, 0x07, 0xE0, 0x00,
0x07, 0xFE, 0x00, 0x04, 0x1F, 0xE0, 0x00, 0x01, 0xF8,
0x00, 0x00, 0x38, 0x00, 0x01, 0xE0, 0x04, 0x3E, 0x00,
0x07, 0xC0, 0x00, 0x06, 0x00, 0x00, 0x04, 0x00, 0x00}, /*"V",54*/
{0x04, 0x00, 0x00, 0x07, 0xE0, 0x00, 0x07, 0xFF, 0xC0,
0x04, 0x1F, 0xF8, 0x00, 0x07, 0xC0, 0x07, 0xF8, 0x00,
0x07, 0xFF, 0x80, 0x04, 0x3F, 0xF8, 0x00, 0x07, 0xC0,
0x04, 0xF8, 0x00, 0x07, 0x00, 0x00, 0x04, 0x00, 0x00}, /*"W",55*/
{0x00, 0x00, 0x00, 0x04, 0x00, 0x08, 0x06, 0x00, 0x18,
0x07, 0xC0, 0x78, 0x05, 0xF1, 0xC8, 0x00, 0x3E, 0x00,
0x00, 0x1F, 0x80, 0x04, 0x63, 0xE8, 0x07, 0x80, 0xF8,
0x06, 0x00, 0x18, 0x04, 0x00, 0x08, 0x00, 0x00, 0x00}, /*"X",56*/
{0x04, 0x00, 0x00, 0x06, 0x00, 0x00, 0x07, 0x80, 0x00,
0x07, 0xE0, 0x08, 0x04, 0x7C, 0x08, 0x00, 0x1F, 0xF8,
0x00, 0x07, 0xF8, 0x00, 0x18, 0x08, 0x04, 0xE0, 0x08,
0x07, 0x00, 0x00, 0x06, 0x00, 0x00, 0x04, 0x00, 0x00}, /*"Y",57*/
{0x00, 0x00, 0x00, 0x01, 0x00, 0x08, 0x06, 0x00, 0x38,
0x04, 0x00, 0xF8, 0x04, 0x03, 0xE8, 0x04, 0x0F, 0x08,
0x04, 0x7C, 0x08, 0x05, 0xF0, 0x08, 0x07, 0xC0, 0x08,
0x07, 0x00, 0x18, 0x04, 0x00, 0x60, 0x00, 0x00, 0x00}, /*"Z",58*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, 0xFF, 0xFE,
0x20, 0x00, 0x02, 0x20, 0x00, 0x02, 0x20, 0x00, 0x02,
0x20, 0x00, 0x02, 0x20, 0x00, 0x02, 0x00, 0x00, 0x00}, /*"[",59*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00,
0x07, 0x00, 0x00, 0x00, 0xC0, 0x00, 0x00, 0x38, 0x00,
0x00, 0x06, 0x00, 0x00, 0x01, 0xC0, 0x00, 0x00, 0x30,
0x00, 0x00, 0x0E, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00}, /*"\",60*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x02,
0x20, 0x00, 0x02, 0x20, 0x00, 0x02, 0x20, 0x00, 0x02,
0x20, 0x00, 0x02, 0x3F, 0xFF, 0xFE, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*"]",61*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x08, 0x00, 0x00, 0x10, 0x00, 0x00, 0x30, 0x00, 0x00,
0x20, 0x00, 0x00, 0x30, 0x00, 0x00, 0x10, 0x00, 0x00,
0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*"^",62*/
{0x00, 0x00, 0x01, 0x00, 0x00, 0x01, 0x00, 0x00, 0x01,
0x00, 0x00, 0x01, 0x00, 0x00, 0x01, 0x00, 0x00, 0x01,
0x00, 0x00, 0x01, 0x00, 0x00, 0x01, 0x00, 0x00, 0x01,
0x00, 0x00, 0x01, 0x00, 0x00, 0x01, 0x00, 0x00, 0x01}, /*"_",63*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x20, 0x00, 0x00, 0x20, 0x00, 0x00, 0x10, 0x00, 0x00,
0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*"`",64*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0xF0, 0x00, 0x19, 0xF8,
0x00, 0x1B, 0x18, 0x00, 0x22, 0x08, 0x00, 0x26, 0x08,
0x00, 0x24, 0x08, 0x00, 0x24, 0x10, 0x00, 0x3F, 0xF8,
0x00, 0x1F, 0xF8, 0x00, 0x00, 0x08, 0x00, 0x00, 0x18}, /*"a",65*/
{0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x07, 0xFF, 0xF8,
0x0F, 0xFF, 0xF0, 0x00, 0x18, 0x18, 0x00, 0x10, 0x08,
0x00, 0x20, 0x08, 0x00, 0x20, 0x08, 0x00, 0x30, 0x18,
0x00, 0x1F, 0xF0, 0x00, 0x0F, 0xC0, 0x00, 0x00, 0x00}, /*"b",66*/
{0x00, 0x00, 0x00, 0x00, 0x07, 0xC0, 0x00, 0x1F, 0xF0,
0x00, 0x18, 0x30, 0x00, 0x20, 0x08, 0x00, 0x20, 0x08,
0x00, 0x20, 0x08, 0x00, 0x3C, 0x08, 0x00, 0x1C, 0x10,
0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*"c",67*/
{0x00, 0x00, 0x00, 0x00, 0x07, 0xC0, 0x00, 0x1F, 0xF0,
0x00, 0x38, 0x18, 0x00, 0x20, 0x08, 0x00, 0x20, 0x08,
0x00, 0x20, 0x08, 0x04, 0x10, 0x10, 0x07, 0xFF, 0xF8,
0x0F, 0xFF, 0xF0, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00}, /*"d",68*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0xC0,
0x00, 0x1F, 0xF0, 0x00, 0x12, 0x30, 0x00, 0x22, 0x18,
0x00, 0x22, 0x08, 0x00, 0x22, 0x08, 0x00, 0x32, 0x08,
0x00, 0x1E, 0x10, 0x00, 0x0E, 0x20, 0x00, 0x00, 0x00}, /*"e",69*/
{0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x20, 0x08,
0x00, 0x20, 0x08, 0x01, 0xFF, 0xF8, 0x03, 0xFF, 0xF8,
0x06, 0x20, 0x08, 0x04, 0x20, 0x08, 0x04, 0x20, 0x08,
0x07, 0x20, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00}, /*"f",70*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x0E, 0x6E,
0x00, 0x1F, 0xF3, 0x00, 0x31, 0xB1, 0x00, 0x20, 0xB1,
0x00, 0x20, 0xB1, 0x00, 0x31, 0x91, 0x00, 0x1F, 0x13,
0x00, 0x2E, 0x1E, 0x00, 0x20, 0x0E, 0x00, 0x30, 0x00}, /*"g",71*/
{0x00, 0x00, 0x00, 0x04, 0x00, 0x08, 0x07, 0xFF, 0xF8,
0x0F, 0xFF, 0xF8, 0x00, 0x10, 0x08, 0x00, 0x20, 0x00,
0x00, 0x20, 0x00, 0x00, 0x20, 0x08, 0x00, 0x3F, 0xF8,
0x00, 0x1F, 0xF8, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00}, /*"h",72*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x08,
0x00, 0x20, 0x08, 0x00, 0x20, 0x08, 0x06, 0x3F, 0xF8,
0x06, 0x3F, 0xF8, 0x00, 0x00, 0x08, 0x00, 0x00, 0x08,
0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*"i",73*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03,
0x00, 0x00, 0x03, 0x00, 0x20, 0x01, 0x00, 0x20, 0x01,
0x00, 0x20, 0x03, 0x06, 0x3F, 0xFE, 0x06, 0x3F, 0xFC,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*"j",74*/
{0x00, 0x00, 0x00, 0x04, 0x00, 0x08, 0x07, 0xFF, 0xF8,
0x0F, 0xFF, 0xF8, 0x00, 0x01, 0x88, 0x00, 0x03, 0x00,
0x00, 0x2F, 0xC0, 0x00, 0x38, 0xF8, 0x00, 0x20, 0x38,
0x00, 0x20, 0x08, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00}, /*"k",75*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x08,
0x04, 0x00, 0x08, 0x04, 0x00, 0x08, 0x07, 0xFF, 0xF8,
0x0F, 0xFF, 0xF8, 0x00, 0x00, 0x08, 0x00, 0x00, 0x08,
0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*"l",76*/
{0x00, 0x20, 0x08, 0x00, 0x3F, 0xF8, 0x00, 0x3F, 0xF8,
0x00, 0x10, 0x08, 0x00, 0x20, 0x00, 0x00, 0x3F, 0xF8,
0x00, 0x3F, 0xF8, 0x00, 0x10, 0x08, 0x00, 0x20, 0x00,
0x00, 0x3F, 0xF8, 0x00, 0x3F, 0xF8, 0x00, 0x00, 0x08}, /*"m",77*/
{0x00, 0x00, 0x00, 0x00, 0x20, 0x08, 0x00, 0x3F, 0xF8,
0x00, 0x3F, 0xF8, 0x00, 0x10, 0x08, 0x00, 0x10, 0x00,
0x00, 0x20, 0x00, 0x00, 0x20, 0x08, 0x00, 0x3F, 0xF8,
0x00, 0x1F, 0xF8, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00}, /*"n",78*/
{0x00, 0x00, 0x00, 0x00, 0x07, 0xC0, 0x00, 0x0F, 0xF0,
0x00, 0x18, 0x30, 0x00, 0x30, 0x08, 0x00, 0x20, 0x08,
0x00, 0x20, 0x08, 0x00, 0x30, 0x08, 0x00, 0x18, 0x30,
0x00, 0x0F, 0xF0, 0x00, 0x07, 0xC0, 0x00, 0x00, 0x00}, /*"o",79*/
{0x00, 0x00, 0x00, 0x00, 0x20, 0x01, 0x00, 0x3F, 0xFF,
0x00, 0x3F, 0xFF, 0x00, 0x10, 0x11, 0x00, 0x20, 0x09,
0x00, 0x20, 0x08, 0x00, 0x20, 0x08, 0x00, 0x30, 0x38,
0x00, 0x1F, 0xF0, 0x00, 0x0F, 0xC0, 0x00, 0x00, 0x00}, /*"p",80*/
{0x00, 0x00, 0x00, 0x00, 0x07, 0xC0, 0x00, 0x1F, 0xF0,
0x00, 0x38, 0x18, 0x00, 0x20, 0x08, 0x00, 0x20, 0x08,
0x00, 0x20, 0x09, 0x00, 0x10, 0x11, 0x00, 0x1F, 0xFF,
0x00, 0x3F, 0xFF, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00}, /*"q",81*/
{0x00, 0x20, 0x08, 0x00, 0x20, 0x08, 0x00, 0x20, 0x08,
0x00, 0x3F, 0xF8, 0x00, 0x3F, 0xF8, 0x00, 0x08, 0x08,
0x00, 0x10, 0x08, 0x00, 0x20, 0x08, 0x00, 0x20, 0x00,
0x00, 0x30, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00}, /*"r",82*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x78,
0x00, 0x1E, 0x18, 0x00, 0x33, 0x08, 0x00, 0x23, 0x08,
0x00, 0x21, 0x08, 0x00, 0x21, 0x88, 0x00, 0x21, 0x98,
0x00, 0x30, 0xF0, 0x00, 0x38, 0x60, 0x00, 0x00, 0x00}, /*"s",83*/
{0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x20, 0x00,
0x00, 0x20, 0x00, 0x00, 0xFF, 0xF0, 0x03, 0xFF, 0xF8,
0x00, 0x20, 0x08, 0x00, 0x20, 0x08, 0x00, 0x20, 0x08,
0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*"t",84*/
{0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x3F, 0xF0,
0x00, 0x7F, 0xF8, 0x00, 0x00, 0x18, 0x00, 0x00, 0x08,
0x00, 0x00, 0x08, 0x00, 0x20, 0x10, 0x00, 0x3F, 0xF8,
0x00, 0x7F, 0xF0, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00}, /*"u",85*/
{0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x30, 0x00,
0x00, 0x3C, 0x00, 0x00, 0x3F, 0x80, 0x00, 0x23, 0xF0,
0x00, 0x00, 0x78, 0x00, 0x00, 0x70, 0x00, 0x23, 0x80,
0x00, 0x3C, 0x00, 0x00, 0x30, 0x00, 0x00, 0x20, 0x00}, /*"v",86*/
{0x00, 0x20, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x3F, 0xE0,
0x00, 0x23, 0xF8, 0x00, 0x00, 0xE0, 0x00, 0x27, 0x00,
0x00, 0x3E, 0x00, 0x00, 0x3F, 0xE0, 0x00, 0x21, 0xF8,
0x00, 0x01, 0xE0, 0x00, 0x3E, 0x00, 0x00, 0x20, 0x00}, /*"w",87*/
{0x00, 0x00, 0x00, 0x00, 0x20, 0x08, 0x00, 0x20, 0x08,
0x00, 0x38, 0x38, 0x00, 0x3E, 0x68, 0x00, 0x27, 0x80,
0x00, 0x03, 0xC8, 0x00, 0x2C, 0xF8, 0x00, 0x38, 0x38,
0x00, 0x20, 0x18, 0x00, 0x20, 0x08, 0x00, 0x00, 0x00}, /*"x",88*/
{0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x30, 0x03,
0x00, 0x3C, 0x01, 0x00, 0x3F, 0x83, 0x00, 0x23, 0xEC,
0x00, 0x00, 0x70, 0x00, 0x23, 0x80, 0x00, 0x3C, 0x00,
0x00, 0x20, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00}, /*"y",89*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x08,
0x00, 0x20, 0x38, 0x00, 0x20, 0xF8, 0x00, 0x23, 0xE8,
0x00, 0x2F, 0x88, 0x00, 0x3E, 0x08, 0x00, 0x38, 0x08,
0x00, 0x20, 0x18, 0x00, 0x00, 0x70, 0x00, 0x00, 0x00}, /*"z",90*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00,
0x00, 0x14, 0x00, 0x1F, 0xF7, 0xFC, 0x30, 0x00, 0x06,
0x20, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*"{",91*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*"|",92*/
{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x02,
0x30, 0x00, 0x06, 0x1F, 0xF7, 0xFC, 0x00, 0x14, 0x00,
0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*"}",93*/
{0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x60, 0x00, 0x00,
0x40, 0x00, 0x00, 0x40, 0x00, 0x00, 0x20, 0x00, 0x00,
0x10, 0x00, 0x00, 0x08, 0x00, 0x00, 0x04, 0x00, 0x00,
0x04, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x10, 0x00, 0x00}, /*"~",94*/
};
#endif
| YifuLiu/AliOS-Things | components/drivers/external_device/sh1106/include/font.h | C | apache-2.0 | 44,511 |
/*
* Copyright (C) 2015-2021 Alibaba Group Holding Limited
*/
#ifndef __ICON_H__
#define __ICON_H__
#include <stdio.h>
typedef struct {
uint8_t *p_icon_data;
uint16_t width;
uint16_t height;
uint8_t *p_icon_mask;
} icon_t;
// 由于不同扫描方式得到的结果不一样 有的可能是一维数组有的可能是二维
// 很麻烦做抽象 先统一使用列行式吧 可以搞一个枚举 根据不同扫描方式
// 通过像素长宽计算数组长宽和访问方式 增加了p_icon_mask
// 用于绘制透明图象时提供遮罩
#endif
| YifuLiu/AliOS-Things | components/drivers/external_device/sh1106/include/icon.h | C | apache-2.0 | 568 |
/*
* Copyright (C) 2015-2021 Alibaba Group Holding Limited
*/
#ifndef SENSORS_SH1106_H
#define SENSORS_SH1106_H
#include "font.h"
#include "icon.h"
uint8_t sh1106_init(void);
void OLED_Refresh_GRAM(void);
void OLED_Clear(void);
void OLED_Full(void);
void OLED_DrawPoint(int16_t x, int16_t y, uint8_t mode);
void OLED_DrawLine(int16_t x0, int16_t y0, int16_t x1, int16_t y1, uint8_t mode);
void OLED_DrawVerticalLine(uint8_t x, uint8_t y, uint8_t length, uint8_t mode);
void OLED_DrawHorizontalLine(uint8_t x, uint8_t y, uint8_t length, uint8_t mode);
void OLED_DrawRect(uint8_t x, uint8_t y, uint8_t width, uint8_t height, uint8_t mode);
void OLED_FillRect(uint8_t xMove, uint8_t yMove, uint8_t width, uint8_t height, uint8_t mode);
void OLED_DrawCircle(uint8_t x0, uint8_t y0, uint8_t radius, uint8_t width, uint8_t mode);
void OLED_FillCircle(uint8_t x0, uint8_t y0, uint8_t r, uint8_t mode);
void OLED_Show_Char(uint8_t x, uint8_t y, uint8_t chr, uint8_t size, uint8_t mode);
void OLED_Icon_Draw(int16_t x, int16_t y, icon_t *icon, uint8_t mode);
void OLED_test(int flag);
void sh1106_show_string(uint8_t x, uint8_t y, const uint8_t *p, uint8_t size, uint8_t mode);
void OLED_Show_String(uint8_t x, uint8_t y, const uint8_t *p, uint8_t size, uint8_t mode);
#endif
| YifuLiu/AliOS-Things | components/drivers/external_device/sh1106/include/sh1106.h | C | apache-2.0 | 1,271 |
/*
* Copyright (C) 2015-2021 Alibaba Group Holding Limited
*/
#ifndef _SH1106_HDCONFIG_H
#define _SH1106_HDCONFIG_H
#if USE_SOFT_SPI == 1
#ifdef BOARD_HAASEDUK1
#define OLED_CLK_PIN HAL_IOMUX_PIN_P3_7
#define OLED_SDA_PIN HAL_IOMUX_PIN_P3_5
#define OLED_RES_PIN HAL_IOMUX_PIN_P3_6
#define OLED_DC_PIN HAL_IOMUX_PIN_P3_4
#else
#define OLED_CLK_PIN HAL_IOMUX_PIN_P0_5
#define OLED_SDA_PIN HAL_IOMUX_PIN_P4_0
#define OLED_RES_PIN HAL_IOMUX_PIN_P4_1
#define OLED_DC_PIN HAL_IOMUX_PIN_P2_7
#endif
#else
#define HARD_SPI_PORT 1
#define SPI1_DC_PIN HAL_IOMUX_PIN_P3_4
#define SPI1_RESET_PIN HAL_IOMUX_PIN_P3_6
#endif
#endif | YifuLiu/AliOS-Things | components/drivers/external_device/sh1106/include/sh1106_hdconfig.h | C | apache-2.0 | 649 |
/*
* Copyright (C) 2015-2021 Alibaba Group Holding Limited
*/
#include "sh1106.h"
#include "aos/hal/gpio.h"
#include "aos/hal/spi.h"
#include "hal_iomux_haas1000.h"
#include "ulog/ulog.h"
#include "sh1106_hdconfig.h"
#include <math.h>
#include <stdio.h>
#include <time.h>
#if USE_SOFT_SPI == 1
#include <sys/ioctl.h>
#include <vfsdev/gpio_dev.h>
#include <drivers/char/u_device.h>
#include <drivers/u_ld.h>
#include "aos/vfs.h"
static int fd = 0;
#endif
#define OLED_PAGE_SIZES 132
#define SPI_MAX_BLOCK 60000
#define PI 3.1415926535
uint8_t OLED_GRAM[8][OLED_PAGE_SIZES];
uint8_t oled_remote_buffer[8 * OLED_PAGE_SIZES * 2];
static spi_dev_t spi_sh1106 = {0};
static gpio_dev_t gpio_sh1106_dc;
static gpio_dev_t gpio_sh1106_reset;
struct timeval tv;
#if USE_SOFT_SPI == 0
static inline void spi_write(const void *data, uint32_t size)
{
if (size > SPI_MAX_BLOCK) {
uint32_t rest = size;
uint32_t start = 0;
while (rest > SPI_MAX_BLOCK) {
hal_spi_send(&spi_sh1106, (const void *)(data + start),
SPI_MAX_BLOCK, 10);
start += SPI_MAX_BLOCK;
rest -= SPI_MAX_BLOCK;
}
hal_spi_send(&spi_sh1106, (const void *)(data + start), rest, 10);
} else {
hal_spi_send(&spi_sh1106, (const void *)data, (uint16_t)size, 10);
}
}
static inline int OLED_GPIO_Init()
{
// printf("hardware_init START\r\n");
gpio_sh1106_dc.port = SPI1_DC_PIN;
gpio_sh1106_dc.config = OUTPUT_PUSH_PULL;
hal_gpio_init(&gpio_sh1106_dc);
gpio_sh1106_reset.port = SPI1_RESET_PIN;
gpio_sh1106_reset.config = OUTPUT_PUSH_PULL;
hal_gpio_init(&gpio_sh1106_reset);
hal_gpio_output_high(&gpio_sh1106_dc);
hal_gpio_output_low(&gpio_sh1106_reset);
aos_msleep(1000);
hal_gpio_output_high(&gpio_sh1106_reset);
// printf("hal_gpio_init done\r\n");
return 0;
}
static inline int OLED_SPI_Init()
{
spi_sh1106.port = 1;
spi_sh1106.config.mode = SPI_WORK_MODE_3; // CPOL = 1; CPHA = 1
spi_sh1106.config.freq = 26000000;
spi_sh1106.config.role = SPI_ROLE_MASTER;
spi_sh1106.config.firstbit = SPI_FIRSTBIT_MSB;
spi_sh1106.config.t_mode = SPI_TRANSFER_NORMAL;
spi_sh1106.config.serial_len = 8;
spi_sh1106.config.data_size = SPI_DATA_SIZE_8BIT;
spi_sh1106.config.cs = SPI_CS_DIS;
hal_spi_init(&spi_sh1106);
printf("hal_spi_init done\r\n");
return 0;
}
static inline void write_command(uint8_t c)
{
hal_gpio_output_low(&gpio_sh1106_dc);
spi_write(&c, sizeof(c));
hal_gpio_output_high(&gpio_sh1106_dc);
}
static inline void write_data(uint8_t d)
{
hal_gpio_output_high(&gpio_sh1106_dc);
spi_write(&d, sizeof(d));
hal_gpio_output_high(&gpio_sh1106_dc);
}
static inline void write_data_page(uint8_t *data, uint16_t size)
{
uint8_t i;
hal_gpio_output_high(&gpio_sh1106_dc);
spi_write(data, size);
}
#else
static inline int OLED_GPIO_Init()
{
gpio_dev_t oled_gpio;
// 对各个PIN进行初始化
oled_gpio.port = OLED_CLK_PIN;
oled_gpio.config = OUTPUT_PUSH_PULL;
hal_gpio_init(&oled_gpio);
oled_gpio.port = OLED_SDA_PIN;
oled_gpio.config = OUTPUT_PUSH_PULL;
hal_gpio_init(&oled_gpio);
oled_gpio.port = OLED_RES_PIN;
oled_gpio.config = OUTPUT_PUSH_PULL;
hal_gpio_init(&oled_gpio);
oled_gpio.port = OLED_DC_PIN;
oled_gpio.config = OUTPUT_PUSH_PULL;
hal_gpio_init(&oled_gpio);
OLED_DC(1);
/* 复位 */
OLED_RES(0);
aos_msleep(1000);
OLED_RES(1);
fd = open("/dev/gpio", 0);
printf("open gpio %s, fd:%d\r\n", fd >= 0 ? "success" : "fail", fd);
return 0;
}
static void OLED_GPIO_Set(unsigned char port, unsigned char leve)
{
struct gpio_io_config config;
config.id = port;
config.config = GPIO_IO_OUTPUT | GPIO_IO_OUTPUT_PP;
if (leve == 1) {
config.data = 1;
} else if (leve == 0) {
config.data = 0;
} else {
return;
}
ioctl(fd, IOC_GPIO_SET, (unsigned long)&config);
}
void OLED_SCLK(uint8_t x)
{
if (x == 1) {
OLED_GPIO_Set(OLED_CLK_PIN, 1);
} else if (x == 0) {
OLED_GPIO_Set(OLED_CLK_PIN, 0);
}
}
void OLED_RES(uint8_t x)
{
if (x == 1) {
OLED_GPIO_Set(OLED_RES_PIN, 1);
} else if (x == 0) {
OLED_GPIO_Set(OLED_RES_PIN, 0);
}
}
void OLED_DC(uint8_t x)
{
if (x == 1) {
OLED_GPIO_Set(OLED_DC_PIN, 1);
} else if (x == 0) {
OLED_GPIO_Set(OLED_DC_PIN, 0);
}
}
void OLED_SDIN(uint8_t x)
{
struct gpio_io_config config;
config.id = OLED_SDA_PIN;
config.config = GPIO_IO_OUTPUT | GPIO_IO_OUTPUT_PP;
if (x == 0x80) {
config.data = 1;
} else if (x == 0) {
config.data = 0;
}
ioctl(fd, IOC_GPIO_SET, (unsigned long)&config);
}
static inline int OLED_SPI_Init()
{
// Nothing to do
return 0;
}
static inline void write_command(uint8_t cmd)
{
uint8_t i, k;
/*写命令拉低DC */
OLED_DC(0);
for (i = 0; i < 8; i++) {
/* 时钟线，上升沿有效 */
OLED_SCLK(0);
k = cmd & (0x80);
OLED_SDIN(k);
OLED_SCLK(1);//high valid
cmd <<= 1;
}
OLED_DC(1);
}
static inline void write_data(uint8_t data)
{
uint8_t i, k;
/* 写数据拉高DC */
OLED_DC(1);
for (i = 0; i < 8; i++) {
/* 时钟线，上升沿有效 */
OLED_SCLK(0);
k = data & (0x80);
OLED_SDIN(k);
OLED_SCLK(1);
data <<= 1;
}
OLED_DC(1);
}
static inline void write_data_page(uint8_t *data, uint16_t size)
{
uint8_t i, j, k, d;
for (j = 0; j < size; j++) {
d = data[j];
for (i = 0; i < 8; i++) {
OLED_SCLK(0);
k = d & (0x80);
OLED_SDIN(k);
OLED_SCLK(1);
d <<= 1;
}
}
OLED_DC(1);
}
#endif
#if RECORD_SCREEN == 1
static uint16_t zip_oled_gram(uint8_t *des, uint16_t *des_len)
{
uint8_t buf = OLED_GRAM[0][0];
uint8_t cnt = 0;
*des_len = 0;
for (int i = 0; i < 8; i++) {
for (int j = 0; j < 132; j++) {
if (OLED_GRAM[i][j] == buf) {
cnt++;
if (cnt == 0xff) {
des[(*des_len)++] = buf;
des[(*des_len)++] = cnt;
cnt = 0;
}
}
if (OLED_GRAM[i][j] != buf) {
des[(*des_len)++] = buf;
des[(*des_len)++] = cnt;
cnt = 1;
buf = OLED_GRAM[i][j];
}
}
}
des[(*des_len)++] = buf;
des[(*des_len)++] = cnt;
return *des_len;
}
#endif
void OLED_Refresh_GRAM(void)
{
#if FB_FRAME_EN == 1
//fb frame todo:
#else
for (uint8_t i = 0; i < 8; i++) {
/* 设置显示的起始地址 */
write_command(0xB0 + i); // 设置页地址（行）
write_command(0x00); // 设置列地址的低四位
write_command(0x10); // 设置列地址的高四位
write_data_page(OLED_GRAM[i], OLED_PAGE_SIZES);
}
#endif
#if RECORD_SCREEN == 1
uint16_t zip_len = 0;
zip_oled_gram(oled_remote_buffer, &zip_len);
gettimeofday(&tv, NULL);
if (zip_len <= 8 * 132) {
// 压缩有效
printf("pyszip|%d%d.", tv.tv_sec, tv.tv_usec / 1000);
printf("%03ld|", tv.tv_usec / 1000);
uint16_t cnt = 0;
for (int i = 0; i < zip_len; i++) {
printf("%02X", oled_remote_buffer[i]);
cnt += (i % 2 ? oled_remote_buffer[i] : 0);
}
printf("|%d\n", cnt);
} else {
// 压缩无效
printf("pysorg|%d%d.", tv.tv_sec, tv.tv_usec / 1000);
printf("%03ld|", tv.tv_usec / 1000);
for (int i = 0; i < 8; i++) {
for (int j = 0; j < 132; j++) {
printf("%02X", OLED_GRAM[i][j]);
}
}
printf("|1056\n");
}
#endif
}
void OLED_Clear(void)
{
uint8_t i, j;
for (i = 0; i < 8; i++)
for (j = 0; j < OLED_PAGE_SIZES; j++)
OLED_GRAM[i][j] = 0x0;
}
void OLED_Full(void)
{
uint8_t i, j;
for (i = 0; i < 8; i++)
for (j = 0; j < OLED_PAGE_SIZES; j++)
OLED_GRAM[i][j] = 0xff;
}
void OLED_Frame_Draw(uint8_t frame[][132])
{
uint8_t i, j;
for (i = 0; i < 8; i++) {
for (j = 0; j < OLED_PAGE_SIZES; j++) {
OLED_GRAM[i][j] = frame[i][j];
}
printf("OLED_GRAM[%d][0] = %02X;\n", i, OLED_GRAM[i][0]);
}
}
// OLED_Icon_Draw(-10, -10, icon_t *icon, 0)
// 0 完全不覆盖
// 1 完全覆盖
// 2 mask覆盖
void OLED_Icon_Draw(int16_t x, int16_t y, icon_t *icon, uint8_t mode)
{
int16_t width_byte = icon->width;
int16_t height_byte = icon->height / 8 + (icon->height % 8 != 0);
int16_t column_0 = x;
int16_t page_0 = (y < 0) ? (y / 8 - (y % 8 != 0)) : (y / 8);
int8_t bit_offset = (y % 8 < 0) ? (y % 8 + 8) : (y % 8);
if (mode == 2 && icon->p_icon_mask == NULL) {
mode = 0;
}
for (int byte_y = 0; (byte_y < height_byte) && (byte_y + page_0 < 8);
byte_y++) {
if (page_0 + byte_y + 1 < 0)
continue;
for (int byte_x = 0; (byte_x < width_byte) && (byte_x + column_0 < 132);
byte_x++) {
if (byte_x + column_0 < 0)
continue;
// 绘画处在当前 page 的部分
if (page_0 + byte_y >= 0) {
if (mode == 1) {
OLED_GRAM[page_0 + byte_y][column_0 + byte_x] &=
~(0xff << bit_offset);
}
if (mode == 2) {
OLED_GRAM[page_0 + byte_y][column_0 + byte_x] &=
~((icon->p_icon_mask[byte_y * width_byte + byte_x])
<< bit_offset);
}
OLED_GRAM[page_0 + byte_y][column_0 + byte_x] |=
(icon->p_icon_data[byte_y * width_byte + byte_x])
<< bit_offset;
}
// 绘画处在下一个 page 的部分
if (bit_offset > 0 && page_0 + byte_y + 1 >= 0 &&
page_0 + byte_y + 1 < 8) {
if (mode == 1) {
OLED_GRAM[page_0 + byte_y + 1][column_0 + byte_x] &=
~(0xff >> (8 - bit_offset));
}
if (mode == 2) {
OLED_GRAM[page_0 + byte_y + 1][column_0 + byte_x] &=
~((icon->p_icon_mask[byte_y * width_byte + byte_x]) >>
(8 - bit_offset));
}
OLED_GRAM[page_0 + byte_y + 1][column_0 + byte_x] |=
(icon->p_icon_data[byte_y * width_byte + byte_x]) >>
(8 - bit_offset);
}
}
}
}
/* 画点函数，以屏幕像素点为单位，以左上角为原点 x:0~127 y:0~63
（x,y）坐标换算:OLED_GRAM[x][7-y/8]|=1<<(7-y%8)；
mode取1正显，取0反显
*/
void OLED_DrawPoint(int16_t x, int16_t y, uint8_t mode)
{
if ((x > (131)) || (y > 63) || x < 0 || y < 0)
return;
uint8_t page = y / 8;
uint8_t bit_offset = y % 8;
uint8_t mask = 0x01 << bit_offset;
if (mode == 0)
OLED_GRAM[page][x] &= ~mask;
if (mode == 1)
OLED_GRAM[page][x] |= mask;
if (mode == 2)
OLED_GRAM[page][x] ^= mask;
}
/* 在（x,y）坐标正显/反显指定大小字符chr
mode：0是反显，1是正常显示
size：12/16/24
ASCII字符集:
!"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOP
QRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~
*/
void OLED_Show_Char(uint8_t x,
uint8_t y,
uint8_t chr,
uint8_t size,
uint8_t mode)
{
/* temp是当前对应的一个字节的点集，y0是初始坐标 */
uint8_t temp, t, t1;
uint8_t y0 = y;
/* csize是单个字符所占字节的多少 */
uint8_t csize = (size / 8 + ((size % 8) ? 1 : 0)) * (size / 2);
/* 求出偏移的地址差，即得到该字符在字库中的序号（从零开始） */
/* chr会锁定字符在字库中的的序号 */
// LOGI("APP", "++++ char=%c size=%d\n", chr, csize);
chr = chr - ' ';
/* 相应字符点集有多少个字节 */
for (t = 0; t < csize; t++) {
/* 根据字符的大小选择相应字库，根据chr得到具体的字符地址 */
switch (size) {
case 12:
temp = sh1106_asc2_1206[chr][t];
break; // 12x6(行x列)
case 16:
temp = sh1106_asc2_1608[chr][t];
break; // 16x8
case 24:
temp = sh1106_asc2_2412[chr][t];
break; // 24x12
default :
return; // 没有相应字库
}
// LOGI("APP", " new char x= %d,y=%d,t =%d %d\n", x, y, t, temp);
/* 画出每一列的点 */
for (t1 = 0; t1 < 8; t1++) {
if (temp & 0x80)
OLED_DrawPoint(x, y, mode);
else
OLED_DrawPoint(x, y, !mode);
temp <<= 1;
y++;
// LOGI("APP", "x= %d,y=%d\n",x,y);
/* 根据给出每一列的像素点的多少，判断列是否满：
满了就换列，不满继续在此列画点 （与字库画点原理相关）
*/
if ((y - y0) == size) {
// LOGI("APP", "new line\n");
y = y0;
x++;
/* 一列满，跳出循环，直接转到下一个字节点集的打印 */
break;
}
}
}
}
/* （x,y）是显示的坐标，*p是字符串的首地址，size是字符点集大小 */
void OLED_Show_String(uint8_t x,
uint8_t y,
const uint8_t *p,
uint8_t size,
uint8_t mode)
{
/* 判断是否合法字符，同时也限定了范围 */
while ((*p <= '~') && (*p >= ' ')) {
/* 如果初始行放不下，移动到下一行 */
if (x > (OLED_PAGE_SIZES - (size / 2))) {
x = 0;
y = y + size;
}
if (y > (64 - size)) {
x = y = 0;
OLED_Clear();
}
OLED_Show_Char(x, y, *p, size, mode);
/* 移动到下一个字符位置，size/2是因为做点集时就是：行X列，而且
* 行=2X列，所以size就是行数 */
x = x + size / 2;
p++;
}
// OLED_Refresh_GRAM();
}
// end native
static void command_list(void)
{
/* 开始写入初始化命令 */
write_command(0xAE); // 关闭显示
write_command(0xD5); // 设置时钟分频因子
write_command(80);
write_command(0xA8); // 设置驱动路数
write_command(0x3F); // 路数默认0x3F（1/64）
write_command(0xD3); // 设置显示偏移
write_command(0x00); // 偏移默认为0
write_command(0x40); // 设置显示开始行[5:0]
write_command(0x8D); // 电荷泵设置
write_command(0x14); // bit2，开启/关闭
write_command(0x20); // 设置内存地址模式
write_command(0x02); // [1:0],00，列地址模式;01，行地址模式;10,页地址模式;默认10;
write_command(0xA1); // 段重定义设置,bit0:0,0->0;1,0->127;
write_command(0xC8); // 设置COM扫描方向;bit3:0,普通模式;1,重定义模式
// COM[N-1]->COM0;N:驱动路数
write_command(0xDA); // 设置COM硬件引脚配置
write_command(0x12); // [5:4]配置
write_command(0x81); // 对比度设置
write_command(0xEF); // 默认0x7F（范围1~255，越大越亮）
write_command(0xD9); // 设置预充电周期
write_command(0xF1); // [3:0],PHASE 1;[7:4],PHASE 2;
write_command(0xDB); // 设置VCOMH 电压倍率
write_command(0x30); // [6:4] 000,0.65*vcc;001,0.77*vcc;011,0.83*vcc;
write_command(0xA4); // 全局显示开启;bit0:1,开启;0,关闭;(白屏/黑屏)
write_command(0xA6); // 设置显示方式;bit0:1,反相显示;0,正常显示
write_command(0xAF); // 开启显示
OLED_Clear();
OLED_Refresh_GRAM();
aos_msleep(500);
}
void OLED_DrawLine(int16_t x1, int16_t y1, int16_t x2, int16_t y2, uint8_t mode)
{
uint16_t t;
int xerr = 1, yerr = 1, delta_x, delta_y, distance;
int incx, incy, uRow, uCol;
delta_x = x2 - x1;
delta_y = y2 - y1;
uRow = x1;
uCol = y1;
if (delta_x > 0) {
incx = 1;
} else if (delta_x == 0) {
incx = 0;
} else {
incx = -1;
delta_x = -delta_x;
}
if (delta_y > 0) {
incy = 1;
} else if (delta_y == 0) {
incy = 0;
} else {
incy = -1;
delta_y = -delta_y;
}
if (delta_x > delta_y)
distance = delta_x;
else
distance = delta_y;
for (t = 0; t <= distance; t++) {
OLED_DrawPoint(uRow, uCol, mode);
xerr += delta_x;
yerr += delta_y;
if (xerr > distance / 2) {
xerr -= distance;
uRow += incx;
}
if (yerr > distance) {
yerr -= distance;
uCol += incy;
}
}
}
void OLED_DrawLine_ByAngle(int16_t x0,
int16_t y0,
int16_t angle,
int16_t length,
uint8_t mode)
{
int16_t x1 = x0 + length * cos(angle * PI / 180.0);
int16_t y1 = y0 + length * sin(angle * PI / 180.0);
OLED_DrawLine(x0, y0, x1, y1, mode);
}
void OLED_DrawHorizontalLine(uint8_t x, uint8_t y, uint8_t length, uint8_t mode)
{
if (y < 0 || y >= 64) {
return;
}
if (x < 0) {
length += x;
x = 0;
}
if ((x + length) > 132) {
length = (132 - x);
}
if (length <= 0) {
return;
}
while (length--) {
OLED_DrawPoint(x + length, y, mode);
}
}
void OLED_DrawVerticalLine(uint8_t x, uint8_t y, uint8_t length, uint8_t mode)
{
if (x < 0 || x >= 132) {
return;
}
if (x < 0) {
length += x;
x = 0;
}
if ((y + length) > 64) {
length = (64 - x);
}
if (length <= 0) {
return;
}
while (length--) {
OLED_DrawPoint(x, y + length, mode);
}
}
void OLED_DrawRect(uint8_t x,
uint8_t y,
uint8_t width,
uint8_t height,
uint8_t mode)
{
OLED_DrawHorizontalLine(x, y, width, mode);
OLED_DrawVerticalLine(x, y, height, mode);
OLED_DrawVerticalLine(x + width - 1, y, height, mode);
OLED_DrawHorizontalLine(x, y + height - 1, width, mode);
}
void OLED_FillRect(uint8_t xMove,
uint8_t yMove,
uint8_t width,
uint8_t height,
uint8_t mode)
{
for (uint8_t x = xMove; x < xMove + width; x++) {
OLED_DrawVerticalLine(x, yMove, height, mode);
}
}
void OLED_DrawCircle(uint8_t x0,
uint8_t y0,
uint8_t radius,
uint8_t width,
uint8_t mode)
{
OLED_FillCircle(x0, y0, radius, mode);
OLED_FillCircle(x0, y0, radius - width, !mode);
}
void OLED_FillCircle(uint8_t x0, uint8_t y0, uint8_t r, uint8_t mode)
{
int x, y;
int deltax, deltay;
int d;
int xi;
x = 0;
y = r;
deltax = 3;
deltay = 2 - r - r;
d = 1 - r;
OLED_DrawPoint(x + x0, y + y0, mode);
OLED_DrawPoint(x + x0, -y + y0, mode);
for (xi = -r + x0; xi <= r + x0; xi++)
OLED_DrawPoint(xi, y0, mode);
while (x < y) {
if (d < 0) {
d += deltax;
deltax += 2;
x++;
} else {
d += (deltax + deltay);
deltax += 2;
deltay += 2;
x++;
y--;
}
for (xi = -x + x0; xi <= x + x0; xi++) {
OLED_DrawPoint(xi, -y + y0, mode);
OLED_DrawPoint(xi, y + y0, mode);
}
for (xi = -y + x0; xi <= y + x0; xi++) {
OLED_DrawPoint(xi, -x + y0, mode);
OLED_DrawPoint(xi, x + y0, mode);
}
}
}
static uint8_t hardware_init(void)
{
uint8_t ret = 0;
ret |= OLED_SPI_Init();
ret |= OLED_GPIO_Init();
if (ret) {
printf("hardware_init fail\r\n");
return ret;
}
return ret;
}
/* （x,y）是显示的坐标，*p是字符串的首地址，size是字符点集大小 */
void sh1106_show_string(uint8_t x,
uint8_t y,
const uint8_t *p,
uint8_t size,
uint8_t mode)
{
/* 判断是否合法字符，同时也限定了范围 */
while ((*p <= '~') && (*p >= ' ')) {
/* 如果初始行放不下，移动到下一行 */
if (x > (OLED_PAGE_SIZES - (size / 2))) {
x = 0;
y = y + size;
}
if (y > (64 - size)) {
x = y = 0;
OLED_Clear();
}
OLED_Show_Char(x, y, *p, size, mode);
/* 移动到下一个字符位置，size/2是因为做点集时就是：行X列，而且
* 行=2X列，所以size就是行数 */
x = x + size / 2;
p++;
}
OLED_Refresh_GRAM();
}
uint8_t sh1106_init(void)
{
uint8_t err_code;
err_code = hardware_init();
if (err_code != 0) {
return err_code;
}
command_list();
return err_code;
}
| YifuLiu/AliOS-Things | components/drivers/external_device/sh1106/src/sh1106.c | C | apache-2.0 | 21,733 |
#ifdef AOS_COMP_CLI
#include "aos/cli.h"
#endif
// example based on haaseduk1
#include "hal_iomux_haas1000.h"
#include "st7789.h"
st7789_dev_t my_st7789 = {0};
// 硬件初始化
static void example_st7789_hw_init(int argc, char **argv)
{
st7789_init();
return;
}
// 绘画随机矩形
static void example_st7789_draw_ract(int argc, char **argv)
{
int x0 = rand() % 240;
int x1 = rand() % 240;
int y0 = rand() % 240;
int y1 = rand() % 240;
uint16_t color = rand();
printf("drawing rectangle at %d %d %d %d in color %04X\n", x0, y0, x1, y1,
color);
st7789_rect_draw( 0, 0, ST7789_WIDTH, ST7789_HEIGHT, 0xFFFF);
st7789_rect_draw(x0, y0, x1, y1, color);
return;
}
#ifdef AOS_COMP_CLI
/* reg args: fun, cmd, description*/
ALIOS_CLI_CMD_REGISTER(example_st7789_hw_init,
example_st7789_hw_init,
st7789 init test example)
ALIOS_CLI_CMD_REGISTER(example_st7789_draw_ract,
example_st7789_draw_ract,
st7789 display test example
: draw random ract)
#endif
| YifuLiu/AliOS-Things | components/drivers/external_device/st7789/example/st7789_example.c | C | apache-2.0 | 1,159 |
/*
* Copyright (C) 2015-2020 Alibaba Group Holding Limited
*/
#include <stdio.h>
#define ST7789_HEIGHT 240
#define ST7789_WIDTH 320
typedef struct _st7789_dev_t {
int spi_port;
int spi_freq;
int gpio_dc_id;
int gpio_reset_id;
int gpio_bgl_id;
// int screen_width;
// int screen_height;
// below user dont need to care
uint8_t *fb_addr;
int spi_fd;
int gpio_fd;
} st7789_dev_t;
uint8_t st7789_init(void);
void st7789_pixel_draw(uint16_t x, uint16_t y, uint16_t color);
void st7789_rect_draw(uint16_t x,
uint16_t y,
uint16_t width,
uint16_t height,
uint16_t color);
void st7789_line_draw(uint16_t x,
uint16_t y,
uint16_t length,
uint8_t dir,
uint16_t color);
void st7789_area_draw(uint16_t x,
uint16_t y,
uint16_t width,
uint16_t height,
uint8_t *frame,
uint32_t areaSize);
void st7789_frame_draw(uint8_t *frame);
void st7789_local_refresh(uint16_t x1,
uint16_t y1,
uint16_t x2,
uint16_t y2,
uint8_t *frame);
| YifuLiu/AliOS-Things | components/drivers/external_device/st7789/include/st7789.h | C | apache-2.0 | 1,420 |
/*
* Copyright (C) 2015-2020 Alibaba Group Holding Limited
*/
#include "st7789.h"
#include "aos/hal/gpio.h"
#include "aos/hal/spi.h"
#include "hal_iomux_haas1000.h"
#include <stdio.h>
#define ST7789_HEIGHT 240
#define ST7789_WIDTH 320
#define ST7789_DC_PIN HAL_GPIO_PIN_P0_4
#define ST7789_RESET_PIN HAL_GPIO_PIN_P0_0
#define ST7789_NOP 0x00
#define ST7789_SWRESET 0x01
#define ST7789_SLPIN 0x10
#define ST7789_SLPOUT 0x11
#define ST7789_PTLON 0x12
#define ST7789_NORON 0x13
#define ST7789_INVOFF 0x20
#define ST7789_INVON 0x21
#define ST7789_DISPOFF 0x28
#define ST7789_DISPON 0x29
#define ST7789_IDMOFF 0x38
#define ST7789_IDMON 0x39
#define ST7789_CASET 0x2A
#define ST7789_RASET 0x2B
#define ST7789_RAMWR 0x2C
#define ST7789_RAMRD 0x2E
#define ST7789_COLMOD 0x3A
#define ST7789_MADCTL 0x36
#define ST7789_PTLAR 0x30
#define ST7789_VSCRDEF 0x33
#define ST7789_VSCRSADD 0x37
#define ST7789_WRDISBV 0x51
#define ST7789_WRCTRLD 0x53
#define ST7789_WRCACE 0x55
#define ST7789_WRCABCMB 0x5e
#define ST7789_POWSAVE 0xbc
#define ST7789_DLPOFFSAVE 0xbd
#define ST7789_MADCTL_MY 0x80
#define ST7789_MADCTL_MX 0x40
#define ST7789_MADCTL_MV 0x20
#define ST7789_MADCTL_ML 0x10
#define ST7789_MADCTL_RGB 0x00
#define ST_CMD_DELAY 0x80
#define SPI_MAX_BLOCK 60000
static spi_dev_t spi_st7789 = {0};
static gpio_dev_t gpio_st7789_dc;
static gpio_dev_t gpio_st7789_reset;
static gpio_dev_t gpio_st7789_blk;
static inline void spi_write(const void *data, uint32_t size)
{
if (size > SPI_MAX_BLOCK) {
uint32_t rest = size;
uint32_t start = 0;
while (rest > SPI_MAX_BLOCK) {
hal_spi_send(&spi_st7789, (const void *)(data + start),
SPI_MAX_BLOCK, 10);
start += SPI_MAX_BLOCK;
rest -= SPI_MAX_BLOCK;
}
hal_spi_send(&spi_st7789, (const void *)(data + start), rest, 10);
} else {
hal_spi_send(&spi_st7789, (const void *)data, (uint16_t)size, 10);
}
}
static inline void write_command(uint8_t c)
{
hal_gpio_output_low(&gpio_st7789_dc);
spi_write(&c, sizeof(c));
}
static inline void write_data(uint8_t c)
{
hal_gpio_output_high(&gpio_st7789_dc);
spi_write(&c, sizeof(c));
}
static void
set_addr_window(uint16_t x_0, uint16_t y_0, uint16_t x_1, uint16_t y_1)
{
uint8_t data[4];
if (x_0 > x_1) {
x_0 = x_0 ^ x_1;
x_1 = x_0 ^ x_1;
x_0 = x_0 ^ x_1;
}
if (y_0 > y_1) {
y_0 = y_0 ^ y_1;
y_1 = y_0 ^ y_1;
y_0 = y_0 ^ y_1;
}
write_command(ST7789_CASET);
hal_gpio_output_high(&gpio_st7789_dc);
data[0] = x_0 >> 8;
data[1] = x_0;
data[2] = x_1 >> 8;
data[3] = x_1;
spi_write(data, 4);
write_command(ST7789_RASET);
hal_gpio_output_high(&gpio_st7789_dc);
data[0] = y_0 >> 8;
data[1] = y_0;
data[2] = y_1 >> 8;
data[3] = y_1;
spi_write(data, 4);
write_command(ST7789_RAMWR);
}
static void command_list(void)
{
hal_gpio_output_high(&gpio_st7789_reset);
aos_msleep(1);
hal_gpio_output_low(&gpio_st7789_reset);
aos_msleep(10);
hal_gpio_output_high(&gpio_st7789_reset);
aos_msleep(120);
write_command(0x36);
write_data(0x00);
write_command(0x3a);
write_data(0x05);
write_command(0xb2);
write_data(0x0c);
write_data(0x0c);
write_data(0x00);
write_data(0x33);
write_data(0x33);
write_command(0xb7);
write_data(0x70);
write_command(0xbb);
write_data(0x21);
write_command(0xc0);
write_data(0x2c);
write_command(0xc2);
write_data(0x01);
write_command(0xc3);
write_data(0x0B);
write_command(0xc4);
write_data(0x27);
write_command(0xc6);
write_data(0x0f);
write_command(0xd0);
write_data(0xa4);
write_data(0xA1);
write_command(0xe0);
write_data(0xD0);
write_data(0x06);
write_data(0x0B);
write_data(0x09);
write_data(0x08);
write_data(0x30);
write_data(0x30);
write_data(0x5B);
write_data(0x4B);
write_data(0x18);
write_data(0x14);
write_data(0x14);
write_data(0x2C);
write_data(0x32);
write_command(0xe1);
write_data(0xD0);
write_data(0x05);
write_data(0x0A);
write_data(0x0A);
write_data(0x07);
write_data(0x28);
write_data(0x32);
write_data(0x2C);
write_data(0x49);
write_data(0x18);
write_data(0x13);
write_data(0x13);
write_data(0x2C);
write_data(0x33);
write_command(0x21);
write_command(0x2A);
write_data(0x00);
write_data(0x00);
write_data(0x00);
write_data(0xEF);
write_command(0x2B);
write_data(0x00);
write_data(0x00);
write_data(0x01);
write_data(0x3F);
write_command(0x11);
aos_msleep(120);
write_command(0x29);
write_command(0x2c);
}
static uint8_t hardware_init(void)
{
int32_t ret = 0;
spi_st7789.port = 0;
spi_st7789.config.mode = SPI_WORK_MODE_3; // CPOL = 1; CPHA = 1
spi_st7789.config.freq = 26000000;
spi_st7789.config.role = SPI_ROLE_MASTER;
spi_st7789.config.firstbit = SPI_FIRSTBIT_MSB;
spi_st7789.config.t_mode = SPI_TRANSFER_NORMAL;
spi_st7789.config.serial_len = 8;
spi_st7789.config.data_size = SPI_DATA_SIZE_8BIT;
spi_st7789.config.cs = SPI_CS_DIS;
gpio_st7789_dc.port = ST7789_DC_PIN;
gpio_st7789_dc.config = OUTPUT_PUSH_PULL;
gpio_st7789_dc.priv = NULL;
gpio_st7789_reset.port = ST7789_RESET_PIN;
gpio_st7789_reset.config = OUTPUT_PUSH_PULL;
gpio_st7789_reset.priv = NULL;
gpio_st7789_blk.port = HAL_IOMUX_PIN_P0_6;
gpio_st7789_blk.config = OUTPUT_PUSH_PULL;
hal_gpio_output_high(&gpio_st7789_blk);
printf("hardware_init START\r\n");
ret |= hal_spi_init(&spi_st7789);
ret |= hal_gpio_init(&gpio_st7789_dc);
ret |= hal_gpio_init(&gpio_st7789_reset);
printf("hal_gpio_init done\r\n");
ret |= hal_gpio_output_low(&gpio_st7789_reset);
aos_msleep(500);
ret |= hal_gpio_output_high(&gpio_st7789_reset);
printf("hal_spi_init done\r\n");
if (ret) {
printf("hardware_init fail\r\n");
return ret;
}
return ret;
}
uint8_t st7789_init(void)
{
uint8_t err_code;
err_code = hardware_init();
if (err_code != 0) {
return err_code;
}
command_list();
st7789_rotation_set(90);
return err_code;
}
static void st7789_uninit(void)
{
;
}
void st7789_pixel_draw(uint16_t x, uint16_t y, uint16_t color)
{
set_addr_window(x, y, x, y);
const uint8_t data[2] = {color >> 8, color};
hal_gpio_output_high(&gpio_st7789_dc);
spi_write(data, sizeof(data));
hal_gpio_output_low(&gpio_st7789_dc);
}
void st7789_rect_draw(uint16_t x,
uint16_t y,
uint16_t width,
uint16_t height,
uint16_t color)
{
set_addr_window(x, y, x + width - 1, y + height - 1);
uint32_t bufferSize = width * height;
hal_gpio_output_high(&gpio_st7789_dc);
unsigned char *burst_buffer = (unsigned char *)malloc(bufferSize * 2);
for (uint32_t i = 0; i < bufferSize; i++) {
burst_buffer[2 * i] = color >> 8;
burst_buffer[2 * i + 1] = color;
}
spi_write(burst_buffer, bufferSize * 2);
free(burst_buffer);
}
void st7789_line_draw(uint16_t x,
uint16_t y,
uint16_t length,
uint8_t dir,
uint16_t color)
{
if (dir == 0) {
st7789_rect_draw(x, y, length, 1, color);
} else {
st7789_rect_draw(x, y, 1, length, color);
}
}
void st7789_area_draw(uint16_t x,
uint16_t y,
uint16_t width,
uint16_t height,
uint8_t *frame,
uint32_t areaSize)
{
uint16_t *rgb565_frame = (uint16_t *)frame;
if (width * height != areaSize) {
printf("error parm width * height != areaSize\n");
return;
}
set_addr_window(x, y, x + width - 1, y + height - 1);
uint32_t bufferSize = width * height;
hal_gpio_output_high(&gpio_st7789_dc);
unsigned char *burst_buffer = (unsigned char *)malloc(bufferSize * 2);
for (uint32_t i = 0; i < bufferSize; i++) {
burst_buffer[2 * i] = rgb565_frame[i] >> 8;
burst_buffer[2 * i + 1] = rgb565_frame[i];
}
spi_write(burst_buffer, bufferSize * 2);
free(burst_buffer);
}
void st7789_frame_draw(uint8_t *frame)
{
uint16_t *rgb565_frame = (uint16_t *)frame;
uint32_t bufferSize = ST7789_HEIGHT * ST7789_WIDTH;
set_addr_window(0, 0, ST7789_WIDTH - 1, ST7789_HEIGHT - 1);
hal_gpio_output_high(&gpio_st7789_dc);
unsigned char *burst_buffer = (unsigned char *)malloc(bufferSize * 2);
for (uint32_t i = 0; i < bufferSize; i++) {
burst_buffer[2 * i] = rgb565_frame[i] >> 8;
burst_buffer[2 * i + 1] = rgb565_frame[i];
}
spi_write(burst_buffer, bufferSize * 2);
free(burst_buffer);
}
#if 0
void st7789_local_refresh(uint16_t x1,
uint16_t y1,
uint16_t x2,
uint16_t y2,
uint8_t *frame)
{
uint16_t *rgb565_frame = (uint16_t *)frame;
uint32_t bufferSize = ST7789_HEIGHT * ST7789_WIDTH;
set_addr_window(x1, y1, x2, y2);
hal_gpio_output_high(&gpio_st7789_dc);
unsigned char *burst_buffer = (unsigned char *)malloc(bufferSize * 2);
for (uint32_t i = 0; i < bufferSize; i++) {
burst_buffer[2 * i] = rgb565_frame[i] >> 8;
burst_buffer[2 * i + 1] = rgb565_frame[i];
}
spi_write(burst_buffer, bufferSize * 2);
free(burst_buffer);
}
#else
void st7789_local_refresh(uint16_t x1,
uint16_t y1,
uint16_t x2,
uint16_t y2,
uint8_t *frame)
{
// printf("new st7789_local_refresh\r\n");
uint16_t *rgb565_frame = (uint16_t *)frame;
uint32_t bufferSize = (x2 -x1 + 1) * (y2 -y1 +1);
set_addr_window(x1, y1, x2, y2);
hal_gpio_output_high(&gpio_st7789_dc);
unsigned char *burst_buffer = (unsigned char *)malloc(bufferSize * 2);
for (uint32_t i = 0; i < bufferSize; i++) {
burst_buffer[2 * i] = rgb565_frame[i] >> 8;
burst_buffer[2 * i + 1] = rgb565_frame[i];
}
spi_write(burst_buffer, bufferSize * 2);
free(burst_buffer);
}
#endif
void st7789_dummy_display(void) { /* No implementation needed. */ }
void st7789_rotation_set(uint16_t rotation)
{
write_command(ST7789_MADCTL);
switch (rotation) {
case 0:
write_data(ST7789_MADCTL_MX | ST7789_MADCTL_RGB);
break;
case 90:
write_data(ST7789_MADCTL_MV | ST7789_MADCTL_MX | ST7789_MADCTL_RGB);
break;
case 180:
write_data(ST7789_MADCTL_MY | ST7789_MADCTL_RGB);
break;
case 270:
write_data(ST7789_MADCTL_MX | ST7789_MADCTL_MY | ST7789_MADCTL_MV |
ST7789_MADCTL_RGB);
break;
default:
break;
}
}
static void st7789_display_invert(uint8_t invert)
{
write_command(invert ? ST7789_INVON : ST7789_INVOFF);
}
void EnterSleep(void)
{
write_command(0x28);
aos_msleep(20);
write_command(0x10);
}
void ExitSleep(void)
{
write_command(0x11);
aos_msleep(120);
write_command(0x29);
}
| YifuLiu/AliOS-Things | components/drivers/external_device/st7789/src/st7789.c | C | apache-2.0 | 11,605 |
/*
* Copyright (C) 2015-2021 Alibaba Group Holding Limited
*/
#include <sys/ioctl.h>
#include <stdlib.h>
#include <fcntl.h>
#if AOS_COMP_CLI
#include "aos/cli.h"
#endif
#include "aos/vfs.h"
#include <drivers/u_ld.h>
#include <vfsdev/adc_dev.h>
#include <drivers/char/u_device.h>
void vfs_adc_handler (void *arg) {
ddkc_warn("enter %s arg:%p, fd = %d\r\n", __func__, arg, *((int *)arg));
return;
}
int vfs_adc_test(int index)
{
int ret = 0;
int fd = 0;
int sampling_cycle = 100;
char name[16] = {0};
io_adc_arg_t adc_arg;
snprintf(name, sizeof(name), "/dev/adc%d", index);
ddkc_info("opening name:%s\r\n", name);
fd = open(name, 0);
ddkc_warn("open %s %s, fd:%d\r\n", name, fd >= 0 ? "success" : "fail", fd);
if (fd >= 0) {
// correct parameters
ret = ioctl(fd, IOC_ADC_START, sampling_cycle);
ddkc_warn("start adc %s, ret:%d\r\n", ret ? "fail" : "succeed", ret);
sleep(1);
adc_arg.value = 0;
adc_arg.timeout = 500000; // in unit of us
ret = ioctl(fd, IOC_ADC_GET_VALUE, (unsigned long)&adc_arg);
ddkc_warn("get value result:%d, value:0x%x\r\n", ret, adc_arg.value);
sleep(1);
ret = ioctl(fd, IOC_ADC_STOP, 0);
close(fd);
}
return 0;
}
static void vfs_adc_cli_cmd(int argc, char **argv)
{
int ret = 0;
int index = argc > 1 ? atoi(argv[1]) : 1;
ddkc_info("argc:%d, index:%d\r\n", argc, index);
ret = vfs_adc_test(index);
ddkc_info("vfs adc test %s, ret:%d\r\n", ret ? "failed" : "success", ret);
return;
}
#if AOS_COMP_CLI
/* reg args: fun, cmd, description*/
ALIOS_CLI_CMD_REGISTER(vfs_adc_cli_cmd, adc_example, adc vfs example)
#endif
| YifuLiu/AliOS-Things | components/drivers/peripheral/adc/example/adc_example.c | C | apache-2.0 | 1,722 |
/*
* Copyright (C) 2021 Alibaba Group Holding Limited
*/
#include <stdint.h>
#include <aos/adc.h>
#include <aos/kernel.h>
#if AOS_COMP_CLI
#include "aos/cli.h"
#endif
/*TESTCASE1: Get ADC raw data, and then convert it into voltage. */
static int aos_adc_test_raw_data(uint32_t id, uint32_t channel)
{
int ret;
aos_adc_ref_t ref;
int32_t data = -1;
uint32_t resolution = 0;
uint32_t range = 0;
int32_t voltage = 0;
ret = aos_adc_get(&ref, id);
if (ret != 0) {
printf("aos_adc_get fail, ret:%d\r\n", ret);
return -1;
}
ret = aos_adc_read(&ref, channel, &data);
if (ret != 0) {
printf("aos_adc_read fail, ret:%d\r\n", ret);
return -1;
}
printf("Read raw data: %d rom device:%d channel:%d\r\n", data, id, channel);
ret = aos_adc_get_resolution(&ref, &resolution);
if (ret != 0) {
printf("aos_adc_get_resolution fail, ret:%d\r\n", ret);
return -1;
}
ret = aos_adc_get_range(&ref, channel, &range);
if (ret != 0) {
printf("aos_adc_get_range fail, ret:%d\r\n", ret);
return -1;
}
voltage = (data * range) / (1 << resolution);
printf("%s:Read : %d.%dV from device:%d channel:%d\r\n",
__func__, voltage / 1000, voltage % 1000, id, channel);
aos_adc_put(&ref);
return 0;
}
/*TESTCASE2: Get the input voltage directly. */
static int aos_adc_test_voltage(uint32_t id, uint32_t channel)
{
int ret;
aos_adc_ref_t ref;
int32_t data = -1;
ret = aos_adc_get(&ref, id);
if (ret != 0) {
printf("aos_adc_get fail, ret:%d\r\n", ret);
return -1;
}
ret = aos_adc_read_voltage(&ref, channel, &data);
if (ret != 0) {
printf("aos_adc_read fail, ret:%d\r\n", ret);
return -1;
}
printf("%s:Read voltage: %d.%dV from device:%d channel:%d\r\n",
__func__, data / 1000, data % 1000, id, channel);
aos_adc_put(&ref);
return 0;
}
static void aos_adc_cli_cmd(int argc, char **argv)
{
aos_status_t ret;
uint32_t index = argc > 1 ? atoi(argv[1]) : 0;
uint32_t channel = argc > 2 ? atoi(argv[2]) : 0;
printf("aos adc example test begin ...\r\n");
printf("argc:%d, device index:%d, channel:%d\r\n", argc, index, channel);
ret = aos_adc_test_raw_data(index, channel);
if (ret != 0) {
printf("aos adc example test fail, ret:%d!\r\n", ret);
return;
}
ret = aos_adc_test_voltage(index, channel);
printf("aos adc example test %s!\r\n", (ret == 0) ? "success" : "fail");
}
#if AOS_COMP_CLI
/* reg args: fun, cmd, description*/
ALIOS_CLI_CMD_REGISTER(aos_adc_cli_cmd, aos_adc_example, aos adc example)
#endif
| YifuLiu/AliOS-Things | components/drivers/peripheral/adc/example/aos_adc_example.c | C | apache-2.0 | 2,699 |
/*
* Copyright (C) 2021 Alibaba Group Holding Limited
*/
#ifndef AOS_ADC_H
#define AOS_ADC_H
#ifdef AOS_KERNEL_BUILD
#include <aos/device.h>
#else
#include <stdint.h>
#endif
/**
* @defgroup adc_api ADC
* @ingroup driver_api
* @brief AOS API for ADC.
* @{
*/
typedef enum {
AOS_ADC_MODE_SINGLE, /**< 单次采样模式 */
AOS_ADC_MODE_CONTINUE, /**< 连续采样模式 */
} aos_adc_mode_t;
#if (defined(AOS_KERNEL_BUILD) && defined(AOS_COMP_DEVFS)) || !defined(AOS_KERNEL_BUILD)
typedef struct {
int32_t channel;
uint32_t time;
} aos_adc_set_sample_time_args_t;
typedef struct {
int32_t channel;
uint32_t range;
} aos_adc_get_range_args_t;
typedef struct {
int32_t channel;
int32_t data;
} aos_adc_read_args_t;
#define AOS_ADC_IOC_SET_SAMPLE_TIME 0x4101
#define AOS_ADC_IOC_SET_MODE 0x4102
#define AOS_ADC_IOC_GET_RESOLUTION 0x4103
#define AOS_ADC_IOC_GET_RANGE 0x4104
#define AOS_ADC_IOC_READ 0x4105
#define AOS_ADC_IOC_READ_VOLTAGE 0x4106
#endif /* (defined(AOS_KERNEL_BUILD) && defined(AOS_COMP_DEVFS)) || !defined(AOS_KERNEL_BUILD) */
#ifdef AOS_KERNEL_BUILD
typedef aos_dev_ref_t aos_adc_ref_t; /**< ADC设备的引用 */
#ifdef __cplusplus
extern "C" {
#endif
/**
* 获取一个ADC设备的引用
*
* @param[out] ref ADC设备的引用
* @param[in] id ADC设备ID
*
* @return 0: 成功 <0: 失败
*/
aos_status_t aos_adc_get(aos_adc_ref_t *ref, uint32_t id);
/**
* 释放一个ADC设备的引用
*
* @param[in] ref ADC设备的引用
*
* @return 无
*/
void aos_adc_put(aos_adc_ref_t *ref);
/**
* 设置ADC设备的一个通道的采样时间
*
* @param[in] ref ADC设备的引用
* @param[in] channel >=0: 一个通道的ID -1: ADC设备的所有通道
* @param[in] time 采样时间（单位：us）
*
* @return 0: 成功 <0: 失败
*/
aos_status_t aos_adc_set_sample_time(aos_adc_ref_t *ref, int32_t channel, uint32_t time);
/**
* 设置ADC设备的工作模式
*
* @param[in] ref ADC设备的引用
* @param[in] mode 工作模式, 当前支持的模式:\n
* @ref AOS_ADC_MODE_SINGLE: 单次采样模式\n
* @ref AOS_ADC_MODE_CONTINUE: 连续采样模式\n
*
* @return 0: 成功 <0: 失败
*/
aos_status_t aos_adc_set_mode(aos_adc_ref_t *ref, aos_adc_mode_t mode);
/**
* 获取ADC设备的分辨率
*
* @param[in] ref ADC设备的引用
* @param[out] resolution ADC设备的分辨率 (单位:bits)
*
* @return 0: 成功 <0: 失败
*/
aos_status_t aos_adc_get_resolution(aos_adc_ref_t *ref, uint32_t *resolution);
/**
* 获取ADC设备的电压量程（单位:mV）
*
* @param[in] ref ADC设备的引用
* @param[in] channel >=0: 一个通道的ID -1: ADC设备的所有通道（相同的量程）
* @param[out] range ADC设备的电压量程（单位:mV）
*
* @return 0: 成功 <0: 失败
*/
aos_status_t aos_adc_get_range(aos_adc_ref_t *ref, int32_t channel, uint32_t *range);
/**
* 从ADC设备的一个通道读取原始数据 (同步方式)
*
* @param[in] ref ADC设备的引用
* @param[in] channel 通道ID
* @param[out] data 输出的ADC原始数据
*
* @return 0: 成功 <0: 失败
*/
aos_status_t aos_adc_read(aos_adc_ref_t *ref, int32_t channel, int32_t *data);
/**
* 从ADC设备的一个通道读取转换后的电压值（单位: mV） (同步方式)
*
* @param[in] ref ADC设备的引用
* @param[in] channel 通道ID
* @param[out] data 输出的ADC转换后电压值（单位: mV）
*
* @return 0: 成功 <0: 失败
*/
aos_status_t aos_adc_read_voltage(aos_adc_ref_t *ref, int32_t channel, int32_t *data);
#ifdef __cplusplus
}
#endif
#endif /* AOS_KERNEL_BUILD */
/** @} */
#endif /* AOS_ADC_H */
| YifuLiu/AliOS-Things | components/drivers/peripheral/adc/include/aos/adc.h | C | apache-2.0 | 3,893 |
/*
* Copyright (C) 2021 Alibaba Group Holding Limited
*/
#ifndef AOS_ADC_CORE_H
#define AOS_ADC_CORE_H
#include <aos/device_core.h>
#include <aos/adc.h>
/** @defgroup driver_api driver
* @ingroup aos_components
* @{
*/
/** @} */
/**
* @defgroup aos_adc_driver ADC驱动操作
* @ingroup driver_api
* 给ADC驱动提供ADC设备注册/注销操作.
*
* @{
*/
struct aos_adc_ops;
typedef struct aos_adc {
aos_dev_t dev;
const struct aos_adc_ops *ops; /**< ADC设备的底层操作, 设备注册前必须赋值 */
uint32_t resolution; /**< ADC设备分辨率(单位:bits), 设备注册前必须赋值 */
uint32_t freq; /**< ADC设备时钟频率(单位:HZ), 设备注册前必须赋值 */
void *priv; /**< 私有数据 */
} aos_adc_t;
typedef struct aos_adc_ops {
/**< ADC设备的注销操作（可选） */
void (*unregister)(aos_adc_t *adc);
/**< ADC设备的开始采样 */
aos_status_t (*startup)(aos_adc_t *adc);
/**< ADC设备的停止采样 */
void (*shutdown)(aos_adc_t *adc);
/**< 读取ADC设备的原始数据 */
aos_status_t (*read)(aos_adc_t *adc, int32_t channel, int32_t *data);
/**< 读取ADC设备的转换后的电压值（单位: mV）*/
aos_status_t (*read_voltage)(aos_adc_t *adc, int32_t channel, int32_t *data);
/**< 设置ADC设备的通道（开启与关闭）（可选）*/
aos_status_t (*set_channel)(aos_adc_t *adc, int32_t channel, bool enable);
/**< 设置ADC设备的采样时间（单位: 时钟周期的倍数）（可选）*/
aos_status_t (*set_sample_time)(aos_adc_t *adc, int32_t channel, uint32_t clock);
/**< 设置ADC设备的工作模式（可选）*/
aos_status_t (*set_mode)(aos_adc_t *adc, aos_adc_mode_t clock);
/**< 获取ADC设备的电压量程 */
aos_status_t (*get_range)(aos_adc_t *adc, int32_t channel, int32_t *range);
} aos_adc_ops_t;
#ifdef __cplusplus
extern "C" {
#endif
/**
* 注册一个ADC设备
*
* @param[in] adc 要注册的ADC设备，调用者应该分配内存并初始化设置它的ID
*
* @return 0: 成功; <0: 失败
*/
aos_status_t aos_adc_register(aos_adc_t *adc);
/**
* 注销一个ADC设备
*
* @param[in] id ADC设备的ID
*
* @return 0: 成功; <0: 失败
*/
aos_status_t aos_adc_unregister(uint32_t id);
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* AOS_ADC_CORE_H */
| YifuLiu/AliOS-Things | components/drivers/peripheral/adc/include/aos/adc_core.h | C | apache-2.0 | 2,398 |
/*
* Copyright (C) 2021 Alibaba Group Holding Limited
*/
#ifndef _AOS_ADC_CSI_H
#define _AOS_ADC_CSI_H
#include <aos/adc_core.h>
#include <drv/adc.h>
typedef struct {
aos_adc_t aos_adc; /* aos adc device */
csi_adc_t csi_adc; /* csi adc device */
} aos_adc_csi_t;
#ifdef __cplusplus
extern "C" {
#endif
/**
* Register an CSI ADC device
*
* @param[in] adc ADC ref to operate. The caller should allocate memory,
* init it and set id for the CSI ADC device.
*
* @return 0: on success; < 0: on failure
*/
aos_status_t aos_adc_csi_register(aos_adc_csi_t *adc_csi);
/**
* Unregister an CSI ADC device by id
*
* @param[in] id CSI ADC device id
*
* @return 0: on success; < 0: on failure
*/
aos_status_t aos_adc_csi_unregister(uint32_t id);
#ifdef __cplusplus
}
#endif
#endif /* _AOS_ADC_CSI_H */
| YifuLiu/AliOS-Things | components/drivers/peripheral/adc/include/aos/adc_csi.h | C | apache-2.0 | 867 |
/**
* @file adc.h
* @copyright Copyright (C) 2015-2018 Alibaba Group Holding Limited
*/
#ifndef HAL_ADC_H
#define HAL_ADC_H
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup hal_adc ADC
* ADC hal API.
*
* @{
*/
#include <stdint.h>
/* Define the wait forever timeout macro */
#define HAL_WAIT_FOREVER 0xFFFFFFFFU
/* Define ADC config args */
typedef struct {
uint32_t sampling_cycle; /**< sampling period in number of ADC clock cycles */
} adc_config_t;
/* Define ADC dev hal handle */
typedef struct {
uint8_t port; /**< adc port */
adc_config_t config; /**< adc config */
void *priv; /**< priv data */
} adc_dev_t;
/**
* Initialises an ADC interface, Prepares an ADC hardware interface for sampling
*
* @param[in] adc the interface which should be initialised
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_adc_init(adc_dev_t *adc);
/**
* Takes a single sample from an ADC interface
*
* @note If the ADC is configured with mutiple channels, the result of each channel is
* copied to output buffer one by one according to the sequence of the channel registered,
* and each result takes sizeof(uint32_t) bytes.
*
* @param[in] adc the interface which should be sampled
* @param[out] output pointer to a variable which will receive the sample
* @param[in] timeout ms timeout
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_adc_value_get(adc_dev_t *adc, uint32_t *output, uint32_t timeout);
/**
* De-initialises an ADC interface, Turns off an ADC hardware interface
*
* @param[in] adc the interface which should be de-initialised
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_adc_finalize(adc_dev_t *adc);
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* HAL_ADC_H */
| YifuLiu/AliOS-Things | components/drivers/peripheral/adc/include/aos/hal/adc.h | C | apache-2.0 | 1,827 |
/*
* Copyright (C) 2015-2021 Alibaba Group Holding Limited
*/
#ifndef _IO_ADC_H_
#define _IO_ADC_H_
#include <stdbool.h>
#ifdef __cplusplus
extern "C" {
#endif
/** @defgroup driver_api driver
* @ingroup aos_components
* @{
*/
/**
* @}
*/
/** @defgroup adc_device_api adc
* @ingroup driver_api
* @{
*/
/* ADC DEVICE IOCTL CMD宏定义 */
#define IOC_ADC_BASE 'A'
#define IOC_ADC_START IOC_ADC_BASE + 1 /**< 启动ADC设备*/
#define IOC_ADC_STOP IOC_ADC_BASE + 2 /**< 停止ADC设备*/
#define IOC_ADC_GET_VALUE IOC_ADC_BASE + 3 /**< 从ADC设备读取数据 */
/* ADC 读取数据的参数 */
typedef struct io_adc_arg {
unsigned int value; /**< 出参，读取到的数据 */
unsigned int timeout; /**< 入参，超时时间（单位：ms）*/
} io_adc_arg_t;
/**
* 注册ADC设备驱动到VFS框架
*
* @return 0：成功，否则失败
*/
int vfs_dac_drv_init (void);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /*_IO_ADC_H_*/
| YifuLiu/AliOS-Things | components/drivers/peripheral/adc/include/vfsdev/adc_dev.h | C | apache-2.0 | 974 |
/*
* Copyright (C) 2021 Alibaba Group Holding Limited
*/
#include <aos/adc_core.h>
#ifdef AOS_COMP_DEVFS
#include <stdio.h>
#include <inttypes.h>
#endif
#define AOS_ADC_CHECK_NULL(x) \
do { \
if ((x) == NULL) { \
return -EINVAL; \
} \
} while (0)
aos_status_t aos_adc_get(aos_adc_ref_t *ref, uint32_t id)
{
AOS_ADC_CHECK_NULL(ref);
return aos_dev_get(ref, AOS_DEV_TYPE_ADC, id);
}
void aos_adc_put(aos_adc_ref_t *ref)
{
if (ref == NULL)
return;
aos_dev_put(ref);
}
aos_status_t aos_adc_set_sample_time(aos_adc_ref_t *ref, int32_t channel, uint32_t time)
{
aos_status_t ret;
aos_adc_t *adc;
AOS_ADC_CHECK_NULL(ref);
adc = aos_container_of(ref->dev, aos_adc_t, dev);
if (adc->ops->set_sample_time == NULL)
return -ENOTSUP;
aos_dev_lock(ref->dev);
/* Convert time(unit:us) into the number of adc clock cycle. */
ret = adc->ops->set_sample_time(adc, channel, (time * adc->freq) / 1000000U);
aos_dev_unlock(ref->dev);
return ret;
}
aos_status_t aos_adc_set_mode(aos_adc_ref_t *ref, aos_adc_mode_t mode)
{
aos_status_t ret;
aos_adc_t *adc;
AOS_ADC_CHECK_NULL(ref);
adc = aos_container_of(ref->dev, aos_adc_t, dev);
if (adc->ops->set_mode == NULL)
return -ENOTSUP;
aos_dev_lock(ref->dev);
ret = adc->ops->set_mode(adc, mode);
aos_dev_unlock(ref->dev);
return ret;
}
aos_status_t aos_adc_get_resolution(aos_adc_ref_t *ref, uint32_t *resolution)
{
aos_adc_t *adc;
AOS_ADC_CHECK_NULL(ref);
AOS_ADC_CHECK_NULL(resolution);
adc = aos_container_of(ref->dev, aos_adc_t, dev);
AOS_ADC_CHECK_NULL(adc);
*resolution = adc->resolution;
return 0;
}
aos_status_t aos_adc_get_range(aos_adc_ref_t *ref, int32_t channel, uint32_t *range)
{
aos_status_t ret;
aos_adc_t *adc;
AOS_ADC_CHECK_NULL(ref);
AOS_ADC_CHECK_NULL(range);
adc = aos_container_of(ref->dev, aos_adc_t, dev);
AOS_ADC_CHECK_NULL(adc);
if (adc->ops->get_range == NULL)
return -ENOTSUP;
aos_dev_lock(ref->dev);
ret = adc->ops->get_range(adc, channel, range);
aos_dev_unlock(ref->dev);
return ret;
}
aos_status_t aos_adc_read(aos_adc_ref_t *ref, int32_t channel, int32_t *data)
{
aos_status_t ret;
aos_adc_t *adc;
AOS_ADC_CHECK_NULL(ref);
AOS_ADC_CHECK_NULL(data);
adc = aos_container_of(ref->dev, aos_adc_t, dev);
AOS_ADC_CHECK_NULL(adc);
aos_dev_lock(ref->dev);
ret = adc->ops->read(adc, channel, data);
aos_dev_unlock(ref->dev);
return ret;
}
aos_status_t aos_adc_read_voltage(aos_adc_ref_t *ref, int32_t channel, int32_t *data)
{
aos_status_t ret;
aos_adc_t *adc;
AOS_ADC_CHECK_NULL(ref);
AOS_ADC_CHECK_NULL(data);
adc = aos_container_of(ref->dev, aos_adc_t, dev);
AOS_ADC_CHECK_NULL(adc);
aos_dev_lock(ref->dev);
ret = adc->ops->read_voltage(adc, channel, data);
aos_dev_unlock(ref->dev);
return ret;
}
static void dev_adc_unregister(aos_dev_t *dev)
{
aos_adc_t *adc = aos_container_of(dev, aos_adc_t, dev);
if (adc->ops->unregister)
adc->ops->unregister(adc);
}
static aos_status_t dev_adc_get(aos_dev_ref_t *ref)
{
aos_adc_t *adc = aos_container_of(ref->dev, aos_adc_t, dev);
if (!aos_dev_ref_is_first(ref))
return 0;
return adc->ops->startup(adc);
}
static void dev_adc_put(aos_dev_ref_t *ref)
{
aos_adc_t *adc = aos_container_of(ref->dev, aos_adc_t, dev);
if (!aos_dev_ref_is_last(ref))
return;
adc->ops->shutdown(adc);
}
static const aos_dev_ops_t dev_adc_ops = {
.unregister = dev_adc_unregister,
.get = dev_adc_get,
.put = dev_adc_put,
};
#ifdef AOS_COMP_DEVFS
static aos_status_t devfs_adc_ioctl(aos_devfs_file_t *file, int cmd, uintptr_t arg)
{
aos_adc_ref_t *ref = aos_devfs_file2ref(file);
aos_status_t ret;
switch (cmd) {
case AOS_ADC_IOC_SET_SAMPLE_TIME:
{
aos_adc_set_sample_time_args_t args;
if (!aos_devfs_file_is_writable(file)) {
ret = -EPERM;
break;
}
if (!aos_umem_check((const void *)arg, sizeof(args))) {
ret = -EFAULT;
break;
}
if (aos_umem_copy(&args, (const void *)arg, sizeof(args))) {
ret = -EFAULT;
break;
}
ret = aos_adc_set_sample_time(ref, args.channel, args.time);
}
break;
case AOS_ADC_IOC_SET_MODE:
{
aos_adc_mode_t mode;
if (!aos_devfs_file_is_writable(file)) {
ret = -EPERM;
break;
}
if (!aos_umem_check((const void *)arg, sizeof(mode))) {
ret = -EFAULT;
break;
}
if (aos_umem_copy(&mode, (const void *)arg, sizeof(mode))) {
ret = -EFAULT;
break;
}
ret = aos_adc_set_mode(ref, mode);
}
break;
case AOS_ADC_IOC_GET_RESOLUTION:
{
uint32_t resolution;
if (!aos_devfs_file_is_readable(file)) {
ret = -EPERM;
break;
}
ret = aos_adc_get_resolution(ref, &resolution);
if (ret)
break;
if (!aos_umem_check((const void *)arg, sizeof(resolution))) {
ret = -EFAULT;
break;
}
ret = aos_umem_copy((void *)arg, &resolution, sizeof(resolution)) ? -EFAULT : 0;
}
break;
case AOS_ADC_IOC_GET_RANGE:
{
aos_adc_get_range_args_t args;
if (!aos_devfs_file_is_readable(file)) {
ret = -EPERM;
break;
}
if (!aos_umem_check((const void *)arg, sizeof(args))) {
ret = -EFAULT;
break;
}
if (aos_umem_copy(&args, (const void *)arg, sizeof(args))) {
ret = -EFAULT;
break;
}
ret = aos_adc_get_range(ref, args.channel, &args.range);
if (ret)
break;
ret = aos_umem_copy((void *)arg, &args, sizeof(args)) ? -EFAULT : 0;
}
break;
case AOS_ADC_IOC_READ:
{
aos_adc_read_args_t args;
if (!aos_devfs_file_is_readable(file)) {
ret = -EPERM;
break;
}
if (!aos_umem_check((const void *)arg, sizeof(args))) {
ret = -EFAULT;
break;
}
if (aos_umem_copy(&args, (const void *)arg, sizeof(args))) {
ret = -EFAULT;
break;
}
ret = aos_adc_read(ref, args.channel, &args.data);
if (ret)
break;
ret = aos_umem_copy((void *)arg, &args, sizeof(args)) ? -EFAULT : 0;
}
break;
case AOS_ADC_IOC_READ_VOLTAGE:
{
aos_adc_read_args_t args;
if (!aos_devfs_file_is_readable(file)) {
ret = -EPERM;
break;
}
if (!aos_umem_check((const void *)arg, sizeof(args))) {
ret = -EFAULT;
break;
}
if (aos_umem_copy(&args, (const void *)arg, sizeof(args))) {
ret = -EFAULT;
break;
}
ret = aos_adc_read_voltage(ref, args.channel, &args.data);
if (ret)
break;
ret = aos_umem_copy((void *)arg, &args, sizeof(args)) ? -EFAULT : 0;
}
break;
default:
ret = -EINVAL;
break;
}
return ret;
}
static const aos_devfs_file_ops_t devfs_adc_ops = {
.ioctl = devfs_adc_ioctl,
.poll = NULL,
.mmap = NULL,
.read = NULL,
.write = NULL,
.lseek = NULL,
};
#endif /* AOS_COMP_DEVFS */
aos_status_t aos_adc_register(aos_adc_t *adc)
{
#ifdef AOS_COMP_DEVFS
int name_len;
#endif
AOS_ADC_CHECK_NULL(adc);
/* startup/shutdown/read must be set. */
if ((adc->ops == NULL) || (adc->ops->startup == NULL) ||
(adc->ops->shutdown == NULL) || (adc->ops->read == NULL) ||
(adc->ops->read_voltage == NULL))
return -EINVAL;
if ((adc->resolution == 0) || (adc->freq == 0))
return -EINVAL;
adc->dev.type = AOS_DEV_TYPE_ADC;
adc->dev.ops = &dev_adc_ops;
#ifdef AOS_COMP_DEVFS
aos_devfs_node_init(&adc->dev.devfs_node);
adc->dev.devfs_node.ops = &devfs_adc_ops;
name_len = snprintf(adc->dev.devfs_node.name, sizeof(adc->dev.devfs_node.name), "adc%" PRIu32, adc->dev.id);
if (name_len < 0 || name_len >= sizeof(adc->dev.devfs_node.name))
return -EINVAL;
#endif
return aos_dev_register(&(adc->dev));
}
aos_status_t aos_adc_unregister(uint32_t id)
{
return aos_dev_unregister(AOS_DEV_TYPE_ADC, id);
}
| YifuLiu/AliOS-Things | components/drivers/peripheral/adc/src/adc.c | C | apache-2.0 | 9,008 |
/*
* Copyright (C) 2021 Alibaba Group Holding Limited
*/
#include <errno.h>
#include <stdbool.h>
#include <aos/adc_core.h>
#include <aos/adc_csi.h>
static void adc_csi_unregister(aos_adc_t *adc)
{
aos_adc_csi_t *aos_csi_adc = aos_container_of(adc, aos_adc_csi_t, aos_adc);
csi_adc_uninit(&(aos_csi_adc->csi_adc));
}
static aos_status_t adc_csi_startup(aos_adc_t *adc)
{
aos_adc_csi_t *aos_csi_adc = aos_container_of(adc, aos_adc_csi_t, aos_adc);
return csi_adc_start(&(aos_csi_adc->csi_adc));
}
static void adc_csi_shutdown(aos_adc_t *adc)
{
aos_adc_csi_t *aos_csi_adc = aos_container_of(adc, aos_adc_csi_t, aos_adc);
(void)csi_adc_stop(&(aos_csi_adc->csi_adc));
}
static aos_status_t adc_csi_read(aos_adc_t *adc, int32_t channel, int32_t *data)
{
aos_status_t ret;
aos_adc_csi_t *aos_csi_adc = aos_container_of(adc, aos_adc_csi_t, aos_adc);
ret = csi_adc_channel_enable(&(aos_csi_adc->csi_adc), (uint8_t)channel, true);
if (ret < 0)
return -EIO;
ret = csi_adc_start(&(aos_csi_adc->csi_adc));
if (ret != CSI_OK)
return -EIO;
*data = csi_adc_read(&(aos_csi_adc->csi_adc));
(void)csi_adc_stop(&(aos_csi_adc->csi_adc));
return 0;
}
static aos_status_t adc_csi_read_voltage(aos_adc_t *adc, int32_t channel, int32_t *data)
{
aos_status_t ret;
aos_adc_csi_t *aos_csi_adc = aos_container_of(adc, aos_adc_csi_t, aos_adc);
ret = csi_adc_channel_enable(&(aos_csi_adc->csi_adc), (uint8_t)channel, true);
if (ret < 0)
return -EIO;
ret = csi_adc_start(&(aos_csi_adc->csi_adc));
if (ret != CSI_OK)
return -EIO;
*data = csi_adc_read_voltage(&(aos_csi_adc->csi_adc));
(void)csi_adc_stop(&(aos_csi_adc->csi_adc));
return 0;
}
static aos_status_t adc_csi_set_channel(aos_adc_t *adc, int32_t channel, bool enable)
{
aos_adc_csi_t *aos_csi_adc = aos_container_of(adc, aos_adc_csi_t, aos_adc);
return csi_adc_channel_enable(&(aos_csi_adc->csi_adc), (uint8_t)channel, enable);
}
static aos_status_t adc_csi_set_sample_time(aos_adc_t *adc, int32_t channel, uint32_t clock)
{
aos_adc_csi_t *aos_csi_adc = aos_container_of(adc, aos_adc_csi_t, aos_adc);
return csi_adc_channel_sampling_time(&(aos_csi_adc->csi_adc), (uint8_t)channel, (uint16_t)clock);
}
static aos_status_t adc_csi_set_mode(aos_adc_t *adc, aos_adc_mode_t mode)
{
bool enable = (mode == AOS_ADC_MODE_CONTINUE);
aos_adc_csi_t *aos_csi_adc = aos_container_of(adc, aos_adc_csi_t, aos_adc);
return csi_adc_continue_mode(&(aos_csi_adc->csi_adc), enable);
}
static aos_status_t adc_csi_get_range(aos_adc_t *adc, int32_t channel, uint32_t *range)
{
aos_adc_csi_t *aos_csi_adc = aos_container_of(adc, aos_adc_csi_t, aos_adc);
return csi_adc_get_range(&(aos_csi_adc->csi_adc), (uint8_t)channel, range);
}
static const aos_adc_ops_t adc_csi_ops = {
.unregister = adc_csi_unregister,
.startup = adc_csi_startup,
.shutdown = adc_csi_shutdown,
.read = adc_csi_read,
.read_voltage = adc_csi_read_voltage,
.set_channel = adc_csi_set_channel,
.set_sample_time = adc_csi_set_sample_time,
.set_mode = adc_csi_set_mode,
.get_range = adc_csi_get_range,
};
aos_status_t aos_adc_csi_register(aos_adc_csi_t *adc_csi)
{
if (!adc_csi)
return -EINVAL;
adc_csi->aos_adc.ops = &adc_csi_ops;
return aos_adc_register(&adc_csi->aos_adc);
}
aos_status_t aos_adc_csi_unregister(uint32_t id)
{
return aos_adc_unregister(id);
}
| YifuLiu/AliOS-Things | components/drivers/peripheral/adc/src/adc_csi.c | C | apache-2.0 | 3,538 |
/*
* Copyright (C) 2015-2021 Alibaba Group Holding Limited
*/
#include <poll.h>
#include <aos/hal/adc.h>
#include <vfsdev/adc_dev.h>
#include <devicevfs/devicevfs.h>
#ifdef CONFIG_ADC_NUM
#define PLATFORM_ADC_NUM CONFIG_ADC_NUM
#else
#define PLATFORM_ADC_NUM 4
#endif
#if (PLATFORM_ADC_NUM > 0)
// ADC device node will be named with "/dev/adc<x>", where <x> is adc port id
#define ADC_DEV_NAME_FORMAT "adc%d"
typedef struct vfs_adc {
int ref_cnt;
adc_dev_t dev;
} vfs_adc_t;
int adc_device_ioctl (file_t *f, int cmd, unsigned long arg) {
int ret = 0;
io_adc_arg_t adc_arg;
io_adc_arg_t *p_adc_arg = NULL;
char *fname = f->node->i_name;
vfs_adc_t *vd = (vfs_adc_t *)f->node->i_arg;
adc_dev_t *adc_dev = &vd->dev;
// arg is channel info
ddkc_dbg("cmd:0x%x, arg:0x%lx\r\n", cmd, arg);
switch (cmd) {
case IOC_ADC_GET_VALUE:
p_adc_arg = (io_adc_arg_t *)arg;
BUG_ON_MSG(!p_adc_arg, "IOC_ADC_GET_VALUE - arg should not be NULL\r\n");
/* copy timeout config from user */
aos_ipc_copy(&adc_arg, p_adc_arg, sizeof(io_adc_arg_t));
ret = hal_adc_value_get(adc_dev, &adc_arg.value, adc_arg.timeout);
/* copy value back to user */
aos_ipc_copy(p_adc_arg, &adc_arg, sizeof(io_adc_arg_t));
ddkc_info("IOC_ADC_GET_VALUE, adc_arg.value:%d, ret:%d\r\n", adc_arg.value, ret);
break;
case IOC_ADC_START:
ddkc_dbg("IOC_ADC_START, arg:%ld\r\n", arg);
adc_dev->config.sampling_cycle = arg;
ret = vd->ref_cnt ? 0 : hal_adc_init(adc_dev);
if (ret) {
ddkc_err("%s starts failed, port:%d, ref_cnt:%d\r\n", fname, adc_dev->port, vd->ref_cnt);
} else {
vd->ref_cnt++;
ddkc_dbg("%s starts success, port:%d, ref_cnt:%d\r\n", fname, adc_dev->port, vd->ref_cnt);
}
break;
case IOC_ADC_STOP:
vd->ref_cnt--;
ret = vd->ref_cnt ? 0 : hal_adc_finalize(adc_dev);
if (ret) {
ddkc_err("%s stop failed, port:%d\r\n", fname, adc_dev->port);
} else {
ddkc_dbg("%s stop success, port:%d\r\n", fname, adc_dev->port);
}
break;
default:
ddkc_err("invalid cmd:%d\r\n", cmd);
break;
}
return ret;
}
int adc_device_open (inode_t *node, file_t *f) {
ddkc_info("device:%s open succeed\r\n", node->i_name);
return 0;
}
int adc_device_close (file_t *f) {
ddkc_info("device:%s close succeed\r\n", f->node->i_name);
return 0;
}
/************************** device ****************************/
subsys_file_ops_t adc_device_fops = {
.open = adc_device_open,
.close = adc_device_close,
.read = NULL,
.write = NULL,
.ioctl = adc_device_ioctl,
.poll = NULL,
};
int adc_device_init (struct u_platform_device *pdev) {
// make sure 0 is returned if init operation success
// or aos_dev_reg procedure will break and no device node will be registered
ddkc_dbg("%s\r\n", __func__);
return 0;
}
int adc_device_deinit (struct u_platform_device *pdev) {
ddkc_dbg("%s\r\n", __func__);
return 0;
}
int adc_device_pm (struct u_platform_device *pdev, u_pm_ops_t state) {
ddkc_dbg("%s\r\n", __func__);
return 0;
}
struct subsys_drv adc_device_drv = {
.drv_name = "adc",
.init = adc_device_init,
.deinit = adc_device_deinit,
.pm = adc_device_pm,
};
struct subsys_dev *g_adc_device_array[PLATFORM_ADC_NUM];
int vfs_adc_drv_init (void) {
int i = 0;
int j = 0;
int ret = 0;
int node_name_len = 0;
struct subsys_dev **ppsdev = NULL;
ddkc_dbg("adc vfs driver init starts\r\n");
node_name_len = strlen(ADC_DEV_NAME_FORMAT) + 1;
memset(g_adc_device_array, 0, sizeof(g_adc_device_array));
ppsdev = g_adc_device_array;
for (i = 0; i < PLATFORM_ADC_NUM; i++) {
vfs_adc_t *vd = malloc(sizeof(vfs_adc_t));
*ppsdev = malloc(sizeof(struct subsys_dev) + node_name_len);
if (!(*ppsdev) || !vd) {
ddkc_err("malloc failed, *ppsdev:%p, vd:%p\r\n", *ppsdev, vd);
if (*ppsdev) {
free(*ppsdev);
*ppsdev = NULL;
}
if (vd)
free(vd);
goto err;
}
memset(*ppsdev, 0, sizeof(struct subsys_dev) + node_name_len);
memset(vd, 0, sizeof(*vd));
// vfs_adc_t's port should be remained during the whole driver life
vd->dev.port = i;
(*ppsdev)->node_name = (char *)((*ppsdev) + 1);
snprintf((*ppsdev)->node_name, node_name_len, ADC_DEV_NAME_FORMAT, i);
ddkc_dbg("*ppsdev:%p, node_name:%s, (*ppsdev) + 1:%p, sizeof(struct subsys_dev):%d\r\n",
*ppsdev, (*ppsdev)->node_name, (*ppsdev) + 1, sizeof(struct subsys_dev));
(*ppsdev)->permission = 0;
// please refer to definitions in enum SUBSYS_BUS_TYPE
(*ppsdev)->type = BUS_TYPE_PLATFORM;
// user_data will be passed to open operation via node->i_arg
(*ppsdev)->user_data = vd;
ret = aos_dev_reg(*ppsdev, &adc_device_fops, &adc_device_drv);
if (ret) {
ddkc_err("aos_dev_reg for adc%d failed, ret:%d\r\n", i, ret);
free(vd);
free(*ppsdev);
*ppsdev = NULL;
goto err;
}
ppsdev++;
}
ddkc_dbg("adc vfs driver init finish, ret:%d\r\n", ret);
return 0;
err:
ppsdev = g_adc_device_array;
for (j = 0; j < i; j++) {
// shall uninstall adc devices who are already registered
if (*ppsdev) {
aos_dev_unreg(*ppsdev);
ddkc_info("free memory for adc%d\r\n", j);
if ((*ppsdev)->user_data)
free((*ppsdev)->user_data);
free(*ppsdev);
*ppsdev = NULL;
}
ppsdev++;
}
ddkc_err("adc vfs driver init failed, ret:%d\r\n", ret);
return ret;
}
VFS_DRIVER_ENTRY(vfs_adc_drv_init)
#endif
| YifuLiu/AliOS-Things | components/drivers/peripheral/adc/src/adc_dev.c | C | apache-2.0 | 6,113 |
/*
* Copyright (C) 2015-2021 Alibaba Group Holding Limited
*/
#include <stdio.h>
#include <stdlib.h>
#include <fcntl.h>
#include <epoll.h>
#include <poll.h>
#include <errno.h>
#include <string.h>
#include <sys/ioctl.h>
#include <aos/vfs.h>
#include <aos/hal/flash.h>
#include <vfsdev/flash_dev.h>
#include <drivers/char/u_device.h>
#include <drivers/u_ld.h>
#if AOS_COMP_CLI
#include "aos/cli.h"
#endif
int vfs_flash_test(unsigned int flash_id)
{
char buffer[16];
int ret = 0;
int fd = -1;
char dev_str[16];
int epfd = epoll_create(10 + 1);
hal_logic_partition_t part_info;
snprintf(dev_str,16-1,"/dev/flash%d", flash_id);
fd = open(dev_str, 0);
ddkc_info("open flash %s %s, fd:%d, epfd:%d\r\n", dev_str, fd >= 0 ? "success" : "fail", fd, epfd);
if (fd >= 0) {
int n = 0;
int nfds = 0;
struct epoll_event ev;
struct epoll_event events[10 + 1];
ev.data.fd = fd;
ev.events = EPOLLIN | EPOLLOUT;
ret = epoll_ctl(epfd, EPOLL_CTL_ADD, fd, &ev);
ddkc_info("epoll_ctl return %d\r\n", ret);
ret = lseek(fd, 0, SEEK_SET);
ddkc_info("lseek of flash return %d\r\n", ret);
ret = ioctl(fd, IOC_FLASH_ERASE_FLASH, strlen("test"));
ddkc_info("ioctl of flash return %d\r\n", ret);
ret = lseek(fd, 0, SEEK_SET);
ddkc_info("lseek of flash return %d\r\n", ret);
ret = write(fd, "test", strlen("test"));
ddkc_info("write to flash return %d\r\n", ret);
if (ret != strlen("test")) {
ddkc_err("write to flash failed, ret:%d, target len:%d\r\n", ret, strlen("test"));
goto err;
}
ret = lseek(fd,0,SEEK_SET);
ddkc_info("lseek of flash return %d\r\n", ret);
ret = read(fd, buffer, sizeof(buffer));
ddkc_info("read from flash return %d\r\n", ret);
if(ret != sizeof(buffer)){
ddkc_err("read from flash failed, ret:%d, target size:%d\r\n", ret, sizeof(buffer));
goto err;
}
buffer[15] = '\0';
ret = strncmp("test", buffer, strlen("test"));
if(ret){
ddkc_err("flash read failed, buffer:%s\r\n", buffer);
goto err;
}
nfds = epoll_wait(epfd, events, 10, 1000);
if (nfds > 0) {
if (events[n].events & EPOLLIN) {
ddkc_info("EPOLLIN received\r\n");
ret = read(fd, buffer, sizeof(buffer));
ddkc_info("read from ttyUART return %d\r\n", ret);
} else if (events[n].events & EPOLLOUT) {
ddkc_info("EPOLLOUT received\r\n");
}
}
ddkc_info("ioctl with IOC_FLASH_INFO_GET\r\n");
ioctl(fd, IOC_FLASH_INFO_GET, (unsigned long)&part_info);
ddkc_info("ioctl on flash get partition info, description:%s\r\n", part_info.partition_description ? part_info.partition_description : "NULL");
ddkc_info("ioctl on flash get partition info, start_addr:0x%x\r\n", part_info.partition_start_addr);
ddkc_info("ioctl on flash get partition info, length:0x%x\r\n", part_info.partition_length);
ddkc_info("ioctl with IOC_FLASH_GET_BOOT_TYPE\r\n");
ret = ioctl(fd, IOC_FLASH_GET_BOOT_TYPE, 0);
ddkc_info("ioctl with IOC_FLASH_GET_BOOT_TYPE ret:%d\r\n", ret);
close(epfd);
close(fd);
fd = -1;
epfd = -1;
return 0;
} else {
ddkc_err("flash open failed, buffer:%s\r\n", buffer);
ret = -EIO;
}
err:
if (fd >= 0)
close(fd);
if (epfd >= 0)
close(epfd);
return ret;
}
static void flash_unit_test(int argc, char **argv)
{
int ret = 0;
unsigned int loops = 1;
unsigned int flash_id = HAL_PARTITION_OTA_TEMP;
if (argc <= 1) {
ddkc_err("usage: flash_example <loops>\r\n");
return;
}
flash_id = atoi(argv[1]);
loops = argc > 2 ? atoi(argv[2]) : 1;
ddkc_info("flash_id:%d, loops:%d\r\n", flash_id, loops);
while (loops--) {
ret = vfs_flash_test(flash_id);
if (ret) {
ddkc_err("vfs_flash_test return %d\r\n", ret);
} else {
ddkc_info("vfs_flash_test success!\r\n");
}
}
return;
}
#if AOS_COMP_CLI
/* reg args: fun, cmd, description*/
ALIOS_CLI_CMD_REGISTER(flash_unit_test, flash_example, flash vfs example)
#endif
| YifuLiu/AliOS-Things | components/drivers/peripheral/flash/example/flash_example.c | C | apache-2.0 | 4,400 |
/*
* Copyright (C) 2015-2021 Alibaba Group Holding Limited
*/
#include <stdio.h>
#include <stdint.h>
#include <aos/kernel.h>
#include <aos/cli.h>
#include <aos/mtd.h>
static void mtd_unit_test(int argc, char *argv[])
{
ssize_t count;
aos_mtd_t *mtd;
aos_status_t ret;
char buf[64] = "mtd test.";
int buf_test_len = strlen(buf);
mtd = aos_mtd_open(MTD_PART_NAME_KERNEL2);
if (mtd == NULL) {
printf("%s:%d: aos_mtd_open failed.\n", __func__, __LINE__);
return;
}
ret = aos_mtd_erase(mtd, 0, strlen("mtd test."));
if (ret < 0) {
printf("%s:%d: aos_mtd_erase failed ret: %d\n", __func__, __LINE__, ret);
aos_mtd_close(mtd);
return;
}
count = aos_mtd_write(mtd, 0, buf, strlen(buf));
if (count < 0) {
printf("%s:%d: aos_mtd_write failed ret: %d\n", __func__, __LINE__, count);
aos_mtd_close(mtd);
return;
}
printf("%s:%d:buf\"%s\" was successfully written.\n", __func__, __LINE__, buf);
memset(buf, 0, sizeof(buf));
count = aos_mtd_read(mtd, 0, buf, buf_test_len);
if (count < 0) {
printf("%s:%d: aos_mtd_read failed ret: %d\n", __func__, __LINE__, count);
aos_mtd_close(mtd);
return;
}
printf("%s:%d:buf\"%s\" was successfully read.\n", __func__, __LINE__, buf);
if (strcmp(buf, "mtd test.") != 0) {
printf("%s:%d:buf:%s aos_mtd_test failed!\n", __func__, __LINE__, buf);
} else {
printf("%s:%d: aos_mtd_test success!\n", __func__, __LINE__);
}
aos_mtd_close(mtd);
return;
}
#ifdef AOS_COMP_CLI
/* reg args: fun, cmd, description*/
ALIOS_CLI_CMD_REGISTER(mtd_unit_test, mtd_example, aos mtd example)
#endif | YifuLiu/AliOS-Things | components/drivers/peripheral/flash/example/mtd_example.c | C | apache-2.0 | 1,717 |
/*
* Copyright (C) 2020-2021 Alibaba Group Holding Limited
*/
#ifndef AOS_FLASH_H
#define AOS_FLASH_H
#ifdef AOS_KERNEL_BUILD
#include <aos/device.h>
#else
#include <stdint.h>
#endif
/**
* @defgroup flash_api Flash
* @ingroup driver_api
* @brief AOS API for flash.
* @{
*/
#define AOS_FLASH_F_TYPE_MASK ((uint32_t)0xF << 0)
#define AOS_FLASH_F_TYPE_NOR ((uint32_t)0x0 << 0)
#define AOS_FLASH_F_TYPE_NAND ((uint32_t)0x1 << 0)
#define AOS_FLASH_F_ECC_STRENGTH_MASK ((uint32_t)0xFFFF << 16)
#define AOS_FLASH_F_ECC_STRENGTH(x) (((uint32_t)(x) & 0xFFFF) << 16)
#define aos_flash_flags_to_ecc_strength(f) (((f) & AOS_FLASH_F_ECC_STRENGTH_MASK) >> 16)
#define AOS_FLASH_ECC_ERROR (aos_flash_flags_to_ecc_strength(AOS_FLASH_F_ECC_STRENGTH_MASK) + 1)
#ifdef AOS_KERNEL_BUILD
typedef aos_dev_ref_t aos_flash_ref_t;
typedef struct {
uint32_t flags;
uint64_t block_count;
size_t pages_per_block;
size_t page_data_size;
size_t page_spare_size;
} aos_flash_info_t;
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Get a flash device.
* @param ref Flash ref to operate.
* @param id Flash device ID.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_flash_get(aos_flash_ref_t *ref, uint32_t id);
/**
* @brief Release a flash device.
* @param ref Flash ref to operate.
* @return None.
*/
void aos_flash_put(aos_flash_ref_t *ref);
/**
* @brief Get information about a flash device.
* @param ref Flash ref to operate.
* @param info Information structure.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_flash_get_info(aos_flash_ref_t *ref, aos_flash_info_t *info);
/**
* @brief Read data from a flash device.
* @param ref Flash ref to operate.
* @param offset Offset from the start of the flash device.
* @param buf Data buffer.
* @param count Number of bytes to read.
* @return >= 0 and <= ECC strength: bit-flips corrected; AOS_FLASH_ECC_ERROR: on ECC error; < 0: on failure.
*/
aos_status_t aos_flash_read(aos_flash_ref_t *ref, uint64_t offset, void *buf, size_t count);
/**
* @brief Write data to a flash device.
* @param ref Flash ref to operate.
* @param offset Offset from the start of the flash device.
* @param buf Data buffer.
* @param count Number of bytes to write.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_flash_write(aos_flash_ref_t *ref, uint64_t offset, const void *buf, size_t count);
/**
* @brief Erase an area on a flash device.
* @param ref Flash ref to operate.
* @param offset Offset from the start of the flash device.
* @param size The size of the area to erase in bytes.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_flash_erase(aos_flash_ref_t *ref, uint64_t offset, size_t size);
/**
* @brief Read data from a page.
* @param ref Flash ref to operate.
* @param page Page to operate.
* @param data_offset Offset from the start of the in-band area.
* @param data_buf In-band buffer.
* @param data_count Number of bytes to read from the in-band area.
* @param spare_offset Offset from the start of the out-of-band area.
* @param spare_buf Out-of-band buffer.
* @param spare_count Number of bytes to read from the out-of-band area.
* @return >= 0 and <= ECC strength: bit-flips corrected; AOS_FLASH_ECC_ERROR: on ECC error; < 0: on failure.
*/
aos_status_t aos_flash_read_page(aos_flash_ref_t *ref, uint64_t page,
size_t data_offset, void *data_buf, size_t data_count,
size_t spare_offset, void *spare_buf, size_t spare_count);
/**
* @brief Write data to a page.
* @param ref Flash ref to operate.
* @param page Page to operate.
* @param data_offset Offset from the start of the in-band area.
* @param data_buf In-band buffer.
* @param data_count Number of bytes to write to the in-band area.
* @param spare_offset Offset from the start of the out-of-band area.
* @param spare_buf Out-of-band buffer.
* @param spare_count Number of bytes to write to the out-of-band area.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_flash_write_page(aos_flash_ref_t *ref, uint64_t page,
size_t data_offset, const void *data_buf, size_t data_count,
size_t spare_offset, const void *spare_buf, size_t spare_count);
/**
* @brief Erase a block.
* @param ref Flash ref to operate.
* @param block Block to operate.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_flash_erase_block(aos_flash_ref_t *ref, uint64_t block);
/**
* @brief Check the bad block mark.
* @param ref Flash ref to operate.
* @param block Block to operate.
* @return 0: good block; 1: bad block; < 0: on failure.
*/
aos_status_t aos_flash_is_bad_block(aos_flash_ref_t *ref, uint64_t block);
/**
* @brief Mark a bad block.
* @param ref Flash ref to operate.
* @param block Block to operate.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_flash_mark_bad_block(aos_flash_ref_t *ref, uint64_t block);
#ifdef __cplusplus
}
#endif
#endif /* AOS_KERNEL_BUILD */
/** @} */
#endif /* AOS_FLASH_H */
| YifuLiu/AliOS-Things | components/drivers/peripheral/flash/include/aos/flash.h | C | apache-2.0 | 5,471 |
/*
* Copyright (C) 2020-2021 Alibaba Group Holding Limited
*/
#ifndef AOS_FLASH_CORE_H
#define AOS_FLASH_CORE_H
#include <aos/device_core.h>
#include <aos/flash.h>
struct aos_flash_ops;
typedef struct {
aos_dev_t dev;
/* must be initialized before registration */
const struct aos_flash_ops *ops;
uint32_t flags;
uint64_t block_count;
size_t pages_per_block;
size_t page_data_size;
size_t page_spare_size;
void *page_data_buf;
void *page_spare_buf;
} aos_flash_t;
typedef struct aos_flash_ops {
void (*unregister)(aos_flash_t *);
aos_status_t (*startup)(aos_flash_t *);
void (*shutdown)(aos_flash_t *);
aos_status_t (*read_page)(aos_flash_t *, uint64_t, size_t, size_t, size_t, size_t);
aos_status_t (*write_page)(aos_flash_t *, uint64_t, size_t, size_t, size_t, size_t);
aos_status_t (*erase_block)(aos_flash_t *, uint64_t);
aos_status_t (*is_bad_block)(aos_flash_t *, uint64_t);
aos_status_t (*mark_bad_block)(aos_flash_t *, uint64_t);
} aos_flash_ops_t;
#ifdef __cplusplus
extern "C" {
#endif
aos_status_t aos_flash_register(aos_flash_t *flash);
aos_status_t aos_flash_register_argumented(aos_flash_t *flash, uint32_t id, const aos_flash_ops_t *ops,
uint32_t flags, uint64_t block_count, size_t pages_per_block,
size_t page_data_size, size_t page_spare_size,
void *page_data_buf, void *page_spare_buf);
aos_status_t aos_flash_unregister(uint32_t id);
#ifdef __cplusplus
}
#endif
#endif /* AOS_FLASH_CORE_H */
| YifuLiu/AliOS-Things | components/drivers/peripheral/flash/include/aos/flash_core.h | C | apache-2.0 | 1,625 |
/*
* Copyright (C) 2020-2021 Alibaba Group Holding Limited
*/
#ifndef AOS_FLASHPART_H
#define AOS_FLASHPART_H
#ifdef AOS_KERNEL_BUILD
#include <aos/device.h>
#else
#include <stdint.h>
#endif
#include <aos/flash.h>
/**
* @defgroup flashpart_api Flash Partition
* @ingroup driver_api
* @brief AOS API for flash partition.
* @{
*/
#if (defined(AOS_KERNEL_BUILD) && defined(AOS_COMP_DEVFS)) || !defined(AOS_KERNEL_BUILD)
typedef struct {
uint32_t flash_id;
uint32_t flash_flags;
uint64_t flash_block_count;
uint64_t block_start;
uint64_t block_count;
size_t pages_per_block;
size_t page_data_size;
size_t page_spare_size;
} aos_mtd_info_t;
typedef struct {
uint64_t offset;
size_t size;
} aos_mtd_erase_args_t;
typedef struct {
uint64_t page;
size_t data_offset;
void *data_buf;
size_t data_count;
size_t spare_offset;
void *spare_buf;
size_t spare_count;
} aos_mtd_read_page_args_t;
typedef struct {
uint64_t page;
size_t data_offset;
const void *data_buf;
size_t data_count;
size_t spare_offset;
const void *spare_buf;
size_t spare_count;
} aos_mtd_write_page_args_t;
#define AOS_MTD_IOC_GET_INFO 0x4D01
#define AOS_MTD_IOC_ERASE 0x4D02
#define AOS_MTD_IOC_READ_PAGE 0x4D03
#define AOS_MTD_IOC_WRITE_PAGE 0x4D04
#define AOS_MTD_IOC_ERASE_BLOCK 0x4D05
#define AOS_MTD_IOC_IS_BAD_BLOCK 0x4D06
#define AOS_MTD_IOC_MARK_BAD_BLOCK 0x4D07
#endif /* (defined(AOS_KERNEL_BUILD) && defined(AOS_COMP_DEVFS)) || !defined(AOS_KERNEL_BUILD) */
#ifdef AOS_KERNEL_BUILD
typedef aos_dev_ref_t aos_flashpart_ref_t;
typedef struct {
uint32_t flash_id;
uint64_t block_start;
uint64_t block_count;
} aos_flashpart_info_t;
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Get a flash partition.
* @param ref Flash partition ref to operate.
* @param id Flash partition ID.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_flashpart_get(aos_flashpart_ref_t *ref, uint32_t id);
/**
* @brief Release a flash partition.
* @param ref Flash partition ref to operate.
* @return None.
*/
void aos_flashpart_put(aos_flashpart_ref_t *ref);
/**
* @brief Get information about a flash partition.
* @param ref Flash partition ref to operate.
* @param info Flash partition information structure.
* @param flash_info Flash device information structure.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_flashpart_get_info(aos_flashpart_ref_t *ref, aos_flashpart_info_t *info, aos_flash_info_t *flash_info);
/**
* @brief Read data from a flash partition.
* @param ref Flash partition ref to operate.
* @param offset Offset from the start of the flash partition.
* @param buf Data buffer.
* @param count Number of bytes to read.
* @return >= 0 and <= ECC strength: bit-flips corrected; AOS_FLASH_ECC_ERROR: on ECC error; < 0: on failure.
*/
aos_status_t aos_flashpart_read(aos_flashpart_ref_t *ref, uint64_t offset, void *buf, size_t count);
/**
* @brief Write data to a flash partition.
* @param ref Flash partition ref to operate.
* @param offset Offset from the start of the flash partition.
* @param buf Data buffer.
* @param count Number of bytes to write.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_flashpart_write(aos_flashpart_ref_t *ref, uint64_t offset, const void *buf, size_t count);
/**
* @brief Erase an area on a flash partition.
* @param ref Flash partition ref to operate.
* @param offset Offset from the start of the flash partition.
* @param size The size of the area to erase in bytes.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_flashpart_erase(aos_flashpart_ref_t *ref, uint64_t offset, size_t size);
/**
* @brief Read data from a page.
* @param ref Flash partition ref to operate.
* @param page Page to operate.
* @param data_offset Offset from the start of the in-band area.
* @param data_buf In-band buffer.
* @param data_count Number of bytes to read from the in-band area.
* @param spare_offset Offset from the start of the out-of-band area.
* @param spare_buf Out-of-band buffer.
* @param spare_count Number of bytes to read from the out-of-band area.
* @return >= 0 and <= ECC strength: bit-flips corrected; AOS_FLASH_ECC_ERROR: on ECC error; < 0: on failure.
*/
aos_status_t aos_flashpart_read_page(aos_flashpart_ref_t *ref, uint64_t page,
size_t data_offset, void *data_buf, size_t data_count,
size_t spare_offset, void *spare_buf, size_t spare_count);
/**
* @brief Write data to a page.
* @param ref Flash partition ref to operate.
* @param page Page to operate.
* @param data_offset Offset from the start of the in-band area.
* @param data_buf In-band buffer.
* @param data_count Number of bytes to write to the in-band area.
* @param spare_offset Offset from the start of the out-of-band area.
* @param spare_buf Out-of-band buffer.
* @param spare_count Number of bytes to write to the out-of-band area.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_flashpart_write_page(aos_flashpart_ref_t *ref, uint64_t page,
size_t data_offset, const void *data_buf, size_t data_count,
size_t spare_offset, const void *spare_buf, size_t spare_count);
/**
* @brief Erase a block.
* @param ref Flash partition ref to operate.
* @param block Block to operate.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_flashpart_erase_block(aos_flashpart_ref_t *ref, uint64_t block);
/**
* @brief Check the bad block mark.
* @param ref Flash partition ref to operate.
* @param block Block to operate.
* @return 0: good block; 1: bad block; < 0: on failure.
*/
aos_status_t aos_flashpart_is_bad_block(aos_flashpart_ref_t *ref, uint64_t block);
/**
* @brief Mark a bad block.
* @param ref Flash partition ref to operate.
* @param block Block to operate.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_flashpart_mark_bad_block(aos_flashpart_ref_t *ref, uint64_t block);
#ifdef __cplusplus
}
#endif
#endif /* AOS_KERNEL_BUILD */
/** @} */
#endif /* AOS_FLASHPART_H */
| YifuLiu/AliOS-Things | components/drivers/peripheral/flash/include/aos/flashpart.h | C | apache-2.0 | 6,540 |
/*
* Copyright (C) 2020-2021 Alibaba Group Holding Limited
*/
#ifndef AOS_FLASHPART_CORE_H
#define AOS_FLASHPART_CORE_H
#include <aos/device_core.h>
#include <aos/flashpart.h>
typedef struct {
aos_dev_t dev;
aos_flash_ref_t flash_ref;
aos_flash_info_t flash_info;
/* must be initialized before registration */
uint32_t flash_id;
uint64_t block_start;
uint64_t block_count;
} aos_flashpart_t;
#ifdef __cplusplus
extern "C" {
#endif
aos_status_t aos_flashpart_register(aos_flashpart_t *flashpart);
aos_status_t aos_flashpart_register_argumented(aos_flashpart_t *flashpart, uint32_t id, uint32_t flash_id,
uint32_t block_start, uint64_t block_count);
aos_status_t aos_flashpart_unregister(uint32_t id);
#ifdef __cplusplus
}
#endif
#endif /* AOS_FLASHPART_CORE_H */
| YifuLiu/AliOS-Things | components/drivers/peripheral/flash/include/aos/flashpart_core.h | C | apache-2.0 | 847 |
/*
* Copyright (C) 2015-2017 Alibaba Group Holding Limited
*/
#ifndef AOS_HAL_FLASH_H
#define AOS_HAL_FLASH_H
typedef enum {
HAL_PARTITION_ERROR = -1,
HAL_PARTITION_BOOTLOADER,
HAL_PARTITION_APPLICATION,
HAL_PARTITION_ATE,
HAL_PARTITION_OTA_TEMP,
HAL_PARTITION_RF_FIRMWARE,
HAL_PARTITION_PARAMETER_1,
HAL_PARTITION_PARAMETER_2,
HAL_PARTITION_PARAMETER_3,
HAL_PARTITION_PARAMETER_4,
HAL_PARTITION_BT_FIRMWARE,
HAL_PARTITION_SPIFFS,
HAL_PARTITION_LITTLEFS,
HAL_PARTITION_LITTLEFS2,
HAL_PARTITION_LITTLEFS3,
HAL_PARTITION_CUSTOM_1,
HAL_PARTITION_CUSTOM_2,
HAL_PARTITION_2ND_BOOT,
HAL_PARTITION_MBINS_APP,
HAL_PARTITION_MBINS_KERNEL,
HAL_PARTITION_GPT,
HAL_PARTITION_ENV,
HAL_PARTITION_ENV_REDUND,
HAL_PARTITION_RTOSA,
HAL_PARTITION_RTOSB,
HAL_PARTITION_BOOT1,
HAL_PARTITION_BOOT1_REDUND,
HAL_PARTITION_FTL,
HAL_PARTITION_MAX,
HAL_PARTITION_NONE,
} hal_partition_t;
/* deprecated */
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
#define PAR_OPT_READ_POS (0)
#define PAR_OPT_WRITE_POS (1)
#define PAR_OPT_READ_MASK (0x1u << PAR_OPT_READ_POS)
#define PAR_OPT_WRITE_MASK (0x1u << PAR_OPT_WRITE_POS)
#define PAR_OPT_READ_DIS (0x0u << PAR_OPT_READ_POS)
#define PAR_OPT_READ_EN (0x1u << PAR_OPT_READ_POS)
#define PAR_OPT_WRITE_DIS (0x0u << PAR_OPT_WRITE_POS)
#define PAR_OPT_WRITE_EN (0x1u << PAR_OPT_WRITE_POS)
typedef enum {
HAL_FLASH_EMBEDDED,
HAL_FLASH_SPI,
HAL_FLASH_QSPI,
HAL_FLASH_MAX,
HAL_FLASH_NONE,
} hal_flash_t;
typedef enum {
HAL_FLASH_ERR_OK, /* operation success */
HAL_FLASH_ERR_NAND_BAD, /* Bad block */
HAL_FLASH_ERR_NAND_READ, /* Read fail, can't correct */
HAL_FLASH_ERR_NAND_WRITE, /* Write fail */
HAL_FLASH_ERR_NAND_ERASE, /* Erase fail */
HAL_FLASH_ERR_NAND_FLIPS, /* Too many bitflips, uncorrected */
/* add more hereafter */
} hal_flash_err_t;
typedef struct {
hal_flash_t partition_owner;
const char *partition_description;
uint32_t partition_start_addr;
uint32_t partition_length;
uint32_t partition_options;
} hal_logic_partition_t;
typedef struct {
hal_partition_t p; // partition index
char *descr; // partition description
uint32_t offset; // start address, in byte unit
uint32_t siz; // parition size, in byte uint
uint32_t ssiz; // sector size, in byte unit. Set it to page size for NAND
uint32_t bsiz; // block size, in byte unit.
} hal_mtdpart_info_t;
/**
* init flash partition
*
* @param[in] in_partition The target flash logical partition
*
* @return 0: On success， otherwise is error
*/
int32_t hal_flash_init(hal_partition_t in_partition);
/**
* Get the information of the specified flash area
*
* @param[in] in_partition The target flash logical partition
* @param[in] partition The buffer to store partition info
*
* @return 0: On success， otherwise is error
*/
int32_t hal_flash_info_get(hal_partition_t in_partition, hal_logic_partition_t *partition);
/**
* Get the information of all the flash partitions
*
* @param[in/out] result_errar The pointer to the array of MTD partition info
* @param[in/out] cnt The count of the items in the result array
*
* @return 0 on success, otherwise failure.
*
* @note Caller is responsible to free the result array memory.
*/
int32_t hal_flash_mtdpart_info_get(hal_mtdpart_info_t **result_array, int *cnt);
/**
* Erase an area on a Flash logical partition
*
* @note Erase on an address will erase all data on a sector that the
* address is belonged to, this function does not save data that
* beyond the address area but in the affected sector, the data
* will be lost.
*
* @param[in] in_partition The target flash logical partition which should be erased
* @param[in] off_set Start address of the erased flash area
* @param[in] size Size of the erased flash area
*
* @return 0 : On success, EIO : If an error occurred with any step
*/
int32_t hal_flash_erase(hal_partition_t in_partition, uint32_t off_set, uint32_t size);
/**
* Write data to an area on a flash logical partition without erase
*
* @param[in] in_partition The target flash logical partition which should be read which should be written
* @param[in] off_set Point to the start address that the data is written to, and
* point to the last unwritten address after this function is
* returned, so you can call this function serval times without
* update this start address.
* @param[in] inBuffer point to the data buffer that will be written to flash
* @param[in] inBufferLength The length of the buffer
*
* @return 0 : On success, EIO : If an error occurred with any step
*/
int32_t hal_flash_write(hal_partition_t in_partition, uint32_t *off_set,
const void *in_buf, uint32_t in_buf_len);
/**
* Write data to an area on a flash logical partition with erase first
*
* @param[in] in_partition The target flash logical partition which should be read which should be written
* @param[in] off_set Point to the start address that the data is written to, and
* point to the last unwritten address after this function is
* returned, so you can call this function serval times without
* update this start address.
* @param[in] inBuffer point to the data buffer that will be written to flash
* @param[in] inBufferLength The length of the buffer
*
* @return 0 : On success, EIO : If an error occurred with any step
*/
int32_t hal_flash_erase_write(hal_partition_t in_partition, uint32_t *off_set,
const void *in_buf, uint32_t in_buf_len);
/**
* Read data from an area on a Flash to data buffer in RAM
*
* @param[in] in_partition The target flash logical partition which should be read
* @param[in] off_set Point to the start address that the data is read, and
* point to the last unread address after this function is
* returned, so you can call this function serval times without
* update this start address.
* @param[in] outBuffer Point to the data buffer that stores the data read from flash
* @param[in] inBufferLength The length of the buffer
*
* @return 0 : On success, EIO : If an error occurred with any step
*/
int32_t hal_flash_read(hal_partition_t in_partition, uint32_t *off_set,
void *out_buf, uint32_t in_buf_len);
/**
* Set security options on a logical partition
*
* @param[in] partition The target flash logical partition
* @param[in] offset Point to the start address that the data is read, and
* point to the last unread address after this function is
* returned, so you can call this function serval times without
* update this start address.
* @param[in] size Size of enabled flash area
*
* @return 0 : On success, EIO : If an error occurred with any step
*/
int32_t hal_flash_enable_secure(hal_partition_t partition, uint32_t off_set, uint32_t size);
/**
* Disable security options on a logical partition
*
* @param[in] partition The target flash logical partition
* @param[in] offset Point to the start address that the data is read, and
* point to the last unread address after this function is
* returned, so you can call this function serval times without
* update this start address.
* @param[in] size Size of disabled flash area
*
* @return 0 : On success, EIO : If an error occurred with any step
*/
int32_t hal_flash_dis_secure(hal_partition_t partition, uint32_t off_set, uint32_t size);
/**
* Convert physical address to logic partition id and offset in partition
*
* @param[out] in_partition Point to the logic partition id
* @param[out] off_set Point to the offset in logic partition
* @param[in] addr The physical address
*
* @return 0 : On success, EIO : If an error occurred with any step
*/
int32_t hal_flash_addr2offset(hal_partition_t *in_partition, uint32_t *off_set, uint32_t addr);
#ifdef __cplusplus
}
#endif
#endif /* AOS_HAL_FLASH_H */
| YifuLiu/AliOS-Things | components/drivers/peripheral/flash/include/aos/hal/flash.h | C | apache-2.0 | 8,615 |
/*
* Copyright (C) 2015-2021 Alibaba Group Holding Limited
*/
/**
* This file is created to support Linux style use of mtd device.
* Currently only part definitions of linux's mtd-api.h are supported.
*/
#ifndef __AOS_MTD_ABI_H
#define __AOS_MTD_ABI_H
#include <stdint.h>
struct erase_info_user {
uint32_t start;
uint32_t length;
};
struct mtd_info_user {
uint8_t type;
uint32_t flags;
uint32_t size; /* Total size of the MTD */
uint32_t erasesize;
uint32_t writesize;
uint32_t oobsize; /* Amount of OOB data per block (e.g. 16) */
uint64_t padding; /* Old obsolete field; do not use */
};
#endif /* __AOS_MTD_ABI_H */
| YifuLiu/AliOS-Things | components/drivers/peripheral/flash/include/aos/mtd-abi.h | C | apache-2.0 | 679 |
/*
* Copyright (C) 2015-2021 Alibaba Group Holding Limited
*/
#ifndef __AOS_MTD_H
#define __AOS_MTD_H
#include <stddef.h>
#include <stdint.h>
#include <aos/kernel.h>
#include <aos/device_core.h>
#define MTD_TYPE_NOR 1
#define MTD_TYPE_NAND 2
#define MTD_DEVICE_NAME_PREFIX "mtdblock"
#define MTD_DEVICE_NAME_FORMAT MTD_DEVICE_NAME_PREFIX "%u"
#define MTD_PARTITION_NAME_MAX 16
#define MTD_DEVICE_NAME_MAX 16
#define IOC_MTD_BASE 'M'
#define IOC_MTD_GET_SIZE (IOC_MTD_BASE + 0x1)
#define IOC_MTD_GET_OFFSET (IOC_MTD_BASE + 0x2)
#define IOC_MTD_ERASE (IOC_MTD_BASE + 0x3)
/* standard partition names */
#define MTD_PART_NAME_BOOTLOADER "BOOT" /*Bootloader*/
#define MTD_PART_NAME_BOOTLOADER_SEC "BOOTSEC" /*Secure Boot*/
#define MTD_PART_NAME_2ND_BOOTLOADER "BOOT2A" /*The 2nd bootloader*/
#define MTD_PART_NAME_2ND_BOOTLOADER2 "BOOT2B" /*The 2nd bootloader backup*/
#define MTD_PART_NAME_ENV "ENV" /* Eviroment, e.g. for OTA*/
#define MTD_PART_NAME_ENV2 "ENV2" /* Enviroment, e.g. others.*/
#define MTD_PART_NAME_DTB "DTB"
#define MTD_PART_NAME_KERNEL "KERNEL"
#define MTD_PART_NAME_KERNEL2 "KERNEL2"
#define MTD_PART_NAME_ROMFS "ROMFS"
#define MTD_PART_NAME_ROMFS2 "ROMFS2"
#define MTD_PART_NAME_LITTLEFS "LFS"
#define MTD_PART_NAME_LITTLEFS2 "LFS2"
#define MTD_PART_NAME_APP "APP"
#define MTD_PART_NAME_FACTORY "FACTORY" /* Factory data*/
#define MTD_PART_NAME_FACTORY2 "FACTORY2" /* Factory data backup */
#define MTD_PART_NAME_KV "KV"
#define MTD_PART_NAME_UNKNOWN "UNKNOWN"
/**
* MTD operation modes
*
* @MTD_OPM_PLACE_OOB: OOB data are placed at the given offset (default)
* @MTD_OPM_AUTO_OOB: OOB data are automatically placed at the free areas
* @MTD_OPM_RAW: data are transferred as-is, with no error correction;
*/
enum mtd_opm {
MTD_OPM_PLACE_OOB = 0,
MTD_OPM_AUTO_OOB = 1,
MTD_OPM_RAW = 2,
};
struct mtd_erase_info {
unsigned long offset;
unsigned long length;
};
struct mtd_oob_region {
uint8_t offset;
uint8_t length;
};
typedef struct mtd_info {
aos_dev_t dev;
const struct mtd_ops *ops;
uint16_t oob_size;
uint16_t sector_size; /* Minimal writable flash unit size */
uint32_t block_size:28; /* Erase size for the device */
uint32_t type:4;
size_t size; /* Total size of the MTD */
off_t offset; /* At which this MTD starts, from the beginning of the MEMORY */
struct mtd_info *master;
void *priv;
} aos_mtd_t;
struct mtd_io_desc {
uint8_t mode; /* operation mode(enum mtd_opm) */
uint8_t ooblen; /* number of oob bytes to write/read */
uint8_t oobretlen; /* number of oob bytes written/read */
uint8_t ooboffs; /* offset in the oob area */
uint8_t *oobbuf;
size_t datlen; /* number of data bytes to write/read */
size_t datretlen; /* number of data bytes written/read */
uint8_t *datbuf; /* if NULL only oob are read/written */
};
struct mtd_ops {
int (*erase)(aos_mtd_t *mtd, off_t addr, size_t len); /* return 0 if success */
int (*read)(aos_mtd_t *mtd, off_t from, struct mtd_io_desc *ops); /* return 0 if success */
int (*write)(aos_mtd_t *mtd, off_t to, struct mtd_io_desc *ops); /* return 0 if success */
int (*isbad)(aos_mtd_t *mtd, uint32_t block); /* return 1 if bad, 0 not bad */
int (*markbad)(aos_mtd_t *mtd, uint32_t block); /* return 0 if success */
};
struct mtd_part {
const char *name; /* platform specific name of the MTD partition provided, optionally to be the same as name_std */
const char *name_std; /* standard name of the MTD partition define in alios */
off_t offset; /* start addr of partion */
size_t size; /* size of partion */
};
struct mtd_part_info {
off_t offset; /* start addr of partion */
size_t size; /* size of partion */
char part_name[MTD_PARTITION_NAME_MAX]; /* original name of the MTD partition, usually provided by platform */
char part_name_std[MTD_PARTITION_NAME_MAX]; /* standard name of the MTD partition, defined by alios */
char dev_name[MTD_DEVICE_NAME_MAX]; /* device name of the MTD partition */
};
/**
* Open a mtd device
*
* @param[in] name partition name
*
* @return A mtd device handle, NULL: error
*/
aos_mtd_t *aos_mtd_open(const char *name);
/**
* Close a mtd device
*
* @param[in] mtd A mtd device handle
*
* @return 0:success, <0: error
*/
aos_status_t aos_mtd_close(aos_mtd_t *mtd);
/**
* Read data from mtd device
*
* @param[in] mtd A mtd device handle
* @param[in] offset The offset address of mtd device which read from
* @param[out] buf The buffer to store data read from mtd device
* @param[in] size The size of request to read
*
* @return >0：The size of data that really read; 0: end of device; <0: error
*/
ssize_t aos_mtd_read(aos_mtd_t *mtd, off_t offset, void *buf, size_t size);
/**
* Read out-of-band data from mtd device
*
* @param[in] mtd A mtd device handle
* @param[in] offset The offset address of mtd device which read from
* @param[in] info The description information of mtd IO
*
* @return >0：The size of out-of-band data that really read; 0: end of device; <0: error
*/
ssize_t aos_mtd_oob_read(aos_mtd_t *mtd, off_t offset, struct mtd_io_desc *info);
/**
* Write data to mtd device
*
* @param[in] mtd A mtd device handle
* @param[in] offset The offset address of mtd device which write to
* @param[in] buf The buffer to store data to be written
* @param[in] size The size of request to write
* @return >0：The size of data that really be written; <0: error
*/
ssize_t aos_mtd_write(aos_mtd_t *mtd, off_t offset, const void *buf, size_t size);
/**
* Write out-of-band data to mtd device
*
* @param[in] mtd A mtd device handle
* @param[in] offset The offset address of mtd device which write to
* @param[in] info The description information of mtd IO
*
* @return >0：The size of out-of-band data that really written; <0: error
*/
ssize_t aos_mtd_oob_write(aos_mtd_t *mtd, off_t offset, struct mtd_io_desc *info);
/**
* Erase a region of mtd device
*
* @param[in] mtd A mtd device handle
* @param[in] offset The offset address of mtd device to be erased
* @param[in] size The size of request to be erased
*
* @return 0: success, <0: error
*/
aos_status_t aos_mtd_erase(aos_mtd_t *mtd, off_t offset, size_t size);
/**
* Erase a block of mtd device
*
* @param[in] mtd A mtd device handle
* @param[in] block The block index to be erased
*
* @return 0: success, <0: error
*/
aos_status_t aos_mtd_block_erase(aos_mtd_t *mtd, uint32_t block);
/**
* Mark a block of mtd device as bad
*
* @param[in] mtd A mtd device handle
* @param[in] block The block index to be marked
*
* @return 0: success, <0: error
*/
aos_status_t aos_mtd_block_mark_bad(aos_mtd_t *mtd, uint32_t block);
/**
* Check if a block of mtd device is bad
*
* @param[in] mtd A mtd device handle
* @param[in] block The block index to be checked
*
* @return 0: success, <0: error
*/
aos_status_t aos_mtd_block_is_bad(aos_mtd_t *mtd, uint32_t block);
/**
* Get mtd partition information
* @note The caller should free the info memory that is allocated in function.
*
* @param[in,out] info The pointer to Mtd partition information
* @param[in,out] cnt The total mtd partition count
*
* @return 0: success, <0: error
*/
int aos_mtd_part_info_get(struct mtd_part_info **info, int *cnt);
/**
* Register mtd partitions
* @note Register a mtd chip with partition information
*
* @param[in] master The pointer to a mtd chip which will be registered
* @param[in] parts The pointer to mtd partition information
* @param[in] np partition count
*
* @return 0: success, <0: error
*/
int aos_mtd_register(aos_mtd_t *master, const struct mtd_part *parts, int np);
#endif /*__AOS_MTD_H*/
| YifuLiu/AliOS-Things | components/drivers/peripheral/flash/include/aos/mtd.h | C | apache-2.0 | 7,995 |
/*
* Copyright (C) 2015-2021 Alibaba Group Holding Limited
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef __AOS_MTDNAND_H
#define __AOS_MTDNAND_H
#include <aos/mtd.h>
/* Status bits */
#define NAND_STATUS_FAIL 0x01
#define NAND_STATUS_FAIL_N1 0x02
#define NAND_STATUS_WP 0x80
typedef enum {
NAND_CMD_PAGE_RD, /* read data to chip's page buffer,do WaitBusy after this cmd in low driver */
NAND_CMD_PAGE_WR0, /* write data to chip's page buffer */
NAND_CMD_PAGE_WR1, /* do flash programe */
NAND_CMD_BLK_ERASE, /* erase block */
NAND_CMD_ECC_EN, /* enable gen HWECC */
NAND_CMD_ECC_DIS /* disable gen HWECC */
} nand_cmd_t;
typedef enum {
NAND_ECCM_NONE,
NAND_ECCM_HW,
} nand_eccmode_t;
struct nand_chip;
struct nand_ops;
/**
* struct nand_buffers - buffer structure for read/write
* @ecccalc: buffer pointer for calculated ECC, size is oobsize.
* @ecccode: buffer pointer for ECC read from flash, size is oobsize.
*
*/
struct nand_buffers {
uint8_t *ecccalc;
uint8_t *ecccode;
};
struct nand_ecc {
uint8_t mode; /* nand_eccmode_t */
uint8_t bytes; /* gen ecc bytes per ecc step(usually 3) */
uint16_t stepsize:12; /* min 256 */
uint16_t _step:4; /* */
/* driver must set the two interface if HWECC */
void (*calculate)(struct nand_chip *chip, const uint8_t *dat, uint8_t *ecc_code);
/* return max bit flips if can't correct,return -1 ECC is error(0 success) */
int (*correct)(struct nand_chip *chip, uint8_t *dat, uint8_t *read_ecc, uint8_t *calc_ecc);
/* ignore if NONECC */
const struct mtd_oob_region *layout;
};
typedef struct nand_chip {
aos_mtd_t parent;
/* driver must init these */
const struct nand_ops *ops;
struct nand_ecc ecc;
const struct mtd_oob_region *freelayout;
/* driver do not touch */
struct nand_buffers buffers;
uint8_t *oob_poi;
uint8_t *pagebuf;
uint32_t size;
uint16_t oobsize;
uint8_t pages_pb;
uint16_t page_size;
int (*read_page)(struct nand_chip *chip, uint8_t *buf, int oob_required, int page);
int (*write_page)(struct nand_chip *chip, const uint8_t *buf, int oob_required, int page);
} aos_nand_t;
struct nand_ops {
/* send nand operation cmd, return Status bits(0 success),
* if nand is busy please wait in low driver
*/
int (*cmdfunc)(aos_nand_t *nand, int cmd, int page, int offset);
/* read data from nand chip's page buffer */
int (*read_buf)(aos_nand_t *nand, uint8_t *buf, int len);
/* write data to nand chip's page buffer */
int (*write_buf)(aos_nand_t *nand, const uint8_t *buf, int len);
/* if NULL OOB[0] used as bad mark(not 0xff is bad) */
int (*isbad)(aos_nand_t *nand, uint32_t blk);
/* if NULL OOB[0] used as bad mark(set to 0x00) */
int (*markbad)(aos_nand_t *nand, uint32_t blk);
};
int aos_mtd_nand_init(aos_nand_t *nand, int blk_size, int page_size, int oob_size);
#endif /* __AOS_MTDNAND_H */
| YifuLiu/AliOS-Things | components/drivers/peripheral/flash/include/aos/mtdnand.h | C | apache-2.0 | 2,967 |
/*
* Copyright (C) 2015-2021 Alibaba Group Holding Limited
*/
#ifndef __AOS_MTDNOR_H
#define __AOS_MTDNOR_H
#include <aos/mtd.h>
int aos_mtd_nor_init(aos_mtd_t *nor, int blksize, int sector_size);
#endif /*__AOS_MTDNOR_H*/
| YifuLiu/AliOS-Things | components/drivers/peripheral/flash/include/aos/mtdnor.h | C | apache-2.0 | 229 |
/*
* Copyright (C) 2015-2021 Alibaba Group Holding Limited
*/
#include <stdint.h>
#ifndef __AOS_PART_H
#define __AOS_PART_H
typedef struct {
const char *partition_name; /* vendor custom partition name */
const char *partition_name_std; /* standard partition name */
uint32_t partition_start_addr; /* partition start address*/
uint32_t partition_length; /* partition length */
uint32_t partition_options; /* reserved*/
} mtd_partition_t;
extern const mtd_partition_t mtd_partitions[];
extern const int mtd_partitions_amount;
#endif /*__AOS_PART_H*/ | YifuLiu/AliOS-Things | components/drivers/peripheral/flash/include/aos/mtdpart.h | C | apache-2.0 | 603 |
/*
* Copyright ( C) 2015-2020 Alibaba Group Holding Limited
*/
#ifndef _IO_FLASH_H_
#define _IO_FLASH_H_
#ifdef __cplusplus
extern "C" {
#endif
/** @defgroup flash_device_api flash
* @ingroup driver_api
* @{
*/
/* Flash设备IOCTL命令 */
#define IOC_FLASH_BASE 'F'
#define IOC_FLASH_ERASE_FLASH (IOC_FLASH_BASE + 0x1) /**< 擦除Flash */
#define IOC_FLASH_INFO_GET (IOC_FLASH_BASE + 0x2) /**< 获取Flash信息 */
#define IOC_FLASH_ENABLE_SECURE (IOC_FLASH_BASE + 0x4) /**< 使能Flash的安全区域 */
#define IOC_FLASH_DISABLE_SECURE (IOC_FLASH_BASE + 0x8) /**< 关闭Flash的安全区域 */
#define IOC_BOOT_BASE 'O'
/* OTA function ioctl ID */
#define IOC_FLASH_SET_BOOT_INFO (IOC_FLASH_BASE + IOC_BOOT_BASE + 0x0) /**< 设置Boot信息 */
#define IOC_FLASH_CLEAR_BOOT_COUNT (IOC_FLASH_BASE + IOC_BOOT_BASE + 0x1) /**< 清理Boot信息 */
#define IOC_FLASH_GET_BOOT_TYPE (IOC_FLASH_BASE + IOC_BOOT_BASE + 0x2) /**< 获取Boot类型 */
/**
* 注册Flash设备驱动到VFS框架
*
* @return 0：成功，否则失败
*/
int vfs_flash_drv_init (void);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /*_IO_FLASH_H_*/
| YifuLiu/AliOS-Things | components/drivers/peripheral/flash/include/vfsdev/flash_dev.h | C | apache-2.0 | 1,175 |
/*
* Copyright (C) 2020-2021 Alibaba Group Holding Limited
*/
#include <aos/flash_core.h>
aos_status_t aos_flash_get(aos_flash_ref_t *ref, uint32_t id)
{
return aos_dev_get(ref, AOS_DEV_TYPE_FLASH, id);
}
void aos_flash_put(aos_flash_ref_t *ref)
{
aos_dev_put(ref);
}
aos_status_t aos_flash_get_info(aos_flash_ref_t *ref, aos_flash_info_t *info)
{
aos_flash_t *flash;
if (!ref || !aos_dev_ref_is_valid(ref) || !info)
return -EINVAL;
flash = aos_container_of(ref->dev, aos_flash_t, dev);
info->flags = flash->flags;
info->block_count = flash->block_count;
info->pages_per_block = flash->pages_per_block;
info->page_data_size = flash->page_data_size;
info->page_spare_size = flash->page_spare_size;
return 0;
}
aos_status_t aos_flash_read(aos_flash_ref_t *ref, uint64_t offset, void *buf, size_t count)
{
aos_flash_t *flash;
uint64_t full_size;
aos_status_t ret;
uint64_t i;
size_t j;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
flash = aos_container_of(ref->dev, aos_flash_t, dev);
full_size = flash->block_count * flash->pages_per_block * flash->page_data_size;
if (offset >= full_size || count > full_size - offset || count == 0 || !buf)
return -EINVAL;
for (i = offset / flash->page_data_size, j = 0, ret = 0; j < count; i++) {
size_t page_data_offset = (size_t)(j == 0 ? offset - i * flash->page_data_size : 0);
size_t page_data_count = count - j < flash->page_data_size - page_data_offset ?
count - j : flash->page_data_size - page_data_offset;
aos_status_t r;
r = aos_flash_read_page(ref, i, page_data_offset, (char *)buf + j, page_data_count, 0, NULL, 0);
if (r < 0) {
ret = r;
break;
} else {
ret = (r > ret) ? r : ret;
}
j += page_data_count;
}
return ret;
}
aos_status_t aos_flash_write(aos_flash_ref_t *ref, uint64_t offset, const void *buf, size_t count)
{
aos_flash_t *flash;
uint64_t full_size;
uint64_t i;
size_t j;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
flash = aos_container_of(ref->dev, aos_flash_t, dev);
full_size = flash->block_count * flash->pages_per_block * flash->page_data_size;
if (offset >= full_size || count > full_size - offset || count == 0 || !buf)
return -EINVAL;
for (i = offset / flash->page_data_size, j = 0; j < count; i++) {
size_t page_data_offset = (size_t)(j == 0 ? offset - i * flash->page_data_size : 0);
size_t page_data_count = count - j < flash->page_data_size - page_data_offset ?
count - j : flash->page_data_size - page_data_offset;
aos_status_t ret;
ret = aos_flash_write_page(ref, i, page_data_offset, (const char *)buf + j, page_data_count, 0, NULL, 0);
if (ret)
return ret;
j += page_data_count;
}
return 0;
}
aos_status_t aos_flash_erase(aos_flash_ref_t *ref, uint64_t offset, size_t size)
{
aos_flash_t *flash;
uint64_t full_size;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
flash = aos_container_of(ref->dev, aos_flash_t, dev);
full_size = flash->block_count * flash->pages_per_block * flash->page_data_size;
if (offset >= full_size || size > full_size - offset || size == 0)
return -EINVAL;
if (offset % ((uint64_t)flash->pages_per_block * flash->page_data_size))
return -EINVAL;
if (size % ((uint64_t)flash->pages_per_block * flash->page_data_size))
return -EINVAL;
for (uint64_t i = offset / ((uint64_t)flash->pages_per_block * flash->page_data_size);
i * flash->pages_per_block * flash->page_data_size < offset + size; i++) {
aos_status_t ret;
ret = aos_flash_erase_block(ref, i);
if (ret)
return ret;
}
return 0;
}
aos_status_t aos_flash_read_page(aos_flash_ref_t *ref, uint64_t page,
size_t data_offset, void *data_buf, size_t data_count,
size_t spare_offset, void *spare_buf, size_t spare_count)
{
aos_flash_t *flash;
aos_status_t ret;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
flash = aos_container_of(ref->dev, aos_flash_t, dev);
if (page >= flash->block_count * flash->pages_per_block)
return -EINVAL;
if (data_count == 0 && spare_count == 0)
return -EINVAL;
if (data_count) {
if (!data_buf || data_offset >= flash->page_data_size || data_count > flash->page_data_size - data_offset)
return -EINVAL;
} else {
if (data_buf || data_offset)
return -EINVAL;
}
if (spare_count) {
if (!spare_buf || spare_offset >= flash->page_spare_size || spare_count > flash->page_spare_size - spare_offset)
return -EINVAL;
} else {
if (spare_buf || spare_offset)
return -EINVAL;
}
aos_dev_lock(ref->dev);
ret = flash->ops->read_page(flash, page, data_offset, data_count, spare_offset, spare_count);
if (ret < 0) {
aos_dev_unlock(ref->dev);
return ret;
}
if (data_count) {
if (aos_umem_copy(data_buf, (const char *)flash->page_data_buf + data_offset, data_count)) {
aos_dev_unlock(ref->dev);
return -EFAULT;
}
}
if (spare_count) {
if (aos_umem_copy(spare_buf, (const char *)flash->page_spare_buf + spare_offset, spare_count)) {
aos_dev_unlock(ref->dev);
return -EFAULT;
}
}
aos_dev_unlock(ref->dev);
return ret;
}
aos_status_t aos_flash_write_page(aos_flash_ref_t *ref, uint64_t page,
size_t data_offset, const void *data_buf, size_t data_count,
size_t spare_offset, const void *spare_buf, size_t spare_count)
{
aos_flash_t *flash;
aos_status_t ret;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
flash = aos_container_of(ref->dev, aos_flash_t, dev);
if (page >= flash->block_count * flash->pages_per_block)
return -EINVAL;
if (data_count == 0 && spare_count == 0)
return -EINVAL;
if (data_count) {
if (!data_buf || data_offset >= flash->page_data_size || data_count > flash->page_data_size - data_offset)
return -EINVAL;
} else {
if (data_buf || data_offset)
return -EINVAL;
}
if (spare_count) {
if (!spare_buf || spare_offset >= flash->page_spare_size || spare_count > flash->page_spare_size - spare_offset)
return -EINVAL;
} else {
if (spare_buf || spare_offset)
return -EINVAL;
}
aos_dev_lock(ref->dev);
if (data_count) {
if (aos_umem_copy((char *)flash->page_data_buf + data_offset, data_buf, data_count)) {
aos_dev_unlock(ref->dev);
return -EFAULT;
}
}
if (spare_count) {
if (aos_umem_copy((char *)flash->page_spare_buf + spare_offset, spare_buf, spare_count)) {
aos_dev_unlock(ref->dev);
return -EFAULT;
}
}
ret = flash->ops->write_page(flash, page, data_offset, data_count, spare_offset, spare_count);
aos_dev_unlock(ref->dev);
return ret;
}
aos_status_t aos_flash_erase_block(aos_flash_ref_t *ref, uint64_t block)
{
aos_flash_t *flash;
aos_status_t ret;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
flash = aos_container_of(ref->dev, aos_flash_t, dev);
if (block >= flash->block_count)
return -EINVAL;
aos_dev_lock(ref->dev);
ret = flash->ops->erase_block(flash, block);
aos_dev_unlock(ref->dev);
return ret;
}
aos_status_t aos_flash_is_bad_block(aos_flash_ref_t *ref, uint64_t block)
{
aos_flash_t *flash;
aos_status_t ret;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
flash = aos_container_of(ref->dev, aos_flash_t, dev);
if (block >= flash->block_count)
return -EINVAL;
if (!flash->ops->is_bad_block)
return -ENOTSUP;
aos_dev_lock(ref->dev);
ret = flash->ops->is_bad_block(flash, block);
aos_dev_unlock(ref->dev);
return ret;
}
aos_status_t aos_flash_mark_bad_block(aos_flash_ref_t *ref, uint64_t block)
{
aos_flash_t *flash;
aos_status_t ret;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
flash = aos_container_of(ref->dev, aos_flash_t, dev);
if (block >= flash->block_count)
return -EINVAL;
if (!flash->ops->mark_bad_block)
return -ENOTSUP;
aos_dev_lock(ref->dev);
ret = flash->ops->mark_bad_block(flash, block);
aos_dev_unlock(ref->dev);
return ret;
}
static void dev_flash_unregister(aos_dev_t *dev)
{
aos_flash_t *flash = aos_container_of(dev, aos_flash_t, dev);
if (flash->ops->unregister)
flash->ops->unregister(flash);
}
static aos_status_t dev_flash_get(aos_dev_ref_t *ref)
{
aos_flash_t *flash = aos_container_of(ref->dev, aos_flash_t, dev);
if (!aos_dev_ref_is_first(ref))
return 0;
return flash->ops->startup(flash);
}
static void dev_flash_put(aos_dev_ref_t *ref)
{
aos_flash_t *flash = aos_container_of(ref->dev, aos_flash_t, dev);
if (!aos_dev_ref_is_last(ref))
return;
flash->ops->shutdown(flash);
}
static const aos_dev_ops_t dev_flash_ops = {
.unregister = dev_flash_unregister,
.get = dev_flash_get,
.put = dev_flash_put,
};
aos_status_t aos_flash_register(aos_flash_t *flash)
{
if (!flash)
return -EINVAL;
if (!flash->ops || !flash->ops->startup || !flash->ops->shutdown ||
!flash->ops->read_page || !flash->ops->write_page || !flash->ops->erase_block)
return -EINVAL;
switch (flash->flags & AOS_FLASH_F_TYPE_MASK) {
case AOS_FLASH_F_TYPE_NOR:
if (flash->ops->is_bad_block || flash->ops->mark_bad_block)
return -EINVAL;
if (aos_flash_flags_to_ecc_strength(flash->flags))
return -EINVAL;
if (flash->page_spare_size)
return -EINVAL;
break;
case AOS_FLASH_F_TYPE_NAND:
if (!flash->ops->is_bad_block || !flash->ops->mark_bad_block)
return -EINVAL;
break;
default:
return -EINVAL;
}
if (!flash->block_count || !flash->pages_per_block || !flash->page_data_size)
return -EINVAL;
if (UINT64_MAX / flash->pages_per_block < flash->page_data_size ||
UINT64_MAX / flash->block_count < (uint64_t)flash->pages_per_block * flash->page_data_size)
return -EINVAL;
if (!flash->page_data_buf)
return -EINVAL;
if ((flash->page_spare_size && !flash->page_spare_buf) || (!flash->page_spare_size && flash->page_spare_buf))
return -EINVAL;
flash->dev.type = AOS_DEV_TYPE_FLASH;
flash->dev.ops = &dev_flash_ops;
#ifdef AOS_COMP_DEVFS
aos_devfs_node_init(&flash->dev.devfs_node);
#endif
return aos_dev_register(&flash->dev);
}
aos_status_t aos_flash_register_argumented(aos_flash_t *flash, uint32_t id, const aos_flash_ops_t *ops,
uint32_t flags, uint64_t block_count, size_t pages_per_block,
size_t page_data_size, size_t page_spare_size,
void *page_data_buf, void *page_spare_buf)
{
if (!flash)
return -EINVAL;
flash->dev.id = id;
flash->ops = ops;
flash->flags = flags;
flash->block_count = block_count;
flash->pages_per_block = pages_per_block;
flash->page_data_size = page_data_size;
flash->page_spare_size = page_spare_size;
flash->page_data_buf = page_data_buf;
flash->page_spare_buf = page_spare_buf;
return aos_flash_register(flash);
}
aos_status_t aos_flash_unregister(uint32_t id)
{
return aos_dev_unregister(AOS_DEV_TYPE_FLASH, id);
}
| YifuLiu/AliOS-Things | components/drivers/peripheral/flash/src/flash.c | C | apache-2.0 | 12,071 |
/*
* Copyright (C) 2015-2021 Alibaba Group Holding Limited
*/
#include <aos/hal/flash.h>
#include <vfsdev/flash_dev.h>
#include <devicevfs/devicevfs.h>
#define PLATFORM_FLASH_NUM HAL_PARTITION_MAX
// FLASH device node will be named with "/dev/flash<x>", where <x> is flash port id
#define FLASH_DEV_NAME_FORMAT "flash%d"
__weak int32_t hal_flash_init(hal_partition_t in_partition) {
ddkc_warn("weak %s\r\n", __FUNCTION__);
return 0;
}
#ifdef AOS_MCU_OTA_ADAPT
// temp usage
#define IOCTL_FLASH_BOOT_VALIDATE() \
if (in_partition == HAL_PARTITION_LITTLEFS) { \
ddkc_warn("fs is not allowed to access boot operations\r\n"); \
return -EINVAL; \
}
extern int ota_set_user_bootinfo(void *param);
extern int ota_clear_reboot_count(void);
extern int ota_get_boot_type();
#endif
/*
offset set by lseek
*/
ssize_t flash_device_read (file_t *f, void *buffer, size_t size) {
int ret;
ssize_t s = 0;
hal_partition_t in_partition = (hal_partition_t)f->node->i_arg;
size_t offset = f->offset;
if (!buffer || !size) {
ddkc_warn("invalid flash:%d, offset:%d, buffer:%p or size:%d\r\n", in_partition, offset, buffer, size);
return -EINVAL;
}
ddkc_dbg("f->offset:%d, buffer:%p, size:%d\r\n", f->offset, buffer, size);
ret = hal_flash_read(in_partition, &f->offset, buffer, size);
if(ret < 0){
return -1;
} else {
if ((f->offset - offset) != size) {
ddkc_err("hal_flash_write returns success, but offset is not set\r\n");
}
}
s = f->offset - offset;
ddkc_dbg("read return %d\r\n", s);
return s;
}
/*
offset set by lseek
*/
ssize_t flash_device_write (file_t *f, const void *buffer, size_t size) {
int ret = 0;
ssize_t s = 0;
hal_partition_t in_partition = (hal_partition_t)f->node->i_arg;
size_t offset = f->offset;
if (!buffer || !size) {
ddkc_warn("invalid flash:%d, offset:%d, buffer:%p or size:%d\r\n", in_partition, offset, buffer, size);
return -EINVAL;
}
ret = hal_flash_write(in_partition, &f->offset, buffer, size);
ddkc_dbg("f->offset:%d, ret:%d\r\n", f->offset, ret);
if(ret < 0){
return -1;
} else {
if ((f->offset - offset) != size) {
ddkc_err("hal_flash_write returns success, but offset is not set\r\n");
}
}
s = f->offset - offset;
ddkc_dbg("write return %d\r\n", s);
return s;
}
static uint32_t flash_device_lseek(file_t *f, int64_t off, int32_t whence){
ddkc_dbg("f->offset:%x, off:%llx, whence:%d\r\n", f->offset, off, whence);
switch (whence) {
case SEEK_CUR:
off = f->offset + off;
break;
/* case SEEK_END: break; */
case SEEK_SET:
f->offset = off;
break;
}
return off;
}
/*
offset set by lseek
*/
int flash_device_ioctl (file_t *f, int cmd, unsigned long arg) {
int ret = 0;
hal_partition_t in_partition = (hal_partition_t)f->node->i_arg;
uint32_t offset = f->offset;
uint32_t size ;
hal_logic_partition_t *partition;
hal_logic_partition_t p;
if(!arg){
ddkc_warn("i_name:%s, flash:%d, cmd:%d, arg:0x%lx\r\n", f->node->i_name, in_partition, cmd, arg);
}
switch (cmd) {
case IOC_FLASH_ERASE_FLASH:
if (!arg)
return -EINVAL;
size = (uint32_t)arg;
ddkc_dbg("IOC_FLASH_ERASE_FLASH i_name:%s, flash:%d, cmd:%d, off_set:0x%x, size:0x%x\r\n", f->node->i_name, in_partition, cmd, offset, size);
ret = hal_flash_erase(in_partition,offset, size);
if (ret) {
ddkc_warn("hal_flash_erase failed, ret:%d\r\n", ret);
return -1;
}
break;
case IOC_FLASH_INFO_GET:
if (!arg)
return -EINVAL;
partition = (hal_logic_partition_t *)arg;
ddkc_dbg("IOC_FLASH_INFO_GET i_name:%s, flash:%d, cmd:%d\r\n", f->node->i_name, in_partition, cmd);
ret = hal_flash_info_get(in_partition, &p);
if (ret) {
ddkc_warn("hal_flash_info_get failed, ret:%d\r\n", ret);
return -1;
}
p.partition_description = NULL;
aos_ipc_copy(partition, &p, sizeof(hal_logic_partition_t));
break;
case IOC_FLASH_ENABLE_SECURE:
size = (uint32_t)arg;
ddkc_dbg("i_name:%s, flash:%d, cmd:%d, off_set:0x%x, size:0x%x\r\n", f->node->i_name, in_partition, cmd, offset, size);
ret = hal_flash_enable_secure(in_partition,offset, size);
if (ret) {
ddkc_warn("hal_flash_enable_secure failed, ret:%d\r\n", ret);
return -1;
}
break;
case IOC_FLASH_DISABLE_SECURE:
size = (uint32_t)arg;
ddkc_dbg("IOC_FLASH_DISABLE_SECURE i_name:%s, flash:%d, cmd:%d, off_set:0x%x, size:0x%x\r\n", f->node->i_name, in_partition, cmd, offset, size);
ret = hal_flash_dis_secure(in_partition,offset, size);
if (ret) {
ddkc_warn("hal_flash_dis_secure failed, ret:%d\r\n", ret);
return -1;
}
break;
#ifdef AOS_MCU_OTA_ADAPT
case IOC_FLASH_SET_BOOT_INFO:
IOCTL_FLASH_BOOT_VALIDATE();
ret = ota_set_user_bootinfo((void*)arg);
break;
case IOC_FLASH_CLEAR_BOOT_COUNT:
IOCTL_FLASH_BOOT_VALIDATE();
ret = ota_clear_reboot_count();
break;
case IOC_FLASH_GET_BOOT_TYPE:
IOCTL_FLASH_BOOT_VALIDATE();
ret = ota_get_boot_type();
break;
#endif
default:
break;
}
return ret;
}
int flash_device_open (inode_t *node, file_t *f) {
ddkc_dbg("open %s done\r\n", node->i_name);
return 0;
}
int flash_device_close (file_t *f) {
ddkc_dbg("close %s done\r\n", f->node->i_name);
return 0;
}
/************************** device ****************************/
subsys_file_ops_t flash_device_fops = {
.open = flash_device_open,
.close = flash_device_close,
.read = flash_device_read,
.write = flash_device_write,
.ioctl = flash_device_ioctl,
.poll = NULL,
.lseek = flash_device_lseek,
};
int flash_device_init (struct u_platform_device *pdev) {
// make sure 0 is returned if init operation success
// or aos_dev_reg procedure will break and no device node will be registered
int ret = 0;
void *user_data = NULL;
user_data = u_platform_get_user_data(pdev);
#if defined(USER_SPACE_DRIVER)
ret = hal_flash_init((hal_partition_t)user_data);
ddkc_info("%s hal_flash_init ret:%d\r\n", __func__, ret);
#else
ddkc_info("%s hal_flash_init USER_SPACE_DRIVER not defined\r\n", __func__);
#endif
return 0;
}
int flash_device_deinit (struct u_platform_device *pdev) {
ddkc_info("%s\r\n", __func__);
return 0;
}
int flash_device_pm (struct u_platform_device *pdev, u_pm_ops_t state) {
ddkc_info("%s\r\n", __func__);
return 0;
}
struct subsys_drv flash_device_drv = {
.drv_name = "flash",
.init = flash_device_init,
.deinit = flash_device_deinit,
.pm = flash_device_pm,
};
struct subsys_dev *g_flash_device_array[PLATFORM_FLASH_NUM];
extern const size_t hal_partitions_amount;
extern const hal_logic_partition_t hal_partitions[];
int vfs_flash_drv_init (void) {
int i = 0;
int j = 0;
int ret = 0;
int node_name_len = 0;
struct subsys_dev **ppsdev = NULL;
ddkc_info("flash vfs driver init starts, hal_partitions_amount:%d\r\n", hal_partitions_amount);
node_name_len = strlen(FLASH_DEV_NAME_FORMAT) + 1;
memset(g_flash_device_array, 0, sizeof(g_flash_device_array));
ppsdev = g_flash_device_array;
for (i = 0; i < hal_partitions_amount; i++) {
if(0 == hal_partitions[i].partition_length){
continue;
}
*ppsdev = malloc(sizeof(struct subsys_dev) + node_name_len);
if (!(*ppsdev)) {
ddkc_info("malloc for subsys_dev failed, \r\n");
goto err;
}
memset(*ppsdev, 0, sizeof(struct subsys_dev) + node_name_len);
(*ppsdev)->node_name = (char *)((*ppsdev) + 1);
snprintf((*ppsdev)->node_name, node_name_len, FLASH_DEV_NAME_FORMAT, i);
(*ppsdev)->permission = 0;
// please refer to definitions in enum SUBSYS_BUS_TYPE
(*ppsdev)->type = BUS_TYPE_PLATFORM;
// user_data will be passed to open operation via node->i_arg
(*ppsdev)->user_data = (void *)i;
ret = aos_dev_reg(*ppsdev, &flash_device_fops, &flash_device_drv);
if (ret) {
ddkc_err("aos_dev_reg for flash%d failed, ret:%d\r\n", i, ret);
free(*ppsdev);
*ppsdev = NULL;
goto err;
}
ppsdev++;
}
ddkc_dbg("flash vfs driver init finish, ret:%d\r\n", ret);
return 0;
err:
ppsdev = g_flash_device_array;
for (j = 0; j < i; j++) {
if (*ppsdev) {
aos_dev_unreg(*ppsdev);
ddkc_info("free memory for flash%d\r\n", j);
free(*ppsdev);
*ppsdev = NULL;
}
ppsdev++;
}
ddkc_err("flash vfs driver init failed, ret:%d\r\n", ret);
return ret;
}
VFS_DRIVER_ENTRY(vfs_flash_drv_init)
| YifuLiu/AliOS-Things | components/drivers/peripheral/flash/src/flash_dev.c | C | apache-2.0 | 9,357 |
/*
* Copyright (C) 2020-2021 Alibaba Group Holding Limited
*/
#include <aos/flashpart_core.h>
#ifdef AOS_COMP_DEVFS
#include <stdio.h>
#include <inttypes.h>
#endif
aos_status_t aos_flashpart_get(aos_flashpart_ref_t *ref, uint32_t id)
{
return aos_dev_get(ref, AOS_DEV_TYPE_FLASHPART, id);
}
void aos_flashpart_put(aos_flashpart_ref_t *ref)
{
aos_dev_put(ref);
}
aos_status_t aos_flashpart_get_info(aos_flashpart_ref_t *ref, aos_flashpart_info_t *info, aos_flash_info_t *flash_info)
{
aos_flashpart_t *flashpart;
if (!ref || !aos_dev_ref_is_valid(ref) || !info)
return -EINVAL;
flashpart = aos_container_of(ref->dev, aos_flashpart_t, dev);
info->flash_id = flashpart->flash_id;
info->block_start = flashpart->block_start;
info->block_count = flashpart->block_count;
if (flash_info)
*flash_info = flashpart->flash_info;
return 0;
}
aos_status_t aos_flashpart_read(aos_flashpart_ref_t *ref, uint64_t offset, void *buf, size_t count)
{
aos_flashpart_t *flashpart;
aos_flash_info_t *flash_info;
uint64_t part_offset;
uint64_t part_size;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
flashpart = aos_container_of(ref->dev, aos_flashpart_t, dev);
flash_info = &flashpart->flash_info;
part_offset = flashpart->block_start * flash_info->pages_per_block * flash_info->page_data_size;
part_size = flashpart->block_count * flash_info->pages_per_block * flash_info->page_data_size;
if (offset >= part_size || count > part_size - offset)
return -EINVAL;
return aos_flash_read(&flashpart->flash_ref, part_offset + offset, buf, count);
}
aos_status_t aos_flashpart_write(aos_flashpart_ref_t *ref, uint64_t offset, const void *buf, size_t count)
{
aos_flashpart_t *flashpart;
aos_flash_info_t *flash_info;
uint64_t part_offset;
uint64_t part_size;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
flashpart = aos_container_of(ref->dev, aos_flashpart_t, dev);
flash_info = &flashpart->flash_info;
part_offset = flashpart->block_start * flash_info->pages_per_block * flash_info->page_data_size;
part_size = flashpart->block_count * flash_info->pages_per_block * flash_info->page_data_size;
if (offset >= part_size || count > part_size - offset)
return -EINVAL;
return aos_flash_write(&flashpart->flash_ref, part_offset + offset, buf, count);
}
aos_status_t aos_flashpart_erase(aos_flashpart_ref_t *ref, uint64_t offset, size_t size)
{
aos_flashpart_t *flashpart;
aos_flash_info_t *flash_info;
uint64_t part_offset;
uint64_t part_size;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
flashpart = aos_container_of(ref->dev, aos_flashpart_t, dev);
flash_info = &flashpart->flash_info;
part_offset = flashpart->block_start * flash_info->pages_per_block * flash_info->page_data_size;
part_size = flashpart->block_count * flash_info->pages_per_block * flash_info->page_data_size;
if (offset >= part_size || size > part_size - offset)
return -EINVAL;
return aos_flash_erase(&flashpart->flash_ref, part_offset + offset, size);
}
aos_status_t aos_flashpart_read_page(aos_flashpart_ref_t *ref, uint64_t page,
size_t data_offset, void *data_buf, size_t data_count,
size_t spare_offset, void *spare_buf, size_t spare_count)
{
aos_flashpart_t *flashpart;
aos_flash_info_t *flash_info;
uint64_t page_start;
uint64_t num_pages;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
flashpart = aos_container_of(ref->dev, aos_flashpart_t, dev);
flash_info = &flashpart->flash_info;
page_start = flashpart->block_start * flash_info->pages_per_block;
num_pages = flashpart->block_count * flash_info->pages_per_block;
if (page >= num_pages)
return -EINVAL;
return aos_flash_read_page(&flashpart->flash_ref, page_start + page, data_offset, data_buf, data_count,
spare_offset, spare_buf, spare_count);
}
aos_status_t aos_flashpart_write_page(aos_flashpart_ref_t *ref, uint64_t page,
size_t data_offset, const void *data_buf, size_t data_count,
size_t spare_offset, const void *spare_buf, size_t spare_count)
{
aos_flashpart_t *flashpart;
aos_flash_info_t *flash_info;
uint64_t page_start;
uint64_t num_pages;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
flashpart = aos_container_of(ref->dev, aos_flashpart_t, dev);
flash_info = &flashpart->flash_info;
page_start = flashpart->block_start * flash_info->pages_per_block;
num_pages = flashpart->block_count * flash_info->pages_per_block;
if (page >= num_pages)
return -EINVAL;
return aos_flash_write_page(&flashpart->flash_ref, page_start + page, data_offset, data_buf, data_count,
spare_offset, spare_buf, spare_count);
}
aos_status_t aos_flashpart_erase_block(aos_flashpart_ref_t *ref, uint64_t block)
{
aos_flashpart_t *flashpart;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
flashpart = aos_container_of(ref->dev, aos_flashpart_t, dev);
if (block >= flashpart->block_count)
return -EINVAL;
return aos_flash_erase_block(&flashpart->flash_ref, flashpart->block_start + block);
}
aos_status_t aos_flashpart_is_bad_block(aos_flashpart_ref_t *ref, uint64_t block)
{
aos_flashpart_t *flashpart;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
flashpart = aos_container_of(ref->dev, aos_flashpart_t, dev);
if (block >= flashpart->block_count)
return -EINVAL;
return aos_flash_is_bad_block(&flashpart->flash_ref, flashpart->block_start + block);
}
aos_status_t aos_flashpart_mark_bad_block(aos_flashpart_ref_t *ref, uint64_t block)
{
aos_flashpart_t *flashpart;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
flashpart = aos_container_of(ref->dev, aos_flashpart_t, dev);
if (block >= flashpart->block_count)
return -EINVAL;
return aos_flash_mark_bad_block(&flashpart->flash_ref, flashpart->block_start + block);
}
static void dev_flashpart_unregister(aos_dev_t *dev)
{
}
static aos_status_t dev_flashpart_get(aos_dev_ref_t *ref)
{
aos_flashpart_t *flashpart = aos_container_of(ref->dev, aos_flashpart_t, dev);
aos_status_t ret;
if (!aos_dev_ref_is_first(ref))
return 0;
ret = aos_flash_get(&flashpart->flash_ref, flashpart->flash_id);
if (ret)
return ret;
ret = aos_flash_get_info(&flashpart->flash_ref, &flashpart->flash_info);
if (ret) {
aos_flash_put(&flashpart->flash_ref);
return ret;
}
if (flashpart->block_start >= flashpart->flash_info.block_count ||
flashpart->block_count > flashpart->flash_info.block_count - flashpart->block_start) {
aos_flash_put(&flashpart->flash_ref);
return -EINVAL;
}
return 0;
}
static void dev_flashpart_put(aos_dev_ref_t *ref)
{
aos_flashpart_t *flashpart = aos_container_of(ref->dev, aos_flashpart_t, dev);
if (!aos_dev_ref_is_last(ref))
return;
aos_flash_put(&flashpart->flash_ref);
}
static const aos_dev_ops_t dev_flashpart_ops = {
.unregister = dev_flashpart_unregister,
.get = dev_flashpart_get,
.put = dev_flashpart_put,
};
#ifdef AOS_COMP_DEVFS
static aos_status_t devfs_mtd_ioctl(aos_devfs_file_t *file, int cmd, uintptr_t arg)
{
aos_flashpart_ref_t *ref = aos_devfs_file2ref(file);
aos_status_t ret;
switch (cmd) {
case AOS_MTD_IOC_GET_INFO:
{
aos_flash_info_t flash_info;
aos_flashpart_info_t part_info;
aos_mtd_info_t info;
if (!aos_devfs_file_is_readable(file)) {
ret = -EPERM;
break;
}
ret = aos_flashpart_get_info(ref, &part_info, &flash_info);
if (ret)
break;
info.flash_id = part_info.flash_id;
info.flash_flags = flash_info.flags;
info.flash_block_count = flash_info.block_count;
info.block_start = part_info.block_start;
info.block_count = part_info.block_count;
info.pages_per_block = flash_info.pages_per_block;
info.page_data_size = flash_info.page_data_size;
info.page_spare_size = flash_info.page_spare_size;
if (!aos_umem_check((const void *)arg, sizeof(info))) {
ret = -EFAULT;
break;
}
ret = aos_umem_copy((void *)arg, &info, sizeof(info)) ? -EFAULT : 0;
}
break;
case AOS_MTD_IOC_ERASE:
{
aos_mtd_erase_args_t args;
if (!aos_devfs_file_is_writable(file)) {
ret = -EPERM;
break;
}
if (!aos_umem_check((const void *)arg, sizeof(args))) {
ret = -EFAULT;
break;
}
if (aos_umem_copy(&args, (const void *)arg, sizeof(args))) {
ret = -EFAULT;
break;
}
ret = aos_flashpart_erase(ref, args.offset, args.size);
}
break;
case AOS_MTD_IOC_READ_PAGE:
{
aos_mtd_read_page_args_t args;
if (!aos_devfs_file_is_readable(file)) {
ret = -EPERM;
break;
}
if (!aos_umem_check((const void *)arg, sizeof(args))) {
ret = -EFAULT;
break;
}
if (aos_umem_copy(&args, (const void *)arg, sizeof(args))) {
ret = -EFAULT;
break;
}
if (args.data_buf && !aos_umem_check(args.data_buf, args.data_count)) {
ret = -EFAULT;
break;
}
if (args.spare_buf && !aos_umem_check(args.spare_buf, args.spare_count)) {
ret = -EFAULT;
break;
}
ret = aos_flashpart_read_page(ref, args.page, args.data_offset, args.data_buf, args.data_count,
args.spare_offset, args.spare_buf, args.spare_count);
}
break;
case AOS_MTD_IOC_WRITE_PAGE:
{
aos_mtd_write_page_args_t args;
if (!aos_devfs_file_is_writable(file)) {
ret = -EPERM;
break;
}
if (!aos_umem_check((const void *)arg, sizeof(args))) {
ret = -EFAULT;
break;
}
if (aos_umem_copy(&args, (const void *)arg, sizeof(args))) {
ret = -EFAULT;
break;
}
if (args.data_buf && !aos_umem_check(args.data_buf, args.data_count)) {
ret = -EFAULT;
break;
}
if (args.spare_buf && !aos_umem_check(args.spare_buf, args.spare_count)) {
ret = -EFAULT;
break;
}
ret = aos_flashpart_write_page(ref, args.page, args.data_offset, args.data_buf, args.data_count,
args.spare_offset, args.spare_buf, args.spare_count);
}
break;
case AOS_MTD_IOC_ERASE_BLOCK:
{
uint64_t block;
if (!aos_devfs_file_is_writable(file)) {
ret = -EPERM;
break;
}
if (!aos_umem_check((const void *)arg, sizeof(block))) {
ret = -EFAULT;
break;
}
if (aos_umem_copy(&block, (const void *)arg, sizeof(block))) {
ret = -EFAULT;
break;
}
ret = aos_flashpart_erase_block(ref, block);
}
break;
case AOS_MTD_IOC_IS_BAD_BLOCK:
{
uint64_t block;
if (!aos_devfs_file_is_readable(file)) {
ret = -EPERM;
break;
}
if (!aos_umem_check((const void *)arg, sizeof(block))) {
ret = -EFAULT;
break;
}
if (aos_umem_copy(&block, (const void *)arg, sizeof(block))) {
ret = -EFAULT;
break;
}
ret = aos_flashpart_is_bad_block(ref, block);
}
break;
case AOS_MTD_IOC_MARK_BAD_BLOCK:
{
uint64_t block;
if (!aos_devfs_file_is_writable(file)) {
ret = -EPERM;
break;
}
if (!aos_umem_check((const void *)arg, sizeof(block))) {
ret = -EFAULT;
break;
}
if (aos_umem_copy(&block, (const void *)arg, sizeof(block))) {
ret = -EFAULT;
break;
}
ret = aos_flashpart_mark_bad_block(ref, block);
}
break;
default:
ret = -EINVAL;
break;
}
return ret;
}
static ssize_t devfs_mtd_read(aos_devfs_file_t *file, void *buf, size_t count)
{
aos_flashpart_ref_t *ref = aos_devfs_file2ref(file);
uint64_t offset = aos_devfs_file_get_position(file);
aos_status_t r;
if (!aos_devfs_file_is_readable(file))
return -EPERM;
if (count > SIZE_MAX / 2 - 1)
count = SIZE_MAX / 2 - 1;
if (buf && !aos_umem_check(buf, count))
return -EFAULT;
r = aos_flashpart_read(ref, offset, buf, count);
if (r)
return r;
aos_devfs_file_set_position(file, offset + count);
return count;
}
static ssize_t devfs_mtd_write(aos_devfs_file_t *file, const void *buf, size_t count)
{
aos_flashpart_ref_t *ref = aos_devfs_file2ref(file);
uint64_t offset = aos_devfs_file_get_position(file);
aos_status_t r;
if (!aos_devfs_file_is_writable(file))
return -EPERM;
if (count > SIZE_MAX / 2 - 1)
count = SIZE_MAX / 2 - 1;
if (buf && !aos_umem_check(buf, count))
return -EFAULT;
r = aos_flashpart_write(ref, offset, buf, count);
if (r)
return r;
aos_devfs_file_set_position(file, offset + count);
return count;
}
static int64_t devfs_mtd_lseek(aos_devfs_file_t *file, int64_t offset, int whence)
{
aos_flashpart_ref_t *ref = aos_devfs_file2ref(file);
aos_flashpart_t *part = aos_container_of(ref->dev, aos_flashpart_t, dev);
uint64_t part_size = part->block_count * part->flash_info.pages_per_block * part->flash_info.page_data_size;
return aos_devfs_file_lseek_sized(file, part_size, offset, whence);
}
static const aos_devfs_file_ops_t devfs_mtd_ops = {
.ioctl = devfs_mtd_ioctl,
.poll = NULL,
.mmap = NULL,
.read = devfs_mtd_read,
.write = devfs_mtd_write,
.lseek = devfs_mtd_lseek,
};
#endif /* AOS_COMP_DEVFS */
aos_status_t aos_flashpart_register(aos_flashpart_t *flashpart)
{
#ifdef AOS_COMP_DEVFS
int name_len;
#endif
if (!flashpart || flashpart->block_count == 0)
return -EINVAL;
flashpart->dev.type = AOS_DEV_TYPE_FLASHPART;
flashpart->dev.ops = &dev_flashpart_ops;
#ifdef AOS_COMP_DEVFS
aos_devfs_node_init(&flashpart->dev.devfs_node);
flashpart->dev.devfs_node.ops = &devfs_mtd_ops;
name_len = snprintf(flashpart->dev.devfs_node.name, sizeof(flashpart->dev.devfs_node.name),
"mtd%" PRIu32, flashpart->dev.id);
if (name_len < 0 || name_len >= sizeof(flashpart->dev.devfs_node.name))
return -EINVAL;
#endif
return aos_dev_register(&flashpart->dev);
}
aos_status_t aos_flashpart_register_argumented(aos_flashpart_t *flashpart, uint32_t id, uint32_t flash_id,
uint32_t block_start, uint64_t block_count)
{
if (!flashpart)
return -EINVAL;
flashpart->dev.id = id;
flashpart->flash_id = flash_id;
flashpart->block_start = block_start;
flashpart->block_count = block_count;
return aos_flashpart_register(flashpart);
}
aos_status_t aos_flashpart_unregister(uint32_t id)
{
return aos_dev_unregister(AOS_DEV_TYPE_FLASHPART, id);
}
| YifuLiu/AliOS-Things | components/drivers/peripheral/flash/src/flashpart.c | C | apache-2.0 | 16,304 |
/*
* Copyright (C) 2015-2021 Alibaba Group Holding Limited
*/
#include <stdlib.h>
#include <string.h>
#include <errno.h>
#include <aos/mtd.h>
#include <aos/mtdpart.h>
#define AOS_MTD_PART_NAME_TYPE_STD 0 /* AliOS Things standard partition name. */
#define AOS_MTD_PART_NAME_TYPE_VENDOR 1 /* Vendor partition name. */
#define AOS_MTD_MAX_NUM_CHIP 16 /* Maxmium number of supported mtd chips. */
/* Keep a mapping for partition name and device name,
* just in case users want to operation parition based
* on device name (such as dd command).
*/
struct mtd_info_entry {
struct mtd_part_info pinfo;
aos_mtd_t *mtd;
};
struct mtd_info_ctx {
int np;
struct mtd_info_entry *entries;
};
static struct mtd_info_ctx g_mtd_info[AOS_MTD_MAX_NUM_CHIP];
static aos_mtd_t *mtd_part_alloc(aos_mtd_t *master)
{
aos_mtd_t *slave;
slave = malloc(sizeof(aos_mtd_t));
if (slave == NULL)
return NULL;
slave->master = master;
/* Inherit information from master.*/
*slave = *master;
return slave;
}
int aos_mtd_part_info_get(struct mtd_part_info **info, int *cnt)
{
struct mtd_part_info *p ;
*cnt = 0;
*info = NULL;
for (int chip_idx = 0; g_mtd_info[chip_idx].entries; chip_idx++) {
*cnt += g_mtd_info[chip_idx].np;
p = realloc(*info, *cnt * sizeof(struct mtd_part_info));
if (p == NULL) {
free(*info);
return -ENOMEM;
}
*info = p;
p = *info + *cnt;
for (int i = 0; i < g_mtd_info[chip_idx].np; i++, p++)
memcpy(p, &(g_mtd_info[chip_idx].entries[i].pinfo), sizeof(struct mtd_part_info));
}
return 0;
}
static aos_mtd_t *aos_mtd_get_by_device(uint32_t id)
{
aos_status_t ret;
aos_mtd_t *mtd = NULL;
aos_dev_ref_t ref = AOS_DEV_REF_INIT_VAL;
ret = aos_dev_get(&ref, AOS_DEV_TYPE_MTD, id);
if (ret != 0)
return NULL;
mtd = aos_container_of((&ref)->dev, aos_mtd_t, dev);
if ((mtd == NULL) || (mtd->dev.type != AOS_DEV_TYPE_MTD))
return NULL;
return mtd;
}
static aos_mtd_t *aos_mtd_get_by_part_name(const char *partition_name, int type)
{
int ret;
uint32_t id = 0;
int chip_idx;
int i;
for (chip_idx = 0; g_mtd_info[chip_idx].entries; chip_idx++) {
for (i = 0; i < g_mtd_info[chip_idx].np; i++) {
if (type == AOS_MTD_PART_NAME_TYPE_STD)
ret = strcmp(partition_name, g_mtd_info[chip_idx].entries[i].pinfo.part_name_std);
else
ret = strcmp(partition_name, g_mtd_info[chip_idx].entries[i].pinfo.part_name);
if (ret == 0)
return aos_mtd_get_by_device(id);
id++;
}
}
return NULL;
}
/* Keep this api for backward compatibility. */
aos_mtd_t *aos_mtd_get_by_std_part(const char *partition_name)
{
return aos_mtd_get_by_part_name(partition_name, AOS_MTD_PART_NAME_TYPE_STD);
}
/* Keep this api for backward compatibility. */
aos_mtd_t *aos_mtd_get_by_vendor_part(const char *partition_name)
{
return aos_mtd_get_by_part_name(partition_name, AOS_MTD_PART_NAME_TYPE_VENDOR);
}
static int mtd_open(inode_t *node, file_t *fp)
{
return 0;
}
static int mtd_close(file_t *fp)
{
return 0;
}
static ssize_t mtd_read(file_t *fp, void *buffer, size_t size)
{
off_t pos = fp->offset;
aos_dev_t *dev = fp->node->i_arg;
aos_mtd_t *mtd = aos_container_of(dev, aos_mtd_t, dev);
return aos_mtd_read(mtd, pos, buffer, size);
}
static ssize_t mtd_write(file_t *fp, const void *buffer, size_t size)
{
off_t pos = fp->offset;
aos_dev_t *dev = fp->node->i_arg;
aos_mtd_t *mtd = aos_container_of(dev, aos_mtd_t, dev);
return aos_mtd_write(mtd, pos, buffer, size);
}
static int mtd_ioctl(file_t *fp, int cmd, unsigned long arg)
{
aos_dev_t *dev = fp->node->i_arg;
aos_mtd_t *mtd = aos_container_of(dev, aos_mtd_t, dev);
struct mtd_erase_info *einfo;
switch (cmd) {
case IOC_MTD_GET_SIZE:
*((unsigned int *)arg) = mtd->size;
return 0;
case IOC_MTD_GET_OFFSET:
*((off_t *)arg) = mtd->offset;
return 0;
case IOC_MTD_ERASE:
einfo = (struct mtd_erase_info *)arg;
return aos_mtd_erase(mtd, einfo->offset, einfo->length);
default:
return -EINVAL;
}
}
static uint32_t mtd_lseek(file_t *fp, int64_t off, int32_t whence)
{
switch (whence) {
case SEEK_CUR:
off = fp->offset + off;
break;
/* case SEEK_END: break; */
case SEEK_SET:
fp->offset = off;
break;
}
return off;
}
static void mtd_unregister(struct aos_dev *dev)
{
return;
}
static aos_status_t mtd_get(aos_dev_ref_t *ref)
{
return 0;
}
static void mtd_put(aos_dev_ref_t *ref)
{
return;
}
static aos_dev_ops_t mtd_dev_ops = {
.unregister = mtd_unregister,
.get = mtd_get,
.put = mtd_put,
};
#ifdef AOS_COMP_VFS
static struct file_ops mtd_dev_fops = {
.open = mtd_open,
.close = mtd_close,
.read = mtd_read,
.write = mtd_write,
.ioctl = mtd_ioctl,
.poll = NULL,
.lseek = mtd_lseek,
};
#endif
int aos_mtd_register(aos_mtd_t *master, const struct mtd_part *parts, int np)
{
int ret;
aos_mtd_t *mtd_device = NULL;
static int dev_idx = 0; /* Use static to support multiple chips. */
static int chip_idx = 0; /* Define here because flash chip is unpluggable. */
static int is_master = 1;
int i = 0;
char device_name[MTD_DEVICE_NAME_MAX + 1];
if ((master == NULL) || (parts == NULL) || (np <= 0))
return -EINVAL;
g_mtd_info[chip_idx].entries = calloc(np, sizeof(struct mtd_info_entry));
if (g_mtd_info[chip_idx].entries == NULL)
return -ENOMEM;
g_mtd_info[chip_idx].np = np;
while (np > 0) {
if (is_master) {
mtd_device = master;
mtd_device->master = master;
is_master = 0;
} else {
mtd_device = mtd_part_alloc(master);
if (mtd_device == NULL) {
free(g_mtd_info[chip_idx].entries);
return -ENOMEM;
}
}
/* Set mtd device information. */
mtd_device->offset = parts->offset;
mtd_device->size = parts->size;
mtd_device->dev.type = AOS_DEV_TYPE_MTD;
mtd_device->dev.id = dev_idx++;
memset(device_name, 0, sizeof(device_name));
snprintf(device_name, sizeof(device_name) - 1, MTD_DEVICE_NAME_FORMAT, mtd_device->dev.id);
#ifdef AOS_COMP_VFS
/*TODO: device name should like mtdblock0p1 */
strncpy(mtd_device->dev.vfs_helper.name, device_name, AOS_DEV_NAME_MAX_LEN);
mtd_device->dev.vfs_helper.ops = &mtd_dev_fops;
#endif
mtd_device->dev.ops = &mtd_dev_ops;
/* Set partition information.*/
g_mtd_info[chip_idx].entries[i].pinfo.offset = parts->offset;
g_mtd_info[chip_idx].entries[i].pinfo.size = parts->size;
strncpy(g_mtd_info[chip_idx].entries[i].pinfo.part_name,
parts->name, MTD_PARTITION_NAME_MAX - 1);
strncpy(g_mtd_info[chip_idx].entries[i].pinfo.part_name_std,
parts->name_std, MTD_PARTITION_NAME_MAX - 1);
strncpy(g_mtd_info[chip_idx].entries[i].pinfo.dev_name,
device_name, MTD_DEVICE_NAME_MAX - 1);
g_mtd_info[chip_idx].entries[i].mtd = mtd_device;
ret = aos_dev_register(&(mtd_device->dev));
if (ret != 0) {
free(g_mtd_info[chip_idx].entries);
if (!is_master)
free(mtd_device);
return -1;
}
np--;
parts++;
i++;
}
chip_idx++;
return 0;
}
aos_mtd_t *aos_mtd_open(const char *name)
{
aos_mtd_t *mtd_dev = NULL;
if (name == NULL) {
return NULL;
}
mtd_dev = aos_mtd_get_by_vendor_part(name);
if (mtd_dev != NULL) {
return mtd_dev;
}
/* Try to find standard partition name if it can't be found in
* vendor partition name.
*/
mtd_dev = aos_mtd_get_by_std_part(name);
return mtd_dev;
}
aos_status_t aos_mtd_close(aos_mtd_t *mtd)
{
return 0;
}
ssize_t aos_mtd_read(aos_mtd_t *mtd, off_t offset, void *buf, size_t size)
{
struct mtd_io_desc info = {0};
if (mtd == NULL || offset < 0 || offset >= (off_t)mtd->size ||
buf == NULL || size > mtd->size - offset || size <= 0) {
return -EINVAL;
}
info.datbuf = buf;
info.datlen = size;
return mtd->ops->read(mtd->master, offset + mtd->offset, &info);
}
ssize_t aos_mtd_oob_read(aos_mtd_t *mtd, off_t offset, struct mtd_io_desc *info)
{
if (mtd == NULL || info == NULL) {
return -EINVAL;
}
info->datretlen = 0;
info->oobretlen = 0;
if (offset < 0 || offset >= (off_t)mtd->size)
return -EINVAL;
if (info->datbuf && (info->datlen > (mtd->size - offset)))
return -EINVAL;
return mtd->ops->read(mtd->master, offset + mtd->offset, info);
}
ssize_t aos_mtd_write(aos_mtd_t *mtd, off_t offset, const void *buf, size_t size)
{
struct mtd_io_desc info = {0};
if (mtd == NULL || offset < 0 || offset >= (off_t)mtd->size ||
buf == NULL || size > mtd->size - offset || size <= 0) {
return -EINVAL;
}
if (mtd->ops->write == NULL) {
return -ENOTSUP;
}
info.datbuf = (uint8_t*)buf;
info.datlen = size;
return mtd->ops->write(mtd->master, offset + mtd->offset, &info);
}
ssize_t aos_mtd_oob_write(aos_mtd_t *mtd, off_t offset, struct mtd_io_desc *info)
{
if ((mtd == NULL) || (info == NULL)) {
return -EINVAL;
}
if (mtd->ops->write == NULL) {
return -ENOTSUP;
}
info->datretlen = 0;
info->oobretlen = 0;
if (offset < 0 || offset >= (off_t)mtd->size) {
return -EINVAL;
}
if (info->datbuf && (info->datlen > (mtd->size - offset))) {
return -EINVAL;
}
return mtd->ops->write(mtd->master, offset + mtd->offset, info);
}
aos_status_t aos_mtd_erase(aos_mtd_t *mtd, off_t offset, size_t size)
{
if (mtd == NULL || size <= 0) {
return -EINVAL;
}
if (mtd->ops->erase == NULL) {
return -ENOTSUP;
}
if (offset < 0 || (offset + size) > mtd->size) {
return -EINVAL;
}
offset += mtd->offset;
return mtd->ops->erase(mtd->master, offset, size);
}
aos_status_t aos_mtd_block_erase(aos_mtd_t *mtd, uint32_t block)
{
uint32_t total_blks;
off_t offset;
if (mtd == NULL) {
return -EINVAL;
}
if (mtd->ops->erase == NULL) {
return -ENOTSUP;
}
total_blks = mtd->size / mtd->block_size;
if (block >= total_blks) {
return -EINVAL;
}
offset = mtd->offset + mtd->block_size * block;
return mtd->ops->erase(mtd->master, offset, mtd->block_size);
}
aos_status_t aos_mtd_block_mark_bad(aos_mtd_t *mtd, uint32_t block)
{
uint32_t total_blks, offset_blk;
if (mtd == NULL) {
return -EINVAL;
}
if (mtd->ops->markbad == NULL) {
return -ENOTSUP;
}
total_blks = mtd->size / mtd->block_size;
if (block >= total_blks) {
return -EINVAL;
}
offset_blk = mtd->offset / mtd->block_size;
return mtd->ops->markbad(mtd->master, block + offset_blk);
}
aos_status_t aos_mtd_block_is_bad(aos_mtd_t *mtd, uint32_t block)
{
uint32_t total_blks, offset_blk;
if (mtd == NULL) {
return -EINVAL;
}
if (mtd->ops->isbad == NULL) {
return -ENOTSUP;
}
total_blks = mtd->size / mtd->block_size;
if (block >= total_blks) {
return -EINVAL;
}
offset_blk = mtd->offset / mtd->block_size;
return mtd->ops->isbad(mtd->master, block + offset_blk);
}
| YifuLiu/AliOS-Things | components/drivers/peripheral/flash/src/mtd.c | C | apache-2.0 | 11,754 |
/*
* Copyright (C) 2015-2021 Alibaba Group Holding Limited
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <stdlib.h>
#include <string.h>
#include <errno.h>
#include <aos/mtdnand.h>
#define MTDTONAND(x) ((aos_nand_t *)(x))
#define NOTALIGNED(x) ((x & (chip->page_size - 1)) != 0)
#ifndef min
#define min(a, b) (a > b ? b : a)
#endif
static uint8_t *nand_fill_oob(aos_nand_t *chip, uint8_t *oob, size_t len, struct mtd_io_desc *desc)
{
const struct mtd_oob_region *free = chip->freelayout;
uint32_t boffs;
size_t bytes;
memset(chip->oob_poi, 0xff, chip->oobsize);
switch (desc->mode) {
case MTD_OPM_PLACE_OOB:
case MTD_OPM_RAW:
memcpy(chip->oob_poi + desc->ooboffs, oob, len);
return oob + len;
case MTD_OPM_AUTO_OOB:
bytes = min(len, free->length);
boffs = free->offset;
memcpy(chip->oob_poi + boffs, oob, bytes);
oob += bytes;
return oob;
}
return NULL;
}
static uint8_t *nand_transfer_oob(aos_nand_t *chip, uint8_t *oob, struct mtd_io_desc *desc, size_t len)
{
struct mtd_oob_region *free = (struct mtd_oob_region *)chip->freelayout;
uint32_t boffs = 0, roffs = desc->ooboffs;
size_t bytes = 0;
switch (desc->mode) {
case MTD_OPM_PLACE_OOB:
case MTD_OPM_RAW:
memcpy(oob, chip->oob_poi + desc->ooboffs, len);
return oob + len;
case MTD_OPM_AUTO_OOB:
for (; free->length && len; free++, len -= bytes) {
/* Read request not from offset 0? */
if (roffs) {
if (roffs >= free->length) {
roffs -= free->length;
continue;
}
boffs = free->offset + roffs;
bytes = min(len, (free->length - roffs));
roffs = 0;
} else {
bytes = min(len, free->length);
boffs = free->offset;
}
memcpy(oob, chip->oob_poi + boffs, bytes);
oob += bytes;
}
return oob;
}
return NULL;
}
static int nand_read_page_raw(aos_nand_t *chip, uint8_t *buf, int oob_required, int page)
{
chip->ops->read_buf(chip, buf, chip->page_size);
if (oob_required)
chip->ops->read_buf(chip, chip->oob_poi, chip->oobsize);
return 0;
}
static int nand_write_page_raw(aos_nand_t *chip, const uint8_t *buf, int oob_required, int page)
{
chip->ops->write_buf(chip, buf, chip->page_size);
if (oob_required)
chip->ops->write_buf(chip, chip->oob_poi, chip->oobsize);
return 0;
}
static int nand_write_page_hwecc(aos_nand_t *chip, const uint8_t *buf, int oob_required, int page)
{
uint16_t i;
uint16_t stepsize = chip->ecc.stepsize;
uint16_t eccbytes = chip->ecc.bytes;
uint16_t eccsteps = chip->ecc._step;
uint16_t eccpos = chip->ecc.layout->offset;
uint8_t *ecc_calc = chip->buffers.ecccalc;
const uint8_t *p = buf;
for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += stepsize) {
chip->ops->cmdfunc(chip, NAND_CMD_ECC_EN, 0, 0);
chip->ops->write_buf(chip, p, stepsize);
chip->ecc.calculate(chip, p, &ecc_calc[i]);
chip->ops->cmdfunc(chip, NAND_CMD_ECC_DIS, 0, 0);
}
memcpy(&chip->oob_poi[eccpos], ecc_calc, chip->ecc.layout->length);
chip->ops->write_buf(chip, chip->oob_poi, chip->oobsize);
return 0;
}
static int nand_read_page_hwecc(aos_nand_t *chip, uint8_t *buf, int oob_required, int page)
{
uint16_t i;
uint16_t eccsize = chip->ecc.stepsize;
uint16_t eccbytes = chip->ecc.bytes;
uint16_t eccsteps = chip->ecc._step;
uint16_t eccpos = chip->ecc.layout->offset;
uint8_t *p = buf;
uint8_t *ecc_calc = chip->buffers.ecccalc;
uint8_t *ecc_code = chip->buffers.ecccode;
int ret = 0;
for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
chip->ops->cmdfunc(chip, NAND_CMD_ECC_EN, 0, 0);
chip->ops->read_buf(chip, p, eccsize);
chip->ecc.calculate(chip, p, &ecc_calc[i]);
chip->ops->cmdfunc(chip, NAND_CMD_ECC_DIS, 0, 0);
}
chip->ops->read_buf(chip, chip->oob_poi, chip->oobsize);
memcpy(ecc_code, &chip->oob_poi[eccpos], chip->ecc.layout->length);
eccsteps = chip->ecc._step;
p = buf;
for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
int stat;
stat = chip->ecc.correct(chip, p, &ecc_code[i], &ecc_calc[i]);
if (stat != 0)
ret = -1;
}
return ret;
}
static int nand_write_page(aos_nand_t *chip, const uint8_t *buf, int oob_required, int page, int raw)
{
int status;
chip->ops->cmdfunc(chip, NAND_CMD_PAGE_WR0, page, 0x00);
if (raw)
nand_write_page_raw(chip, buf, oob_required, page);
else
chip->write_page(chip, buf, oob_required, page);
status = chip->ops->cmdfunc(chip, NAND_CMD_PAGE_WR1, -1, -1);
return status;
}
static int nand_do_read_desc(aos_nand_t *chip, off_t from, struct mtd_io_desc *desc)
{
int page, bytes;
char oob_required;
int ret = 0;
uint32_t readlen = desc->datlen;
uint16_t oobreadlen = desc->ooblen;
uint16_t max_oobsize = desc->mode == MTD_OPM_AUTO_OOB ? chip->freelayout->length : chip->oobsize;
uint8_t *oob, *buf, *notalign = 0;
/* Reject reads, which are not page aligned */
if (NOTALIGNED(from))
return -EINVAL;
buf = desc->datbuf;
if (NOTALIGNED(desc->datlen) && !chip->pagebuf) {
chip->pagebuf = malloc(chip->page_size);
if (!chip->pagebuf)
return -ENOMEM;
}
page = (int)(from / chip->page_size);
oob = desc->oobbuf;
oob_required = oob ? 1 : 0;
while (1) {
bytes = min(chip->page_size, readlen);
chip->ops->cmdfunc(chip, NAND_CMD_PAGE_RD, page, 0x00);
if (NOTALIGNED(bytes)) {
notalign = buf;
buf = chip->pagebuf;
}
/*
* Now read the page into the buffer. Absent an error,
* the read methods return max bitflips per ecc step.
*/
if (desc->mode == MTD_OPM_RAW)
ret = nand_read_page_raw(chip, buf, oob_required, page);
else
ret = chip->read_page(chip, buf, oob_required, page);
if (ret != 0) {
ret = -EBADMSG;
break;
}
if (oob) {
int toread = min(oobreadlen, max_oobsize);
if (toread) {
oob = nand_transfer_oob(chip, oob, desc, toread);
oobreadlen -= toread;
}
}
if (notalign)
memcpy(notalign, buf, bytes);
buf += bytes;
readlen -= bytes;
if (!readlen)
break;
page++;
}
desc->datretlen = desc->datlen - (size_t)readlen;
if (oob)
desc->oobretlen = desc->ooblen - oobreadlen;
return ret;
}
/*
* write with ECC
*
*/
static int nand_do_write_desc(aos_nand_t *chip, off_t to, struct mtd_io_desc *desc)
{
int page;
uint16_t writelen = desc->datlen;
uint16_t oob_required = desc->oobbuf ? 1 : 0;
uint16_t oobwritelen = desc->ooblen;
uint16_t oobmaxlen = desc->mode == MTD_OPM_AUTO_OOB ? chip->freelayout->length : chip->oobsize;
uint16_t bytes = min(chip->page_size, writelen);
uint8_t *oob = desc->oobbuf;
uint8_t *buf = desc->datbuf;
int ret;
if (!writelen)
return 0;
/* Reject writes, which are not page aligned */
if (NOTALIGNED(to))
return -EINVAL;
page = (int)(to / chip->page_size);
/* Don't allow multipage oob writes with offset */
if (oob && desc->ooboffs && (desc->ooboffs + desc->ooblen > oobmaxlen)) {
ret = -EINVAL;
goto err_out;
}
if (NOTALIGNED(desc->datlen) && !chip->pagebuf) {
chip->pagebuf = malloc(chip->page_size);
if (!chip->pagebuf)
return -ENOMEM;
}
while (1) {
if (oob) {
size_t len = min(oobwritelen, oobmaxlen);
oob = nand_fill_oob(chip, oob, len, desc);
oobwritelen -= len;
} else {
/* We still need to erase leftover OOB data */
memset(chip->oob_poi, 0xff, chip->oobsize);
}
if (NOTALIGNED(bytes)) {
uint8_t *dbtmp = buf;
buf = chip->pagebuf;
memset(&buf[bytes], 0xff, chip->page_size - bytes);
memcpy(buf, dbtmp, bytes);
}
ret = nand_write_page(chip, buf, oob_required, page, (desc->mode == MTD_OPM_RAW));
if (ret)
break;
writelen -= bytes;
if (!writelen)
break;
buf += bytes;
page++;
}
desc->datretlen = desc->datlen - writelen;
if (oob)
desc->oobretlen = desc->ooblen;
err_out:
return ret;
}
static int nand_read_oob_std(aos_nand_t *chip, int page)
{
chip->ops->cmdfunc(chip, NAND_CMD_PAGE_RD, page, chip->page_size);
chip->ops->read_buf(chip, chip->oob_poi, chip->oobsize);
return 0;
}
/*
* read one page of OOB
*/
static int nand_only_read_oob(aos_nand_t *chip, off_t from, struct mtd_io_desc *desc)
{
int page;
int readlen = desc->ooblen;
int len;
uint8_t *buf = desc->oobbuf;
int ret = 0;
if (desc->mode == MTD_OPM_AUTO_OOB)
len = chip->freelayout->length;
else
len = chip->oobsize;
/* attempt to start read outside oob */
if (desc->ooboffs >= len)
return -EINVAL;
page = (int)(from / chip->page_size);
ret = nand_read_oob_std(chip, page);
if (ret == 0) {
len = min(len, readlen);
buf = nand_transfer_oob(chip, buf, desc, len);
desc->oobretlen = len;
}
return ret;
}
static int nand_write_oob_std(aos_nand_t *chip, int page)
{
int status;
chip->ops->cmdfunc(chip, NAND_CMD_PAGE_WR0, page, chip->page_size);
chip->ops->write_buf(chip, chip->oob_poi, chip->oobsize);
/* Send command to program the OOB data */
status = chip->ops->cmdfunc(chip, NAND_CMD_PAGE_WR1, -1, -1);
return status & NAND_STATUS_FAIL ? -EIO : 0;
}
static int nand_only_write_oob(aos_nand_t *chip, off_t to, struct mtd_io_desc *desc)
{
int page, ret, len;
if (desc->mode == MTD_OPM_AUTO_OOB)
len = chip->freelayout->length;
else
len = chip->oobsize;
/* Do not allow write past end of page */
if ((desc->ooboffs + desc->ooblen) > len)
return -EINVAL;
if (desc->ooblen == 0)
return -EINVAL;
/* get page */
page = (int)(to / chip->page_size);
nand_fill_oob(chip, desc->oobbuf, desc->ooblen, desc);
ret = nand_write_oob_std(chip, page);
if (ret == 0)
desc->oobretlen = len;
return ret;
}
static int nand_erase(aos_mtd_t *mtd, off_t addr, size_t size)
{
aos_nand_t *chip;
int status;
int page;
uint32_t blksize;
chip = MTDTONAND(mtd);
blksize = mtd->block_size;
page = addr / chip->page_size;
while (size >= blksize) {
status = chip->ops->cmdfunc(chip, NAND_CMD_BLK_ERASE, page, 0);
if (status & NAND_STATUS_FAIL)
break;
size -= blksize;
page += chip->pages_pb;
}
return size;
}
static int nand_read(aos_mtd_t *mtd, off_t from, struct mtd_io_desc *desc)
{
int ret = -ENOTSUP;
aos_nand_t *chip;
chip = MTDTONAND(mtd);
switch (desc->mode) {
case MTD_OPM_PLACE_OOB:
case MTD_OPM_AUTO_OOB:
case MTD_OPM_RAW:
break;
default:
goto out;
}
if (!desc->datbuf || !desc->datlen)
ret = nand_only_read_oob(chip, from, desc);
else
ret = nand_do_read_desc(chip, from, desc);
out:
return ret;
}
static int nand_write(aos_mtd_t *mtd, off_t to, struct mtd_io_desc *desc)
{
int ret = -ENOTSUP;
aos_nand_t *chip;
chip = MTDTONAND(mtd);
switch (desc->mode) {
case MTD_OPM_PLACE_OOB:
case MTD_OPM_AUTO_OOB:
case MTD_OPM_RAW:
break;
default:
goto out;
}
if (!desc->datbuf || !desc->datlen)
ret = nand_only_write_oob(chip, to, desc);
else
ret = nand_do_write_desc(chip, to, desc);
out:
return ret;
}
static int nand_block_isbad(aos_mtd_t *mtd, uint32_t blk)
{
int ret;
aos_nand_t *chip = MTDTONAND(mtd);
if (chip->ops->isbad) {
ret = chip->ops->isbad(chip, blk);
} else {
int page;
page = blk * chip->pages_pb;
nand_read_oob_std(chip, page);
ret = chip->oob_poi[0] != 0xFF;
}
return ret;
}
static int nand_block_markbad(aos_mtd_t *mtd, uint32_t blk)
{
int ret;
aos_nand_t *chip;
chip = MTDTONAND(mtd);
if (chip->ops->markbad) {
ret = chip->ops->markbad(chip, blk);
} else {
int page;
page = blk * chip->pages_pb;
memset(chip->oob_poi, 0xff, chip->oobsize);
chip->oob_poi[0] = 0;
ret = nand_write_oob_std(chip, page);
}
return ret;
}
static const struct mtd_ops _ops = {
nand_erase,
nand_read,
nand_write,
nand_block_isbad,
nand_block_markbad,
};
int aos_mtd_nand_init(aos_nand_t *nand, int blk_size, int page_size, int oob_size)
{
uint8_t *buf;
buf = malloc(oob_size * 3);
if (buf == NULL)
return -ENOMEM;
nand->oob_poi = buf;
buf += oob_size;
nand->buffers.ecccalc = buf;
buf += oob_size;
nand->buffers.ecccode = buf;
nand->pagebuf = 0; /* alloc when unaligen access */
nand->pages_pb = blk_size / page_size;
nand->ecc._step = page_size / nand->ecc.stepsize;
nand->page_size = page_size;
nand->oobsize = oob_size;
nand->parent.type = MTD_TYPE_NAND;
nand->parent.ops = &_ops;
nand->parent.sector_size = page_size;
nand->parent.block_size = blk_size;
nand->parent.oob_size = oob_size;
switch (nand->ecc.mode) {
case NAND_ECCM_NONE:
nand->read_page = nand_read_page_raw;
nand->write_page = nand_write_page_raw;
break;
case NAND_ECCM_HW:
nand->read_page = nand_read_page_hwecc;
nand->write_page = nand_write_page_hwecc;
break;
default:
free(buf);
return -1;
}
return 0;
}
| YifuLiu/AliOS-Things | components/drivers/peripheral/flash/src/mtdnand.c | C | apache-2.0 | 14,182 |
/*
* Copyright (C) 2015-2021 Alibaba Group Holding Limited
*/
#include <aos/mtdnor.h>
#include <drv/spiflash.h>
static int _nor_erase(aos_mtd_t *mtd, off_t addr, size_t len)
{
(void) mtd;
return csi_spiflash_erase(NULL, addr, len);
}
static int _nor_read(aos_mtd_t *mtd, off_t from, struct mtd_io_desc *desc)
{
int ret;
(void) mtd;
ret = csi_spiflash_read(NULL, from, desc->datbuf, desc->datlen);
if (ret > 0) {
desc->datretlen = ret;
}
return ret;
}
static int _nor_write(aos_mtd_t *mtd, off_t to, struct mtd_io_desc *desc)
{
int ret;
(void) mtd;
ret = csi_spiflash_program(NULL, to, desc->datbuf, desc->datlen);
if (ret > 0) {
desc->datretlen = ret;
}
return ret;
}
static const struct mtd_ops _ops =
{
_nor_erase,
_nor_read,
_nor_write,
NULL,
NULL
};
int aos_mtd_nor_init(aos_mtd_t *nor, int blksize, int sector_size)
{
nor->sector_size = sector_size > 0 ? sector_size : 1;
nor->block_size = blksize;
nor->ops = &_ops;
nor->type = MTD_TYPE_NOR;
nor->oob_size = 0;
return 0;
}
| YifuLiu/AliOS-Things | components/drivers/peripheral/flash/src/mtdnor.c | C | apache-2.0 | 1,112 |
/*
* Copyright (C) 2015-2021 Alibaba Group Holding Limited
*/
#include <stdlib.h>
#include <fcntl.h>
#include <poll.h>
#include <sys/ioctl.h>
#if AOS_COMP_CLI
#include "aos/cli.h"
#endif
#include "aos/vfs.h"
#include <vfsdev/gpio_dev.h>
#include <drivers/char/u_device.h>
#include <drivers/u_ld.h>
int vfs_gpio_test(int id)
{
int ret = 0;
int fd = 0;
char buffer[16];
struct gpio_io_config config;
fd = open("/dev/gpio", 0);
ddkc_info("open gpio %s, fd:%d\r\n", fd >= 0 ? "success" : "fail", fd);
if (fd >= 0) {
config.id = id;
config.config = GPIO_IO_INPUT | GPIO_IO_INPUT_PU;
config.data = 0;
ret = ioctl(fd, IOC_GPIO_GET, (unsigned long)&config);
ddkc_info("gpio read %d return %d\r\n", id, ret);
config.id = id;
config.config = GPIO_IO_OUTPUT | GPIO_IO_OUTPUT_PP;
config.data = id%2;
ret = ioctl(fd, IOC_GPIO_SET, (unsigned long)&config);
ddkc_info("gpio write %d return %d\r\n", config.data, ret);
usleep(1000000);
config.config = GPIO_IO_OUTPUT_TOGGLE;
config.data = 0;
ret = ioctl(fd, IOC_GPIO_SET, (unsigned long)&config);
ddkc_info("gpio toggle return %d\r\n", ret);
close(fd);
}
return 0;
}
#if AOS_COMP_CLI
static void vfs_gpio_cli_cmd(char *buf, int len, int argc, char **argv)
{
int ret = 0;
int id = argc > 1 ? atoi(argv[1]) : 1;
ddkc_info("argc:%d, gpio[%d]\n", argc, id);
ret = vfs_gpio_test(id);
ddkc_info("vfs gpio test %s, ret:%d\r\n", ret ? "failed" : "success", ret);
return;
}
struct cli_command vfs_gpio_cli_cmds[] = {
{ "gpiot", "gpio test", vfs_gpio_cli_cmd, },
};
int vfs_gpio_test_cmd_init(void)
{
return aos_cli_register_commands(&vfs_gpio_cli_cmds[0], sizeof(vfs_gpio_cli_cmds) / sizeof(vfs_gpio_cli_cmds[0]));
}
POST_DRIVER_ENTRY(vfs_gpio_test_cmd_init)
#endif /* AOS_COMP_CLI */
| YifuLiu/AliOS-Things | components/drivers/peripheral/gpio/example/gpio_example.c | C | apache-2.0 | 1,923 |
/*
* Copyright (C) 2020-2021 Alibaba Group Holding Limited
*/
#ifndef AOS_GPIO_H
#define AOS_GPIO_H
#ifdef AOS_KERNEL_BUILD
#include <aos/device.h>
#else
#include <stdint.h>
#endif
/**
* @defgroup gpio_api GPIO Pin
* @ingroup driver_api
* @brief AOS API for GPIO pin.
* @{
*/
#define AOS_GPIO_DIR_MASK ((uint32_t)0x7 << 0)
#define AOS_GPIO_DIR_NONE ((uint32_t)0x0 << 0)
#define AOS_GPIO_DIR_INPUT ((uint32_t)0x1 << 0)
#define AOS_GPIO_DIR_OUTPUT ((uint32_t)0x2 << 0)
#define AOS_GPIO_DIR_BOTH ((uint32_t)0x3 << 0)
#define AOS_GPIO_INPUT_CFG_MASK ((uint32_t)0xF << 4)
#define AOS_GPIO_INPUT_CFG_DEFAULT ((uint32_t)0x0 << 4)
#define AOS_GPIO_INPUT_CFG_HI ((uint32_t)0x1 << 4)
#define AOS_GPIO_INPUT_CFG_PU ((uint32_t)0x2 << 4)
#define AOS_GPIO_INPUT_CFG_PD ((uint32_t)0x3 << 4)
#define AOS_GPIO_ICFG_MASK AOS_GPIO_INPUT_CFG_MASK
#define AOS_GPIO_ICFG_DEFAULT AOS_GPIO_INPUT_CFG_DEFAULT
#define AOS_GPIO_ICFG_HI AOS_GPIO_INPUT_CFG_HI
#define AOS_GPIO_ICFG_PU AOS_GPIO_INPUT_CFG_PU
#define AOS_GPIO_ICFG_PD AOS_GPIO_INPUT_CFG_PD
#define AOS_GPIO_OUTPUT_INIT_MASK ((uint32_t)0x1 << 3)
#define AOS_GPIO_OUTPUT_INIT_LOW ((uint32_t)0x0 << 3)
#define AOS_GPIO_OUTPUT_INIT_HIGH ((uint32_t)0x1 << 3)
#define AOS_GPIO_OUTPUT_CFG_MASK ((uint32_t)0xF << 4)
#define AOS_GPIO_OUTPUT_CFG_DEFAULT ((uint32_t)0x0 << 4)
#define AOS_GPIO_OUTPUT_CFG_PP ((uint32_t)0x1 << 4)
#define AOS_GPIO_OUTPUT_CFG_ODNP ((uint32_t)0x2 << 4)
#define AOS_GPIO_OUTPUT_CFG_ODPU ((uint32_t)0x3 << 4)
#define AOS_GPIO_OCFG_MASK AOS_GPIO_OUTPUT_CFG_MASK
#define AOS_GPIO_OCFG_DEFAULT AOS_GPIO_OUTPUT_CFG_DEFAULT
#define AOS_GPIO_OCFG_PP AOS_GPIO_OUTPUT_CFG_PP
#define AOS_GPIO_OCFG_ODNP AOS_GPIO_OUTPUT_CFG_ODNP
#define AOS_GPIO_OCFG_ODPU AOS_GPIO_OUTPUT_CFG_ODPU
#define AOS_GPIO_IRQ_TRIG_MASK ((uint32_t)0x7 << 12)
#define AOS_GPIO_IRQ_TRIG_NONE ((uint32_t)0x0 << 12)
#define AOS_GPIO_IRQ_TRIG_EDGE_RISING ((uint32_t)0x1 << 12)
#define AOS_GPIO_IRQ_TRIG_EDGE_FALLING ((uint32_t)0x2 << 12)
#define AOS_GPIO_IRQ_TRIG_EDGE_BOTH ((uint32_t)0x3 << 12)
#define AOS_GPIO_IRQ_TRIG_LEVEL_HIGH ((uint32_t)0x4 << 12)
#define AOS_GPIO_IRQ_TRIG_LEVEL_LOW ((uint32_t)0x5 << 12)
#define AOS_GPIO_IRQT_MASK AOS_GPIO_IRQ_TRIG_MASK
#define AOS_GPIO_IRQT_NONE AOS_GPIO_IRQ_TRIG_NONE
#define AOS_GPIO_IRQT_EDGE_RISING AOS_GPIO_IRQ_TRIG_EDGE_RISING
#define AOS_GPIO_IRQT_EDGE_FALLING AOS_GPIO_IRQ_TRIG_EDGE_FALLING
#define AOS_GPIO_IRQT_EDGE_BOTH AOS_GPIO_IRQ_TRIG_EDGE_BOTH
#define AOS_GPIO_IRQT_LEVEL_HIGH AOS_GPIO_IRQ_TRIG_LEVEL_HIGH
#define AOS_GPIO_IRQT_LEVEL_LOW AOS_GPIO_IRQ_TRIG_LEVEL_LOW
#ifdef AOS_KERNEL_BUILD
#define AOS_GPIO_IRQ_ALTERNATE ((uint32_t)0x1 << 15)
#define AOS_GPIO_IRQ_PRIO_MASK ((uint32_t)0xFF << 16)
#define AOS_GPIO_IRQ_PRIO(x) (((uint32_t)(x) & 0xFF) << 16)
#define AOS_GPIO_IRQ_PRIO_DEFAULT AOS_GPIO_IRQ_PRIO(0)
#endif /* AOS_KERNEL_BUILD */
#if (defined(AOS_KERNEL_BUILD) && defined(AOS_COMP_DEVFS)) || !defined(AOS_KERNEL_BUILD)
#define AOS_GPIO_IOC_GET_MODE 0x4701
#define AOS_GPIO_IOC_SET_MODE 0x4702
#define AOS_GPIO_IOC_TOGGLE 0x4703
#define AOS_GPIO_IOC_ENTER_IRQ 0x4704
#define AOS_GPIO_IOC_EXIT_IRQ 0x4705
#endif /* (defined(AOS_KERNEL_BUILD) && defined(AOS_COMP_DEVFS)) || !defined(AOS_KERNEL_BUILD) */
#ifdef AOS_KERNEL_BUILD
typedef aos_dev_ref_t aos_gpio_ref_t;
typedef void (*aos_gpio_irq_handler_t)(int polarity, void *arg);
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Get a GPIO pin.
* @param ref GPIO pin ref to operate.
* @param id GPIO pin device ID.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_gpio_get(aos_gpio_ref_t *ref, uint32_t id);
/**
* @brief Release a GPIO pin.
* @param ref GPIO pin ref to operate.
* @return None.
*/
void aos_gpio_put(aos_gpio_ref_t *ref);
/**
* @brief Get the parameters and IRQ settings associated with a GPIO pin.
* @param ref GPIO pin ref to operate.
* @param mode Pin mode.
* @param irq_handler IRQ handler.
* @param irq_arg Argument passed to IRQ handler.
* @return 0: on success; < 0: on failure.
*/
aos_status_t
aos_gpio_get_mode_irq(aos_gpio_ref_t *ref, uint32_t *mode, aos_gpio_irq_handler_t *irq_handler, void **irq_arg);
/**
* @brief Set the parameters and IRQ settings associated with a GPIO pin.
* @param ref GPIO pin ref to operate.
* @param mode Pin mode.
* @param irq_handler IRQ handler.
* @param irq_arg Argument passed to IRQ handler.
* @return 0: on success; < 0: on failure.
*/
aos_status_t
aos_gpio_set_mode_irq(aos_gpio_ref_t *ref, uint32_t mode, aos_gpio_irq_handler_t irq_handler, void *irq_arg);
/**
* @brief Get the parameters associated with a GPIO pin.
* @param ref GPIO pin ref to operate.
* @param mode Pin mode.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_gpio_get_mode(aos_gpio_ref_t *ref, uint32_t *mode);
/**
* @brief Set the parameters associated with a GPIO pin.
* @param ref GPIO pin ref to operate.
* @param mode Pin mode.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_gpio_set_mode(aos_gpio_ref_t *ref, uint32_t mode);
/**
* @brief Get the IRQ trigger type of a GPIO pin.
* @param ref GPIO pin ref to operate.
* @param trig Trigger type.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_gpio_get_irq_trigger(aos_gpio_ref_t *ref, uint32_t *trig);
/**
* @brief Set the IRQ trigger type of a GPIO pin.
* @param ref GPIO pin ref to operate.
* @param trig Trigger type.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_gpio_set_irq_trigger(aos_gpio_ref_t *ref, uint32_t trig);
/**
* @brief Get the input or output level of a GPIO pin.
* @param ref GPIO pin ref to operate.
* @return 0: low level; > 0: high level; < 0: on failure.
*/
aos_status_t aos_gpio_get_value(aos_gpio_ref_t *ref);
/**
* @brief Set the output level of a GPIO pin.
* @param ref GPIO pin ref to operate.
* @param val Output level.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_gpio_set_value(aos_gpio_ref_t *ref, int val);
/**
* @brief Toggle the output level of a GPIO pin.
* @param ref GPIO pin ref to operate.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_gpio_toggle(aos_gpio_ref_t *ref);
/**
* @brief Wait for an IRQ to become ready.
* @param ref GPIO pin ref to operate.
* @param timeout Timeout in milliseconds.
* @return 0: on low level or falling edge; 1: on high level or rising edge; < 0: on failure.
*/
aos_status_t aos_gpio_poll_irq(aos_gpio_ref_t *ref, uint32_t timeout);
/**
* @brief Wait for an IRQ and then handle it.
* @param ref GPIO pin ref to operate.
* @param timeout Timeout in milliseconds.
* @return 0: on low level or falling edge; 1: on high level or rising edge; < 0: on failure.
*/
aos_status_t aos_gpio_enter_irq(aos_gpio_ref_t *ref, uint32_t timeout);
/**
* @brief End an IRQ.
* @param ref GPIO pin ref to operate.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_gpio_exit_irq(aos_gpio_ref_t *ref);
#ifdef __cplusplus
}
#endif
#endif /* AOS_KERNEL_BUILD */
/** @} */
#endif /* AOS_GPIO_H */
| YifuLiu/AliOS-Things | components/drivers/peripheral/gpio/include/aos/gpio.h | C | apache-2.0 | 7,628 |
/*
* Copyright (C) 2020-2021 Alibaba Group Holding Limited
*/
#ifndef AOS_GPIO_CORE_H
#define AOS_GPIO_CORE_H
#include <aos/device_core.h>
#include <aos/gpioc.h>
#include <aos/gpio.h>
typedef struct {
aos_dev_t dev;
aos_gpioc_ref_t gpioc_ref;
/* must be initialized before registration */
uint32_t gpioc_id;
uint32_t pin;
} aos_gpio_t;
#ifdef __cplusplus
extern "C" {
#endif
aos_status_t aos_gpio_register(aos_gpio_t *gpio);
aos_status_t aos_gpio_register_argumented(aos_gpio_t *gpio, uint32_t id, uint32_t gpioc_id, uint32_t pin);
aos_status_t aos_gpio_unregister(uint32_t id);
#ifdef __cplusplus
}
#endif
#endif /* AOS_GPIO_CORE_H */
| YifuLiu/AliOS-Things | components/drivers/peripheral/gpio/include/aos/gpio_core.h | C | apache-2.0 | 666 |
/*
* Copyright (C) 2020-2021 Alibaba Group Holding Limited
*/
#ifndef AOS_GPIOC_H
#define AOS_GPIOC_H
#include <aos/device.h>
#include <aos/gpio.h>
/**
* @defgroup gpioc_api GPIO Controller
* @ingroup driver_api
* @brief AOS API for GPIO controller.
* @{
*/
typedef aos_dev_ref_t aos_gpioc_ref_t;
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Get a GPIO controller device.
* @param ref GPIO controller ref to operate.
* @param id GPIO controller device ID.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_gpioc_get(aos_gpioc_ref_t *ref, uint32_t id);
/**
* @brief Release a GPIO controller device.
* @param ref GPIO controller ref to operate.
* @return None.
*/
void aos_gpioc_put(aos_gpioc_ref_t *ref);
/**
* @brief Get number of pins on a GPIO controller device.
* @param ref GPIO controller ref to operate.
* @return >= 0: on success; < 0: on failure.
*/
aos_status_t aos_gpioc_get_num_pins(aos_gpioc_ref_t *ref);
/**
* @brief Get the parameters and IRQ settings associated with a GPIO pin.
* @param ref GPIO controller ref to operate.
* @param pin Pin to operate.
* @param mode Pin mode.
* @param irq_handler IRQ handler.
* @param irq_arg Argument passed to IRQ handler.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_gpioc_get_mode_irq(aos_gpioc_ref_t *ref, uint32_t pin, uint32_t *mode,
aos_gpio_irq_handler_t *irq_handler, void **irq_arg);
/**
* @brief Set the parameters and IRQ settings associated with a GPIO pin.
* @param ref GPIO controller ref to operate.
* @param pin Pin to operate.
* @param mode Pin mode.
* @param irq_handler IRQ handler.
* @param irq_arg Argument passed to IRQ handler.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_gpioc_set_mode_irq(aos_gpioc_ref_t *ref, uint32_t pin, uint32_t mode,
aos_gpio_irq_handler_t irq_handler, void *irq_arg);
/**
* @brief Get the parameters associated with a GPIO pin.
* @param ref GPIO controller ref to operate.
* @param pin Pin to operate.
* @param mode Pin mode.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_gpioc_get_mode(aos_gpioc_ref_t *ref, uint32_t pin, uint32_t *mode);
/**
* @brief Set the parameters associated with a GPIO pin.
* @param ref GPIO controller ref to operate.
* @param pin Pin to operate.
* @param mode Pin mode.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_gpioc_set_mode(aos_gpioc_ref_t *ref, uint32_t pin, uint32_t mode);
/**
* @brief Get the IRQ trigger type of a GPIO pin.
* @param ref GPIO controller ref to operate.
* @param pin Pin to operate.
* @param trig Trigger type.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_gpioc_get_irq_trigger(aos_gpioc_ref_t *ref, uint32_t pin, uint32_t *trig);
/**
* @brief Set the IRQ trigger type of a GPIO pin.
* @param ref GPIO controller ref to operate.
* @param pin Pin to operate.
* @param trig Trigger type.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_gpioc_set_irq_trigger(aos_gpioc_ref_t *ref, uint32_t pin, uint32_t trig);
/**
* @brief Get the input or output level of a GPIO pin.
* @param ref GPIO controller ref to operate.
* @param pin Pin to operate.
* @return 0: low level; > 0: high level; < 0: on failure.
*/
aos_status_t aos_gpioc_get_value(aos_gpioc_ref_t *ref, uint32_t pin);
/**
* @brief Set the output level of a GPIO pin.
* @param ref GPIO controller ref to operate.
* @param pin Pin to operate.
* @param val Output level.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_gpioc_set_value(aos_gpioc_ref_t *ref, uint32_t pin, int val);
/**
* @brief Toggle the output level of a GPIO pin.
* @param ref GPIO controller ref to operate.
* @param pin Pin to operate.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_gpioc_toggle(aos_gpioc_ref_t *ref, uint32_t pin);
/**
* @brief Wait for an IRQ to become ready.
* @param ref GPIO controller ref to operate.
* @param pin Pin to operate.
* @param timeout Timeout in milliseconds.
* @return 0: on low level or falling edge; 1: on high level or rising edge; < 0: on failure.
*/
aos_status_t aos_gpioc_poll_irq(aos_gpioc_ref_t *ref, uint32_t pin, uint32_t timeout);
/**
* @brief Wait for an IRQ and then handle it.
* @param ref GPIO controller ref to operate.
* @param pin Pin to operate.
* @param timeout Timeout in milliseconds.
* @return 0: on low level or falling edge; 1: on high level or rising edge; < 0: on failure.
*/
aos_status_t aos_gpioc_enter_irq(aos_gpioc_ref_t *ref, uint32_t pin, uint32_t timeout);
/**
* @brief End an IRQ.
* @param ref GPIO controller ref to operate.
* @param pin Pin to operate.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_gpioc_exit_irq(aos_gpioc_ref_t *ref, uint32_t pin);
#ifdef __cplusplus
}
#endif
/** @} */
#endif /* AOS_GPIOC_H */
| YifuLiu/AliOS-Things | components/drivers/peripheral/gpio/include/aos/gpioc.h | C | apache-2.0 | 5,143 |
/*
* Copyright (C) 2020-2021 Alibaba Group Holding Limited
*/
#ifndef AOS_GPIOC_CORE_H
#define AOS_GPIOC_CORE_H
#include <aos/device_core.h>
#include <aos/gpioc.h>
struct aos_gpioc_ops;
struct aos_gpioc_pin;
typedef struct {
aos_dev_t dev;
aos_spinlock_t lock;
/* must be initialized before registration */
const struct aos_gpioc_ops *ops;
uint32_t num_pins;
struct aos_gpioc_pin *pins;
} aos_gpioc_t;
typedef struct aos_gpioc_ops {
void (*unregister)(aos_gpioc_t *);
aos_status_t (*set_mode)(aos_gpioc_t *, uint32_t);
void (*enable_irq)(aos_gpioc_t *, uint32_t);
void (*disable_irq)(aos_gpioc_t *, uint32_t);
int (*get_value)(aos_gpioc_t *, uint32_t);
void (*set_value)(aos_gpioc_t *, uint32_t);
} aos_gpioc_ops_t;
typedef struct aos_gpioc_pin {
aos_gpioc_t *gpioc;
uint32_t mode;
aos_gpio_irq_handler_t irq_handler;
void *irq_arg;
aos_sem_t irq_sem;
aos_event_t irq_event;
aos_task_t irq_task;
aos_task_t irq_new_task;
bool hard_irq_en;
int value;
} aos_gpioc_pin_t;
#define aos_gpioc_hard_irq_handler(gpioc, pin, polarity) \
do { \
aos_gpioc_t *_gpioc = (gpioc); \
uint32_t _pin; \
uint32_t mode; \
uint32_t trig; \
uint32_t mask; \
uint32_t val; \
aos_irqsave_t flags; \
flags = aos_spin_lock_irqsave(&_gpioc->lock); \
_pin = (pin); \
if (!_gpioc->pins[_pin].hard_irq_en) { \
aos_spin_unlock_irqrestore(&_gpioc->lock, flags); \
break; \
} \
mode = _gpioc->pins[_pin].mode; \
if ((mode & AOS_GPIO_DIR_MASK) == AOS_GPIO_DIR_INPUT || (mode & AOS_GPIO_DIR_MASK) == AOS_GPIO_DIR_BOTH) \
trig = mode & AOS_GPIO_IRQ_TRIG_MASK; \
else \
trig = AOS_GPIO_IRQ_TRIG_NONE; \
switch (trig) { \
case AOS_GPIO_IRQ_TRIG_EDGE_RISING: \
case AOS_GPIO_IRQ_TRIG_EDGE_FALLING: \
case AOS_GPIO_IRQ_TRIG_EDGE_BOTH: \
if (trig == AOS_GPIO_IRQ_TRIG_EDGE_RISING) \
mask = 0x2; \
else if (trig == AOS_GPIO_IRQ_TRIG_EDGE_FALLING) \
mask = 0x1; \
else \
mask = (polarity) ? 0x2 : 0x1; \
(void)aos_event_get(&_gpioc->pins[_pin].irq_event, 0xFFFFFFFF, AOS_EVENT_OR, &val, AOS_NO_WAIT); \
for (int i = 0; i < 16; i++) { \
if (!(val & ((uint32_t)0x3 << (2 * i)))) { \
(void)aos_event_set(&_gpioc->pins[_pin].irq_event, mask << (2 * i), AOS_EVENT_OR); \
break; \
} \
} \
if ((mode & AOS_GPIO_IRQ_ALTERNATE) && _gpioc->pins[_pin].irq_handler) \
_gpioc->pins[_pin].irq_handler(polarity, _gpioc->pins[_pin].irq_arg); \
break; \
case AOS_GPIO_IRQ_TRIG_LEVEL_HIGH: \
case AOS_GPIO_IRQ_TRIG_LEVEL_LOW: \
_gpioc->pins[_pin].hard_irq_en = false; \
_gpioc->ops->disable_irq(_gpioc, _pin); \
mask = (trig == AOS_GPIO_IRQ_TRIG_LEVEL_HIGH) ? 0x2 : 0x1; \
(void)aos_event_set(&_gpioc->pins[_pin].irq_event, mask, AOS_EVENT_OR); \
if ((mode & AOS_GPIO_IRQ_ALTERNATE) && _gpioc->pins[_pin].irq_handler) \
_gpioc->pins[_pin].irq_handler(polarity, _gpioc->pins[_pin].irq_arg); \
break; \
default: \
break; \
} \
aos_spin_unlock_irqrestore(&_gpioc->lock, flags); \
} while (0)
#ifdef __cplusplus
extern "C" {
#endif
aos_status_t aos_gpioc_register(aos_gpioc_t *gpioc);
aos_status_t aos_gpioc_register_argumented(aos_gpioc_t *gpioc, uint32_t id, const aos_gpioc_ops_t *ops,
uint32_t num_pins, aos_gpioc_pin_t *pins);
aos_status_t aos_gpioc_unregister(uint32_t id);
#ifdef __cplusplus
}
#endif
#endif /* AOS_GPIOC_CORE_H */
| YifuLiu/AliOS-Things | components/drivers/peripheral/gpio/include/aos/gpioc_core.h | C | apache-2.0 | 3,890 |
/*
* Copyright (C) 2020-2021 Alibaba Group Holding Limited
*/
#ifndef AOS_GPIOC_CSI_H
#define AOS_GPIOC_CSI_H
#include <aos/gpioc_core.h>
#include <drv/gpio.h>
#define AOS_GPIOC_CSI_MAX_NUM_PINS (sizeof(uint32_t) * 8)
typedef struct {
aos_gpioc_t gpioc;
aos_gpioc_pin_t pins[AOS_GPIOC_CSI_MAX_NUM_PINS];
uint32_t modes[AOS_GPIOC_CSI_MAX_NUM_PINS];
csi_gpio_t csi_gpio;
/* must be initialized before registration */
uint32_t default_input_cfg;
uint32_t default_output_cfg;
} aos_gpioc_csi_t;
#ifdef __cplusplus
extern "C" {
#endif
aos_status_t aos_gpioc_csi_register(aos_gpioc_csi_t *gpioc_csi);
aos_status_t aos_gpioc_csi_register_argumented(aos_gpioc_csi_t *gpioc_csi, uint32_t id, uint32_t num_pins,
uint32_t default_input_cfg, uint32_t default_output_cfg);
aos_status_t aos_gpioc_csi_unregister(uint32_t id);
#ifdef __cplusplus
}
#endif
#endif /* AOS_GPIOC_CSI_H */
| YifuLiu/AliOS-Things | components/drivers/peripheral/gpio/include/aos/gpioc_csi.h | C | apache-2.0 | 959 |
/**
* @file gpio.h
* @copyright Copyright (C) 2015-2018 Alibaba Group Holding Limited
*/
#ifndef HAL_GPIO_H
#define HAL_GPIO_H
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup hal_gpio GPIO
* gpio hal API.
*
* @{
*/
#include <stdint.h>
typedef enum {
ANALOG_MODE,
/* 触发中断 */
IRQ_MODE,
/* 输入上拉 */
INPUT_PULL_UP,
/* 输入下拉 */
INPUT_PULL_DOWN,
/* 输入浮空 */
INPUT_HIGH_IMPEDANCE,
/* 推挽输出 */
OUTPUT_PUSH_PULL,
/* 开漏输出无上拉 */
OUTPUT_OPEN_DRAIN_NO_PULL,
/* 开漏输出有上拉 */
OUTPUT_OPEN_DRAIN_PULL_UP,
/* 开漏输出替代模式 */
OUTPUT_OPEN_DRAIN_AF,
/* 推挽输出替代模式 */
OUTPUT_PUSH_PULL_AF,
} gpio_config_t;
/*
* GPIO dev struct
*/
typedef struct {
uint8_t port; /**< gpio port */
gpio_config_t config; /**< gpio config */
void *priv; /**< priv data */
} gpio_dev_t;
typedef enum {
/* 上升沿触发 */
IRQ_TRIGGER_RISING_EDGE = 1,
/* 下降沿触发 */
IRQ_TRIGGER_FALLING_EDGE,
/* 上升下降沿触发 */
IRQ_TRIGGER_BOTH_EDGES,
} gpio_irq_trigger_t;
typedef enum {
GPIO_INPUT = 0x0000U, /**< Input Floating Mode */
GPIO_OUTPUT_PP = 0x0001U, /**< Output Push Pull Mode */
GPIO_OUTPUT_OD = 0x0011U, /**< Output Open Drain Mode */
} hal_gpio_mode_t;
typedef enum {
GPIO_PinState_Reset = 0, /**< Pin state 0 */
GPIO_PinState_Set = !GPIO_PinState_Reset, /**< Pin state 1 */
} gpio_pinstate_t;
/*
* GPIO interrupt callback handler
*/
typedef void (*gpio_irq_handler_t)(void *arg);
/**
* Initialises a GPIO pin
*
* @note Prepares a GPIO pin for use.
*
* @param[in] gpio the gpio pin which should be initialised
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_gpio_init(gpio_dev_t *gpio);
/**
* Sets an output GPIO pin high
*
* @note Using this function on a gpio pin which is set to input mode is undefined.
*
* @param[in] gpio the gpio pin which should be set high
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_gpio_output_high(gpio_dev_t *gpio);
/**
* Sets an output GPIO pin low
*
* @note Using this function on a gpio pin which is set to input mode is undefined.
*
* @param[in] gpio the gpio pin which should be set low
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_gpio_output_low(gpio_dev_t *gpio);
/**
* Trigger an output GPIO pin's output. Using this function on a
* gpio pin which is set to input mode is undefined.
*
* @param[in] gpio the gpio pin which should be toggled
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_gpio_output_toggle(gpio_dev_t *gpio);
/**
* Get the state of an input GPIO pin. Using this function on a
* gpio pin which is set to output mode will return an undefined value.
*
* @param[in] gpio the gpio pin which should be read
* @param[out] value gpio value
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_gpio_input_get(gpio_dev_t *gpio, uint32_t *value);
/**
* Enables an interrupt trigger for an input GPIO pin.
* Using this function on a gpio pin which is set to
* output mode is undefined.
*
* @param[in] gpio the gpio pin which will provide the interrupt trigger
* @param[in] trigger the type of trigger (rising/falling edge or both)
* @param[in] handler a function pointer to the interrupt handler
* @param[in] arg an argument that will be passed to the interrupt handler
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_gpio_enable_irq(gpio_dev_t *gpio, gpio_irq_trigger_t trigger,
gpio_irq_handler_t handler, void *arg);
/**
* Disables an interrupt trigger for an input GPIO pin.
* Using this function on a gpio pin which has not been setted up using
* @ref hal_gpio_input_irq_enable is undefined.
*
* @param[in] gpio the gpio pin which provided the interrupt trigger
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_gpio_disable_irq(gpio_dev_t *gpio);
/**
* Clear an interrupt status for an input GPIO pin.
* Using this function on a gpio pin which has generated a interrupt.
*
* @param[in] gpio the gpio pin which provided the interrupt trigger
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_gpio_clear_irq(gpio_dev_t *gpio);
/**
* Set a GPIO pin in default state.
*
* @param[in] gpio the gpio pin which should be deinitialised
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_gpio_finalize(gpio_dev_t *gpio);
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* HAL_GPIO_H */
| YifuLiu/AliOS-Things | components/drivers/peripheral/gpio/include/aos/hal/gpio.h | C | apache-2.0 | 4,694 |
/*
* Copyright ( C) 2015-2020 Alibaba Group Holding Limited
*/
#ifndef _IO_GPIO_H_
#define _IO_GPIO_H_
#define IOC_GPIO_BASE 'G'
#define IOC_GPIO_SET IOC_GPIO_BASE + 1
#define IOC_GPIO_GET IOC_GPIO_BASE + 2
#define IOC_GPIO_SET_IRQ IOC_GPIO_BASE + 3
enum GPIO_IO_BITS {
GPIO_IO_INPUT_BIT = 0, // Input
GPIO_IO_OUTPUT_BIT, // Output
GPIO_IO_INPUT_PU_BIT, // Pull up
GPIO_IO_INPUT_PD_BIT, // Pull down
GPIO_IO_INPUT_HI_BIT, // High impedance
GPIO_IO_OUTPUT_PP_BIT, // Push high and pull low actively
GPIO_IO_OUTPUT_ODNP_BIT, // Open Drain No Pull
GPIO_IO_OUTPUT_ODPU_BIT, // Open Drain Pull Up
GPIO_IO_OUTPUT_TOGGLE_BIT, // get GPIO output level reverted
GPIO_IO_INPUT_OUTPUT_MAX_BIT,
};
#define GPIO_IO_INPUT (1 << GPIO_IO_INPUT_BIT)
#define GPIO_IO_OUTPUT (1 << GPIO_IO_OUTPUT_BIT)
#define GPIO_IO_INPUT_PU (1 << GPIO_IO_INPUT_PU_BIT)
#define GPIO_IO_INPUT_PD (1 << GPIO_IO_INPUT_PD_BIT)
#define GPIO_IO_INPUT_HI (1 << GPIO_IO_INPUT_HI_BIT)
#define GPIO_IO_OUTPUT_PP (1 << GPIO_IO_OUTPUT_PP_BIT)
#define GPIO_IO_OUTPUT_ODNP (1 << GPIO_IO_OUTPUT_ODNP_BIT)
#define GPIO_IO_OUTPUT_ODPU (1 << GPIO_IO_OUTPUT_ODPU_BIT)
#define GPIO_IO_OUTPUT_TOGGLE (1 << GPIO_IO_OUTPUT_TOGGLE_BIT)
#define GPIO_IO_INPUT_MASK (GPIO_IO_INPUT_PU | GPIO_IO_INPUT_PD | GPIO_IO_INPUT_HI)
#define GPIO_IO_OUTPUT_MASK (GPIO_IO_OUTPUT_PP | GPIO_IO_OUTPUT_ODNP | GPIO_IO_OUTPUT_ODPU | GPIO_IO_OUTPUT_TOGGLE)
enum GPIO_IRQ_BITS {
GPIO_IRQ_ENABLE_BIT = 0,
GPIO_IRQ_DISABLE_BIT,
GPIO_IRQ_CLEAR_BIT,
GPIO_IRQ_LEVEL_LOW_BIT,
GPIO_IRQ_LEVEL_HIGH_BIT,
GPIO_IRQ_EDGE_FALLING_BIT,
GPIO_IRQ_EDGE_RISING_BIT,
GPIO_IRQ_EDGE_BOTH_BIT,
};
#define GPIO_IRQ_ENABLE (1 << GPIO_IRQ_ENABLE_BIT)
#define GPIO_IRQ_DISABLE (1 << GPIO_IRQ_DISABLE_BIT)
#define GPIO_IRQ_CLEAR (1 << GPIO_IRQ_CLEAR_BIT)
#define GPIO_IRQ_LEVEL_LOW (1 << GPIO_IRQ_LEVEL_LOW_BIT)
#define GPIO_IRQ_LEVEL_HIGH (1 << GPIO_IRQ_LEVEL_HIGH_BIT)
#define GPIO_IRQ_EDGE_FALLING (1 << GPIO_IRQ_EDGE_FALLING_BIT)
#define GPIO_IRQ_EDGE_RISING (1 << GPIO_IRQ_EDGE_RISING_BIT)
#define GPIO_IRQ_EDGE_BOTH (1 << GPIO_IRQ_EDGE_BOTH_BIT)
#define GPIO_IRQ_MODE_MASK (GPIO_IRQ_LEVEL_LOW | GPIO_IRQ_LEVEL_HIGH | GPIO_IRQ_EDGE_FALLING | GPIO_IRQ_EDGE_RISING | GPIO_IRQ_EDGE_BOTH)
typedef struct gpio_io_config {
unsigned int id:8; // GPIO id
unsigned int config:16; // GPIO config (directin/pull up/down, etc.)
unsigned int data:1; // output data
} gpio_io_config_t;
typedef int (*io_irq_handler_t)(void *arg);
typedef struct gpio_irq_config {
unsigned int id:8; // GPIO id
unsigned int config:16; // IRQ config (enable/disable, trigger type, clear, etc.)
unsigned char *arg; // argument used to parsed to irq callback
io_irq_handler_t cb;
} gpio_irq_config_t;
int vfs_gpio_drv_init (void);
#endif //_IO_GPIO_H_
| YifuLiu/AliOS-Things | components/drivers/peripheral/gpio/include/vfsdev/gpio_dev.h | C | apache-2.0 | 2,925 |
/*
* Copyright (C) 2020-2021 Alibaba Group Holding Limited
*/
#include <aos/gpio_core.h>
#ifdef AOS_COMP_DEVFS
#include <stdio.h>
#include <inttypes.h>
#endif
aos_status_t aos_gpio_get(aos_gpio_ref_t *ref, uint32_t id)
{
return aos_dev_get(ref, AOS_DEV_TYPE_GPIO, id);
}
void aos_gpio_put(aos_gpio_ref_t *ref)
{
aos_dev_put(ref);
}
aos_status_t
aos_gpio_get_mode_irq(aos_gpio_ref_t *ref, uint32_t *mode, aos_gpio_irq_handler_t *irq_handler, void **irq_arg)
{
aos_gpio_t *gpio;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
gpio = aos_container_of(ref->dev, aos_gpio_t, dev);
return aos_gpioc_get_mode_irq(&gpio->gpioc_ref, gpio->pin, mode, irq_handler, irq_arg);
}
aos_status_t
aos_gpio_set_mode_irq(aos_gpio_ref_t *ref, uint32_t mode, aos_gpio_irq_handler_t irq_handler, void *irq_arg)
{
aos_gpio_t *gpio;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
gpio = aos_container_of(ref->dev, aos_gpio_t, dev);
return aos_gpioc_set_mode_irq(&gpio->gpioc_ref, gpio->pin, mode, irq_handler, irq_arg);
}
aos_status_t aos_gpio_get_mode(aos_gpio_ref_t *ref, uint32_t *mode)
{
aos_gpio_t *gpio;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
gpio = aos_container_of(ref->dev, aos_gpio_t, dev);
return aos_gpioc_get_mode(&gpio->gpioc_ref, gpio->pin, mode);
}
aos_status_t aos_gpio_set_mode(aos_gpio_ref_t *ref, uint32_t mode)
{
aos_gpio_t *gpio;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
gpio = aos_container_of(ref->dev, aos_gpio_t, dev);
return aos_gpioc_set_mode(&gpio->gpioc_ref, gpio->pin, mode);
}
aos_status_t aos_gpio_get_irq_trigger(aos_gpio_ref_t *ref, uint32_t *trig)
{
aos_gpio_t *gpio;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
gpio = aos_container_of(ref->dev, aos_gpio_t, dev);
return aos_gpioc_get_irq_trigger(&gpio->gpioc_ref, gpio->pin, trig);
}
aos_status_t aos_gpio_set_irq_trigger(aos_gpio_ref_t *ref, uint32_t trig)
{
aos_gpio_t *gpio;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
gpio = aos_container_of(ref->dev, aos_gpio_t, dev);
return aos_gpioc_set_irq_trigger(&gpio->gpioc_ref, gpio->pin, trig);
}
aos_status_t aos_gpio_get_value(aos_gpio_ref_t *ref)
{
aos_gpio_t *gpio;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
gpio = aos_container_of(ref->dev, aos_gpio_t, dev);
return aos_gpioc_get_value(&gpio->gpioc_ref, gpio->pin);
}
aos_status_t aos_gpio_set_value(aos_gpio_ref_t *ref, int val)
{
aos_gpio_t *gpio;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
gpio = aos_container_of(ref->dev, aos_gpio_t, dev);
return aos_gpioc_set_value(&gpio->gpioc_ref, gpio->pin, val);
}
aos_status_t aos_gpio_toggle(aos_gpio_ref_t *ref)
{
aos_gpio_t *gpio;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
gpio = aos_container_of(ref->dev, aos_gpio_t, dev);
return aos_gpioc_toggle(&gpio->gpioc_ref, gpio->pin);
}
aos_status_t aos_gpio_poll_irq(aos_gpio_ref_t *ref, uint32_t timeout)
{
aos_gpio_t *gpio;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
gpio = aos_container_of(ref->dev, aos_gpio_t, dev);
return aos_gpioc_poll_irq(&gpio->gpioc_ref, gpio->pin, timeout);
}
aos_status_t aos_gpio_enter_irq(aos_gpio_ref_t *ref, uint32_t timeout)
{
aos_gpio_t *gpio;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
gpio = aos_container_of(ref->dev, aos_gpio_t, dev);
return aos_gpioc_enter_irq(&gpio->gpioc_ref, gpio->pin, timeout);
}
aos_status_t aos_gpio_exit_irq(aos_gpio_ref_t *ref)
{
aos_gpio_t *gpio;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
gpio = aos_container_of(ref->dev, aos_gpio_t, dev);
return aos_gpioc_exit_irq(&gpio->gpioc_ref, gpio->pin);
}
static void dev_gpio_unregister(aos_dev_t *dev)
{
}
static aos_status_t dev_gpio_get(aos_dev_ref_t *ref)
{
aos_gpio_t *gpio = aos_container_of(ref->dev, aos_gpio_t, dev);
uint32_t num_pins;
aos_status_t ret;
if (!aos_dev_ref_is_first(ref))
return 0;
ret = aos_gpioc_get(&gpio->gpioc_ref, gpio->gpioc_id);
if (ret)
return ret;
ret = aos_gpioc_get_num_pins(&gpio->gpioc_ref);
if (ret) {
aos_gpioc_put(&gpio->gpioc_ref);
return ret;
} else {
num_pins = (uint32_t)ret;
}
if (gpio->pin >= num_pins) {
aos_gpioc_put(&gpio->gpioc_ref);
return -EINVAL;
}
return 0;
}
static void dev_gpio_put(aos_dev_ref_t *ref)
{
aos_gpio_t *gpio = aos_container_of(ref->dev, aos_gpio_t, dev);
if (!aos_dev_ref_is_last(ref))
return;
aos_gpioc_put(&gpio->gpioc_ref);
}
static const aos_dev_ops_t dev_gpio_ops = {
.unregister = dev_gpio_unregister,
.get = dev_gpio_get,
.put = dev_gpio_put,
};
#ifdef AOS_COMP_DEVFS
static void devfs_gpio_irq_handler(int polarity, void *arg)
{
aos_devfs_poll_wakeup(&((aos_gpio_t *)arg)->dev.devfs_node, AOS_DEVFS_WQ_RD);
}
static aos_status_t devfs_gpio_ioctl(aos_devfs_file_t *file, int cmd, uintptr_t arg)
{
aos_gpio_ref_t *ref = aos_devfs_file2ref(file);
aos_status_t ret;
switch (cmd) {
case AOS_GPIO_IOC_GET_MODE:
{
uint32_t mode;
if (!aos_devfs_file_is_readable(file)) {
ret = -EPERM;
break;
}
if (!aos_umem_check((const void *)arg, sizeof(mode))) {
ret = -EFAULT;
break;
}
ret = aos_gpio_get_mode(ref, &mode);
if (ret)
break;
if (((mode & AOS_GPIO_DIR_MASK) == AOS_GPIO_DIR_INPUT ||
(mode & AOS_GPIO_DIR_MASK) == AOS_GPIO_DIR_BOTH) &&
(mode & AOS_GPIO_IRQ_TRIG_MASK) != AOS_GPIO_IRQ_TRIG_NONE)
mode &= ~AOS_GPIO_IRQ_ALTERNATE;
ret = aos_umem_copy((void *)arg, &mode, sizeof(mode)) ? -EFAULT : 0;
}
break;
case AOS_GPIO_IOC_SET_MODE:
{
uint32_t mode;
aos_gpio_irq_handler_t irq_handler = NULL;
void *irq_arg = NULL;
if (!aos_devfs_file_is_writable(file)) {
ret = -EPERM;
break;
}
if (!aos_umem_check((const void *)arg, sizeof(mode))) {
ret = -EFAULT;
break;
}
if (aos_umem_copy(&mode, (const void *)arg, sizeof(mode))) {
ret = -EFAULT;
break;
}
if (((mode & AOS_GPIO_DIR_MASK) == AOS_GPIO_DIR_INPUT ||
(mode & AOS_GPIO_DIR_MASK) == AOS_GPIO_DIR_BOTH) &&
(mode & AOS_GPIO_IRQ_TRIG_MASK) != AOS_GPIO_IRQ_TRIG_NONE) {
mode |= AOS_GPIO_IRQ_ALTERNATE;
irq_handler = devfs_gpio_irq_handler;
irq_arg = aos_container_of(ref->dev, aos_gpio_t, dev);
}
ret = aos_gpio_set_mode_irq(ref, mode, irq_handler, irq_arg);
}
break;
case AOS_GPIO_IOC_TOGGLE:
if (!aos_devfs_file_is_writable(file)) {
ret = -EPERM;
break;
}
ret = aos_gpio_toggle(ref);
break;
case AOS_GPIO_IOC_ENTER_IRQ:
if (!aos_devfs_file_is_readable(file)) {
ret = -EPERM;
break;
}
ret = aos_gpio_enter_irq(ref, (aos_devfs_file_get_mode(file) & O_NONBLOCK) ? AOS_NO_WAIT : AOS_WAIT_FOREVER);
break;
case AOS_GPIO_IOC_EXIT_IRQ:
if (!aos_devfs_file_is_writable(file)) {
ret = -EPERM;
break;
}
ret = aos_gpio_exit_irq(ref);
break;
default:
ret = -EINVAL;
break;
}
return ret;
}
static aos_status_t devfs_gpio_poll(aos_devfs_file_t *file, aos_devfs_poll_request_t *req)
{
aos_gpio_ref_t *ref = aos_devfs_file2ref(file);
aos_status_t ret = POLLOUT;
aos_status_t r;
aos_dev_lock(ref->dev);
aos_devfs_poll_add(&ref->dev->devfs_node, AOS_DEVFS_WQ_RD, req);
r = aos_gpio_poll_irq(ref, AOS_NO_WAIT);
aos_dev_unlock(ref->dev);
if (r >= 0) {
ret |= POLLIN;
} else if (r == -EAGAIN) {
ret |= 0;
} else if (r == -ENOTSUP) {
/* configuration without IRQ */
ret |= POLLIN;
} else {
/* on failure */
ret = r;
}
return ret;
}
static ssize_t devfs_gpio_read(aos_devfs_file_t *file, void *buf, size_t count)
{
aos_gpio_ref_t *ref = aos_devfs_file2ref(file);
uint8_t tmp_buf[1];
aos_status_t r;
if (!aos_devfs_file_is_readable(file))
return -EPERM;
if (count < 1)
return -EINVAL;
if (buf && !aos_umem_check(buf, 1))
return -EFAULT;
r = aos_gpio_get_value(ref);
if (r < 0)
return (ssize_t)r;
tmp_buf[0] = (r == 0) ? 0 : 1;
if (aos_umem_copy(buf, tmp_buf, 1))
return -EFAULT;
return 1;
}
static ssize_t devfs_gpio_write(aos_devfs_file_t *file, const void *buf, size_t count)
{
aos_gpio_ref_t *ref = aos_devfs_file2ref(file);
uint8_t tmp_buf[1];
aos_status_t r;
if (!aos_devfs_file_is_writable(file))
return -EPERM;
if (count < 1)
return -EINVAL;
if (buf && !aos_umem_check(buf, 1))
return -EFAULT;
if (aos_umem_copy(tmp_buf, buf, 1))
return -EFAULT;
r = aos_gpio_set_value(ref, tmp_buf[0] == 0 ? 0 : 1);
return (r < 0) ? (ssize_t)r : 1;
}
static const aos_devfs_file_ops_t devfs_gpio_ops = {
.ioctl = devfs_gpio_ioctl,
.poll = devfs_gpio_poll,
.mmap = NULL,
.read = devfs_gpio_read,
.write = devfs_gpio_write,
.lseek = NULL,
};
#endif /* AOS_COMP_DEVFS */
aos_status_t aos_gpio_register(aos_gpio_t *gpio)
{
#ifdef AOS_COMP_DEVFS
int name_len;
#endif
if (!gpio)
return -EINVAL;
gpio->dev.type = AOS_DEV_TYPE_GPIO;
gpio->dev.ops = &dev_gpio_ops;
#ifdef AOS_COMP_DEVFS
aos_devfs_node_init(&gpio->dev.devfs_node);
gpio->dev.devfs_node.ops = &devfs_gpio_ops;
name_len = snprintf(gpio->dev.devfs_node.name, sizeof(gpio->dev.devfs_node.name), "gpio%" PRIu32, gpio->dev.id);
if (name_len < 0 || name_len >= sizeof(gpio->dev.devfs_node.name))
return -EINVAL;
#endif
return aos_dev_register(&gpio->dev);
}
aos_status_t aos_gpio_register_argumented(aos_gpio_t *gpio, uint32_t id, uint32_t gpioc_id, uint32_t pin)
{
if (!gpio)
return -EINVAL;
gpio->dev.id = id;
gpio->gpioc_id = gpioc_id;
gpio->pin = pin;
return aos_gpio_register(gpio);
}
aos_status_t aos_gpio_unregister(uint32_t id)
{
return aos_dev_unregister(AOS_DEV_TYPE_GPIO, id);
}
| YifuLiu/AliOS-Things | components/drivers/peripheral/gpio/src/gpio.c | C | apache-2.0 | 10,827 |
/*
* Copyright (C) 2015-2021 Alibaba Group Holding Limited
*/
#include <poll.h>
#include <drivers/u_ld.h>
#include <aos/hal/gpio.h>
#include <vfsdev/gpio_dev.h>
#include <devicevfs/devicevfs.h>
#ifdef CONFIG_GPIO_NUM
#define PLATFORM_GPIO_NUM CONFIG_GPIO_NUM
#else
#define PLATFORM_GPIO_NUM 40
#endif
#if (PLATFORM_GPIO_NUM > 0)
// UART device node will be named with "/dev/ttyUART<x>", where <x> is uart port id
#define GPIO_DEV_NAME_FORMAT "gpio"
static gpio_config_t gpio_hal_configs[PLATFORM_GPIO_NUM];
static void prepare_gpio_hal(gpio_dev_t *gpio_dev)
{
if (gpio_dev->config == gpio_hal_configs[gpio_dev->port])
return;
if (gpio_hal_configs[gpio_dev->port] != -1)
(void)hal_gpio_finalize(gpio_dev);
(void)hal_gpio_init(gpio_dev);
gpio_hal_configs[gpio_dev->port] = gpio_dev->config;
}
ssize_t gpio_device_read (file_t *f, void *buffer, size_t size) {
ddkc_warn("%s not implemented\r\n", __func__);
return -1;
}
ssize_t gpio_device_write (file_t *f, const void *buffer, size_t size) {
ddkc_warn("%s not implemented\r\n", __func__);
return -1;
}
int gpio_io_set (gpio_io_config_t *config) {
int ret = 0;
gpio_dev_t gpio_dev;
ddkc_dbg("%s\r\n", __func__);
if (!config || config->id >= PLATFORM_GPIO_NUM) {
ddkc_err("invalid param: config:%p, id:%d\r\n", config, !config ? 0 : config->id);
return -EINVAL;
}
memset(&gpio_dev, 0, sizeof(gpio_dev_t));
gpio_dev.port = config->id;
if (config->config & GPIO_IO_OUTPUT_MASK) {
/* check if */
if ((config->config & GPIO_IO_OUTPUT_MASK) == GPIO_IO_OUTPUT_TOGGLE) {
ret = hal_gpio_output_toggle(&gpio_dev);
ddkc_dbg("GPIO:%d, output toggle done, ret:%d", gpio_dev.port, ret);
return 0;
}
switch (config->config & GPIO_IO_OUTPUT_MASK) {
case GPIO_IO_OUTPUT_PP:
gpio_dev.config = OUTPUT_PUSH_PULL;
break;
case GPIO_IO_OUTPUT_ODNP:
gpio_dev.config = OUTPUT_OPEN_DRAIN_NO_PULL;
break;
case GPIO_IO_OUTPUT_ODPU:
gpio_dev.config = OUTPUT_OPEN_DRAIN_PULL_UP;
break;
default:
ddkc_dbg("invalid config:0x%x, set to ODNP\r\n", config->config);
gpio_dev.config = OUTPUT_OPEN_DRAIN_NO_PULL;
break;
}
prepare_gpio_hal(&gpio_dev);
if (config->data) {
ret = hal_gpio_output_high(&gpio_dev);
} else
ret = hal_gpio_output_low(&gpio_dev);
ddkc_dbg("GPIO:%d, output config:0x%x, ret:%d", gpio_dev.port, gpio_dev.config, ret);
return ret;
}
ddkc_warn("!!!WARNING!!! THIS SHOULD NEVER HAPPEN, config:0x%x\r\n", config->config);
return ret;
}
int gpio_io_get (gpio_io_config_t *config) {
int ret = 0;
gpio_dev_t gpio_dev;
ddkc_dbg("%s\r\n", __func__);
if (!config || config->id >= PLATFORM_GPIO_NUM) {
ddkc_err("invalid param: config:%p, id:%d\r\n", config, !config ? 0 : config->id);
return -EINVAL;
}
memset(&gpio_dev, 0, sizeof(gpio_dev_t));
gpio_dev.port = config->id;
if (config->config & GPIO_IO_INPUT_MASK) {
unsigned int value = 0;
switch (config->config & GPIO_IO_INPUT_MASK) {
case GPIO_IO_INPUT_HI:
gpio_dev.config = INPUT_HIGH_IMPEDANCE;
break;
case GPIO_IO_INPUT_PU:
gpio_dev.config = INPUT_PULL_UP;
break;
case GPIO_IO_INPUT_PD:
gpio_dev.config = INPUT_PULL_DOWN;
break;
default:
gpio_dev.config = INPUT_HIGH_IMPEDANCE;
break;
}
prepare_gpio_hal(&gpio_dev);
ret = hal_gpio_input_get(&gpio_dev, &value);
ddkc_dbg("GPIO:%d, input config:0x%x, ret:%d\r\n", gpio_dev.port, gpio_dev.config, ret);
return !ret ? value: ret;
}
ddkc_warn("!!!WARNING!!! THIS SHOULD NEVER HAPPEN, config:0x%x\r\n", config->config);
return ret;
}
static int gpio_irq_set (gpio_irq_config_t *config) {
int ret = 0;
gpio_dev_t gpio_dev;
gpio_irq_trigger_t irq_type;
ddkc_dbg("%s\r\n", __func__);
if (!config || config->id >= PLATFORM_GPIO_NUM) {
ddkc_err("invalid param: config:%p, id:%d\r\n", config, !config ? 0 : config->id);
return -EINVAL;
}
memset(&gpio_dev, 0, sizeof(gpio_dev_t));
gpio_dev.port = config->id;
gpio_dev.config = IRQ_MODE;
prepare_gpio_hal(&gpio_dev);
if (config->config & GPIO_IRQ_ENABLE) {
switch (config->config & GPIO_IRQ_MODE_MASK) {
case GPIO_IRQ_LEVEL_LOW:
ddkc_warn("not implemented yet\r\n");
return -EINVAL;
case GPIO_IRQ_LEVEL_HIGH:
ddkc_warn("not implemented yet\r\n");
return -EINVAL;
case GPIO_IRQ_EDGE_FALLING:
irq_type = IRQ_TRIGGER_FALLING_EDGE;
break;
case GPIO_IRQ_EDGE_RISING:
irq_type = IRQ_TRIGGER_RISING_EDGE;
break;
case GPIO_IRQ_EDGE_BOTH:
irq_type = IRQ_TRIGGER_BOTH_EDGES;
break;
default:
ddkc_warn("ERROR - invalid irq_type:0x%x\r\n", config->config & GPIO_IRQ_MODE_MASK);
return -EINVAL;
}
ret = hal_gpio_enable_irq(&gpio_dev, irq_type, (gpio_irq_handler_t)config->cb, config->arg);
} else if (config->config & GPIO_IRQ_DISABLE) {
ret = hal_gpio_disable_irq(&gpio_dev);
} else if (config->config & GPIO_IRQ_CLEAR) {
ret = hal_gpio_clear_irq(&gpio_dev);
}
return ret;
}
int gpio_device_ioctl (file_t *f, int cmd, unsigned long arg) {
int ret = 0;
gpio_io_config_t config;
gpio_irq_config_t irq_config;
ddkc_dbg("i_name:%s, cmd:%d, arg:0x%lx\r\n", f->node->i_name, cmd, arg);
switch (cmd) {
case IOC_GPIO_SET:
aos_ipc_copy(&config, (void *)arg, sizeof(gpio_io_config_t));
ret = gpio_io_set(&config);
break;
case IOC_GPIO_GET:
aos_ipc_copy(&config, (void *)arg, sizeof(gpio_io_config_t));
ret = gpio_io_get(&config);
aos_ipc_copy((void *)arg, &config, sizeof(gpio_io_config_t));
break;
case IOC_GPIO_SET_IRQ:
aos_ipc_copy(&irq_config, (void *)arg, sizeof(gpio_irq_config_t));
ret = gpio_irq_set(&irq_config);
break;
default:
ddkc_warn("invalid command:%d\r\n", cmd);
break;
}
return ret;
}
int gpio_device_open (inode_t *node, file_t *f) {
int ret = 0;
return ret;
}
int gpio_device_close (file_t *f) {
int ret = 0;
return ret;
}
/************************** device ****************************/
subsys_file_ops_t gpio_device_fops = {
.open = gpio_device_open,
.close = gpio_device_close,
.read = gpio_device_read,
.write = gpio_device_write,
.ioctl = gpio_device_ioctl,
.poll = NULL,
.lseek = NULL,
};
int gpio_device_init (struct u_platform_device *pdev) {
// make sure 0 is returned if init operation success
// or aos_dev_reg procedure will break and no device node will be registered
ddkc_dbg("%s\r\n", __func__);
return 0;
}
int gpio_device_deinit (struct u_platform_device *pdev) {
ddkc_dbg("%s\r\n", __func__);
return 0;
}
int gpio_device_pm (struct u_platform_device *pdev, u_pm_ops_t state) {
ddkc_dbg("%s\r\n", __func__);
return 0;
}
struct subsys_drv gpio_device_drv = {
.drv_name = "gpio",
.init = gpio_device_init,
.deinit = gpio_device_deinit,
.pm = gpio_device_pm,
};
struct subsys_dev g_gpio_device = {
.user_data = NULL,
.type = BUS_TYPE_PLATFORM,
.permission = 0,
.node_name = "gpio"
};
int vfs_gpio_drv_init (void) {
int ret = 0;
int i;
for (i = 0; i < PLATFORM_GPIO_NUM; i++)
gpio_hal_configs[i] = -1;
ddkc_dbg("gpio vfs driver init starts\r\n");
ret = aos_dev_reg(&g_gpio_device, &gpio_device_fops, &gpio_device_drv);
if (ret) {
ddkc_err("aos_dev_reg for uart devices failed, ret:%d\r\n", ret);
goto err;
}
ddkc_dbg("gpio vfs driver init finish, ret:%d\r\n", ret);
return 0;
err:
ddkc_warn("gpio vfs driver init failed, ret:%d\r\n", ret);
return ret;
}
VFS_DRIVER_ENTRY(vfs_gpio_drv_init)
#endif
| YifuLiu/AliOS-Things | components/drivers/peripheral/gpio/src/gpio_dev.c | C | apache-2.0 | 8,539 |
/*
* Copyright (C) 2020-2021 Alibaba Group Holding Limited
*/
#include <aos/gpioc_core.h>
#ifndef AOS_CONFIG_GPIO_IRQ_TASK_DEFAULT_PRIO
#define AOS_CONFIG_GPIO_IRQ_TASK_DEFAULT_PRIO 30
#endif
#ifndef AOS_CONFIG_GPIO_IRQ_TASK_STACK_SIZE
#define AOS_CONFIG_GPIO_IRQ_TASK_STACK_SIZE 4096
#endif
aos_status_t aos_gpioc_get(aos_gpioc_ref_t *ref, uint32_t id)
{
return aos_dev_get(ref, AOS_DEV_TYPE_GPIOC, id);
}
void aos_gpioc_put(aos_gpioc_ref_t *ref)
{
aos_dev_put(ref);
}
aos_status_t aos_gpioc_get_num_pins(aos_gpioc_ref_t *ref)
{
aos_gpioc_t *gpioc;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
gpioc = aos_container_of(ref->dev, aos_gpioc_t, dev);
return gpioc->num_pins;
}
static void get_mode_irq(aos_gpioc_t *gpioc, uint32_t pin, uint32_t *mode,
aos_gpio_irq_handler_t *irq_handler, void **irq_arg)
{
if (mode)
*mode = gpioc->pins[pin].mode;
if (irq_handler)
*irq_handler = gpioc->pins[pin].irq_handler;
if (irq_arg)
*irq_arg = gpioc->pins[pin].irq_arg;
}
aos_status_t aos_gpioc_get_mode_irq(aos_gpioc_ref_t *ref, uint32_t pin, uint32_t *mode,
aos_gpio_irq_handler_t *irq_handler, void **irq_arg)
{
aos_gpioc_t *gpioc;
if (!ref || !aos_dev_ref_is_valid(ref) || (!mode && !irq_handler && !irq_arg))
return -EINVAL;
gpioc = aos_container_of(ref->dev, aos_gpioc_t, dev);
if (pin >= gpioc->num_pins)
return -EINVAL;
aos_dev_lock(ref->dev);
get_mode_irq(gpioc, pin, mode, irq_handler, irq_arg);
aos_dev_unlock(ref->dev);
return 0;
}
static bool is_in_irq(aos_gpioc_t *gpioc, uint32_t pin)
{
aos_task_t self_task;
aos_task_t irq_task;
self_task = aos_task_self();
aos_dev_lock(&gpioc->dev);
irq_task = gpioc->pins[pin].irq_task;
aos_dev_unlock(&gpioc->dev);
return self_task == irq_task;
}
static inline uint32_t mode_to_irq_trig(uint32_t mode)
{
uint32_t trig;
if ((mode & AOS_GPIO_DIR_MASK) == AOS_GPIO_DIR_INPUT || (mode & AOS_GPIO_DIR_MASK) == AOS_GPIO_DIR_BOTH)
trig = mode & AOS_GPIO_IRQ_TRIG_MASK;
else
trig = AOS_GPIO_IRQ_TRIG_NONE;
return trig;
}
static void irq_task_func(void *arg)
{
aos_gpioc_pin_t *pin = (aos_gpioc_pin_t *)arg;
aos_gpioc_t *gpioc = pin->gpioc;
while (1) {
uint32_t trig;
uint32_t val;
bool dying;
aos_irqsave_t flags;
(void)aos_event_get(&pin->irq_event, 0xFFFFFFFF, AOS_EVENT_OR, &val, AOS_WAIT_FOREVER);
(void)aos_sem_wait(&pin->irq_sem, AOS_WAIT_FOREVER);
flags = aos_spin_lock_irqsave(&gpioc->lock);
(void)aos_event_get(&pin->irq_event, 0xFFFFFFFF, AOS_EVENT_OR_CLEAR, &val, AOS_NO_WAIT);
aos_spin_unlock_irqrestore(&gpioc->lock, flags);
pin->irq_new_task = pin->irq_task;
trig = mode_to_irq_trig(pin->mode);
switch (trig) {
case AOS_GPIO_IRQ_TRIG_EDGE_RISING:
for (int i = 0; i < 16; i++) {
uint32_t mask = (val << (2 * i)) & 0x3;
if (mask == 0x2)
pin->irq_handler(1, pin->irq_arg);
else
break;
}
break;
case AOS_GPIO_IRQ_TRIG_EDGE_FALLING:
for (int i = 0; i < 16; i++) {
uint32_t mask = (val << (2 * i)) & 0x3;
if (mask == 0x1)
pin->irq_handler(0, pin->irq_arg);
else
break;
}
break;
case AOS_GPIO_IRQ_TRIG_EDGE_BOTH:
for (int i = 0; i < 16; i++) {
uint32_t mask = (val << (2 * i)) & 0x3;
if (mask == 0x2)
pin->irq_handler(1, pin->irq_arg);
else if (mask == 0x1)
pin->irq_handler(0, pin->irq_arg);
else
break;
}
break;
case AOS_GPIO_IRQ_TRIG_LEVEL_HIGH:
if (val == 0x2)
pin->irq_handler(1, pin->irq_arg);
break;
case AOS_GPIO_IRQ_TRIG_LEVEL_LOW:
if (val == 0x1)
pin->irq_handler(0, pin->irq_arg);
break;
default:
break;
}
if (trig == AOS_GPIO_IRQ_TRIG_LEVEL_HIGH || trig == AOS_GPIO_IRQ_TRIG_LEVEL_LOW) {
uint32_t pin_id = ((uintptr_t)pin - (uintptr_t)gpioc->pins) / sizeof(*pin);
aos_irqsave_t flags;
flags = aos_spin_lock_irqsave(&gpioc->lock);
pin->hard_irq_en = true;
gpioc->ops->enable_irq(gpioc, pin_id);
aos_spin_unlock_irqrestore(&gpioc->lock, flags);
}
if (pin->irq_new_task == pin->irq_task) {
dying = false;
} else {
aos_dev_lock(&gpioc->dev);
pin->irq_task = pin->irq_new_task;
aos_dev_unlock(&gpioc->dev);
dying = true;
}
pin->irq_new_task = NULL;
aos_sem_signal(&pin->irq_sem);
if (dying)
break;
}
aos_task_exit(0);
}
static aos_status_t set_mode_irq(aos_gpioc_t *gpioc, uint32_t pin, bool in_irq, uint32_t mode,
aos_gpio_irq_handler_t irq_handler, void *irq_arg)
{
uint32_t old_mode;
int old_value;
bool old_threaded;
bool new_threaded;
aos_task_t new_task = NULL;
aos_status_t ret;
switch (mode & AOS_GPIO_DIR_MASK) {
case AOS_GPIO_DIR_NONE:
irq_handler = NULL;
break;
case AOS_GPIO_DIR_INPUT:
switch (mode & AOS_GPIO_INPUT_CFG_MASK) {
case AOS_GPIO_INPUT_CFG_DEFAULT:
case AOS_GPIO_INPUT_CFG_HI:
case AOS_GPIO_INPUT_CFG_PU:
case AOS_GPIO_INPUT_CFG_PD:
break;
default:
return -EINVAL;
}
switch (mode & AOS_GPIO_IRQ_TRIG_MASK) {
case AOS_GPIO_IRQ_TRIG_NONE:
break;
case AOS_GPIO_IRQ_TRIG_EDGE_RISING:
case AOS_GPIO_IRQ_TRIG_EDGE_FALLING:
case AOS_GPIO_IRQ_TRIG_EDGE_BOTH:
case AOS_GPIO_IRQ_TRIG_LEVEL_HIGH:
case AOS_GPIO_IRQ_TRIG_LEVEL_LOW:
if (!(mode & AOS_GPIO_IRQ_ALTERNATE) && !irq_handler)
return -EINVAL;
break;
default:
return -EINVAL;
}
break;
case AOS_GPIO_DIR_OUTPUT:
switch (mode & AOS_GPIO_OUTPUT_CFG_MASK) {
case AOS_GPIO_OUTPUT_CFG_DEFAULT:
case AOS_GPIO_OUTPUT_CFG_PP:
case AOS_GPIO_OUTPUT_CFG_ODNP:
case AOS_GPIO_OUTPUT_CFG_ODPU:
break;
default:
return -EINVAL;
}
irq_handler = NULL;
break;
case AOS_GPIO_DIR_BOTH:
switch (mode & AOS_GPIO_OUTPUT_CFG_MASK) {
case AOS_GPIO_OUTPUT_CFG_DEFAULT:
case AOS_GPIO_OUTPUT_CFG_PP:
case AOS_GPIO_OUTPUT_CFG_ODNP:
case AOS_GPIO_OUTPUT_CFG_ODPU:
break;
default:
return -EINVAL;
}
switch (mode & AOS_GPIO_IRQ_TRIG_MASK) {
case AOS_GPIO_IRQ_TRIG_NONE:
break;
case AOS_GPIO_IRQ_TRIG_EDGE_RISING:
case AOS_GPIO_IRQ_TRIG_EDGE_FALLING:
case AOS_GPIO_IRQ_TRIG_EDGE_BOTH:
case AOS_GPIO_IRQ_TRIG_LEVEL_HIGH:
case AOS_GPIO_IRQ_TRIG_LEVEL_LOW:
if (!(mode & AOS_GPIO_IRQ_ALTERNATE) && !irq_handler)
return -EINVAL;
break;
default:
return -EINVAL;
}
break;
default:
return -EINVAL;
}
if (!irq_handler)
irq_arg = NULL;
old_mode = gpioc->pins[pin].mode;
old_value = gpioc->pins[pin].value;
if (mode_to_irq_trig(old_mode) != AOS_GPIO_IRQ_TRIG_NONE) {
aos_irqsave_t flags;
flags = aos_spin_lock_irqsave(&gpioc->lock);
(void)aos_event_set(&gpioc->pins[pin].irq_event, 0, AOS_EVENT_AND);
if (gpioc->pins[pin].hard_irq_en) {
gpioc->pins[pin].hard_irq_en = false;
gpioc->ops->disable_irq(gpioc, pin);
}
aos_spin_unlock_irqrestore(&gpioc->lock, flags);
}
old_threaded = (gpioc->pins[pin].irq_handler != NULL && !(old_mode & AOS_GPIO_IRQ_ALTERNATE));
new_threaded = (irq_handler != NULL && !(mode & AOS_GPIO_IRQ_ALTERNATE));
if ((new_threaded && !old_threaded) ||
(new_threaded && old_threaded && (mode & AOS_GPIO_IRQ_PRIO_MASK) != (old_mode & AOS_GPIO_IRQ_PRIO_MASK))) {
uint32_t prio = ((mode & AOS_GPIO_IRQ_PRIO_MASK) == AOS_GPIO_IRQ_PRIO_DEFAULT) ?
AOS_CONFIG_GPIO_IRQ_TASK_DEFAULT_PRIO : ((mode & AOS_GPIO_IRQ_PRIO_MASK) >> 16);
ret = aos_task_new_ext(&new_task, "gpio_irq_task", irq_task_func, &gpioc->pins[pin],
AOS_CONFIG_GPIO_IRQ_TASK_STACK_SIZE, prio);
if (ret) {
if ((in_irq && (mode_to_irq_trig(old_mode) == AOS_GPIO_IRQ_TRIG_EDGE_RISING ||
mode_to_irq_trig(old_mode) == AOS_GPIO_IRQ_TRIG_EDGE_FALLING ||
mode_to_irq_trig(old_mode) == AOS_GPIO_IRQ_TRIG_EDGE_BOTH)) ||
(!in_irq && mode_to_irq_trig(old_mode) != AOS_GPIO_IRQ_TRIG_NONE)) {
aos_irqsave_t flags;
flags = aos_spin_lock_irqsave(&gpioc->lock);
gpioc->pins[pin].hard_irq_en = true;
gpioc->ops->enable_irq(gpioc, pin);
aos_spin_unlock_irqrestore(&gpioc->lock, flags);
}
return ret;
}
}
gpioc->pins[pin].mode = mode;
gpioc->pins[pin].value = ((mode & AOS_GPIO_DIR_MASK) == AOS_GPIO_DIR_OUTPUT ||
(mode & AOS_GPIO_DIR_MASK) == AOS_GPIO_DIR_BOTH) ?
!!(mode & AOS_GPIO_OUTPUT_INIT_HIGH) : 0;
ret = gpioc->ops->set_mode(gpioc, pin);
if (ret) {
gpioc->pins[pin].mode = old_mode;
gpioc->pins[pin].value = old_value;
if (new_task)
(void)aos_task_delete(&new_task);
if ((in_irq && (mode_to_irq_trig(old_mode) == AOS_GPIO_IRQ_TRIG_EDGE_RISING ||
mode_to_irq_trig(old_mode) == AOS_GPIO_IRQ_TRIG_EDGE_FALLING ||
mode_to_irq_trig(old_mode) == AOS_GPIO_IRQ_TRIG_EDGE_BOTH)) ||
(!in_irq && mode_to_irq_trig(old_mode) != AOS_GPIO_IRQ_TRIG_NONE)) {
aos_irqsave_t flags;
flags = aos_spin_lock_irqsave(&gpioc->lock);
gpioc->pins[pin].hard_irq_en = true;
gpioc->ops->enable_irq(gpioc, pin);
aos_spin_unlock_irqrestore(&gpioc->lock, flags);
}
return ret;
}
if (new_threaded && old_threaded) {
if (new_task) {
if (in_irq) {
/* gpioc->pins[pin].irq_new_task != NULL */
if (gpioc->pins[pin].irq_new_task != gpioc->pins[pin].irq_task)
(void)aos_task_delete(&gpioc->pins[pin].irq_new_task);
gpioc->pins[pin].irq_new_task = new_task;
} else {
/* gpioc->pins[pin].irq_task != NULL */
(void)aos_task_delete(&gpioc->pins[pin].irq_task);
gpioc->pins[pin].irq_task = new_task;
}
}
} else if (new_threaded && !old_threaded) {
if (in_irq) {
/* gpioc->pins[pin].irq_new_task == NULL */
gpioc->pins[pin].irq_new_task = new_task;
} else {
/* gpioc->pins[pin].irq_task == NULL */
gpioc->pins[pin].irq_task = new_task;
}
} else if (!new_threaded && old_threaded) {
if (in_irq) {
/* gpioc->pins[pin].irq_new_task != NULL */
if (gpioc->pins[pin].irq_new_task != gpioc->pins[pin].irq_task)
(void)aos_task_delete(&gpioc->pins[pin].irq_new_task);
gpioc->pins[pin].irq_new_task = NULL;
} else {
/* gpioc->pins[pin].irq_task != NULL */
(void)aos_task_delete(&gpioc->pins[pin].irq_task);
gpioc->pins[pin].irq_task = NULL;
}
}
gpioc->pins[pin].irq_handler = irq_handler;
gpioc->pins[pin].irq_arg = irq_arg;
if ((in_irq && (mode_to_irq_trig(mode) == AOS_GPIO_IRQ_TRIG_EDGE_RISING ||
mode_to_irq_trig(mode) == AOS_GPIO_IRQ_TRIG_EDGE_FALLING ||
mode_to_irq_trig(mode) == AOS_GPIO_IRQ_TRIG_EDGE_BOTH)) ||
(!in_irq && mode_to_irq_trig(mode) != AOS_GPIO_IRQ_TRIG_NONE)) {
aos_irqsave_t flags;
flags = aos_spin_lock_irqsave(&gpioc->lock);
gpioc->pins[pin].hard_irq_en = true;
gpioc->ops->enable_irq(gpioc, pin);
aos_spin_unlock_irqrestore(&gpioc->lock, flags);
}
return 0;
}
aos_status_t aos_gpioc_set_mode_irq(aos_gpioc_ref_t *ref, uint32_t pin, uint32_t mode,
aos_gpio_irq_handler_t irq_handler, void *irq_arg)
{
aos_gpioc_t *gpioc;
bool in_irq;
aos_status_t ret;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
gpioc = aos_container_of(ref->dev, aos_gpioc_t, dev);
if (pin >= gpioc->num_pins)
return -EINVAL;
in_irq = is_in_irq(gpioc, pin);
if (!in_irq)
(void)aos_sem_wait(&gpioc->pins[pin].irq_sem, AOS_WAIT_FOREVER);
aos_dev_lock(ref->dev);
ret = set_mode_irq(gpioc, pin, in_irq, mode, irq_handler, irq_arg);
aos_dev_unlock(ref->dev);
if (!in_irq)
aos_sem_signal(&gpioc->pins[pin].irq_sem);
return ret;
}
aos_status_t aos_gpioc_get_mode(aos_gpioc_ref_t *ref, uint32_t pin, uint32_t *mode)
{
return aos_gpioc_get_mode_irq(ref, pin, mode, NULL, NULL);
}
aos_status_t aos_gpioc_set_mode(aos_gpioc_ref_t *ref, uint32_t pin, uint32_t mode)
{
aos_gpioc_t *gpioc;
bool in_irq;
aos_gpio_irq_handler_t irq_handler;
void *irq_arg;
aos_status_t ret;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
gpioc = aos_container_of(ref->dev, aos_gpioc_t, dev);
if (pin >= gpioc->num_pins)
return -EINVAL;
in_irq = is_in_irq(gpioc, pin);
if (!in_irq)
(void)aos_sem_wait(&gpioc->pins[pin].irq_sem, AOS_WAIT_FOREVER);
aos_dev_lock(ref->dev);
get_mode_irq(gpioc, pin, NULL, &irq_handler, &irq_arg);
ret = set_mode_irq(gpioc, pin, in_irq, mode, irq_handler, irq_arg);
aos_dev_unlock(ref->dev);
if (!in_irq)
aos_sem_signal(&gpioc->pins[pin].irq_sem);
return ret;
}
aos_status_t aos_gpioc_get_irq_trigger(aos_gpioc_ref_t *ref, uint32_t pin, uint32_t *trig)
{
uint32_t mode;
aos_status_t ret;
if (!trig)
return -EINVAL;
ret = aos_gpioc_get_mode_irq(ref, pin, &mode, NULL, NULL);
if (ret)
return ret;
if ((mode & AOS_GPIO_DIR_MASK) != AOS_GPIO_DIR_INPUT && (mode & AOS_GPIO_DIR_MASK) != AOS_GPIO_DIR_BOTH)
return -ENOTSUP;
*trig = mode & AOS_GPIO_IRQ_TRIG_MASK;
return 0;
}
aos_status_t aos_gpioc_set_irq_trigger(aos_gpioc_ref_t *ref, uint32_t pin, uint32_t trig)
{
aos_gpioc_t *gpioc;
bool in_irq;
uint32_t mode;
aos_gpio_irq_handler_t irq_handler;
void *irq_arg;
aos_status_t ret;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
gpioc = aos_container_of(ref->dev, aos_gpioc_t, dev);
if (pin >= gpioc->num_pins)
return -EINVAL;
in_irq = is_in_irq(gpioc, pin);
if (!in_irq)
(void)aos_sem_wait(&gpioc->pins[pin].irq_sem, AOS_WAIT_FOREVER);
aos_dev_lock(ref->dev);
get_mode_irq(gpioc, pin, &mode, &irq_handler, &irq_arg);
if ((mode & AOS_GPIO_DIR_MASK) != AOS_GPIO_DIR_INPUT && (mode & AOS_GPIO_DIR_MASK) != AOS_GPIO_DIR_BOTH) {
aos_dev_unlock(ref->dev);
if (!in_irq)
aos_sem_signal(&gpioc->pins[pin].irq_sem);
return -ENOTSUP;
}
mode &= ~AOS_GPIO_DIR_MASK;
mode |= trig & AOS_GPIO_DIR_MASK;
ret = set_mode_irq(gpioc, pin, in_irq, mode, irq_handler, irq_arg);
aos_dev_unlock(ref->dev);
if (!in_irq)
aos_sem_signal(&gpioc->pins[pin].irq_sem);
return ret;
}
aos_status_t aos_gpioc_get_value(aos_gpioc_ref_t *ref, uint32_t pin)
{
aos_gpioc_t *gpioc;
uint32_t mode;
aos_status_t ret;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
gpioc = aos_container_of(ref->dev, aos_gpioc_t, dev);
if (pin >= gpioc->num_pins)
return -EINVAL;
aos_dev_lock(ref->dev);
mode = gpioc->pins[pin].mode;
if ((mode & AOS_GPIO_DIR_MASK) == AOS_GPIO_DIR_INPUT || (mode & AOS_GPIO_DIR_MASK) == AOS_GPIO_DIR_BOTH)
ret = (aos_status_t)!!gpioc->ops->get_value(gpioc, pin);
else if ((mode & AOS_GPIO_DIR_MASK) == AOS_GPIO_DIR_OUTPUT)
ret = (aos_status_t)gpioc->pins[pin].value;
else
ret = -ENOTSUP;
aos_dev_unlock(ref->dev);
return ret;
}
aos_status_t aos_gpioc_set_value(aos_gpioc_ref_t *ref, uint32_t pin, int val)
{
aos_gpioc_t *gpioc;
uint32_t mode;
if (!ref || !aos_dev_ref_is_valid(ref) || val < 0)
return -EINVAL;
gpioc = aos_container_of(ref->dev, aos_gpioc_t, dev);
if (pin >= gpioc->num_pins)
return -EINVAL;
aos_dev_lock(ref->dev);
mode = gpioc->pins[pin].mode;
if ((mode & AOS_GPIO_DIR_MASK) != AOS_GPIO_DIR_OUTPUT && (mode & AOS_GPIO_DIR_MASK) != AOS_GPIO_DIR_BOTH) {
aos_dev_unlock(ref->dev);
return -ENOTSUP;
}
val = !!val;
if (gpioc->pins[pin].value == val) {
aos_dev_unlock(ref->dev);
return 0;
}
gpioc->pins[pin].value = val;
gpioc->ops->set_value(gpioc, pin);
aos_dev_unlock(ref->dev);
return 0;
}
aos_status_t aos_gpioc_toggle(aos_gpioc_ref_t *ref, uint32_t pin)
{
aos_gpioc_t *gpioc;
uint32_t mode;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
gpioc = aos_container_of(ref->dev, aos_gpioc_t, dev);
if (pin >= gpioc->num_pins)
return -EINVAL;
aos_dev_lock(ref->dev);
mode = gpioc->pins[pin].mode;
if ((mode & AOS_GPIO_DIR_MASK) != AOS_GPIO_DIR_OUTPUT && (mode & AOS_GPIO_DIR_MASK) != AOS_GPIO_DIR_BOTH) {
aos_dev_unlock(ref->dev);
return -ENOTSUP;
}
gpioc->pins[pin].value = !gpioc->pins[pin].value;
gpioc->ops->set_value(gpioc, pin);
aos_dev_unlock(ref->dev);
return 0;
}
aos_status_t aos_gpioc_poll_irq(aos_gpioc_ref_t *ref, uint32_t pin, uint32_t timeout)
{
aos_gpioc_t *gpioc;
aos_status_t ret;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
gpioc = aos_container_of(ref->dev, aos_gpioc_t, dev);
if (pin >= gpioc->num_pins)
return -EINVAL;
while (1) {
uint32_t mode;
uint32_t trig;
uint32_t val;
aos_status_t r;
aos_dev_lock(ref->dev);
mode = gpioc->pins[pin].mode;
trig = mode_to_irq_trig(mode);
if (trig == AOS_GPIO_IRQ_TRIG_NONE || !(mode & AOS_GPIO_IRQ_ALTERNATE)) {
aos_dev_unlock(ref->dev);
ret = -ENOTSUP;
break;
} else {
int polarity = -1;
aos_irqsave_t flags;
flags = aos_spin_lock_irqsave(&gpioc->lock);
(void)aos_event_get(&gpioc->pins[pin].irq_event, 0xFFFFFFFF, AOS_EVENT_OR, &val, AOS_NO_WAIT);
aos_spin_unlock_irqrestore(&gpioc->lock, flags);
if (trig == AOS_GPIO_IRQ_TRIG_LEVEL_HIGH) {
if (val == 0x2)
polarity = 1;
} else if (trig == AOS_GPIO_IRQ_TRIG_LEVEL_LOW) {
if (val == 0x1)
polarity = 0;
} else if (trig == AOS_GPIO_IRQ_TRIG_EDGE_RISING) {
if ((val & 0x3) == 0x2)
polarity = 1;
} else if (trig == AOS_GPIO_IRQ_TRIG_EDGE_FALLING) {
if ((val & 0x3) == 0x1)
polarity = 0;
} else {
if ((val & 0x3) == 0x1)
polarity = 0;
else if ((val & 0x3) == 0x2)
polarity = 1;
}
if (polarity >= 0) {
aos_dev_unlock(ref->dev);
ret = polarity;
break;
}
}
aos_dev_unlock(ref->dev);
if (timeout == AOS_NO_WAIT) {
ret = -EAGAIN;
break;
}
r = aos_event_get(&gpioc->pins[pin].irq_event, 0xFFFFFFFF, AOS_EVENT_OR, &val, timeout);
if (r == -ETIMEDOUT) {
ret = -ETIMEDOUT;
break;
} else if (r == -EINTR) {
/* reserved for signal mechanism */
ret = -EINTR;
break;
}
}
return ret;
}
aos_status_t aos_gpioc_enter_irq(aos_gpioc_ref_t *ref, uint32_t pin, uint32_t timeout)
{
aos_gpioc_t *gpioc;
aos_status_t ret;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
gpioc = aos_container_of(ref->dev, aos_gpioc_t, dev);
if (pin >= gpioc->num_pins)
return -EINVAL;
while (1) {
uint32_t mode;
uint32_t trig;
uint32_t val;
aos_status_t r;
aos_dev_lock(ref->dev);
mode = gpioc->pins[pin].mode;
trig = mode_to_irq_trig(mode);
if (trig == AOS_GPIO_IRQ_TRIG_NONE || !(mode & AOS_GPIO_IRQ_ALTERNATE)) {
aos_dev_unlock(ref->dev);
ret = -ENOTSUP;
break;
} else {
int polarity = -1;
aos_irqsave_t flags;
flags = aos_spin_lock_irqsave(&gpioc->lock);
(void)aos_event_get(&gpioc->pins[pin].irq_event, 0xFFFFFFFF, AOS_EVENT_OR_CLEAR, &val, AOS_NO_WAIT);
if (trig == AOS_GPIO_IRQ_TRIG_LEVEL_HIGH) {
if (val == 0x2)
polarity = 1;
} else if (trig == AOS_GPIO_IRQ_TRIG_LEVEL_LOW) {
if (val == 0x1)
polarity = 0;
} else if (trig == AOS_GPIO_IRQ_TRIG_EDGE_RISING) {
if ((val & 0x3) == 0x2) {
polarity = 1;
val >>= 2;
if (val != 0)
(void)aos_event_set(&gpioc->pins[pin].irq_event, val, AOS_EVENT_OR);
}
} else if (trig == AOS_GPIO_IRQ_TRIG_EDGE_FALLING) {
if ((val & 0x3) == 0x1) {
polarity = 0;
val >>= 2;
if (val != 0)
(void)aos_event_set(&gpioc->pins[pin].irq_event, val, AOS_EVENT_OR);
}
} else {
if ((val & 0x3) == 0x1 || (val & 0x3) == 0x2) {
polarity = ((val & 0x3) == 0x1) ? 0 : 1;
val >>= 2;
if (val != 0)
(void)aos_event_set(&gpioc->pins[pin].irq_event, val, AOS_EVENT_OR);
}
}
aos_spin_unlock_irqrestore(&gpioc->lock, flags);
if (polarity >= 0) {
aos_dev_unlock(ref->dev);
ret = polarity;
break;
}
}
aos_dev_unlock(ref->dev);
if (timeout == AOS_NO_WAIT) {
ret = -EAGAIN;
break;
}
r = aos_event_get(&gpioc->pins[pin].irq_event, 0xFFFFFFFF, AOS_EVENT_OR, &val, timeout);
if (r == -ETIMEDOUT) {
ret = -ETIMEDOUT;
break;
} else if (r == -EINTR) {
/* reserved for signal mechanism */
ret = -EINTR;
break;
}
}
return ret;
}
aos_status_t aos_gpioc_exit_irq(aos_gpioc_ref_t *ref, uint32_t pin)
{
aos_gpioc_t *gpioc;
uint32_t mode;
uint32_t trig;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
gpioc = aos_container_of(ref->dev, aos_gpioc_t, dev);
if (pin >= gpioc->num_pins)
return -EINVAL;
aos_dev_lock(ref->dev);
mode = gpioc->pins[pin].mode;
trig = mode_to_irq_trig(mode);
if (trig == AOS_GPIO_IRQ_TRIG_NONE || !(mode & AOS_GPIO_IRQ_ALTERNATE)) {
aos_dev_unlock(ref->dev);
return -ENOTSUP;
} else if (trig == AOS_GPIO_IRQ_TRIG_LEVEL_HIGH || trig == AOS_GPIO_IRQ_TRIG_LEVEL_LOW) {
uint32_t val;
aos_irqsave_t flags;
flags = aos_spin_lock_irqsave(&gpioc->lock);
(void)aos_event_get(&gpioc->pins[pin].irq_event, 0xFFFFFFFF, AOS_EVENT_OR_CLEAR, &val, AOS_NO_WAIT);
if (val == 0 && !gpioc->pins[pin].hard_irq_en) {
gpioc->pins[pin].hard_irq_en = true;
gpioc->ops->enable_irq(gpioc, pin);
}
aos_spin_unlock_irqrestore(&gpioc->lock, flags);
}
aos_dev_unlock(ref->dev);
return 0;
}
static void dev_gpioc_unregister(aos_dev_t *dev)
{
aos_gpioc_t *gpioc = aos_container_of(dev, aos_gpioc_t, dev);
for (uint32_t i = 0; i < gpioc->num_pins; i++) {
aos_gpioc_pin_t *pin = &gpioc->pins[i];
aos_irqsave_t flags;
/* no deadlock here */
(void)aos_sem_wait(&pin->irq_sem, AOS_WAIT_FOREVER);
if (pin->irq_handler != NULL && !(pin->mode & AOS_GPIO_IRQ_ALTERNATE))
(void)aos_task_delete(&pin->irq_task);
flags = aos_spin_lock_irqsave(&gpioc->lock);
if (pin->hard_irq_en) {
pin->hard_irq_en = false;
gpioc->ops->disable_irq(gpioc, i);
}
aos_spin_unlock_irqrestore(&gpioc->lock, flags);
pin->mode = AOS_GPIO_DIR_NONE;
(void)gpioc->ops->set_mode(gpioc, i);
aos_sem_free(&pin->irq_sem);
aos_event_free(&pin->irq_event);
}
if (gpioc->ops->unregister)
gpioc->ops->unregister(gpioc);
}
static aos_status_t dev_gpioc_get(aos_dev_ref_t *ref)
{
return 0;
}
static void dev_gpioc_put(aos_dev_ref_t *ref)
{
}
static const aos_dev_ops_t dev_gpioc_ops = {
.unregister = dev_gpioc_unregister,
.get = dev_gpioc_get,
.put = dev_gpioc_put,
};
aos_status_t aos_gpioc_register(aos_gpioc_t *gpioc)
{
aos_status_t ret;
if (!gpioc)
return -EINVAL;
if (!gpioc->ops || !gpioc->ops->set_mode || !gpioc->ops->enable_irq || !gpioc->ops->disable_irq ||
!gpioc->ops->get_value || !gpioc->ops->set_value)
return -EINVAL;
if (gpioc->num_pins == 0 || gpioc->num_pins > (uint32_t)INT32_MAX)
return -EINVAL;
if (!gpioc->pins)
return -EINVAL;
gpioc->dev.type = AOS_DEV_TYPE_GPIOC;
gpioc->dev.ops = &dev_gpioc_ops;
#ifdef AOS_COMP_DEVFS
aos_devfs_node_init(&gpioc->dev.devfs_node);
#endif
aos_spin_lock_init(&gpioc->lock);
for (uint32_t i = 0; i < gpioc->num_pins; i++) {
aos_gpioc_pin_t *pin = &gpioc->pins[i];
pin->gpioc = gpioc;
pin->mode = AOS_GPIO_DIR_NONE;
pin->irq_handler = NULL;
pin->irq_arg = NULL;
pin->irq_task = NULL;
pin->irq_new_task = NULL;
pin->hard_irq_en = false;
pin->value = 0;
ret = aos_sem_new(&pin->irq_sem, 1);
if (ret) {
for (uint32_t j = 0; j < i; j++) {
aos_sem_free(&gpioc->pins[j].irq_sem);
aos_event_free(&gpioc->pins[j].irq_event);
}
return ret;
}
ret = aos_event_new(&pin->irq_event, 0);
if (ret) {
aos_sem_free(&pin->irq_sem);
for (uint32_t j = 0; j < i; j++) {
aos_sem_free(&gpioc->pins[j].irq_sem);
aos_event_free(&gpioc->pins[j].irq_event);
}
return ret;
}
}
ret = aos_dev_register(&gpioc->dev);
if (ret) {
for (uint32_t i = 0; i < gpioc->num_pins; i++) {
aos_sem_free(&gpioc->pins[i].irq_sem);
aos_event_free(&gpioc->pins[i].irq_event);
}
return ret;
}
return 0;
}
aos_status_t aos_gpioc_register_argumented(aos_gpioc_t *gpioc, uint32_t id, const aos_gpioc_ops_t *ops,
uint32_t num_pins, aos_gpioc_pin_t *pins)
{
if (!gpioc)
return -EINVAL;
gpioc->dev.id = id;
gpioc->ops = ops;
gpioc->num_pins = num_pins;
gpioc->pins = pins;
return aos_gpioc_register(gpioc);
}
aos_status_t aos_gpioc_unregister(uint32_t id)
{
return aos_dev_unregister(AOS_DEV_TYPE_GPIOC, id);
}
| YifuLiu/AliOS-Things | components/drivers/peripheral/gpio/src/gpioc.c | C | apache-2.0 | 28,258 |
/*
* Copyright (C) 2020-2021 Alibaba Group Holding Limited
*/
#include <aos/gpioc_csi.h>
static void gpioc_csi_unregister(aos_gpioc_t *gpioc)
{
aos_gpioc_csi_t *gpioc_csi;
gpioc_csi = aos_container_of(gpioc, aos_gpioc_csi_t, gpioc);
(void)csi_gpio_detach_callback(&gpioc_csi->csi_gpio);
(void)csi_gpio_uninit(&gpioc_csi->csi_gpio);
}
static aos_status_t set_dir(aos_gpioc_csi_t *gpioc_csi, uint32_t pin, uint32_t dir)
{
uint32_t mask = (uint32_t)1 << pin;
csi_error_t r;
if (dir == AOS_GPIO_DIR_NONE)
r = CSI_OK;
else if (dir == AOS_GPIO_DIR_INPUT)
r = csi_gpio_dir(&gpioc_csi->csi_gpio, mask, GPIO_DIRECTION_INPUT);
else if (dir == AOS_GPIO_DIR_OUTPUT || dir == AOS_GPIO_DIR_BOTH)
r = csi_gpio_dir(&gpioc_csi->csi_gpio, mask, GPIO_DIRECTION_OUTPUT);
else
r = CSI_ERROR;
return (r == CSI_OK) ? 0 : -EIO;
}
static aos_status_t set_input_cfg(aos_gpioc_csi_t *gpioc_csi, uint32_t pin, uint32_t cfg)
{
uint32_t mask = (uint32_t)1 << pin;
csi_error_t r;
if (cfg == AOS_GPIO_INPUT_CFG_HI)
r = csi_gpio_mode(&gpioc_csi->csi_gpio, mask, GPIO_MODE_PULLNONE);
else if (cfg == AOS_GPIO_INPUT_CFG_PU)
r = csi_gpio_mode(&gpioc_csi->csi_gpio, mask, GPIO_MODE_PULLUP);
else if (cfg == AOS_GPIO_INPUT_CFG_PD)
r = csi_gpio_mode(&gpioc_csi->csi_gpio, mask, GPIO_MODE_PULLDOWN);
else
r = CSI_ERROR;
return (r == CSI_OK) ? 0 : -EIO;
}
static aos_status_t set_irq_trig(aos_gpioc_csi_t *gpioc_csi, uint32_t pin, uint32_t trig)
{
csi_gpio_t *csi_gpio = &gpioc_csi->csi_gpio;
uint32_t mask = (uint32_t)1 << pin;
csi_error_t r;
if (trig == AOS_GPIO_IRQ_TRIG_NONE)
r = CSI_OK;
else if (trig == AOS_GPIO_IRQ_TRIG_EDGE_RISING)
r = csi_gpio_irq_mode(csi_gpio, mask, GPIO_IRQ_MODE_RISING_EDGE);
else if (trig == AOS_GPIO_IRQ_TRIG_EDGE_FALLING)
r = csi_gpio_irq_mode(csi_gpio, mask, GPIO_IRQ_MODE_FALLING_EDGE);
else if (trig == AOS_GPIO_IRQ_TRIG_EDGE_BOTH)
r = csi_gpio_irq_mode(csi_gpio, mask, GPIO_IRQ_MODE_BOTH_EDGE);
else if (trig == AOS_GPIO_IRQ_TRIG_LEVEL_HIGH)
r = csi_gpio_irq_mode(csi_gpio, mask, GPIO_IRQ_MODE_HIGH_LEVEL);
else if (trig == AOS_GPIO_IRQ_TRIG_LEVEL_LOW)
r = csi_gpio_irq_mode(csi_gpio, mask, GPIO_IRQ_MODE_LOW_LEVEL);
else
r = CSI_ERROR;
return (r == CSI_OK) ? 0 : -EIO;
}
static aos_status_t set_output_cfg(aos_gpioc_csi_t *gpioc_csi, uint32_t pin, uint32_t cfg)
{
uint32_t mask = (uint32_t)1 << pin;
csi_error_t r;
if (cfg == AOS_GPIO_OUTPUT_CFG_PP)
r = csi_gpio_mode(&gpioc_csi->csi_gpio, mask, GPIO_MODE_PUSH_PULL);
else if (cfg == AOS_GPIO_OUTPUT_CFG_ODNP)
r = csi_gpio_mode(&gpioc_csi->csi_gpio, mask, GPIO_MODE_OPEN_DRAIN);
else if (cfg == AOS_GPIO_OUTPUT_CFG_ODPU)
r = csi_gpio_mode(&gpioc_csi->csi_gpio, mask, GPIO_MODE_OPEN_DRAIN);
else
r = CSI_ERROR;
return (r == CSI_OK) ? 0 : -EIO;
}
static void restore_mode(aos_gpioc_csi_t *gpioc_csi, uint32_t pin)
{
uint32_t mode = gpioc_csi->modes[pin];
uint32_t dir = mode & AOS_GPIO_DIR_MASK;
if (dir == AOS_GPIO_DIR_INPUT) {
uint32_t cfg = mode & AOS_GPIO_INPUT_CFG_MASK;
uint32_t trig = mode & AOS_GPIO_IRQ_TRIG_MASK;
(void)set_dir(gpioc_csi, pin, dir);
(void)set_input_cfg(gpioc_csi, pin, cfg);
(void)set_irq_trig(gpioc_csi, pin, trig);
} else if (dir == AOS_GPIO_DIR_OUTPUT ||
(dir == AOS_GPIO_DIR_BOTH && (mode & AOS_GPIO_IRQ_TRIG_MASK) == AOS_GPIO_IRQ_TRIG_NONE)) {
uint32_t cfg = mode & AOS_GPIO_OUTPUT_CFG_MASK;
(void)set_dir(gpioc_csi, pin, dir);
(void)set_output_cfg(gpioc_csi, pin, cfg);
}
}
static aos_status_t gpioc_csi_set_mode(aos_gpioc_t *gpioc, uint32_t pin)
{
aos_gpioc_csi_t *gpioc_csi;
uint32_t mode;
uint32_t dir;
aos_status_t ret;
gpioc_csi = aos_container_of(gpioc, aos_gpioc_csi_t, gpioc);
mode = gpioc->pins[pin].mode;
dir = mode & AOS_GPIO_DIR_MASK;
if (dir == AOS_GPIO_DIR_NONE) {
/* do nothing */
} else if (dir == AOS_GPIO_DIR_INPUT) {
uint32_t cfg = mode & AOS_GPIO_INPUT_CFG_MASK;
uint32_t trig = mode & AOS_GPIO_IRQ_TRIG_MASK;
if (cfg == AOS_GPIO_INPUT_CFG_DEFAULT) {
cfg = gpioc_csi->default_input_cfg;
mode &= ~AOS_GPIO_INPUT_CFG_MASK;
mode |= cfg;
}
ret = set_dir(gpioc_csi, pin, dir);
if (ret) {
restore_mode(gpioc_csi, pin);
return ret;
}
ret = set_input_cfg(gpioc_csi, pin, cfg);
if (ret) {
restore_mode(gpioc_csi, pin);
return ret;
}
ret = set_irq_trig(gpioc_csi, pin, trig);
if (ret) {
restore_mode(gpioc_csi, pin);
return ret;
}
} else if (dir == AOS_GPIO_DIR_OUTPUT ||
(dir == AOS_GPIO_DIR_BOTH && (mode & AOS_GPIO_IRQ_TRIG_MASK) == AOS_GPIO_IRQ_TRIG_NONE)) {
uint32_t cfg = mode & AOS_GPIO_OUTPUT_CFG_MASK;
uint32_t mask = (uint32_t)1 << pin;
csi_gpio_pin_state_t val;
if (cfg == AOS_GPIO_OUTPUT_CFG_DEFAULT) {
cfg = gpioc_csi->default_output_cfg;
mode &= ~AOS_GPIO_OUTPUT_CFG_MASK;
mode |= cfg;
}
ret = set_dir(gpioc_csi, pin, dir);
if (ret) {
restore_mode(gpioc_csi, pin);
return ret;
}
ret = set_output_cfg(gpioc_csi, pin, cfg);
if (ret) {
restore_mode(gpioc_csi, pin);
return ret;
}
val = gpioc->pins[pin].value ? GPIO_PIN_HIGH : GPIO_PIN_LOW;
csi_gpio_write(&gpioc_csi->csi_gpio, mask, val);
} else {
return -EINVAL;
}
gpioc_csi->modes[pin] = mode;
return 0;
}
static void gpioc_csi_enable_irq(aos_gpioc_t *gpioc, uint32_t pin)
{
aos_gpioc_csi_t *gpioc_csi;
uint32_t mask = (uint32_t)1 << pin;
gpioc_csi = aos_container_of(gpioc, aos_gpioc_csi_t, gpioc);
(void)csi_gpio_irq_enable(&gpioc_csi->csi_gpio, mask, true);
}
static void gpioc_csi_disable_irq(aos_gpioc_t *gpioc, uint32_t pin)
{
aos_gpioc_csi_t *gpioc_csi;
uint32_t mask = (uint32_t)1 << pin;
gpioc_csi = aos_container_of(gpioc, aos_gpioc_csi_t, gpioc);
(void)csi_gpio_irq_enable(&gpioc_csi->csi_gpio, mask, false);
}
static int gpioc_csi_get_value(aos_gpioc_t *gpioc, uint32_t pin)
{
aos_gpioc_csi_t *gpioc_csi;
uint32_t mask = (uint32_t)1 << pin;
gpioc_csi = aos_container_of(gpioc, aos_gpioc_csi_t, gpioc);
return !!(csi_gpio_read(&gpioc_csi->csi_gpio, mask) & mask);
}
static void gpioc_csi_set_value(aos_gpioc_t *gpioc, uint32_t pin)
{
aos_gpioc_csi_t *gpioc_csi;
uint32_t mask = (uint32_t)1 << pin;
csi_gpio_pin_state_t val;
gpioc_csi = aos_container_of(gpioc, aos_gpioc_csi_t, gpioc);
val = gpioc->pins[pin].value ? GPIO_PIN_HIGH : GPIO_PIN_LOW;
csi_gpio_write(&gpioc_csi->csi_gpio, mask, val);
}
static const aos_gpioc_ops_t gpioc_csi_ops = {
.unregister = gpioc_csi_unregister,
.set_mode = gpioc_csi_set_mode,
.enable_irq = gpioc_csi_enable_irq,
.disable_irq = gpioc_csi_disable_irq,
.get_value = gpioc_csi_get_value,
.set_value = gpioc_csi_set_value,
};
#define get_polarity(gpio, pin) (!!(csi_gpio_read(gpio, (uint32_t)1 << (pin)) & ((uint32_t)1 << (pin))))
static void irq_handler(csi_gpio_t *csi_gpio, uint32_t pin_mask, void *arg)
{
aos_gpioc_csi_t *gpioc_csi = aos_container_of(csi_gpio, aos_gpioc_csi_t, csi_gpio);
aos_gpioc_t *gpioc = &gpioc_csi->gpioc;
for (uint32_t i = 0; i < gpioc->num_pins; i++) {
if (pin_mask & ((uint32_t)1 << i))
aos_gpioc_hard_irq_handler(gpioc, i, get_polarity(csi_gpio, i));
}
}
aos_status_t aos_gpioc_csi_register(aos_gpioc_csi_t *gpioc_csi)
{
aos_gpioc_t *gpioc;
csi_gpio_t *csi_gpio;
aos_status_t ret;
if (!gpioc_csi)
return -EINVAL;
gpioc = &gpioc_csi->gpioc;
if (gpioc->num_pins > AOS_GPIOC_CSI_MAX_NUM_PINS)
return -EINVAL;
gpioc->ops = &gpioc_csi_ops;
gpioc->pins = gpioc_csi->pins;
for (uint32_t i = 0; i < gpioc->num_pins; i++)
gpioc_csi->modes[i] = AOS_GPIO_DIR_NONE;
csi_gpio = &gpioc_csi->csi_gpio;
if (csi_gpio_init(csi_gpio, gpioc->dev.id) != CSI_OK)
return -EIO;
if (csi_gpio_attach_callback(csi_gpio, irq_handler, NULL) != CSI_OK) {
(void)csi_gpio_uninit(csi_gpio);
return -EIO;
}
ret = aos_gpioc_register(gpioc);
if (ret) {
(void)csi_gpio_detach_callback(csi_gpio);
(void)csi_gpio_uninit(csi_gpio);
return ret;
}
return 0;
}
aos_status_t aos_gpioc_csi_register_argumented(aos_gpioc_csi_t *gpioc_csi, uint32_t id, uint32_t num_pins,
uint32_t default_input_cfg, uint32_t default_output_cfg)
{
if (!gpioc_csi)
return -EINVAL;
gpioc_csi->gpioc.dev.id = id;
gpioc_csi->gpioc.num_pins = num_pins;
gpioc_csi->default_input_cfg = default_input_cfg;
gpioc_csi->default_output_cfg = default_output_cfg;
return aos_gpioc_csi_register(gpioc_csi);
}
aos_status_t aos_gpioc_csi_unregister(uint32_t id)
{
return aos_gpioc_unregister(id);
}
| YifuLiu/AliOS-Things | components/drivers/peripheral/gpio/src/gpioc_csi.c | C | apache-2.0 | 9,390 |
#include <stdint.h>
#include <stdlib.h>
#include <stdio.h>
#include <aos/errno.h>
#if AOS_COMP_CLI
#include "aos/cli.h"
#endif
#include <drivers/u_ld.h>
#include <vfsdev/i2c_dev.h>
#include <aos/driver/i2c.h>
static int32_t vfs_i2c_test(int32_t port, int32_t slave_addr, char *tx_buffer, uint32_t tx_cnt, char *rx_buffer, uint32_t rx_cnt, uint32_t loop, uint32_t period)
{
int32_t ret = -1;
int32_t fd = -1;
char name[16] = {0};
io_i2c_control_u c;
io_i2c_data_t d;
snprintf(name, sizeof(name), "/dev/i2c%d", port);
fd = open(name, 0);
printf("open %s %s, fd:%d\r\n", name, fd > 0 ? "success" : "fail", fd);
if (fd < 0) {
return -EIO;
}
// set slave address, NOTICE that the address mode is 7-bit mode by default
c.c.addr = slave_addr;
c.c.addr_width = 0;
c.c.role = 1;
ret = ioctl(fd, IOC_I2C_SET_CONFIG, (unsigned long)&c);
if (ret) {
printf("set config to %s failed, ret:%d\n", name, ret);
close(fd);
return -EIO;
} else {
printf("set addr:%x, config to 0x%s success\n", c.c.addr, name);
}
// set to 400k by default
c.freq = 400000;
ret += ioctl(fd, IOC_I2C_SET_FREQ, (unsigned long)&c);
if (ret) {
printf("set freq/config to %s failed, ret:%d\n", name, ret);
close(fd);
return -EIO;
} else {
printf("set freq to %d, config to %s success\n", c.freq, name);
}
if (tx_buffer && tx_cnt) {
int i = loop;
d.addr = slave_addr;
d.data = tx_buffer;
d.length = tx_cnt;
d.maddr = 0x0;
d.mlength = 0x0;
d.timeout = 1000;
while (i--) {
ret = ioctl(fd, IOC_I2C_MASTER_TX, (unsigned long)&d);
if (ret) {
printf("%s tx failed, addr:0x%x, tx_buffer:%p, tx_cnt:%d, ret:%d\n",
name, slave_addr, tx_buffer, tx_cnt, ret);
} else {
printf("%s tx success, addr:0x%x, tx_buffer:%p, tx_cnt:%d\n",
name, slave_addr, tx_buffer, tx_cnt);
}
aos_msleep(period <= 50 ? 50 : period);
}
}
if (rx_buffer && rx_cnt) {
int i = loop;
d.addr = slave_addr;
d.data = rx_buffer;
d.length = rx_cnt;
d.maddr = 0x0;
d.mlength = 0x0;
d.timeout = 1000;
while (i--) {
ret = ioctl(fd, IOC_I2C_MASTER_RX, (unsigned long)&d);
if (ret) {
printf("%s rx failed, addr:0x%x, rx_buffer:%p, rx_cnt:%d, ret:%d\n",
name, slave_addr, rx_buffer, rx_cnt, ret);
} else {
printf("%s rx success, addr:0x%x, rx_buffer:%p, rx_cnt:%d\n",
name, slave_addr, rx_buffer, rx_cnt);
}
aos_msleep(period <= 50 ? 50 : period);
}
}
close(fd);
return ret;
}
static int32_t aos_i2c_test(int32_t port, int32_t slave_addr, char *tx_buffer, uint32_t tx_cnt, char *rx_buffer, uint32_t rx_cnt, uint32_t loop, uint32_t period)
{
int ret = -1;
i2c_dev_handle_t slave = NULL;
i2c_slave_config_t config;
config.addr = slave_addr;
config.addr_width = I2C_SLAVE_ADDR_WIDTH_7BIT;
config.clk = I2C_BUS_CLK_400K;
slave = aos_i2c_open(port, &config);
if (!slave) {
printf("i2c%d open failed\r\n", port);
return -1;
}
if (tx_buffer && tx_cnt) {
int i = loop;
while (i--) {
ret = aos_i2c_master_send(slave, tx_buffer, tx_cnt, 1000);
if (ret != tx_cnt) {
printf("i2c%d tx failed, addr:0x%x, tx_buffer:%p, tx_cnt:%d, ret:%d\n",
port, slave_addr, tx_buffer, tx_cnt, ret);
} else {
printf("i2c%d tx success, addr:0x%x, tx_buffer:%p, tx_cnt:%d\n",
port, slave_addr, tx_buffer, tx_cnt);
}
aos_msleep(period <= 50 ? 50 : period);
}
}
if (rx_buffer && rx_cnt) {
int i = loop;
while (i--) {
ret = aos_i2c_master_recv(slave, rx_buffer, rx_cnt, 1000);
if (ret != rx_cnt) {
printf("i2c%d rx failed, addr:0x%x, rx_buffer:%p, rx_cnt:%d, ret:%d\n",
port, slave_addr, rx_buffer, rx_cnt, ret);
} else {
printf("i2c%d rx success, addr:0x%x, rx_buffer:%p, rx_cnt:%d\n",
port, slave_addr, rx_buffer, rx_cnt);
}
aos_msleep(period <= 50 ? 50 : period);
}
}
ret = aos_i2c_close(slave);
if (ret) {
printf("i2c%d close failed, ret:%d\r\n", port, ret);
}
return ret;
}
// command format: i2c_write <port> <slave_address> <tx_data> <tx data length> <loop> <period>
static void i2c_write_test(int32_t argc, char **argv)
{
int32_t ret = 0;
int32_t port = argc > 1 ? atoi(argv[1]) : 1;
int32_t slave_addr = argc > 2 ? atoi(argv[2]): 0x40; // 0x40 is SI7006 humiture's address
char tx = argc > 3 ? atoi(argv[3]) : 0xF3; // 0xF3 is the command to control SI7006 to measure temperature
uint32_t number = argc > 4 ? atoi(argv[4]) : 1; // number of bytes to send in single i2c tx procedure
uint32_t loop = argc > 5 ? atoi(argv[5]) : 1; // whether do i2c tx multiple times
uint32_t wait = argc > 6 ? atoi(argv[6]) : 50; // wait time during successive i2c tx
char *tx_buffer = (char *)malloc(number);
printf("i2c comp write test start\r\n");
if (!tx_buffer) {
printf("i2c comp write test failed, malloc memory failed\r\n");
return;
}
memset (tx_buffer, tx, number);
//ret = vfs_i2c_test(port, slave_addr, tx_buffer, number, NULL, 0, loop, wait);
ret = aos_i2c_test(port, slave_addr, tx_buffer, number, NULL, 0, loop, wait);
if (!ret) {
printf ("i2c comp write test success!\r\n");
} else {
printf ("i2c comp write test failed, ret:%d!\r\n", ret);
}
free(tx_buffer);
return;
}
// command format: i2c_read <port> <slave_address> <rx data length> <loop> <period>
static void i2c_read_test(int32_t argc, char **argv)
{
int i = 0;
int32_t ret = 0;
int32_t port = argc > 1 ? atoi(argv[1]) : 1;
int32_t slave_addr = argc > 2 ? atoi(argv[2]) : 0x40; // 0x40 is SI7006 humiture's address
uint32_t number = argc > 3 ? atoi(argv[3]) : 1; // number of bytes to read in single i2c rx procedure
uint32_t loop = argc > 4 ? atoi(argv[4]) : 1; // whether do i2c tx multiple times
uint32_t wait = argc > 5 ? atoi(argv[5]) : 50; // wait time during successive i2c rx
char *rx_buffer = (char *)malloc(number);
printf("i2c comp read test start\r\n");
if (!rx_buffer) {
printf("i2c comp read test failed, malloc memory failed\r\n");
return;
}
memset (rx_buffer, 0, number);
//ret = vfs_i2c_test(port, slave_addr, NULL, 0, rx_buffer, number, loop, wait);
ret = aos_i2c_test(port, slave_addr, NULL, 0, rx_buffer, number, loop, wait);
if (!ret) {
printf ("i2c comp read test success!\r\n");
for (i = 0; i < number; i++) {
printf ("0x%02x \n", rx_buffer[i]);
}
printf("\r\n");
} else {
printf ("i2c comp read test failed, ret:%d!\r\n", ret);
}
free(rx_buffer);
return;
}
static int32_t aos_i2c_mem_test(int32_t port, int32_t slave_addr, uint16_t addr, uint8_t addr_len, char *tx_buffer, uint32_t tx_cnt, char *rx_buffer, uint32_t rx_cnt, uint32_t loop, uint32_t period)
{
int ret = -1;
i2c_dev_handle_t slave = NULL;
i2c_slave_config_t config;
config.addr = slave_addr;
config.addr_width = I2C_SLAVE_ADDR_WIDTH_7BIT;
config.clk = I2C_BUS_CLK_400K;
slave = aos_i2c_open(port, &config);
if (!slave) {
printf("i2c%d open failed\r\n", port);
return -1;
}
if (tx_buffer && tx_cnt) {
int i = loop;
while (i--) {
ret = aos_i2c_mem_write(slave, addr, addr_len, tx_buffer, tx_cnt, 1000);
if (ret != tx_cnt) {
printf("i2c%d tx failed, slave addr:0x%x, memory address:0x%x, memory address length:%d, tx_buffer:%p, tx_cnt:%d, ret:%d\n",
port, slave_addr, addr, addr_len, tx_buffer, tx_cnt, ret);
} else {
printf("i2c%d tx success, slave addr:0x%x, memory address:0x%x, memory address length:%d, tx_buffer:%p, tx_cnt:%d\n",
port, slave_addr, addr, addr_len, tx_buffer, tx_cnt);
}
aos_msleep(period <= 50 ? 50 : period);
}
}
if (rx_buffer && rx_cnt) {
int i = loop;
while (i--) {
ret = aos_i2c_mem_read(slave, addr, addr_len, rx_buffer, rx_cnt, 1000);
if (ret != rx_cnt) {
printf("i2c%d rx failed, slave addr:0x%x, memory address:0x%x, memory address length:%d, rx_buffer:%p, tx_cnt:%d, ret:%d\n",
port, slave_addr, addr, addr_len, rx_buffer, tx_cnt, ret);
} else {
printf("i2c%d rx success, slave addr:0x%x, memory address:0x%x, memory address length:%d, rx_buffer:%p, tx_cnt:%d\n",
port, slave_addr, addr, addr_len, rx_buffer, tx_cnt);
}
aos_msleep(period <= 50 ? 50 : period);
}
}
ret = aos_i2c_close(slave);
if (ret) {
printf("i2c%d close failed, ret:%d\r\n", port, ret);
}
return ret;
}
//command format: i2c_mem_read <port> <slave_address> <memory address> <rx data length> <loop> <period>
static void i2c_mem_read_test(int32_t argc, char **argv)
{
int i = 0;
int32_t ret = 0;
int32_t port = argc > 1 ? atoi(argv[1]) : 1;
int32_t slave_addr = argc > 2 ? atoi(argv[2]) : 0x1e; // 0x1e is ap3216c's address
uint16_t addr = argc > 3 ? atoi(argv[3]) : 0xc; // memory address
uint32_t number = argc > 4 ? atoi(argv[4]) : 1; // number of bytes to read in single i2c rx procedure
uint32_t loop = argc > 5 ? atoi(argv[5]) : 1; // whether do i2c tx multiple times
uint32_t wait = argc > 6 ? atoi(argv[6]) : 50; // wait time during successive i2c rx
char *rx_buffer = (char *)malloc(number);
printf("i2c comp read test start\r\n");
if (!rx_buffer) {
printf("i2c comp read test failed, malloc memory failed\r\n");
return;
}
memset (rx_buffer, 0, number);
ret = aos_i2c_mem_test(port, slave_addr, addr, 1, NULL, 0, rx_buffer, number, loop, wait);
if (!ret) {
printf ("i2c comp read test success!\r\n");
for (i = 0; i < number; i++) {
printf ("0x%02x \n", rx_buffer[i]);
}
printf("\r\n");
} else {
printf ("i2c comp read test failed, ret:%d!\r\n", ret);
}
free(rx_buffer);
return;
}
//command format: i2c_mem_write <port> <slave_address> <memory address> <tx data> <tx data length> <loop> <period>
static void i2c_mem_write_test(int32_t argc, char **argv)
{
int32_t ret = 0;
int32_t port = argc > 1 ? atoi(argv[1]) : 1;
int32_t slave_addr = argc > 2 ? atoi(argv[2]): 0x1e; // 0x1e is ap3216c's address
uint16_t addr = argc > 3 ? atoi(argv[3]) : 0x0; // 0x0 is ap3216c's system configuration register
char tx = argc > 4 ? atoi(argv[4]) : 0x3; // 0x3 is the command to active ap3216c's ALS and PS+IR functions
uint32_t number = argc > 5 ? atoi(argv[5]) : 1; // number of bytes to send in single i2c tx procedure
uint32_t loop = argc > 7 ? atoi(argv[6]) : 1; // whether do i2c tx multiple times
uint32_t wait = argc > 7 ? atoi(argv[7]) : 50; // wait time during successive i2c tx
char *tx_buffer = (char *)malloc(number);
printf("i2c comp write test start\r\n");
if (!tx_buffer) {
printf("i2c comp write test failed, malloc memory failed\r\n");
return;
}
memset (tx_buffer, tx, number);
ret = aos_i2c_mem_test(port, slave_addr, addr, 1, tx_buffer, number, NULL, 0, loop, wait);
if (!ret) {
printf ("i2c comp write test success!\r\n");
} else {
printf ("i2c comp write test failed, ret:%d!\r\n", ret);
}
free(tx_buffer);
return;
}
#if AOS_COMP_CLI
/* reg args: fun, cmd, description*/
ALIOS_CLI_CMD_REGISTER(i2c_write_test, i2c_write, i2c write operation example)
ALIOS_CLI_CMD_REGISTER(i2c_read_test, i2c_read, i2c read operation example)
ALIOS_CLI_CMD_REGISTER(i2c_mem_read_test, i2c_mem_read, i2c memory read operation example)
ALIOS_CLI_CMD_REGISTER(i2c_mem_write_test, i2c_mem_write, i2c memory write operation example)
#endif
| YifuLiu/AliOS-Things | components/drivers/peripheral/i2c/example/i2c_example.c | C | apache-2.0 | 12,622 |
/**
* @file i2c.h
* @copyright Copyright (C) 2015-2021 Alibaba Group Holding Limited
*/
#ifndef _AOS_I2C_H
#define _AOS_I2C_H
#ifdef __cplusplus
extern "C" {
#endif
#include <aos/kernel.h>
/** @addtogroup aos_i2c_device I2C
* aos i2c API.
*
* @{
*/
/* Define the wait forever timeout macro */
#ifndef AOS_WAIT_FOREVER
#define AOS_WAIT_FOREVER 0xFFFFFFFFU
#endif
/*
* I2C bus's clock rate
*/
#define I2C_BUS_CLK_10K 10000
#define I2C_BUS_CLK_100K 100000
#define I2C_BUS_CLK_400K 400000
#define I2C_BUS_CLK_1000K 1000000
#define I2C_BUS_CLK_3400K 3400000
/* Slave device's address mode */
#define I2C_SLAVE_ADDR_WIDTH_7BIT 0 /**< 7 bit mode */
#define I2C_SLAVE_ADDR_WIDTH_10BIT 1 /**< 10 bit mode */
#define I2C_MEM_ADDR_SIZE_8BIT 1 /**< i2c memory address size 8bit */
#define I2C_MEM_ADDR_SIZE_16BIT 2 /**< i2c memory address size 16bit */
typedef uint32_t* i2c_dev_handle_t;
typedef struct i2c_slave_config {
uint16_t addr; /**< slave device's address */
uint32_t clk; /**< clock during i2c transaction */
uint32_t addr_width; /**< device's address mode: 7 bit or 10 bit */
} i2c_slave_config_t;
/**
* setup new I2C channel with specified slave device's config to communicate with slave device
*
* @param[in] id host I2C controller's channel ID
* @param[in] config slave device's address, address width and clock settings, \ref i2c_slave_config_t
*
* @return handle of the i2c device, used for later i2c operations on I2C slave device, when open operation success;
NULL when open operation fails
*/
i2c_dev_handle_t aos_i2c_open (uint32_t id, i2c_slave_config_t *config);
/**
* close target I2C communication channel
*
* @param[in] dev handle of the i2c device to be operated, must be the return value of aos_i2c_open
*
* @return 0 if operation success
negative error code if operation fails
*/
aos_status_t aos_i2c_close (i2c_dev_handle_t dev);
/**
* set I2C bus's clock when communicate with target I2C slave
*
* @param[in] dev handle of the i2c device to be operated, must be the return value of aos_i2c_open
* @param[in] clk target clock to be used
*
* @return 0 if operation success
negative error code if operation fails
*/
aos_status_t aos_i2c_clk_set (i2c_dev_handle_t dev, uint32_t clk);
/**
* set slave device's address witdh on target I2C channel
*
* @param[in] dev handle of the i2c device to be operated, must be the return value of aos_i2c_open
* @param[in] addr_width slave device's address width, 7-bit or 10-bit only
*
* @return 0 if operation success
negative error code if operation fails
*/
aos_status_t aos_i2c_addr_width_set (i2c_dev_handle_t dev, uint32_t addr_width);
/**
* set slave device's address on target I2C channel
*
* @param[in] dev handle of the i2c device to be operated, must be the return value of aos_i2c_open
* @param[in] addr slave device's address width
*
* @return 0 if operation success
negative error code if operation fails
*/
aos_status_t aos_i2c_slave_addr_set (i2c_dev_handle_t dev, uint16_t addr);
/**
* issue I2C write operation on target I2C channel
*
* @param[in] dev handle of the i2c device to be operated, must be the return value of aos_i2c_open
* @param[in] buf pointer to the buffer to be sent
* @param[in] len number of data to be sent
* @param[in] timeout in unit of ms, current i2c transaction's timeout value
* use AOS_WAIT_FOREVER for endless wait until operation success or fails
*
* @return 0 if operation success
negative error code if operation fails
*/
int32_t aos_i2c_master_send (i2c_dev_handle_t dev, char *buf, uint32_t len, uint32_t timeout);
/**
* issue I2C read operation on target I2C channel
*
* @param[in] dev handle of the i2c device to be operated, must be the return value of aos_i2c_open
* @param[in] buf pointer to the buffer where to save the received data
* @param[in] len number of data to be read
* @param[in] timeout in unit of ms, current i2c transaction's timeout value
* use AOS_WAIT_FOREVER for endless wait until operation success or fails
*
* @return 0 if operation success
negative error code if operation fails
*/
int32_t aos_i2c_master_recv (i2c_dev_handle_t dev, char *buf, uint32_t len, uint32_t timeout);
/**
* issue I2C memory/register write operation on target I2C channel
*
* @param[in] dev handle of the i2c device to be operated, must be the return value of aos_i2c_open
* @param[in] addr address of target memory/register to be write
* @param[in] addr_len address's length, either I2C_MEM_ADDR_SIZE_8BIT or I2C_MEM_ADDR_SIZE_16BIT
* @param[in] buf pointer to the buffer to be written
* @param[in] len number of data to be written
* @param[in] timeout in unit of ms, current i2c transaction's timeout value
* use AOS_WAIT_FOREVER for endless wait until operation success or fails
*
* @return 0 if operation success
negative error code if operation fails
*/
int32_t aos_i2c_mem_write (i2c_dev_handle_t dev, uint16_t addr, uint8_t addr_len, uint8_t *buf, uint32_t len, uint32_t timeout);
/**
* issue I2C memory/register read operation on target I2C channel
*
* @param[in] dev handle of the i2c device to be operated, must be the return value of aos_i2c_open
* @param[in] addr address of target memory/register to be read
* @param[in] addr_len address's length, , either I2C_MEM_ADDR_SIZE_8BIT or I2C_MEM_ADDR_SIZE_16BIT
* @param[in] buf pointer to the buffer for read operation
* @param[in] len number of data to be read
* @param[in] timeout in unit of ms, current i2c transaction's timeout value
* use AOS_WAIT_FOREVER for endless wait until operation success or fails
*
* @return 0 if operation success
negative error code if operation fails
*/
int32_t aos_i2c_mem_read (i2c_dev_handle_t dev, uint16_t addr, uint8_t addr_len, uint8_t *buf, uint32_t len, uint32_t timeout);
/**
* issue I2C memory/register read operation on target I2C channel
*
* @param[in] dev handle of the i2c device to be operated, must be the return value of aos_i2c_open
* @param[in] level level of current power management level
*
* @return 0 if operation success
negative error code if operation fails
*/
aos_status_t aos_i2c_pm_ctrl (i2c_dev_handle_t dev, int level);
/**
* get the number of I2C hardware module
*
* @param[in] dev handle of the i2c device to be operated, must be the return value of aos_i2c_open
* @param[in] level level of current power management level
*
* @return 0 if operation success
negative error code if operation fails
*/
int32_t aos_i2c_get_num(void);
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* _AOS_I2C_H */
| YifuLiu/AliOS-Things | components/drivers/peripheral/i2c/include/aos/driver/i2c.h | C | apache-2.0 | 6,873 |
/**
* @file i2c.h
* @copyright Copyright (C) 2015-2018 Alibaba Group Holding Limited
*/
#ifndef HAL_I2C_H
#define HAL_I2C_H
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup hal_i2c I2C
* i2c hal API.
*
* @{
*/
#include <stdint.h>
/* Define the wait forever timeout macro */
#ifndef HAL_WAIT_FOREVER
#define HAL_WAIT_FOREVER 0xFFFFFFFFU
#endif
#define I2C_MODE_MASTER 1 /**< i2c communication is master mode */
#define I2C_MODE_SLAVE 2 /**< i2c communication is slave mode */
#define I2C_MEM_ADDR_SIZE_8BIT 1 /**< i2c memory address size 8bit */
#define I2C_MEM_ADDR_SIZE_16BIT 2 /**< i2c memory address size 16bit */
/*
* Specifies one of the standard I2C bus bit rates for I2C communication
*/
#define I2C_BUS_BIT_RATES_100K 100000
#define I2C_BUS_BIT_RATES_400K 400000
#define I2C_BUS_BIT_RATES_3400K 3400000
/* Addressing mode */
#define I2C_HAL_ADDRESS_WIDTH_7BIT 0 /**< 7 bit mode */
#define I2C_HAL_ADDRESS_WIDTH_10BIT 1 /**< 10 bit mode */
/* This struct define i2c config args */
typedef struct {
uint32_t address_width; /**< Addressing mode: 7 bit or 10 bit */
uint32_t freq; /**< CLK freq */
uint8_t mode; /**< master or slave mode */
uint16_t dev_addr; /**< slave device addr */
} i2c_config_t;
/* This struct define i2c main handle */
typedef struct {
uint8_t port; /**< i2c port */
i2c_config_t config; /**< i2c config */
void *priv; /**< priv data */
} i2c_dev_t;
/**
* Initialises an I2C interface
* Prepares an I2C hardware interface for communication as a master or slave
*
* @param[in] i2c the device for which the i2c port should be initialised
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_i2c_init(i2c_dev_t *i2c);
/**
* I2c master send
*
* @param[in] i2c the i2c device
* @param[in] dev_addr device address
* @param[in] data i2c send data
* @param[in] size i2c send data size
* @param[in] timeout timeout in milisecond, set this value to HAL_WAIT_FOREVER
* if you want to wait forever
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_i2c_master_send(i2c_dev_t *i2c, uint16_t dev_addr, const uint8_t *data,
uint16_t size, uint32_t timeout);
/**
* I2c master recv
*
* @param[in] i2c the i2c device
* @param[in] dev_addr device address
* @param[out] data i2c receive data
* @param[in] size i2c receive data size
* @param[in] timeout timeout in milisecond, set this value to HAL_WAIT_FOREVER
* if you want to wait forever
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_i2c_master_recv(i2c_dev_t *i2c, uint16_t dev_addr, uint8_t *data,
uint16_t size, uint32_t timeout);
/**
* I2c slave send
*
* @param[in] i2c the i2c device
* @param[in] data i2c slave send data
* @param[in] size i2c slave send data size
* @param[in] timeout timeout in milisecond, set this value to HAL_WAIT_FOREVER
* if you want to wait forever
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_i2c_slave_send(i2c_dev_t *i2c, const uint8_t *data, uint16_t size, uint32_t timeout);
/**
* I2c slave receive
*
* @param[in] i2c tthe i2c device
* @param[out] data i2c slave receive data
* @param[in] size i2c slave receive data size
* @param[in] timeout timeout in milisecond, set this value to HAL_WAIT_FOREVER
* if you want to wait forever
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_i2c_slave_recv(i2c_dev_t *i2c, uint8_t *data, uint16_t size, uint32_t timeout);
/**
* I2c mem write
*
* @param[in] i2c the i2c device
* @param[in] dev_addr device address
* @param[in] mem_addr mem address
* @param[in] mem_addr_size mem address
* @param[in] data i2c master send data
* @param[in] size i2c master send data size
* @param[in] timeout timeout in milisecond, set this value to HAL_WAIT_FOREVER
* if you want to wait forever
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_i2c_mem_write(i2c_dev_t *i2c, uint16_t dev_addr, uint16_t mem_addr,
uint16_t mem_addr_size, const uint8_t *data, uint16_t size,
uint32_t timeout);
/**
* I2c master mem read
*
* @param[in] i2c the i2c device
* @param[in] dev_addr device address
* @param[in] mem_addr mem address
* @param[in] mem_addr_size mem address
* @param[out] data i2c master send data
* @param[in] size i2c master send data size
* @param[in] timeout timeout in milisecond, set this value to HAL_WAIT_FOREVER
* if you want to wait forever
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_i2c_mem_read(i2c_dev_t *i2c, uint16_t dev_addr, uint16_t mem_addr,
uint16_t mem_addr_size, uint8_t *data, uint16_t size,
uint32_t timeout);
/**
* Deinitialises an I2C device
*
* @param[in] i2c the i2c device
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_i2c_finalize(i2c_dev_t *i2c);
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* HAL_I2C_H */
| YifuLiu/AliOS-Things | components/drivers/peripheral/i2c/include/aos/hal/i2c.h | C | apache-2.0 | 5,408 |
/*
* Copyright (C) 2020-2021 Alibaba Group Holding Limited
*/
#ifndef AOS_I2C_H
#define AOS_I2C_H
#ifdef AOS_KERNEL_BUILD
#include <aos/device.h>
#else
#include <stdint.h>
#endif
/**
* @defgroup i2c_api I2C Master
* @ingroup driver_api
* @brief AOS API for I2C master.
* @{
*/
#define AOS_I2C_F_ADDR_10 ((uint32_t)0x1 << 0)
#define AOS_I2C_MCFG_TX ((uint32_t)0x0 << 0)
#define AOS_I2C_MCFG_RX ((uint32_t)0x1 << 0)
#define AOS_I2C_MCFG_ADDR_7 ((uint32_t)0x0 << 1)
#define AOS_I2C_MCFG_ADDR_10 ((uint32_t)0x1 << 1)
typedef struct {
uint32_t flags;
uint32_t hz;
} aos_i2c_info_t;
typedef struct {
uint32_t cfg;
uint16_t addr;
size_t count;
void *buf;
} aos_i2c_msg_t;
#define AOS_I2C_MSG_INIT_VAL \
{ \
.cfg = 0, \
.addr = 0, \
.count = 0, \
.buf = NULL, \
}
#define aos_i2c_msg_init(x) do { *(x) = (aos_i2c_msg_t)AOS_I2C_MSG_INIT_VAL; } while (0)
#if (defined(AOS_KERNEL_BUILD) && defined(AOS_COMP_DEVFS)) || !defined(AOS_KERNEL_BUILD)
#define AOS_I2C_IOC_GET_INFO 0x4901
#define AOS_I2C_IOC_SET_HZ 0x4902
#define AOS_I2C_IOC_TRANSFER(n) (0x4910 | ((int)(n) & 0xF))
#endif /* (defined(AOS_KERNEL_BUILD) && defined(AOS_COMP_DEVFS)) || !defined(AOS_KERNEL_BUILD) */
#ifdef AOS_KERNEL_BUILD
typedef aos_dev_ref_t aos_i2c_ref_t;
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Get an I2C master device.
* @param ref I2C ref to operate.
* @param id I2C master device ID.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_i2c_get(aos_i2c_ref_t *ref, uint32_t id);
/**
* @brief Release an I2C master device.
* @param ref I2C ref to operate.
* @return None.
*/
void aos_i2c_put(aos_i2c_ref_t *ref);
/**
* @brief Get information about an I2C master device.
* @param ref I2C ref to operate.
* @param info Information structure.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_i2c_get_info(aos_i2c_ref_t *ref, aos_i2c_info_t *info);
/**
* @brief Change I2C clock frequency.
* @param ref I2C ref to operate.
* @param hz Clock frequency.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_i2c_set_hz(aos_i2c_ref_t *ref, uint32_t hz);
/**
* @brief Synchronous I2C data transfer.
* @param ref I2C ref to operate.
* @param msgs Array of messages.
* @param num_msgs Number of messages.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_i2c_transfer(aos_i2c_ref_t *ref, const aos_i2c_msg_t *msgs, size_t num_msgs);
#ifdef __cplusplus
}
#endif
#endif /* AOS_KERNEL_BUILD */
/** @} */
#endif /* AOS_I2C_H */
| YifuLiu/AliOS-Things | components/drivers/peripheral/i2c/include/aos/i2c.h | C | apache-2.0 | 2,667 |
/*
* Copyright (C) 2020-2021 Alibaba Group Holding Limited
*/
#ifndef AOS_I2C_CORE_H
#define AOS_I2C_CORE_H
#include <aos/device_core.h>
#include <aos/i2c.h>
#define AOS_I2C_XF_MSG_HEAD ((uint32_t)0x1 << 0)
#define AOS_I2C_XF_MSG_TAIL ((uint32_t)0x1 << 1)
#define AOS_I2C_XF_SEQ_HEAD ((uint32_t)0x1 << 2)
#define AOS_I2C_XF_SEQ_TAIL ((uint32_t)0x1 << 3)
struct aos_i2c_ops;
typedef struct {
aos_dev_t dev;
/* must be initialized before registration */
const struct aos_i2c_ops *ops;
uint32_t flags;
uint32_t hz;
size_t buf_size;
void *buf[2];
aos_event_t event;
struct {
uint32_t timeout;
uint32_t flags;
uint32_t cfg;
uint16_t addr;
size_t len;
size_t head;
size_t tail;
void *buf;
} x;
} aos_i2c_t;
typedef struct aos_i2c_ops {
void (*unregister)(aos_i2c_t *);
aos_status_t (*startup)(aos_i2c_t *);
void (*shutdown)(aos_i2c_t *);
aos_status_t (*set_hz)(aos_i2c_t *);
aos_status_t (*start_xfer)(aos_i2c_t *);
void (*finish_xfer)(aos_i2c_t *);
void (*abort_xfer)(aos_i2c_t *);
aos_status_t (*transfer_sequence)(aos_i2c_t *, const aos_i2c_msg_t *, size_t);
} aos_i2c_ops_t;
#ifdef __cplusplus
extern "C" {
#endif
aos_status_t aos_i2c_register(aos_i2c_t *i2c);
aos_status_t aos_i2c_register_argumented(aos_i2c_t *i2c, uint32_t id, const aos_i2c_ops_t *ops,
uint32_t flags, uint32_t hz, size_t buf_size, void *buf[2]);
aos_status_t aos_i2c_unregister(uint32_t id);
size_t aos_i2c_hard_push(aos_i2c_t *i2c, void *tx_buf, size_t count);
bool aos_i2c_hard_pull(aos_i2c_t *i2c, const void *rx_buf, size_t count);
void aos_i2c_hard_fail(aos_i2c_t *i2c);
static inline const void *aos_i2c_hard_tx_inplace(aos_i2c_t *i2c)
{
if (i2c->x.cfg & AOS_I2C_MCFG_RX)
return NULL;
return &((const uint8_t *)i2c->x.buf)[i2c->x.head];
}
static inline void *aos_i2c_hard_rx_inplace(aos_i2c_t *i2c)
{
if (!(i2c->x.cfg & AOS_I2C_MCFG_RX))
return NULL;
return &((uint8_t *)i2c->x.buf)[i2c->x.tail];
}
static inline size_t aos_i2c_hard_remain(aos_i2c_t *i2c)
{
return i2c->x.head - i2c->x.tail;
}
static inline size_t aos_i2c_xfer_remain(aos_i2c_t *i2c)
{
return i2c->x.len - i2c->x.head;
}
#ifdef __cplusplus
}
#endif
#endif /* AOS_I2C_CORE_H */
| YifuLiu/AliOS-Things | components/drivers/peripheral/i2c/include/aos/i2c_core.h | C | apache-2.0 | 2,374 |
/*
* Copyright (C) 2015-2021 Alibaba Group Holding Limited
*/
#ifndef _IO_I2C_H_
#define _IO_I2C_H_
#ifdef __cplusplus
extern "C" {
#endif
/** @defgroup i2c_device_api
* @ingroup driver_api
* @{
*/
/* I2C VFS IOCTL CMD宏定义 */
#define IOC_I2C_BASE 'I'
#define IOC_I2C_SET_FREQ IOC_I2C_BASE + 1 /**< 设定I2C频率cmd宏定义 */
#define IOC_I2C_SET_CONFIG IOC_I2C_BASE + 2 /**< 设定除频率外其它I2C参数cmd宏定义 */
#define IOC_I2C_MASTER_RX IOC_I2C_BASE + 3 /**< 用master模式发起I2C接收操作cmd宏定义 */
#define IOC_I2C_MASTER_TX IOC_I2C_BASE + 4 /**< 用master模式发起I2C发送操作cmd宏定义 */
#define IOC_I2C_SLAVE_RX IOC_I2C_BASE + 5 /**< 用slave模式发起I2C接收操作cmd宏定义 - 暂不支持 */
#define IOC_I2C_SLAVE_TX IOC_I2C_BASE + 6 /**< 用slave模式发起I2C发送操作cmd宏定义 - 暂不支持 */
#define IOC_I2C_MEM_RX IOC_I2C_BASE + 7 /**< 用master模式发起I2C读取寄存器操作cmd宏定义 */
#define IOC_I2C_MEM_TX IOC_I2C_BASE + 8 /**< 用master模式发起I2C写入寄存器操作cmd宏定义 */
/* 设定i2c参数所用结构体 */
typedef union {
struct {
unsigned int addr_width:2; /**< 0：7-bit地址模式；1：10-bit地址模式 */
unsigned int role:1; /**< 1：i2c主设备模式；0：i2c从设备模式，暂不支持从设备模式设定 */
unsigned int addr:16; /**< i2c从设备地址 */
} c;
uint32_t freq; /**< i2c clk引脚时钟频率 */
} io_i2c_control_u;
/* i2c数据收发操作所用结构体 */
typedef struct {
unsigned short addr; /**< 此次读写操作对应的i2c送设备地址 */
unsigned short length; /**< 此次读写操作要读写数据的长度 */
unsigned char *data; /**< 写操作：指向要发送数据的首地址；读操作：指向接收数据存放内存块首地址 */
unsigned short maddr; /**< 此次内存操作要读写的memory地址，只有在ioctl cmd id为IOC_I2C_MEM_TX/IOC_I2C_MEM_RX时有效 */
unsigned short mlength; /**< 此次内存操作要读写的memory的长度，只有在ioctl cmd id为IOC_I2C_MEM_TX/IOC_I2C_MEM_RX时有效 */
unsigned int timeout; /**< 此次操作的超时时间，单位：ms */
} io_i2c_data_t;
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif //_IO_I2C_H_
| YifuLiu/AliOS-Things | components/drivers/peripheral/i2c/include/vfsdev/i2c_dev.h | C | apache-2.0 | 2,414 |
/*
* Copyright (C) 2020-2021 Alibaba Group Holding Limited
*/
#include <aos/i2c_core.h>
#ifdef AOS_COMP_DEVFS
#include <stdio.h>
#include <inttypes.h>
#endif
#define XFER_TIMEOUT 1000
#define EVENT_XFER_COMPLETE ((uint32_t)1 << 0)
#define EVENT_XFER_ERROR ((uint32_t)1 << 1)
aos_status_t aos_i2c_get(aos_i2c_ref_t *ref, uint32_t id)
{
return aos_dev_get(ref, AOS_DEV_TYPE_I2C, id);
}
void aos_i2c_put(aos_i2c_ref_t *ref)
{
aos_dev_put(ref);
}
aos_status_t aos_i2c_get_info(aos_i2c_ref_t *ref, aos_i2c_info_t *info)
{
aos_i2c_t *i2c;
if (!ref || !aos_dev_ref_is_valid(ref) || !info)
return -EINVAL;
i2c = aos_container_of(ref->dev, aos_i2c_t, dev);
info->flags = i2c->flags;
aos_dev_lock(ref->dev);
info->hz = i2c->hz;
aos_dev_unlock(ref->dev);
return 0;
}
aos_status_t aos_i2c_set_hz(aos_i2c_ref_t *ref, uint32_t hz)
{
aos_i2c_t *i2c;
uint32_t old_hz;
aos_status_t ret;
if (!ref || !aos_dev_ref_is_valid(ref) || hz == 0)
return -EINVAL;
i2c = aos_container_of(ref->dev, aos_i2c_t, dev);
if (!i2c->ops->set_hz)
return -ENOTSUP;
aos_dev_lock(ref->dev);
old_hz = i2c->hz;
i2c->hz = hz;
ret = i2c->ops->set_hz(i2c);
if (ret) {
i2c->hz = old_hz;
aos_dev_unlock(ref->dev);
return ret;
}
aos_dev_unlock(ref->dev);
return 0;
}
static aos_status_t transfer_sequence(aos_i2c_t *i2c, const aos_i2c_msg_t *msgs, size_t num_msgs)
{
if (i2c->ops->transfer_sequence)
return i2c->ops->transfer_sequence(i2c, msgs, num_msgs);
if (i2c->buf_size == 0) {
for (size_t i = 0; i < num_msgs; i++) {
const aos_i2c_msg_t *msg = &msgs[i];
uint32_t mask;
uint32_t val;
aos_status_t ret;
i2c->x.timeout = XFER_TIMEOUT;
i2c->x.flags = AOS_I2C_XF_MSG_HEAD | AOS_I2C_XF_MSG_TAIL;
i2c->x.flags |= (i == 0) ? AOS_I2C_XF_SEQ_HEAD : 0;
i2c->x.flags |= (i + 1 == num_msgs) ? AOS_I2C_XF_SEQ_TAIL : 0;
i2c->x.cfg = msg->cfg;
i2c->x.addr = msg->addr;
i2c->x.len = msg->count;
i2c->x.head = 0;
i2c->x.tail = 0;
i2c->x.buf = msg->buf;
ret = i2c->ops->start_xfer(i2c);
if (ret)
return ret;
mask = EVENT_XFER_COMPLETE | EVENT_XFER_ERROR;
if (aos_event_get(&i2c->event, mask, AOS_EVENT_OR, &val, i2c->x.timeout) || (val & EVENT_XFER_ERROR)) {
i2c->ops->abort_xfer(i2c);
aos_event_set(&i2c->event, 0, AOS_EVENT_AND);
return -EIO;
} else {
i2c->ops->finish_xfer(i2c);
aos_event_set(&i2c->event, 0, AOS_EVENT_AND);
}
}
} else {
const aos_i2c_msg_t *last_msg = NULL;
size_t last_pos = 0;
if (!(msgs[0].cfg & AOS_I2C_MCFG_RX)) {
size_t count = i2c->buf_size < msgs[0].count ? i2c->buf_size : msgs[0].count;
if (aos_umem_copy(i2c->buf[0], msgs[0].buf, count))
return -EFAULT;
}
for (size_t i = 0, j = 0, pos = 0; i < num_msgs; j++) {
const aos_i2c_msg_t *msg = &msgs[i];
const aos_i2c_msg_t *next_msg;
bool msg_tail;
size_t next_pos;
uint32_t mask;
uint32_t val;
aos_status_t ret;
if (msg != last_msg) {
i2c->x.cfg = msg->cfg;
i2c->x.addr = msg->addr;
}
i2c->x.timeout = XFER_TIMEOUT;
i2c->x.len = (pos + i2c->buf_size < msg->count) ? i2c->buf_size : msg->count - pos;
i2c->x.head = 0;
i2c->x.tail = 0;
msg_tail = (pos + i2c->x.len == msg->count);
i2c->x.flags = 0;
i2c->x.flags |= (pos == 0) ? AOS_I2C_XF_MSG_HEAD : 0;
i2c->x.flags |= msg_tail ? AOS_I2C_XF_MSG_TAIL : 0;
i2c->x.flags |= (j == 0) ? AOS_I2C_XF_SEQ_HEAD : 0;
i2c->x.flags |= (msg_tail && i + 1 == num_msgs) ? AOS_I2C_XF_SEQ_TAIL : 0;
i2c->x.buf = i2c->buf[j & 1];
ret = i2c->ops->start_xfer(i2c);
if (ret)
return ret;
if (last_msg && (last_msg->cfg & AOS_I2C_MCFG_RX)) {
size_t count = last_pos + i2c->buf_size < last_msg->count ? i2c->buf_size : last_msg->count - last_pos;
if (aos_umem_copy((uint8_t *)last_msg->buf + last_pos, i2c->buf[(j - 1) & 1], count)) {
i2c->ops->abort_xfer(i2c);
aos_event_set(&i2c->event, 0, AOS_EVENT_AND);
return -EFAULT;
}
}
if (msg_tail) {
next_msg = (i + 1 < num_msgs) ? &msgs[i + 1] : NULL;
next_pos = 0;
} else {
next_msg = msg;
next_pos = pos + i2c->x.len;
}
if (next_msg && !(next_msg->cfg & AOS_I2C_MCFG_RX)) {
size_t count = next_pos + i2c->buf_size < next_msg->count ? i2c->buf_size : next_msg->count - next_pos;
if (aos_umem_copy(i2c->buf[(j + 1) & 1], (const uint8_t *)next_msg->buf + next_pos, count)) {
i2c->ops->abort_xfer(i2c);
aos_event_set(&i2c->event, 0, AOS_EVENT_AND);
return -EFAULT;
}
}
mask = EVENT_XFER_COMPLETE | EVENT_XFER_ERROR;
if (aos_event_get(&i2c->event, mask, AOS_EVENT_OR, &val, i2c->x.timeout) || (val & EVENT_XFER_ERROR)) {
i2c->ops->abort_xfer(i2c);
aos_event_set(&i2c->event, 0, AOS_EVENT_AND);
return -EIO;
} else {
i2c->ops->finish_xfer(i2c);
aos_event_set(&i2c->event, 0, AOS_EVENT_AND);
}
last_msg = msg;
last_pos = pos;
if (msg_tail) {
pos = 0;
i++;
} else {
pos += i2c->x.len;
}
}
if (last_msg && (last_msg->cfg & AOS_I2C_MCFG_RX)) {
if (aos_umem_copy((uint8_t *)last_msg->buf + last_pos, i2c->x.buf, i2c->x.len))
return -EFAULT;
}
}
return 0;
}
aos_status_t aos_i2c_transfer(aos_i2c_ref_t *ref, const aos_i2c_msg_t *msgs, size_t num_msgs)
{
aos_i2c_t *i2c;
aos_status_t ret = 0;
if (!ref || !aos_dev_ref_is_valid(ref) || !msgs || num_msgs == 0)
return -EINVAL;
i2c = aos_container_of(ref->dev, aos_i2c_t, dev);
for (size_t i = 0; i < num_msgs; i++) {
const aos_i2c_msg_t *msg = &msgs[i];
if (msg->cfg & AOS_I2C_MCFG_ADDR_10) {
if (!(i2c->flags & AOS_I2C_F_ADDR_10))
return -EINVAL;
if (msg->addr & ~(uint16_t)0x3FF)
return -EINVAL;
} else {
if (msg->addr & ~(uint16_t)0x7F)
return -EINVAL;
if (msg->addr <= 0x07 || msg->addr >= 0x78)
return -EINVAL;
}
if (msg->count == 0 || !msg->buf)
return -EINVAL;
}
for (size_t i = 0, j = 0; i < num_msgs; i++) {
if (i + 1 < num_msgs &&
(msgs[i].cfg & AOS_I2C_MCFG_ADDR_10) == (msgs[i + 1].cfg & AOS_I2C_MCFG_ADDR_10) &&
msgs[i].addr == msgs[i + 1].addr)
continue;
aos_dev_lock(ref->dev);
ret = transfer_sequence(i2c, &msgs[j], i + 1 - j);
aos_dev_unlock(ref->dev);
if (ret)
break;
j = i + 1;
}
return ret;
}
static void dev_i2c_unregister(aos_dev_t *dev)
{
aos_i2c_t *i2c = aos_container_of(dev, aos_i2c_t, dev);
aos_event_free(&i2c->event);
if (i2c->ops->unregister)
i2c->ops->unregister(i2c);
}
static aos_status_t dev_i2c_get(aos_dev_ref_t *ref)
{
aos_i2c_t *i2c = aos_container_of(ref->dev, aos_i2c_t, dev);
if (!aos_dev_ref_is_first(ref))
return 0;
return i2c->ops->startup(i2c);
}
static void dev_i2c_put(aos_dev_ref_t *ref)
{
aos_i2c_t *i2c = aos_container_of(ref->dev, aos_i2c_t, dev);
if (!aos_dev_ref_is_last(ref))
return;
i2c->ops->shutdown(i2c);
}
static const aos_dev_ops_t dev_i2c_ops = {
.unregister = dev_i2c_unregister,
.get = dev_i2c_get,
.put = dev_i2c_put,
};
#ifdef AOS_COMP_DEVFS
static aos_status_t devfs_i2c_ioctl(aos_devfs_file_t *file, int cmd, uintptr_t arg)
{
aos_i2c_ref_t *ref = aos_devfs_file2ref(file);
aos_status_t ret;
if (cmd == AOS_I2C_IOC_GET_INFO) {
aos_i2c_info_t info;
if (!aos_devfs_file_is_readable(file))
return -EPERM;
ret = aos_i2c_get_info(ref, &info);
if (ret)
return ret;
if (!aos_umem_check((const void *)arg, sizeof(info)))
return -EFAULT;
ret = aos_umem_copy((void *)arg, &info, sizeof(info)) ? -EFAULT : 0;
} else if (cmd == AOS_I2C_IOC_SET_HZ) {
uint32_t hz;
if (!aos_devfs_file_is_writable(file))
return -EPERM;
if (!aos_umem_check((const void *)arg, sizeof(hz)))
return -EFAULT;
if (aos_umem_copy(&hz, (const void *)arg, sizeof(hz)))
return -EFAULT;
ret = aos_i2c_set_hz(ref, hz);
} else if (cmd >= AOS_I2C_IOC_TRANSFER(16) && cmd <= AOS_I2C_IOC_TRANSFER(15)) {
aos_i2c_msg_t msgs[16];
size_t num_msgs;
if ((aos_devfs_file_get_mode(file) & O_ACCMODE) != O_RDWR)
return -EPERM;
num_msgs = cmd & 0xF;
num_msgs = (num_msgs == 0) ? 16 : num_msgs;
if (!aos_umem_check((const void *)arg, sizeof(msgs[0]) * num_msgs))
return -EFAULT;
if (aos_umem_copy(msgs, (const void *)arg, sizeof(msgs[0]) * num_msgs))
return -EFAULT;
for (size_t i = 0; i < num_msgs; i++) {
if (msgs[i].buf && !aos_umem_check(msgs[i].buf, msgs[i].count))
return -EFAULT;
}
ret = aos_i2c_transfer(ref, msgs, num_msgs);
} else {
ret = -EINVAL;
}
return ret;
}
static const aos_devfs_file_ops_t devfs_i2c_ops = {
.ioctl = devfs_i2c_ioctl,
.poll = NULL,
.mmap = NULL,
.read = NULL,
.write = NULL,
.lseek = NULL,
};
#endif /* AOS_COMP_DEVFS */
aos_status_t aos_i2c_register(aos_i2c_t *i2c)
{
aos_status_t ret;
#ifdef AOS_COMP_DEVFS
int name_len;
#endif
if (!i2c)
return -EINVAL;
if (!i2c->ops || !i2c->ops->startup || !i2c->ops->shutdown)
return -EINVAL;
if ((!i2c->ops->start_xfer || !i2c->ops->finish_xfer || !i2c->ops->abort_xfer) && !i2c->ops->transfer_sequence)
return -EINVAL;
if (i2c->hz == 0)
return -EINVAL;
if ((i2c->buf_size && (!i2c->buf[0] || !i2c->buf[1])) || (!i2c->buf_size && (i2c->buf[0] || i2c->buf[1])))
return -EINVAL;
i2c->dev.type = AOS_DEV_TYPE_I2C;
i2c->dev.ops = &dev_i2c_ops;
#ifdef AOS_COMP_DEVFS
aos_devfs_node_init(&i2c->dev.devfs_node);
i2c->dev.devfs_node.ops = &devfs_i2c_ops;
name_len = snprintf(i2c->dev.devfs_node.name, sizeof(i2c->dev.devfs_node.name), "i2c%" PRIu32, i2c->dev.id);
if (name_len < 0 || name_len >= sizeof(i2c->dev.devfs_node.name))
return -EINVAL;
#endif
ret = aos_event_new(&i2c->event, 0);
if (ret)
return ret;
ret = aos_dev_register(&i2c->dev);
if (ret) {
aos_event_free(&i2c->event);
return ret;
}
return 0;
}
aos_status_t aos_i2c_register_argumented(aos_i2c_t *i2c, uint32_t id, const aos_i2c_ops_t *ops,
uint32_t flags, uint32_t hz, size_t buf_size, void *buf[2])
{
if (!i2c)
return -EINVAL;
i2c->dev.id = id;
i2c->ops = ops;
i2c->flags = flags;
i2c->hz = hz;
i2c->buf_size = buf_size;
i2c->buf[0] = buf[0];
i2c->buf[1] = buf[1];
return aos_i2c_register(i2c);
}
aos_status_t aos_i2c_unregister(uint32_t id)
{
return aos_dev_unregister(AOS_DEV_TYPE_I2C, id);
}
size_t aos_i2c_hard_push(aos_i2c_t *i2c, void *tx_buf, size_t count)
{
if (i2c->x.head + count > i2c->x.len)
count = i2c->x.len - i2c->x.head;
if (!(i2c->x.cfg & AOS_I2C_MCFG_RX) && tx_buf) {
for (size_t i = 0; i < count; i++)
((uint8_t *)tx_buf)[i] = ((const uint8_t *)i2c->x.buf)[i2c->x.head + i];
}
i2c->x.head += count;
return count;
}
bool aos_i2c_hard_pull(aos_i2c_t *i2c, const void *rx_buf, size_t count)
{
if (i2c->x.tail + count > i2c->x.head)
count = i2c->x.head - i2c->x.tail;
if ((i2c->x.cfg & AOS_I2C_MCFG_RX) && rx_buf) {
for (size_t i = 0; i < count; i++)
((uint8_t *)i2c->x.buf)[i2c->x.tail + i] = ((const uint8_t *)rx_buf)[i];
}
i2c->x.tail += count;
if (i2c->x.tail == i2c->x.len) {
aos_event_set(&i2c->event, EVENT_XFER_COMPLETE, AOS_EVENT_OR);
return true;
}
return false;
}
void aos_i2c_hard_fail(aos_i2c_t *i2c)
{
aos_event_set(&i2c->event, EVENT_XFER_ERROR, AOS_EVENT_OR);
}
| YifuLiu/AliOS-Things | components/drivers/peripheral/i2c/src/i2c.c | C | apache-2.0 | 13,204 |
#include <aos/list.h>
#include <drv/iic.h>
#include <devicevfs/devicevfs.h>
#include <drivers/ddkc_log.h>
#include "i2c_core.h"
static dlist_t g_i2c_controller_list;
static aos_mutex_t g_i2c_controller_lock;
static i2c_master_dev_t *find_i2c_controller(uint32_t id) {
dlist_t *head = &g_i2c_controller_list;
dlist_t *pos = NULL, *n = NULL;
i2c_master_dev_t *master = NULL;
dlist_for_each_safe(pos, n, head) {
master = aos_container_of (pos, i2c_master_dev_t, host);
if (master->id == id) {
return master;
}
}
return NULL;
}
aos_status_t _i2c_master_set_clk (i2c_master_dev_t *master, uint32_t clk) {
int32_t ret = 0;
csi_iic_speed_t speed = IIC_BUS_SPEED_STANDARD;
if (master->clk == clk)
return 0;
if (clk <= I2C_BUS_CLK_100K) {
speed = IIC_BUS_SPEED_STANDARD;
} else if (clk <= I2C_BUS_CLK_400K) {
speed = IIC_BUS_SPEED_FAST;
} else if (clk <= I2C_BUS_CLK_1000K) {
speed = IIC_BUS_SPEED_FAST_PLUS;
} else if (clk <= I2C_BUS_CLK_3400K) {
speed = IIC_BUS_SPEED_HIGH;
} else {
speed = IIC_BUS_SPEED_STANDARD;
ddkc_warn("invalid clk:%d, set to standard speed by default\r\n", clk);
}
ret = csi_iic_speed(&master->csi_dev, speed);
if (ret == CSI_OK) {
ddkc_dbg("set addr speed on i2c%d success\r\n", master->id);
ret = 0;
} else {
ddkc_err("set addr speed on i2c%d success fail, ret:%d\r\n", master->id, ret);
return ret;
}
master->clk = clk;
return 0;
}
aos_status_t _i2c_master_set_addr_mode (i2c_master_dev_t *master, uint32_t addr_width) {
int32_t ret = 0;
csi_iic_addr_mode_t addr_mode = IIC_ADDRESS_7BIT;
if (master->addr_width == addr_width)
return 0;
if (addr_width == I2C_SLAVE_ADDR_WIDTH_7BIT) {
addr_mode = IIC_ADDRESS_7BIT;
} else if (addr_width <= I2C_SLAVE_ADDR_WIDTH_10BIT) {
addr_mode = IIC_ADDRESS_10BIT;
} else {
addr_mode = IIC_ADDRESS_7BIT;
ddkc_warn("invalid addr mode:%d, set to 7 bit mode by default\r\n", addr_width);
}
ret = csi_iic_addr_mode(&master->csi_dev, addr_mode);
if (ret == CSI_OK) {
ddkc_dbg("set addr mode on i2c%d success\r\n", master->id);
} else {
ddkc_err("set addr mode on i2c%d success fail, ret:%d\r\n", master->id, ret);
return ret;
}
master->addr_width = addr_width;
return 0;
}
/**
* setup new I2C channel with specified slave device's config to communicate with slave device
*
* @param[in] id host I2C controller's channel ID
* @param[in] config slave device's address, address width and clock settings, \ref i2c_slave_config_t
*
* @return handle of the i2c device, used for later i2c operations on I2C slave device, when open operation success;
NULL when open operation fails
*/
i2c_dev_handle_t aos_i2c_open (uint32_t id, i2c_slave_config_t *config) {
i2c_master_dev_t *master = NULL;
i2c_slave_dev_t *slave = NULL;
int32_t ret = 0;
csi_iic_t *i2c_dev = NULL;
aos_status_t status = -1;
if (id >= aos_i2c_get_num()) {
ddkc_err("invalid id:%d, max id:%d\r\n", id, aos_i2c_get_num());
return NULL;
}
if (!config) {
ddkc_err("config is NULL, invalid\r\n");
return NULL;
}
status = aos_mutex_lock(&g_i2c_controller_lock, AOS_WAIT_FOREVER);
if (status) {
ddkc_warn("lock g_i2c_controller_lock failed, status:%d\r\n", status);
return NULL;
}
master = find_i2c_controller(id);
if (!master) {
// create master deivce struct it it does not exist
master = (i2c_master_dev_t *)malloc(sizeof(i2c_master_dev_t));
if (!master) {
ddkc_err("malloc for i2c master failed\r\n");
goto err_master;
}
master->id = id;
master->init = 0;
master->addr = 0x0;
master->addr_width = 0x0;
master->clk = 0x0;
ret = aos_mutex_new(&master->lock);
if (ret) {
ddkc_err("aos_mutex_new failed, ret:%d\r\n", ret);
goto err_master;
}
dlist_init(&master->slave);
dlist_init(&master->host);
i2c_dev = &master->csi_dev;
master->init = 0;
ret = csi_iic_init(i2c_dev, id);
if (ret == CSI_OK) {
ddkc_dbg("i2c%d init success\r\n", id);
} else {
ddkc_err("i2c%d init fail, ret:%d\r\n", id, ret);
goto err_master;
}
master->init = 1;
dlist_add(&master->host, &g_i2c_controller_list);
} else {
i2c_dev = &master->csi_dev;
}
status = aos_mutex_unlock(&g_i2c_controller_lock);
if (status) {
// This should never happen
ddkc_warn("THIS SHOULD NEVER HAPPEN - unlock g_i2c_controller_lock failed, status:%d\r\n", status);
}
/*
* Note: check whether the slave with the same address is already opened or not?
* whether there's any node in master->slave list has the same slave address with target slave
* DON'T cover this case for the moment
* component/application layer must make sure only one user open the same i2c slave device
* */
slave = (i2c_slave_dev_t *)malloc(sizeof(i2c_slave_dev_t));
if (!slave) {
ddkc_err("malloc for i2c slave failed\r\n");
return NULL;
}
slave->i2c_dev_handle = AOS_I2C_MAGIC;
memcpy(&slave->config, config, sizeof(i2c_slave_config_t));
// Try set I2C config to controller and chech whether target config is supported or not
status = aos_mutex_lock(&master->lock, AOS_WAIT_FOREVER);
if (status) {
ddkc_warn("lock i2c%d controller failed, status:%d\r\n", id, status);
free(slave);
slave = NULL;
return NULL;
}
ret = aos_mutex_new(&slave->lock);
if (ret) {
ddkc_assert(1, "aos_mutex_new for slave->lock failed, ret:%d\r\n", ret);
goto err_slave;
}
// address mode should not be a problem, ignore this operation
/*
if (_i2c_master_set_addr_mode(master, config->addr_width)) {
goto err_slave;
}
*/
if (_i2c_master_set_clk(master, config->clk)) {
ddkc_assert(1, "_i2c_master_set_clk failed, ret:%d\r\n", ret);
goto err_slave;
}
// init slave device's node and add it into controller's slave list
dlist_init(&slave->node);
dlist_add(&slave->node, &master->slave);
slave->master = master;
ddkc_dbg("i2c slave config done\r\n");
status = aos_mutex_unlock(&master->lock);
if (status) {
// This should never happen
ddkc_warn("THIS SHOULD NEVER HAPPEN - unlock i2c%d controller failed, status:%d\r\n", id, status);
}
return &slave->i2c_dev_handle;
err_slave:
status = aos_mutex_unlock(&master->lock);
if (status) {
ddkc_warn("THIS SHOULD NEVER HAPPEN - unlock i2c%d controller failed, status:%d\r\n", id, status);
}
if (slave) {
free(slave);
slave = NULL;
}
return NULL;
err_master:
status = aos_mutex_unlock(&g_i2c_controller_lock);
if (status) {
// This should never happen
ddkc_warn("THIS SHOULD NEVER HAPPEN - unlock g_i2c_controller_lock failed, status:%d\r\n", status);
}
if (master) {
free(master);
master = NULL;
}
return NULL;
}
/**
* close target I2C communication channel
*
* @param[in] dev_h handle of the i2c device to be operated, must be the return value of aos_i2c_open
*
* @return 0 if operation success
negative error code if operation fails
*/
aos_status_t aos_i2c_close (i2c_dev_handle_t dev_h) {
aos_status_t status = -1;
i2c_slave_dev_t *slave = NULL;
i2c_master_dev_t *master = NULL;
if (dev_h == NULL || *dev_h != AOS_I2C_MAGIC) {
ddkc_err("invalid dev:%p, 0x%x\r\n", dev_h, !dev_h ? 0 : *dev_h);
return -EINVAL;
}
slave = aos_container_of(dev_h, i2c_slave_dev_t, i2c_dev_handle);
master = (i2c_master_dev_t *)(slave->master);
status = aos_mutex_lock(&master->lock, AOS_WAIT_FOREVER);
if (status) {
ddkc_warn("lock i2c%d failed, status:%d\r\n", master->id, status);
return -EIO;
}
// remove slave node from master's slave list
dlist_del(&slave->node);
slave->master = NULL;
memset(slave, 0, sizeof(i2c_slave_dev_t));
free (slave);
if (dlist_empty(&master->slave)) {
ddkc_info("i2c's slave list is empty\r\n");
}
status = aos_mutex_unlock(&master->lock);
if (status) {
ddkc_warn("THIS SHOULD NEVER HAPPEN - unlock i2c%d failed, status:%d\r\n", master->id, status);
}
return 0;
}
/**
* set I2C bus's clock when communicate with target I2C slave
*
* @param[in] dev_h handle of the i2c device to be operated, must be the return value of aos_i2c_open
* @param[in] clk target clock to be used
*
* @return 0 if operation success
negative error code if operation fails
*/
aos_status_t aos_i2c_clk_set (i2c_dev_handle_t dev_h, uint32_t clk) {
aos_status_t status = -1;
i2c_slave_dev_t *slave = NULL;
i2c_master_dev_t *master = NULL;
if (dev_h == NULL || *dev_h != AOS_I2C_MAGIC) {
ddkc_err("invalid dev:%p, 0x%x\r\n", dev_h, !dev_h ? 0 : *dev_h);
return -EINVAL;
}
// TODO lock i2c slave's lock
slave = aos_container_of(dev_h, i2c_slave_dev_t, i2c_dev_handle);
status = aos_mutex_lock(&slave->lock, AOS_WAIT_FOREVER);
if (status) {
ddkc_warn("lock i2c slave 0x%x failed, status:%d\r\n", slave->config.addr, status);
return -EIO;
}
// just log target clk setting into slave's config
slave->config.clk = clk;
status = aos_mutex_unlock(&slave->lock);
if (status) {
ddkc_warn("THIS SHOULD NEVER HAPPEN - unlock i2c slave 0x%x failed, status:%d\r\n", slave->config.addr, status);
}
return status;
}
/**
* set slave device's address witdh on target I2C channel
*
* @param[in] dev_h handle of the i2c device to be operated, must be the return value of aos_i2c_open
* @param[in] addr_width slave device's address width, 7-bit or 10-bit only
*
* @return 0 if operation success
negative error code if operation fails
*/
aos_status_t aos_i2c_addr_width_set (i2c_dev_handle_t dev_h, uint32_t addr_width) {
aos_status_t status = -1;
i2c_slave_dev_t *slave = NULL;
i2c_master_dev_t *master = NULL;
if (dev_h == NULL || *dev_h != AOS_I2C_MAGIC) {
ddkc_err("invalid dev:%p, 0x%x\r\n", dev_h, !dev_h ? 0 : *dev_h);
return -EINVAL;
}
slave = aos_container_of(dev_h, i2c_slave_dev_t, i2c_dev_handle);
status = aos_mutex_lock(&slave->lock, AOS_WAIT_FOREVER);
if (status) {
ddkc_warn("lock i2c slave 0x%x failed, status:%d\r\n", slave->config.addr, status);
return -EIO;
}
// just log target address width setting into slave's config
slave->config.addr_width = addr_width;
status = aos_mutex_unlock(&slave->lock);
if (status) {
ddkc_warn("THIS SHOULD NEVER HAPPEN - unlock i2c slave 0x%x failed, status:%d\r\n", slave->config.addr, status);
}
return status;
}
/**
* set slave device's address on target I2C channel
*
* @param[in] dev_h handle of the i2c device to be operated, must be the return value of aos_i2c_open
* @param[in] addr slave device's address width
*
* @return 0 if operation success
negative error code if operation fails
*/
aos_status_t aos_i2c_slave_addr_set (i2c_dev_handle_t dev_h, uint16_t addr) {
aos_status_t status = -1;
i2c_slave_dev_t *slave = NULL;
i2c_master_dev_t *master = NULL;
if (dev_h == NULL || *dev_h != AOS_I2C_MAGIC) {
ddkc_err("invalid dev:%p, 0x%x\r\n", dev_h, !dev_h ? 0 : *dev_h);
return -EINVAL;
}
slave = aos_container_of(dev_h, i2c_slave_dev_t, i2c_dev_handle);
status = aos_mutex_lock(&slave->lock, AOS_WAIT_FOREVER);
if (status) {
ddkc_warn("lock i2c slave 0x%x failed, status:%d\r\n", slave->config.addr, status);
return -EIO;
}
// log slave address into its config
slave->config.addr = addr;
status = aos_mutex_unlock(&slave->lock);
if (status) {
ddkc_warn("THIS SHOULD NEVER HAPPEN - unlock i2c slave 0x%x failed, status:%d\r\n", slave->config.addr, status);
}
return status;
}
i2c_slave_dev_t* _i2c_tx_rx_prepare(i2c_dev_handle_t dev_h) {
int ret = 0;
aos_status_t status = -1;
i2c_slave_dev_t *slave = NULL;
i2c_master_dev_t *master = NULL;
if (dev_h == NULL || *dev_h != AOS_I2C_MAGIC) {
ddkc_err("invalid dev:%p, 0x%x\r\n", dev_h, !dev_h ? 0 : *dev_h);
return NULL;
}
// the whole operation should be locked by i2c clave's lock
slave = aos_container_of(dev_h, i2c_slave_dev_t, i2c_dev_handle);
master = (i2c_master_dev_t *)(slave->master);
// lock master's lock
status = aos_mutex_lock(&master->lock, AOS_WAIT_FOREVER);
if (status) {
ddkc_warn("lock i2c%d controller failed, status:%d\r\n", master->id, status);
return NULL;
}
/* set to target clk and address width */
ret = _i2c_master_set_clk(master, slave->config.clk);
if (ret) {
ddkc_warn("set clk to i2c%d failed, ret:%d\r\n", master->id, ret);
}
ret = _i2c_master_set_addr_mode(master, slave->config.addr_width);
if (ret) {
ddkc_warn("set address mode to i2c%d failed, ret:%d\r\n", master->id, ret);
}
return slave;
}
aos_status_t _i2c_tx_rx_unprepare(i2c_slave_dev_t *slave) {
aos_status_t status = 0;
i2c_master_dev_t *master = (i2c_master_dev_t *)(slave->master);
status = aos_mutex_unlock(&master->lock);
if (status) {
ddkc_warn("THIS SHOULD NEVER HAPPEN - unlock i2c%d controller failed, status:%d\r\n", master->id, status);
}
return status;
}
/**
* issue I2C write operation on target I2C channel
*
* @param[in] dev_h handle of the i2c device to be operated, must be the return value of aos_i2c_open
* @param[in] buf pointer to the buffer to be sent
* @param[in] len number of data to be sent
* @param[in] timeout in unit of ms, current i2c transaction's timeout value
* use AOS_WAIT_FOREVER for endless wait until operation success or fails
*
* @return 0 if operation success
negative error code if operation fails
*/
int32_t aos_i2c_master_send (i2c_dev_handle_t dev_h, char *buf, uint32_t len, uint32_t timeout) {
int ret = 0;
i2c_slave_dev_t *slave = NULL;
i2c_master_dev_t *master = NULL;
slave = _i2c_tx_rx_prepare(dev_h);
if (!slave) {
ddkc_err("i2c prepare failed\r\n");
return -1;
}
master = (i2c_master_dev_t *)(slave->master);
/* do i2c master send operation */
ret = csi_iic_master_send(&master->csi_dev, slave->config.addr, buf, len, timeout);
if (ret != len) {
ddkc_err("i2c%d master send failed, ret:%d\r\n", master->id, ret);
}
_i2c_tx_rx_unprepare(slave);
return ret;
}
/**
* issue I2C read operation on target I2C channel
*
* @param[in] dev_h handle of the i2c device to be operated, must be the return value of aos_i2c_open
* @param[in] buf pointer to the buffer where to save the received data
* @param[in] len number of data to be read
* @param[in] timeout in unit of ms, current i2c transaction's timeout value
* use AOS_WAIT_FOREVER for endless wait until operation success or fails
*
* @return 0 if operation success
negative error code if operation fails
*/
int32_t aos_i2c_master_recv (i2c_dev_handle_t dev_h, char *buf, uint32_t len, uint32_t timeout) {
int ret = 0;
i2c_slave_dev_t *slave = NULL;
i2c_master_dev_t *master = NULL;
slave = _i2c_tx_rx_prepare(dev_h);
if (!slave) {
ddkc_err("i2c prepare failed\r\n");
return -1;
}
master = (i2c_master_dev_t *)(slave->master);
/* do i2c master send operation */
ret = csi_iic_master_receive(&master->csi_dev, slave->config.addr, buf, len, timeout);
if (ret <= 0) {
ddkc_err("i2c%d master send failed, ret:%d", master->id, ret);
}
_i2c_tx_rx_unprepare(slave);
return ret;
}
/**
* issue I2C memory/register write operation on target I2C channel
*
* @param[in] dev_h handle of the i2c device to be operated, must be the return value of aos_i2c_open
* @param[in] addr address of target memory/register to be write
* @param[in] addr_len address's length, either I2C_MEM_ADDR_SIZE_8BIT or I2C_MEM_ADDR_SIZE_16BIT
* @param[in] buf pointer to the buffer to be written
* @param[in] len number of data to be written
* @param[in] timeout in unit of ms, current i2c transaction's timeout value
* use AOS_WAIT_FOREVER for endless wait until operation success or fails
*
* @return 0 if operation success
negative error code if operation fails
*/
int32_t aos_i2c_mem_write (i2c_dev_handle_t dev_h, uint16_t addr, uint8_t addr_len, uint8_t *buf, uint32_t len, uint32_t timeout) {
int ret = 0;
i2c_slave_dev_t *slave = NULL;
i2c_master_dev_t *master = NULL;
csi_iic_mem_addr_size_t addr_size;
slave = _i2c_tx_rx_prepare(dev_h);
if (!slave) {
ddkc_err("i2c prepare failed\r\n");
return -1;
}
master = (i2c_master_dev_t *)(slave->master);
addr_size = (addr_len == 1) ? IIC_MEM_ADDR_SIZE_8BIT : IIC_MEM_ADDR_SIZE_16BIT;
/* do i2c master send operation */
ret = csi_iic_mem_send(&master->csi_dev, slave->config.addr, addr, addr_size, buf, len, timeout);
if (ret != len) {
ddkc_err("i2c%d memory send failed, ret:%d\r\n", master->id, ret);
}
_i2c_tx_rx_unprepare(slave);
return ret;
}
/**
* issue I2C memory/register read operation on target I2C channel
*
* @param[in] dev_h handle of the i2c device to be operated, must be the return value of aos_i2c_open
* @param[in] addr address of target memory/register to be read
* @param[in] addr_len address's length, , either I2C_MEM_ADDR_SIZE_8BIT or I2C_MEM_ADDR_SIZE_16BIT
* @param[in] buf pointer to the buffer for read operation
* @param[in] len number of data to be read
* @param[in] timeout in unit of ms, current i2c transaction's timeout value
* use AOS_WAIT_FOREVER for endless wait until operation success or fails
*
* @return 0 if operation success
negative error code if operation fails
*/
int32_t aos_i2c_mem_read (i2c_dev_handle_t dev_h, uint16_t addr, uint8_t addr_len, uint8_t *buf, uint32_t len, uint32_t timeout) {
int ret = 0;
i2c_slave_dev_t *slave = NULL;
i2c_master_dev_t *master = NULL;
csi_iic_mem_addr_size_t addr_size;
slave = _i2c_tx_rx_prepare(dev_h);
if (!slave) {
ddkc_err("i2c prepare failed\r\n");
return -1;
}
master = (i2c_master_dev_t *)(slave->master);
addr_size = (addr_len == 1) ? IIC_MEM_ADDR_SIZE_8BIT : IIC_MEM_ADDR_SIZE_16BIT;
/* do i2c master send operation */
ret = csi_iic_mem_receive(&master->csi_dev, slave->config.addr, addr, addr_size, buf, len, timeout);
if (ret != len) {
ddkc_err("i2c%d master send failed, ret:%d", master->id, ret);
}
_i2c_tx_rx_unprepare(slave);
return ret;
}
/**
* issue I2C memory/register read operation on target I2C channel
*
* @param[in] dev_h handle of the i2c device to be operated, must be the return value of aos_i2c_open
* @param[in] level level of current power management level
*
* @return 0 if operation success
negative error code if operation fails
*/
aos_status_t aos_i2c_pm_ctrl (i2c_dev_handle_t dev_h, int level) {
aos_status_t status = -1;
i2c_slave_dev_t *slave = NULL;
i2c_master_dev_t *master = NULL;
if (dev_h == NULL || *dev_h != AOS_I2C_MAGIC) {
ddkc_err("invalid dev:%p, 0x%x\r\n", dev_h, !dev_h ? 0 : *dev_h);
return -EINVAL;
}
slave = aos_container_of(dev_h, i2c_slave_dev_t, i2c_dev_handle);
master = (i2c_master_dev_t *)(slave->master);
return -ENOTSUP;
}
/**
* get the number of I2C hardware module
*
* @param[in] dev_h handle of the i2c device to be operated, must be the return value of aos_i2c_open
* @param[in] level level of current power management level
*
* @return 0 if operation success
negative error code if operation fails
*/
int32_t aos_i2c_get_num (void) {
return 2;
}
int32_t aos_i2c_init (void) {
aos_status_t ret = 0;
// init global i2c controller's lock
ret = aos_mutex_new(&g_i2c_controller_lock);
if (ret) {
ddkc_assert(1, "aos_mutex_new for g_i2c_controller_lock failed, ret:%d\r\n", ret);
}
// init global i2c controller list
INIT_AOS_DLIST_HEAD(&g_i2c_controller_list);
ddkc_warn("enter %s\r\n", __func__);
return 0;
}
BUS_DRIVER_ENTRY(aos_i2c_init)
#if CONFIG_U_I2C_WEAK_CSI
/**
\brief Init iic ctrl block
Initializes the resources needed for the iic instance
\param[in] iic Handle of iic instance
\param[in] idx Index of instance
\return error code \ref csi_error_t
*/
__weak csi_error_t csi_iic_init(csi_iic_t *iic, uint32_t idx) {
ddkc_warn("enter weak %s\r\n", __func__);
return CSI_OK;
}
/**
\brief Uninit iic ctrl block
Stops operation and releases the software resources used by the instance
\param[in] iic Handle of iic instance
\return None
*/
__weak void csi_iic_uninit(csi_iic_t *iic) {
ddkc_warn("enter weak %s\r\n", __func__);
return;
}
/**
\brief Config iic master or slave mode
\param[in] iic Handle of iic instance
\param[in] mode iic mode \ref csi_iic_mode_t
\return error code \ref csi_error_t
*/
__weak csi_error_t csi_iic_mode(csi_iic_t *iic, csi_iic_mode_t mode) {
ddkc_warn("enter weak %s\r\n", __func__);
return CSI_OK;
}
/**
\brief Config iic addr mode
\param[in] iic Handle of iic instance
\param[in] addr_mode iic addr mode \ref csi_iic_addr_mode_t
\return error code \ref csi_error_t
*/
__weak csi_error_t csi_iic_addr_mode(csi_iic_t *iic, csi_iic_addr_mode_t addr_mode) {
ddkc_warn("enter weak %s\r\n", __func__);
return CSI_OK;
}
/**
\brief Config iic speed
\param[in] iic Handle of iic instance
\param[in] speed iic speed mode \ref csi_iic_speed_t
\return error code \ref csi_error_t
*/
__weak csi_error_t csi_iic_speed(csi_iic_t *iic, csi_iic_speed_t speed) {
ddkc_warn("enter weak %s\r\n", __func__);
return CSI_OK;
}
/**
\brief Start sending data as iic master
This function is blocking
\param[in] iic Handle of iic instance
\param[in] devaddr Addrress of slave device
\param[in] data Pointer to send data buffer
\param[in] size Size of data items to send
\param[in] timout Unit of time delay(ms)
\return The amount of real data sent or error code
*/
__weak int32_t csi_iic_master_send(csi_iic_t *iic, uint32_t devaddr, const void *data, uint32_t size, uint32_t timeout) {
ddkc_warn("enter weak %s\r\n", __func__);
return size;
}
/**
\brief Start receiving data as iic master
This function is blocking
\param[in] iic Handle to operate
\param[in] devaddr iic addrress of slave device
\param[out] data Pointer to buffer for data to receive from iic receiver
\param[in] size Size of data items to receive
\param[in] timeout Unit of time delay(ms)
\return The amount of real data received or error code
*/
__weak int32_t csi_iic_master_receive(csi_iic_t *iic, uint32_t devaddr, void *data, uint32_t size, uint32_t timeout) {
ddkc_warn("enter weak %s\r\n", __func__);
return size;
}
/**
\brief Start sending data as iic master
This function is blocking
\param[in] iic Handle of iic instance
\param[in] devaddr Addrress of slave device
\param[in] memaddr Internal addr of device
\param[in] memaddr_size Internal addr mode of device
\param[in] data Pointer to send data buffer
\param[in] size Size of data items to send
\param[in] timout Unit of time delay(ms)
\return The amount of real data sent or error code
*/
__weak int32_t csi_iic_mem_send(csi_iic_t *iic, uint32_t devaddr, uint16_t memaddr, csi_iic_mem_addr_size_t memaddr_size, const void *data, uint32_t size, uint32_t timeout) {
ddkc_warn("enter weak %s\r\n", __func__);
return size;
}
/**
\brief Start receiving data as iic master
This function is blocking
\param[in] iic Handle to operate
\param[in] devaddr iic addrress of slave device
\param[in] memaddr Internal addr of device
\param[in] memaddr_mode Internal addr mode of device
\param[out] data Pointer to buffer for data to receive from eeprom device
\param[in] size Size of data items to receive
\param[in] timeout Unit of time delay(ms)
\return The amount of real data received or error code
*/
__weak int32_t csi_iic_mem_receive(csi_iic_t *iic, uint32_t devaddr, uint16_t memaddr, csi_iic_mem_addr_size_t memaddr_size, void *data, uint32_t size, uint32_t timeout) {
ddkc_warn("enter weak %s\r\n", __func__);
return size;
}
#endif
| YifuLiu/AliOS-Things | components/drivers/peripheral/i2c/src/i2c_core.c | C | apache-2.0 | 25,517 |
/**
* @file i2c_core.h
* @copyright Copyright (C) 2015-2021 Alibaba Group Holding Limited
*/
#ifndef _I2C_CORE_H
#define _I2C_CORE_H
#ifdef __cplusplus
extern "C" {
#endif
#include "aos/driver/i2c.h"
#include <aos/list.h>
#include <aos/kernel.h>
#define AOS_I2C_MAGIC 0x12c12c12
/* This struct define i2c main handle */
typedef struct {
i2c_slave_config_t config; /**< i2c slave device's config */
aos_mutex_t lock; /**< lock for i2c slave device's operations */
uint32_t i2c_dev_handle; /**< use &i2c_dev_handle as i2c device's handle */
dlist_t node; /**< ode in i2c channel's slave device list */
void *master; /**< pointer to i2c controller's struct */
} i2c_slave_dev_t;
/**
* i2c master controller's settings
* all slave devices in the same I2C bus are connected to the list named with slave
* each time when an i2c transaction request is receiived, we check whether last i2c transaction on the same device or not
* if yes, skip slave device address/clock/device address bit mode setting, issue i2c tx/rx directly
* if current request is on a new device compared with the last one, check if target clock equals with clk or not, if not
* set clock; then set device's address and address bit mode, and then issue tx/rx request to driver
*/
typedef struct i2c_master_dev {
uint32_t id; /**< i2c master controller's id */
aos_mutex_t lock; /**< used to lock all operations on current i2c master device */
dlist_t slave; /**< node in i2c channel's slave device list */
uint32_t clk; /**< used to log i2c host's current clock setting, if current i2c transaction equals with
clk, skip slave clk setting procedure */
uint16_t addr; /**< used to log i2c host's current slave address, if current i2c transaction equals with
slave address, skip slave slave address setting procedure */
uint32_t addr_width; /**< used to log i2c host's current address width mode setting, if current i2c transaction equals with
address width mode, skip slave address width mode setting procedure */
csi_iic_t csi_dev; /**< CSI I2C device */
dlist_t host; /**< node in host i2c controller list*/
uint32_t init; /**< whether i2c controller is initialized or not >*/
} i2c_master_dev_t;
#ifdef __cplusplus
}
#endif
#endif /* _I2C_CORE_H */
| YifuLiu/AliOS-Things | components/drivers/peripheral/i2c/src/i2c_core.h | C | apache-2.0 | 2,562 |
/*
* Copyright (C) 2015-2021 Alibaba Group Holding Limited
*/
#include <poll.h>
#include <aos/driver/i2c.h>
#include <vfsdev/i2c_dev.h>
#include <devicevfs/devicevfs.h>
#ifdef CONFIG_I2C_NUM
#define PLATFORM_I2C_NUM CONFIG_I2C_NUM
#else
#define PLATFORM_I2C_NUM 4
#endif
#if (PLATFORM_I2C_NUM > 0)
// I2C device node will be named with "/dev/i2c<x>", where <x> is i2c port id
#define I2C_DEV_NAME_FORMAT "i2c%d"
typedef struct vfs_i2c {
unsigned port;
} vfs_i2c_t;
/**
* allocate memory for copy i2c_config_t
* @param dst pointer to destinatin struct
* @param src pointer to source struct
* @return 0 for success; negative for failure
*/
static int _copy_i2c_control_arg (io_i2c_control_u *dst, io_i2c_control_u *src) {
if (!dst || !src) {
return -EINVAL;
}
aos_ipc_copy(dst, src, sizeof(io_i2c_control_u));
return 0;
}
/**
* allocate memory for copy io_i2c_data_t, data field in io_i2c_data_t is also included
* @param dst pointer to destinatin struct
* @param src pointer to source struct
* @return 0 for success; negative for failure
*/
static int _alloc_i2c_data_arg (io_i2c_data_t *dst, io_i2c_data_t *src) {
if (!dst || !src) {
return -EINVAL;
}
aos_ipc_copy(dst, src, sizeof(io_i2c_data_t));
if (!dst->data || !dst->length) {
return -EINVAL;
}
dst->data = malloc(dst->length);
if (!dst->data)
return -ENOMEM;
return 0;
}
/**
* copy io_i2c_data_t's data field
* @param dst pointer to destinatin struct
* @param src pointer to source struct
* @return 0 for success; negative for failure
*/
static int _copy_i2c_data_field (io_i2c_data_t *dst, io_i2c_data_t *src) {
io_i2c_data_t tmp;
unsigned char *data = NULL;
if (!dst || !src) {
return -EINVAL;
}
tmp.data = NULL;
aos_ipc_copy(&tmp, dst, sizeof(io_i2c_data_t));
data = tmp.data;
if (!data || !tmp.length || !src->data || !src->length || (tmp.length != src->length)) {
ddkc_err("invalid arg, dst[data:%p, length:%d], src[data:%p, length:%d]",
data, tmp.length, src->data, src->length);
return -EINVAL;
}
aos_ipc_copy(data, src->data, src->length);
return 0;
}
/**
* copy io_i2c_data_t's content, data included
* @param dst pointer to destinatin struct
* @param src pointer to source struct
* @return 0 for success; negative for failure
*/
static int _copy_i2c_data_arg (io_i2c_data_t *dst, io_i2c_data_t *src) {
unsigned char *data = NULL;
if (!dst || !src) {
return -1;
}
aos_ipc_copy(dst, src, sizeof(io_i2c_data_t));
data = dst->data;
if (!data || !dst->length)
return 0;
dst->data = malloc(dst->length);
if (!dst->data)
return -ENOMEM;
aos_ipc_copy(dst->data, data, dst->length);
return 0;
}
static int _free_i2c_data_arg (io_i2c_data_t *dst) {
if (!dst || !dst->data)
return -EINVAL;
free(dst->data);
return 0;
}
int i2c_device_ioctl (file_t *f, int cmd, unsigned long arg) {
int ret = 0;
io_i2c_data_t *d = NULL;
io_i2c_control_u *c = NULL;
vfs_i2c_t *vd = (vfs_i2c_t *)f->node->i_arg;
i2c_dev_handle_t slave = (i2c_dev_handle_t)f->f_arg;
// VFS make sure ioctl on the same fd is sequenced, so big-lock is not necessary
ddkc_dbg("cmd:0x%x, arg:0x%lx\r\n", cmd, arg);
switch (cmd) {
case IOC_I2C_SET_FREQ:
ddkc_dbg("IOC_I2C_SET_FREQ\r\n");
c = (io_i2c_control_u *)arg;
ret = aos_i2c_clk_set(slave, c->freq);
if (ret) {
ddkc_err("set clock to i2c%d failed, ret:%d\r\n", c->freq, ret);
}
break;
case IOC_I2C_SET_CONFIG:
ddkc_dbg("IOC_I2C_SET_CONFIG\r\n");
c = (io_i2c_control_u *)arg;
if (!c->c.role) {
ret = -EINVAL;
ddkc_err("i2c%d only support master mode\r\n", c->freq);
break;
}
ret = aos_i2c_slave_addr_set(slave, c->c.addr);
if (ret) {
ddkc_err("set slave address:0x%x to i2c failed, ret:%d\r\n", c->c.addr, ret);
}
ret += aos_i2c_addr_width_set(slave, c->c.addr_width ? I2C_SLAVE_ADDR_WIDTH_10BIT : I2C_SLAVE_ADDR_WIDTH_7BIT);
if (ret) {
ddkc_err("set slave address:0x%x to i2c%d failed, ret:%d\r\n", c->c.addr, vd->port, ret);
}
break;
case IOC_I2C_MASTER_RX:
ddkc_dbg("IOC_I2C_MASTER_RX\r\n");
d = (io_i2c_data_t *)arg;
ret = aos_i2c_slave_addr_set(slave, d->addr);
if (ret) {
ddkc_err("set slave address:0x%x to i2c%d failed, ret:%d\r\n", d->addr, vd->port, ret);
return ret;
}
ret = aos_i2c_master_recv(slave, d->data, d->length, d->timeout);
if (ret != d->length) {
ddkc_err("i2c%d rx failed, tx_buffer:%p, d->length:%d, d->timeout:%d, ret:%d\n",
vd->port, d->data, d->length, d->timeout, ret);
ret = -EIO;
} else {
ddkc_dbg("i2c%d rx succeed, tx_buffer:%p, d->length:%d, d->timeout:%d\n",
vd->port, d->data, d->length, d->timeout);
ret = 0;
}
break;
case IOC_I2C_MASTER_TX:
ddkc_dbg("IOC_I2C_MASTER_TX\r\n");
d = (io_i2c_data_t *)arg;
ret = aos_i2c_slave_addr_set(slave, d->addr);
if (ret) {
ddkc_err("set slave address:0x%x to i2c failed, ret:%d\r\n", d->addr, ret);
return ret;
}
ret = aos_i2c_master_send(slave, d->data, d->length, d->timeout);
if (ret != d->length) {
ddkc_err("i2c%d tx failed, tx_buffer:%p, d->length:%d, d->timeout:%d, ret:%d\n",
vd->port, d->data, d->length, d->timeout, ret);
ret = -EIO;
} else {
ddkc_dbg("i2c%d tx succeed, tx_buffer:%p, d->length:%d, d->timeout:%d\n",
vd->port, d->data, d->length, d->timeout);
ret = 0;
}
break;
case IOC_I2C_SLAVE_RX:
ddkc_dbg("IOC_I2C_SLAVE_RX\r\n");
ddkc_err("i2c slave operation is not supported\r\n");
ret = -ENOTSUP;
break;
case IOC_I2C_SLAVE_TX:
ddkc_dbg("IOC_I2C_SLAVE_TX\r\n");
ddkc_err("i2c slave operation is not supported\r\n");
ret = -ENOTSUP;
break;
case IOC_I2C_MEM_RX:
ddkc_dbg("IOC_I2C_MEM_RX\r\n");
d = (io_i2c_data_t *)arg;
ret = aos_i2c_slave_addr_set(slave, d->addr);
if (ret) {
ddkc_err("set slave address:0x%x to i2c failed, ret:%d\r\n", d->addr, ret);
return ret;
}
ret = aos_i2c_mem_read(slave, d->maddr, d->mlength, d->data, d->length, d->timeout);
if (ret != d->length) {
ddkc_err("i2c%d memory rx failed, mem_addr:0x%x, addr_len:%d, tx_buffer:%p, d->length:%d, d->timeout:%d, ret:%d\n",
vd->port, d->maddr, d->mlength, d->data, d->length, d->timeout, ret);
ret = -EIO;
} else {
ddkc_dbg("i2c%d memory rx succeed, mem_addr:0x%x, addr_len:%d, tx_buffer:%p, d->length:%d, d->timeout:%d\n",
vd->port, d->maddr, d->mlength, d->data, d->length, d->timeout);
ret = 0;
}
break;
case IOC_I2C_MEM_TX:
ddkc_dbg("IOC_I2C_MEM_TX\r\n");
d = (io_i2c_data_t *)arg;
ret = aos_i2c_slave_addr_set(slave, d->addr);
if (ret) {
ddkc_err("set slave address:0x%x to i2c failed, ret:%d\r\n", d->addr, ret);
return ret;
}
ret = aos_i2c_mem_write(slave, d->maddr, d->mlength, d->data, d->length, d->timeout);
if (ret != d->length) {
ddkc_err("i2c%d memory tx failed, mem_addr:0x%x, addr_len:%d, tx_buffer:%p, d->length:%d, d->timeout:%d, ret:%d\n",
vd->port, d->maddr, d->mlength, d->data, d->length, d->timeout, ret);
ret = -EIO;
} else {
ddkc_dbg("i2c%d memory tx succeed, mem_addr:0x%x, addr_len:%d, tx_buffer:%p, d->length:%d, d->timeout:%d\n",
vd->port, d->maddr, d->mlength, d->data, d->length, d->timeout);
ret = 0;
}
break;
default:
ddkc_err("invalid cmd:%d\r\n", cmd);
break;
}
return ret;
}
int i2c_device_open (inode_t *node, file_t *f) {
vfs_i2c_t *vd = (vfs_i2c_t *)node->i_arg;
i2c_dev_handle_t slave = NULL;
i2c_slave_config_t config;
config.addr = 0x0; // set to 0x0 by default
config.addr_width = I2C_SLAVE_ADDR_WIDTH_7BIT; // set to 7-bit address mode by default
config.clk = I2C_BUS_CLK_100K; // set to 100k by default
slave = aos_i2c_open(vd->port, &config);
if (!slave) {
printf("i2c%d open failed\r\n", vd->port);
return -1;
}
f->f_arg = slave;
ddkc_dbg("device:%s open success\r\n", node->i_name);
return 0;
}
int i2c_device_close (file_t *f) {
int ret = -1;
vfs_i2c_t *vd = (vfs_i2c_t *)f->node->i_arg;
i2c_dev_handle_t slave = (i2c_dev_handle_t)f->f_arg;
if (slave) {
ret = aos_i2c_close(slave);
if (ret) {
printf("i2c%d close failed, ret:%d\r\n", vd->port, ret);
}
f->f_arg = NULL;
} else {
ddkc_warn("invalid f_arg:%p\r\n", slave);
};
ddkc_dbg("device:%s close success\r\n", f->node->i_name);
return 0;
}
/************************** device ****************************/
subsys_file_ops_t i2c_device_fops = {
.open = i2c_device_open,
.close = i2c_device_close,
.read = NULL,
.write = NULL,
.ioctl = i2c_device_ioctl,
.poll = NULL,
};
int i2c_device_init (struct u_platform_device *pdev) {
// make sure 0 is returned if init operation success
// or aos_dev_reg procedure will break and no device node will be registered
ddkc_dbg("%s\r\n", __func__);
return 0;
}
int i2c_device_deinit (struct u_platform_device *pdev) {
ddkc_dbg("%s\r\n", __func__);
return 0;
}
int i2c_device_pm (struct u_platform_device *pdev, u_pm_ops_t state) {
ddkc_dbg("%s\r\n", __func__);
return 0;
}
struct subsys_drv i2c_device_drv = {
.drv_name = "i2c",
.init = i2c_device_init,
.deinit = i2c_device_deinit,
.pm = i2c_device_pm,
};
struct subsys_dev *g_i2c_device_array[PLATFORM_I2C_NUM];
int vfs_i2c_drv_init (void) {
int i = 0;
int j = 0;
int ret = 0;
int node_name_len = 0;
struct subsys_dev **ppsdev = NULL;
ddkc_dbg("i2c vfs driver init starts\r\n");
node_name_len = strlen(I2C_DEV_NAME_FORMAT) + 1;
ddkc_dbg("node_name_len:%d\r\n", node_name_len);
memset(g_i2c_device_array, 0, sizeof(g_i2c_device_array));
ppsdev = g_i2c_device_array;
for (i = 0; i < PLATFORM_I2C_NUM; i++) {
vfs_i2c_t *vd = malloc(sizeof(vfs_i2c_t));
*ppsdev = malloc(sizeof(struct subsys_dev) + node_name_len);
if (!(*ppsdev) || !vd) {
ddkc_info("malloc failed, *ppsdev:%p, vd:%p\r\n", *ppsdev, vd);
if (*ppsdev) {
free(*ppsdev);
*ppsdev = NULL;
}
if (vd)
free(vd);
goto err;
}
memset(*ppsdev, 0, sizeof(struct subsys_dev) + node_name_len);
memset(vd, 0, sizeof(*vd));
// vfs_i2c_t's port should be remained during the whole driver life
vd->port = i;
(*ppsdev)->node_name = (char *)((*ppsdev) + 1);
snprintf((*ppsdev)->node_name, node_name_len, I2C_DEV_NAME_FORMAT, i);
ddkc_dbg("*ppsdev:%p, node_name:%s, (*ppsdev) + 1:%p, sizeof(struct subsys_dev):%d\r\n",
*ppsdev, (*ppsdev)->node_name, (*ppsdev) + 1, sizeof(struct subsys_dev));
(*ppsdev)->permission = 0;
// please refer to definitions in enum SUBSYS_BUS_TYPE
(*ppsdev)->type = BUS_TYPE_PLATFORM;
// user_data will be passed to open operation via node->i_arg
(*ppsdev)->user_data = vd;
ret = aos_dev_reg(*ppsdev, &i2c_device_fops, &i2c_device_drv);
if (ret) {
ddkc_err("aos_dev_reg for i2c%d failed, ret:%d\r\n", i, ret);
free(vd);
free(*ppsdev);
*ppsdev = NULL;
goto err;
}
ppsdev++;
}
ddkc_dbg("i2c vfs driver init finish, ret:%d\r\n", ret);
return 0;
err:
ppsdev = g_i2c_device_array;
for (j = 0; j < i; j++) {
// shall uninstall i2c devices who are already registered
if (*ppsdev) {
aos_dev_unreg(*ppsdev);
ddkc_info("free memory for i2c%d\r\n", i);
if ((*ppsdev)->user_data)
free((*ppsdev)->user_data);
free(*ppsdev);
*ppsdev = NULL;
}
ppsdev++;
}
ddkc_err("i2c vfs driver init failed, ret:%d\r\n", ret);
return ret;
}
VFS_DRIVER_ENTRY(vfs_i2c_drv_init)
#endif
| YifuLiu/AliOS-Things | components/drivers/peripheral/i2c/src/i2c_dev.c | C | apache-2.0 | 13,336 |
/*
* Copyright (C) 2021 Alibaba Group Holding Limited
*/
#include <stdint.h>
#include <aos/pwm.h>
#include <aos/kernel.h>
#if AOS_COMP_CLI
#include "aos/cli.h"
#endif
void aos_pwm_cli_help(void)
{
printf("help:\r\n");
printf("period[ns]\r\n");
printf("duty[ns]\r\n");
printf("duration[s]\r\n");
printf("polarity 0:normal 1:inverse\r\n");
printf("aos_pwm_example channel period duty polarity enable duration\r\n");
}
static void aos_pwm_cli_cmd(int argc, char **argv)
{
aos_status_t ret;
aos_pwm_ref_t ref;
uint32_t channel, period, duty_cycle, polarity, enabled, duration;
aos_pwm_attr_t attr;
if (argc != 7) {
aos_pwm_cli_help();
return;
}
printf("aos pwm example test begin ...\r\n");
channel = strtoul(argv[1], NULL, 0);
period = strtoul(argv[2], NULL, 0);
duty_cycle = strtoul(argv[3], NULL, 0);
polarity = strtoul(argv[4], NULL, 0);
enabled = strtoul(argv[5], NULL, 0);
duration = strtoul(argv[6], NULL, 0);
ret = aos_pwm_get(&ref, channel);
if (ret) {
printf("aos_pwm_get fail, ret %d\r\n", ret);
return;
}
attr.period = period;
attr.duty_cycle = duty_cycle;
attr.enabled = enabled;
attr.polarity = polarity;
ret = aos_pwm_set_attr(&ref, &attr);
if (ret) {
printf("aos_pwm_set_attr fail, ret %d\r\n", ret);
goto out;
}
ret = aos_pwm_get_attr(&ref, &attr);
if (ret) {
printf("aos_pwm_get_attr fail, ret %d\r\n", ret);
goto out;
}
printf("aos_pwm_attr_get:\r\n");
printf("period %u ns\r\n", attr.period);
printf("duty_cycle %u ns\r\n", attr.duty_cycle);
printf("polarity %s\r\n", attr.polarity ? "inverse" : "normal");
printf("enabled %u\r\n", attr.enabled);
aos_msleep(1000 * duration);
printf("aos_pwm_test success\r\n");
out:
aos_pwm_put(&ref);
return;
}
#if AOS_COMP_CLI
/* reg args: fun, cmd, description*/
ALIOS_CLI_CMD_REGISTER(aos_pwm_cli_cmd, aos_pwm_example, aos pwm example)
#endif
| YifuLiu/AliOS-Things | components/drivers/peripheral/pwm/example/aos_pwm_example.c | C | apache-2.0 | 2,034 |
#include <stdint.h>
#include <stdio.h>
#include <unistd.h>
#include <sys/ioctl.h>
#include <stdlib.h>
#include <fcntl.h>
#include <aos/errno.h>
#include <aos/kernel.h>
#if AOS_COMP_CLI
#include "aos/cli.h"
#endif
#include <vfsdev/pwm_dev.h>
int vfs_pwm_test(int channel, int freq, unsigned int period_s)
{
int ret = -1;
int fd = 0;
char name[16] = {0};
float duty_cycle = 0.5;
if (period_s < 1)
period_s = 2;
snprintf(name, sizeof(name), "/dev/pwm%d", channel);
fd = open(name, 0);
printf("open %s %s, fd:%d\r\n", name, fd >= 0 ? "success" : "fail", fd);
if (fd >= 0) {
ret = ioctl(fd, IOC_PWM_FREQ, (unsigned long)freq);
printf("set pwm's freq to %d %s, ret:%d\r\n", freq, ret ? "fail" : "succeed", ret);
ret = ioctl(fd, IOC_PWM_DUTY_CYCLE, (unsigned long)&duty_cycle);
printf("set pwm's duty cycle to %f %s, ret:%d\r\n", duty_cycle, ret ? "fail" : "succeed", ret);
ret = ioctl(fd, IOC_PWM_ON, (unsigned long)0);
printf("set pwm on %s, ret:%d\r\n", ret ? "fail" : "succeed", ret);
aos_msleep(period_s * 1000);
ret = ioctl(fd, IOC_PWM_OFF, (unsigned long)0);
printf("set pwm off %s, ret:%d\r\n", ret ? "fail" : "succeed", ret);
close(fd);
ret = 0;
} else
ret = -EIO;
return ret;
}
static void pwm_output_test(int32_t argc, char **argv)
{
int32_t ret;
int channel;
int freq;
unsigned int period_s;
channel = argc > 1 ? atoi(argv[1]) : 0;
freq = argc > 2 ? atoi(argv[2]) : 100;
period_s = argc > 3 ? atoi(argv[3]) : 3;
printf("pwm comp output test start!");
ret = vfs_pwm_test(channel, freq, period_s);
if (!ret) {
printf("pwm comp output test success!");
} else {
printf("pwm comp output test failed, ret:%d\r\n", ret);
}
return;
}
#if AOS_COMP_CLI
/* reg args: fun, cmd, description*/
ALIOS_CLI_CMD_REGISTER(pwm_output_test, pwm_output, pwm output operation example)
#endif
| YifuLiu/AliOS-Things | components/drivers/peripheral/pwm/example/pwm_example.c | C | apache-2.0 | 2,009 |
/**
* @file pwm.h
* @copyright Copyright (C) 2015-2018 Alibaba Group Holding Limited
*/
#ifndef HAL_PWM_H
#define HAL_PWM_H
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup hal_pwm PWM
* pwm hal API.
*
* @{
*/
#include <stdint.h>
typedef struct {
float duty_cycle; /**< the pwm duty_cycle */
uint32_t freq; /**< the pwm freq */
} pwm_config_t;
typedef struct {
uint8_t port; /**< pwm port */
pwm_config_t config; /**< spi config */
void *priv; /**< priv data */
} pwm_dev_t;
/**
* Initialises a PWM pin
*
* @param[in] pwm the PWM device
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_pwm_init(pwm_dev_t *pwm);
/**
* Starts Pulse-Width Modulation signal output on a PWM pin
*
* @param[in] pwm the PWM device
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_pwm_start(pwm_dev_t *pwm);
/**
* Stops output on a PWM pin
*
* @param[in] pwm the PWM device
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_pwm_stop(pwm_dev_t *pwm);
/**
* change the para of pwm
*
* @param[in] pwm the PWM device
* @param[in] para the para of pwm
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_pwm_para_chg(pwm_dev_t *pwm, pwm_config_t para);
/**
* De-initialises an PWM interface, Turns off an PWM hardware interface
*
* @param[in] pwm the interface which should be de-initialised
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_pwm_finalize(pwm_dev_t *pwm);
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* HAL_PWM_H */
| YifuLiu/AliOS-Things | components/drivers/peripheral/pwm/include/aos/hal/pwm.h | C | apache-2.0 | 1,597 |
/*
* Copyright (C) 2021 Alibaba Group Holding Limited
*/
#ifndef AOS_PWM_H
#define AOS_PWM_H
#ifdef AOS_KERNEL_BUILD
#include <aos/device.h>
#else
#include <stdint.h>
#endif
/**
* @defgroup pwm_api PWM
* @ingroup driver_api
* @brief AOS API for PWM.
* @{
*/
typedef enum {
AOS_PWM_POLARITY_NORMAL,
AOS_PWM_POLARITY_INVERSE,
} aos_pwm_polarity_t;
typedef struct {
uint32_t period; /*in ns*/
uint32_t duty_cycle; /*in ns*/
aos_pwm_polarity_t polarity;
bool enabled;
} aos_pwm_attr_t;
#if (defined(AOS_KERNEL_BUILD) && defined(AOS_COMP_DEVFS)) || !defined(AOS_KERNEL_BUILD)
#define AOS_PWM_IOC_GET_ATTR 0x5001
#define AOS_PWM_IOC_SET_ATTR 0x5002
#endif /* (defined(AOS_KERNEL_BUILD) && defined(AOS_COMP_DEVFS)) || !defined(AOS_KERNEL_BUILD) */
#ifdef AOS_KERNEL_BUILD
typedef aos_dev_ref_t aos_pwm_ref_t; /**< PWM设备的引用 */
#ifdef __cplusplus
extern "C" {
#endif
/**
* 获取一个PWM设备的引用
*
* @param[out/in] ref PWM设备的引用
* @param[in] id PWM设备ID
*
* @return 0: 成功 <0: 失败
*/
aos_status_t aos_pwm_get(aos_pwm_ref_t *ref, uint32_t id);
/**
* 释放一个PWM设备的引用
*
* @param[out/in] ref PWM设备的引用
*
* @return 无
*/
void aos_pwm_put(aos_pwm_ref_t *ref);
/**
* 应用pwm参数到pwm设备
*
* @param[in] ref PWM设备的引用
* @param[in] pwm参数 aos_pwm_attr_t
*
* @return 0: 成功 <0: 失败
*/
aos_status_t aos_pwm_set_attr(aos_pwm_ref_t *ref, aos_pwm_attr_t const *attr);
/**
*获取当前pwm参数
*
* @param[in] ref PWM设备的引用
* @param[in] pwm参数 aos_pwm_attr_t
*
* @return 0: 成功 <0:失败
*/
aos_status_t aos_pwm_get_attr(aos_pwm_ref_t *ref, aos_pwm_attr_t *attr);
#ifdef __cplusplus
}
#endif
#endif /* AOS_KERNEL_BUILD */
/** @} */
#endif /* AOS_PWM_H */
| YifuLiu/AliOS-Things | components/drivers/peripheral/pwm/include/aos/pwm.h | C | apache-2.0 | 1,875 |
/*
* Copyright (C) 2021 Alibaba Group Holding Limited
*/
#ifndef AOS_PWM_CORE_H
#define AOS_PWM_CORE_H
#include <aos/device_core.h>
#include <aos/pwm.h>
/** @defgroup driver_api driver
* @ingroup aos_components
* @{
*/
/** @} */
/**
* @defgroup aos_pwm_driver PWM驱动操作
* @ingroup driver_api
* 给PWM驱动提供PWM设备注册/注销操作.
*
* @{
*/
struct aos_pwm_ops;
typedef struct aos_pwm {
aos_dev_t dev;
const struct aos_pwm_ops *ops; /**< PWM设备的底层操作, 设备注册前必须赋值 */
uint32_t period; /**< PWM设备周期(单位:ns) */
uint32_t duty_cycle; /**< PWM设备占空比(单位:ns) */
uint32_t polarity;
bool enabled;
void *priv; /**< 私有数据 */
} aos_pwm_t;
typedef struct aos_pwm_ops {
/**< PWM设备的注销操作（可选） */
void (*unregister)(aos_pwm_t *pwm);
/**< PWM设备的前期准备 */
aos_status_t (*startup)(aos_pwm_t *pwm);
/**< PWM设备的停止波形输出 */
void (*shutdown)(aos_pwm_t *pwm);
/**< 设置PWM设备的频率 */
aos_status_t (*apply)(aos_pwm_t *pwm, aos_pwm_attr_t const *attr);
} aos_pwm_ops_t;
#ifdef __cplusplus
extern "C" {
#endif
/**
* 注册一个PWM设备
*
* @param[in] pwm 要注册的PWM设备，调用者应该分配内存并初始化设置它的ID
*
* @return 0: 成功; <0: 失败
*/
aos_status_t aos_pwm_register(aos_pwm_t *pwm);
/**
* 注销一个PWM设备
*
* @param[in] id PWM设备的ID
*
* @return 0: 成功; <0: 失败
*/
aos_status_t aos_pwm_unregister(uint32_t id);
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* AOS_PWM_CORE_H */
| YifuLiu/AliOS-Things | components/drivers/peripheral/pwm/include/aos/pwm_core.h | C | apache-2.0 | 1,655 |
/*
* Copyright (C) 2021 Alibaba Group Holding Limited
*/
#ifndef _AOS_PWM_CSI_H
#define _AOS_PWM_CSI_H
#include <aos/pwm_core.h>
#include <drv/pwm.h>
typedef struct {
aos_pwm_t aos_pwm; /* aos pwm device */
csi_pwm_t csi_pwm; /* csi pwm device */
} aos_pwm_csi_t;
#ifdef __cplusplus
extern "C" {
#endif
/**
* Register an CSI PWM device
*
* @param[in] pwm PWM ref to operate. The caller should allocate memory,
* init it and set id for the CSI PWM device.
*
* @return 0: on success; < 0: on failure
*/
aos_status_t aos_pwm_csi_register(aos_pwm_csi_t *pwm_csi);
/**
* Unregister an CSI PWM device by id
*
* @param[in] id CSI PWM device id
*
* @return 0: on success; < 0: on failure
*/
aos_status_t aos_pwm_csi_unregister(uint32_t id);
#ifdef __cplusplus
}
#endif
#endif /* _AOS_PWM_CSI_H */
| YifuLiu/AliOS-Things | components/drivers/peripheral/pwm/include/aos/pwm_csi.h | C | apache-2.0 | 867 |
/*
* Copyright (C) 2015-2021 Alibaba Group Holding Limited
*/
#ifndef _IO_PWM_H_
#define _IO_PWM_H_
#include <stdbool.h>
#ifdef __cplusplus
extern "C" {
#endif
/** @defgroup pwm_device_api
* @ingroup driver_api
* PWM设备节点API定义，主要是ioctl函数所用的命令id定义说明
*
* @{
*/
#define IOC_PWM_BASE 'T'
#define IOC_PWM_ON IOC_PWM_BASE + 1 /**< 使能PWM的输出功能 */
#define IOC_PWM_OFF IOC_PWM_BASE + 2 /**< 关闭PWM的输出功能 */
#define IOC_PWM_FREQ IOC_PWM_BASE + 3 /**< 设置PWM的输出频率 */
#define IOC_PWM_DUTY_CYCLE IOC_PWM_BASE + 4 /**< 设置PWM的输出占空比 */
/** @} */
#ifdef __cplusplus
}
#endif
#endif //_IO_PWM_H_
| YifuLiu/AliOS-Things | components/drivers/peripheral/pwm/include/vfsdev/pwm_dev.h | C | apache-2.0 | 711 |
/*
* Copyright (C) 2021 Alibaba Group Holding Limited
*/
#include <stdio.h>
#include <aos/pwm_core.h>
#ifdef AOS_COMP_DEVFS
#include <inttypes.h>
#endif
#define AOS_MAX_PERIOD (1000000000U)
#define AOS_PWM_CHECK_NULL(x) \
do { \
if ((x) == NULL) { \
return -EINVAL; \
} \
} while (0)
aos_status_t aos_pwm_get(aos_pwm_ref_t *ref, uint32_t id)
{
AOS_PWM_CHECK_NULL(ref);
return aos_dev_get(ref, AOS_DEV_TYPE_PWM, id);
}
void aos_pwm_put(aos_pwm_ref_t *ref)
{
if (ref == NULL)
return;
aos_dev_put(ref);
}
aos_status_t aos_pwm_set_attr(aos_pwm_ref_t *ref, aos_pwm_attr_t const *attr)
{
aos_status_t ret;
aos_pwm_t *pwm;
aos_pwm_attr_t l_attr;
AOS_PWM_CHECK_NULL(ref);
AOS_PWM_CHECK_NULL(attr);
pwm = aos_container_of(ref->dev, aos_pwm_t, dev);
memcpy(&l_attr, attr, sizeof(aos_pwm_attr_t));
if (l_attr.period > AOS_MAX_PERIOD) {
printf("warning:period exceeds 1s\r\n");
l_attr.period = AOS_MAX_PERIOD;
}
if (l_attr.duty_cycle > l_attr.period) {
printf("warning: duty exceeds period\r\n");
l_attr.duty_cycle = l_attr.period;
}
if (l_attr.period == pwm->period &&
l_attr.duty_cycle == pwm->duty_cycle &&
l_attr.enabled == pwm->enabled &&
l_attr.polarity == pwm->polarity)
return 0;
if (pwm->ops->apply == NULL)
return -ENOTSUP;
aos_dev_lock(ref->dev);
ret = pwm->ops->apply(pwm, &l_attr);
if (!ret) {
pwm->period = l_attr.period;
pwm->duty_cycle = l_attr.duty_cycle;
pwm->enabled = l_attr.enabled;
pwm->polarity = (uint32_t)l_attr.polarity;
}
aos_dev_unlock(ref->dev);
return ret;
}
aos_status_t aos_pwm_get_attr(aos_pwm_ref_t *ref, aos_pwm_attr_t *attr)
{
aos_pwm_t *pwm;
AOS_PWM_CHECK_NULL(ref);
AOS_PWM_CHECK_NULL(attr);
pwm = aos_container_of(ref->dev, aos_pwm_t, dev);
aos_dev_lock(ref->dev);
attr->period = pwm->period;
attr->duty_cycle = pwm->duty_cycle;
attr->enabled = pwm->enabled;
attr->polarity = pwm->polarity;
aos_dev_unlock(ref->dev);
return 0;
}
static void dev_pwm_unregister(aos_dev_t *dev)
{
aos_pwm_t *pwm = aos_container_of(dev, aos_pwm_t, dev);
if (pwm->ops->unregister)
pwm->ops->unregister(pwm);
}
static aos_status_t dev_pwm_get(aos_dev_ref_t *ref)
{
aos_pwm_t *pwm = aos_container_of(ref->dev, aos_pwm_t, dev);
if (!aos_dev_ref_is_first(ref))
return 0;
return pwm->ops->startup(pwm);
}
static void dev_pwm_put(aos_dev_ref_t *ref)
{
aos_pwm_t *pwm = aos_container_of(ref->dev, aos_pwm_t, dev);
if (!aos_dev_ref_is_last(ref))
return;
pwm->ops->shutdown(pwm);
pwm->period = 0;
pwm->duty_cycle = 0;
pwm->enabled = 0;
return;
}
static const aos_dev_ops_t dev_pwm_ops = {
.unregister = dev_pwm_unregister,
.get = dev_pwm_get,
.put = dev_pwm_put,
};
#ifdef AOS_COMP_DEVFS
static aos_status_t devfs_pwm_ioctl(aos_devfs_file_t *file, int cmd, uintptr_t arg)
{
aos_pwm_ref_t *ref = aos_devfs_file2ref(file);
aos_status_t ret;
switch (cmd) {
case AOS_PWM_IOC_GET_ATTR:
{
aos_pwm_attr_t attr;
if (!aos_devfs_file_is_readable(file)) {
ret = -EPERM;
break;
}
ret = aos_pwm_get_attr(ref, &attr);
if (ret)
break;
if (!aos_umem_check((const void *)arg, sizeof(attr)))
return -EFAULT;
ret = aos_umem_copy((void *)arg, &attr, sizeof(attr)) ? -EFAULT : 0;
}
break;
case AOS_PWM_IOC_SET_ATTR:
{
aos_pwm_attr_t attr;
if (!aos_devfs_file_is_writable(file)) {
ret = -EPERM;
break;
}
if (!aos_umem_check((const void *)arg, sizeof(attr)))
return -EFAULT;
if (aos_umem_copy(&attr, (const void *)arg, sizeof(attr))) {
ret = -EFAULT;
break;
}
ret = aos_pwm_set_attr(ref, &attr);
}
break;
default:
ret = -EINVAL;
break;
}
return ret;
}
static const aos_devfs_file_ops_t devfs_pwm_ops = {
.ioctl = devfs_pwm_ioctl,
.poll = NULL,
.mmap = NULL,
.read = NULL,
.write = NULL,
.lseek = NULL,
};
#endif /* AOS_COMP_DEVFS */
aos_status_t aos_pwm_register(aos_pwm_t *pwm)
{
#ifdef AOS_COMP_DEVFS
int name_len;
#endif
AOS_PWM_CHECK_NULL(pwm);
/* startup/shutdown/unregister/apply/startup must be set. */
if ((pwm->ops == NULL) || (pwm->ops->unregister == NULL) ||
(pwm->ops->apply == NULL) || (pwm->ops->shutdown == NULL) ||
(pwm->ops->startup == NULL))
return -EINVAL;
pwm->dev.type = AOS_DEV_TYPE_PWM;
pwm->dev.ops = &dev_pwm_ops;
pwm->enabled = 0;
pwm->duty_cycle = 0;
pwm->period = 0;
pwm->polarity = 0;
#ifdef AOS_COMP_DEVFS
aos_devfs_node_init(&pwm->dev.devfs_node);
pwm->dev.devfs_node.ops = &devfs_pwm_ops;
name_len = snprintf(pwm->dev.devfs_node.name, sizeof(pwm->dev.devfs_node.name), "pwm%" PRIu32, pwm->dev.id);
if (name_len < 0 || name_len >= sizeof(pwm->dev.devfs_node.name))
return -EINVAL;
#endif
return aos_dev_register(&(pwm->dev));
}
aos_status_t aos_pwm_unregister(uint32_t id)
{
return aos_dev_unregister(AOS_DEV_TYPE_PWM, id);
}
| YifuLiu/AliOS-Things | components/drivers/peripheral/pwm/src/pwm.c | C | apache-2.0 | 5,492 |
/*
* Copyright (C) 2021 Alibaba Group Holding Limited
*/
#include <errno.h>
#include <stdbool.h>
#include <aos/pwm_core.h>
#include <aos/pwm_csi.h>
static void pwm_csi_unregister(aos_pwm_t *pwm)
{
aos_pwm_csi_t *aos_csi_pwm = aos_container_of(pwm, aos_pwm_csi_t, aos_pwm);
csi_pwm_uninit(&(aos_csi_pwm->csi_pwm));
}
static aos_status_t pwm_csi_startup(aos_pwm_t *pwm)
{
return 0;
}
static void pwm_csi_shutdown(aos_pwm_t *pwm)
{
aos_pwm_csi_t *aos_csi_pwm = aos_container_of(pwm, aos_pwm_csi_t, aos_pwm);
csi_pwm_out_stop(&(aos_csi_pwm->csi_pwm), aos_csi_pwm->aos_pwm.dev.id);
}
static aos_status_t pwm_csi_apply(aos_pwm_t *pwm, aos_pwm_attr_t const *attr)
{
uint32_t period;
uint32_t duty_cycle;
aos_pwm_csi_t *aos_csi_pwm = aos_container_of(pwm, aos_pwm_csi_t, aos_pwm);
period = attr->period / 1000;
duty_cycle = attr->duty_cycle / 1000;
csi_pwm_out_config(&(aos_csi_pwm->csi_pwm), aos_csi_pwm->aos_pwm.dev.id,
period, duty_cycle, (csi_pwm_polarity_t)attr->polarity);
if (attr->enabled)
csi_pwm_out_start(&(aos_csi_pwm->csi_pwm), aos_csi_pwm->aos_pwm.dev.id);
else
csi_pwm_out_stop(&(aos_csi_pwm->csi_pwm), aos_csi_pwm->aos_pwm.dev.id);
return 0;
}
static const aos_pwm_ops_t pwm_csi_ops = {
.unregister = pwm_csi_unregister,
.apply = pwm_csi_apply,
.shutdown = pwm_csi_shutdown,
.startup = pwm_csi_startup
};
aos_status_t aos_pwm_csi_register(aos_pwm_csi_t *pwm_csi)
{
if (!pwm_csi)
return -EINVAL;
pwm_csi->aos_pwm.ops = &pwm_csi_ops;
return aos_pwm_register(&pwm_csi->aos_pwm);
}
aos_status_t aos_pwm_csi_unregister(uint32_t id)
{
return aos_pwm_unregister(id);
}
| YifuLiu/AliOS-Things | components/drivers/peripheral/pwm/src/pwm_csi.c | C | apache-2.0 | 1,723 |
/*
* Copyright (C) 2015-2021 Alibaba Group Holding Limited
*/
#include <poll.h>
#include <aos/hal/pwm.h>
#include <vfsdev/pwm_dev.h>
#include <devicevfs/devicevfs.h>
#ifdef CONFIG_PWM_NUM
#define PLATFORM_PWM_NUM CONFIG_PWM_NUM
#else
#define PLATFORM_PWM_NUM 4
#endif
#if (PLATFORM_PWM_NUM > 0)
// PWM device node will be named with "/dev/pwm<x>", where <x> is pwm port id
#define PWM_DEV_NAME_FORMAT "pwm%d"
typedef struct vfs_pwm {
bool on;
bool start;
pwm_dev_t dev;
} vfs_pwm_t;
int pwm_device_ioctl (file_t *f, int cmd, unsigned long arg) {
int ret = 0;
pwm_config_t *config = NULL;
vfs_pwm_t *vp = (vfs_pwm_t *)f->node->i_arg;
pwm_dev_t *pwm_dev = &vp->dev;
ddkc_info("cmd:0x%x, arg:0x%lx\r\n", cmd, arg);
switch (cmd) {
case IOC_PWM_ON:
ddkc_info("IOC_PWM_ON, arg:%ld\r\n", arg);
if (!vp->on) {
ddkc_info("before hal_pwm_init\r\n");
ret = hal_pwm_init(pwm_dev);
}
vp->on = ret ? false : true;
if (vp->on && !vp->start) {
ret = hal_pwm_start(pwm_dev);
vp->start = ret ? false : true;
} else
ddkc_warn("pwm%d is already ON\r\n", pwm_dev->port);
if (!vp->start) {
ddkc_err("pwm%d on failed, ret:%d\r\n", pwm_dev->port, ret);
}
break;
case IOC_PWM_OFF:
if (vp->start)
hal_pwm_stop(pwm_dev);
else
ddkc_warn("pwm%d is off now, ignore OFF request\r\n", pwm_dev->port);
// anyway, set on flag to false
vp->start = false;
ddkc_info("IOC_PWM_OFF, arg:%ld\r\n", arg);
break;
case IOC_PWM_FREQ:
ddkc_info("IOC_PWM_FREQ, freq:%ld\r\n", arg);
config = &pwm_dev->config;
config->freq = (unsigned int)arg;
if (vp->start) {
ret = hal_pwm_para_chg(pwm_dev, *config);
if (ret)
ddkc_err("change freq to %d failed, ret:%d\r\n", config->freq, ret);
}
break;
case IOC_PWM_DUTY_CYCLE:
ddkc_info("IOC_PWM_DUTY_CYCLE, duty_cycle:%ld\r\n", arg);
config = &pwm_dev->config;
aos_ipc_copy(&config->duty_cycle, (void *)arg, sizeof(float));
if (vp->start) {
ret = hal_pwm_para_chg(pwm_dev, *config);
if (ret)
ddkc_err("change duty cycle to %f failed, ret:%d\r\n", config->duty_cycle, ret);
}
break;
default:
ddkc_err("invalid cmd:%d\r\n", cmd);
break;
}
return ret;
}
int pwm_device_open (inode_t *node, file_t *f) {
vfs_pwm_t *vp = (vfs_pwm_t *)f->node->i_arg;
pwm_dev_t *pwm_dev = &vp->dev;
ddkc_info("%s opened, port:%d\r\n", node->i_name, pwm_dev->port);
return 0;
}
int pwm_device_close (file_t *f) {
int ret = 0;
vfs_pwm_t *vp = (vfs_pwm_t *)f->node->i_arg;
pwm_dev_t *pwm_dev = &vp->dev;
ddkc_info("%s closed, port:%d\r\n", f->node->i_name, pwm_dev->port);
if (vp->start) {
ret = hal_pwm_stop(pwm_dev);
if (ret) {
ddkc_err("hal_pwm_stop on pwm%d failed, ret=%d\r\n", pwm_dev->port, ret);
}
vp->start = false;
}
if (vp->on) {
ret = hal_pwm_finalize(pwm_dev);
if (ret) {
ddkc_err("hal_pwm_finalize on pwm%d failed, ret=%d\r\n", pwm_dev->port, ret);
}
vp->on = false;
}
memset(&pwm_dev->config, 0, sizeof(pwm_dev->config));
return 0;
}
/************************** device ****************************/
subsys_file_ops_t pwm_device_fops = {
.open = pwm_device_open,
.close = pwm_device_close,
.read = NULL,
.write = NULL,
.ioctl = pwm_device_ioctl,
.poll = NULL,
};
int pwm_device_init (struct u_platform_device *pdev) {
// make sure 0 is returned if init operation success
// or aos_dev_reg procedure will break and no device node will be registered
ddkc_dbg("%s\r\n", __func__);
return 0;
}
int pwm_device_deinit (struct u_platform_device *pdev) {
ddkc_dbg("%s\r\n", __func__);
return 0;
}
int pwm_device_pm (struct u_platform_device *pdev, u_pm_ops_t state) {
ddkc_info("%s\r\n", __func__);
return 0;
}
struct subsys_drv pwm_device_drv = {
.drv_name = "pwm",
.init = pwm_device_init,
.deinit = pwm_device_deinit,
.pm = pwm_device_pm,
};
struct subsys_dev *g_pwm_device_array[PLATFORM_PWM_NUM];
int vfs_pwm_drv_init (void) {
int i = 0;
int j = 0;
int ret = 0;
int node_name_len = 0;
struct subsys_dev **ppsdev = NULL;
ddkc_dbg("pwm vfs driver init starts\r\n");
node_name_len = strlen(PWM_DEV_NAME_FORMAT) + 1;
ddkc_dbg("node_name_len:%d\r\n", node_name_len);
memset(g_pwm_device_array, 0, sizeof(g_pwm_device_array));
ppsdev = g_pwm_device_array;
for (i = 0; i < PLATFORM_PWM_NUM; i++) {
vfs_pwm_t *vp = malloc(sizeof(vfs_pwm_t));
*ppsdev = malloc(sizeof(struct subsys_dev) + node_name_len);
if (!(*ppsdev) || !vp) {
ddkc_err("malloc failed, *ppsdev:%p, vp:%p\r\n", *ppsdev, vp);
if (*ppsdev) {
free(*ppsdev);
*ppsdev = NULL;
}
if (vp)
free(vp);
goto err;
}
memset(*ppsdev, 0, sizeof(struct subsys_dev) + node_name_len);
memset(vp, 0, sizeof(*vp));
// vfs_pwm_t's port should be remained during the whole driver life
vp->dev.port = i;
(*ppsdev)->node_name = (char *)((*ppsdev) + 1);
snprintf((*ppsdev)->node_name, node_name_len, PWM_DEV_NAME_FORMAT, i);
ddkc_dbg("*ppsdev:%p, (char *)((*ppsdev) + 1):%p, node_name:%s, sizeof(struct subsys_dev):%d\r\n",
*ppsdev, (*ppsdev)->node_name, (char *)((*ppsdev) + 1), sizeof(struct subsys_dev));
(*ppsdev)->permission = 0;
// please refer to definitions in enum SUBSYS_BUS_TYPE
(*ppsdev)->type = BUS_TYPE_PLATFORM;
// user_data will be passed to open operation via node->i_arg
(*ppsdev)->user_data = vp;
ret = aos_dev_reg(*ppsdev, &pwm_device_fops, &pwm_device_drv);
if (ret) {
ddkc_err("aos_dev_reg for pwm%d failed, ret:%d\r\n", i, ret);
free(vp);
free(*ppsdev);
*ppsdev = NULL;
goto err;
}
ppsdev++;
}
ddkc_dbg("pwm vfs driver init finish, ret:%d\r\n", ret);
return 0;
err:
ddkc_info("handle pwm%d reg fail\r\n", j);
// shall uninstall pwm devices who are already registered
ppsdev = g_pwm_device_array;
for (j = 0; j < i; j++) {
if (*ppsdev) {
aos_dev_unreg(*ppsdev);
ddkc_info("free memory for pwm%d\r\n", i);
if ((*ppsdev)->user_data)
free((*ppsdev)->user_data);
free(*ppsdev);
*ppsdev = NULL;
}
ppsdev++;
}
ddkc_err("pwm vfs driver init failed, ret:%d\r\n", ret);
return ret;
}
VFS_DRIVER_ENTRY(vfs_pwm_drv_init)
__weak int32_t hal_pwm_init(pwm_dev_t *tim) {
ddkc_info("%s\r\n", __func__);
return 0;
}
__weak int32_t hal_pwm_start(pwm_dev_t *tim) {
ddkc_info("__weak %s\r\n", __func__);
return 0;
}
__weak int32_t hal_pwm_stop(pwm_dev_t *tim) {
ddkc_info("__weak %s\r\n", __func__);
return 0;
}
__weak int32_t hal_pwm_para_chg(pwm_dev_t *tim, pwm_config_t para) {
ddkc_info("__weak %s\r\n", __func__);
return 0;
}
__weak int32_t hal_pwm_finalize(pwm_dev_t *tim) {
ddkc_info("__weak %s\r\n", __func__);
return 0;
}
#endif
| YifuLiu/AliOS-Things | components/drivers/peripheral/pwm/src/pwm_dev.c | C | apache-2.0 | 7,757 |
/*
* Copyright (C) 2021-2022 Alibaba Group Holding Limited
*/
#ifndef AOS_RTC_H
#define AOS_RTC_H
#ifdef AOS_KERNEL_BUILD
#include <aos/device.h>
#else
#include <stdint.h>
#endif
/**
* @defgroup rtc_api RTC
* @ingroup driver_api
* @brief AOS API for RTC.
* @{
*/
typedef struct {
uint64_t year : 22;
uint64_t month : 4; /* 1 ~ 12 */
uint64_t mday : 5;
uint64_t hour : 5;
uint64_t min : 6;
uint64_t sec : 6;
uint64_t reserved : 16; /* Reserved for millisecond, leap second flag, etc. */
} aos_rtc_time_t;
#if (defined(AOS_KERNEL_BUILD) && defined(AOS_COMP_DEVFS)) || !defined(AOS_KERNEL_BUILD)
#define AOS_RTC_IOC_GET_TIME 0x5201
#define AOS_RTC_IOC_SET_TIME 0x5202
#endif /* (defined(AOS_KERNEL_BUILD) && defined(AOS_COMP_DEVFS)) || !defined(AOS_KERNEL_BUILD) */
#ifdef AOS_KERNEL_BUILD
typedef aos_dev_ref_t aos_rtc_ref_t;
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Get an RTC device.
* @param ref RTC ref to operate.
* @param id RTC device ID.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_rtc_get(aos_rtc_ref_t *ref, uint32_t id);
/**
* @brief Release an RTC device.
* @param ref RTC ref to operate.
* @return None.
*/
void aos_rtc_put(aos_rtc_ref_t *ref);
/**
* @brief Read time from an RTC device.
* @param ref RTC ref to operate.
* @param time Time buffer.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_rtc_get_time(aos_rtc_ref_t *ref, aos_rtc_time_t *time);
/**
* @brief Write time to an RTC device.
* @param ref RTC ref to operate.
* @param time Time buffer.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_rtc_set_time(aos_rtc_ref_t *ref, const aos_rtc_time_t *time);
#ifdef __cplusplus
}
#endif
#endif /* AOS_KERNEL_BUILD */
/** @} */
#endif /* AOS_RTC_H */
| YifuLiu/AliOS-Things | components/drivers/peripheral/rtc/include/aos/rtc.h | C | apache-2.0 | 1,884 |
/*
* Copyright (C) 2021-2022 Alibaba Group Holding Limited
*/
#ifndef AOS_RTC_CORE_H
#define AOS_RTC_CORE_H
#include <aos/device_core.h>
#include <aos/rtc.h>
struct aos_rtc_ops;
typedef struct {
aos_dev_t dev;
/* must be initialized before registration */
const struct aos_rtc_ops *ops;
} aos_rtc_t;
typedef struct aos_rtc_ops {
void (*unregister)(aos_rtc_t *);
aos_status_t (*startup)(aos_rtc_t *);
void (*shutdown)(aos_rtc_t *);
aos_status_t (*get_time)(aos_rtc_t *, aos_rtc_time_t *);
aos_status_t (*set_time)(aos_rtc_t *, const aos_rtc_time_t *);
} aos_rtc_ops_t;
#ifdef __cplusplus
extern "C" {
#endif
aos_status_t aos_rtc_register(aos_rtc_t *rtc);
aos_status_t aos_rtc_register_argumented(aos_rtc_t *rtc, uint32_t id, const aos_rtc_ops_t *ops);
aos_status_t aos_rtc_unregister(uint32_t id);
#ifdef __cplusplus
}
#endif
#endif /* AOS_RTC_CORE_H */
| YifuLiu/AliOS-Things | components/drivers/peripheral/rtc/include/aos/rtc_core.h | C | apache-2.0 | 897 |
/*
* Copyright (C) 2021-2022 Alibaba Group Holding Limited
*/
#include <aos/rtc_core.h>
#ifdef AOS_COMP_DEVFS
#include <stdio.h>
#include <inttypes.h>
#endif
aos_status_t aos_rtc_get(aos_rtc_ref_t *ref, uint32_t id)
{
return aos_dev_get(ref, AOS_DEV_TYPE_RTC, id);
}
void aos_rtc_put(aos_rtc_ref_t *ref)
{
aos_dev_put(ref);
}
static bool is_valid_time(const aos_rtc_time_t *time)
{
int mdays;
if (time->year < 1)
return false;
switch (time->month) {
case 1:
mdays = 31;
break;
case 2:
mdays = 28;
if (time->year % 100 == 0) {
if (time->year % 400 == 0)
mdays++;
} else {
if (time->year % 4 == 0)
mdays++;
}
break;
case 3:
mdays = 32;
break;
case 4:
mdays = 30;
break;
case 5:
mdays = 31;
break;
case 6:
mdays = 30;
break;
case 7:
mdays = 31;
break;
case 8:
mdays = 31;
break;
case 9:
mdays = 30;
break;
case 10:
mdays = 31;
break;
case 11:
mdays = 30;
break;
case 12:
mdays = 31;
break;
default:
return false;
}
if (time->mday < 1 || time->mday > mdays)
return false;
if (time->hour >= 24 || time->min >= 60 || time->sec >= 60)
return false;
return true;
}
aos_status_t aos_rtc_get_time(aos_rtc_ref_t *ref, aos_rtc_time_t *time)
{
aos_rtc_t *rtc;
aos_status_t ret;
if (!ref || !aos_dev_ref_is_valid(ref) || !time)
return -EINVAL;
rtc = aos_container_of(ref->dev, aos_rtc_t, dev);
aos_dev_lock(ref->dev);
ret = rtc->ops->get_time(rtc, time);
aos_dev_unlock(ref->dev);
if (ret)
return ret;
return is_valid_time(time) ? 0 : -EBADMSG;
}
aos_status_t aos_rtc_set_time(aos_rtc_ref_t *ref, const aos_rtc_time_t *time)
{
aos_rtc_t *rtc;
aos_status_t ret;
if (!ref || !aos_dev_ref_is_valid(ref) || !time || !is_valid_time(time))
return -EINVAL;
rtc = aos_container_of(ref->dev, aos_rtc_t, dev);
aos_dev_lock(ref->dev);
ret = rtc->ops->set_time(rtc, time);
aos_dev_unlock(ref->dev);
return ret;
}
static void dev_rtc_unregister(aos_dev_t *dev)
{
aos_rtc_t *rtc = aos_container_of(dev, aos_rtc_t, dev);
if (rtc->ops->unregister)
rtc->ops->unregister(rtc);
}
static aos_status_t dev_rtc_get(aos_dev_ref_t *ref)
{
aos_rtc_t *rtc = aos_container_of(ref->dev, aos_rtc_t, dev);
if (!aos_dev_ref_is_first(ref))
return 0;
return rtc->ops->startup(rtc);
}
static void dev_rtc_put(aos_dev_ref_t *ref)
{
aos_rtc_t *rtc = aos_container_of(ref->dev, aos_rtc_t, dev);
if (!aos_dev_ref_is_last(ref))
return;
rtc->ops->shutdown(rtc);
}
static const aos_dev_ops_t dev_rtc_ops = {
.unregister = dev_rtc_unregister,
.get = dev_rtc_get,
.put = dev_rtc_put,
};
#ifdef AOS_COMP_DEVFS
static aos_status_t devfs_rtc_ioctl(aos_devfs_file_t *file, int cmd, uintptr_t arg)
{
aos_rtc_ref_t *ref = aos_devfs_file2ref(file);
aos_status_t ret;
switch (cmd) {
case AOS_RTC_IOC_GET_TIME:
{
aos_rtc_time_t time;
if (!aos_devfs_file_is_readable(file)) {
ret = -EPERM;
break;
}
ret = aos_rtc_get_time(ref, &time);
if (ret)
break;
if (!aos_umem_check((const void *)arg, sizeof(time))) {
ret = -EFAULT;
break;
}
ret = aos_umem_copy((void *)arg, &time, sizeof(time)) ? -EFAULT : 0;
}
break;
case AOS_RTC_IOC_SET_TIME:
{
aos_rtc_time_t time;
if (!aos_devfs_file_is_writable(file)) {
ret = -EPERM;
break;
}
if (!aos_umem_check((const void *)arg, sizeof(time))) {
ret = -EFAULT;
break;
}
if (aos_umem_copy(&time, (const void *)arg, sizeof(time))) {
ret = -EFAULT;
break;
}
ret = aos_rtc_set_time(ref, &time);
}
break;
default:
ret = -EINVAL;
break;
}
return ret;
}
static const aos_devfs_file_ops_t devfs_rtc_ops = {
.ioctl = devfs_rtc_ioctl,
.poll = NULL,
.mmap = NULL,
.read = NULL,
.write = NULL,
.lseek = NULL,
};
#endif /* AOS_COMP_DEVFS */
aos_status_t aos_rtc_register(aos_rtc_t *rtc)
{
#ifdef AOS_COMP_DEVFS
int name_len;
#endif
if (!rtc)
return -EINVAL;
if (!rtc->ops || !rtc->ops->startup || !rtc->ops->shutdown || !rtc->ops->get_time || !rtc->ops->set_time)
return -EINVAL;
rtc->dev.type = AOS_DEV_TYPE_RTC;
rtc->dev.ops = &dev_rtc_ops;
#ifdef AOS_COMP_DEVFS
aos_devfs_node_init(&rtc->dev.devfs_node);
rtc->dev.devfs_node.ops = &devfs_rtc_ops;
name_len = snprintf(rtc->dev.devfs_node.name, sizeof(rtc->dev.devfs_node.name), "rtc%" PRIu32, rtc->dev.id);
if (name_len < 0 || name_len >= sizeof(rtc->dev.devfs_node.name))
return -EINVAL;
#endif
return aos_dev_register(&rtc->dev);
}
aos_status_t aos_rtc_register_argumented(aos_rtc_t *rtc, uint32_t id, const aos_rtc_ops_t *ops)
{
if (!rtc)
return -EINVAL;
rtc->dev.id = id;
rtc->ops = ops;
return aos_rtc_register(rtc);
}
aos_status_t aos_rtc_unregister(uint32_t id)
{
return aos_dev_unregister(AOS_DEV_TYPE_RTC, id);
}
| YifuLiu/AliOS-Things | components/drivers/peripheral/rtc/src/rtc.c | C | apache-2.0 | 5,649 |
/*
* Copyright (C) 2015-2021 Alibaba Group Holding Limited
*/
#include <poll.h>
#include <stdlib.h>
#include <fcntl.h>
#include <string.h>
#include <sys/ioctl.h>
#include <epoll.h>
#include "aos/vfs.h"
#include <vfsdev/spi_dev.h>
#include <drivers/char/u_device.h>
#include <drivers/u_ld.h>
#if AOS_COMP_CLI
#include "aos/cli.h"
#endif
int vfs_spi_test(int id)
{
int i = 0;
char buffer[16];
int ret = 0;
int fd = 0;
int epfd = epoll_create(10 + 1);
char name[16] = {0};
snprintf(name, sizeof(name), "/dev/spi%d", id);
fd = open(name, 0);
ddkc_info("open %s %s, fd:%d\r\n", name, fd >= 0 ? "success" : "fail", fd);
if (fd >= 0) {
int n = 0;
int nfds = 0;
struct epoll_event ev;
struct epoll_event events[10 + 1];
ev.data.fd = fd;
ev.events = EPOLLIN | EPOLLOUT;
ret = epoll_ctl(epfd, EPOLL_CTL_ADD, fd, &ev);
ddkc_info("epoll_ctl return %d\r\n", ret);
//ret = ioctl(fd, IOC_SPI_SET_CFLAG, SPI_MODE_0 | SPI_MSB | SPI_MASTER | SPI_TRANSFER_DMA_MODE | SPI_DATA_8BIT);
ret = ioctl(fd, IOC_SPI_SET_CFLAG, SPI_MODE_0 | SPI_MSB | SPI_MASTER | SPI_DATA_8BIT);
ddkc_info("write to spi return %d\r\n", ret);
buffer[0] = 0x90;
ret = write(fd, buffer, 4);
ddkc_info("write to spi return %d\r\n", ret);
memset(buffer, 0, sizeof(buffer));
ret = read(fd, buffer, sizeof(buffer));
ddkc_info("read from spi return %d\r\n", ret);
for (i = 0; i < 4; i++) {
ddkc_info("buffer[%d] - 0x%x\r\n", i, buffer[i]);
}
nfds = epoll_wait(epfd, events, 10, 1000);
if (nfds > 0) {
if (events[n].events & EPOLLIN) {
ddkc_info("EPOLLIN received\r\n");
ret = read(fd, buffer, sizeof(buffer));
ddkc_info("read from ttyUART return %d\r\n", ret);
} else if (events[n].events & EPOLLOUT) {
ddkc_info("EPOLLOUT received\r\n");
}
}
close(fd);
}
return 0;
}
static void vfs_spi_cli_cmd(int argc, char **argv)
{
int ret = 0;
int index = argc > 1 ? atoi(argv[1]) : 1;
ddkc_info("argc:%d, index:%d\r\n", argc, index);
ret = vfs_spi_test(index);
ddkc_info("vfs spi test %s, ret:%d\r\n", ret ? "failed" : "success", ret);
return;
}
#if AOS_COMP_CLI
/* reg args: fun, cmd, description*/
ALIOS_CLI_CMD_REGISTER(vfs_spi_cli_cmd, spi_example, spi vfs example)
#endif | YifuLiu/AliOS-Things | components/drivers/peripheral/spi/example/spi_example.c | C | apache-2.0 | 2,499 |
/**
* @file spi.h
* @copyright Copyright (C) 2015-2018 Alibaba Group Holding Limited
*/
#ifndef HAL_SPI_H
#define HAL_SPI_H
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup hal_spi SPI
* spi hal API.
*
* @{
*/
#include <stdint.h>
/* Define the wait forever timeout macro */
#define HAL_WAIT_FOREVER 0xFFFFFFFFU
#define HAL_SPI_MODE_MASTER 1 /**< spi communication is master mode */
#define HAL_SPI_MODE_SLAVE 2 /**< spi communication is slave mode */
#define DEFAULT_SPI_SERAIL_LEN 280
typedef enum
{
SPI_ROLE_SLAVE,
SPI_ROLE_MASTER,
} spi_role_e;
typedef enum
{
SPI_FIRSTBIT_MSB,
SPI_FIRSTBIT_LSB,
} spi_firstbit_e;
typedef enum
{
SPI_WORK_MODE_0, // CPOL = 0; CPHA = 0
SPI_WORK_MODE_2, // CPOL = 1; CPHA = 0
SPI_WORK_MODE_1, // CPOL = 0; CPHA = 1
SPI_WORK_MODE_3, // CPOL = 1; CPHA = 1
} spi_work_mode_e;
typedef enum
{
SPI_TRANSFER_DMA,
SPI_TRANSFER_NORMAL,
} spi_transfer_mode_e;
/* size of single spi frame data */
typedef enum
{
SPI_DATA_SIZE_4BIT = 4,
SPI_DATA_SIZE_5BIT,
SPI_DATA_SIZE_6BIT,
SPI_DATA_SIZE_7BIT,
SPI_DATA_SIZE_8BIT,
SPI_DATA_SIZE_9BIT,
SPI_DATA_SIZE_10BIT,
SPI_DATA_SIZE_11BIT,
SPI_DATA_SIZE_12BIT,
SPI_DATA_SIZE_13BIT,
SPI_DATA_SIZE_14BIT,
SPI_DATA_SIZE_15BIT,
SPI_DATA_SIZE_16BIT,
} spi_data_size_e;
/* cs signal to active for transfer */
typedef enum
{
SPI_CS_DIS,
SPI_CS_EN,
} spi_cs_e;
/* Define spi config args */
typedef struct
{
spi_role_e role; /* spi communication mode */
spi_firstbit_e firstbit;
spi_work_mode_e mode;
spi_transfer_mode_e t_mode;
uint32_t freq; /* communication frequency Hz */
uint16_t serial_len; /* serial frame length, necessary for SPI running as Slave */
spi_data_size_e data_size;
spi_cs_e cs;
} spi_config_t;
/* Define spi dev handle */
typedef struct {
uint8_t port; /**< spi port */
spi_config_t config; /**< spi config */
void *priv; /**< priv data */
} spi_dev_t;
typedef struct{
spi_work_mode_e work_mode;
}spi_attribute_t;
/**
* Initialises the SPI interface for a given SPI device
*
* @param[in] spi the spi device
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_spi_init(spi_dev_t *spi);
/**
* Spi send
*
* @param[in] spi the spi device
* @param[in] data spi send data
* @param[in] size spi send data size
* @param[in] timeout timeout in milisecond, set this value to HAL_WAIT_FOREVER
* if you want to wait forever
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_spi_send(spi_dev_t *spi, const uint8_t *data, uint16_t size, uint32_t timeout);
/**
* spi_recv
*
* @param[in] spi the spi device
* @param[out] data spi recv data
* @param[in] size spi recv data size
* @param[in] timeout timeout in milisecond, set this value to HAL_WAIT_FOREVER
* if you want to wait forever
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_spi_recv(spi_dev_t *spi, uint8_t *data, uint16_t size, uint32_t timeout);
/**
* spi send data and recv
*
* @param[in] spi the spi device
* @param[in] tx_data spi send data
* @param[out] rx_data spi recv data
* @param[in] size spi data to be sent and recived
* @param[in] timeout timeout in milisecond, set this value to HAL_WAIT_FOREVER
* if you want to wait forever
*
* @return 0, on success, otherwise is error
*/
int32_t hal_spi_send_recv(spi_dev_t *spi, uint8_t *tx_data, uint8_t *rx_data,
uint16_t size, uint32_t timeout);
/**
* spi send data and then recv data
*
* @param[in] spi the spi device
* @param[in] tx_data the data to be sent
* @param[in] tx_size data size to be sent
* @param[out] rx_data spi recv data
* @param[in] rx_size data size to be recived
* @param[in] timeout timeout in milisecond, set this value to HAL_WAIT_FOREVER
* if you want to wait forever
*
* @return 0, on success, otherwise is error
*/
int32_t hal_spi_send_and_recv(spi_dev_t *spi, uint8_t *tx_data, uint16_t tx_size, uint8_t *rx_data,
uint16_t rx_size, uint32_t timeout);
/**
* spi send data and then send data
* @param[in] spi the spi device
* @param[in] tx1_data the first data to be sent
* @param[in] tx1_size the first data size to be sent
* @param[out] tx2_data the second data to be sent
* @param[in] tx2_size the second data size to be sent
* @param[in] timeout timeout in milisecond, set this value to HAL_WAIT_FOREVER
* if you want to wait forever
*
* @return 0, on success, otherwise is error
*/
int32_t hal_spi_send_and_send(spi_dev_t *spi, uint8_t *tx1_data, uint16_t tx1_size, uint8_t *tx2_data,
uint16_t tx2_size, uint32_t timeout);
/**
* De-initialises a SPI interface
*
*
* @param[in] spi the SPI device to be de-initialised
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_spi_finalize(spi_dev_t *spi);
/** @} */
void _hal_spi_test(void);
#ifdef __cplusplus
}
#endif
#endif /* HAL_SPI_H */ | YifuLiu/AliOS-Things | components/drivers/peripheral/spi/include/aos/hal/spi.h | C | apache-2.0 | 5,299 |
/*
* Copyright (C) 2020-2021 Alibaba Group Holding Limited
*/
#ifndef AOS_SPI_H
#define AOS_SPI_H
#ifdef AOS_KERNEL_BUILD
#include <aos/device.h>
#else
#include <stdint.h>
#endif
/**
* @defgroup spi_api SPI Master
* @ingroup driver_api
* @brief AOS API for SPI master.
* @{
*/
#define AOS_SPI_F_MODE_0 ((uint32_t)0x1 << 0)
#define AOS_SPI_F_MODE_1 ((uint32_t)0x1 << 1)
#define AOS_SPI_F_MODE_2 ((uint32_t)0x1 << 2)
#define AOS_SPI_F_MODE_3 ((uint32_t)0x1 << 3)
#define AOS_SPI_F_WIDTH_1 ((uint32_t)0x1 << 4)
#define AOS_SPI_F_WIDTH_2 ((uint32_t)0x1 << 5)
#define AOS_SPI_F_WIDTH_4 ((uint32_t)0x1 << 6)
#define AOS_SPI_F_WIDTH_8 ((uint32_t)0x1 << 7)
#define AOS_SPI_F_4WIRE ((uint32_t)0x1 << 8)
#define AOS_SPI_F_3WIRE ((uint32_t)0x1 << 9)
#define AOS_SPI_F_MSB_FIRST ((uint32_t)0x1 << 10)
#define AOS_SPI_F_LSB_FIRST ((uint32_t)0x1 << 11)
#define AOS_SPI_F_NO_CS ((uint32_t)0x1 << 12)
#define AOS_SPI_MCFG_MODE_MASK ((uint32_t)0x3 << 0)
#define AOS_SPI_MCFG_MODE_0 ((uint32_t)0x0 << 0)
#define AOS_SPI_MCFG_MODE_1 ((uint32_t)0x1 << 0)
#define AOS_SPI_MCFG_MODE_2 ((uint32_t)0x2 << 0)
#define AOS_SPI_MCFG_MODE_3 ((uint32_t)0x3 << 0)
#define AOS_SPI_MCFG_WIDTH_MASK ((uint32_t)0x3 << 2)
#define AOS_SPI_MCFG_WIDTH_1 ((uint32_t)0x0 << 2)
#define AOS_SPI_MCFG_WIDTH_2 ((uint32_t)0x1 << 2)
#define AOS_SPI_MCFG_WIDTH_4 ((uint32_t)0x2 << 2)
#define AOS_SPI_MCFG_WIDTH_8 ((uint32_t)0x3 << 2)
#define AOS_SPI_MCFG_4WIRE ((uint32_t)0x0 << 4)
#define AOS_SPI_MCFG_3WIRE ((uint32_t)0x1 << 4)
#define AOS_SPI_MCFG_MSB_FIRST ((uint32_t)0x0 << 5)
#define AOS_SPI_MCFG_LSB_FIRST ((uint32_t)0x1 << 5)
typedef struct {
uint32_t flags : 24;
uint32_t num_cs : 8;
uint32_t min_hz;
uint32_t max_hz;
} aos_spi_info_t;
typedef struct {
uint32_t cfg : 24;
uint32_t cs : 8;
uint32_t hz;
uint32_t pre_cs;
uint32_t post_cs;
uint32_t pre_clk;
uint32_t post_clk;
size_t count;
void *rx_buf;
const void *tx_buf;
} aos_spi_msg_t;
#define AOS_SPI_MSG_INIT_VAL \
{ \
.cfg = 0, \
.cs = 0, \
.hz = 0, \
.pre_cs = 0, \
.post_cs = 0, \
.pre_clk = 0, \
.post_clk = 0, \
.count = 0, \
.rx_buf = NULL, \
.tx_buf = NULL, \
}
#define aos_spi_msg_init(x) do { *(x) = (aos_spi_msg_t)AOS_SPI_MSG_INIT_VAL; } while (0)
#if (defined(AOS_KERNEL_BUILD) && defined(AOS_COMP_DEVFS)) || !defined(AOS_KERNEL_BUILD)
#define AOS_SPI_IOC_GET_INFO 0x5301
#define AOS_SPI_IOC_TRANSFER(n) (0x5310 | ((int)(n) & 0xF))
#endif /* (defined(AOS_KERNEL_BUILD) && defined(AOS_COMP_DEVFS)) || !defined(AOS_KERNEL_BUILD) */
#ifdef AOS_KERNEL_BUILD
typedef aos_dev_ref_t aos_spi_ref_t;
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Get an SPI master device.
* @param ref SPI ref to operate.
* @param id SPI master device ID.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_spi_get(aos_spi_ref_t *ref, uint32_t id);
/**
* @brief Release an SPI master device.
* @param ref SPI ref to operate.
* @return None.
*/
void aos_spi_put(aos_spi_ref_t *ref);
/**
* @brief Get information about an SPI master device.
* @param ref SPI ref to operate.
* @param info Information structure.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_spi_get_info(aos_spi_ref_t *ref, aos_spi_info_t *info);
/**
* @brief Synchronous SPI data transfer.
* @param ref SPI ref to operate.
* @param msgs Array of messages.
* @param num_msgs Number of messages.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_spi_transfer(aos_spi_ref_t *ref, const aos_spi_msg_t *msgs, size_t num_msgs);
#ifdef __cplusplus
}
#endif
#endif /* AOS_KERNEL_BUILD */
/** @} */
#endif /* AOS_SPI_H */
| YifuLiu/AliOS-Things | components/drivers/peripheral/spi/include/aos/spi.h | C | apache-2.0 | 3,989 |
/*
* Copyright (C) 2020-2021 Alibaba Group Holding Limited
*/
#ifndef AOS_SPI_CORE_H
#define AOS_SPI_CORE_H
#include <aos/device_core.h>
#include <aos/spi.h>
#define AOS_SPI_XF_MSG_HEAD ((uint32_t)0x1 << 0)
#define AOS_SPI_XF_MSG_TAIL ((uint32_t)0x1 << 1)
#define AOS_SPI_XF_SEQ_HEAD ((uint32_t)0x1 << 2)
#define AOS_SPI_XF_SEQ_TAIL ((uint32_t)0x1 << 3)
#define AOS_SPI_XF_RX ((uint32_t)0x1 << 4)
#define AOS_SPI_XF_TX ((uint32_t)0x1 << 5)
struct aos_spi_ops;
typedef struct {
aos_dev_t dev;
/* must be initialized before registration */
const struct aos_spi_ops *ops;
uint32_t flags : 24;
uint32_t num_cs : 8;
uint32_t min_hz;
uint32_t max_hz;
size_t buf_size;
void *rx_buf[2];
void *tx_buf[2];
aos_event_t event;
struct {
uint32_t timeout;
uint32_t flags;
uint32_t cfg : 24;
uint32_t cs : 8;
uint32_t hz;
uint32_t pre_cs;
uint32_t post_cs;
uint32_t pre_clk;
uint32_t post_clk;
size_t len;
size_t head;
size_t tail;
void *rx_buf;
const void *tx_buf;
} x;
} aos_spi_t;
typedef struct aos_spi_ops {
void (*unregister)(aos_spi_t *);
aos_status_t (*startup)(aos_spi_t *);
void (*shutdown)(aos_spi_t *);
aos_status_t (*start_xfer)(aos_spi_t *);
void (*finish_xfer)(aos_spi_t *);
void (*abort_xfer)(aos_spi_t *);
aos_status_t (*transfer_sequence)(aos_spi_t *, const aos_spi_msg_t *, size_t);
} aos_spi_ops_t;
#ifdef __cplusplus
extern "C" {
#endif
aos_status_t aos_spi_register(aos_spi_t *spi);
aos_status_t aos_spi_register_argumented(aos_spi_t *spi, uint32_t id, const aos_spi_ops_t *ops, uint32_t flags,
uint32_t num_cs, uint32_t min_hz, uint32_t max_hz,
size_t buf_size, void *rx_buf[2], void *tx_buf[2]);
aos_status_t aos_spi_unregister(uint32_t id);
size_t aos_spi_hard_push(aos_spi_t *spi, void *tx_buf, size_t count);
bool aos_spi_hard_pull(aos_spi_t *spi, const void *rx_buf, size_t count);
void aos_spi_hard_fail(aos_spi_t *spi);
static inline const void *aos_spi_hard_tx_inplace(aos_spi_t *spi)
{
if (!(spi->x.flags & AOS_SPI_XF_TX))
return NULL;
return &((const uint8_t *)spi->x.tx_buf)[spi->x.head];
}
static inline void *aos_spi_hard_rx_inplace(aos_spi_t *spi)
{
if (!(spi->x.flags & AOS_SPI_XF_RX))
return NULL;
return &((uint8_t *)spi->x.rx_buf)[spi->x.tail];
}
static inline size_t aos_spi_hard_remain(aos_spi_t *spi)
{
return spi->x.head - spi->x.tail;
}
static inline size_t aos_spi_xfer_remain(aos_spi_t *spi)
{
return spi->x.len - spi->x.head;
}
#ifdef __cplusplus
}
#endif
#endif /* AOS_SPI_CORE_H */
| YifuLiu/AliOS-Things | components/drivers/peripheral/spi/include/aos/spi_core.h | C | apache-2.0 | 2,789 |
/*
* Copyright ( C) 2015-2020 Alibaba Group Holding Limited
*/
#ifndef _IO_SPI_H_
#define _IO_SPI_H_
#define IOC_SPI_BASE 'S'
#define IOC_SPI_SET_CFLAG IOC_SPI_BASE + 1
#define IOC_SPI_SET_FREQ IOC_SPI_BASE + 2
#define IOC_SPI_SEND_RECV IOC_SPI_BASE + 3
#define IOC_SPI_SEND_AND_RECV IOC_SPI_BASE + 4
#define IOC_SPI_SEND_AND_SEND IOC_SPI_BASE + 5
#define IOC_SPI_SET_SERIAL_LEN IOC_SPI_BASE + 6 //default DEFAULT_SPI_SERAIL_LEN
#define SPI_CPHA (1<<0) /**< spi communication is master mode */
#define SPI_CPOL (1<<1) /**< spi communication is slave mode */
#define SPI_MSB (0<<2) /**< spi communication is master mode */
#define SPI_LSB (1<<2) /**< spi communication is slave mode */
#define SPI_MASTER (0<<3) /**< spi communication is master mode */
#define SPI_SLAVE (1<<3) /**< spi communication is slave mode */
#define SPI_3WIRE 0x10 /**< spi si\so shared */
#define SPI_LOOP 0x20 /**< loop mode */
#define SPI_NO_CS 0x40 /**< NO CS select */
#define SPI_READY 0x80
#define SPI_CS_HIGH 0x100 /**< CS high */
#define SPI_TRANSFER_MODE_MASK 0x600
#define SPI_TRANSFER_DMA_MODE 0x200
#define SPI_TRANSFER_NORMAL_MODE 0x400
#define SPI_DATA_SIZE_MASK 0x000f000
#define SPI_DATA_4BIT 0x0001000
#define SPI_DATA_5BIT 0x0002000
#define SPI_DATA_6BIT 0x0003000
#define SPI_DATA_7BIT 0x0004000
#define SPI_DATA_8BIT 0x0005000
#define SPI_DATA_9BIT 0x0006000
#define SPI_DATA_10BIT 0x0007000
#define SPI_DATA_11BIT 0x0008000
#define SPI_DATA_12BIT 0x0009000
#define SPI_DATA_13BIT 0x000a000
#define SPI_DATA_14BIT 0x000b000
#define SPI_DATA_15BIT 0x000c000
#define SPI_DATA_16BIT 0x000d000
#define SPI_MASK SPI_CPHA | SPI_CPOL | SPI_MSB | SPI_3WIRE | SPI_LOOP | SPI_NO_CS | SPI_READY | SPI_CS_HIGH | SPI_TRANSFER_MODE_MASK | SPI_DATA_SIZE_MASK
#define SPI_MODE_0 (0|0)
#define SPI_MODE_1 (0|SPI_CPHA)
#define SPI_MODE_2 (SPI_CPOL|0)
#define SPI_MODE_3 (SPI_CPOL|SPI_CPHA)
typedef struct {
uint8_t * tx_buf;
uint8_t * rx_buf;
uint16_t tx_size;
uint16_t rx_size;
} ioc_spi_transfer_t;
typedef int (*spi_rx_cb) (void *spi); // spi's actual type is spi_dev_t *
int vfs_spi_drv_init (void);
#endif //_IO_SPI_H_
| YifuLiu/AliOS-Things | components/drivers/peripheral/spi/include/vfsdev/spi_dev.h | C | apache-2.0 | 2,338 |
/*
* Copyright (C) 2020-2021 Alibaba Group Holding Limited
*/
#include <aos/spi_core.h>
#ifdef AOS_COMP_DEVFS
#include <stdio.h>
#include <inttypes.h>
#endif
#define XFER_TIMEOUT 1000
#define EVENT_XFER_COMPLETE ((uint32_t)1 << 0)
#define EVENT_XFER_ERROR ((uint32_t)1 << 1)
aos_status_t aos_spi_get(aos_spi_ref_t *ref, uint32_t id)
{
return aos_dev_get(ref, AOS_DEV_TYPE_SPI, id);
}
void aos_spi_put(aos_spi_ref_t *ref)
{
aos_dev_put(ref);
}
aos_status_t aos_spi_get_info(aos_spi_ref_t *ref, aos_spi_info_t *info)
{
aos_spi_t *spi;
if (!ref || !aos_dev_ref_is_valid(ref) || !info)
return -EINVAL;
spi = aos_container_of(ref->dev, aos_spi_t, dev);
info->flags = spi->flags;
info->num_cs = spi->num_cs;
info->min_hz = spi->min_hz;
info->max_hz = spi->max_hz;
return 0;
}
static aos_status_t transfer_sequence(aos_spi_t *spi, const aos_spi_msg_t *msgs, size_t num_msgs)
{
if (spi->ops->transfer_sequence)
return spi->ops->transfer_sequence(spi, msgs, num_msgs);
if (spi->buf_size == 0) {
for (size_t i = 0; i < num_msgs; i++) {
const aos_spi_msg_t *msg = &msgs[i];
uint32_t mask;
uint32_t val;
aos_status_t ret;
spi->x.timeout = XFER_TIMEOUT;
spi->x.flags = AOS_SPI_XF_MSG_HEAD | AOS_SPI_XF_MSG_TAIL;
spi->x.flags |= (i == 0) ? AOS_SPI_XF_SEQ_HEAD : 0;
spi->x.flags |= (i + 1 == num_msgs) ? AOS_SPI_XF_SEQ_TAIL : 0;
spi->x.flags |= msg->rx_buf ? AOS_SPI_XF_RX : 0;
spi->x.flags |= msg->tx_buf ? AOS_SPI_XF_TX : 0;
spi->x.cfg = msg->cfg;
spi->x.cs = msg->cs;
spi->x.hz = msg->hz;
spi->x.pre_cs = msg->pre_cs;
spi->x.post_cs = msg->post_cs;
spi->x.pre_clk = msg->pre_clk;
spi->x.post_clk = msg->post_clk;
spi->x.len = msg->count;
spi->x.head = 0;
spi->x.tail = 0;
spi->x.rx_buf = msg->rx_buf;
spi->x.tx_buf = msg->tx_buf;
ret = spi->ops->start_xfer(spi);
if (ret)
return ret;
mask = EVENT_XFER_COMPLETE | EVENT_XFER_ERROR;
if (aos_event_get(&spi->event, mask, AOS_EVENT_OR, &val, spi->x.timeout) || (val & EVENT_XFER_ERROR)) {
spi->ops->abort_xfer(spi);
aos_event_set(&spi->event, 0, AOS_EVENT_AND);
return -EIO;
} else {
spi->ops->finish_xfer(spi);
aos_event_set(&spi->event, 0, AOS_EVENT_AND);
}
}
} else {
const aos_spi_msg_t *last_msg = NULL;
size_t last_pos = 0;
if (msgs[0].tx_buf) {
size_t count = spi->buf_size < msgs[0].count ? spi->buf_size : msgs[0].count;
if (aos_umem_copy(spi->tx_buf[0], msgs[0].tx_buf, count))
return -EFAULT;
}
for (size_t i = 0, j = 0, pos = 0; i < num_msgs; j++) {
const aos_spi_msg_t *msg = &msgs[i];
const aos_spi_msg_t *next_msg;
bool msg_tail;
size_t next_pos;
uint32_t mask;
uint32_t val;
aos_status_t ret;
if (msg != last_msg) {
spi->x.cfg = msg->cfg;
spi->x.cs = msg->cs;
spi->x.hz = msg->hz;
spi->x.pre_cs = msg->pre_cs;
spi->x.post_cs = msg->post_cs;
spi->x.pre_clk = msg->pre_clk;
spi->x.post_clk = msg->post_clk;
}
spi->x.timeout = XFER_TIMEOUT;
spi->x.len = (pos + spi->buf_size < msg->count) ? spi->buf_size : msg->count - pos;
spi->x.head = 0;
spi->x.tail = 0;
msg_tail = (pos + spi->x.len == msg->count);
spi->x.flags = 0;
spi->x.flags |= (pos == 0) ? AOS_SPI_XF_MSG_HEAD : 0;
spi->x.flags |= msg_tail ? AOS_SPI_XF_MSG_TAIL : 0;
spi->x.flags |= (j == 0) ? AOS_SPI_XF_SEQ_HEAD : 0;
spi->x.flags |= (msg_tail && i + 1 == num_msgs) ? AOS_SPI_XF_SEQ_TAIL : 0;
spi->x.flags |= msg->rx_buf ? AOS_SPI_XF_RX : 0;
spi->x.flags |= msg->tx_buf ? AOS_SPI_XF_TX : 0;
spi->x.rx_buf = msg->rx_buf ? spi->rx_buf[j & 1] : NULL;
spi->x.tx_buf = msg->tx_buf ? spi->tx_buf[j & 1] : NULL;
ret = spi->ops->start_xfer(spi);
if (ret)
return ret;
if (last_msg && last_msg->rx_buf) {
size_t count = last_pos + spi->buf_size < last_msg->count ? spi->buf_size : last_msg->count - last_pos;
if (aos_umem_copy((uint8_t *)last_msg->rx_buf + last_pos, spi->rx_buf[(j - 1) & 1], count)) {
spi->ops->abort_xfer(spi);
aos_event_set(&spi->event, 0, AOS_EVENT_AND);
return -EFAULT;
}
}
if (msg_tail) {
next_msg = (i + 1 < num_msgs) ? &msgs[i + 1] : NULL;
next_pos = 0;
} else {
next_msg = msg;
next_pos = pos + spi->x.len;
}
if (next_msg && next_msg->tx_buf) {
size_t count = next_pos + spi->buf_size < next_msg->count ? spi->buf_size : next_msg->count - next_pos;
if (aos_umem_copy(spi->tx_buf[(j + 1) & 1], (const uint8_t *)next_msg->tx_buf + next_pos, count)) {
spi->ops->abort_xfer(spi);
aos_event_set(&spi->event, 0, AOS_EVENT_AND);
return -EFAULT;
}
}
mask = EVENT_XFER_COMPLETE | EVENT_XFER_ERROR;
if (aos_event_get(&spi->event, mask, AOS_EVENT_OR, &val, spi->x.timeout) || (val & EVENT_XFER_ERROR)) {
spi->ops->abort_xfer(spi);
aos_event_set(&spi->event, 0, AOS_EVENT_AND);
return -EIO;
} else {
spi->ops->finish_xfer(spi);
aos_event_set(&spi->event, 0, AOS_EVENT_AND);
}
last_msg = msg;
last_pos = pos;
if (msg_tail) {
pos = 0;
i++;
} else {
pos += spi->x.len;
}
}
if (last_msg && last_msg->rx_buf) {
if (aos_umem_copy((uint8_t *)last_msg->rx_buf + last_pos, spi->x.rx_buf, spi->x.len))
return -EFAULT;
}
}
return 0;
}
aos_status_t aos_spi_transfer(aos_spi_ref_t *ref, const aos_spi_msg_t *msgs, size_t num_msgs)
{
aos_spi_t *spi;
aos_status_t ret = 0;
if (!ref || !aos_dev_ref_is_valid(ref) || !msgs || num_msgs == 0)
return -EINVAL;
spi = aos_container_of(ref->dev, aos_spi_t, dev);
for (size_t i = 0; i < num_msgs; i++) {
const aos_spi_msg_t *msg = &msgs[i];
if ((msg->cfg & AOS_SPI_MCFG_MODE_MASK) == AOS_SPI_MCFG_MODE_0 && !(spi->flags & AOS_SPI_F_MODE_0))
return -EINVAL;
if ((msg->cfg & AOS_SPI_MCFG_MODE_MASK) == AOS_SPI_MCFG_MODE_1 && !(spi->flags & AOS_SPI_F_MODE_1))
return -EINVAL;
if ((msg->cfg & AOS_SPI_MCFG_MODE_MASK) == AOS_SPI_MCFG_MODE_2 && !(spi->flags & AOS_SPI_F_MODE_2))
return -EINVAL;
if ((msg->cfg & AOS_SPI_MCFG_MODE_MASK) == AOS_SPI_MCFG_MODE_3 && !(spi->flags & AOS_SPI_F_MODE_3))
return -EINVAL;
if ((msg->cfg & AOS_SPI_MCFG_LSB_FIRST) && !(spi->flags & AOS_SPI_F_LSB_FIRST))
return -EINVAL;
if (!(msg->cfg & AOS_SPI_MCFG_LSB_FIRST) && !(spi->flags & AOS_SPI_F_MSB_FIRST))
return -EINVAL;
if (msg->count == 0 || (!msg->rx_buf && !msg->tx_buf))
return -EINVAL;
if ((msg->cfg & AOS_SPI_MCFG_WIDTH_MASK) == AOS_SPI_MCFG_WIDTH_1) {
if ((msg->cfg & AOS_SPI_MCFG_3WIRE) && !(spi->flags & AOS_SPI_F_3WIRE))
return -EINVAL;
if (!(msg->cfg & AOS_SPI_MCFG_3WIRE) && !(spi->flags & AOS_SPI_F_4WIRE))
return -EINVAL;
if ((msg->cfg & AOS_SPI_MCFG_3WIRE) && msg->rx_buf && msg->tx_buf)
return -EINVAL;
} else {
if (msg->rx_buf && msg->tx_buf)
return -EINVAL;
}
if (msg->cs >= spi->num_cs)
return -EINVAL;
if (msg->hz < spi->min_hz || msg->hz > spi->max_hz)
return -EINVAL;
}
for (size_t i = 0, j = 0; i < num_msgs; i++) {
if (i + 1 < num_msgs && msgs[i].cs == msgs[i + 1].cs &&
(msgs[i].cfg & AOS_SPI_MCFG_MODE_MASK) == (msgs[i + 1].cfg & AOS_SPI_MCFG_MODE_MASK))
continue;
aos_dev_lock(ref->dev);
ret = transfer_sequence(spi, &msgs[j], i + 1 - j);
aos_dev_unlock(ref->dev);
if (ret)
break;
j = i + 1;
}
return ret;
}
static void dev_spi_unregister(aos_dev_t *dev)
{
aos_spi_t *spi = aos_container_of(dev, aos_spi_t, dev);
aos_event_free(&spi->event);
if (spi->ops->unregister)
spi->ops->unregister(spi);
}
static aos_status_t dev_spi_get(aos_dev_ref_t *ref)
{
aos_spi_t *spi = aos_container_of(ref->dev, aos_spi_t, dev);
if (!aos_dev_ref_is_first(ref))
return 0;
return spi->ops->startup(spi);
}
static void dev_spi_put(aos_dev_ref_t *ref)
{
aos_spi_t *spi = aos_container_of(ref->dev, aos_spi_t, dev);
if (!aos_dev_ref_is_last(ref))
return;
spi->ops->shutdown(spi);
}
static const aos_dev_ops_t dev_spi_ops = {
.unregister = dev_spi_unregister,
.get = dev_spi_get,
.put = dev_spi_put,
};
#ifdef AOS_COMP_DEVFS
static aos_status_t devfs_spi_ioctl(aos_devfs_file_t *file, int cmd, uintptr_t arg)
{
aos_spi_ref_t *ref = aos_devfs_file2ref(file);
aos_status_t ret;
if (cmd == AOS_SPI_IOC_GET_INFO) {
aos_spi_info_t info;
if (!aos_devfs_file_is_readable(file))
return -EPERM;
ret = aos_spi_get_info(ref, &info);
if (ret)
return ret;
if (!aos_umem_check((const void *)arg, sizeof(info)))
return -EFAULT;
ret = aos_umem_copy((void *)arg, &info, sizeof(info)) ? -EFAULT : 0;
} else if (cmd >= AOS_SPI_IOC_TRANSFER(16) && cmd <= AOS_SPI_IOC_TRANSFER(15)) {
aos_spi_msg_t msgs[16];
size_t num_msgs;
if ((aos_devfs_file_get_mode(file) & O_ACCMODE) != O_RDWR)
return -EPERM;
num_msgs = cmd & 0xF;
num_msgs = (num_msgs == 0) ? 16 : num_msgs;
if (!aos_umem_check((const void *)arg, sizeof(msgs[0]) * num_msgs))
return -EFAULT;
if (aos_umem_copy(msgs, (const void *)arg, sizeof(msgs[0]) * num_msgs))
return -EFAULT;
for (size_t i = 0; i < num_msgs; i++) {
if (msgs[i].rx_buf && !aos_umem_check(msgs[i].rx_buf, msgs[i].count))
return -EFAULT;
if (msgs[i].tx_buf && !aos_umem_check(msgs[i].tx_buf, msgs[i].count))
return -EFAULT;
}
ret = aos_spi_transfer(ref, msgs, num_msgs);
} else {
ret = -EINVAL;
}
return ret;
}
static const aos_devfs_file_ops_t devfs_spi_ops = {
.ioctl = devfs_spi_ioctl,
.poll = NULL,
.mmap = NULL,
.read = NULL,
.write = NULL,
.lseek = NULL,
};
#endif /* AOS_COMP_DEVFS */
aos_status_t aos_spi_register(aos_spi_t *spi)
{
aos_status_t ret;
#ifdef AOS_COMP_DEVFS
int name_len;
#endif
if (!spi)
return -EINVAL;
if (!spi->ops || !spi->ops->startup || !spi->ops->shutdown)
return -EINVAL;
if ((!spi->ops->start_xfer || !spi->ops->finish_xfer || !spi->ops->abort_xfer) && !spi->ops->transfer_sequence)
return -EINVAL;
if (!(spi->flags & AOS_SPI_F_MODE_0) && !(spi->flags & AOS_SPI_F_MODE_1) &&
!(spi->flags & AOS_SPI_F_MODE_2) && !(spi->flags & AOS_SPI_F_MODE_3))
return -EINVAL;
if (!(spi->flags & AOS_SPI_F_WIDTH_1) && !(spi->flags & AOS_SPI_F_WIDTH_2) &&
!(spi->flags & AOS_SPI_F_WIDTH_4) && !(spi->flags & AOS_SPI_F_WIDTH_8))
return -EINVAL;
if (spi->flags & AOS_SPI_F_WIDTH_1) {
if (!(spi->flags & AOS_SPI_F_4WIRE) && !(spi->flags & AOS_SPI_F_3WIRE))
return -EINVAL;
} else {
spi->flags &= ~(AOS_SPI_F_4WIRE | AOS_SPI_F_3WIRE);
}
if (!(spi->flags & AOS_SPI_F_MSB_FIRST) && !(spi->flags & AOS_SPI_F_LSB_FIRST))
return -EINVAL;
if (spi->flags & AOS_SPI_F_NO_CS)
spi->num_cs = 1;
if (spi->num_cs == 0)
return -EINVAL;
if (spi->min_hz == 0 || spi->min_hz > spi->max_hz)
return -EINVAL;
if ((spi->buf_size && (!spi->rx_buf[0] || !spi->rx_buf[1] || !spi->tx_buf[0] || !spi->tx_buf[1])) ||
(!spi->buf_size && (spi->rx_buf[0] || spi->rx_buf[1] || spi->tx_buf[0] || spi->tx_buf[1])))
return -EINVAL;
spi->dev.type = AOS_DEV_TYPE_SPI;
spi->dev.ops = &dev_spi_ops;
#ifdef AOS_COMP_DEVFS
aos_devfs_node_init(&spi->dev.devfs_node);
spi->dev.devfs_node.ops = &devfs_spi_ops;
name_len = snprintf(spi->dev.devfs_node.name, sizeof(spi->dev.devfs_node.name), "spi%" PRIu32, spi->dev.id);
if (name_len < 0 || name_len >= sizeof(spi->dev.devfs_node.name))
return -EINVAL;
#endif
ret = aos_event_new(&spi->event, 0);
if (ret)
return ret;
ret = aos_dev_register(&spi->dev);
if (ret) {
aos_event_free(&spi->event);
return ret;
}
return 0;
}
aos_status_t aos_spi_register_argumented(aos_spi_t *spi, uint32_t id, const aos_spi_ops_t *ops, uint32_t flags,
uint32_t num_cs, uint32_t min_hz, uint32_t max_hz,
size_t buf_size, void *rx_buf[2], void *tx_buf[2])
{
if (!spi)
return -EINVAL;
spi->dev.id = id;
spi->ops = ops;
spi->flags = flags;
spi->num_cs = num_cs;
spi->min_hz = min_hz;
spi->max_hz = max_hz;
spi->buf_size = buf_size;
spi->rx_buf[0] = rx_buf[0];
spi->rx_buf[1] = rx_buf[1];
spi->tx_buf[0] = tx_buf[0];
spi->tx_buf[1] = tx_buf[1];
return aos_spi_register(spi);
}
aos_status_t aos_spi_unregister(uint32_t id)
{
return aos_dev_unregister(AOS_DEV_TYPE_SPI, id);
}
size_t aos_spi_hard_push(aos_spi_t *spi, void *tx_buf, size_t count)
{
if (spi->x.head + count > spi->x.len)
count = spi->x.len - spi->x.head;
if ((spi->x.flags & AOS_SPI_XF_TX) && tx_buf) {
for (size_t i = 0; i < count; i++)
((uint8_t *)tx_buf)[i] = ((const uint8_t *)spi->x.tx_buf)[spi->x.head + i];
}
spi->x.head += count;
return count;
}
bool aos_spi_hard_pull(aos_spi_t *spi, const void *rx_buf, size_t count)
{
if (spi->x.tail + count > spi->x.head)
count = spi->x.head - spi->x.tail;
if ((spi->x.flags & AOS_SPI_XF_RX) && rx_buf) {
for (size_t i = 0; i < count; i++)
((uint8_t *)spi->x.rx_buf)[spi->x.tail + i] = ((const uint8_t *)rx_buf)[i];
}
spi->x.tail += count;
if (spi->x.tail == spi->x.len) {
aos_event_set(&spi->event, EVENT_XFER_COMPLETE, AOS_EVENT_OR);
return true;
}
return false;
}
void aos_spi_hard_fail(aos_spi_t *spi)
{
aos_event_set(&spi->event, EVENT_XFER_ERROR, AOS_EVENT_OR);
}
| YifuLiu/AliOS-Things | components/drivers/peripheral/spi/src/spi.c | C | apache-2.0 | 15,432 |
/*
* Copyright (C) 2015-2021 Alibaba Group Holding Limited
*/
#include <poll.h>
#include <aos/hal/spi.h>
#include <vfsdev/spi_dev.h>
#include <devicevfs/devicevfs.h>
#ifdef CONFIG_SPI_NUM
#define PLATFORM_SPI_NUM CONFIG_SPI_NUM
#else
#define PLATFORM_SPI_NUM 4
#endif
#if (PLATFORM_SPI_NUM > 0)
// SPI device node will be named with "/dev/spi<x>", where <x> is spi port id
#define SPI_DEV_NAME_FORMAT "spi%d"
#define DEFAULT_SPI_FREQ 1000000
/* used to notify user on poll events */
typedef struct spi_poll_notify {
bool flag;
struct mutex mutex;
poll_notify_t notify;
struct pollfd *fd;
void *arg;
} spi_poll_notify_t;
static spi_poll_notify_t g_spi_notify[PLATFORM_SPI_NUM];
__weak int hal_spi_recv_cb_reg(spi_dev_t *spi, spi_rx_cb cb) {
ddkc_dbg("%s, spi:%p, cb:%p\r\n", __func__, spi, cb);
return 0;
}
ssize_t spi_device_read (file_t *f, void *buffer, size_t size) {
spi_dev_t *spi = (spi_dev_t *)f->node->i_arg;
spi_poll_notify_t *spi_poll = NULL;
if (!spi || !buffer || !size) {
ddkc_dbg("invalid spi:%p, buffer:%p or size:%d\r\n", spi, buffer, size);
return -EINVAL;
}
spi_poll = &g_spi_notify[spi->port];
if (spi_poll->flag) {
mutex_lock(&spi_poll->mutex);
spi_poll->flag = false;
mutex_unlock(&spi_poll->mutex);
}
return hal_spi_recv(spi, buffer, size, 0);
}
ssize_t spi_device_write (file_t *f, const void *buffer, size_t size) {
spi_dev_t *spi = (spi_dev_t *)f->node->i_arg;
if (!spi || !buffer || !size) {
ddkc_err("invalid spi:%p, buffer:%p or size:%d\r\n", spi, buffer, size);
return -EINVAL;
}
return hal_spi_send(spi, buffer, size, 1000);
}
static spi_role_e _arg_to_role (unsigned long arg) {
spi_role_e role = 0;
int control = arg & SPI_SLAVE;
switch (control) {
case SPI_SLAVE:
role = SPI_ROLE_SLAVE;
break;
case SPI_MASTER:
role = SPI_ROLE_MASTER;
break;
default:
role = SPI_ROLE_MASTER;
break;
}
return role;
}
static spi_firstbit_e _arg_to_firstbit (unsigned long arg) {
spi_firstbit_e firstbit = 0;
int control = arg & SPI_LSB;
switch (control) {
case SPI_LSB:
firstbit = SPI_FIRSTBIT_LSB;
break;
case SPI_MSB:
firstbit = SPI_FIRSTBIT_MSB;
break;
default:
firstbit = SPI_FIRSTBIT_MSB;
break;
}
return firstbit;
}
static spi_work_mode_e _arg_to_work_mode (unsigned long arg) {
spi_work_mode_e mode = 0;
int control = arg & (SPI_CPOL|SPI_CPHA);
switch (control) {
case SPI_MODE_0:
mode = SPI_WORK_MODE_0;
break;
case SPI_MODE_1:
mode = SPI_WORK_MODE_1;
break;
case SPI_MODE_2:
mode = SPI_WORK_MODE_2;
break;
case SPI_MODE_3:
mode = SPI_WORK_MODE_3;
break;
}
return mode;
}
static spi_transfer_mode_e _arg_to_tranmode (unsigned long arg) {
spi_transfer_mode_e mode = 0;
int control = arg & SPI_TRANSFER_MODE_MASK;
switch (control) {
case SPI_TRANSFER_DMA_MODE:
mode = (spi_transfer_mode_e)SPI_TRANSFER_DMA;
break;
case SPI_TRANSFER_NORMAL_MODE:
mode = (spi_transfer_mode_e)SPI_TRANSFER_NORMAL;
break;
default:
mode = (spi_transfer_mode_e)SPI_TRANSFER_NORMAL;
break;
}
return mode;
}
static spi_data_size_e _arg_to_datasize (unsigned long arg) {
spi_data_size_e datasize = 0;
int control = arg & SPI_DATA_SIZE_MASK;
switch (control) {
case SPI_DATA_4BIT:
datasize = SPI_DATA_SIZE_4BIT;
break;
case SPI_DATA_5BIT:
datasize = SPI_DATA_SIZE_5BIT;
break;
case SPI_DATA_6BIT:
datasize = SPI_DATA_SIZE_6BIT;
break;
case SPI_DATA_7BIT:
datasize = SPI_DATA_SIZE_7BIT;
break;
case SPI_DATA_8BIT:
datasize = SPI_DATA_SIZE_8BIT;
break;
case SPI_DATA_9BIT:
datasize = SPI_DATA_SIZE_9BIT;
break;
case SPI_DATA_10BIT:
datasize = SPI_DATA_SIZE_10BIT;
break;
case SPI_DATA_11BIT:
datasize = SPI_DATA_SIZE_11BIT;
break;
case SPI_DATA_12BIT:
datasize = SPI_DATA_SIZE_12BIT;
break;
case SPI_DATA_13BIT:
datasize = SPI_DATA_SIZE_13BIT;
break;
case SPI_DATA_14BIT:
datasize = SPI_DATA_SIZE_14BIT;
break;
case SPI_DATA_15BIT:
datasize = SPI_DATA_SIZE_15BIT;
break;
case SPI_DATA_16BIT:
datasize = SPI_DATA_SIZE_16BIT;
break;
default:
datasize = SPI_DATA_SIZE_8BIT;
break;
}
return datasize;
}
static spi_cs_e _arg_to_cs (int arg) {
spi_cs_e cs = 0;
int control = arg & SPI_NO_CS;
switch (control) {
case SPI_NO_CS:
cs = SPI_CS_DIS;
break;
default:
cs = SPI_CS_EN;
break;
}
return cs;
}
int spi_device_ioctl (file_t *f, int cmd, unsigned long arg) {
int ret = -1;
spi_config_t *config = NULL;
spi_dev_t *spi = (spi_dev_t *)f->node->i_arg;
ioc_spi_transfer_t *tranptr;
if (!spi) {
ddkc_dbg("spi is NULL,invalid and ignore\r\n");
return -EINVAL;
}
config = &spi->config;
ddkc_dbg("i_name:%s, spi:%p, cmd:%d, arg:0x%lx\r\n", f->node->i_name, spi, cmd, arg);
switch (cmd) {
case IOC_SPI_SET_CFLAG:
ret = hal_spi_finalize(spi);
if (ret) {
ddkc_warn("hal_spi_finalize failed, ret:%d\r\n", ret);
break;
}
config->role = _arg_to_role(arg);
config->firstbit = _arg_to_firstbit(arg);
config->mode = _arg_to_work_mode(arg);
config->t_mode = _arg_to_tranmode(arg);
config->data_size = _arg_to_datasize(arg);
config->cs = _arg_to_cs(arg);
ddkc_info("role:%d, firstbit:%d, mode:%d, t_mode:%d, data_size:%d, cs:%d\r\n",
config->role, config->firstbit, config->mode, config->t_mode, config->data_size, config->cs);
ret = hal_spi_init(spi);
if (ret) {
ddkc_warn("hal_spi_init failed, ret:%d\r\n", ret);
}
break;
case IOC_SPI_SET_FREQ:
ret = hal_spi_finalize(spi);
if (ret) {
ddkc_warn("hal_spi_finalize failed, ret:%d\r\n", ret);
break;
}
config->freq = arg;
ret = hal_spi_init(spi);
if (ret) {
ddkc_warn("hal_spi_init failed, ret:%d\r\n", ret);
}
break;
case IOC_SPI_SEND_RECV:
tranptr = (ioc_spi_transfer_t *)arg;
if(NULL == tranptr){
ddkc_warn("tranptr is null, ret:%d\r\n", ret);
break;
}
ret = hal_spi_send_recv(spi,tranptr->tx_buf,tranptr->rx_buf,tranptr->rx_size,0);
if (ret) {
ddkc_warn("hal_spi_send_recv failed, ret:%d\r\n", ret);
}
break;
case IOC_SPI_SEND_AND_RECV:
tranptr = (ioc_spi_transfer_t *)arg;
if(NULL == tranptr){
ddkc_warn("tranptr is null, ret:%d\r\n", ret);
break;
}
ret = hal_spi_send_and_recv(spi,tranptr->tx_buf,tranptr->tx_size,tranptr->rx_buf,tranptr->rx_size,0);
if (ret) {
ddkc_warn("hal_spi_send_and_recv failed, ret:%d\r\n", ret);
}
break;
case IOC_SPI_SEND_AND_SEND:
tranptr = (ioc_spi_transfer_t *)arg;
if(NULL == tranptr){
ddkc_warn("tranptr is null, ret:%d\r\n", ret);
break;
}
ret = hal_spi_send_and_send(spi,tranptr->tx_buf,tranptr->tx_size,tranptr->rx_buf,tranptr->rx_size,0);
if (ret) {
ddkc_warn("hal_spi_send_and_send failed, ret:%d\r\n", ret);
}
break;
case IOC_SPI_SET_SERIAL_LEN:
ret = hal_spi_finalize(spi);
if (ret) {
ddkc_warn("hal_spi_finalize failed, ret:%d\r\n", ret);
break;
}
config->serial_len = arg;
ret = hal_spi_init(spi);
if (ret) {
ddkc_warn("hal_spi_init failed, ret:%d\r\n", ret);
}
break;
default:
break;
}
return ret;
}
int spi_device_open (inode_t *node, file_t *f) {
int ret = -1;
spi_dev_t *spi = (spi_dev_t *)node->i_arg;
ddkc_dbg("%s - node:%p, i_name:%s, spi:%p\r\n", __func__, node, node->i_name, spi);
if (!spi) {
ddkc_dbg("spi is NULL,invalid and ignore\r\n");
return -EINVAL;
}
//TODO: check whether it is for console, special operation needed for console
/* open spi with default parameter */
ret = hal_spi_init(spi);
if (ret) {
ddkc_err("hal_spi_init failed, ret:%d\r\n", ret);
return ret;
}
hal_spi_recv_cb_reg(spi, NULL);
//spi->priv = f;
return 0;
}
int spi_device_close (file_t *f) {
int ret = 0;
ddkc_dbg("%s\r\n", __func__);
spi_dev_t *spi = (spi_dev_t *)f->node->i_arg;
//TODO: check whether it is for console, special operation needed for console
if (!spi) {
ddkc_dbg("f->node->i_arg is NULL, invalid and ignore\r\n");
return -EINVAL;
}
hal_spi_recv_cb_reg(spi, NULL);
/* open spi with default parameter */
ret = hal_spi_finalize(spi);
if (ret) {
ddkc_err("hal_spi_finalize failed, ret:%d\r\n", ret);
return ret;
}
return 0;
}
int spi_rx_notify (spi_dev_t *spi) {
struct pollfd *fd = NULL;
spi_poll_notify_t *spi_poll = NULL;
if (!spi) {
ddkc_err("spi should not be NULL in %s\r\n", __func__);
return -1;
}
ddkc_dbg("enter %s\r\n", __func__);
//fp = (file_t *)spi->priv;
spi_poll = &g_spi_notify[spi->port];
if (spi_poll->notify) {
mutex_lock(&spi_poll->mutex);
spi_poll->flag = true;
fd = (struct pollfd *)spi_poll->fd;
fd->revents |= POLLIN;
/* add POLLOUT by default */
fd->revents |= POLLOUT;
(*(spi_poll->notify)) (fd, spi_poll->arg);
spi_poll->notify = NULL;
spi_poll->fd = NULL;
spi_poll->arg = NULL;
hal_spi_recv_cb_reg(spi, NULL);
mutex_unlock(&spi_poll->mutex);
} else {
ddkc_err("!!!impossible case happened!!! spi_poll->notify is NULL\r\n");
}
return 0;
}
int spi_device_poll (file_t *f, int flag, poll_notify_t notify, void *fd, void *arg) {
spi_poll_notify_t *spi_poll = NULL;
spi_dev_t *spi = (spi_dev_t *)f->node->i_arg;
//TODO: check whether it is for console, special operation needed for console
if (!spi) {
ddkc_dbg("f->node->i_arg is NULL, invalid and ignore\r\n");
return -EINVAL;
}
ddkc_dbg("enter %s, fd:%p, arg:%p, notify:%p\r\n", __func__, fd, arg, notify);
spi_poll = &g_spi_notify[spi->port];
if (!fd) {
mutex_lock(&spi_poll->mutex);
hal_spi_recv_cb_reg(spi, NULL);
spi_poll->notify = NULL;
spi_poll->fd = NULL;
spi_poll->arg = NULL;
mutex_unlock(&spi_poll->mutex);
return 0;
}
if (!spi_poll->flag) {
mutex_lock(&spi_poll->mutex);
spi_poll->notify = notify;
spi_poll->fd = (struct pollfd *)fd;
spi_poll->arg = arg;
hal_spi_recv_cb_reg(spi, spi_rx_notify);
((struct pollfd *)fd)->revents &= ~POLLIN;
mutex_unlock(&spi_poll->mutex);
} else {
ddkc_warn("spi_poll->flag is true, notify user directly\r\n");
((struct pollfd *)fd)->events |= POLLIN;
(*notify)(fd, arg);
}
// add POLLOUT to events by default
((struct pollfd *)fd)->events |= POLLOUT;
return 0;
}
/************************** device ****************************/
subsys_file_ops_t spi_device_fops = {
.open = spi_device_open,
.close = spi_device_close,
.read = spi_device_read,
.write = spi_device_write,
.ioctl = spi_device_ioctl,
.poll = spi_device_poll,
.lseek = NULL,
};
int spi_device_init (struct u_platform_device *pdev) {
// make sure 0 is returned if init operation success
// or aos_dev_reg procedure will break and no device node will be registered
ddkc_dbg("%s\r\n", __func__);
return 0;
}
int spi_device_deinit (struct u_platform_device *pdev) {
ddkc_dbg("%s\r\n", __func__);
return 0;
}
int spi_device_pm (struct u_platform_device *pdev, u_pm_ops_t state) {
ddkc_dbg("%s\r\n", __func__);
return 0;
}
struct subsys_drv spi_device_drv = {
.drv_name = "spi",
.init = spi_device_init,
.deinit = spi_device_deinit,
.pm = spi_device_pm,
};
struct subsys_dev *g_spi_device_array[PLATFORM_SPI_NUM];
static spi_dev_t g_def_setting = {
.port = 0,
.config = {
.role = SPI_ROLE_MASTER,
.firstbit = SPI_FIRSTBIT_MSB,
.mode = SPI_WORK_MODE_0,
.t_mode = SPI_TRANSFER_NORMAL,
.freq = DEFAULT_SPI_FREQ,
.serial_len = DEFAULT_SPI_SERAIL_LEN,
.data_size = SPI_DATA_SIZE_8BIT,
.cs = SPI_CS_EN,
},
.priv = NULL,
};
int vfs_spi_drv_init (void) {
int i = 0;
int j = 0;
int ret = 0;
int node_name_len = 0;
struct subsys_dev **ppsdev = NULL;
ddkc_info("spi vfs driver init starts\r\n");
node_name_len = strlen(SPI_DEV_NAME_FORMAT) + 1;
memset(g_spi_notify, 0, sizeof(g_spi_notify));
memset(g_spi_device_array, 0, sizeof(g_spi_device_array));
ppsdev = g_spi_device_array;
for (i = 0; i < PLATFORM_SPI_NUM; i++) {
spi_dev_t *spi_dev = malloc(sizeof(*spi_dev));
*ppsdev = malloc(sizeof(struct subsys_dev) + node_name_len);
if (!spi_dev || !(*ppsdev)) {
ddkc_info("malloc for spi_dev:%p or subsys_dev:%p failed, \r\n", spi_dev, *ppsdev);
if (spi_dev) {
free(spi_dev);
}
if (*ppsdev) {
free(*ppsdev);
*ppsdev = NULL;
}
goto err;
}
memset(*ppsdev, 0, sizeof(struct subsys_dev) + node_name_len);
(*ppsdev)->node_name = (char *)((*ppsdev) + 1);
snprintf((*ppsdev)->node_name, node_name_len, SPI_DEV_NAME_FORMAT, i);
ddkc_dbg("*ppsdev:%p, node_name:%s, (*ppsdev) + 1:%p, sizeof(struct subsys_dev):%d\r\n",
*ppsdev, (*ppsdev)->node_name, (*ppsdev) + 1, sizeof(struct subsys_dev));
(*ppsdev)->permission = 0;
// please refer to definitions in enum SUBSYS_BUS_TYPE
(*ppsdev)->type = BUS_TYPE_PLATFORM;
memcpy(spi_dev, &g_def_setting, sizeof(*spi_dev));
spi_dev->port = i;
// user_data will be passed to open operation via node->i_arg
(*ppsdev)->user_data = spi_dev;
mutex_init(&g_spi_notify[i].mutex);
ret = aos_dev_reg(*ppsdev, &spi_device_fops, &spi_device_drv);
if (ret) {
ddkc_err("aos_dev_reg for pwm%d failed, ret:%d\r\n", i, ret);
free(spi_dev);
free(*ppsdev);
*ppsdev = NULL;
goto err;
}
ppsdev++;
}
ddkc_info("spi vfs driver init finish, ret:%d\r\n", ret);
return 0;
err:
ppsdev = g_spi_device_array;
for (j = 0; j < i; j++) {
if (*ppsdev) {
aos_dev_unreg(*ppsdev);
ddkc_info("free memory for spi%d\r\n", j);
if ((*ppsdev)->user_data)
free((*ppsdev)->user_data);
free(*ppsdev);
*ppsdev = NULL;
}
ppsdev++;
}
ddkc_err("spi vfs driver init failed, ret:%d\r\n", ret);
return ret;
}
//FIXME: not implement for pangu now.
#ifndef CONFIG_CHIP_PANGU
VFS_DRIVER_ENTRY(vfs_spi_drv_init)
#endif
#endif
| YifuLiu/AliOS-Things | components/drivers/peripheral/spi/src/spi_dev.c | C | apache-2.0 | 16,352 |
/*
* Copyright (C) 2015-2021 Alibaba Group Holding Limited
*/
#include <stdlib.h>
#include <fcntl.h>
#include <sys/ioctl.h>
#include "aos/vfs.h"
#include <vfsdev/timer_dev.h>
#include <drivers/char/u_device.h>
#include <drivers/u_ld.h>
#if AOS_COMP_CLI
#include "aos/cli.h"
#endif
void vfs_timer_handler (void *arg) {
ddkc_info("enter %s arg:%p, fd = %d\r\n", __func__, arg, *((int *)arg));
return;
}
int vfs_timer_test(int id)
{
int ret = 0;
int fd = 0;
timer_alarm_t alarm;
timer_alarm_t ralarm;
char name[16] = {0};
snprintf(name, sizeof(name), "/dev/timer%d", id);
fd = open(name, 0);
ddkc_info("open %s %s, fd:%d\r\n", name, fd >= 0 ? "success" : "fail", fd);
if (fd >= 0) {
// correct parameters
alarm.arg = &fd;
alarm.cb = vfs_timer_handler;
alarm.period = 1000000;
alarm.auto_reload = true;
/*period*/
ret = ioctl(fd, IOC_TIMER_IRQP_SET, (unsigned long)&alarm);
ddkc_info("ioctl on IOC_TIMER_IRQP_SET %s, ret:%d\r\n", ret ? "fail" : "succeed", ret);
ret = ioctl(fd, IOC_TIMER_CONTROL, (unsigned long)IO_TIMER_START);
ddkc_info("start timer %s, ret:%d\r\n", ret ? "fail" : "succeed", ret);
sleep(5);
alarm.period = 500000;
ret = ioctl(fd, IOC_TIMER_IRQP_SET, (unsigned long)&alarm);
ddkc_info("ioctl on IOC_TIMER_IRQP_SET %s, ret:%d\r\n", ret ? "fail" : "succeed", ret);
sleep(5);
ret = ioctl(fd, IOC_TIMER_CONTROL, (unsigned long)IO_TIMER_STOP);
ddkc_info("stop timer %s, ret:%d\r\n", ret ? "fail" : "succeed", ret);
ret = ioctl(fd, IOC_TIMER_IRQP_GET, (unsigned long)&ralarm);
ddkc_info("ioctl on IOC_TIMER_IRQP_GET %s, ret:%d\r\n", ret ? "fail" : "succeed", ret);
/*oneshot*/
alarm.auto_reload = false;
ret = ioctl(fd, IOC_TIMER_IRQP_SET, (unsigned long)&alarm);
ddkc_info("ioctl on IOC_TIMER_IRQP_SET %s, ret:%d\r\n", ret ? "fail" : "succeed", ret);
ret = ioctl(fd, IOC_TIMER_CONTROL, (unsigned long)IO_TIMER_START);
ddkc_info("start timer %s, ret:%d\r\n", ret ? "fail" : "succeed", ret);
sleep(5);
ret = ioctl(fd, IOC_TIMER_RELOAD, (unsigned long)0);
ddkc_info("reload timer %s, ret:%d\r\n", ret ? "fail" : "succeed", ret);
sleep(5);
ret = ioctl(fd, IOC_TIMER_CONTROL, (unsigned long)IO_TIMER_STOP);
ddkc_info("stop timer %s, ret:%d\r\n", ret ? "fail" : "succeed", ret);
ret = ioctl(fd, IOC_TIMER_IRQP_GET, (unsigned long)&ralarm);
ddkc_info("ioctl on IOC_TIMER_IRQP_GET %s, ret:%d\r\n", ret ? "fail" : "succeed", ret);
ddkc_info("ralarm period:%ld, cb:%p, arg:%p, auto_reload:%d\r\n",
ralarm.period, ralarm.cb, ralarm.arg, ralarm.auto_reload);
close(fd);
}
return 0;
}
static void vfs_timer_cli_cmd(int argc, char **argv)
{
int ret = 0;
int index = argc > 1 ? atoi(argv[1]) : 1;
ddkc_info("argc:%d, index:%d\r\n", argc, index);
ret = vfs_timer_test(index);
ddkc_info("vfs timer test %s, ret:%d\r\n", ret ? "failed" : "success", ret);
return;
}
#if AOS_COMP_CLI
/* reg args: fun, cmd, description*/
ALIOS_CLI_CMD_REGISTER(vfs_timer_cli_cmd, hal_timer_example, timer vfs example)
#endif
| YifuLiu/AliOS-Things | components/drivers/peripheral/timer/example/timer_example.c | C | apache-2.0 | 3,285 |
/**
* @file timer.h
* @copyright Copyright (C) 2015-2018 Alibaba Group Holding Limited
*/
#ifndef HAL_TIMER_H
#define HAL_TIMER_H
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup hal_timer TIMER
* timer hal API.
*
* @{
*/
#include <stdint.h>
#define TIMER_RELOAD_AUTO 1 /**< timer reload automatic */
#define TIMER_RELOAD_MANU 2 /**< timer reload manual */
/* Define timer handle function type */
typedef void (*hal_timer_cb_t)(void *arg);
/* Define timer config args */
typedef struct {
uint32_t period; /**< timer period, us */
uint8_t reload_mode; /**< auto reload or not */
hal_timer_cb_t cb; /**< timer handle when expired */
void *arg; /**< timer handle args */
} timer_config_t;
/* Define timer dev handle */
typedef struct {
int8_t port; /**< timer port */
timer_config_t config; /**< timer config */
void *priv; /**< priv data */
} timer_dev_t;
/**
* init a hardware timer
*
* @param[in] tim timer device
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_timer_init(timer_dev_t *tim);
/**
* start a hardware timer
*
* @param[in] tim timer device
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_timer_start(timer_dev_t *tim);
/**
* stop a hardware timer
*
* @param[in] tim timer device
*
* @return none
*/
void hal_timer_stop(timer_dev_t *tim);
/**
* change the config of a hardware timer
*
* @param[in] tim timer device
* @param[in] para timer config
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_timer_para_chg(timer_dev_t *tim, timer_config_t para);
/**
* De-initialises an TIMER interface, Turns off an TIMER hardware interface
*
* @param[in] tim timer device
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_timer_finalize(timer_dev_t *tim);
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* HAL_TIMER_H */
| YifuLiu/AliOS-Things | components/drivers/peripheral/timer/include/aos/hal/timer.h | C | apache-2.0 | 1,972 |
/*
* Copyright (C) 2015-2021 Alibaba Group Holding Limited
*/
#ifndef _IO_TIMER_H_
#define _IO_TIMER_H_
#include <stdbool.h>
#define IOC_TIMER_BASE 'T'
#define IOC_TIMER_IRQP_SET IOC_TIMER_BASE + 1 // set timer parameters
#define IOC_TIMER_IRQP_GET IOC_TIMER_BASE + 2 // get timer parameters
#define IOC_TIMER_CONTROL IOC_TIMER_BASE + 3 // start/stop timer
#define IOC_TIMER_RELOAD IOC_TIMER_BASE + 4 // auto reload timer or not
#define IO_TIMER_START 1
#define IO_TIMER_STOP 0
typedef void (*alarm_timer_cb_t)(void *arg);
typedef struct timer_alarm {
void *arg;
alarm_timer_cb_t cb;
unsigned long period;
bool auto_reload;
} timer_alarm_t;
int vfs_timer_drv_init (void);
#endif //_IO_TIMER_H_
| YifuLiu/AliOS-Things | components/drivers/peripheral/timer/include/vfsdev/timer_dev.h | C | apache-2.0 | 720 |
/*
* Copyright (C) 2015-2021 Alibaba Group Holding Limited
*/
#include <poll.h>
#include <aos/hal/timer.h>
#include <vfsdev/timer_dev.h>
#include <devicevfs/devicevfs.h>
#ifdef CONFIG_TIMER_NUM
#define PLATFORM_TIMER_NUM CONFIG_TIMER_NUM
#else
#define PLATFORM_TIMER_NUM 4
#endif
#if (PLATFORM_TIMER_NUM > 0)
// TIMER device node will be named with "/dev/timer<x>", where <x> is timer port id
#define TIMER_DEV_NAME_FORMAT "timer%d"
typedef struct vfs_timer {
bool started;
timer_dev_t dev;
} vfs_timer_t;
int timer_device_ioctl (file_t *f, int cmd, unsigned long arg) {
int ret = 0;
timer_alarm_t *alarm;
timer_config_t *config = NULL;
vfs_timer_t *vt = (vfs_timer_t *)f->node->i_arg;
timer_dev_t *timer_dev = &vt->dev;
ddkc_dbg("cmd:0x%x, arg:0x%lx\r\n", cmd, arg);
switch (cmd) {
case IOC_TIMER_CONTROL:
ddkc_dbg("IOC_TIMER_CONTROL, arg:%ld\r\n", arg);
if (arg == IO_TIMER_START) {
if (!vt->started) {
ret = hal_timer_start(timer_dev);
vt->started = ret ? false : true;
} else
ddkc_warn("timer%d is already started\r\n", vt->dev.port);
} else {
if (vt->started)
hal_timer_stop(timer_dev);
else
ddkc_warn("timer%d is not started yet\r\n", vt->dev.port);
// anyway, set started flag to false
vt->started = false;
}
if (ret) {
ddkc_err("timer control[%ld] failed, ret:%d\r\n", arg, ret);
}
break;
case IOC_TIMER_IRQP_SET:
ddkc_dbg("IOC_TIMER_IRQP_SET\r\n");
alarm = (timer_alarm_t *)(arg);
if (!alarm || !alarm->cb || !alarm->period) {
ddkc_err("invalid alarm:%p, handler:%p or period:%ld\r\n",
alarm, alarm ? alarm->cb: NULL, alarm ? alarm->period : 0);
return -EINVAL;
}
// TODO: shall we use local variable and store parameters back to timer_dev->config after set operation success?
config = &timer_dev->config;
config->cb = alarm->cb;
config->arg = alarm->arg;
config->period = alarm->period;
config->reload_mode = alarm->auto_reload ? TIMER_RELOAD_AUTO : TIMER_RELOAD_MANU;
if (!vt->started) {
ret = hal_timer_init(timer_dev);
} else {
ret = hal_timer_para_chg(timer_dev, *config);
/* restart it */
hal_timer_stop(timer_dev);
ret = hal_timer_start(timer_dev);
vt->started = ret ? false : true;
if (ret) {
ddkc_err("restart timer failed， ret:%d\r\n", ret);
}
}
if (ret) {
ddkc_err("set timer param failed, ret:%d\r\n", ret);
}
break;
case IOC_TIMER_RELOAD:
ddkc_dbg("IOC_TIMER_RELOAD\r\n");
config = &timer_dev->config;
ret = hal_timer_para_chg(timer_dev, *config);
if (ret) {
ddkc_err("start timer failed, ret:%d\r\n", ret);
}
/* restart it if it was started */
if (vt->started) {
hal_timer_stop(timer_dev);
ret = hal_timer_start(timer_dev);
vt->started = ret ? false : true;
if (ret) {
ddkc_err("restart timer failed， ret:%d\r\n", ret);
}
}
break;
case IOC_TIMER_IRQP_GET:
ddkc_dbg("IOC_TIMER_IRQP_GET\r\n");
config = &timer_dev->config;
if (!arg) {
ddkc_err("invalid arg:0x%lx\r\n", arg);
return -EINVAL;
}
alarm = (timer_alarm_t *)(arg);
alarm->auto_reload = config->reload_mode == TIMER_RELOAD_AUTO ? true : false;
alarm->period = config->period;
alarm->cb = config->cb;
alarm->arg = config->arg;
break;
default:
ddkc_err("invalid cmd:%d\r\n", cmd);
break;
}
return ret;
}
int timer_device_open (inode_t *node, file_t *f) {
vfs_timer_t *vt = (vfs_timer_t *)f->node->i_arg;
timer_dev_t *timer_dev = &vt->dev;
ddkc_dbg("%s opened, port:%d\r\n", node->i_name, timer_dev->port);
return 0;
}
int timer_device_close (file_t *f) {
int ret = 0;
vfs_timer_t *vt = (vfs_timer_t *)f->node->i_arg;
timer_dev_t *timer_dev = &vt->dev;
ddkc_dbg("%s closed, port:%d\r\n", f->node->i_name, timer_dev->port);
if (vt->started) {
hal_timer_stop(timer_dev);
vt->started = false;
}
ret = hal_timer_finalize(timer_dev);
if (ret) {
ddkc_err("hal_timer_finalize on timer%d failed, ret=%d\r\n", timer_dev->port, ret);
}
memset(&timer_dev->config, 0, sizeof(timer_dev->config));
return 0;
}
/************************** device ****************************/
subsys_file_ops_t timer_device_fops = {
.open = timer_device_open,
.close = timer_device_close,
.read = NULL,
.write = NULL,
.ioctl = timer_device_ioctl,
.poll = NULL,
};
int timer_device_init (struct u_platform_device *pdev) {
// make sure 0 is returned if init operation success
// or aos_dev_reg procedure will break and no device node will be registered
ddkc_dbg("%s\r\n", __func__);
return 0;
}
int timer_device_deinit (struct u_platform_device *pdev) {
ddkc_dbg("%s\r\n", __func__);
return 0;
}
int timer_device_pm (struct u_platform_device *pdev, u_pm_ops_t state) {
ddkc_dbg("%s\r\n", __func__);
return 0;
}
struct subsys_drv timer_device_drv = {
.drv_name = "timer",
.init = timer_device_init,
.deinit = timer_device_deinit,
.pm = timer_device_pm,
};
struct subsys_dev *g_timer_device_array[PLATFORM_TIMER_NUM];
int vfs_timer_drv_init (void) {
int i = 0;
int j = 0;
int ret = 0;
int node_name_len = 0;
struct subsys_dev **ppsdev = NULL;
ddkc_dbg("timer vfs driver init starts\r\n");
node_name_len = strlen(TIMER_DEV_NAME_FORMAT) + 1;
ddkc_dbg("node_name_len:%d\r\n", node_name_len);
memset(g_timer_device_array, 0, sizeof(g_timer_device_array));
ppsdev = g_timer_device_array;
for (i = 0; i < PLATFORM_TIMER_NUM; i++) {
vfs_timer_t *vt = malloc(sizeof(vfs_timer_t));
*ppsdev = malloc(sizeof(struct subsys_dev) + node_name_len);
if (!(*ppsdev) || !vt) {
ddkc_err("malloc failed, *ppsdev:%p, vt:%p\r\n", *ppsdev, vt);
if (*ppsdev) {
free(*ppsdev);
*ppsdev = NULL;
}
if (vt)
free(vt);
goto err;
}
memset(*ppsdev, 0, sizeof(struct subsys_dev) + node_name_len);
memset(vt, 0, sizeof(*vt));
// vfs_timer_t's port should be remained during the whole driver life
vt->dev.port = i;
(*ppsdev)->node_name = (char *)((*ppsdev) + 1);
snprintf((*ppsdev)->node_name, node_name_len, TIMER_DEV_NAME_FORMAT, i);
ddkc_dbg("*ppsdev:%p, node_name:%s , (*ppsdev) + 1:%p, sizeof(struct subsys_dev):%d\r\n",
*ppsdev, (*ppsdev)->node_name, (*ppsdev) + 1, sizeof(struct subsys_dev));
(*ppsdev)->permission = 0;
// please refer to definitions in enum SUBSYS_BUS_TYPE
(*ppsdev)->type = BUS_TYPE_PLATFORM;
// user_data will be passed to open operation via node->i_arg
(*ppsdev)->user_data = vt;
ret = aos_dev_reg(*ppsdev, &timer_device_fops, &timer_device_drv);
if (ret) {
ddkc_err("aos_dev_reg for timer%d failed, ret:%d\r\n", i, ret);
free(vt);
free(*ppsdev);
*ppsdev = NULL;
goto err;
}
ppsdev++;
}
ddkc_dbg("timer vfs driver init finish, ret:%d\r\n", ret);
return 0;
err:
ppsdev = g_timer_device_array;
for (j = 0; j < i; j++) {
// shall uninstall timer devices who are already registered
if (*ppsdev) {
aos_dev_unreg(*ppsdev);
ddkc_info("free memory for timer%d\r\n", j);
if ((*ppsdev)->user_data)
free((*ppsdev)->user_data);
free(*ppsdev);
*ppsdev = NULL;
}
ppsdev++;
}
ddkc_err("timer vfs driver init failed, ret:%d\r\n", ret);
return ret;
}
VFS_DRIVER_ENTRY(vfs_timer_drv_init)
__weak int32_t hal_timer_init(timer_dev_t *tim) {
ddkc_dbg("%s\r\n", __func__);
return 0;
}
__weak int32_t hal_timer_start(timer_dev_t *tim) {
ddkc_dbg("__weak %s\r\n", __func__);
return 0;
}
__weak void hal_timer_stop(timer_dev_t *tim) {
ddkc_dbg("__weak %s\r\n", __func__);
return;
}
__weak int32_t hal_timer_para_chg(timer_dev_t *tim, timer_config_t para) {
ddkc_dbg("__weak %s\r\n", __func__);
return 0;
}
__weak int32_t hal_timer_finalize(timer_dev_t *tim) {
ddkc_dbg("__weak %s\r\n", __func__);
return 0;
}
#endif
| YifuLiu/AliOS-Things | components/drivers/peripheral/timer/src/timer_dev.c | C | apache-2.0 | 9,208 |
/*
* Copyright (C) 2015-2021 Alibaba Group Holding Limited
*/
#include <fcntl.h>
#include <sys/ioctl.h>
#include "aos/vfs.h"
#if AOS_COMP_CLI
#include "aos/cli.h"
#endif
#include <drivers/u_ld.h>
#include <drivers/ddkc_log.h>
#include <vfsdev/uart_dev.h>
#include <drivers/char/u_device.h>
static void uart_read_test(char *buf, int len, int argc, char **argv);
static void uart_write_test(char *buf, int len, int argc, char **argv);
static void uart_echo_test(char *buf, int len, int argc, char **argv);
static void uart_test_usage(void) {
ddkc_info("uart test purpose, please follow the following commands format\n");
ddkc_info("\tuartw <port_id> <string>\n");
ddkc_info("\t\t<port_id>: target UART's port id\n");
ddkc_info("\t\t<string>: target string to be sent via UART\n");
ddkc_info("\tuartr <port_id>\n");
ddkc_info("\t\t<port_id>: target UART's port id\n");
}
static void uart_write_test(char *buf, int len, int argc, char **argv)
{
int i = 0;
int j = 0;
int ret = 0;
int port_id = 0;
char *string = 0;
int fd = -1;
char buffer[50] = {0};
char dev_name[16] = {0};
ddkc_loud("buf:%s, len:%d\n", buf, len);
for (i = 0; i < argc; i++) {
ddkc_loud("argv[%d]:%s\n", i, *(argv + i));
}
if (argc <= 2) {
uart_test_usage();
return;
}
port_id = atoi(argv[1]);
string = argv[2];
snprintf(dev_name, sizeof(dev_name), "/dev/ttyUART%d", port_id );
ddkc_info("opening device:%s\r\n", dev_name);
fd = open(dev_name, 0);
if (fd < 0) {
ddkc_err("open %s failed\r\n", dev_name);
return;
}
ddkc_info("set baudrate to 1500000\r\n");
ret = ioctl(fd, IOC_UART_SET_CFLAG, B1500000 | CS8);
if (ret) {
ddkc_err("ioctl on %s failed, ret:%d\r\n", dev_name, ret);
close(fd);
return;
}
ddkc_info("set baudrate done\r\n");
ddkc_info("writing %s\r\n", string);
ret = write(fd, string, strlen(string));
ddkc_info("write return %d\r\n", ret);
ddkc_info("closing %s\r\n", dev_name);
close(fd);
ddkc_info("%s closed\r\n", dev_name);
return;
}
static void uart_read_test(char *buf, int len, int argc, char **argv)
{
int i = 0;
int j = 0;
int ret = 0;
int port_id = 0;
int ms = 0;
char *string = 0;
int fd = -1;
char buffer[50] = {0};
char dev_name[16] = {0};
ddkc_loud("buf:%s, len:%d\n", buf, len);
for (i = 0; i < argc; i++) {
ddkc_loud("argv[%d]:%s\n", i, *(argv + i));
}
if (argc <= 2) {
uart_test_usage();
return;
}
port_id = atoi(argv[1]);
ms = atoi(argv[2]);
snprintf(dev_name, sizeof(dev_name), "/dev/ttyUART%d", port_id );
ddkc_info("opening device:%s\r\n", dev_name);
fd = open(dev_name, 0);
if (fd < 0) {
ddkc_err("open %s failed\r\n", dev_name);
return;
}
ddkc_info("set baudrate to 1500000\r\n");
ret = ioctl(fd, IOC_UART_SET_CFLAG, B1500000 | CS8);
if (ret) {
ddkc_err("ioctl on %s failed, ret:%d\r\n", dev_name, ret);
close(fd);
return;
}
ddkc_info("set baudrate done\r\n");
do {
ret = read(fd, buffer, sizeof(buffer));
if (ret > 0) {
for (i = 0; i < ret; i++)
printf("%c", buffer[i]);
printf("\r\n");
}
memset(buffer, 0, sizeof(buffer));
usleep(100000);
j++;
} while(j < (ms/100));
ddkc_info("closing %s\r\n", dev_name);
close(fd);
ddkc_info("%s closed\r\n", dev_name);
return;
}
static void uart_echo_test(char *buf, int len, int argc, char **argv)
{
int i = 0;
int j = 0;
int ret = 0;
int port_id = 0;
int ms = 0;
char *string = 0;
int fd = -1;
char buffer[50] = {0};
char dev_name[16] = {0};
ddkc_loud("buf:%s, len:%d\n", buf, len);
for (i = 0; i < argc; i++) {
ddkc_loud("argv[%d]:%s\n", i, *(argv + i));
}
if (argc <= 2) {
uart_test_usage();
return;
}
port_id = atoi(argv[1]);
ms = atoi(argv[2]);
snprintf(dev_name, sizeof(dev_name), "/dev/ttyUART%d", port_id );
ddkc_info("opening device:%s\r\n", dev_name);
fd = open(dev_name, 0);
if (fd < 0) {
ddkc_err("open %s failed\r\n", dev_name);
return;
}
ddkc_info("set baudrate to 1500000\r\n");
ret = ioctl(fd, IOC_UART_SET_CFLAG, B1500000 | CS8);
if (ret) {
ddkc_err("ioctl on %s failed, ret:%d\r\n", dev_name, ret);
close(fd);
return;
}
ddkc_info("set baudrate done\r\n");
do {
ret = read(fd, buffer, sizeof(buffer));
if (ret > 0) {
for (i = 0; i < ret; i++)
printf("%c", buffer[i]);
printf("\r\n");
}
ret = write(fd, buffer, sizeof(buffer));
if (ret != sizeof(buffer)) {
ddkc_warn("write error, ret:%d\r\n", ret);
}
memset(buffer, 0, sizeof(buffer));
usleep(100000);
j++;
} while(j < (ms/100));
ddkc_info("closing %s\r\n", dev_name);
close(fd);
ddkc_info("%s closed\r\n", dev_name);
return;
}
#if AOS_COMP_CLI
struct cli_command vfs_uart_cli_cmds[] = {
{ "uartw", "uart tx test", uart_write_test, },
{ "uartr", "uart rx test", uart_read_test, },
{ "uarte", "uart echo test", uart_echo_test, },
};
int vfs_uart_test_cmd_init(void)
{
return aos_cli_register_commands(&vfs_uart_cli_cmds[0], sizeof(vfs_uart_cli_cmds) / sizeof(vfs_uart_cli_cmds[0]));
}
POST_DRIVER_ENTRY(vfs_uart_test_cmd_init)
#endif /* AOS_COMP_CLI */
| YifuLiu/AliOS-Things | components/drivers/peripheral/uart/example/uart_example.c | C | apache-2.0 | 5,626 |
/**
* @file uart.h
* @copyright Copyright (C) 2015-2018 Alibaba Group Holding Limited
*/
#ifndef HAL_UART_H
#define HAL_UART_H
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup hal_uart UART
* uart hal API.
*
* @{
*/
#include <stdint.h>
/* Define the wait forever timeout macro */
#define HAL_WAIT_FOREVER 0xFFFFFFFFU
#ifndef HAL_UART_STDIO_PORT
#define HAL_UART_STDIO_PORT 0
#endif
/*
* UART data width
*/
typedef enum {
DATA_WIDTH_5BIT,
DATA_WIDTH_6BIT,
DATA_WIDTH_7BIT,
DATA_WIDTH_8BIT,
DATA_WIDTH_9BIT
} hal_uart_data_width_t;
/*
* UART stop bits
*/
typedef enum {
STOP_BITS_1,
STOP_BITS_2
} hal_uart_stop_bits_t;
/*
* UART flow control
*/
typedef enum {
FLOW_CONTROL_DISABLED, /**< Flow control disabled */
FLOW_CONTROL_CTS, /**< Clear to send, yet to send data */
FLOW_CONTROL_RTS, /**< Require to send, yet to receive data */
FLOW_CONTROL_CTS_RTS /**< Both CTS and RTS flow control */
} hal_uart_flow_control_t;
/*
* UART parity
*/
typedef enum {
NO_PARITY, /**< No parity check */
ODD_PARITY, /**< Odd parity check */
EVEN_PARITY /**< Even parity check */
} hal_uart_parity_t;
/*
* UART mode
*/
typedef enum {
MODE_TX, /**< Uart in send mode */
MODE_RX, /**< Uart in receive mode */
MODE_TX_RX /**< Uart in send and receive mode */
} hal_uart_mode_t;
/*
* UART configuration
*/
typedef struct {
uint32_t baud_rate; /**< Uart baud rate */
hal_uart_data_width_t data_width; /**< Uart data width */
hal_uart_parity_t parity; /**< Uart parity check mode */
hal_uart_stop_bits_t stop_bits; /**< Uart stop bit mode */
hal_uart_flow_control_t flow_control; /**< Uart flow control mode */
hal_uart_mode_t mode; /**< Uart send/receive mode */
} uart_config_t;
/*
* UART dev handle
*/
typedef struct {
uint8_t port; /**< uart port */
uart_config_t config; /**< uart config */
void *priv; /**< priv data */
} uart_dev_t;
typedef int32_t (*uart_rx_cb)(uart_dev_t *uart);
/**
* Initialises a UART interface
*
*
* @param[in] uart the interface which should be initialised
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_uart_init(uart_dev_t *uart);
/**
* Transmit data on a UART interface
*
* @param[in] uart the UART interface
* @param[in] data pointer to the start of data
* @param[in] size number of bytes to transmit
* @param[in] timeout timeout in milisecond, set this value to HAL_WAIT_FOREVER
* if you want to wait forever
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_uart_send(uart_dev_t *uart, const void *data, uint32_t size, uint32_t timeout);
/**
* Transmit data on a UART interface with polling
*
* @param[in] uart the UART interface
* @param[in] data pointer to the start of data
* @param[in] size number of bytes to transmit
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_uart_send_poll(uart_dev_t *uart, const void *data, uint32_t size);
/**
* Receive data on a UART interface
*
* @param[in] uart the UART interface
* @param[out] data pointer to the buffer which will store incoming data
* @param[in] expect_size number of bytes to receive
* @param[in] timeout timeout in milisecond, set this value to HAL_WAIT_FOREVER
* if you want to wait forever
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_uart_recv(uart_dev_t *uart, void *data, uint32_t expect_size, uint32_t timeout);
/**
* Receive data on a UART interface with polling
*
* @param[in] uart the UART interface
* @param[out] data pointer to the buffer which will store incoming data
* @param[in] expect_size number of bytes to receive
* @param[in] timeout timeout in milisecond, set this value to HAL_WAIT_FOREVER
* if you want to wait forever
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_uart_recv_poll(uart_dev_t *uart, void *data, uint32_t expect_size);
/**
* Receive data on a UART interface
*
* @param[in] uart the UART interface
* @param[out] data pointer to the buffer which will store incoming data
* @param[in] expect_size number of bytes to receive
* @param[out] recv_size number of bytes trully received
* @param[in] timeout timeout in milisecond, set this value to HAL_WAIT_FOREVER
* if you want to wait forever
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_uart_recv_II(uart_dev_t *uart, void *data, uint32_t expect_size,
uint32_t *recv_size, uint32_t timeout);
/*
*
* @param [in] uart the UART interface
* @param [in] rx_cb Non-zero pointer is the rx callback handler;
* NULL pointer for rx_cb unregister operation
* uart in rx_cb must be the same pointer with uart pointer passed to hal_uart_recv_cb_reg
* driver must notify upper layer by calling rx_cb if data is available in UART's hw or rx buffer
* @return 0: on success, negative no.: if an error occured with any step
*/
int32_t hal_uart_recv_cb_reg(uart_dev_t *uart, uart_rx_cb cb);
/**
* Deinitialises a UART interface
*
* @param[in] uart the interface which should be deinitialised
*
* @return 0 : on success, otherwise is error
*/
int32_t hal_uart_finalize(uart_dev_t *uart);
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* HAL_UART_H */
| YifuLiu/AliOS-Things | components/drivers/peripheral/uart/include/aos/hal/uart.h | C | apache-2.0 | 5,706 |
/*
* Copyright (C) 2020-2021 Alibaba Group Holding Limited
*/
#ifndef AOS_TTY_H
#define AOS_TTY_H
#include <termios.h>
#include <aos/device.h>
/**
* @defgroup tty_api TTY
* @ingroup driver_api
* @brief AOS API for TTY.
* @{
*/
typedef aos_dev_ref_t aos_tty_ref_t;
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Get a TTY device.
* @param ref TTY ref to operate.
* @param id TTY device ID.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_tty_get(aos_tty_ref_t *ref, uint32_t id);
/**
* @brief Release a TTY device.
* @param ref TTY ref to operate.
* @return None.
*/
void aos_tty_put(aos_tty_ref_t *ref);
/**
* @brief Get the parameters associated with a TTY device.
* @param ref TTY ref to operate.
* @param termios POSIX-compliant termios structure.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_tty_get_attr(aos_tty_ref_t *ref, struct termios *termios);
/**
* @brief Set the parameters associated with a TTY device.
* @param ref TTY ref to operate.
* @param optional_actions Specifie when the changes take effect.
* @param termios POSIX-compliant termios structure.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_tty_set_attr(aos_tty_ref_t *ref, int optional_actions, const struct termios *termios);
/**
* @brief Read data from a TTY device.
* @param ref TTY ref to operate.
* @param buf Data buffer.
* @param count Attempt to read up to count bytes.
* @param timeout Timeout in milliseconds.
* @return > 0: the number of bytes read; < 0: on failure.
*/
ssize_t aos_tty_read(aos_tty_ref_t *ref, void *buf, size_t count, uint32_t timeout);
/**
* @brief Write data to a TTY device.
* @param ref TTY ref to operate.
* @param buf Data buffer.
* @param count Attempt to write up to count bytes.
* @param timeout Timeout in milliseconds.
* @return > 0: the number of bytes written; < 0: on failure.
*/
ssize_t aos_tty_write(aos_tty_ref_t *ref, const void *buf, size_t count, uint32_t timeout);
/**
* @brief Wait until all data written has been transmitted.
* @param ref TTY ref to operate.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_tty_drain(aos_tty_ref_t *ref);
/**
* @brief Discard data written but not transmitted or data received but not read.
* @param ref TTY ref to operate.
* @param where Whether to discard input or output.
* @return 0: on success; < 0: on failure.
*/
aos_status_t aos_tty_flush(aos_tty_ref_t *ref, int where);
#ifdef __cplusplus
}
#endif
/** @} */
#endif /* AOS_TTY_H */
| YifuLiu/AliOS-Things | components/drivers/peripheral/uart/include/aos/tty.h | C | apache-2.0 | 2,646 |
/*
* Copyright (C) 2020-2021 Alibaba Group Holding Limited
*/
#ifndef AOS_TTY_CORE_H
#define AOS_TTY_CORE_H
#include <aos/device_core.h>
#include <aos/tty.h>
#define AOS_TTY_F_UNIQUE_REF ((uint32_t)1 << 0)
#ifndef AOS_CONFIG_TTY_RX_BUF_SIZE
#define AOS_CONFIG_TTY_RX_BUF_SIZE 1024
#endif
#ifndef AOS_CONFIG_TTY_TX_BUF_SIZE
#define AOS_CONFIG_TTY_TX_BUF_SIZE 1024
#endif
struct aos_tty_ops;
typedef struct {
aos_dev_t dev;
/* must be initialized before registration */
const struct aos_tty_ops *ops;
uint32_t flags;
struct termios termios;
uint32_t status;
aos_spinlock_t lock;
aos_event_t event;
size_t rx_buf_head;
size_t rx_buf_tail;
uint8_t rx_buf[AOS_CONFIG_TTY_RX_BUF_SIZE];
size_t tx_buf_head;
size_t tx_buf_tail;
uint8_t tx_buf[AOS_CONFIG_TTY_TX_BUF_SIZE];
} aos_tty_t;
typedef struct aos_tty_ops {
void (*unregister)(aos_tty_t *);
aos_status_t (*startup)(aos_tty_t *);
void (*shutdown)(aos_tty_t *);
aos_status_t (*set_attr)(aos_tty_t *);
void (*enable_rx)(aos_tty_t *);
void (*disable_rx)(aos_tty_t *);
void (*start_tx)(aos_tty_t *);
void (*stop_tx)(aos_tty_t *);
} aos_tty_ops_t;
#ifdef __cplusplus
extern "C" {
#endif
aos_status_t aos_tty_register(aos_tty_t *tty);
aos_status_t aos_tty_register_argumented(aos_tty_t *tty, uint32_t id, const aos_tty_ops_t *ops, uint32_t flags);
aos_status_t aos_tty_unregister(uint32_t id);
size_t aos_tty_rx_buffer_produce(aos_tty_t *tty, const void *buf, size_t count);
size_t aos_tty_tx_buffer_consume(aos_tty_t *tty, void *buf, size_t count);
#ifdef __cplusplus
}
#endif
#endif /* AOS_TTY_CORE_H */
| YifuLiu/AliOS-Things | components/drivers/peripheral/uart/include/aos/tty_core.h | C | apache-2.0 | 1,672 |
/*
* Copyright (C) 2020-2021 Alibaba Group Holding Limited
*/
#ifndef AOS_TTY_CSI_H
#define AOS_TTY_CSI_H
#include <aos/tty_core.h>
#include <drv/uart.h>
typedef struct {
aos_tty_t tty;
csi_uart_t csi_uart;
tcflag_t mode;
aos_event_t event;
aos_sem_t rx_sem;
aos_sem_t tx_sem;
aos_task_t rx_task;
aos_task_t tx_task;
} aos_tty_csi_t;
#ifdef __cplusplus
extern "C" {
#endif
aos_status_t aos_tty_csi_register(aos_tty_csi_t *tty_csi);
aos_status_t aos_tty_csi_unregister(uint32_t id);
#ifdef __cplusplus
}
#endif
#endif /* AOS_TTY_CSI_H */
| YifuLiu/AliOS-Things | components/drivers/peripheral/uart/include/aos/tty_csi.h | C | apache-2.0 | 578 |
/*
* Copyright (C) 2020-2021 Alibaba Group Holding Limited
*/
#ifndef AOS_UART_H
#define AOS_UART_H
#include <aos/tty.h>
/**
* @defgroup uart_api UART
* @ingroup driver_api
* @brief AOS API for UART.
* @{
*/
typedef aos_tty_ref_t aos_uart_ref_t;
typedef enum {
AOS_UART_PARITY_NONE,
AOS_UART_PARITY_ODD,
AOS_UART_PARITY_EVEN,
} aos_uart_parity_t;
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Get a UART device.
* @param ref UART ref to operate.
* @param id UART device ID.
* @return 0: on success; < 0: on failure.
*/
static inline aos_status_t aos_uart_get(aos_uart_ref_t *ref, uint32_t id)
{
struct termios termios;
aos_status_t ret;
ret = aos_tty_get(ref, id);
if (ret)
return ret;
ret = aos_tty_get_attr(ref, &termios);
if (ret) {
aos_tty_put(ref);
return ret;
}
cfmakeraw(&termios);
termios.c_cflag |= CREAD;
termios.c_cc[VMIN] = 0;
termios.c_cc[VTIME] = 0;
ret = aos_tty_set_attr(ref, TCSANOW, &termios);
if (ret) {
aos_tty_put(ref);
return ret;
}
return 0;
}
/**
* @brief Get a UART device and set its baudrate and parity.
* @param ref UART ref to operate.
* @param id UART device ID.
* @param baudrate Baudrate.
* @param parity Parity.
* @return 0: on success; < 0: on failure.
*/
static inline
aos_status_t aos_uart_get_attributed(aos_uart_ref_t *ref, uint32_t id, uint32_t baudrate, aos_uart_parity_t parity)
{
struct termios termios;
aos_status_t ret;
ret = aos_tty_get(ref, id);
if (ret)
return ret;
ret = aos_tty_get_attr(ref, &termios);
if (ret) {
aos_tty_put(ref);
return ret;
}
cfmakeraw(&termios);
termios.c_cflag |= CREAD;
termios.c_cflag &= ~(PARENB | PARODD);
termios.c_cc[VMIN] = 0;
termios.c_cc[VTIME] = 0;
if (cfsetspeed(&termios, baudrate)) {
aos_tty_put(ref);
return -EINVAL;
}
switch (parity) {
case AOS_UART_PARITY_NONE:
break;
case AOS_UART_PARITY_ODD:
termios.c_cflag |= PARENB | PARODD;
break;
case AOS_UART_PARITY_EVEN:
termios.c_cflag |= PARENB;
break;
default:
aos_tty_put(ref);
return -EINVAL;
}
ret = aos_tty_set_attr(ref, TCSANOW, &termios);
if (ret) {
aos_tty_put(ref);
return ret;
}
return 0;
}
/**
* @brief Get a UART device and set its baudrate and parity.
* @param ref UART ref to operate.
* @param id UART device ID.
* @param baudrate Baudrate.
* @param parity Parity.
* @return 0: on success; < 0: on failure.
*/
static inline
aos_status_t aos_uart_get_with_attr(aos_uart_ref_t *ref, uint32_t id, uint32_t baudrate, aos_uart_parity_t parity)
{
return aos_uart_get_attributed(ref, id, baudrate, parity);
}
/**
* @brief Release a UART device.
* @param ref UART ref to operate.
* @return None.
*/
static inline void aos_uart_put(aos_uart_ref_t *ref)
{
aos_tty_put(ref);
}
/**
* @brief Get the parameters associated with a UART device.
* @param ref UART ref to operate.
* @param termios POSIX-compliant termios structure.
* @return 0: on success; < 0: on failure.
*/
static inline aos_status_t aos_uart_get_attr(aos_uart_ref_t *ref, struct termios *termios)
{
return aos_tty_get_attr(ref, termios);
}
/**
* @brief Set the parameters associated with a UART device.
* @param ref UART ref to operate.
* @param optional_actions Specifie when the changes take effect.
* @param termios POSIX-compliant termios structure.
* @return 0: on success; < 0: on failure.
*/
static inline aos_status_t aos_uart_set_attr(aos_uart_ref_t *ref, int optional_actions, const struct termios *termios)
{
return aos_tty_set_attr(ref, optional_actions, termios);
}
/**
* @brief Read data from a UART device.
* @param ref UART ref to operate.
* @param buf Data buffer.
* @param count Attempt to read up to count bytes.
* @param timeout Timeout in milliseconds.
* @return > 0: the number of bytes read; < 0: on failure.
*/
static inline ssize_t aos_uart_read(aos_uart_ref_t *ref, void *buf, size_t count, uint32_t timeout)
{
return aos_tty_read(ref, buf, count, timeout);
}
/**
* @brief Write data to a UART device.
* @param ref UART ref to operate.
* @param buf Data buffer.
* @param count Attempt to write up to count bytes.
* @param timeout Timeout in milliseconds.
* @return > 0: the number of bytes written; < 0: on failure.
*/
static inline ssize_t aos_uart_write(aos_uart_ref_t *ref, const void *buf, size_t count, uint32_t timeout)
{
return aos_tty_write(ref, buf, count, timeout);
}
#ifdef __cplusplus
}
#endif
/** @} */
#endif /* AOS_UART_H */
| YifuLiu/AliOS-Things | components/drivers/peripheral/uart/include/aos/uart.h | C | apache-2.0 | 4,879 |
/*
* Copyright ( C) 2015-2020 Alibaba Group Holding Limited
*/
#ifndef _IO_UART_H_
#define _IO_UART_H_
#define IOC_UART_BASE 'U'
#define IOC_UART_SET_CFLAG IOC_UART_BASE + 1
#define IOC_UART_GET_CFLAG IOC_UART_BASE + 2
#define IOC_UART_DMA_CTL IOC_UART_BASE + 3
#define IOC_UART_TRX_CTL IOC_UART_BASE + 4 // disable Tx or Rx
#define IOC_UART_POLL_TEST IOC_UART_BASE + 5 // for test purpose
/* argument definition */
/* C_ Cflag bit meaning */
#define CBAUD 0x0010017
#define B0 0x0000000 /* ignore */
#define B50 0x0000001
#define B75 0x0000002
#define B110 0x0000003
#define B134 0x0000004
#define B150 0x0000005
#define B200 0x0000006
#define B300 0x0000007
#define B600 0x0000010
#define B1200 0x0000011
#define B1800 0x0000012
#define B2400 0x0000013
#define B4800 0x0000014
#define B9600 0x0000015
#define B19200 0x0000016
#define B38400 0x0000017
#define EXTA 0xB19200
#define EXTB 0xB38400
#define CBAUDEX 0x0010000
#define B57600 0x0010001
#define B115200 0x0010002
#define B230400 0x0010003
#define B460800 0x0010004
#define B500000 0x0010005
#define B576000 0x0010006
#define B921600 0x0010007
#define B1000000 0x0010010
#define B1152000 0x0010011
#define B1500000 0x0010012
#define B2000000 0x0010013
#define B2500000 0x0010014
#define B3000000 0x0010015
#define B3500000 0x0010016
#define B4000000 0x0010017
#define CSIZE 0x0000060
#define CS5 0x0000000
#define CS6 0x0000020
#define CS7 0x0000040
#define CS8 0x0000060
#define CSTOPB 0x0000100
#define CREAD 0x0000200
#define PARENB 0x0000400
#define PARODD 0x0001000
#define CRTS_CTS 0x30000000 /* flow Control */
#define CRTS 0x10000000 /* flow Control */
#define CCTS 0x20000000 /* flow Control */
int vfs_uart_drv_init (void);
#endif //_IO_UART_H_
| YifuLiu/AliOS-Things | components/drivers/peripheral/uart/include/vfsdev/uart_dev.h | C | apache-2.0 | 1,759 |
/*
* Copyright (C) 2020-2021 Alibaba Group Holding Limited
*/
#include <aos/tty_core.h>
#ifdef AOS_COMP_DEVFS
#include <stdio.h>
#include <inttypes.h>
#endif
#define STA_TX_EN ((uint32_t)1 << 0) /* reserved for XON/XOFF flow control */
#define RW_BUDGET 64
#define RX_COUNT_THRESHOLD ((size_t)UINT8_MAX)
#define TX_SPACE_THRESHOLD ((size_t)UINT8_MAX)
#define EVENT_RX_COUNT(x) ((uint32_t)(x) << 0)
#define EVENT_RX_COUNT_MASK EVENT_RX_COUNT(RX_COUNT_THRESHOLD)
#define EVENT_TX_SPACE(x) ((uint32_t)(x) << 16)
#define EVENT_TX_SPACE_MASK EVENT_TX_SPACE(TX_SPACE_THRESHOLD)
#define EVENT_TX_EMPTY ((uint32_t)1 << 24)
#define rx_count_to_event(x) ((x) < RX_COUNT_THRESHOLD ? EVENT_RX_COUNT(x) : EVENT_RX_COUNT_MASK)
#define tx_space_to_event(x) ((x) < TX_SPACE_THRESHOLD ? EVENT_TX_SPACE(x) : EVENT_TX_SPACE_MASK)
#define rx_buf_count(tty) \
((AOS_CONFIG_TTY_RX_BUF_SIZE + (tty)->rx_buf_head - (tty)->rx_buf_tail) & (AOS_CONFIG_TTY_RX_BUF_SIZE - 1))
#define rx_buf_space(tty) (AOS_CONFIG_TTY_RX_BUF_SIZE - 1 - rx_buf_count(tty))
#define tx_buf_count(tty) \
((AOS_CONFIG_TTY_TX_BUF_SIZE + (tty)->tx_buf_head - (tty)->tx_buf_tail) & (AOS_CONFIG_TTY_TX_BUF_SIZE - 1))
#define tx_buf_space(tty) (AOS_CONFIG_TTY_TX_BUF_SIZE - 1 - tx_buf_count(tty))
aos_status_t aos_tty_get(aos_tty_ref_t *ref, uint32_t id)
{
return aos_dev_get(ref, AOS_DEV_TYPE_TTY, id);
}
void aos_tty_put(aos_tty_ref_t *ref)
{
aos_dev_put(ref);
}
aos_status_t aos_tty_get_attr(aos_tty_ref_t *ref, struct termios *termios)
{
aos_tty_t *tty;
if (!ref || !aos_dev_ref_is_valid(ref) || !termios)
return -EINVAL;
tty = aos_container_of(ref->dev, aos_tty_t, dev);
aos_dev_lock(ref->dev);
*termios = tty->termios;
aos_dev_unlock(ref->dev);
return 0;
}
static aos_status_t set_attr_nonblock(aos_tty_t *tty, int optional_actions, const struct termios *termios)
{
struct termios old_termios;
tcflag_t hw_mask;
aos_status_t ret = 0;
aos_dev_lock(&tty->dev);
if (optional_actions == TCSADRAIN || optional_actions == TCSAFLUSH) {
size_t count;
aos_irqsave_t flags;
flags = aos_spin_lock_irqsave(&tty->lock);
count = tx_buf_count(tty);
aos_spin_unlock_irqrestore(&tty->lock, flags);
if (count > 0) {
aos_dev_unlock(&tty->dev);
return -EAGAIN;
}
}
if (optional_actions == TCSAFLUSH) {
aos_irqsave_t flags;
flags = aos_spin_lock_irqsave(&tty->lock);
tty->rx_buf_head = 0;
tty->rx_buf_tail = 0;
aos_event_set(&tty->event, ~EVENT_RX_COUNT_MASK, AOS_EVENT_AND);
aos_spin_unlock_irqrestore(&tty->lock, flags);
}
old_termios = tty->termios;
tty->termios = *termios;
hw_mask = CBAUD | CBAUDEX | CSIZE | CSTOPB | PARENB | PARODD | HUPCL | CLOCAL | CRTSCTS;
if ((tty->termios.c_cflag & hw_mask) != (old_termios.c_cflag & hw_mask)) {
if (old_termios.c_cflag & CREAD)
tty->ops->disable_rx(tty);
if (tty->status & STA_TX_EN)
tty->ops->stop_tx(tty);
ret = tty->ops->set_attr(tty);
if (ret)
tty->termios = old_termios;
if (tty->status & STA_TX_EN) {
aos_irqsave_t flags;
flags = aos_spin_lock_irqsave(&tty->lock);
if (tx_buf_count(tty) > 0)
tty->ops->start_tx(tty);
aos_spin_unlock_irqrestore(&tty->lock, flags);
}
if (tty->termios.c_cflag & CREAD)
tty->ops->enable_rx(tty);
} else {
bool old_rx_en = !!(old_termios.c_cflag & CREAD);
bool new_rx_en = !!(tty->termios.c_cflag & CREAD);
if (old_rx_en && !new_rx_en)
tty->ops->disable_rx(tty);
else if (!old_rx_en && new_rx_en)
tty->ops->enable_rx(tty);
}
aos_dev_unlock(&tty->dev);
return ret;
}
aos_status_t aos_tty_set_attr(aos_tty_ref_t *ref, int optional_actions, const struct termios *termios)
{
aos_tty_t *tty;
aos_status_t ret;
if (!ref || !aos_dev_ref_is_valid(ref) || !termios)
return -EINVAL;
if (optional_actions != TCSANOW && optional_actions != TCSADRAIN && optional_actions != TCSAFLUSH)
return -EINVAL;
if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK | ISTRIP | INLCR | IGNCR | ICRNL | IXON))
return -EINVAL;
if (termios->c_oflag & OPOST)
return -EINVAL;
if (termios->c_lflag & (ECHO | ECHONL | ICANON | ISIG | IEXTEN))
return -EINVAL;
if (sizeof(cc_t) > 1 && termios->c_cc[VMIN] > (cc_t)RX_COUNT_THRESHOLD)
return -EINVAL;
tty = aos_container_of(ref->dev, aos_tty_t, dev);
while (1) {
uint32_t val;
aos_status_t r;
ret = set_attr_nonblock(tty, optional_actions, termios);
if (ret != -EAGAIN)
break;
r = aos_event_get(&tty->event, EVENT_TX_EMPTY, AOS_EVENT_OR, &val, AOS_WAIT_FOREVER);
if (r == -EINTR) {
/* reserved for signal mechanism */
ret = -EINTR;
break;
}
}
return ret;
}
static ssize_t rx_buffer_consume(aos_tty_t *tty, void *buf, size_t count)
{
size_t c = 0;
if (count > SIZE_MAX / 2 - 1)
count = SIZE_MAX / 2 - 1;
while (c < count) {
uint8_t tmp_buf[RW_BUDGET];
size_t to_rx = count - c;
size_t buf_count;
uint32_t old_event;
uint32_t new_event;
aos_irqsave_t flags;
if (to_rx > RW_BUDGET)
to_rx = RW_BUDGET;
flags = aos_spin_lock_irqsave(&tty->lock);
buf_count = rx_buf_count(tty);
if (buf_count == 0) {
aos_spin_unlock_irqrestore(&tty->lock, flags);
break;
} else if (buf_count < to_rx) {
to_rx = buf_count;
}
old_event = rx_count_to_event(buf_count);
for (size_t i = 0; i < to_rx; i++) {
tmp_buf[i] = tty->rx_buf[tty->rx_buf_tail++];
tty->rx_buf_tail &= AOS_CONFIG_TTY_RX_BUF_SIZE - 1;
}
new_event = rx_count_to_event(rx_buf_count(tty));
if (new_event != old_event) {
aos_event_set(&tty->event, ~EVENT_RX_COUNT_MASK, AOS_EVENT_AND);
if (new_event)
aos_event_set(&tty->event, new_event, AOS_EVENT_OR);
}
aos_spin_unlock_irqrestore(&tty->lock, flags);
if (aos_umem_copy((uint8_t *)buf + c, tmp_buf, to_rx))
return -EFAULT;
c += to_rx;
}
return (ssize_t)c;
}
static ssize_t read_timeout(aos_tty_t *tty, void *buf, size_t count, uint32_t *timeout)
{
ssize_t ret;
while (1) {
ssize_t c;
uint32_t val;
aos_status_t r;
aos_dev_lock(&tty->dev);
if (count == 0) {
aos_irqsave_t flags;
flags = aos_spin_lock_irqsave(&tty->lock);
c = rx_buf_count(tty);
aos_spin_unlock_irqrestore(&tty->lock, flags);
} else {
c = rx_buffer_consume(tty, buf, count);
}
aos_dev_unlock(&tty->dev);
if (c > 0 || c < 0) {
ret = c;
break;
}
if (*timeout == AOS_NO_WAIT) {
ret = -EAGAIN;
break;
}
r = aos_event_get(&tty->event, EVENT_RX_COUNT_MASK, AOS_EVENT_OR, &val, *timeout);
if (r == -ETIMEDOUT) {
*timeout = 0;
ret = -ETIMEDOUT;
break;
} else if (r == -EINTR) {
/* reserved for signal mechanism */
ret = -EINTR;
break;
}
}
return ret;
}
static ssize_t read_retro(aos_tty_t *tty, void *buf, size_t count)
{
ssize_t ret;
while (1) {
ssize_t c;
cc_t vmin;
cc_t vtime;
aos_dev_lock(&tty->dev);
vmin = tty->termios.c_cc[VMIN];
vtime = tty->termios.c_cc[VTIME];
if (vmin == 0 && vtime == 0) {
if (count == 0) {
aos_irqsave_t flags;
flags = aos_spin_lock_irqsave(&tty->lock);
c = rx_buf_count(tty);
aos_spin_unlock_irqrestore(&tty->lock, flags);
} else {
c = rx_buffer_consume(tty, buf, count);
}
} else if (vmin > 0 && vtime == 0) {
aos_irqsave_t flags;
if (count > 0 && count < vmin)
vmin = (cc_t)count;
flags = aos_spin_lock_irqsave(&tty->lock);
c = rx_buf_count(tty);
aos_spin_unlock_irqrestore(&tty->lock, flags);
if (count > 0 && c >= vmin)
c = rx_buffer_consume(tty, buf, count);
} else if (vmin == 0 && vtime > 0) {
if (count == 0) {
aos_irqsave_t flags;
flags = aos_spin_lock_irqsave(&tty->lock);
c = rx_buf_count(tty);
aos_spin_unlock_irqrestore(&tty->lock, flags);
} else {
c = rx_buffer_consume(tty, buf, count);
}
} else {
aos_irqsave_t flags;
if (count > 0 && count < vmin)
vmin = (cc_t)count;
flags = aos_spin_lock_irqsave(&tty->lock);
c = rx_buf_count(tty);
aos_spin_unlock_irqrestore(&tty->lock, flags);
if (count > 0 && c >= vmin)
c = rx_buffer_consume(tty, buf, count);
}
aos_dev_unlock(&tty->dev);
if (vmin == 0 && vtime == 0) {
ret = c;
break;
} else if (vmin > 0 && vtime == 0) {
uint32_t mask;
uint32_t val;
aos_status_t r;
if (c >= vmin || c < 0) {
ret = c;
break;
}
/* wait for more than c bytes */
mask = ~EVENT_RX_COUNT((uint32_t)c) & EVENT_RX_COUNT_MASK;
r = aos_event_get(&tty->event, mask, AOS_EVENT_OR, &val, AOS_WAIT_FOREVER);
if (r == -EINTR) {
/* reserved for signal mechanism */
ret = -EINTR;
break;
}
} else if (vmin == 0 && vtime > 0) {
uint32_t val;
aos_status_t r;
if (c > 0 || c < 0) {
ret = c;
break;
}
r = aos_event_get(&tty->event, EVENT_RX_COUNT_MASK, AOS_EVENT_OR, &val, (uint32_t)vtime * 100);
if (r == -EINTR) {
/* reserved for signal mechanism */
ret = -EINTR;
break;
} else if (r == -ETIMEDOUT) {
aos_dev_lock(&tty->dev);
if (count == 0) {
aos_irqsave_t flags;
flags = aos_spin_lock_irqsave(&tty->lock);
c = rx_buf_count(tty);
aos_spin_unlock_irqrestore(&tty->lock, flags);
} else {
c = rx_buffer_consume(tty, buf, count);
}
aos_dev_unlock(&tty->dev);
ret = c;
break;
}
} else {
uint32_t mask;
uint32_t val;
uint32_t timeout;
aos_status_t r;
if (c >= vmin || c < 0) {
ret = c;
break;
}
/* wait for more than c bytes */
mask = ~EVENT_RX_COUNT((uint32_t)c) & EVENT_RX_COUNT_MASK;
timeout = (c == 0) ? AOS_WAIT_FOREVER : (uint32_t)vtime * 100;
r = aos_event_get(&tty->event, mask, AOS_EVENT_OR, &val, timeout);
if (r == -EINTR) {
/* reserved for signal mechanism */
ret = -EINTR;
break;
} else if (r == -ETIMEDOUT) {
aos_dev_lock(&tty->dev);
if (count == 0) {
aos_irqsave_t flags;
flags = aos_spin_lock_irqsave(&tty->lock);
c = rx_buf_count(tty);
aos_spin_unlock_irqrestore(&tty->lock, flags);
} else {
c = rx_buffer_consume(tty, buf, count);
}
aos_dev_unlock(&tty->dev);
if (c > 0 || c < 0) {
ret = c;
break;
}
}
}
}
return ret;
}
static ssize_t read_fancy(aos_tty_ref_t *ref, void *buf, size_t count, uint32_t *timeout)
{
aos_tty_t *tty;
ssize_t ret;
if (!ref || !aos_dev_ref_is_valid(ref) || (!buf && count > 0))
return -EINVAL;
tty = aos_container_of(ref->dev, aos_tty_t, dev);
if (timeout)
ret = read_timeout(tty, buf, count, timeout);
else
ret = read_retro(tty, buf, count);
return ret;
}
ssize_t aos_tty_read(aos_tty_ref_t *ref, void *buf, size_t count, uint32_t timeout)
{
return read_fancy(ref, buf, count, &timeout);
}
static size_t tx_buffer_produce(aos_tty_t *tty, const void *buf, size_t count)
{
size_t c = 0;
if (count > SIZE_MAX / 2 - 1)
count = SIZE_MAX / 2 - 1;
while (c < count) {
uint8_t tmp_buf[RW_BUDGET];
size_t to_tx = count - c;
size_t buf_space;
size_t old_count;
size_t new_count;
uint32_t old_event;
uint32_t new_event;
aos_irqsave_t flags;
if (to_tx > RW_BUDGET)
to_tx = RW_BUDGET;
if (aos_umem_copy(tmp_buf, (const uint8_t *)buf + c, to_tx))
return -EFAULT;
flags = aos_spin_lock_irqsave(&tty->lock);
buf_space = tx_buf_space(tty);
if (buf_space == 0) {
aos_spin_unlock_irqrestore(&tty->lock, flags);
break;
} else if (buf_space < to_tx) {
to_tx = buf_space;
}
old_count = tx_buf_count(tty);
old_event = tx_space_to_event(buf_space);
for (size_t i = 0; i < to_tx; i++) {
tty->tx_buf[tty->tx_buf_head++] = tmp_buf[i];
tty->tx_buf_head &= AOS_CONFIG_TTY_TX_BUF_SIZE - 1;
}
new_count = tx_buf_count(tty);
new_event = tx_space_to_event(tx_buf_space(tty));
if (new_event != old_event) {
aos_event_set(&tty->event, ~EVENT_TX_SPACE_MASK, AOS_EVENT_AND);
if (new_event)
aos_event_set(&tty->event, new_event, AOS_EVENT_OR);
}
if (old_count == 0 && new_count > 0) {
aos_event_set(&tty->event, ~EVENT_TX_EMPTY, AOS_EVENT_AND);
if (tty->status & STA_TX_EN)
tty->ops->start_tx(tty);
}
aos_spin_unlock_irqrestore(&tty->lock, flags);
c += to_tx;
}
return c;
}
static ssize_t write_fancy(aos_tty_ref_t *ref, const void *buf, size_t count, uint32_t *timeout)
{
aos_tty_t *tty;
ssize_t ret;
if (!ref || !aos_dev_ref_is_valid(ref) || (!buf && count > 0))
return -EINVAL;
tty = aos_container_of(ref->dev, aos_tty_t, dev);
while (1) {
ssize_t c;
uint32_t val;
aos_status_t r;
aos_dev_lock(ref->dev);
if (count == 0) {
aos_irqsave_t flags;
flags = aos_spin_lock_irqsave(&tty->lock);
c = tx_buf_space(tty);
aos_spin_unlock_irqrestore(&tty->lock, flags);
} else {
c = tx_buffer_produce(tty, buf, count);
}
aos_dev_unlock(ref->dev);
if (c > 0 || c < 0) {
ret = c;
break;
}
if (timeout && *timeout == AOS_NO_WAIT) {
ret = -EAGAIN;
break;
}
/* wait for at least TX_SPACE_THRESHOLD bytes of buffer space */
r = aos_event_get(&tty->event, EVENT_TX_SPACE_MASK, AOS_EVENT_AND, &val, timeout ? *timeout : AOS_WAIT_FOREVER);
if (r == -ETIMEDOUT) {
if (timeout)
*timeout = 0;
ret = -ETIMEDOUT;
break;
} else if (r == -EINTR) {
/* reserved for signal mechanism */
ret = -EINTR;
break;
}
}
return ret;
}
ssize_t aos_tty_write(aos_tty_ref_t *ref, const void *buf, size_t count, uint32_t timeout)
{
return write_fancy(ref, buf, count, &timeout);
}
aos_status_t aos_tty_drain(aos_tty_ref_t *ref)
{
aos_tty_t *tty;
aos_status_t ret;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
tty = aos_container_of(ref->dev, aos_tty_t, dev);
while (1) {
size_t count;
uint32_t val;
aos_status_t r;
aos_irqsave_t flags;
aos_dev_lock(&tty->dev);
flags = aos_spin_lock_irqsave(&tty->lock);
count = tx_buf_count(tty);
aos_spin_unlock_irqrestore(&tty->lock, flags);
aos_dev_unlock(&tty->dev);
if (count == 0) {
ret = 0;
break;
}
r = aos_event_get(&tty->event, EVENT_TX_EMPTY, AOS_EVENT_OR, &val, AOS_WAIT_FOREVER);
if (r == -EINTR) {
/* reserved for signal mechanism */
ret = -EINTR;
break;
}
}
return ret;
}
aos_status_t aos_tty_flush(aos_tty_ref_t *ref, int where)
{
aos_tty_t *tty;
bool flush_rx;
bool flush_tx;
aos_irqsave_t flags;
if (!ref || !aos_dev_ref_is_valid(ref))
return -EINVAL;
switch (where) {
case TCIFLUSH:
flush_rx = true;
flush_tx = false;
break;
case TCOFLUSH:
flush_rx = false;
flush_tx = true;
break;
case TCIOFLUSH:
flush_rx = true;
flush_tx = true;
break;
default:
return -EINVAL;
}
tty = aos_container_of(ref->dev, aos_tty_t, dev);
aos_dev_lock(&tty->dev);
flags = aos_spin_lock_irqsave(&tty->lock);
if (flush_rx) {
tty->rx_buf_head = 0;
tty->rx_buf_tail = 0;
aos_event_set(&tty->event, ~EVENT_RX_COUNT_MASK, AOS_EVENT_AND);
}
if (flush_tx) {
tty->tx_buf_head = 0;
tty->tx_buf_tail = 0;
aos_event_set(&tty->event, EVENT_TX_SPACE_MASK | EVENT_TX_EMPTY, AOS_EVENT_OR);
}
aos_spin_unlock_irqrestore(&tty->lock, flags);
aos_dev_unlock(&tty->dev);
return 0;
}
static void reset_termios(struct termios *termios)
{
termios->c_iflag = 0;
termios->c_oflag = 0;
termios->c_cflag = 0;
termios->c_lflag = 0;
termios->c_cc[VINTR] = '\3';
termios->c_cc[VQUIT] = '\34';
termios->c_cc[VERASE] = '\177';
termios->c_cc[VKILL] = '\25';
termios->c_cc[VEOF] = '\4';
termios->c_cc[VEOL] = '\0';
termios->c_cc[VMIN] = 0;
termios->c_cc[VTIME] = 0;
termios->c_cc[VEOL2] = '\0';
termios->c_cc[VSTART] = '\21';
termios->c_cc[VSTOP] = '\23';
termios->c_cc[VSUSP] = '\32';
cfmakeraw(termios);
(void)cfsetspeed(termios, 9600);
}
static void dev_tty_unregister(aos_dev_t *dev)
{
aos_tty_t *tty = aos_container_of(dev, aos_tty_t, dev);
aos_event_free(&tty->event);
if (tty->ops->unregister)
tty->ops->unregister(tty);
}
static aos_status_t dev_tty_get(aos_dev_ref_t *ref)
{
aos_tty_t *tty = aos_container_of(ref->dev, aos_tty_t, dev);
uint32_t event_mask;
aos_status_t ret;
if (!aos_dev_ref_is_first(ref))
return (tty->flags & AOS_TTY_F_UNIQUE_REF) ? -EBUSY : 0;
ret = tty->ops->startup(tty);
if (ret)
return ret;
tty->status |= STA_TX_EN;
event_mask = tx_space_to_event(AOS_CONFIG_TTY_TX_BUF_SIZE - 1);
event_mask |= EVENT_TX_EMPTY;
aos_event_set(&tty->event, event_mask, AOS_EVENT_OR);
return 0;
}
static void dev_tty_put(aos_dev_ref_t *ref)
{
aos_tty_t *tty = aos_container_of(ref->dev, aos_tty_t, dev);
if (!aos_dev_ref_is_last(ref))
return;
if (tty->termios.c_cflag & CREAD)
tty->ops->disable_rx(tty);
if (tty->status & STA_TX_EN)
tty->ops->stop_tx(tty);
tty->ops->shutdown(tty);
reset_termios(&tty->termios);
tty->status = 0;
aos_event_set(&tty->event, 0, AOS_EVENT_AND);
tty->rx_buf_head = 0;
tty->rx_buf_tail = 0;
tty->tx_buf_head = 0;
tty->tx_buf_tail = 0;
}
static const aos_dev_ops_t dev_tty_ops = {
.unregister = dev_tty_unregister,
.get = dev_tty_get,
.put = dev_tty_put,
};
#ifdef AOS_COMP_DEVFS
static aos_status_t devfs_tty_ioctl(aos_devfs_file_t *file, int cmd, uintptr_t arg)
{
aos_tty_ref_t *ref = aos_devfs_file2ref(file);
aos_status_t ret;
switch (cmd) {
case TCGETS:
{
struct termios termios;
if (!aos_devfs_file_is_readable(file)) {
ret = -EPERM;
break;
}
ret = aos_tty_get_attr(ref, &termios);
if (ret)
break;
if (!aos_umem_check((const void *)arg, sizeof(termios))) {
ret = -EFAULT;
break;
}
ret = aos_umem_copy((void *)arg, &termios, sizeof(termios)) ? -EFAULT : 0;
}
break;
case TCSETS:
{
struct termios termios;
if (!aos_devfs_file_is_writable(file)) {
ret = -EPERM;
break;
}
if (!aos_umem_check((const void *)arg, sizeof(termios))) {
ret = -EFAULT;
break;
}
if (aos_umem_copy(&termios, (const void *)arg, sizeof(termios))) {
ret = -EFAULT;
break;
}
ret = aos_tty_set_attr(ref, TCSANOW, &termios);
}
break;
case TCSETSW:
{
struct termios termios;
if (!aos_devfs_file_is_writable(file)) {
ret = -EPERM;
break;
}
if (!aos_umem_check((const void *)arg, sizeof(termios))) {
ret = -EFAULT;
break;
}
if (aos_umem_copy(&termios, (const void *)arg, sizeof(termios))) {
ret = -EFAULT;
break;
}
ret = aos_tty_set_attr(ref, TCSADRAIN, &termios);
}
break;
case TCSETSF:
{
struct termios termios;
if (!aos_devfs_file_is_writable(file)) {
ret = -EPERM;
break;
}
if (!aos_umem_check((const void *)arg, sizeof(termios))) {
ret = -EFAULT;
break;
}
if (aos_umem_copy(&termios, (const void *)arg, sizeof(termios))) {
ret = -EFAULT;
break;
}
ret = aos_tty_set_attr(ref, TCSAFLUSH, &termios);
}
break;
case TCSBRK:
if (arg == 0) {
ret = -ENOTSUP;
} else {
if (!aos_devfs_file_is_writable(file)) {
ret = -EPERM;
break;
}
ret = aos_tty_drain(ref);
}
break;
case TCXONC:
ret = -ENOTSUP;
break;
case TCFLSH:
if (!aos_devfs_file_is_writable(file)) {
ret = -EPERM;
break;
}
ret = aos_tty_flush(ref, arg);
break;
case TIOCGWINSZ:
{
struct winsize win_size = {
.ws_row = 24,
.ws_col = 80,
.ws_xpixel = 0,
.ws_ypixel = 0,
};
if (!aos_devfs_file_is_readable(file)) {
ret = -EPERM;
break;
}
if (!aos_umem_check((const void *)arg, sizeof(win_size))) {
ret = -EFAULT;
break;
}
ret = aos_umem_copy((void *)arg, &win_size, sizeof(win_size)) ? -EFAULT : 0;
}
break;
case TIOCSWINSZ:
ret = -ENOTSUP;
break;
default:
ret = -EINVAL;
break;
}
return ret;
}
static aos_status_t devfs_tty_poll(aos_devfs_file_t *file, aos_devfs_poll_request_t *req)
{
aos_tty_ref_t *ref = aos_devfs_file2ref(file);
aos_tty_t *tty = aos_container_of(ref->dev, aos_tty_t, dev);
aos_status_t ret = 0;
aos_irqsave_t flags;
aos_dev_lock(&tty->dev);
aos_devfs_poll_add(&tty->dev.devfs_node, AOS_DEVFS_WQ_RD, req);
aos_devfs_poll_add(&tty->dev.devfs_node, AOS_DEVFS_WQ_WR, req);
flags = aos_spin_lock_irqsave(&tty->lock);
ret |= (rx_buf_count(tty) > 0) ? POLLIN : 0;
ret |= (tx_buf_space(tty) > 0) ? POLLOUT : 0;
aos_spin_unlock_irqrestore(&tty->lock, flags);
aos_dev_unlock(&tty->dev);
return ret;
}
static ssize_t devfs_tty_read(aos_devfs_file_t *file, void *buf, size_t count)
{
aos_tty_ref_t *ref = aos_devfs_file2ref(file);
mode_t mode = aos_devfs_file_get_mode(file);
uint32_t timeout = AOS_NO_WAIT;
if (!aos_devfs_file_is_readable(file))
return -EPERM;
if (buf && !aos_umem_check(buf, count))
return -EFAULT;
return read_fancy(ref, buf, count, (mode & O_NONBLOCK) ? &timeout : NULL);
}
static ssize_t devfs_tty_write(aos_devfs_file_t *file, const void *buf, size_t count)
{
aos_tty_ref_t *ref = aos_devfs_file2ref(file);
mode_t mode = aos_devfs_file_get_mode(file);
uint32_t timeout = AOS_NO_WAIT;
if (!aos_devfs_file_is_writable(file))
return -EPERM;
if (buf && !aos_umem_check(buf, count))
return -EFAULT;
return write_fancy(ref, buf, count, (mode & O_NONBLOCK) ? &timeout : NULL);
}
static const aos_devfs_file_ops_t devfs_tty_ops = {
.ioctl = devfs_tty_ioctl,
.poll = devfs_tty_poll,
.mmap = NULL,
.read = devfs_tty_read,
.write = devfs_tty_write,
.lseek = NULL,
};
#endif /* AOS_COMP_DEVFS */
aos_status_t aos_tty_register(aos_tty_t *tty)
{
aos_status_t ret;
#ifdef AOS_COMP_DEVFS
int name_len;
#endif
if (!tty)
return -EINVAL;
if (!tty->ops || !tty->ops->startup || !tty->ops->shutdown || !tty->ops->set_attr ||
!tty->ops->enable_rx || !tty->ops->disable_rx || !tty->ops->start_tx || !tty->ops->stop_tx)
return -EINVAL;
tty->dev.type = AOS_DEV_TYPE_TTY;
tty->dev.ops = &dev_tty_ops;
#ifdef AOS_COMP_DEVFS
aos_devfs_node_init(&tty->dev.devfs_node);
tty->dev.devfs_node.ops = &devfs_tty_ops;
name_len = snprintf(tty->dev.devfs_node.name, sizeof(tty->dev.devfs_node.name), "ttyS%" PRIu32, tty->dev.id);
if (name_len < 0 || name_len >= sizeof(tty->dev.devfs_node.name))
return -EINVAL;
#endif
reset_termios(&tty->termios);
tty->status = 0;
aos_spin_lock_init(&tty->lock);
ret = aos_event_new(&tty->event, 0);
if (ret)
return ret;
tty->rx_buf_head = 0;
tty->rx_buf_tail = 0;
tty->tx_buf_head = 0;
tty->tx_buf_tail = 0;
ret = aos_dev_register(&tty->dev);
if (ret) {
aos_event_free(&tty->event);
return ret;
}
return 0;
}
aos_status_t aos_tty_register_argumented(aos_tty_t *tty, uint32_t id, const aos_tty_ops_t *ops, uint32_t flags)
{
if (!tty)
return -EINVAL;
tty->dev.id = id;
tty->ops = ops;
tty->flags = flags;
return aos_tty_register(tty);
}
aos_status_t aos_tty_unregister(uint32_t id)
{
return aos_dev_unregister(AOS_DEV_TYPE_TTY, id);
}
size_t aos_tty_rx_buffer_produce(aos_tty_t *tty, const void *buf, size_t count)
{
size_t c = 0;
size_t old_count;
size_t new_count;
uint32_t old_event;
uint32_t new_event;
old_count = rx_buf_count(tty);
old_event = rx_count_to_event(old_count);
while (c < count && rx_buf_space(tty) > 0) {
tty->rx_buf[tty->rx_buf_head++] = ((const uint8_t *)buf)[c++];
tty->rx_buf_head &= AOS_CONFIG_TTY_RX_BUF_SIZE - 1;
}
new_count = rx_buf_count(tty);
new_event = rx_count_to_event(new_count);
if (new_event != old_event) {
aos_event_set(&tty->event, ~EVENT_RX_COUNT_MASK, AOS_EVENT_AND);
aos_event_set(&tty->event, new_event, AOS_EVENT_OR);
}
#ifdef AOS_COMP_DEVFS
if (old_count == 0 && new_count > 0)
aos_devfs_poll_wakeup(&tty->dev.devfs_node, AOS_DEVFS_WQ_RD);
#endif
return c;
}
size_t aos_tty_tx_buffer_consume(aos_tty_t *tty, void *buf, size_t count)
{
size_t c = 0;
size_t old_count;
size_t new_count;
size_t old_space;
size_t new_space;
uint32_t old_event;
uint32_t new_event;
old_count = tx_buf_count(tty);
old_space = tx_buf_space(tty);
old_event = tx_space_to_event(old_space);
while (c < count && tx_buf_count(tty) > 0) {
((uint8_t *)buf)[c++] = tty->tx_buf[tty->tx_buf_tail++];
tty->tx_buf_tail &= AOS_CONFIG_TTY_TX_BUF_SIZE - 1;
}
new_count = tx_buf_count(tty);
new_space = tx_buf_space(tty);
new_event = tx_space_to_event(new_space);
if (new_event != old_event) {
aos_event_set(&tty->event, ~EVENT_TX_SPACE_MASK, AOS_EVENT_AND);
aos_event_set(&tty->event, new_event, AOS_EVENT_OR);
}
if (old_count > 0 && new_count == 0)
aos_event_set(&tty->event, EVENT_TX_EMPTY, AOS_EVENT_OR);
#ifdef AOS_COMP_DEVFS
if (old_space == 0 && new_space > 0)
aos_devfs_poll_wakeup(&tty->dev.devfs_node, AOS_DEVFS_WQ_WR);
#endif
return c;
}
| YifuLiu/AliOS-Things | components/drivers/peripheral/uart/src/tty.c | C | apache-2.0 | 29,268 |
/*
* Copyright (C) 2020-2021 Alibaba Group Holding Limited
*/
#include <aos/tty_csi.h>
#define RX_BUF_SIZE 256
#define TX_BUF_SIZE 256
#define RX_TASK_STACK_SIZE 4096
#define TX_TASK_STACK_SIZE 4096
#define RX_TASK_PRIO 30
#define TX_TASK_PRIO 30
#define EVENT_TX ((uint32_t)1 << 0)
static aos_status_t set_format(aos_tty_csi_t *tty_csi, tcflag_t mode)
{
csi_uart_data_bits_t data_bits;
csi_uart_stop_bits_t stop_bits;
csi_uart_parity_t parity;
csi_error_t r;
switch (mode & CSIZE) {
case CS5:
data_bits = UART_DATA_BITS_5;
break;
case CS6:
data_bits = UART_DATA_BITS_6;
break;
case CS7:
data_bits = UART_DATA_BITS_7;
break;
case CS8:
data_bits = UART_DATA_BITS_8;
break;
default:
data_bits = UART_DATA_BITS_8;
break;
}
if (mode & CSTOPB)
stop_bits = UART_STOP_BITS_2;
else
stop_bits = UART_STOP_BITS_1;
if (mode & PARENB)
parity = (mode & PARODD) ? UART_PARITY_ODD : UART_PARITY_EVEN;
else
parity = UART_PARITY_NONE;
r = csi_uart_format(&tty_csi->csi_uart, data_bits, parity, stop_bits);
return (r == CSI_OK) ? 0 : -EIO;
}
static aos_status_t set_baudrate(aos_tty_csi_t *tty_csi, tcflag_t mode)
{
uint32_t baudrate;
csi_error_t r;
switch (mode & CBAUD) {
case B50:
baudrate = 50;
break;
case B75:
baudrate = 75;
break;
case B110:
baudrate = 110;
break;
case B134:
baudrate = 134;
break;
case B150:
baudrate = 150;
break;
case B200:
baudrate = 200;
break;
case B300:
baudrate = 300;
break;
case B600:
baudrate = 600;
break;
case B1200:
baudrate = 1200;
break;
case B1800:
baudrate = 1800;
break;
case B2400:
baudrate = 2400;
break;
case B4800:
baudrate = 4800;
break;
case B9600:
baudrate = 9600;
break;
case B19200:
baudrate = 19200;
break;
case B38400:
baudrate = 38400;
break;
case B57600:
baudrate = 57600;
break;
case B115200:
baudrate = 115200;
break;
case B230400:
baudrate = 230400;
break;
case B460800:
baudrate = 460800;
break;
case B500000:
baudrate = 500000;
break;
case B576000:
baudrate = 576000;
break;
case B921600:
baudrate = 921600;
break;
case B1000000:
baudrate = 1000000;
break;
case B1152000:
baudrate = 1152000;
break;
case B1500000:
baudrate = 1500000;
break;
case B2000000:
baudrate = 2000000;
break;
case B2500000:
baudrate = 2500000;
break;
case B3000000:
baudrate = 3000000;
break;
case B3500000:
baudrate = 3500000;
break;
case B4000000:
baudrate = 4000000;
break;
default:
return -EINVAL;
}
r = csi_uart_baud(&tty_csi->csi_uart, baudrate);
return (r == CSI_OK) ? 0 : -EIO;
}
static void rx_task_func(void *arg)
{
aos_tty_csi_t *tty_csi = (aos_tty_csi_t *)arg;
aos_tty_t *tty = &tty_csi->tty;
csi_uart_t *csi_uart = &tty_csi->csi_uart;
uint8_t buf[RX_BUF_SIZE];
while (1) {
ssize_t r;
(void)aos_sem_wait(&tty_csi->rx_sem, AOS_WAIT_FOREVER);
r = csi_uart_receive(csi_uart, buf, sizeof(buf), 1000);
if (r > 0) {
aos_irqsave_t flags;
flags = aos_spin_lock_irqsave(&tty->lock);
(void)aos_tty_rx_buffer_produce(tty, buf, r);
aos_spin_unlock_irqrestore(&tty->lock, flags);
}
aos_sem_signal(&tty_csi->rx_sem);
}
}
static void tx_task_func(void *arg)
{
aos_tty_csi_t *tty_csi = (aos_tty_csi_t *)arg;
aos_tty_t *tty = &tty_csi->tty;
csi_uart_t *csi_uart = &tty_csi->csi_uart;
uint8_t buf[TX_BUF_SIZE];
while (1) {
size_t count;
uint32_t val;
aos_irqsave_t flags;
(void)aos_event_get(&tty_csi->event, EVENT_TX, AOS_EVENT_OR, &val, AOS_WAIT_FOREVER);
(void)aos_sem_wait(&tty_csi->tx_sem, AOS_WAIT_FOREVER);
if (aos_event_get(&tty_csi->event, EVENT_TX, AOS_EVENT_OR, &val, AOS_NO_WAIT)) {
aos_sem_signal(&tty_csi->tx_sem);
continue;
}
flags = aos_spin_lock_irqsave(&tty->lock);
count = aos_tty_tx_buffer_consume(tty, buf, sizeof(buf));
if (tty->tx_buf_head == tty->tx_buf_tail)
aos_event_set(&tty_csi->event, ~EVENT_TX, AOS_EVENT_AND);
aos_spin_unlock_irqrestore(&tty->lock, flags);
for (size_t offset = 0; count > 0 && offset < count;) {
ssize_t r;
r = csi_uart_send(csi_uart, &buf[offset], count - offset, 1000);
if (r > 0)
offset += r;
else if (r < 0)
break;
}
aos_sem_signal(&tty_csi->tx_sem);
}
}
static void tty_csi_unregister(aos_tty_t *tty)
{
aos_tty_csi_t *tty_csi = aos_container_of(tty, aos_tty_csi_t, tty);
aos_sem_free(&tty_csi->tx_sem);
aos_sem_free(&tty_csi->rx_sem);
aos_event_free(&tty_csi->event);
}
static aos_status_t tty_csi_startup(aos_tty_t *tty)
{
aos_tty_csi_t *tty_csi = aos_container_of(tty, aos_tty_csi_t, tty);
tcflag_t mode;
aos_status_t ret;
if (csi_uart_init(&tty_csi->csi_uart, tty->dev.id) != CSI_OK)
return -EIO;
mode = CBAUD | CSIZE | CSTOPB | PARENB | PARODD;
mode &= tty->termios.c_cflag;
ret = set_format(tty_csi, mode);
if (ret) {
csi_uart_uninit(&tty_csi->csi_uart);
return ret;
}
ret = set_baudrate(tty_csi, mode);
if (ret) {
csi_uart_uninit(&tty_csi->csi_uart);
return ret;
}
tty_csi->mode = mode;
ret = aos_task_new_ext(&tty_csi->rx_task, "tty_csi_rx", rx_task_func, tty_csi, RX_TASK_STACK_SIZE, RX_TASK_PRIO);
if (ret) {
csi_uart_uninit(&tty_csi->csi_uart);
return ret;
}
ret = aos_task_new_ext(&tty_csi->tx_task, "tty_csi_tx", tx_task_func, tty_csi, TX_TASK_STACK_SIZE, TX_TASK_PRIO);
if (ret) {
(void)aos_task_delete(&tty_csi->rx_task);
csi_uart_uninit(&tty_csi->csi_uart);
return ret;
}
aos_sem_signal(&tty_csi->tx_sem);
return 0;
}
static void tty_csi_shutdown(aos_tty_t *tty)
{
aos_tty_csi_t *tty_csi = aos_container_of(tty, aos_tty_csi_t, tty);
(void)aos_sem_wait(&tty_csi->tx_sem, AOS_WAIT_FOREVER);
aos_event_set(&tty_csi->event, ~EVENT_TX, AOS_EVENT_AND);
(void)aos_task_delete(&tty_csi->tx_task);
(void)aos_task_delete(&tty_csi->rx_task);
csi_uart_uninit(&tty_csi->csi_uart);
}
static aos_status_t tty_csi_set_attr(aos_tty_t *tty)
{
aos_tty_csi_t *tty_csi = aos_container_of(tty, aos_tty_csi_t, tty);
tcflag_t mode;
aos_status_t ret;
mode = CBAUD | CSIZE | CSTOPB | PARENB | PARODD;
mode &= tty->termios.c_cflag;
ret = set_format(tty_csi, mode);
if (ret) {
(void)set_format(tty_csi, tty_csi->mode);
(void)set_baudrate(tty_csi, tty_csi->mode);
return ret;
}
ret = set_baudrate(tty_csi, mode);
if (ret) {
(void)set_format(tty_csi, tty_csi->mode);
(void)set_baudrate(tty_csi, tty_csi->mode);
return ret;
}
tty_csi->mode = mode;
return 0;
}
static void tty_csi_enable_rx(aos_tty_t *tty)
{
aos_tty_csi_t *tty_csi = aos_container_of(tty, aos_tty_csi_t, tty);
aos_sem_signal(&tty_csi->rx_sem);
}
static void tty_csi_disable_rx(aos_tty_t *tty)
{
aos_tty_csi_t *tty_csi = aos_container_of(tty, aos_tty_csi_t, tty);
(void)aos_sem_wait(&tty_csi->rx_sem, AOS_WAIT_FOREVER);
}
static void tty_csi_start_tx(aos_tty_t *tty)
{
aos_tty_csi_t *tty_csi = aos_container_of(tty, aos_tty_csi_t, tty);
aos_event_set(&tty_csi->event, EVENT_TX, AOS_EVENT_OR);
}
static void tty_csi_stop_tx(aos_tty_t *tty)
{
aos_tty_csi_t *tty_csi = aos_container_of(tty, aos_tty_csi_t, tty);
(void)aos_sem_wait(&tty_csi->tx_sem, AOS_WAIT_FOREVER);
aos_event_set(&tty_csi->event, ~EVENT_TX, AOS_EVENT_AND);
aos_sem_signal(&tty_csi->tx_sem);
}
static const aos_tty_ops_t tty_csi_ops = {
.unregister = tty_csi_unregister,
.startup = tty_csi_startup,
.shutdown = tty_csi_shutdown,
.set_attr = tty_csi_set_attr,
.enable_rx = tty_csi_enable_rx,
.disable_rx = tty_csi_disable_rx,
.start_tx = tty_csi_start_tx,
.stop_tx = tty_csi_stop_tx,
};
aos_status_t aos_tty_csi_register(aos_tty_csi_t *tty_csi)
{
aos_status_t ret;
if (!tty_csi)
return -EINVAL;
tty_csi->tty.ops = &tty_csi_ops;
tty_csi->tty.flags = 0;
ret = aos_event_new(&tty_csi->event, 0);
if (ret)
return ret;
ret = aos_sem_new(&tty_csi->rx_sem, 0);
if (ret) {
aos_event_free(&tty_csi->event);
return ret;
}
ret = aos_sem_new(&tty_csi->tx_sem, 0);
if (ret) {
aos_sem_free(&tty_csi->rx_sem);
aos_event_free(&tty_csi->event);
return ret;
}
ret = aos_tty_register(&tty_csi->tty);
if (ret) {
aos_sem_free(&tty_csi->tx_sem);
aos_sem_free(&tty_csi->rx_sem);
aos_event_free(&tty_csi->event);
return ret;
}
return 0;
}
aos_status_t aos_tty_csi_unregister(uint32_t id)
{
return aos_tty_unregister(id);
}
| YifuLiu/AliOS-Things | components/drivers/peripheral/uart/src/tty_csi.c | C | apache-2.0 | 9,649 |
/*
* Copyright (C) 2015-2021 Alibaba Group Holding Limited
*/
#include <poll.h>
#include <aos/hal/uart.h>
#include <vfsdev/uart_dev.h>
#include <devicevfs/devicevfs.h>
#ifdef CONFIG_UART_NUM
#define PLATFORM_UART_NUM CONFIG_UART_NUM
#else
#define PLATFORM_UART_NUM 4
#endif
#define SYS_LOG_UART_PORT 0
#if (PLATFORM_UART_NUM > 0)
// UART device node will be named with "/dev/ttyUART<x>", where <x> is uart port id
#define UART_DEV_NAME_FORMAT "ttyUART%d"
/* used to notify user on poll events */
typedef struct uart_poll_notify {
bool flag;
struct mutex mutex;
poll_notify_t notify;
struct pollfd *fd;
void *arg;
} uart_poll_notify_t;
typedef struct vfs_uart {
int ref_cnt;
struct mutex m;
uart_dev_t dev;
} vfs_uart_t;
static uart_poll_notify_t g_uart_notify[PLATFORM_UART_NUM];
static int uart_rx_notify (uart_dev_t *uart);
__weak int32_t hal_uart_recv_cb_reg(uart_dev_t *uart, uart_rx_cb cb) {
ddkc_warn("%s, uart:%p, cb:%p\r\n", __func__, uart, cb);
return 0;
}
ssize_t uart_device_read (file_t *f, void *buffer, size_t size) {
unsigned int i = 0;
int ret = 0;
uart_dev_t *uart = NULL;
uart_poll_notify_t *uart_poll = NULL;
vfs_uart_t *vu = (vfs_uart_t *)f->node->i_arg;;
ddkc_dbg("%s - node:%p, i_name:%s, i_arg:%p\r\n", __func__, f->node, f->node->i_name, vu);
if (!vu || !buffer || !size) {
ddkc_err("invalid vfs_uart_t:%p, buffer:%p or size:%d\r\n", vu, buffer, size);
return -EINVAL;
}
uart = &vu->dev;
mutex_lock(&vu->m);
uart_poll = &g_uart_notify[uart->port];
if (uart_poll->flag) {
mutex_lock(&uart_poll->mutex);
uart_poll->flag = false;
mutex_unlock(&uart_poll->mutex);
}
ret = hal_uart_recv_II(uart, buffer, size, &i, 100);
ddkc_dbg("%s, uart:%p, i:%d, ret:%d\r\n", __func__, uart, i, ret);
mutex_unlock(&vu->m);
return !ret ? i : (ret < 0 ? ret : -ret);
}
ssize_t uart_device_write (file_t *f, const void *buffer, size_t size) {
int i = 0;
int ret = 0;
char *ptr = (char *)buffer;
uart_dev_t *uart = NULL;
vfs_uart_t *vu = (vfs_uart_t *)f->node->i_arg;;
ddkc_dbg("%s - node:%p, i_name:%s, i_arg:%p\r\n", __func__, f->node, f->node->i_name, vu);
if (!vu || !buffer || !size) {
ddkc_err("invalid vfs_uart_t:%p, buffer:%p or size:%d\r\n", vu, buffer, size);
return -EINVAL;
}
uart = &vu->dev;
mutex_lock(&vu->m);
while (size--) {
ret = hal_uart_send(uart, ptr++, 1, 1000);
if (ret)
break;
i++;
}
ddkc_dbg("%s, uart:%p, i:%d, ret:%d\r\n", __func__, uart, i, ret);
mutex_unlock(&vu->m);
return i ? i : ret;
}
static unsigned int _arg_to_baudrate (unsigned long arg) {
unsigned baudrate = 0;
int bits = arg & CBAUD;
if (!(bits)) {
ddkc_warn("arg:0x%lx - no baudrate bits set, ignore\r\n", arg);
return 0;
}
switch (bits) {
case B50:
baudrate = 50;
break;
case B75:
baudrate = 75;
break;
case B110:
baudrate = 110;
break;
case B134:
baudrate = 134;
break;
case B150:
baudrate = 150;
break;
case B200:
baudrate = 200;
break;
case B300:
baudrate = 300;
break;
case B600:
baudrate = 600;
break;
case B1200:
baudrate = 1200;
break;
case B1800:
baudrate = 1800;
break;
case B2400:
baudrate = 2400;
break;
case B4800:
baudrate = 4800;
break;
case B9600:
baudrate = 9600;
break;
case B19200:
baudrate = 19200;
break;
case B38400:
baudrate = 38400;
break;
case B57600:
baudrate = 57600;
break;
case B115200:
baudrate = 115200;
break;
case B230400:
baudrate = 230400;
break;
case B460800:
baudrate = 460800;
break;
case B500000:
baudrate = 500000;
break;
case B576000:
baudrate = 576000;
break;
case B921600:
baudrate = 921600;
break;
case B1000000:
baudrate = 1000000;
break;
case B1152000:
baudrate = 1152000;
break;
case B1500000:
baudrate = 1500000;
break;
case B2000000:
baudrate = 2000000;
break;
case B2500000:
baudrate = 2500000;
break;
case B3000000:
baudrate = 3000000;
break;
case B3500000:
baudrate = 3500000;
break;
case B4000000:
baudrate = 4000000;
break;
default:
ddkc_warn("arg:0x%lx - invalid and impossible case, set to 912600 by default\r\n",
arg);
/* set to 921600 by default */
baudrate = 921600;
break;
}
return baudrate;
}
static hal_uart_flow_control_t _arg_to_flow_control (unsigned long arg) {
hal_uart_flow_control_t c = 0;
int control = arg & CRTS_CTS;
switch (control) {
case 0:
c = FLOW_CONTROL_DISABLED;
break;
case CRTS_CTS:
c = FLOW_CONTROL_CTS_RTS;
break;
case CRTS:
c = FLOW_CONTROL_RTS;
break;
case CCTS:
c = FLOW_CONTROL_CTS;
break;
default:
c = FLOW_CONTROL_DISABLED;
break;
}
return c;
}
static hal_uart_stop_bits_t _arg_to_stop_bits (unsigned long arg) {
return arg & CSTOPB ? STOP_BITS_2 : STOP_BITS_1;
}
static hal_uart_parity_t _arg_to_parity(int arg) {
if (arg & PARENB)
return EVEN_PARITY;
else if (arg & PARODD)
return ODD_PARITY;
else
return NO_PARITY;
}
static hal_uart_data_width_t _arg_to_data_width (unsigned long arg) {
unsigned size = 0;
int bits = arg & CSIZE;
switch (bits) {
case CS5:
size = DATA_WIDTH_5BIT;
break;
case CS6:
size = DATA_WIDTH_6BIT;
break;
case CS7:
size = DATA_WIDTH_7BIT;
break;
case CS8:
size = DATA_WIDTH_8BIT;
break;
default:
ddkc_warn("arg:0x%lx - invalid and impossible case, set to 8bit by default\r\n",
arg);
size = DATA_WIDTH_8BIT;
break;
}
return size;
}
int uart_device_ioctl (file_t *f, int cmd, unsigned long arg) {
int ret = 0;
uart_config_t *config = NULL;
uart_dev_t *uart = NULL;
vfs_uart_t *vu = (vfs_uart_t *)f->node->i_arg;;
ddkc_dbg("%s - node:%p, i_name:%s, i_arg:%p\r\n", __func__, f->node, f->node->i_name, vu);
if (!vu) {
ddkc_err("uart is NULL,invalid and ignore\r\n");
return -EINVAL;
}
uart = &vu->dev;
mutex_lock(&vu->m);
config = &uart->config;
ddkc_dbg("i_name:%s, uart:%p, cmd:%d, arg:0x%lx\r\n", f->node->i_name, uart, cmd, arg);
switch (cmd) {
case IOC_UART_SET_CFLAG:
ret = hal_uart_finalize(uart);
if (ret) {
ddkc_warn("hal_uart_finalize failed, ret:%d\r\n", ret);
break;
}
config->baud_rate = _arg_to_baudrate(arg);
config->flow_control = _arg_to_flow_control(arg);
config->stop_bits = _arg_to_stop_bits(arg);
config->parity = _arg_to_parity(arg);
config->data_width = _arg_to_data_width(arg);
ret = hal_uart_init(uart);
if (ret) {
ddkc_warn("hal_uart_init failed, ret:%d\r\n", ret);
}
break;
case IOC_UART_GET_CFLAG:
//TODO: to be implemented
break;
case IOC_UART_POLL_TEST:
uart_rx_notify(uart);
break;
default:
break;
}
mutex_unlock(&vu->m);
return ret;
}
int uart_device_open (inode_t *node, file_t *f) {
int ret = -1;
uart_dev_t *uart = NULL;
vfs_uart_t *vu = (vfs_uart_t *)node->i_arg;;
ddkc_dbg("%s - node:%p, i_name:%s, i_arg:%p\r\n", __func__, node, node->i_name, vu);
if (!vu) {
ddkc_err("vfs_uart_t is NULL,invalid and ignore\r\n");
return -EINVAL;
}
uart = &vu->dev;
mutex_lock(&vu->m);
if (vu->ref_cnt) {
ddkc_dbg("uart%d is already opened, ref_cnt:%d\r\n", uart->port, vu->ref_cnt);
mutex_unlock(&vu->m);
return 0;
}
//TODO: check whether it is for console, special operation needed for console
/* open UART with default parameter */
ret = hal_uart_init(uart);
if (ret) {
ddkc_err("hal_uart_init failed, ret:%d\r\n", ret);
mutex_unlock(&vu->m);
return -EIO;
}
hal_uart_recv_cb_reg(uart, NULL);
uart->priv = f;
vu->ref_cnt++;
mutex_unlock(&vu->m);
return 0;
}
int uart_device_close (file_t *f) {
int ret = 0;
uart_dev_t *uart = NULL;
vfs_uart_t *vu = (vfs_uart_t *)f->node->i_arg;;
ddkc_dbg("%s - node:%p, i_name:%s, i_arg:%p\r\n", __func__, f->node, f->node->i_name, vu);
if (!vu) {
ddkc_err("vfs_uart_t is NULL,invalid and ignore\r\n");
return -EINVAL;
}
mutex_lock(&vu->m);
vu->ref_cnt--;
if (vu->ref_cnt != 0) {
ddkc_warn("vu->ref_cnt：%d, ignore close operation on %s\r\n", vu->ref_cnt, f->node->i_name);
mutex_unlock(&vu->m);
return 0;
}
uart = &vu->dev;
hal_uart_recv_cb_reg(uart, NULL);
/* open UART with default parameter */
ret = hal_uart_finalize(uart);
if (ret) {
ddkc_err("hal_uart_finalize failed, ret:%d\r\n", ret);
}
uart->priv = NULL;
mutex_unlock(&vu->m);
return 0;
}
int uart_rx_notify (uart_dev_t *uart) {
file_t *fp = NULL;
struct pollfd *fd = NULL;
uart_poll_notify_t *uart_poll = NULL;
if (!uart) {
ddkc_err("uart should not be NULL in %s\r\n", __func__);
return -1;
}
fp = (file_t *)uart->priv;
ddkc_dbg("enter %s, fp:%p\r\n", __func__, fp);
uart_poll = &g_uart_notify[uart->port];
if (uart_poll->notify) {
mutex_lock(&uart_poll->mutex);
uart_poll->flag = true;
fd = (struct pollfd *)uart_poll->fd;
fd->revents |= POLLIN;
/* add POLLOUT by default */
fd->revents |= POLLOUT;
(*(uart_poll->notify)) (fd, uart_poll->arg);
uart_poll->notify = NULL;
uart_poll->fd = NULL;
uart_poll->arg = NULL;
hal_uart_recv_cb_reg(uart, NULL);
mutex_unlock(&uart_poll->mutex);
} else {
ddkc_err("!!!impossible case happened!!! uart_poll->notify is NULL\r\n");
}
return 0;
}
int uart_device_poll (file_t *f, int flag, poll_notify_t notify, void *fd, void *arg) {
uart_poll_notify_t *uart_poll = NULL;
uart_dev_t *uart = NULL;
vfs_uart_t *vu = (vfs_uart_t *)f->node->i_arg;;
ddkc_dbg("%s - node:%p, i_name:%s, i_arg:%p\r\n", __func__, f->node, f->node->i_name, vu);
if (!vu) {
ddkc_err("vfs_uart_t is NULL,invalid and ignore\r\n");
return -EINVAL;
}
uart = &vu->dev;
ddkc_dbg("enter %s, fd:%p, arg:%p, notify:%p\r\n", __func__, fd, arg, notify);
uart_poll = &g_uart_notify[uart->port];
if (!fd) {
mutex_lock(&uart_poll->mutex);
hal_uart_recv_cb_reg(uart, NULL);
uart_poll->notify = NULL;
uart_poll->fd = NULL;
uart_poll->arg = NULL;
mutex_unlock(&uart_poll->mutex);
return 0;
}
if (!uart_poll->flag) {
mutex_lock(&uart_poll->mutex);
uart_poll->notify = notify;
uart_poll->fd = (struct pollfd *)fd;
uart_poll->arg = arg;
hal_uart_recv_cb_reg(uart, uart_rx_notify);
((struct pollfd *)fd)->revents &= ~POLLIN;
mutex_unlock(&uart_poll->mutex);
} else {
ddkc_warn("uart_poll->flag is true, notify user directly\r\n");
((struct pollfd *)fd)->events |= POLLIN;
(*notify)(fd, arg);
}
// add POLLOUT to events by default
((struct pollfd *)fd)->events |= POLLOUT;
(*notify)(fd, arg);
return 0;
}
/************************** device ****************************/
subsys_file_ops_t uart_device_fops = {
.open = uart_device_open,
.close = uart_device_close,
.read = uart_device_read,
.write = uart_device_write,
.ioctl = uart_device_ioctl,
.poll = uart_device_poll,
.lseek = NULL,
};
int uart_device_init (struct u_platform_device *pdev) {
void *user_data = NULL;
// make sure 0 is returned if init operation success
// or aos_dev_reg procedure will break and no device node will be registered
ddkc_dbg("%s\r\n", __func__);
user_data = u_platform_get_user_data(pdev);
ddkc_dbg("pdev:%p, user_data:%p\r\n", pdev, user_data);
return 0;
}
int uart_device_deinit (struct u_platform_device *pdev) {
ddkc_dbg("%s\r\n", __func__);
return 0;
}
int uart_device_pm (struct u_platform_device *pdev, u_pm_ops_t state) {
ddkc_dbg("%s\r\n", __func__);
return 0;
}
struct subsys_drv uart_device_drv = {
.drv_name = "uart",
.init = uart_device_init,
.deinit = uart_device_deinit,
.pm = uart_device_pm,
};
struct subsys_dev *g_uart_device_array[PLATFORM_UART_NUM];
static uart_dev_t g_def_setting = {
.port = 0,
.config = {
.baud_rate = 1500000,
.data_width = DATA_WIDTH_8BIT,
.parity = NO_PARITY,
.stop_bits = STOP_BITS_1,
.flow_control = FLOW_CONTROL_DISABLED,
.mode = MODE_TX_RX,
},
.priv = NULL,
};
int vfs_uart_drv_init (void) {
int i = 0;
int j = 0;
int ret = 0;
int node_name_len = 0;
struct subsys_dev **ppsdev = NULL;
ddkc_dbg("uart vfs driver init starts\r\n");
node_name_len = strlen(UART_DEV_NAME_FORMAT) + 1;
memset(g_uart_notify, 0, sizeof(g_uart_notify));
memset(g_uart_device_array, 0, sizeof(g_uart_device_array));
ppsdev = g_uart_device_array;
for (i = 0; i < PLATFORM_UART_NUM; i++) {
vfs_uart_t *vu = NULL;
uart_dev_t *uart_dev = NULL;
vu = malloc(sizeof(vfs_uart_t));
*ppsdev = malloc(sizeof(struct subsys_dev) + node_name_len);
if (!vu || !(*ppsdev)) {
ddkc_err("malloc for vfs_uart_t：%p or subsys_dev:%p failed, \r\n", vu, *ppsdev);
if (*ppsdev) {
free(*ppsdev);
*ppsdev = NULL;
}
if (vu)
free(vu);
goto err;
}
memset(*ppsdev, 0, sizeof(struct subsys_dev) + node_name_len);
(*ppsdev)->node_name = (char *)((*ppsdev) + 1);
snprintf((*ppsdev)->node_name, node_name_len, UART_DEV_NAME_FORMAT, i);
ddkc_dbg("*ppsdev:%p, node_name:%s, (*ppsdev) + 1:%p, sizeof(struct subsys_dev):%d\r\n",
*ppsdev, (*ppsdev)->node_name, (*ppsdev) + 1, sizeof(struct subsys_dev));
(*ppsdev)->permission = 0;
// please refer to definitions in enum SUBSYS_BUS_TYPE
(*ppsdev)->type = BUS_TYPE_PLATFORM;
vu->m.flag = 0;
mutex_init(&vu->m);
uart_dev = &vu->dev;
vu->ref_cnt = 0;
memcpy(uart_dev, &g_def_setting, sizeof(*uart_dev));
uart_dev->port = i;
// user_data will be passed to open operation via node->i_arg
(*ppsdev)->user_data = vu;
mutex_init(&g_uart_notify[i].mutex);
ret = aos_dev_reg(*ppsdev, &uart_device_fops, &uart_device_drv);
if (ret) {
ddkc_err("aos_dev_reg for uart devices failed, ret:%d\r\n", ret);
free(vu);
free(*ppsdev);
*ppsdev = NULL;
goto err;
}
ppsdev++;
}
ddkc_dbg("uart vfs driver init finish, ret:%d\r\n", ret);
return 0;
err:
ppsdev = g_uart_device_array;
for (j = 0; j < i; j++) {
// uninstall uart devices who are already registered
if (*ppsdev) {
aos_dev_unreg(*ppsdev);
ddkc_info("free memory for UART%d\r\n", j);
if ((*ppsdev)->user_data)
free((*ppsdev)->user_data);
free(*ppsdev);
*ppsdev = NULL;
}
ppsdev++;
}
ddkc_err("uart vfs driver init failed, ret:%d\r\n", ret);
return ret;
}
//VFS_DRIVER_ENTRY(vfs_uart_drv_init)
VFS_DRIVER_FULL_ENTRY(vfs_uart_drv_init, NULL)
#endif
| YifuLiu/AliOS-Things | components/drivers/peripheral/uart/src/uart_dev.c | C | apache-2.0 | 16,896 |
#include <stdint.h>
#include <stdio.h>
#include <aos/errno.h>
#if AOS_COMP_CLI
#include "aos/cli.h"
#endif
#include <vfsdev/wdg_dev.h>
#include <aos/driver/wdg.h>
int vfs_wdg_test(int count, int period)
{
int ret = 0;
int fd = 0;
fd = open("/dev/wdg0", 0);
printf("open wdg %s, fd:%d\r\n", fd >= 0 ? "success" : "fail", fd);
if (fd >= 0) {
while (count--) {
ret = ioctl(fd, IOC_WDG_RELOAD, 0);
printf("wdg reload %s, ret:%d\r\n", ret ? "fail" : "succeed", ret);
usleep(period * 1000);
}
close(fd);
ret = 0;
} else {
ret = -EIO;
}
printf("wdg test done\r\n");
return ret;
}
static void wdg_reload_test(int32_t argc, char **argv)
{
int ret = 0;
int count = argc > 1 ? atoi(argv[1]) : 10;
int period = argc > 2 ? atoi(argv[2]) : 200;
printf("watchdog comp reload test start!\r\n");
printf("watchdog comp reload test count:%d, period:%d ms\r\n", count, period);
ret = vfs_wdg_test(count, period);
if (!ret) {
printf("watchdog comp reload test success!\r\n");
} else {
printf("watchdog comp reload test failed, ret:%d\r\n", ret);
}
return;
}
#if CONFIG_U_WDG_CORE
static void aos_wdg_reload_test(int32_t argc, char **argv)
{
int ret = 0;
aos_status_t status = 0;
int count = argc > 1 ? atoi(argv[1]) : 10;
int period = argc > 2 ? atoi(argv[2]) : 200;
wdg_dev_handle_t wdg = NULL;
printf("watchdog comp reload test start!\r\n");
printf("watchdog comp reload test count:%d, period:%d ms\r\n", count, period);
wdg = aos_wdg_open(0, 1000);
if (!wdg) {
printf("aos_wdg_open fails\r\n");
return;
}
status = aos_wdg_start(wdg);
if (status) {
printf("aos_wdg_start fails, status:%d\r\n", status);
goto out;
}
aos_msleep(500);
status = aos_wdg_feed(wdg);
if (status) {
printf("aos_wdg_feed fails, status:%d\r\n", status);
goto out;
}
status = aos_wdg_stop(wdg);
if (status) {
printf("aos_wdg_feed fails, status:%d\r\n", status);
goto out;
}
status = aos_wdg_timeout_set(wdg, 2000);
if (status) {
printf("aos_wdg_feed fails, status:%d\r\n", status);
goto out;
}
status = aos_wdg_start(wdg);
if (status) {
printf("aos_wdg_feed fails, status:%d\r\n", status);
goto out;
}
aos_msleep(3000);
status = aos_wdg_feed(wdg);
if (status) {
printf("aos_wdg_feed fails, status:%d\r\n", status);
goto out;
}
status = aos_wdg_stop(wdg);
if (status) {
printf("aos_wdg_feed fails, status:%d\r\n", status);
goto out;
}
out:
status = aos_wdg_close(wdg);
if (status) {
printf("aos_wdg_feed fails, status:%d\r\n", status);
return;
}
return;
}
#endif
#if AOS_COMP_CLI
/* reg args: fun, cmd, description*/
ALIOS_CLI_CMD_REGISTER(wdg_reload_test, wdg_reload, reset watchdog operation example)
#if CONFIG_U_WDG_CORE
ALIOS_CLI_CMD_REGISTER(aos_wdg_reload_test, aos_wdg_reload, reset watchdog operation example)
#endif
#endif | YifuLiu/AliOS-Things | components/drivers/peripheral/watchdog/example/wdg_example.c | C | apache-2.0 | 3,166 |
/**
* @file wdg.h
* @copyright Copyright (C) 2015-2021 Alibaba Group Holding Limited
*/
#ifndef _AOS_WDG_H
#define _AOS_WDG_H
#ifdef __cplusplus
extern "C" {
#endif
#include <aos/kernel.h>
/** @addtogroup aos_wdg_device I2C
* aos watchdog API.
*
* @{
*/
typedef uint32_t* wdg_dev_handle_t;
/**
* start a new watchdog
*
* @param[in] id watchdog controller's id
* @param[in] ms watchdog's timeout value, in unit of ms, 0xFFFFFFFF is not allowed to use
*
* @return handle of the watchdog device, used for later watchdog operations, when open operation success;
NULL when open operation fails
*/
extern wdg_dev_handle_t aos_wdg_open (uint32_t id, uint32_t ms);
/**
* close target watchdog handle
*
* @param[in] dev handle of the watchdog device to be operated, must be the return value of aos_wdg_open
*
* @return 0 if operation success
negative error code if operation fails
*/
extern aos_status_t aos_wdg_close (wdg_dev_handle_t dev_h);
/**
* start target watchdog
*
* @param[in] dev handle of the watchdog device to be operated, must be the return value of aos_wdg_open
*
* @return 0 if operation success
negative error code if operation fails
*/
extern aos_status_t aos_wdg_start (wdg_dev_handle_t dev_h);
/**
* stop target watchdog
*
* @param[in] dev handle of the watchdog device to be operated, must be the return value of aos_wdg_open
*
* @return 0 if operation success
negative error code if operation fails
*/
extern aos_status_t aos_wdg_stop (wdg_dev_handle_t dev_h);
/**
* set timeout value of target watchdog
*
* @param[in] dev handle of the watchdog device to be operated, must be the return value of aos_wdg_open
* @param[in] clk watchdog's new timeout value, in unit of ms
*
* @return 0 if operation success
negative error code if operation fails
*/
extern aos_status_t aos_wdg_timeout_set (wdg_dev_handle_t dev, uint32_t ms);
/**
* feed target watchdog
*
* @param[in] dev handle of the watchdog device to be operated, must be the return value of aos_wdg_open
*
* @return 0 if operation success
negative error code if operation fails
*/
extern aos_status_t aos_wdg_feed (wdg_dev_handle_t dev_h);
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* _AOS_WDG_H */
| YifuLiu/AliOS-Things | components/drivers/peripheral/watchdog/include/aos/driver/wdg.h | C | apache-2.0 | 2,328 |