plateform stringclasses 1
value | repo_name stringclasses 2
values | name stringlengths 1 78 | ext stringclasses 2
values | path stringlengths 15 1.11k | size int64 1 8.55M | source_encoding stringclasses 11
values | md5 stringlengths 32 32 | text stringlengths 0 8.49M |
|---|---|---|---|---|---|---|---|---|
google | android | dsi_manager | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/dsi/dsi_manager.c | 22,092 | utf_8 | cc023b093c2088a7ed802b8311bc1543 | /*
*/
#include "msm_kms.h"
#include "dsi.h"
#define DSI_CLOCK_MASTER DSI_0
#define DSI_CLOCK_SLAVE DSI_1
#define DSI_LEFT DSI_0
#define DSI_RIGHT DSI_1
/* According to the current drm framework sequence, take the encoder of
* DSI_1 as master encoder
*/
#define DSI_ENCODER_MASTER DSI_1
#define DSI_ENCODER_SLAVE DS... |
google | android | dsi_pll | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/dsi/pll/dsi_pll.c | 3,411 | utf_8 | cc289b94ece5dd167bfaedb4ca898195 | /*
*/
#include "dsi_pll.h"
static int dsi_pll_enable(struct msm_dsi_pll *pll)
{
int i, ret = 0;
/*
* Certain PLLs do not allow VCO rate update when it is on.
* Keep track of their status to turn on/off after set rate success.
*/
if (unlikely(pll->pll_on))
return 0;
/* Try all enable sequences until one suc... |
google | android | dsi_pll_28nm | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c | 19,168 | utf_8 | 3ce29bc848b2ebf6ab9ae3c13c045001 | /*
*/
#include <linux/clk.h>
#include <linux/clk-provider.h>
#include "dsi_pll.h"
#include "dsi.xml.h"
/*
* DSI PLL 28nm - clock diagram (eg: DSI0):
*
* dsi0analog_postdiv_clk
* | dsi0indirect_path_div2_clk
* | |
* ... |
google | android | dsi_phy_28nm | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c | 5,539 | utf_8 | 09903cb3152a711bea0cb476ce2c960a | /*
*/
#include "dsi_phy.h"
#include "dsi.xml.h"
static void dsi_28nm_dphy_set_timing(struct msm_dsi_phy *phy,
struct msm_dsi_dphy_timing *timing)
{
void __iomem *base = phy->base;
dsi_phy_write(base + REG_DSI_28nm_PHY_TIMING_CTRL_0,
DSI_28nm_PHY_TIMING_CTRL_0_CLK_ZERO(timing->clk_zero));
dsi_phy_write(base + RE... |
google | android | dsi_phy_20nm | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/dsi/phy/dsi_phy_20nm.c | 5,232 | utf_8 | f8ff6b1e0e922c37ccf725a35538c28c | /*
*/
#include "dsi_phy.h"
#include "dsi.xml.h"
static void dsi_20nm_dphy_set_timing(struct msm_dsi_phy *phy,
struct msm_dsi_dphy_timing *timing)
{
void __iomem *base = phy->base;
dsi_phy_write(base + REG_DSI_20nm_PHY_TIMING_CTRL_0,
DSI_20nm_PHY_TIMING_CTRL_0_CLK_ZERO(timing->clk_zero));
dsi_phy_write(base + RE... |
google | android | dsi_phy | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 10,986 | utf_8 | a9ade65bc14e1f65855e28e2b4809640 | /*
*/
#include <linux/platform_device.h>
#include "dsi_phy.h"
#define S_DIV_ROUND_UP(n, d) \
(((n) >= 0) ? (((n) + (d) - 1) / (d)) : (((n) - (d) + 1) / (d)))
static inline s32 linear_inter(s32 tmax, s32 tmin, s32 percent,
s32 min_result, bool even)
{
s32 v;
v = (tmax - tmin) * percent;
v = S_DIV_ROUND_UP(v, 10... |
google | android | mdp_format | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/mdp/mdp_format.c | 6,205 | utf_8 | a42128e07b153231bbc93e1eefb26420 | /*
*/
#include "msm_drv.h"
#include "mdp_kms.h"
static struct csc_cfg csc_convert[CSC_MAX] = {
[CSC_RGB2RGB] = {
.type = CSC_RGB2RGB,
.matrix = {
0x0200, 0x0000, 0x0000,
0x0000, 0x0200, 0x0000,
0x0000, 0x0000, 0x0200
},
.pre_bias = { 0x0, 0x0, 0x0 },
.post_bias = { 0x0, 0x0, 0x0 },
.pre_clamp = {... |
google | android | mdp_kms | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/mdp/mdp_kms.c | 3,618 | utf_8 | b58fc03b74473721951310de230331a7 | /*
*/
#include "msm_drv.h"
#include "mdp_kms.h"
struct mdp_irq_wait {
struct mdp_irq irq;
int count;
};
static DECLARE_WAIT_QUEUE_HEAD(wait_event);
static DEFINE_SPINLOCK(list_lock);
static void update_irq(struct mdp_kms *mdp_kms)
{
struct mdp_irq *irq;
uint32_t irqmask = mdp_kms->vblank_mask;
assert_spin_locked(... |
google | android | mdp4_lvds_connector | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/mdp/mdp4/mdp4_lvds_connector.c | 4,382 | utf_8 | 4aa3d00d706466ceaa738871eefbfa28 | /*
*/
#include <linux/gpio.h>
#include "mdp4_kms.h"
struct mdp4_lvds_connector {
struct drm_connector base;
struct drm_encoder *encoder;
struct drm_panel *panel;
};
#define to_mdp4_lvds_connector(x) container_of(x, struct mdp4_lvds_connector, base)
static enum drm_connector_status mdp4_lvds_connector_detect(
stru... |
google | android | mdp4_dtv_encoder | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/mdp/mdp4/mdp4_dtv_encoder.c | 9,457 | utf_8 | d07da532b559c1d18c686b9fb4db4150 | /*
*/
#include "mdp4_kms.h"
#include "drm_crtc.h"
#include "drm_crtc_helper.h"
struct mdp4_dtv_encoder {
struct drm_encoder base;
struct clk *src_clk;
struct clk *hdmi_clk;
struct clk *mdp_clk;
unsigned long int pixclock;
bool enabled;
uint32_t bsc;
};
#define to_mdp4_dtv_encoder(x) container_of(x, struct mdp4_... |
google | android | mdp4_lcdc_encoder | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/mdp/mdp4/mdp4_lcdc_encoder.c | 16,565 | utf_8 | 94524b43e09a10b9b83fbb53afca8c56 | /*
*/
#include "mdp4_kms.h"
#include "drm_crtc.h"
#include "drm_crtc_helper.h"
struct mdp4_lcdc_encoder {
struct drm_encoder base;
struct drm_panel *panel;
struct clk *lcdc_clk;
unsigned long int pixclock;
struct regulator *regs[3];
bool enabled;
uint32_t bsc;
};
#define to_mdp4_lcdc_encoder(x) container_of(x, ... |
google | android | mdp4_irq | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/mdp/mdp4/mdp4_irq.c | 3,159 | utf_8 | ee7a774a8d23faa2ca0d7aae545151f0 | /*
*/
#include "msm_drv.h"
#include "mdp4_kms.h"
void mdp4_set_irqmask(struct mdp_kms *mdp_kms, uint32_t irqmask,
uint32_t old_irqmask)
{
mdp4_write(to_mdp4_kms(mdp_kms), REG_MDP4_INTR_CLEAR,
irqmask ^ (irqmask & old_irqmask));
mdp4_write(to_mdp4_kms(mdp_kms), REG_MDP4_INTR_ENABLE, irqmask);
}
static void mdp4_i... |
google | android | mdp4_crtc | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/mdp/mdp4/mdp4_crtc.c | 18,982 | utf_8 | 35368181f59aeddffadb8f786bad14f8 | /*
*/
#include "mdp4_kms.h"
#include <drm/drm_mode.h>
#include "drm_crtc.h"
#include "drm_crtc_helper.h"
#include "drm_flip_work.h"
struct mdp4_crtc {
struct drm_crtc base;
char name[8];
int id;
int ovlp;
enum mdp4_dma dma;
bool enabled;
/* which mixer/encoder we route output to: */
int mixer;
struct {
spin... |
google | android | mdp4_kms | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c | 15,040 | utf_8 | a434973a4fc86e4f45451ad1a8937cf0 | /*
*/
#include "msm_drv.h"
#include "msm_mmu.h"
#include "mdp4_kms.h"
static struct mdp4_platform_config *mdp4_get_config(struct platform_device *dev);
static int mdp4_hw_init(struct msm_kms *kms)
{
struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
struct drm_device *dev = mdp4_kms->dev;
uint32_t version, m... |
google | android | mdp4_plane | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/mdp/mdp4/mdp4_plane.c | 11,771 | utf_8 | 3c2e3b17595f85d8989d979d90f6f160 | /*
*/
#include "mdp4_kms.h"
#define DOWN_SCALE_MAX 8
#define UP_SCALE_MAX 8
struct mdp4_plane {
struct drm_plane base;
const char *name;
enum mdp4_pipe pipe;
uint32_t caps;
uint32_t nformats;
uint32_t formats[32];
bool enabled;
};
#define to_mdp4_plane(x) container_of(x, struct mdp4_plane, base)
/* MDP format h... |
google | android | mdp4_lvds_pll | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/mdp/mdp4/mdp4_lvds_pll.c | 4,351 | utf_8 | fdf9b08f747982a003f7e6de623c69a2 | /*
*/
#include <linux/clk.h>
#include <linux/clk-provider.h>
#include "mdp4_kms.h"
struct mdp4_lvds_pll {
struct clk_hw pll_hw;
struct drm_device *dev;
unsigned long pixclk;
};
#define to_mdp4_lvds_pll(x) container_of(x, struct mdp4_lvds_pll, pll_hw)
static struct mdp4_kms *get_kms(struct mdp4_lvds_pll *lvds_pll)
{... |
google | android | mdp5_encoder | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c | 11,308 | utf_8 | d1fde6a118e072bc210589df67c2c051 | /*
*/
#include "mdp5_kms.h"
#include "drm_crtc.h"
#include "drm_crtc_helper.h"
struct mdp5_encoder {
struct drm_encoder base;
struct mdp5_interface intf;
spinlock_t intf_lock; /* protect REG_MDP5_INTF_* registers */
bool enabled;
uint32_t bsc;
struct mdp5_ctl *ctl;
};
#define to_mdp5_encoder(x) container_of(x, s... |
google | android | mdp5_kms | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c | 16,384 | utf_8 | 6aa35030c90c49208bf321a2f00b906c | /*
*/
#include "msm_drv.h"
#include "msm_mmu.h"
#include "mdp5_kms.h"
static const char *iommu_ports[] = {
"mdp_0",
};
static int mdp5_hw_init(struct msm_kms *kms)
{
struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));
struct drm_device *dev = mdp5_kms->dev;
unsigned long flags;
pm_runtime_get_sync(dev->dev... |
google | android | mdp5_plane | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c | 27,810 | utf_8 | b49499fcd14b9ce0de672525da5d2668 | /*
*/
#include "mdp5_kms.h"
struct mdp5_plane {
struct drm_plane base;
const char *name;
enum mdp5_pipe pipe;
spinlock_t pipe_lock; /* protect REG_MDP5_PIPE_* registers */
uint32_t reg_offset;
uint32_t caps;
uint32_t flush_mask; /* used to commit pipe registers */
uint32_t nformats;
uint32_t formats[32];
};
#... |
google | android | mdp5_cfg | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c | 12,405 | utf_8 | 16ee1b37fb48572d63eaa8f37467bfbc | /*
*/
#include "mdp5_kms.h"
#include "mdp5_cfg.h"
struct mdp5_cfg_handler {
int revision;
struct mdp5_cfg config;
};
/* mdp5_cfg must be exposed (used in mdp5.xml.h) */
const struct mdp5_cfg_hw *mdp5_cfg = NULL;
const struct mdp5_cfg_hw msm8x74v1_config = {
.name = "msm8x74v1",
.mdp = {
.count = 1,
.base = { 0... |
google | android | mdp5_smp | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/mdp/mdp5/mdp5_smp.c | 12,018 | utf_8 | 2d57ef8de7fbaaf307cd97062639788d | /*
*/
#include "mdp5_kms.h"
#include "mdp5_smp.h"
/* SMP - Shared Memory Pool
*
* These are shared between all the clients, where each plane in a
* scanout buffer is a SMP client. Ie. scanout of 3 plane I420 on
* pipe VIG0 => 3 clients: VIG0_Y, VIG0_CB, VIG0_CR.
*
* Based on the size of the attached scanout buf... |
google | android | mdp5_cmd_encoder | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cmd_encoder.c | 9,483 | utf_8 | 754ebf4e9e6a733d993df146bf8b3aa3 | /*
*/
#include "mdp5_kms.h"
#include "drm_crtc.h"
#include "drm_crtc_helper.h"
struct mdp5_cmd_encoder {
struct drm_encoder base;
struct mdp5_interface intf;
bool enabled;
uint32_t bsc;
struct mdp5_ctl *ctl;
};
#define to_mdp5_cmd_encoder(x) container_of(x, struct mdp5_cmd_encoder, base)
static struct mdp5_kms *g... |
google | android | mdp5_irq | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/mdp/mdp5/mdp5_irq.c | 5,691 | utf_8 | e4ff15810619a4706ea37a5b33373a44 | /*
*/
#include <linux/irqdomain.h>
#include <linux/irq.h>
#include "msm_drv.h"
#include "mdp5_kms.h"
void mdp5_set_irqmask(struct mdp_kms *mdp_kms, uint32_t irqmask,
uint32_t old_irqmask)
{
mdp5_write(to_mdp5_kms(mdp_kms), REG_MDP5_MDP_INTR_CLEAR(0),
irqmask ^ (irqmask & old_irqmask));
mdp5_write(to_mdp5_kms(mdp... |
google | android | mdp5_crtc | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c | 22,851 | utf_8 | 17ec76f384c3b45a546b77fd158c6ed7 | /*
*/
#include "mdp5_kms.h"
#include <linux/sort.h>
#include <drm/drm_mode.h>
#include "drm_crtc.h"
#include "drm_crtc_helper.h"
#include "drm_flip_work.h"
#define CURSOR_WIDTH 64
#define CURSOR_HEIGHT 64
#define SSPP_MAX (SSPP_RGB3 + 1) /* TODO: Add SSPP_MAX in mdp5.xml.h */
struct mdp5_crtc {
struct drm_crtc base;
... |
google | android | mdp5_ctl | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/mdp/mdp5/mdp5_ctl.c | 18,927 | utf_8 | d6cba6e9cc7653ad63b2a65f135022bb | /*
*/
#include "mdp5_kms.h"
#include "mdp5_ctl.h"
/*
* CTL - MDP Control Pool Manager
*
* Controls are shared between all display interfaces.
*
* They are intended to be used for data path configuration.
* The top level register programming describes the complete data path for
* a specific data path ID - REG_MD... |
google | android | a3xx_gpu | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 22,237 | utf_8 | 6e4ecba7dbe2cc4af4b02ad73c5dc18a | /*
*/
#ifdef CONFIG_MSM_OCMEM
# include <mach/ocmem.h>
#endif
#include "a3xx_gpu.h"
#define A3XX_INT0_MASK \
(A3XX_INT0_RBBM_AHB_ERROR | \
A3XX_INT0_RBBM_ATB_BUS_OVERFLOW | \
A3XX_INT0_CP_T0_PACKET_IN_IB | \
A3XX_INT0_CP_OPCODE_ERROR | \
A3XX_INT0_CP_RESERVED_BIT_ERROR | \
A3XX_INT0_CP_HW_F... |
google | android | adreno_device | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/adreno/adreno_device.c | 7,679 | utf_8 | b37b3f1008c4d5979c618df614fb4322 | /*
*/
#include "adreno_gpu.h"
#if defined(DOWNSTREAM_CONFIG_MSM_BUS_SCALING) && !defined(CONFIG_OF)
# include <mach/kgsl.h>
#endif
#define ANY_ID 0xff
bool hang_debug = false;
MODULE_PARM_DESC(hang_debug, "Dump registers when hang is detected (can be slow!)");
module_param_named(hang_debug, hang_debug, bool, 0600);
s... |
google | android | a4xx_gpu | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/adreno/a4xx_gpu.c | 20,844 | utf_8 | 6312cb2690d936ccb9ad0406681ce70a | *
*/
#include "a4xx_gpu.h"
#ifdef CONFIG_MSM_OCMEM
# include <soc/qcom/ocmem.h>
#endif
#define A4XX_INT0_MASK \
(A4XX_INT0_RBBM_AHB_ERROR | \
A4XX_INT0_RBBM_ATB_BUS_OVERFLOW | \
A4XX_INT0_CP_T0_PACKET_IN_IB | \
A4XX_INT0_CP_OPCODE_ERROR | \
A4XX_INT0_CP_RESERVED_BIT_ERROR | \
A4XX_INT0_CP_... |
google | android | adreno_gpu | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/adreno/adreno_gpu.c | 11,789 | utf_8 | 0d64943034f123aefae55ce8c35804a8 | /*
*/
#include "adreno_gpu.h"
#include "msm_gem.h"
#include "msm_mmu.h"
#define RB_SIZE SZ_32K
#define RB_BLKSIZE 16
int adreno_get_param(struct msm_gpu *gpu, uint32_t param, uint64_t *value)
{
struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
switch (param) {
case MSM_PARAM_GPU_ID:
*value = adreno_gpu->info... |
google | android | hdmi_connector | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/hdmi/hdmi_connector.c | 13,940 | utf_8 | a11bc3b86e05b62cdfc3e7342eccaf07 | /*
*/
#include <linux/gpio.h>
#include <linux/pinctrl/consumer.h>
#include "msm_kms.h"
#include "hdmi.h"
struct hdmi_connector {
struct drm_connector base;
struct hdmi *hdmi;
struct work_struct hpd_work;
};
#define to_hdmi_connector(x) container_of(x, struct hdmi_connector, base)
static void hdmi_phy_reset(struct h... |
google | android | hdmi_phy_8x74 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/hdmi/hdmi_phy_8x74.c | 2,690 | utf_8 | 840e87c2e4f7e54f6cc82cbbd6b44851 | /*
*/
#include "hdmi.h"
struct hdmi_phy_8x74 {
struct hdmi_phy base;
void __iomem *mmio;
};
#define to_hdmi_phy_8x74(x) container_of(x, struct hdmi_phy_8x74, base)
static void phy_write(struct hdmi_phy_8x74 *phy, u32 reg, u32 data)
{
msm_writel(data, phy->mmio + reg);
}
//static u32 phy_read(struct hdmi_phy_8x74 *p... |
google | android | hdmi_hdcp | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c | 36,749 | utf_8 | c00f2b3f879386286f4bbb8e9cb62c73 | *
*/
#include "hdmi.h"
#include <linux/qcom_scm.h>
#define HDCP_REG_ENABLE 0x01
#define HDCP_REG_DISABLE 0x00
#define HDCP_PORT_ADDR 0x74
#define HDCP_INT_STATUS_MASK ( \
HDMI_HDCP_INT_CTRL_AUTH_SUCCESS_INT | \
HDMI_HDCP_INT_CTRL_AUTH_FAIL_INT | \
HDMI_HDCP_INT_CTRL_AUTH_XFER_REQ_INT | \
HDMI_HDCP_INT_CTRL_AU... |
google | android | hdmi_audio | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/hdmi/hdmi_audio.c | 8,644 | utf_8 | 624763287a2a59a22b297382059e5a8c | /*
*/
#include <linux/hdmi.h>
#include "hdmi.h"
/* Supported HDMI Audio channels */
#define MSM_HDMI_AUDIO_CHANNEL_2 0
#define MSM_HDMI_AUDIO_CHANNEL_4 1
#define MSM_HDMI_AUDIO_CHANNEL_6 2
#define MSM_HDMI_AUDIO_CHANNEL_8 3
/* maps MSM_HDMI_AUDIO_CHANNEL_n consts used by audio driver to # of channels: */
static in... |
google | android | hdmi_phy_8x60 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/hdmi/hdmi_phy_8x60.c | 5,377 | utf_8 | c94ade62f3eb31c3c8dd78cf90d48bd9 | /*
*/
#include "hdmi.h"
struct hdmi_phy_8x60 {
struct hdmi_phy base;
struct hdmi *hdmi;
};
#define to_hdmi_phy_8x60(x) container_of(x, struct hdmi_phy_8x60, base)
static void hdmi_phy_8x60_destroy(struct hdmi_phy *phy)
{
struct hdmi_phy_8x60 *phy_8x60 = to_hdmi_phy_8x60(phy);
kfree(phy_8x60);
}
static void hdmi_ph... |
google | android | hdmi_i2c | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/hdmi/hdmi_i2c.c | 6,707 | utf_8 | 2b697055ca3a12767e22aee7f3ce1056 | /*
*/
#include "hdmi.h"
struct hdmi_i2c_adapter {
struct i2c_adapter base;
struct hdmi *hdmi;
bool sw_done;
wait_queue_head_t ddc_event;
};
#define to_hdmi_i2c_adapter(x) container_of(x, struct hdmi_i2c_adapter, base)
static void init_ddc(struct hdmi_i2c_adapter *hdmi_i2c)
{
struct hdmi *hdmi = hdmi_i2c->hdmi;
h... |
google | android | hdmi | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/hdmi/hdmi.c | 14,698 | utf_8 | 72c6ba7e5b028adecaad86d8d54967da | /*
*/
#include <linux/of_irq.h>
#include "hdmi.h"
void hdmi_set_mode(struct hdmi *hdmi, bool power_on)
{
uint32_t ctrl = 0;
unsigned long flags;
spin_lock_irqsave(&hdmi->reg_lock, flags);
if (power_on) {
ctrl |= HDMI_CTRL_ENABLE;
if (!hdmi->hdmi_mode) {
ctrl |= HDMI_CTRL_HDMI;
hdmi_write(hdmi, REG_HDMI_C... |
google | android | hdmi_bridge | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/hdmi/hdmi_bridge.c | 6,256 | utf_8 | 707719c802875150781b07ed0efe4422 | /*
*/
#include "hdmi.h"
struct hdmi_bridge {
struct drm_bridge base;
struct hdmi *hdmi;
};
#define to_hdmi_bridge(x) container_of(x, struct hdmi_bridge, base)
void hdmi_bridge_destroy(struct drm_bridge *bridge)
{
}
static void power_on(struct drm_bridge *bridge)
{
struct drm_device *dev = bridge->dev;
struct hdmi_... |
google | android | hdmi_phy_8960 | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/hdmi/hdmi_phy_8960.c | 16,337 | utf_8 | 4525dd23789353d869e80e7cce0af8ff | /*
*/
#ifdef CONFIG_COMMON_CLK
#include <linux/clk.h>
#include <linux/clk-provider.h>
#endif
#include "hdmi.h"
struct hdmi_phy_8960 {
struct hdmi_phy base;
struct hdmi *hdmi;
#ifdef CONFIG_COMMON_CLK
struct clk_hw pll_hw;
struct clk *pll;
unsigned long pixclk;
#endif
};
#define to_hdmi_phy_8960(x) container_of(x,... |
google | android | edp_ctrl | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/edp/edp_ctrl.c | 32,423 | utf_8 | 7e0c4b65c05d2743f08f84ad77c2fc3b | /*
*/
#include <linux/clk.h>
#include <linux/gpio/consumer.h>
#include <linux/regulator/consumer.h>
#include "drm_crtc.h"
#include "drm_dp_helper.h"
#include "drm_edid.h"
#include "edp.h"
#include "edp.xml.h"
#define VDDA_MIN_UV 1800000 /* uV units */
#define VDDA_MAX_UV 1800000 /* uV units */
#define VDDA_UA_ON_LOA... |
google | android | edp_connector | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/edp/edp_connector.c | 4,498 | utf_8 | b896cce23c1a2870e74284cdfdfb93ac | /*
*/
#include "drm/drm_edid.h"
#include "msm_kms.h"
#include "edp.h"
struct edp_connector {
struct drm_connector base;
struct msm_edp *edp;
};
#define to_edp_connector(x) container_of(x, struct edp_connector, base)
static enum drm_connector_status edp_connector_detect(
struct drm_connector *connector, bool force)... |
google | android | edp_phy | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/edp/edp_phy.c | 2,546 | utf_8 | 1c59dd161998eb48d5f95d9007a3a387 | /*
*/
#include "edp.h"
#include "edp.xml.h"
#define EDP_MAX_LANE 4
struct edp_phy {
void __iomem *base;
};
bool msm_edp_phy_ready(struct edp_phy *phy)
{
u32 status;
int cnt = 100;
while (--cnt) {
status = edp_read(phy->base +
REG_EDP_PHY_GLB_PHY_STATUS);
if (status & 0x01)
break;
usleep_range(500, 100... |
google | android | edp_aux | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/edp/edp_aux.c | 6,766 | utf_8 | 507a9cb5a3eb76886678b26111e2a4c4 | /*
*/
#include "edp.h"
#include "edp.xml.h"
#define AUX_CMD_FIFO_LEN 144
#define AUX_CMD_NATIVE_MAX 16
#define AUX_CMD_I2C_MAX 128
#define EDP_INTR_AUX_I2C_ERR \
(EDP_INTERRUPT_REG_1_WRONG_ADDR | EDP_INTERRUPT_REG_1_TIMEOUT | \
EDP_INTERRUPT_REG_1_NACK_DEFER | EDP_INTERRUPT_REG_1_WRONG_DATA_CNT | \
EDP_INTERRUPT_R... |
google | android | edp_bridge | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/edp/edp_bridge.c | 2,974 | utf_8 | d908f94ac7c6c63875ac26241ad53899 | /*
*/
#include "edp.h"
struct edp_bridge {
struct drm_bridge base;
struct msm_edp *edp;
};
#define to_edp_bridge(x) container_of(x, struct edp_bridge, base)
void edp_bridge_destroy(struct drm_bridge *bridge)
{
}
static void edp_bridge_pre_enable(struct drm_bridge *bridge)
{
struct edp_bridge *edp_bridge = to_edp_br... |
google | android | edp | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/msm/edp/edp.c | 4,459 | utf_8 | f559f07df260d0837b4a1ee22d96b44d | /*
*/
#include <linux/of_irq.h>
#include "edp.h"
static irqreturn_t edp_irq(int irq, void *dev_id)
{
struct msm_edp *edp = dev_id;
/* Process eDP irq */
return msm_edp_ctrl_irq(edp->ctrl);
}
static void edp_destroy(struct platform_device *pdev)
{
struct msm_edp *edp = platform_get_drvdata(pdev);
if (!edp)
retur... |
google | android | cirrus_ttm | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/cirrus/cirrus_ttm.c | 10,718 | utf_8 | 269f44a1ecbe9337a47cb38c08216ea2 | /*
*/
#include <drm/drmP.h>
#include "cirrus_drv.h"
#include <ttm/ttm_page_alloc.h>
static inline struct cirrus_device *
cirrus_bdev(struct ttm_bo_device *bd)
{
return container_of(bd, struct cirrus_device, ttm.bdev);
}
static int
cirrus_ttm_mem_global_init(struct drm_global_reference *ref)
{
return ttm_mem_global_i... |
google | android | cirrus_drv | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/cirrus/cirrus_drv.c | 4,423 | utf_8 | b7f5e9f4b8d1677f858a81dd2b1b5c59 | /*
* directory of this archive for more details.
*
* Authors: Matthew Garrett
* Dave Airlie
*/
#include <linux/module.h>
#include <linux/console.h>
#include <drm/drmP.h>
#include <drm/drm_crtc_helper.h>
#include "cirrus_drv.h"
int cirrus_modeset = -1;
int cirrus_bpp = 24;
MODULE_PARM_DESC(modeset, "Disabl... |
google | android | cirrus_mode | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/cirrus/cirrus_mode.c | 15,026 | utf_8 | 2bc07ba348f308f97cacb32f6ebf3b96 | /*
*/
#include <drm/drmP.h>
#include <drm/drm_crtc_helper.h>
#include <drm/drm_plane_helper.h>
#include <video/cirrus.h>
#include "cirrus_drv.h"
#define CIRRUS_LUT_SIZE 256
#define PALETTE_INDEX 0x8
#define PALETTE_DATA 0x9
/*
* This file contains setup code for the CRTC.
*/
static void cirrus_crtc_load_lut(struct d... |
google | android | cirrus_main | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/cirrus/cirrus_main.c | 7,449 | utf_8 | 9dee979b05b6425d1b66925463b8ceea | /*
* directory of this archive for more details.
*
* Authors: Matthew Garrett
* Dave Airlie
*/
#include <drm/drmP.h>
#include <drm/drm_crtc_helper.h>
#include "cirrus_drv.h"
static void cirrus_user_framebuffer_destroy(struct drm_framebuffer *fb)
{
struct cirrus_framebuffer *cirrus_fb = to_cirrus_framebuf... |
google | android | cirrus_fbdev | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/cirrus/cirrus_fbdev.c | 7,946 | utf_8 | 09e7638504ca6b7d01cbe9800f52beca | /*
* directory of this archive for more details.
*
* Authors: Matthew Garrett
* Dave Airlie
*/
#include <linux/module.h>
#include <drm/drmP.h>
#include <drm/drm_fb_helper.h>
#include <drm/drm_crtc_helper.h>
#include <linux/fb.h>
#include "cirrus_drv.h"
static void cirrus_dirty_update(struct cirrus_fbdev *... |
google | android | oaktrail_crtc | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/oaktrail_crtc.c | 19,117 | utf_8 | 5f4e618b0c54f45812b7444887ac71dd | /*
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
*/
#include <linux/i2c.h>
#include <linux/pm_runtime.h>
#include <drm/drmP.h>
#include "framebuffer.h"
#include "psb_drv.h"
#include "psb_intel_drv.h"
#include "psb_intel_reg.h"
#include "gma_display.h"
#include "power.h"
#define MRST_DOT_MIN 19750
#def... |
google | android | cdv_intel_display | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/cdv_intel_display.c | 26,656 | utf_8 | ce69fdab58d7dc2b597e8b5d1c3c312e | /*
*/
#include <linux/i2c.h>
#include <drm/drmP.h>
#include "framebuffer.h"
#include "psb_drv.h"
#include "psb_intel_drv.h"
#include "psb_intel_reg.h"
#include "gma_display.h"
#include "power.h"
#include "cdv_device.h"
static bool cdv_intel_find_dp_pll(const struct gma_limit_t *limit,
struct drm_crtc *crtc, int ... |
google | android | psb_device | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/psb_device.c | 9,465 | utf_8 | 234ee6ba01e00196b1cee4ec5e1dc431 | /**************************************************************************
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
*
**************************************************************************/
#include <linux/backlight.h>
#include <drm/drmP.h>
#include <drm/drm.h>
#include <drm/gma_drm.h>
#includ... |
google | android | mdfld_tpo_vid | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/mdfld_tpo_vid.c | 4,086 | utf_8 | 084b5d56ca1b12a6d6d14d88ae5730b2 | /*
*/
#include "mdfld_dsi_dpi.h"
static struct drm_display_mode *tpo_vid_get_config_mode(struct drm_device *dev)
{
struct drm_display_mode *mode;
struct drm_psb_private *dev_priv = dev->dev_private;
struct oaktrail_timing_info *ti = &dev_priv->gct_data.DTD;
bool use_gct = false;
mode = kzalloc(sizeof(*mode), GFP_... |
google | android | cdv_intel_lvds | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/cdv_intel_lvds.c | 21,710 | utf_8 | 39cd981c935dd20103149675a5d434ae | /*
*/
#include <linux/i2c.h>
#include <linux/dmi.h>
#include <drm/drmP.h>
#include "intel_bios.h"
#include "psb_drv.h"
#include "psb_intel_drv.h"
#include "psb_intel_reg.h"
#include "power.h"
#include <linux/pm_runtime.h>
#include "cdv_device.h"
/**
* LVDS I2C backlight control macros
*/
#define BRIGHTNESS_MAX_LEVEL... |
google | android | oaktrail_hdmi_i2c | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/oaktrail_hdmi_i2c.c | 8,334 | utf_8 | ddcd2391d71a4623a8447319d0efb09a | /*
*/
#include <linux/export.h>
#include <linux/mutex.h>
#include <linux/pci.h>
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include "psb_drv.h"
#define HDMI_READ(reg) readl(hdmi_dev->regs + (reg))
#define HDMI_WRITE(reg, val) writel(val, hdmi_dev->regs + (reg))
#define HDMI_HCR 0x100... |
google | android | mdfld_dsi_pkg_sender | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c | 16,073 | utf_8 | 8549783928d9935669a694a1845f1f0a | /*
*/
#include <linux/freezer.h>
#include <video/mipi_display.h>
#include "mdfld_dsi_output.h"
#include "mdfld_dsi_pkg_sender.h"
#include "mdfld_dsi_dpi.h"
#define MDFLD_DSI_READ_MAX_COUNT 5000
enum {
MDFLD_DSI_PANEL_MODE_SLEEP = 0x1,
};
enum {
MDFLD_DSI_PKG_SENDER_FREE = 0x0,
MDFLD_DSI_PKG_SENDER_BUSY = 0x1,
};
s... |
google | android | cdv_intel_dp | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/cdv_intel_dp.c | 57,865 | utf_8 | 3e6c3e05b824eb1b84a15f62ddd45967 | /*
*
*/
#include <linux/i2c.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <drm/drmP.h>
#include <drm/drm_crtc.h>
#include <drm/drm_crtc_helper.h>
#include "psb_drv.h"
#include "psb_intel_drv.h"
#include "psb_intel_reg.h"
#include "gma_display.h"
#include <drm/drm_dp_helper.h>
/**
* struct i2c_algo_dp... |
google | android | psb_drv | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/psb_drv.c | 16,303 | utf_8 | ef7e040e8737156ef13d87a44c93ac6e | /**************************************************************************
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
*
**************************************************************************/
#include <drm/drmP.h>
#include <drm/drm.h>
#include "psb_drv.h"
#include "framebuffer.h"
#include "psb_r... |
google | android | intel_gmbus | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/intel_gmbus.c | 12,883 | utf_8 | 07915c1204ffe37af7ffaded10212fa4 | /*
*/
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/i2c-algo-bit.h>
#include <drm/drmP.h>
#include "psb_intel_drv.h"
#include <drm/gma_drm.h>
#include "psb_drv.h"
#include "psb_intel_reg.h"
#define _wait_for(COND, MS, W) ({ \
unsigned long timeout__ = jiffies + msecs_to_jiffies(MS); \
int ret__ = ... |
google | android | mdfld_tmd_vid | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/mdfld_tmd_vid.c | 7,236 | utf_8 | bb76905e890603603c5937a5a16c3ff0 | /*
*/
#include "mdfld_dsi_dpi.h"
#include "mdfld_dsi_pkg_sender.h"
static struct drm_display_mode *tmd_vid_get_config_mode(struct drm_device *dev)
{
struct drm_display_mode *mode;
struct drm_psb_private *dev_priv = dev->dev_private;
struct oaktrail_timing_info *ti = &dev_priv->gct_data.DTD;
bool use_gct = false; /... |
google | android | mdfld_dsi_dpi | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/mdfld_dsi_dpi.c | 31,969 | utf_8 | 912850f621dba6e8910db7935357255c | /*
*/
#include "mdfld_dsi_dpi.h"
#include "mdfld_output.h"
#include "mdfld_dsi_pkg_sender.h"
#include "psb_drv.h"
#include "tc35876x-dsi-lvds.h"
static void mdfld_dsi_dpi_shut_down(struct mdfld_dsi_dpi_output *output,
int pipe);
static void mdfld_wait_for_HS_DATA_FIFO(struct drm_device *dev, u32 pipe)
{
u32 g... |
google | android | opregion | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/opregion.c | 10,279 | utf_8 | 33d1fb03b787602349d00e10a663252f | /*
*
*/
#include <linux/acpi.h>
#include "psb_drv.h"
#include "psb_intel_reg.h"
#define PCI_ASLE 0xe4
#define PCI_ASLS 0xfc
#define OPREGION_HEADER_OFFSET 0
#define OPREGION_ACPI_OFFSET 0x100
#define ACPI_CLID 0x01ac /* current lid state indicator */
#define ACPI_CDCK 0x01b0 /* current docking state indicator *... |
google | android | backlight | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/backlight.c | 2,702 | utf_8 | b480617d91c97550c70ac59292e498f1 | /*
* GMA500 Backlight Interface
*
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
*
* Authors: Eric Knopp
*
*/
#include "psb_drv.h"
#include "psb_intel_reg.h"
#include "psb_intel_drv.h"
#include "intel_bios.h"
#include "power.h"
#ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
static void do_gma_backlight_set(str... |
google | android | accel_2d | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/accel_2d.c | 9,750 | utf_8 | d0f2d23b89b2adb5fc3259f65d4a7a15 | /**************************************************************************
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
*
* Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
* develop this driver.
*
**************************************************************************/
#inclu... |
google | android | psb_intel_modes | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/psb_intel_modes.c | 1,773 | utf_8 | 7a6e57f61ee0fefb1eb3afe722a9695e | /*
*/
#include <linux/i2c.h>
#include <linux/fb.h>
#include <drm/drmP.h>
#include "psb_intel_drv.h"
/**
* psb_intel_ddc_probe
*
*/
bool psb_intel_ddc_probe(struct i2c_adapter *adapter)
{
u8 out_buf[] = { 0x0, 0x0 };
u8 buf[2];
int ret;
struct i2c_msg msgs[] = {
{
.addr = 0x50,
.flags = 0,
.len = 1,
... |
google | android | oaktrail_lvds | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/oaktrail_lvds.c | 13,149 | utf_8 | 410082723081fe03c0512c930448be29 | /*
*/
#include <linux/i2c.h>
#include <drm/drmP.h>
#include <asm/intel-mid.h>
#include "intel_bios.h"
#include "psb_drv.h"
#include "psb_intel_drv.h"
#include "psb_intel_reg.h"
#include "power.h"
#include <linux/pm_runtime.h>
/* The max/min PWM frequency in BPCR[31:17] - */
/* The smallest number is 1 (not 0) that can... |
google | android | oaktrail_hdmi | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/oaktrail_hdmi.c | 24,732 | utf_8 | 5dd2b13021764c5d9c0b8d675f661170 | /*
*/
#include <drm/drmP.h>
#include <drm/drm.h>
#include "psb_intel_drv.h"
#include "psb_intel_reg.h"
#include "psb_drv.h"
#define HDMI_READ(reg) readl(hdmi_dev->regs + (reg))
#define HDMI_WRITE(reg, val) writel(val, hdmi_dev->regs + (reg))
#define HDMI_HCR 0x1000
#define HCR_ENABLE_HDCP (1 << 5)
#define HCR_ENABLE... |
google | android | mid_bios | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/mid_bios.c | 8,659 | utf_8 | cfdae1a38e400a300db086cfb5ec8855 | /**************************************************************************
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
*
**************************************************************************/
/* TODO
* - Split functions by vbt type
* - Make them all take drm_device
* - Check ioremap failures
... |
google | android | gma_display | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/gma_display.c | 21,071 | utf_8 | 51a7968be53d38fcf8f2c616799e0ec6 | /*
*/
#include <drm/drmP.h>
#include "gma_display.h"
#include "psb_intel_drv.h"
#include "psb_intel_reg.h"
#include "psb_drv.h"
#include "framebuffer.h"
/**
* Returns whether any output on the specified pipe is of the specified type
*/
bool gma_pipe_has_type(struct drm_crtc *crtc, int type)
{
struct drm_device *dev... |
google | android | oaktrail_lvds_i2c | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/oaktrail_lvds_i2c.c | 4,657 | utf_8 | 4a2c0521d41aeddbe48f89d55bd5710f | /*
*
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/types.h>
#include <linux/i2c.h>
#include <linux/i2c-algo-bit.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/delay.h>
#include <drm/drmP.h>
#include "psb_drv.h"
#include "psb_intel_reg.h"
/*
* LPC GPIO... |
google | android | cdv_intel_hdmi | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/cdv_intel_hdmi.c | 10,323 | utf_8 | 1bf26f13b0764c38403fcfae9f7891d4 | /*
*
* FIXME:
* We should probably make this generic and share it with Medfield
*/
#include <drm/drmP.h>
#include <drm/drm.h>
#include <drm/drm_crtc.h>
#include <drm/drm_edid.h>
#include "psb_intel_drv.h"
#include "psb_drv.h"
#include "psb_intel_reg.h"
#include "cdv_device.h"
#include <linux/pm_runtime.h>
/* hdmi c... |
google | android | psb_intel_sdvo | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/psb_intel_sdvo.c | 82,247 | utf_8 | ec0afd1a0e12e8a9e124a4bfde89f88a | /*
*/
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <drm/drmP.h>
#include <drm/drm_crtc.h>
#include <drm/drm_edid.h>
#include "psb_intel_drv.h"
#include <drm/gma_drm.h>
#include "psb_drv.h"
#include "psb_intel_sdvo_regs.h"
#include "psb_intel_reg.h"
#define ... |
google | android | intel_bios | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/intel_bios.c | 16,672 | utf_8 | 0a4f4346bd477cdb4473b6720a24fcbc | /*
*
*/
#include <drm/drmP.h>
#include <drm/drm.h>
#include <drm/gma_drm.h>
#include "psb_drv.h"
#include "psb_intel_drv.h"
#include "psb_intel_reg.h"
#include "intel_bios.h"
#define SLAVE_ADDR1 0x70
#define SLAVE_ADDR2 0x72
static void *find_section(struct bdb_header *bdb, int section_id)
{
u8 *base = (u8 *)bdb;
i... |
google | android | power | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/power.c | 9,111 | utf_8 | f1c7ad7a9977196a2a69f552f77b1074 | /**************************************************************************
*/
#include "power.h"
#include "psb_drv.h"
#include "psb_reg.h"
#include "psb_intel_reg.h"
#include <linux/mutex.h>
#include <linux/pm_runtime.h>
static struct mutex power_mutex; /* Serialize power ops */
static spinlock_t power_ctrl_lock; /* ... |
google | android | psb_lid | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/psb_lid.c | 2,984 | utf_8 | af641857459ab5d5aeb412fb262025bf | /**************************************************************************
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
*
* Authors: Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
**************************************************************************/
#include <drm/drmP.h>
#include "psb_dr... |
google | android | mdfld_device | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/mdfld_device.c | 13,872 | utf_8 | 742d6b5ad9ababe107ca05c868ff1ba0 | /**************************************************************************
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
*
**************************************************************************/
#include "psb_drv.h"
#include "mid_bios.h"
#include "mdfld_output.h"
#include "mdfld_dsi_output.h"
#incl... |
google | android | oaktrail_device | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/oaktrail_device.c | 15,896 | utf_8 | b7d92fad278d03e21ee9c29df976fe45 | /**************************************************************************
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
*
**************************************************************************/
#include <linux/backlight.h>
#include <linux/module.h>
#include <linux/dmi.h>
#include <drm/drmP.h>
#inc... |
google | android | cdv_intel_crt | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/cdv_intel_crt.c | 8,537 | utf_8 | a53a0f9d53df959158af3bd8d7144a9b | /*
*/
#include <linux/i2c.h>
#include <drm/drmP.h>
#include "intel_bios.h"
#include "psb_drv.h"
#include "psb_intel_drv.h"
#include "psb_intel_reg.h"
#include "power.h"
#include "cdv_device.h"
#include <linux/pm_runtime.h>
static void cdv_intel_crt_dpms(struct drm_encoder *encoder, int mode)
{
struct drm_device *dev ... |
google | android | blitter | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/blitter.c | 1,414 | utf_8 | 95a189132077701754799f7c8a9aaa4d | /*
*/
#include "psb_drv.h"
#include "blitter.h"
#include "psb_reg.h"
/* Wait for the blitter to be completely idle */
int gma_blt_wait_idle(struct drm_psb_private *dev_priv)
{
unsigned long stop = jiffies + HZ;
int busy = 1;
/* NOP for Cedarview */
if (IS_CDV(dev_priv->dev))
return 0;
/* First do a quick check ... |
google | android | mdfld_dsi_output | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/mdfld_dsi_output.c | 16,227 | utf_8 | 9ac4b7a3eed8d4c7e4feacb33ae62d9e | /*
*/
#include <linux/module.h>
#include "mdfld_dsi_output.h"
#include "mdfld_dsi_dpi.h"
#include "mdfld_output.h"
#include "mdfld_dsi_pkg_sender.h"
#include "tc35876x-dsi-lvds.h"
#include <linux/pm_runtime.h>
#include <asm/intel_scu_ipc.h>
/* get the LABC from command line. */
static int LABC_control = 1;
#ifdef MODU... |
google | android | intel_i2c | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/intel_i2c.c | 4,385 | utf_8 | 4bd62398ec594e6e10d07f461b970bfc | /*
*/
#include <linux/export.h>
#include <linux/i2c.h>
#include <linux/i2c-algo-bit.h>
#include "psb_drv.h"
#include "psb_intel_reg.h"
/*
* Intel GPIO access functions
*/
#define I2C_RISEFALL_TIME 20
static int get_clock(void *data)
{
struct psb_intel_i2c_chan *chan = data;
struct drm_device *dev = chan->drm_dev;
... |
google | android | mmu | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/mmu.c | 18,745 | utf_8 | a97f2e36d977b1a3afe764dc1c946da1 | /**************************************************************************
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
*
**************************************************************************/
#include <drm/drmP.h>
#include "psb_drv.h"
#include "psb_reg.h"
#include "mmu.h"
/*
* Code for the SGX ... |
google | android | tc35876x-dsi-lvds | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/tc35876x-dsi-lvds.c | 22,065 | utf_8 | fc8880cd6bf1452e2cf0c4976f3b5f71 | /*
*
*/
#include "mdfld_dsi_dpi.h"
#include "mdfld_output.h"
#include "mdfld_dsi_pkg_sender.h"
#include "tc35876x-dsi-lvds.h"
#include <linux/i2c/tc35876x.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <asm/intel_scu_ipc.h>
static struct i2c_client *tc35876x_client;
static struct i2c_client *cmi_lcd_... |
google | android | gtt | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/gtt.c | 15,827 | utf_8 | b523be448239cbced4019ba09eb92c4b | /*
*/
#include <drm/drmP.h>
#include <linux/shmem_fs.h>
#include "psb_drv.h"
#include "blitter.h"
/*
* GTT resource allocator - manage page mappings in GTT space
*/
/**
* psb_gtt_mask_pte - generate GTT pte entry
*
* Set the GTT entry for the appropriate memory type.
*/
static inline uint32_t psb_gtt_mask_pte(ui... |
google | android | psb_intel_lvds | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/psb_intel_lvds.c | 24,260 | utf_8 | a620b7f2dad9878ba9183cd62b328e6e | /*
*/
#include <linux/i2c.h>
#include <drm/drmP.h>
#include "intel_bios.h"
#include "psb_drv.h"
#include "psb_intel_drv.h"
#include "psb_intel_reg.h"
#include "power.h"
#include <linux/pm_runtime.h>
/*
* LVDS I2C backlight control macros
*/
#define BRIGHTNESS_MAX_LEVEL 100
#define BRIGHTNESS_MASK 0xFF
#define BLC_I2... |
google | android | psb_intel_display | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/psb_intel_display.c | 16,187 | utf_8 | 5eba7c2b0c9bcdfd579eb6c4b68e3ffa | /*
*/
#include <linux/i2c.h>
#include <drm/drmP.h>
#include <drm/drm_plane_helper.h>
#include "framebuffer.h"
#include "psb_drv.h"
#include "psb_intel_drv.h"
#include "psb_intel_reg.h"
#include "gma_display.h"
#include "power.h"
.dot = {.min = 20000, .max = 400000},
.vco = {.min = 1400000, .max = 2800000},
.n = ... |
google | android | mdfld_output | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/mdfld_output.c | 2,343 | utf_8 | fbc4f9c115ab33ee082b18c4cc8ec224 | /*
*/
#include "mdfld_output.h"
#include "mdfld_dsi_dpi.h"
#include "mdfld_dsi_output.h"
#include "tc35876x-dsi-lvds.h"
int mdfld_get_panel_type(struct drm_device *dev, int pipe)
{
struct drm_psb_private *dev_priv = dev->dev_private;
return dev_priv->mdfld_panel_id;
}
static void mdfld_init_panel(struct drm_device *d... |
google | android | cdv_device | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/cdv_device.c | 16,651 | utf_8 | 627706671a9c7c57482b4beaa8910e64 | /**************************************************************************
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
*
**************************************************************************/
#include <linux/backlight.h>
#include <drm/drmP.h>
#include <drm/drm.h>
#include <drm/gma_drm.h>
#includ... |
google | android | gma_device | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/gma_device.c | 1,503 | utf_8 | 37a3751fe321a8b9310d178b372d2478 | /**************************************************************************
* more details.
*
**************************************************************************/
#include <drm/drmP.h>
#include "psb_drv.h"
void gma_get_core_freq(struct drm_device *dev)
{
uint32_t clock;
struct pci_dev *pci_root = pci_get_bu... |
google | android | framebuffer | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/framebuffer.c | 21,463 | utf_8 | 94c2b1f84ad4520323a65c105067e931 | /**************************************************************************
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
*
**************************************************************************/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/string.h>
#... |
google | android | psb_irq | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/psb_irq.c | 18,059 | utf_8 | eb7649a4bd0e5608b7f19f33d71ea190 | /**************************************************************************
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
*
* Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
* develop this driver.
*
**************************************************************************/
/*
*/... |
google | android | mdfld_intel_display | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/mdfld_intel_display.c | 29,151 | utf_8 | 3b5bcfcd4acae5eb878cf192b6a20dbf | /*
*/
#include <linux/i2c.h>
#include <linux/pm_runtime.h>
#include <drm/drmP.h>
#include "psb_intel_reg.h"
#include "gma_display.h"
#include "framebuffer.h"
#include "mdfld_output.h"
#include "mdfld_dsi_output.h"
/* Hardcoded currently */
static int ksel = KSEL_CRYSTAL_19;
struct psb_intel_range_t {
int min, max;
};... |
google | android | gem | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/gma500/gem.c | 6,819 | utf_8 | 3fb3c060bc62df6ea7e82f62e7be87ce | /*
* psb GEM interface
*
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
*
* Authors: Alan Cox
*
* TODO:
* - we need to work out if the MMU is relevant (eg for
* accelerated operations on a GEM object)
*/
#include <drm/drmP.h>
#include <drm/drm.h>
#include <drm/gma_drm.h>
#include <drm/drm_vma_ma... |
google | android | dw_hdmi-imx | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/imx/dw_hdmi-imx.c | 7,397 | utf_8 | 65028d240ec3849275308256c063dc60 | */
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/component.h>
#include <linux/mfd/syscon.h>
#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
#include <drm/bridge/dw_hdmi.h>
#include <video/imx-ipu-v3.h>
#include <linux/regmap.h>
#include <drm/drm_of.h>
#include <drm/drmP.h>
#include <drm/d... |
google | android | imx-ldb | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/imx/imx-ldb.c | 18,743 | utf_8 | 15ffca0d7c09c98519e8af6b11eaf9e5 | /*
* i.MX drm driver - LVDS display bridge
*
*/
#include <linux/module.h>
#include <linux/clk.h>
#include <linux/component.h>
#include <drm/drmP.h>
#include <drm/drm_fb_helper.h>
#include <drm/drm_crtc_helper.h>
#include <drm/drm_panel.h>
#include <linux/mfd/syscon.h>
#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
#... |
google | android | ipuv3-plane | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/imx/ipuv3-plane.c | 10,325 | utf_8 | f5c4abb58e9bddd33752acbb863eb56a | /*
* i.MX IPUv3 DP Overlay Planes
*
*/
#include <drm/drmP.h>
#include <drm/drm_fb_cma_helper.h>
#include <drm/drm_gem_cma_helper.h>
#include "video/imx-ipu-v3.h"
#include "ipuv3-plane.h"
#define to_ipu_plane(x) container_of(x, struct ipu_plane, base)
static const uint32_t ipu_plane_formats[] = {
DRM_FORMAT_ARGB1555... |
google | android | imx-drm-core | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/imx/imx-drm-core.c | 15,364 | utf_8 | d5cc45fa1da8fca47696cde824f5a3a0 | /*
* Freescale i.MX drm driver
*
*
*/
#include <linux/component.h>
#include <linux/device.h>
#include <linux/fb.h>
#include <linux/module.h>
#include <linux/of_graph.h>
#include <linux/platform_device.h>
#include <drm/drmP.h>
#include <drm/drm_fb_helper.h>
#include <drm/drm_crtc_helper.h>
#include <drm/drm_gem_cma_... |
google | android | ipuv3-crtc | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/imx/ipuv3-crtc.c | 12,057 | utf_8 | c94a8be5809a88db5ee9a320dcd3ecb3 | /*
* i.MX IPUv3 Graphics driver
*
*/
#include <linux/component.h>
#include <linux/module.h>
#include <linux/export.h>
#include <linux/device.h>
#include <linux/platform_device.h>
#include <drm/drmP.h>
#include <drm/drm_crtc_helper.h>
#include <linux/fb.h>
#include <linux/clk.h>
#include <linux/errno.h>
#include <drm... |
google | android | parallel-display | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/imx/parallel-display.c | 8,423 | utf_8 | 4acdbf6b5f79a6ead35d6c486206aa43 | /*
* i.MX drm driver - parallel display implementation
*
*/
#include <linux/component.h>
#include <linux/module.h>
#include <drm/drmP.h>
#include <drm/drm_fb_helper.h>
#include <drm/drm_crtc_helper.h>
#include <drm/drm_panel.h>
#include <linux/videodev2.h>
#include <video/of_display_timing.h>
#include <linux/of_grap... |
google | android | imx-tve | .c | platform/hardware/bsp/kernel/intel/edison-v4.4/drivers/gpu/drm/imx/imx-tve.c | 18,107 | utf_8 | 038458df0ccd2f36e2eda3a5973807d3 | /*
* i.MX drm driver - Television Encoder (TVEv2)
*
*/
#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/component.h>
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
#include <linux/spinlock.h>
#include <linux/videodev2.h>
#include... |
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