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ea4862/boeffla41
arch/arm/plat-s3c24xx/simtec-audio.c
4242
1823
/* linux/arch/arm/plat-s3c24xx/simtec-audio.c * * Copyright (c) 2009 Simtec Electronics * http://armlinux.simtec.co.uk/ * Ben Dooks <ben@simtec.co.uk> * * Audio setup for various Simtec S3C24XX implementations * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ #include <linux/kernel.h> #include <linux/interrupt.h> #include <linux/init.h> #include <linux/device.h> #include <linux/io.h> #include <mach/bast-map.h> #include <mach/bast-irq.h> #include <mach/bast-cpld.h> #include <mach/hardware.h> #include <mach/regs-gpio.h> #include <plat/audio-simtec.h> #include <plat/devs.h> /* platform ops for audio */ static void simtec_audio_startup_lrroute(void) { unsigned int tmp; unsigned long flags; local_irq_save(flags); tmp = __raw_readb(BAST_VA_CTRL1); tmp &= ~BAST_CPLD_CTRL1_LRMASK; tmp |= BAST_CPLD_CTRL1_LRCDAC; __raw_writeb(tmp, BAST_VA_CTRL1); local_irq_restore(flags); } static struct s3c24xx_audio_simtec_pdata simtec_audio_platdata; static char our_name[32]; static struct platform_device simtec_audio_dev = { .name = our_name, .id = -1, .dev = { .parent = &s3c_device_iis.dev, .platform_data = &simtec_audio_platdata, }, }; int __init simtec_audio_add(const char *name, bool has_lr_routing, struct s3c24xx_audio_simtec_pdata *spd) { if (!name) name = "tlv320aic23"; snprintf(our_name, sizeof(our_name)-1, "s3c24xx-simtec-%s", name); /* copy platform data so the source can be __initdata */ if (spd) simtec_audio_platdata = *spd; if (has_lr_routing) simtec_audio_platdata.startup = simtec_audio_startup_lrroute; platform_device_register(&s3c_device_iis); platform_device_register(&simtec_audio_dev); return 0; }
gpl-2.0
RJDTWO/intoxicated-boeffla
drivers/staging/media/go7007/wis-saa7113.c
8338
7038
/* * Copyright (C) 2005-2006 Micronas USA Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License (Version 2) as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software Foundation, * Inc., 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. */ #include <linux/module.h> #include <linux/init.h> #include <linux/i2c.h> #include <linux/videodev2.h> #include <linux/ioctl.h> #include <linux/slab.h> #include "wis-i2c.h" struct wis_saa7113 { int norm; int brightness; int contrast; int saturation; int hue; }; static u8 initial_registers[] = { 0x01, 0x08, 0x02, 0xc0, 0x03, 0x33, 0x04, 0x00, 0x05, 0x00, 0x06, 0xe9, 0x07, 0x0d, 0x08, 0xd8, 0x09, 0x40, 0x0a, 0x80, 0x0b, 0x47, 0x0c, 0x40, 0x0d, 0x00, 0x0e, 0x01, 0x0f, 0x2a, 0x10, 0x40, 0x11, 0x0c, 0x12, 0xfe, 0x13, 0x00, 0x14, 0x00, 0x15, 0x04, 0x16, 0x00, 0x17, 0x00, 0x18, 0x00, 0x19, 0x00, 0x1a, 0x00, 0x1b, 0x00, 0x1c, 0x00, 0x1d, 0x00, 0x1e, 0x00, 0x1f, 0xc8, 0x40, 0x00, 0x41, 0xff, 0x42, 0xff, 0x43, 0xff, 0x44, 0xff, 0x45, 0xff, 0x46, 0xff, 0x47, 0xff, 0x48, 0xff, 0x49, 0xff, 0x4a, 0xff, 0x4b, 0xff, 0x4c, 0xff, 0x4d, 0xff, 0x4e, 0xff, 0x4f, 0xff, 0x50, 0xff, 0x51, 0xff, 0x52, 0xff, 0x53, 0xff, 0x54, 0xff, 0x55, 0xff, 0x56, 0xff, 0x57, 0xff, 0x58, 0x00, 0x59, 0x54, 0x5a, 0x07, 0x5b, 0x83, 0x5c, 0x00, 0x5d, 0x00, 0x5e, 0x00, 0x5f, 0x00, 0x60, 0x00, 0x61, 0x00, 0x00, 0x00, /* Terminator (reg 0x00 is read-only) */ }; static int write_reg(struct i2c_client *client, u8 reg, u8 value) { return i2c_smbus_write_byte_data(client, reg, value); } static int write_regs(struct i2c_client *client, u8 *regs) { int i; for (i = 0; regs[i] != 0x00; i += 2) if (i2c_smbus_write_byte_data(client, regs[i], regs[i + 1]) < 0) return -1; return 0; } static int wis_saa7113_command(struct i2c_client *client, unsigned int cmd, void *arg) { struct wis_saa7113 *dec = i2c_get_clientdata(client); switch (cmd) { case VIDIOC_S_INPUT: { int *input = arg; i2c_smbus_write_byte_data(client, 0x02, 0xC0 | *input); i2c_smbus_write_byte_data(client, 0x09, *input < 6 ? 0x40 : 0x80); break; } case VIDIOC_S_STD: { v4l2_std_id *input = arg; dec->norm = *input; if (dec->norm & V4L2_STD_NTSC) { write_reg(client, 0x0e, 0x01); write_reg(client, 0x10, 0x40); } else if (dec->norm & V4L2_STD_PAL) { write_reg(client, 0x0e, 0x01); write_reg(client, 0x10, 0x48); } else if (dec->norm * V4L2_STD_SECAM) { write_reg(client, 0x0e, 0x50); write_reg(client, 0x10, 0x48); } break; } case VIDIOC_QUERYCTRL: { struct v4l2_queryctrl *ctrl = arg; switch (ctrl->id) { case V4L2_CID_BRIGHTNESS: ctrl->type = V4L2_CTRL_TYPE_INTEGER; strncpy(ctrl->name, "Brightness", sizeof(ctrl->name)); ctrl->minimum = 0; ctrl->maximum = 255; ctrl->step = 1; ctrl->default_value = 128; ctrl->flags = 0; break; case V4L2_CID_CONTRAST: ctrl->type = V4L2_CTRL_TYPE_INTEGER; strncpy(ctrl->name, "Contrast", sizeof(ctrl->name)); ctrl->minimum = 0; ctrl->maximum = 127; ctrl->step = 1; ctrl->default_value = 71; ctrl->flags = 0; break; case V4L2_CID_SATURATION: ctrl->type = V4L2_CTRL_TYPE_INTEGER; strncpy(ctrl->name, "Saturation", sizeof(ctrl->name)); ctrl->minimum = 0; ctrl->maximum = 127; ctrl->step = 1; ctrl->default_value = 64; ctrl->flags = 0; break; case V4L2_CID_HUE: ctrl->type = V4L2_CTRL_TYPE_INTEGER; strncpy(ctrl->name, "Hue", sizeof(ctrl->name)); ctrl->minimum = -128; ctrl->maximum = 127; ctrl->step = 1; ctrl->default_value = 0; ctrl->flags = 0; break; } break; } case VIDIOC_S_CTRL: { struct v4l2_control *ctrl = arg; switch (ctrl->id) { case V4L2_CID_BRIGHTNESS: if (ctrl->value > 255) dec->brightness = 255; else if (ctrl->value < 0) dec->brightness = 0; else dec->brightness = ctrl->value; write_reg(client, 0x0a, dec->brightness); break; case V4L2_CID_CONTRAST: if (ctrl->value > 127) dec->contrast = 127; else if (ctrl->value < 0) dec->contrast = 0; else dec->contrast = ctrl->value; write_reg(client, 0x0b, dec->contrast); break; case V4L2_CID_SATURATION: if (ctrl->value > 127) dec->saturation = 127; else if (ctrl->value < 0) dec->saturation = 0; else dec->saturation = ctrl->value; write_reg(client, 0x0c, dec->saturation); break; case V4L2_CID_HUE: if (ctrl->value > 127) dec->hue = 127; else if (ctrl->value < -128) dec->hue = -128; else dec->hue = ctrl->value; write_reg(client, 0x0d, dec->hue); break; } break; } case VIDIOC_G_CTRL: { struct v4l2_control *ctrl = arg; switch (ctrl->id) { case V4L2_CID_BRIGHTNESS: ctrl->value = dec->brightness; break; case V4L2_CID_CONTRAST: ctrl->value = dec->contrast; break; case V4L2_CID_SATURATION: ctrl->value = dec->saturation; break; case V4L2_CID_HUE: ctrl->value = dec->hue; break; } break; } default: break; } return 0; } static int wis_saa7113_probe(struct i2c_client *client, const struct i2c_device_id *id) { struct i2c_adapter *adapter = client->adapter; struct wis_saa7113 *dec; if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) return -ENODEV; dec = kmalloc(sizeof(struct wis_saa7113), GFP_KERNEL); if (dec == NULL) return -ENOMEM; dec->norm = V4L2_STD_NTSC; dec->brightness = 128; dec->contrast = 71; dec->saturation = 64; dec->hue = 0; i2c_set_clientdata(client, dec); printk(KERN_DEBUG "wis-saa7113: initializing SAA7113 at address %d on %s\n", client->addr, adapter->name); if (write_regs(client, initial_registers) < 0) { printk(KERN_ERR "wis-saa7113: error initializing SAA7113\n"); kfree(dec); return -ENODEV; } return 0; } static int wis_saa7113_remove(struct i2c_client *client) { struct wis_saa7113 *dec = i2c_get_clientdata(client); kfree(dec); return 0; } static const struct i2c_device_id wis_saa7113_id[] = { { "wis_saa7113", 0 }, { } }; MODULE_DEVICE_TABLE(i2c, wis_saa7113_id); static struct i2c_driver wis_saa7113_driver = { .driver = { .name = "WIS SAA7113 I2C driver", }, .probe = wis_saa7113_probe, .remove = wis_saa7113_remove, .command = wis_saa7113_command, .id_table = wis_saa7113_id, }; static int __init wis_saa7113_init(void) { return i2c_add_driver(&wis_saa7113_driver); } static void __exit wis_saa7113_cleanup(void) { i2c_del_driver(&wis_saa7113_driver); } module_init(wis_saa7113_init); module_exit(wis_saa7113_cleanup); MODULE_LICENSE("GPL v2");
gpl-2.0
arjen75/icecold-kernel
drivers/staging/go7007/wis-ov7640.c
8338
2462
/* * Copyright (C) 2005-2006 Micronas USA Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License (Version 2) as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software Foundation, * Inc., 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. */ #include <linux/module.h> #include <linux/init.h> #include <linux/i2c.h> #include <linux/videodev2.h> #include "wis-i2c.h" struct wis_ov7640 { int brightness; int contrast; int saturation; int hue; }; static u8 initial_registers[] = { 0x12, 0x80, 0x12, 0x54, 0x14, 0x24, 0x15, 0x01, 0x28, 0x20, 0x75, 0x82, 0xFF, 0xFF, /* Terminator (reg 0xFF is unused) */ }; static int write_regs(struct i2c_client *client, u8 *regs) { int i; for (i = 0; regs[i] != 0xFF; i += 2) if (i2c_smbus_write_byte_data(client, regs[i], regs[i + 1]) < 0) return -1; return 0; } static int wis_ov7640_probe(struct i2c_client *client, const struct i2c_device_id *id) { struct i2c_adapter *adapter = client->adapter; if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) return -ENODEV; client->flags = I2C_CLIENT_SCCB; printk(KERN_DEBUG "wis-ov7640: initializing OV7640 at address %d on %s\n", client->addr, adapter->name); if (write_regs(client, initial_registers) < 0) { printk(KERN_ERR "wis-ov7640: error initializing OV7640\n"); return -ENODEV; } return 0; } static int wis_ov7640_remove(struct i2c_client *client) { return 0; } static const struct i2c_device_id wis_ov7640_id[] = { { "wis_ov7640", 0 }, { } }; MODULE_DEVICE_TABLE(i2c, wis_ov7640_id); static struct i2c_driver wis_ov7640_driver = { .driver = { .name = "WIS OV7640 I2C driver", }, .probe = wis_ov7640_probe, .remove = wis_ov7640_remove, .id_table = wis_ov7640_id, }; static int __init wis_ov7640_init(void) { return i2c_add_driver(&wis_ov7640_driver); } static void __exit wis_ov7640_cleanup(void) { i2c_del_driver(&wis_ov7640_driver); } module_init(wis_ov7640_init); module_exit(wis_ov7640_cleanup); MODULE_LICENSE("GPL v2");
gpl-2.0
OwnROM-Devices/OwnKernel-sprout
arch/mips/lasat/interrupt.c
9874
3483
/* * Carsten Langgaard, carstenl@mips.com * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved. * * This program is free software; you can distribute it and/or modify it * under the terms of the GNU General Public License (Version 2) as * published by the Free Software Foundation. * * This program is distributed in the hope it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License * for more details. * * You should have received a copy of the GNU General Public License along * with this program; if not, write to the Free Software Foundation, Inc., * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. * * Routines for generic manipulation of the interrupts found on the * Lasat boards. */ #include <linux/init.h> #include <linux/interrupt.h> #include <linux/irq.h> #include <asm/irq_cpu.h> #include <asm/lasat/lasat.h> #include <asm/lasat/lasatint.h> #include <irq.h> static volatile int *lasat_int_status; static volatile int *lasat_int_mask; static volatile int lasat_int_mask_shift; void disable_lasat_irq(struct irq_data *d) { unsigned int irq_nr = d->irq - LASAT_IRQ_BASE; *lasat_int_mask &= ~(1 << irq_nr) << lasat_int_mask_shift; } void enable_lasat_irq(struct irq_data *d) { unsigned int irq_nr = d->irq - LASAT_IRQ_BASE; *lasat_int_mask |= (1 << irq_nr) << lasat_int_mask_shift; } static struct irq_chip lasat_irq_type = { .name = "Lasat", .irq_mask = disable_lasat_irq, .irq_unmask = enable_lasat_irq, }; static inline int ls1bit32(unsigned int x) { int b = 31, s; s = 16; if (x << 16 == 0) s = 0; b -= s; x <<= s; s = 8; if (x << 8 == 0) s = 0; b -= s; x <<= s; s = 4; if (x << 4 == 0) s = 0; b -= s; x <<= s; s = 2; if (x << 2 == 0) s = 0; b -= s; x <<= s; s = 1; if (x << 1 == 0) s = 0; b -= s; return b; } static unsigned long (*get_int_status)(void); static unsigned long get_int_status_100(void) { return *lasat_int_status & *lasat_int_mask; } static unsigned long get_int_status_200(void) { unsigned long int_status; int_status = *lasat_int_status; int_status &= (int_status >> LASATINT_MASK_SHIFT_200) & 0xffff; return int_status; } asmlinkage void plat_irq_dispatch(void) { unsigned long int_status; unsigned int cause = read_c0_cause(); int irq; if (cause & CAUSEF_IP7) { /* R4000 count / compare IRQ */ do_IRQ(7); return; } int_status = get_int_status(); /* if int_status == 0, then the interrupt has already been cleared */ if (int_status) { irq = LASAT_IRQ_BASE + ls1bit32(int_status); do_IRQ(irq); } } static struct irqaction cascade = { .handler = no_action, .name = "cascade", .flags = IRQF_NO_THREAD, }; void __init arch_init_irq(void) { int i; if (IS_LASAT_200()) { lasat_int_status = (void *)LASAT_INT_STATUS_REG_200; lasat_int_mask = (void *)LASAT_INT_MASK_REG_200; lasat_int_mask_shift = LASATINT_MASK_SHIFT_200; get_int_status = get_int_status_200; *lasat_int_mask &= 0xffff; } else { lasat_int_status = (void *)LASAT_INT_STATUS_REG_100; lasat_int_mask = (void *)LASAT_INT_MASK_REG_100; lasat_int_mask_shift = LASATINT_MASK_SHIFT_100; get_int_status = get_int_status_100; *lasat_int_mask = 0; } mips_cpu_irq_init(); for (i = LASAT_IRQ_BASE; i <= LASAT_IRQ_END; i++) irq_set_chip_and_handler(i, &lasat_irq_type, handle_level_irq); setup_irq(LASAT_CASCADE_IRQ, &cascade); }
gpl-2.0
burstlam/kernel-35
drivers/media/video/pwc/pwc-timon.c
14994
67609
/* Linux driver for Philips webcam (C) 2004-2006 Luc Saillard (luc@saillard.org) NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx driver and thus may have bugs that are not present in the original version. Please send bug reports and support requests to <luc@saillard.org>. The decompression routines have been implemented by reverse-engineering the Nemosoft binary pwcx module. Caveat emptor. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ /* This tables contains entries for the 675/680/690 (Timon) camera, with 4 different qualities (no compression, low, medium, high). It lists the bandwidth requirements for said mode by its alternate interface number. An alternate of 0 means that the mode is unavailable. There are 6 * 4 * 4 entries: 6 different resolutions subqcif, qsif, qcif, sif, cif, vga 6 framerates: 5, 10, 15, 20, 25, 30 4 compression modi: none, low, medium, high When an uncompressed mode is not available, the next available compressed mode will be chosen (unless the decompressor is absent). Sometimes there are only 1 or 2 compressed modes available; in that case entries are duplicated. */ #include "pwc-timon.h" const unsigned int Timon_fps_vector[PWC_FPS_MAX_TIMON] = { 5, 10, 15, 20, 25, 30 }; const struct Timon_table_entry Timon_table[PSZ_MAX][PWC_FPS_MAX_TIMON][4] = { /* SQCIF */ { /* 5 fps */ { {1, 140, 0, {0x05, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x8C, 0xFC, 0x80, 0x02}}, {1, 140, 0, {0x05, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x8C, 0xFC, 0x80, 0x02}}, {1, 140, 0, {0x05, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x8C, 0xFC, 0x80, 0x02}}, {1, 140, 0, {0x05, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x8C, 0xFC, 0x80, 0x02}}, }, /* 10 fps */ { {2, 280, 0, {0x04, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x18, 0xA9, 0x80, 0x02}}, {2, 280, 0, {0x04, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x18, 0xA9, 0x80, 0x02}}, {2, 280, 0, {0x04, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x18, 0xA9, 0x80, 0x02}}, {2, 280, 0, {0x04, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x18, 0xA9, 0x80, 0x02}}, }, /* 15 fps */ { {3, 410, 0, {0x03, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x9A, 0x71, 0x80, 0x02}}, {3, 410, 0, {0x03, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x9A, 0x71, 0x80, 0x02}}, {3, 410, 0, {0x03, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x9A, 0x71, 0x80, 0x02}}, {3, 410, 0, {0x03, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x9A, 0x71, 0x80, 0x02}}, }, /* 20 fps */ { {4, 559, 0, {0x02, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x2F, 0x56, 0x80, 0x02}}, {4, 559, 0, {0x02, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x2F, 0x56, 0x80, 0x02}}, {4, 559, 0, {0x02, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x2F, 0x56, 0x80, 0x02}}, {4, 559, 0, {0x02, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x2F, 0x56, 0x80, 0x02}}, }, /* 25 fps */ { {5, 659, 0, {0x01, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x93, 0x46, 0x80, 0x02}}, {5, 659, 0, {0x01, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x93, 0x46, 0x80, 0x02}}, {5, 659, 0, {0x01, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x93, 0x46, 0x80, 0x02}}, {5, 659, 0, {0x01, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x93, 0x46, 0x80, 0x02}}, }, /* 30 fps */ { {7, 838, 0, {0x00, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x46, 0x3B, 0x80, 0x02}}, {7, 838, 0, {0x00, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x46, 0x3B, 0x80, 0x02}}, {7, 838, 0, {0x00, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x46, 0x3B, 0x80, 0x02}}, {7, 838, 0, {0x00, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x46, 0x3B, 0x80, 0x02}}, }, }, /* QSIF */ { /* 5 fps */ { {1, 146, 0, {0x2D, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x92, 0xFC, 0xC0, 0x02}}, {1, 146, 0, {0x2D, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x92, 0xFC, 0xC0, 0x02}}, {1, 146, 0, {0x2D, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x92, 0xFC, 0xC0, 0x02}}, {1, 146, 0, {0x2D, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x92, 0xFC, 0xC0, 0x02}}, }, /* 10 fps */ { {2, 291, 0, {0x2C, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x23, 0xA1, 0xC0, 0x02}}, {1, 191, 630, {0x2C, 0xF4, 0x05, 0x13, 0xA9, 0x12, 0xE1, 0x17, 0x08, 0xBF, 0xF4, 0xC0, 0x02}}, {1, 191, 630, {0x2C, 0xF4, 0x05, 0x13, 0xA9, 0x12, 0xE1, 0x17, 0x08, 0xBF, 0xF4, 0xC0, 0x02}}, {1, 191, 630, {0x2C, 0xF4, 0x05, 0x13, 0xA9, 0x12, 0xE1, 0x17, 0x08, 0xBF, 0xF4, 0xC0, 0x02}}, }, /* 15 fps */ { {3, 437, 0, {0x2B, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0xB5, 0x6D, 0xC0, 0x02}}, {2, 291, 640, {0x2B, 0xF4, 0x05, 0x13, 0xF7, 0x13, 0x2F, 0x13, 0x08, 0x23, 0xA1, 0xC0, 0x02}}, {2, 291, 640, {0x2B, 0xF4, 0x05, 0x13, 0xF7, 0x13, 0x2F, 0x13, 0x08, 0x23, 0xA1, 0xC0, 0x02}}, {1, 191, 420, {0x2B, 0xF4, 0x0D, 0x0D, 0x1B, 0x0C, 0x53, 0x1E, 0x08, 0xBF, 0xF4, 0xC0, 0x02}}, }, /* 20 fps */ { {4, 588, 0, {0x2A, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x4C, 0x52, 0xC0, 0x02}}, {3, 447, 730, {0x2A, 0xF4, 0x05, 0x16, 0xC9, 0x16, 0x01, 0x0E, 0x18, 0xBF, 0x69, 0xC0, 0x02}}, {2, 292, 476, {0x2A, 0xF4, 0x0D, 0x0E, 0xD8, 0x0E, 0x10, 0x19, 0x18, 0x24, 0xA1, 0xC0, 0x02}}, {1, 192, 312, {0x2A, 0xF4, 0x1D, 0x09, 0xB3, 0x08, 0xEB, 0x1E, 0x18, 0xC0, 0xF4, 0xC0, 0x02}}, }, /* 25 fps */ { {5, 703, 0, {0x29, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0xBF, 0x42, 0xC0, 0x02}}, {3, 447, 610, {0x29, 0xF4, 0x05, 0x13, 0x0B, 0x12, 0x43, 0x14, 0x18, 0xBF, 0x69, 0xC0, 0x02}}, {2, 292, 398, {0x29, 0xF4, 0x0D, 0x0C, 0x6C, 0x0B, 0xA4, 0x1E, 0x18, 0x24, 0xA1, 0xC0, 0x02}}, {1, 192, 262, {0x29, 0xF4, 0x25, 0x08, 0x23, 0x07, 0x5B, 0x1E, 0x18, 0xC0, 0xF4, 0xC0, 0x02}}, }, /* 30 fps */ { {8, 873, 0, {0x28, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x69, 0x37, 0xC0, 0x02}}, {5, 704, 774, {0x28, 0xF4, 0x05, 0x18, 0x21, 0x17, 0x59, 0x0F, 0x18, 0xC0, 0x42, 0xC0, 0x02}}, {3, 448, 492, {0x28, 0xF4, 0x05, 0x0F, 0x5D, 0x0E, 0x95, 0x15, 0x18, 0xC0, 0x69, 0xC0, 0x02}}, {2, 291, 320, {0x28, 0xF4, 0x1D, 0x09, 0xFB, 0x09, 0x33, 0x1E, 0x18, 0x23, 0xA1, 0xC0, 0x02}}, }, }, /* QCIF */ { /* 5 fps */ { {1, 193, 0, {0x0D, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0xC1, 0xF4, 0xC0, 0x02}}, {1, 193, 0, {0x0D, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0xC1, 0xF4, 0xC0, 0x02}}, {1, 193, 0, {0x0D, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0xC1, 0xF4, 0xC0, 0x02}}, {1, 193, 0, {0x0D, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0xC1, 0xF4, 0xC0, 0x02}}, }, /* 10 fps */ { {3, 385, 0, {0x0C, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0x81, 0x79, 0xC0, 0x02}}, {2, 291, 800, {0x0C, 0xF4, 0x05, 0x18, 0xF4, 0x18, 0x18, 0x11, 0x08, 0x23, 0xA1, 0xC0, 0x02}}, {2, 291, 800, {0x0C, 0xF4, 0x05, 0x18, 0xF4, 0x18, 0x18, 0x11, 0x08, 0x23, 0xA1, 0xC0, 0x02}}, {1, 194, 532, {0x0C, 0xF4, 0x05, 0x10, 0x9A, 0x0F, 0xBE, 0x1B, 0x08, 0xC2, 0xF0, 0xC0, 0x02}}, }, /* 15 fps */ { {4, 577, 0, {0x0B, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0x41, 0x52, 0xC0, 0x02}}, {3, 447, 818, {0x0B, 0xF4, 0x05, 0x19, 0x89, 0x18, 0xAD, 0x0F, 0x10, 0xBF, 0x69, 0xC0, 0x02}}, {2, 292, 534, {0x0B, 0xF4, 0x05, 0x10, 0xA3, 0x0F, 0xC7, 0x19, 0x10, 0x24, 0xA1, 0xC0, 0x02}}, {1, 195, 356, {0x0B, 0xF4, 0x15, 0x0B, 0x11, 0x0A, 0x35, 0x1E, 0x10, 0xC3, 0xF0, 0xC0, 0x02}}, }, /* 20 fps */ { {6, 776, 0, {0x0A, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0x08, 0x3F, 0xC0, 0x02}}, {4, 591, 804, {0x0A, 0xF4, 0x05, 0x19, 0x1E, 0x18, 0x42, 0x0F, 0x18, 0x4F, 0x4E, 0xC0, 0x02}}, {3, 447, 608, {0x0A, 0xF4, 0x05, 0x12, 0xFD, 0x12, 0x21, 0x15, 0x18, 0xBF, 0x69, 0xC0, 0x02}}, {2, 291, 396, {0x0A, 0xF4, 0x15, 0x0C, 0x5E, 0x0B, 0x82, 0x1E, 0x18, 0x23, 0xA1, 0xC0, 0x02}}, }, /* 25 fps */ { {9, 928, 0, {0x09, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0xA0, 0x33, 0xC0, 0x02}}, {5, 703, 800, {0x09, 0xF4, 0x05, 0x18, 0xF4, 0x18, 0x18, 0x10, 0x18, 0xBF, 0x42, 0xC0, 0x02}}, {3, 447, 508, {0x09, 0xF4, 0x0D, 0x0F, 0xD2, 0x0E, 0xF6, 0x1B, 0x18, 0xBF, 0x69, 0xC0, 0x02}}, {2, 292, 332, {0x09, 0xF4, 0x1D, 0x0A, 0x5A, 0x09, 0x7E, 0x1E, 0x18, 0x24, 0xA1, 0xC0, 0x02}}, }, /* 30 fps */ { {0, }, {9, 956, 876, {0x08, 0xF4, 0x05, 0x1B, 0x58, 0x1A, 0x7C, 0x0E, 0x20, 0xBC, 0x33, 0x10, 0x02}}, {4, 592, 542, {0x08, 0xF4, 0x05, 0x10, 0xE4, 0x10, 0x08, 0x17, 0x20, 0x50, 0x4E, 0x10, 0x02}}, {2, 291, 266, {0x08, 0xF4, 0x25, 0x08, 0x48, 0x07, 0x6C, 0x1E, 0x20, 0x23, 0xA1, 0x10, 0x02}}, }, }, /* SIF */ { /* 5 fps */ { {4, 582, 0, {0x35, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x46, 0x52, 0x60, 0x02}}, {3, 387, 1276, {0x35, 0xF4, 0x05, 0x27, 0xD8, 0x26, 0x48, 0x03, 0x10, 0x83, 0x79, 0x60, 0x02}}, {2, 291, 960, {0x35, 0xF4, 0x0D, 0x1D, 0xF2, 0x1C, 0x62, 0x04, 0x10, 0x23, 0xA1, 0x60, 0x02}}, {1, 191, 630, {0x35, 0xF4, 0x1D, 0x13, 0xA9, 0x12, 0x19, 0x05, 0x08, 0xBF, 0xF4, 0x60, 0x02}}, }, /* 10 fps */ { {0, }, {6, 775, 1278, {0x34, 0xF4, 0x05, 0x27, 0xE8, 0x26, 0x58, 0x05, 0x30, 0x07, 0x3F, 0x10, 0x02}}, {3, 447, 736, {0x34, 0xF4, 0x15, 0x16, 0xFB, 0x15, 0x6B, 0x05, 0x18, 0xBF, 0x69, 0x10, 0x02}}, {2, 291, 480, {0x34, 0xF4, 0x2D, 0x0E, 0xF9, 0x0D, 0x69, 0x09, 0x18, 0x23, 0xA1, 0x10, 0x02}}, }, /* 15 fps */ { {0, }, {9, 955, 1050, {0x33, 0xF4, 0x05, 0x20, 0xCF, 0x1F, 0x3F, 0x06, 0x48, 0xBB, 0x33, 0x10, 0x02}}, {4, 591, 650, {0x33, 0xF4, 0x15, 0x14, 0x44, 0x12, 0xB4, 0x08, 0x30, 0x4F, 0x4E, 0x10, 0x02}}, {3, 448, 492, {0x33, 0xF4, 0x25, 0x0F, 0x52, 0x0D, 0xC2, 0x09, 0x28, 0xC0, 0x69, 0x10, 0x02}}, }, /* 20 fps */ { {0, }, {9, 958, 782, {0x32, 0xF4, 0x0D, 0x18, 0x6A, 0x16, 0xDA, 0x0B, 0x58, 0xBE, 0x33, 0xD0, 0x02}}, {5, 703, 574, {0x32, 0xF4, 0x1D, 0x11, 0xE7, 0x10, 0x57, 0x0B, 0x40, 0xBF, 0x42, 0xD0, 0x02}}, {3, 446, 364, {0x32, 0xF4, 0x3D, 0x0B, 0x5C, 0x09, 0xCC, 0x0E, 0x30, 0xBE, 0x69, 0xD0, 0x02}}, }, /* 25 fps */ { {0, }, {9, 958, 654, {0x31, 0xF4, 0x15, 0x14, 0x66, 0x12, 0xD6, 0x0B, 0x50, 0xBE, 0x33, 0x90, 0x02}}, {6, 776, 530, {0x31, 0xF4, 0x25, 0x10, 0x8C, 0x0E, 0xFC, 0x0C, 0x48, 0x08, 0x3F, 0x90, 0x02}}, {4, 592, 404, {0x31, 0xF4, 0x35, 0x0C, 0x96, 0x0B, 0x06, 0x0B, 0x38, 0x50, 0x4E, 0x90, 0x02}}, }, /* 30 fps */ { {0, }, {9, 957, 526, {0x30, 0xF4, 0x25, 0x10, 0x68, 0x0E, 0xD8, 0x0D, 0x58, 0xBD, 0x33, 0x60, 0x02}}, {6, 775, 426, {0x30, 0xF4, 0x35, 0x0D, 0x48, 0x0B, 0xB8, 0x0F, 0x50, 0x07, 0x3F, 0x60, 0x02}}, {4, 590, 324, {0x30, 0x7A, 0x4B, 0x0A, 0x1C, 0x08, 0xB4, 0x0E, 0x40, 0x4E, 0x52, 0x60, 0x02}}, }, }, /* CIF */ { /* 5 fps */ { {6, 771, 0, {0x15, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x03, 0x3F, 0x80, 0x02}}, {4, 465, 1278, {0x15, 0xF4, 0x05, 0x27, 0xEE, 0x26, 0x36, 0x03, 0x18, 0xD1, 0x65, 0x80, 0x02}}, {2, 291, 800, {0x15, 0xF4, 0x15, 0x18, 0xF4, 0x17, 0x3C, 0x05, 0x18, 0x23, 0xA1, 0x80, 0x02}}, {1, 193, 528, {0x15, 0xF4, 0x2D, 0x10, 0x7E, 0x0E, 0xC6, 0x0A, 0x18, 0xC1, 0xF4, 0x80, 0x02}}, }, /* 10 fps */ { {0, }, {9, 932, 1278, {0x14, 0xF4, 0x05, 0x27, 0xEE, 0x26, 0x36, 0x04, 0x30, 0xA4, 0x33, 0x10, 0x02}}, {4, 591, 812, {0x14, 0xF4, 0x15, 0x19, 0x56, 0x17, 0x9E, 0x06, 0x28, 0x4F, 0x4E, 0x10, 0x02}}, {2, 291, 400, {0x14, 0xF4, 0x3D, 0x0C, 0x7A, 0x0A, 0xC2, 0x0E, 0x28, 0x23, 0xA1, 0x10, 0x02}}, }, /* 15 fps */ { {0, }, {9, 956, 876, {0x13, 0xF4, 0x0D, 0x1B, 0x58, 0x19, 0xA0, 0x05, 0x38, 0xBC, 0x33, 0x60, 0x02}}, {5, 703, 644, {0x13, 0xF4, 0x1D, 0x14, 0x1C, 0x12, 0x64, 0x08, 0x38, 0xBF, 0x42, 0x60, 0x02}}, {3, 448, 410, {0x13, 0xF4, 0x3D, 0x0C, 0xC4, 0x0B, 0x0C, 0x0E, 0x38, 0xC0, 0x69, 0x60, 0x02}}, }, /* 20 fps */ { {0, }, {9, 956, 650, {0x12, 0xF4, 0x1D, 0x14, 0x4A, 0x12, 0x92, 0x09, 0x48, 0xBC, 0x33, 0x10, 0x03}}, {6, 776, 528, {0x12, 0xF4, 0x2D, 0x10, 0x7E, 0x0E, 0xC6, 0x0A, 0x40, 0x08, 0x3F, 0x10, 0x03}}, {4, 591, 402, {0x12, 0xF4, 0x3D, 0x0C, 0x8F, 0x0A, 0xD7, 0x0E, 0x40, 0x4F, 0x4E, 0x10, 0x03}}, }, /* 25 fps */ { {0, }, {9, 956, 544, {0x11, 0xF4, 0x25, 0x10, 0xF4, 0x0F, 0x3C, 0x0A, 0x48, 0xBC, 0x33, 0xC0, 0x02}}, {7, 840, 478, {0x11, 0xF4, 0x2D, 0x0E, 0xEB, 0x0D, 0x33, 0x0B, 0x48, 0x48, 0x3B, 0xC0, 0x02}}, {5, 703, 400, {0x11, 0xF4, 0x3D, 0x0C, 0x7A, 0x0A, 0xC2, 0x0E, 0x48, 0xBF, 0x42, 0xC0, 0x02}}, }, /* 30 fps */ { {0, }, {9, 956, 438, {0x10, 0xF4, 0x35, 0x0D, 0xAC, 0x0B, 0xF4, 0x0D, 0x50, 0xBC, 0x33, 0x10, 0x02}}, {7, 838, 384, {0x10, 0xF4, 0x45, 0x0B, 0xFD, 0x0A, 0x45, 0x0F, 0x50, 0x46, 0x3B, 0x10, 0x02}}, {6, 773, 354, {0x10, 0x7A, 0x4B, 0x0B, 0x0C, 0x09, 0x80, 0x10, 0x50, 0x05, 0x3F, 0x10, 0x02}}, }, }, /* VGA */ { /* 5 fps */ { {0, }, {6, 773, 1272, {0x1D, 0xF4, 0x15, 0x27, 0xB6, 0x24, 0x96, 0x02, 0x30, 0x05, 0x3F, 0x10, 0x02}}, {4, 592, 976, {0x1D, 0xF4, 0x25, 0x1E, 0x78, 0x1B, 0x58, 0x03, 0x30, 0x50, 0x4E, 0x10, 0x02}}, {3, 448, 738, {0x1D, 0xF4, 0x3D, 0x17, 0x0C, 0x13, 0xEC, 0x04, 0x30, 0xC0, 0x69, 0x10, 0x02}}, }, /* 10 fps */ { {0, }, {9, 956, 788, {0x1C, 0xF4, 0x35, 0x18, 0x9C, 0x15, 0x7C, 0x03, 0x48, 0xBC, 0x33, 0x10, 0x02}}, {6, 776, 640, {0x1C, 0x7A, 0x53, 0x13, 0xFC, 0x11, 0x2C, 0x04, 0x48, 0x08, 0x3F, 0x10, 0x02}}, {4, 592, 488, {0x1C, 0x7A, 0x6B, 0x0F, 0x3C, 0x0C, 0x6C, 0x06, 0x48, 0x50, 0x4E, 0x10, 0x02}}, }, /* 15 fps */ { {0, }, {9, 957, 526, {0x1B, 0x7A, 0x63, 0x10, 0x68, 0x0D, 0x98, 0x06, 0x58, 0xBD, 0x33, 0x80, 0x02}}, {9, 957, 526, {0x1B, 0x7A, 0x63, 0x10, 0x68, 0x0D, 0x98, 0x06, 0x58, 0xBD, 0x33, 0x80, 0x02}}, {8, 895, 492, {0x1B, 0x7A, 0x6B, 0x0F, 0x5D, 0x0C, 0x8D, 0x06, 0x58, 0x7F, 0x37, 0x80, 0x02}}, }, /* 20 fps */ { {0, }, {0, }, {0, }, {0, }, }, /* 25 fps */ { {0, }, {0, }, {0, }, {0, }, }, /* 30 fps */ { {0, }, {0, }, {0, }, {0, }, }, }, }; /* * 16 versions: * 2 tables (one for Y, and one for U&V) * 16 levels of details per tables * 8 blocs */ const unsigned int TimonRomTable [16][2][16][8] = { { /* version 0 */ { /* version 0, passes 0 */ {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000001}, {0x00000000,0x00000000,0x00000001,0x00000001, 0x00000001,0x00000001,0x00000001,0x00000001}, {0x00000000,0x00000000,0x00000001,0x00000001, 0x00000001,0x00000009,0x00000009,0x00000009}, {0x00000000,0x00000000,0x00000009,0x00000001, 0x00000009,0x00000009,0x00000009,0x00000009}, {0x00000000,0x00000000,0x00000009,0x00000009, 0x00000009,0x00000009,0x00000049,0x00000009}, {0x00000000,0x00000000,0x00000009,0x00000009, 0x00000009,0x00000049,0x00000049,0x00000049}, {0x00000000,0x00000000,0x00000009,0x00000009, 0x00000049,0x00000049,0x00000049,0x00000049}, {0x00000000,0x00000000,0x00000009,0x00000049, 0x00000049,0x00000049,0x00000049,0x00000049}, {0x00000000,0x00000000,0x00000049,0x00000049, 0x00000049,0x00000049,0x0000024a,0x0000024a}, {0x00000000,0x00000000,0x00000049,0x00000049, 0x00000049,0x00000249,0x0000024a,0x0000024a}, {0x00000000,0x00000000,0x00000049,0x00000049, 0x00000249,0x00000249,0x0000024a,0x0000024a}, {0x00000000,0x00000000,0x00000049,0x00000049, 0x00000249,0x00000249,0x00001252,0x0000024a}, {0x00000000,0x00000000,0x00000049,0x00000049, 0x00000249,0x0000124a,0x00001252,0x0000024a}, {0x00000000,0x00000000,0x00000049,0x00000249, 0x00000249,0x0000124a,0x00001252,0x0000024a}, {0x00000000,0x00000000,0x00000249,0x00001249, 0x0000124a,0x00009252,0x00009292,0x00001252}, {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000000} }, { /* version 0, passes 1 */ {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000000}, {0x00000000,0x00000000,0x00000001,0x00000001, 0x00000001,0x00000001,0x00000000,0x00000000}, {0x00000000,0x00000000,0x00000009,0x00000001, 0x00000001,0x00000009,0x00000000,0x00000000}, {0x00000000,0x00000000,0x00000009,0x00000009, 0x00000009,0x00000009,0x00000000,0x00000000}, {0x00000000,0x00000000,0x00000009,0x00000009, 0x00000009,0x00000009,0x00000001,0x00000000}, {0x00000000,0x00000000,0x00000049,0x00000009, 0x00000009,0x00000049,0x00000001,0x00000001}, {0x00000000,0x00000000,0x00000049,0x00000009, 0x00000009,0x00000049,0x00000001,0x00000001}, {0x00000000,0x00000000,0x00000049,0x00000049, 0x00000049,0x00000049,0x00000009,0x00000001}, {0x00000000,0x00000000,0x00000049,0x00000049, 0x00000049,0x00000049,0x00000009,0x00000001}, {0x00000000,0x00000000,0x00000049,0x00000049, 0x00000049,0x00000049,0x00000009,0x00000001}, {0x00000000,0x00000000,0x00000049,0x00000049, 0x00000049,0x00000049,0x00000009,0x00000009}, {0x00000000,0x00000000,0x00000049,0x00000049, 0x00000049,0x00000249,0x00000049,0x00000009}, {0x00000000,0x00000000,0x00000049,0x00000049, 0x00000049,0x00000249,0x00000049,0x00000009}, {0x00000000,0x00000000,0x00000249,0x00000049, 0x00000249,0x00000249,0x00000049,0x00000009}, {0x00000000,0x00000000,0x00001249,0x00000249, 0x0000124a,0x0000124a,0x0000024a,0x00000049}, {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000000} } }, { /* version 1 */ { /* version 1, passes 0 */ {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000001}, {0x00000000,0x00000000,0x00000001,0x00000001, 0x00000001,0x00000009,0x00000009,0x00000009}, {0x00000000,0x00000000,0x00000009,0x00000009, 0x00000009,0x00000009,0x00000009,0x00000009}, {0x00000000,0x00000000,0x00000009,0x00000009, 0x00000009,0x00000049,0x00000049,0x00000049}, {0x00000000,0x00000000,0x00000009,0x00000049, 0x00000049,0x00000049,0x00000049,0x00000049}, {0x00000000,0x00000000,0x00000049,0x00000049, 0x00000049,0x00000249,0x0000024a,0x0000024a}, {0x00000000,0x00000000,0x00000049,0x00000049, 0x00000249,0x00000249,0x0000024a,0x0000024a}, {0x00000000,0x00000000,0x00000049,0x00000249, 0x00000249,0x00000249,0x0000024a,0x00001252}, {0x00000000,0x00000000,0x00000049,0x00000249, 0x00000249,0x0000124a,0x00001252,0x00001252}, {0x00000000,0x00000000,0x00000049,0x00000249, 0x0000124a,0x0000124a,0x00001252,0x00001252}, {0x00000000,0x00000000,0x00000249,0x00000249, 0x0000124a,0x0000124a,0x00009292,0x00009292}, {0x00000000,0x00000000,0x00000249,0x00001249, 0x0000124a,0x00009252,0x00009292,0x00009292}, {0x00000000,0x00000000,0x00000249,0x00001249, 0x00009252,0x00009252,0x00009292,0x00009292}, {0x00000000,0x00000000,0x00000249,0x0000924a, 0x00009292,0x00009493,0x00009493,0x00009493}, {0x00000000,0x00000000,0x00001249,0x00009252, 0x00009492,0x0000a49b,0x0000a49b,0x0000a49b}, {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000000} }, { /* version 1, passes 1 */ {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000000}, {0x00000000,0x00000000,0x00000009,0x00000009, 0x00000009,0x00000001,0x00000001,0x00000000}, {0x00000000,0x00000000,0x00000009,0x00000009, 0x00000009,0x00000009,0x00000001,0x00000000}, {0x00000000,0x00000000,0x00000049,0x00000049, 0x00000049,0x00000009,0x00000001,0x00000000}, {0x00000000,0x00000000,0x00000049,0x00000049, 0x00000049,0x00000049,0x00000001,0x00000001}, {0x00000000,0x00000000,0x00000049,0x00000049, 0x00000049,0x00000049,0x00000009,0x00000001}, {0x00000000,0x00000000,0x00000249,0x00000049, 0x00000049,0x00000249,0x00000009,0x00000001}, {0x00000000,0x00000000,0x00000249,0x00000049, 0x00000249,0x00000249,0x00000009,0x00000009}, {0x00000000,0x00000000,0x00000249,0x00000249, 0x00000249,0x00000249,0x00000049,0x00000009}, {0x00000000,0x00000000,0x00000249,0x00000249, 0x00000249,0x0000124a,0x00000049,0x00000009}, {0x00000000,0x00000000,0x00000249,0x00000249, 0x00000249,0x0000124a,0x00000049,0x00000009}, {0x00000000,0x00000000,0x00000249,0x00000249, 0x00000249,0x0000124a,0x0000024a,0x00000049}, {0x00000000,0x00000000,0x00000249,0x00000249, 0x0000124a,0x0000124a,0x0000024a,0x00000049}, {0x00000000,0x00000000,0x00000249,0x00000249, 0x0000124a,0x0000124a,0x0000024a,0x00000049}, {0x00000000,0x00000000,0x00001249,0x00001249, 0x00009252,0x00009252,0x00001252,0x0000024a}, {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000000} } }, { /* version 2 */ { /* version 2, passes 0 */ {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000001}, {0x00000000,0x00000000,0x00000009,0x00000009, 0x00000009,0x00000009,0x00000009,0x00000009}, {0x00000000,0x00000000,0x00000049,0x00000049, 0x00000049,0x00000049,0x00000049,0x00000049}, {0x00000000,0x00000000,0x00000049,0x00000049, 0x00000049,0x00000249,0x0000024a,0x0000024a}, {0x00000000,0x00000000,0x00000049,0x00000249, 0x00000249,0x00000249,0x0000024a,0x00001252}, {0x00000000,0x00000000,0x00000249,0x00000249, 0x00000249,0x0000124a,0x00001252,0x00001252}, {0x00000000,0x00000000,0x00000249,0x00000249, 0x0000124a,0x0000124a,0x00009292,0x00009292}, {0x00000000,0x00000000,0x00000249,0x00001249, 0x0000124a,0x00009252,0x00009292,0x00009292}, {0x00000000,0x00000000,0x00000249,0x00001249, 0x00009252,0x00009292,0x00009292,0x00009292}, {0x00000000,0x00000000,0x00000249,0x00001249, 0x00009252,0x00009292,0x00009493,0x00009493}, {0x00000000,0x00000000,0x00000249,0x0000924a, 0x00009252,0x00009493,0x00009493,0x00009493}, {0x00000000,0x00000000,0x00000249,0x0000924a, 0x00009292,0x00009493,0x00009493,0x00009493}, {0x00000000,0x00000000,0x00000249,0x00009252, 0x00009492,0x00009493,0x0000a49b,0x0000a49b}, {0x00000000,0x00000000,0x00001249,0x00009292, 0x00009492,0x000124db,0x000124db,0x000124db}, {0x00000000,0x00000000,0x0000924a,0x00009493, 0x0000a493,0x000126dc,0x000126dc,0x000126dc}, {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000000} }, { /* version 2, passes 1 */ {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000000}, {0x00000000,0x00000000,0x00000049,0x00000009, 0x00000049,0x00000009,0x00000001,0x00000000}, {0x00000000,0x00000000,0x00000049,0x00000049, 0x00000049,0x00000049,0x00000049,0x00000000}, {0x00000000,0x00000000,0x00000249,0x00000049, 0x00000249,0x00000049,0x0000024a,0x00000001}, {0x00000000,0x00000000,0x00000249,0x00000249, 0x00000249,0x00000249,0x0000024a,0x00000001}, {0x00000000,0x00000000,0x00000249,0x00000249, 0x00000249,0x00000249,0x0000024a,0x00000001}, {0x00000000,0x00000000,0x00000249,0x00000249, 0x00000249,0x00000249,0x0000024a,0x00000009}, {0x00000000,0x00000000,0x00000249,0x00000249, 0x0000124a,0x0000124a,0x0000024a,0x00000009}, {0x00000000,0x00000000,0x00000249,0x00000249, 0x0000124a,0x0000124a,0x0000024a,0x00000009}, {0x00000000,0x00000000,0x00001249,0x00001249, 0x0000124a,0x00009252,0x00001252,0x00000049}, {0x00000000,0x00000000,0x00001249,0x00001249, 0x0000124a,0x00009292,0x00001252,0x00000049}, {0x00000000,0x00000000,0x00001249,0x00001249, 0x0000124a,0x00009292,0x00001252,0x00000049}, {0x00000000,0x00000000,0x00001249,0x00001249, 0x00009252,0x00009292,0x00001252,0x0000024a}, {0x00000000,0x00000000,0x00001249,0x00001249, 0x00009292,0x00009292,0x00001252,0x0000024a}, {0x00000000,0x00000000,0x0000924a,0x0000924a, 0x00009492,0x00009493,0x00009292,0x00001252}, {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000000} } }, { /* version 3 */ { /* version 3, passes 0 */ {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000001}, {0x00000000,0x00000000,0x00000049,0x00000049, 0x00000049,0x00000049,0x00000049,0x00000049}, {0x00000000,0x00000000,0x00000049,0x00000249, 0x00000249,0x00000249,0x00001252,0x0000024a}, {0x00000000,0x00000000,0x00000249,0x00000249, 0x00000249,0x0000124a,0x00001252,0x00001252}, {0x00000000,0x00000000,0x00000249,0x00000249, 0x0000124a,0x00009252,0x00009292,0x00009292}, {0x00000000,0x00000000,0x00000249,0x00001249, 0x0000124a,0x00009292,0x00009292,0x00009493}, {0x00000000,0x00000000,0x00000249,0x00001249, 0x00009252,0x00009292,0x00009493,0x00009493}, {0x00000000,0x00000000,0x00000249,0x00001249, 0x00009292,0x00009493,0x00009493,0x00009493}, {0x00000000,0x00000000,0x00000249,0x00009252, 0x00009292,0x00009493,0x0000a49b,0x0000a49b}, {0x00000000,0x00000000,0x00001249,0x00009252, 0x00009292,0x0000a49b,0x0000a49b,0x0000a49b}, {0x00000000,0x00000000,0x00001249,0x00009252, 0x00009492,0x0000a49b,0x0000a49b,0x0000a49b}, {0x00000000,0x00000000,0x00001249,0x00009292, 0x00009492,0x0000a49b,0x000124db,0x000124db}, {0x00000000,0x00000000,0x00001249,0x00009292, 0x0000a493,0x0000a49b,0x000124db,0x000124db}, {0x00000000,0x00000000,0x00001249,0x00009493, 0x0001249b,0x000126dc,0x000136e4,0x000126dc}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x000124db,0x000136e4,0x0001b725,0x000136e4}, {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000000} }, { /* version 3, passes 1 */ {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000000}, {0x00000000,0x00000000,0x00000049,0x00000049, 0x00000049,0x00000049,0x00000001,0x00000000}, {0x00000000,0x00000000,0x00000249,0x00000249, 0x00000249,0x00000249,0x00000049,0x00000001}, {0x00000000,0x00000000,0x00000249,0x00000249, 0x00000249,0x0000124a,0x00001252,0x00000001}, {0x00000000,0x00000000,0x00000249,0x00000249, 0x0000124a,0x0000124a,0x00001252,0x00000009}, {0x00000000,0x00000000,0x00000249,0x00001249, 0x0000124a,0x00009252,0x00009292,0x00000009}, {0x00000000,0x00000000,0x00001249,0x00001249, 0x0000124a,0x00009252,0x00009292,0x00000049}, {0x00000000,0x00000000,0x00001249,0x00001249, 0x00009252,0x00009252,0x00009292,0x00000049}, {0x00000000,0x00000000,0x00001249,0x00001249, 0x00009252,0x00009493,0x00009292,0x0000024a}, {0x00000000,0x00000000,0x00001249,0x00001249, 0x00009252,0x00009493,0x00009292,0x0000024a}, {0x00000000,0x00000000,0x00001249,0x00001249, 0x00009252,0x00009493,0x00009493,0x00001252}, {0x00000000,0x00000000,0x00001249,0x0000924a, 0x00009292,0x00009493,0x00009493,0x00001252}, {0x00000000,0x00000000,0x00001249,0x0000924a, 0x00009492,0x00009493,0x00009493,0x00009292}, {0x00000000,0x00000000,0x00001249,0x00009252, 0x00009492,0x0000a49b,0x00009493,0x00009292}, {0x00000000,0x00000000,0x0000924a,0x00009292, 0x0000a493,0x000124db,0x0000a49b,0x00009493}, {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000000} } }, { /* version 4 */ { /* version 4, passes 0 */ {0x00000000,0x00000000,0x00000049,0x00000049, 0x00000049,0x00000049,0x0000024a,0x0000024a}, {0x00000000,0x00000000,0x00000249,0x00000249, 0x00000249,0x0000124a,0x00001252,0x00009292}, {0x00000000,0x00000000,0x00000249,0x00000249, 0x0000124a,0x00009252,0x00009292,0x00009292}, {0x00000000,0x00000000,0x00000249,0x00001249, 0x0000124a,0x00009292,0x00009493,0x00009493}, {0x00000000,0x00000000,0x00000249,0x00001249, 0x00009252,0x00009493,0x00009493,0x0000a49b}, {0x00000000,0x00000000,0x00000249,0x0000924a, 0x00009292,0x00009493,0x0000a49b,0x0000a49b}, {0x00000000,0x00000000,0x00001249,0x0000924a, 0x00009292,0x00009493,0x0000a49b,0x000124db}, {0x00000000,0x00000000,0x00001249,0x00009252, 0x00009492,0x0000a49b,0x0000a49b,0x000124db}, {0x00000000,0x00000000,0x00001249,0x00009292, 0x00009492,0x000124db,0x000124db,0x000126dc}, {0x00000000,0x00000000,0x00001249,0x00009292, 0x0000a493,0x000124db,0x000126dc,0x000126dc}, {0x00000000,0x00000000,0x00001249,0x00009493, 0x0000a493,0x000124db,0x000126dc,0x000136e4}, {0x00000000,0x00000000,0x00001249,0x00009493, 0x0000a493,0x000126dc,0x000136e4,0x000136e4}, {0x00000000,0x00000000,0x0000924a,0x00009493, 0x0001249b,0x000126dc,0x000136e4,0x000136e4}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x000124db,0x000136e4,0x000136e4,0x0001b724}, {0x00000000,0x00000000,0x00009252,0x000124db, 0x000126dc,0x0001b724,0x0001b725,0x0001b925}, {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000000} }, { /* version 4, passes 1 */ {0x00000000,0x00000000,0x00000049,0x00000049, 0x00000049,0x00000049,0x00000049,0x00000049}, {0x00000000,0x00000000,0x00000249,0x00000249, 0x00000249,0x00000249,0x0000024a,0x00000049}, {0x00000000,0x00000000,0x00001249,0x00000249, 0x0000124a,0x0000124a,0x00001252,0x00000049}, {0x00000000,0x00000000,0x00001249,0x00001249, 0x0000124a,0x0000124a,0x00009292,0x0000024a}, {0x00000000,0x00000000,0x00001249,0x00001249, 0x00009252,0x00009292,0x00009292,0x0000024a}, {0x00000000,0x00000000,0x00001249,0x00001249, 0x00009252,0x00009292,0x0000a49b,0x0000024a}, {0x00000000,0x00000000,0x00001249,0x00001249, 0x00009292,0x00009493,0x0000a49b,0x00001252}, {0x00000000,0x00000000,0x00001249,0x00001249, 0x00009292,0x00009493,0x0000a49b,0x00001252}, {0x00000000,0x00000000,0x00001249,0x0000924a, 0x00009492,0x0000a49b,0x0000a49b,0x00001252}, {0x00000000,0x00000000,0x00001249,0x00009252, 0x00009492,0x0000a49b,0x0000a49b,0x00009292}, {0x00000000,0x00000000,0x00001249,0x00009292, 0x00009492,0x0000a49b,0x0000a49b,0x00009292}, {0x00000000,0x00000000,0x00001249,0x00009493, 0x0000a493,0x0000a49b,0x0000a49b,0x00009292}, {0x00000000,0x00000000,0x00001249,0x00009493, 0x0000a493,0x0000a49b,0x0000a49b,0x00009493}, {0x00000000,0x00000000,0x0000924a,0x00009493, 0x0000a493,0x000124db,0x0000a49b,0x00009493}, {0x00000000,0x00000000,0x00009252,0x0000a49b, 0x0001249b,0x000126dc,0x000124db,0x0000a49b}, {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000000} } }, { /* version 5 */ { /* version 5, passes 0 */ {0x00000000,0x00000000,0x00000249,0x00000249, 0x00000249,0x0000124a,0x00001252,0x00009292}, {0x00000000,0x00000000,0x00000249,0x00001249, 0x0000124a,0x00009292,0x00009292,0x00009493}, {0x00000000,0x00000000,0x00000249,0x0000924a, 0x00009292,0x00009493,0x0000a49b,0x0000a49b}, {0x00000000,0x00000000,0x00001249,0x0000924a, 0x00009292,0x00009493,0x0000a49b,0x0000a49b}, {0x00000000,0x00000000,0x00001249,0x0000924a, 0x00009492,0x0000a49b,0x0000a49b,0x000124db}, {0x00000000,0x00000000,0x00001249,0x00009292, 0x00009492,0x0000a49b,0x000124db,0x000124db}, {0x00000000,0x00000000,0x00001249,0x00009292, 0x0000a493,0x000124db,0x000124db,0x000126dc}, {0x00000000,0x00000000,0x00001249,0x00009493, 0x0000a493,0x000124db,0x000126dc,0x000126dc}, {0x00000000,0x00000000,0x00001249,0x00009493, 0x0000a493,0x000126dc,0x000136e4,0x000136e4}, {0x00000000,0x00000000,0x00001249,0x00009493, 0x0001249b,0x000126dc,0x000136e4,0x000136e4}, {0x00000000,0x00000000,0x00001249,0x00009493, 0x0001249b,0x000126dc,0x000136e4,0x000136e4}, {0x00000000,0x00000000,0x0000924a,0x00009493, 0x0001249b,0x000126dc,0x0001b725,0x0001b724}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x000124db,0x000126dc,0x0001b725,0x0001b724}, {0x00000000,0x00000000,0x00009292,0x0000a49b, 0x000126dc,0x000136e4,0x0001b92d,0x0001b925}, {0x00000000,0x00000000,0x00009492,0x000124db, 0x000136e4,0x0001b724,0x0001c96e,0x0001c92d}, {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000000} }, { /* version 5, passes 1 */ {0x00000000,0x00000000,0x00000249,0x00000249, 0x0000124a,0x00000249,0x0000024a,0x0000024a}, {0x00000000,0x00000000,0x00001249,0x00001249, 0x0000124a,0x0000124a,0x00001252,0x0000024a}, {0x00000000,0x00000000,0x00001249,0x00001249, 0x00009292,0x00009493,0x00009493,0x0000024a}, {0x00000000,0x00000000,0x00001249,0x00001249, 0x00009292,0x00009493,0x00009493,0x00001252}, {0x00000000,0x00000000,0x00001249,0x00001249, 0x00009292,0x00009493,0x0000a49b,0x00001252}, {0x00000000,0x00000000,0x00001249,0x0000924a, 0x00009492,0x00009493,0x000124db,0x00001252}, {0x00000000,0x00000000,0x00001249,0x00009292, 0x00009492,0x00009493,0x000124db,0x00009292}, {0x00000000,0x00000000,0x00001249,0x00009292, 0x00009492,0x0000a49b,0x000124db,0x00009292}, {0x00000000,0x00000000,0x00001249,0x00009493, 0x0000a493,0x0000a49b,0x000124db,0x00009292}, {0x00000000,0x00000000,0x00001249,0x00009493, 0x0000a493,0x000124db,0x000124db,0x00009493}, {0x00000000,0x00000000,0x0000924a,0x00009493, 0x0000a493,0x000124db,0x000124db,0x00009493}, {0x00000000,0x00000000,0x0000924a,0x00009493, 0x0000a493,0x000124db,0x000124db,0x00009493}, {0x00000000,0x00000000,0x0000924a,0x00009493, 0x0000a493,0x000124db,0x000124db,0x0000a49b}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x000124db,0x000126dc,0x000124db,0x0000a49b}, {0x00000000,0x00000000,0x00009252,0x000124db, 0x000126dc,0x000136e4,0x000126dc,0x000124db}, {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000000} } }, { /* version 6 */ { /* version 6, passes 0 */ {0x00000000,0x00000000,0x00000249,0x00000249, 0x0000124a,0x0000124a,0x00009292,0x00009292}, {0x00000000,0x00000000,0x00001249,0x00001249, 0x00009292,0x00009493,0x0000a49b,0x0000a49b}, {0x00000000,0x00000000,0x00001249,0x0000924a, 0x00009492,0x0000a49b,0x0000a49b,0x000124db}, {0x00000000,0x00000000,0x00001249,0x00009292, 0x00009492,0x000124db,0x000126dc,0x000126dc}, {0x00000000,0x00000000,0x00001249,0x00009493, 0x0000a493,0x000124db,0x000126dc,0x000126dc}, {0x00000000,0x00000000,0x00001249,0x00009493, 0x0000a493,0x000126dc,0x000136e4,0x000136e4}, {0x00000000,0x00000000,0x00001249,0x00009493, 0x0000a493,0x000126dc,0x000136e4,0x0001b724}, {0x00000000,0x00000000,0x00001249,0x00009493, 0x0001249b,0x000126dc,0x000136e4,0x0001b724}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0001249b,0x000126dc,0x000136e4,0x0001b724}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0001249b,0x000136e4,0x0001b725,0x0001b724}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x000124db,0x000136e4,0x0001b725,0x0001b925}, {0x00000000,0x00000000,0x00009292,0x0000a49b, 0x000126dc,0x000136e4,0x0001b92d,0x0001b925}, {0x00000000,0x00000000,0x00009292,0x0000a49b, 0x000126dc,0x0001b724,0x0001b92d,0x0001c92d}, {0x00000000,0x00000000,0x00009492,0x000124db, 0x000126dc,0x0001b724,0x0001c96e,0x0001c92d}, {0x00000000,0x00000000,0x0000a492,0x000126db, 0x000136e4,0x0001b925,0x00025bb6,0x00024b77}, {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000000} }, { /* version 6, passes 1 */ {0x00000000,0x00000000,0x00001249,0x00000249, 0x0000124a,0x0000124a,0x00001252,0x00001252}, {0x00000000,0x00000000,0x00001249,0x00001249, 0x00009252,0x00009292,0x00009292,0x00001252}, {0x00000000,0x00000000,0x00001249,0x0000924a, 0x00009492,0x00009493,0x0000a49b,0x00001252}, {0x00000000,0x00000000,0x00001249,0x00009252, 0x00009492,0x0000a49b,0x0000a49b,0x00009292}, {0x00000000,0x00000000,0x00001249,0x00009292, 0x00009492,0x0000a49b,0x0000a49b,0x00009292}, {0x00000000,0x00000000,0x00001249,0x00009493, 0x0000a493,0x0000a49b,0x000126dc,0x00009292}, {0x00000000,0x00000000,0x0000924a,0x00009493, 0x0000a493,0x0000a49b,0x000126dc,0x00009493}, {0x00000000,0x00000000,0x0000924a,0x00009493, 0x0000a493,0x0000a49b,0x000126dc,0x00009493}, {0x00000000,0x00000000,0x0000924a,0x00009493, 0x0000a493,0x000124db,0x000126dc,0x00009493}, {0x00000000,0x00000000,0x0000924a,0x00009493, 0x0000a493,0x000124db,0x000126dc,0x0000a49b}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0000a493,0x000124db,0x000126dc,0x0000a49b}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0001249b,0x000126dc,0x000126dc,0x0000a49b}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x000124db,0x000136e4,0x000126dc,0x000124db}, {0x00000000,0x00000000,0x00009492,0x0000a49b, 0x000136e4,0x000136e4,0x000126dc,0x000124db}, {0x00000000,0x00000000,0x0000a492,0x000124db, 0x0001b724,0x0001b724,0x000136e4,0x000126dc}, {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000000} } }, { /* version 7 */ { /* version 7, passes 0 */ {0x00000000,0x00000000,0x00001249,0x00001249, 0x00009292,0x00009493,0x0000a49b,0x000124db}, {0x00000000,0x00000000,0x00001249,0x00009292, 0x0000a493,0x0000a49b,0x000124db,0x000126dc}, {0x00000000,0x00000000,0x00001249,0x00009493, 0x0000a493,0x000124db,0x000126dc,0x000136e4}, {0x00000000,0x00000000,0x00001249,0x00009493, 0x0000a493,0x000124db,0x000136e4,0x000136e4}, {0x00000000,0x00000000,0x00001249,0x00009493, 0x0001249b,0x000126dc,0x000136e4,0x000136e4}, {0x00000000,0x00000000,0x00001249,0x0000a49b, 0x0001249b,0x000126dc,0x000136e4,0x0001b724}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0001249b,0x000126dc,0x000136e4,0x0001b724}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x000124db,0x000136e4,0x0001b725,0x0001b724}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x000126dc,0x000136e4,0x0001b725,0x0001b925}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x000126dc,0x0001b724,0x0001b92d,0x0001b925}, {0x00000000,0x00000000,0x00009292,0x0000a49b, 0x000126dc,0x0001b724,0x0001c96e,0x0001c92d}, {0x00000000,0x00000000,0x00009292,0x000124db, 0x000126dc,0x0001b724,0x0001c96e,0x0001c92d}, {0x00000000,0x00000000,0x00009492,0x000124db, 0x000136e4,0x0001b724,0x0001c96e,0x0002496e}, {0x00000000,0x00000000,0x00009492,0x000126db, 0x000136e4,0x0001b925,0x0001c96e,0x0002496e}, {0x00000000,0x00000000,0x0000a492,0x000136db, 0x0001b724,0x0002496d,0x00025bb6,0x00025bbf}, {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000000} }, { /* version 7, passes 1 */ {0x00000000,0x00000000,0x00001249,0x00001249, 0x00009252,0x00009292,0x00009292,0x00009292}, {0x00000000,0x00000000,0x00001249,0x0000924a, 0x00009492,0x00009493,0x00009493,0x00009292}, {0x00000000,0x00000000,0x00001249,0x00009493, 0x0000a493,0x0000a49b,0x0000a49b,0x00009292}, {0x00000000,0x00000000,0x0000924a,0x00009493, 0x0000a493,0x0000a49b,0x000124db,0x00009493}, {0x00000000,0x00000000,0x0000924a,0x00009493, 0x0000a493,0x000124db,0x000124db,0x00009493}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0000a493,0x000124db,0x000136e4,0x00009493}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0000a493,0x000124db,0x000136e4,0x0000a49b}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0001249b,0x000124db,0x000136e4,0x0000a49b}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0001249b,0x000126dc,0x000136e4,0x0000a49b}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0001249b,0x000126dc,0x000136e4,0x000124db}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x000126dc,0x000136e4,0x000136e4,0x000124db}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x000126dc,0x000136e4,0x000136e4,0x000124db}, {0x00000000,0x00000000,0x0000924a,0x000124db, 0x000136e4,0x000136e4,0x000136e4,0x000126dc}, {0x00000000,0x00000000,0x0000a492,0x000124db, 0x000136e4,0x0001b724,0x000136e4,0x000126dc}, {0x00000000,0x00000000,0x00012492,0x000126db, 0x0001b724,0x0001b925,0x0001b725,0x000136e4}, {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000000} } }, { /* version 8 */ { /* version 8, passes 0 */ {0x00000000,0x00000000,0x00001249,0x00001249, 0x00009292,0x00009493,0x0000a49b,0x000124db}, {0x00000000,0x00000000,0x00001249,0x00009292, 0x0000a493,0x000124db,0x000126dc,0x000126dc}, {0x00000000,0x00000000,0x00001249,0x00009493, 0x0000a493,0x000124db,0x000126dc,0x000136e4}, {0x00000000,0x00000000,0x00001249,0x0000a49b, 0x0001249b,0x000126dc,0x000136e4,0x0001b724}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0001249b,0x000126dc,0x000136e4,0x0001b724}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x000124db,0x000136e4,0x0001b725,0x0001b724}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x000126dc,0x000136e4,0x0001b725,0x0001b925}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x000126dc,0x0001b724,0x0001b92d,0x0001c92d}, {0x00000000,0x00000000,0x00009252,0x000124db, 0x000126dc,0x0001b724,0x0001b92d,0x0001c92d}, {0x00000000,0x00000000,0x00009292,0x000124db, 0x000126dc,0x0001b925,0x0001c96e,0x0001c92d}, {0x00000000,0x00000000,0x00009492,0x000124db, 0x000136e4,0x0001b925,0x0001c96e,0x0001c92d}, {0x00000000,0x00000000,0x00009492,0x000124db, 0x000136e4,0x0001b925,0x00024b76,0x00024b77}, {0x00000000,0x00000000,0x00009492,0x000126db, 0x000136e4,0x0001b925,0x00024b76,0x00025bbf}, {0x00000000,0x00000000,0x0000a492,0x000126db, 0x000136e4,0x0001c92d,0x00024b76,0x00025bbf}, {0x00000000,0x00000000,0x00012492,0x000136db, 0x0001b724,0x00024b6d,0x0002ddb6,0x0002efff}, {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000000} }, { /* version 8, passes 1 */ {0x00000000,0x00000000,0x00001249,0x00001249, 0x00009252,0x00009493,0x00009493,0x00009493}, {0x00000000,0x00000000,0x00001249,0x00009292, 0x0000a493,0x0000a49b,0x0000a49b,0x00009493}, {0x00000000,0x00000000,0x0000924a,0x00009493, 0x0000a493,0x0000a49b,0x000124db,0x00009493}, {0x00000000,0x00000000,0x0000924a,0x00009493, 0x0000a493,0x000124db,0x000126dc,0x0000a49b}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0000a493,0x000124db,0x000126dc,0x0000a49b}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0000a493,0x000124db,0x000136e4,0x000124db}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0001249b,0x000126dc,0x000136e4,0x000124db}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x000126dc,0x000126dc,0x000136e4,0x000126dc}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x000126dc,0x000136e4,0x000136e4,0x000126dc}, {0x00000000,0x00000000,0x0000924a,0x000124db, 0x000126dc,0x000136e4,0x000136e4,0x000126dc}, {0x00000000,0x00000000,0x0000924a,0x000124db, 0x000126dc,0x000136e4,0x000136e4,0x000136e4}, {0x00000000,0x00000000,0x00009292,0x000124db, 0x000136e4,0x0001b724,0x0001b725,0x000136e4}, {0x00000000,0x00000000,0x00009492,0x000126db, 0x000136e4,0x0001b925,0x0001b725,0x0001b724}, {0x00000000,0x00000000,0x00009492,0x000126db, 0x000136e4,0x0001b925,0x0001b725,0x0001b724}, {0x00000000,0x00000000,0x0000a492,0x000136db, 0x0001b724,0x0002496d,0x0001b92d,0x0001b925}, {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000000} } }, { /* version 9 */ { /* version 9, passes 0 */ {0x00000000,0x00000000,0x00000049,0x00000049, 0x00000049,0x00000049,0x00000049,0x00000049}, {0x00000000,0x00000000,0x00000249,0x00000049, 0x00000249,0x00000249,0x0000024a,0x00000049}, {0x00000000,0x00000000,0x00000249,0x00000249, 0x0000124a,0x00009252,0x00001252,0x0000024a}, {0x00000000,0x00000000,0x00001249,0x00001249, 0x00009252,0x00009292,0x00009493,0x00001252}, {0x00000000,0x00000000,0x00001249,0x0000924a, 0x00009292,0x00009493,0x00009493,0x00001252}, {0x00000000,0x00000000,0x00001249,0x00009292, 0x00009492,0x0000a49b,0x0000a49b,0x00009292}, {0x00000000,0x00000000,0x00001249,0x00009493, 0x0000a493,0x000124db,0x000124db,0x00009493}, {0x00000000,0x00000000,0x0000924a,0x00009493, 0x0000a493,0x000124db,0x000126dc,0x0000a49b}, {0x00000000,0x00000000,0x0000924a,0x00009493, 0x0000a493,0x000124db,0x000126dc,0x0000a49b}, {0x00000000,0x00000000,0x0000924a,0x00009493, 0x0001249b,0x000126dc,0x000126dc,0x000124db}, {0x00000000,0x00000000,0x00009252,0x00009493, 0x000124db,0x000136e4,0x000136e4,0x000126dc}, {0x00000000,0x00000000,0x00009252,0x0000a49b, 0x000124db,0x000136e4,0x000136e4,0x000126dc}, {0x00000000,0x00000000,0x00009292,0x0000a49b, 0x000126dc,0x000136e4,0x000136e4,0x000136e4}, {0x00000000,0x00000000,0x00009492,0x0000a49b, 0x000126dc,0x0001b724,0x0001b725,0x0001b724}, {0x00000000,0x00000000,0x0000a492,0x000124db, 0x000136e4,0x0001b925,0x0001b92d,0x0001b925}, {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000000} }, { /* version 9, passes 1 */ {0x00000000,0x00000000,0x00000249,0x00000049, 0x00000009,0x00000009,0x00000009,0x00000009}, {0x00000000,0x00000000,0x00000249,0x00000249, 0x00000049,0x00000049,0x00000009,0x00000009}, {0x00000000,0x00000000,0x00001249,0x00001249, 0x0000124a,0x00000249,0x00000049,0x00000049}, {0x00000000,0x00000000,0x00001249,0x00001249, 0x0000124a,0x0000124a,0x00000049,0x00000049}, {0x00000000,0x00000000,0x00001249,0x00001249, 0x00009252,0x0000124a,0x0000024a,0x0000024a}, {0x00000000,0x00000000,0x00001249,0x0000924a, 0x00009252,0x0000124a,0x0000024a,0x0000024a}, {0x00000000,0x00000000,0x00001249,0x00009292, 0x00009492,0x00009252,0x00001252,0x00001252}, {0x00000000,0x00000000,0x00001249,0x00009493, 0x0000a493,0x00009292,0x00009292,0x00001252}, {0x00000000,0x00000000,0x0000924a,0x00009493, 0x0000a493,0x00009292,0x00009292,0x00009292}, {0x00000000,0x00000000,0x0000924a,0x00009493, 0x0000a493,0x00009493,0x00009493,0x00009292}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0000a493,0x0000a49b,0x00009493,0x00009493}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0000a493,0x0000a49b,0x0000a49b,0x00009493}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0001249b,0x000124db,0x0000a49b,0x0000a49b}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x000136e4,0x000126dc,0x000124db,0x0000a49b}, {0x00000000,0x00000000,0x00009252,0x000124db, 0x0001b724,0x000136e4,0x000126dc,0x000124db}, {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000000} } }, { /* version 10 */ { /* version 10, passes 0 */ {0x00000000,0x00000000,0x00000249,0x00000249, 0x00000249,0x00000249,0x0000024a,0x0000024a}, {0x00000000,0x00000000,0x00000249,0x00001249, 0x00009252,0x00009292,0x00009292,0x0000024a}, {0x00000000,0x00000000,0x00001249,0x00001249, 0x00009252,0x00009292,0x00009292,0x00001252}, {0x00000000,0x00000000,0x00001249,0x0000924a, 0x00009492,0x00009493,0x0000a49b,0x00009292}, {0x00000000,0x00000000,0x00001249,0x00009292, 0x00009492,0x000124db,0x000124db,0x00009292}, {0x00000000,0x00000000,0x00001249,0x00009493, 0x0000a493,0x000124db,0x000124db,0x00009493}, {0x00000000,0x00000000,0x00001249,0x00009493, 0x0000a493,0x000124db,0x000126dc,0x0000a49b}, {0x00000000,0x00000000,0x0000924a,0x00009493, 0x0000a493,0x000124db,0x000126dc,0x000124db}, {0x00000000,0x00000000,0x0000924a,0x00009493, 0x0001249b,0x000126dc,0x000126dc,0x000124db}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x000124db,0x000126dc,0x000136e4,0x000126dc}, {0x00000000,0x00000000,0x00009252,0x0000a49b, 0x000124db,0x000136e4,0x000136e4,0x000136e4}, {0x00000000,0x00000000,0x00009292,0x0000a49b, 0x000126dc,0x000136e4,0x000136e4,0x000136e4}, {0x00000000,0x00000000,0x00009492,0x0000a49b, 0x000126dc,0x0001b724,0x0001b92d,0x0001b724}, {0x00000000,0x00000000,0x00009492,0x000124db, 0x000126dc,0x0001b925,0x0001b92d,0x0001b925}, {0x00000000,0x00000000,0x0000a492,0x000126db, 0x000136e4,0x0002496d,0x0001c96e,0x0001c92d}, {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000000} }, { /* version 10, passes 1 */ {0x00000000,0x00000000,0x00000249,0x00000249, 0x00000049,0x00000049,0x00000049,0x00000049}, {0x00000000,0x00000000,0x00001249,0x00001249, 0x0000124a,0x00000249,0x00000049,0x00000049}, {0x00000000,0x00000000,0x00001249,0x00001249, 0x0000124a,0x00009252,0x0000024a,0x00000049}, {0x00000000,0x00000000,0x00001249,0x00001249, 0x00009252,0x00009493,0x0000024a,0x0000024a}, {0x00000000,0x00000000,0x00001249,0x00009252, 0x00009492,0x00009493,0x00001252,0x0000024a}, {0x00000000,0x00000000,0x00001249,0x00009292, 0x00009492,0x00009493,0x00001252,0x00001252}, {0x00000000,0x00000000,0x0000924a,0x00009493, 0x00009492,0x00009493,0x00009292,0x00001252}, {0x00000000,0x00000000,0x0000924a,0x00009493, 0x0000a493,0x00009493,0x00009292,0x00009292}, {0x00000000,0x00000000,0x0000924a,0x00009493, 0x0000a493,0x0000a49b,0x00009493,0x00009292}, {0x00000000,0x00000000,0x0000924a,0x00009493, 0x0000a493,0x0000a49b,0x00009493,0x00009292}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0000a493,0x000124db,0x0000a49b,0x00009493}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0000a493,0x000124db,0x0000a49b,0x00009493}, {0x00000000,0x00000000,0x0000924a,0x000124db, 0x000136e4,0x000126dc,0x000124db,0x0000a49b}, {0x00000000,0x00000000,0x0000924a,0x000124db, 0x000136e4,0x000126dc,0x000124db,0x0000a49b}, {0x00000000,0x00000000,0x00009252,0x000126db, 0x0001b724,0x000136e4,0x000126dc,0x000124db}, {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000000} } }, { /* version 11 */ { /* version 11, passes 0 */ {0x00000000,0x00000000,0x00000249,0x00000249, 0x00000249,0x00000249,0x00001252,0x00001252}, {0x00000000,0x00000000,0x00001249,0x00001249, 0x00009252,0x00009292,0x00009292,0x00001252}, {0x00000000,0x00000000,0x00001249,0x0000924a, 0x00009492,0x0000a49b,0x0000a49b,0x00009292}, {0x00000000,0x00000000,0x00001249,0x00009493, 0x0000a493,0x0000a49b,0x000124db,0x00009493}, {0x00000000,0x00000000,0x00001249,0x00009493, 0x0000a493,0x000124db,0x000126dc,0x00009493}, {0x00000000,0x00000000,0x0000924a,0x00009493, 0x0000a493,0x000126dc,0x000126dc,0x0000a49b}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0001249b,0x000126dc,0x000136e4,0x000124db}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x000126dc,0x000136e4,0x000136e4,0x000126dc}, {0x00000000,0x00000000,0x00009292,0x0000a49b, 0x000126dc,0x000136e4,0x000136e4,0x000126dc}, {0x00000000,0x00000000,0x00009292,0x0000a49b, 0x000126dc,0x0001b724,0x0001b725,0x000136e4}, {0x00000000,0x00000000,0x00009292,0x0000a49b, 0x000136e4,0x0001b724,0x0001b92d,0x0001b724}, {0x00000000,0x00000000,0x00009492,0x0000a49b, 0x000136e4,0x0001b724,0x0001b92d,0x0001b724}, {0x00000000,0x00000000,0x00009492,0x000124db, 0x000136e4,0x0001b925,0x0001c96e,0x0001b925}, {0x00000000,0x00000000,0x00009492,0x000124db, 0x0001b724,0x0001b925,0x0001c96e,0x0001c92d}, {0x00000000,0x00000000,0x0000a492,0x000126db, 0x0001c924,0x0002496d,0x00025bb6,0x00024b77}, {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000000} }, { /* version 11, passes 1 */ {0x00000000,0x00000000,0x00001249,0x00000249, 0x00000249,0x00000249,0x0000024a,0x0000024a}, {0x00000000,0x00000000,0x00001249,0x00001249, 0x0000124a,0x0000124a,0x0000024a,0x0000024a}, {0x00000000,0x00000000,0x00001249,0x0000924a, 0x00009252,0x00009252,0x0000024a,0x0000024a}, {0x00000000,0x00000000,0x00001249,0x00009292, 0x00009492,0x0000a49b,0x00001252,0x00001252}, {0x00000000,0x00000000,0x0000924a,0x00009493, 0x0000a493,0x0000a49b,0x00001252,0x00001252}, {0x00000000,0x00000000,0x0000924a,0x00009493, 0x0000a493,0x0000a49b,0x00009292,0x00001252}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0000a493,0x0000a49b,0x00009292,0x00009292}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0000a493,0x0000a49b,0x00009493,0x00009292}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0001249b,0x000124db,0x00009493,0x00009292}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0001249b,0x000124db,0x00009493,0x00009493}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x000124db,0x000124db,0x0000a49b,0x00009493}, {0x00000000,0x00000000,0x0000924a,0x000124db, 0x000126dc,0x000126dc,0x0000a49b,0x00009493}, {0x00000000,0x00000000,0x0000924a,0x000124db, 0x000136e4,0x000126dc,0x000124db,0x0000a49b}, {0x00000000,0x00000000,0x00009292,0x000124db, 0x000136e4,0x000126dc,0x000124db,0x0000a49b}, {0x00000000,0x00000000,0x00009492,0x000126db, 0x0001b724,0x000136e4,0x000126dc,0x000124db}, {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000000} } }, { /* version 12 */ { /* version 12, passes 0 */ {0x00000000,0x00000000,0x00001249,0x00001249, 0x00009252,0x00009292,0x00009493,0x00009493}, {0x00000000,0x00000000,0x00001249,0x00009292, 0x0000a493,0x0000a49b,0x0000a49b,0x00009493}, {0x00000000,0x00000000,0x00001249,0x00009493, 0x0000a493,0x000124db,0x000124db,0x0000a49b}, {0x00000000,0x00000000,0x0000924a,0x00009493, 0x0000a493,0x000126dc,0x000126dc,0x0000a49b}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0001249b,0x000126dc,0x000136e4,0x000124db}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x000126dc,0x000136e4,0x000136e4,0x000126dc}, {0x00000000,0x00000000,0x00009292,0x0000a49b, 0x000126dc,0x0001b724,0x0001b725,0x000126dc}, {0x00000000,0x00000000,0x00009292,0x0000a49b, 0x000136e4,0x0001b724,0x0001b92d,0x000136e4}, {0x00000000,0x00000000,0x00009492,0x0000a49b, 0x000136e4,0x0001b724,0x0001b92d,0x0001b724}, {0x00000000,0x00000000,0x00009492,0x000124db, 0x000136e4,0x0001b724,0x0001b92d,0x0001b724}, {0x00000000,0x00000000,0x00009492,0x000124db, 0x000136e4,0x0001b925,0x0001b92d,0x0001b925}, {0x00000000,0x00000000,0x00009492,0x000124db, 0x0001b724,0x0001b925,0x0001c96e,0x0001c92d}, {0x00000000,0x00000000,0x0000a492,0x000124db, 0x0001b724,0x0001c92d,0x0001c96e,0x0001c92d}, {0x00000000,0x00000000,0x0000a492,0x000124db, 0x0001b724,0x0001c92d,0x00024b76,0x0002496e}, {0x00000000,0x00000000,0x00012492,0x000126db, 0x0001c924,0x00024b6d,0x0002ddb6,0x00025bbf}, {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000000} }, { /* version 12, passes 1 */ {0x00000000,0x00000000,0x00001249,0x00001249, 0x0000124a,0x0000124a,0x00001252,0x00001252}, {0x00000000,0x00000000,0x00001249,0x00009292, 0x00009492,0x00009252,0x00001252,0x00001252}, {0x00000000,0x00000000,0x0000924a,0x00009493, 0x0000a493,0x00009292,0x00001252,0x00001252}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0000a493,0x0000a49b,0x00009292,0x00009292}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0000a493,0x0000a49b,0x00009292,0x00009292}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0001249b,0x0000a49b,0x00009493,0x00009292}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x000124db,0x000124db,0x00009493,0x00009493}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x000124db,0x000124db,0x0000a49b,0x00009493}, {0x00000000,0x00000000,0x0000924a,0x000124db, 0x000126dc,0x000124db,0x0000a49b,0x00009493}, {0x00000000,0x00000000,0x0000924a,0x000124db, 0x000126dc,0x000126dc,0x0000a49b,0x0000a49b}, {0x00000000,0x00000000,0x0000924a,0x000124db, 0x000136e4,0x000126dc,0x000124db,0x0000a49b}, {0x00000000,0x00000000,0x00009492,0x000126db, 0x000136e4,0x000126dc,0x000124db,0x0000a49b}, {0x00000000,0x00000000,0x00009492,0x000126db, 0x0001b724,0x000136e4,0x000126dc,0x000124db}, {0x00000000,0x00000000,0x00009492,0x000126db, 0x0001b724,0x000136e4,0x000126dc,0x000124db}, {0x00000000,0x00000000,0x0000a492,0x000136db, 0x0001c924,0x0001b724,0x000136e4,0x000126dc}, {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000000} } }, { /* version 13 */ { /* version 13, passes 0 */ {0x00000000,0x00000000,0x00001249,0x00001249, 0x00009252,0x00009292,0x00009493,0x00009493}, {0x00000000,0x00000000,0x00001249,0x00009493, 0x0000a493,0x000124db,0x000126dc,0x00009493}, {0x00000000,0x00000000,0x00001249,0x0000a49b, 0x0001249b,0x000126dc,0x000126dc,0x0000a49b}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0001249b,0x000126dc,0x000136e4,0x0000a49b}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x000126dc,0x000136e4,0x0001b725,0x000124db}, {0x00000000,0x00000000,0x00009292,0x0000a49b, 0x000136e4,0x0001b724,0x0001b725,0x000126dc}, {0x00000000,0x00000000,0x00009292,0x000124db, 0x000136e4,0x0001b724,0x0001b725,0x000126dc}, {0x00000000,0x00000000,0x00009492,0x000124db, 0x000136e4,0x0001b724,0x0001c96e,0x000136e4}, {0x00000000,0x00000000,0x00009492,0x000124db, 0x000136e4,0x0001c92d,0x0001c96e,0x0001b724}, {0x00000000,0x00000000,0x0000a492,0x000124db, 0x000136e4,0x0001c92d,0x0001c96e,0x0001b724}, {0x00000000,0x00000000,0x0000a492,0x000124db, 0x0001b724,0x0001c92d,0x0001c96e,0x0001b925}, {0x00000000,0x00000000,0x0000a492,0x000126db, 0x0001b724,0x0001c92d,0x00024b76,0x0001c92d}, {0x00000000,0x00000000,0x0000a492,0x000126db, 0x0001b924,0x0001c92d,0x00024b76,0x0001c92d}, {0x00000000,0x00000000,0x0000a492,0x000126db, 0x0001b924,0x0001c92d,0x00024b76,0x0002496e}, {0x00000000,0x00000000,0x00012492,0x000136db, 0x00024924,0x00024b6d,0x0002ddb6,0x00025bbf}, {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000000} }, { /* version 13, passes 1 */ {0x00000000,0x00000000,0x00001249,0x00001249, 0x0000124a,0x0000124a,0x00001252,0x00001252}, {0x00000000,0x00000000,0x0000924a,0x00009493, 0x00009492,0x00009292,0x00001252,0x00001252}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0000a493,0x0000a49b,0x00001252,0x00001252}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0000a493,0x0000a49b,0x00009292,0x00009292}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0000a493,0x0000a49b,0x00009292,0x00009292}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x000126dc,0x0000a49b,0x00009493,0x00009292}, {0x00000000,0x00000000,0x0000924a,0x000124db, 0x000126dc,0x000124db,0x00009493,0x00009493}, {0x00000000,0x00000000,0x0000924a,0x000124db, 0x000136e4,0x000124db,0x0000a49b,0x00009493}, {0x00000000,0x00000000,0x0000924a,0x000136db, 0x0001b724,0x000124db,0x0000a49b,0x00009493}, {0x00000000,0x00000000,0x0000924a,0x000136db, 0x0001b724,0x000126dc,0x0000a49b,0x0000a49b}, {0x00000000,0x00000000,0x00009292,0x000136db, 0x0001b724,0x000126dc,0x000124db,0x0000a49b}, {0x00000000,0x00000000,0x00009492,0x000136db, 0x0001b724,0x000126dc,0x000124db,0x0000a49b}, {0x00000000,0x00000000,0x0000a492,0x000136db, 0x0001b724,0x000136e4,0x000126dc,0x000124db}, {0x00000000,0x00000000,0x0000a492,0x000136db, 0x0001b724,0x000136e4,0x000126dc,0x000124db}, {0x00000000,0x00000000,0x00012492,0x0001b6db, 0x0001c924,0x0001b724,0x000136e4,0x000126dc}, {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000000} } }, { /* version 14 */ { /* version 14, passes 0 */ {0x00000000,0x00000000,0x00001249,0x0000924a, 0x00009292,0x00009493,0x00009493,0x00009493}, {0x00000000,0x00000000,0x00001249,0x0000a49b, 0x0000a493,0x000124db,0x000126dc,0x00009493}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0001249b,0x000126dc,0x000136e4,0x0000a49b}, {0x00000000,0x00000000,0x0000924a,0x000124db, 0x000126dc,0x000136e4,0x0001b725,0x000124db}, {0x00000000,0x00000000,0x00009292,0x000124db, 0x000126dc,0x0001b724,0x0001b92d,0x000126dc}, {0x00000000,0x00000000,0x00009492,0x000124db, 0x000136e4,0x0001b724,0x0001b92d,0x000126dc}, {0x00000000,0x00000000,0x00009492,0x000124db, 0x000136e4,0x0001c92d,0x0001c96e,0x000136e4}, {0x00000000,0x00000000,0x00009492,0x000124db, 0x0001b724,0x0001c92d,0x0001c96e,0x0001b724}, {0x00000000,0x00000000,0x0000a492,0x000124db, 0x0001b724,0x0001c92d,0x00024b76,0x0001b925}, {0x00000000,0x00000000,0x0000a492,0x000126db, 0x0001b724,0x0001c92d,0x00024b76,0x0001c92d}, {0x00000000,0x00000000,0x0000a492,0x000126db, 0x0001b724,0x0001c92d,0x00024b76,0x0001c92d}, {0x00000000,0x00000000,0x0000a492,0x000136db, 0x0001b724,0x0001c92d,0x00024b76,0x0002496e}, {0x00000000,0x00000000,0x0000a492,0x000136db, 0x0001b924,0x0002496d,0x00024b76,0x00024b77}, {0x00000000,0x00000000,0x0000a492,0x000136db, 0x0001b924,0x00024b6d,0x0002ddb6,0x00025bbf}, {0x00000000,0x00000000,0x00012492,0x0001b6db, 0x00024924,0x0002db6d,0x00036db6,0x0002efff}, {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000000} }, { /* version 14, passes 1 */ {0x00000000,0x00000000,0x00001249,0x00001249, 0x0000124a,0x0000124a,0x00001252,0x00001252}, {0x00000000,0x00000000,0x0000924a,0x00009493, 0x0000a493,0x00009292,0x00001252,0x00001252}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0000a493,0x0000a49b,0x00001252,0x00001252}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0001249b,0x000136e4,0x00009292,0x00009292}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0001249b,0x000136e4,0x00009292,0x00009292}, {0x00000000,0x00000000,0x0000924a,0x000124db, 0x000136e4,0x000136e4,0x00009493,0x00009292}, {0x00000000,0x00000000,0x00009492,0x000136db, 0x0001b724,0x000136e4,0x00009493,0x00009493}, {0x00000000,0x00000000,0x00009492,0x000136db, 0x0001b724,0x000136e4,0x0000a49b,0x00009493}, {0x00000000,0x00000000,0x00009492,0x000136db, 0x0001b724,0x000136e4,0x0000a49b,0x00009493}, {0x00000000,0x00000000,0x00009492,0x000136db, 0x0001b724,0x000136e4,0x0000a49b,0x0000a49b}, {0x00000000,0x00000000,0x0000a492,0x000136db, 0x0001b724,0x000136e4,0x000124db,0x0000a49b}, {0x00000000,0x00000000,0x0000a492,0x000136db, 0x0001b724,0x000136e4,0x000124db,0x0000a49b}, {0x00000000,0x00000000,0x0000a492,0x000136db, 0x0001b724,0x000136e4,0x000126dc,0x000124db}, {0x00000000,0x00000000,0x0000a492,0x000136db, 0x0001b724,0x000136e4,0x000126dc,0x000124db}, {0x00000000,0x00000000,0x00012492,0x0001b6db, 0x0001c924,0x0001b724,0x000136e4,0x000126dc}, {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000000} } }, { /* version 15 */ { /* version 15, passes 0 */ {0x00000000,0x00000000,0x00001249,0x00009493, 0x0000a493,0x0000a49b,0x000124db,0x000124db}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0001249b,0x000126dc,0x000136e4,0x000124db}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x000126dc,0x0001b724,0x0001b725,0x000126dc}, {0x00000000,0x00000000,0x0000924a,0x000124db, 0x000136e4,0x0001b724,0x0001b92d,0x000126dc}, {0x00000000,0x00000000,0x00009492,0x000124db, 0x000136e4,0x0001b925,0x0001c96e,0x000136e4}, {0x00000000,0x00000000,0x00009492,0x000124db, 0x0001b724,0x0001c92d,0x0001c96e,0x0001b724}, {0x00000000,0x00000000,0x0000a492,0x000124db, 0x0001b724,0x0001c92d,0x0001c96e,0x0001b724}, {0x00000000,0x00000000,0x0000a492,0x000126db, 0x0001b724,0x0001c92d,0x0001c96e,0x0001b925}, {0x00000000,0x00000000,0x0000a492,0x000126db, 0x0001b924,0x0001c92d,0x00024b76,0x0001c92d}, {0x00000000,0x00000000,0x0000a492,0x000136db, 0x0001b924,0x0001c92d,0x00024b76,0x0001c92d}, {0x00000000,0x00000000,0x0000a492,0x000136db, 0x0001b924,0x0002496d,0x00024b76,0x0002496e}, {0x00000000,0x00000000,0x0000a492,0x000136db, 0x0001c924,0x0002496d,0x00025bb6,0x00024b77}, {0x00000000,0x00000000,0x0000a492,0x000136db, 0x0001c924,0x00024b6d,0x00025bb6,0x00024b77}, {0x00000000,0x00000000,0x00012492,0x000136db, 0x0001c924,0x00024b6d,0x0002ddb6,0x00025bbf}, {0x00000000,0x00000000,0x00012492,0x0001b6db, 0x00024924,0x0002db6d,0x00036db6,0x0002efff}, {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000000} }, { /* version 15, passes 1 */ {0x00000000,0x00000000,0x0000924a,0x0000924a, 0x00009292,0x00009292,0x00009292,0x00009292}, {0x00000000,0x00000000,0x0000924a,0x0000a49b, 0x0000a493,0x000124db,0x00009292,0x00009292}, {0x00000000,0x00000000,0x0000924a,0x000124db, 0x000124db,0x0001b724,0x00009493,0x00009493}, {0x00000000,0x00000000,0x0000924a,0x000124db, 0x000126dc,0x0001b724,0x00009493,0x00009493}, {0x00000000,0x00000000,0x0000924a,0x000124db, 0x000136e4,0x0001b724,0x0000a49b,0x0000a49b}, {0x00000000,0x00000000,0x00009292,0x000136db, 0x0001b724,0x0001b724,0x0000a49b,0x0000a49b}, {0x00000000,0x00000000,0x00009492,0x000136db, 0x0001c924,0x0001b724,0x000124db,0x000124db}, {0x00000000,0x00000000,0x00009492,0x000136db, 0x0001c924,0x0001b724,0x000124db,0x000124db}, {0x00000000,0x00000000,0x0000a492,0x000136db, 0x0001c924,0x0001b724,0x000126dc,0x000126dc}, {0x00000000,0x00000000,0x0000a492,0x000136db, 0x0001c924,0x0001b925,0x000126dc,0x000126dc}, {0x00000000,0x00000000,0x0000a492,0x000136db, 0x0001c924,0x0001b925,0x000136e4,0x000136e4}, {0x00000000,0x00000000,0x0000a492,0x000136db, 0x0001c924,0x0001b925,0x000136e4,0x000136e4}, {0x00000000,0x00000000,0x0000a492,0x000136db, 0x0001c924,0x0001b925,0x0001b725,0x0001b724}, {0x00000000,0x00000000,0x00012492,0x000136db, 0x0001c924,0x0001b925,0x0001b725,0x0001b724}, {0x00000000,0x00000000,0x00012492,0x0001b6db, 0x00024924,0x0002496d,0x0001b92d,0x0001b925}, {0x00000000,0x00000000,0x00000000,0x00000000, 0x00000000,0x00000000,0x00000000,0x00000000} } } };
gpl-2.0
shengzhou/linux
drivers/scsi/scsi_devinfo.c
147
29894
#include <linux/blkdev.h> #include <linux/init.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/moduleparam.h> #include <linux/proc_fs.h> #include <linux/seq_file.h> #include <linux/slab.h> #include <scsi/scsi_device.h> #include <scsi/scsi_devinfo.h> #include "scsi_priv.h" /* * scsi_dev_info_list: structure to hold black/white listed devices. */ struct scsi_dev_info_list { struct list_head dev_info_list; char vendor[8]; char model[16]; unsigned flags; unsigned compatible; /* for use with scsi_static_device_list entries */ }; struct scsi_dev_info_list_table { struct list_head node; /* our node for being on the master list */ struct list_head scsi_dev_info_list; /* head of dev info list */ const char *name; /* name of list for /proc (NULL for global) */ int key; /* unique numeric identifier */ }; static const char spaces[] = " "; /* 16 of them */ static unsigned scsi_default_dev_flags; static LIST_HEAD(scsi_dev_info_list); static char scsi_dev_flags[256]; /* * scsi_static_device_list: deprecated list of devices that require * settings that differ from the default, includes black-listed (broken) * devices. The entries here are added to the tail of scsi_dev_info_list * via scsi_dev_info_list_init. * * Do not add to this list, use the command line or proc interface to add * to the scsi_dev_info_list. This table will eventually go away. */ static struct { char *vendor; char *model; char *revision; /* revision known to be bad, unused */ unsigned flags; } scsi_static_device_list[] __initdata = { /* * The following devices are known not to tolerate a lun != 0 scan * for one reason or another. Some will respond to all luns, * others will lock up. */ {"Aashima", "IMAGERY 2400SP", "1.03", BLIST_NOLUN}, /* locks up */ {"CHINON", "CD-ROM CDS-431", "H42", BLIST_NOLUN}, /* locks up */ {"CHINON", "CD-ROM CDS-535", "Q14", BLIST_NOLUN}, /* locks up */ {"DENON", "DRD-25X", "V", BLIST_NOLUN}, /* locks up */ {"HITACHI", "DK312C", "CM81", BLIST_NOLUN}, /* responds to all lun */ {"HITACHI", "DK314C", "CR21", BLIST_NOLUN}, /* responds to all lun */ {"IBM", "2104-DU3", NULL, BLIST_NOLUN}, /* locks up */ {"IBM", "2104-TU3", NULL, BLIST_NOLUN}, /* locks up */ {"IMS", "CDD521/10", "2.06", BLIST_NOLUN}, /* locks up */ {"MAXTOR", "XT-3280", "PR02", BLIST_NOLUN}, /* locks up */ {"MAXTOR", "XT-4380S", "B3C", BLIST_NOLUN}, /* locks up */ {"MAXTOR", "MXT-1240S", "I1.2", BLIST_NOLUN}, /* locks up */ {"MAXTOR", "XT-4170S", "B5A", BLIST_NOLUN}, /* locks up */ {"MAXTOR", "XT-8760S", "B7B", BLIST_NOLUN}, /* locks up */ {"MEDIAVIS", "RENO CD-ROMX2A", "2.03", BLIST_NOLUN}, /* responds to all lun */ {"MICROTEK", "ScanMakerIII", "2.30", BLIST_NOLUN}, /* responds to all lun */ {"NEC", "CD-ROM DRIVE:841", "1.0", BLIST_NOLUN},/* locks up */ {"PHILIPS", "PCA80SC", "V4-2", BLIST_NOLUN}, /* responds to all lun */ {"RODIME", "RO3000S", "2.33", BLIST_NOLUN}, /* locks up */ {"SUN", "SENA", NULL, BLIST_NOLUN}, /* responds to all luns */ /* * The following causes a failed REQUEST SENSE on lun 1 for * aha152x controller, which causes SCSI code to reset bus. */ {"SANYO", "CRD-250S", "1.20", BLIST_NOLUN}, /* * The following causes a failed REQUEST SENSE on lun 1 for * aha152x controller, which causes SCSI code to reset bus. */ {"SEAGATE", "ST157N", "\004|j", BLIST_NOLUN}, {"SEAGATE", "ST296", "921", BLIST_NOLUN}, /* responds to all lun */ {"SEAGATE", "ST1581", "6538", BLIST_NOLUN}, /* responds to all lun */ {"SONY", "CD-ROM CDU-541", "4.3d", BLIST_NOLUN}, {"SONY", "CD-ROM CDU-55S", "1.0i", BLIST_NOLUN}, {"SONY", "CD-ROM CDU-561", "1.7x", BLIST_NOLUN}, {"SONY", "CD-ROM CDU-8012", NULL, BLIST_NOLUN}, {"SONY", "SDT-5000", "3.17", BLIST_SELECT_NO_ATN}, {"TANDBERG", "TDC 3600", "U07", BLIST_NOLUN}, /* locks up */ {"TEAC", "CD-R55S", "1.0H", BLIST_NOLUN}, /* locks up */ /* * The following causes a failed REQUEST SENSE on lun 1 for * seagate controller, which causes SCSI code to reset bus. */ {"TEAC", "CD-ROM", "1.06", BLIST_NOLUN}, {"TEAC", "MT-2ST/45S2-27", "RV M", BLIST_NOLUN}, /* responds to all lun */ /* * The following causes a failed REQUEST SENSE on lun 1 for * seagate controller, which causes SCSI code to reset bus. */ {"HP", "C1750A", "3226", BLIST_NOLUN}, /* scanjet iic */ {"HP", "C1790A", "", BLIST_NOLUN}, /* scanjet iip */ {"HP", "C2500A", "", BLIST_NOLUN}, /* scanjet iicx */ {"MEDIAVIS", "CDR-H93MV", "1.31", BLIST_NOLUN}, /* locks up */ {"MICROTEK", "ScanMaker II", "5.61", BLIST_NOLUN}, /* responds to all lun */ {"MITSUMI", "CD-R CR-2201CS", "6119", BLIST_NOLUN}, /* locks up */ {"NEC", "D3856", "0009", BLIST_NOLUN}, {"QUANTUM", "LPS525S", "3110", BLIST_NOLUN}, /* locks up */ {"QUANTUM", "PD1225S", "3110", BLIST_NOLUN}, /* locks up */ {"QUANTUM", "FIREBALL ST4.3S", "0F0C", BLIST_NOLUN}, /* locks up */ {"RELISYS", "Scorpio", NULL, BLIST_NOLUN}, /* responds to all lun */ {"SANKYO", "CP525", "6.64", BLIST_NOLUN}, /* causes failed REQ SENSE, extra reset */ {"TEXEL", "CD-ROM", "1.06", BLIST_NOLUN}, {"transtec", "T5008", "0001", BLIST_NOREPORTLUN }, {"YAMAHA", "CDR100", "1.00", BLIST_NOLUN}, /* locks up */ {"YAMAHA", "CDR102", "1.00", BLIST_NOLUN}, /* locks up */ {"YAMAHA", "CRW8424S", "1.0", BLIST_NOLUN}, /* locks up */ {"YAMAHA", "CRW6416S", "1.0c", BLIST_NOLUN}, /* locks up */ {"", "Scanner", "1.80", BLIST_NOLUN}, /* responds to all lun */ /* * Other types of devices that have special flags. * Note that all USB devices should have the BLIST_INQUIRY_36 flag. */ {"3PARdata", "VV", NULL, BLIST_REPORTLUN2}, {"ADAPTEC", "AACRAID", NULL, BLIST_FORCELUN}, {"ADAPTEC", "Adaptec 5400S", NULL, BLIST_FORCELUN}, {"AFT PRO", "-IX CF", "0.0>", BLIST_FORCELUN}, {"BELKIN", "USB 2 HS-CF", "1.95", BLIST_FORCELUN | BLIST_INQUIRY_36}, {"BROWNIE", "1200U3P", NULL, BLIST_NOREPORTLUN}, {"BROWNIE", "1600U3P", NULL, BLIST_NOREPORTLUN}, {"CANON", "IPUBJD", NULL, BLIST_SPARSELUN}, {"CBOX3", "USB Storage-SMC", "300A", BLIST_FORCELUN | BLIST_INQUIRY_36}, {"CMD", "CRA-7280", NULL, BLIST_SPARSELUN}, /* CMD RAID Controller */ {"CNSI", "G7324", NULL, BLIST_SPARSELUN}, /* Chaparral G7324 RAID */ {"CNSi", "G8324", NULL, BLIST_SPARSELUN}, /* Chaparral G8324 RAID */ {"COMPAQ", "ARRAY CONTROLLER", NULL, BLIST_SPARSELUN | BLIST_LARGELUN | BLIST_MAX_512 | BLIST_REPORTLUN2}, /* Compaq RA4x00 */ {"COMPAQ", "LOGICAL VOLUME", NULL, BLIST_FORCELUN | BLIST_MAX_512}, /* Compaq RA4x00 */ {"COMPAQ", "CR3500", NULL, BLIST_FORCELUN}, {"COMPAQ", "MSA1000", NULL, BLIST_SPARSELUN | BLIST_NOSTARTONADD}, {"COMPAQ", "MSA1000 VOLUME", NULL, BLIST_SPARSELUN | BLIST_NOSTARTONADD}, {"COMPAQ", "HSV110", NULL, BLIST_REPORTLUN2 | BLIST_NOSTARTONADD}, {"DDN", "SAN DataDirector", "*", BLIST_SPARSELUN}, {"DEC", "HSG80", NULL, BLIST_REPORTLUN2 | BLIST_NOSTARTONADD}, {"DELL", "PV660F", NULL, BLIST_SPARSELUN}, {"DELL", "PV660F PSEUDO", NULL, BLIST_SPARSELUN}, {"DELL", "PSEUDO DEVICE .", NULL, BLIST_SPARSELUN}, /* Dell PV 530F */ {"DELL", "PV530F", NULL, BLIST_SPARSELUN}, {"DELL", "PERCRAID", NULL, BLIST_FORCELUN}, {"DGC", "RAID", NULL, BLIST_SPARSELUN}, /* Dell PV 650F, storage on LUN 0 */ {"DGC", "DISK", NULL, BLIST_SPARSELUN}, /* Dell PV 650F, no storage on LUN 0 */ {"EMC", "Invista", "*", BLIST_SPARSELUN | BLIST_LARGELUN}, {"EMC", "SYMMETRIX", NULL, BLIST_SPARSELUN | BLIST_LARGELUN | BLIST_FORCELUN}, {"EMULEX", "MD21/S2 ESDI", NULL, BLIST_SINGLELUN}, {"easyRAID", "16P", NULL, BLIST_NOREPORTLUN}, {"easyRAID", "X6P", NULL, BLIST_NOREPORTLUN}, {"easyRAID", "F8", NULL, BLIST_NOREPORTLUN}, {"FSC", "CentricStor", "*", BLIST_SPARSELUN | BLIST_LARGELUN}, {"Generic", "USB SD Reader", "1.00", BLIST_FORCELUN | BLIST_INQUIRY_36}, {"Generic", "USB Storage-SMC", "0180", BLIST_FORCELUN | BLIST_INQUIRY_36}, {"Generic", "USB Storage-SMC", "0207", BLIST_FORCELUN | BLIST_INQUIRY_36}, {"HITACHI", "DF400", "*", BLIST_REPORTLUN2}, {"HITACHI", "DF500", "*", BLIST_REPORTLUN2}, {"HITACHI", "DISK-SUBSYSTEM", "*", BLIST_REPORTLUN2}, {"HITACHI", "HUS1530", "*", BLIST_NO_DIF}, {"HITACHI", "OPEN-", "*", BLIST_REPORTLUN2}, {"HITACHI", "OP-C-", "*", BLIST_SPARSELUN | BLIST_LARGELUN}, {"HITACHI", "3380-", "*", BLIST_SPARSELUN | BLIST_LARGELUN}, {"HITACHI", "3390-", "*", BLIST_SPARSELUN | BLIST_LARGELUN}, {"HITACHI", "6586-", "*", BLIST_SPARSELUN | BLIST_LARGELUN}, {"HITACHI", "6588-", "*", BLIST_SPARSELUN | BLIST_LARGELUN}, {"HP", "A6189A", NULL, BLIST_SPARSELUN | BLIST_LARGELUN}, /* HP VA7400 */ {"HP", "OPEN-", "*", BLIST_REPORTLUN2}, /* HP XP Arrays */ {"HP", "NetRAID-4M", NULL, BLIST_FORCELUN}, {"HP", "HSV100", NULL, BLIST_REPORTLUN2 | BLIST_NOSTARTONADD}, {"HP", "C1557A", NULL, BLIST_FORCELUN}, {"HP", "C3323-300", "4269", BLIST_NOTQ}, {"HP", "C5713A", NULL, BLIST_NOREPORTLUN}, {"HP", "DF400", "*", BLIST_SPARSELUN | BLIST_LARGELUN}, {"HP", "DF500", "*", BLIST_SPARSELUN | BLIST_LARGELUN}, {"HP", "DF600", "*", BLIST_SPARSELUN | BLIST_LARGELUN}, {"HP", "OP-C-", "*", BLIST_SPARSELUN | BLIST_LARGELUN}, {"HP", "3380-", "*", BLIST_SPARSELUN | BLIST_LARGELUN}, {"HP", "3390-", "*", BLIST_SPARSELUN | BLIST_LARGELUN}, {"HP", "6586-", "*", BLIST_SPARSELUN | BLIST_LARGELUN}, {"HP", "6588-", "*", BLIST_SPARSELUN | BLIST_LARGELUN}, {"IBM", "AuSaV1S2", NULL, BLIST_FORCELUN}, {"IBM", "ProFibre 4000R", "*", BLIST_SPARSELUN | BLIST_LARGELUN}, {"IBM", "2105", NULL, BLIST_RETRY_HWERROR}, {"iomega", "jaz 1GB", "J.86", BLIST_NOTQ | BLIST_NOLUN}, {"IOMEGA", "ZIP", NULL, BLIST_NOTQ | BLIST_NOLUN}, {"IOMEGA", "Io20S *F", NULL, BLIST_KEY}, {"INSITE", "Floptical F*8I", NULL, BLIST_KEY}, {"INSITE", "I325VM", NULL, BLIST_KEY}, {"iRiver", "iFP Mass Driver", NULL, BLIST_NOT_LOCKABLE | BLIST_INQUIRY_36}, {"LASOUND", "CDX7405", "3.10", BLIST_MAX5LUN | BLIST_SINGLELUN}, {"MATSHITA", "PD-1", NULL, BLIST_FORCELUN | BLIST_SINGLELUN}, {"MATSHITA", "DMC-LC5", NULL, BLIST_NOT_LOCKABLE | BLIST_INQUIRY_36}, {"MATSHITA", "DMC-LC40", NULL, BLIST_NOT_LOCKABLE | BLIST_INQUIRY_36}, {"Medion", "Flash XL MMC/SD", "2.6D", BLIST_FORCELUN}, {"MegaRAID", "LD", NULL, BLIST_FORCELUN}, {"MICROP", "4110", NULL, BLIST_NOTQ}, {"MYLEX", "DACARMRB", "*", BLIST_REPORTLUN2}, {"nCipher", "Fastness Crypto", NULL, BLIST_FORCELUN}, {"NAKAMICH", "MJ-4.8S", NULL, BLIST_FORCELUN | BLIST_SINGLELUN}, {"NAKAMICH", "MJ-5.16S", NULL, BLIST_FORCELUN | BLIST_SINGLELUN}, {"NEC", "PD-1 ODX654P", NULL, BLIST_FORCELUN | BLIST_SINGLELUN}, {"NEC", "iStorage", NULL, BLIST_REPORTLUN2}, {"NRC", "MBR-7", NULL, BLIST_FORCELUN | BLIST_SINGLELUN}, {"NRC", "MBR-7.4", NULL, BLIST_FORCELUN | BLIST_SINGLELUN}, {"PIONEER", "CD-ROM DRM-600", NULL, BLIST_FORCELUN | BLIST_SINGLELUN}, {"PIONEER", "CD-ROM DRM-602X", NULL, BLIST_FORCELUN | BLIST_SINGLELUN}, {"PIONEER", "CD-ROM DRM-604X", NULL, BLIST_FORCELUN | BLIST_SINGLELUN}, {"PIONEER", "CD-ROM DRM-624X", NULL, BLIST_FORCELUN | BLIST_SINGLELUN}, {"Promise", "VTrak E610f", NULL, BLIST_SPARSELUN | BLIST_NO_RSOC}, {"Promise", "", NULL, BLIST_SPARSELUN}, {"QUANTUM", "XP34301", "1071", BLIST_NOTQ}, {"REGAL", "CDC-4X", NULL, BLIST_MAX5LUN | BLIST_SINGLELUN}, {"SanDisk", "ImageMate CF-SD1", NULL, BLIST_FORCELUN}, {"SEAGATE", "ST34555N", "0930", BLIST_NOTQ}, /* Chokes on tagged INQUIRY */ {"SEAGATE", "ST3390N", "9546", BLIST_NOTQ}, {"SEAGATE", "ST900MM0006", NULL, BLIST_SKIP_VPD_PAGES}, {"SGI", "RAID3", "*", BLIST_SPARSELUN}, {"SGI", "RAID5", "*", BLIST_SPARSELUN}, {"SGI", "TP9100", "*", BLIST_REPORTLUN2}, {"SGI", "Universal Xport", "*", BLIST_NO_ULD_ATTACH}, {"IBM", "Universal Xport", "*", BLIST_NO_ULD_ATTACH}, {"SUN", "Universal Xport", "*", BLIST_NO_ULD_ATTACH}, {"DELL", "Universal Xport", "*", BLIST_NO_ULD_ATTACH}, {"SMSC", "USB 2 HS-CF", NULL, BLIST_SPARSELUN | BLIST_INQUIRY_36}, {"SONY", "CD-ROM CDU-8001", NULL, BLIST_BORKEN}, {"SONY", "TSL", NULL, BLIST_FORCELUN}, /* DDS3 & DDS4 autoloaders */ {"ST650211", "CF", NULL, BLIST_RETRY_HWERROR}, {"SUN", "T300", "*", BLIST_SPARSELUN}, {"SUN", "T4", "*", BLIST_SPARSELUN}, {"TEXEL", "CD-ROM", "1.06", BLIST_BORKEN}, {"Tornado-", "F4", "*", BLIST_NOREPORTLUN}, {"TOSHIBA", "CDROM", NULL, BLIST_ISROM}, {"TOSHIBA", "CD-ROM", NULL, BLIST_ISROM}, {"Traxdata", "CDR4120", NULL, BLIST_NOLUN}, /* locks up */ {"USB2.0", "SMARTMEDIA/XD", NULL, BLIST_FORCELUN | BLIST_INQUIRY_36}, {"WangDAT", "Model 2600", "01.7", BLIST_SELECT_NO_ATN}, {"WangDAT", "Model 3200", "02.2", BLIST_SELECT_NO_ATN}, {"WangDAT", "Model 1300", "02.4", BLIST_SELECT_NO_ATN}, {"WDC WD25", "00JB-00FUA0", NULL, BLIST_NOREPORTLUN}, {"XYRATEX", "RS", "*", BLIST_SPARSELUN | BLIST_LARGELUN}, {"Zzyzx", "RocketStor 500S", NULL, BLIST_SPARSELUN}, {"Zzyzx", "RocketStor 2000", NULL, BLIST_SPARSELUN}, { NULL, NULL, NULL, 0 }, }; static struct scsi_dev_info_list_table *scsi_devinfo_lookup_by_key(int key) { struct scsi_dev_info_list_table *devinfo_table; int found = 0; list_for_each_entry(devinfo_table, &scsi_dev_info_list, node) if (devinfo_table->key == key) { found = 1; break; } if (!found) return ERR_PTR(-EINVAL); return devinfo_table; } /* * scsi_strcpy_devinfo: called from scsi_dev_info_list_add to copy into * devinfo vendor and model strings. */ static void scsi_strcpy_devinfo(char *name, char *to, size_t to_length, char *from, int compatible) { size_t from_length; from_length = strlen(from); strncpy(to, from, min(to_length, from_length)); if (from_length < to_length) { if (compatible) { /* * NUL terminate the string if it is short. */ to[from_length] = '\0'; } else { /* * space pad the string if it is short. */ strncpy(&to[from_length], spaces, to_length - from_length); } } if (from_length > to_length) printk(KERN_WARNING "%s: %s string '%s' is too long\n", __func__, name, from); } /** * scsi_dev_info_list_add - add one dev_info list entry. * @compatible: if true, null terminate short strings. Otherwise space pad. * @vendor: vendor string * @model: model (product) string * @strflags: integer string * @flags: if strflags NULL, use this flag value * * Description: * Create and add one dev_info entry for @vendor, @model, @strflags or * @flag. If @compatible, add to the tail of the list, do not space * pad, and set devinfo->compatible. The scsi_static_device_list entries * are added with @compatible 1 and @clfags NULL. * * Returns: 0 OK, -error on failure. **/ static int scsi_dev_info_list_add(int compatible, char *vendor, char *model, char *strflags, int flags) { return scsi_dev_info_list_add_keyed(compatible, vendor, model, strflags, flags, SCSI_DEVINFO_GLOBAL); } /** * scsi_dev_info_list_add_keyed - add one dev_info list entry. * @compatible: if true, null terminate short strings. Otherwise space pad. * @vendor: vendor string * @model: model (product) string * @strflags: integer string * @flags: if strflags NULL, use this flag value * @key: specify list to use * * Description: * Create and add one dev_info entry for @vendor, @model, * @strflags or @flag in list specified by @key. If @compatible, * add to the tail of the list, do not space pad, and set * devinfo->compatible. The scsi_static_device_list entries are * added with @compatible 1 and @clfags NULL. * * Returns: 0 OK, -error on failure. **/ int scsi_dev_info_list_add_keyed(int compatible, char *vendor, char *model, char *strflags, int flags, int key) { struct scsi_dev_info_list *devinfo; struct scsi_dev_info_list_table *devinfo_table = scsi_devinfo_lookup_by_key(key); if (IS_ERR(devinfo_table)) return PTR_ERR(devinfo_table); devinfo = kmalloc(sizeof(*devinfo), GFP_KERNEL); if (!devinfo) { printk(KERN_ERR "%s: no memory\n", __func__); return -ENOMEM; } scsi_strcpy_devinfo("vendor", devinfo->vendor, sizeof(devinfo->vendor), vendor, compatible); scsi_strcpy_devinfo("model", devinfo->model, sizeof(devinfo->model), model, compatible); if (strflags) devinfo->flags = simple_strtoul(strflags, NULL, 0); else devinfo->flags = flags; devinfo->compatible = compatible; if (compatible) list_add_tail(&devinfo->dev_info_list, &devinfo_table->scsi_dev_info_list); else list_add(&devinfo->dev_info_list, &devinfo_table->scsi_dev_info_list); return 0; } EXPORT_SYMBOL(scsi_dev_info_list_add_keyed); /** * scsi_dev_info_list_del_keyed - remove one dev_info list entry. * @vendor: vendor string * @model: model (product) string * @key: specify list to use * * Description: * Remove and destroy one dev_info entry for @vendor, @model * in list specified by @key. * * Returns: 0 OK, -error on failure. **/ int scsi_dev_info_list_del_keyed(char *vendor, char *model, int key) { struct scsi_dev_info_list *devinfo, *found = NULL; struct scsi_dev_info_list_table *devinfo_table = scsi_devinfo_lookup_by_key(key); if (IS_ERR(devinfo_table)) return PTR_ERR(devinfo_table); list_for_each_entry(devinfo, &devinfo_table->scsi_dev_info_list, dev_info_list) { if (devinfo->compatible) { /* * Behave like the older version of get_device_flags. */ size_t max; /* * XXX why skip leading spaces? If an odd INQUIRY * value, that should have been part of the * scsi_static_device_list[] entry, such as " FOO" * rather than "FOO". Since this code is already * here, and we don't know what device it is * trying to work with, leave it as-is. */ max = 8; /* max length of vendor */ while ((max > 0) && *vendor == ' ') { max--; vendor++; } /* * XXX removing the following strlen() would be * good, using it means that for a an entry not in * the list, we scan every byte of every vendor * listed in scsi_static_device_list[], and never match * a single one (and still have to compare at * least the first byte of each vendor). */ if (memcmp(devinfo->vendor, vendor, min(max, strlen(devinfo->vendor)))) continue; /* * Skip spaces again. */ max = 16; /* max length of model */ while ((max > 0) && *model == ' ') { max--; model++; } if (memcmp(devinfo->model, model, min(max, strlen(devinfo->model)))) continue; found = devinfo; } else { if (!memcmp(devinfo->vendor, vendor, sizeof(devinfo->vendor)) && !memcmp(devinfo->model, model, sizeof(devinfo->model))) found = devinfo; } if (found) break; } if (found) { list_del(&found->dev_info_list); kfree(found); return 0; } return -ENOENT; } EXPORT_SYMBOL(scsi_dev_info_list_del_keyed); /** * scsi_dev_info_list_add_str - parse dev_list and add to the scsi_dev_info_list. * @dev_list: string of device flags to add * * Description: * Parse dev_list, and add entries to the scsi_dev_info_list. * dev_list is of the form "vendor:product:flag,vendor:product:flag". * dev_list is modified via strsep. Can be called for command line * addition, for proc or mabye a sysfs interface. * * Returns: 0 if OK, -error on failure. **/ static int scsi_dev_info_list_add_str(char *dev_list) { char *vendor, *model, *strflags, *next; char *next_check; int res = 0; next = dev_list; if (next && next[0] == '"') { /* * Ignore both the leading and trailing quote. */ next++; next_check = ",\""; } else { next_check = ","; } /* * For the leading and trailing '"' case, the for loop comes * through the last time with vendor[0] == '\0'. */ for (vendor = strsep(&next, ":"); vendor && (vendor[0] != '\0') && (res == 0); vendor = strsep(&next, ":")) { strflags = NULL; model = strsep(&next, ":"); if (model) strflags = strsep(&next, next_check); if (!model || !strflags) { printk(KERN_ERR "%s: bad dev info string '%s' '%s'" " '%s'\n", __func__, vendor, model, strflags); res = -EINVAL; } else res = scsi_dev_info_list_add(0 /* compatible */, vendor, model, strflags, 0); } return res; } /** * get_device_flags - get device specific flags from the dynamic device list. * @sdev: &scsi_device to get flags for * @vendor: vendor name * @model: model name * * Description: * Search the global scsi_dev_info_list (specified by list zero) * for an entry matching @vendor and @model, if found, return the * matching flags value, else return the host or global default * settings. Called during scan time. **/ int scsi_get_device_flags(struct scsi_device *sdev, const unsigned char *vendor, const unsigned char *model) { return scsi_get_device_flags_keyed(sdev, vendor, model, SCSI_DEVINFO_GLOBAL); } /** * scsi_get_device_flags_keyed - get device specific flags from the dynamic device list * @sdev: &scsi_device to get flags for * @vendor: vendor name * @model: model name * @key: list to look up * * Description: * Search the scsi_dev_info_list specified by @key for an entry * matching @vendor and @model, if found, return the matching * flags value, else return the host or global default settings. * Called during scan time. **/ int scsi_get_device_flags_keyed(struct scsi_device *sdev, const unsigned char *vendor, const unsigned char *model, int key) { struct scsi_dev_info_list *devinfo; struct scsi_dev_info_list_table *devinfo_table; devinfo_table = scsi_devinfo_lookup_by_key(key); if (IS_ERR(devinfo_table)) return PTR_ERR(devinfo_table); list_for_each_entry(devinfo, &devinfo_table->scsi_dev_info_list, dev_info_list) { if (devinfo->compatible) { /* * Behave like the older version of get_device_flags. */ size_t max; /* * XXX why skip leading spaces? If an odd INQUIRY * value, that should have been part of the * scsi_static_device_list[] entry, such as " FOO" * rather than "FOO". Since this code is already * here, and we don't know what device it is * trying to work with, leave it as-is. */ max = 8; /* max length of vendor */ while ((max > 0) && *vendor == ' ') { max--; vendor++; } /* * XXX removing the following strlen() would be * good, using it means that for a an entry not in * the list, we scan every byte of every vendor * listed in scsi_static_device_list[], and never match * a single one (and still have to compare at * least the first byte of each vendor). */ if (memcmp(devinfo->vendor, vendor, min(max, strlen(devinfo->vendor)))) continue; /* * Skip spaces again. */ max = 16; /* max length of model */ while ((max > 0) && *model == ' ') { max--; model++; } if (memcmp(devinfo->model, model, min(max, strlen(devinfo->model)))) continue; return devinfo->flags; } else { if (!memcmp(devinfo->vendor, vendor, sizeof(devinfo->vendor)) && !memcmp(devinfo->model, model, sizeof(devinfo->model))) return devinfo->flags; } } /* nothing found, return nothing */ if (key != SCSI_DEVINFO_GLOBAL) return 0; /* except for the global list, where we have an exception */ if (sdev->sdev_bflags) return sdev->sdev_bflags; return scsi_default_dev_flags; } EXPORT_SYMBOL(scsi_get_device_flags_keyed); #ifdef CONFIG_SCSI_PROC_FS struct double_list { struct list_head *top; struct list_head *bottom; }; static int devinfo_seq_show(struct seq_file *m, void *v) { struct double_list *dl = v; struct scsi_dev_info_list_table *devinfo_table = list_entry(dl->top, struct scsi_dev_info_list_table, node); struct scsi_dev_info_list *devinfo = list_entry(dl->bottom, struct scsi_dev_info_list, dev_info_list); if (devinfo_table->scsi_dev_info_list.next == dl->bottom && devinfo_table->name) seq_printf(m, "[%s]:\n", devinfo_table->name); seq_printf(m, "'%.8s' '%.16s' 0x%x\n", devinfo->vendor, devinfo->model, devinfo->flags); return 0; } static void *devinfo_seq_start(struct seq_file *m, loff_t *ppos) { struct double_list *dl = kmalloc(sizeof(*dl), GFP_KERNEL); loff_t pos = *ppos; if (!dl) return NULL; list_for_each(dl->top, &scsi_dev_info_list) { struct scsi_dev_info_list_table *devinfo_table = list_entry(dl->top, struct scsi_dev_info_list_table, node); list_for_each(dl->bottom, &devinfo_table->scsi_dev_info_list) if (pos-- == 0) return dl; } kfree(dl); return NULL; } static void *devinfo_seq_next(struct seq_file *m, void *v, loff_t *ppos) { struct double_list *dl = v; struct scsi_dev_info_list_table *devinfo_table = list_entry(dl->top, struct scsi_dev_info_list_table, node); ++*ppos; dl->bottom = dl->bottom->next; while (&devinfo_table->scsi_dev_info_list == dl->bottom) { dl->top = dl->top->next; if (dl->top == &scsi_dev_info_list) { kfree(dl); return NULL; } devinfo_table = list_entry(dl->top, struct scsi_dev_info_list_table, node); dl->bottom = devinfo_table->scsi_dev_info_list.next; } return dl; } static void devinfo_seq_stop(struct seq_file *m, void *v) { kfree(v); } static const struct seq_operations scsi_devinfo_seq_ops = { .start = devinfo_seq_start, .next = devinfo_seq_next, .stop = devinfo_seq_stop, .show = devinfo_seq_show, }; static int proc_scsi_devinfo_open(struct inode *inode, struct file *file) { return seq_open(file, &scsi_devinfo_seq_ops); } /* * proc_scsi_dev_info_write - allow additions to scsi_dev_info_list via /proc. * * Description: Adds a black/white list entry for vendor and model with an * integer value of flag to the scsi device info list. * To use, echo "vendor:model:flag" > /proc/scsi/device_info */ static ssize_t proc_scsi_devinfo_write(struct file *file, const char __user *buf, size_t length, loff_t *ppos) { char *buffer; ssize_t err = length; if (!buf || length>PAGE_SIZE) return -EINVAL; if (!(buffer = (char *) __get_free_page(GFP_KERNEL))) return -ENOMEM; if (copy_from_user(buffer, buf, length)) { err =-EFAULT; goto out; } if (length < PAGE_SIZE) buffer[length] = '\0'; else if (buffer[PAGE_SIZE-1]) { err = -EINVAL; goto out; } scsi_dev_info_list_add_str(buffer); out: free_page((unsigned long)buffer); return err; } static const struct file_operations scsi_devinfo_proc_fops = { .owner = THIS_MODULE, .open = proc_scsi_devinfo_open, .read = seq_read, .write = proc_scsi_devinfo_write, .llseek = seq_lseek, .release = seq_release, }; #endif /* CONFIG_SCSI_PROC_FS */ module_param_string(dev_flags, scsi_dev_flags, sizeof(scsi_dev_flags), 0); MODULE_PARM_DESC(dev_flags, "Given scsi_dev_flags=vendor:model:flags[,v:m:f] add black/white" " list entries for vendor and model with an integer value of flags" " to the scsi device info list"); module_param_named(default_dev_flags, scsi_default_dev_flags, int, S_IRUGO|S_IWUSR); MODULE_PARM_DESC(default_dev_flags, "scsi default device flag integer value"); /** * scsi_exit_devinfo - remove /proc/scsi/device_info & the scsi_dev_info_list **/ void scsi_exit_devinfo(void) { #ifdef CONFIG_SCSI_PROC_FS remove_proc_entry("scsi/device_info", NULL); #endif scsi_dev_info_remove_list(SCSI_DEVINFO_GLOBAL); } /** * scsi_dev_info_add_list - add a new devinfo list * @key: key of the list to add * @name: Name of the list to add (for /proc/scsi/device_info) * * Adds the requested list, returns zero on success, -EEXIST if the * key is already registered to a list, or other error on failure. */ int scsi_dev_info_add_list(int key, const char *name) { struct scsi_dev_info_list_table *devinfo_table = scsi_devinfo_lookup_by_key(key); if (!IS_ERR(devinfo_table)) /* list already exists */ return -EEXIST; devinfo_table = kmalloc(sizeof(*devinfo_table), GFP_KERNEL); if (!devinfo_table) return -ENOMEM; INIT_LIST_HEAD(&devinfo_table->node); INIT_LIST_HEAD(&devinfo_table->scsi_dev_info_list); devinfo_table->name = name; devinfo_table->key = key; list_add_tail(&devinfo_table->node, &scsi_dev_info_list); return 0; } EXPORT_SYMBOL(scsi_dev_info_add_list); /** * scsi_dev_info_remove_list - destroy an added devinfo list * @key: key of the list to destroy * * Iterates over the entire list first, freeing all the values, then * frees the list itself. Returns 0 on success or -EINVAL if the key * can't be found. */ int scsi_dev_info_remove_list(int key) { struct list_head *lh, *lh_next; struct scsi_dev_info_list_table *devinfo_table = scsi_devinfo_lookup_by_key(key); if (IS_ERR(devinfo_table)) /* no such list */ return -EINVAL; /* remove from the master list */ list_del(&devinfo_table->node); list_for_each_safe(lh, lh_next, &devinfo_table->scsi_dev_info_list) { struct scsi_dev_info_list *devinfo; devinfo = list_entry(lh, struct scsi_dev_info_list, dev_info_list); kfree(devinfo); } kfree(devinfo_table); return 0; } EXPORT_SYMBOL(scsi_dev_info_remove_list); /** * scsi_init_devinfo - set up the dynamic device list. * * Description: * Add command line entries from scsi_dev_flags, then add * scsi_static_device_list entries to the scsi device info list. */ int __init scsi_init_devinfo(void) { #ifdef CONFIG_SCSI_PROC_FS struct proc_dir_entry *p; #endif int error, i; error = scsi_dev_info_add_list(SCSI_DEVINFO_GLOBAL, NULL); if (error) return error; error = scsi_dev_info_list_add_str(scsi_dev_flags); if (error) goto out; for (i = 0; scsi_static_device_list[i].vendor; i++) { error = scsi_dev_info_list_add(1 /* compatibile */, scsi_static_device_list[i].vendor, scsi_static_device_list[i].model, NULL, scsi_static_device_list[i].flags); if (error) goto out; } #ifdef CONFIG_SCSI_PROC_FS p = proc_create("scsi/device_info", 0, NULL, &scsi_devinfo_proc_fops); if (!p) { error = -ENOMEM; goto out; } #endif /* CONFIG_SCSI_PROC_FS */ out: if (error) scsi_exit_devinfo(); return error; }
gpl-2.0
HRTKernel/test
fs/ecryptfs/read_write.c
147
8686
/** * eCryptfs: Linux filesystem encryption layer * * Copyright (C) 2007 International Business Machines Corp. * Author(s): Michael A. Halcrow <mahalcro@us.ibm.com> * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of the * License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA * 02111-1307, USA. */ #include <linux/fs.h> #include <linux/pagemap.h> #include "ecryptfs_kernel.h" /** * ecryptfs_write_lower * @ecryptfs_inode: The eCryptfs inode * @data: Data to write * @offset: Byte offset in the lower file to which to write the data * @size: Number of bytes from @data to write at @offset in the lower * file * * Write data to the lower file. * * Returns bytes written on success; less than zero on error */ int ecryptfs_write_lower(struct inode *ecryptfs_inode, char *data, loff_t offset, size_t size) { struct file *lower_file; ssize_t rc; lower_file = ecryptfs_inode_to_private(ecryptfs_inode)->lower_file; if (!lower_file) return -EIO; rc = kernel_write(lower_file, data, size, offset); mark_inode_dirty_sync(ecryptfs_inode); return rc; } /** * ecryptfs_write_lower_page_segment * @ecryptfs_inode: The eCryptfs inode * @page_for_lower: The page containing the data to be written to the * lower file * @offset_in_page: The offset in the @page_for_lower from which to * start writing the data * @size: The amount of data from @page_for_lower to write to the * lower file * * Determines the byte offset in the file for the given page and * offset within the page, maps the page, and makes the call to write * the contents of @page_for_lower to the lower inode. * * Returns zero on success; non-zero otherwise */ int ecryptfs_write_lower_page_segment(struct inode *ecryptfs_inode, struct page *page_for_lower, size_t offset_in_page, size_t size) { char *virt; loff_t offset; int rc; offset = ((((loff_t)page_for_lower->index) << PAGE_CACHE_SHIFT) + offset_in_page); virt = kmap(page_for_lower); rc = ecryptfs_write_lower(ecryptfs_inode, virt, offset, size); if (rc > 0) rc = 0; kunmap(page_for_lower); return rc; } /** * ecryptfs_write * @ecryptfs_inode: The eCryptfs file into which to write * @data: Virtual address where data to write is located * @offset: Offset in the eCryptfs file at which to begin writing the * data from @data * @size: The number of bytes to write from @data * * Write an arbitrary amount of data to an arbitrary location in the * eCryptfs inode page cache. This is done on a page-by-page, and then * by an extent-by-extent, basis; individual extents are encrypted and * written to the lower page cache (via VFS writes). This function * takes care of all the address translation to locations in the lower * filesystem; it also handles truncate events, writing out zeros * where necessary. * * Returns zero on success; non-zero otherwise */ int ecryptfs_write(struct inode *ecryptfs_inode, char *data, loff_t offset, size_t size) { struct page *ecryptfs_page; struct ecryptfs_crypt_stat *crypt_stat; char *ecryptfs_page_virt; loff_t ecryptfs_file_size = i_size_read(ecryptfs_inode); loff_t data_offset = 0; loff_t pos; int rc = 0; crypt_stat = &ecryptfs_inode_to_private(ecryptfs_inode)->crypt_stat; /* * if we are writing beyond current size, then start pos * at the current size - we'll fill in zeros from there. */ if (offset > ecryptfs_file_size) pos = ecryptfs_file_size; else pos = offset; while (pos < (offset + size)) { pgoff_t ecryptfs_page_idx = (pos >> PAGE_CACHE_SHIFT); size_t start_offset_in_page = (pos & ~PAGE_CACHE_MASK); size_t num_bytes = (PAGE_CACHE_SIZE - start_offset_in_page); loff_t total_remaining_bytes = ((offset + size) - pos); if (fatal_signal_pending(current)) { rc = -EINTR; break; } if (num_bytes > total_remaining_bytes) num_bytes = total_remaining_bytes; if (pos < offset) { /* remaining zeros to write, up to destination offset */ loff_t total_remaining_zeros = (offset - pos); if (num_bytes > total_remaining_zeros) num_bytes = total_remaining_zeros; } ecryptfs_page = ecryptfs_get_locked_page(ecryptfs_inode, ecryptfs_page_idx); if (IS_ERR(ecryptfs_page)) { rc = PTR_ERR(ecryptfs_page); printk(KERN_ERR "%s: Error getting page at " "index [%ld] from eCryptfs inode " "mapping; rc = [%d]\n", __func__, ecryptfs_page_idx, rc); goto out; } ecryptfs_page_virt = kmap_atomic(ecryptfs_page); /* * pos: where we're now writing, offset: where the request was * If current pos is before request, we are filling zeros * If we are at or beyond request, we are writing the *data* * If we're in a fresh page beyond eof, zero it in either case */ if (pos < offset || !start_offset_in_page) { /* We are extending past the previous end of the file. * Fill in zero values to the end of the page */ memset(((char *)ecryptfs_page_virt + start_offset_in_page), 0, PAGE_CACHE_SIZE - start_offset_in_page); } /* pos >= offset, we are now writing the data request */ if (pos >= offset) { memcpy(((char *)ecryptfs_page_virt + start_offset_in_page), (data + data_offset), num_bytes); data_offset += num_bytes; } kunmap_atomic(ecryptfs_page_virt); flush_dcache_page(ecryptfs_page); SetPageUptodate(ecryptfs_page); unlock_page(ecryptfs_page); if (crypt_stat->flags & ECRYPTFS_ENCRYPTED) rc = ecryptfs_encrypt_page(ecryptfs_page); else rc = ecryptfs_write_lower_page_segment(ecryptfs_inode, ecryptfs_page, start_offset_in_page, data_offset); page_cache_release(ecryptfs_page); if (rc) { printk(KERN_ERR "%s: Error encrypting " "page; rc = [%d]\n", __func__, rc); goto out; } pos += num_bytes; } if (pos > ecryptfs_file_size) { i_size_write(ecryptfs_inode, pos); if (crypt_stat->flags & ECRYPTFS_ENCRYPTED) { int rc2; rc2 = ecryptfs_write_inode_size_to_metadata( ecryptfs_inode); if (rc2) { printk(KERN_ERR "Problem with " "ecryptfs_write_inode_size_to_metadata; " "rc = [%d]\n", rc2); if (!rc) rc = rc2; goto out; } } } out: return rc; } /** * ecryptfs_read_lower * @data: The read data is stored here by this function * @offset: Byte offset in the lower file from which to read the data * @size: Number of bytes to read from @offset of the lower file and * store into @data * @ecryptfs_inode: The eCryptfs inode * * Read @size bytes of data at byte offset @offset from the lower * inode into memory location @data. * * Returns bytes read on success; 0 on EOF; less than zero on error */ int ecryptfs_read_lower(char *data, loff_t offset, size_t size, struct inode *ecryptfs_inode) { struct file *lower_file; lower_file = ecryptfs_inode_to_private(ecryptfs_inode)->lower_file; if (!lower_file) return -EIO; return kernel_read(lower_file, offset, data, size); } /** * ecryptfs_read_lower_page_segment * @page_for_ecryptfs: The page into which data for eCryptfs will be * written * @offset_in_page: Offset in @page_for_ecryptfs from which to start * writing * @size: The number of bytes to write into @page_for_ecryptfs * @ecryptfs_inode: The eCryptfs inode * * Determines the byte offset in the file for the given page and * offset within the page, maps the page, and makes the call to read * the contents of @page_for_ecryptfs from the lower inode. * * Returns zero on success; non-zero otherwise */ int ecryptfs_read_lower_page_segment(struct page *page_for_ecryptfs, pgoff_t page_index, size_t offset_in_page, size_t size, struct inode *ecryptfs_inode) { char *virt; loff_t offset; int rc; offset = ((((loff_t)page_index) << PAGE_CACHE_SHIFT) + offset_in_page); virt = kmap(page_for_ecryptfs); rc = ecryptfs_read_lower(virt, offset, size, ecryptfs_inode); if (rc > 0) rc = 0; kunmap(page_for_ecryptfs); flush_dcache_page(page_for_ecryptfs); return rc; }
gpl-2.0
calonso-conabio/linux
drivers/net/wireless/iwlwifi/mvm/sta.c
147
49125
/****************************************************************************** * * This file is provided under a dual BSD/GPLv2 license. When using or * redistributing this file, you may do so under either license. * * GPL LICENSE SUMMARY * * Copyright(c) 2012 - 2015 Intel Corporation. All rights reserved. * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH * * This program is free software; you can redistribute it and/or modify * it under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, * USA * * The full GNU General Public License is included in this distribution * in the file called COPYING. * * Contact Information: * Intel Linux Wireless <ilw@linux.intel.com> * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 * * BSD LICENSE * * Copyright(c) 2012 - 2015 Intel Corporation. All rights reserved. * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * * Neither the name Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * *****************************************************************************/ #include <net/mac80211.h> #include "mvm.h" #include "sta.h" #include "rs.h" static int iwl_mvm_find_free_sta_id(struct iwl_mvm *mvm, enum nl80211_iftype iftype) { int sta_id; u32 reserved_ids = 0; BUILD_BUG_ON(IWL_MVM_STATION_COUNT > 32); WARN_ON_ONCE(test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)); lockdep_assert_held(&mvm->mutex); /* d0i3/d3 assumes the AP's sta_id (of sta vif) is 0. reserve it. */ if (iftype != NL80211_IFTYPE_STATION) reserved_ids = BIT(0); /* Don't take rcu_read_lock() since we are protected by mvm->mutex */ for (sta_id = 0; sta_id < IWL_MVM_STATION_COUNT; sta_id++) { if (BIT(sta_id) & reserved_ids) continue; if (!rcu_dereference_protected(mvm->fw_id_to_mac_id[sta_id], lockdep_is_held(&mvm->mutex))) return sta_id; } return IWL_MVM_STATION_COUNT; } /* send station add/update command to firmware */ int iwl_mvm_sta_send_to_fw(struct iwl_mvm *mvm, struct ieee80211_sta *sta, bool update) { struct iwl_mvm_sta *mvm_sta = iwl_mvm_sta_from_mac80211(sta); struct iwl_mvm_add_sta_cmd add_sta_cmd = { .sta_id = mvm_sta->sta_id, .mac_id_n_color = cpu_to_le32(mvm_sta->mac_id_n_color), .add_modify = update ? 1 : 0, .station_flags_msk = cpu_to_le32(STA_FLG_FAT_EN_MSK | STA_FLG_MIMO_EN_MSK), }; int ret; u32 status; u32 agg_size = 0, mpdu_dens = 0; if (!update) { add_sta_cmd.tfd_queue_msk = cpu_to_le32(mvm_sta->tfd_queue_msk); memcpy(&add_sta_cmd.addr, sta->addr, ETH_ALEN); } switch (sta->bandwidth) { case IEEE80211_STA_RX_BW_160: add_sta_cmd.station_flags |= cpu_to_le32(STA_FLG_FAT_EN_160MHZ); /* fall through */ case IEEE80211_STA_RX_BW_80: add_sta_cmd.station_flags |= cpu_to_le32(STA_FLG_FAT_EN_80MHZ); /* fall through */ case IEEE80211_STA_RX_BW_40: add_sta_cmd.station_flags |= cpu_to_le32(STA_FLG_FAT_EN_40MHZ); /* fall through */ case IEEE80211_STA_RX_BW_20: if (sta->ht_cap.ht_supported) add_sta_cmd.station_flags |= cpu_to_le32(STA_FLG_FAT_EN_20MHZ); break; } switch (sta->rx_nss) { case 1: add_sta_cmd.station_flags |= cpu_to_le32(STA_FLG_MIMO_EN_SISO); break; case 2: add_sta_cmd.station_flags |= cpu_to_le32(STA_FLG_MIMO_EN_MIMO2); break; case 3 ... 8: add_sta_cmd.station_flags |= cpu_to_le32(STA_FLG_MIMO_EN_MIMO3); break; } switch (sta->smps_mode) { case IEEE80211_SMPS_AUTOMATIC: case IEEE80211_SMPS_NUM_MODES: WARN_ON(1); break; case IEEE80211_SMPS_STATIC: /* override NSS */ add_sta_cmd.station_flags &= ~cpu_to_le32(STA_FLG_MIMO_EN_MSK); add_sta_cmd.station_flags |= cpu_to_le32(STA_FLG_MIMO_EN_SISO); break; case IEEE80211_SMPS_DYNAMIC: add_sta_cmd.station_flags |= cpu_to_le32(STA_FLG_RTS_MIMO_PROT); break; case IEEE80211_SMPS_OFF: /* nothing */ break; } if (sta->ht_cap.ht_supported) { add_sta_cmd.station_flags_msk |= cpu_to_le32(STA_FLG_MAX_AGG_SIZE_MSK | STA_FLG_AGG_MPDU_DENS_MSK); mpdu_dens = sta->ht_cap.ampdu_density; } if (sta->vht_cap.vht_supported) { agg_size = sta->vht_cap.cap & IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK; agg_size >>= IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_SHIFT; } else if (sta->ht_cap.ht_supported) { agg_size = sta->ht_cap.ampdu_factor; } add_sta_cmd.station_flags |= cpu_to_le32(agg_size << STA_FLG_MAX_AGG_SIZE_SHIFT); add_sta_cmd.station_flags |= cpu_to_le32(mpdu_dens << STA_FLG_AGG_MPDU_DENS_SHIFT); status = ADD_STA_SUCCESS; ret = iwl_mvm_send_cmd_pdu_status(mvm, ADD_STA, sizeof(add_sta_cmd), &add_sta_cmd, &status); if (ret) return ret; switch (status) { case ADD_STA_SUCCESS: IWL_DEBUG_ASSOC(mvm, "ADD_STA PASSED\n"); break; default: ret = -EIO; IWL_ERR(mvm, "ADD_STA failed\n"); break; } return ret; } static int iwl_mvm_tdls_sta_init(struct iwl_mvm *mvm, struct ieee80211_sta *sta) { unsigned long used_hw_queues; struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta); unsigned int wdg_timeout = iwl_mvm_get_wd_timeout(mvm, NULL, true, false); u32 ac; lockdep_assert_held(&mvm->mutex); used_hw_queues = iwl_mvm_get_used_hw_queues(mvm, NULL); /* Find available queues, and allocate them to the ACs */ for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) { u8 queue = find_first_zero_bit(&used_hw_queues, mvm->first_agg_queue); if (queue >= mvm->first_agg_queue) { IWL_ERR(mvm, "Failed to allocate STA queue\n"); return -EBUSY; } __set_bit(queue, &used_hw_queues); mvmsta->hw_queue[ac] = queue; } /* Found a place for all queues - enable them */ for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) { iwl_mvm_enable_ac_txq(mvm, mvmsta->hw_queue[ac], iwl_mvm_ac_to_tx_fifo[ac], wdg_timeout); mvmsta->tfd_queue_msk |= BIT(mvmsta->hw_queue[ac]); } return 0; } static void iwl_mvm_tdls_sta_deinit(struct iwl_mvm *mvm, struct ieee80211_sta *sta) { struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta); unsigned long sta_msk; int i; lockdep_assert_held(&mvm->mutex); /* disable the TDLS STA-specific queues */ sta_msk = mvmsta->tfd_queue_msk; for_each_set_bit(i, &sta_msk, sizeof(sta_msk) * BITS_PER_BYTE) iwl_mvm_disable_txq(mvm, i, 0); } int iwl_mvm_add_sta(struct iwl_mvm *mvm, struct ieee80211_vif *vif, struct ieee80211_sta *sta) { struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); struct iwl_mvm_sta *mvm_sta = iwl_mvm_sta_from_mac80211(sta); int i, ret, sta_id; lockdep_assert_held(&mvm->mutex); if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) sta_id = iwl_mvm_find_free_sta_id(mvm, ieee80211_vif_type_p2p(vif)); else sta_id = mvm_sta->sta_id; if (sta_id == IWL_MVM_STATION_COUNT) return -ENOSPC; spin_lock_init(&mvm_sta->lock); mvm_sta->sta_id = sta_id; mvm_sta->mac_id_n_color = FW_CMD_ID_AND_COLOR(mvmvif->id, mvmvif->color); mvm_sta->vif = vif; mvm_sta->max_agg_bufsize = LINK_QUAL_AGG_FRAME_LIMIT_DEF; mvm_sta->tx_protection = 0; mvm_sta->tt_tx_protection = false; /* HW restart, don't assume the memory has been zeroed */ atomic_set(&mvm->pending_frames[sta_id], 0); mvm_sta->tid_disable_agg = 0; mvm_sta->tfd_queue_msk = 0; /* allocate new queues for a TDLS station */ if (sta->tdls) { ret = iwl_mvm_tdls_sta_init(mvm, sta); if (ret) return ret; } else { for (i = 0; i < IEEE80211_NUM_ACS; i++) if (vif->hw_queue[i] != IEEE80211_INVAL_HW_QUEUE) mvm_sta->tfd_queue_msk |= BIT(vif->hw_queue[i]); } /* for HW restart - reset everything but the sequence number */ for (i = 0; i < IWL_MAX_TID_COUNT; i++) { u16 seq = mvm_sta->tid_data[i].seq_number; memset(&mvm_sta->tid_data[i], 0, sizeof(mvm_sta->tid_data[i])); mvm_sta->tid_data[i].seq_number = seq; } mvm_sta->agg_tids = 0; ret = iwl_mvm_sta_send_to_fw(mvm, sta, false); if (ret) goto err; if (vif->type == NL80211_IFTYPE_STATION) { if (!sta->tdls) { WARN_ON(mvmvif->ap_sta_id != IWL_MVM_STATION_COUNT); mvmvif->ap_sta_id = sta_id; } else { WARN_ON(mvmvif->ap_sta_id == IWL_MVM_STATION_COUNT); } } rcu_assign_pointer(mvm->fw_id_to_mac_id[sta_id], sta); return 0; err: iwl_mvm_tdls_sta_deinit(mvm, sta); return ret; } int iwl_mvm_update_sta(struct iwl_mvm *mvm, struct ieee80211_vif *vif, struct ieee80211_sta *sta) { return iwl_mvm_sta_send_to_fw(mvm, sta, true); } int iwl_mvm_drain_sta(struct iwl_mvm *mvm, struct iwl_mvm_sta *mvmsta, bool drain) { struct iwl_mvm_add_sta_cmd cmd = {}; int ret; u32 status; lockdep_assert_held(&mvm->mutex); cmd.mac_id_n_color = cpu_to_le32(mvmsta->mac_id_n_color); cmd.sta_id = mvmsta->sta_id; cmd.add_modify = STA_MODE_MODIFY; cmd.station_flags = drain ? cpu_to_le32(STA_FLG_DRAIN_FLOW) : 0; cmd.station_flags_msk = cpu_to_le32(STA_FLG_DRAIN_FLOW); status = ADD_STA_SUCCESS; ret = iwl_mvm_send_cmd_pdu_status(mvm, ADD_STA, sizeof(cmd), &cmd, &status); if (ret) return ret; switch (status) { case ADD_STA_SUCCESS: IWL_DEBUG_INFO(mvm, "Frames for staid %d will drained in fw\n", mvmsta->sta_id); break; default: ret = -EIO; IWL_ERR(mvm, "Couldn't drain frames for staid %d\n", mvmsta->sta_id); break; } return ret; } /* * Remove a station from the FW table. Before sending the command to remove * the station validate that the station is indeed known to the driver (sanity * only). */ static int iwl_mvm_rm_sta_common(struct iwl_mvm *mvm, u8 sta_id) { struct ieee80211_sta *sta; struct iwl_mvm_rm_sta_cmd rm_sta_cmd = { .sta_id = sta_id, }; int ret; sta = rcu_dereference_protected(mvm->fw_id_to_mac_id[sta_id], lockdep_is_held(&mvm->mutex)); /* Note: internal stations are marked as error values */ if (!sta) { IWL_ERR(mvm, "Invalid station id\n"); return -EINVAL; } ret = iwl_mvm_send_cmd_pdu(mvm, REMOVE_STA, 0, sizeof(rm_sta_cmd), &rm_sta_cmd); if (ret) { IWL_ERR(mvm, "Failed to remove station. Id=%d\n", sta_id); return ret; } return 0; } void iwl_mvm_sta_drained_wk(struct work_struct *wk) { struct iwl_mvm *mvm = container_of(wk, struct iwl_mvm, sta_drained_wk); u8 sta_id; /* * The mutex is needed because of the SYNC cmd, but not only: if the * work would run concurrently with iwl_mvm_rm_sta, it would run before * iwl_mvm_rm_sta sets the station as busy, and exit. Then * iwl_mvm_rm_sta would set the station as busy, and nobody will clean * that later. */ mutex_lock(&mvm->mutex); for_each_set_bit(sta_id, mvm->sta_drained, IWL_MVM_STATION_COUNT) { int ret; struct ieee80211_sta *sta = rcu_dereference_protected(mvm->fw_id_to_mac_id[sta_id], lockdep_is_held(&mvm->mutex)); /* * This station is in use or RCU-removed; the latter happens in * managed mode, where mac80211 removes the station before we * can remove it from firmware (we can only do that after the * MAC is marked unassociated), and possibly while the deauth * frame to disconnect from the AP is still queued. Then, the * station pointer is -ENOENT when the last skb is reclaimed. */ if (!IS_ERR(sta) || PTR_ERR(sta) == -ENOENT) continue; if (PTR_ERR(sta) == -EINVAL) { IWL_ERR(mvm, "Drained sta %d, but it is internal?\n", sta_id); continue; } if (!sta) { IWL_ERR(mvm, "Drained sta %d, but it was NULL?\n", sta_id); continue; } WARN_ON(PTR_ERR(sta) != -EBUSY); /* This station was removed and we waited until it got drained, * we can now proceed and remove it. */ ret = iwl_mvm_rm_sta_common(mvm, sta_id); if (ret) { IWL_ERR(mvm, "Couldn't remove sta %d after it was drained\n", sta_id); continue; } RCU_INIT_POINTER(mvm->fw_id_to_mac_id[sta_id], NULL); clear_bit(sta_id, mvm->sta_drained); if (mvm->tfd_drained[sta_id]) { unsigned long i, msk = mvm->tfd_drained[sta_id]; for_each_set_bit(i, &msk, sizeof(msk) * BITS_PER_BYTE) iwl_mvm_disable_txq(mvm, i, 0); mvm->tfd_drained[sta_id] = 0; IWL_DEBUG_TDLS(mvm, "Drained sta %d, with queues %ld\n", sta_id, msk); } } mutex_unlock(&mvm->mutex); } int iwl_mvm_rm_sta(struct iwl_mvm *mvm, struct ieee80211_vif *vif, struct ieee80211_sta *sta) { struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); struct iwl_mvm_sta *mvm_sta = iwl_mvm_sta_from_mac80211(sta); int ret; lockdep_assert_held(&mvm->mutex); if (vif->type == NL80211_IFTYPE_STATION && mvmvif->ap_sta_id == mvm_sta->sta_id) { ret = iwl_mvm_drain_sta(mvm, mvm_sta, true); if (ret) return ret; /* flush its queues here since we are freeing mvm_sta */ ret = iwl_mvm_flush_tx_path(mvm, mvm_sta->tfd_queue_msk, true); if (ret) return ret; ret = iwl_trans_wait_tx_queue_empty(mvm->trans, mvm_sta->tfd_queue_msk); if (ret) return ret; ret = iwl_mvm_drain_sta(mvm, mvm_sta, false); /* if we are associated - we can't remove the AP STA now */ if (vif->bss_conf.assoc) return ret; /* unassoc - go ahead - remove the AP STA now */ mvmvif->ap_sta_id = IWL_MVM_STATION_COUNT; /* clear d0i3_ap_sta_id if no longer relevant */ if (mvm->d0i3_ap_sta_id == mvm_sta->sta_id) mvm->d0i3_ap_sta_id = IWL_MVM_STATION_COUNT; } /* * This shouldn't happen - the TDLS channel switch should be canceled * before the STA is removed. */ if (WARN_ON_ONCE(mvm->tdls_cs.peer.sta_id == mvm_sta->sta_id)) { mvm->tdls_cs.peer.sta_id = IWL_MVM_STATION_COUNT; cancel_delayed_work(&mvm->tdls_cs.dwork); } /* * Make sure that the tx response code sees the station as -EBUSY and * calls the drain worker. */ spin_lock_bh(&mvm_sta->lock); /* * There are frames pending on the AC queues for this station. * We need to wait until all the frames are drained... */ if (atomic_read(&mvm->pending_frames[mvm_sta->sta_id])) { rcu_assign_pointer(mvm->fw_id_to_mac_id[mvm_sta->sta_id], ERR_PTR(-EBUSY)); spin_unlock_bh(&mvm_sta->lock); /* disable TDLS sta queues on drain complete */ if (sta->tdls) { mvm->tfd_drained[mvm_sta->sta_id] = mvm_sta->tfd_queue_msk; IWL_DEBUG_TDLS(mvm, "Draining TDLS sta %d\n", mvm_sta->sta_id); } ret = iwl_mvm_drain_sta(mvm, mvm_sta, true); } else { spin_unlock_bh(&mvm_sta->lock); if (sta->tdls) iwl_mvm_tdls_sta_deinit(mvm, sta); ret = iwl_mvm_rm_sta_common(mvm, mvm_sta->sta_id); RCU_INIT_POINTER(mvm->fw_id_to_mac_id[mvm_sta->sta_id], NULL); } return ret; } int iwl_mvm_rm_sta_id(struct iwl_mvm *mvm, struct ieee80211_vif *vif, u8 sta_id) { int ret = iwl_mvm_rm_sta_common(mvm, sta_id); lockdep_assert_held(&mvm->mutex); RCU_INIT_POINTER(mvm->fw_id_to_mac_id[sta_id], NULL); return ret; } static int iwl_mvm_allocate_int_sta(struct iwl_mvm *mvm, struct iwl_mvm_int_sta *sta, u32 qmask, enum nl80211_iftype iftype) { if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) { sta->sta_id = iwl_mvm_find_free_sta_id(mvm, iftype); if (WARN_ON_ONCE(sta->sta_id == IWL_MVM_STATION_COUNT)) return -ENOSPC; } sta->tfd_queue_msk = qmask; /* put a non-NULL value so iterating over the stations won't stop */ rcu_assign_pointer(mvm->fw_id_to_mac_id[sta->sta_id], ERR_PTR(-EINVAL)); return 0; } static void iwl_mvm_dealloc_int_sta(struct iwl_mvm *mvm, struct iwl_mvm_int_sta *sta) { RCU_INIT_POINTER(mvm->fw_id_to_mac_id[sta->sta_id], NULL); memset(sta, 0, sizeof(struct iwl_mvm_int_sta)); sta->sta_id = IWL_MVM_STATION_COUNT; } static int iwl_mvm_add_int_sta_common(struct iwl_mvm *mvm, struct iwl_mvm_int_sta *sta, const u8 *addr, u16 mac_id, u16 color) { struct iwl_mvm_add_sta_cmd cmd; int ret; u32 status; lockdep_assert_held(&mvm->mutex); memset(&cmd, 0, sizeof(cmd)); cmd.sta_id = sta->sta_id; cmd.mac_id_n_color = cpu_to_le32(FW_CMD_ID_AND_COLOR(mac_id, color)); cmd.tfd_queue_msk = cpu_to_le32(sta->tfd_queue_msk); if (addr) memcpy(cmd.addr, addr, ETH_ALEN); ret = iwl_mvm_send_cmd_pdu_status(mvm, ADD_STA, sizeof(cmd), &cmd, &status); if (ret) return ret; switch (status) { case ADD_STA_SUCCESS: IWL_DEBUG_INFO(mvm, "Internal station added.\n"); return 0; default: ret = -EIO; IWL_ERR(mvm, "Add internal station failed, status=0x%x\n", status); break; } return ret; } int iwl_mvm_add_aux_sta(struct iwl_mvm *mvm) { unsigned int wdg_timeout = iwlmvm_mod_params.tfd_q_hang_detect ? mvm->cfg->base_params->wd_timeout : IWL_WATCHDOG_DISABLED; int ret; lockdep_assert_held(&mvm->mutex); /* Map Aux queue to fifo - needs to happen before adding Aux station */ iwl_mvm_enable_ac_txq(mvm, mvm->aux_queue, IWL_MVM_TX_FIFO_MCAST, wdg_timeout); /* Allocate aux station and assign to it the aux queue */ ret = iwl_mvm_allocate_int_sta(mvm, &mvm->aux_sta, BIT(mvm->aux_queue), NL80211_IFTYPE_UNSPECIFIED); if (ret) return ret; ret = iwl_mvm_add_int_sta_common(mvm, &mvm->aux_sta, NULL, MAC_INDEX_AUX, 0); if (ret) iwl_mvm_dealloc_int_sta(mvm, &mvm->aux_sta); return ret; } void iwl_mvm_del_aux_sta(struct iwl_mvm *mvm) { lockdep_assert_held(&mvm->mutex); iwl_mvm_dealloc_int_sta(mvm, &mvm->aux_sta); } /* * Send the add station command for the vif's broadcast station. * Assumes that the station was already allocated. * * @mvm: the mvm component * @vif: the interface to which the broadcast station is added * @bsta: the broadcast station to add. */ int iwl_mvm_send_add_bcast_sta(struct iwl_mvm *mvm, struct ieee80211_vif *vif) { struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); struct iwl_mvm_int_sta *bsta = &mvmvif->bcast_sta; static const u8 _baddr[] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}; const u8 *baddr = _baddr; lockdep_assert_held(&mvm->mutex); if (vif->type == NL80211_IFTYPE_ADHOC) baddr = vif->bss_conf.bssid; if (WARN_ON_ONCE(bsta->sta_id == IWL_MVM_STATION_COUNT)) return -ENOSPC; return iwl_mvm_add_int_sta_common(mvm, bsta, baddr, mvmvif->id, mvmvif->color); } /* Send the FW a request to remove the station from it's internal data * structures, but DO NOT remove the entry from the local data structures. */ int iwl_mvm_send_rm_bcast_sta(struct iwl_mvm *mvm, struct ieee80211_vif *vif) { struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); int ret; lockdep_assert_held(&mvm->mutex); ret = iwl_mvm_rm_sta_common(mvm, mvmvif->bcast_sta.sta_id); if (ret) IWL_WARN(mvm, "Failed sending remove station\n"); return ret; } int iwl_mvm_alloc_bcast_sta(struct iwl_mvm *mvm, struct ieee80211_vif *vif) { struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); u32 qmask; lockdep_assert_held(&mvm->mutex); qmask = iwl_mvm_mac_get_queues_mask(vif); /* * The firmware defines the TFD queue mask to only be relevant * for *unicast* queues, so the multicast (CAB) queue shouldn't * be included. */ if (vif->type == NL80211_IFTYPE_AP) qmask &= ~BIT(vif->cab_queue); return iwl_mvm_allocate_int_sta(mvm, &mvmvif->bcast_sta, qmask, ieee80211_vif_type_p2p(vif)); } /* Allocate a new station entry for the broadcast station to the given vif, * and send it to the FW. * Note that each P2P mac should have its own broadcast station. * * @mvm: the mvm component * @vif: the interface to which the broadcast station is added * @bsta: the broadcast station to add. */ int iwl_mvm_add_bcast_sta(struct iwl_mvm *mvm, struct ieee80211_vif *vif) { struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); struct iwl_mvm_int_sta *bsta = &mvmvif->bcast_sta; int ret; lockdep_assert_held(&mvm->mutex); ret = iwl_mvm_alloc_bcast_sta(mvm, vif); if (ret) return ret; ret = iwl_mvm_send_add_bcast_sta(mvm, vif); if (ret) iwl_mvm_dealloc_int_sta(mvm, bsta); return ret; } void iwl_mvm_dealloc_bcast_sta(struct iwl_mvm *mvm, struct ieee80211_vif *vif) { struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); iwl_mvm_dealloc_int_sta(mvm, &mvmvif->bcast_sta); } /* * Send the FW a request to remove the station from it's internal data * structures, and in addition remove it from the local data structure. */ int iwl_mvm_rm_bcast_sta(struct iwl_mvm *mvm, struct ieee80211_vif *vif) { int ret; lockdep_assert_held(&mvm->mutex); ret = iwl_mvm_send_rm_bcast_sta(mvm, vif); iwl_mvm_dealloc_bcast_sta(mvm, vif); return ret; } #define IWL_MAX_RX_BA_SESSIONS 16 int iwl_mvm_sta_rx_agg(struct iwl_mvm *mvm, struct ieee80211_sta *sta, int tid, u16 ssn, bool start) { struct iwl_mvm_sta *mvm_sta = iwl_mvm_sta_from_mac80211(sta); struct iwl_mvm_add_sta_cmd cmd = {}; int ret; u32 status; lockdep_assert_held(&mvm->mutex); if (start && mvm->rx_ba_sessions >= IWL_MAX_RX_BA_SESSIONS) { IWL_WARN(mvm, "Not enough RX BA SESSIONS\n"); return -ENOSPC; } cmd.mac_id_n_color = cpu_to_le32(mvm_sta->mac_id_n_color); cmd.sta_id = mvm_sta->sta_id; cmd.add_modify = STA_MODE_MODIFY; if (start) { cmd.add_immediate_ba_tid = (u8) tid; cmd.add_immediate_ba_ssn = cpu_to_le16(ssn); } else { cmd.remove_immediate_ba_tid = (u8) tid; } cmd.modify_mask = start ? STA_MODIFY_ADD_BA_TID : STA_MODIFY_REMOVE_BA_TID; status = ADD_STA_SUCCESS; ret = iwl_mvm_send_cmd_pdu_status(mvm, ADD_STA, sizeof(cmd), &cmd, &status); if (ret) return ret; switch (status) { case ADD_STA_SUCCESS: IWL_DEBUG_INFO(mvm, "RX BA Session %sed in fw\n", start ? "start" : "stopp"); break; case ADD_STA_IMMEDIATE_BA_FAILURE: IWL_WARN(mvm, "RX BA Session refused by fw\n"); ret = -ENOSPC; break; default: ret = -EIO; IWL_ERR(mvm, "RX BA Session failed %sing, status 0x%x\n", start ? "start" : "stopp", status); break; } if (!ret) { if (start) mvm->rx_ba_sessions++; else if (mvm->rx_ba_sessions > 0) /* check that restart flow didn't zero the counter */ mvm->rx_ba_sessions--; } return ret; } static int iwl_mvm_sta_tx_agg(struct iwl_mvm *mvm, struct ieee80211_sta *sta, int tid, u8 queue, bool start) { struct iwl_mvm_sta *mvm_sta = iwl_mvm_sta_from_mac80211(sta); struct iwl_mvm_add_sta_cmd cmd = {}; int ret; u32 status; lockdep_assert_held(&mvm->mutex); if (start) { mvm_sta->tfd_queue_msk |= BIT(queue); mvm_sta->tid_disable_agg &= ~BIT(tid); } else { mvm_sta->tfd_queue_msk &= ~BIT(queue); mvm_sta->tid_disable_agg |= BIT(tid); } cmd.mac_id_n_color = cpu_to_le32(mvm_sta->mac_id_n_color); cmd.sta_id = mvm_sta->sta_id; cmd.add_modify = STA_MODE_MODIFY; cmd.modify_mask = STA_MODIFY_QUEUES | STA_MODIFY_TID_DISABLE_TX; cmd.tfd_queue_msk = cpu_to_le32(mvm_sta->tfd_queue_msk); cmd.tid_disable_tx = cpu_to_le16(mvm_sta->tid_disable_agg); status = ADD_STA_SUCCESS; ret = iwl_mvm_send_cmd_pdu_status(mvm, ADD_STA, sizeof(cmd), &cmd, &status); if (ret) return ret; switch (status) { case ADD_STA_SUCCESS: break; default: ret = -EIO; IWL_ERR(mvm, "TX BA Session failed %sing, status 0x%x\n", start ? "start" : "stopp", status); break; } return ret; } const u8 tid_to_mac80211_ac[] = { IEEE80211_AC_BE, IEEE80211_AC_BK, IEEE80211_AC_BK, IEEE80211_AC_BE, IEEE80211_AC_VI, IEEE80211_AC_VI, IEEE80211_AC_VO, IEEE80211_AC_VO, }; static const u8 tid_to_ucode_ac[] = { AC_BE, AC_BK, AC_BK, AC_BE, AC_VI, AC_VI, AC_VO, AC_VO, }; int iwl_mvm_sta_tx_agg_start(struct iwl_mvm *mvm, struct ieee80211_vif *vif, struct ieee80211_sta *sta, u16 tid, u16 *ssn) { struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta); struct iwl_mvm_tid_data *tid_data; int txq_id; if (WARN_ON_ONCE(tid >= IWL_MAX_TID_COUNT)) return -EINVAL; if (mvmsta->tid_data[tid].state != IWL_AGG_OFF) { IWL_ERR(mvm, "Start AGG when state is not IWL_AGG_OFF %d!\n", mvmsta->tid_data[tid].state); return -ENXIO; } lockdep_assert_held(&mvm->mutex); for (txq_id = mvm->first_agg_queue; txq_id <= mvm->last_agg_queue; txq_id++) if (mvm->queue_to_mac80211[txq_id] == IWL_INVALID_MAC80211_QUEUE) break; if (txq_id > mvm->last_agg_queue) { IWL_ERR(mvm, "Failed to allocate agg queue\n"); return -EIO; } spin_lock_bh(&mvmsta->lock); /* possible race condition - we entered D0i3 while starting agg */ if (test_bit(IWL_MVM_STATUS_IN_D0I3, &mvm->status)) { spin_unlock_bh(&mvmsta->lock); IWL_ERR(mvm, "Entered D0i3 while starting Tx agg\n"); return -EIO; } /* the new tx queue is still connected to the same mac80211 queue */ mvm->queue_to_mac80211[txq_id] = vif->hw_queue[tid_to_mac80211_ac[tid]]; tid_data = &mvmsta->tid_data[tid]; tid_data->ssn = IEEE80211_SEQ_TO_SN(tid_data->seq_number); tid_data->txq_id = txq_id; *ssn = tid_data->ssn; IWL_DEBUG_TX_QUEUES(mvm, "Start AGG: sta %d tid %d queue %d - ssn = %d, next_recl = %d\n", mvmsta->sta_id, tid, txq_id, tid_data->ssn, tid_data->next_reclaimed); if (tid_data->ssn == tid_data->next_reclaimed) { tid_data->state = IWL_AGG_STARTING; ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid); } else { tid_data->state = IWL_EMPTYING_HW_QUEUE_ADDBA; } spin_unlock_bh(&mvmsta->lock); return 0; } int iwl_mvm_sta_tx_agg_oper(struct iwl_mvm *mvm, struct ieee80211_vif *vif, struct ieee80211_sta *sta, u16 tid, u8 buf_size) { struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta); struct iwl_mvm_tid_data *tid_data = &mvmsta->tid_data[tid]; unsigned int wdg_timeout = iwl_mvm_get_wd_timeout(mvm, vif, sta->tdls, false); int queue, fifo, ret; u16 ssn; BUILD_BUG_ON((sizeof(mvmsta->agg_tids) * BITS_PER_BYTE) != IWL_MAX_TID_COUNT); buf_size = min_t(int, buf_size, LINK_QUAL_AGG_FRAME_LIMIT_DEF); spin_lock_bh(&mvmsta->lock); ssn = tid_data->ssn; queue = tid_data->txq_id; tid_data->state = IWL_AGG_ON; mvmsta->agg_tids |= BIT(tid); tid_data->ssn = 0xffff; spin_unlock_bh(&mvmsta->lock); fifo = iwl_mvm_ac_to_tx_fifo[tid_to_mac80211_ac[tid]]; iwl_mvm_enable_agg_txq(mvm, queue, fifo, mvmsta->sta_id, tid, buf_size, ssn, wdg_timeout); ret = iwl_mvm_sta_tx_agg(mvm, sta, tid, queue, true); if (ret) return -EIO; /* * Even though in theory the peer could have different * aggregation reorder buffer sizes for different sessions, * our ucode doesn't allow for that and has a global limit * for each station. Therefore, use the minimum of all the * aggregation sessions and our default value. */ mvmsta->max_agg_bufsize = min(mvmsta->max_agg_bufsize, buf_size); mvmsta->lq_sta.lq.agg_frame_cnt_limit = mvmsta->max_agg_bufsize; IWL_DEBUG_HT(mvm, "Tx aggregation enabled on ra = %pM tid = %d\n", sta->addr, tid); return iwl_mvm_send_lq_cmd(mvm, &mvmsta->lq_sta.lq, false); } int iwl_mvm_sta_tx_agg_stop(struct iwl_mvm *mvm, struct ieee80211_vif *vif, struct ieee80211_sta *sta, u16 tid) { struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta); struct iwl_mvm_tid_data *tid_data = &mvmsta->tid_data[tid]; u16 txq_id; int err; /* * If mac80211 is cleaning its state, then say that we finished since * our state has been cleared anyway. */ if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) { ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid); return 0; } spin_lock_bh(&mvmsta->lock); txq_id = tid_data->txq_id; IWL_DEBUG_TX_QUEUES(mvm, "Stop AGG: sta %d tid %d q %d state %d\n", mvmsta->sta_id, tid, txq_id, tid_data->state); mvmsta->agg_tids &= ~BIT(tid); switch (tid_data->state) { case IWL_AGG_ON: tid_data->ssn = IEEE80211_SEQ_TO_SN(tid_data->seq_number); IWL_DEBUG_TX_QUEUES(mvm, "ssn = %d, next_recl = %d\n", tid_data->ssn, tid_data->next_reclaimed); /* There are still packets for this RA / TID in the HW */ if (tid_data->ssn != tid_data->next_reclaimed) { tid_data->state = IWL_EMPTYING_HW_QUEUE_DELBA; err = 0; break; } tid_data->ssn = 0xffff; tid_data->state = IWL_AGG_OFF; mvm->queue_to_mac80211[txq_id] = IWL_INVALID_MAC80211_QUEUE; spin_unlock_bh(&mvmsta->lock); ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid); iwl_mvm_sta_tx_agg(mvm, sta, tid, txq_id, false); iwl_mvm_disable_txq(mvm, txq_id, 0); return 0; case IWL_AGG_STARTING: case IWL_EMPTYING_HW_QUEUE_ADDBA: /* * The agg session has been stopped before it was set up. This * can happen when the AddBA timer times out for example. */ /* No barriers since we are under mutex */ lockdep_assert_held(&mvm->mutex); mvm->queue_to_mac80211[txq_id] = IWL_INVALID_MAC80211_QUEUE; ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid); tid_data->state = IWL_AGG_OFF; err = 0; break; default: IWL_ERR(mvm, "Stopping AGG while state not ON or starting for %d on %d (%d)\n", mvmsta->sta_id, tid, tid_data->state); IWL_ERR(mvm, "\ttid_data->txq_id = %d\n", tid_data->txq_id); err = -EINVAL; } spin_unlock_bh(&mvmsta->lock); return err; } int iwl_mvm_sta_tx_agg_flush(struct iwl_mvm *mvm, struct ieee80211_vif *vif, struct ieee80211_sta *sta, u16 tid) { struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta); struct iwl_mvm_tid_data *tid_data = &mvmsta->tid_data[tid]; u16 txq_id; enum iwl_mvm_agg_state old_state; /* * First set the agg state to OFF to avoid calling * ieee80211_stop_tx_ba_cb in iwl_mvm_check_ratid_empty. */ spin_lock_bh(&mvmsta->lock); txq_id = tid_data->txq_id; IWL_DEBUG_TX_QUEUES(mvm, "Flush AGG: sta %d tid %d q %d state %d\n", mvmsta->sta_id, tid, txq_id, tid_data->state); old_state = tid_data->state; tid_data->state = IWL_AGG_OFF; mvmsta->agg_tids &= ~BIT(tid); spin_unlock_bh(&mvmsta->lock); if (old_state >= IWL_AGG_ON) { iwl_mvm_drain_sta(mvm, mvmsta, true); if (iwl_mvm_flush_tx_path(mvm, BIT(txq_id), true)) IWL_ERR(mvm, "Couldn't flush the AGG queue\n"); iwl_trans_wait_tx_queue_empty(mvm->trans, mvmsta->tfd_queue_msk); iwl_mvm_drain_sta(mvm, mvmsta, false); iwl_mvm_sta_tx_agg(mvm, sta, tid, txq_id, false); iwl_mvm_disable_txq(mvm, tid_data->txq_id, 0); } mvm->queue_to_mac80211[tid_data->txq_id] = IWL_INVALID_MAC80211_QUEUE; return 0; } static int iwl_mvm_set_fw_key_idx(struct iwl_mvm *mvm) { int i; lockdep_assert_held(&mvm->mutex); i = find_first_zero_bit(mvm->fw_key_table, STA_KEY_MAX_NUM); if (i == STA_KEY_MAX_NUM) return STA_KEY_IDX_INVALID; __set_bit(i, mvm->fw_key_table); return i; } static u8 iwl_mvm_get_key_sta_id(struct ieee80211_vif *vif, struct ieee80211_sta *sta) { struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); if (sta) { struct iwl_mvm_sta *mvm_sta = iwl_mvm_sta_from_mac80211(sta); return mvm_sta->sta_id; } /* * The device expects GTKs for station interfaces to be * installed as GTKs for the AP station. If we have no * station ID, then use AP's station ID. */ if (vif->type == NL80211_IFTYPE_STATION && mvmvif->ap_sta_id != IWL_MVM_STATION_COUNT) return mvmvif->ap_sta_id; return IWL_MVM_STATION_COUNT; } static int iwl_mvm_send_sta_key(struct iwl_mvm *mvm, struct iwl_mvm_sta *mvm_sta, struct ieee80211_key_conf *keyconf, bool mcast, u32 tkip_iv32, u16 *tkip_p1k, u32 cmd_flags) { struct iwl_mvm_add_sta_key_cmd cmd = {}; __le16 key_flags; int ret; u32 status; u16 keyidx; int i; u8 sta_id = mvm_sta->sta_id; keyidx = (keyconf->keyidx << STA_KEY_FLG_KEYID_POS) & STA_KEY_FLG_KEYID_MSK; key_flags = cpu_to_le16(keyidx); key_flags |= cpu_to_le16(STA_KEY_FLG_WEP_KEY_MAP); switch (keyconf->cipher) { case WLAN_CIPHER_SUITE_TKIP: key_flags |= cpu_to_le16(STA_KEY_FLG_TKIP); cmd.tkip_rx_tsc_byte2 = tkip_iv32; for (i = 0; i < 5; i++) cmd.tkip_rx_ttak[i] = cpu_to_le16(tkip_p1k[i]); memcpy(cmd.key, keyconf->key, keyconf->keylen); break; case WLAN_CIPHER_SUITE_CCMP: key_flags |= cpu_to_le16(STA_KEY_FLG_CCM); memcpy(cmd.key, keyconf->key, keyconf->keylen); break; case WLAN_CIPHER_SUITE_WEP104: key_flags |= cpu_to_le16(STA_KEY_FLG_WEP_13BYTES); /* fall through */ case WLAN_CIPHER_SUITE_WEP40: key_flags |= cpu_to_le16(STA_KEY_FLG_WEP); memcpy(cmd.key + 3, keyconf->key, keyconf->keylen); break; default: key_flags |= cpu_to_le16(STA_KEY_FLG_EXT); memcpy(cmd.key, keyconf->key, keyconf->keylen); } if (mcast) key_flags |= cpu_to_le16(STA_KEY_MULTICAST); cmd.key_offset = keyconf->hw_key_idx; cmd.key_flags = key_flags; cmd.sta_id = sta_id; status = ADD_STA_SUCCESS; if (cmd_flags & CMD_ASYNC) ret = iwl_mvm_send_cmd_pdu(mvm, ADD_STA_KEY, CMD_ASYNC, sizeof(cmd), &cmd); else ret = iwl_mvm_send_cmd_pdu_status(mvm, ADD_STA_KEY, sizeof(cmd), &cmd, &status); switch (status) { case ADD_STA_SUCCESS: IWL_DEBUG_WEP(mvm, "MODIFY_STA: set dynamic key passed\n"); break; default: ret = -EIO; IWL_ERR(mvm, "MODIFY_STA: set dynamic key failed\n"); break; } return ret; } static int iwl_mvm_send_sta_igtk(struct iwl_mvm *mvm, struct ieee80211_key_conf *keyconf, u8 sta_id, bool remove_key) { struct iwl_mvm_mgmt_mcast_key_cmd igtk_cmd = {}; /* verify the key details match the required command's expectations */ if (WARN_ON((keyconf->cipher != WLAN_CIPHER_SUITE_AES_CMAC) || (keyconf->flags & IEEE80211_KEY_FLAG_PAIRWISE) || (keyconf->keyidx != 4 && keyconf->keyidx != 5))) return -EINVAL; igtk_cmd.key_id = cpu_to_le32(keyconf->keyidx); igtk_cmd.sta_id = cpu_to_le32(sta_id); if (remove_key) { igtk_cmd.ctrl_flags |= cpu_to_le32(STA_KEY_NOT_VALID); } else { struct ieee80211_key_seq seq; const u8 *pn; memcpy(igtk_cmd.IGTK, keyconf->key, keyconf->keylen); ieee80211_aes_cmac_calculate_k1_k2(keyconf, igtk_cmd.K1, igtk_cmd.K2); ieee80211_get_key_rx_seq(keyconf, 0, &seq); pn = seq.aes_cmac.pn; igtk_cmd.receive_seq_cnt = cpu_to_le64(((u64) pn[5] << 0) | ((u64) pn[4] << 8) | ((u64) pn[3] << 16) | ((u64) pn[2] << 24) | ((u64) pn[1] << 32) | ((u64) pn[0] << 40)); } IWL_DEBUG_INFO(mvm, "%s igtk for sta %u\n", remove_key ? "removing" : "installing", igtk_cmd.sta_id); return iwl_mvm_send_cmd_pdu(mvm, MGMT_MCAST_KEY, 0, sizeof(igtk_cmd), &igtk_cmd); } static inline u8 *iwl_mvm_get_mac_addr(struct iwl_mvm *mvm, struct ieee80211_vif *vif, struct ieee80211_sta *sta) { struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); if (sta) return sta->addr; if (vif->type == NL80211_IFTYPE_STATION && mvmvif->ap_sta_id != IWL_MVM_STATION_COUNT) { u8 sta_id = mvmvif->ap_sta_id; sta = rcu_dereference_protected(mvm->fw_id_to_mac_id[sta_id], lockdep_is_held(&mvm->mutex)); return sta->addr; } return NULL; } static int __iwl_mvm_set_sta_key(struct iwl_mvm *mvm, struct ieee80211_vif *vif, struct ieee80211_sta *sta, struct ieee80211_key_conf *keyconf, bool mcast) { struct iwl_mvm_sta *mvm_sta = iwl_mvm_sta_from_mac80211(sta); int ret; const u8 *addr; struct ieee80211_key_seq seq; u16 p1k[5]; switch (keyconf->cipher) { case WLAN_CIPHER_SUITE_TKIP: addr = iwl_mvm_get_mac_addr(mvm, vif, sta); /* get phase 1 key from mac80211 */ ieee80211_get_key_rx_seq(keyconf, 0, &seq); ieee80211_get_tkip_rx_p1k(keyconf, addr, seq.tkip.iv32, p1k); ret = iwl_mvm_send_sta_key(mvm, mvm_sta, keyconf, mcast, seq.tkip.iv32, p1k, 0); break; case WLAN_CIPHER_SUITE_CCMP: case WLAN_CIPHER_SUITE_WEP40: case WLAN_CIPHER_SUITE_WEP104: ret = iwl_mvm_send_sta_key(mvm, mvm_sta, keyconf, mcast, 0, NULL, 0); break; default: ret = iwl_mvm_send_sta_key(mvm, mvm_sta, keyconf, mcast, 0, NULL, 0); } return ret; } static int __iwl_mvm_remove_sta_key(struct iwl_mvm *mvm, u8 sta_id, struct ieee80211_key_conf *keyconf, bool mcast) { struct iwl_mvm_add_sta_key_cmd cmd = {}; __le16 key_flags; int ret; u32 status; key_flags = cpu_to_le16((keyconf->keyidx << STA_KEY_FLG_KEYID_POS) & STA_KEY_FLG_KEYID_MSK); key_flags |= cpu_to_le16(STA_KEY_FLG_NO_ENC | STA_KEY_FLG_WEP_KEY_MAP); key_flags |= cpu_to_le16(STA_KEY_NOT_VALID); if (mcast) key_flags |= cpu_to_le16(STA_KEY_MULTICAST); cmd.key_flags = key_flags; cmd.key_offset = keyconf->hw_key_idx; cmd.sta_id = sta_id; status = ADD_STA_SUCCESS; ret = iwl_mvm_send_cmd_pdu_status(mvm, ADD_STA_KEY, sizeof(cmd), &cmd, &status); switch (status) { case ADD_STA_SUCCESS: IWL_DEBUG_WEP(mvm, "MODIFY_STA: remove sta key passed\n"); break; default: ret = -EIO; IWL_ERR(mvm, "MODIFY_STA: remove sta key failed\n"); break; } return ret; } int iwl_mvm_set_sta_key(struct iwl_mvm *mvm, struct ieee80211_vif *vif, struct ieee80211_sta *sta, struct ieee80211_key_conf *keyconf, bool have_key_offset) { bool mcast = !(keyconf->flags & IEEE80211_KEY_FLAG_PAIRWISE); u8 sta_id; int ret; static const u8 __maybe_unused zero_addr[ETH_ALEN] = {0}; lockdep_assert_held(&mvm->mutex); /* Get the station id from the mvm local station table */ sta_id = iwl_mvm_get_key_sta_id(vif, sta); if (sta_id == IWL_MVM_STATION_COUNT) { IWL_ERR(mvm, "Failed to find station id\n"); return -EINVAL; } if (keyconf->cipher == WLAN_CIPHER_SUITE_AES_CMAC) { ret = iwl_mvm_send_sta_igtk(mvm, keyconf, sta_id, false); goto end; } /* * It is possible that the 'sta' parameter is NULL, and thus * there is a need to retrieve the sta from the local station table. */ if (!sta) { sta = rcu_dereference_protected(mvm->fw_id_to_mac_id[sta_id], lockdep_is_held(&mvm->mutex)); if (IS_ERR_OR_NULL(sta)) { IWL_ERR(mvm, "Invalid station id\n"); return -EINVAL; } } if (WARN_ON_ONCE(iwl_mvm_sta_from_mac80211(sta)->vif != vif)) return -EINVAL; if (!have_key_offset) { /* * The D3 firmware hardcodes the PTK offset to 0, so we have to * configure it there. As a result, this workaround exists to * let the caller set the key offset (hw_key_idx), see d3.c. */ keyconf->hw_key_idx = iwl_mvm_set_fw_key_idx(mvm); if (keyconf->hw_key_idx == STA_KEY_IDX_INVALID) return -ENOSPC; } ret = __iwl_mvm_set_sta_key(mvm, vif, sta, keyconf, mcast); if (ret) { __clear_bit(keyconf->hw_key_idx, mvm->fw_key_table); goto end; } /* * For WEP, the same key is used for multicast and unicast. Upload it * again, using the same key offset, and now pointing the other one * to the same key slot (offset). * If this fails, remove the original as well. */ if (keyconf->cipher == WLAN_CIPHER_SUITE_WEP40 || keyconf->cipher == WLAN_CIPHER_SUITE_WEP104) { ret = __iwl_mvm_set_sta_key(mvm, vif, sta, keyconf, !mcast); if (ret) { __clear_bit(keyconf->hw_key_idx, mvm->fw_key_table); __iwl_mvm_remove_sta_key(mvm, sta_id, keyconf, mcast); } } end: IWL_DEBUG_WEP(mvm, "key: cipher=%x len=%d idx=%d sta=%pM ret=%d\n", keyconf->cipher, keyconf->keylen, keyconf->keyidx, sta ? sta->addr : zero_addr, ret); return ret; } int iwl_mvm_remove_sta_key(struct iwl_mvm *mvm, struct ieee80211_vif *vif, struct ieee80211_sta *sta, struct ieee80211_key_conf *keyconf) { bool mcast = !(keyconf->flags & IEEE80211_KEY_FLAG_PAIRWISE); u8 sta_id; int ret; lockdep_assert_held(&mvm->mutex); /* Get the station id from the mvm local station table */ sta_id = iwl_mvm_get_key_sta_id(vif, sta); IWL_DEBUG_WEP(mvm, "mvm remove dynamic key: idx=%d sta=%d\n", keyconf->keyidx, sta_id); if (keyconf->cipher == WLAN_CIPHER_SUITE_AES_CMAC) return iwl_mvm_send_sta_igtk(mvm, keyconf, sta_id, true); if (!__test_and_clear_bit(keyconf->hw_key_idx, mvm->fw_key_table)) { IWL_ERR(mvm, "offset %d not used in fw key table.\n", keyconf->hw_key_idx); return -ENOENT; } if (sta_id == IWL_MVM_STATION_COUNT) { IWL_DEBUG_WEP(mvm, "station non-existent, early return.\n"); return 0; } /* * It is possible that the 'sta' parameter is NULL, and thus * there is a need to retrieve the sta from the local station table, * for example when a GTK is removed (where the sta_id will then be * the AP ID, and no station was passed by mac80211.) */ if (!sta) { sta = rcu_dereference_protected(mvm->fw_id_to_mac_id[sta_id], lockdep_is_held(&mvm->mutex)); if (!sta) { IWL_ERR(mvm, "Invalid station id\n"); return -EINVAL; } } if (WARN_ON_ONCE(iwl_mvm_sta_from_mac80211(sta)->vif != vif)) return -EINVAL; ret = __iwl_mvm_remove_sta_key(mvm, sta_id, keyconf, mcast); if (ret) return ret; /* delete WEP key twice to get rid of (now useless) offset */ if (keyconf->cipher == WLAN_CIPHER_SUITE_WEP40 || keyconf->cipher == WLAN_CIPHER_SUITE_WEP104) ret = __iwl_mvm_remove_sta_key(mvm, sta_id, keyconf, !mcast); return ret; } void iwl_mvm_update_tkip_key(struct iwl_mvm *mvm, struct ieee80211_vif *vif, struct ieee80211_key_conf *keyconf, struct ieee80211_sta *sta, u32 iv32, u16 *phase1key) { struct iwl_mvm_sta *mvm_sta; u8 sta_id = iwl_mvm_get_key_sta_id(vif, sta); bool mcast = !(keyconf->flags & IEEE80211_KEY_FLAG_PAIRWISE); if (WARN_ON_ONCE(sta_id == IWL_MVM_STATION_COUNT)) return; rcu_read_lock(); if (!sta) { sta = rcu_dereference(mvm->fw_id_to_mac_id[sta_id]); if (WARN_ON(IS_ERR_OR_NULL(sta))) { rcu_read_unlock(); return; } } mvm_sta = iwl_mvm_sta_from_mac80211(sta); iwl_mvm_send_sta_key(mvm, mvm_sta, keyconf, mcast, iv32, phase1key, CMD_ASYNC); rcu_read_unlock(); } void iwl_mvm_sta_modify_ps_wake(struct iwl_mvm *mvm, struct ieee80211_sta *sta) { struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta); struct iwl_mvm_add_sta_cmd cmd = { .add_modify = STA_MODE_MODIFY, .sta_id = mvmsta->sta_id, .station_flags_msk = cpu_to_le32(STA_FLG_PS), .mac_id_n_color = cpu_to_le32(mvmsta->mac_id_n_color), }; int ret; ret = iwl_mvm_send_cmd_pdu(mvm, ADD_STA, CMD_ASYNC, sizeof(cmd), &cmd); if (ret) IWL_ERR(mvm, "Failed to send ADD_STA command (%d)\n", ret); } void iwl_mvm_sta_modify_sleep_tx_count(struct iwl_mvm *mvm, struct ieee80211_sta *sta, enum ieee80211_frame_release_type reason, u16 cnt, u16 tids, bool more_data, bool agg) { struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta); struct iwl_mvm_add_sta_cmd cmd = { .add_modify = STA_MODE_MODIFY, .sta_id = mvmsta->sta_id, .modify_mask = STA_MODIFY_SLEEPING_STA_TX_COUNT, .sleep_tx_count = cpu_to_le16(cnt), .mac_id_n_color = cpu_to_le32(mvmsta->mac_id_n_color), }; int tid, ret; unsigned long _tids = tids; /* convert TIDs to ACs - we don't support TSPEC so that's OK * Note that this field is reserved and unused by firmware not * supporting GO uAPSD, so it's safe to always do this. */ for_each_set_bit(tid, &_tids, IWL_MAX_TID_COUNT) cmd.awake_acs |= BIT(tid_to_ucode_ac[tid]); /* If we're releasing frames from aggregation queues then check if the * all queues combined that we're releasing frames from have * - more frames than the service period, in which case more_data * needs to be set * - fewer than 'cnt' frames, in which case we need to adjust the * firmware command (but do that unconditionally) */ if (agg) { int remaining = cnt; spin_lock_bh(&mvmsta->lock); for_each_set_bit(tid, &_tids, IWL_MAX_TID_COUNT) { struct iwl_mvm_tid_data *tid_data; u16 n_queued; tid_data = &mvmsta->tid_data[tid]; if (WARN(tid_data->state != IWL_AGG_ON && tid_data->state != IWL_EMPTYING_HW_QUEUE_DELBA, "TID %d state is %d\n", tid, tid_data->state)) { spin_unlock_bh(&mvmsta->lock); ieee80211_sta_eosp(sta); return; } n_queued = iwl_mvm_tid_queued(tid_data); if (n_queued > remaining) { more_data = true; remaining = 0; break; } remaining -= n_queued; } spin_unlock_bh(&mvmsta->lock); cmd.sleep_tx_count = cpu_to_le16(cnt - remaining); if (WARN_ON(cnt - remaining == 0)) { ieee80211_sta_eosp(sta); return; } } /* Note: this is ignored by firmware not supporting GO uAPSD */ if (more_data) cmd.sleep_state_flags |= cpu_to_le16(STA_SLEEP_STATE_MOREDATA); if (reason == IEEE80211_FRAME_RELEASE_PSPOLL) { mvmsta->next_status_eosp = true; cmd.sleep_state_flags |= cpu_to_le16(STA_SLEEP_STATE_PS_POLL); } else { cmd.sleep_state_flags |= cpu_to_le16(STA_SLEEP_STATE_UAPSD); } ret = iwl_mvm_send_cmd_pdu(mvm, ADD_STA, CMD_ASYNC, sizeof(cmd), &cmd); if (ret) IWL_ERR(mvm, "Failed to send ADD_STA command (%d)\n", ret); } int iwl_mvm_rx_eosp_notif(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb, struct iwl_device_cmd *cmd) { struct iwl_rx_packet *pkt = rxb_addr(rxb); struct iwl_mvm_eosp_notification *notif = (void *)pkt->data; struct ieee80211_sta *sta; u32 sta_id = le32_to_cpu(notif->sta_id); if (WARN_ON_ONCE(sta_id >= IWL_MVM_STATION_COUNT)) return 0; rcu_read_lock(); sta = rcu_dereference(mvm->fw_id_to_mac_id[sta_id]); if (!IS_ERR_OR_NULL(sta)) ieee80211_sta_eosp(sta); rcu_read_unlock(); return 0; } void iwl_mvm_sta_modify_disable_tx(struct iwl_mvm *mvm, struct iwl_mvm_sta *mvmsta, bool disable) { struct iwl_mvm_add_sta_cmd cmd = { .add_modify = STA_MODE_MODIFY, .sta_id = mvmsta->sta_id, .station_flags = disable ? cpu_to_le32(STA_FLG_DISABLE_TX) : 0, .station_flags_msk = cpu_to_le32(STA_FLG_DISABLE_TX), .mac_id_n_color = cpu_to_le32(mvmsta->mac_id_n_color), }; int ret; ret = iwl_mvm_send_cmd_pdu(mvm, ADD_STA, CMD_ASYNC, sizeof(cmd), &cmd); if (ret) IWL_ERR(mvm, "Failed to send ADD_STA command (%d)\n", ret); } void iwl_mvm_sta_modify_disable_tx_ap(struct iwl_mvm *mvm, struct ieee80211_sta *sta, bool disable) { struct iwl_mvm_sta *mvm_sta = iwl_mvm_sta_from_mac80211(sta); spin_lock_bh(&mvm_sta->lock); if (mvm_sta->disable_tx == disable) { spin_unlock_bh(&mvm_sta->lock); return; } mvm_sta->disable_tx = disable; /* * Tell mac80211 to start/stop queuing tx for this station, * but don't stop queuing if there are still pending frames * for this station. */ if (disable || !atomic_read(&mvm->pending_frames[mvm_sta->sta_id])) ieee80211_sta_block_awake(mvm->hw, sta, disable); iwl_mvm_sta_modify_disable_tx(mvm, mvm_sta, disable); spin_unlock_bh(&mvm_sta->lock); } void iwl_mvm_modify_all_sta_disable_tx(struct iwl_mvm *mvm, struct iwl_mvm_vif *mvmvif, bool disable) { struct ieee80211_sta *sta; struct iwl_mvm_sta *mvm_sta; int i; lockdep_assert_held(&mvm->mutex); /* Block/unblock all the stations of the given mvmvif */ for (i = 0; i < IWL_MVM_STATION_COUNT; i++) { sta = rcu_dereference_protected(mvm->fw_id_to_mac_id[i], lockdep_is_held(&mvm->mutex)); if (IS_ERR_OR_NULL(sta)) continue; mvm_sta = iwl_mvm_sta_from_mac80211(sta); if (mvm_sta->mac_id_n_color != FW_CMD_ID_AND_COLOR(mvmvif->id, mvmvif->color)) continue; iwl_mvm_sta_modify_disable_tx_ap(mvm, sta, disable); } } void iwl_mvm_csa_client_absent(struct iwl_mvm *mvm, struct ieee80211_vif *vif) { struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); struct iwl_mvm_sta *mvmsta; rcu_read_lock(); mvmsta = iwl_mvm_sta_from_staid_rcu(mvm, mvmvif->ap_sta_id); if (!WARN_ON(!mvmsta)) iwl_mvm_sta_modify_disable_tx(mvm, mvmsta, true); rcu_read_unlock(); }
gpl-2.0
kipill-nn/kernel-touch2
drivers/rtc/rtc-m48t59.c
659
14964
/* * ST M48T59 RTC driver * * Copyright (c) 2007 Wind River Systems, Inc. * * Author: Mark Zhan <rongkai.zhan@windriver.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ #include <linux/kernel.h> #include <linux/module.h> #include <linux/init.h> #include <linux/io.h> #include <linux/device.h> #include <linux/platform_device.h> #include <linux/rtc.h> #include <linux/rtc/m48t59.h> #include <linux/bcd.h> #ifndef NO_IRQ #define NO_IRQ (-1) #endif #define M48T59_READ(reg) (pdata->read_byte(dev, pdata->offset + reg)) #define M48T59_WRITE(val, reg) \ (pdata->write_byte(dev, pdata->offset + reg, val)) #define M48T59_SET_BITS(mask, reg) \ M48T59_WRITE((M48T59_READ(reg) | (mask)), (reg)) #define M48T59_CLEAR_BITS(mask, reg) \ M48T59_WRITE((M48T59_READ(reg) & ~(mask)), (reg)) struct m48t59_private { void __iomem *ioaddr; int irq; struct rtc_device *rtc; spinlock_t lock; /* serialize the NVRAM and RTC access */ }; /* * This is the generic access method when the chip is memory-mapped */ static void m48t59_mem_writeb(struct device *dev, u32 ofs, u8 val) { struct platform_device *pdev = to_platform_device(dev); struct m48t59_private *m48t59 = platform_get_drvdata(pdev); writeb(val, m48t59->ioaddr+ofs); } static u8 m48t59_mem_readb(struct device *dev, u32 ofs) { struct platform_device *pdev = to_platform_device(dev); struct m48t59_private *m48t59 = platform_get_drvdata(pdev); return readb(m48t59->ioaddr+ofs); } /* * NOTE: M48T59 only uses BCD mode */ static int m48t59_rtc_read_time(struct device *dev, struct rtc_time *tm) { struct platform_device *pdev = to_platform_device(dev); struct m48t59_plat_data *pdata = pdev->dev.platform_data; struct m48t59_private *m48t59 = platform_get_drvdata(pdev); unsigned long flags; u8 val; spin_lock_irqsave(&m48t59->lock, flags); /* Issue the READ command */ M48T59_SET_BITS(M48T59_CNTL_READ, M48T59_CNTL); tm->tm_year = bcd2bin(M48T59_READ(M48T59_YEAR)); /* tm_mon is 0-11 */ tm->tm_mon = bcd2bin(M48T59_READ(M48T59_MONTH)) - 1; tm->tm_mday = bcd2bin(M48T59_READ(M48T59_MDAY)); val = M48T59_READ(M48T59_WDAY); if ((pdata->type == M48T59RTC_TYPE_M48T59) && (val & M48T59_WDAY_CEB) && (val & M48T59_WDAY_CB)) { dev_dbg(dev, "Century bit is enabled\n"); tm->tm_year += 100; /* one century */ } #ifdef CONFIG_SPARC /* Sun SPARC machines count years since 1968 */ tm->tm_year += 68; #endif tm->tm_wday = bcd2bin(val & 0x07); tm->tm_hour = bcd2bin(M48T59_READ(M48T59_HOUR) & 0x3F); tm->tm_min = bcd2bin(M48T59_READ(M48T59_MIN) & 0x7F); tm->tm_sec = bcd2bin(M48T59_READ(M48T59_SEC) & 0x7F); /* Clear the READ bit */ M48T59_CLEAR_BITS(M48T59_CNTL_READ, M48T59_CNTL); spin_unlock_irqrestore(&m48t59->lock, flags); dev_dbg(dev, "RTC read time %04d-%02d-%02d %02d/%02d/%02d\n", tm->tm_year + 1900, tm->tm_mon, tm->tm_mday, tm->tm_hour, tm->tm_min, tm->tm_sec); return 0; } static int m48t59_rtc_set_time(struct device *dev, struct rtc_time *tm) { struct platform_device *pdev = to_platform_device(dev); struct m48t59_plat_data *pdata = pdev->dev.platform_data; struct m48t59_private *m48t59 = platform_get_drvdata(pdev); unsigned long flags; u8 val = 0; int year = tm->tm_year; #ifdef CONFIG_SPARC /* Sun SPARC machines count years since 1968 */ year -= 68; #endif dev_dbg(dev, "RTC set time %04d-%02d-%02d %02d/%02d/%02d\n", year + 1900, tm->tm_mon, tm->tm_mday, tm->tm_hour, tm->tm_min, tm->tm_sec); if (year < 0) return -EINVAL; spin_lock_irqsave(&m48t59->lock, flags); /* Issue the WRITE command */ M48T59_SET_BITS(M48T59_CNTL_WRITE, M48T59_CNTL); M48T59_WRITE((bin2bcd(tm->tm_sec) & 0x7F), M48T59_SEC); M48T59_WRITE((bin2bcd(tm->tm_min) & 0x7F), M48T59_MIN); M48T59_WRITE((bin2bcd(tm->tm_hour) & 0x3F), M48T59_HOUR); M48T59_WRITE((bin2bcd(tm->tm_mday) & 0x3F), M48T59_MDAY); /* tm_mon is 0-11 */ M48T59_WRITE((bin2bcd(tm->tm_mon + 1) & 0x1F), M48T59_MONTH); M48T59_WRITE(bin2bcd(year % 100), M48T59_YEAR); if (pdata->type == M48T59RTC_TYPE_M48T59 && (year / 100)) val = (M48T59_WDAY_CEB | M48T59_WDAY_CB); val |= (bin2bcd(tm->tm_wday) & 0x07); M48T59_WRITE(val, M48T59_WDAY); /* Clear the WRITE bit */ M48T59_CLEAR_BITS(M48T59_CNTL_WRITE, M48T59_CNTL); spin_unlock_irqrestore(&m48t59->lock, flags); return 0; } /* * Read alarm time and date in RTC */ static int m48t59_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm) { struct platform_device *pdev = to_platform_device(dev); struct m48t59_plat_data *pdata = pdev->dev.platform_data; struct m48t59_private *m48t59 = platform_get_drvdata(pdev); struct rtc_time *tm = &alrm->time; unsigned long flags; u8 val; /* If no irq, we don't support ALARM */ if (m48t59->irq == NO_IRQ) return -EIO; spin_lock_irqsave(&m48t59->lock, flags); /* Issue the READ command */ M48T59_SET_BITS(M48T59_CNTL_READ, M48T59_CNTL); tm->tm_year = bcd2bin(M48T59_READ(M48T59_YEAR)); #ifdef CONFIG_SPARC /* Sun SPARC machines count years since 1968 */ tm->tm_year += 68; #endif /* tm_mon is 0-11 */ tm->tm_mon = bcd2bin(M48T59_READ(M48T59_MONTH)) - 1; val = M48T59_READ(M48T59_WDAY); if ((val & M48T59_WDAY_CEB) && (val & M48T59_WDAY_CB)) tm->tm_year += 100; /* one century */ tm->tm_mday = bcd2bin(M48T59_READ(M48T59_ALARM_DATE)); tm->tm_hour = bcd2bin(M48T59_READ(M48T59_ALARM_HOUR)); tm->tm_min = bcd2bin(M48T59_READ(M48T59_ALARM_MIN)); tm->tm_sec = bcd2bin(M48T59_READ(M48T59_ALARM_SEC)); /* Clear the READ bit */ M48T59_CLEAR_BITS(M48T59_CNTL_READ, M48T59_CNTL); spin_unlock_irqrestore(&m48t59->lock, flags); dev_dbg(dev, "RTC read alarm time %04d-%02d-%02d %02d/%02d/%02d\n", tm->tm_year + 1900, tm->tm_mon, tm->tm_mday, tm->tm_hour, tm->tm_min, tm->tm_sec); return 0; } /* * Set alarm time and date in RTC */ static int m48t59_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) { struct platform_device *pdev = to_platform_device(dev); struct m48t59_plat_data *pdata = pdev->dev.platform_data; struct m48t59_private *m48t59 = platform_get_drvdata(pdev); struct rtc_time *tm = &alrm->time; u8 mday, hour, min, sec; unsigned long flags; int year = tm->tm_year; #ifdef CONFIG_SPARC /* Sun SPARC machines count years since 1968 */ year -= 68; #endif /* If no irq, we don't support ALARM */ if (m48t59->irq == NO_IRQ) return -EIO; if (year < 0) return -EINVAL; /* * 0xff means "always match" */ mday = tm->tm_mday; mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff; if (mday == 0xff) mday = M48T59_READ(M48T59_MDAY); hour = tm->tm_hour; hour = (hour < 24) ? bin2bcd(hour) : 0x00; min = tm->tm_min; min = (min < 60) ? bin2bcd(min) : 0x00; sec = tm->tm_sec; sec = (sec < 60) ? bin2bcd(sec) : 0x00; spin_lock_irqsave(&m48t59->lock, flags); /* Issue the WRITE command */ M48T59_SET_BITS(M48T59_CNTL_WRITE, M48T59_CNTL); M48T59_WRITE(mday, M48T59_ALARM_DATE); M48T59_WRITE(hour, M48T59_ALARM_HOUR); M48T59_WRITE(min, M48T59_ALARM_MIN); M48T59_WRITE(sec, M48T59_ALARM_SEC); /* Clear the WRITE bit */ M48T59_CLEAR_BITS(M48T59_CNTL_WRITE, M48T59_CNTL); spin_unlock_irqrestore(&m48t59->lock, flags); dev_dbg(dev, "RTC set alarm time %04d-%02d-%02d %02d/%02d/%02d\n", year + 1900, tm->tm_mon, tm->tm_mday, tm->tm_hour, tm->tm_min, tm->tm_sec); return 0; } /* * Handle commands from user-space */ static int m48t59_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) { struct platform_device *pdev = to_platform_device(dev); struct m48t59_plat_data *pdata = pdev->dev.platform_data; struct m48t59_private *m48t59 = platform_get_drvdata(pdev); unsigned long flags; int ret = 0; spin_lock_irqsave(&m48t59->lock, flags); switch (cmd) { case RTC_AIE_OFF: /* alarm interrupt off */ M48T59_WRITE(0x00, M48T59_INTR); break; case RTC_AIE_ON: /* alarm interrupt on */ M48T59_WRITE(M48T59_INTR_AFE, M48T59_INTR); break; default: ret = -ENOIOCTLCMD; break; } spin_unlock_irqrestore(&m48t59->lock, flags); return ret; } static int m48t59_rtc_proc(struct device *dev, struct seq_file *seq) { struct platform_device *pdev = to_platform_device(dev); struct m48t59_plat_data *pdata = pdev->dev.platform_data; struct m48t59_private *m48t59 = platform_get_drvdata(pdev); unsigned long flags; u8 val; spin_lock_irqsave(&m48t59->lock, flags); val = M48T59_READ(M48T59_FLAGS); spin_unlock_irqrestore(&m48t59->lock, flags); seq_printf(seq, "battery\t\t: %s\n", (val & M48T59_FLAGS_BF) ? "low" : "normal"); return 0; } /* * IRQ handler for the RTC */ static irqreturn_t m48t59_rtc_interrupt(int irq, void *dev_id) { struct device *dev = (struct device *)dev_id; struct platform_device *pdev = to_platform_device(dev); struct m48t59_plat_data *pdata = pdev->dev.platform_data; struct m48t59_private *m48t59 = platform_get_drvdata(pdev); u8 event; spin_lock(&m48t59->lock); event = M48T59_READ(M48T59_FLAGS); spin_unlock(&m48t59->lock); if (event & M48T59_FLAGS_AF) { rtc_update_irq(m48t59->rtc, 1, (RTC_AF | RTC_IRQF)); return IRQ_HANDLED; } return IRQ_NONE; } static const struct rtc_class_ops m48t59_rtc_ops = { .ioctl = m48t59_rtc_ioctl, .read_time = m48t59_rtc_read_time, .set_time = m48t59_rtc_set_time, .read_alarm = m48t59_rtc_readalarm, .set_alarm = m48t59_rtc_setalarm, .proc = m48t59_rtc_proc, }; static const struct rtc_class_ops m48t02_rtc_ops = { .read_time = m48t59_rtc_read_time, .set_time = m48t59_rtc_set_time, }; static ssize_t m48t59_nvram_read(struct kobject *kobj, struct bin_attribute *bin_attr, char *buf, loff_t pos, size_t size) { struct device *dev = container_of(kobj, struct device, kobj); struct platform_device *pdev = to_platform_device(dev); struct m48t59_plat_data *pdata = pdev->dev.platform_data; struct m48t59_private *m48t59 = platform_get_drvdata(pdev); ssize_t cnt = 0; unsigned long flags; for (; size > 0 && pos < pdata->offset; cnt++, size--) { spin_lock_irqsave(&m48t59->lock, flags); *buf++ = M48T59_READ(cnt); spin_unlock_irqrestore(&m48t59->lock, flags); } return cnt; } static ssize_t m48t59_nvram_write(struct kobject *kobj, struct bin_attribute *bin_attr, char *buf, loff_t pos, size_t size) { struct device *dev = container_of(kobj, struct device, kobj); struct platform_device *pdev = to_platform_device(dev); struct m48t59_plat_data *pdata = pdev->dev.platform_data; struct m48t59_private *m48t59 = platform_get_drvdata(pdev); ssize_t cnt = 0; unsigned long flags; for (; size > 0 && pos < pdata->offset; cnt++, size--) { spin_lock_irqsave(&m48t59->lock, flags); M48T59_WRITE(*buf++, cnt); spin_unlock_irqrestore(&m48t59->lock, flags); } return cnt; } static struct bin_attribute m48t59_nvram_attr = { .attr = { .name = "nvram", .mode = S_IRUGO | S_IWUSR, }, .read = m48t59_nvram_read, .write = m48t59_nvram_write, }; static int __devinit m48t59_rtc_probe(struct platform_device *pdev) { struct m48t59_plat_data *pdata = pdev->dev.platform_data; struct m48t59_private *m48t59 = NULL; struct resource *res; int ret = -ENOMEM; char *name; const struct rtc_class_ops *ops; /* This chip could be memory-mapped or I/O-mapped */ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) { res = platform_get_resource(pdev, IORESOURCE_IO, 0); if (!res) return -EINVAL; } if (res->flags & IORESOURCE_IO) { /* If we are I/O-mapped, the platform should provide * the operations accessing chip registers. */ if (!pdata || !pdata->write_byte || !pdata->read_byte) return -EINVAL; } else if (res->flags & IORESOURCE_MEM) { /* we are memory-mapped */ if (!pdata) { pdata = kzalloc(sizeof(*pdata), GFP_KERNEL); if (!pdata) return -ENOMEM; /* Ensure we only kmalloc platform data once */ pdev->dev.platform_data = pdata; } if (!pdata->type) pdata->type = M48T59RTC_TYPE_M48T59; /* Try to use the generic memory read/write ops */ if (!pdata->write_byte) pdata->write_byte = m48t59_mem_writeb; if (!pdata->read_byte) pdata->read_byte = m48t59_mem_readb; } m48t59 = kzalloc(sizeof(*m48t59), GFP_KERNEL); if (!m48t59) return -ENOMEM; m48t59->ioaddr = pdata->ioaddr; if (!m48t59->ioaddr) { /* ioaddr not mapped externally */ m48t59->ioaddr = ioremap(res->start, res->end - res->start + 1); if (!m48t59->ioaddr) goto out; } /* Try to get irq number. We also can work in * the mode without IRQ. */ m48t59->irq = platform_get_irq(pdev, 0); if (m48t59->irq <= 0) m48t59->irq = NO_IRQ; if (m48t59->irq != NO_IRQ) { ret = request_irq(m48t59->irq, m48t59_rtc_interrupt, IRQF_SHARED, "rtc-m48t59", &pdev->dev); if (ret) goto out; } switch (pdata->type) { case M48T59RTC_TYPE_M48T59: name = "m48t59"; ops = &m48t59_rtc_ops; pdata->offset = 0x1ff0; break; case M48T59RTC_TYPE_M48T02: name = "m48t02"; ops = &m48t02_rtc_ops; pdata->offset = 0x7f0; break; case M48T59RTC_TYPE_M48T08: name = "m48t08"; ops = &m48t02_rtc_ops; pdata->offset = 0x1ff0; break; default: dev_err(&pdev->dev, "Unknown RTC type\n"); ret = -ENODEV; goto out; } m48t59->rtc = rtc_device_register(name, &pdev->dev, ops, THIS_MODULE); if (IS_ERR(m48t59->rtc)) { ret = PTR_ERR(m48t59->rtc); goto out; } m48t59_nvram_attr.size = pdata->offset; ret = sysfs_create_bin_file(&pdev->dev.kobj, &m48t59_nvram_attr); if (ret) goto out; spin_lock_init(&m48t59->lock); platform_set_drvdata(pdev, m48t59); return 0; out: if (!IS_ERR(m48t59->rtc)) rtc_device_unregister(m48t59->rtc); if (m48t59->irq != NO_IRQ) free_irq(m48t59->irq, &pdev->dev); if (m48t59->ioaddr) iounmap(m48t59->ioaddr); if (m48t59) kfree(m48t59); return ret; } static int __devexit m48t59_rtc_remove(struct platform_device *pdev) { struct m48t59_private *m48t59 = platform_get_drvdata(pdev); struct m48t59_plat_data *pdata = pdev->dev.platform_data; sysfs_remove_bin_file(&pdev->dev.kobj, &m48t59_nvram_attr); if (!IS_ERR(m48t59->rtc)) rtc_device_unregister(m48t59->rtc); if (m48t59->ioaddr && !pdata->ioaddr) iounmap(m48t59->ioaddr); if (m48t59->irq != NO_IRQ) free_irq(m48t59->irq, &pdev->dev); platform_set_drvdata(pdev, NULL); kfree(m48t59); return 0; } /* work with hotplug and coldplug */ MODULE_ALIAS("platform:rtc-m48t59"); static struct platform_driver m48t59_rtc_driver = { .driver = { .name = "rtc-m48t59", .owner = THIS_MODULE, }, .probe = m48t59_rtc_probe, .remove = __devexit_p(m48t59_rtc_remove), }; static int __init m48t59_rtc_init(void) { return platform_driver_register(&m48t59_rtc_driver); } static void __exit m48t59_rtc_exit(void) { platform_driver_unregister(&m48t59_rtc_driver); } module_init(m48t59_rtc_init); module_exit(m48t59_rtc_exit); MODULE_AUTHOR("Mark Zhan <rongkai.zhan@windriver.com>"); MODULE_DESCRIPTION("M48T59/M48T02/M48T08 RTC driver"); MODULE_LICENSE("GPL");
gpl-2.0
CyanogenMod/android_kernel_asus_tf300t
drivers/input/serio/sa1111ps2.c
659
7834
/* * linux/drivers/input/serio/sa1111ps2.c * * Copyright (C) 2002 Russell King * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License. */ #include <linux/module.h> #include <linux/init.h> #include <linux/input.h> #include <linux/serio.h> #include <linux/errno.h> #include <linux/interrupt.h> #include <linux/ioport.h> #include <linux/delay.h> #include <linux/device.h> #include <linux/slab.h> #include <linux/spinlock.h> #include <asm/io.h> #include <asm/system.h> #include <asm/hardware/sa1111.h> struct ps2if { struct serio *io; struct sa1111_dev *dev; void __iomem *base; unsigned int open; spinlock_t lock; unsigned int head; unsigned int tail; unsigned char buf[4]; }; /* * Read all bytes waiting in the PS2 port. There should be * at the most one, but we loop for safety. If there was a * framing error, we have to manually clear the status. */ static irqreturn_t ps2_rxint(int irq, void *dev_id) { struct ps2if *ps2if = dev_id; unsigned int scancode, flag, status; status = sa1111_readl(ps2if->base + SA1111_PS2STAT); while (status & PS2STAT_RXF) { if (status & PS2STAT_STP) sa1111_writel(PS2STAT_STP, ps2if->base + SA1111_PS2STAT); flag = (status & PS2STAT_STP ? SERIO_FRAME : 0) | (status & PS2STAT_RXP ? 0 : SERIO_PARITY); scancode = sa1111_readl(ps2if->base + SA1111_PS2DATA) & 0xff; if (hweight8(scancode) & 1) flag ^= SERIO_PARITY; serio_interrupt(ps2if->io, scancode, flag); status = sa1111_readl(ps2if->base + SA1111_PS2STAT); } return IRQ_HANDLED; } /* * Completion of ps2 write */ static irqreturn_t ps2_txint(int irq, void *dev_id) { struct ps2if *ps2if = dev_id; unsigned int status; spin_lock(&ps2if->lock); status = sa1111_readl(ps2if->base + SA1111_PS2STAT); if (ps2if->head == ps2if->tail) { disable_irq_nosync(irq); /* done */ } else if (status & PS2STAT_TXE) { sa1111_writel(ps2if->buf[ps2if->tail], ps2if->base + SA1111_PS2DATA); ps2if->tail = (ps2if->tail + 1) & (sizeof(ps2if->buf) - 1); } spin_unlock(&ps2if->lock); return IRQ_HANDLED; } /* * Write a byte to the PS2 port. We have to wait for the * port to indicate that the transmitter is empty. */ static int ps2_write(struct serio *io, unsigned char val) { struct ps2if *ps2if = io->port_data; unsigned long flags; unsigned int head; spin_lock_irqsave(&ps2if->lock, flags); /* * If the TX register is empty, we can go straight out. */ if (sa1111_readl(ps2if->base + SA1111_PS2STAT) & PS2STAT_TXE) { sa1111_writel(val, ps2if->base + SA1111_PS2DATA); } else { if (ps2if->head == ps2if->tail) enable_irq(ps2if->dev->irq[1]); head = (ps2if->head + 1) & (sizeof(ps2if->buf) - 1); if (head != ps2if->tail) { ps2if->buf[ps2if->head] = val; ps2if->head = head; } } spin_unlock_irqrestore(&ps2if->lock, flags); return 0; } static int ps2_open(struct serio *io) { struct ps2if *ps2if = io->port_data; int ret; sa1111_enable_device(ps2if->dev); ret = request_irq(ps2if->dev->irq[0], ps2_rxint, 0, SA1111_DRIVER_NAME(ps2if->dev), ps2if); if (ret) { printk(KERN_ERR "sa1111ps2: could not allocate IRQ%d: %d\n", ps2if->dev->irq[0], ret); return ret; } ret = request_irq(ps2if->dev->irq[1], ps2_txint, 0, SA1111_DRIVER_NAME(ps2if->dev), ps2if); if (ret) { printk(KERN_ERR "sa1111ps2: could not allocate IRQ%d: %d\n", ps2if->dev->irq[1], ret); free_irq(ps2if->dev->irq[0], ps2if); return ret; } ps2if->open = 1; enable_irq_wake(ps2if->dev->irq[0]); sa1111_writel(PS2CR_ENA, ps2if->base + SA1111_PS2CR); return 0; } static void ps2_close(struct serio *io) { struct ps2if *ps2if = io->port_data; sa1111_writel(0, ps2if->base + SA1111_PS2CR); disable_irq_wake(ps2if->dev->irq[0]); ps2if->open = 0; free_irq(ps2if->dev->irq[1], ps2if); free_irq(ps2if->dev->irq[0], ps2if); sa1111_disable_device(ps2if->dev); } /* * Clear the input buffer. */ static void __devinit ps2_clear_input(struct ps2if *ps2if) { int maxread = 100; while (maxread--) { if ((sa1111_readl(ps2if->base + SA1111_PS2DATA) & 0xff) == 0xff) break; } } static unsigned int __devinit ps2_test_one(struct ps2if *ps2if, unsigned int mask) { unsigned int val; sa1111_writel(PS2CR_ENA | mask, ps2if->base + SA1111_PS2CR); udelay(2); val = sa1111_readl(ps2if->base + SA1111_PS2STAT); return val & (PS2STAT_KBC | PS2STAT_KBD); } /* * Test the keyboard interface. We basically check to make sure that * we can drive each line to the keyboard independently of each other. */ static int __devinit ps2_test(struct ps2if *ps2if) { unsigned int stat; int ret = 0; stat = ps2_test_one(ps2if, PS2CR_FKC); if (stat != PS2STAT_KBD) { printk("PS/2 interface test failed[1]: %02x\n", stat); ret = -ENODEV; } stat = ps2_test_one(ps2if, 0); if (stat != (PS2STAT_KBC | PS2STAT_KBD)) { printk("PS/2 interface test failed[2]: %02x\n", stat); ret = -ENODEV; } stat = ps2_test_one(ps2if, PS2CR_FKD); if (stat != PS2STAT_KBC) { printk("PS/2 interface test failed[3]: %02x\n", stat); ret = -ENODEV; } sa1111_writel(0, ps2if->base + SA1111_PS2CR); return ret; } /* * Add one device to this driver. */ static int __devinit ps2_probe(struct sa1111_dev *dev) { struct ps2if *ps2if; struct serio *serio; int ret; ps2if = kzalloc(sizeof(struct ps2if), GFP_KERNEL); serio = kzalloc(sizeof(struct serio), GFP_KERNEL); if (!ps2if || !serio) { ret = -ENOMEM; goto free; } serio->id.type = SERIO_8042; serio->write = ps2_write; serio->open = ps2_open; serio->close = ps2_close; strlcpy(serio->name, dev_name(&dev->dev), sizeof(serio->name)); strlcpy(serio->phys, dev_name(&dev->dev), sizeof(serio->phys)); serio->port_data = ps2if; serio->dev.parent = &dev->dev; ps2if->io = serio; ps2if->dev = dev; sa1111_set_drvdata(dev, ps2if); spin_lock_init(&ps2if->lock); /* * Request the physical region for this PS2 port. */ if (!request_mem_region(dev->res.start, dev->res.end - dev->res.start + 1, SA1111_DRIVER_NAME(dev))) { ret = -EBUSY; goto free; } /* * Our parent device has already mapped the region. */ ps2if->base = dev->mapbase; sa1111_enable_device(ps2if->dev); /* Incoming clock is 8MHz */ sa1111_writel(0, ps2if->base + SA1111_PS2CLKDIV); sa1111_writel(127, ps2if->base + SA1111_PS2PRECNT); /* * Flush any pending input. */ ps2_clear_input(ps2if); /* * Test the keyboard interface. */ ret = ps2_test(ps2if); if (ret) goto out; /* * Flush any pending input. */ ps2_clear_input(ps2if); sa1111_disable_device(ps2if->dev); serio_register_port(ps2if->io); return 0; out: sa1111_disable_device(ps2if->dev); release_mem_region(dev->res.start, resource_size(&dev->res)); free: sa1111_set_drvdata(dev, NULL); kfree(ps2if); kfree(serio); return ret; } /* * Remove one device from this driver. */ static int __devexit ps2_remove(struct sa1111_dev *dev) { struct ps2if *ps2if = sa1111_get_drvdata(dev); serio_unregister_port(ps2if->io); release_mem_region(dev->res.start, resource_size(&dev->res)); sa1111_set_drvdata(dev, NULL); kfree(ps2if); return 0; } /* * Our device driver structure */ static struct sa1111_driver ps2_driver = { .drv = { .name = "sa1111-ps2", }, .devid = SA1111_DEVID_PS2, .probe = ps2_probe, .remove = __devexit_p(ps2_remove), }; static int __init ps2_init(void) { return sa1111_driver_register(&ps2_driver); } static void __exit ps2_exit(void) { sa1111_driver_unregister(&ps2_driver); } module_init(ps2_init); module_exit(ps2_exit); MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>"); MODULE_DESCRIPTION("SA1111 PS2 controller driver"); MODULE_LICENSE("GPL");
gpl-2.0
scriptZilla/linux
net/bluetooth/amp.c
659
14637
/* Copyright (c) 2011,2012 Intel Corp. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License version 2 and only version 2 as published by the Free Software Foundation. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. */ #include <net/bluetooth/bluetooth.h> #include <net/bluetooth/hci.h> #include <net/bluetooth/hci_core.h> #include <crypto/hash.h> #include "hci_request.h" #include "a2mp.h" #include "amp.h" /* Remote AMP Controllers interface */ void amp_ctrl_get(struct amp_ctrl *ctrl) { BT_DBG("ctrl %p orig refcnt %d", ctrl, atomic_read(&ctrl->kref.refcount)); kref_get(&ctrl->kref); } static void amp_ctrl_destroy(struct kref *kref) { struct amp_ctrl *ctrl = container_of(kref, struct amp_ctrl, kref); BT_DBG("ctrl %p", ctrl); kfree(ctrl->assoc); kfree(ctrl); } int amp_ctrl_put(struct amp_ctrl *ctrl) { BT_DBG("ctrl %p orig refcnt %d", ctrl, atomic_read(&ctrl->kref.refcount)); return kref_put(&ctrl->kref, &amp_ctrl_destroy); } struct amp_ctrl *amp_ctrl_add(struct amp_mgr *mgr, u8 id) { struct amp_ctrl *ctrl; ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL); if (!ctrl) return NULL; kref_init(&ctrl->kref); ctrl->id = id; mutex_lock(&mgr->amp_ctrls_lock); list_add(&ctrl->list, &mgr->amp_ctrls); mutex_unlock(&mgr->amp_ctrls_lock); BT_DBG("mgr %p ctrl %p", mgr, ctrl); return ctrl; } void amp_ctrl_list_flush(struct amp_mgr *mgr) { struct amp_ctrl *ctrl, *n; BT_DBG("mgr %p", mgr); mutex_lock(&mgr->amp_ctrls_lock); list_for_each_entry_safe(ctrl, n, &mgr->amp_ctrls, list) { list_del(&ctrl->list); amp_ctrl_put(ctrl); } mutex_unlock(&mgr->amp_ctrls_lock); } struct amp_ctrl *amp_ctrl_lookup(struct amp_mgr *mgr, u8 id) { struct amp_ctrl *ctrl; BT_DBG("mgr %p id %d", mgr, id); mutex_lock(&mgr->amp_ctrls_lock); list_for_each_entry(ctrl, &mgr->amp_ctrls, list) { if (ctrl->id == id) { amp_ctrl_get(ctrl); mutex_unlock(&mgr->amp_ctrls_lock); return ctrl; } } mutex_unlock(&mgr->amp_ctrls_lock); return NULL; } /* Physical Link interface */ static u8 __next_handle(struct amp_mgr *mgr) { if (++mgr->handle == 0) mgr->handle = 1; return mgr->handle; } struct hci_conn *phylink_add(struct hci_dev *hdev, struct amp_mgr *mgr, u8 remote_id, bool out) { bdaddr_t *dst = &mgr->l2cap_conn->hcon->dst; struct hci_conn *hcon; u8 role = out ? HCI_ROLE_MASTER : HCI_ROLE_SLAVE; hcon = hci_conn_add(hdev, AMP_LINK, dst, role); if (!hcon) return NULL; BT_DBG("hcon %p dst %pMR", hcon, dst); hcon->state = BT_CONNECT; hcon->attempt++; hcon->handle = __next_handle(mgr); hcon->remote_id = remote_id; hcon->amp_mgr = amp_mgr_get(mgr); return hcon; } /* AMP crypto key generation interface */ static int hmac_sha256(u8 *key, u8 ksize, char *plaintext, u8 psize, u8 *output) { struct crypto_shash *tfm; struct shash_desc *shash; int ret; if (!ksize) return -EINVAL; tfm = crypto_alloc_shash("hmac(sha256)", 0, 0); if (IS_ERR(tfm)) { BT_DBG("crypto_alloc_ahash failed: err %ld", PTR_ERR(tfm)); return PTR_ERR(tfm); } ret = crypto_shash_setkey(tfm, key, ksize); if (ret) { BT_DBG("crypto_ahash_setkey failed: err %d", ret); goto failed; } shash = kzalloc(sizeof(*shash) + crypto_shash_descsize(tfm), GFP_KERNEL); if (!shash) { ret = -ENOMEM; goto failed; } shash->tfm = tfm; shash->flags = CRYPTO_TFM_REQ_MAY_SLEEP; ret = crypto_shash_digest(shash, plaintext, psize, output); kfree(shash); failed: crypto_free_shash(tfm); return ret; } int phylink_gen_key(struct hci_conn *conn, u8 *data, u8 *len, u8 *type) { struct hci_dev *hdev = conn->hdev; struct link_key *key; u8 keybuf[HCI_AMP_LINK_KEY_SIZE]; u8 gamp_key[HCI_AMP_LINK_KEY_SIZE]; int err; if (!hci_conn_check_link_mode(conn)) return -EACCES; BT_DBG("conn %p key_type %d", conn, conn->key_type); /* Legacy key */ if (conn->key_type < 3) { BT_ERR("Legacy key type %d", conn->key_type); return -EACCES; } *type = conn->key_type; *len = HCI_AMP_LINK_KEY_SIZE; key = hci_find_link_key(hdev, &conn->dst); if (!key) { BT_DBG("No Link key for conn %p dst %pMR", conn, &conn->dst); return -EACCES; } /* BR/EDR Link Key concatenated together with itself */ memcpy(&keybuf[0], key->val, HCI_LINK_KEY_SIZE); memcpy(&keybuf[HCI_LINK_KEY_SIZE], key->val, HCI_LINK_KEY_SIZE); /* Derive Generic AMP Link Key (gamp) */ err = hmac_sha256(keybuf, HCI_AMP_LINK_KEY_SIZE, "gamp", 4, gamp_key); if (err) { BT_ERR("Could not derive Generic AMP Key: err %d", err); return err; } if (conn->key_type == HCI_LK_DEBUG_COMBINATION) { BT_DBG("Use Generic AMP Key (gamp)"); memcpy(data, gamp_key, HCI_AMP_LINK_KEY_SIZE); return err; } /* Derive Dedicated AMP Link Key: "802b" is 802.11 PAL keyID */ return hmac_sha256(gamp_key, HCI_AMP_LINK_KEY_SIZE, "802b", 4, data); } static void read_local_amp_assoc_complete(struct hci_dev *hdev, u8 status, u16 opcode, struct sk_buff *skb) { struct hci_rp_read_local_amp_assoc *rp = (void *)skb->data; struct amp_assoc *assoc = &hdev->loc_assoc; size_t rem_len, frag_len; BT_DBG("%s status 0x%2.2x", hdev->name, rp->status); if (rp->status) goto send_rsp; frag_len = skb->len - sizeof(*rp); rem_len = __le16_to_cpu(rp->rem_len); if (rem_len > frag_len) { BT_DBG("frag_len %zu rem_len %zu", frag_len, rem_len); memcpy(assoc->data + assoc->offset, rp->frag, frag_len); assoc->offset += frag_len; /* Read other fragments */ amp_read_loc_assoc_frag(hdev, rp->phy_handle); return; } memcpy(assoc->data + assoc->offset, rp->frag, rem_len); assoc->len = assoc->offset + rem_len; assoc->offset = 0; send_rsp: /* Send A2MP Rsp when all fragments are received */ a2mp_send_getampassoc_rsp(hdev, rp->status); a2mp_send_create_phy_link_req(hdev, rp->status); } void amp_read_loc_assoc_frag(struct hci_dev *hdev, u8 phy_handle) { struct hci_cp_read_local_amp_assoc cp; struct amp_assoc *loc_assoc = &hdev->loc_assoc; struct hci_request req; int err = 0; BT_DBG("%s handle %d", hdev->name, phy_handle); cp.phy_handle = phy_handle; cp.max_len = cpu_to_le16(hdev->amp_assoc_size); cp.len_so_far = cpu_to_le16(loc_assoc->offset); hci_req_init(&req, hdev); hci_req_add(&req, HCI_OP_READ_LOCAL_AMP_ASSOC, sizeof(cp), &cp); err = hci_req_run_skb(&req, read_local_amp_assoc_complete); if (err < 0) a2mp_send_getampassoc_rsp(hdev, A2MP_STATUS_INVALID_CTRL_ID); } void amp_read_loc_assoc(struct hci_dev *hdev, struct amp_mgr *mgr) { struct hci_cp_read_local_amp_assoc cp; struct hci_request req; int err = 0; memset(&hdev->loc_assoc, 0, sizeof(struct amp_assoc)); memset(&cp, 0, sizeof(cp)); cp.max_len = cpu_to_le16(hdev->amp_assoc_size); set_bit(READ_LOC_AMP_ASSOC, &mgr->state); hci_req_init(&req, hdev); hci_req_add(&req, HCI_OP_READ_LOCAL_AMP_ASSOC, sizeof(cp), &cp); hci_req_run_skb(&req, read_local_amp_assoc_complete); if (err < 0) a2mp_send_getampassoc_rsp(hdev, A2MP_STATUS_INVALID_CTRL_ID); } void amp_read_loc_assoc_final_data(struct hci_dev *hdev, struct hci_conn *hcon) { struct hci_cp_read_local_amp_assoc cp; struct amp_mgr *mgr = hcon->amp_mgr; struct hci_request req; int err = 0; cp.phy_handle = hcon->handle; cp.len_so_far = cpu_to_le16(0); cp.max_len = cpu_to_le16(hdev->amp_assoc_size); set_bit(READ_LOC_AMP_ASSOC_FINAL, &mgr->state); /* Read Local AMP Assoc final link information data */ hci_req_init(&req, hdev); hci_req_add(&req, HCI_OP_READ_LOCAL_AMP_ASSOC, sizeof(cp), &cp); hci_req_run_skb(&req, read_local_amp_assoc_complete); if (err < 0) a2mp_send_getampassoc_rsp(hdev, A2MP_STATUS_INVALID_CTRL_ID); } static void write_remote_amp_assoc_complete(struct hci_dev *hdev, u8 status, u16 opcode, struct sk_buff *skb) { struct hci_rp_write_remote_amp_assoc *rp = (void *)skb->data; BT_DBG("%s status 0x%2.2x phy_handle 0x%2.2x", hdev->name, rp->status, rp->phy_handle); if (rp->status) return; amp_write_rem_assoc_continue(hdev, rp->phy_handle); } /* Write AMP Assoc data fragments, returns true with last fragment written*/ static bool amp_write_rem_assoc_frag(struct hci_dev *hdev, struct hci_conn *hcon) { struct hci_cp_write_remote_amp_assoc *cp; struct amp_mgr *mgr = hcon->amp_mgr; struct amp_ctrl *ctrl; struct hci_request req; u16 frag_len, len; ctrl = amp_ctrl_lookup(mgr, hcon->remote_id); if (!ctrl) return false; if (!ctrl->assoc_rem_len) { BT_DBG("all fragments are written"); ctrl->assoc_rem_len = ctrl->assoc_len; ctrl->assoc_len_so_far = 0; amp_ctrl_put(ctrl); return true; } frag_len = min_t(u16, 248, ctrl->assoc_rem_len); len = frag_len + sizeof(*cp); cp = kzalloc(len, GFP_KERNEL); if (!cp) { amp_ctrl_put(ctrl); return false; } BT_DBG("hcon %p ctrl %p frag_len %u assoc_len %u rem_len %u", hcon, ctrl, frag_len, ctrl->assoc_len, ctrl->assoc_rem_len); cp->phy_handle = hcon->handle; cp->len_so_far = cpu_to_le16(ctrl->assoc_len_so_far); cp->rem_len = cpu_to_le16(ctrl->assoc_rem_len); memcpy(cp->frag, ctrl->assoc, frag_len); ctrl->assoc_len_so_far += frag_len; ctrl->assoc_rem_len -= frag_len; amp_ctrl_put(ctrl); hci_req_init(&req, hdev); hci_req_add(&req, HCI_OP_WRITE_REMOTE_AMP_ASSOC, len, cp); hci_req_run_skb(&req, write_remote_amp_assoc_complete); kfree(cp); return false; } void amp_write_rem_assoc_continue(struct hci_dev *hdev, u8 handle) { struct hci_conn *hcon; BT_DBG("%s phy handle 0x%2.2x", hdev->name, handle); hcon = hci_conn_hash_lookup_handle(hdev, handle); if (!hcon) return; /* Send A2MP create phylink rsp when all fragments are written */ if (amp_write_rem_assoc_frag(hdev, hcon)) a2mp_send_create_phy_link_rsp(hdev, 0); } void amp_write_remote_assoc(struct hci_dev *hdev, u8 handle) { struct hci_conn *hcon; BT_DBG("%s phy handle 0x%2.2x", hdev->name, handle); hcon = hci_conn_hash_lookup_handle(hdev, handle); if (!hcon) return; BT_DBG("%s phy handle 0x%2.2x hcon %p", hdev->name, handle, hcon); amp_write_rem_assoc_frag(hdev, hcon); } static void create_phylink_complete(struct hci_dev *hdev, u8 status, u16 opcode) { struct hci_cp_create_phy_link *cp; BT_DBG("%s status 0x%2.2x", hdev->name, status); cp = hci_sent_cmd_data(hdev, HCI_OP_CREATE_PHY_LINK); if (!cp) return; hci_dev_lock(hdev); if (status) { struct hci_conn *hcon; hcon = hci_conn_hash_lookup_handle(hdev, cp->phy_handle); if (hcon) hci_conn_del(hcon); } else { amp_write_remote_assoc(hdev, cp->phy_handle); } hci_dev_unlock(hdev); } void amp_create_phylink(struct hci_dev *hdev, struct amp_mgr *mgr, struct hci_conn *hcon) { struct hci_cp_create_phy_link cp; struct hci_request req; cp.phy_handle = hcon->handle; BT_DBG("%s hcon %p phy handle 0x%2.2x", hdev->name, hcon, hcon->handle); if (phylink_gen_key(mgr->l2cap_conn->hcon, cp.key, &cp.key_len, &cp.key_type)) { BT_DBG("Cannot create link key"); return; } hci_req_init(&req, hdev); hci_req_add(&req, HCI_OP_CREATE_PHY_LINK, sizeof(cp), &cp); hci_req_run(&req, create_phylink_complete); } static void accept_phylink_complete(struct hci_dev *hdev, u8 status, u16 opcode) { struct hci_cp_accept_phy_link *cp; BT_DBG("%s status 0x%2.2x", hdev->name, status); if (status) return; cp = hci_sent_cmd_data(hdev, HCI_OP_ACCEPT_PHY_LINK); if (!cp) return; amp_write_remote_assoc(hdev, cp->phy_handle); } void amp_accept_phylink(struct hci_dev *hdev, struct amp_mgr *mgr, struct hci_conn *hcon) { struct hci_cp_accept_phy_link cp; struct hci_request req; cp.phy_handle = hcon->handle; BT_DBG("%s hcon %p phy handle 0x%2.2x", hdev->name, hcon, hcon->handle); if (phylink_gen_key(mgr->l2cap_conn->hcon, cp.key, &cp.key_len, &cp.key_type)) { BT_DBG("Cannot create link key"); return; } hci_req_init(&req, hdev); hci_req_add(&req, HCI_OP_ACCEPT_PHY_LINK, sizeof(cp), &cp); hci_req_run(&req, accept_phylink_complete); } void amp_physical_cfm(struct hci_conn *bredr_hcon, struct hci_conn *hs_hcon) { struct hci_dev *bredr_hdev = hci_dev_hold(bredr_hcon->hdev); struct amp_mgr *mgr = hs_hcon->amp_mgr; struct l2cap_chan *bredr_chan; BT_DBG("bredr_hcon %p hs_hcon %p mgr %p", bredr_hcon, hs_hcon, mgr); if (!bredr_hdev || !mgr || !mgr->bredr_chan) return; bredr_chan = mgr->bredr_chan; l2cap_chan_lock(bredr_chan); set_bit(FLAG_EFS_ENABLE, &bredr_chan->flags); bredr_chan->remote_amp_id = hs_hcon->remote_id; bredr_chan->local_amp_id = hs_hcon->hdev->id; bredr_chan->hs_hcon = hs_hcon; bredr_chan->conn->mtu = hs_hcon->hdev->block_mtu; __l2cap_physical_cfm(bredr_chan, 0); l2cap_chan_unlock(bredr_chan); hci_dev_put(bredr_hdev); } void amp_create_logical_link(struct l2cap_chan *chan) { struct hci_conn *hs_hcon = chan->hs_hcon; struct hci_cp_create_accept_logical_link cp; struct hci_dev *hdev; BT_DBG("chan %p hs_hcon %p dst %pMR", chan, hs_hcon, &chan->conn->hcon->dst); if (!hs_hcon) return; hdev = hci_dev_hold(chan->hs_hcon->hdev); if (!hdev) return; cp.phy_handle = hs_hcon->handle; cp.tx_flow_spec.id = chan->local_id; cp.tx_flow_spec.stype = chan->local_stype; cp.tx_flow_spec.msdu = cpu_to_le16(chan->local_msdu); cp.tx_flow_spec.sdu_itime = cpu_to_le32(chan->local_sdu_itime); cp.tx_flow_spec.acc_lat = cpu_to_le32(chan->local_acc_lat); cp.tx_flow_spec.flush_to = cpu_to_le32(chan->local_flush_to); cp.rx_flow_spec.id = chan->remote_id; cp.rx_flow_spec.stype = chan->remote_stype; cp.rx_flow_spec.msdu = cpu_to_le16(chan->remote_msdu); cp.rx_flow_spec.sdu_itime = cpu_to_le32(chan->remote_sdu_itime); cp.rx_flow_spec.acc_lat = cpu_to_le32(chan->remote_acc_lat); cp.rx_flow_spec.flush_to = cpu_to_le32(chan->remote_flush_to); if (hs_hcon->out) hci_send_cmd(hdev, HCI_OP_CREATE_LOGICAL_LINK, sizeof(cp), &cp); else hci_send_cmd(hdev, HCI_OP_ACCEPT_LOGICAL_LINK, sizeof(cp), &cp); hci_dev_put(hdev); } void amp_disconnect_logical_link(struct hci_chan *hchan) { struct hci_conn *hcon = hchan->conn; struct hci_cp_disconn_logical_link cp; if (hcon->state != BT_CONNECTED) { BT_DBG("hchan %p not connected", hchan); return; } cp.log_handle = cpu_to_le16(hchan->handle); hci_send_cmd(hcon->hdev, HCI_OP_DISCONN_LOGICAL_LINK, sizeof(cp), &cp); } void amp_destroy_logical_link(struct hci_chan *hchan, u8 reason) { BT_DBG("hchan %p", hchan); hci_chan_del(hchan); }
gpl-2.0
rock12/ALPS.L1.MP6.V2.19_CENON6580_WE_1_L_KERNEL
mm/sparse.c
915
21842
/* * sparse memory mappings. */ #include <linux/mm.h> #include <linux/slab.h> #include <linux/mmzone.h> #include <linux/bootmem.h> #include <linux/highmem.h> #include <linux/export.h> #include <linux/spinlock.h> #include <linux/vmalloc.h> #include "internal.h" #include <asm/dma.h> #include <asm/pgalloc.h> #include <asm/pgtable.h> /* * Permanent SPARSEMEM data: * * 1) mem_section - memory sections, mem_map's for valid memory */ #ifdef CONFIG_SPARSEMEM_EXTREME struct mem_section *mem_section[NR_SECTION_ROOTS] ____cacheline_internodealigned_in_smp; #else struct mem_section mem_section[NR_SECTION_ROOTS][SECTIONS_PER_ROOT] ____cacheline_internodealigned_in_smp; #endif EXPORT_SYMBOL(mem_section); #ifdef NODE_NOT_IN_PAGE_FLAGS /* * If we did not store the node number in the page then we have to * do a lookup in the section_to_node_table in order to find which * node the page belongs to. */ #if MAX_NUMNODES <= 256 static u8 section_to_node_table[NR_MEM_SECTIONS] __cacheline_aligned; #else static u16 section_to_node_table[NR_MEM_SECTIONS] __cacheline_aligned; #endif int page_to_nid(const struct page *page) { return section_to_node_table[page_to_section(page)]; } EXPORT_SYMBOL(page_to_nid); static void set_section_nid(unsigned long section_nr, int nid) { section_to_node_table[section_nr] = nid; } #else /* !NODE_NOT_IN_PAGE_FLAGS */ static inline void set_section_nid(unsigned long section_nr, int nid) { } #endif #ifdef CONFIG_SPARSEMEM_EXTREME static struct mem_section noinline __init_refok *sparse_index_alloc(int nid) { struct mem_section *section = NULL; unsigned long array_size = SECTIONS_PER_ROOT * sizeof(struct mem_section); if (slab_is_available()) { if (node_state(nid, N_HIGH_MEMORY)) section = kzalloc_node(array_size, GFP_KERNEL, nid); else section = kzalloc(array_size, GFP_KERNEL); } else { section = alloc_bootmem_node(NODE_DATA(nid), array_size); } return section; } static int __meminit sparse_index_init(unsigned long section_nr, int nid) { unsigned long root = SECTION_NR_TO_ROOT(section_nr); struct mem_section *section; int ret = 0; if (mem_section[root]) return -EEXIST; section = sparse_index_alloc(nid); if (!section) return -ENOMEM; mem_section[root] = section; return ret; } #else /* !SPARSEMEM_EXTREME */ static inline int sparse_index_init(unsigned long section_nr, int nid) { return 0; } #endif /* * Although written for the SPARSEMEM_EXTREME case, this happens * to also work for the flat array case because * NR_SECTION_ROOTS==NR_MEM_SECTIONS. */ int __section_nr(struct mem_section* ms) { unsigned long root_nr; struct mem_section* root; for (root_nr = 0; root_nr < NR_SECTION_ROOTS; root_nr++) { root = __nr_to_section(root_nr * SECTIONS_PER_ROOT); if (!root) continue; if ((ms >= root) && (ms < (root + SECTIONS_PER_ROOT))) break; } VM_BUG_ON(root_nr == NR_SECTION_ROOTS); return (root_nr * SECTIONS_PER_ROOT) + (ms - root); } /* * During early boot, before section_mem_map is used for an actual * mem_map, we use section_mem_map to store the section's NUMA * node. This keeps us from having to use another data structure. The * node information is cleared just before we store the real mem_map. */ static inline unsigned long sparse_encode_early_nid(int nid) { return (nid << SECTION_NID_SHIFT); } static inline int sparse_early_nid(struct mem_section *section) { return (section->section_mem_map >> SECTION_NID_SHIFT); } /* Validate the physical addressing limitations of the model */ void __meminit mminit_validate_memmodel_limits(unsigned long *start_pfn, unsigned long *end_pfn) { unsigned long max_sparsemem_pfn = 1UL << (MAX_PHYSMEM_BITS-PAGE_SHIFT); /* * Sanity checks - do not allow an architecture to pass * in larger pfns than the maximum scope of sparsemem: */ if (*start_pfn > max_sparsemem_pfn) { mminit_dprintk(MMINIT_WARNING, "pfnvalidation", "Start of range %lu -> %lu exceeds SPARSEMEM max %lu\n", *start_pfn, *end_pfn, max_sparsemem_pfn); WARN_ON_ONCE(1); *start_pfn = max_sparsemem_pfn; *end_pfn = max_sparsemem_pfn; } else if (*end_pfn > max_sparsemem_pfn) { mminit_dprintk(MMINIT_WARNING, "pfnvalidation", "End of range %lu -> %lu exceeds SPARSEMEM max %lu\n", *start_pfn, *end_pfn, max_sparsemem_pfn); WARN_ON_ONCE(1); *end_pfn = max_sparsemem_pfn; } } /* Record a memory area against a node. */ void __init memory_present(int nid, unsigned long start, unsigned long end) { unsigned long pfn; start &= PAGE_SECTION_MASK; mminit_validate_memmodel_limits(&start, &end); for (pfn = start; pfn < end; pfn += PAGES_PER_SECTION) { unsigned long section = pfn_to_section_nr(pfn); struct mem_section *ms; sparse_index_init(section, nid); set_section_nid(section, nid); ms = __nr_to_section(section); if (!ms->section_mem_map) ms->section_mem_map = sparse_encode_early_nid(nid) | SECTION_MARKED_PRESENT; } } /* * Only used by the i386 NUMA architecures, but relatively * generic code. */ unsigned long __init node_memmap_size_bytes(int nid, unsigned long start_pfn, unsigned long end_pfn) { unsigned long pfn; unsigned long nr_pages = 0; mminit_validate_memmodel_limits(&start_pfn, &end_pfn); for (pfn = start_pfn; pfn < end_pfn; pfn += PAGES_PER_SECTION) { if (nid != early_pfn_to_nid(pfn)) continue; if (pfn_present(pfn)) nr_pages += PAGES_PER_SECTION; } return nr_pages * sizeof(struct page); } /* * Subtle, we encode the real pfn into the mem_map such that * the identity pfn - section_mem_map will return the actual * physical page frame number. */ static unsigned long sparse_encode_mem_map(struct page *mem_map, unsigned long pnum) { return (unsigned long)(mem_map - (section_nr_to_pfn(pnum))); } /* * Decode mem_map from the coded memmap */ struct page *sparse_decode_mem_map(unsigned long coded_mem_map, unsigned long pnum) { /* mask off the extra low bits of information */ coded_mem_map &= SECTION_MAP_MASK; return ((struct page *)coded_mem_map) + section_nr_to_pfn(pnum); } static int __meminit sparse_init_one_section(struct mem_section *ms, unsigned long pnum, struct page *mem_map, unsigned long *pageblock_bitmap) { if (!present_section(ms)) return -EINVAL; ms->section_mem_map &= ~SECTION_MAP_MASK; ms->section_mem_map |= sparse_encode_mem_map(mem_map, pnum) | SECTION_HAS_MEM_MAP; ms->pageblock_flags = pageblock_bitmap; return 1; } unsigned long usemap_size(void) { unsigned long size_bytes; size_bytes = roundup(SECTION_BLOCKFLAGS_BITS, 8) / 8; size_bytes = roundup(size_bytes, sizeof(unsigned long)); return size_bytes; } #ifdef CONFIG_MEMORY_HOTPLUG static unsigned long *__kmalloc_section_usemap(void) { return kmalloc(usemap_size(), GFP_KERNEL); } #endif /* CONFIG_MEMORY_HOTPLUG */ #ifdef CONFIG_MEMORY_HOTREMOVE static unsigned long * __init sparse_early_usemaps_alloc_pgdat_section(struct pglist_data *pgdat, unsigned long size) { unsigned long goal, limit; unsigned long *p; int nid; /* * A page may contain usemaps for other sections preventing the * page being freed and making a section unremovable while * other sections referencing the usemap retmain active. Similarly, * a pgdat can prevent a section being removed. If section A * contains a pgdat and section B contains the usemap, both * sections become inter-dependent. This allocates usemaps * from the same section as the pgdat where possible to avoid * this problem. */ goal = __pa(pgdat) & (PAGE_SECTION_MASK << PAGE_SHIFT); limit = goal + (1UL << PA_SECTION_SHIFT); nid = early_pfn_to_nid(goal >> PAGE_SHIFT); again: p = ___alloc_bootmem_node_nopanic(NODE_DATA(nid), size, SMP_CACHE_BYTES, goal, limit); if (!p && limit) { limit = 0; goto again; } return p; } static void __init check_usemap_section_nr(int nid, unsigned long *usemap) { unsigned long usemap_snr, pgdat_snr; static unsigned long old_usemap_snr = NR_MEM_SECTIONS; static unsigned long old_pgdat_snr = NR_MEM_SECTIONS; struct pglist_data *pgdat = NODE_DATA(nid); int usemap_nid; usemap_snr = pfn_to_section_nr(__pa(usemap) >> PAGE_SHIFT); pgdat_snr = pfn_to_section_nr(__pa(pgdat) >> PAGE_SHIFT); if (usemap_snr == pgdat_snr) return; if (old_usemap_snr == usemap_snr && old_pgdat_snr == pgdat_snr) /* skip redundant message */ return; old_usemap_snr = usemap_snr; old_pgdat_snr = pgdat_snr; usemap_nid = sparse_early_nid(__nr_to_section(usemap_snr)); if (usemap_nid != nid) { printk(KERN_INFO "node %d must be removed before remove section %ld\n", nid, usemap_snr); return; } /* * There is a circular dependency. * Some platforms allow un-removable section because they will just * gather other removable sections for dynamic partitioning. * Just notify un-removable section's number here. */ printk(KERN_INFO "Section %ld and %ld (node %d)", usemap_snr, pgdat_snr, nid); printk(KERN_CONT " have a circular dependency on usemap and pgdat allocations\n"); } #else static unsigned long * __init sparse_early_usemaps_alloc_pgdat_section(struct pglist_data *pgdat, unsigned long size) { return alloc_bootmem_node_nopanic(pgdat, size); } static void __init check_usemap_section_nr(int nid, unsigned long *usemap) { } #endif /* CONFIG_MEMORY_HOTREMOVE */ static void __init sparse_early_usemaps_alloc_node(unsigned long**usemap_map, unsigned long pnum_begin, unsigned long pnum_end, unsigned long usemap_count, int nodeid) { void *usemap; unsigned long pnum; int size = usemap_size(); usemap = sparse_early_usemaps_alloc_pgdat_section(NODE_DATA(nodeid), size * usemap_count); if (!usemap) { printk(KERN_WARNING "%s: allocation failed\n", __func__); return; } for (pnum = pnum_begin; pnum < pnum_end; pnum++) { if (!present_section_nr(pnum)) continue; usemap_map[pnum] = usemap; usemap += size; check_usemap_section_nr(nodeid, usemap_map[pnum]); } } #ifndef CONFIG_SPARSEMEM_VMEMMAP struct page __init *sparse_mem_map_populate(unsigned long pnum, int nid) { struct page *map; unsigned long size; map = alloc_remap(nid, sizeof(struct page) * PAGES_PER_SECTION); if (map) return map; size = PAGE_ALIGN(sizeof(struct page) * PAGES_PER_SECTION); map = __alloc_bootmem_node_high(NODE_DATA(nid), size, PAGE_SIZE, __pa(MAX_DMA_ADDRESS)); return map; } void __init sparse_mem_maps_populate_node(struct page **map_map, unsigned long pnum_begin, unsigned long pnum_end, unsigned long map_count, int nodeid) { void *map; unsigned long pnum; unsigned long size = sizeof(struct page) * PAGES_PER_SECTION; map = alloc_remap(nodeid, size * map_count); if (map) { for (pnum = pnum_begin; pnum < pnum_end; pnum++) { if (!present_section_nr(pnum)) continue; map_map[pnum] = map; map += size; } return; } size = PAGE_ALIGN(size); map = __alloc_bootmem_node_high(NODE_DATA(nodeid), size * map_count, PAGE_SIZE, __pa(MAX_DMA_ADDRESS)); if (map) { for (pnum = pnum_begin; pnum < pnum_end; pnum++) { if (!present_section_nr(pnum)) continue; map_map[pnum] = map; map += size; } return; } /* fallback */ for (pnum = pnum_begin; pnum < pnum_end; pnum++) { struct mem_section *ms; if (!present_section_nr(pnum)) continue; map_map[pnum] = sparse_mem_map_populate(pnum, nodeid); if (map_map[pnum]) continue; ms = __nr_to_section(pnum); printk(KERN_ERR "%s: sparsemem memory map backing failed " "some memory will not be available.\n", __func__); ms->section_mem_map = 0; } } #endif /* !CONFIG_SPARSEMEM_VMEMMAP */ #ifdef CONFIG_SPARSEMEM_ALLOC_MEM_MAP_TOGETHER static void __init sparse_early_mem_maps_alloc_node(struct page **map_map, unsigned long pnum_begin, unsigned long pnum_end, unsigned long map_count, int nodeid) { sparse_mem_maps_populate_node(map_map, pnum_begin, pnum_end, map_count, nodeid); } #else static struct page __init *sparse_early_mem_map_alloc(unsigned long pnum) { struct page *map; struct mem_section *ms = __nr_to_section(pnum); int nid = sparse_early_nid(ms); map = sparse_mem_map_populate(pnum, nid); if (map) return map; printk(KERN_ERR "%s: sparsemem memory map backing failed " "some memory will not be available.\n", __func__); ms->section_mem_map = 0; return NULL; } #endif void __attribute__((weak)) __meminit vmemmap_populate_print_last(void) { } /* * Allocate the accumulated non-linear sections, allocate a mem_map * for each and record the physical to section mapping. */ void __init sparse_init(void) { unsigned long pnum; struct page *map; unsigned long *usemap; unsigned long **usemap_map; int size; int nodeid_begin = 0; unsigned long pnum_begin = 0; unsigned long usemap_count; #ifdef CONFIG_SPARSEMEM_ALLOC_MEM_MAP_TOGETHER unsigned long map_count; int size2; struct page **map_map; #endif /* Setup pageblock_order for HUGETLB_PAGE_SIZE_VARIABLE */ set_pageblock_order(); /* * map is using big page (aka 2M in x86 64 bit) * usemap is less one page (aka 24 bytes) * so alloc 2M (with 2M align) and 24 bytes in turn will * make next 2M slip to one more 2M later. * then in big system, the memory will have a lot of holes... * here try to allocate 2M pages continuously. * * powerpc need to call sparse_init_one_section right after each * sparse_early_mem_map_alloc, so allocate usemap_map at first. */ size = sizeof(unsigned long *) * NR_MEM_SECTIONS; usemap_map = alloc_bootmem(size); if (!usemap_map) panic("can not allocate usemap_map\n"); for (pnum = 0; pnum < NR_MEM_SECTIONS; pnum++) { struct mem_section *ms; if (!present_section_nr(pnum)) continue; ms = __nr_to_section(pnum); nodeid_begin = sparse_early_nid(ms); pnum_begin = pnum; break; } usemap_count = 1; for (pnum = pnum_begin + 1; pnum < NR_MEM_SECTIONS; pnum++) { struct mem_section *ms; int nodeid; if (!present_section_nr(pnum)) continue; ms = __nr_to_section(pnum); nodeid = sparse_early_nid(ms); if (nodeid == nodeid_begin) { usemap_count++; continue; } /* ok, we need to take cake of from pnum_begin to pnum - 1*/ sparse_early_usemaps_alloc_node(usemap_map, pnum_begin, pnum, usemap_count, nodeid_begin); /* new start, update count etc*/ nodeid_begin = nodeid; pnum_begin = pnum; usemap_count = 1; } /* ok, last chunk */ sparse_early_usemaps_alloc_node(usemap_map, pnum_begin, NR_MEM_SECTIONS, usemap_count, nodeid_begin); #ifdef CONFIG_SPARSEMEM_ALLOC_MEM_MAP_TOGETHER size2 = sizeof(struct page *) * NR_MEM_SECTIONS; map_map = alloc_bootmem(size2); if (!map_map) panic("can not allocate map_map\n"); for (pnum = 0; pnum < NR_MEM_SECTIONS; pnum++) { struct mem_section *ms; if (!present_section_nr(pnum)) continue; ms = __nr_to_section(pnum); nodeid_begin = sparse_early_nid(ms); pnum_begin = pnum; break; } map_count = 1; for (pnum = pnum_begin + 1; pnum < NR_MEM_SECTIONS; pnum++) { struct mem_section *ms; int nodeid; if (!present_section_nr(pnum)) continue; ms = __nr_to_section(pnum); nodeid = sparse_early_nid(ms); if (nodeid == nodeid_begin) { map_count++; continue; } /* ok, we need to take cake of from pnum_begin to pnum - 1*/ sparse_early_mem_maps_alloc_node(map_map, pnum_begin, pnum, map_count, nodeid_begin); /* new start, update count etc*/ nodeid_begin = nodeid; pnum_begin = pnum; map_count = 1; } /* ok, last chunk */ sparse_early_mem_maps_alloc_node(map_map, pnum_begin, NR_MEM_SECTIONS, map_count, nodeid_begin); #endif for (pnum = 0; pnum < NR_MEM_SECTIONS; pnum++) { if (!present_section_nr(pnum)) continue; usemap = usemap_map[pnum]; if (!usemap) continue; #ifdef CONFIG_SPARSEMEM_ALLOC_MEM_MAP_TOGETHER map = map_map[pnum]; #else map = sparse_early_mem_map_alloc(pnum); #endif if (!map) continue; sparse_init_one_section(__nr_to_section(pnum), pnum, map, usemap); } vmemmap_populate_print_last(); #ifdef CONFIG_SPARSEMEM_ALLOC_MEM_MAP_TOGETHER free_bootmem(__pa(map_map), size2); #endif free_bootmem(__pa(usemap_map), size); } #ifdef CONFIG_MEMORY_HOTPLUG #ifdef CONFIG_SPARSEMEM_VMEMMAP static inline struct page *kmalloc_section_memmap(unsigned long pnum, int nid, unsigned long nr_pages) { /* This will make the necessary allocations eventually. */ return sparse_mem_map_populate(pnum, nid); } static void __kfree_section_memmap(struct page *memmap, unsigned long nr_pages) { unsigned long start = (unsigned long)memmap; unsigned long end = (unsigned long)(memmap + nr_pages); vmemmap_free(start, end); } #ifdef CONFIG_MEMORY_HOTREMOVE static void free_map_bootmem(struct page *memmap, unsigned long nr_pages) { unsigned long start = (unsigned long)memmap; unsigned long end = (unsigned long)(memmap + nr_pages); vmemmap_free(start, end); } #endif /* CONFIG_MEMORY_HOTREMOVE */ #else static struct page *__kmalloc_section_memmap(unsigned long nr_pages) { struct page *page, *ret; unsigned long memmap_size = sizeof(struct page) * nr_pages; page = alloc_pages(GFP_KERNEL|__GFP_NOWARN, get_order(memmap_size)); if (page) goto got_map_page; ret = vmalloc(memmap_size); if (ret) goto got_map_ptr; return NULL; got_map_page: ret = (struct page *)pfn_to_kaddr(page_to_pfn(page)); got_map_ptr: return ret; } static inline struct page *kmalloc_section_memmap(unsigned long pnum, int nid, unsigned long nr_pages) { return __kmalloc_section_memmap(nr_pages); } static void __kfree_section_memmap(struct page *memmap, unsigned long nr_pages) { if (is_vmalloc_addr(memmap)) vfree(memmap); else free_pages((unsigned long)memmap, get_order(sizeof(struct page) * nr_pages)); } #ifdef CONFIG_MEMORY_HOTREMOVE static void free_map_bootmem(struct page *memmap, unsigned long nr_pages) { unsigned long maps_section_nr, removing_section_nr, i; unsigned long magic; struct page *page = virt_to_page(memmap); for (i = 0; i < nr_pages; i++, page++) { magic = (unsigned long) page->lru.next; BUG_ON(magic == NODE_INFO); maps_section_nr = pfn_to_section_nr(page_to_pfn(page)); removing_section_nr = page->private; /* * When this function is called, the removing section is * logical offlined state. This means all pages are isolated * from page allocator. If removing section's memmap is placed * on the same section, it must not be freed. * If it is freed, page allocator may allocate it which will * be removed physically soon. */ if (maps_section_nr != removing_section_nr) put_page_bootmem(page); } } #endif /* CONFIG_MEMORY_HOTREMOVE */ #endif /* CONFIG_SPARSEMEM_VMEMMAP */ /* * returns the number of sections whose mem_maps were properly * set. If this is <=0, then that means that the passed-in * map was not consumed and must be freed. */ int __meminit sparse_add_one_section(struct zone *zone, unsigned long start_pfn, int nr_pages) { unsigned long section_nr = pfn_to_section_nr(start_pfn); struct pglist_data *pgdat = zone->zone_pgdat; struct mem_section *ms; struct page *memmap; unsigned long *usemap; unsigned long flags; int ret; /* * no locking for this, because it does its own * plus, it does a kmalloc */ ret = sparse_index_init(section_nr, pgdat->node_id); if (ret < 0 && ret != -EEXIST) return ret; memmap = kmalloc_section_memmap(section_nr, pgdat->node_id, nr_pages); if (!memmap) return -ENOMEM; usemap = __kmalloc_section_usemap(); if (!usemap) { __kfree_section_memmap(memmap, nr_pages); return -ENOMEM; } pgdat_resize_lock(pgdat, &flags); ms = __pfn_to_section(start_pfn); if (ms->section_mem_map & SECTION_MARKED_PRESENT) { ret = -EEXIST; goto out; } memset(memmap, 0, sizeof(struct page) * nr_pages); ms->section_mem_map |= SECTION_MARKED_PRESENT; ret = sparse_init_one_section(ms, section_nr, memmap, usemap); out: pgdat_resize_unlock(pgdat, &flags); if (ret <= 0) { kfree(usemap); __kfree_section_memmap(memmap, nr_pages); } return ret; } #ifdef CONFIG_MEMORY_FAILURE static void clear_hwpoisoned_pages(struct page *memmap, int nr_pages) { int i; if (!memmap) return; for (i = 0; i < PAGES_PER_SECTION; i++) { if (PageHWPoison(&memmap[i])) { atomic_long_sub(1, &num_poisoned_pages); ClearPageHWPoison(&memmap[i]); } } } #else static inline void clear_hwpoisoned_pages(struct page *memmap, int nr_pages) { } #endif #ifdef CONFIG_MEMORY_HOTREMOVE static void free_section_usemap(struct page *memmap, unsigned long *usemap) { struct page *usemap_page; unsigned long nr_pages; if (!usemap) return; usemap_page = virt_to_page(usemap); /* * Check to see if allocation came from hot-plug-add */ if (PageSlab(usemap_page) || PageCompound(usemap_page)) { kfree(usemap); if (memmap) __kfree_section_memmap(memmap, PAGES_PER_SECTION); return; } /* * The usemap came from bootmem. This is packed with other usemaps * on the section which has pgdat at boot time. Just keep it as is now. */ if (memmap) { nr_pages = PAGE_ALIGN(PAGES_PER_SECTION * sizeof(struct page)) >> PAGE_SHIFT; free_map_bootmem(memmap, nr_pages); } } void sparse_remove_one_section(struct zone *zone, struct mem_section *ms) { struct page *memmap = NULL; unsigned long *usemap = NULL, flags; struct pglist_data *pgdat = zone->zone_pgdat; pgdat_resize_lock(pgdat, &flags); if (ms->section_mem_map) { usemap = ms->pageblock_flags; memmap = sparse_decode_mem_map(ms->section_mem_map, __section_nr(ms)); ms->section_mem_map = 0; ms->pageblock_flags = NULL; } pgdat_resize_unlock(pgdat, &flags); clear_hwpoisoned_pages(memmap, PAGES_PER_SECTION); free_section_usemap(memmap, usemap); } #endif /* CONFIG_MEMORY_HOTREMOVE */ #endif /* CONFIG_MEMORY_HOTPLUG */
gpl-2.0
allwinner-ics/lichee_linux-3.0
net/wireless/core.c
1171
26397
/* * This is the linux wireless configuration interface. * * Copyright 2006-2010 Johannes Berg <johannes@sipsolutions.net> */ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt #include <linux/if.h> #include <linux/module.h> #include <linux/err.h> #include <linux/list.h> #include <linux/slab.h> #include <linux/nl80211.h> #include <linux/debugfs.h> #include <linux/notifier.h> #include <linux/device.h> #include <linux/etherdevice.h> #include <linux/rtnetlink.h> #include <linux/sched.h> #include <net/genetlink.h> #include <net/cfg80211.h> #include "nl80211.h" #include "core.h" #include "sysfs.h" #include "debugfs.h" #include "wext-compat.h" #include "ethtool.h" /* name for sysfs, %d is appended */ #define PHY_NAME "phy" MODULE_AUTHOR("Johannes Berg"); MODULE_LICENSE("GPL"); MODULE_DESCRIPTION("wireless configuration support"); /* RCU-protected (and cfg80211_mutex for writers) */ LIST_HEAD(cfg80211_rdev_list); int cfg80211_rdev_list_generation; DEFINE_MUTEX(cfg80211_mutex); /* for debugfs */ static struct dentry *ieee80211_debugfs_dir; /* for the cleanup, scan and event works */ struct workqueue_struct *cfg80211_wq; static bool cfg80211_disable_40mhz_24ghz; module_param(cfg80211_disable_40mhz_24ghz, bool, 0644); MODULE_PARM_DESC(cfg80211_disable_40mhz_24ghz, "Disable 40MHz support in the 2.4GHz band"); /* requires cfg80211_mutex to be held! */ struct cfg80211_registered_device *cfg80211_rdev_by_wiphy_idx(int wiphy_idx) { struct cfg80211_registered_device *result = NULL, *rdev; if (!wiphy_idx_valid(wiphy_idx)) return NULL; assert_cfg80211_lock(); list_for_each_entry(rdev, &cfg80211_rdev_list, list) { if (rdev->wiphy_idx == wiphy_idx) { result = rdev; break; } } return result; } int get_wiphy_idx(struct wiphy *wiphy) { struct cfg80211_registered_device *rdev; if (!wiphy) return WIPHY_IDX_STALE; rdev = wiphy_to_dev(wiphy); return rdev->wiphy_idx; } /* requires cfg80211_rdev_mutex to be held! */ struct wiphy *wiphy_idx_to_wiphy(int wiphy_idx) { struct cfg80211_registered_device *rdev; if (!wiphy_idx_valid(wiphy_idx)) return NULL; assert_cfg80211_lock(); rdev = cfg80211_rdev_by_wiphy_idx(wiphy_idx); if (!rdev) return NULL; return &rdev->wiphy; } /* requires cfg80211_mutex to be held! */ struct cfg80211_registered_device * __cfg80211_rdev_from_info(struct genl_info *info) { int ifindex; struct cfg80211_registered_device *bywiphyidx = NULL, *byifidx = NULL; struct net_device *dev; int err = -EINVAL; assert_cfg80211_lock(); if (info->attrs[NL80211_ATTR_WIPHY]) { bywiphyidx = cfg80211_rdev_by_wiphy_idx( nla_get_u32(info->attrs[NL80211_ATTR_WIPHY])); err = -ENODEV; } if (info->attrs[NL80211_ATTR_IFINDEX]) { ifindex = nla_get_u32(info->attrs[NL80211_ATTR_IFINDEX]); dev = dev_get_by_index(genl_info_net(info), ifindex); if (dev) { if (dev->ieee80211_ptr) byifidx = wiphy_to_dev(dev->ieee80211_ptr->wiphy); dev_put(dev); } err = -ENODEV; } if (bywiphyidx && byifidx) { if (bywiphyidx != byifidx) return ERR_PTR(-EINVAL); else return bywiphyidx; /* == byifidx */ } if (bywiphyidx) return bywiphyidx; if (byifidx) return byifidx; return ERR_PTR(err); } struct cfg80211_registered_device * cfg80211_get_dev_from_info(struct genl_info *info) { struct cfg80211_registered_device *rdev; mutex_lock(&cfg80211_mutex); rdev = __cfg80211_rdev_from_info(info); /* if it is not an error we grab the lock on * it to assure it won't be going away while * we operate on it */ if (!IS_ERR(rdev)) mutex_lock(&rdev->mtx); mutex_unlock(&cfg80211_mutex); return rdev; } struct cfg80211_registered_device * cfg80211_get_dev_from_ifindex(struct net *net, int ifindex) { struct cfg80211_registered_device *rdev = ERR_PTR(-ENODEV); struct net_device *dev; mutex_lock(&cfg80211_mutex); dev = dev_get_by_index(net, ifindex); if (!dev) goto out; if (dev->ieee80211_ptr) { rdev = wiphy_to_dev(dev->ieee80211_ptr->wiphy); mutex_lock(&rdev->mtx); } else rdev = ERR_PTR(-ENODEV); dev_put(dev); out: mutex_unlock(&cfg80211_mutex); return rdev; } /* requires cfg80211_mutex to be held */ int cfg80211_dev_rename(struct cfg80211_registered_device *rdev, char *newname) { struct cfg80211_registered_device *rdev2; int wiphy_idx, taken = -1, result, digits; assert_cfg80211_lock(); /* prohibit calling the thing phy%d when %d is not its number */ sscanf(newname, PHY_NAME "%d%n", &wiphy_idx, &taken); if (taken == strlen(newname) && wiphy_idx != rdev->wiphy_idx) { /* count number of places needed to print wiphy_idx */ digits = 1; while (wiphy_idx /= 10) digits++; /* * deny the name if it is phy<idx> where <idx> is printed * without leading zeroes. taken == strlen(newname) here */ if (taken == strlen(PHY_NAME) + digits) return -EINVAL; } /* Ignore nop renames */ if (strcmp(newname, dev_name(&rdev->wiphy.dev)) == 0) return 0; /* Ensure another device does not already have this name. */ list_for_each_entry(rdev2, &cfg80211_rdev_list, list) if (strcmp(newname, dev_name(&rdev2->wiphy.dev)) == 0) return -EINVAL; result = device_rename(&rdev->wiphy.dev, newname); if (result) return result; if (rdev->wiphy.debugfsdir && !debugfs_rename(rdev->wiphy.debugfsdir->d_parent, rdev->wiphy.debugfsdir, rdev->wiphy.debugfsdir->d_parent, newname)) pr_err("failed to rename debugfs dir to %s!\n", newname); nl80211_notify_dev_rename(rdev); return 0; } int cfg80211_switch_netns(struct cfg80211_registered_device *rdev, struct net *net) { struct wireless_dev *wdev; int err = 0; if (!(rdev->wiphy.flags & WIPHY_FLAG_NETNS_OK)) return -EOPNOTSUPP; list_for_each_entry(wdev, &rdev->netdev_list, list) { wdev->netdev->features &= ~NETIF_F_NETNS_LOCAL; err = dev_change_net_namespace(wdev->netdev, net, "wlan%d"); if (err) break; wdev->netdev->features |= NETIF_F_NETNS_LOCAL; } if (err) { /* failed -- clean up to old netns */ net = wiphy_net(&rdev->wiphy); list_for_each_entry_continue_reverse(wdev, &rdev->netdev_list, list) { wdev->netdev->features &= ~NETIF_F_NETNS_LOCAL; err = dev_change_net_namespace(wdev->netdev, net, "wlan%d"); WARN_ON(err); wdev->netdev->features |= NETIF_F_NETNS_LOCAL; } return err; } wiphy_net_set(&rdev->wiphy, net); err = device_rename(&rdev->wiphy.dev, dev_name(&rdev->wiphy.dev)); WARN_ON(err); return 0; } static void cfg80211_rfkill_poll(struct rfkill *rfkill, void *data) { struct cfg80211_registered_device *rdev = data; rdev->ops->rfkill_poll(&rdev->wiphy); } static int cfg80211_rfkill_set_block(void *data, bool blocked) { struct cfg80211_registered_device *rdev = data; struct wireless_dev *wdev; if (!blocked) return 0; rtnl_lock(); mutex_lock(&rdev->devlist_mtx); list_for_each_entry(wdev, &rdev->netdev_list, list) dev_close(wdev->netdev); mutex_unlock(&rdev->devlist_mtx); rtnl_unlock(); return 0; } static void cfg80211_rfkill_sync_work(struct work_struct *work) { struct cfg80211_registered_device *rdev; rdev = container_of(work, struct cfg80211_registered_device, rfkill_sync); cfg80211_rfkill_set_block(rdev, rfkill_blocked(rdev->rfkill)); } static void cfg80211_event_work(struct work_struct *work) { struct cfg80211_registered_device *rdev; rdev = container_of(work, struct cfg80211_registered_device, event_work); rtnl_lock(); cfg80211_lock_rdev(rdev); cfg80211_process_rdev_events(rdev); cfg80211_unlock_rdev(rdev); rtnl_unlock(); } /* exported functions */ struct wiphy *wiphy_new(const struct cfg80211_ops *ops, int sizeof_priv) { static int wiphy_counter; struct cfg80211_registered_device *rdev; int alloc_size; WARN_ON(ops->add_key && (!ops->del_key || !ops->set_default_key)); WARN_ON(ops->auth && (!ops->assoc || !ops->deauth || !ops->disassoc)); WARN_ON(ops->connect && !ops->disconnect); WARN_ON(ops->join_ibss && !ops->leave_ibss); WARN_ON(ops->add_virtual_intf && !ops->del_virtual_intf); WARN_ON(ops->add_station && !ops->del_station); WARN_ON(ops->add_mpath && !ops->del_mpath); WARN_ON(ops->join_mesh && !ops->leave_mesh); alloc_size = sizeof(*rdev) + sizeof_priv; rdev = kzalloc(alloc_size, GFP_KERNEL); if (!rdev) return NULL; rdev->ops = ops; mutex_lock(&cfg80211_mutex); rdev->wiphy_idx = wiphy_counter++; if (unlikely(!wiphy_idx_valid(rdev->wiphy_idx))) { wiphy_counter--; mutex_unlock(&cfg80211_mutex); /* ugh, wrapped! */ kfree(rdev); return NULL; } mutex_unlock(&cfg80211_mutex); /* give it a proper name */ dev_set_name(&rdev->wiphy.dev, PHY_NAME "%d", rdev->wiphy_idx); mutex_init(&rdev->mtx); mutex_init(&rdev->devlist_mtx); mutex_init(&rdev->sched_scan_mtx); INIT_LIST_HEAD(&rdev->netdev_list); spin_lock_init(&rdev->bss_lock); INIT_LIST_HEAD(&rdev->bss_list); INIT_WORK(&rdev->scan_done_wk, __cfg80211_scan_done); INIT_WORK(&rdev->sched_scan_results_wk, __cfg80211_sched_scan_results); #ifdef CONFIG_CFG80211_WEXT rdev->wiphy.wext = &cfg80211_wext_handler; #endif device_initialize(&rdev->wiphy.dev); rdev->wiphy.dev.class = &ieee80211_class; rdev->wiphy.dev.platform_data = rdev; #ifdef CONFIG_CFG80211_DEFAULT_PS rdev->wiphy.flags |= WIPHY_FLAG_PS_ON_BY_DEFAULT; #endif wiphy_net_set(&rdev->wiphy, &init_net); rdev->rfkill_ops.set_block = cfg80211_rfkill_set_block; rdev->rfkill = rfkill_alloc(dev_name(&rdev->wiphy.dev), &rdev->wiphy.dev, RFKILL_TYPE_WLAN, &rdev->rfkill_ops, rdev); if (!rdev->rfkill) { kfree(rdev); return NULL; } INIT_WORK(&rdev->rfkill_sync, cfg80211_rfkill_sync_work); INIT_WORK(&rdev->conn_work, cfg80211_conn_work); INIT_WORK(&rdev->event_work, cfg80211_event_work); init_waitqueue_head(&rdev->dev_wait); /* * Initialize wiphy parameters to IEEE 802.11 MIB default values. * Fragmentation and RTS threshold are disabled by default with the * special -1 value. */ rdev->wiphy.retry_short = 7; rdev->wiphy.retry_long = 4; rdev->wiphy.frag_threshold = (u32) -1; rdev->wiphy.rts_threshold = (u32) -1; rdev->wiphy.coverage_class = 0; return &rdev->wiphy; } EXPORT_SYMBOL(wiphy_new); static int wiphy_verify_combinations(struct wiphy *wiphy) { const struct ieee80211_iface_combination *c; int i, j; /* If we have combinations enforce them */ if (wiphy->n_iface_combinations) wiphy->flags |= WIPHY_FLAG_ENFORCE_COMBINATIONS; for (i = 0; i < wiphy->n_iface_combinations; i++) { u32 cnt = 0; u16 all_iftypes = 0; c = &wiphy->iface_combinations[i]; /* Combinations with just one interface aren't real */ if (WARN_ON(c->max_interfaces < 2)) return -EINVAL; /* Need at least one channel */ if (WARN_ON(!c->num_different_channels)) return -EINVAL; if (WARN_ON(!c->n_limits)) return -EINVAL; for (j = 0; j < c->n_limits; j++) { u16 types = c->limits[j].types; /* * interface types shouldn't overlap, this is * used in cfg80211_can_change_interface() */ if (WARN_ON(types & all_iftypes)) return -EINVAL; all_iftypes |= types; if (WARN_ON(!c->limits[j].max)) return -EINVAL; /* Shouldn't list software iftypes in combinations! */ if (WARN_ON(wiphy->software_iftypes & types)) return -EINVAL; cnt += c->limits[j].max; /* * Don't advertise an unsupported type * in a combination. */ if (WARN_ON((wiphy->interface_modes & types) != types)) return -EINVAL; } /* You can't even choose that many! */ if (WARN_ON(cnt < c->max_interfaces)) return -EINVAL; } return 0; } int wiphy_register(struct wiphy *wiphy) { struct cfg80211_registered_device *rdev = wiphy_to_dev(wiphy); int res; enum ieee80211_band band; struct ieee80211_supported_band *sband; bool have_band = false; int i; u16 ifmodes = wiphy->interface_modes; if (WARN_ON(wiphy->addresses && !wiphy->n_addresses)) return -EINVAL; if (WARN_ON(wiphy->addresses && !is_zero_ether_addr(wiphy->perm_addr) && memcmp(wiphy->perm_addr, wiphy->addresses[0].addr, ETH_ALEN))) return -EINVAL; if (wiphy->addresses) memcpy(wiphy->perm_addr, wiphy->addresses[0].addr, ETH_ALEN); /* sanity check ifmodes */ WARN_ON(!ifmodes); ifmodes &= ((1 << NUM_NL80211_IFTYPES) - 1) & ~1; if (WARN_ON(ifmodes != wiphy->interface_modes)) wiphy->interface_modes = ifmodes; res = wiphy_verify_combinations(wiphy); if (res) return res; /* sanity check supported bands/channels */ for (band = 0; band < IEEE80211_NUM_BANDS; band++) { sband = wiphy->bands[band]; if (!sband) continue; sband->band = band; if (WARN_ON(!sband->n_channels || !sband->n_bitrates)) return -EINVAL; /* * Since cfg80211_disable_40mhz_24ghz is global, we can * modify the sband's ht data even if the driver uses a * global structure for that. */ if (cfg80211_disable_40mhz_24ghz && band == IEEE80211_BAND_2GHZ && sband->ht_cap.ht_supported) { sband->ht_cap.cap &= ~IEEE80211_HT_CAP_SUP_WIDTH_20_40; sband->ht_cap.cap &= ~IEEE80211_HT_CAP_SGI_40; } /* * Since we use a u32 for rate bitmaps in * ieee80211_get_response_rate, we cannot * have more than 32 legacy rates. */ if (WARN_ON(sband->n_bitrates > 32)) return -EINVAL; for (i = 0; i < sband->n_channels; i++) { sband->channels[i].orig_flags = sband->channels[i].flags; sband->channels[i].orig_mag = sband->channels[i].max_antenna_gain; sband->channels[i].orig_mpwr = sband->channels[i].max_power; sband->channels[i].band = band; } have_band = true; } if (!have_band) { WARN_ON(1); return -EINVAL; } if (rdev->wiphy.wowlan.n_patterns) { if (WARN_ON(!rdev->wiphy.wowlan.pattern_min_len || rdev->wiphy.wowlan.pattern_min_len > rdev->wiphy.wowlan.pattern_max_len)) return -EINVAL; } /* check and set up bitrates */ ieee80211_set_bitrate_flags(wiphy); mutex_lock(&cfg80211_mutex); res = device_add(&rdev->wiphy.dev); if (res) { mutex_unlock(&cfg80211_mutex); return res; } /* set up regulatory info */ wiphy_update_regulatory(wiphy, NL80211_REGDOM_SET_BY_CORE); list_add_rcu(&rdev->list, &cfg80211_rdev_list); cfg80211_rdev_list_generation++; /* add to debugfs */ rdev->wiphy.debugfsdir = debugfs_create_dir(wiphy_name(&rdev->wiphy), ieee80211_debugfs_dir); if (IS_ERR(rdev->wiphy.debugfsdir)) rdev->wiphy.debugfsdir = NULL; if (wiphy->flags & WIPHY_FLAG_CUSTOM_REGULATORY) { struct regulatory_request request; request.wiphy_idx = get_wiphy_idx(wiphy); request.initiator = NL80211_REGDOM_SET_BY_DRIVER; request.alpha2[0] = '9'; request.alpha2[1] = '9'; nl80211_send_reg_change_event(&request); } cfg80211_debugfs_rdev_add(rdev); mutex_unlock(&cfg80211_mutex); /* * due to a locking dependency this has to be outside of the * cfg80211_mutex lock */ res = rfkill_register(rdev->rfkill); if (res) goto out_rm_dev; return 0; out_rm_dev: device_del(&rdev->wiphy.dev); return res; } EXPORT_SYMBOL(wiphy_register); void wiphy_rfkill_start_polling(struct wiphy *wiphy) { struct cfg80211_registered_device *rdev = wiphy_to_dev(wiphy); if (!rdev->ops->rfkill_poll) return; rdev->rfkill_ops.poll = cfg80211_rfkill_poll; rfkill_resume_polling(rdev->rfkill); } EXPORT_SYMBOL(wiphy_rfkill_start_polling); void wiphy_rfkill_stop_polling(struct wiphy *wiphy) { struct cfg80211_registered_device *rdev = wiphy_to_dev(wiphy); rfkill_pause_polling(rdev->rfkill); } EXPORT_SYMBOL(wiphy_rfkill_stop_polling); void wiphy_unregister(struct wiphy *wiphy) { struct cfg80211_registered_device *rdev = wiphy_to_dev(wiphy); rfkill_unregister(rdev->rfkill); /* protect the device list */ mutex_lock(&cfg80211_mutex); wait_event(rdev->dev_wait, ({ int __count; mutex_lock(&rdev->devlist_mtx); __count = rdev->opencount; mutex_unlock(&rdev->devlist_mtx); __count == 0;})); mutex_lock(&rdev->devlist_mtx); BUG_ON(!list_empty(&rdev->netdev_list)); mutex_unlock(&rdev->devlist_mtx); /* * First remove the hardware from everywhere, this makes * it impossible to find from userspace. */ debugfs_remove_recursive(rdev->wiphy.debugfsdir); list_del_rcu(&rdev->list); synchronize_rcu(); /* * Try to grab rdev->mtx. If a command is still in progress, * hopefully the driver will refuse it since it's tearing * down the device already. We wait for this command to complete * before unlinking the item from the list. * Note: as codified by the BUG_ON above we cannot get here if * a virtual interface is still present. Hence, we can only get * to lock contention here if userspace issues a command that * identified the hardware by wiphy index. */ cfg80211_lock_rdev(rdev); /* nothing */ cfg80211_unlock_rdev(rdev); /* If this device got a regulatory hint tell core its * free to listen now to a new shiny device regulatory hint */ reg_device_remove(wiphy); cfg80211_rdev_list_generation++; device_del(&rdev->wiphy.dev); mutex_unlock(&cfg80211_mutex); flush_work(&rdev->scan_done_wk); cancel_work_sync(&rdev->conn_work); flush_work(&rdev->event_work); } EXPORT_SYMBOL(wiphy_unregister); void cfg80211_dev_free(struct cfg80211_registered_device *rdev) { struct cfg80211_internal_bss *scan, *tmp; rfkill_destroy(rdev->rfkill); mutex_destroy(&rdev->mtx); mutex_destroy(&rdev->devlist_mtx); mutex_destroy(&rdev->sched_scan_mtx); list_for_each_entry_safe(scan, tmp, &rdev->bss_list, list) cfg80211_put_bss(&scan->pub); cfg80211_rdev_free_wowlan(rdev); kfree(rdev); } void wiphy_free(struct wiphy *wiphy) { put_device(&wiphy->dev); } EXPORT_SYMBOL(wiphy_free); void wiphy_rfkill_set_hw_state(struct wiphy *wiphy, bool blocked) { struct cfg80211_registered_device *rdev = wiphy_to_dev(wiphy); if (rfkill_set_hw_state(rdev->rfkill, blocked)) schedule_work(&rdev->rfkill_sync); } EXPORT_SYMBOL(wiphy_rfkill_set_hw_state); static void wdev_cleanup_work(struct work_struct *work) { struct wireless_dev *wdev; struct cfg80211_registered_device *rdev; wdev = container_of(work, struct wireless_dev, cleanup_work); rdev = wiphy_to_dev(wdev->wiphy); cfg80211_lock_rdev(rdev); if (WARN_ON(rdev->scan_req && rdev->scan_req->dev == wdev->netdev)) { rdev->scan_req->aborted = true; ___cfg80211_scan_done(rdev, true); } cfg80211_unlock_rdev(rdev); mutex_lock(&rdev->sched_scan_mtx); if (WARN_ON(rdev->sched_scan_req && rdev->sched_scan_req->dev == wdev->netdev)) { __cfg80211_stop_sched_scan(rdev, false); } mutex_unlock(&rdev->sched_scan_mtx); mutex_lock(&rdev->devlist_mtx); rdev->opencount--; mutex_unlock(&rdev->devlist_mtx); wake_up(&rdev->dev_wait); dev_put(wdev->netdev); } static struct device_type wiphy_type = { .name = "wlan", }; static int cfg80211_netdev_notifier_call(struct notifier_block * nb, unsigned long state, void *ndev) { struct net_device *dev = ndev; struct wireless_dev *wdev = dev->ieee80211_ptr; struct cfg80211_registered_device *rdev; int ret; if (!wdev) return NOTIFY_DONE; rdev = wiphy_to_dev(wdev->wiphy); WARN_ON(wdev->iftype == NL80211_IFTYPE_UNSPECIFIED); switch (state) { case NETDEV_POST_INIT: SET_NETDEV_DEVTYPE(dev, &wiphy_type); break; case NETDEV_REGISTER: /* * NB: cannot take rdev->mtx here because this may be * called within code protected by it when interfaces * are added with nl80211. */ mutex_init(&wdev->mtx); INIT_WORK(&wdev->cleanup_work, wdev_cleanup_work); INIT_LIST_HEAD(&wdev->event_list); spin_lock_init(&wdev->event_lock); INIT_LIST_HEAD(&wdev->mgmt_registrations); spin_lock_init(&wdev->mgmt_registrations_lock); mutex_lock(&rdev->devlist_mtx); list_add_rcu(&wdev->list, &rdev->netdev_list); rdev->devlist_generation++; /* can only change netns with wiphy */ dev->features |= NETIF_F_NETNS_LOCAL; if (sysfs_create_link(&dev->dev.kobj, &rdev->wiphy.dev.kobj, "phy80211")) { pr_err("failed to add phy80211 symlink to netdev!\n"); } wdev->netdev = dev; wdev->sme_state = CFG80211_SME_IDLE; mutex_unlock(&rdev->devlist_mtx); #ifdef CONFIG_CFG80211_WEXT wdev->wext.default_key = -1; wdev->wext.default_mgmt_key = -1; wdev->wext.connect.auth_type = NL80211_AUTHTYPE_AUTOMATIC; #endif if (wdev->wiphy->flags & WIPHY_FLAG_PS_ON_BY_DEFAULT) wdev->ps = true; else wdev->ps = false; /* allow mac80211 to determine the timeout */ wdev->ps_timeout = -1; if (!dev->ethtool_ops) dev->ethtool_ops = &cfg80211_ethtool_ops; if ((wdev->iftype == NL80211_IFTYPE_STATION || wdev->iftype == NL80211_IFTYPE_P2P_CLIENT || wdev->iftype == NL80211_IFTYPE_ADHOC) && !wdev->use_4addr) dev->priv_flags |= IFF_DONT_BRIDGE; break; case NETDEV_GOING_DOWN: switch (wdev->iftype) { case NL80211_IFTYPE_ADHOC: cfg80211_leave_ibss(rdev, dev, true); break; case NL80211_IFTYPE_P2P_CLIENT: case NL80211_IFTYPE_STATION: mutex_lock(&rdev->sched_scan_mtx); __cfg80211_stop_sched_scan(rdev, false); mutex_unlock(&rdev->sched_scan_mtx); wdev_lock(wdev); #ifdef CONFIG_CFG80211_WEXT kfree(wdev->wext.ie); wdev->wext.ie = NULL; wdev->wext.ie_len = 0; wdev->wext.connect.auth_type = NL80211_AUTHTYPE_AUTOMATIC; #endif __cfg80211_disconnect(rdev, dev, WLAN_REASON_DEAUTH_LEAVING, true); cfg80211_mlme_down(rdev, dev); wdev_unlock(wdev); break; case NL80211_IFTYPE_MESH_POINT: cfg80211_leave_mesh(rdev, dev); break; default: break; } wdev->beacon_interval = 0; break; case NETDEV_DOWN: dev_hold(dev); queue_work(cfg80211_wq, &wdev->cleanup_work); break; case NETDEV_UP: /* * If we have a really quick DOWN/UP succession we may * have this work still pending ... cancel it and see * if it was pending, in which case we need to account * for some of the work it would have done. */ if (cancel_work_sync(&wdev->cleanup_work)) { mutex_lock(&rdev->devlist_mtx); rdev->opencount--; mutex_unlock(&rdev->devlist_mtx); dev_put(dev); } cfg80211_lock_rdev(rdev); mutex_lock(&rdev->devlist_mtx); wdev_lock(wdev); switch (wdev->iftype) { #ifdef CONFIG_CFG80211_WEXT case NL80211_IFTYPE_ADHOC: cfg80211_ibss_wext_join(rdev, wdev); break; case NL80211_IFTYPE_STATION: cfg80211_mgd_wext_connect(rdev, wdev); break; #endif #ifdef CONFIG_MAC80211_MESH case NL80211_IFTYPE_MESH_POINT: { /* backward compat code... */ struct mesh_setup setup; memcpy(&setup, &default_mesh_setup, sizeof(setup)); /* back compat only needed for mesh_id */ setup.mesh_id = wdev->ssid; setup.mesh_id_len = wdev->mesh_id_up_len; if (wdev->mesh_id_up_len) __cfg80211_join_mesh(rdev, dev, &setup, &default_mesh_config); break; } #endif default: break; } wdev_unlock(wdev); rdev->opencount++; mutex_unlock(&rdev->devlist_mtx); cfg80211_unlock_rdev(rdev); /* * Configure power management to the driver here so that its * correctly set also after interface type changes etc. */ if (wdev->iftype == NL80211_IFTYPE_STATION && rdev->ops->set_power_mgmt) if (rdev->ops->set_power_mgmt(wdev->wiphy, dev, wdev->ps, wdev->ps_timeout)) { /* assume this means it's off */ wdev->ps = false; } break; case NETDEV_UNREGISTER: /* * NB: cannot take rdev->mtx here because this may be * called within code protected by it when interfaces * are removed with nl80211. */ mutex_lock(&rdev->devlist_mtx); /* * It is possible to get NETDEV_UNREGISTER * multiple times. To detect that, check * that the interface is still on the list * of registered interfaces, and only then * remove and clean it up. */ if (!list_empty(&wdev->list)) { sysfs_remove_link(&dev->dev.kobj, "phy80211"); list_del_rcu(&wdev->list); rdev->devlist_generation++; cfg80211_mlme_purge_registrations(wdev); #ifdef CONFIG_CFG80211_WEXT kfree(wdev->wext.keys); #endif } mutex_unlock(&rdev->devlist_mtx); /* * synchronise (so that we won't find this netdev * from other code any more) and then clear the list * head so that the above code can safely check for * !list_empty() to avoid double-cleanup. */ synchronize_rcu(); INIT_LIST_HEAD(&wdev->list); break; case NETDEV_PRE_UP: if (!(wdev->wiphy->interface_modes & BIT(wdev->iftype))) return notifier_from_errno(-EOPNOTSUPP); if (rfkill_blocked(rdev->rfkill)) return notifier_from_errno(-ERFKILL); ret = cfg80211_can_add_interface(rdev, wdev->iftype); if (ret) return notifier_from_errno(ret); break; } return NOTIFY_DONE; } static struct notifier_block cfg80211_netdev_notifier = { .notifier_call = cfg80211_netdev_notifier_call, }; static void __net_exit cfg80211_pernet_exit(struct net *net) { struct cfg80211_registered_device *rdev; rtnl_lock(); mutex_lock(&cfg80211_mutex); list_for_each_entry(rdev, &cfg80211_rdev_list, list) { if (net_eq(wiphy_net(&rdev->wiphy), net)) WARN_ON(cfg80211_switch_netns(rdev, &init_net)); } mutex_unlock(&cfg80211_mutex); rtnl_unlock(); } static struct pernet_operations cfg80211_pernet_ops = { .exit = cfg80211_pernet_exit, }; static int __init cfg80211_init(void) { int err; err = register_pernet_device(&cfg80211_pernet_ops); if (err) goto out_fail_pernet; err = wiphy_sysfs_init(); if (err) goto out_fail_sysfs; err = register_netdevice_notifier(&cfg80211_netdev_notifier); if (err) goto out_fail_notifier; err = nl80211_init(); if (err) goto out_fail_nl80211; ieee80211_debugfs_dir = debugfs_create_dir("ieee80211", NULL); err = regulatory_init(); if (err) goto out_fail_reg; cfg80211_wq = create_singlethread_workqueue("cfg80211"); if (!cfg80211_wq) goto out_fail_wq; return 0; out_fail_wq: regulatory_exit(); out_fail_reg: debugfs_remove(ieee80211_debugfs_dir); out_fail_nl80211: unregister_netdevice_notifier(&cfg80211_netdev_notifier); out_fail_notifier: wiphy_sysfs_exit(); out_fail_sysfs: unregister_pernet_device(&cfg80211_pernet_ops); out_fail_pernet: return err; } subsys_initcall(cfg80211_init); static void __exit cfg80211_exit(void) { debugfs_remove(ieee80211_debugfs_dir); nl80211_exit(); unregister_netdevice_notifier(&cfg80211_netdev_notifier); wiphy_sysfs_exit(); regulatory_exit(); unregister_pernet_device(&cfg80211_pernet_ops); destroy_workqueue(cfg80211_wq); } module_exit(cfg80211_exit);
gpl-2.0
ggsamsa/sched_casio
sound/isa/msnd/msnd_pinnacle.c
1427
31268
/********************************************************************* * * Linux multisound pinnacle/fiji driver for ALSA. * * 2002/06/30 Karsten Wiese: * for now this is only used to build a pinnacle / fiji driver. * the OSS parent of this code is designed to also support * the multisound classic via the file msnd_classic.c. * to make it easier for some brave heart to implemt classic * support in alsa, i left all the MSND_CLASSIC tokens in this file. * but for now this untested & undone. * * * ripped from linux kernel 2.4.18 by Karsten Wiese. * * the following is a copy of the 2.4.18 OSS FREE file-heading comment: * * Turtle Beach MultiSound Sound Card Driver for Linux * msnd_pinnacle.c / msnd_classic.c * * -- If MSND_CLASSIC is defined: * * -> driver for Turtle Beach Classic/Monterey/Tahiti * * -- Else * * -> driver for Turtle Beach Pinnacle/Fiji * * 12-3-2000 Modified IO port validation Steve Sycamore * * Copyright (C) 1998 Andrew Veliath * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. * ********************************************************************/ #include <linux/kernel.h> #include <linux/module.h> #include <linux/interrupt.h> #include <linux/types.h> #include <linux/delay.h> #include <linux/ioport.h> #include <linux/firmware.h> #include <linux/isa.h> #include <linux/isapnp.h> #include <linux/irq.h> #include <linux/io.h> #include <sound/core.h> #include <sound/initval.h> #include <sound/asound.h> #include <sound/pcm.h> #include <sound/mpu401.h> #ifdef MSND_CLASSIC # ifndef __alpha__ # define SLOWIO # endif #endif #include "msnd.h" #ifdef MSND_CLASSIC # include "msnd_classic.h" # define LOGNAME "msnd_classic" #else # include "msnd_pinnacle.h" # define LOGNAME "snd_msnd_pinnacle" #endif static void __devinit set_default_audio_parameters(struct snd_msnd *chip) { chip->play_sample_size = DEFSAMPLESIZE; chip->play_sample_rate = DEFSAMPLERATE; chip->play_channels = DEFCHANNELS; chip->capture_sample_size = DEFSAMPLESIZE; chip->capture_sample_rate = DEFSAMPLERATE; chip->capture_channels = DEFCHANNELS; } static void snd_msnd_eval_dsp_msg(struct snd_msnd *chip, u16 wMessage) { switch (HIBYTE(wMessage)) { case HIMT_PLAY_DONE: { if (chip->banksPlayed < 3) snd_printdd("%08X: HIMT_PLAY_DONE: %i\n", (unsigned)jiffies, LOBYTE(wMessage)); if (chip->last_playbank == LOBYTE(wMessage)) { snd_printdd("chip.last_playbank == LOBYTE(wMessage)\n"); break; } chip->banksPlayed++; if (test_bit(F_WRITING, &chip->flags)) snd_msnd_DAPQ(chip, 0); chip->last_playbank = LOBYTE(wMessage); chip->playDMAPos += chip->play_period_bytes; if (chip->playDMAPos > chip->playLimit) chip->playDMAPos = 0; snd_pcm_period_elapsed(chip->playback_substream); break; } case HIMT_RECORD_DONE: if (chip->last_recbank == LOBYTE(wMessage)) break; chip->last_recbank = LOBYTE(wMessage); chip->captureDMAPos += chip->capturePeriodBytes; if (chip->captureDMAPos > (chip->captureLimit)) chip->captureDMAPos = 0; if (test_bit(F_READING, &chip->flags)) snd_msnd_DARQ(chip, chip->last_recbank); snd_pcm_period_elapsed(chip->capture_substream); break; case HIMT_DSP: switch (LOBYTE(wMessage)) { #ifndef MSND_CLASSIC case HIDSP_PLAY_UNDER: #endif case HIDSP_INT_PLAY_UNDER: snd_printd(KERN_WARNING LOGNAME ": Play underflow %i\n", chip->banksPlayed); if (chip->banksPlayed > 2) clear_bit(F_WRITING, &chip->flags); break; case HIDSP_INT_RECORD_OVER: snd_printd(KERN_WARNING LOGNAME ": Record overflow\n"); clear_bit(F_READING, &chip->flags); break; default: snd_printd(KERN_WARNING LOGNAME ": DSP message %d 0x%02x\n", LOBYTE(wMessage), LOBYTE(wMessage)); break; } break; case HIMT_MIDI_IN_UCHAR: if (chip->msndmidi_mpu) snd_msndmidi_input_read(chip->msndmidi_mpu); break; default: snd_printd(KERN_WARNING LOGNAME ": HIMT message %d 0x%02x\n", HIBYTE(wMessage), HIBYTE(wMessage)); break; } } static irqreturn_t snd_msnd_interrupt(int irq, void *dev_id) { struct snd_msnd *chip = dev_id; void *pwDSPQData = chip->mappedbase + DSPQ_DATA_BUFF; /* Send ack to DSP */ /* inb(chip->io + HP_RXL); */ /* Evaluate queued DSP messages */ while (readw(chip->DSPQ + JQS_wTail) != readw(chip->DSPQ + JQS_wHead)) { u16 wTmp; snd_msnd_eval_dsp_msg(chip, readw(pwDSPQData + 2 * readw(chip->DSPQ + JQS_wHead))); wTmp = readw(chip->DSPQ + JQS_wHead) + 1; if (wTmp > readw(chip->DSPQ + JQS_wSize)) writew(0, chip->DSPQ + JQS_wHead); else writew(wTmp, chip->DSPQ + JQS_wHead); } /* Send ack to DSP */ inb(chip->io + HP_RXL); return IRQ_HANDLED; } static int snd_msnd_reset_dsp(long io, unsigned char *info) { int timeout = 100; outb(HPDSPRESET_ON, io + HP_DSPR); msleep(1); #ifndef MSND_CLASSIC if (info) *info = inb(io + HP_INFO); #endif outb(HPDSPRESET_OFF, io + HP_DSPR); msleep(1); while (timeout-- > 0) { if (inb(io + HP_CVR) == HP_CVR_DEF) return 0; msleep(1); } snd_printk(KERN_ERR LOGNAME ": Cannot reset DSP\n"); return -EIO; } static int __devinit snd_msnd_probe(struct snd_card *card) { struct snd_msnd *chip = card->private_data; unsigned char info; #ifndef MSND_CLASSIC char *xv, *rev = NULL; char *pin = "TB Pinnacle", *fiji = "TB Fiji"; char *pinfiji = "TB Pinnacle/Fiji"; #endif if (!request_region(chip->io, DSP_NUMIO, "probing")) { snd_printk(KERN_ERR LOGNAME ": I/O port conflict\n"); return -ENODEV; } if (snd_msnd_reset_dsp(chip->io, &info) < 0) { release_region(chip->io, DSP_NUMIO); return -ENODEV; } #ifdef MSND_CLASSIC strcpy(card->shortname, "Classic/Tahiti/Monterey"); strcpy(card->longname, "Turtle Beach Multisound"); printk(KERN_INFO LOGNAME ": %s, " "I/O 0x%lx-0x%lx, IRQ %d, memory mapped to 0x%lX-0x%lX\n", card->shortname, chip->io, chip->io + DSP_NUMIO - 1, chip->irq, chip->base, chip->base + 0x7fff); #else switch (info >> 4) { case 0xf: xv = "<= 1.15"; break; case 0x1: xv = "1.18/1.2"; break; case 0x2: xv = "1.3"; break; case 0x3: xv = "1.4"; break; default: xv = "unknown"; break; } switch (info & 0x7) { case 0x0: rev = "I"; strcpy(card->shortname, pin); break; case 0x1: rev = "F"; strcpy(card->shortname, pin); break; case 0x2: rev = "G"; strcpy(card->shortname, pin); break; case 0x3: rev = "H"; strcpy(card->shortname, pin); break; case 0x4: rev = "E"; strcpy(card->shortname, fiji); break; case 0x5: rev = "C"; strcpy(card->shortname, fiji); break; case 0x6: rev = "D"; strcpy(card->shortname, fiji); break; case 0x7: rev = "A-B (Fiji) or A-E (Pinnacle)"; strcpy(card->shortname, pinfiji); break; } strcpy(card->longname, "Turtle Beach Multisound Pinnacle"); printk(KERN_INFO LOGNAME ": %s revision %s, Xilinx version %s, " "I/O 0x%lx-0x%lx, IRQ %d, memory mapped to 0x%lX-0x%lX\n", card->shortname, rev, xv, chip->io, chip->io + DSP_NUMIO - 1, chip->irq, chip->base, chip->base + 0x7fff); #endif release_region(chip->io, DSP_NUMIO); return 0; } static int snd_msnd_init_sma(struct snd_msnd *chip) { static int initted; u16 mastVolLeft, mastVolRight; unsigned long flags; #ifdef MSND_CLASSIC outb(chip->memid, chip->io + HP_MEMM); #endif outb(HPBLKSEL_0, chip->io + HP_BLKS); /* Motorola 56k shared memory base */ chip->SMA = chip->mappedbase + SMA_STRUCT_START; if (initted) { mastVolLeft = readw(chip->SMA + SMA_wCurrMastVolLeft); mastVolRight = readw(chip->SMA + SMA_wCurrMastVolRight); } else mastVolLeft = mastVolRight = 0; memset_io(chip->mappedbase, 0, 0x8000); /* Critical section: bank 1 access */ spin_lock_irqsave(&chip->lock, flags); outb(HPBLKSEL_1, chip->io + HP_BLKS); memset_io(chip->mappedbase, 0, 0x8000); outb(HPBLKSEL_0, chip->io + HP_BLKS); spin_unlock_irqrestore(&chip->lock, flags); /* Digital audio play queue */ chip->DAPQ = chip->mappedbase + DAPQ_OFFSET; snd_msnd_init_queue(chip->DAPQ, DAPQ_DATA_BUFF, DAPQ_BUFF_SIZE); /* Digital audio record queue */ chip->DARQ = chip->mappedbase + DARQ_OFFSET; snd_msnd_init_queue(chip->DARQ, DARQ_DATA_BUFF, DARQ_BUFF_SIZE); /* MIDI out queue */ chip->MODQ = chip->mappedbase + MODQ_OFFSET; snd_msnd_init_queue(chip->MODQ, MODQ_DATA_BUFF, MODQ_BUFF_SIZE); /* MIDI in queue */ chip->MIDQ = chip->mappedbase + MIDQ_OFFSET; snd_msnd_init_queue(chip->MIDQ, MIDQ_DATA_BUFF, MIDQ_BUFF_SIZE); /* DSP -> host message queue */ chip->DSPQ = chip->mappedbase + DSPQ_OFFSET; snd_msnd_init_queue(chip->DSPQ, DSPQ_DATA_BUFF, DSPQ_BUFF_SIZE); /* Setup some DSP values */ #ifndef MSND_CLASSIC writew(1, chip->SMA + SMA_wCurrPlayFormat); writew(chip->play_sample_size, chip->SMA + SMA_wCurrPlaySampleSize); writew(chip->play_channels, chip->SMA + SMA_wCurrPlayChannels); writew(chip->play_sample_rate, chip->SMA + SMA_wCurrPlaySampleRate); #endif writew(chip->play_sample_rate, chip->SMA + SMA_wCalFreqAtoD); writew(mastVolLeft, chip->SMA + SMA_wCurrMastVolLeft); writew(mastVolRight, chip->SMA + SMA_wCurrMastVolRight); #ifndef MSND_CLASSIC writel(0x00010000, chip->SMA + SMA_dwCurrPlayPitch); writel(0x00000001, chip->SMA + SMA_dwCurrPlayRate); #endif writew(0x303, chip->SMA + SMA_wCurrInputTagBits); initted = 1; return 0; } static int upload_dsp_code(struct snd_card *card) { struct snd_msnd *chip = card->private_data; const struct firmware *init_fw = NULL, *perm_fw = NULL; int err; outb(HPBLKSEL_0, chip->io + HP_BLKS); err = request_firmware(&init_fw, INITCODEFILE, card->dev); if (err < 0) { printk(KERN_ERR LOGNAME ": Error loading " INITCODEFILE); goto cleanup1; } err = request_firmware(&perm_fw, PERMCODEFILE, card->dev); if (err < 0) { printk(KERN_ERR LOGNAME ": Error loading " PERMCODEFILE); goto cleanup; } memcpy_toio(chip->mappedbase, perm_fw->data, perm_fw->size); if (snd_msnd_upload_host(chip, init_fw->data, init_fw->size) < 0) { printk(KERN_WARNING LOGNAME ": Error uploading to DSP\n"); err = -ENODEV; goto cleanup; } printk(KERN_INFO LOGNAME ": DSP firmware uploaded\n"); err = 0; cleanup: release_firmware(perm_fw); cleanup1: release_firmware(init_fw); return err; } #ifdef MSND_CLASSIC static void reset_proteus(struct snd_msnd *chip) { outb(HPPRORESET_ON, chip->io + HP_PROR); msleep(TIME_PRO_RESET); outb(HPPRORESET_OFF, chip->io + HP_PROR); msleep(TIME_PRO_RESET_DONE); } #endif static int snd_msnd_initialize(struct snd_card *card) { struct snd_msnd *chip = card->private_data; int err, timeout; #ifdef MSND_CLASSIC outb(HPWAITSTATE_0, chip->io + HP_WAIT); outb(HPBITMODE_16, chip->io + HP_BITM); reset_proteus(chip); #endif err = snd_msnd_init_sma(chip); if (err < 0) { printk(KERN_WARNING LOGNAME ": Cannot initialize SMA\n"); return err; } err = snd_msnd_reset_dsp(chip->io, NULL); if (err < 0) return err; err = upload_dsp_code(card); if (err < 0) { printk(KERN_WARNING LOGNAME ": Cannot upload DSP code\n"); return err; } timeout = 200; while (readw(chip->mappedbase)) { msleep(1); if (!timeout--) { snd_printd(KERN_ERR LOGNAME ": DSP reset timeout\n"); return -EIO; } } snd_msndmix_setup(chip); return 0; } static int snd_msnd_dsp_full_reset(struct snd_card *card) { struct snd_msnd *chip = card->private_data; int rv; if (test_bit(F_RESETTING, &chip->flags) || ++chip->nresets > 10) return 0; set_bit(F_RESETTING, &chip->flags); snd_msnd_dsp_halt(chip, NULL); /* Unconditionally halt */ rv = snd_msnd_initialize(card); if (rv) printk(KERN_WARNING LOGNAME ": DSP reset failed\n"); snd_msndmix_force_recsrc(chip, 0); clear_bit(F_RESETTING, &chip->flags); return rv; } static int snd_msnd_dev_free(struct snd_device *device) { snd_printdd("snd_msnd_chip_free()\n"); return 0; } static int snd_msnd_send_dsp_cmd_chk(struct snd_msnd *chip, u8 cmd) { if (snd_msnd_send_dsp_cmd(chip, cmd) == 0) return 0; snd_msnd_dsp_full_reset(chip->card); return snd_msnd_send_dsp_cmd(chip, cmd); } static int __devinit snd_msnd_calibrate_adc(struct snd_msnd *chip, u16 srate) { snd_printdd("snd_msnd_calibrate_adc(%i)\n", srate); writew(srate, chip->SMA + SMA_wCalFreqAtoD); if (chip->calibrate_signal == 0) writew(readw(chip->SMA + SMA_wCurrHostStatusFlags) | 0x0001, chip->SMA + SMA_wCurrHostStatusFlags); else writew(readw(chip->SMA + SMA_wCurrHostStatusFlags) & ~0x0001, chip->SMA + SMA_wCurrHostStatusFlags); if (snd_msnd_send_word(chip, 0, 0, HDEXAR_CAL_A_TO_D) == 0 && snd_msnd_send_dsp_cmd_chk(chip, HDEX_AUX_REQ) == 0) { schedule_timeout_interruptible(msecs_to_jiffies(333)); return 0; } printk(KERN_WARNING LOGNAME ": ADC calibration failed\n"); return -EIO; } /* * ALSA callback function, called when attempting to open the MIDI device. */ static int snd_msnd_mpu401_open(struct snd_mpu401 *mpu) { snd_msnd_enable_irq(mpu->private_data); snd_msnd_send_dsp_cmd(mpu->private_data, HDEX_MIDI_IN_START); return 0; } static void snd_msnd_mpu401_close(struct snd_mpu401 *mpu) { snd_msnd_send_dsp_cmd(mpu->private_data, HDEX_MIDI_IN_STOP); snd_msnd_disable_irq(mpu->private_data); } static long mpu_io[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; static int mpu_irq[SNDRV_CARDS] = SNDRV_DEFAULT_IRQ; static int __devinit snd_msnd_attach(struct snd_card *card) { struct snd_msnd *chip = card->private_data; int err; static struct snd_device_ops ops = { .dev_free = snd_msnd_dev_free, }; err = request_irq(chip->irq, snd_msnd_interrupt, 0, card->shortname, chip); if (err < 0) { printk(KERN_ERR LOGNAME ": Couldn't grab IRQ %d\n", chip->irq); return err; } request_region(chip->io, DSP_NUMIO, card->shortname); if (!request_mem_region(chip->base, BUFFSIZE, card->shortname)) { printk(KERN_ERR LOGNAME ": unable to grab memory region 0x%lx-0x%lx\n", chip->base, chip->base + BUFFSIZE - 1); release_region(chip->io, DSP_NUMIO); free_irq(chip->irq, chip); return -EBUSY; } chip->mappedbase = ioremap_nocache(chip->base, 0x8000); if (!chip->mappedbase) { printk(KERN_ERR LOGNAME ": unable to map memory region 0x%lx-0x%lx\n", chip->base, chip->base + BUFFSIZE - 1); err = -EIO; goto err_release_region; } err = snd_msnd_dsp_full_reset(card); if (err < 0) goto err_release_region; /* Register device */ err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops); if (err < 0) goto err_release_region; err = snd_msnd_pcm(card, 0, NULL); if (err < 0) { printk(KERN_ERR LOGNAME ": error creating new PCM device\n"); goto err_release_region; } err = snd_msndmix_new(card); if (err < 0) { printk(KERN_ERR LOGNAME ": error creating new Mixer device\n"); goto err_release_region; } if (mpu_io[0] != SNDRV_AUTO_PORT) { struct snd_mpu401 *mpu; err = snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401, mpu_io[0], MPU401_MODE_INPUT | MPU401_MODE_OUTPUT, mpu_irq[0], IRQF_DISABLED, &chip->rmidi); if (err < 0) { printk(KERN_ERR LOGNAME ": error creating new Midi device\n"); goto err_release_region; } mpu = chip->rmidi->private_data; mpu->open_input = snd_msnd_mpu401_open; mpu->close_input = snd_msnd_mpu401_close; mpu->private_data = chip; } disable_irq(chip->irq); snd_msnd_calibrate_adc(chip, chip->play_sample_rate); snd_msndmix_force_recsrc(chip, 0); err = snd_card_register(card); if (err < 0) goto err_release_region; return 0; err_release_region: if (chip->mappedbase) iounmap(chip->mappedbase); release_mem_region(chip->base, BUFFSIZE); release_region(chip->io, DSP_NUMIO); free_irq(chip->irq, chip); return err; } static void __devexit snd_msnd_unload(struct snd_card *card) { struct snd_msnd *chip = card->private_data; iounmap(chip->mappedbase); release_mem_region(chip->base, BUFFSIZE); release_region(chip->io, DSP_NUMIO); free_irq(chip->irq, chip); snd_card_free(card); } #ifndef MSND_CLASSIC /* Pinnacle/Fiji Logical Device Configuration */ static int __devinit snd_msnd_write_cfg(int cfg, int reg, int value) { outb(reg, cfg); outb(value, cfg + 1); if (value != inb(cfg + 1)) { printk(KERN_ERR LOGNAME ": snd_msnd_write_cfg: I/O error\n"); return -EIO; } return 0; } static int __devinit snd_msnd_write_cfg_io0(int cfg, int num, u16 io) { if (snd_msnd_write_cfg(cfg, IREG_LOGDEVICE, num)) return -EIO; if (snd_msnd_write_cfg(cfg, IREG_IO0_BASEHI, HIBYTE(io))) return -EIO; if (snd_msnd_write_cfg(cfg, IREG_IO0_BASELO, LOBYTE(io))) return -EIO; return 0; } static int __devinit snd_msnd_write_cfg_io1(int cfg, int num, u16 io) { if (snd_msnd_write_cfg(cfg, IREG_LOGDEVICE, num)) return -EIO; if (snd_msnd_write_cfg(cfg, IREG_IO1_BASEHI, HIBYTE(io))) return -EIO; if (snd_msnd_write_cfg(cfg, IREG_IO1_BASELO, LOBYTE(io))) return -EIO; return 0; } static int __devinit snd_msnd_write_cfg_irq(int cfg, int num, u16 irq) { if (snd_msnd_write_cfg(cfg, IREG_LOGDEVICE, num)) return -EIO; if (snd_msnd_write_cfg(cfg, IREG_IRQ_NUMBER, LOBYTE(irq))) return -EIO; if (snd_msnd_write_cfg(cfg, IREG_IRQ_TYPE, IRQTYPE_EDGE)) return -EIO; return 0; } static int __devinit snd_msnd_write_cfg_mem(int cfg, int num, int mem) { u16 wmem; mem >>= 8; wmem = (u16)(mem & 0xfff); if (snd_msnd_write_cfg(cfg, IREG_LOGDEVICE, num)) return -EIO; if (snd_msnd_write_cfg(cfg, IREG_MEMBASEHI, HIBYTE(wmem))) return -EIO; if (snd_msnd_write_cfg(cfg, IREG_MEMBASELO, LOBYTE(wmem))) return -EIO; if (wmem && snd_msnd_write_cfg(cfg, IREG_MEMCONTROL, MEMTYPE_HIADDR | MEMTYPE_16BIT)) return -EIO; return 0; } static int __devinit snd_msnd_activate_logical(int cfg, int num) { if (snd_msnd_write_cfg(cfg, IREG_LOGDEVICE, num)) return -EIO; if (snd_msnd_write_cfg(cfg, IREG_ACTIVATE, LD_ACTIVATE)) return -EIO; return 0; } static int __devinit snd_msnd_write_cfg_logical(int cfg, int num, u16 io0, u16 io1, u16 irq, int mem) { if (snd_msnd_write_cfg(cfg, IREG_LOGDEVICE, num)) return -EIO; if (snd_msnd_write_cfg_io0(cfg, num, io0)) return -EIO; if (snd_msnd_write_cfg_io1(cfg, num, io1)) return -EIO; if (snd_msnd_write_cfg_irq(cfg, num, irq)) return -EIO; if (snd_msnd_write_cfg_mem(cfg, num, mem)) return -EIO; if (snd_msnd_activate_logical(cfg, num)) return -EIO; return 0; } static int __devinit snd_msnd_pinnacle_cfg_reset(int cfg) { int i; /* Reset devices if told to */ printk(KERN_INFO LOGNAME ": Resetting all devices\n"); for (i = 0; i < 4; ++i) if (snd_msnd_write_cfg_logical(cfg, i, 0, 0, 0, 0)) return -EIO; return 0; } #endif static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ module_param_array(index, int, NULL, S_IRUGO); MODULE_PARM_DESC(index, "Index value for msnd_pinnacle soundcard."); module_param_array(id, charp, NULL, S_IRUGO); MODULE_PARM_DESC(id, "ID string for msnd_pinnacle soundcard."); static long io[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; static int irq[SNDRV_CARDS] = SNDRV_DEFAULT_IRQ; static long mem[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; static long cfg[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; #ifndef MSND_CLASSIC /* Extra Peripheral Configuration (Default: Disable) */ static long ide_io0[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; static long ide_io1[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; static int ide_irq[SNDRV_CARDS] = SNDRV_DEFAULT_IRQ; static long joystick_io[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; /* If we have the digital daugherboard... */ static int digital[SNDRV_CARDS]; /* Extra Peripheral Configuration */ static int reset[SNDRV_CARDS]; #endif static int write_ndelay[SNDRV_CARDS] = { [0 ... (SNDRV_CARDS-1)] = 1 }; static int calibrate_signal; #ifdef CONFIG_PNP static int isapnp[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; module_param_array(isapnp, bool, NULL, 0444); MODULE_PARM_DESC(isapnp, "ISA PnP detection for specified soundcard."); #define has_isapnp(x) isapnp[x] #else #define has_isapnp(x) 0 #endif MODULE_AUTHOR("Karsten Wiese <annabellesgarden@yahoo.de>"); MODULE_DESCRIPTION("Turtle Beach " LONGNAME " Linux Driver"); MODULE_LICENSE("GPL"); MODULE_FIRMWARE(INITCODEFILE); MODULE_FIRMWARE(PERMCODEFILE); module_param_array(io, long, NULL, S_IRUGO); MODULE_PARM_DESC(io, "IO port #"); module_param_array(irq, int, NULL, S_IRUGO); module_param_array(mem, long, NULL, S_IRUGO); module_param_array(write_ndelay, int, NULL, S_IRUGO); module_param(calibrate_signal, int, S_IRUGO); #ifndef MSND_CLASSIC module_param_array(digital, int, NULL, S_IRUGO); module_param_array(cfg, long, NULL, S_IRUGO); module_param_array(reset, int, 0, S_IRUGO); module_param_array(mpu_io, long, NULL, S_IRUGO); module_param_array(mpu_irq, int, NULL, S_IRUGO); module_param_array(ide_io0, long, NULL, S_IRUGO); module_param_array(ide_io1, long, NULL, S_IRUGO); module_param_array(ide_irq, int, NULL, S_IRUGO); module_param_array(joystick_io, long, NULL, S_IRUGO); #endif static int __devinit snd_msnd_isa_match(struct device *pdev, unsigned int i) { if (io[i] == SNDRV_AUTO_PORT) return 0; if (irq[i] == SNDRV_AUTO_PORT || mem[i] == SNDRV_AUTO_PORT) { printk(KERN_WARNING LOGNAME ": io, irq and mem must be set\n"); return 0; } #ifdef MSND_CLASSIC if (!(io[i] == 0x290 || io[i] == 0x260 || io[i] == 0x250 || io[i] == 0x240 || io[i] == 0x230 || io[i] == 0x220 || io[i] == 0x210 || io[i] == 0x3e0)) { printk(KERN_ERR LOGNAME ": \"io\" - DSP I/O base must be set " " to 0x210, 0x220, 0x230, 0x240, 0x250, 0x260, 0x290, " "or 0x3E0\n"); return 0; } #else if (io[i] < 0x100 || io[i] > 0x3e0 || (io[i] % 0x10) != 0) { printk(KERN_ERR LOGNAME ": \"io\" - DSP I/O base must within the range 0x100 " "to 0x3E0 and must be evenly divisible by 0x10\n"); return 0; } #endif /* MSND_CLASSIC */ if (!(irq[i] == 5 || irq[i] == 7 || irq[i] == 9 || irq[i] == 10 || irq[i] == 11 || irq[i] == 12)) { printk(KERN_ERR LOGNAME ": \"irq\" - must be set to 5, 7, 9, 10, 11 or 12\n"); return 0; } if (!(mem[i] == 0xb0000 || mem[i] == 0xc8000 || mem[i] == 0xd0000 || mem[i] == 0xd8000 || mem[i] == 0xe0000 || mem[i] == 0xe8000)) { printk(KERN_ERR LOGNAME ": \"mem\" - must be set to " "0xb0000, 0xc8000, 0xd0000, 0xd8000, 0xe0000 or " "0xe8000\n"); return 0; } #ifndef MSND_CLASSIC if (cfg[i] == SNDRV_AUTO_PORT) { printk(KERN_INFO LOGNAME ": Assuming PnP mode\n"); } else if (cfg[i] != 0x250 && cfg[i] != 0x260 && cfg[i] != 0x270) { printk(KERN_INFO LOGNAME ": Config port must be 0x250, 0x260 or 0x270 " "(or unspecified for PnP mode)\n"); return 0; } #endif /* MSND_CLASSIC */ return 1; } static int __devinit snd_msnd_isa_probe(struct device *pdev, unsigned int idx) { int err; struct snd_card *card; struct snd_msnd *chip; if (has_isapnp(idx) || cfg[idx] == SNDRV_AUTO_PORT) { printk(KERN_INFO LOGNAME ": Assuming PnP mode\n"); return -ENODEV; } err = snd_card_create(index[idx], id[idx], THIS_MODULE, sizeof(struct snd_msnd), &card); if (err < 0) return err; snd_card_set_dev(card, pdev); chip = card->private_data; chip->card = card; #ifdef MSND_CLASSIC switch (irq[idx]) { case 5: chip->irqid = HPIRQ_5; break; case 7: chip->irqid = HPIRQ_7; break; case 9: chip->irqid = HPIRQ_9; break; case 10: chip->irqid = HPIRQ_10; break; case 11: chip->irqid = HPIRQ_11; break; case 12: chip->irqid = HPIRQ_12; break; } switch (mem[idx]) { case 0xb0000: chip->memid = HPMEM_B000; break; case 0xc8000: chip->memid = HPMEM_C800; break; case 0xd0000: chip->memid = HPMEM_D000; break; case 0xd8000: chip->memid = HPMEM_D800; break; case 0xe0000: chip->memid = HPMEM_E000; break; case 0xe8000: chip->memid = HPMEM_E800; break; } #else printk(KERN_INFO LOGNAME ": Non-PnP mode: configuring at port 0x%lx\n", cfg[idx]); if (!request_region(cfg[idx], 2, "Pinnacle/Fiji Config")) { printk(KERN_ERR LOGNAME ": Config port 0x%lx conflict\n", cfg[idx]); snd_card_free(card); return -EIO; } if (reset[idx]) if (snd_msnd_pinnacle_cfg_reset(cfg[idx])) { err = -EIO; goto cfg_error; } /* DSP */ err = snd_msnd_write_cfg_logical(cfg[idx], 0, io[idx], 0, irq[idx], mem[idx]); if (err) goto cfg_error; /* The following are Pinnacle specific */ /* MPU */ if (mpu_io[idx] != SNDRV_AUTO_PORT && mpu_irq[idx] != SNDRV_AUTO_IRQ) { printk(KERN_INFO LOGNAME ": Configuring MPU to I/O 0x%lx IRQ %d\n", mpu_io[idx], mpu_irq[idx]); err = snd_msnd_write_cfg_logical(cfg[idx], 1, mpu_io[idx], 0, mpu_irq[idx], 0); if (err) goto cfg_error; } /* IDE */ if (ide_io0[idx] != SNDRV_AUTO_PORT && ide_io1[idx] != SNDRV_AUTO_PORT && ide_irq[idx] != SNDRV_AUTO_IRQ) { printk(KERN_INFO LOGNAME ": Configuring IDE to I/O 0x%lx, 0x%lx IRQ %d\n", ide_io0[idx], ide_io1[idx], ide_irq[idx]); err = snd_msnd_write_cfg_logical(cfg[idx], 2, ide_io0[idx], ide_io1[idx], ide_irq[idx], 0); if (err) goto cfg_error; } /* Joystick */ if (joystick_io[idx] != SNDRV_AUTO_PORT) { printk(KERN_INFO LOGNAME ": Configuring joystick to I/O 0x%lx\n", joystick_io[idx]); err = snd_msnd_write_cfg_logical(cfg[idx], 3, joystick_io[idx], 0, 0, 0); if (err) goto cfg_error; } release_region(cfg[idx], 2); #endif /* MSND_CLASSIC */ set_default_audio_parameters(chip); #ifdef MSND_CLASSIC chip->type = msndClassic; #else chip->type = msndPinnacle; #endif chip->io = io[idx]; chip->irq = irq[idx]; chip->base = mem[idx]; chip->calibrate_signal = calibrate_signal ? 1 : 0; chip->recsrc = 0; chip->dspq_data_buff = DSPQ_DATA_BUFF; chip->dspq_buff_size = DSPQ_BUFF_SIZE; if (write_ndelay[idx]) clear_bit(F_DISABLE_WRITE_NDELAY, &chip->flags); else set_bit(F_DISABLE_WRITE_NDELAY, &chip->flags); #ifndef MSND_CLASSIC if (digital[idx]) set_bit(F_HAVEDIGITAL, &chip->flags); #endif spin_lock_init(&chip->lock); err = snd_msnd_probe(card); if (err < 0) { printk(KERN_ERR LOGNAME ": Probe failed\n"); snd_card_free(card); return err; } err = snd_msnd_attach(card); if (err < 0) { printk(KERN_ERR LOGNAME ": Attach failed\n"); snd_card_free(card); return err; } dev_set_drvdata(pdev, card); return 0; #ifndef MSND_CLASSIC cfg_error: release_region(cfg[idx], 2); snd_card_free(card); return err; #endif } static int __devexit snd_msnd_isa_remove(struct device *pdev, unsigned int dev) { snd_msnd_unload(dev_get_drvdata(pdev)); dev_set_drvdata(pdev, NULL); return 0; } #define DEV_NAME "msnd-pinnacle" static struct isa_driver snd_msnd_driver = { .match = snd_msnd_isa_match, .probe = snd_msnd_isa_probe, .remove = __devexit_p(snd_msnd_isa_remove), /* FIXME: suspend, resume */ .driver = { .name = DEV_NAME }, }; #ifdef CONFIG_PNP static int __devinit snd_msnd_pnp_detect(struct pnp_card_link *pcard, const struct pnp_card_device_id *pid) { static int idx; struct pnp_dev *pnp_dev; struct pnp_dev *mpu_dev; struct snd_card *card; struct snd_msnd *chip; int ret; for ( ; idx < SNDRV_CARDS; idx++) { if (has_isapnp(idx)) break; } if (idx >= SNDRV_CARDS) return -ENODEV; /* * Check that we still have room for another sound card ... */ pnp_dev = pnp_request_card_device(pcard, pid->devs[0].id, NULL); if (!pnp_dev) return -ENODEV; mpu_dev = pnp_request_card_device(pcard, pid->devs[1].id, NULL); if (!mpu_dev) return -ENODEV; if (!pnp_is_active(pnp_dev) && pnp_activate_dev(pnp_dev) < 0) { printk(KERN_INFO "msnd_pinnacle: device is inactive\n"); return -EBUSY; } if (!pnp_is_active(mpu_dev) && pnp_activate_dev(mpu_dev) < 0) { printk(KERN_INFO "msnd_pinnacle: MPU device is inactive\n"); return -EBUSY; } /* * Create a new ALSA sound card entry, in anticipation * of detecting our hardware ... */ ret = snd_card_create(index[idx], id[idx], THIS_MODULE, sizeof(struct snd_msnd), &card); if (ret < 0) return ret; chip = card->private_data; chip->card = card; snd_card_set_dev(card, &pcard->card->dev); /* * Read the correct parameters off the ISA PnP bus ... */ io[idx] = pnp_port_start(pnp_dev, 0); irq[idx] = pnp_irq(pnp_dev, 0); mem[idx] = pnp_mem_start(pnp_dev, 0); mpu_io[idx] = pnp_port_start(mpu_dev, 0); mpu_irq[idx] = pnp_irq(mpu_dev, 0); set_default_audio_parameters(chip); #ifdef MSND_CLASSIC chip->type = msndClassic; #else chip->type = msndPinnacle; #endif chip->io = io[idx]; chip->irq = irq[idx]; chip->base = mem[idx]; chip->calibrate_signal = calibrate_signal ? 1 : 0; chip->recsrc = 0; chip->dspq_data_buff = DSPQ_DATA_BUFF; chip->dspq_buff_size = DSPQ_BUFF_SIZE; if (write_ndelay[idx]) clear_bit(F_DISABLE_WRITE_NDELAY, &chip->flags); else set_bit(F_DISABLE_WRITE_NDELAY, &chip->flags); #ifndef MSND_CLASSIC if (digital[idx]) set_bit(F_HAVEDIGITAL, &chip->flags); #endif spin_lock_init(&chip->lock); ret = snd_msnd_probe(card); if (ret < 0) { printk(KERN_ERR LOGNAME ": Probe failed\n"); goto _release_card; } ret = snd_msnd_attach(card); if (ret < 0) { printk(KERN_ERR LOGNAME ": Attach failed\n"); goto _release_card; } pnp_set_card_drvdata(pcard, card); ++idx; return 0; _release_card: snd_card_free(card); return ret; } static void __devexit snd_msnd_pnp_remove(struct pnp_card_link *pcard) { snd_msnd_unload(pnp_get_card_drvdata(pcard)); pnp_set_card_drvdata(pcard, NULL); } static int isa_registered; static int pnp_registered; static struct pnp_card_device_id msnd_pnpids[] = { /* Pinnacle PnP */ { .id = "BVJ0440", .devs = { { "TBS0000" }, { "TBS0001" } } }, { .id = "" } /* end */ }; MODULE_DEVICE_TABLE(pnp_card, msnd_pnpids); static struct pnp_card_driver msnd_pnpc_driver = { .flags = PNP_DRIVER_RES_DO_NOT_CHANGE, .name = "msnd_pinnacle", .id_table = msnd_pnpids, .probe = snd_msnd_pnp_detect, .remove = __devexit_p(snd_msnd_pnp_remove), }; #endif /* CONFIG_PNP */ static int __init snd_msnd_init(void) { int err; err = isa_register_driver(&snd_msnd_driver, SNDRV_CARDS); #ifdef CONFIG_PNP if (!err) isa_registered = 1; err = pnp_register_card_driver(&msnd_pnpc_driver); if (!err) pnp_registered = 1; if (isa_registered) err = 0; #endif return err; } static void __exit snd_msnd_exit(void) { #ifdef CONFIG_PNP if (pnp_registered) pnp_unregister_card_driver(&msnd_pnpc_driver); if (isa_registered) #endif isa_unregister_driver(&snd_msnd_driver); } module_init(snd_msnd_init); module_exit(snd_msnd_exit);
gpl-2.0
ztemt/NX512J_kernel
drivers/net/usb/rndis_host.c
1683
20223
/* * Host Side support for RNDIS Networking Links * Copyright (C) 2005 by David Brownell * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #include <linux/module.h> #include <linux/init.h> #include <linux/netdevice.h> #include <linux/etherdevice.h> #include <linux/ethtool.h> #include <linux/workqueue.h> #include <linux/slab.h> #include <linux/mii.h> #include <linux/usb.h> #include <linux/usb/cdc.h> #include <linux/usb/usbnet.h> #include <linux/usb/rndis_host.h> /* * RNDIS is NDIS remoted over USB. It's a MSFT variant of CDC ACM ... of * course ACM was intended for modems, not Ethernet links! USB's standard * for Ethernet links is "CDC Ethernet", which is significantly simpler. * * NOTE that Microsoft's "RNDIS 1.0" specification is incomplete. Issues * include: * - Power management in particular relies on information that's scattered * through other documentation, and which is incomplete or incorrect even * there. * - There are various undocumented protocol requirements, such as the * need to send unused garbage in control-OUT messages. * - In some cases, MS-Windows will emit undocumented requests; this * matters more to peripheral implementations than host ones. * * Moreover there's a no-open-specs variant of RNDIS called "ActiveSync". * * For these reasons and others, ** USE OF RNDIS IS STRONGLY DISCOURAGED ** in * favor of such non-proprietary alternatives as CDC Ethernet or the newer (and * currently rare) "Ethernet Emulation Model" (EEM). */ /* * RNDIS notifications from device: command completion; "reverse" * keepalives; etc */ void rndis_status(struct usbnet *dev, struct urb *urb) { netdev_dbg(dev->net, "rndis status urb, len %d stat %d\n", urb->actual_length, urb->status); // FIXME for keepalives, respond immediately (asynchronously) // if not an RNDIS status, do like cdc_status(dev,urb) does } EXPORT_SYMBOL_GPL(rndis_status); /* * RNDIS indicate messages. */ static void rndis_msg_indicate(struct usbnet *dev, struct rndis_indicate *msg, int buflen) { struct cdc_state *info = (void *)&dev->data; struct device *udev = &info->control->dev; if (dev->driver_info->indication) { dev->driver_info->indication(dev, msg, buflen); } else { u32 status = le32_to_cpu(msg->status); switch (status) { case RNDIS_STATUS_MEDIA_CONNECT: dev_info(udev, "rndis media connect\n"); break; case RNDIS_STATUS_MEDIA_DISCONNECT: dev_info(udev, "rndis media disconnect\n"); break; default: dev_info(udev, "rndis indication: 0x%08x\n", status); } } } /* * RPC done RNDIS-style. Caller guarantees: * - message is properly byteswapped * - there's no other request pending * - buf can hold up to 1KB response (required by RNDIS spec) * On return, the first few entries are already byteswapped. * * Call context is likely probe(), before interface name is known, * which is why we won't try to use it in the diagnostics. */ int rndis_command(struct usbnet *dev, struct rndis_msg_hdr *buf, int buflen) { struct cdc_state *info = (void *) &dev->data; struct usb_cdc_notification notification; int master_ifnum; int retval; int partial; unsigned count; u32 xid = 0, msg_len, request_id, msg_type, rsp, status; /* REVISIT when this gets called from contexts other than probe() or * disconnect(): either serialize, or dispatch responses on xid */ msg_type = le32_to_cpu(buf->msg_type); /* Issue the request; xid is unique, don't bother byteswapping it */ if (likely(msg_type != RNDIS_MSG_HALT && msg_type != RNDIS_MSG_RESET)) { xid = dev->xid++; if (!xid) xid = dev->xid++; buf->request_id = (__force __le32) xid; } master_ifnum = info->control->cur_altsetting->desc.bInterfaceNumber; retval = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), USB_CDC_SEND_ENCAPSULATED_COMMAND, USB_TYPE_CLASS | USB_RECIP_INTERFACE, 0, master_ifnum, buf, le32_to_cpu(buf->msg_len), RNDIS_CONTROL_TIMEOUT_MS); if (unlikely(retval < 0 || xid == 0)) return retval; /* Some devices don't respond on the control channel until * polled on the status channel, so do that first. */ if (dev->driver_info->data & RNDIS_DRIVER_DATA_POLL_STATUS) { retval = usb_interrupt_msg( dev->udev, usb_rcvintpipe(dev->udev, dev->status->desc.bEndpointAddress), &notification, sizeof(notification), &partial, RNDIS_CONTROL_TIMEOUT_MS); if (unlikely(retval < 0)) return retval; } /* Poll the control channel; the request probably completed immediately */ rsp = le32_to_cpu(buf->msg_type) | RNDIS_MSG_COMPLETION; for (count = 0; count < 10; count++) { memset(buf, 0, CONTROL_BUFFER_SIZE); retval = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), USB_CDC_GET_ENCAPSULATED_RESPONSE, USB_DIR_IN | USB_TYPE_CLASS | USB_RECIP_INTERFACE, 0, master_ifnum, buf, buflen, RNDIS_CONTROL_TIMEOUT_MS); if (likely(retval >= 8)) { msg_type = le32_to_cpu(buf->msg_type); msg_len = le32_to_cpu(buf->msg_len); status = le32_to_cpu(buf->status); request_id = (__force u32) buf->request_id; if (likely(msg_type == rsp)) { if (likely(request_id == xid)) { if (unlikely(rsp == RNDIS_MSG_RESET_C)) return 0; if (likely(RNDIS_STATUS_SUCCESS == status)) return 0; dev_dbg(&info->control->dev, "rndis reply status %08x\n", status); return -EL3RST; } dev_dbg(&info->control->dev, "rndis reply id %d expected %d\n", request_id, xid); /* then likely retry */ } else switch (msg_type) { case RNDIS_MSG_INDICATE: /* fault/event */ rndis_msg_indicate(dev, (void *)buf, buflen); break; case RNDIS_MSG_KEEPALIVE: { /* ping */ struct rndis_keepalive_c *msg = (void *)buf; msg->msg_type = cpu_to_le32(RNDIS_MSG_KEEPALIVE_C); msg->msg_len = cpu_to_le32(sizeof *msg); msg->status = cpu_to_le32(RNDIS_STATUS_SUCCESS); retval = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), USB_CDC_SEND_ENCAPSULATED_COMMAND, USB_TYPE_CLASS | USB_RECIP_INTERFACE, 0, master_ifnum, msg, sizeof *msg, RNDIS_CONTROL_TIMEOUT_MS); if (unlikely(retval < 0)) dev_dbg(&info->control->dev, "rndis keepalive err %d\n", retval); } break; default: dev_dbg(&info->control->dev, "unexpected rndis msg %08x len %d\n", le32_to_cpu(buf->msg_type), msg_len); } } else { /* device probably issued a protocol stall; ignore */ dev_dbg(&info->control->dev, "rndis response error, code %d\n", retval); } msleep(20); } dev_dbg(&info->control->dev, "rndis response timeout\n"); return -ETIMEDOUT; } EXPORT_SYMBOL_GPL(rndis_command); /* * rndis_query: * * Performs a query for @oid along with 0 or more bytes of payload as * specified by @in_len. If @reply_len is not set to -1 then the reply * length is checked against this value, resulting in an error if it * doesn't match. * * NOTE: Adding a payload exactly or greater than the size of the expected * response payload is an evident requirement MSFT added for ActiveSync. * * The only exception is for OIDs that return a variably sized response, * in which case no payload should be added. This undocumented (and * nonsensical!) issue was found by sniffing protocol requests from the * ActiveSync 4.1 Windows driver. */ static int rndis_query(struct usbnet *dev, struct usb_interface *intf, void *buf, u32 oid, u32 in_len, void **reply, int *reply_len) { int retval; union { void *buf; struct rndis_msg_hdr *header; struct rndis_query *get; struct rndis_query_c *get_c; } u; u32 off, len; u.buf = buf; memset(u.get, 0, sizeof *u.get + in_len); u.get->msg_type = cpu_to_le32(RNDIS_MSG_QUERY); u.get->msg_len = cpu_to_le32(sizeof *u.get + in_len); u.get->oid = cpu_to_le32(oid); u.get->len = cpu_to_le32(in_len); u.get->offset = cpu_to_le32(20); retval = rndis_command(dev, u.header, CONTROL_BUFFER_SIZE); if (unlikely(retval < 0)) { dev_err(&intf->dev, "RNDIS_MSG_QUERY(0x%08x) failed, %d\n", oid, retval); return retval; } off = le32_to_cpu(u.get_c->offset); len = le32_to_cpu(u.get_c->len); if (unlikely((8 + off + len) > CONTROL_BUFFER_SIZE)) goto response_error; if (*reply_len != -1 && len != *reply_len) goto response_error; *reply = (unsigned char *) &u.get_c->request_id + off; *reply_len = len; return retval; response_error: dev_err(&intf->dev, "RNDIS_MSG_QUERY(0x%08x) " "invalid response - off %d len %d\n", oid, off, len); return -EDOM; } /* same as usbnet_netdev_ops but MTU change not allowed */ static const struct net_device_ops rndis_netdev_ops = { .ndo_open = usbnet_open, .ndo_stop = usbnet_stop, .ndo_start_xmit = usbnet_start_xmit, .ndo_tx_timeout = usbnet_tx_timeout, .ndo_set_mac_address = eth_mac_addr, .ndo_validate_addr = eth_validate_addr, }; int generic_rndis_bind(struct usbnet *dev, struct usb_interface *intf, int flags) { int retval; struct net_device *net = dev->net; struct cdc_state *info = (void *) &dev->data; union { void *buf; struct rndis_msg_hdr *header; struct rndis_init *init; struct rndis_init_c *init_c; struct rndis_query *get; struct rndis_query_c *get_c; struct rndis_set *set; struct rndis_set_c *set_c; struct rndis_halt *halt; } u; u32 tmp; __le32 phym_unspec, *phym; int reply_len; unsigned char *bp; /* we can't rely on i/o from stack working, or stack allocation */ u.buf = kmalloc(CONTROL_BUFFER_SIZE, GFP_KERNEL); if (!u.buf) return -ENOMEM; retval = usbnet_generic_cdc_bind(dev, intf); if (retval < 0) goto fail; u.init->msg_type = cpu_to_le32(RNDIS_MSG_INIT); u.init->msg_len = cpu_to_le32(sizeof *u.init); u.init->major_version = cpu_to_le32(1); u.init->minor_version = cpu_to_le32(0); /* max transfer (in spec) is 0x4000 at full speed, but for * TX we'll stick to one Ethernet packet plus RNDIS framing. * For RX we handle drivers that zero-pad to end-of-packet. * Don't let userspace change these settings. * * NOTE: there still seems to be wierdness here, as if we need * to do some more things to make sure WinCE targets accept this. * They default to jumbograms of 8KB or 16KB, which is absurd * for such low data rates and which is also more than Linux * can usually expect to allocate for SKB data... */ net->hard_header_len += sizeof (struct rndis_data_hdr); dev->hard_mtu = net->mtu + net->hard_header_len; dev->maxpacket = usb_maxpacket(dev->udev, dev->out, 1); if (dev->maxpacket == 0) { netif_dbg(dev, probe, dev->net, "dev->maxpacket can't be 0\n"); retval = -EINVAL; goto fail_and_release; } dev->rx_urb_size = dev->hard_mtu + (dev->maxpacket + 1); dev->rx_urb_size &= ~(dev->maxpacket - 1); u.init->max_transfer_size = cpu_to_le32(dev->rx_urb_size); net->netdev_ops = &rndis_netdev_ops; retval = rndis_command(dev, u.header, CONTROL_BUFFER_SIZE); if (unlikely(retval < 0)) { /* it might not even be an RNDIS device!! */ dev_err(&intf->dev, "RNDIS init failed, %d\n", retval); goto fail_and_release; } tmp = le32_to_cpu(u.init_c->max_transfer_size); if (tmp < dev->hard_mtu) { if (tmp <= net->hard_header_len) { dev_err(&intf->dev, "dev can't take %u byte packets (max %u)\n", dev->hard_mtu, tmp); retval = -EINVAL; goto halt_fail_and_release; } dev_warn(&intf->dev, "dev can't take %u byte packets (max %u), " "adjusting MTU to %u\n", dev->hard_mtu, tmp, tmp - net->hard_header_len); dev->hard_mtu = tmp; net->mtu = dev->hard_mtu - net->hard_header_len; } /* REVISIT: peripheral "alignment" request is ignored ... */ dev_dbg(&intf->dev, "hard mtu %u (%u from dev), rx buflen %Zu, align %d\n", dev->hard_mtu, tmp, dev->rx_urb_size, 1 << le32_to_cpu(u.init_c->packet_alignment)); /* module has some device initialization code needs to be done right * after RNDIS_INIT */ if (dev->driver_info->early_init && dev->driver_info->early_init(dev) != 0) goto halt_fail_and_release; /* Check physical medium */ phym = NULL; reply_len = sizeof *phym; retval = rndis_query(dev, intf, u.buf, RNDIS_OID_GEN_PHYSICAL_MEDIUM, 0, (void **) &phym, &reply_len); if (retval != 0 || !phym) { /* OID is optional so don't fail here. */ phym_unspec = cpu_to_le32(RNDIS_PHYSICAL_MEDIUM_UNSPECIFIED); phym = &phym_unspec; } if ((flags & FLAG_RNDIS_PHYM_WIRELESS) && le32_to_cpup(phym) != RNDIS_PHYSICAL_MEDIUM_WIRELESS_LAN) { netif_dbg(dev, probe, dev->net, "driver requires wireless physical medium, but device is not\n"); retval = -ENODEV; goto halt_fail_and_release; } if ((flags & FLAG_RNDIS_PHYM_NOT_WIRELESS) && le32_to_cpup(phym) == RNDIS_PHYSICAL_MEDIUM_WIRELESS_LAN) { netif_dbg(dev, probe, dev->net, "driver requires non-wireless physical medium, but device is wireless.\n"); retval = -ENODEV; goto halt_fail_and_release; } /* Get designated host ethernet address */ reply_len = ETH_ALEN; retval = rndis_query(dev, intf, u.buf, RNDIS_OID_802_3_PERMANENT_ADDRESS, 48, (void **) &bp, &reply_len); if (unlikely(retval< 0)) { dev_err(&intf->dev, "rndis get ethaddr, %d\n", retval); goto halt_fail_and_release; } memcpy(net->dev_addr, bp, ETH_ALEN); /* set a nonzero filter to enable data transfers */ memset(u.set, 0, sizeof *u.set); u.set->msg_type = cpu_to_le32(RNDIS_MSG_SET); u.set->msg_len = cpu_to_le32(4 + sizeof *u.set); u.set->oid = cpu_to_le32(RNDIS_OID_GEN_CURRENT_PACKET_FILTER); u.set->len = cpu_to_le32(4); u.set->offset = cpu_to_le32((sizeof *u.set) - 8); *(__le32 *)(u.buf + sizeof *u.set) = cpu_to_le32(RNDIS_DEFAULT_FILTER); retval = rndis_command(dev, u.header, CONTROL_BUFFER_SIZE); if (unlikely(retval < 0)) { dev_err(&intf->dev, "rndis set packet filter, %d\n", retval); goto halt_fail_and_release; } retval = 0; kfree(u.buf); return retval; halt_fail_and_release: memset(u.halt, 0, sizeof *u.halt); u.halt->msg_type = cpu_to_le32(RNDIS_MSG_HALT); u.halt->msg_len = cpu_to_le32(sizeof *u.halt); (void) rndis_command(dev, (void *)u.halt, CONTROL_BUFFER_SIZE); fail_and_release: usb_set_intfdata(info->data, NULL); usb_driver_release_interface(driver_of(intf), info->data); info->data = NULL; fail: kfree(u.buf); return retval; } EXPORT_SYMBOL_GPL(generic_rndis_bind); static int rndis_bind(struct usbnet *dev, struct usb_interface *intf) { return generic_rndis_bind(dev, intf, FLAG_RNDIS_PHYM_NOT_WIRELESS); } void rndis_unbind(struct usbnet *dev, struct usb_interface *intf) { struct rndis_halt *halt; /* try to clear any rndis state/activity (no i/o from stack!) */ halt = kzalloc(CONTROL_BUFFER_SIZE, GFP_KERNEL); if (halt) { halt->msg_type = cpu_to_le32(RNDIS_MSG_HALT); halt->msg_len = cpu_to_le32(sizeof *halt); (void) rndis_command(dev, (void *)halt, CONTROL_BUFFER_SIZE); kfree(halt); } usbnet_cdc_unbind(dev, intf); } EXPORT_SYMBOL_GPL(rndis_unbind); /* * DATA -- host must not write zlps */ int rndis_rx_fixup(struct usbnet *dev, struct sk_buff *skb) { /* This check is no longer done by usbnet */ if (skb->len < dev->net->hard_header_len) return 0; /* peripheral may have batched packets to us... */ while (likely(skb->len)) { struct rndis_data_hdr *hdr = (void *)skb->data; struct sk_buff *skb2; u32 msg_type, msg_len, data_offset, data_len; msg_type = le32_to_cpu(hdr->msg_type); msg_len = le32_to_cpu(hdr->msg_len); data_offset = le32_to_cpu(hdr->data_offset); data_len = le32_to_cpu(hdr->data_len); /* don't choke if we see oob, per-packet data, etc */ if (unlikely(msg_type != RNDIS_MSG_PACKET || skb->len < msg_len || (data_offset + data_len + 8) > msg_len)) { dev->net->stats.rx_frame_errors++; netdev_dbg(dev->net, "bad rndis message %d/%d/%d/%d, len %d\n", le32_to_cpu(hdr->msg_type), msg_len, data_offset, data_len, skb->len); return 0; } skb_pull(skb, 8 + data_offset); /* at most one packet left? */ if (likely((data_len - skb->len) <= sizeof *hdr)) { skb_trim(skb, data_len); break; } /* try to return all the packets in the batch */ skb2 = skb_clone(skb, GFP_ATOMIC); if (unlikely(!skb2)) break; skb_pull(skb, msg_len - sizeof *hdr); skb_trim(skb2, data_len); usbnet_skb_return(dev, skb2); } /* caller will usbnet_skb_return the remaining packet */ return 1; } EXPORT_SYMBOL_GPL(rndis_rx_fixup); struct sk_buff * rndis_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags) { struct rndis_data_hdr *hdr; struct sk_buff *skb2; unsigned len = skb->len; if (likely(!skb_cloned(skb))) { int room = skb_headroom(skb); /* enough head room as-is? */ if (unlikely((sizeof *hdr) <= room)) goto fill; /* enough room, but needs to be readjusted? */ room += skb_tailroom(skb); if (likely((sizeof *hdr) <= room)) { skb->data = memmove(skb->head + sizeof *hdr, skb->data, len); skb_set_tail_pointer(skb, len); goto fill; } } /* create a new skb, with the correct size (and tailpad) */ skb2 = skb_copy_expand(skb, sizeof *hdr, 1, flags); dev_kfree_skb_any(skb); if (unlikely(!skb2)) return skb2; skb = skb2; /* fill out the RNDIS header. we won't bother trying to batch * packets; Linux minimizes wasted bandwidth through tx queues. */ fill: hdr = (void *) __skb_push(skb, sizeof *hdr); memset(hdr, 0, sizeof *hdr); hdr->msg_type = cpu_to_le32(RNDIS_MSG_PACKET); hdr->msg_len = cpu_to_le32(skb->len); hdr->data_offset = cpu_to_le32(sizeof(*hdr) - 8); hdr->data_len = cpu_to_le32(len); /* FIXME make the last packet always be short ... */ return skb; } EXPORT_SYMBOL_GPL(rndis_tx_fixup); static const struct driver_info rndis_info = { .description = "RNDIS device", .flags = FLAG_ETHER | FLAG_POINTTOPOINT | FLAG_FRAMING_RN | FLAG_NO_SETINT, .bind = rndis_bind, .unbind = rndis_unbind, .status = rndis_status, .rx_fixup = rndis_rx_fixup, .tx_fixup = rndis_tx_fixup, }; static const struct driver_info rndis_poll_status_info = { .description = "RNDIS device (poll status before control)", .flags = FLAG_ETHER | FLAG_POINTTOPOINT | FLAG_FRAMING_RN | FLAG_NO_SETINT, .data = RNDIS_DRIVER_DATA_POLL_STATUS, .bind = rndis_bind, .unbind = rndis_unbind, .status = rndis_status, .rx_fixup = rndis_rx_fixup, .tx_fixup = rndis_tx_fixup, }; /*-------------------------------------------------------------------------*/ static const struct usb_device_id products [] = { { /* 2Wire HomePortal 1000SW */ USB_DEVICE_AND_INTERFACE_INFO(0x1630, 0x0042, USB_CLASS_COMM, 2 /* ACM */, 0x0ff), .driver_info = (unsigned long) &rndis_poll_status_info, }, { /* RNDIS is MSFT's un-official variant of CDC ACM */ USB_INTERFACE_INFO(USB_CLASS_COMM, 2 /* ACM */, 0x0ff), .driver_info = (unsigned long) &rndis_info, }, { /* "ActiveSync" is an undocumented variant of RNDIS, used in WM5 */ USB_INTERFACE_INFO(USB_CLASS_MISC, 1, 1), .driver_info = (unsigned long) &rndis_poll_status_info, }, { /* RNDIS for tethering */ USB_INTERFACE_INFO(USB_CLASS_WIRELESS_CONTROLLER, 1, 3), .driver_info = (unsigned long) &rndis_info, }, { }, // END }; MODULE_DEVICE_TABLE(usb, products); static struct usb_driver rndis_driver = { .name = "rndis_host", .id_table = products, .probe = usbnet_probe, .disconnect = usbnet_disconnect, .suspend = usbnet_suspend, .resume = usbnet_resume, .disable_hub_initiated_lpm = 1, }; module_usb_driver(rndis_driver); MODULE_AUTHOR("David Brownell"); MODULE_DESCRIPTION("USB Host side RNDIS driver"); MODULE_LICENSE("GPL");
gpl-2.0
Megatron007/kernel
kernel/events/hw_breakpoint.c
2195
16080
/* * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * * Copyright (C) 2007 Alan Stern * Copyright (C) IBM Corporation, 2009 * Copyright (C) 2009, Frederic Weisbecker <fweisbec@gmail.com> * * Thanks to Ingo Molnar for his many suggestions. * * Authors: Alan Stern <stern@rowland.harvard.edu> * K.Prasad <prasad@linux.vnet.ibm.com> * Frederic Weisbecker <fweisbec@gmail.com> */ /* * HW_breakpoint: a unified kernel/user-space hardware breakpoint facility, * using the CPU's debug registers. * This file contains the arch-independent routines. */ #include <linux/irqflags.h> #include <linux/kallsyms.h> #include <linux/notifier.h> #include <linux/kprobes.h> #include <linux/kdebug.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/percpu.h> #include <linux/sched.h> #include <linux/init.h> #include <linux/slab.h> #include <linux/list.h> #include <linux/cpu.h> #include <linux/smp.h> #include <linux/hw_breakpoint.h> /* * Constraints data */ /* Number of pinned cpu breakpoints in a cpu */ static DEFINE_PER_CPU(unsigned int, nr_cpu_bp_pinned[TYPE_MAX]); /* Number of pinned task breakpoints in a cpu */ static DEFINE_PER_CPU(unsigned int *, nr_task_bp_pinned[TYPE_MAX]); /* Number of non-pinned cpu/task breakpoints in a cpu */ static DEFINE_PER_CPU(unsigned int, nr_bp_flexible[TYPE_MAX]); static int nr_slots[TYPE_MAX]; /* Keep track of the breakpoints attached to tasks */ static LIST_HEAD(bp_task_head); static int constraints_initialized; /* Gather the number of total pinned and un-pinned bp in a cpuset */ struct bp_busy_slots { unsigned int pinned; unsigned int flexible; }; /* Serialize accesses to the above constraints */ static DEFINE_MUTEX(nr_bp_mutex); __weak int hw_breakpoint_weight(struct perf_event *bp) { return 1; } static inline enum bp_type_idx find_slot_idx(struct perf_event *bp) { if (bp->attr.bp_type & HW_BREAKPOINT_RW) return TYPE_DATA; return TYPE_INST; } /* * Report the maximum number of pinned breakpoints a task * have in this cpu */ static unsigned int max_task_bp_pinned(int cpu, enum bp_type_idx type) { int i; unsigned int *tsk_pinned = per_cpu(nr_task_bp_pinned[type], cpu); for (i = nr_slots[type] - 1; i >= 0; i--) { if (tsk_pinned[i] > 0) return i + 1; } return 0; } /* * Count the number of breakpoints of the same type and same task. * The given event must be not on the list. */ static int task_bp_pinned(struct perf_event *bp, enum bp_type_idx type) { struct task_struct *tsk = bp->hw.bp_target; struct perf_event *iter; int count = 0; list_for_each_entry(iter, &bp_task_head, hw.bp_list) { if (iter->hw.bp_target == tsk && find_slot_idx(iter) == type) count += hw_breakpoint_weight(iter); } return count; } /* * Report the number of pinned/un-pinned breakpoints we have in * a given cpu (cpu > -1) or in all of them (cpu = -1). */ static void fetch_bp_busy_slots(struct bp_busy_slots *slots, struct perf_event *bp, enum bp_type_idx type) { int cpu = bp->cpu; struct task_struct *tsk = bp->hw.bp_target; if (cpu >= 0) { slots->pinned = per_cpu(nr_cpu_bp_pinned[type], cpu); if (!tsk) slots->pinned += max_task_bp_pinned(cpu, type); else slots->pinned += task_bp_pinned(bp, type); slots->flexible = per_cpu(nr_bp_flexible[type], cpu); return; } for_each_online_cpu(cpu) { unsigned int nr; nr = per_cpu(nr_cpu_bp_pinned[type], cpu); if (!tsk) nr += max_task_bp_pinned(cpu, type); else nr += task_bp_pinned(bp, type); if (nr > slots->pinned) slots->pinned = nr; nr = per_cpu(nr_bp_flexible[type], cpu); if (nr > slots->flexible) slots->flexible = nr; } } /* * For now, continue to consider flexible as pinned, until we can * ensure no flexible event can ever be scheduled before a pinned event * in a same cpu. */ static void fetch_this_slot(struct bp_busy_slots *slots, int weight) { slots->pinned += weight; } /* * Add a pinned breakpoint for the given task in our constraint table */ static void toggle_bp_task_slot(struct perf_event *bp, int cpu, bool enable, enum bp_type_idx type, int weight) { unsigned int *tsk_pinned; int old_count = 0; int old_idx = 0; int idx = 0; old_count = task_bp_pinned(bp, type); old_idx = old_count - 1; idx = old_idx + weight; /* tsk_pinned[n] is the number of tasks having n breakpoints */ tsk_pinned = per_cpu(nr_task_bp_pinned[type], cpu); if (enable) { tsk_pinned[idx]++; if (old_count > 0) tsk_pinned[old_idx]--; } else { tsk_pinned[idx]--; if (old_count > 0) tsk_pinned[old_idx]++; } } /* * Add/remove the given breakpoint in our constraint table */ static void toggle_bp_slot(struct perf_event *bp, bool enable, enum bp_type_idx type, int weight) { int cpu = bp->cpu; struct task_struct *tsk = bp->hw.bp_target; /* Pinned counter cpu profiling */ if (!tsk) { if (enable) per_cpu(nr_cpu_bp_pinned[type], bp->cpu) += weight; else per_cpu(nr_cpu_bp_pinned[type], bp->cpu) -= weight; return; } /* Pinned counter task profiling */ if (!enable) list_del(&bp->hw.bp_list); if (cpu >= 0) { toggle_bp_task_slot(bp, cpu, enable, type, weight); } else { for_each_online_cpu(cpu) toggle_bp_task_slot(bp, cpu, enable, type, weight); } if (enable) list_add_tail(&bp->hw.bp_list, &bp_task_head); } /* * Function to perform processor-specific cleanup during unregistration */ __weak void arch_unregister_hw_breakpoint(struct perf_event *bp) { /* * A weak stub function here for those archs that don't define * it inside arch/.../kernel/hw_breakpoint.c */ } /* * Contraints to check before allowing this new breakpoint counter: * * == Non-pinned counter == (Considered as pinned for now) * * - If attached to a single cpu, check: * * (per_cpu(nr_bp_flexible, cpu) || (per_cpu(nr_cpu_bp_pinned, cpu) * + max(per_cpu(nr_task_bp_pinned, cpu)))) < HBP_NUM * * -> If there are already non-pinned counters in this cpu, it means * there is already a free slot for them. * Otherwise, we check that the maximum number of per task * breakpoints (for this cpu) plus the number of per cpu breakpoint * (for this cpu) doesn't cover every registers. * * - If attached to every cpus, check: * * (per_cpu(nr_bp_flexible, *) || (max(per_cpu(nr_cpu_bp_pinned, *)) * + max(per_cpu(nr_task_bp_pinned, *)))) < HBP_NUM * * -> This is roughly the same, except we check the number of per cpu * bp for every cpu and we keep the max one. Same for the per tasks * breakpoints. * * * == Pinned counter == * * - If attached to a single cpu, check: * * ((per_cpu(nr_bp_flexible, cpu) > 1) + per_cpu(nr_cpu_bp_pinned, cpu) * + max(per_cpu(nr_task_bp_pinned, cpu))) < HBP_NUM * * -> Same checks as before. But now the nr_bp_flexible, if any, must keep * one register at least (or they will never be fed). * * - If attached to every cpus, check: * * ((per_cpu(nr_bp_flexible, *) > 1) + max(per_cpu(nr_cpu_bp_pinned, *)) * + max(per_cpu(nr_task_bp_pinned, *))) < HBP_NUM */ static int __reserve_bp_slot(struct perf_event *bp) { struct bp_busy_slots slots = {0}; enum bp_type_idx type; int weight; /* We couldn't initialize breakpoint constraints on boot */ if (!constraints_initialized) return -ENOMEM; /* Basic checks */ if (bp->attr.bp_type == HW_BREAKPOINT_EMPTY || bp->attr.bp_type == HW_BREAKPOINT_INVALID) return -EINVAL; type = find_slot_idx(bp); weight = hw_breakpoint_weight(bp); fetch_bp_busy_slots(&slots, bp, type); /* * Simulate the addition of this breakpoint to the constraints * and see the result. */ fetch_this_slot(&slots, weight); /* Flexible counters need to keep at least one slot */ if (slots.pinned + (!!slots.flexible) > nr_slots[type]) return -ENOSPC; toggle_bp_slot(bp, true, type, weight); return 0; } int reserve_bp_slot(struct perf_event *bp) { int ret; mutex_lock(&nr_bp_mutex); ret = __reserve_bp_slot(bp); mutex_unlock(&nr_bp_mutex); return ret; } static void __release_bp_slot(struct perf_event *bp) { enum bp_type_idx type; int weight; type = find_slot_idx(bp); weight = hw_breakpoint_weight(bp); toggle_bp_slot(bp, false, type, weight); } void release_bp_slot(struct perf_event *bp) { mutex_lock(&nr_bp_mutex); arch_unregister_hw_breakpoint(bp); __release_bp_slot(bp); mutex_unlock(&nr_bp_mutex); } /* * Allow the kernel debugger to reserve breakpoint slots without * taking a lock using the dbg_* variant of for the reserve and * release breakpoint slots. */ int dbg_reserve_bp_slot(struct perf_event *bp) { if (mutex_is_locked(&nr_bp_mutex)) return -1; return __reserve_bp_slot(bp); } int dbg_release_bp_slot(struct perf_event *bp) { if (mutex_is_locked(&nr_bp_mutex)) return -1; __release_bp_slot(bp); return 0; } static int validate_hw_breakpoint(struct perf_event *bp) { int ret; ret = arch_validate_hwbkpt_settings(bp); if (ret) return ret; if (arch_check_bp_in_kernelspace(bp)) { if (bp->attr.exclude_kernel) return -EINVAL; /* * Don't let unprivileged users set a breakpoint in the trap * path to avoid trap recursion attacks. */ if (!capable(CAP_SYS_ADMIN)) return -EPERM; } return 0; } int register_perf_hw_breakpoint(struct perf_event *bp) { int ret; ret = reserve_bp_slot(bp); if (ret) return ret; ret = validate_hw_breakpoint(bp); /* if arch_validate_hwbkpt_settings() fails then release bp slot */ if (ret) release_bp_slot(bp); return ret; } /** * register_user_hw_breakpoint - register a hardware breakpoint for user space * @attr: breakpoint attributes * @triggered: callback to trigger when we hit the breakpoint * @tsk: pointer to 'task_struct' of the process to which the address belongs */ struct perf_event * register_user_hw_breakpoint(struct perf_event_attr *attr, perf_overflow_handler_t triggered, void *context, struct task_struct *tsk) { return perf_event_create_kernel_counter(attr, -1, tsk, triggered, context); } EXPORT_SYMBOL_GPL(register_user_hw_breakpoint); /** * modify_user_hw_breakpoint - modify a user-space hardware breakpoint * @bp: the breakpoint structure to modify * @attr: new breakpoint attributes * @triggered: callback to trigger when we hit the breakpoint * @tsk: pointer to 'task_struct' of the process to which the address belongs */ int modify_user_hw_breakpoint(struct perf_event *bp, struct perf_event_attr *attr) { u64 old_addr = bp->attr.bp_addr; u64 old_len = bp->attr.bp_len; int old_type = bp->attr.bp_type; int err = 0; perf_event_disable(bp); bp->attr.bp_addr = attr->bp_addr; bp->attr.bp_type = attr->bp_type; bp->attr.bp_len = attr->bp_len; if (attr->disabled) goto end; err = validate_hw_breakpoint(bp); if (!err) perf_event_enable(bp); if (err) { bp->attr.bp_addr = old_addr; bp->attr.bp_type = old_type; bp->attr.bp_len = old_len; if (!bp->attr.disabled) perf_event_enable(bp); return err; } end: bp->attr.disabled = attr->disabled; return 0; } EXPORT_SYMBOL_GPL(modify_user_hw_breakpoint); /** * unregister_hw_breakpoint - unregister a user-space hardware breakpoint * @bp: the breakpoint structure to unregister */ void unregister_hw_breakpoint(struct perf_event *bp) { if (!bp) return; perf_event_release_kernel(bp); } EXPORT_SYMBOL_GPL(unregister_hw_breakpoint); /** * register_wide_hw_breakpoint - register a wide breakpoint in the kernel * @attr: breakpoint attributes * @triggered: callback to trigger when we hit the breakpoint * * @return a set of per_cpu pointers to perf events */ struct perf_event * __percpu * register_wide_hw_breakpoint(struct perf_event_attr *attr, perf_overflow_handler_t triggered, void *context) { struct perf_event * __percpu *cpu_events, **pevent, *bp; long err; int cpu; cpu_events = alloc_percpu(typeof(*cpu_events)); if (!cpu_events) return (void __percpu __force *)ERR_PTR(-ENOMEM); get_online_cpus(); for_each_online_cpu(cpu) { pevent = per_cpu_ptr(cpu_events, cpu); bp = perf_event_create_kernel_counter(attr, cpu, NULL, triggered, context); *pevent = bp; if (IS_ERR(bp)) { err = PTR_ERR(bp); goto fail; } } put_online_cpus(); return cpu_events; fail: for_each_online_cpu(cpu) { pevent = per_cpu_ptr(cpu_events, cpu); if (IS_ERR(*pevent)) break; unregister_hw_breakpoint(*pevent); } put_online_cpus(); free_percpu(cpu_events); return (void __percpu __force *)ERR_PTR(err); } EXPORT_SYMBOL_GPL(register_wide_hw_breakpoint); /** * unregister_wide_hw_breakpoint - unregister a wide breakpoint in the kernel * @cpu_events: the per cpu set of events to unregister */ void unregister_wide_hw_breakpoint(struct perf_event * __percpu *cpu_events) { int cpu; struct perf_event **pevent; for_each_possible_cpu(cpu) { pevent = per_cpu_ptr(cpu_events, cpu); unregister_hw_breakpoint(*pevent); } free_percpu(cpu_events); } EXPORT_SYMBOL_GPL(unregister_wide_hw_breakpoint); static struct notifier_block hw_breakpoint_exceptions_nb = { .notifier_call = hw_breakpoint_exceptions_notify, /* we need to be notified first */ .priority = 0x7fffffff }; static void bp_perf_event_destroy(struct perf_event *event) { release_bp_slot(event); } static int hw_breakpoint_event_init(struct perf_event *bp) { int err; if (bp->attr.type != PERF_TYPE_BREAKPOINT) return -ENOENT; /* * no branch sampling for breakpoint events */ if (has_branch_stack(bp)) return -EOPNOTSUPP; err = register_perf_hw_breakpoint(bp); if (err) return err; bp->destroy = bp_perf_event_destroy; return 0; } static int hw_breakpoint_add(struct perf_event *bp, int flags) { if (!(flags & PERF_EF_START)) bp->hw.state = PERF_HES_STOPPED; return arch_install_hw_breakpoint(bp); } static void hw_breakpoint_del(struct perf_event *bp, int flags) { arch_uninstall_hw_breakpoint(bp); } static void hw_breakpoint_start(struct perf_event *bp, int flags) { bp->hw.state = 0; } static void hw_breakpoint_stop(struct perf_event *bp, int flags) { bp->hw.state = PERF_HES_STOPPED; } static int hw_breakpoint_event_idx(struct perf_event *bp) { return 0; } static struct pmu perf_breakpoint = { .task_ctx_nr = perf_sw_context, /* could eventually get its own */ .event_init = hw_breakpoint_event_init, .add = hw_breakpoint_add, .del = hw_breakpoint_del, .start = hw_breakpoint_start, .stop = hw_breakpoint_stop, .read = hw_breakpoint_pmu_read, .event_idx = hw_breakpoint_event_idx, }; int __init init_hw_breakpoint(void) { unsigned int **task_bp_pinned; int cpu, err_cpu; int i; for (i = 0; i < TYPE_MAX; i++) nr_slots[i] = hw_breakpoint_slots(i); for_each_possible_cpu(cpu) { for (i = 0; i < TYPE_MAX; i++) { task_bp_pinned = &per_cpu(nr_task_bp_pinned[i], cpu); *task_bp_pinned = kzalloc(sizeof(int) * nr_slots[i], GFP_KERNEL); if (!*task_bp_pinned) goto err_alloc; } } constraints_initialized = 1; perf_pmu_register(&perf_breakpoint, "breakpoint", PERF_TYPE_BREAKPOINT); return register_die_notifier(&hw_breakpoint_exceptions_nb); err_alloc: for_each_possible_cpu(err_cpu) { for (i = 0; i < TYPE_MAX; i++) kfree(per_cpu(nr_task_bp_pinned[i], cpu)); if (err_cpu == cpu) break; } return -ENOMEM; }
gpl-2.0
thanhphat11/Android_kernel_xiaomi_ALL
kernel/freezer.c
2707
4290
/* * kernel/freezer.c - Function to freeze a process * * Originally from kernel/power/process.c */ #include <linux/interrupt.h> #include <linux/suspend.h> #include <linux/export.h> #include <linux/syscalls.h> #include <linux/freezer.h> #include <linux/kthread.h> /* total number of freezing conditions in effect */ atomic_t system_freezing_cnt = ATOMIC_INIT(0); EXPORT_SYMBOL(system_freezing_cnt); /* indicate whether PM freezing is in effect, protected by pm_mutex */ bool pm_freezing; bool pm_nosig_freezing; /* protects freezing and frozen transitions */ static DEFINE_SPINLOCK(freezer_lock); /** * freezing_slow_path - slow path for testing whether a task needs to be frozen * @p: task to be tested * * This function is called by freezing() if system_freezing_cnt isn't zero * and tests whether @p needs to enter and stay in frozen state. Can be * called under any context. The freezers are responsible for ensuring the * target tasks see the updated state. */ bool freezing_slow_path(struct task_struct *p) { if (p->flags & PF_NOFREEZE) return false; if (pm_nosig_freezing || cgroup_freezing(p)) return true; if (pm_freezing && !(p->flags & PF_KTHREAD)) return true; return false; } EXPORT_SYMBOL(freezing_slow_path); /* Refrigerator is place where frozen processes are stored :-). */ bool __refrigerator(bool check_kthr_stop) { /* Hmm, should we be allowed to suspend when there are realtime processes around? */ bool was_frozen = false; long save = current->state; pr_debug("%s entered refrigerator\n", current->comm); for (;;) { set_current_state(TASK_UNINTERRUPTIBLE); spin_lock_irq(&freezer_lock); current->flags |= PF_FROZEN; if (!freezing(current) || (check_kthr_stop && kthread_should_stop())) current->flags &= ~PF_FROZEN; spin_unlock_irq(&freezer_lock); if (!(current->flags & PF_FROZEN)) break; was_frozen = true; schedule(); } pr_debug("%s left refrigerator\n", current->comm); /* * Restore saved task state before returning. The mb'd version * needs to be used; otherwise, it might silently break * synchronization which depends on ordered task state change. */ set_current_state(save); return was_frozen; } EXPORT_SYMBOL(__refrigerator); static void fake_signal_wake_up(struct task_struct *p) { unsigned long flags; if (lock_task_sighand(p, &flags)) { signal_wake_up(p, 0); unlock_task_sighand(p, &flags); } } /** * freeze_task - send a freeze request to given task * @p: task to send the request to * * If @p is freezing, the freeze request is sent either by sending a fake * signal (if it's not a kernel thread) or waking it up (if it's a kernel * thread). * * RETURNS: * %false, if @p is not freezing or already frozen; %true, otherwise */ bool freeze_task(struct task_struct *p) { unsigned long flags; spin_lock_irqsave(&freezer_lock, flags); if (!freezing(p) || frozen(p)) { spin_unlock_irqrestore(&freezer_lock, flags); return false; } if (!(p->flags & PF_KTHREAD)) { fake_signal_wake_up(p); /* * fake_signal_wake_up() goes through p's scheduler * lock and guarantees that TASK_STOPPED/TRACED -> * TASK_RUNNING transition can't race with task state * testing in try_to_freeze_tasks(). */ } else { wake_up_state(p, TASK_INTERRUPTIBLE); } spin_unlock_irqrestore(&freezer_lock, flags); return true; } void __thaw_task(struct task_struct *p) { unsigned long flags; /* * Clear freezing and kick @p if FROZEN. Clearing is guaranteed to * be visible to @p as waking up implies wmb. Waking up inside * freezer_lock also prevents wakeups from leaking outside * refrigerator. */ spin_lock_irqsave(&freezer_lock, flags); if (frozen(p)) wake_up_process(p); spin_unlock_irqrestore(&freezer_lock, flags); } /** * set_freezable - make %current freezable * * Mark %current freezable and enter refrigerator if necessary. */ bool set_freezable(void) { might_sleep(); /* * Modify flags while holding freezer_lock. This ensures the * freezer notices that we aren't frozen yet or the freezing * condition is visible to try_to_freeze() below. */ spin_lock_irq(&freezer_lock); current->flags &= ~PF_NOFREEZE; spin_unlock_irq(&freezer_lock); return try_to_freeze(); } EXPORT_SYMBOL(set_freezable);
gpl-2.0
Druboo666/android_kernel_asus_moorefield
drivers/media/tuners/tua9001.c
3731
6554
/* * Infineon TUA 9001 silicon tuner driver * * Copyright (C) 2009 Antti Palosaari <crope@iki.fi> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License along * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. */ #include "tua9001.h" #include "tua9001_priv.h" /* write register */ static int tua9001_wr_reg(struct tua9001_priv *priv, u8 reg, u16 val) { int ret; u8 buf[3] = { reg, (val >> 8) & 0xff, (val >> 0) & 0xff }; struct i2c_msg msg[1] = { { .addr = priv->cfg->i2c_addr, .flags = 0, .len = sizeof(buf), .buf = buf, } }; ret = i2c_transfer(priv->i2c, msg, 1); if (ret == 1) { ret = 0; } else { dev_warn(&priv->i2c->dev, "%s: i2c wr failed=%d reg=%02x\n", KBUILD_MODNAME, ret, reg); ret = -EREMOTEIO; } return ret; } static int tua9001_release(struct dvb_frontend *fe) { struct tua9001_priv *priv = fe->tuner_priv; int ret = 0; dev_dbg(&priv->i2c->dev, "%s:\n", __func__); if (fe->callback) ret = fe->callback(priv->i2c, DVB_FRONTEND_COMPONENT_TUNER, TUA9001_CMD_CEN, 0); kfree(fe->tuner_priv); fe->tuner_priv = NULL; return ret; } static int tua9001_init(struct dvb_frontend *fe) { struct tua9001_priv *priv = fe->tuner_priv; int ret = 0; u8 i; struct reg_val data[] = { { 0x1e, 0x6512 }, { 0x25, 0xb888 }, { 0x39, 0x5460 }, { 0x3b, 0x00c0 }, { 0x3a, 0xf000 }, { 0x08, 0x0000 }, { 0x32, 0x0030 }, { 0x41, 0x703a }, { 0x40, 0x1c78 }, { 0x2c, 0x1c00 }, { 0x36, 0xc013 }, { 0x37, 0x6f18 }, { 0x27, 0x0008 }, { 0x2a, 0x0001 }, { 0x34, 0x0a40 }, }; dev_dbg(&priv->i2c->dev, "%s:\n", __func__); if (fe->callback) { ret = fe->callback(priv->i2c, DVB_FRONTEND_COMPONENT_TUNER, TUA9001_CMD_RESETN, 0); if (ret < 0) goto err; } if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c-gate */ for (i = 0; i < ARRAY_SIZE(data); i++) { ret = tua9001_wr_reg(priv, data[i].reg, data[i].val); if (ret < 0) goto err_i2c_gate_ctrl; } err_i2c_gate_ctrl: if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c-gate */ err: if (ret < 0) dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret); return ret; } static int tua9001_sleep(struct dvb_frontend *fe) { struct tua9001_priv *priv = fe->tuner_priv; int ret = 0; dev_dbg(&priv->i2c->dev, "%s:\n", __func__); if (fe->callback) ret = fe->callback(priv->i2c, DVB_FRONTEND_COMPONENT_TUNER, TUA9001_CMD_RESETN, 1); if (ret < 0) dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret); return ret; } static int tua9001_set_params(struct dvb_frontend *fe) { struct tua9001_priv *priv = fe->tuner_priv; struct dtv_frontend_properties *c = &fe->dtv_property_cache; int ret = 0, i; u16 val; u32 frequency; struct reg_val data[2]; dev_dbg(&priv->i2c->dev, "%s: delivery_system=%d frequency=%d " \ "bandwidth_hz=%d\n", __func__, c->delivery_system, c->frequency, c->bandwidth_hz); switch (c->delivery_system) { case SYS_DVBT: switch (c->bandwidth_hz) { case 8000000: val = 0x0000; break; case 7000000: val = 0x1000; break; case 6000000: val = 0x2000; break; case 5000000: val = 0x3000; break; default: ret = -EINVAL; goto err; } break; default: ret = -EINVAL; goto err; } data[0].reg = 0x04; data[0].val = val; frequency = (c->frequency - 150000000); frequency /= 100; frequency *= 48; frequency /= 10000; data[1].reg = 0x1f; data[1].val = frequency; if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c-gate */ if (fe->callback) { ret = fe->callback(priv->i2c, DVB_FRONTEND_COMPONENT_TUNER, TUA9001_CMD_RXEN, 0); if (ret < 0) goto err_i2c_gate_ctrl; } for (i = 0; i < ARRAY_SIZE(data); i++) { ret = tua9001_wr_reg(priv, data[i].reg, data[i].val); if (ret < 0) goto err_i2c_gate_ctrl; } if (fe->callback) { ret = fe->callback(priv->i2c, DVB_FRONTEND_COMPONENT_TUNER, TUA9001_CMD_RXEN, 1); if (ret < 0) goto err_i2c_gate_ctrl; } err_i2c_gate_ctrl: if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c-gate */ err: if (ret < 0) dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret); return ret; } static int tua9001_get_if_frequency(struct dvb_frontend *fe, u32 *frequency) { struct tua9001_priv *priv = fe->tuner_priv; dev_dbg(&priv->i2c->dev, "%s:\n", __func__); *frequency = 0; /* Zero-IF */ return 0; } static const struct dvb_tuner_ops tua9001_tuner_ops = { .info = { .name = "Infineon TUA 9001", .frequency_min = 170000000, .frequency_max = 862000000, .frequency_step = 0, }, .release = tua9001_release, .init = tua9001_init, .sleep = tua9001_sleep, .set_params = tua9001_set_params, .get_if_frequency = tua9001_get_if_frequency, }; struct dvb_frontend *tua9001_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct tua9001_config *cfg) { struct tua9001_priv *priv = NULL; int ret; priv = kzalloc(sizeof(struct tua9001_priv), GFP_KERNEL); if (priv == NULL) return NULL; priv->cfg = cfg; priv->i2c = i2c; if (fe->callback) { ret = fe->callback(priv->i2c, DVB_FRONTEND_COMPONENT_TUNER, TUA9001_CMD_CEN, 1); if (ret < 0) goto err; ret = fe->callback(priv->i2c, DVB_FRONTEND_COMPONENT_TUNER, TUA9001_CMD_RXEN, 0); if (ret < 0) goto err; ret = fe->callback(priv->i2c, DVB_FRONTEND_COMPONENT_TUNER, TUA9001_CMD_RESETN, 1); if (ret < 0) goto err; } dev_info(&priv->i2c->dev, "%s: Infineon TUA 9001 successfully attached\n", KBUILD_MODNAME); memcpy(&fe->ops.tuner_ops, &tua9001_tuner_ops, sizeof(struct dvb_tuner_ops)); fe->tuner_priv = priv; return fe; err: dev_dbg(&i2c->dev, "%s: failed=%d\n", __func__, ret); kfree(priv); return NULL; } EXPORT_SYMBOL(tua9001_attach); MODULE_DESCRIPTION("Infineon TUA 9001 silicon tuner driver"); MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>"); MODULE_LICENSE("GPL");
gpl-2.0
sleekmason/cyanogenmod12
arch/mips/ath79/early_printk.c
4499
2266
/* * Atheros AR7XXX/AR9XXX SoC early printk support * * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org> * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 as published * by the Free Software Foundation. */ #include <linux/io.h> #include <linux/errno.h> #include <linux/serial_reg.h> #include <asm/addrspace.h> #include <asm/mach-ath79/ath79.h> #include <asm/mach-ath79/ar71xx_regs.h> #include <asm/mach-ath79/ar933x_uart.h> static void (*_prom_putchar) (unsigned char); static inline void prom_putchar_wait(void __iomem *reg, u32 mask, u32 val) { u32 t; do { t = __raw_readl(reg); if ((t & mask) == val) break; } while (1); } static void prom_putchar_ar71xx(unsigned char ch) { void __iomem *base = (void __iomem *)(KSEG1ADDR(AR71XX_UART_BASE)); prom_putchar_wait(base + UART_LSR * 4, UART_LSR_THRE, UART_LSR_THRE); __raw_writel(ch, base + UART_TX * 4); prom_putchar_wait(base + UART_LSR * 4, UART_LSR_THRE, UART_LSR_THRE); } static void prom_putchar_ar933x(unsigned char ch) { void __iomem *base = (void __iomem *)(KSEG1ADDR(AR933X_UART_BASE)); prom_putchar_wait(base + AR933X_UART_DATA_REG, AR933X_UART_DATA_TX_CSR, AR933X_UART_DATA_TX_CSR); __raw_writel(AR933X_UART_DATA_TX_CSR | ch, base + AR933X_UART_DATA_REG); prom_putchar_wait(base + AR933X_UART_DATA_REG, AR933X_UART_DATA_TX_CSR, AR933X_UART_DATA_TX_CSR); } static void prom_putchar_dummy(unsigned char ch) { /* nothing to do */ } static void prom_putchar_init(void) { void __iomem *base; u32 id; base = (void __iomem *)(KSEG1ADDR(AR71XX_RESET_BASE)); id = __raw_readl(base + AR71XX_RESET_REG_REV_ID); id &= REV_ID_MAJOR_MASK; switch (id) { case REV_ID_MAJOR_AR71XX: case REV_ID_MAJOR_AR7240: case REV_ID_MAJOR_AR7241: case REV_ID_MAJOR_AR7242: case REV_ID_MAJOR_AR913X: _prom_putchar = prom_putchar_ar71xx; break; case REV_ID_MAJOR_AR9330: case REV_ID_MAJOR_AR9331: _prom_putchar = prom_putchar_ar933x; break; default: _prom_putchar = prom_putchar_dummy; break; } } void prom_putchar(unsigned char ch) { if (!_prom_putchar) prom_putchar_init(); _prom_putchar(ch); }
gpl-2.0
Docker-J/Sail_GEE
fs/sysfs/mount.c
4499
4561
/* * fs/sysfs/symlink.c - operations for initializing and mounting sysfs * * Copyright (c) 2001-3 Patrick Mochel * Copyright (c) 2007 SUSE Linux Products GmbH * Copyright (c) 2007 Tejun Heo <teheo@suse.de> * * This file is released under the GPLv2. * * Please see Documentation/filesystems/sysfs.txt for more information. */ #define DEBUG #include <linux/fs.h> #include <linux/mount.h> #include <linux/pagemap.h> #include <linux/init.h> #include <linux/module.h> #include <linux/magic.h> #include <linux/slab.h> #include "sysfs.h" static struct vfsmount *sysfs_mnt; struct kmem_cache *sysfs_dir_cachep; static const struct super_operations sysfs_ops = { .statfs = simple_statfs, .drop_inode = generic_delete_inode, .evict_inode = sysfs_evict_inode, }; struct sysfs_dirent sysfs_root = { .s_name = "", .s_count = ATOMIC_INIT(1), .s_flags = SYSFS_DIR | (KOBJ_NS_TYPE_NONE << SYSFS_NS_TYPE_SHIFT), .s_mode = S_IFDIR | S_IRUGO | S_IXUGO, .s_ino = 1, }; static int sysfs_fill_super(struct super_block *sb, void *data, int silent) { struct inode *inode; struct dentry *root; sb->s_blocksize = PAGE_CACHE_SIZE; sb->s_blocksize_bits = PAGE_CACHE_SHIFT; sb->s_magic = SYSFS_MAGIC; sb->s_op = &sysfs_ops; sb->s_time_gran = 1; /* get root inode, initialize and unlock it */ mutex_lock(&sysfs_mutex); inode = sysfs_get_inode(sb, &sysfs_root); mutex_unlock(&sysfs_mutex); if (!inode) { pr_debug("sysfs: could not get root inode\n"); return -ENOMEM; } /* instantiate and link root dentry */ root = d_make_root(inode); if (!root) { pr_debug("%s: could not get root dentry!\n",__func__); return -ENOMEM; } root->d_fsdata = &sysfs_root; sb->s_root = root; return 0; } static int sysfs_test_super(struct super_block *sb, void *data) { struct sysfs_super_info *sb_info = sysfs_info(sb); struct sysfs_super_info *info = data; enum kobj_ns_type type; int found = 1; for (type = KOBJ_NS_TYPE_NONE; type < KOBJ_NS_TYPES; type++) { if (sb_info->ns[type] != info->ns[type]) found = 0; } return found; } static int sysfs_set_super(struct super_block *sb, void *data) { int error; error = set_anon_super(sb, data); if (!error) sb->s_fs_info = data; return error; } static void free_sysfs_super_info(struct sysfs_super_info *info) { int type; for (type = KOBJ_NS_TYPE_NONE; type < KOBJ_NS_TYPES; type++) kobj_ns_drop(type, info->ns[type]); kfree(info); } static struct dentry *sysfs_mount(struct file_system_type *fs_type, int flags, const char *dev_name, void *data) { struct sysfs_super_info *info; enum kobj_ns_type type; struct super_block *sb; int error; info = kzalloc(sizeof(*info), GFP_KERNEL); if (!info) return ERR_PTR(-ENOMEM); for (type = KOBJ_NS_TYPE_NONE; type < KOBJ_NS_TYPES; type++) info->ns[type] = kobj_ns_grab_current(type); sb = sget(fs_type, sysfs_test_super, sysfs_set_super, info); if (IS_ERR(sb) || sb->s_fs_info != info) free_sysfs_super_info(info); if (IS_ERR(sb)) return ERR_CAST(sb); if (!sb->s_root) { sb->s_flags = flags; error = sysfs_fill_super(sb, data, flags & MS_SILENT ? 1 : 0); if (error) { deactivate_locked_super(sb); return ERR_PTR(error); } sb->s_flags |= MS_ACTIVE; } return dget(sb->s_root); } static void sysfs_kill_sb(struct super_block *sb) { struct sysfs_super_info *info = sysfs_info(sb); /* Remove the superblock from fs_supers/s_instances * so we can't find it, before freeing sysfs_super_info. */ kill_anon_super(sb); free_sysfs_super_info(info); } static struct file_system_type sysfs_fs_type = { .name = "sysfs", .mount = sysfs_mount, .kill_sb = sysfs_kill_sb, }; int __init sysfs_init(void) { int err = -ENOMEM; sysfs_dir_cachep = kmem_cache_create("sysfs_dir_cache", sizeof(struct sysfs_dirent), 0, 0, NULL); if (!sysfs_dir_cachep) goto out; err = sysfs_inode_init(); if (err) goto out_err; err = register_filesystem(&sysfs_fs_type); if (!err) { sysfs_mnt = kern_mount(&sysfs_fs_type); if (IS_ERR(sysfs_mnt)) { printk(KERN_ERR "sysfs: could not mount!\n"); err = PTR_ERR(sysfs_mnt); sysfs_mnt = NULL; unregister_filesystem(&sysfs_fs_type); goto out_err; } } else goto out_err; out: return err; out_err: kmem_cache_destroy(sysfs_dir_cachep); sysfs_dir_cachep = NULL; goto out; } #undef sysfs_get struct sysfs_dirent *sysfs_get(struct sysfs_dirent *sd) { return __sysfs_get(sd); } EXPORT_SYMBOL_GPL(sysfs_get); #undef sysfs_put void sysfs_put(struct sysfs_dirent *sd) { __sysfs_put(sd); } EXPORT_SYMBOL_GPL(sysfs_put);
gpl-2.0
anryl/shooteruICS
drivers/staging/vt6655/rf.c
7827
50344
/* * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc. * All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License along * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * * * File: rf.c * * Purpose: rf function code * * Author: Jerry Chen * * Date: Feb. 19, 2004 * * Functions: * IFRFbWriteEmbeded - Embeded write RF register via MAC * * Revision History: * */ #include "mac.h" #include "srom.h" #include "rf.h" #include "baseband.h" /*--------------------- Static Definitions -------------------------*/ //static int msglevel =MSG_LEVEL_INFO; #define BY_RF2959_REG_LEN 23 //24bits #define CB_RF2959_INIT_SEQ 15 #define SWITCH_CHANNEL_DELAY_RF2959 200 //us #define RF2959_PWR_IDX_LEN 32 #define BY_MA2825_REG_LEN 23 //24bit #define CB_MA2825_INIT_SEQ 13 #define SWITCH_CHANNEL_DELAY_MA2825 200 //us #define MA2825_PWR_IDX_LEN 31 #define BY_AL2230_REG_LEN 23 //24bit #define CB_AL2230_INIT_SEQ 15 #define SWITCH_CHANNEL_DELAY_AL2230 200 //us #define AL2230_PWR_IDX_LEN 64 #define BY_UW2451_REG_LEN 23 #define CB_UW2451_INIT_SEQ 6 #define SWITCH_CHANNEL_DELAY_UW2451 200 //us #define UW2451_PWR_IDX_LEN 25 //{{ RobertYu: 20041118 #define BY_MA2829_REG_LEN 23 //24bit #define CB_MA2829_INIT_SEQ 13 #define SWITCH_CHANNEL_DELAY_MA2829 200 //us #define MA2829_PWR_IDX_LEN 64 //}} RobertYu //{{ RobertYu:20050103 #define BY_AL7230_REG_LEN 23 //24bit #define CB_AL7230_INIT_SEQ 16 #define SWITCH_CHANNEL_DELAY_AL7230 200 //us #define AL7230_PWR_IDX_LEN 64 //}} RobertYu //{{ RobertYu: 20041210 #define BY_UW2452_REG_LEN 23 #define CB_UW2452_INIT_SEQ 5 //RoberYu:20050113, Rev0.2 Programming Guide(remove R3, so 6-->5) #define SWITCH_CHANNEL_DELAY_UW2452 100 //us #define UW2452_PWR_IDX_LEN 64 //}} RobertYu #define BY_VT3226_REG_LEN 23 #define CB_VT3226_INIT_SEQ 12 #define SWITCH_CHANNEL_DELAY_VT3226 200 //us #define VT3226_PWR_IDX_LEN 16 /*--------------------- Static Classes ----------------------------*/ /*--------------------- Static Variables --------------------------*/ const unsigned long dwAL2230InitTable[CB_AL2230_INIT_SEQ] = { 0x03F79000+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // 0x03333100+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // 0x01A00200+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // 0x00FFF300+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // 0x0005A400+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // 0x0F4DC500+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // 0x0805B600+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // 0x0146C700+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // 0x00068800+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // 0x0403B900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // 0x00DBBA00+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // 0x00099B00+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // 0x0BDFFC00+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x00000D00+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x00580F00+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW }; const unsigned long dwAL2230ChannelTable0[CB_MAX_CHANNEL] = { 0x03F79000+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 1, Tf = 2412MHz 0x03F79000+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 2, Tf = 2417MHz 0x03E79000+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 3, Tf = 2422MHz 0x03E79000+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 4, Tf = 2427MHz 0x03F7A000+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 5, Tf = 2432MHz 0x03F7A000+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 6, Tf = 2437MHz 0x03E7A000+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 7, Tf = 2442MHz 0x03E7A000+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 8, Tf = 2447MHz 0x03F7B000+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 9, Tf = 2452MHz 0x03F7B000+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 10, Tf = 2457MHz 0x03E7B000+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 11, Tf = 2462MHz 0x03E7B000+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 12, Tf = 2467MHz 0x03F7C000+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 13, Tf = 2472MHz 0x03E7C000+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW // channel = 14, Tf = 2412M }; const unsigned long dwAL2230ChannelTable1[CB_MAX_CHANNEL] = { 0x03333100+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 1, Tf = 2412MHz 0x0B333100+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 2, Tf = 2417MHz 0x03333100+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 3, Tf = 2422MHz 0x0B333100+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 4, Tf = 2427MHz 0x03333100+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 5, Tf = 2432MHz 0x0B333100+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 6, Tf = 2437MHz 0x03333100+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 7, Tf = 2442MHz 0x0B333100+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 8, Tf = 2447MHz 0x03333100+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 9, Tf = 2452MHz 0x0B333100+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 10, Tf = 2457MHz 0x03333100+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 11, Tf = 2462MHz 0x0B333100+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 12, Tf = 2467MHz 0x03333100+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 13, Tf = 2472MHz 0x06666100+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW // channel = 14, Tf = 2412M }; unsigned long dwAL2230PowerTable[AL2230_PWR_IDX_LEN] = { 0x04040900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04041900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04042900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04043900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04044900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04045900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04046900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04047900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04048900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04049900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x0404A900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x0404B900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x0404C900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x0404D900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x0404E900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x0404F900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04050900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04051900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04052900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04053900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04054900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04055900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04056900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04057900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04058900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04059900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x0405A900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x0405B900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x0405C900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x0405D900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x0405E900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x0405F900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04060900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04061900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04062900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04063900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04064900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04065900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04066900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04067900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04068900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04069900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x0406A900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x0406B900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x0406C900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x0406D900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x0406E900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x0406F900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04070900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04071900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04072900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04073900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04074900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04075900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04076900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04077900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04078900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04079900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x0407A900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x0407B900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x0407C900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x0407D900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x0407E900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x0407F900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW }; //{{ RobertYu:20050104 // 40MHz reference frequency // Need to Pull PLLON(PE3) low when writing channel registers through 3-wire. const unsigned long dwAL7230InitTable[CB_AL7230_INIT_SEQ] = { 0x00379000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // Channel1 // Need modify for 11a 0x13333100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // Channel1 // Need modify for 11a 0x841FF200+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // Need modify for 11a: 451FE2 0x3FDFA300+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // Need modify for 11a: 5FDFA3 0x7FD78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // 11b/g // Need modify for 11a //0x802B4500+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // Need modify for 11a: 8D1B45 // RoberYu:20050113, Rev0.47 Regsiter Setting Guide 0x802B5500+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // Need modify for 11a: 8D1B55 0x56AF3600+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, 0xCE020700+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // Need modify for 11a: 860207 0x6EBC0800+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, 0x221BB900+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, 0xE0000A00+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // Need modify for 11a: E0600A 0x08031B00+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // init 0x080B1B00 => 0x080F1B00 for 3 wire control TxGain(D10) //0x00093C00+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // Need modify for 11a: 00143C // RoberYu:20050113, Rev0.47 Regsiter Setting Guide 0x000A3C00+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // Need modify for 11a: 00143C 0xFFFFFD00+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, 0x00000E00+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, 0x1ABA8F00+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW // Need modify for 11a: 12BACF }; const unsigned long dwAL7230InitTableAMode[CB_AL7230_INIT_SEQ] = { 0x0FF52000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // Channel184 // Need modify for 11b/g 0x00000100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // Channel184 // Need modify for 11b/g 0x451FE200+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // Need modify for 11b/g 0x5FDFA300+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // Need modify for 11b/g 0x67F78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // 11a // Need modify for 11b/g 0x853F5500+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // Need modify for 11b/g, RoberYu:20050113 0x56AF3600+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, 0xCE020700+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // Need modify for 11b/g 0x6EBC0800+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, 0x221BB900+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, 0xE0600A00+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // Need modify for 11b/g 0x08031B00+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // init 0x080B1B00 => 0x080F1B00 for 3 wire control TxGain(D10) 0x00147C00+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // Need modify for 11b/g 0xFFFFFD00+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, 0x00000E00+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, 0x12BACF00+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW // Need modify for 11b/g }; const unsigned long dwAL7230ChannelTable0[CB_MAX_CHANNEL] = { 0x00379000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 1, Tf = 2412MHz 0x00379000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 2, Tf = 2417MHz 0x00379000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 3, Tf = 2422MHz 0x00379000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 4, Tf = 2427MHz 0x0037A000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 5, Tf = 2432MHz 0x0037A000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 6, Tf = 2437MHz 0x0037A000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 7, Tf = 2442MHz 0x0037A000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 8, Tf = 2447MHz //RobertYu: 20050218, update for APNode 0.49 0x0037B000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 9, Tf = 2452MHz //RobertYu: 20050218, update for APNode 0.49 0x0037B000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 10, Tf = 2457MHz //RobertYu: 20050218, update for APNode 0.49 0x0037B000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 11, Tf = 2462MHz //RobertYu: 20050218, update for APNode 0.49 0x0037B000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 12, Tf = 2467MHz //RobertYu: 20050218, update for APNode 0.49 0x0037C000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 13, Tf = 2472MHz //RobertYu: 20050218, update for APNode 0.49 0x0037C000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 14, Tf = 2484MHz // 4.9G => Ch 183, 184, 185, 187, 188, 189, 192, 196 (Value:15 ~ 22) 0x0FF52000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 183, Tf = 4915MHz (15) 0x0FF52000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 184, Tf = 4920MHz (16) 0x0FF52000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 185, Tf = 4925MHz (17) 0x0FF52000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 187, Tf = 4935MHz (18) 0x0FF52000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 188, Tf = 4940MHz (19) 0x0FF52000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 189, Tf = 4945MHz (20) 0x0FF53000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 192, Tf = 4960MHz (21) 0x0FF53000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 196, Tf = 4980MHz (22) // 5G => Ch 7, 8, 9, 11, 12, 16, 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64, // 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165 (Value 23 ~ 56) 0x0FF54000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 7, Tf = 5035MHz (23) 0x0FF54000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 8, Tf = 5040MHz (24) 0x0FF54000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 9, Tf = 5045MHz (25) 0x0FF54000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 11, Tf = 5055MHz (26) 0x0FF54000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 12, Tf = 5060MHz (27) 0x0FF55000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 16, Tf = 5080MHz (28) 0x0FF56000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 34, Tf = 5170MHz (29) 0x0FF56000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 36, Tf = 5180MHz (30) 0x0FF57000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 38, Tf = 5190MHz (31) //RobertYu: 20050218, update for APNode 0.49 0x0FF57000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 40, Tf = 5200MHz (32) 0x0FF57000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 42, Tf = 5210MHz (33) 0x0FF57000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 44, Tf = 5220MHz (34) 0x0FF57000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 46, Tf = 5230MHz (35) 0x0FF57000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 48, Tf = 5240MHz (36) 0x0FF58000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 52, Tf = 5260MHz (37) 0x0FF58000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 56, Tf = 5280MHz (38) 0x0FF58000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 60, Tf = 5300MHz (39) 0x0FF59000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 64, Tf = 5320MHz (40) 0x0FF5C000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 100, Tf = 5500MHz (41) 0x0FF5C000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 104, Tf = 5520MHz (42) 0x0FF5C000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 108, Tf = 5540MHz (43) 0x0FF5D000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 112, Tf = 5560MHz (44) 0x0FF5D000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 116, Tf = 5580MHz (45) 0x0FF5D000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 120, Tf = 5600MHz (46) 0x0FF5E000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 124, Tf = 5620MHz (47) 0x0FF5E000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 128, Tf = 5640MHz (48) 0x0FF5E000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 132, Tf = 5660MHz (49) 0x0FF5F000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 136, Tf = 5680MHz (50) 0x0FF5F000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 140, Tf = 5700MHz (51) 0x0FF60000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 149, Tf = 5745MHz (52) 0x0FF60000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 153, Tf = 5765MHz (53) 0x0FF60000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 157, Tf = 5785MHz (54) 0x0FF61000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 161, Tf = 5805MHz (55) 0x0FF61000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW // channel = 165, Tf = 5825MHz (56) }; const unsigned long dwAL7230ChannelTable1[CB_MAX_CHANNEL] = { 0x13333100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 1, Tf = 2412MHz 0x1B333100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 2, Tf = 2417MHz 0x03333100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 3, Tf = 2422MHz 0x0B333100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 4, Tf = 2427MHz 0x13333100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 5, Tf = 2432MHz 0x1B333100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 6, Tf = 2437MHz 0x03333100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 7, Tf = 2442MHz 0x0B333100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 8, Tf = 2447MHz 0x13333100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 9, Tf = 2452MHz 0x1B333100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 10, Tf = 2457MHz 0x03333100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 11, Tf = 2462MHz 0x0B333100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 12, Tf = 2467MHz 0x13333100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 13, Tf = 2472MHz 0x06666100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 14, Tf = 2484MHz // 4.9G => Ch 183, 184, 185, 187, 188, 189, 192, 196 (Value:15 ~ 22) 0x1D555100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 183, Tf = 4915MHz (15) 0x00000100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 184, Tf = 4920MHz (16) 0x02AAA100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 185, Tf = 4925MHz (17) 0x08000100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 187, Tf = 4935MHz (18) 0x0AAAA100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 188, Tf = 4940MHz (19) 0x0D555100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 189, Tf = 4945MHz (20) 0x15555100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 192, Tf = 4960MHz (21) 0x00000100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 196, Tf = 4980MHz (22) // 5G => Ch 7, 8, 9, 11, 12, 16, 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64, // 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165 (Value 23 ~ 56) 0x1D555100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 7, Tf = 5035MHz (23) 0x00000100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 8, Tf = 5040MHz (24) 0x02AAA100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 9, Tf = 5045MHz (25) 0x08000100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 11, Tf = 5055MHz (26) 0x0AAAA100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 12, Tf = 5060MHz (27) 0x15555100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 16, Tf = 5080MHz (28) 0x05555100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 34, Tf = 5170MHz (29) 0x0AAAA100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 36, Tf = 5180MHz (30) 0x10000100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 38, Tf = 5190MHz (31) 0x15555100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 40, Tf = 5200MHz (32) 0x1AAAA100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 42, Tf = 5210MHz (33) 0x00000100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 44, Tf = 5220MHz (34) 0x05555100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 46, Tf = 5230MHz (35) 0x0AAAA100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 48, Tf = 5240MHz (36) 0x15555100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 52, Tf = 5260MHz (37) 0x00000100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 56, Tf = 5280MHz (38) 0x0AAAA100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 60, Tf = 5300MHz (39) 0x15555100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 64, Tf = 5320MHz (40) 0x15555100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 100, Tf = 5500MHz (41) 0x00000100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 104, Tf = 5520MHz (42) 0x0AAAA100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 108, Tf = 5540MHz (43) 0x15555100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 112, Tf = 5560MHz (44) 0x00000100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 116, Tf = 5580MHz (45) 0x0AAAA100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 120, Tf = 5600MHz (46) 0x15555100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 124, Tf = 5620MHz (47) 0x00000100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 128, Tf = 5640MHz (48) 0x0AAAA100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 132, Tf = 5660MHz (49) 0x15555100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 136, Tf = 5680MHz (50) 0x00000100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 140, Tf = 5700MHz (51) 0x18000100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 149, Tf = 5745MHz (52) 0x02AAA100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 153, Tf = 5765MHz (53) 0x0D555100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 157, Tf = 5785MHz (54) 0x18000100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 161, Tf = 5805MHz (55) 0x02AAA100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW // channel = 165, Tf = 5825MHz (56) }; const unsigned long dwAL7230ChannelTable2[CB_MAX_CHANNEL] = { 0x7FD78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 1, Tf = 2412MHz 0x7FD78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 2, Tf = 2417MHz 0x7FD78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 3, Tf = 2422MHz 0x7FD78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 4, Tf = 2427MHz 0x7FD78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 5, Tf = 2432MHz 0x7FD78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 6, Tf = 2437MHz 0x7FD78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 7, Tf = 2442MHz 0x7FD78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 8, Tf = 2447MHz 0x7FD78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 9, Tf = 2452MHz 0x7FD78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 10, Tf = 2457MHz 0x7FD78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 11, Tf = 2462MHz 0x7FD78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 12, Tf = 2467MHz 0x7FD78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 13, Tf = 2472MHz 0x7FD78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 14, Tf = 2484MHz // 4.9G => Ch 183, 184, 185, 187, 188, 189, 192, 196 (Value:15 ~ 22) 0x77D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 183, Tf = 4915MHz (15) 0x67D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 184, Tf = 4920MHz (16) 0x77D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 185, Tf = 4925MHz (17) 0x77D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 187, Tf = 4935MHz (18) 0x77D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 188, Tf = 4940MHz (19) 0x77D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 189, Tf = 4945MHz (20) 0x77D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 192, Tf = 4960MHz (21) 0x67D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 196, Tf = 4980MHz (22) // 5G => Ch 7, 8, 9, 11, 12, 16, 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64, // 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165 (Value 23 ~ 56) 0x77D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 7, Tf = 5035MHz (23) 0x67D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 8, Tf = 5040MHz (24) 0x77D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 9, Tf = 5045MHz (25) 0x77D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 11, Tf = 5055MHz (26) 0x77D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 12, Tf = 5060MHz (27) 0x77D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 16, Tf = 5080MHz (28) 0x77D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 34, Tf = 5170MHz (29) 0x77D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 36, Tf = 5180MHz (30) 0x77D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 38, Tf = 5190MHz (31) 0x77D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 40, Tf = 5200MHz (32) 0x77D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 42, Tf = 5210MHz (33) 0x67D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 44, Tf = 5220MHz (34) 0x77D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 46, Tf = 5230MHz (35) 0x77D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 48, Tf = 5240MHz (36) 0x77D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 52, Tf = 5260MHz (37) 0x67D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 56, Tf = 5280MHz (38) 0x77D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 60, Tf = 5300MHz (39) 0x77D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 64, Tf = 5320MHz (40) 0x77D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 100, Tf = 5500MHz (41) 0x67D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 104, Tf = 5520MHz (42) 0x77D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 108, Tf = 5540MHz (43) 0x77D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 112, Tf = 5560MHz (44) 0x67D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 116, Tf = 5580MHz (45) 0x77D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 120, Tf = 5600MHz (46) 0x77D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 124, Tf = 5620MHz (47) 0x67D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 128, Tf = 5640MHz (48) 0x77D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 132, Tf = 5660MHz (49) 0x77D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 136, Tf = 5680MHz (50) 0x67D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 140, Tf = 5700MHz (51) 0x77D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 149, Tf = 5745MHz (52) 0x77D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 153, Tf = 5765MHz (53) 0x77D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 157, Tf = 5785MHz (54) 0x77D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 161, Tf = 5805MHz (55) 0x77D78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW // channel = 165, Tf = 5825MHz (56) }; //}} RobertYu /*--------------------- Static Functions --------------------------*/ /* * Description: AIROHA IFRF chip init function * * Parameters: * In: * dwIoBase - I/O base address * Out: * none * * Return Value: true if succeeded; false if failed. * */ bool s_bAL7230Init (unsigned long dwIoBase) { int ii; bool bResult; bResult = true; //3-wire control for normal mode VNSvOutPortB(dwIoBase + MAC_REG_SOFTPWRCTL, 0); MACvWordRegBitsOn(dwIoBase, MAC_REG_SOFTPWRCTL, (SOFTPWRCTL_SWPECTI | SOFTPWRCTL_TXPEINV)); BBvPowerSaveModeOFF(dwIoBase); //RobertYu:20050106, have DC value for Calibration for (ii = 0; ii < CB_AL7230_INIT_SEQ; ii++) bResult &= IFRFbWriteEmbeded(dwIoBase, dwAL7230InitTable[ii]); // PLL On MACvWordRegBitsOn(dwIoBase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE3); //Calibration MACvTimer0MicroSDelay(dwIoBase, 150);//150us bResult &= IFRFbWriteEmbeded(dwIoBase, (0x9ABA8F00+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW)); //TXDCOC:active, RCK:diable MACvTimer0MicroSDelay(dwIoBase, 30);//30us bResult &= IFRFbWriteEmbeded(dwIoBase, (0x3ABA8F00+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW)); //TXDCOC:diable, RCK:active MACvTimer0MicroSDelay(dwIoBase, 30);//30us bResult &= IFRFbWriteEmbeded(dwIoBase, dwAL7230InitTable[CB_AL7230_INIT_SEQ-1]); //TXDCOC:diable, RCK:diable MACvWordRegBitsOn(dwIoBase, MAC_REG_SOFTPWRCTL, (SOFTPWRCTL_SWPE3 | SOFTPWRCTL_SWPE2 | SOFTPWRCTL_SWPECTI | SOFTPWRCTL_TXPEINV)); BBvPowerSaveModeON(dwIoBase); // RobertYu:20050106 // PE1: TX_ON, PE2: RX_ON, PE3: PLLON //3-wire control for power saving mode VNSvOutPortB(dwIoBase + MAC_REG_PSPWRSIG, (PSSIG_WPE3 | PSSIG_WPE2)); //1100 0000 return bResult; } // Need to Pull PLLON low when writing channel registers through 3-wire interface bool s_bAL7230SelectChannel (unsigned long dwIoBase, unsigned char byChannel) { bool bResult; bResult = true; // PLLON Off MACvWordRegBitsOff(dwIoBase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE3); bResult &= IFRFbWriteEmbeded (dwIoBase, dwAL7230ChannelTable0[byChannel-1]); //Reg0 bResult &= IFRFbWriteEmbeded (dwIoBase, dwAL7230ChannelTable1[byChannel-1]); //Reg1 bResult &= IFRFbWriteEmbeded (dwIoBase, dwAL7230ChannelTable2[byChannel-1]); //Reg4 // PLLOn On MACvWordRegBitsOn(dwIoBase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE3); // Set Channel[7] = 0 to tell H/W channel is changing now. VNSvOutPortB(dwIoBase + MAC_REG_CHANNEL, (byChannel & 0x7F)); MACvTimer0MicroSDelay(dwIoBase, SWITCH_CHANNEL_DELAY_AL7230); // Set Channel[7] = 1 to tell H/W channel change is done. VNSvOutPortB(dwIoBase + MAC_REG_CHANNEL, (byChannel | 0x80)); return bResult; } /* * Description: Select channel with UW2452 chip * * Parameters: * In: * dwIoBase - I/O base address * uChannel - Channel number * Out: * none * * Return Value: true if succeeded; false if failed. * */ //{{ RobertYu: 20041210 /* * Description: UW2452 IFRF chip init function * * Parameters: * In: * dwIoBase - I/O base address * Out: * none * * Return Value: true if succeeded; false if failed. * */ //}} RobertYu //////////////////////////////////////////////////////////////////////////////// /* * Description: VT3226 IFRF chip init function * * Parameters: * In: * dwIoBase - I/O base address * Out: * none * * Return Value: true if succeeded; false if failed. * */ /* * Description: Select channel with VT3226 chip * * Parameters: * In: * dwIoBase - I/O base address * uChannel - Channel number * Out: * none * * Return Value: true if succeeded; false if failed. * */ /*--------------------- Export Variables --------------------------*/ /*--------------------- Export Functions --------------------------*/ /* * Description: Write to IF/RF, by embeded programming * * Parameters: * In: * dwIoBase - I/O base address * dwData - data to write * Out: * none * * Return Value: true if succeeded; false if failed. * */ bool IFRFbWriteEmbeded (unsigned long dwIoBase, unsigned long dwData) { unsigned short ww; unsigned long dwValue; VNSvOutPortD(dwIoBase + MAC_REG_IFREGCTL, dwData); // W_MAX_TIMEOUT is the timeout period for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { VNSvInPortD(dwIoBase + MAC_REG_IFREGCTL, &dwValue); if (dwValue & IFREGCTL_DONE) break; } if (ww == W_MAX_TIMEOUT) { // DBG_PORT80_ALWAYS(0x32); return false; } return true; } /* * Description: RFMD RF2959 IFRF chip init function * * Parameters: * In: * dwIoBase - I/O base address * Out: * none * * Return Value: true if succeeded; false if failed. * */ /* * Description: Select channel with RFMD 2959 chip * * Parameters: * In: * dwIoBase - I/O base address * uChannel - Channel number * Out: * none * * Return Value: true if succeeded; false if failed. * */ /* * Description: AIROHA IFRF chip init function * * Parameters: * In: * dwIoBase - I/O base address * Out: * none * * Return Value: true if succeeded; false if failed. * */ bool RFbAL2230Init (unsigned long dwIoBase) { int ii; bool bResult; bResult = true; //3-wire control for normal mode VNSvOutPortB(dwIoBase + MAC_REG_SOFTPWRCTL, 0); MACvWordRegBitsOn(dwIoBase, MAC_REG_SOFTPWRCTL, (SOFTPWRCTL_SWPECTI | SOFTPWRCTL_TXPEINV)); //2008-8-21 chester <add> // PLL Off MACvWordRegBitsOff(dwIoBase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE3); //patch abnormal AL2230 frequency output //2008-8-21 chester <add> IFRFbWriteEmbeded(dwIoBase, (0x07168700+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW)); for (ii = 0; ii < CB_AL2230_INIT_SEQ; ii++) bResult &= IFRFbWriteEmbeded(dwIoBase, dwAL2230InitTable[ii]); //2008-8-21 chester <add> MACvTimer0MicroSDelay(dwIoBase, 30); //delay 30 us // PLL On MACvWordRegBitsOn(dwIoBase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE3); MACvTimer0MicroSDelay(dwIoBase, 150);//150us bResult &= IFRFbWriteEmbeded(dwIoBase, (0x00d80f00+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW)); MACvTimer0MicroSDelay(dwIoBase, 30);//30us bResult &= IFRFbWriteEmbeded(dwIoBase, (0x00780f00+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW)); MACvTimer0MicroSDelay(dwIoBase, 30);//30us bResult &= IFRFbWriteEmbeded(dwIoBase, dwAL2230InitTable[CB_AL2230_INIT_SEQ-1]); MACvWordRegBitsOn(dwIoBase, MAC_REG_SOFTPWRCTL, (SOFTPWRCTL_SWPE3 | SOFTPWRCTL_SWPE2 | SOFTPWRCTL_SWPECTI | SOFTPWRCTL_TXPEINV)); //3-wire control for power saving mode VNSvOutPortB(dwIoBase + MAC_REG_PSPWRSIG, (PSSIG_WPE3 | PSSIG_WPE2)); //1100 0000 return bResult; } bool RFbAL2230SelectChannel (unsigned long dwIoBase, unsigned char byChannel) { bool bResult; bResult = true; bResult &= IFRFbWriteEmbeded (dwIoBase, dwAL2230ChannelTable0[byChannel-1]); bResult &= IFRFbWriteEmbeded (dwIoBase, dwAL2230ChannelTable1[byChannel-1]); // Set Channel[7] = 0 to tell H/W channel is changing now. VNSvOutPortB(dwIoBase + MAC_REG_CHANNEL, (byChannel & 0x7F)); MACvTimer0MicroSDelay(dwIoBase, SWITCH_CHANNEL_DELAY_AL2230); // Set Channel[7] = 1 to tell H/W channel change is done. VNSvOutPortB(dwIoBase + MAC_REG_CHANNEL, (byChannel | 0x80)); return bResult; } /* * Description: UW2451 IFRF chip init function * * Parameters: * In: * dwIoBase - I/O base address * Out: * none * * Return Value: true if succeeded; false if failed. * */ /* * Description: Select channel with UW2451 chip * * Parameters: * In: * dwIoBase - I/O base address * uChannel - Channel number * Out: * none * * Return Value: true if succeeded; false if failed. * */ /* * Description: Set sleep mode to UW2451 chip * * Parameters: * In: * dwIoBase - I/O base address * uChannel - Channel number * Out: * none * * Return Value: true if succeeded; false if failed. * */ /* * Description: RF init function * * Parameters: * In: * byBBType * byRFType * Out: * none * * Return Value: true if succeeded; false if failed. * */ bool RFbInit ( PSDevice pDevice ) { bool bResult = true; switch (pDevice->byRFType) { case RF_AIROHA : case RF_AL2230S: pDevice->byMaxPwrLevel = AL2230_PWR_IDX_LEN; bResult = RFbAL2230Init(pDevice->PortOffset); break; case RF_AIROHA7230 : pDevice->byMaxPwrLevel = AL7230_PWR_IDX_LEN; bResult = s_bAL7230Init(pDevice->PortOffset); break; case RF_NOTHING : bResult = true; break; default : bResult = false; break; } return bResult; } /* * Description: RF ShutDown function * * Parameters: * In: * byBBType * byRFType * Out: * none * * Return Value: true if succeeded; false if failed. * */ bool RFbShutDown ( PSDevice pDevice ) { bool bResult = true; switch (pDevice->byRFType) { case RF_AIROHA7230 : bResult = IFRFbWriteEmbeded (pDevice->PortOffset, 0x1ABAEF00+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW); break; default : bResult = true; break; } return bResult; } /* * Description: Select channel * * Parameters: * In: * byRFType * byChannel - Channel number * Out: * none * * Return Value: true if succeeded; false if failed. * */ bool RFbSelectChannel (unsigned long dwIoBase, unsigned char byRFType, unsigned char byChannel) { bool bResult = true; switch (byRFType) { case RF_AIROHA : case RF_AL2230S: bResult = RFbAL2230SelectChannel(dwIoBase, byChannel); break; //{{ RobertYu: 20050104 case RF_AIROHA7230 : bResult = s_bAL7230SelectChannel(dwIoBase, byChannel); break; //}} RobertYu case RF_NOTHING : bResult = true; break; default: bResult = false; break; } return bResult; } /* * Description: Write WakeProgSyn * * Parameters: * In: * dwIoBase - I/O base address * uChannel - channel number * bySleepCnt - SleepProgSyn count * * Return Value: None. * */ bool RFvWriteWakeProgSyn (unsigned long dwIoBase, unsigned char byRFType, unsigned int uChannel) { int ii; unsigned char byInitCount = 0; unsigned char bySleepCount = 0; VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, 0); switch (byRFType) { case RF_AIROHA: case RF_AL2230S: if (uChannel > CB_MAX_CHANNEL_24G) return false; byInitCount = CB_AL2230_INIT_SEQ + 2; // Init Reg + Channel Reg (2) bySleepCount = 0; if (byInitCount > (MISCFIFO_SYNDATASIZE - bySleepCount)) { return false; } for (ii = 0; ii < CB_AL2230_INIT_SEQ; ii++ ) { MACvSetMISCFifo(dwIoBase, (unsigned short)(MISCFIFO_SYNDATA_IDX + ii), dwAL2230InitTable[ii]); } MACvSetMISCFifo(dwIoBase, (unsigned short)(MISCFIFO_SYNDATA_IDX + ii), dwAL2230ChannelTable0[uChannel-1]); ii ++; MACvSetMISCFifo(dwIoBase, (unsigned short)(MISCFIFO_SYNDATA_IDX + ii), dwAL2230ChannelTable1[uChannel-1]); break; //{{ RobertYu: 20050104 // Need to check, PLLON need to be low for channel setting case RF_AIROHA7230: byInitCount = CB_AL7230_INIT_SEQ + 3; // Init Reg + Channel Reg (3) bySleepCount = 0; if (byInitCount > (MISCFIFO_SYNDATASIZE - bySleepCount)) { return false; } if (uChannel <= CB_MAX_CHANNEL_24G) { for (ii = 0; ii < CB_AL7230_INIT_SEQ; ii++ ) { MACvSetMISCFifo(dwIoBase, (unsigned short)(MISCFIFO_SYNDATA_IDX + ii), dwAL7230InitTable[ii]); } } else { for (ii = 0; ii < CB_AL7230_INIT_SEQ; ii++ ) { MACvSetMISCFifo(dwIoBase, (unsigned short)(MISCFIFO_SYNDATA_IDX + ii), dwAL7230InitTableAMode[ii]); } } MACvSetMISCFifo(dwIoBase, (unsigned short)(MISCFIFO_SYNDATA_IDX + ii), dwAL7230ChannelTable0[uChannel-1]); ii ++; MACvSetMISCFifo(dwIoBase, (unsigned short)(MISCFIFO_SYNDATA_IDX + ii), dwAL7230ChannelTable1[uChannel-1]); ii ++; MACvSetMISCFifo(dwIoBase, (unsigned short)(MISCFIFO_SYNDATA_IDX + ii), dwAL7230ChannelTable2[uChannel-1]); break; //}} RobertYu case RF_NOTHING : return true; break; default: return false; break; } MACvSetMISCFifo(dwIoBase, MISCFIFO_SYNINFO_IDX, (unsigned long )MAKEWORD(bySleepCount, byInitCount)); return true; } /* * Description: Set Tx power * * Parameters: * In: * dwIoBase - I/O base address * dwRFPowerTable - RF Tx Power Setting * Out: * none * * Return Value: true if succeeded; false if failed. * */ bool RFbSetPower ( PSDevice pDevice, unsigned int uRATE, unsigned int uCH ) { bool bResult = true; unsigned char byPwr = 0; unsigned char byDec = 0; unsigned char byPwrdBm = 0; if (pDevice->dwDiagRefCount != 0) { return true; } if ((uCH < 1) || (uCH > CB_MAX_CHANNEL)) { return false; } switch (uRATE) { case RATE_1M: case RATE_2M: case RATE_5M: case RATE_11M: byPwr = pDevice->abyCCKPwrTbl[uCH]; byPwrdBm = pDevice->abyCCKDefaultPwr[uCH]; //PLICE_DEBUG-> //byPwr+=5; //PLICE_DEBUG <- //printk("Rate <11:byPwr is %d\n",byPwr); break; case RATE_6M: case RATE_9M: case RATE_18M: byPwr = pDevice->abyOFDMPwrTbl[uCH]; if (pDevice->byRFType == RF_UW2452) { byDec = byPwr + 14; } else { byDec = byPwr + 10; } if (byDec >= pDevice->byMaxPwrLevel) { byDec = pDevice->byMaxPwrLevel-1; } if (pDevice->byRFType == RF_UW2452) { byPwrdBm = byDec - byPwr; byPwrdBm /= 3; } else { byPwrdBm = byDec - byPwr; byPwrdBm >>= 1; } byPwrdBm += pDevice->abyOFDMDefaultPwr[uCH]; byPwr = byDec; //PLICE_DEBUG-> //byPwr+=5; //PLICE_DEBUG<- //printk("Rate <24:byPwr is %d\n",byPwr); break; case RATE_24M: case RATE_36M: case RATE_48M: case RATE_54M: byPwr = pDevice->abyOFDMPwrTbl[uCH]; byPwrdBm = pDevice->abyOFDMDefaultPwr[uCH]; //PLICE_DEBUG-> //byPwr+=5; //PLICE_DEBUG<- //printk("Rate < 54:byPwr is %d\n",byPwr); break; } #if 0 // 802.11h TPC if (pDevice->bLinkPass == true) { // do not over local constraint if (byPwrdBm > pDevice->abyLocalPwr[uCH]) { pDevice->byCurPwrdBm = pDevice->abyLocalPwr[uCH]; byDec = byPwrdBm - pDevice->abyLocalPwr[uCH]; if (pDevice->byRFType == RF_UW2452) { byDec *= 3; } else { byDec <<= 1; } if (byPwr > byDec) { byPwr -= byDec; } else { byPwr = 0; } } else { pDevice->byCurPwrdBm = byPwrdBm; } } else { // do not over regulatory constraint if (byPwrdBm > pDevice->abyRegPwr[uCH]) { pDevice->byCurPwrdBm = pDevice->abyRegPwr[uCH]; byDec = byPwrdBm - pDevice->abyRegPwr[uCH]; if (pDevice->byRFType == RF_UW2452) { byDec *= 3; } else { byDec <<= 1; } if (byPwr > byDec) { byPwr -= byDec; } else { byPwr = 0; } } else { pDevice->byCurPwrdBm = byPwrdBm; } } #endif // if (pDevice->byLocalID <= REV_ID_VT3253_B1) { if (pDevice->byCurPwr == byPwr) { return true; } bResult = RFbRawSetPower(pDevice, byPwr, uRATE); // } if (bResult == true) { pDevice->byCurPwr = byPwr; } return bResult; } /* * Description: Set Tx power * * Parameters: * In: * dwIoBase - I/O base address * dwRFPowerTable - RF Tx Power Setting * Out: * none * * Return Value: true if succeeded; false if failed. * */ bool RFbRawSetPower ( PSDevice pDevice, unsigned char byPwr, unsigned int uRATE ) { bool bResult = true; unsigned long dwMax7230Pwr = 0; if (byPwr >= pDevice->byMaxPwrLevel) { return (false); } switch (pDevice->byRFType) { case RF_AIROHA : bResult &= IFRFbWriteEmbeded(pDevice->PortOffset, dwAL2230PowerTable[byPwr]); if (uRATE <= RATE_11M) { bResult &= IFRFbWriteEmbeded(pDevice->PortOffset, 0x0001B400+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW); } else { bResult &= IFRFbWriteEmbeded(pDevice->PortOffset, 0x0005A400+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW); } break; case RF_AL2230S : bResult &= IFRFbWriteEmbeded(pDevice->PortOffset, dwAL2230PowerTable[byPwr]); if (uRATE <= RATE_11M) { bResult &= IFRFbWriteEmbeded(pDevice->PortOffset, 0x040C1400+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW); bResult &= IFRFbWriteEmbeded(pDevice->PortOffset, 0x00299B00+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW); }else { bResult &= IFRFbWriteEmbeded(pDevice->PortOffset, 0x0005A400+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW); bResult &= IFRFbWriteEmbeded(pDevice->PortOffset, 0x00099B00+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW); } break; case RF_AIROHA7230: // 0x080F1B00 for 3 wire control TxGain(D10) and 0x31 as TX Gain value dwMax7230Pwr = 0x080C0B00 | ( (byPwr) << 12 ) | (BY_AL7230_REG_LEN << 3 ) | IFREGCTL_REGW; bResult &= IFRFbWriteEmbeded(pDevice->PortOffset, dwMax7230Pwr); break; default : break; } return bResult; } /*+ * * Routine Description: * Translate RSSI to dBm * * Parameters: * In: * pDevice - The adapter to be translated * byCurrRSSI - RSSI to be translated * Out: * pdwdbm - Translated dbm number * * Return Value: none * -*/ void RFvRSSITodBm ( PSDevice pDevice, unsigned char byCurrRSSI, long * pldBm ) { unsigned char byIdx = (((byCurrRSSI & 0xC0) >> 6) & 0x03); long b = (byCurrRSSI & 0x3F); long a = 0; unsigned char abyAIROHARF[4] = {0, 18, 0, 40}; switch (pDevice->byRFType) { case RF_AIROHA: case RF_AL2230S: case RF_AIROHA7230: //RobertYu: 20040104 a = abyAIROHARF[byIdx]; break; default: break; } *pldBm = -1 * (a + b * 2); } //////////////////////////////////////////////////////////////////////////////// //{{ RobertYu: 20050104 // Post processing for the 11b/g and 11a. // for save time on changing Reg2,3,5,7,10,12,15 bool RFbAL7230SelectChannelPostProcess (unsigned long dwIoBase, unsigned char byOldChannel, unsigned char byNewChannel) { bool bResult; bResult = true; // if change between 11 b/g and 11a need to update the following register // Channel Index 1~14 if( (byOldChannel <= CB_MAX_CHANNEL_24G) && (byNewChannel > CB_MAX_CHANNEL_24G) ) { // Change from 2.4G to 5G bResult &= IFRFbWriteEmbeded(dwIoBase, dwAL7230InitTableAMode[2]); //Reg2 bResult &= IFRFbWriteEmbeded(dwIoBase, dwAL7230InitTableAMode[3]); //Reg3 bResult &= IFRFbWriteEmbeded(dwIoBase, dwAL7230InitTableAMode[5]); //Reg5 bResult &= IFRFbWriteEmbeded(dwIoBase, dwAL7230InitTableAMode[7]); //Reg7 bResult &= IFRFbWriteEmbeded(dwIoBase, dwAL7230InitTableAMode[10]);//Reg10 bResult &= IFRFbWriteEmbeded(dwIoBase, dwAL7230InitTableAMode[12]);//Reg12 bResult &= IFRFbWriteEmbeded(dwIoBase, dwAL7230InitTableAMode[15]);//Reg15 } else if( (byOldChannel > CB_MAX_CHANNEL_24G) && (byNewChannel <= CB_MAX_CHANNEL_24G) ) { // change from 5G to 2.4G bResult &= IFRFbWriteEmbeded(dwIoBase, dwAL7230InitTable[2]); //Reg2 bResult &= IFRFbWriteEmbeded(dwIoBase, dwAL7230InitTable[3]); //Reg3 bResult &= IFRFbWriteEmbeded(dwIoBase, dwAL7230InitTable[5]); //Reg5 bResult &= IFRFbWriteEmbeded(dwIoBase, dwAL7230InitTable[7]); //Reg7 bResult &= IFRFbWriteEmbeded(dwIoBase, dwAL7230InitTable[10]);//Reg10 bResult &= IFRFbWriteEmbeded(dwIoBase, dwAL7230InitTable[12]);//Reg12 bResult &= IFRFbWriteEmbeded(dwIoBase, dwAL7230InitTable[15]);//Reg15 } return bResult; } //}} RobertYu ////////////////////////////////////////////////////////////////////////////////
gpl-2.0
syhost/kernel_ef39s_ics_new
drivers/staging/solo6x10/disp.c
8339
8813
/* * Copyright (C) 2010 Bluecherry, LLC www.bluecherrydvr.com * Copyright (C) 2010 Ben Collins <bcollins@bluecherry.net> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include <linux/kernel.h> #include <linux/module.h> #include <linux/videodev2.h> #include <media/v4l2-ioctl.h> #include "solo6x10.h" #define SOLO_VCLK_DELAY 3 #define SOLO_PROGRESSIVE_VSIZE 1024 #define SOLO_MOT_THRESH_W 64 #define SOLO_MOT_THRESH_H 64 #define SOLO_MOT_THRESH_SIZE 8192 #define SOLO_MOT_THRESH_REAL (SOLO_MOT_THRESH_W * SOLO_MOT_THRESH_H) #define SOLO_MOT_FLAG_SIZE 512 #define SOLO_MOT_FLAG_AREA (SOLO_MOT_FLAG_SIZE * 32) static unsigned video_type; module_param(video_type, uint, 0644); MODULE_PARM_DESC(video_type, "video_type (0 = NTSC/Default, 1 = PAL)"); static void solo_vin_config(struct solo_dev *solo_dev) { solo_dev->vin_hstart = 8; solo_dev->vin_vstart = 2; solo_reg_write(solo_dev, SOLO_SYS_VCLK, SOLO_VCLK_SELECT(2) | SOLO_VCLK_VIN1415_DELAY(SOLO_VCLK_DELAY) | SOLO_VCLK_VIN1213_DELAY(SOLO_VCLK_DELAY) | SOLO_VCLK_VIN1011_DELAY(SOLO_VCLK_DELAY) | SOLO_VCLK_VIN0809_DELAY(SOLO_VCLK_DELAY) | SOLO_VCLK_VIN0607_DELAY(SOLO_VCLK_DELAY) | SOLO_VCLK_VIN0405_DELAY(SOLO_VCLK_DELAY) | SOLO_VCLK_VIN0203_DELAY(SOLO_VCLK_DELAY) | SOLO_VCLK_VIN0001_DELAY(SOLO_VCLK_DELAY)); solo_reg_write(solo_dev, SOLO_VI_ACT_I_P, SOLO_VI_H_START(solo_dev->vin_hstart) | SOLO_VI_V_START(solo_dev->vin_vstart) | SOLO_VI_V_STOP(solo_dev->vin_vstart + solo_dev->video_vsize)); solo_reg_write(solo_dev, SOLO_VI_ACT_I_S, SOLO_VI_H_START(solo_dev->vout_hstart) | SOLO_VI_V_START(solo_dev->vout_vstart) | SOLO_VI_V_STOP(solo_dev->vout_vstart + solo_dev->video_vsize)); solo_reg_write(solo_dev, SOLO_VI_ACT_P, SOLO_VI_H_START(0) | SOLO_VI_V_START(1) | SOLO_VI_V_STOP(SOLO_PROGRESSIVE_VSIZE)); solo_reg_write(solo_dev, SOLO_VI_CH_FORMAT, SOLO_VI_FD_SEL_MASK(0) | SOLO_VI_PROG_MASK(0)); solo_reg_write(solo_dev, SOLO_VI_FMT_CFG, 0); solo_reg_write(solo_dev, SOLO_VI_PAGE_SW, 2); if (solo_dev->video_type == SOLO_VO_FMT_TYPE_NTSC) { solo_reg_write(solo_dev, SOLO_VI_PB_CONFIG, SOLO_VI_PB_USER_MODE); solo_reg_write(solo_dev, SOLO_VI_PB_RANGE_HV, SOLO_VI_PB_HSIZE(858) | SOLO_VI_PB_VSIZE(246)); solo_reg_write(solo_dev, SOLO_VI_PB_ACT_V, SOLO_VI_PB_VSTART(4) | SOLO_VI_PB_VSTOP(4 + 240)); } else { solo_reg_write(solo_dev, SOLO_VI_PB_CONFIG, SOLO_VI_PB_USER_MODE | SOLO_VI_PB_PAL); solo_reg_write(solo_dev, SOLO_VI_PB_RANGE_HV, SOLO_VI_PB_HSIZE(864) | SOLO_VI_PB_VSIZE(294)); solo_reg_write(solo_dev, SOLO_VI_PB_ACT_V, SOLO_VI_PB_VSTART(4) | SOLO_VI_PB_VSTOP(4 + 288)); } solo_reg_write(solo_dev, SOLO_VI_PB_ACT_H, SOLO_VI_PB_HSTART(16) | SOLO_VI_PB_HSTOP(16 + 720)); } static void solo_disp_config(struct solo_dev *solo_dev) { solo_dev->vout_hstart = 6; solo_dev->vout_vstart = 8; solo_reg_write(solo_dev, SOLO_VO_BORDER_LINE_COLOR, (0xa0 << 24) | (0x88 << 16) | (0xa0 << 8) | 0x88); solo_reg_write(solo_dev, SOLO_VO_BORDER_FILL_COLOR, (0x10 << 24) | (0x8f << 16) | (0x10 << 8) | 0x8f); solo_reg_write(solo_dev, SOLO_VO_BKG_COLOR, (16 << 24) | (128 << 16) | (16 << 8) | 128); solo_reg_write(solo_dev, SOLO_VO_FMT_ENC, solo_dev->video_type | SOLO_VO_USER_COLOR_SET_NAV | SOLO_VO_NA_COLOR_Y(0) | SOLO_VO_NA_COLOR_CB(0) | SOLO_VO_NA_COLOR_CR(0)); solo_reg_write(solo_dev, SOLO_VO_ACT_H, SOLO_VO_H_START(solo_dev->vout_hstart) | SOLO_VO_H_STOP(solo_dev->vout_hstart + solo_dev->video_hsize)); solo_reg_write(solo_dev, SOLO_VO_ACT_V, SOLO_VO_V_START(solo_dev->vout_vstart) | SOLO_VO_V_STOP(solo_dev->vout_vstart + solo_dev->video_vsize)); solo_reg_write(solo_dev, SOLO_VO_RANGE_HV, SOLO_VO_H_LEN(solo_dev->video_hsize) | SOLO_VO_V_LEN(solo_dev->video_vsize)); solo_reg_write(solo_dev, SOLO_VI_WIN_SW, 5); solo_reg_write(solo_dev, SOLO_VO_DISP_CTRL, SOLO_VO_DISP_ON | SOLO_VO_DISP_ERASE_COUNT(8) | SOLO_VO_DISP_BASE(SOLO_DISP_EXT_ADDR)); solo_reg_write(solo_dev, SOLO_VO_DISP_ERASE, SOLO_VO_DISP_ERASE_ON); /* Enable channels we support */ solo_reg_write(solo_dev, SOLO_VI_CH_ENA, (1 << solo_dev->nr_chans) - 1); /* Disable the watchdog */ solo_reg_write(solo_dev, SOLO_WATCHDOG, 0); } static int solo_dma_vin_region(struct solo_dev *solo_dev, u32 off, u16 val, int reg_size) { u16 buf[64]; int i; int ret = 0; for (i = 0; i < sizeof(buf) >> 1; i++) buf[i] = val; for (i = 0; i < reg_size; i += sizeof(buf)) ret |= solo_p2m_dma(solo_dev, SOLO_P2M_DMA_ID_VIN, 1, buf, SOLO_MOTION_EXT_ADDR(solo_dev) + off + i, sizeof(buf)); return ret; } void solo_set_motion_threshold(struct solo_dev *solo_dev, u8 ch, u16 val) { if (ch > solo_dev->nr_chans) return; solo_dma_vin_region(solo_dev, SOLO_MOT_FLAG_AREA + (ch * SOLO_MOT_THRESH_SIZE * 2), val, SOLO_MOT_THRESH_REAL); } /* First 8k is motion flag (512 bytes * 16). Following that is an 8k+8k * threshold and working table for each channel. Atleast that's what the * spec says. However, this code (take from rdk) has some mystery 8k * block right after the flag area, before the first thresh table. */ static void solo_motion_config(struct solo_dev *solo_dev) { int i; for (i = 0; i < solo_dev->nr_chans; i++) { /* Clear motion flag area */ solo_dma_vin_region(solo_dev, i * SOLO_MOT_FLAG_SIZE, 0x0000, SOLO_MOT_FLAG_SIZE); /* Clear working cache table */ solo_dma_vin_region(solo_dev, SOLO_MOT_FLAG_AREA + SOLO_MOT_THRESH_SIZE + (i * SOLO_MOT_THRESH_SIZE * 2), 0x0000, SOLO_MOT_THRESH_REAL); /* Set default threshold table */ solo_set_motion_threshold(solo_dev, i, SOLO_DEF_MOT_THRESH); } /* Default motion settings */ solo_reg_write(solo_dev, SOLO_VI_MOT_ADR, SOLO_VI_MOTION_EN(0) | (SOLO_MOTION_EXT_ADDR(solo_dev) >> 16)); solo_reg_write(solo_dev, SOLO_VI_MOT_CTRL, SOLO_VI_MOTION_FRAME_COUNT(3) | SOLO_VI_MOTION_SAMPLE_LENGTH(solo_dev->video_hsize / 16) | /* SOLO_VI_MOTION_INTR_START_STOP | */ SOLO_VI_MOTION_SAMPLE_COUNT(10)); solo_reg_write(solo_dev, SOLO_VI_MOTION_BORDER, 0); solo_reg_write(solo_dev, SOLO_VI_MOTION_BAR, 0); } int solo_disp_init(struct solo_dev *solo_dev) { int i; solo_dev->video_hsize = 704; if (video_type == 0) { solo_dev->video_type = SOLO_VO_FMT_TYPE_NTSC; solo_dev->video_vsize = 240; solo_dev->fps = 30; } else { solo_dev->video_type = SOLO_VO_FMT_TYPE_PAL; solo_dev->video_vsize = 288; solo_dev->fps = 25; } solo_vin_config(solo_dev); solo_motion_config(solo_dev); solo_disp_config(solo_dev); for (i = 0; i < solo_dev->nr_chans; i++) solo_reg_write(solo_dev, SOLO_VI_WIN_ON(i), 1); return 0; } void solo_disp_exit(struct solo_dev *solo_dev) { int i; solo_irq_off(solo_dev, SOLO_IRQ_MOTION); solo_reg_write(solo_dev, SOLO_VO_DISP_CTRL, 0); solo_reg_write(solo_dev, SOLO_VO_ZOOM_CTRL, 0); solo_reg_write(solo_dev, SOLO_VO_FREEZE_CTRL, 0); for (i = 0; i < solo_dev->nr_chans; i++) { solo_reg_write(solo_dev, SOLO_VI_WIN_CTRL0(i), 0); solo_reg_write(solo_dev, SOLO_VI_WIN_CTRL1(i), 0); solo_reg_write(solo_dev, SOLO_VI_WIN_ON(i), 0); } /* Set default border */ for (i = 0; i < 5; i++) solo_reg_write(solo_dev, SOLO_VO_BORDER_X(i), 0); for (i = 0; i < 5; i++) solo_reg_write(solo_dev, SOLO_VO_BORDER_Y(i), 0); solo_reg_write(solo_dev, SOLO_VO_BORDER_LINE_MASK, 0); solo_reg_write(solo_dev, SOLO_VO_BORDER_FILL_MASK, 0); solo_reg_write(solo_dev, SOLO_VO_RECTANGLE_CTRL(0), 0); solo_reg_write(solo_dev, SOLO_VO_RECTANGLE_START(0), 0); solo_reg_write(solo_dev, SOLO_VO_RECTANGLE_STOP(0), 0); solo_reg_write(solo_dev, SOLO_VO_RECTANGLE_CTRL(1), 0); solo_reg_write(solo_dev, SOLO_VO_RECTANGLE_START(1), 0); solo_reg_write(solo_dev, SOLO_VO_RECTANGLE_STOP(1), 0); }
gpl-2.0
wSedlacek/kernel_moto_shamu
security/tomoyo/environ.c
9875
3117
/* * security/tomoyo/environ.c * * Copyright (C) 2005-2011 NTT DATA CORPORATION */ #include "common.h" /** * tomoyo_check_env_acl - Check permission for environment variable's name. * * @r: Pointer to "struct tomoyo_request_info". * @ptr: Pointer to "struct tomoyo_acl_info". * * Returns true if granted, false otherwise. */ static bool tomoyo_check_env_acl(struct tomoyo_request_info *r, const struct tomoyo_acl_info *ptr) { const struct tomoyo_env_acl *acl = container_of(ptr, typeof(*acl), head); return tomoyo_path_matches_pattern(r->param.environ.name, acl->env); } /** * tomoyo_audit_env_log - Audit environment variable name log. * * @r: Pointer to "struct tomoyo_request_info". * * Returns 0 on success, negative value otherwise. */ static int tomoyo_audit_env_log(struct tomoyo_request_info *r) { return tomoyo_supervisor(r, "misc env %s\n", r->param.environ.name->name); } /** * tomoyo_env_perm - Check permission for environment variable's name. * * @r: Pointer to "struct tomoyo_request_info". * @env: The name of environment variable. * * Returns 0 on success, negative value otherwise. * * Caller holds tomoyo_read_lock(). */ int tomoyo_env_perm(struct tomoyo_request_info *r, const char *env) { struct tomoyo_path_info environ; int error; if (!env || !*env) return 0; environ.name = env; tomoyo_fill_path_info(&environ); r->param_type = TOMOYO_TYPE_ENV_ACL; r->param.environ.name = &environ; do { tomoyo_check_acl(r, tomoyo_check_env_acl); error = tomoyo_audit_env_log(r); } while (error == TOMOYO_RETRY_REQUEST); return error; } /** * tomoyo_same_env_acl - Check for duplicated "struct tomoyo_env_acl" entry. * * @a: Pointer to "struct tomoyo_acl_info". * @b: Pointer to "struct tomoyo_acl_info". * * Returns true if @a == @b, false otherwise. */ static bool tomoyo_same_env_acl(const struct tomoyo_acl_info *a, const struct tomoyo_acl_info *b) { const struct tomoyo_env_acl *p1 = container_of(a, typeof(*p1), head); const struct tomoyo_env_acl *p2 = container_of(b, typeof(*p2), head); return p1->env == p2->env; } /** * tomoyo_write_env - Write "struct tomoyo_env_acl" list. * * @param: Pointer to "struct tomoyo_acl_param". * * Returns 0 on success, negative value otherwise. * * Caller holds tomoyo_read_lock(). */ static int tomoyo_write_env(struct tomoyo_acl_param *param) { struct tomoyo_env_acl e = { .head.type = TOMOYO_TYPE_ENV_ACL }; int error = -ENOMEM; const char *data = tomoyo_read_token(param); if (!tomoyo_correct_word(data) || strchr(data, '=')) return -EINVAL; e.env = tomoyo_get_name(data); if (!e.env) return error; error = tomoyo_update_domain(&e.head, sizeof(e), param, tomoyo_same_env_acl, NULL); tomoyo_put_name(e.env); return error; } /** * tomoyo_write_misc - Update environment variable list. * * @param: Pointer to "struct tomoyo_acl_param". * * Returns 0 on success, negative value otherwise. */ int tomoyo_write_misc(struct tomoyo_acl_param *param) { if (tomoyo_str_starts(&param->data, "env ")) return tomoyo_write_env(param); return -EINVAL; }
gpl-2.0
lloydchang/ubuntu-precise
drivers/virtio/virtio_balloon.c
148
9935
/* Virtio balloon implementation, inspired by Dor Loar and Marcelo * Tosatti's implementations. * * Copyright 2008 Rusty Russell IBM Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ //#define DEBUG #include <linux/virtio.h> #include <linux/virtio_balloon.h> #include <linux/swap.h> #include <linux/kthread.h> #include <linux/freezer.h> #include <linux/delay.h> #include <linux/slab.h> #include <linux/module.h> struct virtio_balloon { struct virtio_device *vdev; struct virtqueue *inflate_vq, *deflate_vq, *stats_vq; /* Where the ballooning thread waits for config to change. */ wait_queue_head_t config_change; /* The thread servicing the balloon. */ struct task_struct *thread; /* Waiting for host to ack the pages we released. */ struct completion acked; /* The pages we've told the Host we're not using. */ unsigned int num_pages; struct list_head pages; /* The array of pfns we tell the Host about. */ unsigned int num_pfns; u32 pfns[256]; /* Memory statistics */ int need_stats_update; struct virtio_balloon_stat stats[VIRTIO_BALLOON_S_NR]; }; static struct virtio_device_id id_table[] = { { VIRTIO_ID_BALLOON, VIRTIO_DEV_ANY_ID }, { 0 }, }; static u32 page_to_balloon_pfn(struct page *page) { unsigned long pfn = page_to_pfn(page); BUILD_BUG_ON(PAGE_SHIFT < VIRTIO_BALLOON_PFN_SHIFT); /* Convert pfn from Linux page size to balloon page size. */ return pfn >> (PAGE_SHIFT - VIRTIO_BALLOON_PFN_SHIFT); } static void balloon_ack(struct virtqueue *vq) { struct virtio_balloon *vb; unsigned int len; vb = virtqueue_get_buf(vq, &len); if (vb) complete(&vb->acked); } static void tell_host(struct virtio_balloon *vb, struct virtqueue *vq) { struct scatterlist sg; sg_init_one(&sg, vb->pfns, sizeof(vb->pfns[0]) * vb->num_pfns); init_completion(&vb->acked); /* We should always be able to add one buffer to an empty queue. */ if (virtqueue_add_buf(vq, &sg, 1, 0, vb) < 0) BUG(); virtqueue_kick(vq); /* When host has read buffer, this completes via balloon_ack */ wait_for_completion(&vb->acked); } static void fill_balloon(struct virtio_balloon *vb, size_t num) { /* We can only do one array worth at a time. */ num = min(num, ARRAY_SIZE(vb->pfns)); for (vb->num_pfns = 0; vb->num_pfns < num; vb->num_pfns++) { struct page *page = alloc_page(GFP_HIGHUSER | __GFP_NORETRY | __GFP_NOMEMALLOC | __GFP_NOWARN); if (!page) { if (printk_ratelimit()) dev_printk(KERN_INFO, &vb->vdev->dev, "Out of puff! Can't get %zu pages\n", num); /* Sleep for at least 1/5 of a second before retry. */ msleep(200); break; } vb->pfns[vb->num_pfns] = page_to_balloon_pfn(page); totalram_pages--; vb->num_pages++; list_add(&page->lru, &vb->pages); } /* Didn't get any? Oh well. */ if (vb->num_pfns == 0) return; tell_host(vb, vb->inflate_vq); } static void release_pages_by_pfn(const u32 pfns[], unsigned int num) { unsigned int i; for (i = 0; i < num; i++) { __free_page(pfn_to_page(pfns[i])); totalram_pages++; } } static void leak_balloon(struct virtio_balloon *vb, size_t num) { struct page *page; /* We can only do one array worth at a time. */ num = min(num, ARRAY_SIZE(vb->pfns)); for (vb->num_pfns = 0; vb->num_pfns < num; vb->num_pfns++) { page = list_first_entry(&vb->pages, struct page, lru); list_del(&page->lru); vb->pfns[vb->num_pfns] = page_to_balloon_pfn(page); vb->num_pages--; } /* * Note that if * virtio_has_feature(vdev, VIRTIO_BALLOON_F_MUST_TELL_HOST); * is true, we *have* to do it in this order */ tell_host(vb, vb->deflate_vq); release_pages_by_pfn(vb->pfns, vb->num_pfns); } static inline void update_stat(struct virtio_balloon *vb, int idx, u16 tag, u64 val) { BUG_ON(idx >= VIRTIO_BALLOON_S_NR); vb->stats[idx].tag = tag; vb->stats[idx].val = val; } #define pages_to_bytes(x) ((u64)(x) << PAGE_SHIFT) static void update_balloon_stats(struct virtio_balloon *vb) { unsigned long events[NR_VM_EVENT_ITEMS]; struct sysinfo i; int idx = 0; all_vm_events(events); si_meminfo(&i); update_stat(vb, idx++, VIRTIO_BALLOON_S_SWAP_IN, pages_to_bytes(events[PSWPIN])); update_stat(vb, idx++, VIRTIO_BALLOON_S_SWAP_OUT, pages_to_bytes(events[PSWPOUT])); update_stat(vb, idx++, VIRTIO_BALLOON_S_MAJFLT, events[PGMAJFAULT]); update_stat(vb, idx++, VIRTIO_BALLOON_S_MINFLT, events[PGFAULT]); update_stat(vb, idx++, VIRTIO_BALLOON_S_MEMFREE, pages_to_bytes(i.freeram)); update_stat(vb, idx++, VIRTIO_BALLOON_S_MEMTOT, pages_to_bytes(i.totalram)); } /* * While most virtqueues communicate guest-initiated requests to the hypervisor, * the stats queue operates in reverse. The driver initializes the virtqueue * with a single buffer. From that point forward, all conversations consist of * a hypervisor request (a call to this function) which directs us to refill * the virtqueue with a fresh stats buffer. Since stats collection can sleep, * we notify our kthread which does the actual work via stats_handle_request(). */ static void stats_request(struct virtqueue *vq) { struct virtio_balloon *vb; unsigned int len; vb = virtqueue_get_buf(vq, &len); if (!vb) return; vb->need_stats_update = 1; wake_up(&vb->config_change); } static void stats_handle_request(struct virtio_balloon *vb) { struct virtqueue *vq; struct scatterlist sg; vb->need_stats_update = 0; update_balloon_stats(vb); vq = vb->stats_vq; sg_init_one(&sg, vb->stats, sizeof(vb->stats)); if (virtqueue_add_buf(vq, &sg, 1, 0, vb) < 0) BUG(); virtqueue_kick(vq); } static void virtballoon_changed(struct virtio_device *vdev) { struct virtio_balloon *vb = vdev->priv; wake_up(&vb->config_change); } static inline s64 towards_target(struct virtio_balloon *vb) { u32 v; vb->vdev->config->get(vb->vdev, offsetof(struct virtio_balloon_config, num_pages), &v, sizeof(v)); return (s64)v - vb->num_pages; } static void update_balloon_size(struct virtio_balloon *vb) { __le32 actual = cpu_to_le32(vb->num_pages); vb->vdev->config->set(vb->vdev, offsetof(struct virtio_balloon_config, actual), &actual, sizeof(actual)); } static int balloon(void *_vballoon) { struct virtio_balloon *vb = _vballoon; set_freezable(); while (!kthread_should_stop()) { s64 diff; try_to_freeze(); wait_event_interruptible(vb->config_change, (diff = towards_target(vb)) != 0 || vb->need_stats_update || kthread_should_stop() || freezing(current)); if (vb->need_stats_update) stats_handle_request(vb); if (diff > 0) fill_balloon(vb, diff); else if (diff < 0) leak_balloon(vb, -diff); update_balloon_size(vb); } return 0; } static int virtballoon_probe(struct virtio_device *vdev) { struct virtio_balloon *vb; struct virtqueue *vqs[3]; vq_callback_t *callbacks[] = { balloon_ack, balloon_ack, stats_request }; const char *names[] = { "inflate", "deflate", "stats" }; int err, nvqs; vdev->priv = vb = kmalloc(sizeof(*vb), GFP_KERNEL); if (!vb) { err = -ENOMEM; goto out; } INIT_LIST_HEAD(&vb->pages); vb->num_pages = 0; init_waitqueue_head(&vb->config_change); vb->vdev = vdev; vb->need_stats_update = 0; /* We expect two virtqueues: inflate and deflate, * and optionally stat. */ nvqs = virtio_has_feature(vb->vdev, VIRTIO_BALLOON_F_STATS_VQ) ? 3 : 2; err = vdev->config->find_vqs(vdev, nvqs, vqs, callbacks, names); if (err) goto out_free_vb; vb->inflate_vq = vqs[0]; vb->deflate_vq = vqs[1]; if (virtio_has_feature(vb->vdev, VIRTIO_BALLOON_F_STATS_VQ)) { struct scatterlist sg; vb->stats_vq = vqs[2]; /* * Prime this virtqueue with one buffer so the hypervisor can * use it to signal us later. */ sg_init_one(&sg, vb->stats, sizeof vb->stats); if (virtqueue_add_buf(vb->stats_vq, &sg, 1, 0, vb) < 0) BUG(); virtqueue_kick(vb->stats_vq); } vb->thread = kthread_run(balloon, vb, "vballoon"); if (IS_ERR(vb->thread)) { err = PTR_ERR(vb->thread); goto out_del_vqs; } return 0; out_del_vqs: vdev->config->del_vqs(vdev); out_free_vb: kfree(vb); out: return err; } static void __devexit virtballoon_remove(struct virtio_device *vdev) { struct virtio_balloon *vb = vdev->priv; kthread_stop(vb->thread); /* There might be pages left in the balloon: free them. */ while (vb->num_pages) leak_balloon(vb, vb->num_pages); /* Now we reset the device so we can clean up the queues. */ vdev->config->reset(vdev); vdev->config->del_vqs(vdev); kfree(vb); } static unsigned int features[] = { VIRTIO_BALLOON_F_MUST_TELL_HOST, VIRTIO_BALLOON_F_STATS_VQ, }; static struct virtio_driver virtio_balloon_driver = { .feature_table = features, .feature_table_size = ARRAY_SIZE(features), .driver.name = KBUILD_MODNAME, .driver.owner = THIS_MODULE, .id_table = id_table, .probe = virtballoon_probe, .remove = __devexit_p(virtballoon_remove), .config_changed = virtballoon_changed, }; static int __init init(void) { return register_virtio_driver(&virtio_balloon_driver); } static void __exit fini(void) { unregister_virtio_driver(&virtio_balloon_driver); } module_init(init); module_exit(fini); MODULE_DEVICE_TABLE(virtio, id_table); MODULE_DESCRIPTION("Virtio balloon driver"); MODULE_LICENSE("GPL");
gpl-2.0
kgdhost/kernel-lge-e400-stock
arch/mips/jz4740/platform.c
148
6657
/* * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de> * JZ4740 platform devices * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. * * You should have received a copy of the GNU General Public License along * with this program; if not, write to the Free Software Foundation, Inc., * 675 Mass Ave, Cambridge, MA 02139, USA. * */ #include <linux/device.h> #include <linux/init.h> #include <linux/kernel.h> #include <linux/platform_device.h> #include <linux/resource.h> #include <linux/dma-mapping.h> #include <asm/mach-jz4740/platform.h> #include <asm/mach-jz4740/base.h> #include <asm/mach-jz4740/irq.h> #include <linux/serial_core.h> #include <linux/serial_8250.h> #include "serial.h" #include "clock.h" /* OHCI controller */ static struct resource jz4740_usb_ohci_resources[] = { { .start = JZ4740_UHC_BASE_ADDR, .end = JZ4740_UHC_BASE_ADDR + 0x1000 - 1, .flags = IORESOURCE_MEM, }, { .start = JZ4740_IRQ_UHC, .end = JZ4740_IRQ_UHC, .flags = IORESOURCE_IRQ, }, }; struct platform_device jz4740_usb_ohci_device = { .name = "jz4740-ohci", .id = -1, .dev = { .dma_mask = &jz4740_usb_ohci_device.dev.coherent_dma_mask, .coherent_dma_mask = DMA_BIT_MASK(32), }, .num_resources = ARRAY_SIZE(jz4740_usb_ohci_resources), .resource = jz4740_usb_ohci_resources, }; /* UDC (USB gadget controller) */ static struct resource jz4740_usb_gdt_resources[] = { { .start = JZ4740_UDC_BASE_ADDR, .end = JZ4740_UDC_BASE_ADDR + 0x1000 - 1, .flags = IORESOURCE_MEM, }, { .start = JZ4740_IRQ_UDC, .end = JZ4740_IRQ_UDC, .flags = IORESOURCE_IRQ, }, }; struct platform_device jz4740_udc_device = { .name = "jz-udc", .id = -1, .dev = { .dma_mask = &jz4740_udc_device.dev.coherent_dma_mask, .coherent_dma_mask = DMA_BIT_MASK(32), }, .num_resources = ARRAY_SIZE(jz4740_usb_gdt_resources), .resource = jz4740_usb_gdt_resources, }; /* MMC/SD controller */ static struct resource jz4740_mmc_resources[] = { { .start = JZ4740_MSC_BASE_ADDR, .end = JZ4740_MSC_BASE_ADDR + 0x1000 - 1, .flags = IORESOURCE_MEM, }, { .start = JZ4740_IRQ_MSC, .end = JZ4740_IRQ_MSC, .flags = IORESOURCE_IRQ, } }; struct platform_device jz4740_mmc_device = { .name = "jz4740-mmc", .id = 0, .dev = { .dma_mask = &jz4740_mmc_device.dev.coherent_dma_mask, .coherent_dma_mask = DMA_BIT_MASK(32), }, .num_resources = ARRAY_SIZE(jz4740_mmc_resources), .resource = jz4740_mmc_resources, }; /* RTC controller */ static struct resource jz4740_rtc_resources[] = { { .start = JZ4740_RTC_BASE_ADDR, .end = JZ4740_RTC_BASE_ADDR + 0x38 - 1, .flags = IORESOURCE_MEM, }, { .start = JZ4740_IRQ_RTC, .end = JZ4740_IRQ_RTC, .flags = IORESOURCE_IRQ, }, }; struct platform_device jz4740_rtc_device = { .name = "jz4740-rtc", .id = -1, .num_resources = ARRAY_SIZE(jz4740_rtc_resources), .resource = jz4740_rtc_resources, }; /* I2C controller */ static struct resource jz4740_i2c_resources[] = { { .start = JZ4740_I2C_BASE_ADDR, .end = JZ4740_I2C_BASE_ADDR + 0x1000 - 1, .flags = IORESOURCE_MEM, }, { .start = JZ4740_IRQ_I2C, .end = JZ4740_IRQ_I2C, .flags = IORESOURCE_IRQ, } }; struct platform_device jz4740_i2c_device = { .name = "jz4740-i2c", .id = 0, .num_resources = ARRAY_SIZE(jz4740_i2c_resources), .resource = jz4740_i2c_resources, }; /* NAND controller */ static struct resource jz4740_nand_resources[] = { { .name = "mmio", .start = JZ4740_EMC_BASE_ADDR, .end = JZ4740_EMC_BASE_ADDR + 0x1000 - 1, .flags = IORESOURCE_MEM, }, { .name = "bank", .start = 0x18000000, .end = 0x180C0000 - 1, .flags = IORESOURCE_MEM, }, }; struct platform_device jz4740_nand_device = { .name = "jz4740-nand", .num_resources = ARRAY_SIZE(jz4740_nand_resources), .resource = jz4740_nand_resources, }; /* LCD controller */ static struct resource jz4740_framebuffer_resources[] = { { .start = JZ4740_LCD_BASE_ADDR, .end = JZ4740_LCD_BASE_ADDR + 0x1000 - 1, .flags = IORESOURCE_MEM, }, }; struct platform_device jz4740_framebuffer_device = { .name = "jz4740-fb", .id = -1, .num_resources = ARRAY_SIZE(jz4740_framebuffer_resources), .resource = jz4740_framebuffer_resources, .dev = { .dma_mask = &jz4740_framebuffer_device.dev.coherent_dma_mask, .coherent_dma_mask = DMA_BIT_MASK(32), }, }; /* I2S controller */ static struct resource jz4740_i2s_resources[] = { { .start = JZ4740_AIC_BASE_ADDR, .end = JZ4740_AIC_BASE_ADDR + 0x38 - 1, .flags = IORESOURCE_MEM, }, }; struct platform_device jz4740_i2s_device = { .name = "jz4740-i2s", .id = -1, .num_resources = ARRAY_SIZE(jz4740_i2s_resources), .resource = jz4740_i2s_resources, }; /* PCM */ struct platform_device jz4740_pcm_device = { .name = "jz4740-pcm-audio", .id = -1, }; /* Codec */ static struct resource jz4740_codec_resources[] = { { .start = JZ4740_AIC_BASE_ADDR + 0x80, .end = JZ4740_AIC_BASE_ADDR + 0x88 - 1, .flags = IORESOURCE_MEM, }, }; struct platform_device jz4740_codec_device = { .name = "jz4740-codec", .id = -1, .num_resources = ARRAY_SIZE(jz4740_codec_resources), .resource = jz4740_codec_resources, }; /* ADC controller */ static struct resource jz4740_adc_resources[] = { { .start = JZ4740_SADC_BASE_ADDR, .end = JZ4740_SADC_BASE_ADDR + 0x30, .flags = IORESOURCE_MEM, }, { .start = JZ4740_IRQ_SADC, .end = JZ4740_IRQ_SADC, .flags = IORESOURCE_IRQ, }, { .start = JZ4740_IRQ_ADC_BASE, .end = JZ4740_IRQ_ADC_BASE, .flags = IORESOURCE_IRQ, }, }; struct platform_device jz4740_adc_device = { .name = "jz4740-adc", .id = -1, .num_resources = ARRAY_SIZE(jz4740_adc_resources), .resource = jz4740_adc_resources, }; /* Serial */ #define JZ4740_UART_DATA(_id) \ { \ .flags = UPF_SKIP_TEST | UPF_IOREMAP | UPF_FIXED_TYPE, \ .iotype = UPIO_MEM, \ .regshift = 2, \ .serial_out = jz4740_serial_out, \ .type = PORT_16550, \ .mapbase = JZ4740_UART ## _id ## _BASE_ADDR, \ .irq = JZ4740_IRQ_UART ## _id, \ } static struct plat_serial8250_port jz4740_uart_data[] = { JZ4740_UART_DATA(0), JZ4740_UART_DATA(1), {}, }; static struct platform_device jz4740_uart_device = { .name = "serial8250", .id = 0, .dev = { .platform_data = jz4740_uart_data, }, }; void jz4740_serial_device_register(void) { struct plat_serial8250_port *p; for (p = jz4740_uart_data; p->flags != 0; ++p) p->uartclk = jz4740_clock_bdata.ext_rate; platform_device_register(&jz4740_uart_device); }
gpl-2.0
bigzz/f2fs-stable
drivers/acpi/acpica/dbtest.c
148
28821
/******************************************************************************* * * Module Name: dbtest - Various debug-related tests * ******************************************************************************/ /* * Copyright (C) 2000 - 2015, Intel Corp. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions, and the following disclaimer, * without modification. * 2. Redistributions in binary form must reproduce at minimum a disclaimer * substantially similar to the "NO WARRANTY" disclaimer below * ("Disclaimer") and any redistribution must be conditioned upon * including a substantially similar Disclaimer requirement for further * binary redistribution. * 3. Neither the names of the above-listed copyright holders nor the names * of any contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * Alternatively, this software may be distributed under the terms of the * GNU General Public License ("GPL") version 2 as published by the Free * Software Foundation. * * NO WARRANTY * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGES. */ #include <acpi/acpi.h> #include "accommon.h" #include "acdebug.h" #include "acnamesp.h" #include "acpredef.h" #define _COMPONENT ACPI_CA_DEBUGGER ACPI_MODULE_NAME("dbtest") /* Local prototypes */ static void acpi_db_test_all_objects(void); static acpi_status acpi_db_test_one_object(acpi_handle obj_handle, u32 nesting_level, void *context, void **return_value); static acpi_status acpi_db_test_integer_type(struct acpi_namespace_node *node, u32 bit_length); static acpi_status acpi_db_test_buffer_type(struct acpi_namespace_node *node, u32 bit_length); static acpi_status acpi_db_test_string_type(struct acpi_namespace_node *node, u32 byte_length); static acpi_status acpi_db_read_from_object(struct acpi_namespace_node *node, acpi_object_type expected_type, union acpi_object **value); static acpi_status acpi_db_write_to_object(struct acpi_namespace_node *node, union acpi_object *value); static void acpi_db_evaluate_all_predefined_names(char *count_arg); static acpi_status acpi_db_evaluate_one_predefined_name(acpi_handle obj_handle, u32 nesting_level, void *context, void **return_value); /* * Test subcommands */ static struct acpi_db_argument_info acpi_db_test_types[] = { {"OBJECTS"}, {"PREDEFINED"}, {NULL} /* Must be null terminated */ }; #define CMD_TEST_OBJECTS 0 #define CMD_TEST_PREDEFINED 1 #define BUFFER_FILL_VALUE 0xFF /* * Support for the special debugger read/write control methods. * These methods are installed into the current namespace and are * used to read and write the various namespace objects. The point * is to force the AML interpreter do all of the work. */ #define ACPI_DB_READ_METHOD "\\_T98" #define ACPI_DB_WRITE_METHOD "\\_T99" static acpi_handle read_handle = NULL; static acpi_handle write_handle = NULL; /* ASL Definitions of the debugger read/write control methods */ #if 0 definition_block("ssdt.aml", "SSDT", 2, "Intel", "DEBUG", 0x00000001) { method(_T98, 1, not_serialized) { /* Read */ return (de_ref_of(arg0)) } } definition_block("ssdt2.aml", "SSDT", 2, "Intel", "DEBUG", 0x00000001) { method(_T99, 2, not_serialized) { /* Write */ store(arg1, arg0) } } #endif static unsigned char read_method_code[] = { 0x53, 0x53, 0x44, 0x54, 0x2E, 0x00, 0x00, 0x00, /* 00000000 "SSDT...." */ 0x02, 0xC9, 0x49, 0x6E, 0x74, 0x65, 0x6C, 0x00, /* 00000008 "..Intel." */ 0x44, 0x45, 0x42, 0x55, 0x47, 0x00, 0x00, 0x00, /* 00000010 "DEBUG..." */ 0x01, 0x00, 0x00, 0x00, 0x49, 0x4E, 0x54, 0x4C, /* 00000018 "....INTL" */ 0x18, 0x12, 0x13, 0x20, 0x14, 0x09, 0x5F, 0x54, /* 00000020 "... .._T" */ 0x39, 0x38, 0x01, 0xA4, 0x83, 0x68 /* 00000028 "98...h" */ }; static unsigned char write_method_code[] = { 0x53, 0x53, 0x44, 0x54, 0x2E, 0x00, 0x00, 0x00, /* 00000000 "SSDT...." */ 0x02, 0x15, 0x49, 0x6E, 0x74, 0x65, 0x6C, 0x00, /* 00000008 "..Intel." */ 0x44, 0x45, 0x42, 0x55, 0x47, 0x00, 0x00, 0x00, /* 00000010 "DEBUG..." */ 0x01, 0x00, 0x00, 0x00, 0x49, 0x4E, 0x54, 0x4C, /* 00000018 "....INTL" */ 0x18, 0x12, 0x13, 0x20, 0x14, 0x09, 0x5F, 0x54, /* 00000020 "... .._T" */ 0x39, 0x39, 0x02, 0x70, 0x69, 0x68 /* 00000028 "99.pih" */ }; /******************************************************************************* * * FUNCTION: acpi_db_execute_test * * PARAMETERS: type_arg - Subcommand * * RETURN: None * * DESCRIPTION: Execute various debug tests. * * Note: Code is prepared for future expansion of the TEST command. * ******************************************************************************/ void acpi_db_execute_test(char *type_arg) { u32 temp; acpi_ut_strupr(type_arg); temp = acpi_db_match_argument(type_arg, acpi_db_test_types); if (temp == ACPI_TYPE_NOT_FOUND) { acpi_os_printf("Invalid or unsupported argument\n"); return; } switch (temp) { case CMD_TEST_OBJECTS: acpi_db_test_all_objects(); break; case CMD_TEST_PREDEFINED: acpi_db_evaluate_all_predefined_names(NULL); break; default: break; } } /******************************************************************************* * * FUNCTION: acpi_db_test_all_objects * * PARAMETERS: None * * RETURN: None * * DESCRIPTION: This test implements the OBJECTS subcommand. It exercises the * namespace by reading/writing/comparing all data objects such * as integers, strings, buffers, fields, buffer fields, etc. * ******************************************************************************/ static void acpi_db_test_all_objects(void) { acpi_status status; /* Install the debugger read-object control method if necessary */ if (!read_handle) { status = acpi_install_method(read_method_code); if (ACPI_FAILURE(status)) { acpi_os_printf ("%s, Could not install debugger read method\n", acpi_format_exception(status)); return; } status = acpi_get_handle(NULL, ACPI_DB_READ_METHOD, &read_handle); if (ACPI_FAILURE(status)) { acpi_os_printf ("Could not obtain handle for debug method %s\n", ACPI_DB_READ_METHOD); return; } } /* Install the debugger write-object control method if necessary */ if (!write_handle) { status = acpi_install_method(write_method_code); if (ACPI_FAILURE(status)) { acpi_os_printf ("%s, Could not install debugger write method\n", acpi_format_exception(status)); return; } status = acpi_get_handle(NULL, ACPI_DB_WRITE_METHOD, &write_handle); if (ACPI_FAILURE(status)) { acpi_os_printf ("Could not obtain handle for debug method %s\n", ACPI_DB_WRITE_METHOD); return; } } /* Walk the entire namespace, testing each supported named data object */ (void)acpi_walk_namespace(ACPI_TYPE_ANY, ACPI_ROOT_OBJECT, ACPI_UINT32_MAX, acpi_db_test_one_object, NULL, NULL, NULL); } /******************************************************************************* * * FUNCTION: acpi_db_test_one_object * * PARAMETERS: acpi_walk_callback * * RETURN: Status * * DESCRIPTION: Test one namespace object. Supported types are Integer, * String, Buffer, buffer_field, and field_unit. All other object * types are simply ignored. * * Note: Support for Packages is not implemented. * ******************************************************************************/ static acpi_status acpi_db_test_one_object(acpi_handle obj_handle, u32 nesting_level, void *context, void **return_value) { struct acpi_namespace_node *node; union acpi_operand_object *obj_desc; union acpi_operand_object *region_obj; acpi_object_type local_type; u32 bit_length = 0; u32 byte_length = 0; acpi_status status = AE_OK; node = ACPI_CAST_PTR(struct acpi_namespace_node, obj_handle); obj_desc = node->object; /* * For the supported types, get the actual bit length or * byte length. Map the type to one of Integer/String/Buffer. */ switch (node->type) { case ACPI_TYPE_INTEGER: /* Integer width is either 32 or 64 */ local_type = ACPI_TYPE_INTEGER; bit_length = acpi_gbl_integer_bit_width; break; case ACPI_TYPE_STRING: local_type = ACPI_TYPE_STRING; byte_length = obj_desc->string.length; break; case ACPI_TYPE_BUFFER: local_type = ACPI_TYPE_BUFFER; byte_length = obj_desc->buffer.length; bit_length = byte_length * 8; break; case ACPI_TYPE_FIELD_UNIT: case ACPI_TYPE_BUFFER_FIELD: case ACPI_TYPE_LOCAL_REGION_FIELD: case ACPI_TYPE_LOCAL_INDEX_FIELD: case ACPI_TYPE_LOCAL_BANK_FIELD: local_type = ACPI_TYPE_INTEGER; if (obj_desc) { /* * Returned object will be a Buffer if the field length * is larger than the size of an Integer (32 or 64 bits * depending on the DSDT version). */ bit_length = obj_desc->common_field.bit_length; byte_length = ACPI_ROUND_BITS_UP_TO_BYTES(bit_length); if (bit_length > acpi_gbl_integer_bit_width) { local_type = ACPI_TYPE_BUFFER; } } break; default: /* Ignore all other types */ return (AE_OK); } /* Emit the common prefix: Type:Name */ acpi_os_printf("%14s: %4.4s", acpi_ut_get_type_name(node->type), node->name.ascii); if (!obj_desc) { acpi_os_printf(" Ignoring, no attached object\n"); return (AE_OK); } /* * Check for unsupported region types. Note: acpi_exec simulates * access to system_memory, system_IO, PCI_Config, and EC. */ switch (node->type) { case ACPI_TYPE_LOCAL_REGION_FIELD: region_obj = obj_desc->field.region_obj; switch (region_obj->region.space_id) { case ACPI_ADR_SPACE_SYSTEM_MEMORY: case ACPI_ADR_SPACE_SYSTEM_IO: case ACPI_ADR_SPACE_PCI_CONFIG: case ACPI_ADR_SPACE_EC: break; default: acpi_os_printf (" %s space is not supported [%4.4s]\n", acpi_ut_get_region_name(region_obj->region. space_id), region_obj->region.node->name.ascii); return (AE_OK); } break; default: break; } /* At this point, we have resolved the object to one of the major types */ switch (local_type) { case ACPI_TYPE_INTEGER: status = acpi_db_test_integer_type(node, bit_length); break; case ACPI_TYPE_STRING: status = acpi_db_test_string_type(node, byte_length); break; case ACPI_TYPE_BUFFER: status = acpi_db_test_buffer_type(node, bit_length); break; default: acpi_os_printf(" Ignoring, type not implemented (%2.2X)", local_type); break; } switch (node->type) { case ACPI_TYPE_LOCAL_REGION_FIELD: region_obj = obj_desc->field.region_obj; acpi_os_printf(" (%s)", acpi_ut_get_region_name(region_obj->region. space_id)); break; default: break; } acpi_os_printf("\n"); return (status); } /******************************************************************************* * * FUNCTION: acpi_db_test_integer_type * * PARAMETERS: node - Parent NS node for the object * bit_length - Actual length of the object. Used for * support of arbitrary length field_unit * and buffer_field objects. * * RETURN: Status * * DESCRIPTION: Test read/write for an Integer-valued object. Performs a * write/read/compare of an arbitrary new value, then performs * a write/read/compare of the original value. * ******************************************************************************/ static acpi_status acpi_db_test_integer_type(struct acpi_namespace_node *node, u32 bit_length) { union acpi_object *temp1 = NULL; union acpi_object *temp2 = NULL; union acpi_object *temp3 = NULL; union acpi_object write_value; u64 value_to_write; acpi_status status; if (bit_length > 64) { acpi_os_printf(" Invalid length for an Integer: %u", bit_length); return (AE_OK); } /* Read the original value */ status = acpi_db_read_from_object(node, ACPI_TYPE_INTEGER, &temp1); if (ACPI_FAILURE(status)) { return (status); } acpi_os_printf(" (%4.4X/%3.3X) %8.8X%8.8X", bit_length, ACPI_ROUND_BITS_UP_TO_BYTES(bit_length), ACPI_FORMAT_UINT64(temp1->integer.value)); value_to_write = ACPI_UINT64_MAX >> (64 - bit_length); if (temp1->integer.value == value_to_write) { value_to_write = 0; } /* Write a new value */ write_value.type = ACPI_TYPE_INTEGER; write_value.integer.value = value_to_write; status = acpi_db_write_to_object(node, &write_value); if (ACPI_FAILURE(status)) { goto exit; } /* Ensure that we can read back the new value */ status = acpi_db_read_from_object(node, ACPI_TYPE_INTEGER, &temp2); if (ACPI_FAILURE(status)) { goto exit; } if (temp2->integer.value != value_to_write) { acpi_os_printf(" MISMATCH 2: %8.8X%8.8X, expecting %8.8X%8.8X", ACPI_FORMAT_UINT64(temp2->integer.value), ACPI_FORMAT_UINT64(value_to_write)); } /* Write back the original value */ write_value.integer.value = temp1->integer.value; status = acpi_db_write_to_object(node, &write_value); if (ACPI_FAILURE(status)) { goto exit; } /* Ensure that we can read back the original value */ status = acpi_db_read_from_object(node, ACPI_TYPE_INTEGER, &temp3); if (ACPI_FAILURE(status)) { goto exit; } if (temp3->integer.value != temp1->integer.value) { acpi_os_printf(" MISMATCH 3: %8.8X%8.8X, expecting %8.8X%8.8X", ACPI_FORMAT_UINT64(temp3->integer.value), ACPI_FORMAT_UINT64(temp1->integer.value)); } exit: if (temp1) { acpi_os_free(temp1); } if (temp2) { acpi_os_free(temp2); } if (temp3) { acpi_os_free(temp3); } return (AE_OK); } /******************************************************************************* * * FUNCTION: acpi_db_test_buffer_type * * PARAMETERS: node - Parent NS node for the object * bit_length - Actual length of the object. * * RETURN: Status * * DESCRIPTION: Test read/write for an Buffer-valued object. Performs a * write/read/compare of an arbitrary new value, then performs * a write/read/compare of the original value. * ******************************************************************************/ static acpi_status acpi_db_test_buffer_type(struct acpi_namespace_node *node, u32 bit_length) { union acpi_object *temp1 = NULL; union acpi_object *temp2 = NULL; union acpi_object *temp3 = NULL; u8 *buffer; union acpi_object write_value; acpi_status status; u32 byte_length; u32 i; u8 extra_bits; byte_length = ACPI_ROUND_BITS_UP_TO_BYTES(bit_length); if (byte_length == 0) { acpi_os_printf(" Ignoring zero length buffer"); return (AE_OK); } /* Allocate a local buffer */ buffer = ACPI_ALLOCATE_ZEROED(byte_length); if (!buffer) { return (AE_NO_MEMORY); } /* Read the original value */ status = acpi_db_read_from_object(node, ACPI_TYPE_BUFFER, &temp1); if (ACPI_FAILURE(status)) { goto exit; } /* Emit a few bytes of the buffer */ acpi_os_printf(" (%4.4X/%3.3X)", bit_length, temp1->buffer.length); for (i = 0; ((i < 4) && (i < byte_length)); i++) { acpi_os_printf(" %2.2X", temp1->buffer.pointer[i]); } acpi_os_printf("... "); /* * Write a new value. * * Handle possible extra bits at the end of the buffer. Can * happen for field_units larger than an integer, but the bit * count is not an integral number of bytes. Zero out the * unused bits. */ memset(buffer, BUFFER_FILL_VALUE, byte_length); extra_bits = bit_length % 8; if (extra_bits) { buffer[byte_length - 1] = ACPI_MASK_BITS_ABOVE(extra_bits); } write_value.type = ACPI_TYPE_BUFFER; write_value.buffer.length = byte_length; write_value.buffer.pointer = buffer; status = acpi_db_write_to_object(node, &write_value); if (ACPI_FAILURE(status)) { goto exit; } /* Ensure that we can read back the new value */ status = acpi_db_read_from_object(node, ACPI_TYPE_BUFFER, &temp2); if (ACPI_FAILURE(status)) { goto exit; } if (memcmp(temp2->buffer.pointer, buffer, byte_length)) { acpi_os_printf(" MISMATCH 2: New buffer value"); } /* Write back the original value */ write_value.buffer.length = byte_length; write_value.buffer.pointer = temp1->buffer.pointer; status = acpi_db_write_to_object(node, &write_value); if (ACPI_FAILURE(status)) { goto exit; } /* Ensure that we can read back the original value */ status = acpi_db_read_from_object(node, ACPI_TYPE_BUFFER, &temp3); if (ACPI_FAILURE(status)) { goto exit; } if (memcmp(temp1->buffer.pointer, temp3->buffer.pointer, byte_length)) { acpi_os_printf(" MISMATCH 3: While restoring original buffer"); } exit: ACPI_FREE(buffer); if (temp1) { acpi_os_free(temp1); } if (temp2) { acpi_os_free(temp2); } if (temp3) { acpi_os_free(temp3); } return (status); } /******************************************************************************* * * FUNCTION: acpi_db_test_string_type * * PARAMETERS: node - Parent NS node for the object * byte_length - Actual length of the object. * * RETURN: Status * * DESCRIPTION: Test read/write for an String-valued object. Performs a * write/read/compare of an arbitrary new value, then performs * a write/read/compare of the original value. * ******************************************************************************/ static acpi_status acpi_db_test_string_type(struct acpi_namespace_node *node, u32 byte_length) { union acpi_object *temp1 = NULL; union acpi_object *temp2 = NULL; union acpi_object *temp3 = NULL; char *value_to_write = "Test String from AML Debugger"; union acpi_object write_value; acpi_status status; /* Read the original value */ status = acpi_db_read_from_object(node, ACPI_TYPE_STRING, &temp1); if (ACPI_FAILURE(status)) { return (status); } acpi_os_printf(" (%4.4X/%3.3X) \"%s\"", (temp1->string.length * 8), temp1->string.length, temp1->string.pointer); /* Write a new value */ write_value.type = ACPI_TYPE_STRING; write_value.string.length = strlen(value_to_write); write_value.string.pointer = value_to_write; status = acpi_db_write_to_object(node, &write_value); if (ACPI_FAILURE(status)) { goto exit; } /* Ensure that we can read back the new value */ status = acpi_db_read_from_object(node, ACPI_TYPE_STRING, &temp2); if (ACPI_FAILURE(status)) { goto exit; } if (strcmp(temp2->string.pointer, value_to_write)) { acpi_os_printf(" MISMATCH 2: %s, expecting %s", temp2->string.pointer, value_to_write); } /* Write back the original value */ write_value.string.length = strlen(temp1->string.pointer); write_value.string.pointer = temp1->string.pointer; status = acpi_db_write_to_object(node, &write_value); if (ACPI_FAILURE(status)) { goto exit; } /* Ensure that we can read back the original value */ status = acpi_db_read_from_object(node, ACPI_TYPE_STRING, &temp3); if (ACPI_FAILURE(status)) { goto exit; } if (strcmp(temp1->string.pointer, temp3->string.pointer)) { acpi_os_printf(" MISMATCH 3: %s, expecting %s", temp3->string.pointer, temp1->string.pointer); } exit: if (temp1) { acpi_os_free(temp1); } if (temp2) { acpi_os_free(temp2); } if (temp3) { acpi_os_free(temp3); } return (status); } /******************************************************************************* * * FUNCTION: acpi_db_read_from_object * * PARAMETERS: node - Parent NS node for the object * expected_type - Object type expected from the read * value - Where the value read is returned * * RETURN: Status * * DESCRIPTION: Performs a read from the specified object by invoking the * special debugger control method that reads the object. Thus, * the AML interpreter is doing all of the work, increasing the * validity of the test. * ******************************************************************************/ static acpi_status acpi_db_read_from_object(struct acpi_namespace_node *node, acpi_object_type expected_type, union acpi_object **value) { union acpi_object *ret_value; struct acpi_object_list param_objects; union acpi_object params[2]; struct acpi_buffer return_obj; acpi_status status; params[0].type = ACPI_TYPE_LOCAL_REFERENCE; params[0].reference.actual_type = node->type; params[0].reference.handle = ACPI_CAST_PTR(acpi_handle, node); param_objects.count = 1; param_objects.pointer = params; return_obj.length = ACPI_ALLOCATE_BUFFER; acpi_gbl_method_executing = TRUE; status = acpi_evaluate_object(read_handle, NULL, &param_objects, &return_obj); acpi_gbl_method_executing = FALSE; if (ACPI_FAILURE(status)) { acpi_os_printf("Could not read from object, %s", acpi_format_exception(status)); return (status); } ret_value = (union acpi_object *)return_obj.pointer; switch (ret_value->type) { case ACPI_TYPE_INTEGER: case ACPI_TYPE_BUFFER: case ACPI_TYPE_STRING: /* * Did we receive the type we wanted? Most important for the * Integer/Buffer case (when a field is larger than an Integer, * it should return a Buffer). */ if (ret_value->type != expected_type) { acpi_os_printf (" Type mismatch: Expected %s, Received %s", acpi_ut_get_type_name(expected_type), acpi_ut_get_type_name(ret_value->type)); return (AE_TYPE); } *value = ret_value; break; default: acpi_os_printf(" Unsupported return object type, %s", acpi_ut_get_type_name(ret_value->type)); acpi_os_free(return_obj.pointer); return (AE_TYPE); } return (status); } /******************************************************************************* * * FUNCTION: acpi_db_write_to_object * * PARAMETERS: node - Parent NS node for the object * value - Value to be written * * RETURN: Status * * DESCRIPTION: Performs a write to the specified object by invoking the * special debugger control method that writes the object. Thus, * the AML interpreter is doing all of the work, increasing the * validity of the test. * ******************************************************************************/ static acpi_status acpi_db_write_to_object(struct acpi_namespace_node *node, union acpi_object *value) { struct acpi_object_list param_objects; union acpi_object params[2]; acpi_status status; params[0].type = ACPI_TYPE_LOCAL_REFERENCE; params[0].reference.actual_type = node->type; params[0].reference.handle = ACPI_CAST_PTR(acpi_handle, node); /* Copy the incoming user parameter */ memcpy(&params[1], value, sizeof(union acpi_object)); param_objects.count = 2; param_objects.pointer = params; acpi_gbl_method_executing = TRUE; status = acpi_evaluate_object(write_handle, NULL, &param_objects, NULL); acpi_gbl_method_executing = FALSE; if (ACPI_FAILURE(status)) { acpi_os_printf("Could not write to object, %s", acpi_format_exception(status)); } return (status); } /******************************************************************************* * * FUNCTION: acpi_db_evaluate_all_predefined_names * * PARAMETERS: count_arg - Max number of methods to execute * * RETURN: None * * DESCRIPTION: Namespace batch execution. Execute predefined names in the * namespace, up to the max count, if specified. * ******************************************************************************/ static void acpi_db_evaluate_all_predefined_names(char *count_arg) { struct acpi_db_execute_walk info; info.count = 0; info.max_count = ACPI_UINT32_MAX; if (count_arg) { info.max_count = strtoul(count_arg, NULL, 0); } /* Search all nodes in namespace */ (void)acpi_walk_namespace(ACPI_TYPE_ANY, ACPI_ROOT_OBJECT, ACPI_UINT32_MAX, acpi_db_evaluate_one_predefined_name, NULL, (void *)&info, NULL); acpi_os_printf("Evaluated %u predefined names in the namespace\n", info.count); } /******************************************************************************* * * FUNCTION: acpi_db_evaluate_one_predefined_name * * PARAMETERS: Callback from walk_namespace * * RETURN: Status * * DESCRIPTION: Batch execution module. Currently only executes predefined * ACPI names. * ******************************************************************************/ static acpi_status acpi_db_evaluate_one_predefined_name(acpi_handle obj_handle, u32 nesting_level, void *context, void **return_value) { struct acpi_namespace_node *node = (struct acpi_namespace_node *)obj_handle; struct acpi_db_execute_walk *info = (struct acpi_db_execute_walk *)context; char *pathname; const union acpi_predefined_info *predefined; struct acpi_device_info *obj_info; struct acpi_object_list param_objects; union acpi_object params[ACPI_METHOD_NUM_ARGS]; union acpi_object *this_param; struct acpi_buffer return_obj; acpi_status status; u16 arg_type_list; u8 arg_count; u8 arg_type; u32 i; /* The name must be a predefined ACPI name */ predefined = acpi_ut_match_predefined_method(node->name.ascii); if (!predefined) { return (AE_OK); } if (node->type == ACPI_TYPE_LOCAL_SCOPE) { return (AE_OK); } pathname = acpi_ns_get_external_pathname(node); if (!pathname) { return (AE_OK); } /* Get the object info for number of method parameters */ status = acpi_get_object_info(obj_handle, &obj_info); if (ACPI_FAILURE(status)) { ACPI_FREE(pathname); return (status); } param_objects.count = 0; param_objects.pointer = NULL; if (obj_info->type == ACPI_TYPE_METHOD) { /* Setup default parameters (with proper types) */ arg_type_list = predefined->info.argument_list; arg_count = METHOD_GET_ARG_COUNT(arg_type_list); /* * Setup the ACPI-required number of arguments, regardless of what * the actual method defines. If there is a difference, then the * method is wrong and a warning will be issued during execution. */ this_param = params; for (i = 0; i < arg_count; i++) { arg_type = METHOD_GET_NEXT_TYPE(arg_type_list); this_param->type = arg_type; switch (arg_type) { case ACPI_TYPE_INTEGER: this_param->integer.value = 1; break; case ACPI_TYPE_STRING: this_param->string.pointer = "This is the default argument string"; this_param->string.length = strlen(this_param->string.pointer); break; case ACPI_TYPE_BUFFER: this_param->buffer.pointer = (u8 *)params; /* just a garbage buffer */ this_param->buffer.length = 48; break; case ACPI_TYPE_PACKAGE: this_param->package.elements = NULL; this_param->package.count = 0; break; default: acpi_os_printf ("%s: Unsupported argument type: %u\n", pathname, arg_type); break; } this_param++; } param_objects.count = arg_count; param_objects.pointer = params; } ACPI_FREE(obj_info); return_obj.pointer = NULL; return_obj.length = ACPI_ALLOCATE_BUFFER; /* Do the actual method execution */ acpi_gbl_method_executing = TRUE; status = acpi_evaluate_object(node, NULL, &param_objects, &return_obj); acpi_os_printf("%-32s returned %s\n", pathname, acpi_format_exception(status)); acpi_gbl_method_executing = FALSE; ACPI_FREE(pathname); /* Ignore status from method execution */ status = AE_OK; /* Update count, check if we have executed enough methods */ info->count++; if (info->count >= info->max_count) { status = AE_CTRL_TERMINATE; } return (status); }
gpl-2.0
aaronknister/linux-stable
drivers/acpi/acpica/exconvrt.c
148
17877
/****************************************************************************** * * Module Name: exconvrt - Object conversion routines * *****************************************************************************/ /* * Copyright (C) 2000 - 2015, Intel Corp. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions, and the following disclaimer, * without modification. * 2. Redistributions in binary form must reproduce at minimum a disclaimer * substantially similar to the "NO WARRANTY" disclaimer below * ("Disclaimer") and any redistribution must be conditioned upon * including a substantially similar Disclaimer requirement for further * binary redistribution. * 3. Neither the names of the above-listed copyright holders nor the names * of any contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * Alternatively, this software may be distributed under the terms of the * GNU General Public License ("GPL") version 2 as published by the Free * Software Foundation. * * NO WARRANTY * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGES. */ #include <acpi/acpi.h> #include "accommon.h" #include "acinterp.h" #include "amlcode.h" #define _COMPONENT ACPI_EXECUTER ACPI_MODULE_NAME("exconvrt") /* Local prototypes */ static u32 acpi_ex_convert_to_ascii(u64 integer, u16 base, u8 *string, u8 max_length); /******************************************************************************* * * FUNCTION: acpi_ex_convert_to_integer * * PARAMETERS: obj_desc - Object to be converted. Must be an * Integer, Buffer, or String * result_desc - Where the new Integer object is returned * flags - Used for string conversion * * RETURN: Status * * DESCRIPTION: Convert an ACPI Object to an integer. * ******************************************************************************/ acpi_status acpi_ex_convert_to_integer(union acpi_operand_object *obj_desc, union acpi_operand_object **result_desc, u32 flags) { union acpi_operand_object *return_desc; u8 *pointer; u64 result; u32 i; u32 count; acpi_status status; ACPI_FUNCTION_TRACE_PTR(ex_convert_to_integer, obj_desc); switch (obj_desc->common.type) { case ACPI_TYPE_INTEGER: /* No conversion necessary */ *result_desc = obj_desc; return_ACPI_STATUS(AE_OK); case ACPI_TYPE_BUFFER: case ACPI_TYPE_STRING: /* Note: Takes advantage of common buffer/string fields */ pointer = obj_desc->buffer.pointer; count = obj_desc->buffer.length; break; default: return_ACPI_STATUS(AE_TYPE); } /* * Convert the buffer/string to an integer. Note that both buffers and * strings are treated as raw data - we don't convert ascii to hex for * strings. * * There are two terminating conditions for the loop: * 1) The size of an integer has been reached, or * 2) The end of the buffer or string has been reached */ result = 0; /* String conversion is different than Buffer conversion */ switch (obj_desc->common.type) { case ACPI_TYPE_STRING: /* * Convert string to an integer - for most cases, the string must be * hexadecimal as per the ACPI specification. The only exception (as * of ACPI 3.0) is that the to_integer() operator allows both decimal * and hexadecimal strings (hex prefixed with "0x"). */ status = acpi_ut_strtoul64((char *)pointer, flags, &result); if (ACPI_FAILURE(status)) { return_ACPI_STATUS(status); } break; case ACPI_TYPE_BUFFER: /* Check for zero-length buffer */ if (!count) { return_ACPI_STATUS(AE_AML_BUFFER_LIMIT); } /* Transfer no more than an integer's worth of data */ if (count > acpi_gbl_integer_byte_width) { count = acpi_gbl_integer_byte_width; } /* * Convert buffer to an integer - we simply grab enough raw data * from the buffer to fill an integer */ for (i = 0; i < count; i++) { /* * Get next byte and shift it into the Result. * Little endian is used, meaning that the first byte of the buffer * is the LSB of the integer */ result |= (((u64) pointer[i]) << (i * 8)); } break; default: /* No other types can get here */ break; } /* Create a new integer */ return_desc = acpi_ut_create_integer_object(result); if (!return_desc) { return_ACPI_STATUS(AE_NO_MEMORY); } ACPI_DEBUG_PRINT((ACPI_DB_EXEC, "Converted value: %8.8X%8.8X\n", ACPI_FORMAT_UINT64(result))); /* Save the Result */ (void)acpi_ex_truncate_for32bit_table(return_desc); *result_desc = return_desc; return_ACPI_STATUS(AE_OK); } /******************************************************************************* * * FUNCTION: acpi_ex_convert_to_buffer * * PARAMETERS: obj_desc - Object to be converted. Must be an * Integer, Buffer, or String * result_desc - Where the new buffer object is returned * * RETURN: Status * * DESCRIPTION: Convert an ACPI Object to a Buffer * ******************************************************************************/ acpi_status acpi_ex_convert_to_buffer(union acpi_operand_object *obj_desc, union acpi_operand_object **result_desc) { union acpi_operand_object *return_desc; u8 *new_buf; ACPI_FUNCTION_TRACE_PTR(ex_convert_to_buffer, obj_desc); switch (obj_desc->common.type) { case ACPI_TYPE_BUFFER: /* No conversion necessary */ *result_desc = obj_desc; return_ACPI_STATUS(AE_OK); case ACPI_TYPE_INTEGER: /* * Create a new Buffer object. * Need enough space for one integer */ return_desc = acpi_ut_create_buffer_object(acpi_gbl_integer_byte_width); if (!return_desc) { return_ACPI_STATUS(AE_NO_MEMORY); } /* Copy the integer to the buffer, LSB first */ new_buf = return_desc->buffer.pointer; memcpy(new_buf, &obj_desc->integer.value, acpi_gbl_integer_byte_width); break; case ACPI_TYPE_STRING: /* * Create a new Buffer object * Size will be the string length * * NOTE: Add one to the string length to include the null terminator. * The ACPI spec is unclear on this subject, but there is existing * ASL/AML code that depends on the null being transferred to the new * buffer. */ return_desc = acpi_ut_create_buffer_object((acpi_size) obj_desc->string. length + 1); if (!return_desc) { return_ACPI_STATUS(AE_NO_MEMORY); } /* Copy the string to the buffer */ new_buf = return_desc->buffer.pointer; strncpy((char *)new_buf, (char *)obj_desc->string.pointer, obj_desc->string.length); break; default: return_ACPI_STATUS(AE_TYPE); } /* Mark buffer initialized */ return_desc->common.flags |= AOPOBJ_DATA_VALID; *result_desc = return_desc; return_ACPI_STATUS(AE_OK); } /******************************************************************************* * * FUNCTION: acpi_ex_convert_to_ascii * * PARAMETERS: integer - Value to be converted * base - ACPI_STRING_DECIMAL or ACPI_STRING_HEX * string - Where the string is returned * data_width - Size of data item to be converted, in bytes * * RETURN: Actual string length * * DESCRIPTION: Convert an ACPI Integer to a hex or decimal string * ******************************************************************************/ static u32 acpi_ex_convert_to_ascii(u64 integer, u16 base, u8 *string, u8 data_width) { u64 digit; u32 i; u32 j; u32 k = 0; u32 hex_length; u32 decimal_length; u32 remainder; u8 supress_zeros; ACPI_FUNCTION_ENTRY(); switch (base) { case 10: /* Setup max length for the decimal number */ switch (data_width) { case 1: decimal_length = ACPI_MAX8_DECIMAL_DIGITS; break; case 4: decimal_length = ACPI_MAX32_DECIMAL_DIGITS; break; case 8: default: decimal_length = ACPI_MAX64_DECIMAL_DIGITS; break; } supress_zeros = TRUE; /* No leading zeros */ remainder = 0; for (i = decimal_length; i > 0; i--) { /* Divide by nth factor of 10 */ digit = integer; for (j = 0; j < i; j++) { (void)acpi_ut_short_divide(digit, 10, &digit, &remainder); } /* Handle leading zeros */ if (remainder != 0) { supress_zeros = FALSE; } if (!supress_zeros) { string[k] = (u8) (ACPI_ASCII_ZERO + remainder); k++; } } break; case 16: /* hex_length: 2 ascii hex chars per data byte */ hex_length = ACPI_MUL_2(data_width); for (i = 0, j = (hex_length - 1); i < hex_length; i++, j--) { /* Get one hex digit, most significant digits first */ string[k] = (u8) acpi_ut_hex_to_ascii_char(integer, ACPI_MUL_4(j)); k++; } break; default: return (0); } /* * Since leading zeros are suppressed, we must check for the case where * the integer equals 0 * * Finally, null terminate the string and return the length */ if (!k) { string[0] = ACPI_ASCII_ZERO; k = 1; } string[k] = 0; return ((u32) k); } /******************************************************************************* * * FUNCTION: acpi_ex_convert_to_string * * PARAMETERS: obj_desc - Object to be converted. Must be an * Integer, Buffer, or String * result_desc - Where the string object is returned * type - String flags (base and conversion type) * * RETURN: Status * * DESCRIPTION: Convert an ACPI Object to a string * ******************************************************************************/ acpi_status acpi_ex_convert_to_string(union acpi_operand_object * obj_desc, union acpi_operand_object ** result_desc, u32 type) { union acpi_operand_object *return_desc; u8 *new_buf; u32 i; u32 string_length = 0; u16 base = 16; u8 separator = ','; ACPI_FUNCTION_TRACE_PTR(ex_convert_to_string, obj_desc); switch (obj_desc->common.type) { case ACPI_TYPE_STRING: /* No conversion necessary */ *result_desc = obj_desc; return_ACPI_STATUS(AE_OK); case ACPI_TYPE_INTEGER: switch (type) { case ACPI_EXPLICIT_CONVERT_DECIMAL: /* Make room for maximum decimal number */ string_length = ACPI_MAX_DECIMAL_DIGITS; base = 10; break; default: /* Two hex string characters for each integer byte */ string_length = ACPI_MUL_2(acpi_gbl_integer_byte_width); break; } /* * Create a new String * Need enough space for one ASCII integer (plus null terminator) */ return_desc = acpi_ut_create_string_object((acpi_size) string_length); if (!return_desc) { return_ACPI_STATUS(AE_NO_MEMORY); } new_buf = return_desc->buffer.pointer; /* Convert integer to string */ string_length = acpi_ex_convert_to_ascii(obj_desc->integer.value, base, new_buf, acpi_gbl_integer_byte_width); /* Null terminate at the correct place */ return_desc->string.length = string_length; new_buf[string_length] = 0; break; case ACPI_TYPE_BUFFER: /* Setup string length, base, and separator */ switch (type) { case ACPI_EXPLICIT_CONVERT_DECIMAL: /* Used by to_decimal_string */ /* * From ACPI: "If Data is a buffer, it is converted to a string of * decimal values separated by commas." */ base = 10; /* * Calculate the final string length. Individual string values * are variable length (include separator for each) */ for (i = 0; i < obj_desc->buffer.length; i++) { if (obj_desc->buffer.pointer[i] >= 100) { string_length += 4; } else if (obj_desc->buffer.pointer[i] >= 10) { string_length += 3; } else { string_length += 2; } } break; case ACPI_IMPLICIT_CONVERT_HEX: /* * From the ACPI spec: *"The entire contents of the buffer are converted to a string of * two-character hexadecimal numbers, each separated by a space." */ separator = ' '; string_length = (obj_desc->buffer.length * 3); break; case ACPI_EXPLICIT_CONVERT_HEX: /* Used by to_hex_string */ /* * From ACPI: "If Data is a buffer, it is converted to a string of * hexadecimal values separated by commas." */ string_length = (obj_desc->buffer.length * 3); break; default: return_ACPI_STATUS(AE_BAD_PARAMETER); } /* * Create a new string object and string buffer * (-1 because of extra separator included in string_length from above) * Allow creation of zero-length strings from zero-length buffers. */ if (string_length) { string_length--; } return_desc = acpi_ut_create_string_object((acpi_size) string_length); if (!return_desc) { return_ACPI_STATUS(AE_NO_MEMORY); } new_buf = return_desc->buffer.pointer; /* * Convert buffer bytes to hex or decimal values * (separated by commas or spaces) */ for (i = 0; i < obj_desc->buffer.length; i++) { new_buf += acpi_ex_convert_to_ascii((u64) obj_desc-> buffer.pointer[i], base, new_buf, 1); *new_buf++ = separator; /* each separated by a comma or space */ } /* * Null terminate the string * (overwrites final comma/space from above) */ if (obj_desc->buffer.length) { new_buf--; } *new_buf = 0; break; default: return_ACPI_STATUS(AE_TYPE); } *result_desc = return_desc; return_ACPI_STATUS(AE_OK); } /******************************************************************************* * * FUNCTION: acpi_ex_convert_to_target_type * * PARAMETERS: destination_type - Current type of the destination * source_desc - Source object to be converted. * result_desc - Where the converted object is returned * walk_state - Current method state * * RETURN: Status * * DESCRIPTION: Implements "implicit conversion" rules for storing an object. * ******************************************************************************/ acpi_status acpi_ex_convert_to_target_type(acpi_object_type destination_type, union acpi_operand_object *source_desc, union acpi_operand_object **result_desc, struct acpi_walk_state *walk_state) { acpi_status status = AE_OK; ACPI_FUNCTION_TRACE(ex_convert_to_target_type); /* Default behavior */ *result_desc = source_desc; /* * If required by the target, * perform implicit conversion on the source before we store it. */ switch (GET_CURRENT_ARG_TYPE(walk_state->op_info->runtime_args)) { case ARGI_SIMPLE_TARGET: case ARGI_FIXED_TARGET: case ARGI_INTEGER_REF: /* Handles Increment, Decrement cases */ switch (destination_type) { case ACPI_TYPE_LOCAL_REGION_FIELD: /* * Named field can always handle conversions */ break; default: /* No conversion allowed for these types */ if (destination_type != source_desc->common.type) { ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Explicit operator, will store (%s) over existing type (%s)\n", acpi_ut_get_object_type_name (source_desc), acpi_ut_get_type_name (destination_type))); status = AE_TYPE; } } break; case ARGI_TARGETREF: case ARGI_STORE_TARGET: switch (destination_type) { case ACPI_TYPE_INTEGER: case ACPI_TYPE_BUFFER_FIELD: case ACPI_TYPE_LOCAL_BANK_FIELD: case ACPI_TYPE_LOCAL_INDEX_FIELD: /* * These types require an Integer operand. We can convert * a Buffer or a String to an Integer if necessary. */ status = acpi_ex_convert_to_integer(source_desc, result_desc, 16); break; case ACPI_TYPE_STRING: /* * The operand must be a String. We can convert an * Integer or Buffer if necessary */ status = acpi_ex_convert_to_string(source_desc, result_desc, ACPI_IMPLICIT_CONVERT_HEX); break; case ACPI_TYPE_BUFFER: /* * The operand must be a Buffer. We can convert an * Integer or String if necessary */ status = acpi_ex_convert_to_buffer(source_desc, result_desc); break; default: ACPI_ERROR((AE_INFO, "Bad destination type during conversion: 0x%X", destination_type)); status = AE_AML_INTERNAL; break; } break; case ARGI_REFERENCE: /* * create_xxxx_field cases - we are storing the field object into the name */ break; default: ACPI_ERROR((AE_INFO, "Unknown Target type ID 0x%X AmlOpcode 0x%X DestType %s", GET_CURRENT_ARG_TYPE(walk_state->op_info-> runtime_args), walk_state->opcode, acpi_ut_get_type_name(destination_type))); status = AE_AML_INTERNAL; } /* * Source-to-Target conversion semantics: * * If conversion to the target type cannot be performed, then simply * overwrite the target with the new object and type. */ if (status == AE_TYPE) { status = AE_OK; } return_ACPI_STATUS(status); }
gpl-2.0
vmayoral/ubuntu-vivid
net/sunrpc/xprtrdma/svc_rdma_transport.c
404
38597
/* * Copyright (c) 2014 Open Grid Computing, Inc. All rights reserved. * Copyright (c) 2005-2007 Network Appliance, Inc. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the BSD-type * license below: * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * * Neither the name of the Network Appliance, Inc. nor the names of * its contributors may be used to endorse or promote products * derived from this software without specific prior written * permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Author: Tom Tucker <tom@opengridcomputing.com> */ #include <linux/sunrpc/svc_xprt.h> #include <linux/sunrpc/debug.h> #include <linux/sunrpc/rpc_rdma.h> #include <linux/interrupt.h> #include <linux/sched.h> #include <linux/slab.h> #include <linux/spinlock.h> #include <linux/workqueue.h> #include <rdma/ib_verbs.h> #include <rdma/rdma_cm.h> #include <linux/sunrpc/svc_rdma.h> #include <linux/export.h> #include "xprt_rdma.h" #define RPCDBG_FACILITY RPCDBG_SVCXPRT static struct svc_xprt *svc_rdma_create(struct svc_serv *serv, struct net *net, struct sockaddr *sa, int salen, int flags); static struct svc_xprt *svc_rdma_accept(struct svc_xprt *xprt); static void svc_rdma_release_rqst(struct svc_rqst *); static void dto_tasklet_func(unsigned long data); static void svc_rdma_detach(struct svc_xprt *xprt); static void svc_rdma_free(struct svc_xprt *xprt); static int svc_rdma_has_wspace(struct svc_xprt *xprt); static int svc_rdma_secure_port(struct svc_rqst *); static void rq_cq_reap(struct svcxprt_rdma *xprt); static void sq_cq_reap(struct svcxprt_rdma *xprt); static DECLARE_TASKLET(dto_tasklet, dto_tasklet_func, 0UL); static DEFINE_SPINLOCK(dto_lock); static LIST_HEAD(dto_xprt_q); static struct svc_xprt_ops svc_rdma_ops = { .xpo_create = svc_rdma_create, .xpo_recvfrom = svc_rdma_recvfrom, .xpo_sendto = svc_rdma_sendto, .xpo_release_rqst = svc_rdma_release_rqst, .xpo_detach = svc_rdma_detach, .xpo_free = svc_rdma_free, .xpo_prep_reply_hdr = svc_rdma_prep_reply_hdr, .xpo_has_wspace = svc_rdma_has_wspace, .xpo_accept = svc_rdma_accept, .xpo_secure_port = svc_rdma_secure_port, }; struct svc_xprt_class svc_rdma_class = { .xcl_name = "rdma", .xcl_owner = THIS_MODULE, .xcl_ops = &svc_rdma_ops, .xcl_max_payload = RPCSVC_MAXPAYLOAD_RDMA, .xcl_ident = XPRT_TRANSPORT_RDMA, }; struct svc_rdma_op_ctxt *svc_rdma_get_context(struct svcxprt_rdma *xprt) { struct svc_rdma_op_ctxt *ctxt; while (1) { ctxt = kmem_cache_alloc(svc_rdma_ctxt_cachep, GFP_KERNEL); if (ctxt) break; schedule_timeout_uninterruptible(msecs_to_jiffies(500)); } ctxt->xprt = xprt; INIT_LIST_HEAD(&ctxt->dto_q); ctxt->count = 0; ctxt->frmr = NULL; atomic_inc(&xprt->sc_ctxt_used); return ctxt; } void svc_rdma_unmap_dma(struct svc_rdma_op_ctxt *ctxt) { struct svcxprt_rdma *xprt = ctxt->xprt; int i; for (i = 0; i < ctxt->count && ctxt->sge[i].length; i++) { /* * Unmap the DMA addr in the SGE if the lkey matches * the sc_dma_lkey, otherwise, ignore it since it is * an FRMR lkey and will be unmapped later when the * last WR that uses it completes. */ if (ctxt->sge[i].lkey == xprt->sc_dma_lkey) { atomic_dec(&xprt->sc_dma_used); ib_dma_unmap_page(xprt->sc_cm_id->device, ctxt->sge[i].addr, ctxt->sge[i].length, ctxt->direction); } } } void svc_rdma_put_context(struct svc_rdma_op_ctxt *ctxt, int free_pages) { struct svcxprt_rdma *xprt; int i; BUG_ON(!ctxt); xprt = ctxt->xprt; if (free_pages) for (i = 0; i < ctxt->count; i++) put_page(ctxt->pages[i]); kmem_cache_free(svc_rdma_ctxt_cachep, ctxt); atomic_dec(&xprt->sc_ctxt_used); } /* * Temporary NFS req mappings are shared across all transport * instances. These are short lived and should be bounded by the number * of concurrent server threads * depth of the SQ. */ struct svc_rdma_req_map *svc_rdma_get_req_map(void) { struct svc_rdma_req_map *map; while (1) { map = kmem_cache_alloc(svc_rdma_map_cachep, GFP_KERNEL); if (map) break; schedule_timeout_uninterruptible(msecs_to_jiffies(500)); } map->count = 0; return map; } void svc_rdma_put_req_map(struct svc_rdma_req_map *map) { kmem_cache_free(svc_rdma_map_cachep, map); } /* ib_cq event handler */ static void cq_event_handler(struct ib_event *event, void *context) { struct svc_xprt *xprt = context; dprintk("svcrdma: received CQ event id=%d, context=%p\n", event->event, context); set_bit(XPT_CLOSE, &xprt->xpt_flags); } /* QP event handler */ static void qp_event_handler(struct ib_event *event, void *context) { struct svc_xprt *xprt = context; switch (event->event) { /* These are considered benign events */ case IB_EVENT_PATH_MIG: case IB_EVENT_COMM_EST: case IB_EVENT_SQ_DRAINED: case IB_EVENT_QP_LAST_WQE_REACHED: dprintk("svcrdma: QP event %d received for QP=%p\n", event->event, event->element.qp); break; /* These are considered fatal events */ case IB_EVENT_PATH_MIG_ERR: case IB_EVENT_QP_FATAL: case IB_EVENT_QP_REQ_ERR: case IB_EVENT_QP_ACCESS_ERR: case IB_EVENT_DEVICE_FATAL: default: dprintk("svcrdma: QP ERROR event %d received for QP=%p, " "closing transport\n", event->event, event->element.qp); set_bit(XPT_CLOSE, &xprt->xpt_flags); break; } } /* * Data Transfer Operation Tasklet * * Walks a list of transports with I/O pending, removing entries as * they are added to the server's I/O pending list. Two bits indicate * if SQ, RQ, or both have I/O pending. The dto_lock is an irqsave * spinlock that serializes access to the transport list with the RQ * and SQ interrupt handlers. */ static void dto_tasklet_func(unsigned long data) { struct svcxprt_rdma *xprt; unsigned long flags; spin_lock_irqsave(&dto_lock, flags); while (!list_empty(&dto_xprt_q)) { xprt = list_entry(dto_xprt_q.next, struct svcxprt_rdma, sc_dto_q); list_del_init(&xprt->sc_dto_q); spin_unlock_irqrestore(&dto_lock, flags); rq_cq_reap(xprt); sq_cq_reap(xprt); svc_xprt_put(&xprt->sc_xprt); spin_lock_irqsave(&dto_lock, flags); } spin_unlock_irqrestore(&dto_lock, flags); } /* * Receive Queue Completion Handler * * Since an RQ completion handler is called on interrupt context, we * need to defer the handling of the I/O to a tasklet */ static void rq_comp_handler(struct ib_cq *cq, void *cq_context) { struct svcxprt_rdma *xprt = cq_context; unsigned long flags; /* Guard against unconditional flush call for destroyed QP */ if (atomic_read(&xprt->sc_xprt.xpt_ref.refcount)==0) return; /* * Set the bit regardless of whether or not it's on the list * because it may be on the list already due to an SQ * completion. */ set_bit(RDMAXPRT_RQ_PENDING, &xprt->sc_flags); /* * If this transport is not already on the DTO transport queue, * add it */ spin_lock_irqsave(&dto_lock, flags); if (list_empty(&xprt->sc_dto_q)) { svc_xprt_get(&xprt->sc_xprt); list_add_tail(&xprt->sc_dto_q, &dto_xprt_q); } spin_unlock_irqrestore(&dto_lock, flags); /* Tasklet does all the work to avoid irqsave locks. */ tasklet_schedule(&dto_tasklet); } /* * rq_cq_reap - Process the RQ CQ. * * Take all completing WC off the CQE and enqueue the associated DTO * context on the dto_q for the transport. * * Note that caller must hold a transport reference. */ static void rq_cq_reap(struct svcxprt_rdma *xprt) { int ret; struct ib_wc wc; struct svc_rdma_op_ctxt *ctxt = NULL; if (!test_and_clear_bit(RDMAXPRT_RQ_PENDING, &xprt->sc_flags)) return; ib_req_notify_cq(xprt->sc_rq_cq, IB_CQ_NEXT_COMP); atomic_inc(&rdma_stat_rq_poll); while ((ret = ib_poll_cq(xprt->sc_rq_cq, 1, &wc)) > 0) { ctxt = (struct svc_rdma_op_ctxt *)(unsigned long)wc.wr_id; ctxt->wc_status = wc.status; ctxt->byte_len = wc.byte_len; svc_rdma_unmap_dma(ctxt); if (wc.status != IB_WC_SUCCESS) { /* Close the transport */ dprintk("svcrdma: transport closing putting ctxt %p\n", ctxt); set_bit(XPT_CLOSE, &xprt->sc_xprt.xpt_flags); svc_rdma_put_context(ctxt, 1); svc_xprt_put(&xprt->sc_xprt); continue; } spin_lock_bh(&xprt->sc_rq_dto_lock); list_add_tail(&ctxt->dto_q, &xprt->sc_rq_dto_q); spin_unlock_bh(&xprt->sc_rq_dto_lock); svc_xprt_put(&xprt->sc_xprt); } if (ctxt) atomic_inc(&rdma_stat_rq_prod); set_bit(XPT_DATA, &xprt->sc_xprt.xpt_flags); /* * If data arrived before established event, * don't enqueue. This defers RPC I/O until the * RDMA connection is complete. */ if (!test_bit(RDMAXPRT_CONN_PENDING, &xprt->sc_flags)) svc_xprt_enqueue(&xprt->sc_xprt); } /* * Process a completion context */ static void process_context(struct svcxprt_rdma *xprt, struct svc_rdma_op_ctxt *ctxt) { svc_rdma_unmap_dma(ctxt); switch (ctxt->wr_op) { case IB_WR_SEND: BUG_ON(ctxt->frmr); svc_rdma_put_context(ctxt, 1); break; case IB_WR_RDMA_WRITE: BUG_ON(ctxt->frmr); svc_rdma_put_context(ctxt, 0); break; case IB_WR_RDMA_READ: case IB_WR_RDMA_READ_WITH_INV: svc_rdma_put_frmr(xprt, ctxt->frmr); if (test_bit(RDMACTXT_F_LAST_CTXT, &ctxt->flags)) { struct svc_rdma_op_ctxt *read_hdr = ctxt->read_hdr; BUG_ON(!read_hdr); spin_lock_bh(&xprt->sc_rq_dto_lock); set_bit(XPT_DATA, &xprt->sc_xprt.xpt_flags); list_add_tail(&read_hdr->dto_q, &xprt->sc_read_complete_q); spin_unlock_bh(&xprt->sc_rq_dto_lock); svc_xprt_enqueue(&xprt->sc_xprt); } svc_rdma_put_context(ctxt, 0); break; default: BUG_ON(1); printk(KERN_ERR "svcrdma: unexpected completion type, " "opcode=%d\n", ctxt->wr_op); break; } } /* * Send Queue Completion Handler - potentially called on interrupt context. * * Note that caller must hold a transport reference. */ static void sq_cq_reap(struct svcxprt_rdma *xprt) { struct svc_rdma_op_ctxt *ctxt = NULL; struct ib_wc wc_a[6]; struct ib_wc *wc; struct ib_cq *cq = xprt->sc_sq_cq; int ret; memset(wc_a, 0, sizeof(wc_a)); if (!test_and_clear_bit(RDMAXPRT_SQ_PENDING, &xprt->sc_flags)) return; ib_req_notify_cq(xprt->sc_sq_cq, IB_CQ_NEXT_COMP); atomic_inc(&rdma_stat_sq_poll); while ((ret = ib_poll_cq(cq, ARRAY_SIZE(wc_a), wc_a)) > 0) { int i; for (i = 0; i < ret; i++) { wc = &wc_a[i]; if (wc->status != IB_WC_SUCCESS) { dprintk("svcrdma: sq wc err status %d\n", wc->status); /* Close the transport */ set_bit(XPT_CLOSE, &xprt->sc_xprt.xpt_flags); } /* Decrement used SQ WR count */ atomic_dec(&xprt->sc_sq_count); wake_up(&xprt->sc_send_wait); ctxt = (struct svc_rdma_op_ctxt *) (unsigned long)wc->wr_id; if (ctxt) process_context(xprt, ctxt); svc_xprt_put(&xprt->sc_xprt); } } if (ctxt) atomic_inc(&rdma_stat_sq_prod); } static void sq_comp_handler(struct ib_cq *cq, void *cq_context) { struct svcxprt_rdma *xprt = cq_context; unsigned long flags; /* Guard against unconditional flush call for destroyed QP */ if (atomic_read(&xprt->sc_xprt.xpt_ref.refcount)==0) return; /* * Set the bit regardless of whether or not it's on the list * because it may be on the list already due to an RQ * completion. */ set_bit(RDMAXPRT_SQ_PENDING, &xprt->sc_flags); /* * If this transport is not already on the DTO transport queue, * add it */ spin_lock_irqsave(&dto_lock, flags); if (list_empty(&xprt->sc_dto_q)) { svc_xprt_get(&xprt->sc_xprt); list_add_tail(&xprt->sc_dto_q, &dto_xprt_q); } spin_unlock_irqrestore(&dto_lock, flags); /* Tasklet does all the work to avoid irqsave locks. */ tasklet_schedule(&dto_tasklet); } static struct svcxprt_rdma *rdma_create_xprt(struct svc_serv *serv, int listener) { struct svcxprt_rdma *cma_xprt = kzalloc(sizeof *cma_xprt, GFP_KERNEL); if (!cma_xprt) return NULL; svc_xprt_init(&init_net, &svc_rdma_class, &cma_xprt->sc_xprt, serv); INIT_LIST_HEAD(&cma_xprt->sc_accept_q); INIT_LIST_HEAD(&cma_xprt->sc_dto_q); INIT_LIST_HEAD(&cma_xprt->sc_rq_dto_q); INIT_LIST_HEAD(&cma_xprt->sc_read_complete_q); INIT_LIST_HEAD(&cma_xprt->sc_frmr_q); init_waitqueue_head(&cma_xprt->sc_send_wait); spin_lock_init(&cma_xprt->sc_lock); spin_lock_init(&cma_xprt->sc_rq_dto_lock); spin_lock_init(&cma_xprt->sc_frmr_q_lock); cma_xprt->sc_ord = svcrdma_ord; cma_xprt->sc_max_req_size = svcrdma_max_req_size; cma_xprt->sc_max_requests = svcrdma_max_requests; cma_xprt->sc_sq_depth = svcrdma_max_requests * RPCRDMA_SQ_DEPTH_MULT; atomic_set(&cma_xprt->sc_sq_count, 0); atomic_set(&cma_xprt->sc_ctxt_used, 0); if (listener) set_bit(XPT_LISTENER, &cma_xprt->sc_xprt.xpt_flags); return cma_xprt; } struct page *svc_rdma_get_page(void) { struct page *page; while ((page = alloc_page(GFP_KERNEL)) == NULL) { /* If we can't get memory, wait a bit and try again */ printk(KERN_INFO "svcrdma: out of memory...retrying in 1s\n"); schedule_timeout_uninterruptible(msecs_to_jiffies(1000)); } return page; } int svc_rdma_post_recv(struct svcxprt_rdma *xprt) { struct ib_recv_wr recv_wr, *bad_recv_wr; struct svc_rdma_op_ctxt *ctxt; struct page *page; dma_addr_t pa; int sge_no; int buflen; int ret; ctxt = svc_rdma_get_context(xprt); buflen = 0; ctxt->direction = DMA_FROM_DEVICE; for (sge_no = 0; buflen < xprt->sc_max_req_size; sge_no++) { BUG_ON(sge_no >= xprt->sc_max_sge); page = svc_rdma_get_page(); ctxt->pages[sge_no] = page; pa = ib_dma_map_page(xprt->sc_cm_id->device, page, 0, PAGE_SIZE, DMA_FROM_DEVICE); if (ib_dma_mapping_error(xprt->sc_cm_id->device, pa)) goto err_put_ctxt; atomic_inc(&xprt->sc_dma_used); ctxt->sge[sge_no].addr = pa; ctxt->sge[sge_no].length = PAGE_SIZE; ctxt->sge[sge_no].lkey = xprt->sc_dma_lkey; ctxt->count = sge_no + 1; buflen += PAGE_SIZE; } recv_wr.next = NULL; recv_wr.sg_list = &ctxt->sge[0]; recv_wr.num_sge = ctxt->count; recv_wr.wr_id = (u64)(unsigned long)ctxt; svc_xprt_get(&xprt->sc_xprt); ret = ib_post_recv(xprt->sc_qp, &recv_wr, &bad_recv_wr); if (ret) { svc_rdma_unmap_dma(ctxt); svc_rdma_put_context(ctxt, 1); svc_xprt_put(&xprt->sc_xprt); } return ret; err_put_ctxt: svc_rdma_unmap_dma(ctxt); svc_rdma_put_context(ctxt, 1); return -ENOMEM; } /* * This function handles the CONNECT_REQUEST event on a listening * endpoint. It is passed the cma_id for the _new_ connection. The context in * this cma_id is inherited from the listening cma_id and is the svc_xprt * structure for the listening endpoint. * * This function creates a new xprt for the new connection and enqueues it on * the accept queue for the listent xprt. When the listen thread is kicked, it * will call the recvfrom method on the listen xprt which will accept the new * connection. */ static void handle_connect_req(struct rdma_cm_id *new_cma_id, size_t client_ird) { struct svcxprt_rdma *listen_xprt = new_cma_id->context; struct svcxprt_rdma *newxprt; struct sockaddr *sa; /* Create a new transport */ newxprt = rdma_create_xprt(listen_xprt->sc_xprt.xpt_server, 0); if (!newxprt) { dprintk("svcrdma: failed to create new transport\n"); return; } newxprt->sc_cm_id = new_cma_id; new_cma_id->context = newxprt; dprintk("svcrdma: Creating newxprt=%p, cm_id=%p, listenxprt=%p\n", newxprt, newxprt->sc_cm_id, listen_xprt); /* Save client advertised inbound read limit for use later in accept. */ newxprt->sc_ord = client_ird; /* Set the local and remote addresses in the transport */ sa = (struct sockaddr *)&newxprt->sc_cm_id->route.addr.dst_addr; svc_xprt_set_remote(&newxprt->sc_xprt, sa, svc_addr_len(sa)); sa = (struct sockaddr *)&newxprt->sc_cm_id->route.addr.src_addr; svc_xprt_set_local(&newxprt->sc_xprt, sa, svc_addr_len(sa)); /* * Enqueue the new transport on the accept queue of the listening * transport */ spin_lock_bh(&listen_xprt->sc_lock); list_add_tail(&newxprt->sc_accept_q, &listen_xprt->sc_accept_q); spin_unlock_bh(&listen_xprt->sc_lock); set_bit(XPT_CONN, &listen_xprt->sc_xprt.xpt_flags); svc_xprt_enqueue(&listen_xprt->sc_xprt); } /* * Handles events generated on the listening endpoint. These events will be * either be incoming connect requests or adapter removal events. */ static int rdma_listen_handler(struct rdma_cm_id *cma_id, struct rdma_cm_event *event) { struct svcxprt_rdma *xprt = cma_id->context; int ret = 0; switch (event->event) { case RDMA_CM_EVENT_CONNECT_REQUEST: dprintk("svcrdma: Connect request on cma_id=%p, xprt = %p, " "event=%d\n", cma_id, cma_id->context, event->event); handle_connect_req(cma_id, event->param.conn.initiator_depth); break; case RDMA_CM_EVENT_ESTABLISHED: /* Accept complete */ dprintk("svcrdma: Connection completed on LISTEN xprt=%p, " "cm_id=%p\n", xprt, cma_id); break; case RDMA_CM_EVENT_DEVICE_REMOVAL: dprintk("svcrdma: Device removal xprt=%p, cm_id=%p\n", xprt, cma_id); if (xprt) set_bit(XPT_CLOSE, &xprt->sc_xprt.xpt_flags); break; default: dprintk("svcrdma: Unexpected event on listening endpoint %p, " "event=%d\n", cma_id, event->event); break; } return ret; } static int rdma_cma_handler(struct rdma_cm_id *cma_id, struct rdma_cm_event *event) { struct svc_xprt *xprt = cma_id->context; struct svcxprt_rdma *rdma = container_of(xprt, struct svcxprt_rdma, sc_xprt); switch (event->event) { case RDMA_CM_EVENT_ESTABLISHED: /* Accept complete */ svc_xprt_get(xprt); dprintk("svcrdma: Connection completed on DTO xprt=%p, " "cm_id=%p\n", xprt, cma_id); clear_bit(RDMAXPRT_CONN_PENDING, &rdma->sc_flags); svc_xprt_enqueue(xprt); break; case RDMA_CM_EVENT_DISCONNECTED: dprintk("svcrdma: Disconnect on DTO xprt=%p, cm_id=%p\n", xprt, cma_id); if (xprt) { set_bit(XPT_CLOSE, &xprt->xpt_flags); svc_xprt_enqueue(xprt); svc_xprt_put(xprt); } break; case RDMA_CM_EVENT_DEVICE_REMOVAL: dprintk("svcrdma: Device removal cma_id=%p, xprt = %p, " "event=%d\n", cma_id, xprt, event->event); if (xprt) { set_bit(XPT_CLOSE, &xprt->xpt_flags); svc_xprt_enqueue(xprt); } break; default: dprintk("svcrdma: Unexpected event on DTO endpoint %p, " "event=%d\n", cma_id, event->event); break; } return 0; } /* * Create a listening RDMA service endpoint. */ static struct svc_xprt *svc_rdma_create(struct svc_serv *serv, struct net *net, struct sockaddr *sa, int salen, int flags) { struct rdma_cm_id *listen_id; struct svcxprt_rdma *cma_xprt; struct svc_xprt *xprt; int ret; dprintk("svcrdma: Creating RDMA socket\n"); if (sa->sa_family != AF_INET) { dprintk("svcrdma: Address family %d is not supported.\n", sa->sa_family); return ERR_PTR(-EAFNOSUPPORT); } cma_xprt = rdma_create_xprt(serv, 1); if (!cma_xprt) return ERR_PTR(-ENOMEM); xprt = &cma_xprt->sc_xprt; listen_id = rdma_create_id(rdma_listen_handler, cma_xprt, RDMA_PS_TCP, IB_QPT_RC); if (IS_ERR(listen_id)) { ret = PTR_ERR(listen_id); dprintk("svcrdma: rdma_create_id failed = %d\n", ret); goto err0; } ret = rdma_bind_addr(listen_id, sa); if (ret) { dprintk("svcrdma: rdma_bind_addr failed = %d\n", ret); goto err1; } cma_xprt->sc_cm_id = listen_id; ret = rdma_listen(listen_id, RPCRDMA_LISTEN_BACKLOG); if (ret) { dprintk("svcrdma: rdma_listen failed = %d\n", ret); goto err1; } /* * We need to use the address from the cm_id in case the * caller specified 0 for the port number. */ sa = (struct sockaddr *)&cma_xprt->sc_cm_id->route.addr.src_addr; svc_xprt_set_local(&cma_xprt->sc_xprt, sa, salen); return &cma_xprt->sc_xprt; err1: rdma_destroy_id(listen_id); err0: kfree(cma_xprt); return ERR_PTR(ret); } static struct svc_rdma_fastreg_mr *rdma_alloc_frmr(struct svcxprt_rdma *xprt) { struct ib_mr *mr; struct ib_fast_reg_page_list *pl; struct svc_rdma_fastreg_mr *frmr; frmr = kmalloc(sizeof(*frmr), GFP_KERNEL); if (!frmr) goto err; mr = ib_alloc_fast_reg_mr(xprt->sc_pd, RPCSVC_MAXPAGES); if (IS_ERR(mr)) goto err_free_frmr; pl = ib_alloc_fast_reg_page_list(xprt->sc_cm_id->device, RPCSVC_MAXPAGES); if (IS_ERR(pl)) goto err_free_mr; frmr->mr = mr; frmr->page_list = pl; INIT_LIST_HEAD(&frmr->frmr_list); return frmr; err_free_mr: ib_dereg_mr(mr); err_free_frmr: kfree(frmr); err: return ERR_PTR(-ENOMEM); } static void rdma_dealloc_frmr_q(struct svcxprt_rdma *xprt) { struct svc_rdma_fastreg_mr *frmr; while (!list_empty(&xprt->sc_frmr_q)) { frmr = list_entry(xprt->sc_frmr_q.next, struct svc_rdma_fastreg_mr, frmr_list); list_del_init(&frmr->frmr_list); ib_dereg_mr(frmr->mr); ib_free_fast_reg_page_list(frmr->page_list); kfree(frmr); } } struct svc_rdma_fastreg_mr *svc_rdma_get_frmr(struct svcxprt_rdma *rdma) { struct svc_rdma_fastreg_mr *frmr = NULL; spin_lock_bh(&rdma->sc_frmr_q_lock); if (!list_empty(&rdma->sc_frmr_q)) { frmr = list_entry(rdma->sc_frmr_q.next, struct svc_rdma_fastreg_mr, frmr_list); list_del_init(&frmr->frmr_list); frmr->map_len = 0; frmr->page_list_len = 0; } spin_unlock_bh(&rdma->sc_frmr_q_lock); if (frmr) return frmr; return rdma_alloc_frmr(rdma); } static void frmr_unmap_dma(struct svcxprt_rdma *xprt, struct svc_rdma_fastreg_mr *frmr) { int page_no; for (page_no = 0; page_no < frmr->page_list_len; page_no++) { dma_addr_t addr = frmr->page_list->page_list[page_no]; if (ib_dma_mapping_error(frmr->mr->device, addr)) continue; atomic_dec(&xprt->sc_dma_used); ib_dma_unmap_page(frmr->mr->device, addr, PAGE_SIZE, frmr->direction); } } void svc_rdma_put_frmr(struct svcxprt_rdma *rdma, struct svc_rdma_fastreg_mr *frmr) { if (frmr) { frmr_unmap_dma(rdma, frmr); spin_lock_bh(&rdma->sc_frmr_q_lock); BUG_ON(!list_empty(&frmr->frmr_list)); list_add(&frmr->frmr_list, &rdma->sc_frmr_q); spin_unlock_bh(&rdma->sc_frmr_q_lock); } } /* * This is the xpo_recvfrom function for listening endpoints. Its * purpose is to accept incoming connections. The CMA callback handler * has already created a new transport and attached it to the new CMA * ID. * * There is a queue of pending connections hung on the listening * transport. This queue contains the new svc_xprt structure. This * function takes svc_xprt structures off the accept_q and completes * the connection. */ static struct svc_xprt *svc_rdma_accept(struct svc_xprt *xprt) { struct svcxprt_rdma *listen_rdma; struct svcxprt_rdma *newxprt = NULL; struct rdma_conn_param conn_param; struct ib_qp_init_attr qp_attr; struct ib_device_attr devattr; int uninitialized_var(dma_mr_acc); int need_dma_mr; int ret; int i; listen_rdma = container_of(xprt, struct svcxprt_rdma, sc_xprt); clear_bit(XPT_CONN, &xprt->xpt_flags); /* Get the next entry off the accept list */ spin_lock_bh(&listen_rdma->sc_lock); if (!list_empty(&listen_rdma->sc_accept_q)) { newxprt = list_entry(listen_rdma->sc_accept_q.next, struct svcxprt_rdma, sc_accept_q); list_del_init(&newxprt->sc_accept_q); } if (!list_empty(&listen_rdma->sc_accept_q)) set_bit(XPT_CONN, &listen_rdma->sc_xprt.xpt_flags); spin_unlock_bh(&listen_rdma->sc_lock); if (!newxprt) return NULL; dprintk("svcrdma: newxprt from accept queue = %p, cm_id=%p\n", newxprt, newxprt->sc_cm_id); ret = ib_query_device(newxprt->sc_cm_id->device, &devattr); if (ret) { dprintk("svcrdma: could not query device attributes on " "device %p, rc=%d\n", newxprt->sc_cm_id->device, ret); goto errout; } /* Qualify the transport resource defaults with the * capabilities of this particular device */ newxprt->sc_max_sge = min((size_t)devattr.max_sge, (size_t)RPCSVC_MAXPAGES); newxprt->sc_max_requests = min((size_t)devattr.max_qp_wr, (size_t)svcrdma_max_requests); newxprt->sc_sq_depth = RPCRDMA_SQ_DEPTH_MULT * newxprt->sc_max_requests; /* * Limit ORD based on client limit, local device limit, and * configured svcrdma limit. */ newxprt->sc_ord = min_t(size_t, devattr.max_qp_rd_atom, newxprt->sc_ord); newxprt->sc_ord = min_t(size_t, svcrdma_ord, newxprt->sc_ord); newxprt->sc_pd = ib_alloc_pd(newxprt->sc_cm_id->device); if (IS_ERR(newxprt->sc_pd)) { dprintk("svcrdma: error creating PD for connect request\n"); goto errout; } newxprt->sc_sq_cq = ib_create_cq(newxprt->sc_cm_id->device, sq_comp_handler, cq_event_handler, newxprt, newxprt->sc_sq_depth, 0); if (IS_ERR(newxprt->sc_sq_cq)) { dprintk("svcrdma: error creating SQ CQ for connect request\n"); goto errout; } newxprt->sc_rq_cq = ib_create_cq(newxprt->sc_cm_id->device, rq_comp_handler, cq_event_handler, newxprt, newxprt->sc_max_requests, 0); if (IS_ERR(newxprt->sc_rq_cq)) { dprintk("svcrdma: error creating RQ CQ for connect request\n"); goto errout; } memset(&qp_attr, 0, sizeof qp_attr); qp_attr.event_handler = qp_event_handler; qp_attr.qp_context = &newxprt->sc_xprt; qp_attr.cap.max_send_wr = newxprt->sc_sq_depth; qp_attr.cap.max_recv_wr = newxprt->sc_max_requests; qp_attr.cap.max_send_sge = newxprt->sc_max_sge; qp_attr.cap.max_recv_sge = newxprt->sc_max_sge; qp_attr.sq_sig_type = IB_SIGNAL_REQ_WR; qp_attr.qp_type = IB_QPT_RC; qp_attr.send_cq = newxprt->sc_sq_cq; qp_attr.recv_cq = newxprt->sc_rq_cq; dprintk("svcrdma: newxprt->sc_cm_id=%p, newxprt->sc_pd=%p\n" " cm_id->device=%p, sc_pd->device=%p\n" " cap.max_send_wr = %d\n" " cap.max_recv_wr = %d\n" " cap.max_send_sge = %d\n" " cap.max_recv_sge = %d\n", newxprt->sc_cm_id, newxprt->sc_pd, newxprt->sc_cm_id->device, newxprt->sc_pd->device, qp_attr.cap.max_send_wr, qp_attr.cap.max_recv_wr, qp_attr.cap.max_send_sge, qp_attr.cap.max_recv_sge); ret = rdma_create_qp(newxprt->sc_cm_id, newxprt->sc_pd, &qp_attr); if (ret) { dprintk("svcrdma: failed to create QP, ret=%d\n", ret); goto errout; } newxprt->sc_qp = newxprt->sc_cm_id->qp; /* * Use the most secure set of MR resources based on the * transport type and available memory management features in * the device. Here's the table implemented below: * * Fast Global DMA Remote WR * Reg LKEY MR Access * Sup'd Sup'd Needed Needed * * IWARP N N Y Y * N Y Y Y * Y N Y N * Y Y N - * * IB N N Y N * N Y N - * Y N Y N * Y Y N - * * NB: iWARP requires remote write access for the data sink * of an RDMA_READ. IB does not. */ if (devattr.device_cap_flags & IB_DEVICE_MEM_MGT_EXTENSIONS) { newxprt->sc_frmr_pg_list_len = devattr.max_fast_reg_page_list_len; newxprt->sc_dev_caps |= SVCRDMA_DEVCAP_FAST_REG; } /* * Determine if a DMA MR is required and if so, what privs are required */ switch (rdma_node_get_transport(newxprt->sc_cm_id->device->node_type)) { case RDMA_TRANSPORT_IWARP: newxprt->sc_dev_caps |= SVCRDMA_DEVCAP_READ_W_INV; if (!(newxprt->sc_dev_caps & SVCRDMA_DEVCAP_FAST_REG)) { need_dma_mr = 1; dma_mr_acc = (IB_ACCESS_LOCAL_WRITE | IB_ACCESS_REMOTE_WRITE); } else if (!(devattr.device_cap_flags & IB_DEVICE_LOCAL_DMA_LKEY)) { need_dma_mr = 1; dma_mr_acc = IB_ACCESS_LOCAL_WRITE; } else need_dma_mr = 0; break; case RDMA_TRANSPORT_IB: if (!(newxprt->sc_dev_caps & SVCRDMA_DEVCAP_FAST_REG)) { need_dma_mr = 1; dma_mr_acc = IB_ACCESS_LOCAL_WRITE; } else if (!(devattr.device_cap_flags & IB_DEVICE_LOCAL_DMA_LKEY)) { need_dma_mr = 1; dma_mr_acc = IB_ACCESS_LOCAL_WRITE; } else need_dma_mr = 0; break; default: goto errout; } /* Create the DMA MR if needed, otherwise, use the DMA LKEY */ if (need_dma_mr) { /* Register all of physical memory */ newxprt->sc_phys_mr = ib_get_dma_mr(newxprt->sc_pd, dma_mr_acc); if (IS_ERR(newxprt->sc_phys_mr)) { dprintk("svcrdma: Failed to create DMA MR ret=%d\n", ret); goto errout; } newxprt->sc_dma_lkey = newxprt->sc_phys_mr->lkey; } else newxprt->sc_dma_lkey = newxprt->sc_cm_id->device->local_dma_lkey; /* Post receive buffers */ for (i = 0; i < newxprt->sc_max_requests; i++) { ret = svc_rdma_post_recv(newxprt); if (ret) { dprintk("svcrdma: failure posting receive buffers\n"); goto errout; } } /* Swap out the handler */ newxprt->sc_cm_id->event_handler = rdma_cma_handler; /* * Arm the CQs for the SQ and RQ before accepting so we can't * miss the first message */ ib_req_notify_cq(newxprt->sc_sq_cq, IB_CQ_NEXT_COMP); ib_req_notify_cq(newxprt->sc_rq_cq, IB_CQ_NEXT_COMP); /* Accept Connection */ set_bit(RDMAXPRT_CONN_PENDING, &newxprt->sc_flags); memset(&conn_param, 0, sizeof conn_param); conn_param.responder_resources = 0; conn_param.initiator_depth = newxprt->sc_ord; ret = rdma_accept(newxprt->sc_cm_id, &conn_param); if (ret) { dprintk("svcrdma: failed to accept new connection, ret=%d\n", ret); goto errout; } dprintk("svcrdma: new connection %p accepted with the following " "attributes:\n" " local_ip : %pI4\n" " local_port : %d\n" " remote_ip : %pI4\n" " remote_port : %d\n" " max_sge : %d\n" " sq_depth : %d\n" " max_requests : %d\n" " ord : %d\n", newxprt, &((struct sockaddr_in *)&newxprt->sc_cm_id-> route.addr.src_addr)->sin_addr.s_addr, ntohs(((struct sockaddr_in *)&newxprt->sc_cm_id-> route.addr.src_addr)->sin_port), &((struct sockaddr_in *)&newxprt->sc_cm_id-> route.addr.dst_addr)->sin_addr.s_addr, ntohs(((struct sockaddr_in *)&newxprt->sc_cm_id-> route.addr.dst_addr)->sin_port), newxprt->sc_max_sge, newxprt->sc_sq_depth, newxprt->sc_max_requests, newxprt->sc_ord); return &newxprt->sc_xprt; errout: dprintk("svcrdma: failure accepting new connection rc=%d.\n", ret); /* Take a reference in case the DTO handler runs */ svc_xprt_get(&newxprt->sc_xprt); if (newxprt->sc_qp && !IS_ERR(newxprt->sc_qp)) ib_destroy_qp(newxprt->sc_qp); rdma_destroy_id(newxprt->sc_cm_id); /* This call to put will destroy the transport */ svc_xprt_put(&newxprt->sc_xprt); return NULL; } static void svc_rdma_release_rqst(struct svc_rqst *rqstp) { } /* * When connected, an svc_xprt has at least two references: * * - A reference held by the cm_id between the ESTABLISHED and * DISCONNECTED events. If the remote peer disconnected first, this * reference could be gone. * * - A reference held by the svc_recv code that called this function * as part of close processing. * * At a minimum one references should still be held. */ static void svc_rdma_detach(struct svc_xprt *xprt) { struct svcxprt_rdma *rdma = container_of(xprt, struct svcxprt_rdma, sc_xprt); dprintk("svc: svc_rdma_detach(%p)\n", xprt); /* Disconnect and flush posted WQE */ rdma_disconnect(rdma->sc_cm_id); } static void __svc_rdma_free(struct work_struct *work) { struct svcxprt_rdma *rdma = container_of(work, struct svcxprt_rdma, sc_work); dprintk("svcrdma: svc_rdma_free(%p)\n", rdma); /* We should only be called from kref_put */ BUG_ON(atomic_read(&rdma->sc_xprt.xpt_ref.refcount) != 0); /* * Destroy queued, but not processed read completions. Note * that this cleanup has to be done before destroying the * cm_id because the device ptr is needed to unmap the dma in * svc_rdma_put_context. */ while (!list_empty(&rdma->sc_read_complete_q)) { struct svc_rdma_op_ctxt *ctxt; ctxt = list_entry(rdma->sc_read_complete_q.next, struct svc_rdma_op_ctxt, dto_q); list_del_init(&ctxt->dto_q); svc_rdma_put_context(ctxt, 1); } /* Destroy queued, but not processed recv completions */ while (!list_empty(&rdma->sc_rq_dto_q)) { struct svc_rdma_op_ctxt *ctxt; ctxt = list_entry(rdma->sc_rq_dto_q.next, struct svc_rdma_op_ctxt, dto_q); list_del_init(&ctxt->dto_q); svc_rdma_put_context(ctxt, 1); } /* Warn if we leaked a resource or under-referenced */ WARN_ON(atomic_read(&rdma->sc_ctxt_used) != 0); WARN_ON(atomic_read(&rdma->sc_dma_used) != 0); /* De-allocate fastreg mr */ rdma_dealloc_frmr_q(rdma); /* Destroy the QP if present (not a listener) */ if (rdma->sc_qp && !IS_ERR(rdma->sc_qp)) ib_destroy_qp(rdma->sc_qp); if (rdma->sc_sq_cq && !IS_ERR(rdma->sc_sq_cq)) ib_destroy_cq(rdma->sc_sq_cq); if (rdma->sc_rq_cq && !IS_ERR(rdma->sc_rq_cq)) ib_destroy_cq(rdma->sc_rq_cq); if (rdma->sc_phys_mr && !IS_ERR(rdma->sc_phys_mr)) ib_dereg_mr(rdma->sc_phys_mr); if (rdma->sc_pd && !IS_ERR(rdma->sc_pd)) ib_dealloc_pd(rdma->sc_pd); /* Destroy the CM ID */ rdma_destroy_id(rdma->sc_cm_id); kfree(rdma); } static void svc_rdma_free(struct svc_xprt *xprt) { struct svcxprt_rdma *rdma = container_of(xprt, struct svcxprt_rdma, sc_xprt); INIT_WORK(&rdma->sc_work, __svc_rdma_free); queue_work(svc_rdma_wq, &rdma->sc_work); } static int svc_rdma_has_wspace(struct svc_xprt *xprt) { struct svcxprt_rdma *rdma = container_of(xprt, struct svcxprt_rdma, sc_xprt); /* * If there are already waiters on the SQ, * return false. */ if (waitqueue_active(&rdma->sc_send_wait)) return 0; /* Otherwise return true. */ return 1; } static int svc_rdma_secure_port(struct svc_rqst *rqstp) { return 1; } /* * Attempt to register the kvec representing the RPC memory with the * device. * * Returns: * NULL : The device does not support fastreg or there were no more * fastreg mr. * frmr : The kvec register request was successfully posted. * <0 : An error was encountered attempting to register the kvec. */ int svc_rdma_fastreg(struct svcxprt_rdma *xprt, struct svc_rdma_fastreg_mr *frmr) { struct ib_send_wr fastreg_wr; u8 key; /* Bump the key */ key = (u8)(frmr->mr->lkey & 0x000000FF); ib_update_fast_reg_key(frmr->mr, ++key); /* Prepare FASTREG WR */ memset(&fastreg_wr, 0, sizeof fastreg_wr); fastreg_wr.opcode = IB_WR_FAST_REG_MR; fastreg_wr.send_flags = IB_SEND_SIGNALED; fastreg_wr.wr.fast_reg.iova_start = (unsigned long)frmr->kva; fastreg_wr.wr.fast_reg.page_list = frmr->page_list; fastreg_wr.wr.fast_reg.page_list_len = frmr->page_list_len; fastreg_wr.wr.fast_reg.page_shift = PAGE_SHIFT; fastreg_wr.wr.fast_reg.length = frmr->map_len; fastreg_wr.wr.fast_reg.access_flags = frmr->access_flags; fastreg_wr.wr.fast_reg.rkey = frmr->mr->lkey; return svc_rdma_send(xprt, &fastreg_wr); } int svc_rdma_send(struct svcxprt_rdma *xprt, struct ib_send_wr *wr) { struct ib_send_wr *bad_wr, *n_wr; int wr_count; int i; int ret; if (test_bit(XPT_CLOSE, &xprt->sc_xprt.xpt_flags)) return -ENOTCONN; BUG_ON(wr->send_flags != IB_SEND_SIGNALED); wr_count = 1; for (n_wr = wr->next; n_wr; n_wr = n_wr->next) wr_count++; /* If the SQ is full, wait until an SQ entry is available */ while (1) { spin_lock_bh(&xprt->sc_lock); if (xprt->sc_sq_depth < atomic_read(&xprt->sc_sq_count) + wr_count) { spin_unlock_bh(&xprt->sc_lock); atomic_inc(&rdma_stat_sq_starve); /* See if we can opportunistically reap SQ WR to make room */ sq_cq_reap(xprt); /* Wait until SQ WR available if SQ still full */ wait_event(xprt->sc_send_wait, atomic_read(&xprt->sc_sq_count) < xprt->sc_sq_depth); if (test_bit(XPT_CLOSE, &xprt->sc_xprt.xpt_flags)) return -ENOTCONN; continue; } /* Take a transport ref for each WR posted */ for (i = 0; i < wr_count; i++) svc_xprt_get(&xprt->sc_xprt); /* Bump used SQ WR count and post */ atomic_add(wr_count, &xprt->sc_sq_count); ret = ib_post_send(xprt->sc_qp, wr, &bad_wr); if (ret) { set_bit(XPT_CLOSE, &xprt->sc_xprt.xpt_flags); atomic_sub(wr_count, &xprt->sc_sq_count); for (i = 0; i < wr_count; i ++) svc_xprt_put(&xprt->sc_xprt); dprintk("svcrdma: failed to post SQ WR rc=%d, " "sc_sq_count=%d, sc_sq_depth=%d\n", ret, atomic_read(&xprt->sc_sq_count), xprt->sc_sq_depth); } spin_unlock_bh(&xprt->sc_lock); if (ret) wake_up(&xprt->sc_send_wait); break; } return ret; } void svc_rdma_send_error(struct svcxprt_rdma *xprt, struct rpcrdma_msg *rmsgp, enum rpcrdma_errcode err) { struct ib_send_wr err_wr; struct page *p; struct svc_rdma_op_ctxt *ctxt; u32 *va; int length; int ret; p = svc_rdma_get_page(); va = page_address(p); /* XDR encode error */ length = svc_rdma_xdr_encode_error(xprt, rmsgp, err, va); ctxt = svc_rdma_get_context(xprt); ctxt->direction = DMA_FROM_DEVICE; ctxt->count = 1; ctxt->pages[0] = p; /* Prepare SGE for local address */ ctxt->sge[0].addr = ib_dma_map_page(xprt->sc_cm_id->device, p, 0, length, DMA_FROM_DEVICE); if (ib_dma_mapping_error(xprt->sc_cm_id->device, ctxt->sge[0].addr)) { put_page(p); svc_rdma_put_context(ctxt, 1); return; } atomic_inc(&xprt->sc_dma_used); ctxt->sge[0].lkey = xprt->sc_dma_lkey; ctxt->sge[0].length = length; /* Prepare SEND WR */ memset(&err_wr, 0, sizeof err_wr); ctxt->wr_op = IB_WR_SEND; err_wr.wr_id = (unsigned long)ctxt; err_wr.sg_list = ctxt->sge; err_wr.num_sge = 1; err_wr.opcode = IB_WR_SEND; err_wr.send_flags = IB_SEND_SIGNALED; /* Post It */ ret = svc_rdma_send(xprt, &err_wr); if (ret) { dprintk("svcrdma: Error %d posting send for protocol error\n", ret); svc_rdma_unmap_dma(ctxt); svc_rdma_put_context(ctxt, 1); } }
gpl-2.0
markbrown314/edison-linux
drivers/net/wireless/rtlwifi/rtl8192ce/hw.c
916
68345
/****************************************************************************** * * Copyright(c) 2009-2012 Realtek Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * The full GNU General Public License is included in this distribution in the * file called LICENSE. * * Contact Information: * wlanfae <wlanfae@realtek.com> * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, * Hsinchu 300, Taiwan. * * Larry Finger <Larry.Finger@lwfinger.net> * *****************************************************************************/ #include "../wifi.h" #include "../efuse.h" #include "../base.h" #include "../regd.h" #include "../cam.h" #include "../ps.h" #include "../pci.h" #include "reg.h" #include "def.h" #include "phy.h" #include "../rtl8192c/dm_common.h" #include "../rtl8192c/fw_common.h" #include "../rtl8192c/phy_common.h" #include "dm.h" #include "led.h" #include "hw.h" #define LLT_CONFIG 5 static void _rtl92ce_set_bcn_ctrl_reg(struct ieee80211_hw *hw, u8 set_bits, u8 clear_bits) { struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); struct rtl_priv *rtlpriv = rtl_priv(hw); rtlpci->reg_bcn_ctrl_val |= set_bits; rtlpci->reg_bcn_ctrl_val &= ~clear_bits; rtl_write_byte(rtlpriv, REG_BCN_CTRL, (u8)rtlpci->reg_bcn_ctrl_val); } static void _rtl92ce_stop_tx_beacon(struct ieee80211_hw *hw) { struct rtl_priv *rtlpriv = rtl_priv(hw); u8 tmp1byte; tmp1byte = rtl_read_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2); rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2, tmp1byte & (~BIT(6))); rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0x64); tmp1byte = rtl_read_byte(rtlpriv, REG_TBTT_PROHIBIT + 2); tmp1byte &= ~(BIT(0)); rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 2, tmp1byte); } static void _rtl92ce_resume_tx_beacon(struct ieee80211_hw *hw) { struct rtl_priv *rtlpriv = rtl_priv(hw); u8 tmp1byte; tmp1byte = rtl_read_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2); rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2, tmp1byte | BIT(6)); rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0xff); tmp1byte = rtl_read_byte(rtlpriv, REG_TBTT_PROHIBIT + 2); tmp1byte |= BIT(0); rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 2, tmp1byte); } static void _rtl92ce_enable_bcn_sub_func(struct ieee80211_hw *hw) { _rtl92ce_set_bcn_ctrl_reg(hw, 0, BIT(1)); } static void _rtl92ce_disable_bcn_sub_func(struct ieee80211_hw *hw) { _rtl92ce_set_bcn_ctrl_reg(hw, BIT(1), 0); } void rtl92ce_get_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) { struct rtl_priv *rtlpriv = rtl_priv(hw); struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw)); struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); switch (variable) { case HW_VAR_RCR: *((u32 *) (val)) = rtlpci->receive_config; break; case HW_VAR_RF_STATE: *((enum rf_pwrstate *)(val)) = ppsc->rfpwr_state; break; case HW_VAR_FWLPS_RF_ON:{ enum rf_pwrstate rfState; u32 val_rcr; rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_RF_STATE, (u8 *) (&rfState)); if (rfState == ERFOFF) { *((bool *) (val)) = true; } else { val_rcr = rtl_read_dword(rtlpriv, REG_RCR); val_rcr &= 0x00070000; if (val_rcr) *((bool *) (val)) = false; else *((bool *) (val)) = true; } break; } case HW_VAR_FW_PSMODE_STATUS: *((bool *) (val)) = ppsc->fw_current_inpsmode; break; case HW_VAR_CORRECT_TSF:{ u64 tsf; u32 *ptsf_low = (u32 *)&tsf; u32 *ptsf_high = ((u32 *)&tsf) + 1; *ptsf_high = rtl_read_dword(rtlpriv, (REG_TSFTR + 4)); *ptsf_low = rtl_read_dword(rtlpriv, REG_TSFTR); *((u64 *) (val)) = tsf; break; } default: RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "switch case not processed\n"); break; } } void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) { struct rtl_priv *rtlpriv = rtl_priv(hw); struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw); struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw)); struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw)); u8 idx; switch (variable) { case HW_VAR_ETHER_ADDR:{ for (idx = 0; idx < ETH_ALEN; idx++) { rtl_write_byte(rtlpriv, (REG_MACID + idx), val[idx]); } break; } case HW_VAR_BASIC_RATE:{ u16 rate_cfg = ((u16 *) val)[0]; u8 rate_index = 0; rate_cfg &= 0x15f; rate_cfg |= 0x01; rtl_write_byte(rtlpriv, REG_RRSR, rate_cfg & 0xff); rtl_write_byte(rtlpriv, REG_RRSR + 1, (rate_cfg >> 8) & 0xff); while (rate_cfg > 0x1) { rate_cfg = (rate_cfg >> 1); rate_index++; } rtl_write_byte(rtlpriv, REG_INIRTS_RATE_SEL, rate_index); break; } case HW_VAR_BSSID:{ for (idx = 0; idx < ETH_ALEN; idx++) { rtl_write_byte(rtlpriv, (REG_BSSID + idx), val[idx]); } break; } case HW_VAR_SIFS:{ rtl_write_byte(rtlpriv, REG_SIFS_CTX + 1, val[0]); rtl_write_byte(rtlpriv, REG_SIFS_TRX + 1, val[1]); rtl_write_byte(rtlpriv, REG_SPEC_SIFS + 1, val[0]); rtl_write_byte(rtlpriv, REG_MAC_SPEC_SIFS + 1, val[0]); if (!mac->ht_enable) rtl_write_word(rtlpriv, REG_RESP_SIFS_OFDM, 0x0e0e); else rtl_write_word(rtlpriv, REG_RESP_SIFS_OFDM, *((u16 *) val)); break; } case HW_VAR_SLOT_TIME:{ u8 e_aci; RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, "HW_VAR_SLOT_TIME %x\n", val[0]); rtl_write_byte(rtlpriv, REG_SLOT, val[0]); for (e_aci = 0; e_aci < AC_MAX; e_aci++) { rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_AC_PARAM, &e_aci); } break; } case HW_VAR_ACK_PREAMBLE:{ u8 reg_tmp; u8 short_preamble = (bool)*val; reg_tmp = (mac->cur_40_prime_sc) << 5; if (short_preamble) reg_tmp |= 0x80; rtl_write_byte(rtlpriv, REG_RRSR + 2, reg_tmp); break; } case HW_VAR_AMPDU_MIN_SPACE:{ u8 min_spacing_to_set; u8 sec_min_space; min_spacing_to_set = *val; if (min_spacing_to_set <= 7) { sec_min_space = 0; if (min_spacing_to_set < sec_min_space) min_spacing_to_set = sec_min_space; mac->min_space_cfg = ((mac->min_space_cfg & 0xf8) | min_spacing_to_set); *val = min_spacing_to_set; RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, "Set HW_VAR_AMPDU_MIN_SPACE: %#x\n", mac->min_space_cfg); rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE, mac->min_space_cfg); } break; } case HW_VAR_SHORTGI_DENSITY:{ u8 density_to_set; density_to_set = *val; mac->min_space_cfg |= (density_to_set << 3); RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, "Set HW_VAR_SHORTGI_DENSITY: %#x\n", mac->min_space_cfg); rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE, mac->min_space_cfg); break; } case HW_VAR_AMPDU_FACTOR:{ u8 regtoset_normal[4] = {0x41, 0xa8, 0x72, 0xb9}; u8 regtoset_bt[4] = {0x31, 0x74, 0x42, 0x97}; u8 factor_toset; u8 *p_regtoset = NULL; u8 index = 0; if ((rtlpcipriv->bt_coexist.bt_coexistence) && (rtlpcipriv->bt_coexist.bt_coexist_type == BT_CSR_BC4)) p_regtoset = regtoset_bt; else p_regtoset = regtoset_normal; factor_toset = *(val); if (factor_toset <= 3) { factor_toset = (1 << (factor_toset + 2)); if (factor_toset > 0xf) factor_toset = 0xf; for (index = 0; index < 4; index++) { if ((p_regtoset[index] & 0xf0) > (factor_toset << 4)) p_regtoset[index] = (p_regtoset[index] & 0x0f) | (factor_toset << 4); if ((p_regtoset[index] & 0x0f) > factor_toset) p_regtoset[index] = (p_regtoset[index] & 0xf0) | (factor_toset); rtl_write_byte(rtlpriv, (REG_AGGLEN_LMT + index), p_regtoset[index]); } RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, "Set HW_VAR_AMPDU_FACTOR: %#x\n", factor_toset); } break; } case HW_VAR_AC_PARAM:{ u8 e_aci = *(val); rtl92c_dm_init_edca_turbo(hw); if (rtlpci->acm_method != EACMWAY2_SW) rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_ACM_CTRL, (&e_aci)); break; } case HW_VAR_ACM_CTRL:{ u8 e_aci = *(val); union aci_aifsn *p_aci_aifsn = (union aci_aifsn *)(&(mac->ac[0].aifs)); u8 acm = p_aci_aifsn->f.acm; u8 acm_ctrl = rtl_read_byte(rtlpriv, REG_ACMHWCTRL); acm_ctrl = acm_ctrl | ((rtlpci->acm_method == 2) ? 0x0 : 0x1); if (acm) { switch (e_aci) { case AC0_BE: acm_ctrl |= AcmHw_BeqEn; break; case AC2_VI: acm_ctrl |= AcmHw_ViqEn; break; case AC3_VO: acm_ctrl |= AcmHw_VoqEn; break; default: RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, "HW_VAR_ACM_CTRL acm set failed: eACI is %d\n", acm); break; } } else { switch (e_aci) { case AC0_BE: acm_ctrl &= (~AcmHw_BeqEn); break; case AC2_VI: acm_ctrl &= (~AcmHw_ViqEn); break; case AC3_VO: acm_ctrl &= (~AcmHw_VoqEn); break; default: RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "switch case not processed\n"); break; } } RT_TRACE(rtlpriv, COMP_QOS, DBG_TRACE, "SetHwReg8190pci(): [HW_VAR_ACM_CTRL] Write 0x%X\n", acm_ctrl); rtl_write_byte(rtlpriv, REG_ACMHWCTRL, acm_ctrl); break; } case HW_VAR_RCR:{ rtl_write_dword(rtlpriv, REG_RCR, ((u32 *) (val))[0]); rtlpci->receive_config = ((u32 *) (val))[0]; break; } case HW_VAR_RETRY_LIMIT:{ u8 retry_limit = val[0]; rtl_write_word(rtlpriv, REG_RL, retry_limit << RETRY_LIMIT_SHORT_SHIFT | retry_limit << RETRY_LIMIT_LONG_SHIFT); break; } case HW_VAR_DUAL_TSF_RST: rtl_write_byte(rtlpriv, REG_DUAL_TSF_RST, (BIT(0) | BIT(1))); break; case HW_VAR_EFUSE_BYTES: rtlefuse->efuse_usedbytes = *((u16 *) val); break; case HW_VAR_EFUSE_USAGE: rtlefuse->efuse_usedpercentage = *val; break; case HW_VAR_IO_CMD: rtl92c_phy_set_io_cmd(hw, (*(enum io_type *)val)); break; case HW_VAR_WPA_CONFIG: rtl_write_byte(rtlpriv, REG_SECCFG, *val); break; case HW_VAR_SET_RPWM:{ u8 rpwm_val; rpwm_val = rtl_read_byte(rtlpriv, REG_PCIE_HRPWM); udelay(1); if (rpwm_val & BIT(7)) { rtl_write_byte(rtlpriv, REG_PCIE_HRPWM, *val); } else { rtl_write_byte(rtlpriv, REG_PCIE_HRPWM, *val | BIT(7)); } break; } case HW_VAR_H2C_FW_PWRMODE:{ u8 psmode = *val; if ((psmode != FW_PS_ACTIVE_MODE) && (!IS_92C_SERIAL(rtlhal->version))) { rtl92c_dm_rf_saving(hw, true); } rtl92c_set_fw_pwrmode_cmd(hw, *val); break; } case HW_VAR_FW_PSMODE_STATUS: ppsc->fw_current_inpsmode = *((bool *) val); break; case HW_VAR_H2C_FW_JOINBSSRPT:{ u8 mstatus = *val; u8 tmp_regcr, tmp_reg422; bool recover = false; if (mstatus == RT_MEDIA_CONNECT) { rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_AID, NULL); tmp_regcr = rtl_read_byte(rtlpriv, REG_CR + 1); rtl_write_byte(rtlpriv, REG_CR + 1, (tmp_regcr | BIT(0))); _rtl92ce_set_bcn_ctrl_reg(hw, 0, BIT(3)); _rtl92ce_set_bcn_ctrl_reg(hw, BIT(4), 0); tmp_reg422 = rtl_read_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2); if (tmp_reg422 & BIT(6)) recover = true; rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2, tmp_reg422 & (~BIT(6))); rtl92c_set_fw_rsvdpagepkt(hw, NULL); _rtl92ce_set_bcn_ctrl_reg(hw, BIT(3), 0); _rtl92ce_set_bcn_ctrl_reg(hw, 0, BIT(4)); if (recover) { rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2, tmp_reg422); } rtl_write_byte(rtlpriv, REG_CR + 1, (tmp_regcr & ~(BIT(0)))); } rtl92c_set_fw_joinbss_report_cmd(hw, *val); break; } case HW_VAR_H2C_FW_P2P_PS_OFFLOAD: rtl92c_set_p2p_ps_offload_cmd(hw, *val); break; case HW_VAR_AID:{ u16 u2btmp; u2btmp = rtl_read_word(rtlpriv, REG_BCN_PSR_RPT); u2btmp &= 0xC000; rtl_write_word(rtlpriv, REG_BCN_PSR_RPT, (u2btmp | mac->assoc_id)); break; } case HW_VAR_CORRECT_TSF:{ u8 btype_ibss = val[0]; if (btype_ibss) _rtl92ce_stop_tx_beacon(hw); _rtl92ce_set_bcn_ctrl_reg(hw, 0, BIT(3)); rtl_write_dword(rtlpriv, REG_TSFTR, (u32) (mac->tsf & 0xffffffff)); rtl_write_dword(rtlpriv, REG_TSFTR + 4, (u32) ((mac->tsf >> 32) & 0xffffffff)); _rtl92ce_set_bcn_ctrl_reg(hw, BIT(3), 0); if (btype_ibss) _rtl92ce_resume_tx_beacon(hw); break; } case HW_VAR_FW_LPS_ACTION: { bool enter_fwlps = *((bool *)val); u8 rpwm_val, fw_pwrmode; bool fw_current_inps; if (enter_fwlps) { rpwm_val = 0x02; /* RF off */ fw_current_inps = true; rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_FW_PSMODE_STATUS, (u8 *)(&fw_current_inps)); rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_H2C_FW_PWRMODE, &ppsc->fwctrl_psmode); rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SET_RPWM, &rpwm_val); } else { rpwm_val = 0x0C; /* RF on */ fw_pwrmode = FW_PS_ACTIVE_MODE; fw_current_inps = false; rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SET_RPWM, &rpwm_val); rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_H2C_FW_PWRMODE, &fw_pwrmode); rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_FW_PSMODE_STATUS, (u8 *)(&fw_current_inps)); } break; } case HW_VAR_KEEP_ALIVE: { u8 array[2]; array[0] = 0xff; array[1] = *((u8 *)val); rtl92c_fill_h2c_cmd(hw, H2C_92C_KEEP_ALIVE_CTRL, 2, array); break; } default: RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "switch case %d not processed\n", variable); break; } } static bool _rtl92ce_llt_write(struct ieee80211_hw *hw, u32 address, u32 data) { struct rtl_priv *rtlpriv = rtl_priv(hw); bool status = true; long count = 0; u32 value = _LLT_INIT_ADDR(address) | _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS); rtl_write_dword(rtlpriv, REG_LLT_INIT, value); do { value = rtl_read_dword(rtlpriv, REG_LLT_INIT); if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value)) break; if (count > POLLING_LLT_THRESHOLD) { RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Failed to polling write LLT done at address %d!\n", address); status = false; break; } } while (++count); return status; } static bool _rtl92ce_llt_table_init(struct ieee80211_hw *hw) { struct rtl_priv *rtlpriv = rtl_priv(hw); unsigned short i; u8 txpktbuf_bndy; u8 maxPage; bool status; #if LLT_CONFIG == 1 maxPage = 255; txpktbuf_bndy = 252; #elif LLT_CONFIG == 2 maxPage = 127; txpktbuf_bndy = 124; #elif LLT_CONFIG == 3 maxPage = 255; txpktbuf_bndy = 174; #elif LLT_CONFIG == 4 maxPage = 255; txpktbuf_bndy = 246; #elif LLT_CONFIG == 5 maxPage = 255; txpktbuf_bndy = 246; #endif #if LLT_CONFIG == 1 rtl_write_byte(rtlpriv, REG_RQPN_NPQ, 0x1c); rtl_write_dword(rtlpriv, REG_RQPN, 0x80a71c1c); #elif LLT_CONFIG == 2 rtl_write_dword(rtlpriv, REG_RQPN, 0x845B1010); #elif LLT_CONFIG == 3 rtl_write_dword(rtlpriv, REG_RQPN, 0x84838484); #elif LLT_CONFIG == 4 rtl_write_dword(rtlpriv, REG_RQPN, 0x80bd1c1c); #elif LLT_CONFIG == 5 rtl_write_word(rtlpriv, REG_RQPN_NPQ, 0x0000); rtl_write_dword(rtlpriv, REG_RQPN, 0x80b01c29); #endif rtl_write_dword(rtlpriv, REG_TRXFF_BNDY, (0x27FF0000 | txpktbuf_bndy)); rtl_write_byte(rtlpriv, REG_TDECTRL + 1, txpktbuf_bndy); rtl_write_byte(rtlpriv, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy); rtl_write_byte(rtlpriv, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy); rtl_write_byte(rtlpriv, 0x45D, txpktbuf_bndy); rtl_write_byte(rtlpriv, REG_PBP, 0x11); rtl_write_byte(rtlpriv, REG_RX_DRVINFO_SZ, 0x4); for (i = 0; i < (txpktbuf_bndy - 1); i++) { status = _rtl92ce_llt_write(hw, i, i + 1); if (true != status) return status; } status = _rtl92ce_llt_write(hw, (txpktbuf_bndy - 1), 0xFF); if (true != status) return status; for (i = txpktbuf_bndy; i < maxPage; i++) { status = _rtl92ce_llt_write(hw, i, (i + 1)); if (true != status) return status; } status = _rtl92ce_llt_write(hw, maxPage, txpktbuf_bndy); if (true != status) return status; return true; } static void _rtl92ce_gen_refresh_led_state(struct ieee80211_hw *hw) { struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw); struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw)); struct rtl_led *pLed0 = &(pcipriv->ledctl.sw_led0); if (rtlpci->up_first_time) return; if (ppsc->rfoff_reason == RF_CHANGE_BY_IPS) rtl92ce_sw_led_on(hw, pLed0); else if (ppsc->rfoff_reason == RF_CHANGE_BY_INIT) rtl92ce_sw_led_on(hw, pLed0); else rtl92ce_sw_led_off(hw, pLed0); } static bool _rtl92ce_init_mac(struct ieee80211_hw *hw) { struct rtl_priv *rtlpriv = rtl_priv(hw); struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw); struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); unsigned char bytetmp; unsigned short wordtmp; u16 retry; rtl_write_byte(rtlpriv, REG_RSV_CTRL, 0x00); if (rtlpcipriv->bt_coexist.bt_coexistence) { u32 value32; value32 = rtl_read_dword(rtlpriv, REG_APS_FSMCO); value32 |= (SOP_ABG | SOP_AMB | XOP_BTCK); rtl_write_dword(rtlpriv, REG_APS_FSMCO, value32); } rtl_write_byte(rtlpriv, REG_SPS0_CTRL, 0x2b); rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL, 0x0F); if (rtlpcipriv->bt_coexist.bt_coexistence) { u32 u4b_tmp = rtl_read_dword(rtlpriv, REG_AFE_XTAL_CTRL); u4b_tmp &= (~0x00024800); rtl_write_dword(rtlpriv, REG_AFE_XTAL_CTRL, u4b_tmp); } bytetmp = rtl_read_byte(rtlpriv, REG_APS_FSMCO + 1) | BIT(0); udelay(2); rtl_write_byte(rtlpriv, REG_APS_FSMCO + 1, bytetmp); udelay(2); bytetmp = rtl_read_byte(rtlpriv, REG_APS_FSMCO + 1); udelay(2); retry = 0; RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "reg0xec:%x:%x\n", rtl_read_dword(rtlpriv, 0xEC), bytetmp); while ((bytetmp & BIT(0)) && retry < 1000) { retry++; udelay(50); bytetmp = rtl_read_byte(rtlpriv, REG_APS_FSMCO + 1); RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "reg0xec:%x:%x\n", rtl_read_dword(rtlpriv, 0xEC), bytetmp); udelay(50); } rtl_write_word(rtlpriv, REG_APS_FSMCO, 0x1012); rtl_write_byte(rtlpriv, REG_SYS_ISO_CTRL + 1, 0x82); udelay(2); if (rtlpcipriv->bt_coexist.bt_coexistence) { bytetmp = rtl_read_byte(rtlpriv, REG_AFE_XTAL_CTRL+2) & 0xfd; rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL+2, bytetmp); } rtl_write_word(rtlpriv, REG_CR, 0x2ff); if (!_rtl92ce_llt_table_init(hw)) return false; rtl_write_dword(rtlpriv, REG_HISR, 0xffffffff); rtl_write_byte(rtlpriv, REG_HISRE, 0xff); rtl_write_word(rtlpriv, REG_TRXFF_BNDY + 2, 0x27ff); wordtmp = rtl_read_word(rtlpriv, REG_TRXDMA_CTRL); wordtmp &= 0xf; wordtmp |= 0xF771; rtl_write_word(rtlpriv, REG_TRXDMA_CTRL, wordtmp); rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 1, 0x1F); rtl_write_dword(rtlpriv, REG_RCR, rtlpci->receive_config); rtl_write_dword(rtlpriv, REG_TCR, rtlpci->transmit_config); rtl_write_byte(rtlpriv, 0x4d0, 0x0); rtl_write_dword(rtlpriv, REG_BCNQ_DESA, ((u64) rtlpci->tx_ring[BEACON_QUEUE].dma) & DMA_BIT_MASK(32)); rtl_write_dword(rtlpriv, REG_MGQ_DESA, (u64) rtlpci->tx_ring[MGNT_QUEUE].dma & DMA_BIT_MASK(32)); rtl_write_dword(rtlpriv, REG_VOQ_DESA, (u64) rtlpci->tx_ring[VO_QUEUE].dma & DMA_BIT_MASK(32)); rtl_write_dword(rtlpriv, REG_VIQ_DESA, (u64) rtlpci->tx_ring[VI_QUEUE].dma & DMA_BIT_MASK(32)); rtl_write_dword(rtlpriv, REG_BEQ_DESA, (u64) rtlpci->tx_ring[BE_QUEUE].dma & DMA_BIT_MASK(32)); rtl_write_dword(rtlpriv, REG_BKQ_DESA, (u64) rtlpci->tx_ring[BK_QUEUE].dma & DMA_BIT_MASK(32)); rtl_write_dword(rtlpriv, REG_HQ_DESA, (u64) rtlpci->tx_ring[HIGH_QUEUE].dma & DMA_BIT_MASK(32)); rtl_write_dword(rtlpriv, REG_RX_DESA, (u64) rtlpci->rx_ring[RX_MPDU_QUEUE].dma & DMA_BIT_MASK(32)); if (IS_92C_SERIAL(rtlhal->version)) rtl_write_byte(rtlpriv, REG_PCIE_CTRL_REG + 3, 0x77); else rtl_write_byte(rtlpriv, REG_PCIE_CTRL_REG + 3, 0x22); rtl_write_dword(rtlpriv, REG_INT_MIG, 0); bytetmp = rtl_read_byte(rtlpriv, REG_APSD_CTRL); rtl_write_byte(rtlpriv, REG_APSD_CTRL, bytetmp & ~BIT(6)); do { retry++; bytetmp = rtl_read_byte(rtlpriv, REG_APSD_CTRL); } while ((retry < 200) && (bytetmp & BIT(7))); _rtl92ce_gen_refresh_led_state(hw); rtl_write_dword(rtlpriv, REG_MCUTST_1, 0x0); return true; } static void _rtl92ce_hw_configure(struct ieee80211_hw *hw) { struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); struct rtl_priv *rtlpriv = rtl_priv(hw); struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw); u8 reg_bw_opmode; u32 reg_prsr; reg_bw_opmode = BW_OPMODE_20MHZ; reg_prsr = RATE_ALL_CCK | RATE_ALL_OFDM_AG; rtl_write_byte(rtlpriv, REG_INIRTS_RATE_SEL, 0x8); rtl_write_byte(rtlpriv, REG_BWOPMODE, reg_bw_opmode); rtl_write_dword(rtlpriv, REG_RRSR, reg_prsr); rtl_write_byte(rtlpriv, REG_SLOT, 0x09); rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE, 0x0); rtl_write_word(rtlpriv, REG_FWHW_TXQ_CTRL, 0x1F80); rtl_write_word(rtlpriv, REG_RL, 0x0707); rtl_write_dword(rtlpriv, REG_BAR_MODE_CTRL, 0x02012802); rtl_write_byte(rtlpriv, REG_HWSEQ_CTRL, 0xFF); rtl_write_dword(rtlpriv, REG_DARFRC, 0x01000000); rtl_write_dword(rtlpriv, REG_DARFRC + 4, 0x07060504); rtl_write_dword(rtlpriv, REG_RARFRC, 0x01000000); rtl_write_dword(rtlpriv, REG_RARFRC + 4, 0x07060504); if ((rtlpcipriv->bt_coexist.bt_coexistence) && (rtlpcipriv->bt_coexist.bt_coexist_type == BT_CSR_BC4)) rtl_write_dword(rtlpriv, REG_AGGLEN_LMT, 0x97427431); else rtl_write_dword(rtlpriv, REG_AGGLEN_LMT, 0xb972a841); rtl_write_byte(rtlpriv, REG_ATIMWND, 0x2); rtl_write_byte(rtlpriv, REG_BCN_MAX_ERR, 0xff); rtlpci->reg_bcn_ctrl_val = 0x1f; rtl_write_byte(rtlpriv, REG_BCN_CTRL, rtlpci->reg_bcn_ctrl_val); rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0xff); rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0xff); rtl_write_byte(rtlpriv, REG_PIFS, 0x1C); rtl_write_byte(rtlpriv, REG_AGGR_BREAK_TIME, 0x16); if ((rtlpcipriv->bt_coexist.bt_coexistence) && (rtlpcipriv->bt_coexist.bt_coexist_type == BT_CSR_BC4)) { rtl_write_word(rtlpriv, REG_NAV_PROT_LEN, 0x0020); rtl_write_word(rtlpriv, REG_PROT_MODE_CTRL, 0x0402); } else { rtl_write_word(rtlpriv, REG_NAV_PROT_LEN, 0x0020); rtl_write_word(rtlpriv, REG_NAV_PROT_LEN, 0x0020); } if ((rtlpcipriv->bt_coexist.bt_coexistence) && (rtlpcipriv->bt_coexist.bt_coexist_type == BT_CSR_BC4)) rtl_write_dword(rtlpriv, REG_FAST_EDCA_CTRL, 0x03086666); else rtl_write_dword(rtlpriv, REG_FAST_EDCA_CTRL, 0x086666); rtl_write_byte(rtlpriv, REG_ACKTO, 0x40); rtl_write_word(rtlpriv, REG_SPEC_SIFS, 0x1010); rtl_write_word(rtlpriv, REG_MAC_SPEC_SIFS, 0x1010); rtl_write_word(rtlpriv, REG_SIFS_CTX, 0x1010); rtl_write_word(rtlpriv, REG_SIFS_TRX, 0x1010); rtl_write_dword(rtlpriv, REG_MAR, 0xffffffff); rtl_write_dword(rtlpriv, REG_MAR + 4, 0xffffffff); } static void _rtl92ce_enable_aspm_back_door(struct ieee80211_hw *hw) { struct rtl_priv *rtlpriv = rtl_priv(hw); struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw)); rtl_write_byte(rtlpriv, 0x34b, 0x93); rtl_write_word(rtlpriv, 0x350, 0x870c); rtl_write_byte(rtlpriv, 0x352, 0x1); if (ppsc->support_backdoor) rtl_write_byte(rtlpriv, 0x349, 0x1b); else rtl_write_byte(rtlpriv, 0x349, 0x03); rtl_write_word(rtlpriv, 0x350, 0x2718); rtl_write_byte(rtlpriv, 0x352, 0x1); } void rtl92ce_enable_hw_security_config(struct ieee80211_hw *hw) { struct rtl_priv *rtlpriv = rtl_priv(hw); u8 sec_reg_value; RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "PairwiseEncAlgorithm = %d GroupEncAlgorithm = %d\n", rtlpriv->sec.pairwise_enc_algorithm, rtlpriv->sec.group_enc_algorithm); if (rtlpriv->cfg->mod_params->sw_crypto || rtlpriv->sec.use_sw_sec) { RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, "not open hw encryption\n"); return; } sec_reg_value = SCR_TxEncEnable | SCR_RxDecEnable; if (rtlpriv->sec.use_defaultkey) { sec_reg_value |= SCR_TxUseDK; sec_reg_value |= SCR_RxUseDK; } sec_reg_value |= (SCR_RXBCUSEDK | SCR_TXBCUSEDK); rtl_write_byte(rtlpriv, REG_CR + 1, 0x02); RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD, "The SECR-value %x\n", sec_reg_value); rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_WPA_CONFIG, &sec_reg_value); } int rtl92ce_hw_init(struct ieee80211_hw *hw) { struct rtl_priv *rtlpriv = rtl_priv(hw); struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); struct rtl_phy *rtlphy = &(rtlpriv->phy); struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw)); bool rtstatus = true; bool is92c; int err; u8 tmp_u1b; unsigned long flags; rtlpci->being_init_adapter = true; /* Since this function can take a very long time (up to 350 ms) * and can be called with irqs disabled, reenable the irqs * to let the other devices continue being serviced. * * It is safe doing so since our own interrupts will only be enabled * in a subsequent step. */ local_save_flags(flags); local_irq_enable(); rtlhal->fw_ready = false; rtlpriv->intf_ops->disable_aspm(hw); rtstatus = _rtl92ce_init_mac(hw); if (!rtstatus) { RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Init MAC failed\n"); err = 1; goto exit; } err = rtl92c_download_fw(hw); if (err) { RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, "Failed to download FW. Init HW without FW now..\n"); err = 1; goto exit; } rtlhal->fw_ready = true; rtlhal->last_hmeboxnum = 0; rtl92c_phy_mac_config(hw); /* because last function modify RCR, so we update * rcr var here, or TP will unstable for receive_config * is wrong, RX RCR_ACRC32 will cause TP unstabel & Rx * RCR_APP_ICV will cause mac80211 unassoc for cisco 1252*/ rtlpci->receive_config = rtl_read_dword(rtlpriv, REG_RCR); rtlpci->receive_config &= ~(RCR_ACRC32 | RCR_AICV); rtl_write_dword(rtlpriv, REG_RCR, rtlpci->receive_config); rtl92c_phy_bb_config(hw); rtlphy->rf_mode = RF_OP_BY_SW_3WIRE; rtl92c_phy_rf_config(hw); if (IS_VENDOR_UMC_A_CUT(rtlhal->version) && !IS_92C_SERIAL(rtlhal->version)) { rtl_set_rfreg(hw, RF90_PATH_A, RF_RX_G1, MASKDWORD, 0x30255); rtl_set_rfreg(hw, RF90_PATH_A, RF_RX_G2, MASKDWORD, 0x50a00); } else if (IS_81XXC_VENDOR_UMC_B_CUT(rtlhal->version)) { rtl_set_rfreg(hw, RF90_PATH_A, 0x0C, MASKDWORD, 0x894AE); rtl_set_rfreg(hw, RF90_PATH_A, 0x0A, MASKDWORD, 0x1AF31); rtl_set_rfreg(hw, RF90_PATH_A, RF_IPA, MASKDWORD, 0x8F425); rtl_set_rfreg(hw, RF90_PATH_A, RF_SYN_G2, MASKDWORD, 0x4F200); rtl_set_rfreg(hw, RF90_PATH_A, RF_RCK1, MASKDWORD, 0x44053); rtl_set_rfreg(hw, RF90_PATH_A, RF_RCK2, MASKDWORD, 0x80201); } rtlphy->rfreg_chnlval[0] = rtl_get_rfreg(hw, (enum radio_path)0, RF_CHNLBW, RFREG_OFFSET_MASK); rtlphy->rfreg_chnlval[1] = rtl_get_rfreg(hw, (enum radio_path)1, RF_CHNLBW, RFREG_OFFSET_MASK); rtl_set_bbreg(hw, RFPGA0_RFMOD, BCCKEN, 0x1); rtl_set_bbreg(hw, RFPGA0_RFMOD, BOFDMEN, 0x1); rtl_set_bbreg(hw, RFPGA0_ANALOGPARAMETER2, BIT(10), 1); _rtl92ce_hw_configure(hw); rtl_cam_reset_all_entry(hw); rtl92ce_enable_hw_security_config(hw); ppsc->rfpwr_state = ERFON; rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_ETHER_ADDR, mac->mac_addr); _rtl92ce_enable_aspm_back_door(hw); rtlpriv->intf_ops->enable_aspm(hw); rtl8192ce_bt_hw_init(hw); if (ppsc->rfpwr_state == ERFON) { rtl92c_phy_set_rfpath_switch(hw, 1); if (rtlphy->iqk_initialized) { rtl92c_phy_iq_calibrate(hw, true); } else { rtl92c_phy_iq_calibrate(hw, false); rtlphy->iqk_initialized = true; } rtl92c_dm_check_txpower_tracking(hw); rtl92c_phy_lc_calibrate(hw); } is92c = IS_92C_SERIAL(rtlhal->version); tmp_u1b = efuse_read_1byte(hw, 0x1FA); if (!(tmp_u1b & BIT(0))) { rtl_set_rfreg(hw, RF90_PATH_A, 0x15, 0x0F, 0x05); RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "PA BIAS path A\n"); } if (!(tmp_u1b & BIT(1)) && is92c) { rtl_set_rfreg(hw, RF90_PATH_B, 0x15, 0x0F, 0x05); RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "PA BIAS path B\n"); } if (!(tmp_u1b & BIT(4))) { tmp_u1b = rtl_read_byte(rtlpriv, 0x16); tmp_u1b &= 0x0F; rtl_write_byte(rtlpriv, 0x16, tmp_u1b | 0x80); udelay(10); rtl_write_byte(rtlpriv, 0x16, tmp_u1b | 0x90); RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "under 1.5V\n"); } rtl92c_dm_init(hw); exit: local_irq_restore(flags); rtlpci->being_init_adapter = false; return err; } static enum version_8192c _rtl92ce_read_chip_version(struct ieee80211_hw *hw) { struct rtl_priv *rtlpriv = rtl_priv(hw); struct rtl_phy *rtlphy = &(rtlpriv->phy); enum version_8192c version = VERSION_UNKNOWN; u32 value32; const char *versionid; value32 = rtl_read_dword(rtlpriv, REG_SYS_CFG); if (value32 & TRP_VAUX_EN) { version = (value32 & TYPE_ID) ? VERSION_A_CHIP_92C : VERSION_A_CHIP_88C; } else { version = (enum version_8192c) (CHIP_VER_B | ((value32 & TYPE_ID) ? CHIP_92C_BITMASK : 0) | ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : 0)); if ((!IS_CHIP_VENDOR_UMC(version)) && (value32 & CHIP_VER_RTL_MASK)) { version = (enum version_8192c)(version | ((((value32 & CHIP_VER_RTL_MASK) == BIT(12)) ? CHIP_VENDOR_UMC_B_CUT : CHIP_UNKNOWN) | CHIP_VENDOR_UMC)); } if (IS_92C_SERIAL(version)) { value32 = rtl_read_dword(rtlpriv, REG_HPON_FSM); version = (enum version_8192c)(version | ((CHIP_BONDING_IDENTIFIER(value32) == CHIP_BONDING_92C_1T2R) ? RF_TYPE_1T2R : 0)); } } switch (version) { case VERSION_B_CHIP_92C: versionid = "B_CHIP_92C"; break; case VERSION_B_CHIP_88C: versionid = "B_CHIP_88C"; break; case VERSION_A_CHIP_92C: versionid = "A_CHIP_92C"; break; case VERSION_A_CHIP_88C: versionid = "A_CHIP_88C"; break; case VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT: versionid = "A_CUT_92C_1T2R"; break; case VERSION_NORMAL_UMC_CHIP_92C_A_CUT: versionid = "A_CUT_92C"; break; case VERSION_NORMAL_UMC_CHIP_88C_A_CUT: versionid = "A_CUT_88C"; break; case VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT: versionid = "B_CUT_92C_1T2R"; break; case VERSION_NORMAL_UMC_CHIP_92C_B_CUT: versionid = "B_CUT_92C"; break; case VERSION_NORMAL_UMC_CHIP_88C_B_CUT: versionid = "B_CUT_88C"; break; default: versionid = "Unknown. Bug?"; break; } RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, "Chip Version ID: %s\n", versionid); switch (version & 0x3) { case CHIP_88C: rtlphy->rf_type = RF_1T1R; break; case CHIP_92C: rtlphy->rf_type = RF_2T2R; break; case CHIP_92C_1T2R: rtlphy->rf_type = RF_1T2R; break; default: rtlphy->rf_type = RF_1T1R; RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "ERROR RF_Type is set!!\n"); break; } RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "Chip RF Type: %s\n", rtlphy->rf_type == RF_2T2R ? "RF_2T2R" : "RF_1T1R"); return version; } static int _rtl92ce_set_media_status(struct ieee80211_hw *hw, enum nl80211_iftype type) { struct rtl_priv *rtlpriv = rtl_priv(hw); u8 bt_msr = rtl_read_byte(rtlpriv, MSR); enum led_ctl_mode ledaction = LED_CTL_NO_LINK; u8 mode = MSR_NOLINK; bt_msr &= 0xfc; switch (type) { case NL80211_IFTYPE_UNSPECIFIED: mode = MSR_NOLINK; RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "Set Network type to NO LINK!\n"); break; case NL80211_IFTYPE_ADHOC: mode = MSR_ADHOC; RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "Set Network type to Ad Hoc!\n"); break; case NL80211_IFTYPE_STATION: mode = MSR_INFRA; ledaction = LED_CTL_LINK; RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "Set Network type to STA!\n"); break; case NL80211_IFTYPE_AP: mode = MSR_AP; ledaction = LED_CTL_LINK; RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "Set Network type to AP!\n"); break; case NL80211_IFTYPE_MESH_POINT: mode = MSR_ADHOC; RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "Set Network type to Mesh Point!\n"); break; default: RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Network type %d not supported!\n", type); return 1; } /* MSR_INFRA == Link in infrastructure network; * MSR_ADHOC == Link in ad hoc network; * Therefore, check link state is necessary. * * MSR_AP == AP mode; link state does not matter here. */ if (mode != MSR_AP && rtlpriv->mac80211.link_state < MAC80211_LINKED) { mode = MSR_NOLINK; ledaction = LED_CTL_NO_LINK; } if (mode == MSR_NOLINK || mode == MSR_INFRA) { _rtl92ce_stop_tx_beacon(hw); _rtl92ce_enable_bcn_sub_func(hw); } else if (mode == MSR_ADHOC || mode == MSR_AP) { _rtl92ce_resume_tx_beacon(hw); _rtl92ce_disable_bcn_sub_func(hw); } else { RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, "Set HW_VAR_MEDIA_STATUS: No such media status(%x).\n", mode); } rtl_write_byte(rtlpriv, MSR, bt_msr | mode); rtlpriv->cfg->ops->led_control(hw, ledaction); if (mode == MSR_AP) rtl_write_byte(rtlpriv, REG_BCNTCFG + 1, 0x00); else rtl_write_byte(rtlpriv, REG_BCNTCFG + 1, 0x66); return 0; } void rtl92ce_set_check_bssid(struct ieee80211_hw *hw, bool check_bssid) { struct rtl_priv *rtlpriv = rtl_priv(hw); u32 reg_rcr; if (rtlpriv->psc.rfpwr_state != ERFON) return; rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_RCR, (u8 *)(&reg_rcr)); if (check_bssid) { reg_rcr |= (RCR_CBSSID_DATA | RCR_CBSSID_BCN); rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR, (u8 *) (&reg_rcr)); _rtl92ce_set_bcn_ctrl_reg(hw, 0, BIT(4)); } else if (!check_bssid) { reg_rcr &= (~(RCR_CBSSID_DATA | RCR_CBSSID_BCN)); _rtl92ce_set_bcn_ctrl_reg(hw, BIT(4), 0); rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR, (u8 *) (&reg_rcr)); } } int rtl92ce_set_network_type(struct ieee80211_hw *hw, enum nl80211_iftype type) { struct rtl_priv *rtlpriv = rtl_priv(hw); if (_rtl92ce_set_media_status(hw, type)) return -EOPNOTSUPP; if (rtlpriv->mac80211.link_state == MAC80211_LINKED) { if (type != NL80211_IFTYPE_AP && type != NL80211_IFTYPE_MESH_POINT) rtl92ce_set_check_bssid(hw, true); } else { rtl92ce_set_check_bssid(hw, false); } return 0; } /* don't set REG_EDCA_BE_PARAM here because mac80211 will send pkt when scan */ void rtl92ce_set_qos(struct ieee80211_hw *hw, int aci) { struct rtl_priv *rtlpriv = rtl_priv(hw); rtl92c_dm_init_edca_turbo(hw); switch (aci) { case AC1_BK: rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, 0xa44f); break; case AC0_BE: /* rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM, u4b_ac_param); */ break; case AC2_VI: rtl_write_dword(rtlpriv, REG_EDCA_VI_PARAM, 0x5e4322); break; case AC3_VO: rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, 0x2f3222); break; default: RT_ASSERT(false, "invalid aci: %d !\n", aci); break; } } void rtl92ce_enable_interrupt(struct ieee80211_hw *hw) { struct rtl_priv *rtlpriv = rtl_priv(hw); struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); rtl_write_dword(rtlpriv, REG_HIMR, rtlpci->irq_mask[0] & 0xFFFFFFFF); rtl_write_dword(rtlpriv, REG_HIMRE, rtlpci->irq_mask[1] & 0xFFFFFFFF); rtlpci->irq_enabled = true; } void rtl92ce_disable_interrupt(struct ieee80211_hw *hw) { struct rtl_priv *rtlpriv = rtl_priv(hw); struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); rtl_write_dword(rtlpriv, REG_HIMR, IMR8190_DISABLED); rtl_write_dword(rtlpriv, REG_HIMRE, IMR8190_DISABLED); rtlpci->irq_enabled = false; } static void _rtl92ce_poweroff_adapter(struct ieee80211_hw *hw) { struct rtl_priv *rtlpriv = rtl_priv(hw); struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw); struct rtl_hal *rtlhal = rtl_hal(rtlpriv); u8 u1b_tmp; u32 u4b_tmp; rtlpriv->intf_ops->enable_aspm(hw); rtl_write_byte(rtlpriv, REG_TXPAUSE, 0xFF); rtl_set_rfreg(hw, RF90_PATH_A, 0x00, RFREG_OFFSET_MASK, 0x00); rtl_write_byte(rtlpriv, REG_RF_CTRL, 0x00); rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x40); rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE2); rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE0); if (rtl_read_byte(rtlpriv, REG_MCUFWDL) & BIT(7)) rtl92c_firmware_selfreset(hw); rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN + 1, 0x51); rtl_write_byte(rtlpriv, REG_MCUFWDL, 0x00); rtl_write_dword(rtlpriv, REG_GPIO_PIN_CTRL, 0x00000000); u1b_tmp = rtl_read_byte(rtlpriv, REG_GPIO_PIN_CTRL); if ((rtlpcipriv->bt_coexist.bt_coexistence) && ((rtlpcipriv->bt_coexist.bt_coexist_type == BT_CSR_BC4) || (rtlpcipriv->bt_coexist.bt_coexist_type == BT_CSR_BC8))) { rtl_write_dword(rtlpriv, REG_GPIO_PIN_CTRL, 0x00F30000 | (u1b_tmp << 8)); } else { rtl_write_dword(rtlpriv, REG_GPIO_PIN_CTRL, 0x00FF0000 | (u1b_tmp << 8)); } rtl_write_word(rtlpriv, REG_GPIO_IO_SEL, 0x0790); rtl_write_word(rtlpriv, REG_LEDCFG0, 0x8080); rtl_write_byte(rtlpriv, REG_AFE_PLL_CTRL, 0x80); if (!IS_81XXC_VENDOR_UMC_B_CUT(rtlhal->version)) rtl_write_byte(rtlpriv, REG_SPS0_CTRL, 0x23); if (rtlpcipriv->bt_coexist.bt_coexistence) { u4b_tmp = rtl_read_dword(rtlpriv, REG_AFE_XTAL_CTRL); u4b_tmp |= 0x03824800; rtl_write_dword(rtlpriv, REG_AFE_XTAL_CTRL, u4b_tmp); } else { rtl_write_dword(rtlpriv, REG_AFE_XTAL_CTRL, 0x0e); } rtl_write_byte(rtlpriv, REG_RSV_CTRL, 0x0e); rtl_write_byte(rtlpriv, REG_APS_FSMCO + 1, 0x10); } void rtl92ce_card_disable(struct ieee80211_hw *hw) { struct rtl_priv *rtlpriv = rtl_priv(hw); struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw)); struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); enum nl80211_iftype opmode; mac->link_state = MAC80211_NOLINK; opmode = NL80211_IFTYPE_UNSPECIFIED; _rtl92ce_set_media_status(hw, opmode); if (rtlpci->driver_is_goingto_unload || ppsc->rfoff_reason > RF_CHANGE_BY_PS) rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_OFF); RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC); _rtl92ce_poweroff_adapter(hw); /* after power off we should do iqk again */ rtlpriv->phy.iqk_initialized = false; } void rtl92ce_interrupt_recognized(struct ieee80211_hw *hw, u32 *p_inta, u32 *p_intb) { struct rtl_priv *rtlpriv = rtl_priv(hw); struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); *p_inta = rtl_read_dword(rtlpriv, ISR) & rtlpci->irq_mask[0]; rtl_write_dword(rtlpriv, ISR, *p_inta); /* * *p_intb = rtl_read_dword(rtlpriv, REG_HISRE) & rtlpci->irq_mask[1]; * rtl_write_dword(rtlpriv, ISR + 4, *p_intb); */ } void rtl92ce_set_beacon_related_registers(struct ieee80211_hw *hw) { struct rtl_priv *rtlpriv = rtl_priv(hw); struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); u16 bcn_interval, atim_window; bcn_interval = mac->beacon_interval; atim_window = 2; /*FIX MERGE */ rtl92ce_disable_interrupt(hw); rtl_write_word(rtlpriv, REG_ATIMWND, atim_window); rtl_write_word(rtlpriv, REG_BCN_INTERVAL, bcn_interval); rtl_write_word(rtlpriv, REG_BCNTCFG, 0x660f); rtl_write_byte(rtlpriv, REG_RXTSF_OFFSET_CCK, 0x18); rtl_write_byte(rtlpriv, REG_RXTSF_OFFSET_OFDM, 0x18); rtl_write_byte(rtlpriv, 0x606, 0x30); rtl92ce_enable_interrupt(hw); } void rtl92ce_set_beacon_interval(struct ieee80211_hw *hw) { struct rtl_priv *rtlpriv = rtl_priv(hw); struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); u16 bcn_interval = mac->beacon_interval; RT_TRACE(rtlpriv, COMP_BEACON, DBG_DMESG, "beacon_interval:%d\n", bcn_interval); rtl92ce_disable_interrupt(hw); rtl_write_word(rtlpriv, REG_BCN_INTERVAL, bcn_interval); rtl92ce_enable_interrupt(hw); } void rtl92ce_update_interrupt_mask(struct ieee80211_hw *hw, u32 add_msr, u32 rm_msr) { struct rtl_priv *rtlpriv = rtl_priv(hw); struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); RT_TRACE(rtlpriv, COMP_INTR, DBG_LOUD, "add_msr:%x, rm_msr:%x\n", add_msr, rm_msr); if (add_msr) rtlpci->irq_mask[0] |= add_msr; if (rm_msr) rtlpci->irq_mask[0] &= (~rm_msr); rtl92ce_disable_interrupt(hw); rtl92ce_enable_interrupt(hw); } static void _rtl92ce_read_txpower_info_from_hwpg(struct ieee80211_hw *hw, bool autoload_fail, u8 *hwinfo) { struct rtl_priv *rtlpriv = rtl_priv(hw); struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw)); u8 rf_path, index, tempval; u16 i; for (rf_path = 0; rf_path < 2; rf_path++) { for (i = 0; i < 3; i++) { if (!autoload_fail) { rtlefuse-> eeprom_chnlarea_txpwr_cck[rf_path][i] = hwinfo[EEPROM_TXPOWERCCK + rf_path * 3 + i]; rtlefuse-> eeprom_chnlarea_txpwr_ht40_1s[rf_path][i] = hwinfo[EEPROM_TXPOWERHT40_1S + rf_path * 3 + i]; } else { rtlefuse-> eeprom_chnlarea_txpwr_cck[rf_path][i] = EEPROM_DEFAULT_TXPOWERLEVEL; rtlefuse-> eeprom_chnlarea_txpwr_ht40_1s[rf_path][i] = EEPROM_DEFAULT_TXPOWERLEVEL; } } } for (i = 0; i < 3; i++) { if (!autoload_fail) tempval = hwinfo[EEPROM_TXPOWERHT40_2SDIFF + i]; else tempval = EEPROM_DEFAULT_HT40_2SDIFF; rtlefuse->eprom_chnl_txpwr_ht40_2sdf[RF90_PATH_A][i] = (tempval & 0xf); rtlefuse->eprom_chnl_txpwr_ht40_2sdf[RF90_PATH_B][i] = ((tempval & 0xf0) >> 4); } for (rf_path = 0; rf_path < 2; rf_path++) for (i = 0; i < 3; i++) RTPRINT(rtlpriv, FINIT, INIT_EEPROM, "RF(%d) EEPROM CCK Area(%d) = 0x%x\n", rf_path, i, rtlefuse-> eeprom_chnlarea_txpwr_cck[rf_path][i]); for (rf_path = 0; rf_path < 2; rf_path++) for (i = 0; i < 3; i++) RTPRINT(rtlpriv, FINIT, INIT_EEPROM, "RF(%d) EEPROM HT40 1S Area(%d) = 0x%x\n", rf_path, i, rtlefuse-> eeprom_chnlarea_txpwr_ht40_1s[rf_path][i]); for (rf_path = 0; rf_path < 2; rf_path++) for (i = 0; i < 3; i++) RTPRINT(rtlpriv, FINIT, INIT_EEPROM, "RF(%d) EEPROM HT40 2S Diff Area(%d) = 0x%x\n", rf_path, i, rtlefuse-> eprom_chnl_txpwr_ht40_2sdf[rf_path][i]); for (rf_path = 0; rf_path < 2; rf_path++) { for (i = 0; i < 14; i++) { index = rtl92c_get_chnl_group((u8)i); rtlefuse->txpwrlevel_cck[rf_path][i] = rtlefuse->eeprom_chnlarea_txpwr_cck[rf_path][index]; rtlefuse->txpwrlevel_ht40_1s[rf_path][i] = rtlefuse-> eeprom_chnlarea_txpwr_ht40_1s[rf_path][index]; if ((rtlefuse-> eeprom_chnlarea_txpwr_ht40_1s[rf_path][index] - rtlefuse-> eprom_chnl_txpwr_ht40_2sdf[rf_path][index]) > 0) { rtlefuse->txpwrlevel_ht40_2s[rf_path][i] = rtlefuse-> eeprom_chnlarea_txpwr_ht40_1s[rf_path] [index] - rtlefuse-> eprom_chnl_txpwr_ht40_2sdf[rf_path] [index]; } else { rtlefuse->txpwrlevel_ht40_2s[rf_path][i] = 0; } } for (i = 0; i < 14; i++) { RTPRINT(rtlpriv, FINIT, INIT_TXPOWER, "RF(%d)-Ch(%d) [CCK / HT40_1S / HT40_2S] = [0x%x / 0x%x / 0x%x]\n", rf_path, i, rtlefuse->txpwrlevel_cck[rf_path][i], rtlefuse->txpwrlevel_ht40_1s[rf_path][i], rtlefuse->txpwrlevel_ht40_2s[rf_path][i]); } } for (i = 0; i < 3; i++) { if (!autoload_fail) { rtlefuse->eeprom_pwrlimit_ht40[i] = hwinfo[EEPROM_TXPWR_GROUP + i]; rtlefuse->eeprom_pwrlimit_ht20[i] = hwinfo[EEPROM_TXPWR_GROUP + 3 + i]; } else { rtlefuse->eeprom_pwrlimit_ht40[i] = 0; rtlefuse->eeprom_pwrlimit_ht20[i] = 0; } } for (rf_path = 0; rf_path < 2; rf_path++) { for (i = 0; i < 14; i++) { index = rtl92c_get_chnl_group((u8)i); if (rf_path == RF90_PATH_A) { rtlefuse->pwrgroup_ht20[rf_path][i] = (rtlefuse->eeprom_pwrlimit_ht20[index] & 0xf); rtlefuse->pwrgroup_ht40[rf_path][i] = (rtlefuse->eeprom_pwrlimit_ht40[index] & 0xf); } else if (rf_path == RF90_PATH_B) { rtlefuse->pwrgroup_ht20[rf_path][i] = ((rtlefuse->eeprom_pwrlimit_ht20[index] & 0xf0) >> 4); rtlefuse->pwrgroup_ht40[rf_path][i] = ((rtlefuse->eeprom_pwrlimit_ht40[index] & 0xf0) >> 4); } RTPRINT(rtlpriv, FINIT, INIT_TXPOWER, "RF-%d pwrgroup_ht20[%d] = 0x%x\n", rf_path, i, rtlefuse->pwrgroup_ht20[rf_path][i]); RTPRINT(rtlpriv, FINIT, INIT_TXPOWER, "RF-%d pwrgroup_ht40[%d] = 0x%x\n", rf_path, i, rtlefuse->pwrgroup_ht40[rf_path][i]); } } for (i = 0; i < 14; i++) { index = rtl92c_get_chnl_group((u8)i); if (!autoload_fail) tempval = hwinfo[EEPROM_TXPOWERHT20DIFF + index]; else tempval = EEPROM_DEFAULT_HT20_DIFF; rtlefuse->txpwr_ht20diff[RF90_PATH_A][i] = (tempval & 0xF); rtlefuse->txpwr_ht20diff[RF90_PATH_B][i] = ((tempval >> 4) & 0xF); if (rtlefuse->txpwr_ht20diff[RF90_PATH_A][i] & BIT(3)) rtlefuse->txpwr_ht20diff[RF90_PATH_A][i] |= 0xF0; if (rtlefuse->txpwr_ht20diff[RF90_PATH_B][i] & BIT(3)) rtlefuse->txpwr_ht20diff[RF90_PATH_B][i] |= 0xF0; index = rtl92c_get_chnl_group((u8)i); if (!autoload_fail) tempval = hwinfo[EEPROM_TXPOWER_OFDMDIFF + index]; else tempval = EEPROM_DEFAULT_LEGACYHTTXPOWERDIFF; rtlefuse->txpwr_legacyhtdiff[RF90_PATH_A][i] = (tempval & 0xF); rtlefuse->txpwr_legacyhtdiff[RF90_PATH_B][i] = ((tempval >> 4) & 0xF); } rtlefuse->legacy_ht_txpowerdiff = rtlefuse->txpwr_legacyhtdiff[RF90_PATH_A][7]; for (i = 0; i < 14; i++) RTPRINT(rtlpriv, FINIT, INIT_TXPOWER, "RF-A Ht20 to HT40 Diff[%d] = 0x%x\n", i, rtlefuse->txpwr_ht20diff[RF90_PATH_A][i]); for (i = 0; i < 14; i++) RTPRINT(rtlpriv, FINIT, INIT_TXPOWER, "RF-A Legacy to Ht40 Diff[%d] = 0x%x\n", i, rtlefuse->txpwr_legacyhtdiff[RF90_PATH_A][i]); for (i = 0; i < 14; i++) RTPRINT(rtlpriv, FINIT, INIT_TXPOWER, "RF-B Ht20 to HT40 Diff[%d] = 0x%x\n", i, rtlefuse->txpwr_ht20diff[RF90_PATH_B][i]); for (i = 0; i < 14; i++) RTPRINT(rtlpriv, FINIT, INIT_TXPOWER, "RF-B Legacy to HT40 Diff[%d] = 0x%x\n", i, rtlefuse->txpwr_legacyhtdiff[RF90_PATH_B][i]); if (!autoload_fail) rtlefuse->eeprom_regulatory = (hwinfo[RF_OPTION1] & 0x7); else rtlefuse->eeprom_regulatory = 0; RTPRINT(rtlpriv, FINIT, INIT_TXPOWER, "eeprom_regulatory = 0x%x\n", rtlefuse->eeprom_regulatory); if (!autoload_fail) { rtlefuse->eeprom_tssi[RF90_PATH_A] = hwinfo[EEPROM_TSSI_A]; rtlefuse->eeprom_tssi[RF90_PATH_B] = hwinfo[EEPROM_TSSI_B]; } else { rtlefuse->eeprom_tssi[RF90_PATH_A] = EEPROM_DEFAULT_TSSI; rtlefuse->eeprom_tssi[RF90_PATH_B] = EEPROM_DEFAULT_TSSI; } RTPRINT(rtlpriv, FINIT, INIT_TXPOWER, "TSSI_A = 0x%x, TSSI_B = 0x%x\n", rtlefuse->eeprom_tssi[RF90_PATH_A], rtlefuse->eeprom_tssi[RF90_PATH_B]); if (!autoload_fail) tempval = hwinfo[EEPROM_THERMAL_METER]; else tempval = EEPROM_DEFAULT_THERMALMETER; rtlefuse->eeprom_thermalmeter = (tempval & 0x1f); if (rtlefuse->eeprom_thermalmeter == 0x1f || autoload_fail) rtlefuse->apk_thermalmeterignore = true; rtlefuse->thermalmeter[0] = rtlefuse->eeprom_thermalmeter; RTPRINT(rtlpriv, FINIT, INIT_TXPOWER, "thermalmeter = 0x%x\n", rtlefuse->eeprom_thermalmeter); } static void _rtl92ce_read_adapter_info(struct ieee80211_hw *hw) { struct rtl_priv *rtlpriv = rtl_priv(hw); struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw)); struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); u16 i, usvalue; u8 hwinfo[HWSET_MAX_SIZE]; u16 eeprom_id; if (rtlefuse->epromtype == EEPROM_BOOT_EFUSE) { rtl_efuse_shadow_map_update(hw); memcpy((void *)hwinfo, (void *)&rtlefuse->efuse_map[EFUSE_INIT_MAP][0], HWSET_MAX_SIZE); } else if (rtlefuse->epromtype == EEPROM_93C46) { RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "RTL819X Not boot from eeprom, check it !!"); } RT_PRINT_DATA(rtlpriv, COMP_INIT, DBG_DMESG, "MAP", hwinfo, HWSET_MAX_SIZE); eeprom_id = *((u16 *)&hwinfo[0]); if (eeprom_id != RTL8190_EEPROM_ID) { RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, "EEPROM ID(%#x) is invalid!!\n", eeprom_id); rtlefuse->autoload_failflag = true; } else { RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "Autoload OK\n"); rtlefuse->autoload_failflag = false; } if (rtlefuse->autoload_failflag) return; rtlefuse->eeprom_vid = *(u16 *)&hwinfo[EEPROM_VID]; rtlefuse->eeprom_did = *(u16 *)&hwinfo[EEPROM_DID]; rtlefuse->eeprom_svid = *(u16 *)&hwinfo[EEPROM_SVID]; rtlefuse->eeprom_smid = *(u16 *)&hwinfo[EEPROM_SMID]; RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "EEPROMId = 0x%4x\n", eeprom_id); RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "EEPROM VID = 0x%4x\n", rtlefuse->eeprom_vid); RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "EEPROM DID = 0x%4x\n", rtlefuse->eeprom_did); RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "EEPROM SVID = 0x%4x\n", rtlefuse->eeprom_svid); RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "EEPROM SMID = 0x%4x\n", rtlefuse->eeprom_smid); for (i = 0; i < 6; i += 2) { usvalue = *(u16 *)&hwinfo[EEPROM_MAC_ADDR + i]; *((u16 *) (&rtlefuse->dev_addr[i])) = usvalue; } RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "%pM\n", rtlefuse->dev_addr); _rtl92ce_read_txpower_info_from_hwpg(hw, rtlefuse->autoload_failflag, hwinfo); rtl8192ce_read_bt_coexist_info_from_hwpg(hw, rtlefuse->autoload_failflag, hwinfo); rtlefuse->eeprom_channelplan = *&hwinfo[EEPROM_CHANNELPLAN]; rtlefuse->eeprom_version = *(u16 *)&hwinfo[EEPROM_VERSION]; rtlefuse->txpwr_fromeprom = true; rtlefuse->eeprom_oemid = *&hwinfo[EEPROM_CUSTOMER_ID]; RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "EEPROM Customer ID: 0x%2x\n", rtlefuse->eeprom_oemid); /* set channel paln to world wide 13 */ rtlefuse->channel_plan = COUNTRY_CODE_WORLD_WIDE_13; if (rtlhal->oem_id == RT_CID_DEFAULT) { switch (rtlefuse->eeprom_oemid) { case EEPROM_CID_DEFAULT: if (rtlefuse->eeprom_did == 0x8176) { if ((rtlefuse->eeprom_svid == 0x103C && rtlefuse->eeprom_smid == 0x1629)) rtlhal->oem_id = RT_CID_819X_HP; else rtlhal->oem_id = RT_CID_DEFAULT; } else { rtlhal->oem_id = RT_CID_DEFAULT; } break; case EEPROM_CID_TOSHIBA: rtlhal->oem_id = RT_CID_TOSHIBA; break; case EEPROM_CID_QMI: rtlhal->oem_id = RT_CID_819X_QMI; break; case EEPROM_CID_WHQL: default: rtlhal->oem_id = RT_CID_DEFAULT; break; } } } static void _rtl92ce_hal_customized_behavior(struct ieee80211_hw *hw) { struct rtl_priv *rtlpriv = rtl_priv(hw); struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw); struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); switch (rtlhal->oem_id) { case RT_CID_819X_HP: pcipriv->ledctl.led_opendrain = true; break; case RT_CID_819X_LENOVO: case RT_CID_DEFAULT: case RT_CID_TOSHIBA: case RT_CID_CCX: case RT_CID_819X_ACER: case RT_CID_WHQL: default: break; } RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "RT Customized ID: 0x%02X\n", rtlhal->oem_id); } void rtl92ce_read_eeprom_info(struct ieee80211_hw *hw) { struct rtl_priv *rtlpriv = rtl_priv(hw); struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw)); struct rtl_phy *rtlphy = &(rtlpriv->phy); struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); u8 tmp_u1b; rtlhal->version = _rtl92ce_read_chip_version(hw); if (get_rf_type(rtlphy) == RF_1T1R) rtlpriv->dm.rfpath_rxenable[0] = true; else rtlpriv->dm.rfpath_rxenable[0] = rtlpriv->dm.rfpath_rxenable[1] = true; RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "VersionID = 0x%4x\n", rtlhal->version); tmp_u1b = rtl_read_byte(rtlpriv, REG_9346CR); if (tmp_u1b & BIT(4)) { RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "Boot from EEPROM\n"); rtlefuse->epromtype = EEPROM_93C46; } else { RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "Boot from EFUSE\n"); rtlefuse->epromtype = EEPROM_BOOT_EFUSE; } if (tmp_u1b & BIT(5)) { RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "Autoload OK\n"); rtlefuse->autoload_failflag = false; _rtl92ce_read_adapter_info(hw); } else { RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Autoload ERR!!\n"); } _rtl92ce_hal_customized_behavior(hw); } static void rtl92ce_update_hal_rate_table(struct ieee80211_hw *hw, struct ieee80211_sta *sta) { struct rtl_priv *rtlpriv = rtl_priv(hw); struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw); struct rtl_phy *rtlphy = &(rtlpriv->phy); struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); u32 ratr_value; u8 ratr_index = 0; u8 nmode = mac->ht_enable; u16 shortgi_rate; u32 tmp_ratr_value; u8 curtxbw_40mhz = mac->bw_40; u8 curshortgi_40mhz = (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40) ? 1 : 0; u8 curshortgi_20mhz = (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20) ? 1 : 0; enum wireless_mode wirelessmode = mac->mode; u32 ratr_mask; if (rtlhal->current_bandtype == BAND_ON_5G) ratr_value = sta->supp_rates[1] << 4; else ratr_value = sta->supp_rates[0]; if (mac->opmode == NL80211_IFTYPE_ADHOC) ratr_value = 0xfff; ratr_value |= (sta->ht_cap.mcs.rx_mask[1] << 20 | sta->ht_cap.mcs.rx_mask[0] << 12); switch (wirelessmode) { case WIRELESS_MODE_B: if (ratr_value & 0x0000000c) ratr_value &= 0x0000000d; else ratr_value &= 0x0000000f; break; case WIRELESS_MODE_G: ratr_value &= 0x00000FF5; break; case WIRELESS_MODE_N_24G: case WIRELESS_MODE_N_5G: nmode = 1; if (get_rf_type(rtlphy) == RF_1T2R || get_rf_type(rtlphy) == RF_1T1R) ratr_mask = 0x000ff005; else ratr_mask = 0x0f0ff005; ratr_value &= ratr_mask; break; default: if (rtlphy->rf_type == RF_1T2R) ratr_value &= 0x000ff0ff; else ratr_value &= 0x0f0ff0ff; break; } if ((rtlpcipriv->bt_coexist.bt_coexistence) && (rtlpcipriv->bt_coexist.bt_coexist_type == BT_CSR_BC4) && (rtlpcipriv->bt_coexist.bt_cur_state) && (rtlpcipriv->bt_coexist.bt_ant_isolation) && ((rtlpcipriv->bt_coexist.bt_service == BT_SCO) || (rtlpcipriv->bt_coexist.bt_service == BT_BUSY))) ratr_value &= 0x0fffcfc0; else ratr_value &= 0x0FFFFFFF; if (nmode && ((curtxbw_40mhz && curshortgi_40mhz) || (!curtxbw_40mhz && curshortgi_20mhz))) { ratr_value |= 0x10000000; tmp_ratr_value = (ratr_value >> 12); for (shortgi_rate = 15; shortgi_rate > 0; shortgi_rate--) { if ((1 << shortgi_rate) & tmp_ratr_value) break; } shortgi_rate = (shortgi_rate << 12) | (shortgi_rate << 8) | (shortgi_rate << 4) | (shortgi_rate); } rtl_write_dword(rtlpriv, REG_ARFR0 + ratr_index * 4, ratr_value); RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, "%x\n", rtl_read_dword(rtlpriv, REG_ARFR0)); } static void rtl92ce_update_hal_rate_mask(struct ieee80211_hw *hw, struct ieee80211_sta *sta, u8 rssi_level) { struct rtl_priv *rtlpriv = rtl_priv(hw); struct rtl_phy *rtlphy = &(rtlpriv->phy); struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); struct rtl_sta_info *sta_entry = NULL; u32 ratr_bitmap; u8 ratr_index; u8 curtxbw_40mhz = (sta->ht_cap.cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40) ? 1 : 0; u8 curshortgi_40mhz = (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40) ? 1 : 0; u8 curshortgi_20mhz = (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20) ? 1 : 0; enum wireless_mode wirelessmode = 0; bool shortgi = false; u8 rate_mask[5]; u8 macid = 0; sta_entry = (struct rtl_sta_info *) sta->drv_priv; wirelessmode = sta_entry->wireless_mode; if (mac->opmode == NL80211_IFTYPE_STATION || mac->opmode == NL80211_IFTYPE_MESH_POINT) curtxbw_40mhz = mac->bw_40; else if (mac->opmode == NL80211_IFTYPE_AP || mac->opmode == NL80211_IFTYPE_ADHOC) macid = sta->aid + 1; if (rtlhal->current_bandtype == BAND_ON_5G) ratr_bitmap = sta->supp_rates[1] << 4; else ratr_bitmap = sta->supp_rates[0]; if (mac->opmode == NL80211_IFTYPE_ADHOC) ratr_bitmap = 0xfff; ratr_bitmap |= (sta->ht_cap.mcs.rx_mask[1] << 20 | sta->ht_cap.mcs.rx_mask[0] << 12); switch (wirelessmode) { case WIRELESS_MODE_B: ratr_index = RATR_INX_WIRELESS_B; if (ratr_bitmap & 0x0000000c) ratr_bitmap &= 0x0000000d; else ratr_bitmap &= 0x0000000f; break; case WIRELESS_MODE_G: ratr_index = RATR_INX_WIRELESS_GB; if (rssi_level == 1) ratr_bitmap &= 0x00000f00; else if (rssi_level == 2) ratr_bitmap &= 0x00000ff0; else ratr_bitmap &= 0x00000ff5; break; case WIRELESS_MODE_A: ratr_index = RATR_INX_WIRELESS_A; ratr_bitmap &= 0x00000ff0; break; case WIRELESS_MODE_N_24G: case WIRELESS_MODE_N_5G: ratr_index = RATR_INX_WIRELESS_NGB; if (rtlphy->rf_type == RF_1T2R || rtlphy->rf_type == RF_1T1R) { if (curtxbw_40mhz) { if (rssi_level == 1) ratr_bitmap &= 0x000f0000; else if (rssi_level == 2) ratr_bitmap &= 0x000ff000; else ratr_bitmap &= 0x000ff015; } else { if (rssi_level == 1) ratr_bitmap &= 0x000f0000; else if (rssi_level == 2) ratr_bitmap &= 0x000ff000; else ratr_bitmap &= 0x000ff005; } } else { if (curtxbw_40mhz) { if (rssi_level == 1) ratr_bitmap &= 0x0f0f0000; else if (rssi_level == 2) ratr_bitmap &= 0x0f0ff000; else ratr_bitmap &= 0x0f0ff015; } else { if (rssi_level == 1) ratr_bitmap &= 0x0f0f0000; else if (rssi_level == 2) ratr_bitmap &= 0x0f0ff000; else ratr_bitmap &= 0x0f0ff005; } } if ((curtxbw_40mhz && curshortgi_40mhz) || (!curtxbw_40mhz && curshortgi_20mhz)) { if (macid == 0) shortgi = true; else if (macid == 1) shortgi = false; } break; default: ratr_index = RATR_INX_WIRELESS_NGB; if (rtlphy->rf_type == RF_1T2R) ratr_bitmap &= 0x000ff0ff; else ratr_bitmap &= 0x0f0ff0ff; break; } sta_entry->ratr_index = ratr_index; RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, "ratr_bitmap :%x\n", ratr_bitmap); *(u32 *)&rate_mask = (ratr_bitmap & 0x0fffffff) | (ratr_index << 28); rate_mask[4] = macid | (shortgi ? 0x20 : 0x00) | 0x80; RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, "Rate_index:%x, ratr_val:%x, %5phC\n", ratr_index, ratr_bitmap, rate_mask); rtl92c_fill_h2c_cmd(hw, H2C_RA_MASK, 5, rate_mask); } void rtl92ce_update_hal_rate_tbl(struct ieee80211_hw *hw, struct ieee80211_sta *sta, u8 rssi_level) { struct rtl_priv *rtlpriv = rtl_priv(hw); if (rtlpriv->dm.useramask) rtl92ce_update_hal_rate_mask(hw, sta, rssi_level); else rtl92ce_update_hal_rate_table(hw, sta); } void rtl92ce_update_channel_access_setting(struct ieee80211_hw *hw) { struct rtl_priv *rtlpriv = rtl_priv(hw); struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); u16 sifs_timer; rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SLOT_TIME, &mac->slot_time); if (!mac->ht_enable) sifs_timer = 0x0a0a; else sifs_timer = 0x1010; rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SIFS, (u8 *)&sifs_timer); } bool rtl92ce_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 *valid) { struct rtl_priv *rtlpriv = rtl_priv(hw); struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw)); struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); enum rf_pwrstate e_rfpowerstate_toset; u8 u1tmp; bool actuallyset = false; unsigned long flag; if (rtlpci->being_init_adapter) return false; if (ppsc->swrf_processing) return false; spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flag); if (ppsc->rfchange_inprogress) { spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag); return false; } else { ppsc->rfchange_inprogress = true; spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag); } rtl_write_byte(rtlpriv, REG_MAC_PINMUX_CFG, rtl_read_byte(rtlpriv, REG_MAC_PINMUX_CFG)&~(BIT(3))); u1tmp = rtl_read_byte(rtlpriv, REG_GPIO_IO_SEL); e_rfpowerstate_toset = (u1tmp & BIT(3)) ? ERFON : ERFOFF; if ((ppsc->hwradiooff) && (e_rfpowerstate_toset == ERFON)) { RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG, "GPIOChangeRF - HW Radio ON, RF ON\n"); e_rfpowerstate_toset = ERFON; ppsc->hwradiooff = false; actuallyset = true; } else if (!ppsc->hwradiooff && (e_rfpowerstate_toset == ERFOFF)) { RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG, "GPIOChangeRF - HW Radio OFF, RF OFF\n"); e_rfpowerstate_toset = ERFOFF; ppsc->hwradiooff = true; actuallyset = true; } if (actuallyset) { spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flag); ppsc->rfchange_inprogress = false; spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag); } else { if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_HALT_NIC) RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC); spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flag); ppsc->rfchange_inprogress = false; spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag); } *valid = 1; return !ppsc->hwradiooff; } void rtl92ce_set_key(struct ieee80211_hw *hw, u32 key_index, u8 *p_macaddr, bool is_group, u8 enc_algo, bool is_wepkey, bool clear_all) { struct rtl_priv *rtlpriv = rtl_priv(hw); struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw)); u8 *macaddr = p_macaddr; u32 entry_id = 0; bool is_pairwise = false; static u8 cam_const_addr[4][6] = { {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, {0x00, 0x00, 0x00, 0x00, 0x00, 0x01}, {0x00, 0x00, 0x00, 0x00, 0x00, 0x02}, {0x00, 0x00, 0x00, 0x00, 0x00, 0x03} }; static u8 cam_const_broad[] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; if (clear_all) { u8 idx = 0; u8 cam_offset = 0; u8 clear_number = 5; RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, "clear_all\n"); for (idx = 0; idx < clear_number; idx++) { rtl_cam_mark_invalid(hw, cam_offset + idx); rtl_cam_empty_entry(hw, cam_offset + idx); if (idx < 5) { memset(rtlpriv->sec.key_buf[idx], 0, MAX_KEY_LEN); rtlpriv->sec.key_len[idx] = 0; } } } else { switch (enc_algo) { case WEP40_ENCRYPTION: enc_algo = CAM_WEP40; break; case WEP104_ENCRYPTION: enc_algo = CAM_WEP104; break; case TKIP_ENCRYPTION: enc_algo = CAM_TKIP; break; case AESCCMP_ENCRYPTION: enc_algo = CAM_AES; break; default: RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "switch case not processed\n"); enc_algo = CAM_TKIP; break; } if (is_wepkey || rtlpriv->sec.use_defaultkey) { macaddr = cam_const_addr[key_index]; entry_id = key_index; } else { if (is_group) { macaddr = cam_const_broad; entry_id = key_index; } else { if (mac->opmode == NL80211_IFTYPE_AP || mac->opmode == NL80211_IFTYPE_MESH_POINT) { entry_id = rtl_cam_get_free_entry(hw, p_macaddr); if (entry_id >= TOTAL_CAM_ENTRY) { RT_TRACE(rtlpriv, COMP_SEC, DBG_EMERG, "Can not find free hw security cam entry\n"); return; } } else { entry_id = CAM_PAIRWISE_KEY_POSITION; } key_index = PAIRWISE_KEYIDX; is_pairwise = true; } } if (rtlpriv->sec.key_len[key_index] == 0) { RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, "delete one entry, entry_id is %d\n", entry_id); if (mac->opmode == NL80211_IFTYPE_AP || mac->opmode == NL80211_IFTYPE_MESH_POINT) rtl_cam_del_entry(hw, p_macaddr); rtl_cam_delete_one_entry(hw, p_macaddr, entry_id); } else { RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD, "The insert KEY length is %d\n", rtlpriv->sec.key_len[PAIRWISE_KEYIDX]); RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD, "The insert KEY is %x %x\n", rtlpriv->sec.key_buf[0][0], rtlpriv->sec.key_buf[0][1]); RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, "add one entry\n"); if (is_pairwise) { RT_PRINT_DATA(rtlpriv, COMP_SEC, DBG_LOUD, "Pairwise Key content", rtlpriv->sec.pairwise_key, rtlpriv->sec. key_len[PAIRWISE_KEYIDX]); RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, "set Pairwise key\n"); rtl_cam_add_one_entry(hw, macaddr, key_index, entry_id, enc_algo, CAM_CONFIG_NO_USEDK, rtlpriv->sec. key_buf[key_index]); } else { RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, "set group key\n"); if (mac->opmode == NL80211_IFTYPE_ADHOC) { rtl_cam_add_one_entry(hw, rtlefuse->dev_addr, PAIRWISE_KEYIDX, CAM_PAIRWISE_KEY_POSITION, enc_algo, CAM_CONFIG_NO_USEDK, rtlpriv->sec.key_buf [entry_id]); } rtl_cam_add_one_entry(hw, macaddr, key_index, entry_id, enc_algo, CAM_CONFIG_NO_USEDK, rtlpriv->sec.key_buf[entry_id]); } } } } static void rtl8192ce_bt_var_init(struct ieee80211_hw *hw) { struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw); rtlpcipriv->bt_coexist.bt_coexistence = rtlpcipriv->bt_coexist.eeprom_bt_coexist; rtlpcipriv->bt_coexist.bt_ant_num = rtlpcipriv->bt_coexist.eeprom_bt_ant_num; rtlpcipriv->bt_coexist.bt_coexist_type = rtlpcipriv->bt_coexist.eeprom_bt_type; if (rtlpcipriv->bt_coexist.reg_bt_iso == 2) rtlpcipriv->bt_coexist.bt_ant_isolation = rtlpcipriv->bt_coexist.eeprom_bt_ant_isol; else rtlpcipriv->bt_coexist.bt_ant_isolation = rtlpcipriv->bt_coexist.reg_bt_iso; rtlpcipriv->bt_coexist.bt_radio_shared_type = rtlpcipriv->bt_coexist.eeprom_bt_radio_shared; if (rtlpcipriv->bt_coexist.bt_coexistence) { if (rtlpcipriv->bt_coexist.reg_bt_sco == 1) rtlpcipriv->bt_coexist.bt_service = BT_OTHER_ACTION; else if (rtlpcipriv->bt_coexist.reg_bt_sco == 2) rtlpcipriv->bt_coexist.bt_service = BT_SCO; else if (rtlpcipriv->bt_coexist.reg_bt_sco == 4) rtlpcipriv->bt_coexist.bt_service = BT_BUSY; else if (rtlpcipriv->bt_coexist.reg_bt_sco == 5) rtlpcipriv->bt_coexist.bt_service = BT_OTHERBUSY; else rtlpcipriv->bt_coexist.bt_service = BT_IDLE; rtlpcipriv->bt_coexist.bt_edca_ul = 0; rtlpcipriv->bt_coexist.bt_edca_dl = 0; rtlpcipriv->bt_coexist.bt_rssi_state = 0xff; } } void rtl8192ce_read_bt_coexist_info_from_hwpg(struct ieee80211_hw *hw, bool auto_load_fail, u8 *hwinfo) { struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw); u8 val; if (!auto_load_fail) { rtlpcipriv->bt_coexist.eeprom_bt_coexist = ((hwinfo[RF_OPTION1] & 0xe0) >> 5); val = hwinfo[RF_OPTION4]; rtlpcipriv->bt_coexist.eeprom_bt_type = ((val & 0xe) >> 1); rtlpcipriv->bt_coexist.eeprom_bt_ant_num = (val & 0x1); rtlpcipriv->bt_coexist.eeprom_bt_ant_isol = ((val & 0x10) >> 4); rtlpcipriv->bt_coexist.eeprom_bt_radio_shared = ((val & 0x20) >> 5); } else { rtlpcipriv->bt_coexist.eeprom_bt_coexist = 0; rtlpcipriv->bt_coexist.eeprom_bt_type = BT_2WIRE; rtlpcipriv->bt_coexist.eeprom_bt_ant_num = ANT_X2; rtlpcipriv->bt_coexist.eeprom_bt_ant_isol = 0; rtlpcipriv->bt_coexist.eeprom_bt_radio_shared = BT_RADIO_SHARED; } rtl8192ce_bt_var_init(hw); } void rtl8192ce_bt_reg_init(struct ieee80211_hw *hw) { struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw); /* 0:Low, 1:High, 2:From Efuse. */ rtlpcipriv->bt_coexist.reg_bt_iso = 2; /* 0:Idle, 1:None-SCO, 2:SCO, 3:From Counter. */ rtlpcipriv->bt_coexist.reg_bt_sco = 3; /* 0:Disable BT control A-MPDU, 1:Enable BT control A-MPDU. */ rtlpcipriv->bt_coexist.reg_bt_sco = 0; } void rtl8192ce_bt_hw_init(struct ieee80211_hw *hw) { struct rtl_priv *rtlpriv = rtl_priv(hw); struct rtl_phy *rtlphy = &(rtlpriv->phy); struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw); u8 u1_tmp; if (rtlpcipriv->bt_coexist.bt_coexistence && ((rtlpcipriv->bt_coexist.bt_coexist_type == BT_CSR_BC4) || rtlpcipriv->bt_coexist.bt_coexist_type == BT_CSR_BC8)) { if (rtlpcipriv->bt_coexist.bt_ant_isolation) rtl_write_byte(rtlpriv, REG_GPIO_MUXCFG, 0xa0); u1_tmp = rtl_read_byte(rtlpriv, 0x4fd) & BIT_OFFSET_LEN_MASK_32(0, 1); u1_tmp = u1_tmp | ((rtlpcipriv->bt_coexist.bt_ant_isolation == 1) ? 0 : BIT_OFFSET_LEN_MASK_32(1, 1)) | ((rtlpcipriv->bt_coexist.bt_service == BT_SCO) ? 0 : BIT_OFFSET_LEN_MASK_32(2, 1)); rtl_write_byte(rtlpriv, 0x4fd, u1_tmp); rtl_write_dword(rtlpriv, REG_BT_COEX_TABLE+4, 0xaaaa9aaa); rtl_write_dword(rtlpriv, REG_BT_COEX_TABLE+8, 0xffbd0040); rtl_write_dword(rtlpriv, REG_BT_COEX_TABLE+0xc, 0x40000010); /* Config to 1T1R. */ if (rtlphy->rf_type == RF_1T1R) { u1_tmp = rtl_read_byte(rtlpriv, ROFDM0_TRXPATHENABLE); u1_tmp &= ~(BIT_OFFSET_LEN_MASK_32(1, 1)); rtl_write_byte(rtlpriv, ROFDM0_TRXPATHENABLE, u1_tmp); u1_tmp = rtl_read_byte(rtlpriv, ROFDM1_TRXPATHENABLE); u1_tmp &= ~(BIT_OFFSET_LEN_MASK_32(1, 1)); rtl_write_byte(rtlpriv, ROFDM1_TRXPATHENABLE, u1_tmp); } } } void rtl92ce_suspend(struct ieee80211_hw *hw) { } void rtl92ce_resume(struct ieee80211_hw *hw) { }
gpl-2.0
Timesys/linux-timesys
drivers/char/tpm/tpm.c
1428
30343
/* * Copyright (C) 2004 IBM Corporation * * Authors: * Leendert van Doorn <leendert@watson.ibm.com> * Dave Safford <safford@watson.ibm.com> * Reiner Sailer <sailer@watson.ibm.com> * Kylene Hall <kjhall@us.ibm.com> * * Maintained by: <tpmdd-devel@lists.sourceforge.net> * * Device driver for TCG/TCPA TPM (trusted platform module). * Specifications at www.trustedcomputinggroup.org * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation, version 2 of the * License. * * Note, the TPM chip is not interrupt driven (only polling) * and can have very long timeouts (minutes!). Hence the unusual * calls to msleep. * */ #include <linux/poll.h> #include <linux/slab.h> #include <linux/mutex.h> #include <linux/spinlock.h> #include "tpm.h" enum tpm_const { TPM_MINOR = 224, /* officially assigned */ TPM_BUFSIZE = 4096, TPM_NUM_DEVICES = 256, }; enum tpm_duration { TPM_SHORT = 0, TPM_MEDIUM = 1, TPM_LONG = 2, TPM_UNDEFINED, }; #define TPM_MAX_ORDINAL 243 #define TPM_MAX_PROTECTED_ORDINAL 12 #define TPM_PROTECTED_ORDINAL_MASK 0xFF /* * Bug workaround - some TPM's don't flush the most * recently changed pcr on suspend, so force the flush * with an extend to the selected _unused_ non-volatile pcr. */ static int tpm_suspend_pcr; module_param_named(suspend_pcr, tpm_suspend_pcr, uint, 0644); MODULE_PARM_DESC(suspend_pcr, "PCR to use for dummy writes to faciltate flush on suspend."); static LIST_HEAD(tpm_chip_list); static DEFINE_SPINLOCK(driver_lock); static DECLARE_BITMAP(dev_mask, TPM_NUM_DEVICES); /* * Array with one entry per ordinal defining the maximum amount * of time the chip could take to return the result. The ordinal * designation of short, medium or long is defined in a table in * TCG Specification TPM Main Part 2 TPM Structures Section 17. The * values of the SHORT, MEDIUM, and LONG durations are retrieved * from the chip during initialization with a call to tpm_get_timeouts. */ static const u8 tpm_protected_ordinal_duration[TPM_MAX_PROTECTED_ORDINAL] = { TPM_UNDEFINED, /* 0 */ TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, /* 5 */ TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_SHORT, /* 10 */ TPM_SHORT, }; static const u8 tpm_ordinal_duration[TPM_MAX_ORDINAL] = { TPM_UNDEFINED, /* 0 */ TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, /* 5 */ TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_SHORT, /* 10 */ TPM_SHORT, TPM_MEDIUM, TPM_LONG, TPM_LONG, TPM_MEDIUM, /* 15 */ TPM_SHORT, TPM_SHORT, TPM_MEDIUM, TPM_LONG, TPM_SHORT, /* 20 */ TPM_SHORT, TPM_MEDIUM, TPM_MEDIUM, TPM_MEDIUM, TPM_SHORT, /* 25 */ TPM_SHORT, TPM_MEDIUM, TPM_SHORT, TPM_SHORT, TPM_MEDIUM, /* 30 */ TPM_LONG, TPM_MEDIUM, TPM_SHORT, TPM_SHORT, TPM_SHORT, /* 35 */ TPM_MEDIUM, TPM_MEDIUM, TPM_UNDEFINED, TPM_UNDEFINED, TPM_MEDIUM, /* 40 */ TPM_LONG, TPM_MEDIUM, TPM_SHORT, TPM_SHORT, TPM_SHORT, /* 45 */ TPM_SHORT, TPM_SHORT, TPM_SHORT, TPM_LONG, TPM_MEDIUM, /* 50 */ TPM_MEDIUM, TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, /* 55 */ TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_MEDIUM, /* 60 */ TPM_MEDIUM, TPM_MEDIUM, TPM_SHORT, TPM_SHORT, TPM_MEDIUM, /* 65 */ TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_SHORT, /* 70 */ TPM_SHORT, TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, /* 75 */ TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_LONG, /* 80 */ TPM_UNDEFINED, TPM_MEDIUM, TPM_LONG, TPM_SHORT, TPM_UNDEFINED, /* 85 */ TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_SHORT, /* 90 */ TPM_SHORT, TPM_SHORT, TPM_SHORT, TPM_SHORT, TPM_UNDEFINED, /* 95 */ TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_MEDIUM, /* 100 */ TPM_SHORT, TPM_SHORT, TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, /* 105 */ TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_SHORT, /* 110 */ TPM_SHORT, TPM_SHORT, TPM_SHORT, TPM_SHORT, TPM_SHORT, /* 115 */ TPM_SHORT, TPM_SHORT, TPM_UNDEFINED, TPM_UNDEFINED, TPM_LONG, /* 120 */ TPM_LONG, TPM_MEDIUM, TPM_UNDEFINED, TPM_SHORT, TPM_SHORT, /* 125 */ TPM_SHORT, TPM_LONG, TPM_SHORT, TPM_SHORT, TPM_SHORT, /* 130 */ TPM_MEDIUM, TPM_UNDEFINED, TPM_SHORT, TPM_MEDIUM, TPM_UNDEFINED, /* 135 */ TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_SHORT, /* 140 */ TPM_SHORT, TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, /* 145 */ TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_SHORT, /* 150 */ TPM_MEDIUM, TPM_MEDIUM, TPM_SHORT, TPM_SHORT, TPM_UNDEFINED, /* 155 */ TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_SHORT, /* 160 */ TPM_SHORT, TPM_SHORT, TPM_SHORT, TPM_UNDEFINED, TPM_UNDEFINED, /* 165 */ TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_LONG, /* 170 */ TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, /* 175 */ TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_MEDIUM, /* 180 */ TPM_SHORT, TPM_MEDIUM, TPM_MEDIUM, TPM_MEDIUM, TPM_MEDIUM, /* 185 */ TPM_SHORT, TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, /* 190 */ TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, /* 195 */ TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_SHORT, /* 200 */ TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_SHORT, TPM_SHORT, /* 205 */ TPM_SHORT, TPM_SHORT, TPM_SHORT, TPM_SHORT, TPM_MEDIUM, /* 210 */ TPM_UNDEFINED, TPM_MEDIUM, TPM_MEDIUM, TPM_MEDIUM, TPM_UNDEFINED, /* 215 */ TPM_MEDIUM, TPM_UNDEFINED, TPM_UNDEFINED, TPM_SHORT, TPM_SHORT, /* 220 */ TPM_SHORT, TPM_SHORT, TPM_SHORT, TPM_SHORT, TPM_UNDEFINED, /* 225 */ TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_SHORT, /* 230 */ TPM_LONG, TPM_MEDIUM, TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, /* 235 */ TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_UNDEFINED, TPM_SHORT, /* 240 */ TPM_UNDEFINED, TPM_MEDIUM, }; static void user_reader_timeout(unsigned long ptr) { struct tpm_chip *chip = (struct tpm_chip *) ptr; schedule_work(&chip->work); } static void timeout_work(struct work_struct *work) { struct tpm_chip *chip = container_of(work, struct tpm_chip, work); mutex_lock(&chip->buffer_mutex); atomic_set(&chip->data_pending, 0); memset(chip->data_buffer, 0, TPM_BUFSIZE); mutex_unlock(&chip->buffer_mutex); } /* * Returns max number of jiffies to wait */ unsigned long tpm_calc_ordinal_duration(struct tpm_chip *chip, u32 ordinal) { int duration_idx = TPM_UNDEFINED; int duration = 0; if (ordinal < TPM_MAX_ORDINAL) duration_idx = tpm_ordinal_duration[ordinal]; else if ((ordinal & TPM_PROTECTED_ORDINAL_MASK) < TPM_MAX_PROTECTED_ORDINAL) duration_idx = tpm_protected_ordinal_duration[ordinal & TPM_PROTECTED_ORDINAL_MASK]; if (duration_idx != TPM_UNDEFINED) duration = chip->vendor.duration[duration_idx]; if (duration <= 0) return 2 * 60 * HZ; else return duration; } EXPORT_SYMBOL_GPL(tpm_calc_ordinal_duration); /* * Internal kernel interface to transmit TPM commands */ static ssize_t tpm_transmit(struct tpm_chip *chip, const char *buf, size_t bufsiz) { ssize_t rc; u32 count, ordinal; unsigned long stop; if (bufsiz > TPM_BUFSIZE) bufsiz = TPM_BUFSIZE; count = be32_to_cpu(*((__be32 *) (buf + 2))); ordinal = be32_to_cpu(*((__be32 *) (buf + 6))); if (count == 0) return -ENODATA; if (count > bufsiz) { dev_err(chip->dev, "invalid count value %x %zx \n", count, bufsiz); return -E2BIG; } mutex_lock(&chip->tpm_mutex); if ((rc = chip->vendor.send(chip, (u8 *) buf, count)) < 0) { dev_err(chip->dev, "tpm_transmit: tpm_send: error %zd\n", rc); goto out; } if (chip->vendor.irq) goto out_recv; stop = jiffies + tpm_calc_ordinal_duration(chip, ordinal); do { u8 status = chip->vendor.status(chip); if ((status & chip->vendor.req_complete_mask) == chip->vendor.req_complete_val) goto out_recv; if ((status == chip->vendor.req_canceled)) { dev_err(chip->dev, "Operation Canceled\n"); rc = -ECANCELED; goto out; } msleep(TPM_TIMEOUT); /* CHECK */ rmb(); } while (time_before(jiffies, stop)); chip->vendor.cancel(chip); dev_err(chip->dev, "Operation Timed out\n"); rc = -ETIME; goto out; out_recv: rc = chip->vendor.recv(chip, (u8 *) buf, bufsiz); if (rc < 0) dev_err(chip->dev, "tpm_transmit: tpm_recv: error %zd\n", rc); out: mutex_unlock(&chip->tpm_mutex); return rc; } #define TPM_DIGEST_SIZE 20 #define TPM_ERROR_SIZE 10 #define TPM_RET_CODE_IDX 6 enum tpm_capabilities { TPM_CAP_FLAG = cpu_to_be32(4), TPM_CAP_PROP = cpu_to_be32(5), CAP_VERSION_1_1 = cpu_to_be32(0x06), CAP_VERSION_1_2 = cpu_to_be32(0x1A) }; enum tpm_sub_capabilities { TPM_CAP_PROP_PCR = cpu_to_be32(0x101), TPM_CAP_PROP_MANUFACTURER = cpu_to_be32(0x103), TPM_CAP_FLAG_PERM = cpu_to_be32(0x108), TPM_CAP_FLAG_VOL = cpu_to_be32(0x109), TPM_CAP_PROP_OWNER = cpu_to_be32(0x111), TPM_CAP_PROP_TIS_TIMEOUT = cpu_to_be32(0x115), TPM_CAP_PROP_TIS_DURATION = cpu_to_be32(0x120), }; static ssize_t transmit_cmd(struct tpm_chip *chip, struct tpm_cmd_t *cmd, int len, const char *desc) { int err; len = tpm_transmit(chip,(u8 *) cmd, len); if (len < 0) return len; if (len == TPM_ERROR_SIZE) { err = be32_to_cpu(cmd->header.out.return_code); dev_dbg(chip->dev, "A TPM error (%d) occurred %s\n", err, desc); return err; } return 0; } #define TPM_INTERNAL_RESULT_SIZE 200 #define TPM_TAG_RQU_COMMAND cpu_to_be16(193) #define TPM_ORD_GET_CAP cpu_to_be32(101) static const struct tpm_input_header tpm_getcap_header = { .tag = TPM_TAG_RQU_COMMAND, .length = cpu_to_be32(22), .ordinal = TPM_ORD_GET_CAP }; ssize_t tpm_getcap(struct device *dev, __be32 subcap_id, cap_t *cap, const char *desc) { struct tpm_cmd_t tpm_cmd; int rc; struct tpm_chip *chip = dev_get_drvdata(dev); tpm_cmd.header.in = tpm_getcap_header; if (subcap_id == CAP_VERSION_1_1 || subcap_id == CAP_VERSION_1_2) { tpm_cmd.params.getcap_in.cap = subcap_id; /*subcap field not necessary */ tpm_cmd.params.getcap_in.subcap_size = cpu_to_be32(0); tpm_cmd.header.in.length -= cpu_to_be32(sizeof(__be32)); } else { if (subcap_id == TPM_CAP_FLAG_PERM || subcap_id == TPM_CAP_FLAG_VOL) tpm_cmd.params.getcap_in.cap = TPM_CAP_FLAG; else tpm_cmd.params.getcap_in.cap = TPM_CAP_PROP; tpm_cmd.params.getcap_in.subcap_size = cpu_to_be32(4); tpm_cmd.params.getcap_in.subcap = subcap_id; } rc = transmit_cmd(chip, &tpm_cmd, TPM_INTERNAL_RESULT_SIZE, desc); if (!rc) *cap = tpm_cmd.params.getcap_out.cap; return rc; } void tpm_gen_interrupt(struct tpm_chip *chip) { struct tpm_cmd_t tpm_cmd; ssize_t rc; tpm_cmd.header.in = tpm_getcap_header; tpm_cmd.params.getcap_in.cap = TPM_CAP_PROP; tpm_cmd.params.getcap_in.subcap_size = cpu_to_be32(4); tpm_cmd.params.getcap_in.subcap = TPM_CAP_PROP_TIS_TIMEOUT; rc = transmit_cmd(chip, &tpm_cmd, TPM_INTERNAL_RESULT_SIZE, "attempting to determine the timeouts"); } EXPORT_SYMBOL_GPL(tpm_gen_interrupt); void tpm_get_timeouts(struct tpm_chip *chip) { struct tpm_cmd_t tpm_cmd; struct timeout_t *timeout_cap; struct duration_t *duration_cap; ssize_t rc; u32 timeout; tpm_cmd.header.in = tpm_getcap_header; tpm_cmd.params.getcap_in.cap = TPM_CAP_PROP; tpm_cmd.params.getcap_in.subcap_size = cpu_to_be32(4); tpm_cmd.params.getcap_in.subcap = TPM_CAP_PROP_TIS_TIMEOUT; rc = transmit_cmd(chip, &tpm_cmd, TPM_INTERNAL_RESULT_SIZE, "attempting to determine the timeouts"); if (rc) goto duration; if (be32_to_cpu(tpm_cmd.header.out.length) != 4 * sizeof(u32)) goto duration; timeout_cap = &tpm_cmd.params.getcap_out.cap.timeout; /* Don't overwrite default if value is 0 */ timeout = be32_to_cpu(timeout_cap->a); if (timeout) chip->vendor.timeout_a = usecs_to_jiffies(timeout); timeout = be32_to_cpu(timeout_cap->b); if (timeout) chip->vendor.timeout_b = usecs_to_jiffies(timeout); timeout = be32_to_cpu(timeout_cap->c); if (timeout) chip->vendor.timeout_c = usecs_to_jiffies(timeout); timeout = be32_to_cpu(timeout_cap->d); if (timeout) chip->vendor.timeout_d = usecs_to_jiffies(timeout); duration: tpm_cmd.header.in = tpm_getcap_header; tpm_cmd.params.getcap_in.cap = TPM_CAP_PROP; tpm_cmd.params.getcap_in.subcap_size = cpu_to_be32(4); tpm_cmd.params.getcap_in.subcap = TPM_CAP_PROP_TIS_DURATION; rc = transmit_cmd(chip, &tpm_cmd, TPM_INTERNAL_RESULT_SIZE, "attempting to determine the durations"); if (rc) return; if (be32_to_cpu(tpm_cmd.header.out.return_code) != 3 * sizeof(u32)) return; duration_cap = &tpm_cmd.params.getcap_out.cap.duration; chip->vendor.duration[TPM_SHORT] = usecs_to_jiffies(be32_to_cpu(duration_cap->tpm_short)); /* The Broadcom BCM0102 chipset in a Dell Latitude D820 gets the above * value wrong and apparently reports msecs rather than usecs. So we * fix up the resulting too-small TPM_SHORT value to make things work. */ if (chip->vendor.duration[TPM_SHORT] < (HZ/100)) chip->vendor.duration[TPM_SHORT] = HZ; chip->vendor.duration[TPM_MEDIUM] = usecs_to_jiffies(be32_to_cpu(duration_cap->tpm_medium)); chip->vendor.duration[TPM_LONG] = usecs_to_jiffies(be32_to_cpu(duration_cap->tpm_long)); } EXPORT_SYMBOL_GPL(tpm_get_timeouts); void tpm_continue_selftest(struct tpm_chip *chip) { u8 data[] = { 0, 193, /* TPM_TAG_RQU_COMMAND */ 0, 0, 0, 10, /* length */ 0, 0, 0, 83, /* TPM_ORD_GetCapability */ }; tpm_transmit(chip, data, sizeof(data)); } EXPORT_SYMBOL_GPL(tpm_continue_selftest); ssize_t tpm_show_enabled(struct device * dev, struct device_attribute * attr, char *buf) { cap_t cap; ssize_t rc; rc = tpm_getcap(dev, TPM_CAP_FLAG_PERM, &cap, "attempting to determine the permanent enabled state"); if (rc) return 0; rc = sprintf(buf, "%d\n", !cap.perm_flags.disable); return rc; } EXPORT_SYMBOL_GPL(tpm_show_enabled); ssize_t tpm_show_active(struct device * dev, struct device_attribute * attr, char *buf) { cap_t cap; ssize_t rc; rc = tpm_getcap(dev, TPM_CAP_FLAG_PERM, &cap, "attempting to determine the permanent active state"); if (rc) return 0; rc = sprintf(buf, "%d\n", !cap.perm_flags.deactivated); return rc; } EXPORT_SYMBOL_GPL(tpm_show_active); ssize_t tpm_show_owned(struct device * dev, struct device_attribute * attr, char *buf) { cap_t cap; ssize_t rc; rc = tpm_getcap(dev, TPM_CAP_PROP_OWNER, &cap, "attempting to determine the owner state"); if (rc) return 0; rc = sprintf(buf, "%d\n", cap.owned); return rc; } EXPORT_SYMBOL_GPL(tpm_show_owned); ssize_t tpm_show_temp_deactivated(struct device * dev, struct device_attribute * attr, char *buf) { cap_t cap; ssize_t rc; rc = tpm_getcap(dev, TPM_CAP_FLAG_VOL, &cap, "attempting to determine the temporary state"); if (rc) return 0; rc = sprintf(buf, "%d\n", cap.stclear_flags.deactivated); return rc; } EXPORT_SYMBOL_GPL(tpm_show_temp_deactivated); /* * tpm_chip_find_get - return tpm_chip for given chip number */ static struct tpm_chip *tpm_chip_find_get(int chip_num) { struct tpm_chip *pos, *chip = NULL; rcu_read_lock(); list_for_each_entry_rcu(pos, &tpm_chip_list, list) { if (chip_num != TPM_ANY_NUM && chip_num != pos->dev_num) continue; if (try_module_get(pos->dev->driver->owner)) { chip = pos; break; } } rcu_read_unlock(); return chip; } #define TPM_ORDINAL_PCRREAD cpu_to_be32(21) #define READ_PCR_RESULT_SIZE 30 static struct tpm_input_header pcrread_header = { .tag = TPM_TAG_RQU_COMMAND, .length = cpu_to_be32(14), .ordinal = TPM_ORDINAL_PCRREAD }; int __tpm_pcr_read(struct tpm_chip *chip, int pcr_idx, u8 *res_buf) { int rc; struct tpm_cmd_t cmd; cmd.header.in = pcrread_header; cmd.params.pcrread_in.pcr_idx = cpu_to_be32(pcr_idx); rc = transmit_cmd(chip, &cmd, READ_PCR_RESULT_SIZE, "attempting to read a pcr value"); if (rc == 0) memcpy(res_buf, cmd.params.pcrread_out.pcr_result, TPM_DIGEST_SIZE); return rc; } /** * tpm_pcr_read - read a pcr value * @chip_num: tpm idx # or ANY * @pcr_idx: pcr idx to retrieve * @res_buf: TPM_PCR value * size of res_buf is 20 bytes (or NULL if you don't care) * * The TPM driver should be built-in, but for whatever reason it * isn't, protect against the chip disappearing, by incrementing * the module usage count. */ int tpm_pcr_read(u32 chip_num, int pcr_idx, u8 *res_buf) { struct tpm_chip *chip; int rc; chip = tpm_chip_find_get(chip_num); if (chip == NULL) return -ENODEV; rc = __tpm_pcr_read(chip, pcr_idx, res_buf); tpm_chip_put(chip); return rc; } EXPORT_SYMBOL_GPL(tpm_pcr_read); /** * tpm_pcr_extend - extend pcr value with hash * @chip_num: tpm idx # or AN& * @pcr_idx: pcr idx to extend * @hash: hash value used to extend pcr value * * The TPM driver should be built-in, but for whatever reason it * isn't, protect against the chip disappearing, by incrementing * the module usage count. */ #define TPM_ORD_PCR_EXTEND cpu_to_be32(20) #define EXTEND_PCR_RESULT_SIZE 34 static struct tpm_input_header pcrextend_header = { .tag = TPM_TAG_RQU_COMMAND, .length = cpu_to_be32(34), .ordinal = TPM_ORD_PCR_EXTEND }; int tpm_pcr_extend(u32 chip_num, int pcr_idx, const u8 *hash) { struct tpm_cmd_t cmd; int rc; struct tpm_chip *chip; chip = tpm_chip_find_get(chip_num); if (chip == NULL) return -ENODEV; cmd.header.in = pcrextend_header; cmd.params.pcrextend_in.pcr_idx = cpu_to_be32(pcr_idx); memcpy(cmd.params.pcrextend_in.hash, hash, TPM_DIGEST_SIZE); rc = transmit_cmd(chip, &cmd, EXTEND_PCR_RESULT_SIZE, "attempting extend a PCR value"); tpm_chip_put(chip); return rc; } EXPORT_SYMBOL_GPL(tpm_pcr_extend); int tpm_send(u32 chip_num, void *cmd, size_t buflen) { struct tpm_chip *chip; int rc; chip = tpm_chip_find_get(chip_num); if (chip == NULL) return -ENODEV; rc = transmit_cmd(chip, cmd, buflen, "attempting tpm_cmd"); tpm_chip_put(chip); return rc; } EXPORT_SYMBOL_GPL(tpm_send); ssize_t tpm_show_pcrs(struct device *dev, struct device_attribute *attr, char *buf) { cap_t cap; u8 digest[TPM_DIGEST_SIZE]; ssize_t rc; int i, j, num_pcrs; char *str = buf; struct tpm_chip *chip = dev_get_drvdata(dev); rc = tpm_getcap(dev, TPM_CAP_PROP_PCR, &cap, "attempting to determine the number of PCRS"); if (rc) return 0; num_pcrs = be32_to_cpu(cap.num_pcrs); for (i = 0; i < num_pcrs; i++) { rc = __tpm_pcr_read(chip, i, digest); if (rc) break; str += sprintf(str, "PCR-%02d: ", i); for (j = 0; j < TPM_DIGEST_SIZE; j++) str += sprintf(str, "%02X ", digest[j]); str += sprintf(str, "\n"); } return str - buf; } EXPORT_SYMBOL_GPL(tpm_show_pcrs); #define READ_PUBEK_RESULT_SIZE 314 #define TPM_ORD_READPUBEK cpu_to_be32(124) struct tpm_input_header tpm_readpubek_header = { .tag = TPM_TAG_RQU_COMMAND, .length = cpu_to_be32(30), .ordinal = TPM_ORD_READPUBEK }; ssize_t tpm_show_pubek(struct device *dev, struct device_attribute *attr, char *buf) { u8 *data; struct tpm_cmd_t tpm_cmd; ssize_t err; int i, rc; char *str = buf; struct tpm_chip *chip = dev_get_drvdata(dev); tpm_cmd.header.in = tpm_readpubek_header; err = transmit_cmd(chip, &tpm_cmd, READ_PUBEK_RESULT_SIZE, "attempting to read the PUBEK"); if (err) goto out; /* ignore header 10 bytes algorithm 32 bits (1 == RSA ) encscheme 16 bits sigscheme 16 bits parameters (RSA 12->bytes: keybit, #primes, expbit) keylenbytes 32 bits 256 byte modulus ignore checksum 20 bytes */ data = tpm_cmd.params.readpubek_out_buffer; str += sprintf(str, "Algorithm: %02X %02X %02X %02X\nEncscheme: %02X %02X\n" "Sigscheme: %02X %02X\nParameters: %02X %02X %02X %02X" " %02X %02X %02X %02X %02X %02X %02X %02X\n" "Modulus length: %d\nModulus: \n", data[10], data[11], data[12], data[13], data[14], data[15], data[16], data[17], data[22], data[23], data[24], data[25], data[26], data[27], data[28], data[29], data[30], data[31], data[32], data[33], be32_to_cpu(*((__be32 *) (data + 34)))); for (i = 0; i < 256; i++) { str += sprintf(str, "%02X ", data[i + 38]); if ((i + 1) % 16 == 0) str += sprintf(str, "\n"); } out: rc = str - buf; return rc; } EXPORT_SYMBOL_GPL(tpm_show_pubek); ssize_t tpm_show_caps(struct device *dev, struct device_attribute *attr, char *buf) { cap_t cap; ssize_t rc; char *str = buf; rc = tpm_getcap(dev, TPM_CAP_PROP_MANUFACTURER, &cap, "attempting to determine the manufacturer"); if (rc) return 0; str += sprintf(str, "Manufacturer: 0x%x\n", be32_to_cpu(cap.manufacturer_id)); rc = tpm_getcap(dev, CAP_VERSION_1_1, &cap, "attempting to determine the 1.1 version"); if (rc) return 0; str += sprintf(str, "TCG version: %d.%d\nFirmware version: %d.%d\n", cap.tpm_version.Major, cap.tpm_version.Minor, cap.tpm_version.revMajor, cap.tpm_version.revMinor); return str - buf; } EXPORT_SYMBOL_GPL(tpm_show_caps); ssize_t tpm_show_caps_1_2(struct device * dev, struct device_attribute * attr, char *buf) { cap_t cap; ssize_t rc; char *str = buf; rc = tpm_getcap(dev, TPM_CAP_PROP_MANUFACTURER, &cap, "attempting to determine the manufacturer"); if (rc) return 0; str += sprintf(str, "Manufacturer: 0x%x\n", be32_to_cpu(cap.manufacturer_id)); rc = tpm_getcap(dev, CAP_VERSION_1_2, &cap, "attempting to determine the 1.2 version"); if (rc) return 0; str += sprintf(str, "TCG version: %d.%d\nFirmware version: %d.%d\n", cap.tpm_version_1_2.Major, cap.tpm_version_1_2.Minor, cap.tpm_version_1_2.revMajor, cap.tpm_version_1_2.revMinor); return str - buf; } EXPORT_SYMBOL_GPL(tpm_show_caps_1_2); ssize_t tpm_store_cancel(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { struct tpm_chip *chip = dev_get_drvdata(dev); if (chip == NULL) return 0; chip->vendor.cancel(chip); return count; } EXPORT_SYMBOL_GPL(tpm_store_cancel); /* * Device file system interface to the TPM * * It's assured that the chip will be opened just once, * by the check of is_open variable, which is protected * by driver_lock. */ int tpm_open(struct inode *inode, struct file *file) { int minor = iminor(inode); struct tpm_chip *chip = NULL, *pos; rcu_read_lock(); list_for_each_entry_rcu(pos, &tpm_chip_list, list) { if (pos->vendor.miscdev.minor == minor) { chip = pos; get_device(chip->dev); break; } } rcu_read_unlock(); if (!chip) return -ENODEV; if (test_and_set_bit(0, &chip->is_open)) { dev_dbg(chip->dev, "Another process owns this TPM\n"); put_device(chip->dev); return -EBUSY; } chip->data_buffer = kzalloc(TPM_BUFSIZE, GFP_KERNEL); if (chip->data_buffer == NULL) { clear_bit(0, &chip->is_open); put_device(chip->dev); return -ENOMEM; } atomic_set(&chip->data_pending, 0); file->private_data = chip; return 0; } EXPORT_SYMBOL_GPL(tpm_open); /* * Called on file close */ int tpm_release(struct inode *inode, struct file *file) { struct tpm_chip *chip = file->private_data; del_singleshot_timer_sync(&chip->user_read_timer); flush_work_sync(&chip->work); file->private_data = NULL; atomic_set(&chip->data_pending, 0); kfree(chip->data_buffer); clear_bit(0, &chip->is_open); put_device(chip->dev); return 0; } EXPORT_SYMBOL_GPL(tpm_release); ssize_t tpm_write(struct file *file, const char __user *buf, size_t size, loff_t *off) { struct tpm_chip *chip = file->private_data; size_t in_size = size, out_size; /* cannot perform a write until the read has cleared either via tpm_read or a user_read_timer timeout */ while (atomic_read(&chip->data_pending) != 0) msleep(TPM_TIMEOUT); mutex_lock(&chip->buffer_mutex); if (in_size > TPM_BUFSIZE) in_size = TPM_BUFSIZE; if (copy_from_user (chip->data_buffer, (void __user *) buf, in_size)) { mutex_unlock(&chip->buffer_mutex); return -EFAULT; } /* atomic tpm command send and result receive */ out_size = tpm_transmit(chip, chip->data_buffer, TPM_BUFSIZE); atomic_set(&chip->data_pending, out_size); mutex_unlock(&chip->buffer_mutex); /* Set a timeout by which the reader must come claim the result */ mod_timer(&chip->user_read_timer, jiffies + (60 * HZ)); return in_size; } EXPORT_SYMBOL_GPL(tpm_write); ssize_t tpm_read(struct file *file, char __user *buf, size_t size, loff_t *off) { struct tpm_chip *chip = file->private_data; ssize_t ret_size; int rc; del_singleshot_timer_sync(&chip->user_read_timer); flush_work_sync(&chip->work); ret_size = atomic_read(&chip->data_pending); atomic_set(&chip->data_pending, 0); if (ret_size > 0) { /* relay data */ if (size < ret_size) ret_size = size; mutex_lock(&chip->buffer_mutex); rc = copy_to_user(buf, chip->data_buffer, ret_size); memset(chip->data_buffer, 0, ret_size); if (rc) ret_size = -EFAULT; mutex_unlock(&chip->buffer_mutex); } return ret_size; } EXPORT_SYMBOL_GPL(tpm_read); void tpm_remove_hardware(struct device *dev) { struct tpm_chip *chip = dev_get_drvdata(dev); if (chip == NULL) { dev_err(dev, "No device data found\n"); return; } spin_lock(&driver_lock); list_del_rcu(&chip->list); spin_unlock(&driver_lock); synchronize_rcu(); misc_deregister(&chip->vendor.miscdev); sysfs_remove_group(&dev->kobj, chip->vendor.attr_group); tpm_bios_log_teardown(chip->bios_dir); /* write it this way to be explicit (chip->dev == dev) */ put_device(chip->dev); } EXPORT_SYMBOL_GPL(tpm_remove_hardware); #define TPM_ORD_SAVESTATE cpu_to_be32(152) #define SAVESTATE_RESULT_SIZE 10 static struct tpm_input_header savestate_header = { .tag = TPM_TAG_RQU_COMMAND, .length = cpu_to_be32(10), .ordinal = TPM_ORD_SAVESTATE }; /* * We are about to suspend. Save the TPM state * so that it can be restored. */ int tpm_pm_suspend(struct device *dev, pm_message_t pm_state) { struct tpm_chip *chip = dev_get_drvdata(dev); struct tpm_cmd_t cmd; int rc; u8 dummy_hash[TPM_DIGEST_SIZE] = { 0 }; if (chip == NULL) return -ENODEV; /* for buggy tpm, flush pcrs with extend to selected dummy */ if (tpm_suspend_pcr) { cmd.header.in = pcrextend_header; cmd.params.pcrextend_in.pcr_idx = cpu_to_be32(tpm_suspend_pcr); memcpy(cmd.params.pcrextend_in.hash, dummy_hash, TPM_DIGEST_SIZE); rc = transmit_cmd(chip, &cmd, EXTEND_PCR_RESULT_SIZE, "extending dummy pcr before suspend"); } /* now do the actual savestate */ cmd.header.in = savestate_header; rc = transmit_cmd(chip, &cmd, SAVESTATE_RESULT_SIZE, "sending savestate before suspend"); return rc; } EXPORT_SYMBOL_GPL(tpm_pm_suspend); /* * Resume from a power safe. The BIOS already restored * the TPM state. */ int tpm_pm_resume(struct device *dev) { struct tpm_chip *chip = dev_get_drvdata(dev); if (chip == NULL) return -ENODEV; return 0; } EXPORT_SYMBOL_GPL(tpm_pm_resume); /* In case vendor provided release function, call it too.*/ void tpm_dev_vendor_release(struct tpm_chip *chip) { if (chip->vendor.release) chip->vendor.release(chip->dev); clear_bit(chip->dev_num, dev_mask); kfree(chip->vendor.miscdev.name); } EXPORT_SYMBOL_GPL(tpm_dev_vendor_release); /* * Once all references to platform device are down to 0, * release all allocated structures. */ void tpm_dev_release(struct device *dev) { struct tpm_chip *chip = dev_get_drvdata(dev); tpm_dev_vendor_release(chip); chip->release(dev); kfree(chip); } EXPORT_SYMBOL_GPL(tpm_dev_release); /* * Called from tpm_<specific>.c probe function only for devices * the driver has determined it should claim. Prior to calling * this function the specific probe function has called pci_enable_device * upon errant exit from this function specific probe function should call * pci_disable_device */ struct tpm_chip *tpm_register_hardware(struct device *dev, const struct tpm_vendor_specific *entry) { #define DEVNAME_SIZE 7 char *devname; struct tpm_chip *chip; /* Driver specific per-device data */ chip = kzalloc(sizeof(*chip), GFP_KERNEL); devname = kmalloc(DEVNAME_SIZE, GFP_KERNEL); if (chip == NULL || devname == NULL) goto out_free; mutex_init(&chip->buffer_mutex); mutex_init(&chip->tpm_mutex); INIT_LIST_HEAD(&chip->list); INIT_WORK(&chip->work, timeout_work); setup_timer(&chip->user_read_timer, user_reader_timeout, (unsigned long)chip); memcpy(&chip->vendor, entry, sizeof(struct tpm_vendor_specific)); chip->dev_num = find_first_zero_bit(dev_mask, TPM_NUM_DEVICES); if (chip->dev_num >= TPM_NUM_DEVICES) { dev_err(dev, "No available tpm device numbers\n"); goto out_free; } else if (chip->dev_num == 0) chip->vendor.miscdev.minor = TPM_MINOR; else chip->vendor.miscdev.minor = MISC_DYNAMIC_MINOR; set_bit(chip->dev_num, dev_mask); scnprintf(devname, DEVNAME_SIZE, "%s%d", "tpm", chip->dev_num); chip->vendor.miscdev.name = devname; chip->vendor.miscdev.parent = dev; chip->dev = get_device(dev); chip->release = dev->release; dev->release = tpm_dev_release; dev_set_drvdata(dev, chip); if (misc_register(&chip->vendor.miscdev)) { dev_err(chip->dev, "unable to misc_register %s, minor %d\n", chip->vendor.miscdev.name, chip->vendor.miscdev.minor); put_device(chip->dev); return NULL; } if (sysfs_create_group(&dev->kobj, chip->vendor.attr_group)) { misc_deregister(&chip->vendor.miscdev); put_device(chip->dev); return NULL; } chip->bios_dir = tpm_bios_log_setup(devname); /* Make chip available */ spin_lock(&driver_lock); list_add_rcu(&chip->list, &tpm_chip_list); spin_unlock(&driver_lock); return chip; out_free: kfree(chip); kfree(devname); return NULL; } EXPORT_SYMBOL_GPL(tpm_register_hardware); MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)"); MODULE_DESCRIPTION("TPM Driver"); MODULE_VERSION("2.0"); MODULE_LICENSE("GPL");
gpl-2.0
ncarrier/carino-packages-linux
crypto/md5.c
1428
4058
/* * Cryptographic API. * * MD5 Message Digest Algorithm (RFC1321). * * Derived from cryptoapi implementation, originally based on the * public domain implementation written by Colin Plumb in 1993. * * Copyright (c) Cryptoapi developers. * Copyright (c) 2002 James Morris <jmorris@intercode.com.au> * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the Free * Software Foundation; either version 2 of the License, or (at your option) * any later version. * */ #include <crypto/internal/hash.h> #include <crypto/md5.h> #include <linux/init.h> #include <linux/module.h> #include <linux/string.h> #include <linux/types.h> #include <linux/cryptohash.h> #include <asm/byteorder.h> /* XXX: this stuff can be optimized */ static inline void le32_to_cpu_array(u32 *buf, unsigned int words) { while (words--) { __le32_to_cpus(buf); buf++; } } static inline void cpu_to_le32_array(u32 *buf, unsigned int words) { while (words--) { __cpu_to_le32s(buf); buf++; } } static inline void md5_transform_helper(struct md5_state *ctx) { le32_to_cpu_array(ctx->block, sizeof(ctx->block) / sizeof(u32)); md5_transform(ctx->hash, ctx->block); } static int md5_init(struct shash_desc *desc) { struct md5_state *mctx = shash_desc_ctx(desc); mctx->hash[0] = 0x67452301; mctx->hash[1] = 0xefcdab89; mctx->hash[2] = 0x98badcfe; mctx->hash[3] = 0x10325476; mctx->byte_count = 0; return 0; } static int md5_update(struct shash_desc *desc, const u8 *data, unsigned int len) { struct md5_state *mctx = shash_desc_ctx(desc); const u32 avail = sizeof(mctx->block) - (mctx->byte_count & 0x3f); mctx->byte_count += len; if (avail > len) { memcpy((char *)mctx->block + (sizeof(mctx->block) - avail), data, len); return 0; } memcpy((char *)mctx->block + (sizeof(mctx->block) - avail), data, avail); md5_transform_helper(mctx); data += avail; len -= avail; while (len >= sizeof(mctx->block)) { memcpy(mctx->block, data, sizeof(mctx->block)); md5_transform_helper(mctx); data += sizeof(mctx->block); len -= sizeof(mctx->block); } memcpy(mctx->block, data, len); return 0; } static int md5_final(struct shash_desc *desc, u8 *out) { struct md5_state *mctx = shash_desc_ctx(desc); const unsigned int offset = mctx->byte_count & 0x3f; char *p = (char *)mctx->block + offset; int padding = 56 - (offset + 1); *p++ = 0x80; if (padding < 0) { memset(p, 0x00, padding + sizeof (u64)); md5_transform_helper(mctx); p = (char *)mctx->block; padding = 56; } memset(p, 0, padding); mctx->block[14] = mctx->byte_count << 3; mctx->block[15] = mctx->byte_count >> 29; le32_to_cpu_array(mctx->block, (sizeof(mctx->block) - sizeof(u64)) / sizeof(u32)); md5_transform(mctx->hash, mctx->block); cpu_to_le32_array(mctx->hash, sizeof(mctx->hash) / sizeof(u32)); memcpy(out, mctx->hash, sizeof(mctx->hash)); memset(mctx, 0, sizeof(*mctx)); return 0; } static int md5_export(struct shash_desc *desc, void *out) { struct md5_state *ctx = shash_desc_ctx(desc); memcpy(out, ctx, sizeof(*ctx)); return 0; } static int md5_import(struct shash_desc *desc, const void *in) { struct md5_state *ctx = shash_desc_ctx(desc); memcpy(ctx, in, sizeof(*ctx)); return 0; } static struct shash_alg alg = { .digestsize = MD5_DIGEST_SIZE, .init = md5_init, .update = md5_update, .final = md5_final, .export = md5_export, .import = md5_import, .descsize = sizeof(struct md5_state), .statesize = sizeof(struct md5_state), .base = { .cra_name = "md5", .cra_flags = CRYPTO_ALG_TYPE_SHASH, .cra_blocksize = MD5_HMAC_BLOCK_SIZE, .cra_module = THIS_MODULE, } }; static int __init md5_mod_init(void) { return crypto_register_shash(&alg); } static void __exit md5_mod_fini(void) { crypto_unregister_shash(&alg); } module_init(md5_mod_init); module_exit(md5_mod_fini); MODULE_LICENSE("GPL"); MODULE_DESCRIPTION("MD5 Message Digest Algorithm"); MODULE_ALIAS_CRYPTO("md5");
gpl-2.0
zjgeer/linux
fs/nfs/fscache.c
1428
12168
/* NFS filesystem cache interface * * Copyright (C) 2008 Red Hat, Inc. All Rights Reserved. * Written by David Howells (dhowells@redhat.com) * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public Licence * as published by the Free Software Foundation; either version * 2 of the Licence, or (at your option) any later version. */ #include <linux/init.h> #include <linux/kernel.h> #include <linux/sched.h> #include <linux/mm.h> #include <linux/nfs_fs.h> #include <linux/nfs_fs_sb.h> #include <linux/in6.h> #include <linux/seq_file.h> #include <linux/slab.h> #include "internal.h" #include "iostat.h" #include "fscache.h" #define NFSDBG_FACILITY NFSDBG_FSCACHE static struct rb_root nfs_fscache_keys = RB_ROOT; static DEFINE_SPINLOCK(nfs_fscache_keys_lock); /* * Get the per-client index cookie for an NFS client if the appropriate mount * flag was set * - We always try and get an index cookie for the client, but get filehandle * cookies on a per-superblock basis, depending on the mount flags */ void nfs_fscache_get_client_cookie(struct nfs_client *clp) { /* create a cache index for looking up filehandles */ clp->fscache = fscache_acquire_cookie(nfs_fscache_netfs.primary_index, &nfs_fscache_server_index_def, clp, true); dfprintk(FSCACHE, "NFS: get client cookie (0x%p/0x%p)\n", clp, clp->fscache); } /* * Dispose of a per-client cookie */ void nfs_fscache_release_client_cookie(struct nfs_client *clp) { dfprintk(FSCACHE, "NFS: releasing client cookie (0x%p/0x%p)\n", clp, clp->fscache); fscache_relinquish_cookie(clp->fscache, 0); clp->fscache = NULL; } /* * Get the cache cookie for an NFS superblock. We have to handle * uniquification here because the cache doesn't do it for us. * * The default uniquifier is just an empty string, but it may be overridden * either by the 'fsc=xxx' option to mount, or by inheriting it from the parent * superblock across an automount point of some nature. */ void nfs_fscache_get_super_cookie(struct super_block *sb, const char *uniq, int ulen) { struct nfs_fscache_key *key, *xkey; struct nfs_server *nfss = NFS_SB(sb); struct rb_node **p, *parent; int diff; if (!uniq) { uniq = ""; ulen = 1; } key = kzalloc(sizeof(*key) + ulen, GFP_KERNEL); if (!key) return; key->nfs_client = nfss->nfs_client; key->key.super.s_flags = sb->s_flags & NFS_MS_MASK; key->key.nfs_server.flags = nfss->flags; key->key.nfs_server.rsize = nfss->rsize; key->key.nfs_server.wsize = nfss->wsize; key->key.nfs_server.acregmin = nfss->acregmin; key->key.nfs_server.acregmax = nfss->acregmax; key->key.nfs_server.acdirmin = nfss->acdirmin; key->key.nfs_server.acdirmax = nfss->acdirmax; key->key.nfs_server.fsid = nfss->fsid; key->key.rpc_auth.au_flavor = nfss->client->cl_auth->au_flavor; key->key.uniq_len = ulen; memcpy(key->key.uniquifier, uniq, ulen); spin_lock(&nfs_fscache_keys_lock); p = &nfs_fscache_keys.rb_node; parent = NULL; while (*p) { parent = *p; xkey = rb_entry(parent, struct nfs_fscache_key, node); if (key->nfs_client < xkey->nfs_client) goto go_left; if (key->nfs_client > xkey->nfs_client) goto go_right; diff = memcmp(&key->key, &xkey->key, sizeof(key->key)); if (diff < 0) goto go_left; if (diff > 0) goto go_right; if (key->key.uniq_len == 0) goto non_unique; diff = memcmp(key->key.uniquifier, xkey->key.uniquifier, key->key.uniq_len); if (diff < 0) goto go_left; if (diff > 0) goto go_right; goto non_unique; go_left: p = &(*p)->rb_left; continue; go_right: p = &(*p)->rb_right; } rb_link_node(&key->node, parent, p); rb_insert_color(&key->node, &nfs_fscache_keys); spin_unlock(&nfs_fscache_keys_lock); nfss->fscache_key = key; /* create a cache index for looking up filehandles */ nfss->fscache = fscache_acquire_cookie(nfss->nfs_client->fscache, &nfs_fscache_super_index_def, nfss, true); dfprintk(FSCACHE, "NFS: get superblock cookie (0x%p/0x%p)\n", nfss, nfss->fscache); return; non_unique: spin_unlock(&nfs_fscache_keys_lock); kfree(key); nfss->fscache_key = NULL; nfss->fscache = NULL; printk(KERN_WARNING "NFS:" " Cache request denied due to non-unique superblock keys\n"); } /* * release a per-superblock cookie */ void nfs_fscache_release_super_cookie(struct super_block *sb) { struct nfs_server *nfss = NFS_SB(sb); dfprintk(FSCACHE, "NFS: releasing superblock cookie (0x%p/0x%p)\n", nfss, nfss->fscache); fscache_relinquish_cookie(nfss->fscache, 0); nfss->fscache = NULL; if (nfss->fscache_key) { spin_lock(&nfs_fscache_keys_lock); rb_erase(&nfss->fscache_key->node, &nfs_fscache_keys); spin_unlock(&nfs_fscache_keys_lock); kfree(nfss->fscache_key); nfss->fscache_key = NULL; } } /* * Initialise the per-inode cache cookie pointer for an NFS inode. */ void nfs_fscache_init_inode(struct inode *inode) { struct nfs_inode *nfsi = NFS_I(inode); nfsi->fscache = NULL; if (!S_ISREG(inode->i_mode)) return; nfsi->fscache = fscache_acquire_cookie(NFS_SB(inode->i_sb)->fscache, &nfs_fscache_inode_object_def, nfsi, false); } /* * Release a per-inode cookie. */ void nfs_fscache_clear_inode(struct inode *inode) { struct nfs_inode *nfsi = NFS_I(inode); struct fscache_cookie *cookie = nfs_i_fscache(inode); dfprintk(FSCACHE, "NFS: clear cookie (0x%p/0x%p)\n", nfsi, cookie); fscache_relinquish_cookie(cookie, false); nfsi->fscache = NULL; } static bool nfs_fscache_can_enable(void *data) { struct inode *inode = data; return !inode_is_open_for_write(inode); } /* * Enable or disable caching for a file that is being opened as appropriate. * The cookie is allocated when the inode is initialised, but is not enabled at * that time. Enablement is deferred to file-open time to avoid stat() and * access() thrashing the cache. * * For now, with NFS, only regular files that are open read-only will be able * to use the cache. * * We enable the cache for an inode if we open it read-only and it isn't * currently open for writing. We disable the cache if the inode is open * write-only. * * The caller uses the file struct to pin i_writecount on the inode before * calling us when a file is opened for writing, so we can make use of that. * * Note that this may be invoked multiple times in parallel by parallel * nfs_open() functions. */ void nfs_fscache_open_file(struct inode *inode, struct file *filp) { struct nfs_inode *nfsi = NFS_I(inode); struct fscache_cookie *cookie = nfs_i_fscache(inode); if (!fscache_cookie_valid(cookie)) return; if (inode_is_open_for_write(inode)) { dfprintk(FSCACHE, "NFS: nfsi 0x%p disabling cache\n", nfsi); clear_bit(NFS_INO_FSCACHE, &nfsi->flags); fscache_disable_cookie(cookie, true); fscache_uncache_all_inode_pages(cookie, inode); } else { dfprintk(FSCACHE, "NFS: nfsi 0x%p enabling cache\n", nfsi); fscache_enable_cookie(cookie, nfs_fscache_can_enable, inode); if (fscache_cookie_enabled(cookie)) set_bit(NFS_INO_FSCACHE, &NFS_I(inode)->flags); } } EXPORT_SYMBOL_GPL(nfs_fscache_open_file); /* * Release the caching state associated with a page, if the page isn't busy * interacting with the cache. * - Returns true (can release page) or false (page busy). */ int nfs_fscache_release_page(struct page *page, gfp_t gfp) { if (PageFsCache(page)) { struct fscache_cookie *cookie = nfs_i_fscache(page->mapping->host); BUG_ON(!cookie); dfprintk(FSCACHE, "NFS: fscache releasepage (0x%p/0x%p/0x%p)\n", cookie, page, NFS_I(page->mapping->host)); if (!fscache_maybe_release_page(cookie, page, gfp)) return 0; nfs_inc_fscache_stats(page->mapping->host, NFSIOS_FSCACHE_PAGES_UNCACHED); } return 1; } /* * Release the caching state associated with a page if undergoing complete page * invalidation. */ void __nfs_fscache_invalidate_page(struct page *page, struct inode *inode) { struct fscache_cookie *cookie = nfs_i_fscache(inode); BUG_ON(!cookie); dfprintk(FSCACHE, "NFS: fscache invalidatepage (0x%p/0x%p/0x%p)\n", cookie, page, NFS_I(inode)); fscache_wait_on_page_write(cookie, page); BUG_ON(!PageLocked(page)); fscache_uncache_page(cookie, page); nfs_inc_fscache_stats(page->mapping->host, NFSIOS_FSCACHE_PAGES_UNCACHED); } /* * Handle completion of a page being read from the cache. * - Called in process (keventd) context. */ static void nfs_readpage_from_fscache_complete(struct page *page, void *context, int error) { dfprintk(FSCACHE, "NFS: readpage_from_fscache_complete (0x%p/0x%p/%d)\n", page, context, error); /* if the read completes with an error, we just unlock the page and let * the VM reissue the readpage */ if (!error) { SetPageUptodate(page); unlock_page(page); } else { error = nfs_readpage_async(context, page->mapping->host, page); if (error) unlock_page(page); } } /* * Retrieve a page from fscache */ int __nfs_readpage_from_fscache(struct nfs_open_context *ctx, struct inode *inode, struct page *page) { int ret; dfprintk(FSCACHE, "NFS: readpage_from_fscache(fsc:%p/p:%p(i:%lx f:%lx)/0x%p)\n", nfs_i_fscache(inode), page, page->index, page->flags, inode); ret = fscache_read_or_alloc_page(nfs_i_fscache(inode), page, nfs_readpage_from_fscache_complete, ctx, GFP_KERNEL); switch (ret) { case 0: /* read BIO submitted (page in fscache) */ dfprintk(FSCACHE, "NFS: readpage_from_fscache: BIO submitted\n"); nfs_inc_fscache_stats(inode, NFSIOS_FSCACHE_PAGES_READ_OK); return ret; case -ENOBUFS: /* inode not in cache */ case -ENODATA: /* page not in cache */ nfs_inc_fscache_stats(inode, NFSIOS_FSCACHE_PAGES_READ_FAIL); dfprintk(FSCACHE, "NFS: readpage_from_fscache %d\n", ret); return 1; default: dfprintk(FSCACHE, "NFS: readpage_from_fscache %d\n", ret); nfs_inc_fscache_stats(inode, NFSIOS_FSCACHE_PAGES_READ_FAIL); } return ret; } /* * Retrieve a set of pages from fscache */ int __nfs_readpages_from_fscache(struct nfs_open_context *ctx, struct inode *inode, struct address_space *mapping, struct list_head *pages, unsigned *nr_pages) { unsigned npages = *nr_pages; int ret; dfprintk(FSCACHE, "NFS: nfs_getpages_from_fscache (0x%p/%u/0x%p)\n", nfs_i_fscache(inode), npages, inode); ret = fscache_read_or_alloc_pages(nfs_i_fscache(inode), mapping, pages, nr_pages, nfs_readpage_from_fscache_complete, ctx, mapping_gfp_mask(mapping)); if (*nr_pages < npages) nfs_add_fscache_stats(inode, NFSIOS_FSCACHE_PAGES_READ_OK, npages); if (*nr_pages > 0) nfs_add_fscache_stats(inode, NFSIOS_FSCACHE_PAGES_READ_FAIL, *nr_pages); switch (ret) { case 0: /* read submitted to the cache for all pages */ BUG_ON(!list_empty(pages)); BUG_ON(*nr_pages != 0); dfprintk(FSCACHE, "NFS: nfs_getpages_from_fscache: submitted\n"); return ret; case -ENOBUFS: /* some pages aren't cached and can't be */ case -ENODATA: /* some pages aren't cached */ dfprintk(FSCACHE, "NFS: nfs_getpages_from_fscache: no page: %d\n", ret); return 1; default: dfprintk(FSCACHE, "NFS: nfs_getpages_from_fscache: ret %d\n", ret); } return ret; } /* * Store a newly fetched page in fscache * - PG_fscache must be set on the page */ void __nfs_readpage_to_fscache(struct inode *inode, struct page *page, int sync) { int ret; dfprintk(FSCACHE, "NFS: readpage_to_fscache(fsc:%p/p:%p(i:%lx f:%lx)/%d)\n", nfs_i_fscache(inode), page, page->index, page->flags, sync); ret = fscache_write_page(nfs_i_fscache(inode), page, GFP_KERNEL); dfprintk(FSCACHE, "NFS: readpage_to_fscache: p:%p(i:%lu f:%lx) ret %d\n", page, page->index, page->flags, ret); if (ret != 0) { fscache_uncache_page(nfs_i_fscache(inode), page); nfs_inc_fscache_stats(inode, NFSIOS_FSCACHE_PAGES_WRITTEN_FAIL); nfs_inc_fscache_stats(inode, NFSIOS_FSCACHE_PAGES_UNCACHED); } else { nfs_inc_fscache_stats(inode, NFSIOS_FSCACHE_PAGES_WRITTEN_OK); } }
gpl-2.0
matianfu/barcelona_kernel
arch/arm/kernel/sys_arm.c
1940
3458
/* * linux/arch/arm/kernel/sys_arm.c * * Copyright (C) People who wrote linux/arch/i386/kernel/sys_i386.c * Copyright (C) 1995, 1996 Russell King. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * * This file contains various random system calls that * have a non-standard calling sequence on the Linux/arm * platform. */ #include <linux/module.h> #include <linux/errno.h> #include <linux/sched.h> #include <linux/mm.h> #include <linux/sem.h> #include <linux/msg.h> #include <linux/shm.h> #include <linux/stat.h> #include <linux/syscalls.h> #include <linux/mman.h> #include <linux/fs.h> #include <linux/file.h> #include <linux/ipc.h> #include <linux/uaccess.h> #include <linux/slab.h> /* Fork a new task - this creates a new program thread. * This is called indirectly via a small wrapper */ asmlinkage int sys_fork(struct pt_regs *regs) { #ifdef CONFIG_MMU return do_fork(SIGCHLD, regs->ARM_sp, regs, 0, NULL, NULL); #else /* can not support in nommu mode */ return(-EINVAL); #endif } /* Clone a task - this clones the calling program thread. * This is called indirectly via a small wrapper */ asmlinkage int sys_clone(unsigned long clone_flags, unsigned long newsp, int __user *parent_tidptr, int tls_val, int __user *child_tidptr, struct pt_regs *regs) { if (!newsp) newsp = regs->ARM_sp; return do_fork(clone_flags, newsp, regs, 0, parent_tidptr, child_tidptr); } asmlinkage int sys_vfork(struct pt_regs *regs) { return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->ARM_sp, regs, 0, NULL, NULL); } /* sys_execve() executes a new program. * This is called indirectly via a small wrapper */ asmlinkage int sys_execve(const char __user *filenamei, const char __user *const __user *argv, const char __user *const __user *envp, struct pt_regs *regs) { int error; char * filename; filename = getname(filenamei); error = PTR_ERR(filename); if (IS_ERR(filename)) goto out; error = do_execve(filename, argv, envp, regs); putname(filename); out: return error; } int kernel_execve(const char *filename, const char *const argv[], const char *const envp[]) { struct pt_regs regs; int ret; memset(&regs, 0, sizeof(struct pt_regs)); ret = do_execve(filename, (const char __user *const __user *)argv, (const char __user *const __user *)envp, &regs); if (ret < 0) goto out; /* * Save argc to the register structure for userspace. */ regs.ARM_r0 = ret; /* * We were successful. We won't be returning to our caller, but * instead to user space by manipulating the kernel stack. */ asm( "add r0, %0, %1\n\t" "mov r1, %2\n\t" "mov r2, %3\n\t" "bl memmove\n\t" /* copy regs to top of stack */ "mov r8, #0\n\t" /* not a syscall */ "mov r9, %0\n\t" /* thread structure */ "mov sp, r0\n\t" /* reposition stack pointer */ "b ret_to_user" : : "r" (current_thread_info()), "Ir" (THREAD_START_SP - sizeof(regs)), "r" (&regs), "Ir" (sizeof(regs)) : "r0", "r1", "r2", "r3", "ip", "lr", "memory"); out: return ret; } EXPORT_SYMBOL(kernel_execve); /* * Since loff_t is a 64 bit type we avoid a lot of ABI hassle * with a different argument ordering. */ asmlinkage long sys_arm_fadvise64_64(int fd, int advice, loff_t offset, loff_t len) { return sys_fadvise64_64(fd, offset, len, advice); }
gpl-2.0
wpandroidios/android_kernel_htc_b2wlj_LP50_Sense7
net/ipv4/ip_options.c
2964
15324
/* * INET An implementation of the TCP/IP protocol suite for the LINUX * operating system. INET is implemented using the BSD Socket * interface as the means of communication with the user level. * * The options processing module for ip.c * * Authors: A.N.Kuznetsov * */ #define pr_fmt(fmt) "IPv4: " fmt #include <linux/capability.h> #include <linux/module.h> #include <linux/slab.h> #include <linux/types.h> #include <asm/uaccess.h> #include <asm/unaligned.h> #include <linux/skbuff.h> #include <linux/ip.h> #include <linux/icmp.h> #include <linux/netdevice.h> #include <linux/rtnetlink.h> #include <net/sock.h> #include <net/ip.h> #include <net/icmp.h> #include <net/route.h> #include <net/cipso_ipv4.h> /* * Write options to IP header, record destination address to * source route option, address of outgoing interface * (we should already know it, so that this function is allowed be * called only after routing decision) and timestamp, * if we originate this datagram. * * daddr is real destination address, next hop is recorded in IP header. * saddr is address of outgoing interface. */ void ip_options_build(struct sk_buff *skb, struct ip_options *opt, __be32 daddr, struct rtable *rt, int is_frag) { unsigned char *iph = skb_network_header(skb); memcpy(&(IPCB(skb)->opt), opt, sizeof(struct ip_options)); memcpy(iph+sizeof(struct iphdr), opt->__data, opt->optlen); opt = &(IPCB(skb)->opt); if (opt->srr) memcpy(iph+opt->srr+iph[opt->srr+1]-4, &daddr, 4); if (!is_frag) { if (opt->rr_needaddr) ip_rt_get_source(iph+opt->rr+iph[opt->rr+2]-5, skb, rt); if (opt->ts_needaddr) ip_rt_get_source(iph+opt->ts+iph[opt->ts+2]-9, skb, rt); if (opt->ts_needtime) { struct timespec tv; __be32 midtime; getnstimeofday(&tv); midtime = htonl((tv.tv_sec % 86400) * MSEC_PER_SEC + tv.tv_nsec / NSEC_PER_MSEC); memcpy(iph+opt->ts+iph[opt->ts+2]-5, &midtime, 4); } return; } if (opt->rr) { memset(iph+opt->rr, IPOPT_NOP, iph[opt->rr+1]); opt->rr = 0; opt->rr_needaddr = 0; } if (opt->ts) { memset(iph+opt->ts, IPOPT_NOP, iph[opt->ts+1]); opt->ts = 0; opt->ts_needaddr = opt->ts_needtime = 0; } } /* * Provided (sopt, skb) points to received options, * build in dopt compiled option set appropriate for answering. * i.e. invert SRR option, copy anothers, * and grab room in RR/TS options. * * NOTE: dopt cannot point to skb. */ int ip_options_echo(struct ip_options *dopt, struct sk_buff *skb) { const struct ip_options *sopt; unsigned char *sptr, *dptr; int soffset, doffset; int optlen; __be32 daddr; memset(dopt, 0, sizeof(struct ip_options)); sopt = &(IPCB(skb)->opt); if (sopt->optlen == 0) return 0; sptr = skb_network_header(skb); dptr = dopt->__data; daddr = skb_rtable(skb)->rt_spec_dst; if (sopt->rr) { optlen = sptr[sopt->rr+1]; soffset = sptr[sopt->rr+2]; dopt->rr = dopt->optlen + sizeof(struct iphdr); memcpy(dptr, sptr+sopt->rr, optlen); if (sopt->rr_needaddr && soffset <= optlen) { if (soffset + 3 > optlen) return -EINVAL; dptr[2] = soffset + 4; dopt->rr_needaddr = 1; } dptr += optlen; dopt->optlen += optlen; } if (sopt->ts) { optlen = sptr[sopt->ts+1]; soffset = sptr[sopt->ts+2]; dopt->ts = dopt->optlen + sizeof(struct iphdr); memcpy(dptr, sptr+sopt->ts, optlen); if (soffset <= optlen) { if (sopt->ts_needaddr) { if (soffset + 3 > optlen) return -EINVAL; dopt->ts_needaddr = 1; soffset += 4; } if (sopt->ts_needtime) { if (soffset + 3 > optlen) return -EINVAL; if ((dptr[3]&0xF) != IPOPT_TS_PRESPEC) { dopt->ts_needtime = 1; soffset += 4; } else { dopt->ts_needtime = 0; if (soffset + 7 <= optlen) { __be32 addr; memcpy(&addr, dptr+soffset-1, 4); if (inet_addr_type(dev_net(skb_dst(skb)->dev), addr) != RTN_UNICAST) { dopt->ts_needtime = 1; soffset += 8; } } } } dptr[2] = soffset; } dptr += optlen; dopt->optlen += optlen; } if (sopt->srr) { unsigned char *start = sptr+sopt->srr; __be32 faddr; optlen = start[1]; soffset = start[2]; doffset = 0; if (soffset > optlen) soffset = optlen + 1; soffset -= 4; if (soffset > 3) { memcpy(&faddr, &start[soffset-1], 4); for (soffset-=4, doffset=4; soffset > 3; soffset-=4, doffset+=4) memcpy(&dptr[doffset-1], &start[soffset-1], 4); /* * RFC1812 requires to fix illegal source routes. */ if (memcmp(&ip_hdr(skb)->saddr, &start[soffset + 3], 4) == 0) doffset -= 4; } if (doffset > 3) { memcpy(&start[doffset-1], &daddr, 4); dopt->faddr = faddr; dptr[0] = start[0]; dptr[1] = doffset+3; dptr[2] = 4; dptr += doffset+3; dopt->srr = dopt->optlen + sizeof(struct iphdr); dopt->optlen += doffset+3; dopt->is_strictroute = sopt->is_strictroute; } } if (sopt->cipso) { optlen = sptr[sopt->cipso+1]; dopt->cipso = dopt->optlen+sizeof(struct iphdr); memcpy(dptr, sptr+sopt->cipso, optlen); dptr += optlen; dopt->optlen += optlen; } while (dopt->optlen & 3) { *dptr++ = IPOPT_END; dopt->optlen++; } return 0; } /* * Options "fragmenting", just fill options not * allowed in fragments with NOOPs. * Simple and stupid 8), but the most efficient way. */ void ip_options_fragment(struct sk_buff * skb) { unsigned char *optptr = skb_network_header(skb) + sizeof(struct iphdr); struct ip_options * opt = &(IPCB(skb)->opt); int l = opt->optlen; int optlen; while (l > 0) { switch (*optptr) { case IPOPT_END: return; case IPOPT_NOOP: l--; optptr++; continue; } optlen = optptr[1]; if (optlen<2 || optlen>l) return; if (!IPOPT_COPIED(*optptr)) memset(optptr, IPOPT_NOOP, optlen); l -= optlen; optptr += optlen; } opt->ts = 0; opt->rr = 0; opt->rr_needaddr = 0; opt->ts_needaddr = 0; opt->ts_needtime = 0; } /* * Verify options and fill pointers in struct options. * Caller should clear *opt, and set opt->data. * If opt == NULL, then skb->data should point to IP header. */ int ip_options_compile(struct net *net, struct ip_options * opt, struct sk_buff * skb) { int l; unsigned char * iph; unsigned char * optptr; int optlen; unsigned char * pp_ptr = NULL; struct rtable *rt = NULL; if (skb != NULL) { rt = skb_rtable(skb); optptr = (unsigned char *)&(ip_hdr(skb)[1]); } else optptr = opt->__data; iph = optptr - sizeof(struct iphdr); for (l = opt->optlen; l > 0; ) { switch (*optptr) { case IPOPT_END: for (optptr++, l--; l>0; optptr++, l--) { if (*optptr != IPOPT_END) { *optptr = IPOPT_END; opt->is_changed = 1; } } goto eol; case IPOPT_NOOP: l--; optptr++; continue; } optlen = optptr[1]; if (optlen<2 || optlen>l) { pp_ptr = optptr; goto error; } switch (*optptr) { case IPOPT_SSRR: case IPOPT_LSRR: if (optlen < 3) { pp_ptr = optptr + 1; goto error; } if (optptr[2] < 4) { pp_ptr = optptr + 2; goto error; } /* NB: cf RFC-1812 5.2.4.1 */ if (opt->srr) { pp_ptr = optptr; goto error; } if (!skb) { if (optptr[2] != 4 || optlen < 7 || ((optlen-3) & 3)) { pp_ptr = optptr + 1; goto error; } memcpy(&opt->faddr, &optptr[3], 4); if (optlen > 7) memmove(&optptr[3], &optptr[7], optlen-7); } opt->is_strictroute = (optptr[0] == IPOPT_SSRR); opt->srr = optptr - iph; break; case IPOPT_RR: if (opt->rr) { pp_ptr = optptr; goto error; } if (optlen < 3) { pp_ptr = optptr + 1; goto error; } if (optptr[2] < 4) { pp_ptr = optptr + 2; goto error; } if (optptr[2] <= optlen) { if (optptr[2]+3 > optlen) { pp_ptr = optptr + 2; goto error; } if (rt) { memcpy(&optptr[optptr[2]-1], &rt->rt_spec_dst, 4); opt->is_changed = 1; } optptr[2] += 4; opt->rr_needaddr = 1; } opt->rr = optptr - iph; break; case IPOPT_TIMESTAMP: if (opt->ts) { pp_ptr = optptr; goto error; } if (optlen < 4) { pp_ptr = optptr + 1; goto error; } if (optptr[2] < 5) { pp_ptr = optptr + 2; goto error; } if (optptr[2] <= optlen) { unsigned char *timeptr = NULL; if (optptr[2]+3 > optptr[1]) { pp_ptr = optptr + 2; goto error; } switch (optptr[3]&0xF) { case IPOPT_TS_TSONLY: opt->ts = optptr - iph; if (skb) timeptr = &optptr[optptr[2]-1]; opt->ts_needtime = 1; optptr[2] += 4; break; case IPOPT_TS_TSANDADDR: if (optptr[2]+7 > optptr[1]) { pp_ptr = optptr + 2; goto error; } opt->ts = optptr - iph; if (rt) { memcpy(&optptr[optptr[2]-1], &rt->rt_spec_dst, 4); timeptr = &optptr[optptr[2]+3]; } opt->ts_needaddr = 1; opt->ts_needtime = 1; optptr[2] += 8; break; case IPOPT_TS_PRESPEC: if (optptr[2]+7 > optptr[1]) { pp_ptr = optptr + 2; goto error; } opt->ts = optptr - iph; { __be32 addr; memcpy(&addr, &optptr[optptr[2]-1], 4); if (inet_addr_type(net, addr) == RTN_UNICAST) break; if (skb) timeptr = &optptr[optptr[2]+3]; } opt->ts_needtime = 1; optptr[2] += 8; break; default: if (!skb && !capable(CAP_NET_RAW)) { pp_ptr = optptr + 3; goto error; } break; } if (timeptr) { struct timespec tv; u32 midtime; getnstimeofday(&tv); midtime = (tv.tv_sec % 86400) * MSEC_PER_SEC + tv.tv_nsec / NSEC_PER_MSEC; put_unaligned_be32(midtime, timeptr); opt->is_changed = 1; } } else { unsigned overflow = optptr[3]>>4; if (overflow == 15) { pp_ptr = optptr + 3; goto error; } opt->ts = optptr - iph; if (skb) { optptr[3] = (optptr[3]&0xF)|((overflow+1)<<4); opt->is_changed = 1; } } break; case IPOPT_RA: if (optlen < 4) { pp_ptr = optptr + 1; goto error; } if (optptr[2] == 0 && optptr[3] == 0) opt->router_alert = optptr - iph; break; case IPOPT_CIPSO: if ((!skb && !capable(CAP_NET_RAW)) || opt->cipso) { pp_ptr = optptr; goto error; } opt->cipso = optptr - iph; if (cipso_v4_validate(skb, &optptr)) { pp_ptr = optptr; goto error; } break; case IPOPT_SEC: case IPOPT_SID: default: if (!skb && !capable(CAP_NET_RAW)) { pp_ptr = optptr; goto error; } break; } l -= optlen; optptr += optlen; } eol: if (!pp_ptr) return 0; error: if (skb) { icmp_send(skb, ICMP_PARAMETERPROB, 0, htonl((pp_ptr-iph)<<24)); } return -EINVAL; } EXPORT_SYMBOL(ip_options_compile); /* * Undo all the changes done by ip_options_compile(). */ void ip_options_undo(struct ip_options * opt) { if (opt->srr) { unsigned char * optptr = opt->__data+opt->srr-sizeof(struct iphdr); memmove(optptr+7, optptr+3, optptr[1]-7); memcpy(optptr+3, &opt->faddr, 4); } if (opt->rr_needaddr) { unsigned char * optptr = opt->__data+opt->rr-sizeof(struct iphdr); optptr[2] -= 4; memset(&optptr[optptr[2]-1], 0, 4); } if (opt->ts) { unsigned char * optptr = opt->__data+opt->ts-sizeof(struct iphdr); if (opt->ts_needtime) { optptr[2] -= 4; memset(&optptr[optptr[2]-1], 0, 4); if ((optptr[3]&0xF) == IPOPT_TS_PRESPEC) optptr[2] -= 4; } if (opt->ts_needaddr) { optptr[2] -= 4; memset(&optptr[optptr[2]-1], 0, 4); } } } static struct ip_options_rcu *ip_options_get_alloc(const int optlen) { return kzalloc(sizeof(struct ip_options_rcu) + ((optlen + 3) & ~3), GFP_KERNEL); } static int ip_options_get_finish(struct net *net, struct ip_options_rcu **optp, struct ip_options_rcu *opt, int optlen) { while (optlen & 3) opt->opt.__data[optlen++] = IPOPT_END; opt->opt.optlen = optlen; if (optlen && ip_options_compile(net, &opt->opt, NULL)) { kfree(opt); return -EINVAL; } kfree(*optp); *optp = opt; return 0; } int ip_options_get_from_user(struct net *net, struct ip_options_rcu **optp, unsigned char __user *data, int optlen) { struct ip_options_rcu *opt = ip_options_get_alloc(optlen); if (!opt) return -ENOMEM; if (optlen && copy_from_user(opt->opt.__data, data, optlen)) { kfree(opt); return -EFAULT; } return ip_options_get_finish(net, optp, opt, optlen); } int ip_options_get(struct net *net, struct ip_options_rcu **optp, unsigned char *data, int optlen) { struct ip_options_rcu *opt = ip_options_get_alloc(optlen); if (!opt) return -ENOMEM; if (optlen) memcpy(opt->opt.__data, data, optlen); return ip_options_get_finish(net, optp, opt, optlen); } void ip_forward_options(struct sk_buff *skb) { struct ip_options * opt = &(IPCB(skb)->opt); unsigned char * optptr; struct rtable *rt = skb_rtable(skb); unsigned char *raw = skb_network_header(skb); if (opt->rr_needaddr) { optptr = (unsigned char *)raw + opt->rr; ip_rt_get_source(&optptr[optptr[2]-5], skb, rt); opt->is_changed = 1; } if (opt->srr_is_hit) { int srrptr, srrspace; optptr = raw + opt->srr; for ( srrptr=optptr[2], srrspace = optptr[1]; srrptr <= srrspace; srrptr += 4 ) { if (srrptr + 3 > srrspace) break; if (memcmp(&opt->nexthop, &optptr[srrptr-1], 4) == 0) break; } if (srrptr + 3 <= srrspace) { opt->is_changed = 1; ip_hdr(skb)->daddr = opt->nexthop; ip_rt_get_source(&optptr[srrptr-1], skb, rt); optptr[2] = srrptr+4; } else if (net_ratelimit()) pr_crit("%s(): Argh! Destination lost!\n", __func__); if (opt->ts_needaddr) { optptr = raw + opt->ts; ip_rt_get_source(&optptr[optptr[2]-9], skb, rt); opt->is_changed = 1; } } if (opt->is_changed) { opt->is_changed = 0; ip_send_check(ip_hdr(skb)); } } int ip_options_rcv_srr(struct sk_buff *skb) { struct ip_options *opt = &(IPCB(skb)->opt); int srrspace, srrptr; __be32 nexthop; struct iphdr *iph = ip_hdr(skb); unsigned char *optptr = skb_network_header(skb) + opt->srr; struct rtable *rt = skb_rtable(skb); struct rtable *rt2; unsigned long orefdst; int err; if (!rt) return 0; if (skb->pkt_type != PACKET_HOST) return -EINVAL; if (rt->rt_type == RTN_UNICAST) { if (!opt->is_strictroute) return 0; icmp_send(skb, ICMP_PARAMETERPROB, 0, htonl(16<<24)); return -EINVAL; } if (rt->rt_type != RTN_LOCAL) return -EINVAL; for (srrptr=optptr[2], srrspace = optptr[1]; srrptr <= srrspace; srrptr += 4) { if (srrptr + 3 > srrspace) { icmp_send(skb, ICMP_PARAMETERPROB, 0, htonl((opt->srr+2)<<24)); return -EINVAL; } memcpy(&nexthop, &optptr[srrptr-1], 4); orefdst = skb->_skb_refdst; skb_dst_set(skb, NULL); err = ip_route_input(skb, nexthop, iph->saddr, iph->tos, skb->dev); rt2 = skb_rtable(skb); if (err || (rt2->rt_type != RTN_UNICAST && rt2->rt_type != RTN_LOCAL)) { skb_dst_drop(skb); skb->_skb_refdst = orefdst; return -EINVAL; } refdst_drop(orefdst); if (rt2->rt_type != RTN_LOCAL) break; /* Superfast 8) loopback forward */ iph->daddr = nexthop; opt->is_changed = 1; } if (srrptr <= srrspace) { opt->srr_is_hit = 1; opt->nexthop = nexthop; opt->is_changed = 1; } return 0; } EXPORT_SYMBOL(ip_options_rcv_srr);
gpl-2.0
dagnarf/i717morepower
drivers/isdn/mISDN/dsp_pipeline.c
3988
8372
/* * dsp_pipeline.c: pipelined audio processing * * Copyright (C) 2007, Nadi Sarrar * * Nadi Sarrar <nadi@beronet.com> * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the Free * Software Foundation; either version 2 of the License, or (at your option) * any later version. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., 59 * Temple Place - Suite 330, Boston, MA 02111-1307, USA. * * The full GNU General Public License is included in this distribution in the * file called LICENSE. * */ #include <linux/kernel.h> #include <linux/slab.h> #include <linux/list.h> #include <linux/string.h> #include <linux/mISDNif.h> #include <linux/mISDNdsp.h> #include "dsp.h" #include "dsp_hwec.h" /* uncomment for debugging */ /*#define PIPELINE_DEBUG*/ struct dsp_pipeline_entry { struct mISDN_dsp_element *elem; void *p; struct list_head list; }; struct dsp_element_entry { struct mISDN_dsp_element *elem; struct device dev; struct list_head list; }; static LIST_HEAD(dsp_elements); /* sysfs */ static struct class *elements_class; static ssize_t attr_show_args(struct device *dev, struct device_attribute *attr, char *buf) { struct mISDN_dsp_element *elem = dev_get_drvdata(dev); int i; char *p = buf; *buf = 0; for (i = 0; i < elem->num_args; i++) p += sprintf(p, "Name: %s\n%s%s%sDescription: %s\n\n", elem->args[i].name, elem->args[i].def ? "Default: " : "", elem->args[i].def ? elem->args[i].def : "", elem->args[i].def ? "\n" : "", elem->args[i].desc); return p - buf; } static struct device_attribute element_attributes[] = { __ATTR(args, 0444, attr_show_args, NULL), }; static void mISDN_dsp_dev_release(struct device *dev) { struct dsp_element_entry *entry = container_of(dev, struct dsp_element_entry, dev); list_del(&entry->list); kfree(entry); } int mISDN_dsp_element_register(struct mISDN_dsp_element *elem) { struct dsp_element_entry *entry; int ret, i; if (!elem) return -EINVAL; entry = kzalloc(sizeof(struct dsp_element_entry), GFP_ATOMIC); if (!entry) return -ENOMEM; entry->elem = elem; entry->dev.class = elements_class; entry->dev.release = mISDN_dsp_dev_release; dev_set_drvdata(&entry->dev, elem); dev_set_name(&entry->dev, elem->name); ret = device_register(&entry->dev); if (ret) { printk(KERN_ERR "%s: failed to register %s\n", __func__, elem->name); goto err1; } list_add_tail(&entry->list, &dsp_elements); for (i = 0; i < ARRAY_SIZE(element_attributes); ++i) { ret = device_create_file(&entry->dev, &element_attributes[i]); if (ret) { printk(KERN_ERR "%s: failed to create device file\n", __func__); goto err2; } } #ifdef PIPELINE_DEBUG printk(KERN_DEBUG "%s: %s registered\n", __func__, elem->name); #endif return 0; err2: device_unregister(&entry->dev); return ret; err1: kfree(entry); return ret; } EXPORT_SYMBOL(mISDN_dsp_element_register); void mISDN_dsp_element_unregister(struct mISDN_dsp_element *elem) { struct dsp_element_entry *entry, *n; if (!elem) return; list_for_each_entry_safe(entry, n, &dsp_elements, list) if (entry->elem == elem) { device_unregister(&entry->dev); #ifdef PIPELINE_DEBUG printk(KERN_DEBUG "%s: %s unregistered\n", __func__, elem->name); #endif return; } printk(KERN_ERR "%s: element %s not in list.\n", __func__, elem->name); } EXPORT_SYMBOL(mISDN_dsp_element_unregister); int dsp_pipeline_module_init(void) { elements_class = class_create(THIS_MODULE, "dsp_pipeline"); if (IS_ERR(elements_class)) return PTR_ERR(elements_class); #ifdef PIPELINE_DEBUG printk(KERN_DEBUG "%s: dsp pipeline module initialized\n", __func__); #endif dsp_hwec_init(); return 0; } void dsp_pipeline_module_exit(void) { struct dsp_element_entry *entry, *n; dsp_hwec_exit(); class_destroy(elements_class); list_for_each_entry_safe(entry, n, &dsp_elements, list) { list_del(&entry->list); printk(KERN_WARNING "%s: element was still registered: %s\n", __func__, entry->elem->name); kfree(entry); } #ifdef PIPELINE_DEBUG printk(KERN_DEBUG "%s: dsp pipeline module exited\n", __func__); #endif } int dsp_pipeline_init(struct dsp_pipeline *pipeline) { if (!pipeline) return -EINVAL; INIT_LIST_HEAD(&pipeline->list); #ifdef PIPELINE_DEBUG printk(KERN_DEBUG "%s: dsp pipeline ready\n", __func__); #endif return 0; } static inline void _dsp_pipeline_destroy(struct dsp_pipeline *pipeline) { struct dsp_pipeline_entry *entry, *n; list_for_each_entry_safe(entry, n, &pipeline->list, list) { list_del(&entry->list); if (entry->elem == dsp_hwec) dsp_hwec_disable(container_of(pipeline, struct dsp, pipeline)); else entry->elem->free(entry->p); kfree(entry); } } void dsp_pipeline_destroy(struct dsp_pipeline *pipeline) { if (!pipeline) return; _dsp_pipeline_destroy(pipeline); #ifdef PIPELINE_DEBUG printk(KERN_DEBUG "%s: dsp pipeline destroyed\n", __func__); #endif } int dsp_pipeline_build(struct dsp_pipeline *pipeline, const char *cfg) { int len, incomplete = 0, found = 0; char *dup, *tok, *name, *args; struct dsp_element_entry *entry, *n; struct dsp_pipeline_entry *pipeline_entry; struct mISDN_dsp_element *elem; if (!pipeline) return -EINVAL; if (!list_empty(&pipeline->list)) _dsp_pipeline_destroy(pipeline); if (!cfg) return 0; len = strlen(cfg); if (!len) return 0; dup = kmalloc(len + 1, GFP_ATOMIC); if (!dup) return 0; strcpy(dup, cfg); while ((tok = strsep(&dup, "|"))) { if (!strlen(tok)) continue; name = strsep(&tok, "("); args = strsep(&tok, ")"); if (args && !*args) args = NULL; list_for_each_entry_safe(entry, n, &dsp_elements, list) if (!strcmp(entry->elem->name, name)) { elem = entry->elem; pipeline_entry = kmalloc(sizeof(struct dsp_pipeline_entry), GFP_ATOMIC); if (!pipeline_entry) { printk(KERN_ERR "%s: failed to add " "entry to pipeline: %s (out of " "memory)\n", __func__, elem->name); incomplete = 1; goto _out; } pipeline_entry->elem = elem; if (elem == dsp_hwec) { /* This is a hack to make the hwec available as a pipeline module */ dsp_hwec_enable(container_of(pipeline, struct dsp, pipeline), args); list_add_tail(&pipeline_entry->list, &pipeline->list); } else { pipeline_entry->p = elem->new(args); if (pipeline_entry->p) { list_add_tail(&pipeline_entry-> list, &pipeline->list); #ifdef PIPELINE_DEBUG printk(KERN_DEBUG "%s: created " "instance of %s%s%s\n", __func__, name, args ? " with args " : "", args ? args : ""); #endif } else { printk(KERN_ERR "%s: failed " "to add entry to pipeline: " "%s (new() returned NULL)\n", __func__, elem->name); kfree(pipeline_entry); incomplete = 1; } } found = 1; break; } if (found) found = 0; else { printk(KERN_ERR "%s: element not found, skipping: " "%s\n", __func__, name); incomplete = 1; } } _out: if (!list_empty(&pipeline->list)) pipeline->inuse = 1; else pipeline->inuse = 0; #ifdef PIPELINE_DEBUG printk(KERN_DEBUG "%s: dsp pipeline built%s: %s\n", __func__, incomplete ? " incomplete" : "", cfg); #endif kfree(dup); return 0; } void dsp_pipeline_process_tx(struct dsp_pipeline *pipeline, u8 *data, int len) { struct dsp_pipeline_entry *entry; if (!pipeline) return; list_for_each_entry(entry, &pipeline->list, list) if (entry->elem->process_tx) entry->elem->process_tx(entry->p, data, len); } void dsp_pipeline_process_rx(struct dsp_pipeline *pipeline, u8 *data, int len, unsigned int txlen) { struct dsp_pipeline_entry *entry; if (!pipeline) return; list_for_each_entry_reverse(entry, &pipeline->list, list) if (entry->elem->process_rx) entry->elem->process_rx(entry->p, data, len, txlen); }
gpl-2.0
Spartaner25/android_kernel_quanta_fg6q
arch/arm/mach-omap2/board-generic.c
4756
4020
/* * Copyright (C) 2005 Nokia Corporation * Author: Paul Mundt <paul.mundt@nokia.com> * * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ * * Modified from the original mach-omap/omap2/board-generic.c did by Paul * to support the OMAP2+ device tree boards with an unique board file. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ #include <linux/io.h> #include <linux/of_irq.h> #include <linux/of_platform.h> #include <linux/irqdomain.h> #include <linux/i2c/twl.h> #include <mach/hardware.h> #include <asm/hardware/gic.h> #include <asm/mach/arch.h> #include <plat/board.h> #include "common.h" #include "common-board-devices.h" #if !(defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)) #define omap_intc_of_init NULL #endif #ifndef CONFIG_ARCH_OMAP4 #define gic_of_init NULL #endif static struct of_device_id irq_match[] __initdata = { { .compatible = "ti,omap2-intc", .data = omap_intc_of_init, }, { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, { } }; static void __init omap_init_irq(void) { of_irq_init(irq_match); } static struct of_device_id omap_dt_match_table[] __initdata = { { .compatible = "simple-bus", }, { .compatible = "ti,omap-infra", }, { } }; static void __init omap_generic_init(void) { omap_sdrc_init(NULL, NULL); of_platform_populate(NULL, omap_dt_match_table, NULL, NULL); } #ifdef CONFIG_SOC_OMAP2420 static const char *omap242x_boards_compat[] __initdata = { "ti,omap2420", NULL, }; DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)") .reserve = omap_reserve, .map_io = omap242x_map_io, .init_early = omap2420_init_early, .init_irq = omap_init_irq, .handle_irq = omap2_intc_handle_irq, .init_machine = omap_generic_init, .timer = &omap2_timer, .dt_compat = omap242x_boards_compat, .restart = omap_prcm_restart, MACHINE_END #endif #ifdef CONFIG_SOC_OMAP2430 static const char *omap243x_boards_compat[] __initdata = { "ti,omap2430", NULL, }; DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)") .reserve = omap_reserve, .map_io = omap243x_map_io, .init_early = omap2430_init_early, .init_irq = omap_init_irq, .handle_irq = omap2_intc_handle_irq, .init_machine = omap_generic_init, .timer = &omap2_timer, .dt_compat = omap243x_boards_compat, .restart = omap_prcm_restart, MACHINE_END #endif #ifdef CONFIG_ARCH_OMAP3 static struct twl4030_platform_data beagle_twldata = { .irq_base = TWL4030_IRQ_BASE, .irq_end = TWL4030_IRQ_END, }; static void __init omap3_i2c_init(void) { omap3_pmic_init("twl4030", &beagle_twldata); } static void __init omap3_init(void) { omap3_i2c_init(); omap_generic_init(); } static const char *omap3_boards_compat[] __initdata = { "ti,omap3", NULL, }; DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)") .reserve = omap_reserve, .map_io = omap3_map_io, .init_early = omap3430_init_early, .init_irq = omap_init_irq, .handle_irq = omap3_intc_handle_irq, .init_machine = omap3_init, .timer = &omap3_timer, .dt_compat = omap3_boards_compat, .restart = omap_prcm_restart, MACHINE_END #endif #ifdef CONFIG_ARCH_OMAP4 static struct twl4030_platform_data sdp4430_twldata = { .irq_base = TWL6030_IRQ_BASE, .irq_end = TWL6030_IRQ_END, }; static void __init omap4_i2c_init(void) { omap4_pmic_init("twl6030", &sdp4430_twldata, NULL, 0); } static void __init omap4_init(void) { omap4_i2c_init(); omap_generic_init(); } static const char *omap4_boards_compat[] __initdata = { "ti,omap4", NULL, }; DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)") .reserve = omap_reserve, .map_io = omap4_map_io, .init_early = omap4430_init_early, .init_irq = omap_init_irq, .handle_irq = gic_handle_irq, .init_machine = omap4_init, .timer = &omap4_timer, .dt_compat = omap4_boards_compat, .restart = omap_prcm_restart, MACHINE_END #endif
gpl-2.0
zarboz/nvidia_shield
drivers/edac/amd64_edac_inj.c
8084
5121
#include "amd64_edac.h" static ssize_t amd64_inject_section_show(struct mem_ctl_info *mci, char *buf) { struct amd64_pvt *pvt = mci->pvt_info; return sprintf(buf, "0x%x\n", pvt->injection.section); } /* * store error injection section value which refers to one of 4 16-byte sections * within a 64-byte cacheline * * range: 0..3 */ static ssize_t amd64_inject_section_store(struct mem_ctl_info *mci, const char *data, size_t count) { struct amd64_pvt *pvt = mci->pvt_info; unsigned long value; int ret = 0; ret = strict_strtoul(data, 10, &value); if (ret != -EINVAL) { if (value > 3) { amd64_warn("%s: invalid section 0x%lx\n", __func__, value); return -EINVAL; } pvt->injection.section = (u32) value; return count; } return ret; } static ssize_t amd64_inject_word_show(struct mem_ctl_info *mci, char *buf) { struct amd64_pvt *pvt = mci->pvt_info; return sprintf(buf, "0x%x\n", pvt->injection.word); } /* * store error injection word value which refers to one of 9 16-bit word of the * 16-byte (128-bit + ECC bits) section * * range: 0..8 */ static ssize_t amd64_inject_word_store(struct mem_ctl_info *mci, const char *data, size_t count) { struct amd64_pvt *pvt = mci->pvt_info; unsigned long value; int ret = 0; ret = strict_strtoul(data, 10, &value); if (ret != -EINVAL) { if (value > 8) { amd64_warn("%s: invalid word 0x%lx\n", __func__, value); return -EINVAL; } pvt->injection.word = (u32) value; return count; } return ret; } static ssize_t amd64_inject_ecc_vector_show(struct mem_ctl_info *mci, char *buf) { struct amd64_pvt *pvt = mci->pvt_info; return sprintf(buf, "0x%x\n", pvt->injection.bit_map); } /* * store 16 bit error injection vector which enables injecting errors to the * corresponding bit within the error injection word above. When used during a * DRAM ECC read, it holds the contents of the of the DRAM ECC bits. */ static ssize_t amd64_inject_ecc_vector_store(struct mem_ctl_info *mci, const char *data, size_t count) { struct amd64_pvt *pvt = mci->pvt_info; unsigned long value; int ret = 0; ret = strict_strtoul(data, 16, &value); if (ret != -EINVAL) { if (value & 0xFFFF0000) { amd64_warn("%s: invalid EccVector: 0x%lx\n", __func__, value); return -EINVAL; } pvt->injection.bit_map = (u32) value; return count; } return ret; } /* * Do a DRAM ECC read. Assemble staged values in the pvt area, format into * fields needed by the injection registers and read the NB Array Data Port. */ static ssize_t amd64_inject_read_store(struct mem_ctl_info *mci, const char *data, size_t count) { struct amd64_pvt *pvt = mci->pvt_info; unsigned long value; u32 section, word_bits; int ret = 0; ret = strict_strtoul(data, 10, &value); if (ret != -EINVAL) { /* Form value to choose 16-byte section of cacheline */ section = F10_NB_ARRAY_DRAM_ECC | SET_NB_ARRAY_ADDRESS(pvt->injection.section); amd64_write_pci_cfg(pvt->F3, F10_NB_ARRAY_ADDR, section); word_bits = SET_NB_DRAM_INJECTION_READ(pvt->injection.word, pvt->injection.bit_map); /* Issue 'word' and 'bit' along with the READ request */ amd64_write_pci_cfg(pvt->F3, F10_NB_ARRAY_DATA, word_bits); debugf0("section=0x%x word_bits=0x%x\n", section, word_bits); return count; } return ret; } /* * Do a DRAM ECC write. Assemble staged values in the pvt area and format into * fields needed by the injection registers. */ static ssize_t amd64_inject_write_store(struct mem_ctl_info *mci, const char *data, size_t count) { struct amd64_pvt *pvt = mci->pvt_info; unsigned long value; u32 section, word_bits; int ret = 0; ret = strict_strtoul(data, 10, &value); if (ret != -EINVAL) { /* Form value to choose 16-byte section of cacheline */ section = F10_NB_ARRAY_DRAM_ECC | SET_NB_ARRAY_ADDRESS(pvt->injection.section); amd64_write_pci_cfg(pvt->F3, F10_NB_ARRAY_ADDR, section); word_bits = SET_NB_DRAM_INJECTION_WRITE(pvt->injection.word, pvt->injection.bit_map); /* Issue 'word' and 'bit' along with the READ request */ amd64_write_pci_cfg(pvt->F3, F10_NB_ARRAY_DATA, word_bits); debugf0("section=0x%x word_bits=0x%x\n", section, word_bits); return count; } return ret; } /* * update NUM_INJ_ATTRS in case you add new members */ struct mcidev_sysfs_attribute amd64_inj_attrs[] = { { .attr = { .name = "inject_section", .mode = (S_IRUGO | S_IWUSR) }, .show = amd64_inject_section_show, .store = amd64_inject_section_store, }, { .attr = { .name = "inject_word", .mode = (S_IRUGO | S_IWUSR) }, .show = amd64_inject_word_show, .store = amd64_inject_word_store, }, { .attr = { .name = "inject_ecc_vector", .mode = (S_IRUGO | S_IWUSR) }, .show = amd64_inject_ecc_vector_show, .store = amd64_inject_ecc_vector_store, }, { .attr = { .name = "inject_write", .mode = (S_IRUGO | S_IWUSR) }, .show = NULL, .store = amd64_inject_write_store, }, { .attr = { .name = "inject_read", .mode = (S_IRUGO | S_IWUSR) }, .show = NULL, .store = amd64_inject_read_store, }, };
gpl-2.0
TDR/Xoom
drivers/staging/wlags49_h2/ap_h25.c
9364
390532
/* * File: ap_h54.124 * * Abstract: This file contains memory image 'fw_image'. * * Contents: Total size of the memory image: 63146 bytes. * Total number of blocks: 4 blocks. * Block 1 : load address 00000060, 328 bytes. * Block 2 : load address 00000C16, 9266 bytes. * Block 3 : load address 001E3048, 6476 bytes. * Block 4 : load address 001F4000, 47076 bytes. * * Identity: component id: 32 (variant 3) version 1.24 * * Compatibility: * supplying interface 8 (variant 4) : 1 - 1 * acting on interface 1 (variant 7) : 3 - 3 * acting on interface 1 (variant 8) : 1 - 1 * acting on interface 2 (variant 4) : 1 - 2 * * Generated: by g:\fw\fupu3.exe version 4.26 * * Commandline: g:\fw\fupu3.exe /f=4 /n=fw_image /i=t3012400.hex */ #include "hcfcfg.h" // to get hcf_16 etc defined as well as // possible settings which inluence mdd.h or dhf.h #include "mdd.h" //to get COMP_ID_STA etc defined #include "dhf.h" //used to be "fhfmem.h", to get memblock,plugrecord, static const hcf_8 fw_image_1_data[] = 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x09, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xEA, 0x00, 0x00, 0xFF, 0x07, 0x02, 0x00, 0x64, 0x00, 0x64, 0x00, 0x10, 0x27, 0x10, 0x27, 0x14, 0x00, 0xD0, 0x07, 0xD0, 0x07, 0x10, 0x27, 0x2F, 0x00, 0x32, 0x00, 0x32, 0x00, 0x05, 0x00, 0x02, 0x00, 0x02, 0x00, 0x10, 0x27, 0x05, 0x00, 0x00, 0x02, 0x00, 0x02, 0x13, 0x00, 0x07, 0x00, 0x03, 0x00, 0x32, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2A, 0x09, 0x2B, 0x09, 0x2B, 0x09, 0xFF, 0x0F, 0xF0, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x14, 0x01, 0x00, 0x40, 0x00, 0x32, 0x00, 0x32, 0x00, 0x0A, 0x00, 0x02, 0x00, 0x06, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, }; /* fw_image_1_data */ static const hcf_8 fw_image_2_data[] = { 0x7C, 0xA4, 0x00, 0x16, 0x08, 0x40, 0x0F, 0xD2, 0xE1, 0x28, 0xA5, 0x7C, 0x50, 0x30, 0xF1, 0x84, 0x44, 0x08, 0xAB, 0xAE, 0xA5, 0xB8, 0xFC, 0xBA, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 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0x3C, 0x28, 0x79, 0xA7, 0xE2, 0xBC, 0x1D, 0x16, 0x76, 0xAD, 0x3B, 0xDB, 0x56, 0x64, 0x4E, 0x74, 0x1E, 0x14, 0xDB, 0x92, 0x0A, 0x0C, 0x6C, 0x48, 0xE4, 0xB8, 0x5D, 0x9F, 0x6E, 0xBD, 0xEF, 0x43, 0xA6, 0xC4, 0xA8, 0x39, 0xA4, 0x31, 0x37, 0xD3, 0x8B, 0xF2, 0x32, 0xD5, 0x43, 0x8B, 0x59, 0x6E, 0xB7, 0xDA, 0x8C, 0x01, 0x64, 0xB1, 0xD2, 0x9C, 0xE0, 0x49, 0xB4, 0xD8, 0xFA, 0xAC, 0x07, 0xF3, 0x25, 0xCF, 0xAF, 0xCA, 0x8E, 0xF4, 0xE9, 0x47, 0x18, 0x10, 0xD5, 0x6F, 0x88, 0xF0, 0x6F, 0x4A, 0x72, 0x5C, 0x24, 0x38, 0xF1, 0x57, 0xC7, 0x73, 0x51, 0x97, 0x23, 0xCB, 0x7C, 0xA1, 0x9C, 0xE8, 0x21, 0x3E, 0xDD, 0x96, 0xDC, 0x61, 0x86, 0x0D, 0x85, 0x0F, 0x90, 0xE0, 0x42, 0x7C, 0xC4, 0x71, 0xAA, 0xCC, 0xD8, 0x90, 0x05, 0x06, 0x01, 0xF7, 0x12, 0x1C, 0xA3, 0xC2, 0x5F, 0x6A, 0xF9, 0xAE, 0xD0, 0x69, 0x91, 0x17, 0x58, 0x99, 0x27, 0x3A, 0xB9, 0x27, 0x38, 0xD9, 0x13, 0xEB, 0xB3, 0x2B, 0x33, 0x22, 0xBB, 0xD2, 0x70, 0xA9, 0x89, 0x07, 0xA7, 0x33, 0xB6, 0x2D, 0x22, 0x3C, 0x92, 0x15, 0x20, 0xC9, 0x49, 0x87, 0xFF, 0xAA, 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0x7F, 0xE0, 0x84, 0xE0, 0x84, 0x59, 0xD3, 0xE0, 0x9C, 0xA4, 0x84, 0xB0, 0x84, 0xA1, 0xDB, 0x11, 0x60, 0x1B, 0xF3, 0xFF, 0xFF, 0xA4, 0x84, 0xB0, 0x84, 0xA2, 0xDB, 0x5A, 0xD3, 0xFF, 0xFF, 0xA4, 0x84, 0xB0, 0x84, 0xA2, 0xDB, 0x11, 0x60, 0x1E, 0xF3, 0xFF, 0xFF, 0xA4, 0x84, 0xB0, 0x84, 0xA2, 0xDB, 0x5A, 0xD3, 0xFF, 0xFF, 0xA4, 0x84, 0xB0, 0x84, 0xA2, 0xDB, 0x11, 0x60, 0x21, 0xF3, 0xFF, 0xFF, 0xA4, 0x84, 0xB0, 0x84, 0xA2, 0xDB, 0x5A, 0xD3, 0xFF, 0xFF, 0xA4, 0x84, 0xB0, 0x84, 0xA2, 0xDB, 0xA3, 0xD3, 0xFF, 0xFF, 0x60, 0x47, 0x00, 0x7F, 0xE0, 0x84, 0xE0, 0x84, 0x11, 0x60, 0x24, 0xF3, 0xE0, 0x9C, 0xA4, 0x84, 0xB0, 0x84, 0xA2, 0xDB, 0x5A, 0xD3, 0xFF, 0xFF, 0xA4, 0x84, 0xB0, 0x84, 0xA2, 0xDB, 0x11, 0x60, 0x27, 0xF3, 0xFF, 0xFF, 0xA4, 0x84, 0xB0, 0x84, 0xA2, 0xDB, 0x5A, 0xD3, 0xFF, 0xFF, 0xA4, 0x84, 0xB0, 0x84, 0xA2, 0xDB, 0x11, 0x60, 0x2A, 0xF3, 0xFF, 0xFF, 0xA4, 0x84, 0xB0, 0x84, 0xA2, 0xDB, 0x5A, 0xD3, 0xFF, 0xFF, 0xA4, 0x84, 0xB0, 0x84, 0xA2, 0xDB, 0x00, 0x60, 0x6A, 0x63, 0x22, 0x60, 0x56, 0x61, 0x21, 0x60, 0xEA, 0x64, 0x58, 0xD1, 0x59, 0xD9, 0xFD, 0x1F, 0x11, 0x60, 0x33, 0xF3, 0xFF, 0xFF, 0x18, 0xAC, 0xA2, 0xDB, 0x5A, 0xD3, 0xFF, 0xFF, 0x18, 0xAC, 0xA2, 0xDB, 0x11, 0x60, 0x37, 0xF3, 0xFF, 0xFF, 0x18, 0xAC, 0xA2, 0xDB, 0x11, 0x60, 0x39, 0xF3, 0xFF, 0xFF, 0x18, 0xAC, 0xA2, 0xDB, 0x11, 0x60, 0x40, 0xF3, 0xFF, 0xFF, 0x18, 0xAC, 0xA2, 0xDB, 0x11, 0x60, 0x42, 0xF3, 0xFF, 0xFF, 0x18, 0xAC, 0xA2, 0xDB, 0x11, 0x60, 0x4E, 0xF3, 0xFF, 0xFF, 0x18, 0xAC, 0xA2, 0xDB, 0x5A, 0xD3, 0xFF, 0xFF, 0x18, 0xAC, 0xA2, 0xDB, 0x11, 0x60, 0x52, 0xF3, 0xFF, 0xFF, 0x18, 0xAC, 0xA2, 0xDB, 0x11, 0x60, 0x54, 0xF3, 0xFF, 0xFF, 0x18, 0xAC, 0xA2, 0xDB, 0x11, 0x60, 0x5B, 0xF3, 0xFF, 0xFF, 0x18, 0xAC, 0xA2, 0xDB, 0x11, 0x60, 0x5D, 0xF3, 0xFF, 0xFF, 0x18, 0xAC, 0xA2, 0xDB, 0xFA, 0x60, 0x2C, 0x65, 0x24, 0x60, 0x58, 0x4D, 0x97, 0x78, 0xFF, 0xFF, 0x0E, 0x03, 0x63, 0x45, 0x23, 0x60, 0xF0, 0x63, 0x06, 0x61, 0xA5, 0xD1, 0xDA, 0x85, 0x64, 0x44, 0x0F, 0xB4, 0xBD, 0xDB, 0x64, 0x47, 0x0F, 0xB4, 0xCD, 0x81, 0xBD, 0xDB, 0xF6, 0x02, 0xFA, 0x60, 0x30, 0x65, 0x24, 0x60, 0x58, 0x4D, 0x97, 0x78, 0xFF, 0xFF, 0x14, 0x03, 0xBD, 0xD3, 0x63, 0x46, 0x24, 0x60, 0x88, 0x63, 0x12, 0x60, 0x53, 0xFB, 0xDA, 0x85, 0xBD, 0xDB, 0x0E, 0x61, 0xA6, 0xD1, 0xDA, 0x86, 0x64, 0x44, 0xFF, 0xB4, 0xA5, 0xDB, 0xDA, 0x85, 0x64, 0x47, 0xFF, 0xB4, 0xCD, 0x81, 0xBD, 0xDB, 0xF5, 0x02, 0xFA, 0x60, 0x31, 0x65, 0x24, 0x60, 0x58, 0x4D, 0x97, 0x78, 0xFF, 0xFF, 0x22, 0x03, 0xBD, 0xD3, 0x12, 0x60, 0x71, 0xFB, 0x5A, 0x81, 0x12, 0x60, 0x80, 0xFB, 0x5A, 0x82, 0x12, 0x60, 0x8F, 0xFB, 0x5A, 0x83, 0x12, 0x60, 0x9E, 0xFB, 0x5A, 0x84, 0x0E, 0x61, 0xBD, 0xD1, 0xBD, 0xD5, 0x64, 0x44, 0xFF, 0xB4, 0x21, 0xDB, 0x5A, 0x81, 0x64, 0x47, 0xFF, 0xB4, 0x22, 0xDB, 0x5A, 0x82, 0x66, 0x44, 0xFF, 0xB4, 0x23, 0xDB, 0x5A, 0x83, 0x66, 0x47, 0xFF, 0xB4, 0x24, 0xDB, 0xCD, 0x81, 0x5A, 0x84, 0xEC, 0x02, 0xFA, 0x60, 0x47, 0x65, 0x24, 0x60, 0x58, 0x4D, 0x97, 0x78, 0xFF, 0xFF, 0x11, 0x03, 0x63, 0x45, 0x25, 0x60, 0x5A, 0x63, 0xA5, 0xD1, 0xDA, 0x85, 0xBD, 0xD9, 0x02, 0x61, 0xA5, 0xD1, 0xDA, 0x85, 0x64, 0x47, 0x00, 0x7E, 0xBD, 0xDB, 0x64, 0x44, 0x00, 0x7E, 0xCD, 0x81, 0xBD, 0xDB, 0xF6, 0x02, 0xFA, 0x60, 0x2E, 0x65, 0x24, 0x60, 0x58, 0x4D, 0x97, 0x78, 0xFF, 0xFF, 0x1F, 0x03, 0x63, 0x46, 0xFC, 0xA3, 0xA3, 0xD3, 0x24, 0x60, 0x08, 0x63, 0xCC, 0x84, 0xE8, 0x84, 0xCC, 0x81, 0x00, 0x36, 0x0D, 0x00, 0x63, 0x45, 0xA6, 0xD3, 0x5A, 0xD1, 0xDA, 0x86, 0xFF, 0xB4, 0xE0, 0x84, 0xC4, 0x84, 0x5C, 0x90, 0xBD, 0xD9, 0xFD, 0x02, 0xCD, 0x81, 0x66, 0x42, 0xF4, 0x02, 0x66, 0x42, 0x5A, 0xD3, 0x24, 0x60, 0x48, 0x65, 0xBD, 0xDB, 0xD7, 0x80, 0xFF, 0xFF, 0xFC, 0x02, 0x25, 0x60, 0x6E, 0x61, 0xFA, 0x60, 0x46, 0x65, 0x24, 0x60, 0x58, 0x4D, 0x97, 0x78, 0xFF, 0xFF, 0x01, 0x03, 0xA1, 0xDD, 0xD9, 0x81, 0xFA, 0x60, 0x2F, 0x65, 0x24, 0x60, 0x58, 0x4D, 0x97, 0x78, 0xFF, 0xFF, 0x01, 0x03, 0xA1, 0xDD, 0xD9, 0x81, 0xFA, 0x60, 0x3E, 0x65, 0x24, 0x60, 0x58, 0x4D, 0x97, 0x78, 0xFF, 0xFF, 0x01, 0x03, 0xA1, 0xDD, 0xD9, 0x81, 0xFA, 0x60, 0x3F, 0x65, 0x24, 0x60, 0x58, 0x4D, 0x97, 0x78, 0xFF, 0xFF, 0x01, 0x03, 0xA1, 0xDD, 0xD9, 0x81, 0xFA, 0x60, 0x40, 0x65, 0x24, 0x60, 0x58, 0x4D, 0x97, 0x78, 0xFF, 0xFF, 0x01, 0x03, 0xA1, 0xDD, 0xD9, 0x81, 0xFA, 0x60, 0x3B, 0x65, 0x24, 0x60, 0x58, 0x4D, 0x97, 0x78, 0xFF, 0xFF, 0x01, 0x03, 0xA1, 0xDD, 0xFA, 0x60, 0x48, 0x65, 0x24, 0x60, 0x58, 0x4D, 0x97, 0x78, 0xFF, 0xFF, 0x10, 0x03, 0xBD, 0xD3, 0x25, 0x60, 0xCA, 0x61, 0x0E, 0xB4, 0xBD, 0xD1, 0xA1, 0xDB, 0x64, 0x47, 0x0E, 0xB4, 0xA3, 0xD1, 0x59, 0xDB, 0x64, 0x44, 0x0E, 0xB4, 0x59, 0xDB, 0x64, 0x47, 0x0E, 0xB4, 0x59, 0xDB, 0xFA, 0x60, 0x29, 0x65, 0x24, 0x60, 0x58, 0x4D, 0x97, 0x78, 0xFF, 0xFF, 0x07, 0x03, 0x04, 0xA3, 0xA3, 0xD3, 0x20, 0x60, 0x00, 0x65, 0xB4, 0x84, 0x10, 0x60, 0x29, 0xFB, 0xFA, 0x60, 0x2A, 0x65, 0x24, 0x60, 0x58, 0x4D, 0x97, 0x78, 0xFF, 0xFF, 0x39, 0x03, 0x04, 0xA3, 0xBD, 0xD1, 0x10, 0x60, 0xCD, 0xF3, 0x64, 0x41, 0x64, 0x5E, 0xA2, 0xDB, 0x64, 0x47, 0x5A, 0xD3, 0x60, 0x5C, 0x64, 0x5F, 0xA2, 0xDB, 0x10, 0x60, 0xE3, 0xF3, 0xFF, 0x60, 0xC0, 0xB5, 0x61, 0x40, 0x80, 0x27, 0x05, 0x00, 0xE9, 0x87, 0x3F, 0xB4, 0xB4, 0x84, 0xA2, 0xDB, 0x1E, 0x00, 0x65, 0x44, 0xA2, 0xDB, 0x10, 0x60, 0xDC, 0xF1, 0xE1, 0x80, 0xF9, 0x81, 0xE1, 0x80, 0xF9, 0x84, 0xFF, 0x60, 0x80, 0xB4, 0xC0, 0x9C, 0xA2, 0xD9, 0x10, 0x60, 0xDF, 0xF1, 0xFF, 0xFF, 0xC0, 0x9C, 0xA2, 0xD9, 0x10, 0x60, 0xE6, 0xF1, 0x01, 0x7E, 0x60, 0x47, 0x60, 0x41, 0x64, 0x44, 0xFE, 0x60, 0x00, 0xB5, 0xC1, 0x84, 0x01, 0x60, 0xFF, 0xB4, 0xB4, 0x84, 0xA2, 0xDB, 0xDB, 0x83, 0x11, 0x60, 0x62, 0xFD, 0xFA, 0x60, 0x2B, 0x65, 0x24, 0x60, 0x58, 0x4D, 0x97, 0x78, 0xFF, 0xFF, 0x07, 0x03, 0x04, 0xA3, 0xBD, 0xD3, 0x10, 0x60, 0xD0, 0xFB, 0xA3, 0xD3, 0x10, 0x60, 0x94, 0xFB, 0xFA, 0x60, 0x3C, 0x65, 0x24, 0x60, 0x58, 0x4D, 0x97, 0x78, 0xFF, 0xFF, 0x1F, 0x03, 0xA3, 0xD3, 0xFC, 0x60, 0xFC, 0x65, 0xA4, 0x84, 0x60, 0x5C, 0x00, 0x7E, 0xC0, 0x60, 0x00, 0xA0, 0x60, 0x43, 0x07, 0x04, 0x10, 0x60, 0xD4, 0xF3, 0xFF, 0xFF, 0x03, 0x60, 0xFF, 0xB4, 0x3C, 0x94, 0xA2, 0xDB, 0x21, 0x60, 0x30, 0x61, 0x64, 0x44, 0x00, 0x7F, 0xC0, 0xA0, 0x60, 0x47, 0x07, 0x04, 0x60, 0x43, 0xA1, 0xD3, 0xFF, 0xFF, 0x03, 0x60, 0xFF, 0xB4, 0x3C, 0x94, 0xA1, 0xDB, 0xB8, 0xFE, 0xB9, 0xFE, 0xBA, 0xFE, 0xBB, 0xFE, 0xBD, 0xFE, 0xBF, 0xFE, 0x15, 0x60, 0xCB, 0xF3, 0x12, 0x63, 0x60, 0x40, 0x01, 0x27, 0x04, 0x00, 0x0B, 0x60, 0xEA, 0x62, 0x5A, 0xDF, 0xFE, 0x1F, 0x1F, 0x60, 0xC8, 0x78, 0xFF, 0xFF, 0x08, 0x60, 0x06, 0x63, 0xBE, 0xD3, 0xBD, 0xD1, 0x07, 0x18, 0xD4, 0x80, 0x05, 0x18, 0x03, 0x03, 0xC3, 0x83, 0xC3, 0x83, 0xF7, 0x01, 0xDB, 0x83, 0x00, 0xBC, 0x2D, 0x58, 0xFF, 0xFF, 0x86, 0xFD, 0xB0, 0x26, 0x00, 0x00, 0x06, 0x00, 0x10, 0xFD, 0x32, 0x01, 0x00, 0x00, 0x02, 0x00, 0x14, 0xFD, 0x94, 0x2B, 0x00, 0x00, 0x0A, 0x00, 0x41, 0xFA, 0x46, 0x23, 0x00, 0x00, 0x22, 0x00, 0x42, 0xFA, 0x68, 0x23, 0x00, 0x00, 0x22, 0x00, 0x43, 0xFA, 0x8A, 0x23, 0x00, 0x00, 0x22, 0x00, 0x44, 0xFA, 0xAC, 0x23, 0x00, 0x00, 0x22, 0x00, 0x45, 0xFA, 0xCE, 0x23, 0x00, 0x00, 0x22, 0x00, 0x25, 0xFD, 0x62, 0x01, 0x00, 0x00, 0x02, 0x00, }; /* fw_image_3_data */ static const hcf_8 fw_image_4_data[] = { 0x6C, 0x40, 0xA1, 0xFF, 0x98, 0xFF, 0x80, 0x3E, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x41, 0xFF, 0x33, 0xF3, 0x32, 0x11, 0x31, 0x18, 0x40, 0x64, 0x3A, 0xDB, 0x1C, 0x00, 0xFF, 0xFF, 0xC4, 0xE2, 0x27, 0x44, 0x20, 0x2A, 0x01, 0x00, 0xFF, 0xFF, 0x42, 0x64, 0x3A, 0xDB, 0x23, 0x00, 0x41, 0xFF, 0xA3, 0x60, 0x34, 0x78, 0xE2, 0xFE, 0x40, 0x49, 0x02, 0x60, 0x01, 0xE1, 0x1D, 0x00, 0x44, 0xFF, 0x1B, 0x09, 0x29, 0x44, 0x10, 0x2A, 0x04, 0x74, 0xCD, 0xE2, 0x10, 0x65, 0x0B, 0x00, 0xA4, 0x60, 0x49, 0x78, 0xA4, 0xE2, 0x29, 0x44, 0x20, 0x2A, 0x0D, 0x00, 0x20, 0xAC, 0xEC, 0x01, 0xA4, 0x60, 0x49, 0x78, 0x46, 0xFF, 0xB4, 0x84, 0x40, 0x49, 0xA1, 0xFF, 0xFF, 0xFF, 0x80, 0x3E, 0xA4, 0x60, 0x49, 0x78, 0xFF, 0xFF, 0x62, 0xFF, 0x08, 0xE1, 0xA1, 0xFF, 0x98, 0xFF, 0x80, 0x3E, 0xAA, 0x60, 0xF4, 0x78, 0x4C, 0x4E, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xAA, 0x60, 0xFB, 0x78, 0x44, 0xE2, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xC4, 0xE2, 0x84, 0xFF, 0x22, 0x58, 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0x08, 0x64, 0x00, 0x00, 0x2A, 0xFA, 0x02, 0xFE, 0x2F, 0x58, 0xFF, 0xFF, 0x42, 0x6F, 0x6F, 0x74, 0x63, 0x6F, 0x64, 0x65, 0x20, 0x21, 0x21, 0x20, 0x20, 0x00, 0x53, 0x54, 0x41, 0x2F, 0x41, 0x50, 0x20, 0x46, 0x75, 0x6E, 0x63, 0x27, 0x73, 0x00, 0x20, 0x00, 0x03, 0x00, 0x01, 0x00, 0x18, 0x00, 0x00, 0x00, 0x08, 0x00, 0x04, 0x00, 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, 0x04, 0x00, 0x06, 0x00, 0x07, 0x00, 0x05, 0x00, 0x06, 0x00, 0x07, 0x00, 0x06, 0x00, 0x06, 0x00, 0x07, 0x00, 0x01, 0x00, 0x02, 0x00, 0x02, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x01, 0x00, 0x02, 0x00, 0x00, 0x00, }; /* fw_image_4_data */ static const CFG_IDENTITY_STRCT fw_image_infoidentity[] = { { sizeof( CFG_IDENTITY_STRCT ) / sizeof(hcf_16) - 1, CFG_FW_IDENTITY, COMP_ID_FW_AP, 3, //Variant 1, //Major 24 //Minor }, { 0000, 0000, 0000, 0000, 0000, 0000 } //endsentinel }; static const CFG_PROG_STRCT fw_image_code[] = { { 8, CFG_PROG, CFG_PROG_VOLATILE, // mode 0x0148, // sizeof(fw_image_1_data), 0x00000060, // Target address in NIC Memory 0x0000, // CRC: yes/no TYPE: primary/station/tertiary (hcf_8 FAR *) fw_image_1_data }, { 8, CFG_PROG, CFG_PROG_VOLATILE, // mode 0x2432, // sizeof(fw_image_2_data), 0x00000C16, // Target address in NIC Memory 0x0000, // CRC: yes/no TYPE: primary/station/tertiary (hcf_8 FAR *) fw_image_2_data }, { 8, CFG_PROG, CFG_PROG_VOLATILE, // mode 0x194c, // sizeof(fw_image_3_data), 0x001E3048, // Target address in NIC Memory 0x0000, // CRC: yes/no TYPE: primary/station/tertiary (hcf_8 FAR *) fw_image_3_data }, { 8, CFG_PROG, CFG_PROG_VOLATILE, // mode 0xb7e4, // sizeof(fw_image_4_data), 0x001F4000, // Target address in NIC Memory 0x0000, // CRC: yes/no TYPE: primary/station/tertiary (hcf_8 FAR *) fw_image_4_data }, { 5, CFG_PROG, CFG_PROG_STOP, // mode 0000, 0x000F2101, // Start execution address }, { 0000, 0000, 0000, 0000, 00000000, 0000, 00000000} }; static const CFG_RANGE20_STRCT fw_image_infocompat[] = { { 3 + ((20 * sizeof(CFG_RANGE_SPEC_STRCT)) / sizeof(hcf_16)), CFG_FW_SUP_RANGE, COMP_ROLE_SUPL, COMP_ID_APF, { { 4, 1, 1 } //variant, bottom, top } }, { 3 + ((20 * sizeof(CFG_RANGE_SPEC_STRCT)) / sizeof(hcf_16)), CFG_MFI_ACT_RANGES_STA, COMP_ROLE_ACT, COMP_ID_MFI, { { 7, 3, 3 }, //variant, bottom, top { 8, 1, 1 } //variant, bottom, top } }, { 3 + ((20 * sizeof(CFG_RANGE_SPEC_STRCT)) / sizeof(hcf_16)), CFG_CFI_ACT_RANGES_STA, COMP_ROLE_ACT, COMP_ID_CFI, { { 4, 1, 2 } //variant, bottom, top } }, { 0000, 0000, 0000, 0000, { { 0000, 0000, 0000 } } } //endsentinel }; memimage fw_image = { "FUPU7D37dhfwci\001C", //signature, <format number>, C/Bin type (CFG_PROG_STRCT *) fw_image_code, 0x000F2101, 00000000, //(dummy) pdaplug 00000000, //(dummy) priplug (CFG_RANGE20_STRCT *) fw_image_infocompat, (CFG_IDENTITY_STRCT *) fw_image_infoidentity, };
gpl-2.0
wolfgar/linux-imx-wandboard
drivers/staging/wlags49_h2/ap_h25.c
9364
390532
/* * File: ap_h54.124 * * Abstract: This file contains memory image 'fw_image'. * * Contents: Total size of the memory image: 63146 bytes. * Total number of blocks: 4 blocks. * Block 1 : load address 00000060, 328 bytes. * Block 2 : load address 00000C16, 9266 bytes. * Block 3 : load address 001E3048, 6476 bytes. * Block 4 : load address 001F4000, 47076 bytes. * * Identity: component id: 32 (variant 3) version 1.24 * * Compatibility: * supplying interface 8 (variant 4) : 1 - 1 * acting on interface 1 (variant 7) : 3 - 3 * acting on interface 1 (variant 8) : 1 - 1 * acting on interface 2 (variant 4) : 1 - 2 * * Generated: by g:\fw\fupu3.exe version 4.26 * * Commandline: g:\fw\fupu3.exe /f=4 /n=fw_image /i=t3012400.hex */ #include "hcfcfg.h" // to get hcf_16 etc defined as well as // possible settings which inluence mdd.h or dhf.h #include "mdd.h" //to get COMP_ID_STA etc defined #include "dhf.h" //used to be "fhfmem.h", to get memblock,plugrecord, static const hcf_8 fw_image_1_data[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xDC, 0x0C, 0x00, 0x00, 0x02, 0x0D, 0x00, 0x00, 0x02, 0x0D, 0xD6, 0xA2, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1B, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x02, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x09, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xEA, 0x00, 0x00, 0xFF, 0x07, 0x02, 0x00, 0x64, 0x00, 0x64, 0x00, 0x10, 0x27, 0x10, 0x27, 0x14, 0x00, 0xD0, 0x07, 0xD0, 0x07, 0x10, 0x27, 0x2F, 0x00, 0x32, 0x00, 0x32, 0x00, 0x05, 0x00, 0x02, 0x00, 0x02, 0x00, 0x10, 0x27, 0x05, 0x00, 0x00, 0x02, 0x00, 0x02, 0x13, 0x00, 0x07, 0x00, 0x03, 0x00, 0x32, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2A, 0x09, 0x2B, 0x09, 0x2B, 0x09, 0xFF, 0x0F, 0xF0, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x14, 0x01, 0x00, 0x40, 0x00, 0x32, 0x00, 0x32, 0x00, 0x0A, 0x00, 0x02, 0x00, 0x06, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, }; /* fw_image_1_data */ static const hcf_8 fw_image_2_data[] = { 0x7C, 0xA4, 0x00, 0x16, 0x08, 0x40, 0x0F, 0xD2, 0xE1, 0x28, 0xA5, 0x7C, 0x50, 0x30, 0xF1, 0x84, 0x44, 0x08, 0xAB, 0xAE, 0xA5, 0xB8, 0xFC, 0xBA, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xA5, 0xC6, 0x84, 0xF8, 0x99, 0xEE, 0x8D, 0xF6, 0x0D, 0xFF, 0xBD, 0xD6, 0xB1, 0xDE, 0x54, 0x91, 0x50, 0x60, 0x03, 0x02, 0xA9, 0xCE, 0x7D, 0x56, 0x19, 0xE7, 0x62, 0xB5, 0xE6, 0x4D, 0x9A, 0xEC, 0x45, 0x8F, 0x9D, 0x1F, 0x40, 0x89, 0x87, 0xFA, 0x15, 0xEF, 0xEB, 0xB2, 0xC9, 0x8E, 0x0B, 0xFB, 0xEC, 0x41, 0x67, 0xB3, 0xFD, 0x5F, 0xEA, 0x45, 0xBF, 0x23, 0xF7, 0x53, 0x96, 0xE4, 0x5B, 0x9B, 0xC2, 0x75, 0x1C, 0xE1, 0xAE, 0x3D, 0x6A, 0x4C, 0x5A, 0x6C, 0x41, 0x7E, 0x02, 0xF5, 0x4F, 0x83, 0x5C, 0x68, 0xF4, 0x51, 0x34, 0xD1, 0x08, 0xF9, 0x93, 0xE2, 0x73, 0xAB, 0x53, 0x62, 0x3F, 0x2A, 0x0C, 0x08, 0x52, 0x95, 0x65, 0x46, 0x5E, 0x9D, 0x28, 0x30, 0xA1, 0x37, 0x0F, 0x0A, 0xB5, 0x2F, 0x09, 0x0E, 0x36, 0x24, 0x9B, 0x1B, 0x3D, 0xDF, 0x26, 0xCD, 0x69, 0x4E, 0xCD, 0x7F, 0x9F, 0xEA, 0x1B, 0x12, 0x9E, 0x1D, 0x74, 0x58, 0x2E, 0x34, 0x2D, 0x36, 0xB2, 0xDC, 0xEE, 0xB4, 0xFB, 0x5B, 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0x00, 0xE9, 0x87, 0x3F, 0xB4, 0xB4, 0x84, 0xA2, 0xDB, 0x1E, 0x00, 0x65, 0x44, 0xA2, 0xDB, 0x10, 0x60, 0xDC, 0xF1, 0xE1, 0x80, 0xF9, 0x81, 0xE1, 0x80, 0xF9, 0x84, 0xFF, 0x60, 0x80, 0xB4, 0xC0, 0x9C, 0xA2, 0xD9, 0x10, 0x60, 0xDF, 0xF1, 0xFF, 0xFF, 0xC0, 0x9C, 0xA2, 0xD9, 0x10, 0x60, 0xE6, 0xF1, 0x01, 0x7E, 0x60, 0x47, 0x60, 0x41, 0x64, 0x44, 0xFE, 0x60, 0x00, 0xB5, 0xC1, 0x84, 0x01, 0x60, 0xFF, 0xB4, 0xB4, 0x84, 0xA2, 0xDB, 0xDB, 0x83, 0x11, 0x60, 0x62, 0xFD, 0xFA, 0x60, 0x2B, 0x65, 0x24, 0x60, 0x58, 0x4D, 0x97, 0x78, 0xFF, 0xFF, 0x07, 0x03, 0x04, 0xA3, 0xBD, 0xD3, 0x10, 0x60, 0xD0, 0xFB, 0xA3, 0xD3, 0x10, 0x60, 0x94, 0xFB, 0xFA, 0x60, 0x3C, 0x65, 0x24, 0x60, 0x58, 0x4D, 0x97, 0x78, 0xFF, 0xFF, 0x1F, 0x03, 0xA3, 0xD3, 0xFC, 0x60, 0xFC, 0x65, 0xA4, 0x84, 0x60, 0x5C, 0x00, 0x7E, 0xC0, 0x60, 0x00, 0xA0, 0x60, 0x43, 0x07, 0x04, 0x10, 0x60, 0xD4, 0xF3, 0xFF, 0xFF, 0x03, 0x60, 0xFF, 0xB4, 0x3C, 0x94, 0xA2, 0xDB, 0x21, 0x60, 0x30, 0x61, 0x64, 0x44, 0x00, 0x7F, 0xC0, 0xA0, 0x60, 0x47, 0x07, 0x04, 0x60, 0x43, 0xA1, 0xD3, 0xFF, 0xFF, 0x03, 0x60, 0xFF, 0xB4, 0x3C, 0x94, 0xA1, 0xDB, 0xB8, 0xFE, 0xB9, 0xFE, 0xBA, 0xFE, 0xBB, 0xFE, 0xBD, 0xFE, 0xBF, 0xFE, 0x15, 0x60, 0xCB, 0xF3, 0x12, 0x63, 0x60, 0x40, 0x01, 0x27, 0x04, 0x00, 0x0B, 0x60, 0xEA, 0x62, 0x5A, 0xDF, 0xFE, 0x1F, 0x1F, 0x60, 0xC8, 0x78, 0xFF, 0xFF, 0x08, 0x60, 0x06, 0x63, 0xBE, 0xD3, 0xBD, 0xD1, 0x07, 0x18, 0xD4, 0x80, 0x05, 0x18, 0x03, 0x03, 0xC3, 0x83, 0xC3, 0x83, 0xF7, 0x01, 0xDB, 0x83, 0x00, 0xBC, 0x2D, 0x58, 0xFF, 0xFF, 0x86, 0xFD, 0xB0, 0x26, 0x00, 0x00, 0x06, 0x00, 0x10, 0xFD, 0x32, 0x01, 0x00, 0x00, 0x02, 0x00, 0x14, 0xFD, 0x94, 0x2B, 0x00, 0x00, 0x0A, 0x00, 0x41, 0xFA, 0x46, 0x23, 0x00, 0x00, 0x22, 0x00, 0x42, 0xFA, 0x68, 0x23, 0x00, 0x00, 0x22, 0x00, 0x43, 0xFA, 0x8A, 0x23, 0x00, 0x00, 0x22, 0x00, 0x44, 0xFA, 0xAC, 0x23, 0x00, 0x00, 0x22, 0x00, 0x45, 0xFA, 0xCE, 0x23, 0x00, 0x00, 0x22, 0x00, 0x25, 0xFD, 0x62, 0x01, 0x00, 0x00, 0x02, 0x00, }; /* fw_image_3_data */ static const hcf_8 fw_image_4_data[] = { 0x6C, 0x40, 0xA1, 0xFF, 0x98, 0xFF, 0x80, 0x3E, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x41, 0xFF, 0x33, 0xF3, 0x32, 0x11, 0x31, 0x18, 0x40, 0x64, 0x3A, 0xDB, 0x1C, 0x00, 0xFF, 0xFF, 0xC4, 0xE2, 0x27, 0x44, 0x20, 0x2A, 0x01, 0x00, 0xFF, 0xFF, 0x42, 0x64, 0x3A, 0xDB, 0x23, 0x00, 0x41, 0xFF, 0xA3, 0x60, 0x34, 0x78, 0xE2, 0xFE, 0x40, 0x49, 0x02, 0x60, 0x01, 0xE1, 0x1D, 0x00, 0x44, 0xFF, 0x1B, 0x09, 0x29, 0x44, 0x10, 0x2A, 0x04, 0x74, 0xCD, 0xE2, 0x10, 0x65, 0x0B, 0x00, 0xA4, 0x60, 0x49, 0x78, 0xA4, 0xE2, 0x29, 0x44, 0x20, 0x2A, 0x0D, 0x00, 0x20, 0xAC, 0xEC, 0x01, 0xA4, 0x60, 0x49, 0x78, 0x46, 0xFF, 0xB4, 0x84, 0x40, 0x49, 0xA1, 0xFF, 0xFF, 0xFF, 0x80, 0x3E, 0xA4, 0x60, 0x49, 0x78, 0xFF, 0xFF, 0x62, 0xFF, 0x08, 0xE1, 0xA1, 0xFF, 0x98, 0xFF, 0x80, 0x3E, 0xAA, 0x60, 0xF4, 0x78, 0x4C, 0x4E, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xAA, 0x60, 0xFB, 0x78, 0x44, 0xE2, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xC4, 0xE2, 0x84, 0xFF, 0x22, 0x58, 0x82, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xA4, 0x60, 0xB9, 0x78, 0xFF, 0xFF, 0xFF, 0xFF, 0xA1, 0xFF, 0xFF, 0xFF, 0xE1, 0x01, 0xFF, 0xFF, 0x10, 0x29, 0xFA, 0x01, 0xE4, 0xE2, 0xAA, 0x60, 0xB0, 0x78, 0x94, 0xF3, 0xFF, 0xFF, 0xFF, 0xFF, 0xC1, 0x60, 0x35, 0x78, 0x64, 0xE2, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xAA, 0x60, 0x97, 0x78, 0xAC, 0xE2, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x80, 0x29, 0xE2, 0x01, 0xAA, 0x60, 0xF3, 0x78, 0x47, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xB4, 0x60, 0xEF, 0x78, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xB5, 0x60, 0x1C, 0x78, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xB3, 0x60, 0x8B, 0x78, 0x42, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xB3, 0x60, 0xBE, 0x78, 0x43, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xB3, 0x60, 0xBE, 0x78, 0x44, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xB6, 0x60, 0x9D, 0x78, 0x45, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xB3, 0x60, 0xC1, 0x78, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x60, 0x83, 0x64, 0x80, 0x29, 0x09, 0xFB, 0xB4, 0x60, 0xB7, 0x78, 0xFF, 0xFF, 0xFF, 0xFF, 0x98, 0xFF, 0xC2, 0x60, 0x69, 0x78, 0x40, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xC1, 0x60, 0xE0, 0x78, 0x98, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xC0, 0x60, 0x3D, 0x78, 0x98, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xBF, 0x60, 0xB8, 0x78, 0x98, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xB7, 0x60, 0x96, 0x78, 0x98, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xA1, 0xFF, 0x98, 0xFF, 0x83, 0x3E, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xC3, 0x60, 0x58, 0x78, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x01, 0x41, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x01, 0x42, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x01, 0xB0, 0xFF, 0xB1, 0xFF, 0x40, 0xFF, 0x43, 0xFF, 0xC3, 0x60, 0x53, 0x78, 0x44, 0xFF, 0xFF, 0x01, 0xC3, 0x60, 0x58, 0x78, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x01, 0x1C, 0x60, 0x28, 0x78, 0x45, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x01, 0xC3, 0x60, 0x53, 0x78, 0x84, 0xE2, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x01, 0xC3, 0x60, 0x52, 0x78, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x01, 0xCA, 0x60, 0x76, 0x78, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xE8, 0x60, 0x6C, 0x78, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x42, 0xFF, 0xA1, 0xFF, 0xFF, 0xFF, 0x85, 0x3E, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xCA, 0x60, 0x7E, 0x78, 0x24, 0xE2, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xE6, 0x60, 0x2A, 0x78, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xCA, 0x60, 0x7E, 0x78, 0x44, 0xE2, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xCA, 0x60, 0x7E, 0x78, 0x84, 0xE2, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xCA, 0x60, 0x7E, 0x78, 0x47, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xF0, 0x60, 0x9F, 0x78, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xF0, 0x60, 0xCA, 0x78, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xF0, 0x60, 0xE3, 0x78, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xF0, 0x60, 0xC7, 0x78, 0x28, 0xE2, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xF0, 0x60, 0xC7, 0x78, 0x44, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xF0, 0x60, 0xC7, 0x78, 0x45, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xF0, 0x60, 0xC7, 0x78, 0x46, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x60, 0x87, 0x64, 0x80, 0x29, 0x09, 0xFB, 0x47, 0xFF, 0xF0, 0x60, 0xC7, 0x78, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x43, 0xF7, 0xA7, 0xFF, 0x41, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 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address in NIC Memory 0x0000, // CRC: yes/no TYPE: primary/station/tertiary (hcf_8 FAR *) fw_image_1_data }, { 8, CFG_PROG, CFG_PROG_VOLATILE, // mode 0x2432, // sizeof(fw_image_2_data), 0x00000C16, // Target address in NIC Memory 0x0000, // CRC: yes/no TYPE: primary/station/tertiary (hcf_8 FAR *) fw_image_2_data }, { 8, CFG_PROG, CFG_PROG_VOLATILE, // mode 0x194c, // sizeof(fw_image_3_data), 0x001E3048, // Target address in NIC Memory 0x0000, // CRC: yes/no TYPE: primary/station/tertiary (hcf_8 FAR *) fw_image_3_data }, { 8, CFG_PROG, CFG_PROG_VOLATILE, // mode 0xb7e4, // sizeof(fw_image_4_data), 0x001F4000, // Target address in NIC Memory 0x0000, // CRC: yes/no TYPE: primary/station/tertiary (hcf_8 FAR *) fw_image_4_data }, { 5, CFG_PROG, CFG_PROG_STOP, // mode 0000, 0x000F2101, // Start execution address }, { 0000, 0000, 0000, 0000, 00000000, 0000, 00000000} }; static const CFG_RANGE20_STRCT fw_image_infocompat[] = { { 3 + ((20 * sizeof(CFG_RANGE_SPEC_STRCT)) / sizeof(hcf_16)), CFG_FW_SUP_RANGE, COMP_ROLE_SUPL, COMP_ID_APF, { { 4, 1, 1 } //variant, bottom, top } }, { 3 + ((20 * sizeof(CFG_RANGE_SPEC_STRCT)) / sizeof(hcf_16)), CFG_MFI_ACT_RANGES_STA, COMP_ROLE_ACT, COMP_ID_MFI, { { 7, 3, 3 }, //variant, bottom, top { 8, 1, 1 } //variant, bottom, top } }, { 3 + ((20 * sizeof(CFG_RANGE_SPEC_STRCT)) / sizeof(hcf_16)), CFG_CFI_ACT_RANGES_STA, COMP_ROLE_ACT, COMP_ID_CFI, { { 4, 1, 2 } //variant, bottom, top } }, { 0000, 0000, 0000, 0000, { { 0000, 0000, 0000 } } } //endsentinel }; memimage fw_image = { "FUPU7D37dhfwci\001C", //signature, <format number>, C/Bin type (CFG_PROG_STRCT *) fw_image_code, 0x000F2101, 00000000, //(dummy) pdaplug 00000000, //(dummy) priplug (CFG_RANGE20_STRCT *) fw_image_infocompat, (CFG_IDENTITY_STRCT *) fw_image_infoidentity, };
gpl-2.0
henrix/beagle-linux
sound/soc/nuc900/nuc900-audio.c
9876
1723
/* * Copyright (c) 2010 Nuvoton technology corporation. * * Wan ZongShun <mcuos.com@gmail.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation;version 2 of the License. * */ #include <linux/module.h> #include <linux/moduleparam.h> #include <linux/timer.h> #include <linux/interrupt.h> #include <linux/platform_device.h> #include <sound/core.h> #include <sound/pcm.h> #include <sound/soc.h> #include "nuc900-audio.h" static struct snd_soc_dai_link nuc900evb_ac97_dai = { .name = "AC97", .stream_name = "AC97 HiFi", .cpu_dai_name = "nuc900-ac97", .codec_dai_name = "ac97-hifi", .codec_name = "ac97-codec", .platform_name = "nuc900-pcm-audio", }; static struct snd_soc_card nuc900evb_audio_machine = { .name = "NUC900EVB_AC97", .owner = THIS_MODULE, .dai_link = &nuc900evb_ac97_dai, .num_links = 1, }; static struct platform_device *nuc900evb_asoc_dev; static int __init nuc900evb_audio_init(void) { int ret; ret = -ENOMEM; nuc900evb_asoc_dev = platform_device_alloc("soc-audio", -1); if (!nuc900evb_asoc_dev) goto out; /* nuc900 board audio device */ platform_set_drvdata(nuc900evb_asoc_dev, &nuc900evb_audio_machine); ret = platform_device_add(nuc900evb_asoc_dev); if (ret) { platform_device_put(nuc900evb_asoc_dev); nuc900evb_asoc_dev = NULL; } out: return ret; } static void __exit nuc900evb_audio_exit(void) { platform_device_unregister(nuc900evb_asoc_dev); } module_init(nuc900evb_audio_init); module_exit(nuc900evb_audio_exit); MODULE_LICENSE("GPL"); MODULE_DESCRIPTION("NUC900 Series ASoC audio support"); MODULE_AUTHOR("Wan ZongShun");
gpl-2.0
daedalus81/linux-working
arch/powerpc/boot/mpc8xx.c
13972
1692
/* * MPC8xx support functions * * Author: Scott Wood <scottwood@freescale.com> * * Copyright (c) 2007 Freescale Semiconductor, Inc. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 as published * by the Free Software Foundation. */ #include "ops.h" #include "types.h" #include "fsl-soc.h" #include "mpc8xx.h" #include "stdio.h" #include "io.h" #define MPC8XX_PLPRCR (0x284/4) /* PLL and Reset Control Register */ /* Return system clock from crystal frequency */ u32 mpc885_get_clock(u32 crystal) { u32 *immr; u32 plprcr; int mfi, mfn, mfd, pdf, div; u32 ret; immr = fsl_get_immr(); if (!immr) { printf("mpc885_get_clock: Couldn't get IMMR base.\r\n"); return 0; } plprcr = in_be32(&immr[MPC8XX_PLPRCR]); mfi = (plprcr >> 16) & 15; if (mfi < 5) { printf("Warning: PLPRCR[MFI] value of %d out-of-bounds\r\n", mfi); mfi = 5; } pdf = (plprcr >> 1) & 0xf; div = (plprcr >> 20) & 3; mfd = (plprcr >> 22) & 0x1f; mfn = (plprcr >> 27) & 0x1f; ret = crystal * mfi; if (mfn != 0) ret += crystal * mfn / (mfd + 1); return ret / (pdf + 1); } /* Set common device tree fields based on the given clock frequencies. */ void mpc8xx_set_clocks(u32 sysclk) { void *node; dt_fixup_cpu_clocks(sysclk, sysclk / 16, sysclk); node = finddevice("/soc/cpm"); if (node) setprop(node, "clock-frequency", &sysclk, 4); node = finddevice("/soc/cpm/brg"); if (node) setprop(node, "clock-frequency", &sysclk, 4); } int mpc885_fixup_clocks(u32 crystal) { u32 sysclk = mpc885_get_clock(crystal); if (!sysclk) return 0; mpc8xx_set_clocks(sysclk); return 1; }
gpl-2.0
mixianghang/mptcp
drivers/net/ethernet/intel/e1000e/netdev.c
149
203691
/******************************************************************************* Intel PRO/1000 Linux driver Copyright(c) 1999 - 2013 Intel Corporation. This program is free software; you can redistribute it and/or modify it under the terms and conditions of the GNU General Public License, version 2, as published by the Free Software Foundation. This program is distributed in the hope it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. The full GNU General Public License is included in this distribution in the file called "COPYING". Contact Information: Linux NICS <linux.nics@intel.com> e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 *******************************************************************************/ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt #include <linux/module.h> #include <linux/types.h> #include <linux/init.h> #include <linux/pci.h> #include <linux/vmalloc.h> #include <linux/pagemap.h> #include <linux/delay.h> #include <linux/netdevice.h> #include <linux/interrupt.h> #include <linux/tcp.h> #include <linux/ipv6.h> #include <linux/slab.h> #include <net/checksum.h> #include <net/ip6_checksum.h> #include <linux/ethtool.h> #include <linux/if_vlan.h> #include <linux/cpu.h> #include <linux/smp.h> #include <linux/pm_qos.h> #include <linux/pm_runtime.h> #include <linux/aer.h> #include <linux/prefetch.h> #include "e1000.h" #define DRV_EXTRAVERSION "-k" #define DRV_VERSION "2.3.2" DRV_EXTRAVERSION char e1000e_driver_name[] = "e1000e"; const char e1000e_driver_version[] = DRV_VERSION; #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK) static int debug = -1; module_param(debug, int, 0); MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); static const struct e1000_info *e1000_info_tbl[] = { [board_82571] = &e1000_82571_info, [board_82572] = &e1000_82572_info, [board_82573] = &e1000_82573_info, [board_82574] = &e1000_82574_info, [board_82583] = &e1000_82583_info, [board_80003es2lan] = &e1000_es2_info, [board_ich8lan] = &e1000_ich8_info, [board_ich9lan] = &e1000_ich9_info, [board_ich10lan] = &e1000_ich10_info, [board_pchlan] = &e1000_pch_info, [board_pch2lan] = &e1000_pch2_info, [board_pch_lpt] = &e1000_pch_lpt_info, }; struct e1000_reg_info { u32 ofs; char *name; }; static const struct e1000_reg_info e1000_reg_info_tbl[] = { /* General Registers */ {E1000_CTRL, "CTRL"}, {E1000_STATUS, "STATUS"}, {E1000_CTRL_EXT, "CTRL_EXT"}, /* Interrupt Registers */ {E1000_ICR, "ICR"}, /* Rx Registers */ {E1000_RCTL, "RCTL"}, {E1000_RDLEN(0), "RDLEN"}, {E1000_RDH(0), "RDH"}, {E1000_RDT(0), "RDT"}, {E1000_RDTR, "RDTR"}, {E1000_RXDCTL(0), "RXDCTL"}, {E1000_ERT, "ERT"}, {E1000_RDBAL(0), "RDBAL"}, {E1000_RDBAH(0), "RDBAH"}, {E1000_RDFH, "RDFH"}, {E1000_RDFT, "RDFT"}, {E1000_RDFHS, "RDFHS"}, {E1000_RDFTS, "RDFTS"}, {E1000_RDFPC, "RDFPC"}, /* Tx Registers */ {E1000_TCTL, "TCTL"}, {E1000_TDBAL(0), "TDBAL"}, {E1000_TDBAH(0), "TDBAH"}, {E1000_TDLEN(0), "TDLEN"}, {E1000_TDH(0), "TDH"}, {E1000_TDT(0), "TDT"}, {E1000_TIDV, "TIDV"}, {E1000_TXDCTL(0), "TXDCTL"}, {E1000_TADV, "TADV"}, {E1000_TARC(0), "TARC"}, {E1000_TDFH, "TDFH"}, {E1000_TDFT, "TDFT"}, {E1000_TDFHS, "TDFHS"}, {E1000_TDFTS, "TDFTS"}, {E1000_TDFPC, "TDFPC"}, /* List Terminator */ {0, NULL} }; /** * e1000_regdump - register printout routine * @hw: pointer to the HW structure * @reginfo: pointer to the register info table **/ static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo) { int n = 0; char rname[16]; u32 regs[8]; switch (reginfo->ofs) { case E1000_RXDCTL(0): for (n = 0; n < 2; n++) regs[n] = __er32(hw, E1000_RXDCTL(n)); break; case E1000_TXDCTL(0): for (n = 0; n < 2; n++) regs[n] = __er32(hw, E1000_TXDCTL(n)); break; case E1000_TARC(0): for (n = 0; n < 2; n++) regs[n] = __er32(hw, E1000_TARC(n)); break; default: pr_info("%-15s %08x\n", reginfo->name, __er32(hw, reginfo->ofs)); return; } snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]"); pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]); } static void e1000e_dump_ps_pages(struct e1000_adapter *adapter, struct e1000_buffer *bi) { int i; struct e1000_ps_page *ps_page; for (i = 0; i < adapter->rx_ps_pages; i++) { ps_page = &bi->ps_pages[i]; if (ps_page->page) { pr_info("packet dump for ps_page %d:\n", i); print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS, 16, 1, page_address(ps_page->page), PAGE_SIZE, true); } } } /** * e1000e_dump - Print registers, Tx-ring and Rx-ring * @adapter: board private structure **/ static void e1000e_dump(struct e1000_adapter *adapter) { struct net_device *netdev = adapter->netdev; struct e1000_hw *hw = &adapter->hw; struct e1000_reg_info *reginfo; struct e1000_ring *tx_ring = adapter->tx_ring; struct e1000_tx_desc *tx_desc; struct my_u0 { __le64 a; __le64 b; } *u0; struct e1000_buffer *buffer_info; struct e1000_ring *rx_ring = adapter->rx_ring; union e1000_rx_desc_packet_split *rx_desc_ps; union e1000_rx_desc_extended *rx_desc; struct my_u1 { __le64 a; __le64 b; __le64 c; __le64 d; } *u1; u32 staterr; int i = 0; if (!netif_msg_hw(adapter)) return; /* Print netdevice Info */ if (netdev) { dev_info(&adapter->pdev->dev, "Net device Info\n"); pr_info("Device Name state trans_start last_rx\n"); pr_info("%-15s %016lX %016lX %016lX\n", netdev->name, netdev->state, netdev->trans_start, netdev->last_rx); } /* Print Registers */ dev_info(&adapter->pdev->dev, "Register Dump\n"); pr_info(" Register Name Value\n"); for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl; reginfo->name; reginfo++) { e1000_regdump(hw, reginfo); } /* Print Tx Ring Summary */ if (!netdev || !netif_running(netdev)) return; dev_info(&adapter->pdev->dev, "Tx Ring Summary\n"); pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n"); buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean]; pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n", 0, tx_ring->next_to_use, tx_ring->next_to_clean, (unsigned long long)buffer_info->dma, buffer_info->length, buffer_info->next_to_watch, (unsigned long long)buffer_info->time_stamp); /* Print Tx Ring */ if (!netif_msg_tx_done(adapter)) goto rx_ring_summary; dev_info(&adapter->pdev->dev, "Tx Ring Dump\n"); /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended) * * Legacy Transmit Descriptor * +--------------------------------------------------------------+ * 0 | Buffer Address [63:0] (Reserved on Write Back) | * +--------------------------------------------------------------+ * 8 | Special | CSS | Status | CMD | CSO | Length | * +--------------------------------------------------------------+ * 63 48 47 36 35 32 31 24 23 16 15 0 * * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload * 63 48 47 40 39 32 31 16 15 8 7 0 * +----------------------------------------------------------------+ * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS | * +----------------------------------------------------------------+ * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN | * +----------------------------------------------------------------+ * 63 48 47 40 39 36 35 32 31 24 23 20 19 0 * * Extended Data Descriptor (DTYP=0x1) * +----------------------------------------------------------------+ * 0 | Buffer Address [63:0] | * +----------------------------------------------------------------+ * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN | * +----------------------------------------------------------------+ * 63 48 47 40 39 36 35 32 31 24 23 20 19 0 */ pr_info("Tl[desc] [address 63:0 ] [SpeCssSCmCsLen] [bi->dma ] leng ntw timestamp bi->skb <-- Legacy format\n"); pr_info("Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Context format\n"); pr_info("Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Data format\n"); for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) { const char *next_desc; tx_desc = E1000_TX_DESC(*tx_ring, i); buffer_info = &tx_ring->buffer_info[i]; u0 = (struct my_u0 *)tx_desc; if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean) next_desc = " NTC/U"; else if (i == tx_ring->next_to_use) next_desc = " NTU"; else if (i == tx_ring->next_to_clean) next_desc = " NTC"; else next_desc = ""; pr_info("T%c[0x%03X] %016llX %016llX %016llX %04X %3X %016llX %p%s\n", (!(le64_to_cpu(u0->b) & (1 << 29)) ? 'l' : ((le64_to_cpu(u0->b) & (1 << 20)) ? 'd' : 'c')), i, (unsigned long long)le64_to_cpu(u0->a), (unsigned long long)le64_to_cpu(u0->b), (unsigned long long)buffer_info->dma, buffer_info->length, buffer_info->next_to_watch, (unsigned long long)buffer_info->time_stamp, buffer_info->skb, next_desc); if (netif_msg_pktdata(adapter) && buffer_info->skb) print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS, 16, 1, buffer_info->skb->data, buffer_info->skb->len, true); } /* Print Rx Ring Summary */ rx_ring_summary: dev_info(&adapter->pdev->dev, "Rx Ring Summary\n"); pr_info("Queue [NTU] [NTC]\n"); pr_info(" %5d %5X %5X\n", 0, rx_ring->next_to_use, rx_ring->next_to_clean); /* Print Rx Ring */ if (!netif_msg_rx_status(adapter)) return; dev_info(&adapter->pdev->dev, "Rx Ring Dump\n"); switch (adapter->rx_ps_pages) { case 1: case 2: case 3: /* [Extended] Packet Split Receive Descriptor Format * * +-----------------------------------------------------+ * 0 | Buffer Address 0 [63:0] | * +-----------------------------------------------------+ * 8 | Buffer Address 1 [63:0] | * +-----------------------------------------------------+ * 16 | Buffer Address 2 [63:0] | * +-----------------------------------------------------+ * 24 | Buffer Address 3 [63:0] | * +-----------------------------------------------------+ */ pr_info("R [desc] [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] [bi->skb] <-- Ext Pkt Split format\n"); /* [Extended] Receive Descriptor (Write-Back) Format * * 63 48 47 32 31 13 12 8 7 4 3 0 * +------------------------------------------------------+ * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS | * | Checksum | Ident | | Queue | | Type | * +------------------------------------------------------+ * 8 | VLAN Tag | Length | Extended Error | Extended Status | * +------------------------------------------------------+ * 63 48 47 32 31 20 19 0 */ pr_info("RWB[desc] [ck ipid mrqhsh] [vl l0 ee es] [ l3 l2 l1 hs] [reserved ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n"); for (i = 0; i < rx_ring->count; i++) { const char *next_desc; buffer_info = &rx_ring->buffer_info[i]; rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i); u1 = (struct my_u1 *)rx_desc_ps; staterr = le32_to_cpu(rx_desc_ps->wb.middle.status_error); if (i == rx_ring->next_to_use) next_desc = " NTU"; else if (i == rx_ring->next_to_clean) next_desc = " NTC"; else next_desc = ""; if (staterr & E1000_RXD_STAT_DD) { /* Descriptor Done */ pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX ---------------- %p%s\n", "RWB", i, (unsigned long long)le64_to_cpu(u1->a), (unsigned long long)le64_to_cpu(u1->b), (unsigned long long)le64_to_cpu(u1->c), (unsigned long long)le64_to_cpu(u1->d), buffer_info->skb, next_desc); } else { pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX %016llX %p%s\n", "R ", i, (unsigned long long)le64_to_cpu(u1->a), (unsigned long long)le64_to_cpu(u1->b), (unsigned long long)le64_to_cpu(u1->c), (unsigned long long)le64_to_cpu(u1->d), (unsigned long long)buffer_info->dma, buffer_info->skb, next_desc); if (netif_msg_pktdata(adapter)) e1000e_dump_ps_pages(adapter, buffer_info); } } break; default: case 0: /* Extended Receive Descriptor (Read) Format * * +-----------------------------------------------------+ * 0 | Buffer Address [63:0] | * +-----------------------------------------------------+ * 8 | Reserved | * +-----------------------------------------------------+ */ pr_info("R [desc] [buf addr 63:0 ] [reserved 63:0 ] [bi->dma ] [bi->skb] <-- Ext (Read) format\n"); /* Extended Receive Descriptor (Write-Back) Format * * 63 48 47 32 31 24 23 4 3 0 * +------------------------------------------------------+ * | RSS Hash | | | | * 0 +-------------------+ Rsvd | Reserved | MRQ RSS | * | Packet | IP | | | Type | * | Checksum | Ident | | | | * +------------------------------------------------------+ * 8 | VLAN Tag | Length | Extended Error | Extended Status | * +------------------------------------------------------+ * 63 48 47 32 31 20 19 0 */ pr_info("RWB[desc] [cs ipid mrq] [vt ln xe xs] [bi->skb] <-- Ext (Write-Back) format\n"); for (i = 0; i < rx_ring->count; i++) { const char *next_desc; buffer_info = &rx_ring->buffer_info[i]; rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); u1 = (struct my_u1 *)rx_desc; staterr = le32_to_cpu(rx_desc->wb.upper.status_error); if (i == rx_ring->next_to_use) next_desc = " NTU"; else if (i == rx_ring->next_to_clean) next_desc = " NTC"; else next_desc = ""; if (staterr & E1000_RXD_STAT_DD) { /* Descriptor Done */ pr_info("%s[0x%03X] %016llX %016llX ---------------- %p%s\n", "RWB", i, (unsigned long long)le64_to_cpu(u1->a), (unsigned long long)le64_to_cpu(u1->b), buffer_info->skb, next_desc); } else { pr_info("%s[0x%03X] %016llX %016llX %016llX %p%s\n", "R ", i, (unsigned long long)le64_to_cpu(u1->a), (unsigned long long)le64_to_cpu(u1->b), (unsigned long long)buffer_info->dma, buffer_info->skb, next_desc); if (netif_msg_pktdata(adapter) && buffer_info->skb) print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS, 16, 1, buffer_info->skb->data, adapter->rx_buffer_len, true); } } } } /** * e1000_desc_unused - calculate if we have unused descriptors **/ static int e1000_desc_unused(struct e1000_ring *ring) { if (ring->next_to_clean > ring->next_to_use) return ring->next_to_clean - ring->next_to_use - 1; return ring->count + ring->next_to_clean - ring->next_to_use - 1; } /** * e1000e_systim_to_hwtstamp - convert system time value to hw time stamp * @adapter: board private structure * @hwtstamps: time stamp structure to update * @systim: unsigned 64bit system time value. * * Convert the system time value stored in the RX/TXSTMP registers into a * hwtstamp which can be used by the upper level time stamping functions. * * The 'systim_lock' spinlock is used to protect the consistency of the * system time value. This is needed because reading the 64 bit time * value involves reading two 32 bit registers. The first read latches the * value. **/ static void e1000e_systim_to_hwtstamp(struct e1000_adapter *adapter, struct skb_shared_hwtstamps *hwtstamps, u64 systim) { u64 ns; unsigned long flags; spin_lock_irqsave(&adapter->systim_lock, flags); ns = timecounter_cyc2time(&adapter->tc, systim); spin_unlock_irqrestore(&adapter->systim_lock, flags); memset(hwtstamps, 0, sizeof(*hwtstamps)); hwtstamps->hwtstamp = ns_to_ktime(ns); } /** * e1000e_rx_hwtstamp - utility function which checks for Rx time stamp * @adapter: board private structure * @status: descriptor extended error and status field * @skb: particular skb to include time stamp * * If the time stamp is valid, convert it into the timecounter ns value * and store that result into the shhwtstamps structure which is passed * up the network stack. **/ static void e1000e_rx_hwtstamp(struct e1000_adapter *adapter, u32 status, struct sk_buff *skb) { struct e1000_hw *hw = &adapter->hw; u64 rxstmp; if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP) || !(status & E1000_RXDEXT_STATERR_TST) || !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID)) return; /* The Rx time stamp registers contain the time stamp. No other * received packet will be time stamped until the Rx time stamp * registers are read. Because only one packet can be time stamped * at a time, the register values must belong to this packet and * therefore none of the other additional attributes need to be * compared. */ rxstmp = (u64)er32(RXSTMPL); rxstmp |= (u64)er32(RXSTMPH) << 32; e1000e_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), rxstmp); adapter->flags2 &= ~FLAG2_CHECK_RX_HWTSTAMP; } /** * e1000_receive_skb - helper function to handle Rx indications * @adapter: board private structure * @staterr: descriptor extended error and status field as written by hardware * @vlan: descriptor vlan field as written by hardware (no le/be conversion) * @skb: pointer to sk_buff to be indicated to stack **/ static void e1000_receive_skb(struct e1000_adapter *adapter, struct net_device *netdev, struct sk_buff *skb, u32 staterr, __le16 vlan) { u16 tag = le16_to_cpu(vlan); e1000e_rx_hwtstamp(adapter, staterr, skb); skb->protocol = eth_type_trans(skb, netdev); if (staterr & E1000_RXD_STAT_VP) __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), tag); napi_gro_receive(&adapter->napi, skb); } /** * e1000_rx_checksum - Receive Checksum Offload * @adapter: board private structure * @status_err: receive descriptor status and error fields * @csum: receive descriptor csum field * @sk_buff: socket buffer with received data **/ static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err, struct sk_buff *skb) { u16 status = (u16)status_err; u8 errors = (u8)(status_err >> 24); skb_checksum_none_assert(skb); /* Rx checksum disabled */ if (!(adapter->netdev->features & NETIF_F_RXCSUM)) return; /* Ignore Checksum bit is set */ if (status & E1000_RXD_STAT_IXSM) return; /* TCP/UDP checksum error bit or IP checksum error bit is set */ if (errors & (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) { /* let the stack verify checksum errors */ adapter->hw_csum_err++; return; } /* TCP/UDP Checksum has not been calculated */ if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))) return; /* It must be a TCP or UDP packet with a valid checksum */ skb->ip_summed = CHECKSUM_UNNECESSARY; adapter->hw_csum_good++; } static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i) { struct e1000_adapter *adapter = rx_ring->adapter; struct e1000_hw *hw = &adapter->hw; s32 ret_val = __ew32_prepare(hw); writel(i, rx_ring->tail); if (unlikely(!ret_val && (i != readl(rx_ring->tail)))) { u32 rctl = er32(RCTL); ew32(RCTL, rctl & ~E1000_RCTL_EN); e_err("ME firmware caused invalid RDT - resetting\n"); schedule_work(&adapter->reset_task); } } static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i) { struct e1000_adapter *adapter = tx_ring->adapter; struct e1000_hw *hw = &adapter->hw; s32 ret_val = __ew32_prepare(hw); writel(i, tx_ring->tail); if (unlikely(!ret_val && (i != readl(tx_ring->tail)))) { u32 tctl = er32(TCTL); ew32(TCTL, tctl & ~E1000_TCTL_EN); e_err("ME firmware caused invalid TDT - resetting\n"); schedule_work(&adapter->reset_task); } } /** * e1000_alloc_rx_buffers - Replace used receive buffers * @rx_ring: Rx descriptor ring **/ static void e1000_alloc_rx_buffers(struct e1000_ring *rx_ring, int cleaned_count, gfp_t gfp) { struct e1000_adapter *adapter = rx_ring->adapter; struct net_device *netdev = adapter->netdev; struct pci_dev *pdev = adapter->pdev; union e1000_rx_desc_extended *rx_desc; struct e1000_buffer *buffer_info; struct sk_buff *skb; unsigned int i; unsigned int bufsz = adapter->rx_buffer_len; i = rx_ring->next_to_use; buffer_info = &rx_ring->buffer_info[i]; while (cleaned_count--) { skb = buffer_info->skb; if (skb) { skb_trim(skb, 0); goto map_skb; } skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp); if (!skb) { /* Better luck next round */ adapter->alloc_rx_buff_failed++; break; } buffer_info->skb = skb; map_skb: buffer_info->dma = dma_map_single(&pdev->dev, skb->data, adapter->rx_buffer_len, DMA_FROM_DEVICE); if (dma_mapping_error(&pdev->dev, buffer_info->dma)) { dev_err(&pdev->dev, "Rx DMA map failed\n"); adapter->rx_dma_failed++; break; } rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma); if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) { /* Force memory writes to complete before letting h/w * know there are new descriptors to fetch. (Only * applicable for weak-ordered memory model archs, * such as IA-64). */ wmb(); if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) e1000e_update_rdt_wa(rx_ring, i); else writel(i, rx_ring->tail); } i++; if (i == rx_ring->count) i = 0; buffer_info = &rx_ring->buffer_info[i]; } rx_ring->next_to_use = i; } /** * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split * @rx_ring: Rx descriptor ring **/ static void e1000_alloc_rx_buffers_ps(struct e1000_ring *rx_ring, int cleaned_count, gfp_t gfp) { struct e1000_adapter *adapter = rx_ring->adapter; struct net_device *netdev = adapter->netdev; struct pci_dev *pdev = adapter->pdev; union e1000_rx_desc_packet_split *rx_desc; struct e1000_buffer *buffer_info; struct e1000_ps_page *ps_page; struct sk_buff *skb; unsigned int i, j; i = rx_ring->next_to_use; buffer_info = &rx_ring->buffer_info[i]; while (cleaned_count--) { rx_desc = E1000_RX_DESC_PS(*rx_ring, i); for (j = 0; j < PS_PAGE_BUFFERS; j++) { ps_page = &buffer_info->ps_pages[j]; if (j >= adapter->rx_ps_pages) { /* all unused desc entries get hw null ptr */ rx_desc->read.buffer_addr[j + 1] = ~cpu_to_le64(0); continue; } if (!ps_page->page) { ps_page->page = alloc_page(gfp); if (!ps_page->page) { adapter->alloc_rx_buff_failed++; goto no_buffers; } ps_page->dma = dma_map_page(&pdev->dev, ps_page->page, 0, PAGE_SIZE, DMA_FROM_DEVICE); if (dma_mapping_error(&pdev->dev, ps_page->dma)) { dev_err(&adapter->pdev->dev, "Rx DMA page map failed\n"); adapter->rx_dma_failed++; goto no_buffers; } } /* Refresh the desc even if buffer_addrs * didn't change because each write-back * erases this info. */ rx_desc->read.buffer_addr[j + 1] = cpu_to_le64(ps_page->dma); } skb = __netdev_alloc_skb_ip_align(netdev, adapter->rx_ps_bsize0, gfp); if (!skb) { adapter->alloc_rx_buff_failed++; break; } buffer_info->skb = skb; buffer_info->dma = dma_map_single(&pdev->dev, skb->data, adapter->rx_ps_bsize0, DMA_FROM_DEVICE); if (dma_mapping_error(&pdev->dev, buffer_info->dma)) { dev_err(&pdev->dev, "Rx DMA map failed\n"); adapter->rx_dma_failed++; /* cleanup skb */ dev_kfree_skb_any(skb); buffer_info->skb = NULL; break; } rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma); if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) { /* Force memory writes to complete before letting h/w * know there are new descriptors to fetch. (Only * applicable for weak-ordered memory model archs, * such as IA-64). */ wmb(); if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) e1000e_update_rdt_wa(rx_ring, i << 1); else writel(i << 1, rx_ring->tail); } i++; if (i == rx_ring->count) i = 0; buffer_info = &rx_ring->buffer_info[i]; } no_buffers: rx_ring->next_to_use = i; } /** * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers * @rx_ring: Rx descriptor ring * @cleaned_count: number of buffers to allocate this pass **/ static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring *rx_ring, int cleaned_count, gfp_t gfp) { struct e1000_adapter *adapter = rx_ring->adapter; struct net_device *netdev = adapter->netdev; struct pci_dev *pdev = adapter->pdev; union e1000_rx_desc_extended *rx_desc; struct e1000_buffer *buffer_info; struct sk_buff *skb; unsigned int i; unsigned int bufsz = 256 - 16; /* for skb_reserve */ i = rx_ring->next_to_use; buffer_info = &rx_ring->buffer_info[i]; while (cleaned_count--) { skb = buffer_info->skb; if (skb) { skb_trim(skb, 0); goto check_page; } skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp); if (unlikely(!skb)) { /* Better luck next round */ adapter->alloc_rx_buff_failed++; break; } buffer_info->skb = skb; check_page: /* allocate a new page if necessary */ if (!buffer_info->page) { buffer_info->page = alloc_page(gfp); if (unlikely(!buffer_info->page)) { adapter->alloc_rx_buff_failed++; break; } } if (!buffer_info->dma) { buffer_info->dma = dma_map_page(&pdev->dev, buffer_info->page, 0, PAGE_SIZE, DMA_FROM_DEVICE); if (dma_mapping_error(&pdev->dev, buffer_info->dma)) { adapter->alloc_rx_buff_failed++; break; } } rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma); if (unlikely(++i == rx_ring->count)) i = 0; buffer_info = &rx_ring->buffer_info[i]; } if (likely(rx_ring->next_to_use != i)) { rx_ring->next_to_use = i; if (unlikely(i-- == 0)) i = (rx_ring->count - 1); /* Force memory writes to complete before letting h/w * know there are new descriptors to fetch. (Only * applicable for weak-ordered memory model archs, * such as IA-64). */ wmb(); if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) e1000e_update_rdt_wa(rx_ring, i); else writel(i, rx_ring->tail); } } static inline void e1000_rx_hash(struct net_device *netdev, __le32 rss, struct sk_buff *skb) { if (netdev->features & NETIF_F_RXHASH) skb->rxhash = le32_to_cpu(rss); } /** * e1000_clean_rx_irq - Send received data up the network stack * @rx_ring: Rx descriptor ring * * the return value indicates whether actual cleaning was done, there * is no guarantee that everything was cleaned **/ static bool e1000_clean_rx_irq(struct e1000_ring *rx_ring, int *work_done, int work_to_do) { struct e1000_adapter *adapter = rx_ring->adapter; struct net_device *netdev = adapter->netdev; struct pci_dev *pdev = adapter->pdev; struct e1000_hw *hw = &adapter->hw; union e1000_rx_desc_extended *rx_desc, *next_rxd; struct e1000_buffer *buffer_info, *next_buffer; u32 length, staterr; unsigned int i; int cleaned_count = 0; bool cleaned = false; unsigned int total_rx_bytes = 0, total_rx_packets = 0; i = rx_ring->next_to_clean; rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); staterr = le32_to_cpu(rx_desc->wb.upper.status_error); buffer_info = &rx_ring->buffer_info[i]; while (staterr & E1000_RXD_STAT_DD) { struct sk_buff *skb; if (*work_done >= work_to_do) break; (*work_done)++; rmb(); /* read descriptor and rx_buffer_info after status DD */ skb = buffer_info->skb; buffer_info->skb = NULL; prefetch(skb->data - NET_IP_ALIGN); i++; if (i == rx_ring->count) i = 0; next_rxd = E1000_RX_DESC_EXT(*rx_ring, i); prefetch(next_rxd); next_buffer = &rx_ring->buffer_info[i]; cleaned = true; cleaned_count++; dma_unmap_single(&pdev->dev, buffer_info->dma, adapter->rx_buffer_len, DMA_FROM_DEVICE); buffer_info->dma = 0; length = le16_to_cpu(rx_desc->wb.upper.length); /* !EOP means multiple descriptors were used to store a single * packet, if that's the case we need to toss it. In fact, we * need to toss every packet with the EOP bit clear and the * next frame that _does_ have the EOP bit set, as it is by * definition only a frame fragment */ if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) adapter->flags2 |= FLAG2_IS_DISCARDING; if (adapter->flags2 & FLAG2_IS_DISCARDING) { /* All receives must fit into a single buffer */ e_dbg("Receive packet consumed multiple buffers\n"); /* recycle */ buffer_info->skb = skb; if (staterr & E1000_RXD_STAT_EOP) adapter->flags2 &= ~FLAG2_IS_DISCARDING; goto next_desc; } if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) && !(netdev->features & NETIF_F_RXALL))) { /* recycle */ buffer_info->skb = skb; goto next_desc; } /* adjust length to remove Ethernet CRC */ if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) { /* If configured to store CRC, don't subtract FCS, * but keep the FCS bytes out of the total_rx_bytes * counter */ if (netdev->features & NETIF_F_RXFCS) total_rx_bytes -= 4; else length -= 4; } total_rx_bytes += length; total_rx_packets++; /* code added for copybreak, this should improve * performance for small packets with large amounts * of reassembly being done in the stack */ if (length < copybreak) { struct sk_buff *new_skb = netdev_alloc_skb_ip_align(netdev, length); if (new_skb) { skb_copy_to_linear_data_offset(new_skb, -NET_IP_ALIGN, (skb->data - NET_IP_ALIGN), (length + NET_IP_ALIGN)); /* save the skb in buffer_info as good */ buffer_info->skb = skb; skb = new_skb; } /* else just continue with the old one */ } /* end copybreak code */ skb_put(skb, length); /* Receive Checksum Offload */ e1000_rx_checksum(adapter, staterr, skb); e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb); e1000_receive_skb(adapter, netdev, skb, staterr, rx_desc->wb.upper.vlan); next_desc: rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF); /* return some buffers to hardware, one at a time is too slow */ if (cleaned_count >= E1000_RX_BUFFER_WRITE) { adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC); cleaned_count = 0; } /* use prefetched values */ rx_desc = next_rxd; buffer_info = next_buffer; staterr = le32_to_cpu(rx_desc->wb.upper.status_error); } rx_ring->next_to_clean = i; cleaned_count = e1000_desc_unused(rx_ring); if (cleaned_count) adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC); adapter->total_rx_bytes += total_rx_bytes; adapter->total_rx_packets += total_rx_packets; return cleaned; } static void e1000_put_txbuf(struct e1000_ring *tx_ring, struct e1000_buffer *buffer_info) { struct e1000_adapter *adapter = tx_ring->adapter; if (buffer_info->dma) { if (buffer_info->mapped_as_page) dma_unmap_page(&adapter->pdev->dev, buffer_info->dma, buffer_info->length, DMA_TO_DEVICE); else dma_unmap_single(&adapter->pdev->dev, buffer_info->dma, buffer_info->length, DMA_TO_DEVICE); buffer_info->dma = 0; } if (buffer_info->skb) { dev_kfree_skb_any(buffer_info->skb); buffer_info->skb = NULL; } buffer_info->time_stamp = 0; } static void e1000_print_hw_hang(struct work_struct *work) { struct e1000_adapter *adapter = container_of(work, struct e1000_adapter, print_hang_task); struct net_device *netdev = adapter->netdev; struct e1000_ring *tx_ring = adapter->tx_ring; unsigned int i = tx_ring->next_to_clean; unsigned int eop = tx_ring->buffer_info[i].next_to_watch; struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop); struct e1000_hw *hw = &adapter->hw; u16 phy_status, phy_1000t_status, phy_ext_status; u16 pci_status; if (test_bit(__E1000_DOWN, &adapter->state)) return; if (!adapter->tx_hang_recheck && (adapter->flags2 & FLAG2_DMA_BURST)) { /* May be block on write-back, flush and detect again * flush pending descriptor writebacks to memory */ ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); /* execute the writes immediately */ e1e_flush(); /* Due to rare timing issues, write to TIDV again to ensure * the write is successful */ ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); /* execute the writes immediately */ e1e_flush(); adapter->tx_hang_recheck = true; return; } /* Real hang detected */ adapter->tx_hang_recheck = false; netif_stop_queue(netdev); e1e_rphy(hw, MII_BMSR, &phy_status); e1e_rphy(hw, MII_STAT1000, &phy_1000t_status); e1e_rphy(hw, MII_ESTATUS, &phy_ext_status); pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status); /* detected Hardware unit hang */ e_err("Detected Hardware Unit Hang:\n" " TDH <%x>\n" " TDT <%x>\n" " next_to_use <%x>\n" " next_to_clean <%x>\n" "buffer_info[next_to_clean]:\n" " time_stamp <%lx>\n" " next_to_watch <%x>\n" " jiffies <%lx>\n" " next_to_watch.status <%x>\n" "MAC Status <%x>\n" "PHY Status <%x>\n" "PHY 1000BASE-T Status <%x>\n" "PHY Extended Status <%x>\n" "PCI Status <%x>\n", readl(tx_ring->head), readl(tx_ring->tail), tx_ring->next_to_use, tx_ring->next_to_clean, tx_ring->buffer_info[eop].time_stamp, eop, jiffies, eop_desc->upper.fields.status, er32(STATUS), phy_status, phy_1000t_status, phy_ext_status, pci_status); /* Suggest workaround for known h/w issue */ if ((hw->mac.type == e1000_pchlan) && (er32(CTRL) & E1000_CTRL_TFCE)) e_err("Try turning off Tx pause (flow control) via ethtool\n"); } /** * e1000e_tx_hwtstamp_work - check for Tx time stamp * @work: pointer to work struct * * This work function polls the TSYNCTXCTL valid bit to determine when a * timestamp has been taken for the current stored skb. The timestamp must * be for this skb because only one such packet is allowed in the queue. */ static void e1000e_tx_hwtstamp_work(struct work_struct *work) { struct e1000_adapter *adapter = container_of(work, struct e1000_adapter, tx_hwtstamp_work); struct e1000_hw *hw = &adapter->hw; if (!adapter->tx_hwtstamp_skb) return; if (er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID) { struct skb_shared_hwtstamps shhwtstamps; u64 txstmp; txstmp = er32(TXSTMPL); txstmp |= (u64)er32(TXSTMPH) << 32; e1000e_systim_to_hwtstamp(adapter, &shhwtstamps, txstmp); skb_tstamp_tx(adapter->tx_hwtstamp_skb, &shhwtstamps); dev_kfree_skb_any(adapter->tx_hwtstamp_skb); adapter->tx_hwtstamp_skb = NULL; } else { /* reschedule to check later */ schedule_work(&adapter->tx_hwtstamp_work); } } /** * e1000_clean_tx_irq - Reclaim resources after transmit completes * @tx_ring: Tx descriptor ring * * the return value indicates whether actual cleaning was done, there * is no guarantee that everything was cleaned **/ static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring) { struct e1000_adapter *adapter = tx_ring->adapter; struct net_device *netdev = adapter->netdev; struct e1000_hw *hw = &adapter->hw; struct e1000_tx_desc *tx_desc, *eop_desc; struct e1000_buffer *buffer_info; unsigned int i, eop; unsigned int count = 0; unsigned int total_tx_bytes = 0, total_tx_packets = 0; unsigned int bytes_compl = 0, pkts_compl = 0; i = tx_ring->next_to_clean; eop = tx_ring->buffer_info[i].next_to_watch; eop_desc = E1000_TX_DESC(*tx_ring, eop); while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) && (count < tx_ring->count)) { bool cleaned = false; rmb(); /* read buffer_info after eop_desc */ for (; !cleaned; count++) { tx_desc = E1000_TX_DESC(*tx_ring, i); buffer_info = &tx_ring->buffer_info[i]; cleaned = (i == eop); if (cleaned) { total_tx_packets += buffer_info->segs; total_tx_bytes += buffer_info->bytecount; if (buffer_info->skb) { bytes_compl += buffer_info->skb->len; pkts_compl++; } } e1000_put_txbuf(tx_ring, buffer_info); tx_desc->upper.data = 0; i++; if (i == tx_ring->count) i = 0; } if (i == tx_ring->next_to_use) break; eop = tx_ring->buffer_info[i].next_to_watch; eop_desc = E1000_TX_DESC(*tx_ring, eop); } tx_ring->next_to_clean = i; netdev_completed_queue(netdev, pkts_compl, bytes_compl); #define TX_WAKE_THRESHOLD 32 if (count && netif_carrier_ok(netdev) && e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) { /* Make sure that anybody stopping the queue after this * sees the new next_to_clean. */ smp_mb(); if (netif_queue_stopped(netdev) && !(test_bit(__E1000_DOWN, &adapter->state))) { netif_wake_queue(netdev); ++adapter->restart_queue; } } if (adapter->detect_tx_hung) { /* Detect a transmit hang in hardware, this serializes the * check with the clearing of time_stamp and movement of i */ adapter->detect_tx_hung = false; if (tx_ring->buffer_info[i].time_stamp && time_after(jiffies, tx_ring->buffer_info[i].time_stamp + (adapter->tx_timeout_factor * HZ)) && !(er32(STATUS) & E1000_STATUS_TXOFF)) schedule_work(&adapter->print_hang_task); else adapter->tx_hang_recheck = false; } adapter->total_tx_bytes += total_tx_bytes; adapter->total_tx_packets += total_tx_packets; return count < tx_ring->count; } /** * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split * @rx_ring: Rx descriptor ring * * the return value indicates whether actual cleaning was done, there * is no guarantee that everything was cleaned **/ static bool e1000_clean_rx_irq_ps(struct e1000_ring *rx_ring, int *work_done, int work_to_do) { struct e1000_adapter *adapter = rx_ring->adapter; struct e1000_hw *hw = &adapter->hw; union e1000_rx_desc_packet_split *rx_desc, *next_rxd; struct net_device *netdev = adapter->netdev; struct pci_dev *pdev = adapter->pdev; struct e1000_buffer *buffer_info, *next_buffer; struct e1000_ps_page *ps_page; struct sk_buff *skb; unsigned int i, j; u32 length, staterr; int cleaned_count = 0; bool cleaned = false; unsigned int total_rx_bytes = 0, total_rx_packets = 0; i = rx_ring->next_to_clean; rx_desc = E1000_RX_DESC_PS(*rx_ring, i); staterr = le32_to_cpu(rx_desc->wb.middle.status_error); buffer_info = &rx_ring->buffer_info[i]; while (staterr & E1000_RXD_STAT_DD) { if (*work_done >= work_to_do) break; (*work_done)++; skb = buffer_info->skb; rmb(); /* read descriptor and rx_buffer_info after status DD */ /* in the packet split case this is header only */ prefetch(skb->data - NET_IP_ALIGN); i++; if (i == rx_ring->count) i = 0; next_rxd = E1000_RX_DESC_PS(*rx_ring, i); prefetch(next_rxd); next_buffer = &rx_ring->buffer_info[i]; cleaned = true; cleaned_count++; dma_unmap_single(&pdev->dev, buffer_info->dma, adapter->rx_ps_bsize0, DMA_FROM_DEVICE); buffer_info->dma = 0; /* see !EOP comment in other Rx routine */ if (!(staterr & E1000_RXD_STAT_EOP)) adapter->flags2 |= FLAG2_IS_DISCARDING; if (adapter->flags2 & FLAG2_IS_DISCARDING) { e_dbg("Packet Split buffers didn't pick up the full packet\n"); dev_kfree_skb_irq(skb); if (staterr & E1000_RXD_STAT_EOP) adapter->flags2 &= ~FLAG2_IS_DISCARDING; goto next_desc; } if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) && !(netdev->features & NETIF_F_RXALL))) { dev_kfree_skb_irq(skb); goto next_desc; } length = le16_to_cpu(rx_desc->wb.middle.length0); if (!length) { e_dbg("Last part of the packet spanning multiple descriptors\n"); dev_kfree_skb_irq(skb); goto next_desc; } /* Good Receive */ skb_put(skb, length); { /* this looks ugly, but it seems compiler issues make * it more efficient than reusing j */ int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]); /* page alloc/put takes too long and effects small * packet throughput, so unsplit small packets and * save the alloc/put only valid in softirq (napi) * context to call kmap_* */ if (l1 && (l1 <= copybreak) && ((length + l1) <= adapter->rx_ps_bsize0)) { u8 *vaddr; ps_page = &buffer_info->ps_pages[0]; /* there is no documentation about how to call * kmap_atomic, so we can't hold the mapping * very long */ dma_sync_single_for_cpu(&pdev->dev, ps_page->dma, PAGE_SIZE, DMA_FROM_DEVICE); vaddr = kmap_atomic(ps_page->page); memcpy(skb_tail_pointer(skb), vaddr, l1); kunmap_atomic(vaddr); dma_sync_single_for_device(&pdev->dev, ps_page->dma, PAGE_SIZE, DMA_FROM_DEVICE); /* remove the CRC */ if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) { if (!(netdev->features & NETIF_F_RXFCS)) l1 -= 4; } skb_put(skb, l1); goto copydone; } /* if */ } for (j = 0; j < PS_PAGE_BUFFERS; j++) { length = le16_to_cpu(rx_desc->wb.upper.length[j]); if (!length) break; ps_page = &buffer_info->ps_pages[j]; dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE, DMA_FROM_DEVICE); ps_page->dma = 0; skb_fill_page_desc(skb, j, ps_page->page, 0, length); ps_page->page = NULL; skb->len += length; skb->data_len += length; skb->truesize += PAGE_SIZE; } /* strip the ethernet crc, problem is we're using pages now so * this whole operation can get a little cpu intensive */ if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) { if (!(netdev->features & NETIF_F_RXFCS)) pskb_trim(skb, skb->len - 4); } copydone: total_rx_bytes += skb->len; total_rx_packets++; e1000_rx_checksum(adapter, staterr, skb); e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb); if (rx_desc->wb.upper.header_status & cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)) adapter->rx_hdr_split++; e1000_receive_skb(adapter, netdev, skb, staterr, rx_desc->wb.middle.vlan); next_desc: rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF); buffer_info->skb = NULL; /* return some buffers to hardware, one at a time is too slow */ if (cleaned_count >= E1000_RX_BUFFER_WRITE) { adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC); cleaned_count = 0; } /* use prefetched values */ rx_desc = next_rxd; buffer_info = next_buffer; staterr = le32_to_cpu(rx_desc->wb.middle.status_error); } rx_ring->next_to_clean = i; cleaned_count = e1000_desc_unused(rx_ring); if (cleaned_count) adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC); adapter->total_rx_bytes += total_rx_bytes; adapter->total_rx_packets += total_rx_packets; return cleaned; } /** * e1000_consume_page - helper function **/ static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb, u16 length) { bi->page = NULL; skb->len += length; skb->data_len += length; skb->truesize += PAGE_SIZE; } /** * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy * @adapter: board private structure * * the return value indicates whether actual cleaning was done, there * is no guarantee that everything was cleaned **/ static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done, int work_to_do) { struct e1000_adapter *adapter = rx_ring->adapter; struct net_device *netdev = adapter->netdev; struct pci_dev *pdev = adapter->pdev; union e1000_rx_desc_extended *rx_desc, *next_rxd; struct e1000_buffer *buffer_info, *next_buffer; u32 length, staterr; unsigned int i; int cleaned_count = 0; bool cleaned = false; unsigned int total_rx_bytes = 0, total_rx_packets = 0; struct skb_shared_info *shinfo; i = rx_ring->next_to_clean; rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); staterr = le32_to_cpu(rx_desc->wb.upper.status_error); buffer_info = &rx_ring->buffer_info[i]; while (staterr & E1000_RXD_STAT_DD) { struct sk_buff *skb; if (*work_done >= work_to_do) break; (*work_done)++; rmb(); /* read descriptor and rx_buffer_info after status DD */ skb = buffer_info->skb; buffer_info->skb = NULL; ++i; if (i == rx_ring->count) i = 0; next_rxd = E1000_RX_DESC_EXT(*rx_ring, i); prefetch(next_rxd); next_buffer = &rx_ring->buffer_info[i]; cleaned = true; cleaned_count++; dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE, DMA_FROM_DEVICE); buffer_info->dma = 0; length = le16_to_cpu(rx_desc->wb.upper.length); /* errors is only valid for DD + EOP descriptors */ if (unlikely((staterr & E1000_RXD_STAT_EOP) && ((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) && !(netdev->features & NETIF_F_RXALL)))) { /* recycle both page and skb */ buffer_info->skb = skb; /* an error means any chain goes out the window too */ if (rx_ring->rx_skb_top) dev_kfree_skb_irq(rx_ring->rx_skb_top); rx_ring->rx_skb_top = NULL; goto next_desc; } #define rxtop (rx_ring->rx_skb_top) if (!(staterr & E1000_RXD_STAT_EOP)) { /* this descriptor is only the beginning (or middle) */ if (!rxtop) { /* this is the beginning of a chain */ rxtop = skb; skb_fill_page_desc(rxtop, 0, buffer_info->page, 0, length); } else { /* this is the middle of a chain */ shinfo = skb_shinfo(rxtop); skb_fill_page_desc(rxtop, shinfo->nr_frags, buffer_info->page, 0, length); /* re-use the skb, only consumed the page */ buffer_info->skb = skb; } e1000_consume_page(buffer_info, rxtop, length); goto next_desc; } else { if (rxtop) { /* end of the chain */ shinfo = skb_shinfo(rxtop); skb_fill_page_desc(rxtop, shinfo->nr_frags, buffer_info->page, 0, length); /* re-use the current skb, we only consumed the * page */ buffer_info->skb = skb; skb = rxtop; rxtop = NULL; e1000_consume_page(buffer_info, skb, length); } else { /* no chain, got EOP, this buf is the packet * copybreak to save the put_page/alloc_page */ if (length <= copybreak && skb_tailroom(skb) >= length) { u8 *vaddr; vaddr = kmap_atomic(buffer_info->page); memcpy(skb_tail_pointer(skb), vaddr, length); kunmap_atomic(vaddr); /* re-use the page, so don't erase * buffer_info->page */ skb_put(skb, length); } else { skb_fill_page_desc(skb, 0, buffer_info->page, 0, length); e1000_consume_page(buffer_info, skb, length); } } } /* Receive Checksum Offload */ e1000_rx_checksum(adapter, staterr, skb); e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb); /* probably a little skewed due to removing CRC */ total_rx_bytes += skb->len; total_rx_packets++; /* eth type trans needs skb->data to point to something */ if (!pskb_may_pull(skb, ETH_HLEN)) { e_err("pskb_may_pull failed.\n"); dev_kfree_skb_irq(skb); goto next_desc; } e1000_receive_skb(adapter, netdev, skb, staterr, rx_desc->wb.upper.vlan); next_desc: rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF); /* return some buffers to hardware, one at a time is too slow */ if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) { adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC); cleaned_count = 0; } /* use prefetched values */ rx_desc = next_rxd; buffer_info = next_buffer; staterr = le32_to_cpu(rx_desc->wb.upper.status_error); } rx_ring->next_to_clean = i; cleaned_count = e1000_desc_unused(rx_ring); if (cleaned_count) adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC); adapter->total_rx_bytes += total_rx_bytes; adapter->total_rx_packets += total_rx_packets; return cleaned; } /** * e1000_clean_rx_ring - Free Rx Buffers per Queue * @rx_ring: Rx descriptor ring **/ static void e1000_clean_rx_ring(struct e1000_ring *rx_ring) { struct e1000_adapter *adapter = rx_ring->adapter; struct e1000_buffer *buffer_info; struct e1000_ps_page *ps_page; struct pci_dev *pdev = adapter->pdev; unsigned int i, j; /* Free all the Rx ring sk_buffs */ for (i = 0; i < rx_ring->count; i++) { buffer_info = &rx_ring->buffer_info[i]; if (buffer_info->dma) { if (adapter->clean_rx == e1000_clean_rx_irq) dma_unmap_single(&pdev->dev, buffer_info->dma, adapter->rx_buffer_len, DMA_FROM_DEVICE); else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq) dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE, DMA_FROM_DEVICE); else if (adapter->clean_rx == e1000_clean_rx_irq_ps) dma_unmap_single(&pdev->dev, buffer_info->dma, adapter->rx_ps_bsize0, DMA_FROM_DEVICE); buffer_info->dma = 0; } if (buffer_info->page) { put_page(buffer_info->page); buffer_info->page = NULL; } if (buffer_info->skb) { dev_kfree_skb(buffer_info->skb); buffer_info->skb = NULL; } for (j = 0; j < PS_PAGE_BUFFERS; j++) { ps_page = &buffer_info->ps_pages[j]; if (!ps_page->page) break; dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE, DMA_FROM_DEVICE); ps_page->dma = 0; put_page(ps_page->page); ps_page->page = NULL; } } /* there also may be some cached data from a chained receive */ if (rx_ring->rx_skb_top) { dev_kfree_skb(rx_ring->rx_skb_top); rx_ring->rx_skb_top = NULL; } /* Zero out the descriptor ring */ memset(rx_ring->desc, 0, rx_ring->size); rx_ring->next_to_clean = 0; rx_ring->next_to_use = 0; adapter->flags2 &= ~FLAG2_IS_DISCARDING; writel(0, rx_ring->head); if (rx_ring->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) e1000e_update_rdt_wa(rx_ring, 0); else writel(0, rx_ring->tail); } static void e1000e_downshift_workaround(struct work_struct *work) { struct e1000_adapter *adapter = container_of(work, struct e1000_adapter, downshift_task); if (test_bit(__E1000_DOWN, &adapter->state)) return; e1000e_gig_downshift_workaround_ich8lan(&adapter->hw); } /** * e1000_intr_msi - Interrupt Handler * @irq: interrupt number * @data: pointer to a network interface device structure **/ static irqreturn_t e1000_intr_msi(int __always_unused irq, void *data) { struct net_device *netdev = data; struct e1000_adapter *adapter = netdev_priv(netdev); struct e1000_hw *hw = &adapter->hw; u32 icr = er32(ICR); /* read ICR disables interrupts using IAM */ if (icr & E1000_ICR_LSC) { hw->mac.get_link_status = true; /* ICH8 workaround-- Call gig speed drop workaround on cable * disconnect (LSC) before accessing any PHY registers */ if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) && (!(er32(STATUS) & E1000_STATUS_LU))) schedule_work(&adapter->downshift_task); /* 80003ES2LAN workaround-- For packet buffer work-around on * link down event; disable receives here in the ISR and reset * adapter in watchdog */ if (netif_carrier_ok(netdev) && adapter->flags & FLAG_RX_NEEDS_RESTART) { /* disable receives */ u32 rctl = er32(RCTL); ew32(RCTL, rctl & ~E1000_RCTL_EN); adapter->flags |= FLAG_RESTART_NOW; } /* guard against interrupt when we're going down */ if (!test_bit(__E1000_DOWN, &adapter->state)) mod_timer(&adapter->watchdog_timer, jiffies + 1); } /* Reset on uncorrectable ECC error */ if ((icr & E1000_ICR_ECCER) && (hw->mac.type == e1000_pch_lpt)) { u32 pbeccsts = er32(PBECCSTS); adapter->corr_errors += pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK; adapter->uncorr_errors += (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >> E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT; /* Do the reset outside of interrupt context */ schedule_work(&adapter->reset_task); /* return immediately since reset is imminent */ return IRQ_HANDLED; } if (napi_schedule_prep(&adapter->napi)) { adapter->total_tx_bytes = 0; adapter->total_tx_packets = 0; adapter->total_rx_bytes = 0; adapter->total_rx_packets = 0; __napi_schedule(&adapter->napi); } return IRQ_HANDLED; } /** * e1000_intr - Interrupt Handler * @irq: interrupt number * @data: pointer to a network interface device structure **/ static irqreturn_t e1000_intr(int __always_unused irq, void *data) { struct net_device *netdev = data; struct e1000_adapter *adapter = netdev_priv(netdev); struct e1000_hw *hw = &adapter->hw; u32 rctl, icr = er32(ICR); if (!icr || test_bit(__E1000_DOWN, &adapter->state)) return IRQ_NONE; /* Not our interrupt */ /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is * not set, then the adapter didn't send an interrupt */ if (!(icr & E1000_ICR_INT_ASSERTED)) return IRQ_NONE; /* Interrupt Auto-Mask...upon reading ICR, * interrupts are masked. No need for the * IMC write */ if (icr & E1000_ICR_LSC) { hw->mac.get_link_status = true; /* ICH8 workaround-- Call gig speed drop workaround on cable * disconnect (LSC) before accessing any PHY registers */ if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) && (!(er32(STATUS) & E1000_STATUS_LU))) schedule_work(&adapter->downshift_task); /* 80003ES2LAN workaround-- * For packet buffer work-around on link down event; * disable receives here in the ISR and * reset adapter in watchdog */ if (netif_carrier_ok(netdev) && (adapter->flags & FLAG_RX_NEEDS_RESTART)) { /* disable receives */ rctl = er32(RCTL); ew32(RCTL, rctl & ~E1000_RCTL_EN); adapter->flags |= FLAG_RESTART_NOW; } /* guard against interrupt when we're going down */ if (!test_bit(__E1000_DOWN, &adapter->state)) mod_timer(&adapter->watchdog_timer, jiffies + 1); } /* Reset on uncorrectable ECC error */ if ((icr & E1000_ICR_ECCER) && (hw->mac.type == e1000_pch_lpt)) { u32 pbeccsts = er32(PBECCSTS); adapter->corr_errors += pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK; adapter->uncorr_errors += (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >> E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT; /* Do the reset outside of interrupt context */ schedule_work(&adapter->reset_task); /* return immediately since reset is imminent */ return IRQ_HANDLED; } if (napi_schedule_prep(&adapter->napi)) { adapter->total_tx_bytes = 0; adapter->total_tx_packets = 0; adapter->total_rx_bytes = 0; adapter->total_rx_packets = 0; __napi_schedule(&adapter->napi); } return IRQ_HANDLED; } static irqreturn_t e1000_msix_other(int __always_unused irq, void *data) { struct net_device *netdev = data; struct e1000_adapter *adapter = netdev_priv(netdev); struct e1000_hw *hw = &adapter->hw; u32 icr = er32(ICR); if (!(icr & E1000_ICR_INT_ASSERTED)) { if (!test_bit(__E1000_DOWN, &adapter->state)) ew32(IMS, E1000_IMS_OTHER); return IRQ_NONE; } if (icr & adapter->eiac_mask) ew32(ICS, (icr & adapter->eiac_mask)); if (icr & E1000_ICR_OTHER) { if (!(icr & E1000_ICR_LSC)) goto no_link_interrupt; hw->mac.get_link_status = true; /* guard against interrupt when we're going down */ if (!test_bit(__E1000_DOWN, &adapter->state)) mod_timer(&adapter->watchdog_timer, jiffies + 1); } no_link_interrupt: if (!test_bit(__E1000_DOWN, &adapter->state)) ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER); return IRQ_HANDLED; } static irqreturn_t e1000_intr_msix_tx(int __always_unused irq, void *data) { struct net_device *netdev = data; struct e1000_adapter *adapter = netdev_priv(netdev); struct e1000_hw *hw = &adapter->hw; struct e1000_ring *tx_ring = adapter->tx_ring; adapter->total_tx_bytes = 0; adapter->total_tx_packets = 0; if (!e1000_clean_tx_irq(tx_ring)) /* Ring was not completely cleaned, so fire another interrupt */ ew32(ICS, tx_ring->ims_val); return IRQ_HANDLED; } static irqreturn_t e1000_intr_msix_rx(int __always_unused irq, void *data) { struct net_device *netdev = data; struct e1000_adapter *adapter = netdev_priv(netdev); struct e1000_ring *rx_ring = adapter->rx_ring; /* Write the ITR value calculated at the end of the * previous interrupt. */ if (rx_ring->set_itr) { writel(1000000000 / (rx_ring->itr_val * 256), rx_ring->itr_register); rx_ring->set_itr = 0; } if (napi_schedule_prep(&adapter->napi)) { adapter->total_rx_bytes = 0; adapter->total_rx_packets = 0; __napi_schedule(&adapter->napi); } return IRQ_HANDLED; } /** * e1000_configure_msix - Configure MSI-X hardware * * e1000_configure_msix sets up the hardware to properly * generate MSI-X interrupts. **/ static void e1000_configure_msix(struct e1000_adapter *adapter) { struct e1000_hw *hw = &adapter->hw; struct e1000_ring *rx_ring = adapter->rx_ring; struct e1000_ring *tx_ring = adapter->tx_ring; int vector = 0; u32 ctrl_ext, ivar = 0; adapter->eiac_mask = 0; /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */ if (hw->mac.type == e1000_82574) { u32 rfctl = er32(RFCTL); rfctl |= E1000_RFCTL_ACK_DIS; ew32(RFCTL, rfctl); } /* Configure Rx vector */ rx_ring->ims_val = E1000_IMS_RXQ0; adapter->eiac_mask |= rx_ring->ims_val; if (rx_ring->itr_val) writel(1000000000 / (rx_ring->itr_val * 256), rx_ring->itr_register); else writel(1, rx_ring->itr_register); ivar = E1000_IVAR_INT_ALLOC_VALID | vector; /* Configure Tx vector */ tx_ring->ims_val = E1000_IMS_TXQ0; vector++; if (tx_ring->itr_val) writel(1000000000 / (tx_ring->itr_val * 256), tx_ring->itr_register); else writel(1, tx_ring->itr_register); adapter->eiac_mask |= tx_ring->ims_val; ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8); /* set vector for Other Causes, e.g. link changes */ vector++; ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16); if (rx_ring->itr_val) writel(1000000000 / (rx_ring->itr_val * 256), hw->hw_addr + E1000_EITR_82574(vector)); else writel(1, hw->hw_addr + E1000_EITR_82574(vector)); /* Cause Tx interrupts on every write back */ ivar |= (1 << 31); ew32(IVAR, ivar); /* enable MSI-X PBA support */ ctrl_ext = er32(CTRL_EXT); ctrl_ext |= E1000_CTRL_EXT_PBA_CLR; /* Auto-Mask Other interrupts upon ICR read */ ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER); ctrl_ext |= E1000_CTRL_EXT_EIAME; ew32(CTRL_EXT, ctrl_ext); e1e_flush(); } void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter) { if (adapter->msix_entries) { pci_disable_msix(adapter->pdev); kfree(adapter->msix_entries); adapter->msix_entries = NULL; } else if (adapter->flags & FLAG_MSI_ENABLED) { pci_disable_msi(adapter->pdev); adapter->flags &= ~FLAG_MSI_ENABLED; } } /** * e1000e_set_interrupt_capability - set MSI or MSI-X if supported * * Attempt to configure interrupts using the best available * capabilities of the hardware and kernel. **/ void e1000e_set_interrupt_capability(struct e1000_adapter *adapter) { int err; int i; switch (adapter->int_mode) { case E1000E_INT_MODE_MSIX: if (adapter->flags & FLAG_HAS_MSIX) { adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */ adapter->msix_entries = kcalloc(adapter->num_vectors, sizeof(struct msix_entry), GFP_KERNEL); if (adapter->msix_entries) { for (i = 0; i < adapter->num_vectors; i++) adapter->msix_entries[i].entry = i; err = pci_enable_msix(adapter->pdev, adapter->msix_entries, adapter->num_vectors); if (err == 0) return; } /* MSI-X failed, so fall through and try MSI */ e_err("Failed to initialize MSI-X interrupts. Falling back to MSI interrupts.\n"); e1000e_reset_interrupt_capability(adapter); } adapter->int_mode = E1000E_INT_MODE_MSI; /* Fall through */ case E1000E_INT_MODE_MSI: if (!pci_enable_msi(adapter->pdev)) { adapter->flags |= FLAG_MSI_ENABLED; } else { adapter->int_mode = E1000E_INT_MODE_LEGACY; e_err("Failed to initialize MSI interrupts. Falling back to legacy interrupts.\n"); } /* Fall through */ case E1000E_INT_MODE_LEGACY: /* Don't do anything; this is the system default */ break; } /* store the number of vectors being used */ adapter->num_vectors = 1; } /** * e1000_request_msix - Initialize MSI-X interrupts * * e1000_request_msix allocates MSI-X vectors and requests interrupts from the * kernel. **/ static int e1000_request_msix(struct e1000_adapter *adapter) { struct net_device *netdev = adapter->netdev; int err = 0, vector = 0; if (strlen(netdev->name) < (IFNAMSIZ - 5)) snprintf(adapter->rx_ring->name, sizeof(adapter->rx_ring->name) - 1, "%s-rx-0", netdev->name); else memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ); err = request_irq(adapter->msix_entries[vector].vector, e1000_intr_msix_rx, 0, adapter->rx_ring->name, netdev); if (err) return err; adapter->rx_ring->itr_register = adapter->hw.hw_addr + E1000_EITR_82574(vector); adapter->rx_ring->itr_val = adapter->itr; vector++; if (strlen(netdev->name) < (IFNAMSIZ - 5)) snprintf(adapter->tx_ring->name, sizeof(adapter->tx_ring->name) - 1, "%s-tx-0", netdev->name); else memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ); err = request_irq(adapter->msix_entries[vector].vector, e1000_intr_msix_tx, 0, adapter->tx_ring->name, netdev); if (err) return err; adapter->tx_ring->itr_register = adapter->hw.hw_addr + E1000_EITR_82574(vector); adapter->tx_ring->itr_val = adapter->itr; vector++; err = request_irq(adapter->msix_entries[vector].vector, e1000_msix_other, 0, netdev->name, netdev); if (err) return err; e1000_configure_msix(adapter); return 0; } /** * e1000_request_irq - initialize interrupts * * Attempts to configure interrupts using the best available * capabilities of the hardware and kernel. **/ static int e1000_request_irq(struct e1000_adapter *adapter) { struct net_device *netdev = adapter->netdev; int err; if (adapter->msix_entries) { err = e1000_request_msix(adapter); if (!err) return err; /* fall back to MSI */ e1000e_reset_interrupt_capability(adapter); adapter->int_mode = E1000E_INT_MODE_MSI; e1000e_set_interrupt_capability(adapter); } if (adapter->flags & FLAG_MSI_ENABLED) { err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0, netdev->name, netdev); if (!err) return err; /* fall back to legacy interrupt */ e1000e_reset_interrupt_capability(adapter); adapter->int_mode = E1000E_INT_MODE_LEGACY; } err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED, netdev->name, netdev); if (err) e_err("Unable to allocate interrupt, Error: %d\n", err); return err; } static void e1000_free_irq(struct e1000_adapter *adapter) { struct net_device *netdev = adapter->netdev; if (adapter->msix_entries) { int vector = 0; free_irq(adapter->msix_entries[vector].vector, netdev); vector++; free_irq(adapter->msix_entries[vector].vector, netdev); vector++; /* Other Causes interrupt vector */ free_irq(adapter->msix_entries[vector].vector, netdev); return; } free_irq(adapter->pdev->irq, netdev); } /** * e1000_irq_disable - Mask off interrupt generation on the NIC **/ static void e1000_irq_disable(struct e1000_adapter *adapter) { struct e1000_hw *hw = &adapter->hw; ew32(IMC, ~0); if (adapter->msix_entries) ew32(EIAC_82574, 0); e1e_flush(); if (adapter->msix_entries) { int i; for (i = 0; i < adapter->num_vectors; i++) synchronize_irq(adapter->msix_entries[i].vector); } else { synchronize_irq(adapter->pdev->irq); } } /** * e1000_irq_enable - Enable default interrupt generation settings **/ static void e1000_irq_enable(struct e1000_adapter *adapter) { struct e1000_hw *hw = &adapter->hw; if (adapter->msix_entries) { ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574); ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC); } else if (hw->mac.type == e1000_pch_lpt) { ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER); } else { ew32(IMS, IMS_ENABLE_MASK); } e1e_flush(); } /** * e1000e_get_hw_control - get control of the h/w from f/w * @adapter: address of board private structure * * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit. * For ASF and Pass Through versions of f/w this means that * the driver is loaded. For AMT version (only with 82573) * of the f/w this means that the network i/f is open. **/ void e1000e_get_hw_control(struct e1000_adapter *adapter) { struct e1000_hw *hw = &adapter->hw; u32 ctrl_ext; u32 swsm; /* Let firmware know the driver has taken over */ if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) { swsm = er32(SWSM); ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD); } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) { ctrl_ext = er32(CTRL_EXT); ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); } } /** * e1000e_release_hw_control - release control of the h/w to f/w * @adapter: address of board private structure * * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit. * For ASF and Pass Through versions of f/w this means that the * driver is no longer loaded. For AMT version (only with 82573) i * of the f/w this means that the network i/f is closed. * **/ void e1000e_release_hw_control(struct e1000_adapter *adapter) { struct e1000_hw *hw = &adapter->hw; u32 ctrl_ext; u32 swsm; /* Let firmware taken over control of h/w */ if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) { swsm = er32(SWSM); ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD); } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) { ctrl_ext = er32(CTRL_EXT); ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD); } } /** * e1000_alloc_ring_dma - allocate memory for a ring structure **/ static int e1000_alloc_ring_dma(struct e1000_adapter *adapter, struct e1000_ring *ring) { struct pci_dev *pdev = adapter->pdev; ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma, GFP_KERNEL); if (!ring->desc) return -ENOMEM; return 0; } /** * e1000e_setup_tx_resources - allocate Tx resources (Descriptors) * @tx_ring: Tx descriptor ring * * Return 0 on success, negative on failure **/ int e1000e_setup_tx_resources(struct e1000_ring *tx_ring) { struct e1000_adapter *adapter = tx_ring->adapter; int err = -ENOMEM, size; size = sizeof(struct e1000_buffer) * tx_ring->count; tx_ring->buffer_info = vzalloc(size); if (!tx_ring->buffer_info) goto err; /* round up to nearest 4K */ tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc); tx_ring->size = ALIGN(tx_ring->size, 4096); err = e1000_alloc_ring_dma(adapter, tx_ring); if (err) goto err; tx_ring->next_to_use = 0; tx_ring->next_to_clean = 0; return 0; err: vfree(tx_ring->buffer_info); e_err("Unable to allocate memory for the transmit descriptor ring\n"); return err; } /** * e1000e_setup_rx_resources - allocate Rx resources (Descriptors) * @rx_ring: Rx descriptor ring * * Returns 0 on success, negative on failure **/ int e1000e_setup_rx_resources(struct e1000_ring *rx_ring) { struct e1000_adapter *adapter = rx_ring->adapter; struct e1000_buffer *buffer_info; int i, size, desc_len, err = -ENOMEM; size = sizeof(struct e1000_buffer) * rx_ring->count; rx_ring->buffer_info = vzalloc(size); if (!rx_ring->buffer_info) goto err; for (i = 0; i < rx_ring->count; i++) { buffer_info = &rx_ring->buffer_info[i]; buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS, sizeof(struct e1000_ps_page), GFP_KERNEL); if (!buffer_info->ps_pages) goto err_pages; } desc_len = sizeof(union e1000_rx_desc_packet_split); /* Round up to nearest 4K */ rx_ring->size = rx_ring->count * desc_len; rx_ring->size = ALIGN(rx_ring->size, 4096); err = e1000_alloc_ring_dma(adapter, rx_ring); if (err) goto err_pages; rx_ring->next_to_clean = 0; rx_ring->next_to_use = 0; rx_ring->rx_skb_top = NULL; return 0; err_pages: for (i = 0; i < rx_ring->count; i++) { buffer_info = &rx_ring->buffer_info[i]; kfree(buffer_info->ps_pages); } err: vfree(rx_ring->buffer_info); e_err("Unable to allocate memory for the receive descriptor ring\n"); return err; } /** * e1000_clean_tx_ring - Free Tx Buffers * @tx_ring: Tx descriptor ring **/ static void e1000_clean_tx_ring(struct e1000_ring *tx_ring) { struct e1000_adapter *adapter = tx_ring->adapter; struct e1000_buffer *buffer_info; unsigned long size; unsigned int i; for (i = 0; i < tx_ring->count; i++) { buffer_info = &tx_ring->buffer_info[i]; e1000_put_txbuf(tx_ring, buffer_info); } netdev_reset_queue(adapter->netdev); size = sizeof(struct e1000_buffer) * tx_ring->count; memset(tx_ring->buffer_info, 0, size); memset(tx_ring->desc, 0, tx_ring->size); tx_ring->next_to_use = 0; tx_ring->next_to_clean = 0; writel(0, tx_ring->head); if (tx_ring->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) e1000e_update_tdt_wa(tx_ring, 0); else writel(0, tx_ring->tail); } /** * e1000e_free_tx_resources - Free Tx Resources per Queue * @tx_ring: Tx descriptor ring * * Free all transmit software resources **/ void e1000e_free_tx_resources(struct e1000_ring *tx_ring) { struct e1000_adapter *adapter = tx_ring->adapter; struct pci_dev *pdev = adapter->pdev; e1000_clean_tx_ring(tx_ring); vfree(tx_ring->buffer_info); tx_ring->buffer_info = NULL; dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc, tx_ring->dma); tx_ring->desc = NULL; } /** * e1000e_free_rx_resources - Free Rx Resources * @rx_ring: Rx descriptor ring * * Free all receive software resources **/ void e1000e_free_rx_resources(struct e1000_ring *rx_ring) { struct e1000_adapter *adapter = rx_ring->adapter; struct pci_dev *pdev = adapter->pdev; int i; e1000_clean_rx_ring(rx_ring); for (i = 0; i < rx_ring->count; i++) kfree(rx_ring->buffer_info[i].ps_pages); vfree(rx_ring->buffer_info); rx_ring->buffer_info = NULL; dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc, rx_ring->dma); rx_ring->desc = NULL; } /** * e1000_update_itr - update the dynamic ITR value based on statistics * @adapter: pointer to adapter * @itr_setting: current adapter->itr * @packets: the number of packets during this measurement interval * @bytes: the number of bytes during this measurement interval * * Stores a new ITR value based on packets and byte * counts during the last interrupt. The advantage of per interrupt * computation is faster updates and more accurate ITR for the current * traffic pattern. Constants in this function were computed * based on theoretical maximum wire speed and thresholds were set based * on testing data as well as attempting to minimize response time * while increasing bulk throughput. This functionality is controlled * by the InterruptThrottleRate module parameter. **/ static unsigned int e1000_update_itr(u16 itr_setting, int packets, int bytes) { unsigned int retval = itr_setting; if (packets == 0) return itr_setting; switch (itr_setting) { case lowest_latency: /* handle TSO and jumbo frames */ if (bytes / packets > 8000) retval = bulk_latency; else if ((packets < 5) && (bytes > 512)) retval = low_latency; break; case low_latency: /* 50 usec aka 20000 ints/s */ if (bytes > 10000) { /* this if handles the TSO accounting */ if (bytes / packets > 8000) retval = bulk_latency; else if ((packets < 10) || ((bytes / packets) > 1200)) retval = bulk_latency; else if ((packets > 35)) retval = lowest_latency; } else if (bytes / packets > 2000) { retval = bulk_latency; } else if (packets <= 2 && bytes < 512) { retval = lowest_latency; } break; case bulk_latency: /* 250 usec aka 4000 ints/s */ if (bytes > 25000) { if (packets > 35) retval = low_latency; } else if (bytes < 6000) { retval = low_latency; } break; } return retval; } static void e1000_set_itr(struct e1000_adapter *adapter) { u16 current_itr; u32 new_itr = adapter->itr; /* for non-gigabit speeds, just fix the interrupt rate at 4000 */ if (adapter->link_speed != SPEED_1000) { current_itr = 0; new_itr = 4000; goto set_itr_now; } if (adapter->flags2 & FLAG2_DISABLE_AIM) { new_itr = 0; goto set_itr_now; } adapter->tx_itr = e1000_update_itr(adapter->tx_itr, adapter->total_tx_packets, adapter->total_tx_bytes); /* conservative mode (itr 3) eliminates the lowest_latency setting */ if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency) adapter->tx_itr = low_latency; adapter->rx_itr = e1000_update_itr(adapter->rx_itr, adapter->total_rx_packets, adapter->total_rx_bytes); /* conservative mode (itr 3) eliminates the lowest_latency setting */ if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency) adapter->rx_itr = low_latency; current_itr = max(adapter->rx_itr, adapter->tx_itr); /* counts and packets in update_itr are dependent on these numbers */ switch (current_itr) { case lowest_latency: new_itr = 70000; break; case low_latency: new_itr = 20000; /* aka hwitr = ~200 */ break; case bulk_latency: new_itr = 4000; break; default: break; } set_itr_now: if (new_itr != adapter->itr) { /* this attempts to bias the interrupt rate towards Bulk * by adding intermediate steps when interrupt rate is * increasing */ new_itr = new_itr > adapter->itr ? min(adapter->itr + (new_itr >> 2), new_itr) : new_itr; adapter->itr = new_itr; adapter->rx_ring->itr_val = new_itr; if (adapter->msix_entries) adapter->rx_ring->set_itr = 1; else e1000e_write_itr(adapter, new_itr); } } /** * e1000e_write_itr - write the ITR value to the appropriate registers * @adapter: address of board private structure * @itr: new ITR value to program * * e1000e_write_itr determines if the adapter is in MSI-X mode * and, if so, writes the EITR registers with the ITR value. * Otherwise, it writes the ITR value into the ITR register. **/ void e1000e_write_itr(struct e1000_adapter *adapter, u32 itr) { struct e1000_hw *hw = &adapter->hw; u32 new_itr = itr ? 1000000000 / (itr * 256) : 0; if (adapter->msix_entries) { int vector; for (vector = 0; vector < adapter->num_vectors; vector++) writel(new_itr, hw->hw_addr + E1000_EITR_82574(vector)); } else { ew32(ITR, new_itr); } } /** * e1000_alloc_queues - Allocate memory for all rings * @adapter: board private structure to initialize **/ static int e1000_alloc_queues(struct e1000_adapter *adapter) { int size = sizeof(struct e1000_ring); adapter->tx_ring = kzalloc(size, GFP_KERNEL); if (!adapter->tx_ring) goto err; adapter->tx_ring->count = adapter->tx_ring_count; adapter->tx_ring->adapter = adapter; adapter->rx_ring = kzalloc(size, GFP_KERNEL); if (!adapter->rx_ring) goto err; adapter->rx_ring->count = adapter->rx_ring_count; adapter->rx_ring->adapter = adapter; return 0; err: e_err("Unable to allocate memory for queues\n"); kfree(adapter->rx_ring); kfree(adapter->tx_ring); return -ENOMEM; } /** * e1000e_poll - NAPI Rx polling callback * @napi: struct associated with this polling callback * @weight: number of packets driver is allowed to process this poll **/ static int e1000e_poll(struct napi_struct *napi, int weight) { struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi); struct e1000_hw *hw = &adapter->hw; struct net_device *poll_dev = adapter->netdev; int tx_cleaned = 1, work_done = 0; adapter = netdev_priv(poll_dev); if (!adapter->msix_entries || (adapter->rx_ring->ims_val & adapter->tx_ring->ims_val)) tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring); adapter->clean_rx(adapter->rx_ring, &work_done, weight); if (!tx_cleaned) work_done = weight; /* If weight not fully consumed, exit the polling mode */ if (work_done < weight) { if (adapter->itr_setting & 3) e1000_set_itr(adapter); napi_complete(napi); if (!test_bit(__E1000_DOWN, &adapter->state)) { if (adapter->msix_entries) ew32(IMS, adapter->rx_ring->ims_val); else e1000_irq_enable(adapter); } } return work_done; } static int e1000_vlan_rx_add_vid(struct net_device *netdev, __always_unused __be16 proto, u16 vid) { struct e1000_adapter *adapter = netdev_priv(netdev); struct e1000_hw *hw = &adapter->hw; u32 vfta, index; /* don't update vlan cookie if already programmed */ if ((adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) && (vid == adapter->mng_vlan_id)) return 0; /* add VID to filter table */ if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { index = (vid >> 5) & 0x7F; vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index); vfta |= (1 << (vid & 0x1F)); hw->mac.ops.write_vfta(hw, index, vfta); } set_bit(vid, adapter->active_vlans); return 0; } static int e1000_vlan_rx_kill_vid(struct net_device *netdev, __always_unused __be16 proto, u16 vid) { struct e1000_adapter *adapter = netdev_priv(netdev); struct e1000_hw *hw = &adapter->hw; u32 vfta, index; if ((adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) && (vid == adapter->mng_vlan_id)) { /* release control to f/w */ e1000e_release_hw_control(adapter); return 0; } /* remove VID from filter table */ if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { index = (vid >> 5) & 0x7F; vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index); vfta &= ~(1 << (vid & 0x1F)); hw->mac.ops.write_vfta(hw, index, vfta); } clear_bit(vid, adapter->active_vlans); return 0; } /** * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering * @adapter: board private structure to initialize **/ static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter) { struct net_device *netdev = adapter->netdev; struct e1000_hw *hw = &adapter->hw; u32 rctl; if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { /* disable VLAN receive filtering */ rctl = er32(RCTL); rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN); ew32(RCTL, rctl); if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) { e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q), adapter->mng_vlan_id); adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; } } } /** * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering * @adapter: board private structure to initialize **/ static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter) { struct e1000_hw *hw = &adapter->hw; u32 rctl; if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { /* enable VLAN receive filtering */ rctl = er32(RCTL); rctl |= E1000_RCTL_VFE; rctl &= ~E1000_RCTL_CFIEN; ew32(RCTL, rctl); } } /** * e1000e_vlan_strip_enable - helper to disable HW VLAN stripping * @adapter: board private structure to initialize **/ static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter) { struct e1000_hw *hw = &adapter->hw; u32 ctrl; /* disable VLAN tag insert/strip */ ctrl = er32(CTRL); ctrl &= ~E1000_CTRL_VME; ew32(CTRL, ctrl); } /** * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping * @adapter: board private structure to initialize **/ static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter) { struct e1000_hw *hw = &adapter->hw; u32 ctrl; /* enable VLAN tag insert/strip */ ctrl = er32(CTRL); ctrl |= E1000_CTRL_VME; ew32(CTRL, ctrl); } static void e1000_update_mng_vlan(struct e1000_adapter *adapter) { struct net_device *netdev = adapter->netdev; u16 vid = adapter->hw.mng_cookie.vlan_id; u16 old_vid = adapter->mng_vlan_id; if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) { e1000_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid); adapter->mng_vlan_id = vid; } if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid)) e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q), old_vid); } static void e1000_restore_vlan(struct e1000_adapter *adapter) { u16 vid; e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0); for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID) e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid); } static void e1000_init_manageability_pt(struct e1000_adapter *adapter) { struct e1000_hw *hw = &adapter->hw; u32 manc, manc2h, mdef, i, j; if (!(adapter->flags & FLAG_MNG_PT_ENABLED)) return; manc = er32(MANC); /* enable receiving management packets to the host. this will probably * generate destination unreachable messages from the host OS, but * the packets will be handled on SMBUS */ manc |= E1000_MANC_EN_MNG2HOST; manc2h = er32(MANC2H); switch (hw->mac.type) { default: manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664); break; case e1000_82574: case e1000_82583: /* Check if IPMI pass-through decision filter already exists; * if so, enable it. */ for (i = 0, j = 0; i < 8; i++) { mdef = er32(MDEF(i)); /* Ignore filters with anything other than IPMI ports */ if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664)) continue; /* Enable this decision filter in MANC2H */ if (mdef) manc2h |= (1 << i); j |= mdef; } if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664)) break; /* Create new decision filter in an empty filter */ for (i = 0, j = 0; i < 8; i++) if (er32(MDEF(i)) == 0) { ew32(MDEF(i), (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664)); manc2h |= (1 << 1); j++; break; } if (!j) e_warn("Unable to create IPMI pass-through filter\n"); break; } ew32(MANC2H, manc2h); ew32(MANC, manc); } /** * e1000_configure_tx - Configure Transmit Unit after Reset * @adapter: board private structure * * Configure the Tx unit of the MAC after a reset. **/ static void e1000_configure_tx(struct e1000_adapter *adapter) { struct e1000_hw *hw = &adapter->hw; struct e1000_ring *tx_ring = adapter->tx_ring; u64 tdba; u32 tdlen, tarc; /* Setup the HW Tx Head and Tail descriptor pointers */ tdba = tx_ring->dma; tdlen = tx_ring->count * sizeof(struct e1000_tx_desc); ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32))); ew32(TDBAH(0), (tdba >> 32)); ew32(TDLEN(0), tdlen); ew32(TDH(0), 0); ew32(TDT(0), 0); tx_ring->head = adapter->hw.hw_addr + E1000_TDH(0); tx_ring->tail = adapter->hw.hw_addr + E1000_TDT(0); /* Set the Tx Interrupt Delay register */ ew32(TIDV, adapter->tx_int_delay); /* Tx irq moderation */ ew32(TADV, adapter->tx_abs_int_delay); if (adapter->flags2 & FLAG2_DMA_BURST) { u32 txdctl = er32(TXDCTL(0)); txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH | E1000_TXDCTL_WTHRESH); /* set up some performance related parameters to encourage the * hardware to use the bus more efficiently in bursts, depends * on the tx_int_delay to be enabled, * wthresh = 1 ==> burst write is disabled to avoid Tx stalls * hthresh = 1 ==> prefetch when one or more available * pthresh = 0x1f ==> prefetch if internal cache 31 or less * BEWARE: this seems to work but should be considered first if * there are Tx hangs or other Tx related bugs */ txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE; ew32(TXDCTL(0), txdctl); } /* erratum work around: set txdctl the same for both queues */ ew32(TXDCTL(1), er32(TXDCTL(0))); if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) { tarc = er32(TARC(0)); /* set the speed mode bit, we'll clear it if we're not at * gigabit link later */ #define SPEED_MODE_BIT (1 << 21) tarc |= SPEED_MODE_BIT; ew32(TARC(0), tarc); } /* errata: program both queues to unweighted RR */ if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) { tarc = er32(TARC(0)); tarc |= 1; ew32(TARC(0), tarc); tarc = er32(TARC(1)); tarc |= 1; ew32(TARC(1), tarc); } /* Setup Transmit Descriptor Settings for eop descriptor */ adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS; /* only set IDE if we are delaying interrupts using the timers */ if (adapter->tx_int_delay) adapter->txd_cmd |= E1000_TXD_CMD_IDE; /* enable Report Status bit */ adapter->txd_cmd |= E1000_TXD_CMD_RS; hw->mac.ops.config_collision_dist(hw); } /** * e1000_setup_rctl - configure the receive control registers * @adapter: Board private structure **/ #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \ (((S) & (PAGE_SIZE - 1)) ? 1 : 0)) static void e1000_setup_rctl(struct e1000_adapter *adapter) { struct e1000_hw *hw = &adapter->hw; u32 rctl, rfctl; u32 pages = 0; /* Workaround Si errata on PCHx - configure jumbo frame flow. * If jumbo frames not set, program related MAC/PHY registers * to h/w defaults */ if (hw->mac.type >= e1000_pch2lan) { s32 ret_val; if (adapter->netdev->mtu > ETH_DATA_LEN) ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true); else ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false); if (ret_val) e_dbg("failed to enable|disable jumbo frame workaround mode\n"); } /* Program MC offset vector base */ rctl = er32(RCTL); rctl &= ~(3 << E1000_RCTL_MO_SHIFT); rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF | (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT); /* Do not Store bad packets */ rctl &= ~E1000_RCTL_SBP; /* Enable Long Packet receive */ if (adapter->netdev->mtu <= ETH_DATA_LEN) rctl &= ~E1000_RCTL_LPE; else rctl |= E1000_RCTL_LPE; /* Some systems expect that the CRC is included in SMBUS traffic. The * hardware strips the CRC before sending to both SMBUS (BMC) and to * host memory when this is enabled */ if (adapter->flags2 & FLAG2_CRC_STRIPPING) rctl |= E1000_RCTL_SECRC; /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */ if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) { u16 phy_data; e1e_rphy(hw, PHY_REG(770, 26), &phy_data); phy_data &= 0xfff8; phy_data |= (1 << 2); e1e_wphy(hw, PHY_REG(770, 26), phy_data); e1e_rphy(hw, 22, &phy_data); phy_data &= 0x0fff; phy_data |= (1 << 14); e1e_wphy(hw, 0x10, 0x2823); e1e_wphy(hw, 0x11, 0x0003); e1e_wphy(hw, 22, phy_data); } /* Setup buffer sizes */ rctl &= ~E1000_RCTL_SZ_4096; rctl |= E1000_RCTL_BSEX; switch (adapter->rx_buffer_len) { case 2048: default: rctl |= E1000_RCTL_SZ_2048; rctl &= ~E1000_RCTL_BSEX; break; case 4096: rctl |= E1000_RCTL_SZ_4096; break; case 8192: rctl |= E1000_RCTL_SZ_8192; break; case 16384: rctl |= E1000_RCTL_SZ_16384; break; } /* Enable Extended Status in all Receive Descriptors */ rfctl = er32(RFCTL); rfctl |= E1000_RFCTL_EXTEN; ew32(RFCTL, rfctl); /* 82571 and greater support packet-split where the protocol * header is placed in skb->data and the packet data is * placed in pages hanging off of skb_shinfo(skb)->nr_frags. * In the case of a non-split, skb->data is linearly filled, * followed by the page buffers. Therefore, skb->data is * sized to hold the largest protocol header. * * allocations using alloc_page take too long for regular MTU * so only enable packet split for jumbo frames * * Using pages when the page size is greater than 16k wastes * a lot of memory, since we allocate 3 pages at all times * per packet. */ pages = PAGE_USE_COUNT(adapter->netdev->mtu); if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE)) adapter->rx_ps_pages = pages; else adapter->rx_ps_pages = 0; if (adapter->rx_ps_pages) { u32 psrctl = 0; /* Enable Packet split descriptors */ rctl |= E1000_RCTL_DTYP_PS; psrctl |= adapter->rx_ps_bsize0 >> E1000_PSRCTL_BSIZE0_SHIFT; switch (adapter->rx_ps_pages) { case 3: psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE3_SHIFT; /* fall-through */ case 2: psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE2_SHIFT; /* fall-through */ case 1: psrctl |= PAGE_SIZE >> E1000_PSRCTL_BSIZE1_SHIFT; break; } ew32(PSRCTL, psrctl); } /* This is useful for sniffing bad packets. */ if (adapter->netdev->features & NETIF_F_RXALL) { /* UPE and MPE will be handled by normal PROMISC logic * in e1000e_set_rx_mode */ rctl |= (E1000_RCTL_SBP | /* Receive bad packets */ E1000_RCTL_BAM | /* RX All Bcast Pkts */ E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */ rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */ E1000_RCTL_DPF | /* Allow filtered pause */ E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */ /* Do not mess with E1000_CTRL_VME, it affects transmit as well, * and that breaks VLANs. */ } ew32(RCTL, rctl); /* just started the receive unit, no need to restart */ adapter->flags &= ~FLAG_RESTART_NOW; } /** * e1000_configure_rx - Configure Receive Unit after Reset * @adapter: board private structure * * Configure the Rx unit of the MAC after a reset. **/ static void e1000_configure_rx(struct e1000_adapter *adapter) { struct e1000_hw *hw = &adapter->hw; struct e1000_ring *rx_ring = adapter->rx_ring; u64 rdba; u32 rdlen, rctl, rxcsum, ctrl_ext; if (adapter->rx_ps_pages) { /* this is a 32 byte descriptor */ rdlen = rx_ring->count * sizeof(union e1000_rx_desc_packet_split); adapter->clean_rx = e1000_clean_rx_irq_ps; adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps; } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) { rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended); adapter->clean_rx = e1000_clean_jumbo_rx_irq; adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers; } else { rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended); adapter->clean_rx = e1000_clean_rx_irq; adapter->alloc_rx_buf = e1000_alloc_rx_buffers; } /* disable receives while setting up the descriptors */ rctl = er32(RCTL); if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX)) ew32(RCTL, rctl & ~E1000_RCTL_EN); e1e_flush(); usleep_range(10000, 20000); if (adapter->flags2 & FLAG2_DMA_BURST) { /* set the writeback threshold (only takes effect if the RDTR * is set). set GRAN=1 and write back up to 0x4 worth, and * enable prefetching of 0x20 Rx descriptors * granularity = 01 * wthresh = 04, * hthresh = 04, * pthresh = 0x20 */ ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE); ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE); /* override the delay timers for enabling bursting, only if * the value was not set by the user via module options */ if (adapter->rx_int_delay == DEFAULT_RDTR) adapter->rx_int_delay = BURST_RDTR; if (adapter->rx_abs_int_delay == DEFAULT_RADV) adapter->rx_abs_int_delay = BURST_RADV; } /* set the Receive Delay Timer Register */ ew32(RDTR, adapter->rx_int_delay); /* irq moderation */ ew32(RADV, adapter->rx_abs_int_delay); if ((adapter->itr_setting != 0) && (adapter->itr != 0)) e1000e_write_itr(adapter, adapter->itr); ctrl_ext = er32(CTRL_EXT); /* Auto-Mask interrupts upon ICR access */ ctrl_ext |= E1000_CTRL_EXT_IAME; ew32(IAM, 0xffffffff); ew32(CTRL_EXT, ctrl_ext); e1e_flush(); /* Setup the HW Rx Head and Tail Descriptor Pointers and * the Base and Length of the Rx Descriptor Ring */ rdba = rx_ring->dma; ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32))); ew32(RDBAH(0), (rdba >> 32)); ew32(RDLEN(0), rdlen); ew32(RDH(0), 0); ew32(RDT(0), 0); rx_ring->head = adapter->hw.hw_addr + E1000_RDH(0); rx_ring->tail = adapter->hw.hw_addr + E1000_RDT(0); /* Enable Receive Checksum Offload for TCP and UDP */ rxcsum = er32(RXCSUM); if (adapter->netdev->features & NETIF_F_RXCSUM) rxcsum |= E1000_RXCSUM_TUOFL; else rxcsum &= ~E1000_RXCSUM_TUOFL; ew32(RXCSUM, rxcsum); /* With jumbo frames, excessive C-state transition latencies result * in dropped transactions. */ if (adapter->netdev->mtu > ETH_DATA_LEN) { u32 lat = ((er32(PBA) & E1000_PBA_RXA_MASK) * 1024 - adapter->max_frame_size) * 8 / 1000; if (adapter->flags & FLAG_IS_ICH) { u32 rxdctl = er32(RXDCTL(0)); ew32(RXDCTL(0), rxdctl | 0x3); } pm_qos_update_request(&adapter->netdev->pm_qos_req, lat); } else { pm_qos_update_request(&adapter->netdev->pm_qos_req, PM_QOS_DEFAULT_VALUE); } /* Enable Receives */ ew32(RCTL, rctl); } /** * e1000e_write_mc_addr_list - write multicast addresses to MTA * @netdev: network interface device structure * * Writes multicast address list to the MTA hash table. * Returns: -ENOMEM on failure * 0 on no addresses written * X on writing X addresses to MTA */ static int e1000e_write_mc_addr_list(struct net_device *netdev) { struct e1000_adapter *adapter = netdev_priv(netdev); struct e1000_hw *hw = &adapter->hw; struct netdev_hw_addr *ha; u8 *mta_list; int i; if (netdev_mc_empty(netdev)) { /* nothing to program, so clear mc list */ hw->mac.ops.update_mc_addr_list(hw, NULL, 0); return 0; } mta_list = kzalloc(netdev_mc_count(netdev) * ETH_ALEN, GFP_ATOMIC); if (!mta_list) return -ENOMEM; /* update_mc_addr_list expects a packed array of only addresses. */ i = 0; netdev_for_each_mc_addr(ha, netdev) memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN); hw->mac.ops.update_mc_addr_list(hw, mta_list, i); kfree(mta_list); return netdev_mc_count(netdev); } /** * e1000e_write_uc_addr_list - write unicast addresses to RAR table * @netdev: network interface device structure * * Writes unicast address list to the RAR table. * Returns: -ENOMEM on failure/insufficient address space * 0 on no addresses written * X on writing X addresses to the RAR table **/ static int e1000e_write_uc_addr_list(struct net_device *netdev) { struct e1000_adapter *adapter = netdev_priv(netdev); struct e1000_hw *hw = &adapter->hw; unsigned int rar_entries = hw->mac.rar_entry_count; int count = 0; /* save a rar entry for our hardware address */ rar_entries--; /* save a rar entry for the LAA workaround */ if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) rar_entries--; /* return ENOMEM indicating insufficient memory for addresses */ if (netdev_uc_count(netdev) > rar_entries) return -ENOMEM; if (!netdev_uc_empty(netdev) && rar_entries) { struct netdev_hw_addr *ha; /* write the addresses in reverse order to avoid write * combining */ netdev_for_each_uc_addr(ha, netdev) { if (!rar_entries) break; hw->mac.ops.rar_set(hw, ha->addr, rar_entries--); count++; } } /* zero out the remaining RAR entries not used above */ for (; rar_entries > 0; rar_entries--) { ew32(RAH(rar_entries), 0); ew32(RAL(rar_entries), 0); } e1e_flush(); return count; } /** * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set * @netdev: network interface device structure * * The ndo_set_rx_mode entry point is called whenever the unicast or multicast * address list or the network interface flags are updated. This routine is * responsible for configuring the hardware for proper unicast, multicast, * promiscuous mode, and all-multi behavior. **/ static void e1000e_set_rx_mode(struct net_device *netdev) { struct e1000_adapter *adapter = netdev_priv(netdev); struct e1000_hw *hw = &adapter->hw; u32 rctl; /* Check for Promiscuous and All Multicast modes */ rctl = er32(RCTL); /* clear the affected bits */ rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE); if (netdev->flags & IFF_PROMISC) { rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE); /* Do not hardware filter VLANs in promisc mode */ e1000e_vlan_filter_disable(adapter); } else { int count; if (netdev->flags & IFF_ALLMULTI) { rctl |= E1000_RCTL_MPE; } else { /* Write addresses to the MTA, if the attempt fails * then we should just turn on promiscuous mode so * that we can at least receive multicast traffic */ count = e1000e_write_mc_addr_list(netdev); if (count < 0) rctl |= E1000_RCTL_MPE; } e1000e_vlan_filter_enable(adapter); /* Write addresses to available RAR registers, if there is not * sufficient space to store all the addresses then enable * unicast promiscuous mode */ count = e1000e_write_uc_addr_list(netdev); if (count < 0) rctl |= E1000_RCTL_UPE; } ew32(RCTL, rctl); if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX) e1000e_vlan_strip_enable(adapter); else e1000e_vlan_strip_disable(adapter); } static void e1000e_setup_rss_hash(struct e1000_adapter *adapter) { struct e1000_hw *hw = &adapter->hw; u32 mrqc, rxcsum; int i; static const u32 rsskey[10] = { 0xda565a6d, 0xc20e5b25, 0x3d256741, 0xb08fa343, 0xcb2bcad0, 0xb4307bae, 0xa32dcb77, 0x0cf23080, 0x3bb7426a, 0xfa01acbe }; /* Fill out hash function seed */ for (i = 0; i < 10; i++) ew32(RSSRK(i), rsskey[i]); /* Direct all traffic to queue 0 */ for (i = 0; i < 32; i++) ew32(RETA(i), 0); /* Disable raw packet checksumming so that RSS hash is placed in * descriptor on writeback. */ rxcsum = er32(RXCSUM); rxcsum |= E1000_RXCSUM_PCSD; ew32(RXCSUM, rxcsum); mrqc = (E1000_MRQC_RSS_FIELD_IPV4 | E1000_MRQC_RSS_FIELD_IPV4_TCP | E1000_MRQC_RSS_FIELD_IPV6 | E1000_MRQC_RSS_FIELD_IPV6_TCP | E1000_MRQC_RSS_FIELD_IPV6_TCP_EX); ew32(MRQC, mrqc); } /** * e1000e_get_base_timinca - get default SYSTIM time increment attributes * @adapter: board private structure * @timinca: pointer to returned time increment attributes * * Get attributes for incrementing the System Time Register SYSTIML/H at * the default base frequency, and set the cyclecounter shift value. **/ s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca) { struct e1000_hw *hw = &adapter->hw; u32 incvalue, incperiod, shift; /* Make sure clock is enabled on I217 before checking the frequency */ if ((hw->mac.type == e1000_pch_lpt) && !(er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) && !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_ENABLED)) { u32 fextnvm7 = er32(FEXTNVM7); if (!(fextnvm7 & (1 << 0))) { ew32(FEXTNVM7, fextnvm7 | (1 << 0)); e1e_flush(); } } switch (hw->mac.type) { case e1000_pch2lan: case e1000_pch_lpt: /* On I217, the clock frequency is 25MHz or 96MHz as * indicated by the System Clock Frequency Indication */ if ((hw->mac.type != e1000_pch_lpt) || (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI)) { /* Stable 96MHz frequency */ incperiod = INCPERIOD_96MHz; incvalue = INCVALUE_96MHz; shift = INCVALUE_SHIFT_96MHz; adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHz; break; } /* fall-through */ case e1000_82574: case e1000_82583: /* Stable 25MHz frequency */ incperiod = INCPERIOD_25MHz; incvalue = INCVALUE_25MHz; shift = INCVALUE_SHIFT_25MHz; adapter->cc.shift = shift; break; default: return -EINVAL; } *timinca = ((incperiod << E1000_TIMINCA_INCPERIOD_SHIFT) | ((incvalue << shift) & E1000_TIMINCA_INCVALUE_MASK)); return 0; } /** * e1000e_config_hwtstamp - configure the hwtstamp registers and enable/disable * @adapter: board private structure * * Outgoing time stamping can be enabled and disabled. Play nice and * disable it when requested, although it shouldn't cause any overhead * when no packet needs it. At most one packet in the queue may be * marked for time stamping, otherwise it would be impossible to tell * for sure to which packet the hardware time stamp belongs. * * Incoming time stamping has to be configured via the hardware filters. * Not all combinations are supported, in particular event type has to be * specified. Matching the kind of event packet is not supported, with the * exception of "all V2 events regardless of level 2 or 4". **/ static int e1000e_config_hwtstamp(struct e1000_adapter *adapter, struct hwtstamp_config *config) { struct e1000_hw *hw = &adapter->hw; u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED; u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED; u32 rxmtrl = 0; u16 rxudp = 0; bool is_l4 = false; bool is_l2 = false; u32 regval; s32 ret_val; if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP)) return -EINVAL; /* flags reserved for future extensions - must be zero */ if (config->flags) return -EINVAL; switch (config->tx_type) { case HWTSTAMP_TX_OFF: tsync_tx_ctl = 0; break; case HWTSTAMP_TX_ON: break; default: return -ERANGE; } switch (config->rx_filter) { case HWTSTAMP_FILTER_NONE: tsync_rx_ctl = 0; break; case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1; rxmtrl = E1000_RXMTRL_PTP_V1_SYNC_MESSAGE; is_l4 = true; break; case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1; rxmtrl = E1000_RXMTRL_PTP_V1_DELAY_REQ_MESSAGE; is_l4 = true; break; case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: /* Also time stamps V2 L2 Path Delay Request/Response */ tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2; rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE; is_l2 = true; break; case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: /* Also time stamps V2 L2 Path Delay Request/Response. */ tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2; rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE; is_l2 = true; break; case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: /* Hardware cannot filter just V2 L4 Sync messages; * fall-through to V2 (both L2 and L4) Sync. */ case HWTSTAMP_FILTER_PTP_V2_SYNC: /* Also time stamps V2 Path Delay Request/Response. */ tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2; rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE; is_l2 = true; is_l4 = true; break; case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: /* Hardware cannot filter just V2 L4 Delay Request messages; * fall-through to V2 (both L2 and L4) Delay Request. */ case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: /* Also time stamps V2 Path Delay Request/Response. */ tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2; rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE; is_l2 = true; is_l4 = true; break; case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: /* Hardware cannot filter just V2 L4 or L2 Event messages; * fall-through to all V2 (both L2 and L4) Events. */ case HWTSTAMP_FILTER_PTP_V2_EVENT: tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2; config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT; is_l2 = true; is_l4 = true; break; case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: /* For V1, the hardware can only filter Sync messages or * Delay Request messages but not both so fall-through to * time stamp all packets. */ case HWTSTAMP_FILTER_ALL: is_l2 = true; is_l4 = true; tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL; config->rx_filter = HWTSTAMP_FILTER_ALL; break; default: return -ERANGE; } adapter->hwtstamp_config = *config; /* enable/disable Tx h/w time stamping */ regval = er32(TSYNCTXCTL); regval &= ~E1000_TSYNCTXCTL_ENABLED; regval |= tsync_tx_ctl; ew32(TSYNCTXCTL, regval); if ((er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) != (regval & E1000_TSYNCTXCTL_ENABLED)) { e_err("Timesync Tx Control register not set as expected\n"); return -EAGAIN; } /* enable/disable Rx h/w time stamping */ regval = er32(TSYNCRXCTL); regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK); regval |= tsync_rx_ctl; ew32(TSYNCRXCTL, regval); if ((er32(TSYNCRXCTL) & (E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK)) != (regval & (E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK))) { e_err("Timesync Rx Control register not set as expected\n"); return -EAGAIN; } /* L2: define ethertype filter for time stamped packets */ if (is_l2) rxmtrl |= ETH_P_1588; /* define which PTP packets get time stamped */ ew32(RXMTRL, rxmtrl); /* Filter by destination port */ if (is_l4) { rxudp = PTP_EV_PORT; cpu_to_be16s(&rxudp); } ew32(RXUDP, rxudp); e1e_flush(); /* Clear TSYNCRXCTL_VALID & TSYNCTXCTL_VALID bit */ er32(RXSTMPH); er32(TXSTMPH); /* Get and set the System Time Register SYSTIM base frequency */ ret_val = e1000e_get_base_timinca(adapter, &regval); if (ret_val) return ret_val; ew32(TIMINCA, regval); /* reset the ns time counter */ timecounter_init(&adapter->tc, &adapter->cc, ktime_to_ns(ktime_get_real())); return 0; } /** * e1000_configure - configure the hardware for Rx and Tx * @adapter: private board structure **/ static void e1000_configure(struct e1000_adapter *adapter) { struct e1000_ring *rx_ring = adapter->rx_ring; e1000e_set_rx_mode(adapter->netdev); e1000_restore_vlan(adapter); e1000_init_manageability_pt(adapter); e1000_configure_tx(adapter); if (adapter->netdev->features & NETIF_F_RXHASH) e1000e_setup_rss_hash(adapter); e1000_setup_rctl(adapter); e1000_configure_rx(adapter); adapter->alloc_rx_buf(rx_ring, e1000_desc_unused(rx_ring), GFP_KERNEL); } /** * e1000e_power_up_phy - restore link in case the phy was powered down * @adapter: address of board private structure * * The phy may be powered down to save power and turn off link when the * driver is unloaded and wake on lan is not enabled (among others) * *** this routine MUST be followed by a call to e1000e_reset *** **/ void e1000e_power_up_phy(struct e1000_adapter *adapter) { if (adapter->hw.phy.ops.power_up) adapter->hw.phy.ops.power_up(&adapter->hw); adapter->hw.mac.ops.setup_link(&adapter->hw); } /** * e1000_power_down_phy - Power down the PHY * * Power down the PHY so no link is implied when interface is down. * The PHY cannot be powered down if management or WoL is active. */ static void e1000_power_down_phy(struct e1000_adapter *adapter) { /* WoL is enabled */ if (adapter->wol) return; if (adapter->hw.phy.ops.power_down) adapter->hw.phy.ops.power_down(&adapter->hw); } /** * e1000e_reset - bring the hardware into a known good state * * This function boots the hardware and enables some settings that * require a configuration cycle of the hardware - those cannot be * set/changed during runtime. After reset the device needs to be * properly configured for Rx, Tx etc. */ void e1000e_reset(struct e1000_adapter *adapter) { struct e1000_mac_info *mac = &adapter->hw.mac; struct e1000_fc_info *fc = &adapter->hw.fc; struct e1000_hw *hw = &adapter->hw; u32 tx_space, min_tx_space, min_rx_space; u32 pba = adapter->pba; u16 hwm; /* reset Packet Buffer Allocation to default */ ew32(PBA, pba); if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) { /* To maintain wire speed transmits, the Tx FIFO should be * large enough to accommodate two full transmit packets, * rounded up to the next 1KB and expressed in KB. Likewise, * the Rx FIFO should be large enough to accommodate at least * one full receive packet and is similarly rounded up and * expressed in KB. */ pba = er32(PBA); /* upper 16 bits has Tx packet buffer allocation size in KB */ tx_space = pba >> 16; /* lower 16 bits has Rx packet buffer allocation size in KB */ pba &= 0xffff; /* the Tx fifo also stores 16 bytes of information about the Tx * but don't include ethernet FCS because hardware appends it */ min_tx_space = (adapter->max_frame_size + sizeof(struct e1000_tx_desc) - ETH_FCS_LEN) * 2; min_tx_space = ALIGN(min_tx_space, 1024); min_tx_space >>= 10; /* software strips receive CRC, so leave room for it */ min_rx_space = adapter->max_frame_size; min_rx_space = ALIGN(min_rx_space, 1024); min_rx_space >>= 10; /* If current Tx allocation is less than the min Tx FIFO size, * and the min Tx FIFO size is less than the current Rx FIFO * allocation, take space away from current Rx allocation */ if ((tx_space < min_tx_space) && ((min_tx_space - tx_space) < pba)) { pba -= min_tx_space - tx_space; /* if short on Rx space, Rx wins and must trump Tx * adjustment */ if (pba < min_rx_space) pba = min_rx_space; } ew32(PBA, pba); } /* flow control settings * * The high water mark must be low enough to fit one full frame * (or the size used for early receive) above it in the Rx FIFO. * Set it to the lower of: * - 90% of the Rx FIFO size, and * - the full Rx FIFO size minus one full frame */ if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME) fc->pause_time = 0xFFFF; else fc->pause_time = E1000_FC_PAUSE_TIME; fc->send_xon = true; fc->current_mode = fc->requested_mode; switch (hw->mac.type) { case e1000_ich9lan: case e1000_ich10lan: if (adapter->netdev->mtu > ETH_DATA_LEN) { pba = 14; ew32(PBA, pba); fc->high_water = 0x2800; fc->low_water = fc->high_water - 8; break; } /* fall-through */ default: hwm = min(((pba << 10) * 9 / 10), ((pba << 10) - adapter->max_frame_size)); fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */ fc->low_water = fc->high_water - 8; break; case e1000_pchlan: /* Workaround PCH LOM adapter hangs with certain network * loads. If hangs persist, try disabling Tx flow control. */ if (adapter->netdev->mtu > ETH_DATA_LEN) { fc->high_water = 0x3500; fc->low_water = 0x1500; } else { fc->high_water = 0x5000; fc->low_water = 0x3000; } fc->refresh_time = 0x1000; break; case e1000_pch2lan: case e1000_pch_lpt: fc->refresh_time = 0x0400; if (adapter->netdev->mtu <= ETH_DATA_LEN) { fc->high_water = 0x05C20; fc->low_water = 0x05048; fc->pause_time = 0x0650; break; } pba = 14; ew32(PBA, pba); fc->high_water = ((pba << 10) * 9 / 10) & E1000_FCRTH_RTH; fc->low_water = ((pba << 10) * 8 / 10) & E1000_FCRTL_RTL; break; } /* Alignment of Tx data is on an arbitrary byte boundary with the * maximum size per Tx descriptor limited only to the transmit * allocation of the packet buffer minus 96 bytes with an upper * limit of 24KB due to receive synchronization limitations. */ adapter->tx_fifo_limit = min_t(u32, ((er32(PBA) >> 16) << 10) - 96, 24 << 10); /* Disable Adaptive Interrupt Moderation if 2 full packets cannot * fit in receive buffer. */ if (adapter->itr_setting & 0x3) { if ((adapter->max_frame_size * 2) > (pba << 10)) { if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) { dev_info(&adapter->pdev->dev, "Interrupt Throttle Rate off\n"); adapter->flags2 |= FLAG2_DISABLE_AIM; e1000e_write_itr(adapter, 0); } } else if (adapter->flags2 & FLAG2_DISABLE_AIM) { dev_info(&adapter->pdev->dev, "Interrupt Throttle Rate on\n"); adapter->flags2 &= ~FLAG2_DISABLE_AIM; adapter->itr = 20000; e1000e_write_itr(adapter, adapter->itr); } } /* Allow time for pending master requests to run */ mac->ops.reset_hw(hw); /* For parts with AMT enabled, let the firmware know * that the network interface is in control */ if (adapter->flags & FLAG_HAS_AMT) e1000e_get_hw_control(adapter); ew32(WUC, 0); if (mac->ops.init_hw(hw)) e_err("Hardware Error\n"); e1000_update_mng_vlan(adapter); /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */ ew32(VET, ETH_P_8021Q); e1000e_reset_adaptive(hw); /* initialize systim and reset the ns time counter */ e1000e_config_hwtstamp(adapter, &adapter->hwtstamp_config); /* Set EEE advertisement as appropriate */ if (adapter->flags2 & FLAG2_HAS_EEE) { s32 ret_val; u16 adv_addr; switch (hw->phy.type) { case e1000_phy_82579: adv_addr = I82579_EEE_ADVERTISEMENT; break; case e1000_phy_i217: adv_addr = I217_EEE_ADVERTISEMENT; break; default: dev_err(&adapter->pdev->dev, "Invalid PHY type setting EEE advertisement\n"); return; } ret_val = hw->phy.ops.acquire(hw); if (ret_val) { dev_err(&adapter->pdev->dev, "EEE advertisement - unable to acquire PHY\n"); return; } e1000_write_emi_reg_locked(hw, adv_addr, hw->dev_spec.ich8lan.eee_disable ? 0 : adapter->eee_advert); hw->phy.ops.release(hw); } if (!netif_running(adapter->netdev) && !test_bit(__E1000_TESTING, &adapter->state)) { e1000_power_down_phy(adapter); return; } e1000_get_phy_info(hw); if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) && !(adapter->flags & FLAG_SMART_POWER_DOWN)) { u16 phy_data = 0; /* speed up time to link by disabling smart power down, ignore * the return value of this function because there is nothing * different we would do if it failed */ e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data); phy_data &= ~IGP02E1000_PM_SPD; e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data); } } int e1000e_up(struct e1000_adapter *adapter) { struct e1000_hw *hw = &adapter->hw; /* hardware has been reset, we need to reload some things */ e1000_configure(adapter); clear_bit(__E1000_DOWN, &adapter->state); if (adapter->msix_entries) e1000_configure_msix(adapter); e1000_irq_enable(adapter); netif_start_queue(adapter->netdev); /* fire a link change interrupt to start the watchdog */ if (adapter->msix_entries) ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER); else ew32(ICS, E1000_ICS_LSC); return 0; } static void e1000e_flush_descriptors(struct e1000_adapter *adapter) { struct e1000_hw *hw = &adapter->hw; if (!(adapter->flags2 & FLAG2_DMA_BURST)) return; /* flush pending descriptor writebacks to memory */ ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD); /* execute the writes immediately */ e1e_flush(); /* due to rare timing issues, write to TIDV/RDTR again to ensure the * write is successful */ ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD); /* execute the writes immediately */ e1e_flush(); } static void e1000e_update_stats(struct e1000_adapter *adapter); void e1000e_down(struct e1000_adapter *adapter) { struct net_device *netdev = adapter->netdev; struct e1000_hw *hw = &adapter->hw; u32 tctl, rctl; /* signal that we're down so the interrupt handler does not * reschedule our watchdog timer */ set_bit(__E1000_DOWN, &adapter->state); /* disable receives in the hardware */ rctl = er32(RCTL); if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX)) ew32(RCTL, rctl & ~E1000_RCTL_EN); /* flush and sleep below */ netif_stop_queue(netdev); /* disable transmits in the hardware */ tctl = er32(TCTL); tctl &= ~E1000_TCTL_EN; ew32(TCTL, tctl); /* flush both disables and wait for them to finish */ e1e_flush(); usleep_range(10000, 20000); e1000_irq_disable(adapter); napi_synchronize(&adapter->napi); del_timer_sync(&adapter->watchdog_timer); del_timer_sync(&adapter->phy_info_timer); netif_carrier_off(netdev); spin_lock(&adapter->stats64_lock); e1000e_update_stats(adapter); spin_unlock(&adapter->stats64_lock); e1000e_flush_descriptors(adapter); e1000_clean_tx_ring(adapter->tx_ring); e1000_clean_rx_ring(adapter->rx_ring); adapter->link_speed = 0; adapter->link_duplex = 0; /* Disable Si errata workaround on PCHx for jumbo frame flow */ if ((hw->mac.type >= e1000_pch2lan) && (adapter->netdev->mtu > ETH_DATA_LEN) && e1000_lv_jumbo_workaround_ich8lan(hw, false)) e_dbg("failed to disable jumbo frame workaround mode\n"); if (!pci_channel_offline(adapter->pdev)) e1000e_reset(adapter); /* TODO: for power management, we could drop the link and * pci_disable_device here. */ } void e1000e_reinit_locked(struct e1000_adapter *adapter) { might_sleep(); while (test_and_set_bit(__E1000_RESETTING, &adapter->state)) usleep_range(1000, 2000); e1000e_down(adapter); e1000e_up(adapter); clear_bit(__E1000_RESETTING, &adapter->state); } /** * e1000e_cyclecounter_read - read raw cycle counter (used by time counter) * @cc: cyclecounter structure **/ static cycle_t e1000e_cyclecounter_read(const struct cyclecounter *cc) { struct e1000_adapter *adapter = container_of(cc, struct e1000_adapter, cc); struct e1000_hw *hw = &adapter->hw; cycle_t systim; /* latch SYSTIMH on read of SYSTIML */ systim = (cycle_t)er32(SYSTIML); systim |= (cycle_t)er32(SYSTIMH) << 32; return systim; } /** * e1000_sw_init - Initialize general software structures (struct e1000_adapter) * @adapter: board private structure to initialize * * e1000_sw_init initializes the Adapter private data structure. * Fields are initialized based on PCI device information and * OS network device settings (MTU size). **/ static int e1000_sw_init(struct e1000_adapter *adapter) { struct net_device *netdev = adapter->netdev; adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN; adapter->rx_ps_bsize0 = 128; adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN; adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN; adapter->tx_ring_count = E1000_DEFAULT_TXD; adapter->rx_ring_count = E1000_DEFAULT_RXD; spin_lock_init(&adapter->stats64_lock); e1000e_set_interrupt_capability(adapter); if (e1000_alloc_queues(adapter)) return -ENOMEM; /* Setup hardware time stamping cyclecounter */ if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) { adapter->cc.read = e1000e_cyclecounter_read; adapter->cc.mask = CLOCKSOURCE_MASK(64); adapter->cc.mult = 1; /* cc.shift set in e1000e_get_base_tininca() */ spin_lock_init(&adapter->systim_lock); INIT_WORK(&adapter->tx_hwtstamp_work, e1000e_tx_hwtstamp_work); } /* Explicitly disable IRQ since the NIC can be in any state. */ e1000_irq_disable(adapter); set_bit(__E1000_DOWN, &adapter->state); return 0; } /** * e1000_intr_msi_test - Interrupt Handler * @irq: interrupt number * @data: pointer to a network interface device structure **/ static irqreturn_t e1000_intr_msi_test(int __always_unused irq, void *data) { struct net_device *netdev = data; struct e1000_adapter *adapter = netdev_priv(netdev); struct e1000_hw *hw = &adapter->hw; u32 icr = er32(ICR); e_dbg("icr is %08X\n", icr); if (icr & E1000_ICR_RXSEQ) { adapter->flags &= ~FLAG_MSI_TEST_FAILED; /* Force memory writes to complete before acknowledging the * interrupt is handled. */ wmb(); } return IRQ_HANDLED; } /** * e1000_test_msi_interrupt - Returns 0 for successful test * @adapter: board private struct * * code flow taken from tg3.c **/ static int e1000_test_msi_interrupt(struct e1000_adapter *adapter) { struct net_device *netdev = adapter->netdev; struct e1000_hw *hw = &adapter->hw; int err; /* poll_enable hasn't been called yet, so don't need disable */ /* clear any pending events */ er32(ICR); /* free the real vector and request a test handler */ e1000_free_irq(adapter); e1000e_reset_interrupt_capability(adapter); /* Assume that the test fails, if it succeeds then the test * MSI irq handler will unset this flag */ adapter->flags |= FLAG_MSI_TEST_FAILED; err = pci_enable_msi(adapter->pdev); if (err) goto msi_test_failed; err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0, netdev->name, netdev); if (err) { pci_disable_msi(adapter->pdev); goto msi_test_failed; } /* Force memory writes to complete before enabling and firing an * interrupt. */ wmb(); e1000_irq_enable(adapter); /* fire an unusual interrupt on the test handler */ ew32(ICS, E1000_ICS_RXSEQ); e1e_flush(); msleep(100); e1000_irq_disable(adapter); rmb(); /* read flags after interrupt has been fired */ if (adapter->flags & FLAG_MSI_TEST_FAILED) { adapter->int_mode = E1000E_INT_MODE_LEGACY; e_info("MSI interrupt test failed, using legacy interrupt.\n"); } else { e_dbg("MSI interrupt test succeeded!\n"); } free_irq(adapter->pdev->irq, netdev); pci_disable_msi(adapter->pdev); msi_test_failed: e1000e_set_interrupt_capability(adapter); return e1000_request_irq(adapter); } /** * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored * @adapter: board private struct * * code flow taken from tg3.c, called with e1000 interrupts disabled. **/ static int e1000_test_msi(struct e1000_adapter *adapter) { int err; u16 pci_cmd; if (!(adapter->flags & FLAG_MSI_ENABLED)) return 0; /* disable SERR in case the MSI write causes a master abort */ pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd); if (pci_cmd & PCI_COMMAND_SERR) pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd & ~PCI_COMMAND_SERR); err = e1000_test_msi_interrupt(adapter); /* re-enable SERR */ if (pci_cmd & PCI_COMMAND_SERR) { pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd); pci_cmd |= PCI_COMMAND_SERR; pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd); } return err; } /** * e1000_open - Called when a network interface is made active * @netdev: network interface device structure * * Returns 0 on success, negative value on failure * * The open entry point is called when a network interface is made * active by the system (IFF_UP). At this point all resources needed * for transmit and receive operations are allocated, the interrupt * handler is registered with the OS, the watchdog timer is started, * and the stack is notified that the interface is ready. **/ static int e1000_open(struct net_device *netdev) { struct e1000_adapter *adapter = netdev_priv(netdev); struct e1000_hw *hw = &adapter->hw; struct pci_dev *pdev = adapter->pdev; int err; /* disallow open during test */ if (test_bit(__E1000_TESTING, &adapter->state)) return -EBUSY; pm_runtime_get_sync(&pdev->dev); netif_carrier_off(netdev); /* allocate transmit descriptors */ err = e1000e_setup_tx_resources(adapter->tx_ring); if (err) goto err_setup_tx; /* allocate receive descriptors */ err = e1000e_setup_rx_resources(adapter->rx_ring); if (err) goto err_setup_rx; /* If AMT is enabled, let the firmware know that the network * interface is now open and reset the part to a known state. */ if (adapter->flags & FLAG_HAS_AMT) { e1000e_get_hw_control(adapter); e1000e_reset(adapter); } e1000e_power_up_phy(adapter); adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; if ((adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN)) e1000_update_mng_vlan(adapter); /* DMA latency requirement to workaround jumbo issue */ pm_qos_add_request(&adapter->netdev->pm_qos_req, PM_QOS_CPU_DMA_LATENCY, PM_QOS_DEFAULT_VALUE); /* before we allocate an interrupt, we must be ready to handle it. * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt * as soon as we call pci_request_irq, so we have to setup our * clean_rx handler before we do so. */ e1000_configure(adapter); err = e1000_request_irq(adapter); if (err) goto err_req_irq; /* Work around PCIe errata with MSI interrupts causing some chipsets to * ignore e1000e MSI messages, which means we need to test our MSI * interrupt now */ if (adapter->int_mode != E1000E_INT_MODE_LEGACY) { err = e1000_test_msi(adapter); if (err) { e_err("Interrupt allocation failed\n"); goto err_req_irq; } } /* From here on the code is the same as e1000e_up() */ clear_bit(__E1000_DOWN, &adapter->state); napi_enable(&adapter->napi); e1000_irq_enable(adapter); adapter->tx_hang_recheck = false; netif_start_queue(netdev); adapter->idle_check = true; hw->mac.get_link_status = true; pm_runtime_put(&pdev->dev); /* fire a link status change interrupt to start the watchdog */ if (adapter->msix_entries) ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER); else ew32(ICS, E1000_ICS_LSC); return 0; err_req_irq: e1000e_release_hw_control(adapter); e1000_power_down_phy(adapter); e1000e_free_rx_resources(adapter->rx_ring); err_setup_rx: e1000e_free_tx_resources(adapter->tx_ring); err_setup_tx: e1000e_reset(adapter); pm_runtime_put_sync(&pdev->dev); return err; } /** * e1000_close - Disables a network interface * @netdev: network interface device structure * * Returns 0, this is not allowed to fail * * The close entry point is called when an interface is de-activated * by the OS. The hardware is still under the drivers control, but * needs to be disabled. A global MAC reset is issued to stop the * hardware, and all transmit and receive resources are freed. **/ static int e1000_close(struct net_device *netdev) { struct e1000_adapter *adapter = netdev_priv(netdev); struct pci_dev *pdev = adapter->pdev; int count = E1000_CHECK_RESET_COUNT; while (test_bit(__E1000_RESETTING, &adapter->state) && count--) usleep_range(10000, 20000); WARN_ON(test_bit(__E1000_RESETTING, &adapter->state)); pm_runtime_get_sync(&pdev->dev); if (!test_bit(__E1000_DOWN, &adapter->state)) { e1000e_down(adapter); e1000_free_irq(adapter); } napi_disable(&adapter->napi); e1000_power_down_phy(adapter); e1000e_free_tx_resources(adapter->tx_ring); e1000e_free_rx_resources(adapter->rx_ring); /* kill manageability vlan ID if supported, but not if a vlan with * the same ID is registered on the host OS (let 8021q kill it) */ if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q), adapter->mng_vlan_id); /* If AMT is enabled, let the firmware know that the network * interface is now closed */ if ((adapter->flags & FLAG_HAS_AMT) && !test_bit(__E1000_TESTING, &adapter->state)) e1000e_release_hw_control(adapter); pm_qos_remove_request(&adapter->netdev->pm_qos_req); pm_runtime_put_sync(&pdev->dev); return 0; } /** * e1000_set_mac - Change the Ethernet Address of the NIC * @netdev: network interface device structure * @p: pointer to an address structure * * Returns 0 on success, negative on failure **/ static int e1000_set_mac(struct net_device *netdev, void *p) { struct e1000_adapter *adapter = netdev_priv(netdev); struct e1000_hw *hw = &adapter->hw; struct sockaddr *addr = p; if (!is_valid_ether_addr(addr->sa_data)) return -EADDRNOTAVAIL; memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len); hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0); if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) { /* activate the work around */ e1000e_set_laa_state_82571(&adapter->hw, 1); /* Hold a copy of the LAA in RAR[14] This is done so that * between the time RAR[0] gets clobbered and the time it * gets fixed (in e1000_watchdog), the actual LAA is in one * of the RARs and no incoming packets directed to this port * are dropped. Eventually the LAA will be in RAR[0] and * RAR[14] */ hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, adapter->hw.mac.rar_entry_count - 1); } return 0; } /** * e1000e_update_phy_task - work thread to update phy * @work: pointer to our work struct * * this worker thread exists because we must acquire a * semaphore to read the phy, which we could msleep while * waiting for it, and we can't msleep in a timer. **/ static void e1000e_update_phy_task(struct work_struct *work) { struct e1000_adapter *adapter = container_of(work, struct e1000_adapter, update_phy_task); if (test_bit(__E1000_DOWN, &adapter->state)) return; e1000_get_phy_info(&adapter->hw); } /** * e1000_update_phy_info - timre call-back to update PHY info * @data: pointer to adapter cast into an unsigned long * * Need to wait a few seconds after link up to get diagnostic information from * the phy **/ static void e1000_update_phy_info(unsigned long data) { struct e1000_adapter *adapter = (struct e1000_adapter *)data; if (test_bit(__E1000_DOWN, &adapter->state)) return; schedule_work(&adapter->update_phy_task); } /** * e1000e_update_phy_stats - Update the PHY statistics counters * @adapter: board private structure * * Read/clear the upper 16-bit PHY registers and read/accumulate lower **/ static void e1000e_update_phy_stats(struct e1000_adapter *adapter) { struct e1000_hw *hw = &adapter->hw; s32 ret_val; u16 phy_data; ret_val = hw->phy.ops.acquire(hw); if (ret_val) return; /* A page set is expensive so check if already on desired page. * If not, set to the page with the PHY status registers. */ hw->phy.addr = 1; ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, &phy_data); if (ret_val) goto release; if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) { ret_val = hw->phy.ops.set_page(hw, HV_STATS_PAGE << IGP_PAGE_SHIFT); if (ret_val) goto release; } /* Single Collision Count */ hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data); ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data); if (!ret_val) adapter->stats.scc += phy_data; /* Excessive Collision Count */ hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data); ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data); if (!ret_val) adapter->stats.ecol += phy_data; /* Multiple Collision Count */ hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data); ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data); if (!ret_val) adapter->stats.mcc += phy_data; /* Late Collision Count */ hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data); ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data); if (!ret_val) adapter->stats.latecol += phy_data; /* Collision Count - also used for adaptive IFS */ hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data); ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data); if (!ret_val) hw->mac.collision_delta = phy_data; /* Defer Count */ hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data); ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data); if (!ret_val) adapter->stats.dc += phy_data; /* Transmit with no CRS */ hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data); ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data); if (!ret_val) adapter->stats.tncrs += phy_data; release: hw->phy.ops.release(hw); } /** * e1000e_update_stats - Update the board statistics counters * @adapter: board private structure **/ static void e1000e_update_stats(struct e1000_adapter *adapter) { struct net_device *netdev = adapter->netdev; struct e1000_hw *hw = &adapter->hw; struct pci_dev *pdev = adapter->pdev; /* Prevent stats update while adapter is being reset, or if the pci * connection is down. */ if (adapter->link_speed == 0) return; if (pci_channel_offline(pdev)) return; adapter->stats.crcerrs += er32(CRCERRS); adapter->stats.gprc += er32(GPRC); adapter->stats.gorc += er32(GORCL); er32(GORCH); /* Clear gorc */ adapter->stats.bprc += er32(BPRC); adapter->stats.mprc += er32(MPRC); adapter->stats.roc += er32(ROC); adapter->stats.mpc += er32(MPC); /* Half-duplex statistics */ if (adapter->link_duplex == HALF_DUPLEX) { if (adapter->flags2 & FLAG2_HAS_PHY_STATS) { e1000e_update_phy_stats(adapter); } else { adapter->stats.scc += er32(SCC); adapter->stats.ecol += er32(ECOL); adapter->stats.mcc += er32(MCC); adapter->stats.latecol += er32(LATECOL); adapter->stats.dc += er32(DC); hw->mac.collision_delta = er32(COLC); if ((hw->mac.type != e1000_82574) && (hw->mac.type != e1000_82583)) adapter->stats.tncrs += er32(TNCRS); } adapter->stats.colc += hw->mac.collision_delta; } adapter->stats.xonrxc += er32(XONRXC); adapter->stats.xontxc += er32(XONTXC); adapter->stats.xoffrxc += er32(XOFFRXC); adapter->stats.xofftxc += er32(XOFFTXC); adapter->stats.gptc += er32(GPTC); adapter->stats.gotc += er32(GOTCL); er32(GOTCH); /* Clear gotc */ adapter->stats.rnbc += er32(RNBC); adapter->stats.ruc += er32(RUC); adapter->stats.mptc += er32(MPTC); adapter->stats.bptc += er32(BPTC); /* used for adaptive IFS */ hw->mac.tx_packet_delta = er32(TPT); adapter->stats.tpt += hw->mac.tx_packet_delta; adapter->stats.algnerrc += er32(ALGNERRC); adapter->stats.rxerrc += er32(RXERRC); adapter->stats.cexterr += er32(CEXTERR); adapter->stats.tsctc += er32(TSCTC); adapter->stats.tsctfc += er32(TSCTFC); /* Fill out the OS statistics structure */ netdev->stats.multicast = adapter->stats.mprc; netdev->stats.collisions = adapter->stats.colc; /* Rx Errors */ /* RLEC on some newer hardware can be incorrect so build * our own version based on RUC and ROC */ netdev->stats.rx_errors = adapter->stats.rxerrc + adapter->stats.crcerrs + adapter->stats.algnerrc + adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr; netdev->stats.rx_length_errors = adapter->stats.ruc + adapter->stats.roc; netdev->stats.rx_crc_errors = adapter->stats.crcerrs; netdev->stats.rx_frame_errors = adapter->stats.algnerrc; netdev->stats.rx_missed_errors = adapter->stats.mpc; /* Tx Errors */ netdev->stats.tx_errors = adapter->stats.ecol + adapter->stats.latecol; netdev->stats.tx_aborted_errors = adapter->stats.ecol; netdev->stats.tx_window_errors = adapter->stats.latecol; netdev->stats.tx_carrier_errors = adapter->stats.tncrs; /* Tx Dropped needs to be maintained elsewhere */ /* Management Stats */ adapter->stats.mgptc += er32(MGTPTC); adapter->stats.mgprc += er32(MGTPRC); adapter->stats.mgpdc += er32(MGTPDC); /* Correctable ECC Errors */ if (hw->mac.type == e1000_pch_lpt) { u32 pbeccsts = er32(PBECCSTS); adapter->corr_errors += pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK; adapter->uncorr_errors += (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >> E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT; } } /** * e1000_phy_read_status - Update the PHY register status snapshot * @adapter: board private structure **/ static void e1000_phy_read_status(struct e1000_adapter *adapter) { struct e1000_hw *hw = &adapter->hw; struct e1000_phy_regs *phy = &adapter->phy_regs; if (!pm_runtime_suspended((&adapter->pdev->dev)->parent) && (er32(STATUS) & E1000_STATUS_LU) && (adapter->hw.phy.media_type == e1000_media_type_copper)) { int ret_val; ret_val = e1e_rphy(hw, MII_BMCR, &phy->bmcr); ret_val |= e1e_rphy(hw, MII_BMSR, &phy->bmsr); ret_val |= e1e_rphy(hw, MII_ADVERTISE, &phy->advertise); ret_val |= e1e_rphy(hw, MII_LPA, &phy->lpa); ret_val |= e1e_rphy(hw, MII_EXPANSION, &phy->expansion); ret_val |= e1e_rphy(hw, MII_CTRL1000, &phy->ctrl1000); ret_val |= e1e_rphy(hw, MII_STAT1000, &phy->stat1000); ret_val |= e1e_rphy(hw, MII_ESTATUS, &phy->estatus); if (ret_val) e_warn("Error reading PHY register\n"); } else { /* Do not read PHY registers if link is not up * Set values to typical power-on defaults */ phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX); phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL | BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE | BMSR_ERCAP); phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP | ADVERTISE_ALL | ADVERTISE_CSMA); phy->lpa = 0; phy->expansion = EXPANSION_ENABLENPAGE; phy->ctrl1000 = ADVERTISE_1000FULL; phy->stat1000 = 0; phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF); } } static void e1000_print_link_info(struct e1000_adapter *adapter) { struct e1000_hw *hw = &adapter->hw; u32 ctrl = er32(CTRL); /* Link status message must follow this format for user tools */ pr_info("%s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n", adapter->netdev->name, adapter->link_speed, adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half", (ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" : (ctrl & E1000_CTRL_RFCE) ? "Rx" : (ctrl & E1000_CTRL_TFCE) ? "Tx" : "None"); } static bool e1000e_has_link(struct e1000_adapter *adapter) { struct e1000_hw *hw = &adapter->hw; bool link_active = false; s32 ret_val = 0; /* get_link_status is set on LSC (link status) interrupt or * Rx sequence error interrupt. get_link_status will stay * false until the check_for_link establishes link * for copper adapters ONLY */ switch (hw->phy.media_type) { case e1000_media_type_copper: if (hw->mac.get_link_status) { ret_val = hw->mac.ops.check_for_link(hw); link_active = !hw->mac.get_link_status; } else { link_active = true; } break; case e1000_media_type_fiber: ret_val = hw->mac.ops.check_for_link(hw); link_active = !!(er32(STATUS) & E1000_STATUS_LU); break; case e1000_media_type_internal_serdes: ret_val = hw->mac.ops.check_for_link(hw); link_active = adapter->hw.mac.serdes_has_link; break; default: case e1000_media_type_unknown: break; } if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) && (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) { /* See e1000_kmrn_lock_loss_workaround_ich8lan() */ e_info("Gigabit has been disabled, downgrading speed\n"); } return link_active; } static void e1000e_enable_receives(struct e1000_adapter *adapter) { /* make sure the receive unit is started */ if ((adapter->flags & FLAG_RX_NEEDS_RESTART) && (adapter->flags & FLAG_RESTART_NOW)) { struct e1000_hw *hw = &adapter->hw; u32 rctl = er32(RCTL); ew32(RCTL, rctl | E1000_RCTL_EN); adapter->flags &= ~FLAG_RESTART_NOW; } } static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter) { struct e1000_hw *hw = &adapter->hw; /* With 82574 controllers, PHY needs to be checked periodically * for hung state and reset, if two calls return true */ if (e1000_check_phy_82574(hw)) adapter->phy_hang_count++; else adapter->phy_hang_count = 0; if (adapter->phy_hang_count > 1) { adapter->phy_hang_count = 0; schedule_work(&adapter->reset_task); } } /** * e1000_watchdog - Timer Call-back * @data: pointer to adapter cast into an unsigned long **/ static void e1000_watchdog(unsigned long data) { struct e1000_adapter *adapter = (struct e1000_adapter *)data; /* Do the rest outside of interrupt context */ schedule_work(&adapter->watchdog_task); /* TODO: make this use queue_delayed_work() */ } static void e1000_watchdog_task(struct work_struct *work) { struct e1000_adapter *adapter = container_of(work, struct e1000_adapter, watchdog_task); struct net_device *netdev = adapter->netdev; struct e1000_mac_info *mac = &adapter->hw.mac; struct e1000_phy_info *phy = &adapter->hw.phy; struct e1000_ring *tx_ring = adapter->tx_ring; struct e1000_hw *hw = &adapter->hw; u32 link, tctl; if (test_bit(__E1000_DOWN, &adapter->state)) return; link = e1000e_has_link(adapter); if ((netif_carrier_ok(netdev)) && link) { /* Cancel scheduled suspend requests. */ pm_runtime_resume(netdev->dev.parent); e1000e_enable_receives(adapter); goto link_up; } if ((e1000e_enable_tx_pkt_filtering(hw)) && (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)) e1000_update_mng_vlan(adapter); if (link) { if (!netif_carrier_ok(netdev)) { bool txb2b = true; /* Cancel scheduled suspend requests. */ pm_runtime_resume(netdev->dev.parent); /* update snapshot of PHY registers on LSC */ e1000_phy_read_status(adapter); mac->ops.get_link_up_info(&adapter->hw, &adapter->link_speed, &adapter->link_duplex); e1000_print_link_info(adapter); /* check if SmartSpeed worked */ e1000e_check_downshift(hw); if (phy->speed_downgraded) netdev_warn(netdev, "Link Speed was downgraded by SmartSpeed\n"); /* On supported PHYs, check for duplex mismatch only * if link has autonegotiated at 10/100 half */ if ((hw->phy.type == e1000_phy_igp_3 || hw->phy.type == e1000_phy_bm) && hw->mac.autoneg && (adapter->link_speed == SPEED_10 || adapter->link_speed == SPEED_100) && (adapter->link_duplex == HALF_DUPLEX)) { u16 autoneg_exp; e1e_rphy(hw, MII_EXPANSION, &autoneg_exp); if (!(autoneg_exp & EXPANSION_NWAY)) e_info("Autonegotiated half duplex but link partner cannot autoneg. Try forcing full duplex if link gets many collisions.\n"); } /* adjust timeout factor according to speed/duplex */ adapter->tx_timeout_factor = 1; switch (adapter->link_speed) { case SPEED_10: txb2b = false; adapter->tx_timeout_factor = 16; break; case SPEED_100: txb2b = false; adapter->tx_timeout_factor = 10; break; } /* workaround: re-program speed mode bit after * link-up event */ if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) && !txb2b) { u32 tarc0; tarc0 = er32(TARC(0)); tarc0 &= ~SPEED_MODE_BIT; ew32(TARC(0), tarc0); } /* disable TSO for pcie and 10/100 speeds, to avoid * some hardware issues */ if (!(adapter->flags & FLAG_TSO_FORCE)) { switch (adapter->link_speed) { case SPEED_10: case SPEED_100: e_info("10/100 speed: disabling TSO\n"); netdev->features &= ~NETIF_F_TSO; netdev->features &= ~NETIF_F_TSO6; break; case SPEED_1000: netdev->features |= NETIF_F_TSO; netdev->features |= NETIF_F_TSO6; break; default: /* oops */ break; } } /* enable transmits in the hardware, need to do this * after setting TARC(0) */ tctl = er32(TCTL); tctl |= E1000_TCTL_EN; ew32(TCTL, tctl); /* Perform any post-link-up configuration before * reporting link up. */ if (phy->ops.cfg_on_link_up) phy->ops.cfg_on_link_up(hw); netif_carrier_on(netdev); if (!test_bit(__E1000_DOWN, &adapter->state)) mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ)); } } else { if (netif_carrier_ok(netdev)) { adapter->link_speed = 0; adapter->link_duplex = 0; /* Link status message must follow this format */ pr_info("%s NIC Link is Down\n", adapter->netdev->name); netif_carrier_off(netdev); if (!test_bit(__E1000_DOWN, &adapter->state)) mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ)); /* The link is lost so the controller stops DMA. * If there is queued Tx work that cannot be done * or if on an 8000ES2LAN which requires a Rx packet * buffer work-around on link down event, reset the * controller to flush the Tx/Rx packet buffers. * (Do the reset outside of interrupt context). */ if ((adapter->flags & FLAG_RX_NEEDS_RESTART) || (e1000_desc_unused(tx_ring) + 1 < tx_ring->count)) adapter->flags |= FLAG_RESTART_NOW; else pm_schedule_suspend(netdev->dev.parent, LINK_TIMEOUT); } } link_up: spin_lock(&adapter->stats64_lock); e1000e_update_stats(adapter); mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old; adapter->tpt_old = adapter->stats.tpt; mac->collision_delta = adapter->stats.colc - adapter->colc_old; adapter->colc_old = adapter->stats.colc; adapter->gorc = adapter->stats.gorc - adapter->gorc_old; adapter->gorc_old = adapter->stats.gorc; adapter->gotc = adapter->stats.gotc - adapter->gotc_old; adapter->gotc_old = adapter->stats.gotc; spin_unlock(&adapter->stats64_lock); if (adapter->flags & FLAG_RESTART_NOW) { schedule_work(&adapter->reset_task); /* return immediately since reset is imminent */ return; } e1000e_update_adaptive(&adapter->hw); /* Simple mode for Interrupt Throttle Rate (ITR) */ if (adapter->itr_setting == 4) { /* Symmetric Tx/Rx gets a reduced ITR=2000; * Total asymmetrical Tx or Rx gets ITR=8000; * everyone else is between 2000-8000. */ u32 goc = (adapter->gotc + adapter->gorc) / 10000; u32 dif = (adapter->gotc > adapter->gorc ? adapter->gotc - adapter->gorc : adapter->gorc - adapter->gotc) / 10000; u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000; e1000e_write_itr(adapter, itr); } /* Cause software interrupt to ensure Rx ring is cleaned */ if (adapter->msix_entries) ew32(ICS, adapter->rx_ring->ims_val); else ew32(ICS, E1000_ICS_RXDMT0); /* flush pending descriptors to memory before detecting Tx hang */ e1000e_flush_descriptors(adapter); /* Force detection of hung controller every watchdog period */ adapter->detect_tx_hung = true; /* With 82571 controllers, LAA may be overwritten due to controller * reset from the other port. Set the appropriate LAA in RAR[0] */ if (e1000e_get_laa_state_82571(hw)) hw->mac.ops.rar_set(hw, adapter->hw.mac.addr, 0); if (adapter->flags2 & FLAG2_CHECK_PHY_HANG) e1000e_check_82574_phy_workaround(adapter); /* Clear valid timestamp stuck in RXSTMPL/H due to a Rx error */ if (adapter->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE) { if ((adapter->flags2 & FLAG2_CHECK_RX_HWTSTAMP) && (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID)) { er32(RXSTMPH); adapter->rx_hwtstamp_cleared++; } else { adapter->flags2 |= FLAG2_CHECK_RX_HWTSTAMP; } } /* Reset the timer */ if (!test_bit(__E1000_DOWN, &adapter->state)) mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ)); } #define E1000_TX_FLAGS_CSUM 0x00000001 #define E1000_TX_FLAGS_VLAN 0x00000002 #define E1000_TX_FLAGS_TSO 0x00000004 #define E1000_TX_FLAGS_IPV4 0x00000008 #define E1000_TX_FLAGS_NO_FCS 0x00000010 #define E1000_TX_FLAGS_HWTSTAMP 0x00000020 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000 #define E1000_TX_FLAGS_VLAN_SHIFT 16 static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb) { struct e1000_context_desc *context_desc; struct e1000_buffer *buffer_info; unsigned int i; u32 cmd_length = 0; u16 ipcse = 0, mss; u8 ipcss, ipcso, tucss, tucso, hdr_len; if (!skb_is_gso(skb)) return 0; if (skb_header_cloned(skb)) { int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); if (err) return err; } hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); mss = skb_shinfo(skb)->gso_size; if (skb->protocol == htons(ETH_P_IP)) { struct iphdr *iph = ip_hdr(skb); iph->tot_len = 0; iph->check = 0; tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, 0, IPPROTO_TCP, 0); cmd_length = E1000_TXD_CMD_IP; ipcse = skb_transport_offset(skb) - 1; } else if (skb_is_gso_v6(skb)) { ipv6_hdr(skb)->payload_len = 0; tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, &ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0); ipcse = 0; } ipcss = skb_network_offset(skb); ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data; tucss = skb_transport_offset(skb); tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data; cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE | E1000_TXD_CMD_TCP | (skb->len - (hdr_len))); i = tx_ring->next_to_use; context_desc = E1000_CONTEXT_DESC(*tx_ring, i); buffer_info = &tx_ring->buffer_info[i]; context_desc->lower_setup.ip_fields.ipcss = ipcss; context_desc->lower_setup.ip_fields.ipcso = ipcso; context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse); context_desc->upper_setup.tcp_fields.tucss = tucss; context_desc->upper_setup.tcp_fields.tucso = tucso; context_desc->upper_setup.tcp_fields.tucse = 0; context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss); context_desc->tcp_seg_setup.fields.hdr_len = hdr_len; context_desc->cmd_and_length = cpu_to_le32(cmd_length); buffer_info->time_stamp = jiffies; buffer_info->next_to_watch = i; i++; if (i == tx_ring->count) i = 0; tx_ring->next_to_use = i; return 1; } static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb) { struct e1000_adapter *adapter = tx_ring->adapter; struct e1000_context_desc *context_desc; struct e1000_buffer *buffer_info; unsigned int i; u8 css; u32 cmd_len = E1000_TXD_CMD_DEXT; __be16 protocol; if (skb->ip_summed != CHECKSUM_PARTIAL) return 0; if (skb->protocol == cpu_to_be16(ETH_P_8021Q)) protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto; else protocol = skb->protocol; switch (protocol) { case cpu_to_be16(ETH_P_IP): if (ip_hdr(skb)->protocol == IPPROTO_TCP) cmd_len |= E1000_TXD_CMD_TCP; break; case cpu_to_be16(ETH_P_IPV6): /* XXX not handling all IPV6 headers */ if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP) cmd_len |= E1000_TXD_CMD_TCP; break; default: if (unlikely(net_ratelimit())) e_warn("checksum_partial proto=%x!\n", be16_to_cpu(protocol)); break; } css = skb_checksum_start_offset(skb); i = tx_ring->next_to_use; buffer_info = &tx_ring->buffer_info[i]; context_desc = E1000_CONTEXT_DESC(*tx_ring, i); context_desc->lower_setup.ip_config = 0; context_desc->upper_setup.tcp_fields.tucss = css; context_desc->upper_setup.tcp_fields.tucso = css + skb->csum_offset; context_desc->upper_setup.tcp_fields.tucse = 0; context_desc->tcp_seg_setup.data = 0; context_desc->cmd_and_length = cpu_to_le32(cmd_len); buffer_info->time_stamp = jiffies; buffer_info->next_to_watch = i; i++; if (i == tx_ring->count) i = 0; tx_ring->next_to_use = i; return 1; } static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb, unsigned int first, unsigned int max_per_txd, unsigned int nr_frags) { struct e1000_adapter *adapter = tx_ring->adapter; struct pci_dev *pdev = adapter->pdev; struct e1000_buffer *buffer_info; unsigned int len = skb_headlen(skb); unsigned int offset = 0, size, count = 0, i; unsigned int f, bytecount, segs; i = tx_ring->next_to_use; while (len) { buffer_info = &tx_ring->buffer_info[i]; size = min(len, max_per_txd); buffer_info->length = size; buffer_info->time_stamp = jiffies; buffer_info->next_to_watch = i; buffer_info->dma = dma_map_single(&pdev->dev, skb->data + offset, size, DMA_TO_DEVICE); buffer_info->mapped_as_page = false; if (dma_mapping_error(&pdev->dev, buffer_info->dma)) goto dma_error; len -= size; offset += size; count++; if (len) { i++; if (i == tx_ring->count) i = 0; } } for (f = 0; f < nr_frags; f++) { const struct skb_frag_struct *frag; frag = &skb_shinfo(skb)->frags[f]; len = skb_frag_size(frag); offset = 0; while (len) { i++; if (i == tx_ring->count) i = 0; buffer_info = &tx_ring->buffer_info[i]; size = min(len, max_per_txd); buffer_info->length = size; buffer_info->time_stamp = jiffies; buffer_info->next_to_watch = i; buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag, offset, size, DMA_TO_DEVICE); buffer_info->mapped_as_page = true; if (dma_mapping_error(&pdev->dev, buffer_info->dma)) goto dma_error; len -= size; offset += size; count++; } } segs = skb_shinfo(skb)->gso_segs ? : 1; /* multiply data chunks by size of headers */ bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len; tx_ring->buffer_info[i].skb = skb; tx_ring->buffer_info[i].segs = segs; tx_ring->buffer_info[i].bytecount = bytecount; tx_ring->buffer_info[first].next_to_watch = i; return count; dma_error: dev_err(&pdev->dev, "Tx DMA map failed\n"); buffer_info->dma = 0; if (count) count--; while (count--) { if (i == 0) i += tx_ring->count; i--; buffer_info = &tx_ring->buffer_info[i]; e1000_put_txbuf(tx_ring, buffer_info); } return 0; } static void e1000_tx_queue(struct e1000_ring *tx_ring, int tx_flags, int count) { struct e1000_adapter *adapter = tx_ring->adapter; struct e1000_tx_desc *tx_desc = NULL; struct e1000_buffer *buffer_info; u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS; unsigned int i; if (tx_flags & E1000_TX_FLAGS_TSO) { txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D | E1000_TXD_CMD_TSE; txd_upper |= E1000_TXD_POPTS_TXSM << 8; if (tx_flags & E1000_TX_FLAGS_IPV4) txd_upper |= E1000_TXD_POPTS_IXSM << 8; } if (tx_flags & E1000_TX_FLAGS_CSUM) { txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D; txd_upper |= E1000_TXD_POPTS_TXSM << 8; } if (tx_flags & E1000_TX_FLAGS_VLAN) { txd_lower |= E1000_TXD_CMD_VLE; txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK); } if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS)) txd_lower &= ~(E1000_TXD_CMD_IFCS); if (unlikely(tx_flags & E1000_TX_FLAGS_HWTSTAMP)) { txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D; txd_upper |= E1000_TXD_EXTCMD_TSTAMP; } i = tx_ring->next_to_use; do { buffer_info = &tx_ring->buffer_info[i]; tx_desc = E1000_TX_DESC(*tx_ring, i); tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); tx_desc->lower.data = cpu_to_le32(txd_lower | buffer_info->length); tx_desc->upper.data = cpu_to_le32(txd_upper); i++; if (i == tx_ring->count) i = 0; } while (--count > 0); tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd); /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */ if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS)) tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS)); /* Force memory writes to complete before letting h/w * know there are new descriptors to fetch. (Only * applicable for weak-ordered memory model archs, * such as IA-64). */ wmb(); tx_ring->next_to_use = i; if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) e1000e_update_tdt_wa(tx_ring, i); else writel(i, tx_ring->tail); /* we need this if more than one processor can write to our tail * at a time, it synchronizes IO on IA64/Altix systems */ mmiowb(); } #define MINIMUM_DHCP_PACKET_SIZE 282 static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb) { struct e1000_hw *hw = &adapter->hw; u16 length, offset; if (vlan_tx_tag_present(skb) && !((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) && (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN))) return 0; if (skb->len <= MINIMUM_DHCP_PACKET_SIZE) return 0; if (((struct ethhdr *)skb->data)->h_proto != htons(ETH_P_IP)) return 0; { const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data + 14); struct udphdr *udp; if (ip->protocol != IPPROTO_UDP) return 0; udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2)); if (ntohs(udp->dest) != 67) return 0; offset = (u8 *)udp + 8 - skb->data; length = skb->len - offset; return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length); } return 0; } static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size) { struct e1000_adapter *adapter = tx_ring->adapter; netif_stop_queue(adapter->netdev); /* Herbert's original patch had: * smp_mb__after_netif_stop_queue(); * but since that doesn't exist yet, just open code it. */ smp_mb(); /* We need to check again in a case another CPU has just * made room available. */ if (e1000_desc_unused(tx_ring) < size) return -EBUSY; /* A reprieve! */ netif_start_queue(adapter->netdev); ++adapter->restart_queue; return 0; } static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size) { BUG_ON(size > tx_ring->count); if (e1000_desc_unused(tx_ring) >= size) return 0; return __e1000_maybe_stop_tx(tx_ring, size); } static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev) { struct e1000_adapter *adapter = netdev_priv(netdev); struct e1000_ring *tx_ring = adapter->tx_ring; unsigned int first; unsigned int tx_flags = 0; unsigned int len = skb_headlen(skb); unsigned int nr_frags; unsigned int mss; int count = 0; int tso; unsigned int f; if (test_bit(__E1000_DOWN, &adapter->state)) { dev_kfree_skb_any(skb); return NETDEV_TX_OK; } if (skb->len <= 0) { dev_kfree_skb_any(skb); return NETDEV_TX_OK; } /* The minimum packet size with TCTL.PSP set is 17 bytes so * pad skb in order to meet this minimum size requirement */ if (unlikely(skb->len < 17)) { if (skb_pad(skb, 17 - skb->len)) return NETDEV_TX_OK; skb->len = 17; skb_set_tail_pointer(skb, 17); } mss = skb_shinfo(skb)->gso_size; if (mss) { u8 hdr_len; /* TSO Workaround for 82571/2/3 Controllers -- if skb->data * points to just header, pull a few bytes of payload from * frags into skb->data */ hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); /* we do this workaround for ES2LAN, but it is un-necessary, * avoiding it could save a lot of cycles */ if (skb->data_len && (hdr_len == len)) { unsigned int pull_size; pull_size = min_t(unsigned int, 4, skb->data_len); if (!__pskb_pull_tail(skb, pull_size)) { e_err("__pskb_pull_tail failed.\n"); dev_kfree_skb_any(skb); return NETDEV_TX_OK; } len = skb_headlen(skb); } } /* reserve a descriptor for the offload context */ if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL)) count++; count++; count += DIV_ROUND_UP(len, adapter->tx_fifo_limit); nr_frags = skb_shinfo(skb)->nr_frags; for (f = 0; f < nr_frags; f++) count += DIV_ROUND_UP(skb_frag_size(&skb_shinfo(skb)->frags[f]), adapter->tx_fifo_limit); if (adapter->hw.mac.tx_pkt_filtering) e1000_transfer_dhcp_info(adapter, skb); /* need: count + 2 desc gap to keep tail from touching * head, otherwise try next time */ if (e1000_maybe_stop_tx(tx_ring, count + 2)) return NETDEV_TX_BUSY; if (vlan_tx_tag_present(skb)) { tx_flags |= E1000_TX_FLAGS_VLAN; tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT); } first = tx_ring->next_to_use; tso = e1000_tso(tx_ring, skb); if (tso < 0) { dev_kfree_skb_any(skb); return NETDEV_TX_OK; } if (tso) tx_flags |= E1000_TX_FLAGS_TSO; else if (e1000_tx_csum(tx_ring, skb)) tx_flags |= E1000_TX_FLAGS_CSUM; /* Old method was to assume IPv4 packet by default if TSO was enabled. * 82571 hardware supports TSO capabilities for IPv6 as well... * no longer assume, we must. */ if (skb->protocol == htons(ETH_P_IP)) tx_flags |= E1000_TX_FLAGS_IPV4; if (unlikely(skb->no_fcs)) tx_flags |= E1000_TX_FLAGS_NO_FCS; /* if count is 0 then mapping error has occurred */ count = e1000_tx_map(tx_ring, skb, first, adapter->tx_fifo_limit, nr_frags); if (count) { if (unlikely((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) && !adapter->tx_hwtstamp_skb)) { skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; tx_flags |= E1000_TX_FLAGS_HWTSTAMP; adapter->tx_hwtstamp_skb = skb_get(skb); schedule_work(&adapter->tx_hwtstamp_work); } else { skb_tx_timestamp(skb); } netdev_sent_queue(netdev, skb->len); e1000_tx_queue(tx_ring, tx_flags, count); /* Make sure there is space in the ring for the next send. */ e1000_maybe_stop_tx(tx_ring, (MAX_SKB_FRAGS * DIV_ROUND_UP(PAGE_SIZE, adapter->tx_fifo_limit) + 2)); } else { dev_kfree_skb_any(skb); tx_ring->buffer_info[first].time_stamp = 0; tx_ring->next_to_use = first; } return NETDEV_TX_OK; } /** * e1000_tx_timeout - Respond to a Tx Hang * @netdev: network interface device structure **/ static void e1000_tx_timeout(struct net_device *netdev) { struct e1000_adapter *adapter = netdev_priv(netdev); /* Do the reset outside of interrupt context */ adapter->tx_timeout_count++; schedule_work(&adapter->reset_task); } static void e1000_reset_task(struct work_struct *work) { struct e1000_adapter *adapter; adapter = container_of(work, struct e1000_adapter, reset_task); /* don't run the task if already down */ if (test_bit(__E1000_DOWN, &adapter->state)) return; if (!(adapter->flags & FLAG_RESTART_NOW)) { e1000e_dump(adapter); e_err("Reset adapter unexpectedly\n"); } e1000e_reinit_locked(adapter); } /** * e1000_get_stats64 - Get System Network Statistics * @netdev: network interface device structure * @stats: rtnl_link_stats64 pointer * * Returns the address of the device statistics structure. **/ struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev, struct rtnl_link_stats64 *stats) { struct e1000_adapter *adapter = netdev_priv(netdev); memset(stats, 0, sizeof(struct rtnl_link_stats64)); spin_lock(&adapter->stats64_lock); e1000e_update_stats(adapter); /* Fill out the OS statistics structure */ stats->rx_bytes = adapter->stats.gorc; stats->rx_packets = adapter->stats.gprc; stats->tx_bytes = adapter->stats.gotc; stats->tx_packets = adapter->stats.gptc; stats->multicast = adapter->stats.mprc; stats->collisions = adapter->stats.colc; /* Rx Errors */ /* RLEC on some newer hardware can be incorrect so build * our own version based on RUC and ROC */ stats->rx_errors = adapter->stats.rxerrc + adapter->stats.crcerrs + adapter->stats.algnerrc + adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr; stats->rx_length_errors = adapter->stats.ruc + adapter->stats.roc; stats->rx_crc_errors = adapter->stats.crcerrs; stats->rx_frame_errors = adapter->stats.algnerrc; stats->rx_missed_errors = adapter->stats.mpc; /* Tx Errors */ stats->tx_errors = adapter->stats.ecol + adapter->stats.latecol; stats->tx_aborted_errors = adapter->stats.ecol; stats->tx_window_errors = adapter->stats.latecol; stats->tx_carrier_errors = adapter->stats.tncrs; /* Tx Dropped needs to be maintained elsewhere */ spin_unlock(&adapter->stats64_lock); return stats; } /** * e1000_change_mtu - Change the Maximum Transfer Unit * @netdev: network interface device structure * @new_mtu: new value for maximum frame size * * Returns 0 on success, negative on failure **/ static int e1000_change_mtu(struct net_device *netdev, int new_mtu) { struct e1000_adapter *adapter = netdev_priv(netdev); int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN; /* Jumbo frame support */ if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) && !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) { e_err("Jumbo Frames not supported.\n"); return -EINVAL; } /* Supported frame sizes */ if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) || (max_frame > adapter->max_hw_frame_size)) { e_err("Unsupported MTU setting\n"); return -EINVAL; } /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */ if ((adapter->hw.mac.type >= e1000_pch2lan) && !(adapter->flags2 & FLAG2_CRC_STRIPPING) && (new_mtu > ETH_DATA_LEN)) { e_err("Jumbo Frames not supported on this device when CRC stripping is disabled.\n"); return -EINVAL; } while (test_and_set_bit(__E1000_RESETTING, &adapter->state)) usleep_range(1000, 2000); /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */ adapter->max_frame_size = max_frame; e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu); netdev->mtu = new_mtu; if (netif_running(netdev)) e1000e_down(adapter); /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN * means we reserve 2 more, this pushes us to allocate from the next * larger slab size. * i.e. RXBUFFER_2048 --> size-4096 slab * However with the new *_jumbo_rx* routines, jumbo receives will use * fragmented skbs */ if (max_frame <= 2048) adapter->rx_buffer_len = 2048; else adapter->rx_buffer_len = 4096; /* adjust allocation if LPE protects us, and we aren't using SBP */ if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) || (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN)) adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN; if (netif_running(netdev)) e1000e_up(adapter); else e1000e_reset(adapter); clear_bit(__E1000_RESETTING, &adapter->state); return 0; } static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) { struct e1000_adapter *adapter = netdev_priv(netdev); struct mii_ioctl_data *data = if_mii(ifr); if (adapter->hw.phy.media_type != e1000_media_type_copper) return -EOPNOTSUPP; switch (cmd) { case SIOCGMIIPHY: data->phy_id = adapter->hw.phy.addr; break; case SIOCGMIIREG: e1000_phy_read_status(adapter); switch (data->reg_num & 0x1F) { case MII_BMCR: data->val_out = adapter->phy_regs.bmcr; break; case MII_BMSR: data->val_out = adapter->phy_regs.bmsr; break; case MII_PHYSID1: data->val_out = (adapter->hw.phy.id >> 16); break; case MII_PHYSID2: data->val_out = (adapter->hw.phy.id & 0xFFFF); break; case MII_ADVERTISE: data->val_out = adapter->phy_regs.advertise; break; case MII_LPA: data->val_out = adapter->phy_regs.lpa; break; case MII_EXPANSION: data->val_out = adapter->phy_regs.expansion; break; case MII_CTRL1000: data->val_out = adapter->phy_regs.ctrl1000; break; case MII_STAT1000: data->val_out = adapter->phy_regs.stat1000; break; case MII_ESTATUS: data->val_out = adapter->phy_regs.estatus; break; default: return -EIO; } break; case SIOCSMIIREG: default: return -EOPNOTSUPP; } return 0; } /** * e1000e_hwtstamp_ioctl - control hardware time stamping * @netdev: network interface device structure * @ifreq: interface request * * Outgoing time stamping can be enabled and disabled. Play nice and * disable it when requested, although it shouldn't cause any overhead * when no packet needs it. At most one packet in the queue may be * marked for time stamping, otherwise it would be impossible to tell * for sure to which packet the hardware time stamp belongs. * * Incoming time stamping has to be configured via the hardware filters. * Not all combinations are supported, in particular event type has to be * specified. Matching the kind of event packet is not supported, with the * exception of "all V2 events regardless of level 2 or 4". **/ static int e1000e_hwtstamp_set(struct net_device *netdev, struct ifreq *ifr) { struct e1000_adapter *adapter = netdev_priv(netdev); struct hwtstamp_config config; int ret_val; if (copy_from_user(&config, ifr->ifr_data, sizeof(config))) return -EFAULT; ret_val = e1000e_config_hwtstamp(adapter, &config); if (ret_val) return ret_val; switch (config.rx_filter) { case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: case HWTSTAMP_FILTER_PTP_V2_SYNC: case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: /* With V2 type filters which specify a Sync or Delay Request, * Path Delay Request/Response messages are also time stamped * by hardware so notify the caller the requested packets plus * some others are time stamped. */ config.rx_filter = HWTSTAMP_FILTER_SOME; break; default: break; } return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ? -EFAULT : 0; } static int e1000e_hwtstamp_get(struct net_device *netdev, struct ifreq *ifr) { struct e1000_adapter *adapter = netdev_priv(netdev); return copy_to_user(ifr->ifr_data, &adapter->hwtstamp_config, sizeof(adapter->hwtstamp_config)) ? -EFAULT : 0; } static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) { switch (cmd) { case SIOCGMIIPHY: case SIOCGMIIREG: case SIOCSMIIREG: return e1000_mii_ioctl(netdev, ifr, cmd); case SIOCSHWTSTAMP: return e1000e_hwtstamp_set(netdev, ifr); case SIOCGHWTSTAMP: return e1000e_hwtstamp_get(netdev, ifr); default: return -EOPNOTSUPP; } } static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc) { struct e1000_hw *hw = &adapter->hw; u32 i, mac_reg; u16 phy_reg, wuc_enable; int retval; /* copy MAC RARs to PHY RARs */ e1000_copy_rx_addrs_to_phy_ich8lan(hw); retval = hw->phy.ops.acquire(hw); if (retval) { e_err("Could not acquire PHY\n"); return retval; } /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */ retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable); if (retval) goto release; /* copy MAC MTA to PHY MTA - only needed for pchlan */ for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) { mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i); hw->phy.ops.write_reg_page(hw, BM_MTA(i), (u16)(mac_reg & 0xFFFF)); hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1, (u16)((mac_reg >> 16) & 0xFFFF)); } /* configure PHY Rx Control register */ hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg); mac_reg = er32(RCTL); if (mac_reg & E1000_RCTL_UPE) phy_reg |= BM_RCTL_UPE; if (mac_reg & E1000_RCTL_MPE) phy_reg |= BM_RCTL_MPE; phy_reg &= ~(BM_RCTL_MO_MASK); if (mac_reg & E1000_RCTL_MO_3) phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT) << BM_RCTL_MO_SHIFT); if (mac_reg & E1000_RCTL_BAM) phy_reg |= BM_RCTL_BAM; if (mac_reg & E1000_RCTL_PMCF) phy_reg |= BM_RCTL_PMCF; mac_reg = er32(CTRL); if (mac_reg & E1000_CTRL_RFCE) phy_reg |= BM_RCTL_RFCE; hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg); /* enable PHY wakeup in MAC register */ ew32(WUFC, wufc); ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN); /* configure and enable PHY wakeup in PHY registers */ hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc); hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, E1000_WUC_PME_EN); /* activate PHY wakeup */ wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT; retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable); if (retval) e_err("Could not set PHY Host Wakeup bit\n"); release: hw->phy.ops.release(hw); return retval; } static int __e1000_shutdown(struct pci_dev *pdev, bool runtime) { struct net_device *netdev = pci_get_drvdata(pdev); struct e1000_adapter *adapter = netdev_priv(netdev); struct e1000_hw *hw = &adapter->hw; u32 ctrl, ctrl_ext, rctl, status; /* Runtime suspend should only enable wakeup for link changes */ u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol; int retval = 0; netif_device_detach(netdev); if (netif_running(netdev)) { int count = E1000_CHECK_RESET_COUNT; while (test_bit(__E1000_RESETTING, &adapter->state) && count--) usleep_range(10000, 20000); WARN_ON(test_bit(__E1000_RESETTING, &adapter->state)); e1000e_down(adapter); e1000_free_irq(adapter); } e1000e_reset_interrupt_capability(adapter); status = er32(STATUS); if (status & E1000_STATUS_LU) wufc &= ~E1000_WUFC_LNKC; if (wufc) { e1000_setup_rctl(adapter); e1000e_set_rx_mode(netdev); /* turn on all-multi mode if wake on multicast is enabled */ if (wufc & E1000_WUFC_MC) { rctl = er32(RCTL); rctl |= E1000_RCTL_MPE; ew32(RCTL, rctl); } ctrl = er32(CTRL); ctrl |= E1000_CTRL_ADVD3WUC; if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP)) ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT; ew32(CTRL, ctrl); if (adapter->hw.phy.media_type == e1000_media_type_fiber || adapter->hw.phy.media_type == e1000_media_type_internal_serdes) { /* keep the laser running in D3 */ ctrl_ext = er32(CTRL_EXT); ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA; ew32(CTRL_EXT, ctrl_ext); } if (adapter->flags & FLAG_IS_ICH) e1000_suspend_workarounds_ich8lan(&adapter->hw); /* Allow time for pending master requests to run */ e1000e_disable_pcie_master(&adapter->hw); if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) { /* enable wakeup by the PHY */ retval = e1000_init_phy_wakeup(adapter, wufc); if (retval) return retval; } else { /* enable wakeup by the MAC */ ew32(WUFC, wufc); ew32(WUC, E1000_WUC_PME_EN); } } else { ew32(WUC, 0); ew32(WUFC, 0); } if (adapter->hw.phy.type == e1000_phy_igp_3) e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw); /* Release control of h/w to f/w. If f/w is AMT enabled, this * would have already happened in close and is redundant. */ e1000e_release_hw_control(adapter); pci_clear_master(pdev); /* The pci-e switch on some quad port adapters will report a * correctable error when the MAC transitions from D0 to D3. To * prevent this we need to mask off the correctable errors on the * downstream port of the pci-e switch. * * We don't have the associated upstream bridge while assigning * the PCI device into guest. For example, the KVM on power is * one of the cases. */ if (adapter->flags & FLAG_IS_QUAD_PORT) { struct pci_dev *us_dev = pdev->bus->self; u16 devctl; if (!us_dev) return 0; pcie_capability_read_word(us_dev, PCI_EXP_DEVCTL, &devctl); pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL, (devctl & ~PCI_EXP_DEVCTL_CERE)); pci_save_state(pdev); pci_prepare_to_sleep(pdev); pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL, devctl); } return 0; } /** * e1000e_disable_aspm - Disable ASPM states * @pdev: pointer to PCI device struct * @state: bit-mask of ASPM states to disable * * Some devices *must* have certain ASPM states disabled per hardware errata. **/ static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state) { struct pci_dev *parent = pdev->bus->self; u16 aspm_dis_mask = 0; u16 pdev_aspmc, parent_aspmc; switch (state) { case PCIE_LINK_STATE_L0S: case PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1: aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L0S; /* fall-through - can't have L1 without L0s */ case PCIE_LINK_STATE_L1: aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L1; break; default: return; } pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc); pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC; if (parent) { pcie_capability_read_word(parent, PCI_EXP_LNKCTL, &parent_aspmc); parent_aspmc &= PCI_EXP_LNKCTL_ASPMC; } /* Nothing to do if the ASPM states to be disabled already are */ if (!(pdev_aspmc & aspm_dis_mask) && (!parent || !(parent_aspmc & aspm_dis_mask))) return; dev_info(&pdev->dev, "Disabling ASPM %s %s\n", (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L0S) ? "L0s" : "", (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L1) ? "L1" : ""); #ifdef CONFIG_PCIEASPM pci_disable_link_state_locked(pdev, state); /* Double-check ASPM control. If not disabled by the above, the * BIOS is preventing that from happening (or CONFIG_PCIEASPM is * not enabled); override by writing PCI config space directly. */ pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc); pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC; if (!(aspm_dis_mask & pdev_aspmc)) return; #endif /* Both device and parent should have the same ASPM setting. * Disable ASPM in downstream component first and then upstream. */ pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, aspm_dis_mask); if (parent) pcie_capability_clear_word(parent, PCI_EXP_LNKCTL, aspm_dis_mask); } #ifdef CONFIG_PM static bool e1000e_pm_ready(struct e1000_adapter *adapter) { return !!adapter->tx_ring->buffer_info; } static int __e1000_resume(struct pci_dev *pdev) { struct net_device *netdev = pci_get_drvdata(pdev); struct e1000_adapter *adapter = netdev_priv(netdev); struct e1000_hw *hw = &adapter->hw; u16 aspm_disable_flag = 0; u32 err; if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S) aspm_disable_flag = PCIE_LINK_STATE_L0S; if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1) aspm_disable_flag |= PCIE_LINK_STATE_L1; if (aspm_disable_flag) e1000e_disable_aspm(pdev, aspm_disable_flag); pci_set_master(pdev); e1000e_set_interrupt_capability(adapter); if (netif_running(netdev)) { err = e1000_request_irq(adapter); if (err) return err; } if (hw->mac.type >= e1000_pch2lan) e1000_resume_workarounds_pchlan(&adapter->hw); e1000e_power_up_phy(adapter); /* report the system wakeup cause from S3/S4 */ if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) { u16 phy_data; e1e_rphy(&adapter->hw, BM_WUS, &phy_data); if (phy_data) { e_info("PHY Wakeup cause - %s\n", phy_data & E1000_WUS_EX ? "Unicast Packet" : phy_data & E1000_WUS_MC ? "Multicast Packet" : phy_data & E1000_WUS_BC ? "Broadcast Packet" : phy_data & E1000_WUS_MAG ? "Magic Packet" : phy_data & E1000_WUS_LNKC ? "Link Status Change" : "other"); } e1e_wphy(&adapter->hw, BM_WUS, ~0); } else { u32 wus = er32(WUS); if (wus) { e_info("MAC Wakeup cause - %s\n", wus & E1000_WUS_EX ? "Unicast Packet" : wus & E1000_WUS_MC ? "Multicast Packet" : wus & E1000_WUS_BC ? "Broadcast Packet" : wus & E1000_WUS_MAG ? "Magic Packet" : wus & E1000_WUS_LNKC ? "Link Status Change" : "other"); } ew32(WUS, ~0); } e1000e_reset(adapter); e1000_init_manageability_pt(adapter); if (netif_running(netdev)) e1000e_up(adapter); netif_device_attach(netdev); /* If the controller has AMT, do not set DRV_LOAD until the interface * is up. For all other cases, let the f/w know that the h/w is now * under the control of the driver. */ if (!(adapter->flags & FLAG_HAS_AMT)) e1000e_get_hw_control(adapter); return 0; } #ifdef CONFIG_PM_SLEEP static int e1000_suspend(struct device *dev) { struct pci_dev *pdev = to_pci_dev(dev); return __e1000_shutdown(pdev, false); } static int e1000_resume(struct device *dev) { struct pci_dev *pdev = to_pci_dev(dev); struct net_device *netdev = pci_get_drvdata(pdev); struct e1000_adapter *adapter = netdev_priv(netdev); if (e1000e_pm_ready(adapter)) adapter->idle_check = true; return __e1000_resume(pdev); } #endif /* CONFIG_PM_SLEEP */ #ifdef CONFIG_PM_RUNTIME static int e1000_runtime_suspend(struct device *dev) { struct pci_dev *pdev = to_pci_dev(dev); struct net_device *netdev = pci_get_drvdata(pdev); struct e1000_adapter *adapter = netdev_priv(netdev); if (!e1000e_pm_ready(adapter)) return 0; return __e1000_shutdown(pdev, true); } static int e1000_idle(struct device *dev) { struct pci_dev *pdev = to_pci_dev(dev); struct net_device *netdev = pci_get_drvdata(pdev); struct e1000_adapter *adapter = netdev_priv(netdev); if (!e1000e_pm_ready(adapter)) return 0; if (adapter->idle_check) { adapter->idle_check = false; if (!e1000e_has_link(adapter)) pm_schedule_suspend(dev, MSEC_PER_SEC); } return -EBUSY; } static int e1000_runtime_resume(struct device *dev) { struct pci_dev *pdev = to_pci_dev(dev); struct net_device *netdev = pci_get_drvdata(pdev); struct e1000_adapter *adapter = netdev_priv(netdev); if (!e1000e_pm_ready(adapter)) return 0; adapter->idle_check = !dev->power.runtime_auto; return __e1000_resume(pdev); } #endif /* CONFIG_PM_RUNTIME */ #endif /* CONFIG_PM */ static void e1000_shutdown(struct pci_dev *pdev) { __e1000_shutdown(pdev, false); } #ifdef CONFIG_NET_POLL_CONTROLLER static irqreturn_t e1000_intr_msix(int __always_unused irq, void *data) { struct net_device *netdev = data; struct e1000_adapter *adapter = netdev_priv(netdev); if (adapter->msix_entries) { int vector, msix_irq; vector = 0; msix_irq = adapter->msix_entries[vector].vector; disable_irq(msix_irq); e1000_intr_msix_rx(msix_irq, netdev); enable_irq(msix_irq); vector++; msix_irq = adapter->msix_entries[vector].vector; disable_irq(msix_irq); e1000_intr_msix_tx(msix_irq, netdev); enable_irq(msix_irq); vector++; msix_irq = adapter->msix_entries[vector].vector; disable_irq(msix_irq); e1000_msix_other(msix_irq, netdev); enable_irq(msix_irq); } return IRQ_HANDLED; } /** * e1000_netpoll * @netdev: network interface device structure * * Polling 'interrupt' - used by things like netconsole to send skbs * without having to re-enable interrupts. It's not called while * the interrupt routine is executing. */ static void e1000_netpoll(struct net_device *netdev) { struct e1000_adapter *adapter = netdev_priv(netdev); switch (adapter->int_mode) { case E1000E_INT_MODE_MSIX: e1000_intr_msix(adapter->pdev->irq, netdev); break; case E1000E_INT_MODE_MSI: disable_irq(adapter->pdev->irq); e1000_intr_msi(adapter->pdev->irq, netdev); enable_irq(adapter->pdev->irq); break; default: /* E1000E_INT_MODE_LEGACY */ disable_irq(adapter->pdev->irq); e1000_intr(adapter->pdev->irq, netdev); enable_irq(adapter->pdev->irq); break; } } #endif /** * e1000_io_error_detected - called when PCI error is detected * @pdev: Pointer to PCI device * @state: The current pci connection state * * This function is called after a PCI bus error affecting * this device has been detected. */ static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state) { struct net_device *netdev = pci_get_drvdata(pdev); struct e1000_adapter *adapter = netdev_priv(netdev); netif_device_detach(netdev); if (state == pci_channel_io_perm_failure) return PCI_ERS_RESULT_DISCONNECT; if (netif_running(netdev)) e1000e_down(adapter); pci_disable_device(pdev); /* Request a slot slot reset. */ return PCI_ERS_RESULT_NEED_RESET; } /** * e1000_io_slot_reset - called after the pci bus has been reset. * @pdev: Pointer to PCI device * * Restart the card from scratch, as if from a cold-boot. Implementation * resembles the first-half of the e1000_resume routine. */ static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev) { struct net_device *netdev = pci_get_drvdata(pdev); struct e1000_adapter *adapter = netdev_priv(netdev); struct e1000_hw *hw = &adapter->hw; u16 aspm_disable_flag = 0; int err; pci_ers_result_t result; if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S) aspm_disable_flag = PCIE_LINK_STATE_L0S; if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1) aspm_disable_flag |= PCIE_LINK_STATE_L1; if (aspm_disable_flag) e1000e_disable_aspm(pdev, aspm_disable_flag); err = pci_enable_device_mem(pdev); if (err) { dev_err(&pdev->dev, "Cannot re-enable PCI device after reset.\n"); result = PCI_ERS_RESULT_DISCONNECT; } else { pdev->state_saved = true; pci_restore_state(pdev); pci_set_master(pdev); pci_enable_wake(pdev, PCI_D3hot, 0); pci_enable_wake(pdev, PCI_D3cold, 0); e1000e_reset(adapter); ew32(WUS, ~0); result = PCI_ERS_RESULT_RECOVERED; } pci_cleanup_aer_uncorrect_error_status(pdev); return result; } /** * e1000_io_resume - called when traffic can start flowing again. * @pdev: Pointer to PCI device * * This callback is called when the error recovery driver tells us that * its OK to resume normal operation. Implementation resembles the * second-half of the e1000_resume routine. */ static void e1000_io_resume(struct pci_dev *pdev) { struct net_device *netdev = pci_get_drvdata(pdev); struct e1000_adapter *adapter = netdev_priv(netdev); e1000_init_manageability_pt(adapter); if (netif_running(netdev)) { if (e1000e_up(adapter)) { dev_err(&pdev->dev, "can't bring device back up after reset\n"); return; } } netif_device_attach(netdev); /* If the controller has AMT, do not set DRV_LOAD until the interface * is up. For all other cases, let the f/w know that the h/w is now * under the control of the driver. */ if (!(adapter->flags & FLAG_HAS_AMT)) e1000e_get_hw_control(adapter); } static void e1000_print_device_info(struct e1000_adapter *adapter) { struct e1000_hw *hw = &adapter->hw; struct net_device *netdev = adapter->netdev; u32 ret_val; u8 pba_str[E1000_PBANUM_LENGTH]; /* print bus type/speed/width info */ e_info("(PCI Express:2.5GT/s:%s) %pM\n", /* bus width */ ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" : "Width x1"), /* MAC address */ netdev->dev_addr); e_info("Intel(R) PRO/%s Network Connection\n", (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000"); ret_val = e1000_read_pba_string_generic(hw, pba_str, E1000_PBANUM_LENGTH); if (ret_val) strlcpy((char *)pba_str, "Unknown", sizeof(pba_str)); e_info("MAC: %d, PHY: %d, PBA No: %s\n", hw->mac.type, hw->phy.type, pba_str); } static void e1000_eeprom_checks(struct e1000_adapter *adapter) { struct e1000_hw *hw = &adapter->hw; int ret_val; u16 buf = 0; if (hw->mac.type != e1000_82573) return; ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf); le16_to_cpus(&buf); if (!ret_val && (!(buf & (1 << 0)))) { /* Deep Smart Power Down (DSPD) */ dev_warn(&adapter->pdev->dev, "Warning: detected DSPD enabled in EEPROM\n"); } } static int e1000_set_features(struct net_device *netdev, netdev_features_t features) { struct e1000_adapter *adapter = netdev_priv(netdev); netdev_features_t changed = features ^ netdev->features; if (changed & (NETIF_F_TSO | NETIF_F_TSO6)) adapter->flags |= FLAG_TSO_FORCE; if (!(changed & (NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_RXCSUM | NETIF_F_RXHASH | NETIF_F_RXFCS | NETIF_F_RXALL))) return 0; if (changed & NETIF_F_RXFCS) { if (features & NETIF_F_RXFCS) { adapter->flags2 &= ~FLAG2_CRC_STRIPPING; } else { /* We need to take it back to defaults, which might mean * stripping is still disabled at the adapter level. */ if (adapter->flags2 & FLAG2_DFLT_CRC_STRIPPING) adapter->flags2 |= FLAG2_CRC_STRIPPING; else adapter->flags2 &= ~FLAG2_CRC_STRIPPING; } } netdev->features = features; if (netif_running(netdev)) e1000e_reinit_locked(adapter); else e1000e_reset(adapter); return 0; } static const struct net_device_ops e1000e_netdev_ops = { .ndo_open = e1000_open, .ndo_stop = e1000_close, .ndo_start_xmit = e1000_xmit_frame, .ndo_get_stats64 = e1000e_get_stats64, .ndo_set_rx_mode = e1000e_set_rx_mode, .ndo_set_mac_address = e1000_set_mac, .ndo_change_mtu = e1000_change_mtu, .ndo_do_ioctl = e1000_ioctl, .ndo_tx_timeout = e1000_tx_timeout, .ndo_validate_addr = eth_validate_addr, .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid, .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid, #ifdef CONFIG_NET_POLL_CONTROLLER .ndo_poll_controller = e1000_netpoll, #endif .ndo_set_features = e1000_set_features, }; /** * e1000_probe - Device Initialization Routine * @pdev: PCI device information struct * @ent: entry in e1000_pci_tbl * * Returns 0 on success, negative on failure * * e1000_probe initializes an adapter identified by a pci_dev structure. * The OS initialization, configuring of the adapter private structure, * and a hardware reset occur. **/ static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent) { struct net_device *netdev; struct e1000_adapter *adapter; struct e1000_hw *hw; const struct e1000_info *ei = e1000_info_tbl[ent->driver_data]; resource_size_t mmio_start, mmio_len; resource_size_t flash_start, flash_len; static int cards_found; u16 aspm_disable_flag = 0; int bars, i, err, pci_using_dac; u16 eeprom_data = 0; u16 eeprom_apme_mask = E1000_EEPROM_APME; if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S) aspm_disable_flag = PCIE_LINK_STATE_L0S; if (ei->flags2 & FLAG2_DISABLE_ASPM_L1) aspm_disable_flag |= PCIE_LINK_STATE_L1; if (aspm_disable_flag) e1000e_disable_aspm(pdev, aspm_disable_flag); err = pci_enable_device_mem(pdev); if (err) return err; pci_using_dac = 0; err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); if (!err) { pci_using_dac = 1; } else { err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); if (err) { dev_err(&pdev->dev, "No usable DMA configuration, aborting\n"); goto err_dma; } } bars = pci_select_bars(pdev, IORESOURCE_MEM); err = pci_request_selected_regions_exclusive(pdev, bars, e1000e_driver_name); if (err) goto err_pci_reg; /* AER (Advanced Error Reporting) hooks */ pci_enable_pcie_error_reporting(pdev); pci_set_master(pdev); /* PCI config space info */ err = pci_save_state(pdev); if (err) goto err_alloc_etherdev; err = -ENOMEM; netdev = alloc_etherdev(sizeof(struct e1000_adapter)); if (!netdev) goto err_alloc_etherdev; SET_NETDEV_DEV(netdev, &pdev->dev); netdev->irq = pdev->irq; pci_set_drvdata(pdev, netdev); adapter = netdev_priv(netdev); hw = &adapter->hw; adapter->netdev = netdev; adapter->pdev = pdev; adapter->ei = ei; adapter->pba = ei->pba; adapter->flags = ei->flags; adapter->flags2 = ei->flags2; adapter->hw.adapter = adapter; adapter->hw.mac.type = ei->mac; adapter->max_hw_frame_size = ei->max_hw_frame_size; adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE); mmio_start = pci_resource_start(pdev, 0); mmio_len = pci_resource_len(pdev, 0); err = -EIO; adapter->hw.hw_addr = ioremap(mmio_start, mmio_len); if (!adapter->hw.hw_addr) goto err_ioremap; if ((adapter->flags & FLAG_HAS_FLASH) && (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) { flash_start = pci_resource_start(pdev, 1); flash_len = pci_resource_len(pdev, 1); adapter->hw.flash_address = ioremap(flash_start, flash_len); if (!adapter->hw.flash_address) goto err_flashmap; } /* Set default EEE advertisement */ if (adapter->flags2 & FLAG2_HAS_EEE) adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T; /* construct the net_device struct */ netdev->netdev_ops = &e1000e_netdev_ops; e1000e_set_ethtool_ops(netdev); netdev->watchdog_timeo = 5 * HZ; netif_napi_add(netdev, &adapter->napi, e1000e_poll, 64); strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name)); netdev->mem_start = mmio_start; netdev->mem_end = mmio_start + mmio_len; adapter->bd_number = cards_found++; e1000e_check_options(adapter); /* setup adapter struct */ err = e1000_sw_init(adapter); if (err) goto err_sw_init; memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops)); memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops)); memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops)); err = ei->get_variants(adapter); if (err) goto err_hw_init; if ((adapter->flags & FLAG_IS_ICH) && (adapter->flags & FLAG_READ_ONLY_NVM)) e1000e_write_protect_nvm_ich8lan(&adapter->hw); hw->mac.ops.get_bus_info(&adapter->hw); adapter->hw.phy.autoneg_wait_to_complete = 0; /* Copper options */ if (adapter->hw.phy.media_type == e1000_media_type_copper) { adapter->hw.phy.mdix = AUTO_ALL_MODES; adapter->hw.phy.disable_polarity_correction = 0; adapter->hw.phy.ms_type = e1000_ms_hw_default; } if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw)) dev_info(&pdev->dev, "PHY reset is blocked due to SOL/IDER session.\n"); /* Set initial default active device features */ netdev->features = (NETIF_F_SG | NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_RXHASH | NETIF_F_RXCSUM | NETIF_F_HW_CSUM); /* Set user-changeable features (subset of all device features) */ netdev->hw_features = netdev->features; netdev->hw_features |= NETIF_F_RXFCS; netdev->priv_flags |= IFF_SUPP_NOFCS; netdev->hw_features |= NETIF_F_RXALL; if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER; netdev->vlan_features |= (NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_HW_CSUM); netdev->priv_flags |= IFF_UNICAST_FLT; if (pci_using_dac) { netdev->features |= NETIF_F_HIGHDMA; netdev->vlan_features |= NETIF_F_HIGHDMA; } if (e1000e_enable_mng_pass_thru(&adapter->hw)) adapter->flags |= FLAG_MNG_PT_ENABLED; /* before reading the NVM, reset the controller to * put the device in a known good starting state */ adapter->hw.mac.ops.reset_hw(&adapter->hw); /* systems with ASPM and others may see the checksum fail on the first * attempt. Let's give it a few tries */ for (i = 0;; i++) { if (e1000_validate_nvm_checksum(&adapter->hw) >= 0) break; if (i == 2) { dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n"); err = -EIO; goto err_eeprom; } } e1000_eeprom_checks(adapter); /* copy the MAC address */ if (e1000e_read_mac_addr(&adapter->hw)) dev_err(&pdev->dev, "NVM Read Error while reading MAC address\n"); memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len); if (!is_valid_ether_addr(netdev->dev_addr)) { dev_err(&pdev->dev, "Invalid MAC Address: %pM\n", netdev->dev_addr); err = -EIO; goto err_eeprom; } init_timer(&adapter->watchdog_timer); adapter->watchdog_timer.function = e1000_watchdog; adapter->watchdog_timer.data = (unsigned long)adapter; init_timer(&adapter->phy_info_timer); adapter->phy_info_timer.function = e1000_update_phy_info; adapter->phy_info_timer.data = (unsigned long)adapter; INIT_WORK(&adapter->reset_task, e1000_reset_task); INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task); INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround); INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task); INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang); /* Initialize link parameters. User can change them with ethtool */ adapter->hw.mac.autoneg = 1; adapter->fc_autoneg = true; adapter->hw.fc.requested_mode = e1000_fc_default; adapter->hw.fc.current_mode = e1000_fc_default; adapter->hw.phy.autoneg_advertised = 0x2f; /* Initial Wake on LAN setting - If APM wake is enabled in * the EEPROM, enable the ACPI Magic Packet filter */ if (adapter->flags & FLAG_APME_IN_WUC) { /* APME bit in EEPROM is mapped to WUC.APME */ eeprom_data = er32(WUC); eeprom_apme_mask = E1000_WUC_APME; if ((hw->mac.type > e1000_ich10lan) && (eeprom_data & E1000_WUC_PHY_WAKE)) adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP; } else if (adapter->flags & FLAG_APME_IN_CTRL3) { if (adapter->flags & FLAG_APME_CHECK_PORT_B && (adapter->hw.bus.func == 1)) e1000_read_nvm(&adapter->hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data); else e1000_read_nvm(&adapter->hw, NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data); } /* fetch WoL from EEPROM */ if (eeprom_data & eeprom_apme_mask) adapter->eeprom_wol |= E1000_WUFC_MAG; /* now that we have the eeprom settings, apply the special cases * where the eeprom may be wrong or the board simply won't support * wake on lan on a particular port */ if (!(adapter->flags & FLAG_HAS_WOL)) adapter->eeprom_wol = 0; /* initialize the wol settings based on the eeprom settings */ adapter->wol = adapter->eeprom_wol; /* make sure adapter isn't asleep if manageability is enabled */ if (adapter->wol || (adapter->flags & FLAG_MNG_PT_ENABLED) || (hw->mac.ops.check_mng_mode(hw))) device_wakeup_enable(&pdev->dev); /* save off EEPROM version number */ e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers); /* reset the hardware with the new settings */ e1000e_reset(adapter); /* If the controller has AMT, do not set DRV_LOAD until the interface * is up. For all other cases, let the f/w know that the h/w is now * under the control of the driver. */ if (!(adapter->flags & FLAG_HAS_AMT)) e1000e_get_hw_control(adapter); strlcpy(netdev->name, "eth%d", sizeof(netdev->name)); err = register_netdev(netdev); if (err) goto err_register; /* carrier off reporting is important to ethtool even BEFORE open */ netif_carrier_off(netdev); /* init PTP hardware clock */ e1000e_ptp_init(adapter); e1000_print_device_info(adapter); if (pci_dev_run_wake(pdev)) pm_runtime_put_noidle(&pdev->dev); return 0; err_register: if (!(adapter->flags & FLAG_HAS_AMT)) e1000e_release_hw_control(adapter); err_eeprom: if (hw->phy.ops.check_reset_block && !hw->phy.ops.check_reset_block(hw)) e1000_phy_hw_reset(&adapter->hw); err_hw_init: kfree(adapter->tx_ring); kfree(adapter->rx_ring); err_sw_init: if (adapter->hw.flash_address) iounmap(adapter->hw.flash_address); e1000e_reset_interrupt_capability(adapter); err_flashmap: iounmap(adapter->hw.hw_addr); err_ioremap: free_netdev(netdev); err_alloc_etherdev: pci_release_selected_regions(pdev, pci_select_bars(pdev, IORESOURCE_MEM)); err_pci_reg: err_dma: pci_disable_device(pdev); return err; } /** * e1000_remove - Device Removal Routine * @pdev: PCI device information struct * * e1000_remove is called by the PCI subsystem to alert the driver * that it should release a PCI device. The could be caused by a * Hot-Plug event, or because the driver is going to be removed from * memory. **/ static void e1000_remove(struct pci_dev *pdev) { struct net_device *netdev = pci_get_drvdata(pdev); struct e1000_adapter *adapter = netdev_priv(netdev); bool down = test_bit(__E1000_DOWN, &adapter->state); e1000e_ptp_remove(adapter); /* The timers may be rescheduled, so explicitly disable them * from being rescheduled. */ if (!down) set_bit(__E1000_DOWN, &adapter->state); del_timer_sync(&adapter->watchdog_timer); del_timer_sync(&adapter->phy_info_timer); cancel_work_sync(&adapter->reset_task); cancel_work_sync(&adapter->watchdog_task); cancel_work_sync(&adapter->downshift_task); cancel_work_sync(&adapter->update_phy_task); cancel_work_sync(&adapter->print_hang_task); if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) { cancel_work_sync(&adapter->tx_hwtstamp_work); if (adapter->tx_hwtstamp_skb) { dev_kfree_skb_any(adapter->tx_hwtstamp_skb); adapter->tx_hwtstamp_skb = NULL; } } if (!(netdev->flags & IFF_UP)) e1000_power_down_phy(adapter); /* Don't lie to e1000_close() down the road. */ if (!down) clear_bit(__E1000_DOWN, &adapter->state); unregister_netdev(netdev); if (pci_dev_run_wake(pdev)) pm_runtime_get_noresume(&pdev->dev); /* Release control of h/w to f/w. If f/w is AMT enabled, this * would have already happened in close and is redundant. */ e1000e_release_hw_control(adapter); e1000e_reset_interrupt_capability(adapter); kfree(adapter->tx_ring); kfree(adapter->rx_ring); iounmap(adapter->hw.hw_addr); if (adapter->hw.flash_address) iounmap(adapter->hw.flash_address); pci_release_selected_regions(pdev, pci_select_bars(pdev, IORESOURCE_MEM)); free_netdev(netdev); /* AER disable */ pci_disable_pcie_error_reporting(pdev); pci_disable_device(pdev); } /* PCI Error Recovery (ERS) */ static const struct pci_error_handlers e1000_err_handler = { .error_detected = e1000_io_error_detected, .slot_reset = e1000_io_slot_reset, .resume = e1000_io_resume, }; static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = { { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT), board_80003es2lan }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT), board_80003es2lan }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT), board_80003es2lan }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT), board_80003es2lan }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_LM), board_pch_lpt }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_V), board_pch_lpt }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM2), board_pch_lpt }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V2), board_pch_lpt }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM3), board_pch_lpt }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V3), board_pch_lpt }, { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */ }; MODULE_DEVICE_TABLE(pci, e1000_pci_tbl); static const struct dev_pm_ops e1000_pm_ops = { SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume) SET_RUNTIME_PM_OPS(e1000_runtime_suspend, e1000_runtime_resume, e1000_idle) }; /* PCI Device API Driver */ static struct pci_driver e1000_driver = { .name = e1000e_driver_name, .id_table = e1000_pci_tbl, .probe = e1000_probe, .remove = e1000_remove, .driver = { .pm = &e1000_pm_ops, }, .shutdown = e1000_shutdown, .err_handler = &e1000_err_handler }; /** * e1000_init_module - Driver Registration Routine * * e1000_init_module is the first routine called when the driver is * loaded. All it does is register with the PCI subsystem. **/ static int __init e1000_init_module(void) { int ret; pr_info("Intel(R) PRO/1000 Network Driver - %s\n", e1000e_driver_version); pr_info("Copyright(c) 1999 - 2013 Intel Corporation.\n"); ret = pci_register_driver(&e1000_driver); return ret; } module_init(e1000_init_module); /** * e1000_exit_module - Driver Exit Cleanup Routine * * e1000_exit_module is called just before the driver is removed * from memory. **/ static void __exit e1000_exit_module(void) { pci_unregister_driver(&e1000_driver); } module_exit(e1000_exit_module); MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>"); MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver"); MODULE_LICENSE("GPL"); MODULE_VERSION(DRV_VERSION); /* netdev.c */
gpl-2.0
playfulgod/android_kernel_lge_kk_zee
drivers/broadcast/oneseg/tcc3535/Tcc353xDriver/driver/src/tcc353x_mailbox.c
149
10874
/**************************************************************************** * FileName : tcc353x_mailbox.c * Description : mailbox control Function **************************************************************************** * * TCC Version 1.0 * Copyright (c) Telechips Inc. * All rights reserved This source code contains confidential information of Telechips. Any unauthorized use without a written permission of Telechips including not limited to re- distribution in source or binary form is strictly prohibited. This source code is provided "AS IS" and nothing contained in this source code shall constitute any express or implied warranty of any kind, including without limitation, any warranty of merchantability, fitness for a particular purpose or non-infringement of any patent, copyright or other third party intellectual property right. No warranty is made, express or implied, regarding the information's accuracy, completeness, or performance. In no event shall Telechips be liable for any claim, damages or other liability arising from, out of or in connection with this source code or the use in the source code. This source code is provided subject to the terms of a Mutual Non-Disclosure Agreement between Telechips and Company. * ****************************************************************************/ #include "tcc353x_mailbox.h" #include "tcc353x_register_control.h" #include "tcpal_os.h" extern TcpalSemaphore_t Tcc353xMailboxSema[TCC353X_MAX][TCC353X_DIVERSITY_MAX]; extern TcpalSemaphore_t Tcc353xOpMailboxSema[TCC353X_MAX][TCC353X_DIVERSITY_MAX]; #define MAXWAIT_MAILBOX 1000 /* about 1sec */ static I32U Tcc353xMailboxStatus(I32U input, I32U WFlag) { static I32U stat; if (WFlag) stat = input; else return stat; return stat; } static void Tcc353xMailboxTx(Tcc353xHandle_t * _handle, I32S rw_flag, I32U cmd, I32U * data_array, I32U word_cnt, I32S * pmailboxok) { I32U temp; I08U op_debug[3]; I32U i; I08U wstat; TcpalTime_t CurrTime; pmailboxok[0] = 1; Tcc353xSetRegMailboxControl(_handle, TC3XREG_MAIL_INIT); temp = (MB_HOSTMAIL << 24) | (word_cnt << 20) | (rw_flag << 19) | (MB_ERR_OK << 16) | cmd; Tcc353xSetRegMailboxFifoWindow(_handle, (I08U *) (&temp), 4); for (i = 0; i < (unsigned int) word_cnt; i++) { Tcc353xSetRegMailboxFifoWindow(_handle, (I08U *) (&data_array[i]), 4); } Tcc353xMailboxStatus(cmd, 1); Tcc353xSetRegMailboxControl(_handle, TC3XREG_MAIL_HOSTMAILPOST); CurrTime = TcpalGetCurrentTimeCount_ms(); do { if (!(_handle->sysEnValue & TC3XREG_SYS_EN_DSP)) { /* Exceptional Error */ TcpalPrintErr((I08S *) "[TCC353X] [Error] MailBox - OP Disabled!!! \n"); return; } if (TcpalGetTimeIntervalCount_ms(CurrTime) > MAXWAIT_MAILBOX) { Tcc353xGetRegOpDebug(_handle, op_debug, _LOCK_); TcpalPrintErr((I08S *) "[TCC353X] [Error] MailBox Write Timeout [Command:0x%x] [OP:0x%02x%02x%02x]!!! \n", cmd, op_debug[0], op_debug[1], op_debug[2]); pmailboxok[0] = -1; return; } TcpalmDelay(1); Tcc353xGetRegMailboxFifoWriteStatus(_handle, &wstat); } while (!(wstat & 0x01)); } static I32S Tcc353xMailboxRx(Tcc353xHandle_t * _handle, mailbox_t * p_mailbox, I32S * pmailboxok) { I08U temp; I08U op_debug[3]; I32S i; I32S total_word_num; I32S total_byte_num; I32U cmd; TcpalTime_t CurrTime; pmailboxok[0] = 1; i = 0; CurrTime = TcpalGetCurrentTimeCount_ms(); do { if (!(_handle->sysEnValue & TC3XREG_SYS_EN_DSP)) { /* Exceptional Error */ TcpalPrintErr((I08S *) "[TCC353X] [Error] MailBox - OP Disabled!!! \n"); return TCC353X_RETURN_FAIL; } Tcc353xGetRegMailboxFifoReadStatus(_handle, &temp); if (TcpalGetTimeIntervalCount_ms(CurrTime) > MAXWAIT_MAILBOX) { pmailboxok[0] = -1; Tcc353xGetRegOpDebug(_handle, op_debug, _LOCK_); TcpalPrintErr((I08S *) "[TCC353X] [Error] MailBox Read Timeout[OP:0x%02x%02x%02x]!!! \n", op_debug[0], op_debug[1], op_debug[2]); return TCC353X_RETURN_FAIL; } TcpalmDelay(1); } while ((temp & 0xfc) < 3); total_byte_num = (temp >> 2) & 0x3f; total_word_num = (total_byte_num >> 2); /* LSB First */ Tcc353xGetRegMailboxFifoWindow(_handle, (I08U *) (&cmd), 1 << 2); Tcc353xGetRegMailboxFifoWindow(_handle, (I08U *) (&p_mailbox->data_array[0]), (total_word_num - 1) << 2); /* mark check */ if ((cmd >> 24) != MB_SLAVEMAIL) { I32U mailstat; TcpalPrintErr((I08S *) "[TCC353X] Mailbox Error Cmd[0x%x] Total Byte Num[0x%x]\n", cmd, total_byte_num); for (i = 0; i < total_word_num - 1; i++) { TcpalPrintErr((I08S *) "[TCC353X] data_array[%d][0x%x]\n", i, p_mailbox->data_array[i]); } mailstat = Tcc353xMailboxStatus(cmd, 0); TcpalPrintErr((I08S *) "[TCC353X] [MBERR]Mark Error[0x%x][ori:0x%x]\n", cmd, mailstat); TcpalPrintErr((I08S *) "[TCC353X] [MBERR]please check the header.\n"); pmailboxok[0] = -1; return TCC353X_RETURN_FAIL; } p_mailbox->cmd = cmd & 0xffff; p_mailbox->word_cnt = total_word_num - 1; p_mailbox->status = ((cmd >> 16) & 0x07); if (p_mailbox->status != 0) { TcpalPrintErr((I08S *) "[TCC353X] [MBERR] Error Message : 0x%0x[cmd 0x%x][totalnum 0x%x]\n", p_mailbox->status, cmd, total_word_num); pmailboxok[0] = -1; return TCC353X_RETURN_FAIL; } return TCC353X_RETURN_SUCCESS; } static I32S Tcc353xMailboxTxOnlySub(Tcc353xHandle_t * _handle, I32U cmd, I32U * data_array, I32S word_cnt) { I32S mailboxok; TcpalSemaphoreLock(&Tcc353xMailboxSema[_handle->moduleIndex] [_handle->diversityIndex]); Tcc353xMailboxTx(_handle, MB_CMD_WRITE, cmd, data_array, word_cnt, &mailboxok); TcpalSemaphoreUnLock(&Tcc353xMailboxSema[_handle->moduleIndex] [_handle->diversityIndex]); if (mailboxok == -1) { TcpalPrintErr((I08S *) "[TCC353X] [ERR] MailboxTX Error.\n"); return TCC353X_RETURN_FAIL; } return TCC353X_RETURN_SUCCESS; } I32S Tcc353xMailboxTxOnly(Tcc353xHandle_t * _handle, I32U cmd, I32U * data_array, I32S word_cnt) { I32S ret = TCC353X_RETURN_SUCCESS; TcpalSemaphoreLock(&Tcc353xOpMailboxSema[_handle->moduleIndex] [_handle->diversityIndex]); if (_handle->mailboxErrorCounter > MAX_MAILBOX_RETRY) { TcpalPrintErr((I08S *) "[TCC353X] [M] Critical Mailbox Control Error!!! Can't recover!!!\n"); _handle->mailboxErrorCounter = 0; TcpalSemaphoreUnLock(&Tcc353xOpMailboxSema [_handle-> moduleIndex] [_handle->diversityIndex]); return TCC353X_RETURN_FAIL; } ret = Tcc353xMailboxTxOnlySub(_handle, cmd, data_array, word_cnt); if (ret == TCC353X_RETURN_FAIL) { TcpalPrintErr((I08S *) "[TCC353X] [ERR] MailboxTX [cmd:0x%x]\n", cmd); /* one more time set and give up */ TcpalPrintErr((I08S *) "[TCC353X] [M] Mailbox Retry\n"); ret = Tcc353xMailboxTxOnlySub(_handle, cmd, data_array, word_cnt); if (ret == TCC353X_RETURN_FAIL) { TcpalPrintErr((I08S *) "[TCC353X] [ERR] Can't recover mailbox. Please Retune!\n"); _handle->mailboxErrorCounter = 0; TcpalSemaphoreUnLock(&Tcc353xOpMailboxSema [_handle->moduleIndex] [_handle->diversityIndex]); return TCC353X_RETURN_FAIL; } } _handle->mailboxErrorCounter = 0; TcpalSemaphoreUnLock(&Tcc353xOpMailboxSema[_handle->moduleIndex] [_handle->diversityIndex]); return ret; } static I32S Tcc353xMailboxTxRxSub(Tcc353xHandle_t * _handle, mailbox_t * p_mailbox, I32U cmd, I32U * data_array, I32S word_cnt) { I32S ret = TCC353X_RETURN_SUCCESS; I32S mailboxok; TcpalSemaphoreLock(&Tcc353xMailboxSema[_handle->moduleIndex] [_handle->diversityIndex]); Tcc353xMailboxTx(_handle, MB_CMD_READ, cmd, data_array, word_cnt, &mailboxok); if (mailboxok == -1) { TcpalSemaphoreUnLock(&Tcc353xMailboxSema [_handle-> moduleIndex] [_handle->diversityIndex]); TcpalPrintErr((I08S *) "[TCC353X] [ERR] MailboxTXRX Error. cmd[%x]\n", cmd); return TCC353X_RETURN_FAIL; } else { ret = Tcc353xMailboxRx(_handle, p_mailbox, &mailboxok); if (mailboxok == -1) { TcpalSemaphoreUnLock(&Tcc353xMailboxSema [_handle->moduleIndex] [_handle->diversityIndex]); TcpalPrintErr((I08S *) "[TCC353X] [ERR] MailboxTXRX Error. cmd[%x]\n", cmd); return TCC353X_RETURN_FAIL; } } TcpalSemaphoreUnLock(&Tcc353xMailboxSema[_handle->moduleIndex] [_handle->diversityIndex]); return ret; } I32S Tcc353xMailboxTxRx(Tcc353xHandle_t * _handle, mailbox_t * p_mailbox, I32U cmd, I32U * data_array, I32S word_cnt) { I32S ret = TCC353X_RETURN_SUCCESS; TcpalSemaphoreLock(&Tcc353xOpMailboxSema[_handle->moduleIndex] [_handle->diversityIndex]); if (_handle->mailboxErrorCounter > MAX_MAILBOX_RETRY) { TcpalPrintErr((I08S *) "[TCC353X] [M] Critical Mailbox Control Error!!! Can't recover!!!\n"); _handle->mailboxErrorCounter = 0; TcpalSemaphoreUnLock(&Tcc353xOpMailboxSema [_handle-> moduleIndex] [_handle->diversityIndex]); return TCC353X_RETURN_FAIL; } ret = Tcc353xMailboxTxRxSub(_handle, p_mailbox, cmd, data_array, word_cnt); if (ret == TCC353X_RETURN_FAIL) { TcpalPrintErr((I08S *) "[TCC353X] [ERR] MailboxTXRX [cmd:0x%x]\n", cmd); /* one more time set and give up */ TcpalPrintErr((I08S *) "[TCC353X] [M] Mailbox Retry\n"); ret = Tcc353xMailboxTxRxSub(_handle, p_mailbox, cmd, data_array, word_cnt); if (ret == TCC353X_RETURN_FAIL) { TcpalPrintErr((I08S *) "[TCC353X] [ERR] Can't recover mailbox. Please Retune!\n"); _handle->mailboxErrorCounter = 0; TcpalSemaphoreUnLock(&Tcc353xOpMailboxSema [_handle->moduleIndex] [_handle->diversityIndex]); return TCC353X_RETURN_FAIL; } } _handle->mailboxErrorCounter = 0; TcpalSemaphoreUnLock(&Tcc353xOpMailboxSema[_handle->moduleIndex] [_handle->diversityIndex]); return ret; } I32U Tcc353xGetAccessMail(Tcc353xHandle_t * _handle) { I32U access_mail; Tcc353xGetRegMailboxFifoWindow(_handle, (I08U *) (&access_mail), 1 << 2); if (access_mail != 0x1ACCE551) TcpalPrintLog((I08S *) "[TCC353X] [%d][%d] AccessMail Error[0x%08x]\n", _handle->moduleIndex, _handle->diversityIndex, access_mail); return access_mail; }
gpl-2.0
poopgiggle/j1939kernel
arch/x86/kernel/microcode_intel.c
149
13642
/* * Intel CPU Microcode Update Driver for Linux * * Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk> * 2006 Shaohua Li <shaohua.li@intel.com> * * This driver allows to upgrade microcode on Intel processors * belonging to IA-32 family - PentiumPro, Pentium II, * Pentium III, Xeon, Pentium 4, etc. * * Reference: Section 8.11 of Volume 3a, IA-32 Intel? Architecture * Software Developer's Manual * Order Number 253668 or free download from: * * http://developer.intel.com/Assets/PDF/manual/253668.pdf * * For more information, go to http://www.urbanmyth.org/microcode * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version * 2 of the License, or (at your option) any later version. * * 1.0 16 Feb 2000, Tigran Aivazian <tigran@sco.com> * Initial release. * 1.01 18 Feb 2000, Tigran Aivazian <tigran@sco.com> * Added read() support + cleanups. * 1.02 21 Feb 2000, Tigran Aivazian <tigran@sco.com> * Added 'device trimming' support. open(O_WRONLY) zeroes * and frees the saved copy of applied microcode. * 1.03 29 Feb 2000, Tigran Aivazian <tigran@sco.com> * Made to use devfs (/dev/cpu/microcode) + cleanups. * 1.04 06 Jun 2000, Simon Trimmer <simon@veritas.com> * Added misc device support (now uses both devfs and misc). * Added MICROCODE_IOCFREE ioctl to clear memory. * 1.05 09 Jun 2000, Simon Trimmer <simon@veritas.com> * Messages for error cases (non Intel & no suitable microcode). * 1.06 03 Aug 2000, Tigran Aivazian <tigran@veritas.com> * Removed ->release(). Removed exclusive open and status bitmap. * Added microcode_rwsem to serialize read()/write()/ioctl(). * Removed global kernel lock usage. * 1.07 07 Sep 2000, Tigran Aivazian <tigran@veritas.com> * Write 0 to 0x8B msr and then cpuid before reading revision, * so that it works even if there were no update done by the * BIOS. Otherwise, reading from 0x8B gives junk (which happened * to be 0 on my machine which is why it worked even when I * disabled update by the BIOS) * Thanks to Eric W. Biederman <ebiederman@lnxi.com> for the fix. * 1.08 11 Dec 2000, Richard Schaal <richard.schaal@intel.com> and * Tigran Aivazian <tigran@veritas.com> * Intel Pentium 4 processor support and bugfixes. * 1.09 30 Oct 2001, Tigran Aivazian <tigran@veritas.com> * Bugfix for HT (Hyper-Threading) enabled processors * whereby processor resources are shared by all logical processors * in a single CPU package. * 1.10 28 Feb 2002 Asit K Mallick <asit.k.mallick@intel.com> and * Tigran Aivazian <tigran@veritas.com>, * Serialize updates as required on HT processors due to * speculative nature of implementation. * 1.11 22 Mar 2002 Tigran Aivazian <tigran@veritas.com> * Fix the panic when writing zero-length microcode chunk. * 1.12 29 Sep 2003 Nitin Kamble <nitin.a.kamble@intel.com>, * Jun Nakajima <jun.nakajima@intel.com> * Support for the microcode updates in the new format. * 1.13 10 Oct 2003 Tigran Aivazian <tigran@veritas.com> * Removed ->read() method and obsoleted MICROCODE_IOCFREE ioctl * because we no longer hold a copy of applied microcode * in kernel memory. * 1.14 25 Jun 2004 Tigran Aivazian <tigran@veritas.com> * Fix sigmatch() macro to handle old CPUs with pf == 0. * Thanks to Stuart Swales for pointing out this bug. */ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt #include <linux/firmware.h> #include <linux/uaccess.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/vmalloc.h> #include <asm/microcode.h> #include <asm/processor.h> #include <asm/msr.h> MODULE_DESCRIPTION("Microcode Update Driver"); MODULE_AUTHOR("Tigran Aivazian <tigran@aivazian.fsnet.co.uk>"); MODULE_LICENSE("GPL"); struct microcode_header_intel { unsigned int hdrver; unsigned int rev; unsigned int date; unsigned int sig; unsigned int cksum; unsigned int ldrver; unsigned int pf; unsigned int datasize; unsigned int totalsize; unsigned int reserved[3]; }; struct microcode_intel { struct microcode_header_intel hdr; unsigned int bits[0]; }; /* microcode format is extended from prescott processors */ struct extended_signature { unsigned int sig; unsigned int pf; unsigned int cksum; }; struct extended_sigtable { unsigned int count; unsigned int cksum; unsigned int reserved[3]; struct extended_signature sigs[0]; }; #define DEFAULT_UCODE_DATASIZE (2000) #define MC_HEADER_SIZE (sizeof(struct microcode_header_intel)) #define DEFAULT_UCODE_TOTALSIZE (DEFAULT_UCODE_DATASIZE + MC_HEADER_SIZE) #define EXT_HEADER_SIZE (sizeof(struct extended_sigtable)) #define EXT_SIGNATURE_SIZE (sizeof(struct extended_signature)) #define DWSIZE (sizeof(u32)) #define get_totalsize(mc) \ (((struct microcode_intel *)mc)->hdr.totalsize ? \ ((struct microcode_intel *)mc)->hdr.totalsize : \ DEFAULT_UCODE_TOTALSIZE) #define get_datasize(mc) \ (((struct microcode_intel *)mc)->hdr.datasize ? \ ((struct microcode_intel *)mc)->hdr.datasize : DEFAULT_UCODE_DATASIZE) #define sigmatch(s1, s2, p1, p2) \ (((s1) == (s2)) && (((p1) & (p2)) || (((p1) == 0) && ((p2) == 0)))) #define exttable_size(et) ((et)->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE) static int collect_cpu_info(int cpu_num, struct cpu_signature *csig) { struct cpuinfo_x86 *c = &cpu_data(cpu_num); unsigned int val[2]; memset(csig, 0, sizeof(*csig)); csig->sig = cpuid_eax(0x00000001); if ((c->x86_model >= 5) || (c->x86 > 6)) { /* get processor flags from MSR 0x17 */ rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]); csig->pf = 1 << ((val[1] >> 18) & 7); } csig->rev = c->microcode; pr_info("CPU%d sig=0x%x, pf=0x%x, revision=0x%x\n", cpu_num, csig->sig, csig->pf, csig->rev); return 0; } static inline int update_match_cpu(struct cpu_signature *csig, int sig, int pf) { return (!sigmatch(sig, csig->sig, pf, csig->pf)) ? 0 : 1; } static inline int update_match_revision(struct microcode_header_intel *mc_header, int rev) { return (mc_header->rev <= rev) ? 0 : 1; } static int microcode_sanity_check(void *mc) { unsigned long total_size, data_size, ext_table_size; struct microcode_header_intel *mc_header = mc; struct extended_sigtable *ext_header = NULL; int sum, orig_sum, ext_sigcount = 0, i; struct extended_signature *ext_sig; total_size = get_totalsize(mc_header); data_size = get_datasize(mc_header); if (data_size + MC_HEADER_SIZE > total_size) { pr_err("error! Bad data size in microcode data file\n"); return -EINVAL; } if (mc_header->ldrver != 1 || mc_header->hdrver != 1) { pr_err("error! Unknown microcode update format\n"); return -EINVAL; } ext_table_size = total_size - (MC_HEADER_SIZE + data_size); if (ext_table_size) { if ((ext_table_size < EXT_HEADER_SIZE) || ((ext_table_size - EXT_HEADER_SIZE) % EXT_SIGNATURE_SIZE)) { pr_err("error! Small exttable size in microcode data file\n"); return -EINVAL; } ext_header = mc + MC_HEADER_SIZE + data_size; if (ext_table_size != exttable_size(ext_header)) { pr_err("error! Bad exttable size in microcode data file\n"); return -EFAULT; } ext_sigcount = ext_header->count; } /* check extended table checksum */ if (ext_table_size) { int ext_table_sum = 0; int *ext_tablep = (int *)ext_header; i = ext_table_size / DWSIZE; while (i--) ext_table_sum += ext_tablep[i]; if (ext_table_sum) { pr_warning("aborting, bad extended signature table checksum\n"); return -EINVAL; } } /* calculate the checksum */ orig_sum = 0; i = (MC_HEADER_SIZE + data_size) / DWSIZE; while (i--) orig_sum += ((int *)mc)[i]; if (orig_sum) { pr_err("aborting, bad checksum\n"); return -EINVAL; } if (!ext_table_size) return 0; /* check extended signature checksum */ for (i = 0; i < ext_sigcount; i++) { ext_sig = (void *)ext_header + EXT_HEADER_SIZE + EXT_SIGNATURE_SIZE * i; sum = orig_sum - (mc_header->sig + mc_header->pf + mc_header->cksum) + (ext_sig->sig + ext_sig->pf + ext_sig->cksum); if (sum) { pr_err("aborting, bad checksum\n"); return -EINVAL; } } return 0; } /* * return 0 - no update found * return 1 - found update */ static int get_matching_microcode(struct cpu_signature *cpu_sig, void *mc, int rev) { struct microcode_header_intel *mc_header = mc; struct extended_sigtable *ext_header; unsigned long total_size = get_totalsize(mc_header); int ext_sigcount, i; struct extended_signature *ext_sig; if (!update_match_revision(mc_header, rev)) return 0; if (update_match_cpu(cpu_sig, mc_header->sig, mc_header->pf)) return 1; /* Look for ext. headers: */ if (total_size <= get_datasize(mc_header) + MC_HEADER_SIZE) return 0; ext_header = mc + get_datasize(mc_header) + MC_HEADER_SIZE; ext_sigcount = ext_header->count; ext_sig = (void *)ext_header + EXT_HEADER_SIZE; for (i = 0; i < ext_sigcount; i++) { if (update_match_cpu(cpu_sig, ext_sig->sig, ext_sig->pf)) return 1; ext_sig++; } return 0; } static int apply_microcode(int cpu) { struct microcode_intel *mc_intel; struct ucode_cpu_info *uci; unsigned int val[2]; int cpu_num = raw_smp_processor_id(); struct cpuinfo_x86 *c = &cpu_data(cpu_num); uci = ucode_cpu_info + cpu; mc_intel = uci->mc; /* We should bind the task to the CPU */ BUG_ON(cpu_num != cpu); if (mc_intel == NULL) return 0; /* write microcode via MSR 0x79 */ wrmsr(MSR_IA32_UCODE_WRITE, (unsigned long) mc_intel->bits, (unsigned long) mc_intel->bits >> 16 >> 16); wrmsr(MSR_IA32_UCODE_REV, 0, 0); /* As documented in the SDM: Do a CPUID 1 here */ sync_core(); /* get the current revision from MSR 0x8B */ rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]); if (val[1] != mc_intel->hdr.rev) { pr_err("CPU%d update to revision 0x%x failed\n", cpu_num, mc_intel->hdr.rev); return -1; } pr_info("CPU%d updated to revision 0x%x, date = %04x-%02x-%02x\n", cpu_num, val[1], mc_intel->hdr.date & 0xffff, mc_intel->hdr.date >> 24, (mc_intel->hdr.date >> 16) & 0xff); uci->cpu_sig.rev = val[1]; c->microcode = val[1]; return 0; } static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size, int (*get_ucode_data)(void *, const void *, size_t)) { struct ucode_cpu_info *uci = ucode_cpu_info + cpu; u8 *ucode_ptr = data, *new_mc = NULL, *mc = NULL; int new_rev = uci->cpu_sig.rev; unsigned int leftover = size; enum ucode_state state = UCODE_OK; unsigned int curr_mc_size = 0; while (leftover) { struct microcode_header_intel mc_header; unsigned int mc_size; if (get_ucode_data(&mc_header, ucode_ptr, sizeof(mc_header))) break; mc_size = get_totalsize(&mc_header); if (!mc_size || mc_size > leftover) { pr_err("error! Bad data in microcode data file\n"); break; } /* For performance reasons, reuse mc area when possible */ if (!mc || mc_size > curr_mc_size) { vfree(mc); mc = vmalloc(mc_size); if (!mc) break; curr_mc_size = mc_size; } if (get_ucode_data(mc, ucode_ptr, mc_size) || microcode_sanity_check(mc) < 0) { break; } if (get_matching_microcode(&uci->cpu_sig, mc, new_rev)) { vfree(new_mc); new_rev = mc_header.rev; new_mc = mc; mc = NULL; /* trigger new vmalloc */ } ucode_ptr += mc_size; leftover -= mc_size; } vfree(mc); if (leftover) { vfree(new_mc); state = UCODE_ERROR; goto out; } if (!new_mc) { state = UCODE_NFOUND; goto out; } vfree(uci->mc); uci->mc = (struct microcode_intel *)new_mc; pr_debug("CPU%d found a matching microcode update with version 0x%x (current=0x%x)\n", cpu, new_rev, uci->cpu_sig.rev); out: return state; } static int get_ucode_fw(void *to, const void *from, size_t n) { memcpy(to, from, n); return 0; } static enum ucode_state request_microcode_fw(int cpu, struct device *device, bool refresh_fw) { char name[30]; struct cpuinfo_x86 *c = &cpu_data(cpu); const struct firmware *firmware; enum ucode_state ret; sprintf(name, "intel-ucode/%02x-%02x-%02x", c->x86, c->x86_model, c->x86_mask); if (request_firmware(&firmware, name, device)) { pr_debug("data file %s load failed\n", name); return UCODE_NFOUND; } ret = generic_load_microcode(cpu, (void *)firmware->data, firmware->size, &get_ucode_fw); release_firmware(firmware); return ret; } static int get_ucode_user(void *to, const void *from, size_t n) { return copy_from_user(to, from, n); } static enum ucode_state request_microcode_user(int cpu, const void __user *buf, size_t size) { return generic_load_microcode(cpu, (void *)buf, size, &get_ucode_user); } static void microcode_fini_cpu(int cpu) { struct ucode_cpu_info *uci = ucode_cpu_info + cpu; vfree(uci->mc); uci->mc = NULL; } static struct microcode_ops microcode_intel_ops = { .request_microcode_user = request_microcode_user, .request_microcode_fw = request_microcode_fw, .collect_cpu_info = collect_cpu_info, .apply_microcode = apply_microcode, .microcode_fini_cpu = microcode_fini_cpu, }; struct microcode_ops * __init init_intel_microcode(void) { struct cpuinfo_x86 *c = &cpu_data(0); if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 || cpu_has(c, X86_FEATURE_IA64)) { pr_err("Intel CPU family 0x%x not supported\n", c->x86); return NULL; } return &microcode_intel_ops; }
gpl-2.0
djwong/linux-xfs-dev
drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm.host.c
149
6491
/* * Support for Intel Camera Imaging ISP subsystem. * Copyright (c) 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, * version 2, as published by the Free Software Foundation. * * This program is distributed in the hope it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ #include "type_support.h" #include "ia_css_bnlm.host.h" #ifndef IA_CSS_NO_DEBUG #include "ia_css_debug.h" /* ia_css_debug_dtrace() */ #endif #include <assert_support.h> #define BNLM_DIV_LUT_SIZE (12) static const int32_t div_lut_nearests[BNLM_DIV_LUT_SIZE] = { 0, 454, 948, 1484, 2070, 2710, 3412, 4184, 5035, 5978, 7025, 8191 }; static const int32_t div_lut_slopes[BNLM_DIV_LUT_SIZE] = { -7760, -6960, -6216, -5536, -4912, -4344, -3832, -3360, -2936, -2552, -2208, -2208 }; static const int32_t div_lut_intercepts[BNLM_DIV_LUT_SIZE] = { 8184, 7752, 7336, 6928, 6536, 6152, 5776, 5416, 5064, 4728, 4408, 4408 }; /* Encodes a look-up table from BNLM public parameters to vmem parameters. * Input: * lut : bnlm_lut struct containing encoded vmem parameters look-up table * lut_thr : array containing threshold values for lut * lut_val : array containing output values related to lut_thr * lut_size: Size of lut_val array */ static inline void bnlm_lut_encode(struct bnlm_lut *lut, const int32_t *lut_thr, const int32_t *lut_val, const uint32_t lut_size) { u32 blk, i; const u32 block_size = 16; const u32 total_blocks = ISP_VEC_NELEMS / block_size; /* Create VMEM LUTs from the threshold and value arrays. * * Min size of the LUT is 2 entries. * * Max size of the LUT is 16 entries, so that the LUT can fit into a * single group of 16 elements inside a vector. * Then these elements are copied into other groups inside the same * vector. If the LUT size is less than 16, then remaining elements are * set to 0. */ assert((lut_size >= 2) && (lut_size <= block_size)); /* array lut_thr has (lut_size-1) entries */ for (i = 0; i < lut_size-2; i++) { /* Check if the lut_thr is monotonically increasing */ assert(lut_thr[i] <= lut_thr[i+1]); } /* Initialize */ for (i = 0; i < total_blocks * block_size; i++) { lut->thr[0][i] = 0; lut->val[0][i] = 0; } /* Copy all data */ for (i = 0; i < lut_size - 1; i++) { lut->thr[0][i] = lut_thr[i]; lut->val[0][i] = lut_val[i]; } lut->val[0][i] = lut_val[i]; /* val has one more element than thr */ /* Copy data from first block to all blocks */ for (blk = 1; blk < total_blocks; blk++) { u32 blk_offset = blk * block_size; for (i = 1; i < lut_size; i++) { lut->thr[0][blk_offset + i] = lut->thr[0][i]; lut->val[0][blk_offset + i] = lut->val[0][i]; } } } /* * - Encodes BNLM public parameters into VMEM parameters * - Generates VMEM parameters which will needed internally ISP */ void ia_css_bnlm_vmem_encode( struct bnlm_vmem_params *to, const struct ia_css_bnlm_config *from, size_t size) { int i; (void)size; /* Initialize LUTs in VMEM parameters */ bnlm_lut_encode(&to->mu_root_lut, from->mu_root_lut_thr, from->mu_root_lut_val, 16); bnlm_lut_encode(&to->sad_norm_lut, from->sad_norm_lut_thr, from->sad_norm_lut_val, 16); bnlm_lut_encode(&to->sig_detail_lut, from->sig_detail_lut_thr, from->sig_detail_lut_val, 16); bnlm_lut_encode(&to->sig_rad_lut, from->sig_rad_lut_thr, from->sig_rad_lut_val, 16); bnlm_lut_encode(&to->rad_pow_lut, from->rad_pow_lut_thr, from->rad_pow_lut_val, 16); bnlm_lut_encode(&to->nl_0_lut, from->nl_0_lut_thr, from->nl_0_lut_val, 16); bnlm_lut_encode(&to->nl_1_lut, from->nl_1_lut_thr, from->nl_1_lut_val, 16); bnlm_lut_encode(&to->nl_2_lut, from->nl_2_lut_thr, from->nl_2_lut_val, 16); bnlm_lut_encode(&to->nl_3_lut, from->nl_3_lut_thr, from->nl_3_lut_val, 16); /* Initialize arrays in VMEM parameters */ memset(to->nl_th, 0, sizeof(to->nl_th)); to->nl_th[0][0] = from->nl_th[0]; to->nl_th[0][1] = from->nl_th[1]; to->nl_th[0][2] = from->nl_th[2]; memset(to->match_quality_max_idx, 0, sizeof(to->match_quality_max_idx)); to->match_quality_max_idx[0][0] = from->match_quality_max_idx[0]; to->match_quality_max_idx[0][1] = from->match_quality_max_idx[1]; to->match_quality_max_idx[0][2] = from->match_quality_max_idx[2]; to->match_quality_max_idx[0][3] = from->match_quality_max_idx[3]; bnlm_lut_encode(&to->div_lut, div_lut_nearests, div_lut_slopes, BNLM_DIV_LUT_SIZE); memset(to->div_lut_intercepts, 0, sizeof(to->div_lut_intercepts)); for(i = 0; i < BNLM_DIV_LUT_SIZE; i++) { to->div_lut_intercepts[0][i] = div_lut_intercepts[i]; } memset(to->power_of_2, 0, sizeof(to->power_of_2)); for (i = 0; i < (ISP_VEC_ELEMBITS-1); i++) { to->power_of_2[0][i] = 1 << i; } } /* - Encodes BNLM public parameters into DMEM parameters */ void ia_css_bnlm_encode( struct bnlm_dmem_params *to, const struct ia_css_bnlm_config *from, size_t size) { (void)size; to->rad_enable = from->rad_enable; to->rad_x_origin = from->rad_x_origin; to->rad_y_origin = from->rad_y_origin; to->avg_min_th = from->avg_min_th; to->max_min_th = from->max_min_th; to->exp_coeff_a = from->exp_coeff_a; to->exp_coeff_b = from->exp_coeff_b; to->exp_coeff_c = from->exp_coeff_c; to->exp_exponent = from->exp_exponent; } /* Prints debug traces for BNLM public parameters */ void ia_css_bnlm_debug_trace( const struct ia_css_bnlm_config *config, unsigned level) { if (!config) return; #ifndef IA_CSS_NO_DEBUG ia_css_debug_dtrace(level, "BNLM:\n"); ia_css_debug_dtrace(level, "\t%-32s = %d\n", "rad_enable", config->rad_enable); ia_css_debug_dtrace(level, "\t%-32s = %d\n", "rad_x_origin", config->rad_x_origin); ia_css_debug_dtrace(level, "\t%-32s = %d\n", "rad_y_origin", config->rad_y_origin); ia_css_debug_dtrace(level, "\t%-32s = %d\n", "avg_min_th", config->avg_min_th); ia_css_debug_dtrace(level, "\t%-32s = %d\n", "max_min_th", config->max_min_th); ia_css_debug_dtrace(level, "\t%-32s = %d\n", "exp_coeff_a", config->exp_coeff_a); ia_css_debug_dtrace(level, "\t%-32s = %d\n", "exp_coeff_b", config->exp_coeff_b); ia_css_debug_dtrace(level, "\t%-32s = %d\n", "exp_coeff_c", config->exp_coeff_c); ia_css_debug_dtrace(level, "\t%-32s = %d\n", "exp_exponent", config->exp_exponent); /* ToDo: print traces for LUTs */ #endif /* IA_CSS_NO_DEBUG */ }
gpl-2.0
pio-masaki/kernel_at300se
arch/sh/math-emu/math.c
661
13352
/* * arch/sh/math-emu/math.c * * Copyright (C) 2006 Takashi YOSHII <takasi-y@ops.dti.ne.jp> * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ #include <linux/kernel.h> #include <linux/errno.h> #include <linux/types.h> #include <linux/sched.h> #include <linux/signal.h> #include <linux/perf_event.h> #include <asm/system.h> #include <asm/uaccess.h> #include <asm/processor.h> #include <asm/io.h> #include "sfp-util.h" #include <math-emu/soft-fp.h> #include <math-emu/single.h> #include <math-emu/double.h> #define FPUL (fregs->fpul) #define FPSCR (fregs->fpscr) #define FPSCR_RM (FPSCR&3) #define FPSCR_DN ((FPSCR>>18)&1) #define FPSCR_PR ((FPSCR>>19)&1) #define FPSCR_SZ ((FPSCR>>20)&1) #define FPSCR_FR ((FPSCR>>21)&1) #define FPSCR_MASK 0x003fffffUL #define BANK(n) (n^(FPSCR_FR?16:0)) #define FR ((unsigned long*)(fregs->fp_regs)) #define FR0 (FR[BANK(0)]) #define FRn (FR[BANK(n)]) #define FRm (FR[BANK(m)]) #define DR ((unsigned long long*)(fregs->fp_regs)) #define DRn (DR[BANK(n)/2]) #define DRm (DR[BANK(m)/2]) #define XREG(n) (n^16) #define XFn (FR[BANK(XREG(n))]) #define XFm (FR[BANK(XREG(m))]) #define XDn (DR[BANK(XREG(n))/2]) #define XDm (DR[BANK(XREG(m))/2]) #define R0 (regs->regs[0]) #define Rn (regs->regs[n]) #define Rm (regs->regs[m]) #define WRITE(d,a) ({if(put_user(d, (typeof (d)*)a)) return -EFAULT;}) #define READ(d,a) ({if(get_user(d, (typeof (d)*)a)) return -EFAULT;}) #define PACK_S(r,f) FP_PACK_SP(&r,f) #define UNPACK_S(f,r) FP_UNPACK_SP(f,&r) #define PACK_D(r,f) \ {u32 t[2]; FP_PACK_DP(t,f); ((u32*)&r)[0]=t[1]; ((u32*)&r)[1]=t[0];} #define UNPACK_D(f,r) \ {u32 t[2]; t[0]=((u32*)&r)[1]; t[1]=((u32*)&r)[0]; FP_UNPACK_DP(f,t);} // 2 args instructions. #define BOTH_PRmn(op,x) \ FP_DECL_EX; if(FPSCR_PR) op(D,x,DRm,DRn); else op(S,x,FRm,FRn); #define CMP_X(SZ,R,M,N) do{ \ FP_DECL_##SZ(Fm); FP_DECL_##SZ(Fn); \ UNPACK_##SZ(Fm, M); UNPACK_##SZ(Fn, N); \ FP_CMP_##SZ(R, Fn, Fm, 2); }while(0) #define EQ_X(SZ,R,M,N) do{ \ FP_DECL_##SZ(Fm); FP_DECL_##SZ(Fn); \ UNPACK_##SZ(Fm, M); UNPACK_##SZ(Fn, N); \ FP_CMP_EQ_##SZ(R, Fn, Fm); }while(0) #define CMP(OP) ({ int r; BOTH_PRmn(OP##_X,r); r; }) static int fcmp_gt(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, int n) { if (CMP(CMP) > 0) regs->sr |= 1; else regs->sr &= ~1; return 0; } static int fcmp_eq(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, int n) { if (CMP(CMP /*EQ*/) == 0) regs->sr |= 1; else regs->sr &= ~1; return 0; } #define ARITH_X(SZ,OP,M,N) do{ \ FP_DECL_##SZ(Fm); FP_DECL_##SZ(Fn); FP_DECL_##SZ(Fr); \ UNPACK_##SZ(Fm, M); UNPACK_##SZ(Fn, N); \ FP_##OP##_##SZ(Fr, Fn, Fm); \ PACK_##SZ(N, Fr); }while(0) static int fadd(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, int n) { BOTH_PRmn(ARITH_X, ADD); return 0; } static int fsub(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, int n) { BOTH_PRmn(ARITH_X, SUB); return 0; } static int fmul(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, int n) { BOTH_PRmn(ARITH_X, MUL); return 0; } static int fdiv(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, int n) { BOTH_PRmn(ARITH_X, DIV); return 0; } static int fmac(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, int n) { FP_DECL_EX; FP_DECL_S(Fr); FP_DECL_S(Ft); FP_DECL_S(F0); FP_DECL_S(Fm); FP_DECL_S(Fn); UNPACK_S(F0, FR0); UNPACK_S(Fm, FRm); UNPACK_S(Fn, FRn); FP_MUL_S(Ft, Fm, F0); FP_ADD_S(Fr, Fn, Ft); PACK_S(FRn, Fr); return 0; } // to process fmov's extension (odd n for DR access XD). #define FMOV_EXT(x) if(x&1) x+=16-1 static int fmov_idx_reg(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, int n) { if (FPSCR_SZ) { FMOV_EXT(n); READ(FRn, Rm + R0 + 4); n++; READ(FRn, Rm + R0); } else { READ(FRn, Rm + R0); } return 0; } static int fmov_mem_reg(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, int n) { if (FPSCR_SZ) { FMOV_EXT(n); READ(FRn, Rm + 4); n++; READ(FRn, Rm); } else { READ(FRn, Rm); } return 0; } static int fmov_inc_reg(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, int n) { if (FPSCR_SZ) { FMOV_EXT(n); READ(FRn, Rm + 4); n++; READ(FRn, Rm); Rm += 8; } else { READ(FRn, Rm); Rm += 4; } return 0; } static int fmov_reg_idx(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, int n) { if (FPSCR_SZ) { FMOV_EXT(m); WRITE(FRm, Rn + R0 + 4); m++; WRITE(FRm, Rn + R0); } else { WRITE(FRm, Rn + R0); } return 0; } static int fmov_reg_mem(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, int n) { if (FPSCR_SZ) { FMOV_EXT(m); WRITE(FRm, Rn + 4); m++; WRITE(FRm, Rn); } else { WRITE(FRm, Rn); } return 0; } static int fmov_reg_dec(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, int n) { if (FPSCR_SZ) { FMOV_EXT(m); Rn -= 8; WRITE(FRm, Rn + 4); m++; WRITE(FRm, Rn); } else { Rn -= 4; WRITE(FRm, Rn); } return 0; } static int fmov_reg_reg(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, int n) { if (FPSCR_SZ) { FMOV_EXT(m); FMOV_EXT(n); DRn = DRm; } else { FRn = FRm; } return 0; } static int fnop_mn(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, int n) { return -EINVAL; } // 1 arg instructions. #define NOTYETn(i) static int i(struct sh_fpu_soft_struct *fregs, int n) \ { printk( #i " not yet done.\n"); return 0; } NOTYETn(ftrv) NOTYETn(fsqrt) NOTYETn(fipr) NOTYETn(fsca) NOTYETn(fsrra) #define EMU_FLOAT_X(SZ,N) do { \ FP_DECL_##SZ(Fn); \ FP_FROM_INT_##SZ(Fn, FPUL, 32, int); \ PACK_##SZ(N, Fn); }while(0) static int ffloat(struct sh_fpu_soft_struct *fregs, int n) { FP_DECL_EX; if (FPSCR_PR) EMU_FLOAT_X(D, DRn); else EMU_FLOAT_X(S, FRn); return 0; } #define EMU_FTRC_X(SZ,N) do { \ FP_DECL_##SZ(Fn); \ UNPACK_##SZ(Fn, N); \ FP_TO_INT_##SZ(FPUL, Fn, 32, 1); }while(0) static int ftrc(struct sh_fpu_soft_struct *fregs, int n) { FP_DECL_EX; if (FPSCR_PR) EMU_FTRC_X(D, DRn); else EMU_FTRC_X(S, FRn); return 0; } static int fcnvsd(struct sh_fpu_soft_struct *fregs, int n) { FP_DECL_EX; FP_DECL_S(Fn); FP_DECL_D(Fr); UNPACK_S(Fn, FPUL); FP_CONV(D, S, 2, 1, Fr, Fn); PACK_D(DRn, Fr); return 0; } static int fcnvds(struct sh_fpu_soft_struct *fregs, int n) { FP_DECL_EX; FP_DECL_D(Fn); FP_DECL_S(Fr); UNPACK_D(Fn, DRn); FP_CONV(S, D, 1, 2, Fr, Fn); PACK_S(FPUL, Fr); return 0; } static int fxchg(struct sh_fpu_soft_struct *fregs, int flag) { FPSCR ^= flag; return 0; } static int fsts(struct sh_fpu_soft_struct *fregs, int n) { FRn = FPUL; return 0; } static int flds(struct sh_fpu_soft_struct *fregs, int n) { FPUL = FRn; return 0; } static int fneg(struct sh_fpu_soft_struct *fregs, int n) { FRn ^= (1 << (_FP_W_TYPE_SIZE - 1)); return 0; } static int fabs(struct sh_fpu_soft_struct *fregs, int n) { FRn &= ~(1 << (_FP_W_TYPE_SIZE - 1)); return 0; } static int fld0(struct sh_fpu_soft_struct *fregs, int n) { FRn = 0; return 0; } static int fld1(struct sh_fpu_soft_struct *fregs, int n) { FRn = (_FP_EXPBIAS_S << (_FP_FRACBITS_S - 1)); return 0; } static int fnop_n(struct sh_fpu_soft_struct *fregs, int n) { return -EINVAL; } /// Instruction decoders. static int id_fxfd(struct sh_fpu_soft_struct *, int); static int id_fnxd(struct sh_fpu_soft_struct *, struct pt_regs *, int, int); static int (*fnxd[])(struct sh_fpu_soft_struct *, int) = { fsts, flds, ffloat, ftrc, fneg, fabs, fsqrt, fsrra, fld0, fld1, fcnvsd, fcnvds, fnop_n, fnop_n, fipr, id_fxfd }; static int (*fnmx[])(struct sh_fpu_soft_struct *, struct pt_regs *, int, int) = { fadd, fsub, fmul, fdiv, fcmp_eq, fcmp_gt, fmov_idx_reg, fmov_reg_idx, fmov_mem_reg, fmov_inc_reg, fmov_reg_mem, fmov_reg_dec, fmov_reg_reg, id_fnxd, fmac, fnop_mn}; static int id_fxfd(struct sh_fpu_soft_struct *fregs, int x) { const int flag[] = { FPSCR_SZ, FPSCR_PR, FPSCR_FR, 0 }; switch (x & 3) { case 3: fxchg(fregs, flag[x >> 2]); break; case 1: ftrv(fregs, x - 1); break; default: fsca(fregs, x); } return 0; } static int id_fnxd(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int x, int n) { return (fnxd[x])(fregs, n); } static int id_fnmx(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, u16 code) { int n = (code >> 8) & 0xf, m = (code >> 4) & 0xf, x = code & 0xf; return (fnmx[x])(fregs, regs, m, n); } static int id_sys(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, u16 code) { int n = ((code >> 8) & 0xf); unsigned long *reg = (code & 0x0010) ? &FPUL : &FPSCR; switch (code & 0xf0ff) { case 0x005a: case 0x006a: Rn = *reg; break; case 0x405a: case 0x406a: *reg = Rn; break; case 0x4052: case 0x4062: Rn -= 4; WRITE(*reg, Rn); break; case 0x4056: case 0x4066: READ(*reg, Rn); Rn += 4; break; default: return -EINVAL; } return 0; } static int fpu_emulate(u16 code, struct sh_fpu_soft_struct *fregs, struct pt_regs *regs) { if ((code & 0xf000) == 0xf000) return id_fnmx(fregs, regs, code); else return id_sys(fregs, regs, code); } /** * denormal_to_double - Given denormalized float number, * store double float * * @fpu: Pointer to sh_fpu_soft structure * @n: Index to FP register */ static void denormal_to_double(struct sh_fpu_soft_struct *fpu, int n) { unsigned long du, dl; unsigned long x = fpu->fpul; int exp = 1023 - 126; if (x != 0 && (x & 0x7f800000) == 0) { du = (x & 0x80000000); while ((x & 0x00800000) == 0) { x <<= 1; exp--; } x &= 0x007fffff; du |= (exp << 20) | (x >> 3); dl = x << 29; fpu->fp_regs[n] = du; fpu->fp_regs[n+1] = dl; } } /** * ieee_fpe_handler - Handle denormalized number exception * * @regs: Pointer to register structure * * Returns 1 when it's handled (should not cause exception). */ static int ieee_fpe_handler(struct pt_regs *regs) { unsigned short insn = *(unsigned short *)regs->pc; unsigned short finsn; unsigned long nextpc; siginfo_t info; int nib[4] = { (insn >> 12) & 0xf, (insn >> 8) & 0xf, (insn >> 4) & 0xf, insn & 0xf}; if (nib[0] == 0xb || (nib[0] == 0x4 && nib[2] == 0x0 && nib[3] == 0xb)) /* bsr & jsr */ regs->pr = regs->pc + 4; if (nib[0] == 0xa || nib[0] == 0xb) { /* bra & bsr */ nextpc = regs->pc + 4 + ((short) ((insn & 0xfff) << 4) >> 3); finsn = *(unsigned short *) (regs->pc + 2); } else if (nib[0] == 0x8 && nib[1] == 0xd) { /* bt/s */ if (regs->sr & 1) nextpc = regs->pc + 4 + ((char) (insn & 0xff) << 1); else nextpc = regs->pc + 4; finsn = *(unsigned short *) (regs->pc + 2); } else if (nib[0] == 0x8 && nib[1] == 0xf) { /* bf/s */ if (regs->sr & 1) nextpc = regs->pc + 4; else nextpc = regs->pc + 4 + ((char) (insn & 0xff) << 1); finsn = *(unsigned short *) (regs->pc + 2); } else if (nib[0] == 0x4 && nib[3] == 0xb && (nib[2] == 0x0 || nib[2] == 0x2)) { /* jmp & jsr */ nextpc = regs->regs[nib[1]]; finsn = *(unsigned short *) (regs->pc + 2); } else if (nib[0] == 0x0 && nib[3] == 0x3 && (nib[2] == 0x0 || nib[2] == 0x2)) { /* braf & bsrf */ nextpc = regs->pc + 4 + regs->regs[nib[1]]; finsn = *(unsigned short *) (regs->pc + 2); } else if (insn == 0x000b) { /* rts */ nextpc = regs->pr; finsn = *(unsigned short *) (regs->pc + 2); } else { nextpc = regs->pc + 2; finsn = insn; } if ((finsn & 0xf1ff) == 0xf0ad) { /* fcnvsd */ struct task_struct *tsk = current; if ((tsk->thread.xstate->softfpu.fpscr & (1 << 17))) { /* FPU error */ denormal_to_double (&tsk->thread.xstate->softfpu, (finsn >> 8) & 0xf); tsk->thread.xstate->softfpu.fpscr &= ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK); task_thread_info(tsk)->status |= TS_USEDFPU; } else { info.si_signo = SIGFPE; info.si_errno = 0; info.si_code = FPE_FLTINV; info.si_addr = (void __user *)regs->pc; force_sig_info(SIGFPE, &info, tsk); } regs->pc = nextpc; return 1; } return 0; } asmlinkage void do_fpu_error(unsigned long r4, unsigned long r5, unsigned long r6, unsigned long r7, struct pt_regs regs) { struct task_struct *tsk = current; siginfo_t info; if (ieee_fpe_handler (&regs)) return; regs.pc += 2; info.si_signo = SIGFPE; info.si_errno = 0; info.si_code = FPE_FLTINV; info.si_addr = (void __user *)regs.pc; force_sig_info(SIGFPE, &info, tsk); } /** * fpu_init - Initialize FPU registers * @fpu: Pointer to software emulated FPU registers. */ static void fpu_init(struct sh_fpu_soft_struct *fpu) { int i; fpu->fpscr = FPSCR_INIT; fpu->fpul = 0; for (i = 0; i < 16; i++) { fpu->fp_regs[i] = 0; fpu->xfp_regs[i]= 0; } } /** * do_fpu_inst - Handle reserved instructions for FPU emulation * @inst: instruction code. * @regs: registers on stack. */ int do_fpu_inst(unsigned short inst, struct pt_regs *regs) { struct task_struct *tsk = current; struct sh_fpu_soft_struct *fpu = &(tsk->thread.xstate->softfpu); perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, 0); if (!(task_thread_info(tsk)->status & TS_USEDFPU)) { /* initialize once. */ fpu_init(fpu); task_thread_info(tsk)->status |= TS_USEDFPU; } return fpu_emulate(inst, fpu, regs); }
gpl-2.0
pokymobo/linux-yocto-lamobo-r1
drivers/gpu/drm/nouveau/core/core/subdev.c
917
3104
/* * Copyright 2012 Red Hat Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * * Authors: Ben Skeggs */ #include <core/object.h> #include <core/subdev.h> #include <core/device.h> #include <core/option.h> void nouveau_subdev_reset(struct nouveau_object *subdev) { nv_trace(subdev, "resetting...\n"); nv_ofuncs(subdev)->fini(subdev, false); nv_debug(subdev, "reset\n"); } int nouveau_subdev_init(struct nouveau_subdev *subdev) { int ret = nouveau_object_init(&subdev->base); if (ret) return ret; nouveau_subdev_reset(&subdev->base); return 0; } int _nouveau_subdev_init(struct nouveau_object *object) { return nouveau_subdev_init(nv_subdev(object)); } int nouveau_subdev_fini(struct nouveau_subdev *subdev, bool suspend) { if (subdev->unit) { nv_mask(subdev, 0x000200, subdev->unit, 0x00000000); nv_mask(subdev, 0x000200, subdev->unit, subdev->unit); } return nouveau_object_fini(&subdev->base, suspend); } int _nouveau_subdev_fini(struct nouveau_object *object, bool suspend) { return nouveau_subdev_fini(nv_subdev(object), suspend); } void nouveau_subdev_destroy(struct nouveau_subdev *subdev) { int subidx = nv_hclass(subdev) & 0xff; nv_device(subdev)->subdev[subidx] = NULL; nouveau_object_destroy(&subdev->base); } void _nouveau_subdev_dtor(struct nouveau_object *object) { nouveau_subdev_destroy(nv_subdev(object)); } int nouveau_subdev_create_(struct nouveau_object *parent, struct nouveau_object *engine, struct nouveau_oclass *oclass, u32 pclass, const char *subname, const char *sysname, int size, void **pobject) { struct nouveau_subdev *subdev; int ret; ret = nouveau_object_create_(parent, engine, oclass, pclass | NV_SUBDEV_CLASS, size, pobject); subdev = *pobject; if (ret) return ret; __mutex_init(&subdev->mutex, subname, &oclass->lock_class_key); subdev->name = subname; if (parent) { struct nouveau_device *device = nv_device(parent); subdev->debug = nouveau_dbgopt(device->dbgopt, subname); subdev->mmio = nv_subdev(device)->mmio; } return 0; }
gpl-2.0
Tesla-Redux-Devices/android_kernel_mediatek_sprout
arch/xtensa/kernel/xtensa_ksyms.c
1941
2894
/* * arch/xtensa/kernel/xtensa_ksyms.c * * Export Xtensa-specific functions for loadable modules. * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * Copyright (C) 2001 - 2005 Tensilica Inc. * * Joe Taylor <joe@tensilica.com> */ #include <linux/module.h> #include <linux/string.h> #include <linux/mm.h> #include <linux/interrupt.h> #include <asm/irq.h> #include <linux/in6.h> #include <asm/uaccess.h> #include <asm/checksum.h> #include <asm/dma.h> #include <asm/io.h> #include <asm/page.h> #include <asm/pgalloc.h> #ifdef CONFIG_BLK_DEV_FD #include <asm/floppy.h> #endif #ifdef CONFIG_NET #include <net/checksum.h> #endif /* CONFIG_NET */ /* * String functions */ EXPORT_SYMBOL(memset); EXPORT_SYMBOL(memcpy); EXPORT_SYMBOL(memmove); EXPORT_SYMBOL(__strncpy_user); EXPORT_SYMBOL(clear_page); EXPORT_SYMBOL(copy_page); EXPORT_SYMBOL(empty_zero_page); /* * gcc internal math functions */ extern long long __ashrdi3(long long, int); extern long long __ashldi3(long long, int); extern long long __lshrdi3(long long, int); extern int __divsi3(int, int); extern int __modsi3(int, int); extern long long __muldi3(long long, long long); extern int __mulsi3(int, int); extern unsigned int __udivsi3(unsigned int, unsigned int); extern unsigned int __umodsi3(unsigned int, unsigned int); extern unsigned long long __umoddi3(unsigned long long, unsigned long long); extern unsigned long long __udivdi3(unsigned long long, unsigned long long); extern int __ucmpdi2(int, int); EXPORT_SYMBOL(__ashldi3); EXPORT_SYMBOL(__ashrdi3); EXPORT_SYMBOL(__lshrdi3); EXPORT_SYMBOL(__divsi3); EXPORT_SYMBOL(__modsi3); EXPORT_SYMBOL(__muldi3); EXPORT_SYMBOL(__mulsi3); EXPORT_SYMBOL(__udivsi3); EXPORT_SYMBOL(__umodsi3); EXPORT_SYMBOL(__udivdi3); EXPORT_SYMBOL(__umoddi3); EXPORT_SYMBOL(__ucmpdi2); void __xtensa_libgcc_window_spill(void) { BUG(); } EXPORT_SYMBOL(__xtensa_libgcc_window_spill); unsigned long __sync_fetch_and_and_4(unsigned long *p, unsigned long v) { BUG(); } EXPORT_SYMBOL(__sync_fetch_and_and_4); unsigned long __sync_fetch_and_or_4(unsigned long *p, unsigned long v) { BUG(); } EXPORT_SYMBOL(__sync_fetch_and_or_4); #ifdef CONFIG_NET /* * Networking support */ EXPORT_SYMBOL(csum_partial); EXPORT_SYMBOL(csum_partial_copy_generic); #endif /* CONFIG_NET */ /* * Architecture-specific symbols */ EXPORT_SYMBOL(__xtensa_copy_user); /* * Kernel hacking ... */ #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE) // FIXME EXPORT_SYMBOL(screen_info); #endif EXPORT_SYMBOL(outsb); EXPORT_SYMBOL(outsw); EXPORT_SYMBOL(outsl); EXPORT_SYMBOL(insb); EXPORT_SYMBOL(insw); EXPORT_SYMBOL(insl); extern long common_exception_return; extern long _spill_registers; EXPORT_SYMBOL(common_exception_return); EXPORT_SYMBOL(_spill_registers);
gpl-2.0
garyvan/openwrt
linux-3.10.20-rt14/arch/mips/sibyte/sb1250/bus_watcher.c
1941
7685
/* * Copyright (C) 2002,2003 Broadcom Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ /* * The Bus Watcher monitors internal bus transactions and maintains * counts of transactions with error status, logging details and * causing one of several interrupts. This driver provides a handler * for those interrupts which aggregates the counts (to avoid * saturating the 8-bit counters) and provides a presence in * /proc/bus_watcher if PROC_FS is on. */ #include <linux/init.h> #include <linux/kernel.h> #include <linux/interrupt.h> #include <linux/sched.h> #include <linux/proc_fs.h> #include <linux/seq_file.h> #include <asm/io.h> #include <asm/sibyte/sb1250.h> #include <asm/sibyte/sb1250_regs.h> #include <asm/sibyte/sb1250_int.h> #include <asm/sibyte/sb1250_scd.h> struct bw_stats_struct { uint64_t status; uint32_t l2_err; uint32_t memio_err; int status_printed; unsigned long l2_cor_d; unsigned long l2_bad_d; unsigned long l2_cor_t; unsigned long l2_bad_t; unsigned long mem_cor_d; unsigned long mem_bad_d; unsigned long bus_error; } bw_stats; static void print_summary(uint32_t status, uint32_t l2_err, uint32_t memio_err) { printk("Bus watcher error counters: %08x %08x\n", l2_err, memio_err); printk("\nLast recorded signature:\n"); printk("Request %02x from %d, answered by %d with Dcode %d\n", (unsigned int)(G_SCD_BERR_TID(status) & 0x3f), (int)(G_SCD_BERR_TID(status) >> 6), (int)G_SCD_BERR_RID(status), (int)G_SCD_BERR_DCODE(status)); } /* * check_bus_watcher is exported for use in situations where we want * to see the most recent status of the bus watcher, which might have * already been destructively read out of the registers. * * notes: this is currently used by the cache error handler * should provide locking against the interrupt handler */ void check_bus_watcher(void) { u32 status, l2_err, memio_err; #ifdef CONFIG_SB1_PASS_1_WORKAROUNDS /* Destructive read, clears register and interrupt */ status = csr_in32(IOADDR(A_SCD_BUS_ERR_STATUS)); #else /* Use non-destructive register */ status = csr_in32(IOADDR(A_SCD_BUS_ERR_STATUS_DEBUG)); #endif if (!(status & 0x7fffffff)) { printk("Using last values reaped by bus watcher driver\n"); status = bw_stats.status; l2_err = bw_stats.l2_err; memio_err = bw_stats.memio_err; } else { l2_err = csr_in32(IOADDR(A_BUS_L2_ERRORS)); memio_err = csr_in32(IOADDR(A_BUS_MEM_IO_ERRORS)); } if (status & ~(1UL << 31)) print_summary(status, l2_err, memio_err); else printk("Bus watcher indicates no error\n"); } #ifdef CONFIG_PROC_FS /* For simplicity, I want to assume a single read is required each time */ static int bw_proc_show(struct seq_file *m, void *v) { struct bw_stats_struct *stats = m->private; seq_puts(m, "SiByte Bus Watcher statistics\n"); seq_puts(m, "-----------------------------\n"); seq_printf(m, "L2-d-cor %8ld\nL2-d-bad %8ld\n", stats->l2_cor_d, stats->l2_bad_d); seq_printf(m, "L2-t-cor %8ld\nL2-t-bad %8ld\n", stats->l2_cor_t, stats->l2_bad_t); seq_printf(m, "MC-d-cor %8ld\nMC-d-bad %8ld\n", stats->mem_cor_d, stats->mem_bad_d); seq_printf(m, "IO-err %8ld\n", stats->bus_error); seq_puts(m, "\nLast recorded signature:\n"); seq_printf(m, "Request %02x from %d, answered by %d with Dcode %d\n", (unsigned int)(G_SCD_BERR_TID(stats->status) & 0x3f), (int)(G_SCD_BERR_TID(stats->status) >> 6), (int)G_SCD_BERR_RID(stats->status), (int)G_SCD_BERR_DCODE(stats->status)); /* XXXKW indicate multiple errors between printings, or stats collection (or both)? */ if (stats->status & M_SCD_BERR_MULTERRS) seq_puts(m, "Multiple errors observed since last check.\n"); if (stats->status_printed) { seq_puts(m, "(no change since last printing)\n"); } else { stats->status_printed = 1; } return 0; } static int bw_proc_open(struct inode *inode, struct file *file) { return single_open(file, bw_proc_show, PDE_DATA(inode)); } static const struct file_operations bw_proc_fops = { .open = bw_proc_open, .read = seq_read, .llseek = seq_lseek, .release = single_release, }; static void create_proc_decoder(struct bw_stats_struct *stats) { struct proc_dir_entry *ent; ent = proc_create_data("bus_watcher", S_IWUSR | S_IRUGO, NULL, &bw_proc_fops, stats); if (!ent) { printk(KERN_INFO "Unable to initialize bus_watcher /proc entry\n"); return; } } #endif /* CONFIG_PROC_FS */ /* * sibyte_bw_int - handle bus watcher interrupts and accumulate counts * * notes: possible re-entry due to multiple sources * should check/indicate saturation */ static irqreturn_t sibyte_bw_int(int irq, void *data) { struct bw_stats_struct *stats = data; unsigned long cntr; #ifdef CONFIG_SIBYTE_BW_TRACE int i; #endif #ifndef CONFIG_PROC_FS char bw_buf[1024]; #endif #ifdef CONFIG_SIBYTE_BW_TRACE csr_out32(M_SCD_TRACE_CFG_FREEZE, IOADDR(A_SCD_TRACE_CFG)); csr_out32(M_SCD_TRACE_CFG_START_READ, IOADDR(A_SCD_TRACE_CFG)); for (i=0; i<256*6; i++) printk("%016llx\n", (long long)__raw_readq(IOADDR(A_SCD_TRACE_READ))); csr_out32(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG)); csr_out32(M_SCD_TRACE_CFG_START, IOADDR(A_SCD_TRACE_CFG)); #endif /* Destructive read, clears register and interrupt */ stats->status = csr_in32(IOADDR(A_SCD_BUS_ERR_STATUS)); stats->status_printed = 0; stats->l2_err = cntr = csr_in32(IOADDR(A_BUS_L2_ERRORS)); stats->l2_cor_d += G_SCD_L2ECC_CORR_D(cntr); stats->l2_bad_d += G_SCD_L2ECC_BAD_D(cntr); stats->l2_cor_t += G_SCD_L2ECC_CORR_T(cntr); stats->l2_bad_t += G_SCD_L2ECC_BAD_T(cntr); csr_out32(0, IOADDR(A_BUS_L2_ERRORS)); stats->memio_err = cntr = csr_in32(IOADDR(A_BUS_MEM_IO_ERRORS)); stats->mem_cor_d += G_SCD_MEM_ECC_CORR(cntr); stats->mem_bad_d += G_SCD_MEM_ECC_BAD(cntr); stats->bus_error += G_SCD_MEM_BUSERR(cntr); csr_out32(0, IOADDR(A_BUS_MEM_IO_ERRORS)); return IRQ_HANDLED; } int __init sibyte_bus_watcher(void) { memset(&bw_stats, 0, sizeof(struct bw_stats_struct)); bw_stats.status_printed = 1; if (request_irq(K_INT_BAD_ECC, sibyte_bw_int, 0, "Bus watcher", &bw_stats)) { printk("Failed to register bus watcher BAD_ECC irq\n"); return -1; } if (request_irq(K_INT_COR_ECC, sibyte_bw_int, 0, "Bus watcher", &bw_stats)) { free_irq(K_INT_BAD_ECC, &bw_stats); printk("Failed to register bus watcher COR_ECC irq\n"); return -1; } if (request_irq(K_INT_IO_BUS, sibyte_bw_int, 0, "Bus watcher", &bw_stats)) { free_irq(K_INT_BAD_ECC, &bw_stats); free_irq(K_INT_COR_ECC, &bw_stats); printk("Failed to register bus watcher IO_BUS irq\n"); return -1; } #ifdef CONFIG_PROC_FS create_proc_decoder(&bw_stats); #endif #ifdef CONFIG_SIBYTE_BW_TRACE csr_out32((M_SCD_TRSEQ_ASAMPLE | M_SCD_TRSEQ_DSAMPLE | K_SCD_TRSEQ_TRIGGER_ALL), IOADDR(A_SCD_TRACE_SEQUENCE_0)); csr_out32(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG)); csr_out32(M_SCD_TRACE_CFG_START, IOADDR(A_SCD_TRACE_CFG)); #endif return 0; } __initcall(sibyte_bus_watcher);
gpl-2.0
itsmerajit/Samsung_j2
drivers/input/keyboard/lm8323.c
2453
22809
/* * drivers/i2c/chips/lm8323.c * * Copyright (C) 2007-2009 Nokia Corporation * * Written by Daniel Stone <daniel.stone@nokia.com> * Timo O. Karjalainen <timo.o.karjalainen@nokia.com> * * Updated by Felipe Balbi <felipe.balbi@nokia.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation (version 2 of the License only). * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #include <linux/module.h> #include <linux/i2c.h> #include <linux/interrupt.h> #include <linux/sched.h> #include <linux/mutex.h> #include <linux/delay.h> #include <linux/input.h> #include <linux/leds.h> #include <linux/pm.h> #include <linux/i2c/lm8323.h> #include <linux/slab.h> /* Commands to send to the chip. */ #define LM8323_CMD_READ_ID 0x80 /* Read chip ID. */ #define LM8323_CMD_WRITE_CFG 0x81 /* Set configuration item. */ #define LM8323_CMD_READ_INT 0x82 /* Get interrupt status. */ #define LM8323_CMD_RESET 0x83 /* Reset, same as external one */ #define LM8323_CMD_WRITE_PORT_SEL 0x85 /* Set GPIO in/out. */ #define LM8323_CMD_WRITE_PORT_STATE 0x86 /* Set GPIO pullup. */ #define LM8323_CMD_READ_PORT_SEL 0x87 /* Get GPIO in/out. */ #define LM8323_CMD_READ_PORT_STATE 0x88 /* Get GPIO pullup. */ #define LM8323_CMD_READ_FIFO 0x89 /* Read byte from FIFO. */ #define LM8323_CMD_RPT_READ_FIFO 0x8a /* Read FIFO (no increment). */ #define LM8323_CMD_SET_ACTIVE 0x8b /* Set active time. */ #define LM8323_CMD_READ_ERR 0x8c /* Get error status. */ #define LM8323_CMD_READ_ROTATOR 0x8e /* Read rotator status. */ #define LM8323_CMD_SET_DEBOUNCE 0x8f /* Set debouncing time. */ #define LM8323_CMD_SET_KEY_SIZE 0x90 /* Set keypad size. */ #define LM8323_CMD_READ_KEY_SIZE 0x91 /* Get keypad size. */ #define LM8323_CMD_READ_CFG 0x92 /* Get configuration item. */ #define LM8323_CMD_WRITE_CLOCK 0x93 /* Set clock config. */ #define LM8323_CMD_READ_CLOCK 0x94 /* Get clock config. */ #define LM8323_CMD_PWM_WRITE 0x95 /* Write PWM script. */ #define LM8323_CMD_START_PWM 0x96 /* Start PWM engine. */ #define LM8323_CMD_STOP_PWM 0x97 /* Stop PWM engine. */ /* Interrupt status. */ #define INT_KEYPAD 0x01 /* Key event. */ #define INT_ROTATOR 0x02 /* Rotator event. */ #define INT_ERROR 0x08 /* Error: use CMD_READ_ERR. */ #define INT_NOINIT 0x10 /* Lost configuration. */ #define INT_PWM1 0x20 /* PWM1 stopped. */ #define INT_PWM2 0x40 /* PWM2 stopped. */ #define INT_PWM3 0x80 /* PWM3 stopped. */ /* Errors (signalled by INT_ERROR, read with CMD_READ_ERR). */ #define ERR_BADPAR 0x01 /* Bad parameter. */ #define ERR_CMDUNK 0x02 /* Unknown command. */ #define ERR_KEYOVR 0x04 /* Too many keys pressed. */ #define ERR_FIFOOVER 0x40 /* FIFO overflow. */ /* Configuration keys (CMD_{WRITE,READ}_CFG). */ #define CFG_MUX1SEL 0x01 /* Select MUX1_OUT input. */ #define CFG_MUX1EN 0x02 /* Enable MUX1_OUT. */ #define CFG_MUX2SEL 0x04 /* Select MUX2_OUT input. */ #define CFG_MUX2EN 0x08 /* Enable MUX2_OUT. */ #define CFG_PSIZE 0x20 /* Package size (must be 0). */ #define CFG_ROTEN 0x40 /* Enable rotator. */ /* Clock settings (CMD_{WRITE,READ}_CLOCK). */ #define CLK_RCPWM_INTERNAL 0x00 #define CLK_RCPWM_EXTERNAL 0x03 #define CLK_SLOWCLKEN 0x08 /* Enable 32.768kHz clock. */ #define CLK_SLOWCLKOUT 0x40 /* Enable slow pulse output. */ /* The possible addresses corresponding to CONFIG1 and CONFIG2 pin wirings. */ #define LM8323_I2C_ADDR00 (0x84 >> 1) /* 1000 010x */ #define LM8323_I2C_ADDR01 (0x86 >> 1) /* 1000 011x */ #define LM8323_I2C_ADDR10 (0x88 >> 1) /* 1000 100x */ #define LM8323_I2C_ADDR11 (0x8A >> 1) /* 1000 101x */ /* Key event fifo length */ #define LM8323_FIFO_LEN 15 /* Commands for PWM engine; feed in with PWM_WRITE. */ /* Load ramp counter from duty cycle field (range 0 - 0xff). */ #define PWM_SET(v) (0x4000 | ((v) & 0xff)) /* Go to start of script. */ #define PWM_GOTOSTART 0x0000 /* * Stop engine (generates interrupt). If reset is 1, clear the program * counter, else leave it. */ #define PWM_END(reset) (0xc000 | (!!(reset) << 11)) /* * Ramp. If s is 1, divide clock by 512, else divide clock by 16. * Take t clock scales (up to 63) per step, for n steps (up to 126). * If u is set, ramp up, else ramp down. */ #define PWM_RAMP(s, t, n, u) ((!!(s) << 14) | ((t) & 0x3f) << 8 | \ ((n) & 0x7f) | ((u) ? 0 : 0x80)) /* * Loop (i.e. jump back to pos) for a given number of iterations (up to 63). * If cnt is zero, execute until PWM_END is encountered. */ #define PWM_LOOP(cnt, pos) (0xa000 | (((cnt) & 0x3f) << 7) | \ ((pos) & 0x3f)) /* * Wait for trigger. Argument is a mask of channels, shifted by the channel * number, e.g. 0xa for channels 3 and 1. Note that channels are numbered * from 1, not 0. */ #define PWM_WAIT_TRIG(chans) (0xe000 | (((chans) & 0x7) << 6)) /* Send trigger. Argument is same as PWM_WAIT_TRIG. */ #define PWM_SEND_TRIG(chans) (0xe000 | ((chans) & 0x7)) struct lm8323_pwm { int id; int fade_time; int brightness; int desired_brightness; bool enabled; bool running; /* pwm lock */ struct mutex lock; struct work_struct work; struct led_classdev cdev; struct lm8323_chip *chip; }; struct lm8323_chip { /* device lock */ struct mutex lock; struct i2c_client *client; struct input_dev *idev; bool kp_enabled; bool pm_suspend; unsigned keys_down; char phys[32]; unsigned short keymap[LM8323_KEYMAP_SIZE]; int size_x; int size_y; int debounce_time; int active_time; struct lm8323_pwm pwm[LM8323_NUM_PWMS]; }; #define client_to_lm8323(c) container_of(c, struct lm8323_chip, client) #define dev_to_lm8323(d) container_of(d, struct lm8323_chip, client->dev) #define cdev_to_pwm(c) container_of(c, struct lm8323_pwm, cdev) #define work_to_pwm(w) container_of(w, struct lm8323_pwm, work) #define LM8323_MAX_DATA 8 /* * To write, we just access the chip's address in write mode, and dump the * command and data out on the bus. The command byte and data are taken as * sequential u8s out of varargs, to a maximum of LM8323_MAX_DATA. */ static int lm8323_write(struct lm8323_chip *lm, int len, ...) { int ret, i; va_list ap; u8 data[LM8323_MAX_DATA]; va_start(ap, len); if (unlikely(len > LM8323_MAX_DATA)) { dev_err(&lm->client->dev, "tried to send %d bytes\n", len); va_end(ap); return 0; } for (i = 0; i < len; i++) data[i] = va_arg(ap, int); va_end(ap); /* * If the host is asleep while we send the data, we can get a NACK * back while it wakes up, so try again, once. */ ret = i2c_master_send(lm->client, data, len); if (unlikely(ret == -EREMOTEIO)) ret = i2c_master_send(lm->client, data, len); if (unlikely(ret != len)) dev_err(&lm->client->dev, "sent %d bytes of %d total\n", len, ret); return ret; } /* * To read, we first send the command byte to the chip and end the transaction, * then access the chip in read mode, at which point it will send the data. */ static int lm8323_read(struct lm8323_chip *lm, u8 cmd, u8 *buf, int len) { int ret; /* * If the host is asleep while we send the byte, we can get a NACK * back while it wakes up, so try again, once. */ ret = i2c_master_send(lm->client, &cmd, 1); if (unlikely(ret == -EREMOTEIO)) ret = i2c_master_send(lm->client, &cmd, 1); if (unlikely(ret != 1)) { dev_err(&lm->client->dev, "sending read cmd 0x%02x failed\n", cmd); return 0; } ret = i2c_master_recv(lm->client, buf, len); if (unlikely(ret != len)) dev_err(&lm->client->dev, "wanted %d bytes, got %d\n", len, ret); return ret; } /* * Set the chip active time (idle time before it enters halt). */ static void lm8323_set_active_time(struct lm8323_chip *lm, int time) { lm8323_write(lm, 2, LM8323_CMD_SET_ACTIVE, time >> 2); } /* * The signals are AT-style: the low 7 bits are the keycode, and the top * bit indicates the state (1 for down, 0 for up). */ static inline u8 lm8323_whichkey(u8 event) { return event & 0x7f; } static inline int lm8323_ispress(u8 event) { return (event & 0x80) ? 1 : 0; } static void process_keys(struct lm8323_chip *lm) { u8 event; u8 key_fifo[LM8323_FIFO_LEN + 1]; int old_keys_down = lm->keys_down; int ret; int i = 0; /* * Read all key events from the FIFO at once. Next READ_FIFO clears the * FIFO even if we didn't read all events previously. */ ret = lm8323_read(lm, LM8323_CMD_READ_FIFO, key_fifo, LM8323_FIFO_LEN); if (ret < 0) { dev_err(&lm->client->dev, "Failed reading fifo \n"); return; } key_fifo[ret] = 0; while ((event = key_fifo[i++])) { u8 key = lm8323_whichkey(event); int isdown = lm8323_ispress(event); unsigned short keycode = lm->keymap[key]; dev_vdbg(&lm->client->dev, "key 0x%02x %s\n", key, isdown ? "down" : "up"); if (lm->kp_enabled) { input_event(lm->idev, EV_MSC, MSC_SCAN, key); input_report_key(lm->idev, keycode, isdown); input_sync(lm->idev); } if (isdown) lm->keys_down++; else lm->keys_down--; } /* * Errata: We need to ensure that the chip never enters halt mode * during a keypress, so set active time to 0. When it's released, * we can enter halt again, so set the active time back to normal. */ if (!old_keys_down && lm->keys_down) lm8323_set_active_time(lm, 0); if (old_keys_down && !lm->keys_down) lm8323_set_active_time(lm, lm->active_time); } static void lm8323_process_error(struct lm8323_chip *lm) { u8 error; if (lm8323_read(lm, LM8323_CMD_READ_ERR, &error, 1) == 1) { if (error & ERR_FIFOOVER) dev_vdbg(&lm->client->dev, "fifo overflow!\n"); if (error & ERR_KEYOVR) dev_vdbg(&lm->client->dev, "more than two keys pressed\n"); if (error & ERR_CMDUNK) dev_vdbg(&lm->client->dev, "unknown command submitted\n"); if (error & ERR_BADPAR) dev_vdbg(&lm->client->dev, "bad command parameter\n"); } } static void lm8323_reset(struct lm8323_chip *lm) { /* The docs say we must pass 0xAA as the data byte. */ lm8323_write(lm, 2, LM8323_CMD_RESET, 0xAA); } static int lm8323_configure(struct lm8323_chip *lm) { int keysize = (lm->size_x << 4) | lm->size_y; int clock = (CLK_SLOWCLKEN | CLK_RCPWM_EXTERNAL); int debounce = lm->debounce_time >> 2; int active = lm->active_time >> 2; /* * Active time must be greater than the debounce time: if it's * a close-run thing, give ourselves a 12ms buffer. */ if (debounce >= active) active = debounce + 3; lm8323_write(lm, 2, LM8323_CMD_WRITE_CFG, 0); lm8323_write(lm, 2, LM8323_CMD_WRITE_CLOCK, clock); lm8323_write(lm, 2, LM8323_CMD_SET_KEY_SIZE, keysize); lm8323_set_active_time(lm, lm->active_time); lm8323_write(lm, 2, LM8323_CMD_SET_DEBOUNCE, debounce); lm8323_write(lm, 3, LM8323_CMD_WRITE_PORT_STATE, 0xff, 0xff); lm8323_write(lm, 3, LM8323_CMD_WRITE_PORT_SEL, 0, 0); /* * Not much we can do about errors at this point, so just hope * for the best. */ return 0; } static void pwm_done(struct lm8323_pwm *pwm) { mutex_lock(&pwm->lock); pwm->running = false; if (pwm->desired_brightness != pwm->brightness) schedule_work(&pwm->work); mutex_unlock(&pwm->lock); } /* * Bottom half: handle the interrupt by posting key events, or dealing with * errors appropriately. */ static irqreturn_t lm8323_irq(int irq, void *_lm) { struct lm8323_chip *lm = _lm; u8 ints; int i; mutex_lock(&lm->lock); while ((lm8323_read(lm, LM8323_CMD_READ_INT, &ints, 1) == 1) && ints) { if (likely(ints & INT_KEYPAD)) process_keys(lm); if (ints & INT_ROTATOR) { /* We don't currently support the rotator. */ dev_vdbg(&lm->client->dev, "rotator fired\n"); } if (ints & INT_ERROR) { dev_vdbg(&lm->client->dev, "error!\n"); lm8323_process_error(lm); } if (ints & INT_NOINIT) { dev_err(&lm->client->dev, "chip lost config; " "reinitialising\n"); lm8323_configure(lm); } for (i = 0; i < LM8323_NUM_PWMS; i++) { if (ints & (INT_PWM1 << i)) { dev_vdbg(&lm->client->dev, "pwm%d engine completed\n", i); pwm_done(&lm->pwm[i]); } } } mutex_unlock(&lm->lock); return IRQ_HANDLED; } /* * Read the chip ID. */ static int lm8323_read_id(struct lm8323_chip *lm, u8 *buf) { int bytes; bytes = lm8323_read(lm, LM8323_CMD_READ_ID, buf, 2); if (unlikely(bytes != 2)) return -EIO; return 0; } static void lm8323_write_pwm_one(struct lm8323_pwm *pwm, int pos, u16 cmd) { lm8323_write(pwm->chip, 4, LM8323_CMD_PWM_WRITE, (pos << 2) | pwm->id, (cmd & 0xff00) >> 8, cmd & 0x00ff); } /* * Write a script into a given PWM engine, concluding with PWM_END. * If 'kill' is nonzero, the engine will be shut down at the end * of the script, producing a zero output. Otherwise the engine * will be kept running at the final PWM level indefinitely. */ static void lm8323_write_pwm(struct lm8323_pwm *pwm, int kill, int len, const u16 *cmds) { int i; for (i = 0; i < len; i++) lm8323_write_pwm_one(pwm, i, cmds[i]); lm8323_write_pwm_one(pwm, i++, PWM_END(kill)); lm8323_write(pwm->chip, 2, LM8323_CMD_START_PWM, pwm->id); pwm->running = true; } static void lm8323_pwm_work(struct work_struct *work) { struct lm8323_pwm *pwm = work_to_pwm(work); int div512, perstep, steps, hz, up, kill; u16 pwm_cmds[3]; int num_cmds = 0; mutex_lock(&pwm->lock); /* * Do nothing if we're already at the requested level, * or previous setting is not yet complete. In the latter * case we will be called again when the previous PWM script * finishes. */ if (pwm->running || pwm->desired_brightness == pwm->brightness) goto out; kill = (pwm->desired_brightness == 0); up = (pwm->desired_brightness > pwm->brightness); steps = abs(pwm->desired_brightness - pwm->brightness); /* * Convert time (in ms) into a divisor (512 or 16 on a refclk of * 32768Hz), and number of ticks per step. */ if ((pwm->fade_time / steps) > (32768 / 512)) { div512 = 1; hz = 32768 / 512; } else { div512 = 0; hz = 32768 / 16; } perstep = (hz * pwm->fade_time) / (steps * 1000); if (perstep == 0) perstep = 1; else if (perstep > 63) perstep = 63; while (steps) { int s; s = min(126, steps); pwm_cmds[num_cmds++] = PWM_RAMP(div512, perstep, s, up); steps -= s; } lm8323_write_pwm(pwm, kill, num_cmds, pwm_cmds); pwm->brightness = pwm->desired_brightness; out: mutex_unlock(&pwm->lock); } static void lm8323_pwm_set_brightness(struct led_classdev *led_cdev, enum led_brightness brightness) { struct lm8323_pwm *pwm = cdev_to_pwm(led_cdev); struct lm8323_chip *lm = pwm->chip; mutex_lock(&pwm->lock); pwm->desired_brightness = brightness; mutex_unlock(&pwm->lock); if (in_interrupt()) { schedule_work(&pwm->work); } else { /* * Schedule PWM work as usual unless we are going into suspend */ mutex_lock(&lm->lock); if (likely(!lm->pm_suspend)) schedule_work(&pwm->work); else lm8323_pwm_work(&pwm->work); mutex_unlock(&lm->lock); } } static ssize_t lm8323_pwm_show_time(struct device *dev, struct device_attribute *attr, char *buf) { struct led_classdev *led_cdev = dev_get_drvdata(dev); struct lm8323_pwm *pwm = cdev_to_pwm(led_cdev); return sprintf(buf, "%d\n", pwm->fade_time); } static ssize_t lm8323_pwm_store_time(struct device *dev, struct device_attribute *attr, const char *buf, size_t len) { struct led_classdev *led_cdev = dev_get_drvdata(dev); struct lm8323_pwm *pwm = cdev_to_pwm(led_cdev); int ret, time; ret = kstrtoint(buf, 10, &time); /* Numbers only, please. */ if (ret) return ret; pwm->fade_time = time; return strlen(buf); } static DEVICE_ATTR(time, 0644, lm8323_pwm_show_time, lm8323_pwm_store_time); static int init_pwm(struct lm8323_chip *lm, int id, struct device *dev, const char *name) { struct lm8323_pwm *pwm; BUG_ON(id > 3); pwm = &lm->pwm[id - 1]; pwm->id = id; pwm->fade_time = 0; pwm->brightness = 0; pwm->desired_brightness = 0; pwm->running = false; pwm->enabled = false; INIT_WORK(&pwm->work, lm8323_pwm_work); mutex_init(&pwm->lock); pwm->chip = lm; if (name) { pwm->cdev.name = name; pwm->cdev.brightness_set = lm8323_pwm_set_brightness; if (led_classdev_register(dev, &pwm->cdev) < 0) { dev_err(dev, "couldn't register PWM %d\n", id); return -1; } if (device_create_file(pwm->cdev.dev, &dev_attr_time) < 0) { dev_err(dev, "couldn't register time attribute\n"); led_classdev_unregister(&pwm->cdev); return -1; } pwm->enabled = true; } return 0; } static struct i2c_driver lm8323_i2c_driver; static ssize_t lm8323_show_disable(struct device *dev, struct device_attribute *attr, char *buf) { struct lm8323_chip *lm = dev_get_drvdata(dev); return sprintf(buf, "%u\n", !lm->kp_enabled); } static ssize_t lm8323_set_disable(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { struct lm8323_chip *lm = dev_get_drvdata(dev); int ret; unsigned int i; ret = kstrtouint(buf, 10, &i); mutex_lock(&lm->lock); lm->kp_enabled = !i; mutex_unlock(&lm->lock); return count; } static DEVICE_ATTR(disable_kp, 0644, lm8323_show_disable, lm8323_set_disable); static int lm8323_probe(struct i2c_client *client, const struct i2c_device_id *id) { struct lm8323_platform_data *pdata = client->dev.platform_data; struct input_dev *idev; struct lm8323_chip *lm; int pwm; int i, err; unsigned long tmo; u8 data[2]; if (!pdata || !pdata->size_x || !pdata->size_y) { dev_err(&client->dev, "missing platform_data\n"); return -EINVAL; } if (pdata->size_x > 8) { dev_err(&client->dev, "invalid x size %d specified\n", pdata->size_x); return -EINVAL; } if (pdata->size_y > 12) { dev_err(&client->dev, "invalid y size %d specified\n", pdata->size_y); return -EINVAL; } lm = kzalloc(sizeof *lm, GFP_KERNEL); idev = input_allocate_device(); if (!lm || !idev) { err = -ENOMEM; goto fail1; } lm->client = client; lm->idev = idev; mutex_init(&lm->lock); lm->size_x = pdata->size_x; lm->size_y = pdata->size_y; dev_vdbg(&client->dev, "Keypad size: %d x %d\n", lm->size_x, lm->size_y); lm->debounce_time = pdata->debounce_time; lm->active_time = pdata->active_time; lm8323_reset(lm); /* Nothing's set up to service the IRQ yet, so just spin for max. * 100ms until we can configure. */ tmo = jiffies + msecs_to_jiffies(100); while (lm8323_read(lm, LM8323_CMD_READ_INT, data, 1) == 1) { if (data[0] & INT_NOINIT) break; if (time_after(jiffies, tmo)) { dev_err(&client->dev, "timeout waiting for initialisation\n"); break; } msleep(1); } lm8323_configure(lm); /* If a true probe check the device */ if (lm8323_read_id(lm, data) != 0) { dev_err(&client->dev, "device not found\n"); err = -ENODEV; goto fail1; } for (pwm = 0; pwm < LM8323_NUM_PWMS; pwm++) { err = init_pwm(lm, pwm + 1, &client->dev, pdata->pwm_names[pwm]); if (err < 0) goto fail2; } lm->kp_enabled = true; err = device_create_file(&client->dev, &dev_attr_disable_kp); if (err < 0) goto fail2; idev->name = pdata->name ? : "LM8323 keypad"; snprintf(lm->phys, sizeof(lm->phys), "%s/input-kp", dev_name(&client->dev)); idev->phys = lm->phys; idev->evbit[0] = BIT(EV_KEY) | BIT(EV_MSC); __set_bit(MSC_SCAN, idev->mscbit); for (i = 0; i < LM8323_KEYMAP_SIZE; i++) { __set_bit(pdata->keymap[i], idev->keybit); lm->keymap[i] = pdata->keymap[i]; } __clear_bit(KEY_RESERVED, idev->keybit); if (pdata->repeat) __set_bit(EV_REP, idev->evbit); err = input_register_device(idev); if (err) { dev_dbg(&client->dev, "error registering input device\n"); goto fail3; } err = request_threaded_irq(client->irq, NULL, lm8323_irq, IRQF_TRIGGER_LOW|IRQF_ONESHOT, "lm8323", lm); if (err) { dev_err(&client->dev, "could not get IRQ %d\n", client->irq); goto fail4; } i2c_set_clientdata(client, lm); device_init_wakeup(&client->dev, 1); enable_irq_wake(client->irq); return 0; fail4: input_unregister_device(idev); idev = NULL; fail3: device_remove_file(&client->dev, &dev_attr_disable_kp); fail2: while (--pwm >= 0) if (lm->pwm[pwm].enabled) { device_remove_file(lm->pwm[pwm].cdev.dev, &dev_attr_time); led_classdev_unregister(&lm->pwm[pwm].cdev); } fail1: input_free_device(idev); kfree(lm); return err; } static int lm8323_remove(struct i2c_client *client) { struct lm8323_chip *lm = i2c_get_clientdata(client); int i; disable_irq_wake(client->irq); free_irq(client->irq, lm); input_unregister_device(lm->idev); device_remove_file(&lm->client->dev, &dev_attr_disable_kp); for (i = 0; i < 3; i++) if (lm->pwm[i].enabled) { device_remove_file(lm->pwm[i].cdev.dev, &dev_attr_time); led_classdev_unregister(&lm->pwm[i].cdev); } kfree(lm); return 0; } #ifdef CONFIG_PM_SLEEP /* * We don't need to explicitly suspend the chip, as it already switches off * when there's no activity. */ static int lm8323_suspend(struct device *dev) { struct i2c_client *client = to_i2c_client(dev); struct lm8323_chip *lm = i2c_get_clientdata(client); int i; irq_set_irq_wake(client->irq, 0); disable_irq(client->irq); mutex_lock(&lm->lock); lm->pm_suspend = true; mutex_unlock(&lm->lock); for (i = 0; i < 3; i++) if (lm->pwm[i].enabled) led_classdev_suspend(&lm->pwm[i].cdev); return 0; } static int lm8323_resume(struct device *dev) { struct i2c_client *client = to_i2c_client(dev); struct lm8323_chip *lm = i2c_get_clientdata(client); int i; mutex_lock(&lm->lock); lm->pm_suspend = false; mutex_unlock(&lm->lock); for (i = 0; i < 3; i++) if (lm->pwm[i].enabled) led_classdev_resume(&lm->pwm[i].cdev); enable_irq(client->irq); irq_set_irq_wake(client->irq, 1); return 0; } #endif static SIMPLE_DEV_PM_OPS(lm8323_pm_ops, lm8323_suspend, lm8323_resume); static const struct i2c_device_id lm8323_id[] = { { "lm8323", 0 }, { } }; static struct i2c_driver lm8323_i2c_driver = { .driver = { .name = "lm8323", .pm = &lm8323_pm_ops, }, .probe = lm8323_probe, .remove = lm8323_remove, .id_table = lm8323_id, }; MODULE_DEVICE_TABLE(i2c, lm8323_id); module_i2c_driver(lm8323_i2c_driver); MODULE_AUTHOR("Timo O. Karjalainen <timo.o.karjalainen@nokia.com>"); MODULE_AUTHOR("Daniel Stone"); MODULE_AUTHOR("Felipe Balbi <felipe.balbi@nokia.com>"); MODULE_DESCRIPTION("LM8323 keypad driver"); MODULE_LICENSE("GPL");
gpl-2.0
RaYmunDooo/RaYmunDooo
drivers/acpi/acpica/exregion.c
3221
15317
/****************************************************************************** * * Module Name: exregion - ACPI default op_region (address space) handlers * *****************************************************************************/ /* * Copyright (C) 2000 - 2011, Intel Corp. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions, and the following disclaimer, * without modification. * 2. Redistributions in binary form must reproduce at minimum a disclaimer * substantially similar to the "NO WARRANTY" disclaimer below * ("Disclaimer") and any redistribution must be conditioned upon * including a substantially similar Disclaimer requirement for further * binary redistribution. * 3. Neither the names of the above-listed copyright holders nor the names * of any contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * Alternatively, this software may be distributed under the terms of the * GNU General Public License ("GPL") version 2 as published by the Free * Software Foundation. * * NO WARRANTY * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGES. */ #include <acpi/acpi.h> #include "accommon.h" #include "acinterp.h" #define _COMPONENT ACPI_EXECUTER ACPI_MODULE_NAME("exregion") /******************************************************************************* * * FUNCTION: acpi_ex_system_memory_space_handler * * PARAMETERS: Function - Read or Write operation * Address - Where in the space to read or write * bit_width - Field width in bits (8, 16, or 32) * Value - Pointer to in or out value * handler_context - Pointer to Handler's context * region_context - Pointer to context specific to the * accessed region * * RETURN: Status * * DESCRIPTION: Handler for the System Memory address space (Op Region) * ******************************************************************************/ acpi_status acpi_ex_system_memory_space_handler(u32 function, acpi_physical_address address, u32 bit_width, u64 *value, void *handler_context, void *region_context) { acpi_status status = AE_OK; void *logical_addr_ptr = NULL; struct acpi_mem_space_context *mem_info = region_context; u32 length; acpi_size map_length; acpi_size page_boundary_map_length; #ifdef ACPI_MISALIGNMENT_NOT_SUPPORTED u32 remainder; #endif ACPI_FUNCTION_TRACE(ex_system_memory_space_handler); /* Validate and translate the bit width */ switch (bit_width) { case 8: length = 1; break; case 16: length = 2; break; case 32: length = 4; break; case 64: length = 8; break; default: ACPI_ERROR((AE_INFO, "Invalid SystemMemory width %u", bit_width)); return_ACPI_STATUS(AE_AML_OPERAND_VALUE); } #ifdef ACPI_MISALIGNMENT_NOT_SUPPORTED /* * Hardware does not support non-aligned data transfers, we must verify * the request. */ (void)acpi_ut_short_divide((u64) address, length, NULL, &remainder); if (remainder != 0) { return_ACPI_STATUS(AE_AML_ALIGNMENT); } #endif /* * Does the request fit into the cached memory mapping? * Is 1) Address below the current mapping? OR * 2) Address beyond the current mapping? */ if ((address < mem_info->mapped_physical_address) || (((u64) address + length) > ((u64) mem_info->mapped_physical_address + mem_info->mapped_length))) { /* * The request cannot be resolved by the current memory mapping; * Delete the existing mapping and create a new one. */ if (mem_info->mapped_length) { /* Valid mapping, delete it */ acpi_os_unmap_memory(mem_info->mapped_logical_address, mem_info->mapped_length); } /* * Attempt to map from the requested address to the end of the region. * However, we will never map more than one page, nor will we cross * a page boundary. */ map_length = (acpi_size) ((mem_info->address + mem_info->length) - address); /* * If mapping the entire remaining portion of the region will cross * a page boundary, just map up to the page boundary, do not cross. * On some systems, crossing a page boundary while mapping regions * can cause warnings if the pages have different attributes * due to resource management */ page_boundary_map_length = ACPI_ROUND_UP(address, ACPI_DEFAULT_PAGE_SIZE) - address; if (!page_boundary_map_length) { page_boundary_map_length = ACPI_DEFAULT_PAGE_SIZE; } if (map_length > page_boundary_map_length) { map_length = page_boundary_map_length; } /* Create a new mapping starting at the address given */ mem_info->mapped_logical_address = acpi_os_map_memory((acpi_physical_address) address, map_length); if (!mem_info->mapped_logical_address) { ACPI_ERROR((AE_INFO, "Could not map memory at 0x%8.8X%8.8X, size %u", ACPI_FORMAT_NATIVE_UINT(address), (u32) map_length)); mem_info->mapped_length = 0; return_ACPI_STATUS(AE_NO_MEMORY); } /* Save the physical address and mapping size */ mem_info->mapped_physical_address = address; mem_info->mapped_length = map_length; } /* * Generate a logical pointer corresponding to the address we want to * access */ logical_addr_ptr = mem_info->mapped_logical_address + ((u64) address - (u64) mem_info->mapped_physical_address); ACPI_DEBUG_PRINT((ACPI_DB_INFO, "System-Memory (width %u) R/W %u Address=%8.8X%8.8X\n", bit_width, function, ACPI_FORMAT_NATIVE_UINT(address))); /* * Perform the memory read or write * * Note: For machines that do not support non-aligned transfers, the target * address was checked for alignment above. We do not attempt to break the * transfer up into smaller (byte-size) chunks because the AML specifically * asked for a transfer width that the hardware may require. */ switch (function) { case ACPI_READ: *value = 0; switch (bit_width) { case 8: *value = (u64) ACPI_GET8(logical_addr_ptr); break; case 16: *value = (u64) ACPI_GET16(logical_addr_ptr); break; case 32: *value = (u64) ACPI_GET32(logical_addr_ptr); break; case 64: *value = (u64) ACPI_GET64(logical_addr_ptr); break; default: /* bit_width was already validated */ break; } break; case ACPI_WRITE: switch (bit_width) { case 8: ACPI_SET8(logical_addr_ptr) = (u8) * value; break; case 16: ACPI_SET16(logical_addr_ptr) = (u16) * value; break; case 32: ACPI_SET32(logical_addr_ptr) = (u32) * value; break; case 64: ACPI_SET64(logical_addr_ptr) = (u64) * value; break; default: /* bit_width was already validated */ break; } break; default: status = AE_BAD_PARAMETER; break; } return_ACPI_STATUS(status); } /******************************************************************************* * * FUNCTION: acpi_ex_system_io_space_handler * * PARAMETERS: Function - Read or Write operation * Address - Where in the space to read or write * bit_width - Field width in bits (8, 16, or 32) * Value - Pointer to in or out value * handler_context - Pointer to Handler's context * region_context - Pointer to context specific to the * accessed region * * RETURN: Status * * DESCRIPTION: Handler for the System IO address space (Op Region) * ******************************************************************************/ acpi_status acpi_ex_system_io_space_handler(u32 function, acpi_physical_address address, u32 bit_width, u64 *value, void *handler_context, void *region_context) { acpi_status status = AE_OK; u32 value32; ACPI_FUNCTION_TRACE(ex_system_io_space_handler); ACPI_DEBUG_PRINT((ACPI_DB_INFO, "System-IO (width %u) R/W %u Address=%8.8X%8.8X\n", bit_width, function, ACPI_FORMAT_NATIVE_UINT(address))); /* Decode the function parameter */ switch (function) { case ACPI_READ: status = acpi_hw_read_port((acpi_io_address) address, &value32, bit_width); *value = value32; break; case ACPI_WRITE: status = acpi_hw_write_port((acpi_io_address) address, (u32) * value, bit_width); break; default: status = AE_BAD_PARAMETER; break; } return_ACPI_STATUS(status); } /******************************************************************************* * * FUNCTION: acpi_ex_pci_config_space_handler * * PARAMETERS: Function - Read or Write operation * Address - Where in the space to read or write * bit_width - Field width in bits (8, 16, or 32) * Value - Pointer to in or out value * handler_context - Pointer to Handler's context * region_context - Pointer to context specific to the * accessed region * * RETURN: Status * * DESCRIPTION: Handler for the PCI Config address space (Op Region) * ******************************************************************************/ acpi_status acpi_ex_pci_config_space_handler(u32 function, acpi_physical_address address, u32 bit_width, u64 *value, void *handler_context, void *region_context) { acpi_status status = AE_OK; struct acpi_pci_id *pci_id; u16 pci_register; ACPI_FUNCTION_TRACE(ex_pci_config_space_handler); /* * The arguments to acpi_os(Read|Write)pci_configuration are: * * pci_segment is the PCI bus segment range 0-31 * pci_bus is the PCI bus number range 0-255 * pci_device is the PCI device number range 0-31 * pci_function is the PCI device function number * pci_register is the Config space register range 0-255 bytes * * Value - input value for write, output address for read * */ pci_id = (struct acpi_pci_id *)region_context; pci_register = (u16) (u32) address; ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Pci-Config %u (%u) Seg(%04x) Bus(%04x) Dev(%04x) Func(%04x) Reg(%04x)\n", function, bit_width, pci_id->segment, pci_id->bus, pci_id->device, pci_id->function, pci_register)); switch (function) { case ACPI_READ: status = acpi_os_read_pci_configuration(pci_id, pci_register, value, bit_width); break; case ACPI_WRITE: status = acpi_os_write_pci_configuration(pci_id, pci_register, *value, bit_width); break; default: status = AE_BAD_PARAMETER; break; } return_ACPI_STATUS(status); } /******************************************************************************* * * FUNCTION: acpi_ex_cmos_space_handler * * PARAMETERS: Function - Read or Write operation * Address - Where in the space to read or write * bit_width - Field width in bits (8, 16, or 32) * Value - Pointer to in or out value * handler_context - Pointer to Handler's context * region_context - Pointer to context specific to the * accessed region * * RETURN: Status * * DESCRIPTION: Handler for the CMOS address space (Op Region) * ******************************************************************************/ acpi_status acpi_ex_cmos_space_handler(u32 function, acpi_physical_address address, u32 bit_width, u64 *value, void *handler_context, void *region_context) { acpi_status status = AE_OK; ACPI_FUNCTION_TRACE(ex_cmos_space_handler); return_ACPI_STATUS(status); } /******************************************************************************* * * FUNCTION: acpi_ex_pci_bar_space_handler * * PARAMETERS: Function - Read or Write operation * Address - Where in the space to read or write * bit_width - Field width in bits (8, 16, or 32) * Value - Pointer to in or out value * handler_context - Pointer to Handler's context * region_context - Pointer to context specific to the * accessed region * * RETURN: Status * * DESCRIPTION: Handler for the PCI bar_target address space (Op Region) * ******************************************************************************/ acpi_status acpi_ex_pci_bar_space_handler(u32 function, acpi_physical_address address, u32 bit_width, u64 *value, void *handler_context, void *region_context) { acpi_status status = AE_OK; ACPI_FUNCTION_TRACE(ex_pci_bar_space_handler); return_ACPI_STATUS(status); } /******************************************************************************* * * FUNCTION: acpi_ex_data_table_space_handler * * PARAMETERS: Function - Read or Write operation * Address - Where in the space to read or write * bit_width - Field width in bits (8, 16, or 32) * Value - Pointer to in or out value * handler_context - Pointer to Handler's context * region_context - Pointer to context specific to the * accessed region * * RETURN: Status * * DESCRIPTION: Handler for the Data Table address space (Op Region) * ******************************************************************************/ acpi_status acpi_ex_data_table_space_handler(u32 function, acpi_physical_address address, u32 bit_width, u64 *value, void *handler_context, void *region_context) { ACPI_FUNCTION_TRACE(ex_data_table_space_handler); /* * Perform the memory read or write. The bit_width was already * validated. */ switch (function) { case ACPI_READ: ACPI_MEMCPY(ACPI_CAST_PTR(char, value), ACPI_PHYSADDR_TO_PTR(address), ACPI_DIV_8(bit_width)); break; case ACPI_WRITE: ACPI_MEMCPY(ACPI_PHYSADDR_TO_PTR(address), ACPI_CAST_PTR(char, value), ACPI_DIV_8(bit_width)); break; default: return_ACPI_STATUS(AE_BAD_PARAMETER); } return_ACPI_STATUS(AE_OK); }
gpl-2.0
attn1/android_kernel_pantech_oscar
drivers/input/touchscreen/synaptics/rmi_f19.c
3733
19210
/** * * Synaptics Register Mapped Interface (RMI4) Function $11 support for 2D. * Copyright (c) 2007 - 2011, Synaptics Incorporated * */ /* * This file is licensed under the GPL2 license. * *############################################################################# * GPL * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 as published * by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License * for more details. * *############################################################################# */ #include <linux/kernel.h> #include <linux/device.h> #include <linux/delay.h> #include <linux/kthread.h> #include <linux/freezer.h> #include <linux/input.h> #include <linux/slab.h> #include <linux/input/rmi_platformdata.h> #include <linux/module.h> #include "rmi.h" #include "rmi_drvr.h" #include "rmi_bus.h" #include "rmi_sensor.h" #include "rmi_function.h" #include "rmi_f19.h" struct f19_instance_data { struct rmi_F19_query *deviceInfo; struct rmi_F19_control *controlRegisters; bool *buttonDown; unsigned char buttonDataBufferSize; unsigned char *buttonDataBuffer; unsigned char *buttonMap; int fn19ControlRegisterSize; int fn19regCountForBitPerButton; int fn19btnUsageandfilterModeOffset; int fn19intEnableOffset; int fn19intEnableLen; int fn19singleBtnCtrlLen; int fn19singleBtnCtrlOffset; int fn19sensorMapCtrlOffset; int fn19sensorMapCtrlLen; int fn19singleBtnSensOffset; int fn19singleBtnSensLen; int fn19globalSensOffset; int fn19globalHystThreshOffset; }; static ssize_t rmi_f19_buttonCount_show(struct device *dev, struct device_attribute *attr, char *buf); static ssize_t rmi_f19_buttonCount_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count); DEVICE_ATTR(buttonCount, 0444, rmi_f19_buttonCount_show, rmi_f19_buttonCount_store); /* RO attr */ static ssize_t rmi_f19_buttonMap_show(struct device *dev, struct device_attribute *attr, char *buf); static ssize_t rmi_f19_buttonMap_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count); DEVICE_ATTR(buttonMap, 0664, rmi_f19_buttonMap_show, rmi_f19_buttonMap_store); /* RW attr */ /* * There is no attention function for F19 - it is left NULL * in the function table so it is not called. * */ /* * This reads in a sample and reports the F19 source data to the * input subsystem. It is used for both polling and interrupt driven * operation. This is called a lot so don't put in any informational * printks since they will slow things way down! */ void FN_19_inthandler(struct rmi_function_info *rmifninfo, unsigned int assertedIRQs) { struct rmi_function_device *function_device; struct f19_instance_data *instanceData; int button; instanceData = (struct f19_instance_data *) rmifninfo->fndata; function_device = rmifninfo->function_device; /* Read the button data. */ if (rmi_read_multiple(rmifninfo->sensor, rmifninfo->funcDescriptor.dataBaseAddr, instanceData->buttonDataBuffer, instanceData->buttonDataBufferSize)) { printk(KERN_ERR "%s: Failed to read button data registers.\n", __func__); return; } /* Generate events for buttons that change state. */ for (button = 0; button < instanceData->deviceInfo->buttonCount; button++) { int buttonReg; int buttonShift; bool buttonStatus; /* determine which data byte the button status is in */ buttonReg = button/4; /* bit shift to get button's status */ buttonShift = button % 8; buttonStatus = ((instanceData->buttonDataBuffer[buttonReg] >> buttonShift) & 0x01) != 0; /* if the button state changed from the last time report it and store the new state */ if (buttonStatus != instanceData->buttonDown[button]) { printk(KERN_DEBUG "%s: Button %d (code %d) -> %d.", __func__, button, instanceData->buttonMap[button], buttonStatus); /* Generate an event here. */ input_report_key(function_device->input, instanceData->buttonMap[button], buttonStatus); instanceData->buttonDown[button] = buttonStatus; } } input_sync(function_device->input); /* sync after groups of events */ } EXPORT_SYMBOL(FN_19_inthandler); int FN_19_config(struct rmi_function_info *rmifninfo) { int retval = 0; pr_debug("%s: RMI4 F19 config\n", __func__); /* TODO: Perform configuration. In particular, write any cached control * register values to the device. */ return retval; } EXPORT_SYMBOL(FN_19_config); /* Initialize any F19 specific params and settings - input * settings, device settings, etc. */ int FN_19_init(struct rmi_function_device *function_device) { int i, retval = 0; struct f19_instance_data *instance_data = function_device->rfi->fndata; struct rmi_f19_functiondata *functiondata = rmi_sensor_get_functiondata(function_device->sensor, RMI_F19_INDEX); printk(KERN_DEBUG "%s: RMI4 F19 init\n", __func__); if (functiondata) { if (functiondata->button_map) { if (functiondata->button_map->nbuttons != instance_data->deviceInfo->buttonCount) { printk(KERN_WARNING "%s: Platformdata button map size (%d) != number of buttons on device (%d) - ignored.", __func__, functiondata->button_map->nbuttons, instance_data->deviceInfo->buttonCount); } else if (!functiondata->button_map->map) { printk(KERN_WARNING "%s: Platformdata button map is missing!", __func__); } else { for (i = 0; i < functiondata->button_map->nbuttons; i++) instance_data->buttonMap[i] = functiondata->button_map->map[i]; } } } /* Set up any input events. */ set_bit(EV_SYN, function_device->input->evbit); set_bit(EV_KEY, function_device->input->evbit); /* set bits for each button...*/ for (i = 0; i < instance_data->deviceInfo->buttonCount; i++) { set_bit(instance_data->buttonMap[i], function_device->input->keybit); } printk(KERN_DEBUG "%s: Creating sysfs files.", __func__); retval = device_create_file(&function_device->dev, &dev_attr_buttonCount); if (retval) { printk(KERN_ERR "%s: Failed to create button count.", __func__); return retval; } retval = device_create_file(&function_device->dev, &dev_attr_buttonMap); if (retval) { printk(KERN_ERR "%s: Failed to create button map.", __func__); return retval; } return 0; } EXPORT_SYMBOL(FN_19_init); static int getControlRegisters(struct rmi_function_info *rmifninfo, struct rmi_function_descriptor *fndescr) { struct f19_instance_data *instanceData; unsigned char *fn19Control = NULL; int retval = 0; /* Get the instance data - it should have been allocated and stored in detect.*/ instanceData = rmifninfo->fndata; /* Check to make sure instanceData is really there before using.*/ if (!instanceData) { printk(KERN_ERR "%s: Error - instance data not initialized yet when getting fn19 control registers.\n", __func__); return -EINVAL; } /* Allocate memory for the control registers. */ instanceData->controlRegisters = kzalloc(sizeof(struct rmi_F19_control), GFP_KERNEL); if (!instanceData->controlRegisters) { printk(KERN_ERR "%s: Error allocating F19 control registers.\n", __func__); return -ENOMEM; } instanceData->fn19regCountForBitPerButton = (instanceData->deviceInfo->buttonCount + 7)/8; /* Need to compute the amount of data to read since it varies with the * number of buttons */ instanceData->fn19ControlRegisterSize = 1 /* 1 for filter mode and button usage bits */ + 2*instanceData->fn19regCountForBitPerButton /* interrupt enable bits and single button participation bits */ + 2*instanceData->deviceInfo->buttonCount /* sensormap registers + single button sensitivity registers */ + 2; /* 1 for global sensitivity adjust + 1 for global hysteresis threshold */ /* Allocate a temp memory buffer to read the control registers into */ fn19Control = kzalloc(instanceData->fn19ControlRegisterSize, GFP_KERNEL); if (!fn19Control) { printk(KERN_ERR "%s: Error allocating temp storage to read fn19 control info.\n", __func__); return -ENOMEM; } /* Grab a copy of the control registers. */ retval = rmi_read_multiple(rmifninfo->sensor, fndescr->controlBaseAddr, fn19Control, instanceData->fn19ControlRegisterSize); if (retval) { printk(KERN_ERR "%s: Failed to read F19 control registers.", __func__); return retval; } /* Copy over control registers data to the instance data */ instanceData->fn19btnUsageandfilterModeOffset = 0; instanceData->controlRegisters->buttonUsage = fn19Control[instanceData->fn19btnUsageandfilterModeOffset] & 0x3; instanceData->controlRegisters->filterMode = fn19Control[instanceData->fn19btnUsageandfilterModeOffset] & 0xc; /* Fill in interrupt enable registers */ instanceData->fn19intEnableOffset = 1; instanceData->fn19intEnableLen = instanceData->fn19regCountForBitPerButton; instanceData->controlRegisters->intEnableRegisters = kzalloc(instanceData->fn19intEnableLen, GFP_KERNEL); if (!instanceData->controlRegisters->intEnableRegisters) { printk(KERN_ERR "%s: Error allocating storage for interrupt enable control info.\n", __func__); return -ENOMEM; } memcpy(instanceData->controlRegisters->intEnableRegisters, &fn19Control[instanceData->fn19intEnableOffset], instanceData->fn19intEnableLen); /* Fill in single button control registers */ instanceData->fn19singleBtnCtrlOffset = instanceData->fn19intEnableOffset + instanceData->fn19intEnableLen; instanceData->fn19singleBtnCtrlLen = instanceData->fn19regCountForBitPerButton; instanceData->controlRegisters->singleButtonControl = kzalloc(instanceData->fn19singleBtnCtrlLen, GFP_KERNEL); if (!instanceData->controlRegisters->singleButtonControl) { printk(KERN_ERR "%s: Error allocating storage for single button participation control info.\n", __func__); return -ENOMEM; } memcpy(instanceData->controlRegisters->singleButtonControl, &fn19Control[instanceData->fn19singleBtnCtrlOffset], instanceData->fn19singleBtnCtrlLen); /* Fill in sensor map registers */ instanceData->fn19sensorMapCtrlOffset = instanceData->fn19singleBtnCtrlOffset + instanceData->fn19singleBtnCtrlLen; instanceData->fn19sensorMapCtrlLen = instanceData->deviceInfo->buttonCount; instanceData->controlRegisters->sensorMap = kzalloc(instanceData->fn19sensorMapCtrlLen, GFP_KERNEL); if (!instanceData->controlRegisters->sensorMap) { printk(KERN_ERR "%s: Error allocating storage for sensor map control info.\n", __func__); return -ENOMEM; } memcpy(instanceData->controlRegisters->sensorMap, &fn19Control[instanceData->fn19sensorMapCtrlOffset], instanceData->fn19sensorMapCtrlLen); /* Fill in single button sensitivity registers */ instanceData->fn19singleBtnSensOffset = instanceData->fn19sensorMapCtrlOffset + instanceData->fn19sensorMapCtrlLen; instanceData->fn19singleBtnSensLen = instanceData->deviceInfo->buttonCount; instanceData->controlRegisters->singleButtonSensitivity = kzalloc(instanceData->fn19singleBtnSensLen, GFP_KERNEL); if (!instanceData->controlRegisters->intEnableRegisters) { printk(KERN_ERR "%s: Error allocating storage for single button sensitivity control info.\n", __func__); return -ENOMEM; } memcpy(instanceData->controlRegisters->singleButtonSensitivity, &fn19Control[instanceData->fn19singleBtnSensOffset], instanceData->fn19singleBtnSensLen); /* Fill in global sensitivity adjustment and global hysteresis threshold values */ instanceData->fn19globalSensOffset = instanceData->fn19singleBtnSensOffset + instanceData->fn19singleBtnSensLen; instanceData->fn19globalHystThreshOffset = instanceData->fn19globalSensOffset + 1; instanceData->controlRegisters->globalSensitivityAdjustment = fn19Control[instanceData->fn19globalSensOffset] & 0x1f; instanceData->controlRegisters->globalHysteresisThreshold = fn19Control[instanceData->fn19globalHystThreshOffset] & 0x0f; /* Free up temp storage that held copy of control registers */ kfree(fn19Control); return 0; } int FN_19_detect(struct rmi_function_info *rmifninfo, struct rmi_function_descriptor *fndescr, unsigned int interruptCount) { unsigned char fn19queries[2]; int retval = 0; int i; struct f19_instance_data *instanceData; int fn19InterruptOffset; printk(KERN_DEBUG "%s: RMI4 F19 detect\n", __func__); instanceData = kzalloc(sizeof(struct f19_instance_data), GFP_KERNEL); if (!instanceData) { printk(KERN_ERR "%s: Error allocating F19 instance data.\n", __func__); return -ENOMEM; } instanceData->deviceInfo = kzalloc(sizeof(struct rmi_F19_query), GFP_KERNEL); if (!instanceData->deviceInfo) { printk(KERN_ERR "%s: Error allocating F19 device query.\n", __func__); return -ENOMEM; } rmifninfo->fndata = instanceData; /* Store addresses - used elsewhere to read data, * control, query, etc. */ rmifninfo->funcDescriptor.queryBaseAddr = fndescr->queryBaseAddr; rmifninfo->funcDescriptor.commandBaseAddr = fndescr->commandBaseAddr; rmifninfo->funcDescriptor.controlBaseAddr = fndescr->controlBaseAddr; rmifninfo->funcDescriptor.dataBaseAddr = fndescr->dataBaseAddr; rmifninfo->funcDescriptor.interruptSrcCnt = fndescr->interruptSrcCnt; rmifninfo->funcDescriptor.functionNum = fndescr->functionNum; rmifninfo->numSources = fndescr->interruptSrcCnt; /* need to get number of fingers supported, data size, etc. - to be used when getting data since the number of registers to read depends on the number of fingers supported and data size. */ retval = rmi_read_multiple(rmifninfo->sensor, fndescr->queryBaseAddr, fn19queries, sizeof(fn19queries)); if (retval) { printk(KERN_ERR "%s: RMI4 F19 detect: " "Could not read function query registers 0x%x\n", __func__, rmifninfo->funcDescriptor.queryBaseAddr); return retval; } /* Extract device data. */ instanceData->deviceInfo->configurable = fn19queries[0] & 0x01; instanceData->deviceInfo->hasSensitivityAdjust = fn19queries[0] & 0x02; instanceData->deviceInfo->hasHysteresisThreshold = fn19queries[0] & 0x04; instanceData->deviceInfo->buttonCount = fn19queries[1] & 0x01F; printk(KERN_DEBUG "%s: F19 device - %d buttons...", __func__, instanceData->deviceInfo->buttonCount); /* Need to get interrupt info to be used later when handling interrupts. */ rmifninfo->interruptRegister = interruptCount/8; /* loop through interrupts for each source in fn $11 and or in a bit to the interrupt mask for each. */ fn19InterruptOffset = interruptCount % 8; for (i = fn19InterruptOffset; i < ((fndescr->interruptSrcCnt & 0x7) + fn19InterruptOffset); i++) rmifninfo->interruptMask |= 1 << i; /* Figure out just how much data we'll need to read. */ instanceData->buttonDown = kcalloc(instanceData->deviceInfo->buttonCount, sizeof(bool), GFP_KERNEL); if (!instanceData->buttonDown) { printk(KERN_ERR "%s: Error allocating F19 button state buffer.\n", __func__); return -ENOMEM; } instanceData->buttonDataBufferSize = (instanceData->deviceInfo->buttonCount + 7) / 8; instanceData->buttonDataBuffer = kcalloc(instanceData->buttonDataBufferSize, sizeof(unsigned char), GFP_KERNEL); if (!instanceData->buttonDataBuffer) { printk(KERN_ERR "%s: Failed to allocate button data buffer.", __func__); return -ENOMEM; } instanceData->buttonMap = kcalloc(instanceData->deviceInfo->buttonCount, sizeof(unsigned char), GFP_KERNEL); if (!instanceData->buttonMap) { printk(KERN_ERR "%s: Error allocating F19 button map.\n", __func__); return -ENOMEM; } for (i = 0; i < instanceData->deviceInfo->buttonCount; i++) instanceData->buttonMap[i] = BTN_0 + i; /* default values */ /* Grab the control register info. */ retval = getControlRegisters(rmifninfo, fndescr); if (retval) { printk(KERN_ERR "%s: Error %d getting fn19 control register info.\n", __func__, retval); return retval; } return 0; } EXPORT_SYMBOL(FN_19_detect); static ssize_t rmi_f19_buttonCount_show(struct device *dev, struct device_attribute *attr, char *buf) { struct rmi_function_device *fn = dev_get_drvdata(dev); struct f19_instance_data *instance_data = (struct f19_instance_data *)fn->rfi->fndata; return sprintf(buf, "%u\n", instance_data->deviceInfo->buttonCount); } static ssize_t rmi_f19_buttonCount_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { /* Not allowed. */ return -EPERM; } static ssize_t rmi_f19_buttonMap_show(struct device *dev, struct device_attribute *attr, char *buf) { struct rmi_function_device *fn = dev_get_drvdata(dev); struct f19_instance_data *instance_data = (struct f19_instance_data *)fn->rfi->fndata; int i, len, totalLen = 0; /* loop through each button map value and copy it's string representation into buf */ for (i = 0; i < instance_data->deviceInfo->buttonCount; i++) { /* get next button mapping value and write it to buf */ len = sprintf(buf, "%u ", instance_data->buttonMap[i]); /* bump up ptr to next location in buf if the sprintf was valid */ if (len > 0) { buf += len; totalLen += len; } } return totalLen; } static ssize_t rmi_f19_buttonMap_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { struct rmi_function_device *fn = dev_get_drvdata(dev); struct f19_instance_data *instance_data = (struct f19_instance_data *)fn->rfi->fndata; unsigned int button; int i; int retval = count; int buttonCount = 0; unsigned char *tmpButtonMap; /* Do validation on the button map data passed in. */ /* Store button mappings into a temp buffer and then verify button count and data prior to clearing out old button mappings and storing the new ones. */ tmpButtonMap = kzalloc(instance_data->deviceInfo->buttonCount, GFP_KERNEL); if (!tmpButtonMap) { printk(KERN_ERR "%s: Error allocating temp button map.\n", __func__); return -ENOMEM; } for (i = 0; i < instance_data->deviceInfo->buttonCount && *buf != 0; i++) { /* get next button mapping value and store and bump up to point to next item in buf */ sscanf(buf, "%u", &button); /* Make sure the key is a valid key */ if (button > KEY_MAX) { printk(KERN_ERR "%s: Error - button map for button %d is not a valid value 0x%x.\n", __func__, i, button); retval = -EINVAL; goto err_ret; } tmpButtonMap[i] = button; buttonCount++; /* bump up buf to point to next item to read */ while (*buf != 0) { buf++; if (*(buf-1) == ' ') break; } } /* Make sure the button count matches */ if (buttonCount != instance_data->deviceInfo->buttonCount) { printk(KERN_ERR "%s: Error - button map count of %d doesn't match device button count of %d.\n" , __func__, buttonCount, instance_data->deviceInfo->buttonCount); retval = -EINVAL; goto err_ret; } /* Clear out old buttonMap data */ memset(instance_data->buttonMap, 0, buttonCount); /* Loop through the temp buffer and copy the button event and set the key bit for the new mapping. */ for (i = 0; i < buttonCount; i++) { instance_data->buttonMap[i] = tmpButtonMap[1]; set_bit(instance_data->buttonMap[i], fn->input->keybit); } err_ret: kfree(tmpButtonMap); return retval; }
gpl-2.0
AOKP/kernel_sony_msm8x60
arch/mips/jz4740/timer.c
7573
1470
/* * Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de> * JZ4740 platform timer support * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. * * You should have received a copy of the GNU General Public License along * with this program; if not, write to the Free Software Foundation, Inc., * 675 Mass Ave, Cambridge, MA 02139, USA. * */ #include <linux/io.h> #include <linux/kernel.h> #include <linux/module.h> #include "timer.h" #include <asm/mach-jz4740/base.h> void __iomem *jz4740_timer_base; void jz4740_timer_enable_watchdog(void) { writel(BIT(16), jz4740_timer_base + JZ_REG_TIMER_STOP_CLEAR); } EXPORT_SYMBOL_GPL(jz4740_timer_enable_watchdog); void jz4740_timer_disable_watchdog(void) { writel(BIT(16), jz4740_timer_base + JZ_REG_TIMER_STOP_SET); } EXPORT_SYMBOL_GPL(jz4740_timer_disable_watchdog); void __init jz4740_timer_init(void) { jz4740_timer_base = ioremap(JZ4740_TCU_BASE_ADDR, 0x100); if (!jz4740_timer_base) panic("Failed to ioremap timer registers"); /* Disable all timer clocks except for those used as system timers */ writel(0x000100fc, jz4740_timer_base + JZ_REG_TIMER_STOP_SET); /* Timer irqs are unmasked by default, mask them */ writel(0x00ff00ff, jz4740_timer_base + JZ_REG_TIMER_MASK_SET); }
gpl-2.0
T-Macgnolia/android_kernel_lge_g4stylus-stock
arch/alpha/kernel/core_irongate.c
8341
10512
/* * linux/arch/alpha/kernel/core_irongate.c * * Based on code written by David A. Rusling (david.rusling@reo.mts.dec.com). * * Copyright (C) 1999 Alpha Processor, Inc., * (David Daniel, Stig Telfer, Soohoon Lee) * * Code common to all IRONGATE core logic chips. */ #define __EXTERN_INLINE inline #include <asm/io.h> #include <asm/core_irongate.h> #undef __EXTERN_INLINE #include <linux/types.h> #include <linux/pci.h> #include <linux/sched.h> #include <linux/init.h> #include <linux/initrd.h> #include <linux/bootmem.h> #include <asm/ptrace.h> #include <asm/pci.h> #include <asm/cacheflush.h> #include <asm/tlbflush.h> #include "proto.h" #include "pci_impl.h" /* * BIOS32-style PCI interface: */ #define DEBUG_CONFIG 0 #if DEBUG_CONFIG # define DBG_CFG(args) printk args #else # define DBG_CFG(args) #endif igcsr32 *IronECC; /* * Given a bus, device, and function number, compute resulting * configuration space address accordingly. It is therefore not safe * to have concurrent invocations to configuration space access * routines, but there really shouldn't be any need for this. * * addr[31:24] reserved * addr[23:16] bus number (8 bits = 128 possible buses) * addr[15:11] Device number (5 bits) * addr[10: 8] function number * addr[ 7: 2] register number * * For IRONGATE: * if (bus = addr[23:16]) == 0 * then * type 0 config cycle: * addr_on_pci[31:11] = id selection for device = addr[15:11] * addr_on_pci[10: 2] = addr[10: 2] ??? * addr_on_pci[ 1: 0] = 00 * else * type 1 config cycle (pass on with no decoding): * addr_on_pci[31:24] = 0 * addr_on_pci[23: 2] = addr[23: 2] * addr_on_pci[ 1: 0] = 01 * fi * * Notes: * The function number selects which function of a multi-function device * (e.g., SCSI and Ethernet). * * The register selects a DWORD (32 bit) register offset. Hence it * doesn't get shifted by 2 bits as we want to "drop" the bottom two * bits. */ static int mk_conf_addr(struct pci_bus *pbus, unsigned int device_fn, int where, unsigned long *pci_addr, unsigned char *type1) { unsigned long addr; u8 bus = pbus->number; DBG_CFG(("mk_conf_addr(bus=%d ,device_fn=0x%x, where=0x%x, " "pci_addr=0x%p, type1=0x%p)\n", bus, device_fn, where, pci_addr, type1)); *type1 = (bus != 0); addr = (bus << 16) | (device_fn << 8) | where; addr |= IRONGATE_CONF; *pci_addr = addr; DBG_CFG(("mk_conf_addr: returning pci_addr 0x%lx\n", addr)); return 0; } static int irongate_read_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value) { unsigned long addr; unsigned char type1; if (mk_conf_addr(bus, devfn, where, &addr, &type1)) return PCIBIOS_DEVICE_NOT_FOUND; switch (size) { case 1: *value = __kernel_ldbu(*(vucp)addr); break; case 2: *value = __kernel_ldwu(*(vusp)addr); break; case 4: *value = *(vuip)addr; break; } return PCIBIOS_SUCCESSFUL; } static int irongate_write_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value) { unsigned long addr; unsigned char type1; if (mk_conf_addr(bus, devfn, where, &addr, &type1)) return PCIBIOS_DEVICE_NOT_FOUND; switch (size) { case 1: __kernel_stb(value, *(vucp)addr); mb(); __kernel_ldbu(*(vucp)addr); break; case 2: __kernel_stw(value, *(vusp)addr); mb(); __kernel_ldwu(*(vusp)addr); break; case 4: *(vuip)addr = value; mb(); *(vuip)addr; break; } return PCIBIOS_SUCCESSFUL; } struct pci_ops irongate_pci_ops = { .read = irongate_read_config, .write = irongate_write_config, }; int irongate_pci_clr_err(void) { unsigned int nmi_ctl=0; unsigned int IRONGATE_jd; again: IRONGATE_jd = IRONGATE0->stat_cmd; printk("Iron stat_cmd %x\n", IRONGATE_jd); IRONGATE0->stat_cmd = IRONGATE_jd; /* write again clears error bits */ mb(); IRONGATE_jd = IRONGATE0->stat_cmd; /* re-read to force write */ IRONGATE_jd = *IronECC; printk("Iron ECC %x\n", IRONGATE_jd); *IronECC = IRONGATE_jd; /* write again clears error bits */ mb(); IRONGATE_jd = *IronECC; /* re-read to force write */ /* Clear ALI NMI */ nmi_ctl = inb(0x61); nmi_ctl |= 0x0c; outb(nmi_ctl, 0x61); nmi_ctl &= ~0x0c; outb(nmi_ctl, 0x61); IRONGATE_jd = *IronECC; if (IRONGATE_jd & 0x300) goto again; return 0; } #define IRONGATE_3GB 0xc0000000UL /* On Albacore (aka UP1500) with 4Gb of RAM we have to reserve some memory for PCI. At this point we just reserve memory above 3Gb. Most of this memory will be freed after PCI setup is done. */ static void __init albacore_init_arch(void) { unsigned long memtop = max_low_pfn << PAGE_SHIFT; unsigned long pci_mem = (memtop + 0x1000000UL) & ~0xffffffUL; struct percpu_struct *cpu; int pal_rev, pal_var; cpu = (struct percpu_struct*)((char*)hwrpb + hwrpb->processor_offset); pal_rev = cpu->pal_revision & 0xffff; pal_var = (cpu->pal_revision >> 16) & 0xff; /* Consoles earlier than A5.6-18 (OSF PALcode v1.62-2) set up the CPU incorrectly (leave speculative stores enabled), which causes memory corruption under certain conditions. Issue a warning for such consoles. */ if (alpha_using_srm && (pal_rev < 0x13e || (pal_rev == 0x13e && pal_var < 2))) printk(KERN_WARNING "WARNING! Upgrade to SRM A5.6-19 " "or later\n"); if (pci_mem > IRONGATE_3GB) pci_mem = IRONGATE_3GB; IRONGATE0->pci_mem = pci_mem; alpha_mv.min_mem_address = pci_mem; if (memtop > pci_mem) { #ifdef CONFIG_BLK_DEV_INITRD extern unsigned long initrd_start, initrd_end; extern void *move_initrd(unsigned long); /* Move the initrd out of the way. */ if (initrd_end && __pa(initrd_end) > pci_mem) { unsigned long size; size = initrd_end - initrd_start; free_bootmem_node(NODE_DATA(0), __pa(initrd_start), PAGE_ALIGN(size)); if (!move_initrd(pci_mem)) printk("irongate_init_arch: initrd too big " "(%ldK)\ndisabling initrd\n", size / 1024); } #endif reserve_bootmem_node(NODE_DATA(0), pci_mem, memtop - pci_mem, BOOTMEM_DEFAULT); printk("irongate_init_arch: temporarily reserving " "region %08lx-%08lx for PCI\n", pci_mem, memtop - 1); } } static void __init irongate_setup_agp(void) { /* Disable the GART window. AGPGART doesn't work due to yet unresolved memory coherency issues... */ IRONGATE0->agpva = IRONGATE0->agpva & ~0xf; alpha_agpgart_size = 0; } void __init irongate_init_arch(void) { struct pci_controller *hose; int amd761 = (IRONGATE0->dev_vendor >> 16) > 0x7006; /* Albacore? */ IronECC = amd761 ? &IRONGATE0->bacsr54_eccms761 : &IRONGATE0->dramms; irongate_pci_clr_err(); if (amd761) albacore_init_arch(); irongate_setup_agp(); /* * Create our single hose. */ pci_isa_hose = hose = alloc_pci_controller(); hose->io_space = &ioport_resource; hose->mem_space = &iomem_resource; hose->index = 0; /* This is for userland consumption. For some reason, the 40-bit PIO bias that we use in the kernel through KSEG didn't work for the page table based user mappings. So make sure we get the 43-bit PIO bias. */ hose->sparse_mem_base = 0; hose->sparse_io_base = 0; hose->dense_mem_base = (IRONGATE_MEM & 0xffffffffffUL) | 0x80000000000UL; hose->dense_io_base = (IRONGATE_IO & 0xffffffffffUL) | 0x80000000000UL; hose->sg_isa = hose->sg_pci = NULL; __direct_map_base = 0; __direct_map_size = 0xffffffff; } /* * IO map and AGP support */ #include <linux/vmalloc.h> #include <linux/agp_backend.h> #include <linux/agpgart.h> #include <linux/export.h> #include <asm/pgalloc.h> #define GET_PAGE_DIR_OFF(addr) (addr >> 22) #define GET_PAGE_DIR_IDX(addr) (GET_PAGE_DIR_OFF(addr)) #define GET_GATT_OFF(addr) ((addr & 0x003ff000) >> 12) #define GET_GATT(addr) (gatt_pages[GET_PAGE_DIR_IDX(addr)]) void __iomem * irongate_ioremap(unsigned long addr, unsigned long size) { struct vm_struct *area; unsigned long vaddr; unsigned long baddr, last; u32 *mmio_regs, *gatt_pages, *cur_gatt, pte; unsigned long gart_bus_addr; if (!alpha_agpgart_size) return (void __iomem *)(addr + IRONGATE_MEM); gart_bus_addr = (unsigned long)IRONGATE0->bar0 & PCI_BASE_ADDRESS_MEM_MASK; /* * Check for within the AGP aperture... */ do { /* * Check the AGP area */ if (addr >= gart_bus_addr && addr + size - 1 < gart_bus_addr + alpha_agpgart_size) break; /* * Not found - assume legacy ioremap */ return (void __iomem *)(addr + IRONGATE_MEM); } while(0); mmio_regs = (u32 *)(((unsigned long)IRONGATE0->bar1 & PCI_BASE_ADDRESS_MEM_MASK) + IRONGATE_MEM); gatt_pages = (u32 *)(phys_to_virt(mmio_regs[1])); /* FIXME */ /* * Adjust the limits (mappings must be page aligned) */ if (addr & ~PAGE_MASK) { printk("AGP ioremap failed... addr not page aligned (0x%lx)\n", addr); return (void __iomem *)(addr + IRONGATE_MEM); } last = addr + size - 1; size = PAGE_ALIGN(last) - addr; #if 0 printk("irongate_ioremap(0x%lx, 0x%lx)\n", addr, size); printk("irongate_ioremap: gart_bus_addr 0x%lx\n", gart_bus_addr); printk("irongate_ioremap: gart_aper_size 0x%lx\n", gart_aper_size); printk("irongate_ioremap: mmio_regs %p\n", mmio_regs); printk("irongate_ioremap: gatt_pages %p\n", gatt_pages); for(baddr = addr; baddr <= last; baddr += PAGE_SIZE) { cur_gatt = phys_to_virt(GET_GATT(baddr) & ~1); pte = cur_gatt[GET_GATT_OFF(baddr)] & ~1; printk("irongate_ioremap: cur_gatt %p pte 0x%x\n", cur_gatt, pte); } #endif /* * Map it */ area = get_vm_area(size, VM_IOREMAP); if (!area) return NULL; for(baddr = addr, vaddr = (unsigned long)area->addr; baddr <= last; baddr += PAGE_SIZE, vaddr += PAGE_SIZE) { cur_gatt = phys_to_virt(GET_GATT(baddr) & ~1); pte = cur_gatt[GET_GATT_OFF(baddr)] & ~1; if (__alpha_remap_area_pages(vaddr, pte, PAGE_SIZE, 0)) { printk("AGP ioremap: FAILED to map...\n"); vfree(area->addr); return NULL; } } flush_tlb_all(); vaddr = (unsigned long)area->addr + (addr & ~PAGE_MASK); #if 0 printk("irongate_ioremap(0x%lx, 0x%lx) returning 0x%lx\n", addr, size, vaddr); #endif return (void __iomem *)vaddr; } EXPORT_SYMBOL(irongate_ioremap); void irongate_iounmap(volatile void __iomem *xaddr) { unsigned long addr = (unsigned long) xaddr; if (((long)addr >> 41) == -2) return; /* kseg map, nothing to do */ if (addr) return vfree((void *)(PAGE_MASK & addr)); } EXPORT_SYMBOL(irongate_iounmap);
gpl-2.0
rhcp011235/sgh-t989_kernel
arch/mips/loongson/common/pm.c
10389
3273
/* * loongson-specific suspend support * * Copyright (C) 2009 Lemote Inc. * Author: Wu Zhangjin <wuzhangjin@gmail.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. */ #include <linux/suspend.h> #include <linux/interrupt.h> #include <linux/pm.h> #include <asm/i8259.h> #include <asm/mipsregs.h> #include <loongson.h> static unsigned int __maybe_unused cached_master_mask; /* i8259A */ static unsigned int __maybe_unused cached_slave_mask; static unsigned int __maybe_unused cached_bonito_irq_mask; /* bonito */ void arch_suspend_disable_irqs(void) { /* disable all mips events */ local_irq_disable(); #ifdef CONFIG_I8259 /* disable all events of i8259A */ cached_slave_mask = inb(PIC_SLAVE_IMR); cached_master_mask = inb(PIC_MASTER_IMR); outb(0xff, PIC_SLAVE_IMR); inb(PIC_SLAVE_IMR); outb(0xff, PIC_MASTER_IMR); inb(PIC_MASTER_IMR); #endif /* disable all events of bonito */ cached_bonito_irq_mask = LOONGSON_INTEN; LOONGSON_INTENCLR = 0xffff; (void)LOONGSON_INTENCLR; } void arch_suspend_enable_irqs(void) { /* enable all mips events */ local_irq_enable(); #ifdef CONFIG_I8259 /* only enable the cached events of i8259A */ outb(cached_slave_mask, PIC_SLAVE_IMR); outb(cached_master_mask, PIC_MASTER_IMR); #endif /* enable all cached events of bonito */ LOONGSON_INTENSET = cached_bonito_irq_mask; (void)LOONGSON_INTENSET; } /* * Setup the board-specific events for waking up loongson from wait mode */ void __weak setup_wakeup_events(void) { } /* * Check wakeup events */ int __weak wakeup_loongson(void) { return 1; } /* * If the events are really what we want to wakeup the CPU, wake it up * otherwise put the CPU asleep again. */ static void wait_for_wakeup_events(void) { while (!wakeup_loongson()) LOONGSON_CHIPCFG0 &= ~0x7; } /* * Stop all perf counters * * $24 is the control register of Loongson perf counter */ static inline void stop_perf_counters(void) { __write_64bit_c0_register($24, 0, 0); } static void loongson_suspend_enter(void) { static unsigned int cached_cpu_freq; /* setup wakeup events via enabling the IRQs */ setup_wakeup_events(); stop_perf_counters(); cached_cpu_freq = LOONGSON_CHIPCFG0; /* Put CPU into wait mode */ LOONGSON_CHIPCFG0 &= ~0x7; /* wait for the given events to wakeup cpu from wait mode */ wait_for_wakeup_events(); LOONGSON_CHIPCFG0 = cached_cpu_freq; mmiowb(); } void __weak mach_suspend(void) { } void __weak mach_resume(void) { } static int loongson_pm_enter(suspend_state_t state) { mach_suspend(); /* processor specific suspend */ loongson_suspend_enter(); mach_resume(); return 0; } static int loongson_pm_valid_state(suspend_state_t state) { switch (state) { case PM_SUSPEND_ON: case PM_SUSPEND_STANDBY: case PM_SUSPEND_MEM: return 1; default: return 0; } } static const struct platform_suspend_ops loongson_pm_ops = { .valid = loongson_pm_valid_state, .enter = loongson_pm_enter, }; static int __init loongson_pm_init(void) { suspend_set_ops(&loongson_pm_ops); return 0; } arch_initcall(loongson_pm_init);
gpl-2.0
TeamExodus/kernel_google_msm
net/netfilter/nf_conntrack_broadcast.c
12437
2130
/* * broadcast connection tracking helper * * (c) 2005 Patrick McHardy <kaber@trash.net> * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version * 2 of the License, or (at your option) any later version. */ #include <linux/module.h> #include <linux/ip.h> #include <net/route.h> #include <linux/inetdevice.h> #include <linux/skbuff.h> #include <net/netfilter/nf_conntrack.h> #include <net/netfilter/nf_conntrack_helper.h> #include <net/netfilter/nf_conntrack_expect.h> int nf_conntrack_broadcast_help(struct sk_buff *skb, unsigned int protoff, struct nf_conn *ct, enum ip_conntrack_info ctinfo, unsigned int timeout) { struct nf_conntrack_expect *exp; struct iphdr *iph = ip_hdr(skb); struct rtable *rt = skb_rtable(skb); struct in_device *in_dev; struct nf_conn_help *help = nfct_help(ct); __be32 mask = 0; /* we're only interested in locally generated packets */ if (skb->sk == NULL) goto out; if (rt == NULL || !(rt->rt_flags & RTCF_BROADCAST)) goto out; if (CTINFO2DIR(ctinfo) != IP_CT_DIR_ORIGINAL) goto out; rcu_read_lock(); in_dev = __in_dev_get_rcu(rt->dst.dev); if (in_dev != NULL) { for_primary_ifa(in_dev) { if (ifa->ifa_broadcast == iph->daddr) { mask = ifa->ifa_mask; break; } } endfor_ifa(in_dev); } rcu_read_unlock(); if (mask == 0) goto out; exp = nf_ct_expect_alloc(ct); if (exp == NULL) goto out; exp->tuple = ct->tuplehash[IP_CT_DIR_REPLY].tuple; exp->tuple.src.u.udp.port = help->helper->tuple.src.u.udp.port; exp->mask.src.u3.ip = mask; exp->mask.src.u.udp.port = htons(0xFFFF); exp->expectfn = NULL; exp->flags = NF_CT_EXPECT_PERMANENT; exp->class = NF_CT_EXPECT_CLASS_DEFAULT; exp->helper = NULL; nf_ct_expect_related(exp); nf_ct_expect_put(exp); nf_ct_refresh(ct, skb, timeout * HZ); out: return NF_ACCEPT; } EXPORT_SYMBOL_GPL(nf_conntrack_broadcast_help); MODULE_LICENSE("GPL");
gpl-2.0
TeamExodus/kernel_samsung_msm8930-common
drivers/message/i2o/memory.c
13205
8272
/* * Functions to handle I2O memory * * Pulled from the inlines in i2o headers and uninlined * * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. */ #include <linux/module.h> #include <linux/i2o.h> #include <linux/delay.h> #include <linux/string.h> #include <linux/slab.h> #include "core.h" /* Protects our 32/64bit mask switching */ static DEFINE_MUTEX(mem_lock); /** * i2o_sg_tablesize - Calculate the maximum number of elements in a SGL * @c: I2O controller for which the calculation should be done * @body_size: maximum body size used for message in 32-bit words. * * Return the maximum number of SG elements in a SG list. */ u16 i2o_sg_tablesize(struct i2o_controller *c, u16 body_size) { i2o_status_block *sb = c->status_block.virt; u16 sg_count = (sb->inbound_frame_size - sizeof(struct i2o_message) / 4) - body_size; if (c->pae_support) { /* * for 64-bit a SG attribute element must be added and each * SG element needs 12 bytes instead of 8. */ sg_count -= 2; sg_count /= 3; } else sg_count /= 2; if (c->short_req && (sg_count > 8)) sg_count = 8; return sg_count; } EXPORT_SYMBOL_GPL(i2o_sg_tablesize); /** * i2o_dma_map_single - Map pointer to controller and fill in I2O message. * @c: I2O controller * @ptr: pointer to the data which should be mapped * @size: size of data in bytes * @direction: DMA_TO_DEVICE / DMA_FROM_DEVICE * @sg_ptr: pointer to the SG list inside the I2O message * * This function does all necessary DMA handling and also writes the I2O * SGL elements into the I2O message. For details on DMA handling see also * dma_map_single(). The pointer sg_ptr will only be set to the end of the * SG list if the allocation was successful. * * Returns DMA address which must be checked for failures using * dma_mapping_error(). */ dma_addr_t i2o_dma_map_single(struct i2o_controller *c, void *ptr, size_t size, enum dma_data_direction direction, u32 ** sg_ptr) { u32 sg_flags; u32 *mptr = *sg_ptr; dma_addr_t dma_addr; switch (direction) { case DMA_TO_DEVICE: sg_flags = 0xd4000000; break; case DMA_FROM_DEVICE: sg_flags = 0xd0000000; break; default: return 0; } dma_addr = dma_map_single(&c->pdev->dev, ptr, size, direction); if (!dma_mapping_error(&c->pdev->dev, dma_addr)) { #ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64 if ((sizeof(dma_addr_t) > 4) && c->pae_support) { *mptr++ = cpu_to_le32(0x7C020002); *mptr++ = cpu_to_le32(PAGE_SIZE); } #endif *mptr++ = cpu_to_le32(sg_flags | size); *mptr++ = cpu_to_le32(i2o_dma_low(dma_addr)); #ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64 if ((sizeof(dma_addr_t) > 4) && c->pae_support) *mptr++ = cpu_to_le32(i2o_dma_high(dma_addr)); #endif *sg_ptr = mptr; } return dma_addr; } EXPORT_SYMBOL_GPL(i2o_dma_map_single); /** * i2o_dma_map_sg - Map a SG List to controller and fill in I2O message. * @c: I2O controller * @sg: SG list to be mapped * @sg_count: number of elements in the SG list * @direction: DMA_TO_DEVICE / DMA_FROM_DEVICE * @sg_ptr: pointer to the SG list inside the I2O message * * This function does all necessary DMA handling and also writes the I2O * SGL elements into the I2O message. For details on DMA handling see also * dma_map_sg(). The pointer sg_ptr will only be set to the end of the SG * list if the allocation was successful. * * Returns 0 on failure or 1 on success. */ int i2o_dma_map_sg(struct i2o_controller *c, struct scatterlist *sg, int sg_count, enum dma_data_direction direction, u32 ** sg_ptr) { u32 sg_flags; u32 *mptr = *sg_ptr; switch (direction) { case DMA_TO_DEVICE: sg_flags = 0x14000000; break; case DMA_FROM_DEVICE: sg_flags = 0x10000000; break; default: return 0; } sg_count = dma_map_sg(&c->pdev->dev, sg, sg_count, direction); if (!sg_count) return 0; #ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64 if ((sizeof(dma_addr_t) > 4) && c->pae_support) { *mptr++ = cpu_to_le32(0x7C020002); *mptr++ = cpu_to_le32(PAGE_SIZE); } #endif while (sg_count-- > 0) { if (!sg_count) sg_flags |= 0xC0000000; *mptr++ = cpu_to_le32(sg_flags | sg_dma_len(sg)); *mptr++ = cpu_to_le32(i2o_dma_low(sg_dma_address(sg))); #ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64 if ((sizeof(dma_addr_t) > 4) && c->pae_support) *mptr++ = cpu_to_le32(i2o_dma_high(sg_dma_address(sg))); #endif sg = sg_next(sg); } *sg_ptr = mptr; return 1; } EXPORT_SYMBOL_GPL(i2o_dma_map_sg); /** * i2o_dma_alloc - Allocate DMA memory * @dev: struct device pointer to the PCI device of the I2O controller * @addr: i2o_dma struct which should get the DMA buffer * @len: length of the new DMA memory * * Allocate a coherent DMA memory and write the pointers into addr. * * Returns 0 on success or -ENOMEM on failure. */ int i2o_dma_alloc(struct device *dev, struct i2o_dma *addr, size_t len) { struct pci_dev *pdev = to_pci_dev(dev); int dma_64 = 0; mutex_lock(&mem_lock); if ((sizeof(dma_addr_t) > 4) && (pdev->dma_mask == DMA_BIT_MASK(64))) { dma_64 = 1; if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) { mutex_unlock(&mem_lock); return -ENOMEM; } } addr->virt = dma_alloc_coherent(dev, len, &addr->phys, GFP_KERNEL); if ((sizeof(dma_addr_t) > 4) && dma_64) if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) printk(KERN_WARNING "i2o: unable to set 64-bit DMA"); mutex_unlock(&mem_lock); if (!addr->virt) return -ENOMEM; memset(addr->virt, 0, len); addr->len = len; return 0; } EXPORT_SYMBOL_GPL(i2o_dma_alloc); /** * i2o_dma_free - Free DMA memory * @dev: struct device pointer to the PCI device of the I2O controller * @addr: i2o_dma struct which contains the DMA buffer * * Free a coherent DMA memory and set virtual address of addr to NULL. */ void i2o_dma_free(struct device *dev, struct i2o_dma *addr) { if (addr->virt) { if (addr->phys) dma_free_coherent(dev, addr->len, addr->virt, addr->phys); else kfree(addr->virt); addr->virt = NULL; } } EXPORT_SYMBOL_GPL(i2o_dma_free); /** * i2o_dma_realloc - Realloc DMA memory * @dev: struct device pointer to the PCI device of the I2O controller * @addr: pointer to a i2o_dma struct DMA buffer * @len: new length of memory * * If there was something allocated in the addr, free it first. If len > 0 * than try to allocate it and write the addresses back to the addr * structure. If len == 0 set the virtual address to NULL. * * Returns the 0 on success or negative error code on failure. */ int i2o_dma_realloc(struct device *dev, struct i2o_dma *addr, size_t len) { i2o_dma_free(dev, addr); if (len) return i2o_dma_alloc(dev, addr, len); return 0; } EXPORT_SYMBOL_GPL(i2o_dma_realloc); /* * i2o_pool_alloc - Allocate an slab cache and mempool * @mempool: pointer to struct i2o_pool to write data into. * @name: name which is used to identify cache * @size: size of each object * @min_nr: minimum number of objects * * First allocates a slab cache with name and size. Then allocates a * mempool which uses the slab cache for allocation and freeing. * * Returns 0 on success or negative error code on failure. */ int i2o_pool_alloc(struct i2o_pool *pool, const char *name, size_t size, int min_nr) { pool->name = kmalloc(strlen(name) + 1, GFP_KERNEL); if (!pool->name) goto exit; strcpy(pool->name, name); pool->slab = kmem_cache_create(pool->name, size, 0, SLAB_HWCACHE_ALIGN, NULL); if (!pool->slab) goto free_name; pool->mempool = mempool_create_slab_pool(min_nr, pool->slab); if (!pool->mempool) goto free_slab; return 0; free_slab: kmem_cache_destroy(pool->slab); free_name: kfree(pool->name); exit: return -ENOMEM; } EXPORT_SYMBOL_GPL(i2o_pool_alloc); /* * i2o_pool_free - Free slab cache and mempool again * @mempool: pointer to struct i2o_pool which should be freed * * Note that you have to return all objects to the mempool again before * calling i2o_pool_free(). */ void i2o_pool_free(struct i2o_pool *pool) { mempool_destroy(pool->mempool); kmem_cache_destroy(pool->slab); kfree(pool->name); }; EXPORT_SYMBOL_GPL(i2o_pool_free);
gpl-2.0
drod2169/Linux-3.9.x
drivers/scsi/fnic/fnic_attrs.c
14997
1942
/* * Copyright 2008 Cisco Systems, Inc. All rights reserved. * Copyright 2007 Nuova Systems, Inc. All rights reserved. * * This program is free software; you may redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; version 2 of the License. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ #include <linux/string.h> #include <linux/device.h> #include <scsi/scsi_host.h> #include "fnic.h" static ssize_t fnic_show_state(struct device *dev, struct device_attribute *attr, char *buf) { struct fc_lport *lp = shost_priv(class_to_shost(dev)); struct fnic *fnic = lport_priv(lp); return snprintf(buf, PAGE_SIZE, "%s\n", fnic_state_str[fnic->state]); } static ssize_t fnic_show_drv_version(struct device *dev, struct device_attribute *attr, char *buf) { return snprintf(buf, PAGE_SIZE, "%s\n", DRV_VERSION); } static ssize_t fnic_show_link_state(struct device *dev, struct device_attribute *attr, char *buf) { struct fc_lport *lp = shost_priv(class_to_shost(dev)); return snprintf(buf, PAGE_SIZE, "%s\n", (lp->link_up) ? "Link Up" : "Link Down"); } static DEVICE_ATTR(fnic_state, S_IRUGO, fnic_show_state, NULL); static DEVICE_ATTR(drv_version, S_IRUGO, fnic_show_drv_version, NULL); static DEVICE_ATTR(link_state, S_IRUGO, fnic_show_link_state, NULL); struct device_attribute *fnic_attrs[] = { &dev_attr_fnic_state, &dev_attr_drv_version, &dev_attr_link_state, NULL, };
gpl-2.0
identisoft-rashid/ec3_kernel
drivers/clocksource/time-efm32.c
406
6654
/* * Copyright (C) 2013 Pengutronix * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> * * This program is free software; you can redistribute it and/or modify it under * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt #include <linux/kernel.h> #include <linux/clocksource.h> #include <linux/clockchips.h> #include <linux/irq.h> #include <linux/interrupt.h> #include <linux/of.h> #include <linux/of_address.h> #include <linux/of_irq.h> #include <linux/clk.h> #define TIMERn_CTRL 0x00 #define TIMERn_CTRL_PRESC(val) (((val) & 0xf) << 24) #define TIMERn_CTRL_PRESC_1024 TIMERn_CTRL_PRESC(10) #define TIMERn_CTRL_CLKSEL(val) (((val) & 0x3) << 16) #define TIMERn_CTRL_CLKSEL_PRESCHFPERCLK TIMERn_CTRL_CLKSEL(0) #define TIMERn_CTRL_OSMEN 0x00000010 #define TIMERn_CTRL_MODE(val) (((val) & 0x3) << 0) #define TIMERn_CTRL_MODE_UP TIMERn_CTRL_MODE(0) #define TIMERn_CTRL_MODE_DOWN TIMERn_CTRL_MODE(1) #define TIMERn_CMD 0x04 #define TIMERn_CMD_START 0x00000001 #define TIMERn_CMD_STOP 0x00000002 #define TIMERn_IEN 0x0c #define TIMERn_IF 0x10 #define TIMERn_IFS 0x14 #define TIMERn_IFC 0x18 #define TIMERn_IRQ_UF 0x00000002 #define TIMERn_TOP 0x1c #define TIMERn_CNT 0x24 struct efm32_clock_event_ddata { struct clock_event_device evtdev; void __iomem *base; unsigned periodic_top; }; static void efm32_clock_event_set_mode(enum clock_event_mode mode, struct clock_event_device *evtdev) { struct efm32_clock_event_ddata *ddata = container_of(evtdev, struct efm32_clock_event_ddata, evtdev); switch (mode) { case CLOCK_EVT_MODE_PERIODIC: writel_relaxed(TIMERn_CMD_STOP, ddata->base + TIMERn_CMD); writel_relaxed(ddata->periodic_top, ddata->base + TIMERn_TOP); writel_relaxed(TIMERn_CTRL_PRESC_1024 | TIMERn_CTRL_CLKSEL_PRESCHFPERCLK | TIMERn_CTRL_MODE_DOWN, ddata->base + TIMERn_CTRL); writel_relaxed(TIMERn_CMD_START, ddata->base + TIMERn_CMD); break; case CLOCK_EVT_MODE_ONESHOT: writel_relaxed(TIMERn_CMD_STOP, ddata->base + TIMERn_CMD); writel_relaxed(TIMERn_CTRL_PRESC_1024 | TIMERn_CTRL_CLKSEL_PRESCHFPERCLK | TIMERn_CTRL_OSMEN | TIMERn_CTRL_MODE_DOWN, ddata->base + TIMERn_CTRL); break; case CLOCK_EVT_MODE_UNUSED: case CLOCK_EVT_MODE_SHUTDOWN: writel_relaxed(TIMERn_CMD_STOP, ddata->base + TIMERn_CMD); break; case CLOCK_EVT_MODE_RESUME: break; } } static int efm32_clock_event_set_next_event(unsigned long evt, struct clock_event_device *evtdev) { struct efm32_clock_event_ddata *ddata = container_of(evtdev, struct efm32_clock_event_ddata, evtdev); writel_relaxed(TIMERn_CMD_STOP, ddata->base + TIMERn_CMD); writel_relaxed(evt, ddata->base + TIMERn_CNT); writel_relaxed(TIMERn_CMD_START, ddata->base + TIMERn_CMD); return 0; } static irqreturn_t efm32_clock_event_handler(int irq, void *dev_id) { struct efm32_clock_event_ddata *ddata = dev_id; writel_relaxed(TIMERn_IRQ_UF, ddata->base + TIMERn_IFC); ddata->evtdev.event_handler(&ddata->evtdev); return IRQ_HANDLED; } static struct efm32_clock_event_ddata clock_event_ddata = { .evtdev = { .name = "efm32 clockevent", .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC, .set_mode = efm32_clock_event_set_mode, .set_next_event = efm32_clock_event_set_next_event, .rating = 200, }, }; static struct irqaction efm32_clock_event_irq = { .name = "efm32 clockevent", .flags = IRQF_TIMER, .handler = efm32_clock_event_handler, .dev_id = &clock_event_ddata, }; static int __init efm32_clocksource_init(struct device_node *np) { struct clk *clk; void __iomem *base; unsigned long rate; int ret; clk = of_clk_get(np, 0); if (IS_ERR(clk)) { ret = PTR_ERR(clk); pr_err("failed to get clock for clocksource (%d)\n", ret); goto err_clk_get; } ret = clk_prepare_enable(clk); if (ret) { pr_err("failed to enable timer clock for clocksource (%d)\n", ret); goto err_clk_enable; } rate = clk_get_rate(clk); base = of_iomap(np, 0); if (!base) { ret = -EADDRNOTAVAIL; pr_err("failed to map registers for clocksource\n"); goto err_iomap; } writel_relaxed(TIMERn_CTRL_PRESC_1024 | TIMERn_CTRL_CLKSEL_PRESCHFPERCLK | TIMERn_CTRL_MODE_UP, base + TIMERn_CTRL); writel_relaxed(TIMERn_CMD_START, base + TIMERn_CMD); ret = clocksource_mmio_init(base + TIMERn_CNT, "efm32 timer", DIV_ROUND_CLOSEST(rate, 1024), 200, 16, clocksource_mmio_readl_up); if (ret) { pr_err("failed to init clocksource (%d)\n", ret); goto err_clocksource_init; } return 0; err_clocksource_init: iounmap(base); err_iomap: clk_disable_unprepare(clk); err_clk_enable: clk_put(clk); err_clk_get: return ret; } static int __init efm32_clockevent_init(struct device_node *np) { struct clk *clk; void __iomem *base; unsigned long rate; int irq; int ret; clk = of_clk_get(np, 0); if (IS_ERR(clk)) { ret = PTR_ERR(clk); pr_err("failed to get clock for clockevent (%d)\n", ret); goto err_clk_get; } ret = clk_prepare_enable(clk); if (ret) { pr_err("failed to enable timer clock for clockevent (%d)\n", ret); goto err_clk_enable; } rate = clk_get_rate(clk); base = of_iomap(np, 0); if (!base) { ret = -EADDRNOTAVAIL; pr_err("failed to map registers for clockevent\n"); goto err_iomap; } irq = irq_of_parse_and_map(np, 0); if (!irq) { ret = -ENOENT; pr_err("failed to get irq for clockevent\n"); goto err_get_irq; } writel_relaxed(TIMERn_IRQ_UF, base + TIMERn_IEN); clock_event_ddata.base = base; clock_event_ddata.periodic_top = DIV_ROUND_CLOSEST(rate, 1024 * HZ); clockevents_config_and_register(&clock_event_ddata.evtdev, DIV_ROUND_CLOSEST(rate, 1024), 0xf, 0xffff); setup_irq(irq, &efm32_clock_event_irq); return 0; err_get_irq: iounmap(base); err_iomap: clk_disable_unprepare(clk); err_clk_enable: clk_put(clk); err_clk_get: return ret; } /* * This function asserts that we have exactly one clocksource and one * clock_event_device in the end. */ static void __init efm32_timer_init(struct device_node *np) { static int has_clocksource, has_clockevent; int ret; if (!has_clocksource) { ret = efm32_clocksource_init(np); if (!ret) { has_clocksource = 1; return; } } if (!has_clockevent) { ret = efm32_clockevent_init(np); if (!ret) { has_clockevent = 1; return; } } } CLOCKSOURCE_OF_DECLARE(efm32compat, "efm32,timer", efm32_timer_init); CLOCKSOURCE_OF_DECLARE(efm32, "energymicro,efm32-timer", efm32_timer_init);
gpl-2.0
mitake/linux
arch/sh/kernel/setup.c
2198
8066
/* * arch/sh/kernel/setup.c * * This file handles the architecture-dependent parts of initialization * * Copyright (C) 1999 Niibe Yutaka * Copyright (C) 2002 - 2010 Paul Mundt */ #include <linux/screen_info.h> #include <linux/ioport.h> #include <linux/init.h> #include <linux/initrd.h> #include <linux/bootmem.h> #include <linux/console.h> #include <linux/root_dev.h> #include <linux/utsname.h> #include <linux/nodemask.h> #include <linux/cpu.h> #include <linux/pfn.h> #include <linux/fs.h> #include <linux/mm.h> #include <linux/kexec.h> #include <linux/module.h> #include <linux/smp.h> #include <linux/err.h> #include <linux/crash_dump.h> #include <linux/mmzone.h> #include <linux/clk.h> #include <linux/delay.h> #include <linux/platform_device.h> #include <linux/memblock.h> #include <asm/uaccess.h> #include <asm/io.h> #include <asm/page.h> #include <asm/elf.h> #include <asm/sections.h> #include <asm/irq.h> #include <asm/setup.h> #include <asm/clock.h> #include <asm/smp.h> #include <asm/mmu_context.h> #include <asm/mmzone.h> #include <asm/sparsemem.h> /* * Initialize loops_per_jiffy as 10000000 (1000MIPS). * This value will be used at the very early stage of serial setup. * The bigger value means no problem. */ struct sh_cpuinfo cpu_data[NR_CPUS] __read_mostly = { [0] = { .type = CPU_SH_NONE, .family = CPU_FAMILY_UNKNOWN, .loops_per_jiffy = 10000000, .phys_bits = MAX_PHYSMEM_BITS, }, }; EXPORT_SYMBOL(cpu_data); /* * The machine vector. First entry in .machvec.init, or clobbered by * sh_mv= on the command line, prior to .machvec.init teardown. */ struct sh_machine_vector sh_mv = { .mv_name = "generic", }; EXPORT_SYMBOL(sh_mv); #ifdef CONFIG_VT struct screen_info screen_info; #endif extern int root_mountflags; #define RAMDISK_IMAGE_START_MASK 0x07FF #define RAMDISK_PROMPT_FLAG 0x8000 #define RAMDISK_LOAD_FLAG 0x4000 static char __initdata command_line[COMMAND_LINE_SIZE] = { 0, }; static struct resource code_resource = { .name = "Kernel code", .flags = IORESOURCE_BUSY | IORESOURCE_MEM, }; static struct resource data_resource = { .name = "Kernel data", .flags = IORESOURCE_BUSY | IORESOURCE_MEM, }; static struct resource bss_resource = { .name = "Kernel bss", .flags = IORESOURCE_BUSY | IORESOURCE_MEM, }; unsigned long memory_start; EXPORT_SYMBOL(memory_start); unsigned long memory_end = 0; EXPORT_SYMBOL(memory_end); unsigned long memory_limit = 0; static struct resource mem_resources[MAX_NUMNODES]; int l1i_cache_shape, l1d_cache_shape, l2_cache_shape; static int __init early_parse_mem(char *p) { if (!p) return 1; memory_limit = PAGE_ALIGN(memparse(p, &p)); pr_notice("Memory limited to %ldMB\n", memory_limit >> 20); return 0; } early_param("mem", early_parse_mem); void __init check_for_initrd(void) { #ifdef CONFIG_BLK_DEV_INITRD unsigned long start, end; /* * Check for the rare cases where boot loaders adhere to the boot * ABI. */ if (!LOADER_TYPE || !INITRD_START || !INITRD_SIZE) goto disable; start = INITRD_START + __MEMORY_START; end = start + INITRD_SIZE; if (unlikely(end <= start)) goto disable; if (unlikely(start & ~PAGE_MASK)) { pr_err("initrd must be page aligned\n"); goto disable; } if (unlikely(start < __MEMORY_START)) { pr_err("initrd start (%08lx) < __MEMORY_START(%x)\n", start, __MEMORY_START); goto disable; } if (unlikely(end > memblock_end_of_DRAM())) { pr_err("initrd extends beyond end of memory " "(0x%08lx > 0x%08lx)\ndisabling initrd\n", end, (unsigned long)memblock_end_of_DRAM()); goto disable; } /* * If we got this far in spite of the boot loader's best efforts * to the contrary, assume we actually have a valid initrd and * fix up the root dev. */ ROOT_DEV = Root_RAM0; /* * Address sanitization */ initrd_start = (unsigned long)__va(start); initrd_end = initrd_start + INITRD_SIZE; memblock_reserve(__pa(initrd_start), INITRD_SIZE); return; disable: pr_info("initrd disabled\n"); initrd_start = initrd_end = 0; #endif } void __cpuinit calibrate_delay(void) { struct clk *clk = clk_get(NULL, "cpu_clk"); if (IS_ERR(clk)) panic("Need a sane CPU clock definition!"); loops_per_jiffy = (clk_get_rate(clk) >> 1) / HZ; printk(KERN_INFO "Calibrating delay loop (skipped)... " "%lu.%02lu BogoMIPS PRESET (lpj=%lu)\n", loops_per_jiffy/(500000/HZ), (loops_per_jiffy/(5000/HZ)) % 100, loops_per_jiffy); } void __init __add_active_range(unsigned int nid, unsigned long start_pfn, unsigned long end_pfn) { struct resource *res = &mem_resources[nid]; unsigned long start, end; WARN_ON(res->name); /* max one active range per node for now */ start = start_pfn << PAGE_SHIFT; end = end_pfn << PAGE_SHIFT; res->name = "System RAM"; res->start = start; res->end = end - 1; res->flags = IORESOURCE_MEM | IORESOURCE_BUSY; if (request_resource(&iomem_resource, res)) { pr_err("unable to request memory_resource 0x%lx 0x%lx\n", start_pfn, end_pfn); return; } /* * We don't know which RAM region contains kernel data or * the reserved crashkernel region, so try it repeatedly * and let the resource manager test it. */ request_resource(res, &code_resource); request_resource(res, &data_resource); request_resource(res, &bss_resource); #ifdef CONFIG_KEXEC request_resource(res, &crashk_res); #endif /* * Also make sure that there is a PMB mapping that covers this * range before we attempt to activate it, to avoid reset by MMU. * We can hit this path with NUMA or memory hot-add. */ pmb_bolt_mapping((unsigned long)__va(start), start, end - start, PAGE_KERNEL); memblock_set_node(PFN_PHYS(start_pfn), PFN_PHYS(end_pfn - start_pfn), nid); } void __init __weak plat_early_device_setup(void) { } void __init setup_arch(char **cmdline_p) { enable_mmu(); ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV); printk(KERN_NOTICE "Boot params:\n" "... MOUNT_ROOT_RDONLY - %08lx\n" "... RAMDISK_FLAGS - %08lx\n" "... ORIG_ROOT_DEV - %08lx\n" "... LOADER_TYPE - %08lx\n" "... INITRD_START - %08lx\n" "... INITRD_SIZE - %08lx\n", MOUNT_ROOT_RDONLY, RAMDISK_FLAGS, ORIG_ROOT_DEV, LOADER_TYPE, INITRD_START, INITRD_SIZE); #ifdef CONFIG_BLK_DEV_RAM rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK; rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0); rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0); #endif if (!MOUNT_ROOT_RDONLY) root_mountflags &= ~MS_RDONLY; init_mm.start_code = (unsigned long) _text; init_mm.end_code = (unsigned long) _etext; init_mm.end_data = (unsigned long) _edata; init_mm.brk = (unsigned long) _end; code_resource.start = virt_to_phys(_text); code_resource.end = virt_to_phys(_etext)-1; data_resource.start = virt_to_phys(_etext); data_resource.end = virt_to_phys(_edata)-1; bss_resource.start = virt_to_phys(__bss_start); bss_resource.end = virt_to_phys(__bss_stop)-1; #ifdef CONFIG_CMDLINE_OVERWRITE strlcpy(command_line, CONFIG_CMDLINE, sizeof(command_line)); #else strlcpy(command_line, COMMAND_LINE, sizeof(command_line)); #ifdef CONFIG_CMDLINE_EXTEND strlcat(command_line, " ", sizeof(command_line)); strlcat(command_line, CONFIG_CMDLINE, sizeof(command_line)); #endif #endif /* Save unparsed command line copy for /proc/cmdline */ memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE); *cmdline_p = command_line; parse_early_param(); plat_early_device_setup(); sh_mv_setup(); /* Let earlyprintk output early console messages */ early_platform_driver_probe("earlyprintk", 1, 1); paging_init(); #ifdef CONFIG_DUMMY_CONSOLE conswitchp = &dummy_con; #endif /* Perform the machine specific initialisation */ if (likely(sh_mv.mv_setup)) sh_mv.mv_setup(cmdline_p); plat_smp_setup(); } /* processor boot mode configuration */ int generic_mode_pins(void) { pr_warning("generic_mode_pins(): missing mode pin configuration\n"); return 0; } int test_mode_pin(int pin) { return sh_mv.mv_mode_pins() & pin; }
gpl-2.0
gotokernel/linux-3.14.4-qemu
drivers/atm/firestream.c
2710
55323
/* drivers/atm/firestream.c - FireStream 155 (MB86697) and * FireStream 50 (MB86695) device driver */ /* Written & (C) 2000 by R.E.Wolff@BitWizard.nl * Copied snippets from zatm.c by Werner Almesberger, EPFL LRC/ICA * and ambassador.c Copyright (C) 1995-1999 Madge Networks Ltd */ /* This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA The GNU GPL is contained in /usr/doc/copyright/GPL on a Debian system and in the file COPYING in the Linux kernel source. */ #include <linux/module.h> #include <linux/sched.h> #include <linux/kernel.h> #include <linux/mm.h> #include <linux/pci.h> #include <linux/poison.h> #include <linux/errno.h> #include <linux/atm.h> #include <linux/atmdev.h> #include <linux/sonet.h> #include <linux/skbuff.h> #include <linux/netdevice.h> #include <linux/delay.h> #include <linux/ioport.h> /* for request_region */ #include <linux/uio.h> #include <linux/init.h> #include <linux/interrupt.h> #include <linux/capability.h> #include <linux/bitops.h> #include <linux/slab.h> #include <asm/byteorder.h> #include <asm/string.h> #include <asm/io.h> #include <linux/atomic.h> #include <asm/uaccess.h> #include <linux/wait.h> #include "firestream.h" static int loopback = 0; static int num=0x5a; /* According to measurements (but they look suspicious to me!) done in * '97, 37% of the packets are one cell in size. So it pays to have * buffers allocated at that size. A large jump in percentage of * packets occurs at packets around 536 bytes in length. So it also * pays to have those pre-allocated. Unfortunately, we can't fully * take advantage of this as the majority of the packets is likely to * be TCP/IP (As where obviously the measurement comes from) There the * link would be opened with say a 1500 byte MTU, and we can't handle * smaller buffers more efficiently than the larger ones. -- REW */ /* Due to the way Linux memory management works, specifying "576" as * an allocation size here isn't going to help. They are allocated * from 1024-byte regions anyway. With the size of the sk_buffs (quite * large), it doesn't pay to allocate the smallest size (64) -- REW */ /* This is all guesswork. Hard numbers to back this up or disprove this, * are appreciated. -- REW */ /* The last entry should be about 64k. However, the "buffer size" is * passed to the chip in a 16 bit field. I don't know how "65536" * would be interpreted. -- REW */ #define NP FS_NR_FREE_POOLS static int rx_buf_sizes[NP] = {128, 256, 512, 1024, 2048, 4096, 16384, 65520}; /* log2: 7 8 9 10 11 12 14 16 */ #if 0 static int rx_pool_sizes[NP] = {1024, 1024, 512, 256, 128, 64, 32, 32}; #else /* debug */ static int rx_pool_sizes[NP] = {128, 128, 128, 64, 64, 64, 32, 32}; #endif /* log2: 10 10 9 8 7 6 5 5 */ /* sumlog2: 17 18 18 18 18 18 19 21 */ /* mem allocated: 128k 256k 256k 256k 256k 256k 512k 2M */ /* tot mem: almost 4M */ /* NP is shorter, so that it fits on a single line. */ #undef NP /* Small hardware gotcha: The FS50 CAM (VP/VC match registers) always take the lowest channel number that matches. This is not a problem. However, they also ignore whether the channel is enabled or not. This means that if you allocate channel 0 to 1.2 and then channel 1 to 0.0, then disabeling channel 0 and writing 0 to the match channel for channel 0 will "steal" the traffic from channel 1, even if you correctly disable channel 0. Workaround: - When disabling channels, write an invalid VP/VC value to the match register. (We use 0xffffffff, which in the worst case matches VP/VC = <maxVP>/<maxVC>, but I expect it not to match anything as some "when not in use, program to 0" bits are now programmed to 1...) - Don't initialize the match registers to 0, as 0.0 is a valid channel. */ /* Optimization hints and tips. The FireStream chips are very capable of reducing the amount of "interrupt-traffic" for the CPU. This driver requests an interrupt on EVERY action. You could try to minimize this a bit. Besides that, the userspace->kernel copy and the PCI bus are the performance limiting issues for this driver. You could queue up a bunch of outgoing packets without telling the FireStream. I'm not sure that's going to win you much though. The Linux layer won't tell us in advance when it's not going to give us any more packets in a while. So this is tricky to implement right without introducing extra delays. -- REW */ /* The strings that define what the RX queue entry is all about. */ /* Fujitsu: Please tell me which ones can have a pointer to a freepool descriptor! */ static char *res_strings[] = { "RX OK: streaming not EOP", "RX OK: streaming EOP", "RX OK: Single buffer packet", "RX OK: packet mode", "RX OK: F4 OAM (end to end)", "RX OK: F4 OAM (Segment)", "RX OK: F5 OAM (end to end)", "RX OK: F5 OAM (Segment)", "RX OK: RM cell", "RX OK: TRANSP cell", "RX OK: TRANSPC cell", "Unmatched cell", "reserved 12", "reserved 13", "reserved 14", "Unrecognized cell", "reserved 16", "reassemby abort: AAL5 abort", "packet purged", "packet ageing timeout", "channel ageing timeout", "calculated length error", "programmed length limit error", "aal5 crc32 error", "oam transp or transpc crc10 error", "reserved 25", "reserved 26", "reserved 27", "reserved 28", "reserved 29", "reserved 30", "reassembly abort: no buffers", "receive buffer overflow", "change in GFC", "receive buffer full", "low priority discard - no receive descriptor", "low priority discard - missing end of packet", "reserved 41", "reserved 42", "reserved 43", "reserved 44", "reserved 45", "reserved 46", "reserved 47", "reserved 48", "reserved 49", "reserved 50", "reserved 51", "reserved 52", "reserved 53", "reserved 54", "reserved 55", "reserved 56", "reserved 57", "reserved 58", "reserved 59", "reserved 60", "reserved 61", "reserved 62", "reserved 63", }; static char *irq_bitname[] = { "LPCO", "DPCO", "RBRQ0_W", "RBRQ1_W", "RBRQ2_W", "RBRQ3_W", "RBRQ0_NF", "RBRQ1_NF", "RBRQ2_NF", "RBRQ3_NF", "BFP_SC", "INIT", "INIT_ERR", "USCEO", "UPEC0", "VPFCO", "CRCCO", "HECO", "TBRQ_W", "TBRQ_NF", "CTPQ_E", "GFC_C0", "PCI_FTL", "CSQ_W", "CSQ_NF", "EXT_INT", "RXDMA_S" }; #define PHY_EOF -1 #define PHY_CLEARALL -2 struct reginit_item { int reg, val; }; static struct reginit_item PHY_NTC_INIT[] = { { PHY_CLEARALL, 0x40 }, { 0x12, 0x0001 }, { 0x13, 0x7605 }, { 0x1A, 0x0001 }, { 0x1B, 0x0005 }, { 0x38, 0x0003 }, { 0x39, 0x0006 }, /* changed here to make loopback */ { 0x01, 0x5262 }, { 0x15, 0x0213 }, { 0x00, 0x0003 }, { PHY_EOF, 0}, /* -1 signals end of list */ }; /* Safetyfeature: If the card interrupts more than this number of times in a jiffy (1/100th of a second) then we just disable the interrupt and print a message. This prevents the system from hanging. 150000 packets per second is close to the limit a PC is going to have anyway. We therefore have to disable this for production. -- REW */ #undef IRQ_RATE_LIMIT // 100 /* Interrupts work now. Unlike serial cards, ATM cards don't work all that great without interrupts. -- REW */ #undef FS_POLL_FREQ // 100 /* This driver can spew a whole lot of debugging output at you. If you need maximum performance, you should disable the DEBUG define. To aid in debugging in the field, I'm leaving the compile-time debug features enabled, and disable them "runtime". That allows me to instruct people with problems to enable debugging without requiring them to recompile... -- REW */ #define DEBUG #ifdef DEBUG #define fs_dprintk(f, str...) if (fs_debug & f) printk (str) #else #define fs_dprintk(f, str...) /* nothing */ #endif static int fs_keystream = 0; #ifdef DEBUG /* I didn't forget to set this to zero before shipping. Hit me with a stick if you get this with the debug default not set to zero again. -- REW */ static int fs_debug = 0; #else #define fs_debug 0 #endif #ifdef MODULE #ifdef DEBUG module_param(fs_debug, int, 0644); #endif module_param(loopback, int, 0); module_param(num, int, 0); module_param(fs_keystream, int, 0); /* XXX Add rx_buf_sizes, and rx_pool_sizes As per request Amar. -- REW */ #endif #define FS_DEBUG_FLOW 0x00000001 #define FS_DEBUG_OPEN 0x00000002 #define FS_DEBUG_QUEUE 0x00000004 #define FS_DEBUG_IRQ 0x00000008 #define FS_DEBUG_INIT 0x00000010 #define FS_DEBUG_SEND 0x00000020 #define FS_DEBUG_PHY 0x00000040 #define FS_DEBUG_CLEANUP 0x00000080 #define FS_DEBUG_QOS 0x00000100 #define FS_DEBUG_TXQ 0x00000200 #define FS_DEBUG_ALLOC 0x00000400 #define FS_DEBUG_TXMEM 0x00000800 #define FS_DEBUG_QSIZE 0x00001000 #define func_enter() fs_dprintk(FS_DEBUG_FLOW, "fs: enter %s\n", __func__) #define func_exit() fs_dprintk(FS_DEBUG_FLOW, "fs: exit %s\n", __func__) static struct fs_dev *fs_boards = NULL; #ifdef DEBUG static void my_hd (void *addr, int len) { int j, ch; unsigned char *ptr = addr; while (len > 0) { printk ("%p ", ptr); for (j=0;j < ((len < 16)?len:16);j++) { printk ("%02x %s", ptr[j], (j==7)?" ":""); } for ( ;j < 16;j++) { printk (" %s", (j==7)?" ":""); } for (j=0;j < ((len < 16)?len:16);j++) { ch = ptr[j]; printk ("%c", (ch < 0x20)?'.':((ch > 0x7f)?'.':ch)); } printk ("\n"); ptr += 16; len -= 16; } } #else /* DEBUG */ static void my_hd (void *addr, int len){} #endif /* DEBUG */ /********** free an skb (as per ATM device driver documentation) **********/ /* Hmm. If this is ATM specific, why isn't there an ATM routine for this? * I copied it over from the ambassador driver. -- REW */ static inline void fs_kfree_skb (struct sk_buff * skb) { if (ATM_SKB(skb)->vcc->pop) ATM_SKB(skb)->vcc->pop (ATM_SKB(skb)->vcc, skb); else dev_kfree_skb_any (skb); } /* It seems the ATM forum recommends this horribly complicated 16bit * floating point format. Turns out the Ambassador uses the exact same * encoding. I just copied it over. If Mitch agrees, I'll move it over * to the atm_misc file or something like that. (and remove it from * here and the ambassador driver) -- REW */ /* The good thing about this format is that it is monotonic. So, a conversion routine need not be very complicated. To be able to round "nearest" we need to take along a few extra bits. Lets put these after 16 bits, so that we can just return the top 16 bits of the 32bit number as the result: int mr (unsigned int rate, int r) { int e = 16+9; static int round[4]={0, 0, 0xffff, 0x8000}; if (!rate) return 0; while (rate & 0xfc000000) { rate >>= 1; e++; } while (! (rate & 0xfe000000)) { rate <<= 1; e--; } // Now the mantissa is in positions bit 16-25. Excepf for the "hidden 1" that's in bit 26. rate &= ~0x02000000; // Next add in the exponent rate |= e << (16+9); // And perform the rounding: return (rate + round[r]) >> 16; } 14 lines-of-code. Compare that with the 120 that the Ambassador guys needed. (would be 8 lines shorter if I'd try to really reduce the number of lines: int mr (unsigned int rate, int r) { int e = 16+9; static int round[4]={0, 0, 0xffff, 0x8000}; if (!rate) return 0; for (; rate & 0xfc000000 ;rate >>= 1, e++); for (;!(rate & 0xfe000000);rate <<= 1, e--); return ((rate & ~0x02000000) | (e << (16+9)) + round[r]) >> 16; } Exercise for the reader: Remove one more line-of-code, without cheating. (Just joining two lines is cheating). (I know it's possible, don't think you've beat me if you found it... If you manage to lose two lines or more, keep me updated! ;-) -- REW */ #define ROUND_UP 1 #define ROUND_DOWN 2 #define ROUND_NEAREST 3 /********** make rate (not quite as much fun as Horizon) **********/ static int make_rate(unsigned int rate, int r, u16 *bits, unsigned int *actual) { unsigned char exp = -1; /* hush gcc */ unsigned int man = -1; /* hush gcc */ fs_dprintk (FS_DEBUG_QOS, "make_rate %u", rate); /* rates in cells per second, ITU format (nasty 16-bit floating-point) given 5-bit e and 9-bit m: rate = EITHER (1+m/2^9)*2^e OR 0 bits = EITHER 1<<14 | e<<9 | m OR 0 (bit 15 is "reserved", bit 14 "non-zero") smallest rate is 0 (special representation) largest rate is (1+511/512)*2^31 = 4290772992 (< 2^32-1) smallest non-zero rate is (1+0/512)*2^0 = 1 (> 0) simple algorithm: find position of top bit, this gives e remove top bit and shift (rounding if feeling clever) by 9-e */ /* Ambassador ucode bug: please don't set bit 14! so 0 rate not representable. // This should move into the ambassador driver when properly merged. -- REW */ if (rate > 0xffc00000U) { /* larger than largest representable rate */ if (r == ROUND_UP) { return -EINVAL; } else { exp = 31; man = 511; } } else if (rate) { /* representable rate */ exp = 31; man = rate; /* invariant: rate = man*2^(exp-31) */ while (!(man & (1<<31))) { exp = exp - 1; man = man<<1; } /* man has top bit set rate = (2^31+(man-2^31))*2^(exp-31) rate = (1+(man-2^31)/2^31)*2^exp */ man = man<<1; man &= 0xffffffffU; /* a nop on 32-bit systems */ /* rate = (1+man/2^32)*2^exp exp is in the range 0 to 31, man is in the range 0 to 2^32-1 time to lose significance... we want m in the range 0 to 2^9-1 rounding presents a minor problem... we first decide which way we are rounding (based on given rounding direction and possibly the bits of the mantissa that are to be discarded). */ switch (r) { case ROUND_DOWN: { /* just truncate */ man = man>>(32-9); break; } case ROUND_UP: { /* check all bits that we are discarding */ if (man & (~0U>>9)) { man = (man>>(32-9)) + 1; if (man == (1<<9)) { /* no need to check for round up outside of range */ man = 0; exp += 1; } } else { man = (man>>(32-9)); } break; } case ROUND_NEAREST: { /* check msb that we are discarding */ if (man & (1<<(32-9-1))) { man = (man>>(32-9)) + 1; if (man == (1<<9)) { /* no need to check for round up outside of range */ man = 0; exp += 1; } } else { man = (man>>(32-9)); } break; } } } else { /* zero rate - not representable */ if (r == ROUND_DOWN) { return -EINVAL; } else { exp = 0; man = 0; } } fs_dprintk (FS_DEBUG_QOS, "rate: man=%u, exp=%hu", man, exp); if (bits) *bits = /* (1<<14) | */ (exp<<9) | man; if (actual) *actual = (exp >= 9) ? (1 << exp) + (man << (exp-9)) : (1 << exp) + ((man + (1<<(9-exp-1))) >> (9-exp)); return 0; } /* FireStream access routines */ /* For DEEP-DOWN debugging these can be rigged to intercept accesses to certain registers or to just log all accesses. */ static inline void write_fs (struct fs_dev *dev, int offset, u32 val) { writel (val, dev->base + offset); } static inline u32 read_fs (struct fs_dev *dev, int offset) { return readl (dev->base + offset); } static inline struct FS_QENTRY *get_qentry (struct fs_dev *dev, struct queue *q) { return bus_to_virt (read_fs (dev, Q_WP(q->offset)) & Q_ADDR_MASK); } static void submit_qentry (struct fs_dev *dev, struct queue *q, struct FS_QENTRY *qe) { u32 wp; struct FS_QENTRY *cqe; /* XXX Sanity check: the write pointer can be checked to be still the same as the value passed as qe... -- REW */ /* udelay (5); */ while ((wp = read_fs (dev, Q_WP (q->offset))) & Q_FULL) { fs_dprintk (FS_DEBUG_TXQ, "Found queue at %x full. Waiting.\n", q->offset); schedule (); } wp &= ~0xf; cqe = bus_to_virt (wp); if (qe != cqe) { fs_dprintk (FS_DEBUG_TXQ, "q mismatch! %p %p\n", qe, cqe); } write_fs (dev, Q_WP(q->offset), Q_INCWRAP); { static int c; if (!(c++ % 100)) { int rp, wp; rp = read_fs (dev, Q_RP(q->offset)); wp = read_fs (dev, Q_WP(q->offset)); fs_dprintk (FS_DEBUG_TXQ, "q at %d: %x-%x: %x entries.\n", q->offset, rp, wp, wp-rp); } } } #ifdef DEBUG_EXTRA static struct FS_QENTRY pq[60]; static int qp; static struct FS_BPENTRY dq[60]; static int qd; static void *da[60]; #endif static void submit_queue (struct fs_dev *dev, struct queue *q, u32 cmd, u32 p1, u32 p2, u32 p3) { struct FS_QENTRY *qe; qe = get_qentry (dev, q); qe->cmd = cmd; qe->p0 = p1; qe->p1 = p2; qe->p2 = p3; submit_qentry (dev, q, qe); #ifdef DEBUG_EXTRA pq[qp].cmd = cmd; pq[qp].p0 = p1; pq[qp].p1 = p2; pq[qp].p2 = p3; qp++; if (qp >= 60) qp = 0; #endif } /* Test the "other" way one day... -- REW */ #if 1 #define submit_command submit_queue #else static void submit_command (struct fs_dev *dev, struct queue *q, u32 cmd, u32 p1, u32 p2, u32 p3) { write_fs (dev, CMDR0, cmd); write_fs (dev, CMDR1, p1); write_fs (dev, CMDR2, p2); write_fs (dev, CMDR3, p3); } #endif static void process_return_queue (struct fs_dev *dev, struct queue *q) { long rq; struct FS_QENTRY *qe; void *tc; while (!((rq = read_fs (dev, Q_RP(q->offset))) & Q_EMPTY)) { fs_dprintk (FS_DEBUG_QUEUE, "reaping return queue entry at %lx\n", rq); qe = bus_to_virt (rq); fs_dprintk (FS_DEBUG_QUEUE, "queue entry: %08x %08x %08x %08x. (%d)\n", qe->cmd, qe->p0, qe->p1, qe->p2, STATUS_CODE (qe)); switch (STATUS_CODE (qe)) { case 5: tc = bus_to_virt (qe->p0); fs_dprintk (FS_DEBUG_ALLOC, "Free tc: %p\n", tc); kfree (tc); break; } write_fs (dev, Q_RP(q->offset), Q_INCWRAP); } } static void process_txdone_queue (struct fs_dev *dev, struct queue *q) { long rq; long tmp; struct FS_QENTRY *qe; struct sk_buff *skb; struct FS_BPENTRY *td; while (!((rq = read_fs (dev, Q_RP(q->offset))) & Q_EMPTY)) { fs_dprintk (FS_DEBUG_QUEUE, "reaping txdone entry at %lx\n", rq); qe = bus_to_virt (rq); fs_dprintk (FS_DEBUG_QUEUE, "queue entry: %08x %08x %08x %08x: %d\n", qe->cmd, qe->p0, qe->p1, qe->p2, STATUS_CODE (qe)); if (STATUS_CODE (qe) != 2) fs_dprintk (FS_DEBUG_TXMEM, "queue entry: %08x %08x %08x %08x: %d\n", qe->cmd, qe->p0, qe->p1, qe->p2, STATUS_CODE (qe)); switch (STATUS_CODE (qe)) { case 0x01: /* This is for AAL0 where we put the chip in streaming mode */ /* Fall through */ case 0x02: /* Process a real txdone entry. */ tmp = qe->p0; if (tmp & 0x0f) printk (KERN_WARNING "td not aligned: %ld\n", tmp); tmp &= ~0x0f; td = bus_to_virt (tmp); fs_dprintk (FS_DEBUG_QUEUE, "Pool entry: %08x %08x %08x %08x %p.\n", td->flags, td->next, td->bsa, td->aal_bufsize, td->skb ); skb = td->skb; if (skb == FS_VCC (ATM_SKB(skb)->vcc)->last_skb) { wake_up_interruptible (& FS_VCC (ATM_SKB(skb)->vcc)->close_wait); FS_VCC (ATM_SKB(skb)->vcc)->last_skb = NULL; } td->dev->ntxpckts--; { static int c=0; if (!(c++ % 100)) { fs_dprintk (FS_DEBUG_QSIZE, "[%d]", td->dev->ntxpckts); } } atomic_inc(&ATM_SKB(skb)->vcc->stats->tx); fs_dprintk (FS_DEBUG_TXMEM, "i"); fs_dprintk (FS_DEBUG_ALLOC, "Free t-skb: %p\n", skb); fs_kfree_skb (skb); fs_dprintk (FS_DEBUG_ALLOC, "Free trans-d: %p\n", td); memset (td, ATM_POISON_FREE, sizeof(struct FS_BPENTRY)); kfree (td); break; default: /* Here we get the tx purge inhibit command ... */ /* Action, I believe, is "don't do anything". -- REW */ ; } write_fs (dev, Q_RP(q->offset), Q_INCWRAP); } } static void process_incoming (struct fs_dev *dev, struct queue *q) { long rq; struct FS_QENTRY *qe; struct FS_BPENTRY *pe; struct sk_buff *skb; unsigned int channo; struct atm_vcc *atm_vcc; while (!((rq = read_fs (dev, Q_RP(q->offset))) & Q_EMPTY)) { fs_dprintk (FS_DEBUG_QUEUE, "reaping incoming queue entry at %lx\n", rq); qe = bus_to_virt (rq); fs_dprintk (FS_DEBUG_QUEUE, "queue entry: %08x %08x %08x %08x. ", qe->cmd, qe->p0, qe->p1, qe->p2); fs_dprintk (FS_DEBUG_QUEUE, "-> %x: %s\n", STATUS_CODE (qe), res_strings[STATUS_CODE(qe)]); pe = bus_to_virt (qe->p0); fs_dprintk (FS_DEBUG_QUEUE, "Pool entry: %08x %08x %08x %08x %p %p.\n", pe->flags, pe->next, pe->bsa, pe->aal_bufsize, pe->skb, pe->fp); channo = qe->cmd & 0xffff; if (channo < dev->nchannels) atm_vcc = dev->atm_vccs[channo]; else atm_vcc = NULL; /* Single buffer packet */ switch (STATUS_CODE (qe)) { case 0x1: /* Fall through for streaming mode */ case 0x2:/* Packet received OK.... */ if (atm_vcc) { skb = pe->skb; pe->fp->n--; #if 0 fs_dprintk (FS_DEBUG_QUEUE, "Got skb: %p\n", skb); if (FS_DEBUG_QUEUE & fs_debug) my_hd (bus_to_virt (pe->bsa), 0x20); #endif skb_put (skb, qe->p1 & 0xffff); ATM_SKB(skb)->vcc = atm_vcc; atomic_inc(&atm_vcc->stats->rx); __net_timestamp(skb); fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p (pushed)\n", skb); atm_vcc->push (atm_vcc, skb); fs_dprintk (FS_DEBUG_ALLOC, "Free rec-d: %p\n", pe); kfree (pe); } else { printk (KERN_ERR "Got a receive on a non-open channel %d.\n", channo); } break; case 0x17:/* AAL 5 CRC32 error. IFF the length field is nonzero, a buffer has been consumed and needs to be processed. -- REW */ if (qe->p1 & 0xffff) { pe = bus_to_virt (qe->p0); pe->fp->n--; fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p\n", pe->skb); dev_kfree_skb_any (pe->skb); fs_dprintk (FS_DEBUG_ALLOC, "Free rec-d: %p\n", pe); kfree (pe); } if (atm_vcc) atomic_inc(&atm_vcc->stats->rx_drop); break; case 0x1f: /* Reassembly abort: no buffers. */ /* Silently increment error counter. */ if (atm_vcc) atomic_inc(&atm_vcc->stats->rx_drop); break; default: /* Hmm. Haven't written the code to handle the others yet... -- REW */ printk (KERN_WARNING "Don't know what to do with RX status %x: %s.\n", STATUS_CODE(qe), res_strings[STATUS_CODE (qe)]); } write_fs (dev, Q_RP(q->offset), Q_INCWRAP); } } #define DO_DIRECTION(tp) ((tp)->traffic_class != ATM_NONE) static int fs_open(struct atm_vcc *atm_vcc) { struct fs_dev *dev; struct fs_vcc *vcc; struct fs_transmit_config *tc; struct atm_trafprm * txtp; struct atm_trafprm * rxtp; /* struct fs_receive_config *rc;*/ /* struct FS_QENTRY *qe; */ int error; int bfp; int to; unsigned short tmc0; short vpi = atm_vcc->vpi; int vci = atm_vcc->vci; func_enter (); dev = FS_DEV(atm_vcc->dev); fs_dprintk (FS_DEBUG_OPEN, "fs: open on dev: %p, vcc at %p\n", dev, atm_vcc); if (vci != ATM_VPI_UNSPEC && vpi != ATM_VCI_UNSPEC) set_bit(ATM_VF_ADDR, &atm_vcc->flags); if ((atm_vcc->qos.aal != ATM_AAL5) && (atm_vcc->qos.aal != ATM_AAL2)) return -EINVAL; /* XXX AAL0 */ fs_dprintk (FS_DEBUG_OPEN, "fs: (itf %d): open %d.%d\n", atm_vcc->dev->number, atm_vcc->vpi, atm_vcc->vci); /* XXX handle qos parameters (rate limiting) ? */ vcc = kmalloc(sizeof(struct fs_vcc), GFP_KERNEL); fs_dprintk (FS_DEBUG_ALLOC, "Alloc VCC: %p(%Zd)\n", vcc, sizeof(struct fs_vcc)); if (!vcc) { clear_bit(ATM_VF_ADDR, &atm_vcc->flags); return -ENOMEM; } atm_vcc->dev_data = vcc; vcc->last_skb = NULL; init_waitqueue_head (&vcc->close_wait); txtp = &atm_vcc->qos.txtp; rxtp = &atm_vcc->qos.rxtp; if (!test_bit(ATM_VF_PARTIAL, &atm_vcc->flags)) { if (IS_FS50(dev)) { /* Increment the channel numer: take a free one next time. */ for (to=33;to;to--, dev->channo++) { /* We only have 32 channels */ if (dev->channo >= 32) dev->channo = 0; /* If we need to do RX, AND the RX is inuse, try the next */ if (DO_DIRECTION(rxtp) && dev->atm_vccs[dev->channo]) continue; /* If we need to do TX, AND the TX is inuse, try the next */ if (DO_DIRECTION(txtp) && test_bit (dev->channo, dev->tx_inuse)) continue; /* Ok, both are free! (or not needed) */ break; } if (!to) { printk ("No more free channels for FS50..\n"); return -EBUSY; } vcc->channo = dev->channo; dev->channo &= dev->channel_mask; } else { vcc->channo = (vpi << FS155_VCI_BITS) | (vci); if (((DO_DIRECTION(rxtp) && dev->atm_vccs[vcc->channo])) || ( DO_DIRECTION(txtp) && test_bit (vcc->channo, dev->tx_inuse))) { printk ("Channel is in use for FS155.\n"); return -EBUSY; } } fs_dprintk (FS_DEBUG_OPEN, "OK. Allocated channel %x(%d).\n", vcc->channo, vcc->channo); } if (DO_DIRECTION (txtp)) { tc = kmalloc (sizeof (struct fs_transmit_config), GFP_KERNEL); fs_dprintk (FS_DEBUG_ALLOC, "Alloc tc: %p(%Zd)\n", tc, sizeof (struct fs_transmit_config)); if (!tc) { fs_dprintk (FS_DEBUG_OPEN, "fs: can't alloc transmit_config.\n"); return -ENOMEM; } /* Allocate the "open" entry from the high priority txq. This makes it most likely that the chip will notice it. It also prevents us from having to wait for completion. On the other hand, we may need to wait for completion anyway, to see if it completed successfully. */ switch (atm_vcc->qos.aal) { case ATM_AAL2: case ATM_AAL0: tc->flags = 0 | TC_FLAGS_TRANSPARENT_PAYLOAD | TC_FLAGS_PACKET | (1 << 28) | TC_FLAGS_TYPE_UBR /* XXX Change to VBR -- PVDL */ | TC_FLAGS_CAL0; break; case ATM_AAL5: tc->flags = 0 | TC_FLAGS_AAL5 | TC_FLAGS_PACKET /* ??? */ | TC_FLAGS_TYPE_CBR | TC_FLAGS_CAL0; break; default: printk ("Unknown aal: %d\n", atm_vcc->qos.aal); tc->flags = 0; } /* Docs are vague about this atm_hdr field. By the way, the FS * chip makes odd errors if lower bits are set.... -- REW */ tc->atm_hdr = (vpi << 20) | (vci << 4); tmc0 = 0; { int pcr = atm_pcr_goal (txtp); fs_dprintk (FS_DEBUG_OPEN, "pcr = %d.\n", pcr); /* XXX Hmm. officially we're only allowed to do this if rounding is round_down -- REW */ if (IS_FS50(dev)) { if (pcr > 51840000/53/8) pcr = 51840000/53/8; } else { if (pcr > 155520000/53/8) pcr = 155520000/53/8; } if (!pcr) { /* no rate cap */ tmc0 = IS_FS50(dev)?0x61BE:0x64c9; /* Just copied over the bits from Fujitsu -- REW */ } else { int r; if (pcr < 0) { r = ROUND_DOWN; pcr = -pcr; } else { r = ROUND_UP; } error = make_rate (pcr, r, &tmc0, NULL); if (error) { kfree(tc); return error; } } fs_dprintk (FS_DEBUG_OPEN, "pcr = %d.\n", pcr); } tc->TMC[0] = tmc0 | 0x4000; tc->TMC[1] = 0; /* Unused */ tc->TMC[2] = 0; /* Unused */ tc->TMC[3] = 0; /* Unused */ tc->spec = 0; /* UTOPIA address, UDF, HEC: Unused -> 0 */ tc->rtag[0] = 0; /* What should I do with routing tags??? -- Not used -- AS -- Thanks -- REW*/ tc->rtag[1] = 0; tc->rtag[2] = 0; if (fs_debug & FS_DEBUG_OPEN) { fs_dprintk (FS_DEBUG_OPEN, "TX config record:\n"); my_hd (tc, sizeof (*tc)); } /* We now use the "submit_command" function to submit commands to the firestream. There is a define up near the definition of that routine that switches this routine between immediate write to the immediate command registers and queuing the commands in the HPTXQ for execution. This last technique might be more efficient if we know we're going to submit a whole lot of commands in one go, but this driver is not setup to be able to use such a construct. So it probably doen't matter much right now. -- REW */ /* The command is IMMediate and INQueue. The parameters are out-of-line.. */ submit_command (dev, &dev->hp_txq, QE_CMD_CONFIG_TX | QE_CMD_IMM_INQ | vcc->channo, virt_to_bus (tc), 0, 0); submit_command (dev, &dev->hp_txq, QE_CMD_TX_EN | QE_CMD_IMM_INQ | vcc->channo, 0, 0, 0); set_bit (vcc->channo, dev->tx_inuse); } if (DO_DIRECTION (rxtp)) { dev->atm_vccs[vcc->channo] = atm_vcc; for (bfp = 0;bfp < FS_NR_FREE_POOLS; bfp++) if (atm_vcc->qos.rxtp.max_sdu <= dev->rx_fp[bfp].bufsize) break; if (bfp >= FS_NR_FREE_POOLS) { fs_dprintk (FS_DEBUG_OPEN, "No free pool fits sdu: %d.\n", atm_vcc->qos.rxtp.max_sdu); /* XXX Cleanup? -- Would just calling fs_close work??? -- REW */ /* XXX clear tx inuse. Close TX part? */ dev->atm_vccs[vcc->channo] = NULL; kfree (vcc); return -EINVAL; } switch (atm_vcc->qos.aal) { case ATM_AAL0: case ATM_AAL2: submit_command (dev, &dev->hp_txq, QE_CMD_CONFIG_RX | QE_CMD_IMM_INQ | vcc->channo, RC_FLAGS_TRANSP | RC_FLAGS_BFPS_BFP * bfp | RC_FLAGS_RXBM_PSB, 0, 0); break; case ATM_AAL5: submit_command (dev, &dev->hp_txq, QE_CMD_CONFIG_RX | QE_CMD_IMM_INQ | vcc->channo, RC_FLAGS_AAL5 | RC_FLAGS_BFPS_BFP * bfp | RC_FLAGS_RXBM_PSB, 0, 0); break; }; if (IS_FS50 (dev)) { submit_command (dev, &dev->hp_txq, QE_CMD_REG_WR | QE_CMD_IMM_INQ, 0x80 + vcc->channo, (vpi << 16) | vci, 0 ); /* XXX -- Use defines. */ } submit_command (dev, &dev->hp_txq, QE_CMD_RX_EN | QE_CMD_IMM_INQ | vcc->channo, 0, 0, 0); } /* Indicate we're done! */ set_bit(ATM_VF_READY, &atm_vcc->flags); func_exit (); return 0; } static void fs_close(struct atm_vcc *atm_vcc) { struct fs_dev *dev = FS_DEV (atm_vcc->dev); struct fs_vcc *vcc = FS_VCC (atm_vcc); struct atm_trafprm * txtp; struct atm_trafprm * rxtp; func_enter (); clear_bit(ATM_VF_READY, &atm_vcc->flags); fs_dprintk (FS_DEBUG_QSIZE, "--==**[%d]**==--", dev->ntxpckts); if (vcc->last_skb) { fs_dprintk (FS_DEBUG_QUEUE, "Waiting for skb %p to be sent.\n", vcc->last_skb); /* We're going to wait for the last packet to get sent on this VC. It would be impolite not to send them don't you think? XXX We don't know which packets didn't get sent. So if we get interrupted in this sleep_on, we'll lose any reference to these packets. Memory leak! On the other hand, it's awfully convenient that we can abort a "close" that is taking too long. Maybe just use non-interruptible sleep on? -- REW */ interruptible_sleep_on (& vcc->close_wait); } txtp = &atm_vcc->qos.txtp; rxtp = &atm_vcc->qos.rxtp; /* See App note XXX (Unpublished as of now) for the reason for the removal of the "CMD_IMM_INQ" part of the TX_PURGE_INH... -- REW */ if (DO_DIRECTION (txtp)) { submit_command (dev, &dev->hp_txq, QE_CMD_TX_PURGE_INH | /*QE_CMD_IMM_INQ|*/ vcc->channo, 0,0,0); clear_bit (vcc->channo, dev->tx_inuse); } if (DO_DIRECTION (rxtp)) { submit_command (dev, &dev->hp_txq, QE_CMD_RX_PURGE_INH | QE_CMD_IMM_INQ | vcc->channo, 0,0,0); dev->atm_vccs [vcc->channo] = NULL; /* This means that this is configured as a receive channel */ if (IS_FS50 (dev)) { /* Disable the receive filter. Is 0/0 indeed an invalid receive channel? -- REW. Yes it is. -- Hang. Ok. I'll use -1 (0xfff...) -- REW */ submit_command (dev, &dev->hp_txq, QE_CMD_REG_WR | QE_CMD_IMM_INQ, 0x80 + vcc->channo, -1, 0 ); } } fs_dprintk (FS_DEBUG_ALLOC, "Free vcc: %p\n", vcc); kfree (vcc); func_exit (); } static int fs_send (struct atm_vcc *atm_vcc, struct sk_buff *skb) { struct fs_dev *dev = FS_DEV (atm_vcc->dev); struct fs_vcc *vcc = FS_VCC (atm_vcc); struct FS_BPENTRY *td; func_enter (); fs_dprintk (FS_DEBUG_TXMEM, "I"); fs_dprintk (FS_DEBUG_SEND, "Send: atm_vcc %p skb %p vcc %p dev %p\n", atm_vcc, skb, vcc, dev); fs_dprintk (FS_DEBUG_ALLOC, "Alloc t-skb: %p (atm_send)\n", skb); ATM_SKB(skb)->vcc = atm_vcc; vcc->last_skb = skb; td = kmalloc (sizeof (struct FS_BPENTRY), GFP_ATOMIC); fs_dprintk (FS_DEBUG_ALLOC, "Alloc transd: %p(%Zd)\n", td, sizeof (struct FS_BPENTRY)); if (!td) { /* Oops out of mem */ return -ENOMEM; } fs_dprintk (FS_DEBUG_SEND, "first word in buffer: %x\n", *(int *) skb->data); td->flags = TD_EPI | TD_DATA | skb->len; td->next = 0; td->bsa = virt_to_bus (skb->data); td->skb = skb; td->dev = dev; dev->ntxpckts++; #ifdef DEBUG_EXTRA da[qd] = td; dq[qd].flags = td->flags; dq[qd].next = td->next; dq[qd].bsa = td->bsa; dq[qd].skb = td->skb; dq[qd].dev = td->dev; qd++; if (qd >= 60) qd = 0; #endif submit_queue (dev, &dev->hp_txq, QE_TRANSMIT_DE | vcc->channo, virt_to_bus (td), 0, virt_to_bus (td)); fs_dprintk (FS_DEBUG_QUEUE, "in send: txq %d txrq %d\n", read_fs (dev, Q_EA (dev->hp_txq.offset)) - read_fs (dev, Q_SA (dev->hp_txq.offset)), read_fs (dev, Q_EA (dev->tx_relq.offset)) - read_fs (dev, Q_SA (dev->tx_relq.offset))); func_exit (); return 0; } /* Some function placeholders for functions we don't yet support. */ #if 0 static int fs_ioctl(struct atm_dev *dev,unsigned int cmd,void __user *arg) { func_enter (); func_exit (); return -ENOIOCTLCMD; } static int fs_getsockopt(struct atm_vcc *vcc,int level,int optname, void __user *optval,int optlen) { func_enter (); func_exit (); return 0; } static int fs_setsockopt(struct atm_vcc *vcc,int level,int optname, void __user *optval,unsigned int optlen) { func_enter (); func_exit (); return 0; } static void fs_phy_put(struct atm_dev *dev,unsigned char value, unsigned long addr) { func_enter (); func_exit (); } static unsigned char fs_phy_get(struct atm_dev *dev,unsigned long addr) { func_enter (); func_exit (); return 0; } static int fs_change_qos(struct atm_vcc *vcc,struct atm_qos *qos,int flags) { func_enter (); func_exit (); return 0; }; #endif static const struct atmdev_ops ops = { .open = fs_open, .close = fs_close, .send = fs_send, .owner = THIS_MODULE, /* ioctl: fs_ioctl, */ /* getsockopt: fs_getsockopt, */ /* setsockopt: fs_setsockopt, */ /* change_qos: fs_change_qos, */ /* For now implement these internally here... */ /* phy_put: fs_phy_put, */ /* phy_get: fs_phy_get, */ }; static void undocumented_pci_fix(struct pci_dev *pdev) { u32 tint; /* The Windows driver says: */ /* Switch off FireStream Retry Limit Threshold */ /* The register at 0x28 is documented as "reserved", no further comments. */ pci_read_config_dword (pdev, 0x28, &tint); if (tint != 0x80) { tint = 0x80; pci_write_config_dword (pdev, 0x28, tint); } } /************************************************************************** * PHY routines * **************************************************************************/ static void write_phy(struct fs_dev *dev, int regnum, int val) { submit_command (dev, &dev->hp_txq, QE_CMD_PRP_WR | QE_CMD_IMM_INQ, regnum, val, 0); } static int init_phy(struct fs_dev *dev, struct reginit_item *reginit) { int i; func_enter (); while (reginit->reg != PHY_EOF) { if (reginit->reg == PHY_CLEARALL) { /* "PHY_CLEARALL means clear all registers. Numregisters is in "val". */ for (i=0;i<reginit->val;i++) { write_phy (dev, i, 0); } } else { write_phy (dev, reginit->reg, reginit->val); } reginit++; } func_exit (); return 0; } static void reset_chip (struct fs_dev *dev) { int i; write_fs (dev, SARMODE0, SARMODE0_SRTS0); /* Undocumented delay */ udelay (128); /* The "internal registers are documented to all reset to zero, but comments & code in the Windows driver indicates that the pools are NOT reset. */ for (i=0;i < FS_NR_FREE_POOLS;i++) { write_fs (dev, FP_CNF (RXB_FP(i)), 0); write_fs (dev, FP_SA (RXB_FP(i)), 0); write_fs (dev, FP_EA (RXB_FP(i)), 0); write_fs (dev, FP_CNT (RXB_FP(i)), 0); write_fs (dev, FP_CTU (RXB_FP(i)), 0); } /* The same goes for the match channel registers, although those are NOT documented that way in the Windows driver. -- REW */ /* The Windows driver DOES write 0 to these registers somewhere in the init sequence. However, a small hardware-feature, will prevent reception of data on VPI/VCI = 0/0 (Unless the channel allocated happens to have no disabled channels that have a lower number. -- REW */ /* Clear the match channel registers. */ if (IS_FS50 (dev)) { for (i=0;i<FS50_NR_CHANNELS;i++) { write_fs (dev, 0x200 + i * 4, -1); } } } static void *aligned_kmalloc(int size, gfp_t flags, int alignment) { void *t; if (alignment <= 0x10) { t = kmalloc (size, flags); if ((unsigned long)t & (alignment-1)) { printk ("Kmalloc doesn't align things correctly! %p\n", t); kfree (t); return aligned_kmalloc (size, flags, alignment * 4); } return t; } printk (KERN_ERR "Request for > 0x10 alignment not yet implemented (hard!)\n"); return NULL; } static int init_q(struct fs_dev *dev, struct queue *txq, int queue, int nentries, int is_rq) { int sz = nentries * sizeof (struct FS_QENTRY); struct FS_QENTRY *p; func_enter (); fs_dprintk (FS_DEBUG_INIT, "Inititing queue at %x: %d entries:\n", queue, nentries); p = aligned_kmalloc (sz, GFP_KERNEL, 0x10); fs_dprintk (FS_DEBUG_ALLOC, "Alloc queue: %p(%d)\n", p, sz); if (!p) return 0; write_fs (dev, Q_SA(queue), virt_to_bus(p)); write_fs (dev, Q_EA(queue), virt_to_bus(p+nentries-1)); write_fs (dev, Q_WP(queue), virt_to_bus(p)); write_fs (dev, Q_RP(queue), virt_to_bus(p)); if (is_rq) { /* Configuration for the receive queue: 0: interrupt immediately, no pre-warning to empty queues: We do our best to keep the queue filled anyway. */ write_fs (dev, Q_CNF(queue), 0 ); } txq->sa = p; txq->ea = p; txq->offset = queue; func_exit (); return 1; } static int init_fp(struct fs_dev *dev, struct freepool *fp, int queue, int bufsize, int nr_buffers) { func_enter (); fs_dprintk (FS_DEBUG_INIT, "Inititing free pool at %x:\n", queue); write_fs (dev, FP_CNF(queue), (bufsize * RBFP_RBS) | RBFP_RBSVAL | RBFP_CME); write_fs (dev, FP_SA(queue), 0); write_fs (dev, FP_EA(queue), 0); write_fs (dev, FP_CTU(queue), 0); write_fs (dev, FP_CNT(queue), 0); fp->offset = queue; fp->bufsize = bufsize; fp->nr_buffers = nr_buffers; func_exit (); return 1; } static inline int nr_buffers_in_freepool (struct fs_dev *dev, struct freepool *fp) { #if 0 /* This seems to be unreliable.... */ return read_fs (dev, FP_CNT (fp->offset)); #else return fp->n; #endif } /* Check if this gets going again if a pool ever runs out. -- Yes, it does. I've seen "receive abort: no buffers" and things started working again after that... -- REW */ static void top_off_fp (struct fs_dev *dev, struct freepool *fp, gfp_t gfp_flags) { struct FS_BPENTRY *qe, *ne; struct sk_buff *skb; int n = 0; u32 qe_tmp; fs_dprintk (FS_DEBUG_QUEUE, "Topping off queue at %x (%d-%d/%d)\n", fp->offset, read_fs (dev, FP_CNT (fp->offset)), fp->n, fp->nr_buffers); while (nr_buffers_in_freepool(dev, fp) < fp->nr_buffers) { skb = alloc_skb (fp->bufsize, gfp_flags); fs_dprintk (FS_DEBUG_ALLOC, "Alloc rec-skb: %p(%d)\n", skb, fp->bufsize); if (!skb) break; ne = kmalloc (sizeof (struct FS_BPENTRY), gfp_flags); fs_dprintk (FS_DEBUG_ALLOC, "Alloc rec-d: %p(%Zd)\n", ne, sizeof (struct FS_BPENTRY)); if (!ne) { fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p\n", skb); dev_kfree_skb_any (skb); break; } fs_dprintk (FS_DEBUG_QUEUE, "Adding skb %p desc %p -> %p(%p) ", skb, ne, skb->data, skb->head); n++; ne->flags = FP_FLAGS_EPI | fp->bufsize; ne->next = virt_to_bus (NULL); ne->bsa = virt_to_bus (skb->data); ne->aal_bufsize = fp->bufsize; ne->skb = skb; ne->fp = fp; /* * FIXME: following code encodes and decodes * machine pointers (could be 64-bit) into a * 32-bit register. */ qe_tmp = read_fs (dev, FP_EA(fp->offset)); fs_dprintk (FS_DEBUG_QUEUE, "link at %x\n", qe_tmp); if (qe_tmp) { qe = bus_to_virt ((long) qe_tmp); qe->next = virt_to_bus(ne); qe->flags &= ~FP_FLAGS_EPI; } else write_fs (dev, FP_SA(fp->offset), virt_to_bus(ne)); write_fs (dev, FP_EA(fp->offset), virt_to_bus (ne)); fp->n++; /* XXX Atomic_inc? */ write_fs (dev, FP_CTU(fp->offset), 1); } fs_dprintk (FS_DEBUG_QUEUE, "Added %d entries. \n", n); } static void free_queue(struct fs_dev *dev, struct queue *txq) { func_enter (); write_fs (dev, Q_SA(txq->offset), 0); write_fs (dev, Q_EA(txq->offset), 0); write_fs (dev, Q_RP(txq->offset), 0); write_fs (dev, Q_WP(txq->offset), 0); /* Configuration ? */ fs_dprintk (FS_DEBUG_ALLOC, "Free queue: %p\n", txq->sa); kfree (txq->sa); func_exit (); } static void free_freepool(struct fs_dev *dev, struct freepool *fp) { func_enter (); write_fs (dev, FP_CNF(fp->offset), 0); write_fs (dev, FP_SA (fp->offset), 0); write_fs (dev, FP_EA (fp->offset), 0); write_fs (dev, FP_CNT(fp->offset), 0); write_fs (dev, FP_CTU(fp->offset), 0); func_exit (); } static irqreturn_t fs_irq (int irq, void *dev_id) { int i; u32 status; struct fs_dev *dev = dev_id; status = read_fs (dev, ISR); if (!status) return IRQ_NONE; func_enter (); #ifdef IRQ_RATE_LIMIT /* Aaargh! I'm ashamed. This costs more lines-of-code than the actual interrupt routine!. (Well, used to when I wrote that comment) -- REW */ { static int lastjif; static int nintr=0; if (lastjif == jiffies) { if (++nintr > IRQ_RATE_LIMIT) { free_irq (dev->irq, dev_id); printk (KERN_ERR "fs: Too many interrupts. Turning off interrupt %d.\n", dev->irq); } } else { lastjif = jiffies; nintr = 0; } } #endif fs_dprintk (FS_DEBUG_QUEUE, "in intr: txq %d txrq %d\n", read_fs (dev, Q_EA (dev->hp_txq.offset)) - read_fs (dev, Q_SA (dev->hp_txq.offset)), read_fs (dev, Q_EA (dev->tx_relq.offset)) - read_fs (dev, Q_SA (dev->tx_relq.offset))); /* print the bits in the ISR register. */ if (fs_debug & FS_DEBUG_IRQ) { /* The FS_DEBUG things are unnecessary here. But this way it is clear for grep that these are debug prints. */ fs_dprintk (FS_DEBUG_IRQ, "IRQ status:"); for (i=0;i<27;i++) if (status & (1 << i)) fs_dprintk (FS_DEBUG_IRQ, " %s", irq_bitname[i]); fs_dprintk (FS_DEBUG_IRQ, "\n"); } if (status & ISR_RBRQ0_W) { fs_dprintk (FS_DEBUG_IRQ, "Iiiin-coming (0)!!!!\n"); process_incoming (dev, &dev->rx_rq[0]); /* items mentioned on RBRQ0 are from FP 0 or 1. */ top_off_fp (dev, &dev->rx_fp[0], GFP_ATOMIC); top_off_fp (dev, &dev->rx_fp[1], GFP_ATOMIC); } if (status & ISR_RBRQ1_W) { fs_dprintk (FS_DEBUG_IRQ, "Iiiin-coming (1)!!!!\n"); process_incoming (dev, &dev->rx_rq[1]); top_off_fp (dev, &dev->rx_fp[2], GFP_ATOMIC); top_off_fp (dev, &dev->rx_fp[3], GFP_ATOMIC); } if (status & ISR_RBRQ2_W) { fs_dprintk (FS_DEBUG_IRQ, "Iiiin-coming (2)!!!!\n"); process_incoming (dev, &dev->rx_rq[2]); top_off_fp (dev, &dev->rx_fp[4], GFP_ATOMIC); top_off_fp (dev, &dev->rx_fp[5], GFP_ATOMIC); } if (status & ISR_RBRQ3_W) { fs_dprintk (FS_DEBUG_IRQ, "Iiiin-coming (3)!!!!\n"); process_incoming (dev, &dev->rx_rq[3]); top_off_fp (dev, &dev->rx_fp[6], GFP_ATOMIC); top_off_fp (dev, &dev->rx_fp[7], GFP_ATOMIC); } if (status & ISR_CSQ_W) { fs_dprintk (FS_DEBUG_IRQ, "Command executed ok!\n"); process_return_queue (dev, &dev->st_q); } if (status & ISR_TBRQ_W) { fs_dprintk (FS_DEBUG_IRQ, "Data tramsitted!\n"); process_txdone_queue (dev, &dev->tx_relq); } func_exit (); return IRQ_HANDLED; } #ifdef FS_POLL_FREQ static void fs_poll (unsigned long data) { struct fs_dev *dev = (struct fs_dev *) data; fs_irq (0, dev); dev->timer.expires = jiffies + FS_POLL_FREQ; add_timer (&dev->timer); } #endif static int fs_init(struct fs_dev *dev) { struct pci_dev *pci_dev; int isr, to; int i; func_enter (); pci_dev = dev->pci_dev; printk (KERN_INFO "found a FireStream %d card, base %16llx, irq%d.\n", IS_FS50(dev)?50:155, (unsigned long long)pci_resource_start(pci_dev, 0), dev->pci_dev->irq); if (fs_debug & FS_DEBUG_INIT) my_hd ((unsigned char *) dev, sizeof (*dev)); undocumented_pci_fix (pci_dev); dev->hw_base = pci_resource_start(pci_dev, 0); dev->base = ioremap(dev->hw_base, 0x1000); reset_chip (dev); write_fs (dev, SARMODE0, 0 | (0 * SARMODE0_SHADEN) /* We don't use shadow registers. */ | (1 * SARMODE0_INTMODE_READCLEAR) | (1 * SARMODE0_CWRE) | (IS_FS50(dev) ? SARMODE0_PRPWT_FS50_5: SARMODE0_PRPWT_FS155_3) | (1 * SARMODE0_CALSUP_1) | (IS_FS50(dev) ? (0 | SARMODE0_RXVCS_32 | SARMODE0_ABRVCS_32 | SARMODE0_TXVCS_32): (0 | SARMODE0_RXVCS_1k | SARMODE0_ABRVCS_1k | SARMODE0_TXVCS_1k))); /* 10ms * 100 is 1 second. That should be enough, as AN3:9 says it takes 1ms. */ to = 100; while (--to) { isr = read_fs (dev, ISR); /* This bit is documented as "RESERVED" */ if (isr & ISR_INIT_ERR) { printk (KERN_ERR "Error initializing the FS... \n"); goto unmap; } if (isr & ISR_INIT) { fs_dprintk (FS_DEBUG_INIT, "Ha! Initialized OK!\n"); break; } /* Try again after 10ms. */ msleep(10); } if (!to) { printk (KERN_ERR "timeout initializing the FS... \n"); goto unmap; } /* XXX fix for fs155 */ dev->channel_mask = 0x1f; dev->channo = 0; /* AN3: 10 */ write_fs (dev, SARMODE1, 0 | (fs_keystream * SARMODE1_DEFHEC) /* XXX PHY */ | ((loopback == 1) * SARMODE1_TSTLP) /* XXX Loopback mode enable... */ | (1 * SARMODE1_DCRM) | (1 * SARMODE1_DCOAM) | (0 * SARMODE1_OAMCRC) | (0 * SARMODE1_DUMPE) | (0 * SARMODE1_GPLEN) | (0 * SARMODE1_GNAM) | (0 * SARMODE1_GVAS) | (0 * SARMODE1_GPAS) | (1 * SARMODE1_GPRI) | (0 * SARMODE1_PMS) | (0 * SARMODE1_GFCR) | (1 * SARMODE1_HECM2) | (1 * SARMODE1_HECM1) | (1 * SARMODE1_HECM0) | (1 << 12) /* That's what hang's driver does. Program to 0 */ | (0 * 0xff) /* XXX FS155 */); /* Cal prescale etc */ /* AN3: 11 */ write_fs (dev, TMCONF, 0x0000000f); write_fs (dev, CALPRESCALE, 0x01010101 * num); write_fs (dev, 0x80, 0x000F00E4); /* AN3: 12 */ write_fs (dev, CELLOSCONF, 0 | ( 0 * CELLOSCONF_CEN) | ( CELLOSCONF_SC1) | (0x80 * CELLOSCONF_COBS) | (num * CELLOSCONF_COPK) /* Changed from 0xff to 0x5a */ | (num * CELLOSCONF_COST));/* after a hint from Hang. * performance jumped 50->70... */ /* Magic value by Hang */ write_fs (dev, CELLOSCONF_COST, 0x0B809191); if (IS_FS50 (dev)) { write_fs (dev, RAS0, RAS0_DCD_XHLT); dev->atm_dev->ci_range.vpi_bits = 12; dev->atm_dev->ci_range.vci_bits = 16; dev->nchannels = FS50_NR_CHANNELS; } else { write_fs (dev, RAS0, RAS0_DCD_XHLT | (((1 << FS155_VPI_BITS) - 1) * RAS0_VPSEL) | (((1 << FS155_VCI_BITS) - 1) * RAS0_VCSEL)); /* We can chose the split arbitrarily. We might be able to support more. Whatever. This should do for now. */ dev->atm_dev->ci_range.vpi_bits = FS155_VPI_BITS; dev->atm_dev->ci_range.vci_bits = FS155_VCI_BITS; /* Address bits we can't use should be compared to 0. */ write_fs (dev, RAC, 0); /* Manual (AN9, page 6) says ASF1=0 means compare Utopia address * too. I can't find ASF1 anywhere. Anyway, we AND with just the * other bits, then compare with 0, which is exactly what we * want. */ write_fs (dev, RAM, (1 << (28 - FS155_VPI_BITS - FS155_VCI_BITS)) - 1); dev->nchannels = FS155_NR_CHANNELS; } dev->atm_vccs = kcalloc (dev->nchannels, sizeof (struct atm_vcc *), GFP_KERNEL); fs_dprintk (FS_DEBUG_ALLOC, "Alloc atmvccs: %p(%Zd)\n", dev->atm_vccs, dev->nchannels * sizeof (struct atm_vcc *)); if (!dev->atm_vccs) { printk (KERN_WARNING "Couldn't allocate memory for VCC buffers. Woops!\n"); /* XXX Clean up..... */ goto unmap; } dev->tx_inuse = kzalloc (dev->nchannels / 8 /* bits/byte */ , GFP_KERNEL); fs_dprintk (FS_DEBUG_ALLOC, "Alloc tx_inuse: %p(%d)\n", dev->atm_vccs, dev->nchannels / 8); if (!dev->tx_inuse) { printk (KERN_WARNING "Couldn't allocate memory for tx_inuse bits!\n"); /* XXX Clean up..... */ goto unmap; } /* -- RAS1 : FS155 and 50 differ. Default (0) should be OK for both */ /* -- RAS2 : FS50 only: Default is OK. */ /* DMAMODE, default should be OK. -- REW */ write_fs (dev, DMAMR, DMAMR_TX_MODE_FULL); init_q (dev, &dev->hp_txq, TX_PQ(TXQ_HP), TXQ_NENTRIES, 0); init_q (dev, &dev->lp_txq, TX_PQ(TXQ_LP), TXQ_NENTRIES, 0); init_q (dev, &dev->tx_relq, TXB_RQ, TXQ_NENTRIES, 1); init_q (dev, &dev->st_q, ST_Q, TXQ_NENTRIES, 1); for (i=0;i < FS_NR_FREE_POOLS;i++) { init_fp (dev, &dev->rx_fp[i], RXB_FP(i), rx_buf_sizes[i], rx_pool_sizes[i]); top_off_fp (dev, &dev->rx_fp[i], GFP_KERNEL); } for (i=0;i < FS_NR_RX_QUEUES;i++) init_q (dev, &dev->rx_rq[i], RXB_RQ(i), RXRQ_NENTRIES, 1); dev->irq = pci_dev->irq; if (request_irq (dev->irq, fs_irq, IRQF_SHARED, "firestream", dev)) { printk (KERN_WARNING "couldn't get irq %d for firestream.\n", pci_dev->irq); /* XXX undo all previous stuff... */ goto unmap; } fs_dprintk (FS_DEBUG_INIT, "Grabbed irq %d for dev at %p.\n", dev->irq, dev); /* We want to be notified of most things. Just the statistics count overflows are not interesting */ write_fs (dev, IMR, 0 | ISR_RBRQ0_W | ISR_RBRQ1_W | ISR_RBRQ2_W | ISR_RBRQ3_W | ISR_TBRQ_W | ISR_CSQ_W); write_fs (dev, SARMODE0, 0 | (0 * SARMODE0_SHADEN) /* We don't use shadow registers. */ | (1 * SARMODE0_GINT) | (1 * SARMODE0_INTMODE_READCLEAR) | (0 * SARMODE0_CWRE) | (IS_FS50(dev)?SARMODE0_PRPWT_FS50_5: SARMODE0_PRPWT_FS155_3) | (1 * SARMODE0_CALSUP_1) | (IS_FS50 (dev)?(0 | SARMODE0_RXVCS_32 | SARMODE0_ABRVCS_32 | SARMODE0_TXVCS_32): (0 | SARMODE0_RXVCS_1k | SARMODE0_ABRVCS_1k | SARMODE0_TXVCS_1k)) | (1 * SARMODE0_RUN)); init_phy (dev, PHY_NTC_INIT); if (loopback == 2) { write_phy (dev, 0x39, 0x000e); } #ifdef FS_POLL_FREQ init_timer (&dev->timer); dev->timer.data = (unsigned long) dev; dev->timer.function = fs_poll; dev->timer.expires = jiffies + FS_POLL_FREQ; add_timer (&dev->timer); #endif dev->atm_dev->dev_data = dev; func_exit (); return 0; unmap: iounmap(dev->base); return 1; } static int firestream_init_one(struct pci_dev *pci_dev, const struct pci_device_id *ent) { struct atm_dev *atm_dev; struct fs_dev *fs_dev; if (pci_enable_device(pci_dev)) goto err_out; fs_dev = kzalloc (sizeof (struct fs_dev), GFP_KERNEL); fs_dprintk (FS_DEBUG_ALLOC, "Alloc fs-dev: %p(%Zd)\n", fs_dev, sizeof (struct fs_dev)); if (!fs_dev) goto err_out; atm_dev = atm_dev_register("fs", &pci_dev->dev, &ops, -1, NULL); if (!atm_dev) goto err_out_free_fs_dev; fs_dev->pci_dev = pci_dev; fs_dev->atm_dev = atm_dev; fs_dev->flags = ent->driver_data; if (fs_init(fs_dev)) goto err_out_free_atm_dev; fs_dev->next = fs_boards; fs_boards = fs_dev; return 0; err_out_free_atm_dev: atm_dev_deregister(atm_dev); err_out_free_fs_dev: kfree(fs_dev); err_out: return -ENODEV; } static void firestream_remove_one(struct pci_dev *pdev) { int i; struct fs_dev *dev, *nxtdev; struct fs_vcc *vcc; struct FS_BPENTRY *fp, *nxt; func_enter (); #if 0 printk ("hptxq:\n"); for (i=0;i<60;i++) { printk ("%d: %08x %08x %08x %08x \n", i, pq[qp].cmd, pq[qp].p0, pq[qp].p1, pq[qp].p2); qp++; if (qp >= 60) qp = 0; } printk ("descriptors:\n"); for (i=0;i<60;i++) { printk ("%d: %p: %08x %08x %p %p\n", i, da[qd], dq[qd].flags, dq[qd].bsa, dq[qd].skb, dq[qd].dev); qd++; if (qd >= 60) qd = 0; } #endif for (dev = fs_boards;dev != NULL;dev=nxtdev) { fs_dprintk (FS_DEBUG_CLEANUP, "Releasing resources for dev at %p.\n", dev); /* XXX Hit all the tx channels too! */ for (i=0;i < dev->nchannels;i++) { if (dev->atm_vccs[i]) { vcc = FS_VCC (dev->atm_vccs[i]); submit_command (dev, &dev->hp_txq, QE_CMD_TX_PURGE_INH | QE_CMD_IMM_INQ | vcc->channo, 0,0,0); submit_command (dev, &dev->hp_txq, QE_CMD_RX_PURGE_INH | QE_CMD_IMM_INQ | vcc->channo, 0,0,0); } } /* XXX Wait a while for the chip to release all buffers. */ for (i=0;i < FS_NR_FREE_POOLS;i++) { for (fp=bus_to_virt (read_fs (dev, FP_SA(dev->rx_fp[i].offset))); !(fp->flags & FP_FLAGS_EPI);fp = nxt) { fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p\n", fp->skb); dev_kfree_skb_any (fp->skb); nxt = bus_to_virt (fp->next); fs_dprintk (FS_DEBUG_ALLOC, "Free rec-d: %p\n", fp); kfree (fp); } fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p\n", fp->skb); dev_kfree_skb_any (fp->skb); fs_dprintk (FS_DEBUG_ALLOC, "Free rec-d: %p\n", fp); kfree (fp); } /* Hang the chip in "reset", prevent it clobbering memory that is no longer ours. */ reset_chip (dev); fs_dprintk (FS_DEBUG_CLEANUP, "Freeing irq%d.\n", dev->irq); free_irq (dev->irq, dev); del_timer (&dev->timer); atm_dev_deregister(dev->atm_dev); free_queue (dev, &dev->hp_txq); free_queue (dev, &dev->lp_txq); free_queue (dev, &dev->tx_relq); free_queue (dev, &dev->st_q); fs_dprintk (FS_DEBUG_ALLOC, "Free atmvccs: %p\n", dev->atm_vccs); kfree (dev->atm_vccs); for (i=0;i< FS_NR_FREE_POOLS;i++) free_freepool (dev, &dev->rx_fp[i]); for (i=0;i < FS_NR_RX_QUEUES;i++) free_queue (dev, &dev->rx_rq[i]); iounmap(dev->base); fs_dprintk (FS_DEBUG_ALLOC, "Free fs-dev: %p\n", dev); nxtdev = dev->next; kfree (dev); } func_exit (); } static struct pci_device_id firestream_pci_tbl[] = { { PCI_VDEVICE(FUJITSU_ME, PCI_DEVICE_ID_FUJITSU_FS50), FS_IS50}, { PCI_VDEVICE(FUJITSU_ME, PCI_DEVICE_ID_FUJITSU_FS155), FS_IS155}, { 0, } }; MODULE_DEVICE_TABLE(pci, firestream_pci_tbl); static struct pci_driver firestream_driver = { .name = "firestream", .id_table = firestream_pci_tbl, .probe = firestream_init_one, .remove = firestream_remove_one, }; static int __init firestream_init_module (void) { int error; func_enter (); error = pci_register_driver(&firestream_driver); func_exit (); return error; } static void __exit firestream_cleanup_module(void) { pci_unregister_driver(&firestream_driver); } module_init(firestream_init_module); module_exit(firestream_cleanup_module); MODULE_LICENSE("GPL");
gpl-2.0
sakuraba001/android_kernel_samsung_tblte
drivers/mfd/max77686-irq.c
2966
8997
/* * max77686-irq.c - Interrupt controller support for MAX77686 * * Copyright (C) 2012 Samsung Electronics Co.Ltd * Chiwoong Byun <woong.byun@samsung.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * * This driver is based on max8997-irq.c */ #include <linux/err.h> #include <linux/irq.h> #include <linux/interrupt.h> #include <linux/gpio.h> #include <linux/mfd/max77686.h> #include <linux/mfd/max77686-private.h> #include <linux/irqdomain.h> #include <linux/regmap.h> enum { MAX77686_DEBUG_IRQ_INFO = 1 << 0, MAX77686_DEBUG_IRQ_MASK = 1 << 1, MAX77686_DEBUG_IRQ_INT = 1 << 2, }; static int debug_mask = 0; module_param(debug_mask, int, 0); MODULE_PARM_DESC(debug_mask, "Set debug_mask : 0x0=off 0x1=IRQ_INFO 0x2=IRQ_MASK 0x4=IRQ_INI)"); static const u8 max77686_mask_reg[] = { [PMIC_INT1] = MAX77686_REG_INT1MSK, [PMIC_INT2] = MAX77686_REG_INT2MSK, [RTC_INT] = MAX77686_RTC_INTM, }; static struct regmap *max77686_get_regmap(struct max77686_dev *max77686, enum max77686_irq_source src) { switch (src) { case PMIC_INT1 ... PMIC_INT2: return max77686->regmap; case RTC_INT: return max77686->rtc_regmap; default: return ERR_PTR(-EINVAL); } } struct max77686_irq_data { int mask; enum max77686_irq_source group; }; #define DECLARE_IRQ(idx, _group, _mask) \ [(idx)] = { .group = (_group), .mask = (_mask) } static const struct max77686_irq_data max77686_irqs[] = { DECLARE_IRQ(MAX77686_PMICIRQ_PWRONF, PMIC_INT1, 1 << 0), DECLARE_IRQ(MAX77686_PMICIRQ_PWRONR, PMIC_INT1, 1 << 1), DECLARE_IRQ(MAX77686_PMICIRQ_JIGONBF, PMIC_INT1, 1 << 2), DECLARE_IRQ(MAX77686_PMICIRQ_JIGONBR, PMIC_INT1, 1 << 3), DECLARE_IRQ(MAX77686_PMICIRQ_ACOKBF, PMIC_INT1, 1 << 4), DECLARE_IRQ(MAX77686_PMICIRQ_ACOKBR, PMIC_INT1, 1 << 5), DECLARE_IRQ(MAX77686_PMICIRQ_ONKEY1S, PMIC_INT1, 1 << 6), DECLARE_IRQ(MAX77686_PMICIRQ_MRSTB, PMIC_INT1, 1 << 7), DECLARE_IRQ(MAX77686_PMICIRQ_140C, PMIC_INT2, 1 << 0), DECLARE_IRQ(MAX77686_PMICIRQ_120C, PMIC_INT2, 1 << 1), DECLARE_IRQ(MAX77686_RTCIRQ_RTC60S, RTC_INT, 1 << 0), DECLARE_IRQ(MAX77686_RTCIRQ_RTCA1, RTC_INT, 1 << 1), DECLARE_IRQ(MAX77686_RTCIRQ_RTCA2, RTC_INT, 1 << 2), DECLARE_IRQ(MAX77686_RTCIRQ_SMPL, RTC_INT, 1 << 3), DECLARE_IRQ(MAX77686_RTCIRQ_RTC1S, RTC_INT, 1 << 4), DECLARE_IRQ(MAX77686_RTCIRQ_WTSR, RTC_INT, 1 << 5), }; static void max77686_irq_lock(struct irq_data *data) { struct max77686_dev *max77686 = irq_get_chip_data(data->irq); if (debug_mask & MAX77686_DEBUG_IRQ_MASK) pr_info("%s\n", __func__); mutex_lock(&max77686->irqlock); } static void max77686_irq_sync_unlock(struct irq_data *data) { struct max77686_dev *max77686 = irq_get_chip_data(data->irq); int i; for (i = 0; i < MAX77686_IRQ_GROUP_NR; i++) { u8 mask_reg = max77686_mask_reg[i]; struct regmap *map = max77686_get_regmap(max77686, i); if (debug_mask & MAX77686_DEBUG_IRQ_MASK) pr_debug("%s: mask_reg[%d]=0x%x, cur=0x%x\n", __func__, i, mask_reg, max77686->irq_masks_cur[i]); if (mask_reg == MAX77686_REG_INVALID || IS_ERR_OR_NULL(map)) continue; max77686->irq_masks_cache[i] = max77686->irq_masks_cur[i]; regmap_write(map, max77686_mask_reg[i], max77686->irq_masks_cur[i]); } mutex_unlock(&max77686->irqlock); } static const inline struct max77686_irq_data *to_max77686_irq(int irq) { struct irq_data *data = irq_get_irq_data(irq); return &max77686_irqs[data->hwirq]; } static void max77686_irq_mask(struct irq_data *data) { struct max77686_dev *max77686 = irq_get_chip_data(data->irq); const struct max77686_irq_data *irq_data = to_max77686_irq(data->irq); max77686->irq_masks_cur[irq_data->group] |= irq_data->mask; if (debug_mask & MAX77686_DEBUG_IRQ_MASK) pr_info("%s: group=%d, cur=0x%x\n", __func__, irq_data->group, max77686->irq_masks_cur[irq_data->group]); } static void max77686_irq_unmask(struct irq_data *data) { struct max77686_dev *max77686 = irq_get_chip_data(data->irq); const struct max77686_irq_data *irq_data = to_max77686_irq(data->irq); max77686->irq_masks_cur[irq_data->group] &= ~irq_data->mask; if (debug_mask & MAX77686_DEBUG_IRQ_MASK) pr_info("%s: group=%d, cur=0x%x\n", __func__, irq_data->group, max77686->irq_masks_cur[irq_data->group]); } static struct irq_chip max77686_irq_chip = { .name = "max77686", .irq_bus_lock = max77686_irq_lock, .irq_bus_sync_unlock = max77686_irq_sync_unlock, .irq_mask = max77686_irq_mask, .irq_unmask = max77686_irq_unmask, }; static irqreturn_t max77686_irq_thread(int irq, void *data) { struct max77686_dev *max77686 = data; unsigned int irq_reg[MAX77686_IRQ_GROUP_NR] = {}; unsigned int irq_src; int ret; int i, cur_irq; ret = regmap_read(max77686->regmap, MAX77686_REG_INTSRC, &irq_src); if (ret < 0) { dev_err(max77686->dev, "Failed to read interrupt source: %d\n", ret); return IRQ_NONE; } if (debug_mask & MAX77686_DEBUG_IRQ_INT) pr_info("%s: irq_src=0x%x\n", __func__, irq_src); if (irq_src == MAX77686_IRQSRC_PMIC) { ret = regmap_bulk_read(max77686->regmap, MAX77686_REG_INT1, irq_reg, 2); if (ret < 0) { dev_err(max77686->dev, "Failed to read interrupt source: %d\n", ret); return IRQ_NONE; } if (debug_mask & MAX77686_DEBUG_IRQ_INT) pr_info("%s: int1=0x%x, int2=0x%x\n", __func__, irq_reg[PMIC_INT1], irq_reg[PMIC_INT2]); } if (irq_src & MAX77686_IRQSRC_RTC) { ret = regmap_read(max77686->rtc_regmap, MAX77686_RTC_INT, &irq_reg[RTC_INT]); if (ret < 0) { dev_err(max77686->dev, "Failed to read interrupt source: %d\n", ret); return IRQ_NONE; } if (debug_mask & MAX77686_DEBUG_IRQ_INT) pr_info("%s: rtc int=0x%x\n", __func__, irq_reg[RTC_INT]); } for (i = 0; i < MAX77686_IRQ_GROUP_NR; i++) irq_reg[i] &= ~max77686->irq_masks_cur[i]; for (i = 0; i < MAX77686_IRQ_NR; i++) { if (irq_reg[max77686_irqs[i].group] & max77686_irqs[i].mask) { cur_irq = irq_find_mapping(max77686->irq_domain, i); if (cur_irq) handle_nested_irq(cur_irq); } } return IRQ_HANDLED; } static int max77686_irq_domain_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw) { struct max77686_dev *max77686 = d->host_data; irq_set_chip_data(irq, max77686); irq_set_chip_and_handler(irq, &max77686_irq_chip, handle_edge_irq); irq_set_nested_thread(irq, 1); #ifdef CONFIG_ARM set_irq_flags(irq, IRQF_VALID); #else irq_set_noprobe(irq); #endif return 0; } static struct irq_domain_ops max77686_irq_domain_ops = { .map = max77686_irq_domain_map, }; int max77686_irq_init(struct max77686_dev *max77686) { struct irq_domain *domain; int i; int ret; int val; struct regmap *map; mutex_init(&max77686->irqlock); if (max77686->irq_gpio && !max77686->irq) { max77686->irq = gpio_to_irq(max77686->irq_gpio); if (debug_mask & MAX77686_DEBUG_IRQ_INT) { ret = gpio_request(max77686->irq_gpio, "pmic_irq"); if (ret < 0) { dev_err(max77686->dev, "Failed to request gpio %d with ret:" "%d\n", max77686->irq_gpio, ret); return IRQ_NONE; } gpio_direction_input(max77686->irq_gpio); val = gpio_get_value(max77686->irq_gpio); gpio_free(max77686->irq_gpio); pr_info("%s: gpio_irq=%x\n", __func__, val); } } if (!max77686->irq) { dev_err(max77686->dev, "irq is not specified\n"); return -ENODEV; } /* Mask individual interrupt sources */ for (i = 0; i < MAX77686_IRQ_GROUP_NR; i++) { max77686->irq_masks_cur[i] = 0xff; max77686->irq_masks_cache[i] = 0xff; map = max77686_get_regmap(max77686, i); if (IS_ERR_OR_NULL(map)) continue; if (max77686_mask_reg[i] == MAX77686_REG_INVALID) continue; regmap_write(map, max77686_mask_reg[i], 0xff); } domain = irq_domain_add_linear(NULL, MAX77686_IRQ_NR, &max77686_irq_domain_ops, max77686); if (!domain) { dev_err(max77686->dev, "could not create irq domain\n"); return -ENODEV; } max77686->irq_domain = domain; ret = request_threaded_irq(max77686->irq, NULL, max77686_irq_thread, IRQF_TRIGGER_FALLING | IRQF_ONESHOT, "max77686-irq", max77686); if (ret) dev_err(max77686->dev, "Failed to request IRQ %d: %d\n", max77686->irq, ret); if (debug_mask & MAX77686_DEBUG_IRQ_INFO) pr_info("%s-\n", __func__); return 0; } void max77686_irq_exit(struct max77686_dev *max77686) { if (max77686->irq) free_irq(max77686->irq, max77686); }
gpl-2.0
u-ra/android_kernel_htc_villec2
drivers/sbus/char/flash.c
2966
5115
/* flash.c: Allow mmap access to the OBP Flash, for OBP updates. * * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be) */ #include <linux/module.h> #include <linux/types.h> #include <linux/errno.h> #include <linux/miscdevice.h> #include <linux/fcntl.h> #include <linux/poll.h> #include <linux/init.h> #include <linux/mutex.h> #include <linux/spinlock.h> #include <linux/mm.h> #include <linux/of.h> #include <linux/of_device.h> #include <asm/system.h> #include <asm/uaccess.h> #include <asm/pgtable.h> #include <asm/io.h> #include <asm/upa.h> static DEFINE_MUTEX(flash_mutex); static DEFINE_SPINLOCK(flash_lock); static struct { unsigned long read_base; /* Physical read address */ unsigned long write_base; /* Physical write address */ unsigned long read_size; /* Size of read area */ unsigned long write_size; /* Size of write area */ unsigned long busy; /* In use? */ } flash; #define FLASH_MINOR 152 static int flash_mmap(struct file *file, struct vm_area_struct *vma) { unsigned long addr; unsigned long size; spin_lock(&flash_lock); if (flash.read_base == flash.write_base) { addr = flash.read_base; size = flash.read_size; } else { if ((vma->vm_flags & VM_READ) && (vma->vm_flags & VM_WRITE)) { spin_unlock(&flash_lock); return -EINVAL; } if (vma->vm_flags & VM_READ) { addr = flash.read_base; size = flash.read_size; } else if (vma->vm_flags & VM_WRITE) { addr = flash.write_base; size = flash.write_size; } else { spin_unlock(&flash_lock); return -ENXIO; } } spin_unlock(&flash_lock); if ((vma->vm_pgoff << PAGE_SHIFT) > size) return -ENXIO; addr = vma->vm_pgoff + (addr >> PAGE_SHIFT); if (vma->vm_end - (vma->vm_start + (vma->vm_pgoff << PAGE_SHIFT)) > size) size = vma->vm_end - (vma->vm_start + (vma->vm_pgoff << PAGE_SHIFT)); vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); if (io_remap_pfn_range(vma, vma->vm_start, addr, size, vma->vm_page_prot)) return -EAGAIN; return 0; } static long long flash_llseek(struct file *file, long long offset, int origin) { mutex_lock(&flash_mutex); switch (origin) { case 0: file->f_pos = offset; break; case 1: file->f_pos += offset; if (file->f_pos > flash.read_size) file->f_pos = flash.read_size; break; case 2: file->f_pos = flash.read_size; break; default: mutex_unlock(&flash_mutex); return -EINVAL; } mutex_unlock(&flash_mutex); return file->f_pos; } static ssize_t flash_read(struct file * file, char __user * buf, size_t count, loff_t *ppos) { loff_t p = *ppos; int i; if (count > flash.read_size - p) count = flash.read_size - p; for (i = 0; i < count; i++) { u8 data = upa_readb(flash.read_base + p + i); if (put_user(data, buf)) return -EFAULT; buf++; } *ppos += count; return count; } static int flash_open(struct inode *inode, struct file *file) { mutex_lock(&flash_mutex); if (test_and_set_bit(0, (void *)&flash.busy) != 0) { mutex_unlock(&flash_mutex); return -EBUSY; } mutex_unlock(&flash_mutex); return 0; } static int flash_release(struct inode *inode, struct file *file) { spin_lock(&flash_lock); flash.busy = 0; spin_unlock(&flash_lock); return 0; } static const struct file_operations flash_fops = { /* no write to the Flash, use mmap * and play flash dependent tricks. */ .owner = THIS_MODULE, .llseek = flash_llseek, .read = flash_read, .mmap = flash_mmap, .open = flash_open, .release = flash_release, }; static struct miscdevice flash_dev = { FLASH_MINOR, "flash", &flash_fops }; static int __devinit flash_probe(struct platform_device *op) { struct device_node *dp = op->dev.of_node; struct device_node *parent; parent = dp->parent; if (strcmp(parent->name, "sbus") && strcmp(parent->name, "sbi") && strcmp(parent->name, "ebus")) return -ENODEV; flash.read_base = op->resource[0].start; flash.read_size = resource_size(&op->resource[0]); if (op->resource[1].flags) { flash.write_base = op->resource[1].start; flash.write_size = resource_size(&op->resource[1]); } else { flash.write_base = op->resource[0].start; flash.write_size = resource_size(&op->resource[0]); } flash.busy = 0; printk(KERN_INFO "%s: OBP Flash, RD %lx[%lx] WR %lx[%lx]\n", op->dev.of_node->full_name, flash.read_base, flash.read_size, flash.write_base, flash.write_size); return misc_register(&flash_dev); } static int __devexit flash_remove(struct platform_device *op) { misc_deregister(&flash_dev); return 0; } static const struct of_device_id flash_match[] = { { .name = "flashprom", }, {}, }; MODULE_DEVICE_TABLE(of, flash_match); static struct platform_driver flash_driver = { .driver = { .name = "flash", .owner = THIS_MODULE, .of_match_table = flash_match, }, .probe = flash_probe, .remove = __devexit_p(flash_remove), }; static int __init flash_init(void) { return platform_driver_register(&flash_driver); } static void __exit flash_cleanup(void) { platform_driver_unregister(&flash_driver); } module_init(flash_init); module_exit(flash_cleanup); MODULE_LICENSE("GPL");
gpl-2.0
Droid-Concepts/DC-Elite_kernel_jf
net/mac80211/wep.c
4502
9337
/* * Software WEP encryption implementation * Copyright 2002, Jouni Malinen <jkmaline@cc.hut.fi> * Copyright 2003, Instant802 Networks, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ #include <linux/netdevice.h> #include <linux/types.h> #include <linux/random.h> #include <linux/compiler.h> #include <linux/crc32.h> #include <linux/crypto.h> #include <linux/err.h> #include <linux/mm.h> #include <linux/scatterlist.h> #include <linux/slab.h> #include <asm/unaligned.h> #include <net/mac80211.h> #include "ieee80211_i.h" #include "wep.h" int ieee80211_wep_init(struct ieee80211_local *local) { /* start WEP IV from a random value */ get_random_bytes(&local->wep_iv, WEP_IV_LEN); local->wep_tx_tfm = crypto_alloc_cipher("arc4", 0, CRYPTO_ALG_ASYNC); if (IS_ERR(local->wep_tx_tfm)) { local->wep_rx_tfm = ERR_PTR(-EINVAL); return PTR_ERR(local->wep_tx_tfm); } local->wep_rx_tfm = crypto_alloc_cipher("arc4", 0, CRYPTO_ALG_ASYNC); if (IS_ERR(local->wep_rx_tfm)) { crypto_free_cipher(local->wep_tx_tfm); local->wep_tx_tfm = ERR_PTR(-EINVAL); return PTR_ERR(local->wep_rx_tfm); } return 0; } void ieee80211_wep_free(struct ieee80211_local *local) { if (!IS_ERR(local->wep_tx_tfm)) crypto_free_cipher(local->wep_tx_tfm); if (!IS_ERR(local->wep_rx_tfm)) crypto_free_cipher(local->wep_rx_tfm); } static inline bool ieee80211_wep_weak_iv(u32 iv, int keylen) { /* * Fluhrer, Mantin, and Shamir have reported weaknesses in the * key scheduling algorithm of RC4. At least IVs (KeyByte + 3, * 0xff, N) can be used to speedup attacks, so avoid using them. */ if ((iv & 0xff00) == 0xff00) { u8 B = (iv >> 16) & 0xff; if (B >= 3 && B < 3 + keylen) return true; } return false; } static void ieee80211_wep_get_iv(struct ieee80211_local *local, int keylen, int keyidx, u8 *iv) { local->wep_iv++; if (ieee80211_wep_weak_iv(local->wep_iv, keylen)) local->wep_iv += 0x0100; if (!iv) return; *iv++ = (local->wep_iv >> 16) & 0xff; *iv++ = (local->wep_iv >> 8) & 0xff; *iv++ = local->wep_iv & 0xff; *iv++ = keyidx << 6; } static u8 *ieee80211_wep_add_iv(struct ieee80211_local *local, struct sk_buff *skb, int keylen, int keyidx) { struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; unsigned int hdrlen; u8 *newhdr; hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PROTECTED); if (WARN_ON(skb_tailroom(skb) < WEP_ICV_LEN || skb_headroom(skb) < WEP_IV_LEN)) return NULL; hdrlen = ieee80211_hdrlen(hdr->frame_control); newhdr = skb_push(skb, WEP_IV_LEN); memmove(newhdr, newhdr + WEP_IV_LEN, hdrlen); ieee80211_wep_get_iv(local, keylen, keyidx, newhdr + hdrlen); return newhdr + hdrlen; } static void ieee80211_wep_remove_iv(struct ieee80211_local *local, struct sk_buff *skb, struct ieee80211_key *key) { struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; unsigned int hdrlen; hdrlen = ieee80211_hdrlen(hdr->frame_control); memmove(skb->data + WEP_IV_LEN, skb->data, hdrlen); skb_pull(skb, WEP_IV_LEN); } /* Perform WEP encryption using given key. data buffer must have tailroom * for 4-byte ICV. data_len must not include this ICV. Note: this function * does _not_ add IV. data = RC4(data | CRC32(data)) */ int ieee80211_wep_encrypt_data(struct crypto_cipher *tfm, u8 *rc4key, size_t klen, u8 *data, size_t data_len) { __le32 icv; int i; if (IS_ERR(tfm)) return -1; icv = cpu_to_le32(~crc32_le(~0, data, data_len)); put_unaligned(icv, (__le32 *)(data + data_len)); crypto_cipher_setkey(tfm, rc4key, klen); for (i = 0; i < data_len + WEP_ICV_LEN; i++) crypto_cipher_encrypt_one(tfm, data + i, data + i); return 0; } /* Perform WEP encryption on given skb. 4 bytes of extra space (IV) in the * beginning of the buffer 4 bytes of extra space (ICV) in the end of the * buffer will be added. Both IV and ICV will be transmitted, so the * payload length increases with 8 bytes. * * WEP frame payload: IV + TX key idx, RC4(data), ICV = RC4(CRC32(data)) */ int ieee80211_wep_encrypt(struct ieee80211_local *local, struct sk_buff *skb, const u8 *key, int keylen, int keyidx) { u8 *iv; size_t len; u8 rc4key[3 + WLAN_KEY_LEN_WEP104]; iv = ieee80211_wep_add_iv(local, skb, keylen, keyidx); if (!iv) return -1; len = skb->len - (iv + WEP_IV_LEN - skb->data); /* Prepend 24-bit IV to RC4 key */ memcpy(rc4key, iv, 3); /* Copy rest of the WEP key (the secret part) */ memcpy(rc4key + 3, key, keylen); /* Add room for ICV */ skb_put(skb, WEP_ICV_LEN); return ieee80211_wep_encrypt_data(local->wep_tx_tfm, rc4key, keylen + 3, iv + WEP_IV_LEN, len); } /* Perform WEP decryption using given key. data buffer includes encrypted * payload, including 4-byte ICV, but _not_ IV. data_len must not include ICV. * Return 0 on success and -1 on ICV mismatch. */ int ieee80211_wep_decrypt_data(struct crypto_cipher *tfm, u8 *rc4key, size_t klen, u8 *data, size_t data_len) { __le32 crc; int i; if (IS_ERR(tfm)) return -1; crypto_cipher_setkey(tfm, rc4key, klen); for (i = 0; i < data_len + WEP_ICV_LEN; i++) crypto_cipher_decrypt_one(tfm, data + i, data + i); crc = cpu_to_le32(~crc32_le(~0, data, data_len)); if (memcmp(&crc, data + data_len, WEP_ICV_LEN) != 0) /* ICV mismatch */ return -1; return 0; } /* Perform WEP decryption on given skb. Buffer includes whole WEP part of * the frame: IV (4 bytes), encrypted payload (including SNAP header), * ICV (4 bytes). skb->len includes both IV and ICV. * * Returns 0 if frame was decrypted successfully and ICV was correct and -1 on * failure. If frame is OK, IV and ICV will be removed, i.e., decrypted payload * is moved to the beginning of the skb and skb length will be reduced. */ static int ieee80211_wep_decrypt(struct ieee80211_local *local, struct sk_buff *skb, struct ieee80211_key *key) { u32 klen; u8 rc4key[3 + WLAN_KEY_LEN_WEP104]; u8 keyidx; struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; unsigned int hdrlen; size_t len; int ret = 0; if (!ieee80211_has_protected(hdr->frame_control)) return -1; hdrlen = ieee80211_hdrlen(hdr->frame_control); if (skb->len < hdrlen + WEP_IV_LEN + WEP_ICV_LEN) return -1; len = skb->len - hdrlen - WEP_IV_LEN - WEP_ICV_LEN; keyidx = skb->data[hdrlen + 3] >> 6; if (!key || keyidx != key->conf.keyidx) return -1; klen = 3 + key->conf.keylen; /* Prepend 24-bit IV to RC4 key */ memcpy(rc4key, skb->data + hdrlen, 3); /* Copy rest of the WEP key (the secret part) */ memcpy(rc4key + 3, key->conf.key, key->conf.keylen); if (ieee80211_wep_decrypt_data(local->wep_rx_tfm, rc4key, klen, skb->data + hdrlen + WEP_IV_LEN, len)) ret = -1; /* Trim ICV */ skb_trim(skb, skb->len - WEP_ICV_LEN); /* Remove IV */ memmove(skb->data + WEP_IV_LEN, skb->data, hdrlen); skb_pull(skb, WEP_IV_LEN); return ret; } static bool ieee80211_wep_is_weak_iv(struct sk_buff *skb, struct ieee80211_key *key) { struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; unsigned int hdrlen; u8 *ivpos; u32 iv; hdrlen = ieee80211_hdrlen(hdr->frame_control); ivpos = skb->data + hdrlen; iv = (ivpos[0] << 16) | (ivpos[1] << 8) | ivpos[2]; return ieee80211_wep_weak_iv(iv, key->conf.keylen); } ieee80211_rx_result ieee80211_crypto_wep_decrypt(struct ieee80211_rx_data *rx) { struct sk_buff *skb = rx->skb; struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb); struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; __le16 fc = hdr->frame_control; if (!ieee80211_is_data(fc) && !ieee80211_is_auth(fc)) return RX_CONTINUE; if (!(status->flag & RX_FLAG_DECRYPTED)) { if (skb_linearize(rx->skb)) return RX_DROP_UNUSABLE; if (rx->sta && ieee80211_wep_is_weak_iv(rx->skb, rx->key)) rx->sta->wep_weak_iv_count++; if (ieee80211_wep_decrypt(rx->local, rx->skb, rx->key)) return RX_DROP_UNUSABLE; } else if (!(status->flag & RX_FLAG_IV_STRIPPED)) { if (!pskb_may_pull(rx->skb, ieee80211_hdrlen(fc) + WEP_IV_LEN)) return RX_DROP_UNUSABLE; if (rx->sta && ieee80211_wep_is_weak_iv(rx->skb, rx->key)) rx->sta->wep_weak_iv_count++; ieee80211_wep_remove_iv(rx->local, rx->skb, rx->key); /* remove ICV */ if (pskb_trim(rx->skb, rx->skb->len - WEP_ICV_LEN)) return RX_DROP_UNUSABLE; } return RX_CONTINUE; } static int wep_encrypt_skb(struct ieee80211_tx_data *tx, struct sk_buff *skb) { struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); if (!info->control.hw_key) { if (ieee80211_wep_encrypt(tx->local, skb, tx->key->conf.key, tx->key->conf.keylen, tx->key->conf.keyidx)) return -1; } else if (info->control.hw_key->flags & IEEE80211_KEY_FLAG_GENERATE_IV) { if (!ieee80211_wep_add_iv(tx->local, skb, tx->key->conf.keylen, tx->key->conf.keyidx)) return -1; } return 0; } ieee80211_tx_result ieee80211_crypto_wep_encrypt(struct ieee80211_tx_data *tx) { struct sk_buff *skb; ieee80211_tx_set_protected(tx); skb_queue_walk(&tx->skbs, skb) { if (wep_encrypt_skb(tx, skb) < 0) { I802_DEBUG_INC(tx->local->tx_handlers_drop_wep); return TX_DROP; } } return TX_CONTINUE; }
gpl-2.0
cphelps76/DEMENTEDElite_kernel_jf
drivers/platform/x86/fujitsu-laptop.c
7830
33001
/*-*-linux-c-*-*/ /* Copyright (C) 2007,2008 Jonathan Woithe <jwoithe@physics.adelaide.edu.au> Copyright (C) 2008 Peter Gruber <nokos@gmx.net> Copyright (C) 2008 Tony Vroon <tony@linx.net> Based on earlier work: Copyright (C) 2003 Shane Spencer <shane@bogomip.com> Adrian Yee <brewt-fujitsu@brewt.org> Templated from msi-laptop.c and thinkpad_acpi.c which is copyright by its respective authors. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ /* * fujitsu-laptop.c - Fujitsu laptop support, providing access to additional * features made available on a range of Fujitsu laptops including the * P2xxx/P5xxx/S6xxx/S7xxx series. * * This driver exports a few files in /sys/devices/platform/fujitsu-laptop/; * others may be added at a later date. * * lcd_level - Screen brightness: contains a single integer in the * range 0..7. (rw) * * In addition to these platform device attributes the driver * registers itself in the Linux backlight control subsystem and is * available to userspace under /sys/class/backlight/fujitsu-laptop/. * * Hotkeys present on certain Fujitsu laptops (eg: the S6xxx series) are * also supported by this driver. * * This driver has been tested on a Fujitsu Lifebook S6410, S7020 and * P8010. It should work on most P-series and S-series Lifebooks, but * YMMV. * * The module parameter use_alt_lcd_levels switches between different ACPI * brightness controls which are used by different Fujitsu laptops. In most * cases the correct method is automatically detected. "use_alt_lcd_levels=1" * is applicable for a Fujitsu Lifebook S6410 if autodetection fails. * */ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> #include <linux/acpi.h> #include <linux/dmi.h> #include <linux/backlight.h> #include <linux/input.h> #include <linux/kfifo.h> #include <linux/video_output.h> #include <linux/platform_device.h> #include <linux/slab.h> #if defined(CONFIG_LEDS_CLASS) || defined(CONFIG_LEDS_CLASS_MODULE) #include <linux/leds.h> #endif #define FUJITSU_DRIVER_VERSION "0.6.0" #define FUJITSU_LCD_N_LEVELS 8 #define ACPI_FUJITSU_CLASS "fujitsu" #define ACPI_FUJITSU_HID "FUJ02B1" #define ACPI_FUJITSU_DRIVER_NAME "Fujitsu laptop FUJ02B1 ACPI brightness driver" #define ACPI_FUJITSU_DEVICE_NAME "Fujitsu FUJ02B1" #define ACPI_FUJITSU_HOTKEY_HID "FUJ02E3" #define ACPI_FUJITSU_HOTKEY_DRIVER_NAME "Fujitsu laptop FUJ02E3 ACPI hotkeys driver" #define ACPI_FUJITSU_HOTKEY_DEVICE_NAME "Fujitsu FUJ02E3" #define ACPI_FUJITSU_NOTIFY_CODE1 0x80 #define ACPI_VIDEO_NOTIFY_INC_BRIGHTNESS 0x86 #define ACPI_VIDEO_NOTIFY_DEC_BRIGHTNESS 0x87 /* FUNC interface - command values */ #define FUNC_RFKILL 0x1000 #define FUNC_LEDS 0x1001 #define FUNC_BUTTONS 0x1002 #define FUNC_BACKLIGHT 0x1004 /* FUNC interface - responses */ #define UNSUPPORTED_CMD 0x80000000 #if defined(CONFIG_LEDS_CLASS) || defined(CONFIG_LEDS_CLASS_MODULE) /* FUNC interface - LED control */ #define FUNC_LED_OFF 0x1 #define FUNC_LED_ON 0x30001 #define KEYBOARD_LAMPS 0x100 #define LOGOLAMP_POWERON 0x2000 #define LOGOLAMP_ALWAYS 0x4000 #endif /* Hotkey details */ #define KEY1_CODE 0x410 /* codes for the keys in the GIRB register */ #define KEY2_CODE 0x411 #define KEY3_CODE 0x412 #define KEY4_CODE 0x413 #define MAX_HOTKEY_RINGBUFFER_SIZE 100 #define RINGBUFFERSIZE 40 /* Debugging */ #define FUJLAPTOP_LOG ACPI_FUJITSU_HID ": " #define FUJLAPTOP_ERR KERN_ERR FUJLAPTOP_LOG #define FUJLAPTOP_NOTICE KERN_NOTICE FUJLAPTOP_LOG #define FUJLAPTOP_INFO KERN_INFO FUJLAPTOP_LOG #define FUJLAPTOP_DEBUG KERN_DEBUG FUJLAPTOP_LOG #define FUJLAPTOP_DBG_ALL 0xffff #define FUJLAPTOP_DBG_ERROR 0x0001 #define FUJLAPTOP_DBG_WARN 0x0002 #define FUJLAPTOP_DBG_INFO 0x0004 #define FUJLAPTOP_DBG_TRACE 0x0008 #define dbg_printk(a_dbg_level, format, arg...) \ do { if (dbg_level & a_dbg_level) \ printk(FUJLAPTOP_DEBUG "%s: " format, __func__ , ## arg); \ } while (0) #ifdef CONFIG_FUJITSU_LAPTOP_DEBUG #define vdbg_printk(a_dbg_level, format, arg...) \ dbg_printk(a_dbg_level, format, ## arg) #else #define vdbg_printk(a_dbg_level, format, arg...) #endif /* Device controlling the backlight and associated keys */ struct fujitsu_t { acpi_handle acpi_handle; struct acpi_device *dev; struct input_dev *input; char phys[32]; struct backlight_device *bl_device; struct platform_device *pf_device; int keycode1, keycode2, keycode3, keycode4; unsigned int max_brightness; unsigned int brightness_changed; unsigned int brightness_level; }; static struct fujitsu_t *fujitsu; static int use_alt_lcd_levels = -1; static int disable_brightness_adjust = -1; /* Device used to access other hotkeys on the laptop */ struct fujitsu_hotkey_t { acpi_handle acpi_handle; struct acpi_device *dev; struct input_dev *input; char phys[32]; struct platform_device *pf_device; struct kfifo fifo; spinlock_t fifo_lock; int rfkill_supported; int rfkill_state; int logolamp_registered; int kblamps_registered; }; static struct fujitsu_hotkey_t *fujitsu_hotkey; static void acpi_fujitsu_hotkey_notify(struct acpi_device *device, u32 event); #if defined(CONFIG_LEDS_CLASS) || defined(CONFIG_LEDS_CLASS_MODULE) static enum led_brightness logolamp_get(struct led_classdev *cdev); static void logolamp_set(struct led_classdev *cdev, enum led_brightness brightness); static struct led_classdev logolamp_led = { .name = "fujitsu::logolamp", .brightness_get = logolamp_get, .brightness_set = logolamp_set }; static enum led_brightness kblamps_get(struct led_classdev *cdev); static void kblamps_set(struct led_classdev *cdev, enum led_brightness brightness); static struct led_classdev kblamps_led = { .name = "fujitsu::kblamps", .brightness_get = kblamps_get, .brightness_set = kblamps_set }; #endif #ifdef CONFIG_FUJITSU_LAPTOP_DEBUG static u32 dbg_level = 0x03; #endif static void acpi_fujitsu_notify(struct acpi_device *device, u32 event); /* Fujitsu ACPI interface function */ static int call_fext_func(int cmd, int arg0, int arg1, int arg2) { acpi_status status = AE_OK; union acpi_object params[4] = { { .type = ACPI_TYPE_INTEGER }, { .type = ACPI_TYPE_INTEGER }, { .type = ACPI_TYPE_INTEGER }, { .type = ACPI_TYPE_INTEGER } }; struct acpi_object_list arg_list = { 4, &params[0] }; struct acpi_buffer output; union acpi_object out_obj; acpi_handle handle = NULL; status = acpi_get_handle(fujitsu_hotkey->acpi_handle, "FUNC", &handle); if (ACPI_FAILURE(status)) { vdbg_printk(FUJLAPTOP_DBG_ERROR, "FUNC interface is not present\n"); return -ENODEV; } params[0].integer.value = cmd; params[1].integer.value = arg0; params[2].integer.value = arg1; params[3].integer.value = arg2; output.length = sizeof(out_obj); output.pointer = &out_obj; status = acpi_evaluate_object(handle, NULL, &arg_list, &output); if (ACPI_FAILURE(status)) { vdbg_printk(FUJLAPTOP_DBG_WARN, "FUNC 0x%x (args 0x%x, 0x%x, 0x%x) call failed\n", cmd, arg0, arg1, arg2); return -ENODEV; } if (out_obj.type != ACPI_TYPE_INTEGER) { vdbg_printk(FUJLAPTOP_DBG_WARN, "FUNC 0x%x (args 0x%x, 0x%x, 0x%x) did not " "return an integer\n", cmd, arg0, arg1, arg2); return -ENODEV; } vdbg_printk(FUJLAPTOP_DBG_TRACE, "FUNC 0x%x (args 0x%x, 0x%x, 0x%x) returned 0x%x\n", cmd, arg0, arg1, arg2, (int)out_obj.integer.value); return out_obj.integer.value; } #if defined(CONFIG_LEDS_CLASS) || defined(CONFIG_LEDS_CLASS_MODULE) /* LED class callbacks */ static void logolamp_set(struct led_classdev *cdev, enum led_brightness brightness) { if (brightness >= LED_FULL) { call_fext_func(FUNC_LEDS, 0x1, LOGOLAMP_POWERON, FUNC_LED_ON); call_fext_func(FUNC_LEDS, 0x1, LOGOLAMP_ALWAYS, FUNC_LED_ON); } else if (brightness >= LED_HALF) { call_fext_func(FUNC_LEDS, 0x1, LOGOLAMP_POWERON, FUNC_LED_ON); call_fext_func(FUNC_LEDS, 0x1, LOGOLAMP_ALWAYS, FUNC_LED_OFF); } else { call_fext_func(FUNC_LEDS, 0x1, LOGOLAMP_POWERON, FUNC_LED_OFF); } } static void kblamps_set(struct led_classdev *cdev, enum led_brightness brightness) { if (brightness >= LED_FULL) call_fext_func(FUNC_LEDS, 0x1, KEYBOARD_LAMPS, FUNC_LED_ON); else call_fext_func(FUNC_LEDS, 0x1, KEYBOARD_LAMPS, FUNC_LED_OFF); } static enum led_brightness logolamp_get(struct led_classdev *cdev) { enum led_brightness brightness = LED_OFF; int poweron, always; poweron = call_fext_func(FUNC_LEDS, 0x2, LOGOLAMP_POWERON, 0x0); if (poweron == FUNC_LED_ON) { brightness = LED_HALF; always = call_fext_func(FUNC_LEDS, 0x2, LOGOLAMP_ALWAYS, 0x0); if (always == FUNC_LED_ON) brightness = LED_FULL; } return brightness; } static enum led_brightness kblamps_get(struct led_classdev *cdev) { enum led_brightness brightness = LED_OFF; if (call_fext_func(FUNC_LEDS, 0x2, KEYBOARD_LAMPS, 0x0) == FUNC_LED_ON) brightness = LED_FULL; return brightness; } #endif /* Hardware access for LCD brightness control */ static int set_lcd_level(int level) { acpi_status status = AE_OK; union acpi_object arg0 = { ACPI_TYPE_INTEGER }; struct acpi_object_list arg_list = { 1, &arg0 }; acpi_handle handle = NULL; vdbg_printk(FUJLAPTOP_DBG_TRACE, "set lcd level via SBLL [%d]\n", level); if (level < 0 || level >= fujitsu->max_brightness) return -EINVAL; status = acpi_get_handle(fujitsu->acpi_handle, "SBLL", &handle); if (ACPI_FAILURE(status)) { vdbg_printk(FUJLAPTOP_DBG_ERROR, "SBLL not present\n"); return -ENODEV; } arg0.integer.value = level; status = acpi_evaluate_object(handle, NULL, &arg_list, NULL); if (ACPI_FAILURE(status)) return -ENODEV; return 0; } static int set_lcd_level_alt(int level) { acpi_status status = AE_OK; union acpi_object arg0 = { ACPI_TYPE_INTEGER }; struct acpi_object_list arg_list = { 1, &arg0 }; acpi_handle handle = NULL; vdbg_printk(FUJLAPTOP_DBG_TRACE, "set lcd level via SBL2 [%d]\n", level); if (level < 0 || level >= fujitsu->max_brightness) return -EINVAL; status = acpi_get_handle(fujitsu->acpi_handle, "SBL2", &handle); if (ACPI_FAILURE(status)) { vdbg_printk(FUJLAPTOP_DBG_ERROR, "SBL2 not present\n"); return -ENODEV; } arg0.integer.value = level; status = acpi_evaluate_object(handle, NULL, &arg_list, NULL); if (ACPI_FAILURE(status)) return -ENODEV; return 0; } static int get_lcd_level(void) { unsigned long long state = 0; acpi_status status = AE_OK; vdbg_printk(FUJLAPTOP_DBG_TRACE, "get lcd level via GBLL\n"); status = acpi_evaluate_integer(fujitsu->acpi_handle, "GBLL", NULL, &state); if (ACPI_FAILURE(status)) return 0; fujitsu->brightness_level = state & 0x0fffffff; if (state & 0x80000000) fujitsu->brightness_changed = 1; else fujitsu->brightness_changed = 0; return fujitsu->brightness_level; } static int get_max_brightness(void) { unsigned long long state = 0; acpi_status status = AE_OK; vdbg_printk(FUJLAPTOP_DBG_TRACE, "get max lcd level via RBLL\n"); status = acpi_evaluate_integer(fujitsu->acpi_handle, "RBLL", NULL, &state); if (ACPI_FAILURE(status)) return -1; fujitsu->max_brightness = state; return fujitsu->max_brightness; } /* Backlight device stuff */ static int bl_get_brightness(struct backlight_device *b) { return get_lcd_level(); } static int bl_update_status(struct backlight_device *b) { int ret; if (b->props.power == 4) ret = call_fext_func(FUNC_BACKLIGHT, 0x1, 0x4, 0x3); else ret = call_fext_func(FUNC_BACKLIGHT, 0x1, 0x4, 0x0); if (ret != 0) vdbg_printk(FUJLAPTOP_DBG_ERROR, "Unable to adjust backlight power, error code %i\n", ret); if (use_alt_lcd_levels) ret = set_lcd_level_alt(b->props.brightness); else ret = set_lcd_level(b->props.brightness); if (ret != 0) vdbg_printk(FUJLAPTOP_DBG_ERROR, "Unable to adjust LCD brightness, error code %i\n", ret); return ret; } static const struct backlight_ops fujitsubl_ops = { .get_brightness = bl_get_brightness, .update_status = bl_update_status, }; /* Platform LCD brightness device */ static ssize_t show_max_brightness(struct device *dev, struct device_attribute *attr, char *buf) { int ret; ret = get_max_brightness(); if (ret < 0) return ret; return sprintf(buf, "%i\n", ret); } static ssize_t show_brightness_changed(struct device *dev, struct device_attribute *attr, char *buf) { int ret; ret = fujitsu->brightness_changed; if (ret < 0) return ret; return sprintf(buf, "%i\n", ret); } static ssize_t show_lcd_level(struct device *dev, struct device_attribute *attr, char *buf) { int ret; ret = get_lcd_level(); if (ret < 0) return ret; return sprintf(buf, "%i\n", ret); } static ssize_t store_lcd_level(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { int level, ret; if (sscanf(buf, "%i", &level) != 1 || (level < 0 || level >= fujitsu->max_brightness)) return -EINVAL; if (use_alt_lcd_levels) ret = set_lcd_level_alt(level); else ret = set_lcd_level(level); if (ret < 0) return ret; ret = get_lcd_level(); if (ret < 0) return ret; return count; } static ssize_t ignore_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { return count; } static ssize_t show_lid_state(struct device *dev, struct device_attribute *attr, char *buf) { if (!(fujitsu_hotkey->rfkill_supported & 0x100)) return sprintf(buf, "unknown\n"); if (fujitsu_hotkey->rfkill_state & 0x100) return sprintf(buf, "open\n"); else return sprintf(buf, "closed\n"); } static ssize_t show_dock_state(struct device *dev, struct device_attribute *attr, char *buf) { if (!(fujitsu_hotkey->rfkill_supported & 0x200)) return sprintf(buf, "unknown\n"); if (fujitsu_hotkey->rfkill_state & 0x200) return sprintf(buf, "docked\n"); else return sprintf(buf, "undocked\n"); } static ssize_t show_radios_state(struct device *dev, struct device_attribute *attr, char *buf) { if (!(fujitsu_hotkey->rfkill_supported & 0x20)) return sprintf(buf, "unknown\n"); if (fujitsu_hotkey->rfkill_state & 0x20) return sprintf(buf, "on\n"); else return sprintf(buf, "killed\n"); } static DEVICE_ATTR(max_brightness, 0444, show_max_brightness, ignore_store); static DEVICE_ATTR(brightness_changed, 0444, show_brightness_changed, ignore_store); static DEVICE_ATTR(lcd_level, 0644, show_lcd_level, store_lcd_level); static DEVICE_ATTR(lid, 0444, show_lid_state, ignore_store); static DEVICE_ATTR(dock, 0444, show_dock_state, ignore_store); static DEVICE_ATTR(radios, 0444, show_radios_state, ignore_store); static struct attribute *fujitsupf_attributes[] = { &dev_attr_brightness_changed.attr, &dev_attr_max_brightness.attr, &dev_attr_lcd_level.attr, &dev_attr_lid.attr, &dev_attr_dock.attr, &dev_attr_radios.attr, NULL }; static struct attribute_group fujitsupf_attribute_group = { .attrs = fujitsupf_attributes }; static struct platform_driver fujitsupf_driver = { .driver = { .name = "fujitsu-laptop", .owner = THIS_MODULE, } }; static void dmi_check_cb_common(const struct dmi_system_id *id) { acpi_handle handle; pr_info("Identified laptop model '%s'\n", id->ident); if (use_alt_lcd_levels == -1) { if (ACPI_SUCCESS(acpi_get_handle(NULL, "\\_SB.PCI0.LPCB.FJEX.SBL2", &handle))) use_alt_lcd_levels = 1; else use_alt_lcd_levels = 0; vdbg_printk(FUJLAPTOP_DBG_TRACE, "auto-detected usealt as " "%i\n", use_alt_lcd_levels); } } static int dmi_check_cb_s6410(const struct dmi_system_id *id) { dmi_check_cb_common(id); fujitsu->keycode1 = KEY_SCREENLOCK; /* "Lock" */ fujitsu->keycode2 = KEY_HELP; /* "Mobility Center" */ return 1; } static int dmi_check_cb_s6420(const struct dmi_system_id *id) { dmi_check_cb_common(id); fujitsu->keycode1 = KEY_SCREENLOCK; /* "Lock" */ fujitsu->keycode2 = KEY_HELP; /* "Mobility Center" */ return 1; } static int dmi_check_cb_p8010(const struct dmi_system_id *id) { dmi_check_cb_common(id); fujitsu->keycode1 = KEY_HELP; /* "Support" */ fujitsu->keycode3 = KEY_SWITCHVIDEOMODE; /* "Presentation" */ fujitsu->keycode4 = KEY_WWW; /* "Internet" */ return 1; } static struct dmi_system_id fujitsu_dmi_table[] = { { .ident = "Fujitsu Siemens S6410", .matches = { DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"), DMI_MATCH(DMI_PRODUCT_NAME, "LIFEBOOK S6410"), }, .callback = dmi_check_cb_s6410}, { .ident = "Fujitsu Siemens S6420", .matches = { DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"), DMI_MATCH(DMI_PRODUCT_NAME, "LIFEBOOK S6420"), }, .callback = dmi_check_cb_s6420}, { .ident = "Fujitsu LifeBook P8010", .matches = { DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"), DMI_MATCH(DMI_PRODUCT_NAME, "LifeBook P8010"), }, .callback = dmi_check_cb_p8010}, {} }; /* ACPI device for LCD brightness control */ static int acpi_fujitsu_add(struct acpi_device *device) { acpi_handle handle; int result = 0; int state = 0; struct input_dev *input; int error; if (!device) return -EINVAL; fujitsu->acpi_handle = device->handle; sprintf(acpi_device_name(device), "%s", ACPI_FUJITSU_DEVICE_NAME); sprintf(acpi_device_class(device), "%s", ACPI_FUJITSU_CLASS); device->driver_data = fujitsu; fujitsu->input = input = input_allocate_device(); if (!input) { error = -ENOMEM; goto err_stop; } snprintf(fujitsu->phys, sizeof(fujitsu->phys), "%s/video/input0", acpi_device_hid(device)); input->name = acpi_device_name(device); input->phys = fujitsu->phys; input->id.bustype = BUS_HOST; input->id.product = 0x06; input->dev.parent = &device->dev; input->evbit[0] = BIT(EV_KEY); set_bit(KEY_BRIGHTNESSUP, input->keybit); set_bit(KEY_BRIGHTNESSDOWN, input->keybit); set_bit(KEY_UNKNOWN, input->keybit); error = input_register_device(input); if (error) goto err_free_input_dev; result = acpi_bus_update_power(fujitsu->acpi_handle, &state); if (result) { pr_err("Error reading power state\n"); goto err_unregister_input_dev; } pr_info("ACPI: %s [%s] (%s)\n", acpi_device_name(device), acpi_device_bid(device), !device->power.state ? "on" : "off"); fujitsu->dev = device; if (ACPI_SUCCESS (acpi_get_handle(device->handle, METHOD_NAME__INI, &handle))) { vdbg_printk(FUJLAPTOP_DBG_INFO, "Invoking _INI\n"); if (ACPI_FAILURE (acpi_evaluate_object (device->handle, METHOD_NAME__INI, NULL, NULL))) pr_err("_INI Method failed\n"); } /* do config (detect defaults) */ use_alt_lcd_levels = use_alt_lcd_levels == 1 ? 1 : 0; disable_brightness_adjust = disable_brightness_adjust == 1 ? 1 : 0; vdbg_printk(FUJLAPTOP_DBG_INFO, "config: [alt interface: %d], [adjust disable: %d]\n", use_alt_lcd_levels, disable_brightness_adjust); if (get_max_brightness() <= 0) fujitsu->max_brightness = FUJITSU_LCD_N_LEVELS; get_lcd_level(); return result; err_unregister_input_dev: input_unregister_device(input); input = NULL; err_free_input_dev: input_free_device(input); err_stop: return result; } static int acpi_fujitsu_remove(struct acpi_device *device, int type) { struct fujitsu_t *fujitsu = acpi_driver_data(device); struct input_dev *input = fujitsu->input; input_unregister_device(input); fujitsu->acpi_handle = NULL; return 0; } /* Brightness notify */ static void acpi_fujitsu_notify(struct acpi_device *device, u32 event) { struct input_dev *input; int keycode; int oldb, newb; input = fujitsu->input; switch (event) { case ACPI_FUJITSU_NOTIFY_CODE1: keycode = 0; oldb = fujitsu->brightness_level; get_lcd_level(); newb = fujitsu->brightness_level; vdbg_printk(FUJLAPTOP_DBG_TRACE, "brightness button event [%i -> %i (%i)]\n", oldb, newb, fujitsu->brightness_changed); if (oldb < newb) { if (disable_brightness_adjust != 1) { if (use_alt_lcd_levels) set_lcd_level_alt(newb); else set_lcd_level(newb); } acpi_bus_generate_proc_event(fujitsu->dev, ACPI_VIDEO_NOTIFY_INC_BRIGHTNESS, 0); keycode = KEY_BRIGHTNESSUP; } else if (oldb > newb) { if (disable_brightness_adjust != 1) { if (use_alt_lcd_levels) set_lcd_level_alt(newb); else set_lcd_level(newb); } acpi_bus_generate_proc_event(fujitsu->dev, ACPI_VIDEO_NOTIFY_DEC_BRIGHTNESS, 0); keycode = KEY_BRIGHTNESSDOWN; } break; default: keycode = KEY_UNKNOWN; vdbg_printk(FUJLAPTOP_DBG_WARN, "unsupported event [0x%x]\n", event); break; } if (keycode != 0) { input_report_key(input, keycode, 1); input_sync(input); input_report_key(input, keycode, 0); input_sync(input); } } /* ACPI device for hotkey handling */ static int acpi_fujitsu_hotkey_add(struct acpi_device *device) { acpi_handle handle; int result = 0; int state = 0; struct input_dev *input; int error; int i; if (!device) return -EINVAL; fujitsu_hotkey->acpi_handle = device->handle; sprintf(acpi_device_name(device), "%s", ACPI_FUJITSU_HOTKEY_DEVICE_NAME); sprintf(acpi_device_class(device), "%s", ACPI_FUJITSU_CLASS); device->driver_data = fujitsu_hotkey; /* kfifo */ spin_lock_init(&fujitsu_hotkey->fifo_lock); error = kfifo_alloc(&fujitsu_hotkey->fifo, RINGBUFFERSIZE * sizeof(int), GFP_KERNEL); if (error) { pr_err("kfifo_alloc failed\n"); goto err_stop; } fujitsu_hotkey->input = input = input_allocate_device(); if (!input) { error = -ENOMEM; goto err_free_fifo; } snprintf(fujitsu_hotkey->phys, sizeof(fujitsu_hotkey->phys), "%s/video/input0", acpi_device_hid(device)); input->name = acpi_device_name(device); input->phys = fujitsu_hotkey->phys; input->id.bustype = BUS_HOST; input->id.product = 0x06; input->dev.parent = &device->dev; set_bit(EV_KEY, input->evbit); set_bit(fujitsu->keycode1, input->keybit); set_bit(fujitsu->keycode2, input->keybit); set_bit(fujitsu->keycode3, input->keybit); set_bit(fujitsu->keycode4, input->keybit); set_bit(KEY_UNKNOWN, input->keybit); error = input_register_device(input); if (error) goto err_free_input_dev; result = acpi_bus_update_power(fujitsu_hotkey->acpi_handle, &state); if (result) { pr_err("Error reading power state\n"); goto err_unregister_input_dev; } pr_info("ACPI: %s [%s] (%s)\n", acpi_device_name(device), acpi_device_bid(device), !device->power.state ? "on" : "off"); fujitsu_hotkey->dev = device; if (ACPI_SUCCESS (acpi_get_handle(device->handle, METHOD_NAME__INI, &handle))) { vdbg_printk(FUJLAPTOP_DBG_INFO, "Invoking _INI\n"); if (ACPI_FAILURE (acpi_evaluate_object (device->handle, METHOD_NAME__INI, NULL, NULL))) pr_err("_INI Method failed\n"); } i = 0; while (call_fext_func(FUNC_BUTTONS, 0x1, 0x0, 0x0) != 0 && (i++) < MAX_HOTKEY_RINGBUFFER_SIZE) ; /* No action, result is discarded */ vdbg_printk(FUJLAPTOP_DBG_INFO, "Discarded %i ringbuffer entries\n", i); fujitsu_hotkey->rfkill_supported = call_fext_func(FUNC_RFKILL, 0x0, 0x0, 0x0); /* Make sure our bitmask of supported functions is cleared if the RFKILL function block is not implemented, like on the S7020. */ if (fujitsu_hotkey->rfkill_supported == UNSUPPORTED_CMD) fujitsu_hotkey->rfkill_supported = 0; if (fujitsu_hotkey->rfkill_supported) fujitsu_hotkey->rfkill_state = call_fext_func(FUNC_RFKILL, 0x4, 0x0, 0x0); /* Suspect this is a keymap of the application panel, print it */ pr_info("BTNI: [0x%x]\n", call_fext_func(FUNC_BUTTONS, 0x0, 0x0, 0x0)); #if defined(CONFIG_LEDS_CLASS) || defined(CONFIG_LEDS_CLASS_MODULE) if (call_fext_func(FUNC_LEDS, 0x0, 0x0, 0x0) & LOGOLAMP_POWERON) { result = led_classdev_register(&fujitsu->pf_device->dev, &logolamp_led); if (result == 0) { fujitsu_hotkey->logolamp_registered = 1; } else { pr_err("Could not register LED handler for logo lamp, error %i\n", result); } } if ((call_fext_func(FUNC_LEDS, 0x0, 0x0, 0x0) & KEYBOARD_LAMPS) && (call_fext_func(FUNC_BUTTONS, 0x0, 0x0, 0x0) == 0x0)) { result = led_classdev_register(&fujitsu->pf_device->dev, &kblamps_led); if (result == 0) { fujitsu_hotkey->kblamps_registered = 1; } else { pr_err("Could not register LED handler for keyboard lamps, error %i\n", result); } } #endif return result; err_unregister_input_dev: input_unregister_device(input); input = NULL; err_free_input_dev: input_free_device(input); err_free_fifo: kfifo_free(&fujitsu_hotkey->fifo); err_stop: return result; } static int acpi_fujitsu_hotkey_remove(struct acpi_device *device, int type) { struct fujitsu_hotkey_t *fujitsu_hotkey = acpi_driver_data(device); struct input_dev *input = fujitsu_hotkey->input; #if defined(CONFIG_LEDS_CLASS) || defined(CONFIG_LEDS_CLASS_MODULE) if (fujitsu_hotkey->logolamp_registered) led_classdev_unregister(&logolamp_led); if (fujitsu_hotkey->kblamps_registered) led_classdev_unregister(&kblamps_led); #endif input_unregister_device(input); kfifo_free(&fujitsu_hotkey->fifo); fujitsu_hotkey->acpi_handle = NULL; return 0; } static void acpi_fujitsu_hotkey_notify(struct acpi_device *device, u32 event) { struct input_dev *input; int keycode, keycode_r; unsigned int irb = 1; int i, status; input = fujitsu_hotkey->input; if (fujitsu_hotkey->rfkill_supported) fujitsu_hotkey->rfkill_state = call_fext_func(FUNC_RFKILL, 0x4, 0x0, 0x0); switch (event) { case ACPI_FUJITSU_NOTIFY_CODE1: i = 0; while ((irb = call_fext_func(FUNC_BUTTONS, 0x1, 0x0, 0x0)) != 0 && (i++) < MAX_HOTKEY_RINGBUFFER_SIZE) { switch (irb & 0x4ff) { case KEY1_CODE: keycode = fujitsu->keycode1; break; case KEY2_CODE: keycode = fujitsu->keycode2; break; case KEY3_CODE: keycode = fujitsu->keycode3; break; case KEY4_CODE: keycode = fujitsu->keycode4; break; case 0: keycode = 0; break; default: vdbg_printk(FUJLAPTOP_DBG_WARN, "Unknown GIRB result [%x]\n", irb); keycode = -1; break; } if (keycode > 0) { vdbg_printk(FUJLAPTOP_DBG_TRACE, "Push keycode into ringbuffer [%d]\n", keycode); status = kfifo_in_locked(&fujitsu_hotkey->fifo, (unsigned char *)&keycode, sizeof(keycode), &fujitsu_hotkey->fifo_lock); if (status != sizeof(keycode)) { vdbg_printk(FUJLAPTOP_DBG_WARN, "Could not push keycode [0x%x]\n", keycode); } else { input_report_key(input, keycode, 1); input_sync(input); } } else if (keycode == 0) { while ((status = kfifo_out_locked( &fujitsu_hotkey->fifo, (unsigned char *) &keycode_r, sizeof(keycode_r), &fujitsu_hotkey->fifo_lock)) == sizeof(keycode_r)) { input_report_key(input, keycode_r, 0); input_sync(input); vdbg_printk(FUJLAPTOP_DBG_TRACE, "Pop keycode from ringbuffer [%d]\n", keycode_r); } } } break; default: keycode = KEY_UNKNOWN; vdbg_printk(FUJLAPTOP_DBG_WARN, "Unsupported event [0x%x]\n", event); input_report_key(input, keycode, 1); input_sync(input); input_report_key(input, keycode, 0); input_sync(input); break; } } /* Initialization */ static const struct acpi_device_id fujitsu_device_ids[] = { {ACPI_FUJITSU_HID, 0}, {"", 0}, }; static struct acpi_driver acpi_fujitsu_driver = { .name = ACPI_FUJITSU_DRIVER_NAME, .class = ACPI_FUJITSU_CLASS, .ids = fujitsu_device_ids, .ops = { .add = acpi_fujitsu_add, .remove = acpi_fujitsu_remove, .notify = acpi_fujitsu_notify, }, }; static const struct acpi_device_id fujitsu_hotkey_device_ids[] = { {ACPI_FUJITSU_HOTKEY_HID, 0}, {"", 0}, }; static struct acpi_driver acpi_fujitsu_hotkey_driver = { .name = ACPI_FUJITSU_HOTKEY_DRIVER_NAME, .class = ACPI_FUJITSU_CLASS, .ids = fujitsu_hotkey_device_ids, .ops = { .add = acpi_fujitsu_hotkey_add, .remove = acpi_fujitsu_hotkey_remove, .notify = acpi_fujitsu_hotkey_notify, }, }; static int __init fujitsu_init(void) { int ret, result, max_brightness; if (acpi_disabled) return -ENODEV; fujitsu = kzalloc(sizeof(struct fujitsu_t), GFP_KERNEL); if (!fujitsu) return -ENOMEM; fujitsu->keycode1 = KEY_PROG1; fujitsu->keycode2 = KEY_PROG2; fujitsu->keycode3 = KEY_PROG3; fujitsu->keycode4 = KEY_PROG4; dmi_check_system(fujitsu_dmi_table); result = acpi_bus_register_driver(&acpi_fujitsu_driver); if (result < 0) { ret = -ENODEV; goto fail_acpi; } /* Register platform stuff */ fujitsu->pf_device = platform_device_alloc("fujitsu-laptop", -1); if (!fujitsu->pf_device) { ret = -ENOMEM; goto fail_platform_driver; } ret = platform_device_add(fujitsu->pf_device); if (ret) goto fail_platform_device1; ret = sysfs_create_group(&fujitsu->pf_device->dev.kobj, &fujitsupf_attribute_group); if (ret) goto fail_platform_device2; /* Register backlight stuff */ if (!acpi_video_backlight_support()) { struct backlight_properties props; memset(&props, 0, sizeof(struct backlight_properties)); max_brightness = fujitsu->max_brightness; props.type = BACKLIGHT_PLATFORM; props.max_brightness = max_brightness - 1; fujitsu->bl_device = backlight_device_register("fujitsu-laptop", NULL, NULL, &fujitsubl_ops, &props); if (IS_ERR(fujitsu->bl_device)) { ret = PTR_ERR(fujitsu->bl_device); fujitsu->bl_device = NULL; goto fail_sysfs_group; } fujitsu->bl_device->props.brightness = fujitsu->brightness_level; } ret = platform_driver_register(&fujitsupf_driver); if (ret) goto fail_backlight; /* Register hotkey driver */ fujitsu_hotkey = kzalloc(sizeof(struct fujitsu_hotkey_t), GFP_KERNEL); if (!fujitsu_hotkey) { ret = -ENOMEM; goto fail_hotkey; } result = acpi_bus_register_driver(&acpi_fujitsu_hotkey_driver); if (result < 0) { ret = -ENODEV; goto fail_hotkey1; } /* Sync backlight power status (needs FUJ02E3 device, hence deferred) */ if (!acpi_video_backlight_support()) { if (call_fext_func(FUNC_BACKLIGHT, 0x2, 0x4, 0x0) == 3) fujitsu->bl_device->props.power = 4; else fujitsu->bl_device->props.power = 0; } pr_info("driver " FUJITSU_DRIVER_VERSION " successfully loaded\n"); return 0; fail_hotkey1: kfree(fujitsu_hotkey); fail_hotkey: platform_driver_unregister(&fujitsupf_driver); fail_backlight: if (fujitsu->bl_device) backlight_device_unregister(fujitsu->bl_device); fail_sysfs_group: sysfs_remove_group(&fujitsu->pf_device->dev.kobj, &fujitsupf_attribute_group); fail_platform_device2: platform_device_del(fujitsu->pf_device); fail_platform_device1: platform_device_put(fujitsu->pf_device); fail_platform_driver: acpi_bus_unregister_driver(&acpi_fujitsu_driver); fail_acpi: kfree(fujitsu); return ret; } static void __exit fujitsu_cleanup(void) { acpi_bus_unregister_driver(&acpi_fujitsu_hotkey_driver); kfree(fujitsu_hotkey); platform_driver_unregister(&fujitsupf_driver); if (fujitsu->bl_device) backlight_device_unregister(fujitsu->bl_device); sysfs_remove_group(&fujitsu->pf_device->dev.kobj, &fujitsupf_attribute_group); platform_device_unregister(fujitsu->pf_device); acpi_bus_unregister_driver(&acpi_fujitsu_driver); kfree(fujitsu); pr_info("driver unloaded\n"); } module_init(fujitsu_init); module_exit(fujitsu_cleanup); module_param(use_alt_lcd_levels, uint, 0644); MODULE_PARM_DESC(use_alt_lcd_levels, "Use alternative interface for lcd_levels (needed for Lifebook s6410)."); module_param(disable_brightness_adjust, uint, 0644); MODULE_PARM_DESC(disable_brightness_adjust, "Disable brightness adjustment ."); #ifdef CONFIG_FUJITSU_LAPTOP_DEBUG module_param_named(debug, dbg_level, uint, 0644); MODULE_PARM_DESC(debug, "Sets debug level bit-mask"); #endif MODULE_AUTHOR("Jonathan Woithe, Peter Gruber, Tony Vroon"); MODULE_DESCRIPTION("Fujitsu laptop extras support"); MODULE_VERSION(FUJITSU_DRIVER_VERSION); MODULE_LICENSE("GPL"); MODULE_ALIAS("dmi:*:svnFUJITSUSIEMENS:*:pvr:rvnFUJITSU:rnFJNB1D3:*:cvrS6410:*"); MODULE_ALIAS("dmi:*:svnFUJITSUSIEMENS:*:pvr:rvnFUJITSU:rnFJNB1E6:*:cvrS6420:*"); MODULE_ALIAS("dmi:*:svnFUJITSU:*:pvr:rvnFUJITSU:rnFJNB19C:*:cvrS7020:*"); static struct pnp_device_id pnp_ids[] __used = { {.id = "FUJ02bf"}, {.id = "FUJ02B1"}, {.id = "FUJ02E3"}, {.id = ""} }; MODULE_DEVICE_TABLE(pnp, pnp_ids);
gpl-2.0
rr-zenfone2/android_kernel_asus_moorefield
arch/powerpc/boot/hack-coff.c
14230
2397
/* * hack-coff.c - hack the header of an xcoff file to fill in * a few fields needed by the Open Firmware xcoff loader on * Power Macs but not initialized by objcopy. * * Copyright (C) Paul Mackerras 1997. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version * 2 of the License, or (at your option) any later version. */ #include <stdio.h> #include <stdlib.h> #include <unistd.h> #include <fcntl.h> #include <string.h> #include "rs6000.h" #define AOUT_MAGIC 0x010b #define get_16be(x) ((((unsigned char *)(x))[0] << 8) \ + ((unsigned char *)(x))[1]) #define put_16be(x, v) (((unsigned char *)(x))[0] = (v) >> 8, \ ((unsigned char *)(x))[1] = (v) & 0xff) #define get_32be(x) ((((unsigned char *)(x))[0] << 24) \ + (((unsigned char *)(x))[1] << 16) \ + (((unsigned char *)(x))[2] << 8) \ + ((unsigned char *)(x))[3]) int main(int ac, char **av) { int fd; int i, nsect; int aoutsz; struct external_filehdr fhdr; AOUTHDR aout; struct external_scnhdr shdr; if (ac != 2) { fprintf(stderr, "Usage: hack-coff coff-file\n"); exit(1); } if ((fd = open(av[1], 2)) == -1) { perror(av[2]); exit(1); } if (read(fd, &fhdr, sizeof(fhdr)) != sizeof(fhdr)) goto readerr; i = get_16be(fhdr.f_magic); if (i != U802TOCMAGIC && i != U802WRMAGIC && i != U802ROMAGIC) { fprintf(stderr, "%s: not an xcoff file\n", av[1]); exit(1); } aoutsz = get_16be(fhdr.f_opthdr); if (read(fd, &aout, aoutsz) != aoutsz) goto readerr; nsect = get_16be(fhdr.f_nscns); for (i = 0; i < nsect; ++i) { if (read(fd, &shdr, sizeof(shdr)) != sizeof(shdr)) goto readerr; if (strcmp(shdr.s_name, ".text") == 0) { put_16be(aout.o_snentry, i+1); put_16be(aout.o_sntext, i+1); } else if (strcmp(shdr.s_name, ".data") == 0) { put_16be(aout.o_sndata, i+1); } else if (strcmp(shdr.s_name, ".bss") == 0) { put_16be(aout.o_snbss, i+1); } } put_16be(aout.magic, AOUT_MAGIC); if (lseek(fd, (long) sizeof(struct external_filehdr), 0) == -1 || write(fd, &aout, aoutsz) != aoutsz) { fprintf(stderr, "%s: write error\n", av[1]); exit(1); } close(fd); exit(0); readerr: fprintf(stderr, "%s: read error or file too short\n", av[1]); exit(1); }
gpl-2.0
nobodyAtall/nAa-kernel-ics
arch/x86/boot/compressed/misc.c
151
11235
/* * misc.c * * This is a collection of several routines from gzip-1.0.3 * adapted for Linux. * * malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994 * puts by Nick Holloway 1993, better puts by Martin Mares 1995 * High loaded stuff by Hans Lermen & Werner Almesberger, Feb. 1996 */ /* * we have to be careful, because no indirections are allowed here, and * paravirt_ops is a kind of one. As it will only run in baremetal anyway, * we just keep it from happening */ #undef CONFIG_PARAVIRT #ifdef CONFIG_X86_32 #define _ASM_X86_DESC_H 1 #endif #ifdef CONFIG_X86_64 #define _LINUX_STRING_H_ 1 #define __LINUX_BITMAP_H 1 #endif #include <linux/linkage.h> #include <linux/screen_info.h> #include <linux/elf.h> #include <linux/io.h> #include <asm/page.h> #include <asm/boot.h> #include <asm/bootparam.h> /* WARNING!! * This code is compiled with -fPIC and it is relocated dynamically * at run time, but no relocation processing is performed. * This means that it is not safe to place pointers in static structures. */ /* * Getting to provable safe in place decompression is hard. * Worst case behaviours need to be analyzed. * Background information: * * The file layout is: * magic[2] * method[1] * flags[1] * timestamp[4] * extraflags[1] * os[1] * compressed data blocks[N] * crc[4] orig_len[4] * * resulting in 18 bytes of non compressed data overhead. * * Files divided into blocks * 1 bit (last block flag) * 2 bits (block type) * * 1 block occurs every 32K -1 bytes or when there 50% compression * has been achieved. The smallest block type encoding is always used. * * stored: * 32 bits length in bytes. * * fixed: * magic fixed tree. * symbols. * * dynamic: * dynamic tree encoding. * symbols. * * * The buffer for decompression in place is the length of the * uncompressed data, plus a small amount extra to keep the algorithm safe. * The compressed data is placed at the end of the buffer. The output * pointer is placed at the start of the buffer and the input pointer * is placed where the compressed data starts. Problems will occur * when the output pointer overruns the input pointer. * * The output pointer can only overrun the input pointer if the input * pointer is moving faster than the output pointer. A condition only * triggered by data whose compressed form is larger than the uncompressed * form. * * The worst case at the block level is a growth of the compressed data * of 5 bytes per 32767 bytes. * * The worst case internal to a compressed block is very hard to figure. * The worst case can at least be boundined by having one bit that represents * 32764 bytes and then all of the rest of the bytes representing the very * very last byte. * * All of which is enough to compute an amount of extra data that is required * to be safe. To avoid problems at the block level allocating 5 extra bytes * per 32767 bytes of data is sufficient. To avoind problems internal to a * block adding an extra 32767 bytes (the worst case uncompressed block size) * is sufficient, to ensure that in the worst case the decompressed data for * block will stop the byte before the compressed data for a block begins. * To avoid problems with the compressed data's meta information an extra 18 * bytes are needed. Leading to the formula: * * extra_bytes = (uncompressed_size >> 12) + 32768 + 18 + decompressor_size. * * Adding 8 bytes per 32K is a bit excessive but much easier to calculate. * Adding 32768 instead of 32767 just makes for round numbers. * Adding the decompressor_size is necessary as it musht live after all * of the data as well. Last I measured the decompressor is about 14K. * 10K of actual data and 4K of bss. * */ /* * gzip declarations */ #define OF(args) args #define STATIC static #undef memset #undef memcpy #define memzero(s, n) memset((s), 0, (n)) typedef unsigned char uch; typedef unsigned short ush; typedef unsigned long ulg; /* * Window size must be at least 32k, and a power of two. * We don't actually have a window just a huge output buffer, * so we report a 2G window size, as that should always be * larger than our output buffer: */ #define WSIZE 0x80000000 /* Input buffer: */ static unsigned char *inbuf; /* Sliding window buffer (and final output buffer): */ static unsigned char *window; /* Valid bytes in inbuf: */ static unsigned insize; /* Index of next byte to be processed in inbuf: */ static unsigned inptr; /* Bytes in output buffer: */ static unsigned outcnt; /* gzip flag byte */ #define ASCII_FLAG 0x01 /* bit 0 set: file probably ASCII text */ #define CONTINUATION 0x02 /* bit 1 set: continuation of multi-part gz file */ #define EXTRA_FIELD 0x04 /* bit 2 set: extra field present */ #define ORIG_NAM 0x08 /* bit 3 set: original file name present */ #define COMMENT 0x10 /* bit 4 set: file comment present */ #define ENCRYPTED 0x20 /* bit 5 set: file is encrypted */ #define RESERVED 0xC0 /* bit 6, 7: reserved */ #define get_byte() (inptr < insize ? inbuf[inptr++] : fill_inbuf()) /* Diagnostic functions */ #ifdef DEBUG # define Assert(cond, msg) do { if (!(cond)) error(msg); } while (0) # define Trace(x) do { fprintf x; } while (0) # define Tracev(x) do { if (verbose) fprintf x ; } while (0) # define Tracevv(x) do { if (verbose > 1) fprintf x ; } while (0) # define Tracec(c, x) do { if (verbose && (c)) fprintf x ; } while (0) # define Tracecv(c, x) do { if (verbose > 1 && (c)) fprintf x ; } while (0) #else # define Assert(cond, msg) # define Trace(x) # define Tracev(x) # define Tracevv(x) # define Tracec(c, x) # define Tracecv(c, x) #endif static int fill_inbuf(void); static void flush_window(void); static void error(char *m); /* * This is set up by the setup-routine at boot-time */ static struct boot_params *real_mode; /* Pointer to real-mode data */ static int quiet; extern unsigned char input_data[]; extern int input_len; static long bytes_out; static void *memset(void *s, int c, unsigned n); static void *memcpy(void *dest, const void *src, unsigned n); static void __putstr(int, const char *); #define putstr(__x) __putstr(0, __x) #ifdef CONFIG_X86_64 #define memptr long #else #define memptr unsigned #endif static memptr free_mem_ptr; static memptr free_mem_end_ptr; static char *vidmem; static int vidport; static int lines, cols; #include "../../../../lib/inflate.c" static void scroll(void) { int i; memcpy(vidmem, vidmem + cols * 2, (lines - 1) * cols * 2); for (i = (lines - 1) * cols * 2; i < lines * cols * 2; i += 2) vidmem[i] = ' '; } static void __putstr(int error, const char *s) { int x, y, pos; char c; #ifndef CONFIG_X86_VERBOSE_BOOTUP if (!error) return; #endif #ifdef CONFIG_X86_32 if (real_mode->screen_info.orig_video_mode == 0 && lines == 0 && cols == 0) return; #endif x = real_mode->screen_info.orig_x; y = real_mode->screen_info.orig_y; while ((c = *s++) != '\0') { if (c == '\n') { x = 0; if (++y >= lines) { scroll(); y--; } } else { vidmem[(x + cols * y) * 2] = c; if (++x >= cols) { x = 0; if (++y >= lines) { scroll(); y--; } } } } real_mode->screen_info.orig_x = x; real_mode->screen_info.orig_y = y; pos = (x + cols * y) * 2; /* Update cursor position */ outb(14, vidport); outb(0xff & (pos >> 9), vidport+1); outb(15, vidport); outb(0xff & (pos >> 1), vidport+1); } static void *memset(void *s, int c, unsigned n) { int i; char *ss = s; for (i = 0; i < n; i++) ss[i] = c; return s; } static void *memcpy(void *dest, const void *src, unsigned n) { int i; const char *s = src; char *d = dest; for (i = 0; i < n; i++) d[i] = s[i]; return dest; } /* =========================================================================== * Fill the input buffer. This is called only when the buffer is empty * and at least one byte is really needed. */ static int fill_inbuf(void) { error("ran out of input data"); return 0; } /* =========================================================================== * Write the output window window[0..outcnt-1] and update crc and bytes_out. * (Used for the decompressed data only.) */ static void flush_window(void) { /* With my window equal to my output buffer * I only need to compute the crc here. */ unsigned long c = crc; /* temporary variable */ unsigned n; unsigned char *in, ch; in = window; for (n = 0; n < outcnt; n++) { ch = *in++; c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8); } crc = c; bytes_out += (unsigned long)outcnt; outcnt = 0; } static void error(char *x) { __putstr(1, "\n\n"); __putstr(1, x); __putstr(1, "\n\n -- System halted"); while (1) asm("hlt"); } static void parse_elf(void *output) { #ifdef CONFIG_X86_64 Elf64_Ehdr ehdr; Elf64_Phdr *phdrs, *phdr; #else Elf32_Ehdr ehdr; Elf32_Phdr *phdrs, *phdr; #endif void *dest; int i; memcpy(&ehdr, output, sizeof(ehdr)); if (ehdr.e_ident[EI_MAG0] != ELFMAG0 || ehdr.e_ident[EI_MAG1] != ELFMAG1 || ehdr.e_ident[EI_MAG2] != ELFMAG2 || ehdr.e_ident[EI_MAG3] != ELFMAG3) { error("Kernel is not a valid ELF file"); return; } if (!quiet) putstr("Parsing ELF... "); phdrs = malloc(sizeof(*phdrs) * ehdr.e_phnum); if (!phdrs) error("Failed to allocate space for phdrs"); memcpy(phdrs, output + ehdr.e_phoff, sizeof(*phdrs) * ehdr.e_phnum); for (i = 0; i < ehdr.e_phnum; i++) { phdr = &phdrs[i]; switch (phdr->p_type) { case PT_LOAD: #ifdef CONFIG_RELOCATABLE dest = output; dest += (phdr->p_paddr - LOAD_PHYSICAL_ADDR); #else dest = (void *)(phdr->p_paddr); #endif memcpy(dest, output + phdr->p_offset, phdr->p_filesz); break; default: /* Ignore other PT_* */ break; } } } asmlinkage void decompress_kernel(void *rmode, memptr heap, unsigned char *input_data, unsigned long input_len, unsigned char *output) { real_mode = rmode; if (real_mode->hdr.loadflags & QUIET_FLAG) quiet = 1; if (real_mode->screen_info.orig_video_mode == 7) { vidmem = (char *) 0xb0000; vidport = 0x3b4; } else { vidmem = (char *) 0xb8000; vidport = 0x3d4; } lines = real_mode->screen_info.orig_video_lines; cols = real_mode->screen_info.orig_video_cols; window = output; /* Output buffer (Normally at 1M) */ free_mem_ptr = heap; /* Heap */ free_mem_end_ptr = heap + BOOT_HEAP_SIZE; inbuf = input_data; /* Input buffer */ insize = input_len; inptr = 0; #ifdef CONFIG_X86_64 if ((unsigned long)output & (__KERNEL_ALIGN - 1)) error("Destination address not 2M aligned"); if ((unsigned long)output >= 0xffffffffffUL) error("Destination address too large"); #else if ((u32)output & (CONFIG_PHYSICAL_ALIGN - 1)) error("Destination address not CONFIG_PHYSICAL_ALIGN aligned"); if (heap > ((-__PAGE_OFFSET-(512<<20)-1) & 0x7fffffff)) error("Destination address too large"); #ifndef CONFIG_RELOCATABLE if ((u32)output != LOAD_PHYSICAL_ADDR) error("Wrong destination address"); #endif #endif makecrc(); if (!quiet) putstr("\nDecompressing Linux... "); gunzip(); parse_elf(output); if (!quiet) putstr("done.\nBooting the kernel.\n"); return; }
gpl-2.0
Koshu/thinkpad_tablet_jb_kernel
fs/jffs2/dir.c
151
23487
/* * JFFS2 -- Journalling Flash File System, Version 2. * * Copyright © 2001-2007 Red Hat, Inc. * Copyright © 2004-2010 David Woodhouse <dwmw2@infradead.org> * * Created by David Woodhouse <dwmw2@infradead.org> * * For licensing information, see the file 'LICENCE' in this directory. * */ #include <linux/kernel.h> #include <linux/slab.h> #include <linux/fs.h> #include <linux/crc32.h> #include <linux/jffs2.h> #include "jffs2_fs_i.h" #include "jffs2_fs_sb.h" #include <linux/time.h> #include "nodelist.h" static int jffs2_readdir (struct file *, void *, filldir_t); static int jffs2_create (struct inode *,struct dentry *,int, struct nameidata *); static struct dentry *jffs2_lookup (struct inode *,struct dentry *, struct nameidata *); static int jffs2_link (struct dentry *,struct inode *,struct dentry *); static int jffs2_unlink (struct inode *,struct dentry *); static int jffs2_symlink (struct inode *,struct dentry *,const char *); static int jffs2_mkdir (struct inode *,struct dentry *,int); static int jffs2_rmdir (struct inode *,struct dentry *); static int jffs2_mknod (struct inode *,struct dentry *,int,dev_t); static int jffs2_rename (struct inode *, struct dentry *, struct inode *, struct dentry *); const struct file_operations jffs2_dir_operations = { .read = generic_read_dir, .readdir = jffs2_readdir, .unlocked_ioctl=jffs2_ioctl, .fsync = jffs2_fsync, .llseek = generic_file_llseek, }; const struct inode_operations jffs2_dir_inode_operations = { .create = jffs2_create, .lookup = jffs2_lookup, .link = jffs2_link, .unlink = jffs2_unlink, .symlink = jffs2_symlink, .mkdir = jffs2_mkdir, .rmdir = jffs2_rmdir, .mknod = jffs2_mknod, .rename = jffs2_rename, .check_acl = jffs2_check_acl, .setattr = jffs2_setattr, .setxattr = jffs2_setxattr, .getxattr = jffs2_getxattr, .listxattr = jffs2_listxattr, .removexattr = jffs2_removexattr }; /***********************************************************************/ /* We keep the dirent list sorted in increasing order of name hash, and we use the same hash function as the dentries. Makes this nice and simple */ static struct dentry *jffs2_lookup(struct inode *dir_i, struct dentry *target, struct nameidata *nd) { struct jffs2_inode_info *dir_f; struct jffs2_sb_info *c; struct jffs2_full_dirent *fd = NULL, *fd_list; uint32_t ino = 0; struct inode *inode = NULL; D1(printk(KERN_DEBUG "jffs2_lookup()\n")); if (target->d_name.len > JFFS2_MAX_NAME_LEN) return ERR_PTR(-ENAMETOOLONG); dir_f = JFFS2_INODE_INFO(dir_i); c = JFFS2_SB_INFO(dir_i->i_sb); mutex_lock(&dir_f->sem); /* NB: The 2.2 backport will need to explicitly check for '.' and '..' here */ for (fd_list = dir_f->dents; fd_list && fd_list->nhash <= target->d_name.hash; fd_list = fd_list->next) { if (fd_list->nhash == target->d_name.hash && (!fd || fd_list->version > fd->version) && strlen(fd_list->name) == target->d_name.len && !strncmp(fd_list->name, target->d_name.name, target->d_name.len)) { fd = fd_list; } } if (fd) ino = fd->ino; mutex_unlock(&dir_f->sem); if (ino) { inode = jffs2_iget(dir_i->i_sb, ino); if (IS_ERR(inode)) { printk(KERN_WARNING "iget() failed for ino #%u\n", ino); return ERR_CAST(inode); } } return d_splice_alias(inode, target); } /***********************************************************************/ static int jffs2_readdir(struct file *filp, void *dirent, filldir_t filldir) { struct jffs2_inode_info *f; struct jffs2_sb_info *c; struct inode *inode = filp->f_path.dentry->d_inode; struct jffs2_full_dirent *fd; unsigned long offset, curofs; D1(printk(KERN_DEBUG "jffs2_readdir() for dir_i #%lu\n", filp->f_path.dentry->d_inode->i_ino)); f = JFFS2_INODE_INFO(inode); c = JFFS2_SB_INFO(inode->i_sb); offset = filp->f_pos; if (offset == 0) { D1(printk(KERN_DEBUG "Dirent 0: \".\", ino #%lu\n", inode->i_ino)); if (filldir(dirent, ".", 1, 0, inode->i_ino, DT_DIR) < 0) goto out; offset++; } if (offset == 1) { unsigned long pino = parent_ino(filp->f_path.dentry); D1(printk(KERN_DEBUG "Dirent 1: \"..\", ino #%lu\n", pino)); if (filldir(dirent, "..", 2, 1, pino, DT_DIR) < 0) goto out; offset++; } curofs=1; mutex_lock(&f->sem); for (fd = f->dents; fd; fd = fd->next) { curofs++; /* First loop: curofs = 2; offset = 2 */ if (curofs < offset) { D2(printk(KERN_DEBUG "Skipping dirent: \"%s\", ino #%u, type %d, because curofs %ld < offset %ld\n", fd->name, fd->ino, fd->type, curofs, offset)); continue; } if (!fd->ino) { D2(printk(KERN_DEBUG "Skipping deletion dirent \"%s\"\n", fd->name)); offset++; continue; } D2(printk(KERN_DEBUG "Dirent %ld: \"%s\", ino #%u, type %d\n", offset, fd->name, fd->ino, fd->type)); if (filldir(dirent, fd->name, strlen(fd->name), offset, fd->ino, fd->type) < 0) break; offset++; } mutex_unlock(&f->sem); out: filp->f_pos = offset; return 0; } /***********************************************************************/ static int jffs2_create(struct inode *dir_i, struct dentry *dentry, int mode, struct nameidata *nd) { struct jffs2_raw_inode *ri; struct jffs2_inode_info *f, *dir_f; struct jffs2_sb_info *c; struct inode *inode; int ret; ri = jffs2_alloc_raw_inode(); if (!ri) return -ENOMEM; c = JFFS2_SB_INFO(dir_i->i_sb); D1(printk(KERN_DEBUG "jffs2_create()\n")); inode = jffs2_new_inode(dir_i, mode, ri); if (IS_ERR(inode)) { D1(printk(KERN_DEBUG "jffs2_new_inode() failed\n")); jffs2_free_raw_inode(ri); return PTR_ERR(inode); } inode->i_op = &jffs2_file_inode_operations; inode->i_fop = &jffs2_file_operations; inode->i_mapping->a_ops = &jffs2_file_address_operations; inode->i_mapping->nrpages = 0; f = JFFS2_INODE_INFO(inode); dir_f = JFFS2_INODE_INFO(dir_i); /* jffs2_do_create() will want to lock it, _after_ reserving space and taking c-alloc_sem. If we keep it locked here, lockdep gets unhappy (although it's a false positive; nothing else will be looking at this inode yet so there's no chance of AB-BA deadlock involving its f->sem). */ mutex_unlock(&f->sem); ret = jffs2_do_create(c, dir_f, f, ri, &dentry->d_name); if (ret) goto fail; dir_i->i_mtime = dir_i->i_ctime = ITIME(je32_to_cpu(ri->ctime)); jffs2_free_raw_inode(ri); D1(printk(KERN_DEBUG "jffs2_create: Created ino #%lu with mode %o, nlink %d(%d). nrpages %ld\n", inode->i_ino, inode->i_mode, inode->i_nlink, f->inocache->pino_nlink, inode->i_mapping->nrpages)); d_instantiate(dentry, inode); unlock_new_inode(inode); return 0; fail: iget_failed(inode); jffs2_free_raw_inode(ri); return ret; } /***********************************************************************/ static int jffs2_unlink(struct inode *dir_i, struct dentry *dentry) { struct jffs2_sb_info *c = JFFS2_SB_INFO(dir_i->i_sb); struct jffs2_inode_info *dir_f = JFFS2_INODE_INFO(dir_i); struct jffs2_inode_info *dead_f = JFFS2_INODE_INFO(dentry->d_inode); int ret; uint32_t now = get_seconds(); ret = jffs2_do_unlink(c, dir_f, dentry->d_name.name, dentry->d_name.len, dead_f, now); if (dead_f->inocache) dentry->d_inode->i_nlink = dead_f->inocache->pino_nlink; if (!ret) dir_i->i_mtime = dir_i->i_ctime = ITIME(now); return ret; } /***********************************************************************/ static int jffs2_link (struct dentry *old_dentry, struct inode *dir_i, struct dentry *dentry) { struct jffs2_sb_info *c = JFFS2_SB_INFO(old_dentry->d_inode->i_sb); struct jffs2_inode_info *f = JFFS2_INODE_INFO(old_dentry->d_inode); struct jffs2_inode_info *dir_f = JFFS2_INODE_INFO(dir_i); int ret; uint8_t type; uint32_t now; /* Don't let people make hard links to bad inodes. */ if (!f->inocache) return -EIO; if (S_ISDIR(old_dentry->d_inode->i_mode)) return -EPERM; /* XXX: This is ugly */ type = (old_dentry->d_inode->i_mode & S_IFMT) >> 12; if (!type) type = DT_REG; now = get_seconds(); ret = jffs2_do_link(c, dir_f, f->inocache->ino, type, dentry->d_name.name, dentry->d_name.len, now); if (!ret) { mutex_lock(&f->sem); old_dentry->d_inode->i_nlink = ++f->inocache->pino_nlink; mutex_unlock(&f->sem); d_instantiate(dentry, old_dentry->d_inode); dir_i->i_mtime = dir_i->i_ctime = ITIME(now); ihold(old_dentry->d_inode); } return ret; } /***********************************************************************/ static int jffs2_symlink (struct inode *dir_i, struct dentry *dentry, const char *target) { struct jffs2_inode_info *f, *dir_f; struct jffs2_sb_info *c; struct inode *inode; struct jffs2_raw_inode *ri; struct jffs2_raw_dirent *rd; struct jffs2_full_dnode *fn; struct jffs2_full_dirent *fd; int namelen; uint32_t alloclen; int ret, targetlen = strlen(target); /* FIXME: If you care. We'd need to use frags for the target if it grows much more than this */ if (targetlen > 254) return -ENAMETOOLONG; ri = jffs2_alloc_raw_inode(); if (!ri) return -ENOMEM; c = JFFS2_SB_INFO(dir_i->i_sb); /* Try to reserve enough space for both node and dirent. * Just the node will do for now, though */ namelen = dentry->d_name.len; ret = jffs2_reserve_space(c, sizeof(*ri) + targetlen, &alloclen, ALLOC_NORMAL, JFFS2_SUMMARY_INODE_SIZE); if (ret) { jffs2_free_raw_inode(ri); return ret; } inode = jffs2_new_inode(dir_i, S_IFLNK | S_IRWXUGO, ri); if (IS_ERR(inode)) { jffs2_free_raw_inode(ri); jffs2_complete_reservation(c); return PTR_ERR(inode); } inode->i_op = &jffs2_symlink_inode_operations; f = JFFS2_INODE_INFO(inode); inode->i_size = targetlen; ri->isize = ri->dsize = ri->csize = cpu_to_je32(inode->i_size); ri->totlen = cpu_to_je32(sizeof(*ri) + inode->i_size); ri->hdr_crc = cpu_to_je32(crc32(0, ri, sizeof(struct jffs2_unknown_node)-4)); ri->compr = JFFS2_COMPR_NONE; ri->data_crc = cpu_to_je32(crc32(0, target, targetlen)); ri->node_crc = cpu_to_je32(crc32(0, ri, sizeof(*ri)-8)); fn = jffs2_write_dnode(c, f, ri, target, targetlen, ALLOC_NORMAL); jffs2_free_raw_inode(ri); if (IS_ERR(fn)) { /* Eeek. Wave bye bye */ mutex_unlock(&f->sem); jffs2_complete_reservation(c); ret = PTR_ERR(fn); goto fail; } /* We use f->target field to store the target path. */ f->target = kmemdup(target, targetlen + 1, GFP_KERNEL); if (!f->target) { printk(KERN_WARNING "Can't allocate %d bytes of memory\n", targetlen + 1); mutex_unlock(&f->sem); jffs2_complete_reservation(c); ret = -ENOMEM; goto fail; } D1(printk(KERN_DEBUG "jffs2_symlink: symlink's target '%s' cached\n", (char *)f->target)); /* No data here. Only a metadata node, which will be obsoleted by the first data write */ f->metadata = fn; mutex_unlock(&f->sem); jffs2_complete_reservation(c); ret = jffs2_init_security(inode, dir_i, &dentry->d_name); if (ret) goto fail; ret = jffs2_init_acl_post(inode); if (ret) goto fail; ret = jffs2_reserve_space(c, sizeof(*rd)+namelen, &alloclen, ALLOC_NORMAL, JFFS2_SUMMARY_DIRENT_SIZE(namelen)); if (ret) goto fail; rd = jffs2_alloc_raw_dirent(); if (!rd) { /* Argh. Now we treat it like a normal delete */ jffs2_complete_reservation(c); ret = -ENOMEM; goto fail; } dir_f = JFFS2_INODE_INFO(dir_i); mutex_lock(&dir_f->sem); rd->magic = cpu_to_je16(JFFS2_MAGIC_BITMASK); rd->nodetype = cpu_to_je16(JFFS2_NODETYPE_DIRENT); rd->totlen = cpu_to_je32(sizeof(*rd) + namelen); rd->hdr_crc = cpu_to_je32(crc32(0, rd, sizeof(struct jffs2_unknown_node)-4)); rd->pino = cpu_to_je32(dir_i->i_ino); rd->version = cpu_to_je32(++dir_f->highest_version); rd->ino = cpu_to_je32(inode->i_ino); rd->mctime = cpu_to_je32(get_seconds()); rd->nsize = namelen; rd->type = DT_LNK; rd->node_crc = cpu_to_je32(crc32(0, rd, sizeof(*rd)-8)); rd->name_crc = cpu_to_je32(crc32(0, dentry->d_name.name, namelen)); fd = jffs2_write_dirent(c, dir_f, rd, dentry->d_name.name, namelen, ALLOC_NORMAL); if (IS_ERR(fd)) { /* dirent failed to write. Delete the inode normally as if it were the final unlink() */ jffs2_complete_reservation(c); jffs2_free_raw_dirent(rd); mutex_unlock(&dir_f->sem); ret = PTR_ERR(fd); goto fail; } dir_i->i_mtime = dir_i->i_ctime = ITIME(je32_to_cpu(rd->mctime)); jffs2_free_raw_dirent(rd); /* Link the fd into the inode's list, obsoleting an old one if necessary. */ jffs2_add_fd_to_list(c, fd, &dir_f->dents); mutex_unlock(&dir_f->sem); jffs2_complete_reservation(c); d_instantiate(dentry, inode); unlock_new_inode(inode); return 0; fail: iget_failed(inode); return ret; } static int jffs2_mkdir (struct inode *dir_i, struct dentry *dentry, int mode) { struct jffs2_inode_info *f, *dir_f; struct jffs2_sb_info *c; struct inode *inode; struct jffs2_raw_inode *ri; struct jffs2_raw_dirent *rd; struct jffs2_full_dnode *fn; struct jffs2_full_dirent *fd; int namelen; uint32_t alloclen; int ret; mode |= S_IFDIR; ri = jffs2_alloc_raw_inode(); if (!ri) return -ENOMEM; c = JFFS2_SB_INFO(dir_i->i_sb); /* Try to reserve enough space for both node and dirent. * Just the node will do for now, though */ namelen = dentry->d_name.len; ret = jffs2_reserve_space(c, sizeof(*ri), &alloclen, ALLOC_NORMAL, JFFS2_SUMMARY_INODE_SIZE); if (ret) { jffs2_free_raw_inode(ri); return ret; } inode = jffs2_new_inode(dir_i, mode, ri); if (IS_ERR(inode)) { jffs2_free_raw_inode(ri); jffs2_complete_reservation(c); return PTR_ERR(inode); } inode->i_op = &jffs2_dir_inode_operations; inode->i_fop = &jffs2_dir_operations; f = JFFS2_INODE_INFO(inode); /* Directories get nlink 2 at start */ inode->i_nlink = 2; /* but ic->pino_nlink is the parent ino# */ f->inocache->pino_nlink = dir_i->i_ino; ri->data_crc = cpu_to_je32(0); ri->node_crc = cpu_to_je32(crc32(0, ri, sizeof(*ri)-8)); fn = jffs2_write_dnode(c, f, ri, NULL, 0, ALLOC_NORMAL); jffs2_free_raw_inode(ri); if (IS_ERR(fn)) { /* Eeek. Wave bye bye */ mutex_unlock(&f->sem); jffs2_complete_reservation(c); ret = PTR_ERR(fn); goto fail; } /* No data here. Only a metadata node, which will be obsoleted by the first data write */ f->metadata = fn; mutex_unlock(&f->sem); jffs2_complete_reservation(c); ret = jffs2_init_security(inode, dir_i, &dentry->d_name); if (ret) goto fail; ret = jffs2_init_acl_post(inode); if (ret) goto fail; ret = jffs2_reserve_space(c, sizeof(*rd)+namelen, &alloclen, ALLOC_NORMAL, JFFS2_SUMMARY_DIRENT_SIZE(namelen)); if (ret) goto fail; rd = jffs2_alloc_raw_dirent(); if (!rd) { /* Argh. Now we treat it like a normal delete */ jffs2_complete_reservation(c); ret = -ENOMEM; goto fail; } dir_f = JFFS2_INODE_INFO(dir_i); mutex_lock(&dir_f->sem); rd->magic = cpu_to_je16(JFFS2_MAGIC_BITMASK); rd->nodetype = cpu_to_je16(JFFS2_NODETYPE_DIRENT); rd->totlen = cpu_to_je32(sizeof(*rd) + namelen); rd->hdr_crc = cpu_to_je32(crc32(0, rd, sizeof(struct jffs2_unknown_node)-4)); rd->pino = cpu_to_je32(dir_i->i_ino); rd->version = cpu_to_je32(++dir_f->highest_version); rd->ino = cpu_to_je32(inode->i_ino); rd->mctime = cpu_to_je32(get_seconds()); rd->nsize = namelen; rd->type = DT_DIR; rd->node_crc = cpu_to_je32(crc32(0, rd, sizeof(*rd)-8)); rd->name_crc = cpu_to_je32(crc32(0, dentry->d_name.name, namelen)); fd = jffs2_write_dirent(c, dir_f, rd, dentry->d_name.name, namelen, ALLOC_NORMAL); if (IS_ERR(fd)) { /* dirent failed to write. Delete the inode normally as if it were the final unlink() */ jffs2_complete_reservation(c); jffs2_free_raw_dirent(rd); mutex_unlock(&dir_f->sem); ret = PTR_ERR(fd); goto fail; } dir_i->i_mtime = dir_i->i_ctime = ITIME(je32_to_cpu(rd->mctime)); inc_nlink(dir_i); jffs2_free_raw_dirent(rd); /* Link the fd into the inode's list, obsoleting an old one if necessary. */ jffs2_add_fd_to_list(c, fd, &dir_f->dents); mutex_unlock(&dir_f->sem); jffs2_complete_reservation(c); d_instantiate(dentry, inode); unlock_new_inode(inode); return 0; fail: iget_failed(inode); return ret; } static int jffs2_rmdir (struct inode *dir_i, struct dentry *dentry) { struct jffs2_sb_info *c = JFFS2_SB_INFO(dir_i->i_sb); struct jffs2_inode_info *dir_f = JFFS2_INODE_INFO(dir_i); struct jffs2_inode_info *f = JFFS2_INODE_INFO(dentry->d_inode); struct jffs2_full_dirent *fd; int ret; uint32_t now = get_seconds(); for (fd = f->dents ; fd; fd = fd->next) { if (fd->ino) return -ENOTEMPTY; } ret = jffs2_do_unlink(c, dir_f, dentry->d_name.name, dentry->d_name.len, f, now); if (!ret) { dir_i->i_mtime = dir_i->i_ctime = ITIME(now); clear_nlink(dentry->d_inode); drop_nlink(dir_i); } return ret; } static int jffs2_mknod (struct inode *dir_i, struct dentry *dentry, int mode, dev_t rdev) { struct jffs2_inode_info *f, *dir_f; struct jffs2_sb_info *c; struct inode *inode; struct jffs2_raw_inode *ri; struct jffs2_raw_dirent *rd; struct jffs2_full_dnode *fn; struct jffs2_full_dirent *fd; int namelen; union jffs2_device_node dev; int devlen = 0; uint32_t alloclen; int ret; if (!new_valid_dev(rdev)) return -EINVAL; ri = jffs2_alloc_raw_inode(); if (!ri) return -ENOMEM; c = JFFS2_SB_INFO(dir_i->i_sb); if (S_ISBLK(mode) || S_ISCHR(mode)) devlen = jffs2_encode_dev(&dev, rdev); /* Try to reserve enough space for both node and dirent. * Just the node will do for now, though */ namelen = dentry->d_name.len; ret = jffs2_reserve_space(c, sizeof(*ri) + devlen, &alloclen, ALLOC_NORMAL, JFFS2_SUMMARY_INODE_SIZE); if (ret) { jffs2_free_raw_inode(ri); return ret; } inode = jffs2_new_inode(dir_i, mode, ri); if (IS_ERR(inode)) { jffs2_free_raw_inode(ri); jffs2_complete_reservation(c); return PTR_ERR(inode); } inode->i_op = &jffs2_file_inode_operations; init_special_inode(inode, inode->i_mode, rdev); f = JFFS2_INODE_INFO(inode); ri->dsize = ri->csize = cpu_to_je32(devlen); ri->totlen = cpu_to_je32(sizeof(*ri) + devlen); ri->hdr_crc = cpu_to_je32(crc32(0, ri, sizeof(struct jffs2_unknown_node)-4)); ri->compr = JFFS2_COMPR_NONE; ri->data_crc = cpu_to_je32(crc32(0, &dev, devlen)); ri->node_crc = cpu_to_je32(crc32(0, ri, sizeof(*ri)-8)); fn = jffs2_write_dnode(c, f, ri, (char *)&dev, devlen, ALLOC_NORMAL); jffs2_free_raw_inode(ri); if (IS_ERR(fn)) { /* Eeek. Wave bye bye */ mutex_unlock(&f->sem); jffs2_complete_reservation(c); ret = PTR_ERR(fn); goto fail; } /* No data here. Only a metadata node, which will be obsoleted by the first data write */ f->metadata = fn; mutex_unlock(&f->sem); jffs2_complete_reservation(c); ret = jffs2_init_security(inode, dir_i, &dentry->d_name); if (ret) goto fail; ret = jffs2_init_acl_post(inode); if (ret) goto fail; ret = jffs2_reserve_space(c, sizeof(*rd)+namelen, &alloclen, ALLOC_NORMAL, JFFS2_SUMMARY_DIRENT_SIZE(namelen)); if (ret) goto fail; rd = jffs2_alloc_raw_dirent(); if (!rd) { /* Argh. Now we treat it like a normal delete */ jffs2_complete_reservation(c); ret = -ENOMEM; goto fail; } dir_f = JFFS2_INODE_INFO(dir_i); mutex_lock(&dir_f->sem); rd->magic = cpu_to_je16(JFFS2_MAGIC_BITMASK); rd->nodetype = cpu_to_je16(JFFS2_NODETYPE_DIRENT); rd->totlen = cpu_to_je32(sizeof(*rd) + namelen); rd->hdr_crc = cpu_to_je32(crc32(0, rd, sizeof(struct jffs2_unknown_node)-4)); rd->pino = cpu_to_je32(dir_i->i_ino); rd->version = cpu_to_je32(++dir_f->highest_version); rd->ino = cpu_to_je32(inode->i_ino); rd->mctime = cpu_to_je32(get_seconds()); rd->nsize = namelen; /* XXX: This is ugly. */ rd->type = (mode & S_IFMT) >> 12; rd->node_crc = cpu_to_je32(crc32(0, rd, sizeof(*rd)-8)); rd->name_crc = cpu_to_je32(crc32(0, dentry->d_name.name, namelen)); fd = jffs2_write_dirent(c, dir_f, rd, dentry->d_name.name, namelen, ALLOC_NORMAL); if (IS_ERR(fd)) { /* dirent failed to write. Delete the inode normally as if it were the final unlink() */ jffs2_complete_reservation(c); jffs2_free_raw_dirent(rd); mutex_unlock(&dir_f->sem); ret = PTR_ERR(fd); goto fail; } dir_i->i_mtime = dir_i->i_ctime = ITIME(je32_to_cpu(rd->mctime)); jffs2_free_raw_dirent(rd); /* Link the fd into the inode's list, obsoleting an old one if necessary. */ jffs2_add_fd_to_list(c, fd, &dir_f->dents); mutex_unlock(&dir_f->sem); jffs2_complete_reservation(c); d_instantiate(dentry, inode); unlock_new_inode(inode); return 0; fail: iget_failed(inode); return ret; } static int jffs2_rename (struct inode *old_dir_i, struct dentry *old_dentry, struct inode *new_dir_i, struct dentry *new_dentry) { int ret; struct jffs2_sb_info *c = JFFS2_SB_INFO(old_dir_i->i_sb); struct jffs2_inode_info *victim_f = NULL; uint8_t type; uint32_t now; /* The VFS will check for us and prevent trying to rename a * file over a directory and vice versa, but if it's a directory, * the VFS can't check whether the victim is empty. The filesystem * needs to do that for itself. */ if (new_dentry->d_inode) { victim_f = JFFS2_INODE_INFO(new_dentry->d_inode); if (S_ISDIR(new_dentry->d_inode->i_mode)) { struct jffs2_full_dirent *fd; mutex_lock(&victim_f->sem); for (fd = victim_f->dents; fd; fd = fd->next) { if (fd->ino) { mutex_unlock(&victim_f->sem); return -ENOTEMPTY; } } mutex_unlock(&victim_f->sem); } } /* XXX: We probably ought to alloc enough space for both nodes at the same time. Writing the new link, then getting -ENOSPC, is quite bad :) */ /* Make a hard link */ /* XXX: This is ugly */ type = (old_dentry->d_inode->i_mode & S_IFMT) >> 12; if (!type) type = DT_REG; now = get_seconds(); ret = jffs2_do_link(c, JFFS2_INODE_INFO(new_dir_i), old_dentry->d_inode->i_ino, type, new_dentry->d_name.name, new_dentry->d_name.len, now); if (ret) return ret; if (victim_f) { /* There was a victim. Kill it off nicely */ drop_nlink(new_dentry->d_inode); /* Don't oops if the victim was a dirent pointing to an inode which didn't exist. */ if (victim_f->inocache) { mutex_lock(&victim_f->sem); if (S_ISDIR(new_dentry->d_inode->i_mode)) victim_f->inocache->pino_nlink = 0; else victim_f->inocache->pino_nlink--; mutex_unlock(&victim_f->sem); } } /* If it was a directory we moved, and there was no victim, increase i_nlink on its new parent */ if (S_ISDIR(old_dentry->d_inode->i_mode) && !victim_f) inc_nlink(new_dir_i); /* Unlink the original */ ret = jffs2_do_unlink(c, JFFS2_INODE_INFO(old_dir_i), old_dentry->d_name.name, old_dentry->d_name.len, NULL, now); /* We don't touch inode->i_nlink */ if (ret) { /* Oh shit. We really ought to make a single node which can do both atomically */ struct jffs2_inode_info *f = JFFS2_INODE_INFO(old_dentry->d_inode); mutex_lock(&f->sem); inc_nlink(old_dentry->d_inode); if (f->inocache && !S_ISDIR(old_dentry->d_inode->i_mode)) f->inocache->pino_nlink++; mutex_unlock(&f->sem); printk(KERN_NOTICE "jffs2_rename(): Link succeeded, unlink failed (err %d). You now have a hard link\n", ret); /* Might as well let the VFS know */ d_instantiate(new_dentry, old_dentry->d_inode); ihold(old_dentry->d_inode); new_dir_i->i_mtime = new_dir_i->i_ctime = ITIME(now); return ret; } if (S_ISDIR(old_dentry->d_inode->i_mode)) drop_nlink(old_dir_i); new_dir_i->i_mtime = new_dir_i->i_ctime = old_dir_i->i_mtime = old_dir_i->i_ctime = ITIME(now); return 0; }
gpl-2.0
freexperia/android_kernel_sony_tegra
sound/firewire/amdtp.c
151
15183
/* * Audio and Music Data Transmission Protocol (IEC 61883-6) streams * with Common Isochronous Packet (IEC 61883-1) headers * * Copyright (c) Clemens Ladisch <clemens@ladisch.de> * Licensed under the terms of the GNU General Public License, version 2. */ #include <linux/device.h> #include <linux/err.h> #include <linux/firewire.h> #include <linux/module.h> #include <linux/slab.h> #include <sound/pcm.h> #include "amdtp.h" #define TICKS_PER_CYCLE 3072 #define CYCLES_PER_SECOND 8000 #define TICKS_PER_SECOND (TICKS_PER_CYCLE * CYCLES_PER_SECOND) #define TRANSFER_DELAY_TICKS 0x2e00 /* 479.17 µs */ #define TAG_CIP 1 #define CIP_EOH (1u << 31) #define CIP_FMT_AM (0x10 << 24) #define AMDTP_FDF_AM824 (0 << 19) #define AMDTP_FDF_SFC_SHIFT 16 /* TODO: make these configurable */ #define INTERRUPT_INTERVAL 16 #define QUEUE_LENGTH 48 /** * amdtp_out_stream_init - initialize an AMDTP output stream structure * @s: the AMDTP output stream to initialize * @unit: the target of the stream * @flags: the packet transmission method to use */ int amdtp_out_stream_init(struct amdtp_out_stream *s, struct fw_unit *unit, enum cip_out_flags flags) { if (flags != CIP_NONBLOCKING) return -EINVAL; s->unit = fw_unit_get(unit); s->flags = flags; s->context = ERR_PTR(-1); mutex_init(&s->mutex); s->packet_index = 0; return 0; } EXPORT_SYMBOL(amdtp_out_stream_init); /** * amdtp_out_stream_destroy - free stream resources * @s: the AMDTP output stream to destroy */ void amdtp_out_stream_destroy(struct amdtp_out_stream *s) { WARN_ON(!IS_ERR(s->context)); mutex_destroy(&s->mutex); fw_unit_put(s->unit); } EXPORT_SYMBOL(amdtp_out_stream_destroy); /** * amdtp_out_stream_set_rate - set the sample rate * @s: the AMDTP output stream to configure * @rate: the sample rate * * The sample rate must be set before the stream is started, and must not be * changed while the stream is running. */ void amdtp_out_stream_set_rate(struct amdtp_out_stream *s, unsigned int rate) { static const struct { unsigned int rate; unsigned int syt_interval; } rate_info[] = { [CIP_SFC_32000] = { 32000, 8, }, [CIP_SFC_44100] = { 44100, 8, }, [CIP_SFC_48000] = { 48000, 8, }, [CIP_SFC_88200] = { 88200, 16, }, [CIP_SFC_96000] = { 96000, 16, }, [CIP_SFC_176400] = { 176400, 32, }, [CIP_SFC_192000] = { 192000, 32, }, }; unsigned int sfc; if (WARN_ON(!IS_ERR(s->context))) return; for (sfc = 0; sfc < ARRAY_SIZE(rate_info); ++sfc) if (rate_info[sfc].rate == rate) { s->sfc = sfc; s->syt_interval = rate_info[sfc].syt_interval; return; } WARN_ON(1); } EXPORT_SYMBOL(amdtp_out_stream_set_rate); /** * amdtp_out_stream_get_max_payload - get the stream's packet size * @s: the AMDTP output stream * * This function must not be called before the stream has been configured * with amdtp_out_stream_set_hw_params(), amdtp_out_stream_set_pcm(), and * amdtp_out_stream_set_midi(). */ unsigned int amdtp_out_stream_get_max_payload(struct amdtp_out_stream *s) { static const unsigned int max_data_blocks[] = { [CIP_SFC_32000] = 4, [CIP_SFC_44100] = 6, [CIP_SFC_48000] = 6, [CIP_SFC_88200] = 12, [CIP_SFC_96000] = 12, [CIP_SFC_176400] = 23, [CIP_SFC_192000] = 24, }; s->data_block_quadlets = s->pcm_channels; s->data_block_quadlets += DIV_ROUND_UP(s->midi_ports, 8); return 8 + max_data_blocks[s->sfc] * 4 * s->data_block_quadlets; } EXPORT_SYMBOL(amdtp_out_stream_get_max_payload); static void amdtp_write_s16(struct amdtp_out_stream *s, struct snd_pcm_substream *pcm, __be32 *buffer, unsigned int frames); static void amdtp_write_s32(struct amdtp_out_stream *s, struct snd_pcm_substream *pcm, __be32 *buffer, unsigned int frames); /** * amdtp_out_stream_set_pcm_format - set the PCM format * @s: the AMDTP output stream to configure * @format: the format of the ALSA PCM device * * The sample format must be set before the stream is started, and must not be * changed while the stream is running. */ void amdtp_out_stream_set_pcm_format(struct amdtp_out_stream *s, snd_pcm_format_t format) { if (WARN_ON(!IS_ERR(s->context))) return; switch (format) { default: WARN_ON(1); /* fall through */ case SNDRV_PCM_FORMAT_S16: s->transfer_samples = amdtp_write_s16; break; case SNDRV_PCM_FORMAT_S32: s->transfer_samples = amdtp_write_s32; break; } } EXPORT_SYMBOL(amdtp_out_stream_set_pcm_format); static unsigned int calculate_data_blocks(struct amdtp_out_stream *s) { unsigned int phase, data_blocks; if (!cip_sfc_is_base_44100(s->sfc)) { /* Sample_rate / 8000 is an integer, and precomputed. */ data_blocks = s->data_block_state; } else { phase = s->data_block_state; /* * This calculates the number of data blocks per packet so that * 1) the overall rate is correct and exactly synchronized to * the bus clock, and * 2) packets with a rounded-up number of blocks occur as early * as possible in the sequence (to prevent underruns of the * device's buffer). */ if (s->sfc == CIP_SFC_44100) /* 6 6 5 6 5 6 5 ... */ data_blocks = 5 + ((phase & 1) ^ (phase == 0 || phase >= 40)); else /* 12 11 11 11 11 ... or 23 22 22 22 22 ... */ data_blocks = 11 * (s->sfc >> 1) + (phase == 0); if (++phase >= (80 >> (s->sfc >> 1))) phase = 0; s->data_block_state = phase; } return data_blocks; } static unsigned int calculate_syt(struct amdtp_out_stream *s, unsigned int cycle) { unsigned int syt_offset, phase, index, syt; if (s->last_syt_offset < TICKS_PER_CYCLE) { if (!cip_sfc_is_base_44100(s->sfc)) syt_offset = s->last_syt_offset + s->syt_offset_state; else { /* * The time, in ticks, of the n'th SYT_INTERVAL sample is: * n * SYT_INTERVAL * 24576000 / sample_rate * Modulo TICKS_PER_CYCLE, the difference between successive * elements is about 1386.23. Rounding the results of this * formula to the SYT precision results in a sequence of * differences that begins with: * 1386 1386 1387 1386 1386 1386 1387 1386 1386 1386 1387 ... * This code generates _exactly_ the same sequence. */ phase = s->syt_offset_state; index = phase % 13; syt_offset = s->last_syt_offset; syt_offset += 1386 + ((index && !(index & 3)) || phase == 146); if (++phase >= 147) phase = 0; s->syt_offset_state = phase; } } else syt_offset = s->last_syt_offset - TICKS_PER_CYCLE; s->last_syt_offset = syt_offset; if (syt_offset < TICKS_PER_CYCLE) { syt_offset += TRANSFER_DELAY_TICKS - TICKS_PER_CYCLE; syt = (cycle + syt_offset / TICKS_PER_CYCLE) << 12; syt += syt_offset % TICKS_PER_CYCLE; return syt & 0xffff; } else { return 0xffff; /* no info */ } } static void amdtp_write_s32(struct amdtp_out_stream *s, struct snd_pcm_substream *pcm, __be32 *buffer, unsigned int frames) { struct snd_pcm_runtime *runtime = pcm->runtime; unsigned int channels, remaining_frames, frame_step, i, c; const u32 *src; channels = s->pcm_channels; src = (void *)runtime->dma_area + s->pcm_buffer_pointer * (runtime->frame_bits / 8); remaining_frames = runtime->buffer_size - s->pcm_buffer_pointer; frame_step = s->data_block_quadlets - channels; for (i = 0; i < frames; ++i) { for (c = 0; c < channels; ++c) { *buffer = cpu_to_be32((*src >> 8) | 0x40000000); src++; buffer++; } buffer += frame_step; if (--remaining_frames == 0) src = (void *)runtime->dma_area; } } static void amdtp_write_s16(struct amdtp_out_stream *s, struct snd_pcm_substream *pcm, __be32 *buffer, unsigned int frames) { struct snd_pcm_runtime *runtime = pcm->runtime; unsigned int channels, remaining_frames, frame_step, i, c; const u16 *src; channels = s->pcm_channels; src = (void *)runtime->dma_area + s->pcm_buffer_pointer * (runtime->frame_bits / 8); remaining_frames = runtime->buffer_size - s->pcm_buffer_pointer; frame_step = s->data_block_quadlets - channels; for (i = 0; i < frames; ++i) { for (c = 0; c < channels; ++c) { *buffer = cpu_to_be32((*src << 8) | 0x40000000); src++; buffer++; } buffer += frame_step; if (--remaining_frames == 0) src = (void *)runtime->dma_area; } } static void amdtp_fill_pcm_silence(struct amdtp_out_stream *s, __be32 *buffer, unsigned int frames) { unsigned int i, c; for (i = 0; i < frames; ++i) { for (c = 0; c < s->pcm_channels; ++c) buffer[c] = cpu_to_be32(0x40000000); buffer += s->data_block_quadlets; } } static void amdtp_fill_midi(struct amdtp_out_stream *s, __be32 *buffer, unsigned int frames) { unsigned int i; for (i = 0; i < frames; ++i) buffer[s->pcm_channels + i * s->data_block_quadlets] = cpu_to_be32(0x80000000); } static void queue_out_packet(struct amdtp_out_stream *s, unsigned int cycle) { __be32 *buffer; unsigned int index, data_blocks, syt, ptr; struct snd_pcm_substream *pcm; struct fw_iso_packet packet; int err; if (s->packet_index < 0) return; index = s->packet_index; data_blocks = calculate_data_blocks(s); syt = calculate_syt(s, cycle); buffer = s->buffer.packets[index].buffer; buffer[0] = cpu_to_be32(ACCESS_ONCE(s->source_node_id_field) | (s->data_block_quadlets << 16) | s->data_block_counter); buffer[1] = cpu_to_be32(CIP_EOH | CIP_FMT_AM | AMDTP_FDF_AM824 | (s->sfc << AMDTP_FDF_SFC_SHIFT) | syt); buffer += 2; pcm = ACCESS_ONCE(s->pcm); if (pcm) s->transfer_samples(s, pcm, buffer, data_blocks); else amdtp_fill_pcm_silence(s, buffer, data_blocks); if (s->midi_ports) amdtp_fill_midi(s, buffer, data_blocks); s->data_block_counter = (s->data_block_counter + data_blocks) & 0xff; packet.payload_length = 8 + data_blocks * 4 * s->data_block_quadlets; packet.interrupt = IS_ALIGNED(index + 1, INTERRUPT_INTERVAL); packet.skip = 0; packet.tag = TAG_CIP; packet.sy = 0; packet.header_length = 0; err = fw_iso_context_queue(s->context, &packet, &s->buffer.iso_buffer, s->buffer.packets[index].offset); if (err < 0) { dev_err(&s->unit->device, "queueing error: %d\n", err); s->packet_index = -1; amdtp_out_stream_pcm_abort(s); return; } if (++index >= QUEUE_LENGTH) index = 0; s->packet_index = index; if (pcm) { ptr = s->pcm_buffer_pointer + data_blocks; if (ptr >= pcm->runtime->buffer_size) ptr -= pcm->runtime->buffer_size; ACCESS_ONCE(s->pcm_buffer_pointer) = ptr; s->pcm_period_pointer += data_blocks; if (s->pcm_period_pointer >= pcm->runtime->period_size) { s->pcm_period_pointer -= pcm->runtime->period_size; snd_pcm_period_elapsed(pcm); } } } static void out_packet_callback(struct fw_iso_context *context, u32 cycle, size_t header_length, void *header, void *data) { struct amdtp_out_stream *s = data; unsigned int i, packets = header_length / 4; /* * Compute the cycle of the last queued packet. * (We need only the four lowest bits for the SYT, so we can ignore * that bits 0-11 must wrap around at 3072.) */ cycle += QUEUE_LENGTH - packets; for (i = 0; i < packets; ++i) queue_out_packet(s, ++cycle); } static int queue_initial_skip_packets(struct amdtp_out_stream *s) { struct fw_iso_packet skip_packet = { .skip = 1, }; unsigned int i; int err; for (i = 0; i < QUEUE_LENGTH; ++i) { skip_packet.interrupt = IS_ALIGNED(s->packet_index + 1, INTERRUPT_INTERVAL); err = fw_iso_context_queue(s->context, &skip_packet, NULL, 0); if (err < 0) return err; if (++s->packet_index >= QUEUE_LENGTH) s->packet_index = 0; } return 0; } /** * amdtp_out_stream_start - start sending packets * @s: the AMDTP output stream to start * @channel: the isochronous channel on the bus * @speed: firewire speed code * * The stream cannot be started until it has been configured with * amdtp_out_stream_set_hw_params(), amdtp_out_stream_set_pcm(), and * amdtp_out_stream_set_midi(); and it must be started before any * PCM or MIDI device can be started. */ int amdtp_out_stream_start(struct amdtp_out_stream *s, int channel, int speed) { static const struct { unsigned int data_block; unsigned int syt_offset; } initial_state[] = { [CIP_SFC_32000] = { 4, 3072 }, [CIP_SFC_48000] = { 6, 1024 }, [CIP_SFC_96000] = { 12, 1024 }, [CIP_SFC_192000] = { 24, 1024 }, [CIP_SFC_44100] = { 0, 67 }, [CIP_SFC_88200] = { 0, 67 }, [CIP_SFC_176400] = { 0, 67 }, }; int err; mutex_lock(&s->mutex); if (WARN_ON(!IS_ERR(s->context) || (!s->pcm_channels && !s->midi_ports))) { err = -EBADFD; goto err_unlock; } s->data_block_state = initial_state[s->sfc].data_block; s->syt_offset_state = initial_state[s->sfc].syt_offset; s->last_syt_offset = TICKS_PER_CYCLE; err = iso_packets_buffer_init(&s->buffer, s->unit, QUEUE_LENGTH, amdtp_out_stream_get_max_payload(s), DMA_TO_DEVICE); if (err < 0) goto err_unlock; s->context = fw_iso_context_create(fw_parent_device(s->unit)->card, FW_ISO_CONTEXT_TRANSMIT, channel, speed, 0, out_packet_callback, s); if (IS_ERR(s->context)) { err = PTR_ERR(s->context); if (err == -EBUSY) dev_err(&s->unit->device, "no free output stream on this controller\n"); goto err_buffer; } amdtp_out_stream_update(s); s->packet_index = 0; s->data_block_counter = 0; err = queue_initial_skip_packets(s); if (err < 0) goto err_context; err = fw_iso_context_start(s->context, -1, 0, 0); if (err < 0) goto err_context; mutex_unlock(&s->mutex); return 0; err_context: fw_iso_context_destroy(s->context); s->context = ERR_PTR(-1); err_buffer: iso_packets_buffer_destroy(&s->buffer, s->unit); err_unlock: mutex_unlock(&s->mutex); return err; } EXPORT_SYMBOL(amdtp_out_stream_start); /** * amdtp_out_stream_update - update the stream after a bus reset * @s: the AMDTP output stream */ void amdtp_out_stream_update(struct amdtp_out_stream *s) { ACCESS_ONCE(s->source_node_id_field) = (fw_parent_device(s->unit)->card->node_id & 0x3f) << 24; } EXPORT_SYMBOL(amdtp_out_stream_update); /** * amdtp_out_stream_stop - stop sending packets * @s: the AMDTP output stream to stop * * All PCM and MIDI devices of the stream must be stopped before the stream * itself can be stopped. */ void amdtp_out_stream_stop(struct amdtp_out_stream *s) { mutex_lock(&s->mutex); if (IS_ERR(s->context)) { mutex_unlock(&s->mutex); return; } fw_iso_context_stop(s->context); fw_iso_context_destroy(s->context); s->context = ERR_PTR(-1); iso_packets_buffer_destroy(&s->buffer, s->unit); mutex_unlock(&s->mutex); } EXPORT_SYMBOL(amdtp_out_stream_stop); /** * amdtp_out_stream_pcm_abort - abort the running PCM device * @s: the AMDTP stream about to be stopped * * If the isochronous stream needs to be stopped asynchronously, call this * function first to stop the PCM device. */ void amdtp_out_stream_pcm_abort(struct amdtp_out_stream *s) { struct snd_pcm_substream *pcm; pcm = ACCESS_ONCE(s->pcm); if (pcm) { snd_pcm_stream_lock_irq(pcm); if (snd_pcm_running(pcm)) snd_pcm_stop(pcm, SNDRV_PCM_STATE_XRUN); snd_pcm_stream_unlock_irq(pcm); } } EXPORT_SYMBOL(amdtp_out_stream_pcm_abort);
gpl-2.0
CyanideL/android_kernel_samsung_jf
drivers/media/video/msm-bayer/sensors/s5k6b2yx.c
151
23792
/* Copyright (c) 2012, Code Aurora Forum. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and * only version 2 as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * */ #include "msm_sensor.h" #include "s5k6b2yx.h" #define SENSOR_NAME "s5k6b2yx" #define PLATFORM_DRIVER_NAME "msm_camera_s5k6b2yx" #define s5k6b2yx_obj s5k6b2yx_##obj #define VISION_MODE_TEST_PATTERN 0 #define VISION_MODE_AE_REG_ADDR 0x600a #define VISION_MODE_AE_BACKLIGHT 0x7a #define VISION_MODE_AE_NORMAL 0x2a #define VISION_MODE_SET_FPS_ADDR 0x6027 #define VISION_MODE_SET_FPS_5 0x1 #define VISION_MODE_SET_FPS_10 0X2 #define VISION_MODE_FPS_5_VAL 0xD0 #define VISION_MODE_FPS_10_VAL 0x68 DEFINE_MUTEX(s5k6b2yx_mut); static struct msm_sensor_ctrl_t s5k6b2yx_s_ctrl; int32_t msm_sensor_enable_i2c_mux(struct msm_camera_i2c_conf *i2c_conf); int32_t msm_sensor_disable_i2c_mux(struct msm_camera_i2c_conf *i2c_conf); /*176x104 in vision mode*/ static struct msm_camera_i2c_reg_conf s5k6b2yx_vision_settings[] = { /* For 176 x 104 */ {0x4345, 0x80}, /* x_addr_start_alv : 128 */ {0x4348, 0x07}, /* x_addr_end_alv : 1887 */ {0x4349, 0x5F}, {0x434D, 0xB0}, /* x_output_size_alv : 176 */ /* patch size: ((44-1) x (26-1)) */ {0x6014, 0x2B}, /* patch width */ {0x6015, 0x19}, /* patch height */ {0x6026, 0x00}, /* 5fps */ // {0x6027, 0xD0}, /* 5fps */ /* number of pixel : 176*104*24/64=6864 */ {0x5030, 0x1A}, {0x5031, 0xD0}, /* 8bit mode */ {0x7030, 0x0E}, {0x7031, 0x2F}, /* Analog Tuning */ {0x7067, 0x00}, {0x7074, 0x22}, {0x7402, 0x1F}, {0x7403, 0xC0}, {0x7247, 0x01}, {0x7412, 0x09}, {0x7413, 0xB9}, {0x7430, 0x05}, {0x7432, 0x02}, {0x7433, 0x32}, {0x7075, 0x3D}, {0x7066, 0x09}, {0x6000, 0x01}, {0x6001, 0x10}, {0x6002, 0x14}, {0x6003, 0x41}, {0x6004, 0x14}, {0x6005, 0x41}, {0x6006, 0x01}, {0x6007, 0x10}, /* Target */ {0x600A, 0x2A}, /* Speed */ {0x5034, 0x00}, /* Innner Target Tolerance */ {0x503F, 0x03}, /* G + R Setting (20120813) */ /* Vision Senser Data = 0.5*Gr + 0.5*R */ {0x6029, 0x02}, /* [2:0] : 1bit integer, 2bit fraction */ {0x602A, 0x02}, /* [2:0] : 1bit integer, 2bit fraction */ /* For Analog Gain 16x (20120904) */ {0x7018, 0xCF}, {0x7019, 0xDB}, {0x702A, 0x8D}, {0x702B, 0x60}, {0x5035, 0x02}, /* analog gain max */ /* BIT_RATE_MBPS_alv (584Mbps) */ {0x7351, 0x02}, {0x7352, 0x48}, {0x7353, 0x00}, {0x7354, 0x00}, #if VISION_MODE_TEST_PATTERN {0x7203, 0x42}, /* to enable test pattern */ #endif {0x7339, 0x03} /* [2]dphy_en1, [1]dphy_en0, [0] dhpy_en_clk */ }; static struct msm_camera_i2c_reg_conf s5k6b2yx_prev_snap_settings[] = { #if 0 //CHANGED BY jay because of sensor vendor recommendation {0x3067, 0x25}, {0x307D, 0x08}, {0x307E, 0x08}, {0x307F, 0x08}, {0x3080, 0x08}, {0x3073, 0x73}, {0x3074, 0x45}, {0x3075, 0xD4}, {0x3085, 0xF0}, {0x3068, 0x55}, {0x3069, 0x00}, {0x3063, 0x08}, {0x3064, 0x00}, {0x3083, 0xFF}, {0x3084, 0xFF}, /*pll settings*/ {0x0305, 0x06}, {0x0306, 0x00}, {0x0307, 0xb7}, /*size settings*/ {0x0344, 0x00}, {0x0345, 0x00}, {0x0346, 0x00}, {0x0347, 0x00}, {0x0348, 0x07}, {0x0349, 0x8F}, {0x034a, 0x04}, {0x034b, 0x47}, {0x034c, 0x07}, {0x034d, 0x90}, {0x034e, 0x04}, {0x034f, 0x48}, /*subsampling and fll*/ {0x0381, 0x01}, {0x0383, 0x01}, {0x0385, 0x01}, {0x0387, 0x01}, {0x0340, 0x04}, {0x0341, 0x5C}, {0x0202, 0x02}, {0x0203, 0x2e}, {0x0204, 0x00}, {0x0205, 0x20}, {0x3351, 0x02}, {0x3352, 0xDC}, {0x3353, 0x00}, {0x3354, 0x00}, {0x7339, 0x03}, /* [2]dphy_en1, [1]dphy_en0, [0] dhpy_en_clk */ #else {0x31D3, 0x01}, // efuse read en {0x3426, 0x3A}, // [4]corr_en, [3:2]gain_b_sel, [1:0]gain_r_sel {0x340D, 0x30}, // efuse clock off {0x3067, 0x25}, // adc_sat[mV]=617mV {0x307D, 0x08}, // dbr_tune_tgs {0x307E, 0x08}, // dbr_tune_rg {0x307F, 0x08}, // dbr_tune_fdb {0x3080, 0x04}, // dbr_tune_ntg {0x3073, 0x73}, // comp1_bias, comp2_bias {0x3074, 0x45}, // pix_bias, pix_bias_boost {0x3075, 0xD4}, // clp_lvl {0x3085, 0xF0}, // rdv_option; LOB_PLA enable {0x3068, 0x55}, // ms[15:8]; x4~ {0x3069, 0x00}, // ms[7:0]; x1~x4 {0x3063, 0x08}, // cds_option[15:8]; [11]ldb nmos sw enable=1 {0x3064, 0x00}, // cds_option[7:0]; {0x3010, 0x04}, // FD start 2->4 added by jay for low lux fluctuation {0x3247, 0x11}, // [4] fadlc_blst_en {0x3083, 0x00}, // blst_en_cintr = 16 {0x3084, 0x10}, {0x0306, 0x00}, //pll multiplier {0x0307, 0xb7}, {0x3351, 0x02}, {0x3352, 0xDC}, {0x3353, 0x00}, {0x3354, 0x00}, {0x7339, 0x03}, // [2]dphy_en1, [1]dphy_en0, [0] dhpy_en_clk {0x0202, 0x04}, //added by Jay coarse int time {0x0203, 0x5c}, //6D}, //1116 {0x0204, 0x00}, //added by Jay global gain /*indoor index: 33ms, x1.059*/ {0x0205, 0x22}, {0x0344, 0x00}, // x_addr_start M{0xB {0x0345, 0x00}, // x_addr_start L{0xB {0x0346, 0x00}, // y_addr_start M{0xB {0x0347, 0x02}, // y_addr_start L{0xB {0x0348, 0x07}, // x_addr_end MSB {0x0349, 0x8F}, // x_addr_end LSB {0x034a, 0x04}, // y_addr_end MSB {0x034b, 0x43}, // y_addr_end LSB {0x034c, 0x07}, // x_output_size MSB {0x034d, 0x90}, // x_output_size LSB {0x034e, 0x04}, // y_output_size MSB {0x034f, 0x42}, // y_output_size LSB #endif }; static struct msm_camera_i2c_reg_conf s5k6b2yx_pip_prev_snap_settings[] = { {0x31D3, 0x01}, // efuse read en {0x3426, 0x3A}, // [4]corr_en, [3:2]gain_b_sel, [1:0]gain_r_sel {0x340D, 0x30}, // efuse clock off {0x3067, 0x25}, // adc_sat[mV]=617mV {0x307D, 0x08}, // dbr_tune_tgs {0x307E, 0x08}, // dbr_tune_rg {0x307F, 0x08}, // dbr_tune_fdb {0x3080, 0x04}, // dbr_tune_ntg {0x3073, 0x73}, // comp1_bias, comp2_bias {0x3074, 0x45}, // pix_bias, pix_bias_boost {0x3075, 0xD4}, // clp_lvl {0x3085, 0xF0}, // rdv_option; LOB_PLA enable {0x3068, 0x55}, // ms[15:8]; x4~ {0x3069, 0x00}, // ms[7:0]; x1~x4 {0x3063, 0x08}, // cds_option[15:8]; [11]ldb nmos sw enable=1 {0x3064, 0x00}, // cds_option[7:0]; {0x3010, 0x04}, // FD start 2->4 added by jay for low lux fluctuation {0x3247, 0x11}, // [4] fadlc_blst_en {0x3083, 0x00}, // blst_en_cintr = 16 {0x3084, 0x10}, {0x0306, 0x00}, //pll multiplier {0x0307, 0x92}, {0x3351, 0x02}, {0x3352, 0x48}, {0x3353, 0x00}, {0x3354, 0x00}, {0x7339, 0x03}, // [2]dphy_en1, [1]dphy_en0, [0] dhpy_en_clk {0x0202, 0x03},//02}, //added by np coarse int time {0x0203, 0x88},//2E}, {0x0204, 0x00}, //added by np global gain /*indoor index: 33ms, x1.059*/ {0x0205, 0x2A}, //22},//20}, {0x0344, 0x00}, // x_addr_start M{0xB {0x0345, 0x00}, // x_addr_start L{0xB {0x0346, 0x00}, // y_addr_start M{0xB {0x0347, 0x02}, // y_addr_start L{0xB {0x0348, 0x07}, // x_addr_end MSB {0x0349, 0x8F}, // x_addr_end LSB {0x034a, 0x04}, // y_addr_end MSB {0x034b, 0x43}, // y_addr_end LSB {0x034c, 0x07}, // x_output_size MSB {0x034d, 0x90}, // x_output_size LSB {0x034e, 0x04}, // y_output_size MSB {0x034f, 0x42}, // y_output_size LSB }; static struct msm_camera_i2c_reg_conf s5k6b2yx_pip_prev_snap_settings_rev0[] = { {0x3067, 0x25}, // adc_sat[mV]=617mV {0x307D, 0x08}, // dbr_tune_tgs {0x307E, 0x08}, // dbr_tune_rg {0x307F, 0x08}, // dbr_tune_fdb {0x3080, 0x04}, // dbr_tune_ntg {0x3073, 0x73}, // comp1_bias, comp2_bias {0x3074, 0x45}, // pix_bias, pix_bias_boost {0x3075, 0xD4}, // clp_lvl {0x3085, 0xF0}, // rdv_option; LOB_PLA enable {0x3068, 0x55}, // ms[15:8]; x4~ {0x3069, 0x00}, // ms[7:0]; x1~x4 {0x3063, 0x08}, // cds_option[15:8]; [11]ldb nmos sw enable=1 {0x3064, 0x00}, // cds_option[7:0]; {0x3010, 0x04}, // FD start 2->4 added by jay for low lux fluctuation {0x3247, 0x11}, // [4] fadlc_blst_en {0x3083, 0x00}, // blst_en_cintr = 16 {0x3084, 0x10}, {0x0306, 0x00}, //pll multiplier {0x0307, 0x92}, {0x3351, 0x02}, {0x3352, 0x48}, {0x3353, 0x00}, {0x3354, 0x00}, {0x7339, 0x03}, // [2]dphy_en1, [1]dphy_en0, [0] dhpy_en_clk {0x0202, 0x03},//02}, //added by np coarse int time {0x0203, 0x88},//2E}, {0x0204, 0x00}, //added by np global gain /*indoor index: 33ms, x1.059*/ {0x0205, 0x2A}, //22},//20}, {0x0344, 0x00}, // x_addr_start M{0xB {0x0345, 0x00}, // x_addr_start L{0xB {0x0346, 0x00}, // y_addr_start M{0xB {0x0347, 0x02}, // y_addr_start L{0xB {0x0348, 0x07}, // x_addr_end MSB {0x0349, 0x8F}, // x_addr_end LSB {0x034a, 0x04}, // y_addr_end MSB {0x034b, 0x43}, // y_addr_end LSB {0x034c, 0x07}, // x_output_size MSB {0x034d, 0x90}, // x_output_size LSB {0x034e, 0x04}, // y_output_size MSB {0x034f, 0x42}, // y_output_size LSB }; static struct msm_camera_i2c_reg_conf s5k6b2yx_prev_snap_settings_rev0[] = { //JAY add for rev 1.0 sensor {0x3067, 0x25}, // adc_sat[mV]=617mV {0x307D, 0x08}, // dbr_tune_tgsl {0x307E, 0x08}, // dbr_tune_rg {0x307F, 0x08}, // dbr_tune_fdb {0x3080, 0x04}, // dbr_tune_ntg {0x3073, 0x73}, // comp1_bias, comp2_bias {0x3074, 0x45}, // pix_bias, pix_bias_boost {0x3075, 0xD4}, // clp_lvl {0x3085, 0xF0}, // rdv_option; LOB_PLA enable {0x3068, 0x55}, // ms[15:8]; x4~ {0x3069, 0x00}, // ms[7:0]; x1~x4 {0x3063, 0x08}, // cd{0x_option[15:8]; [11]ldb nmos sw enable=1 {0x3064, 0x00}, // cds_option[7:0]; {0x3010, 0x04}, // FD start 2->4 added by jay for low lux fluctuation {0x3247, 0x11}, // [4] fadlc_blst_en {0x3083, 0x00}, // blst_en_cintr = 16 {0x3084, 0x10}, {0x0306, 0x00}, // pll multiplier {0x0307, 0xb7}, {0x3351, 0x02}, {0x3352, 0xDC}, {0x3353, 0x00}, {0x3354, 0x00}, {0x7339, 0x03}, // [2]dphy_en1, [1]dphy_en0, [0] dhpy_en_clk {0x0202, 0x04}, //added by Jay coarse int time {0x0203, 0x5c}, //6D}, //1116 {0x0204, 0x00}, //added by Jay global gain /*indoor index: 33ms, x1.059*/ {0x0205, 0x22}, {0x0344, 0x00}, // x_addr_start MSB {0x0345, 0x00}, // x_addr_start LSB {0x0346, 0x00}, // y_addr_start MSB {0x0347, 0x02}, // y_addr_start LSB {0x0348, 0x07}, // x_addr_end MSB {0x0349, 0x8F}, // x_addr_end LSB {0x034a, 0x04}, // y_addr_end MSB {0x034b, 0x43}, // y_addr_end LSB {0x034c, 0x07}, // x_output_size MSB {0x034d, 0x90}, // x_output_size LSB {0x034e, 0x04}, // y_output_size MSB {0x034f, 0x42}, // y_output_size LSB }; static struct msm_camera_i2c_reg_conf s5k6b2yx_start_settings[] = { {0x0100, 0x01}, }; static struct msm_camera_i2c_reg_conf s5k6b2yx_stop_settings[] = { {0x0100, 0x00}, }; static struct msm_camera_i2c_reg_conf s5k6b2yx_start_settings_vision[] = { {0x4100, 0x01}, }; static struct msm_camera_i2c_reg_conf s5k6b2yx_stop_settings_vision[] = { {0x4100, 0x00}, }; static struct msm_camera_i2c_reg_conf s5k6b2yx_groupon_settings[] = { {0x104, 0x01}, }; static struct msm_camera_i2c_reg_conf s5k6b2yx_groupoff_settings[] = { {0x104, 0x00}, }; static struct v4l2_subdev_info s5k6b2yx_subdev_info[] = { { .code = V4L2_MBUS_FMT_SBGGR10_1X10, .colorspace = V4L2_COLORSPACE_JPEG, .fmt = 1, .order = 0, }, /* more can be supported, to be added later */ }; static struct msm_camera_i2c_conf_array s5k6b2yx_confs[] = { {&s5k6b2yx_prev_snap_settings[0], ARRAY_SIZE(s5k6b2yx_prev_snap_settings), 0, MSM_CAMERA_I2C_BYTE_DATA}, {&s5k6b2yx_vision_settings[0], ARRAY_SIZE(s5k6b2yx_vision_settings), 0, MSM_CAMERA_I2C_BYTE_DATA}, {&s5k6b2yx_pip_prev_snap_settings[0], //PIP 24 FPS setting for > 1.0 ARRAY_SIZE(s5k6b2yx_pip_prev_snap_settings), 0, MSM_CAMERA_I2C_BYTE_DATA}, {&s5k6b2yx_prev_snap_settings_rev0[0], //JAY add for rev 1.0 ARRAY_SIZE(s5k6b2yx_prev_snap_settings_rev0), 0, MSM_CAMERA_I2C_BYTE_DATA}, {&s5k6b2yx_pip_prev_snap_settings_rev0[0], //PIP 24 FPS setting for rev 1.0 ARRAY_SIZE(s5k6b2yx_pip_prev_snap_settings_rev0), 0, MSM_CAMERA_I2C_BYTE_DATA}, }; static struct msm_sensor_output_info_t s5k6b2yx_dimensions[] = { { #if 0 //CHANGED BY jay because of changing sensor vendor recommendation .x_output = 0x790,/*1936*/ .y_output = 0x448,/*1096*/ .line_length_pclk = 0x868, .frame_length_lines = 0x45C, .vt_pixel_clk = 71984400, .op_pixel_clk = 91500000, .binning_factor = 1, #else .x_output = 0x790,/*1936*/ .y_output = 0x442,/*1090*/ .line_length_pclk = 0x868, .frame_length_lines = 0x45C, .vt_pixel_clk = 73200000, .op_pixel_clk = 73200000, .binning_factor = 1, #endif }, /*176x104 vision*/ { .x_output = 176, .y_output = 104, .line_length_pclk = 200, /* arbitrary values */ .frame_length_lines = 120, /* currently not used */ .vt_pixel_clk = 1500000, .op_pixel_clk = 1500000, .binning_factor = 1, }, /*PIP setting*/ { .x_output = 0x790,/*1936*/ .y_output = 0x442,/*1090*/ .line_length_pclk = 0x868, .frame_length_lines = 0x45C, .vt_pixel_clk = 58400000, .op_pixel_clk = 58400000, .binning_factor = 1, }, }; static struct msm_sensor_output_reg_addr_t s5k6b2yx_reg_addr = { .x_output = 0x034c, .y_output = 0x034e, .line_length_pclk = 0x0342, .frame_length_lines = 0x0340, }; static struct msm_sensor_id_info_t s5k6b2yx_id_info = { .sensor_id_reg_addr = 0x0000, .sensor_id = 0x6B20, }; static struct msm_sensor_exp_gain_info_t s5k6b2yx_exp_gain_info = { .coarse_int_time_addr = 0x0202, .global_gain_addr = 0x0204, .vert_offset = 4, }; static const struct i2c_device_id s5k6b2yx_i2c_id[] = { {SENSOR_NAME, (kernel_ulong_t)&s5k6b2yx_s_ctrl}, { } }; static struct i2c_driver s5k6b2yx_i2c_driver = { .id_table = s5k6b2yx_i2c_id, .probe = msm_sensor_i2c_probe, .driver = { .name = SENSOR_NAME, }, }; static struct msm_camera_i2c_client s5k6b2yx_sensor_i2c_client = { .addr_type = MSM_CAMERA_I2C_WORD_ADDR, }; static enum msm_camera_vreg_name_t s5k6b2yx_veg_seq[] = { CAM_VANA, CAM_VDIG, CAM_VIO, }; static struct msm_cam_clk_info cam_clk_info[] = { {"cam_clk", MSM_SENSOR_MCLK_24HZ}, }; static int s5k6b2yx_sensor_power_up(struct msm_sensor_ctrl_t *s_ctrl) { int rc = 0; /* int err; u32 int_factor; int temp = 0; */ struct msm_camera_sensor_info *data = s_ctrl->sensordata; CAM_DEBUG("E"); CAM_DEBUG("s5k6b2yx_sensor_power_up(1) : i2c_scl: %d, i2c_sda: %d\n", gpio_get_value(85), gpio_get_value(84)); rc = msm_camera_request_gpio_table(data, 1); if (rc < 0) pr_err("%s: request gpio failed\n", __func__); CAM_DEBUG("s5k6b2yx_sensor_power_up(2) : i2c_scl: %d, i2c_sda: %d\n", gpio_get_value(85), gpio_get_value(84)); /* Power on */ data->sensor_platform_info->sensor_power_on(); if (data->sensor_platform_info->i2c_conf && data->sensor_platform_info->i2c_conf->use_i2c_mux) msm_sensor_enable_i2c_mux(data->sensor_platform_info->i2c_conf); usleep(1200); CAM_DEBUG("s5k6b2yx_sensor_power_up(3) : i2c_scl: %d, i2c_sda: %d\n", gpio_get_value(85), gpio_get_value(84)); /* VT_CAM_RESET */ data->sensor_platform_info-> sensor_pmic_gpio_ctrl(data->sensor_platform_info->reset, 1); usleep(50); /* MCLK */ if (s_ctrl->clk_rate != 0) cam_clk_info->clk_rate = s_ctrl->clk_rate; rc = msm_cam_clk_enable(&s_ctrl->sensor_i2c_client->client->dev, cam_clk_info, s_ctrl->cam_clk, ARRAY_SIZE(cam_clk_info), 1); if (rc < 0) pr_err("%s: clk enable failed\n", __func__); CAM_DEBUG("s5k6b2yx_sensor_power_up(4) : i2c_scl: %d, i2c_sda: %d\n", gpio_get_value(85), gpio_get_value(84)); usleep(5000); CAM_DEBUG("X"); return rc; } static int s5k6b2yx_sensor_power_down(struct msm_sensor_ctrl_t *s_ctrl) { int rc = 0; struct msm_camera_sensor_info *data = s_ctrl->sensordata; CAM_DEBUG("E"); if (data->sensor_platform_info->i2c_conf && data->sensor_platform_info->i2c_conf->use_i2c_mux) msm_sensor_disable_i2c_mux( data->sensor_platform_info->i2c_conf); /* MCLK */ rc = msm_cam_clk_enable(&s_ctrl->sensor_i2c_client->client->dev, cam_clk_info, s_ctrl->cam_clk, ARRAY_SIZE(cam_clk_info), 0); /* VT_CAM_RESET */ data->sensor_platform_info-> sensor_pmic_gpio_ctrl(data->sensor_platform_info->reset, 0); /* STBY */ data->sensor_platform_info-> sensor_pmic_gpio_ctrl(data->sensor_platform_info->stby, 0); /* Power off */ data->sensor_platform_info->sensor_power_off(); msm_camera_request_gpio_table(data, 0); s_ctrl->vision_mode_flag=0; CAM_DEBUG("X"); return rc; } /* Switch to low power vision mode */ static int s5k6b2yx_sensor_set_streaming_mode( struct msm_sensor_ctrl_t *s_ctrl, int32_t vision_mode_enable) { int rc = 0; struct msm_camera_sensor_info *data = s_ctrl->sensordata; CAM_DEBUG("stop streaming"); s_ctrl->func_tbl->sensor_stop_stream(s_ctrl); CAM_DEBUG("vision_mode_enable=%d: E", vision_mode_enable); if(vision_mode_enable) { /*switch from normal/dual to vision mode */ CAM_DEBUG("set X_SHUTDOWN pin to low"); data->sensor_platform_info-> sensor_pmic_gpio_ctrl(data->sensor_platform_info->reset, 0); usleep(1100); CAM_DEBUG("set VIS_STBY pin to high"); data->sensor_platform_info-> sensor_pmic_gpio_ctrl(data->sensor_platform_info->stby, 1); CAM_DEBUG("change stream config arrays"); s_ctrl->msm_sensor_reg->start_stream_conf = s5k6b2yx_start_settings_vision; s_ctrl->msm_sensor_reg->start_stream_conf_size = ARRAY_SIZE(s5k6b2yx_start_settings_vision); s_ctrl->msm_sensor_reg->stop_stream_conf = s5k6b2yx_stop_settings_vision; s_ctrl->msm_sensor_reg->stop_stream_conf_size = ARRAY_SIZE(s5k6b2yx_stop_settings_vision); s_ctrl->vision_mode_flag = 1; /*set FPS based on flag set from user space driver*/ if (vision_mode_enable == VISION_MODE_SET_FPS_5) msm_camera_i2c_write(s_ctrl->sensor_i2c_client, VISION_MODE_SET_FPS_ADDR, VISION_MODE_FPS_5_VAL, MSM_CAMERA_I2C_BYTE_DATA); else if (vision_mode_enable == VISION_MODE_SET_FPS_10) msm_camera_i2c_write(s_ctrl->sensor_i2c_client, VISION_MODE_SET_FPS_ADDR, VISION_MODE_FPS_10_VAL, MSM_CAMERA_I2C_BYTE_DATA); } else { /*switch from vision to normal/dual mode */ CAM_DEBUG("set VIS_STBY pin to low"); data->sensor_platform_info-> sensor_pmic_gpio_ctrl(data->sensor_platform_info->stby, 0); usleep(1100); CAM_DEBUG("set X_SHUTDOWN pin to high"); data->sensor_platform_info-> sensor_pmic_gpio_ctrl(data->sensor_platform_info->reset, 1); CAM_DEBUG("change stream config arrays"); s_ctrl->msm_sensor_reg->start_stream_conf = s5k6b2yx_start_settings; s_ctrl->msm_sensor_reg->start_stream_conf_size = ARRAY_SIZE(s5k6b2yx_start_settings); s_ctrl->msm_sensor_reg->stop_stream_conf = s5k6b2yx_stop_settings; s_ctrl->msm_sensor_reg->stop_stream_conf_size = ARRAY_SIZE(s5k6b2yx_stop_settings); s_ctrl->vision_mode_flag = 0; } CAM_DEBUG("rc=%d : X", rc); return rc; } /* * Change normal/backlight AEC for vision mode * aec_mode: * 0 = normal * 1 = backlight */ int s5k6b2yx_sensor_set_vision_ae_control( struct msm_sensor_ctrl_t *s_ctrl, int ae_mode) { if(s_ctrl->vision_mode_flag == 0) { cam_err("Error: sensor not in vision mode, cannot set AE."); return -1; } if(ae_mode == 0) { msm_camera_i2c_write(s_ctrl->sensor_i2c_client, VISION_MODE_AE_REG_ADDR, VISION_MODE_AE_NORMAL, MSM_CAMERA_I2C_BYTE_DATA); CAM_DEBUG("normal mode AEC set"); } else { msm_camera_i2c_write(s_ctrl->sensor_i2c_client, VISION_MODE_AE_REG_ADDR, VISION_MODE_AE_BACKLIGHT, MSM_CAMERA_I2C_BYTE_DATA); CAM_DEBUG("backlight mode AEC set"); } return 0; } static ssize_t s5k6b2yx_camera_type_show(struct device *dev, struct device_attribute *attr, char *buf) { return sprintf(buf, "%s\n", "S5K6B2YX"); } static ssize_t s5k6b2yx_camera_fw_show(struct device *dev, struct device_attribute *attr, char *buf) { return sprintf(buf, "%s %s\n", "S5K6B2YX", "S5K6B2YX"); } static DEVICE_ATTR(front_camtype, S_IRUGO, s5k6b2yx_camera_type_show, NULL); static DEVICE_ATTR(front_camfw, S_IRUGO, s5k6b2yx_camera_fw_show, NULL); static int __init s5k6b2yx_sensor_init_module(void) { struct device *cam_dev_front = NULL; cam_dev_front = device_create(camera_class, NULL, 0, NULL, "front"); if (IS_ERR(cam_dev_front)) { cam_err("failed to create device cam_dev_front!\n"); return 0; } if (device_create_file (cam_dev_front, &dev_attr_front_camtype) < 0) { cam_err("failed to create device file, %s\n", dev_attr_front_camtype.attr.name); } if (device_create_file (cam_dev_front, &dev_attr_front_camfw) < 0) { cam_err("failed to create device file, %s\n", dev_attr_front_camfw.attr.name); } return i2c_add_driver(&s5k6b2yx_i2c_driver); } static struct v4l2_subdev_core_ops s5k6b2yx_subdev_core_ops = { .ioctl = msm_sensor_subdev_ioctl, .s_power = msm_sensor_power, }; static struct v4l2_subdev_video_ops s5k6b2yx_subdev_video_ops = { .enum_mbus_fmt = msm_sensor_v4l2_enum_fmt, }; static struct v4l2_subdev_ops s5k6b2yx_subdev_ops = { .core = &s5k6b2yx_subdev_core_ops, .video = &s5k6b2yx_subdev_video_ops, }; static struct msm_sensor_fn_t s5k6b2yx_func_tbl = { .sensor_start_stream = msm_sensor_start_stream, .sensor_stop_stream = msm_sensor_stop_stream, .sensor_group_hold_on = msm_sensor_group_hold_on, .sensor_group_hold_off = msm_sensor_group_hold_off, .sensor_set_fps = msm_sensor_set_fps, .sensor_write_exp_gain = msm_sensor_write_exp_gain1, .sensor_write_snapshot_exp_gain = msm_sensor_write_exp_gain1, .sensor_setting = msm_sensor_setting, .sensor_set_sensor_mode = msm_sensor_set_sensor_mode, .sensor_mode_init = msm_sensor_mode_init, .sensor_get_output_info = msm_sensor_get_output_info, .sensor_config = msm_sensor_config, .sensor_power_up = s5k6b2yx_sensor_power_up, .sensor_power_down = s5k6b2yx_sensor_power_down, .sensor_adjust_frame_lines = msm_sensor_adjust_frame_lines1, .sensor_get_csi_params = msm_sensor_get_csi_params, .sensor_set_streaming_mode = s5k6b2yx_sensor_set_streaming_mode, .sensor_set_vision_ae_control = s5k6b2yx_sensor_set_vision_ae_control, }; static struct msm_sensor_reg_t s5k6b2yx_regs = { .default_data_type = MSM_CAMERA_I2C_BYTE_DATA, .start_stream_conf = s5k6b2yx_start_settings, .start_stream_conf_size = ARRAY_SIZE(s5k6b2yx_start_settings), .stop_stream_conf = s5k6b2yx_stop_settings, .stop_stream_conf_size = ARRAY_SIZE(s5k6b2yx_stop_settings), .group_hold_on_conf = s5k6b2yx_groupon_settings, .group_hold_on_conf_size = ARRAY_SIZE(s5k6b2yx_groupon_settings), .group_hold_off_conf = s5k6b2yx_groupoff_settings, .group_hold_off_conf_size = ARRAY_SIZE(s5k6b2yx_groupoff_settings), /*init settings clubbed with prev-snap settings for normal power mode * because sensor needs to load two settings depending on mode */ .init_settings = NULL, .init_size = 0, .mode_settings = &s5k6b2yx_confs[0], .output_settings = &s5k6b2yx_dimensions[0], .num_conf = ARRAY_SIZE(s5k6b2yx_confs), }; static struct msm_sensor_ctrl_t s5k6b2yx_s_ctrl = { .msm_sensor_reg = &s5k6b2yx_regs, .sensor_i2c_client = &s5k6b2yx_sensor_i2c_client, .sensor_i2c_addr = 0x6A, .vreg_seq = s5k6b2yx_veg_seq, .num_vreg_seq = ARRAY_SIZE(s5k6b2yx_veg_seq), .sensor_output_reg_addr = &s5k6b2yx_reg_addr, .sensor_id_info = &s5k6b2yx_id_info, .sensor_exp_gain_info = &s5k6b2yx_exp_gain_info, .cam_mode = MSM_SENSOR_MODE_INVALID, .msm_sensor_mutex = &s5k6b2yx_mut, .sensor_i2c_driver = &s5k6b2yx_i2c_driver, .sensor_v4l2_subdev_info = s5k6b2yx_subdev_info, .sensor_v4l2_subdev_info_size = ARRAY_SIZE(s5k6b2yx_subdev_info), .sensor_v4l2_subdev_ops = &s5k6b2yx_subdev_ops, .func_tbl = &s5k6b2yx_func_tbl, .clk_rate = MSM_SENSOR_MCLK_24HZ, .vision_mode_flag = 0, }; module_init(s5k6b2yx_sensor_init_module); MODULE_DESCRIPTION("Samsung 2MP Bayer sensor driver"); MODULE_LICENSE("GPL v2");
gpl-2.0
iconia-dev/android_kernel_acer_t20-common
net/netfilter/ipset/ip_set_hash_netport.c
151
14137
/* Copyright (C) 2003-2011 Jozsef Kadlecsik <kadlec@blackhole.kfki.hu> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ /* Kernel module implementing an IP set type: the hash:net,port type */ #include <linux/jhash.h> #include <linux/module.h> #include <linux/ip.h> #include <linux/skbuff.h> #include <linux/errno.h> #include <linux/random.h> #include <net/ip.h> #include <net/ipv6.h> #include <net/netlink.h> #include <linux/netfilter.h> #include <linux/netfilter/ipset/pfxlen.h> #include <linux/netfilter/ipset/ip_set.h> #include <linux/netfilter/ipset/ip_set_timeout.h> #include <linux/netfilter/ipset/ip_set_getport.h> #include <linux/netfilter/ipset/ip_set_hash.h> MODULE_LICENSE("GPL"); MODULE_AUTHOR("Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>"); MODULE_DESCRIPTION("hash:net,port type of IP sets"); MODULE_ALIAS("ip_set_hash:net,port"); /* Type specific function prefix */ #define TYPE hash_netport static bool hash_netport_same_set(const struct ip_set *a, const struct ip_set *b); #define hash_netport4_same_set hash_netport_same_set #define hash_netport6_same_set hash_netport_same_set /* The type variant functions: IPv4 */ /* Member elements without timeout */ struct hash_netport4_elem { __be32 ip; __be16 port; u8 proto; u8 cidr; }; /* Member elements with timeout support */ struct hash_netport4_telem { __be32 ip; __be16 port; u8 proto; u8 cidr; unsigned long timeout; }; static inline bool hash_netport4_data_equal(const struct hash_netport4_elem *ip1, const struct hash_netport4_elem *ip2) { return ip1->ip == ip2->ip && ip1->port == ip2->port && ip1->proto == ip2->proto && ip1->cidr == ip2->cidr; } static inline bool hash_netport4_data_isnull(const struct hash_netport4_elem *elem) { return elem->proto == 0; } static inline void hash_netport4_data_copy(struct hash_netport4_elem *dst, const struct hash_netport4_elem *src) { dst->ip = src->ip; dst->port = src->port; dst->proto = src->proto; dst->cidr = src->cidr; } static inline void hash_netport4_data_netmask(struct hash_netport4_elem *elem, u8 cidr) { elem->ip &= ip_set_netmask(cidr); elem->cidr = cidr; } static inline void hash_netport4_data_zero_out(struct hash_netport4_elem *elem) { elem->proto = 0; } static bool hash_netport4_data_list(struct sk_buff *skb, const struct hash_netport4_elem *data) { NLA_PUT_IPADDR4(skb, IPSET_ATTR_IP, data->ip); NLA_PUT_NET16(skb, IPSET_ATTR_PORT, data->port); NLA_PUT_U8(skb, IPSET_ATTR_CIDR, data->cidr); NLA_PUT_U8(skb, IPSET_ATTR_PROTO, data->proto); return 0; nla_put_failure: return 1; } static bool hash_netport4_data_tlist(struct sk_buff *skb, const struct hash_netport4_elem *data) { const struct hash_netport4_telem *tdata = (const struct hash_netport4_telem *)data; NLA_PUT_IPADDR4(skb, IPSET_ATTR_IP, tdata->ip); NLA_PUT_NET16(skb, IPSET_ATTR_PORT, tdata->port); NLA_PUT_U8(skb, IPSET_ATTR_CIDR, data->cidr); NLA_PUT_U8(skb, IPSET_ATTR_PROTO, data->proto); NLA_PUT_NET32(skb, IPSET_ATTR_TIMEOUT, htonl(ip_set_timeout_get(tdata->timeout))); return 0; nla_put_failure: return 1; } #define IP_SET_HASH_WITH_PROTO #define IP_SET_HASH_WITH_NETS #define PF 4 #define HOST_MASK 32 #include <linux/netfilter/ipset/ip_set_ahash.h> static int hash_netport4_kadt(struct ip_set *set, const struct sk_buff *skb, enum ipset_adt adt, u8 pf, u8 dim, u8 flags) { const struct ip_set_hash *h = set->data; ipset_adtfn adtfn = set->variant->adt[adt]; struct hash_netport4_elem data = { .cidr = h->nets[0].cidr || HOST_MASK }; if (data.cidr == 0) return -EINVAL; if (adt == IPSET_TEST) data.cidr = HOST_MASK; if (!ip_set_get_ip4_port(skb, flags & IPSET_DIM_TWO_SRC, &data.port, &data.proto)) return -EINVAL; ip4addrptr(skb, flags & IPSET_DIM_ONE_SRC, &data.ip); data.ip &= ip_set_netmask(data.cidr); return adtfn(set, &data, h->timeout); } static int hash_netport4_uadt(struct ip_set *set, struct nlattr *tb[], enum ipset_adt adt, u32 *lineno, u32 flags) { const struct ip_set_hash *h = set->data; ipset_adtfn adtfn = set->variant->adt[adt]; struct hash_netport4_elem data = { .cidr = HOST_MASK }; u32 port, port_to; u32 timeout = h->timeout; bool with_ports = false; int ret; if (unlikely(!tb[IPSET_ATTR_IP] || !ip_set_attr_netorder(tb, IPSET_ATTR_PORT) || !ip_set_optattr_netorder(tb, IPSET_ATTR_PORT_TO) || !ip_set_optattr_netorder(tb, IPSET_ATTR_TIMEOUT))) return -IPSET_ERR_PROTOCOL; if (tb[IPSET_ATTR_LINENO]) *lineno = nla_get_u32(tb[IPSET_ATTR_LINENO]); ret = ip_set_get_ipaddr4(tb[IPSET_ATTR_IP], &data.ip); if (ret) return ret; if (tb[IPSET_ATTR_CIDR]) data.cidr = nla_get_u8(tb[IPSET_ATTR_CIDR]); if (!data.cidr) return -IPSET_ERR_INVALID_CIDR; data.ip &= ip_set_netmask(data.cidr); if (tb[IPSET_ATTR_PORT]) data.port = nla_get_be16(tb[IPSET_ATTR_PORT]); else return -IPSET_ERR_PROTOCOL; if (tb[IPSET_ATTR_PROTO]) { data.proto = nla_get_u8(tb[IPSET_ATTR_PROTO]); with_ports = ip_set_proto_with_ports(data.proto); if (data.proto == 0) return -IPSET_ERR_INVALID_PROTO; } else return -IPSET_ERR_MISSING_PROTO; if (!(with_ports || data.proto == IPPROTO_ICMP)) data.port = 0; if (tb[IPSET_ATTR_TIMEOUT]) { if (!with_timeout(h->timeout)) return -IPSET_ERR_TIMEOUT; timeout = ip_set_timeout_uget(tb[IPSET_ATTR_TIMEOUT]); } if (adt == IPSET_TEST || !with_ports || !tb[IPSET_ATTR_PORT_TO]) { ret = adtfn(set, &data, timeout); return ip_set_eexist(ret, flags) ? 0 : ret; } port = ntohs(data.port); port_to = ip_set_get_h16(tb[IPSET_ATTR_PORT_TO]); if (port > port_to) swap(port, port_to); for (; port <= port_to; port++) { data.port = htons(port); ret = adtfn(set, &data, timeout); if (ret && !ip_set_eexist(ret, flags)) return ret; else ret = 0; } return ret; } static bool hash_netport_same_set(const struct ip_set *a, const struct ip_set *b) { const struct ip_set_hash *x = a->data; const struct ip_set_hash *y = b->data; /* Resizing changes htable_bits, so we ignore it */ return x->maxelem == y->maxelem && x->timeout == y->timeout; } /* The type variant functions: IPv6 */ struct hash_netport6_elem { union nf_inet_addr ip; __be16 port; u8 proto; u8 cidr; }; struct hash_netport6_telem { union nf_inet_addr ip; __be16 port; u8 proto; u8 cidr; unsigned long timeout; }; static inline bool hash_netport6_data_equal(const struct hash_netport6_elem *ip1, const struct hash_netport6_elem *ip2) { return ipv6_addr_cmp(&ip1->ip.in6, &ip2->ip.in6) == 0 && ip1->port == ip2->port && ip1->proto == ip2->proto && ip1->cidr == ip2->cidr; } static inline bool hash_netport6_data_isnull(const struct hash_netport6_elem *elem) { return elem->proto == 0; } static inline void hash_netport6_data_copy(struct hash_netport6_elem *dst, const struct hash_netport6_elem *src) { memcpy(dst, src, sizeof(*dst)); } static inline void hash_netport6_data_zero_out(struct hash_netport6_elem *elem) { elem->proto = 0; } static inline void ip6_netmask(union nf_inet_addr *ip, u8 prefix) { ip->ip6[0] &= ip_set_netmask6(prefix)[0]; ip->ip6[1] &= ip_set_netmask6(prefix)[1]; ip->ip6[2] &= ip_set_netmask6(prefix)[2]; ip->ip6[3] &= ip_set_netmask6(prefix)[3]; } static inline void hash_netport6_data_netmask(struct hash_netport6_elem *elem, u8 cidr) { ip6_netmask(&elem->ip, cidr); elem->cidr = cidr; } static bool hash_netport6_data_list(struct sk_buff *skb, const struct hash_netport6_elem *data) { NLA_PUT_IPADDR6(skb, IPSET_ATTR_IP, &data->ip); NLA_PUT_NET16(skb, IPSET_ATTR_PORT, data->port); NLA_PUT_U8(skb, IPSET_ATTR_CIDR, data->cidr); NLA_PUT_U8(skb, IPSET_ATTR_PROTO, data->proto); return 0; nla_put_failure: return 1; } static bool hash_netport6_data_tlist(struct sk_buff *skb, const struct hash_netport6_elem *data) { const struct hash_netport6_telem *e = (const struct hash_netport6_telem *)data; NLA_PUT_IPADDR6(skb, IPSET_ATTR_IP, &e->ip); NLA_PUT_NET16(skb, IPSET_ATTR_PORT, data->port); NLA_PUT_U8(skb, IPSET_ATTR_CIDR, data->cidr); NLA_PUT_U8(skb, IPSET_ATTR_PROTO, data->proto); NLA_PUT_NET32(skb, IPSET_ATTR_TIMEOUT, htonl(ip_set_timeout_get(e->timeout))); return 0; nla_put_failure: return 1; } #undef PF #undef HOST_MASK #define PF 6 #define HOST_MASK 128 #include <linux/netfilter/ipset/ip_set_ahash.h> static int hash_netport6_kadt(struct ip_set *set, const struct sk_buff *skb, enum ipset_adt adt, u8 pf, u8 dim, u8 flags) { const struct ip_set_hash *h = set->data; ipset_adtfn adtfn = set->variant->adt[adt]; struct hash_netport6_elem data = { .cidr = h->nets[0].cidr || HOST_MASK }; if (data.cidr == 0) return -EINVAL; if (adt == IPSET_TEST) data.cidr = HOST_MASK; if (!ip_set_get_ip6_port(skb, flags & IPSET_DIM_TWO_SRC, &data.port, &data.proto)) return -EINVAL; ip6addrptr(skb, flags & IPSET_DIM_ONE_SRC, &data.ip.in6); ip6_netmask(&data.ip, data.cidr); return adtfn(set, &data, h->timeout); } static int hash_netport6_uadt(struct ip_set *set, struct nlattr *tb[], enum ipset_adt adt, u32 *lineno, u32 flags) { const struct ip_set_hash *h = set->data; ipset_adtfn adtfn = set->variant->adt[adt]; struct hash_netport6_elem data = { .cidr = HOST_MASK }; u32 port, port_to; u32 timeout = h->timeout; bool with_ports = false; int ret; if (unlikely(!tb[IPSET_ATTR_IP] || !ip_set_attr_netorder(tb, IPSET_ATTR_PORT) || !ip_set_optattr_netorder(tb, IPSET_ATTR_PORT_TO) || !ip_set_optattr_netorder(tb, IPSET_ATTR_TIMEOUT))) return -IPSET_ERR_PROTOCOL; if (tb[IPSET_ATTR_LINENO]) *lineno = nla_get_u32(tb[IPSET_ATTR_LINENO]); ret = ip_set_get_ipaddr6(tb[IPSET_ATTR_IP], &data.ip); if (ret) return ret; if (tb[IPSET_ATTR_CIDR]) data.cidr = nla_get_u8(tb[IPSET_ATTR_CIDR]); if (!data.cidr) return -IPSET_ERR_INVALID_CIDR; ip6_netmask(&data.ip, data.cidr); if (tb[IPSET_ATTR_PORT]) data.port = nla_get_be16(tb[IPSET_ATTR_PORT]); else return -IPSET_ERR_PROTOCOL; if (tb[IPSET_ATTR_PROTO]) { data.proto = nla_get_u8(tb[IPSET_ATTR_PROTO]); with_ports = ip_set_proto_with_ports(data.proto); if (data.proto == 0) return -IPSET_ERR_INVALID_PROTO; } else return -IPSET_ERR_MISSING_PROTO; if (!(with_ports || data.proto == IPPROTO_ICMPV6)) data.port = 0; if (tb[IPSET_ATTR_TIMEOUT]) { if (!with_timeout(h->timeout)) return -IPSET_ERR_TIMEOUT; timeout = ip_set_timeout_uget(tb[IPSET_ATTR_TIMEOUT]); } if (adt == IPSET_TEST || !with_ports || !tb[IPSET_ATTR_PORT_TO]) { ret = adtfn(set, &data, timeout); return ip_set_eexist(ret, flags) ? 0 : ret; } port = ntohs(data.port); port_to = ip_set_get_h16(tb[IPSET_ATTR_PORT_TO]); if (port > port_to) swap(port, port_to); for (; port <= port_to; port++) { data.port = htons(port); ret = adtfn(set, &data, timeout); if (ret && !ip_set_eexist(ret, flags)) return ret; else ret = 0; } return ret; } /* Create hash:ip type of sets */ static int hash_netport_create(struct ip_set *set, struct nlattr *tb[], u32 flags) { struct ip_set_hash *h; u32 hashsize = IPSET_DEFAULT_HASHSIZE, maxelem = IPSET_DEFAULT_MAXELEM; u8 hbits; if (!(set->family == AF_INET || set->family == AF_INET6)) return -IPSET_ERR_INVALID_FAMILY; if (unlikely(!ip_set_optattr_netorder(tb, IPSET_ATTR_HASHSIZE) || !ip_set_optattr_netorder(tb, IPSET_ATTR_MAXELEM) || !ip_set_optattr_netorder(tb, IPSET_ATTR_TIMEOUT))) return -IPSET_ERR_PROTOCOL; if (tb[IPSET_ATTR_HASHSIZE]) { hashsize = ip_set_get_h32(tb[IPSET_ATTR_HASHSIZE]); if (hashsize < IPSET_MIMINAL_HASHSIZE) hashsize = IPSET_MIMINAL_HASHSIZE; } if (tb[IPSET_ATTR_MAXELEM]) maxelem = ip_set_get_h32(tb[IPSET_ATTR_MAXELEM]); h = kzalloc(sizeof(*h) + sizeof(struct ip_set_hash_nets) * (set->family == AF_INET ? 32 : 128), GFP_KERNEL); if (!h) return -ENOMEM; h->maxelem = maxelem; get_random_bytes(&h->initval, sizeof(h->initval)); h->timeout = IPSET_NO_TIMEOUT; hbits = htable_bits(hashsize); h->table = ip_set_alloc( sizeof(struct htable) + jhash_size(hbits) * sizeof(struct hbucket)); if (!h->table) { kfree(h); return -ENOMEM; } h->table->htable_bits = hbits; set->data = h; if (tb[IPSET_ATTR_TIMEOUT]) { h->timeout = ip_set_timeout_uget(tb[IPSET_ATTR_TIMEOUT]); set->variant = set->family == AF_INET ? &hash_netport4_tvariant : &hash_netport6_tvariant; if (set->family == AF_INET) hash_netport4_gc_init(set); else hash_netport6_gc_init(set); } else { set->variant = set->family == AF_INET ? &hash_netport4_variant : &hash_netport6_variant; } pr_debug("create %s hashsize %u (%u) maxelem %u: %p(%p)\n", set->name, jhash_size(h->table->htable_bits), h->table->htable_bits, h->maxelem, set->data, h->table); return 0; } static struct ip_set_type hash_netport_type __read_mostly = { .name = "hash:net,port", .protocol = IPSET_PROTOCOL, .features = IPSET_TYPE_IP | IPSET_TYPE_PORT, .dimension = IPSET_DIM_TWO, .family = AF_UNSPEC, .revision = 0, .create = hash_netport_create, .create_policy = { [IPSET_ATTR_HASHSIZE] = { .type = NLA_U32 }, [IPSET_ATTR_MAXELEM] = { .type = NLA_U32 }, [IPSET_ATTR_PROBES] = { .type = NLA_U8 }, [IPSET_ATTR_RESIZE] = { .type = NLA_U8 }, [IPSET_ATTR_PROTO] = { .type = NLA_U8 }, [IPSET_ATTR_TIMEOUT] = { .type = NLA_U32 }, }, .adt_policy = { [IPSET_ATTR_IP] = { .type = NLA_NESTED }, [IPSET_ATTR_PORT] = { .type = NLA_U16 }, [IPSET_ATTR_PORT_TO] = { .type = NLA_U16 }, [IPSET_ATTR_PROTO] = { .type = NLA_U8 }, [IPSET_ATTR_CIDR] = { .type = NLA_U8 }, [IPSET_ATTR_TIMEOUT] = { .type = NLA_U32 }, [IPSET_ATTR_LINENO] = { .type = NLA_U32 }, }, .me = THIS_MODULE, }; static int __init hash_netport_init(void) { return ip_set_type_register(&hash_netport_type); } static void __exit hash_netport_fini(void) { ip_set_type_unregister(&hash_netport_type); } module_init(hash_netport_init); module_exit(hash_netport_fini);
gpl-2.0
nychitman1/android_kernel_google_pixel
drivers/net/wireless/ti/wlcore/cmd.c
407
48650
/* * This file is part of wl1271 * * Copyright (C) 2009-2010 Nokia Corporation * * Contact: Luciano Coelho <luciano.coelho@nokia.com> * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * version 2 as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA * 02110-1301 USA * */ #include <linux/module.h> #include <linux/platform_device.h> #include <linux/spi/spi.h> #include <linux/etherdevice.h> #include <linux/ieee80211.h> #include <linux/slab.h> #include "wlcore.h" #include "debug.h" #include "io.h" #include "acx.h" #include "wl12xx_80211.h" #include "cmd.h" #include "event.h" #include "tx.h" #include "hw_ops.h" #define WL1271_CMD_FAST_POLL_COUNT 50 #define WL1271_WAIT_EVENT_FAST_POLL_COUNT 20 /* * send command to firmware * * @wl: wl struct * @id: command id * @buf: buffer containing the command, must work with dma * @len: length of the buffer * return the cmd status code on success. */ static int __wlcore_cmd_send(struct wl1271 *wl, u16 id, void *buf, size_t len, size_t res_len) { struct wl1271_cmd_header *cmd; unsigned long timeout; u32 intr; int ret; u16 status; u16 poll_count = 0; if (unlikely(wl->state == WLCORE_STATE_RESTARTING && id != CMD_STOP_FWLOGGER)) return -EIO; cmd = buf; cmd->id = cpu_to_le16(id); cmd->status = 0; WARN_ON(len % 4 != 0); WARN_ON(test_bit(WL1271_FLAG_IN_ELP, &wl->flags)); ret = wlcore_write(wl, wl->cmd_box_addr, buf, len, false); if (ret < 0) return ret; /* * TODO: we just need this because one bit is in a different * place. Is there any better way? */ ret = wl->ops->trigger_cmd(wl, wl->cmd_box_addr, buf, len); if (ret < 0) return ret; timeout = jiffies + msecs_to_jiffies(WL1271_COMMAND_TIMEOUT); ret = wlcore_read_reg(wl, REG_INTERRUPT_NO_CLEAR, &intr); if (ret < 0) return ret; while (!(intr & WL1271_ACX_INTR_CMD_COMPLETE)) { if (time_after(jiffies, timeout)) { wl1271_error("command complete timeout"); return -ETIMEDOUT; } poll_count++; if (poll_count < WL1271_CMD_FAST_POLL_COUNT) udelay(10); else msleep(1); ret = wlcore_read_reg(wl, REG_INTERRUPT_NO_CLEAR, &intr); if (ret < 0) return ret; } /* read back the status code of the command */ if (res_len == 0) res_len = sizeof(struct wl1271_cmd_header); ret = wlcore_read(wl, wl->cmd_box_addr, cmd, res_len, false); if (ret < 0) return ret; status = le16_to_cpu(cmd->status); ret = wlcore_write_reg(wl, REG_INTERRUPT_ACK, WL1271_ACX_INTR_CMD_COMPLETE); if (ret < 0) return ret; return status; } /* * send command to fw and return cmd status on success * valid_rets contains a bitmap of allowed error codes */ int wlcore_cmd_send_failsafe(struct wl1271 *wl, u16 id, void *buf, size_t len, size_t res_len, unsigned long valid_rets) { int ret = __wlcore_cmd_send(wl, id, buf, len, res_len); if (ret < 0) goto fail; /* success is always a valid status */ valid_rets |= BIT(CMD_STATUS_SUCCESS); if (ret >= MAX_COMMAND_STATUS || !test_bit(ret, &valid_rets)) { wl1271_error("command execute failure %d", ret); ret = -EIO; goto fail; } return ret; fail: wl12xx_queue_recovery_work(wl); return ret; } EXPORT_SYMBOL_GPL(wl1271_cmd_send); /* * wrapper for wlcore_cmd_send that accept only CMD_STATUS_SUCCESS * return 0 on success. */ int wl1271_cmd_send(struct wl1271 *wl, u16 id, void *buf, size_t len, size_t res_len) { int ret = wlcore_cmd_send_failsafe(wl, id, buf, len, res_len, 0); if (ret < 0) return ret; return 0; } /* * Poll the mailbox event field until any of the bits in the mask is set or a * timeout occurs (WL1271_EVENT_TIMEOUT in msecs) */ int wlcore_cmd_wait_for_event_or_timeout(struct wl1271 *wl, u32 mask, bool *timeout) { u32 *events_vector; u32 event; unsigned long timeout_time; u16 poll_count = 0; int ret = 0; *timeout = false; events_vector = kmalloc(sizeof(*events_vector), GFP_KERNEL | GFP_DMA); if (!events_vector) return -ENOMEM; timeout_time = jiffies + msecs_to_jiffies(WL1271_EVENT_TIMEOUT); do { if (time_after(jiffies, timeout_time)) { wl1271_debug(DEBUG_CMD, "timeout waiting for event %d", (int)mask); *timeout = true; goto out; } poll_count++; if (poll_count < WL1271_WAIT_EVENT_FAST_POLL_COUNT) usleep_range(50, 51); else usleep_range(1000, 5000); /* read from both event fields */ ret = wlcore_read(wl, wl->mbox_ptr[0], events_vector, sizeof(*events_vector), false); if (ret < 0) goto out; event = *events_vector & mask; ret = wlcore_read(wl, wl->mbox_ptr[1], events_vector, sizeof(*events_vector), false); if (ret < 0) goto out; event |= *events_vector & mask; } while (!event); out: kfree(events_vector); return ret; } EXPORT_SYMBOL_GPL(wlcore_cmd_wait_for_event_or_timeout); int wl12xx_cmd_role_enable(struct wl1271 *wl, u8 *addr, u8 role_type, u8 *role_id) { struct wl12xx_cmd_role_enable *cmd; int ret; wl1271_debug(DEBUG_CMD, "cmd role enable"); if (WARN_ON(*role_id != WL12XX_INVALID_ROLE_ID)) return -EBUSY; cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); if (!cmd) { ret = -ENOMEM; goto out; } /* get role id */ cmd->role_id = find_first_zero_bit(wl->roles_map, WL12XX_MAX_ROLES); if (cmd->role_id >= WL12XX_MAX_ROLES) { ret = -EBUSY; goto out_free; } memcpy(cmd->mac_address, addr, ETH_ALEN); cmd->role_type = role_type; ret = wl1271_cmd_send(wl, CMD_ROLE_ENABLE, cmd, sizeof(*cmd), 0); if (ret < 0) { wl1271_error("failed to initiate cmd role enable"); goto out_free; } __set_bit(cmd->role_id, wl->roles_map); *role_id = cmd->role_id; out_free: kfree(cmd); out: return ret; } int wl12xx_cmd_role_disable(struct wl1271 *wl, u8 *role_id) { struct wl12xx_cmd_role_disable *cmd; int ret; wl1271_debug(DEBUG_CMD, "cmd role disable"); if (WARN_ON(*role_id == WL12XX_INVALID_ROLE_ID)) return -ENOENT; cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); if (!cmd) { ret = -ENOMEM; goto out; } cmd->role_id = *role_id; ret = wl1271_cmd_send(wl, CMD_ROLE_DISABLE, cmd, sizeof(*cmd), 0); if (ret < 0) { wl1271_error("failed to initiate cmd role disable"); goto out_free; } __clear_bit(*role_id, wl->roles_map); *role_id = WL12XX_INVALID_ROLE_ID; out_free: kfree(cmd); out: return ret; } static int wlcore_get_new_session_id(struct wl1271 *wl, u8 hlid) { if (wl->session_ids[hlid] >= SESSION_COUNTER_MAX) wl->session_ids[hlid] = 0; wl->session_ids[hlid]++; return wl->session_ids[hlid]; } int wl12xx_allocate_link(struct wl1271 *wl, struct wl12xx_vif *wlvif, u8 *hlid) { unsigned long flags; u8 link = find_first_zero_bit(wl->links_map, wl->num_links); if (link >= wl->num_links) return -EBUSY; wl->session_ids[link] = wlcore_get_new_session_id(wl, link); /* these bits are used by op_tx */ spin_lock_irqsave(&wl->wl_lock, flags); __set_bit(link, wl->links_map); __set_bit(link, wlvif->links_map); spin_unlock_irqrestore(&wl->wl_lock, flags); /* * take the last "freed packets" value from the current FW status. * on recovery, we might not have fw_status yet, and * tx_lnk_free_pkts will be NULL. check for it. */ if (wl->fw_status->counters.tx_lnk_free_pkts) wl->links[link].prev_freed_pkts = wl->fw_status->counters.tx_lnk_free_pkts[link]; wl->links[link].wlvif = wlvif; /* * Take saved value for total freed packets from wlvif, in case this is * recovery/resume */ if (wlvif->bss_type != BSS_TYPE_AP_BSS) wl->links[link].total_freed_pkts = wlvif->total_freed_pkts; *hlid = link; wl->active_link_count++; return 0; } void wl12xx_free_link(struct wl1271 *wl, struct wl12xx_vif *wlvif, u8 *hlid) { unsigned long flags; if (*hlid == WL12XX_INVALID_LINK_ID) return; /* these bits are used by op_tx */ spin_lock_irqsave(&wl->wl_lock, flags); __clear_bit(*hlid, wl->links_map); __clear_bit(*hlid, wlvif->links_map); spin_unlock_irqrestore(&wl->wl_lock, flags); wl->links[*hlid].allocated_pkts = 0; wl->links[*hlid].prev_freed_pkts = 0; wl->links[*hlid].ba_bitmap = 0; memset(wl->links[*hlid].addr, 0, ETH_ALEN); /* * At this point op_tx() will not add more packets to the queues. We * can purge them. */ wl1271_tx_reset_link_queues(wl, *hlid); wl->links[*hlid].wlvif = NULL; if (wlvif->bss_type == BSS_TYPE_AP_BSS && *hlid == wlvif->ap.bcast_hlid) { u32 sqn_padding = WL1271_TX_SQN_POST_RECOVERY_PADDING; /* * save the total freed packets in the wlvif, in case this is * recovery or suspend */ wlvif->total_freed_pkts = wl->links[*hlid].total_freed_pkts; /* * increment the initial seq number on recovery to account for * transmitted packets that we haven't yet got in the FW status */ if (wlvif->encryption_type == KEY_GEM) sqn_padding = WL1271_TX_SQN_POST_RECOVERY_PADDING_GEM; if (test_bit(WL1271_FLAG_RECOVERY_IN_PROGRESS, &wl->flags)) wlvif->total_freed_pkts += sqn_padding; } wl->links[*hlid].total_freed_pkts = 0; *hlid = WL12XX_INVALID_LINK_ID; wl->active_link_count--; WARN_ON_ONCE(wl->active_link_count < 0); } static u8 wlcore_get_native_channel_type(u8 nl_channel_type) { switch (nl_channel_type) { case NL80211_CHAN_NO_HT: return WLCORE_CHAN_NO_HT; case NL80211_CHAN_HT20: return WLCORE_CHAN_HT20; case NL80211_CHAN_HT40MINUS: return WLCORE_CHAN_HT40MINUS; case NL80211_CHAN_HT40PLUS: return WLCORE_CHAN_HT40PLUS; default: WARN_ON(1); return WLCORE_CHAN_NO_HT; } } static int wl12xx_cmd_role_start_dev(struct wl1271 *wl, struct wl12xx_vif *wlvif, enum ieee80211_band band, int channel) { struct wl12xx_cmd_role_start *cmd; int ret; cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); if (!cmd) { ret = -ENOMEM; goto out; } wl1271_debug(DEBUG_CMD, "cmd role start dev %d", wlvif->dev_role_id); cmd->role_id = wlvif->dev_role_id; if (band == IEEE80211_BAND_5GHZ) cmd->band = WLCORE_BAND_5GHZ; cmd->channel = channel; if (wlvif->dev_hlid == WL12XX_INVALID_LINK_ID) { ret = wl12xx_allocate_link(wl, wlvif, &wlvif->dev_hlid); if (ret) goto out_free; } cmd->device.hlid = wlvif->dev_hlid; cmd->device.session = wl->session_ids[wlvif->dev_hlid]; wl1271_debug(DEBUG_CMD, "role start: roleid=%d, hlid=%d, session=%d", cmd->role_id, cmd->device.hlid, cmd->device.session); ret = wl1271_cmd_send(wl, CMD_ROLE_START, cmd, sizeof(*cmd), 0); if (ret < 0) { wl1271_error("failed to initiate cmd role enable"); goto err_hlid; } goto out_free; err_hlid: /* clear links on error */ wl12xx_free_link(wl, wlvif, &wlvif->dev_hlid); out_free: kfree(cmd); out: return ret; } static int wl12xx_cmd_role_stop_dev(struct wl1271 *wl, struct wl12xx_vif *wlvif) { struct wl12xx_cmd_role_stop *cmd; int ret; if (WARN_ON(wlvif->dev_hlid == WL12XX_INVALID_LINK_ID)) return -EINVAL; cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); if (!cmd) { ret = -ENOMEM; goto out; } wl1271_debug(DEBUG_CMD, "cmd role stop dev"); cmd->role_id = wlvif->dev_role_id; cmd->disc_type = DISCONNECT_IMMEDIATE; cmd->reason = cpu_to_le16(WLAN_REASON_UNSPECIFIED); ret = wl1271_cmd_send(wl, CMD_ROLE_STOP, cmd, sizeof(*cmd), 0); if (ret < 0) { wl1271_error("failed to initiate cmd role stop"); goto out_free; } wl12xx_free_link(wl, wlvif, &wlvif->dev_hlid); out_free: kfree(cmd); out: return ret; } int wl12xx_cmd_role_start_sta(struct wl1271 *wl, struct wl12xx_vif *wlvif) { struct ieee80211_vif *vif = wl12xx_wlvif_to_vif(wlvif); struct wl12xx_cmd_role_start *cmd; u32 supported_rates; int ret; cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); if (!cmd) { ret = -ENOMEM; goto out; } wl1271_debug(DEBUG_CMD, "cmd role start sta %d", wlvif->role_id); cmd->role_id = wlvif->role_id; if (wlvif->band == IEEE80211_BAND_5GHZ) cmd->band = WLCORE_BAND_5GHZ; cmd->channel = wlvif->channel; cmd->sta.basic_rate_set = cpu_to_le32(wlvif->basic_rate_set); cmd->sta.beacon_interval = cpu_to_le16(wlvif->beacon_int); cmd->sta.ssid_type = WL12XX_SSID_TYPE_ANY; cmd->sta.ssid_len = wlvif->ssid_len; memcpy(cmd->sta.ssid, wlvif->ssid, wlvif->ssid_len); memcpy(cmd->sta.bssid, vif->bss_conf.bssid, ETH_ALEN); supported_rates = CONF_TX_ENABLED_RATES | CONF_TX_MCS_RATES | wlcore_hw_sta_get_ap_rate_mask(wl, wlvif); if (wlvif->p2p) supported_rates &= ~CONF_TX_CCK_RATES; cmd->sta.local_rates = cpu_to_le32(supported_rates); cmd->channel_type = wlcore_get_native_channel_type(wlvif->channel_type); if (wlvif->sta.hlid == WL12XX_INVALID_LINK_ID) { ret = wl12xx_allocate_link(wl, wlvif, &wlvif->sta.hlid); if (ret) goto out_free; } cmd->sta.hlid = wlvif->sta.hlid; cmd->sta.session = wl->session_ids[wlvif->sta.hlid]; /* * We don't have the correct remote rates in this stage. The * rates will be reconfigured later, after association, if the * firmware supports ACX_PEER_CAP. Otherwise, there's nothing * we can do, so use all supported_rates here. */ cmd->sta.remote_rates = cpu_to_le32(supported_rates); wl1271_debug(DEBUG_CMD, "role start: roleid=%d, hlid=%d, session=%d " "basic_rate_set: 0x%x, remote_rates: 0x%x", wlvif->role_id, cmd->sta.hlid, cmd->sta.session, wlvif->basic_rate_set, wlvif->rate_set); ret = wl1271_cmd_send(wl, CMD_ROLE_START, cmd, sizeof(*cmd), 0); if (ret < 0) { wl1271_error("failed to initiate cmd role start sta"); goto err_hlid; } wlvif->sta.role_chan_type = wlvif->channel_type; goto out_free; err_hlid: /* clear links on error. */ wl12xx_free_link(wl, wlvif, &wlvif->sta.hlid); out_free: kfree(cmd); out: return ret; } /* use this function to stop ibss as well */ int wl12xx_cmd_role_stop_sta(struct wl1271 *wl, struct wl12xx_vif *wlvif) { struct wl12xx_cmd_role_stop *cmd; int ret; if (WARN_ON(wlvif->sta.hlid == WL12XX_INVALID_LINK_ID)) return -EINVAL; cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); if (!cmd) { ret = -ENOMEM; goto out; } wl1271_debug(DEBUG_CMD, "cmd role stop sta %d", wlvif->role_id); cmd->role_id = wlvif->role_id; cmd->disc_type = DISCONNECT_IMMEDIATE; cmd->reason = cpu_to_le16(WLAN_REASON_UNSPECIFIED); ret = wl1271_cmd_send(wl, CMD_ROLE_STOP, cmd, sizeof(*cmd), 0); if (ret < 0) { wl1271_error("failed to initiate cmd role stop sta"); goto out_free; } wl12xx_free_link(wl, wlvif, &wlvif->sta.hlid); out_free: kfree(cmd); out: return ret; } int wl12xx_cmd_role_start_ap(struct wl1271 *wl, struct wl12xx_vif *wlvif) { struct wl12xx_cmd_role_start *cmd; struct ieee80211_vif *vif = wl12xx_wlvif_to_vif(wlvif); struct ieee80211_bss_conf *bss_conf = &vif->bss_conf; u32 supported_rates; int ret; wl1271_debug(DEBUG_CMD, "cmd role start ap %d", wlvif->role_id); /* trying to use hidden SSID with an old hostapd version */ if (wlvif->ssid_len == 0 && !bss_conf->hidden_ssid) { wl1271_error("got a null SSID from beacon/bss"); ret = -EINVAL; goto out; } cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); if (!cmd) { ret = -ENOMEM; goto out; } ret = wl12xx_allocate_link(wl, wlvif, &wlvif->ap.global_hlid); if (ret < 0) goto out_free; ret = wl12xx_allocate_link(wl, wlvif, &wlvif->ap.bcast_hlid); if (ret < 0) goto out_free_global; /* use the previous security seq, if this is a recovery/resume */ wl->links[wlvif->ap.bcast_hlid].total_freed_pkts = wlvif->total_freed_pkts; cmd->role_id = wlvif->role_id; cmd->ap.aging_period = cpu_to_le16(wl->conf.tx.ap_aging_period); cmd->ap.bss_index = WL1271_AP_BSS_INDEX; cmd->ap.global_hlid = wlvif->ap.global_hlid; cmd->ap.broadcast_hlid = wlvif->ap.bcast_hlid; cmd->ap.global_session_id = wl->session_ids[wlvif->ap.global_hlid]; cmd->ap.bcast_session_id = wl->session_ids[wlvif->ap.bcast_hlid]; cmd->ap.basic_rate_set = cpu_to_le32(wlvif->basic_rate_set); cmd->ap.beacon_interval = cpu_to_le16(wlvif->beacon_int); cmd->ap.dtim_interval = bss_conf->dtim_period; cmd->ap.beacon_expiry = WL1271_AP_DEF_BEACON_EXP; /* FIXME: Change when adding DFS */ cmd->ap.reset_tsf = 1; /* By default reset AP TSF */ cmd->ap.wmm = wlvif->wmm_enabled; cmd->channel = wlvif->channel; cmd->channel_type = wlcore_get_native_channel_type(wlvif->channel_type); if (!bss_conf->hidden_ssid) { /* take the SSID from the beacon for backward compatibility */ cmd->ap.ssid_type = WL12XX_SSID_TYPE_PUBLIC; cmd->ap.ssid_len = wlvif->ssid_len; memcpy(cmd->ap.ssid, wlvif->ssid, wlvif->ssid_len); } else { cmd->ap.ssid_type = WL12XX_SSID_TYPE_HIDDEN; cmd->ap.ssid_len = bss_conf->ssid_len; memcpy(cmd->ap.ssid, bss_conf->ssid, bss_conf->ssid_len); } supported_rates = CONF_TX_ENABLED_RATES | CONF_TX_MCS_RATES | wlcore_hw_ap_get_mimo_wide_rate_mask(wl, wlvif); if (wlvif->p2p) supported_rates &= ~CONF_TX_CCK_RATES; wl1271_debug(DEBUG_CMD, "cmd role start ap with supported_rates 0x%08x", supported_rates); cmd->ap.local_rates = cpu_to_le32(supported_rates); switch (wlvif->band) { case IEEE80211_BAND_2GHZ: cmd->band = WLCORE_BAND_2_4GHZ; break; case IEEE80211_BAND_5GHZ: cmd->band = WLCORE_BAND_5GHZ; break; default: wl1271_warning("ap start - unknown band: %d", (int)wlvif->band); cmd->band = WLCORE_BAND_2_4GHZ; break; } ret = wl1271_cmd_send(wl, CMD_ROLE_START, cmd, sizeof(*cmd), 0); if (ret < 0) { wl1271_error("failed to initiate cmd role start ap"); goto out_free_bcast; } goto out_free; out_free_bcast: wl12xx_free_link(wl, wlvif, &wlvif->ap.bcast_hlid); out_free_global: wl12xx_free_link(wl, wlvif, &wlvif->ap.global_hlid); out_free: kfree(cmd); out: return ret; } int wl12xx_cmd_role_stop_ap(struct wl1271 *wl, struct wl12xx_vif *wlvif) { struct wl12xx_cmd_role_stop *cmd; int ret; cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); if (!cmd) { ret = -ENOMEM; goto out; } wl1271_debug(DEBUG_CMD, "cmd role stop ap %d", wlvif->role_id); cmd->role_id = wlvif->role_id; ret = wl1271_cmd_send(wl, CMD_ROLE_STOP, cmd, sizeof(*cmd), 0); if (ret < 0) { wl1271_error("failed to initiate cmd role stop ap"); goto out_free; } wl12xx_free_link(wl, wlvif, &wlvif->ap.bcast_hlid); wl12xx_free_link(wl, wlvif, &wlvif->ap.global_hlid); out_free: kfree(cmd); out: return ret; } int wl12xx_cmd_role_start_ibss(struct wl1271 *wl, struct wl12xx_vif *wlvif) { struct ieee80211_vif *vif = wl12xx_wlvif_to_vif(wlvif); struct wl12xx_cmd_role_start *cmd; struct ieee80211_bss_conf *bss_conf = &vif->bss_conf; int ret; cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); if (!cmd) { ret = -ENOMEM; goto out; } wl1271_debug(DEBUG_CMD, "cmd role start ibss %d", wlvif->role_id); cmd->role_id = wlvif->role_id; if (wlvif->band == IEEE80211_BAND_5GHZ) cmd->band = WLCORE_BAND_5GHZ; cmd->channel = wlvif->channel; cmd->ibss.basic_rate_set = cpu_to_le32(wlvif->basic_rate_set); cmd->ibss.beacon_interval = cpu_to_le16(wlvif->beacon_int); cmd->ibss.dtim_interval = bss_conf->dtim_period; cmd->ibss.ssid_type = WL12XX_SSID_TYPE_ANY; cmd->ibss.ssid_len = wlvif->ssid_len; memcpy(cmd->ibss.ssid, wlvif->ssid, wlvif->ssid_len); memcpy(cmd->ibss.bssid, vif->bss_conf.bssid, ETH_ALEN); cmd->sta.local_rates = cpu_to_le32(wlvif->rate_set); if (wlvif->sta.hlid == WL12XX_INVALID_LINK_ID) { ret = wl12xx_allocate_link(wl, wlvif, &wlvif->sta.hlid); if (ret) goto out_free; } cmd->ibss.hlid = wlvif->sta.hlid; cmd->ibss.remote_rates = cpu_to_le32(wlvif->rate_set); wl1271_debug(DEBUG_CMD, "role start: roleid=%d, hlid=%d, session=%d " "basic_rate_set: 0x%x, remote_rates: 0x%x", wlvif->role_id, cmd->sta.hlid, cmd->sta.session, wlvif->basic_rate_set, wlvif->rate_set); wl1271_debug(DEBUG_CMD, "vif->bss_conf.bssid = %pM", vif->bss_conf.bssid); ret = wl1271_cmd_send(wl, CMD_ROLE_START, cmd, sizeof(*cmd), 0); if (ret < 0) { wl1271_error("failed to initiate cmd role enable"); goto err_hlid; } goto out_free; err_hlid: /* clear links on error. */ wl12xx_free_link(wl, wlvif, &wlvif->sta.hlid); out_free: kfree(cmd); out: return ret; } /** * send test command to firmware * * @wl: wl struct * @buf: buffer containing the command, with all headers, must work with dma * @len: length of the buffer * @answer: is answer needed */ int wl1271_cmd_test(struct wl1271 *wl, void *buf, size_t buf_len, u8 answer) { int ret; size_t res_len = 0; wl1271_debug(DEBUG_CMD, "cmd test"); if (answer) res_len = buf_len; ret = wl1271_cmd_send(wl, CMD_TEST, buf, buf_len, res_len); if (ret < 0) { wl1271_warning("TEST command failed"); return ret; } return ret; } EXPORT_SYMBOL_GPL(wl1271_cmd_test); /** * read acx from firmware * * @wl: wl struct * @id: acx id * @buf: buffer for the response, including all headers, must work with dma * @len: length of buf */ int wl1271_cmd_interrogate(struct wl1271 *wl, u16 id, void *buf, size_t cmd_len, size_t res_len) { struct acx_header *acx = buf; int ret; wl1271_debug(DEBUG_CMD, "cmd interrogate"); acx->id = cpu_to_le16(id); /* response payload length, does not include any headers */ acx->len = cpu_to_le16(res_len - sizeof(*acx)); ret = wl1271_cmd_send(wl, CMD_INTERROGATE, acx, cmd_len, res_len); if (ret < 0) wl1271_error("INTERROGATE command failed"); return ret; } /** * write acx value to firmware * * @wl: wl struct * @id: acx id * @buf: buffer containing acx, including all headers, must work with dma * @len: length of buf * @valid_rets: bitmap of valid cmd status codes (i.e. return values). * return the cmd status on success. */ int wlcore_cmd_configure_failsafe(struct wl1271 *wl, u16 id, void *buf, size_t len, unsigned long valid_rets) { struct acx_header *acx = buf; int ret; wl1271_debug(DEBUG_CMD, "cmd configure (%d)", id); acx->id = cpu_to_le16(id); /* payload length, does not include any headers */ acx->len = cpu_to_le16(len - sizeof(*acx)); ret = wlcore_cmd_send_failsafe(wl, CMD_CONFIGURE, acx, len, 0, valid_rets); if (ret < 0) { wl1271_warning("CONFIGURE command NOK"); return ret; } return ret; } /* * wrapper for wlcore_cmd_configure that accepts only success status. * return 0 on success */ int wl1271_cmd_configure(struct wl1271 *wl, u16 id, void *buf, size_t len) { int ret = wlcore_cmd_configure_failsafe(wl, id, buf, len, 0); if (ret < 0) return ret; return 0; } EXPORT_SYMBOL_GPL(wl1271_cmd_configure); int wl1271_cmd_data_path(struct wl1271 *wl, bool enable) { struct cmd_enabledisable_path *cmd; int ret; u16 cmd_rx, cmd_tx; wl1271_debug(DEBUG_CMD, "cmd data path"); cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); if (!cmd) { ret = -ENOMEM; goto out; } /* the channel here is only used for calibration, so hardcoded to 1 */ cmd->channel = 1; if (enable) { cmd_rx = CMD_ENABLE_RX; cmd_tx = CMD_ENABLE_TX; } else { cmd_rx = CMD_DISABLE_RX; cmd_tx = CMD_DISABLE_TX; } ret = wl1271_cmd_send(wl, cmd_rx, cmd, sizeof(*cmd), 0); if (ret < 0) { wl1271_error("rx %s cmd for channel %d failed", enable ? "start" : "stop", cmd->channel); goto out; } wl1271_debug(DEBUG_BOOT, "rx %s cmd channel %d", enable ? "start" : "stop", cmd->channel); ret = wl1271_cmd_send(wl, cmd_tx, cmd, sizeof(*cmd), 0); if (ret < 0) { wl1271_error("tx %s cmd for channel %d failed", enable ? "start" : "stop", cmd->channel); goto out; } wl1271_debug(DEBUG_BOOT, "tx %s cmd channel %d", enable ? "start" : "stop", cmd->channel); out: kfree(cmd); return ret; } EXPORT_SYMBOL_GPL(wl1271_cmd_data_path); int wl1271_cmd_ps_mode(struct wl1271 *wl, struct wl12xx_vif *wlvif, u8 ps_mode, u16 auto_ps_timeout) { struct wl1271_cmd_ps_params *ps_params = NULL; int ret = 0; wl1271_debug(DEBUG_CMD, "cmd set ps mode"); ps_params = kzalloc(sizeof(*ps_params), GFP_KERNEL); if (!ps_params) { ret = -ENOMEM; goto out; } ps_params->role_id = wlvif->role_id; ps_params->ps_mode = ps_mode; ps_params->auto_ps_timeout = auto_ps_timeout; ret = wl1271_cmd_send(wl, CMD_SET_PS_MODE, ps_params, sizeof(*ps_params), 0); if (ret < 0) { wl1271_error("cmd set_ps_mode failed"); goto out; } out: kfree(ps_params); return ret; } int wl1271_cmd_template_set(struct wl1271 *wl, u8 role_id, u16 template_id, void *buf, size_t buf_len, int index, u32 rates) { struct wl1271_cmd_template_set *cmd; int ret = 0; wl1271_debug(DEBUG_CMD, "cmd template_set %d (role %d)", template_id, role_id); WARN_ON(buf_len > WL1271_CMD_TEMPL_MAX_SIZE); buf_len = min_t(size_t, buf_len, WL1271_CMD_TEMPL_MAX_SIZE); cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); if (!cmd) { ret = -ENOMEM; goto out; } /* during initialization wlvif is NULL */ cmd->role_id = role_id; cmd->len = cpu_to_le16(buf_len); cmd->template_type = template_id; cmd->enabled_rates = cpu_to_le32(rates); cmd->short_retry_limit = wl->conf.tx.tmpl_short_retry_limit; cmd->long_retry_limit = wl->conf.tx.tmpl_long_retry_limit; cmd->index = index; if (buf) memcpy(cmd->template_data, buf, buf_len); ret = wl1271_cmd_send(wl, CMD_SET_TEMPLATE, cmd, sizeof(*cmd), 0); if (ret < 0) { wl1271_warning("cmd set_template failed: %d", ret); goto out_free; } out_free: kfree(cmd); out: return ret; } int wl12xx_cmd_build_null_data(struct wl1271 *wl, struct wl12xx_vif *wlvif) { struct sk_buff *skb = NULL; int size; void *ptr; int ret = -ENOMEM; if (wlvif->bss_type == BSS_TYPE_IBSS) { size = sizeof(struct wl12xx_null_data_template); ptr = NULL; } else { skb = ieee80211_nullfunc_get(wl->hw, wl12xx_wlvif_to_vif(wlvif)); if (!skb) goto out; size = skb->len; ptr = skb->data; } ret = wl1271_cmd_template_set(wl, wlvif->role_id, CMD_TEMPL_NULL_DATA, ptr, size, 0, wlvif->basic_rate); out: dev_kfree_skb(skb); if (ret) wl1271_warning("cmd buld null data failed %d", ret); return ret; } int wl12xx_cmd_build_klv_null_data(struct wl1271 *wl, struct wl12xx_vif *wlvif) { struct ieee80211_vif *vif = wl12xx_wlvif_to_vif(wlvif); struct sk_buff *skb = NULL; int ret = -ENOMEM; skb = ieee80211_nullfunc_get(wl->hw, vif); if (!skb) goto out; ret = wl1271_cmd_template_set(wl, wlvif->role_id, CMD_TEMPL_KLV, skb->data, skb->len, wlvif->sta.klv_template_id, wlvif->basic_rate); out: dev_kfree_skb(skb); if (ret) wl1271_warning("cmd build klv null data failed %d", ret); return ret; } int wl1271_cmd_build_ps_poll(struct wl1271 *wl, struct wl12xx_vif *wlvif, u16 aid) { struct ieee80211_vif *vif = wl12xx_wlvif_to_vif(wlvif); struct sk_buff *skb; int ret = 0; skb = ieee80211_pspoll_get(wl->hw, vif); if (!skb) goto out; ret = wl1271_cmd_template_set(wl, wlvif->role_id, CMD_TEMPL_PS_POLL, skb->data, skb->len, 0, wlvif->basic_rate_set); out: dev_kfree_skb(skb); return ret; } int wl12xx_cmd_build_probe_req(struct wl1271 *wl, struct wl12xx_vif *wlvif, u8 role_id, u8 band, const u8 *ssid, size_t ssid_len, const u8 *ie0, size_t ie0_len, const u8 *ie1, size_t ie1_len, bool sched_scan) { struct ieee80211_vif *vif = wl12xx_wlvif_to_vif(wlvif); struct sk_buff *skb; int ret; u32 rate; u16 template_id_2_4 = wl->scan_templ_id_2_4; u16 template_id_5 = wl->scan_templ_id_5; wl1271_debug(DEBUG_SCAN, "build probe request band %d", band); skb = ieee80211_probereq_get(wl->hw, vif, ssid, ssid_len, ie0_len + ie1_len); if (!skb) { ret = -ENOMEM; goto out; } if (ie0_len) memcpy(skb_put(skb, ie0_len), ie0, ie0_len); if (ie1_len) memcpy(skb_put(skb, ie1_len), ie1, ie1_len); if (sched_scan && (wl->quirks & WLCORE_QUIRK_DUAL_PROBE_TMPL)) { template_id_2_4 = wl->sched_scan_templ_id_2_4; template_id_5 = wl->sched_scan_templ_id_5; } rate = wl1271_tx_min_rate_get(wl, wlvif->bitrate_masks[band]); if (band == IEEE80211_BAND_2GHZ) ret = wl1271_cmd_template_set(wl, role_id, template_id_2_4, skb->data, skb->len, 0, rate); else ret = wl1271_cmd_template_set(wl, role_id, template_id_5, skb->data, skb->len, 0, rate); out: dev_kfree_skb(skb); return ret; } EXPORT_SYMBOL_GPL(wl12xx_cmd_build_probe_req); struct sk_buff *wl1271_cmd_build_ap_probe_req(struct wl1271 *wl, struct wl12xx_vif *wlvif, struct sk_buff *skb) { struct ieee80211_vif *vif = wl12xx_wlvif_to_vif(wlvif); int ret; u32 rate; if (!skb) skb = ieee80211_ap_probereq_get(wl->hw, vif); if (!skb) goto out; wl1271_debug(DEBUG_SCAN, "set ap probe request template"); rate = wl1271_tx_min_rate_get(wl, wlvif->bitrate_masks[wlvif->band]); if (wlvif->band == IEEE80211_BAND_2GHZ) ret = wl1271_cmd_template_set(wl, wlvif->role_id, CMD_TEMPL_CFG_PROBE_REQ_2_4, skb->data, skb->len, 0, rate); else ret = wl1271_cmd_template_set(wl, wlvif->role_id, CMD_TEMPL_CFG_PROBE_REQ_5, skb->data, skb->len, 0, rate); if (ret < 0) wl1271_error("Unable to set ap probe request template."); out: return skb; } int wl1271_cmd_build_arp_rsp(struct wl1271 *wl, struct wl12xx_vif *wlvif) { int ret, extra = 0; u16 fc; struct ieee80211_vif *vif = wl12xx_wlvif_to_vif(wlvif); struct sk_buff *skb; struct wl12xx_arp_rsp_template *tmpl; struct ieee80211_hdr_3addr *hdr; struct arphdr *arp_hdr; skb = dev_alloc_skb(sizeof(*hdr) + sizeof(__le16) + sizeof(*tmpl) + WL1271_EXTRA_SPACE_MAX); if (!skb) { wl1271_error("failed to allocate buffer for arp rsp template"); return -ENOMEM; } skb_reserve(skb, sizeof(*hdr) + WL1271_EXTRA_SPACE_MAX); tmpl = (struct wl12xx_arp_rsp_template *)skb_put(skb, sizeof(*tmpl)); memset(tmpl, 0, sizeof(*tmpl)); /* llc layer */ memcpy(tmpl->llc_hdr, rfc1042_header, sizeof(rfc1042_header)); tmpl->llc_type = cpu_to_be16(ETH_P_ARP); /* arp header */ arp_hdr = &tmpl->arp_hdr; arp_hdr->ar_hrd = cpu_to_be16(ARPHRD_ETHER); arp_hdr->ar_pro = cpu_to_be16(ETH_P_IP); arp_hdr->ar_hln = ETH_ALEN; arp_hdr->ar_pln = 4; arp_hdr->ar_op = cpu_to_be16(ARPOP_REPLY); /* arp payload */ memcpy(tmpl->sender_hw, vif->addr, ETH_ALEN); tmpl->sender_ip = wlvif->ip_addr; /* encryption space */ switch (wlvif->encryption_type) { case KEY_TKIP: if (wl->quirks & WLCORE_QUIRK_TKIP_HEADER_SPACE) extra = WL1271_EXTRA_SPACE_TKIP; break; case KEY_AES: extra = WL1271_EXTRA_SPACE_AES; break; case KEY_NONE: case KEY_WEP: case KEY_GEM: extra = 0; break; default: wl1271_warning("Unknown encryption type: %d", wlvif->encryption_type); ret = -EINVAL; goto out; } if (extra) { u8 *space = skb_push(skb, extra); memset(space, 0, extra); } /* QoS header - BE */ if (wlvif->sta.qos) memset(skb_push(skb, sizeof(__le16)), 0, sizeof(__le16)); /* mac80211 header */ hdr = (struct ieee80211_hdr_3addr *)skb_push(skb, sizeof(*hdr)); memset(hdr, 0, sizeof(*hdr)); fc = IEEE80211_FTYPE_DATA | IEEE80211_FCTL_TODS; if (wlvif->sta.qos) fc |= IEEE80211_STYPE_QOS_DATA; else fc |= IEEE80211_STYPE_DATA; if (wlvif->encryption_type != KEY_NONE) fc |= IEEE80211_FCTL_PROTECTED; hdr->frame_control = cpu_to_le16(fc); memcpy(hdr->addr1, vif->bss_conf.bssid, ETH_ALEN); memcpy(hdr->addr2, vif->addr, ETH_ALEN); memset(hdr->addr3, 0xff, ETH_ALEN); ret = wl1271_cmd_template_set(wl, wlvif->role_id, CMD_TEMPL_ARP_RSP, skb->data, skb->len, 0, wlvif->basic_rate); out: dev_kfree_skb(skb); return ret; } int wl1271_build_qos_null_data(struct wl1271 *wl, struct ieee80211_vif *vif) { struct wl12xx_vif *wlvif = wl12xx_vif_to_data(vif); struct ieee80211_qos_hdr template; memset(&template, 0, sizeof(template)); memcpy(template.addr1, vif->bss_conf.bssid, ETH_ALEN); memcpy(template.addr2, vif->addr, ETH_ALEN); memcpy(template.addr3, vif->bss_conf.bssid, ETH_ALEN); template.frame_control = cpu_to_le16(IEEE80211_FTYPE_DATA | IEEE80211_STYPE_QOS_NULLFUNC | IEEE80211_FCTL_TODS); /* FIXME: not sure what priority to use here */ template.qos_ctrl = cpu_to_le16(0); return wl1271_cmd_template_set(wl, wlvif->role_id, CMD_TEMPL_QOS_NULL_DATA, &template, sizeof(template), 0, wlvif->basic_rate); } int wl12xx_cmd_set_default_wep_key(struct wl1271 *wl, u8 id, u8 hlid) { struct wl1271_cmd_set_keys *cmd; int ret = 0; wl1271_debug(DEBUG_CMD, "cmd set_default_wep_key %d", id); cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); if (!cmd) { ret = -ENOMEM; goto out; } cmd->hlid = hlid; cmd->key_id = id; cmd->lid_key_type = WEP_DEFAULT_LID_TYPE; cmd->key_action = cpu_to_le16(KEY_SET_ID); cmd->key_type = KEY_WEP; ret = wl1271_cmd_send(wl, CMD_SET_KEYS, cmd, sizeof(*cmd), 0); if (ret < 0) { wl1271_warning("cmd set_default_wep_key failed: %d", ret); goto out; } out: kfree(cmd); return ret; } int wl1271_cmd_set_sta_key(struct wl1271 *wl, struct wl12xx_vif *wlvif, u16 action, u8 id, u8 key_type, u8 key_size, const u8 *key, const u8 *addr, u32 tx_seq_32, u16 tx_seq_16) { struct wl1271_cmd_set_keys *cmd; int ret = 0; /* hlid might have already been deleted */ if (wlvif->sta.hlid == WL12XX_INVALID_LINK_ID) return 0; cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); if (!cmd) { ret = -ENOMEM; goto out; } cmd->hlid = wlvif->sta.hlid; if (key_type == KEY_WEP) cmd->lid_key_type = WEP_DEFAULT_LID_TYPE; else if (is_broadcast_ether_addr(addr)) cmd->lid_key_type = BROADCAST_LID_TYPE; else cmd->lid_key_type = UNICAST_LID_TYPE; cmd->key_action = cpu_to_le16(action); cmd->key_size = key_size; cmd->key_type = key_type; cmd->ac_seq_num16[0] = cpu_to_le16(tx_seq_16); cmd->ac_seq_num32[0] = cpu_to_le32(tx_seq_32); cmd->key_id = id; if (key_type == KEY_TKIP) { /* * We get the key in the following form: * TKIP (16 bytes) - TX MIC (8 bytes) - RX MIC (8 bytes) * but the target is expecting: * TKIP - RX MIC - TX MIC */ memcpy(cmd->key, key, 16); memcpy(cmd->key + 16, key + 24, 8); memcpy(cmd->key + 24, key + 16, 8); } else { memcpy(cmd->key, key, key_size); } wl1271_dump(DEBUG_CRYPT, "TARGET KEY: ", cmd, sizeof(*cmd)); ret = wl1271_cmd_send(wl, CMD_SET_KEYS, cmd, sizeof(*cmd), 0); if (ret < 0) { wl1271_warning("could not set keys"); goto out; } out: kfree(cmd); return ret; } /* * TODO: merge with sta/ibss into 1 set_key function. * note there are slight diffs */ int wl1271_cmd_set_ap_key(struct wl1271 *wl, struct wl12xx_vif *wlvif, u16 action, u8 id, u8 key_type, u8 key_size, const u8 *key, u8 hlid, u32 tx_seq_32, u16 tx_seq_16) { struct wl1271_cmd_set_keys *cmd; int ret = 0; u8 lid_type; cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); if (!cmd) return -ENOMEM; if (hlid == wlvif->ap.bcast_hlid) { if (key_type == KEY_WEP) lid_type = WEP_DEFAULT_LID_TYPE; else lid_type = BROADCAST_LID_TYPE; } else { lid_type = UNICAST_LID_TYPE; } wl1271_debug(DEBUG_CRYPT, "ap key action: %d id: %d lid: %d type: %d" " hlid: %d", (int)action, (int)id, (int)lid_type, (int)key_type, (int)hlid); cmd->lid_key_type = lid_type; cmd->hlid = hlid; cmd->key_action = cpu_to_le16(action); cmd->key_size = key_size; cmd->key_type = key_type; cmd->key_id = id; cmd->ac_seq_num16[0] = cpu_to_le16(tx_seq_16); cmd->ac_seq_num32[0] = cpu_to_le32(tx_seq_32); if (key_type == KEY_TKIP) { /* * We get the key in the following form: * TKIP (16 bytes) - TX MIC (8 bytes) - RX MIC (8 bytes) * but the target is expecting: * TKIP - RX MIC - TX MIC */ memcpy(cmd->key, key, 16); memcpy(cmd->key + 16, key + 24, 8); memcpy(cmd->key + 24, key + 16, 8); } else { memcpy(cmd->key, key, key_size); } wl1271_dump(DEBUG_CRYPT, "TARGET AP KEY: ", cmd, sizeof(*cmd)); ret = wl1271_cmd_send(wl, CMD_SET_KEYS, cmd, sizeof(*cmd), 0); if (ret < 0) { wl1271_warning("could not set ap keys"); goto out; } out: kfree(cmd); return ret; } int wl12xx_cmd_set_peer_state(struct wl1271 *wl, struct wl12xx_vif *wlvif, u8 hlid) { struct wl12xx_cmd_set_peer_state *cmd; int ret = 0; wl1271_debug(DEBUG_CMD, "cmd set peer state (hlid=%d)", hlid); cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); if (!cmd) { ret = -ENOMEM; goto out; } cmd->hlid = hlid; cmd->state = WL1271_CMD_STA_STATE_CONNECTED; /* wmm param is valid only for station role */ if (wlvif->bss_type == BSS_TYPE_STA_BSS) cmd->wmm = wlvif->wmm_enabled; ret = wl1271_cmd_send(wl, CMD_SET_PEER_STATE, cmd, sizeof(*cmd), 0); if (ret < 0) { wl1271_error("failed to send set peer state command"); goto out_free; } out_free: kfree(cmd); out: return ret; } int wl12xx_cmd_add_peer(struct wl1271 *wl, struct wl12xx_vif *wlvif, struct ieee80211_sta *sta, u8 hlid) { struct wl12xx_cmd_add_peer *cmd; int i, ret; u32 sta_rates; wl1271_debug(DEBUG_CMD, "cmd add peer %d", (int)hlid); cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); if (!cmd) { ret = -ENOMEM; goto out; } memcpy(cmd->addr, sta->addr, ETH_ALEN); cmd->bss_index = WL1271_AP_BSS_INDEX; cmd->aid = sta->aid; cmd->hlid = hlid; cmd->sp_len = sta->max_sp; cmd->wmm = sta->wme ? 1 : 0; cmd->session_id = wl->session_ids[hlid]; cmd->role_id = wlvif->role_id; for (i = 0; i < NUM_ACCESS_CATEGORIES_COPY; i++) if (sta->wme && (sta->uapsd_queues & BIT(i))) cmd->psd_type[NUM_ACCESS_CATEGORIES_COPY-1-i] = WL1271_PSD_UPSD_TRIGGER; else cmd->psd_type[NUM_ACCESS_CATEGORIES_COPY-1-i] = WL1271_PSD_LEGACY; sta_rates = sta->supp_rates[wlvif->band]; if (sta->ht_cap.ht_supported) sta_rates |= (sta->ht_cap.mcs.rx_mask[0] << HW_HT_RATES_OFFSET) | (sta->ht_cap.mcs.rx_mask[1] << HW_MIMO_RATES_OFFSET); cmd->supported_rates = cpu_to_le32(wl1271_tx_enabled_rates_get(wl, sta_rates, wlvif->band)); wl1271_debug(DEBUG_CMD, "new peer rates=0x%x queues=0x%x", cmd->supported_rates, sta->uapsd_queues); ret = wl1271_cmd_send(wl, CMD_ADD_PEER, cmd, sizeof(*cmd), 0); if (ret < 0) { wl1271_error("failed to initiate cmd add peer"); goto out_free; } out_free: kfree(cmd); out: return ret; } int wl12xx_cmd_remove_peer(struct wl1271 *wl, struct wl12xx_vif *wlvif, u8 hlid) { struct wl12xx_cmd_remove_peer *cmd; int ret; bool timeout = false; wl1271_debug(DEBUG_CMD, "cmd remove peer %d", (int)hlid); cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); if (!cmd) { ret = -ENOMEM; goto out; } cmd->hlid = hlid; /* We never send a deauth, mac80211 is in charge of this */ cmd->reason_opcode = 0; cmd->send_deauth_flag = 0; cmd->role_id = wlvif->role_id; ret = wl1271_cmd_send(wl, CMD_REMOVE_PEER, cmd, sizeof(*cmd), 0); if (ret < 0) { wl1271_error("failed to initiate cmd remove peer"); goto out_free; } ret = wl->ops->wait_for_event(wl, WLCORE_EVENT_PEER_REMOVE_COMPLETE, &timeout); /* * We are ok with a timeout here. The event is sometimes not sent * due to a firmware bug. In case of another error (like SDIO timeout) * queue a recovery. */ if (ret) wl12xx_queue_recovery_work(wl); out_free: kfree(cmd); out: return ret; } static int wlcore_get_reg_conf_ch_idx(enum ieee80211_band band, u16 ch) { /* * map the given band/channel to the respective predefined * bit expected by the fw */ switch (band) { case IEEE80211_BAND_2GHZ: /* channels 1..14 are mapped to 0..13 */ if (ch >= 1 && ch <= 14) return ch - 1; break; case IEEE80211_BAND_5GHZ: switch (ch) { case 8 ... 16: /* channels 8,12,16 are mapped to 18,19,20 */ return 18 + (ch-8)/4; case 34 ... 48: /* channels 34,36..48 are mapped to 21..28 */ return 21 + (ch-34)/2; case 52 ... 64: /* channels 52,56..64 are mapped to 29..32 */ return 29 + (ch-52)/4; case 100 ... 140: /* channels 100,104..140 are mapped to 33..43 */ return 33 + (ch-100)/4; case 149 ... 165: /* channels 149,153..165 are mapped to 44..48 */ return 44 + (ch-149)/4; default: break; } break; default: break; } wl1271_error("%s: unknown band/channel: %d/%d", __func__, band, ch); return -1; } void wlcore_set_pending_regdomain_ch(struct wl1271 *wl, u16 channel, enum ieee80211_band band) { int ch_bit_idx = 0; if (!(wl->quirks & WLCORE_QUIRK_REGDOMAIN_CONF)) return; ch_bit_idx = wlcore_get_reg_conf_ch_idx(band, channel); if (ch_bit_idx >= 0 && ch_bit_idx <= WL1271_MAX_CHANNELS) set_bit(ch_bit_idx, (long *)wl->reg_ch_conf_pending); } int wlcore_cmd_regdomain_config_locked(struct wl1271 *wl) { struct wl12xx_cmd_regdomain_dfs_config *cmd = NULL; int ret = 0, i, b, ch_bit_idx; struct ieee80211_channel *channel; u32 tmp_ch_bitmap[2]; u16 ch; struct wiphy *wiphy = wl->hw->wiphy; struct ieee80211_supported_band *band; bool timeout = false; if (!(wl->quirks & WLCORE_QUIRK_REGDOMAIN_CONF)) return 0; wl1271_debug(DEBUG_CMD, "cmd reg domain config"); memset(tmp_ch_bitmap, 0, sizeof(tmp_ch_bitmap)); for (b = IEEE80211_BAND_2GHZ; b <= IEEE80211_BAND_5GHZ; b++) { band = wiphy->bands[b]; for (i = 0; i < band->n_channels; i++) { channel = &band->channels[i]; ch = channel->hw_value; if (channel->flags & (IEEE80211_CHAN_DISABLED | IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR)) continue; ch_bit_idx = wlcore_get_reg_conf_ch_idx(b, ch); if (ch_bit_idx < 0) continue; set_bit(ch_bit_idx, (long *)tmp_ch_bitmap); } } tmp_ch_bitmap[0] |= wl->reg_ch_conf_pending[0]; tmp_ch_bitmap[1] |= wl->reg_ch_conf_pending[1]; if (!memcmp(tmp_ch_bitmap, wl->reg_ch_conf_last, sizeof(tmp_ch_bitmap))) goto out; cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); if (!cmd) { ret = -ENOMEM; goto out; } cmd->ch_bit_map1 = cpu_to_le32(tmp_ch_bitmap[0]); cmd->ch_bit_map2 = cpu_to_le32(tmp_ch_bitmap[1]); wl1271_debug(DEBUG_CMD, "cmd reg domain bitmap1: 0x%08x, bitmap2: 0x%08x", cmd->ch_bit_map1, cmd->ch_bit_map2); ret = wl1271_cmd_send(wl, CMD_DFS_CHANNEL_CONFIG, cmd, sizeof(*cmd), 0); if (ret < 0) { wl1271_error("failed to send reg domain dfs config"); goto out; } ret = wl->ops->wait_for_event(wl, WLCORE_EVENT_DFS_CONFIG_COMPLETE, &timeout); if (ret < 0 || timeout) { wl1271_error("reg domain conf %serror", timeout ? "completion " : ""); ret = timeout ? -ETIMEDOUT : ret; goto out; } memcpy(wl->reg_ch_conf_last, tmp_ch_bitmap, sizeof(tmp_ch_bitmap)); memset(wl->reg_ch_conf_pending, 0, sizeof(wl->reg_ch_conf_pending)); out: kfree(cmd); return ret; } int wl12xx_cmd_config_fwlog(struct wl1271 *wl) { struct wl12xx_cmd_config_fwlog *cmd; int ret = 0; wl1271_debug(DEBUG_CMD, "cmd config firmware logger"); cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); if (!cmd) { ret = -ENOMEM; goto out; } cmd->logger_mode = wl->conf.fwlog.mode; cmd->log_severity = wl->conf.fwlog.severity; cmd->timestamp = wl->conf.fwlog.timestamp; cmd->output = wl->conf.fwlog.output; cmd->threshold = wl->conf.fwlog.threshold; ret = wl1271_cmd_send(wl, CMD_CONFIG_FWLOGGER, cmd, sizeof(*cmd), 0); if (ret < 0) { wl1271_error("failed to send config firmware logger command"); goto out_free; } out_free: kfree(cmd); out: return ret; } int wl12xx_cmd_start_fwlog(struct wl1271 *wl) { struct wl12xx_cmd_start_fwlog *cmd; int ret = 0; wl1271_debug(DEBUG_CMD, "cmd start firmware logger"); cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); if (!cmd) { ret = -ENOMEM; goto out; } ret = wl1271_cmd_send(wl, CMD_START_FWLOGGER, cmd, sizeof(*cmd), 0); if (ret < 0) { wl1271_error("failed to send start firmware logger command"); goto out_free; } out_free: kfree(cmd); out: return ret; } int wl12xx_cmd_stop_fwlog(struct wl1271 *wl) { struct wl12xx_cmd_stop_fwlog *cmd; int ret = 0; wl1271_debug(DEBUG_CMD, "cmd stop firmware logger"); cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); if (!cmd) { ret = -ENOMEM; goto out; } ret = wl1271_cmd_send(wl, CMD_STOP_FWLOGGER, cmd, sizeof(*cmd), 0); if (ret < 0) { wl1271_error("failed to send stop firmware logger command"); goto out_free; } out_free: kfree(cmd); out: return ret; } static int wl12xx_cmd_roc(struct wl1271 *wl, struct wl12xx_vif *wlvif, u8 role_id, enum ieee80211_band band, u8 channel) { struct wl12xx_cmd_roc *cmd; int ret = 0; wl1271_debug(DEBUG_CMD, "cmd roc %d (%d)", channel, role_id); if (WARN_ON(role_id == WL12XX_INVALID_ROLE_ID)) return -EINVAL; cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); if (!cmd) { ret = -ENOMEM; goto out; } cmd->role_id = role_id; cmd->channel = channel; switch (band) { case IEEE80211_BAND_2GHZ: cmd->band = WLCORE_BAND_2_4GHZ; break; case IEEE80211_BAND_5GHZ: cmd->band = WLCORE_BAND_5GHZ; break; default: wl1271_error("roc - unknown band: %d", (int)wlvif->band); ret = -EINVAL; goto out_free; } ret = wl1271_cmd_send(wl, CMD_REMAIN_ON_CHANNEL, cmd, sizeof(*cmd), 0); if (ret < 0) { wl1271_error("failed to send ROC command"); goto out_free; } out_free: kfree(cmd); out: return ret; } static int wl12xx_cmd_croc(struct wl1271 *wl, u8 role_id) { struct wl12xx_cmd_croc *cmd; int ret = 0; wl1271_debug(DEBUG_CMD, "cmd croc (%d)", role_id); cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); if (!cmd) { ret = -ENOMEM; goto out; } cmd->role_id = role_id; ret = wl1271_cmd_send(wl, CMD_CANCEL_REMAIN_ON_CHANNEL, cmd, sizeof(*cmd), 0); if (ret < 0) { wl1271_error("failed to send ROC command"); goto out_free; } out_free: kfree(cmd); out: return ret; } int wl12xx_roc(struct wl1271 *wl, struct wl12xx_vif *wlvif, u8 role_id, enum ieee80211_band band, u8 channel) { int ret = 0; if (WARN_ON(test_bit(role_id, wl->roc_map))) return 0; ret = wl12xx_cmd_roc(wl, wlvif, role_id, band, channel); if (ret < 0) goto out; __set_bit(role_id, wl->roc_map); out: return ret; } int wl12xx_croc(struct wl1271 *wl, u8 role_id) { int ret = 0; if (WARN_ON(!test_bit(role_id, wl->roc_map))) return 0; ret = wl12xx_cmd_croc(wl, role_id); if (ret < 0) goto out; __clear_bit(role_id, wl->roc_map); /* * Rearm the tx watchdog when removing the last ROC. This prevents * recoveries due to just finished ROCs - when Tx hasn't yet had * a chance to get out. */ if (find_first_bit(wl->roc_map, WL12XX_MAX_ROLES) >= WL12XX_MAX_ROLES) wl12xx_rearm_tx_watchdog_locked(wl); out: return ret; } int wl12xx_cmd_stop_channel_switch(struct wl1271 *wl, struct wl12xx_vif *wlvif) { struct wl12xx_cmd_stop_channel_switch *cmd; int ret; wl1271_debug(DEBUG_ACX, "cmd stop channel switch"); cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); if (!cmd) { ret = -ENOMEM; goto out; } cmd->role_id = wlvif->role_id; ret = wl1271_cmd_send(wl, CMD_STOP_CHANNEL_SWICTH, cmd, sizeof(*cmd), 0); if (ret < 0) { wl1271_error("failed to stop channel switch command"); goto out_free; } out_free: kfree(cmd); out: return ret; } /* start dev role and roc on its channel */ int wl12xx_start_dev(struct wl1271 *wl, struct wl12xx_vif *wlvif, enum ieee80211_band band, int channel) { int ret; if (WARN_ON(!(wlvif->bss_type == BSS_TYPE_STA_BSS || wlvif->bss_type == BSS_TYPE_IBSS))) return -EINVAL; ret = wl12xx_cmd_role_enable(wl, wl12xx_wlvif_to_vif(wlvif)->addr, WL1271_ROLE_DEVICE, &wlvif->dev_role_id); if (ret < 0) goto out; ret = wl12xx_cmd_role_start_dev(wl, wlvif, band, channel); if (ret < 0) goto out_disable; ret = wl12xx_roc(wl, wlvif, wlvif->dev_role_id, band, channel); if (ret < 0) goto out_stop; return 0; out_stop: wl12xx_cmd_role_stop_dev(wl, wlvif); out_disable: wl12xx_cmd_role_disable(wl, &wlvif->dev_role_id); out: return ret; } /* croc dev hlid, and stop the role */ int wl12xx_stop_dev(struct wl1271 *wl, struct wl12xx_vif *wlvif) { int ret; if (WARN_ON(!(wlvif->bss_type == BSS_TYPE_STA_BSS || wlvif->bss_type == BSS_TYPE_IBSS))) return -EINVAL; /* flush all pending packets */ ret = wlcore_tx_work_locked(wl); if (ret < 0) goto out; if (test_bit(wlvif->dev_role_id, wl->roc_map)) { ret = wl12xx_croc(wl, wlvif->dev_role_id); if (ret < 0) goto out; } ret = wl12xx_cmd_role_stop_dev(wl, wlvif); if (ret < 0) goto out; ret = wl12xx_cmd_role_disable(wl, &wlvif->dev_role_id); if (ret < 0) goto out; out: return ret; }
gpl-2.0
koolkhel/linux
drivers/media/tuners/mt2131.c
1175
7934
/* * Driver for Microtune MT2131 "QAM/8VSB single chip tuner" * * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ #include <linux/module.h> #include <linux/delay.h> #include <linux/dvb/frontend.h> #include <linux/i2c.h> #include <linux/slab.h> #include "dvb_frontend.h" #include "mt2131.h" #include "mt2131_priv.h" static int debug; module_param(debug, int, 0644); MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off)."); #define dprintk(level,fmt, arg...) if (debug >= level) \ printk(KERN_INFO "%s: " fmt, "mt2131", ## arg) static u8 mt2131_config1[] = { 0x01, 0x50, 0x00, 0x50, 0x80, 0x00, 0x49, 0xfa, 0x88, 0x08, 0x77, 0x41, 0x04, 0x00, 0x00, 0x00, 0x32, 0x7f, 0xda, 0x4c, 0x00, 0x10, 0xaa, 0x78, 0x80, 0xff, 0x68, 0xa0, 0xff, 0xdd, 0x00, 0x00 }; static u8 mt2131_config2[] = { 0x10, 0x7f, 0xc8, 0x0a, 0x5f, 0x00, 0x04 }; static int mt2131_readreg(struct mt2131_priv *priv, u8 reg, u8 *val) { struct i2c_msg msg[2] = { { .addr = priv->cfg->i2c_address, .flags = 0, .buf = &reg, .len = 1 }, { .addr = priv->cfg->i2c_address, .flags = I2C_M_RD, .buf = val, .len = 1 }, }; if (i2c_transfer(priv->i2c, msg, 2) != 2) { printk(KERN_WARNING "mt2131 I2C read failed\n"); return -EREMOTEIO; } return 0; } static int mt2131_writereg(struct mt2131_priv *priv, u8 reg, u8 val) { u8 buf[2] = { reg, val }; struct i2c_msg msg = { .addr = priv->cfg->i2c_address, .flags = 0, .buf = buf, .len = 2 }; if (i2c_transfer(priv->i2c, &msg, 1) != 1) { printk(KERN_WARNING "mt2131 I2C write failed\n"); return -EREMOTEIO; } return 0; } static int mt2131_writeregs(struct mt2131_priv *priv,u8 *buf, u8 len) { struct i2c_msg msg = { .addr = priv->cfg->i2c_address, .flags = 0, .buf = buf, .len = len }; if (i2c_transfer(priv->i2c, &msg, 1) != 1) { printk(KERN_WARNING "mt2131 I2C write failed (len=%i)\n", (int)len); return -EREMOTEIO; } return 0; } static int mt2131_set_params(struct dvb_frontend *fe) { struct dtv_frontend_properties *c = &fe->dtv_property_cache; struct mt2131_priv *priv; int ret=0, i; u32 freq; u8 if_band_center; u32 f_lo1, f_lo2; u32 div1, num1, div2, num2; u8 b[8]; u8 lockval = 0; priv = fe->tuner_priv; freq = c->frequency / 1000; /* Hz -> kHz */ dprintk(1, "%s() freq=%d\n", __func__, freq); f_lo1 = freq + MT2131_IF1 * 1000; f_lo1 = (f_lo1 / 250) * 250; f_lo2 = f_lo1 - freq - MT2131_IF2; priv->frequency = (f_lo1 - f_lo2 - MT2131_IF2) * 1000; /* Frequency LO1 = 16MHz * (DIV1 + NUM1/8192 ) */ num1 = f_lo1 * 64 / (MT2131_FREF / 128); div1 = num1 / 8192; num1 &= 0x1fff; /* Frequency LO2 = 16MHz * (DIV2 + NUM2/8192 ) */ num2 = f_lo2 * 64 / (MT2131_FREF / 128); div2 = num2 / 8192; num2 &= 0x1fff; if (freq <= 82500) if_band_center = 0x00; else if (freq <= 137500) if_band_center = 0x01; else if (freq <= 192500) if_band_center = 0x02; else if (freq <= 247500) if_band_center = 0x03; else if (freq <= 302500) if_band_center = 0x04; else if (freq <= 357500) if_band_center = 0x05; else if (freq <= 412500) if_band_center = 0x06; else if (freq <= 467500) if_band_center = 0x07; else if (freq <= 522500) if_band_center = 0x08; else if (freq <= 577500) if_band_center = 0x09; else if (freq <= 632500) if_band_center = 0x0A; else if (freq <= 687500) if_band_center = 0x0B; else if (freq <= 742500) if_band_center = 0x0C; else if (freq <= 797500) if_band_center = 0x0D; else if (freq <= 852500) if_band_center = 0x0E; else if (freq <= 907500) if_band_center = 0x0F; else if (freq <= 962500) if_band_center = 0x10; else if (freq <= 1017500) if_band_center = 0x11; else if (freq <= 1072500) if_band_center = 0x12; else if_band_center = 0x13; b[0] = 1; b[1] = (num1 >> 5) & 0xFF; b[2] = (num1 & 0x1F); b[3] = div1; b[4] = (num2 >> 5) & 0xFF; b[5] = num2 & 0x1F; b[6] = div2; dprintk(1, "IF1: %dMHz IF2: %dMHz\n", MT2131_IF1, MT2131_IF2); dprintk(1, "PLL freq=%dkHz band=%d\n", (int)freq, (int)if_band_center); dprintk(1, "PLL f_lo1=%dkHz f_lo2=%dkHz\n", (int)f_lo1, (int)f_lo2); dprintk(1, "PLL div1=%d num1=%d div2=%d num2=%d\n", (int)div1, (int)num1, (int)div2, (int)num2); dprintk(1, "PLL [1..6]: %2x %2x %2x %2x %2x %2x\n", (int)b[1], (int)b[2], (int)b[3], (int)b[4], (int)b[5], (int)b[6]); ret = mt2131_writeregs(priv,b,7); if (ret < 0) return ret; mt2131_writereg(priv, 0x0b, if_band_center); /* Wait for lock */ i = 0; do { mt2131_readreg(priv, 0x08, &lockval); if ((lockval & 0x88) == 0x88) break; msleep(4); i++; } while (i < 10); return ret; } static int mt2131_get_frequency(struct dvb_frontend *fe, u32 *frequency) { struct mt2131_priv *priv = fe->tuner_priv; dprintk(1, "%s()\n", __func__); *frequency = priv->frequency; return 0; } static int mt2131_get_status(struct dvb_frontend *fe, u32 *status) { struct mt2131_priv *priv = fe->tuner_priv; u8 lock_status = 0; u8 afc_status = 0; *status = 0; mt2131_readreg(priv, 0x08, &lock_status); if ((lock_status & 0x88) == 0x88) *status = TUNER_STATUS_LOCKED; mt2131_readreg(priv, 0x09, &afc_status); dprintk(1, "%s() - LO Status = 0x%x, AFC Status = 0x%x\n", __func__, lock_status, afc_status); return 0; } static int mt2131_init(struct dvb_frontend *fe) { struct mt2131_priv *priv = fe->tuner_priv; int ret; dprintk(1, "%s()\n", __func__); if ((ret = mt2131_writeregs(priv, mt2131_config1, sizeof(mt2131_config1))) < 0) return ret; mt2131_writereg(priv, 0x0b, 0x09); mt2131_writereg(priv, 0x15, 0x47); mt2131_writereg(priv, 0x07, 0xf2); mt2131_writereg(priv, 0x0b, 0x01); if ((ret = mt2131_writeregs(priv, mt2131_config2, sizeof(mt2131_config2))) < 0) return ret; return ret; } static int mt2131_release(struct dvb_frontend *fe) { dprintk(1, "%s()\n", __func__); kfree(fe->tuner_priv); fe->tuner_priv = NULL; return 0; } static const struct dvb_tuner_ops mt2131_tuner_ops = { .info = { .name = "Microtune MT2131", .frequency_min = 48000000, .frequency_max = 860000000, .frequency_step = 50000, }, .release = mt2131_release, .init = mt2131_init, .set_params = mt2131_set_params, .get_frequency = mt2131_get_frequency, .get_status = mt2131_get_status }; struct dvb_frontend * mt2131_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct mt2131_config *cfg, u16 if1) { struct mt2131_priv *priv = NULL; u8 id = 0; dprintk(1, "%s()\n", __func__); priv = kzalloc(sizeof(struct mt2131_priv), GFP_KERNEL); if (priv == NULL) return NULL; priv->cfg = cfg; priv->i2c = i2c; if (mt2131_readreg(priv, 0, &id) != 0) { kfree(priv); return NULL; } if ( (id != 0x3E) && (id != 0x3F) ) { printk(KERN_ERR "MT2131: Device not found at addr 0x%02x\n", cfg->i2c_address); kfree(priv); return NULL; } printk(KERN_INFO "MT2131: successfully identified at address 0x%02x\n", cfg->i2c_address); memcpy(&fe->ops.tuner_ops, &mt2131_tuner_ops, sizeof(struct dvb_tuner_ops)); fe->tuner_priv = priv; return fe; } EXPORT_SYMBOL(mt2131_attach); MODULE_AUTHOR("Steven Toth"); MODULE_DESCRIPTION("Microtune MT2131 silicon tuner driver"); MODULE_LICENSE("GPL");
gpl-2.0
cavium-thunderx-open-source/linux
drivers/spi/spi-adi-v3.c
1431
25475
/* * Analog Devices SPI3 controller driver * * Copyright (c) 2014 Analog Devices Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #include <linux/clk.h> #include <linux/delay.h> #include <linux/device.h> #include <linux/dma-mapping.h> #include <linux/errno.h> #include <linux/gpio.h> #include <linux/init.h> #include <linux/interrupt.h> #include <linux/io.h> #include <linux/ioport.h> #include <linux/module.h> #include <linux/platform_device.h> #include <linux/slab.h> #include <linux/spi/spi.h> #include <linux/spi/adi_spi3.h> #include <linux/types.h> #include <asm/dma.h> #include <asm/portmux.h> enum adi_spi_state { START_STATE, RUNNING_STATE, DONE_STATE, ERROR_STATE }; struct adi_spi_master; struct adi_spi_transfer_ops { void (*write) (struct adi_spi_master *); void (*read) (struct adi_spi_master *); void (*duplex) (struct adi_spi_master *); }; /* runtime info for spi master */ struct adi_spi_master { /* SPI framework hookup */ struct spi_master *master; /* Regs base of SPI controller */ struct adi_spi_regs __iomem *regs; /* Pin request list */ u16 *pin_req; /* Message Transfer pump */ struct tasklet_struct pump_transfers; /* Current message transfer state info */ struct spi_message *cur_msg; struct spi_transfer *cur_transfer; struct adi_spi_device *cur_chip; unsigned transfer_len; /* transfer buffer */ void *tx; void *tx_end; void *rx; void *rx_end; /* dma info */ unsigned int tx_dma; unsigned int rx_dma; dma_addr_t tx_dma_addr; dma_addr_t rx_dma_addr; unsigned long dummy_buffer; /* used in unidirectional transfer */ unsigned long tx_dma_size; unsigned long rx_dma_size; int tx_num; int rx_num; /* store register value for suspend/resume */ u32 control; u32 ssel; unsigned long sclk; enum adi_spi_state state; const struct adi_spi_transfer_ops *ops; }; struct adi_spi_device { u32 control; u32 clock; u32 ssel; u8 cs; u16 cs_chg_udelay; /* Some devices require > 255usec delay */ u32 cs_gpio; u32 tx_dummy_val; /* tx value for rx only transfer */ bool enable_dma; const struct adi_spi_transfer_ops *ops; }; static void adi_spi_enable(struct adi_spi_master *drv_data) { u32 ctl; ctl = ioread32(&drv_data->regs->control); ctl |= SPI_CTL_EN; iowrite32(ctl, &drv_data->regs->control); } static void adi_spi_disable(struct adi_spi_master *drv_data) { u32 ctl; ctl = ioread32(&drv_data->regs->control); ctl &= ~SPI_CTL_EN; iowrite32(ctl, &drv_data->regs->control); } /* Caculate the SPI_CLOCK register value based on input HZ */ static u32 hz_to_spi_clock(u32 sclk, u32 speed_hz) { u32 spi_clock = sclk / speed_hz; if (spi_clock) spi_clock--; return spi_clock; } static int adi_spi_flush(struct adi_spi_master *drv_data) { unsigned long limit = loops_per_jiffy << 1; /* wait for stop and clear stat */ while (!(ioread32(&drv_data->regs->status) & SPI_STAT_SPIF) && --limit) cpu_relax(); iowrite32(0xFFFFFFFF, &drv_data->regs->status); return limit; } /* Chip select operation functions for cs_change flag */ static void adi_spi_cs_active(struct adi_spi_master *drv_data, struct adi_spi_device *chip) { if (likely(chip->cs < MAX_CTRL_CS)) { u32 reg; reg = ioread32(&drv_data->regs->ssel); reg &= ~chip->ssel; iowrite32(reg, &drv_data->regs->ssel); } else { gpio_set_value(chip->cs_gpio, 0); } } static void adi_spi_cs_deactive(struct adi_spi_master *drv_data, struct adi_spi_device *chip) { if (likely(chip->cs < MAX_CTRL_CS)) { u32 reg; reg = ioread32(&drv_data->regs->ssel); reg |= chip->ssel; iowrite32(reg, &drv_data->regs->ssel); } else { gpio_set_value(chip->cs_gpio, 1); } /* Move delay here for consistency */ if (chip->cs_chg_udelay) udelay(chip->cs_chg_udelay); } /* enable or disable the pin muxed by GPIO and SPI CS to work as SPI CS */ static inline void adi_spi_cs_enable(struct adi_spi_master *drv_data, struct adi_spi_device *chip) { if (chip->cs < MAX_CTRL_CS) { u32 reg; reg = ioread32(&drv_data->regs->ssel); reg |= chip->ssel >> 8; iowrite32(reg, &drv_data->regs->ssel); } } static inline void adi_spi_cs_disable(struct adi_spi_master *drv_data, struct adi_spi_device *chip) { if (chip->cs < MAX_CTRL_CS) { u32 reg; reg = ioread32(&drv_data->regs->ssel); reg &= ~(chip->ssel >> 8); iowrite32(reg, &drv_data->regs->ssel); } } /* stop controller and re-config current chip*/ static void adi_spi_restore_state(struct adi_spi_master *drv_data) { struct adi_spi_device *chip = drv_data->cur_chip; /* Clear status and disable clock */ iowrite32(0xFFFFFFFF, &drv_data->regs->status); iowrite32(0x0, &drv_data->regs->rx_control); iowrite32(0x0, &drv_data->regs->tx_control); adi_spi_disable(drv_data); /* Load the registers */ iowrite32(chip->control, &drv_data->regs->control); iowrite32(chip->clock, &drv_data->regs->clock); adi_spi_enable(drv_data); drv_data->tx_num = drv_data->rx_num = 0; /* we always choose tx transfer initiate */ iowrite32(SPI_RXCTL_REN, &drv_data->regs->rx_control); iowrite32(SPI_TXCTL_TEN | SPI_TXCTL_TTI, &drv_data->regs->tx_control); adi_spi_cs_active(drv_data, chip); } /* discard invalid rx data and empty rfifo */ static inline void dummy_read(struct adi_spi_master *drv_data) { while (!(ioread32(&drv_data->regs->status) & SPI_STAT_RFE)) ioread32(&drv_data->regs->rfifo); } static void adi_spi_u8_write(struct adi_spi_master *drv_data) { dummy_read(drv_data); while (drv_data->tx < drv_data->tx_end) { iowrite32(*(u8 *)(drv_data->tx++), &drv_data->regs->tfifo); while (ioread32(&drv_data->regs->status) & SPI_STAT_RFE) cpu_relax(); ioread32(&drv_data->regs->rfifo); } } static void adi_spi_u8_read(struct adi_spi_master *drv_data) { u32 tx_val = drv_data->cur_chip->tx_dummy_val; dummy_read(drv_data); while (drv_data->rx < drv_data->rx_end) { iowrite32(tx_val, &drv_data->regs->tfifo); while (ioread32(&drv_data->regs->status) & SPI_STAT_RFE) cpu_relax(); *(u8 *)(drv_data->rx++) = ioread32(&drv_data->regs->rfifo); } } static void adi_spi_u8_duplex(struct adi_spi_master *drv_data) { dummy_read(drv_data); while (drv_data->rx < drv_data->rx_end) { iowrite32(*(u8 *)(drv_data->tx++), &drv_data->regs->tfifo); while (ioread32(&drv_data->regs->status) & SPI_STAT_RFE) cpu_relax(); *(u8 *)(drv_data->rx++) = ioread32(&drv_data->regs->rfifo); } } static const struct adi_spi_transfer_ops adi_spi_transfer_ops_u8 = { .write = adi_spi_u8_write, .read = adi_spi_u8_read, .duplex = adi_spi_u8_duplex, }; static void adi_spi_u16_write(struct adi_spi_master *drv_data) { dummy_read(drv_data); while (drv_data->tx < drv_data->tx_end) { iowrite32(*(u16 *)drv_data->tx, &drv_data->regs->tfifo); drv_data->tx += 2; while (ioread32(&drv_data->regs->status) & SPI_STAT_RFE) cpu_relax(); ioread32(&drv_data->regs->rfifo); } } static void adi_spi_u16_read(struct adi_spi_master *drv_data) { u32 tx_val = drv_data->cur_chip->tx_dummy_val; dummy_read(drv_data); while (drv_data->rx < drv_data->rx_end) { iowrite32(tx_val, &drv_data->regs->tfifo); while (ioread32(&drv_data->regs->status) & SPI_STAT_RFE) cpu_relax(); *(u16 *)drv_data->rx = ioread32(&drv_data->regs->rfifo); drv_data->rx += 2; } } static void adi_spi_u16_duplex(struct adi_spi_master *drv_data) { dummy_read(drv_data); while (drv_data->rx < drv_data->rx_end) { iowrite32(*(u16 *)drv_data->tx, &drv_data->regs->tfifo); drv_data->tx += 2; while (ioread32(&drv_data->regs->status) & SPI_STAT_RFE) cpu_relax(); *(u16 *)drv_data->rx = ioread32(&drv_data->regs->rfifo); drv_data->rx += 2; } } static const struct adi_spi_transfer_ops adi_spi_transfer_ops_u16 = { .write = adi_spi_u16_write, .read = adi_spi_u16_read, .duplex = adi_spi_u16_duplex, }; static void adi_spi_u32_write(struct adi_spi_master *drv_data) { dummy_read(drv_data); while (drv_data->tx < drv_data->tx_end) { iowrite32(*(u32 *)drv_data->tx, &drv_data->regs->tfifo); drv_data->tx += 4; while (ioread32(&drv_data->regs->status) & SPI_STAT_RFE) cpu_relax(); ioread32(&drv_data->regs->rfifo); } } static void adi_spi_u32_read(struct adi_spi_master *drv_data) { u32 tx_val = drv_data->cur_chip->tx_dummy_val; dummy_read(drv_data); while (drv_data->rx < drv_data->rx_end) { iowrite32(tx_val, &drv_data->regs->tfifo); while (ioread32(&drv_data->regs->status) & SPI_STAT_RFE) cpu_relax(); *(u32 *)drv_data->rx = ioread32(&drv_data->regs->rfifo); drv_data->rx += 4; } } static void adi_spi_u32_duplex(struct adi_spi_master *drv_data) { dummy_read(drv_data); while (drv_data->rx < drv_data->rx_end) { iowrite32(*(u32 *)drv_data->tx, &drv_data->regs->tfifo); drv_data->tx += 4; while (ioread32(&drv_data->regs->status) & SPI_STAT_RFE) cpu_relax(); *(u32 *)drv_data->rx = ioread32(&drv_data->regs->rfifo); drv_data->rx += 4; } } static const struct adi_spi_transfer_ops adi_spi_transfer_ops_u32 = { .write = adi_spi_u32_write, .read = adi_spi_u32_read, .duplex = adi_spi_u32_duplex, }; /* test if there is more transfer to be done */ static void adi_spi_next_transfer(struct adi_spi_master *drv) { struct spi_message *msg = drv->cur_msg; struct spi_transfer *t = drv->cur_transfer; /* Move to next transfer */ if (t->transfer_list.next != &msg->transfers) { drv->cur_transfer = list_entry(t->transfer_list.next, struct spi_transfer, transfer_list); drv->state = RUNNING_STATE; } else { drv->state = DONE_STATE; drv->cur_transfer = NULL; } } static void adi_spi_giveback(struct adi_spi_master *drv_data) { struct adi_spi_device *chip = drv_data->cur_chip; adi_spi_cs_deactive(drv_data, chip); spi_finalize_current_message(drv_data->master); } static int adi_spi_setup_transfer(struct adi_spi_master *drv) { struct spi_transfer *t = drv->cur_transfer; u32 cr, cr_width; if (t->tx_buf) { drv->tx = (void *)t->tx_buf; drv->tx_end = drv->tx + t->len; } else { drv->tx = NULL; } if (t->rx_buf) { drv->rx = t->rx_buf; drv->rx_end = drv->rx + t->len; } else { drv->rx = NULL; } drv->transfer_len = t->len; /* bits per word setup */ switch (t->bits_per_word) { case 8: cr_width = SPI_CTL_SIZE08; drv->ops = &adi_spi_transfer_ops_u8; break; case 16: cr_width = SPI_CTL_SIZE16; drv->ops = &adi_spi_transfer_ops_u16; break; case 32: cr_width = SPI_CTL_SIZE32; drv->ops = &adi_spi_transfer_ops_u32; break; default: return -EINVAL; } cr = ioread32(&drv->regs->control) & ~SPI_CTL_SIZE; cr |= cr_width; iowrite32(cr, &drv->regs->control); /* speed setup */ iowrite32(hz_to_spi_clock(drv->sclk, t->speed_hz), &drv->regs->clock); return 0; } static int adi_spi_dma_xfer(struct adi_spi_master *drv_data) { struct spi_transfer *t = drv_data->cur_transfer; struct spi_message *msg = drv_data->cur_msg; struct adi_spi_device *chip = drv_data->cur_chip; u32 dma_config; unsigned long word_count, word_size; void *tx_buf, *rx_buf; switch (t->bits_per_word) { case 8: dma_config = WDSIZE_8 | PSIZE_8; word_count = drv_data->transfer_len; word_size = 1; break; case 16: dma_config = WDSIZE_16 | PSIZE_16; word_count = drv_data->transfer_len / 2; word_size = 2; break; default: dma_config = WDSIZE_32 | PSIZE_32; word_count = drv_data->transfer_len / 4; word_size = 4; break; } if (!drv_data->rx) { tx_buf = drv_data->tx; rx_buf = &drv_data->dummy_buffer; drv_data->tx_dma_size = drv_data->transfer_len; drv_data->rx_dma_size = sizeof(drv_data->dummy_buffer); set_dma_x_modify(drv_data->tx_dma, word_size); set_dma_x_modify(drv_data->rx_dma, 0); } else if (!drv_data->tx) { drv_data->dummy_buffer = chip->tx_dummy_val; tx_buf = &drv_data->dummy_buffer; rx_buf = drv_data->rx; drv_data->tx_dma_size = sizeof(drv_data->dummy_buffer); drv_data->rx_dma_size = drv_data->transfer_len; set_dma_x_modify(drv_data->tx_dma, 0); set_dma_x_modify(drv_data->rx_dma, word_size); } else { tx_buf = drv_data->tx; rx_buf = drv_data->rx; drv_data->tx_dma_size = drv_data->rx_dma_size = drv_data->transfer_len; set_dma_x_modify(drv_data->tx_dma, word_size); set_dma_x_modify(drv_data->rx_dma, word_size); } drv_data->tx_dma_addr = dma_map_single(&msg->spi->dev, (void *)tx_buf, drv_data->tx_dma_size, DMA_TO_DEVICE); if (dma_mapping_error(&msg->spi->dev, drv_data->tx_dma_addr)) return -ENOMEM; drv_data->rx_dma_addr = dma_map_single(&msg->spi->dev, (void *)rx_buf, drv_data->rx_dma_size, DMA_FROM_DEVICE); if (dma_mapping_error(&msg->spi->dev, drv_data->rx_dma_addr)) { dma_unmap_single(&msg->spi->dev, drv_data->tx_dma_addr, drv_data->tx_dma_size, DMA_TO_DEVICE); return -ENOMEM; } dummy_read(drv_data); set_dma_x_count(drv_data->tx_dma, word_count); set_dma_x_count(drv_data->rx_dma, word_count); set_dma_start_addr(drv_data->tx_dma, drv_data->tx_dma_addr); set_dma_start_addr(drv_data->rx_dma, drv_data->rx_dma_addr); dma_config |= DMAFLOW_STOP | RESTART | DI_EN; set_dma_config(drv_data->tx_dma, dma_config); set_dma_config(drv_data->rx_dma, dma_config | WNR); enable_dma(drv_data->tx_dma); enable_dma(drv_data->rx_dma); iowrite32(SPI_RXCTL_REN | SPI_RXCTL_RDR_NE, &drv_data->regs->rx_control); iowrite32(SPI_TXCTL_TEN | SPI_TXCTL_TTI | SPI_TXCTL_TDR_NF, &drv_data->regs->tx_control); return 0; } static int adi_spi_pio_xfer(struct adi_spi_master *drv_data) { struct spi_message *msg = drv_data->cur_msg; if (!drv_data->rx) { /* write only half duplex */ drv_data->ops->write(drv_data); if (drv_data->tx != drv_data->tx_end) return -EIO; } else if (!drv_data->tx) { /* read only half duplex */ drv_data->ops->read(drv_data); if (drv_data->rx != drv_data->rx_end) return -EIO; } else { /* full duplex mode */ drv_data->ops->duplex(drv_data); if (drv_data->tx != drv_data->tx_end) return -EIO; } if (!adi_spi_flush(drv_data)) return -EIO; msg->actual_length += drv_data->transfer_len; tasklet_schedule(&drv_data->pump_transfers); return 0; } static void adi_spi_pump_transfers(unsigned long data) { struct adi_spi_master *drv_data = (struct adi_spi_master *)data; struct spi_message *msg = NULL; struct spi_transfer *t = NULL; struct adi_spi_device *chip = NULL; int ret; /* Get current state information */ msg = drv_data->cur_msg; t = drv_data->cur_transfer; chip = drv_data->cur_chip; /* Handle for abort */ if (drv_data->state == ERROR_STATE) { msg->status = -EIO; adi_spi_giveback(drv_data); return; } if (drv_data->state == RUNNING_STATE) { if (t->delay_usecs) udelay(t->delay_usecs); if (t->cs_change) adi_spi_cs_deactive(drv_data, chip); adi_spi_next_transfer(drv_data); t = drv_data->cur_transfer; } /* Handle end of message */ if (drv_data->state == DONE_STATE) { msg->status = 0; adi_spi_giveback(drv_data); return; } if ((t->len == 0) || (t->tx_buf == NULL && t->rx_buf == NULL)) { /* Schedule next transfer tasklet */ tasklet_schedule(&drv_data->pump_transfers); return; } ret = adi_spi_setup_transfer(drv_data); if (ret) { msg->status = ret; adi_spi_giveback(drv_data); } iowrite32(0xFFFFFFFF, &drv_data->regs->status); adi_spi_cs_active(drv_data, chip); drv_data->state = RUNNING_STATE; if (chip->enable_dma) ret = adi_spi_dma_xfer(drv_data); else ret = adi_spi_pio_xfer(drv_data); if (ret) { msg->status = ret; adi_spi_giveback(drv_data); } } static int adi_spi_transfer_one_message(struct spi_master *master, struct spi_message *m) { struct adi_spi_master *drv_data = spi_master_get_devdata(master); drv_data->cur_msg = m; drv_data->cur_chip = spi_get_ctldata(drv_data->cur_msg->spi); adi_spi_restore_state(drv_data); drv_data->state = START_STATE; drv_data->cur_transfer = list_entry(drv_data->cur_msg->transfers.next, struct spi_transfer, transfer_list); tasklet_schedule(&drv_data->pump_transfers); return 0; } #define MAX_SPI_SSEL 7 static const u16 ssel[][MAX_SPI_SSEL] = { {P_SPI0_SSEL1, P_SPI0_SSEL2, P_SPI0_SSEL3, P_SPI0_SSEL4, P_SPI0_SSEL5, P_SPI0_SSEL6, P_SPI0_SSEL7}, {P_SPI1_SSEL1, P_SPI1_SSEL2, P_SPI1_SSEL3, P_SPI1_SSEL4, P_SPI1_SSEL5, P_SPI1_SSEL6, P_SPI1_SSEL7}, {P_SPI2_SSEL1, P_SPI2_SSEL2, P_SPI2_SSEL3, P_SPI2_SSEL4, P_SPI2_SSEL5, P_SPI2_SSEL6, P_SPI2_SSEL7}, }; static int adi_spi_setup(struct spi_device *spi) { struct adi_spi_master *drv_data = spi_master_get_devdata(spi->master); struct adi_spi_device *chip = spi_get_ctldata(spi); u32 ctl_reg = SPI_CTL_ODM | SPI_CTL_PSSE; int ret = -EINVAL; if (!chip) { struct adi_spi3_chip *chip_info = spi->controller_data; chip = kzalloc(sizeof(*chip), GFP_KERNEL); if (!chip) return -ENOMEM; if (chip_info) { if (chip_info->control & ~ctl_reg) { dev_err(&spi->dev, "do not set bits that the SPI framework manages\n"); goto error; } chip->control = chip_info->control; chip->cs_chg_udelay = chip_info->cs_chg_udelay; chip->tx_dummy_val = chip_info->tx_dummy_val; chip->enable_dma = chip_info->enable_dma; } chip->cs = spi->chip_select; if (chip->cs < MAX_CTRL_CS) { chip->ssel = (1 << chip->cs) << 8; ret = peripheral_request(ssel[spi->master->bus_num] [chip->cs-1], dev_name(&spi->dev)); if (ret) { dev_err(&spi->dev, "peripheral_request() error\n"); goto error; } } else { chip->cs_gpio = chip->cs - MAX_CTRL_CS; ret = gpio_request_one(chip->cs_gpio, GPIOF_OUT_INIT_HIGH, dev_name(&spi->dev)); if (ret) { dev_err(&spi->dev, "gpio_request_one() error\n"); goto error; } } spi_set_ctldata(spi, chip); } /* force a default base state */ chip->control &= ctl_reg; if (spi->mode & SPI_CPOL) chip->control |= SPI_CTL_CPOL; if (spi->mode & SPI_CPHA) chip->control |= SPI_CTL_CPHA; if (spi->mode & SPI_LSB_FIRST) chip->control |= SPI_CTL_LSBF; chip->control |= SPI_CTL_MSTR; /* we choose software to controll cs */ chip->control &= ~SPI_CTL_ASSEL; chip->clock = hz_to_spi_clock(drv_data->sclk, spi->max_speed_hz); adi_spi_cs_enable(drv_data, chip); adi_spi_cs_deactive(drv_data, chip); return 0; error: if (chip) { kfree(chip); spi_set_ctldata(spi, NULL); } return ret; } static void adi_spi_cleanup(struct spi_device *spi) { struct adi_spi_device *chip = spi_get_ctldata(spi); struct adi_spi_master *drv_data = spi_master_get_devdata(spi->master); if (!chip) return; if (chip->cs < MAX_CTRL_CS) { peripheral_free(ssel[spi->master->bus_num] [chip->cs-1]); adi_spi_cs_disable(drv_data, chip); } else { gpio_free(chip->cs_gpio); } kfree(chip); spi_set_ctldata(spi, NULL); } static irqreturn_t adi_spi_tx_dma_isr(int irq, void *dev_id) { struct adi_spi_master *drv_data = dev_id; u32 dma_stat = get_dma_curr_irqstat(drv_data->tx_dma); u32 tx_ctl; clear_dma_irqstat(drv_data->tx_dma); if (dma_stat & DMA_DONE) { drv_data->tx_num++; } else { dev_err(&drv_data->master->dev, "spi tx dma error: %d\n", dma_stat); if (drv_data->tx) drv_data->state = ERROR_STATE; } tx_ctl = ioread32(&drv_data->regs->tx_control); tx_ctl &= ~SPI_TXCTL_TDR_NF; iowrite32(tx_ctl, &drv_data->regs->tx_control); return IRQ_HANDLED; } static irqreturn_t adi_spi_rx_dma_isr(int irq, void *dev_id) { struct adi_spi_master *drv_data = dev_id; struct spi_message *msg = drv_data->cur_msg; u32 dma_stat = get_dma_curr_irqstat(drv_data->rx_dma); clear_dma_irqstat(drv_data->rx_dma); if (dma_stat & DMA_DONE) { drv_data->rx_num++; /* we may fail on tx dma */ if (drv_data->state != ERROR_STATE) msg->actual_length += drv_data->transfer_len; } else { drv_data->state = ERROR_STATE; dev_err(&drv_data->master->dev, "spi rx dma error: %d\n", dma_stat); } iowrite32(0, &drv_data->regs->tx_control); iowrite32(0, &drv_data->regs->rx_control); if (drv_data->rx_num != drv_data->tx_num) dev_dbg(&drv_data->master->dev, "dma interrupt missing: tx=%d,rx=%d\n", drv_data->tx_num, drv_data->rx_num); tasklet_schedule(&drv_data->pump_transfers); return IRQ_HANDLED; } static int adi_spi_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct adi_spi3_master *info = dev_get_platdata(dev); struct spi_master *master; struct adi_spi_master *drv_data; struct resource *mem, *res; unsigned int tx_dma, rx_dma; struct clk *sclk; int ret; if (!info) { dev_err(dev, "platform data missing!\n"); return -ENODEV; } sclk = devm_clk_get(dev, "spi"); if (IS_ERR(sclk)) { dev_err(dev, "can not get spi clock\n"); return PTR_ERR(sclk); } res = platform_get_resource(pdev, IORESOURCE_DMA, 0); if (!res) { dev_err(dev, "can not get tx dma resource\n"); return -ENXIO; } tx_dma = res->start; res = platform_get_resource(pdev, IORESOURCE_DMA, 1); if (!res) { dev_err(dev, "can not get rx dma resource\n"); return -ENXIO; } rx_dma = res->start; /* allocate master with space for drv_data */ master = spi_alloc_master(dev, sizeof(*drv_data)); if (!master) { dev_err(dev, "can not alloc spi_master\n"); return -ENOMEM; } platform_set_drvdata(pdev, master); /* the mode bits supported by this driver */ master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST; master->bus_num = pdev->id; master->num_chipselect = info->num_chipselect; master->cleanup = adi_spi_cleanup; master->setup = adi_spi_setup; master->transfer_one_message = adi_spi_transfer_one_message; master->bits_per_word_mask = SPI_BPW_MASK(32) | SPI_BPW_MASK(16) | SPI_BPW_MASK(8); drv_data = spi_master_get_devdata(master); drv_data->master = master; drv_data->tx_dma = tx_dma; drv_data->rx_dma = rx_dma; drv_data->pin_req = info->pin_req; drv_data->sclk = clk_get_rate(sclk); mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); drv_data->regs = devm_ioremap_resource(dev, mem); if (IS_ERR(drv_data->regs)) { ret = PTR_ERR(drv_data->regs); goto err_put_master; } /* request tx and rx dma */ ret = request_dma(tx_dma, "SPI_TX_DMA"); if (ret) { dev_err(dev, "can not request SPI TX DMA channel\n"); goto err_put_master; } set_dma_callback(tx_dma, adi_spi_tx_dma_isr, drv_data); ret = request_dma(rx_dma, "SPI_RX_DMA"); if (ret) { dev_err(dev, "can not request SPI RX DMA channel\n"); goto err_free_tx_dma; } set_dma_callback(drv_data->rx_dma, adi_spi_rx_dma_isr, drv_data); /* request CLK, MOSI and MISO */ ret = peripheral_request_list(drv_data->pin_req, "adi-spi3"); if (ret < 0) { dev_err(dev, "can not request spi pins\n"); goto err_free_rx_dma; } iowrite32(SPI_CTL_MSTR | SPI_CTL_CPHA, &drv_data->regs->control); iowrite32(0x0000FE00, &drv_data->regs->ssel); iowrite32(0x0, &drv_data->regs->delay); tasklet_init(&drv_data->pump_transfers, adi_spi_pump_transfers, (unsigned long)drv_data); /* register with the SPI framework */ ret = devm_spi_register_master(dev, master); if (ret) { dev_err(dev, "can not register spi master\n"); goto err_free_peripheral; } return ret; err_free_peripheral: peripheral_free_list(drv_data->pin_req); err_free_rx_dma: free_dma(rx_dma); err_free_tx_dma: free_dma(tx_dma); err_put_master: spi_master_put(master); return ret; } static int adi_spi_remove(struct platform_device *pdev) { struct spi_master *master = platform_get_drvdata(pdev); struct adi_spi_master *drv_data = spi_master_get_devdata(master); adi_spi_disable(drv_data); peripheral_free_list(drv_data->pin_req); free_dma(drv_data->rx_dma); free_dma(drv_data->tx_dma); return 0; } #ifdef CONFIG_PM static int adi_spi_suspend(struct device *dev) { struct spi_master *master = dev_get_drvdata(dev); struct adi_spi_master *drv_data = spi_master_get_devdata(master); spi_master_suspend(master); drv_data->control = ioread32(&drv_data->regs->control); drv_data->ssel = ioread32(&drv_data->regs->ssel); iowrite32(SPI_CTL_MSTR | SPI_CTL_CPHA, &drv_data->regs->control); iowrite32(0x0000FE00, &drv_data->regs->ssel); dma_disable_irq(drv_data->rx_dma); dma_disable_irq(drv_data->tx_dma); return 0; } static int adi_spi_resume(struct device *dev) { struct spi_master *master = dev_get_drvdata(dev); struct adi_spi_master *drv_data = spi_master_get_devdata(master); int ret = 0; /* bootrom may modify spi and dma status when resume in spi boot mode */ disable_dma(drv_data->rx_dma); dma_enable_irq(drv_data->rx_dma); dma_enable_irq(drv_data->tx_dma); iowrite32(drv_data->control, &drv_data->regs->control); iowrite32(drv_data->ssel, &drv_data->regs->ssel); ret = spi_master_resume(master); if (ret) { free_dma(drv_data->rx_dma); free_dma(drv_data->tx_dma); } return ret; } #endif static const struct dev_pm_ops adi_spi_pm_ops = { SET_SYSTEM_SLEEP_PM_OPS(adi_spi_suspend, adi_spi_resume) }; MODULE_ALIAS("platform:adi-spi3"); static struct platform_driver adi_spi_driver = { .driver = { .name = "adi-spi3", .pm = &adi_spi_pm_ops, }, .remove = adi_spi_remove, }; module_platform_driver_probe(adi_spi_driver, adi_spi_probe); MODULE_DESCRIPTION("Analog Devices SPI3 controller driver"); MODULE_AUTHOR("Scott Jiang <Scott.Jiang.Linux@gmail.com>"); MODULE_LICENSE("GPL v2");
gpl-2.0
sudeepdutt/mic
arch/powerpc/platforms/44x/iss4xx.c
1431
4340
/* * PPC476 board specific routines * * Copyright 2010 Torez Smith, IBM Corporation. * * Based on earlier code: * Matt Porter <mporter@kernel.crashing.org> * Copyright 2002-2005 MontaVista Software Inc. * * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> * Copyright (c) 2003-2005 Zultys Technologies * * Rewritten and ported to the merged powerpc tree: * Copyright 2007 David Gibson <dwg@au1.ibm.com>, IBM Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. */ #include <linux/init.h> #include <linux/of_platform.h> #include <linux/rtc.h> #include <asm/machdep.h> #include <asm/prom.h> #include <asm/udbg.h> #include <asm/time.h> #include <asm/uic.h> #include <asm/ppc4xx.h> #include <asm/mpic.h> #include <asm/mmu.h> static const struct of_device_id iss4xx_of_bus[] __initconst = { { .compatible = "ibm,plb4", }, { .compatible = "ibm,plb6", }, { .compatible = "ibm,opb", }, { .compatible = "ibm,ebc", }, {}, }; static int __init iss4xx_device_probe(void) { of_platform_bus_probe(NULL, iss4xx_of_bus, NULL); of_instantiate_rtc(); return 0; } machine_device_initcall(iss4xx, iss4xx_device_probe); /* We can have either UICs or MPICs */ static void __init iss4xx_init_irq(void) { struct device_node *np; /* Find top level interrupt controller */ for_each_node_with_property(np, "interrupt-controller") { if (of_get_property(np, "interrupts", NULL) == NULL) break; } if (np == NULL) panic("Can't find top level interrupt controller"); /* Check type and do appropriate initialization */ if (of_device_is_compatible(np, "ibm,uic")) { uic_init_tree(); ppc_md.get_irq = uic_get_irq; #ifdef CONFIG_MPIC } else if (of_device_is_compatible(np, "chrp,open-pic")) { /* The MPIC driver will get everything it needs from the * device-tree, just pass 0 to all arguments */ struct mpic *mpic = mpic_alloc(np, 0, MPIC_NO_RESET, 0, 0, " MPIC "); BUG_ON(mpic == NULL); mpic_init(mpic); ppc_md.get_irq = mpic_get_irq; #endif } else panic("Unrecognized top level interrupt controller"); } #ifdef CONFIG_SMP static void smp_iss4xx_setup_cpu(int cpu) { mpic_setup_this_cpu(); } static int smp_iss4xx_kick_cpu(int cpu) { struct device_node *cpunode = of_get_cpu_node(cpu, NULL); const u64 *spin_table_addr_prop; u32 *spin_table; extern void start_secondary_47x(void); BUG_ON(cpunode == NULL); /* Assume spin table. We could test for the enable-method in * the device-tree but currently there's little point as it's * our only supported method */ spin_table_addr_prop = of_get_property(cpunode, "cpu-release-addr", NULL); if (spin_table_addr_prop == NULL) { pr_err("CPU%d: Can't start, missing cpu-release-addr !\n", cpu); return -ENOENT; } /* Assume it's mapped as part of the linear mapping. This is a bit * fishy but will work fine for now */ spin_table = (u32 *)__va(*spin_table_addr_prop); pr_debug("CPU%d: Spin table mapped at %p\n", cpu, spin_table); spin_table[3] = cpu; smp_wmb(); spin_table[1] = __pa(start_secondary_47x); mb(); return 0; } static struct smp_ops_t iss_smp_ops = { .probe = smp_mpic_probe, .message_pass = smp_mpic_message_pass, .setup_cpu = smp_iss4xx_setup_cpu, .kick_cpu = smp_iss4xx_kick_cpu, .give_timebase = smp_generic_give_timebase, .take_timebase = smp_generic_take_timebase, }; static void __init iss4xx_smp_init(void) { if (mmu_has_feature(MMU_FTR_TYPE_47x)) smp_ops = &iss_smp_ops; } #else /* CONFIG_SMP */ static void __init iss4xx_smp_init(void) { } #endif /* CONFIG_SMP */ static void __init iss4xx_setup_arch(void) { iss4xx_smp_init(); } /* * Called very early, MMU is off, device-tree isn't unflattened */ static int __init iss4xx_probe(void) { unsigned long root = of_get_flat_dt_root(); if (!of_flat_dt_is_compatible(root, "ibm,iss-4xx")) return 0; return 1; } define_machine(iss4xx) { .name = "ISS-4xx", .probe = iss4xx_probe, .progress = udbg_progress, .init_IRQ = iss4xx_init_irq, .setup_arch = iss4xx_setup_arch, .restart = ppc4xx_reset_system, .calibrate_decr = generic_calibrate_decr, };
gpl-2.0
sjp38/linux.rpi
arch/powerpc/platforms/44x/canyonlands.c
1431
3522
/* * This contain platform specific code for APM PPC460EX based Canyonlands * board. * * Copyright (c) 2010, Applied Micro Circuits Corporation * Author: Rupjyoti Sarmah <rsarmah@apm.com> * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA * */ #include <linux/kernel.h> #include <linux/init.h> #include <asm/pci-bridge.h> #include <asm/ppc4xx.h> #include <asm/udbg.h> #include <asm/uic.h> #include <linux/of_platform.h> #include <linux/delay.h> #include "44x.h" #define BCSR_USB_EN 0x11 static const struct of_device_id ppc460ex_of_bus[] __initconst = { { .compatible = "ibm,plb4", }, { .compatible = "ibm,opb", }, { .compatible = "ibm,ebc", }, { .compatible = "simple-bus", }, {}, }; static int __init ppc460ex_device_probe(void) { of_platform_bus_probe(NULL, ppc460ex_of_bus, NULL); return 0; } machine_device_initcall(canyonlands, ppc460ex_device_probe); /* Using this code only for the Canyonlands board. */ static int __init ppc460ex_probe(void) { unsigned long root = of_get_flat_dt_root(); if (of_flat_dt_is_compatible(root, "amcc,canyonlands")) { pci_set_flags(PCI_REASSIGN_ALL_RSRC); return 1; } return 0; } /* USB PHY fixup code on Canyonlands kit. */ static int __init ppc460ex_canyonlands_fixup(void) { u8 __iomem *bcsr ; void __iomem *vaddr; struct device_node *np; int ret = 0; np = of_find_compatible_node(NULL, NULL, "amcc,ppc460ex-bcsr"); if (!np) { printk(KERN_ERR "failed did not find amcc, ppc460ex bcsr node\n"); return -ENODEV; } bcsr = of_iomap(np, 0); of_node_put(np); if (!bcsr) { printk(KERN_CRIT "Could not remap bcsr\n"); ret = -ENODEV; goto err_bcsr; } np = of_find_compatible_node(NULL, NULL, "ibm,ppc4xx-gpio"); if (!np) { printk(KERN_ERR "failed did not find ibm,ppc4xx-gpio node\n"); return -ENODEV; } vaddr = of_iomap(np, 0); of_node_put(np); if (!vaddr) { printk(KERN_CRIT "Could not get gpio node address\n"); ret = -ENODEV; goto err_gpio; } /* Disable USB, through the BCSR7 bits */ setbits8(&bcsr[7], BCSR_USB_EN); /* Wait for a while after reset */ msleep(100); /* Enable USB here */ clrbits8(&bcsr[7], BCSR_USB_EN); /* * Configure multiplexed gpio16 and gpio19 as alternate1 output * source after USB reset. In this configuration gpio16 will be * USB2HStop and gpio19 will be USB2DStop. For more details refer to * table 34-7 of PPC460EX user manual. */ setbits32((vaddr + GPIO0_OSRH), 0x42000000); setbits32((vaddr + GPIO0_TSRH), 0x42000000); err_gpio: iounmap(vaddr); err_bcsr: iounmap(bcsr); return ret; } machine_device_initcall(canyonlands, ppc460ex_canyonlands_fixup); define_machine(canyonlands) { .name = "Canyonlands", .probe = ppc460ex_probe, .progress = udbg_progress, .init_IRQ = uic_init_tree, .get_irq = uic_get_irq, .restart = ppc4xx_reset_system, .calibrate_decr = generic_calibrate_decr, };
gpl-2.0
ciwrl/android_kernel_huawei_msm8939
drivers/media/dvb-frontends/tda8083.c
2455
12065
/* Driver for Philips TDA8083 based QPSK Demodulator Copyright (C) 2001 Convergence Integrated Media GmbH written by Ralph Metzler <ralph@convergence.de> adoption to the new DVB frontend API and diagnostic ioctl's by Holger Waechtler <holger@convergence.de> This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ #include <linux/init.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/string.h> #include <linux/slab.h> #include <linux/jiffies.h> #include "dvb_frontend.h" #include "tda8083.h" struct tda8083_state { struct i2c_adapter* i2c; /* configuration settings */ const struct tda8083_config* config; struct dvb_frontend frontend; }; static int debug; #define dprintk(args...) \ do { \ if (debug) printk(KERN_DEBUG "tda8083: " args); \ } while (0) static u8 tda8083_init_tab [] = { 0x04, 0x00, 0x4a, 0x79, 0x04, 0x00, 0xff, 0xea, 0x48, 0x42, 0x79, 0x60, 0x70, 0x52, 0x9a, 0x10, 0x0e, 0x10, 0xf2, 0xa7, 0x93, 0x0b, 0x05, 0xc8, 0x9d, 0x00, 0x42, 0x80, 0x00, 0x60, 0x40, 0x00, 0x00, 0x75, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; static int tda8083_writereg (struct tda8083_state* state, u8 reg, u8 data) { int ret; u8 buf [] = { reg, data }; struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 }; ret = i2c_transfer(state->i2c, &msg, 1); if (ret != 1) dprintk ("%s: writereg error (reg %02x, ret == %i)\n", __func__, reg, ret); return (ret != 1) ? -1 : 0; } static int tda8083_readregs (struct tda8083_state* state, u8 reg1, u8 *b, u8 len) { int ret; struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = &reg1, .len = 1 }, { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b, .len = len } }; ret = i2c_transfer(state->i2c, msg, 2); if (ret != 2) dprintk ("%s: readreg error (reg %02x, ret == %i)\n", __func__, reg1, ret); return ret == 2 ? 0 : -1; } static inline u8 tda8083_readreg (struct tda8083_state* state, u8 reg) { u8 val; tda8083_readregs (state, reg, &val, 1); return val; } static int tda8083_set_inversion (struct tda8083_state* state, fe_spectral_inversion_t inversion) { /* XXX FIXME: implement other modes than FEC_AUTO */ if (inversion == INVERSION_AUTO) return 0; return -EINVAL; } static int tda8083_set_fec (struct tda8083_state* state, fe_code_rate_t fec) { if (fec == FEC_AUTO) return tda8083_writereg (state, 0x07, 0xff); if (fec >= FEC_1_2 && fec <= FEC_8_9) return tda8083_writereg (state, 0x07, 1 << (FEC_8_9 - fec)); return -EINVAL; } static fe_code_rate_t tda8083_get_fec (struct tda8083_state* state) { u8 index; static fe_code_rate_t fec_tab [] = { FEC_8_9, FEC_1_2, FEC_2_3, FEC_3_4, FEC_4_5, FEC_5_6, FEC_6_7, FEC_7_8 }; index = tda8083_readreg(state, 0x0e) & 0x07; return fec_tab [index]; } static int tda8083_set_symbolrate (struct tda8083_state* state, u32 srate) { u32 ratio; u32 tmp; u8 filter; if (srate > 32000000) srate = 32000000; if (srate < 500000) srate = 500000; filter = 0; if (srate < 24000000) filter = 2; if (srate < 16000000) filter = 3; tmp = 31250 << 16; ratio = tmp / srate; tmp = (tmp % srate) << 8; ratio = (ratio << 8) + tmp / srate; tmp = (tmp % srate) << 8; ratio = (ratio << 8) + tmp / srate; dprintk("tda8083: ratio == %08x\n", (unsigned int) ratio); tda8083_writereg (state, 0x05, filter); tda8083_writereg (state, 0x02, (ratio >> 16) & 0xff); tda8083_writereg (state, 0x03, (ratio >> 8) & 0xff); tda8083_writereg (state, 0x04, (ratio ) & 0xff); tda8083_writereg (state, 0x00, 0x3c); tda8083_writereg (state, 0x00, 0x04); return 1; } static void tda8083_wait_diseqc_fifo (struct tda8083_state* state, int timeout) { unsigned long start = jiffies; while (jiffies - start < timeout && !(tda8083_readreg(state, 0x02) & 0x80)) { msleep(50); } } static int tda8083_set_tone (struct tda8083_state* state, fe_sec_tone_mode_t tone) { tda8083_writereg (state, 0x26, 0xf1); switch (tone) { case SEC_TONE_OFF: return tda8083_writereg (state, 0x29, 0x00); case SEC_TONE_ON: return tda8083_writereg (state, 0x29, 0x80); default: return -EINVAL; }; } static int tda8083_set_voltage (struct tda8083_state* state, fe_sec_voltage_t voltage) { switch (voltage) { case SEC_VOLTAGE_13: return tda8083_writereg (state, 0x20, 0x00); case SEC_VOLTAGE_18: return tda8083_writereg (state, 0x20, 0x11); default: return -EINVAL; }; } static int tda8083_send_diseqc_burst (struct tda8083_state* state, fe_sec_mini_cmd_t burst) { switch (burst) { case SEC_MINI_A: tda8083_writereg (state, 0x29, (5 << 2)); /* send burst A */ break; case SEC_MINI_B: tda8083_writereg (state, 0x29, (7 << 2)); /* send B */ break; default: return -EINVAL; } tda8083_wait_diseqc_fifo (state, 100); return 0; } static int tda8083_send_diseqc_msg (struct dvb_frontend* fe, struct dvb_diseqc_master_cmd *m) { struct tda8083_state* state = fe->demodulator_priv; int i; tda8083_writereg (state, 0x29, (m->msg_len - 3) | (1 << 2)); /* enable */ for (i=0; i<m->msg_len; i++) tda8083_writereg (state, 0x23 + i, m->msg[i]); tda8083_writereg (state, 0x29, (m->msg_len - 3) | (3 << 2)); /* send!! */ tda8083_wait_diseqc_fifo (state, 100); return 0; } static int tda8083_read_status(struct dvb_frontend* fe, fe_status_t* status) { struct tda8083_state* state = fe->demodulator_priv; u8 signal = ~tda8083_readreg (state, 0x01); u8 sync = tda8083_readreg (state, 0x02); *status = 0; if (signal > 10) *status |= FE_HAS_SIGNAL; if (sync & 0x01) *status |= FE_HAS_CARRIER; if (sync & 0x02) *status |= FE_HAS_VITERBI; if (sync & 0x10) *status |= FE_HAS_SYNC; if (sync & 0x20) /* frontend can not lock */ *status |= FE_TIMEDOUT; if ((sync & 0x1f) == 0x1f) *status |= FE_HAS_LOCK; return 0; } static int tda8083_read_ber(struct dvb_frontend* fe, u32* ber) { struct tda8083_state* state = fe->demodulator_priv; int ret; u8 buf[3]; if ((ret = tda8083_readregs(state, 0x0b, buf, sizeof(buf)))) return ret; *ber = ((buf[0] & 0x1f) << 16) | (buf[1] << 8) | buf[2]; return 0; } static int tda8083_read_signal_strength(struct dvb_frontend* fe, u16* strength) { struct tda8083_state* state = fe->demodulator_priv; u8 signal = ~tda8083_readreg (state, 0x01); *strength = (signal << 8) | signal; return 0; } static int tda8083_read_snr(struct dvb_frontend* fe, u16* snr) { struct tda8083_state* state = fe->demodulator_priv; u8 _snr = tda8083_readreg (state, 0x08); *snr = (_snr << 8) | _snr; return 0; } static int tda8083_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks) { struct tda8083_state* state = fe->demodulator_priv; *ucblocks = tda8083_readreg(state, 0x0f); if (*ucblocks == 0xff) *ucblocks = 0xffffffff; return 0; } static int tda8083_set_frontend(struct dvb_frontend *fe) { struct dtv_frontend_properties *p = &fe->dtv_property_cache; struct tda8083_state* state = fe->demodulator_priv; if (fe->ops.tuner_ops.set_params) { fe->ops.tuner_ops.set_params(fe); if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0); } tda8083_set_inversion (state, p->inversion); tda8083_set_fec(state, p->fec_inner); tda8083_set_symbolrate(state, p->symbol_rate); tda8083_writereg (state, 0x00, 0x3c); tda8083_writereg (state, 0x00, 0x04); return 0; } static int tda8083_get_frontend(struct dvb_frontend *fe) { struct dtv_frontend_properties *p = &fe->dtv_property_cache; struct tda8083_state* state = fe->demodulator_priv; /* FIXME: get symbolrate & frequency offset...*/ /*p->frequency = ???;*/ p->inversion = (tda8083_readreg (state, 0x0e) & 0x80) ? INVERSION_ON : INVERSION_OFF; p->fec_inner = tda8083_get_fec(state); /*p->symbol_rate = tda8083_get_symbolrate (state);*/ return 0; } static int tda8083_sleep(struct dvb_frontend* fe) { struct tda8083_state* state = fe->demodulator_priv; tda8083_writereg (state, 0x00, 0x02); return 0; } static int tda8083_init(struct dvb_frontend* fe) { struct tda8083_state* state = fe->demodulator_priv; int i; for (i=0; i<44; i++) tda8083_writereg (state, i, tda8083_init_tab[i]); tda8083_writereg (state, 0x00, 0x3c); tda8083_writereg (state, 0x00, 0x04); return 0; } static int tda8083_diseqc_send_burst(struct dvb_frontend* fe, fe_sec_mini_cmd_t burst) { struct tda8083_state* state = fe->demodulator_priv; tda8083_send_diseqc_burst (state, burst); tda8083_writereg (state, 0x00, 0x3c); tda8083_writereg (state, 0x00, 0x04); return 0; } static int tda8083_diseqc_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone) { struct tda8083_state* state = fe->demodulator_priv; tda8083_set_tone (state, tone); tda8083_writereg (state, 0x00, 0x3c); tda8083_writereg (state, 0x00, 0x04); return 0; } static int tda8083_diseqc_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage) { struct tda8083_state* state = fe->demodulator_priv; tda8083_set_voltage (state, voltage); tda8083_writereg (state, 0x00, 0x3c); tda8083_writereg (state, 0x00, 0x04); return 0; } static void tda8083_release(struct dvb_frontend* fe) { struct tda8083_state* state = fe->demodulator_priv; kfree(state); } static struct dvb_frontend_ops tda8083_ops; struct dvb_frontend* tda8083_attach(const struct tda8083_config* config, struct i2c_adapter* i2c) { struct tda8083_state* state = NULL; /* allocate memory for the internal state */ state = kzalloc(sizeof(struct tda8083_state), GFP_KERNEL); if (state == NULL) goto error; /* setup the state */ state->config = config; state->i2c = i2c; /* check if the demod is there */ if ((tda8083_readreg(state, 0x00)) != 0x05) goto error; /* create dvb_frontend */ memcpy(&state->frontend.ops, &tda8083_ops, sizeof(struct dvb_frontend_ops)); state->frontend.demodulator_priv = state; return &state->frontend; error: kfree(state); return NULL; } static struct dvb_frontend_ops tda8083_ops = { .delsys = { SYS_DVBS }, .info = { .name = "Philips TDA8083 DVB-S", .frequency_min = 920000, /* TDA8060 */ .frequency_max = 2200000, /* TDA8060 */ .frequency_stepsize = 125, /* kHz for QPSK frontends */ /* .frequency_tolerance = ???,*/ .symbol_rate_min = 12000000, .symbol_rate_max = 30000000, /* .symbol_rate_tolerance = ???,*/ .caps = FE_CAN_INVERSION_AUTO | FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 | FE_CAN_FEC_7_8 | FE_CAN_FEC_8_9 | FE_CAN_FEC_AUTO | FE_CAN_QPSK | FE_CAN_MUTE_TS }, .release = tda8083_release, .init = tda8083_init, .sleep = tda8083_sleep, .set_frontend = tda8083_set_frontend, .get_frontend = tda8083_get_frontend, .read_status = tda8083_read_status, .read_signal_strength = tda8083_read_signal_strength, .read_snr = tda8083_read_snr, .read_ber = tda8083_read_ber, .read_ucblocks = tda8083_read_ucblocks, .diseqc_send_master_cmd = tda8083_send_diseqc_msg, .diseqc_send_burst = tda8083_diseqc_send_burst, .set_tone = tda8083_diseqc_set_tone, .set_voltage = tda8083_diseqc_set_voltage, }; module_param(debug, int, 0644); MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off)."); MODULE_DESCRIPTION("Philips TDA8083 DVB-S Demodulator"); MODULE_AUTHOR("Ralph Metzler, Holger Waechtler"); MODULE_LICENSE("GPL"); EXPORT_SYMBOL(tda8083_attach);
gpl-2.0
bilalliberty/SebastianFM-kernel
drivers/base/power/opp.c
2711
20811
/* * Generic OPP Interface * * Copyright (C) 2009-2010 Texas Instruments Incorporated. * Nishanth Menon * Romit Dasgupta * Kevin Hilman * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ #include <linux/kernel.h> #include <linux/errno.h> #include <linux/err.h> #include <linux/init.h> #include <linux/slab.h> #include <linux/cpufreq.h> #include <linux/device.h> #include <linux/list.h> #include <linux/rculist.h> #include <linux/rcupdate.h> #include <linux/opp.h> /* * Internal data structure organization with the OPP layer library is as * follows: * dev_opp_list (root) * |- device 1 (represents voltage domain 1) * | |- opp 1 (availability, freq, voltage) * | |- opp 2 .. * ... ... * | `- opp n .. * |- device 2 (represents the next voltage domain) * ... * `- device m (represents mth voltage domain) * device 1, 2.. are represented by dev_opp structure while each opp * is represented by the opp structure. */ /** * struct opp - Generic OPP description structure * @node: opp list node. The nodes are maintained throughout the lifetime * of boot. It is expected only an optimal set of OPPs are * added to the library by the SoC framework. * RCU usage: opp list is traversed with RCU locks. node * modification is possible realtime, hence the modifications * are protected by the dev_opp_list_lock for integrity. * IMPORTANT: the opp nodes should be maintained in increasing * order. * @available: true/false - marks if this OPP as available or not * @rate: Frequency in hertz * @u_volt: Nominal voltage in microvolts corresponding to this OPP * @dev_opp: points back to the device_opp struct this opp belongs to * * This structure stores the OPP information for a given device. */ struct opp { struct list_head node; bool available; unsigned long rate; unsigned long u_volt; struct device_opp *dev_opp; }; /** * struct device_opp - Device opp structure * @node: list node - contains the devices with OPPs that * have been registered. Nodes once added are not modified in this * list. * RCU usage: nodes are not modified in the list of device_opp, * however addition is possible and is secured by dev_opp_list_lock * @dev: device pointer * @head: notifier head to notify the OPP availability changes. * @opp_list: list of opps * * This is an internal data structure maintaining the link to opps attached to * a device. This structure is not meant to be shared to users as it is * meant for book keeping and private to OPP library */ struct device_opp { struct list_head node; struct device *dev; struct srcu_notifier_head head; struct list_head opp_list; }; /* * The root of the list of all devices. All device_opp structures branch off * from here, with each device_opp containing the list of opp it supports in * various states of availability. */ static LIST_HEAD(dev_opp_list); /* Lock to allow exclusive modification to the device and opp lists */ static DEFINE_MUTEX(dev_opp_list_lock); /** * find_device_opp() - find device_opp struct using device pointer * @dev: device pointer used to lookup device OPPs * * Search list of device OPPs for one containing matching device. Does a RCU * reader operation to grab the pointer needed. * * Returns pointer to 'struct device_opp' if found, otherwise -ENODEV or * -EINVAL based on type of error. * * Locking: This function must be called under rcu_read_lock(). device_opp * is a RCU protected pointer. This means that device_opp is valid as long * as we are under RCU lock. */ static struct device_opp *find_device_opp(struct device *dev) { struct device_opp *tmp_dev_opp, *dev_opp = ERR_PTR(-ENODEV); if (unlikely(IS_ERR_OR_NULL(dev))) { pr_err("%s: Invalid parameters\n", __func__); return ERR_PTR(-EINVAL); } list_for_each_entry_rcu(tmp_dev_opp, &dev_opp_list, node) { if (tmp_dev_opp->dev == dev) { dev_opp = tmp_dev_opp; break; } } return dev_opp; } /** * opp_get_voltage() - Gets the voltage corresponding to an available opp * @opp: opp for which voltage has to be returned for * * Return voltage in micro volt corresponding to the opp, else * return 0 * * Locking: This function must be called under rcu_read_lock(). opp is a rcu * protected pointer. This means that opp which could have been fetched by * opp_find_freq_{exact,ceil,floor} functions is valid as long as we are * under RCU lock. The pointer returned by the opp_find_freq family must be * used in the same section as the usage of this function with the pointer * prior to unlocking with rcu_read_unlock() to maintain the integrity of the * pointer. */ unsigned long opp_get_voltage(struct opp *opp) { struct opp *tmp_opp; unsigned long v = 0; tmp_opp = rcu_dereference(opp); if (unlikely(IS_ERR_OR_NULL(tmp_opp)) || !tmp_opp->available) pr_err("%s: Invalid parameters\n", __func__); else v = tmp_opp->u_volt; return v; } /** * opp_get_freq() - Gets the frequency corresponding to an available opp * @opp: opp for which frequency has to be returned for * * Return frequency in hertz corresponding to the opp, else * return 0 * * Locking: This function must be called under rcu_read_lock(). opp is a rcu * protected pointer. This means that opp which could have been fetched by * opp_find_freq_{exact,ceil,floor} functions is valid as long as we are * under RCU lock. The pointer returned by the opp_find_freq family must be * used in the same section as the usage of this function with the pointer * prior to unlocking with rcu_read_unlock() to maintain the integrity of the * pointer. */ unsigned long opp_get_freq(struct opp *opp) { struct opp *tmp_opp; unsigned long f = 0; tmp_opp = rcu_dereference(opp); if (unlikely(IS_ERR_OR_NULL(tmp_opp)) || !tmp_opp->available) pr_err("%s: Invalid parameters\n", __func__); else f = tmp_opp->rate; return f; } /** * opp_get_opp_count() - Get number of opps available in the opp list * @dev: device for which we do this operation * * This function returns the number of available opps if there are any, * else returns 0 if none or the corresponding error value. * * Locking: This function must be called under rcu_read_lock(). This function * internally references two RCU protected structures: device_opp and opp which * are safe as long as we are under a common RCU locked section. */ int opp_get_opp_count(struct device *dev) { struct device_opp *dev_opp; struct opp *temp_opp; int count = 0; dev_opp = find_device_opp(dev); if (IS_ERR(dev_opp)) { int r = PTR_ERR(dev_opp); dev_err(dev, "%s: device OPP not found (%d)\n", __func__, r); return r; } list_for_each_entry_rcu(temp_opp, &dev_opp->opp_list, node) { if (temp_opp->available) count++; } return count; } /** * opp_find_freq_exact() - search for an exact frequency * @dev: device for which we do this operation * @freq: frequency to search for * @available: true/false - match for available opp * * Searches for exact match in the opp list and returns pointer to the matching * opp if found, else returns ERR_PTR in case of error and should be handled * using IS_ERR. * * Note: available is a modifier for the search. if available=true, then the * match is for exact matching frequency and is available in the stored OPP * table. if false, the match is for exact frequency which is not available. * * This provides a mechanism to enable an opp which is not available currently * or the opposite as well. * * Locking: This function must be called under rcu_read_lock(). opp is a rcu * protected pointer. The reason for the same is that the opp pointer which is * returned will remain valid for use with opp_get_{voltage, freq} only while * under the locked area. The pointer returned must be used prior to unlocking * with rcu_read_unlock() to maintain the integrity of the pointer. */ struct opp *opp_find_freq_exact(struct device *dev, unsigned long freq, bool available) { struct device_opp *dev_opp; struct opp *temp_opp, *opp = ERR_PTR(-ENODEV); dev_opp = find_device_opp(dev); if (IS_ERR(dev_opp)) { int r = PTR_ERR(dev_opp); dev_err(dev, "%s: device OPP not found (%d)\n", __func__, r); return ERR_PTR(r); } list_for_each_entry_rcu(temp_opp, &dev_opp->opp_list, node) { if (temp_opp->available == available && temp_opp->rate == freq) { opp = temp_opp; break; } } return opp; } /** * opp_find_freq_ceil() - Search for an rounded ceil freq * @dev: device for which we do this operation * @freq: Start frequency * * Search for the matching ceil *available* OPP from a starting freq * for a device. * * Returns matching *opp and refreshes *freq accordingly, else returns * ERR_PTR in case of error and should be handled using IS_ERR. * * Locking: This function must be called under rcu_read_lock(). opp is a rcu * protected pointer. The reason for the same is that the opp pointer which is * returned will remain valid for use with opp_get_{voltage, freq} only while * under the locked area. The pointer returned must be used prior to unlocking * with rcu_read_unlock() to maintain the integrity of the pointer. */ struct opp *opp_find_freq_ceil(struct device *dev, unsigned long *freq) { struct device_opp *dev_opp; struct opp *temp_opp, *opp = ERR_PTR(-ENODEV); if (!dev || !freq) { dev_err(dev, "%s: Invalid argument freq=%p\n", __func__, freq); return ERR_PTR(-EINVAL); } dev_opp = find_device_opp(dev); if (IS_ERR(dev_opp)) return opp; list_for_each_entry_rcu(temp_opp, &dev_opp->opp_list, node) { if (temp_opp->available && temp_opp->rate >= *freq) { opp = temp_opp; *freq = opp->rate; break; } } return opp; } /** * opp_find_freq_floor() - Search for a rounded floor freq * @dev: device for which we do this operation * @freq: Start frequency * * Search for the matching floor *available* OPP from a starting freq * for a device. * * Returns matching *opp and refreshes *freq accordingly, else returns * ERR_PTR in case of error and should be handled using IS_ERR. * * Locking: This function must be called under rcu_read_lock(). opp is a rcu * protected pointer. The reason for the same is that the opp pointer which is * returned will remain valid for use with opp_get_{voltage, freq} only while * under the locked area. The pointer returned must be used prior to unlocking * with rcu_read_unlock() to maintain the integrity of the pointer. */ struct opp *opp_find_freq_floor(struct device *dev, unsigned long *freq) { struct device_opp *dev_opp; struct opp *temp_opp, *opp = ERR_PTR(-ENODEV); if (!dev || !freq) { dev_err(dev, "%s: Invalid argument freq=%p\n", __func__, freq); return ERR_PTR(-EINVAL); } dev_opp = find_device_opp(dev); if (IS_ERR(dev_opp)) return opp; list_for_each_entry_rcu(temp_opp, &dev_opp->opp_list, node) { if (temp_opp->available) { /* go to the next node, before choosing prev */ if (temp_opp->rate > *freq) break; else opp = temp_opp; } } if (!IS_ERR(opp)) *freq = opp->rate; return opp; } /** * opp_add() - Add an OPP table from a table definitions * @dev: device for which we do this operation * @freq: Frequency in Hz for this OPP * @u_volt: Voltage in uVolts for this OPP * * This function adds an opp definition to the opp list and returns status. * The opp is made available by default and it can be controlled using * opp_enable/disable functions. * * Locking: The internal device_opp and opp structures are RCU protected. * Hence this function internally uses RCU updater strategy with mutex locks * to keep the integrity of the internal data structures. Callers should ensure * that this function is *NOT* called under RCU protection or in contexts where * mutex cannot be locked. */ int opp_add(struct device *dev, unsigned long freq, unsigned long u_volt) { struct device_opp *dev_opp = NULL; struct opp *opp, *new_opp; struct list_head *head; /* allocate new OPP node */ new_opp = kzalloc(sizeof(struct opp), GFP_KERNEL); if (!new_opp) { dev_warn(dev, "%s: Unable to create new OPP node\n", __func__); return -ENOMEM; } /* Hold our list modification lock here */ mutex_lock(&dev_opp_list_lock); /* Check for existing list for 'dev' */ dev_opp = find_device_opp(dev); if (IS_ERR(dev_opp)) { /* * Allocate a new device OPP table. In the infrequent case * where a new device is needed to be added, we pay this * penalty. */ dev_opp = kzalloc(sizeof(struct device_opp), GFP_KERNEL); if (!dev_opp) { mutex_unlock(&dev_opp_list_lock); kfree(new_opp); dev_warn(dev, "%s: Unable to create device OPP structure\n", __func__); return -ENOMEM; } dev_opp->dev = dev; srcu_init_notifier_head(&dev_opp->head); INIT_LIST_HEAD(&dev_opp->opp_list); /* Secure the device list modification */ list_add_rcu(&dev_opp->node, &dev_opp_list); } /* populate the opp table */ new_opp->dev_opp = dev_opp; new_opp->rate = freq; new_opp->u_volt = u_volt; new_opp->available = true; /* Insert new OPP in order of increasing frequency */ head = &dev_opp->opp_list; list_for_each_entry_rcu(opp, &dev_opp->opp_list, node) { if (new_opp->rate < opp->rate) break; else head = &opp->node; } list_add_rcu(&new_opp->node, head); mutex_unlock(&dev_opp_list_lock); /* * Notify the changes in the availability of the operable * frequency/voltage list. */ srcu_notifier_call_chain(&dev_opp->head, OPP_EVENT_ADD, new_opp); return 0; } /** * opp_set_availability() - helper to set the availability of an opp * @dev: device for which we do this operation * @freq: OPP frequency to modify availability * @availability_req: availability status requested for this opp * * Set the availability of an OPP with an RCU operation, opp_{enable,disable} * share a common logic which is isolated here. * * Returns -EINVAL for bad pointers, -ENOMEM if no memory available for the * copy operation, returns 0 if no modifcation was done OR modification was * successful. * * Locking: The internal device_opp and opp structures are RCU protected. * Hence this function internally uses RCU updater strategy with mutex locks to * keep the integrity of the internal data structures. Callers should ensure * that this function is *NOT* called under RCU protection or in contexts where * mutex locking or synchronize_rcu() blocking calls cannot be used. */ static int opp_set_availability(struct device *dev, unsigned long freq, bool availability_req) { struct device_opp *tmp_dev_opp, *dev_opp = ERR_PTR(-ENODEV); struct opp *new_opp, *tmp_opp, *opp = ERR_PTR(-ENODEV); int r = 0; /* keep the node allocated */ new_opp = kmalloc(sizeof(struct opp), GFP_KERNEL); if (!new_opp) { dev_warn(dev, "%s: Unable to create OPP\n", __func__); return -ENOMEM; } mutex_lock(&dev_opp_list_lock); /* Find the device_opp */ list_for_each_entry(tmp_dev_opp, &dev_opp_list, node) { if (dev == tmp_dev_opp->dev) { dev_opp = tmp_dev_opp; break; } } if (IS_ERR(dev_opp)) { r = PTR_ERR(dev_opp); dev_warn(dev, "%s: Device OPP not found (%d)\n", __func__, r); goto unlock; } /* Do we have the frequency? */ list_for_each_entry(tmp_opp, &dev_opp->opp_list, node) { if (tmp_opp->rate == freq) { opp = tmp_opp; break; } } if (IS_ERR(opp)) { r = PTR_ERR(opp); goto unlock; } /* Is update really needed? */ if (opp->available == availability_req) goto unlock; /* copy the old data over */ *new_opp = *opp; /* plug in new node */ new_opp->available = availability_req; list_replace_rcu(&opp->node, &new_opp->node); mutex_unlock(&dev_opp_list_lock); synchronize_rcu(); /* Notify the change of the OPP availability */ if (availability_req) srcu_notifier_call_chain(&dev_opp->head, OPP_EVENT_ENABLE, new_opp); else srcu_notifier_call_chain(&dev_opp->head, OPP_EVENT_DISABLE, new_opp); /* clean up old opp */ new_opp = opp; goto out; unlock: mutex_unlock(&dev_opp_list_lock); out: kfree(new_opp); return r; } /** * opp_enable() - Enable a specific OPP * @dev: device for which we do this operation * @freq: OPP frequency to enable * * Enables a provided opp. If the operation is valid, this returns 0, else the * corresponding error value. It is meant to be used for users an OPP available * after being temporarily made unavailable with opp_disable. * * Locking: The internal device_opp and opp structures are RCU protected. * Hence this function indirectly uses RCU and mutex locks to keep the * integrity of the internal data structures. Callers should ensure that * this function is *NOT* called under RCU protection or in contexts where * mutex locking or synchronize_rcu() blocking calls cannot be used. */ int opp_enable(struct device *dev, unsigned long freq) { return opp_set_availability(dev, freq, true); } /** * opp_disable() - Disable a specific OPP * @dev: device for which we do this operation * @freq: OPP frequency to disable * * Disables a provided opp. If the operation is valid, this returns * 0, else the corresponding error value. It is meant to be a temporary * control by users to make this OPP not available until the circumstances are * right to make it available again (with a call to opp_enable). * * Locking: The internal device_opp and opp structures are RCU protected. * Hence this function indirectly uses RCU and mutex locks to keep the * integrity of the internal data structures. Callers should ensure that * this function is *NOT* called under RCU protection or in contexts where * mutex locking or synchronize_rcu() blocking calls cannot be used. */ int opp_disable(struct device *dev, unsigned long freq) { return opp_set_availability(dev, freq, false); } #ifdef CONFIG_CPU_FREQ /** * opp_init_cpufreq_table() - create a cpufreq table for a device * @dev: device for which we do this operation * @table: Cpufreq table returned back to caller * * Generate a cpufreq table for a provided device- this assumes that the * opp list is already initialized and ready for usage. * * This function allocates required memory for the cpufreq table. It is * expected that the caller does the required maintenance such as freeing * the table as required. * * Returns -EINVAL for bad pointers, -ENODEV if the device is not found, -ENOMEM * if no memory available for the operation (table is not populated), returns 0 * if successful and table is populated. * * WARNING: It is important for the callers to ensure refreshing their copy of * the table if any of the mentioned functions have been invoked in the interim. * * Locking: The internal device_opp and opp structures are RCU protected. * To simplify the logic, we pretend we are updater and hold relevant mutex here * Callers should ensure that this function is *NOT* called under RCU protection * or in contexts where mutex locking cannot be used. */ int opp_init_cpufreq_table(struct device *dev, struct cpufreq_frequency_table **table) { struct device_opp *dev_opp; struct opp *opp; struct cpufreq_frequency_table *freq_table; int i = 0; /* Pretend as if I am an updater */ mutex_lock(&dev_opp_list_lock); dev_opp = find_device_opp(dev); if (IS_ERR(dev_opp)) { int r = PTR_ERR(dev_opp); mutex_unlock(&dev_opp_list_lock); dev_err(dev, "%s: Device OPP not found (%d)\n", __func__, r); return r; } freq_table = kzalloc(sizeof(struct cpufreq_frequency_table) * (opp_get_opp_count(dev) + 1), GFP_KERNEL); if (!freq_table) { mutex_unlock(&dev_opp_list_lock); dev_warn(dev, "%s: Unable to allocate frequency table\n", __func__); return -ENOMEM; } list_for_each_entry(opp, &dev_opp->opp_list, node) { if (opp->available) { freq_table[i].index = i; freq_table[i].frequency = opp->rate / 1000; i++; } } mutex_unlock(&dev_opp_list_lock); freq_table[i].index = i; freq_table[i].frequency = CPUFREQ_TABLE_END; *table = &freq_table[0]; return 0; } /** * opp_free_cpufreq_table() - free the cpufreq table * @dev: device for which we do this operation * @table: table to free * * Free up the table allocated by opp_init_cpufreq_table */ void opp_free_cpufreq_table(struct device *dev, struct cpufreq_frequency_table **table) { if (!table) return; kfree(*table); *table = NULL; } #endif /* CONFIG_CPU_FREQ */ /** * opp_get_notifier() - find notifier_head of the device with opp * @dev: device pointer used to lookup device OPPs. */ struct srcu_notifier_head *opp_get_notifier(struct device *dev) { struct device_opp *dev_opp = find_device_opp(dev); if (IS_ERR(dev_opp)) return ERR_CAST(dev_opp); /* matching type */ return &dev_opp->head; }
gpl-2.0
agat63/AGAT_G3_kernel
drivers/i2c/busses/i2c-pmcmsp.c
3991
18075
/* * Specific bus support for PMC-TWI compliant implementation on MSP71xx. * * Copyright 2005-2007 PMC-Sierra, Inc. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. * * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * You should have received a copy of the GNU General Public License along * with this program; if not, write to the Free Software Foundation, Inc., * 675 Mass Ave, Cambridge, MA 02139, USA. */ #include <linux/kernel.h> #include <linux/module.h> #include <linux/init.h> #include <linux/platform_device.h> #include <linux/i2c.h> #include <linux/interrupt.h> #include <linux/completion.h> #include <linux/mutex.h> #include <linux/delay.h> #include <linux/io.h> #define DRV_NAME "pmcmsptwi" #define MSP_TWI_SF_CLK_REG_OFFSET 0x00 #define MSP_TWI_HS_CLK_REG_OFFSET 0x04 #define MSP_TWI_CFG_REG_OFFSET 0x08 #define MSP_TWI_CMD_REG_OFFSET 0x0c #define MSP_TWI_ADD_REG_OFFSET 0x10 #define MSP_TWI_DAT_0_REG_OFFSET 0x14 #define MSP_TWI_DAT_1_REG_OFFSET 0x18 #define MSP_TWI_INT_STS_REG_OFFSET 0x1c #define MSP_TWI_INT_MSK_REG_OFFSET 0x20 #define MSP_TWI_BUSY_REG_OFFSET 0x24 #define MSP_TWI_INT_STS_DONE (1 << 0) #define MSP_TWI_INT_STS_LOST_ARBITRATION (1 << 1) #define MSP_TWI_INT_STS_NO_RESPONSE (1 << 2) #define MSP_TWI_INT_STS_DATA_COLLISION (1 << 3) #define MSP_TWI_INT_STS_BUSY (1 << 4) #define MSP_TWI_INT_STS_ALL 0x1f #define MSP_MAX_BYTES_PER_RW 8 #define MSP_MAX_POLL 5 #define MSP_POLL_DELAY 10 #define MSP_IRQ_TIMEOUT (MSP_MAX_POLL * MSP_POLL_DELAY) /* IO Operation macros */ #define pmcmsptwi_readl __raw_readl #define pmcmsptwi_writel __raw_writel /* TWI command type */ enum pmcmsptwi_cmd_type { MSP_TWI_CMD_WRITE = 0, /* Write only */ MSP_TWI_CMD_READ = 1, /* Read only */ MSP_TWI_CMD_WRITE_READ = 2, /* Write then Read */ }; /* The possible results of the xferCmd */ enum pmcmsptwi_xfer_result { MSP_TWI_XFER_OK = 0, MSP_TWI_XFER_TIMEOUT, MSP_TWI_XFER_BUSY, MSP_TWI_XFER_DATA_COLLISION, MSP_TWI_XFER_NO_RESPONSE, MSP_TWI_XFER_LOST_ARBITRATION, }; /* Corresponds to a PMCTWI clock configuration register */ struct pmcmsptwi_clock { u8 filter; /* Bits 15:12, default = 0x03 */ u16 clock; /* Bits 9:0, default = 0x001f */ }; struct pmcmsptwi_clockcfg { struct pmcmsptwi_clock standard; /* The standard/fast clock config */ struct pmcmsptwi_clock highspeed; /* The highspeed clock config */ }; /* Corresponds to the main TWI configuration register */ struct pmcmsptwi_cfg { u8 arbf; /* Bits 15:12, default=0x03 */ u8 nak; /* Bits 11:8, default=0x03 */ u8 add10; /* Bit 7, default=0x00 */ u8 mst_code; /* Bits 6:4, default=0x00 */ u8 arb; /* Bit 1, default=0x01 */ u8 highspeed; /* Bit 0, default=0x00 */ }; /* A single pmctwi command to issue */ struct pmcmsptwi_cmd { u16 addr; /* The slave address (7 or 10 bits) */ enum pmcmsptwi_cmd_type type; /* The command type */ u8 write_len; /* Number of bytes in the write buffer */ u8 read_len; /* Number of bytes in the read buffer */ u8 *write_data; /* Buffer of characters to send */ u8 *read_data; /* Buffer to fill with incoming data */ }; /* The private data */ struct pmcmsptwi_data { void __iomem *iobase; /* iomapped base for IO */ int irq; /* IRQ to use (0 disables) */ struct completion wait; /* Completion for xfer */ struct mutex lock; /* Used for threadsafeness */ enum pmcmsptwi_xfer_result last_result; /* result of last xfer */ }; /* The default settings */ static const struct pmcmsptwi_clockcfg pmcmsptwi_defclockcfg = { .standard = { .filter = 0x3, .clock = 0x1f, }, .highspeed = { .filter = 0x3, .clock = 0x1f, }, }; static const struct pmcmsptwi_cfg pmcmsptwi_defcfg = { .arbf = 0x03, .nak = 0x03, .add10 = 0x00, .mst_code = 0x00, .arb = 0x01, .highspeed = 0x00, }; static struct pmcmsptwi_data pmcmsptwi_data; static struct i2c_adapter pmcmsptwi_adapter; /* inline helper functions */ static inline u32 pmcmsptwi_clock_to_reg( const struct pmcmsptwi_clock *clock) { return ((clock->filter & 0xf) << 12) | (clock->clock & 0x03ff); } static inline void pmcmsptwi_reg_to_clock( u32 reg, struct pmcmsptwi_clock *clock) { clock->filter = (reg >> 12) & 0xf; clock->clock = reg & 0x03ff; } static inline u32 pmcmsptwi_cfg_to_reg(const struct pmcmsptwi_cfg *cfg) { return ((cfg->arbf & 0xf) << 12) | ((cfg->nak & 0xf) << 8) | ((cfg->add10 & 0x1) << 7) | ((cfg->mst_code & 0x7) << 4) | ((cfg->arb & 0x1) << 1) | (cfg->highspeed & 0x1); } static inline void pmcmsptwi_reg_to_cfg(u32 reg, struct pmcmsptwi_cfg *cfg) { cfg->arbf = (reg >> 12) & 0xf; cfg->nak = (reg >> 8) & 0xf; cfg->add10 = (reg >> 7) & 0x1; cfg->mst_code = (reg >> 4) & 0x7; cfg->arb = (reg >> 1) & 0x1; cfg->highspeed = reg & 0x1; } /* * Sets the current clock configuration */ static void pmcmsptwi_set_clock_config(const struct pmcmsptwi_clockcfg *cfg, struct pmcmsptwi_data *data) { mutex_lock(&data->lock); pmcmsptwi_writel(pmcmsptwi_clock_to_reg(&cfg->standard), data->iobase + MSP_TWI_SF_CLK_REG_OFFSET); pmcmsptwi_writel(pmcmsptwi_clock_to_reg(&cfg->highspeed), data->iobase + MSP_TWI_HS_CLK_REG_OFFSET); mutex_unlock(&data->lock); } /* * Gets the current TWI bus configuration */ static void pmcmsptwi_get_twi_config(struct pmcmsptwi_cfg *cfg, struct pmcmsptwi_data *data) { mutex_lock(&data->lock); pmcmsptwi_reg_to_cfg(pmcmsptwi_readl( data->iobase + MSP_TWI_CFG_REG_OFFSET), cfg); mutex_unlock(&data->lock); } /* * Sets the current TWI bus configuration */ static void pmcmsptwi_set_twi_config(const struct pmcmsptwi_cfg *cfg, struct pmcmsptwi_data *data) { mutex_lock(&data->lock); pmcmsptwi_writel(pmcmsptwi_cfg_to_reg(cfg), data->iobase + MSP_TWI_CFG_REG_OFFSET); mutex_unlock(&data->lock); } /* * Parses the 'int_sts' register and returns a well-defined error code */ static enum pmcmsptwi_xfer_result pmcmsptwi_get_result(u32 reg) { if (reg & MSP_TWI_INT_STS_LOST_ARBITRATION) { dev_dbg(&pmcmsptwi_adapter.dev, "Result: Lost arbitration\n"); return MSP_TWI_XFER_LOST_ARBITRATION; } else if (reg & MSP_TWI_INT_STS_NO_RESPONSE) { dev_dbg(&pmcmsptwi_adapter.dev, "Result: No response\n"); return MSP_TWI_XFER_NO_RESPONSE; } else if (reg & MSP_TWI_INT_STS_DATA_COLLISION) { dev_dbg(&pmcmsptwi_adapter.dev, "Result: Data collision\n"); return MSP_TWI_XFER_DATA_COLLISION; } else if (reg & MSP_TWI_INT_STS_BUSY) { dev_dbg(&pmcmsptwi_adapter.dev, "Result: Bus busy\n"); return MSP_TWI_XFER_BUSY; } dev_dbg(&pmcmsptwi_adapter.dev, "Result: Operation succeeded\n"); return MSP_TWI_XFER_OK; } /* * In interrupt mode, handle the interrupt. * NOTE: Assumes data->lock is held. */ static irqreturn_t pmcmsptwi_interrupt(int irq, void *ptr) { struct pmcmsptwi_data *data = ptr; u32 reason = pmcmsptwi_readl(data->iobase + MSP_TWI_INT_STS_REG_OFFSET); pmcmsptwi_writel(reason, data->iobase + MSP_TWI_INT_STS_REG_OFFSET); dev_dbg(&pmcmsptwi_adapter.dev, "Got interrupt 0x%08x\n", reason); if (!(reason & MSP_TWI_INT_STS_DONE)) return IRQ_NONE; data->last_result = pmcmsptwi_get_result(reason); complete(&data->wait); return IRQ_HANDLED; } /* * Probe for and register the device and return 0 if there is one. */ static int __devinit pmcmsptwi_probe(struct platform_device *pldev) { struct resource *res; int rc = -ENODEV; /* get the static platform resources */ res = platform_get_resource(pldev, IORESOURCE_MEM, 0); if (!res) { dev_err(&pldev->dev, "IOMEM resource not found\n"); goto ret_err; } /* reserve the memory region */ if (!request_mem_region(res->start, resource_size(res), pldev->name)) { dev_err(&pldev->dev, "Unable to get memory/io address region 0x%08x\n", res->start); rc = -EBUSY; goto ret_err; } /* remap the memory */ pmcmsptwi_data.iobase = ioremap_nocache(res->start, resource_size(res)); if (!pmcmsptwi_data.iobase) { dev_err(&pldev->dev, "Unable to ioremap address 0x%08x\n", res->start); rc = -EIO; goto ret_unreserve; } /* request the irq */ pmcmsptwi_data.irq = platform_get_irq(pldev, 0); if (pmcmsptwi_data.irq) { rc = request_irq(pmcmsptwi_data.irq, &pmcmsptwi_interrupt, IRQF_SHARED | IRQF_DISABLED | IRQF_SAMPLE_RANDOM, pldev->name, &pmcmsptwi_data); if (rc == 0) { /* * Enable 'DONE' interrupt only. * * If you enable all interrupts, you will get one on * error and another when the operation completes. * This way you only have to handle one interrupt, * but you can still check all result flags. */ pmcmsptwi_writel(MSP_TWI_INT_STS_DONE, pmcmsptwi_data.iobase + MSP_TWI_INT_MSK_REG_OFFSET); } else { dev_warn(&pldev->dev, "Could not assign TWI IRQ handler " "to irq %d (continuing with poll)\n", pmcmsptwi_data.irq); pmcmsptwi_data.irq = 0; } } init_completion(&pmcmsptwi_data.wait); mutex_init(&pmcmsptwi_data.lock); pmcmsptwi_set_clock_config(&pmcmsptwi_defclockcfg, &pmcmsptwi_data); pmcmsptwi_set_twi_config(&pmcmsptwi_defcfg, &pmcmsptwi_data); printk(KERN_INFO DRV_NAME ": Registering MSP71xx I2C adapter\n"); pmcmsptwi_adapter.dev.parent = &pldev->dev; platform_set_drvdata(pldev, &pmcmsptwi_adapter); i2c_set_adapdata(&pmcmsptwi_adapter, &pmcmsptwi_data); rc = i2c_add_adapter(&pmcmsptwi_adapter); if (rc) { dev_err(&pldev->dev, "Unable to register I2C adapter\n"); goto ret_unmap; } return 0; ret_unmap: platform_set_drvdata(pldev, NULL); if (pmcmsptwi_data.irq) { pmcmsptwi_writel(0, pmcmsptwi_data.iobase + MSP_TWI_INT_MSK_REG_OFFSET); free_irq(pmcmsptwi_data.irq, &pmcmsptwi_data); } iounmap(pmcmsptwi_data.iobase); ret_unreserve: release_mem_region(res->start, resource_size(res)); ret_err: return rc; } /* * Release the device and return 0 if there is one. */ static int __devexit pmcmsptwi_remove(struct platform_device *pldev) { struct resource *res; i2c_del_adapter(&pmcmsptwi_adapter); platform_set_drvdata(pldev, NULL); if (pmcmsptwi_data.irq) { pmcmsptwi_writel(0, pmcmsptwi_data.iobase + MSP_TWI_INT_MSK_REG_OFFSET); free_irq(pmcmsptwi_data.irq, &pmcmsptwi_data); } iounmap(pmcmsptwi_data.iobase); res = platform_get_resource(pldev, IORESOURCE_MEM, 0); release_mem_region(res->start, resource_size(res)); return 0; } /* * Polls the 'busy' register until the command is complete. * NOTE: Assumes data->lock is held. */ static void pmcmsptwi_poll_complete(struct pmcmsptwi_data *data) { int i; for (i = 0; i < MSP_MAX_POLL; i++) { u32 val = pmcmsptwi_readl(data->iobase + MSP_TWI_BUSY_REG_OFFSET); if (val == 0) { u32 reason = pmcmsptwi_readl(data->iobase + MSP_TWI_INT_STS_REG_OFFSET); pmcmsptwi_writel(reason, data->iobase + MSP_TWI_INT_STS_REG_OFFSET); data->last_result = pmcmsptwi_get_result(reason); return; } udelay(MSP_POLL_DELAY); } dev_dbg(&pmcmsptwi_adapter.dev, "Result: Poll timeout\n"); data->last_result = MSP_TWI_XFER_TIMEOUT; } /* * Do the transfer (low level): * May use interrupt-driven or polling, depending on if an IRQ is * presently registered. * NOTE: Assumes data->lock is held. */ static enum pmcmsptwi_xfer_result pmcmsptwi_do_xfer( u32 reg, struct pmcmsptwi_data *data) { dev_dbg(&pmcmsptwi_adapter.dev, "Writing cmd reg 0x%08x\n", reg); pmcmsptwi_writel(reg, data->iobase + MSP_TWI_CMD_REG_OFFSET); if (data->irq) { unsigned long timeleft = wait_for_completion_timeout( &data->wait, MSP_IRQ_TIMEOUT); if (timeleft == 0) { dev_dbg(&pmcmsptwi_adapter.dev, "Result: IRQ timeout\n"); complete(&data->wait); data->last_result = MSP_TWI_XFER_TIMEOUT; } } else pmcmsptwi_poll_complete(data); return data->last_result; } /* * Helper routine, converts 'pmctwi_cmd' struct to register format */ static inline u32 pmcmsptwi_cmd_to_reg(const struct pmcmsptwi_cmd *cmd) { return ((cmd->type & 0x3) << 8) | (((cmd->write_len - 1) & 0x7) << 4) | ((cmd->read_len - 1) & 0x7); } /* * Do the transfer (high level) */ static enum pmcmsptwi_xfer_result pmcmsptwi_xfer_cmd( struct pmcmsptwi_cmd *cmd, struct pmcmsptwi_data *data) { enum pmcmsptwi_xfer_result retval; if ((cmd->type == MSP_TWI_CMD_WRITE && cmd->write_len == 0) || (cmd->type == MSP_TWI_CMD_READ && cmd->read_len == 0) || (cmd->type == MSP_TWI_CMD_WRITE_READ && (cmd->read_len == 0 || cmd->write_len == 0))) { dev_err(&pmcmsptwi_adapter.dev, "%s: Cannot transfer less than 1 byte\n", __func__); return -EINVAL; } if (cmd->read_len > MSP_MAX_BYTES_PER_RW || cmd->write_len > MSP_MAX_BYTES_PER_RW) { dev_err(&pmcmsptwi_adapter.dev, "%s: Cannot transfer more than %d bytes\n", __func__, MSP_MAX_BYTES_PER_RW); return -EINVAL; } mutex_lock(&data->lock); dev_dbg(&pmcmsptwi_adapter.dev, "Setting address to 0x%04x\n", cmd->addr); pmcmsptwi_writel(cmd->addr, data->iobase + MSP_TWI_ADD_REG_OFFSET); if (cmd->type == MSP_TWI_CMD_WRITE || cmd->type == MSP_TWI_CMD_WRITE_READ) { u64 tmp = be64_to_cpup((__be64 *)cmd->write_data); tmp >>= (MSP_MAX_BYTES_PER_RW - cmd->write_len) * 8; dev_dbg(&pmcmsptwi_adapter.dev, "Writing 0x%016llx\n", tmp); pmcmsptwi_writel(tmp & 0x00000000ffffffffLL, data->iobase + MSP_TWI_DAT_0_REG_OFFSET); if (cmd->write_len > 4) pmcmsptwi_writel(tmp >> 32, data->iobase + MSP_TWI_DAT_1_REG_OFFSET); } retval = pmcmsptwi_do_xfer(pmcmsptwi_cmd_to_reg(cmd), data); if (retval != MSP_TWI_XFER_OK) goto xfer_err; if (cmd->type == MSP_TWI_CMD_READ || cmd->type == MSP_TWI_CMD_WRITE_READ) { int i; u64 rmsk = ~(0xffffffffffffffffLL << (cmd->read_len * 8)); u64 tmp = (u64)pmcmsptwi_readl(data->iobase + MSP_TWI_DAT_0_REG_OFFSET); if (cmd->read_len > 4) tmp |= (u64)pmcmsptwi_readl(data->iobase + MSP_TWI_DAT_1_REG_OFFSET) << 32; tmp &= rmsk; dev_dbg(&pmcmsptwi_adapter.dev, "Read 0x%016llx\n", tmp); for (i = 0; i < cmd->read_len; i++) cmd->read_data[i] = tmp >> i; } xfer_err: mutex_unlock(&data->lock); return retval; } /* -- Algorithm functions -- */ /* * Sends an i2c command out on the adapter */ static int pmcmsptwi_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msg, int num) { struct pmcmsptwi_data *data = i2c_get_adapdata(adap); struct pmcmsptwi_cmd cmd; struct pmcmsptwi_cfg oldcfg, newcfg; int ret; if (num > 2) { dev_dbg(&adap->dev, "%d messages unsupported\n", num); return -EINVAL; } else if (num == 2) { /* Check for a dual write-then-read command */ struct i2c_msg *nextmsg = msg + 1; if (!(msg->flags & I2C_M_RD) && (nextmsg->flags & I2C_M_RD) && msg->addr == nextmsg->addr) { cmd.type = MSP_TWI_CMD_WRITE_READ; cmd.write_len = msg->len; cmd.write_data = msg->buf; cmd.read_len = nextmsg->len; cmd.read_data = nextmsg->buf; } else { dev_dbg(&adap->dev, "Non write-read dual messages unsupported\n"); return -EINVAL; } } else if (msg->flags & I2C_M_RD) { cmd.type = MSP_TWI_CMD_READ; cmd.read_len = msg->len; cmd.read_data = msg->buf; cmd.write_len = 0; cmd.write_data = NULL; } else { cmd.type = MSP_TWI_CMD_WRITE; cmd.read_len = 0; cmd.read_data = NULL; cmd.write_len = msg->len; cmd.write_data = msg->buf; } if (msg->len == 0) { dev_err(&adap->dev, "Zero-byte messages unsupported\n"); return -EINVAL; } cmd.addr = msg->addr; if (msg->flags & I2C_M_TEN) { pmcmsptwi_get_twi_config(&newcfg, data); memcpy(&oldcfg, &newcfg, sizeof(oldcfg)); /* Set the special 10-bit address flag */ newcfg.add10 = 1; pmcmsptwi_set_twi_config(&newcfg, data); } /* Execute the command */ ret = pmcmsptwi_xfer_cmd(&cmd, data); if (msg->flags & I2C_M_TEN) pmcmsptwi_set_twi_config(&oldcfg, data); dev_dbg(&adap->dev, "I2C %s of %d bytes %s\n", (msg->flags & I2C_M_RD) ? "read" : "write", msg->len, (ret == MSP_TWI_XFER_OK) ? "succeeded" : "failed"); if (ret != MSP_TWI_XFER_OK) { /* * TODO: We could potentially loop and retry in the case * of MSP_TWI_XFER_TIMEOUT. */ return -1; } return 0; } static u32 pmcmsptwi_i2c_func(struct i2c_adapter *adapter) { return I2C_FUNC_I2C | I2C_FUNC_10BIT_ADDR | I2C_FUNC_SMBUS_BYTE | I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | I2C_FUNC_SMBUS_PROC_CALL; } /* -- Initialization -- */ static struct i2c_algorithm pmcmsptwi_algo = { .master_xfer = pmcmsptwi_master_xfer, .functionality = pmcmsptwi_i2c_func, }; static struct i2c_adapter pmcmsptwi_adapter = { .owner = THIS_MODULE, .class = I2C_CLASS_HWMON | I2C_CLASS_SPD, .algo = &pmcmsptwi_algo, .name = DRV_NAME, }; /* work with hotplug and coldplug */ MODULE_ALIAS("platform:" DRV_NAME); static struct platform_driver pmcmsptwi_driver = { .probe = pmcmsptwi_probe, .remove = __devexit_p(pmcmsptwi_remove), .driver = { .name = DRV_NAME, .owner = THIS_MODULE, }, }; static int __init pmcmsptwi_init(void) { return platform_driver_register(&pmcmsptwi_driver); } static void __exit pmcmsptwi_exit(void) { platform_driver_unregister(&pmcmsptwi_driver); } MODULE_DESCRIPTION("PMC MSP TWI/SMBus/I2C driver"); MODULE_LICENSE("GPL"); module_init(pmcmsptwi_init); module_exit(pmcmsptwi_exit);
gpl-2.0
TiaLuna/Nexus_S_kernel
drivers/infiniband/hw/qib/qib_srq.c
3991
9355
/* * Copyright (c) 2006, 2007, 2008, 2009 QLogic Corporation. All rights reserved. * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ #include <linux/err.h> #include <linux/slab.h> #include <linux/vmalloc.h> #include "qib_verbs.h" /** * qib_post_srq_receive - post a receive on a shared receive queue * @ibsrq: the SRQ to post the receive on * @wr: the list of work requests to post * @bad_wr: A pointer to the first WR to cause a problem is put here * * This may be called from interrupt context. */ int qib_post_srq_receive(struct ib_srq *ibsrq, struct ib_recv_wr *wr, struct ib_recv_wr **bad_wr) { struct qib_srq *srq = to_isrq(ibsrq); struct qib_rwq *wq; unsigned long flags; int ret; for (; wr; wr = wr->next) { struct qib_rwqe *wqe; u32 next; int i; if ((unsigned) wr->num_sge > srq->rq.max_sge) { *bad_wr = wr; ret = -EINVAL; goto bail; } spin_lock_irqsave(&srq->rq.lock, flags); wq = srq->rq.wq; next = wq->head + 1; if (next >= srq->rq.size) next = 0; if (next == wq->tail) { spin_unlock_irqrestore(&srq->rq.lock, flags); *bad_wr = wr; ret = -ENOMEM; goto bail; } wqe = get_rwqe_ptr(&srq->rq, wq->head); wqe->wr_id = wr->wr_id; wqe->num_sge = wr->num_sge; for (i = 0; i < wr->num_sge; i++) wqe->sg_list[i] = wr->sg_list[i]; /* Make sure queue entry is written before the head index. */ smp_wmb(); wq->head = next; spin_unlock_irqrestore(&srq->rq.lock, flags); } ret = 0; bail: return ret; } /** * qib_create_srq - create a shared receive queue * @ibpd: the protection domain of the SRQ to create * @srq_init_attr: the attributes of the SRQ * @udata: data from libibverbs when creating a user SRQ */ struct ib_srq *qib_create_srq(struct ib_pd *ibpd, struct ib_srq_init_attr *srq_init_attr, struct ib_udata *udata) { struct qib_ibdev *dev = to_idev(ibpd->device); struct qib_srq *srq; u32 sz; struct ib_srq *ret; if (srq_init_attr->attr.max_sge == 0 || srq_init_attr->attr.max_sge > ib_qib_max_srq_sges || srq_init_attr->attr.max_wr == 0 || srq_init_attr->attr.max_wr > ib_qib_max_srq_wrs) { ret = ERR_PTR(-EINVAL); goto done; } srq = kmalloc(sizeof(*srq), GFP_KERNEL); if (!srq) { ret = ERR_PTR(-ENOMEM); goto done; } /* * Need to use vmalloc() if we want to support large #s of entries. */ srq->rq.size = srq_init_attr->attr.max_wr + 1; srq->rq.max_sge = srq_init_attr->attr.max_sge; sz = sizeof(struct ib_sge) * srq->rq.max_sge + sizeof(struct qib_rwqe); srq->rq.wq = vmalloc_user(sizeof(struct qib_rwq) + srq->rq.size * sz); if (!srq->rq.wq) { ret = ERR_PTR(-ENOMEM); goto bail_srq; } /* * Return the address of the RWQ as the offset to mmap. * See qib_mmap() for details. */ if (udata && udata->outlen >= sizeof(__u64)) { int err; u32 s = sizeof(struct qib_rwq) + srq->rq.size * sz; srq->ip = qib_create_mmap_info(dev, s, ibpd->uobject->context, srq->rq.wq); if (!srq->ip) { ret = ERR_PTR(-ENOMEM); goto bail_wq; } err = ib_copy_to_udata(udata, &srq->ip->offset, sizeof(srq->ip->offset)); if (err) { ret = ERR_PTR(err); goto bail_ip; } } else srq->ip = NULL; /* * ib_create_srq() will initialize srq->ibsrq. */ spin_lock_init(&srq->rq.lock); srq->rq.wq->head = 0; srq->rq.wq->tail = 0; srq->limit = srq_init_attr->attr.srq_limit; spin_lock(&dev->n_srqs_lock); if (dev->n_srqs_allocated == ib_qib_max_srqs) { spin_unlock(&dev->n_srqs_lock); ret = ERR_PTR(-ENOMEM); goto bail_ip; } dev->n_srqs_allocated++; spin_unlock(&dev->n_srqs_lock); if (srq->ip) { spin_lock_irq(&dev->pending_lock); list_add(&srq->ip->pending_mmaps, &dev->pending_mmaps); spin_unlock_irq(&dev->pending_lock); } ret = &srq->ibsrq; goto done; bail_ip: kfree(srq->ip); bail_wq: vfree(srq->rq.wq); bail_srq: kfree(srq); done: return ret; } /** * qib_modify_srq - modify a shared receive queue * @ibsrq: the SRQ to modify * @attr: the new attributes of the SRQ * @attr_mask: indicates which attributes to modify * @udata: user data for libibverbs.so */ int qib_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr, enum ib_srq_attr_mask attr_mask, struct ib_udata *udata) { struct qib_srq *srq = to_isrq(ibsrq); struct qib_rwq *wq; int ret = 0; if (attr_mask & IB_SRQ_MAX_WR) { struct qib_rwq *owq; struct qib_rwqe *p; u32 sz, size, n, head, tail; /* Check that the requested sizes are below the limits. */ if ((attr->max_wr > ib_qib_max_srq_wrs) || ((attr_mask & IB_SRQ_LIMIT) ? attr->srq_limit : srq->limit) > attr->max_wr) { ret = -EINVAL; goto bail; } sz = sizeof(struct qib_rwqe) + srq->rq.max_sge * sizeof(struct ib_sge); size = attr->max_wr + 1; wq = vmalloc_user(sizeof(struct qib_rwq) + size * sz); if (!wq) { ret = -ENOMEM; goto bail; } /* Check that we can write the offset to mmap. */ if (udata && udata->inlen >= sizeof(__u64)) { __u64 offset_addr; __u64 offset = 0; ret = ib_copy_from_udata(&offset_addr, udata, sizeof(offset_addr)); if (ret) goto bail_free; udata->outbuf = (void __user *) (unsigned long) offset_addr; ret = ib_copy_to_udata(udata, &offset, sizeof(offset)); if (ret) goto bail_free; } spin_lock_irq(&srq->rq.lock); /* * validate head and tail pointer values and compute * the number of remaining WQEs. */ owq = srq->rq.wq; head = owq->head; tail = owq->tail; if (head >= srq->rq.size || tail >= srq->rq.size) { ret = -EINVAL; goto bail_unlock; } n = head; if (n < tail) n += srq->rq.size - tail; else n -= tail; if (size <= n) { ret = -EINVAL; goto bail_unlock; } n = 0; p = wq->wq; while (tail != head) { struct qib_rwqe *wqe; int i; wqe = get_rwqe_ptr(&srq->rq, tail); p->wr_id = wqe->wr_id; p->num_sge = wqe->num_sge; for (i = 0; i < wqe->num_sge; i++) p->sg_list[i] = wqe->sg_list[i]; n++; p = (struct qib_rwqe *)((char *) p + sz); if (++tail >= srq->rq.size) tail = 0; } srq->rq.wq = wq; srq->rq.size = size; wq->head = n; wq->tail = 0; if (attr_mask & IB_SRQ_LIMIT) srq->limit = attr->srq_limit; spin_unlock_irq(&srq->rq.lock); vfree(owq); if (srq->ip) { struct qib_mmap_info *ip = srq->ip; struct qib_ibdev *dev = to_idev(srq->ibsrq.device); u32 s = sizeof(struct qib_rwq) + size * sz; qib_update_mmap_info(dev, ip, s, wq); /* * Return the offset to mmap. * See qib_mmap() for details. */ if (udata && udata->inlen >= sizeof(__u64)) { ret = ib_copy_to_udata(udata, &ip->offset, sizeof(ip->offset)); if (ret) goto bail; } /* * Put user mapping info onto the pending list * unless it already is on the list. */ spin_lock_irq(&dev->pending_lock); if (list_empty(&ip->pending_mmaps)) list_add(&ip->pending_mmaps, &dev->pending_mmaps); spin_unlock_irq(&dev->pending_lock); } } else if (attr_mask & IB_SRQ_LIMIT) { spin_lock_irq(&srq->rq.lock); if (attr->srq_limit >= srq->rq.size) ret = -EINVAL; else srq->limit = attr->srq_limit; spin_unlock_irq(&srq->rq.lock); } goto bail; bail_unlock: spin_unlock_irq(&srq->rq.lock); bail_free: vfree(wq); bail: return ret; } int qib_query_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr) { struct qib_srq *srq = to_isrq(ibsrq); attr->max_wr = srq->rq.size - 1; attr->max_sge = srq->rq.max_sge; attr->srq_limit = srq->limit; return 0; } /** * qib_destroy_srq - destroy a shared receive queue * @ibsrq: the SRQ to destroy */ int qib_destroy_srq(struct ib_srq *ibsrq) { struct qib_srq *srq = to_isrq(ibsrq); struct qib_ibdev *dev = to_idev(ibsrq->device); spin_lock(&dev->n_srqs_lock); dev->n_srqs_allocated--; spin_unlock(&dev->n_srqs_lock); if (srq->ip) kref_put(&srq->ip->ref, qib_release_mmap_info); else vfree(srq->rq.wq); kfree(srq); return 0; }
gpl-2.0
TeamRegular/android_kernel_lge_e2nxx-stock
drivers/media/video/v4l2-subdev.c
4247
8701
/* * V4L2 sub-device * * Copyright (C) 2010 Nokia Corporation * * Contact: Laurent Pinchart <laurent.pinchart@ideasonboard.com> * Sakari Ailus <sakari.ailus@iki.fi> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #include <linux/ioctl.h> #include <linux/slab.h> #include <linux/types.h> #include <linux/videodev2.h> #include <linux/export.h> #include <media/v4l2-ctrls.h> #include <media/v4l2-device.h> #include <media/v4l2-ioctl.h> #include <media/v4l2-fh.h> #include <media/v4l2-event.h> static int subdev_fh_init(struct v4l2_subdev_fh *fh, struct v4l2_subdev *sd) { #if defined(CONFIG_VIDEO_V4L2_SUBDEV_API) /* Allocate try format and crop in the same memory block */ fh->try_fmt = kzalloc((sizeof(*fh->try_fmt) + sizeof(*fh->try_crop)) * sd->entity.num_pads, GFP_KERNEL); if (fh->try_fmt == NULL) return -ENOMEM; fh->try_crop = (struct v4l2_rect *) (fh->try_fmt + sd->entity.num_pads); #endif return 0; } static void subdev_fh_free(struct v4l2_subdev_fh *fh) { #if defined(CONFIG_VIDEO_V4L2_SUBDEV_API) kfree(fh->try_fmt); fh->try_fmt = NULL; fh->try_crop = NULL; #endif } static int subdev_open(struct file *file) { struct video_device *vdev = video_devdata(file); struct v4l2_subdev *sd = vdev_to_v4l2_subdev(vdev); struct v4l2_subdev_fh *subdev_fh; #if defined(CONFIG_MEDIA_CONTROLLER) struct media_entity *entity = NULL; #endif int ret; subdev_fh = kzalloc(sizeof(*subdev_fh), GFP_KERNEL); if (subdev_fh == NULL) return -ENOMEM; ret = subdev_fh_init(subdev_fh, sd); if (ret) { kfree(subdev_fh); return ret; } v4l2_fh_init(&subdev_fh->vfh, vdev); v4l2_fh_add(&subdev_fh->vfh); file->private_data = &subdev_fh->vfh; #if defined(CONFIG_MEDIA_CONTROLLER) if (sd->v4l2_dev->mdev) { entity = media_entity_get(&sd->entity); if (!entity) { ret = -EBUSY; goto err; } } #endif if (sd->internal_ops && sd->internal_ops->open) { ret = sd->internal_ops->open(sd, subdev_fh); if (ret < 0) goto err; } return 0; err: #if defined(CONFIG_MEDIA_CONTROLLER) if (entity) media_entity_put(entity); #endif v4l2_fh_del(&subdev_fh->vfh); v4l2_fh_exit(&subdev_fh->vfh); subdev_fh_free(subdev_fh); kfree(subdev_fh); return ret; } static int subdev_close(struct file *file) { struct video_device *vdev = video_devdata(file); struct v4l2_subdev *sd = vdev_to_v4l2_subdev(vdev); struct v4l2_fh *vfh = file->private_data; struct v4l2_subdev_fh *subdev_fh = to_v4l2_subdev_fh(vfh); if (sd->internal_ops && sd->internal_ops->close) sd->internal_ops->close(sd, subdev_fh); #if defined(CONFIG_MEDIA_CONTROLLER) if (sd->v4l2_dev->mdev) media_entity_put(&sd->entity); #endif v4l2_fh_del(vfh); v4l2_fh_exit(vfh); subdev_fh_free(subdev_fh); kfree(subdev_fh); file->private_data = NULL; return 0; } static long subdev_do_ioctl(struct file *file, unsigned int cmd, void *arg) { struct video_device *vdev = video_devdata(file); struct v4l2_subdev *sd = vdev_to_v4l2_subdev(vdev); struct v4l2_fh *vfh = file->private_data; #if defined(CONFIG_VIDEO_V4L2_SUBDEV_API) struct v4l2_subdev_fh *subdev_fh = to_v4l2_subdev_fh(vfh); #endif switch (cmd) { case VIDIOC_QUERYCTRL: return v4l2_queryctrl(vfh->ctrl_handler, arg); case VIDIOC_QUERYMENU: return v4l2_querymenu(vfh->ctrl_handler, arg); case VIDIOC_G_CTRL: return v4l2_g_ctrl(vfh->ctrl_handler, arg); case VIDIOC_S_CTRL: return v4l2_s_ctrl(vfh, vfh->ctrl_handler, arg); case VIDIOC_G_EXT_CTRLS: return v4l2_g_ext_ctrls(vfh->ctrl_handler, arg); case VIDIOC_S_EXT_CTRLS: return v4l2_s_ext_ctrls(vfh, vfh->ctrl_handler, arg); case VIDIOC_TRY_EXT_CTRLS: return v4l2_try_ext_ctrls(vfh->ctrl_handler, arg); case VIDIOC_DQEVENT: if (!(sd->flags & V4L2_SUBDEV_FL_HAS_EVENTS)) return -ENOIOCTLCMD; return v4l2_event_dequeue(vfh, arg, file->f_flags & O_NONBLOCK); case VIDIOC_SUBSCRIBE_EVENT: return v4l2_subdev_call(sd, core, subscribe_event, vfh, arg); case VIDIOC_UNSUBSCRIBE_EVENT: return v4l2_subdev_call(sd, core, unsubscribe_event, vfh, arg); #ifdef CONFIG_VIDEO_ADV_DEBUG case VIDIOC_DBG_G_REGISTER: { struct v4l2_dbg_register *p = arg; if (!capable(CAP_SYS_ADMIN)) return -EPERM; return v4l2_subdev_call(sd, core, g_register, p); } case VIDIOC_DBG_S_REGISTER: { struct v4l2_dbg_register *p = arg; if (!capable(CAP_SYS_ADMIN)) return -EPERM; return v4l2_subdev_call(sd, core, s_register, p); } #endif case VIDIOC_LOG_STATUS: { int ret; pr_info("%s: ================= START STATUS =================\n", sd->name); ret = v4l2_subdev_call(sd, core, log_status); pr_info("%s: ================== END STATUS ==================\n", sd->name); return ret; } #if defined(CONFIG_VIDEO_V4L2_SUBDEV_API) case VIDIOC_SUBDEV_G_FMT: { struct v4l2_subdev_format *format = arg; if (format->which != V4L2_SUBDEV_FORMAT_TRY && format->which != V4L2_SUBDEV_FORMAT_ACTIVE) return -EINVAL; if (format->pad >= sd->entity.num_pads) return -EINVAL; return v4l2_subdev_call(sd, pad, get_fmt, subdev_fh, format); } case VIDIOC_SUBDEV_S_FMT: { struct v4l2_subdev_format *format = arg; if (format->which != V4L2_SUBDEV_FORMAT_TRY && format->which != V4L2_SUBDEV_FORMAT_ACTIVE) return -EINVAL; if (format->pad >= sd->entity.num_pads) return -EINVAL; return v4l2_subdev_call(sd, pad, set_fmt, subdev_fh, format); } case VIDIOC_SUBDEV_G_CROP: { struct v4l2_subdev_crop *crop = arg; if (crop->which != V4L2_SUBDEV_FORMAT_TRY && crop->which != V4L2_SUBDEV_FORMAT_ACTIVE) return -EINVAL; if (crop->pad >= sd->entity.num_pads) return -EINVAL; return v4l2_subdev_call(sd, pad, get_crop, subdev_fh, crop); } case VIDIOC_SUBDEV_S_CROP: { struct v4l2_subdev_crop *crop = arg; if (crop->which != V4L2_SUBDEV_FORMAT_TRY && crop->which != V4L2_SUBDEV_FORMAT_ACTIVE) return -EINVAL; if (crop->pad >= sd->entity.num_pads) return -EINVAL; return v4l2_subdev_call(sd, pad, set_crop, subdev_fh, crop); } case VIDIOC_SUBDEV_ENUM_MBUS_CODE: { struct v4l2_subdev_mbus_code_enum *code = arg; if (code->pad >= sd->entity.num_pads) return -EINVAL; return v4l2_subdev_call(sd, pad, enum_mbus_code, subdev_fh, code); } case VIDIOC_SUBDEV_ENUM_FRAME_SIZE: { struct v4l2_subdev_frame_size_enum *fse = arg; if (fse->pad >= sd->entity.num_pads) return -EINVAL; return v4l2_subdev_call(sd, pad, enum_frame_size, subdev_fh, fse); } case VIDIOC_SUBDEV_G_FRAME_INTERVAL: return v4l2_subdev_call(sd, video, g_frame_interval, arg); case VIDIOC_SUBDEV_S_FRAME_INTERVAL: return v4l2_subdev_call(sd, video, s_frame_interval, arg); case VIDIOC_SUBDEV_ENUM_FRAME_INTERVAL: { struct v4l2_subdev_frame_interval_enum *fie = arg; if (fie->pad >= sd->entity.num_pads) return -EINVAL; return v4l2_subdev_call(sd, pad, enum_frame_interval, subdev_fh, fie); } #endif default: return v4l2_subdev_call(sd, core, ioctl, cmd, arg); } return 0; } static long subdev_ioctl(struct file *file, unsigned int cmd, unsigned long arg) { return video_usercopy(file, cmd, arg, subdev_do_ioctl); } static unsigned int subdev_poll(struct file *file, poll_table *wait) { struct video_device *vdev = video_devdata(file); struct v4l2_subdev *sd = vdev_to_v4l2_subdev(vdev); struct v4l2_fh *fh = file->private_data; if (!(sd->flags & V4L2_SUBDEV_FL_HAS_EVENTS)) return POLLERR; poll_wait(file, &fh->wait, wait); if (v4l2_event_pending(fh)) return POLLPRI; return 0; } const struct v4l2_file_operations v4l2_subdev_fops = { .owner = THIS_MODULE, .open = subdev_open, .unlocked_ioctl = subdev_ioctl, .release = subdev_close, .poll = subdev_poll, }; void v4l2_subdev_init(struct v4l2_subdev *sd, const struct v4l2_subdev_ops *ops) { INIT_LIST_HEAD(&sd->list); BUG_ON(!ops); sd->ops = ops; sd->v4l2_dev = NULL; sd->flags = 0; sd->name[0] = '\0'; sd->grp_id = 0; sd->dev_priv = NULL; sd->host_priv = NULL; #if defined(CONFIG_MEDIA_CONTROLLER) sd->entity.name = sd->name; sd->entity.type = MEDIA_ENT_T_V4L2_SUBDEV; #endif } EXPORT_SYMBOL(v4l2_subdev_init);
gpl-2.0
omnirom/android_kernel_sony_msm8930
arch/mips/lantiq/clk.c
4503
2989
/* * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 as published * by the Free Software Foundation. * * Copyright (C) 2010 Thomas Langer <thomas.langer@lantiq.com> * Copyright (C) 2010 John Crispin <blogic@openwrt.org> */ #include <linux/io.h> #include <linux/export.h> #include <linux/init.h> #include <linux/kernel.h> #include <linux/types.h> #include <linux/clk.h> #include <linux/err.h> #include <linux/list.h> #include <asm/time.h> #include <asm/irq.h> #include <asm/div64.h> #include <lantiq_soc.h> #include "clk.h" struct clk { const char *name; unsigned long rate; unsigned long (*get_rate) (void); }; static struct clk *cpu_clk; static int cpu_clk_cnt; /* lantiq socs have 3 static clocks */ static struct clk cpu_clk_generic[] = { { .name = "cpu", .get_rate = ltq_get_cpu_hz, }, { .name = "fpi", .get_rate = ltq_get_fpi_hz, }, { .name = "io", .get_rate = ltq_get_io_region_clock, }, }; static struct resource ltq_cgu_resource = { .name = "cgu", .start = LTQ_CGU_BASE_ADDR, .end = LTQ_CGU_BASE_ADDR + LTQ_CGU_SIZE - 1, .flags = IORESOURCE_MEM, }; /* remapped clock register range */ void __iomem *ltq_cgu_membase; void clk_init(void) { cpu_clk = cpu_clk_generic; cpu_clk_cnt = ARRAY_SIZE(cpu_clk_generic); } static inline int clk_good(struct clk *clk) { return clk && !IS_ERR(clk); } unsigned long clk_get_rate(struct clk *clk) { if (unlikely(!clk_good(clk))) return 0; if (clk->rate != 0) return clk->rate; if (clk->get_rate != NULL) return clk->get_rate(); return 0; } EXPORT_SYMBOL(clk_get_rate); struct clk *clk_get(struct device *dev, const char *id) { int i; for (i = 0; i < cpu_clk_cnt; i++) if (!strcmp(id, cpu_clk[i].name)) return &cpu_clk[i]; BUG(); return ERR_PTR(-ENOENT); } EXPORT_SYMBOL(clk_get); void clk_put(struct clk *clk) { /* not used */ } EXPORT_SYMBOL(clk_put); int clk_enable(struct clk *clk) { /* not used */ return 0; } EXPORT_SYMBOL(clk_enable); void clk_disable(struct clk *clk) { /* not used */ } EXPORT_SYMBOL(clk_disable); static inline u32 ltq_get_counter_resolution(void) { u32 res; __asm__ __volatile__( ".set push\n" ".set mips32r2\n" "rdhwr %0, $3\n" ".set pop\n" : "=&r" (res) : /* no input */ : "memory"); return res; } void __init plat_time_init(void) { struct clk *clk; if (insert_resource(&iomem_resource, &ltq_cgu_resource) < 0) panic("Failed to insert cgu memory"); if (request_mem_region(ltq_cgu_resource.start, resource_size(&ltq_cgu_resource), "cgu") < 0) panic("Failed to request cgu memory"); ltq_cgu_membase = ioremap_nocache(ltq_cgu_resource.start, resource_size(&ltq_cgu_resource)); if (!ltq_cgu_membase) { pr_err("Failed to remap cgu memory\n"); unreachable(); } clk = clk_get(0, "cpu"); mips_hpt_frequency = clk_get_rate(clk) / ltq_get_counter_resolution(); write_c0_compare(read_c0_count()); clk_put(clk); }
gpl-2.0
spezi77/android_kernel_google_mako
arch/sh/kernel/cpu/sh4a/setup-sh7723.c
4503
18579
/* * SH7723 Setup * * Copyright (C) 2008 Paul Mundt * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ #include <linux/platform_device.h> #include <linux/init.h> #include <linux/serial.h> #include <linux/mm.h> #include <linux/serial_sci.h> #include <linux/uio_driver.h> #include <linux/usb/r8a66597.h> #include <linux/sh_timer.h> #include <linux/io.h> #include <asm/clock.h> #include <asm/mmzone.h> #include <cpu/sh7723.h> /* Serial */ static struct plat_sci_port scif0_platform_data = { .mapbase = 0xffe00000, .port_reg = 0xa4050160, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 80, 80, 80, 80 }, .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, }; static struct platform_device scif0_device = { .name = "sh-sci", .id = 0, .dev = { .platform_data = &scif0_platform_data, }, }; static struct plat_sci_port scif1_platform_data = { .mapbase = 0xffe10000, .port_reg = SCIx_NOT_SUPPORTED, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 81, 81, 81, 81 }, .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, }; static struct platform_device scif1_device = { .name = "sh-sci", .id = 1, .dev = { .platform_data = &scif1_platform_data, }, }; static struct plat_sci_port scif2_platform_data = { .mapbase = 0xffe20000, .port_reg = SCIx_NOT_SUPPORTED, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 82, 82, 82, 82 }, .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, }; static struct platform_device scif2_device = { .name = "sh-sci", .id = 2, .dev = { .platform_data = &scif2_platform_data, }, }; static struct plat_sci_port scif3_platform_data = { .mapbase = 0xa4e30000, .flags = UPF_BOOT_AUTOCONF, .port_reg = SCIx_NOT_SUPPORTED, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_3, .type = PORT_SCIFA, .irqs = { 56, 56, 56, 56 }, }; static struct platform_device scif3_device = { .name = "sh-sci", .id = 3, .dev = { .platform_data = &scif3_platform_data, }, }; static struct plat_sci_port scif4_platform_data = { .mapbase = 0xa4e40000, .port_reg = SCIx_NOT_SUPPORTED, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_3, .type = PORT_SCIFA, .irqs = { 88, 88, 88, 88 }, }; static struct platform_device scif4_device = { .name = "sh-sci", .id = 4, .dev = { .platform_data = &scif4_platform_data, }, }; static struct plat_sci_port scif5_platform_data = { .mapbase = 0xa4e50000, .port_reg = SCIx_NOT_SUPPORTED, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scbrr_algo_id = SCBRR_ALGO_3, .type = PORT_SCIFA, .irqs = { 109, 109, 109, 109 }, }; static struct platform_device scif5_device = { .name = "sh-sci", .id = 5, .dev = { .platform_data = &scif5_platform_data, }, }; static struct uio_info vpu_platform_data = { .name = "VPU5", .version = "0", .irq = 60, }; static struct resource vpu_resources[] = { [0] = { .name = "VPU", .start = 0xfe900000, .end = 0xfe902807, .flags = IORESOURCE_MEM, }, [1] = { /* place holder for contiguous memory */ }, }; static struct platform_device vpu_device = { .name = "uio_pdrv_genirq", .id = 0, .dev = { .platform_data = &vpu_platform_data, }, .resource = vpu_resources, .num_resources = ARRAY_SIZE(vpu_resources), }; static struct uio_info veu0_platform_data = { .name = "VEU2H", .version = "0", .irq = 54, }; static struct resource veu0_resources[] = { [0] = { .name = "VEU2H0", .start = 0xfe920000, .end = 0xfe92027b, .flags = IORESOURCE_MEM, }, [1] = { /* place holder for contiguous memory */ }, }; static struct platform_device veu0_device = { .name = "uio_pdrv_genirq", .id = 1, .dev = { .platform_data = &veu0_platform_data, }, .resource = veu0_resources, .num_resources = ARRAY_SIZE(veu0_resources), }; static struct uio_info veu1_platform_data = { .name = "VEU2H", .version = "0", .irq = 27, }; static struct resource veu1_resources[] = { [0] = { .name = "VEU2H1", .start = 0xfe924000, .end = 0xfe92427b, .flags = IORESOURCE_MEM, }, [1] = { /* place holder for contiguous memory */ }, }; static struct platform_device veu1_device = { .name = "uio_pdrv_genirq", .id = 2, .dev = { .platform_data = &veu1_platform_data, }, .resource = veu1_resources, .num_resources = ARRAY_SIZE(veu1_resources), }; static struct sh_timer_config cmt_platform_data = { .channel_offset = 0x60, .timer_bit = 5, .clockevent_rating = 125, .clocksource_rating = 125, }; static struct resource cmt_resources[] = { [0] = { .start = 0x044a0060, .end = 0x044a006b, .flags = IORESOURCE_MEM, }, [1] = { .start = 104, .flags = IORESOURCE_IRQ, }, }; static struct platform_device cmt_device = { .name = "sh_cmt", .id = 0, .dev = { .platform_data = &cmt_platform_data, }, .resource = cmt_resources, .num_resources = ARRAY_SIZE(cmt_resources), }; static struct sh_timer_config tmu0_platform_data = { .channel_offset = 0x04, .timer_bit = 0, .clockevent_rating = 200, }; static struct resource tmu0_resources[] = { [0] = { .start = 0xffd80008, .end = 0xffd80013, .flags = IORESOURCE_MEM, }, [1] = { .start = 16, .flags = IORESOURCE_IRQ, }, }; static struct platform_device tmu0_device = { .name = "sh_tmu", .id = 0, .dev = { .platform_data = &tmu0_platform_data, }, .resource = tmu0_resources, .num_resources = ARRAY_SIZE(tmu0_resources), }; static struct sh_timer_config tmu1_platform_data = { .channel_offset = 0x10, .timer_bit = 1, .clocksource_rating = 200, }; static struct resource tmu1_resources[] = { [0] = { .start = 0xffd80014, .end = 0xffd8001f, .flags = IORESOURCE_MEM, }, [1] = { .start = 17, .flags = IORESOURCE_IRQ, }, }; static struct platform_device tmu1_device = { .name = "sh_tmu", .id = 1, .dev = { .platform_data = &tmu1_platform_data, }, .resource = tmu1_resources, .num_resources = ARRAY_SIZE(tmu1_resources), }; static struct sh_timer_config tmu2_platform_data = { .channel_offset = 0x1c, .timer_bit = 2, }; static struct resource tmu2_resources[] = { [0] = { .start = 0xffd80020, .end = 0xffd8002b, .flags = IORESOURCE_MEM, }, [1] = { .start = 18, .flags = IORESOURCE_IRQ, }, }; static struct platform_device tmu2_device = { .name = "sh_tmu", .id = 2, .dev = { .platform_data = &tmu2_platform_data, }, .resource = tmu2_resources, .num_resources = ARRAY_SIZE(tmu2_resources), }; static struct sh_timer_config tmu3_platform_data = { .channel_offset = 0x04, .timer_bit = 0, }; static struct resource tmu3_resources[] = { [0] = { .start = 0xffd90008, .end = 0xffd90013, .flags = IORESOURCE_MEM, }, [1] = { .start = 57, .flags = IORESOURCE_IRQ, }, }; static struct platform_device tmu3_device = { .name = "sh_tmu", .id = 3, .dev = { .platform_data = &tmu3_platform_data, }, .resource = tmu3_resources, .num_resources = ARRAY_SIZE(tmu3_resources), }; static struct sh_timer_config tmu4_platform_data = { .channel_offset = 0x10, .timer_bit = 1, }; static struct resource tmu4_resources[] = { [0] = { .start = 0xffd90014, .end = 0xffd9001f, .flags = IORESOURCE_MEM, }, [1] = { .start = 58, .flags = IORESOURCE_IRQ, }, }; static struct platform_device tmu4_device = { .name = "sh_tmu", .id = 4, .dev = { .platform_data = &tmu4_platform_data, }, .resource = tmu4_resources, .num_resources = ARRAY_SIZE(tmu4_resources), }; static struct sh_timer_config tmu5_platform_data = { .channel_offset = 0x1c, .timer_bit = 2, }; static struct resource tmu5_resources[] = { [0] = { .start = 0xffd90020, .end = 0xffd9002b, .flags = IORESOURCE_MEM, }, [1] = { .start = 57, .flags = IORESOURCE_IRQ, }, }; static struct platform_device tmu5_device = { .name = "sh_tmu", .id = 5, .dev = { .platform_data = &tmu5_platform_data, }, .resource = tmu5_resources, .num_resources = ARRAY_SIZE(tmu5_resources), }; static struct resource rtc_resources[] = { [0] = { .start = 0xa465fec0, .end = 0xa465fec0 + 0x58 - 1, .flags = IORESOURCE_IO, }, [1] = { /* Period IRQ */ .start = 69, .flags = IORESOURCE_IRQ, }, [2] = { /* Carry IRQ */ .start = 70, .flags = IORESOURCE_IRQ, }, [3] = { /* Alarm IRQ */ .start = 68, .flags = IORESOURCE_IRQ, }, }; static struct platform_device rtc_device = { .name = "sh-rtc", .id = -1, .num_resources = ARRAY_SIZE(rtc_resources), .resource = rtc_resources, }; static struct r8a66597_platdata r8a66597_data = { .on_chip = 1, }; static struct resource sh7723_usb_host_resources[] = { [0] = { .start = 0xa4d80000, .end = 0xa4d800ff, .flags = IORESOURCE_MEM, }, [1] = { .start = 65, .end = 65, .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, }, }; static struct platform_device sh7723_usb_host_device = { .name = "r8a66597_hcd", .id = 0, .dev = { .dma_mask = NULL, /* not use dma */ .coherent_dma_mask = 0xffffffff, .platform_data = &r8a66597_data, }, .num_resources = ARRAY_SIZE(sh7723_usb_host_resources), .resource = sh7723_usb_host_resources, }; static struct resource iic_resources[] = { [0] = { .name = "IIC", .start = 0x04470000, .end = 0x04470017, .flags = IORESOURCE_MEM, }, [1] = { .start = 96, .end = 99, .flags = IORESOURCE_IRQ, }, }; static struct platform_device iic_device = { .name = "i2c-sh_mobile", .id = 0, /* "i2c0" clock */ .num_resources = ARRAY_SIZE(iic_resources), .resource = iic_resources, }; static struct platform_device *sh7723_devices[] __initdata = { &scif0_device, &scif1_device, &scif2_device, &scif3_device, &scif4_device, &scif5_device, &cmt_device, &tmu0_device, &tmu1_device, &tmu2_device, &tmu3_device, &tmu4_device, &tmu5_device, &rtc_device, &iic_device, &sh7723_usb_host_device, &vpu_device, &veu0_device, &veu1_device, }; static int __init sh7723_devices_setup(void) { platform_resource_setup_memory(&vpu_device, "vpu", 2 << 20); platform_resource_setup_memory(&veu0_device, "veu0", 2 << 20); platform_resource_setup_memory(&veu1_device, "veu1", 2 << 20); return platform_add_devices(sh7723_devices, ARRAY_SIZE(sh7723_devices)); } arch_initcall(sh7723_devices_setup); static struct platform_device *sh7723_early_devices[] __initdata = { &scif0_device, &scif1_device, &scif2_device, &scif3_device, &scif4_device, &scif5_device, &cmt_device, &tmu0_device, &tmu1_device, &tmu2_device, &tmu3_device, &tmu4_device, &tmu5_device, }; void __init plat_early_device_setup(void) { early_platform_add_devices(sh7723_early_devices, ARRAY_SIZE(sh7723_early_devices)); } #define RAMCR_CACHE_L2FC 0x0002 #define RAMCR_CACHE_L2E 0x0001 #define L2_CACHE_ENABLE (RAMCR_CACHE_L2E|RAMCR_CACHE_L2FC) void l2_cache_init(void) { /* Enable L2 cache */ __raw_writel(L2_CACHE_ENABLE, RAMCR); } enum { UNUSED=0, ENABLED, DISABLED, /* interrupt sources */ IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, HUDI, DMAC1A_DEI0,DMAC1A_DEI1,DMAC1A_DEI2,DMAC1A_DEI3, _2DG_TRI,_2DG_INI,_2DG_CEI, DMAC0A_DEI0,DMAC0A_DEI1,DMAC0A_DEI2,DMAC0A_DEI3, VIO_CEUI,VIO_BEUI,VIO_VEU2HI,VIO_VOUI, SCIFA_SCIFA0, VPU_VPUI, TPU_TPUI, ADC_ADI, USB_USI0, RTC_ATI,RTC_PRI,RTC_CUI, DMAC1B_DEI4,DMAC1B_DEI5,DMAC1B_DADERR, DMAC0B_DEI4,DMAC0B_DEI5,DMAC0B_DADERR, KEYSC_KEYI, SCIF_SCIF0,SCIF_SCIF1,SCIF_SCIF2, MSIOF_MSIOFI0,MSIOF_MSIOFI1, SCIFA_SCIFA1, FLCTL_FLSTEI,FLCTL_FLTENDI,FLCTL_FLTREQ0I,FLCTL_FLTREQ1I, I2C_ALI,I2C_TACKI,I2C_WAITI,I2C_DTEI, CMT_CMTI, TSIF_TSIFI, SIU_SIUI, SCIFA_SCIFA2, TMU0_TUNI0, TMU0_TUNI1, TMU0_TUNI2, IRDA_IRDAI, ATAPI_ATAPII, VEU2H1_VEU2HI, LCDC_LCDCI, TMU1_TUNI0,TMU1_TUNI1,TMU1_TUNI2, /* interrupt groups */ DMAC1A, DMAC0A, VIO, DMAC0B, FLCTL, I2C, _2DG, SDHI1, RTC, DMAC1B, SDHI0, }; static struct intc_vect vectors[] __initdata = { INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620), INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660), INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0), INTC_VECT(IRQ6, 0x6c0), INTC_VECT(IRQ7, 0x6e0), INTC_VECT(DMAC1A_DEI0,0x700), INTC_VECT(DMAC1A_DEI1,0x720), INTC_VECT(DMAC1A_DEI2,0x740), INTC_VECT(DMAC1A_DEI3,0x760), INTC_VECT(_2DG_TRI, 0x780), INTC_VECT(_2DG_INI, 0x7A0), INTC_VECT(_2DG_CEI, 0x7C0), INTC_VECT(DMAC0A_DEI0,0x800), INTC_VECT(DMAC0A_DEI1,0x820), INTC_VECT(DMAC0A_DEI2,0x840), INTC_VECT(DMAC0A_DEI3,0x860), INTC_VECT(VIO_CEUI,0x880), INTC_VECT(VIO_BEUI,0x8A0), INTC_VECT(VIO_VEU2HI,0x8C0), INTC_VECT(VIO_VOUI,0x8E0), INTC_VECT(SCIFA_SCIFA0,0x900), INTC_VECT(VPU_VPUI,0x980), INTC_VECT(TPU_TPUI,0x9A0), INTC_VECT(ADC_ADI,0x9E0), INTC_VECT(USB_USI0,0xA20), INTC_VECT(RTC_ATI,0xA80), INTC_VECT(RTC_PRI,0xAA0), INTC_VECT(RTC_CUI,0xAC0), INTC_VECT(DMAC1B_DEI4,0xB00), INTC_VECT(DMAC1B_DEI5,0xB20), INTC_VECT(DMAC1B_DADERR,0xB40), INTC_VECT(DMAC0B_DEI4,0xB80), INTC_VECT(DMAC0B_DEI5,0xBA0), INTC_VECT(DMAC0B_DADERR,0xBC0), INTC_VECT(KEYSC_KEYI,0xBE0), INTC_VECT(SCIF_SCIF0,0xC00), INTC_VECT(SCIF_SCIF1,0xC20), INTC_VECT(SCIF_SCIF2,0xC40), INTC_VECT(MSIOF_MSIOFI0,0xC80), INTC_VECT(MSIOF_MSIOFI1,0xCA0), INTC_VECT(SCIFA_SCIFA1,0xD00), INTC_VECT(FLCTL_FLSTEI,0xD80), INTC_VECT(FLCTL_FLTENDI,0xDA0), INTC_VECT(FLCTL_FLTREQ0I,0xDC0), INTC_VECT(FLCTL_FLTREQ1I,0xDE0), INTC_VECT(I2C_ALI,0xE00), INTC_VECT(I2C_TACKI,0xE20), INTC_VECT(I2C_WAITI,0xE40), INTC_VECT(I2C_DTEI,0xE60), INTC_VECT(SDHI0, 0xE80), INTC_VECT(SDHI0, 0xEA0), INTC_VECT(SDHI0, 0xEC0), INTC_VECT(CMT_CMTI,0xF00), INTC_VECT(TSIF_TSIFI,0xF20), INTC_VECT(SIU_SIUI,0xF80), INTC_VECT(SCIFA_SCIFA2,0xFA0), INTC_VECT(TMU0_TUNI0,0x400), INTC_VECT(TMU0_TUNI1,0x420), INTC_VECT(TMU0_TUNI2,0x440), INTC_VECT(IRDA_IRDAI,0x480), INTC_VECT(ATAPI_ATAPII,0x4A0), INTC_VECT(SDHI1, 0x4E0), INTC_VECT(SDHI1, 0x500), INTC_VECT(SDHI1, 0x520), INTC_VECT(VEU2H1_VEU2HI,0x560), INTC_VECT(LCDC_LCDCI,0x580), INTC_VECT(TMU1_TUNI0,0x920), INTC_VECT(TMU1_TUNI1,0x940), INTC_VECT(TMU1_TUNI2,0x960), }; static struct intc_group groups[] __initdata = { INTC_GROUP(DMAC1A,DMAC1A_DEI0,DMAC1A_DEI1,DMAC1A_DEI2,DMAC1A_DEI3), INTC_GROUP(DMAC0A,DMAC0A_DEI0,DMAC0A_DEI1,DMAC0A_DEI2,DMAC0A_DEI3), INTC_GROUP(VIO, VIO_CEUI,VIO_BEUI,VIO_VEU2HI,VIO_VOUI), INTC_GROUP(DMAC0B, DMAC0B_DEI4,DMAC0B_DEI5,DMAC0B_DADERR), INTC_GROUP(FLCTL,FLCTL_FLSTEI,FLCTL_FLTENDI,FLCTL_FLTREQ0I,FLCTL_FLTREQ1I), INTC_GROUP(I2C,I2C_ALI,I2C_TACKI,I2C_WAITI,I2C_DTEI), INTC_GROUP(_2DG, _2DG_TRI,_2DG_INI,_2DG_CEI), INTC_GROUP(RTC, RTC_ATI,RTC_PRI,RTC_CUI), INTC_GROUP(DMAC1B, DMAC1B_DEI4,DMAC1B_DEI5,DMAC1B_DADERR), }; static struct intc_mask_reg mask_registers[] __initdata = { { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */ { 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0, 0, ENABLED, ENABLED, ENABLED } }, { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */ { VIO_VOUI, VIO_VEU2HI,VIO_BEUI,VIO_CEUI,DMAC0A_DEI3,DMAC0A_DEI2,DMAC0A_DEI1,DMAC0A_DEI0 } }, { 0xa4080088, 0xa40800c8, 8, /* IMR2 / IMCR2 */ { 0, 0, 0, VPU_VPUI,0,0,0,SCIFA_SCIFA0 } }, { 0xa408008c, 0xa40800cc, 8, /* IMR3 / IMCR3 */ { DMAC1A_DEI3,DMAC1A_DEI2,DMAC1A_DEI1,DMAC1A_DEI0,0,0,0,IRDA_IRDAI } }, { 0xa4080090, 0xa40800d0, 8, /* IMR4 / IMCR4 */ { 0,TMU0_TUNI2,TMU0_TUNI1,TMU0_TUNI0,VEU2H1_VEU2HI,0,0,LCDC_LCDCI } }, { 0xa4080094, 0xa40800d4, 8, /* IMR5 / IMCR5 */ { KEYSC_KEYI,DMAC0B_DADERR,DMAC0B_DEI5,DMAC0B_DEI4,0,SCIF_SCIF2,SCIF_SCIF1,SCIF_SCIF0 } }, { 0xa4080098, 0xa40800d8, 8, /* IMR6 / IMCR6 */ { 0,0,0,SCIFA_SCIFA1,ADC_ADI,0,MSIOF_MSIOFI1,MSIOF_MSIOFI0 } }, { 0xa408009c, 0xa40800dc, 8, /* IMR7 / IMCR7 */ { I2C_DTEI, I2C_WAITI, I2C_TACKI, I2C_ALI, FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } }, { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ { 0, ENABLED, ENABLED, ENABLED, 0, 0, SCIFA_SCIFA2, SIU_SIUI } }, { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ { 0, 0, 0, CMT_CMTI, 0, 0, USB_USI0,0 } }, { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */ { 0, DMAC1B_DADERR,DMAC1B_DEI5,DMAC1B_DEI4,0,RTC_ATI,RTC_PRI,RTC_CUI } }, { 0xa40800ac, 0xa40800ec, 8, /* IMR11 / IMCR11 */ { 0,_2DG_CEI,_2DG_INI,_2DG_TRI,0,TPU_TPUI,0,TSIF_TSIFI } }, { 0xa40800b0, 0xa40800f0, 8, /* IMR12 / IMCR12 */ { 0,0,0,0,0,0,0,ATAPI_ATAPII } }, { 0xa4140044, 0xa4140064, 8, /* INTMSK00 / INTMSKCLR00 */ { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, }; static struct intc_prio_reg prio_registers[] __initdata = { { 0xa4080000, 0, 16, 4, /* IPRA */ { TMU0_TUNI0, TMU0_TUNI1, TMU0_TUNI2, IRDA_IRDAI } }, { 0xa4080004, 0, 16, 4, /* IPRB */ { VEU2H1_VEU2HI, LCDC_LCDCI, DMAC1A, 0} }, { 0xa4080008, 0, 16, 4, /* IPRC */ { TMU1_TUNI0, TMU1_TUNI1, TMU1_TUNI2, 0} }, { 0xa408000c, 0, 16, 4, /* IPRD */ { } }, { 0xa4080010, 0, 16, 4, /* IPRE */ { DMAC0A, VIO, SCIFA_SCIFA0, VPU_VPUI } }, { 0xa4080014, 0, 16, 4, /* IPRF */ { KEYSC_KEYI, DMAC0B, USB_USI0, CMT_CMTI } }, { 0xa4080018, 0, 16, 4, /* IPRG */ { SCIF_SCIF0, SCIF_SCIF1, SCIF_SCIF2,0 } }, { 0xa408001c, 0, 16, 4, /* IPRH */ { MSIOF_MSIOFI0,MSIOF_MSIOFI1, FLCTL, I2C } }, { 0xa4080020, 0, 16, 4, /* IPRI */ { SCIFA_SCIFA1,0,TSIF_TSIFI,_2DG } }, { 0xa4080024, 0, 16, 4, /* IPRJ */ { ADC_ADI,0,SIU_SIUI,SDHI1 } }, { 0xa4080028, 0, 16, 4, /* IPRK */ { RTC,DMAC1B,0,SDHI0 } }, { 0xa408002c, 0, 16, 4, /* IPRL */ { SCIFA_SCIFA2,0,TPU_TPUI,ATAPI_ATAPII } }, { 0xa4140010, 0, 32, 4, /* INTPRI00 */ { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, }; static struct intc_sense_reg sense_registers[] __initdata = { { 0xa414001c, 16, 2, /* ICR1 */ { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, }; static struct intc_mask_reg ack_registers[] __initdata = { { 0xa4140024, 0, 8, /* INTREQ00 */ { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, }; static struct intc_desc intc_desc __initdata = { .name = "sh7723", .force_enable = ENABLED, .force_disable = DISABLED, .hw = INTC_HW_DESC(vectors, groups, mask_registers, prio_registers, sense_registers, ack_registers), }; void __init plat_irq_setup(void) { register_intc_controller(&intc_desc); }
gpl-2.0
wyldstallyns/B14CKB1RD_kernel_m8
arch/m68k/platform/5272/config.c
4503
2982
/***************************************************************************/ /* * linux/arch/m68knommu/platform/5272/config.c * * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com) * Copyright (C) 2001-2002, SnapGear Inc. (www.snapgear.com) */ /***************************************************************************/ #include <linux/kernel.h> #include <linux/param.h> #include <linux/init.h> #include <linux/io.h> #include <linux/phy.h> #include <linux/phy_fixed.h> #include <asm/machdep.h> #include <asm/coldfire.h> #include <asm/mcfsim.h> #include <asm/mcfuart.h> /***************************************************************************/ /* * Some platforms need software versions of the GPIO data registers. */ unsigned short ppdata; unsigned char ledbank = 0xff; /***************************************************************************/ static void __init m5272_uarts_init(void) { u32 v; /* Enable the output lines for the serial ports */ v = readl(MCF_MBAR + MCFSIM_PBCNT); v = (v & ~0x000000ff) | 0x00000055; writel(v, MCF_MBAR + MCFSIM_PBCNT); v = readl(MCF_MBAR + MCFSIM_PDCNT); v = (v & ~0x000003fc) | 0x000002a8; writel(v, MCF_MBAR + MCFSIM_PDCNT); } /***************************************************************************/ static void m5272_cpu_reset(void) { local_irq_disable(); /* Set watchdog to reset, and enabled */ __raw_writew(0, MCF_MBAR + MCFSIM_WIRR); __raw_writew(1, MCF_MBAR + MCFSIM_WRRR); __raw_writew(0, MCF_MBAR + MCFSIM_WCR); for (;;) /* wait for watchdog to timeout */; } /***************************************************************************/ void __init config_BSP(char *commandp, int size) { #if defined (CONFIG_MOD5272) volatile unsigned char *pivrp; /* Set base of device vectors to be 64 */ pivrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_PIVR); *pivrp = 0x40; #endif #if defined(CONFIG_NETtel) || defined(CONFIG_SCALES) /* Copy command line from FLASH to local buffer... */ memcpy(commandp, (char *) 0xf0004000, size); commandp[size-1] = 0; #elif defined(CONFIG_CANCam) /* Copy command line from FLASH to local buffer... */ memcpy(commandp, (char *) 0xf0010000, size); commandp[size-1] = 0; #endif mach_reset = m5272_cpu_reset; mach_sched_init = hw_timer_init; } /***************************************************************************/ /* * Some 5272 based boards have the FEC ethernet diectly connected to * an ethernet switch. In this case we need to use the fixed phy type, * and we need to declare it early in boot. */ static struct fixed_phy_status nettel_fixed_phy_status __initdata = { .link = 1, .speed = 100, .duplex = 0, }; /***************************************************************************/ static int __init init_BSP(void) { m5272_uarts_init(); fixed_phy_add(PHY_POLL, 0, &nettel_fixed_phy_status); return 0; } arch_initcall(init_BSP); /***************************************************************************/
gpl-2.0
KevinScottt/kernel-nk1-negalite-lt02ltespr
security/apparmor/file.c
4759
13000
/* * AppArmor security module * * This file contains AppArmor mediation of files * * Copyright (C) 1998-2008 Novell/SUSE * Copyright 2009-2010 Canonical Ltd. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation, version 2 of the * License. */ #include "include/apparmor.h" #include "include/audit.h" #include "include/file.h" #include "include/match.h" #include "include/path.h" #include "include/policy.h" struct file_perms nullperms; /** * audit_file_mask - convert mask to permission string * @buffer: buffer to write string to (NOT NULL) * @mask: permission mask to convert */ static void audit_file_mask(struct audit_buffer *ab, u32 mask) { char str[10]; char *m = str; if (mask & AA_EXEC_MMAP) *m++ = 'm'; if (mask & (MAY_READ | AA_MAY_META_READ)) *m++ = 'r'; if (mask & (MAY_WRITE | AA_MAY_META_WRITE | AA_MAY_CHMOD | AA_MAY_CHOWN)) *m++ = 'w'; else if (mask & MAY_APPEND) *m++ = 'a'; if (mask & AA_MAY_CREATE) *m++ = 'c'; if (mask & AA_MAY_DELETE) *m++ = 'd'; if (mask & AA_MAY_LINK) *m++ = 'l'; if (mask & AA_MAY_LOCK) *m++ = 'k'; if (mask & MAY_EXEC) *m++ = 'x'; *m = '\0'; audit_log_string(ab, str); } /** * file_audit_cb - call back for file specific audit fields * @ab: audit_buffer (NOT NULL) * @va: audit struct to audit values of (NOT NULL) */ static void file_audit_cb(struct audit_buffer *ab, void *va) { struct common_audit_data *sa = va; uid_t fsuid = current_fsuid(); if (sa->aad->fs.request & AA_AUDIT_FILE_MASK) { audit_log_format(ab, " requested_mask="); audit_file_mask(ab, sa->aad->fs.request); } if (sa->aad->fs.denied & AA_AUDIT_FILE_MASK) { audit_log_format(ab, " denied_mask="); audit_file_mask(ab, sa->aad->fs.denied); } if (sa->aad->fs.request & AA_AUDIT_FILE_MASK) { audit_log_format(ab, " fsuid=%d", fsuid); audit_log_format(ab, " ouid=%d", sa->aad->fs.ouid); } if (sa->aad->fs.target) { audit_log_format(ab, " target="); audit_log_untrustedstring(ab, sa->aad->fs.target); } } /** * aa_audit_file - handle the auditing of file operations * @profile: the profile being enforced (NOT NULL) * @perms: the permissions computed for the request (NOT NULL) * @gfp: allocation flags * @op: operation being mediated * @request: permissions requested * @name: name of object being mediated (MAYBE NULL) * @target: name of target (MAYBE NULL) * @ouid: object uid * @info: extra information message (MAYBE NULL) * @error: 0 if operation allowed else failure error code * * Returns: %0 or error on failure */ int aa_audit_file(struct aa_profile *profile, struct file_perms *perms, gfp_t gfp, int op, u32 request, const char *name, const char *target, uid_t ouid, const char *info, int error) { int type = AUDIT_APPARMOR_AUTO; struct common_audit_data sa; struct apparmor_audit_data aad = {0,}; COMMON_AUDIT_DATA_INIT(&sa, NONE); sa.aad = &aad; aad.op = op, aad.fs.request = request; aad.name = name; aad.fs.target = target; aad.fs.ouid = ouid; aad.info = info; aad.error = error; if (likely(!sa.aad->error)) { u32 mask = perms->audit; if (unlikely(AUDIT_MODE(profile) == AUDIT_ALL)) mask = 0xffff; /* mask off perms that are not being force audited */ sa.aad->fs.request &= mask; if (likely(!sa.aad->fs.request)) return 0; type = AUDIT_APPARMOR_AUDIT; } else { /* only report permissions that were denied */ sa.aad->fs.request = sa.aad->fs.request & ~perms->allow; if (sa.aad->fs.request & perms->kill) type = AUDIT_APPARMOR_KILL; /* quiet known rejects, assumes quiet and kill do not overlap */ if ((sa.aad->fs.request & perms->quiet) && AUDIT_MODE(profile) != AUDIT_NOQUIET && AUDIT_MODE(profile) != AUDIT_ALL) sa.aad->fs.request &= ~perms->quiet; if (!sa.aad->fs.request) return COMPLAIN_MODE(profile) ? 0 : sa.aad->error; } sa.aad->fs.denied = sa.aad->fs.request & ~perms->allow; return aa_audit(type, profile, gfp, &sa, file_audit_cb); } /** * map_old_perms - map old file perms layout to the new layout * @old: permission set in old mapping * * Returns: new permission mapping */ static u32 map_old_perms(u32 old) { u32 new = old & 0xf; if (old & MAY_READ) new |= AA_MAY_META_READ; if (old & MAY_WRITE) new |= AA_MAY_META_WRITE | AA_MAY_CREATE | AA_MAY_DELETE | AA_MAY_CHMOD | AA_MAY_CHOWN; if (old & 0x10) new |= AA_MAY_LINK; /* the old mapping lock and link_subset flags where overlaid * and use was determined by part of a pair that they were in */ if (old & 0x20) new |= AA_MAY_LOCK | AA_LINK_SUBSET; if (old & 0x40) /* AA_EXEC_MMAP */ new |= AA_EXEC_MMAP; return new; } /** * compute_perms - convert dfa compressed perms to internal perms * @dfa: dfa to compute perms for (NOT NULL) * @state: state in dfa * @cond: conditions to consider (NOT NULL) * * TODO: convert from dfa + state to permission entry, do computation conversion * at load time. * * Returns: computed permission set */ static struct file_perms compute_perms(struct aa_dfa *dfa, unsigned int state, struct path_cond *cond) { struct file_perms perms; /* FIXME: change over to new dfa format * currently file perms are encoded in the dfa, new format * splits the permissions from the dfa. This mapping can be * done at profile load */ perms.kill = 0; if (current_fsuid() == cond->uid) { perms.allow = map_old_perms(dfa_user_allow(dfa, state)); perms.audit = map_old_perms(dfa_user_audit(dfa, state)); perms.quiet = map_old_perms(dfa_user_quiet(dfa, state)); perms.xindex = dfa_user_xindex(dfa, state); } else { perms.allow = map_old_perms(dfa_other_allow(dfa, state)); perms.audit = map_old_perms(dfa_other_audit(dfa, state)); perms.quiet = map_old_perms(dfa_other_quiet(dfa, state)); perms.xindex = dfa_other_xindex(dfa, state); } perms.allow |= AA_MAY_META_READ; /* change_profile wasn't determined by ownership in old mapping */ if (ACCEPT_TABLE(dfa)[state] & 0x80000000) perms.allow |= AA_MAY_CHANGE_PROFILE; if (ACCEPT_TABLE(dfa)[state] & 0x40000000) perms.allow |= AA_MAY_ONEXEC; return perms; } /** * aa_str_perms - find permission that match @name * @dfa: to match against (MAYBE NULL) * @state: state to start matching in * @name: string to match against dfa (NOT NULL) * @cond: conditions to consider for permission set computation (NOT NULL) * @perms: Returns - the permissions found when matching @name * * Returns: the final state in @dfa when beginning @start and walking @name */ unsigned int aa_str_perms(struct aa_dfa *dfa, unsigned int start, const char *name, struct path_cond *cond, struct file_perms *perms) { unsigned int state; if (!dfa) { *perms = nullperms; return DFA_NOMATCH; } state = aa_dfa_match(dfa, start, name); *perms = compute_perms(dfa, state, cond); return state; } /** * is_deleted - test if a file has been completely unlinked * @dentry: dentry of file to test for deletion (NOT NULL) * * Returns: %1 if deleted else %0 */ static inline bool is_deleted(struct dentry *dentry) { if (d_unlinked(dentry) && dentry->d_inode->i_nlink == 0) return 1; return 0; } /** * aa_path_perm - do permissions check & audit for @path * @op: operation being checked * @profile: profile being enforced (NOT NULL) * @path: path to check permissions of (NOT NULL) * @flags: any additional path flags beyond what the profile specifies * @request: requested permissions * @cond: conditional info for this request (NOT NULL) * * Returns: %0 else error if access denied or other error */ int aa_path_perm(int op, struct aa_profile *profile, struct path *path, int flags, u32 request, struct path_cond *cond) { char *buffer = NULL; struct file_perms perms = {}; const char *name, *info = NULL; int error; flags |= profile->path_flags | (S_ISDIR(cond->mode) ? PATH_IS_DIR : 0); error = aa_path_name(path, flags, &buffer, &name, &info); if (error) { if (error == -ENOENT && is_deleted(path->dentry)) { /* Access to open files that are deleted are * give a pass (implicit delegation) */ error = 0; info = NULL; perms.allow = request; } } else { aa_str_perms(profile->file.dfa, profile->file.start, name, cond, &perms); if (request & ~perms.allow) error = -EACCES; } error = aa_audit_file(profile, &perms, GFP_KERNEL, op, request, name, NULL, cond->uid, info, error); kfree(buffer); return error; } /** * xindex_is_subset - helper for aa_path_link * @link: link permission set * @target: target permission set * * test target x permissions are equal OR a subset of link x permissions * this is done as part of the subset test, where a hardlink must have * a subset of permissions that the target has. * * Returns: %1 if subset else %0 */ static inline bool xindex_is_subset(u32 link, u32 target) { if (((link & ~AA_X_UNSAFE) != (target & ~AA_X_UNSAFE)) || ((link & AA_X_UNSAFE) && !(target & AA_X_UNSAFE))) return 0; return 1; } /** * aa_path_link - Handle hard link permission check * @profile: the profile being enforced (NOT NULL) * @old_dentry: the target dentry (NOT NULL) * @new_dir: directory the new link will be created in (NOT NULL) * @new_dentry: the link being created (NOT NULL) * * Handle the permission test for a link & target pair. Permission * is encoded as a pair where the link permission is determined * first, and if allowed, the target is tested. The target test * is done from the point of the link match (not start of DFA) * making the target permission dependent on the link permission match. * * The subset test if required forces that permissions granted * on link are a subset of the permission granted to target. * * Returns: %0 if allowed else error */ int aa_path_link(struct aa_profile *profile, struct dentry *old_dentry, struct path *new_dir, struct dentry *new_dentry) { struct path link = { new_dir->mnt, new_dentry }; struct path target = { new_dir->mnt, old_dentry }; struct path_cond cond = { old_dentry->d_inode->i_uid, old_dentry->d_inode->i_mode }; char *buffer = NULL, *buffer2 = NULL; const char *lname, *tname = NULL, *info = NULL; struct file_perms lperms, perms; u32 request = AA_MAY_LINK; unsigned int state; int error; lperms = nullperms; /* buffer freed below, lname is pointer in buffer */ error = aa_path_name(&link, profile->path_flags, &buffer, &lname, &info); if (error) goto audit; /* buffer2 freed below, tname is pointer in buffer2 */ error = aa_path_name(&target, profile->path_flags, &buffer2, &tname, &info); if (error) goto audit; error = -EACCES; /* aa_str_perms - handles the case of the dfa being NULL */ state = aa_str_perms(profile->file.dfa, profile->file.start, lname, &cond, &lperms); if (!(lperms.allow & AA_MAY_LINK)) goto audit; /* test to see if target can be paired with link */ state = aa_dfa_null_transition(profile->file.dfa, state); aa_str_perms(profile->file.dfa, state, tname, &cond, &perms); /* force audit/quiet masks for link are stored in the second entry * in the link pair. */ lperms.audit = perms.audit; lperms.quiet = perms.quiet; lperms.kill = perms.kill; if (!(perms.allow & AA_MAY_LINK)) { info = "target restricted"; goto audit; } /* done if link subset test is not required */ if (!(perms.allow & AA_LINK_SUBSET)) goto done_tests; /* Do link perm subset test requiring allowed permission on link are a * subset of the allowed permissions on target. */ aa_str_perms(profile->file.dfa, profile->file.start, tname, &cond, &perms); /* AA_MAY_LINK is not considered in the subset test */ request = lperms.allow & ~AA_MAY_LINK; lperms.allow &= perms.allow | AA_MAY_LINK; request |= AA_AUDIT_FILE_MASK & (lperms.allow & ~perms.allow); if (request & ~lperms.allow) { goto audit; } else if ((lperms.allow & MAY_EXEC) && !xindex_is_subset(lperms.xindex, perms.xindex)) { lperms.allow &= ~MAY_EXEC; request |= MAY_EXEC; info = "link not subset of target"; goto audit; } done_tests: error = 0; audit: error = aa_audit_file(profile, &lperms, GFP_KERNEL, OP_LINK, request, lname, tname, cond.uid, info, error); kfree(buffer); kfree(buffer2); return error; } /** * aa_file_perm - do permission revalidation check & audit for @file * @op: operation being checked * @profile: profile being enforced (NOT NULL) * @file: file to revalidate access permissions on (NOT NULL) * @request: requested permissions * * Returns: %0 if access allowed else error */ int aa_file_perm(int op, struct aa_profile *profile, struct file *file, u32 request) { struct path_cond cond = { .uid = file->f_path.dentry->d_inode->i_uid, .mode = file->f_path.dentry->d_inode->i_mode }; return aa_path_perm(op, profile, &file->f_path, PATH_DELEGATE_DELETED, request, &cond); }
gpl-2.0
airidosas252/cm10.2_kernel
arch/parisc/kernel/irq.c
7575
10293
/* * Code to handle x86 style IRQs plus some generic interrupt stuff. * * Copyright (C) 1992 Linus Torvalds * Copyright (C) 1994, 1995, 1996, 1997, 1998 Ralf Baechle * Copyright (C) 1999 SuSE GmbH (Philipp Rumpf, prumpf@tux.org) * Copyright (C) 1999-2000 Grant Grundler * Copyright (c) 2005 Matthew Wilcox * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2, or (at your option) * any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ #include <linux/bitops.h> #include <linux/errno.h> #include <linux/init.h> #include <linux/interrupt.h> #include <linux/kernel_stat.h> #include <linux/seq_file.h> #include <linux/spinlock.h> #include <linux/types.h> #include <asm/io.h> #include <asm/smp.h> #undef PARISC_IRQ_CR16_COUNTS extern irqreturn_t timer_interrupt(int, void *); extern irqreturn_t ipi_interrupt(int, void *); #define EIEM_MASK(irq) (1UL<<(CPU_IRQ_MAX - irq)) /* Bits in EIEM correlate with cpu_irq_action[]. ** Numbered *Big Endian*! (ie bit 0 is MSB) */ static volatile unsigned long cpu_eiem = 0; /* ** local ACK bitmap ... habitually set to 1, but reset to zero ** between ->ack() and ->end() of the interrupt to prevent ** re-interruption of a processing interrupt. */ static DEFINE_PER_CPU(unsigned long, local_ack_eiem) = ~0UL; static void cpu_mask_irq(struct irq_data *d) { unsigned long eirr_bit = EIEM_MASK(d->irq); cpu_eiem &= ~eirr_bit; /* Do nothing on the other CPUs. If they get this interrupt, * The & cpu_eiem in the do_cpu_irq_mask() ensures they won't * handle it, and the set_eiem() at the bottom will ensure it * then gets disabled */ } static void __cpu_unmask_irq(unsigned int irq) { unsigned long eirr_bit = EIEM_MASK(irq); cpu_eiem |= eirr_bit; /* This is just a simple NOP IPI. But what it does is cause * all the other CPUs to do a set_eiem(cpu_eiem) at the end * of the interrupt handler */ smp_send_all_nop(); } static void cpu_unmask_irq(struct irq_data *d) { __cpu_unmask_irq(d->irq); } void cpu_ack_irq(struct irq_data *d) { unsigned long mask = EIEM_MASK(d->irq); int cpu = smp_processor_id(); /* Clear in EIEM so we can no longer process */ per_cpu(local_ack_eiem, cpu) &= ~mask; /* disable the interrupt */ set_eiem(cpu_eiem & per_cpu(local_ack_eiem, cpu)); /* and now ack it */ mtctl(mask, 23); } void cpu_eoi_irq(struct irq_data *d) { unsigned long mask = EIEM_MASK(d->irq); int cpu = smp_processor_id(); /* set it in the eiems---it's no longer in process */ per_cpu(local_ack_eiem, cpu) |= mask; /* enable the interrupt */ set_eiem(cpu_eiem & per_cpu(local_ack_eiem, cpu)); } #ifdef CONFIG_SMP int cpu_check_affinity(struct irq_data *d, const struct cpumask *dest) { int cpu_dest; /* timer and ipi have to always be received on all CPUs */ if (irqd_is_per_cpu(d)) return -EINVAL; /* whatever mask they set, we just allow one CPU */ cpu_dest = first_cpu(*dest); return cpu_dest; } static int cpu_set_affinity_irq(struct irq_data *d, const struct cpumask *dest, bool force) { int cpu_dest; cpu_dest = cpu_check_affinity(d, dest); if (cpu_dest < 0) return -1; cpumask_copy(d->affinity, dest); return 0; } #endif static struct irq_chip cpu_interrupt_type = { .name = "CPU", .irq_mask = cpu_mask_irq, .irq_unmask = cpu_unmask_irq, .irq_ack = cpu_ack_irq, .irq_eoi = cpu_eoi_irq, #ifdef CONFIG_SMP .irq_set_affinity = cpu_set_affinity_irq, #endif /* XXX: Needs to be written. We managed without it so far, but * we really ought to write it. */ .irq_retrigger = NULL, }; int show_interrupts(struct seq_file *p, void *v) { int i = *(loff_t *) v, j; unsigned long flags; if (i == 0) { seq_puts(p, " "); for_each_online_cpu(j) seq_printf(p, " CPU%d", j); #ifdef PARISC_IRQ_CR16_COUNTS seq_printf(p, " [min/avg/max] (CPU cycle counts)"); #endif seq_putc(p, '\n'); } if (i < NR_IRQS) { struct irq_desc *desc = irq_to_desc(i); struct irqaction *action; raw_spin_lock_irqsave(&desc->lock, flags); action = desc->action; if (!action) goto skip; seq_printf(p, "%3d: ", i); #ifdef CONFIG_SMP for_each_online_cpu(j) seq_printf(p, "%10u ", kstat_irqs_cpu(i, j)); #else seq_printf(p, "%10u ", kstat_irqs(i)); #endif seq_printf(p, " %14s", irq_desc_get_chip(desc)->name); #ifndef PARISC_IRQ_CR16_COUNTS seq_printf(p, " %s", action->name); while ((action = action->next)) seq_printf(p, ", %s", action->name); #else for ( ;action; action = action->next) { unsigned int k, avg, min, max; min = max = action->cr16_hist[0]; for (avg = k = 0; k < PARISC_CR16_HIST_SIZE; k++) { int hist = action->cr16_hist[k]; if (hist) { avg += hist; } else break; if (hist > max) max = hist; if (hist < min) min = hist; } avg /= k; seq_printf(p, " %s[%d/%d/%d]", action->name, min,avg,max); } #endif seq_putc(p, '\n'); skip: raw_spin_unlock_irqrestore(&desc->lock, flags); } return 0; } /* ** The following form a "set": Virtual IRQ, Transaction Address, Trans Data. ** Respectively, these map to IRQ region+EIRR, Processor HPA, EIRR bit. ** ** To use txn_XXX() interfaces, get a Virtual IRQ first. ** Then use that to get the Transaction address and data. */ int cpu_claim_irq(unsigned int irq, struct irq_chip *type, void *data) { if (irq_has_action(irq)) return -EBUSY; if (irq_get_chip(irq) != &cpu_interrupt_type) return -EBUSY; /* for iosapic interrupts */ if (type) { irq_set_chip_and_handler(irq, type, handle_percpu_irq); irq_set_chip_data(irq, data); __cpu_unmask_irq(irq); } return 0; } int txn_claim_irq(int irq) { return cpu_claim_irq(irq, NULL, NULL) ? -1 : irq; } /* * The bits_wide parameter accommodates the limitations of the HW/SW which * use these bits: * Legacy PA I/O (GSC/NIO): 5 bits (architected EIM register) * V-class (EPIC): 6 bits * N/L/A-class (iosapic): 8 bits * PCI 2.2 MSI: 16 bits * Some PCI devices: 32 bits (Symbios SCSI/ATM/HyperFabric) * * On the service provider side: * o PA 1.1 (and PA2.0 narrow mode) 5-bits (width of EIR register) * o PA 2.0 wide mode 6-bits (per processor) * o IA64 8-bits (0-256 total) * * So a Legacy PA I/O device on a PA 2.0 box can't use all the bits supported * by the processor...and the N/L-class I/O subsystem supports more bits than * PA2.0 has. The first case is the problem. */ int txn_alloc_irq(unsigned int bits_wide) { int irq; /* never return irq 0 cause that's the interval timer */ for (irq = CPU_IRQ_BASE + 1; irq <= CPU_IRQ_MAX; irq++) { if (cpu_claim_irq(irq, NULL, NULL) < 0) continue; if ((irq - CPU_IRQ_BASE) >= (1 << bits_wide)) continue; return irq; } /* unlikely, but be prepared */ return -1; } unsigned long txn_affinity_addr(unsigned int irq, int cpu) { #ifdef CONFIG_SMP struct irq_data *d = irq_get_irq_data(irq); cpumask_copy(d->affinity, cpumask_of(cpu)); #endif return per_cpu(cpu_data, cpu).txn_addr; } unsigned long txn_alloc_addr(unsigned int virt_irq) { static int next_cpu = -1; next_cpu++; /* assign to "next" CPU we want this bugger on */ /* validate entry */ while ((next_cpu < nr_cpu_ids) && (!per_cpu(cpu_data, next_cpu).txn_addr || !cpu_online(next_cpu))) next_cpu++; if (next_cpu >= nr_cpu_ids) next_cpu = 0; /* nothing else, assign monarch */ return txn_affinity_addr(virt_irq, next_cpu); } unsigned int txn_alloc_data(unsigned int virt_irq) { return virt_irq - CPU_IRQ_BASE; } static inline int eirr_to_irq(unsigned long eirr) { int bit = fls_long(eirr); return (BITS_PER_LONG - bit) + TIMER_IRQ; } /* ONLY called from entry.S:intr_extint() */ void do_cpu_irq_mask(struct pt_regs *regs) { struct pt_regs *old_regs; unsigned long eirr_val; int irq, cpu = smp_processor_id(); #ifdef CONFIG_SMP struct irq_desc *desc; cpumask_t dest; #endif old_regs = set_irq_regs(regs); local_irq_disable(); irq_enter(); eirr_val = mfctl(23) & cpu_eiem & per_cpu(local_ack_eiem, cpu); if (!eirr_val) goto set_out; irq = eirr_to_irq(eirr_val); #ifdef CONFIG_SMP desc = irq_to_desc(irq); cpumask_copy(&dest, desc->irq_data.affinity); if (irqd_is_per_cpu(&desc->irq_data) && !cpu_isset(smp_processor_id(), dest)) { int cpu = first_cpu(dest); printk(KERN_DEBUG "redirecting irq %d from CPU %d to %d\n", irq, smp_processor_id(), cpu); gsc_writel(irq + CPU_IRQ_BASE, per_cpu(cpu_data, cpu).hpa); goto set_out; } #endif generic_handle_irq(irq); out: irq_exit(); set_irq_regs(old_regs); return; set_out: set_eiem(cpu_eiem & per_cpu(local_ack_eiem, cpu)); goto out; } static struct irqaction timer_action = { .handler = timer_interrupt, .name = "timer", .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_PERCPU | IRQF_IRQPOLL, }; #ifdef CONFIG_SMP static struct irqaction ipi_action = { .handler = ipi_interrupt, .name = "IPI", .flags = IRQF_DISABLED | IRQF_PERCPU, }; #endif static void claim_cpu_irqs(void) { int i; for (i = CPU_IRQ_BASE; i <= CPU_IRQ_MAX; i++) { irq_set_chip_and_handler(i, &cpu_interrupt_type, handle_percpu_irq); } irq_set_handler(TIMER_IRQ, handle_percpu_irq); setup_irq(TIMER_IRQ, &timer_action); #ifdef CONFIG_SMP irq_set_handler(IPI_IRQ, handle_percpu_irq); setup_irq(IPI_IRQ, &ipi_action); #endif } void __init init_IRQ(void) { local_irq_disable(); /* PARANOID - should already be disabled */ mtctl(~0UL, 23); /* EIRR : clear all pending external intr */ claim_cpu_irqs(); #ifdef CONFIG_SMP if (!cpu_eiem) cpu_eiem = EIEM_MASK(IPI_IRQ) | EIEM_MASK(TIMER_IRQ); #else cpu_eiem = EIEM_MASK(TIMER_IRQ); #endif set_eiem(cpu_eiem); /* EIEM : enable all external intr */ }
gpl-2.0
ztemt/NX506J_KitKat_kernel
net/mac80211/spectmgmt.c
7831
2891
/* * spectrum management * * Copyright 2003, Jouni Malinen <jkmaline@cc.hut.fi> * Copyright 2002-2005, Instant802 Networks, Inc. * Copyright 2005-2006, Devicescape Software, Inc. * Copyright 2006-2007 Jiri Benc <jbenc@suse.cz> * Copyright 2007, Michael Wu <flamingice@sourmilk.net> * Copyright 2007-2008, Intel Corporation * Copyright 2008, Johannes Berg <johannes@sipsolutions.net> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ #include <linux/ieee80211.h> #include <net/cfg80211.h> #include <net/mac80211.h> #include "ieee80211_i.h" #include "sta_info.h" #include "wme.h" static void ieee80211_send_refuse_measurement_request(struct ieee80211_sub_if_data *sdata, struct ieee80211_msrment_ie *request_ie, const u8 *da, const u8 *bssid, u8 dialog_token) { struct ieee80211_local *local = sdata->local; struct sk_buff *skb; struct ieee80211_mgmt *msr_report; skb = dev_alloc_skb(sizeof(*msr_report) + local->hw.extra_tx_headroom + sizeof(struct ieee80211_msrment_ie)); if (!skb) return; skb_reserve(skb, local->hw.extra_tx_headroom); msr_report = (struct ieee80211_mgmt *)skb_put(skb, 24); memset(msr_report, 0, 24); memcpy(msr_report->da, da, ETH_ALEN); memcpy(msr_report->sa, sdata->vif.addr, ETH_ALEN); memcpy(msr_report->bssid, bssid, ETH_ALEN); msr_report->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_ACTION); skb_put(skb, 1 + sizeof(msr_report->u.action.u.measurement)); msr_report->u.action.category = WLAN_CATEGORY_SPECTRUM_MGMT; msr_report->u.action.u.measurement.action_code = WLAN_ACTION_SPCT_MSR_RPRT; msr_report->u.action.u.measurement.dialog_token = dialog_token; msr_report->u.action.u.measurement.element_id = WLAN_EID_MEASURE_REPORT; msr_report->u.action.u.measurement.length = sizeof(struct ieee80211_msrment_ie); memset(&msr_report->u.action.u.measurement.msr_elem, 0, sizeof(struct ieee80211_msrment_ie)); msr_report->u.action.u.measurement.msr_elem.token = request_ie->token; msr_report->u.action.u.measurement.msr_elem.mode |= IEEE80211_SPCT_MSR_RPRT_MODE_REFUSED; msr_report->u.action.u.measurement.msr_elem.type = request_ie->type; ieee80211_tx_skb(sdata, skb); } void ieee80211_process_measurement_req(struct ieee80211_sub_if_data *sdata, struct ieee80211_mgmt *mgmt, size_t len) { /* * Ignoring measurement request is spec violation. * Mandatory measurements must be reported optional * measurements might be refused or reported incapable * For now just refuse * TODO: Answer basic measurement as unmeasured */ ieee80211_send_refuse_measurement_request(sdata, &mgmt->u.action.u.measurement.msr_elem, mgmt->sa, mgmt->bssid, mgmt->u.action.u.measurement.dialog_token); }
gpl-2.0
rektide/linux
drivers/gpu/drm/radeon/radeon_connectors.c
152
83228
/* * Copyright 2007-8 Advanced Micro Devices, Inc. * Copyright 2008 Red Hat Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * * Authors: Dave Airlie * Alex Deucher */ #include <drm/drmP.h> #include <drm/drm_edid.h> #include <drm/drm_crtc_helper.h> #include <drm/drm_fb_helper.h> #include <drm/drm_dp_mst_helper.h> #include <drm/radeon_drm.h> #include "radeon.h" #include "radeon_audio.h" #include "atom.h" #include <linux/pm_runtime.h> static int radeon_dp_handle_hpd(struct drm_connector *connector) { struct radeon_connector *radeon_connector = to_radeon_connector(connector); int ret; ret = radeon_dp_mst_check_status(radeon_connector); if (ret == -EINVAL) return 1; return 0; } void radeon_connector_hotplug(struct drm_connector *connector) { struct drm_device *dev = connector->dev; struct radeon_device *rdev = dev->dev_private; struct radeon_connector *radeon_connector = to_radeon_connector(connector); if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) { struct radeon_connector_atom_dig *dig_connector = radeon_connector->con_priv; if (radeon_connector->is_mst_connector) return; if (dig_connector->is_mst) { radeon_dp_handle_hpd(connector); return; } } /* bail if the connector does not have hpd pin, e.g., * VGA, TV, etc. */ if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) return; radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd); /* if the connector is already off, don't turn it back on */ /* FIXME: This access isn't protected by any locks. */ if (connector->dpms != DRM_MODE_DPMS_ON) return; /* just deal with DP (not eDP) here. */ if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) { struct radeon_connector_atom_dig *dig_connector = radeon_connector->con_priv; /* if existing sink type was not DP no need to retrain */ if (dig_connector->dp_sink_type != CONNECTOR_OBJECT_ID_DISPLAYPORT) return; /* first get sink type as it may be reset after (un)plug */ dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector); /* don't do anything if sink is not display port, i.e., * passive dp->(dvi|hdmi) adaptor */ if (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) { int saved_dpms = connector->dpms; /* Only turn off the display if it's physically disconnected */ if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF); } else if (radeon_dp_needs_link_train(radeon_connector)) { /* set it to OFF so that drm_helper_connector_dpms() * won't return immediately since the current state * is ON at this point. */ connector->dpms = DRM_MODE_DPMS_OFF; drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON); } connector->dpms = saved_dpms; } } } static void radeon_property_change_mode(struct drm_encoder *encoder) { struct drm_crtc *crtc = encoder->crtc; if (crtc && crtc->enabled) { drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x, crtc->y, crtc->primary->fb); } } int radeon_get_monitor_bpc(struct drm_connector *connector) { struct drm_device *dev = connector->dev; struct radeon_device *rdev = dev->dev_private; struct radeon_connector *radeon_connector = to_radeon_connector(connector); struct radeon_connector_atom_dig *dig_connector; int bpc = 8; int mode_clock, max_tmds_clock; switch (connector->connector_type) { case DRM_MODE_CONNECTOR_DVII: case DRM_MODE_CONNECTOR_HDMIB: if (radeon_connector->use_digital) { if (drm_detect_hdmi_monitor(radeon_connector_edid(connector))) { if (connector->display_info.bpc) bpc = connector->display_info.bpc; } } break; case DRM_MODE_CONNECTOR_DVID: case DRM_MODE_CONNECTOR_HDMIA: if (drm_detect_hdmi_monitor(radeon_connector_edid(connector))) { if (connector->display_info.bpc) bpc = connector->display_info.bpc; } break; case DRM_MODE_CONNECTOR_DisplayPort: dig_connector = radeon_connector->con_priv; if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) || drm_detect_hdmi_monitor(radeon_connector_edid(connector))) { if (connector->display_info.bpc) bpc = connector->display_info.bpc; } break; case DRM_MODE_CONNECTOR_eDP: case DRM_MODE_CONNECTOR_LVDS: if (connector->display_info.bpc) bpc = connector->display_info.bpc; else if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE5(rdev)) { const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private; struct drm_encoder *encoder = connector_funcs->best_encoder(connector); struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; if (dig->lcd_misc & ATOM_PANEL_MISC_V13_6BIT_PER_COLOR) bpc = 6; else if (dig->lcd_misc & ATOM_PANEL_MISC_V13_8BIT_PER_COLOR) bpc = 8; } break; } if (drm_detect_hdmi_monitor(radeon_connector_edid(connector))) { /* hdmi deep color only implemented on DCE4+ */ if ((bpc > 8) && !ASIC_IS_DCE4(rdev)) { DRM_DEBUG("%s: HDMI deep color %d bpc unsupported. Using 8 bpc.\n", connector->name, bpc); bpc = 8; } /* * Pre DCE-8 hw can't handle > 12 bpc, and more than 12 bpc doesn't make * much sense without support for > 12 bpc framebuffers. RGB 4:4:4 at * 12 bpc is always supported on hdmi deep color sinks, as this is * required by the HDMI-1.3 spec. Clamp to a safe 12 bpc maximum. */ if (bpc > 12) { DRM_DEBUG("%s: HDMI deep color %d bpc unsupported. Using 12 bpc.\n", connector->name, bpc); bpc = 12; } /* Any defined maximum tmds clock limit we must not exceed? */ if (connector->max_tmds_clock > 0) { /* mode_clock is clock in kHz for mode to be modeset on this connector */ mode_clock = radeon_connector->pixelclock_for_modeset; /* Maximum allowable input clock in kHz */ max_tmds_clock = connector->max_tmds_clock * 1000; DRM_DEBUG("%s: hdmi mode dotclock %d kHz, max tmds input clock %d kHz.\n", connector->name, mode_clock, max_tmds_clock); /* Check if bpc is within clock limit. Try to degrade gracefully otherwise */ if ((bpc == 12) && (mode_clock * 3/2 > max_tmds_clock)) { if ((connector->display_info.edid_hdmi_dc_modes & DRM_EDID_HDMI_DC_30) && (mode_clock * 5/4 <= max_tmds_clock)) bpc = 10; else bpc = 8; DRM_DEBUG("%s: HDMI deep color 12 bpc exceeds max tmds clock. Using %d bpc.\n", connector->name, bpc); } if ((bpc == 10) && (mode_clock * 5/4 > max_tmds_clock)) { bpc = 8; DRM_DEBUG("%s: HDMI deep color 10 bpc exceeds max tmds clock. Using %d bpc.\n", connector->name, bpc); } } else if (bpc > 8) { /* max_tmds_clock missing, but hdmi spec mandates it for deep color. */ DRM_DEBUG("%s: Required max tmds clock for HDMI deep color missing. Using 8 bpc.\n", connector->name); bpc = 8; } } if ((radeon_deep_color == 0) && (bpc > 8)) { DRM_DEBUG("%s: Deep color disabled. Set radeon module param deep_color=1 to enable.\n", connector->name); bpc = 8; } DRM_DEBUG("%s: Display bpc=%d, returned bpc=%d\n", connector->name, connector->display_info.bpc, bpc); return bpc; } static void radeon_connector_update_scratch_regs(struct drm_connector *connector, enum drm_connector_status status) { struct drm_device *dev = connector->dev; struct radeon_device *rdev = dev->dev_private; struct drm_encoder *best_encoder = NULL; struct drm_encoder *encoder = NULL; const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private; bool connected; int i; best_encoder = connector_funcs->best_encoder(connector); for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { if (connector->encoder_ids[i] == 0) break; encoder = drm_encoder_find(connector->dev, connector->encoder_ids[i]); if (!encoder) continue; if ((encoder == best_encoder) && (status == connector_status_connected)) connected = true; else connected = false; if (rdev->is_atom_bios) radeon_atombios_connected_scratch_regs(connector, encoder, connected); else radeon_combios_connected_scratch_regs(connector, encoder, connected); } } static struct drm_encoder *radeon_find_encoder(struct drm_connector *connector, int encoder_type) { struct drm_encoder *encoder; int i; for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { if (connector->encoder_ids[i] == 0) break; encoder = drm_encoder_find(connector->dev, connector->encoder_ids[i]); if (!encoder) continue; if (encoder->encoder_type == encoder_type) return encoder; } return NULL; } struct edid *radeon_connector_edid(struct drm_connector *connector) { struct radeon_connector *radeon_connector = to_radeon_connector(connector); struct drm_property_blob *edid_blob = connector->edid_blob_ptr; if (radeon_connector->edid) { return radeon_connector->edid; } else if (edid_blob) { struct edid *edid = kmemdup(edid_blob->data, edid_blob->length, GFP_KERNEL); if (edid) radeon_connector->edid = edid; } return radeon_connector->edid; } static void radeon_connector_get_edid(struct drm_connector *connector) { struct drm_device *dev = connector->dev; struct radeon_device *rdev = dev->dev_private; struct radeon_connector *radeon_connector = to_radeon_connector(connector); if (radeon_connector->edid) return; /* on hw with routers, select right port */ if (radeon_connector->router.ddc_valid) radeon_router_select_ddc_port(radeon_connector); if ((radeon_connector_encoder_get_dp_bridge_encoder_id(connector) != ENCODER_OBJECT_ID_NONE) && radeon_connector->ddc_bus->has_aux) { radeon_connector->edid = drm_get_edid(connector, &radeon_connector->ddc_bus->aux.ddc); } else if ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) || (connector->connector_type == DRM_MODE_CONNECTOR_eDP)) { struct radeon_connector_atom_dig *dig = radeon_connector->con_priv; if ((dig->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT || dig->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) && radeon_connector->ddc_bus->has_aux) radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->aux.ddc); else if (radeon_connector->ddc_bus) radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); } else if (radeon_connector->ddc_bus) { radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); } if (!radeon_connector->edid) { /* don't fetch the edid from the vbios if ddc fails and runpm is * enabled so we report disconnected. */ if ((rdev->flags & RADEON_IS_PX) && (radeon_runtime_pm != 0)) return; if (rdev->is_atom_bios) { /* some laptops provide a hardcoded edid in rom for LCDs */ if (((connector->connector_type == DRM_MODE_CONNECTOR_LVDS) || (connector->connector_type == DRM_MODE_CONNECTOR_eDP))) radeon_connector->edid = radeon_bios_get_hardcoded_edid(rdev); } else { /* some servers provide a hardcoded edid in rom for KVMs */ radeon_connector->edid = radeon_bios_get_hardcoded_edid(rdev); } } } static void radeon_connector_free_edid(struct drm_connector *connector) { struct radeon_connector *radeon_connector = to_radeon_connector(connector); if (radeon_connector->edid) { kfree(radeon_connector->edid); radeon_connector->edid = NULL; } } static int radeon_ddc_get_modes(struct drm_connector *connector) { struct radeon_connector *radeon_connector = to_radeon_connector(connector); int ret; if (radeon_connector->edid) { drm_mode_connector_update_edid_property(connector, radeon_connector->edid); ret = drm_add_edid_modes(connector, radeon_connector->edid); drm_edid_to_eld(connector, radeon_connector->edid); return ret; } drm_mode_connector_update_edid_property(connector, NULL); return 0; } static struct drm_encoder *radeon_best_single_encoder(struct drm_connector *connector) { int enc_id = connector->encoder_ids[0]; /* pick the encoder ids */ if (enc_id) return drm_encoder_find(connector->dev, enc_id); return NULL; } static void radeon_get_native_mode(struct drm_connector *connector) { struct drm_encoder *encoder = radeon_best_single_encoder(connector); struct radeon_encoder *radeon_encoder; if (encoder == NULL) return; radeon_encoder = to_radeon_encoder(encoder); if (!list_empty(&connector->probed_modes)) { struct drm_display_mode *preferred_mode = list_first_entry(&connector->probed_modes, struct drm_display_mode, head); radeon_encoder->native_mode = *preferred_mode; } else { radeon_encoder->native_mode.clock = 0; } } /* * radeon_connector_analog_encoder_conflict_solve * - search for other connectors sharing this encoder * if priority is true, then set them disconnected if this is connected * if priority is false, set us disconnected if they are connected */ static enum drm_connector_status radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector, struct drm_encoder *encoder, enum drm_connector_status current_status, bool priority) { struct drm_device *dev = connector->dev; struct drm_connector *conflict; struct radeon_connector *radeon_conflict; int i; list_for_each_entry(conflict, &dev->mode_config.connector_list, head) { if (conflict == connector) continue; radeon_conflict = to_radeon_connector(conflict); for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { if (conflict->encoder_ids[i] == 0) break; /* if the IDs match */ if (conflict->encoder_ids[i] == encoder->base.id) { if (conflict->status != connector_status_connected) continue; if (radeon_conflict->use_digital) continue; if (priority == true) { DRM_DEBUG_KMS("1: conflicting encoders switching off %s\n", conflict->name); DRM_DEBUG_KMS("in favor of %s\n", connector->name); conflict->status = connector_status_disconnected; radeon_connector_update_scratch_regs(conflict, connector_status_disconnected); } else { DRM_DEBUG_KMS("2: conflicting encoders switching off %s\n", connector->name); DRM_DEBUG_KMS("in favor of %s\n", conflict->name); current_status = connector_status_disconnected; } break; } } } return current_status; } static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encoder) { struct drm_device *dev = encoder->dev; struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); struct drm_display_mode *mode = NULL; struct drm_display_mode *native_mode = &radeon_encoder->native_mode; if (native_mode->hdisplay != 0 && native_mode->vdisplay != 0 && native_mode->clock != 0) { mode = drm_mode_duplicate(dev, native_mode); mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; drm_mode_set_name(mode); DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name); } else if (native_mode->hdisplay != 0 && native_mode->vdisplay != 0) { /* mac laptops without an edid */ /* Note that this is not necessarily the exact panel mode, * but an approximation based on the cvt formula. For these * systems we should ideally read the mode info out of the * registers or add a mode table, but this works and is much * simpler. */ mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false); mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name); } return mode; } static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_connector *connector) { struct drm_device *dev = encoder->dev; struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); struct drm_display_mode *mode = NULL; struct drm_display_mode *native_mode = &radeon_encoder->native_mode; int i; struct mode_size { int w; int h; } common_modes[17] = { { 640, 480}, { 720, 480}, { 800, 600}, { 848, 480}, {1024, 768}, {1152, 768}, {1280, 720}, {1280, 800}, {1280, 854}, {1280, 960}, {1280, 1024}, {1440, 900}, {1400, 1050}, {1680, 1050}, {1600, 1200}, {1920, 1080}, {1920, 1200} }; for (i = 0; i < 17; i++) { if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) { if (common_modes[i].w > 1024 || common_modes[i].h > 768) continue; } if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { if (common_modes[i].w > native_mode->hdisplay || common_modes[i].h > native_mode->vdisplay || (common_modes[i].w == native_mode->hdisplay && common_modes[i].h == native_mode->vdisplay)) continue; } if (common_modes[i].w < 320 || common_modes[i].h < 200) continue; mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false); drm_mode_probed_add(connector, mode); } } static int radeon_connector_set_property(struct drm_connector *connector, struct drm_property *property, uint64_t val) { struct drm_device *dev = connector->dev; struct radeon_device *rdev = dev->dev_private; struct drm_encoder *encoder; struct radeon_encoder *radeon_encoder; if (property == rdev->mode_info.coherent_mode_property) { struct radeon_encoder_atom_dig *dig; bool new_coherent_mode; /* need to find digital encoder on connector */ encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); if (!encoder) return 0; radeon_encoder = to_radeon_encoder(encoder); if (!radeon_encoder->enc_priv) return 0; dig = radeon_encoder->enc_priv; new_coherent_mode = val ? true : false; if (dig->coherent_mode != new_coherent_mode) { dig->coherent_mode = new_coherent_mode; radeon_property_change_mode(&radeon_encoder->base); } } if (property == rdev->mode_info.audio_property) { struct radeon_connector *radeon_connector = to_radeon_connector(connector); /* need to find digital encoder on connector */ encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); if (!encoder) return 0; radeon_encoder = to_radeon_encoder(encoder); if (radeon_connector->audio != val) { radeon_connector->audio = val; radeon_property_change_mode(&radeon_encoder->base); } } if (property == rdev->mode_info.dither_property) { struct radeon_connector *radeon_connector = to_radeon_connector(connector); /* need to find digital encoder on connector */ encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); if (!encoder) return 0; radeon_encoder = to_radeon_encoder(encoder); if (radeon_connector->dither != val) { radeon_connector->dither = val; radeon_property_change_mode(&radeon_encoder->base); } } if (property == rdev->mode_info.underscan_property) { /* need to find digital encoder on connector */ encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); if (!encoder) return 0; radeon_encoder = to_radeon_encoder(encoder); if (radeon_encoder->underscan_type != val) { radeon_encoder->underscan_type = val; radeon_property_change_mode(&radeon_encoder->base); } } if (property == rdev->mode_info.underscan_hborder_property) { /* need to find digital encoder on connector */ encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); if (!encoder) return 0; radeon_encoder = to_radeon_encoder(encoder); if (radeon_encoder->underscan_hborder != val) { radeon_encoder->underscan_hborder = val; radeon_property_change_mode(&radeon_encoder->base); } } if (property == rdev->mode_info.underscan_vborder_property) { /* need to find digital encoder on connector */ encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); if (!encoder) return 0; radeon_encoder = to_radeon_encoder(encoder); if (radeon_encoder->underscan_vborder != val) { radeon_encoder->underscan_vborder = val; radeon_property_change_mode(&radeon_encoder->base); } } if (property == rdev->mode_info.tv_std_property) { encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TVDAC); if (!encoder) { encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_DAC); } if (!encoder) return 0; radeon_encoder = to_radeon_encoder(encoder); if (!radeon_encoder->enc_priv) return 0; if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) { struct radeon_encoder_atom_dac *dac_int; dac_int = radeon_encoder->enc_priv; dac_int->tv_std = val; } else { struct radeon_encoder_tv_dac *dac_int; dac_int = radeon_encoder->enc_priv; dac_int->tv_std = val; } radeon_property_change_mode(&radeon_encoder->base); } if (property == rdev->mode_info.load_detect_property) { struct radeon_connector *radeon_connector = to_radeon_connector(connector); if (val == 0) radeon_connector->dac_load_detect = false; else radeon_connector->dac_load_detect = true; } if (property == rdev->mode_info.tmds_pll_property) { struct radeon_encoder_int_tmds *tmds = NULL; bool ret = false; /* need to find digital encoder on connector */ encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); if (!encoder) return 0; radeon_encoder = to_radeon_encoder(encoder); tmds = radeon_encoder->enc_priv; if (!tmds) return 0; if (val == 0) { if (rdev->is_atom_bios) ret = radeon_atombios_get_tmds_info(radeon_encoder, tmds); else ret = radeon_legacy_get_tmds_info_from_combios(radeon_encoder, tmds); } if (val == 1 || ret == false) { radeon_legacy_get_tmds_info_from_table(radeon_encoder, tmds); } radeon_property_change_mode(&radeon_encoder->base); } if (property == dev->mode_config.scaling_mode_property) { enum radeon_rmx_type rmx_type; if (connector->encoder) radeon_encoder = to_radeon_encoder(connector->encoder); else { const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private; radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector)); } switch (val) { default: case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break; case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break; case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break; case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break; } if (radeon_encoder->rmx_type == rmx_type) return 0; if ((rmx_type != DRM_MODE_SCALE_NONE) && (radeon_encoder->native_mode.clock == 0)) return 0; radeon_encoder->rmx_type = rmx_type; radeon_property_change_mode(&radeon_encoder->base); } if (property == rdev->mode_info.output_csc_property) { if (connector->encoder) radeon_encoder = to_radeon_encoder(connector->encoder); else { const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private; radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector)); } if (radeon_encoder->output_csc == val) return 0; radeon_encoder->output_csc = val; if (connector->encoder->crtc) { struct drm_crtc *crtc = connector->encoder->crtc; const struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private; struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); radeon_crtc->output_csc = radeon_encoder->output_csc; (*crtc_funcs->load_lut)(crtc); } } return 0; } static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder, struct drm_connector *connector) { struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); struct drm_display_mode *native_mode = &radeon_encoder->native_mode; struct drm_display_mode *t, *mode; /* If the EDID preferred mode doesn't match the native mode, use it */ list_for_each_entry_safe(mode, t, &connector->probed_modes, head) { if (mode->type & DRM_MODE_TYPE_PREFERRED) { if (mode->hdisplay != native_mode->hdisplay || mode->vdisplay != native_mode->vdisplay) memcpy(native_mode, mode, sizeof(*mode)); } } /* Try to get native mode details from EDID if necessary */ if (!native_mode->clock) { list_for_each_entry_safe(mode, t, &connector->probed_modes, head) { if (mode->hdisplay == native_mode->hdisplay && mode->vdisplay == native_mode->vdisplay) { *native_mode = *mode; drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V); DRM_DEBUG_KMS("Determined LVDS native mode details from EDID\n"); break; } } } if (!native_mode->clock) { DRM_DEBUG_KMS("No LVDS native mode details, disabling RMX\n"); radeon_encoder->rmx_type = RMX_OFF; } } static int radeon_lvds_get_modes(struct drm_connector *connector) { struct drm_encoder *encoder; int ret = 0; struct drm_display_mode *mode; radeon_connector_get_edid(connector); ret = radeon_ddc_get_modes(connector); if (ret > 0) { encoder = radeon_best_single_encoder(connector); if (encoder) { radeon_fixup_lvds_native_mode(encoder, connector); /* add scaled modes */ radeon_add_common_modes(encoder, connector); } return ret; } encoder = radeon_best_single_encoder(connector); if (!encoder) return 0; /* we have no EDID modes */ mode = radeon_fp_native_mode(encoder); if (mode) { ret = 1; drm_mode_probed_add(connector, mode); /* add the width/height from vbios tables if available */ connector->display_info.width_mm = mode->width_mm; connector->display_info.height_mm = mode->height_mm; /* add scaled modes */ radeon_add_common_modes(encoder, connector); } return ret; } static int radeon_lvds_mode_valid(struct drm_connector *connector, struct drm_display_mode *mode) { struct drm_encoder *encoder = radeon_best_single_encoder(connector); if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) return MODE_PANEL; if (encoder) { struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); struct drm_display_mode *native_mode = &radeon_encoder->native_mode; /* AVIVO hardware supports downscaling modes larger than the panel * to the panel size, but I'm not sure this is desirable. */ if ((mode->hdisplay > native_mode->hdisplay) || (mode->vdisplay > native_mode->vdisplay)) return MODE_PANEL; /* if scaling is disabled, block non-native modes */ if (radeon_encoder->rmx_type == RMX_OFF) { if ((mode->hdisplay != native_mode->hdisplay) || (mode->vdisplay != native_mode->vdisplay)) return MODE_PANEL; } } return MODE_OK; } static enum drm_connector_status radeon_lvds_detect(struct drm_connector *connector, bool force) { struct drm_device *dev = connector->dev; struct radeon_device *rdev = dev->dev_private; struct radeon_connector *radeon_connector = to_radeon_connector(connector); struct drm_encoder *encoder = radeon_best_single_encoder(connector); enum drm_connector_status ret = connector_status_disconnected; int r; r = pm_runtime_get_sync(connector->dev->dev); if (r < 0) return connector_status_disconnected; if (encoder) { struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); struct drm_display_mode *native_mode = &radeon_encoder->native_mode; /* check if panel is valid */ if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240) ret = connector_status_connected; /* don't fetch the edid from the vbios if ddc fails and runpm is * enabled so we report disconnected. */ if ((rdev->flags & RADEON_IS_PX) && (radeon_runtime_pm != 0)) ret = connector_status_disconnected; } /* check for edid as well */ radeon_connector_get_edid(connector); if (radeon_connector->edid) ret = connector_status_connected; /* check acpi lid status ??? */ radeon_connector_update_scratch_regs(connector, ret); pm_runtime_mark_last_busy(connector->dev->dev); pm_runtime_put_autosuspend(connector->dev->dev); return ret; } static void radeon_connector_destroy(struct drm_connector *connector) { struct radeon_connector *radeon_connector = to_radeon_connector(connector); radeon_connector_free_edid(connector); kfree(radeon_connector->con_priv); drm_connector_unregister(connector); drm_connector_cleanup(connector); kfree(connector); } static int radeon_lvds_set_property(struct drm_connector *connector, struct drm_property *property, uint64_t value) { struct drm_device *dev = connector->dev; struct radeon_encoder *radeon_encoder; enum radeon_rmx_type rmx_type; DRM_DEBUG_KMS("\n"); if (property != dev->mode_config.scaling_mode_property) return 0; if (connector->encoder) radeon_encoder = to_radeon_encoder(connector->encoder); else { const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private; radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector)); } switch (value) { case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break; case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break; case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break; default: case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break; } if (radeon_encoder->rmx_type == rmx_type) return 0; radeon_encoder->rmx_type = rmx_type; radeon_property_change_mode(&radeon_encoder->base); return 0; } static const struct drm_connector_helper_funcs radeon_lvds_connector_helper_funcs = { .get_modes = radeon_lvds_get_modes, .mode_valid = radeon_lvds_mode_valid, .best_encoder = radeon_best_single_encoder, }; static const struct drm_connector_funcs radeon_lvds_connector_funcs = { .dpms = drm_helper_connector_dpms, .detect = radeon_lvds_detect, .fill_modes = drm_helper_probe_single_connector_modes, .destroy = radeon_connector_destroy, .set_property = radeon_lvds_set_property, }; static int radeon_vga_get_modes(struct drm_connector *connector) { int ret; radeon_connector_get_edid(connector); ret = radeon_ddc_get_modes(connector); radeon_get_native_mode(connector); return ret; } static int radeon_vga_mode_valid(struct drm_connector *connector, struct drm_display_mode *mode) { struct drm_device *dev = connector->dev; struct radeon_device *rdev = dev->dev_private; /* XXX check mode bandwidth */ if ((mode->clock / 10) > rdev->clock.max_pixel_clock) return MODE_CLOCK_HIGH; return MODE_OK; } static enum drm_connector_status radeon_vga_detect(struct drm_connector *connector, bool force) { struct drm_device *dev = connector->dev; struct radeon_device *rdev = dev->dev_private; struct radeon_connector *radeon_connector = to_radeon_connector(connector); struct drm_encoder *encoder; const struct drm_encoder_helper_funcs *encoder_funcs; bool dret = false; enum drm_connector_status ret = connector_status_disconnected; int r; r = pm_runtime_get_sync(connector->dev->dev); if (r < 0) return connector_status_disconnected; encoder = radeon_best_single_encoder(connector); if (!encoder) ret = connector_status_disconnected; if (radeon_connector->ddc_bus) dret = radeon_ddc_probe(radeon_connector, false); if (dret) { radeon_connector->detected_by_load = false; radeon_connector_free_edid(connector); radeon_connector_get_edid(connector); if (!radeon_connector->edid) { DRM_ERROR("%s: probed a monitor but no|invalid EDID\n", connector->name); ret = connector_status_connected; } else { radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); /* some oems have boards with separate digital and analog connectors * with a shared ddc line (often vga + hdmi) */ if (radeon_connector->use_digital && radeon_connector->shared_ddc) { radeon_connector_free_edid(connector); ret = connector_status_disconnected; } else { ret = connector_status_connected; } } } else { /* if we aren't forcing don't do destructive polling */ if (!force) { /* only return the previous status if we last * detected a monitor via load. */ if (radeon_connector->detected_by_load) ret = connector->status; goto out; } if (radeon_connector->dac_load_detect && encoder) { encoder_funcs = encoder->helper_private; ret = encoder_funcs->detect(encoder, connector); if (ret != connector_status_disconnected) radeon_connector->detected_by_load = true; } } if (ret == connector_status_connected) ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true); /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the * vbios to deal with KVMs. If we have one and are not able to detect a monitor * by other means, assume the CRT is connected and use that EDID. */ if ((!rdev->is_atom_bios) && (ret == connector_status_disconnected) && rdev->mode_info.bios_hardcoded_edid_size) { ret = connector_status_connected; } radeon_connector_update_scratch_regs(connector, ret); out: pm_runtime_mark_last_busy(connector->dev->dev); pm_runtime_put_autosuspend(connector->dev->dev); return ret; } static const struct drm_connector_helper_funcs radeon_vga_connector_helper_funcs = { .get_modes = radeon_vga_get_modes, .mode_valid = radeon_vga_mode_valid, .best_encoder = radeon_best_single_encoder, }; static const struct drm_connector_funcs radeon_vga_connector_funcs = { .dpms = drm_helper_connector_dpms, .detect = radeon_vga_detect, .fill_modes = drm_helper_probe_single_connector_modes, .destroy = radeon_connector_destroy, .set_property = radeon_connector_set_property, }; static int radeon_tv_get_modes(struct drm_connector *connector) { struct drm_device *dev = connector->dev; struct radeon_device *rdev = dev->dev_private; struct drm_display_mode *tv_mode; struct drm_encoder *encoder; encoder = radeon_best_single_encoder(connector); if (!encoder) return 0; /* avivo chips can scale any mode */ if (rdev->family >= CHIP_RS600) /* add scaled modes */ radeon_add_common_modes(encoder, connector); else { /* only 800x600 is supported right now on pre-avivo chips */ tv_mode = drm_cvt_mode(dev, 800, 600, 60, false, false, false); tv_mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; drm_mode_probed_add(connector, tv_mode); } return 1; } static int radeon_tv_mode_valid(struct drm_connector *connector, struct drm_display_mode *mode) { if ((mode->hdisplay > 1024) || (mode->vdisplay > 768)) return MODE_CLOCK_RANGE; return MODE_OK; } static enum drm_connector_status radeon_tv_detect(struct drm_connector *connector, bool force) { struct drm_encoder *encoder; const struct drm_encoder_helper_funcs *encoder_funcs; struct radeon_connector *radeon_connector = to_radeon_connector(connector); enum drm_connector_status ret = connector_status_disconnected; int r; if (!radeon_connector->dac_load_detect) return ret; r = pm_runtime_get_sync(connector->dev->dev); if (r < 0) return connector_status_disconnected; encoder = radeon_best_single_encoder(connector); if (!encoder) ret = connector_status_disconnected; else { encoder_funcs = encoder->helper_private; ret = encoder_funcs->detect(encoder, connector); } if (ret == connector_status_connected) ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, false); radeon_connector_update_scratch_regs(connector, ret); pm_runtime_mark_last_busy(connector->dev->dev); pm_runtime_put_autosuspend(connector->dev->dev); return ret; } static const struct drm_connector_helper_funcs radeon_tv_connector_helper_funcs = { .get_modes = radeon_tv_get_modes, .mode_valid = radeon_tv_mode_valid, .best_encoder = radeon_best_single_encoder, }; static const struct drm_connector_funcs radeon_tv_connector_funcs = { .dpms = drm_helper_connector_dpms, .detect = radeon_tv_detect, .fill_modes = drm_helper_probe_single_connector_modes, .destroy = radeon_connector_destroy, .set_property = radeon_connector_set_property, }; static bool radeon_check_hpd_status_unchanged(struct drm_connector *connector) { struct drm_device *dev = connector->dev; struct radeon_device *rdev = dev->dev_private; struct radeon_connector *radeon_connector = to_radeon_connector(connector); enum drm_connector_status status; /* We only trust HPD on R600 and newer ASICS. */ if (rdev->family >= CHIP_R600 && radeon_connector->hpd.hpd != RADEON_HPD_NONE) { if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) status = connector_status_connected; else status = connector_status_disconnected; if (connector->status == status) return true; } return false; } /* * DVI is complicated * Do a DDC probe, if DDC probe passes, get the full EDID so * we can do analog/digital monitor detection at this point. * If the monitor is an analog monitor or we got no DDC, * we need to find the DAC encoder object for this connector. * If we got no DDC, we do load detection on the DAC encoder object. * If we got analog DDC or load detection passes on the DAC encoder * we have to check if this analog encoder is shared with anyone else (TV) * if its shared we have to set the other connector to disconnected. */ static enum drm_connector_status radeon_dvi_detect(struct drm_connector *connector, bool force) { struct drm_device *dev = connector->dev; struct radeon_device *rdev = dev->dev_private; struct radeon_connector *radeon_connector = to_radeon_connector(connector); struct drm_encoder *encoder = NULL; const struct drm_encoder_helper_funcs *encoder_funcs; int i, r; enum drm_connector_status ret = connector_status_disconnected; bool dret = false, broken_edid = false; r = pm_runtime_get_sync(connector->dev->dev); if (r < 0) return connector_status_disconnected; if (!force && radeon_check_hpd_status_unchanged(connector)) { ret = connector->status; goto exit; } if (radeon_connector->ddc_bus) dret = radeon_ddc_probe(radeon_connector, false); if (dret) { radeon_connector->detected_by_load = false; radeon_connector_free_edid(connector); radeon_connector_get_edid(connector); if (!radeon_connector->edid) { DRM_ERROR("%s: probed a monitor but no|invalid EDID\n", connector->name); /* rs690 seems to have a problem with connectors not existing and always * return a block of 0's. If we see this just stop polling on this output */ if ((rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) && radeon_connector->base.null_edid_counter) { ret = connector_status_disconnected; DRM_ERROR("%s: detected RS690 floating bus bug, stopping ddc detect\n", connector->name); radeon_connector->ddc_bus = NULL; } else { ret = connector_status_connected; broken_edid = true; /* defer use_digital to later */ } } else { radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); /* some oems have boards with separate digital and analog connectors * with a shared ddc line (often vga + hdmi) */ if ((!radeon_connector->use_digital) && radeon_connector->shared_ddc) { radeon_connector_free_edid(connector); ret = connector_status_disconnected; } else { ret = connector_status_connected; } /* This gets complicated. We have boards with VGA + HDMI with a * shared DDC line and we have boards with DVI-D + HDMI with a shared * DDC line. The latter is more complex because with DVI<->HDMI adapters * you don't really know what's connected to which port as both are digital. */ if (radeon_connector->shared_ddc && (ret == connector_status_connected)) { struct drm_connector *list_connector; struct radeon_connector *list_radeon_connector; list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) { if (connector == list_connector) continue; list_radeon_connector = to_radeon_connector(list_connector); if (list_radeon_connector->shared_ddc && (list_radeon_connector->ddc_bus->rec.i2c_id == radeon_connector->ddc_bus->rec.i2c_id)) { /* cases where both connectors are digital */ if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) { /* hpd is our only option in this case */ if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { radeon_connector_free_edid(connector); ret = connector_status_disconnected; } } } } } } } if ((ret == connector_status_connected) && (radeon_connector->use_digital == true)) goto out; /* DVI-D and HDMI-A are digital only */ if ((connector->connector_type == DRM_MODE_CONNECTOR_DVID) || (connector->connector_type == DRM_MODE_CONNECTOR_HDMIA)) goto out; /* if we aren't forcing don't do destructive polling */ if (!force) { /* only return the previous status if we last * detected a monitor via load. */ if (radeon_connector->detected_by_load) ret = connector->status; goto out; } /* find analog encoder */ if (radeon_connector->dac_load_detect) { for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { if (connector->encoder_ids[i] == 0) break; encoder = drm_encoder_find(connector->dev, connector->encoder_ids[i]); if (!encoder) continue; if (encoder->encoder_type != DRM_MODE_ENCODER_DAC && encoder->encoder_type != DRM_MODE_ENCODER_TVDAC) continue; encoder_funcs = encoder->helper_private; if (encoder_funcs->detect) { if (!broken_edid) { if (ret != connector_status_connected) { /* deal with analog monitors without DDC */ ret = encoder_funcs->detect(encoder, connector); if (ret == connector_status_connected) { radeon_connector->use_digital = false; } if (ret != connector_status_disconnected) radeon_connector->detected_by_load = true; } } else { enum drm_connector_status lret; /* assume digital unless load detected otherwise */ radeon_connector->use_digital = true; lret = encoder_funcs->detect(encoder, connector); DRM_DEBUG_KMS("load_detect %x returned: %x\n",encoder->encoder_type,lret); if (lret == connector_status_connected) radeon_connector->use_digital = false; } break; } } } if ((ret == connector_status_connected) && (radeon_connector->use_digital == false) && encoder) { ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true); } /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the * vbios to deal with KVMs. If we have one and are not able to detect a monitor * by other means, assume the DFP is connected and use that EDID. In most * cases the DVI port is actually a virtual KVM port connected to the service * processor. */ out: if ((!rdev->is_atom_bios) && (ret == connector_status_disconnected) && rdev->mode_info.bios_hardcoded_edid_size) { radeon_connector->use_digital = true; ret = connector_status_connected; } /* updated in get modes as well since we need to know if it's analog or digital */ radeon_connector_update_scratch_regs(connector, ret); if ((radeon_audio != 0) && radeon_connector->use_digital) { const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private; encoder = connector_funcs->best_encoder(connector); if (encoder && (encoder->encoder_type == DRM_MODE_ENCODER_TMDS)) { radeon_connector_get_edid(connector); radeon_audio_detect(connector, encoder, ret); } } exit: pm_runtime_mark_last_busy(connector->dev->dev); pm_runtime_put_autosuspend(connector->dev->dev); return ret; } /* okay need to be smart in here about which encoder to pick */ static struct drm_encoder *radeon_dvi_encoder(struct drm_connector *connector) { int enc_id = connector->encoder_ids[0]; struct radeon_connector *radeon_connector = to_radeon_connector(connector); struct drm_encoder *encoder; int i; for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { if (connector->encoder_ids[i] == 0) break; encoder = drm_encoder_find(connector->dev, connector->encoder_ids[i]); if (!encoder) continue; if (radeon_connector->use_digital == true) { if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS) return encoder; } else { if (encoder->encoder_type == DRM_MODE_ENCODER_DAC || encoder->encoder_type == DRM_MODE_ENCODER_TVDAC) return encoder; } } /* see if we have a default encoder TODO */ /* then check use digitial */ /* pick the first one */ if (enc_id) return drm_encoder_find(connector->dev, enc_id); return NULL; } static void radeon_dvi_force(struct drm_connector *connector) { struct radeon_connector *radeon_connector = to_radeon_connector(connector); if (connector->force == DRM_FORCE_ON) radeon_connector->use_digital = false; if (connector->force == DRM_FORCE_ON_DIGITAL) radeon_connector->use_digital = true; } static int radeon_dvi_mode_valid(struct drm_connector *connector, struct drm_display_mode *mode) { struct drm_device *dev = connector->dev; struct radeon_device *rdev = dev->dev_private; struct radeon_connector *radeon_connector = to_radeon_connector(connector); /* XXX check mode bandwidth */ /* clocks over 135 MHz have heat issues with DVI on RV100 */ if (radeon_connector->use_digital && (rdev->family == CHIP_RV100) && (mode->clock > 135000)) return MODE_CLOCK_HIGH; if (radeon_connector->use_digital && (mode->clock > 165000)) { if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) || (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) || (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B)) return MODE_OK; else if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) { /* HDMI 1.3+ supports max clock of 340 Mhz */ if (mode->clock > 340000) return MODE_CLOCK_HIGH; else return MODE_OK; } else { return MODE_CLOCK_HIGH; } } /* check against the max pixel clock */ if ((mode->clock / 10) > rdev->clock.max_pixel_clock) return MODE_CLOCK_HIGH; return MODE_OK; } static const struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = { .get_modes = radeon_vga_get_modes, .mode_valid = radeon_dvi_mode_valid, .best_encoder = radeon_dvi_encoder, }; static const struct drm_connector_funcs radeon_dvi_connector_funcs = { .dpms = drm_helper_connector_dpms, .detect = radeon_dvi_detect, .fill_modes = drm_helper_probe_single_connector_modes, .set_property = radeon_connector_set_property, .destroy = radeon_connector_destroy, .force = radeon_dvi_force, }; static int radeon_dp_get_modes(struct drm_connector *connector) { struct radeon_connector *radeon_connector = to_radeon_connector(connector); struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; struct drm_encoder *encoder = radeon_best_single_encoder(connector); int ret; if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) || (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) { struct drm_display_mode *mode; if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) { if (!radeon_dig_connector->edp_on) atombios_set_edp_panel_power(connector, ATOM_TRANSMITTER_ACTION_POWER_ON); radeon_connector_get_edid(connector); ret = radeon_ddc_get_modes(connector); if (!radeon_dig_connector->edp_on) atombios_set_edp_panel_power(connector, ATOM_TRANSMITTER_ACTION_POWER_OFF); } else { /* need to setup ddc on the bridge */ if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) != ENCODER_OBJECT_ID_NONE) { if (encoder) radeon_atom_ext_encoder_setup_ddc(encoder); } radeon_connector_get_edid(connector); ret = radeon_ddc_get_modes(connector); } if (ret > 0) { if (encoder) { radeon_fixup_lvds_native_mode(encoder, connector); /* add scaled modes */ radeon_add_common_modes(encoder, connector); } return ret; } if (!encoder) return 0; /* we have no EDID modes */ mode = radeon_fp_native_mode(encoder); if (mode) { ret = 1; drm_mode_probed_add(connector, mode); /* add the width/height from vbios tables if available */ connector->display_info.width_mm = mode->width_mm; connector->display_info.height_mm = mode->height_mm; /* add scaled modes */ radeon_add_common_modes(encoder, connector); } } else { /* need to setup ddc on the bridge */ if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) != ENCODER_OBJECT_ID_NONE) { if (encoder) radeon_atom_ext_encoder_setup_ddc(encoder); } radeon_connector_get_edid(connector); ret = radeon_ddc_get_modes(connector); radeon_get_native_mode(connector); } return ret; } u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector) { struct drm_encoder *encoder; struct radeon_encoder *radeon_encoder; int i; for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { if (connector->encoder_ids[i] == 0) break; encoder = drm_encoder_find(connector->dev, connector->encoder_ids[i]); if (!encoder) continue; radeon_encoder = to_radeon_encoder(encoder); switch (radeon_encoder->encoder_id) { case ENCODER_OBJECT_ID_TRAVIS: case ENCODER_OBJECT_ID_NUTMEG: return radeon_encoder->encoder_id; default: break; } } return ENCODER_OBJECT_ID_NONE; } static bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector) { struct drm_encoder *encoder; struct radeon_encoder *radeon_encoder; int i; bool found = false; for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { if (connector->encoder_ids[i] == 0) break; encoder = drm_encoder_find(connector->dev, connector->encoder_ids[i]); if (!encoder) continue; radeon_encoder = to_radeon_encoder(encoder); if (radeon_encoder->caps & ATOM_ENCODER_CAP_RECORD_HBR2) found = true; } return found; } bool radeon_connector_is_dp12_capable(struct drm_connector *connector) { struct drm_device *dev = connector->dev; struct radeon_device *rdev = dev->dev_private; if (ASIC_IS_DCE5(rdev) && (rdev->clock.default_dispclk >= 53900) && radeon_connector_encoder_is_hbr2(connector)) { return true; } return false; } static enum drm_connector_status radeon_dp_detect(struct drm_connector *connector, bool force) { struct drm_device *dev = connector->dev; struct radeon_device *rdev = dev->dev_private; struct radeon_connector *radeon_connector = to_radeon_connector(connector); enum drm_connector_status ret = connector_status_disconnected; struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; struct drm_encoder *encoder = radeon_best_single_encoder(connector); int r; if (radeon_dig_connector->is_mst) return connector_status_disconnected; r = pm_runtime_get_sync(connector->dev->dev); if (r < 0) return connector_status_disconnected; if (!force && radeon_check_hpd_status_unchanged(connector)) { ret = connector->status; goto out; } radeon_connector_free_edid(connector); if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) || (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) { if (encoder) { struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); struct drm_display_mode *native_mode = &radeon_encoder->native_mode; /* check if panel is valid */ if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240) ret = connector_status_connected; /* don't fetch the edid from the vbios if ddc fails and runpm is * enabled so we report disconnected. */ if ((rdev->flags & RADEON_IS_PX) && (radeon_runtime_pm != 0)) ret = connector_status_disconnected; } /* eDP is always DP */ radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT; if (!radeon_dig_connector->edp_on) atombios_set_edp_panel_power(connector, ATOM_TRANSMITTER_ACTION_POWER_ON); if (radeon_dp_getdpcd(radeon_connector)) ret = connector_status_connected; if (!radeon_dig_connector->edp_on) atombios_set_edp_panel_power(connector, ATOM_TRANSMITTER_ACTION_POWER_OFF); } else if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) != ENCODER_OBJECT_ID_NONE) { /* DP bridges are always DP */ radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT; /* get the DPCD from the bridge */ radeon_dp_getdpcd(radeon_connector); if (encoder) { /* setup ddc on the bridge */ radeon_atom_ext_encoder_setup_ddc(encoder); /* bridge chips are always aux */ if (radeon_ddc_probe(radeon_connector, true)) /* try DDC */ ret = connector_status_connected; else if (radeon_connector->dac_load_detect) { /* try load detection */ const struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private; ret = encoder_funcs->detect(encoder, connector); } } } else { radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector); if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { ret = connector_status_connected; if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) { radeon_dp_getdpcd(radeon_connector); r = radeon_dp_mst_probe(radeon_connector); if (r == 1) ret = connector_status_disconnected; } } else { if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) { if (radeon_dp_getdpcd(radeon_connector)) { r = radeon_dp_mst_probe(radeon_connector); if (r == 1) ret = connector_status_disconnected; else ret = connector_status_connected; } } else { /* try non-aux ddc (DP to DVI/HDMI/etc. adapter) */ if (radeon_ddc_probe(radeon_connector, false)) ret = connector_status_connected; } } } radeon_connector_update_scratch_regs(connector, ret); if ((radeon_audio != 0) && encoder) { radeon_connector_get_edid(connector); radeon_audio_detect(connector, encoder, ret); } out: pm_runtime_mark_last_busy(connector->dev->dev); pm_runtime_put_autosuspend(connector->dev->dev); return ret; } static int radeon_dp_mode_valid(struct drm_connector *connector, struct drm_display_mode *mode) { struct drm_device *dev = connector->dev; struct radeon_device *rdev = dev->dev_private; struct radeon_connector *radeon_connector = to_radeon_connector(connector); struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; /* XXX check mode bandwidth */ if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) || (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) { struct drm_encoder *encoder = radeon_best_single_encoder(connector); if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) return MODE_PANEL; if (encoder) { struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); struct drm_display_mode *native_mode = &radeon_encoder->native_mode; /* AVIVO hardware supports downscaling modes larger than the panel * to the panel size, but I'm not sure this is desirable. */ if ((mode->hdisplay > native_mode->hdisplay) || (mode->vdisplay > native_mode->vdisplay)) return MODE_PANEL; /* if scaling is disabled, block non-native modes */ if (radeon_encoder->rmx_type == RMX_OFF) { if ((mode->hdisplay != native_mode->hdisplay) || (mode->vdisplay != native_mode->vdisplay)) return MODE_PANEL; } } } else { if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) { return radeon_dp_mode_valid_helper(connector, mode); } else { if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) { /* HDMI 1.3+ supports max clock of 340 Mhz */ if (mode->clock > 340000) return MODE_CLOCK_HIGH; } else { if (mode->clock > 165000) return MODE_CLOCK_HIGH; } } } return MODE_OK; } static const struct drm_connector_helper_funcs radeon_dp_connector_helper_funcs = { .get_modes = radeon_dp_get_modes, .mode_valid = radeon_dp_mode_valid, .best_encoder = radeon_dvi_encoder, }; static const struct drm_connector_funcs radeon_dp_connector_funcs = { .dpms = drm_helper_connector_dpms, .detect = radeon_dp_detect, .fill_modes = drm_helper_probe_single_connector_modes, .set_property = radeon_connector_set_property, .destroy = radeon_connector_destroy, .force = radeon_dvi_force, }; static const struct drm_connector_funcs radeon_edp_connector_funcs = { .dpms = drm_helper_connector_dpms, .detect = radeon_dp_detect, .fill_modes = drm_helper_probe_single_connector_modes, .set_property = radeon_lvds_set_property, .destroy = radeon_connector_destroy, .force = radeon_dvi_force, }; static const struct drm_connector_funcs radeon_lvds_bridge_connector_funcs = { .dpms = drm_helper_connector_dpms, .detect = radeon_dp_detect, .fill_modes = drm_helper_probe_single_connector_modes, .set_property = radeon_lvds_set_property, .destroy = radeon_connector_destroy, .force = radeon_dvi_force, }; void radeon_add_atom_connector(struct drm_device *dev, uint32_t connector_id, uint32_t supported_device, int connector_type, struct radeon_i2c_bus_rec *i2c_bus, uint32_t igp_lane_info, uint16_t connector_object_id, struct radeon_hpd *hpd, struct radeon_router *router) { struct radeon_device *rdev = dev->dev_private; struct drm_connector *connector; struct radeon_connector *radeon_connector; struct radeon_connector_atom_dig *radeon_dig_connector; struct drm_encoder *encoder; struct radeon_encoder *radeon_encoder; uint32_t subpixel_order = SubPixelNone; bool shared_ddc = false; bool is_dp_bridge = false; bool has_aux = false; if (connector_type == DRM_MODE_CONNECTOR_Unknown) return; /* if the user selected tv=0 don't try and add the connector */ if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) || (connector_type == DRM_MODE_CONNECTOR_Composite) || (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) && (radeon_tv == 0)) return; /* see if we already added it */ list_for_each_entry(connector, &dev->mode_config.connector_list, head) { radeon_connector = to_radeon_connector(connector); if (radeon_connector->connector_id == connector_id) { radeon_connector->devices |= supported_device; return; } if (radeon_connector->ddc_bus && i2c_bus->valid) { if (radeon_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) { radeon_connector->shared_ddc = true; shared_ddc = true; } if (radeon_connector->router_bus && router->ddc_valid && (radeon_connector->router.router_id == router->router_id)) { radeon_connector->shared_ddc = false; shared_ddc = false; } } } /* check if it's a dp bridge */ list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { radeon_encoder = to_radeon_encoder(encoder); if (radeon_encoder->devices & supported_device) { switch (radeon_encoder->encoder_id) { case ENCODER_OBJECT_ID_TRAVIS: case ENCODER_OBJECT_ID_NUTMEG: is_dp_bridge = true; break; default: break; } } } radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL); if (!radeon_connector) return; connector = &radeon_connector->base; radeon_connector->connector_id = connector_id; radeon_connector->devices = supported_device; radeon_connector->shared_ddc = shared_ddc; radeon_connector->connector_object_id = connector_object_id; radeon_connector->hpd = *hpd; radeon_connector->router = *router; if (router->ddc_valid || router->cd_valid) { radeon_connector->router_bus = radeon_i2c_lookup(rdev, &router->i2c_info); if (!radeon_connector->router_bus) DRM_ERROR("Failed to assign router i2c bus! Check dmesg for i2c errors.\n"); } if (is_dp_bridge) { radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); if (!radeon_dig_connector) goto failed; radeon_dig_connector->igp_lane_info = igp_lane_info; radeon_connector->con_priv = radeon_dig_connector; if (i2c_bus->valid) { radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); if (radeon_connector->ddc_bus) has_aux = true; else DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); } switch (connector_type) { case DRM_MODE_CONNECTOR_VGA: case DRM_MODE_CONNECTOR_DVIA: default: drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type); drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); connector->interlace_allowed = true; connector->doublescan_allowed = true; radeon_connector->dac_load_detect = true; drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.load_detect_property, 1); drm_object_attach_property(&radeon_connector->base.base, dev->mode_config.scaling_mode_property, DRM_MODE_SCALE_NONE); if (ASIC_IS_DCE5(rdev)) drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.output_csc_property, RADEON_OUTPUT_CSC_BYPASS); break; case DRM_MODE_CONNECTOR_DVII: case DRM_MODE_CONNECTOR_DVID: case DRM_MODE_CONNECTOR_HDMIA: case DRM_MODE_CONNECTOR_HDMIB: case DRM_MODE_CONNECTOR_DisplayPort: drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type); drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.underscan_property, UNDERSCAN_OFF); drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.underscan_hborder_property, 0); drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.underscan_vborder_property, 0); drm_object_attach_property(&radeon_connector->base.base, dev->mode_config.scaling_mode_property, DRM_MODE_SCALE_NONE); drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.dither_property, RADEON_FMT_DITHER_DISABLE); if (radeon_audio != 0) drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.audio_property, RADEON_AUDIO_AUTO); if (ASIC_IS_DCE5(rdev)) drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.output_csc_property, RADEON_OUTPUT_CSC_BYPASS); subpixel_order = SubPixelHorizontalRGB; connector->interlace_allowed = true; if (connector_type == DRM_MODE_CONNECTOR_HDMIB) connector->doublescan_allowed = true; else connector->doublescan_allowed = false; if (connector_type == DRM_MODE_CONNECTOR_DVII) { radeon_connector->dac_load_detect = true; drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.load_detect_property, 1); } break; case DRM_MODE_CONNECTOR_LVDS: case DRM_MODE_CONNECTOR_eDP: drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_bridge_connector_funcs, connector_type); drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); drm_object_attach_property(&radeon_connector->base.base, dev->mode_config.scaling_mode_property, DRM_MODE_SCALE_FULLSCREEN); subpixel_order = SubPixelHorizontalRGB; connector->interlace_allowed = false; connector->doublescan_allowed = false; break; } } else { switch (connector_type) { case DRM_MODE_CONNECTOR_VGA: drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); if (i2c_bus->valid) { radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); if (!radeon_connector->ddc_bus) DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); } radeon_connector->dac_load_detect = true; drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.load_detect_property, 1); if (ASIC_IS_AVIVO(rdev)) drm_object_attach_property(&radeon_connector->base.base, dev->mode_config.scaling_mode_property, DRM_MODE_SCALE_NONE); if (ASIC_IS_DCE5(rdev)) drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.output_csc_property, RADEON_OUTPUT_CSC_BYPASS); /* no HPD on analog connectors */ radeon_connector->hpd.hpd = RADEON_HPD_NONE; connector->polled = DRM_CONNECTOR_POLL_CONNECT; connector->interlace_allowed = true; connector->doublescan_allowed = true; break; case DRM_MODE_CONNECTOR_DVIA: drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); if (i2c_bus->valid) { radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); if (!radeon_connector->ddc_bus) DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); } radeon_connector->dac_load_detect = true; drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.load_detect_property, 1); if (ASIC_IS_AVIVO(rdev)) drm_object_attach_property(&radeon_connector->base.base, dev->mode_config.scaling_mode_property, DRM_MODE_SCALE_NONE); if (ASIC_IS_DCE5(rdev)) drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.output_csc_property, RADEON_OUTPUT_CSC_BYPASS); /* no HPD on analog connectors */ radeon_connector->hpd.hpd = RADEON_HPD_NONE; connector->interlace_allowed = true; connector->doublescan_allowed = true; break; case DRM_MODE_CONNECTOR_DVII: case DRM_MODE_CONNECTOR_DVID: radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); if (!radeon_dig_connector) goto failed; radeon_dig_connector->igp_lane_info = igp_lane_info; radeon_connector->con_priv = radeon_dig_connector; drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); if (i2c_bus->valid) { radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); if (!radeon_connector->ddc_bus) DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); } subpixel_order = SubPixelHorizontalRGB; drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.coherent_mode_property, 1); if (ASIC_IS_AVIVO(rdev)) { drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.underscan_property, UNDERSCAN_OFF); drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.underscan_hborder_property, 0); drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.underscan_vborder_property, 0); drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.dither_property, RADEON_FMT_DITHER_DISABLE); drm_object_attach_property(&radeon_connector->base.base, dev->mode_config.scaling_mode_property, DRM_MODE_SCALE_NONE); } if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) { drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.audio_property, RADEON_AUDIO_AUTO); } if (connector_type == DRM_MODE_CONNECTOR_DVII) { radeon_connector->dac_load_detect = true; drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.load_detect_property, 1); } if (ASIC_IS_DCE5(rdev)) drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.output_csc_property, RADEON_OUTPUT_CSC_BYPASS); connector->interlace_allowed = true; if (connector_type == DRM_MODE_CONNECTOR_DVII) connector->doublescan_allowed = true; else connector->doublescan_allowed = false; break; case DRM_MODE_CONNECTOR_HDMIA: case DRM_MODE_CONNECTOR_HDMIB: radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); if (!radeon_dig_connector) goto failed; radeon_dig_connector->igp_lane_info = igp_lane_info; radeon_connector->con_priv = radeon_dig_connector; drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); if (i2c_bus->valid) { radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); if (!radeon_connector->ddc_bus) DRM_ERROR("HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); } drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.coherent_mode_property, 1); if (ASIC_IS_AVIVO(rdev)) { drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.underscan_property, UNDERSCAN_OFF); drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.underscan_hborder_property, 0); drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.underscan_vborder_property, 0); drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.dither_property, RADEON_FMT_DITHER_DISABLE); drm_object_attach_property(&radeon_connector->base.base, dev->mode_config.scaling_mode_property, DRM_MODE_SCALE_NONE); } if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) { drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.audio_property, RADEON_AUDIO_AUTO); } if (ASIC_IS_DCE5(rdev)) drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.output_csc_property, RADEON_OUTPUT_CSC_BYPASS); subpixel_order = SubPixelHorizontalRGB; connector->interlace_allowed = true; if (connector_type == DRM_MODE_CONNECTOR_HDMIB) connector->doublescan_allowed = true; else connector->doublescan_allowed = false; break; case DRM_MODE_CONNECTOR_DisplayPort: radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); if (!radeon_dig_connector) goto failed; radeon_dig_connector->igp_lane_info = igp_lane_info; radeon_connector->con_priv = radeon_dig_connector; drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type); drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); if (i2c_bus->valid) { radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); if (radeon_connector->ddc_bus) has_aux = true; else DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); } subpixel_order = SubPixelHorizontalRGB; drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.coherent_mode_property, 1); if (ASIC_IS_AVIVO(rdev)) { drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.underscan_property, UNDERSCAN_OFF); drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.underscan_hborder_property, 0); drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.underscan_vborder_property, 0); drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.dither_property, RADEON_FMT_DITHER_DISABLE); drm_object_attach_property(&radeon_connector->base.base, dev->mode_config.scaling_mode_property, DRM_MODE_SCALE_NONE); } if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) { drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.audio_property, RADEON_AUDIO_AUTO); } if (ASIC_IS_DCE5(rdev)) drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.output_csc_property, RADEON_OUTPUT_CSC_BYPASS); connector->interlace_allowed = true; /* in theory with a DP to VGA converter... */ connector->doublescan_allowed = false; break; case DRM_MODE_CONNECTOR_eDP: radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); if (!radeon_dig_connector) goto failed; radeon_dig_connector->igp_lane_info = igp_lane_info; radeon_connector->con_priv = radeon_dig_connector; drm_connector_init(dev, &radeon_connector->base, &radeon_edp_connector_funcs, connector_type); drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); if (i2c_bus->valid) { radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); if (radeon_connector->ddc_bus) has_aux = true; else DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); } drm_object_attach_property(&radeon_connector->base.base, dev->mode_config.scaling_mode_property, DRM_MODE_SCALE_FULLSCREEN); subpixel_order = SubPixelHorizontalRGB; connector->interlace_allowed = false; connector->doublescan_allowed = false; break; case DRM_MODE_CONNECTOR_SVIDEO: case DRM_MODE_CONNECTOR_Composite: case DRM_MODE_CONNECTOR_9PinDIN: drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type); drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs); radeon_connector->dac_load_detect = true; drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.load_detect_property, 1); drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.tv_std_property, radeon_atombios_get_tv_info(rdev)); /* no HPD on analog connectors */ radeon_connector->hpd.hpd = RADEON_HPD_NONE; connector->interlace_allowed = false; connector->doublescan_allowed = false; break; case DRM_MODE_CONNECTOR_LVDS: radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); if (!radeon_dig_connector) goto failed; radeon_dig_connector->igp_lane_info = igp_lane_info; radeon_connector->con_priv = radeon_dig_connector; drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type); drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs); if (i2c_bus->valid) { radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); if (!radeon_connector->ddc_bus) DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); } drm_object_attach_property(&radeon_connector->base.base, dev->mode_config.scaling_mode_property, DRM_MODE_SCALE_FULLSCREEN); subpixel_order = SubPixelHorizontalRGB; connector->interlace_allowed = false; connector->doublescan_allowed = false; break; } } if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) { if (i2c_bus->valid) connector->polled = DRM_CONNECTOR_POLL_CONNECT; } else connector->polled = DRM_CONNECTOR_POLL_HPD; connector->display_info.subpixel_order = subpixel_order; drm_connector_register(connector); if (has_aux) radeon_dp_aux_init(radeon_connector); return; failed: drm_connector_cleanup(connector); kfree(connector); } void radeon_add_legacy_connector(struct drm_device *dev, uint32_t connector_id, uint32_t supported_device, int connector_type, struct radeon_i2c_bus_rec *i2c_bus, uint16_t connector_object_id, struct radeon_hpd *hpd) { struct radeon_device *rdev = dev->dev_private; struct drm_connector *connector; struct radeon_connector *radeon_connector; uint32_t subpixel_order = SubPixelNone; if (connector_type == DRM_MODE_CONNECTOR_Unknown) return; /* if the user selected tv=0 don't try and add the connector */ if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) || (connector_type == DRM_MODE_CONNECTOR_Composite) || (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) && (radeon_tv == 0)) return; /* see if we already added it */ list_for_each_entry(connector, &dev->mode_config.connector_list, head) { radeon_connector = to_radeon_connector(connector); if (radeon_connector->connector_id == connector_id) { radeon_connector->devices |= supported_device; return; } } radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL); if (!radeon_connector) return; connector = &radeon_connector->base; radeon_connector->connector_id = connector_id; radeon_connector->devices = supported_device; radeon_connector->connector_object_id = connector_object_id; radeon_connector->hpd = *hpd; switch (connector_type) { case DRM_MODE_CONNECTOR_VGA: drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); if (i2c_bus->valid) { radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); if (!radeon_connector->ddc_bus) DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); } radeon_connector->dac_load_detect = true; drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.load_detect_property, 1); /* no HPD on analog connectors */ radeon_connector->hpd.hpd = RADEON_HPD_NONE; connector->polled = DRM_CONNECTOR_POLL_CONNECT; connector->interlace_allowed = true; connector->doublescan_allowed = true; break; case DRM_MODE_CONNECTOR_DVIA: drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); if (i2c_bus->valid) { radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); if (!radeon_connector->ddc_bus) DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); } radeon_connector->dac_load_detect = true; drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.load_detect_property, 1); /* no HPD on analog connectors */ radeon_connector->hpd.hpd = RADEON_HPD_NONE; connector->interlace_allowed = true; connector->doublescan_allowed = true; break; case DRM_MODE_CONNECTOR_DVII: case DRM_MODE_CONNECTOR_DVID: drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); if (i2c_bus->valid) { radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); if (!radeon_connector->ddc_bus) DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); } if (connector_type == DRM_MODE_CONNECTOR_DVII) { radeon_connector->dac_load_detect = true; drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.load_detect_property, 1); } subpixel_order = SubPixelHorizontalRGB; connector->interlace_allowed = true; if (connector_type == DRM_MODE_CONNECTOR_DVII) connector->doublescan_allowed = true; else connector->doublescan_allowed = false; break; case DRM_MODE_CONNECTOR_SVIDEO: case DRM_MODE_CONNECTOR_Composite: case DRM_MODE_CONNECTOR_9PinDIN: drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type); drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs); radeon_connector->dac_load_detect = true; /* RS400,RC410,RS480 chipset seems to report a lot * of false positive on load detect, we haven't yet * found a way to make load detect reliable on those * chipset, thus just disable it for TV. */ if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480) radeon_connector->dac_load_detect = false; drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.load_detect_property, radeon_connector->dac_load_detect); drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.tv_std_property, radeon_combios_get_tv_info(rdev)); /* no HPD on analog connectors */ radeon_connector->hpd.hpd = RADEON_HPD_NONE; connector->interlace_allowed = false; connector->doublescan_allowed = false; break; case DRM_MODE_CONNECTOR_LVDS: drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type); drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs); if (i2c_bus->valid) { radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); if (!radeon_connector->ddc_bus) DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); } drm_object_attach_property(&radeon_connector->base.base, dev->mode_config.scaling_mode_property, DRM_MODE_SCALE_FULLSCREEN); subpixel_order = SubPixelHorizontalRGB; connector->interlace_allowed = false; connector->doublescan_allowed = false; break; } if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) { if (i2c_bus->valid) connector->polled = DRM_CONNECTOR_POLL_CONNECT; } else connector->polled = DRM_CONNECTOR_POLL_HPD; connector->display_info.subpixel_order = subpixel_order; drm_connector_register(connector); } void radeon_setup_mst_connector(struct drm_device *dev) { struct radeon_device *rdev = dev->dev_private; struct drm_connector *connector; struct radeon_connector *radeon_connector; if (!ASIC_IS_DCE5(rdev)) return; if (radeon_mst == 0) return; list_for_each_entry(connector, &dev->mode_config.connector_list, head) { int ret; radeon_connector = to_radeon_connector(connector); if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) continue; ret = radeon_dp_mst_init(radeon_connector); } }
gpl-2.0
EnJens/android-tegra-nv-2.6.39
arch/arm/mach-omap2/board-omap3logic.c
152
6438
/* * linux/arch/arm/mach-omap2/board-omap3logic.c * * Copyright (C) 2010 Li-Pro.Net * Stephan Linz <linz@li-pro.net> * * Copyright (C) 2010 Logic Product Development, Inc. * Peter Barada <peter.barada@logicpd.com> * * Modified from Beagle, EVM, and RX51 * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ #include <linux/kernel.h> #include <linux/init.h> #include <linux/platform_device.h> #include <linux/delay.h> #include <linux/err.h> #include <linux/clk.h> #include <linux/io.h> #include <linux/gpio.h> #include <linux/regulator/machine.h> #include <linux/i2c/twl.h> #include <linux/mmc/host.h> #include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include "mux.h" #include "hsmmc.h" #include "timer-gp.h" #include "control.h" #include <plat/mux.h> #include <plat/board.h> #include <plat/common.h> #include <plat/gpmc-smsc911x.h> #include <plat/gpmc.h> #include <plat/sdrc.h> #define OMAP3LOGIC_SMSC911X_CS 1 #define OMAP3530_LV_SOM_MMC_GPIO_CD 110 #define OMAP3530_LV_SOM_MMC_GPIO_WP 126 #define OMAP3530_LV_SOM_SMSC911X_GPIO_IRQ 152 #define OMAP3_TORPEDO_MMC_GPIO_CD 127 #define OMAP3_TORPEDO_SMSC911X_GPIO_IRQ 129 static struct regulator_consumer_supply omap3logic_vmmc1_supply = { .supply = "vmmc", }; /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ static struct regulator_init_data omap3logic_vmmc1 = { .constraints = { .name = "VMMC1", .min_uV = 1850000, .max_uV = 3150000, .valid_modes_mask = REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY, .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, .num_consumer_supplies = 1, .consumer_supplies = &omap3logic_vmmc1_supply, }; static struct twl4030_gpio_platform_data omap3logic_gpio_data = { .gpio_base = OMAP_MAX_GPIO_LINES, .irq_base = TWL4030_GPIO_IRQ_BASE, .irq_end = TWL4030_GPIO_IRQ_END, .use_leds = true, .pullups = BIT(1), .pulldowns = BIT(2) | BIT(6) | BIT(7) | BIT(8) | BIT(13) | BIT(15) | BIT(16) | BIT(17), }; static struct twl4030_platform_data omap3logic_twldata = { .irq_base = TWL4030_IRQ_BASE, .irq_end = TWL4030_IRQ_END, /* platform_data for children goes here */ .gpio = &omap3logic_gpio_data, .vmmc1 = &omap3logic_vmmc1, }; static struct i2c_board_info __initdata omap3logic_i2c_boardinfo[] = { { I2C_BOARD_INFO("twl4030", 0x48), .flags = I2C_CLIENT_WAKE, .irq = INT_34XX_SYS_NIRQ, .platform_data = &omap3logic_twldata, }, }; static int __init omap3logic_i2c_init(void) { omap_register_i2c_bus(1, 2600, omap3logic_i2c_boardinfo, ARRAY_SIZE(omap3logic_i2c_boardinfo)); return 0; } static struct omap2_hsmmc_info __initdata board_mmc_info[] = { { .name = "external", .mmc = 1, .caps = MMC_CAP_4_BIT_DATA, .gpio_cd = -EINVAL, .gpio_wp = -EINVAL, }, {} /* Terminator */ }; static void __init board_mmc_init(void) { if (machine_is_omap3530_lv_som()) { /* OMAP3530 LV SOM board */ board_mmc_info[0].gpio_cd = OMAP3530_LV_SOM_MMC_GPIO_CD; board_mmc_info[0].gpio_wp = OMAP3530_LV_SOM_MMC_GPIO_WP; omap_mux_init_signal("gpio_110", OMAP_PIN_OUTPUT); omap_mux_init_signal("gpio_126", OMAP_PIN_OUTPUT); } else if (machine_is_omap3_torpedo()) { /* OMAP3 Torpedo board */ board_mmc_info[0].gpio_cd = OMAP3_TORPEDO_MMC_GPIO_CD; omap_mux_init_signal("gpio_127", OMAP_PIN_OUTPUT); } else { /* unsupported board */ printk(KERN_ERR "%s(): unknown machine type\n", __func__); return; } omap2_hsmmc_init(board_mmc_info); /* link regulators to MMC adapters */ omap3logic_vmmc1_supply.dev = board_mmc_info[0].dev; } static struct omap_smsc911x_platform_data __initdata board_smsc911x_data = { .cs = OMAP3LOGIC_SMSC911X_CS, .gpio_irq = -EINVAL, .gpio_reset = -EINVAL, .flags = IORESOURCE_IRQ_LOWLEVEL, }; /* TODO/FIXME (comment by Peter Barada, LogicPD): * Fix the PBIAS voltage for Torpedo MMC1 pins that * are used for other needs (IRQs, etc). */ static void omap3torpedo_fix_pbias_voltage(void) { u16 control_pbias_offset = OMAP343X_CONTROL_PBIAS_LITE; u32 reg; if (machine_is_omap3_torpedo()) { /* Set the bias for the pin */ reg = omap_ctrl_readl(control_pbias_offset); reg &= ~OMAP343X_PBIASLITEPWRDNZ1; omap_ctrl_writel(reg, control_pbias_offset); /* 100ms delay required for PBIAS configuration */ msleep(100); reg |= OMAP343X_PBIASLITEVMODE1; reg |= OMAP343X_PBIASLITEPWRDNZ1; omap_ctrl_writel(reg | 0x300, control_pbias_offset); } } static inline void __init board_smsc911x_init(void) { if (machine_is_omap3530_lv_som()) { /* OMAP3530 LV SOM board */ board_smsc911x_data.gpio_irq = OMAP3530_LV_SOM_SMSC911X_GPIO_IRQ; omap_mux_init_signal("gpio_152", OMAP_PIN_INPUT); } else if (machine_is_omap3_torpedo()) { /* OMAP3 Torpedo board */ board_smsc911x_data.gpio_irq = OMAP3_TORPEDO_SMSC911X_GPIO_IRQ; omap_mux_init_signal("gpio_129", OMAP_PIN_INPUT); } else { /* unsupported board */ printk(KERN_ERR "%s(): unknown machine type\n", __func__); return; } gpmc_smsc911x_init(&board_smsc911x_data); } static void __init omap3logic_init_early(void) { omap2_init_common_infrastructure(); omap2_init_common_devices(NULL, NULL); } #ifdef CONFIG_OMAP_MUX static struct omap_board_mux board_mux[] __initdata = { { .reg_offset = OMAP_MUX_TERMINATOR }, }; #endif static void __init omap3logic_init(void) { omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); omap3torpedo_fix_pbias_voltage(); omap3logic_i2c_init(); omap_serial_init(); board_mmc_init(); board_smsc911x_init(); /* Ensure SDRC pins are mux'd for self-refresh */ omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT); } MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board") .boot_params = 0x80000100, .map_io = omap3_map_io, .init_early = omap3logic_init_early, .init_irq = omap_init_irq, .init_machine = omap3logic_init, .timer = &omap_timer, MACHINE_END MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board") .boot_params = 0x80000100, .map_io = omap3_map_io, .init_early = omap3logic_init_early, .init_irq = omap_init_irq, .init_machine = omap3logic_init, .timer = &omap_timer, MACHINE_END
gpl-2.0
ghdk/os
drivers/staging/comedi/drivers/das08_isa.c
408
5405
/* * das08_isa.c * comedi driver for DAS08 ISA/PC-104 boards * * COMEDI - Linux Control and Measurement Device Interface * Copyright (C) 2000 David A. Schleef <ds@schleef.org> * Copyright (C) 2001,2002,2003 Frank Mori Hess <fmhess@users.sourceforge.net> * Copyright (C) 2004 Salvador E. Tropea <set@users.sf.net> <set@ieee.org> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ /* * Driver: das08_isa * Description: DAS-08 ISA/PC-104 compatible boards * Devices: (Keithley Metrabyte) DAS08 [isa-das08], * (ComputerBoards) DAS08 [isa-das08] * (ComputerBoards) DAS08-PGM [das08-pgm] * (ComputerBoards) DAS08-PGH [das08-pgh] * (ComputerBoards) DAS08-PGL [das08-pgl] * (ComputerBoards) DAS08-AOH [das08-aoh] * (ComputerBoards) DAS08-AOL [das08-aol] * (ComputerBoards) DAS08-AOM [das08-aom] * (ComputerBoards) DAS08/JR-AO [das08/jr-ao] * (ComputerBoards) DAS08/JR-16-AO [das08jr-16-ao] * (ComputerBoards) PC104-DAS08 [pc104-das08] * (ComputerBoards) DAS08/JR/16 [das08jr/16] * Author: Warren Jasper, ds, Frank Hess * Updated: Fri, 31 Aug 2012 19:19:06 +0100 * Status: works * * This is the ISA/PC-104-specific support split off from the das08 driver. * * Configuration Options: * [0] - base io address */ #include <linux/module.h> #include "../comedidev.h" #include "das08.h" static const struct das08_board_struct das08_isa_boards[] = { { /* cio-das08.pdf */ .name = "isa-das08", .ai_nbits = 12, .ai_pg = das08_pg_none, .ai_encoding = das08_encode12, .di_nchan = 3, .do_nchan = 4, .i8255_offset = 8, .i8254_offset = 4, .iosize = 16, /* unchecked */ }, { /* cio-das08pgx.pdf */ .name = "das08-pgm", .ai_nbits = 12, .ai_pg = das08_pgm, .ai_encoding = das08_encode12, .di_nchan = 3, .do_nchan = 4, .i8255_offset = 0, .i8254_offset = 0x04, .iosize = 16, /* unchecked */ }, { /* cio-das08pgx.pdf */ .name = "das08-pgh", .ai_nbits = 12, .ai_pg = das08_pgh, .ai_encoding = das08_encode12, .di_nchan = 3, .do_nchan = 4, .i8254_offset = 0x04, .iosize = 16, /* unchecked */ }, { /* cio-das08pgx.pdf */ .name = "das08-pgl", .ai_nbits = 12, .ai_pg = das08_pgl, .ai_encoding = das08_encode12, .di_nchan = 3, .do_nchan = 4, .i8254_offset = 0x04, .iosize = 16, /* unchecked */ }, { /* cio-das08_aox.pdf */ .name = "das08-aoh", .ai_nbits = 12, .ai_pg = das08_pgh, .ai_encoding = das08_encode12, .ao_nbits = 12, .di_nchan = 3, .do_nchan = 4, .i8255_offset = 0x0c, .i8254_offset = 0x04, .iosize = 16, /* unchecked */ }, { /* cio-das08_aox.pdf */ .name = "das08-aol", .ai_nbits = 12, .ai_pg = das08_pgl, .ai_encoding = das08_encode12, .ao_nbits = 12, .di_nchan = 3, .do_nchan = 4, .i8255_offset = 0x0c, .i8254_offset = 0x04, .iosize = 16, /* unchecked */ }, { /* cio-das08_aox.pdf */ .name = "das08-aom", .ai_nbits = 12, .ai_pg = das08_pgm, .ai_encoding = das08_encode12, .ao_nbits = 12, .di_nchan = 3, .do_nchan = 4, .i8255_offset = 0x0c, .i8254_offset = 0x04, .iosize = 16, /* unchecked */ }, { /* cio-das08-jr-ao.pdf */ .name = "das08/jr-ao", .is_jr = true, .ai_nbits = 12, .ai_pg = das08_pg_none, .ai_encoding = das08_encode12, .ao_nbits = 12, .di_nchan = 8, .do_nchan = 8, .iosize = 16, /* unchecked */ }, { /* cio-das08jr-16-ao.pdf */ .name = "das08jr-16-ao", .is_jr = true, .ai_nbits = 16, .ai_pg = das08_pg_none, .ai_encoding = das08_encode16, .ao_nbits = 16, .di_nchan = 8, .do_nchan = 8, .i8254_offset = 0x04, .iosize = 16, /* unchecked */ }, { .name = "pc104-das08", .ai_nbits = 12, .ai_pg = das08_pg_none, .ai_encoding = das08_encode12, .di_nchan = 3, .do_nchan = 4, .i8254_offset = 4, .iosize = 16, /* unchecked */ }, { .name = "das08jr/16", .is_jr = true, .ai_nbits = 16, .ai_pg = das08_pg_none, .ai_encoding = das08_encode16, .di_nchan = 8, .do_nchan = 8, .iosize = 16, /* unchecked */ }, }; static int das08_isa_attach(struct comedi_device *dev, struct comedi_devconfig *it) { const struct das08_board_struct *thisboard = dev->board_ptr; struct das08_private_struct *devpriv; int ret; devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv)); if (!devpriv) return -ENOMEM; ret = comedi_request_region(dev, it->options[0], thisboard->iosize); if (ret) return ret; return das08_common_attach(dev, dev->iobase); } static struct comedi_driver das08_isa_driver = { .driver_name = "isa-das08", .module = THIS_MODULE, .attach = das08_isa_attach, .detach = comedi_legacy_detach, .board_name = &das08_isa_boards[0].name, .num_names = ARRAY_SIZE(das08_isa_boards), .offset = sizeof(das08_isa_boards[0]), }; module_comedi_driver(das08_isa_driver); MODULE_AUTHOR("Comedi http://www.comedi.org"); MODULE_DESCRIPTION("Comedi low-level driver"); MODULE_LICENSE("GPL");
gpl-2.0
ipaccess/linux-yocto-3.10
arch/mips/mm/uasm.c
1944
12865
/* * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * A small micro-assembler. It is intentionally kept simple, does only * support a subset of instructions, and does not try to hide pipeline * effects like branch delay slots. * * Copyright (C) 2004, 2005, 2006, 2008 Thiemo Seufer * Copyright (C) 2005, 2007 Maciej W. Rozycki * Copyright (C) 2006 Ralf Baechle (ralf@linux-mips.org) * Copyright (C) 2012, 2013 MIPS Technologies, Inc. All rights reserved. */ enum fields { RS = 0x001, RT = 0x002, RD = 0x004, RE = 0x008, SIMM = 0x010, UIMM = 0x020, BIMM = 0x040, JIMM = 0x080, FUNC = 0x100, SET = 0x200, SCIMM = 0x400 }; #define OP_MASK 0x3f #define OP_SH 26 #define RD_MASK 0x1f #define RD_SH 11 #define RE_MASK 0x1f #define RE_SH 6 #define IMM_MASK 0xffff #define IMM_SH 0 #define JIMM_MASK 0x3ffffff #define JIMM_SH 0 #define FUNC_MASK 0x3f #define FUNC_SH 0 #define SET_MASK 0x7 #define SET_SH 0 enum opcode { insn_invalid, insn_addiu, insn_addu, insn_and, insn_andi, insn_bbit0, insn_bbit1, insn_beq, insn_beql, insn_bgez, insn_bgezl, insn_bltz, insn_bltzl, insn_bne, insn_cache, insn_daddiu, insn_daddu, insn_dins, insn_dinsm, insn_dmfc0, insn_dmtc0, insn_drotr, insn_drotr32, insn_dsll, insn_dsll32, insn_dsra, insn_dsrl, insn_dsrl32, insn_dsubu, insn_eret, insn_ext, insn_ins, insn_j, insn_jal, insn_jr, insn_ld, insn_ldx, insn_ll, insn_lld, insn_lui, insn_lw, insn_lwx, insn_mfc0, insn_mtc0, insn_or, insn_ori, insn_pref, insn_rfe, insn_rotr, insn_sc, insn_scd, insn_sd, insn_sll, insn_sra, insn_srl, insn_subu, insn_sw, insn_syscall, insn_tlbp, insn_tlbr, insn_tlbwi, insn_tlbwr, insn_xor, insn_xori, }; struct insn { enum opcode opcode; u32 match; enum fields fields; }; static inline __uasminit u32 build_rs(u32 arg) { WARN(arg & ~RS_MASK, KERN_WARNING "Micro-assembler field overflow\n"); return (arg & RS_MASK) << RS_SH; } static inline __uasminit u32 build_rt(u32 arg) { WARN(arg & ~RT_MASK, KERN_WARNING "Micro-assembler field overflow\n"); return (arg & RT_MASK) << RT_SH; } static inline __uasminit u32 build_rd(u32 arg) { WARN(arg & ~RD_MASK, KERN_WARNING "Micro-assembler field overflow\n"); return (arg & RD_MASK) << RD_SH; } static inline __uasminit u32 build_re(u32 arg) { WARN(arg & ~RE_MASK, KERN_WARNING "Micro-assembler field overflow\n"); return (arg & RE_MASK) << RE_SH; } static inline __uasminit u32 build_simm(s32 arg) { WARN(arg > 0x7fff || arg < -0x8000, KERN_WARNING "Micro-assembler field overflow\n"); return arg & 0xffff; } static inline __uasminit u32 build_uimm(u32 arg) { WARN(arg & ~IMM_MASK, KERN_WARNING "Micro-assembler field overflow\n"); return arg & IMM_MASK; } static inline __uasminit u32 build_scimm(u32 arg) { WARN(arg & ~SCIMM_MASK, KERN_WARNING "Micro-assembler field overflow\n"); return (arg & SCIMM_MASK) << SCIMM_SH; } static inline __uasminit u32 build_func(u32 arg) { WARN(arg & ~FUNC_MASK, KERN_WARNING "Micro-assembler field overflow\n"); return arg & FUNC_MASK; } static inline __uasminit u32 build_set(u32 arg) { WARN(arg & ~SET_MASK, KERN_WARNING "Micro-assembler field overflow\n"); return arg & SET_MASK; } static void __uasminit build_insn(u32 **buf, enum opcode opc, ...); #define I_u1u2u3(op) \ Ip_u1u2u3(op) \ { \ build_insn(buf, insn##op, a, b, c); \ } \ UASM_EXPORT_SYMBOL(uasm_i##op); #define I_u2u1u3(op) \ Ip_u2u1u3(op) \ { \ build_insn(buf, insn##op, b, a, c); \ } \ UASM_EXPORT_SYMBOL(uasm_i##op); #define I_u3u1u2(op) \ Ip_u3u1u2(op) \ { \ build_insn(buf, insn##op, b, c, a); \ } \ UASM_EXPORT_SYMBOL(uasm_i##op); #define I_u1u2s3(op) \ Ip_u1u2s3(op) \ { \ build_insn(buf, insn##op, a, b, c); \ } \ UASM_EXPORT_SYMBOL(uasm_i##op); #define I_u2s3u1(op) \ Ip_u2s3u1(op) \ { \ build_insn(buf, insn##op, c, a, b); \ } \ UASM_EXPORT_SYMBOL(uasm_i##op); #define I_u2u1s3(op) \ Ip_u2u1s3(op) \ { \ build_insn(buf, insn##op, b, a, c); \ } \ UASM_EXPORT_SYMBOL(uasm_i##op); #define I_u2u1msbu3(op) \ Ip_u2u1msbu3(op) \ { \ build_insn(buf, insn##op, b, a, c+d-1, c); \ } \ UASM_EXPORT_SYMBOL(uasm_i##op); #define I_u2u1msb32u3(op) \ Ip_u2u1msbu3(op) \ { \ build_insn(buf, insn##op, b, a, c+d-33, c); \ } \ UASM_EXPORT_SYMBOL(uasm_i##op); #define I_u2u1msbdu3(op) \ Ip_u2u1msbu3(op) \ { \ build_insn(buf, insn##op, b, a, d-1, c); \ } \ UASM_EXPORT_SYMBOL(uasm_i##op); #define I_u1u2(op) \ Ip_u1u2(op) \ { \ build_insn(buf, insn##op, a, b); \ } \ UASM_EXPORT_SYMBOL(uasm_i##op); #define I_u1s2(op) \ Ip_u1s2(op) \ { \ build_insn(buf, insn##op, a, b); \ } \ UASM_EXPORT_SYMBOL(uasm_i##op); #define I_u1(op) \ Ip_u1(op) \ { \ build_insn(buf, insn##op, a); \ } \ UASM_EXPORT_SYMBOL(uasm_i##op); #define I_0(op) \ Ip_0(op) \ { \ build_insn(buf, insn##op); \ } \ UASM_EXPORT_SYMBOL(uasm_i##op); I_u2u1s3(_addiu) I_u3u1u2(_addu) I_u2u1u3(_andi) I_u3u1u2(_and) I_u1u2s3(_beq) I_u1u2s3(_beql) I_u1s2(_bgez) I_u1s2(_bgezl) I_u1s2(_bltz) I_u1s2(_bltzl) I_u1u2s3(_bne) I_u2s3u1(_cache) I_u1u2u3(_dmfc0) I_u1u2u3(_dmtc0) I_u2u1s3(_daddiu) I_u3u1u2(_daddu) I_u2u1u3(_dsll) I_u2u1u3(_dsll32) I_u2u1u3(_dsra) I_u2u1u3(_dsrl) I_u2u1u3(_dsrl32) I_u2u1u3(_drotr) I_u2u1u3(_drotr32) I_u3u1u2(_dsubu) I_0(_eret) I_u2u1msbdu3(_ext) I_u2u1msbu3(_ins) I_u1(_j) I_u1(_jal) I_u1(_jr) I_u2s3u1(_ld) I_u2s3u1(_ll) I_u2s3u1(_lld) I_u1s2(_lui) I_u2s3u1(_lw) I_u1u2u3(_mfc0) I_u1u2u3(_mtc0) I_u2u1u3(_ori) I_u3u1u2(_or) I_0(_rfe) I_u2s3u1(_sc) I_u2s3u1(_scd) I_u2s3u1(_sd) I_u2u1u3(_sll) I_u2u1u3(_sra) I_u2u1u3(_srl) I_u2u1u3(_rotr) I_u3u1u2(_subu) I_u2s3u1(_sw) I_0(_tlbp) I_0(_tlbr) I_0(_tlbwi) I_0(_tlbwr) I_u3u1u2(_xor) I_u2u1u3(_xori) I_u2u1msbu3(_dins); I_u2u1msb32u3(_dinsm); I_u1(_syscall); I_u1u2s3(_bbit0); I_u1u2s3(_bbit1); I_u3u1u2(_lwx) I_u3u1u2(_ldx) #ifdef CONFIG_CPU_CAVIUM_OCTEON #include <asm/octeon/octeon.h> void __uasminit ISAFUNC(uasm_i_pref)(u32 **buf, unsigned int a, signed int b, unsigned int c) { if (OCTEON_IS_MODEL(OCTEON_CN63XX_PASS1_X) && a <= 24 && a != 5) /* * As per erratum Core-14449, replace prefetches 0-4, * 6-24 with 'pref 28'. */ build_insn(buf, insn_pref, c, 28, b); else build_insn(buf, insn_pref, c, a, b); } UASM_EXPORT_SYMBOL(ISAFUNC(uasm_i_pref)); #else I_u2s3u1(_pref) #endif /* Handle labels. */ void __uasminit ISAFUNC(uasm_build_label)(struct uasm_label **lab, u32 *addr, int lid) { (*lab)->addr = addr; (*lab)->lab = lid; (*lab)++; } UASM_EXPORT_SYMBOL(ISAFUNC(uasm_build_label)); int __uasminit ISAFUNC(uasm_in_compat_space_p)(long addr) { /* Is this address in 32bit compat space? */ #ifdef CONFIG_64BIT return (((addr) & 0xffffffff00000000L) == 0xffffffff00000000L); #else return 1; #endif } UASM_EXPORT_SYMBOL(ISAFUNC(uasm_in_compat_space_p)); static int __uasminit uasm_rel_highest(long val) { #ifdef CONFIG_64BIT return ((((val + 0x800080008000L) >> 48) & 0xffff) ^ 0x8000) - 0x8000; #else return 0; #endif } static int __uasminit uasm_rel_higher(long val) { #ifdef CONFIG_64BIT return ((((val + 0x80008000L) >> 32) & 0xffff) ^ 0x8000) - 0x8000; #else return 0; #endif } int __uasminit ISAFUNC(uasm_rel_hi)(long val) { return ((((val + 0x8000L) >> 16) & 0xffff) ^ 0x8000) - 0x8000; } UASM_EXPORT_SYMBOL(ISAFUNC(uasm_rel_hi)); int __uasminit ISAFUNC(uasm_rel_lo)(long val) { return ((val & 0xffff) ^ 0x8000) - 0x8000; } UASM_EXPORT_SYMBOL(ISAFUNC(uasm_rel_lo)); void __uasminit ISAFUNC(UASM_i_LA_mostly)(u32 **buf, unsigned int rs, long addr) { if (!ISAFUNC(uasm_in_compat_space_p)(addr)) { ISAFUNC(uasm_i_lui)(buf, rs, uasm_rel_highest(addr)); if (uasm_rel_higher(addr)) ISAFUNC(uasm_i_daddiu)(buf, rs, rs, uasm_rel_higher(addr)); if (ISAFUNC(uasm_rel_hi(addr))) { ISAFUNC(uasm_i_dsll)(buf, rs, rs, 16); ISAFUNC(uasm_i_daddiu)(buf, rs, rs, ISAFUNC(uasm_rel_hi)(addr)); ISAFUNC(uasm_i_dsll)(buf, rs, rs, 16); } else ISAFUNC(uasm_i_dsll32)(buf, rs, rs, 0); } else ISAFUNC(uasm_i_lui)(buf, rs, ISAFUNC(uasm_rel_hi(addr))); } UASM_EXPORT_SYMBOL(ISAFUNC(UASM_i_LA_mostly)); void __uasminit ISAFUNC(UASM_i_LA)(u32 **buf, unsigned int rs, long addr) { ISAFUNC(UASM_i_LA_mostly)(buf, rs, addr); if (ISAFUNC(uasm_rel_lo(addr))) { if (!ISAFUNC(uasm_in_compat_space_p)(addr)) ISAFUNC(uasm_i_daddiu)(buf, rs, rs, ISAFUNC(uasm_rel_lo(addr))); else ISAFUNC(uasm_i_addiu)(buf, rs, rs, ISAFUNC(uasm_rel_lo(addr))); } } UASM_EXPORT_SYMBOL(ISAFUNC(UASM_i_LA)); /* Handle relocations. */ void __uasminit ISAFUNC(uasm_r_mips_pc16)(struct uasm_reloc **rel, u32 *addr, int lid) { (*rel)->addr = addr; (*rel)->type = R_MIPS_PC16; (*rel)->lab = lid; (*rel)++; } UASM_EXPORT_SYMBOL(ISAFUNC(uasm_r_mips_pc16)); static inline void __uasminit __resolve_relocs(struct uasm_reloc *rel, struct uasm_label *lab); void __uasminit ISAFUNC(uasm_resolve_relocs)(struct uasm_reloc *rel, struct uasm_label *lab) { struct uasm_label *l; for (; rel->lab != UASM_LABEL_INVALID; rel++) for (l = lab; l->lab != UASM_LABEL_INVALID; l++) if (rel->lab == l->lab) __resolve_relocs(rel, l); } UASM_EXPORT_SYMBOL(ISAFUNC(uasm_resolve_relocs)); void __uasminit ISAFUNC(uasm_move_relocs)(struct uasm_reloc *rel, u32 *first, u32 *end, long off) { for (; rel->lab != UASM_LABEL_INVALID; rel++) if (rel->addr >= first && rel->addr < end) rel->addr += off; } UASM_EXPORT_SYMBOL(ISAFUNC(uasm_move_relocs)); void __uasminit ISAFUNC(uasm_move_labels)(struct uasm_label *lab, u32 *first, u32 *end, long off) { for (; lab->lab != UASM_LABEL_INVALID; lab++) if (lab->addr >= first && lab->addr < end) lab->addr += off; } UASM_EXPORT_SYMBOL(ISAFUNC(uasm_move_labels)); void __uasminit ISAFUNC(uasm_copy_handler)(struct uasm_reloc *rel, struct uasm_label *lab, u32 *first, u32 *end, u32 *target) { long off = (long)(target - first); memcpy(target, first, (end - first) * sizeof(u32)); ISAFUNC(uasm_move_relocs(rel, first, end, off)); ISAFUNC(uasm_move_labels(lab, first, end, off)); } UASM_EXPORT_SYMBOL(ISAFUNC(uasm_copy_handler)); int __uasminit ISAFUNC(uasm_insn_has_bdelay)(struct uasm_reloc *rel, u32 *addr) { for (; rel->lab != UASM_LABEL_INVALID; rel++) { if (rel->addr == addr && (rel->type == R_MIPS_PC16 || rel->type == R_MIPS_26)) return 1; } return 0; } UASM_EXPORT_SYMBOL(ISAFUNC(uasm_insn_has_bdelay)); /* Convenience functions for labeled branches. */ void __uasminit ISAFUNC(uasm_il_bltz)(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid) { uasm_r_mips_pc16(r, *p, lid); ISAFUNC(uasm_i_bltz)(p, reg, 0); } UASM_EXPORT_SYMBOL(ISAFUNC(uasm_il_bltz)); void __uasminit ISAFUNC(uasm_il_b)(u32 **p, struct uasm_reloc **r, int lid) { uasm_r_mips_pc16(r, *p, lid); ISAFUNC(uasm_i_b)(p, 0); } UASM_EXPORT_SYMBOL(ISAFUNC(uasm_il_b)); void __uasminit ISAFUNC(uasm_il_beqz)(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid) { uasm_r_mips_pc16(r, *p, lid); ISAFUNC(uasm_i_beqz)(p, reg, 0); } UASM_EXPORT_SYMBOL(ISAFUNC(uasm_il_beqz)); void __uasminit ISAFUNC(uasm_il_beqzl)(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid) { uasm_r_mips_pc16(r, *p, lid); ISAFUNC(uasm_i_beqzl)(p, reg, 0); } UASM_EXPORT_SYMBOL(ISAFUNC(uasm_il_beqzl)); void __uasminit ISAFUNC(uasm_il_bne)(u32 **p, struct uasm_reloc **r, unsigned int reg1, unsigned int reg2, int lid) { uasm_r_mips_pc16(r, *p, lid); ISAFUNC(uasm_i_bne)(p, reg1, reg2, 0); } UASM_EXPORT_SYMBOL(ISAFUNC(uasm_il_bne)); void __uasminit ISAFUNC(uasm_il_bnez)(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid) { uasm_r_mips_pc16(r, *p, lid); ISAFUNC(uasm_i_bnez)(p, reg, 0); } UASM_EXPORT_SYMBOL(ISAFUNC(uasm_il_bnez)); void __uasminit ISAFUNC(uasm_il_bgezl)(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid) { uasm_r_mips_pc16(r, *p, lid); ISAFUNC(uasm_i_bgezl)(p, reg, 0); } UASM_EXPORT_SYMBOL(ISAFUNC(uasm_il_bgezl)); void __uasminit ISAFUNC(uasm_il_bgez)(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid) { uasm_r_mips_pc16(r, *p, lid); ISAFUNC(uasm_i_bgez)(p, reg, 0); } UASM_EXPORT_SYMBOL(ISAFUNC(uasm_il_bgez)); void __uasminit ISAFUNC(uasm_il_bbit0)(u32 **p, struct uasm_reloc **r, unsigned int reg, unsigned int bit, int lid) { uasm_r_mips_pc16(r, *p, lid); ISAFUNC(uasm_i_bbit0)(p, reg, bit, 0); } UASM_EXPORT_SYMBOL(ISAFUNC(uasm_il_bbit0)); void __uasminit ISAFUNC(uasm_il_bbit1)(u32 **p, struct uasm_reloc **r, unsigned int reg, unsigned int bit, int lid) { uasm_r_mips_pc16(r, *p, lid); ISAFUNC(uasm_i_bbit1)(p, reg, bit, 0); } UASM_EXPORT_SYMBOL(ISAFUNC(uasm_il_bbit1));
gpl-2.0
96boards/linux
arch/blackfin/mach-bf533/boards/ip0x.c
1944
6930
/* * Copyright 2004-2009 Analog Devices Inc. * 2007 David Rowe * 2006 Intratrade Ltd. * Ivan Danov <idanov@gmail.com> * 2005 National ICT Australia (NICTA) * Aidan Williams <aidan@nicta.com.au> * * Licensed under the GPL-2 or later. */ #include <linux/device.h> #include <linux/platform_device.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> #include <linux/spi/spi.h> #include <linux/spi/flash.h> #if IS_ENABLED(CONFIG_USB_ISP1362_HCD) #include <linux/usb/isp1362.h> #endif #include <asm/irq.h> #include <asm/dma.h> #include <asm/bfin5xx_spi.h> #include <asm/portmux.h> /* * Name the Board for the /proc/cpuinfo */ const char bfin_board_name[] = "IP04/IP08"; /* * Driver needs to know address, irq and flag pin. */ #if defined(CONFIG_BFIN532_IP0X) #if IS_ENABLED(CONFIG_DM9000) #include <linux/dm9000.h> static struct resource dm9000_resource1[] = { { .start = 0x20100000, .end = 0x20100000 + 1, .flags = IORESOURCE_MEM },{ .start = 0x20100000 + 2, .end = 0x20100000 + 3, .flags = IORESOURCE_MEM },{ .start = IRQ_PF15, .end = IRQ_PF15, .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE } }; static struct resource dm9000_resource2[] = { { .start = 0x20200000, .end = 0x20200000 + 1, .flags = IORESOURCE_MEM },{ .start = 0x20200000 + 2, .end = 0x20200000 + 3, .flags = IORESOURCE_MEM },{ .start = IRQ_PF14, .end = IRQ_PF14, .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE } }; /* * for the moment we limit ourselves to 16bit IO until some * better IO routines can be written and tested */ static struct dm9000_plat_data dm9000_platdata1 = { .flags = DM9000_PLATF_16BITONLY, }; static struct platform_device dm9000_device1 = { .name = "dm9000", .id = 0, .num_resources = ARRAY_SIZE(dm9000_resource1), .resource = dm9000_resource1, .dev = { .platform_data = &dm9000_platdata1, } }; static struct dm9000_plat_data dm9000_platdata2 = { .flags = DM9000_PLATF_16BITONLY, }; static struct platform_device dm9000_device2 = { .name = "dm9000", .id = 1, .num_resources = ARRAY_SIZE(dm9000_resource2), .resource = dm9000_resource2, .dev = { .platform_data = &dm9000_platdata2, } }; #endif #endif #if IS_ENABLED(CONFIG_SPI_BFIN5XX) /* all SPI peripherals info goes here */ #if IS_ENABLED(CONFIG_MMC_SPI) static struct bfin5xx_spi_chip mmc_spi_chip_info = { .enable_dma = 0, /* if 1 - block!!! */ }; #endif /* Notice: for blackfin, the speed_hz is the value of register * SPI_BAUD, not the real baudrate */ static struct spi_board_info bfin_spi_board_info[] __initdata = { #if IS_ENABLED(CONFIG_MMC_SPI) { .modalias = "mmc_spi", .max_speed_hz = 2, .bus_num = 1, .chip_select = 5, .controller_data = &mmc_spi_chip_info, }, #endif }; /* SPI controller data */ static struct bfin5xx_spi_master spi_bfin_master_info = { .num_chipselect = 8, .enable_dma = 1, /* master has the ability to do dma transfer */ }; static struct platform_device spi_bfin_master_device = { .name = "bfin-spi-master", .id = 1, /* Bus number */ .dev = { .platform_data = &spi_bfin_master_info, /* Passed to driver */ }, }; #endif /* spi master and devices */ #if IS_ENABLED(CONFIG_SERIAL_BFIN) #ifdef CONFIG_SERIAL_BFIN_UART0 static struct resource bfin_uart0_resources[] = { { .start = BFIN_UART_THR, .end = BFIN_UART_GCTL+2, .flags = IORESOURCE_MEM, }, { .start = IRQ_UART0_TX, .end = IRQ_UART0_TX, .flags = IORESOURCE_IRQ, }, { .start = IRQ_UART0_RX, .end = IRQ_UART0_RX, .flags = IORESOURCE_IRQ, }, { .start = IRQ_UART0_ERROR, .end = IRQ_UART0_ERROR, .flags = IORESOURCE_IRQ, }, { .start = CH_UART0_TX, .end = CH_UART0_TX, .flags = IORESOURCE_DMA, }, { .start = CH_UART0_RX, .end = CH_UART0_RX, .flags = IORESOURCE_DMA, }, }; static unsigned short bfin_uart0_peripherals[] = { P_UART0_TX, P_UART0_RX, 0 }; static struct platform_device bfin_uart0_device = { .name = "bfin-uart", .id = 0, .num_resources = ARRAY_SIZE(bfin_uart0_resources), .resource = bfin_uart0_resources, .dev = { .platform_data = &bfin_uart0_peripherals, /* Passed to driver */ }, }; #endif #endif #if IS_ENABLED(CONFIG_BFIN_SIR) #ifdef CONFIG_BFIN_SIR0 static struct resource bfin_sir0_resources[] = { { .start = 0xFFC00400, .end = 0xFFC004FF, .flags = IORESOURCE_MEM, }, { .start = IRQ_UART0_RX, .end = IRQ_UART0_RX+1, .flags = IORESOURCE_IRQ, }, { .start = CH_UART0_RX, .end = CH_UART0_RX+1, .flags = IORESOURCE_DMA, }, }; static struct platform_device bfin_sir0_device = { .name = "bfin_sir", .id = 0, .num_resources = ARRAY_SIZE(bfin_sir0_resources), .resource = bfin_sir0_resources, }; #endif #endif #if IS_ENABLED(CONFIG_USB_ISP1362_HCD) static struct resource isp1362_hcd_resources[] = { { .start = 0x20300000, .end = 0x20300000 + 1, .flags = IORESOURCE_MEM, },{ .start = 0x20300000 + 2, .end = 0x20300000 + 3, .flags = IORESOURCE_MEM, },{ .start = IRQ_PF11, .end = IRQ_PF11, .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, }, }; static struct isp1362_platform_data isp1362_priv = { .sel15Kres = 1, .clknotstop = 0, .oc_enable = 0, /* external OC */ .int_act_high = 0, .int_edge_triggered = 0, .remote_wakeup_connected = 0, .no_power_switching = 1, .power_switching_mode = 0, }; static struct platform_device isp1362_hcd_device = { .name = "isp1362-hcd", .id = 0, .dev = { .platform_data = &isp1362_priv, }, .num_resources = ARRAY_SIZE(isp1362_hcd_resources), .resource = isp1362_hcd_resources, }; #endif static struct platform_device *ip0x_devices[] __initdata = { #if defined(CONFIG_BFIN532_IP0X) #if IS_ENABLED(CONFIG_DM9000) &dm9000_device1, &dm9000_device2, #endif #endif #if IS_ENABLED(CONFIG_SPI_BFIN5XX) &spi_bfin_master_device, #endif #if IS_ENABLED(CONFIG_SERIAL_BFIN) #ifdef CONFIG_SERIAL_BFIN_UART0 &bfin_uart0_device, #endif #endif #if IS_ENABLED(CONFIG_BFIN_SIR) #ifdef CONFIG_BFIN_SIR0 &bfin_sir0_device, #endif #endif #if IS_ENABLED(CONFIG_USB_ISP1362_HCD) &isp1362_hcd_device, #endif }; static int __init ip0x_init(void) { printk(KERN_INFO "%s(): registering device resources\n", __func__); platform_add_devices(ip0x_devices, ARRAY_SIZE(ip0x_devices)); spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); return 0; } arch_initcall(ip0x_init); static struct platform_device *ip0x_early_devices[] __initdata = { #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK) #ifdef CONFIG_SERIAL_BFIN_UART0 &bfin_uart0_device, #endif #endif }; void __init native_machine_early_platform_add_devices(void) { printk(KERN_INFO "register early platform devices\n"); early_platform_add_devices(ip0x_early_devices, ARRAY_SIZE(ip0x_early_devices)); }
gpl-2.0
getitnowmarketing/Incredible-2.6.35-gb-mr
arch/parisc/math-emu/dfsub.c
1944
15897
/* * Linux/PA-RISC Project (http://www.parisc-linux.org/) * * Floating-point emulation code * Copyright (C) 2001 Hewlett-Packard (Paul Bame) <bame@debian.org> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2, or (at your option) * any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ /* * BEGIN_DESC * * File: * @(#) pa/spmath/dfsub.c $Revision: 1.1 $ * * Purpose: * Double_subtract: subtract two double precision values. * * External Interfaces: * dbl_fsub(leftptr, rightptr, dstptr, status) * * Internal Interfaces: * * Theory: * <<please update with a overview of the operation of this file>> * * END_DESC */ #include "float.h" #include "dbl_float.h" /* * Double_subtract: subtract two double precision values. */ int dbl_fsub( dbl_floating_point *leftptr, dbl_floating_point *rightptr, dbl_floating_point *dstptr, unsigned int *status) { register unsigned int signless_upper_left, signless_upper_right, save; register unsigned int leftp1, leftp2, rightp1, rightp2, extent; register unsigned int resultp1 = 0, resultp2 = 0; register int result_exponent, right_exponent, diff_exponent; register int sign_save, jumpsize; register boolean inexact = FALSE, underflowtrap; /* Create local copies of the numbers */ Dbl_copyfromptr(leftptr,leftp1,leftp2); Dbl_copyfromptr(rightptr,rightp1,rightp2); /* A zero "save" helps discover equal operands (for later), * * and is used in swapping operands (if needed). */ Dbl_xortointp1(leftp1,rightp1,/*to*/save); /* * check first operand for NaN's or infinity */ if ((result_exponent = Dbl_exponent(leftp1)) == DBL_INFINITY_EXPONENT) { if (Dbl_iszero_mantissa(leftp1,leftp2)) { if (Dbl_isnotnan(rightp1,rightp2)) { if (Dbl_isinfinity(rightp1,rightp2) && save==0) { /* * invalid since operands are same signed infinity's */ if (Is_invalidtrap_enabled()) return(INVALIDEXCEPTION); Set_invalidflag(); Dbl_makequietnan(resultp1,resultp2); Dbl_copytoptr(resultp1,resultp2,dstptr); return(NOEXCEPTION); } /* * return infinity */ Dbl_copytoptr(leftp1,leftp2,dstptr); return(NOEXCEPTION); } } else { /* * is NaN; signaling or quiet? */ if (Dbl_isone_signaling(leftp1)) { /* trap if INVALIDTRAP enabled */ if (Is_invalidtrap_enabled()) return(INVALIDEXCEPTION); /* make NaN quiet */ Set_invalidflag(); Dbl_set_quiet(leftp1); } /* * is second operand a signaling NaN? */ else if (Dbl_is_signalingnan(rightp1)) { /* trap if INVALIDTRAP enabled */ if (Is_invalidtrap_enabled()) return(INVALIDEXCEPTION); /* make NaN quiet */ Set_invalidflag(); Dbl_set_quiet(rightp1); Dbl_copytoptr(rightp1,rightp2,dstptr); return(NOEXCEPTION); } /* * return quiet NaN */ Dbl_copytoptr(leftp1,leftp2,dstptr); return(NOEXCEPTION); } } /* End left NaN or Infinity processing */ /* * check second operand for NaN's or infinity */ if (Dbl_isinfinity_exponent(rightp1)) { if (Dbl_iszero_mantissa(rightp1,rightp2)) { /* return infinity */ Dbl_invert_sign(rightp1); Dbl_copytoptr(rightp1,rightp2,dstptr); return(NOEXCEPTION); } /* * is NaN; signaling or quiet? */ if (Dbl_isone_signaling(rightp1)) { /* trap if INVALIDTRAP enabled */ if (Is_invalidtrap_enabled()) return(INVALIDEXCEPTION); /* make NaN quiet */ Set_invalidflag(); Dbl_set_quiet(rightp1); } /* * return quiet NaN */ Dbl_copytoptr(rightp1,rightp2,dstptr); return(NOEXCEPTION); } /* End right NaN or Infinity processing */ /* Invariant: Must be dealing with finite numbers */ /* Compare operands by removing the sign */ Dbl_copytoint_exponentmantissap1(leftp1,signless_upper_left); Dbl_copytoint_exponentmantissap1(rightp1,signless_upper_right); /* sign difference selects add or sub operation. */ if(Dbl_ismagnitudeless(leftp2,rightp2,signless_upper_left,signless_upper_right)) { /* Set the left operand to the larger one by XOR swap * * First finish the first word using "save" */ Dbl_xorfromintp1(save,rightp1,/*to*/rightp1); Dbl_xorfromintp1(save,leftp1,/*to*/leftp1); Dbl_swap_lower(leftp2,rightp2); result_exponent = Dbl_exponent(leftp1); Dbl_invert_sign(leftp1); } /* Invariant: left is not smaller than right. */ if((right_exponent = Dbl_exponent(rightp1)) == 0) { /* Denormalized operands. First look for zeroes */ if(Dbl_iszero_mantissa(rightp1,rightp2)) { /* right is zero */ if(Dbl_iszero_exponentmantissa(leftp1,leftp2)) { /* Both operands are zeros */ Dbl_invert_sign(rightp1); if(Is_rounding_mode(ROUNDMINUS)) { Dbl_or_signs(leftp1,/*with*/rightp1); } else { Dbl_and_signs(leftp1,/*with*/rightp1); } } else { /* Left is not a zero and must be the result. Trapped * underflows are signaled if left is denormalized. Result * is always exact. */ if( (result_exponent == 0) && Is_underflowtrap_enabled() ) { /* need to normalize results mantissa */ sign_save = Dbl_signextendedsign(leftp1); Dbl_leftshiftby1(leftp1,leftp2); Dbl_normalize(leftp1,leftp2,result_exponent); Dbl_set_sign(leftp1,/*using*/sign_save); Dbl_setwrapped_exponent(leftp1,result_exponent,unfl); Dbl_copytoptr(leftp1,leftp2,dstptr); /* inexact = FALSE */ return(UNDERFLOWEXCEPTION); } } Dbl_copytoptr(leftp1,leftp2,dstptr); return(NOEXCEPTION); } /* Neither are zeroes */ Dbl_clear_sign(rightp1); /* Exponent is already cleared */ if(result_exponent == 0 ) { /* Both operands are denormalized. The result must be exact * and is simply calculated. A sum could become normalized and a * difference could cancel to a true zero. */ if( (/*signed*/int) save >= 0 ) { Dbl_subtract(leftp1,leftp2,/*minus*/rightp1,rightp2, /*into*/resultp1,resultp2); if(Dbl_iszero_mantissa(resultp1,resultp2)) { if(Is_rounding_mode(ROUNDMINUS)) { Dbl_setone_sign(resultp1); } else { Dbl_setzero_sign(resultp1); } Dbl_copytoptr(resultp1,resultp2,dstptr); return(NOEXCEPTION); } } else { Dbl_addition(leftp1,leftp2,rightp1,rightp2, /*into*/resultp1,resultp2); if(Dbl_isone_hidden(resultp1)) { Dbl_copytoptr(resultp1,resultp2,dstptr); return(NOEXCEPTION); } } if(Is_underflowtrap_enabled()) { /* need to normalize result */ sign_save = Dbl_signextendedsign(resultp1); Dbl_leftshiftby1(resultp1,resultp2); Dbl_normalize(resultp1,resultp2,result_exponent); Dbl_set_sign(resultp1,/*using*/sign_save); Dbl_setwrapped_exponent(resultp1,result_exponent,unfl); Dbl_copytoptr(resultp1,resultp2,dstptr); /* inexact = FALSE */ return(UNDERFLOWEXCEPTION); } Dbl_copytoptr(resultp1,resultp2,dstptr); return(NOEXCEPTION); } right_exponent = 1; /* Set exponent to reflect different bias * with denomalized numbers. */ } else { Dbl_clear_signexponent_set_hidden(rightp1); } Dbl_clear_exponent_set_hidden(leftp1); diff_exponent = result_exponent - right_exponent; /* * Special case alignment of operands that would force alignment * beyond the extent of the extension. A further optimization * could special case this but only reduces the path length for this * infrequent case. */ if(diff_exponent > DBL_THRESHOLD) { diff_exponent = DBL_THRESHOLD; } /* Align right operand by shifting to right */ Dbl_right_align(/*operand*/rightp1,rightp2,/*shifted by*/diff_exponent, /*and lower to*/extent); /* Treat sum and difference of the operands separately. */ if( (/*signed*/int) save >= 0 ) { /* * Difference of the two operands. Their can be no overflow. A * borrow can occur out of the hidden bit and force a post * normalization phase. */ Dbl_subtract_withextension(leftp1,leftp2,/*minus*/rightp1,rightp2, /*with*/extent,/*into*/resultp1,resultp2); if(Dbl_iszero_hidden(resultp1)) { /* Handle normalization */ /* A straight foward algorithm would now shift the result * and extension left until the hidden bit becomes one. Not * all of the extension bits need participate in the shift. * Only the two most significant bits (round and guard) are * needed. If only a single shift is needed then the guard * bit becomes a significant low order bit and the extension * must participate in the rounding. If more than a single * shift is needed, then all bits to the right of the guard * bit are zeros, and the guard bit may or may not be zero. */ sign_save = Dbl_signextendedsign(resultp1); Dbl_leftshiftby1_withextent(resultp1,resultp2,extent,resultp1,resultp2); /* Need to check for a zero result. The sign and exponent * fields have already been zeroed. The more efficient test * of the full object can be used. */ if(Dbl_iszero(resultp1,resultp2)) /* Must have been "x-x" or "x+(-x)". */ { if(Is_rounding_mode(ROUNDMINUS)) Dbl_setone_sign(resultp1); Dbl_copytoptr(resultp1,resultp2,dstptr); return(NOEXCEPTION); } result_exponent--; /* Look to see if normalization is finished. */ if(Dbl_isone_hidden(resultp1)) { if(result_exponent==0) { /* Denormalized, exponent should be zero. Left operand * * was normalized, so extent (guard, round) was zero */ goto underflow; } else { /* No further normalization is needed. */ Dbl_set_sign(resultp1,/*using*/sign_save); Ext_leftshiftby1(extent); goto round; } } /* Check for denormalized, exponent should be zero. Left * * operand was normalized, so extent (guard, round) was zero */ if(!(underflowtrap = Is_underflowtrap_enabled()) && result_exponent==0) goto underflow; /* Shift extension to complete one bit of normalization and * update exponent. */ Ext_leftshiftby1(extent); /* Discover first one bit to determine shift amount. Use a * modified binary search. We have already shifted the result * one position right and still not found a one so the remainder * of the extension must be zero and simplifies rounding. */ /* Scan bytes */ while(Dbl_iszero_hiddenhigh7mantissa(resultp1)) { Dbl_leftshiftby8(resultp1,resultp2); if((result_exponent -= 8) <= 0 && !underflowtrap) goto underflow; } /* Now narrow it down to the nibble */ if(Dbl_iszero_hiddenhigh3mantissa(resultp1)) { /* The lower nibble contains the normalizing one */ Dbl_leftshiftby4(resultp1,resultp2); if((result_exponent -= 4) <= 0 && !underflowtrap) goto underflow; } /* Select case were first bit is set (already normalized) * otherwise select the proper shift. */ if((jumpsize = Dbl_hiddenhigh3mantissa(resultp1)) > 7) { /* Already normalized */ if(result_exponent <= 0) goto underflow; Dbl_set_sign(resultp1,/*using*/sign_save); Dbl_set_exponent(resultp1,/*using*/result_exponent); Dbl_copytoptr(resultp1,resultp2,dstptr); return(NOEXCEPTION); } Dbl_sethigh4bits(resultp1,/*using*/sign_save); switch(jumpsize) { case 1: { Dbl_leftshiftby3(resultp1,resultp2); result_exponent -= 3; break; } case 2: case 3: { Dbl_leftshiftby2(resultp1,resultp2); result_exponent -= 2; break; } case 4: case 5: case 6: case 7: { Dbl_leftshiftby1(resultp1,resultp2); result_exponent -= 1; break; } } if(result_exponent > 0) { Dbl_set_exponent(resultp1,/*using*/result_exponent); Dbl_copytoptr(resultp1,resultp2,dstptr); return(NOEXCEPTION); /* Sign bit is already set */ } /* Fixup potential underflows */ underflow: if(Is_underflowtrap_enabled()) { Dbl_set_sign(resultp1,sign_save); Dbl_setwrapped_exponent(resultp1,result_exponent,unfl); Dbl_copytoptr(resultp1,resultp2,dstptr); /* inexact = FALSE */ return(UNDERFLOWEXCEPTION); } /* * Since we cannot get an inexact denormalized result, * we can now return. */ Dbl_fix_overshift(resultp1,resultp2,(1-result_exponent),extent); Dbl_clear_signexponent(resultp1); Dbl_set_sign(resultp1,sign_save); Dbl_copytoptr(resultp1,resultp2,dstptr); return(NOEXCEPTION); } /* end if(hidden...)... */ /* Fall through and round */ } /* end if(save >= 0)... */ else { /* Subtract magnitudes */ Dbl_addition(leftp1,leftp2,rightp1,rightp2,/*to*/resultp1,resultp2); if(Dbl_isone_hiddenoverflow(resultp1)) { /* Prenormalization required. */ Dbl_rightshiftby1_withextent(resultp2,extent,extent); Dbl_arithrightshiftby1(resultp1,resultp2); result_exponent++; } /* end if hiddenoverflow... */ } /* end else ...subtract magnitudes... */ /* Round the result. If the extension is all zeros,then the result is * exact. Otherwise round in the correct direction. No underflow is * possible. If a postnormalization is necessary, then the mantissa is * all zeros so no shift is needed. */ round: if(Ext_isnotzero(extent)) { inexact = TRUE; switch(Rounding_mode()) { case ROUNDNEAREST: /* The default. */ if(Ext_isone_sign(extent)) { /* at least 1/2 ulp */ if(Ext_isnotzero_lower(extent) || Dbl_isone_lowmantissap2(resultp2)) { /* either exactly half way and odd or more than 1/2ulp */ Dbl_increment(resultp1,resultp2); } } break; case ROUNDPLUS: if(Dbl_iszero_sign(resultp1)) { /* Round up positive results */ Dbl_increment(resultp1,resultp2); } break; case ROUNDMINUS: if(Dbl_isone_sign(resultp1)) { /* Round down negative results */ Dbl_increment(resultp1,resultp2); } case ROUNDZERO:; /* truncate is simple */ } /* end switch... */ if(Dbl_isone_hiddenoverflow(resultp1)) result_exponent++; } if(result_exponent == DBL_INFINITY_EXPONENT) { /* Overflow */ if(Is_overflowtrap_enabled()) { Dbl_setwrapped_exponent(resultp1,result_exponent,ovfl); Dbl_copytoptr(resultp1,resultp2,dstptr); if (inexact) if (Is_inexacttrap_enabled()) return(OVERFLOWEXCEPTION | INEXACTEXCEPTION); else Set_inexactflag(); return(OVERFLOWEXCEPTION); } else { inexact = TRUE; Set_overflowflag(); Dbl_setoverflow(resultp1,resultp2); } } else Dbl_set_exponent(resultp1,result_exponent); Dbl_copytoptr(resultp1,resultp2,dstptr); if(inexact) if(Is_inexacttrap_enabled()) return(INEXACTEXCEPTION); else Set_inexactflag(); return(NOEXCEPTION); }
gpl-2.0
Pantech-Discover/android_kernel_pantech_magnus
drivers/net/wireless/iwlwifi/iwl-2000.c
2712
10351
/****************************************************************************** * * Copyright(c) 2008 - 2012 Intel Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * The full GNU General Public License is included in this distribution in the * file called LICENSE. * * Contact Information: * Intel Linux Wireless <ilw@linux.intel.com> * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 * *****************************************************************************/ #include <linux/kernel.h> #include <linux/module.h> #include <linux/init.h> #include <linux/delay.h> #include <linux/skbuff.h> #include <linux/netdevice.h> #include <net/mac80211.h> #include <linux/etherdevice.h> #include <asm/unaligned.h> #include <linux/stringify.h> #include "iwl-eeprom.h" #include "iwl-dev.h" #include "iwl-core.h" #include "iwl-io.h" #include "iwl-agn.h" #include "iwl-agn-hw.h" #include "iwl-shared.h" #include "iwl-cfg.h" /* Highest firmware API version supported */ #define IWL2030_UCODE_API_MAX 6 #define IWL2000_UCODE_API_MAX 6 #define IWL105_UCODE_API_MAX 6 #define IWL135_UCODE_API_MAX 6 /* Oldest version we won't warn about */ #define IWL2030_UCODE_API_OK 6 #define IWL2000_UCODE_API_OK 6 #define IWL105_UCODE_API_OK 6 #define IWL135_UCODE_API_OK 6 /* Lowest firmware API version supported */ #define IWL2030_UCODE_API_MIN 5 #define IWL2000_UCODE_API_MIN 5 #define IWL105_UCODE_API_MIN 5 #define IWL135_UCODE_API_MIN 5 #define IWL2030_FW_PRE "iwlwifi-2030-" #define IWL2030_MODULE_FIRMWARE(api) IWL2030_FW_PRE __stringify(api) ".ucode" #define IWL2000_FW_PRE "iwlwifi-2000-" #define IWL2000_MODULE_FIRMWARE(api) IWL2000_FW_PRE __stringify(api) ".ucode" #define IWL105_FW_PRE "iwlwifi-105-" #define IWL105_MODULE_FIRMWARE(api) IWL105_FW_PRE __stringify(api) ".ucode" #define IWL135_FW_PRE "iwlwifi-135-" #define IWL135_MODULE_FIRMWARE(api) IWL135_FW_PRE __stringify(api) ".ucode" static void iwl2000_set_ct_threshold(struct iwl_priv *priv) { /* want Celsius */ hw_params(priv).ct_kill_threshold = CT_KILL_THRESHOLD; hw_params(priv).ct_kill_exit_threshold = CT_KILL_EXIT_THRESHOLD; } /* NIC configuration for 2000 series */ static void iwl2000_nic_config(struct iwl_priv *priv) { iwl_rf_config(priv); if (cfg(priv)->iq_invert) iwl_set_bit(trans(priv), CSR_GP_DRIVER_REG, CSR_GP_DRIVER_REG_BIT_RADIO_IQ_INVER); } static const struct iwl_sensitivity_ranges iwl2000_sensitivity = { .min_nrg_cck = 97, .auto_corr_min_ofdm = 80, .auto_corr_min_ofdm_mrc = 128, .auto_corr_min_ofdm_x1 = 105, .auto_corr_min_ofdm_mrc_x1 = 192, .auto_corr_max_ofdm = 145, .auto_corr_max_ofdm_mrc = 232, .auto_corr_max_ofdm_x1 = 110, .auto_corr_max_ofdm_mrc_x1 = 232, .auto_corr_min_cck = 125, .auto_corr_max_cck = 175, .auto_corr_min_cck_mrc = 160, .auto_corr_max_cck_mrc = 310, .nrg_th_cck = 97, .nrg_th_ofdm = 100, .barker_corr_th_min = 190, .barker_corr_th_min_mrc = 390, .nrg_th_cca = 62, }; static void iwl2000_hw_set_hw_params(struct iwl_priv *priv) { hw_params(priv).ht40_channel = BIT(IEEE80211_BAND_2GHZ); hw_params(priv).tx_chains_num = num_of_ant(hw_params(priv).valid_tx_ant); if (cfg(priv)->rx_with_siso_diversity) hw_params(priv).rx_chains_num = 1; else hw_params(priv).rx_chains_num = num_of_ant(hw_params(priv).valid_rx_ant); iwl2000_set_ct_threshold(priv); /* Set initial sensitivity parameters */ hw_params(priv).sens = &iwl2000_sensitivity; } static struct iwl_lib_ops iwl2000_lib = { .set_hw_params = iwl2000_hw_set_hw_params, .nic_config = iwl2000_nic_config, .eeprom_ops = { .regulatory_bands = { EEPROM_REG_BAND_1_CHANNELS, EEPROM_REG_BAND_2_CHANNELS, EEPROM_REG_BAND_3_CHANNELS, EEPROM_REG_BAND_4_CHANNELS, EEPROM_REG_BAND_5_CHANNELS, EEPROM_6000_REG_BAND_24_HT40_CHANNELS, EEPROM_REGULATORY_BAND_NO_HT40, }, .enhanced_txpower = true, }, .temperature = iwlagn_temperature, }; static struct iwl_lib_ops iwl2030_lib = { .set_hw_params = iwl2000_hw_set_hw_params, .nic_config = iwl2000_nic_config, .eeprom_ops = { .regulatory_bands = { EEPROM_REG_BAND_1_CHANNELS, EEPROM_REG_BAND_2_CHANNELS, EEPROM_REG_BAND_3_CHANNELS, EEPROM_REG_BAND_4_CHANNELS, EEPROM_REG_BAND_5_CHANNELS, EEPROM_6000_REG_BAND_24_HT40_CHANNELS, EEPROM_REGULATORY_BAND_NO_HT40, }, .enhanced_txpower = true, }, .temperature = iwlagn_temperature, }; static const struct iwl_base_params iwl2000_base_params = { .eeprom_size = OTP_LOW_IMAGE_SIZE, .num_of_queues = IWLAGN_NUM_QUEUES, .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES, .pll_cfg_val = 0, .max_ll_items = OTP_MAX_LL_ITEMS_2x00, .shadow_ram_support = true, .led_compensation = 51, .adv_thermal_throttle = true, .support_ct_kill_exit = true, .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, .chain_noise_scale = 1000, .wd_timeout = IWL_DEF_WD_TIMEOUT, .max_event_log_size = 512, .shadow_reg_enable = true, .hd_v2 = true, }; static const struct iwl_base_params iwl2030_base_params = { .eeprom_size = OTP_LOW_IMAGE_SIZE, .num_of_queues = IWLAGN_NUM_QUEUES, .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES, .pll_cfg_val = 0, .max_ll_items = OTP_MAX_LL_ITEMS_2x00, .shadow_ram_support = true, .led_compensation = 57, .adv_thermal_throttle = true, .support_ct_kill_exit = true, .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, .chain_noise_scale = 1000, .wd_timeout = IWL_LONG_WD_TIMEOUT, .max_event_log_size = 512, .shadow_reg_enable = true, .hd_v2 = true, }; static const struct iwl_ht_params iwl2000_ht_params = { .ht_greenfield_support = true, .use_rts_for_aggregation = true, /* use rts/cts protection */ }; static const struct iwl_bt_params iwl2030_bt_params = { /* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */ .advanced_bt_coexist = true, .agg_time_limit = BT_AGG_THRESHOLD_DEF, .bt_init_traffic_load = IWL_BT_COEX_TRAFFIC_LOAD_NONE, .bt_prio_boost = IWLAGN_BT_PRIO_BOOST_DEFAULT, .bt_sco_disable = true, .bt_session_2 = true, }; #define IWL_DEVICE_2000 \ .fw_name_pre = IWL2000_FW_PRE, \ .ucode_api_max = IWL2000_UCODE_API_MAX, \ .ucode_api_ok = IWL2000_UCODE_API_OK, \ .ucode_api_min = IWL2000_UCODE_API_MIN, \ .max_inst_size = IWL60_RTC_INST_SIZE, \ .max_data_size = IWL60_RTC_DATA_SIZE, \ .eeprom_ver = EEPROM_2000_EEPROM_VERSION, \ .eeprom_calib_ver = EEPROM_2000_TX_POWER_VERSION, \ .lib = &iwl2000_lib, \ .base_params = &iwl2000_base_params, \ .need_temp_offset_calib = true, \ .temp_offset_v2 = true, \ .led_mode = IWL_LED_RF_STATE, \ .iq_invert = true \ const struct iwl_cfg iwl2000_2bgn_cfg = { .name = "Intel(R) Centrino(R) Wireless-N 2200 BGN", IWL_DEVICE_2000, .ht_params = &iwl2000_ht_params, }; const struct iwl_cfg iwl2000_2bgn_d_cfg = { .name = "Intel(R) Centrino(R) Wireless-N 2200D BGN", IWL_DEVICE_2000, .ht_params = &iwl2000_ht_params, }; #define IWL_DEVICE_2030 \ .fw_name_pre = IWL2030_FW_PRE, \ .ucode_api_max = IWL2030_UCODE_API_MAX, \ .ucode_api_ok = IWL2030_UCODE_API_OK, \ .ucode_api_min = IWL2030_UCODE_API_MIN, \ .max_inst_size = IWL60_RTC_INST_SIZE, \ .max_data_size = IWL60_RTC_DATA_SIZE, \ .eeprom_ver = EEPROM_2000_EEPROM_VERSION, \ .eeprom_calib_ver = EEPROM_2000_TX_POWER_VERSION, \ .lib = &iwl2030_lib, \ .base_params = &iwl2030_base_params, \ .bt_params = &iwl2030_bt_params, \ .need_temp_offset_calib = true, \ .temp_offset_v2 = true, \ .led_mode = IWL_LED_RF_STATE, \ .adv_pm = true, \ .iq_invert = true \ const struct iwl_cfg iwl2030_2bgn_cfg = { .name = "Intel(R) Centrino(R) Wireless-N 2230 BGN", IWL_DEVICE_2030, .ht_params = &iwl2000_ht_params, }; #define IWL_DEVICE_105 \ .fw_name_pre = IWL105_FW_PRE, \ .ucode_api_max = IWL105_UCODE_API_MAX, \ .ucode_api_ok = IWL105_UCODE_API_OK, \ .ucode_api_min = IWL105_UCODE_API_MIN, \ .max_inst_size = IWL60_RTC_INST_SIZE, \ .max_data_size = IWL60_RTC_DATA_SIZE, \ .eeprom_ver = EEPROM_2000_EEPROM_VERSION, \ .eeprom_calib_ver = EEPROM_2000_TX_POWER_VERSION, \ .lib = &iwl2000_lib, \ .base_params = &iwl2000_base_params, \ .need_temp_offset_calib = true, \ .temp_offset_v2 = true, \ .led_mode = IWL_LED_RF_STATE, \ .adv_pm = true, \ .rx_with_siso_diversity = true, \ .iq_invert = true \ const struct iwl_cfg iwl105_bgn_cfg = { .name = "Intel(R) Centrino(R) Wireless-N 105 BGN", IWL_DEVICE_105, .ht_params = &iwl2000_ht_params, }; const struct iwl_cfg iwl105_bgn_d_cfg = { .name = "Intel(R) Centrino(R) Wireless-N 105D BGN", IWL_DEVICE_105, .ht_params = &iwl2000_ht_params, }; #define IWL_DEVICE_135 \ .fw_name_pre = IWL135_FW_PRE, \ .ucode_api_max = IWL135_UCODE_API_MAX, \ .ucode_api_ok = IWL135_UCODE_API_OK, \ .ucode_api_min = IWL135_UCODE_API_MIN, \ .max_inst_size = IWL60_RTC_INST_SIZE, \ .max_data_size = IWL60_RTC_DATA_SIZE, \ .eeprom_ver = EEPROM_2000_EEPROM_VERSION, \ .eeprom_calib_ver = EEPROM_2000_TX_POWER_VERSION, \ .lib = &iwl2030_lib, \ .base_params = &iwl2030_base_params, \ .bt_params = &iwl2030_bt_params, \ .need_temp_offset_calib = true, \ .temp_offset_v2 = true, \ .led_mode = IWL_LED_RF_STATE, \ .adv_pm = true, \ .rx_with_siso_diversity = true, \ .iq_invert = true \ const struct iwl_cfg iwl135_bgn_cfg = { .name = "Intel(R) Centrino(R) Wireless-N 135 BGN", IWL_DEVICE_135, .ht_params = &iwl2000_ht_params, }; MODULE_FIRMWARE(IWL2000_MODULE_FIRMWARE(IWL2000_UCODE_API_OK)); MODULE_FIRMWARE(IWL2030_MODULE_FIRMWARE(IWL2030_UCODE_API_OK)); MODULE_FIRMWARE(IWL105_MODULE_FIRMWARE(IWL105_UCODE_API_OK)); MODULE_FIRMWARE(IWL135_MODULE_FIRMWARE(IWL135_UCODE_API_OK));
gpl-2.0
arm10c/linux
drivers/mmc/core/sdio_cis.c
2968
8996
/* * linux/drivers/mmc/core/sdio_cis.c * * Author: Nicolas Pitre * Created: June 11, 2007 * Copyright: MontaVista Software Inc. * * Copyright 2007 Pierre Ossman * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or (at * your option) any later version. */ #include <linux/kernel.h> #include <linux/slab.h> #include <linux/mmc/host.h> #include <linux/mmc/card.h> #include <linux/mmc/sdio.h> #include <linux/mmc/sdio_func.h> #include "sdio_cis.h" #include "sdio_ops.h" static int cistpl_vers_1(struct mmc_card *card, struct sdio_func *func, const unsigned char *buf, unsigned size) { unsigned i, nr_strings; char **buffer, *string; /* Find all null-terminated (including zero length) strings in the TPLLV1_INFO field. Trailing garbage is ignored. */ buf += 2; size -= 2; nr_strings = 0; for (i = 0; i < size; i++) { if (buf[i] == 0xff) break; if (buf[i] == 0) nr_strings++; } if (nr_strings == 0) return 0; size = i; buffer = kzalloc(sizeof(char*) * nr_strings + size, GFP_KERNEL); if (!buffer) return -ENOMEM; string = (char*)(buffer + nr_strings); for (i = 0; i < nr_strings; i++) { buffer[i] = string; strcpy(string, buf); string += strlen(string) + 1; buf += strlen(buf) + 1; } if (func) { func->num_info = nr_strings; func->info = (const char**)buffer; } else { card->num_info = nr_strings; card->info = (const char**)buffer; } return 0; } static int cistpl_manfid(struct mmc_card *card, struct sdio_func *func, const unsigned char *buf, unsigned size) { unsigned int vendor, device; /* TPLMID_MANF */ vendor = buf[0] | (buf[1] << 8); /* TPLMID_CARD */ device = buf[2] | (buf[3] << 8); if (func) { func->vendor = vendor; func->device = device; } else { card->cis.vendor = vendor; card->cis.device = device; } return 0; } static const unsigned char speed_val[16] = { 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80 }; static const unsigned int speed_unit[8] = { 10000, 100000, 1000000, 10000000, 0, 0, 0, 0 }; typedef int (tpl_parse_t)(struct mmc_card *, struct sdio_func *, const unsigned char *, unsigned); struct cis_tpl { unsigned char code; unsigned char min_size; tpl_parse_t *parse; }; static int cis_tpl_parse(struct mmc_card *card, struct sdio_func *func, const char *tpl_descr, const struct cis_tpl *tpl, int tpl_count, unsigned char code, const unsigned char *buf, unsigned size) { int i, ret; /* look for a matching code in the table */ for (i = 0; i < tpl_count; i++, tpl++) { if (tpl->code == code) break; } if (i < tpl_count) { if (size >= tpl->min_size) { if (tpl->parse) ret = tpl->parse(card, func, buf, size); else ret = -EILSEQ; /* known tuple, not parsed */ } else { /* invalid tuple */ ret = -EINVAL; } if (ret && ret != -EILSEQ && ret != -ENOENT) { pr_err("%s: bad %s tuple 0x%02x (%u bytes)\n", mmc_hostname(card->host), tpl_descr, code, size); } } else { /* unknown tuple */ ret = -ENOENT; } return ret; } static int cistpl_funce_common(struct mmc_card *card, struct sdio_func *func, const unsigned char *buf, unsigned size) { /* Only valid for the common CIS (function 0) */ if (func) return -EINVAL; /* TPLFE_FN0_BLK_SIZE */ card->cis.blksize = buf[1] | (buf[2] << 8); /* TPLFE_MAX_TRAN_SPEED */ card->cis.max_dtr = speed_val[(buf[3] >> 3) & 15] * speed_unit[buf[3] & 7]; return 0; } static int cistpl_funce_func(struct mmc_card *card, struct sdio_func *func, const unsigned char *buf, unsigned size) { unsigned vsn; unsigned min_size; /* Only valid for the individual function's CIS (1-7) */ if (!func) return -EINVAL; /* * This tuple has a different length depending on the SDIO spec * version. */ vsn = func->card->cccr.sdio_vsn; min_size = (vsn == SDIO_SDIO_REV_1_00) ? 28 : 42; if (size < min_size) return -EINVAL; /* TPLFE_MAX_BLK_SIZE */ func->max_blksize = buf[12] | (buf[13] << 8); /* TPLFE_ENABLE_TIMEOUT_VAL, present in ver 1.1 and above */ if (vsn > SDIO_SDIO_REV_1_00) func->enable_timeout = (buf[28] | (buf[29] << 8)) * 10; else func->enable_timeout = jiffies_to_msecs(HZ); return 0; } /* * Known TPLFE_TYPEs table for CISTPL_FUNCE tuples. * * Note that, unlike PCMCIA, CISTPL_FUNCE tuples are not parsed depending * on the TPLFID_FUNCTION value of the previous CISTPL_FUNCID as on SDIO * TPLFID_FUNCTION is always hardcoded to 0x0C. */ static const struct cis_tpl cis_tpl_funce_list[] = { { 0x00, 4, cistpl_funce_common }, { 0x01, 0, cistpl_funce_func }, { 0x04, 1+1+6, /* CISTPL_FUNCE_LAN_NODE_ID */ }, }; static int cistpl_funce(struct mmc_card *card, struct sdio_func *func, const unsigned char *buf, unsigned size) { if (size < 1) return -EINVAL; return cis_tpl_parse(card, func, "CISTPL_FUNCE", cis_tpl_funce_list, ARRAY_SIZE(cis_tpl_funce_list), buf[0], buf, size); } /* Known TPL_CODEs table for CIS tuples */ static const struct cis_tpl cis_tpl_list[] = { { 0x15, 3, cistpl_vers_1 }, { 0x20, 4, cistpl_manfid }, { 0x21, 2, /* cistpl_funcid */ }, { 0x22, 0, cistpl_funce }, }; static int sdio_read_cis(struct mmc_card *card, struct sdio_func *func) { int ret; struct sdio_func_tuple *this, **prev; unsigned i, ptr = 0; /* * Note that this works for the common CIS (function number 0) as * well as a function's CIS * since SDIO_CCCR_CIS and SDIO_FBR_CIS * have the same offset. */ for (i = 0; i < 3; i++) { unsigned char x, fn; if (func) fn = func->num; else fn = 0; ret = mmc_io_rw_direct(card, 0, 0, SDIO_FBR_BASE(fn) + SDIO_FBR_CIS + i, 0, &x); if (ret) return ret; ptr |= x << (i * 8); } if (func) prev = &func->tuples; else prev = &card->tuples; BUG_ON(*prev); do { unsigned char tpl_code, tpl_link; ret = mmc_io_rw_direct(card, 0, 0, ptr++, 0, &tpl_code); if (ret) break; /* 0xff means we're done */ if (tpl_code == 0xff) break; /* null entries have no link field or data */ if (tpl_code == 0x00) continue; ret = mmc_io_rw_direct(card, 0, 0, ptr++, 0, &tpl_link); if (ret) break; /* a size of 0xff also means we're done */ if (tpl_link == 0xff) break; this = kmalloc(sizeof(*this) + tpl_link, GFP_KERNEL); if (!this) return -ENOMEM; for (i = 0; i < tpl_link; i++) { ret = mmc_io_rw_direct(card, 0, 0, ptr + i, 0, &this->data[i]); if (ret) break; } if (ret) { kfree(this); break; } /* Try to parse the CIS tuple */ ret = cis_tpl_parse(card, func, "CIS", cis_tpl_list, ARRAY_SIZE(cis_tpl_list), tpl_code, this->data, tpl_link); if (ret == -EILSEQ || ret == -ENOENT) { /* * The tuple is unknown or known but not parsed. * Queue the tuple for the function driver. */ this->next = NULL; this->code = tpl_code; this->size = tpl_link; *prev = this; prev = &this->next; if (ret == -ENOENT) { /* warn about unknown tuples */ pr_warn_ratelimited("%s: queuing unknown" " CIS tuple 0x%02x (%u bytes)\n", mmc_hostname(card->host), tpl_code, tpl_link); } /* keep on analyzing tuples */ ret = 0; } else { /* * We don't need the tuple anymore if it was * successfully parsed by the SDIO core or if it is * not going to be queued for a driver. */ kfree(this); } ptr += tpl_link; } while (!ret); /* * Link in all unknown tuples found in the common CIS so that * drivers don't have to go digging in two places. */ if (func) *prev = card->tuples; return ret; } int sdio_read_common_cis(struct mmc_card *card) { return sdio_read_cis(card, NULL); } void sdio_free_common_cis(struct mmc_card *card) { struct sdio_func_tuple *tuple, *victim; tuple = card->tuples; while (tuple) { victim = tuple; tuple = tuple->next; kfree(victim); } card->tuples = NULL; } int sdio_read_func_cis(struct sdio_func *func) { int ret; ret = sdio_read_cis(func->card, func); if (ret) return ret; /* * Since we've linked to tuples in the card structure, * we must make sure we have a reference to it. */ get_device(&func->card->dev); /* * Vendor/device id is optional for function CIS, so * copy it from the card structure as needed. */ if (func->vendor == 0) { func->vendor = func->card->cis.vendor; func->device = func->card->cis.device; } return 0; } void sdio_free_func_cis(struct sdio_func *func) { struct sdio_func_tuple *tuple, *victim; tuple = func->tuples; while (tuple && tuple != func->card->tuples) { victim = tuple; tuple = tuple->next; kfree(victim); } func->tuples = NULL; /* * We have now removed the link to the tuples in the * card structure, so remove the reference. */ put_device(&func->card->dev); }
gpl-2.0
lanniaoershi/android_kernel_oneplus_msm8994
arch/frv/kernel/frv_ksyms.c
3736
2999
#include <linux/module.h> #include <linux/linkage.h> #include <linux/sched.h> #include <linux/string.h> #include <linux/mm.h> #include <linux/user.h> #include <linux/elfcore.h> #include <linux/in6.h> #include <linux/interrupt.h> #include <asm/setup.h> #include <asm/pgalloc.h> #include <asm/irq.h> #include <asm/io.h> #include <asm/checksum.h> #include <asm/hardirq.h> #include <asm/cacheflush.h> extern long __memcpy_user(void *dst, const void *src, size_t count); extern long __memset_user(void *dst, const void *src, size_t count); /* platform dependent support */ EXPORT_SYMBOL(__ioremap); EXPORT_SYMBOL(iounmap); EXPORT_SYMBOL(ip_fast_csum); #if 0 EXPORT_SYMBOL(local_irq_count); EXPORT_SYMBOL(local_bh_count); #endif EXPORT_SYMBOL(__res_bus_clock_speed_HZ); EXPORT_SYMBOL(__page_offset); EXPORT_SYMBOL(__memcpy_user); EXPORT_SYMBOL(__memset_user); EXPORT_SYMBOL(frv_dcache_writeback); EXPORT_SYMBOL(frv_cache_invalidate); EXPORT_SYMBOL(frv_icache_invalidate); EXPORT_SYMBOL(frv_cache_wback_inv); #ifndef CONFIG_MMU EXPORT_SYMBOL(memory_start); EXPORT_SYMBOL(memory_end); #endif EXPORT_SYMBOL(__debug_bug_trap); /* The following are special because they're not called explicitly (the C compiler generates them). Fortunately, their interface isn't gonna change any time soon now, so it's OK to leave it out of version control. */ EXPORT_SYMBOL(memcpy); EXPORT_SYMBOL(memset); EXPORT_SYMBOL(__outsl_ns); EXPORT_SYMBOL(__insl_ns); #ifdef CONFIG_FRV_OUTOFLINE_ATOMIC_OPS EXPORT_SYMBOL(atomic_test_and_ANDNOT_mask); EXPORT_SYMBOL(atomic_test_and_OR_mask); EXPORT_SYMBOL(atomic_test_and_XOR_mask); EXPORT_SYMBOL(atomic_add_return); EXPORT_SYMBOL(atomic_sub_return); EXPORT_SYMBOL(__xchg_32); EXPORT_SYMBOL(__cmpxchg_32); #endif EXPORT_SYMBOL(atomic64_add_return); EXPORT_SYMBOL(atomic64_sub_return); EXPORT_SYMBOL(__xchg_64); EXPORT_SYMBOL(__cmpxchg_64); EXPORT_SYMBOL(__debug_bug_printk); EXPORT_SYMBOL(__delay_loops_MHz); /* * libgcc functions - functions that are used internally by the * compiler... (prototypes are not correct though, but that * doesn't really matter since they're not versioned). */ extern void __gcc_bcmp(void); extern void __ashldi3(void); extern void __ashrdi3(void); extern void __cmpdi2(void); extern void __divdi3(void); extern void __lshrdi3(void); extern void __moddi3(void); extern void __muldi3(void); extern void __mulll(void); extern void __umulll(void); extern void __negdi2(void); extern void __ucmpdi2(void); extern void __udivdi3(void); extern void __udivmoddi4(void); extern void __umoddi3(void); /* gcc lib functions */ //EXPORT_SYMBOL(__gcc_bcmp); EXPORT_SYMBOL(__ashldi3); EXPORT_SYMBOL(__ashrdi3); //EXPORT_SYMBOL(__cmpdi2); //EXPORT_SYMBOL(__divdi3); EXPORT_SYMBOL(__lshrdi3); //EXPORT_SYMBOL(__moddi3); EXPORT_SYMBOL(__muldi3); EXPORT_SYMBOL(__mulll); EXPORT_SYMBOL(__umulll); EXPORT_SYMBOL(__negdi2); EXPORT_SYMBOL(__ucmpdi2); //EXPORT_SYMBOL(__udivdi3); //EXPORT_SYMBOL(__udivmoddi4); //EXPORT_SYMBOL(__umoddi3);
gpl-2.0
ebildude123/Geass-Kernel-TF300T
arch/sh/kernel/cpu/sh4a/hwblk-sh7723.c
4504
4261
/* * arch/sh/kernel/cpu/sh4a/hwblk-sh7723.c * * SH7723 hardware block support * * Copyright (C) 2009 Magnus Damm * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #include <linux/init.h> #include <linux/kernel.h> #include <linux/io.h> #include <asm/suspend.h> #include <asm/hwblk.h> #include <cpu/sh7723.h> /* SH7723 registers */ #define MSTPCR0 0xa4150030 #define MSTPCR1 0xa4150034 #define MSTPCR2 0xa4150038 /* SH7723 Power Domains */ enum { CORE_AREA, SUB_AREA, CORE_AREA_BM }; static struct hwblk_area sh7723_hwblk_area[] = { [CORE_AREA] = HWBLK_AREA(0, 0), [CORE_AREA_BM] = HWBLK_AREA(HWBLK_AREA_FLAG_PARENT, CORE_AREA), [SUB_AREA] = HWBLK_AREA(0, 0), }; /* Table mapping HWBLK to Module Stop Bit and Power Domain */ static struct hwblk sh7723_hwblk[HWBLK_NR] = { [HWBLK_TLB] = HWBLK(MSTPCR0, 31, CORE_AREA), [HWBLK_IC] = HWBLK(MSTPCR0, 30, CORE_AREA), [HWBLK_OC] = HWBLK(MSTPCR0, 29, CORE_AREA), [HWBLK_L2C] = HWBLK(MSTPCR0, 28, CORE_AREA), [HWBLK_ILMEM] = HWBLK(MSTPCR0, 27, CORE_AREA), [HWBLK_FPU] = HWBLK(MSTPCR0, 24, CORE_AREA), [HWBLK_INTC] = HWBLK(MSTPCR0, 22, CORE_AREA), [HWBLK_DMAC0] = HWBLK(MSTPCR0, 21, CORE_AREA_BM), [HWBLK_SHYWAY] = HWBLK(MSTPCR0, 20, CORE_AREA), [HWBLK_HUDI] = HWBLK(MSTPCR0, 19, CORE_AREA), [HWBLK_DBG] = HWBLK(MSTPCR0, 18, CORE_AREA), [HWBLK_UBC] = HWBLK(MSTPCR0, 17, CORE_AREA), [HWBLK_SUBC] = HWBLK(MSTPCR0, 16, CORE_AREA), [HWBLK_TMU0] = HWBLK(MSTPCR0, 15, CORE_AREA), [HWBLK_CMT] = HWBLK(MSTPCR0, 14, SUB_AREA), [HWBLK_RWDT] = HWBLK(MSTPCR0, 13, SUB_AREA), [HWBLK_DMAC1] = HWBLK(MSTPCR0, 12, CORE_AREA_BM), [HWBLK_TMU1] = HWBLK(MSTPCR0, 11, CORE_AREA), [HWBLK_FLCTL] = HWBLK(MSTPCR0, 10, CORE_AREA), [HWBLK_SCIF0] = HWBLK(MSTPCR0, 9, CORE_AREA), [HWBLK_SCIF1] = HWBLK(MSTPCR0, 8, CORE_AREA), [HWBLK_SCIF2] = HWBLK(MSTPCR0, 7, CORE_AREA), [HWBLK_SCIF3] = HWBLK(MSTPCR0, 6, CORE_AREA), [HWBLK_SCIF4] = HWBLK(MSTPCR0, 5, CORE_AREA), [HWBLK_SCIF5] = HWBLK(MSTPCR0, 4, CORE_AREA), [HWBLK_MSIOF0] = HWBLK(MSTPCR0, 2, CORE_AREA), [HWBLK_MSIOF1] = HWBLK(MSTPCR0, 1, CORE_AREA), [HWBLK_MERAM] = HWBLK(MSTPCR0, 0, CORE_AREA), [HWBLK_IIC] = HWBLK(MSTPCR1, 9, CORE_AREA), [HWBLK_RTC] = HWBLK(MSTPCR1, 8, SUB_AREA), [HWBLK_ATAPI] = HWBLK(MSTPCR2, 28, CORE_AREA_BM), [HWBLK_ADC] = HWBLK(MSTPCR2, 27, CORE_AREA), [HWBLK_TPU] = HWBLK(MSTPCR2, 25, CORE_AREA), [HWBLK_IRDA] = HWBLK(MSTPCR2, 24, CORE_AREA), [HWBLK_TSIF] = HWBLK(MSTPCR2, 22, CORE_AREA), [HWBLK_ICB] = HWBLK(MSTPCR2, 21, CORE_AREA_BM), [HWBLK_SDHI0] = HWBLK(MSTPCR2, 18, CORE_AREA), [HWBLK_SDHI1] = HWBLK(MSTPCR2, 17, CORE_AREA), [HWBLK_KEYSC] = HWBLK(MSTPCR2, 14, SUB_AREA), [HWBLK_USB] = HWBLK(MSTPCR2, 11, CORE_AREA), [HWBLK_2DG] = HWBLK(MSTPCR2, 10, CORE_AREA_BM), [HWBLK_SIU] = HWBLK(MSTPCR2, 8, CORE_AREA), [HWBLK_VEU2H1] = HWBLK(MSTPCR2, 6, CORE_AREA_BM), [HWBLK_VOU] = HWBLK(MSTPCR2, 5, CORE_AREA_BM), [HWBLK_BEU] = HWBLK(MSTPCR2, 4, CORE_AREA_BM), [HWBLK_CEU] = HWBLK(MSTPCR2, 3, CORE_AREA_BM), [HWBLK_VEU2H0] = HWBLK(MSTPCR2, 2, CORE_AREA_BM), [HWBLK_VPU] = HWBLK(MSTPCR2, 1, CORE_AREA_BM), [HWBLK_LCDC] = HWBLK(MSTPCR2, 0, CORE_AREA_BM), }; static struct hwblk_info sh7723_hwblk_info = { .areas = sh7723_hwblk_area, .nr_areas = ARRAY_SIZE(sh7723_hwblk_area), .hwblks = sh7723_hwblk, .nr_hwblks = ARRAY_SIZE(sh7723_hwblk), }; int arch_hwblk_sleep_mode(void) { if (!sh7723_hwblk_area[CORE_AREA].cnt[HWBLK_CNT_USAGE]) return SUSP_SH_STANDBY | SUSP_SH_SF; if (!sh7723_hwblk_area[CORE_AREA_BM].cnt[HWBLK_CNT_USAGE]) return SUSP_SH_SLEEP | SUSP_SH_SF; return SUSP_SH_SLEEP; } int __init arch_hwblk_init(void) { return hwblk_register(&sh7723_hwblk_info); }
gpl-2.0
drgroovestarr/kernel_samsung_manta
drivers/net/tokenring/skisa.c
4760
9809
/* * skisa.c: A network driver for SK-NET TMS380-based ISA token ring cards. * * Based on tmspci written 1999 by Adam Fritzler * * Written 2000 by Jochen Friedrich * Dedicated to my girlfriend Steffi Bopp * * This software may be used and distributed according to the terms * of the GNU General Public License, incorporated herein by reference. * * This driver module supports the following cards: * - SysKonnect TR4/16(+) ISA (SK-4190) * * Maintainer(s): * AF Adam Fritzler * JF Jochen Friedrich jochen@scram.de * * Modification History: * 14-Jan-01 JF Created * 28-Oct-02 JF Fixed probe of card for static compilation. * Fixed module init to not make hotplug go wild. * 09-Nov-02 JF Fixed early bail out on out of memory * situations if multiple cards are found. * Cleaned up some unnecessary console SPAM. * 09-Dec-02 JF Fixed module reference counting. * 02-Jan-03 JF Renamed to skisa.c * */ static const char version[] = "skisa.c: v1.03 09/12/2002 by Jochen Friedrich\n"; #include <linux/module.h> #include <linux/kernel.h> #include <linux/errno.h> #include <linux/pci.h> #include <linux/init.h> #include <linux/netdevice.h> #include <linux/trdevice.h> #include <linux/platform_device.h> #include <asm/io.h> #include <asm/irq.h> #include <asm/pci.h> #include <asm/dma.h> #include "tms380tr.h" #define SK_ISA_IO_EXTENT 32 /* A zero-terminated list of I/O addresses to be probed. */ static unsigned int portlist[] __initdata = { 0x0A20, 0x1A20, 0x0B20, 0x1B20, 0x0980, 0x1980, 0x0900, 0x1900,// SK 0 }; /* A zero-terminated list of IRQs to be probed. * Used again after initial probe for sktr_chipset_init, called from sktr_open. */ static const unsigned short irqlist[] = { 3, 5, 9, 10, 11, 12, 15, 0 }; /* A zero-terminated list of DMAs to be probed. */ static int dmalist[] __initdata = { 5, 6, 7, 0 }; static char isa_cardname[] = "SK NET TR 4/16 ISA\0"; static u64 dma_mask = ISA_MAX_ADDRESS; static int sk_isa_open(struct net_device *dev); static void sk_isa_read_eeprom(struct net_device *dev); static unsigned short sk_isa_setnselout_pins(struct net_device *dev); static unsigned short sk_isa_sifreadb(struct net_device *dev, unsigned short reg) { return inb(dev->base_addr + reg); } static unsigned short sk_isa_sifreadw(struct net_device *dev, unsigned short reg) { return inw(dev->base_addr + reg); } static void sk_isa_sifwriteb(struct net_device *dev, unsigned short val, unsigned short reg) { outb(val, dev->base_addr + reg); } static void sk_isa_sifwritew(struct net_device *dev, unsigned short val, unsigned short reg) { outw(val, dev->base_addr + reg); } static int __init sk_isa_probe1(struct net_device *dev, int ioaddr) { unsigned char old, chk1, chk2; if (!request_region(ioaddr, SK_ISA_IO_EXTENT, isa_cardname)) return -ENODEV; old = inb(ioaddr + SIFADR); /* Get the old SIFADR value */ chk1 = 0; /* Begin with check value 0 */ do { /* Write new SIFADR value */ outb(chk1, ioaddr + SIFADR); /* Read, invert and write */ chk2 = inb(ioaddr + SIFADD); chk2 ^= 0x0FE; outb(chk2, ioaddr + SIFADR); /* Read, invert and compare */ chk2 = inb(ioaddr + SIFADD); chk2 ^= 0x0FE; if(chk1 != chk2) { release_region(ioaddr, SK_ISA_IO_EXTENT); return -ENODEV; } chk1 -= 2; } while(chk1 != 0); /* Repeat 128 times (all byte values) */ /* Restore the SIFADR value */ outb(old, ioaddr + SIFADR); dev->base_addr = ioaddr; return 0; } static struct net_device_ops sk_isa_netdev_ops __read_mostly; static int __init setup_card(struct net_device *dev, struct device *pdev) { struct net_local *tp; static int versionprinted; const unsigned *port; int j, err = 0; if (!dev) return -ENOMEM; if (dev->base_addr) /* probe specific location */ err = sk_isa_probe1(dev, dev->base_addr); else { for (port = portlist; *port; port++) { err = sk_isa_probe1(dev, *port); if (!err) break; } } if (err) goto out5; /* At this point we have found a valid card. */ if (versionprinted++ == 0) printk(KERN_DEBUG "%s", version); err = -EIO; pdev->dma_mask = &dma_mask; if (tmsdev_init(dev, pdev)) goto out4; dev->base_addr &= ~3; sk_isa_read_eeprom(dev); printk(KERN_DEBUG "skisa.c: Ring Station Address: %pM\n", dev->dev_addr); tp = netdev_priv(dev); tp->setnselout = sk_isa_setnselout_pins; tp->sifreadb = sk_isa_sifreadb; tp->sifreadw = sk_isa_sifreadw; tp->sifwriteb = sk_isa_sifwriteb; tp->sifwritew = sk_isa_sifwritew; memcpy(tp->ProductID, isa_cardname, PROD_ID_SIZE + 1); tp->tmspriv = NULL; dev->netdev_ops = &sk_isa_netdev_ops; if (dev->irq == 0) { for(j = 0; irqlist[j] != 0; j++) { dev->irq = irqlist[j]; if (!request_irq(dev->irq, tms380tr_interrupt, 0, isa_cardname, dev)) break; } if(irqlist[j] == 0) { printk(KERN_INFO "skisa.c: AutoSelect no IRQ available\n"); goto out3; } } else { for(j = 0; irqlist[j] != 0; j++) if (irqlist[j] == dev->irq) break; if (irqlist[j] == 0) { printk(KERN_INFO "skisa.c: Illegal IRQ %d specified\n", dev->irq); goto out3; } if (request_irq(dev->irq, tms380tr_interrupt, 0, isa_cardname, dev)) { printk(KERN_INFO "skisa.c: Selected IRQ %d not available\n", dev->irq); goto out3; } } if (dev->dma == 0) { for(j = 0; dmalist[j] != 0; j++) { dev->dma = dmalist[j]; if (!request_dma(dev->dma, isa_cardname)) break; } if(dmalist[j] == 0) { printk(KERN_INFO "skisa.c: AutoSelect no DMA available\n"); goto out2; } } else { for(j = 0; dmalist[j] != 0; j++) if (dmalist[j] == dev->dma) break; if (dmalist[j] == 0) { printk(KERN_INFO "skisa.c: Illegal DMA %d specified\n", dev->dma); goto out2; } if (request_dma(dev->dma, isa_cardname)) { printk(KERN_INFO "skisa.c: Selected DMA %d not available\n", dev->dma); goto out2; } } err = register_netdev(dev); if (err) goto out; printk(KERN_DEBUG "%s: IO: %#4lx IRQ: %d DMA: %d\n", dev->name, dev->base_addr, dev->irq, dev->dma); return 0; out: free_dma(dev->dma); out2: free_irq(dev->irq, dev); out3: tmsdev_term(dev); out4: release_region(dev->base_addr, SK_ISA_IO_EXTENT); out5: return err; } /* * Reads MAC address from adapter RAM, which should've read it from * the onboard ROM. * * Calling this on a board that does not support it can be a very * dangerous thing. The Madge board, for instance, will lock your * machine hard when this is called. Luckily, its supported in a * separate driver. --ASF */ static void sk_isa_read_eeprom(struct net_device *dev) { int i; /* Address: 0000:0000 */ sk_isa_sifwritew(dev, 0, SIFADX); sk_isa_sifwritew(dev, 0, SIFADR); /* Read six byte MAC address data */ dev->addr_len = 6; for(i = 0; i < 6; i++) dev->dev_addr[i] = sk_isa_sifreadw(dev, SIFINC) >> 8; } static unsigned short sk_isa_setnselout_pins(struct net_device *dev) { return 0; } static int sk_isa_open(struct net_device *dev) { struct net_local *tp = netdev_priv(dev); unsigned short val = 0; unsigned short oldval; int i; val = 0; for(i = 0; irqlist[i] != 0; i++) { if(irqlist[i] == dev->irq) break; } val |= CYCLE_TIME << 2; val |= i << 4; i = dev->dma - 5; val |= i; if(tp->DataRate == SPEED_4) val |= LINE_SPEED_BIT; else val &= ~LINE_SPEED_BIT; oldval = sk_isa_sifreadb(dev, POSREG); /* Leave cycle bits alone */ oldval |= 0xf3; val &= oldval; sk_isa_sifwriteb(dev, val, POSREG); return tms380tr_open(dev); } #define ISATR_MAX_ADAPTERS 3 static int io[ISATR_MAX_ADAPTERS]; static int irq[ISATR_MAX_ADAPTERS]; static int dma[ISATR_MAX_ADAPTERS]; MODULE_LICENSE("GPL"); module_param_array(io, int, NULL, 0); module_param_array(irq, int, NULL, 0); module_param_array(dma, int, NULL, 0); static struct platform_device *sk_isa_dev[ISATR_MAX_ADAPTERS]; static struct platform_driver sk_isa_driver = { .driver = { .name = "skisa", }, }; static int __init sk_isa_init(void) { struct net_device *dev; struct platform_device *pdev; int i, num = 0, err = 0; sk_isa_netdev_ops = tms380tr_netdev_ops; sk_isa_netdev_ops.ndo_open = sk_isa_open; sk_isa_netdev_ops.ndo_stop = tms380tr_close; err = platform_driver_register(&sk_isa_driver); if (err) return err; for (i = 0; i < ISATR_MAX_ADAPTERS ; i++) { dev = alloc_trdev(sizeof(struct net_local)); if (!dev) continue; dev->base_addr = io[i]; dev->irq = irq[i]; dev->dma = dma[i]; pdev = platform_device_register_simple("skisa", i, NULL, 0); if (IS_ERR(pdev)) { free_netdev(dev); continue; } err = setup_card(dev, &pdev->dev); if (!err) { sk_isa_dev[i] = pdev; platform_set_drvdata(sk_isa_dev[i], dev); ++num; } else { platform_device_unregister(pdev); free_netdev(dev); } } printk(KERN_NOTICE "skisa.c: %d cards found.\n", num); /* Probe for cards. */ if (num == 0) { printk(KERN_NOTICE "skisa.c: No cards found.\n"); platform_driver_unregister(&sk_isa_driver); return -ENODEV; } return 0; } static void __exit sk_isa_cleanup(void) { struct net_device *dev; int i; for (i = 0; i < ISATR_MAX_ADAPTERS ; i++) { struct platform_device *pdev = sk_isa_dev[i]; if (!pdev) continue; dev = platform_get_drvdata(pdev); unregister_netdev(dev); release_region(dev->base_addr, SK_ISA_IO_EXTENT); free_irq(dev->irq, dev); free_dma(dev->dma); tmsdev_term(dev); free_netdev(dev); platform_set_drvdata(pdev, NULL); platform_device_unregister(pdev); } platform_driver_unregister(&sk_isa_driver); } module_init(sk_isa_init); module_exit(sk_isa_cleanup);
gpl-2.0
wm8120/Linux-eMMC-journaling
arch/arm/mach-omap1/opp_data.c
4760
2132
/* * linux/arch/arm/mach-omap1/opp_data.c * * Copyright (C) 2004 - 2005 Nokia corporation * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com> * Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ #include "clock.h" #include "opp.h" /*------------------------------------------------------------------------- * Omap1 MPU rate table *-------------------------------------------------------------------------*/ struct mpu_rate omap1_rate_table[] = { /* MPU MHz, xtal MHz, dpll1 MHz, CKCTL, DPLL_CTL * NOTE: Comment order here is different from bits in CKCTL value: * armdiv, dspdiv, dspmmu, tcdiv, perdiv, lcddiv */ { 216000000, 12000000, 216000000, 0x050d, 0x2910, /* 1/1/2/2/2/8 */ CK_1710 }, { 195000000, 13000000, 195000000, 0x050e, 0x2790, /* 1/1/2/2/4/8 */ CK_7XX }, { 192000000, 19200000, 192000000, 0x050f, 0x2510, /* 1/1/2/2/8/8 */ CK_16XX }, { 192000000, 12000000, 192000000, 0x050f, 0x2810, /* 1/1/2/2/8/8 */ CK_16XX }, { 96000000, 12000000, 192000000, 0x055f, 0x2810, /* 2/2/2/2/8/8 */ CK_16XX }, { 48000000, 12000000, 192000000, 0x0baf, 0x2810, /* 4/4/4/8/8/8 */ CK_16XX }, { 24000000, 12000000, 192000000, 0x0fff, 0x2810, /* 8/8/8/8/8/8 */ CK_16XX }, { 182000000, 13000000, 182000000, 0x050e, 0x2710, /* 1/1/2/2/4/8 */ CK_7XX }, { 168000000, 12000000, 168000000, 0x010f, 0x2710, /* 1/1/1/2/8/8 */ CK_16XX|CK_7XX }, { 150000000, 12000000, 150000000, 0x010a, 0x2cb0, /* 1/1/1/2/4/4 */ CK_1510 }, { 120000000, 12000000, 120000000, 0x010a, 0x2510, /* 1/1/1/2/4/4 */ CK_16XX|CK_1510|CK_310|CK_7XX }, { 96000000, 12000000, 96000000, 0x0005, 0x2410, /* 1/1/1/1/2/2 */ CK_16XX|CK_1510|CK_310|CK_7XX }, { 60000000, 12000000, 60000000, 0x0005, 0x2290, /* 1/1/1/1/2/2 */ CK_16XX|CK_1510|CK_310|CK_7XX }, { 30000000, 12000000, 60000000, 0x0555, 0x2290, /* 2/2/2/2/2/2 */ CK_16XX|CK_1510|CK_310|CK_7XX }, { 0, 0, 0, 0, 0 }, };
gpl-2.0
omega-roms/I9500_Stock_Kernel_KK_4.4.2
drivers/scsi/aic94xx/aic94xx_scb.c
9880
27270
/* * Aic94xx SAS/SATA driver SCB management. * * Copyright (C) 2005 Adaptec, Inc. All rights reserved. * Copyright (C) 2005 Luben Tuikov <luben_tuikov@adaptec.com> * * This file is licensed under GPLv2. * * This file is part of the aic94xx driver. * * The aic94xx driver is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; version 2 of the * License. * * The aic94xx driver is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * General Public License for more details. * * You should have received a copy of the GNU General Public License * along with the aic94xx driver; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA * */ #include <linux/gfp.h> #include <scsi/scsi_host.h> #include "aic94xx.h" #include "aic94xx_reg.h" #include "aic94xx_hwi.h" #include "aic94xx_seq.h" #include "aic94xx_dump.h" /* ---------- EMPTY SCB ---------- */ #define DL_PHY_MASK 7 #define BYTES_DMAED 0 #define PRIMITIVE_RECVD 0x08 #define PHY_EVENT 0x10 #define LINK_RESET_ERROR 0x18 #define TIMER_EVENT 0x20 #define REQ_TASK_ABORT 0xF0 #define REQ_DEVICE_RESET 0xF1 #define SIGNAL_NCQ_ERROR 0xF2 #define CLEAR_NCQ_ERROR 0xF3 #define PHY_EVENTS_STATUS (CURRENT_LOSS_OF_SIGNAL | CURRENT_OOB_DONE \ | CURRENT_SPINUP_HOLD | CURRENT_GTO_TIMEOUT \ | CURRENT_OOB_ERROR) static void get_lrate_mode(struct asd_phy *phy, u8 oob_mode) { struct sas_phy *sas_phy = phy->sas_phy.phy; switch (oob_mode & 7) { case PHY_SPEED_60: /* FIXME: sas transport class doesn't have this */ phy->sas_phy.linkrate = SAS_LINK_RATE_6_0_GBPS; phy->sas_phy.phy->negotiated_linkrate = SAS_LINK_RATE_6_0_GBPS; break; case PHY_SPEED_30: phy->sas_phy.linkrate = SAS_LINK_RATE_3_0_GBPS; phy->sas_phy.phy->negotiated_linkrate = SAS_LINK_RATE_3_0_GBPS; break; case PHY_SPEED_15: phy->sas_phy.linkrate = SAS_LINK_RATE_1_5_GBPS; phy->sas_phy.phy->negotiated_linkrate = SAS_LINK_RATE_1_5_GBPS; break; } sas_phy->negotiated_linkrate = phy->sas_phy.linkrate; sas_phy->maximum_linkrate_hw = SAS_LINK_RATE_3_0_GBPS; sas_phy->minimum_linkrate_hw = SAS_LINK_RATE_1_5_GBPS; sas_phy->maximum_linkrate = phy->phy_desc->max_sas_lrate; sas_phy->minimum_linkrate = phy->phy_desc->min_sas_lrate; if (oob_mode & SAS_MODE) phy->sas_phy.oob_mode = SAS_OOB_MODE; else if (oob_mode & SATA_MODE) phy->sas_phy.oob_mode = SATA_OOB_MODE; } static void asd_phy_event_tasklet(struct asd_ascb *ascb, struct done_list_struct *dl) { struct asd_ha_struct *asd_ha = ascb->ha; struct sas_ha_struct *sas_ha = &asd_ha->sas_ha; int phy_id = dl->status_block[0] & DL_PHY_MASK; struct asd_phy *phy = &asd_ha->phys[phy_id]; u8 oob_status = dl->status_block[1] & PHY_EVENTS_STATUS; u8 oob_mode = dl->status_block[2]; switch (oob_status) { case CURRENT_LOSS_OF_SIGNAL: /* directly attached device was removed */ ASD_DPRINTK("phy%d: device unplugged\n", phy_id); asd_turn_led(asd_ha, phy_id, 0); sas_phy_disconnected(&phy->sas_phy); sas_ha->notify_phy_event(&phy->sas_phy, PHYE_LOSS_OF_SIGNAL); break; case CURRENT_OOB_DONE: /* hot plugged device */ asd_turn_led(asd_ha, phy_id, 1); get_lrate_mode(phy, oob_mode); ASD_DPRINTK("phy%d device plugged: lrate:0x%x, proto:0x%x\n", phy_id, phy->sas_phy.linkrate, phy->sas_phy.iproto); sas_ha->notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE); break; case CURRENT_SPINUP_HOLD: /* hot plug SATA, no COMWAKE sent */ asd_turn_led(asd_ha, phy_id, 1); sas_ha->notify_phy_event(&phy->sas_phy, PHYE_SPINUP_HOLD); break; case CURRENT_GTO_TIMEOUT: case CURRENT_OOB_ERROR: ASD_DPRINTK("phy%d error while OOB: oob status:0x%x\n", phy_id, dl->status_block[1]); asd_turn_led(asd_ha, phy_id, 0); sas_phy_disconnected(&phy->sas_phy); sas_ha->notify_phy_event(&phy->sas_phy, PHYE_OOB_ERROR); break; } } /* If phys are enabled sparsely, this will do the right thing. */ static unsigned ord_phy(struct asd_ha_struct *asd_ha, struct asd_phy *phy) { u8 enabled_mask = asd_ha->hw_prof.enabled_phys; int i, k = 0; for_each_phy(enabled_mask, enabled_mask, i) { if (&asd_ha->phys[i] == phy) return k; k++; } return 0; } /** * asd_get_attached_sas_addr -- extract/generate attached SAS address * phy: pointer to asd_phy * sas_addr: pointer to buffer where the SAS address is to be written * * This function extracts the SAS address from an IDENTIFY frame * received. If OOB is SATA, then a SAS address is generated from the * HA tables. * * LOCKING: the frame_rcvd_lock needs to be held since this parses the frame * buffer. */ static void asd_get_attached_sas_addr(struct asd_phy *phy, u8 *sas_addr) { if (phy->sas_phy.frame_rcvd[0] == 0x34 && phy->sas_phy.oob_mode == SATA_OOB_MODE) { struct asd_ha_struct *asd_ha = phy->sas_phy.ha->lldd_ha; /* FIS device-to-host */ u64 addr = be64_to_cpu(*(__be64 *)phy->phy_desc->sas_addr); addr += asd_ha->hw_prof.sata_name_base + ord_phy(asd_ha, phy); *(__be64 *)sas_addr = cpu_to_be64(addr); } else { struct sas_identify_frame *idframe = (void *) phy->sas_phy.frame_rcvd; memcpy(sas_addr, idframe->sas_addr, SAS_ADDR_SIZE); } } static void asd_form_port(struct asd_ha_struct *asd_ha, struct asd_phy *phy) { int i; struct asd_port *free_port = NULL; struct asd_port *port; struct asd_sas_phy *sas_phy = &phy->sas_phy; unsigned long flags; spin_lock_irqsave(&asd_ha->asd_ports_lock, flags); if (!phy->asd_port) { for (i = 0; i < ASD_MAX_PHYS; i++) { port = &asd_ha->asd_ports[i]; /* Check for wide port */ if (port->num_phys > 0 && memcmp(port->sas_addr, sas_phy->sas_addr, SAS_ADDR_SIZE) == 0 && memcmp(port->attached_sas_addr, sas_phy->attached_sas_addr, SAS_ADDR_SIZE) == 0) { break; } /* Find a free port */ if (port->num_phys == 0 && free_port == NULL) { free_port = port; } } /* Use a free port if this doesn't form a wide port */ if (i >= ASD_MAX_PHYS) { port = free_port; BUG_ON(!port); memcpy(port->sas_addr, sas_phy->sas_addr, SAS_ADDR_SIZE); memcpy(port->attached_sas_addr, sas_phy->attached_sas_addr, SAS_ADDR_SIZE); } port->num_phys++; port->phy_mask |= (1U << sas_phy->id); phy->asd_port = port; } ASD_DPRINTK("%s: updating phy_mask 0x%x for phy%d\n", __func__, phy->asd_port->phy_mask, sas_phy->id); asd_update_port_links(asd_ha, phy); spin_unlock_irqrestore(&asd_ha->asd_ports_lock, flags); } static void asd_deform_port(struct asd_ha_struct *asd_ha, struct asd_phy *phy) { struct asd_port *port = phy->asd_port; struct asd_sas_phy *sas_phy = &phy->sas_phy; unsigned long flags; spin_lock_irqsave(&asd_ha->asd_ports_lock, flags); if (port) { port->num_phys--; port->phy_mask &= ~(1U << sas_phy->id); phy->asd_port = NULL; } spin_unlock_irqrestore(&asd_ha->asd_ports_lock, flags); } static void asd_bytes_dmaed_tasklet(struct asd_ascb *ascb, struct done_list_struct *dl, int edb_id, int phy_id) { unsigned long flags; int edb_el = edb_id + ascb->edb_index; struct asd_dma_tok *edb = ascb->ha->seq.edb_arr[edb_el]; struct asd_phy *phy = &ascb->ha->phys[phy_id]; struct sas_ha_struct *sas_ha = phy->sas_phy.ha; u16 size = ((dl->status_block[3] & 7) << 8) | dl->status_block[2]; size = min(size, (u16) sizeof(phy->frame_rcvd)); spin_lock_irqsave(&phy->sas_phy.frame_rcvd_lock, flags); memcpy(phy->sas_phy.frame_rcvd, edb->vaddr, size); phy->sas_phy.frame_rcvd_size = size; asd_get_attached_sas_addr(phy, phy->sas_phy.attached_sas_addr); spin_unlock_irqrestore(&phy->sas_phy.frame_rcvd_lock, flags); asd_dump_frame_rcvd(phy, dl); asd_form_port(ascb->ha, phy); sas_ha->notify_port_event(&phy->sas_phy, PORTE_BYTES_DMAED); } static void asd_link_reset_err_tasklet(struct asd_ascb *ascb, struct done_list_struct *dl, int phy_id) { struct asd_ha_struct *asd_ha = ascb->ha; struct sas_ha_struct *sas_ha = &asd_ha->sas_ha; struct asd_sas_phy *sas_phy = sas_ha->sas_phy[phy_id]; struct asd_phy *phy = &asd_ha->phys[phy_id]; u8 lr_error = dl->status_block[1]; u8 retries_left = dl->status_block[2]; switch (lr_error) { case 0: ASD_DPRINTK("phy%d: Receive ID timer expired\n", phy_id); break; case 1: ASD_DPRINTK("phy%d: Loss of signal\n", phy_id); break; case 2: ASD_DPRINTK("phy%d: Loss of dword sync\n", phy_id); break; case 3: ASD_DPRINTK("phy%d: Receive FIS timeout\n", phy_id); break; default: ASD_DPRINTK("phy%d: unknown link reset error code: 0x%x\n", phy_id, lr_error); break; } asd_turn_led(asd_ha, phy_id, 0); sas_phy_disconnected(sas_phy); asd_deform_port(asd_ha, phy); sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); if (retries_left == 0) { int num = 1; struct asd_ascb *cp = asd_ascb_alloc_list(ascb->ha, &num, GFP_ATOMIC); if (!cp) { asd_printk("%s: out of memory\n", __func__); goto out; } ASD_DPRINTK("phy%d: retries:0 performing link reset seq\n", phy_id); asd_build_control_phy(cp, phy_id, ENABLE_PHY); if (asd_post_ascb_list(ascb->ha, cp, 1) != 0) asd_ascb_free(cp); } out: ; } static void asd_primitive_rcvd_tasklet(struct asd_ascb *ascb, struct done_list_struct *dl, int phy_id) { unsigned long flags; struct sas_ha_struct *sas_ha = &ascb->ha->sas_ha; struct asd_sas_phy *sas_phy = sas_ha->sas_phy[phy_id]; struct asd_ha_struct *asd_ha = ascb->ha; struct asd_phy *phy = &asd_ha->phys[phy_id]; u8 reg = dl->status_block[1]; u32 cont = dl->status_block[2] << ((reg & 3)*8); reg &= ~3; switch (reg) { case LmPRMSTAT0BYTE0: switch (cont) { case LmBROADCH: case LmBROADRVCH0: case LmBROADRVCH1: case LmBROADSES: ASD_DPRINTK("phy%d: BROADCAST change received:%d\n", phy_id, cont); spin_lock_irqsave(&sas_phy->sas_prim_lock, flags); sas_phy->sas_prim = ffs(cont); spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags); sas_ha->notify_port_event(sas_phy,PORTE_BROADCAST_RCVD); break; case LmUNKNOWNP: ASD_DPRINTK("phy%d: unknown BREAK\n", phy_id); break; default: ASD_DPRINTK("phy%d: primitive reg:0x%x, cont:0x%04x\n", phy_id, reg, cont); break; } break; case LmPRMSTAT1BYTE0: switch (cont) { case LmHARDRST: ASD_DPRINTK("phy%d: HARD_RESET primitive rcvd\n", phy_id); /* The sequencer disables all phys on that port. * We have to re-enable the phys ourselves. */ asd_deform_port(asd_ha, phy); sas_ha->notify_port_event(sas_phy, PORTE_HARD_RESET); break; default: ASD_DPRINTK("phy%d: primitive reg:0x%x, cont:0x%04x\n", phy_id, reg, cont); break; } break; default: ASD_DPRINTK("unknown primitive register:0x%x\n", dl->status_block[1]); break; } } /** * asd_invalidate_edb -- invalidate an EDB and if necessary post the ESCB * @ascb: pointer to Empty SCB * @edb_id: index [0,6] to the empty data buffer which is to be invalidated * * After an EDB has been invalidated, if all EDBs in this ESCB have been * invalidated, the ESCB is posted back to the sequencer. * Context is tasklet/IRQ. */ void asd_invalidate_edb(struct asd_ascb *ascb, int edb_id) { struct asd_seq_data *seq = &ascb->ha->seq; struct empty_scb *escb = &ascb->scb->escb; struct sg_el *eb = &escb->eb[edb_id]; struct asd_dma_tok *edb = seq->edb_arr[ascb->edb_index + edb_id]; memset(edb->vaddr, 0, ASD_EDB_SIZE); eb->flags |= ELEMENT_NOT_VALID; escb->num_valid--; if (escb->num_valid == 0) { int i; /* ASD_DPRINTK("reposting escb: vaddr: 0x%p, " "dma_handle: 0x%08llx, next: 0x%08llx, " "index:%d, opcode:0x%02x\n", ascb->dma_scb.vaddr, (u64)ascb->dma_scb.dma_handle, le64_to_cpu(ascb->scb->header.next_scb), le16_to_cpu(ascb->scb->header.index), ascb->scb->header.opcode); */ escb->num_valid = ASD_EDBS_PER_SCB; for (i = 0; i < ASD_EDBS_PER_SCB; i++) escb->eb[i].flags = 0; if (!list_empty(&ascb->list)) list_del_init(&ascb->list); i = asd_post_escb_list(ascb->ha, ascb, 1); if (i) asd_printk("couldn't post escb, err:%d\n", i); } } static void escb_tasklet_complete(struct asd_ascb *ascb, struct done_list_struct *dl) { struct asd_ha_struct *asd_ha = ascb->ha; struct sas_ha_struct *sas_ha = &asd_ha->sas_ha; int edb = (dl->opcode & DL_PHY_MASK) - 1; /* [0xc1,0xc7] -> [0,6] */ u8 sb_opcode = dl->status_block[0]; int phy_id = sb_opcode & DL_PHY_MASK; struct asd_sas_phy *sas_phy = sas_ha->sas_phy[phy_id]; struct asd_phy *phy = &asd_ha->phys[phy_id]; if (edb > 6 || edb < 0) { ASD_DPRINTK("edb is 0x%x! dl->opcode is 0x%x\n", edb, dl->opcode); ASD_DPRINTK("sb_opcode : 0x%x, phy_id: 0x%x\n", sb_opcode, phy_id); ASD_DPRINTK("escb: vaddr: 0x%p, " "dma_handle: 0x%llx, next: 0x%llx, " "index:%d, opcode:0x%02x\n", ascb->dma_scb.vaddr, (unsigned long long)ascb->dma_scb.dma_handle, (unsigned long long) le64_to_cpu(ascb->scb->header.next_scb), le16_to_cpu(ascb->scb->header.index), ascb->scb->header.opcode); } /* Catch these before we mask off the sb_opcode bits */ switch (sb_opcode) { case REQ_TASK_ABORT: { struct asd_ascb *a, *b; u16 tc_abort; struct domain_device *failed_dev = NULL; ASD_DPRINTK("%s: REQ_TASK_ABORT, reason=0x%X\n", __func__, dl->status_block[3]); /* * Find the task that caused the abort and abort it first. * The sequencer won't put anything on the done list until * that happens. */ tc_abort = *((u16*)(&dl->status_block[1])); tc_abort = le16_to_cpu(tc_abort); list_for_each_entry_safe(a, b, &asd_ha->seq.pend_q, list) { struct sas_task *task = a->uldd_task; if (a->tc_index != tc_abort) continue; if (task) { failed_dev = task->dev; sas_task_abort(task); } else { ASD_DPRINTK("R_T_A for non TASK scb 0x%x\n", a->scb->header.opcode); } break; } if (!failed_dev) { ASD_DPRINTK("%s: Can't find task (tc=%d) to abort!\n", __func__, tc_abort); goto out; } /* * Now abort everything else for that device (hba?) so * that the EH will wake up and do something. */ list_for_each_entry_safe(a, b, &asd_ha->seq.pend_q, list) { struct sas_task *task = a->uldd_task; if (task && task->dev == failed_dev && a->tc_index != tc_abort) sas_task_abort(task); } goto out; } case REQ_DEVICE_RESET: { struct asd_ascb *a; u16 conn_handle; unsigned long flags; struct sas_task *last_dev_task = NULL; conn_handle = *((u16*)(&dl->status_block[1])); conn_handle = le16_to_cpu(conn_handle); ASD_DPRINTK("%s: REQ_DEVICE_RESET, reason=0x%X\n", __func__, dl->status_block[3]); /* Find the last pending task for the device... */ list_for_each_entry(a, &asd_ha->seq.pend_q, list) { u16 x; struct domain_device *dev; struct sas_task *task = a->uldd_task; if (!task) continue; dev = task->dev; x = (unsigned long)dev->lldd_dev; if (x == conn_handle) last_dev_task = task; } if (!last_dev_task) { ASD_DPRINTK("%s: Device reset for idle device %d?\n", __func__, conn_handle); goto out; } /* ...and set the reset flag */ spin_lock_irqsave(&last_dev_task->task_state_lock, flags); last_dev_task->task_state_flags |= SAS_TASK_NEED_DEV_RESET; spin_unlock_irqrestore(&last_dev_task->task_state_lock, flags); /* Kill all pending tasks for the device */ list_for_each_entry(a, &asd_ha->seq.pend_q, list) { u16 x; struct domain_device *dev; struct sas_task *task = a->uldd_task; if (!task) continue; dev = task->dev; x = (unsigned long)dev->lldd_dev; if (x == conn_handle) sas_task_abort(task); } goto out; } case SIGNAL_NCQ_ERROR: ASD_DPRINTK("%s: SIGNAL_NCQ_ERROR\n", __func__); goto out; case CLEAR_NCQ_ERROR: ASD_DPRINTK("%s: CLEAR_NCQ_ERROR\n", __func__); goto out; } sb_opcode &= ~DL_PHY_MASK; switch (sb_opcode) { case BYTES_DMAED: ASD_DPRINTK("%s: phy%d: BYTES_DMAED\n", __func__, phy_id); asd_bytes_dmaed_tasklet(ascb, dl, edb, phy_id); break; case PRIMITIVE_RECVD: ASD_DPRINTK("%s: phy%d: PRIMITIVE_RECVD\n", __func__, phy_id); asd_primitive_rcvd_tasklet(ascb, dl, phy_id); break; case PHY_EVENT: ASD_DPRINTK("%s: phy%d: PHY_EVENT\n", __func__, phy_id); asd_phy_event_tasklet(ascb, dl); break; case LINK_RESET_ERROR: ASD_DPRINTK("%s: phy%d: LINK_RESET_ERROR\n", __func__, phy_id); asd_link_reset_err_tasklet(ascb, dl, phy_id); break; case TIMER_EVENT: ASD_DPRINTK("%s: phy%d: TIMER_EVENT, lost dw sync\n", __func__, phy_id); asd_turn_led(asd_ha, phy_id, 0); /* the device is gone */ sas_phy_disconnected(sas_phy); asd_deform_port(asd_ha, phy); sas_ha->notify_port_event(sas_phy, PORTE_TIMER_EVENT); break; default: ASD_DPRINTK("%s: phy%d: unknown event:0x%x\n", __func__, phy_id, sb_opcode); ASD_DPRINTK("edb is 0x%x! dl->opcode is 0x%x\n", edb, dl->opcode); ASD_DPRINTK("sb_opcode : 0x%x, phy_id: 0x%x\n", sb_opcode, phy_id); ASD_DPRINTK("escb: vaddr: 0x%p, " "dma_handle: 0x%llx, next: 0x%llx, " "index:%d, opcode:0x%02x\n", ascb->dma_scb.vaddr, (unsigned long long)ascb->dma_scb.dma_handle, (unsigned long long) le64_to_cpu(ascb->scb->header.next_scb), le16_to_cpu(ascb->scb->header.index), ascb->scb->header.opcode); break; } out: asd_invalidate_edb(ascb, edb); } int asd_init_post_escbs(struct asd_ha_struct *asd_ha) { struct asd_seq_data *seq = &asd_ha->seq; int i; for (i = 0; i < seq->num_escbs; i++) seq->escb_arr[i]->tasklet_complete = escb_tasklet_complete; ASD_DPRINTK("posting %d escbs\n", i); return asd_post_escb_list(asd_ha, seq->escb_arr[0], seq->num_escbs); } /* ---------- CONTROL PHY ---------- */ #define CONTROL_PHY_STATUS (CURRENT_DEVICE_PRESENT | CURRENT_OOB_DONE \ | CURRENT_SPINUP_HOLD | CURRENT_GTO_TIMEOUT \ | CURRENT_OOB_ERROR) /** * control_phy_tasklet_complete -- tasklet complete for CONTROL PHY ascb * @ascb: pointer to an ascb * @dl: pointer to the done list entry * * This function completes a CONTROL PHY scb and frees the ascb. * A note on LEDs: * - an LED blinks if there is IO though it, * - if a device is connected to the LED, it is lit, * - if no device is connected to the LED, is is dimmed (off). */ static void control_phy_tasklet_complete(struct asd_ascb *ascb, struct done_list_struct *dl) { struct asd_ha_struct *asd_ha = ascb->ha; struct scb *scb = ascb->scb; struct control_phy *control_phy = &scb->control_phy; u8 phy_id = control_phy->phy_id; struct asd_phy *phy = &ascb->ha->phys[phy_id]; u8 status = dl->status_block[0]; u8 oob_status = dl->status_block[1]; u8 oob_mode = dl->status_block[2]; /* u8 oob_signals= dl->status_block[3]; */ if (status != 0) { ASD_DPRINTK("%s: phy%d status block opcode:0x%x\n", __func__, phy_id, status); goto out; } switch (control_phy->sub_func) { case DISABLE_PHY: asd_ha->hw_prof.enabled_phys &= ~(1 << phy_id); asd_turn_led(asd_ha, phy_id, 0); asd_control_led(asd_ha, phy_id, 0); ASD_DPRINTK("%s: disable phy%d\n", __func__, phy_id); break; case ENABLE_PHY: asd_control_led(asd_ha, phy_id, 1); if (oob_status & CURRENT_OOB_DONE) { asd_ha->hw_prof.enabled_phys |= (1 << phy_id); get_lrate_mode(phy, oob_mode); asd_turn_led(asd_ha, phy_id, 1); ASD_DPRINTK("%s: phy%d, lrate:0x%x, proto:0x%x\n", __func__, phy_id,phy->sas_phy.linkrate, phy->sas_phy.iproto); } else if (oob_status & CURRENT_SPINUP_HOLD) { asd_ha->hw_prof.enabled_phys |= (1 << phy_id); asd_turn_led(asd_ha, phy_id, 1); ASD_DPRINTK("%s: phy%d, spinup hold\n", __func__, phy_id); } else if (oob_status & CURRENT_ERR_MASK) { asd_turn_led(asd_ha, phy_id, 0); ASD_DPRINTK("%s: phy%d: error: oob status:0x%02x\n", __func__, phy_id, oob_status); } else if (oob_status & (CURRENT_HOT_PLUG_CNCT | CURRENT_DEVICE_PRESENT)) { asd_ha->hw_prof.enabled_phys |= (1 << phy_id); asd_turn_led(asd_ha, phy_id, 1); ASD_DPRINTK("%s: phy%d: hot plug or device present\n", __func__, phy_id); } else { asd_ha->hw_prof.enabled_phys |= (1 << phy_id); asd_turn_led(asd_ha, phy_id, 0); ASD_DPRINTK("%s: phy%d: no device present: " "oob_status:0x%x\n", __func__, phy_id, oob_status); } break; case RELEASE_SPINUP_HOLD: case PHY_NO_OP: case EXECUTE_HARD_RESET: ASD_DPRINTK("%s: phy%d: sub_func:0x%x\n", __func__, phy_id, control_phy->sub_func); /* XXX finish */ break; default: ASD_DPRINTK("%s: phy%d: sub_func:0x%x?\n", __func__, phy_id, control_phy->sub_func); break; } out: asd_ascb_free(ascb); } static void set_speed_mask(u8 *speed_mask, struct asd_phy_desc *pd) { /* disable all speeds, then enable defaults */ *speed_mask = SAS_SPEED_60_DIS | SAS_SPEED_30_DIS | SAS_SPEED_15_DIS | SATA_SPEED_30_DIS | SATA_SPEED_15_DIS; switch (pd->max_sas_lrate) { case SAS_LINK_RATE_6_0_GBPS: *speed_mask &= ~SAS_SPEED_60_DIS; default: case SAS_LINK_RATE_3_0_GBPS: *speed_mask &= ~SAS_SPEED_30_DIS; case SAS_LINK_RATE_1_5_GBPS: *speed_mask &= ~SAS_SPEED_15_DIS; } switch (pd->min_sas_lrate) { case SAS_LINK_RATE_6_0_GBPS: *speed_mask |= SAS_SPEED_30_DIS; case SAS_LINK_RATE_3_0_GBPS: *speed_mask |= SAS_SPEED_15_DIS; default: case SAS_LINK_RATE_1_5_GBPS: /* nothing to do */ ; } switch (pd->max_sata_lrate) { case SAS_LINK_RATE_3_0_GBPS: *speed_mask &= ~SATA_SPEED_30_DIS; default: case SAS_LINK_RATE_1_5_GBPS: *speed_mask &= ~SATA_SPEED_15_DIS; } switch (pd->min_sata_lrate) { case SAS_LINK_RATE_3_0_GBPS: *speed_mask |= SATA_SPEED_15_DIS; default: case SAS_LINK_RATE_1_5_GBPS: /* nothing to do */ ; } } /** * asd_build_control_phy -- build a CONTROL PHY SCB * @ascb: pointer to an ascb * @phy_id: phy id to control, integer * @subfunc: subfunction, what to actually to do the phy * * This function builds a CONTROL PHY scb. No allocation of any kind * is performed. @ascb is allocated with the list function. * The caller can override the ascb->tasklet_complete to point * to its own callback function. It must call asd_ascb_free() * at its tasklet complete function. * See the default implementation. */ void asd_build_control_phy(struct asd_ascb *ascb, int phy_id, u8 subfunc) { struct asd_phy *phy = &ascb->ha->phys[phy_id]; struct scb *scb = ascb->scb; struct control_phy *control_phy = &scb->control_phy; scb->header.opcode = CONTROL_PHY; control_phy->phy_id = (u8) phy_id; control_phy->sub_func = subfunc; switch (subfunc) { case EXECUTE_HARD_RESET: /* 0x81 */ case ENABLE_PHY: /* 0x01 */ /* decide hot plug delay */ control_phy->hot_plug_delay = HOTPLUG_DELAY_TIMEOUT; /* decide speed mask */ set_speed_mask(&control_phy->speed_mask, phy->phy_desc); /* initiator port settings are in the hi nibble */ if (phy->sas_phy.role == PHY_ROLE_INITIATOR) control_phy->port_type = SAS_PROTOCOL_ALL << 4; else if (phy->sas_phy.role == PHY_ROLE_TARGET) control_phy->port_type = SAS_PROTOCOL_ALL; else control_phy->port_type = (SAS_PROTOCOL_ALL << 4) | SAS_PROTOCOL_ALL; /* link reset retries, this should be nominal */ control_phy->link_reset_retries = 10; case RELEASE_SPINUP_HOLD: /* 0x02 */ /* decide the func_mask */ control_phy->func_mask = FUNCTION_MASK_DEFAULT; if (phy->phy_desc->flags & ASD_SATA_SPINUP_HOLD) control_phy->func_mask &= ~SPINUP_HOLD_DIS; else control_phy->func_mask |= SPINUP_HOLD_DIS; } control_phy->conn_handle = cpu_to_le16(0xFFFF); ascb->tasklet_complete = control_phy_tasklet_complete; } /* ---------- INITIATE LINK ADM TASK ---------- */ #if 0 static void link_adm_tasklet_complete(struct asd_ascb *ascb, struct done_list_struct *dl) { u8 opcode = dl->opcode; struct initiate_link_adm *link_adm = &ascb->scb->link_adm; u8 phy_id = link_adm->phy_id; if (opcode != TC_NO_ERROR) { asd_printk("phy%d: link adm task 0x%x completed with error " "0x%x\n", phy_id, link_adm->sub_func, opcode); } ASD_DPRINTK("phy%d: link adm task 0x%x: 0x%x\n", phy_id, link_adm->sub_func, opcode); asd_ascb_free(ascb); } void asd_build_initiate_link_adm_task(struct asd_ascb *ascb, int phy_id, u8 subfunc) { struct scb *scb = ascb->scb; struct initiate_link_adm *link_adm = &scb->link_adm; scb->header.opcode = INITIATE_LINK_ADM_TASK; link_adm->phy_id = phy_id; link_adm->sub_func = subfunc; link_adm->conn_handle = cpu_to_le16(0xFFFF); ascb->tasklet_complete = link_adm_tasklet_complete; } #endif /* 0 */ /* ---------- SCB timer ---------- */ /** * asd_ascb_timedout -- called when a pending SCB's timer has expired * @data: unsigned long, a pointer to the ascb in question * * This is the default timeout function which does the most necessary. * Upper layers can implement their own timeout function, say to free * resources they have with this SCB, and then call this one at the * end of their timeout function. To do this, one should initialize * the ascb->timer.{function, data, expires} prior to calling the post * function. The timer is started by the post function. */ void asd_ascb_timedout(unsigned long data) { struct asd_ascb *ascb = (void *) data; struct asd_seq_data *seq = &ascb->ha->seq; unsigned long flags; ASD_DPRINTK("scb:0x%x timed out\n", ascb->scb->header.opcode); spin_lock_irqsave(&seq->pend_q_lock, flags); seq->pending--; list_del_init(&ascb->list); spin_unlock_irqrestore(&seq->pend_q_lock, flags); asd_ascb_free(ascb); } /* ---------- CONTROL PHY ---------- */ /* Given the spec value, return a driver value. */ static const int phy_func_table[] = { [PHY_FUNC_NOP] = PHY_NO_OP, [PHY_FUNC_LINK_RESET] = ENABLE_PHY, [PHY_FUNC_HARD_RESET] = EXECUTE_HARD_RESET, [PHY_FUNC_DISABLE] = DISABLE_PHY, [PHY_FUNC_RELEASE_SPINUP_HOLD] = RELEASE_SPINUP_HOLD, }; int asd_control_phy(struct asd_sas_phy *phy, enum phy_func func, void *arg) { struct asd_ha_struct *asd_ha = phy->ha->lldd_ha; struct asd_phy_desc *pd = asd_ha->phys[phy->id].phy_desc; struct asd_ascb *ascb; struct sas_phy_linkrates *rates; int res = 1; switch (func) { case PHY_FUNC_CLEAR_ERROR_LOG: case PHY_FUNC_GET_EVENTS: return -ENOSYS; case PHY_FUNC_SET_LINK_RATE: rates = arg; if (rates->minimum_linkrate) { pd->min_sas_lrate = rates->minimum_linkrate; pd->min_sata_lrate = rates->minimum_linkrate; } if (rates->maximum_linkrate) { pd->max_sas_lrate = rates->maximum_linkrate; pd->max_sata_lrate = rates->maximum_linkrate; } func = PHY_FUNC_LINK_RESET; break; default: break; } ascb = asd_ascb_alloc_list(asd_ha, &res, GFP_KERNEL); if (!ascb) return -ENOMEM; asd_build_control_phy(ascb, phy->id, phy_func_table[func]); res = asd_post_ascb_list(asd_ha, ascb , 1); if (res) asd_ascb_free(ascb); return res; }
gpl-2.0